From ffff724266878ec471ae57e4184c05d3eec1adae Mon Sep 17 00:00:00 2001 From: Bdale Garbee Date: Fri, 8 Jun 2012 17:30:09 +0900 Subject: [PATCH] Imported Upstream version 2.9.0 --- .version | 1 + Bcc.inc | 14 + COPYING | 339 + ChangeLog | 17619 ++++++ Makefile.bcc | 40 + Makefile.common.in | 78 + Makefile.in | 263 + README | 1 + all.dsp | 417 + as/COPYING3 | 674 + as/Makefile.in | 29 + as/README | 5 + as/asranlib/Makefile.in | 67 + as/asranlib/asranlib.c | 856 + as/asranlib/asranlib.dsp | 132 + as/asxxsrc/aslex.c | 542 + as/asxxsrc/asnoice.c | 147 + as/asxxsrc/assym.c | 514 + as/asxxsrc/strcmpi.c | 55 + as/clean.mk | 10 + as/doc/README | 460 + as/doc/abstra.txt | 60 + as/doc/appendk.txt | 158 + as/doc/asmlnk.txt | 5814 ++ as/doc/asxhtm.html | 6561 +++ as/doc/format.txt | 142 + as/hc08/Makefile.as_hc08 | 59 + as/hc08/Makefile.bcc | 19 + as/hc08/Makefile.in | 136 + as/hc08/as_hc08.dsp | 174 + as/hc08/asdata.c | 300 + as/hc08/asexpr.c | 710 + as/hc08/aslist.c | 748 + as/hc08/asm.h | 713 + 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+1,14 @@ +#Generic rules and options for building with Borland C++ + +.cacheautodepend + +YACC = bison +LEX = flex +CC = bcc32 + +SLIB = $(PRJDIR)/support/Util + +OFLAGS = -6 -O2 -w-proto -g0 + +.c.obj: + $(CC) -c -o$@ $(OFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(SLIB) $< diff --git a/COPYING b/COPYING new file mode 100644 index 0000000..916d1f0 --- /dev/null +++ b/COPYING @@ -0,0 +1,339 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc. + 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. 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IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING +WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR +REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, +INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING +OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED +TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY +YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER +PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE +POSSIBILITY OF SUCH DAMAGES. + + END OF TERMS AND CONDITIONS + + Appendix: How to Apply These Terms to Your New Programs + + If you develop a new program, and you want it to be of the greatest +possible use to the public, the best way to achieve this is to make it +free software which everyone can redistribute and change under these terms. + + To do so, attach the following notices to the program. It is safest +to attach them to the start of each source file to most effectively +convey the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + + Copyright (C) 19yy + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) 19yy name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + , 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Library General +Public License instead of this License. diff --git a/ChangeLog b/ChangeLog new file mode 100644 index 0000000..0e98353 --- /dev/null +++ b/ChangeLog @@ -0,0 +1,17619 @@ +2009-03-15 Borut Razem + + * support/scripts/repack_release.sh: added + +2009-03-13 Borut Razem + + * doc/sdccman.lyx: "freeware" replaced with "free open source" + +2009-03-12 Borut Razem + + * src/z80/peep.c: #2652979: --debug crashes sdcc + +2009-03-12 Frieder Ferlemann + + * src/SDCCglue.c, + support/regression/tests/bug2655200.c: + applied modified patch from Robert Larice + fixing original report of bug #2655200: pointer to pdata memory + not correctly initialized + +2009-03-11 Borut Razem + + * as/asranlib/asranlib.c: retain the original file mode + +2009-03-10 Borut Razem + + * src/mcs51/gen.c, src/z80/gen.c, src/hc08/gen.c, src/ds390/gen.c, + support/regression/tests/bug1875933.c: + fixed bug #1875933: Evelyn jumps into the void + thanks to Robert Larice + +2009-03-10 Raphael Neider + + * src/pic16/pcode.c (LinkFlow): fix invalid cast from pCodeLabel + to pCodeInstruction to avoid a segmentation fault + +2009-03-03 Borut Razem + + * device/lib/printf_large.c: fixed bug #2656821: bug in printf + +2009-03-03 Raphael Neider + + * device/lib/pic/libdev/Makefile.in: build device-specific + libraries for the correct processor, fixes #2654585 + +2009-03-01 Raphael Neider + + * device/lib/Makefile.in: fixed parallel builds (i.e., make -jN, N>1) + +2009-03-01 Borut Razem + + * src/z80/peep.c: fixed bug #2648964: --i-code-in-asm crashes sdcc + * .version, sdcc.spec, doc/sdccman.lyx, doc/INSTALL.txt: + changed sdcc version to 2.9.0 + +2009-03-01 Maarten Brock + + * src/mcs51/ralloc.c (spillThis, spilSomething): fixed bug 2435941 + (serialRegAssign): do not spil bit registers + throughout cosmetic changes + * support/regression/tests/bug2435941.c: new, added + +2009-02-28 Raphael Neider + + * src/regression/compare10.c, + src/regression/compare7.c, + src/regression/compare8.c, + src/regression/compare9.c: reset watchdog timer in time + * src/regression/configword.c: apply patch from #2488150 + * src/pic/glue.c (pic14createInterruptVect): pin RESET vector + handler to 0x0000 as the linker no longer knows STARTUP sections + * src/pic/pcode.c (register_reassign, ReuseReg): applied modified + patch #2512926 to (mostly) fix #1762626, cosmetic changes + * src/pic/pcodepeep.c: remove reference to nonexisting function + +2009-02-28 Raphael Neider + + * device/include/pic16/signal.h: avoid multiline inline + assembler statements in macros, addresses #2644965 + +2009-02-27 Raphael Neider + + * device/include/pic16/pic18f[24][3456]k20.h, + device/include/pic16/pic18f[68][567]j50.h, + device/include/pic16/pic18f[68]6j55.h, + device/lib/pic16/libdev/pic18f[24][3456]k20.c, + device/lib/pic16/libdev/pic18f[68][567]j50.c, + device/lib/pic16/libdev/pic18f[68]6j55.c, + device/include/pic16/pic18fregs.h, + device/include/pic16/pic16devices.txt, + device/lib/pic16/pics.all, + device/lib/pic16/libdev/Makefile.am, + device/lib/pic16/libio/Makefile.am: added/re-enabled many device + families (87j50 family contributed by Robert Wuest) + + * device/include/pic16/adc.h, + device/lib/pic16/libio/adc/adcbusy.c, + device/lib/pic16/libio/adc/adcclose.c, + device/lib/pic16/libio/adc/adcconv.c, + device/lib/pic16/libio/adc/adcopen.c, + device/lib/pic16/libio/adc/adcsetch.c: added 65j50-style ADC + + * doc/sdccman.lyx: updated list of supported devices, fixed typo + * device/lib/pic16/Makefile.common: do not suppress assembler warnings + + * device/lib/pic16/Makefile.in, + device/lib/pic16/libm/Makefile.in, + device/lib/pic16/debug/Makefile.in, + device/lib/pic16/libio/Makefile.in, + device/lib/pic16/startup/Makefile.in, + device/lib/pic16/libsdcc/Makefile.in, + device/lib/pic16/libdev/Makefile.in, + device/lib/pic16/libc/Makefile.in: regenerated + +2009-02-27 Borut Razem + + * as/z80/asexpr.c, as/z80/z80mch.c: re-fixed bugs + #1829678 and #1704376 in the way proposed by Alan Baldwin + +2009-02-23 Jesus Calvino-Fraga + + * device/include/mcs51/at89c51ed2.h: Fixed address of SFR P5. Thanks + to Steve Qu for the fix. + +2009-02-23 Borut Razem + + * as/z80/asexpr.c: fixed bug #1829678: Z-80 CP A, assembly + it is already fixed for mcs51 and hc08 targets + * as/z80/z80mch.c: fixed bug #1704376: missing as-z80 errors + +2009-02-22 Borut Razem + + * device/lib/Makefile.in: fixed parenthesis error + * doc/sdccman.lyx: fixed webdocs bug #2071421: error in the manual, + fixed webdocs bug #1967920: --version + +2009-02-18 Maarten Brock + + * device/include/mcs51/at89c51ed2.h: fixed bug #2071949 bitmask RBCK wrong + +2009-02-17 Maarten Brock + + * as/link/mcs51/lkihx.c (hexRecord): bugfix do not insert extended address + when addresses are unsorted + +2009-02-15 Frieder Ferlemann + + * device/include/mcs51/p89v66x.h: added ENBOOT thanks + Gudjon Gudjonsson + * device/include/mcs51/p89c66x.h: fixed some defines + * device/include/mcs51/p89v66x.h: fixed some sbit addresses + * doc/sdccman.lyx: added to index, try to reanimate + svn keywords + +2009-02-14 Borut Razem + + * doc/sdccman.lyx: corrected cpp info + +2009-02-13 Borut Razem + + * as/Makefile.in: *.doc renamed to *.txt + +2009-02-11 Borut Razem + + * as/doc/aslnk.doc, as/doc/abstra.doc: renamed to *.txt + * as/doc/aslnk.txt, as/doc/asxhtml.html: changed licens to GPLv3 + +2009-02-11 Borut Razem + + * doc/sdccman.lyx: documented ar format libraries + +2009-02-10 Frieder Ferlemann + + * support/regression/tests/float_single.c: added regression + test. Some testpoints for probably rarely used functions + (acosf, sinhf, tanf, expf) disabled for some targets + +2009-02-10 Raphael Neider + + * src/pic16/gen.c (pic16_freeAsmop): avoid NULL pointer dereference, + (genAssign): fixed for operands on the stack + + * device/lib/pic16/libc/stdio/vfprintf.c, + device/lib/pic16/configure.ac, + device/lib/pic16/Makefile.common: add configurable support for + printing floats via ./configure --enable-floats + * device/lib/pic16/configure, + device/lib/pic16/Makefile.in, + device/lib/pic16/libm/Makefile.in, + device/lib/pic16/debug/Makefile.in, + device/lib/pic16/libio/Makefile.in, + device/lib/pic16/startup/Makefile.in, + device/lib/pic16/libsdcc/Makefile.in, + device/lib/pic16/libdev/Makefile.in, + device/lib/pic16/libc/Makefile.in: regenerated + * doc/sdccman.lyx: documented float support and how to get it + * doc/Makefile.in: fixed race condition on parallel builds + + * device/lib/pic16/libc/stdio/sprintf.c, + device/lib/pic16/libc/stdio/vsprintf.c: do not mess up the user's + pointer to the string buffer, enlarge buffer for x_ftoa() + +2009-02-10 Borut Razem + + * device/lib/printf_tiny.c: replaced non-C89 comments '//' with '/* */' + +2009-02-10 Raphael Neider + + * device/include/pic16/pic18f*.h: add bit aliases in INTCONbits_t + +2009-02-09 Raphael Neider + + * src/pic16/pcode.c (assignToSameBank): add force argument to ignore + artificial bank size limits for compound data (structs, arrays), + avoids assert if --obanksel=N, N > 1, is given + +2009-02-09 Borut Razem + + * as/asranlib/asranlib.c, link/lkar.c: don't check the padding bytes since + the openSUSE GNU ar (GNU Binutils; openSUSE 11.0) 2.18.50.20080409-11.1 + uses '`' character instead '\n' for padding + * as/asranlib/asranlib.c: made it more robust + +2009-02-08 Borut Razem + + * as/COPYING3: added + * support/scripts/sdcc.nsi: added COPYING3.txt to the package + * device/lib/Makefile.in: reenable floating point in model-xstack-auto + libraries + +2009-02-07 Borut Razem + + * as/asranlib/asranlib.c: fixed BSD header length calculation + * .version, doc/sdccman.lyx: bumped sdcc version to 2.8.9 + due sdcc asxxxx license change to GPLv3 + +2009-02-05 Borut Razem + + * as/asranlib/asranlib.c, link/lkar.h, link/lkar.c: + added support for BSD (Mac OS X) ar format + * as/asxxsrc/aslex.c, as/as/asxxsrc/asnoice.c, as/as/asxxsrc/assym.c, + as/as/hc08/asdata.c, as/hc08/asexpr.c, as/hc08/aslist.c, + as/hc08/asm.h, as/hc08/asmain.c, as/hc08/asout.c, as/hc08/assubr.c, + as/hc08/m08adr.c, as/hc08/m08ext.c, as/hc08/m08mch.c, + as/hc08/m08pst.c, as/hc08/m6808.h, as/link/aslink.h, + as/link/hc08/lkarea.c, as/link/hc08/lkelf.c, as/link/hc08/lkihx.c, + as/link/hc08/lkmain.c, as/link/hc08/lkmem.c, as/link/hc08/lkrloc.c, + as/link/hc08/lks19.c, as/link/lkaomf51.c, as/link/lkdata.c, + as/link/lkeval.c, as/link/lkhead.c, as/link/lklex.c, as/link/lklib.c, + as/link/lklibr.c, as/link/lklibr.h, as/link/lklist.c, + as/link/lknoice.c, as/link/lkrel.c, as/link/lkrel.h, + as/link/lksdcclib.c, as/link/lkstore.c, as/link/lksym.c, + as/link/mcs51/lkarea.c, as/link/mcs51/lkihx.c, + as/link/mcs51/lkmain.c, as/link/mcs51/lkmem.c, + as/link/mcs51/lkrloc.c, as/link/mcs51/lks19.c, as/link/z80/lkarea.c, + as/link/z80/lkgb.c, as/link/z80/lkgg.c, as/link/z80/lkihx.c, + as/link/z80/lkmain.c, as/link/z80/lkrloc.c, as/link/z80/lks19.c, + as/mcs51/asdata.c, as/mcs51/asexpr.c, as/mcs51/aslist.c, + as/mcs51/asm.h, as/mcs51/asmain.c, as/mcs51/asout.c, + as/mcs51/assubr.c, as/mcs51/i51adr.c, as/mcs51/i51ext.c, + as/mcs51/i51mch.c, as/mcs51/i51pst.c, as/mcs51/i8051.h, + as/xa51/xa_link.c, as/xa51/xa_main.c, as/xa51/xa_main.h, + as/xa51/xa_rasm.l, as/xa51/xa_rasm.y, as/xa51/xa_version.h, + as/z80/asdata.c, as/z80/asexpr.c, as/z80/aslist.c, as/z80/asm.h, + as/z80/asmain.c, as/z80/asout.c, as/z80/assubr.c, as/z80/z80.h, + as/z80/z80adr.c, as/z80/z80ext.c, as/z80/z80mch.c, as/z80/z80pst.c: + changed license to GPL either version 3, or (at your option) any + later version + +2009-02-05 Borut Razem + + * as/asranlib/asranlib.c, link/lkar.h, link/lkar.c: + added support for BSD (Mac OS X) ar format + +2009-02-02 Borut Razem + + * device/lib/gbz80/Makefile.in, device/lib/hc08/Makefile.in, + device/lib/z80/Makefile.in: + chose source files in the PORT directory if they are available + +2009-02-01 Raphael Neider + + * device/lib/pic16/libdev/pic18f1220.c, + * device/lib/pic16/libdev/pic18f4450.c: + define SSPBUF to allow use of printf + +2009-02-01 Borut Razem + + * device/lib/Makefile.in, device/lib/gbz80/Makefile.in, + device/lib/hc08/Makefile.in, device/lib/incl.mk, + device/lib/z80/Makefile.in: + don't remake libraries + * support/regression/tests/snprintf.c: + reenable floating point in small-xstack-auto library + +2009-01-26 Raphael Neider + + * src/pic16/ralloc.c (packForPush): disabled to fix #2496919 + +2009-01-25 Raphael Neider + + * src/pic16/main.c (_pic16_linkEdit): prepend -L paths to linker + search path instead of appending them + +2009-01-24 Borut Razem + + * as/asranlib/asranlib.h: changed type of offset to unsigned int to + make it work on ppc Mac OS X (off_t is 64 bit and is not converted + to 32 bit unsigned int when calling sputl() since it is a macro + * as/link/lkar.c: changed the initialization of This->loaded + +2009-01-23 Borut Razem + + * as/link/lkar.h: changed type of ar_size to size_t to make it work on + ppc Mac OS X (off_t is 64 bit and is not converted to 32 bit + unsigned int when calling new(), since asxxxx doesn't use function + prototypes) + +2009-01-21 Borut Razem + + * as/link/lkar.h: sgetl and sputl are independent of endianness + * as/link/sdxxxx_config.h.in: removed endianness detection + +2009-01-20 Borut Razem + + * .version, doc/sdccman.lyx: bumped sdcc version to 2.8.8 + due creation of ar format libraries + * support/scripts/sdcc.nsi: + don't add nonexistent object files to the package + +2009-01-19 Borut Razem + + * Makefile.in, configure.in, configure, + device/lib/Makefile.in, device/lib/ds390/Makefile.in, + device/lib/ds400/Makefile.in, device/lib/gbz80/Makefile.in, + device/lib/hc08/Makefile.in, device/lib/large/Makefile.in, + device/lib/mcs51/Makefile.in, device/lib/medium/Makefile.in, + device/lib/small/Makefile.in, + device/lib/z80/Makefile.in: create ar format libraries + * support/regression/ports/mcs51-xstack-auto/spec.mk: + use device/lib/Makefile to create library + * support/regression/tests/snprintf.c: + floating point is not enabled in small-xstack-auto library + * device/lib/libfloat.lib, device/lib/libint.lib, + device/lib/liblong.lib, device/lib/libsdcc.lib: removed + +2009-01-18 Borut Razem + + * support/cpp/auto-host.h: fixed warning: "__STDC__" redefined, + warning: extra tokens at end of #endif directive + +2009-01-11 Borut Razem + + * Makefile.in: added SDCC_ASRANLIB to PKGS + +2009-01-10 Borut Razem + + * support/scripts/sdcc.nsi: added asranlib.exe to the install package + * .version, doc/sdccman.lyx: bumped sdcc version to 2.8.7 + due added support for ar format libraries + +2009-01-09 Borut Razem + + * as/asranlib/Makefile.in, as/asranlib/asranlib.dsp, + as/asranlib/asranlib.c: added asranlib + * as/link/lkar.c, as/link/lkar.h: added support for ar format libraries + * Makefile.in, as/link/hc08/Makefile.in, + as/link/hc08/link_hc08.dsp, as/link/lklib.c, as/link/lklibr.c, + as/link/lklibr.h, as/link/lkrel.c, as/link/lkrel.h, + as/link/lksdcclib.c, as/link/mcs51/Makefile.in, + as/link/mcs51/aslink.dsp, as/link/z80/Makefile.in, + as/link/z80/linkgbz80.dsp, as/link/z80/linkz80.dsp, configure, + configure.in, sdcc.dsw: modified to support ar format libraries + +2009-01-08 Maarten Brock + + * src/SDCCast.c (decorateType RETURN): use RESULT_TYPE_GPTR for generic + pointer return + +2009-01-05 Philipp Klaus Krause + + * sim/ucsim/z80.src/inst_ed.cc: + Fixed bug #2488074, which made regression tests fail. + +2009-01-05 Philipp Klaus Krause + + * device/lib/z80/mod.s, + device/lib/z80/div.s, + device/lib/z80/mulchar.s, + device/lib/z80/mul.s, + device/lib/z80/divsigned.s, + device/lib/z80/Makefile.in: + Implemented RFE #1702376. + +2009-01-05 Borut Razem + + * as/link/lksdcclib.c: + fixed linker hanging in INDEXLIB is not defined (hc08) + +2009-01-04 Philipp Klaus Krause + + * src/z80/gen.c: + Implemented RFE #2485684, and some further improvements of HL caching + including a bugfix. + * src/z80/peeph-z80.def: + Fixed a bug exposed by implementing RFE #2485684. + +2009-01-04 Philipp Klaus Krause + + * src/z80/peeph-z80.def: + Peephole improvements. + * src/z80/gen.c, + src/z80/main.c, + device/include/string.h, + device/lib/z80/memmove.s: + Minor code cleanup. + * device/lib/z80/Makefile.in, + device/lib/Makefile.in, + support/regression/tests/memory.c, + device/lib/z80/strlen.s: + Partially implemented RFE #2471534. + +2009-01-04 Borut Razem + + * .version, doc/sdccman.lyx: bumped sdcc version to 2.8.6 + due changes in sdcc asxxxx linkers - it sholud be done 2 days ago :( + * doc/README.txt: updated John Hartman's e-mail address + * as/link/lkrel.c, as/link/lksdcclib.c: + fixed bug #2484677: Linker hangs + * src/z80/peep.c: fixed msvc warning C4047: + 'return' : 'int ' differs in levels of indirection from 'char *' + * config.dsp: as/lib corrected to as/link + +2009-01-04 Philipp Klaus Krause + + * src/z80/peep.c: + Implemented RFE #2484693. + * src/z80/peeph-z80.def: + Some peephole improvements. + +2009-01-03 Borut Razem + + * as/link/lklibr.c: + fixed warning: 'ret' may be used uninitialized in this function + +2009-01-02 Borut Razem + + * as/link/lklib.c, as/link/lksdcclib.c, as/link/lklibr.h, + as/link/getline.[ch], as/link/lkrel.[ch]: added, + made support for differnet library formats more flexible, + preparation for support of ar format + * as/link/lklibr.c, as/link/z80/Makefile.in, + as/link/z80/linkgbz80.dsp, as/link/z80/linkz80.dsp, + as/link/hc08/link_hc08.dsp, as/link/hc08/Makefile.in, + as/link/mcs51/aslink.dsp, as/link/mcs51/Makefile.in, + as/link/hc08/lkelf.c, as/link/aslink.h: + made support for differnet library formats more flexible, + preparation for support of ar format + +2009-01-01 Borut Razem + + * as/link/asxxxx_config.h.in: + fixed warning: extra tokens at end of #endif directive + * src/z80/peep.c: + fixed warning: suggest parentheses around && within || + * device/lib/Makefile.in: allow whitespaces at the end of lines in + ports.build, in order to make it work on cygwin - it seems to be a + bug in cygwin grep: CR is not treated as part of end-of-line + +2008-12-31 Borut Razem + + * configure, configure.in, config.dsp, config_vc.awk, + as/link/asxxxx_config.h.in, as/link/hc08/lkelf.c, as/link/aslink.h, + as/link/hc08/Makefile.in, as/link/mcs51/Makefile.in: + introduced asxxxx_config.h.in + +2008-12-30 Philipp Klaus Krause + + * src/z80/gen.c, + src/z80/peeph-z80.def: + Minor addition improvement. + +2008-12-30 Raphael Neider + + * as/link/hc08/lkelf.c, as/link/lkaomf51.c, as/link/lklibr.c, + as/link/z80/lkgb.c, debugger/mcs51/cmd.c, sim/ucsim/utils.cc, + src/SDCCasm.c, support/Util/dbuf_string.c, support/cpp/c-ppoutput.c, + support/cpp/libcpp/lex.c, support/cpp/libcpp/macro.c, + support/librarian/sdcclib.c, support/makebin/makebin.c: + partially revert changes from r5293..r5295 + +2008-12-29 Philipp Klaus Krause + + * src/z80/peeph-z80.def: + Minor peephole improvement. + +2008-12-29 Raphael Neider + + * src/pic/pcode.c (insertBankSel, FixRegisterBanking): emit + incorrectly discarded BANKSELs + +2008-12-29 Philipp Klaus Krause + + * support/regression/tests/memory.c: + Added simple test for memset(), memcpy() and memmove() + +2008-12-29 Borut Razem + + * sdcc/support/scripts/sdcc.nsi: removed $INSTDIR\lib\src\z80\*.c + +2008-12-28 Maarten Brock + + * src/mcs51/peeph.def (177.e): replaced notVolatile(%3) with + operandsNotRelated(%1 %3), had to change (a)r%1 to (a)%1 for this to work + (177.j): added new rule + * src/SDCCsymt.h: added RESULT_TYPE_GPTR + * src/SDCCast.c (processParms): use RESULT_TYPE_GPTR for generic ptr parms, + (decorateType CAST): propagate storage class to generic pointer results + +2008-12-27 Philipp Klaus Krause + + * device/lib/z80/string.c, + device/lib/z80/printf.c, + device/lib/z80/mul.s: + z80 library cleanup + * src/z80/gen.c: + Fixed code generation bug exposed by builtin memcpy(). + +2008-12-27 Philipp Klaus Krause + + * device/lib/_memcpy.c: + fixed conflict with builtin memcpy() + +2008-12-26 Borut Razem + + * support/librarian/sdcclib.c: + fixed bug 2466950: "sdcclib broken" + by removing fgets return value check + +2008-12-26 Philipp Klaus Krause + * src/z80/main.c, + src/z80/gen.c, + device/include/string.h: Implemented RFE #1914254 + +2008-12-26 Philipp Klaus Krause + * device/lib/z80/Makefile.in, + device/lib/Makefile.in, + device/lib/z80/memmove.s: Implemented RFE #1914256 + +2008-12-26 Philipp Klaus Krause + + * src/z80/peeph-z80.def: fixed a bug in peephole 0zf + * src/z80/peep.c: improved checks for unused data + * src/z80/gen.c, + src/z80/main.c: Implemented RFE #1899189 + +2008-12-25 Borut Razem + + * support/regression/Makefile.in: + add -I$(INC_DIR) to SDCCFLAGS only if INC_DIR is defined + +2008-12-25 Philipp Klaus Krause + + * src/z80/peeph-z80.def: minor peephole improvements + +2008-12-21 Borut Razem + + * support/librarian/sdcclib.c: fixed build failure on Mac OS X + due to redefinition of symbol __assert + sdcclib.c:53:1:warning: "__assert" redefined + /Xcode2.5/SDKs/MacOSX10.4u.sdk/usr/include/assert.h:80:1: + warning: this is the location of the previous definition + +2008-12-20 Raphael Neider + + * debugger/mcs51/break.c, debugger/mcs51/cmd.c, + debugger/mcs51/simi.c, debugger/mcs51/symtab.c, + support/cpp/libcpp/macro.c: fix format string errors + + * sim/ucsim/s51.src/timer2.cc: add clarifying parens + + * src/pic/device.c: partial rewrite using strtok, + quieten compiler warnings, adopt SDCC coding style + + * as/link/hc08/lkelf.c, as/link/lkaomf51.c, as/link/lklibr.c, + as/link/z80/lkgb.c, as/z80/asout.c, debugger/mcs51/cmd.c, + sim/ucsim/utils.cc, src/SDCCasm.c, support/Util/dbuf_string.c, + support/cpp/c-ppoutput.c, support/cpp/libcpp/lex.c, + support/librarian/sdcclib.c, support/makebin/makebin.c: + quieten most compiler warnings + + * sim/ucsim/avr.src/arith_inst.cc: quieten compiler warnings, + probably fix operator precedence bug + + * doc/clean.mk: quieten rm if no .lyx is present + +2008-12-19 Borut Razem + + * doc/sdccman.lyx, doc/random-notes.txt, doc/avr/avr_design.txt, + doc/TININative.txt, doc/macro-sys-design.txt, doc/libdoc.txt, + doc/README.txt, doc/test_suite_spec.lyx: + applied patch 2446381: Dcoumentation spelling correcitons + thanks to Steven Borley + +2008-12-16 Raphael Neider + + * device/include/pic/pic12f629.h, + device/include/pic/pic12f675.h, + device/lib/pic/libdev/pic12f629.c, + device/lib/pic/libdev/pic12f675.c: consolidated, added TRISIO bits + +2008-12-14 Borut Razem + + * doc/sdccman.lyx, cdbfileformat.lyx, test_suite_spec.lyx: + converted to LyX 1.5.7 (\lyxformat 276) format + +2008-12-07 Borut Razem + + * support/regression/tests/bitfields.c: + added test case for bug #2366757 + +2008-12-07 Raphael Neider + + * src/pic16/glue.c (pic16_printIvalBitFields): prevent + NULL pointer dereference, closes #2366757 + +2008-11-25 Raphael Neider + + * device/include/pic16/pic16devices.txt, + sdcc/src/pic16/device.c, + sdcc/src/pic16/device.h: implicitly disable XINST + whenever CONFIG4L is set via an additional optional + argument to the configword directive in pic16devices.txt + +2008-11-24 Raphael Neider + + * device/lib/pic16/configure.ac, + device/lib/pic16/Makefile.common: fixed quoting issues + + * device/lib/pic16/configure, + device/lib/pic16/debug/Makefile.in, + device/lib/pic16/libc/Makefile.in, + device/lib/pic16/libdev/Makefile.in, + device/lib/pic16/libio/Makefile.in, + device/lib/pic16/libm/Makefile.in, + device/lib/pic16/libsdcc/Makefile.in, + device/lib/pic16/Makefile.in, + device/lib/pic16/startup/Makefile.in: regenerated + + * src/pic16/main.c (_pic16_finaliseOptions): revert to + variant of r5216 + +2008-11-24 Raphael Neider + + * src/pic16/main.c (_pic16_finaliseOptions): do not quote the + argument of --asm= or --link= to allow for + --asm="sh script --options", the user can double quote the + argument if needed: --asm="'c:/program files/gpasm' -q", + also fix some potential buffer overflows + +2008-11-19 Borut Razem + + * doc/sdccman.lyx: + fixed 2314467: sdccman.lyx: fix "--" in command line parameters + thanks Mauro Giachero + +2008-11-16 Borut Razem + + * .version, doc/sdccman.lyx: bumped sdcc version to 2.8.5 + * doc/sdccman.lyx: documented fixed unnamed bit-field initialization + +2008-11-15 Borut Razem + + * src/pic16/glue.c, src/SDCC.y, src/SDCCast.c, src/SDCCglue.c, + src/SDCCsymt.c, src/SDCCsymt.h: + fixed RFE #2291335 : Unnamed bit-field initialization + * support/regression/tests/bitfields.c: + added test case for RFE #2291335 + * support/regression/tests/bug-1981238.c: + don't initialize unnamed bit-fields + +2008-11-11 Raphael Neider + + * device/include/pic16/pic18f25j10.h, + device/include/pic16/pic18f45j10.h: remove useless boilerplate + + * device/include/pic16/adc.h, + device/lib/pic16/libio/adc/adcbusy.c, + device/lib/pic16/libio/adc/adcclose.c, + device/lib/pic16/libio/adc/adcconv.c, + device/lib/pic16/libio/adc/adcopen.c, + device/lib/pic16/libio/adc/adcread.c, + device/lib/pic16/libio/adc/adcsetch.c: generalized, documented, + and fixed ADC routines to work for more target devices, + incorporates patch #2036130 by Nick Materer + +2008-11-10 Steven Borley + + * device/include/ctype.h, + * device/include/ds400rom.h, + * device/include/ds80c390.h, + * device/include/float.h, + * device/include/math.h, + * device/include/serial.h, + * device/include/stdbool.h, + * device/include/tinibios.h: replaced non-C89 '//' with '/* */', + patch 2195343 + * device/include/mcs51/C8051F336.h, + * device/include/mcs51/C8051T600.h, + * device/include/mcs51/C8051T610.h, + * device/include/mcs51/C8051T630.h: new, added, patch 2183334 + (svn commit by Maarten Brock ) + +2008-11-10 Frieder Ferlemann + + * device/include/mcs51/P89LPC922.h: fixed #2255989, thanks kubi57 + +2008-11-10 Raphael Neider + + * device/lib/pic16/libdev/mkmk.sh: obey pics.all + * device/lib/pic16/libio/mkmk.sh: properly match whole lines in + .ignore files, fixes IO libs for 18f242, 18f252, 18f442, and 18f452 + (patch by Nick Materer, #2253980) + + * device/lib/pic16/libio/adc.ignore, + device/lib/pic16/libio/i2c.ignore, + device/lib/pic16/libio/usart.ignore, + device/lib/pic16/pics.all: updated to build more device libs + + * device/lib/pic16/libdev/Makefile.am, + device/lib/pic16/libdev/Makefile.in, + device/lib/pic16/libio/Makefile.am, + device/lib/pic16/libio/Makefile.in: regenerated + + * src/pic16/device.c (pic16_dump_usection): fixed output of multiple + names per memory location, applied SDCC style to more functions + +2008-11-09 Gudjon I. Gudjonsson + + * device/include/mcs51/p89lpc933_4.h: new NXP header file + * device/include/mcs51/p89lpc935_6.h: new NXP header file + * device/include/mcs51/p89v66x.h: minor changes + (svn commit by Frieder Ferlemann ) + +2008-11-09 Raphael Neider + + * device/include/pic/pic14devices.txt: fixed memory description for + 12f629 and 12f675, closes #2236240 + +2008-11-06 Borut Razem + + * src/SDCCmain.c: fixed bug #2224960: sdcc -MM no working correctly + pass system include paths with -isystem to sdcpp + * src/SDCCglue.c, src/pic/glue.c, src/pic16/glue.c: removed unneeded + functions (closePipes), (closeTmpFiles) and (rmTmpFiles) + +2008-11-02 Raphael Neider + + * doc/sdccman.lyx: updated the sections on the library build process + and on how to add support for new devices, and documented known + problems with the extended instruction set including a workaround + +2008-11-01 Raphael Neider + + * device/include/pic16/adc.h, + device/include/pic16/pic16devices.txt, + device/include/pic16/pic18f2410.h, + device/include/pic16/pic18f2510.h, + device/include/pic16/pic18f2515.h, + device/include/pic16/pic18f2610.h, + device/include/pic16/pic18f4410.h, + device/include/pic16/pic18f4510.h, + device/include/pic16/pic18f4515.h, + device/include/pic16/pic18f4610.h, + device/include/pic16/pic18fregs.h, + device/lib/pic16/libdev/Makefile.am, + device/lib/pic16/libdev/Makefile.in, + device/lib/pic16/libdev/pic18f2410.c, + device/lib/pic16/libdev/pic18f2510.c, + device/lib/pic16/libdev/pic18f2515.c, + device/lib/pic16/libdev/pic18f2610.c, + device/lib/pic16/libdev/pic18f4410.c, + device/lib/pic16/libdev/pic18f4510.c, + device/lib/pic16/libdev/pic18f4515.c, + device/lib/pic16/libdev/pic18f4610.c, + device/lib/pic16/libio/Makefile.am, + device/lib/pic16/libio/Makefile.in, + device/lib/pic16/pics.all: added support for 18f[24][456]10 + and 18f[24]515 devices + * doc/sdccman.lyx: updated list of supported PIC16 devices + + * src/pic/glue.c, src/pic/pcode.c, src/pic/pcodeflow.c, + src/pic16/glue.c, src/pic16/pcode.c, src/pic16/pcodeflow.c, + src/xa51/gen.c: avoid compiler warnings + * support/scripts/inc2h-pic16.pl: removed trailing whitespace + +2008-10-22 Gudjon I. Gudjonsson + + * device/include/mcs51/p89v66x.h: NXP header file + * device/include/mcs51/p89c66x.h: fixed an SBIT definition + (svn commit by Frieder Ferlemann ) + +2008-10-14 Raphael Neider + + * device/lib/pic16/libdev/Makefile.am, + device/lib/pic16/libio/Makefile.am: enable building libraries for + 18f2321, 18f4321, 18f2523, 18f4620, 18f66j60, 18f66j65, 18f67j60, + 18f86j60, 18f86j65, 18f87j60, 18f96j60, 18f96j65, and 18f97j60 + * device/lib/pic16/libdev/Makefile.in, + device/lib/pic16/libio/Makefile.in: regenerated + +2008-10-14 Raphael Neider + + * device/include/pic16/pic18f2450.h, + device/include/pic16/pic18f4450.h, + device/lib/pic16/libdev/pic18f2450.c, + device/lib/pic16/libdev/pic18f4450.c, + device/include/pic16/adc.h, + device/include/pic16/pic16devices.txt, + device/include/pic16/pic18fregs.h, + device/lib/pic16/libdev/Makefile.am, + device/lib/pic16/libdev/Makefile.in, + device/lib/pic16/libio/Makefile.am, + device/lib/pic16/libio/Makefile.in, + device/lib/pic16/pics.all: added 18f2450 and 18f4450, closes #1844525 + + * device/lib/pic16/libsdcc/stack/stack.S: there is no need to pin the + stack to a fixed location, relax it to automatically work with all + but the smallest devices (256 byte RAM devices need #pragma stack) + +2008-10-09 Maarten Brock + + * debugger/mcs51/break.c: bugfix from patch 1989966, thanks Risto Huotari + * debugger/mcs51/simi.c: bugfix from patch 1989972, thanks Risto Huotari + * device/lib/_strcspn.c: fixed bug 2140931 + +2008-10-06 Raphael Neider + + * device/include/pic16/stdio.h, + device/lib/pic16/libc/stdio/putchar.c: putchar should not be + declared __naked for convenience, named all arguments + * device/lib/pic16/libc/stdio/strmgpsim.c, + device/lib/pic16/libc/stdio/strmmssp.c, + device/lib/pic16/libc/stdio/strmusart.c: cosmetic changes + + * src/pic16/pcode.c (createReachingDefinitions): avoid segfault on + empty __naked functions, + * (pCodeLabelDestruct, pic16_unlinkpCode, pic16_pCodeUnlink): fix + corner cases (unlink first/last pCode in list), reuse more code + +2008-10-05 Maarten Brock + + * src/ds390/main.c (_ds390_genInitStartup): added + * src/SDCCpeeph.c (getPatternVar): new, added, + (labelInRange): fixed bug 2115959 + * src/mcs51/peeph.def (rules 193.x to 198.x): check for labelInRange + * src/SDCCicode.h: added newiTempOperand + * src/SDCCcse.c (algebraicOpts): fixed bug for x*-1, + added optimizations for 0/x and x/-1, see also patch 2142900 + * support/regression/tests/onebyte.c (testMul): added test cases + +2008-09-20 Borut Razem + + * src/pic16/glue.c: + definition of absolute address symbols without initial value, + fixed SDCC crash "do not know how to intialize symbol" + +2008-09-16 Maarten Brock + + * device/lib/z80/mul.s (__mulsuchar_rrx_s, __muluschar_rrx_s), + * device/lib/z80/div.s (__divsuchar_rrx_s, __modsuchar_rrx_s, + __divuschar_rrx_s, __moduschar_rrx_s): added mixed signedness versions + * device/lib/z80/stubs.s: added stubs for above functions + * src/SDCCopt.c (convilong), + * src/SDCCsymt.c (initCSupport): fixed bug 1900961 + * src/SDCCsymt.h (__muldiv): enlarged for mixed signedness + * src/z80/main.c (_hasNativeMulFor): fixed bug, I think + * support/regression/tests/onebyte.c: enabled all tests for z80 + +2008-09-15 Borut Razem + + * device/include/pic16/stdio.h, device/lib/pic16/libc/stdio/streams.c, + device/lib/pic16/libc/stdio/printf.c, + device/lib/pic16/libc/stdio/strmusart.c, + device/lib/pic16/libc/stdio/printf_tiny.c, + device/lib/pic16/libc/stdio/sprintf.c, + device/lib/pic16/libc/stdio/strmgpsim.c, + device/lib/pic16/libc/stdio/putchar.c, + device/lib/pic16/libc/stdio/fprintf.c, + device/lib/pic16/libc/stdio/strmmssp.c, + device/device/lib/pic16/libc/stdio/vprintf.c, + device/lib/pic16/libc/stdio/printf_small.c, + device/lib/pic16/libc/stdio/vsprintf.c, + device/lib/pic16/libc/stdio/strmputchar.c, + device/lib/pic16/libc/Makefile.am, + device/lib/pic16/libc/Makefile.in: + *printf now returns int, puchar.c moved from stdlib to stdio, + *printf format parameter type changed from char * to const char *, + added GNU link excetion text to library source files, + applyed GNU coding style, removed useless svn ids, + added BINARY_SPECIFIER macro re-enables the use of the removed 'b' + binary specifier: "%b", "%hb" and "%lb" + * device/lib/pic16/libc/stdio/vfprintf.c: + applied patch #2044424: PIC16: vfprintf + thanks Mauro Giachero + * support/regression/tests/bug1057979.c: + removed old pic16 sprintf specifics + * .version, doc/sdccman.lyx: bumped sdcc version to 2.8.4 + * doc/sdccman.lyx: documented 'b' binary format specifier removal + +2008-09-15 Raphael Neider + + * src/pic16/device.c (pic16_dump_usection): force udata sections + into the addressable range (0..0xFFF), workaround for a gpsim + bug preventing simulation of regtest bug1750318 + * src/pic16/ralloc.c (deassignLRs): cosmetic changes, + (serialRegAssign): fixed regtest bug-971834, + (pic16_packRegisters): avoid null-pointer dereference + +2008-09-14 Raphael Neider + + * src/pic16/gen.c, src/pic16/ralloc.c: use + SYM_SPIL_LOC/SPIL_LOC macros, no functional changes + * src/pic16/ralloc.c (rematStr): reimplemented, fixes #1818857 + +2008-09-12 Borut Razem + + * support/regression/fwk/testfwk.h: + define pdata as data for pic16 target + thanks Mauro Giachero + +2008-09-11 Borut Razem + + * support/regression/tests/bug-221100.c, support/regression/shifts.c, + support/regression/absolute.c: + applied patch #2105615: Some PIC16 testcase fixlets + thanks Mauro Giachero + +2008-09-08 Maarten Brock + + * src/z80/gen.c (genCmpGt, genCmpLt): fixed bug 2094505 + * support/regression/tests/bug2094505.c: new, added + +2008-09-07 Borut Razem + + * src/SDCCglue.c, src/SDCCast.c: + fixed throw of "excess elements" warning for char arrays + * support/regression/tests/nullstring.c: + disable warning about excess elements in array of chars initializer + +2008-09-07 Maarten Brock + + * as/z80/aslist.c (lstsym): changed old K&R to ANSI + * src/SDCCicode.c (geniCodeCritical): fixed bug for hc08 + * src/z80/gen.c (genCritical, genEndCritical): fixed bug 2077267 + * support/regression/tests/bug2077267.c: new, added + +2008-09-05 Raphael Neider + + * configure.in, Makefile.common.in: add support for ccache, + remove spurious $VERSION output, detect doc-tools even without + --enable-doc to facilitate later manual doc-builds, minor cleanup + * configure: regenerated + + * doc/Makefile.in: quieten pdflatex, makeindex, and latex2html, + avoid races in parallel VPATH builds + * doc/clean.mk: remove .lyx files in the builddir for VPATH builds + * doc/sdccman.lyx: mention --without-ccache configure option + +2008-09-01 Raphael Neider + + * src/pic16/gen.c (pic16_derefPtr): handle CPOINTERs as well + * (genConstPointerGet): fix reading bitfields from __code space + * src/pic16/glue.c (pic16_printIvalBitFields): correctly mask + bitfield initializers (fix regression test bug1856409.c) + * (pic16_printIvalCharPtr,pic16_printIvalPtr): generalized to support + arbitrary sizes + +2008-08-31 Raphael Neider + + * src/pic16/gen.c (genAssign): removed useless compiler output + * (genPointerGet,genPointerSet,genCast), + src/pic16/glue.c (pic16_printGPointerType): + also handle PPOINTERs just to avoid spurious asserts + * (pic16_printIvalType,pic16_printIvalBitFields): + generalized to arbitrary type/bitfield sizes, allows compilation of + regression test bug-1981238.c + * (pic16_printIvalChar): fix regression test structflexarray.c + * (pic16_printIvalArray): avoid SIGSEGV on uninitialized strings + in initialized structs and fix #1843745 + * (pic16_printIvalStruct): always output initializers for all fields, + even those not explicitly given, fixes zeropad.c regression test + * (pic16_printIvalUnion): fix union initializers (bug1426356.c, + #2073635, #1567098, and #1485812) + * src/pic16/main.c (_pic16_keywords): remove unsupported 'pdata' + +2008-08-31 Borut Razem + + * support/regression/tests/bug-895992.c, + support/regression/tests/onebyte.c: + enabled pic16 regression testing since the bugs + 1511794: pic16: regression test bug-895992.c fails + 1444425: onebyte.c regression tes fails on pic16 + are fixed, probably by fixing + 2048464: PIC16: fix genUminus - addresses not.c regression test + * src/SDCCsymt.c, src/SDCCglue.c, + support/regression/tests/bug-1981238.c: + applied patch 2076664: fix #1981238 + SIGSEGV in SDCCGlue.c + thanks to RvS + +2008-08-30 Borut Razem + + * support/cpp/libcpp/files.c: SDCPP synchronized with GCC CPP + release version 4.3.2 + +2008-08-24 Raphael Neider + + * device/lib/pic16/configure, device/lib/pic16/configure.ac: + always use the sdcc from the current build tree (ignore $CC from + the environment, fixes compile farm builds) + * device/lib/Makefile.in: rename .a into .lib for compatibility, + remove more build products from install directory + * sdcc/src/pic16/main.c (_pic16_linkEdit,_pic16_finaliseOptions) + * sdcc/support/scripts/sdcc.nsi: revert to .lib extension for libs + +2008-08-24 Borut Razem + + * src/SDCC.y: applied patch + 2050245: Fix # 1963382 + for bug + 1963382: Listing File - C file comment is incorrect + thanks to RvS + +2008-08-23 Borut Razem + + * src/pic16/gen.c: applied patch + 2048464: PIC16: fix genUminus - addresses not.c regression test + thanks Mauro Giachero + +2008-08-22 Borut Razem + + * device/lib/pic16/configure, device/lib/pic16/configure.ac, + src/pic16/main.c: allow spaces in gpasm and gplink paths + +2008-08-15 Philipp Klaus Krause + + * src/z80/peep.c, + * src/z80/peeph-z80.def: minor peephole improvement + +2008-08-15 Raphael Neider + + * src/z80/gen.c (_vemit2): suppress compiler warning + + * src/pic/*.[ch]: make proper use of header files and avoid + ad-hoc extern declarations, mark module-local helpers 'static', + removed dead/replaced code, no functional changes + * src/pic16/pcode.c: disentangled from pic14 backend + +2008-08-14 Philipp Klaus Krause + + * src/z80/gen.c: fixed #2051348 + * support/regression/tests/bug-2051348.c: regression test for #2051348 + +2008-08-10 Raphael Neider + + * configure.in, + * Makefile.common.in: export PACKAGE for $docdir, + fixes #1957036, avoid some "underquoted definition" warnings + * configure: regenerated + +2008-08-10 Raphael Neider + + * device/lib/pic16/**: build pic16 library using autotools for + improved dependency tracking + + * device/lib/Makefile.in, + * src/pic16/main.c, + * support/scripts/sdcc.nsi: adapt to changes in filenames (s/.lib/.a/) + +2008-08-10 Raphael Neider + + * src/pic/pcode.c (ReuseReg): do not overlay the registers used for + local variables if --nooverlay is given, workaround for #2023121 + +2008-08-08 Raphael Neider + + * src/pic16/genarith.c (genAddLit): fix structure access (#1888004) + +2008-08-08 Raphael Neider + + * src/pic/pcoderegs.c, + * src/pic/pcode.c, + * src/pic16/pcode.c: replace own SAFE_snprintf with common SNPRINTF + +2008-08-07 Borut Razem + + * src/SDCCval.c, src/SDCCmain.c, src/SDCC.lex, + device/lib/pic/Makefile.rules, device/lib/ds390/Makefile.in, + device/lib/ds400/Makefile.in, device/lib/hc08/Makefile.in, + support/cpp/libcpp/lex.c, doc/sdccman.lyx: + applied modified patch 2038174: Add support for binary constants v2 + thanks Mauro Giachero + * .version, doc/sdccman.lyx: bumped sdcc version to 2.8.3 + +2008-08-04 Raphael Neider + + * doc/sdccman.lyx, + * src/pic16/device.h, + * src/pic16/glue.c, + * src/pic16/main.c: enable --optimize-goto by default + + * device/lib/pic16/Makefile.common.in: suppress removed option + + * src/pic16/gen.c, + * src/pic16/genutils.c: avoid too long relative branches (#2031890) + +2008-07-30 Borut Razem + + * src/pic16/device.c, src/pic16/glue.c, src/pic16/pcode.c: + applied patch 22032433: PIC16: fix constant strings, + thanks Mauro Giachero + +2008-07-29 Borut Razem + + * src/pic16/gen.c: applied patches: + 2030306: [1/3] PIC16: fix failing rotate.c tests on 16-bit variables, + 2030307: [2/3] PIC16: fix failing rotate.c tests for 32-bit var (1), + 2030310: [3/3] PIC16: fix failing rotate.c tests for 32-bit var (2), + thanks Mauro Giachero + +2008-07-13 Philipp Klaus Krause + + * src/port.h: Fixed typo in comment + +2008-07-12 Philipp Klaus Krause + + * src/z80/mappings.i: Implemented RFE #1919415 + * src/z80/peeph-z80.def: Implemented RFE #1919415, #1861376, + #1880202, #1914434, prepared for RFE #1703943 + +2008-07-12 Philipp Klaus Krause + + * src/z80/peeph.def, + * src/z80/peeph-z80.def, + * src/z80/peeph-gbz80.def: separate Z80 from GBZ80 peepholes in + preparation for Z80 peephole improvements + +2008-06-21 Raphael Neider + + * device/include/pic16/pic18f66j60.h, + * device/include/pic16/pic18f66j65.h, + * device/include/pic16/pic18f67j60.h, + * device/include/pic16/pic18f86j60.h, + * device/include/pic16/pic18f86j65.h, + * device/include/pic16/pic18f87j60.h, + * device/include/pic16/pic18f96j60.h, + * device/include/pic16/pic18f96j65.h, + * device/include/pic16/pic18f97j60.h, + * device/lib/pic16/libdev/pic18f66j60.c, + * device/lib/pic16/libdev/pic18f66j65.c, + * device/lib/pic16/libdev/pic18f67j60.c, + * device/lib/pic16/libdev/pic18f86j60.c, + * device/lib/pic16/libdev/pic18f86j65.c, + * device/lib/pic16/libdev/pic18f87j60.c, + * device/lib/pic16/libdev/pic18f96j60.c, + * device/lib/pic16/libdev/pic18f96j65.c, + * device/lib/pic16/libdev/pic18f97j60.c, + * device/include/pic16/pic16devices.txt, + * device/include/pic16/pic18fregs.h, + * device/lib/pic16/pics.all: added new devices + + * device/include/pic16/adc.h, + * device/lib/pic16/libio/adc/adcbusy.c, + * device/lib/pic16/libio/adc/adcopen.c, + * device/lib/pic16/libio/adc/adcsetch.c, + * device/lib/pic16/libio/i2c/i2copen.c, + * device/lib/pic16/libio/usart/uopen.c: adapted to new devices, + all changes from a patch by Anton Strobl + +2008-06-12 Borut Razem + + * sim/ucsim/cmd.src/info.cc, sim/ucsim/cmd.src/bp.cc, + sim/ucsim/xa.src/xa.cc, sim/ucsim/xa.src/xacl.h, + sim/ucsim/z80.src/z80cl.h, sim/ucsim/z80.src/z80.cc, + sim/ucsim/sim.src/uc.cc, sim/ucsim/sim.src/uccl.h, + sim/ucsim/hc08.src/hc08.cc, sim/ucsim/hc08.src/hc08cl.h, + sim/ucsim/s51.src/uc51cl.h, sim/ucsim/s51.src/uc390.cc, + sim/ucsim/s51.src/uc51.cc, sim/ucsim/s51.src/uc390cl.h, + sim/ucsim/avr.src/avrcl.h, sim/ucsim/avr.src/avr.cc: + fixed bug 1990586: s51 simulator, uc::disass() unimplemented + by applying the modified patch from Risto Huotari + +2008-06-04 Maarten Brock + + * .version, + * doc/sdccman.lyx: bumped sdcc version to 2.8.2 + * src/ds390/gen.c (aopPutUsesAcc, genAddrOf): fixed bug 1015185 + * src/mcs51/gen.c (genNearPointerGet, genNearPointerSet): fixed bug 1938300 + * support/regression/tests/bug1938300.c: new, added + +2008-06-03 Maarten Brock + + * device/include/asm/ds390/features.h, + * device/include/asm/mcs51/features.h, + * device/include/mcs51/regc515c.h: inserted LGPL notice + +2008-05-29 Maarten Brock + + * device/lib/gbz80/div.s, + * device/lib/z80/div.s: fixed bug 1904314 by applying a modified part of + patch 1597883, Thanks Robert Ramey + +2008-05-29 Maarten Brock + + * src/SDCCast.c (createIvalType, createIvalStruct, createIvalArray, + createIvalCharPtr, createIvalPtr, createIval), + * src/SDCCval.h + * src/SDCCval.c (convertIListToConstList, list2expr): handle incomplete + initializers for local auto variables + * support/regression/tests/zeropad.c: added testcase for auto initializers + +2008-05-26 Raphael Neider + + * device/lib/pic16/startup/crt0.c, + * device/lib/pic16/startup/crt0i.c, + * device/lib/pic16/startup/crt0iz.c: clean up, make use of access bank + explicit, fixed curr_entry loop for >= 256 initializer records, + removed debug code (write to 0xf7e) + +2008-05-25 Raphael Neider + + * device/include/pic/pic16f627a.h, + * device/include/pic/pic16f628a.h, + * device/include/pic/pic16f648a.h: added missing ports + +2008-05-20 Maarten Brock + + * device/include/float.h: added __INFINITY + * device/lib/_fsadd.c: handle overflows + * device/lib/_fsmul.c, + * device/lib/_fsdiv.c: use __INFINITY + * device/lib/_fseq.c, + * device/lib/_fsneq.c: handle -0.0 + * sim/ucsim/s51.src/uc89c51r.cc, + * sim/ucsim/s51.src/uc89c51rcl.h: fixed bug 1385430 + * sim/ucsim/sim.src/hwcl.h: */* confuses VC + * src/mcs51/gen.c (genSend): fixed bug with --xstack + * support/regression/ports/mcs51-xstack-auto/spec.mk: print floats + * support/regression/tests/snprintf.c: test bug with --xstack + +2008-05-19 Philipp Klaus Krause + + * src/SDCCpeeph.c (callFuncByName): + Support nested parenthesis in peephole function arguments (#1967300) + +2008-05-19 Raphael Neider + + * src/pic16/gen.c (pic16_emitpLabel,pic16_emitpLabelFORCE): + fixed duplicate labels (#1911325) + +2008-05-19 Raphael Neider + + * src/regression/empty.c: suppress warning + * src/regression/pointer1.c: enabled index_by_pointer() + * src/regression/inline.c: now works for pic16 as well + + * src/pic16/device.c: include dbuf declarations + * src/pic16/device.h: removed obsolete prototypes + + * src/pic16/gen.c, src/pic16/gen.h: moved generic pointer tags + * src/pic16/glue.c: made purely local functions static, + (pic16_printGPointerType, pic16_printIvalCharPtr, + pic16_printIvalFuncPtr, pic16_printIvalPtr): fixed initialized + generic pointers' tags (#1961866) + + * src/pic16/pcode.c (assignValnums): optimize literal assignments + +2008-05-19 Borut Razem + + * support/scripts/sdcc.nsi: remove uninstall.exe after uninstallation, + fixed typo, uninstall include/pic16/pic16devices.txt + +2008-05-18 Borut Razem + + * support/Utils/dbuf_string.[ch]: added dbuf_chomp(), + the buffer is null terminated + * src/device/pic16.c: + applied modified patch 1965676: Patch for Win32 16 bit PIC + * sdcc_vc_in.h: defined YY_NO_UNISTD_H + +2008-05-16 Maarten Brock + + * src/SDCC.lex (check_type), + * src/SDCC.y (type_specifier2 TYPE_NAME): fixed bug 1925942 + * as/hc08/clean.mk, + * as/mcs51/clean.mk, + * as/z80/clean.mk: also clean *.dep + * device/lib/pic16/libsdcc/stack/Makefile, + * sim/ucsim/libtool: removed as they are rebuild by configure + * src/clean.mk: removed izt, so Makefile is not deleted for distclean + +2008-05-13 Maarten Brock + + * src/SDCCast.c (fixupInline, createFunction): save currBlockno in + fixupInline instead of createFunction to fix bug 1864577 + (inlineFindMaxBlockno): removed, use global blockNo + * src/SDCCglobl.h: added blockNo + * src/z80/peep.c, + * src/z80/peep.h: modified properties + * support/regression/tests/bug1864577.c: new, added + +2008-05-07 Maarten Brock + + * as/mcs51/asdata.c, + * as/mcs51/asm.h: added org_cnt + * as/mcs51/asmain.c (main, asmbl): fixed bug 1957716, changed old K&R to ANSI + * as/mcs51/asout.c: changed old K&R to ANSI + * as/mcs51/Makefile.in: use common identifiers + * as/hc08/asdata.c, + * as/hc08/asexpr.c, + * as/hc08/asm.h, + * as/hc08/asmain.c, + * as/hc08/asout.c, + * as/hc08/Makefile.bcc, + * as/hc08/Makefile.in: synchronized with as/mcs51/* + * sdcc_vc_in.h: added define __func__ + * src/SDCCast.c (expandInlineFuncs): applied patch 1957148 to fix bug 1717305, + Thanks Ruud van Silfhout + * support/regression/tests/bug1717305.c: new, added + +2008-05-05 Borut Razem + + * support/regression/Makefile.in, + support/regression/ports/ds390/spec.mk, + support/regression/ports/hc08/spec.mk, + support/regression/ports/mcs51-common/spec.mk, + support/regression/ports/pic14/spec.mk, + support/regression/ports/pic16/spec.mk, + support/regression/ports/ucz80/spec.mk, + support/regression/ports/z80/spec.mk: + added INC_DIR and LIBDIR paths + * src/ds390/gen.c: removed duplicated selicolon + +2008-05-04 Borut Razem + + * support/regression/Makefile.in, + support/regression/fwk/lib/testfwk.c, + support/regression/ports/ds390/spec.mk, + support/regression/ports/hc08/spec.mk, + support/regression/ports/mcs51-common/spec.mk, + support/regression/ports/mcs51-large/spec.mk, + support/regression/ports/mcs51-medium/spec.mk, + support/regression/ports/mcs51-small/spec.mk, + support/regression/ports/mcs51-stack-auto/spec.mk, + support/regression/ports/mcs51-xstack-auto/spec.mk, + support/regression/ports/pic14/spec.mk, + support/regression/ports/pic16/spec.mk, + support/regression/ports/ucz80/spec.mk: + added possibility to define the sdcc binary directory SDCC_BIN_PATH + used to run regeression tests + +2008-05-01 Raphael Neider + + * doc/sdccman.lyx, support/scripts/inc2h-pic16.pl: updated list of + supported devices and instructions to add new ones + +2008-05-01 Raphael Neider + + * device/include/pic16/adc.h, + device/lib/pic16/libio/adc/adcbusy.c, + device/lib/pic16/libio/adc/adcopen.c, + device/lib/pic16/libio/adc/adcsetch.c: support old 18f242 and new + 18f2455 style ADC devices, based on patch #1776197 + * device/lib/pic16/libio/adc/adcclose.c, + device/lib/pic16/libio/adc/adcconv.c, + device/lib/pic16/libio/adc/adcread.c: cosmetic changes + * device/include/pic16/{pic18f2331.h,pic18f2431.h}, + device/lib/pic16/libdev/{pic18f2331.c,pic18f2431.c}: reuse 18f4331 + * device/include/pic16/pic18f4431.h, + device/lib/pic16/libdev/pic18f4431.c: remove outdated comments + * device/lib/pic16/libio/adc.ignore: forbid unhandled devices + +2008-05-01 Raphael Neider + + * src/pic16/device.h: removed unused field PIC16_device.sfrRange, + moved xinst flag into pic16_options_t + * src/pic16/device.c (default_device, pic16_list_devices, + pic16_find_device): removed references to sfrrange + * src/pic16/gen.c (genFunction), + src/pic16/glue.c (pic16initialComments), + src/pic16/main.c (pic16_optionsTable), + src/pic16/ralloc.c (newReg, pic16_writeUsedRegs): updated references + to xinst + * device/include/pic16/pic16devices.txt: removed sfrrange lines + +2008-04-29 Raphael Neider + + * src/pic16/devices.inc, + device/include/pic16/pic16devices.txt: replaced compiled-in list + of devices with a variant parsed at runtime + * src/pic16/device.c: added support for parsing pic16devices.txt, + clean up + * src/pic16/device.h: removed (now) unused fields from PIC_device + * src/pic16/main.c: removed #pragma maxram, + (_pic16_initPaths): removed bogus generation of search paths, + setup the port proper only after the search paths (for + pic16devices.txt) are set up, + (_pic16_finaliseOptions): moved processor dependant code here + from _pic16_initPaths(), clean up + * src/pic16/ralloc.c (pic16_init_stack), + * src/pic16/ralloc.h, + * src/pic16/pcode.c: clean up + * device/include/Makefile.in, + support/scripts/sdcc.nsi: also install/package pic16devices.txt + * support/scripts/inc2h-pic16.pl: updated instructions + +2008-04-29 Raphael Neider + + * device/include/pic16/{pic18f2480.h, pic18f2580.h, pic18f4423.h, + pic18f4480.h, pic18f4523.h, pic18f4580.h, pic18f6585.h, pic18f8585.h}, + device/lib/pic16/libdev/{pic18f2480.c, pic18f2580.c, pic18f4423.c, + pic18f4480.c, pic18f4523.c, pic18f4580.c, pic18f6585.c, pic18f8585.c}: + added missing family members and 18f2480/2580/4480/4580 family + * device/include/pic16/{pic18f2423.h, pic18f2523.h}: use 18f4523.h + * device/include/pic16/pic18f2525.h: use 18f4620.h + * device/include/pic16/pic18f6680.h: use 18f8680.h + * device/include/pic16/pic18fregs.h, + device/lib/pic16/pics.all, + src/pic16/devices.inc: add new devices + * device/lib/pic16/libdev/{pic18f2423.c, pic18f2523.c}: use 18f4523.c + * device/lib/pic16/libdev/pic18f2525.c: use 18f4620.c + * device/lib/pic16/libdev/pic18f6680.c: uso 18f8680.c + * device/lib/pic16/libio/{adc.ignore, i2c.ignore, usart.ignore}: + prevent attempting to build the libio for some new devices + +2008-04-29 Raphael Neider + + * debugger/mcs51/Makefile.in: fixed paths to sources + +2008-04-25 Borut Razem + + * as/link/lklibr.c: moved from as/link/z80/lklibr.c + * as/link/hc08/lklibr.c, as/link/mcs51/lklibr.c: deleted + * as/link/hc08/Makefile.bcc, as/link/hc08/Makefile.in, + * as/link/hc08/link_hc08.dsp, as/link/mcs51/Makefile.bcc, + as/link/mcs51/Makefile.in, as/link/mcs51/aslink.dsp, + as/link/z80/Makefile.in, as/link/z80/linkgbz80.dsp, + as/link/z80/linkz80.dsp: lklibr.c moved + * doc/INSTALL.txt: binary archives in bz2 format + * support/cpp/auto-host_vc_in.h: CPP2 replaced with CPP + +2008-04-23 Maarten Brock + + * src/SDCCglue.c (printIvalType, printIvalBitFields): fixed bug 1856409 + * support/regression/tests/bug1856409.c: new, added + +2008-04-20 Maarten Brock + + * src/z80/peep.c, + * src/mcs51/peep.c: Use werror for error messages. + * src/SDCCicode.c (geniCodeConditional), + * src/SDCCsymt.c (structElemType): fixed bug 1839321 + * src/z80/Makefile.bcc, + * src/z80/z80.dsp: added src/z80/peep.c/h + * support/regression/tests/bug1839321.c: new, added + +2008-04-20 Raphael Neider + + * device/include/pic16/pic18f2455.h: added bitfields for port C + +2008-04-20 Philipp Klaus Krause + + * src/z80/peep.c: Use werror for error messages. + +2008-04-19 Philipp Klaus Krause + + * src/z80/peep.h (declaration of notUsed()), + * src/z80/main.c (enabled notUsed() for z80 port, documented z80_port + struct), + * src/z80/z80.h (added dependency on peep.h), + * src/z80/peep.c (definition of notUsed()): Implemented RFE #1880202 + for Z80. + +2008-04-19 Philipp Klaus Krause + + * src/SDCCpeeph.c (added support for notUsed()), + * src/mcs51/main.c (added dependency on peep.h, documented mcs51_port + struct), + * src/port.h (removed dependency on mcs51/peep.h, added declaration + for notUsed()): Implemented generic (that is not port-specific) part + of RFE #1880202. + +2008-04-17 Maarten Brock + + * as/link/mcs51/lkmem.c (summary2): fixed bug 1796077 + * device/lib/libsdcc.lib, + * device/lib/Makefile.in, + * support/regression/ports/mcs51-xstack-auto/spec.mk, + * device/lib/calloc.c: renamed to _calloc.c + * device/lib/free.c: renamed to _free.c + * device/lib/malloc.c: renamed to _malloc.c + * device/lib/realloc.c: renamed to _realloc.c + * src/ds390/gen.c (aopGet, aopPut, genPlusBits, genDataPointerSet, + genNearPointerSet, genPagedPointerSet): synchronized with mcs51/gen.c + * src/ds390/gen.c (popForBranch, genIfxJump, genCmp, genCmpEq, ifxForOp, + genAnd, genOr, genXor, genIfx, gen390Code): fixed bug 1509084 + * src/mcs51/gen.c (popForBranch, genIfxJump, genCmp, genCmpEq, + ifxForOp, genAnd, genOr, genXor, genNearPointerGet, + genPagedPointerGet, genFarPointerGet, genCodePointerGet, + genGenPointerGet, genIfx, gen51Code): fixed bug 1509084 + * src/ds390/gen.c, + * src/mcs51/gen.c: throughout cosmetic changes for syncing both + * src/SDCCsymt.h: updated IS_OP_RUONLY, IS_OP_ACCUSE + * support/regression/tests/bug1509084.c: new, added + +2008-04-14 Maarten Brock + + * device/include/mcs51/cc2510fx.h: added _XPAGE + * device/include/mcs51/compiler.h: cosmetic changes + +2008-03-31 Maarten Brock + + * sdcc.dsw: adapted for moved cpp2, added dependency for as_z80 on + config + +2008-03-31 Borut Razem + + * support/cpp2 renamed to support/cpp + * support/cpp2/libiberty/filenames.h, support/cpp2/libiberty/hex.c, + support/cpp2/libiberty/splay-tree.c, + support/cpp2/libiberty/splay-tree.h, support/cpp2/libcpp/macro.c, + support/cpp2/libcpp/directives.c, + support/cpp2/libcpp/include/cpplib.h, + support/cpp2/libcpp/include/symtab.h, + support/cpp2/libcpp/include/line-map.h, + support/cpp2/libcpp/line-map.c, support/cpp2/libcpp/files.c, + support/cpp2/libcpp/init.c, support/cpp2/libcpp/traditional.c, + support/cpp2/libcpp/expr.c, support/cpp2/libcpp/internal.h, + support/cpp2/libcpp/lex.c, support/cpp2/libcpp/system.h, + support/cpp2/libcpp/charset.c: SDCPP synchronized with GCC CPP + release version 4.3.0 + * configure.in, configure, Makefile.in, Makefile.bcc: + adapted for moved cpp2 + +2008-03-31 Frieder Ferlemann + + * device/include/hc08/mc68hc908jkjl.h: committed fix for bug #1929739, + thanks Alejandro Pustowka + +2008-03-30 Maarten Brock + + * src/SDCCloop.c (loopInvariants): applied fix for bug 1717943, thanks + Robert Larice + * support/regression/tests/bug1717943.c: new, added + +2008-03-30 Philipp Klaus Krause + + * src/z80/gen.c (assignResultValue): Reverted reversal of order of + bytewise return value assignments introduced in last commit. + +2008-03-30 Philipp Klaus Krause + + * src/z80/gen.c (emitDebug, assignResultValue, genPlus, genMinus, + genMult, genJumpTab): + Use 16-bit instructions for addition in some additional cases, + implemented RFEs #1914251, #1914245, #1922090, #1921382, #1918323. + +2008-03-30 Philipp Klaus Krause + + * src/z80/ralloc.c (serialRegAssign, allocReg, tryAllocatingRegPair): + Implemented RFE #1921450, changed some debug messages. + +2008-03-30 Borut Razem + + * Small Device C Compiler 2.8.0 released + * .version, doc/sdccman.lyx: changed sdcc version to 2.8.1 + * support/scripts/sdcc.nsi: added finish page; this version + was used for 2.8.0 release + * doc/knownbugs.html: removed; magically generated by the build + process using gen_known_bugs.pl from now on + +2008-03-23 Borut Razem + + * src/pic/gen.h: Q&D solution for the bug, found by Jim Paris + and reverted it, since it was already fixed by Raphael ;-) + * doc/knownbugs.html: updated for RC2 + +2008-03-22 Raphael Neider + + * src/SDCCicode.c (getPtrType): avoid unnecessary extra assignments + for PIC16 targets + +2008-03-22 Maarten Brock + + * src/mcs51/gen.c (adjustArithmeticResult): fixed bug 1839299 + * support/regression/tests/bug1839277.c: added related testBug1839299 + +2008-03-21 Maarten Brock + + * src/ds390/gen.c (opIsGptr, adjustArithmeticResult, genAddrOf, genAssign), + * src/mcs51/gen.c (opIsGptr, adjustArithmeticResult, genAddrOf, genAssign): + fixed bug 1839277 + * src/mcs51/gen.c: throughout only output hex constants + * src/SDCCicode.c (getPtrType, geniCodeCast): fixed code size regression + * support/regression/tests/bug1839277.c: new, added + +2008-03-21 Philipp Klaus Krause + + * src/z80/ralloc.c (callFuncByName): Used // instead of /**/ to fix + compilation warning about nested comments. + +2008-03-20 Maarten Brock + + * src/SDCCsymt.c (comparePtrType): fixed bug 1921073 + * support/regression/tests/bug1921073.c: new, added + +2008-03-17 Philipp Klaus Krause + + * src/z80/SDCCpeeph.c.c (callFuncByName): + Commented function parameters. + +2008-03-17 Philipp Klaus Krause + + * src/z80/ralloc.c (packRegsForAccUse2): + disabled a broken accumulator packing optimization (fixed #1292721). + * support/regression/tests/bug-1292721: Regression test for #1292721. + +2008-03-16 Raphael Neider + + * src/pic/gen.c (SetIrp,genNearPointerGet,genNearPointerSet): + fixed code bloat regression using a variant of patch #1915618 + +2008-03-16 Borut Razem + + * support/scripts/sdcc.nsi: added section debugging macros, added SDCC + icon, changed startup menu for release distribution, code cleaning, + create url files instead links in startup menu + +2008-03-16 Maarten Brock + + * src/SDCCcse.c (algebraicOpts): fixed bug 1579949 + * support/regression/tests/bug1579949.c: new, added + +2008-03-14 Paul Stoffregen + + * device/lib/printf_fast.c: fixed bug 1255403 + +2008-03-14 Maarten Brock + + * doc/sdccman.lyx: enhanced paragraph about bankswitching for mcs51 + * src/cdbFile.c (cdbWriteBasicSymbol): fixed bug 1909409 for locals + +2008-03-14 Borut Razem + + * as/doc/asmlnk.doc, as/doc/asxhtm.html: updated link-xx and aslink + command line options + * as/link/hc08/lkmain.c: converted tabs to spaces so that the usage + is correctly displayed + * as/link/z80/lkmain.c: usage line commented out + +2008-03-13 Borut Razem + + * doc/sdccman.lyx: corrected to be able to convert to PDF, + updated the list pf supported pic14 devices + +2008-03-12 Maarten Brock + + * doc/sdccman.lyx: added paragraph about bankswitching for mcs51 + +2008-03-12 Borut Razem + + * as/doc/asmlnk.doc, as/doc/asxhtm.html: updated command line options, + fixed documentation request #1718191 + * as/hc80/asmain.c, as/mcs51/asmain.c: added option -c to usage + * doc/sdccman.lyx: added description of --no-std-crt0 gbz80 + command line option + +2008-03-10 Maarten Brock + + * src/SDCCast.c (isConformingBody): fixed bug 1505811, thanks Robert Larice + * support/regression/tests/bug1505811.c: new, added + +2008-03-09 Raphael Neider + + * device/include/pic16/pic18f2620.h, + * device/include/pic16/pic18f4620.h, + * device/lib/pic16/libdev/pic18f2620.c, + * device/lib/pic16/libdev/pic18f4525.c, + * device/lib/pic16/libdev/pic18f4620.c: merged 18f2525/2620/4525/4620 + family to consistently use pic18f4620.[ch], fixes #1832562 + +2008-03-09 Borut Razem + + * .version, sdcc.spec, doc/sdccman.lyx, doc/INSTALL.txt: + changed sdcc version to 2.8.0 + * knownbugs.html: regenerated + * support/scripts/gen_known_bugs.pl: added number of open bugs + +2008-03-09 Raphael Neider + + * src/pic16/gen.c (pic16_mov2w_volatile): NEW, read volatile operands, + (genOr): read volatile operand even if the result is known, + closes #1511838 + (genOr,genXor): removed unused legacy code, + (genDummyRead): use pic16_mov2w_volatile() + +2008-03-08 Borut Razem + + * src/SDCCglue.c: fixed bug #1864582: multiple definition of char + cons w. --model-large + * support/regression/staticinit.c: added regression test for bug + #1864582 + +2008-03-08 Maarten Brock + + * src/ds390/gen.c (pushSide, genPcall), + * src/hc08/gen.c (pushSide, genPcall): synchronized with mcs51 + * src/mcs51/gen.c: cosmetic changes + * support/regression/fwk/include/testfwk.h: added macro reentrant + * support/regression/tests/bug1908493.c: new, added + +2008-03-08 Jesus Calvino-Fraga + + * src/SDCCdebug.c:, as/link/lkaomf51.c: Fixed bug 1909409: Pdata in OMF file + +2008-03-08 Maarten Brock + + * src/mcs51/gen.c (pushSide, genPcall): fixed bug 1908493 + * src/SDCCmain.c (preProcess): removed -DSDCC_PARMS_IN_BANK1 because it is + already set in ds390/main.c and mcs51/main.c + +2008-03-07 Raphael Neider + + * src/regression/init0.c: new test for initialized arrays of function + pointers + * src/regression/Makefile: made a bit more flexible, added init0.c + * src/pic/glue.c (emitIvals): hacky fix for initializing from function + pointers, closes #1427663 + +2008-03-05 Borut Razem + + * dos/sdccman.lyx: docummented predefined macros SDCC_REVISION, + SDCC_PARMS_IN_BANK1, SDCC_FLOAT_REENT and SDCC_INT_LONG_REENT + +2008-03-05 Jesus Calvino-Fraga + + * support/librarian/sdcclib.c:Added feature request 1908061: + Synchronise sdcclib commands with ar. + +2008-03-04 Frieder Ferlemann + + * src/SDCCmain.c: added predefined macros SDCC_REVISION (RFE #1907229), + and (depending on corresponding compiler option) SDCC_PARMS_IN_BANK1, + SDCC_FLOAT_REENT, SDCC_INT_LONG_REENT + * device/include/mcs51/compiler.h: removed umlauts, added double + underscore + +2008-03-04 Maarten Brock + + * src/SDCCptropt.c (ptrPseudoSymConvert): fixed bug 1536762 + * support/regression/tests/bug1536762.c: new, added + * src/SDCCutil.c, + * src/SDCCutil.h: added getBuildDate() + * src/SDCCmain.c (printVersionInfo), + * src/SDCCglue.c (initialComments): use getBuildDate() instead of + __DATE__ + * src/*/ralloc.c: removed IS_OP_RUONLY macro + * src/ds390/ralloc.c (packRegisters), + * src/mcs51/ralloc.c (packRegisters), + * src/z80/ralloc.c (packRegisters): applied fix for bug 1618050, thanks + Robert Larice + * support/regression/tests/bug1618050.c: new, added + * src/SDCCsymt.h: fixed typo in DECLSPEC2TXT + * support/regression/fwk/include/testfwk.h, + * support/regression/tests/bug1838000.c: moved _AUTOMEM and _STATMEM to + testfwk.h + +2008-03-04 Raphael Neider + + * src/pic/gen.c: removed unused prototypes, prevent internal errors + on accessing OP_SYM_TYPE(op) + * src/pic/gen.h: removed unused prototype of genMinusDec() + * src/pic/genarith.c (genMinus): cosmetic changes, rewritten to + fix #1876953 (invalid subtraction code), removed unused code + +2008-03-03 Raphael Neider + + * src/pic/gen.c, + * src/pic/gen.h, + * src/pic/genarith.c, + * src/pic/ralloc.c, + * src/pic/ralloc.h: removed AOP_R0, AOP_R1, AOP_DPTR, AOP_DPTR2, + AOP_ACC, and *_IDX and adjusted code, removed unused legacy code + +2008-03-03 Raphael Neider + + * src/pic/device.c (find_device): search user-specified paths first + for pic14devices.txt, fixes #1900827 + +2008-03-02 Borut Razem + + * support/scripts/sdcc.nsi: fixed bug in IsNT, LogicLib-isation of + AddToPath and RemoveFromPath + +2008-03-01 Borut Razem + + * support/scripts/sdcc.nsi: reverted MULTIUSER page since it didn't + work correctly, added debugging support if -DSDCC.DEBUG command line + option is defined + +2008-02-28 Borut Razem + + * doc/sdccman.lyx: cosmetic changes + +2008-02-28 Maarten Brock + + * src/mcs51/ralloc.c (fillGaps): fixed bug 1839671 + * doc/sdccman.lyx: fixed unmeant removal of spaces + +2008-02-27 Borut Razem + + * support/scripts/sdcc.nsi: corrected installation directory for + current user installation mode + * doc/README.txt: added Philipp Klaus Krause to the developers list + +2008-02-27 Maarten Brock + + * src/mcs51/gen.c (genUnpackBits): don't generate ifxJump, instead + return ifx condition + (genNearPointerGet, genPagedPointerGet, genFarPointerGet, + genCodePointerGet, genGenPointerGet): cleanup aop before generating + ifxJump to fix bug 1838000 + * src/SDCCsymt.c (aggregateToPointer): fix problem for xstack + * support/regression/tests/bug1838000.c: new, added + * device/include/mcs51/cc1110.h: new, added, thanks to Pravin Angolkar + +2008-02-26 Borut Razem + + * src/SDCCast.c, doc/sdccman.lyx: fixed RFE #1901171: inerger promotion + of casted varargs + * support/scripts/sdcc.nsi: added MULTIUSER page, + NSIS upgraded to version 2.35 + +2008-02-25 Maarten Brock + + * src/mcs51/ralloc.c (isSpiltOnStack): fixed bug 1565152 + * support/regression/tests/bug1565152.c: new, added + +2008-02-25 Maarten Brock + + * src/mcs51/gen.c (genPagedPointerSet): fixed bug 1670148 + * support/regression/ports/mcs51-xstack-auto/spec.mk: added expf.c + * support/regression/tests/bug1670148.c: new, added + +2008-02-25 Jesus Calvino-Fraga + + * device/include/mcs51/at89c51ed2.h: fixed bug 1901469. + +2008-02-24 Borut Razem + + * src/SDCCast.c, src/SDCCast.h: fixed bug #1874922: explicit typecast + is ineffective for unsigned char parameter + +2008-02-24 Maarten Brock + + * src/SDCCast.c (expandInlineFuncs): fixed bug 1875869 + * src/SDCCglue.c (printIvalBitFields): fixed bug 1806631 + * support/regression/tests/bitopcse.c: removed hc08 exception, see testfwk.h + * support/Util/MySystem.c (my_system): output errorcode when verbose + +2008-02-22 Philipp Klaus Krause + + * src/z80/gen.c (genMult): Rewrote 8-bit multiplication by constant, + implements #1898231 + +2008-02-22 Philipp Klaus Krause + + * device/lib/z80/mul.s: Rewrote __muluchar_rrx_s, to improve 8-bit mult., + implements #1896290 + +2008-02-22 Maarten Brock + + * src/SDCCast.c (createIvalStruct): fixed bug 1466761 + +2008-02-21 Borut Razem + + * support/regression/Makefile.in, + support/regression/ports/ds390/spec.mk, + support/regression/ports/hc08/spec.mk, + support/regression/ports/mcs51-common/spec.mk, + support/regression/ports/pic14/spec.mk, + support/regression/ports/pic16/spec.mk, + support/regression/ports/ucz80/spec.mk, + support/regression/ports/xa51/spec.mk: + added CFLAGS when compiling timeout + +2008-02-20 Philipp Klaus Krause + + * support/regression/tests/bugs-1596270-1736867.c: Regression test for + #1596270, #1736867 + +2008-02-20 Maarten Brock + + * src/SDCClrange.c (findPrevUse): fixed bug 1888147 + * support/regression/tests/bug1888147.c: new, added + +2008-02-20 Philipp Klaus Krause + + * src/z80/gen.c: fixed bugs #1596270, #1736867 + +2008-02-20 Philipp Klaus Krause + + * src/z80/gen.c: fixed bug in register pair loading when swapping register + contents, mostly fixes #1596270 + +2008-02-20 Philipp Klaus Krause + + * src/z80/peeph.def, + * src/z80/peeph-z80.def: moved peephole that breaks gbz80 to z80-specific + peepholes, fixes #1806565 + +2008-02-20 Maarten Brock + + * src/SDCCpeeph.c (operandBaseName): added check for @Ri + * src/mcs51/peeph.def (rule 177.c): added operandsNotRelated(%1 %3) + fixes bug 1739475, thanks Robert Larice + (rule 271): new, added + +2008-02-18 Borut Razem + + * sim/ucsim/s51.src/Makefile.in: fixed error made in previous commit + +2008-02-17 Maarten Brock + + * src/SDCCmain.c (linkEdit): emit -z when using --debug for z80 + +2008-02-17 Raphael Neider + + * src/pic16/genarith.c, + * src/pic16/gen.c, + * src/pic16/gen.h, + * src/pic16/genutils.c: removed unused legacy code, + removed unused fields from struct asmop and struct _G + +2008-02-17 Raphael Neider + + * src/pic16/gen.c (AccRsh): cosmetic changes, + (shiftR1Left2ResultSigned,shiftR1Left2Result,shiftL1Left2Result, + genRightShiftLiteral): fixed to work with SFRs as result by + assigning only once to result, + removed a lot of unused/excluded code fragments + +2008-02-17 Raphael Neider + + * device/include/pic/pic16f88.h, + * device/include/pic/pic16f886.h, + * device/include/pic/pic16f887.h: added TRISA6 and TRISA7 + +2008-02-17 Borut Razem + + * src/z80/peeph.def: applied patch + #1893626: Optimize tail calls on Z80, thanks to Philipp Krause + * src/z80/gen.c, src/z80/peeph.def: applied patch + #1893510: Improve logical left shift on Z80, thanks to Philipp Krause + * sim/ucsim/avr.src/Makefile.in, sim/ucsim/hc08.src/Makefile.in, + sim/ucsim/s51.src/Makefile.in, sim/ucsim/sim.src/Makefile.in, + sim/ucsim/xa.src/Makefile.in, sim/ucsim/z80.src/Makefile.in, + sim/ucsim/main_in.mk: renamed libutil.a to libucsimutil.a in order to + enable compilation on Mac OS X 10.5 (Leopard) and XCode v3.0 + +2008-02-16 Maarten Brock + + * as/link/mcs51/aslink.dsp: removed SDK define + * as/link/z80/clean.mk: brought in sync with other ports + * as/link/z80/lklibr.c (SdccLib, fndsym): handle the dflag here too + * as/hc08/Makefile.bcc, + * as/mcs51/Makefile.bcc, + * as/z80/Makefile.bcc: noice.c was moved to as/asxxsrc/ + * src/z80/main.c (_setValues): use the now capitalized -Z, + (z80_port, gbz80_port): generate debug information when asked + +2008-02-16 Borut Razem + + * as/z80/asmain.c, as/z80/asm.h, as/z80/asdata.c, + as/link/z80/lkmain.c, as/z80/as_gbz80.dsp, as/z80/as_z80.dsp, + as/z80/Makefile.in. as/z80/Makefile.bcc: + applied patch #1893393: patch for as-z80 and link-z80 to generate + cdb, thanks to Armin Diehl + * as/*/asnoice.c, as/hc08/as_hc08.dsp, as/hc08/Makefile.in, + as/mcs51/asx8051.dsp, as/mcs51/Makefile.in: + asnoice.c moved to as/asxxsrc/asnoice.c + * src/z80/peeph-gbz80.def: applied patch + #1880235: Z80 return peephole, thanks to Philipp Krause + +2008-02-14 Maarten Brock + + * .version, + * doc/sdccman.lyx: bumped version to 2.7.5 + * src/SDCCsymt.c (compareType, comparePtrType): fixed bug 1281583 + +2008-02-13 Maarten Brock + + * device/include/pic16/stdlib.h, + * device/lib/pic16/libc/stdlib/ltoa.c, + * device/lib/pic16/libc/stdio/vfprintf.c: ascii strings are char* + +2008-02-13 Borut Razem + + * src/SDCCmain.c, src/SDCCglue.c: fixed --c1mode + * src/pic16/glue.c, src/SDCCast.c, src/SDCCast.h, src/SDCCBBlock.c, + src/SDCCcse.c, src/SDCCglue.c, src/SDCCicode.c, src/SDCCloop.c, + src/SDCCopt.c, src/SDCCval.c: + fixed bug #1890273: SDCC Warning 154 shows wrong filename + +2008-02-12 Maarten Brock + + * src/SDCCsymt.c (compareType): fixed bug 1309013 + +2008-02-09 Borut Razem + + * src/SDCCval.c, src/SDCCval.h: + code cleaning, added function constChrVal() + * src/SDCCglue.c, src/pic/glue.c, src/pic16/glue.c, src/SDCCast.c, src/SDCC.y: + call constChrVal() instead constVal() + +2008-02-01 Maarten Brock + + * src/SDCCast.c (resolveSymbols): added reentrancy check for parameters + of function pointer + * src/SDCCerr.h, + * src/SDCCerr.c: changed warning W_NONRENT_ARGS to error E_NONRENT_ARGS + * support/regression/tests/absolute.c: added TestStruct TestVar (see also + bug 1859853) + +2008-02-01 Raphael Neider + + * device/include/pic/pic16f886.h, + * device/include/pic/pic16f887.h: added RA6 and RA7 + +2008-01-24 Raphael Neider + + * device/include/pic/pic16f88.h: added RA6 and RA7 + * device/lib/pic/libdev/disabled_pic16f886.c, + * device/lib/pic/libdev/disabled_pic16f887.c: renamed and enabled + + * src/pic16/devices.inc, + * device/include/pic16/pic18f2423.h, + * device/include/pic16/pic18f2523.h, + * device/include/pic16/pic18fregs.h, + * device/lib/pic16/pics.all + * device/lib/pic16/libdev/pic18f2423.c, + * device/lib/pic16/libdev/pic18f2523.c: added 18f2423 and 18f2523 + * device/lib/pic16/libio/i2c.ignore, + * device/lib/pic16/libio/usart.ignore, + * device/lib/pic16/libio/adc.ignore: ignore new devices + +2008-01-23 Maarten Brock + + * src/SDCCast.c (createRMW): fixed bug 1582651 + +2008-01-20 Borut Razem + + * src/SDCCcse.c: partially fixed enhancement request + #1793872 - multiply by -1 not collapsed + * support/regression/tests/arithcsi.c: added regression test + +2008-01-19 Maarten Brock + + * as/mcs51/asx8051.dsp: removed define SDK + * as/mcs51/i51mch.c (machine): fixed bug 1865114 + * device/include/asm/ds390/features.h: fixed bug with ds390 & stack-auto + * as/link/lklex.c, + * as/link/mcs51/lkmain.c: used LKDIRSEP, LKDIRSEPSTR and LKOBJEXT, + cosmetic changes, brought more in sync, changed old K&R to ANSI + +2008-01-13 Borut Razem + + * support/scripts/sdcc.nsi: added Uninstall/reinstall page, ... + * src/SDCCicode.c: fixed bug #1870216 - Error 122: dividing by zero + +2007-12-30 Borut Razem + + * src/pic16/gen.c: fixed implementation of bitwise operations for + pic16 target + * support/regression/tests/bitwise.c: added test cases + +2007-12-29 Borut Razem + + * src/SDCCasm.[ch]: renamed from asm[ch], use dbuf_getline(), ... + * src/src.dsp, src/Makefile.bcc, src/Makefile.in, src/common.h, + src/SDCCglue.c, src/xa51/main.c: asm.[ch] renamed to SDCCasm.[ch] + * support/Util/dbuf_string.[ch]: added function dbuf_getline() + * src/ds390/gen.c, src/hc08/gen.c, src/mcs51/gen.c, src/pic16/gen.c, + src/pic/gen.c, src/z80/gen.c, src/xa51/gen.c, src/pic16/ralloc.c, + src/pic16/pcode.[ch]: added const qualifier + * as/hc08/Makefile.bcc, as/hc08/Makefile.in, as/hc08/as_hc08.dsp, + as/mcs51/Makefile.bcc, as/mcs51/Makefile.in, as/mcs51/asx8051.dsp, + as/z80/Makefile.bcc, as/z80/Makefile.in, as/z80/as_gbz80.dsp, + as/z80/as_z80.dsp: added dbuf.[ch] and dbuf_string[ch] to project + * as/asxxsrc/aslex.c: use dbuf_getline() + * as/hc08/asdata.c, as/hc08/asexpr.c, as/hc08/asm.h, as/hc08/m08adr.c, + as/mcs51/asdata.c, as/mcs51/asexpr.c, as/mcs51/asm.h, + as/mcs51/i51adr.c, as/z80/asdata.c, as/z80/asexpr.c, as/z80/aslist.c, + as/z80/asm.h, as/z80/z80adr.c: + changed type of ib and ip to const char * + +2007-12-28 Borut Razem + + * as/asxxsrc/aslex.c: moved from as/mcs51/aslex.c; + introduced (readlin) - long lines are turuncated + * as/hc08/as_hc08.dsp, as/mcs51/asx8051.dsp, as/z80/as_gbz80.dsp, + as/z80/as_z80.dsp, as/hc08/Makefile.in, as/mcs51/Makefile.in, + as/z80/Makefile.in: moved aslex.c to asxxsrc + * as/hc08/aslex.c, as/z80/aslex.c: deleted + * as/hc08/asmain.c, as/mcs51/asmain.c: + added missing initialization of a_addr field + * support/regression/tests/long_asm_line.c: added regtest for long + assembler line + +2007-12-22 Borut Razem + + * src/SDCC.lex: fixed bug #1852894: # character hangs the compiler + +2007-12-20 Maarten Brock + + * src/SDCCsymt.c (computeType): fixed bug, thanks Fan Weiguang + +2007-12-16 Borut Razem + + * device/include/pic16/stdbool.h: removed, since already exists in + device/include/; this also fixes bitopcse.c regression test for pic16 + target + * support/regression/fwk/inclusw/testfwk.h: added macro ASSERT_FAILED + * src/pic16/glue.c: fixed bug #1851855: generic static pointer + dereference doesn't work; covered by regression test bug1399290 + +2007-12-05 Borut Razem + + * doc/sdccman.lyx: fixed bug #1844509 - Correction to Manual 4.6.9 + Adding new PIC16 + +2007-12-01 Borut Razem + + * sim/ucsim/cmd.src/cmdmem.cc, sim/ucsim/cmd.src/mem.cc: + corrected handling of the highest_valid_address + +2007-11-17 Raphael Neider + + * src/pic/main.c (_asmCmd): include debug arguments (-g as $3) + * src/pic/glue.c (picglue): emit .file if --debug is given + +2007-11-17 Raphael Neider + + * src/pic16/genarith.c (pic16_genPlus, pic16_genMinus): take special + care when left or right operand resides in result, fixes #1830220 + +2007-11-17 Borut Razem + + * src/SDCCglue.c, src/pic16/glue.c: reverted fix for bug + #983491 - "Merge duplicate strings function is ineffective" + * support/regression/tests/bug-983491.c: regtest disabled + * as/asxxsrc: created + as/asxxsrc/assym.c, as/asxxsrc/strcmpi.c: moved + as/hc08/assym.c, as/mcs51/assym.c, as/strcmpi.c, + as/z80/assym.c, as/hc08/asstore.c, as/mcs51/asstore.c: deleted + as/hc08/Makefile.bcc, as/hc08/Makefile.in, as/hc08/as_hc08.dsp, + as/hc08/asm.h, as/link/hc08/Makefile.bcc, as/link/hc08/Makefile.in, + as/link/hc08/link_hc08.dsp, as/link/mcs51/Makefile.bcc, + as/link/mcs51/Makefile.in, as/link/mcs51/aslink.dsp, + as/link/z80/Makefile.in, as/link/z80/linkgbz80.dsp, + as/link/z80/linkz80.dsp, as/mcs51/Makefile.bcc, as/mcs51/Makefile.in, + as/mcs51/asm.h, as/mcs51/asx8051.dsp, as/z80/Makefile.bcc, + as/z80/Makefile.in, as/z80/as_gbz80.dsp, as/z80/as_z80.dsp, + as/z80/Makefile.as_hc08, as/mcs51/Makefile.asx8051: modified + created as/asxxsrc directory, assym.c and strcpi.c moved into it + +2007-11-15 Maarten Brock + + * device/include/stdarg.h: added and removed some casts + * src/SDCCsymt.c (compareType): Fully check types between generic and + non-generic pointers, also accept ptr-ptr to void-ptr assignments + +2007-11-13 Borut Razem + + * support/regression/tests/bug-1817005.c: + added regtest for bug #1817005 - as-z80 chokes on long labels + +2007-11-12 Borut Razem + + * as/z80/asmain.c, as/z80/asm.h, as/z80/assym.c, as/z80/asdata.c, + as/z80/asout.c, as/z80/aslist.c: + fixed bug #1817005 - as-z80 chokes on long labels + +2007-11-11 Maarten Brock + + * as/hc08/asmain.c, + * as/z80/asmain.c: cosmetic changes + * as/hc08/alloc.h, + * as/mcs51/alloc.h, + * as/z80/alloc.h: removed + * as/hc08/assym.c, + * as/mcs51/assym.c: replaced alloc.h with stdlib.h + * as/link/aslink.h: added LKDIRSEP and, LKDIRSEPSTR + * as/link/hc08/Makefile.in, + * as/link/mcs51/Makefile.in, + * as/link/z80/Makefile.in: added -DUNIX to CFLAGS + * as/link/lklex.c, + * as/link/mcs51/lkarea.c, + * as/link/mcs51/lkmain.c: cosmetic changes + * as/link/hc08/lklibr.c, + * as/link/z80/lklibr.c, + * as/link/mcs51/lklibr.c: used LKDIRSEP, LKDIRSEPSTR and LKOBJEXT, + used cygwin_conv_to_full_posix_path, + added warnings, cosmetic changes, brought more in sync + changed old K&R into ANSI function declarations + * as/link/z80/lklibr.c (loadAdb): added + * as/link/z80/lkmain.c: removed -- option from usage text + +2007-11-03 Maarten Brock + + * src/mcs51/gen.c (outBitC): optimized for no result + +2007-10-31 Borut Razem + + * src/SDCCsymt.c: fixed (hopeful properly) bug + #1805702 - order of extern matters + * support/regression/tests/bug-1805702.c: enabled regtest for bug + #1805702 + +2007-10-29 Borut Razem + + * src/SDCCsymt.c: reverted bad fixed of bug #1805702 + - order of extern matters + * support/regression/tests/bug-1805702.c: disabled regtest for bug + #1805702 + +2007-10-29 Maarten Brock + + * src/ds390/peeph.def: replaced 24bitModeAndPortDS390 by + 24bitMode, portIsDS390 + * src/mcs51/gen.c (genOr): optimized for RFE 1750727 + * src/SDCCpeeph.c (flat24bitModeAndPortDS390): removed + (notVolatileVariable): also check sloc names, + (callFuncByName): moved ftab[] out of function and sorted it by use + +2007-10-28 Maarten Brock + + * device/include/stdarg.h: fixed bug in va_start macro for --xstack + * src/hc08/gen.c (aopForRemat): aop->aopu.aop_immd.from_cast_remat not set, + aop->aopu.aop_immd.aop_immd2 not filled with (generic) pointer type + * src/SDCCicode.c (geniCodeCast): fixed bug 880197 + * support/regression/tests/bug-880197.c: new, added + +2007-10-28 Borut Razem + + * support/regression/Makefile.in, + support/regression/ports/mcs51-large/spec.mk, + support/regression/ports/mcs51-xstack-auto/spec.mk, + support/regression/ports/mcs51-stack-auto/spec.mk, + support/regression/ports/mcs51-medium/spec.mk, + support/regression/ports/mcs51-common/spec.mk, + support/regression/ports/mcs51-common/*, + support/regression/ports/mcs51-small/*: + mcs51 renamed to mcs51-common, created mcs51-small + * src/SDCCsymt.c: fixed bug #1805702 - order of extern matters + * support/regression/tests/bug-1805702.c: added regtest for bug + #1805702 + +2007-10-26 Maarten Brock + + * src/mcs51/peeph.def: moved rules 257.x to 253.x and re-enabled 253.b, + added new rules 265 - 270 + * support/regression/tests/bug1721024.c:new, added + * support/regression/Makefile.in: renamed test-mcs51 to test-mcs51-small, + introduced new test-mcs51 to run all mcs51 tests + +2007-10-25 Maarten Brock + + * support/regression/tests/bug1816470.c: new, added + +2007-10-21 Maarten Brock + + * src/SDCCast.c (resultTypePropagate): do propagate for LEFT_OP, do not + propagate for *,+,- with float, fixed bug 1816470 + (decorateType): cast to resultTypeProp instead of resultType + +2007-10-19 Borut Razem + + * src/pic16/glue.c: fixed bug #983491 - "Merge duplicate strings + function is ineffective" for pic16 tareget + * support/scripts/listerr.c: corrected include path + * device/lib/_itoa.c: fixed bug #1806402 - _itoa and _uitoa leak to + adjacent memory + +2007-10-18 Maarten Brock + + * support/regression/tests/using.c: new, added + * support/regression/tests/vaargs.c: fixed and enabled test + +2007-10-18 Borut Razem + + * src/SDCCglue.c: fixed bug #983491 - Merge duplicate strings function + is ineffective + * support/regression/tests/bug-983491.c: added regtest for bug #983491 + +2007-10-18 Maarten Brock + + * doc/sdccman.lyx: documented option --Werror + * src/SDCCsymt.c (checkFunction): fixed bug 1815418 by setting + RegBankUsed[] earlier + +2007-10-14 Maarten Brock + + * device/include/mcs51/p89lpc938.h: new, added, thanks Kyle Guinn + * src/pic/glue.c, + * src/SDCCval.c, + * src/SDCCast.c, + * src/SDCCast.h: replaced AST_LIT_VALUE with AST_FLOAT_VALUE and + AST_ULONG_VALUE + * src/SDCCast.c (decorateType): improved optimization of tri-op + * src/SDCCerr.c (vwerror, setWError), + * src/SDCCerr.h, + * src/SDCCmain.c (parseCmdLine): added option --Werror to treat all + warnings as errors, thanks Stas Sergeev for PATCH 1813211 + +2007-10-13 Maarten Brock + + * src/mcs51/gen.c (leftRightUseAcc): use macro IS_OP_ACCUSE + * src/SDCCast.c (decorateType): optimize bit=cond?1:0, RFE 1738430 + * support/regression/tests/bug-223113.c, + * support/regression/tests/bug-426632.c, + * support/regression/tests/bug-468811.c, + * support/regression/tests/bug-477835.c, + * support/regression/tests/bug-478094.c, + * support/regression/tests/bug-499644.c, + * support/regression/tests/bug-524209.c, + * support/regression/tests/bug-524211.c, + * support/regression/tests/packcast.c, + * support/regression/tests/structidx.c: added empty tests + * support/regression/tests/bug-607243.c: enabled test + +2007-10-06 Borut Razem + + * .version, doc/sdccman.lyx: bumped version to 2.7.4 to indicate the full + support of universal binaries on Mac OS X + +2007-10-02 Borut Razem + + * src/SDCCval.h: unified double2ul macro for all platforms + * src/SDCCval.c: fixed bug #1777758 - applied Maarten's patch + * support/regression/tests/bitwise.c: added regtest for bug #1777758 + +2007-09-30 Borut Razem + + * src/SDCCval.h: fixed bug #1739860 - sdcc does not work correctly on some + platforms + * sdcc_vc_in.h: enabled warnings + * src/hc08/gen.c: fixed MSVC warning C4146: unary minus operator applied to + unsigned type, result still unsigned + * src/mcs51/peep.c: fixed gcc warning: suggest parentheses around && within || + +2007-09-28 Raphael Neider + + * src/pic/device.c (find_device): prevent buffer underflow error + * src/pic/pcoderegs.c (OptimizeRegUsage): avoid dereferencing + the just destroyed list entry + +2007-09-18 Frieder Ferlemann + + * doc/sdccman.lyx: there's a dedicated wiki page for cmake and sdcc, thanks + Alexander Neundorf + +2007-09-18 Borut Razem + + * src/SDCCval.c: fixed MSVC warning C4146: unary minus operator + applied to unsigned type, result still unsigned + +2007-09-17 Borut Razem + + * src/SDCC.y, src/SDCCast.c, src/SDCCcse.c, src/SDCCglue.c, + src/SDCCicode.c, src/SDCCopt.c, src/SDCCsymt.c, src/SDCCval.c, + src/SDCCval.h, src/hc08/gen.c, src/avr/gen.c, src/ds390/gen.c, + src/mcs51/gen.c, src/pic/gen.c, src/pic/genarith.c, src/pic/glue.c, + src/pic/ralloc.c, src/pic16/gen.c, src/pic16/genarith.c, + src/pic16/genutils.c, src/pic16/glue.c, src/pic16/main.c, + src/z80/gen.c, src/z80/ralloc.c: + fixed bug #1739860 - sdcc does not work correctly on some platforms + (not finished) + introduced and used ulFromVal(), double2ul(), used strtod() instead sscanf() + +2007-09-17 Raphael Neider + + * src/pic16/device.c: reverted to previous version + * device/lib/pic16/Makefile.common.in: quieten gpasm via -Wa,-q + +2007-09-16 Raphael Neider + + * src/pic16/device.c (pic16_dump_usection): do not reserve 0 bytes, + as this raises a ton of gpasm warnings, just emit a second label + * src/pic16/devices.inc, + * device/lib/pic16/pics.all, + * device/lib/pic16/libdev/pic18f2585.c, + * device/lib/pic16/libdev/pic18f2680.c, + * device/lib/pic16/libdev/pic18f2682.c, + * device/lib/pic16/libdev/pic18f2685.c, + * device/lib/pic16/libdev/pic18f4585.c, + * device/lib/pic16/libdev/pic18f4680.c, + * device/lib/pic16/libdev/pic18f4682.c, + * device/lib/pic16/libdev/pic18f4685.c, + * device/include/pic16/pic18f2585.h, + * device/include/pic16/pic18f2680.h, + * device/include/pic16/pic18f2682.h, + * device/include/pic16/pic18f2685.h, + * device/include/pic16/pic18f4585.h, + * device/include/pic16/pic18f4680.h, + * device/include/pic16/pic18f4682.h, + * device/include/pic16/pic18f4685.h, + * device/include/pic16/pic18fregs.h: added 18f2585, 18f2680, + 18f2682, 18f2685, 18f4585, 18f4680, 18f4682, 18f4685, + patch contributed by Anton Strobl, applied with changes + +2007-09-16 Raphael Neider + + * device/include/pic16/pic18f2431.h, + * device/include/pic16/pic18f25j10.h, + * device/include/pic16/pic18f4431.h, + * device/include/pic16/pic18f45j10.h: adopted common include style + * device/include/pic16/pic18f1320.h, + * device/include/pic16/pic18f2320.h, + * device/include/pic16/pic18f2525.h, + * device/include/pic16/pic18f4320.h, + * device/include/pic16/pic18f4525.h: NEW, just include proper .h file + * device/include/pic16/pic18fregs.h: prepared for automatic include + file selection by having DEVICE.h for every DEVICE + * device/lib/pic16/libdev/pic18f2320.c, + * device/lib/pic16/libdev/pic18f4320.c: just include proper .c file + + * device/lib/pic16/configure.in, + * device/lib/pic16/configure: use rm -rf instead of rmdir + * device/lib/pic16/Makefile.in: use RMDIR to remove build directories + * device/lib/pic16/libc/stdlib/free.c: avoid warning on pointer cast + +2007-09-09 Borut Razem + + * src/SDCCmain.c, src/SDCCutil.c: print newline after printVersionInfo(), + distingush between i386 and ppc Mac OS X versions + +2007-09-05 Maarten Brock + + * src/mcs51/gen.c (genReceive): fixed bug 1788177 + * support/regression/tests/bug1788177.c: new, added + +2007-09-04 Frieder Ferlemann + + * doc/sdccman.lyx: mentioned d52 and cmake, customizing startup code + * device/include/mcs51/lint.h added keyword __naked + +2007-09-04 Maarten Brock + + * src/pic16/glue.c, + * src/pic/glue.c, + * src/SDCCmem.h: removed maxRegBank + * src/SDCCmem.c (allocVariables): removed maxRegBank and moved setting + RegBankUsed[] to checkFunction() in SDCCsymt.c to fix bug 1759839 + * src/SDCCsymt.c (checkFunction): set RegBankUsed[] here + * src/mcs51/peep.c (isCallerSaveFunc, termScanAtFunc): changed function + name and behaviour to handle banked functions + (scan4op): and use it to fix bug 1786213 + +2007-09-03 Raphael Neider + + * device/include/pic16/pic18f248.h, + * device/include/pic16/pic18f258.h, + * device/include/pic16/pic18f448.h, + * device/lib/pic16/libdev/pic18f248.c, + * device/lib/pic16/libdev/pic18f258.c, + * device/lib/pic16/libdev/pic18f448.c: fixed TRISEbits, + added T0CONbits, fixes #1786891 + +2007-08-29 Maarten Brock + + * src/ds390/gen.c (genFarPointerSet), + * src/hc08/ralloc.c (packRegisters), + * src/mcs51/ralloc.c (packRegisters), + * src/SDCCcse.c (cseBBlock): check if result is a symbol first to fix + bug 1750318 + * src/SDCCicode.h: POINTER_SET can be true for literals too + * support/regression/tests/bug1750318.c: new, added + +2007-08-23 Borut Razem + + * debugger/mcs51/sdcdb.c: fixed compilation with older readline + library versions without the completition functionality + +2007-08-22 Raphael Neider + + * device/include/pic16/pic18f1220.h, + * device/lib/pic16/libdev/pic18f1220.c: applied patch #1776191 + +2007-08-12 Borut Razem + + * debugger/mcs51/Makefile.in: support/Util/SDCCerr.[ch] moved to src + +2007-08-11 Borut Razem + + * support/Util/SDCCerr.c, support/Util/SDCCerr.h, src/src.dsp, + src/Makefile.in, src/Makefile.bcc, support/scripts/listerr.c: + support/Util/SDCCerr.[ch] moved to src + * as/hc08/as_hc08.dsp, as/link/hc08/link_hc08.dsp, + as/link/z80/linkgbz80.dsp, as/link/z80/linkz80.dsp, + device/examples/ds390/tinitalk/tinitalk.dsp, + device/examples/serialcomm/windows/serialcomm.dsp, + support/librarian/librarian.dsp: + removed linking of unused odbc32.lib and odbccp32.lib + * support/scripts/winres.h: + added for compilation with Visual C++ 2005 Express Edition + +2007-08-09 Jesus Calvino-Fraga + + * device/include/mcs51/at89c51ed.h: Fixed typo in declarations of CKCON0 + and CKCON1. + +2007-08-07 Erik Petrich + + * sdccconf_in.h: update the endian test so that SPARC Solaris + does not throw syntax errors + +2007-08-06 Borut Razem + + * doc/sdccman.lyx: removed two index entries which prevented the + generation of sdcc doc archive + +2007-08-05 Jesus Calvino-Fraga + + * doc/sdccman.lyx: Same changes made 2007-07-28 but using lyx 1.4.4 + instead of lyx 1.5.0. + +2007-07-31 Erik Petrich + + * device/include/hc08/mc68hc908apxx.h: new header contributed by + Lucas Loizaga, with minor modifications. Thanks! + +2007-07-28 Jesus Calvino-Fraga + + * doc/sdccman.lyx: Documented --acall-ajmp and described new features + in sdcclib. + +2007-07-28 Jesus Calvino-Fraga + + * src/SDCCglobl.h, src/SDCCpeeph.c, src/SDCCglue.c, src/mcs51/main.c, + src/mcs51/peeph.def: Added option --acall-ajmp: replaces lcall/ljmp + with acall/ajmp. + +2007-07-22 Borut Razem + + * configure.in, configure: re-introduced .version + * sdcc.spec, doc/INSTALL.txt: they are used only for releases; + the version reverted to 2.7.0 + +2007-07-18 Maarten Brock + + * configure.in, + * doc/sdccman.lyx: bumped version to 2.7.3 + * device/include/mcs51/compiler.h: fixed elif->else + * src/mcs51/gen.c (genAnd, genOr): handle accuse for pure bit operands + * src/mcs51/ralloc.c (createStackSpil): fixed SCLS bug with sloc for sbit, + (operandUsesAcc, packRegsForAccUse): added parameter allowBitspace to + enable accuse for bit operands + * src/SDCCmain.c (printVersionInfo), + * src/SDCCutil.c (getBuildEnvironment): factored out creation of build + environment descriptor + * src/SDCCutil.h: added getBuildEnvironment + * src/SDCCglue.c (initialComments): use getBuildEnvironment + * support/regression/tests/bug1464657.c: enabled test test_Peephole251 + * support/regression/tests/bug-408972.c: enabled test leftShiftLong + * support/regression/tests/bug1348008.c, + * support/regression/tests/bug1496419.c, + * support/regression/tests/bug1503067.c, + * support/regression/tests/preproc.c: added empty tests + +2007-07-15 Maarten Brock + + * support/regression/tests/bug1678803.c: new, added + +2007-07-14 Maarten Brock + + * as/link/aslink.h, + * as/link/hc08/lkihx.c, + * as/link/hc08/lkrloc.c, + * as/link/mcs51/lkihx.c, + * as/link/mcs51/lkrloc.c: renamed ihxEntendedLinearAddress to + ihxExtendedLinearAddress + * as/link/mcs51/lkrloc.c (relr), + * as/mcs51/asout.c (outr11, outr19): handle absolute destination for + acall/ajmp, see bug 830513 + +2007-07-13 Maarten Brock + + * src/SDCCcse.c (replaceAllSymBySym): renamed siaddr to isaddr, + (cseBBlock): remember aggr2ptr has been used + * src/SDCCicode.c (operandSize): added function to handle aggr2ptr, + (geniCodeAssign): fixed bug 868103 + * src/SDCCicode.h: made operand.aggr2ptr 2 bits wide, + added operandSize prototype + * src/mcs51/gen.c (aopOp): use operandSize to fix bug 868103, + (genDataPointerSet): use max of size of right and result, + (gencjne): added parameter useCarry for optimization, + (genCmpEq): use carry if appropriate, + (genXor): check if operand already in carry + * support/regression/tests/bug-868103.c: enabled test + +2007-07-12 Raphael Neider + + * src/pic16/gen.c (genNearPointerSet): fixed handling of literals + +2007-07-11 Maarten Brock + + * src/SDCCsymt.c (compareType): fixed bugs 1738367 and 1745717 with patch + from Robert Larice, thanks + * support/regression/tests/bitopcse.c, + * support/regression/tests/bitvars.c, + * support/regression/tests/bug-908454.c: use for the bit types + * support/regression/tests/bug-927659.c: enabled test for z80 + * support/regression/tests/bug1738367.c: added extra tests by Frieder + * support/regression/tests/bug1745717.c: new, added + * support/regression/tests/literalop.c, + * support/regression/tests/nullstring.c: removed storage definitions that + are now in testfwk.h + +2007-07-10 Maarten Brock + + * device/include/stdbool.h: do not define __bool_true_false_are_defined + and bool for targets that do not fully support it. + * support/regression/tests/bug1546986.c, + * support/regression/tests/bug1723128.c, + * support/regression/tests/bug1734654.c, + * support/regression/tests/bug1738367.c, + * support/regression/tests/constantRange.c: only use bool if allowed + +2007-07-09 Maarten Brock + + * src/mcs51/peep.c (isCallerSaveFunc): fixed bug 1749275, thanks Robert + Larice, also handle function pointers + * support/regression/tests/bug1749275.c: new, added + +2007-07-03 Borut Razem + + * src/mcs51/gen.c, src/avr/gen.c, src/pic/gen.c, src/z80/gen.c, + src/pic16/gen.c, src/hc08/gen.c, src/ds390/gen.c: fixed RFE + #1746528: SDCC should ignore ':' in inline assembler comments + * device/include/typeof.h: fixed bug #1747142: typeof.h needs fixing + +2007-07-02 Maarten Brock + + * device/include/mcs51/C8051F360.h: fixed bug #1746410, thanks Chris Jones + * device/lib/mcs51/crtxclear.asm: do not set __XPAGE unconditionally + +2007-06-29 Borut Razem + + * src/SDCCmain.c: fixed bug + #1744746: SDCC #4867: broken option --xram-size + +2007-06-28 Borut Razem + + * sim/ucsim/configure.in, sim/ucsim/configure, sim/ucsim/ddconfig_in.h: + find out the endianess of host machine for ucsim + +2007-06-27 Borut Razem + + * support/regression/generate-cases.py: corrected the file name + in warning + * configure.in, configure, sdccconf_in.h: find out the endianess of + host machine + * src/SDCC.y: fixed bug #1744146: Crash when compiling array of + negative size + +2007-06-27 Gudjon I. Gudjonsson + + * device/include/mcs51/p89c66x.h: NXP header file, OK to change licence + +2007-06-26 Borut Razem + + * support/regression/generate-cases.py: display warning if function + list is empty; implemented more flexible rule for detection of + testing functions, allowing return type 'void' in the same line as + the function name in the function definition + * support/regression/tests/bug-1654060.c: corrected test + * support/librarian/sdcclib.c: fixed warning: + format '%s' expects type 'char *', but argument 2 has type 'int' + +2007-06-25 Jesus Calvino-Fraga + + * support/librarian/sdcclib.c: Added feature Requests [1510635] + Multiple infiles for sdcclib. + +2007-06-20 Erik Petrich + + * src/SDCCast.c (inlineFindMaxBlockno, createFunction): fixed + bug 1731741 + +2007-06-18 Borut Razem + + * src/SDCCmain.c: removed option -C since SDCC compiler doesn't know + how to handle comments, so they have to be removed by the + preprocessor; fixed bug #1738926:SDCC #4852: broken option -V + * src/SDCCmain.c, src/SDCCargs.h, src/ds390/main.c, src/mcs15/main.c, + src/pic16/main.c, src/pic/main.c, src/z80/main.c, + support/Util/SDCCerr.c, support/Util/SDCCerr.h: + table driven option hadling + +2007-06-16 Maarten Brock + + * src/SDCCast.c (decorateType), + * src/SDCCicode.c (geniCodeConditional): moved optimization for '?' from + iCode to ast level to fix bug 1738367 + * support/regression/tests/bug1738367.c: new, added + +2007-06-15 Raphael Neider + + * src/pic16/devices.inc, + * device/lib/pic16/pics.all, + * device/include/pic16/pic18fregs.h, + * device/include/pic16/pic18f[24][45]20.h, + * device/lib/pic16/libdev/pic18f[24][45]20.c: added support for + 18f2420, 18f2520, and 18f4420 devices, updated 18f4520 definitions + * device/lib/pic16/Makefile.in: faster cleanup + +2007-06-13 Frieder Ferlemann + + * src/mcs51/peeph.def: added 177.i (mov from a is slightly cheaper) + +2007-06-13 Raphael Neider + + * src/SDCCmain.c: prevent NULL pointer dereference, avoid warning + +2007-06-12 Raphael Neider + + * support/scripts/inc2h.pl: conditionally emit defines for SFR bits, + suppress bit defines if NO_BIT_DEFINES is #define'd + * device/include/pic/pic*.h: recreated all headers to include + conditional bit defines + * device/include/pic/pic16f886.h, + * device/include/pic/pic16f887.h: fixed based on newer .inc file + * device/include/pic/recreate.sh: script to recreate the complete + device library files based on the currently supported devices + +2007-06-12 Borut Razem + + * src/pic16/main.c, src/SDCCargs.h, SDCCmain.c, + support/regression/Makefile.in, support/scripts/build.mak, + support/scripts/Makefile.snapshot: + use new svn URL scheme + * doc/sdccman.lyx: SDCC Wiki moved to + http://sdcc.wiki.sourceforge.net/ + +2007-06-10 Frieder Ferlemann + + * src/mcs51/peeph.def: disabled rule 132.d to fix #1734654 + * support/regression/tests/bug1734654.c: added + +2007-06-10 Maarten Brock + + * src/SDCCast.c (decorateType): optimized '?' for equal operands + * src/SDCCicode.c (geniCodeConditional): optimization for bit result + with literal operands + +2007-06-10 Borut Razem + + * as/link/z80/lklibr.c: fixed mingw build warning + lklibr.c:575: warning: implicit declaration of function 'tolower' + * src/SDCCmain.c, src/ds390/main.c, src/mcs51/main.c, src/pic/main.c, + src/z80/main.c: move target specific options from src/SDCCmain.c + to src//main.c + +2007-06-09 Borut Razem + + * src/z80/gen.c: fixed bug #1294691: nested ifs make compiler crash; + removed unused swap_sense; removed outBitCLong, replaced with outBitC + * support/regression/tests/bug-1294691.c: added + +2007-06-09 Maarten Brock + + * src/SDCCmem.c (allocDefault): removed check sym->level==0 for SPEC_ABSA, + can also be static, fixes bug 1733438 + * src/SDCCsymt.c (checkSClass): static local vars in reentrant funcs can + have absolute address too + (computeType): added optimization for 'cond ? true : false' + * support/regression/tests/absolute.c: added test for static absolute var + +2007-06-08 Raphael Neider + + * src/regression/Makefile: suppress parallel builds, allow easy + switching between pic14/pic16 ports + * src/regression/picregs.h: added pic14/16 header file switch + * src/regression/{compare7.c,compare8.c,compare9.c,compare10.c, + inline.c,nestfor.c,string1.c}: include "picregs.h" + +2007-06-07 Borut Razem + + * sim/ucsim/*.[ch], sim/ucsim/configure, sim/ucsim/configure.in: + permanent solution to suppress GCC 4.2.0 c++ warning: + deprecated conversion from string constant to `char *' + use 'const char *' where ever required + * support/regression/generate-cases.py: implemented more flexible rule + for detection of testing functions, allowing white-spaces surrounding + the function name and the 'void' parameter. + * support/regression/tests/constantRange.c, + support/regression/tests/scott-compare3.c: fixed failing regression + tests, uncovered by implementation of more flexible rule for detection + of testing functions + +2007-06-04 Maarten Brock + + * src/SDCCast.c(decorateType): better optimize '!!' and comparisons + +2007-06-04 Borut Razem + + * configure.in, configure, config_vc.awk: sdcc version number is now + stored in configure.in; removed .version + * configure.in, configure, sdcc.spec, doc/sdccman.lyx, doc/sdccman.lyx, + doc/INSTALL.txt: version bumped to 2.7.2 + * sim/ucsim/configure.in, sim/ucsim/configure: + use "read" to read from .version + +2007-06-03 Borut Razem + + * */Makefile.in: removed annoying warning: + Makefile:xx: Makefile.dep: No such file or directory + +2007-06-02 Maarten Brock + + * src/mcs51/gen.c (outBitC, genRet): used IS_OP_RUONLY, + (genNot, genXor): used toCarry, also fixes a bug for c = bit ^ val + * src/mcs51/ralloc.c: removed IS_OP_RUONLY + some cosmetic changes + * src/SDCCast.c (resultTypePropagate): propagate for '!', + (decorateType): also optimize comparisons with RESULT_TYPE_BIT, + bugfix: only use newBoolLink for bit result type + * src/SDCCicode.c (geniCodeLogic): added param tree, + bugfix: use newBoolLink if tree is bit type, bug appears when ruonly, + (geniCodeLogicAndOr): use IS_BIT, + (geniCodeJumpTable, geniCodeSwitch): added NULL param to geniCodeLogic, + (ast2iCode): added tree param to geniCodeLogic for comparisons + * src/SDCCsymt.h: added IS_OP_RUONLY and IS_OP_ACCUSE + * support/regression/tests/bug1723128.c: added test NotZero + +2007-06-01 Borut Razem + + * SDCPP synchronized with GCC CPP release version 4.2.0, + currently the latest release: + * support/cpp2/c-incpath.c, support/cpp2/c-incpath.h, + support/cpp2/c-ppoutput.c, support/cpp2/cppdefault.c, + support/cpp2/cppdefault.h, support/cpp2/except.h, + support/cpp2/libcpp/directives.c, support/cpp2/libcpp/expr.c, + support/cpp2/libcpp/files.c, support/cpp2/libcpp/include/cpplib.h, + support/cpp2/libcpp/init.c, support/cpp2/libcpp/internal.h, + support/cpp2/libcpp/lex.c, support/cpp2/libcpp/macro.c, + support/cpp2/libcpp/mkdeps.c, support/cpp2/libiberty/getpwd.c, + support/cpp2/libiberty/hashtab.c, support/cpp2/optc-gen.awk, + support/cpp2/opth-gen.awk, support/cpp2/opts.c, + support/cpp2/opts.h, support/cpp2/output.h, + support/cpp2/prefix.c, support/cpp2/sdcpp-opts.c, + support/cpp2/sdcpp.dsp, support/cpp2/sdcpp.opt, + support/cpp2/system.h, support/cpp2/version.c, + support/cpp2/Makefile.in: modified + * support/cpp2/opts-common.c: added + * device/lib/pic16/libdev/pic18f[24][45]j10.c: fixed svn atrributes + * device/lib/pic16/libdev/pic18f[24]5j10.c: + search for included source file in local directory + * sim/ucsim/configure, sim/ucsim/configure.in: + temporary solution to suppress GCC 4.2.0 c++ warning: + deprecated conversion from string constant to `char *' + +2007-06-01 Raphael Neider + + * device/lib/pic/libdev/pic12f683.c, + * device/include/pic/pic12f683.h: added GPIO bits + +2007-06-01 Raphael Neider + + * doc/sdccman.lyx: added --disable-pic16-port, fixed some `--' and + quotation marks, clarified role of PIC14 vs. PIC16 ports + * src/pic16/devices.inc, + * device/include/pic16/pic18fregs.h, + * device/include/pic16/pic18f[24][45]j10.h, + * device/lib/pic16/pics.all, + * device/lib/pic16/libdev/pic18f[24][45]j10.c: added support for + 18f24j10, 18f25j10, 18f44j10, and 18f45j10 + * device/lib/pic16/libio/{i2c,adc,usart}.ignore: do not build IO libs + for new devices as they are not yet supported by gputils + +2007-05-31 Borut Razem + + * Small Device C Compiler 2.7.0 released + * .version, sdcc.spec, doc/sdccman.lyx, doc/INSTALL.txt: + changed sdcc version to 2.7.1 + * support/scripts/sdcc.nsi: added How to create WIN32 release + setup.exe package + +2007-05-29 Maarten Brock + + * doc/sdccman.lyx: documented initialization and allocation of absolute + variables, bit parameter passing, the need for function pointers to be + reentrant and alpha quality support of inline and retrict + +2007-05-26 Borut Razem + + * support/regression/tests/bug1057979.c, support/regression/tests/malloc.c, + support/regression/fwk/include/testfwk.h: fixed compilation on Mac OS x + * docs/knownbugs.html: updated + +2007-05-25 Maarten Brock + + * doc/sdccman.lyx: inserted footnotes about inline assembler labels, + thanks Jan Waclawek + * src/mcs51/gen.c (aopPut): fixed part of bug 1723128 when result is + AOP_CRY and ruonly + (gencjneshort): optimized when left is AOP_DIR + * src/SDCCglue.c (printIvalStruct): fixed other part of bug 1723128 for + initializing unions in a struct/array + * support/regression/fwk/include/testfwk.h: added defines for data, near + and far for host and z80 + * support/regression/tests/bug1723128.c: new, added + +2007-05-22 Borut Razem + + * doc/knownbugs.html: updated + +2007-05-21 Raphael Neider + + * src/pic16/glue.c (pic16_initPointer): avoid assertion, emit better + error message instead + * src/pic/pcoderegs.c (pCodeOptime2pCodes): keep register state intact + +2007-05-21 Maarten Brock + + * src/mcs51/peeph.def (257.b): disabled to fix bug 1721024 + +2007-05-21 Raphael Neider + + * src/pic/pcoderegs.c (pCodeOptime2pCodes): fixed bogus optimization, + closes #1722392 + * src/regression/gpsim_assert.h, + * src/regression/Makefile, + * src/regression/pcodeopt.c: regression test for the above fix + +2007-05-11 Maarten Brock + + * src/SDCCpeeph.c (labelIsUncondJump): ignore identical labels for + jumps to self, fixed bug 1717281 + +2007-05-10 Borut Razem + + * support/scripts/gen_known_bugs.pl: cosmetic fix + * doc/knownbugs.html: generated by gen_known_bugs.pl + +2007-05-10 Erik Petrich + + * src/SDCCast.c (createFunction): also generate non-inlined version of + function for functions declared as "static inline" + * src/SDCCast.c (fixupInline, inlineAddDecl): reset symbol state so + function can be inlined after non-inlined version generated. + +2007-05-10 Borut Razem + + * support/scripts/gen_known_bugs.pl: added script + which generates knownbugs.html + +2007-05-09 Maarten Brock + + * doc/knownbugs.html: updated for release 2.7.0 + +2007-05-09 Jesus Calvino-Fraga + + * device/include/mcs51/uPSD33xx.h: Added patch by Jan Waclawek. + +2007-05-08 Maarten Brock + + * src/ds390/gen.c (emitcode): don't change properties of previous lines, + (throughout): updated generating comments + * src/mcs51/gen.c (emitcode): don't change properties of previous lines, + (throughout): updated generating comments + * src/SDCCpeeph.c (peepHole): continue searching at the first replaced + rule instead of at the second, or it might skip lines when removing the + complete match + * support/regression/tests/bug1714204.c: changed test to foo + +2007-05-08 Borut Razem + + * doc/sdccman.lyx: changed sdcc version to 2.7.0, + thanks to SDCC Distributed Compile Farm members, + added Z80 and GBZ80 command line options + * .version, doc/INSTALL.txt, sdcc.spec: changed sdcc version to 2.7.0 + +2007-05-08 Maarten Brock + + * device/lib/mcs51/crtxinit.asm: added disabled version for dual dptr + * device/include/mcs51/uPSD33xx.h: added sfr DPS as alias for DPTC + * support/regression/tests/longlit.c: modified to be tested at all and + to pass the actual test + +2007-05-07 Jesus Calvino-Fraga + + * device/include/mcs51/uPSD33xx.h: Added. + +2007-05-07 Maarten Brock + + * device/lib/_gptrput.c, + * device/lib/_gptrget.c: removed old code, + (_gptrgetWord), + * src/ds390/gen.c (genGenPointerGet): fixed bug 1714204 + * support/regression/tests/bug1714204.c: new, added + +2007-05-06 Frieder Ferlemann + + * support/regression/tests/regtrack.c: test was never executed + because of the regression test being picky about white spaces. + * device/lib/mcs51/crtclear.asm: added comment + +2007-05-06 Raphael Neider + + * device/lib/pic/Makefile.rules, + * device/lib/pic16/Makefile.rules: make sure *.ignore file exists, + made "&> /dev/null" redirection sh-safe ("> /dev/null 2>&1") + +2007-05-06 Raphael Neider + + * src/pic16/device.h, + * src/pic16/main.h, + * src/pic16/main.c (pic16_optionsTable,_pic16_parseOptions, + _pic16_setDefaultOptions): removed/reordered command-line args + * doc/sdccman.lyx: updated PIC14 and PIC16 documentation (supported + devices, regrouped command line args, environment variables), + clarified sone points, added sections on how to add devices to the + PIC14/PIC16 ports + +2007-05-06 Maarten Brock + + * src/z80/peeph.def: fixed bug in rule 2 + +2007-05-05 Maarten Brock + + * src/port.h: added TARGET_MCS51_LIKE + * src/SDCCpeeph.c (labelIsUncondJump): new, added, other targets could + take advantage of it too + * src/z80/gen.c (genIpush): push b, d or h directly instead of using a, + (shiftR2Left2Result): Optimized: don't check shifting by 0 + * src/z80/peeph-z80.def, + * src/z80/peeph.def: whole set of new rules by Philipp Krause with some + modifications, see patch 1700823 + * src/mcs51/peep.c (): fixed bug 1712928 + * support/regression/tests/bug1712928.c: new, added + +2007-05-05 Borut Razem + + * device/lib/pic16/Makefile.common.in, + device/lib/pic/Makefile.common.in, sim/ucsim/cmd.src/Makefile.in: + removed bash dependencies + +2007-05-01 Borut Razem + + * src/SDCCicode.c: + fixed bug #1710507: --i-code-in-asm makes compile fail + all iCode comments are now one liners + * src/mcs51/gen.c: fixed memory leak + +2007-05-01 Raphael Neider + + * device/lib/pic/libdev/*.c + * device/include/pic/*.h: regenerated all device libs from updated + .inc files + * support/scripts/inc2h.pl: documented usage, now uses strict to + catch more bugs + +2007-04-30 Borut Razem + + * doc/sdccman.lyx: + fixed bug #1669175: Problem with space in output paths + documented how to use paths with spaces for Windows users + +2007-04-29 Borut Razem + + * Fixed svn:eol-style and svn:keywords properties + * src/SDCCval.c: fixed bug + #1592871: Segfault with "large" const arrays of characters + replaced recursion with iteration + * Removed svn:executable property from non-executable files + +2007-04-29 Maarten Brock + + * src/mcs51/gen.c (genRet): fixed bug 1707003 + +2007-04-27 Raphael Neider + + * src/pic16/pcode.c (pBlockRemoveUnusedLabels,pic16_pBlockAddInval, + createReachingDefinitions,assignValnums,pic16_destructDF, + pic16_createDF,pic16_vcg_dumpedges,pic16_vcg_dump_default): + prevent NULL pointer dereferences + * device/lib/pic/libdev/pic16f886.c, + * device/lib/pic/libdev/pic16f887.c: svn mv'ed to disabled_* to + prevent building them, gputils do not really support them yet + +2007-04-27 Frieder Ferlemann + + * device/lib/_ltoa.c: 36 bytes less __data mem. This really + helps printf_small. 32 bytes more __idata mem. + +2007-04-27 Raphael Neider + + * src/pic/pcode.c (addpCode2pBlock,LinkFlow,pBlockRemoveUnusedLabels): + return early when pb or pb->pcHead is NULL (patch #1708427) + * src/regression/empty.c, + * src/regression/Makefile: added test with empty functions + * support/Util/SDCCerr.c: fixed typo in E_INIT_STRUCT message + +2007-04-27 Borut Razem + + * src/SDCCast.c: fixed feature request + #1547512: Redundant strings linked when using sizeof("abc") + +2007-04-23 Borut Razem + + * doc/sdccman.lyx, src/SDCCmain.c: + peep-hole comments are generated only if --fverbose-asm option is + specified and --no-peep-comments is not, as proposed by Frieder. + * support/regression/Makefile.in: compile regression tests with + --fverbose-asm option so one can "grep" whether a new (or an old) + peephole is (still) applied; requested by Frieder. + +2007-04-23 Kevin Buettner + + * device/include/pic/pic16f886.h, + * device/include/pic/pic16f887.h, + * device/lib/pic/libdev/pic16f886.c, + * device/lib/pic/libdev/pic16f887.c, + * device/include/pic/pic14devices.txt, + * device/lib/pic/libdev/devices.txt: Add 16f886 and 16f887. + +2007-04-23 Kevin Buettner + + * device/lib/pic/libsdcc/idata.c: PAGESEL _main before going there, + fixes #1704666 + +2007-04-23 Frieder Ferlemann + + * device/lib/_memset.c: assembler version for mcs51 + +2007-04-22 Borut Razem + + * support/scripts/listerr.c: program to create the list of errors and + warnings list from - added + * doc/sdccman.lyx: removed the note + "For list of warnings and corresponding codes, see err_warn.txt" + * src/SDCCsymt.c: fixed bug #1699804: + Bug with some uses of sizeof(static local array) (MCS51) + * support/regression/tests/bug-1699804.c: added + +2007-04-20 Maarten Brock + + * as/mcs51/asmain.c (search_path_append, search_path_fopen): new, added, + (main): added option -i, + (asmbl, case S_INCL): use search_path_fopen, + mostly from patch 1579668 by Peter Miller, thanks + * src/z80/main.c: fixed typo --callee-saves-bc + * device/include/mcs51/compiler.h: added sfrword for Tasking + +2007-04-20 Borut Razem + + * src/z80/main.c: replaced reserved keyword asm with asmblr + +2007-04-19 Borut Razem + + * src/port.h: use const pointers to strings + * src/SDCCargs.h: declared getStringArg() and getIntArg() + * src/pic16/main.c: include SDCCargs.h + * src/SDCCglobl.h: code_seg and const_seg are not pointers to + const char, since the strings are dynamically allocated + * src/SDCCmain.c: options.code_seg and options.const_seg are + dynamically allocated; check port specific command line options + before the general ones + * src/z80/main.c: fixed bug #1631895: codeseg/constseg #pragma fail + +2007-04-18 Maarten Brock + + * device/include/ds400rom.h, + * device/lib/ds390/lcd390.c, + * device/lib/ds390/memcpyx.c, + * device/lib/ds390/rtc390.c, + * device/lib/ds400/ds400rom.c, + * device/lib/ds400/memcpyx.c, + * device/lib/hc08/_ret.c: more replacements of keywords with their + double underscore equivalents + * device/lib/ds390/Makefile.in, + * device/lib/ds400/Makefile.in, + * device/lib/gbz80/Makefile.in, + * device/lib/hc08/Makefile.in, + * device/lib/mcs51/Makefile.in, + * device/lib/z80/Makefile.in: added --std-c89 to CFLAGS + +2007-04-17 Borut Razem + + * doc/sdccman.lyx, src/SDCCmain.c, src/SDCCglobal.h, src/ds390/gen.c, + src/hc08/gen.c, src/mcs51/gen.c, src/mcs51/rtrack.c: + fixed #1493816: option --no-gen-comments: --no-gen-comments renamed + to --fverbose-asm, to be gcc'ish + +2007-04-17 Maarten Brock + + * src/mcs51/gen.c (aopOp): set size to 1 for ruonly, fixes bug 1699455 + +2007-04-17 Borut Razem + + * doc/sdccman.lyx: fixed #1701874: Mac OSX references in SDCC manual + * device/lib/ds400/tinibios.c, device/lib/hc08/_divuint.c, + device/lib/hc08/_divulong.c: replaced _asm and _endasm keywords + with their double underscore equivalent + +2007-04-14 Borut Razem + + * doc/sdccman.lyx: some additional "freeware" replaced with "free open + source" + +2007-04-13 Borut Razem + + * doc/sdccman.lyx: -pedantic-parse-number is not in conformance with + C99 standard + * device/examples/serialcomm/windows/serial.[ch], + device/examples/serialcomm/windows/test_serialcomm.cpp: + updated by Bela Torok + * device/examples/serialcomm/windows/serialcomm.dsw, + device/examples/serialcomm/windows/serialcomm.dsp: added + +2007-04-13 Jan Waclawek + + * doc/sdccman.lyx: additions and changes at various places + (submitted as #1697136). + (svn commit by Frieder Ferlemann ) + +2007-04-10 Borut Razem + + * doc/cdbfileformat.lyx, doc/sdccman.lyx, doc/test_suite_spec.lyx: + LyX file format changed to 245 + * doc/sdccman.lyx, doc/README.txt, sdc/SDCC.lex, src/SDCCglue.c: + "FreeWare" replaced with "free open source" + +2007-04-10 Maarten Brock + + * device/include/mcs51/C8051F120.h: added some defines for bits in RSTSRC + +2007-04-08 Maarten Brock + + * device/include/pic16/pic18fregs.h, + * device/lib/_bp.c, + * device/lib/_decdptr.c, + * device/lib/_divsint.c, + * device/lib/_divslong.c, + * device/lib/_divuint.c, + * device/lib/_divulong.c, + * device/lib/_fs2schar.c, + * device/lib/_fs2sint.c, + * device/lib/_fs2slong.c, + * device/lib/_fs2uchar.c, + * device/lib/_fs2uint.c, + * device/lib/_fs2ulong.c, + * device/lib/_fsadd.c, + * device/lib/_fscmp.c, + * device/lib/_fsdiv.c, + * device/lib/_fseq.c, + * device/lib/_fsget1arg.c, + * device/lib/_fsget2args.c, + * device/lib/_fsgt.c, + * device/lib/_fslt.c, + * device/lib/_fsmul.c, + * device/lib/_fsneq.c, + * device/lib/_fsnormalize.c, + * device/lib/_fsreturnval.c, + * device/lib/_fsrshift.c, + * device/lib/_fssub.c, + * device/lib/_fsswapargs.c, + * device/lib/_gptrget.c, + * device/lib/_gptrgetc.c, + * device/lib/_gptrput.c, + * device/lib/_logexpf.c, + * device/lib/_modsint.c, + * device/lib/_modslong.c, + * device/lib/_moduint.c, + * device/lib/_modulong.c, + * device/lib/_mulint.c, + * device/lib/_mullong.c, + * device/lib/_schar2fs.c, + * device/lib/_ser.c, + * device/lib/_setjmp.c, + * device/lib/_sint2fs.c, + * device/lib/_slong2fs.c, + * device/lib/_spx.c, + * device/lib/_uchar2fs.c, + * device/lib/_uint2fs.c, + * device/lib/_ulong2fs.c, + * device/lib/asincosf.c, + * device/lib/atanf.c, + * device/lib/calloc.c, + * device/lib/ds390/tinibios.c, + * device/lib/ds400/tinibios.c, + * device/lib/expf.c, + * device/lib/free.c, + * device/lib/hc08/_mulint.c, + * device/lib/logf.c, + * device/lib/malloc.c, + * device/lib/printf_fast.c, + * device/lib/printf_tiny.c, + * device/lib/printfl.c, + * device/lib/realloc.c, + * device/lib/ser_ir.c, + * device/lib/serial.c, + * support/regression/tests/libmullong.c: replaced all special keywords + with their double underscore equivalent + * support/regression/ports/mcs51-xstack-auto/spec.mk, + * device/lib/Makefile.in: compile libs with --std-c99 instead of + --std-sdcc99 + * src/mcs51/gen.c (outBitC): don't store if result is return-use-only, + (genRet): if the bit-symbol is ruonly it already is in the carry + * src/mcs51/ralloc.c (regTypeNum): make regType REG_CND for ruonly bit + * src/SDCCast.c (createFunction): applied patch 887171 by Stas Sergeev + * src/SDCCicode.c (ast2iCode): '!', GETHBIT, GETABIT: only set operand + type UCHAR if dest is not bit + +2007-04-03 Maarten Brock + + * device/include/math.h, + * device/lib/cotf.c, + * device/lib/expf.c, + * device/lib/sincoshf.c: changed XMAX to C99 HUGE_VALF + +2007-04-01 Borut Razem + + * src/SDCC.lex, src/SDCCmain.c, support/cpp2/sdcpp.c: + fixed bug #1692042: input buffer overflow...scanner uses REJECT + * support/cpp2/sdcpp.c: fixed recursion bug - internal_error() called + gcc_unreachable() called internal_error()... + +2007-03-30 Raphael Neider + + * src/pic/ralloc.c (isData): suppress garbage debug output + +2007-03-28 Borut Razem + + * doc/sdccman.lyx: + "Nightly Snapshots" replaced with "Snapshot Builds", since the SDCC + is developed, built and used worldwide, and the word "night" doesn't + make any sense. + +2007-03-28 Maarten Brock + + * device/include/mcs51/C8051F360.h: new, added + * device/include/mcs51/C8051F520.h: fixed buggy sbit addresses SPI0CN + +2007-03-27 Erik Petrich + + * src/SDCC.y (declaration_specifiers, function_specifier), + * support/Util/SDCCerr.c, + * support/Util/SDCCerr.h, + * src/SDCCsymt.h, + * src/SDCCsymt.c (mergeSpec, checkFunction): Parse and validate the + inline keyword + * src/SDCCmem.c (deallocParms), + * src/SDCCast.c: support for function inlining, not quite complete + * src/SDCCsymt.c (printTypeChain, printTypeChainRaw): display + 'restrict' qualifier + +2007-03-24 Maarten Brock + + * src/mcs51/gen.c (saveRegisters, unsaveRegisters): free some bitVects, + (saveRBank, unsaveRBank): don't save bits, + (genFunction, genEndFunction): save bits exactly once, fix bug 1535242 + * support/regression/tests/bug1535242.c: new, added + * device/include/assert.h: applied patch 1686533 to fix bug 1686528, + thanks Alexey Shamrin , + made assert.h header ANSI compliant (added a check for NDEBUG macro, + removed header guard) + * .version, + * sdcc.spec: bumped version to 2.6.5 + * src/SDCCmain.c(parseCmdLine): fixed bug 1677144 + +2007-03-22 Borut Razem + + * debugger/mcs51/cmd.c, debugger/mcs51/sdcdb.c: + fixed bug #1653671: sdcdb integration into ddd is broken + +2007-03-22 Raphael Neider + + * src/pic/gen.c (popGetExternal): augmented to also create references + to external variables (not only labels), + (genCall): comment on plan to reduce PAGESEL overhead, + (genFunction, genEndFunction): also save/restore FSR around interrupt + handling code, removed lots of unused code + (genDivOneByte): release acquired temp register + * src/pic/glue.c (pic14createInterruptVect): adapt to new signature + of popGetExternal + * device/lib/pic/libsdcc/shadowregs.c: NEW, provide storage location + for registers that need to be saved during interrupts (FSR, STATUS, + PCLATH; W needs special handling), currently only FSR is used + +2007-03-22 Raphael Neider + + * device/include/pic/pic14devices.txt: 16f688 has only one config word + +2007-03-19 Jesus Calvino-Fraga + + * /as/link/mcs51/aslink.dsp: Object extension for mcs51 is 'rel' not 'o'. + +2007-03-17 Maarten Brock + + * src/mcs51/peeph.def (263.x): fixed bug for volatile variables + +2007-03-14 Maarten Brock + + * as/link/aslink.h: added LKOBJEXT + * as/link/hc08/link_hc08.dsp, + * as/link/hc08/Makefile.bcc, + * as/link/hc08/Makefile.in, + * as/link/mcs51/aslink.dsp, + * as/link/mcs51/Makefile.bcc, + * as/link/mcs51/Makefile.in: moved lkamof51.c and lkdata.c + * as/link/hc08/lkaomf51.c, as/link/mcs51/lkaomf51.c, + * as/link/lkaomf51.c: merged and moved + * as/link/hc08/lkdata.c, as/link/mcs51/lkdata.c, + * as/link/z80/lkdata.c, + * as/link/lkdata.c: merged and moved + * as/link/hc08/lkmain.c, + * as/link/mcs51/lkmain.c: cosmetic changes + * as/link/z80/lkeval.c, as/link/lkeval.c: merged + * as/link/lklex.c: use LKOBJEXT + * as/link/z80/lklist.c, as/link/lklist.c: merged, + ANSI-fied functions, removed bubble-sorts + * as/link/z80/lksym.c as/link/lksym.c: merged, + ANSI-fied functions + * as/link/z80/linkgbz80.dsp, + * as/link/z80/linkz80.dsp, + * as/link/z80/Makefile.in: added lkaomf51.c and lknoice.c, + moved lkdata.c, lkeval.c, lkhead.c, lklex.x, lklist.c, lksym.c + * as/link/z80/lkhead.c, + * as/link/z80/lklex.c: deleted + * as/link/z80/lklibr.c: moved LKOBJEXT to aslink.h + * as/link/z80/lkmain.c: added copyfile() + +2007-03-13 Jesus Calvino-Fraga + + * device/include/mcs51/P89LPC925.h: Added missing P1_6 and P1_7. + +2007-03-13 Frieder Ferlemann + + * device/lib/_strlen.c: assembler version for mcs51 + +2007-03-13 Raphael Neider + + * device/include/pic16/pic18f2221.h, + * device/include/pic16/pic18f2321.h, + * device/include/pic16/pic18f2331.h, + * device/include/pic16/pic18f4221.h, + * device/include/pic16/pic18f4321.h, + * device/include/pic16/pic18f4331.h: fixed config byte location names + * support/scripts/inc2h-pic16.pl: removed debug output, emit + consistently named config byte locations + +2007-03-13 Borut Razem + + * src/Makefile.in, sim/ucsim/avr.src/Makefile.in, + sim/ucsim/hc08.src/Makefile.in, sim/ucsim/s51.src/Makefile.in, + sim/ucsim/xa.src/Makefile.in, sim/ucsim/z80.src/Makefile.in, + as/link/z80/Makefile.in, as/z80/Makefile.in: + introduced LDFLAGS + +2007-03-11 Frieder Ferlemann + + * device/lib/printfl.c: 13 bytes less __data mem (12 more __idata) + * device/lib/printf_large.c: pointer was converted to generic + pointer for mcs51 models other than model-small (Maarten noticed) + +2007-03-10 Jesus Calvino-Fraga + + * device/include/mcs51/ADuC84x.h: Added. + +2007-03-10 Borut Razem + + * src/SDCC.lex, src/SDCCutil.[ch], src/SDCCval: + fixed RFE #1624219: double backslashes in filenames; + functions hexEscape(), octalEscape() and copyStr() moved from + SDCCval.c to SDCCutil.c and made them glovbally available + +2007-03-09 Borut Razem + + * src/SDCC.lex, src/SDCCast.c. src/SDCCglobl.c, src/SDCCsymt.c, + src/SDCCval.c: fixed bugs #1676768: Wrong line number reported and + 1673361: Missaligned comments in output files + +2007-03-09 Raphael Neider + + * device/include/pic/pic14devices.txt: fixed confsiz of 16f91[3467] + +2007-03-09 Raphael Neider + + * src/pic/gen.c, + * src/pic/glue.c, + * src/pic/ralloc.c: suppress undesired debug output + * src/SDCCmain.c (linkEdit): initialize c to quieten compiler + +2007-03-08 Frieder Ferlemann + + * device/lib/printf_large.c: 6 bytes less __data mem (6 more __idata) + +2007-03-07 Borut Razem + + * device/lib/pic16/libdev/pic18f[24][34]31.c: + search include files in the current directory + +2007-03-04 Maarten Brock + + * src/SDCCglue.c (emitMaps, glue), + * src/SDCCmem.c (initMem, allocDefault): added x_abs for initialized + absolute xdata + * support/regression/tests/absolute.c: added xdata test + +2007-03-03 Maarten Brock + + * src/SDCCmain.c (parseCmdLine): only set options.xstack_loc for mcs51, + added condition to macro, fixes bug 1666080 + +2007-03-02 Raphael Neider + + * src/pic/gen.c (genGenPointerSet): removed bogus assertion + +2007-02-28 Frieder Ferlemann + + * device/lib/mcs51/crtxclear.asm: pdata segment of 256 byte would not + be cleared. Unconditionally set __XPAGE + * src/hc08/gen.c: --no-gen-comments (RFE #1493816) for hc08 + +2007-02-27 Frieder Ferlemann + + * src/SDCCglobl.h, + * src/SDCCmain.c, + * src/mcs51/gen.c, + * src/mcs51/rtrack.c, + * src/ds390/gen.c, + * doc/sdccman.lyx: added --no-gen-comments + * src/mcs51/peeph.def: added 192.b, disabled 185 + +2007-02-25 Raphael Neider + + * src/pic16/gen.c (genCast): fixed typo + * device/lib/pic16/Makefile.subdir: only install existing files + * device/lib/pic16/libdev/Makefile.in: build serially, avoid races + +2007-02-25 Maarten Brock + + * device/lib/mcs51/crtcall.asm: new, added for indirect calls + * device/lib/mcs51/crtclear.asm, + * device/lib/mcs51/crtxclear.asm: renumbered labels + * device/lib/mcs51/Makefile.in: added crtcall.asm + * doc/sdccman.lyx: documented mcs51 crt* library startup code + * src/mcs51/gen.c (movc): removed, + (aopGet, genPlusBits): clear a after loading the carry (possibly from + acc.x or psw.x), + (toCarry, genSend, genRet): added function toCarry, + (genPcall): use "lcall @a+dptr" for functions w/o parameters, + (assignBit, genAssign, genCast): added function assignBit + * src/mcs51/Makefile.bcc: added rtrack.c + * src/mcs51/ralloc.h: made valueKnown a bitfield + * src/mcs51/rtrack.c (getReg, rtrackUpdate): added getReg, + fixed "jbc acc" and "cpl acc" bug, enhanced "cjne", "jnz" and "djnz", + disabled InvalidateAllRx for lcall __gptrput, added "xch a,rn" + * src/pic/pcode.c (FixRegisterBanking): fixed warning used uninitialized + * src/z80/gen.c: added AOP_IS_PAIRPTR, + (_pop): only pop valid pairs, see gencjneshort, + (gencjneshort): return pair that still needs to be popped, restructured, + (gencjne, genCmpEq): call _pop + +2007-02-23 Raphael Neider + + * device/include/pic/pic14devices.txt: 16f684 has only one config word + +2007-02-22 Jesus Calvino-Fraga + + * device/include/mcs51/P89LPC925.h: Added. + +2007-02-18 Raphael Neider + + * src/pic/glue.c (emitInitVal): fixed #1659894 (SIGSEGV on arrays) + +2007-02-17 Borut Razem + + * support/cpp2/directives.c, support/cpp2/version.c: + synchronized with GCC CPP 4.1.2 + +2007-02-15 Frieder Ferlemann + + * src/mcs51/rtrack.h, + * src/mcs51/rtrack.c: added register tracking for the mcs51 port, + by checking the strings passed by emitcode() to the assembler. + Feel free to change. This in part addresses RFE #482179. + Set environment variable SDCC_RTRACK to enable. + * src/mcs51/gen.c: inserted hooks + * src/mcs51/ralloc.h: added two members to struct regs + * support/regression/tests/regtrack.c: added + +2007-02-14 Borut Razem + + * src/SDCC.y: fixed bug #1291133: duplicate members across enum(s) + * Makefile.in: applied patch from Makefile related part of + #1469393: Compiler does not initialize static data + +2007-02-12 Maarten Brock + + * src/SDCCicode.c (geniCodeAssign): return (itemp) right instead of left + for better fix of bug 1273984, compiles pic16 rand.c + +2007-02-12 Borut Razem + + * src/pic16/main.c: fixed pic16 standard library directory bug + +2007-02-11 Maarten Brock + + * src/hc08/gen.c (genSwap): fix swap regression test + +2007-02-10 Borut Razem + + * src/SDCCsymt.c: fixed bug #1159134: invalid duplicate declarations + with same scope + * support/regression/tests/bug-1654060.c: added regression test for + #1654060 + +2007-02-09 Bernhard Held + + * src/mcs51/gen.c (genRet): fixed RFE 1652561: added code for bit to + bit moves in return statement + +2007-02-09 Borut Razem + + * src/SDCC.y: fixed bug #1654060 typedef within function causes + syntax error + +2007-02-07 Maarten Brock + + * src/mcs51/gen.c (aopPut): use direct name for pushing registers + * src/SDCCmain.c (parseCmdLine): dbuf_s path must be initialised + +2007-02-07 Raphael Neider + + * src/pic16/devices.inc, + * device/include/pic16/pic18fregs.h, + * device/include/pic16/pic18f[24][34]31.h, + * device/lib/pic16/libdev/pic18f[24][34]31.c, + * device/lib/pic16/pics.all: added 18f[24][34]31 family + * device/lib/pic16/libio/i2c.ignore: do not build i2c + +2007-02-07 Maarten Brock + + * device/lib/printf_large.c (_print_format): fixed compare/assign bug, how + can this have lived here for so many years? + * src/SDCCicode.c (ast2iCode): return left instead of right for assignment, + fixes bug 1273984, see also patch 1645121, thanks Gnther Jehle + * support/regression/tests/bug1273984.c: new, added, thanks Gnther Jehle + +2007-02-06 Bernhard Held + + * src/SDCCBlock.c (addiCodeToeBBlock): fixed bug 1652207: GOTO icodes + appended by loop induction must be at the very end of the eBBlock + +2007-02-05 Kevin Vigor + + * src/ds390/gen.c, src/ds390/main.c: Address bug 1469393. + +2007-02-05 Borut Razem + + * support/regression/fwk/lib/timeout.c: native WIN32 port, + implemented #1651830 Reg. tests: rewrite timeout.c to use WIN32 API + +2007-02-03 Borut Razem + + * src/SDCC.y, src/SDCCmain.c, src/SDCCglobl.h, doc/sdccman.lyx: + applied patch #1646602 option to set default signedness of char to + unsigned, added -funsigned-char command line option, + thanks to Gunther Jehle + * device/lib/Makefile.in: added the -f option to rm so it doesn't + prompt for file deletion a few hundred times (especially the + subversion files, which have ro permissions so it asks for + confirmation), thanks to Simon McAuliffe; + added {} + option to find in order to remove multiple files from a + single rm commad + +2007-02-02 Jesus Calvino-Fraga + + * device/include/mcs51/SST89x5xRDx.h: Added. + +2007-02-02 Raphael Neider + + * src/pic/glue.c (emitSymbolSet): check sym->etype before use + * src/regression/Makefile: use --no-pcode-opt, ignore failing tests + +2007-02-01 Raphael Neider + + * src/pic/glue.c (picglue,emitSymbolSet,showAllMemmaps): emit the + config words again + +2007-01-31 Borut Razem + + * support/Util/dbuf_string.h: added ATTRIBUTE_PRINTF to dbuf_printf() + if compiled with GCC. Thanks to Raphael Neider + +2007-01-31 Raphael Neider + + * src/pic/pcode.c (isValidIdChar,bankCompare): fuzzy matching of + operand names, handles name and (name + n) for all n, + (sameBank): restructured, also check bank allocation policy, + * src/pic/glue.c (emitPseudoStack): fixed printf arguments, + (pic14_operandsAllocatedInSameBank): check whether to operands + will be allocated into the same bank (i.e., section) to reduce + BANKSEL overhead, queried from pcode.c:sameBank, + (pic14printLocals): reintroduced clustering registers into a single + section: all compiler generated symbols will now reside in one + bank (per file), reducing BANKSEL overhead and code size, + (showAllMemmaps): use local dbuf where possible + +2007-01-29 Raphael Neider + + * src/pic/gen.c (popGetExternal): simplified, mark symbol as used, + (call_libraryfunc): retrieve/create symbol and mark as used, + (genFunction): mark defined functions as non-extern and add again + to code memmap for later output + * src/pic/glue.c (emitPseudoStack): put into own subroutine, + (pic14printLocals): reworked for new symbol emission, + (emitIfNew,pic14_constructAbsMap,emitIvalLabel,emitIvals,emitInitVal, + showAllMemmaps): reworked symbol output using dbufs, added handling + of string literals (still incomplete), + (picglue): removed symbol emission, moved into showAllMemmaps, + (emitSymbolSet): new workhorse for symbol output, + (pic14emitMaps,pic14printPublics,pic14printExterns): commented out + +2007-01-29 Borut Razem + + * src/SDCCmain.c, src/SDCCutil.c: dbuf_splitFile: file extension + component contains the extension separator. + +2007-01-28 Borut Razem + + * sim/ucsim/cmd.src/cmdutil.cc: NUL device is detected as CG_FILE type + on WIN32 + * src/SDCCdwarf2.c, src/SDCCglobl.h, src/SDCCmain.c, src/SDCCutil.c, + src/SDCCutil.h, src/avr/gen.c, src/ds390/gen.c, src/hc08/gen.c, + src/mcs51/gen.c, src/pic/device.c, src/pic/gen.c, src/pic/pcode.c, + src/pic/pcodepeep.c, src/pic/ralloc.c, src/pic16/device.h, + src/pic16/gen.c, src/pic16/main.c, src/pic16/pcode.c, + src/pic16/pcodepeep.c, src/pic16/ralloc.c, src/xa51/gen.c, + src/z80/gen.c, support/Util/MySystem.c: + accept slash and backslash as directory separator on WIN32 and + Cygwin ports + +2007-01-28 Raphael Neider + + * src/pic16/devices.inc, + * device/include/pic16/pic18f[24][23]21.h, + * device/include/pic16/pic18fregs.h, + * device/lib/pic16/libdev/pic18f[24][23]21.c, + * device/lib/pic16/pics.all: added support for the 18f[24][23]21 family + * device/lib/pic16/libio/adc.ignore, + * device/lib/pic16/libio/i2c.ignore, + * device/lib/pic16/libio/usart.ignore: do not build I/O lib for new + family, as gputils do not yet support the devices + * device/lib/pic16/Makefile.subdir: ignore errors on install + * support/scripts/inc2h-pic16.pl: script to generate pic16 device + headers and libraries from gputils .inc files + +2007-01-26 Paul Stoffregen + + * doc/sdccman.lyx: add printf_fast_f precision limitation note + +2007-01-26 Paul Stoffregen + + * doc/sdccman.lyx: add printf benchmarks + +2007-01-25 Paul Stoffregen + + * device/lib/printf_fast.c: fix %c, char promoted to int + * device/lib/printf_tiny.c: fix %c, char promoted to int + +2007-01-25 Paul Stoffregen + + * device/lib/printf_fast.c: fix float overflow check, bug #1525093 + +2007-01-25 Frieder Ferlemann + + * support/regression/tests/swap.c: 64 bit hosts failed + * doc/sdccman.lyx: added preliminary mcs51 printf feature matrix + +2007-01-25 Raphael Neider + + * src/pic/pcode.c (sameBank,FixRegisterBanking): optimize banksels + based on absolute register address, patch by Alex Blond + +2007-01-22 Raphael Neider + + * src/pic/glue.c (pic14emitRegularMap): mark initialized symbols as + emitted, do not emit them again... + +2007-01-22 Raphael Neider + + * src/regression/bank1.c, src/regression/compare6.c, + src/regression/add.c: cosmetic changes + * src/pic/pcode.h: moved GPTRTAG_* here from gen.c + * src/pic/gen.c: fixed global zero and one, + (aopForSym): removed unued code, + (aopGet): assert aop is defined, check and use `index' of + pCodeImmd operands (fixes #1630908), + * src/pic/pcode.c (get_op): added output of generic pointer tag, + (register_reassign): prevent accidental register unification, + (ReuseReg): cosmetic changes (also above) + * src/pic/glue.c (pic14_constructAbsMap,pic14emitRegularMap, + pic14emitStaticSeg): do not emit initialized data, + (printIval*): replaced with working versions, + (pic14createInterruptVect,picglue): use idata for initialized data, + now init data should work in all modules (not only main()), + * device/lib/pic/libsdcc/idata.c: NEW, handle initialized data + +2007-01-21 Borut Razem + + * sim/ucsim/configure.in: introduced macro DD_COPT_NO_IGNORE, + use -fPIC or -fpic if they are supported and not ignored + * src/SDCCval.c: fixed bug introduced by me in rev. #4577 + * support/cpp2/libcpp/lex.c: fixed gcc 4.1.1 warnings + +2007-01-20 Borut Razem + + * src/SDCC.lex, src/SDCCmain.c, sdc/SDCCglobl.h, doc/sdccman.lyx: + implemented RFE #1470316: allow "$" in variable names + +2007-01-20 Raphael Neider + + * device/include/pic/pic14regs.h: reverted accidental wipe of the file + +2007-01-20 Raphael Neider + + * device/lib/pic/libdev/devices.txt: device list for mkall.sh + * device/lib/pic/libdev/mkall.sh: script to rebuild all device libs + * device/lib/pic/libdev/pic14ports.txt: device PORT specifications + * support/scripts/inc2h.pl: fixed major .inc parsing bugs, + applied patch from Robert Tate (#1629249) to add PORTs and TRISs + * device/lib/pic/libdev/pic*.c, + * device/include/pic/pic*.h: regenerated with enhanced inc2h.pl + * device/lib/pic/libdev/Makefile.in: show progress + +2007-01-19 Bernhard Held + + * doc/sdccman.lyx: updated "configure options" for autoconf 2.6 + * support/scripts/sdcc_cygwin_mingw32, + * support/scripts/sdcc_mingw32, + * support/scripts/build.mak: replaced --datadir by --datarootdir for + conformance with autoconf 2.6 + +2007-01-19 Raphael Neider + + * src/pic/device.c (register_map): fixed list construction + * src/pic/gen.c (genDivOneByte,genModOneByte): accept result > 1 byte, + (genMod): removed case for genModbits, + (genModbits): removed as now unused/unimplemented + * src/pic/glue.c (picglue): prevent name clash with sources 'init.c' + +2007-01-18 Frieder Ferlemann + + * support/regression/tests/swap.c: added in response to #1638622 + * doc/sdccman.lyx: synced version, minor changes + +2007-01-18 Borut Razem + + * SDCClabel.c: fixed bug #1638651: wrong linenumber presented in warning, + thanks to Gunther Jehle + * src/asm.c: don't die if the file drfined in #line couldn't be opened + * src/SDCC.lex, src/SDCCglobal.h, src/SDCCicode.c, src/SDCCsymt.c, + src/SDCCval.c: removed redundant definitions of currFname and mylineno; + use filename in lineno instead. + * SDCCast.c: removed MSVC warning C4018: '==' : signed/unsigned mismatch, + print the file name in ast_print() + +2007-01-18 Borut Razem + + * support/Util/dbuf_string.c: removed (PTR) cast since it is not + defined in MSVC + * src/SDCC.lex: stringLiteral() returns const char pointer, + EOF detection in stringLiteral(), fixed asmbuf memory leak, + fixed column counting + * src/SDCCval.[ch]: constVal(), value *strVal() and charVal() + accept const char pointer as parameter + * src/SDCCdwarf2.c: corrected buffer size + +2007-01-17 Borut Razem + + * support/Util/dbuf_string.c: fixed for amd64 + +2007-01-15 Borut Razem + + * src/pic16/ralloc.c, src/pic/ralloc.c, src/SDCC.y: + removed terminal symbol ELIPSIS, since it was never generated by the + lexer and it was wrongly used in parameter_identifier_list rule + +2007-01-15 Raphael Neider + + * doc/sdccman.lyx: updated PIC14/16 command line args, updated PIC14 + code page and data banking description + * src/pic/genarith.c, + * src/pic/gen.h: removed bit arithmetic functions, + updated exit(1) to exit(EXIT_FAILURE) + * device/lib/pic16/libsdcc/stack/stack.S: default to 256 byte stack + * device/include/pic16/pic18f2455.h, + * device/lib/pic16/libdev/pic18f2455.c: added PORTD, LATD, LATE, + TRISD and TRISE, fixed/added some bit names + * device/lib/pic16/libdev/pic18f{2550,4550,4455}.c, + * device/include/pic16/pic18f{2550,4550,4455}.h: simply include + updated pic18f2455.{c,h} instead of duplicating them + +2007-01-14 Borut Razem + + * as/mcs51/asnoice.c, as/hc08/asnoice.c: fixed bug #1447412: + Cannot debug files that contain spaces in the path name + by converting spaces in asm file name to underscores + +2007-01-13 Borut Razem + + * doc/sdccman.lyx: fixed format errors + +2007-01-10 Borut Razem + + * src/SDCC.lex, src/SDCCmain.c: fixed bug #1631895: + codeseg/constseg #pragma fail + * suppoprt/cpp2/Makefile.bcc: reenable Borland C compilation + * suppoprt/cpp2/configure.in, suppoprt/cpp2/libcpp/lex.c, + suppoprt/cpp2/Makefile.in, suppoprt/cpp2/sdcpp-opts, + suppoprt/cpp2/sdcpp.[ch]: house cleaning + +2007-01-09 Borut Razem + + * get rid of diagnistic.[ch], pretty-print.[ch], + c-pretty-print.[ch], ... used just for error, warning, ... + message formatting + * suppoprt/cpp2/pretty-print.[ch], suppoprt/cpp2/diagnostic.[ch], + suppoprt/cpp2/diagnostic.def, suppoprt/cpp2/input.h, + suppoprt/cpp2/pretty-print.[ch]: + removed + * suppoprt/cpp2/Makefile.in, suppoprt/cpp2/opts.c, + suppoprt/cpp2/sdcpp-opts.c, suppoprt/cpp2/sdcpp.[ch], + suppoprt/cpp2/sdcpp.dsp: + changed + +2007-01-08 Maarten Brock + + * device/lib/printf_large.c (output_float): removed recursion, + use smaller buffer on stack for mcs51, + fixed bug printing 1.96 + * support/regression/tests/snprintf.c: added test + +2007-01-07 Borut Razem + + * use dynamic memory buffers instead temporary files + * support/Util/dbuf_string.c, support/Util/dbuf_string.h: + added + * src/Makefile.in, src/SDCC.lex, src/SDCCast.c, src/SDCCast.h, + src/SDCCcse.c, src/SDCCglobl.h, src/SDCCglue.c, src/SDCCglue.h, + src/SDCCicode.c, src/SDCCicode.h, src/SDCCmain.c, src/SDCCmem.c, + src/SDCCmem.h, src/SDCCpeeph.c, src/SDCCpeeph.h, src/SDCCsymt.c, + src/SDCCsymt.h, src/SDCCutil.c, src/asm.c, src/asm.h, src/avr/gen.c, + src/avr/main.c, src/ds390/gen.c, src/ds390/main.c, src/hc08/gen.c, + src/hc08/main.c, src/izt/gen.c, src/mcs51/gen.c, src/mcs51/main.c, + src/pic/device.c, src/pic/gen.c, src/pic/glue.c, src/pic/main.c, + src/pic/ralloc.c, src/pic16/gen.c, src/pic16/glue.c, + src/pic16/main.c, src/pic16/ralloc.c, src/port.h, src/src.dsp, + src/xa51/gen.c, src/xa51/main.c, src/z80/gen.c, src/z80/main.c, + support/Util/dbuf.c, support/Util/dbuf.h: + modified + * .version, sdcc.spec: bumped version to 2.6.4 + +2007-01-07 Maarten Brock + + * src/port.h: added TARGET_Z80_LIKE macro + * src/SDCCmain.c (linkEdit): use TARGET_Z80_LIKE, + output PSEG location if --xram-loc or --xstack-loc was used + * as/link/mcs51/lkarea.c (lnksect2): set segment address afterwards + +2007-01-07 Maarten Brock + + * as/as_gbz80.dsp, as/z80/as_gbz80.dsp, + * as/as_z80.dsp, as/z80/as_z80.dsp, + * as/asx8051.dsp, as/mcs51/asx8051.dsp, + * sdcc.dsw: moved project files into subdir + * as/hc08/as_hc08.dsp, + * as/hc08/Makefile.bcc, + * as/hc08/Makefile.in, + * as/mcs51/Makefile.bcc, + * as/mcs51/Makefile.in, + * as/z80/Makefile.bcc, + * as/z80/Makefile.in, + * as/link/mcs51/Makefile.bcc: use as/strcmpi.c + * as/hc08/asm.h, + * as/mcs51/asm.h, + * as/z80/asm.h: added as_strcmpi() and as_strncmpi() prototypes + * as/hc08/asmain.c, + * as/hc08/assym.c, + * as/mcs51/asmain.c, + * as/mcs51/assym.c, + * as/z80/assym.c: removed include "strcmpi.h" + * as/hc08/strcmpi.c, + * as/hc08/strcmpi.h, + * as/mcs51/strcmpi.c, + * as/mcs51/strcmpi.h, + * support/Util/strcmpi.c, + * support/Util/strcmpi.h: removed files + * as/strcmpi.c: added as_strncmpi() + +2007-01-05 Jesus Calvino-Fraga + + * sdcc.dsw: Added some dependencies on project config.dsp + +2007-01-05 Maarten Brock + + * as/link/mcs51/lkarea.c (lnkarea2, lnksect2): replaced [di]seg_ap->a_addr + with [di]ram_start to fix a regresion + +2007-01-03 Bernhard Held + + * configure.in: added missing mcs51 in status output + * Makefile.in: add support/regression to SDCC_EXTRA to distclean this + directory + * debugger/mcs51/clean.mk (distclean): remove config.h + * src/clean.mk (clean): remove SDCCy.c, SDCCy.h, SDCClex.c + * support/cpp2/Makefile.in (clean): remove s-options, optionlist, + options.h, s-options-h and options.c + * support/cpp2/clean.mk: unused, removed + * Makefile.common.in, + * main_in.mk, + * as/Makefile.in, + * as/hc08/Makefile.in, + * as/hc08/clean.mk, + * as/mcs51/Makefile.in, + * as/mcs51/clean.mk, + * as/z80/clean.mk, + * as/z80/conf.mk, + * as/z80/Makefile.in, + * as/z80/clean.mk, + * as/link/Makefile.in, + * as/link/hc08/Makefile.in, + * as/link/hc08/clean.mk, + * as/link/mcs51/Makefile.in, + * as/link/mcs51/clean.mk, + * as/link/z80/Makefile.in, + * as/link/z80/clean.mk, + * as/link/z80/conf.mk, + * debugger/mcs51/Makefile.in, + * debugger/mcs51/clean.mk, + * device/include/Makefile.in, + * device/lib/Makefile.in, + * device/lib/mcs51/Makefile.in, + * device/lib/pic/Makefile.in, + * device/lib/pic/Makefile.common.in, + * device/lib/pic/Makefile.subdir, + * device/lib/pic/Makefile.rules, + * device/lib/pic16/libio/Makefile.in, + * device/lib/pic16/Makefile.subdir, + * device/lib/pic16/libdev/Makefile.in, + * device/lib/pic16/Makefile.rules, + * device/lib/pic16/Makefile.common.in, + * sim/ucsim/avr.src/Makefile.in, + * sim/ucsim/main_in.mk, + * sim/ucsim/cmd.src/Makefile.in, + * sim/ucsim/doc/Makefile.in, + * sim/ucsim/gui.src/Makefile.in, + * sim/ucsim/gui.src/obsolete/portmon.src/Makefile.in, + * sim/ucsim/gui.src/serio.src/Makefile.in, + * sim/ucsim/hc08.src/Makefile.in, + * sim/ucsim/libltdl/Makefile.in, + * sim/ucsim/s51.src/Makefile.in, + * sim/ucsim/sim.src/Makefile.in, + * sim/ucsim/sim.src/conf.mk, + * sim/ucsim/xa.src/Makefile.in, + * sim/ucsim/z80.src/Makefile.in, + * src/Makefile.in, + * src/clean.mk, + * src/port.mk, + * support/cpp2/Makefile.in, + * support/librarian/Makefile.in, + * support/librarian/clean.mk, + * support/makebin/Makefile.in, + * support/makebin/clean.mk, + * support/packihx/Makefile.in, + * support/regression/Makefile.in, + * support/regression/ports/ds390/spec.mk, + * support/regression/ports/gbz80/spec.mk, + * support/regression/ports/hc08/spec.mk, + * support/regression/ports/mcs51/spec.mk, + * support/regression/ports/mcs51-large/spec.mk, + * support/regression/ports/mcs51-medium/spec.mk, + * support/regression/ports/mcs51-xstack-auto/spec.mk, + * support/regression/ports/pic14/spec.mk, + * support/regression/ports/pic16/spec.mk, + * support/regression/ports/mcs51-stack-auto/spec.mk, + * support/regression/ports/ucz80/spec.mk, + * support/regression/ports/xa51/spec.mk, + * support/regression/ports/z80/spec.mk: fixed for autoconf 2.6x by + adding a slash after $(top_builddir) and/or adding @datarootdir@ + * configure.in, + * debugger/mcs51/configure.in, + * device/lib/pic/configure.in, + * device/lib/pic16/configure.in, + * sim/ucsim/configure.in, + * support/cpp2/configure.in, + * support/packihx/configure.in: changed AC_PREREQ to 2.60 + * configure, + * debugger/mcs51/configure, + * device/lib/pic/configure, + * device/lib/pic16/configure, + * sim/ucsim/configure, + * support/cpp2/configure, + * support/packihx/configure: generated with autoconf 2.60 + +2007-01-02 Maarten Brock + + * as/link/hc08/lkihx.c (newArea), + * as/link/hc08/lkrloc.c: renamed newArea() to ihxNewArea() + +2007-01-02 Borut Razem + + * doc/sdccman.lyx: documented #pragma sdcc_hash + * support/cpp2/sdcpp.c: allow_naked_hash (value of #pragma sdcc_hash) + initialized to 0 + * support/cpp2/c-ppoutput.c: fixed warning: no newline at end of file + +2007-01-01 Bernhard Held + + * src/SDCCast.c (createDo): backPatchLabels() needs falseLabel in + empty 'while'-loop to work correctly, see regression test 'while.c' + * support/regression/tests/while.c: added + +2007-01-01 Borut Razem + + * support/cpp2/libcpp/directives.c, support/cpp2/libcpp/identifiers.c, + support/cpp2/libcpp/init.c, support/cpp2/libcpp/sdcpp-opts.c, + support/cpp2/libcpp/sdcpp.c: + sdcpp specific pragma/directive/option handling moved to sdcpp.c + * doc/sdccman.lyx: reference to the GCC 4.1.1 CPP Manual + * support/cpp2/libcpp/mkdeps.c: synchronized with GCC CPP 4.1.1 + +2006-12-31 Borut Razem + + * SDCPP synchronized with GCC CPP release version 4.1.1, + currently the latest release: + * support/cpp2/libcpp, support/cpp2/libcpp/include, + support/cpp2/libcpp/include/cpp-id-data.h + support/cpp2/libiberty/fopen_unlocked.c + support/cpp2/libiberty/md5.c + support/cpp2/md5.h + support/cpp2/opt-functions.awk + support/cpp2/opt-gather.awk + support/cpp2/optc-gen.awk + support/cpp2/opth-gen.awk: + added + * support/cpp2/Makefile.in, support/cpp2/auto-host_vc_in.h, + support/cpp2/c-incpath.c, support/cpp2/c-incpath.h, + support/cpp2/c-ppoutput.c, support/cpp2/c-pretty-print.c, + support/cpp2/c-pretty-print.h, support/cpp2/cppdefault.c, + support/cpp2/cppdefault.h, support/cpp2/diagnostic.c, + support/cpp2/diagnostic.h, support/cpp2/except.h, + support/cpp2/hwint.h, support/cpp2/input.h, + support/cpp2/intl.h, support/cpp2/move-if-change, + support/cpp2/opts.c, support/cpp2/opts.h, + support/cpp2/output.h, support/cpp2/prefix.c, + support/cpp2/prefix.h, support/cpp2/pretty-print.c, + support/cpp2/pretty-print.h, support/cpp2/sdcpp-opts.c, + support/cpp2/sdcpp.c, support/cpp2/sdcpp.dsp, + support/cpp2/sdcpp.h, support/cpp2/sdcpp.opt, + support/cpp2/sdcppa.dsp, support/cpp2/symcat.h, + support/cpp2/version.c: + modified + * support/cpp2/libcpp/charset.c, support/cpp2/libcpp/directives.c, + support/cpp2/libcpp/errors.c, support/cpp2/libcpp/expr.c, + support/cpp2/libcpp/files.c, support/cpp2/libcpp/identifiers.c, + support/cpp2/libcpp/include/cpplib.h, support/cpp2/libcpp/include/line-map.h, + support/cpp2/libcpp/include/mkdeps.h, support/cpp2/libcpp/include/symtab.h, + support/cpp2/libcpp/init.c, support/cpp2/libcpp/internal.h, + support/cpp2/libcpp/lex.c, support/cpp2/libcpp/line-map.c, + support/cpp2/libcpp/macro.c, support/cpp2/libcpp/mkdeps.c, + support/cpp2/libcpp/symtab.c, support/cpp2/libcpp/system.h, + support/cpp2/libcpp/traditional.c, support/cpp2/libcpp/ucnid.h, + support/cpp2/libiberty/hashtab.c, support/cpp2/libiberty/hashtab.h: + moved + * support/cpp2/cppcharset.c, support/cpp2/cpperror.c, + support/cpp2/cppexp.c, support/cpp2/cppfiles.c, + support/cpp2/cpphash.c, support/cpp2/cpphash.h, + support/cpp2/cppinit.c, support/cpp2/cpplex.c, + support/cpp2/cpplib.c, support/cpp2/cpplib.h, + support/cpp2/cppmacro.c, support/cpp2/cpptrad.c, + support/cpp2/cppucnid.h, support/cpp2/hashtab.c, + support/cpp2/hashtab.h, support/cpp2/hashtable.c, + support/cpp2/hashtable.h, support/cpp2/line-map.c, + support/cpp2/line-map.h, support/cpp2/mkdeps.c, + support/cpp2/mkdeps.h, support/cpp2/options_vc_in.c, + support/cpp2/options_vc_in.h, support/cpp2/opts.sh, + support/cpp2/system.h: + deleted / moved + +2006-12-31 Borut Razem + + * configure.in, configure: fixed bug #1538756: configure dies if bison + and flex are not installed, 2nd try + +2006-12-30 Bernhard Held + + * src/mcs51/peeph.def: renamed rule 400 to 500, moved rule 253.x to + 400.x for better code in RFE 899102 + +2006-12-30 Bernhard Held + + * src/SDCCpeeph.c (deadMove), + * src/port.h, + * src/mcs51/peep.h: renamed 'op' by 'reg' + * src/mcs51/peep.c (isFunc, isCallerSaveFunc): added, + (scan4op): small change for removeDeadMove(), added support for + 'callee saves' and/or PACLL function calls, + (removeDeadMove): added, removes superflous 'mov r%1,%2', + (removeDeadPopPush): renamed from mcs51DeadMove(), common parts + left in new dispatcher mcs51DeadMove() + (mcs51DeadMove): dispatcher for removeDeadPopPush() and new + removeDeadMove() + * src/mcs51/peeph.def: added rule 301 removing superflous 'mov r%1,%2' + +2006-12-30 Jesus Calvino-Fraga + + * support/cpp2/options_vc_in.h, support/cpp2/options_vc_in.c, + support/cpp2/sdcppa.dsp: create 'options.h' and 'options.c' under MSVC. + +2006-12-30 Borut Razem + + * support/cpp2/spacs.h: deleted from svn + * configure.in, configure: fixed bug #1538756: configure dies if bison + and flex are not installed + +2006-12-29 Maarten Brock + + * src/z80/gen.c (assignResultValue): fixed bug when registers overlap, + with this z80 passes printf float test when enabled + * support/regression/tests/bug1057979.c: typo disabled ds390 float test + +2006-12-28 Borut Razem + + * support/cpp2/config.in, support/cpp2/configure.in, + support/cpp2/configure, support/cpp2/Makefile.in: + fix for the solaris build + +2006-12-27 Erik Petrich + + * src/SDCC.y (type_specifier2, pointer), + * src/SDCCsymt.h, + * src/SDCCsymt.c (mergeSpec, checkSClass), + * support/Util/SDCCerr.c, + * support/Util/SDCCerr.h: Parse and validate the restrict keyword + * support/valdiag/valdiag.py: Allow test cases to specify + required language standard + * support/valdiag/tests/restrict.c: New file to test restrict keyword + * support/valdiag/tests/tentdecl.c: Supress empty source file error + +2006-12-27 Borut Razem + + * support/cpp2/cppmain.c, support/cpp2/mbchar.[ch]: removed + * support/cpp2/libiberty/Makefile.in, support/cpp2/libiberty/sdcpp.dsp: + mbchar removed + * support/cpp2/libiberty/getpwd.c, support/cpp2/sdcpp.h: + fixed for borland C + * support/cpp2/libiberty/Makefile.bcc: updated + * src/pic16/main.c: fixed #pragma udata handling + * src/mcs51/mcs51.dsp: added peep.[ch] to the project + +2006-12-26 Bernhard Held + + * src/SDCCpeeph.c: made labelHashEntry global, + made pcDistance, FBYNAME static, + (pcDistance): made static, use isComment and isLabel, + (deadMove): added, + (getLabelRef): added, extracted from labelRefCount(), + (labelRefCount): use new getLabelRef(), + (callFuncByName): made static, added deadMove, + use isComment and isLabel, + (newPeepRule): made static, set isLabel, + (isLabelDefinition): added parameter isPeepRule to allow '%' in + labels from peephole rules, + (buildLabelRefCountHash): speed up by running isLabelDefinition() only + when isComment or isLabel is set + * src/SDCCpeeph.h: added "isLabel" and "visited" to struct lineNode, + added labelHashEntry, isLabelDefinition, labelHash and getLabelRef + to make them global + * src/mcs51/peep.h: added + * src/mcs51/peep.c: added, implements mcs51DeadMove() + * src/port.h: added peep->deadMove to port structure + * src/mcs51/main.c: initialize peep->deadMove with mcs51DeadMove + * src/mcs51/peeph.def: renumbered rule 300 to 400, added new rule 300 + deadMove, finally removed no. 1 and 2 + * src/mcs51/gen.c, + * src/pic/gen.c, + * src/z80/gen.c, + * src/z80/ralloc.c, + * src/pic16/gen.c, + * src/ds390/gen.c, + * src/hc08/gen.c: mark lines with isComment or isLabel + * sim/ucsim/s51.src/uc390hw.cc: don't waist 65535 ticks before CKRDY + * .version, + * sdcc.spec: bumped version to 2.6.3 + +2006-12-26 Borut Razem + + * support/cpp2/Makefile.in: added dependency on options.h + * configure: regenerated + * support/cpp2/sdcpp.opt, support/cpp2/move-if-change: svn:eol-style native + * support/cpp2/Makefile.in: added vasprintf.c + +2006-12-25 Borut Razem + + * SDCPP synchronized with GCC CPP release version 3.4.6, + the latest release before 4.x: + * support/cpp2/Makefile.in, support/cpp2/config.h, + support/cpp2/configure, support/cpp2/configure.in, + support/cpp2/cppdefault.c, support/cpp2/cppdefault.h, + support/cpp2/cpperror.c, support/cpp2/cppexp.c, + support/cpp2/cppfiles.c, support/cpp2/cpphash.c, + support/cpp2/cpphash.h, support/cpp2/cppinit.c, + support/cpp2/cpplex.c, support/cpp2/cpplib.c, + support/cpp2/cpplib.h, support/cpp2/cppmacro.c, + support/cpp2/cpptrad.c, support/cpp2/except.h, + support/cpp2/hashtable.c, support/cpp2/hashtable.h, + support/cpp2/hwint.h, support/cpp2/intl.h, + support/cpp2/line-map.c, support/cpp2/line-map.h, + support/cpp2/mkdeps.c, support/cpp2/mkdeps.h, + support/cpp2/output.h, support/cpp2/prefix.c, + support/cpp2/prefix.h, support/cpp2/sdcpp.dsp, + support/cpp2/system.h, support/cpp2/version.c: + modified + * support/cpp2/c-incpath.c, support/cpp2/c-incpath.h, + support/cpp2/c-ppoutput.c, support/cpp2/c-pretty-print.c, + support/cpp2/c-pretty-print.h, support/cpp2/cppcharset.c, + support/cpp2/cppucnid.h, support/cpp2/diagnostic.c, + support/cpp2/diagnostic.def, support/cpp2/diagnostic.h, + support/cpp2/hashtab.c, support/cpp2/hashtab.h, + support/cpp2/input.h, support/cpp2/libiberty/getpwd.c, + support/cpp2/libiberty/vasprintf.c, support/cpp2/libiberty/xmemdup.c, + support/cpp2/move-if-change, support/cpp2/opts.c, + support/cpp2/opts.h, support/cpp2/opts.sh, + support/cpp2/pretty-print.c, support/cpp2/pretty-print.h, + support/cpp2/sdcpp.opt, support/cpp2/sdcpp-opts.c, + support/cpp2/win32, support/cpp2/win32/dirent.c, + support/cpp2/win32/dirent.h: + added + * support/cpp2/sdcpp.c: renamed from sdcppmain.c + * support/cpp2/sdcpp.h: renamed from sdcc.h + * sdcppinit.c: deleted + +2006-12-23 Borut Razem + + * support/cpp2/cpphash.h, support/cpp2/cpplex.c, + support/cpp2/cpplib.[ch], support/cpp2/sdcppinit.c, doc/sdccman.lyx, + preproc.c: an other try to fix bug #982435: introduced + -pedantic-parse-number command line option and pedantic_parse_number + pragma + +2006-12-21 Maarten Brock + + * as/link/mcs51/lkarea.c (lnkarea2): handle absolute areas, restructured + BSEG handling, + (lnksect2): use --data-loc and --idata-loc as lower bound for ramstart, + corrected overlayed areax addresses, warn about memory overlaps + * as/mcs51/asmain.c (asmbl): create a new area for every .org directive + * src/avr/main.c, + * src/ds390/main.c, + * src/hc08/main.c, + * src/mcs51/main.c, + * src/pic16/main.c, + * src/pic/main.c, + * src/xa51/main.c, + * src/z80/main.c, + * src/port.h: added xabs_name and iabs_name + * src/SDCCglue.c (emitRegularMap): allocate for absolutes with initializer + (glue, emitMaps): create and emit maps d_abs and i_abs + * src/SDCCglue.h: cosmetic changes + * src/SDCCmain.c (setDefaultOptions): idata can start below 0x80 + * src/SDCCmem.h, + * src/SDCCmem.c (initMem): added x_abs, i_abs and d_abs + (allocDefault): put absolute, initialized globals in them + * support/regression/tests/absolute.c: added absolute bdata test + * device/lib/printf_large.c (output_float): moved fpBuffer to stack/xdata + +2006-12-20 Borut Razem + + * support/cpp2/cpphash.h, support/cpp2/cpplex.c: fixed bug #982435 + * support/regression/tests/preproc.c: renamed from bug-1351710.c, + added regression test for bug #982435 + +2006-12-18 Borut Razem + + * src/SDCCutil.c: fixed a bug in (get_pragma_token) + * src/pic16/main.c, src/SDCC.lex, src/z80/main.c: + small cosmetic changes + * src/SDCC.lex: (stringLiteral) fixed bug #1351710 + * support/regression/tests/bug-1351710.c: added regression test + +2006-12-18 Frieder Ferlemann + + * doc/sdccman.lyx: added the long missed iCode table + "", added links to wiki + +2006-12-17 Borut Razem + + * doc/sdccman.lyx, src/pic16/main.c, src/pic/main.c, src/port.h, + src/SDCC.lex, src/SDCCutil.[ch], src/z80/main.c, + support/Util/SDCCerr.[ch]: removed deprecated pragmas, + unified table driven pragma handling, pragma argument type checking + * support/Util/dbuf.c: (dbuf_set_size) allow to set size equal to the + current one - version 1.1.3 + * src/SDCCmain.c: (setParseWithComma) substituted brain damaged strtok + +2006-12-13 Raphael Neider + + * src/pic/device.h: removed AssignedMemory structure and macros + * src/pic/device.c: removed global finalMapping (linker assigns + memory locations), + (register_map): add SFRs to remembered memRanges + (addMemRange,isSFR,dump_map,dump_sfr,mapRegister,assignRegister, + assignFixedRegisters,assignRelocatableRegisters): removed, + (setMaxRAM,validAddress): adapted accordingly, + (pic14_hasSharebank,pic14_getSharedStack): only report and use + reasonably sized sharebanks, + * src/pic/ralloc.c (writeUsedRegs): stripped down (remove?), + (allDefsOutOfRange): removed unused code, + * src/pic/main.c (_process_pragma): removed memmap/maxram pragma + handling + * src/pic/pcode.c (register_reassign): removed recursion warning, + fired far too often, + * src/pic/glue.c (emitSymbolToFile,pic14_constructAbsMap): modified + to use existing pic14_stringInSet() to avoid duplicate symbols, + tidied up the code a bit, + (pic14printLocals): added in symmetry to printExterns, replaces + writeUsedRegs more or less, + (picglue): call new pic14_printLocals(), + * device/include/pic/pic*.h: removed #pragma memmap directives, + information gathered from include/pic/pic14devices.txt + * support/scripts/inc2h.pl: do not emit #pragma memmap lines + +2006-12-10 Maarten Brock + + * device/include/mcs51/C8051F520.h: fixed buggy CPT0MX + +2006-12-11 Jesus Calvino-Fraga + + * device/include/mcs51/cc2430.h: fixed missing ';' + +2006-12-10 Raphael Neider + + * device/lib/pic16/libc/stdio/vfprintf.c, + * device/lib/pic16/libc/stdio/printf_small.c, + * device/lib/pic16/libc/stdio/printf_timy.c: pop int from stack for + char arguments, as char varargs are cast to int by the caller, + hopefully fixes #1604915 (other device libraries are still affected) + +2006-12-10 Erik Petrich + + * src/mcs51/ralloc.c (packRegsForAssign), + * src/hc08/ralloc.c (packRegsForAssign): fixed bug #1605880 + +2006-12-10 Maarten Brock + + * device/include/malloc.h: removed init_dynamic_memory + * device/lib/malloc.c: made init_dynamic_memory static and automatically + call it once from malloc. Also use _sdcc_heap[] from _heap.c + * device/lib/_heap.c: new, added, contains _sdcc_heap[] + * device/lib/libsdcc.lib, + * device/lib/Makefile.in, + * support/regression/ports/mcs51-xstack-auto/spec.mk: added _heap.c + * doc/sdccman.lyx: documented use of new _heap.c + * support/regression/tests/malloc.c: removed init_dynamic_memory + * src/cdbFile.c(spacesToUnderscores): new function, + (cdbWriteEndFunction, cdbWriteCLine): use spacesToUnderscores, fixes bug + 1068030 + * device/include/tinibios.h: removed defines for putchar and getchar + * device/lib/ds390/Makefile.in: added putchar.c + * device/lib/ds390/putchar.c: new, added, fixes bug 1465671 + +2006-12-09 Borut Razem + + * support/cpp2/sdcc.h: prevent multiple inclusion + * support/cpp2/options.h: deleted + +2006-12-08 Borut Razem + + * support/cpp2/sdcc.h: removed x*alloc() macros + * support/cpp2/libiberty.h: uncommented out x*alloc() declarations + * support/cpp2/Makefile.bcc, support/cpp2/Makefile.in, + support/cpp2/sdcpp.sdc: x*alloc files added to the project + * support/cpp2/system.h: moved #include "sdcc.h" + * support/cpp2/libiberty/xexit.c, support/cpp2/libiberty/xmalloc.c, + support/cpp2/libiberty/xstrdup.c, support/cpp2/libiberty/xstrerror.c: + added + * support/cpp2/sdcppinit.c: added -isysroot, -fsigned-char, + -funsigned-char options + * support/cpp2/sdcppmain.c: fixed bug 1611411 + +2006-12-07 Borut Razem + + * support/cpp2/cpplib.c: reverted sdcpp special handling of _Pragma() + directive + +2006-12-06 Maarten Brock + + * src/SDCCsymt.c (addDecl): fixed bug 1609244 + * src/SDCCmain.c (linkEdit): fixed bug 1609279 + * doc/sdccman.lyx, + * .version: bumped to 2.6.2 because a) it's been a while + b) the linker sources have moved c) the preprocessor is upgraded + +2006-12-04 Frieder Ferlemann + + * support/regression/tests/snprintf.c: some checks + * lib/src/printf_large.c: %bc: read char instead of int from stack + +2006-12-03 Maarten Brock + + * device/include/mcs51/cc2430.h: inserted _XPAGE + +2006-12-02 Jesus Calvino-Fraga + + * device/include/mcs51/cc2430.h: added + +2006-12-02 Maarten Brock + + * device/include/asm/default/features.h, + * device/include/asm/ds390/features.h, + * device/include/mcs51/at89s53.h, + * device/include/ser.h, + * device/include/ser_ir.h, + * device/include/serial.h: changed keywords to double underscore variants, + fixes bug 1590261 some more, thanks Steven Borley + +2006-12-01 Raphael Neider + + * src/pic/pcode.c (register_reassign): do not crash on recursive code + but emit warning (recursion is not supported for pic14) + +2006-11-30 Frieder Ferlemann + + * src/mcs51/peeph.def: added 101.a,b (moves to int/long xdata) + * doc/sdccman.lyx: various small changes, acknowledged Sourceforge + +2006-11-30 Raphael Neider + + * src/pic/device.c (dump_sfr): always emit symbols + * src/pic/glue.c (pic14printPublics): fixed typo + +2006-11-30 Raphael Neider + + * src/pic/device.c (create_pic,ram_map): add memRange entries to PIC + (pic14_getSharebankSize, pic14_getSharebankAddress): replaced with + (pic14_hasSharebank,pic14_isShared,pic14_allRAMShared, + pic14_getSharedStack): NEW, evaluate the memRange entries to locate + a sharebank, use a non-shared bank for the stack if none available + * src/pic/device.h (struct memRange): added linked list next field, + added prototypes for above functions + * src/pic/ralloc.c (initStack): handle shared and banked stacks, + (typeRegWithIdx): accept fixed and unfixed stack registers + * src/pic/pcode.c (pCodeInitRegisters): use new functions to create + the stack, handle shared and banked stack (except for WSAVE), + (insertBankSel): removed useless optimization (will never fire), + (FixRegisterBanking): added optimization for devices with only one + possibly aliased bank of memory, like 16f84 + * src/pic/glue.c (pic14_constructAbsMap): back to udata_ovr, as some + devices have no SHAREBANK in the linker script + * device/include/pic/pic14devices.txt: documented memmap + * device/lib/pic/libdev/Makefile.in: removed --stack-loc again + +2006-11-30 Erik Petrich + + * src/hc08/gen.c (transferRegReg, loadRegFromAop, forceStackedAop, + storeRegToAop, freeAsmop, genPlusIncr, genPlus, genPointerGetSetOfs, + genAnd, genOr, genXor, genLeftShiftLiteral, genRightShiftLiteral, + genhc08Code): switched most of the D (debug) macros to DD (detailed + debug) macros to better control clutter in the generated .asm file. + * src/hc08/gen.c: (forceStackedAop, genUminus, genLeftShift, + genRightShift): fixed bug with non-constant bit shift stored to + a volatile result (SF Open Discussion forum thread #1616749). + Single byte case is not yet optimized. + +2006-11-28 Maarten Brock + + * device/include/asm/mcs51/features.h, + * device/include/malloc.h, + * device/include/stdio.h: changed keywords to double underscore variants, + fixes bug 1590261 + +2006-11-27 Borut Razem + + * support/cpp2/cppexp.c, support/cpp2/hashtable.h, + support/cpp2/Makefile.in, support/cpp2/cppfiles.c, + support/cpp2/output.h, support/cpp2/cppinit.c, + support/cpp2/cpplib.c, support/cpp2/cpplib.h, + support/cpp2/Makefile.bcc, support/cpp2/cpphash.c, + support/cpp2/cppdefault.c, support/cpp2/system.h, + support/cpp2/cpphash.h, support/cpp2/cpplex.c, + support/cpp2/cppdefault.h, support/cpp2/mbchar.c, + support/cpp2/prefix.c, support/cpp2/except.h, + support/cpp2/hwint.h, support/cpp2/cppmacro.c, + support/cpp2/line-map.h, support/cpp2/sdcpp.dsp, + support/cpp2/sdcc.h, support/cpp2/mkdeps.c, + support/cpp2/version.c, support/cpp2/cppmain.c, + support/cpp2/version.h, support/cpp2/hashtable.c, + support/cpp2/cpperror.c: + synchronized with GCC CPP release version 3.3.6, + the latest where cppmain.c still exists. + * support/cpp2/cpptrad.c, support/cpp2/sdcppmain.c, + support/cpp2/sdcppinit.c: added + +2006-11-27 Borut Razem + + * support/cpp2/cpplex.c: + fixed _asm ... _endasm handling bug, introduce with GCC CPP + synchronization + * support/cpp2/cpplib.c: removed definitions of unused variables + +2006-11-26 Borut Razem + + * support/cpp2/libiberty.h: commented out x*alloc() declarations + since they are redefined by macros in support/cpp2/sdcc.h + * support/cpp2/sdcc.h: x*alloc macro redefinition + +2006-11-25 Borut Razem + + * support/cpp2/cppexp.c, support/cpp2/hashtable.h, + support/cpp2/configure, support/cpp2/Makefile.in, + support/cpp2/cppfiles.c, support/cpp2/output.h, + support/cpp2/cppinit.c, support/cpp2/cpplib.c, + support/cpp2/config.h, support/cpp2/cpplib.h, + support/cpp2/Makefile.bcc, support/cpp2/cpphash.c, + support/cpp2/cppdefault.c, support/cpp2/config.in, + support/cpp2/system.h, support/cpp2/cpplex.c, + support/cpp2/cpphash.h, support/cpp2/mbchar.c, + support/cpp2/cppdefault.h, support/cpp2/prefix.c + support/cpp2/hwint.h, support/cpp2/mbchar.h, + support/cpp2/prefix.h, support/cpp2/cppmacro.c, + support/cpp2/configure.in, support/cpp2/intl.h, + support/cpp2/sdcpp.dsp, support/cpp2/acconfig.h, + support/cpp2/sdcc.h, support/cpp2/mkdeps.c, + support/cpp2/version.c, support/cpp2/cppmain.c, + support/cpp2/ansidecl.h, support/cpp2/libiberty.h, + support/cpp2/hashtable.c, support/cpp2/aclocal.m4, + support/cpp2/cpperror.c, + support/cpp2/libiberty/safe-ctype.c, + support/cpp2/libiberty/safe-ctype.h, + support/cpp2/libiberty/splay-tree.c, + support/cpp2/libiberty/obstack.c, + support/cpp2/libiberty/lbasename.c, + support/cpp2/libiberty/splay-tree.h, + support/cpp2/libiberty/obstack.h: + synchronized with GCC CPP release version 3.2.3, + the latest before integration of cpp into gcc + * support/cpp2/except.h, support/cpp2/line-map.c, + support/cpp2/line-map.h, + support/cpp2/libiberty/hex.c, + support/cpp2/libiberty/concat.c, + support/cpp2/libiberty/filenames.h: added + * support/cpp2/intl.c: deleted + +2006-11-24 Borut Razem + + * src/SDCC.y: enabled compilation of empty source file + * support/Util/SDCCerr.[ch]: added sdcc warning 190 - + "ISO C forbids an empty source file" + * device/lib/_startup.c, device/lib/printf_tiny.c: disable warning 190 + if all the code is ifdefed out. + +2006-11-24 Erik Petrich + + * src/hc08/gen.c (genPcall): fix for bug #1601032 + +2006-11-23 Maarten Brock + + * device/include/mcs51/c8051f000.h, device/include/mcs51/C8051F000.h, + * device/include/mcs51/c8051f018.h, device/include/mcs51/C8051F018.h, + * device/include/mcs51/c8051f020.h, device/include/mcs51/C8051F020.h, + * device/include/mcs51/c8051f040.h, device/include/mcs51/C8051F040.h, + * device/include/mcs51/c8051f060.h, device/include/mcs51/C8051F060.h, + * device/include/mcs51/c8051f120.h, device/include/mcs51/C8051F120.h, + * device/include/mcs51/c8051f200.h, device/include/mcs51/C8051F200.h, + * device/include/mcs51/c8051f300.h, device/include/mcs51/C8051F300.h, + * device/include/mcs51/c8051f310.h, device/include/mcs51/C8051F310.h, + * device/include/mcs51/c8051f320.h, device/include/mcs51/C8051F320.h, + * device/include/mcs51/c8051f326.h, device/include/mcs51/C8051F326.h, + * device/include/mcs51/c8051f330.h, device/include/mcs51/C8051F330.h, + * device/include/mcs51/c8051f340.h, device/include/mcs51/C8051F340.h, + * device/include/mcs51/c8051f350.h, device/include/mcs51/C8051F350.h, + * device/include/mcs51/c8051f410.h, device/include/mcs51/C8051F410.h: + Renamed to all upper case as per the standard set by SiLabs + +2006-11-23 Maarten Brock + + * device/include/mcs51/C8051F520.h: new, added + * device/include/mcs51/compiler.h: added link about predefined macros + +2006-11-23 Raphael Neider + + * src/regression/Makefile: add -L path to fresh library + * src/regression/simulate: emphasize FAILED output + * src/regression/create_stc: output _failures from gpsim + * src/regression/compare4.c, + * src/regression/rotate6.c: fixed char literals, + all compile, all run =8-D + + * src/pic/pcode.h: added isPCASMDIR macro + * src/pic/gen.c (genAnd): fixed bit offset + * src/pic/ralloc.c (allocNewDirReg,allocDirReg,allocRegByName, + packBits): unified register numbering schemes, + (newReg): do not insert stack registers into hash table, + (initStack): unpinned pseudo stack, simplified, + (typeRegWithIdx): fixed retrieval of stack registers, + * src/pic/pcode.c (addpCodeComment,sameBank): added, + (pCodeReplace): removed invalid assertion, + (insertPCodeInstruction): fixed newly added labels, + (insertBankSwitch,BankSelect,IsBankChange,DoBankSelect, + FixRegisterBankingInFlow,compareBankFlow,FixBankFlow, + DumpFlow): removed unsed (broken?) code, + (insertBankSel): prevent STATUS from being BANKSELed, + (FixRegisterBanking): rewritten from scratch, implemented generic + optimizations (suppress BANKSELs to same register and to registers + present in all banks), + (AnalyzeBanking): update flow after BANKSELection + + * src/pic/glue.c (pic14_constructAbsMap): emit pseudo stack in + sharebank, let linker place it, mark STKxx symbols as emitted + +2006-11-21 Frieder Ferlemann + + * src/regression/arrays.c, + * src/regression/bank1.c, + * src/regression/bool2.c, + * src/regression/compare7.c, + * src/regression/compare8.c, + * src/regression/compare9.c, + * src/regression/compare10.c, + * src/regression/configword.c, + * src/regression/for.c, + * src/regression/mult1.c, + * src/regression/pointer1.c, + * src/regression/rotate6.c, + * src/regression/string1.c, + * src/regression/struct1.c, + * src/regression/Makefile: make PIC14 regression tests run again + (3 fail, 6 won't compile) + +2006-11-21 Raphael Neider + + * device/include/pic16/pic18f4550.h, + * device/include/pic16/pic18f4455.h, + * device/lib/pic16/libdev/pic18f4550.c, + * device/lib/pic16/libdev/pic18f4455.c: fixed #1578591 and #1595144 + * configure.in: removed superfluous closing bracket + +2006-11-21 Jesus Calvino-Fraga + + * device/lib/expf.c: Fixed bug 1599523: result of expf(x) is + always positive. + +2006-11-21 Raphael Neider + + * src/pic/device.{c,h}: added pic14_getPIC() + * src/pic/gen.c (continueIfTrue,jumpIfTrue): added PIC code, + (genAnd): added PIC code for one case, fixes #1597044 + * src/pic/pcode.c (BankSelect): Ohoh, added generic optimization for + SFRs that are present in all banks (e.g., STATUS) + +2006-11-20 Raphael Neider + + * src/pic/pcode.c: changed inverted ops for DECFSZ/DECFSZW and + INCFSZ/INCFSZW and declared them as changing Z bit, + (insertPCodeInstruction): correctly invert the above instructions, + fixes #1599333, + (DoBankSelect): don't panic on po_immediates + +2006-11-14 Maarten Brock + + * as/link/aslink.h, + * as/link/mcs51/lkihx.c (newArea), + * as/link/mcs51/lkrloc.c: renamed newArea() to ihxNewArea() + * as/link/mcs51/lkihx.c (ihx): output reset vector as start address + +2006-11-11 Raphael Neider + + * src/pic/pcode.c (newpCodeOpBit): search SymbolTab for referenced + bitfield symbols, fixes #1579535 (once more...). + +2006-11-09 Frieder Ferlemann + + * support/regression/generate-cases.py, + * support/regression/fwk/include/testfwk.h, + * support/regression/fwk/lib/testfwk.c: used code pointers, + (about 50kByte less code generated for mcs51) + +2006-11-06 Borut Razem + + * debugger/mcs51/acinclude.m4, debugger/mcs51/aclocal.m4, + debugger/mcs51/configure: fixed failed check because the function + rl_function_of_keyseq isn't in Readline 5.2. Thanks to Ilya Goldberg + who submitted the patch for gpsim. + * debugger/mcs51/configure.in: removed the result message + * debugger/mcs51/Makefile.in: fixed the config.status warning + "... seems to ignore the --datarootdir setting" + +2006-11-03 Maarten Brock + + * device/include/mcs51/c8051f020.h, + * device/include/mcs51/c8051f040.h, + * device/include/mcs51/c8051f060.h, + * device/include/mcs51/c8051f120.h: added PS0, fixed bug 1589279 + * src/z80/gen.c (gencjneshort), + * src/z80/peeph.def: applied patch 1571373, thanks Philipp Krause + +2006-10-31 Borut Razem + + * debugger/mcs51/acinclude.m4, debugger/mcs51/aclocal.m4, + debugger/mcs51/configure: get readline version + +2006-10-30 Borut Razem + + * debugger/mcs51/sdcdb.c: replaced hardcoded "/" with DIR_SEPARATOR_STRING + * debugger/mcs51/acinclude.m4, debugger/mcs51/aclocal.m4, + debugger/mcs51/configure: locate readline even when cross compiling + * support/scripts/sdcc.nsi: include readline5.dll into the setup package + +2006-10-29 Jesus Calvino-Fraga + + * device/include/mcs51/serial_IO.h: putchar() and getchar() using + serial port. + +2006-10-29 Maarten Brock + + * device/include/malloc.h, + * device/lib/calloc.c, + * device/lib/free.c, + * device/lib/malloc.c, + * device/lib/realloc.c: moved definition of struct into sources + * support/regression/tests/malloc.c: use void* for init_dynamic_memory() + +2006-10-29 Maarten Brock + + * as/asx8051.dsp: corrected output directories + * as/link/hc08: new directory for hc08 linker + * as/hc08/aslink.h, as/link/aslink.h, + * as/hc08/aslink.mak, as/link/hc08/aslink.mak, + * as/hc08/clean.mk, as/link/hc08/clean.mk, + * as/hc08/link_hc08.dsp, as/link/hc08/link_hc08.dsp, + * as/hc08/lkaomf51.c, as/link/hc08/lkaomf51.c, + * as/hc08/lkarea.c, as/link/hc08/lkarea.c, + * as/hc08/lkdata.c, as/link/hc08/lkdata.c, + * as/hc08/lkelf.c, as/link/hc08/lkelf.c, + * as/hc08/lkihx.c, as/link/hc08/lkihx.c, + * as/hc08/lklibr.c, as/link/hc08/lklibr.c, + * as/hc08/lkmain.c, as/link/hc08/lkmain.c, + * as/hc08/lkmem.c, as/link/hc08/lkmem.c, + * as/hc08/lkrloc.c, as/link/hc08/lkrloc.c, + * as/hc08/lks19.c, as/link/hc08/lks19.c, + * as/hc08/Makefile.aslink, as/link/hc08/Makefile.aslink, + * as/hc08/Makefile.bcc, as/link/hc08/Makefile.bcc, + * as/hc08/Makefile.in, as/link/hc08/Makefile.in, + * as/link/hc08/conf.mk, + * configure, + * configure.in, + * Makefile.in, + * sdcc.dsw: moved hc08 linker to as/link/hc08 + * as/hc08/lkeval.c, as/link/mcs51/lkeval.c, as/link/lkeval.c, + * as/hc08/lkhead.c, as/link/mcs51/lkhead.c, as/link/lkhead.c, + * as/hc08/lklex.c, as/link/mcs51/lklex.c, as/link/lklex.c, + * as/hc08/lklist.c, as/link/mcs51/lklist.c, as/link/lklist.c, + * as/hc08/lknoice.c, as/link/mcs51/lknoice.c, as/link/lknoice.c, + * as/hc08/lksym.c, as/link/mcs51/lksym.c, as/link/lksym.c, + * as/link/mcs51/aslink.dsp, + * as/link/mcs51/Makefile.in: factored out the common files + * as/hc08/lkstore.c: deleted, use the one already in as/link/ + * as/clean.mk: extra cleaning common files + * as/link/mcs51/strcmpi.c, as/strcmpi.c: moved + * as/link/mcs51/strcmpi.h: deleted, moved protoype to aslink.h + * as/mcs51/asm.h: include sdccconf.h or sdcc_vc.h + +2006-10-29 Raphael Neider + + * src/pic/ralloc.c (newReg): create aliases for registers with + multiple names to fix #1579535 and #1584001, + (regWithIdx,dirregWithName): resolve aliases on lookup + * src/pic/pcode.c (DoBankSelect): die with error message on failing + bankselect + * device/lib/pic/libdev/Makefile.in: move pseudo stack down to 0x4f + to prevent build errors on small devices + +2006-10-28 Raphael Neider + + * src/pic/gen.c (genFunction,genCall): drop "same code page" + assumption within interrupt handlers, fixes #1584940 + * src/pic/glue.c (pic14_constructAbsMap): mark absolute symbols as + "emitted" to avoid emitting them again in udata + +2006-10-27 Jesus Calvino-Fraga + + * device/lib/_putchar.c, device/lib/_getchar.c, device/lib/inituart.c: + Removed. + +2006-10-26 Jesus Calvino-Fraga + + * device/lib/_putchar.c, device/lib/_getchar.c, device/lib/inituart.c: + Initialize uart only if SM0 and SM1 are zero. Also, use flag to turn + on/off CR to CRLF conversion. + +2006-10-25 Frieder Ferlemann + + * doc/sdccman.lyx: updated IRQ section + +2006-10-24 Jesus Calvino-Fraga + + * device/lib/serial_io.c: removed + * device/lib/_putchar.c, device/lib/_getchar.c, device/lib/inituart.c + replacements for serial_io.c + +2006-10-24 Maarten Brock + + * src/z80/main.c (_process_pragma, _parseOptions): fixed bug 1583318 + +2006-10-24 Jesus Calvino-Fraga + + * device/lib/serial_io.c: Default putchar() and getchar() for + mcs51 uses serial port. + +2006-10-23 Maarten Brock + + * src/mcs51/gen.c (movc): improved check for 0 and 1, see RFE 1582704 + +2006-10-23 Frieder Ferlemann + + * support/regression/ports/mcs51/support.c: smaller + _sdcc_external_startup() + * device/lib/mcs51/crtxclear.asm: don't check high byte of l_PSEG + +2006-10-20 Maarten Brock + + * device/lib/gbz80/crt0.s, + * device/lib/gbz80/crt0_rle.s, + * device/lib/gbz80/div.s, + * device/lib/gbz80/fstubs.s, + * device/lib/gbz80/heap.s, + * device/lib/gbz80/mul.s, + * device/lib/gbz80/putchar.s, + * device/lib/gbz80/stubs.s, + * device/lib/z80/crt0.s, + * device/lib/z80/crt0_rle.s, + * device/lib/z80/div.s, + * device/lib/z80/fstubs.s, + * device/lib/z80/heap.s, + * device/lib/z80/mul.s, + * device/lib/z80/putchar.s, + * device/lib/z80/stubs.s: reverted, I was mistaken + +2006-10-20 Frieder Ferlemann + + * src/mcs51/peeph.def: peephole 238.x added check for notvolatile + * support/regression/ports/mcs51/support.c: removed race + condition on TI in _putchar allowing to use serial port mode 0 + +2006-10-20 Borut Razem + + * debugger/mcs51/sdcdb.c: replaced isblank() with isspace() + +2006-10-19 Maarten Brock + + * device/lib/gbz80/crt0.s, + * device/lib/gbz80/crt0_rle.s, + * device/lib/gbz80/div.s, + * device/lib/gbz80/fstubs.s, + * device/lib/gbz80/heap.s, + * device/lib/gbz80/mul.s, + * device/lib/gbz80/putchar.s, + * device/lib/gbz80/stubs.s, + * device/lib/z80/crt0.s, + * device/lib/z80/crt0_rle.s, + * device/lib/z80/div.s, + * device/lib/z80/fstubs.s, + * device/lib/z80/heap.s, + * device/lib/z80/mul.s, + * device/lib/z80/putchar.s, + * device/lib/z80/stubs.s: removed all leading underscores from area names + +2006-10-17 Maarten Brock + + * support/regression/ports/mcs51/support.c: use highest baudrate so the + regression tests are not waiting in the simulator for simulated + transmission of debug output + +2006-10-16 Frieder Ferlemann + + * device/lib/printf_large.c: slightly smaller + * doc/sdccman.lyx: do not use spaces within html links + +2006-10-16 Borut Razem + + * configure.in, configure, sdccconf_in.h, src/SDCCglobal, + debugger/mcs51/Makefile.in, debugger/mcs51/sdcdb.[ch], + debugger/mcs51/aclocal.m4, debugger/mcs51/acinclide.m4, + debugger/mcs51/config.h.in, debugger/mcs51/configure.in, + debugger/mcs51/configure: + [ 1185668 ] add gnu readline support to sdcdb - enabled + +2006-10-16 Raphael Neider + + * src/pic/pcode.c (BankSelect): another fix on (partial) BANKSELs, + fixes #1577882, removes close to all banking optimizations + +2006-10-15 Maarten Brock + + * src/SDCCsymt.c (checkSClass): no error for uninitialised absolute + variables in code memory + * support/regression/tests/absolute.c: added test for this + +2006-10-15 Raphael Neider + + * src/pic/pcode.c (InsertBankSel): suppress BANKSELs for one bank + devices, + (BankSelect): emit BANKSEL before touching linker-placed regs, + fixes #1570934 + +2006-10-10 Raphael Neider + + * src/SDCCmain.c (optionsTable): accept --stack-size for PICs, + * src/pic/device.c (pic14_getSharebankSize,pic14_getSharebankAddress), + * src/pic/main.c (_pic14_parseOptions), + * src/pic/main.h: mostly reverted to previous state, now use results + from SDCCmain.c's argument parsing + +2006-10-10 Borut Razem + + * debugger/mcs51/break.[ch], debugger/mcs51/cmd.c, + debugger/mcs51/sdcdb.[ch], debugger/mcs51/simi.c: + [ 1185668 ] add gnu readline support to sdcdb - + prepared for READLINE, not enabled yet, + thanks to + +2006-10-10 Raphael Neider + + * src/pic16/pcode.c (pic16_pCode2str): use isACCESS_BANK macro + * src/pic16/devices.inc, + * device/include/pic16 (pic18f[24]620.h), + * device/include/pic18fregs.h, + * device/lib/pic16/pics.all, + * device/lib/pic16/libdev/pic18f[24]{620,525}.c): added support for + 18f2620, 18f4620, 18f2525, and 18f4525 devices, thanks to + Gary Plumbridge and Anton Strobl + +2006-10-10 Raphael Neider + + * src/pic/main.c (_pic14_parseOptions): added --stack-loc=NUM and + --stack-siz=NUM options to configure the argument passing stack + * src/pic/main.h: added stackLocation and stackSize to pic14_options_t + * src/pic/device.c (mapRegister): catch out-of-memory SIGSEGVs, + (pic14_getSharebankSize): obey --stack-siz=NUM, + (pic14_getSharebankAddress): obey --stack-loc=NUM + +2006-10-08 Frieder Ferlemann + + * doc/sdccman.lyx: added to the manual + * doc/figures/ddd_example.png: added (neither pdflatex nor + most browsers seem to like the .eps file) + +2006-10-06 Bernhard Held + + * src/SDCCglue.c (tempfileandname): changed un*x tmp search paths + to /tmp and /var/tmp acc. LSB + * src/SDCCast.c (addCast): Fixed bug 1571231: promote in case of + RESULT_TYPE_IFX + * support/regression/tests/onebyte.c: added test + +2006-10-05 Jesus Calvino-Fraga + + * src/mcs51/gen.c: emitcode for "add a,0x%02x" requires only 8 bits. + +2006-10-05 Borut Razem + + * partially fixed [ 1570701 ] peephole - not replacing code from multiline macros, + thanks to dfulab: + - sdcc.dsw: changed property eol-style to CRLF + - support/scripts/resource.rc: replaced references to "afxres.h" with "winres.h" + +2006-10-04 Raphael Neider + + * device/include/pic/{pic16f84.h,pic16f84a.h}, + * device/lib/pic/libdev/{pic16f84.c,pic16f84a.c}: added PORT[AB]_bits + from patch #1522504, thanks to Robas Teodor + +2006-10-02 Maarten Brock + + * as/link/z80/lkarea.c: essentially reverted lnksect() to #4380 which + fixes bug 1566015 + +2006-10-01 Maarten Brock + + * src/pic16/glue.c (pic16emitMaps), + * src/pic/glue.c (pic14emitMaps): hopefully fixed bug 1568779 + * device/lib/gets.c: fixed bug 1568829,thanks Philipp Krause + * device/lib/pic16/libc/string/memcpypgm2ram.c, + * device/lib/pic16/libc/string/memcpyram2ram.c: fixed bug 1568836, thanks + Philipp Krause + * as/mcs51/asmain.c (asmbl, newdot): fixed problems with absolute areas + * as/link/mcs51/lkmem.c (summary2): reverted, do do count abs segments + +2006-09-30 Jesus Calvino-Fraga + + * support/librarian/sdcclib.c: Added option -l. + * as/link/mcs51/lkmem.c: don't use absolute segments to compute memory + usage totals. + * device/lib/make51lib.bat: added. Allows building mcs51 libraries easily + using Windows command prompt. + +2006-09-30 Maarten Brock + + * device/lib/libsdcc.lib: added module rand + * src/ds390/ralloc.c (rematStr), + * src/hc08/ralloc.c (rematStr), + * src/mcs51/ralloc.c (rematStr), + * src/z80/ralloc.c (rematStr): made output more consistent + * src/mcs51/gen.c: cosmetic changes + +2006-09-30 Maarten Brock + + * src/port.h: added mem.cabs_name to PORT + * src/ds390/main.c, + * src/hc08/main.c, + * src/mcs51/main.c, + * src/pic16/main.c, + * src/pic/main.c, + * src/xa51/main.c, + * src/z80/main.c: added cabs_name initializers + * src/SDCCglue.c (emitStaticSeg): allocate and initialize absolute + constants + (emitMaps): emit absolutes in code memory into cabs_name + * src/SDCCmem.c, + * src/SDCCmem.h: added memory map c_abs and defined CABS_NAME + * src/ds390/gen.c (genCodePointerGet): fixed bug if left is a literal + * support/regression/fwk/include/testfwk.h: added define for at + * support/regression/tests/absolute.c: added, new + +2006-09-29 Maarten Brock + + * src/mcs51/gen.c (genPlusIncr, genMinusDec, genAddrOf): small + optimizations, see also patch 887161 by Stas Sergeev + * src/mcs51/peeph.def(104, 207, 209, 212): disabled as they do not seem + to be necessary anymore, + (102, 103, 104, 127): renamed all occurances of bp to _bp + +2006-09-27 Maarten Brock + + * device/include/mcs51/at89c51snd1c.h: fixed MSK_SREQ definition + thanks Weston T. Schmidt for patch 1555221 + * src/mcs51/peeph.def: renamed rule 257 to 257.a, added 257.b + * src/SDCCicode.c(geniCodeMultiply): small optimization + +2006-09-26 Maarten Brock + + * device/include/stdlib.h: added rand prototypes + * device/lib/rand.c: new, added + * device/lib/Makefile.in: added rand.c + * src/z80/peeph.def, + * src/z80/peeph-gbz80.def, + * src/z80/peeph-z80.def: updated conditonals, fixed bug 1565908 + +2006-09-20 Raphael Neider + + * device/lib/pic16/libio/i2c/i2cnack.c (i2c_nack): fixed ACKDT bit + +2006-09-19 Maarten Brock + + * as/link/aslink.h: cosmetic changes + * as/link/mcs51/Makefile.in, + * as/link/z80/Makefile.in: fixed build on CF where VPATH is used + +2006-09-17 Maarten Brock + + * as/link/aslink.h, + * as/link/mcs51/aslink.h, + * as/link/z80/aslink.h: merged and moved to as/link/ + * as/link/lkstore.c, + * as/link/mcs51/lkstore.c: moved to as/link/ + * as/link/clean.mk: remove *.o + * as/link/mcs51/alloc.h: deleted + * as/link/mcs51/lkarea.c: added lnksect prototype + * as/link/mcs51/lkdata.c, + * as/link/mcs51/lklex.c, + * as/link/mcs51/lkmain.c: renamed as_getline to lk_getline + * as/link/mcs51/lkmem.c, + * as/link/mcs51/lknoice.c: removed include strcmpi.h + * as/link/mcs51/lksym.c: include stdlib.h instead of malloc.h or alloc.h + * as/link/mcs51/aslink.dsp, + * as/link/mcs51/Makefile.aslink, + * as/link/mcs51/Makefile.bcc, + * as/link/mcs51/Makefile.in: updated for moved files + * as/link/z80/lkarea.c, + * as/link/z80/lkhead.c, + * as/link/z80/lklex.c, + * as/link/z80/lklibr.c, + * as/link/z80/lklist.c, + * as/link/z80/lkmain.c, + * as/link/z80/lkrloc.c, + * as/link/z80/lksym.c: synced with mcs51 + * as/link/z80/lkdata.c, + * as/link/z80/lkeval.c, + * as/link/z80/lkihx.c, + * as/link/z80/lks19.c: cosmetic changes + * as/link/z80/Makefile.in, + * as/link/z80/linkgbz80.dsp, + * as/link/z80/linkz80.dsp: updated for moved files + +2006-09-16 Borut Razem + + * debugger/mcs51/sdcdb.c: partially fixed + [ 1203664 ] sdcdb fails to open files w. two "." periods + * debugger/mcs51/simi.c, debugger/mcs51/symtab.c, + debugger/mcs51/symtab.h: fixed indenting + * configure.in, configure: up to date with latest Maarten's changes + +2006-09-15 Maarten Brock + + as/link/mcs51 + as/aslink.dsp, as/link/mcs51/aslink.dsp, + as/link/mcs51/aslink.h, as/mcs51/aslink.h, + as/link/mcs51/aslink.mak, as/mcs51/aslink.mak, + as/link/mcs51/lkaomf51.c, as/mcs51/lkaomf51.c, + as/link/mcs51/lkarea.c, as/mcs51/lkarea.c, + as/link/mcs51/lkdata.c, as/mcs51/lkdata.c, + as/link/mcs51/lkeval.c, as/mcs51/lkeval.c, + as/link/mcs51/lkhead.c, as/mcs51/lkhead.c, + as/link/mcs51/lkihx.c, as/mcs51/lkihx.c, + as/link/mcs51/lklex.c, as/mcs51/lklex.c, + as/link/mcs51/lklibr.c, as/mcs51/lklibr.c, + as/link/mcs51/lklist.c, as/mcs51/lklist.c, + as/link/mcs51/lkmain.c, as/mcs51/lkmain.c, + as/link/mcs51/lkmem.c, as/mcs51/lkmem.c, + as/link/mcs51/lknoice.c, as/mcs51/lknoice.c, + as/link/mcs51/lkrloc.c, as/mcs51/lkrloc.c, + as/link/mcs51/lks19.c, as/mcs51/lks19.c, + as/link/mcs51/lkstore.c, as/mcs51/lkstore.c, + as/link/mcs51/lksym.c, as/mcs51/lksym.c, + as/link/mcs51/Makefile.aslink, as/mcs51/Makefile.aslink, + as/link/mcs51/alloc.h, + as/link/mcs51/clean.mk, + as/link/mcs51/conf.mk, + as/link/mcs51/Makefile.bcc, + as/link/mcs51/Makefile.in, + as/link/mcs51/readme.390, + as/link/mcs51/strcmpi.c, + as/link/mcs51/strcmpi.h, + as/mcs51/clean.mk, + as/mcs51/Makefile.bcc, + as/mcs51/Makefile.in, + configure, + Makefile.in, + sdcc.dsw: moved mcs51 linker to as/link/mcs51 + +2006-09-14 Maarten Brock + + * as/link, + * as/link/Makefile.in, + * as/link/z80/linkgbz80.dsp, + * as/link/z80/linkz80.dsp, + * configure, + * link, + * link/clean.mk, + * link/Makefile.in, + * link/README, + * link/z80, + * link/z80/aslink.h, + * link/z80/clean.mk, + * link/z80/conf.mk, + * link/z80/linkgbz80.dsp, + * link/z80/linkz80.dsp, + * link/z80/lkarea.c, + * link/z80/lkdata.c, + * link/z80/lkeval.c, + * link/z80/lkgb.c, + * link/z80/lkgg.c, + * link/z80/lkhead.c, + * link/z80/lkihx.c, + * link/z80/lklex.c, + * link/z80/lklibr.c, + * link/z80/lklist.c, + * link/z80/lkmain.c, + * link/z80/lkrloc.c, + * link/z80/lks19.c, + * link/z80/lksym.c, + * link/z80/Makefile.in, + * Makefile.in, + * sdcc.dsw: moved link/ to as/link/ + +2006-09-11 Maarten Brock + + * as/mcs51/i51mch.c (machine): fixed warning + +2006-09-10 Maarten Brock + + * as/mcs51/i51mch.c (machine): S_DJNZ fixed bug 1554318 + +2006-09-09 Borut Razem + + * debugger/mcs51/sdcdb.c, debugger/mcs51/simi.c: + sdcdb WIN32 native port + * src/clean.mk: fixed + +2006-09-08 Borut Razem + + * doc/sdccman.lyx: SDCDB and ucSim are available on Win32 platforms. + +2006-09-08 Raphael Neider + + * src/pic16/main.c (_pic16_linkEdit,pic16_linkCmd), + * src/pic/main.c(_pic14_do_link, linkCmd): pass "-w" and "-r" + to gplink to disable processor mismatch warning and to allow + the use of devices with only aliased (shared) memory banks, + (_pic16_genAssemblerPreamble): include pXXX.inc on --mplab-comp + +2006-09-07 Jesus Calvino-Fraga + + * doc/sdccman.lyx: Some re-formating plus example on using + #pragma preproc_asm +/- + +2006-09-07 Borut Razem + + * support/scripts/sdcc.nsi: added SDCDB executables in a separate + section + +2006-09-06 Borut Razem + + * support/scripts/sdcc.nsi: fixed Error: unterminated string parsing + line at sdcc.nsi:153 + * sdcc/debugger/mcs51/simi.c: argsToCmdLine() fixes + +2006-09-05 Borut Razem + + * configure.in, configure: support for winsock2 + * debugger/mcs51/break.h, debugger/mcs51/cmd.c, + debugger/mcs51/cmd.h, debugger/mcs51/sdcdb.c, + debugger/mcs51/sdcdb.h, debugger/mcs51/simi.c, + debugger/mcs51/simi.h, debugger/mcs51/symtab.c, + debugger/mcs51/symtab.h: sdcdb WIN32 native port + +2006-09-05 Maarten Brock + + * src/SDCCopt.c (cnvToFcall): fixed bug 1551947 by updating OP_USES + and OP_DEFS + * support/regression/tests/bug1551947.c: new, added + * src/SDCCsymt.h: strings are char* not byte* + +2006-09-05 Raphael Neider + + * device/lib/pic16/libdev/pic18f4550.c, + device/include/pic16/pic18f4550.h: added PORTD/TRISD + declarations/definitions from patch #1520949 + +2006-09-05 Raphael Neider + + * src/pic16/gen.c (genPackBits): fix assignment to 8-bit, + byte-aligned bitfields, fixes #1539278 + +2006-09-05 Raphael Neider + + * src/pic/gen.c (genReceive): skip unreferenced arguments, + fixes #1544120 + +2006-09-04 Borut Razem + + * support/scripts/sdcc.nsi: move ucSim executables to a separate section + * support/scripts/sdcc_cygwin_mingw32: don't disable ucsim, + -mno-cygwin is a part of the compiler name + * support/scripts/sdcc_mingw32: don't disable ucsim + +2006-09-03 Borut Razem + + * sdcc.spec: corrected for 2.6.0. Thanks to Christer Weinigel. + * device/lib/Makefile.in device/lib/clean.mk: small but essential corrections + +2006-09-03 Raphael Neider + + * src/pic/ralloc.c, + * src/pic/pcode.c (InitReuseRegs): allocate registers with pseudo + indices >= 0x1000 to disambiguate them from fixed regs __at(addr), + fixes #1550049 + +2006-09-01 Borut Razem + + * sim/ucsim/cmd.src/cmdutil.cc: #include and + to make ppc-osx happy + +2006-08-31 Borut Razem + + * sim/ucsim/cmd.src/newcmdposix.cc: #include + * sim/ucsim/cmd.src/newcmd.cc: #include + * sim/ucsim/cmd.src/newcmd.cc: #include + * support/regression/ports/ds390/spec.mk, + support/regression/ports/mcs51/spec.mk, + support/regression/ports/xa51/spec.mk: introduced DEV_NULL variable. + To run regression tests in mingw environment: + make DEV_NULL=NUL CC=gcc + +2006-08-30 Borut Razem + + * sim/ucsim/cmd.src/newcmdposix.cc, sim/ucsim/cmd.src/newcmdposixcl.h, + sim/ucsim/cmd.src/newcmdwin32.cc, sim/ucsim/cmd.src/newcmdwin32cl.h, + sim/ucsim/app.cc, sim/ucsim/appcl.h, sim/ucsim/configure, + sim/ucsim/configure.in, sim/ucsim/ddconfig_in.h, sim/ucsim/error.cc, + sim/ucsim/errorcl.h, sim/ucsim/option.cc, sim/ucsim/optioncl.h, + sim/ucsim/utils.cc, sim/ucsim/utils.h, sim/ucsim/cmd.src/Makefile.in, + sim/ucsim/avr.src/avr.cc, sim/ucsim/avr.src/avrcl.h, + sim/ucsim/cmd.src/bp.cc, sim/ucsim/cmd.src/bpcl.h, + sim/ucsim/cmd.src/cmdconf.cc, sim/ucsim/cmd.src/cmdgui.cc, + sim/ucsim/cmd.src/cmdmem.cc, sim/ucsim/cmd.src/cmdset.cc, + sim/ucsim/cmd.src/cmdsetcl.h, sim/ucsim/cmd.src/cmdstat.cc, + sim/ucsim/cmd.src/cmduc.cc, sim/ucsim/cmd.src/cmduccl.h, + sim/ucsim/cmd.src/cmdutil.cc, sim/ucsim/cmd.src/cmdutil.h, + sim/ucsim/cmd.src/command.cc, sim/ucsim/cmd.src/commandcl.h, + sim/ucsim/cmd.src/get.cc, sim/ucsim/cmd.src/getcl.h, + sim/ucsim/cmd.src/info.cc, sim/ucsim/cmd.src/newcmd.cc, + sim/ucsim/cmd.src/newcmdcl.h, sim/ucsim/cmd.src/set.cc, + sim/ucsim/cmd.src/show.cc, sim/ucsim/cmd.src/timer.cc, + sim/ucsim/hc08.src/hc08.cc, sim/ucsim/hc08.src/hc08cl.h, + sim/ucsim/s51.src/Makefile.in, sim/ucsim/s51.src/interrupt.cc, + sim/ucsim/s51.src/interruptcl.h, sim/ucsim/s51.src/pca.cc, + sim/ucsim/s51.src/pcacl.h, sim/ucsim/s51.src/port.cc, + sim/ucsim/s51.src/portcl.h, sim/ucsim/s51.src/serial.cc, + sim/ucsim/s51.src/serialcl.h, sim/ucsim/s51.src/timer0.cc, + sim/ucsim/s51.src/timer0cl.h, sim/ucsim/s51.src/timer1.cc, + sim/ucsim/s51.src/timer1cl.h, sim/ucsim/s51.src/timer2.cc, + sim/ucsim/s51.src/timer2cl.h, sim/ucsim/s51.src/uc390.cc, + sim/ucsim/s51.src/uc390cl.h, sim/ucsim/s51.src/uc390hw.cc, + sim/ucsim/s51.src/uc390hwcl.h, sim/ucsim/s51.src/uc51.cc, + sim/ucsim/s51.src/uc51cl.h, sim/ucsim/s51.src/wdt.cc, + sim/ucsim/s51.src/wdtcl.h, sim/ucsim/sim.src/hw.cc, + sim/ucsim/sim.src/hwcl.h, sim/ucsim/sim.src/mem.cc, + sim/ucsim/sim.src/memcl.h, sim/ucsim/sim.src/obsolete.cc, + sim/ucsim/sim.src/obsolete.h, sim/ucsim/sim.src/sim.cc, + sim/ucsim/sim.src/simcl.h, sim/ucsim/sim.src/stack.cc, + sim/ucsim/sim.src/stackcl.h, sim/ucsim/sim.src/test_mem_speed.cc, + sim/ucsim/sim.src/uc.cc, sim/ucsim/sim.src/uccl.h, + sim/ucsim/xa.src/xa.cc, sim/ucsim/xa.src/xacl.h, + sim/ucsim/z80.src/z80.cc, sim/ucsim/z80.src/z80cl.h: + ucsim WIN32 native port + +2006-08-30 Jesus Calvino-Fraga + + * doc/sdccman.lyx: added note on dynamic memory heap initialization + +2006-08-27 Maarten Brock + + * src/mcs51/gen.c (genAnd, genOr, genXor): fixed bug 1546986 + * src/ds390/gen.c (aopGetUsesAcc): handle AOP_DPTR2 and AOP_DPTRn too + +2006-08-26 Maarten Brock + + * src/ds390/gen.c (genAnd, genOr, genXor): fixed bug 1546986 + * support/regression/tests/bug1546986.c: new, added + * as/mcs51/.cvsignore, + * debugger/mcs51/.cvsignore, + * src/.cvsignore: deleted + +2006-08-25 Jesus Calvino-Fraga + + * device/include/mcs51/P89c51RD2.h: fixed bug 1546936 (error in sbit + definitions) + +2006-08-20 Borut Razem + + * sim/ucsim/cmd.src/newcmd.cc, sim/ucsim/cmd.src/newcmdcl.h: + removed cl_listen_console::match(), cl_console::match(), + restructured cl_commander::proc_input() + +2006-08-16 Borut Razem + + * sim/ucsim/cmd.src/newcmd.cc, sim/ucsim/cmd.src/newcmdcl.h, + sim/ucsim/cmd.src/cmdutil.cc, sim/ucsim/cmd.src/cmdutil.h, + sim/ucsim/sim.src/mem.cc, sim/ucsim/sim.src/uc.cc: code cleaning + +2006-08-14 Borut Razem + + * support/regression/Makefile.in, + support/regression/ports/pic14/gpsim.cmd, + support/regression/ports/pic14/spec.mk, + support/regression/ports/pic14/support.c: + added pic14 regression test + +2006-08-14 Maarten Brock + + * as/doc/asxhtm.html: documented changed ABS behaviour + * as/doc/README: fixed some typos + +2006-08-13 Maarten Brock + + * support/regression/tests/float_trans.c: disabled test if __STDC_IEC_559__ + not defined on host + +2006-08-12 Borut Razem + + * support/regression/fwk/include/testfwk.h, + support/regression/fwk/lib/testfwk.c, + support/regression/generate-cases.py, + support/regression/Makefile.in: + regression test framework does not depend on function pointers and + variable arguments + +2006-08-09 Maarten Brock + + * device/include/stddef.h: c temporary hack to fix bug 1518273 + +2006-08-09 Jesus Calvino-Fraga + + * device/include/mcs51/cc2510fx.h: added + * src/z80/z80.dsp, src/gbz80/gbz80.dsp: added support/Util/strcmpi.ch + to projects. + +2006-08-09 Maarten Brock + + * as/z80/assym.c (mlookup): ignore case when looking up mnemonics + * as/z80/Makefile.in: added strcmpi.c + * as/z80/z80adr.c: added upper case registers and lower case conditionals + * support/Util/strcmpi.ch: added with intention to remove from mcs51/hc08 + +2006-08-08 Maarten Brock + + * device/lib/gbz80/asm_strings.s, + * device/lib/gbz80/crt0_rle.s, + * device/lib/gbz80/div.s, + * device/lib/gbz80/mul.s, + * device/lib/gbz80/shift.s, + * device/lib/z80/asm_strings.s, + * device/lib/z80/crt0_rle.s, + * device/lib/z80/div.s, + * device/lib/z80/mul.s, + * device/lib/z80/shift.s: changed to all lower case menmonics except the + flags which are all upper case + +2006-08-07 Maarten Brock + + * as/z80/asm.h: made CASE_SENSITIVE 1 + * link/z80/aslink.h: made CASE_SENSITIVE 1 + * src/z80/gen.c (throughout): made all conditionals upper case + * support/regression/tests/bug1503067.c: new + +2006-08-07 Maarten Brock + + * src/z80/gen.c (aopPut): fixed bug !*ixy should be !*iyx, + (shiftIntoPair): added case 2 for PAIR_IY, + (setupToPreserveCarry): replaced parameters with iCode and check if + PAIR_DE is in use to fix bug 1399290, + (genPlus, genMinus): updated call to setupToPreserveCarry + * support/regression/tests/bug1399290.c: new + +2006-08-06 Maarten Brock + + * device/lib/Makefile.in (Z80SOURCES): enabled float support + * sim/ucsim/z80.src/inst.cc (inst_rst): generate breakpoint on RST8,ACC==0 + * src/ds390/gen.c (shiftRLong), + * src/hc08/gen.c (shiftLLong, shiftRLong): fixed bug 1533966 + * src/mcs51/gen.c (sameReg): changed to sameByte, + (xch_a_aopGet): new, + (shiftL2Left2Result, shiftR2Left2Result, shiftRLeftOrResult, shiftLLong, + shiftRLong): fixed bug 1533966 + * src/z80/gen.c (shiftR2Left2Result, shiftL2Left2Result, genlshTwo, + genLeftShiftLiteral, genrshTwo, genRightShiftLiteral): fixed bug 1533966 + * support/regression/Makefile.in: disabled z80, enabled ucz80 + * support/regression/tests/float_trans.c: enabled test for z80 and host + * support/regression/tests/shifts2.c: new, for testing bug 1533966 + +2006-08-01 Borut Razem + + * src/mcs51/gen.c, src/dc390/gen.c: fixed warning: + comparison is always false due to limited range of data type + on PPC64 machine (openpower-linux1) where "char = unsigned char" + +2006-08-01 Maarten Brock + + * sim/ucsim/hc08.src/hc08mac.h: removed faulty and unused add_u16_disp + * sim/ucsim/hc08.src/hc08.cc: removed faulty and unused int8 + * sim/ucsim/z80.src/z80mac.h (add_u16_disp): use explicit signed char cast + * sim/ucsim/z80.src/z80.cc: removed faulty and unused int8 + +2006-07-31 Borut Razem + + * sim/ucsim/configure, sim/ucsim/cmd.src/newcmdcl.h, + sim/ucsim/cmd.src/newcmd.cc, sim/ucsim/cmd.src/cmdutil.cc, + sim/ucsim/z80.src/Makefile.in, sim/ucsim/configure.in, + sim/ucsim/hc08.src/Makefile.in, sim/ucsim/hc08.src/hc08.cc, + sim/ucsim/ddconfig_in.h, sim/ucsim/s51.src/Makefile.in, + sim/ucsim/s51.src/uc51cl.h, sim/ucsim/s51.src/serialcl.h, + sim/ucsim/s51.src/uc51.cc, sim/ucsim/s51.src/serial.cc, + sim/ucsim/app.cc, sim/ucsim/avr.src/Makefile.in: + enable ucsim mingw compilation. Serial port is disabled, + since it uses termios.h API, which is not available on native + WIN32 + +2006-07-31 Borut Razem + + * Small Device C Compiler 2.6.0 released + * support/scripts/sdcc.nsi: added FULL_DOC option + * .version, doc/sdccman.lyx: changed sdcc version to 2.6.1 + +2006-07-28 Borut Razem + + * support/scripts/sdcc.nsi: remove $INSTDIR/include/asm/pic16/*.h + * doc/INSTALL.txt: updated + +2006-07-27 Borut Razem + + * device/lib/pic/Makefile.in, device/lib/pic/Makefile.subdir, + device/lib/pic/libdev/Makefile.in: fixed bug + [ 1438354 ] pic libsdcc: distclean doesn't work + * device/lib/pic16/Makefile.in, device/lib/pic16/Makefile.subdir, + device/lib/pic16/libio/Makefile.in: fixed bug + [ 1438344 ] pic16 lib: clean doesn't work properly + * doc/knownbugs.html removed [ 1438354 ] and [ 1438344 ] from the list + +2006-07-26 Maarten Brock + + * device/lib/pic/libsdcc/fsdiv.c, + * device/lib/pic/libsdcc/fsmul.c, + * device/lib/pic16/libsdcc/float/fsdiv.c, + * device/lib/pic16/libsdcc/float/fsmul.c, + * device/lib/_fsdiv.c, + * device/lib/_fsmul.c: bugfix, handle too large and too small numbers + * support/regression/tests/bug1520966.c: added + * doc/knownbugs.html: removed [ 1520966 ] from the list + +2006-07-25 Borut Razem + + * configure.in, configure, sdccconf_in.h: fixed bug + [ 1519095 ] regression test onebyte.c fails on ppc64 host + * doc/knownbugs.html: removed [ 1519095 ] from the list + +2006-07-25 Maarten Brock + + * doc/knownbugs.html: added, contains list of known bugs at release + * device/include/mcs51/compiler.h: fixed SFR32 for SDCC + +2006-07-23 Maarten Brock + + * device/include/mcs51/compiler.h: added SFRX for xdata based special + function registers and corrected defaults with additional warning + * device/lib/malloc.c: cosmetic changes + * device/lib/realloc.c: bugfix for bug #1496907, Thanks Efim Monyak + * src/ds390/ralloc.c (getRegBitNoSpil): reenabled, + (fillGaps): and used it + +2006-07-20 Raphael Neider + + * src/pic/device.c (addMemRange,assignRegister): suppress verbose + output unless SDCCPICDEBUG is set + * device/lib/pic16/Makefile.rules (%.lib target): suppress verbose + output if SILENT is set + +2006-07-11 Borut Razem + + * doc/README.txt: updated + +2006-07-10 Borut Razem + + * support/scripts/sdcc.nsi: added device/include/asm/pic/features.h and + device/lib/src/pic/libm/*.c and device/lib/src/pic16/libsdcc/stack/*.S + in WIN32 installation + * .version, sdcc.spec, doc/sdccman.lyx: changed sdcc version to 2.6.0 - + release candidate 1 + +2006-07-08 Maarten Brock + + * device/include/mcs51/XC866.h: added sbit definitions for Px_x, P1_x, P2_x + * src/pic16/glue.c (initPointer): fixed bug 1496419 for pic16 + +2006-07-06 Maarten Brock + + * src/hc08/gen.c (genAddrOf): fixed bug when offset on stack is >127 + +2006-07-06 Borut Razem + + * support/regression/tests/bitfields.c: + fixed bug [ 1518322 ] regression test bitfields fails on ppc hosts + * support/regression/tests/constantRange.c: + fixed bug [ 1518317 ] regression test constantRange fails on alpha host + +2006-07-04 Borut Razem + + * src/configure.in, src/configure, src/Makefile.in, as/z80/Makefile.in, + src/port.mk, + src/avr/Makefile.in, src/ds390/Makefile.in, src/ds400/Makefile.in, + src/hc08/Makefile.in, src/mcs51/Makefile.in, src/pic16/Makefile.in, + src/pic/Makefile.in, src/xa51/Makefile.in, src/z80/Makefile.in: + reverted changes from 2006-07-03 + * Makefile.common.in: added @CPPFLAGS@ to CPPFLAGS + * support/regression/Makefile.in, support/regression/ports/host/spec.mk: + added CPPFLAGS, used by the host port + +2006-07-03 Bernhard Held + + * support/regression/valdiag/tests/switch.c, + * support/regression/valdiag/tests/constantRange.c: adapted to gcc 4 + * support/regression/tests/libmullong.c: fixed for host + * support/regression/ports/host/spec.mk: disable all warnings for host, + SDCC runs with --less-pedantic too + +2006-07-03 Borut Razem + + * src/configure.in, src/configure, src/Makefile.in, as/z80/Makefile.in: + defined CPPFLAGS + * src/port.mk: defined CPPFLAGS, renamed to src/port.mk.in + * src/avr/Makefile.in, src/ds390/Makefile.in, src/ds400/Makefile.in, + src/hc08/Makefile.in, src/mcs51/Makefile.in, src/pic16/Makefile.in, + src/pic/Makefile.in, src/xa51/Makefile.in, src/z80/Makefile.in: + include ../port.mk + * sim/ucsim/main_in.mk, sim/ucsim/avr.src/Makefile.in, + sim/ucsim/gui.src/Makefile.in, sim/ucsim/hc08.src/Makefile.in, + sim/ucsim/s52.src/Makefile.in, sim/ucsim/sim.src/Makefile.in, + sim/ucsim/xa.src/Makefile.in: ignore header files for dependencies + +2006-07-02 Raphael Neider + + * src/pic16/devices.inc, + * device/include/pic16/pic18fregs.h, + * device/include/pic16/pic18f4550.h, + * device/lib/pic16/pics.all, + * device/lib/pic16/libdev/pic18f4550.c: added support for 18f4550 + +2006-07-01 Bernhard Held + + * as/hc08/lkaomf51.c (OutputName), + * as/mcs51/lkaomf51.c (OutputName), + * as/z80/asmain.c (asmbl), + * src/ds390/main.c (asmLineNodeFromLineNode), + * src/hc08/ralloc.c (hc08_assignRegisters), + * src/mcs51/main.c (asmLineNodeFromLineNode), + * src/xa51/ralloc.c (checkRegMask), + * src/xa51/gen.c (emitcode), + * src/z80/gen.c (_emit2), + * src/SDCCast.c (searchLitOp), + * src/SDCCglobl.h, + * support/packihx/packihx.c, + * support/Util/MySystem.c (split_command): fix gcc 4 warnings + * src/ds390/gen.c (aopPutUsesAcc), + * src/ds390/ralloc.c (getRegBitNoSpil): unused, therefore disabled + * support/regression/tests/libmullong.c (mullong_wrapper), + * src/SDCCsymt.c (powof2), + * src/SDCCast.c, + * src/SDCCicode.c: renamed TYPE_WORD by TYPE_TARGET_INT and so on + * src/SDCCsymt.h: added TYPE_TARGET_* + * src/SDCCutil.c (doubleFromFixed16x16, fixed16x16FromDouble), + * src/SDCCutil.h (doubleFromFixed16x16, fixed16x16FromDouble): moved to + SDCCast because 1) header problems 2) this is the right place + * src/SDCCast.c (doubleFromFixed16x16, fixed16x16FromDouble): added + * src/SDCCval.h (doubleFromFixed16x16, fixed16x16FromDouble): added + prototype + +2006-06-29 Bernhard Held + + * src/SDCCicode.h: removed buggy semicolon in unused macro + * src/SDCClrange.c (findPrevUseSym, rlivePoint): fixed bug #1486853, + search for previous definiton of auto symbols too, + (findPrevUse): fixed logic of emitWarnings + +2006-06-26 Raphael Neider + + * src/pic16/gen.c (genFunction, genEndFunction): also preserve + PCLATH and PCLATU on interrupts, potentially fixes #1505141 + +2006-06-25 Raphael Neider + + * device/lib/pic/libm: NEW, added math library functions + * device/lib/pic/libsdcc: NEW; added float support functions + * device/lib/pic/{Makefile.in,configure.in,configure}: added libm/ + * device/include/pic/{limits.h,errno.h,sdcc-lib.h,float.h,math.h}: + NEW, added math related headers + * device/include/asm/pic/features.h: NEW + * src/pic/gen.c (emitpcode_real): emit warning on NULL pCodeOp, + (popGet): allow larger offsets for AOP_PCODE, + (genDataPointerSet): handle literals explicitly, more debug output, + (genAssign): fixed for float using aopLiteral ;-) + * src/pic/glue.c (pic14createInterruptVect): inserted pagesel before + GOTO initialisation routine + * src/pic/pcoderegs.c (pCodeRegMapLiveRangesInFlow): set wasUsed + flag on registers, fixes #1469043 (local variables do not work) + * src/pic/main.c (_pic14_do_link), + * src/pic16/main.c (_pic16_linkEdit): use fullDstFileName if + available + +2006-06-25 Borut Razem + + * device/lib/pic16/libc/stdio/sprintf.c: return the number of + characters printed (not including the trailing '\0' used to end + output to strings). Problem detected in regression test bug-927659.c. + NOTE: printf() family functions should return int instead + unsigned int! + * device/lib/pic16/libc/stdio/vfprintf.c: "%%" prints "%", unknown + specifier are printed as themselves + * sdcc/support/regression/tests/bug1057979.c: pic16 printf doesn't + support flags, width and precision specifiers + +2006-06-24 Borut Razem + + * sdcc/support/regression/tests/bitvars.c: added gbz80, pic16 and pic16 + to the list of sdcc tagrets not supporting bit type + * sdcc/support/regression/tests/bug-905992.c.c: excluded regression + testfor pic16 due to bug: + [ 1511794 ] pic16: regression test bug-895992.c fails + +2006-06-24 Maarten Brock + + * src/mcs51/gen.c (genCmp): optimization for RFE 1162453 + * src/SDCCglue.c (initPointer), fixed bug 1496419 + * support/regression/tests/bug1496419.c: new, added + +2006-06-22 Borut Razem + + * support/regression/ports/pic16/support.c: use gpsim usart module from + libgpsim_modules library + +2006-06-21 Jesus Calvino-Fraga + + * device/include/mcs51/at89c51ed2.h: Fixed bug 1510144 changed + IP0H to IPH0. + +2006-06-19 Raphael Neider + + * src/pic/glue.h,src/pic16/glue.h: added prototypes + * src/pic/glue.c,src/pic16/glue.c (pic1x_stringInSet, + pic1x_emitSymbolIfNew): NEW, check for a string in a set, + (pic14printExterns,pic14printPublics,pic16printPublics, + pic16_printExterns): use new functions to emit symbols + (picglue,pic16glue): emit publics before emitting externs + * src/pic/gen.c,src/pic16/gen.c (genFunction): remember the names of + locally defined functions to avoid bug #1443651 + * support/regression/tests/bug-716242.c: removed pic16 workaround + * support/regression/ports/pic16/spec.mk: ignore errors during build + +2006-06-19 Raphael Neider + + * src/pic/glue.h: added pic14aopLiteral prototype + * src/pic/glue.c (pic14aopLiteral): return unsigned int + * src/pic/gen.c: removed stdint.h dependency + (aopGet): use Safe_strdup() + (bitpatternFromVal): removed, replaced use with pic14aopLiteral + (genDataPointerSet): use pic14aopLiteral() + * src/pic16/glue.h, src/pic16/glue.c, src/pic16/gen.c: similar changes + for pic16; thanks to Bernhard and Maarten + +2006-06-18 Borut Razem + + * support/regression/tests/structflexarray.c: flexible array members + not supported by gcc < 3 + * sim/ucsim/configure, sim/ucsim/configure.in: do not compile serio + GUI tool by default + * src/pic/gen.c: don't include [p]strdin.h on solaris + * support/Util/pstdint.h: addad svn attributes + * support/regression/tests/constantRange.c, + support/regression/tests/rotate.c: include inttypes.h instead + stdint.h on solaris, addad svn attributes + +2006-06-18 Raphael Neider + + * src/SDCCsymt.c (initCSupport): change return type of divschar to + int for PIC16 + * src/pic16/genarith.c (genAddLit): sign-extend via standard routine + (pic16_genMinusBits): simplified sign-extension + (pic16_genUMult8XLit_8,pic16_genUMult8X8_8): renamed to + pic16_genMult8XLit_n resp. pic16_genMult8X8_n, fixed and + adjusted to correctly handle mixed-signed operands, disabled + now unused multiplciation routines + * src/pic16/gen.c (pic16_pushpCodeOp): fixed to handle literals + (assignResultValue): added argument denoting the size of the result + as returned by the function (fixes upcasts in assigning from + function calls: char foo(); int i = foo();) + (genCall,genPcall,genGenPointerGet,genReceive): pass size of + function result to assignResultValue + (genMult): disabled inlined multiplication code + (genDiv): augmented to also handle the modulus operator, fixed to + handle mixed-signed operands correctly + (genMod): simply call genDiv, disabled unused code + (genAssign): fixed missing (sign-)extension on result + * src/pic16/main.c (_hasNativeMulFor): accept literals [-128..256) as + valid char operands, allow signed operands for native code, added + division and modulo operator handling + * device/lib/pic16/libsdcc/char/divschar.c: divschar returns an int + + As a consequence, onebyte.c (if split into two files) and muldiv.c + pass regression tests. + +2006-06-17 Frieder Ferlemann + + * doc/Makefile.in: two runs of makeindex seem needed to get + correct page references in the index of sdccman.pdf + * doc/sdccman.lyx: mentioned cmon51, added links, small changes + +2006-06-17 Borut Razem + + * sdcc/device/lib/Makefile.in: corrected PORTINCDIR path + +2006-06-17 Frieder Ferlemann + + * doc/sdccman.lyx: updated, added (porting source code, debugging), + mentioned ec2drv and paulmon + +2006-06-16 Maarten Brock + + * as/mcs51/lkarea.c (lnkarea2): clear new xdatamap, bugfix for two + consecutive abs areas + (find_empty_space, allocate_space): added map to handle codemap or + xdatamap, + (lnksect2): renamed rloc to locIndex, fixed bug 960060 by handling + absolute idata and xdata + * as/mcs51/lkmem.c (summary2): updated legend + +2006-06-16 Raphael Neider + + * src/pic16/gen.c (shiftR2Left2Result): fixed bug #1507127 + +2006-06-13 Maarten Brock + + * debugger/mcs51/cmd.c (cmdListFunctions): fixed bugs 1181163 and + 1208515 + * src/SDCClrange.c (findPrevUse): fixed bug 1294475 + +2006-06-13 Vangelis Rokas + + * src/port.h (struct PORT): added field gp_tags, to hold the tag + value of generic pointers, + * src/avr/main.c, + src/ds390/main.c, + src/hc08/main.c, + src/izt/i186.c, + src/izt/tlcs900h.c, + src/mcs51/main.c, + src/pic/main.c, + src/pic16/main.c, + src/xa51/main.c, + src/z80/main.c: PORT structure, added elements for gp_tags field, + * src/SDCCsymt.h: replaced hardwired values of GPTYPE_* macros with + fields in the PORT structure of each port, + * src/SDCCast.c (decorateType): allow processing of generic pointers + for PIC16 port (FPTRSIZE equals GPTRSIZE), also set GPTYPE_NEAR for + S_FIXED symbols + +2006-06-12 Maarten Brock + + * link/z80/lkgb.c, + * link/z80/lkgg.c, + * src/pic16/gen.c, + * src/pic16/main.c, + * src/pic16/pcode.c, + * src/pic/main.c, + * src/pic/pcoderegs.c, + * src/SDCCicode.c, + * src/SDCCmain.c, + * src/SDCCsymt.c: replaced all exit(-1) by exit(EXIT_FAILURE) to fix + bug 1504689 on minGW + +2006-06-12 Frieder Ferlemann + + * device/lib/printf_tiny.c: fixed bug #1465675 (%x format specifier) + +2006-06-12 Bernhard Held + + * src/SDCCast.c (backPatchLabels): fixed bug #1504636 + +2006-06-11 Maarten Brock + + * device/lib/printf_large.c (OUTPUT_CHAR, _output_char): added and used + for optimization + +2006-06-11 Vangelis Rokas + + * src/pic16/gen.c (genCast): fixed bug with assignment of a pointer + to a char variable. Fixed bug #1504211 + * device/include/pic16/adc.h, + device/include/lib/pic16/libio/adc/adcopen.c: applied patch #1364387 + and fixed bug #1364390 + +2006-06-10 Borut Razem + + * CVSROOT: removed the CVS left-over + +2006-06-10 Maarten Brock + + * as/hc08/asmain.c (asexit), + * as/hc08/lkmain.c (lkexit), + * as/mcs51/asmain.c (asexit), + * as/mcs51/lkmain.c (lkexit), + * src/SDCCglue.c (DEFSETFUNC), + * src/SDCCmain.c (linkEdit, assemble), + * support/librarian/sdcclib.c (AddRel), + replaced unlink() by standard C remove() + * src/SDCC.y: replaced removePostIncDecOps() by createRMW() + * src/SDCCast.c (replaceAstWithTemporary, createRMW, + gatherImplicitVariables): new, added to fix bug 608752, + (createFunction): added gatherImplicitVariables() + * src/SDCCast.h: added createRMW prototype + * src/SDCCsymt.h (struct symbol): added infertype + * support/regression/tests/bug608752.c: new, added + +2006-06-10 Raphael Neider + + * src/pic16/gen.c (pic16_aopOp): use WREG as destination even for + multibyte dummy reads (fixes #1503234) + +2006-06-10 Maarten Brock + + * device/include/mcs51/compiler.h: new, added header file to enable + creating common sfr definition header files for different compilers + +2006-06-05 Raphael Neider + + * src/pic16/{pcode.h,genarith.c}: + introduced pCodeOp combining any two pCodeOps (previously only + two register operands could be combined), removed pcop2 from + pCodepReg, replaced pCodeOpReg2 with pCodeOp2, fixes #1492366 + * src/pic16/pcodepeep.c (pic16_pCodeOpCopy): added case for PO_TWO_OPS + * src/pic16/gen.c (pic16_popGet2,pic16_popGet2p,pic16_popCombine2): + rewritten to use new PO_TWO_OPS + * src/pic16/main.c (_hasNativeMulFor): cover more cases natively, + * src/pic16/pcode.c (pic16_newpCodeOpImmd): initialize rIdx field, + (pic16_newpCodeOp): catch invalid attempts on PO_TWO_OPS, + (pic16_newpCodeOp2): NEW, create combined pCodeOp, + (pic16_get_op): embraced return arg to allow #define return(x), + added new case for combined opcodes + (pic16_get_op2): reduced to use pic16_get_op() on second pCodeOp, + (pic16_pCode2str,pic16_getRegFrompCodeOp, + pic16_getRegFromInstruction2): fixed/added handling of new pCodeOp + +2006-06-04 Bernhard Held + + * src/SDCCval.c (checkConstantRange): added + * src/SDCCval.h: added checkConstantRange + * support/Util/SDCCerr.c, + * support/Util/SDCCerr.h: replaced unused W_IF_NEVER_TRUE and + W_IF_ALWAYS_TRUE by W_COMP_RANGE and W_LIT_OVERFLOW + * src/SDCC.y: moved early 'condition transformations' to SDCCast.c + * src/SDCCast.c (decorateType): added checkConstantRange, + added 'condition transformations' from SDCC.y so that now W_COMP_RANGE + can be emitted with the correct always true/false warning, + added optimization for double '!'; + result of decorateType() must be assigned back to the tree, because + decorateType() can change the tree + * src/SDCCicode.c (geniCodeLogic), + (geniCodeAssign): replaced new checkConstantRange, added warnings, + (checkConstantRange): removed, it was only a fragment which never + emitted a warning + * src/SDCCsymt.c (computeType): fixed promotion for + "-1 < (unsigned bit) b" + * src/pic/ralloc.c (packRegsForAssign), + * src/pic16/ralloc.c (packRegsForAssign), + * src/hc08/ralloc.c (packRegsForAssign), + * src/z80/ralloc.c (packRegsForAssign): ported fix for bug #930931 + from mcs51 + * src/mcs51/ralloc.c (packRegsForAssign): removed outcommented source + * support/regression/tests/constantRange.c: added + * support/valdiag/tests/constantRange.c: added + * support/valdiag/valdiag.py: added -DPORT_HOST=1 + +2006-06-02 Borut Razem + + * support/regression/ports/pic16/support.c: increase stack size + to 255 bytes + * support/regression/Makefile.in: sort tests by name so that the + resutlts can be compared on different machines / platforms + +2006-06-02 Maarten Brock + + * device/lib/printf_large.c (output_digit): optimized further, Tnx Frieder + * src/ds390/gen.c (emitLabel): new, added, + (genDjnz): fixed stack overflow bug, + (throughout): cosmetic changes to sync with mcs51/gen.c, + replaced emitcode("", "%05d$:", lbl->key + 100) with emitLabel(lbl) + * src/mcs51/gen.c (genEndFunction): small optimization, + (throughout): cosmetic changes to sync with ds390/gen.c + +2006-06-02 Maarten Brock + + * device/lib/printf_large.c (output_digit, calculate_digit): optimized, + (_print_format): fixed printing pointers + * src/mcs51/gen.c (emitLabel, movb): new, added, + (genAssign): small optimization, + (genDjnz): fixed stack overflow bug, + (throughout): replaced sprintf with SNPRINTF, + replaced mcs51_regWithIdx with REG_WITH_INDEX, + replaced emitcode("mov", "b,...") with MOVB(...), + replaced emitcode("", "%05d$:", lbl->key + 100) with emitLabel(lbl), + replaced D(emitcode("; genXXX", "")) with D(emitcode(";", "genXXX")) + * src/mcs51/peeph.def: added rules 140 and 264 + * src/SDCCmem.c (allocLocal): store register declared locals in DSEG/OSEG + so they may get optimized into registers + +2006-05-30 Maarten Brock + + * src/SDCCmain.c (optionsTable, parseCmdLine): handle --use-stdout + immediately when encountered, + (printUsage): always use stderr even on windows + +2006-05-30 Bernhard Held + + * src/SDCCast.c (isLoopCountable): fixed bug #1478316 + (processParms): fixed bug #1247551 + * src/SDCCmain.c (printVersionInfo, printOptions, printUsage, + parseCmdLine, main): print '--version' to stdout, + print 'help' to stdout if --help is given, + print 'help' to stderr and exit with EXIT_FAILURE if no or bad + arguments are given; fixed --help + +2006-05-27 Bernhard Held + + * src/SDCCcse.c (findPointerSet): fixed bug #1493710 + * support/regression/tests/bug-1493710.c: added + +2006-05-27 Borut Razem + + * support/regression/fwk/lib/testfwk.c: define array in _printn() as + static instead auto + * support/regression/ports/pic16/support.c: increase stack size + from default 64 bytes to 128 bytes + * support/regression/tests/staticinit.c, + support/regression/tests/float.c: regression tests fully enabled + for pic16 port by putting the initialized data arrays into the code + section + * support/regression/ports/pic16/spec.mk: don't link default libraries. + This was changed by mistake in the previous version. + +2006-05-28 Vangelis Rokas + + * src/pic16/gen.c (genFunction, genEndFunction): some + beautifications, fixed bug with falsely restoring FSR2 in large + stack model, thanks to Beau E. Cox for reporting the bug + +2006-05-26 Maarten Brock + + * debugger/mcs51/break.c, + * debugger/mcs51/cmd.c (throughout): removed unused variables and labels, + use %p to print pointers, made address variables unsigned + * debugger/mcs51/cmd.c (infoSymbols): added missing parameter to printf + * debugger/mcs51/symtab.c (parseSymbol): must return something + * src/mcs51/gen.c (aopForSym): small optimization, + moved declarations mcs51_ptrRegReq and mcs51_nRegs to ralloc.h, + (freeAsmop): added missing break, + (aopPut): removed parameter bvolatile, determine it inside the function, + (saveRegisters, unsaveRegisters): small optimization, + (genIpush): removed pointless check, + (throughout): replaced Safe_calloc, strcpy with Safe_strdup, + replaced sprintf with SNPRINTF, + replaced strcpy with strncpyz, + updated aopPut calls, + replaced D(emitcode("; genXXX", "")) with D(emitcode(";", "genXXX")) + * src/mcs51/ralloc.h: added declarations mcs51_ptrRegReq and mcs51_nRegs + +2006-05-24 Borut Razem + + * support/regression/tests/bug-221100.c: fixed xdata problem caused by + modification of test for the pic16 port, put the array to the code + memory for pic16port; thanks to Maarten Brock and Frieder Ferlemann + +2006-05-23 Jesus Calvino-Fraga + + * src/pic/gen.c: MSC 6 does not have . Use pstdint.h instead. + * support/Util/pstdint.h: added + +2006-05-22 Borut Razem + + * src/regression/Makefile: removed bool2.c test, added -q linker option + * src/regression/add2.c, src/regression/add3.c, src/regression/bool1.c, + src/regression/bool3.c, src/regression/nestfor.c, src/regression/ptrfunc.c, + src/regression/compare.c, src/regression/or1.c, src/regression/compare2.c, + src/regression/while.c, src/regression/compare3.c, src/regression/compare4.c, + src/regression/compare5.c, src/regression/sub2.c, src/regression/rotate1.c, + src/regression/rotate2.c, src/regression/rotate3.c, src/regression/rotate4.c, + src/regression/switch1.c, src/regression/rotate5.c, src/regression/for.c, + src/regression/add.c, src/regression/sub.c, src/regression/call1.c: + define SUPPORT_BIT_TYPES 0, removed unused bit variables + +2006-05-22 Raphael Neider + + * src/pic16/gen.c (pic16_storeForReturn): fragile fix for + bug #1492360 (problematic due to generic pointers, see code) + +2006-05-22 Borut Razem + + * support/regression/ports/pic16/specs.mk: removed stack size linker + directive + * support/regression/tests/array.c, + support/regression/tests/bitopcse.c, + support/regression/tests/bug-908454.c, + support/regression/tests/malloc.c: modified for pic16 regression test + * support/regression/tests/bitfields.c: + pic16 - excluded bitfileds of size > 8 + * support/regression/tests/bp.c: pic16 - reduced data size + * support/regression/tests/bug-221100.c: pic16 - reduced data size + * support/regression/tests/bug-460010.c: + pic16 - used the absolute address the fits in memory + * support/regression/tests/bug-716242.c: + bug [ 1443651 ] pic 16: redefining symbol that cannot be redefined. + * support/regression/tests/float.c: + pic16 - excluded - data size too big + * support/regression/tests/onebyte.c: + pic16 - bug [ 1444425 ] onebyte.c regression tes fails on pic16 + * support/regression/tests/shifts.c: + pic16 - function names probably have to differ in first X characters + (gpasm limitation?) + * support/regression/tests/staticinit.c: + pic16 - excluded some tests due error: no target memory available for + section ".idata" + +2006-05-22 Borut Razem + + * support/Util/dbuf.c: fixed bug #1489008 fix dbuf_c_str(), + second try. Thanks Stas Sergeev once more. + +2006-05-21 Maarten Brock + + * src/hc08/gen.c (transferAopAop): aop forced to stack was not restored, + (genLeftShift, genRightShift): fixed bug 1491627 + * src/hc08/peeph.def (rules 7, 8.x): added + * support/regression/tests/shifts.c (ShiftLeftByParam, + ShiftRightByParam, testShiftByParam): added to test variable shifting + +2006-05-20 Raphael Neider + + * src/pic/gen.c (bitpatternFromVal): fixed for 64-bit machines + * src/pic16/ralloc.c (newReg): use correct name in hashtable, + (allocReg): add only new registers to dynAllocRegs, + (pic16_assignRegisters): do not reset dynrIdx, fixes bugs + #1489055, #1445850, and probably #1483693 + +2006-05-19 Vangelis Rokas + + * src/pic16/glue.c (pic16_emitConfigRegs, pic16_emitIDRegs): fixed + bug in for-loop that didn't emit the last of CONFIG and ID registers + +2006-05-18 Maarten Brock + + * src/mcs51/gen.c (genCodePointerGet): inc dptr instead of loading acc + with offset + * src/mcs51/peeph.def (186.x): updated and reenabled to fix bugs + 1489016, 1434401 and 1490124 + * src/ds390/peeph.def (186.x, 227.x): updated and reenabled to fix bugs + 1489016, 1434401 and 1490124 + +2006-05-17 Borut Razem + + * support/Util/dbuf.c: fixed bug #1489008 fix dbuf_c_str(), + thanks Stas Sergeev + +2006-05-15 Maarten Brock + + * device/include/mcs51/P89c51RD2.h, + * device/include/mcs51/P89LPC901.h, + * device/include/mcs51/P89LPC922.h, + * device/include/mcs51/P89LPC932.h: added, thanks Omar Espinosa + +2006-05-14 Vangelis Rokas + + * device/lib/pic16/libsdcc/stack/{stack.S, Makefile.in}: add workaround + to fix missing stack pragma in compiled binary object file, + +2006-05-14 Bernhard Held + + * support/packihx/configure.in, + * support/packihx/configure: removed warning, autoconf >= 2.5x can + determine sizeof basic types even while cross compiling + +2006-05-13 Bernhard Held + + * src/avr/gen.c (aopop), + * src/ds390/gen.c (aopOp), + * src/hc08/gen.c (aopOp), + * src/mcs51/gen.c (aopop), + * src/pic16/gen.c (pic16_aopOp), + * src/pic/gen.c (aopOp), + * src/z80/gen.c (aopop): fix for bug #1479882; use new, exclusive asmop + if size of operand is smaller than spill location + +2006-05-12 Borut Razem + + * *.dsw, *.dsp: changed property svn:eol-style to CRLF since they + have to have CR/LF line endings even if they are checked out on *nix + or on WIN32 in cygwin binmode + +2006-05-12 Maarten Brock + + * doc/sdccman.lyx: documented numeric ranges, WEBDOC #1442369 + * device/include/ds80c390.h: added sfr16 definitions + * src/ds390/gen.c, + * src/ds390/gen.h, + * src/ds390/main.c, + * src/ds390/ralloc.c, + * src/ds390/ralloc.h: changes all over the place to sync with mcs51 + fixing several bugs and adding sfr16/sfr32, reentrant bit params, + bit returning functions + * support/regression/tests/sfr16.c: enabled test on ds390 + +2006-05-11 Erik Petrich + + * src/hc08/gen.c (asmopToBool, genIfx): fix for bug #1429722 + * src/hc08/gen.c (storeRegToAop): fix for bug #1439894 + +2006-05-11 Maarten Brock + + * sim/ucsim/sim.src/memcl.h: added get_decoder() to cl_address_space + * sim/ucsim/sim.src/mem.cc: implemented cl_address_space::get_decoder, + (cl_address_space constructor): removed expensive initialization, + (cl_address_space::get_cell): extended for late initialization, + (cl_address_space::*): use late initialization, + (cl_address_decoder::activate): removed expensive initialization, + This reduced regression test running time by 25% + +2006-05-11 Bernhard Held + + * packihx/, + * configure.in, + * configure, + * sdcc.dsw, + * Makefile.bcc, + * Makefile.in, + * support/packihx/Makefile.in, + * support/packihx/clean.mk, + * support/packihx/Makefile.bcc, + * support/packihx/PackIhx.dsp: moved packihx to support/packihx + +2006-05-11 Erik Petrich + + * src/SDCCval.c (valNot): fix for regression test failure + of not.c on big endian hosts + +2006-05-10 Maarten Brock + + * device/inlcude/mcs51/msc1210.h: new, added, thanks Philippe Latu + +2006-05-10 Erik Petrich + + * device/lib/mcs51/Makefile.in: changed string comparison operator + to = for POSIX compliance; == is bash extension + +2006-05-10 Maarten Brock + + * device/lib/hc08/_mulint.c: applied patch 1485428, thanks + kosmonaut_pirx + +2006-05-09 Vangelis Rokas + + * src/pic16/gen.c (pic16_freeAsmop): release any temp registers + allocated by aopForSym thus fixing bug #1478657 about failed testfwk.c + * src/pic16/main.c (_pic16_keywords): added 'sfr16' keyword, + * src/pic16/ralloc.c (pic16_allocWithIdx): also a fix for bug exposed by + bug report #1478657, + +2006-05-05 Borut Razem + + * doc/Makefile.in: remove of WARNINGS and labels.pl immediately after + making the html + +2006-05-02 Borut Razem + + * doc/Makefile.in: removed *.ind dependency since there is no rule to + create *.ind, which made make to fail if invoked with -j 2 + +2006-05-01 Maarten Brock + + * src/SDCCglue.c (emitRegularMap): partial fix for bug 1477149, thanks + Hubert Sack for patch 1479782 + +2006-05-01 Vangelis Rokas + + * src/pic16/glue.c (pic16_printIvalStruct): fixed bug #1445929 + +2006-05-01 Raphael Neider + + * src/pic/device.c (sanitise_processor_name): only remove p(ic) prefix, + (create_pic): store only prefix-free device name, + (init_pic): check for device names with "16" prefix, + (list_valid_pics), + * src/pic/device.h (struct PIC_device), + * src/pic/main.c (_pic14_genAssemblerPreamble): adapted to single + stored device name, + * device/include/pic/pic12f{635,675,629,683}.h, + * device/lib/pic/libdev/pic12f{635,675,629,683}.c: NEW device libraries + * device/lib/pic/libdev/Makefile.in: allow pic12* devices, + * device/include/pic/pic16f505.h, + * device/lib/pic/libdev/pic16f505.c: removed + * device/include/pic/pic14devices.txt: added support for pic12f + devices, removed unsupported non 16-bit devices + [above changes provided by patch from Zik Saleeba] + * src/pic/*, src/pic16/*, device/include/pic16/*, + device/lib/pic/**, device/lib/pic16/**: obfuscated email address + +2006-05-01 Borut Razem + + * configure.in, configure, doc/Makefile.in: + sync with nightly build makefile - latex, dvipdf and dvips + not needed any more + +2006-04-30 Bernhard Held + + * support/scripts/sdcc.nsi: removed all Readmes and Makefiles + in the library source + +2006-04-30 Maarten Brock + + * support/regression/ports/hc08/spec.mk: fixed bug 1478892 + +2006-04-28 Raphael Neider + + * src/pic16/pcode.c (pic16_newpCodeOpLit12), + * src/pic16/gen.c (pic16_popGetLit12): NEW, create 12 bit literal, + (pic16_loadFSR0): handle 12 bit literals correctly, fixes #1440527 + * src/pic16/pcode.h: added prototype for pic16_newpCodeOpLit12() + +2006-04-28 Bernhard Held + + * device/lib/pic/libdev/Makefile.in, + * device/lib/hc08/Makefile.in, + * device/lib/gbz80/Makefile.in, + * device/lib/z80/Makefile.in, + * device/lib/ds390/Makefile.in, + * device/lib/ds400/Makefile.in: added srcdir to include search path, + thanks to Borut for the bug report + * configure.in, + * configure: always create doc/Makefile independent from --enable-doc + * Makefile.in: always install from directory doc independent from + --enable-doc + * device/lib/pic/Makefile.in: added libdev again, it was erroneously + removed + * device/lib/pic/libdev/Makefile.in: fixed VPATH build + * doc/Makefile.in: install *.txt if present + * device/include/Makefile.in (install): added installation of pic/*.inc + and pic/*.txt files again, they were erroneously removed + +2006-04-28 Raphael Neider + + * src/pic/{gen.c,main.h,pcode.c}, + * src/pic16/{gen.c,pcode.c}: quietened compiler warnings + concerning signedness with casts + +2006-04-28 Raphael Neider + + * src/pic/gen.c (genFunction): set global pic14_hasInterrupt on + definition of an interrupt handler, + * src/pic/glue.c (pic14_emitInterruptHandler): moved output of + interrupt handler stuff from picglue() to separate routine, + (picglue): enabled definition of intr handlers in files w/o main() + +2006-04-26 Maarten Brock + + * support/librarian/sdcclib.c: moved include up to enable + compilation with MSVC 2005 Express Edition (VC8) + +2006-04-26 Bernhard Held + + * device/lib/Makefile: fixed build of gbz80 lib + +2006-04-26 Maarten Brock + + * support/regression/tests/bug-460010.c, + * support/regression/tests/bug-524691.c, + * support/regression/tests/bug-716242.c: removed conditional defines + that are already in testfwk.h + +2006-04-25 Maarten Brock + + * src/ds390/gen.c (AccAXRrl1, AccAXLrl1): changed to real rotate by 1, + (AccAXRsh1): added, shift right by 1, + (AccAXLsh, AccAXRsh, AccAXRshS): updated for AccAXRrl1, AccAXRsh1 and + AccAXLrl1 + * support/regression/tests/rotate.c: use and enabled ds390 + +2006-04-25 Bernhard Held + + * src/SDCCast.c (decorateType): partial fix for RFE 1475769, + remove cast to same type + * src/SDCCast.c (decorateType): fix for RFE 1475742, + optimize 'ifx (op == 0)' resp. 'ifx (op != 0)' + * as/z80/Makefile, + * link/z80/Makefile: removed, they have moved to + Makefile.in files + * configure, + * configure.in: replaced duplicate message about ucsim by missing sdcpp + * install-sh: fix bug #1204398 by setting umask 0022 + * device/lib/Makefile: separate build of z80 and gbz80 lib + +2006-04-24 Bernhard Held + + Enabled VPATH feature: changed nearly all Makefiles (149 files). + See sdccman.lyx '2.4.10 VPATH feature' about how to use it. + + One basic decision: e.g. src/clean.mk includes further files. In order + to make this work there are two solutions: + - rename another dozen clean.mk to clean_in.mk, add srcdir to them and + run configure on them. This way they can use + 'include $(srcdir)/port-clean.mk' + - always include clean.mk by the Makefile at the same level. To avoid + that `make clean` tries to include and build Makefile.dep the + MAKECMDGOALS are examined (see e.g. src/Makefile.in). This has been + implemented, because now even `make uninstall` doesn't create + Makefile.in. clean.mk could be eliminated by pasting it in + Makefile.in. + + * debugger/mcs51/Makefile.in: build own objects from library sources + (SLIB, SDCC) in current directory + + * configure, configure.in: renamed --disable-device-lib-build in + --disable-device-lib; added --enable-doc, the required tools are + searched by configure; added result message; the toolchain for the + belonging ports are now only built, if the port is enabled. + + * support/regression/*: all output is written in directory gen, because + the fwk and ports directories don't livet in the build tree using vpath + + * doc/sdccman.lyx: renamed --disable-device-lib-build to + --disable-device-lib, added --enable-doc, added section VPATH + + * sim/ucsim/configure.in, + * sim/ucsim/configure.in: hc08 couldn't be disabled, now hc08 and + z80 are enabled by default + +2006-04-24 Raphael Neider + + * src/pic/device.c (pic14_assignConfigWordValue): remember assignments + to config word, "pic14_"-prefixed some extern functions + (pic14_emitConfigWord): emit __config directive(s) if assignment to + config word has been found + * src/pic/device.h: added prototypes + * src/pic/pcode.c: added "pic14_"-prefix where needed + * src/pic/ralloc.c (IS_CONFIG_ADDRESS,pic14_assignRegisters): cosmetic + fixup + * src/pic/glue.c (pic14_constructAbsMap): handle assignments to config + words, + (pic14emitRegularMap): ignore config words, + (pic14createInterruptVect): moved generating __config directives away + (picglue): have __config directives emitted + +2006-04-24 Borut Razem + + * doc/Makefile: sync with nightly build makefile + +2006-04-24 Raphael Neider + + * src/pic/pcoderegs.c (OptimizeRegUsage): do not optimize + registers that have not been assigned proper liveranges, + fixes #1469504 and #1474602, + (pCodeRegOptimizeRegUsage): fixed typo in comment + +2006-04-24 Borut Razem + + * device/examples/main8051.c: deleted - it was removed from CVS + 24.mar.2000 and after that modified 18.feb.2001, so it reappered + after the transition to Subversion + * src/SDCCalloc.h: deleted - it was removed from CVS + 3.feb.2001 and after that modified 18.feb.2001, so it reappered + after the transition to Subversion + * sim/ucsim/cpu.gif, sim/ucsim/interrupt.gif, sim/ucsim/new.gif, + sim/ucsim/serial1.gif, sim/ucsim/serial2.gif, + sim/ucsim/term_cpuopt.gif, sim/ucsim/timers.gif, sim/ucsim/wins.gif, + sim/ucsim/post.jpg, sim/ucsim/UCsim.jpg: corrected + +2006-04-22 Maarten Brock + + * as/asx8051.dsp: added mcs51/strcmpi.h + * as/hc08/as_hc08.dsp: added asm.h, m6808.h, strcmpi.h + * as/hc08/aslink.h: updated lnksect prototype + * as/hc08/asm.h, + * as/mcs51/asm.h: added a_addr to struct area and s_org to struct sym + * as/hc08/asmain.c, + * as/mcs51/asmain.c (asmbl): init dot.s_org for S_ORG, + (newdot): handle A_ABS + * as/hc08/asout.c, + * as/mcs51/asout.c (outarea): output address + * as/hc08/lkaomf51.c, + * as/mcs51/lkaomf51.c: disabled unused array UsageType + * as/hc08/m08pst.c, + * as/mcs51/i51pst.c, + * as/z80/z80pst.c: "ABS" is not A_OVR + * as/hc08/lkarea.c (newarea): read a_addr, + (lnkarea): added codemap array, sort absolute areas to the front, + combine all GSINITx/GSFINAL, + (find_empty_space, allocate_space): new functions, + (lnksect): return next address, handle absolute sections + * as/mcs51/lkarea.c (newarea): read a_addr, + lnksect2 prototype changed, + (lnkarea2): define codemap unsigned, combine all GSINITx/GSFINAL, + (find_empty_space, allocate_space): new, factored out of lnksect2, + (lnksect2): return next address, handle absolute sections + * as/hc08/lkhead.c, + * as/mcs51/lkhead.c (newhead): head is absolute but not overlay + * as/hc08/lklibr.c (addfile, fndsym), + * as/mcs51/lklibr.c (addfile, buildlibraryindex, fndsym): prevent + index out of range and detect both '\' and '/' + * device/include/mcs51/c8051f200.h: added _XPAGE, removed bad comment + * device/include/stdbool.h: removed SDCC_ds390 from check to pass + regression tests (ds390 cannot return bool yet) + * doc/sdccman.lyx: changed version number, document changed --no-peep, + document critical interrupts on z80, document changed SDCC define + * src/asm.c (_asxxxx_mapping): fixed .org directive, + (_a390_mapping): added .org directive + * src/hc08/gen.c (transferAopAop): made bytemask log to fix warning, + (genMultOneByte): fixed warnings + * src/hc08/hc08.dsp: lowered warning level to 2 to suppress pedantic + ones + * src/pic16/device.c: removed newReg prototype, removed BYTE_IN_LONG + * src/pic16/gen.c (pic16_popGetLabel): made parameter key signed, + (pic16_genLeftShiftLiteral, genRightShiftLiteral): fixed warnings + * src/pic16/gen.h: changed prototype for pic16_popGetLabel + * src/pic16/main.c: removed newReg prototype + * src/pic16/pcode.c, + * src/pic16/pcode.h (pic16_emitDB): changed parameter c to int to fix + warnings + * src/pic16/pic16.dsp: lowered warning level to 2 to suppress pedantic + ones + * src/pic16/ralloc.c + * src/pic16/ralloc.h (newReg): changed type to int and size to unsigned + to fix warnings + * src/pic/pcode.c (allocInternalRegister): changed parameter optype + from short to PIC_OPTYPE + * src/pic/pic.dsp: lowered warning level to 2 to suppress pedantic ones + * src/pic/ralloc.c (newReg, allocInternalRegister): changed parameter + optype from short to PIC_OPTYPE + * src/port.h: made int_size unsigned to fix warnings + * src/SDCC.y: fixed warning on MSVC + * src/SDCCicode.c (getArraySizePtr): return unsigned int + * src/SDCCopt.c (convertToFcall): fixed warnings + * src/SDCCsymt.h: removed double prototype for genSymName + * src/xa51/ralloc.c (allocReg): made size unsigned int, type int and + offset int to fix warnings + +2006-04-22 Borut Razem + + * doc/sdccman.lyx, */Makefile, */Makefile.in: + references to CVS replaced with Subversion + +2006-04-21 Borut Razem + + * doc/sdccman.lyx, */Makefile, */Makefile.in: + references to CVS replaced with Subversion + +2006-04-19 Borut Razem + + * src/version.awk: adapted for svn + * /asxxxx/asxhtml/*.gif: set property svn:mime-type to image/gif + sim/ucsim/doc/*.gif: set property svn:mime-type to image/gif + sim/ucsim/doc/*.jpg: set property svn:mime-type to image/jpeg + /binutils-avr/etc/*.vi, *.jin: removed all properties + support/scripts/sdcc.ico: set property svn:mime-type to image/x-icon + +2006-04-19 Borut Razem + + * CVS to Subversion migration completed + +2006-04-18 Borut Razem + + * support/scripts/sdcc.nsi: removed unexisting ${DEV_ROOT}/lib/pic/*.o, + ${DEV_ROOT}/lib/src/pic/libdev/*.S, ${DEV_ROOT}/lib/src/pic/libdev/*.inc + +2006-04-17 Borut Razem + + * device/include/Makefile.in: added pic/*.inc to the installation + +2006-04-15 Bernhard Held + + * support/regression/collate-results.py: fixed output in case of + a valdiag error + * support/regression/generate-cases.py: fixed splitting of pathnames + with dots + * as/hc08/lklibr.c (addfile), + * as/mcs51/lklibr.c (addfile): fixed off-by-one bug + +2006-04-11 Raphael Neider + + * src/pic16/gen.c (getFreePtr, pic16_popRegFromString), + * src/pic16/ralloc.c (pic16_allocregWithName): removed debug output + * src/pic16/pcode.c (assignValnums): fixed #1460578 + +2006-04-11 Raphael Neider + + * device/lib/pic/libdev/*.c, + * device/include/pic/*.h: replaced sfr and data with __sfr and __data, + fixes #1468739, enables compilation in --std-c99 mode + * support/scripts/inc2h.pl: emit __sfr/__data instead of sfr/data + +2006-04-11 Raphael Neider + + * src/pic/device.c (find_device): removed debug output + (list_valid_pics): enabled verbose listing of supported devices + * device/include/stdbool.h: define bool as char for pic14/16 as well + +2006-04-07 Frieder Ferlemann + + * src/SDCC.y: allow using brackets here: "__interrupt (1) __using (1)" + +2006-04-07 Maarten Brock + + * .version: bumped version to 2.5.6 + * src/pic/ralloc.c (newReg): MSVC doesn't support __builtin_return_address + +2006-04-06 Raphael Neider + + * .version: bumped version to 2.5.6 (pic14 ABI changed) + * src/SDCCmain.c: add -DSDCC_PROCESSOR= for pic14 port + * src/pic/glue.c (emitSymbolToFile,pic14_constructAbsMap, + pic14emitRegularMap,pic14emitMaps): moved output for absolute symbols to + pic14_constructAbsMap + (pic14printPublics): declare absolute global symbols as global + (pic14createInterruptVect), + * src/pic/ralloc.c (IS_CONFIG_ADDRESS): support second config word, + (newReg): assume new registers unused, use correct name in + hashtable (reg->name instead of name), more debugLog output + * src/pic/device.h (PIC_device): added fields for verbose output + * src/pic/device.c: moved device definition to pic14devices.txt, + added routines for runtime parsing of pic14devices.txt, + added support for second config word + * src/pic/main.c (_process_pragma): removed #pragma maxram, + (_pic14_keywords): no longer accept "bit" and "sbit" keywords + (_pic14_initPaths): add search paths with "pic" suffix (not "pic14") + (_pic14_parseOptions): moved pCodeInitRegisters here + (_pic14_do_link): add "pic$(ARCH).lib" to linker arguments + * src/pic/pcode.c (AnalyzeBanking): bail out on unset processor, + (pCodeInitRegisters): rewrapped comments, perpared new approach to + handling the pseudo stack + * device/lib/Makefile.in: ignore failures in objects-pic16, + * device/lib/pic/{configure,configure.in,Makefile}: added libdev/ + * device/lib/pic/NEWS: document new dependency on picXXX.lib + * device/lib/pic/Makefile.subdir, + * device/lib/pic16/Makefile.subdir: improved clean rules + * device/lib/pic/libdev/: NEW, pic14 device libraries + * device/lib/pic/libsdcc/_gptr{get,put}{1,2,3,4}.S: use _X not X + * device/lib/pic/libsdcc/macros.inc: use _X not X, declare default SFRs + * device/include/Makefile.in: create subdir and install pic14 headers + * device/include/pic/p16f_common.inc: removed unused declarations + * device/include/pic/pic16*.h: added header files for 100+ 14 bit + PICs from inc2h.pl v1.6, + replaced BIT_AT macros with struct declarations + * device/include/pic/pic14devices.txt: definition of supported devices, + all above improvements contributed by Zik Saleeba, thanks + * support/scripts/inc2h.pl: removed BIT_AT, replaced with structs + * support/scripts/sdcc.nsi: also install pic14 device libraries and + headers + +2006-04-06 Maarten Brock + + * device/include/mcs51/c8051f410.h: added interrupt numbers, + * device/include/mcs51/c8051f200.h: old SiLabs mcu completes the list, + thanks to Charles Olds + +2006-04-06 Frieder Ferlemann + + * debugger/mcs51/cmd.c (infoRegisters): show return address on stack + +2006-04-06 Maarten Brock + + * src/SDCCpeeph.c (labelIsReturnOnly): fixed bug 1464657 + * src/mcs51/gen.c (genJumpTab): fixed bug in medium model + * support/regression/bug1464657.c: added, new test + +2006-04-05 Maarten Brock + + * src/SDCCmain.c (preProcess): implemented RFE 1449908, define SDCC as the + version number + +2006-04-05 Maarten Brock + + * src/SDCCpeeph.c (initPeepHole): implemented RFE 1460196, when both + --no-peep and --peep-file are used don't use default rules but + do use the + +2006-04-05 Maarten Brock + + * src/mcs51/gen.c (genCall): fixed bug 1457608 + +2006-03-30 Frieder Ferlemann + + * doc/sdccman.lyx: reverted to version 1.129 of december as my latest + changes seem to cause (trigger?) problems with the build system. + +2006-03-29 Maarten Brock + + * src/SDCCpeeph.c (operandsLiteral): new, added, + (callFuncByName): inserted operandsLiteral + * src/mcs51/peeph.def: reenabled 132.e, added extra check to 132.x + +2006-03-28 Frieder Ferlemann + + * doc/sdccman.lyx: added paragraph "Use of SDCC in Education" + * src/mcs51/peeph.def: disabled rule 132.e fixing bug #1453093 + +2006-03-24 Maarten Brock + + * src/z80/gen.c (genFunction, genEndFunction): fixed bug 1160666, + implemented patch 1120823 Thanks to Willy De la Court (normal + interrupts need an interrupt number now if they are made critical), + and enabled nesting of critical functions though not for gbz80 + (genCritical, genEndCritical): added functions + (genZ80Code): added cases for CRITICAL and ENDCRITICAL + * src/z80/mappings.i: added "ei" to all mappings + +2006-03-20 Frieder Ferlemann + + * sim/ucsim/cmd.src/newcmdcl.h: applied patch fixing GCC 4.1 build + submitted by the Debian SDCC maintainer Aurelien Jarno: + "Credits goes to Martin Michlmayr, who rebuilt the whole Debian + archive with gcc 4.1 on mips and wrote the patch" + +2006-03-16 Raphael Neider + + * src/pic16/genarith.c (genAddLit): simplified and fixed case where + the left operand is shorter than the result (c* = lit-c* + int), + fixes bug #1450796 + * src/pic16/gen.c (genRightShift): check IS_SYMOP before accessing + OP_SYMBOL + +2006-03-14 Vangelis Rokas + + * src/.version: increased version number to 2.5.5 + * src/SDCCmain.c (linkEdit): do not test for PIC16 target since, PIC16 + linking is done manually in pic16 port's _linkEdit, + * src/SDCCsymt.c (compStructSize): for target PIC16 and shell variable + PIC16_PACKED_BITFIELDS, compact bitfield structures as much as possible, + * src/pic16/gen.c (aopForSym): when direct register name is WREG then + allocate asmop as AOP_ACC, + (aopForRemat): added parameter 'bool result' in function declaration, + (pic16_aopGet): return AOP_ACC when accessing WREG, + (pic16_popGetTempReg): minor modification, + (pic16_popRegFromIdx): first try with 'pic16_regWithIdx' then with + 'pic16_allocWithIdx', + (genPcall): removed ftype, usage of OP_SYM_TYPE asserted error when + calling function in absolute addresses, + (genAssign): take into account AOP_ACC asmop, + * src/pic16/pcode.c (pic16_newpCodeOpReg): minor modifications, + * src/pic16/pcoderegs.c: some debug functions and lines added, + * src/pic16/ralloc.c (decodeRegType): added but commented out, + * (pic16_typeRegWithIdx): search 'pic16_dynInternalRegs' for given + register too, + * (pic16_findFreeReg, pic16_findFreeRegNext): allocate new register via + call to allocReg, not by manually allocating a new one, + (pic16_assignRegisters): now before going through the register + allocating functions mark all registers as free. This eliminates some + side effects resulting from peephole parser done earlier in the backbone + +2006-03-13 Maarten Brock + + * src/SDCCicode.c (geniCodeLogic), + * src/SDCCast.c (decorateType): applied patch by Bernhard for rfe 1422617 + +2006-03-10 Maarten Brock + + * src/mcs51/gen.c (sameReg): new, checks if two aop regs are the same, + (genSend): bugfix, do not allocate and free twice, + (shiftRLong): handle partially overlapping aops + * support/regression/tests/bitopcse.c: fixed warning redefined idata + +2006-03-08 Borut Razem + + * support/regression/fwk/include/testfwk.h: added defines for xdata, idata + for pic16 + +2006-03-08 Maarten Brock + + * support/regression/tests/bug1409955.c: new, added + * src/mcs51/gen.h: changed asmop.freed:1 to asmop.allocated for tracking + * src/mcs51/gen.c (newAsmop): set asmop.allocated to 1, + (aopForSym, aopOp): increment asmop.allocated if reused, + (freeAsmop): decrement asmop.allocated and check for zero instead of + using asmop.freed, + (freeForBranchAsmop): use asmop.allocated instead of asmop.freed, + (genNot, genCpl, genUminus, genMinus, genMult, genDiv, genMod, genCmpGt, + genCmpLt, genAndOp, genOrOp, genAnd, genOr, genXor, genRRC, genRLC, + genGetHbit, genGetAbit, genGetByte, genGetWord, genSwap, + genLeftShiftLiteral, genLeftShift, genRightShiftLiteral, + genSignedRightShift, genRightShift, genDataPointerGet, + genPagedPointerGet, genFarPointerGet, genCodePointerGet, + genGenPointerGet, genDataPointerSet, genAssign, genCast): free asmop's + in reverse order from allocation, + (genPlus, genCmpEq): free asmop's in reverse order from allocation and + added swappedLR to keep track + * support/regression/fwk/include/testfwk.h: added defines for xdata, idata, + pdata & code for GCC, z80, gbz80 & hc08 + * support/regression/tests/zeropad.c: moved defines to testfwk.h + +2006-03-08 Raphael Neider + + * src/pic16/main.c (_hasNativeMulFor): fixed bug #1444425 + +2006-03-07 Maarten Brock + + * device/include/mcs51/c8051f410.h: new SiLabs mcu + * src/ds390/peeph.def: disabled 186.d and 227.a as fix for #1434401 + * support/regression/tests/array.c: added parenthesis, made arrays unsigned + +2006-03-06 Borut Razem + + * support/regression/ports/pic16/spec.mk: link with libm18f.lib, + made the linker quiet + +2006-03-06 Vangelis Rokas + + * src/pic16/gen.c (genPcall): fixed bug #1443644 + * src/pic16/device.h (struct pic16_options_t): added 'int CATregs' flag + which dumps before the function entry point a data byte which represents + the number of the local variables used by the specified function, added + 'xinst' for initial support for Extended Instruction Support, + * src/pic16/gen.c (aopForSym, pic16_aopGet): beautifications, + (pic16_testStackOverflow): do not prefix GSTACK_TEST_NAME with + port->fun_prefix anymore (may change later), + (genFunction, genEndFunction): do not store/restore local registers for + _main (this should take care the --main-return command line option in + the future), + (genOr): removed some legacy pic-port instructions, + * src/pic16/genarith.c (genAddLit): re-enabled old code because + performing operations with SFR's causes data to be written more than + once to each SFR. Perhaps SFRs should be handled in special cases... + * src/pic16/glue.c: macros BIG_ENDIAN and BYTE_IN_LONG are moved to + pcode.h + * src/pic16/main.c (_process_pragma): stack bound checking did not take + into account for stack starting position, + (struct OPTIONS pic16_optionsTable): added command line argument + --extended or -y for Extended Instruction Support, + * src/pic16/ralloc.c (pic16_decodeOp): added case for FUNCTION, + (deassignLRs): *** perhaps the most important change, old 'for' code + (commented out for reference), didn't account for some registers which + were left marked 'not free' after a pointer operation. The change + reduces register usage a lot in some cases + +2006-03-04 Borut Razem + + * support/regression/ports/hc08/spec.mk: remove *.asm in traget + _clean + * support/regression/tests/bug-524697.c: decreased array size for + mcs51 to fit into the internal RAM + * support/regression/Makefile.in: a little bit more verbose + +2006-03-03 Borut Razem + + * support/regression/fwk/lib/testfwk.c, + support/regression/fwk/include/testfwk.h: introduced function + _prints(), nonrecursive _printn(), call _initEmu() from main() + * support/regression/ports/gbz80/support.asm, + support/regression/ports/ucz80/support.asm, + support/regression/ports/z80/support.asm, + support/regression/ports/ds390/support.c, + support/regression/ports/hc08/support.c, + support/regression/ports/host/support.c, + support/regression/ports/mcs51/support.c, + support/regression/ports/xa51/support.c: added empty _initEmu() + function + * support/regression/ports/pic16/gpsim.cmd, + support/regression/ports/pic16/spec.mk, + support/regression/ports/pic16/support.c, + support/regression/Makefile.in: added pic16 regression test + +2006-03-01 Raphael Neider + + * src/pic16/gen.c (genPcall,pic16_derefPtr,genGenPointerGet, + genConstPointerGet): use safe way of generating MOVFF to cover + literals as well as registers, fixes bug #1440527 + * src/pic16/glue.c (pic16_printIvalBitFields): prevent NULL pointer + dereference + (pic16_printIvalUnion,pic16_isUnion): NEW, handle initialized unions + more correctly, fixes bug #1232186 + (pic16_printIval): use pic16_printIvalUnion() for initialized unions + * src/pic16/main.c (_pic16_linkEdit): reorder linker arguments to make + gplink guess the correct processor in more cases, applied patch + from Till Riedel attached to and fixing bug #1436552 + +2006-02-20 Frieder Ferlemann + + * support/regression/tests/array.c: added, contains check for #1434401 + * src/mcs51/peeph.def: disabled 186.d as temporary fix for #1434401 + +2006-02-16 Maarten Brock + + * device/include/mcs51/at89s8253.h: new, thanks to Krzysztof Polomka + * device/include/mcs51/at89S8252.h: fixed, thanks to Krzysztof Polomka + * device/include/mcs51/c8051f326.h, + * device/include/mcs51/c8051f340.h: new SiLabs mcu's + * device/include/mcs51/c8051f000.h, + * device/include/mcs51/c8051f018.h, + * device/include/mcs51/c8051f020.h: used () with __at, renamed IDLE,STOP to + PCON_IDLE,PCON_STOP and added sfr16 definitions + +2006-02-14 Maarten Brock + + * src/mcs51/gen.c (genPlus, genMinus, genMult, genGetAbit, genGetByte, + genGetWord): fixed bug 1409955 + +2006-02-14 Maarten Brock + + * device/include/hc08/mc68hc908gp32.h, + * device/include/hc08/mc68hc908jb8.h: removed AWUL, added PTA6 & PTA7 + +2006-02-13 Maarten Brock + + * src/SDCCast.c (constExprValue): return NULL if not a value + * src/SDCCglue.c (printIvalArray): fixed bug 1225568 + * src/hc08/gen.c(genUnpackBits, genUnpackBitsImmed): fixed bug 1019480 + * support/regression/tests/bitfields.c: enabled signed bitfield for all + +2006-02-13 Borut Razem + + * src/regression/ptrarg.c: added, fails due to bug #1430967 + * src/regression/Makefile: ptrarg.c added, ... + +2006-02-12 Maarten Brock + + * src/z80/gen.c (genUnpackBits): fixed bug 1019480 + * support/regression/tests/bitfields.c: enabled signed bitfield for z80 + +2006-02-11 Borut Razem + + * src/SDCCmain.c: Added "sdcc: Calling linker..." if --verbose, + print "Processor: xxx" message to stdout only if --verbose + +2006-02-11 Maarten Brock + + * src/SDCCglue.c (printIvalStruct): fixed bug 1426356 union initializer + * support/regression/tests/bug1426356.c: added + * support/regression/tests/bitfields.c: removed 2 tests + +2006-02-10 Maarten Brock + + * device/include/mcs51/at89c51snd1c.h: updated comments, see patch 1428901 + * device/include/mcs51/c8051f330.h, + * device/include/mcs51/c8051f350.h: used () with __at, renamed IDLE,STOP to + PCON_IDLE,PCON_STOP and added sfr16 definitions + * device/lib/_divsint.c, + * device/lib/_divuint.c, + * device/lib/_divulong.c, + * device/lib/_divulong.c: renamed a,b to x,y to avoid confusion, fixed + register bank bug for small stackauto + +2006-02-09 Maarten Brock + + * support/regression/fwk/lib/timeout.c: include for exit() + +2006-02-08 Maarten Brock + + * support/regression/ports/mcs51-xstack-auto/spec.mk: forgot -I(...)/mcs51 + * all.dsp: corrected several bin paths + * device/include/mcs51/c8051f120.h, + * device/include/mcs51/c8051f300.h, + * device/include/mcs51/c8051f310.h: used () with __at and renamed IDLE,STOP + to PCON_IDLE,PCON_STOP + * device/include/mcs51/c8051f320.h: see above, also added sfr16 definitions + * device/lib/printf_large.c (output_float): fixed bug 1388703 + * support/regression/tests/bug1057979.c: added test for bug 1388703 + +2006-02-08 Raphael Neider + + * src/pic/pcode.c (pciTRIS): fixed typo, + (BuildFlow,LinkFlow_pCode): added (disabled) debug output, + (LinkFlow): fixed handling of flows that end in a call, + (ReuseReg): perform safety check earlier + * src/pic/pcoderegs.c (pCodeRegMapLiveRangesInFlow): fixed + to work with flows at the beginning of a pBlock, + fixes #1426557 (Symbol not previously defined), + (pic14_ReMapLiveRanges): NEW, destroy and rebuild register + usage information + (RemoveUnusedRegisters): update register usage info + * src/pic/ralloc.c (newReg): prevent duplicate registers from being + created, reuse existing ones instead + * src/pic/gen.c (genPcall): fixed #1424719 + +2006-02-07 Bernhard Held + + * link/z80/lkmain.c, + * link/z80/lklex.c, + * link/z80/lkdata.c, + * link/z80/aslink.h: fixed build on current cygwin: + replaced getline() by lk_getline() + +2006-02-01 Borut Razem + + * src/regression/add.c, src/regression/add2.c, src/regression/add3.c, + src/regression/add4.c, src/regression/and1.c, src/regression/and2.c, + src/regression/arrays.c, src/regression/b.c, src/regression/bank1.c, + src/regression/bool1.c, src/regression/bool2.c, + src/regression/bool3.c, src/regression/call1.c, + src/regression/compare.c, src/regression/compare10.c, + src/regression/compare2.c, src/regression/compare3.c, + src/regression/compare4.c, src/regression/compare5.c, + src/regression/compare6.c, src/regression/compare7.c, + src/regression/compare8.c, src/regression/compare9.c, + src/regression/configword.c, src/regression/for.c, + src/regression/inline.c, src/regression/mult1.c, + src/regression/nestfor.c, src/regression/or1.c, + src/regression/pointer1.c, src/regression/ptrfunc.c, + src/regression/rotate1.c, src/regression/rotate2.c, + src/regression/rotate3.c, src/regression/rotate4.c, + src/regression/rotate5.c, src/regression/rotate6.c, + src/regression/rotate7.c, src/regression/string1.c, + src/regression/struct1.c, src/regression/sub.c, + src/regression/sub2.c, src/regression/switch1.c, + src/regression/while.c, src/regression/xor.c, + src/regression/create_stc, src/regression/simulate, + src/regression/rt.sh, src/regression/Makefile: reenabled Scott's PIC14 + regression tests + * src/regression/gpsim_assert.h: added + +2006-01-28 Bernhard Held + + * src/ds390/gen.c (unsaveRegisters): fixed literal function pointer + ((void (code *) (void)) 0) (); + * as/hc08/aslex.c, + * as/hc08/aslink.h, + * as/hc08/asm.h, + * as/hc08/asmain.c, + * as/hc08/lkdata.c, + * as/hc08/lklex.c, + * as/hc08/lkmain.c, + * as/mcs51/aslex.c, + * as/mcs51/aslink.h, + * as/mcs51/asm.h, + * as/mcs51/asmain.c, + * as/mcs51/lkdata.c, + * as/mcs51/lklex.c, + * as/mcs51/lkmain.c, + * as/z80/aslex.c, + * as/z80/asm.h, + * as/z80/asmain.c: fixed build on current cygwin: + replaced getline() by as_getline() + +2006-01-27 Bernhard Held + + * src/SDCC.y: fixed bug #716242, exchanged pointer and function + declarator in the symbol chain + * src/SDCCsymt.h, + * src/SDCCsymt.c (processFuncPtrArgs): added, removes "(void)" + parameter list for function pointers + * src/SDCCast.c (decorateType): added call of processFuncPtrArgs() + * support/regression/tests/bug-716242.c: added + +2006-01-20 Bernhard Held + + * src/SDCCicode.c (geniCodeAdd, geniCodeArray): use char for array + offset if possible + * src/SDCCast.c (getLeftResultType): 255 fits in char, not 256 + +2006-01-18 Bernhard Held + + * src/SDCCast.c (backPatchLabels): fixed bug #1408066: made it + inifinitely recurseable, added static + * support/regression/tests/bug-1408066.c: added + +2006-01-17 Bernhard Held + + * src/SDCCicode.h, + * src/SDCCicode.c (newiTempPreheaderLabel, newiTempLoopHeaderLabel): + renamed, added possibility to create "postLoopLbl"-labels + * src/SDCCBBlock.c (iCodeBreakDown): renamed newiTempPreheaderLabel to + newiTempLoopHeaderLabel + * src/SDCCloop.c (newInduction, newRegion, backEdges, insertIntoLoop, + isNotInBlocks, addToExitsMarkDepth, createLoop, dominatedBy, + addDefInExprs, assignmentsToSym, isOperandInvariant, pointerAssigned, + hasNonPtrUse, loopInvariants, addressTaken, findInduction, + findDefInRegion, mergeRegions, ifMerged, mergeInnerLoops): made static, + (pinduction, pregion, hasIncomingDefs, findLoopEndSeq): disabled, + (basicInduction): fixed bug #136564, made static, + (loopInduction): changed parameter of basicInduction, made static, + (addPostLoopBlock): added + * src/SDCCloop.h: removed backEdges, pregion, pinduction, + loopOptimizations, addressTaken, findDefInRegion, hasIncomingDefs, + findLoopEndSeq + * support/regression/tests/bug-136564.c: added + * support/regression/ports/mcs51-xstack-auto/spec.mk: added + --std-sdcc99 to LIBSDCCFLAGS + +2006-01-16 Bernhard Held + + * src/SDCCicode.c (geniCodeIfx): fix bug 1406131: always false + while loop + * support/regression/tests/bug-1406131.c: added + +2005-12-31 Bernhard Held + + * src/SDCCast.c (decorateType): fix promotion of unary minus + * src/SDCCsymt.c (computeType): beautified + * src/SDCCval.c (cheapestVal): beautified, old non-Ansi version removed, + (valUnaryPM, valComplement): fix sign and promotion, + (valNot): ANSI: result type is int (SDCC: unsigned char) + * support/regression/tests/uminus.c: speedup by removing superflous + test case 'int' + * support/regression/tests/onebyte.c: added promotion and signedness + tests for unary minus + * support/regressions/tests/bug-477927.c: disable warning about + uninitialized variables + * support/regression/tests/not.c: added + +2005-12-28 Bernhard Held + + * device/lib/Makefile.in: added --std-sdcc99 to CFLAGS + * src/mcs51/gen.c (gen51Code): show final register usage after + fillGaps in asm with --i-code-in-asm + * src/SDCClrange.c (sequenceiCode, setLiveFrom, setLiveTo, + markLiveRanges, markAlive, findNextUseSym, findNextUse, unvisitBlocks, + incUsed, rliveClear, adjustIChain): made static, + (setFromRange): excluded because it's unused, + (findPrevUseSym, markWholeLoop): added, + (findPrevUse): rewritten; fixes bug 895992; now a complete search + through all branches of predecessors enables sdcc to emit the warning + W_LOCAL_NOINIT, marking of outermost loop was incomplete, + (rlivePoint): made static, added parameter emitWarnings which is only + true during the first run out of two, + (findRecursiveSucc, findRecursivePred): removed, + (computeLiveRanges): made static, added parameter emitWarnings, + (dumpIcRlive): added for debugging only + * src/SDCClrange.h: added boolean parameter to computeLiveRanges(), + removed prototype of setFromRange() + * src/SDCCopt.c (eBBlockFromiCode): added new parameter emitWarnings + in call of computeLiveRanges() + * support/regression/tests/bug-895992.c: added + * support/regression/tests/bug-971834.c: added + * support/valdiag/tests/bug-895992.c: added + * support/valdiag/tests/bug-971834.c: added + +2005-12-18 Raphael Neider + + * src/pic16/gen.c: added IS_DIRECT macro for "direct" operands, + (genUnpackBits): improved code for direct operands, + (genPackBits): improved code for literal assignment to bitfields + and for direct destination operands (no FSR indirection), + prevented redundant AND, fixes #1362800, + (AccLsh): added parameter to disable masking of the result + * src/pic16/pcode.c (pic16_safepCodeUnlink): fixed to work with + skip instructions with side-effects (like incfsz), + (pic16_pCodeIsAlive): suppress verbose output unless pcode_verbose, + * src/pic16/pcoderegs.c (RemoveRegsFromSet): removed annoying warning + * device/lib/pic16/Makefile.common.in: added --asm=@GPASM@ to CC, + fixes #1375263 + +2005-12-11 Bernhard Held + + * src/SDCCicode.c (geniCodeAssign): fixed bug 11369874, don't use + volatile variables as spill location + +2005-12-10 Bernhard Held + + * src/SDCCcse.c (findCheaperOp): fixed bug 1376320, copy signedness to + replacing literals + * support/regression/tests/bug-1376320.c: added + +2005-12-08 Raphael Neider + + * src/pic/device.c: renamed is_shared to pic14_is_shared + * src/pic/gen.c (genIfx): re-enabled handling of sbits + * src/pic/glue.c (emitSymbolToFile): added workaround for sbits, + (is_valid_identifier): added for above workaround + +2005-12-07 Maarten Brock + + * device/lib/Makefile.in: fixed to enable port-specific-objects + * device/lib/ds390/i2c390.c (BitOutI2C): optimized by making bout unsigned + char, thanks Hubert Sack + * doc/sdccman.lyx: documented --xstack-loc, + elaborated a bit more on interrupts and pitfalls, + removed "setjmp/longjmp unsupported", + documented some unsupported C99 features + * src/SDCCmain.c (linkEdit): adapted default lib path for --stack-auto + * src/SDCCpeeph.c (readRules): inserted patch 1367130 for finding missing + if, thanks Hubert Sack + * src/mcs51/gen.c (genEndFunction): enabled "pop psw" for regbank 0 isr + * support/regression/Makefile.in: test-mcs51-stack-auto no longer needs to + make make_library + * support/regression/get_ticks.py: new, get cpu cycles and code size, so + regression tests can report resource usage (rfe 700441) + * support/regression/collate-results.py: report resource usage + * support/regression/ports/ds390/spec.mk, + * support/regression/ports/hc08/spec.mk, + * support/regression/ports/mcs51/spec.mk, + * support/regression/ports/ucz80/spec.mk: run sim output through get_ticks + * support/regression/ports/ds390/uCsim.cmd, + * support/regression/ports/hc08/uCsim.cmd, + * support/regression/ports/mcs51/uCsim.cmd, + * support/regression/ports/ucz80/uCsim.cmd: inserted "state" to report time + * support/regression/ports/mcs51-stack-auto/spec.mk: no need to build the + library, use the default one + * support/regression/ports/mcs51-xstack-auto/spec.mk: inserted rules for + building the library + +2005-12-06 Maarten Brock + + * config.dsp: added dependency on .version and configure_vc.awk + * device/include/setjmp.h: updated for --stack-auto and --xstack + * device/include/mcs51/at89c51snd1c.h: corrected line endings + * device/include/mcs51/XC866.h: added, thanks Llewellyn van Zyl + * device/lib/_setjmp.c: updated for --stack-auto and --xstack + * device/lib/libsdcc.lib: added _setjmp + * src/SDCCast.c (createIvalCharPtr): fixed warnings, + (decorateType): fixed bug 1372851, + (optimizeGetHbit): fixed warning + * src/SDCCglue.c (printIvalChar, printIvalArray): adapted for flexible + array initialisation + * support/regression/tests/bug1057979.c: added test for bug 1358192 + * support/regression/tests/setjmp.c: added, test for setjmp/longjmp + +2005-12-03 Borut Razem + + * support/scripts/sdcc.nsi: added /SOLID option to "SetCompressor lzma" + command since the NSIS was upgraded to version 2.11 on CF x86-linux2 + +2005-11-29 Bernhard Held + + * src/SDCCast.c (createIvalStruct, createIvalArray, createIvalPtr, + createIval): implement symbol independant "flexible array member", + (createIvalCharPtr): implemented flexible array initialisation with a + string + * src/SDCCsymt.c (copyStruct): removed, + (getSize): fixed misleading comment, + (getAllocSize): removed, the additional allocation size is now in + sym->flexArrayLength, + (checkStructFlexArray): new, syntax checks for flexible array members, + (compStructSize): added syntax checks for "flexible array members" + (copyStruct): removed, + (copyLinkChain): removed inefficient fix for bug 770487 + * src/SDCCglue.c (emitRegularMap): getAllocSize has been removed + * src/SDCCsymt.h: added structdef.b_flexArrayMember and + symbol->flexArrayLength + * src/SDCCerr.c, + * src/SDCCerr.h: added W_INVALID_FLEXARRAY, W_C89_NO_FLEXARRAY, + E_FLEXARRAY_NOTATEND and E_FLEXARRAY_INEMPTYSTRCT + * support/regression/tests/structflexarray.c: added + * support/valdiag/tests/structflexiblearray.c: added + +2005-11-29 Bernhard Held + + * src/SDCCast.c (decorateType): fixed bug 1368489 + * support/Util/SDCCerr.c, + * support/Util/SDCCerr.h: added warning W_CMP_SU_CHAR + +2005-11-28 Frieder Ferlemann + + * device/include/mcs51/at89c51snd1c.h: added file submitted by + Weston T. Schmidt , patch #1368001 + +2005-11-27 Borut Razem + + * support/cpp2/cppinit.c, support/cpp2/cpplib.h, support/cpp2/mkdeps.c, + support/cpp2/mkdeps.h: added command line option + -obj-ext= to SDCPP to define object file externion, used + for generation of make dependencies (-M) + * src/SDCCmain.c: pass -obj-ext= to SDCPP + +2005-11-26 Borut Razem + + * support/scripts/sdcc.nsi: added small-stack-auto libraries, + added missing device/lib/mcs51/crt*.asm, pic and pic16 sources, + added pic and pic16 libraries + +2005-11-26 Jesus Calvino-Fraga + + * device/include/float.h: Corrected typo in prototype of __fsgt + +2005-11-25 Borut Razem + + * sdcc/device/lib/Makefile.in, sdcc/device/lib/incl.mk: + added creation of model-mcs51-stack-auto libraries + +2005-11-24 Bernhard Held + + * src/SDCCsymt.c (copyLinkChain): fixed bug 770487, copy structdef + and fields-list too + * src/SDCCast.c (createIvalArray): removed obsolete comment + +2005-11-24 Borut Razem + + * sdcc/device/lib/Makefile.in: remove all unnecessary files, 2nd try..., + added missing device/lib/mcs51/crt*.asm sources + +2005-11-23 Bernhard Held + + * src/SDCCast.c (createIvalCharPtr): fixed bug 1348271 + +2005-11-22 Maarten Brock + + * device/lib/_fs2schar.c, + * device/lib/_fs2sint.c, + * device/lib/_fs2slong.c: optimized inline asm + +2005-11-21 Jesus Calvino-Fraga + + * device/lib/_fs2slong.c, device/lib/_fs2sint.c, device/lib/_fs2char.c: + Better handling of floats between -1.0 and 0.0. + +2005-11-20 Frieder Ferlemann + + * src/mcs51/peeph.def: added missing "if"s as noted by Hubert Sack. + (the missing "if"s prohibited removal of redundant labels) + +2005-11-19 Jesus Calvino-Fraga + + * device/lib/_fs2slong.c, device/lib/_fs2sint.c, device/lib/_fs2char.c: + Properly convert floats between -1.0 and 0.0 to long, int, and char + types (max integer value of negative floats tends to zero). + * device/lib/modff.c, device/lib/ceilf.c, device/lib/floorf.c: + Removed changes made so to work properly with floats between + -1.0 and 0.0, as the problem is fixed in _fs2slong.c, _fs2sint.c, + and _fs2char.c + +2005-11-18 Bernhard Held + + * src/SDCCcse.c (ReplaceOpWithCheaperOp): minor fix for debugging only + * src/mcs51/gen.c (genUnpackBits): better code and a fix, + (genCast) cosmetic change + * src/ds390/gen.c (genUnpackBits, ): ported from mcs51 + * src/ds390/ralloc.c (packRegsForAssign): ported fix for bitfields + from mcs51 + * support/regression/tests/bitfields (testSignedBitfields): added + +2005-11-18 Borut Razem + + * sdcc/device/lib/Makefile.in: remove all unnecessary files + * device/lib/pic/Makefile.rules, device/lib/pic16/Makefile.subdir: + introduced SILENT option to make building of pic16 libraries less + +2005-11-18 Jesus Calvino-Fraga + + * device/lib/modff.c, device/lib/ceilf.c, device/lib/floorf.c: + Now they work properly with floats between -1.0 and 0.0 + * device/lib/printf_large.c: Removed temporary patch for bug 1358192 + +2005-11-18 Maarten Brock + + * src/SDCCicode.c (printOperand): added missing else + +2005-11-18 Bernhard Held + + * src/SDCCsymt.c (computeType): fixed bug 1358192: added missing else, + reformatted for better readability + * src/mcs51/gen.c (genUnpackBits): initial, incomplete support for + signed bitfields + +2005-11-17 Borut Razem + + * device/lib/pic16/Makefile.rules, device/lib/pic16/Makefile.subdir: + introduced SILENT option to make building of pic16 libraries less + verbose - used for nightly snapshot build + * doc/sdccman.lyx: documented that SDCDB and ucSim are currently not + available on Win32 platforms. + * sdcc/device/lib/Makefile.in: added library sources for mcs51, small, + medium, large, pic and pic16 + +2005-11-16 Jesus Calvino-Fraga + + * device/lib/printf_large.c: Temporary patch for bug 1358192: + printf("%f"...) sets fraction to zero. + +2005-11-16 Raphael Neider + + * src/pic/pcode.c (LinkFlow): handle empty flows correctly, + fixes #1357221 + * src/pic/gen.c (genIfx): implemented for CARRY bit + * src/pic16/gen.c (genAssign,genCast): fixed assigning/casting + to generic pointers, fixes #1357332, + (pic16_movLit2f): NEW, + (pic16_storeForReturn,genDataPointerSet): use pic16_movLit2f + +2005-11-14 Maarten Brock + + * src/SDCCmain.c (parseCmdLine): fixed bug 1356800, thanks rsudjian + +2005-11-11 Raphael Neider + + * src/pic/gen.c: handle FPOINTERS like POINTERS everywhere + * src/pic16/gen.c (pic16_derefPtr): now works for non-pointers as well, + compute pointer's type from operand, + (genUnpackBits,genPackBits): handle FPOINTERS correctly, re-indented, + improved single bit reads, fixes bug #1353379 + +2005-11-09 Borut Razem + + * support/scripts/sdcc.nsi: added lib/pic to the package + +2005-11-08 Maarten Brock + + * src/SDCCval.c (valUnaryPM): fixed bug 1350699 + +2005-11-06 Maarten Brock + + * support/regression/tests/bug1348008.c: added + * src/mcs51/gen.c (saveRBank, unsaveRBank): fixed bug 1348008 + * support/regression/tests/bug1337835.c: updated comment + +2005-11-06 Borut Razem + + * sim/ucsim/error.cc, sim/ucsim/errorcl.h, + sim/ucsim/sim.src/stack.cc, sim/ucsim/sim.src/stackcl.h, + sim/ucsim/sim.src/uc.cc, sim/ucsim/sim.src/uccl.h, + sim/ucsim/sim.src/mem.cc, sim/ucsim/sim.src/memcl.h, + sim/ucsim/cmd.src/set.cc, sim/ucsim/cmd.src/show.cc: + dynamic construction of cl_error_class and derivates - 2.nd try + +2005-11-05 Borut Razem + + * sim/ucsim/sim.src/error.cc: fixed uninitialized class member variable + bug, which caused Bus Errors on sparc solaris + +2005-11-04 Borut Razem + + * sim/ucsim/error.cc, sim/ucsim/errorcl.h, + sim/ucsim/sim.src/stack.cc, sim/ucsim/sim.src/stackcl.h, + sim/ucsim/sim.src/uc.cc, sim/ucsim/sim.src/uccl.h, + sim/ucsim/sim.src/mem.cc, sim/ucsim/sim.src/memcl.h, + sim/ucsim/cmd.src/cmdconf.cc: dynamic construction of cl_error_class + and derivates to resolve the initialization problem on OSX + +2005-11-02 Borut Razem + + * sim/ucsim/cmd.src/cmdutil.cc, sim/ucsim/cmd.src/newcmd.cc: + corrected typo - #include + +2005-11-02 Maarten Brock + + * src/asm.c (printILine): always close tmpFile, thanks Beau E. Cox, + (_asxxxx_mapping): added org directive for future enhancements + +2005-11-01 Borut Razem + + * sim/ucsim/app.cc, sim/ucsim/cmd.src/cmdutil.cc, sim/ucsim/cmd.src/newcmd.cc: + enabled sockets on WIN32 + * sim/ucsim/cmd.src/newcmd.cc: fixed bug with uninitialized variables + +2005-10-31 Borut Razem + + * support/regression/generate-cases.py: escape backslashes in {testcase}: + WIN32 backslash path delimiters should be escaped when used in C strings + * support/regression/tests/bitfields.c: exclude failing assertions for + __CYGWIN32__ and __MINGW32__ hosts + +2005-10-30 Borut Razem + + * src/SDCCutil.c: corrected double comparison typo + +2005-10-30 Maarten Brock + + * device/lib/medium/Makefile: added for new memory model medium + * device/include/asm/mcs51/features.h: updated for medium/pdata + * device/include/mcs51/c8051f120.h: added sfr16/sfr32 definitions, + added Multiply & Accumulate sbit's and MAC0_PAGE define + * device/include/mcs51/c8051f300.h: added sfr16 definitions + * device/include/mcs51/c8051f310.h: added sfr16 definitions + * device/lib/_mullong.c: update for medium model + * device/lib/incl.mk: added medium model + * doc/sdccman.lyx: documented medium model + * src/SDCCast.c (isBitAndPow2): simplified using updated powof2 + * src/SDCCicode.c (geniCodeMultiply, geniCodeDivision): use updated powof2 + * src/SDCCmain.c (optionsTable, linkEdit): enabled medium model + * src/SDCCmem.c (allocIntoSeg): set iaccess for pdata symbols, + (allocParms): set SCLS and OCLS to pdata for medium model + * src/SDCCsymt.c (processFuncArgs): use default_local_map and set iaccess + for pdata, + (powof2): return <0 if not power of 2 + * src/avr/gen.c (genBitWise): use updated powof2 + * src/mcs51/gen.c (genMinusDec): use acc if necessary, + (shiftR2Left2Result): small optimization in setup, save acc when storing, + (shiftLLeftOrResult): use B if necessary + * src/mcs51/main.c (_mcs51_finaliseOptions, mcs51_port): added medium model + * src/mcs51/peeph.def: renamed 226 to 226.b, added 226.a + * src/pic/main.c (_pic14_do_link): made void parameter list explicit + * support/regression/Makefile.in: added test-mcs51-medium + * support/regression/ports/mcs51-medium/spec.mk: added to test medium model + +2005-10-28 Bernhard Held + + * src/SDCCsymt.c (compStructSize): make bitfields without (un)signed + specifier unsigned + * device/lib/time.c (mktime): fixed bug 1334315 + +2005-10-28 Raphael Neider + + * device/include/pic/p16f_common.inc: added common declarations + * src/pic/ralloc.c (initStack): moved regs *r to block start for Alpha + +2005-10-27 Maarten Brock + + * src/mcs51/gen.c (getTempRegs): return 0 if not enough registers found, + (aopPutUsesAcc): added to predict accumulator use, + (assignResultValue): save acc if necessary, + (genMinusDec): store result if indirectly addressed, + (genDivOneByte): save acc if necessary, + (movLeft2Result): bugfix if left already in acc, + (genAnd, genOr, genXor, shiftL2Left2Result, shiftR2Left2Result): pay more + attention to accumulator use (esp. pdata), + (genReceive): receive pdata correctly + * src/SDCCicode.c (isOperandInPagedSpace): added to detect pdata operands + * src/SDCCicode.h: added isOperandInPagedSpace prototype + +2005-10-27 Raphael Neider + + * doc/sdccman.lyx: corrected version (should be 2.5.4 not 2.5.5) + +2005-10-27 Raphael Neider + + * .version: changed version to 2.5.4 + * doc/sdccman.lyx: changed version to 2.5.4, added some remarks to PIC14 + * device/lib/pic/libsdcc/{_mulint.c,_mullong.c}: use unsigned literals, + (_divschar.c,divuchar.c,_mulchar.c,_modschar.c,_moduchar): NEW, + arithmetics support routines + * device/lib/pic/Makefile.rules: have assembler sources preprocessed + * device/lib/Makefile.in: also create installdir for pic + + * src/SDCCopt.c (cnvToFcall): mark support routines `extern' for + pic14 port as well + * src/pic/device.c (dump_sfr): rewritten to delegate register + placement to the linker (use `extern sym' rather than sym EQU addr), + (validAddress): fixed to check last specified address + * src/pic/gen.c (aopForSym): added code to deal with array (useless?), + (popGetLit): truncate literal value to 8 bit, + (popGet): moved assert to more appropriate place + (popGetExternal): create pCode operand from and mark the according + symbol as being `extern' + (popGetAddr): added sanity check on immediate's offset, provide + GPOINTER tag on demand + (aopPut): fixed for immediates, + (mov2w_op): move operand's address or contents to WREG (depending on + operand type), safer variant of mov2w, + (movwf,call_libraryfunc): NEW, handy abbreviations, + (get_argument_pcop,get_return_val_pcop,pass_argument, + get_returnvalue): interface for accessing function parameters and + return values, + (assignResultValuei,genRet): use new parameter/return value interface + (pic14_getDataSize): back to old version handling generic pointers, + (pic14_toBoolean,genNot,genCpl,genCmpEq,genOrOp): heavily rewritten, + provided implementation and/or fixed old one, + (genMultOneByte,genDivOneByte,genModOneByte): implemented as library + calls, removed legacy 8051 reference code + (AccLsh,AccRsh): rewritten and fixed to deal with signed operands + (loadSignToC): NEW, move the operands sign bit to CARRY, + (genGenericShift): NEW, replaces genLeftShift, genRightShift and + genRightShiftSigned, accepts negative shift counts, + (setup_fsr): load FSR and adjust IRP (indirect memory access), + (emitPtrByteGet,emitPtrByteSet): rewritten, now works with + generic pointers, __data pointers and __code pointers, + (genUnpackBits,genPackBits): rewritten to work with generic pointers + and signed bitfields, limit bitfields to 8 bit, + (genDataPointerGet): fixed number of bytes read, + (genGenPointerGet,genConstPointerGet): fixed bitfield access, + (genPointerGet,genPointerSet): fixed handling of __code pointers, + pointers to constant data are no longer assumed to point to __code + space, removed invalid pointer types, + (bitpatternFromVal): retrieve the PICs representation of an integer + or float literal, + (genDataPointerSet): fixed assigning to po_immediate operands, + (genGenPointerSet): implemented as library call, + (genIfx): fixed incorrect condition, + (genAddrOf): limit generic pointers' addresses to 2 bytes, + provide GPOINTER tag according to destination's storage class, + (genCast): added code to handle casting to generic pointers, added + sign-/zero extension of the result + (aop_isLitLike,op_isLitLike): fixed handling of immediates + * src/pic/gen.h: added macros to access IRP bit in STATUS register + * src/pic/genarith.c (genAddLit): use min(result's,left's) size, sign + extend the result + * src/pic/glue.c (is_shared_address,is_shared): check whether a given + address/register resides in the shared banks + (emitSymbolToFile): improved to handle global and `pinned' symbols, + put all variables into separate sections (have the linker arrange + them) + (picglue): put init code and interrupt handlers in separate sections + * src/pic/main.c: added port specific options table, modified to PORT + structure to make GPOINTERs 3 byte, added pic14_options + (_pic14_do_link): private linking routine (update paths to libraries, + add libsdcc.lib by default) + * src/pic/main.h: declare pic14_options + * src/pic/pcode.c: fixed instructions i/o relations, + (RegCond): reverted to correct version, + (newpCodeOpLit): truncate literals to 8 bit, + (genericPrint): added debug output, + (getRegFromInstruction): fixed for various operand types, simplified + (BuildFlow): fixed broken handling of isntructions with labels + (LinkFlow): start at last instruction in flow (skip trailing comments), + pass the flow on to the next instruction after CALL + (pCodeReplace): NEW, replace a pCode and move meta data to the new one + (insertPCodeInstruction): fixed inserting after a skip instruction, + (DoBankSelect): fixed for labeled instructions + (OptimizepBlock): honor --nopeep switch + (AnalyzeFlow,ReuseReg): prevent crash on source files with no function + * src/pic/pcodepeep.c (pCodePeepMatchRule): prevent NULL pointer accesses + * src/pic/pcoderegs.c (regIsLocal): NEW, check visibility of a register + (pCodeOptime2pCodes): allow disabling this optimization via + --no-pcode-opt due seldomly occuring bugs, fixed some conditions + but is still buggy), started implementation of a dataflow based + pCode optimization (CSE + dead code elimination) + (pCodeRegMapLiveRangesInFlow): removed bogus inCond + * src/pic/ralloc.c (initStack): renamed stack registers to STK%d, the new + names are independant of the stack location and therefore portable across + devices + +2005-10-27 Maarten Brock + + * src/mcs51/ralloc.c (bitType): added to detect bit variables, + (selectSpil): fixed bug 1337835 by not spilling bit variables + * support/regression/tests/bug1337835.c: added test for this bug + * src/mcs51/peeph.def: restart after rule 3.c, + addded rules 263.x to optimize loading constants + +2005-10-26 Raphael Neider + + * src/SDCCsymt.c (compStructSize): allow signed bitfields for PIC ports + * src/pic16/gen.c (genUnpackBits): support signed bitfields, + (genAssign): emit warning when casting literals to generic pointer + type, also applies when taking the address of a fixed variable, + (genCast): improved casting to generic pointers + * src/pic16/glue.c (pic16emitStaticSeg): fixed(?) handling of fixed + extern variables, added verbose error message + * device/include/pic16/{string.h,errno.h}: added #pragma library c + +2005-10-26 Bernhard Held + + * src/mcs51/gen.c (genMinus): fixed bug 1270906: reverse subtraction, + carry must be complemented too + * src/mcs51/peeph.def: addded rule 262 to remove double cpl c, which + could be emitted by genMinus + * src/SDCCval.c (constVal): fixed bug 1305065 + +2005-10-25 Bernhard Held + + * src/SDCCast.c (addCast): added promotion for bit variables + (decorateType): emit W_COMPLEMENT before the problem vanishes behind + promotion casts + optimisation + (optimizeGetWord): fix warning 'i' might be used uninitialized + * src/mcs51/gen.c (genCpl): removed W_COMPLEMENT + * src/ds390/gen.c (genCpl): removed W_COMPLEMENT + +2005-10-24 Bernhard Held + + * src/SDCCicode.c (ast2iCode): reverted to 1.224 because of regression: + all chars are promoted to int; promotion should be handled in SDCCast.c + +2005-10-15 Jesus Calvino-Fraga + + * device/lib/_strcmp.c: Fixed bug 1326457 + +2005-10-11 Raphael Neider + + * device/lib/pic16/libio/i2c.ignore: added 1320, fixes broken builds + * device/lib/pic16/libdev/pic18f1320.c: added 1320's device library + +2005-10-05 Maarten Brock + + * src/SDCC.y (AT): fixed bug with sfr32 addresses when built with GCC + * support/regression/tests/sfr16.c: added test for the sfr32 bug + +2005-10-04 Raphael Neider + + * device/include/pic16/pic18fregs.h, src/pic16/devices.inc, + device/lib/pic16/pics.all: added pic18f1320 + * src/pic16/pcode.c (mnem2key): fixed prototype's argument mismatch + +2005-09-30 Raphael Neider + + * src/pic16/device.c (Pics16[]): moved device descriptions to devices.inc + * src/pic16/devices.inc: NEW, provides device descriptions + * src/pic16/gen.c (genInline): fixed handling of ';'-comments + +2005-09-26 Maarten Brock + + * src/SDCCicode.c (operandOperation): added GETABIT, GETBYTE, GETWORD and + GETHBIT + +2005-09-25 Maarten Brock + + * doc/sdccman.lyx: updated Highest Order Bit documentation, + documented Any Order Bit, Higher Order Byte and Higher Order Word + * src/SDCC.y: added tokens GETABIT, GETBYTE, GETWORD + * src/SDCCast.c (optimizeGetHbit): updated to also accept bool=expr&(1<>(8*n), + (optimizeGetWord): new, to get a word from a long int: expr>>(8*n), + (isConformingBody): also check GETABIT, GETBYTE, GETWORD, + (decorateType): '&': also try GETABIT, GETBYTE, GETWORD optimization, + RIGHT_OP: also try GETBYTE, GETWORD optimization, + GETABIT, GETBYTE, GETWORD: decorate them, + (isShiftRightLitVal, isBitAndPowOf2): new helper functions, + (ast_print): added GETABIT, GETBYTE, GETWORD + * src/SDCCcse.c (isSignedOp): added GETABIT, GETBYTE, GETWORD + * src/SDCCicode.c (codeTable): added GETABIT, GETBYTE, GETWORD, + (geniCodeBinary): new generic binary icode, + (ast2iCode): added GETABIT, GETBYTE, GETWORD + * src/port.h: updated comment for PORT.hasExtBitOp + * src/mcs51/gen.c (genGetAbit): new, to get any single bit, + (genGetByte): new, to get a single byte, + (genGetWord): new, to get a word from a long, + (gen51Code): added GETABIT, GETBYTE, GETWORD + * src/mcs51/main.c (hasExtBitOp): added GETABIT, GETBYTE, GETWORD + +2005-09-23 Raphael Neider + + * configure.in, configure: have device/lib/pic configured + * device/lib/Makefile.in: added model-pic14 + * device/lib/clean.mk: added pic/ to clean rule + * device/lib/pic: added rudimentary pic14 library providing support + functions for multiplication/division/generic pointer access + * src/SDCCopt.c (convilong): mark support functions as extern + for pic14 port as well + * src/pic/gen.c (genMult): added assertions, + (genpic14Code): emit warning on unhandled iCodes + * src/pic/main.c (_hasNativeMulFor): return true only for 8x8 bit + * src/pic/pcode.c (pCodeOpCopy), + * src/pic16/pcodepeep.c (pic16_pCodeOpCopy): fixed handling of various + pCodeOpReg-subtypes (PO_{STATUS,INTCON,PCL,PCLATH,PCLATU,BSR, + SFR_REGISTER}), made safe for future extensions + * src/pic16/pcode.c (pic16_safepCodeUnlink): allow for removal of + instructions even if preceeded by SKIP instructions (also remove + them); removed unused code + * src/pic16/pcode.h: added arg2 to pCodeOpLit to match pCodeOpLit2, + prevents leaving parts of the structure uninitialized after copying + +2005-09-22 Maarten Brock + + * src/mcs51/gen.c (genMinus): fix for undetected bug introduced 3 months + ago by me + * support/regression/tests/addsub.c: added test for the bug + +2005-09-21 Raphael Neider + + * device/include/pic16/pic18f1220.h, + device/lib/pic16/libdev/pic18f1220.c: added ECCPAS sfr and bitfield + * device/lib/pic16/Makefile.rules: added missing opening paren + * src/pic16/gen.c (pic16_genNot,pic16_genCpl): removed as these + are provided in genutils.c, + (genUminusFloat,genUminus,genCmpEq): added asserts on different + operand/result sizes, + (genCmp): assert on NULL pointers first, then check deref'ed values + * src/pic16/genutils.c (pic16_genCpl): fixed for different operand/ + result size + +2005-09-18 Raphael Neider + + * src/pic16/gen.c (genFarPointerGet,genFarPointerSet): removed + as these are now unused, + (genPointerGet,genPointerSet): handle FPOINTERs like POINTERs + * src/pic16/pcode.c (pic16_symIsSpecial): assume REG_TMPs to be + local, avoids uninitialized pointer dereference on r->name + * src/pic16/ralloc.c (newReg): fixed indentation + +2005-09-13 Maarten Brock + + * src/SDCCval.c (constVal): fixed bug 730366 + * support/Util/SDCCerr.c, + * support/Util/SDCCerr.h: added warning W_INVALID_INT_CONST + +2005-09-10 Maarten Brock + + * as/mcs51/lkmem.c (summary2): fixed report for absolute areas (bug 1210220) + +2005-09-09 Maarten Brock + + * src/mcs51/peeph.def (241.x): fixed bug when comparing generic pointers + +2005-09-08 Maarten Brock + + * as/hc08/lkaomf51.c (OutputName): made name unsigned char, + (hex2dec): made hex_digit unsigned char, removed ascii dependance + * as/mcs51/lkaomf51.c (OutputName): made name unsigned char, + (hex2dec): made hex_digit unsigned char, removed ascii dependance + * as/mcs51/lkarea.c (lnkarea2): sort absolute areas to the front + * packihx/packihx.c (hexDigit): made c unsigned char + * as/mcs51/lklibr.c (fndsym), + * link/z80/lkgb.c (gb), + * link/z80/lklibr.c (fndsym), + * link/z80/lkrloc.c (relr), + * sim/ucsim/libltdl/ltdl.c (load_deplibs, try_dlopen), + * src/SDCC.lex (checkCurrFile, process_pragma), + * src/SDCCglue.c (spacesToUnderscores), + * src/SDCCmain.c (setParseWithComma, processFile), + * src/asm.c (tvsprintf, printCLine), + * src/avr/gen.c (emitcode, aopPut), + * src/ds390/gen.c (emitcode), + * src/hc08/gen.c (emitcode, emitinline), + * src/mcs51/gen.c (emitcode, genInline), + * src/pic/pcodepeep.c (cvt_extract_destination, cvt_extract_status, + tokenizeLineNode), + * src/pic/ralloc.c (debugLog), + * src/pic16/pcodepeep.c (cvt_extract_destination, cvt_extract_status, + tokenizeLineNode), + * src/pic16/ralloc.c (debugLog), + * src/z80/main.c (_process_pragma): + made all ctype.h function calls safe + * src/SDCCopt.c: include math.h for fabs + * src/SDCCpeeph.c: added macros ISCHARDIGIT, ISCHARSPACE and ISCHARALNUM + and used them throughout the code to make ctype.h function calls safe + * src/ds390/main.c (asmLineNodeFromLineNode), + * src/mcs51/main.c (asmLineNodeFromLineNode): made p unsigned char* + * src/pic/gen.c (DEBUGpic14_emitcode, pic14_emitcode): made lbp + unsigned char* + * src/pic/pcode.c (mnem2key): made mnem unsigned char*, + (newpCodeAsmDir): made ctype.h function calls safe + * src/pic16/gen.c (pic16_emitpcomment, DEBUGpic16_emitcode, + pic16_emitcode): made lbp unsigned char* + * src/pic16/pcode.c (mnem2key): made mnem unsigned char*, + (pic16_newpCodeAsmDir): made ctype.h function calls safe + * src/xa51/gen.c (emitcode), + * src/z80/gen.c (_emit2): made lbp unsigned char* + * support/Util/MySystem.c (split_command): made cmd_line and p unsigned + char* + +2005-09-05 Raphael Neider + + * src/pic16/ralloc.c (pic16_allocDirReg): use device specific + access bank splitpoint + +2005-09-05 Raphael Neider + + * device/lib/pic16/libc/Makefile: added (missing) string to SUBDIRS + +2005-09-03 Maarten Brock + + * .version: changed to version 2.5.3 + * doc/sdccman.lyx: changed version to 2.5.3, + documented --codeseg and --constseg and pragma codeseg and constseg, + documented bit parameters (reentrant) and bit returning + * src/SDCCicode.c (geniCodeReceive): fixed (possible) bug generating + currFunc->recvSize, but is this ok for all ports? + (ast2iCode): result of ~ on unsigned char must be cast to int for + bool to work + * src/SDCCmem.c (allocGlobal, allocLocal): don't put bit returning + function pointers in bit space + * src/SDCCsymt.c (checkSClass): allow bit returning function pointers, + (processFuncArgs): call port.reg_parm() with reentrancy info + * src/port.h, + * src/avr/main.c, + * src/ds390/main.c, + * src/hc08/main.c, + * src/pic/main.c, + * src/pic16/main.c, + * src/xa51/main.c, + * src/z80/main.c: port.reg_parm prototype extended with + "bool reentrant" parameter + * src/mcs51/main.c (_mcs51_regparm): use parameter reentrant instead of + options.stackAuto for allocating bit register parameters + * src/mcs51/gen.c (genNot): optimized complementing direct bit, + (genSend): set BitBankUsed if it is, + (selectRegBank): factored out of genCall for use in genPcall, + (genCall): removed redundant dtype assignmen, use selectRegBank, + (genPcall): handle returning in Carry properly, save in F0 if needed, + (genReceive): handle bit register parameters + * src/mcs51/ralloc.c (updateRegUsage): update BitBankUsed along the way, + (mcs51_assignRegisters): enable bit registers for all reentrant + functions and don't set BitBankUsed unconditionally + * src/mcs51/peeph.def (177.d): fixed bug if %2==%3 + * support/regression/tests/bitvars.c: enable tests for SDCC_STACK_AUTO + * support/regression/tests/funptrs.c: added tests for BOOL and for return + +2005-08-27 Borut Razem + + * device/lib/Makefile.in: cp on sparc-solaris (SunOS) and on + ppc-osx (Darwin) does not support -u option. It seems that it is + supported only on Linux - GNU cp + +2005-08-25 Borut Razem + + * sim/ucsim/gui.src/serio.src/Makefile.in, + sim/ucsim/s51.src/Makefile.in, sim/ucsim/avr.src/Makefile.in, + sim/ucsim/z80.src/Makefile.in, sim/ucsim/hc08.src/Makefile.in, + sim/ucsim/xa.src/Makefile.in: install -s changed to 2 steps: + install and strip, since the strip at /usr/ccs/bin should be used + on solaris + +2005-08-24 Borut Razem + + * clean.mk, device/lib/clean.mk: find on sparc-solaris does not support -maxdepth option + +2005-08-23 Bernhard Held + + * src/SDCCopt.c (convertToFcall): fixed modulus with divisors 1 and + ffffffffu + +2005-08-23 Maarten Brock + + * as/mcs51/aslink.h: completed lkrloc.c prototypes + * as/mcs51/lkmain.c (link_main): fixed warning + * device/include/stdbool.h: ds390 has no advanced bit support yet + * src/SDCC.y: use SPEC_SHORT and renamed _signed to b_signed + * src/SDCCsymt.c: use SPEC_SHORT and renamed _signed to b_signed + * src/SDCCsymt.h (struct specifier): renamed _xxx bitfields to b_xxx + and updated their macros + * src/SDCCval.c (constVal): updated comment for renamed b_long + +2005-08-22 Maarten Brock + + * as/mcs51/asdata.c: changed ctype['['] to BINOP + * as/mcs51/asexpr.c (expr): added case '[' for bit access in bdata, + (term): abused bit 15 of s_addr to indicate bit-addressable bytes, + (oprio): set priority for '[' + * as/mcs51/aslink.h: added define R_BIT, and prototypes for adb_bit + and adb_24_bit + * as/mcs51/asm.h: added defines R_BIT and S_BIT + * as/mcs51/lkarea.c (lnksect2): use T for seg BIT_BANK and overlay it + * as/mcs51/lkdata.c: changed ctype['['] to BINOP + * as/mcs51/lkmain.c (Areas51): rel2 contains 12 (=C) areas now, + added overlayable BIT_BANK area + * as/mcs51/lkmem.c (summary): add BIT_BANK to BSEG_BYTES in the report, + (summary2): explain 'T' in legenda + * as/mcs51/lkrloc.c: replaced old K&R style, + (relr): added R_BIT processing, + (errmsg): added "Bit-addressable relocation error", + (adb_bit): added for converting from byte- to bit-addressable space, + (adb_24_bit): added for converting from byte- to bit-addressable space + * device/include/stdbool.h: changed BOOL to __bit for mcs51 as it can be + used in reentrant functions now even as return value + * device/lib/_gptrput.c (_gptrput): removed obsolete code + * src/SDCCast.c (resultTypePropagate): also propagate AND_OP and OR_OP, + (decorateType): case '!', GETHBIT, AND_OP, OR_OP: result in bool or char + * src/SDCCglobl.h: added indicator BitBankUsed + * src/SDCCglue.c (glue): emit area BIT_BANK with byte 'bits' and equ's for + the bit registers b0-b7 + * src/SDCCicode.c (operandFromSymbol): removed IS_BITVAR check, + (geniCodeCast): fixed bug 1263853, + (geniCodeLogicAndOr): put result in bool or char, + (geniCodeReceive): added parameter func for accessing the return type, + (geniCodeFunctionBody): pass func to geniCodeReceive + * src/SDCCmain.c: added indicator BitBankUsed + * src/SDCCmem.c (allocLocal): explicitly set sclass for V_BIT + * src/SDCCsymt.c (newBoolLink): added for creating a bool/bit, + (checkSClass): don't put automatic bool/bit on stack, + (checkFunction): removed check on function cannot return bit + * src/SDCCsymt.h: added newBoolLink prototype + * src/mcs51/gen.c (rb1regs): added bit registers, + (movc): created for assigning to carry, + (pushReg, popReg): created for pushing registers, + (sameRegs): check both AOP_REG and AOP_CRY types, + (aopOp): handle bit registers, + (aopPut): optimization no self-assign, + (saveRegisters): push reg->base (bits) only once for bit registers, + and use pushReg, + (unsaveRegisters): pop reg->base only once and use popReg, + (assignResultValue): added parameter func and return in carry for bits, + (genIpush): optimization no reload in A if not changed, + (genSend): bit parameters in reentrant functions are passed in bit + registers by first assigning to bits in B, then save registers and + copy B to bits, + (genCall): handle returning in Carry properly, save it in F0 if needed, + (genPcall): updated assignResultValue call, this is not safe yet for bit + returning function !!! + (genFunction): don't generate equ's for bit registers and use pushReg, + (genEndFunction): take care of bit returning functions and use popReg, + (genRet): return bit in Carry, + (genIfx): optimize bit registers and other directly addressable bits, + (genReceive): updated assignResultValue call + * src/mcs51/main.c (_mcs51_reset_regparm): added regBitParmFlg, + (_mcs51_regparm): allow passing of upto 8 bit parameters in bit + registers when using stack-auto + * src/mcs51/ralloc.c (_G): added allBitregs, + (regs8051): added the bit registers, + (createStackSpil): use macro IS_BIT, + (getRegBit): added to allocate a bit register, else spill, + (getRegBitNoSpil): added to allocate a bit register, else a gpr, + (updateRegUsage): factored out to ease stepping while debugging, + (serialRegAssign): use updateRegUsage, only spill bits if necessary, + also allocate bit registers, + (fillGaps): handle bit registers, + (findAllBitregs): added to create bit vector with all bit registers, + (mcs51_allBitregs): returns this bit vector, + (mcs51_assignRegisters): when using stack-auto use bit registers for + passing parameters and creating local variables + * src/mcs51/ralloc.h: added B0_IDX..B7_IDX and prototype mcs51_allBitregs + +2005-08-22 Borut Razem + + * device/lib/Makefile.in: replaced find option -or with -o + to make it run on solaris + +2005-08-22 Raphael Neider + + * src/pic16/gen.c (pic16_loadFromReturn): added check for AOP_PCODE, + fixes #1265442 (crash on Solaris) + +2005-08-20 Borut Razem + + * configure, configure.in: added tests for libsocket and libnsl libraries, + requred by sdcdb on sparc-solaris; generate support/regression/Makefile + from support/regression/Makefile.in + * support/regression/Makefile.in: added + * device/lib/pic16/Makefile.common.in: force make to use bash shell + * sim/ucsim/libtool: regenerated on sparc-solaris + * sim/ucsim/avr.src/Makefile.in, sim/ucsim/hc08.src/Makefile.in, + sim/ucsim/s51.src/Makefile.in, sim/ucsim/xa.src/Makefile.in, + sim/ucsim/z80.src/Makefile.in: removed GNU ld specific linker options + -Wl,--start-group and -Wl,--end-group to enable ucsim compilation on + sparc-solaris, which doesn't use GNU ld linker + * device/lib/Makefile.in: cp on sparc-solaris (SunOS) does not support -u option + * as/Makefile: find on sparc-solaris does not support -maxdepth option + +2005-08-19 Maarten Brock + + * src/mcs51/peeph.def: updated comments + +2005-08-16 Frieder Ferlemann + + * device/lib/_gptrget.c, + * device/lib/_gptrput.c: slightly shorter + * doc/sdccman.lyx: incremented version + * src/mcs51/peeph.def: moved peephole comments to the line of first + change to better keep line correlation, reanimated 186.e + * src/mcs51/peeph.def: renamed similar peepholes by using suffixes + +2005-08-16 Slade Rich + + * src/pic/pcode.c : Pasted ".line" assembly directives patch from + David Saxton with quotes around file name. + +2005-08-15 Borut Razem + + * support/regression/tests/bitfields.c, support/regression/tests/bitvars.c, + support/regression/tests/bitwise.c, support/regression/tests/literalop.c, + support/regression/tests/rotate.c, support/regression/tests/zeropad.c: + make tests run on x86_64 platform + +2005-08-13 Raphael Neider + + * device/lib/pic16/Makefile.subdir: weakened clean-intermediate rule + as it might be executed DURING a build (parallel make is wonderful) + +2005-08-13 Raphael Neider + + * device/lib/Makefile.in (port-specific-objects-pic16): + revert to cp $(PORT)/bin/*.* $(PORTDIR) + * device/lib/pic16/Makefile: added .PHONY targets, removed builddir + dependency + * device/lib/pic16/Makefile.rules: build subdirs before creating + the library, removed builddir rule, create $(builddir) early in + recurse rule, use empty recurse rule for leaf directories + * device/lib/pic16/Makefile.subdir: added phony targets, ignore + mkdir errors (race condition), removed duplicate suffix "hex" + from clean rules + * device/lib/pic16/libdev/Makefile: recursive make via + and $(MAKE) + * device/lib/pic16/libio/Makefile: create sub-make's builddir early, + prevents mkdir -p from aborting on Alpha + +2005-08-12 Raphael Neider + + * src/pic16/glue.c (pic16_print(G)PointerType): do not flush + db-statements in order to allow for arrays of pointers in code + sections to be placed without interspersed 0-padding, fixes + bug #1256215 + * (emitStatistics): fixed division by zero for pic18f1220 + * src/pic16/pcode.c: buffer (up to) 12 DB directives to allow for + unpadded writing of 8-bit, 16-bit, 24-bit and 32-bit values + * (pic16_emitDS): respect DB_ITEMS_PER_LINE + * (pic16_pCodeConstString): keep track of already emitted string + literals to prevent "duplicate definitions of symbol _str_NR" + * src/pic16/ralloc.c (pic16_allocRegByName): removed not so helpful + debug message + * device/lib/Makefile.in: ignore failing PIC16 library builds + * device/lib/pic16/Makefile: do not build if gputils are missing + * device/lib/pic16/Makefile.common.in: do not enforce MAKEFLAGS=-s + +2005-08-10 Raphael Neider + + * device/lib/Makefile.in: fixed copying pic16 libraries (broken by + my last commit) + +2005-08-10 Raphael Neider + + * src/*.c, src/pic16/{gen.c,glue.c,main.c}: applied Vangelis + Rokas' patch to add the new fixed point type "__fixed16x16" + * device/lib/pic16/libsdcc/fixed16x16: added Vangelis' support + functions for __fixed16x16 arithmetics + * device/lib/pic16: reimplemented the build system to support + a separate build directory, better handling of libio (create + the library in a separate subdir for each architecture) and + easier configuration (centralized in Makefile.common) + +2005-08-07 Raphael Neider + + * src/pic16/gen.c (genrshTwo): fixed sign extension + * src/pic16/device.c: added pic18f2320, 4220 and 4320 + * device/include/pic16/pic18f2220.h: changed some bit definitions, + added T0CONbits + * device/include/pic16/pic18f4220.h: NEW, header for + pic18f4220 and pic18f4320 + * device/include/pic16/pic18fregs.h: added new devices, + embraced Nop(), ClrWdt(), Sleep() and Reset() with do {} while(0) + * device/include/pic16/signal.h: resolved name clashes + on bit definitions, added DEF_HANDLER2(sig1,sig2,handler) + to also allow testing for interrupt enable bits, added + comments on how to use the macros + * device/lib/pic16/libdev/pic18f2220.c: added T0CONbits + * device/lib/pic16/libdev/pic18f{2320,4220,4320}.c: NEW, + register definitions for the devices + * device/lib/pic16/pics.all: added new devices + * device/lib/pic16/libc/stdlib/calloc.c: fixed zeroing + allocated memory + * device/lib/pic16/libc/stdlib/memfree: do not count + the block header as free memory + * device/lib/pic16/libc/stdlib/memmisc.c (_initHeap): + simplified and added missing end-of-blocklist-marker + (reported by Peter Onion, fixes #1252814) + * (_mergeHeapBlock): fixed loop condition + * device/lib/pic16/libc/stdlib/realloc.c: return NULL for + len==0, restructured code + * device/lib/pic16/libc/stdlib/{malloc,memfreemax}.c: cleaned + up a bit, reduced bitfield accesses, prevent endless loops + in case of heap corruption + * device/lib/pic16/libc/stdlib/x_ftoa.c: disabled + "unreferenced arguments/must return a value" warnings + * device/lib/pic16/libio/usart/ubaud.c (usart_baud): + replaced BAUDREG with SPBRG + * device/lib/pic16/libsdcc/lregs/{lrrest.c,lrst.c}, + device/lib/pic16/debug/gstack/gstack.c: replaced + _naked, _asm, _endasm with __naked, __asm, __endasm + +2005-08-05 Raphael Neider + + * src/pic16/gen.c (pic16_aopGet): fixed handling of offsets in + AOP_PCODE operands, fixes multibyte union-bitfield-accesses + +2005-08-05 Borut Razem + + * device/lib/Makefile.in: added missing ';' + * configure: removed ^M characters + +2005-08-04 Jesus Calvino-Fraga + + * device/include/mcs51/at89c51ed2.h, device/include/mcs51/p89v51rd2.h, + device/include/mcs51/at89s53.h: changed to GNU Lesser General Public + License + +2005-08-04 Borut Razem + + * configure.in: pic16 libraries build 2nd try - enable running + configure in device/lib/pic16 + * configure: regenerated from configure.in + * device/lib/Makefile.in: create $(PORT)/bin directory + +2005-08-03 Raphael Neider + + * src/pic16/gen.c (pic16_derefPtr): NEW, single place + to get/set values via pointers + * (genUnpackBits,genPackBits): changed detection of + ptr->bitfield vs. sym.bitfield, fixed access via generic + pointers, removed dead (wrong) code for multibyte bitfields + * (genNearPointerGet, genGenPointerGet): removed useless code, + fixed bitfield detection, fixes #1250594 + * (genNearPointerSet): removed useless code + * src/pic16/gen.h: renamed pic16_emitpcode to pic16_emitpcode_real + and introduced macro pic16_emitpcode that conditionally emits + the origin of the following pCode (useful for debugging SDCC) + * src/pic16/pcode.c: changed (and disabled) some debug outputs + * (createDefmap): fixed handling of LFSR for --optimize-df + +2005-08-02 Borut Razem + + * device/lib/Makefile.in: pic16 libraries build enabled since + gputils-0.13.2 are now localy installed at sourceforge's compile farm + +2005-08-02 Raphael Neider + + * src/pic16/gen.c (genPackBits): removed deprecated warning + * (genGenPointerSet): fixed bitfield detection + +2005-08-02 Jesus Calvino-Fraga + + * device/include/mcs51/msm8xc154s.h: Removed PT2 definition, now in 8052.h. + +2005-07-31 Raphael Neider + + * device/lib/pic16/libdev/pic18f458.c, + device/include/pic16/pic18f458.h: added missing T0CONbits + +2005-07-29 Maarten Brock + + * device/include/mcs51/msm8xc154s.h: added, thanks to Matthias Arndt + +2005-07-28 Maarten Brock + + * src/mcs51/gen.c (operandsEqu): fixed bug 1246687 + +2005-07-23 Jesus Calvino-Fraga + + * device/include/mcs51/at89c51ed2.h: added. + +2005-07-23 Raphael Neider + + * src/pic/gen.h: added emitpcode macro for debugging + * src/pic/gen.c (emitpcode): renamed to emitpcode_real + and replace by macro adding debug information on demand + * (genNot): fixed to C semantics (!0 = 1; !x = 0 iff x != 0) + * (gencjne): tried to fix; replaced with correct (slower) code + * (gen{Unp,P}ackBits): fixed single bit access + * src/pic/pcode.c (AnalyzepCode): fixed DFPRINTF argument + * src/pic/pcodepeep.c (pCodeSearchCondition): fixed finding + previous instruction + * src/pic/pcoderegs.c (regIsSpecial): NEW, check whether a + register has to be handled with care (forbidding movement + of assignments/uses, removing assignments completely, ...) + * (pCodeOptime2pCodes): make use of regIsSpecial + * added lots of debugging output (commented out) + * src/pic/rallloc.c (deassignLRs): prevent operand registers + from being reused as result UNLESS it is known to work + +2005-07-23 Maarten Brock + + * support/Util/dbuf.h: include for size_t + * .version: changed to version 2.5.2 + +2005-07-23 Erik Petrich + + * src/SDCCloop.c (loopInvariants): fixed bug #1234048 + +2005-07-22 Erik Petrich + + * src/hc08/gen.c (genMinus): fixed bug #1241835, + (genModOneByte): removed needless psha/pula + +2005-07-22 Raphael Neider + + * src/SDCCmain.c (linkEdit): initialized linkerScriptFileName, + have PIC14 handled like PIC16, fixes broken pic14 linker calls + * src/pic/gen.c (resolveIfx): do not "invent" labels + * (genSkipc): changed to positive logic + * (genSkipCond): removed as no longer needed + * (pic14_mov2w_regOrLit,genCmp): NEW, replacement for buggy version, + backport from PIC16 + * (genLeftShift): check operands are in different registers + * src/pic/genarith.c (genPlus): replaced INCF with ADDLW as + INCF does not update CARRY... + * src/pic/main.c: fixed _linkCmd + * src/pic/pcode.c (unlinkpCode): added inactive code + * src/pic/ralloc.c (deassignLRs): keep arguments to shift operations + alive (do not assign result and operand overlapping registers) + +2005-07-22 Raphael Neider + + * src/pic/device.c (dump_sfr): replaced register declaration with + call to emitSymbolToFile() to avoid duplicate symbols + * (assignRelocatableRegisters): do not declare external symbols + * src/pic/ralloc.c (allocNewDirReg): fixed to get size of arrays + right (take size of type, not etype) + * (allocDirReg): fixed call to allocNewDirReg() to pass OP_SYM_TYPE + * (writeUsedRegs): also dump dynDirectRegs (e.g. local variables) + * (packRegsForAccUse): disabled assignment of WREG as + the result reg to prevent occurence of just fixed #1235003, + fixes #1242954 + * src/pic/glue.c (emitSymbolToFile): NEW, central place to declare + symbols (avoids duplicate symbols in .asm file) + * (pic14emitRegularMap): use emitSymbolToFile() + * src/pic/gen.c (aopOp): fixed spillLocation handling + * (gen{Unp,P}ackBits): fixed acquiring bit-operands + * (genDataPointerSet): removed unneccessary variables/output + +2005-07-22 Maarten Brock + + * as/mcs51/lkarea.c: enlarged codemap for banked memory + * device/lib/mcs51/crtbank.asm: added # to 0x0F + +2005-07-21 Raphael Neider + + * src/pic/gen.c (aopOp): do not generate AOP_ACC operands as pic14 + architecture cannot handle them efficiently, fixes bug #1235003 + * src/pic16/device.c (pic16_dump_{u,i}section,pic16_dump_int_registers): + check for empty sets before using them (fixes bug #1232190) + +2005-07-19 Maarten Brock + + * as/mcs51/lkarea.c (lnkarea, lnkarea2): improved BSEG size calculation, + (lnksect2): generate warnings for memory overlap + * src/SDCC.lex (doPragma, process_pragma): added pragma's codeseg and + constseg to set the name of these segments so you can instruct the linker + to place them in banks + * src/SDCCast.c (decorateType): use new macro IS_FUNCPTR() + * src/SDCCglobl.h: added MODEL_HUGE to enum, + added code_seg and const_seg to options + * src/SDCCglue.c (emitMaps): use options.const_seg, + (createInterruptVect): put interrupt vectors in segment HOME, + (glue): put HOME before static segment and put the main glue in HOME, + (glue): use options.code_seg + * src/SDCCicode.c (geniCodeCall): use new macro IS_FUNCPTR() + * src/SDCCmain.c: added option --codeseg and --constseg to set the name of + these segments so you can instruct the linker to place them in banks + (linkEdit): use code_loc for HOME segment which should be the first + segment in code memory now + * src/SDCCmem.c: fixed more stuff like bug 1238386 + * src/SDCCsymt.c (getSize): use generic pointer size for banked functions, + (changePointer): don't change function pointers to code pointers for + banked functions, + (compareType): added exceptional check for banked function pointers + * src/SDCCsymt.h: changed IFFUNC_ISBANKEDCALL, added IS_FUNCPTR + * src/hc08/main.c (_hc08_genAssemblerPreamble): put HOME first, put CSEG + after static in code memory + * src/mcs51/gen.c: added aopLiteralLong prototype, + (aopForSym): use getSize for functions, + (genCall): generate banked calls over one trampoline __sdcc_banked_call + in HOME with lsb of address in r0, msb in r1 and bank in r2, use + -Wl-bBANKSEG=0xbbaaaa option to set the address (aaaa) and bank (bb) of + the segment, + (genPcall): use call for literal function pointers and generate banked + calls over the one trampoline so there's only one place for the user to + modify according to his/hers hardware, + (genEndFunction): jump to __sdcc_banked_ret in HOME for banked functions, + (genPlusIncr): moved check icount>4 beyond inc dptr optimization + * src/mcs51/main.c: added keyword banked, + (_mcs51_genExtraAreas): put HOME first followed by GSINIT, STATIC and CSEG + * support/Util/SDCCerr.c, + * support/Util/SDCCerr.h: added E_BANKED_WITH_CALLEESAVES, registers are + needed for passing the bank and address to the trampoline + * device/lib/mcs51/crtbank.asm: added for bankswitching + * device/lib/mcs51/Makefile: added crtbank + +2005-07-16 Erik Petrich + + * src/SDCCcse.c (algebraicOpts): fixed loss of volatility + for fields at offset 0 of a struct or union as reported + on 2005-07-07 in the developer mailing list. + +2005-07-15 Maarten Brock + + * src/SDCCmem.c: fixed bug 1238386 + +2005-07-12 Frieder Ferlemann + + * src/mcs51/peeph.def: added labelrefcounting for peepholes + (patch #1144962), added peephole 300, enabled 259.x + * doc/sdccman.lyx: removed screenshot and provided link instead + +2005-07-05 Frieder Ferlemann + + * doc/sdccman.lyx: added section about debugging with ddd + * doc/figures/ddd_example.eps: screenshot of debugging session + +2005-07-04 Raphael Neider + + * src/pic/gen.c (genPointerGet): handle pointers to CONST values + like CODE pointers, fixes #1115683 + * src/pic/pcode.c (DoBankSelect): forget LastRegIdx during function + call, fixes bugs #1232211, #1228110, + fixed wrong casts to pCodeFlow from pCodeInstructions + +2005-07-04 Raphael Neider + + * src/pic/gen.c (popGet): changed assert to allow for + bit operands + * (popGetAddr): changed signature to provide + an additional index, patched all call sites + * (genCmpEq): handle literal-like operands correctly + * (genAddrOf): added sanity checks on __code/__data pointers + * (genAssign): added handling of symbols from __code section + * (gencjne): do not generate code for comparisons whose result + is neither stored nor used, fixes bug #1171114 + * (AccLsh, AccRsh): operate on operand instead of WREG + * (shift{Left,Right}_Left2ResultLit): NEW, size independant + replacement for Shift{LR}{12}Left2Result; shift (byte/int/long) + by known count + * rewrote complete shift-by-literal logic, commented unused + functions out + * (genConstPointerGet): get multiple bytes (if result size > 1), + fixed handling of non-immediate addresses + * (genPointerGet): handle CODE pointers like CONST pointers + * (genpic14Code): insert C-SRC lines as Cource-pCodes + * ({aop,op}_isLitLike): NEW, single place to decide whether an + operand is to be treated as a literal or not + * (mov2w,genPcall,genCmpEq), + src/pic/genarith.c: use aop_isLitLike() to decide between + literal/register contents + * (addSign): added missing offset + * src/pic/gen.h: remove newline after FENTRY/FEXIT comments, + only emit comment in debug-mode, + use {aop,op}_isLitLike throughout the file + * src/pic/glue.c: fix initializers for pointers (work in progress) + * src/pic/pcode.c (get_op): honor index on _const symbols + * ({reset,dump}pCodeStatistics): NEW, estimate code size + * (dumppBlock): added pCode size estimation + * src/pic/ralloc.c (deassignLRs,serialRegAssign,packRegisters): + check for IS_SYMOP before OP_SYMBOL'ing + * fixed indentation, compacted switch-statements + * (allocReg): find free register and allocate it instead of + allocating new registers all the time + * (deassignLRs): prevent POINTER_GET's from being assigned the same + registers as its operands (necessary only for multibyte GETs) + +2005-07-01 Raphael Neider + + * src/pic/gen.h: added prototypes emitpComment, popGetAddr and + debugging .asm-output macros FENTRY + FEXIT + * src/pic/gen.c (Safe_vsnprintf): NEW, is there a more generic + way... I wonder... + * (emitpComment): NEW, printf to pCode + * (popGet): added assert on too large offsets, fixed PO_IMMEDIATE's + offset handling + * (popGetAddr): NEW, variant of popGet to access an immediates + high(er) bytes instead of the n'th byte of memory they reference, + replaced popGet with popGetAddr where neccessary + * (genDataPointerGet): reactivated and fixed implementation + * (genNearPointerGet): enabled call to genDataPointerGet, fixes array- + accesses + * (genDataPointerSet): fixed multibyte assignments + * (genpic14Code): fixed --i-code-in-asm handling + * src/pic/genarith.c: fixed PO_IMMEDIATE issue using popGetAddr, + * (genPlus): fixed index-out-of-bounds error + * src/pic/pcode.c (get_op): fixed PO_IMMEDIATE's index/offset handling + * src/pic/ralloc.c: added debugging output macro FENTRY2 + * (spillThis): fixed indentation, enbraced for-body for clarity + * (rematStr): commented out as now unused + * (regTypeNum): commented out special spill case (overwrites + arbitrary values) + * fixes bugs #1229346, #1216476 (both arrays) and #1115667 (SIGSEGV) + +2005-06-30 Maarten Brock + + * doc/sdccman.lyx: documented sfr16/sfr32, + added example for using storage class with function pointers + * src/mcs51/gen.c (genPlusIncr): optimized small offsets from dptr + +2005-06-28 Maarten Brock + + * device/lib/_gptrget.c: also push/pop _PSBANK, added # to 0x03 + * device/lib/_itoa.c, + * device/lib/_ltoa.c: optimized codesize + * src/SDCCsymt.c (checkSClass): added sanity check for sfr at addresses, + but don't know how to suppress the double warning. + * src/mcs51/gen.c (genPlusIncr): fixed bug when incrementing volatile int's + * support/Util/SDCCerr.c, + * support/Util/SDCCerr.h: added warning W_SFR_ABSRANGE for sanity check + +2005-06-27 Maarten Brock + + * as/mcs51/asexpr.c (expr): disabled warning "not in .flat24 mode", + fixed old K&R prototypes + * as/mcs51/asout.c (outrb): always output as if generating 24bit addresses + * device/lib/_gptrget.c, + * device/lib/_gptrgetc.c, + * device/lib/_gptrput.c: changed versions for new memory indicator values, + also new versions for small generic pointers and banked generic pointers + * src/port.h: added const_name + * src/SDCC.lex: added keywords sfr16, __sfr16, sfr32, __sfr32 + * src/SDCC.y: added tokens SFR16, SFR32 and their sfr_attributes + * src/SDCCcse.c (findPrevIc): check all associative operators + * src/SDCCglue.c (emitMaps): use CONST_NAME if defined + * src/SDCCicode.h: added macro IS_ASSOCIATIVE + * src/SDCCmem.c: updated comments, + set far-space to 0 for pdata, results in optimized code + * src/SDCCmem.h: added macro CONST_NAME + * src/SDCCsymt.h: renumerated generic pointer types GPTYPE_... thereby + moving the info into the highest bits, see also gptrget/gptrput + * src/src.dsp: added sdcc.ico to project files + * src/avr/gen.c (genCast): fixed bug 0x%d + * src/avr/main.c (avr_port): added "CONST (CODE)" for const_name + * src/ds390/gen.c (aopForRemat, adjustArithmeticResult): disconnected direct + relation between ptr_type and DCL_TYPE, + (genCast): fixed bug 0x%d + * src/ds390/main.c (ds390_port, tininative_port, ds400_port): added "CONST + (CODE)" for const_name + * src/hc08/gen.c (genCast): fixed bug 0x%d + * src/hc08/main.c (_hc08_genAssemblerPreamble): added .area ...const_name, + (hc08_port): added "CONST (CODE)" for const_name + * src/mcs51/gen.c (aopForSym): optimized pushing ACC, + (aopForRemat, adjustArithmeticResult): disconnected direct relation + between ptr_type and DCL_TYPE, + (aopGetUsesAcc, aopGet, aopPut): changed first parameter from asmop* to + operand* and took AOP() inside function so sfr-ness can be checked, + (all over): repaired calls to aopGetUsesAcc, aopGet, aopPut to comply with + new prototype, + (genFunction, genEndFunction): optimized stack setup, + (genMinus): optimized for literals with ending zeroes (in bytes), + (genCast): fixed bug 0x%d + * src/mcs51/main.c (_mcs51_keywords): added sfr16 and sfr32, + (mcs51_port): added "CONST (CODE)" for const_name + * src/mcs51/peeph.def: made rule 226 more generic + * src/pic/main.c (pic_port): added "CONST (CODE)" for const_name + * src/pic16/main.c (pic16_port): added "CONST (CODE)" for const_name + * src/xa51/main.c (xa51_port): added "CONST (CODE)" for const_name + * src/z80/main.c (z80_port): added NULL for const_name, + (gbz80_port): added NULL for const_name + * support/regression/tests/bug663539.c, + * support/regression/tests/sfr16.c: new tests + +2005-06-25 Jesus Calvino-Fraga + + * device/include/mcs51/p89v51rd2.h, device/include/mcs51/at89s53.h: added. + +2005-06-24 Raphael Neider + + * device/lib/pic16/libdev/pic18f[68][567]20.c: + corrected typos... + * device/include/pic16/signal.h: added USBIF + and SIG_USB + +2005-06-24 Raphael Neider + + * device/lib/pic16/libdev/pic18f2455.c, + device/include/pic16/pic18f2455.h: NEW + * device/include/pic16/pic18fregs.h, + device/lib/pic16/pics.all, + src/pic16/device.c: added 18f2455 + * device/lib/pic16/libdev/pic18f[68][567]20.c, + device/include/pic16/{pic18f[68][567].h,usart.h}: + replaced MULTIPLE_USARTS define with more relaible + compatibility sfrs (for USART access) + +2005-06-20 Slade Rich + + * src/pic/pcode.c : Fixed problem when a string constant contains a "\r\n" + and the output asm file line is printed on two lines. + +2005-06-19 Erik Petrich + + * sim/ucsim/hc08.src/inst.cc (inst_condbranch): fixed simulation of + BGT, BLE, BHI, and BLS instructions + * src/hc08/gen.c (outAcc, outBitC, outBitNV, genCmpLt, genCmpGt, + genCmpEq): removed + * src/hc08/gen.c (genCmpEQorNE, genCmp, branchopCmp, nameCmp, + negatedCmp, exchangedCmp, genhc08Code): rewrite of comparison handling, + fixes bug #1216342 + * src/hc08/peeph.def: added rules 2g - 2l for new conditional branches + +2005-06-15 Raphael Neider + + * src/pic16/NOTES: moved Vangelis from active developers to people to contact + * device/include/pic16/{6520.h,8520.h}: fixed configuration bits + * src/pic16/gen.c (): prevent iTemps from being considered to be in CODESPACE, + fixes bug #1221120; for symbols in CODESPACE get number of bytes to read from + OP_SYM_TYPE() instead of OP_SYM_ETYPE() + +2005-06-06 Frieder Ferlemann + + * device/include/mcs51/reg764.h: Changed PB0 to PBO as requested by + Marcel Telka in bug #1215704 + +2005-06-02 Slade Rich + + * src/pic/pcode.c : Changed pseudo stack size to 15 to allow WSAVE to be + located in shared memory bank. + +2005-05-31 Raphael Neider + + * src/pic16/{gen.c,genarith.c}: replaced sign-extension + "CLRF, BTFSC , DECF/COMF" with side-effect-free + "CLRF, BTFSC , SETF"; fixes "long>>9" + +2005-05-27 Maarten Brock + + * device/lib/_strncpy.c: fixed the fix + +2005-05-26 Raphael Neider + + * src/pic16/glue.c (pic16_printIvalChar): fixed _constant_ string + initializers with \0, bug #1208187 + * src/pic/glue.c (printIvalChar): fixed (non- and constant) string + intializers with \0, bug #1208187 + +2005-05-26 Raphael Neider + + * src/pic16/glue.c (pic16_printIvalChar): fixed string + initializers with \0, bug #1208187 + * src/pic16/main.c (_process_pragma): added sanity checks + for stack position and size, emit warnings when appropriate + +2005-05-26 Maarten Brock + + * device/lib/_strncpy.c: fixed not filling with \0 + +2005-05-26 Erik Petrich + + * src/SDCCast.c (funcOfType, funcOfTypeVarg, stringToSymbol, + createFunction), + * src/SDCC.y (external_definition, enumerator, parameter_declaration, + compound_statement), + * src/SDCCsymt.h, + * src/SDCCsymt.c (addSymChain, processFuncArgs): fixed bug #1159134 + +2005-05-24 Raphael Neider + + * src/pic16/glue.c (pic16_printGPointerType): fixed #1207796 + +2005-05-24 Raphael Neider + + * device/include/pic16/pic18f{442,452,458}.h: fixed wrong + TRISE definitions, closes bug #1162453 + +2005-05-22 Raphael Neider + + * src/pic16/main.c (_process_pragma): check for missing + arguments to pragmas code and udata + * device/include/pic16/pic18f{2550,4331,4455,4520}.h: + consistency fixes to match other headers (thanks to Jim Paris) + * device/lib/pic16/libio/i2c.ignore: 18f4331 provides no I2C + +2005-05-21 Maarten Brock + + * src/SDCCicode.c (isOperandEqual): fixed missing ; + +2005-05-19 Maarten Brock + + * support/regression/tests/bug1198642.c: new test + * src/SDCCicode.c (isOperandEqual): fixed bug 1198642 + * src/SDCCcse.c (findPrevIc): added comment, please have a look + * support/scripts/resource.h, + * support/scripts/resource.rc, + * src/src.dsp: added sdcc.ico to project as icon for sdcc.exe + * support/scripts/sdcc.ico: added 32x32 icon + +2005-05-18 Raphael Neider + + * device/lib/pic16/libdev/pic18f*.c, + * device/include/pic16/pic18f*.h: updated "sfr" and "at X" + keywords to "__sfr" and "__at (X)" + * device/include/pic16/pic18fregs.h: added pic18f4520 + * src/pic16/pcode.c (pic16_pCode2str): fixed (?) bug + #1203088 (MPLAB compatibility) + +2005-05-17 Raphael Neider + + * device/include/pic16/pic18f{2550,4331,4455,4520}.h: NEW + * device/lib/pic16/libdev/pic18f{2550,4331,4455,4520}.c: NEW + * device/lib/pic16/pics.all: added new devices + * src/pic16/device.c: added support for pic18f4520 + +2005-05-16 Raphael Neider + * src/pic16/gen.{c,h}: s/mov2f/pic16_mov2f made public + * src/pic16/genarith.c (genAddLit): fixed bug 1202480 + * src/pic16/pcode.{c,h} (pic16_newpCodeOpBit_simple): NEW + convenience function for bit access + +2005-05-15 Maarten Brock + + * device/lib/printf_large.c: fixed bug 1193299 + * support/regression/tests/bug1057979.c: added test %3.3s + +2005-05-15 Frieder Ferlemann + + * device/include/mcs51/8051.h, + * device/include/mcs51/8052.h: made parseable with lint + * device/include/mcs51/lint.h: added include file for (sp)lint + * doc/sdccman.lyx: added doc about use of splint (syntax checking tool) + * doc/cdbfileformat.lyx, + * doc/test_suite_spec.lyx: hardcoded date to the date of last text change + +2005-05-14 Raphael Neider + + * device/lib/pic16/Makefile.common.in: add --optimize-df to OPT_FLAGS + * device/lib/pic16/libc/stdlib/itoa.c (new) + * device/lib/pic16/libc/stdlib/Makefile: have itoa.c built + * device/lib/pic16/libio/Makefile: exclude subdir according to + ${subdir}.ignore for certain PICs (lacking e.g. i2c) + * device/lib/pic16/libio/i2c.ignore (new): pic18f1220 has no I2C support + * src/pic16/gen.c (genFunction): prevent annoying warning + * src/pic16/pcode.c: renamed stack_t to dynstack_t to prevent + nameclashes on BeOS + * support/cpp2/cppmain.c (cpp_output_string): new + * support/cpp2/cpplib.c (_cpp_do__Pragma): fixed _Pragma(""), + fixes bug 1116802 + +2005-05-13 Borut Razem + + * src/SDCCmain.c (linkEdit): fixed bug 1195202 + +2005-05-12 Erik Petrich + + * .version: changed to version 2.5.1; back to bleeding edge development + +2005-05-11 Borut Razem + + * doc/sdccman.lyx doc/cdbfileformat.lyx doc/test_suite_spec.lyx: + generate PDF version 1.3 documents + +2005-05-07 Erik Petrich + + * .version: changed to version 2.5.0 + +2005-04-27 Frieder Ferlemann + + * doc/sdccman.lyx: updated weblinks, index and smaller updates + +2005-04-26 Erik Petrich + + * doc/sdccman.lyx: changed version 2.5.0, documented --std-c89, + --std-sdcc89, --std-c99, --std-sdcc99, and the corresponding #pragmas, as + well as many smaller updates. + * .version: changed to version 2.5.0-pre1 + +2005-04-26 Jesus Calvino-Fraga + + * src/SDCCmain.c (setIncludePath): added port->target to SDCC_INCLUDE_NAME + +2005-04-26 Maarten Brock + + * support/regression/tests/bug1185672.c: added + * src/mcs51/gen.c (aopGetUsesAcc, genCpl, genAnd, genOr, genXor): fixed + bug 1185672 + * src/mcs51/gen.c (genCall): added comments, made it look safer + * src/mcs51/gen.c (genEndFunction): simplified + +2005-04-25 Maarten Brock + + * src/mcs51/ralloc.c (serialRegAssign): fixed bug 1189609 + +2005-04-14 Borut Razem + + * fixed bug 1045046 - SIGSEGV with really simple code?: + src/pic/pcode.c (pCodeInitRegisters)- pseudo stack size increased to 16 + src/pic/ralloc.c (typeRegWithIdx) - error message on pseudo stack overflow + +2005-04-14 Borut Razem + + * src/pic16/gen.c (genInline), src/pic16/main.c (_process_pragma), + src/pic16/device.h: temporarily disabled experimental #inline pragma + for 2.5.0 release + +2005-04-14 Maarten Brock + + * device/include/z80/stdio.h, + * device/include/z80/string.h: removed these highly incomplete files so + SDCC can use the default ones in device/include/ + +2005-04-14 Erik Petrich + + * src/mcs51/gen.c (genEndFunction): removed unused variable to fix + gcc warning. + * device/lib/Makefile.in: default PORTINCDIR to the mcs51 subdir to + fix sdcpp warnings. + +2005-04-12 Maarten Brock + + * device/include/malloc.h: removed redundant __reentrant prototypes + * device/lib/_mullong.c: added working xstack variant in asm (C version + doesn't pass regression tests) + * device/lib/bpx.c: used __data and made bpx char for mcs51 + * src/SDCCast.c (decorateType): removed unused GPTYPE_IDATA, + (createFunction): fixed bug with xstackPtr + * src/SDCCcse.c: corrected comments + * src/SDCCopt.c (convertToFcall): fixed warning in MSVC, + (killDeadCode, eBBlockFromiCode): removed unused code + * src/SDCCsymt.h: removed unused GPTYPE_GPTR and GPTYPE_IDATA, + corrected comments + * src/mcs51/gen.c (aopForSym, aopPut, toBoolean, unsaveRegisters, + assignResultValue, genCall, genFunction, genEndFunction, genAnd, + genOr, genXor, genAddrOf): fixed several bugs concerning xstack + (genModOneByte): fixed warning in MSVC + * src/mcs51/main.c (): added comments + * src/mcs51/peeph.def: changed 129 to 129.a, added 129.b, 129.c & 129.d + +2005-04-12 Maarten Brock + + * src/SDCCmain.c (linkEdit): oops, changed one line too many + +2005-04-11 Maarten Brock + + * src/SDCCmain.c (linkEdit): fixed bug with finding crt0.o for z80 + +2005-04-10 Vangelis Rokas + + * src/pic16/glue.c (printIvalChar): fixed bug when emitting + characters arrays of larger size than the declared one. + +2005-04-10 Borut Razem + + * src/pic/gen.c (genInline), + src/pic/pcode.c (newpCodeAsmDir), (pCode2str), + (genericPrint), (unlinkpCodeFromBranch), (compareLabel), + (findNextInstruction), (findPrevInstruction), + (findInstructionUsingLabel), + src/pic/pcode.h: fixed bug #1164907 - Labels not being recognized + * src/pic/pcode.c (findLabel): added missing '\n' + * src/src.dsp: added SDCCdwarf2.c to the project + +2005-04-09 Borut Razem + + * support/scripts/sdcc.nsi: added include/hc08/* h to NSIS setup + +2005-04-08 Raphael Neider + + * src/pic16/pcode.c: added helpers defmapInsertAfter (insert a new item + into the chain after a given one) and mergeDefmapSymbols (combine + defmap entries for each symbol per pcode) + * (createDefmap): have defmap entries merged in the end + * (defmapReplaceSymRef): split defmap entries covering two accesses to + a symbol before replacing one access type's symbol, merge symbols in + the end (replacement symbol might already have an entry) + * (assignValnums): keep reference to written WREG intact + +2005-04-08 Raphael Neider + + * src/pic16/pcode.c (struct defmap_s): named anonymous union (for + Alpha) + +2005-04-08 Vangelis Rokas + + * src/pic16/pcode.c (pic16_get_op2): enlarged size of array b to 128 + bytes + +2005-04-07 Raphael Neider + + * device/include/pic16/usart.h: added compatibility defines for + devices with more than one USART + * device/include/pic16/pic18f[68][567]20.h: activated above defines + +2005-04-07 Maarten Brock + + * device/lib/Makefile.in: updated for port specific include + +2005-04-07 Maarten Brock + + * support/regression/ports/mcs51/spec.mk: added mcs51 include + +2005-04-07 Maarten Brock + + * device/include/8051.h, + * device/include/8052.h, + * device/include/at89S8252.h, + * device/include/at89c55.h, + * device/include/at89x051.h, + * device/include/at89x51.h, + * device/include/at89x52.h, + * device/include/mcs51reg.h, + * device/include/reg51.h, + * device/include/reg764.h, + * device/include/regc515c.h, + * device/include/sab80515.h: (re)moved these 12 files + * device/include/mcs51/8051.h, + * device/include/mcs51/8052.h, + * device/include/mcs51/at89S8252.h, + * device/include/mcs51/at89c55.h, + * device/include/mcs51/at89x051.h, + * device/include/mcs51/at89x51.h, + * device/include/mcs51/at89x52.h, + * device/include/mcs51/mcs51reg.h, + * device/include/mcs51/reg51.h, + * device/include/mcs51/reg764.h, + * device/include/mcs51/regc515c.h, + * device/include/mcs51/sab80515.h: and added them here + +2005-04-06 Maarten Brock + + * device/include/stdarg.h: changed SDCC specific keywords to double + underlined form. + * device/include/stdint.h: changed intptr_t and uintptr_t for others than + mcs51 and ds390. + * device/include/hc08/mc68hc908gp32.h, + * device/include/hc08/mc68hc908jb8.h, + * device/include/hc08/mc68hc908jkjl.h, + * device/include/hc08/mc68hc908qy.h: fixed comments + * device/include/mcs51/README: updated + * device/include/mcs51/c8051f120.h: added PINRSF + * device/lib/pic16/libc/stdlib/crc16.c: fixed comments + * src/pic16/pcode.c: MSVC6 doesn't accept declaring new variables + amidst code. Also inline is not supported. + +2005-04-06 Raphael Neider + + * src/pic16/pcode.c (pic16_pCodeReplace): also update pcflow->end + * (createDefmap): fixed CALLs to depend on FSR1 and RETLW to restore + callers stack/frame pointers + +2005-04-06 Vangelis Rokas + + * device/include/pic16/usart.h: added, missing in previous commit, + * device/include/pic16/adc.h: fixed typo, + * device/lib/pic16/libc/utils/cvtdec.S: added missing in previous + commit, + * device/lib/pic16/libc/stdlib/g_ftoa.S: modified to include + + * device/lib/pic16/libc/stdio/streams.c: leave stdin, stdout + uninitialized because a bug appears with gplink + * device/lib/pic16/{some makefiles}: moved $(CSTD) from CFLAGS to + COMPILE_FLAGS and added CPPFLAGS with -nostdinc because sdcpp + complains for unrecognised option + +2005-04-05 Raphael Neider + + * src/pic16/gen.c (pic16_popCopyReg): made copying work for extended + structs as well (using memcpy) + * (genFunction): fixed comparison, used pCodeOpLabel to reduce warning + on ISRs (GOTO has no label) + * src/pic16/device.h: added OF_OPTIMIZE_DF + * src/pic16/main.c: added compiler switch --optimize-df to enable the + new data flow analysis/optimization + * src/pic16/pcode.c: added (prototypes for and implementation of) + dataflow analysis functions, fixed pCodeInstructions' inCond and + outCond values, made RCALL a branch instruction + * (pic16_unlinkpCode): keep C line if possible + * (pic16_pCodeUnlink): removed cast on left side of assignment, have + C line moved if possible + * (pic16_getRegFrompCodeOp): NEW, improved version of... + * (pic16_getRegFromInstruction,pic16_getRegFromInstruction2): changed + to use new pic16_getRegFrompCodeOp (works for more SFRs) + * (pic16_BuildFlow): fixed skip instructions with label (did not start + new flow) + * (pic16_getJumptabpCode): NEW, needed in... + * (LinkFlow): fixed handling of jumptables, calls and conditional + branches + * (pic16_InsertCommentAfter): NEW + * (pic16_pCodeReplace): made verbose and flow preserving + * (AnalyzeFlow): added call to data flow analysis + * src/pic16/pcode.h: added defmaps to pCodeFlow struct + * src/pic16/pcodeflow.h: added PCC_STATUS to mean all STATUS bits + * src/pic16/ralloc.c (packRegsForAssign): added return 1 in the end + +2005-04-03 Erik Petrich + + * src/SDCCast.c (decorateType): fixed bug #1105626 + +2005-04-02 Vangelis Rokas + + * device/include/asm/pic16/features.h, + * pic18f*.h headers, + * device/include/pic16/adc.h, + * device/include/pic16/delay.h, + * device/include/pic16/i2c.h, + * device/include/pic16/malloc.h, + * device/include/pic16/stdio.h, + * device/include/pic16/stdlib.h, + * device/include/pic16/string.h, + * device/lib/pic16/libc/stdio/printf_tiny.c, + * device/lib/pic16/libc/stdio/printf_small.c, + * device/lib/pic16/libc/stdio/strmgpsim.c, + * device/lib/pic16/libc/stdio/strmmssp.c, + * device/lib/pic16/libc/stdio/strmusart.c, + * device/lib/pic16/libc/stdio/vfprintf.c, + * device/lib/pic16/libc/stdlib/ltoa.c, + * device/lib/pic16/libc/stdlib/putchar.c, + * device/lib/pic16/libc/stdlib/x_ftoa.c, + * device/lib/pic16/libc/stdlib/memchrpgm.c, + * device/lib/pic16/libc/stdlib/memchrram.c, + * device/lib/pic16/libc/stdlib/memcpypgm2ram.c, + * device/lib/pic16/libc/stdlib/memcpyram2ram.c, + * device/lib/pic16/libio/adc/adcbusy.c, + * device/lib/pic16/libio/adc/adcread.c, + * device/lib/pic16/libio/adc/adcsetch.c, + * device/lib/pic16/libio/usart/ubaud.c, + * device/lib/pic16/libio/usart/ubusy.c, + * device/lib/pic16/libio/usart/udrdy.c, + * device/lib/pic16/libio/usart/uopen.c, + * device/lib/pic16/libio/usart/uputc.c, + * device/lib/pic16/libsdcc/gptr/gptrget1.c, + * device/lib/pic16/libsdcc/gptr/gptrget2.c, + * device/lib/pic16/libsdcc/gptr/gptrget3.c, + * device/lib/pic16/libsdcc/gptr/gptrget4.c, + * device/lib/pic16/libsdcc/gptr/gptrput1.c, + * device/lib/pic16/libsdcc/gptr/gptrput2.c, + * device/lib/pic16/libsdcc/gptr/gptrput3.c, + * device/lib/pic16/libsdcc/gptr/gptrput4.c: modified all SDCC + specific keywords to double underlined form, + * device/lib/pic16/libc/Makefile.rules, + * device/lib/pic16/libsdcc/Makefile.rules, + * device/lib/pic16/libm/Makefile, + * device/lib/pic16/libio/Makefile.rules: added CSTD macro in CFLAGS + to compile with C standard set in Makefile.common + * device/lib/pic16/libc/stdlib/Makefile: added new C sources + rand.c and crc.c in compilation process, + * device/lib/pic16/libsdcc/int/divuint.c, + * device/lib/pic16/libsdcc/long/divulong.c: changed declaration of + `c' from signed to unsigned, + * device/lib/pic16/startup/crt0.c, + * device/lib/pic16/startup/crt0i.c, + * device/lib/pic16/startup/crt0iz.c: adopted to all SDCC specific + keywords to double underlined form, bug fixes in _do_cinit function + which prevented the correct initialization of the .idata segment, + * src/pic16/pcoderegs.c (insideLRBlock): fixed a bug that caused the + core to enter a infinite loop + * device/lib/pic16/libc/stdlib/rand.c, crc.c: new files + +2005-04-02 Erik Petrich + + * src/SDCCicode.c (getArraySizePtr): fixed bug #1122171 + +2005-04-01 Erik Petrich + + * device/include/Makefile.in: add support for hc08 subdirectory + * device/include/hc08/: new subdirectory + * device/include/hc08/mc68hc908jkjl.h: new header contributed by + Lucas Loizaga, thanks! + * device/include/hc08/mc68hc908qy.h, + * device/include/hc08/mc68hc908gp32.h, + * device/include/hc08/mc68hc908jb8.h: moved hc08 register defs to + their own directory. Changed internal macro names to use the compiler + reserved namespace. Changed SDCC specific keywords to double + underlined form. + * device/include/math.h, + * device/include/malloc.h, + * device/include/stdarg.h, + * device/include/stdbool.h + * device/include/string.h, + * device/include/tinibios.h, + * device/include/ds400rom.h, + * device/include/8051.h, + * device/include/8052.h, + * device/include/80c51xa.h, + * device/include/at89c55.h, + * device/include/at89S8252.h, + * device/include/at89x51.h, + * device/include/at89x52.h, + * device/include/ds80c390.h, + * device/include/reg764.h, + * device/include/regc515c.h, + * device/include/sab80515.h, + * device/include/mcs51/c8051f000.h, + * device/include/mcs51/c8051f018.h, + * device/include/mcs51/c8051f020.h, + * device/include/mcs51/c8051f040.h, + * device/include/mcs51/c8051f060.h, + * device/include/mcs51/c8051f120.h, + * device/include/mcs51/c8051f300.h, + * device/include/mcs51/c8051f310.h, + * device/include/mcs51/c8051f320.h, + * device/include/mcs51/c8051f330.h, + * device/include/mcs51/c8051f350.h, + * device/include/z180.h: Changed SDCC specific keywords to double + underlined form. + +2005-03-31 Vangelis Rokas + + * src/pic16/device.c (Pics16[]): added devices 18F2550, 18F4331, + 18F4455, + * (pic16_assignConfigWordValue): disable testing of configuration + register value with config mask, + * src/pic16/gen.c (pic16_testStackOverflow): prefix stack test + function with port->fun_prefix, + * (genFunction): when generating a naked interrupt function never + create an absolute segment placed in interrupt vector address, place + the actual interrupt function at IVA instead, when an interrupt + function is generated with unspecified interrupt then do not create + the absolute section, + * (genGenPointerGet, genGenPointerSet, genPackBits): replace all + code for generating a call to generic pointer get/put function with + a call to function pic16_callGenericPointer(), + * src/pic16/genutils.c (pic16_callGenericPointerRW): NEW, generates + the call to the generic pointer get/put functions with prefixing the + function name with port->fun_prefix, + * src/pic16/glue.c (pic16glue): ifdef-out test of OF_LR_SUPPORT, + * src/pic16/main.c (_process_pragma): prefix function with + port->fun_prefix, + * (_pic16_finaliseOptions): define macro __18Fxxxx macro when + calling assembler, old 18Fxxxx macro is deprecated, + * src/pic16/pcode.c (unlinkpCodeFromBranch): added PC_INLINE and + PC_ASMDIR in while condition, + * (findInstruction): add PC_ASMDIR in while condition, + * (buildCallTree): prefix main with port->fun_prefix, + * (pic16_pCode2str): fixed bug that didn't emit the memory access + identifier for variable with banked access in instructions BTFSS, + BTFSC, BCF, BSF, BTG + * (AnalyzeFlow): moved call to OptimizepCode to pic16_AnalyzeBanking, + * src/pic16/pcodepeep.c (pCodeOpCompare): increase size of b to 1024, + * src/pic16/pcoderegs.c (pic16_pCodeRegoptimizeRegUsage): don't + perform optimization when enviroment variable NO_REG_OPT is set, + * (insideLRBlock): NEW, return 1 if register is inside an + INF_LOCALREGS block, + * (RemoveRegFromLRBlock): remove a register that is completely + eliminated by register optimization, but it is still left in local + register store/restore in/from stack block, + * (Remove2pcodes): after removing register, check to see if it + should be removed from local register store/restore in/from stack + block, + * src/pic16/ralloc.c (pic16_decodeOp): added decode for + DUMMY_READ_VOLATILE, + + * device/include/pic16/adc.h: minor prototype modifications and + update, + * device/include/pic16/malloc.h: added GPL notice various + modifications, + * device/include/pic16/stdint.h: NEW, standard header for ints + * device/include/pic16/delay.h: NEW, header for delay functions, + delay10tcy, delay100tcy, delay1ktcy, delay10ktcy, delay100ktcy, + delay1mtcy, + * device/include/pic16/signal.h: NEW, header providing helper macros + for implementing signal handlers, + * device/include/pic16/stdio.h: added prototypes for functions, + printf, vprintf, sprintf, vsprintf, fprintf, vfprintf. Added + prototypes for stdin and stdout, added macro PUTCHAR to + automatically implement putchar function prototype, + * device/include/pic16/usart.h: modified and updated USART library, + * device/lib/pic16/libio/adc/, + * device/lib/pic16/libio/i2c: some modifications to improve library + performance, + * device/lib/pic16/libc/stdio/: modifications for the new printf* + family of functions, + * device/lib/pic16/libc/stdlib/: various modifications in the malloc + family of functions and other sources, + * device/lib/pic16/libio/usart/: NEW, c sources for the usart module + of the PIC18Fxx[28] devices, + * device/lib/pic16/libc/delay/: NEW, c sources for the delay functions, + * device/lib/pic16/libc/utils/: minor modifications in the .S sources, + * device/lib/pic16/startup/{crt0i.c, crt0iz.c}: redesign of the + _do_cinit function, because the previous failed when local variables + where not placed in the same memory bank, + * device/lib/pic16/libsdcc/char/: various modifications to improve + library performance, + * doc/sdccman.lyx: some reorganization of the PIC16 part, added many + information on the new functions of the c library and more... + +2005-03-28 Erik Petrich + + * src/SDCCBBlock.c (iCodeBreakDown): fixed bug #1170212 + +2005-03-26 Raphael Neider + + * src/pic16/gen.c (genSkipc): fixed semantics (execute branch + if condition == CARRY) + * (genCmp): adapted to new genSkipc semantics + * src/pic16/genutils.c (pic6_genCmp_special): removed side effect + on rIfx (genCmp was broken) + +2005-03-26 Erik Petrich + + * src/SDCCmain.c (setDefaultOptions, optionsTable[], parseCmdLine), + * src/z80/main.c (_keywords[]), + * src/SDCCglobal.h (struct options), + * src/SDCC.y, + * src/SDCC.lex (isTargetKeyword, doPragma, pragma_tbl[]): new pragmas + to enable/disable SDCC and C99 extensions/keywords (std_c89, std_sdcc89, + std_c99, std_sdcc99). Also, equivalent command line options (--std-c89, + --std-sdcc89, --std-c99, --std-sdcc99). SDCC specific keywords are + always available in leading double underscore form. The C99 support is + mostly missing, but it's a start. + * support/regression/tests/bug-227710.c: fixed nonconforming use of + reserved identifier "__data". + +2005-03-24 Maarten Brock + + * src/mcs51/peeph.def: fixed bug 1170013 + +2005-03-22 Maarten Brock + + * device/include/mcs51reg.h: fixed bug 842007 + +2005-03-21 Erik Petrich + + * src/SDCCcflow.c (dfNumCompare): committed the wrong version of this + last time. + +2005-03-20 Erik Petrich + + * src/port.h (struct PORT), + * src/avr/ralloc.c (avr_assignRegisters), + * src/avr/main.c, + * src/ds390/ralloc.c (ds390_assignRegisters), + * src/ds390/main.c, + * src/hc08/ralloc.c (hc08_assignRegisters), + * src/hc08/main.c, + * src/mcs51/ralloc.c (mcs51_assignRegisters), + * src/mcs51/main.c, + * src/pic/ralloc.c (pic14_assignRegisters), + * src/pic/main.c, + * src/pic16/ralloc.c (pic16_assignRegisters), + * src/pic16/main.c, + * src/xa51/ralloc.c (xa51_assignRegisters), + * src/xa51/main.c, + * src/z80/ralloc.c (z80_assignRegisters), + * src/z80/ralloc.h, + * src/SDCCopt.c (eBBlockFromiCode, replaceRegEqv, killDeadCode), + * src/SDCCcse.c (ifxOptimize, cseBBlock, cseAllBlocks), + * src/SDCCcse.h, + * src/SDCCdflow.c (computeDataFlow), + * src/SDCCdflow.h, + * src/SDCCloop.c (addDefInExprs, loopInvariants, loopOptimizations), + * src/SDCCloop.h, + * src/SDCCcflow.c (*), + * src/SDCCcflow.h, + * src/SDCCBBlock.c (iCodeBreakDown, dumpEbbsToFileExt, eBBWithEntryLabel), + * src/SDCCBBlock.h (struct ebbIndex): new struct that keeps two copies + of the eBBlock list, sorted by both bbnum and dfnum. (fixes bug with + immedDom() returning wrong block; probably fixes bug #1160833) + +2005-03-20 Borut Razem + + * support/scripts/inc2h.pl: WIN32 port + +2005-03-19 Maarten Brock + + * device/lib/makefile.in: added abs.c and labs.c + +2005-03-17 Maarten Brock + + * device/include/stdint.h: added + * device/lib/abs.c: added + * device/lib/labs.c: added + * device/include/stdlib.h: added abs() and labs() prototypes + * device/lib/libsdcc.lib: added abs and labs + * device/include/float.h, + * device/lib/_fsmul.c, + * device/lib/printf_fast.c, + * device/lib/printf_tiny.c: updated comments + +2005-03-16 Erik Petrich + + * src/SDCCicode.c (geniCodeSwitch, geniCodeJumpTable): fixed + bug #1164313 + +2005-03-16 Erik Petrich + + * src/SDCCcse.c (cseBBlock): retain assignment to self when volatile + * src/SDCCast.c (isLoopCountable): fixed bug #1161985 + +2005-03-15 Maarten Brock + + * device/lib/printf_large.c: removed inline assembly for portability and + readability. Use printf_fast if speed or size are more important. + * src/pic16/gen.c: removed conditions around use of DEBUGpc + * src/pic16/genutils.h: added define for DEBUGpc for MSVC + +2005-03-15 Vangelis Rokas + + * src/pic16/genutils.c (pic16_genCmp_special): initialized offs to + prevent compiler warning + +2005-03-14 Vangelis Rokas + + * device/lib/pic16/startup/crt0i.c (_cinit): local variables where + moved to level 0 and declared as static. Also they are explicit + placed in access bank. This was necessery because some times they + might cross memory bank boundaries. crt0iz.c is *NOT* updated!!! + * src/pic16/device.h: added flag OPTIMIZE_CMP to enable some compare + optimizations. Currently only compare to unsigned char is implemented, + * src/pic16/gen.c: added fReturnIdx array, + * (struct resolvedIfx) is moved to gen.h and made public, + * (struct _G): added sregsAlloc and sregsAllocSet fields, + * (aopForSym): added an optimization to directly store in stack of + the operand of a SEND iCode, + * (pic16_aopOp): don't return return registers as strings (AOP_STR) + but as registers instead (AOP_REG) using the fReturnIdx array, + * (pic16_freeAsmop): remove the freed register from the + _G.sregsAlloc field, + * (pic16_aopGet): in case AOP_STR, the compare to 'a' is changed to + a compare of 'WREG', + * (pic16_popGetTempRegCond): changed function prototype, now + function takes also a bitVector argument v which holds the current + set of registers that are allocated for stack access by aopForSym, + registers allocated in aopForSym for accessing stack symbols are not + any more part of the functions usedRegs field, + * (genCall): some times aopOp is called for a stack variable to be + send, aopForSym might perform the push, if this is true make sure + that genCall doesn't push the variable twice by testing _G.resDirect, + * (genFunction): changed testing for unspecified interrupt number + from 256 to INTNO_UNSPEC, + * modified selection scheme of frame pointer generation. Previously + if function did use local registers a frame pointer was generated, + now a frame pointer is generated only if function has arguments + (that need PLUSW2 register access), or has stack arguments, or the + compiler is not instructed to omit the frame pointer, + * (genEndFunction): before restoring local registers that were saved + in the function preamble, also restore the registers that *might* + have been allocated for stack access, + * (genRet): removed some old comments, + * (genCmp, the active (RN's) version): added a call to the + pic16_genCmp_special function to perform the compare with a more + robust and optimized way, + * (genInline): a feature has been added in inline code generation, + which allows a wildcard variable substitution when writing inline + assembly. Code is incomplete and experimental therefore undocumented, + * (genCast): changed order of aopOp for result and right to allow + aopForSym to directly load the result if possible, + * src/pic16/genutils.c (selectCompareOp, pic16_genCmp_special): NEW, + perform an optimized compare on some selected special occasions, + * src/pic16/genutils.h: declaration of resolvedIfx structure from gen.c, + * src/pic16/glue.c (pic16createInterrupVect): make sure we never + generate an IVT any more, + * src/pic16/main.c (pic16_optionsTable): added command line option + --optimize-cmp, + * (_pic16_initPaths): when calling C preprocessor define pic18fXXXX + macro too, when calling assembler define pic18fXXXX *and* __18Fxxxx + macros, + * src/pic16/NOTES: Raphael Neider added in list of active developers + * src/pic16/pcode.c (OPT_TYPE_STR): added strings jumptable_begin and + jumptable_end to prevent bug #, + * (pic16_pciADDWFC, ADDFWC, COMF, CLRF): added some missing flags in + inCond and outCond fields, + * src/pic16/pcoderegs.c (pCodeOptime2pCodes): add a fix for bug #, + * src/pic16/ralloc.c (serialRegAssign): explicit set willCS to 0 to + turn off register spilling, + * (packRegsForOneUse): synced with other ports' versions although it + is not used currently, + * (pic16_packRegisters): added an optimization while reading + structure bitfields, some registers may be saved (malloc code is + decreased by 80 bytes) + +2005-03-12 Vangelis Rokas + + * src/SDCCcse.c (cseBBlock): inside 'do operand lookup' loop test if + left is a bitfield, if yes, then don't optimize assignment. Perhaps + this can be optimized more? + +2005-03-10 Raphael Neider + + * src/pic16/gen.c (pic16_loadFSR0, genPackBits, genUnpackBits, + genNearPointerGet): (hopefully) fixed access to bitfields via + pointers (p->bitN = x; and x = p->bitN; failed) + +2005-03-09 Paul Stoffregen + + * device/lib/printf_fast.c: fix leading zero format, eg "%02d" + +2005-03-09 Raphael Neider + + * src/SDCCopt.c (killDeadCode): fixed bug #1156016 + +2005-03-06 Maarten Brock + + * src/SDCCicode.h: moved CRITICAL and ENDCRITICAL from SKIP_IC2 to SKIP_IC + * src/mcs51/ralloc.c (willCauseSpill): added check for REG_BIT type, + (regTypeNum): set REG_BIT type if necessary + * src/mcs51/ralloc.h: added define REG_BIT, used to fix bug 1144613 + * support/regression/tests/critical.c: check bug 1144613 + +2005-03-02 Raphael Neider + + * src/pic16/gen.c (genRightShiftLiteral): fixed bug #1154256 + +2005-02-26 Erik Petrich + + * src/avr/ralloc.c (serialRegAssign), + * src/ds390/ralloc.c (serialRegAssign), + * src/hc08/ralloc.c (serialRegAssign), + * src/mcs51/ralloc.c (serialRegAssign), + * src/pic/ralloc.c (serialRegAssign), + * src/pic16/ralloc.c (serialRegAssign), + * src/xa51/ralloc.c (serialRegAssign), + * src/z80/ralloc.c (serialRegAssign): fixed bug #1105154 + +2005-02-22 Maarten Brock + + * src/SDCCast.c (decorateType): fixed bug 1124787 + +2005-02-20 Hubert Sack + committed by Frieder Ferlemann + + * src/mcs51/peeph.def: added peepholes 3.h-k and 132.a-f from + patch #1121755 + +2005-02-20 Frieder Ferlemann + + * src/SDCCpeeph.def: new keyword "labelRefCountChange" which allows peepholes + to keep the correct label reference count when adding/removing references + to labels. A peephole file using this is appended to patch #1144962. + +2005-02-14 Raphael Neider + + * device/lib/pic16/libc/string/memccpy.c: changed 3rd argument to char + * src/SDCC.lex (process_pragma): fixed to make disable_warning work for PIC16 + * src/pic16/gen.c (aopForSym, calls to pic16_aopOp): prevent unneccessary + retrievals of result operand's value on assignment + +2005-02-13 Vangelis Rokas + + * device/include/pic16/string.h: modified prototype for memccpy() + to memccpy(void *, void *, char, size_t) + * src/pic16/gen.c (genFunction, genEndFunction): reenable if-case to + check whether to omit frame pointer or not, + * (genInline): convert all occurences of "\n" to LF in inline + assembler blocks, this helps formatting the inline text, + * (pic16_loadFSR0): modified prototype, + * (genNearPointerGet, genNearPointerSet): reorganization of code, + removed some 8051 legacy code, + * (genPackBits): enabled handling bitfields exceeding one byte in size, + * src/pic16/ralloc.c (pic16_assignRegisters): clear dynrIdx variable + before allocating temporary registers in functions, + +2005-02-11 Maarten Brock + + * support/regression/tests/bitvars.c: corrected the "fix" + +2005-02-10 Maarten Brock + + * support/regression/tests/bitvars.c, + * support/regression/tests/bitwise.c, + * support/regression/tests/rotate.c: "fixed" problems on Alpha + +2005-02-10 Raphael Neider + + * src/pic16/pcode.c (assignToSameBank) : fixed cast to pointer of + different size for Alpha + * src/pic16/gen.c (genCmpEq) : improved compare with 0 + +2005-02-09 Raphael Neider + + * src/SDCC.lex(doPragma) : save and restore warning options as well + (also added new stack plus clone- and copyAndFreeSDCCERRG()) + * have #pragma less_pedantic set the errorlevel to WARNING + (fixes #1117001) + * (cloneOptimize) : fixed wrong malloc's size + * support/Util/SDCCerr.[ch] : made SDCCERRG globally accessible to + facilitate correct handling of #pragma (save|restore) + +2005-02-09 Maarten Brock + + * src/mcs51/gen.c: removed non-standard C nameless struct/union + +2005-02-04 Slade Rich + + * src/pic/gen.c : Fix for bugs #1080519 & #1115662. + +2005-02-03 Maarten Brock + + * device/include/mcs51/c8051f120.h: added declarations for sbit port 2,3&4 + +2005-02-02 Raphael Neider + + * src/SDCCast.c (processParms): disabled W_NONRENT_ARGS for pic16 port + * src/pic16/gen.c (aopForSym): reenabled special case for function pointers + * (pic16_storeForReturn): fixed to allow returning function pointers + * (genPackBits): improved accessing full bytes, implemented for GPOINTERs + * device/include/pic16/{stddef.h,stdbool.h}: added + +2005-02-02 Maarten Brock + + * device/include/mcs51/c8051f040.h: added define CPT2_PAGE + +2005-02-01 Slade Rich + + * src/pic16/pic16.dsp : Added file graph.c to make it compile under windows + * src/pic16/Makefile.bcc : Do not use this file but added file graph.c as it + appeared to be required + +2005-01-31 Borut Razem + + * support/scripts/sdcc.nsi: added include/asm/ds390, include/asm/mcs51, + include/mcs51 and include/z80 directories to the package + +2005-01-26 Erik Petrich + + * src/hc08/gen.c (genFunction): fixed bug #1112752 + +2005-01-30 Frieder Ferlemann + + * src/mcs51/peeph.def: adapted peephole 258.x to changed gen.c (genAnd) + +2005-01-29 Frieder Ferlemann + + * src/mcs51/gen.c (genAnd): accessing LSB/MSB by rotating acc + +2005-01-29 Maarten Brock + + * device/include/Makefile.in: create/copy mcs51 and z80 include subdirs + +2005-01-27 Maarten Brock + + * device/include/c8051fxxx.h: removed these 6 files + * device/include/mcs51/c8051fxxx.h: added these 11 new files + +2005-01-26 Raphael Neider + + * src/pic16/gen.c (genAssign): fixed assignment from longs + in codespace (were cut to three bytes) + * (genDummyRead): implemented (except for CODESPACE...), + fixed bug #1108575 + * src/pic16/glue.c (emitStatistics): beautified + * device/lib/pic16/libm/Makefile: added include path + +2005-01-26 Erik Petrich + + * src/z80/gen.c (aopPut): fixed bug #1103902 + +2005-01-25 Erik Petrich + + * device/lib/expf.c: fixed bug #1095792 + +2005-01-24 Vangelis Rokas + + * device/lib/pic16/libm: added Math library sources + +2005-01-24 Raphael Neider + + * src/pic16/pcode.h: added second memory operand to pCodeOpReg + to enable upcast to pCodeOpReg2 (there is no type tag to + differenciate the two and pic16_popGet2p cast into PCOR2) + * src/pic16/main.c (_process_pragma): fixed another malloc bug + (sizeof(sectNames) changed to sizeof(sectName)) + Both patches fix segfaults under MinGW. + +2005-01-23 Raphael Neider + + * src/pic16/{device.c,pcode.c}: s/free/Safe_free/g for + Safe_[mc]?alloc()'ed variables + * src/pic16/gen.c (pic16_aopOp,pic16_popGet): added handling + of (byte sized) temporaries (assign them to WREG for now) + * src/pic16/main.c (_process_pragma): fixed nasty malloc bug + (used sizeof(set *sectSyms) instead of sizeof(struct sectSym)), + this might fix SIGSEGVs on MinGW... + * src/SDCCopt.c (killDeadCode): restored original behaviour + (volatile operands might get thrown away though) + +2005-01-23 Vangelis Rokas + + * src/pic16/gen.c: fixed bug #1106975, + * src/pic16/gen.c: fixed possible bug #1102572, now during TOS + pointer update, INTCON is saved, global interrupts are disabled and + restored after updateing TOS. + * src/SDCC.y, src/SDCC.lex, src/SDCCsymt.c, src/SDCCsymt.h: + * added function attribute 'shadowregs' to take advantage of shadow + registers, + * added function attribute 'wparam' as an alternative to the wparam + pragma, + * support/Utils/SDCCerr.[ch]: added error E_SHADOWREGS_NO_ISR when + user declares a non-ISR function as 'shadowregs', + * doc/sdccman.lyx: updated to reflect recent changes of pic16 port + +2005-01-22 Vangelis Rokas + + * .version: bumped version number to 2.4.8 + * device/lib/pic16/pics.all: list of PIC18F devices supported by + pic16 port, + * device/lib/pic16/libio/i2c/: I2C module support library, + * device/include/pic16/i2c.h: I2C support library header, + * device/lib/pic16/libc/stdio/: standard IO support sources, + * (printf_small.c): printf_small() source, supports float print, + * (printf_tiny.c): printf_tiny() source, does not support floats, + * device/lib/pic16/Makefile.common.in: added OPT_FLAGS macro to + enable global optimizations for entire library source, other + Makefiles in the source tree are also modified to reflect this, + * device/lib/pic16/libc/stdlib/putchar.c (putchar): dummy putchar() + function, + * doc/sdccman.lyx: updated to reflect new changes, + * src/pic16/gen.c (aopForSym): don't handle sym->iaccess in + sym->onStack if-case, + * src/pic16/main.c (_pic16_keywords): commented out keywords bit, + sbit, idata, _idata, xdata, _xdata, + * added pragma library, to link an external library, (see doc), + * removed command line options, --pomit-config-words, --pomit-ivt, + --pleave-reset-vector, + * (pic16_finaliseOptions): when define macro SDCC_MODEL_{SMALL/LARGE} + when calling assembler to reflect memory model used, also define + macro STACK_MODEL_{SMALL/LARGE} when compiling and assembling to + reflect stack model used, + * src/pic16/ralloc.c (pic16_allocDirReg): when operand is allocated + on stack return NULL, + +2005-01-22 Daniel Winkler + + * src/SDCCopt.c (killDeadCode): do not throw iCodes away if one + of the operands is volatile. Fixes #1020220 + +2005-01-22 Daniel Winkler + + * src/pic16/pcoderegs.c (pCodeOptime2pCodes): reenabled optimization + * (OptimizeRegUsage): make sure that there is really no other flow where + the first pCode is used + +2005-01-22 Raphael Neider + + * src/pic16/pcoderegs.c (pCodeOptime2pCodes): disabled optimization + to fix #1106967 (pCode->seq are not set up correctly) + +2005-01-22 Erik Petrich + + * src/SDCCglue.c (glue): make sure code area is declared before the + static initialization area. + +2005-01-21 Raphael Neider + + * device/lib/Makefile.in: fixed test for pic16 install dir + * device/lib/pic16/*/Makefile*: modified compile flags to enable + optimizations + * doc/sdccman.lyx: updated banksel optimization, removed --flr-support and + added --optimize-goto compiler switch and pragma wparam documentation + * src/pic16/pcode.c (pic16_OptimizeBanksel): removed statistics dump + * src/pic16/pcodepeep.c (pic16_pCodeOpCopy): fixed copying of WREG, PRODL + and PRODH closing bug #1071770 (peephole optimizer) + +2005-01-19 Raphael Neider + + * src/SDCCglobl.h: ensure that PATH_MAX >= 2048 to guarantee + cmdLine buffers (used when calling sdcpp...) are large enough + (MAX_PATH=256 truncates arguments leading to system halts when + used in MinGW...) + * src/pic16/gen.c (pic16_sameRegs): relaxed size criterion + * (genUminus): rewritten to for efficiency + * (genNearPointer[GS]et): enforce reloading of FSR0 (was still + used uninitialized in some cases) + * (genCast): upcasting a 16bit int to a 24bit GPOINTER may not + copy the third byte from the int -- now assumes 0x80 (data memory) + * src/pic16/genarith.c (pic16_genPlus): fixed bug when swapping + operands (genAddLit expects the iCode's operands to swapped as + well), fixed leftover bytes (crashed for short left operands) + * (pic16_genMinusDec): performance improvements, removed false + PIC14 emitSKPNCs + * (pic16_genMinus): fixed to cope with differently sized operands + * src/pic16/glue.c (pic16_glue): added new banksel optimization + for --obanksel > 1 + * src/pic16/pcode.c: implemented (first phase of) banksel optimization + * src/pic16/graph.[ch]: implementation of directed graphs, used by + new banksel optimization + * src/pic16/pcoderegs.c (pCodeRegMapLiveRangesInFlow): prevented + analysis for temporary registers (segfaults...) + * src/pic16/peeph.def: added rule + +2005-01-18 Vangelis Rokas + + * device/lib/pic16/libc/stdlib/x_ftoa.c: it defines x_ftoa function + which converts a float number to its ASCII representation + * device/lib/pic16/libc/utils/cnvfrac.S,cnvint.S: support + functions to convert the fractional and integer part of a float to ASCII, + * device/lib/pic16/libc/stdlib/(calloc.c,free.c, malloc.c, + realloc.c): added _MALLOC_SPEC to explicit place variables in data + ram + * device/include/asm/pic16/features.h: added _CODE, _DATA, _AUTOMEM, + _STATMEM macros, + * device/include/pic16/adc.h: added GPL info, + * src/pic16/gen.c (genIfxpCOpJump): perform an genIfxJump but using + a pCodeOp as tested operand, + * (genNearPointerGet): optimized bit testing, does not use + intermediate register for bit value, test directly instead with + BTFSS, BTFSC, works only for single bits, + * (genpic16Code): dump the name of the iCode in the asm, + * src/pic16/ralloc.c (decodeOp): removed static declaration and + renamed to pic16_decodeOp, + * (serialRegAssign): do not allocate a temporary register for iCode + sequences that test a single bit for 1/0 + +2005-01-12 Vangelis Rokas + + * src/pic16/pcode.[ch]: introduced pic16_stackpnt_*, + pic16_framepnt_*, pic16_stack_*, pic1_frame_* pointer variables to + access stack and frame pointers. They are initially assigned to + point at pic16_pc_fsr1[lh] and pic16_pc_fsr2[lh] variables and other + accessing SFRs. Updated all occurences of modification of stack or + frame pointer in gen.c and pcode.c, + * src/pic16/ralloc.c (serialRegAssign): fixed two bugs with + assigning of a literal value to pointers, + * src/pic16/main.c (pic16_finiliseOptions): set pre-processor define + flag STACK_MODEL_SMALL or STACK_MODEL_LARGE according to the model + selected + +2005-01-11 Vangelis Rokas + + * doc/sdccman.lyx: update documentation about stack pragma, added + some info for stack memory models + +2005-01-08 Jesus Calvino-Fraga + + * src/pic16/gen.c (DEBUGpc): MSVC 6 does not support macro variable arguments + +2005-01-08 Raphael Neider + + * src/pic16/device.c (pic16_dump_usection): changed naming scheme for + udata sections to fix bug #1097823 + +2005-01-05 Raphael Neider + + * src/pic16/gen.c (genGenericShift): added handling of differently + sized left operand and result + +2005-01-04 Raphael Neider + + * src/pic16/gen.c (genIfxJump): fixed inverted skips on CARRY + * (genIfx): fixed (?) read from uninitialized SPIL_LOC (now assumes CARRY + to hold the condition bit) + * added new version of genCmp (old code available via #define) + * added new version of genShiftLeft/genShiftRight in a generic + way, now supports shifting by negative values + * (genLeftShiftLiteral, genRightShiftLiteral): use absolute value of + shiftCount (expected by genGenericShift) + * src/pic16/genarith.c (genPlus): added code for adding CARRY+literal + * src/pic16/pcode.c (pic16_OptimizeJumps): removed annoying statistics + dump + * (pic16_newpCodeOpLit): changed to cast to unsigned char (as e.g. -32766 + is an invalid literal too...) + +2005-01-04 Vangelis Rokas + + * src/pic16/gen.c (aopForSym, genEndFunction): applied some fixes + from Raphael Neider, + * src/pic16/pcode.c (pic16_newpCodeOpLit): removed casting to char + for 8-bit literals. This fixes some literal operands which are sign + extended to 16-bits ints when instruction needs only 8-bits. + +2004-12-31 Paul Stoffregen + + * device/lib/logf.c: added mcs51 assembly version + * device/lib/expf.c: added mcs51 assembly version + * device/lib/_logexpf.c: new shared asm code for expf and logf + * device/include/math.h: add defines for assembly math library + * device/lib/Makefile.in: build new _logexpf.c + * device/lib/libfloat.lib: use new _logexpf.c + +2004-12-29 Slade Rich + + * src/pic/device.c + * src/pic/pcode.c : adjusted internal stack and pre-allocated registers for + device types which have less than 0x7f registers. + +2004-12-29 Slade Rich + + * src/pic/genarith.c : Fixed problem with subtraction where the result would not be updated when borrowing. + +2004-12-28 Paul Stoffregen + + * device/lib/printf_fast.c: only build on supported arch. + * device/lib/printf_tiny.c: only build on supported arch. + * device/lib/printf_fast_f.c: only build if asm float lib + * device/lib/_fsget1arg.c: only build if asm float lib + * device/lib/_fsget2args.c: only build if asm float lib + * device/lib/_fsnormalize.c: only build if asm float lib + * device/lib/_fsreturnval.c: only build if asm float lib + * device/lib/_fsrshift.c: only build if asm float lib + * device/lib/_fsswapargs.c: only build if asm float lib + * device/include/stdio.h: don't provide print_fast, + print_fast_f, print_tiny prototypes if --xstack used + +2004-12-28 Maarten Brock + + * device/lib/sincosf.c (sincosf): don't invert bit/bool by ~ + * support/regression/ports/mcs51-stack-auto/spec.mk: added new _fs.. files + to the SOURCES + +2004-12-28 Paul Stoffregen + + * device/lib/printf_fast_f.c: same as printf_fast, but + with floating point enabled + * device/lib/printf_fast.c: minor tweaks + * device/include/stdio.h: add printf_fast_f + +2004-12-27 Paul Stoffregen + + * src/SDCCmain.c: make --float-reent default for mcs51 + * device/lib/_fsadd.c: added mcs51 assembly version + * device/lib/_fssub.c: added mcs51 assembly version + * device/lib/_fsmul.c: added mcs51 assembly version + * device/lib/_fsdiv.c: added mcs51 assembly version + * device/lib/_fseq.c: added mcs51 assembly version + * device/lib/_fsneq.c: added mcs51 assembly version + * device/lib/_fsgt.c: added mcs51 assembly version + * device/lib/_fslt.c: added mcs51 assembly version + * device/lib/_fscmp.c: shared code for fseq,fsgt,fslt,fsneq + * device/lib/Makefile.in: add _fscmp to build + * device/lib/libfloat.lib: add _fscmp to build + +2004-12-27 Paul Stoffregen + + * device/lib/_fs2slong.c: added mcs51 assembly version + * device/lib/_fs2sint.c: added mcs51 assembly version + * device/lib/_fs2schar.c: added mcs51 assembly version + * device/lib/_fs2ulong.c: added mcs51 assembly version + * device/lib/_fs2uint.c: added mcs51 assembly version + * device/lib/_fs2uchar.c: added mcs51 assembly version + * device/lib/_slong2fs.c: added mcs51 assembly version + * device/lib/_sint2fs.c: added mcs51 assembly version + * device/lib/_schar2fs.c: added mcs51 assembly version + * device/lib/_ulong2fs.c: added mcs51 assembly version + * device/lib/_uint2fs.c: added mcs51 assembly version + * device/lib/_uchar2fs.c: added mcs51 assembly version + * device/include/float.h: added #define to select asm vs c + +2004-12-26 Paul Stoffregen + + * device/lib/printf_fast.c: improvements to float output + * device/include/float.h: add defines for assembly float library + * device/lib/_fsget1arg.c: receive 1 float arg + * device/lib/_fsget2args.c: receive 2 float args (reentrant) + * device/lib/_fsnormalize.c: normalize a float + * device/lib/_fsreturnval.c: return float, various helper routines + * device/lib/_fsrshift.c: right shift a float's mantissa + * device/lib/_fsswapargs.c: swap 2 floats + * device/lib/Makefile.in: build these 6 new files for mcs51 + * device/lib/libfloat.lib: add these 6 files to the library + +2004-12-26 Borut Razem + + * sim/ucsim/avr.src/arith_inst.cc: fixed bug #1088372- savr is not + built by gcc 3.4.2 + +2004-12-25 Paul Stoffregen + + * device/lib/printf_tiny.c: printf for mcs51 in only 267 bytes, + and fully reentrant and register bank neutral. + * device/lib/printf_fast.c: added float (not enabled by default), + added compact/slower integer (also not enabled by default), + improved size/speed of fast integer code, other minor changes + * device/include/stdio.h, device/lib/Makefile.in, + device/lib/libsdcc.lib: integrate printf_tiny into mcs51 build + +2004-12-24 Maarten Brock + + * src/pic16/pcode.c: declaring variables other than at the start of a + block is not supported in C by VC6. + +2004-12-22 Vangelis Rokas + + * applied a previous patch from Raphael Neider that wasn't included + in the previous commits, which fixes infinite loops within jumptable + improvements, + * made some fixes that previous patches introduced + +2004-12-21 Vangelis Rokas + + * src/pic16/gen.c (pic16_aopGet): applied fix from Raphael Neider + that fixes an issue with AOP_PCODE asmop's offset, + * (pic16_popCopyReg): update instance field too, + * (mov2w): modified to pic16_mov2w because it conflicts with mov2w + function of pic port, + * (genCmp, genAnd, genAssign), + * src/pic16/genarith.c (genAddLit): some fixes from Raphael Neider, + +2004-12-20 Vangelis Rokas + + * src/SDCCast.c (gatherAutoInit): allow pic16 to emit static + variables initial values to idata section, + * src/SDCCicode.c (geniCodeCall): patch from ### to fix unreferenced + variables in some functions. This utilizes parmBytes field of iCode + structure to hold the offset of the variable in stack. (might be + able to use the stack field too?) + * applied patch from Raphael Neider # ### , # ### + * src/pic16/glue.c (pic16emitRegularMap): fix to print static + variable initial values in idata section, + * src/pic16/ralloc.c (pic16_allocDirReg): don't allocate register + for static variables with initial value + * src/device/lib/pic16/libsdcc/float/ulong2fs.c (__ulong2fs): + applied fix in while loop from Raphael Neider. + +2004-12-19 Maarten Brock + + * src/ds390/gen.c (genCpl): fixed bit=~(char/bit) bugs, added warning + * src/ds390/main.c (_ds390_regparm): don't pass bit params in registers + * src/ds390/ralloc.c (serialRegAssign): spill bits + * src/mcs51/gen.c (genCpl): fixed bit=~(char) bugs, added warning + * support/Util/SDCCerr.c, + * support/Util/SDCCerr.h: added warning W_COMPLEMENT for using bit=~(bit) + * support/regression/tests/bitvars.c: added tests for bitwise complement(~) + * support/regression/tests/bitwise.c: added test for bitwise complement(~) + +2004-12-09 Maarten Brock + + * device/include/sdcc-lib.h: inserted LGPL, added includes + asm/ds390/features.h and asm/mcs51/features.h + * device/include/asm/default/features.h, + * device/include/asm/gbz80/features.h, + * device/include/asm/z80/features.h: added empty _AUTOMEM + and _STATMEM + * device/include/asm/ds390/features.h, + * device/include/asm/mcs51/features.h: added files with defines for + _AUTOMEM and _STATMEM indicating automatic and static storage class + * device/lib/printf_large.c (_print_format): optimized & used _AUTOMEM + * doc/sdccman.lyx: version 2.4.7, updated xstack documentation + * src/SDCCicode.c (geniCodeCast), + * src/SDCCsymt.c (compareType): allow cast of data-ptr to idata-ptr + * src/SDCCloop.c (loopInduction): removed unused variable lr + * src/SDCCopt.c (convilong, convertToFcall): moved "easy special case" + to convertToFcall to include char modulo (RFE 1065037), added check + if left operand is unsigned and use abs of literal value + * src/SDCCpeeph.c (setFromConditionArgs): removed double quotes option + as it doesn't work after conversion from peephole.def to peephole.rul + * src/mcs51/gen.c (toBoolean): added check for size, + (genModOneByte): optimized code for signed char modulo a literal + power of 2 (thanks to Hubert Sack), + (genRRC): removed unnecessary "clr c", + (genRLC): replaced "add a,acc" with cheaper "rlc a" + * src/mcs51/peeph.def: renamed 115 to 115.a, added rule 115.b: another + jump optimization, + swapped rules 256.c and 256.d, + extended 256.d by using new multiple checks (thanks Erik), + added rules 256.e and 256.f, + updated rule 261.a and 261.b to new generated code + * support/regression/tests/muldiv.c: added test div/mod by a power of 2 + +2004-12-07 Erik Petrich + + * src/SDCCloop.c (basicInduction, loopInduction): fixed several + induction related bugs, including first part of bug #1074377 + +2004-12-05 Vangelis Rokas + + * applied patch from bug-report #1076292, + * applied patches for genAnd and Goto-optimizations for Raphael + Neider, + * src/SDCCicode.c (printOperand): fixed !REGA source to compile and + dump a less iCode information, + * src/pic16/device.h (pic16_options_t): added field debgen, + * src/pic16/gen.h: added macros DUMP_FUNCTION_ENTRY, + DUMP_FUNCTION_EXIT, FENTRY, FENTRY2, + * src/pic16/gen.c (my_powof2): renamed to pic16_my_powof2 and made + puclic, + * (various functions): added macros FENTRY and FENTRY2 to functions, + to emit function prologue, + * (various functions): fixed indentation, + * (genNearPointerGet): fixed loading of FSR0, + * (genPackBits): applied patch from Raphael Neider to fix updating + of FSR0 and touching only the modified bits, + * src/pic16/genarith.c (various functions): added macros FENTRY to + emit function prologue in comments, + * src/pic16/pcode.h: added functions debugf2, debugf3, + * src/pic16/ralloc.c: partial fix for packForPush caused + segmentation fault, + +2004-12-04 Frieder Ferlemann + + * src/mcs51/peeph.def: added 261.a,b (16 bit rotate) by Stas Sergeev + with reversed byte order + * support/regression/tests/rotate.c: added (ds390 skips some tests) + +2004-12-03 Erik Petrich + + * src/z80/gen.c (genLeftShift, genRightShift): fixed second part of + bug #1074377 + * src/hc08/gen.c (genrshFour, shiftRLong, shiftLLong), + * src/mcs51/gen.c (shiftLLong): Fixed some shifting bugs Frieder found + +2004-12-02 Slade Rich + + * src/pic/pcode.c : fixed a problem where banksel was not being inserted. + +2004-12-02 Erik Petrich + + * src/SDCCpeeph.c (callFuncByName): support combined peephole rule + conditions, + (setFromConditionArgs): friendly operand parser for peephole rules, + (operandBaseName, operandsNotRelated): new peephole condition + "operandsNotRelated" -- similar to "operandsNotSame", but takes + architecture specific register naming into account, handles n-way + comparisons, and supports quoted literals + * src/mcs51/peeph.def: restored rule 177.d with an extra condition + +2004-12-02 Frieder Ferlemann + + * src/mcs51/peeph.def: fixed bug #1076940 + +2004-12-02 Slade Rich + + * device/include/pic/pic16f877.h : added an include file for the PIC16F877 device. + +2004-11-28 Frieder Ferlemann + + Adding support for replacing ljmps with sjmps in jumptables + generated for switch statements. For now you need to set the + environment variable SDCC_SJMP_JUMPTABLE to enable this. + Now 4 algorithms for mcs51 jumptable generation are used: + ljmp or sjmp jumptables for up to 16 cases, stack-pushing target + addresses loaded pc-relative for up to 112 cases and stack-pushing + target addresses loaded with offset from dptr for up to 256 cases. + + * src/SDCCpeeph.c: added peephole conditional labelJTInRange + * src/mcs51/main.c: adapted constants for switch table generation + * src/mcs51/peeph.def: added 260.x for replacing ljmp with sjmp + +2004-11-26 Maarten Brock + + * device/lib/printf_large.c (_print_format): fixed bug 1073386 + * support/regression/tests/bug1057979.c: added test for bug 1073386 + +2004-11-25 Vangelis Rokas + + * src/pic16/pcode.c: fixed bug which may produce error in non-GNU + compilers + +2004-11-25 Vangelis Rokas + + * src/pic16/device.h, + * src/pic16/genarith.c, + * src/pic16/glue.c, + * src/pic16/main.c, + * src/pic16/pcode.c: applied patches #1068154 and #1070213 + +2004-11-24 Vangelis Rokas + + Large cummulative patch for pic16 port. + * device/lib/pic16/gstack.h: NEW, user can specify its own handler + to call when a stack overflow occurs, + * (malloc.h): added CVS Id tag, + * (pic18f{242,252,442,452}.h): added T0CONbits structure and + variable, + * added libc directory. The current version of LibC contains string + functions, ctype functions and macros and some functions of the + stdlib set (like malloc/free/atof/atoi etc...). All functions are to + be extensively tested in the future. Standard disclaimer here. + Library is not automatically build yet. But one can build it by + invoking 'make' inside the libc directory. + * added ADC library under libio. Preliminary version yet. + + * src/pic16/gen.h: added emitTOGC macro, to toggle Carry flag, + * src/pic16/gen.c (aopForRemat): asmop size is filled by + aopForRemat() now and not by pic16_aopOp(), + * (pic16_popGetTempReg): removed warning messgae when allocating + temporary registers, its a buggy feature and will be removed, + * (pic16_popGet): set register instance field in AOP_CRY, + * (pic16_outBitC): fixed for results in size greater than 1, + * (genUminusFloat): fixed for pic16, ported code from mcs51, + * (pic16_storeForReturn): optimized return of 0, + * (genCmp): experimental code for new genCmp which uses PIC18's + special compare&skip instructions. Initial tests fail some times + with variables grater than 1 byte in size, so new code is disabled, + * (genUnpackBits, genPackBits): more optimizations in reading/writing, + a single bit, + * (genCast): began a fix to optimize the casting of a bit to another + bit, now assigning a bitfield to another bitfield will fail, sorry, + * src/pic16/main.c: disabled the use of lr-support feature, + * src/pic16/pcode.h: renamed PCASMDIR to PCAD, + * added some function prototypes, added function _debugf prototype, + * src/pic16/pcode.c: (pic16_get_op): fixed emitting operands of register + bits with offset (case PO_GPR_BIT), + * (genericPrint): don't emit INFO pcode when --pcode-verbose not in + command line, + * (isBankInstruction): modified to return 0 for no banking instruction, + and 1 for banking instruction, + * (pic16_isPCinFlow): check for PCAD (assembler directives) too, + caused stop processing pCodes after a inline assembly block, + * (pic16_popCopyGPR2Bit): updated to match bitfields with offset, + * src/pic16/pcoderegs.c: fixed a bug with eliminating some temporary + registers when it shouldn't, + * src/pic16/ralloc.c (allocReg): add preliminary support for + supporting a limited set of temporary registers, + +2004-11-23 Erik Petrich + + * src/hc08/gen.c (genAssign, genPointerGetSetOfs, genDataPointerGet, + genDataPointerSet): ensure assignments always copy in MSB to LSB + order, + (loadRegFromAop): recognize CLRH optimization, + (genFunction): optimize RECEIVE iCodes in reentrant functions + +2004-11-20 Erik Petrich + + * src/SDCCmain.c (parseCmdLine, optionsTable[]): fixed bug with + --out-fmt-s19 turning into --out-fmt-elf if s19 was already + selected. + * src/SDCCmain.c (linkEdit): don't define SSEG for HC08 + * src/hc08/main.c (_hc08_setDefaultOptions): default xdata to be + contiguous with data + +2004-11-19 Frieder Ferlemann + + * device/lib/_gptrget.c (_gptrget), + * device/lib/_gptrgetc.c (_gptrgetc), + * device/lib/_gptrput.c (_gptrput): _naked allows to use ret + instead of sjmp to ret + * src/mcs51/peeph.def: added peepholes 3.d-g and 177.g,h provided + by Hubert Sack in RFE #1067986, thanks + +2004-11-18 Maarten Brock + + * .version: bumped version to 2.4.7 + * device/lib/_gptrget.c (_gptrget): is now _naked + * device/lib/_gptrgetc.c (_gptrgetc): is now _naked + * device/lib/_gptrput.c (_gptrput): is now _naked + * src/SDCCast.c (createBlock): removed ridiculous self-assignment, + (createFunction): fixed xstack + * src/SDCCglue.c (emitMaps): set allocation required for bit area + * src/SDCCicode.c (geniCodeCast): don't change SPEC_OCLS for literal + or bit either, + (geniCodeCritical): store original interrupt state in an iTemp bit + var unless stack-auto + * src/SDCCicode.h: added CRITICAL and ENDCRITICAL to SKIP_IC2 + * src/SDCCmain.c (setIncludePath): added include/target to search path + * src/SDCCmem.c (allocParms): store bit vars in bit space, not overlay + * src/SDCCsymt.c (checkFunction): don't check regbank for isr's against + prototype, + (processFuncArgs): put bit vars in bit area + * src/mcs51/gen.c (saveRegisters, unsaveRegisters, genXpush, saveRBank, + unsaveRBank): fixed xstack, + (genFunction): bugfix: replaced (global!) reentrant with fReentrant, + (genFunction, genEndFunction): fixed xstack, + (genAssign): optimization don't walk backwards through mem + * src/mcs51/main.c (_mcs51_regparm): don't pass bit params in registers + * src/mcs51/ralloc.c (createStackSpil): spill bits to bit area + * support/regression/Makefile: also make library (for stack-auto) when + making "all" and added "test-mcs51-xstack-auto" + * support/regression/fwk/lib/testfwk.c: added T2_isr prototype for mcs51 + * support/regression/ports/mcs51/T2_isr.c: added this file as a stub + * support/regression/ports/mcs51/fwk.lib: added to link T2_isr stub + * support/regression/ports/mcs51/spec.mk: added rules for fwk.lib + * support/regression/ports/mcs51-stack-auto/spec.mk: replaced + make-library by MAKE_LIBRARY + * support/regression/ports/mcs51-xstack-auto/spec.mk: file added to run + regression tests for xstack + * support/regression/tests/bitvars.c: test for bit vars (bug 938782) + * support/regression/tests/critical.c: test for critical on mcs51 + +2004-11-18 Erik Petrich + + * support/regression/ports/ucz80/spec.mk: use include and lib files from + built version of sdcc instead of installed version + +2004-11-14 Maarten Brock + + * src/mcs51/gen.c (toBoolean): fixed bug 1065458 + * device/lib/Makefile.in: z80 uses printf_large.c, sprintf.c and + vprintf.c now + * device/lib/printf_large.c (calculate_digit): fixed bug 1057979 + * device/lib/z80/Makefile: don't use printf.c as it fails bug 1057979 + WARNING: remove device/lib/build/z80/printf.o by hand when + updating from previous build! + * device/lib/z80/printf.c: updated comment + * support/regression/tests/bug1057979.c: test all ports now + * support/regression/tests/bug1065458.c: file added + +2004-11-12 Erik Petrich + + * src/z80/gen.c (genFunction, genEndFunction): avoided generating + *_start and *_end symbols for static functions + +2004-11-11 Maarten Brock + + * src/SDCCmain.c (linkEdit): don't suppress crt0 if --nostdlib is used + and search crt0.o in all library paths, + (setIncludePath): proper handling of --nostdinc, + (setLibPath): proper handling of --nostdlib + * support/regression/Makefile, + * support/regression/ports/ds390/spec.mk, + * support/regression/ports/gbz80/spec.mk, + * support/regression/ports/hc08/spec.mk, + * support/regression/ports/mcs51/spec.mk, + * support/regression/ports/mcs51-large/spec.mk, + * support/regression/ports/mcs51-stack-auto/spec.mk, + * support/regression/ports/z80/spec.mk: use include and lib files from + built version of sdcc instead of installed version + * doc/sdccman.lyx: fixed typo in --nostdinc + +2004-11-10 Slade Rich + + * src/pic/pcode.c, + * src/pic/device.c, + * src/pic/ralloc.c, + * src/pic/gen.c : added support to generate code for struct bit fields. + +2004-11-06 Maarten Brock + + * as/xa51/xa_version.h, + * device/include/errno.h, + * device/include/regc515c.h, + * device/lib/_itoa.c, + * device/lib/_ltoa.c, + * device/lib/ser_ir_cts_rts.c, + * sim/ucsim/xa.src/glob.cc, + * sim/ucsim/xa.src/inst_gen.cc, + * sim/ucsim/xa.src/xa_bit.cc, + * sim/ucsim/xa.src/xa_sfr.cc, + * sim/ucsim/z80.src/inst_dd.cc, + * sim/ucsim/z80.src/inst_fdcb.cc, + * support/scripts/keil2sdcc.pl, + * src/pic16/pic16.dsp, + * src/pic16/pic16a.dsp: corrected cvs line endings + * device/lib/printf_large.c: fixed bug 1057979 + * src/pic16/gen.c: fixed non-C standard code + * src/SDCCmain.c: made --pack-iram default, added --no-pack-iram + * src/SDCCglobl.h: changed pack_iram to no_pack_iram + * support/regression/ports/mcs51/support.c: reload T1 asap + * doc/sdccman.lyx: updated for options --pack-iram and --no-pack-iram, + pdata use and clear idata startup behaviour + * support/regression/tests/bug1057979.c: added + +2004-11-04 Maarten Brock + + * device/examples/ds390/ow390/ad26.h, + * device/examples/ds390/ow390/cnt1d.h, + * device/examples/ds390/ow390/crcutil.c, + * device/examples/ds390/ow390/ownet.h, + * device/examples/ds390/ow390/owsesu.c, + * device/examples/ds390/ow390/swt12.h, + * device/examples/ds390/ow390/swtoper.c, + * device/examples/ds390/ow390/temp10.h, + * device/examples/ds390/ow390/thermodl.c, + * device/examples/ds390/tinitalk/tinitalk.dsp, + * device/examples/ds390/tinitalk/tinitalk.dsw, + * device/examples/mcs51/clock/hw.h, + * device/examples/mcs51/simple2/go.bat, + * device/examples/serialcomm/windows/serial.h, + * device/examples/xa51/dummy.c, + * device/examples/xa51/hello.c, + * device/include/80c51xa.h, + * device/include/at89x051.h: corrected cvs line endings + +2004-11-04 Vangelis Rokas + + * src/pic16/main.c (options): added command line --gstack, to trace + stack over/under flows, + * added pragma 'wparam' to allow passing first byte of function + parameters via WREG, syntax is #pragma wparam my_function[, func2...] + * src/pic16/gen.c (pic16_testStackOverflow): function which emits a + call to __gstack_test function and sets up the symbol as extern, + * (pic16_pushpCodeOp, pic16_poppCodeOp, pushw, pushaop, popaopidx, + * popaop): added call to pic16_testStackOverflow, + * (wParamCmp, inWparamList): NEW, test existence of a symbol in + wparamList list, + * (genCall, genPcall): now all parameters are passed via stack + except in functions that are pass to wparam pragma in which WREG is + used too, + * (genPcall): REENTRANT flag is checked to see if variable prototype + contains reentrant keyword, don't call a non-reentrant function, via + a reentrant function pointer or vice versa, functions are never + passed via WREG, + * (genJumpTab): applied patch from bug #1057478 by R.Neider and + D.Winkler, + * src/pic16/glue.c (pic16emitRegularMap): fixed bug which caused a + SIGSEGV when accessing a NULL register stucture, + * (pic16_printGPointerType): modified to handle UPPER modifier for + function initializers, changed prototype of function to simpler one, + * (pic16_printIvalFuncPtr): check to see if function is already + added in externs list, + * src/pic16/pcoderegs.c (pCodeOptime2pCodes): fixed bug which + optimized a move from W to SFR with a move to the same register + later after a CALL, + * device/lib/pic16/debug: NEW directory, contains debug features + which are enabled when linking with libdebug.lib, currently command + line option --gstack enables stack pointer tracing for over/under + flow, corresponding sources are in debug/gstack + +2004-10-30 Vangelis Rokas + + * doc/sdccman.lyx: updated SDCC version, + * (PIC16 port): update list of command line options, + * src/pic16/device.h (structure pic16_options_t): added field gstack + to enable stack overflow tracing on push/pops, + * src/pic16/device.c (statistics structure): added statistics + structure, + * (pic16_dump_access, pic16_dump_usection, pic16_dump_gsection, + pic16_dump_int_registers): increase statistics counters for each + * variable which is encountered + * (pic16_dump_usection): emit each .udata variable to its own udata + section, + * src/pic16/gen.c (assignResultValue, genCall, genPcall, genFunction): + when macro USE_WREG_IN_FUNC_PARAMS is set to 0 pass all function + parameters via stack, otherwise use old scheme, + * src/pic16/glue.c (pic16_emitStatistics): dump statistics in + assembler output file, + * src/pic16/main.c: added command line options --gstack to enable + push/pop tracing for stack overflow, + * src/pic16/pcode.c (all pCodeInstruction records for PIC18F + instructions): added size of each instruction, + * (pic16_countInstruction): estimate size of instructions in + the_pFile list, inline assembly blocks are not counted, + * (pic16_FixRegisterBanking): trace previous register usage, when + banksel optimizations is greater than 0, don't emit a redudant + banksel directive, + +2004-10-26 Slade Rich + + * src/pic/ralloc.c : fixed inefficient code produced when compiling a complimented bit operation. + * src/pic16/ralloc.c : applied same fix for pic16. + * src/pic/gen.c : tidied it up a little. + +2004-10-25 Frieder Ferlemann + + * src/mcs51/peeph.def: disabled 259.a,b for removing redundant ret, + thanks to Martin Helmling for reporting (mail on sdcc-devel 2004-10-25) + +2004-10-22 Erik Petrich + + * src/SDCCast.c (reverseParms): fixed bug #1040577 (part 2) + +2004-10-22 Frieder Ferlemann + + * device/lib/ser_ir_cts_rts.c: integer promotion caused a call to the + non-reentrant function __modsint in the interrupt function (thus + corrupting math operations during serial I/O) + * device/lib/ser_ir.c: as above, changed buffersize + * src/mcs51/peeph.def: added 259.a,b for removing redundant ret, + 256.c,d for zeroing + * doc/Makefile: added option -t for rsync + +2004-10-22 Erik Petrich + + * src/SDCCast.h (struct ast), + * src/SDCCast.c (reverseParms, copyAst): fixed bug #1040577 (part 1) + +2004-10-20 Borut Razem + + * support/scripts/sdcc.nsi: added include/pic16/*.h to the setup + package + +2004-10-20 Vangelis Rokas + + * device/lib/pic16/libsdcc/Makefile: added lregs directory in + makefile targets, + * device/lib/pic16/libsdcc/lregs/{Makefile,lrst.c,lrrest.c}: NEW + support functions to replace long sequences of MOVFF's from access + bank registers to stack and vice versa, + * src/pic16/device.h: added new field opt_flags, where optimization + flags can be set to enable certain features, + * src/pic16/gen.c (pic16_emitpinfo): NEW to add PC_INFO pCode in + * pBlock, (genFunction, genEndFunction): surroung loop for + saving/loading used registers in stack with PC_INFO pCodes, + INF_LREGS. Code in between can then be optimized by pCode optimizer + to support function calls, + * (genDataPointerSet): fixed bug which loaded float fields in + structures with corrupt data, + * src/pic16/genutils.c (debugf, _debugf): macro/function which emits + in a standard way debug info on stderr. Feature used for developing + and debugging only, + * src/pic16/glue.c (pic16glue): reformatted, deleted some old and + obsolete chunks of code, + * if optimization flag OF_LR_SUPPORT was set, call pic16_OptimizeLocalRegs, + * src/pic16/main.c (_pic16_parseOptions): added handler for --flr-support, + * pic16/src/pcode.c (pic16_newpCodeInfo, + * (pic16_newpCodeOpLocalRegs), + * (pic16_convertLocalRegs2Support): NEW, to support new optimization + feature, + * (pic16_pCodeConstString): printing of the initial value of a + symbol as a comment is inhibited since parsing was already done by + copyStr and output is corrupt, + * (pic16_pCode2str, genericPrint): handle PC_INFO pCode, + +2004-10-20 Erik Petrich + + * src/mcs51/ralloc.c (packRegisters): fixed bug #1044601 + +2004-10-19 Maarten Brock + + * as/mcs51/lkarea.c: removed old K&R style, + (lnksect): changed check on boundary error, + (lnksect2): changed check on boundary error, + (lnksect2): extend XSTK to end of page if size = 1 + * as/mcs51/lkmain.c: removed old K&R style, + (Areas51): create l_IRAM symbol + * as/mcs51/lkmem.c (summary2): added report on PSEG and XSTK + * device/lib/Makefile.in: renamed model-mcs51-reentrant to + model-mcs51-stack-auto, added model-mcs51-xstack-auto + * device/lib/_mullong.c: added version to be compiled with xstack + * device/lib/mcs51/crtclear.asm: clear only upto --iram-size + * device/lib/mcs51/crtxclear.asm: clear pdata as well + * device/lib/mcs51/crtxstack.asm: fixed comment + * src/SDCCglue.c: maxInterrupts defaults to 0, + (emitMaps): added pdata, + (createInterruptVect): (re)moved default, + (glue): added pdata, + (glue): moved __start__xstack to XSTK with default size 1 + * src/SDCCmain.c (parseCmdLine): automatically set options.intlong_rent + and options.float_rent when options.stackAuto is set, + (linkEdit): only write XDATA_NAME if provided on command line + * src/SDCCmem.h, + * src/SDCCmem.c: added pdata + * src/port.h: added pdata_name to PORT + * src/mcs51/gen.c (toBoolean): fixed for Acc use of aopGet, + (saveRegisters, unsaveRegisters): removed usage of B, + (genMinus): fixed accumulator clash, + (genJumpTab): added comment, this needs another look + * src/mcs51/gen.c: added check for "B in use" paranoia, + added pushB() and popB() + * src/mcs51/peeph.def: restart after 177.c so 177.a can get a second + chance + * src/avr/main.c, + * src/ds390/main.c, + * src/hc08/main.c, + * src/mcs51/main.c, + * src/pic/main.c, + * src/pic16/main.c, + * src/xa51/main.c, + * src/z80/main.c: (reset_regparms) made void parameter explicit and + added PSEG (PAG,XDATA) or NULL to port specifier + * src/ds390/main.c (_ds390_genIVT): moved implemented default in here + * src/mcs51/main.c (_mcs51_genIVT): moved implemented default in here, + (_mcs51_genInitStartup): removed __start__xstack equ, + (mcs51_port): moved xstack from XSEG (XDATA) to XSTK (PAG,XDATA) + * src/pic16/device.c (pic16_dump_usection, pic16_dump_isection), + * src/z80/gen.c (_rleAppend): fixed warnings + * support/regression/tests/zeropad.c: added pdata test + * .version: bumped to 2.4.6 + +2004-10-17 Borut Razem + + * support/scripts/sdcc.nsi: cross compiling of WIN32 setup.exe on Linux + as a part of nightly build + +2004-10-16 Vangelis Rokas + + * src/pic16/gen.c (struct _G): added field useWreg, is set to 1 when + WREG holds the first byte function parameters, + * (aopForSym): take special case for symbols which are in FARSPACE + but in CODESPACE too, + * (assignResultValue): modified to take into account _G.useWreg, + * (genCall): don't use wreg for parameter passing when function is + declared as reentrant, too, added optimization INCF to stack + pointer when stack parameter count is 1, + * (genFunction, genEndFunction): refurnished and fixed to not using + wreg for passing parameters when function has varargs or is + reentrant, fixed bug with symbol name compare for generating + functions in absolute address, + * (pic16_storeForReturn): refurnished, + * (genCmp): began writing a new version of the function, not ready + yet, therefore it is disabled, + * (genAssign): do not read code memory when assigning a function to + a pointer function, + * src/pic16/glue.c (pic16emitStaticSeg): abSym->name is defined an + array of characters, not pointer, + * (pic16initialComments): in debug mode emit an .ident directive for + the assembler, + * (_process_pragma): emit a new warning type (internal to pic16) + when setting stack to default length, emit a similar warning when + placing a function at absolute address and address is not word aligned + * (_pic16_parseOptions): added 'return TRUE' statement, + * (_pic16_linkEdit): if compiling a source, then add the source's + file object, first in the list of objects to link, + +2004-10-13 Slade Rich + + * src/pic/pcoderegs.c : increased count on regUsedinRange to prevent unnecessary warning. + * src/pic/main.c : removed VC warning. + * src/pic/gen.c : changed comment. + +2004-10-12 Vangelis Rokas + + * device/lib/pic16/libsdcc/gptr/gptrput[234].c: an external + reference to a deprecated symbol _GPTRREG was causing failure to + link. Thanks G. M. Gallant for the info. + +2004-10-12 Slade Rich + + * src/pic/pcode.c : Applied a code patch supplied by Paul Ashmore in + comments for Bugs item #954788. + +2004-10-10 Vangelis Rokas + + * src/pic16/device.c (pic16_dump_gsection, + * pic16_groupRegistersInSection): handle symbols declared to be in + access bank differently, + * src/pic16/gen.c (struct _G): added field resDirect, + * (aopForSym): if symbol on stack and iCode is '=' and result exists, + send values read from stack directly to result and don't allocate + temporary values, + * (pic16_sameRegs): fixed bug that allowed MOVFF to move between + same registers, + * (pic16_sameRegsOfs): NEW, + * (freeAsmop): if _G.resDirect is set then do not mark registers as + free because they were not allocated from temporary pool, + * pic16_popRegFromString): workaround to fix a problem with + allocating variables twice or never, + * (genGenPointerGet): using PRODL instead of FSR0H, + * (genGenPointerSet): using POSTDEC1 (that is a stack location) + instead of FSR0H, + * (genAssign): take advantage of the _G.resDirect flag, + * (genCast): around line 11844, use mov2f instead of directly + MOVFF'ing between operands to account for literal values, + * src/pic16/genutils.c: some new debug functions for gpsim have been + added, + * src/pic16/glue.c (pic16_printIvalType): fixed bug that initialized + float with integer part only, + * src/pic16/main.c (_process_pragma): handle pragma udata access to + place variables in access bank + * device/lib/pic16/libsdcc/gptr/gptr*.c: using BRA instead of GOTO, + updated sources to reflect recent changes in gen.c + +2004-10-06 Vangelis Rokas + + * device/lib/pic16/libsdcc/Makefile.rules: fixed bug concerning + sources that searched for headers in installation path, now the + device/include/pic16 is used, + * src/pic16/glue.c (pic16glue), + * src/pic16/pcode.c (pCode2str, genericPrint): don't print .file or + .line directives if not in debug mode, this suppresses assembler's + warnings for ignored directives + +2004-10-05 Maarten Brock + + * src/port.h: made reset_regparms prototype void parameter explicit. + * src/SDCCsymt.c (processFuncArgs): removed argument "func". + * src/mcs51/ralloc.c (packRegisters): new fix for bugs 898889 & 979599. + * doc/sdccman.lyx: documented warning disabling and how to use + printf_large to make it print floats. + * device/include/stdbool.h: NEW + * device/lib/_atof.c, + * device/lib/_divuint.c, + * device/lib/_divulong.c, + * device/lib/expf.c, + * device/lib/printf_large.c, + * device/lib/sincosf.c, + * device/lib/sincoshf.c: used stdbool.h, all compile with stack-auto now + * device/lib/Makefile.in: added target for model-mcs51-reentrant to build + a completely reentrant lib. + +2004-10-05 Vangelis Rokas + + * device/lib/pic16/libsdcc/gptr/gptr*.c: added return statements + * device/include/pic16/stdio.h: fixed bug with colon + +2004-10-03 Vangelis Rokas + + * device/include/pic16/stdio.h, + * device/include/pic16/stdlib.h, + * device/include/pic16/math.h: NEW + * device/lib/pic16/libsdcc/gptr/*.c (gptrget*, gptrput*): functions + declared as _naked to reduce overhead + * device/lib/Makefile.in (target port-specific-objects-pic16): + changed * to *.* so to ignore the CVS directory, + * src/pic16/gen.c (pic16_freeAsmop): added code to store result of + stacked variables back in stack, + * (genEndFunction): fixed bug reported by G.M. Gallant with stack + corruption + +2004-10-01 Vangelis Rokas + + * .version: bumped version number to 2.4.5 + * support/Util/SDCCerr.h: added warning W_POSSBUG2. + * support/Util/SDCCerr.c (messages structure): added entry for + W_POSSBUG2 + + Large cumulative patch for pic16 port and libraries. + * device/include/pic16/sdcc-lib.h, + * device/include/pic16/stdarg.h, + * device/include/asm/pic16/features.h, + * device/include/lib/pic16/libsdcc/gptr/{*.c, Makefile}: NEW, + * device/include/pic16/float.h: changes reentrant keyword with + _FS_REENTRANT, added prototype for __fsneq, included sdcc-lib.h + * device/lib/pic16/libsdcc/Makefile: added target directory gptr, + updated target build-libraries to include objects from gptr, + * device/lib/pic16/libsdcc/{char,int,long}/*.c: added macro + _IL_REENTRANT to all function headings, included sdcc-lib.h header, + * device/lib/pic16/libsdcc/float/*.c: added macro _FS_REENTRANT to + all function headings, + * src/SDCCmain.c: added global parameter userIncDirsSet, + * (parseCmdLine): when option -I is encountered add directory to + userIncDirsSet too, + * src/version.awk: added space between control and long, + * src/pic16/NOTES: added some notes for the port, + * src/pic16/gen.c: added prototype for mov2fp function, + * (fReturnpic16[]): properly named return value registers, + * (_G structure): added fields stackRegSet, fregsUsed, stack_lat, + * (aopForSym): added code to handle symbols with onStack flag set, + symbols onStack are allocated PTRSIZE bytes, + * (aopFreeAsmop): handles special case where asmops are stack objects, + * (aopGet, pic16_popGet): adde cod to handle new asmop AOP_STA, + * (pic16_popGetTempReg, pic16_popGetTempRegCond, pic16_popReleaseTempReg): + added argument lock to trace flaws in allocating temporary registers + when developing port, + * (pic16_popGetLit, pic16_popGetLit2): changed lit from unsigned to signed + * (pic16_popRegFromString): reenabled allocating a direct register + from string, + * (assignResultValue): various beautifications, + * fixed bug #1037717 (patch from R. Neider & D. Wrinkler) with mistaken + referenced function argument, + * (genIpush): reenabled to allow stacked arguments, handles only + ic->parmPush iCodes, + * (genCall, genPcall): major changes to allow for variable argument + functions, fixed a bug with falsely restoring stack pointer after + returning from call, + * (genFunction): pending code for critical function, + * (shiftR1Left2ResultSigned, shiftR1Left2Result, shiftL2Left2Result, + * (shiftR2Left2Result, shiftLLong) applied patch #1032155 from R.Neider, + * (genNearPointerGet): fixed bug with indirect reading, was always + reading from INDF0 + * (genGenPointerGet, genGenPointerSet): rewrote to support generic + pointers, + * (genAddrOf): rewrote code to take address of a stacked function parameter + * (genCast): fixed casting to generic pointer type, + * src/pic16/gen.h: added AOP_STA, + * (struct asmop): added field stk, + * src/pic16/genarith.c (pic16_AopType): handle AOP_STA, + * (pic16_genPlusIncr): changed emitSKPNZ to emitSKPNZ, + * (pic16_genAddLit, pic16_genPlus): applied patch #1034042 by tecodev, + * (pic16_genMinus): fixed bug #1035119 with patch submitted by tecodev, + * src/pic16/genutils.c (pic16_genNot): removed symbol *tlbl, + * src/pic16/glue.c (pic16_printGPPointerType): fixed to support new + generic pointers, + * src/pic16/main.c (_pic16_initPaths): ignores default SDCC include + and library paths, + * (pic16_port structure): generic pointer size is set to 3, + * src/pic16/pcode.c (pic16_newpCodeOpLit): correctly print literal integer, + * (insertBankSwitch): cast to (char *) to prevent 64bit CPUs' + compiler warning, + * src/pic16/ralloc.c (allocReg): prevent allocating register when + operand is an iTemp, + +2004-09-24 Martin Helmling + + * debugger/mcs51/cmd.c: set PC if a symbol at pc reg is set + * debugger/mcs51/simi.c: addapt new syntax of s51 + +2004-09-23 Vangelis Rokas + + * src/pic16/genutils.c (pic16_genNot): fixed bug #1032265, + * src/pic16/pcode.c: commented out some calls to free() in order to + fix bug #989576, + +2004-09-23 Erik Petrich + + * src/SDCCicode.h, + * src/SDCCicode.c (isiCodeInFunctionCall), + * src/avr/ralloc.c (selectSpil), + * src/pic/ralloc.c (selectSpil), + * src/pic16/ralloc.c (selectSpil), + * src/ds390/ralloc.c (selectSpil), + * src/hc08/ralloc.c (selectSpil), + * src/xa51/ralloc.c (selectSpil), + * src/mcs51/ralloc.c (selectSpil): Don't use remainSpil to spill to the + stack in the middle of a function call sequence (fixes bug #1020268) + * src/SDCCicode.c (geniCodeJumpTable): fixed error in computing the + costs associated with the minimum switch case. + +2004-09-19 Erik Petrich + + * src/SDCC.lex: fixed bug #1030549 + +2004-09-19 Erik Petrich + + * src/SDCCcse.h (struct cseDef), + * src/SDCCcse.c (cseBBlock, newCseDef, ifFromAddrTaken): purge CSEs + over a function call if the CSE is derived from a symbol whose + address has been taken (fixes bug #1029883) + * support/regression/tests/bug-1029883: a new regression test for + this bug + +2004-09-18 Erik Petrich + + * src/hc08/gen.c (emitinline): fixed bug #1029778 + * src/SDCC.y (assignment_expr): fixed the grammer so that assignment + to a cast object is no longer a syntax error ("fixes" bug #1030006, + and starts toward RFE #905167) + +2004-09-17 Vangelis Rokas + + * src/pic16/gen.c (mov2f): New function to move an operand to + another without considering if it is a literal or a register, + * (pic16_sameRegs): don't check if they are both AOP_REG, + * (AccRsh): removed andmask=0 lines, + * (genLeftShift): duplicated to be improved in future versions, + * src/pic16/main.c (_process_pragma): emit stack default size in hex, + * src/pic16/pcode.c: added POC_INFSNZW, updated inverted_op fields + in POC_INCFSZ, POC_INCFSZW, POC_INFSNZ, + * (pic16initMnemonics): added initialization for POC_INFSNZW, + * (insertBankSwitch): fixed inserting banksel directives algorithm + for instructions that follow a skip instruction, this fixes a report + for broken subtraction code generation, + * src/pic16/ralloc.c (deassignLRs): do not free register if current + iCode is a left op, just in case result and right share the same + registers + +2004-09-16 Erik Petrich + + * src/hc08/main.c, + * src/hc08/gen.c (genJumpTable): more efficient jump table, supports + preservation of HX + * src/hc08/gen.c (pullRegs): fixed order of HX & XA pairs + * src/mcs51/ralloc.c (packRegisters): removed the patch applied + on 2004-09-12; it was buggy + +2004-09-15 Bernhard Held + + * src/SDCCsymt.h: removed RESULT_CHECK + * src/SDCCast.c, + * src/SDCCglue.c, + * src/SDCCval.c, + * src/pic/glue.c, + * src/pic16/glue.c: replaced RESULT_CHECK with RESULT_TYPE_NONE + +2004-09-15 Vangelis Rokas + + * src/SDCCicode.c (piCode): applied patch from Raphael Neider, + * src/pic16/device.c (pic16_assignConfigWordValues): wrong + configuration values no more rejected by compiler, they are assigned + to configuration registers with a warning message instead, + * src/pic16/glue.c (pic16_emitConfigRegs): added +1 at top-limit of + the for-loop so last conf register is emitted too, + * (_pic16_initPaths): link library libsdcc.lib by default, + * (_hasNativeMulFor): modified test for multiplication according to + Raphael Neider's remarks. Integer multiplication is also done with + support functions, + * device/include/pic16/pic18fregs.h: corrected type error in while + testing and including 18f6720 header file + +2004-09-14 Vangelis Rokas + + * src/pic16/device.h (pic16_options): removed field use_crt, + * src/pic16/gen.c (genUnpackBits): added call to pic16_loadFSR0 + until an optimization to handle single bits is added, + * (pic16_loadFSR0): moved before genUnpackBits, + * (genAnd): some white lines removed, + * src/pic16/main.c (_pic16_finaliseOptions): set omit_ivt and clear + leave_reset flags in pic16_options when using crt modules, + +2004-09-12 Maarten Brock + + * src/mcs51/ralloc.c (packRegisters): applied fix by Bernhard Held + for bugs 898889 & 979599. Also used some safer print instructions. + +2004-09-12 Vangelis Rokas + + * src/pic16/device.h (pic16_options_t): added field use_crt, + crt_name, no_crt, + * src/pic16/genarith.c (pic16_genPlus): added an assert(0) line to + catch a probable future bug, + * src/pic16/gen.c: aopIdx function commented out, + * (genAssign): commented out old code which used aopIdx, + * src/pic16/glue.c (pic16glue): removed some legacy fragments of + code, added if conditionals to take into account the --use-crt + command line options, + * src/pic16/main.c (pic16_optionsTable): added new command line + options, --use-crt= and --no-crt, + * (_pic16_linkEdit): now the proper crt object is added in the + linker command line except than when --no-crt is specified, + * src/pic16/pcode.c, + * src/pic16/pcode.h: added some structures and functions for a new + optimization scheme to compansate for instruction overhead between + same iCodes, this scheme is currently under development and is not + working in any way, + * src/pic16/gen.c (genAnd): added patch provided by Aaron Collwell + to && operator, + * device/lib/pic16/startup/crt0i.c, + * device/lib/pic16/startup/crt0iz.c: added global char variable + __uflags to force the generation of an idata section + +2004-09-12 Bernhard Held + + * doc/Makefile, + * doc/clean.mk: added support for easy creation of sdcc-doc.tar.bz2 + * doc/sdccman.lyx: updated sdcc version to 2.4.4 + +2004-09-10 Erik Petrich + + * doc/sdccman.lyx: fixed a problem with my new index entries (thanks + Frieder) and clarified the default code optimization mode + +2004-09-10 Erik Petrich + + * src/SDCC.lex (doPragma, process_pragma), + * src/SDCCglobl.h (struct optimize): added pragmas "opt_code_speed", + "opt_code_size", and "opt_code_balanced" + * src/SDCCmain.c (optionsTable[], printOptions, scanOptionsTable): + regrouped options by category, added support for category headers + * src/SDCCmain.c (parseCmdLine): added options "--opt-code-speed" + and "--opt-code-size" + * doc/sdccman.lyx: documented these new options and pragmas + * src/hc08/gen.c (AccLsh, AccRsh): take speed/size optimization + preference into account + +2004-09-08 Maarten Brock + + * src/SDCCicode.c (geniCodePostInc, geniCodePreInc, geniCodePostDec, + geniCodePreDec): Fixed bug 904237 by generating a warning + * src/SDCCerr.h, + * src/SDCCerr.c: added warning W_SIZEOF_VOID + +2004-09-09 Slade Rich + + * src/pic/device.c : When no max ram set validate full memory range. + * src/pic/pcode.c, + * src/pic/pcodepeep.c : Copy C code comments to optimised replacement code. + +2004-09-08 Maarten Brock + + * device/lib/_gptrget.c, + * device/lib/_gptrput.c: updated comment + * device/lib/calloc.c, + * device/lib/free.c, + * device/lib/malloc.c, + * device/lib/realloc.c: added LGPL, made them reentrant-safe + * src/SDCCcse.c (cseBBlock), + * src/SDCCicode.c (printOperand, geniCodeArray), + * src/SDCCicode.h (struct operand): fixed bug 868103 + * support/regression/tests/bug-868103.c: added + * src/SDCCast.c (searchLitOp), + * src/SDCCcse.h (struct cseDef), + * src/SDCCglue.c (printIvalArray, spacesToUnderscores), + * src/SDCCicode.h (struct operand), + * src/SDCCsymt.h (struct sym_link), + * src/avr/gen.c (hasInc), + * src/ds390/gen.c (hasInc), + * src/hc08/gen.c (genPlusIncr, hasInc), + * src/mcs51/gen.c (hasInc), + * src/pic16/glue.c (pic16_printIvalChar), + * src/pic16/ralloc.c (regWithIdx), + * src/xa51/gen.c (hasInc) : removed warnings + * src/SDCCast.c (createBlock): added comment ??? + * src/hc08/ralloc.c: updated comments + +2004-09-07 Frieder Ferlemann + + * doc/sdccman.lyx: updated section on switch statements, added + section about semaphore locking + * doc/Makefile: added option -info for latex2html + * device/lib/_gptrget.c, + * device/lib/_gptrput.c: __XPAGE instead of P2 in outcommented code + +2004-09-06 Slade Rich + + * src/pic/device.h, + * src/pic/device.c, + * src/pic/port.c : Changed PIC14 code to not set bit RP1 when + maxram is less than 0x100. + +2004-09-06 Slade Rich + + * Bug fixes for PIC14 - signed RSHIFT problem. Patch supplied by Allen(agschrum). + +2004-09-06 Erik Petrich + + * src/port.h, + * src/mcs51/main.c, + * src/ds390/main.c, + * src/z80/main.c, + * src/hc08/main.c, + * src/pic/main.c, + * src/pic16/main.c, + * src/avr/main.c, + * src/xa51/main.c + * src/SDCCicode.c (geniCodeJumpTable): Better logic to determine if a + a jump table is the best form for a switch statement, including + automatic insertion of missing cases to make the case range + continuous. Developed in collaboration with Frieder Ferlemann. + +2004-09-02 Erik Petrich + + * src/hc08/ralloc.c (canDefAccResult): multi-byte shift is unsafe for + accumulator result if it needs sign extension + +2004-09-02 Maarten Brock + + * src/hc08/ralloc.c (canUseAccOperand): fixed comparison bug + +2004-09-02 Maarten Brock + + * device/lib/gbz80/printf.c, + * device/lib/z80/printf.c: removed define for NULL + +2004-09-02 Maarten Brock + + * as/xa51/xa_link.c, + * device/examples/ds390/ow390/ad26.c, + * device/examples/ds390/ow390/cnt1d.c, + * device/examples/ds390/ow390/counter.c, + * device/examples/ds390/ow390/ds2480.h, + * device/examples/ds390/ow390/ds2480ut.c, + * device/examples/ds390/ow390/findtype.c, + * device/examples/ds390/ow390/gethumd.c, + * device/examples/ds390/ow390/owllu.c, + * device/examples/ds390/ow390/ownetu.c, + * device/examples/ds390/ow390/swt12.c, + * device/examples/ds390/ow390/swtloop.c, + * device/examples/ds390/ow390/temp.c, + * device/examples/ds390/ow390/temp10.c, + * device/examples/ds390/ow390/thermo21.c, + * device/examples/ds390/ow390/tinilnk.c, + * device/examples/ds390/ow390/tstfind.c, + * device/examples/serialcomm/windows/serial.cpp, + * device/examples/serialcomm/windows/test_serialcomm.cpp, + * device/include/reg51.h: fixed line endings for cvs + +2004-09-02 Erik Petrich + + * src/hc08/ralloc.c (canDefAccResult, canUseAccOperand, + packRegsForAccUse, packRegisters): new accumulator register + packing algorithm + * support/regression/ports/hc08/support.c (_putchar): suppress + warning of unused variable + * src/SDCCicode.c: added SWAP entry to codeTable + +2004-09-01 Maarten Brock + + * device/lib/sprintf.c: forgot to add this file before previous commit + +2004-09-01 Vangelis Rokas + + * src/pic16/gen.c (genPackBits): added operand right in function + parameters, load result directly if p_type is POINTER (that is + called by genNearPointerSet) + * (genUnPackBits): added operand left in function parameters, + * (genNearPointerGet, genNearPointerSet): prevent the loading of + FSR0 if accessing bitfields, + +2004-08-31 Maarten Brock + + * device/include/stdio.h: added NULL, size_t, typedef pfn_outputchar, + _print_format; updated printf, sprintf, vsprintf + * device/include/asm/default/features.h: corrected comment/define + * device/lib/Makefile.in: added sprintf.c + * device/lib/libsdcc.lib: added sprintf module + * device/lib/printf_large.c, + * device/lib/vprintf.c, + * device/lib/sprintf.c: totally refactored printf_large and vprintf + into these 3 files + * support/regression/Makefile: changed ALL_PORTS into a usefull default + * support/regression/ports/mcs51-stack-auto/spec.mk: added sprintf + * support/regression/tests/bug-927659.c: removed dummy putchar, enabled + hc08 test + * support/regression/tests/zeropad.c: define idata as data for hc08 + +2004-08-31 Erik Petrich + + * src/SDCCpeeph.c (labelIsReturnOnly): support hc08 rts opcode also + * src/SDCCpeeph.c (buildLabelRefCountHash): assume function entry point + labels are referenced at least once (even if a reference is not found) + * src/hc08/gen.c (emitcode): set isComment flag for comments + * src/hc08/peeph.def: added rules 5a..5f (optimize redundant immediate + loads), rules 6a..6b (optimize jumps to return) + +2004-08-30 Erik Petrich + + * device/lib/acosf.c (acosf), + * device/lib/asinf.c (asinf), + * device/lib/atanf.c (atanf), + * device/lib/ceilf.c (ceilf), + * device/lib/cosf.c (cosf), + * device/lib/coshf.c (coshf), + * device/lib/cotf.c (cotf), + * device/lib/fabsf.c (fabsf), + * device/lib/floorf.c (floorf), + * device/lib/log10f.c (log10f), + * device/lib/logf.c (logf), + * device/lib/sinf.c (sinf), + * device/lib/sinhf.c (sinhf), + * device/lib/sqrtf.c (sqrtf), + * device/lib/tanf.c (tanf), + * device/lib/tanhf.c (tanhf), + * device/include/math.h: defined _FLOAT_FUNC_REENTRANT macro and + replaced all instances of "reentrant" in the library functions + defined in math.h with this macro. + * support/regression/tests/float_trans.c: reenabled test for hc08 + +2004-08-30 Bernhard Held + + * device/lib/pic16/Makefile.common.in: added MODELFLAGS again, it was + erroneously deleted + +2004-08-30 Erik Petrich + + * src/hc08/gen.c (loadRegFromAop): better use of clra & clrx + * src/hc08/gen.c (genAnd, genOr): fixed bug with conditional when + multi-byte volatile operands are used + * src/hc08/gen.c (shiftRLong): fixed bug with wrong rotate direction + * src/hc08/main.c (_hc08_genAssemblerPreamble): moved the built-in + initialization to area GSINIT0 so that it would always precede + any static initializers in GSINIT + * support/regression/tests/zeropad.c: fixed idata define for hc08 + * support/regression/tests/bug-927659.c, + * support/regression/tests/float_trans.c: disabled tests for hc08 + pending missing library routines + * .version: increased version number to 2.4.4 - hc08 port now passes + regression tests + + +2004-08-29 Bernhard Held + + * device/lib/pic16/Makefile.common.in: added $(MM) to fix `make clean` + * Makefile.common.in, + * as/Makefile, + * as/hc08/Makefile.in, + * as/mcs51/Makefile.in, + * as/z80/Makefile.in, + * debugger/mcs51/Makefile.in, + * device/include/Makefile.in, + * device/lib/Makefile.in, + * doc/Makefile, + * link/Makefile, + * link/z80/Makefile.in, + * packihx/Makefile.in, + * sim/ucsim/main_in.mk, + * sim/ucsim/avr.src/Makefile.in, + * sim/ucsim/doc/Makefile.in, + * sim/ucsim/gui.src/serio.src/Makefile.in, + * sim/ucsim/hc08.src/Makefile.in, + * sim/ucsim/s51.src/Makefile.in, + * sim/ucsim/xa.src/Makefile.in, + * sim/ucsim/z80.src/Makefile.in, + * src/Makefile.in, + * support/cpp2/Makefile.in, + * support/librarian/Makefile, + * support/makebin/Makefile: added DESTDIR to the install path proposed + by "Maciej 'Agaran' Pijanka" + * doc/sdccman.lyx: added DESTDIR documentation + +2004-08-29 Vangelis Rokas (vrokas AT otenet.gr> + + * src/pic16/gen.c (genFunction, genEndFunction): fixed return + instruction for interrupt handlers, use fast returns when returning + from high priority interrupts + +2004-08-29 Erik Petrich + + * src/hc08/gen.c (genAnd, genOr, transferAopAop, rmwWithAop): optimized + code generation + * src/hc08/gen.c (genrshFour, genCpl): fixed bugs + * src/hc08/gen.c (genMultOneByte, genDivOneByte, genModOneByte): fixed + bugs, ported much of Bernhard's code from mcs51 + * src/mcs51/gen.c (genSend), + * src/hc08/gen.c (genSend): fixed bug with lost SEND iCodes if more + than one when calling a reentrant function + * device/lib/_mullong.c: defined an alternate struct layout for big + endian ports (hc08) + +2004-08-28 Erik Petrich + + * src/hc08/gen.c (shiftL2Left2Result): fix for bug-500536 regression + test + +2004-08-28 Erik Petrich + + * src/SDCCsymt.c (processFuncArgs): make sure parameter types + are sane and complete before asking the port its prefered parameter + passing method (fixes bug #1017633) + * device/lib/hc08/_ret.c: added "data" storage class to _ret2 + and _ret3 + +2004-08-27 Erik Petrich + + * src/hc08/gen.c (genPackBitsImmed, genUnpackBitsImmed): fix offset + problem in bitfields >= 8 bits. + +2004-08-27 Maarten Brock + + * src/SDCCsymt.c: undid changes that were not meant to be committed + +2004-08-27 Maarten Brock + + * support/regression/ports/hc08spec.mk: REENTRANT must be reentrant + +2004-08-27 Maarten Brock + + * src/hc08/gen.c (genUminusFloat): fixed bug where only 3 bytes were + copied and wrong bit got inverted + +2004-08-27 Erik Petrich + + * src/hc08/gen.c (genPointerSet, genFarPointerSet): moved code from + genFarPointerSet into genPointerSet; eliminated genFarPointerSet + * src/hc08/gen.c (genPointerGet, genFarPointerGet): moved code from + genFarPointerGet into genPointerGet; eliminated genFarPointerGet + * src/hc08/gen.c (genPackBitsImmed): generate optimized code for + assignments to bitfields at known addresses + * src/hc08/gen.c (genUnpackBitsImmed): generate optimized code for + reads from bitfields at known addresses + * src/hc08/ralloc.c (packRegisters), + * src/hc08/gen.c (genPointerGet, genUnpackBits, genUnpackBitsImmed, + genhc08Code): optimize pointer get values used as conditionals + * src/hc08/peeph.def: added rules 2e & 2f to optimize bit test + and branch + +2004-08-24 Erik Petrich + + * src/mcs51/gen.c (genPointerGet, genNearPointerGet, genPagedPointerGet, + genFarPointerGet, genCodePointerGet, genGenPointerGet, genUnpackBits), + * src/mcs51/ralloc.c (packRegisters): optimize pointer get values used + as conditionals + +2004-08-22 Frieder Ferlemann + + * src/mcs51/peeph.def: peepholes 248.i-m for xdata bitfields + +2004-08-21 Erik Petrich + + * src/mcs51/ralloc.c (packRegsForOneuse): fixed bug #1012650 and some + related problems + +2004-08-21 Bernhard Held + + * sim/ucsim/cmd.src/Makefile.in: run lex only if $(PRJDIR)/devel exists + +2004-08-18 Erik Petrich + + * src/z80/ralloc.c (packRegsForAssign): ported some bug fixes from the + mcs51 port + +2004-08-16 Slade Rich + + * src/pic/gen.c: Restored fn genRet as previous fix was incorrect. + +2004-08-14 Frieder Ferlemann + + * src/mcs51/gen.c (genJumpTab): jumptables for more than 16 switch + cases use more compact code. + +2004-08-13 Slade Rich + + * src/pic/gen.c: Fixed problem with fn returning a variable bigger than a char. + +2004-08-12 Erik Petrich + + * src/SDCClrange.c (findPrevUse): fixed bug #1007371 + +2004-08-12 Erik Petrich + + * src/SDCCsymt.h, + * src/SDCCsymt.c (changePointer, checkDecl, addSymChain): changed + parameter of changePointer() from symbol* to sym_link* + * src/SDCCast.c (decorateType): call changePointer() for CAST op + * src/SDCCsymt.c (compareType): void* type is castable to other + pointers, but not necesarily an exact match. + * src/SDCCicode.c (geniCodeCast): allow void* casting here since it + is no longer blindly treated as an exact match. + * src/SDCCval.c (valCastLiteral): treat missing type as cast to void + +2004-08-12 Slade Rich + + * src/pic/glue.c: Added struct initialisation fn printIvalStruct. + +2004-08-11 Slade Rich + + * src/pic/gen.c, + * src/pic/pcode.c, + * src/pic/ralloc.h, + * src/pic/ralloc.c: Printing rIdx on internal verbose debug. + +2004-08-10 Slade Rich + + * src/pic/device.c, + * src/pic/device.h, + * src/pic/device.c: Will no longer exit if #pragma maxram has not been defined. + +2004-08-06 Erik Petrich + + * src/mcs51/gen.c (emitcode): fixed bug #992819 + +2004-08-05 Maarten Brock + + * src/pic/ralloc.c (deassignLR): allthough pic port is buggy already, + there's no need to make it worse + +2004-08-05 Erik Petrich + + * src/mcs51/ralloc.c (deassignLR), + * src/ds390/ralloc.c (deassignLR), + * src/hc08/ralloc.c (deassignLR), + * src/z80/ralloc.c (deassignLR), + * src/pic/ralloc.c (deassignLR), + * src/pic16/ralloc.c (deassignLR), + * src/avr/ralloc.c (deassignLR), + * src/SDCClrange.c (findRecursiveSucc, findRecursivePred, findPrevUse, + rlivePoint): fixed another part of bug #971834 + +2004-08-04 Erik Petrich + + * src/z80/main.c: enabled "critical" keyword + * src/z80/mappings.i, + * src/z80/gen.c (genFunction, genEndFunction): support for interrupt + functions (fixes bug #979646) + * doc/sdccman.lyx: added a subsection explaining z80 interrupt support + +2004-08-04 Jesus Calvino-Fraga + + * src/mcs51/gen.c (genInline): Add \n for labels, not DOS/WIN dirs + such as c:\mydir. + +2004-08-03 Maarten Brock + + * src/SDCCloop.c (loopInvariants): fixed bug 983545, hope this + doesn't disable too much optimizations + +2004-08-02 Slade Rich + + * src/pic/glue.c Disabled "WARNING: function 'main' undefined" when -S option is used. + +2004-08-02 Maarten Brock + + * src/SDCClrange.c (rlivePoint): fixed bug 988568, thanks to anonymous + +2004-08-02 Slade Rich + + * src/pic/gen.c tidied up tabs + * src/pic/genarith.c tidied up tabs and fixed bug with literal multiple where same register was used for hi and low byte + * src/pic/main.c tidied up tabs + * src/pic/pcode.c tidied up tabs and disabled verbose code generation + * src/pic/pcoderegs.c tidied up tabs + * src/pic/ralloc.c tidied up tabs + +2004-07-30 Vangelis Rokas + + * src/SDCCmem.c (allocGlobal): don't turn S_REGISTER storage class + to S_FIXED for pic16 port and when symbol is not in level 0, + allocate for S_REGISTER storage class and pic16 port, too, + * src/pic16/device.h: prototype for checkSym, + * src/pic16/device.c (pic16_dump_access, checkSym): NEW, + * (pic16_assignConfigWordValue): test the value and the mask to + validate that the value is suitable for the configuration word, + * src/pic16/glue.c (pic16_printIvalFuncPtr): use 'externs' to + collect extern declared symbols, don't emit symbol twice, check + first if symbol is in publics set first, + * src/pic16/main.c (_pic16_keywords[]): added keyword 'register', + * added command line '--fstack' which enables an experimental + feature for stack access, too buggy to be used yet... + * src/pic16/ralloc.c (pic16_accessregWithName): NEW, + * (pic16_allocDirReg): when register has storage class S_REGISTER + allocate in pic16_dynAccessRegs, + * device/include/pic16/pic18f????.h: modified configuration word + naming convention, words started as CONFIG0H but should be CONFIG1H + +2004-07-29 Maarten Brock + + * device/include/mcs51reg.h: fixed bug 970993 + +2004-07-27 Maarten Brock + + * added lib/calloc.c, lib/free.c, lib/realloc.c, include/stddef.h + * updated lib/malloc.c, lib/libsdcc.lib, lib/Makefile.in, include/malloc.h + * src/SDCC.lex (doPragma): added pragma disable_warning + * src/SDCCmain.c (parseCmdLine): added option --disable-warning + * src/ds390/gen.c (genPlusIncr): fixed bug when incrementing generic pointers + * support/Util/SDCCerr.c (vwerror): suppress disabled warnings and output + error/warning numbers, + added function setWarningDisabled() + * support/Util/SDCCerr.h: added setWarningDisabled() and MAX_ERROR_WARNING + * support/regression/ports/mcs51-stack-auto/spec.mk: added dependencies + _memcmp.c _memmove.c calloc.c realloc.c free.c + * support/regression/tests/malloc.c: added tests for new functionality + * support/regression/tests/zeropad.c: added tests for truncated initializers + and initialized char arrays starting with '\x0' + * src/mcs51/peeph.def: fixed regression, added peephole 177.f + +2004-07-26 Bernhard Held + + * support/valdiag/tests/overflow.c: fixed warning on (1 >> 40) + +2004-07-26 Frieder Ferlemann + + * doc/sdccman.lyx: updated example in section "Absolute Addressing" + * src/mcs51/peeph.def: added contributed fix for "bug" #995347 as + peephole 177.e. Thanks to anonymous + +2004-07-25 Vangelis Rokas + + * src/pic16/glue.c (pic16_printIvalFuncPtr): when an extern + function isn't used in the source but referenced as a + variable initializer then declare it as extern in .asm file + +2004-07-24 Vangelis Rokas + + * .version: increased version number to 2.4.3 + + Adding version extension according to ChangeLog CVS revision + * src/Makefile.in (target all): added dependency 'version.h' + * (rule version.h): added rule to create version.h from ChangeLog, + * (rule dep): added dependency version.h, + * src/version.awk: AWK script to create version.h + * src/SDCCdwarf2.c (dwWriteModule), + * src/SDCCglue.c (initialComments), + * src/SDCCmain.c (printVersionInfo): modified to write after + version string the version extension number, + * src/SDCCutil.c: included "version.h" + * (getBuildNumber): NEW, returns SDCC's ChangeLog minor revision + number, + * src/SDCCutil.h: added prototype for getBuildNumber + + * src/SDCCmain.c (parseCmdLine): when sOpt is 'I' add rest in + includeDirsSet, too, + * src/SDCCsymt.c (checkSClass): don't emit error when a variable, + const char [] is found in function prototype... + + * src/pic16/genarith.c (pic16_genUMult8XLit_8): optimization to omit + moving to WREG with source is already in WREG, + * src/pic16/gen.h: added AOP_FSR0 and AOP_FSR2 in enum, + * src/pic16/gen.c (getFreePtr): updated to look for FSR0 and FSR2, + * (aopForSym): stack'ed symbols are partially supported, added + if-clause to support symbols in FARSPACE, + * (sameRegs): added test for AOP_ACC to see if registers are same, + * (pic16_freeAsmop): added case for AOP_FSR0 and AOP_FSR2, + * (pic16_aopGet): added case for AOP_FSR0 and AOP_FSR2, + * (pic16_popRegFromString): will not allocate a new register if it + doesn't find one by name, bug may have introduced... + * (pic16_popGet): added case for AOP_FSR0 and AOP_FSR2, + * (genIpush): revived to use pic16 port's stack, + * (genAddrOf): added incomplete case for stack'ed operand, + * (genCast): optimized a pair of MOVFW,MOVWF to MOVFF + * src/pic16/genutils.c (pic16_genNot): almot new vesrion for NOT, + can handle multibyte operands, + * src/pic16/glue.c (pic16_printIval*): some debug info added, + * (pic16initialComments): added message for MPLAB compatibility + mode enabled, + * src/pic16/main.h: prototype for pic16_mplab_comp, + * src/pic16/main.c (pic16_optionsTable): new option --mplab-comp, + which enabled MPLAB compatibility mode (i.e. no #LINE/#FILE, BANKED) + * (_pic16_linkEdit): NEW, handles link stage, transferred here + because of increased complexity of procedure, + * (_process_pragma): stack pragma changed to format 'stack pos len', + emit symbol '_stack_end' to conform with gplink, + * src/pic16/pcode.c (pic16_newpCodeOpBit): using pic16_regWithName + to search for register, + * (pic16_get_op, pic16_get_op2): added case for PO_W, PO_WREG and + PO_GPR_REGISTER, + * (pic16_pCode2str): when in MPLAB compatibility mode, comment out + #LINE directives and replace 'B' with 'BANKED' in instruction opcodes + * (pic16_getRegFromInstruction, pic16_getRegFromInstruction2): added + case for PO_GPR_REGISTER, + * (pic16_AnalyzeBanking): removed the old message for inc2h.pl, past + dies, the new era is ahead !... + * src/pic16/ralloc.c: added hash reposits pic16_dynAllocRegNames and + pic16_dynInternalRegs, + * (pic16_allocregWithName, pic16_procregWithName, pic16_regWithname): NEW, + * (pic16_allocDirReg): minor optimizations and bug fixes, + * (pic16_allocWithIdx): when searching pic16_dynProcessorRegs use fixed, + + * device/lib/pic16/startup/crt0*.c: extern definition of stack_end, + load stack and frame pointer with address of 'stack_end' symbol + +2004-07-23 Vangelis Rokas + + * src/pic16/glue.c (pic16emitStaticSeg): fixed bug with files + without source code but only variable initializers + +2004-07-20 Vangelis Rokas + + * src/pic16/glue.c (pic16emitRegularMap): unused functions marked as + external are not declared as extern to reduce overhead while linking + +2004-07-20 Maarten Brock + + * src/SDCCast.c (decorateType): removed buggy fix for bug #979599 + +2004-07-11 Maarten Brock + + * src/SDCCglue.c (printIvalArray): fixed bug #984229, thanks to Phuah + Yee Keat for the patch + * src/SDCCast.c (decorateType): fixed bug #979599 + * src/ds390/gen.h: removed local fReturnSizeDS390 + * src/ds390/gen.c: made fReturnSizeDS390 signed short to remove a warning + * src/ds390/gen.c (genAnd, genOr, genXor), + * src/mcs51/gen.c (genAnd, genOr, genXor): generate better optimized code + +2004-07-04 Vangelis Rokas + + * src/SDCCmain.c (linkEdit): modifications only for pic16 port, + add relFilesSet to $3, manipulate $2 to handle linking of object + files without source files in command line, + * device/include/pic16 (all headers): added ID location macros, + * src/pic16/device.c (struct PIC16_device Pics16[]): added field + entries for ID location bytes, + * (pic16_assignIdByteValue): NEW, + * src/pic16/device.h: new structures idRegInfo_t and idBytesInfo_t, + added field dumpcalltree to pic16_options_t, + * src/pic16/gen.c (genCmp): fixed bug case so a temporary register + is used instead of pic16_Gstack_base_addr, check if (ifx) before + emitting rFalseIfx label after check_carry label, + * src/pic16/glue.c (PIC16_IS_IDLOC_ADDRESS, PIC16_IS_HWREG_ADDRESS, + pic16_emitDIRegs), NEW + * (pic16glue): dump .calltree file when option --calltree found, + * src/pic16/main.c (OPTION _pic16_optionsTable): new option --calltree + * (_pic16_genAssemblerPreamble): emit ID locations after + configuration registers, + * (pic16_linkCmd): modifications of the link command, + * src/pic16/pcode.c (pic16_pciMOVFF): PCC_REGISTER replaces PCC_REGISTER2 + * (pic16_pCodeInitRegisters): don't init stack registers, + * (pic16_findPrevInstruction): fixed bug, + * (pic16_getRegFromInstruction, pic16_getRegFromInstruction2): fixed + bug with immediate registers, + * (buildCallTree): traces stack push and pop, + * (pct2): dump also stack usage for each function, + * src/pic16/ralloc.c (dynrIdx): registers names start from 0x00 + * (pic16_allocDirReg): various modifications, + * (pic16_typeRegWithIdx): when searching pic16_dynProcessorRegs set + fixed to 1, + +2004-07-02 Vangelis Rokas + + * src/pic16/pcode.c: removed buggy double colon + +2004-07-01 Borut Razem + + * support/scripts/sdcc.nsi: added include/pic16 to setup + +2004-06-30 Vangelis Rokas + + * device/lib/Makefile.in: fixed bug in target objects-pic16, + * device/lib/pic16/Makefile: prefixed with dash (-) command under + target 'clean', + * doc/sdccman.lyx: changed version to 2.4.2 and added some port + specific command line arguments. Also added sample lkr script + for placing a variable at a specific memory bank. + * src/pic16/device.c (pic16_dump_gsection): NEW, to dump variables + at a specific memory bank, + * (pic16_dump_isection): fixed bug which caused string literals to + be omitted when dumping idata section, + * (pic16_groupRegistersInSection): added code to handle registers + in specific memory banks, + * src/pic16/gen.c: labelOffset is prefixed with pic16_ and made + public, all references are renamed too, + * (pic16_aopGet): removed switch cases for AOP_R0,AOP_R1,AOP_DPTR, + AOP_DPTR2, + * (pic16_storeForReturn): added case to handle when dest is WREG, + * src/pic16/genarith.c (pic16_pCodeOpSubType): NEW, + * src/pic16/glue.c (pic16emitRegularMap): when adding a register in + pic16_rel_udata, check to see if that register is marked as being + a member of a specific memory bank, + * (pic16_printIvalCharPtr): added code to add string literals either + to code or the idata sections, + * src/pic16/main.c (_process_pragma): added \n to WHITE constant, + also accept the 'udata' pragma, + * src/pic16/main.h: new structure types sectName and sectSym + * src/pic16/pcode.c: added new pCodeInstruction entry for BANKSEL + * (newpCodeOpBit): added PIC_OPTYPE subt in function prototype, + * (pic16_findPrevInstruction): fixed, it returned nothing, + * (insertBankSwitch): fixed to emit banksel/skip and skip/banksel + instruction combinations, + * (pic16_FixRegisterBanking): heavily reorganised, + * (pic16_AnalyzeBanking): if generating banksel directives is + disabled, then don't call FixRegisterBanking at all, + * src/pic16/ralloc.c (bitEQUs, aliasEQUs, allDefsOutOfRange): + completely removed, + * (pic16_writeUsedRegisters): added call to pic16_dump_gsection + +2004-06-29 Bernhard Held + + * src/SDCCglue.c (printChar): fixed bug #973350, patch provided by + Phuah Yee Keat + +2004-06-28 Vangelis Rokas + + * src/pic16/glue.c (pic16createInterruptVect): function now emits + correctly the IVT even if it is relocated to some other location + +2004-06-28 Vangelis Rokas + + * device/include/pic16/pic18fregs.h: added case for pic18f2220.h + * device/include/pic16/pic18f2220.h: NEW, + * device/lib/pic16/libdev/pic18f2220.c: NEW, + * device/lib/pic16/libdev/Makefile: added 18f2220 in DEVS, + * src/pic16/device.c (struct Pics16): added info for 18f2220, + * src/pic16/device.h (struct pic16_options): added ivt_loc and + nodefaultlibs, ivt_loc is the location of the interrupt vector + table, and nodefaultlibs signs that default libraries should not be + linked in link stage, + * src/pic16/gen.c (genFunction): relocate interrupt vector functions + according to --ivt-loc argument, + * src/pic16/main.c (_process_pragma): emit '_stack' as public symbol + when pragma stack is found, + +2004-06-25 Frieder Ferlemann + + * src/mcs51/peeph.def: added peepholes 182.d (return 0.0), + 256 (range check), 257 (do while), 258.a-f (bit banging + f.e. on 3-wire SPI bus) + +2004-06-21 Erik Petrich + + * src/SDCClrange.c (findNextUseSym): fixed a live range bug with + variables used exclusively within a loop + +2004-06-21 Bernhard Held + + * src/mcs51/gen.c (genCpl): quick fix for bug #974835 + +2004-06-21 Erik Petrich + + * src/SDCClrange.c (computeClash): fixed bug #971834 + +2004-06-20 Erik Petrich + + * src/mcs51/gen.c (genCmp): fixed bug #975903 + * src/hc08/gen.c (operandsEqu), + * src/ds390/gen.c (operandsEqu), + * src/z80/gen.c (operandsEqu), + * src/pic/gen.c (operandsEqu), + * src/pic16/gen.c (operandsEqu), + * src/mcs51/gen.c (operandsEqu): fixed bug #976283 + * src/SDCCmain.c (parseCmdLine): report --unknown-option only once + +2004-06-15 Erik Petrich + + * src/SDCCcse.c (cseBBlock): fixed bug #966963 + +2004-06-12 Vangelis Rokas + + * src/pic16/gen.c (genPointerGet): added E_INTERNAL_ERROR for + default case in switch statement, + * glue.c (pic16_initPointer): expr is initialised via decoarteType + to eliminate problem with initialisation of pointers, but problem + still exists, + * (pic16_pointerTypeToGPByte): removed, no needed for pic16, + * (emitStaticSegment): removed various lines emitting debug info, + * src/pic16/pcode.c, src/pic16/pcode.h, src/pic16/ralloc.h: + added processor registers for utilizing EEPROM, + * src/pic16/pcode.c (pic16_emitDB): number of DBs emitted is not + configurable and set 8 + +2004-06-08 Vangelis Rokas + + * .version: increased version number to 2.4.2, + + Cumulative patch for pic16 port + * src/pic16/device.c: changed scheme to dump initial values for + variables in idata segment, all print_idata* functions were removed, + now the pic16_printIval* will be called, + * src/pic16/glue.c: (pic16_initPointer, pic16_pointerTypeToGPByte, + * _pic16_printPointerType, pic16_printPointerType, + * pic16_printGPointerType, pic16_printIvalArray, pic16_printIvalStruct, + * pic16_printIvalBitFields, pic16_printIvalFuncPtr, pic16_printIvalPtr: + NEW, similar to the respective functions in SDCCglue.c, + * src/pic16/pcode.c (pic16_emitDB, pic16_flushDB): reverted to old + way, emitting hex bytes, + * (pic16_emitDS): NEW, emits a string for pointer initialisation, + +2004-06-08 Erik Petrich + + * src/avr/ralloc.c (serialRegAssign), + * src/xa51/ralloc.c (serialRegAssign), + * src/pic/ralloc.c (serialRegAssign), + * src/pic16/ralloc.c (serialRegAssign), + * src/hc08/ralloc.c (serialRegAssign), + * src/z80/ralloc.c (serialRegAssign), + * src/ds390/ralloc.c (serialRegAssign), + * src/mcs51/ralloc.c (serialRegAssign): fixed bug #964479 + +2004-06-08 Erik Petrich + + * src/SDCCicode.c (geniCodeJumpTable): fixed bug #967601 + * src/SDCCpeeph.c (labelIsReturnOnly): fixed bug #966505 + +2004-06-07 Vangelis Rokas + + Cumulative patch for pic16 port: + * src/pic16/device.h (typedef PIC16_device) modified fields for + defining microcontrollers, + * src/pic16/device.c: added new info for all devices in Pics16 array, + * src/pic16/gen.c (genPcall): fixed bug that caused the return label + to be optimised out by the pCode optimiser, + * src/pic16/glue.c (pic16emitRegularMap): treat implicit aggragates + specially, bug reported by G.M. Gallant, + * src/pic16/pcode.c (pic16_newpCodeLabelFORCE): NEW, marks a label + as force'd so that cannot be optimised out by pCode optimiser, + * src/pic16/pcode.c, + * src/pic16/pcodepeeph.c, + * src/pic16/pcoderegs.c: many modifications to re-enable peepholes, + they are disabled by default, but can be enabled explicit with + command argument --denable-peeps, for testing, + * device/lib/pic16/startup/Makefile: added --no-peep,--pomit-config-words, + --pomit-ivt in COMPILE_FLAGS + +2004-06-06 Maarten Brock + + * src/pic16/pcode.c (pic16_emitDB): removed double semicolon which fails + compilation on MSVC + +2004-06-06 Maarten Brock + + * device/include/sab80515.h: added sfr P6, changed GPL to LGPL + +2004-06-06 Frieder Ferlemann + + device/include/sab80515.h: fixed bug #967492, DAPR is defined at adress + 0xd8, but the correct adress is 0xda. Thanks to anonymous for reporting + +2004-06-06 Vangelis Rokas + + * src/pic16/device.c (pic16_assignConfigWord): fixed bug that + would only assign 0x300001 register. + +2004-06-05 Vangelis Rokas + + * device/lib/pic16/startup/Makefile: added $(MODELFLAGS) + in COMPILE_FLAGS. Thanks to G. Gallant for report. + +2004-06-05 Frieder Ferlemann + + * doc/sdccman.lyx: minor changes, mentioned beta vendor support + for ds80c400 + * src/mcs51/peeph.def: ran unexpand -a over peeph.def + * src/mcs51/peeph.def: removed obsolete peephole 100.a, + added peephole 254 (left shift), 255 (jump table) + +2004-06-04 Vangelis Rokas + + * device/lib/Makefile.in: removed comment line with model-pic16, + * (target port-specific-objects-pic16): the libraries and objects + are copied to the build directory form the device/lib/pic16/bin + directory + + Cumulative patch concerning pic16 port: + * library directory has been re-organized, + * added support for PIC18F1220, + * added headers and library sources for chips 18f1220,18f6520, + 18f6620,18f6680,18f6720,18f8520,18f8620,18f8680,18f8720 + + * configuration registers setting has changed, now each supported + device has a complete description of the registers it uses, + * all initialisations are moved to idata sections, these section + can be absolute or relocatable, + * fixed initialisation of codespace variables, + * fixed warning about PCLATU and gpsim, + * src/pic16/gen.c (genCmp): now can handle partially iCodes with no ifx, + * (genAssign): use table reads when assigning from variables in codespace, + * src/pic16/glue.c (pic16emitStaticSeg): fixed to correctly initialise + char/int variables placed in codespace, + * (pic16_emitConfigRegs): NEW, emits a list with configuration + registers set in .asm file, no need for --pomit-config-words anymore, + * (pic16glue): some 8051 legacy segments are commented out + (to be removed completely), + * added support for alternative assembler and linker with --asm= + and --link= command line arguments, + * peepholes are disabled automatically in the port, no need to + specify on command line, + * port supports natively char/int/long multiplication, but converts + all divisions to support functions, + * main.c: pic16_linkCmd and pic16_asmCmd changed to force output + to the file set in variable $2, + * pcode.c (pic16_emitDB, pic16_flushDB): modified to print printable + strings in ASCII format and not in hex, + * ralloc.c (serialRegAssign): added a triplet of conditional calls + to pic16_allocDirReg for IC_RESULT, IC_LEFT and IC_RIGHT so to + allocate proper register if iCodes aren't temporary, + +2004-06-02 Maarten Brock + + * support/regression/tests/zeropad.c: added TEST_G macro for alpha + +2004-06-02 Vangelis Rokas + + * src/pic16/gen.c (genPcall): warning about gpsim and PCLATU + is commented out + +2004-06-01 Erik Petrich + + * src/hc08/gen.c (genPointerGetSetOfs): disabled optimization if + computed address is reused + * src/hc08/gen.c (genPackBits): fixed offsets in assignments to + multi-byte bitfields + +2004-06-01 Maarten Brock + + * src/z80/gen.c: (genArrayInit): must check for pointers too + +2004-06-01 Maarten Brock + + * support/regression/tests/zeropad.c: never meant to commit the + nestedstruct test: removed, added check for GCC version + +2004-05-31 Maarten Brock + + * src/SDCCast.c (createIvalArray): fixed bug 770487 SIGSEGV + * src/SDCCglue.c (emitRegularMap): fixed bug 770484 allocation problem + * src/SDCCglue.c (initPointer, printIvalType, printIvalStruct, + printIvalArray, printIvalFuncPtr, printIvalPtr, printIval): fixed + bugs 928906 and 954082 half-empty initializers + * src/SDCCsymt.h, + * src/SDCCsymt.c (getAllocSize): added for above fix + * src/z80/gen.c (genArrayInit): fixed bug 741044 + * support/regression/tests/zeropad.c: added tests + +2004-05-30 Vangelis Rokas + + * src/pic16/device.c (pic16_dump_section): corrected bug which + caused some symbols of the libraries to be misplaced + +2004-05-28 Vangelis Rokas + + * src/pic16/glue.c, + * src/pic16/ralloc.h, + * src/pic16/ralloc.cc: prefixed IS_CONFIG_ADDRESS with PIC16_ + to fix conflict with pic port + +2004-05-28 Vangelis Rokas + + * src/pic16/glue.c (pic16emitStaticSeg): do not print as publics or + externs configuration variables, + * src/pic16/ralloc.h, + * src/pic16/ralloc.cc: IS_CONFIG_ADDRESS is made public and added + prototype in header, commented out some debug messages + +2004-05-26 Vangelis Rokas + + * src/pic16/glue.c, + * src/pic16/main.c, + * src/pic16/pcode.c: added gpasm directives #FILE/#LINE + for gpasm COFF object generation. Thanks to D. Hawkins for + his patch info + +2004-05-25 Erik Petrich + + * src/ds390/main.c, + * src/mcs51/main.c: fixed sort order of mnemonics (thanks to Maarten + Brock for spotting this) + * src/ds390/gen.c (genEndFunction), + * src/mcs51/gen.c (genEndFunction): always save psw if function is an + interrupt handler and critical. Disable push/pop optimizations when + peephole optimizations disabled. + +2004-05-25 Vangelis Rokas + + Updated pic16 library sources and headers. + * device/lib/pic16/pic18f*/ , + * device/include/pic16/*.h: modified to handle structured SFR + definitions + +2004-05-25 Vangelis Rokas + + * src/port.h (PORT structure): added hook initPaths, now each + port can declare its own default search paths, + which can been seen with the --print-search-dirs option, + see pic16 port for example, + * src/SDCCmain.c (setBinPaths, setIncludePaths, setLibPath, + setDataPaths): test to options.printSearchDirs is ifdef'ed out, + * (doPrintSearchDirs): NEW, replaces in a central manner the + printing of search dirs which was split in set*Paths functions, + * (main): added call to port->initPaths and doPrintSearchDirs, + * src/avr/main.c, + * src/ds390/main.c, + * src/hc08/main.c, + * src/izt/i186.c, + * src/izt/tlcs900h.c, + * src/mcs51/main.c, + * src/pic/main.c, + * src/pic16/main.c: modified port structures to reflect addition of + initPaths hook, + + * src/pic16/device.c (regCompare): registers are finally sorted by name, + * (pic16_dump_section): for registers in same address reserve memory once, + * src/pic16/device.h (struct PIC16_device): changed variable gen_banksel + to no_banksel, + * src/pic16/genarith.c (pic16_genPlus): added code to handle cases where + result is greater in size than right or left, + * (pic16_genUMult8X8_8): there are some cases where the result can + be 16 bits size, so handle these, + * src/pic16/gen.c: changed some pic16_emitpcomment to DEBUGpic16_emitcode, + * (pic16_outBitC): modified to emit pcodes, + * (pic16_storeForReturn): using is_LitOp to see if operand is literal + or not, + * (genDivOneByte): implemented algorithm to divide 8-bits, + * (genCmp): uncommented goto, but issues still exist, + * (genAnd): fixed a bug with variables >8bits, + * (genPackBits): optimization added that uses BCF/BSF to change a + single bit, + * (genAssign): fixed bug when assigning floating point literals, + * src/pic16/glue.c (pic16glue): added assembler directive 'code' before + __sdcc_gsinit_startup label, + * src/pic16/main.c (_pic16_init): removed search directory + initialisations, + * (_pic16_initPaths): NEW, used to initialise search directories, + * (_hasNativeMulFor): support functions for all except char/int + multiplication, and char division, + * (PIC16_port struct): modified entry for native mul support, + * src/pic16/pcode.c (insertBankSwitch): modified to support the renamed + no_banksel option, + * (buildCallTree): call to register_usage is ifdef'ed out, + +2004-05-22 Erik Petrich + + * device/include/string.h: applied Stas Sergeev's patch to make this + header file compatible with the preprocessor -Wundef option + * src/SDCCmain.c (main): abort compilation if preprocessor reports + failure (fixes bug #941458) + +2004-05-21 Erik Petrich + + * src/SDCCopt.c (killDeadCode): fixed bug #907733 + * support/Util/SDCCerr.c: reworded E_AUTO_ASSUMED diagnostic to clarify + that the variable, not the function, should be static + * src/SDCCval.c (valCastLiteral): fixed bit initialization from literal + to be consistent with non-literal case + +2004-05-19 Erik Petrich + + * src/SDCCast.c (isConformingBody): fixed bug #949967 + * src/SDCCopt.c (cnvToFcall, cnvToFloatCast, cnvFromFloatCast, + convilong): fixed bug #952086 + +2004-05-18 Erik Petrich + + * src/SDCCmem.c (allocVariables): fixed bug #955321 + +2004-05-18 Erik Petrich + + * src/hc08/main.c (_hc08_genAssemblerEnd), + * src/SDCCdwarf2.c (dwOpenFile, dwCloseFile, dwWriteFunction, + dwWriteModule, dwWriteCLine, dwWriteALine, dwarf2FinalizeFile): + completely eliminated the use of a temporary file + * src/SDCCdwarf2.c (dwWriteAttr): fixed bug with location list offset + when more than one file linked + * src/SDCCloop.c (pointerAssigned): fixed bug #954163 + +2004-05-17 Erik Petrich + + * src/SDCCval.c (valForArray): applied Maarten Brock's patch #947682 + which fixes bug #543481 + * support/regression/tests/bug-751703.c: fixed comments left from a + cut and paste error + * src/SDCCdwarf2.c (dwCloseFile): don't explicitly close a temp file + * src/SDCCdwarf2.c (dwTagFromType): added bitfield support + * src/SDCCdwarf2.c (dwWriteSymbolInternal): handle extern within local + scopes + * src/SDCCdwarf2.c (dwWriteLineNumber): line number deltas are signed + * src/SDCCmain.c (processFile, parseCmdLine): non-alphanumeric chars + are now changed to underscores in moduleName + +2004-05-15 Jesus Calvino-Fraga + + * as/mcs51/lkmem.c: better fix for bug #954173 + +2004-05-15 Maarten Brock + committed by Frieder Ferlemann + + * device/include/c8051f020.h: newly added SiLabs (Cygnal) header file + * device/include/c8051f000.h, + * device/include/c8051f120.h, + * device/include/c8051f300.h, + * device/include/c8051f310.h, + * device/include/c8051f320.h: updated (added _XPAGE, CAPN, CAPP, + PWM16) and detab'ed + +2004-05-15 Frieder Ferlemann + + * doc/sdccman.lyx: mentioned sourceforge's delay between web frontend + and mailing lists, doc'ed --no-peep-comments, removed reference + to knoppix (newest version has no LyX/LaTeX), other minor changes + * src/SDCCglue.c (glue): save 2 bytes stack space with + option --main-return. The ljmp could probably be avoided too + +2004-05-14 Jesus Calvino-Fraga + + * as/mcs51/lkmem.c, as/mcs51/lkaomf51: fixed bug 954173 + +2004-05-14 Erik Petrich + + * src/SDCCsymt.h: added IS_AUTO(symbol) test macro + * src/SDCCopt.c (isLocalWithoutDef), + * src/SDCCicode.c (operandFromSymbol): use the IS_AUTO test macro + which adds a !IS_EXTERN codition. Fixes bugs #877426 and #751703. + (credit to Maarten Brock for patch #949363, on which this is based) + * support/regression/tests/bug-751703.c: some test cases of extern used + within inner scopes. + +2004-05-14 Erik Petrich + + * src/SDCCdwarf2.c (dwMatchTypes): structs must have matching + SPEC_STRUCT + * src/SDCCdwarf2.c (dwTagFromType): fix to handle recursive + struct definitions + * src/SDCCdwarf2.c (dwWriteModule, dwNewDebugSymbol, dwWriteEndFunction, + dwWriteLabel): fix to create valid debugger symbols even when + the module name has non-alphanumeric symbols in it + * src/SDCCdwarf2.c (dwWriteSymbolInternal): better detection for + when a variable's allocation has been optimized away + + +2004-05-13 Erik Petrich + + * src/hc08/gen.c (hc08_emitDebuggerSymbol), + * src/hc08/main.c, + * src/mcs51/gen.c (mcs51_emitDebuggerSymbol), + * src/mcs51/main.c, + * src/ds390/gen.c (ds390_emitDebuggerSymbol), + * src/ds390/main.c, + * src/z80/gen.c (z80_emitDebuggerSymbol), + * src/z80/main.c, + * src/pic/gen.c (pic14_emitDebuggerSymbol), + * src/pic/main.c, + * src/pic16/gen.c (pic14_emitDebuggerSymbol), + * src/pic16/main.c, + * src/avr/gen.c (avr_emitDebuggerSymbol), + * src/avr/main.c, + * src/xa51/gen.c (xa51_emitDebuggerSymbol), + * src/xa51/main.c, + * src/SDCCdebug.c (emitDebuggerSymbol), + * src/SDCCdebug.h, + * src/port.h: added a debugger struct to the port struct. Added a + callback for defining debugger symbols + + * src/SDCCast.c (createLabel), + * src/SDCC.y (labeled_statement): mark all compiler generated labels + with isitmp = 1 + * src/SDCCicode.h, + * src/SDCCicode.c (geniCodeFunctionBody): added a link from the FUNCTION + iCode back to the ast for the function + + * src/hc08/ralloc.c (hc08_assignRegisters), + * src/hc08/ralloc.h: define a regs struct for the stack pointer. Removed + unneeded fields from the regs struct. + * src/hc08/gen.c (transferRegReg, genFunction, genEndFunction): use the + pushReg() & pullReg() functions instead of emitcode() + + * src/hc08/gen.c (genLabel, genhc08Code), + * src/SDCCdebug.h: Added additional debugger hooks needed for DWARF + + * src/cdbFile.c (cdbWriteLabel, cdbWriteScope): Added stubs for unneeded + debugger hooks + + * src/hc08/gen.c (genEndFunction, genhc08Code), + * src/hc08/gen.h, + * src/mcs51/gen.c (genEndFunction, gen51Code), + * src/mcs51/gen.h, + * src/ds390/gen.c (genEndFunction, gen390Code), + * src/ds390/gen.h, + * src/z80/gen.c (genEndFunction, genZ80Code), + * src/z80/gen.h, + * src/z80/z80.h, + * src/pic/gen.c (genEndFunction, genpic14Code), + * src/pic/gen.h, + * src/pic16/gen.c (genEndFunction, genpic16Code), + * src/pic16/gen.h, + * src/avr/gen.c (genEndFunction, genAVRCode), + * src/avr/gen.h, + * src/xa51/gen.c (genEndFunction, genXA51Code), + * src/xa51/gen.h, + * src/cdbFile.c (cdbWriteFunction, cdbWriteEndFunction): moved cdb + specific code to cdbFile.c and out of the backend code generators + + * as/hc08/lkmain.c (main): removed OMF51 support from link-hc08 + * as/hc08/lkarea.c (lnkarea): areas with NOLOAD attribute default + starting address is now 0 + + * as/hc08/asm.h, + * as/hc08/m08pst.c, + * as/hc08/asmain.c (asmbl): implemented the .sleb128 and .uleb128 + assembler directive for DWARF support + * as/hc08/lkelf.c (elf): only increment address when rtflg[] set + + * src/src.dsp, + * src/Makefile.in, + * src/SDCCdwarf2.c: preliminary DWARF (ver 2) debugger data generator + +2004-05-04 Erik Petrich + + * src/hc08/gen.c (genJumpTab, emitcode, genhc08code): fixed stack error + and inappropriate peephole optimization in jump tables + +2004-04-30 Jesus Calvino-Fraga + + * as/hc08/m08pst.c, + * src/SDCCglue.c: sdccopt works for the hc08 port now + +2004-04-27 Bernhard Held + + * src/SDCCicode.c (geniCodePreInc, geniCodePreDec): fixed bug #942130 + +2004-04-27 Jesus Calvino-Fraga + + * as/hc08/lkelf.c: sdccconf.h is not available in WIN32 + +2004-04-24 Erik Petrich + + * src/SDCCpeeph.c (replaceRule): support empty replacement peephole + rules + * src/SDCCmain.c, + * src/SDCCglobl.h, + * src/SDCCpeeph.c (getPeepLine): new option --no-peep-comments omits + comments from the peephole optimizer replacement rules + * src/SDCCmem.c (printAllocInfoSeg): give actual location of spilled + symbols + * src/SDCCcse.c (updateSpillLocation), + * src/SDCCopt.c (killDeadCode, findReqv): better tracking of register + equivalents + * src/hc08/ralloc.c (regTypeNum): pseudo symbols must be in DATA only + * src/hc08/main.c (_hc08_finaliseOptions): made pointers to stack + objects far pointers + +2004-04-23 Erik Petrich + + * src/SDCCsymt.h: a missing part of my last change + * src/pic/ralloc.c (regTypeNum), + * src/pic16/ralloc.c (regTypeNum): fixed statement/declaration order + +2004-04-23 Erik Petrich + + * src/SDCCicode.h, + * src/SDCCicode.c (aggrToPtrDclType), + * src/SDCCptropt.h, + * src/SDCCptropt.c (ptrBaseRematSym, ptrPseudoSymSafe, + ptrPseudoSymConvert), + * src/pic/ralloc.c (regTypeNum), + * src/pic16/ralloc.c (regTypeNum), + * src/hc08/ralloc.c (regTypeNum), + * src/ds390/ralloc.c (regTypeNum), + * src/mcs51/ralloc.c (regTypeNum): check for dependancy hazards before + creating pseudo symbols (fixed bugs #777768, #930484, and #933966) + +2004-04-22 Erik Petrich + + * link/z80/lkmain.c (afile), + * as/hc08/lkmain.c (afile), + * as/mcs51/lkmain.c (afile): fix suggested by Maarten Brock to + prevent a pointer problem when a filename has no directory and + no extension specified. + +2004-04-21 Erik Petrich + + * link/z80/lkmain.c (afile): allow periods in directory names + * link/z80/lkmain.c (afile), + * as/mcs51/lkmain.c (afile), + * as/hc08/lkmain.c (afile): allow linker script file to have an + extension other than ".lnk" + * link/z80/lklex.c (getfid), + * link/z80/lkmain.c (parse), + * as/mcs51/lklex.c (getfid), + * as/mcs51/lkmain.c (parse), + * as/hc08/lklex.c (getfid), + * as/hc08/lkmain.c (parse): Support comments in the linker script + file on lines by themselves and after filenames + +2004-04-20 Jesus Calvino-Fraga + + * as/link_hc08.dsp: Added as/hc08/lkelf.c to project. + +2004-04-20 Erik Petrich + + * src/z80/peeph-z80.def: removed some peephole rules that don't + work with multibyte arithmetic (fixed bug #937126) + * src/mcs51/peeph.def: fixed peephole rules 150-158 to apply only + to registers and not global variables + * src/SDCCicode.c (geniCodeAssign, ast2iCode, geniCodePostInc, + geniCodePreInc, geniCodePostDec, geniCodePreDec, + geniCodeLogicAndOr, geniCodeConditional): enforce strict lvalue + checking for assignments not internally generated (fixed bug #931895) + * src/SDCC.y (postfix_expr): ignore typedefs when looking for a + structure member (fixed bug #930072) + +2004-04-19 Erik Petrich + + * src/SDCCmain.c (linkEdit), + * src/hc08/main.c (_hc08_parseOptions), + * as/hc08/Makefile.in, + * as/hc08/aslink.h, + * as/hc08/asm.h, + * as/hc08/m08pst.c, + * as/hc08/lkrloc.c (relr, rele), + * as/hc08/lkarea.c (lnkarea) + * as/hc08/lkmain.c (afile, parse), + * as/hc08/lkelf.c: support for ELF output + * as/hc08/lks19.c (s19), + * as/hc08/lkihx.c (ihx): ignore areas with the NOLOAD attribute + +2004-04-17 Jesus Calvino-Fraga + + * as/mcs51/lkihx.c: Fixed bug #899105. + +2004-04-16 Jesus Calvino-Fraga + + * doc/sdccman.lyx: Added instructons on how to convert MSVC .dsw and + .dsp files from Unix to DOS. + +2004-04-16 Erik Petrich + + * doc/sdccman.lyx: removed the ANSI-C noncompliance note regarding + function pointers; we have been compliant for several months now. + * src/mcs51/ralloc.c (serialRegAssign): enabled part of my 2004-04-13 + change that was accidently commented out + * src/mcs51/gen.c (freeAsmop, getFreePtr, freeForBranchAsmop, genIfxJump, + genCmpEq, jmpTrueOrFalse, genCmp, genAnd, genOr, genXor, genIfx): fixed + bug #922319 + +2004-04-15 Erik Petrich + + * src/hc08/gen.c: output of all of the internal debugging information + is now controlled by the D() macro; it is disabled by default + +2004-04-13 Erik Petrich + + * src/mcs51/ralloc.c (serialRegAssign, fillGaps, allocThisReg): try + harder to keep the same registers during a CAST iCode + * src/SDCCopt.c (optimizeCastCast, eBBlockFromiCode): casts of char to + long via int can be done in a single cast, if the signedness is + correct. + * support/regression/tests/bug-927659.c: fixed to avoid conflict with + putchar() in tinibios.c in ds390's library + +2004-04-12 Bernhard Held + + * src/SDCCast.c (decorateType): fixed bug #898889, + cast result of a literal complement too + * src/mcs51/ralloc.c (packRegsForAssign): fixed bug #930931, + fixed check for bitfields + +2004-04-11 Bernhard Held + + * src/SDCCicode.c (geniCodeLogic): made it static, + (geniCodeLogicAndOr): added in order to fix bug #905492, + (ast2iCode): fixed bug #905492 + * support/regression/tests/bug-905492.c: added + * src/SDCCast.c (decorateType): don't decorate/process parms twice, + (processParms): fixed bug #927659: don't copy parms, this will clear + decorated flag + * support/regression/tests/bug-927659.c: added + +2004-03-29 Bernhard Held + + * src/SDCCast.c (addCast): don't cast float to char + * device/lib/libsdcc.lib: added _memmove + +2004-03-28 Bernhard Held + + * device/lib/large/Makefile: fixed parallel execution by + replacing `make` by `$(MAKE)` + +2004-03-28 Erik Petrich + + * src/hc08/gen.c (genPointerGetSetOfs): correctly handle 1 byte array + offsets (fixes bug #923936) + +2004-03-26 Bernhard Held + + * device/lib/small/Makefile: fixed parallel execution by + replacing `make` by `$(MAKE)` + +2004-03-23 Bernhard Held + + * device/lib/vprintf.c (vsprintf): minor optimization, see bug #801101 + +2004-03-23 Scott Dattalo + + * src/pic/gen.c (genCpl): multi-byte complements were not working. + * src/regression/Makefile: Regression test was not running. + +2004-03-23 Bernhard Held + + * src/SDCCast.c (resultTypePropagate, decorateType): avoid promotion to int for + complement if possible + * src/SDCCval.c (valComplement), + * src/SDCCicode.c (operandOperation): fixed complement of literal + * support/regression/tests/onebyte.c (testComplement): added + +2004-03-22 Bernhard Held + + * src/SDCCast.c (processParms): fixed bug #920866; decorateType() can + return an optimized tree; actually replace actParm with the new tree + * src/SDCCast.h: added some parantheses to remove side effects + * support/regression/tests/bug-920866.c + +2004-03-21 Scott Dattalo + * src/pic/gen.c, src/pic/gen.h, src/pic/genarith.c, src/pic/pcode.c: + Bit operands were not being handled properly in the pic14 port. + (now src/regression/add.c passes again). + +2004-03-20 Erik Petrich + + * src/SDCC.y (labeled_statement): case and default no longer require + a following statement (RFE #893037) + +2004-03-19 Erik Petrich + + * src/mcs51/gen.c (pushSide, genSignedRightShift, genDjnz, geniPush): + use MOVA macro to avoid "mov a,acc" when peephole optimizer is + disabled (fixes bug #916294) + * sim/ucsim/s51.src/mov.cc (inst_mov_a_addr): Throw an error on + "mov a,acc"; patch provided by Lenny Story + * device/include/mc68hc908gp32.h: header contibuted by Juan Gonzalez + +2004-03-19 Erik Petrich + + * src/mcs51/gen.c (genFunction): optimize RECEIVE in reentrant + functions + * src/ds390/gen.c (genFunction, genEndFunction), + * src/ds390/ralloc.c (ds390_assignRegisters), + * src/mcs51/gen.c (genFunction, genEndFunction, mcs51_assignRegisters): + * src/mcs51/ralloc.c (mcs51_assignRegisters): Skip optimizing registers + pushed if there are parameters passed on the stack. Also, a cleaner + way to decide if r0/r1 should be pushed/popped. (Together they fix + bug #918693) + +2004-03-18 Erik Petrich + + * doc/sdccman.lyx, + * device/lib/mcs51/crtpagesfr.asm, + * device/lib/mcs51/crtxinit.asm, + * device/lib/mcs51/crtxstack.asm: Changed name of _PAGESFR to _XPAGE + to avoid confusion with Si Lab's SFRPAGE register. + +2004-03-17 Erik Petrich + + * src/SDCCglue.c (emitMaps): allow public sfr variables + * src/SDCCglue.c (initialComments): include compiler build date + with compiler version and put the timestamp of the generated + assembly file on a serperate line to be less confusing. + * src/port.h: added genInitStartup hook + * src/avr/main.c, + * src/ds390/main.c, + * src/hc08/main.c, + * src/pic/main.c, + * src/pic16/main.c, + * src/xa51/main.c, + * src/z80/main.c: genInitStartup initialize as NULL (default to + historical behaviour) + * src/SDCCglue.c (glue): _sdcc_gsinit_startup is now port specific. + * src/mcs51/main.c: (_mcs51_genInitStartup, _mcs51_genExtraAreas, + _mcs51_genXINIT, _mcs51_genRAMCLEAR): link initialization code from the + library instead of hard coding it into the compiler. + * support/regression/ports/mcs51-stack-auto/spec.mk, + * src/SDCCmain.c (linkEdit): added mcs51.lib to the link libraries + * device/lib/mcs51/Makefile, + * device/lib/small/Makefile, + * device/lib/large/Makefile, + * device/lib/mcs51/crtpagesfr.asm, + * device/lib/mcs51/crtstart.asm, + * device/lib/mcs51/crtxclear.asm, + * device/lib/mcs51/crtxinit.asm, + * device/lib/mcs51/crtclear.asm, + * device/lib/mcs51/crtxstack.asm: move most of the mcs51 C runtime + startup/initialization out of src/SDCCglue.c and src/mcs51/main.c + and into user configurable files. + * device/lib/clean.mk: clean mcs51 directory too + * support/regression/tests/longlit.c: added static to T1 declaration + * doc/sdccman.lyx: documented _PAGESFR sfr for customizing pdata + accesses in the initialization code + +2004-03-14 Erik Petrich + + * device/include/mc68hc908qy.h: corrected declarations of FLBPR and + OSCTRIMVAL as noted in bug #916008 + +2004-03-14 Erik Petrich + + * src/SDCCloop.c (basicInduction): fixed bug with loop induction + in loops with multiple exits (reported as incorrect registers + used by Martin Helmling in Sdcc-user list) + +2004-03-12 Frieder Ferlemann + + * src/ds390/main.c (_ds390_genAssemblerPreamble): cosmetic change, + made ds390 register extensions look less like error messages + +2004-03-12 Erik Petrich + + * src/SDCCglue.c (printIvalPtr): fixed bug with pointer initializer + reported by Adam Wozniak in Sdcc-user list + +2004-03-10 Bernhard Held + + * src/SDCCast.c (decorateType): fixed with bug and promotion in + arithmetic optimizations, added debug output + +2004-03-09 Bernhard Held + + * device/lib/time.c (mktime): fixed bug reported by Bert Thomas + * sdcc.spec: updated and split sdcc into 3 rpms + * src/SDCCast.c (decorateType): &|^ don't need addCast(); addCast() is + needed for literals of LEFT_OP and '+' + * src/SDCCicode.c (geniCodeLogic): I must have been braindead when I + introduced RESULT_TYPE_NOPROM + (geniCodeMultiply): fixed logic for decision if mul is optimized to + left shift + * src/SDCCsymt.c (computeType): op is int; added RESULT_TYPE_OTHER; + limited promotion to int only for '*' + * src/SDCCsymt.h (computeType): op is int, removed RESULT_TYPE_NOPROM + +2004-03-09 Hans Dorn + + * src/pic16/gen.c (genSkip), + (genc16bit2lit), (gencjneshort): commented out + (is_LitOp): new helper function, checks operand type + (genCmpEq): rewritten + +2004-03-08 Bernhard Held + + * support/regression/tests/bug-908454.c: added + +2004-03-07 Bernhard Held + + * src/SDCCast.c (addCast): fixed bug #908454 by promoting bits to char + * src/SDCCicode.c (usualBinaryConversions): op needs int type + (geniCodeCast): cosmetic, don't preserve bit storage class + (geniCodeLeftShift): added promotion + (geniCodeLogic): fixed regression + * src/SDCCsymt.c (computeTypeOr): accept bits too + (compareType): 2nd part of fix for bug #908454, needed for bitfields + +2004-03-07 Borut Razem + + * support/Util/findme.c: alloca() replaced with malloc()/free() pair + +2004-03-06 Vangelis Rokas + + * src/pic16/ralloc.c (pic16_genPackRegisters): reverted to old + version of pic16_genPackRegisters which does not check if ic is a + CAST operator, + * src/pic16/gen.c (ifxForOp): disabled new and untested code in + function cause string1.c regression test fails + +2004-03-06 Bernhard Held + + * sim/ucsim/configure.in, + * sim/ucsim/configure, + * sim/ucsim/doc/Makefile.in: use docdir + * src/SDCC.y: fixed sbit atrributes + * src/SDCCast.c (getResultTypeFromType): added support for bitfields + * src/SDCCast.c (decorateType): |^& need special promotion handling + * src/SDCCast.h, + * src/SDCCsymt.h: moved definition of RESULT_TYPE + * src/SDCCsymt.h (computeType), + * src/SDCCicode.c: computeType() needs op + * src/SDCCsymt.c (checkTypeSanity), + * doc/sddman.lyx: "plain" bitfields are unsigned + * src/SDCCsymt.c (computeTypeOr): added + * src/SDCCsymt.c (computeType): added support for bitfields, fixed + |^& ops + * src/SDCCval.c (val*): computeType() needs op + * src/SDCCval.c (valCastLiteral): fixed casting of bitfields + * support/regression/tests/onebyte.c: added tests for |^& + +2004-03-06 Hans Dorn + + * src/pic16/gen.c: (genpic16Code) use copy of printILine's output + for writing icode into asm output. + +2004-03-05 Vangelis Rokas + + * src/pic16/device.c: added some debug lines enabled + with macro DEBUG_CHECK, + * src/pic16/genarith.c: more debug in genPlus, + * (pic16_genUMult8XLit_16, pic16_genUMult8X8_16): removed, + * (pic16_genUMult16X16_16, pic16_genUMult16XLit_16): NEW, + * src/pic16/gen.c: added prototypes for pic16_genMult16X16_16, + * (aopForSym): onStack symbols are re-placed in data memspace, + and onStack flag is cleared, + * (pic16_popGetTempReg, pic16_popReleaseTempReg): modified to + copy temporary pcodeop, + * (genPcall): added warning for not updating PCLATU, + * (genFunction): removed test with IFFUNC_CALLEESAVES, its + always true for pic16 port, + * (genMultOneWord): NEW, supports integer multiplication, + * (genMult): modified to call genMultOneWord, + * (ifxForOp): added warning when return NULL, + * src/pic16/glue.c (pic16emitRegularMap): symbol implicit + flag is set before call to operandFromSymbol for implicit + added structures, + * src/pic16/main.c (_pic16_finaliseOptions): options.float_rent, + options.intlong_rent are set by default, + * (_hasNativeMulFor): modified to allow port generation of integer + multiplication, + * src/pic16/ralloc.c (pic16_allocDirReg): commented out line which + set regtype to REG_SFR for all registers, restricting seting the + accessBank flag for registers 0<= r < 0x80 and 0xf80<=r<=0xfff, + +2004-03-05 Frieder Ferlemann + + * src/mcs51/peephole.def: added 251.b and 253.x. 253.x are applied + more than 500 times in the regression tests + +2004-03-05 Erik Petrich + + * support/Util/SDCCerr.h, + * support/Util/SDCCerr.c, + * src/SDCC.y (struct_or_union_specifier, enum_specifier, + enumerator_list), + * src/SDCCsymt.c (addSymChain): show location of oriignal definition + for symbol conflicts. + * support/valdiags/tests/enum.c, + * support/valdiags/tests/tentdecl.c, + * support/valdiags/tests/struct.c: expect possible error messages + referring to original symbol definitions. + * src/SDCC.y (struct_or_union_specifier, struct_declarator), + * src/SDCCsymt.h, + * src/SDCCsymt.c (promoteAnonStructs): support anonymous struct/union + +2004-03-03 Hans Dorn + + * src/pic16/gen.c (gencjne): fixed for right=REG / left=LIT + +2004-02-03 Vangelis Rokas + + * src/pic16/ralloc.c (newReg): fixed bug #908929 + +2004-03-02 Erik Petrich + + * src/ds390/gen.c: added missing #include "main.h" + +2004-03-02 Vangelis Rokas + + * src/pic16/device.c (checkAddSym): NEW, adds a symbol to set while + checking if symbol is already in set, + * src/pic16/device.h: prototype for checkAddSym, + * src/pic16/gen.c: (_G): added entry interruptvector, + * (assignResultValue): removed some commented out lines, + * (genFunction): check for ISR via sym->type, absolute section for + interrupt code is created via a new pBlock, the goto instruction is + placed now correctly at the interrupt vector position, changed all + references from ivec to _G.interruptvector, + * WREG,STATUS,BSR are not saved in stack upon an entry to interrupt + is the interrupt is a high priority one, same for return from ISR, + * src/pic16/glue.c: changed all calls of addSetHead for publics and + externs to calls of checkAddSym, + * src/pic16/pcode.c (pic16_pBlockConvert2*): emit warning when + pic16_pcode_verbose flag is set, + * src/pic16/pcode.h: extern to pic16_pcode_verbose, + * src/pic16/pcoderegs.c: message about how many registers are saved + will only be emitted if pic16_pcode_verbose flag is set, + +2004-03-02 Erik Petrich + + * src/ds390/ralloc.h, + * src/ds390/ralloc.c (ds390_regWithIdx), + * src/ds390/gen.c (emitcode), + * src/ds390/main.h, + * src/ds390/main.c (instructionSize, ds390newAsmLineNode, updateOpRW, + ds390opcodeCompare, asmLineNodeFromLineNode, getInstructionSize, + ds390operandCompare, getRegsRead, getRegsWritten, + initializeAsmLineNode): customized instruction size calculation for + ds390, started basis for some register optimizations + * src/ds390/gen.c (gen390Code, emitcode): associate iCodes with + corresponding assembly output + * src/ds390/gen.c (genFunction, genEndFunction): added case to handle + missing push/pop of r0/r1. Optimized push/pops + +2004-03-01 Erik Petrich + + * src/mcs51/main.c (instructionSize): fixed ACALL size + * src/mcs51/main.c (updateOpRW): fixed bug with @dptr, @a+dptr operands + +2004-03-01 Vangelis Rokas + + * src/pic16/device.c (pic16_dump_section): fixed a bug that allowed + the sorting of rlist with NULL elements + * (print_idataType, print_idata): NEW to create idata sections + * src/pic16/device.h: idataSymSet new variable + * src/pic16/gen.c (genFunction): fixed some bugs in string + comparing, improved the absolute section creation for ISRs, + added FSR0L/FSR0H in registers that are saved in an ISR, + * (genInline): fixed the processing of inline snippets, + now they undergo no process by the peephole optimizer + * src/pic16/glue.c (pic16emitRegularMap): symbols with initialiser + are placed in idataSymSet, + * (pic16emitStaticSeg): extern symbols are added in externs, + * src/pic16/ralloc.c (pic16_allocDirReg): work around to reduce bank + switching when aboslute variables are placed in access bank memory + * (pic16_writeUsedRegs): added call to pic16_dump_idata, + * (packRegsForSupport,packRegsForAccUse,packRegsForOneuse): + commented out with #if, + * (pic16_packRegisters): reintroduce the check for CAST because some + symbols are not correctly handled, + * src/pic16/pcode.h: changed the definition of pCodeAsmDir to hold a + pCodeInstruction instead of pCode, + * src/pic16/pcode.c (pic16_newpCodeAsmDir): modified for the new + pCodeAsmDir definition, + * (pic16_pCode2str, genericPrint): when an AsmDir pcode has a NULL + directive, then the argument directive is emitted without the leading + tab, hack for inline labels which must be in the first column, + * (compareLabel,pic16_findNextInstruction), + * (pic16_findPrevInstruction): added case for PO_ASMDIR, + * (insertBankSwitch): modified for the new pCodeAsmDir, + +2004-03-01 Hans-Juergen Dorn + patch applied by Vangelis Rokas + + * src/pic16/gen.c (pic16_popGet): case PO_DIR, adds the offset to + instance, + * (pushSide): commented out with #if, + * (assignResultValue): fixed some typos in saving + registers, + * (genPcall): FIXED and sync'ed with genCall, + * (genDataPointerGet,genDataPointerSet): using offset not leoffset + * (genNearPointerGet): fixed to handle some more cases, + implementation scheme via table reads, + * (genConstPointerGet): modified to access code memory correct, + * (genCodePointerGet,genNearPointerSet,genGenPointerSet): modified + and improved to handle some cases + * glue.c (printIvalType,printIvalChar,emitStaticSeg): use "DB" + instead of "RETLW" for init data + * src/pic16/ralloc.c (pic16_allocDirReg): warning when a symbol is + not IN_DIRSPACE, work around to reduce bank switching when aboslute + variables are placed in access bank memory (<0x80 and >=0xf80), + * src/pic16/pcode.c: added SFRs TBLPTR, TABLAT, added opcodes TBLRD, + TBLRD_POSTINC,TBLRD_POSTDEC,TBLRD_PREINC,TBLWT,TBLWT_POSTINC, + TBLWT_POSTDEC,TBLWT_PREINC + * Fixed initialisation of BSR, set "alias" for SSAVE to "0" + * (pic16_emitDB,pic16_flushDB): New functions to generate "DB" + directives + * (pic16_pCodeConstString): use "DB" instead of "RETLW" + * src/pic16/pcode.h: added TBLRD*,TBLWT*, added pic16_emitDB, + pic16_flushDB, made pic16_newpCodeAsmDir public, added TBLPTR, TABLAT + * src/pic16/ralloc.h: added IDX_BSR,IDX_TBLPTR*,IDX_TABLAT + +2004-02-29 Borut Razem + + * src/Makefile.in, src/SDCCutil.c, support/Util/findme.c, + support/Util/findme.h, support/Util/system.h: enhance binary relative + search for lib and include by using findProgramPath() + +2004-02-28 Erik Petrich + + * src/SDCCpeeph.h, + * src/SDCCpeeph.c (pcDistance), + * src/port.h, + * src/mcs51/ralloc.h, + * src/mcs51/ralloc.c (mcs51_regWithIdx), + * src/mcs51/main.h, + * src/mcs51/main.c (instructionSize, asmLineNode, updateOpRW, + mcs51opcodeCompare, asmLineNodeFromLineNode, getInstructionSize, + mcs51operandCompare, getRegsRead, getRegsWritten): made instruction + size calculation port specific, started basis for some register + optimizations + * src/mcs51/gen.c (genFunction, genEndFunction): added case to handle + missing push/pop of r0/r1. Optimized push/pops + * src/mcs51/ralloc.c (packregisters): fixed bug #727095 + * device/lib/_modsint.c (_modsint), + * device/lib/_modslong.c (_modslong): fixed sign of result in non-asm + and stack version so regression tests pass + +2004-02-26 Bernhard Held + + * src/Makefile.in (dep): include SLIBOBJS in dependency check + * src/SDCCast.c (decorateType): catch another small optimization + with '?' operator + * src/SDCCsymt.c (computeType): added comments and cosmetic changes + * src/SDCCval.c (valMult, valDiv, valMod, valPlus, valMinus, valShift): + modified to finally use computeType() all over SDCC, + see Feature Request #877103 + * src/SDCCval.h: cosmetic + * src/SDCCicode.c (operandOperation): fixed EQ_OP bug, now same as in + valCompare(); regression tested in muldiv.c + * support/regression/tests/muldiv.c (testMod): mod sign follows + dividend only + +2004-02-23 Bernhard Held + + * src/SDCCast.c (decorateType): fixed bug #902362 + * doc/INSTALL.txt: fixed install instructions for win32 + +2004-02-21 Bernhard Held + + * device/include/Makefile.in (install): fixed by replacing spaces + by tabs + * doc/README.txt, + * doc/INSTALL.txt: updated for release + * doc/sdccman.lyx: added warning for --xstack being buggy + +2004-02-20 Bernhard Held + + * src/pic16/ralloc.c (packRegsForAccUse): disabled functions with #if + to eliminate build warnings. + * src/pic16/gen.c (pic16_popGet): fixed for gcc 2.95.4 + +2004-02-20 Vangelis Rokas + Hans-Juergen Dorn + + * doc/sdccman.lyx: removed PIC16 from PIC16 Port Specific Options, + removed -penable-stack, added comment for stack pragma, added + warning for not initializing the stack/frame registers, removed + comment at interrupts section + + Stack is made permanent, there is no ability to disable stack usage. + * src/pic16/device.h, + * src/pic16/device.c: removed all references to USE_STACK macro, + * src/pic16/device.c (pic16_dump_section): when no elements in + rlist, free rlist before return, + * (pic16_dump_int_registers): NEW, internal registers are a new set + of general purpose registers reused by each function, + * (checkAddReg): returns 1 if registers is added to set, + * (pic16_groupRegistersInSection): when a registers is of type + PO_GPR_TEMP add it in pic16_int_regs and not in pic16_rel_udata, + * src/pic16/device.h: memRange and Assigned Memory are deleted, + SRCASECMP macro is moved here from device.c + * src/pic16/genarith.c (pic16_pCodeOpType): added cases for + PO_PCLATU, PO_PRODL, PO_PRODH, + * (pic16_pCodeOpType, genMinus, + changed compares to "a" register, with AOP_ACC, + * (pic16_genPlus): fixed some bugs and indented properly, + * (pic16_addSign): changed size to size+offset in the MOVWF + instruction, + * (pic16_genUMult8XLit_8): NEW, uses processor MULLW instruction to + multiply 8-bit operand by literal, result is 8-bit, + * (pic16_genUMult8X8_8): NEW, uses processor MULWF instruction to + multiply 2 8-bit operand, result is 8-bit, + * (pic16_genMult8X8_8): modified to call genUMult8X*_8 functions and not + genUMult8X*_16, + * src/pic16/gen.c: changed accUse to contain WREG only, + * (pic16_emitcomment): renamed to pic16_emitpcomment, + * (aopForSym): allocated dir register when IN_DIRSPACE(space) is, + true, do not use immediate addressing any more unless sym is a + pointer in codespace, + * (aopForRemat): do not use immediate addressing when symbol not in + codespace and when symbol's address is requested, + * (aopOp): for-loop in if(sym->accUse) is modified for the new + accUse size (= 1), + * (aopGet): added case for AOP_ACC and don't return "accumulator + bug" but WREG instead, + * (popGetTempReg): pushes contents of temporary register in stack, + * (popReleaseTempReg): pops contents of temporary register from + stack. Use popGetTempReg/popReleaseTempReg in aligned pairs, + * (pic16_popGet): separated case AOP_ACC to return register WREG + from processor registers, AOP_PCODE not checks if pcop is PO_DIR + or PO_IMMEDIATE and initializes their instance/offset appropriately, + * The whole issue with aopForSym,aopForRemat,popGet) is to minimize + the use of immediate pointers to certain cases only. + + * (pic16_pushpCodeOpReg, pic16_poppCodeOpReg): use pic16_popGet2p, + * (pic16_loadFromReturn, pic16_storeForReturn: NEW, + * (assignResultValue, genCall, genRet): modified to use the new + function return value scheme with WREG,PRODL,PRODH,FSR0L and FSR0, + genPcall is still broken, + * (genFunction): added code to create 'A' type pBlocks when + interrupt functions are generated, code not extensively tested yet, + ISRs push WREG,STATUS,BSR,PRODL,PRODH,FSR0L,FSR0H registers on stack, + * (genEndFunction): modified so ISRs pop stored registers from stack, + * (genMultOneByte): cleanup, + * (AccRsh): added flag andmask, to and result with appropriate mask, + * (genUnpackBits,genPackBits): fixed and can handle bit fields, + * (genDataPointerGet): fixed and reenabled its use, + * (genNearDataPointerGet): bugs fixed, + * (genDataPointerSet): bugs fixed, + * src/pic16/genutils.c: added functions pic16_DumpValue,pic16_DumpAop, + pic16_DumpSymbol, pic16_DumpOp, + * src/pic16/genutils.h: function prototypes for the above functions, + * src/pic16/glue.c: new flags initsfpnt, to initialize stack/frame + pointers, + * (pic16emitRegularMap): many many many improvements, but needs a + major cleanup, + * src/pic16/main.c: enable_stack in pic16_options is removed, + * (_pic16_parseOptions): removed command line options -penable-stack, + * (_process_pragma): emit stack symbol only when stack pragma is + processed, + * src/pic16/pcode.c: pic16_pc_fsr0 is removed, all operations are + redirected to FSR0L/FSR0H pair, + * (pic16_get_op, pic16_get_op2): modifications and improvements, + * (pic16_getRegFromInstruction, pic16_getRegFromInstruction2): added + cases PO_PRODL,PO_PRODH, pic16_getRegFromInstruction2 returns sane + for immediates, + * (insertBankSwitch): modified to handle cases like: (alfa + 1) + * (dumpPicOptype): NEW, + * src/pic16/pcode.h: added PO_PCLATU,PO_PRODL,PO_PRODH in enum, + * src/pic16/pcoderegs.c (pCodeRegMapLiveRangesInFlow): fixed bug + with movff instruction, + * src/pic16/ralloc.c: renamed typeRegWithIdx to pic16_typeRegWithIdx, + added pic16_int_regs, some packRegsFor* functions are commented out, + because produce errors, + * src/pic16/NOTES: minor modifications + +2004-02-18 Jesus Calvino-Fraga + + * as/mcs51/aslink.h, as/mcs51/lkarea.c, as/mcs51/lkdata.c, as/mcs51/lkmain.c, + as/mcs51/lkmem.c, src/SDCCglob.h, src/SDCCmain.c: added options --stack-size and + --pack-iram. + * doc/sdccman.lyx: described options --stack-size and --pack-iram. + * as/mcs51/lkaomf51.c: fixed bug #895763 + +2004-02-17 Bernhard Held + + * device/include/c8051f320.h: added. Contributed by Maarten Brock. + +2004-02-17 Erik Petrich + + * doc/sdccman.lyx: added details about the HC08 storage classes and + interrupts, fixed the register usage info for z80 & gbz80 + +2004-02-17 Vangelis Rokas + + * doc/sdccman.lyx: added more pic16 port documentation + * device/include/pic16/: added header pic18fregs.h + +2004-02-16 Bernhard Held + + * doc/sdccman.lyx: added Vangelis' contribution + +2004-02-16 Erik Petrich + + * src/SDCClrange.c (rlivePoint): live range of SEND operand should + extend to the next CALL or PCALL, not just to the next CALL. + +2004-02-16 Vangelis Rokas + + * src/pic16/gen.c (genInline): fixed bug #896482 with inline assembly + +2004-02-15 Erik Petrich + + * src/mcs51/ralloc.c (packRegsForAssign, reassignAliasedSym): fixed + bug #895752 and a better fix for bug #716790 + +2004-02-15 Erik Petrich + + * src/SDCCsymt.c (processFuncArgs): fixed bug #896796 + +2004-02-14 Frieder Ferlemann + + * doc/sdccman.lyx: minor changes, minor changed + +2004-02-13 Bernhard Held + + * src/SDCCicode.c (usualBinaryConversions): removed pic16 from ports + which can't handle SDCC_NEWONEBYTEOPS, + (geniCodeMultiply): removed conversion from mult to shift for pic14 + and pic16 + +2004-02-12 Erik Petrich + + * src/hc08/gen.h, + * src/hc08/gen.c (storeRegToAop, aopOp, aopAdrStr, accopWithAop, + rmwWithAop): Ported my 2003-10-02 fix for bug #663539 to the hc08, + thus fixing bug #895406 + +2004-02-11 Bernhard Held + + * device/lib/_modsint.c, + * device/lib/_modslong.c: sign follows divisor only + * src/hc08/gen.c (genMultOneByte): if result size is 1, + signs or signedness can be ignored + * src/SDCCast.c (addCast): cosmetic - added lineno to CAST + * src/SDCCast.c (resultTypePropagate): added even more ops: +, - and *, + added optimization for IFX, + (decorateType): Mult/Div/ModOneByte ops can handle all kind of signed + arguments; + reenabled optimization for IFX, which was removed on 2004-01-11 + * src/SDCCast.h: added return type IFX + * src/SDCCicode.c: Mult/Div/ModOneByte ops can handle all kind of signed + arguments with 8 or 16 bit results; pic14 and pic16 ports use old + promotion behaviour; env. var. SDCC_NEWONEBYTEOPS selects the new, + SDCC_OLDONEBYTEOPS selects the old behaviour + * src/SDCCsymt.c (computeType): type2 can be NULL (for LEFT_OP); + changed again and commented promotion rule + * src/SDCCval.c (valDiv): promotion no longer necessary + * src/ds390/gen.c (genMultOneByte) (genDivOneByte) (genModOneByte), + * src/mcs51/gen.c (genMultOneByte) (genDivOneByte) (genModOneByte): + rewritten + * support/regression/tests/onebyte.c: added + +2004-02-11 Vangelis Rokas + + * gen.c (genInline): reverted to old code for assemnling inline + code because of bug reported James Chadd + +2004-02-10 Vangelis Rokas + + * ralloc.h: missing declarations from previous patch, + seems that patch for ralloc.h was never applied, fixed + +2004-02-10 Hans-Juergen Dorn + patch committed by Vangelis Rokas + + * pcode.c, + * pcode.h, + * ralloc.h: added FSR0L, FSR0H and other missing PIC16 SFR's for + indirect addressing. Marked FSR0 as deprecated + * gen.c (pointerCode): commented out, not needed now + (pic16_popGet2p): new MOVFF helper function + (genGenPointerGet), + (genGenPointerSet): reimplemented with MOVFF and POSTINC0 + (shiftRLong): removed duplicate debugging info + +2004-02-10 Erik Petrich + + * src/ds390/gen.c (genNearPointerGet), + * src/mcs51/gen.c (genNearPointerGet): allow the genDataPointerGet() + optimization with bits, but not bitfields. + * src/ds390/ralloc.c (packRegisters), + * src/mcs51/ralloc.c (packRegisters): fixed bug #884453 & #880832 + +2004-02-09 Bernhard Held + + * src/SDCCcse.c (algebraicOpts): copy operands before modification + +2004-02-09 Erik Petrich + + * src/SDCCsymt.h, + * src/SDCCicode.c (operandFromSymbol), + * src/mcs51/ralloc.c (verifyRegsAssigned, serialRegAssign), + * src/ds390/ralloc.c (verifyRegsAssigned, serialRegAssign), + * src/z80/ralloc.c (verifyRegsAssigned, serialRegAssign), + * src/hc08/ralloc.c (verifyRegsAssigned, serialRegAssign), + * src/pic/ralloc.c (verifyRegsAssigned, serialRegAssign), + * src/pic16/ralloc.c (verifyRegsAssigned, serialRegAssign): fixed + bug #892038 + * src/SDCCast.c (createIvalStruct, createIvalArray, gatherAutoInit), + * src/SDCCglue.c (emitRegularMap, printIvalStruct, printIvalArray, + printIvalCharPtr, printIvalPtr, printIval, emitStaticSeg, emitOverlay) + * src/SDCCsymt.c (newSymbol), + * src/SDCC.y (struct_or_union_specifier, enum_specifier, + enumerator_list), + * src/SDCCval.h, + * src/SDCCval.c (newiList): fixed bug #885705 + +2004-02-08 Jesus Calvino-Fraga + + * doc/sdccman.lyx: added section 3.1.4: sdcclib. + * as/mcs51/lkmem.c: report the size of the stack in .mem file. + +2004-02-08 Frieder Ferlemann + + * device/include/c8051f120.h, + * device/include/c8051f300.h, + * device/include/c8051f310.h: added/updated header files for Silicon + Laboratories (formerly Cygnal) CPUs. Contributed by Maarten Brock. + * doc/sdccman.lyx: minor changes, recommended diff -Naur and diff -u + in new section Submitting patches + +2004-02-08 Erik Petrich + + * src/mcs51/gen.c (genNearPointerGet, genPagedPointerGet, + genFarPointerGet, genCodePointerGet, genGenPointerGet, + genNearPointerSet, genPagedPointerSet, genFarPointerSet, + genGenPointerSet), + * src/ds390/gen.c (genNearPointerGet, genPagedPointerGet, + genFarPointerGet, genCodePointerGet, genGenPointerGet, + genNearPointerSet, genPagedPointerSet, genFarPointerSet, + genGenPointerSet), + * src/pic16/gen.c (genNearPointerGet, genPagedPointerGet, + genFarPointerGet, genCodePointerGet, genGenPointerGet, + genNearPointerSet, genPagedPointerSet, genFarPointerSet, + genGenPointerSet), + * src/pic/gen.c (genNearPointerGet, genPagedPointerGet, + genFarPointerGet, genCodePointerGet, genGenPointerGet, + genNearPointerSet, genPagedPointerSet, genFarPointerSet, + genGenPointerSet): fixed bug #892400 + * src/pic16/gen.c (genSkipz, AccRol): disabled functions with #if 0 + to eliminate build warnings. + * src/SDCCast.c (processParms), + * src/SDCC.y (function_declarator2, declarator2_function_attributes): + fixed bug 751859 + * support/valdiag/valdiag.py: added GCC to the list of defines active + when compiling with gcc + +2004-02-07 Erik Petrich + + * support/Util/SDCCerr.h, + * support/Util/SDCCerr.c, + * src/SDCCast.c (decorateType, sizeofOp): complain when sizeof is used + with an incomplete type (fixed bug #883734) + * src/SDCCicode.c (geniCodeCast): fixed bug #890510 + +2004-02-07 Erik Petrich + + * src/pic16/gen.c (genCmpEq, shiftRLong): fixed declarations + +2004-02-06 Erik Petrich + + * src/SDCCast.c (decorateType), + * src/SDCCicode.c (geniCodeParms, geniCodeCall): fixed bugs in my ANSI + function pointer implementation + * support/regression/tests/funptrs.c: added tests to verify both forms + of function pointers work correctly. Added tests to verify parameters + are passed in the correct order. + +2004-02-06 Vangelis Rokas + + * device.c (regCompare): registers are sorted by ascending + address and increasing size, + * main.c (_pic16_finaliseOptions): removed the declaration + of compiler macro MCU. Now a macro of the format pic18fxxxx + will be defined from the command line + +2004-02-06 Hans-Juergen Dorn + patch committed by Vangelis Rokas + + * pcode.c (pic16initMnemonics): fixed typo in assignment to PCOP_RLNCF + PCOP_RLCF was overwritten! + * gen.c (genSkip): commented out calls to pic16_emitcode, + * (genCmpEQ): fixed "long" compares, only high word did get compared, + * (genlshTwo), + * (genRRC): added debugging info, + * (shiftL2Left2Result): Fixed bug, if offr > offl. Result got + overwritten while shifting, + * (shiftR2Left2Result): Fixed bug, if offr < offl. Result got + overwritten while shifting, + * (AccLsh), + * (AccRsh), + * (shiftLLeftOrResult), + * (shiftRLeftOrResult), + * (shiftRLong), + * (shiftLLong): Implemented with pic16_emitpcode + * (genlshFour): Replaced pic16_aopPut with pic16_emitpcode, + * (genLeftShift): Fixed bug, operand for shift by variable always + was "and"ed with 0x0f, + * (genLeftShiftLiteral), + * (genrshTwo), + * (genRightShiftLiteral): added debugging info, + * (genrshFour): added comment, + * (genRightShift): determined signedness from operand "left" + instead of "result" + +2004-02-04 Erik Petrich + + * src/SDCCicode.c (geniCodeParms), + * src/SDCCast.c (decorateType, processParms): support for ANSI-style + function pointers, fixed function pointer bugs #861242 and #861896 + +2004-01-31 Frieder Ferlemann + + * device/include/c8051f000.h, + * device/include/c8051f120.h, + * device/include/c8051f300.h: added header files for Silicon + Laboratories (formerly Cygnal) CPUs. Contributed by Maarten Brock. + +2004-01-31 Bernhard Held + + * src/SDCCast.c (processParams): added new type flow and restructured + (gatherAutoInit): added new type flow + (addCast): cosmetic changes + (getLeftResultType): added new type flow for array indices, patch + provided by Stas, see FR #877103 + (decorateType): SDCC_NEWTYPEFLOW removed, new type flow is now standard; + array index patch by Stas + * src/SDCCast.h: added prototype getResultTypeFromType() + * src/SDCCval.h, + * src/SDCCval.c (resolveIvalSym) (resolveIvalSym), + * src/pic/glue.c (pic14emitStaticSeg), + * src/pic16/glue.c (pic16emitStaticSeg), + * src/SDCCglue.c (emitRegularMap) (emitStaticSeg): added new type flow + for initialization of symbols + * src/SDCCicode.c (geniCodeArray): removed warning W_ARRAY_BOUND + * support/Util/SDCCerr.h: + * support/Util/SDCCerr.c: replaced W_ARRAY_BOUND by W_IDX_OUT_OF_BOUNDS + * .version: bumped version number to 2.3.8 + * device/include/Makefile.in (install), + * doc/Makefile (install): changed to 'rm `find ...`' construct to + avoid warnings + +2004-01-30 Bernhard Held + + * support/regression/tests/libmullong.c: fixed for 64 bit hosts + Slade Rich fixed an optimization bug + * src/pic/pcodepeep.c, + * src/pic/pcoderegs.c + * doc/Makefile (install): added test for directory + +2004-01-30 Erik Petrich + + * src/mcs51/ralloc.c (getRegPtr, getRegGpr), + * src/ds390/ralloc.c (getRegPtr, getRegGpr), + * src/pic/ralloc.c (getRegPtr, getRegGpr), + * src/pic16/ralloc.c (getRegPtr, getRegGpr), + * src/z80/ralloc.c (getRegGpr): fixed bug #883361 + * as/mcs51/asexpr.c (term), + * as/hc08/asexpr.c (term): fixed bug #887146 + +2004-01-29 Erik Petrich + + * src/z80/gen.c (genMult): handle single byte result product + * src/SDCCopt.c (killDeadCode): never convert ADDRESS_OF iCode to + DUMMY_READ_VOLATILE (fixed bug #886367) + +2004-01-27 Bernhard Held + + * support/regression/tests/libmullong.c: fixed logic, on little endian + hosts we ended without a mullong_wrapper() + +2004-01-27 Erik Petrich + + * ChangeLog: changed "@" to " AT " in hopes of reducing spam and + virus/worm forged address usage. + +2004-01-27 Bernhard Held + + Fixed promotion, it should be done on AST level: + * src/SDCCast.c (addCast): added promotion to int + (decorateType): updated call to upCast() + * src/SDCCicode.c (geniCodeLeftShift): removed call to + usualUnaryConversions() + +2004-01-26 Michael Hope + + * support/regression/tests/literalop.c (mulWrapper): Added a + wrapper to remove integer overflow warnings. + + * support/regression/tests/float_trans.c: Made work on host. + + * support/regression/ports/ucz80/spec.mk (UCZ80): Made detect the + location of sz80. + + * support/regression/generate-cases.py (main): Changed from inline + to a main method. + + * doc/Makefile (install): Changed to depth first to get rid of + missing directory install warning. + + * as/Makefile (install-doc): Made work on Mac. + +2004-01-25 Bernhard Held + + * src/SDCCast.c: added an additional type flow in decorateType() of + opposite direction, see feature request #860006; it's enabled at runtime + by setting the environment variable SDCC_NEWTYPEFLOW + * src/SDCCast.h: changed prototype of decorateType() + * src/SDCCglue.c (emitRegularMap): updated call of decorateType() + * src/SDCCicode.c (geniCodeDivision) (geniCodeModulus): promotion from + 'char' to 'int' can be omitted, if both operands are 'unsigned char'; + see feature request #877103 + * src/SDCCval.c: updated call of decorateType() + (valBitwise): fixed bug #882876 + (valMinus): added promotion + (valLogicAndOr): result is unsigned + (cheapestVal) (constVal): literals from 0...255 are 'unsigned char' now + * src/SDCCsymt.c (computeType), + * src/mcs51/gen.c (genCmpGt) (genCmpLt): literal 'unsigned char' + must not cause an unsigned operation + * src/pic/glue (pic14emitRegularMap), + * src/pic16/glue.c (pic16emitRegularMap): updated call of decorateType() + +2004-01-23 Bernhard Held + + * src/pic/pcode.c (PCodeID): commented out left over debug code + +2004-01-20 Bernhard Held + + * support/valdiag/tests/overflow.c: added shift tests + * src/pic/device.c, + * src/pic/gen.c, + * src/pic/gen.h, + * src/pic/glue.c, + * src/pic/main.c, + * src/pic/pcode.c, + * src/pic/pcode.h, + * src/pic/pcodepeep.c, + * src/pic/pcoderegs.c, + * src/pic/ralloc.c, + * src/pic/ralloc.h: applied patch from Slade Rich; + added support for multiple code pages and multiple RAM banks on the + PIC 14 port. The ASM files now no longer simply assume all the + code / RAM are in the same page / bank. This means the linker can + safely allocate code/RAM of separate ASM files to different pages/banks. + * doc/sdccman.lyx: added Slade's tips + * src/mcs51/peeph.def: fixed bug #880768 + +2004-01-20 Erik Petrich + + * src/hc08/ralloc.c (rematStr): fixed bug #879282 + * src/SDCCast.c (decorateType): fixed bug #880197 + +2004-01-20 Michael Hope + + * sim/ucsim/gui.src/serio.src/main.cc: Fixed unconditional use of + getopt.h. + + * debugger/mcs51/cmd.c (getValBasic): Changed strtof to strtod as + strtof is not part of C89 and isn't included with Mac OS X. + +2004-01-20 Erik Petrich + + * src/hc08/gen.c (genPlusIncr, genUminus, genMinusDec, genCmp, + shiftL2Left2Result): fixed bug #879326 + (genAnd, genOr, genXor): fixed bug when result was of type AOP_CRY + (genMultOneByte): fixed bug in signed vs unsigned multiplication + * sim/ucsim/hc08.src/inst.cc (inst_clr): added missing effective + address fetch for clr instruction + * device/lib/hc08/_mulint.c: created optimized assembly version + * src/SDCCdflow.c (computeDataFlow): fixed bug #878209 + +2004-01-19 Bernhard Held + + * src/SDCCicode.c (geniCodeArray): applied patch from Stas Sergeev + proposed in FR #877103 + +2004-01-18 Bernhard Held + + * src/SDCCval.c (cheapestVal): added missing checks + * src/SDCCicode.c (usualBinaryConversions): fixed condition + * src/SDCCicode.c (geniCodeAdd): fixed part of bug #877103 + +2004-01-16 Klaus Flittner + + * src/ds390/gen.c (aopOp3): fixed the assignment of different dptrs to + equal operands + +2004-01-16 Vangelis Rokas + + * src/SDCCmain.c (linkEdit): variable $3 of the linker command is + loaded with the linker search paths (-L arguments) and the libraries + to be linked with the current source (-l arguments). Changes + currently will affect only the pic16 port. + * src/pic16/main.c (_pic16_finaliseOptions): add to the linker + include path the port specific paths and port specific libraries, + * gplink command now contains the $3 argument, + * src/pic16/device.h, + * src/pic16/device.c,: structure PIC_device is made public and + renamed to PIC16_device, the same for variable Pics which is renamed + to Pics16. Updated all references to them. + * src/pic16/glue.c (pic16glue): corrected bug with code + initialization which bypassed the variable initializations block. + + * device/lib/pic16/Makefile.rules: removed --penable-stack from + COMPILE_FLAGS and added the --nostdinc option + +2004-01-15 Erik Petrich + + * device/include/mc68hc908jb8.h: Register defs for another member + of the hc08 family. Contributed by Bjorn Bringert - thanks! + +2004-01-14 Vangelis Rokas + + Documenting changes from previous commits. + * configure.in (version 1.56), + * configure: initially I've added AC_CONFIG_SUBDIRS(device/lib/pic16) + when generating output files to configure the pic16 library, + but now I've commented it out, since gputils aren't installed in the + SF compile farm, so library won't compile + + * device/lib/Makefile.in (version 1.56): initially I've added in + target 'all' the prerequestive 'model-pic16' so it compiled the + pic16 library, but now I've commented it out for the same reasons + above, + * added targets 'model-pic16' and 'objects-pic16' to compile the + library + * added target 'port-specific-objects-pic16' to handle the + generated libraries and copy them into the build/ directory + * added target 'clean-intermediate-pic16' to clean intermediate + files into pic16 directory + * in target 'installdirs' added line to create directory pic16 in + the installation path + + * device/include/Makefile.in (version 1.11): in target 'install' + added lines to copy all header files to installation path, + * in target 'installdirs' added line create directory for pic16 + headers in the installation path + +2004-01-13 Klaus Flittner + + * src/ds390/gen.c (genCall): fixed a double use of acc and b after + a function call + +2004-01-13 Bernhard Held + + * configure, + * device/lib/configure.in, + * device/lib/configure: fixed for autoconf 2.57 + +2004-01-13 Erik Petrich + + * src/z80/main.c (_parseOptions): fixed the portmode= command line + option so that it actually works. Made it specific to the z80, since + the gbz80 doesn't have these kinds of I/O ports. + +2004-01-13 Erik Petrich + + * device/include/z180.h, + * device/lib/_memcpy.c, + * device/lib/_memmove.c, + * device/lib/_mulint.c, + * device/lib/ser_ir.c, + * device/lib/ser_ir_cts_rts.c, + * device/lib/_strcmp.c, + * device/lib/_strtok.c: fixed pragmas to non-deprecated form + * src/z80/main.c (_process_pragma): add support for pragmas bank and + portmode; added deprecation warning for bank= and protmode= forms. + Also, guard against buffer overflow. + * src/z80/gen.c (aopGet): generate better code for sfr banked read + +2004-01-13 Erik Petrich + + * src/hc08/main.c (_hc08_genAssemblerPreamble): fixed bug #875487. Also + changed interrupt vector table generation to only emit declared vectors. + * device/include/Makefile.in: added missing backslash + * device/lib/pic16/Makefile.rules: add $(MODELFLAGS) to $(CFLAGS) + +2004-01-13 Vangelis Rokas + + Mainly changes to support compilation of the device libraries + * src/pic16/device.c: stack is allocated via symbol and not + via literal number. The symbol is placed in the corresponding + position of the data ram + * (pic16_dump_section): relocatable and absolute uninitialized + data are now emitted in sorted order to reduce section naming, + * src/pic16/ralloc.c (newReg): fixed bug with SFR's that + weren't marked as being in the access bank, + +2004-01-13 Vangelis Rokas + + Added portion of GNU PIC Library under the directory + device/include/pic16 and device/lib/pic16. These files + contain the declarations of SFRs for the PIC18Fxx2 devices. + The directory is initialized via configure from toplevel. + +2004-01-12 Klaus Flittner + + * src/ds390/gen.c (operandsEqu): fixed a little typo, that prevented + the spilllocations to be compared correctly + +2004-01-12 Bernhard Held + + * src/SDCCast.c (decorateType): fixed bug introduced today + +2004-01-12 Borut Razem + + * src/SDCC.lex, support/Util/SDCCerr.h, support/Util/SDCCerr.c, + doc/sdccman.lyx: upper case pragmas are deprecated + +2004-01-12 Bernhard Held + + * src/SDCCast.c (decorateType): replacing 'ul > 0' by '!ul' results + in simpler and even better code + +2004-01-11 Bernhard Held + + * src/SDCCicode.c (operandOperation): fixed bug #874819 + * src/SDCCast.c (decorateType): fixed + char foo (unsigned long ul) { return ul > 0; } + +2004-01-11 Frieder Ferlemann + + * doc/sdccman.lyx: Moved and added some sections, small changes + all over. Telling LaTeX to be less strict with word spacing + to better keep the right margin. Changed some notes about + maintainance of the ports in section 3.2.1 - is it OK like this? + +2004-01-11 Vangelis Rokas + + SDCC source changes: + * src/SDCCopt.c (cntToFcall, cnvToFloatCast, cnvFromFloatCast, + convilong): modified to inform the pic16 port that builtin functions + are external + + PIC16 PORT specific changes: + * src/pic16/device.c pic16_dump_equates() added, + processor registers declared internally by the port are emitted in + the translation as equates, + * src/pic16/gen.c: inline code is passed unprocessed to the + translation, + * (pic16_popGetLit2): fnuction modified to take second operand as + pCodeOp pointer and not as literal, + * (popRegFromIdx): prefixed with pic16_, + * (pic16_popCombine2): modified to receive already allocated pCode + operands, + * (pic16_pushpCodeOpReg, pic16_poppCodeOpReg): added + * (genFunction): initializes local stack frame and pushes on stack + all the registers used by this function, + * (genEndFunction): restores all registers from stack and restores + stack frame, + * src/pic16/glue.c (pic16emitRegularMap): various changes and + improvements, + * (pic16glue): changed the program startup sequence, + * added new dbName code 'A' for functions placed in absolute section + * src/pic16/main.c: added function attribute _naked, + * added pragma 'code' to place a fnuction at an absolute address, + * added command line arguments --debug-ralloc and --pcode-verbose, + * (_pic16_finiliseOptions): options.all_callee_saves is set by default + * src/pic16/pcode.c (pic16_pBlockConvert2Absolute) added, + * (pic16_newpCodeOpLit2): modified to take the second operand as + pCodeOp pointer, + * (pic16_printpBlock): modified to emit each function in a separate + section, + * (pic16_get_op): modified to use the gpasm modifiers LOW,HIGH and + UPPER for immediate operands, + * src/pic16/pcodepeeph.c: added peephole support for the LFSR + instruction, + * src/pic16/peeph.def: all peepholes with movff are commented out, + because there is a problem in the pcode peep optimizer, + * src/pic16/ralloc.c: the register allocator can now reuse local + function symbols for another function. This saves register usage. + * src/pic16/ralloc.h: added flag isLocal in structure regs, + + Added file src/pic16/NOTES with information about program writing on + the current port version. + +2004-01-11 Frieder Ferlemann + + * src/mcs51/peephole.def: added peepholes 177.c,d (redundant moves) + and peephole 252 (array access) + +2004-01-09 Borut Razem + + * src/SDCCmain.c : fixed #872250: -l command line defined library + files are scanned before standard library files + +2004-01-10 Erik Petrich + + * src/SDCCast.c (decorateType): fixed bug #874046 + +2004-01-09 Borut Razem + + * support/scripts/sdcc.nsi: remove previous installation + +2004-01-09 Frieder Ferlemann + + * src/SDCCglue.c (createInterruptVect): don't append 7(5) padding + bytes for last interrupt vector (mcs51) + * sdcc.spec: fixed typo + +2004-01-09 Erik Petrich + + * src/mcs51/gen.c (genFunction, genEndFunction, genReceive, getTempRegs, + gen51Code): more efficient parameter receive for --model-large + ("bug" #845294) + +2004-01-09 Erik Petrich + + * src/ds390/main.c, + * src/z80/main.c: added missed needLinkerScript flags (more than + one port structure defined in these file) + * src/ds390/gen.c (aopForSym, aopOp, operandsEqu, aopOp3): fixed + bug #795325 + +2004-01-08 Vangelis Rokas + + * src/SDCCmain.c: removed various references to DEFAULT_PORT + * src/port.h: added flag needLinkerScript in port->linker + structure to inform whether to create a .lnk file or not, + * src/avr/main.c, + * src/ds390/main.c, + * src/hc08/main.c, + * src/mcs51/main.c, + * src/pic/main.c, + * src/pic16/main.c, + * src/xa51/main.c, + * src/z80/main.c: changed appropriately to configure + needLinkerScript flag + * src/pic/gen.c, + * src/pic16/gen.c (genAddrOf): fixed bug #863624 + * src/pic/glue.c: added variable udata_section_name to + override default uninitialized data segment definition for + devices only with SHAREBANK memory (reported from Erik Epetrich) + * (pic14emitOverlay): modified to emit a commented overlay segment + directive when no overlay data exist + * (picglue): modified to emit uninitialized data segment + according to udata_section_name + * src/pic/main.c (_pic14_parseOptions): added command line + options --udata-section-name=[name] to override default + udata definition name + * modified _linkCmd and _asmCmd to include compiler passed + arguments via -W option + * src/pic16/main.c: added $l in _asmCmd, changed extension for + object file from '.rel' to '.o' in port->linker structure, + changed size of fptr from 2 to 3 in port structure + +2004-01-07 Borut Razem + + * support/scripts/sdcc.nsi: update PATH + * support/scripts/sdcc.ico: craeted + +2004-01-07 Bernhard Held + + * device/include/Makefile.in: fix install + * doc/Makefile: fix install + +2004-01-07 Erik Petrich + + * src/SDCCsymt.c (processFuncArgs): fixed superflous allocation noted + in bug #860505 + * src/SDCCmem.c (printAllocInfoSeg, printAllocInfo): minor changes to + how the function variable allocation summary is displayed; also + include information about variables allocated to the overlay + segment + +2004-01-06 Jesus Calvino-Fraga + + * as/mcs51/lkmain.c: Help about -Y option + * as/mcs51/lkarea.c: Fixed gcc warnings + +2004-01-06 Bernhard Held + + * src/SDCCval.c (valShift): changed from 16 to 32 bit shift count, + fixed warning + * support/valdiag/tests/overflow.c: added + * src/SDCCast.c (decorateType), + * src/SDCCicode.c (geniCodeLeftShift): added promotion to int for + LEFT_OP (left shift) + +2004-01-06 Jesus Calvino-Fraga + + * as/mcs51/lkmain.c: stack must be after data when option -Y is not used + (default behaviour). + +2004-01-06 Erik Petrich + + A python script to validate compiler diagnostic messages. It can be + used to verify that sdcc complains about bad c source code and + gives a good location of the error. + * support/valdiag/Makefile, + * support/valdiag/valdiag.py, + * support/valdiag/tests/* + +2004-01-06 Erik Petrich + + * src/SDCC.y (enum_specifier, enumerator_list, opt_assign_expr), + * src/SDCCsymt.c (newEnumType), + * src/SDCCsymt.h + * support/Util/SDCCerr.c, + * support/Util/SDCCerr.h: fixed bug #871258 and some other unreported + enum related bugs. + * support/regression/tests/enum.c: added test for enum values that + require at least 2 bytes of storage. + +2004-01-06 Vangelis Rokas + + * src/common.h: added ifndef/define/endif macros + around the header file. + Bug reported from Jesus Calvino-Fraga + +2004-01-06 Bernhard Held + + * sdcc.spec: updated + * device/include/Makefile.in: don't install CVS directories + * device/lib/Makefile.in: added removal of CVS directories after install + * doc/Makefile: fixed install, added local_icons + * sim/ucsim/gui.src/Makefile.in: fixed an old typo + * src/mcs51/gen.c (genRightShift): fixed bug #870788 + * src/ds390/gen.c (genRightShift): fixed bug #870788 + * src/SDCCast.c (decorateType): fixed bug #870781 + +2004-01-06 Vangelis Rokas + + PIC16 port related changes: + * device.c: removed pic16_finalMapping and pic16_finalMappingSize, + added variable stackPos, + + * gen.c: genCall, assignResultValue: added support for + pushing/retrieving function parameters to/from stack, + genFunction,genEndFunction: setup stack frame for the + generated function, + genAddrOf: will be changed according to bug 863624 + + * added files genutils.c and genutils.h which contain gen* + debugged and optimised functions extracted from gen.c + + * glue.c: added variable 'externs' which holds extern symbols, + pic16emitRegularMap: is modified to properly handle relocatable + symbols under the new scheme, + pic16createInterruptVect: is modified + pic16printPublics: is modified to emit 'global' assembler directives, + added pic16_printExterns to print extern symbols, + pic16glue: initializes stack/frame pointer in the beginning of + the assembly output. Temporary hack, will be corrected later, + because gplink yet does not support stack and SDCC does not + yet support a type of crt0.o object to create the final binary. + + * Removed many lines that contain 8051 legacy code. + * The code is finally placed under a 'code' directive. + * Added port specific options. + + * _process_pragma: simplified since now we do not need *special* + include file to define SFR registers. But a separate header + will be needed. This will be developed later. + * _pic16_parseOptions: added, parses port specific options: + --pgen-banksel, --obanksel=, --pomit-config-words, --pomit-ivt, + --pleave-reset-vector, --penable-stack, --pstack-model, --debug-xtra + --preplace-udata-with= + + * _pic16_setDefaultOptions: modified to initialize section names, + but hack is temporarly out of order since it needs improvement. + * _pic16_genAssemblerPreamble: configuration words are emitted by + their address instead of their name. This part is incomplete and + supports only the 18Fxx2 devices. Other devices will emit an error + during assembly since they do not contain the same set of config + registers + * _pic16_genIVT: is modified, + + * pcode.c: added definitions for some hardware registers that are needed + for stack support + * added flag is2LitOp and variable pci_magic in pCodeInstruction. + All PCI entries are updated. Now LFSR is supported. + * Removed pic16_pciTRIS is mentioned by mdubuc in source + * added pic16_newpCodeOpLit2 to support instructions with + two literal arguments + * pic16_pCode2str: corrected code that emits assembler instructions + with two literal operands and those that have an access bit modifier + * genericPrint: now PC_ASMDIR pCodes, can emit a label if it exists, + this fixes a bug which caused some labels to be lost, when an + assembler directive was added, i.e. banksel, + * pic16_FixRegisterBanking: improved logic that causes the insertion + of bank switching, + * InlineFunction: functions that are called once, are not any more + inlined. This can be a port option in the future, + + * pcode.h: added pCodeOpLit2 and added variable label in pCodeAsmDir + + * ralloc.c: added pic16_rel_udata and pic16_fix_udata variables which + hold the corresponding uninitialized symbols, + * pic16_allocProcessorRegister: registers have explicit marked the + accessBank field, + * pic16_allocInternalRegister: registers are explicit marked as + not used, + * pic16_writeUsedRegs: pic16_dynDirectBitRegs was missing from the + processing list, so bit registers were lost, + * + + * ralloc.h: added field 'accessBank' and original symbol operand + in register definition, + * removed the field isMapped from register definition, + + ** Several functions have been removed from various sources: + BanksUsedFlow2,BanksUsedFlow,FixBankFlow,InstructionRegBank, + pic16_addMemRange,pic16_isREGinBank,pic16_dump_map,pic16_dump_cblock + isSFR,validAddress,mapRegister,assignRegister,pic16_assignFixedRegisters + pic16_assignRelocatableRegisters + + ** others have been introduced: + pic16_areRegsSame,pic16_dump_section,checkAddReg,pic16_groupRegistersInSection + pic16_popGetLit2,pic16_popCombine2,pushw,pushaop + +2004-01-05 Vangelis Rokas + + * support/scripts/inc2h.pl: changed definition of BIT_AT + to emit 'sbit at' instead of 'bit at'. This was a request. + + PIC16 port related preliminary changes: + * gen.c: prefixed function popRegFromString with + pic16_ and all references to it corrected + * pcode.c: all pic16_pc_* hardware registers prefixed + with underscore (_), + pic16_popCopyGPR2Bit(): function sets register wasUsed=1 + * ralloc.c: newReg(): when register is REG_SFR then + set address to rIdx, + pic16_allocProcessorRegister(): marks register wasUsed=0 + pic16_writeUsedRegs(): added a call to assign processor + registers via pic16_assignFixedRegisters + +2004-01-04 Jesus Calvino-Fraga + + * as/mcs51/aslink.h, as/mcs51/lkarea.c, as/mcs51/lkdata.c, + as/mcs51/lkmain.c, as/mcs51/lkmem.c: 8051 linker can now pack + variables in unused register banks. Also the SSEG is placed + wherever there is enough space for it, and IDATA can be anywhere + in internal RAM. For now compile using -Wl-Y[stack_size]. + The mem file is different for this option as well, since it + makes no sense of talking about DSEG lenght. + +2004-01-02 Vangelis Rokas + + * src/SDCClrange.c: fixed bug 869095 that caused segfault + in certain cases, e.g. when ROM assignment, patch provided + from Albert den Haan. + +2004-01-01 Bernhard Held + + Many signedness and type propagation fixes: + * src/SDCCicode.c: made geniCodeCast() static + replaced SPEC_ by IS_ (cosmetic) + (operandOperation): fixed div and mod operation + (usualBinaryConversions): added support for promotion of char + (geniCodeMultiply): replaced (unsigned long) by (TYPE_UDWORD) + (geniCodeDivision): replaced (unsigned long) by (TYPE_UDWORD) + (geniCodeAdd): an array index will stay unsigned, even if promoted + from char to int + (geniCodeArray): ditto + * src/SDCCicode.h: made geniCodeCast() static: removed prototype + * src/SDCCsymt.c (computeType): added more support for char; + promotion of char is selectable by promoteCharToInt, fixed signedness + for all cases + (powof2): replaced (unsigned long) by (TYPE_UDWORD) + * src/SDCCsymt.h (powof2): replaced (unsigned long) by (TYPE_UDWORD) + * src/SDCCval (val*): replaced signedness calculation by + computeType() + rearranged if-branches (cosmetic) + (valShift): added warning W_SHIFT_CHANGED + (valCompare): fixed problem with different types + * src/hc08/rallo.c (leastUsedLR): fixed gcc 3.3 warning + * support/regression/tests/literalop.c: added many cases + * support/regression/tests/ast_constant_folding.c: changed finally to + 'unsigned int' + * .version: new year, new version: 2.3.7 + * src/SDCCmain.c (main): applied patch #866468 + * debugger/mcs51/sdcdb.c (parseCmdLine): added -k for ucsim, patch + provided by Scott Bronson + * doc/sdccman.lyx: updated documentation for sdcdb + updated and added chapter tips + +2004-01-01 Erik Petrich + + * src/SDCCsymt.h: missing from yesterday's commits + +2003-12-31 Erik Petrich + + * src/SDCC.y (struct_or_union_specifier), + * support/Util/SDCCerr.c, + * support/Util/SDCCerr.h: verify that struct & union tags are used + as declared. + +2003-12-29 Erik Petrich + + * src/SDCCglobl.h: missing from yesterday's commits + +2003-12-28 Erik Petrich + + * src/SDCC.y (external_definition, type_specifier2, sfr_reg_bit, + sft_attributes, struct_declaration, parameter_declaration, + type_name, start_block, declaration_list), + * src/SDCC.lex (check_type): support redefinition of typedef names + +2003-12-22 Frieder Ferlemann + + * src/mcs51/gen.c (genPlus): added special handling for 256 byte + aligned xdata arrays. Erik helped me with the if clause. + +2003-12-20 Erik Petrich + + * device/lib/ds390/tinibios.c (CpuSpeed): suppress unreachable code + warning + +2003-12-20 Erik Petrich + + * src/SDCCast.h, + * src/SDCCast.c (newAst_), + * src/SDCCicode.h, + * src/SDCCicode.c (ast2iCode, newiCode), + * src/SDCCglobl.h, + * src/SDCC.y (logical_and_expr, logical_or_expr, conditional_expr, + expr, statement, expression_statement, selection_statement, + iteration_statement, expr_opt, jump_statement): foundation for tracking + sequence points + * src/SDCCopt.c (killDeadCode): fixed bug #861580 (needs the sequence + point code too) + +2003-12-19 Erik Petrich + + * support/Util/SDCCerr.c, + * src/SDCCast.h, + * src/SDCCast.c (createCase, createDefault, decorateType), + * src/SDCClabel.c (labelUnreach), + * src/SDCC.y (labeled_statement, jump_statement): More improvements + to error messages. + * support/Util/SDCCerr.c (werrorfl): fixed a non-standard declaration + (with thanks to Stas Sergeev) + * device/include/time.h, + * device/lib/time.c (CheckTime): suppress unreachable code warning + +2003-12-18 Erik Petrich + + * src/SDCCast.c (createIvalCharPtr), + * src/SDCCglue.c (printChar): fixed bug #862241 (an error in my fix for + bug #753752) + * support/regression/tests/nullstring.c: tests for these two bugs + +2003-12-18 Erik Petrich + + * support/Util/SDCCerr.h, + * support/Util/SDCCerr.c (E_NOT_ALLOWED), + * src/SDCC.y (struct_declaration, struct_or_union_specifier): complain + about storage class and 'at' used inside struct or union + * src/SDCCBBlock.c (iCodeFromeBBlock), + * src/SDCCcse.c (ifxOptimize), + * src/SDCCglue.c (emitRegularMap, initPointer, printIvalStruct, + printIvalArray, printiValFuncPtr, printIvalCharPtr, printIvalPtr, + printIval, emitStaticSeg, emitOverlay), + * src/SDCClabel.c (deleteIfx), + * src/SDCCopt.c (replaceRegEqv, eBBlockFromiCode), + * src/SDCCast.c (resolveSymbols, createIvalStruct, createIvalArray, + gatherAutoInit, processParms), + * support/Util/SDCCerr.h, + * support/Util/SDCCerr.c (werrorfl): Support for better error location + reporting for post-parse errors. + +2003-12-16 Erik Petrich + + * src/SDCCval.c (valPlus, valMinus, valShift): fixed some problems with + implicit casts via union; they don't work on big endian systems + (possible fix for bug #861138) + +2003-12-16 Frieder Ferlemann + + (committed by Erik Petrich on Frieder's behalf) + * src/mcs51/main.c: fixed the fix for bug #737001 + +2003-12-15 Borut Razem + + * support/scripts/sdcc.nsi: updated for NSIS 2.0 beta 4 + +2003-12-14 Erik Petrich + + * support/makebin/makebin.c: put output in binary mode + +2003-12-13 Frieder Ferlemann + + * src/mcs51/main.c: fixed bug #737001 for the mcs51. SDCC clears + xdata and data memory on startup. Set the environment variable + SDCC_NOGENRAMCLEAR to disable this. + * src/mcs51/peephole.def, + * src/ds390/peephole.def: using the atomic test and clear instruction jbc + (allows non-interrupt and interrupt code to safely compete for a resource + without the non-interrupt code having to disable interrupts) + +2003-12-13 Erik Petrich + + * src/SDCCicode.c (geniCodeAdd), + * src/SDCCast.c (decorateType): fixed bug #857753 (need to be careful + with valFromType if type might be a pointer and host is big endian). + * src/SDCCast.c (decorateType): unary plus compatible with all arithmetic + types, not just integer types. + * src/SDCCsymt.c (addSymChain): clarified error message when symbol is + multiply defined with mismatching "at" address. + +2003-12-12 Erik Petrich + + * src/ds390/main.c (PORT tininative_port): fixed bug #858416 + * src/SDCCglue.c (printChar, printIvalChar, emitStaticSeg), + * src/SDCCast.c (createIvalCharPtr, stringToSymbol): handle strings + with embedded nulls (fixed bug #753752) + +2003-12-12 Frieder Ferlemann + + * src/mcs51/main.c(_mcs51_genRAMCLEAR): using r0 instead of r1/r2. + Apparently this did not see much testing (endless loop) + +2003-12-11 Erik Petrich + + * src/z80/ralloc.c: set DISABLE_PACK_HL = 1 as a temporary fix to bug #855165 + +2003-12-10 Erik Petrich + + * src/SDCCdebug.c (outputDebugSymbols, outputDebugStackSymbols, dumpSymInfo): + gracefully handle NULL memmap pointers + +2003-12-08 Erik Petrich + + * src/SDCCopt.c (killDeadCode): change iCode type to DUMMY_READ_VOLATILE + instead of deleting the iCode when an operand is volatile + * src/z80/gen.c (genDummyRead), + * src/mcs51/gen.c (genDummyRead), + * src/ds390/gen.c (genDummyRead), + * src/hc08/gen.c (genDummyRead): handle operands in IC_LEFT and/or IC_RIGHT, + not just IC_RIGHT + * src/SDCCicode.c (geniCodeCall): fixed bug #851607 + * src/SDCC.y: fixed bug #850420 + +2003-12-05 Erik Petrich + + Applied z80 i/o port patch from Peter Townson and fixed some operators + to better handle operands in A register. + * device/include/z180.h + * src/SDCC.y + * src/SDCCglue.c + * src/z80/gen.c + * src/z80/gen.h + * src/z80/main.c + * src/z80/peeph-z80.def + * src/z80/peeph.def + * src/z80/z80.h + +2003-12-03 Erik Petrich + + * src/SDCCsymt.c (addSymChain, compareTypeExact): fixed bug #838241 again + +2003-12-01 Erik Petrich + + * device/lib/hc08/_mullong.c: Removed extra #endif + +2003-12-01 Erik Petrich + + * sim/ucsim/hc08.src/inst.cc, + * sim/ucsim/hc08.src/hc08mac.h: fixed some problems with CC flag bits and + carries from x to h + * src/hc08/gen.c (aopAdrStr): fixed problem with 16 bit immediate + * src/hc08/gen.c (XAccRsh): fixed problem with right shift + * device/include/stdarg.h: fixed varargs for hc08 + * device/lib/Makefile.in, + * device/lib/hc08/Makefile, + * device/lib/hc08/_mulint.c, + * device/lib/hc08/_mullong.c: fixed some endian problems + +2003-11-28 Frieder Ferlemann + + * sdcc/src/mcs51/gen.c (genMultOneByte): help peephole 105 + * sdcc/src/mcs51/peeph.def: added peephole 186.e array access in code space + * device/lib/_gptrget.c, + * device/lib/_gptrput.c: P2 not used any more (related to #850747, #785979) + +2003-11-27 Erik Petrich + + * src/SDCClrange.c (findNextUseSym, rlivePoint): fixed bug #849795 + * src/SDCCast.c (astErrors): fixed bug #846007 + * src/SDCCsymt.c (checkFunction): fixed follow-up bug on bug #846007 + +2003-11-26 Erik Petrich + + * src/SDCCast.c (decorateType): disabled a transformation I added in + revision 1.188 (access to fields of a structure at an absolute address); + it breaks with bitfields, extern declarations, and gcse analysis. + * src/SDCCopt.c (isLocalWithoutDef): if ADDRESS_OF applied to a symbol, it + could be assigned through a pointer, so don't complain. + * src/SDCCast.c (astErrors), + * src/SDCCast.h, + * src/SDCCglue.c (emitRegularMap): fixed bug #847813 + +2003-11-26 Vangelis Rokas + + * src/pic16/main.c (_pic16_genIVT): fixed interrupt vector table + * src/pic16/main.c (_pic16_genAssemblerPreamble): re-enabled the + output of __config directives, since gpasm now supports them + * src/pic16/main.c (_pic16_finaliseOptions): define MCU + pre-processor macro, i.e. -DMCU=p18f452 + * src/pic16/ralloc.c: renamed packRegisters to pic16_packRegisters, + and modified to handle 'cast' icode similarly to '=' icode + * src/pic16/device.h (typedef struct PIC_device): added field + 'extMIface' to indicate that chip has external memory interface + * src/pic16/device.c: added chips 18F248, 18F258, 18F448, 18F458, + 18F6520, 18F6620, 18F6680, 18F6720, 18F8520, 18F8620, 18F8680, + 18F8720 + +2003-11-26 Erik Petrich + + * src/SDCC.y (pointer): fixed bug #846006 + * support/Util/SDCCerr.c: made W_PTR_TYPE_INVALID message clearer + * src/SDCCast.c (decorateType): fixed bug #846009 + * src/ds390/peeph.def, + * src/ds390/gen.c (genAnd, genOr), + * src/mcs51/peeph.def, + * src/mcs51/gen.c (genAnd, genOr): fixed bug #846777 + +2003-11-25 Erik Petrich + + Fixed several common-sub-expression bugs (#772861, #768380, & #755323) + * src/SDCCdflow.c + * src/SDCCcse.c + * src/SDCCcse.h + * src/SDCCBBlock.h + * src/SDCCBBlock.c + +2003-11-23 Klaus Flittner + + fixed bug #845089 + * src/SDCCbitv.h, + * src/SDCCbitv.c: added function to free a bitvector + * src/SDCClrange.h, + * src/SDCClrange.c: added function to recompute the liveranges + * src/avr/ralloc.c, + * src/ds390/ralloc.c, + * src/hc08/ralloc.c, + * src/mcs51/ralloc.c, + * src/pic/ralloc.c, + * src/pic16/ralloc.c, + * src/xa51/ralloc.c, + * src/z80/ralloc.c: recompute the liveranges after register packing + +2003-11-21 Klaus Flittner + + * src/SDCCloop.c (newInduction): fixed bug #845630 + +2003-11-21 Erik Petrich + + * src/SDCCsymt.c (compareTypesExact): disabled debugging output + inadvertantly left behind from my 2003-11-12 change + +2003-11-20 Erik Petrich + + Updated headers I neglected to commit yesterday. + * src/SDCClrange.h, + * src/SDCCicode.h + +2003-11-19 Erik Petrich + + * src/SDCCcse.c (algebraicOpts): fixed bug #773153 + * src/SDCClrange.c (rlivePoint): need to mark IC_RESULT used if POINTER_SET op + * src/SDCCopt.c (eBBlockFromiCode), + * src/SDCClrange.c (hashiCodeKeys, sequenceiCode, computeLiveRanges): seperated + the creation of the key hash table from the sequencing so it can be used + earlier (for some GCSE bug fixes still pending) + +2003-11-15 Frieder Ferlemann + + * src/mcs51/gen.c (genPlus): generate shortcut for adding 0xab00 + * support/regression/tests/addsub.c: testing genPlus shortcut + +2003-11-15 Borut Razem + + * src/SDCCmain.c: fixed bug #841645: -MM command line option passed to sdcpp + +2003-11-15 Erik Petrich + + * src/SDCCcse.c (cseBBlock): fixed bug #527779 + * src/SDCCcse.c (deleteGetPointers): rewrote so that the set + ordering is immaterial. + * src/SDCCdflow.c (mergeInExprs): fixed bug #587536 + +2003-11-14 Erik Petrich + + * src/SDCCicode.c (geniCodeAddressOf): fixed part of bug #840381 + * src/SDCCopt.c (replaceRegEqv, isLocalWithoutDef): fixed other part + (SIGSEV) of bug #840381 + * src/SDCCmain.c (linkEdit, assemble): fixed bug #841606 (don't + unlink new file before rename if new and old filenames are the same) + +2003-11-13 Frieder Ferlemann + + * src/mcs51/main.c: started fixing bug #737001 (SDCC not clearing + uninitialized variables) for the mcs51. Set environment variable + SDCC_GENRAMCLEAR to test. + xdata initialization slightly shorter + +2003-11-12 Erik Petrich + + * src/SDCCsymt.h, + * src/SDCCsymt.c (addSymTypeChain, compareTypesExact): fixed bugs + #838241 & 780691 (basicly the same bug) + * src/SDCCBBlock.c (iCode2eBBlock): fixed bug #840148 + * src/SDCCBBlock.c (iCodeFromeBBlock): fixed bug #840162 + +2003-11-11 Bernhard Held + + * src/SDCCmain.c (linkEdit): "fix" #834252 + +2003-11-11 Erik Petrich + + * src/SDCCast.c (removePostIncDecOps, removePreIncDecOps), + * src/SDCCast.h, + * src/SDCC.y: fixed bug #819403 + +2003-11-08 Erik Petrich + + * support/regression/fwk/lib/testfwk.c: printn is recursive and thus needs + the reentrant attribute. + * src/hc08/gen.c (genPackBits): added missing stack readjustment + * sim/ucsim/hc08.src/inst.cc (inst_mov): fixed bugs with mov instruction + simulation + * src/SDCCast.c (decorateType): fixed bug with storage class not being + updated during pointer dereference; f.e. ~(((char *)1)*) was being + erroneously reduced to a literal. + * src/hc08/ralloc.c (packRegisters, rematStr), + * src/hc08/gen.c (aopForRemat): allow literals to be rematerialized in + some cases + +2003-11-08 Frieder Ferlemann + + * src/mcs51/main.c: fixed bug #838385. Thanks to Josef Pavlik for finding and fixing + * doc/sdccman.lyx: changed from 'article' to 'book' + * doc/Makefile: readded test_suite_spec and cdbfileformat + +2003-11-08 Bernhard Held + + * device/include/stdlib.h: include malloc.h to comply with ANSI + * support/regression/tests/malloc.c: include stdlib.h instead of malloc.h + +2003-11-07 Frieder Ferlemann + + * doc/Makefile: sdccman.pdf should build with correct references (more info in commit msg) + * doc/clean.mk: also remove *.out files + * doc/sdccman.lyx: some additions, larger top/bottom margins + +2003-11-07 Erik Petrich + + * src/SDCC.y: fixed bug #837365 + * support/regression/tests/bitopcse.c + * src/hc08/gen.c (genPointerGet): Don't assume pointer operand is + a symbol (might be valop instead) + * device/lib/Makefile.in: added errno.c to HC08SOURCES + * device/lib/clean.mk: added hc08 to the cleaning list + +2003-11-04 Borut Razem + + * configure, configure.in, sdcc_vc_in.h, sdcconf_in.h: reverted changes, + made 2003-11-04 + * support/Util/NewAlloc.c, as/hc08/lklibr.c, as/mcs51/lklibr.c, + as/z80/aslist.c, as/z80/assym.c: removed inclusion of nonstandard malloc.h; + malloc is declared in standard stdlib.h + +2003-11-06 Erik Petrich + + * device/lib/hc08/Makefile: need to clean .rel not .o files + * src/hc08/gen.c (genDjnz): can't use djnz with extended addressing mode + +2003-11-06 Erik Petrich + + * src/port.h, + * src/hc08/main.c, + * src/mcs51/main.c, + * src/ds390/main.c, + * src/z80/main.c, + * src/avr/main.c, + * src/pic/main.c, + * src/pic16/main.c, + * src/xa51/main.c: added hasExtBitOp & oclsExpense functions to ports + * src/SDCCicode.c: changed several IS_FARSPACE tests to isOclsExpensive + tests (which uses the port's oclsExpense function) + * src/SDCC.y, + * src/SDCCast.c, + * src/SDCCicode.c, + * src/hc08/gen.c, + * src/ds390/gen.c, + * src/mcs51/gen.c: added support for the SWAP iCode (RFE #834167) + +2003-11-04 Erik Petrich + + * src/SDCCcse.c (ifxOptimize), + * src/SDCClabel.c (labelIfx, deleteIfx): When the condition to + an IFX iCode is volatile, convert to DUMMY_READ_VOLATILE instead + deleting the IFX iCode. + * src/hc08/ralloc.c: reduced unneeded slocs + * src/hc08/gen.c: fixed bug in asmopToBoolean + +2003-11-04 Borut Razem + + * configure, configure.in, sdcc_vc_in.h, sdcconf_in.h, + support/Util/NewAlloc.c, as/hc08/lklibr.c, as/mcs51/lklibr.c, + as/z80/aslist.c, as/z80/assym.c: decision to include malloc.h + transferred to configure + +2003-11-03 Bernhard Held + + Use headers defined in the C[++] standards: + * sim/ucsim/gui.src/serio.src/fileio.cc + * sim/ucsim/gui.src/serio.src/frontend.cc + * sim/ucsim/gui.src/serio.src/main.cc + * sim/ucsim/gui.src/serio.src/posix_signal.cc + * support/Util/NewAlloc.c + * as/hc08/lklibr.c + * as/mcs51/lklibr.c + * as/z80/aslist.c + * as/z80/assym.c + +2003-11-03 Jesus Calvino-Fraga + + * Added MSVC projects for hc08 assembler and linker: + all.dsp, config.dsp, sdcc.dsw, /as/hc08/as_hc08.dsp, + /as/hc08/link_hc08.dsp + +2003-11-03 Martin Helmling + + * debugger/mcs51/cmd.c: allows filename starting with digit(+ some debug) + +2003-11-02 Bernhard Held + + * src/SDCCmain.c (linkEdit): "fixed" again bug #833605 + +2003-11-01 Frieder Ferlemann + + * src/mcs51/main.c: xdata initialization is 13 bytes shorter now + +2003-10-31 Borut Razem + + * support/cpp2/cpplib.h, + support/cpp2/cpplib.c, + support/cpp2/cpplex.c, + support/cpp2/cppinit.c: introduced #pragma preproc_asm [ + | - ] + to switch _asm block preprocessing on / off. Default is + #pragma preproc_asm + + +2003-10-31 Borut Razem + + * support/cpp2/cpplex.c: Fixed _WIN32 problem with CR-CR-LF sequences + when outputting comment blocks (when executed with -C option) and + _asm (SDCPP specific) blocks + +2003-10-31 Erik Petrich + + * as/hc08/lkrloc.c (relr): Fixed ihx output, fixed lastAreaIndex warning + +2003-10-31 Klaus Flittner + + * src/SDCCcse.c (updateSpillLocation): fixed bug #808027 + +2003-10-31 Bernhard Held + + * src/SDCCmain.c (linkEdit): "fixed" bug #833605 + * src/SDCCast.c (decorateType): fixed bug #832664 + +2003-10-31 Borut Razem + + * support/cpp2/cpplex.c: fixed for SDCPP: + comments(when executed with -C option) and _asm blocks + were included even if they where in skipped #if block. + Applied solution from GCC cpp 3.3.2 + +2003-10-31 Borut Razem + + * src/SDCC.lex: sdcc now understands both formats: + '# ' and + '#line ' + * support/cpp2/cppmain.c: sdcpp now generates the standard + '# ' instead of former + '#line ' + +2003-10-30 Borut Razem + + * support/cpp2/cpphash.h, + * support/cpp2/cpplib.h + * support/cpp2/cpplex.c, + * support/cpp2/cppmain.c, + * support/cpp2/cppinit.c: fixed bug #828015 - Syntax variation for _asm character constants + +2003-10-30 Erik Petrich + + Fixed a number of problems revealed by bug #827883. + * src/SDCCloop.c (loopInvariants): Spill location of the + result operand should be recomputed if extracted from + a loop. Also, don't extract assignments of an iTemp + from a literal. + * src/SDCCast.c (isConformingBody): loop reversal should + not occur if the control variable is involved with a + relational operator. + +2003-10-28 Bernhard Held + + * .version: bumped to 2.3.6 to reflect the big improvements + made by Erik and Klaus. Thanks! + +2003-10-28 Klaus Flittner + + Replaced the livrange code. + * src/SDCClrange.c: added new LR code + * src/SDCCloop.c, + * src/SDCCBBlock.h: removed remainig parts from old LR code + * src/ds390/ralloc.c, + * src/ds390/gen.c: minor fixes to make it work with new code + +2003-10-28 Erik Petrich + + * as/hc08/asm.h, + * as/hc08/lkrloc.c, + * src/hc08/gen.c, + * src/hc08/ralloc.c: Fix various warnings related to the hc08 + * src/SDCCicode.c (geniCodePreInc, geniCodePreDec): Fixed bug #829717 + (tweaked fix for bug #818696) + +2003-10-23 Erik Petrich + + * src/z80/ralloc.c (joinPushes): Fixed bug #828742 + +2003-10-23 Erik Petrich + + * src/SDCCmain.c, + * sdccconf_in.h: Fixed bug #828387 (--disable-hc08-port didn't work) + * src/mcs51/gen.c (gencjneshort), + * src/ds390/gen.c (gencjneshort): Made comparison with AOP_IMMD operand + more efficient (per Scott Bronson's suggestion) + +2003-10-22 Erik Petrich + + Extended the semantics of the critical keyword to include + individual statements. See RFE #827755 and #799831 + * src/SDCC.y + * src/SDCCicode.c + * src/SDCCopt.c + * src/SDCCast.c + * support/Util/SDCCerr.c + * support/Util/SDCCerr.h + * src/mcs51/gen.c + * src/ds390/gen.c + * src/hc08/gen.c + +2003-10-19 Borut Razem + + * src/SDCC.lex: fixed bug #825944 - defined yytext_ptr to make it compile with flex 2.5.31 + +2003-10-19 Erik Petrich + + * src/SDCCicode.c (geniCodePreInc, geniCodePreDec, ast2iCode): + Fixed bug #818696 + * src/SDCCast.c (ast_print): Fixed --dumptree so that preincrement + and predecrement operand is displayed + +2003-10-13 Bernhard Held + + * src/SDCCval.c (valMinus): fixed bug #826041 + +2003-10-15 Erik Petrich + + Some hc08 related updates that I missed earlier + * sim/ucsim/stypes.h + * support/regression/ports/hc08/spec.mk + +2003-10-15 Erik Petrich + + New target "hc08" for the Motorola 68hc08 family of micros + + * configure + * configure.in + * Makefile + * src/hc08/* + * src/SDCCmain.c + * src/port.h + * sim/ucsim/hc08.src/* + * sim/ucsim/configure.in + * src/ucsim/configure + * sim/ucsim/packages_in.mk + * as/hc08/* + * as/Makefile + * device/include/mc68hc908qy.h + * device/lib/hc08/* + * device/lib/Makefile.in + * support/regression/ports/hc08/* + * support/regression/Makefile + +2003-10-14 Erik Petrich + + * src/z80/gen.c: fixed bug revealed by ast_constant_folding.c + regression test + * src/ds390/gen.c (genCast): fixed bug #821957 + +2003-10-13 Bernhard Held + + * device/lib/logf.c: "fixed" overlay bug + * support/regression/ports/host/spec.mk: added m library + * support/regression/ports/mcs51-stack-auto/spec.mk: added float funcs + * support/regression/tests/float_trans: added (for Eric) + +2003-10-12 Bernhard Held + + * src/mcs51/gen.c (genCpl): fixed bug + http://sf.net/mailarchive/message.php?msg_id=6263915 + +2003-10-10 Bernhard Held + + * src/SDCCast.c (decorateType): added extended constant folding + * src/SDCCsymt.c (computeType): cleanup + * src/SDCCval.c (valShift): minor optimization + * support/regression/tests/ast_constant_folding.c: added + +2003-10-09 Erik Petrich + + * src/SDCCmain.c: removed some unintended changes + +2003-10-09 Erik Petrich + + * src/SDCCmain.c (setParseWithComma): fixed bug #816685 + * src/z80/gen.c: fixed part of bug #817589 + * src/SDCCsymt.c (checkFunction): fixed bug #817895 + +2003-10-08 Bernhard Held + + Replaced cast (void **) with (void *) to avoid gcc 3 warning: + * src/SDCCcflow.c + * src/SDCCcse.c + * src/SDCCdflow.c + * src/SDCClabel.c + * src/SDCClrange.c + * src/SDCCmem.c + * src/SDCCopt.c + * src/SDCCpeeph.c + * src/SDCCset.c + * src/avr/ralloc.c + * src/ds390/ralloc.c + * src/izt/ralloc.c + * src/mcs51/ralloc.c + * src/pic/ralloc.c + * src/pic16/ralloc.c + * src/xa51/ralloc.c + * src/z80/ralloc.c + * src/z80/gen.c: removed unused label "release:" + +2003-10-06 Borut Razem + + * src/SDCC.lex: removed definition of unused variables + save_optimize and save_options + +2003-10-06 Bernhard Held + + * clean.mk: removed '=' in "-maxdepth=1" + * src/SDCCloop.c: replace LRKLAUS with SDCC_LRKLAUS + * src/SDCClrange.c: replace LRKLAUS with SDCC_LRKLAUS + +2003-10-06 Borut Razem + + * src/SDCC.lex, src/SDCC.lex: use dbuf for "_asm" definitions; + my_unput() replaced by unput() + +2003-10-05 Bernhard Held + + * src/SDCCloop.c (assignmentsToSym, loopInduction): cast argument of + setToNull() to (void *) to avoid gcc3.x's warning: "dereferencing + type-punned pointer will break strict-aliasing rules" + Old LR behaviour is again default; Klaus' LR can be choosen by + defining the environment variable LRKLAUS + * src/SDCCBBlock.h + * src/SDCCloop.c + * src/SDCClrange.c + * src/ds390/ralloc.c (spillThis): applied Klaus' patch + * clean.mk: fixed removal of files in bin/CVS/ + * device/lib/clean.mk: fixed removal of directories small and large + * support/Util/SDCCerr.c: changed W_INT_OVL to ERROR_LEVEL_PEDANTIC + * src/SDCCicode.c, + * src/SDCCval.c: removed superflous test for pedantic + +2003-10-05 Borut Razem + + * src/SDCC.lex, support/Util/SDCCerr.c, sdcc/support/Util/SDCCerr.h: + Fixed bug #816692: introduced new ERROR_LEVEL_PEDANTIC warning + message "unmatched #pragma SAVE and #pragma RESTORE" + +2003-10-04 Frieder Ferlemann + + * doc/sdccman.lyx: various additions and updates (interrupts, inline + assembly, critical functions, atomic, nojtbound) + +2003-10-04 Bernhard Held + + Applied liferange patch from Klaus Flittner + * src/SDCCBBlock.h + * src/SDCCloop.c + * src/SDCCloop.h + * src/SDCClrange.c + +2003-10-03 Erik Petrich + + * src/z80/gen.h, + * src/z80/gen.c (aopOp, aopGet, aopPut, genDummyRead), + * src/mcs51/gen.h + * src/mcs51/gen.c (aopOp, aopGet, aopPut, genDummyRead), + * src/ds390/gen.h + * src/ds390/gen.c (aopOp, aopGet, aopPut, genDummyRead), + * src/SDCCicode.c (ast2iCode, geniCodeDummyRead): Fixed bug #663539 + * src/SDCCopt.c (killDeadCode): Fixed bugs #663539 & #816705 + +2003-10-02 Erik Petrich + + * src/z80/gen.c (genRet): fixed bug #524753 + * src/z80/gen.c (genCast): fixed internal error on cast from + pointer to long + * src/z80/gen.c (_saveRegsForCall, emitCall): adapted Johan's + fix for bug #477835 to the z80 + * src/z80/gen.c (genZ80code, _vemit2, _emit2): added support + for tracking iCodes in the peephole optimizer for z80 + +2003-10-01 Erik Petrich + + * src/SDCCicode.c (geniCodeJumpTable, geniCodeSwitch): fixed + the other part of bug #814548 + * src/SDCCpeeph.c (labelInRange): fixed bug #814558 + +2003-09-30 Bernhard Held + + * src/SDCCcse.c: fixed part of bug #814548 + +2003-09-28 Borut Razem + + * src/asm.c: rewrite of printILine() to use temporary file instead + a pipe + * src/xa51/main.c: commented out declaration of int rewinds + +2003-09-27 Erik Petrich + + * src/SDCCicode.c (geniCodeJumpTable): Fixed bug #813206 + +2003-09-26 Erik Petrich + + * src/SDCCdflow.c (computeDataFlow): Fixed bug #810746 + * src/asm.c (printILine): Fixed bug #811015 + +2003-09-22 Jesus Calvino-Fraga + + *link/z80/lklibr.c, as/mcs51/lklibr.c: Improved memory allocation and + freeing. + +2003-09-21 Erik Petrich + + * src/z80/gen.c (setupToPreserveCarry): Fixed bug #796955 + * src/z80/gen.c (setupPair, genMovePairPair): Fixed setupPair + to correctly handle general case of AOP_PAIRPTR + * src/z80/gen.c (aopGet, aopPut): Generalized AOP_PAIRPTR handling + +2003-09-21 Erik Petrich + + * src/mcs51/ralloc.c (fillGaps), + * src/ds390/ralloc.c (fillGaps): fixed bug #810093 (yet another + register positioning bug) + +2003-09-21 Bernhard Held + + * device/lib/_fsdiv.c: replaced (1<<31) by (1ul<<31) + +2003-09-19 Erik Petrich + + * src/mcs51/gen.c (loadDptrFromOperand, genFarPointerGet, + genCodePointerGet, genGenPointerGet, genFarPointerSet, + genGenPointerSet): handle AOP_DPTR correctly when loading dptr + (ralloc doesn't intentionally do this now, but perhaps later) + * src/mcs51/ralloc.c (serialRegAssign, fillGaps), + * src/ds390/ralloc.c (serialRegAssign, fillGaps): fixed some + register positioning bugs (Fixed bug #762602 and #795325) + * src/SDCCicode.c (geniCodeDerefPtr): Track output class correctly + (Fixed bug #808779) + * src/z80/gen.c: increased _vemit2's buffer[] to handle long + lines that --i-code-in-asm generates + +2003-09-18 Jesus Calvino-Fraga + + *link/z80/lklibr.c, as/mcs51/lklibr.c: Fixed Linux segfaults when + trying to fclose a FILE* that was already closed. + +2003-09-18 Erik Petrich + + * src/SDCCsymt.c (structElemType): fixed bug #808291 (members + of const struct should be treated as if const themselves) + +2003-09-18 Bernhard Held + + * src/SDCCval.c (valPlus, valMinus): fixed bug #808337 + +2003-07-06 Jesus Calvino-Fraga + + * support/librarian/sdcclib.c: Generate correct offsets for libraries with + Unix (/n) and DOS (/r/n) line terminations. + +2003-09-17 Erik Petrich + + * src/SDCCopt.c (cnvFromFloatCast, cnvToFloatCast): fixed + bug #613775 + +2003-09-16 Erik Petrich + + * src/mcs51/gen.c (genFunction, genEndFunction), + * src/ds390/gen.c (genFunction, genEndFunction): Moved save + and restore of EA so that stack offsets to parameters are + correct when using both critical and reentrant/stack-auto. + * src/z80/gen.c (aopOp): removed erroneous assertion about sloc + size (can be triggered in error if sloc is shared between + different sized objects) + * device/include/float.h: fixed macros to explicitly use + unsigned long where needed + +2003-09-15 Bernhard Held + + Feature req. 799831: added code to allow nesting of critical functions + * src/mcs51/gen.c (genFunction, genEndFunction) + * src/ds390/gen.c (genFunction, genEndFunction) + +2003-09-14 Erik Petrich + + * src/SDCCsymt.c (sclsFromPtr), + * src/SDCCsymt.h, + * src/SDCCast.c (decorateType): fixed bug #462971. Also, better + support for standard C idiom of memory mapped variables; for + example, *((xdata int*)0x1234) = 1 is now internally equivalent + to xdata int at 0x1234 tempvar = 1. + * sim/ucsim/z80.src/inst_xd.cc: fixed bug #805483 with patch + provided by Akiya ISHIDA + +2003-09-13 Bernhard Held + + * src/SDCCval.c (cheapestVal): reenabled to reduce int to char + * src/SDCCval.c (constVal): added reduction from int to char + * src/SDCCval.c (valMult, valDiv): fixed sign handling + * src/SDCCval.c (valShift): fixed after change of cheapestVal() + * src/SDCCval.c (valCompare): fixed EQ_OP and NE_OP; they have + to ignore the sign + * support/regression/tests/shifts.c: fixed + +2003-09-13 Erik Petrich + + * src/z80/gen.c (genXor): Fixed bug #805445 + +2003-09-12 Erik Petrich + + Fixed bug #621531 (const & volatile confusion in the type chain). + DCL_PTR_CONST, DCL_PTR_VOLATILE, & IS_PTR_CONST now exclusively + refer to the const or volatile state of the pointer itself. + + * src/SDCCast.c + * src/SDCCglue.c + * src/SDCCicode.c + * src/SDCCsymt.c + * src/SDCCval.c + * src/SDCC.y + * src/SDCCsymt.h + * src/pic/gen.c + * src/pic/ralloc.c + * src/pic16/gen.c + * src/pic16/ralloc.c + * support/regression/tests/const.c + +2003-09-10 Jesus Calvino-Fraga + + When checking for duplicated modules, use absolute paths + instead of relative paths. Files changed: + + * as/mcs51/lklib.c + * link/z80/lklib.c + +2003-09-09 Erik Petrich + + * src/SDCCicode.c (geniCodeLogic): fixed bug #797572 + +2003-09-07 Erik Petrich + + * device/include/string.h: added size_t typedef, changed + prototypes to use size_t, eliminated separate reentrant and + non-reentrant declarations, added _memmove declaration + * device/lib/_memcpy.c: changed to use size_t instead of int, + changed /4 to >>2 to avoid division library call + * device/lib/_memcmp.c, + * device/lib/_memset.c, + * device/lib/_strncat.c, + * device/lib/_strncpy.c, + * device/lib/_strncmp.c: changed to use size_t instead of int + * device/lib/_memmove.c: new file (fixed bug #772294) + * device/lib/Makefile.in: added _memmove.c + * device/lib/z80/asm_strings.s: fixed bug #772290 + * support/regression/tests/bitfields.c: attempt to fix host assertion + failure on amd64-unknown-linux2.2 + +2003-09-06 Erik Petrich + + * src/z80/gen.c (aopPut, spillPairReg): fixed bug #800998 + * src/z80/gen.c (genFunction, genEndFunction): fixed "bug" #774700 + * as/z80/asmain.c (main): fixed bug #801766 + +2003-09-06 Bernhard Held + + * src/SDCCicode.c (ast2iCode): fixed differences in iCode with different + compilers + +2003-09-05 Erik Petrich + + * src/SDCCast.c (isConformingBody): fixed loop reversal bug + reported in bug #800609 + +2003-09-04 Vangelis Rokas + + * Top header beautifications in src/pic16 directory: + device.c, device.h, gen.c, gen.h, genarith.c, glue.c, pcode.c, + pcodeflow.c, pcodeflow.h, pcode.h, pcodepeep.c, pcoderegs.c, + pcoderegs.h, ralloc.c, ralloc.h + * main.c: added top header and GPL license notice + * pcode.c: fixed the if-conditional warning + +2003-09-04 Bernhard Held + + * device/lib/_mullong.c: replaced int by short for gcc + +2003-08-31 Erik Petrich + + * src/SDCCpeeph.c (notVolatile, notVolatileVariable): handle IFX + and JUMPTABLE iCodes properly now (worked by accident before) + * src/mcs51/gen.c (leftRightUseAcc), + * src/ds390/gen.c (leftRightUseAcc): handle IFX and JUMPTABLE + iCode properly now. Use getSize instead of nRegs since a & b + aren't part of the nRegs tally. + +2003-08-31 Vangelis Rokas + + * src/pic16/main.c: corrected offsets of interrupt vectors in _pic16_genIVT() + * src/pic16/pcode.c: fix to disable inserting BANKSEL directive + before instructions that use the _STATUS register + +2003-08-31 Bernhard Held + + * src/mcs51/gen.c (freeAsmop): fixed off by one in stack offset (AOP_STK) + * src/mcs51/gen.c (genNearPointerSet): added missing opcode for + fetching of the pointer + * src/mcs51/gen.c (genNearPointerGet): added reuse of PREG, + copied from genNearPointerSet() + * src/mcs51/gen.c (genNearPointerGet): don't pop r0/r1, if RESULTONSTACK + * src/mcs51/gen.c: changed order of freeAsmop(left/right/result)-calls. + If they pop r0/r1 they must be called in the opposite order than aopOp(). + * device/lib/_mullong.c: fixed for "--model-large --int-long-reent" + (resp. --stack-auto), prepared for --xstack + +2003-08-28 Frieder Ferlemann + + * doc/sdccman.lyx: reverted tables to those in cvs 1.64 + +2003-08-28 Bernhard Held + + * device/lib/_startup.c: quick & dirty fix for ds390/ds400; + these ports have their own __sdcc_external_start() + +2003-08-26 Bernhard Held + + pic patch provided by Slade Rich + * src/pic/glue.c (pic14printPublics): fixed bug introduced when symbol + type for bits was changed. It resulted in bit variables becoming + global, which is not permitted in PIC 14 assembly output. + +2003-08-23 Frieder Ferlemann + + * doc/sdccman.lyx: various additions and updates. Rearranged sections + +2003-08-22 Jesus Calvino-Fraga + + Z80 and MCS51 linkers complaint if a public symbol is defined + in more than one library module: + + * as/mcs51/lklib.c + * link/z80/lklib.c + * as/mcs51/Makefile.in + +2003-08-22 Erik Petrich + + A few small changes that speed up the peephole optimizer. + + * src/SDCCpeeph.c + +2003-08-22 Erik Petrich + + Try to make the peephole optimizer smarter by maintaining + an association between the assembly source code and the + iCodes that originated them. Put this information to use + with a new peephole rule condition "notVolatile" so that + the rules can be aggressive yet still safe. + + * src/SDCCpeeph.c + * src/SDCCpeeph.h + * src/mcs51/gen.c + * src/mcs51/peeph.def + +2003-08-20 Erik Petrich + + Fixed bug #741761 + + * src/mcs51/gen.c (aopForSym, leftRightUseAcc), + * src/ds390/gen.c (aopForSym, leftRightUseAcc): preserve A and B + if the left or right operand symbols have the accuse flag set. + +2003-08-20 Erik Petrich + + Changed the type of the result of the ! (NOT) operator to char; + previously it returned the same type as the source. This allows + us to eliminate all the genFloatNot functions (all of its target + implementations were very buggy) since !float can use the same + code as !long now. + + * src/SDCCicode.c (ast2iCode): ! returns char + * src/mcs51/gen.c (genNot, genNotFloat), + * src/ds390/gen.c (genNot, genNotFloat), + * src/z80/gen.c (genNot, genNotFloat), + * src/pic/gen.c (genNot, genNotFloat), + * src/pic16/gen.c (genNot, genNotFloat): eliminated genNotFloat + +2003-08-19 Bernhard Held + + pic patch provided by Slade Rich + 1. Interrupt would not compile properly. Ensure PCLATH register is saved + during interrupts. Ensure WSAVE is located at a shared bank address. + 2. Fixed page selection in some places + 3. Fixed BTFSS/C to where necessary use registers directly and not simply + the registers name strings. + 4. Fixed "signed / unsigned compare" compiler warnings. + 5. The PIC port manages its own allocation of the general purpose + registers, but makes no attempt to reuse them. As a result when + compiling it soon runs out of general purpose registers. Some + additional code was added to the files pcode.c and device.c to walk + through the function call tree and rename the registers so that they + get reused. + + * src/pic/device.c + * src/pic/gen.c + * src/pic/glue.c + * src/pic/pcode.c + * src/pic/pcode.h + * src/pic/ralloc.c + * src/pic/ralloc.h + * src/pic/genarith.c: Fixed problems with PIC 14 port in functions + genPlus() & genMinus() when the result is the same as left or right + +2003-08-18 Erik Petrich + + * src/z80/gen.c (isUnsplitable, fetchPairLong): fixed bug #770454 + +2003-08-18 Erik Petrich + + Made bitfield a distinct type from bit so that bitfields + convert as per ANSI C and bits retain their traditional + boolean style behaviour. Implemented bitfield support in + the z80 port. + + * src/SDCCsymt.h, + * src/SDCCsymt.c, + * src/SDCCast.c, + * src/cdbFile.c, + * src/mcs51/gen.c, + * src/ds390/gen.c: bit v bitfield split + * src/z80/gen.c: New support for bitfields + * support/regression/tests/bitfields.c: reenabled z80, + added more tests + +2003-08-17 Frieder Ferlemann + + Rules 246.x, 247.x relate to bitfields, the others speed up + access to xdata mapped I/O devices. + + * src/mcs51/peeph.def: added 26 peepholes 246.x - 248.x, 180.x + +2003-08-16 Erik Petrich + + Cleaned up genPackBits and genUnpackBits and added two helper + functions, emitPtrByteGet & emitPtrByteSet. Added optimizations + for literal assignments in genPackBits (thanks to Frieder for + reminding me). + + * src/mcs51/gen.c + * src/ds390/gen.c + +2003-08-16 Erik Petrich + + Fixed bug #748310 (pointer to function type mishandled when the + function name is omitted). Also fixed a SIGSEGV when a function + attribute (reentrant, etc) is used on a non-function or on a + function but misplaced before the parameter list. + + * src/SDCC.y (abstract_declarator, abstract_declaractor2): fixed + bug #748310 + * src/SDCC.y (declarator2_function_attributes): avoided SIGSEGV + * support/Util/SDCCerr.h, + * support/Util/SDCCerr.c: Added func attr misuse error msg + +2003-08-13 Bernhard Held + + Fixed bug #787649 by anonymous + * src/SDCCglue.c (emitRegularMap): added emission of sloc for func ptr + * src/ds390/gen.c (aopForSym): fixed func ptr in sloc + +2003-08-14 Erik Petrich + + Fixed numerous bitfield problems. + + * src/SDCC.y: More bitfield related error checking + * src/SDCCsymt.h, + * src/SDCCsymt.c (compStructSize): fixed bitfield offset calc + * support/Util/SDCCerr.h, + * support/Util/SDCCerr.c: Added & edited some bitfield err msgs + * src/mcs51/gen.c (genPackBits, genUnpackBits): fixed mask bugs + * src/ds390/gen.c (genPackBits, genUnpackBits): fixed mask bugs + * support/regression/tests/bitfields.c: tests added + +2003-08-13 Erik Petrich + + Made the constant following the "interrupt" keyword optional. If + omitted, the function will not automatically be given an entry + in the interrupt vector table (similar to #pragma NOIV, but + less syntacticly kludgy). The interrupt number is also now + range checked. Also fixed a bug in the high order bit example + in the manual. + + * src/SDCC.y + * src/SDCCmem.c + * src/SDCCglue.c + * src/SDCCsymt.h + * support/Util/SDCCerr.c + * support/Util/SDCCerr.h + * doc/sdccman.lyx + +2003-08-13 Bernhard Held + + * src/SDCCcse.c (algebraicOpts): fix bug converting op from value to type + * src/SDCCicode.c (operandOperation): rewritten some ops + (*, ==, unary_minus) to fix possible overflows and to accord with ANSI + * src/SDCCsymt.c (computeType): literals are handled the same way as any + other type + * src/SDCCval.c (cheapestVal): removed, it doesn't accord with ANSI (can + be re-activated by defining REDUCE_LITERALS) + * src/SDCCval.c (constVal): fixed; hex and octal constants can be + unsigned, but are signed by default + * src/SDCCval.c (constVal): rearranged + * src/SDCCval.c (valMod): preliminary fix + * src/SDCCval.c (valCastLiteral): use TYPE_* types + * support/regression/literalop.c: added, work in progress + +2003-08-12 Erik Petrich + + Generate warnings for useless declarations like "char data;" + that don't do what new users expect. + + * src/SDCC.y + * support/Util/SDCCerr.h + * support/Util/SDCCerr.c + +2003-08-09 Bernhard Held + + * src/SDCCval.c (valMult): fix overflow detection of negative int + +2003-08-07 Erik Petrich + + * src/z80/ralloc.c (joinPushes): made compatible with new signedness + + Changes to support big endian targets: + + * src/ports.h + * src/SDCCglue.c + * src/avr/main.c + * src/ds390/main.c + * src/izt/i186.c + * src/mcs51/main.c + * src/pic/main.c + * src/pic16/main.c + * src/xa51/main.c + * src/z80/main.c + +2003-08-06 Bernhard Held + + * src/SDCCval.c (cheapestVal): changed behaviour to the same as constVal() + * device/lib/time.c: fixed warning "integer overflow in expression" + +2003-08-05 Bernhard Held + + * src/SDCCval.c (cheapestVal, valueFromLit): use TYPE_* types + * src/SDCCval.c (constVal): changed default to signed; hex and octal + constants are unsigned; added recognition of "u" flag for unsigned + * src/SDCCval.c (valMult): fixed signdness, added warning for overflow + * src/SDCCval.c (valDiv, valMod): fixed signdness + * src/SDCCicode.c (operandOperation): fixed critical typo; fixed + signedness of modulo, left and right shift + * support/Util/SDCCerr.c: added warning "integer overflow in expression" + * support/Util/SDCCerr.h: added warning W_INT_OVL + * src/SDCCast.c (decorateType): fixed gcc3.3 warning + * src/SDCCast.c (ast_print): improved output of constants + +2003-08-04 Jesus Calvino-Fraga + + Fixed some warnings when building with MSVC: + + * as/mcs51/asdata.c + * as/z80/asdata.c + * as/mcs51/asm.h + * as/z80/asm.h + * link/z80/aslink.h + * link/z80/lkdata.c + * link/z80/lkeval.c + * link/z80/lkgb.c + * link/z80/lkihx.c + * link/z80/lks19.c + * link/z80/lksym.c + * support/cpp2/cpplib.c + * src/ds390/gen.c + * src/mcs51/gen.c + +2003-08-03 Bernhard Held + + * src/SDCCast.c (constExprTree): fix bug #781827 by Carl Worth + +2003-08-01 Jesus Calvino-Fraga + + * support/librarian/clean.mk: Do not remove Makefile. + * support/librarian/Makefile: added. + +2003-08-01 Jesus Calvino-Fraga + + Added librarian to MSVC build: + * all.dsp + * sdcc.dsw + * support/librarian/librarian.dsp + + 'configure' not needed for librarian, removed: + * support/librarian/configure + * support/librarian/configure.in + * support/librarian/config_in.h + * support/librarian/Makefile.in + + Hopefully these ones built the librarian and the rest of sdcc properly: + * Makefile + * Makefile.common.in + + Messed up 'configure', so revert to previous version: + * configure + * configure.in + +2003-07-31 Bernhard Held + + * src/SDCCicode.c (operandOperation): 3. fix, this time for Alpha; ULONG has 64 bits + there, while the mantissa of a double is "only" 53 bits wide. + +2003-07-31 Jesus Calvino-Fraga + + Adding sdcclib to the build. MSVC project coming soon. + Files added/changed: + + * support/librarian/clean.mk + * support/librarian/configure + * support/librarian/configure.in + * support/librarian/config_in.h + * support/librarian/Makefile.bcc + * support/librarian/Makefile.in + * support/librarian/sdcclib.c + * Makefile.bcc + * Makefile + * Makefile.common.in + * configure + * configure.in + +2003-07-29 Jesus Calvino-Fraga + + Linker now complaints if linked modules have conflicting options, for + example, one compiled using --model-large and another one compiled with + --model-small. The following files were modified: + + * as/mcs51/asdata.c + * as/mcs51/aslink.h + * as/mcs51/asm.h + * as/mcs51/asmain.c + * as/mcs51/asout.c + * as/mcs51/i51pst.c + * as/mcs51/lkdata.c + * as/mcs51/lklibr.c + * as/mcs51/lkmain.c + * as/z80/asdata.c + * as/z80/asm.h + * as/z80/asmain.c + * as/z80/asout.c + * as/z80/z80pst.c + * link/z80/aslink.h + * link/z80/lkdata.c + * link/z80/lklibr.c + * link/z80/lkmain.c + * src/SDCCglue.c + +2003-07-28 Jesus Calvino-Fraga + + *link/z80/aslink.h, link/z80/lklibr.c, as/mcs51/aslink.h, + as/mcs51/lklibr.c: Generate a warning when a library is not found. + +2003-07-28 Bernhard Held + + * src/z80/mappings.i: fix _mul[us][int,long] entries + +2003-07-26 Jesus Calvino-Fraga + + *src/SDCCmain.c: do not search for crt0.o when using --nostdlib + +2003-07-24 Bernhard Held + + * src/SDCCicode.c (operandOperation): really fixed problem with bitops + * support/regression/tests/bitopcse.c: added + fixed warning: + * src/avr/gen.c: + * src/pic/gen.c: + * src/pic16/gen.c: + * src/z80/gen.c: + * src/xa51/gen.c: + +2003-07-24 Jesus Calvino-Fraga + + added support for new library format to z80, gbz80 linkers: + *link/z80/aslink.h + *link/z80/lklex.c + *link/z80/lklib.c + *link/z80/lklist.c + +2003-07-24 Bernhard Held + + * src/SDCCicode.c (operandOperation): fixed problem with bitops and 0xffffffff; + after {double d = 0xffffffff; long l = d;} l will be 0x80000000 (LONG_MIN) + +2003-07-23 Bernhard Held + + added DUMMY_READ_VOLATILE: + * src/SDCC.y: + * src/avr/gen.c: + * src/xa51/gen.c: + * src/z80/gen.c: + * src/pic/gen.c: + * src/pic16/gen.c: + * src/mcs51/gen.c: + * src/ds390/gen.c: + * src/SDCCcse.c (algebraicOpts): many improvements + * src/SDCCcse.h: removed algebraicOpts() + * src/SDCCicode.c (picDummyRead): added + +2003-07-23 Jesus Calvino-Fraga + + * as/mcs51/lkmem.c: Changed message "Insufficient DRAM memory" to + "Insufficient space in data memory". + +2003-07-20 Erik Petrich + + * src/mcs51/gen.c: fixed bug #771358 + * src/z80/gen.c: fixed bug #759087 + +2003-07-20 Bernhard Held + + * src/pic16/glue.c: minor cleanup by Vangelis + +2003-07-19 Frieder Ferlemann + + * device/include/regc515c.h: fixed #758477 + * device/lib/_gptrget.c: saving some cycles in generic pointer get + * device/lib/_gptrput.c: saved a few bytes + * my tab spacing is 8, yours too?) + * device/lib/_ser.c: process RX bytes earlier than TX bytes + * device/lib/serial.c: process RX bytes earlier than TX bytes + * src/mcs51/gen.c(genGenPointerGet/Set): removed writing of type after postincrement + +2003-07-18 Erik Petrich + + * src/z80/gen.c: fixed some right shift bugs (#772726 among them) + +2003-07-17 Jesus Calvino-Fraga + + * link/z80/lklibr.c: fixed bug when there is a '.' in a library path. + +2003-07-17 Bernhard Held + + * device/lib/Makefile.in: bad fix, reverted to 1.43 + +2003-07-16 Bernhard Held + + * device/lib/Makefile.in: added missing z80 object files + +2003-07-14 Bernhard Held + + * src/SDCCcse.c (algebraicOpts): CSE fun with &|^ and 0x00/0xff literals + pic16 progress by Vangelis: + * src/SDCCglobl.h: + * src/SDCCmain.c: + * src/pic/Makefile: + * src/pic: + * pic/Makefile: + * pic16/device.c: + * pic16/device.h: + * pic16/gen.c: + * pic16/gen.h: + * pic16/genarith.c: + * pic16/glue.c: + * pic16/main.c: + * pic16/pcode.c: + * pic16/pcode.h: + * pic16/pcodepeep.c: + * pic16/peeph.def: + +2003-07-13 Jesus Calvino-Fraga + + * src/SDCCmain.c, src/SDCCglobl.h: added option --no-std-crt0 + +2003-07-12 Jesus Calvino-Fraga + + * sdcc.dsw, all.dsp, link/z80/linkgbz80.dsp, as/z80/as-gbz80.dsp: + added gbz80 build to MSVC project. + * src/SDCCmain.c, src/SDCCglue.c, src/z80/main.c, src/z80/z80.dsp, + link/z80/aslink.h, linkz80.dsp: cleaned up z80 and gbz80 asm files + from 8051 stuff and setup so it links using a .lnk file. + +2003-07-06 Jesus Calvino-Fraga + + * support/librarian/sdcclib.c: sdcc librarian. + * as/mcs51/aslink.h, as/mcs51/lklib.c: Support for libraries created + with sdcclib. + +2003-07-03 Jesus Calvino-Fraga + + * as/mcs51/lkmain.c: properly handle extensions in function afile. + +2003-07-02 Borut Razem + + * src/port.h, src/SDCCmain.c, src/pic/glue.h, src/pic/main.c, + src/pic16/glue.h, sdcc/src/pic16/main.c, src/izt/i186.c, + src/izt/tlcs900h.c, src/avr/main.c, src/ds390/main.c, src/mcs51/main.c, + src/xa51/main.c, src/z80/main.c: + virtualization of glue() function: each port has it's own glue function, + which is accessed by do_glue function pointer in PORT.general structure + +2003-07-01 Kevin Vigor + + * DS800C400 fun, improved ROM interface and tinibios. + +2003-06-27 Kevin Vigor + + * More support for DS80C400. Now includes beginning of interface to ROM. + +2003-06-25 Bernhard Held + + * src/mcs51/gen.c (gencjneshort): fixed bug #760345 + +2003-06-20 Jesus Calvino-Fraga + + * as/mcs51/lkaomf51.c: Make sure the size of the last procedure is correct. + +2003-06-19 Borut Razem + + * src/z80/main.c: fixed Z80 port again: missing -k library paths in linker command line + +2003-06-19 Borut Razem + + * src/SDCCutil.h, src/SDCCutil.c, src/SDCCglobl.h, src/SDCCmain.c, src/z80/main.c: + fixed Z80 port - crt0.o: cannot open. + +2003-06-19 Bernhard Held + + * support/Util/MySystem.c (merge_command): revert bad fix + +2003-06-18 Borut Razem + + * src/SDCC.lex, src/SDCCmain.c: fixed some warnings, introduced with changes made 15.06.1003 + +2003-06-18 Jesus Calvino-Fraga + + * src/SDCCglobl.h, src/SDCCmain.c, doc/sdccman.lyx: + option --use-stdout sends errors to stdout instead of stderr. + +2003-06-18 Bernhard Held + + * support/Util/MySystem.c (merge_command): quick fix for Linux segfault with \"cmd\" arg + +2003-06-15 Borut Razem + + * support/cpp2/sdcc.h: HAVE_DOS_BASED_FILE_SYSTEM defined for _WIN32 + * src/SDCC.lex: cloneXxx and copyAndFreeXxx functions for options and optimize stack handling + * src/SDCCglobl.h, src/SDCCmain.c, src/ds390/main.c, src/mcs51/main.c, src/z80/main.c: + fixed width array of pointers replaced with sets; + multiple include and lib paths ared transferred to preprocessor and linker + * src/SDCCset.c, src/SDCCset.h: added function setFromSetNonRev() and mergeSets() + * src/SDCCsymt.c: reimplemented function inCalleeSaveList() by using sets instead + fixed width array of pointers + * src/SDCCutil.c, src/SDCCutil.h: added functions fputStrSet(), appendStrSet(), joinStrSet(); + removed functions addToList(), join(), joinn(), pathCharsEquivalent(), pathCharTransform(), + fixupPath(), getPathDifference() + * src/ds390/gen.c, src/mcs51/gen.c: reimplemented function inExcludeList() by using sets instead + fixed width array of pointers + +2003-06-11 Bernhard Held + + * src/pic16/ralloc.c: fix warnings + * src/pic16/pcode.c: fix warning + +2003-06-10 Scott Dattalo + + Scott D. for Vangelis Rokas (vrokas AT otenet.gr). I (scott) don't + know all the details, but essentially this set of changes enable + the pic16 port to generate movff instructions and generate assembler + directives, + * src/SDCCmain.c: + * src/pic16/gen.c: + * src/pic16/glue.c: + * src/pic16/pcode.c: + * src/pic16/device.c: + * src/pic16/main.c: + * src/pic16/pcode.h: + * src/pic16/pcoderegs.c: + * src/pic16/ralloc.c: + * src/pic16/ralloc.h: + +2003-06-08 Jesus Calvino-Fraga + + * support/Util/SDCCerr.c, src/SDCCglobl.h, src/SDCCmain.c, doc/sdccman.lyx: + added option --vc, so sdcc errors and warnings are compatible with + Microsoft Visual Studio. + +2003-06-07 Jesus Calvino-Fraga + + * device/lib/_atof.c, device/lib/Makefile.in, device/include/stdlib.h, + device/lib/libfloat.lib: added atof function. + +2003-06-04 Bernhard Held + + * doc/sdccman.lyx: updated to Lyx 1.3 + * doc/cdbfileformat.lyx: updated to Lyx 1.3 + * doc/test_suite_spec.lyx: updated to Lyx 1.3 + * doc/Makefile: added fix for the \tabularnewline problem, thanks to Jesus + +2003-06-03 Bernhard Held + + * src/SDCCpeeph.c: separate peepRules2pCode() for pic16 by "Vangelis Rokas" + +2003-06-02 Frieder Ferlemann + + * doc/sdccman.lyx: cvs revision keywords, passing pdf information in latex preamble, + additions to the "related tools/documentation" section + +2003-06-02 Bernhard Held + + * src/SDCCglue.c (tempfileandname): added check for missing TMP/TEMP/TMPDIR variable + +2003-05-29 Bernhard Held + + * src/pic/device.c: added 16F819, patch by "David I. Lehn" + * src/SDCCcse.c (algebraicOpts): fixed "c * 1" + +2003-05-28 Bernhard Held + + * doc/sdccman.lyx: fix double dash and other minor things + * doc/Makefile: fix double dash + +2003-05-28 Karl Bongers(patches from Martin Helmling) + * debugger/mcs51/sdcdb.c,cmd.c,break.c and .h files. Martin adds + condition and ignore commands. + +2003-05-28 Frieder Ferlemann + + * doc/sdccman.lyx: Changes all over, index improved, smaller margins. The manual + is in parts still quite out of date, I did changes as far as I felt makes sense + for a non-native english speaker. + Please feel free to add to the manual or to correct my changes. + * doc/Makefile: undid touching the date of intermediate tex files. + +2003-05-26 Frieder Ferlemann + + * doc/sdccman.lyx: Manual has an index now + +2003-05-25 Bernhard Held + + Finalize muluint/mulsint and mululong/mulslong merging: + * device/lib/_mulint.c + * device/lib/_mullong.c + * device/lib/gbz80/mul.s + * device/lib/gbz80/stubs.s + * device/lib/z80/mul.s + * device/lib/z80/stubs.s + * src/SDCCsymt.c (initCSupport) + +2003-05-25 Jesus Calvino-Fraga + + * as/mcs51/lkaomf51.c: Address space 'z' was missing. + * src/avr/avr.dsp, src/ds390/ds390.dsp, src/mcs51/mcs51.dsp, + src/pic/pic.dsp, src/pic16/pic16.dsp, src/xa51/xa51.dsp, + src/x80/z80.dsp: peep.rul is bigger now, so /Zm1000 is used + instead of /Zm500. + +2003-05-25 Frieder Ferlemann + + * src/mcs51/peeph.def: added rules 244.x, 245.x. Although they pass + the regression tests I'm not brave enough to enable 245.b, 245.c + * doc/sdccman.lyx: added latex preamble for hyperref package. + Using pdflatex this will give you a hyperlinked pdf file with + bookmarks. (prepend '%' before /usepackage if this breaks something) + +2003-05-24 Jesus Calvino-Fraga + + * doc/sdccman.lyx: updated information about .adb files (fixed bug 742649) + +2003-05-22 Bernhard Held + + * src/pic16/pcode.c (pic16_get_op_from_instruction): fixed a gcc 3.x warning + +2003-05-21 + + * src/SDCCglue.c (printIval): fixed bug #739934 + +2003-05-19 Bernhard Held + + Applied patch from bug 737905 (renamed yylineo to mylineno): + * src/altlex.c + * src/SDCCast.c + * src/SDCglobl.h + * src/SDCC.lex + * src/SDCCsymt.c + * src/SDCCval.c + * src/pic16/pcode.c: Cleaned warnings + * src/pic16/pcodeflow.c: Cleaned warnings + * src/pic16/pcoderegs.c: Cleaned warnings + +2003-05-19 Scott Dattalo + + * src/pic16/pcode.c: Cleaned warnings + * src/pic16/pcodepeep.c: Cleaned warnings + * src/pic16/ralloc.c: Cleaned warnings + +2003-05-19 Bernhard Held + + * doc/sdccman.lyx: fixed bug 739745 + * src/pic16/pcode.c (pic16_get_op): fixed warning on alpha + +2003-05-18 Bernhard Held + + * src/port.h: removed DEFAULT_PORT, it's not yet pic16 ;-) + it can be defined with CFLAGS when running configure + * src/SDCCmain.c: fixed compiling + linking with object files + +2003-05-18 Vangelis Rokas (vrokas AT otenet.gr) + + * configure.in: configure for pic16 port, + added --disable-pic16-port + * sdccconf_in.h: added macro OPT_DISABLE_PIC16 + * src/SDCCmain.c: linkOptions is changed to set *, + added if/endif conditional macros to remove options help + messages from optionsTable when a port is not configured, added + support for the PIc16 port in the ports table, when executing + the compiler with no port specified on command line, a default + port is selected with the new macro DEFAULT_PORT which is + defined in port.h, in setDefaultOptions() linkOptions is removed + from initialization assignment, since now it is a set, + parseCmdLine uses setParseWithComma for linkOptions, in + linkEdit() linkOptions are accessed with new function indexSet() + which returns the i'th item of a set variable. See SDCCset.c, in + linkEdit() when calling buildCmdLine(), added linkOptions as + last argument. Now users can pass arguments to gplink via the + -Wl option, main() uses pic16glue() to glue up pic16 programs + * src/SDCCpeeph.c: various changes to support pic16 + * src/SDCCset.c: added function void *indexSet(set *, int) to + return the i'th item of the set + * src/SDCCset.h: added function prototype for indexSet() + * src/SDCCsymt.c: in checkSClass(), added support for PIC16 + * src/clean.mk: added pic16 in CLEANALLPORTS variable + * src/port.h: added TARGET_ID_PIC16,TARGET_IS_PIC16 macro, + added macro DEFAULT_PORT + * src/pic/main.c: corrected arguments of gplnk in _linkCmd + * src/pic16/gen.c: bug fix in genCpl(), now the correct code is + generated + * src/pic16/glue.c: commented out some error producing lines + * src/pic16/main.c: __config directives are commented out to stop + gpasm complaining and test the linkage with gplink, _linkCmd and + _asmCmd changed to be more gplink and gpasm friendly + * src/pic16/peeph.def: peep rule 3 is commented out, since it + produced an error when parsed, peep rule 12 is added to utilize + movff, but it is commented out since the pCode does not support + yet a command with 2 address arguments + +2003-05-18 + + * src/ds390/gen.c (genArrayInit): removed obsolete and buggy ARRAYINIT + * src/ds390/main.c (genArrayInit): removed obsolete and buggy ARRAYINIT +2003-05-17 Karl Bongers(apply patches from Martin Helmling) + + * debugger/mcs51/sdcdb.c,cmd.c,break.c and .h files. + Added feature to script commands from file. + +2003-05-14 Bernhard Held + + * device/lib/_strtok.c: fixed bug #734355 by Lenny Story and Tim Woodall + * src/SDCCutil.c: include ctype.h for win32 + +2003-05-13 Bernhard Held + + * src/pic16/*: removed CR from many files, reported by Vangelis Rokas + +2003-05-12 Karl Bongers(apply development patches from Martin Helmling) + + * debugger/mcs51/sdcdb.c,simi.c,cmd.c,break.c and .h files. + Fixed so you can set breakpoints prior to run, run does not stop + on entry now. Add tbreak. Other enhancements and fixes for use + with ddd. + +2003-05-12 Borut Razem + + * src/SDCCmain.c: fixed the problem with searching the DATADIR as the last resort on *nix + +2003-05-11 Borut Razem + + * src/SDCCutil.c: WIN32 version of getBinPath() calls GetModuleFileName() to determine + the path of bin directory, so that PATH is the only env. variable, which has to be set + in case of standard installation. + * src/ds390/ds390.dsp: increased value of /Zm option to 1000 + * src/pic/main.c: add quotes to file name parameters for gplink and gpasm + * src/SDCCglobl.h, src/SDCCmain.c, doc/sdccman.lyx: added --print-search-dirs command line option + +2003-05-04 Bernhard Held + + * src/SDCCmain.c (linkEdit): fixed buffer overflow for gbz80 + * support/regression/Makefile: inter-port-clean is no longer nesessary, the + temp files are in the port dir; clean the gen/test directory when + generating new test.c + * support/regression/ports/host/spec.mk: defined OBJEXT for target clean + * support/regression/tests/vaargs.c: fixed gcc 3.3 warning + * support/regression/tests/zeropad.c: added + +2003-05-09 + + * src/SDCCglue.c: fixed bug #597940 + +2003-05-05 Karl Bongers(apply patches from Martin Helmling) + + * debugger/mcs51/sdcdb.c,simi.c,cmd.c,symtab.c and .h files. + cache sfr, optimize next,step, fix off by one sourceline, + support ddd list function. + * sim/ucsim/cmd.src/newcmd.cc - small fix for sdcdb use. + +2003-05-04 Bernhard Held + + * support/regression/HTMLgen.py: added compare_s2f() + * support/regression/Makefile: redo 1.27 + * support/regression/generate-cases.py: redo 1.5 + +2003-04-30 Bernhard Held + + * support/regression/tests/float.c: workaround 33 bit hex constant + * support/regression/tests/simplefloat.c: fix division for host + +2003-04-29 Scott Dattalo + + * src/pic/pcoderegs.c Applied patch from Jim Hawkridge + that tame's the PIC's over-aggressive optimizer. + +2003-04-29 Jesus Calvino-Fraga + + * src.dsw, link/z80/aslink.h, link/z80/linkz80.dsp: z80 linker + support for MSVC. + +2003-04-29 Kevin Vigor + + Initial support for DS80C400. "Hello world" runs on TINIm400 + (with polled I/O). + +2003-04-28 Karl Bongers(apply patches for Martin Helmling) + + * debugger/mcs51/sdcdb.c,simi.c,cmd.c,symtab.c and .h files. + * Some notes on ddd usage added in debugger/README + Martin Helmling adding more features and fixes for ddd GUI debugger. + Code added for nexti, stepi, up, down, and other adjustments. + +2003-04-28 Scott Dattalo + + * src/pic/pCodepeep.c non-wildcard asmops are now handled + * src/pic/peeph.def Added two rules to optimize carry manipulation + * src/pic/* removed debug printfs + +2003-04-28 Bernhard Held + + * debugger/mcs51/cmd.c: added header newalloc.h + +2003-04-26 Bernhard Held + + * as/Makefile: new EXEEXT + * as/z80/Makefile: remove trailing slash of BUILDIR + * as/z80/clean.mk: new EXEEXT + * Makefile.common.in: add to CFLAGS (and others), don't replace it + * support/cpp2/Makefile.in: new EXEEXT + * src/pic/glue.c (pic14emitRegularMap): fixed warning + +2003-04-24 Bernhard Held + + Cygwin's gcc always appends .exe: 'gcc -o a a.c' creates a.exe; + EXEEXT was introduced to fix all related problems with targets + "clean", "install" and "uninstall"; a couple of further flaws + especially with "clean" have been fixed too + * as/mcs51/Makefile.in + * as/mcs51/clean.mk + * as/z80/Makefile + * Makefile + * clean.mk + * debugger/mcs51/Makefile.in + * debugger/mcs51/clean.mk + * link/z80/Makefile + * link/z80/Makefile.in + * link/z80/clean.mk + * link/Makefile + * packihx/Makefile.in + * packihx/clean.mk + * sim/ucsim/Makefile + * sim/ucsim/clean.mk + * sim/ucsim/avr.src/Makefile.in + * sim/ucsim/avr.src/clean.mk + * sim/ucsim/s51.src/Makefile.in + * sim/ucsim/s51.src/clean.mk + * sim/ucsim/xa.src/Makefile.in + * sim/ucsim/xa.src/clean.mk + * sim/ucsim/z80.src/Makefile.in + * sim/ucsim/z80.src/clean.mk + * sim/ucsim/main_in.mk + * sim/ucsim/packages_in.mk + * sim/ucsim/gui.src/Makefile.in + * sim/ucsim/gui.src/serio.src/Makefile.in + * sim/ucsim/gui.src/serio.src/clean.mk + * src/Makefile.in + * src/clean.mk + * support/cpp2/Makefile.in + * support/cpp2/clean.mk + * support/makebin/Makefile + * support/makebin/clean.mk + * support/scripts/sdcc_mingw32: --program-suffix no longer needed + * doc/sdccman.lyx: --program-suffix no longer needed + +2003-04-23 Karl Bongers(apply patches for Martin Helmling) + + * debugger/mcs51/sdcdb.c,simi.c,cmd.c,.. + Martin Helmling added support for ddd GUI debugger. + Code added to display assembly, set variables, and other commands + to interface to ddd. + +2003-04-23 Bernhard Held + + * as/Makefile: fix target clean + * as/clean.mk: fix target clean + * as/z80/clean.mk: fix target clean + +2003-04-22 Bernhard Held + + * Makefile.common.in: added AT EXEEXT AT + * configure.in: removed all mingw32 stuff + * configure: rebuilt from configure.in + * doc/sdccman.lyx: updated section "installation" + * support/scripts/sdcc_mingw32: adapted to configure + * support/scripts/sdcc_cygwin_mingw32: added + +2003-04-22 Scott Dattalo + + * src/pic Added object file support for the PIC port + * src/pic Applied patch from Craig Franklin (this started the object file support) + * src/regression Updated the PIC regression tests for object files + +2003-04-20 Borut Razem + + * sdcc/as/mcs51/lklex.c: make getfid() more robust and fixed gcc warning: + lklex.c: In function `getfid': + lklex.c:203: warning: array subscript has type `char' + * src/SDCCglobl.h: small change in stack handling macros, to avoid crash when compiled + with MSVC with global optimization enabled (probably an cl compiler bug ;-) + * support/Util/SDCCerr.c, support/Util/SDCCerr.h: added function fatal(), called from + stack handling macros + +2003-04-19 Borut Razem + + * "handling space characters in file path" task: + * src/SDCCmacro.c: fixed bug in handlig quote at the end of line + * support/Util/BuildCmd.c: define par as NULL if parameter value is invalid + * support/Util/MySystem.h: make it self-sufficient + * src/avr/main.c, src/ds390/main.c, src/mcs51/main.c, src/pic/main.c, src/xa51/main.c, + src/z80/main.c, sdcc/as/mcs51/lklex.c: + handling space characters in file path + * src/SDCCmain.c: introduced setDataPaths() function, {datadir} macro + (it will be used by assemblers, which have their own includes, e.g. gpasm) + * support/Util/MySystem.c: handling space characters in executable's path + +2003-04-19 Bernhard Held + + * as/z80/Makefile: fix permanent rebuild of z80 + * sim/ucsim/gui.src/Makefile.in: target "install" builds the same packages as target "all" + * support/regression/tests/bitfields.c: added Johan's bitfields.c + +2003-04-18 Kevin Vigor + + * src/SDCCopt.c: add special case optimization to replace modulo by + a power of two with a bitwise AND. + +2003-04-18 + + * src/mcs51/gen.c (getFreePtr): fixed bug #635354 + +2003-04-17 + + * src/mcs51/ralloc.c (packRegsForAssign): fixed bug #716790 and removes lot's of redundant register usage around function calls + * src/mcs51/ralloc.c (packRegisters): fixed bug #720667 + +2003-04-13 Borut Razem + + * doc/sdccman.lyx: updated info about #pragma SAVE/RESTORE nesting + * configure.in, configure: fixed problems on cygwin/WinCVS environmet with ports.* line endings; + fixed mingw problem in adl_NORMALIZE_PATH + +2003-04-12 Borut Razem + + * fixed "#pragma SAVE/RESTORE can not be nested": + * src/SDCC.lex: reworked pragma handling functions + * sdcc/src/SDCCglobl.h: reworked stack handling macros + * support/Util/SDCCerr.c, support/Util/SDCCerr.h: added E_STACK_VIOLATION error + +2003-04-12 Bernhard Held + + * src/SDCCutil.c (pathEquivalent): defined but not used + * debugger/mcs51/sdcdb.c: replace SDCC_LIB_DIR + * configure.in: remove sdcc_datadir, sdcc_lib_dir and sdcc_include_dir + * configure: rebuilt from configure.in + * sdccconf_in.h: remove SDCC_LIB_DIR and SDCC_INCLUDE_DIR + * sdcc_vc_in.h: remove SDCC_LIB_DIR and SDCC_INCLUDE_DIR + * device/include/Makefile.in: replace sdcc_datadir + * device/lib/Makefile.in: replace sdcc_datadir + * Makefile.common.in: add LDFLAGS from configure + * packihx/Makefile.in: use LDFLAGS + * src/Makefile.in: use LDFLAGS + * support/cpp2/Makefile.in: add LDFLAGS from configure + * support/makebin/Makefile: use LDFLAGS + * .version: bumped version number to 2.3.5 + +2003-04-12 Borut Razem + + * completed "different paths" task: + * src/SDCCmacro.c: fixed bug in handling quotes + * src/SDCCutil.c, src/SDCCutil.c: rewritten getPrefixFromBinPath() + * src/SDCCmain.c: _discoverPaths() replaced with setBinPaths(), setIncludePath() and setLibPath() + +2003-04-12 Bernhard Held + + * src/pic/pcoderegs.c (Remove1pcode): fix warning on alpha + +2003-04-11 kevin Vigor + + * ds390/gen.c ds390/peeph.def: fix bug 706781 + +2003-04-11 Borut Razem + + * support/Util/dbuf.c, support/Util/dbuf.h: update to version 1.1.1 - re-added C++ stuff to make it still more portable + +2003-04-10 Scott Dattalo + + * src/pic/* Applied the pointer-to-function patch from Steve Tell. + * src/pic/* Fixed several pointer bugs. (PIC port broke when the ruonly bit was + set - this bit used to not be set...). + * src/pic/gen.c Fixed buf 609268 ==> x = (x+1) & 0xf; generated + bad code in PIC Port + * src/regression/and2.c added to test bug 609268 + * src/regression/Makefile added and2.c to regression test + + +2003-04-08 + + * src/mcs51/gen.c (gen51Code): display reg usage in --icode-in-asm + * src/mcs51/ralloc.c (serialRegAssign): update the registers in use and save some slocs + * src/SDCCicode.h: added riu to show the register usage in --icode-in-asm + +2003-04-07 Bernhard Held + + * configure.in: fully support prefix, exec_prefix, datadir, docdir; + fix bug #487815 + * support/cpp2/Makefile.in: fix bug #487815 + * configure: rebuilt from configure.in + * Makefile.common.in: docdir changed, new path suffixes + * sdccconf_in.h: new RETSIGTYPE, and other PATHs + * sdcc_vc_in.h: reflect changes from sdccconf.h + * src/SDCCglobl.h: remove *SEPARATOR_CHARS, they are now in sdccconf.h + * src/SDCCutil.h: remove BINDIR hack + * doc/sdccman.lyx: update new path hierarchy + +2003-04-06 Paul Stoffregen + + * src/SDCCpeeph.c: added okToRemoveSLOC test + +2003-04-06 Paul Stoffregen + + * device/lib/printf_fast.c: added leading zero format ("%06d", etc) + +2003-04-06 Paul Stoffregen + + * src/SDCCpeeph.c: added labelIsReturnOnly test + * src/mcs51/peeph.def: Peephole 244: replace ljmp to ret with ret + +2003-04-05 + + * src/SDCCcse.c (cseAllBlocks): fixed bug #460088 + * src/SDCCloop.c (DEFSETFUNC): fixed bug #460088 + * src/SDCCopt.c (eBBlockFromiCode): fixed bug #460088 + * src/SDCCast.c: fixed a warning + * src/SDCCast.h: fixed a warning + * src/SDCCicode.c (operandFromAst): fixed a warning + +2003-04-04 + + * src/SDCCloop.c (DEFSETFUNC): undid the fix for bug #519584 + * src/SDCCast.c (decorateType): fixed bug #715076 + * src/SDCC.y: fixed bug #702907 + +2003-04-03 + + * device/lib/_mulint.c (_muluint): new #pragma LESS_PEDANTIC + * src/SDCCopt.c (eBBlockFromiCode): new #pragma LESS_PEDANTIC + * src/SDCCglobl.h (PRAGMA_LESSPEDANTIC): new #pragma LESS_PEDANTIC + * src/SDCC.lex (doPragma): new #pragma LESS_PEDANTIC + * src/SDCCmain.c (parseCmdLine): new #pragma LESS_PEDANTIC + +2003-04-03 Bernhard Held + + * _decdptr.c: fix return values + * _gptrget.c: fix return values + * _gptrgetc.c: fix return values + * _gptrput.c: fix return values + * _mulint.c: fix return values + * as/z80/Makefile: fix 'make -j' problem + +2003-04-02 Bernhard Held + + * Makefile.common.in: unused PORT, SCC and SAS removed, fixed docdir + * configure.in: big cleanup, updated to autoconf 2.5x + * configure: rebuilt from configure.in + * sdccconf_in.h: new RETSIGTYPE, and other PATHs + * sdcc_vc_in.h: reflect changes from sdccconf.h + * doc/Makefile: fixed a flaw in "make install" + +2003-04-02 + + * src/ds390/gen.c (genCmp): no comments + * src/mcs51/gen.c (genCmp): no comments + * src/SDCCopt.c (eBBlockFromiCode): detect missing return values + * src/SDCCast.c (ast_print): fixed the function type in --dumptree + +2003-04-01 Bernhard Held + + * support/regression/generate-cases.py: place generated file in given sub directory + * support/regression/ports/host/spec.mk: prevent removal of testfwk.o + * support/regression/Makefile: improvements for 'make -j'; + side effect: it's simpler and faster now + +2003-03-31 Borut Razem + + * src/z80/main.c: link-{port} and as-{port} defined without path + * src/src.dsp: support/Util/MySystem.h and src/SDCCutil.h added to project + +2003-03-31 Bernhard Held + + * Makefile, src/Makefile.in: add dependencies, so that 'make -j' works + +2003-03-30 Borut Razem + + * support/Util/BuildCmd.c, support/Util/BuildCmd.h: rewrite buildCmdLine(), + changed type of list parameter to set + * src/ds390/main.c: changed type of parameter asmOptions to set in _tininative_do_assemble() + * src/port.h: changed type of do_assemble() parameter to set + * src/SDCCmain.c: type of asmOptions changed to set, introduced setParseWithComma(), + sdcpp defined without path, removed variable VersionString, introduced set binPathSet, + definition of "cppoutfilename" macro with NULL value in preProcess() + * src/SDCCglobl.h: included "SDCCset.h", added declaration of setParseWithComma() + * src/SDCCglue.c: removed variable VersionString, inroduced spacesToUnderscores() + * support/Util/MySystem.c, support/Util/MySystem.h: rewrite, char *ExePathList[] + replaced with set *binPathSet + * shash_add() deallocates the item, if allready exsists, before adding the new one + * src/SDCCmacro.c: handling macros with empty or NULL values in _evalMacros() + +2003-03-30 Scott Dattalo + + * src/pic/gen.c: Commit patch from Steve Tell that fixes + a nested for loop bug in the PIC port + * src/regression/nestfor.c: new regression test file Steve wrote to test nested + for loops + +2003-03-29 Bernhard Held + + * support/Util/dbuf.h: remove C++ stuff to make it portable + +2003-03-28 Borut Razem + + * src/SDCC.lex: Fix for bug #711240: dynamic buffer handling of C + literal strings in stringLiteral() + * support/Util/dbuf.c, support/Util/dbuf.h: added: dynamic buffer handling + * src/Makefile.bcc, src/Makefile.in, src/src.dsp: added support/Util/dbuf.c + to the project + +2003-03-27 Paul Stoffregen + + * src/SDCCpeeph.c (pcDistance): accurate byte distance for mcs51 + +2003-03-26 + + * src/mcs51/gen.c (saveRegisters): catched symbol abuse + * src/ds390/gen.c (saveRegisters): catched symbol abuse + * src/SDCCast.c (decorateType): fixed " -v < 3" + +2003-03-23 Bernhard Held + + * doc/cdbfile.html: removed, replaced by cdbfileformat.lyx + Added Lenny Story's debug infrastructure changes: + * src/Makefile.in: added new files cdbFile.c and SDCCdebug.c + * src/Makefile.bcc: added new files cdbFile.c and SDCCdebug.c + * src/cdbFile.c: added + * src/SDCCdebug.c: added + * src/SDCCdebug.h: added + * src/SDCCast.c (createFunction) + * src/SDCCglue.c (emitRegularMap, emitStaticSeg, emitOverlay, glue) + * src/SDCCmain.c (parseCmdLine, main) + * src/SDCCmem.c (redoStackOffsets) + * src/SDCCsymt.c (cdbStructBlock, cdbTypeInfo, cdbSymbol, cdbStruct, cdbStructBlock) + * src/SDCCsymt.h + * src/common.h + * src/avr/gen.c (genAVRCode) + * src/ds390/gen.c (gen390Code) + * src/mcs51/gen.c (gen51Code) + * src/pic/gen.c (genpic14Code) + * src/pic/glue.c (pic14emitRegularMap, pic14emitStaticSeg, pic14emitOverlay, picglue) + * src/xa51/gen.c (genXA51Code) + * src/SDCCast.c: fixed "void foo(void){char c; -c < 0;}" + +2003-03-22 Frieder Ferlemann + + * src/mcs51/gen.c (genCodePointerGet): quicker code for bug #700797 + * src/mcs51/peeph.def: added rules 177, 241.x to 243, touched 181, 182.x, 193.x + +2003-03-22 + + * src/SDCCicode.c (geniCodeDerefPtr): fixed bug #698231 + +2003-03-21 Bernhard Held + + * support/scripts/sdcc_mingw32: adapted to configure from autoconf 2.54 + * doc/cdbfileformat.lyx: added, written by Lenny Story + * doc/Makefile: added cdbfileformat.lyx + * doc/clean.mk: added cdbfileformat.lyx + +2003-03-20 Bernhard Held + + * src/mcs51/peeph.def: fix bug #705773 + +2003-03-20 + + An sfr/sbit can have an "at #" AND an initializer + * src/SDCCsymt.c (checkSClass): + * src/SDCCmem.c (allocGlobal): + * src/SDCCmem.c (allocLocal): + * src/SDCCast.c (createBlock): + +2003-03-17 Bernhard Held + + * src/ds390/peeph.def: fix bug #704878: added rule 213.b suggested by Jan Rejlek + +2003-03-16 + + Undid the hackup of const and volatile, the problem is much bigger + * src/SDCC.y:1.65 + * src/SDCCast.c:1.171 + * src/SDCCglue.c:1.138 + * src/SDCCicode.c:1.146 + * src/SDCCsymt.c:1.150 + * src/SDCCval.c:1.65 + +2003-03-15 Bernhard Held + + * src/mcs51/ralloc.c (packRegsForAssign): fixed bug #703541 + * src/ds390/gen.c (genAddrOf): fixed bug #704087 + +2003-03-13 + + Hackup const and volatile modifiers in type chains a bit: + * src/SDCC.y:1.63 + * src/SDCCast.c:1.169 + * src/SDCCglue.c:1.136 + * src/SDCCicode.c:1.143 + * src/SDCCsymt.c1.146 + * src/SDCCsymt.h1.59 + * src/SDCCval.c:1.63 + +2003-03-12 + + * src/SDCCBBlock.h: more LRH debugging junk + * src/SDCCcflow.h: more LRH debugging junk + * src/SDCCloop.c: more LRH debugging junk + * src/SDCC.y (struct_declaration): fixed bug #697590 + * src/SDCCsymt.[hc] (cloneSpec): NEVER EVER use this again + * src/ds390/gen.c (aopForRemat): fixed bug #700031 + * src/SDCCglue.c (emitStaticSeg): fixed bug #700797 + +2003-03-11 Kevin Vigor + * src/SDCCpeeph.c: quit being lazy and made proper fix (peephole + test function names must now match exactly). + * src/SDCCcse.c: added special case in findCheaperOp to allow + extending a short integer. Makes less awful code for bug 700121 test case. + +2003-03-11 Jesus Calvino-Fraga + + * as/mcs51/lkmain.c: Added ASlink-Warning to messages + * as/mcs51/lkaomf51.c: Fixed bug when linking asmblink example + +2003-03-11 Kevin Vigor + + * src/SDCCpeeph.c: fix so that operandsNotEqualX functions are + actually called (operandsNotEqual() was called for all + operandsNotEqualX tests). + +2003-03-11 Kevin Vigor + + * src/SDCCcse.c: fix findCheaperOp to prevent replacing int types + with shorter literals. Fixes bug 700121. + +2003-03-11 + + * src/SDCCsymt.c (compareType): a (void *) can be assigned to any pointer + +2003-03-11 Bernhard Held + + * src/SDCCloop.c (mergeRegions): an evil beast is dead + * src/SDCCmain.c (preProcess): minor cleanup: eliminate preOutName + +2003-03-10 Borut Razem + + * src/SDCCmain.c: pipe preprocessor's output + * support/Util/MySystem.c, support/Util/MySystem.h: added my_popen() + * sdcc_vc_in.h: define pclose as _pclose for WIN32 + * src/SDCCglue.c, src/SDCCglue.h: added set pipeSet, added function closePipes, + which closes all pipes in pipeSet set + * src/SDCCset.c: free deleted item in function deleteSetItem() + * src/src.dsp, src/z80/z80.dsp: files support/Util/BuildCmd.c and support/Util/MySystem.c + moved from z80 to src subproject + * .version: increased version number to 2.3.4 + +2003-03-10 Bernhard Held + + * support/regression/ports/mcs51/spec.mk: increase timeout for CF's sparc to 30s + * support/regression/ports/ds390/spec.mk: increase timeout for CF's sparc to 25s + * support/regression/ports/xa51/spec.mk: fix typo + +2003-03-09 Bernhard Held + + * src/SDCCglobl.h: PATH_MAX is already defined in mingw32 headers + +2003-03-09 Borut Razem + + * src/SDCCmain.c: pipe preprocessor's output + * support/Util/MySystem.c, support/Util/MySystem.h: added my_popen() + * sdcc_vc_in.h: define pclose as _pclose for WIN32 + * src/SDCCglue.c, src/SDCCglue.h: added set pipeSet, added function closePipes, + which closes all pipes in pipeSet set + * src/SDCCset.c: free deleted item in function deleteSetItem() + * src/src.dsp, src/z80/z80.dsp: files support/Util/BuildCmd.c and support/Util/MySystem.c + moved from z80 to src subproject + +2003-03-09 Borut Razem + + * src/SDCCglue.c: re-implemented tempfilename() and tempfile(): using mkstemp() if available + * src/SDCCsymt.h: fixed MSVC and BORLANDC compilation (included SDCCglobl.h instead srccconf.h) + * sdcc_vc_in.h: explicitly undefined HAVE_MKSTEMP which is not available on BORLANDC and MSVC + * src/SDCCset.h: removed inclusion of sdccconf.h or sdcc_vc.h + * src/SDCCglobl.h: unification of WIN32 native definitions + +2003-03-09 Frieder Ferlemann + + * src/mcs51/gen.c: applied in-/dec patch mentioned on sdcc-devel 2003-03-01 + +2003-03-08 Bernhard Held + + * src/configure.in: check for endianess (even while cross-compiling) + * src/configure: check for endianess (even while cross-compiling) + * src/configure_in.h: check for endianess (even while cross-compiling) + * src/avr/gen.c: remove old endianess stuff + * src/mcs51/gen.c: remove old endianess stuff + * src/ds390/gen.c: remove old endianess stuff + * src/pic/gen.c: remove old endianess stuff + * src/pic/genarith.c: remove old endianess stuff + * src/pic/glue.c: fix endianess check + * src/pic16/gen.c: remove old endianess stuff + * src/pic16/genarith.c: remove old endianess stuff + * src/pic16/glue.c: fix endianess check + * src/xa51/gen.c: remove old endianess stuff + * src/z80/gen.c: fix endianess check + * src/SDCCglue.c: fix endianess check + * src/ds390/peeph.def: fix bug 700036 + +2003-03-08 Bernhard Held + + * src/SDCCsymt.h: use appropriate data-types on host for SDCC's int and long + * src/configure: find appropriate data-types on host for SDCC's int and long + * src/configure.in: find appropriate data-types on host for SDCC's int and long + * src/sdccconf_in.h: find appropriate data-types on host for SDCC's int and long + * src/xa51/gen.c: use %d, not %ld for 4 byte variables + +2003-03-07 + + Just a big NOOP: + some minor cleanups before the big shot + OP_DEFS and OP_USES now use Kevin's protection + new option --nolabelopt + + * src/SDCCBBlock.c: + * src/SDCCast.c,: + * src/SDCCcflow.c: + * src/SDCCcse.c: + * src/SDCCicode.c: + * src/SDCCicode.h: + * src/SDCClabel.c: + * src/SDCCloop.c: + * src/SDCCmain.c: + * src/ds390/ralloc.c: + * src/mcs51/ralloc.c: + * src/pic/ralloc.c: + * src/xa51/ralloc.c: + * src/z80/ralloc.c: + +2003-03-06 Bernhard Held + + * src/pic/pcode.c (get_op): fix 64 bit warnings + * src/pic/pcode.c (pCode2str): fix 64 bit warnings + * src/SDCChasht.c (newHashTable): fix 64 bit warnings + * src/SDCCsymt.c (checkTypeSanity): fix 64 bit warnings + * support/regression/tests/malloc.c: fix 64 bit warnings + +2003-03-04 Bernhard Held + + * src/mcs51/gen.c (genMinus): fixed bug 696436 + +2003-03-02 Borut Razem + + * src/SDCCmain.c: added BORLANDC, corrected MSVC in printVersionInfo() + +2003-02-26 Bernhard Held + + * configure.in: test for mkstemp + * sdccconf_in.h: add HAVE_MKSTEMP + +2003-02-24 Bernhard Held + + * device/include/ctype.h: removed warning while using --stack-auto + * device/include/malloc.h: removed warning while using --stack-auto + * device/include/string.h: removed warning while using --stack-auto + +2003-02-23 Borut Razem + + * src/asm.h: corrected assertion in function printILine(): _pipe() was not executed on MSVC, + because NDEBUG is defined (see man assert) + * sdcc_vc_in.h: vsnprintf is defined as _vsnprintf on MSVC + +2003-02-23 Frieder Ferlemann + + * src/mcs51/gen.c (genUminusFloat): avoided dptr in-/decrement for xdata variables + * src/mcs51/peeph.def: added rule suggested by Gernot Fink, white space/comment changes + +2003-02-18 Frieder Ferlemann + + * src/SDCCpeeph.c: added peephole conditions testing for same arguments + * src/mcs51/peeph.def: added rules 238a-d which remove redundant moves + +2003-02-18 + + * as/mcs51/asmain.c (asmbl): module can start with a digit + * as/z80/asmain.c (asmbl): module can start with a digit + +2003-02-16 Bernhard Held + + * sim/ucsim/mkecho: inserted #!/bin/sh for Cygwin, so that it's executable + * src/asm.c: fix pipe() for Mingw32 + +2003-02-15 Bernhard Held + + * src/SDCCglue.h: make tmpfileNameSet available for preOutName + * src/SDCCmain.c (preProcess): make sure, that preOutName will be deleted; + make -V work again; --c1mode reads now from stdin + * doc/sdccman.lyx: added --c1mode + * support/Util/SDCCerr.c: new messages for c1 mode + * support/Util/SDCCerr.h: new messages for c1 mode + * src/SDCC.lex (checkCurrFile): test if fullSrcFileName is NULL for c1mode + +2003-02-15 + + * src/asm.c: new options: --no-c-code-in-asm and --i-code-in-asm + +2003-02-14 Bernhard Held + + * doc/sdccman.lyx: Environment variables, -o and other minor things + +2003-02-14 + + * src/xa51/main.c: before anyone really tries to use it :) + + * Install doc's in share/sdcc/doc + * removed some obsolete files + * Do a proper make distclean and uninstall + M Makefile.common.in + R sdccbuild.sh + M as/Makefile + M device/include/Makefile.in + M device/lib/Makefile.in + M doc/sdccman.lyx + M link/Makefile + M sim/ucsim/doc/Makefile.in + M src/clean.mk + R src/avr/peeph.rul + R src/xa51/peeph.rul + M support/cpp2/Makefile.in + M support/makebin/Makefile + + +2003-02-13 Bernhard Held + + * support/regression/ports/host/spec.mk: use cc as host compiler for max osx + +2003-02-10 Borut Razem + + * doc/bccinst.txt, packihx/packihx.c, sdcc_vc_in.h, src/SDCCset.h, + support/cpp2/config.in: Borland C++ build doesn't depend on Cygwin configure + * Bcc.ini, Makefile.bcc, as/mcs51/Makefile.bcc, + device/examples/ds390/tinitalk/Makefile.bcc, packihx/Makefile.bcc, + support/cpp2/Makefile.bcc, src/Makefile.bcc, src/avr/Makefile.bcc, + src/ds390/Makefile.bcc, src/izt/Makefile.bcc, src/mcs51/Makefile.bcc, + src/pic/Makefile.bcc, src/pic16/Makefile.bcc, src/xa15/Makefile.bcc, + src/z80/Makefile.bcc: Borland Makefile cleanup + * as/z80/Makefile.bcc: Added Borland Makefile + * support/cpp2/borland.h: Removed + +2003-02-10 Bernhard Held + + * doc/sdccman.lyx: new pragma NOIV by "Johannes Stezenbach" + * src/SDCC.lex: new pragma NOIV + * src/SDCCglobl.h: new pragma NOIV + * src/SDCCmem.c: new pragma NOIV + +2003-02-09 Bernhard Held + + * src/SDCCmain.c: signal handling is switched off by SDCC_LEAVE_SIGNALS + +2003-02-09 Bernhard Held + + * src/SDCCmain.c: signal handling is switched off by --debug + * doc/Makefile: small fix for install; use clean.mk again + * doc/clean.mk: clean *.pdf and *.html too + +2003-02-08 Bernhard Held + + * device/lib/_mulint.c: small fix for large/ds390 --int-long-reent resp. --stack-auto + * device/lib/printfl.c: fix a ds390 bug by making it portable + * src/SDCCsymt.c (initCSupport): fix compile warning on Cygwin + * src/SDCCopt.c (cnvToFloatCast): fix compile warning on Cygwin + * src/SDCCopt.c (cnvFromFloatCast): fix compile warning on Cygwin + * debugger/mcs51/cmd.c: converted multi-line string literals + * sim/ucsim/globals.cc: converted multi-line string literals + * src/SDCCmain.c: introduced signal handler to remove temp files + * doc/Makefile: small tweaks, implement clean + * doc: removed generated files + +2003-02-05 Jesus Calvino-Fraga + + * as/mcs51/aslink.h, as/mcs51/lkihx.c, as/mcs51/lkrloc.c: Applied + patch from Jan Rejlek to fix Bug 677692: "Extended + Address Record is not correctly generated for DS390." + +2003-02-02 Borut Razem + + * Makefile.bcc: removed non existing cpp project and non compilable izt project from makefile + * as/mcs51/asm.h: fixed compilation with Borland C + * support/cpp2/Makefile.bcc: added rule to generate auto-host.h + * support/cpp2/auto-host_vc_in.h: fixed compilation with Borland C + * src/mcs51/mcs51a.dsp: corrected misspelled project name from msc51a to mcs51a + * src/avr/Makefile.bcc, src/ds390/Makefile.bcc, src/izt/Makefile.bcc, + src/mcs51/Makefile.bcc, src/pic16/Makefile.bcc, src/xa51/Makefile.bcc, + src/z80/Makefile.bcc: delete $(LIB) only if exist + * src/Makefile.bcc, src/pic/Makefile.bcc: fixed compilation with Borland C + +2003-02-02 Bernhard Held + + * device/include/malloc.h: introduced NULL + * device/include/string.h: introduced NULL + * device/include/stdlib.h: introduced NULL + * device/lib/_memcpy.c: removed NULL + * device/lib/_strcat.c: removed NULL + * device/lib/_strchr.c: removed NULL + * device/lib/_strcmp.c: removed NULL + * device/lib/_strcpy.c: removed NULL + * device/lib/_strcspn.c: removed NULL + * device/lib/_strlen.c: removed NULL + * device/lib/_strncat.c: removed NULL + * device/lib/_strncmp.c: removed NULL + * device/lib/_strncpy.c: removed NULL + * device/lib/_strpbrk.c: removed NULL + * device/lib/_strrchr.c: removed NULL + * device/lib/_strspn.c: removed NULL + * device/lib/_strstr.c: removed NULL + * device/lib/_strtok.c: removed NULL + * device/lib/malloc.c: removed NULL, include own header + +2003-02-02 + + * src/mcs51/ralloc.c (packForPush): fixed bug #631653, maybe other ports need this too? At least now some new alerts in SDCCBBlock.c and SDCCicode.c gives an early warning + * support/regression/fwk/lib/testfwk.c: div and mod isn't broken anymore + * regressions ds390/spec.mk and mcs51/spec.mk (timeout): my good old balder isn't fast enough for some tests + * src/z80/gen.c (genZ80Code): added c-lines in asm comments + * as/z80/asm.h (NINPUT): increased for long c-comments in regression tests + * src/z80/gen.c (genRightShiftLiteral): fixed the (char)(-3)>>8 (I think) + +2003-02-01 Jesus Calvino-Fraga + + * src/SDCCmain.c: Fixed bug 678574: "ds390: ASlink-Error-Stack overlaps + area 'DATA'" + +2003-02-01 + + * src/SDCCval.c (valBitwise): fixed Karl's "2 | (1<<8)" + +2003-01-31 + + * src/ds390/main.c (_ds390_genAssemblerPreamble): applied Jan Rejlek's >64K startup patch + +2003-01-30 + + * src/SDCCBBlock.c: automatic bug detection + * src/SDCCicode.c: automatic bug detection + +2003-01-29 Jesus Calvino-Fraga + + * src/SDCCglobl.h: now --xram-size 0 works + * src/SDCCmain.c: now --xram-size 0 works + +2003-01-29 + + * src/almosteverything: changed OP_DEFS and OP_USES from macros to functions to catch symbol abuse (a hot topic in the bug list :) + +2003-01-29 Jesus Calvino-Fraga + + * as/mcs51/aslink.h: Added options --xram-size and --code-size + * as/mcs51/lkdata.c: Added options --xram-size and --code-size + * as/mcs51/lkmain.c: Added options --xram-size and --code-size + * as/mcs51/lkmem.c: Added options --xram-size and --code-size + * src/SDCCglobl.h: Added options --xram-size and --code-size + * src/SDCCmain.c: Added options --xram-size and --code-size + +2003-01-28 Bernhard Held + + * src/ds390/gen.c: fix deps by replacing with "common.h" + * src/SDCC.lex: rename P_OVERLAY to P_OVERLAY_ for cross-gcc 3.2 MINGW32 + +2003-01-27 + + * src/SDCC.y: fixed bug #613764 + +2003-01-26 + + * src/SDCClrange.c: fixed Bernhard's "char * code ptr = &c" + * src/SDCCsymt.h: fixed bug #673374 + * src/SDCCglue.c: fixed bug #661910 + * src/SDCCast.c: fixed bug #458099 and 673374 + +2003-01-26 Bernhard Held + + * as/mcs51/strcmpi.c: added, provides Aurelien Jarno's as_strcmpi(); strcmpi() is not ANSI + * as/mcs51/strcmpi.h: added + * as/mcs51/asm.h: remove ugly "#define strcmpi strcmp" + * as/mcs51/aslink.h: remove ugly "#define strcmpi strcmp" + * as/mcs51/asmain.c: strcmpi -> as_strcmpi + * as/mcs51/assym.c: strcmpi -> as_strcmpi + * as/mcs51/lkmem.c: strcmpi -> as_strcmpi + * as/mcs51/lknoice.c: strcmpi -> as_strcmpi + * as/mcs51/lksym.c: strcmpi -> as_strcmpi + * as/mcs51/Makefile.aslink: new module strcmpi + * as/mcs51/Makefile.asx8051: new module strcmpi + * as/mcs51/Makefil.bcc: new module strcmpi + * as/mcs51/Makefile.in: new module strcmpi + * sim/ucsim/s51.src/uc390.cc (get_mem_size): make RAM big enough for tinibios + +2003-01-26 + + * src/SDCCglue.c: reverted back to 1.124 + * src/SDCCast.c: reverted back to 1.156 + * src/mcs51/gen.c (aopGet): applied Frieder's efficiency patch + +2003-01-25 + + * src/SDCCglue.c: A better fix for bug #661910 + * src/SDCCast.c: A better fix for bug #661910 + * src/SDCCglue.c (emitRegularMap): That was a little too efficient + +2003-01-24 Bernhard Held + + * src/Makefile.in: remove spawn.o + * src/SDCCmain.c: remove spawn.h + * src/SDCCmain.c (printVersionInfo): report MINGW32 instead of UNIX + * src/spawn.c: removed + * src/spawn.h: removed + * support/regression/ports/ds390/spec.mk: link with -r + +2003-01-24 + + * src/ds390/gen.c (aopOp): fixed bug #667458 + * src/SDCCglue.c (emitRegularMap): fixed bug #458099 again + * src/SDCCast.c (createIvalCharPtr): fixed bug #661910 + (createIvalCharPtr): an ival doesn't always have a storage class anymore + +2003-01-24 Bernhard Held + + * src/mcs51/peeph.def: better assembler identation by Frieder + * src/mcs51/gen.c: better assembler identation by Frieder + +2003-01-22 Bernhard Held + + * as/z80/string.h: removed for gcc 3.2 + * support/makebin/makebin.c: #include for gcc 3.2 + * src/pic/pcode.c (get_op_from_instruction): fix concatenation of string literals with __FUNCTION__ for gcc 3.2 + +2003-01-19 Bernhard Held + + * src/SDCCmain.c (linkEdit): rename mem and map files even in case of failure + * src/SDCCpeeph.c (replaceRule): fix bug #663503 + * support/regression/Makefile: separate temp files for ports + * support/regression/generate-cases.py: separate temp files for ports + * src/mcs51/peeph.def: Frieder: removed 237 (obsolete by 236g and 105); added 237 a/b + * src/ds390/peeph.def: Frieder: removed 237 (obsolete by 236g and 105); added 237 a/b + +2003-01-19 Bernhard Held + + * moved tinitalk to device/examples/ds390 + +2003-01-14 Bernhard Held + + * as/mcs51/lkmem.c: rflag is for DS390 + * src/SDCCglobl.h: removed out_name and options stackOnData, genericPtr + * src/SDCCmain.c (optionsTable, setDefaultOptions): removed --stack-after-data and --generic + (linkEdit): move mem- and map-files the same way as ihx-files + * src/z80/main.c (_setDefaultOptions): removed --generic + * src/SDCCmain.c (_processC1Arg, parseCmdLine, main): --c1mode works again + * src/SDCCglue.c (createInterruptVect, glue): --c1mode works again + * src/pic/glue.c (picglue): --c1mode works again + * src/pic16/glue.c (pic16glue): --c1mode works again + * src/asm.c (printCLine): fix #660034 + +2003-01-13 Bernhard Held + + * src/ds390/peeph.def: fix #123; add 14 rules by Fiorenzo D. Ramaglia , 1 by Frieder + * src/mcs51/peeph.def: fix #123; add 14 rules by Fiorenzo, 1 by Frieder + * src/mcs51/gen.c (genFunction): emit r0 instead of ar0 by Fiorenzo + * as/mcs51/lkmem (summary): better fix for sp problem + * src/SDCCglue.c (glue): __start_stack - 1, saves 1 byte! + * src/ds390/main.c (_ds390_finaliseOptions, _tininative_finaliseOptions): stack_loc = 0x400008 + * support/regression/ports/*/spec.mk: moving testfwk-object to port dir allow parallel execution of regression tests + remove --stack-after-data + +2003-01-12 Bernhard Held + + * src/SDCCmain.c (main): port->finaliseOptions() moved for z80 linking + * src/SDCCutil.c (join): ugly bug: missing '\0' + * as/mcs51/lkmem.c (summary): sp on address 7 is safe + +2003-01-11 Bernhard Held + + * src/SDCCmain.c (assemble, linkEdit): preparations for -o + * src/port.h: typo + * src/pic/main.c (_asmCmd): gpasm supports -o + * src/z80/main.c: more general macros + * device/lib/Makefile.in: remove intermediate files + +2003-01-11 Bernhard Held + + * .version: Bumped version number to 2.3.3 + * src/SDCCBBlock.c: new option -o + * src/SDCCglobl.h: new option -o + * src/SDCCglue.c: new option -o + * src/SDCCmain.c: new option -o + * src/asm.c: new option -o + * src/ds390/main.c: new option -o + * src/pic/glue.c: new option -o + * src/pic/pcode.c: new option -o + * src/pic/ralloc.c: new option -o + * src/pic16/glue.c: new option -o + * src/pic16/pcode.c: new option -o + * src/pic16/ralloc.c: new option -o + * src/z80/main.c: new option -o + * device/lib/Makefile.in: use -o + * support/regression/ports/ds390/spec.mk: use -o + * support/regression/ports/gbz80/spec.mk: use -o + * support/regression/ports/mcs51/spec.mk: use -o + * support/regression/ports/mcs51-stack-auto/spec.mk: use -o + * support/regression/ports/z80/spec.mk: use -o + * support/regression/ports/ucz80/spec.mk: use -o + * support/regression/ports/xa51/spec.mk: use -o + * support/regression/fwk/lib/timeout.c: fix usage string + +2003-01-09 Bernhard Held + * src/mcs51/gen.c (genPlus): replaced "mov b,acc" by "mov b,a" Fiorenzo D. Ramaglia + +2003-01-07 + + * src/SDCCast.c (decorateType): fixed bug #600035 + +2003-01-07 Bernhard Held + * as/mcs51/lkmem.c: added several l-modifiers to printf to remove warnings + * as/mcs51/lkaomf51.c: #include to remove warnings + * src/pic/main.c (_hasNativeMulFor): outcommented unused variables to remove warnings + * src/pic/pcode.c: outcommented unused variable to remove warnings + * src/pic/ralloc.c: outcommented unused variable to remove warnings + +2003-01-06 + * sim/ucsim/cmd.src/command.cc: fixed so "break xram r 0x7654" works again in + regression tests. + +2003-01-06 + + * src/SDCCicode.c: fixed array add + +2002-01-05 Bernhard Held + * src/SDCCmacro.c: MAX_STRING_LENGTH increased to 2048; was too small for regression tests + * support/regression/ports/host/support.c: #include for gcc 3.2 + +2003-01-04 + + * src/SDCCval.c (getNelements): fixed the initialized array of structures + +2002-12-29 Jesus Calvino-Fraga + * as/mcs51/Makefile.bcc: fixed typo lkomf51.o -> lkaomf51.o + +2002-12-28 Bernhard Held + * src/mcs51/peeph.def: added rules 234 and 235 from Frieder Ferlemann + * support/regression/tests/bug-524697.c: fit mem usage into 8032 + +2002-12-28 Bernhard Held + * src/mcs51/gen.c (aopGetUsesAcc): inserted missing "return FALSE" + +2002-12-27 Bernhard Held + * as/mcs51/Makefile.in: fixed typo lkomf51.o -> lkaomf51.o + +2002-12-26 Bernhard Held + * src/mcs51/main.c: removed {bindir}{sep} from aslink + +2002-12-10 Jesus Calvino-Fraga + + * in /sdcc/as/mcs51/ changed these files in order to create an + aomf51 file: aslink.h, lkdta.c, lklex.c, lklibr.c, lklist.c, + lkmain.c. Also added: lkmem.c and lkaomf51.c. Changed the + following files to include the previous two files: aslink.dsp, + Makefile.aslink, Makefile.bcc, and Makefile.in. + + * Changed /sdcc/src/SDCCmain.c so it creates files with extension + .adb instead of .cdb + +2002-11-09 Jesus Calvino-Fraga + + * /sdcc/as/mcs51/lklist.c: Now reports memory usage using the + value from option --iram-size. + +2002-09-20 Jesus Calvino-Fraga + + * /sdcc/as/mcs51/lklist.c: added boundary check before using + dram[] array. + +2002-09-18 + + * SDCClrange.h: exposed setFromRange() and setToRange() + * mcs51/ralloc.c: fixed over-eager packRegsForSupport() and + packRegsForAccUse() (bug 542397) + * mcs51/gen.c: MOVA() is now a function to avoid calling aopGet() + multiple times and emitting the fetch operations more than once + added aopGetUsesAcc() function to allow binary operators to + fetch their operands in the correct order; made genMinus() emit + compact code for X = LITERAL - Y + +2002-09-00 Jesus Calvino-Fraga + * /sdcc/as/mcs51/lklist.c: Fixed incorrect number of parameters to + sprintf() in line 1267. + +2002-09-08 Jesus Calvino-Fraga + * /sdcc/src/SDCCglue.c: Generate areas REG_BANK_[0-3] only for 8051 + like ports. + +2002-09-04 Jesus Calvino-Fraga + Changes to aslink (All the changes are marked with 'JCF'): + + * /sdcc/as/mcs51/aslink.h: External definition of sflag and + summary(). + + * /sdcc/as/mcs51/lkarea.c: Computes the size of area BSEG_BYTES from + area BSEG. Also moves, if possible, the DATA area down into the internal + ram so more space is available. + + * /sdcc/as/mcs51/lkdata.c: Definition of memory summary output flag + sflag. + + * /sdcc/as/mcs51/lklist.c: For the BSEG area report the size in bits, + not bytes. Function summary() which creates a memory usage summary + file with extension .mem. Reports of overlaping stack and small stack + size. If the space for the stack is less than 16 bytes aslink trows a + warning. + + * /sdcc/as/mcs51/lkmain.c: Creation of some of the default areas for + the 8051. Option 'y' for memory summary output file. + + Changes to sdcc (All the changes are marked with 'JCF'): + + * /sdcc/src/SDCCglobl.h: External definition of RegBankUsed[4]. + + * /sdcc/src/SDCCglue.c: If a register bank is used, creates an + overlaying area for it (uses RegBankUsed[4]). + + * /sdcc/src/SDCCmain.c: Definition RegBankUsed[4]; marks register + bank zero as used by default. By default aslink locates the stack + (equivalent to --stack-after-data). Pass option 'y' to aslink for + the creation of the .mem file. Delegates the allocation of data area + to aslink (it is not longer 0x30 by default). If --stack-loc passes + the begining of the stack area to aslink. + + * /sdcc/src/SDCCmem.c: If a register bank is used, marks it so + glue() in SDCCglue.c creates an area for it. + +2002-09-03 Borut Razem + * sdcc/src/SDCCglue.c, sdcc/src/SDCCglue.h, sdcc/src/SDCCmain.c, + sdcc/src/pic/glue.c: + introduced atexit() handler for teporay files removal in case of + errors, assertions, ... + +2002-08-29 Borut Razem + * sdcc/support/cpp2/auto-host_vc_in.h: + re-definition of O_BINARY and other O_XXX as _O_BINARY and _O_XXX, so the problem + with the returned value from read() in sdcc/support/cpp2/cppfiles.c is solved for MSC. + Maybe there is a similar problem with BORLANDC? It should be checked! + + * sdcc/src/ds390/ralloc.c, sdcc/src/mcs51/ralloc.c, sdcc/src/z80/ralloc.c: + corrected improper use of assert: the assignment to clr variable was done inside the assert. + In case that NDEBUG was defined, the assert macro was substituted with no-op, so the assignment + was not executed, and the compiler (cl) launched a warning: + ralloc.c(1442) : warning C4700: local variable 'clr' used without having been initialized + +2002-08-28 Bernhard Held + * src/SDCCglue.c (printIvalArray): iterative calculation of array length + +2002-08-28 Jesus Calvino-Fraga and Borut Razem + * sdcc/sdcc.dsw: added sdcpp, sdcppa, yacc, conf projects + + * sdcc/src/src.dsp, sdcc/src/avr/avr.dsp, sdcc/src/ds390/ds390.dsp, + sdcc/src/mcs51/mcs51.dsp, sdcc/src/pic/pic.dsp, sdcc/src/z80/z80.dsp, + sdcc/src/xa51/xa51.dsp, sdcc/src/avr/avra.dsp, + sdcc/src/ds390/ds390a.dsp, sdcc/src/mcs51/mcs51a.dsp, + sdcc/src/pic/pica.dsp, sdcc/src/z80/z80a.dsp, + sdcc/src/xa51/xa51a.dsp, sdcc/as/as_z80.dsp, + sdcc/as/aslink.dsp, sdcc/as/asx8051.dsp, sdcc/packihx/packihx.dsp: + - added Release configuration in VS projects + - review of compiler an linker options + - VC .exe files are generated in bin_vc directory, not to interfere + with binaries generated from other projects (cygwin, mingw, bcc ...) + + * sdcc/src/yacc.dsp: added + + * sdcc/config.dsp, sdcc/configure_vc.awk, sdcc/sdcc_vc_in.h: + added - genarate sdcc_vc.h using sdcc_vc_in.h as template + and insert the version number definitions from .version + + * sdcc/support/cpp2/sdcpp.dsp: added - VC project for sdcpp + + * sdcc/support/cpp2/sdcppa.dsp, sdcc/support/cpp2/auto-host_vc_in.h: + added - genarate auto-host.h using auto-host_vc_in.h as template + + * sdcc/sdcc_vc.h, + removed from CVS, generated automatically + +2002-08-25 Bernhard Held + * support/scripts/inc2h.pl: use gputils or gpasm (from Nathan Hurst) + +2002-08-11 Borut Razem + * support/Util/NewAlloc.c: removed unneeded #include "sdccconf.h" (suggested by Jesus Calvino-Fraga) + +2002-08-10 Borut Razem + * src/SDCCmain.c (main): + file preOutName was unlinked before closed. This seems to be OK on UNIX and cygwin + platforms, but it doesn't work with Visual Studio: the opened file can not be removed. + The consequence was that some temporary files were not removed. + + * src/SDCCglue.c: + unification of code in functions tempfilename() and tempfile(): + function tempnam() is defined in Visual Studio 6.0 and .NET + + * sdcc/sdcc.dsw: removed project sdcpp, added project xa51a + + * sdcc/src/src.dsp, sdcc/src/avr/avr.dsp, sdcc/src/ds390/ds390.dsp, + sdcc/src/mcs51/mcs51.dsp, sdcc/src/pic/pic.dsp, sdcc/src/z80/z80.dsp: + - removed compiler command line option /WX: Treats all warnings as errors + - update a list of source files, included into the project + + * sdcc/src/avr/avra.dsp, sdcc/src/ds390/ds390a.dsp, sdcc/src/mcs51/mcs51a.dsp, + sdcc/src/pic/pica.dsp, sdcc/src/z80/z80a.dsp: + changed project type to Generic Project so that can be correcly converted to VS.NET project + + * sdcc/as/mcs51/asm.h: definition of PATH_MAX for MSC + + * sdcc/src/SDCCast.c: solved MSC error in function decorateType() + + * sdcc/src/SDCC.y: added missing ending ';' to rules to get rid of bison warnings + + * dcc/src/ds390/ralloc.c, sdcc/src/mcs51/ralloc.c: + added return 0 statements after assert() to make compiler happy + + * sdcc/src/xa51/peeph.rul, sdcc/src/xa51/peeph.def, sdcc/src/z80/ralloc.c: + added newline in the def file to keep MSC compiler satisfied + + * sdcc/src/z80/gen.c: + - function strcasecmp() is not defined in MSC (and probably also in BORLANDC), + so it is replaced with STRCASECMP, which is defined as stricmp in case of MSC and BORLANDC + - solved MSC error in function aopDump() + + * sdcc_vc.h: define PREFIX as "\\sdcc" + +2002-07-18 Bernhard Held + * src/SDCCast.c (decorateType): fixed access to array of structures http://sourceforge.net/mailarchive/forum.php?thread_id=902690&forum_id=4107 + +2002-06-22 Scott Dattalo + * src/pic/*: Numerous bug fixes. Flow analysis has been enhanced. + - Rewrote the register banking algorithm. + - Added pCode live-range analysis to registers (for now, only non-used and + singly-used registers optimized away) + + * src/pic/pcoderegs.[ch]: Added new files for pCode live-range analysis + + * support/scripts/inc2h.pl Kevin L. Pauba submitted this perl script for converting MicroChip include files into SDCC Pic include files. + +2002-05-10 Scott Dattalo + * src/pic/*: Added support for multiplication. Fixed many,many bugs. + +2002-04-22 Michael Hope + + * device/lib/z80/printf.c: Changed emitter to volatile to work around a pcall bug. + + * configure.in (DD_COPT): Added include support required for gbdk. + + * .version: Bumped version number just to increase it. + + * src/SDCCmain.c: Added -nostdinc to the default options. + +2002-04-15 Michael Hope + + * device/lib/z80/printf.c (sprintf): Added. + + * src/z80/ralloc.c (packRegisters): Disabled pack HL use for GB as it's broken. + + * src/z80/peeph.def: Added transpose redundent load rule. + + * src/z80/main.c: Added force callee saves for jaune. + + * src/port.h: Removed the i186 and tlcs-900h ports as they weren't being being developed. + + * src/SDCCmain.c: Pulled the options definition out so that you can add port specific options without changing the main file. + +2002-03-28 Johan Knol + + * src/SDCCval.c: fixed bug #532436 + +2002-03-14 Scott Dattalo + * /src/port.h: + Added "char *Processor" field to the port structure. + + * /src/SDCCmain.c: + Added -p option. Allows port dependent processor to be specified. + + * all ports: + Initialized the new field char *Processor field to NULL in all ports + + * /src/pic/*: + Compiler generated registers for interrupt context saving + were not getting allocated. + +2002-03-16 Sandeep Dutta + + * /src/SDCCast.c: + Fixed left shift. Will promote the left side of a left shift + if a) left shifting more than size of operand or b) when assigned + to something size > size of left side + +2002-03-14 Scott Dattalo + * src/pic/* + tons of changes. Register allocation has been + rewritten. Added customization for the various PICs. Flow + analysis is restructured. ... + + * src/pic/device.h: + Added + + * src/pic/device.c: + Added. device.c is a PIC port hack to accomodate variations + in PIC devices. + +2002-03-13 Michael Hope + + * src/z80/gen.c (genGenPointerGet): Fixed a bug where a pointer in HL is dereferenced into HL but HL is not spilled. Yeah. + +2002-03-04 johanknol + + * /src/SDCCval.c: fixed + + const unsigned char arr[][2] = { { 0, 1 } }; + t18.c:1: error: Initializer element is not constant + +2002-03-04 bela + + * /device/include/mcs51reg.h: + ds89c420 register definition update + +2002-03-03 + + * support/Util/SDCCerr.c: did something, but don't no why anymore + + * support/regression/tests/bug-524691.c: made it a little less shy + + * src/SDCCast.c (decorateType): fixed bug #524697 + + * src/SDCCast.c: made some lineno improvements + + * src/SDCCval.c (getNelements): changed warning to error + + * src/SDCCglue.c (printIvalArray): changed warning to error + + * src/SDCCicode.c: fixed a warning for mingw + + * src/SDCCast.c (decorateType): fixed the << promotion for ops + + * src/SDCCicode.c (geniCodeDivision): divide is shift only for unsigned (bug #524685) + +2002-03-02 Sandeep Dutta + + * src/ds390/peeph.def: + Added some more peephole rules + + * src/ds390/gen.c: Various fixes & enhancements + + * src/SDCClrange.c, src/SDCClrange.h: + functions "alldefsoutofrange" and "notusedinblock" moved to SDCClrange.c + + * src/ds390/ralloc.c: + various fixes & enhancements (ds390) specific + + * src/avr/ralloc.c, src/mcs51/ralloc.c, src/pic/ralloc.c, src/xa51/ralloc.c, src/z80/ralloc.c: + Functions "allDefsOutOfRange" & "notUsedinBlock" moved to SDCClrange.c + from rallocs. + + * sdcc/src/SDCCcse.c: Better fix for bug # 514308 + +2002-03-02 + + * src/SDCCast.c (decorateType): fixed bug #524708 + + * src/SDCCval.c (floatFromVal): fixed the literal void (whatever that may be) + + * src/SDCCicode.c (geniCodePtrPtrSubtract): fixed bug #524691 + +2002-03-01 Michael Hope + + * src/SDCCsymt.c (initCSupport): Removed managling of support function names. + + * src/z80/ralloc.c (packRegsForIYUse): Fixed fp bug where four byte operands were packed into IY. + +2002-03-01 + + * src/SDCCglue.c (printIvalPtr): fixed bug #524211 + + * src/SDCCast.c (decorateType): fixed bug #524209 + + * src/SDCCval.c (valNot): fixed bug #524195 + +2002-02-26 + + * src/xa51/gen.c: fixed a warning + + * src/SDCCglue.c (printIvalFuncPtr): fixed bug #522534 + + * src/SDCCast.c (decorateType): fixed bug #522534 + +2002-02-23 + + * src/SDCCdflow.c (computeDataFlow): fixed bug #460088 + +2002-02-22 + + * src/SDCCast.c: fixed bug #514865 + + * src/SDCCy.c ("SDCC.y"): fixed bug #516625 + +2002-02-21 Sandeep Dutta + + * sdcc/src/SDCCloop.c: + Previous fix was not good. basic blocks that have "break" or "return" are + not really partof a loop , but live ranges used in these blocks should + be live thru the entire loop, so set partOfLoop but don't add them to + loop region + +2002-02-21 + + * src/SDCCcse.c: fixed bug #514308 + +2002-02-20 Sandeep Dutta + + * src/SDCCloop.c: + Fixed BUG #519583. If a conditional block ended in a return/break + statement inside a loop, it was not being considered part of the loop. + + * src/SDCCcflow.c: Removed fix (Fixed in SDCCloop.c) + +2002-02-10 Karl Bongers + + * debugger/*: + Fixed up SDCDB debugger somewhat. Updated debugger/README + with lots of comments and notes. + + * device/examples/test2.c: + Fix bug, "red" variable not being initialized(compiler complained). + + * device/examples/Makefile, examples/test3.c: + Add Makefile in device/examples folder, compiles test3.c + for use as a multiple module SDCDB test case. + + * sim/ucsim/cmd.src/cmdset.cc: + Took out debug printfs in ucsim "next" command. + + * sim/ucsim/xa.src: + Karl and Johan start ucsim XA support. Most dissassembly working, + about 75% emulation done(plenty of work remaining). + + * sim/ucsim/z80.src: + Add Z80 support to ucsim, add test-ucz80 regression test, + notice ucsim/z80 emulation fails on examples/test3.c/itoa code. + Notice z80 compiler fails on examples/test3.c/crc code. + +2002-01-30 Sandeep Dutta + + * src/mcs51/gen.c, src/mcs51/main.c, src/mcs51/ralloc.c: + Added support for --parms-in-bank1 + + * src/ds390/peeph.def: + added a few more peephole optimzations + + * src/ds390/main.c: + 1) added __builtin_inp & __builtin_outp used to read in data of given length + from a memory mapped port + 2) added __builtin_memcmp + 3) added __builtin_swapw swap bytes of a short + + * src/ds390/gen.c, src/ds390/gen.h, src/ds390/ralloc.c: + 1) handle multiple send & receives from register bank1 + 2) ralloc can now allocate DPTR1 to some liveRanges + + * src/SDCCsymt.c, src/SDCCsymt.h: + changes to handle multiple sends & receives + + * src/SDCCptropt.h: + added some pointer arithmetic optimization + + * src/SDCCptropt.c: + added some pointer arithmetic optimizations but not stable yet so not + called from anywhere (will get this working shortly) + + * src/SDCCopt.c: fixed for multiple sends & receives + + * src/SDCCmain.c: + 1) added options --parms-in-bank1 (ds390/mcs51) & --protect-sp-update + 2) preprocessing done AFTER port->finalizeoptions . This allows ports to + set preprocessor defines (depending on options) + + * src/SDCCicode.c, src/SDCCicode.h: + changes made to handle multiple sends & receives + + * src/SDCCglobl.h: + Added options --protect-sp-update (ds390) and --parms-in-bank1 (ds390/mcs51) + + * src/SDCCcse.c, src/SDCCcse.h: + added function findbackward def (to be used in upcoming optimization) + + * src/SDCCcflow.c, src/SDCCcflow.h: + added function returnAtEnd - to determine if a basic block terminates with + a RETURN iCode + + * src/SDCCast.c, src/SDCCast.h: + added option parms-in-bank1 + + * device/lib/_divsint.c, device/lib/_divslong.c, device/lib/_divuint.c + * device/lib/_divulong.c, device/lib/_modsint.c, device/lib/_modslong.c + * device/lib/_modulong.c, device/lib/_mulint.c, device/lib/_mullong.c: + adjusted for --parms-in-bank1 option + + * device/include/string.h: + donot redefine "reentrant" keyword + + * device/include/ds80c390.h: Added some more SFRs + +2002-01-28 Bernhard Held + + * sim/ucsim: Merged branch ucsim-034-pre3 to main trunk; new version 0.4 + +2002-01-26 Bernhard Held + + * src/SDCCast.c (funcOfType): fix usage of double --float-reent + +2002-01-22 Bernhard Held + + * support/regression/fwk/lib/testfwk.c (main): Removed workaround for bug #505387 + +2002-01-18 Paul Stoffregen + + * Added --xram-movc option + +2002-01-13 Bernhard Held + + * support/regression/Makefile: don't include test-mcs51-stack-auto in target all + +2002-01-11 Johan Knol + + * Added math lib of Jesus Calvino-Fraga + +2002-01-08 Bernhard Held + + * src/SDCCmain.c (processFile): fix processing of ../../src.c + * support/regression/Makefile: new target test-mcs51-stack-auto + * support/regression/ports/mcs51-stack-auto/spec.mk: added + +2002-01-04 Bernhard Held + + * src/SDCCglue.h: printIvalCharPtr(), not printIvalChar() + +2002-01-04 Bernhard Held + + * support/regression/ports/mcs51/support.c: correct setup of timer / UART + +2002-01-03 Bernhard Held + + * src/SDCCsymt.c (processFuncArgs): fix #498307 by Johan + + * src/SDCCglue.h: add definition for printIvalChar() + +2002-01-02 Bernhard Held + + * src/SDCCast.c: fix #498138 by Johan + + * src/SDCCglue.c: fix #498138 by Johan + +2002-01-02 Bernhard Held + + * support/regression/Makefile: fix clean + + * support/regression/ports/ds390/support.c: fix transmission of last character + +2001-12-29 Sandeep Dutta + + * /sdcc/src/ds390/gen.c: + a) improved computing address of stack variable + b) took out some #if 0 code + c) improved parmBytes adjustment + d) improved genPlusIncr & genMinusIncr + e) genCmp could generate bad code (when left assigned to DPTR) + f) Fixed bug in hasInc + + * /sdcc/src/ds390/ralloc.c: + a) packRegsForSupport could mess up live information (Fixed) + b) packRegsDPTRuse could be incorrect for left & right shift + + * /sdcc/src/mcs51/ralloc.c: + packRegsForSupport could mess up the live information (Fixed) + + * /sdcc/src/mcs51/gen.c: Fixed a bug in hasInc + + * /sdcc/src/SDCCast.c: + can reverse a loop even if function call is present as long + as the loop control variable is local & is not passed as parameter + +2001-12-24 Sandeep Dutta + + * /sdcc/ChangeLog: *** empty log message *** + + * /sdcc/src/ds390/gen.c, /sdcc/src/ds390/main.c: + More builtin function additions for TININative + + * /sdcc/src/ds390/ralloc.c: + Had broken the regression testsuite + + * /sdcc/src/SDCCast.c: Fixed a bug in dumptree + + * /sdcc/src/SDCCsymt.c, /sdcc/src/SDCCsymt.h: + Added funcattr hasStackParms will be set for reentrant functions when there + are paramteres on the stack, this helps in minimizing frame pointer generation + typeFromStr can handle function pointers now + + * /sdcc/doc/builtins.txt, /sdcc/doc/TININative.txt: + *** empty log message *** + +2001-12-24 Sandeep Dutta + + * /src/ds390/gen.c, /src/ds390/main.c: + More builtin function additions for TININative + + * /src/ds390/ralloc.c: + Had broken the regression testsuite + + * /src/SDCCast.c: Fixed a bug in dumptree + + * /src/SDCCsymt.c, /src/SDCCsymt.h: + Added funcattr hasStackParms will be set for reentrant functions when there + are paramteres on the stack, this helps in minimizing frame pointer generation + typeFromStr can handle function pointers now + + * /doc/builtins.txt, /doc/TININative.txt: + *** empty log message *** + + +2001-12-24 Sandeep Dutta + + * /src/ds390/gen.c, /src/ds390/main.c, /src/ds390/peeph.def, /src/ds390/ralloc.c: + ALPHA version for -mTININative + + * /src/izt/i186.c, /src/izt/tlcs900h.c, /src/mcs51/main.c, /src/pic/main.c, /src/z80/main.c, /src/avr/main.c: + updated to reflect changes in the port structure + + * /src/port.h: + added function do_assemble (similar to do_link) if non-null this function + will be called to do assembly (-mTININative) requires a multi command + assembly + added function genAssemblerEnd will be called to generate assembler Epilogue + + * /src/SDCCsymt.c: + added _JavaNative to debug info printing + + * /src/SDCCmain.c: added option --tini-libid + added port->do_assemble function (-mTININative) has a multi command assemble + + * /src/SDCCglue.c: Disabled "constExpr" check + added port->genAssemblerEnd function + + * /src/SDCCglobl.h: Added option --tini-libid value + + * /src/SDCCast.h: + tookout optimizeCompare from the header (has no external references) + + * /src/SDCCast.c: made one more function "static" + +2001-12-23 Michael Hope + + * src/z80/mappings.i: Added z80asm support. + + * src/z80/main.c: Added z80asm support on --asm=z80asm + + * src/z80/gen.c: Fixed asm portability issues. + + * src/asm.c (tvsprintf): Removed old code, added 'N' for function name. For extern support. + + * src/SDCCglue.c (printExterns): Added global/extern split. + +2001-12-17 Bernhard Held + + * support/regression/Makefile: added test for mcs51 model large + + * support/regression/ports/mcs51-large/spec.mk: added test for mcs51 model large + + * support/regression/ports/gbz80/spec.mk: added -mgbz80 + +2001-12-05 Michael Hope + + * src/diff.1 (Index): Many, many optmisiations. Dhrystone up to 201. + +1904-01-06 Michael Hope + + * src/z80/ralloc.c (packRegsForIYUse): Fixed the case where an operand is in direct space. + + * src/z80/gen.c (makeFreePairId): Optimised IY load by using a spare pair. + +2001-12-02 Bernhard Held + + * src/mcs51/gen.c (genFunction): avoid excess "inc sp" + + * support/regression/tests/simplefloat.c: Port to mcs51. + +2001-11-25 Michael Hope + * support/regression/tests/bug-485362.c: Added. + + * support/regression/tests/simplefloat.c (testDivNearOne): Added. + + * src/z80/gen.c (aopOp): Fixed case where left and result are in the same spill loc and they have different sizes. + + * src/z80/peeph.def: Added rules for optimising two byte compares on the same thing, and to optimise two ptr assign. + + * src/z80/gen.c (aopDump): Added a dump function. + +2001-11-25 Bernhard Held + * sim/ucsim/s51.src/glob.cc: DS390 SFRs and bits added. + + * sim/ucsim/s51.src/port.cc: Port 4 and 5 added. + + * sim/ucsim/s51.src/regs51.h: DS390 SFRs added. + + * sim/ucsim/s51.src/uc390.cc: Some details improved, CKRDY works for tinibios. + + * sim/ucsim/s51.src/uc390cl.h: Work in progress. + + * sim/ucsim/sim.src/uccl.h: 6 ports for DS390. + + * support/regression/fwk/lib/testfwk.c: Run with tinibios. + + * support/regression/ports/mcs51/spec.mk: Fine tuninig. + + * support/regression/ports/ds390/support.c: Use tinibios. + + * support/regression/ports/ds390/spec.mk: Fine tuning, use tinibios. + +2001-11-23 Michael Hope support/regression/tests/bug-460010.c + + * src/z80/ralloc.c (packRegsForHLUse3): Changed to not pack into HL if anything is in direct space. + (packRegsForHLUse3): Added packing support for send, cast, and return value from a call. + + * src/z80/peeph.def: Added rules for optimising pushes of part of a pair. + + * src/z80/gen.c (emitCall): Changed the stack fixup to not use HL. + +2001-11-18 Michael Hope + + * src/z80/gen.c (genCmp): Fixed compare on unsigned. + + * src/z80/ralloc.c (packRegsForHLUse3): Created and optimised. + (packRegsForIYUse): Created and optimised. + +2001-11-07 Michael Hope + + * support/regression/tests/float.c (testFloatAdd): Fixed up warning. +2001-11-18 Bernhard Held + + * sdcc/support/regression/tests/bug-460010.c: fix seg violation on host + + * sdcc/support/regression/tests/muldiv.c: fix output on mcs51 + + * sdcc/support/regression/tests/stacks.c: fix DSEG overflow on mcs51 + +2001-11-07 Bernhard Held + + * sdcc/sim/device/lib/_gptrget.c: mem region 5 (idata) added + + * sdcc/sim/device/lib/_gptrput.c: mem region 5 (idata) added + +2001-11-07 Bernhard Held + + * sdcc/sim/ucsim/globals.cc: New: IXRAM. + + * sdcc/sim/ucsim/stypes.h: New: IXRAM. + + * sdcc/sim/ucsim/s51.src/uc390.cc: New: IXRAM. + +2001-11-07 Michael Hope + + * src/z80/ralloc.c (packRegsForHLUse): Banned IFXs from being packed into HL. + (packRegsForHLUse): Added rule to pack address of/pointer get for itemps into HL for the Z80. + (packRegsForAccUse2): Added rule to pack hbit IFXs into A. + + * src/z80/main.c (_setDefaultOptions): Made float code re-entrant by default. + + * src/z80/gen.c (aopGetLitWordLong): Added word support for floats. + (genNotFloat): Added. + (genUminusFloat): Added. + + * device/lib/z80/Makefile: Added floating pt stubs. + + * device/lib/Makefile.in (Z80SOURCES): Added floating pt support. + + * src/z80/gen.c (genIpush): Fixed up a push of one byte when left is in a pair. + + * device/lib/_fsadd.c (__fsadd): Fixed up return where the numbers are hugely different. + +2001-11-07 Bernhard Held + + * sdcc/sim/ucsim/s51.src/glob.cc: Minor fix. + + * sdcc/sim/ucsim/s51.src/regs51.h: Minor fix. + + * sdcc/support/regression/Makefile: Add port ds390. + + * sdcc/support/regression/ports/mcs51/spec.mk: Minor change. + + * sdcc/support/regression/ports/z80/spec.mk: Minor change. + + * sdcc/support/regression/ports/ds390/spec.mk: Added. + + * sdcc/support/regression/ports/ds390/support.c: Added. + + * sdcc/support/regression/ports/ds390/uCsim.cmd: Added. + + * sdcc/support/regression/ports/mcs51/timeout.c: Cut. + + * sdcc/support/regression/fwk/lib/timeout.c: Paste. + +2001-11-04 Michael Hope + + * device/include/malloc.h: Added z80 and gbz80 support. + + * device/lib/gbz80/heap.s: Added. + + * device/lib/z80/heap.s: Added. + + * device/lib/malloc.c: Added z80 and gbz80 support. + + * support/regression/tests/malloc.c (testMalloc): Added. + + * src/SDCCmain.c (parseCmdLine): Added support for -Wp. + + * support/regression/tests/bug-478094.c: Added. + + * src/z80/gen.c (commitPair): Fixed silly gbz80/z80 commit to static bug. + +2001-11-04 Bernhard Held + + * sdcc/sim/ucsim/s51.src/uc390cl.h: Improvement for ds390 to run regression tests + + * sdcc/sim/ucsim/s51.src/uc390.h: Improvement for ds390 to run regression tests + + * sdcc/sim/ucsim/s51.src/regs51.h: Improvement for ds390 to run regression tests + + * sdcc/sim/ucsim/s51.src/glob.cc: Improvement for ds390 to run regression tests + + * sdcc/support/regression/tests/bug-460010.c: Small change for ds390 + +2001-11-04 Michael Hope + + * src/z80/peeph-gbz80.def: Removed a bad sub optimisation. + +2001-11-03 Michael Hope + + * support/regression/tests/bug-477927.c: Added. + + * src/z80/peeph.def: Added minor rules. + + * src/z80/gen.c (genPlusIncr): Added an extra plusinc rule. + + * src/z80/peeph.def: Added jump optimisation modification. + +2001-11-01 Michael Hope + + * src/SDCCmain.c (linkEdit): Added runtime path detection to the mcs51 port. + +2001-10-30 Michael Hope + + * support/regression/tests/funptrs.c: Added. + +2001-10-29 Michael Hope + + * src/z80/ralloc.c (packRegsForHLUse): Fixed up bad spill due to pushing one byte via HL. + +2001-10-28 Michael Hope + + * src/z80/gen.c (genArrayInit): Made it work for on stack arrays. + + * src/z80/main.c (gbz80_port =): Added rle support to the gbz80 port. + + * src/z80/gen.c (genMinus): Fixed for where the result is one byte. + (movLeft2ResultLong): Created. + + * src/z80/ralloc.c (packRegsForHLUse): Added a couple of simple cases for the GB. + (joinPushes): Added. Joins two char pushes into a word push. + +2001-10-27 Michael Hope + + * support/cpp2/Makefile.in (install): Added creation of dest dir. + + * support/makebin/Makefile (install): Added creation of dest dir. + +2001-10-24 Karl Bongers + + * configure.in, configure, Makefile, support/cpp: Removed cpp folder, since we have new cpp2 preprocessor code. + +2001-10-21 Michael Hope + + * src/z80/ralloc.c: Turned off faulty pack for one use. + + * src/z80/peeph-gbz80.def: Removed redundent restart options. + + * src/z80/gen.c (genMult): Added native mul for constants on the z80 and gbz80. + +2001-10-21 Bernhard Held + + * support/regression/Makefile: Improved clean + + * support/regression/ports/gbz80/spec.mk: Added clean + + * support/regression/ports/host/spec.mk: Added clean + + * support/regression/ports/z80/spec.mk: Added clean + + * support/regression/ports/mcs51/spec.mk: Added clean, little improvements + + * support/regression/ports/mcs51/timeout.c: little improvements + +2001-10-17 Michael Hope + + * device/lib/malloc.c (MEMHEADER): Fixed against new pedantic pointers. + + * support/regression/fwk/include/testfwk.h: Fixed up to use function pts correctly. + + * support/regression/generate-cases.py: Fixed up to use function pts correctly. + +2001-10-16 Bernhard Held + + * support/regression/port/mcs51/spec.mk: add timeout for uCsim + + * support/regression/port/mcs51/timeout.c: add timeout for uCsim + +2001-10-13 Michael Hope + * src/z80/gen.c (emitCall): Fixed up missing spill of HL when used to assign the result value. + + * src/z80/ralloc.c: Turned off pack for one use as it's quite broken. + + * src/SDCCmain.c (linkEdit): Added support for passing a legacy command line through the processor. + + * src/mcs51/main.c (_linkCmd): Added bin path to command. + + * src/SDCCmain.c (initValues): Added support for when it it called just to link. + + * as/mcs51/lklibr.c (libfil;): Turned off 'library file' message. + + * src/SDCCval.c (constVal): Fixed usage of 'L' modifier problems on ppc. + + * support/regression/tests/longor.c: Added. + +2001-10-11 Bernhard Held + + * as/mcs51/asdata.c: replaced FILENAME_MAX with PATH_MAX + + * as/mcs51/aslink.h: define PATH_MAX + + * as/mcs51/asm.h: define PATH_MAX + + * as/mcs51/asmain.c: replaced FILENAME_MAX with PATH_MAX + + * as/mcs51/asnoice.c: replaced FILENAME_MAX with PATH_MAX + + * as/mcs51/lklex.c: replaced FILENAME_MAX with PATH_MAX + + * as/mcs51/lkmain.c: replaced FILENAME_MAX with PATH_MAX + + * src/SDCCglobl.h: define PATH_MAX + + * src/SDCCmacro.c: replaced FILENAME_MAX with PATH_MAX + + * src/SDCCmain.c: replaced FILENAME_MAX with PATH_MAX + +2001-10-11 Michael Hope + + * src/z80/gen.c (gencjneshort): Fixed + + * src/z80/ralloc.c (packRegsForHLUse): Added pack into HL for cast then ipush. + +2001-10-09 Michael Hope + + * support/regression/tests/bug-469671.c: Added. + + * src/z80/gen.c (shiftIntoPair): Fixed up warning. + +2001-10-08 Michael Hope + + * src/SDCCmain.c: Added --fommit-frame-pointer option and implemented in the z80 port. + + * src/z80/gen.c (genPlus): Fixed to work with extended stack. Also fixed genMinus, genCmp. genUMinus is still left. + +2001-10-08 Bernhar Held + + * src/SDCCmain.c (preProcess): added define SDCC_NOOVERLAY + + * src/device/lib/_mulint.c : removed hint: nooverlay bug + + * src/device/lib/_mullong.c : removed hint: nooverlay bug + + * src/device/lib/_divuint.c : removed hint: nooverlay bug + + * src/device/lib/_divulong.c: removed hint: nooverlay bug + + * src/device/lib/_moduint.c : removed hint: nooverlay bug + + * src/device/lib/_modulong.c: removed hint: nooverlay bug + +2001-10-07 Michael Hope + + * src/z80/gen.c (setupPair): Added 'extended stack' support for the z80. Can now have local variables or parameters of more than 127 bytes in size. Increadibly slow, but it will work. Currently anything involving the carry flag. + + * support/Util/NewAlloc.c (freeTrace): Changed free for the gc case to not free at all. Fixes runtime segfault. + + * support/regression/tests/scott-compare3.c (c_abcd): Fixed up casts. + +2001-10-07 + + * device/lib/gets.c (gets): fixed the return value. + +2001-10-06 Michael Hope + * src/SDCCmain.c (WRITE_SEG_LOC): Fixed up to use Safe_strdup. + + * src/SDCCpeeph.c (peepHole): Fixed all leaks. Added trace support for freeing lines. Optimised restart logic to re-run instead of restart. Now compiles dscan.c on ~60MB instead of ~200MB. + + * support/Util/NewAlloc.c: Added ability to use libgc instead of malloc. Added Safe_free and Safe_strdup. Added trace support where you can log allocations and free all at once. + + * src/z80/gen.c (genZ80Code): Added de-allocation via trace support. + + * src/pic/gen.c: Removed Safe_strdup. + + * configure.in: Added option to enable libgc support. + + * src/SDCCbitv.c (bitVectnBitsOn): Optimised. + (bitVectUnion): Optimised. + (bitVectIntersect): Optimised. + (bitVectBitsInCommon): Optimised. + (bitVectCplAnd): Optimised. + + * support/makebin/makebin.c (usage): Removed getopt as mingw32 doesn't have it. Sigh. + +2001-10-03 Bernhard Held + + * src/SDCCmain.c: distinguish between assembler debug and plain options + + * src/avr/main.c: remove standard assembler options + + * src/ds390/main.c: remove standard assembler options + + * src/mcs51/main.c: remove standard assembler options + + * src/port.h: removed "PENDING" comment + +2001-10-03 Bernhard Held + + * src/device/lib/_mulint.c : new, with assember functions + + * src/device/lib/_mullong.c : new, with assember functions + + * src/device/lib/_divuint.c : with assember functions + + * src/device/lib/_divsint.c : with assember functions + + * src/device/lib/_divulong.c: with assember functions + + * src/device/lib/_divslong.c: with assember functions + + * src/device/lib/_moduint.c : with assember functions + + * src/device/lib/_modsint.c : with assember functions + + * src/device/lib/_modulong.c: with assember functions + + * src/device/lib/_modslong.c: with assember functions + + * src/device/lib/libint.lib: replaced _muluint.c and _mulsint.c by _mulint.c + + * src/device/lib/liblong.lib: replaced _mululong.c and _mulslong.c by _mullong.c + + * src/device/lib/Makefile.in: replaced _muluint.c and _mulsint.c by _mulint.c + replaced _mululong.c and _mulslong.c by _mullong.c + +2001-10-03 Bernhard Held + + * src/SDCCsymt.c: sequence of specifiers in pintTypeChain() corrected + +2001-10-01 Bernhard Held + + * src/SDCCglue.c: test, if win32api is available for MINGW + +2001-10-01 Bernhard Held + + * src/SDCCsymt.c: no more _modifier in printTypeChain() + * support/regression/tests/driverstruct.c: REENTRANT for mcs51 + * support/regression/ports/gbz80/spec.mk: removed GENERIC + * support/regression/ports/host/spec.mk: removed GENERIC + * support/regression/ports/mcs51/spec.mk: removed GENERIC + * support/regression/ports/z80/spec.mk: removed GENERIC + +2001-10-01 Michael Hope + + * support/regression/fwk/lib/testfwk.c (__printf): Removed GENERIC. + + * support/regression/tests/bug-467035.c: Created. + +2001-10-01 + + * src/SDCC.y: fixed bug #466586 part 1 + +2001-10-01 Johan Knol + + * SDCCicode.c: z80 has no generic pointers + * removed -s from strip in all Makefile(.in)'s. It is not needed, but Solaris chocks on it. + +2001-09-30 Michael Hope + + * sim/ucsim/cmd.src/Makefile.in ($(PRJDIR)/libcmd.a): Changed all ar references to $(AR) for Solaris. + +2001-09-29 Michael Hope + + * Makefile (sdcc-libs): Added makebin to the list of standard targets. + + * support/regression/ports/z80/spec.mk: Updated to use env for sdcc bin dir for automatic regression. + +2001-09-25 Michael Hope + + * configure.in: Fixed up so that ucsim is only configured once. + + * support/cpp2/configure.in: Fixed to use the program transform to append the .exe for the win32 build. + + * src/SDCCutil.c (getPrefixFromBinPath): Fixed up to work with win32 in all of its glory. + (getPathDifference): As above. + + * src/SDCCmain.c (preProcess): Changed to use a temporary file in a proper temp directory. Fixed case where pre-processing only. + + * src/SDCCglue.c (tempfilename): Added function for pre-processor. + +2001-09-23 Michael Hope + * .version: Updated to 2.3.1 + + * src/z80/main.c (z80_port =): Added macro based linker and assembler command line support. + Added copyright header. + + * src/SDCCmain.c: Shifted various functions into SDCCutil.c + (assemble): Added support for macro based assembler commands. + (linkEdit): Added support for macro based linker commands. + (preProcess): Changed the pre-processor to use macros. + (_setPaths): Added functionality to autodetect the include, lib and bin dir paths. + (_discoverPaths): Added support for overriding the install directory using the SDCCDIR env variable. + + * device/lib/z80/crt0.s: Added module name for debugging. + +2001-09-20 Michael Hope + + * src/SDCCmain.c (printVersionInfo): Added the build date to the version info. + + * src/SDCChasht.c (hTabDeleteByKey): Fixed delete as it would delete the last item from a bucket even if it wasn't the real one. + + * src/SDCCglue.c: Moved gc_strdup to SDCCutil.c + + * src/Makefile.in: Added SDCCmacro and SDCCutil + +2001-09-19 Michael Hope + + * src/SDCCmain.c (printVersionInfo): Added the build date to the version info. + +2001-09-16 + + * support/Util/SDCCerr.c: fixed up the error/warning/info database. I only changed the E_ W_ I_ prefix to what SDCCerr.c says it is. + +2001-09-15 + + * src/mcs51/ralloc.c: (findAssignToSym): fixed bug #460662 part 1 + * src/ds390/ralloc.c (findAssignToSym): fixed bug #460662 part 1 + +2001-09-11 + + * src/SDCCval.c (valDiv Mod Minus Plus Shift): keep litteral expressions as small as possible (bug #460010) + +2001-09-10 Michael Hope + + * support/regression/tests/bug-460444.c: Added test case. + + * src/z80/gen.c (genOr): bug 460444: if (a ^ lit) was broken for &, |, and ^. + (genCast): Added justification for all of the asserts. + +2001-09-10 Bernhard Held + + * support/regression/support.c: _xdata replaced by xdata + + * support/regression/spec.mk: removed _generic + +2001-09-09 Michael Hope + + * src/pic/ralloc.c (debugLogRegType): Removed some old types to get it to compile. + + * src/z80/gen.c (shiftR2Left2Result): Improved the case when v = v >> n for small values of n to use less code space and time. + (genrshTwo): Fixed v = v >> n where v is a negative int and n is > 8: bug 460010. + + * src/z80/peeph.def: Added a rule to optimise shift then compare. + + * support/regression/tests/bug-460000.c (testShiftByParam): Added test case. + + * support/regression/tests/bug-460010.c: Added test case. + + * support/regression/Makefile (test-host): Removed a silly 'clean' target when testing against gcc. + +2001-09-09 Bernhard Held + + * support/regression/Makefile: inter-port-clean adjusted for mcs51 + + * support/regression/testfwk.c: removed workaround for bug #436344 + + * support/regression/tests/bp.c: use less memory with mcs51 + + * support/regression/tests/bug-441448.c: use less memory + + * support/regression/tests/ports/mcs51/spec.mk: cleanup, use --stack-after-data + + * support/regression/collate-results.py: typo + +2001-09-08 Michael Hope + + * support/regression/tests/fetchoverlap.c: Added new test case. + + * support/regression/tests/bp.c: Added new test case. + + * support/regression/tests/bug-448984.c: Added new test case. + + * support/regression/tests/pow2shifts.c: Added new test case. + + * src/z80/gen.c: Turned off the noise it normally generates for the release. + (genlshTwo): Fixed right shift for count > 8. + + * src/z80/ralloc.c: Disabled most of the ACC packing rules as they weren't getting hit and weren't at all safe. + +2001-09-08 + + * src/SDCCicode.c (geniCodeCall): a CPOINTER can be used as a function + +2001-09-07 + + * src/SDCCicode.c (newiCodeCondition): fixed bug #456235 (1.77) + + * src/SDCCglue.c (emitRegularMap): only delete a symbol when it is a symbol + +2001-09-06 + + * src/SDCC.y: this could be a fix for bug #458744 (1.37) + * bernhard noted me at this: "() equals to (void)" (1.38) + +2001-09-05 + + * src/SDCCglue.c (emitRegularMap): a fix for bug #458099/2 + +2001-09-04 + + * src/SDCCsymt.c (checkSClass): a fix for bug #458099/1 + + +2001-09-04 Paul Stoffregen + + * pragma noinduction broke memcpy on mcs51 large model. Moved it inside z80 optimization + +2001-09-03 Michael Hope + + * link/z80/aslink.h: Fixed path for PATH_MAX + +2001-09-02 Michael Hope + + * src/z80/gen.c (fetchLitPair): Changed so that it properly caches direct space references. + + * support/regression/tests/addsub.c: Added cases to cover all the +, - combinations. + + * support/regression/tests/uminus.c: Added a test for the unary minus operator. + + * src/z80/gen.c (genUminus): Fixed add, sub, and uminus on the gbz80 port for longs. Had to shift some functions about to do it. + +2001-09-01 Michael Hope + + * src/z80/gen.c: Fixed up generator to pass the regresion tests, specifically fixing loads for longs, genCmp, and turned on the map file. + (genCmp): Fixed up genCmp for the GB with longs. + + * device/lib/gbz80/Makefile: Fixed up all the libraries to pass the regression tests. + + * support/regression/ports/host/spec.mk: Updated to compile with the new type specifiers. + + * device/lib/Makefile.in (Z80SOURCES): Removed old _mululong, _mulslong, and unneeded _mulint. + + * device/lib/_mullong.c (_mulslong): Changed to actually return a value :) + +2001-08-30 Paul Stoffregen + + * added peepholes 223 to 231 to mcs51 port. These improve code when using large model. + +2001-08-30 Michael Hope + + * device/lib/gbz80/crt0.s (init): Fixed up support for the gbz80 such that it will at least run (and fail badly) the regression tests. + + * src/z80/gen.c (genPlus): Changed bad long add for gb to a fall through. + +2001-08-29 Michael Hope + + * link/z80/aslink.h: Fixed long file name support. Is now based off PATH_MAX instead of a constant. + + * src/z80/gen.c: Fixed add and sub for the case where left or right are in static space. + +2001-08-30 Bernhard Held + + * sim/ucsim/configure: little improvement of Cygwin-detection + * sim/ucsim/configure.in: little improvement of Cygwin-detection + * sim/ucsim/cmd.src/newcmdcl.h: include to define fd_set automated build + * support/regression/tests/bug-221100.c: small changes for mcs51 + * support/regression/tests/bug-221168.c: small changes for mcs51 + * support/regression/tests/bug-227710.c: small changes for mcs51 + * support/regression/tests/staticinit.c: small changes for mcs51 + * as/mcs51/aslink.h: accept everything as symbol name in rel-files, bug fix ID 452601 + * as/mcs51/lklex.c: accept everything as symbol name in rel-files, bug fix ID 452601 + * as/mcs51/lksym.c: accept everything as symbol name in rel-files, bug fix ID 452601 + +$Revision: 5416 $ diff --git a/Makefile.bcc b/Makefile.bcc new file mode 100644 index 0000000..366958a --- /dev/null +++ b/Makefile.bcc @@ -0,0 +1,40 @@ +# Makefile for Borlad C++ + +all: config asx8051 as-z80 sdcc packihx cpp + + +config: sdcc_vc.h + +sdcc_vc.h: sdcc_vc_in.h configure_vc.awk + gawk -f configure_vc.awk sdcc_vc_in.h > sdcc_vc.h + +asx8051: + cd as\mcs51 + make -f Makefile.bcc + cd ..\.. + +as-z80: + cd as\z80 + make -f Makefile.bcc + cd ..\.. + +cpp: + cd support\cpp + make -f Makefile.bcc + cd ..\.. + +sdcc: + cd src + make -f Makefile.bcc + cd .. + +packihx: + cd support\packihx + make -f Makefile.bcc + cd .. + +librarian: + cd support\librarian + make -f Makefile.bcc + cd ..\.. + diff --git a/Makefile.common.in b/Makefile.common.in new file mode 100644 index 0000000..ead4027 --- /dev/null +++ b/Makefile.common.in @@ -0,0 +1,78 @@ +# +# +# + +# Version +PACKAGE = @PACKAGE@ +VERSION = @VERSION@ +VERSIONHI = @VERSIONHI@ +VERSIONLO = @VERSIONLO@ +VERSIONP = @VERSIONP@ + +# Programs +SHELL = /bin/sh +CC = @CCACHE@ @CC@ +CPP = @CCACHE@ @CPP@ +RANLIB = @RANLIB@ +INSTALL = @INSTALL@ +YACC = @YACC@ +LEX = @LEX@ +AWK = @AWK@ +STRIP = @STRIP@ +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @infodir@ +docdir = @docdir@ +DESTDIR = + +include_dir_suffix = @include_dir_suffix@ +lib_dir_suffix = @lib_dir_suffix@ + +# Modules to enable/disable +OPT_DISABLE_AVR = @OPT_DISABLE_AVR@ +OPT_DISABLE_DS390 = @OPT_DISABLE_DS390@ +OPT_DISABLE_DS400 = @OPT_DISABLE_DS400@ +OPT_DISABLE_HC08 = @OPT_DISABLE_HC08@ +OPT_DISABLE_MCS51 = @OPT_DISABLE_MCS51@ +OPT_DISABLE_PIC = @OPT_DISABLE_PIC@ +OPT_DISABLE_PIC16 = @OPT_DISABLE_PIC16@ +OPT_DISABLE_XA51 = @OPT_DISABLE_XA51@ +OPT_DISABLE_Z80 = @OPT_DISABLE_Z80@ + +OPT_DISABLE_UCSIM = @OPT_DISABLE_UCSIM@ +OPT_DISABLE_DEVICE_LIB= @OPT_DISABLE_DEVICE_LIB@ +OPT_DISABLE_PACKIHX = @OPT_DISABLE_PACKIHX@ +OPT_ENABLE_DOC = @OPT_ENABLE_DOC@ +OPT_DISABLE_SDCPP = @OPT_DISABLE_SDCPP@ + +SLIB = $(top_builddir)/support/Util + +EXEEXT = @EXEEXT@ +transform = @program_transform_name@ + +# Flags + +DEFS += $(subs -DHAVE_CONFIG_H,,@DEFS@) +CPPFLAGS += @CPPFLAGS@ $(INCLUDEFLAGS) -I. -I$(top_builddir) -I$(srcdir)/$(SLIB) -I$(srcdir) +CFLAGS += -Wall @CFLAGS@ +LDFLAGS += @LDFLAGS@ +M_OR_MM = @M_OR_MM@ + +EXTRALIBS += @LIBS@ + +# Shared settings between all the sub Makefiles +# Done here so that we don't have to start a Make from the top levelport +# directory. + +# Library compilation options +CLEANSPEC = *.lst *.asm *.sym *~ *.cdb *.dep *.rul + +OBJ = $(SOURCES:.c=.o) diff --git a/Makefile.in b/Makefile.in new file mode 100644 index 0000000..f70e254 --- /dev/null +++ b/Makefile.in @@ -0,0 +1,263 @@ +# +# +# + +SHELL = /bin/sh + +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +include Makefile.common + +SDCC_LIBS = support/makebin +SDCC_DOC = doc + +# Parts that are not normally compiled but need to be cleaned +SDCC_EXTRA = support/regression support/valdiag + +SDCC_PACKIHX = support/packihx +SDCC_LIBRARIAN = support/librarian +SDCC_ASRANLIB = as/asranlib + +TARGETS = sdcc-librarian sdcc-asranlib + +ifeq ($(OPT_DISABLE_HC08), 0) +SDCC_ASLINK += as/hc08 as/link/hc08 +endif + +ifeq ($(OPT_DISABLE_MCS51), 0) +SDCC_ASLINK += as/mcs51 as/link/mcs51 +SDCC_MISC += debugger/mcs51 +endif + +ifeq ($(OPT_DISABLE_Z80), 0) +SDCC_ASLINK += as as/link +endif + +ifeq ($(OPT_DISABLE_UCSIM), 0) +TARGETS += sdcc-misc +SDCC_MISC += sim/ucsim +PKGS += $(SDCC_MISC) +endif + +ifeq ($(OPT_DISABLE_DEVICE_LIB), 0) +TARGETS += sdcc-device-lib +PKGS += device/lib +endif + +ifeq ($(OPT_DISABLE_PACKIHX), 0) +TARGETS += sdcc-packihx +PKGS += $(SDCC_PACKIHX) +endif + +ifeq ($(OPT_ENABLE_DOC), 1) +TARGETS += sdcc-doc +endif +# always install docs, which don't need to be built +PKGS += $(SDCC_DOC) + +ifeq ($(OPT_DISABLE_SDCPP), 0) +SDCC_LIBS += support/cpp +endif + +TARGETS += sdcc-libs sdcc-cc sdcc-device-inc sdcc-aslink + +PKGS += $(SDCC_LIBS) src device/include $(SDCC_ASLINK) $(SDCC_LIBRARIAN) $(SDCC_ASRANLIB) + +PKGS_TINI = $(SDCC_LIBS) $(SDCC_ASLINK) \ + src device/include $(SDCC_PACKIHX) $(SDCC_LIBRARIAN) +PORTS = $(shell cat ports.build) +ALLPORTS = $(shell cat ports.all) + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf sdcc + +tini: checkconf sdcc-tini + +sdcc-libs: + for lib in $(SDCC_LIBS); do $(MAKE) -C $$lib; done + +sdcc-cc: sdcc-libs + $(MAKE) -C src + +sdcc-aslink: + for as in $(SDCC_ASLINK); do $(MAKE) -C $$as ; done + +sdcc-misc: + for misc in $(SDCC_MISC); do $(MAKE) -C $$misc ; done + +sdcc-packihx: + $(MAKE) -C $(SDCC_PACKIHX) + +sdcc-librarian: + $(MAKE) -C $(SDCC_LIBRARIAN) + +sdcc-asranlib: + $(MAKE) -C $(SDCC_ASRANLIB) + +sdcc-device-inc: + $(MAKE) -C device/include + +sdcc-device-lib: sdcc-cc sdcc-aslink + $(MAKE) -C device/lib + +sdcc-device-tini: + $(MAKE) -C device/include + $(MAKE) -C device/lib model-ds390 model-ds400 + +# doc depends on latex and latex2html +sdcc-doc: + $(MAKE) -C doc + +sdcc: $(TARGETS) + +sdcc-tini: sdcc-librarian sdcc-asranlib sdcc-cc sdcc-aslink sdcc-device-tini sdcc-packihx + $(MAKE) -f main.mk all + +# Some interesting sub rules +sdcc-bin: sdcc-cc sdcc-aslink sdcc-misc + +sdcc-base: sdcc-cc sdcc-aslink + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: + $(MAKE) -f main.mk install + @for pkg in $(PKGS); do\ + $(MAKE) -C $$pkg install ;\ + done + +install-tini: + $(MAKE) -f main.mk install + @for pkg in $(PKGS_TINI); do\ + $(MAKE) -C $$pkg install ;\ + done + $(MAKE) -C device/lib install + + + +# Deleting all the installed files +# -------------------------------- +uninstall: + $(MAKE) -f main.mk uninstall + @for pkg in $(PKGS); do\ + $(MAKE) -C $$pkg uninstall ;\ + done + + +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + @echo "+ Cleaning root of the project..." + $(MAKE) -f $(srcdir)/clean.mk clean + @echo "+ Cleaning packages in their directories..." + for pkg in $(PKGS); do\ + $(MAKE) -C $$pkg PORTS="$(PORTS)" EXEEXT=$(EXEEXT) clean ;\ + done + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: + @echo "+ DistCleaning packages using clean.mk..." + for pkg in $(PKGS); do\ + $(MAKE) -C $$pkg PORTS="$(PORTS)" EXEEXT=$(EXEEXT) distclean ;\ + done + for pkg in $(SDCC_EXTRA); do \ + $(MAKE) -C $$pkg distclean; \ + done + @echo "+ DistCleaning root of the project..." + $(MAKE) -f $(srcdir)/clean.mk distclean + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + $(MAKE) -f $(srcdir)/clean.mk mostlyclean + for pkg in $(PKGS); do\ + $(MAKE) -C $$pkg PORTS="$(PORTS)" EXEEXT=$(EXEEXT) mostlyclean ;\ + done + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, stc. +# ----------------------------------------------------------------------- +realclean: distclean + $(MAKE) -f $(srcdir)/clean.mk realclean + for pkg in $(PKGS); do\ + $(MAKE) -C $$pkg PORTS="$(PORTS)" EXEEXT=$(EXEEXT) realclean ;\ + done + + +# Creating distribution +# --------------------- +dist: distclean + @if [ -f devel ]; then\ + rm -f devel; mkdist sdcc; touch devel;\ + else\ + mkdist sdcc;\ + fi + + +# Performing self-test +# -------------------- +check: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating dependencies +# --------------------- +dep: + $(MAKE) -f main.mk dep + @for pkg in $(PKGS); do\ + $(MAKE) -C $$pkg dep ;\ + done + + +# My rules +# -------- +newer: distclean + @if [ -f start ]; then \ + tar cvf - \ + `find . -newer start -type f -print` |\ + gzip -9c >`date '+%m%d%H%M'`.tgz; \ + else \ + echo "start file not found.\n"; \ + exit 1; \ + fi + +putcopyright: + 'put(c)' -s $(STARTYEAR) *.cc *.h *.y *.l + + +# Remaking configuration +# ---------------------- +configure: configure.in + $(SHELL) $(AUTOCONF) + +main.mk: $(srcdir)/main_in.mk $(srcdir)/configure.in config.status + $(SHELL) ./config.status + +Makefiles: makefiles + +makefiles: config.status + +config.status: configure + $(SHELL) ./config.status --recheck + +makefiles: + $(SHELL) ./config.status + +freshconf: main.mk + +checkconf: + @if [ -f devel ]; then\ + $(MAKE) freshconf;\ + fi + +# End of Makefile diff --git a/README b/README new file mode 100644 index 0000000..4e35d99 --- /dev/null +++ b/README @@ -0,0 +1 @@ +This file is depreciated. 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Win32 Debug" + +# PROP Ignore_Default_Tool 1 +# Begin Custom Build +InputPath=.\bin_vc\sdcc.exe + +"bin\sdcc.exe" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + copy bin_vc\sdcc.exe bin /y > nul + +# End Custom Build + +!ENDIF + +# End Source File +# Begin Source File + +SOURCE=.\bin_vc\sdcclib.exe + +!IF "$(CFG)" == "all - Win32 Release" + +# PROP Ignore_Default_Tool 1 +# Begin Custom Build +InputPath=.\bin_vc\sdcclib.exe + +"bin\sdcclib.exe" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + copy bin_vc\sdcclib.exe bin /y > nul + +# End Custom Build + +!ELSEIF "$(CFG)" == "all - Win32 Debug" + +# PROP Ignore_Default_Tool 1 +# Begin Custom Build +InputPath=.\bin_vc\sdcclib.exe + +"bin\sdcclib.exe" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + copy bin_vc\sdcclib.exe bin /y > nul + +# End Custom Build + +!ENDIF + +# End Source File +# Begin Source File + +SOURCE=.\bin_vc\sdcpp.exe + +!IF "$(CFG)" == "all - Win32 Release" + +# PROP Ignore_Default_Tool 1 +# Begin Custom Build +InputPath=.\bin_vc\sdcpp.exe + +"bin\sdcpp.exe" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + copy bin_vc\sdcpp.exe bin /y > nul + +# End Custom Build + +!ELSEIF "$(CFG)" == "all - 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Interpretation of Sections 15 and 16. + + If the disclaimer of warranty and limitation of liability provided +above cannot be given local legal effect according to their terms, +reviewing courts shall apply local law that most closely approximates +an absolute waiver of all civil liability in connection with the +Program, unless a warranty or assumption of liability accompanies a +copy of the Program in return for a fee. + + END OF TERMS AND CONDITIONS + + How to Apply These Terms to Your New Programs + + If you develop a new program, and you want it to be of the greatest +possible use to the public, the best way to achieve this is to make it +free software which everyone can redistribute and change under these terms. + + To do so, attach the following notices to the program. It is safest +to attach them to the start of each source file to most effectively +state the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + + Copyright (C) + + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + +Also add information on how to contact you by electronic and paper mail. + + If the program does terminal interaction, make it output a short +notice like this when it starts in an interactive mode: + + Copyright (C) + This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, your program's commands +might be different; for a GUI interface, you would use an "about box". + + You should also get your employer (if you work as a programmer) or school, +if any, to sign a "copyright disclaimer" for the program, if necessary. +For more information on this, and how to apply and follow the GNU GPL, see +. + + The GNU General Public License does not permit incorporating your program +into proprietary programs. If your program is a subroutine library, you +may consider it more useful to permit linking proprietary applications with +the library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. But first, please read +. diff --git a/as/Makefile.in b/as/Makefile.in new file mode 100644 index 0000000..7052a31 --- /dev/null +++ b/as/Makefile.in @@ -0,0 +1,29 @@ +# This Makefile is only for z80 and gbz80 + +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ + +BUILDDIR=../$(top_builddir)/bin +include $(top_builddir)/Makefile.common + +PORTS = z80 gbz80 +DOCS = README abstra.txt appendk.txt asmlnk.txt asxhtm.html format.txt + +all: + $(MAKE) -C z80 _as-z80 _as-gbz80 E=$(E) BUILDDIR=$(BUILDDIR) + +install: all install-doc + $(INSTALL) $(top_builddir)/bin/as-z80$(EXEEXT) `echo $(DESTDIR)$(bindir)/as-z80$(EXEEXT)|sed '$(transform)'` + $(STRIP) `echo $(DESTDIR)$(bindir)/as-z80$(EXEEXT)|sed '$(transform)'` + $(INSTALL) $(top_builddir)/bin/as-gbz80$(EXEEXT) `echo $(DESTDIR)$(bindir)/as-gbz80$(EXEEXT)|sed '$(transform)'` + $(STRIP) `echo $(DESTDIR)$(bindir)/as-gbz80$(EXEEXT)|sed '$(transform)'` + +install-doc: + $(INSTALL) -d $(DESTDIR)$(docdir)/aslink + cd $(srcdir)/doc; cp -f $(DOCS) $(DESTDIR)$(docdir)/aslink + +uninstall: + cd $(DESTDIR)$(bindir); rm -f as-z80$(EXEEXT) as-gbz80$(EXEEXT) + +include $(srcdir)/clean.mk diff --git a/as/README b/as/README new file mode 100644 index 0000000..b0f405e --- /dev/null +++ b/as/README @@ -0,0 +1,5 @@ +sdcc/as +------- + +Both the z80 and mcs51 assemblers are derrived from the same tree. One +day they may be re-combined. diff --git a/as/asranlib/Makefile.in b/as/asranlib/Makefile.in new file mode 100644 index 0000000..5889a67 --- /dev/null +++ b/as/asranlib/Makefile.in @@ -0,0 +1,67 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ + +include $(top_builddir)/Makefile.common + +CFLAGS += -Wall -I$(srcdir)/../link + +OBJECTS = asranlib.o + +SOURCES = $(patsubst %.o,%.c,$(OBJECTS)) + +TARGET = $(top_builddir)/bin/asranlib$(EXEEXT) + +all: $(TARGET) + +install: all installdirs + $(INSTALL) $(TARGET) `echo $(DESTDIR)$(bindir)/asranlib$(EXEEXT)|sed '$(transform)'` + $(STRIP) `echo $(DESTDIR)$(bindir)/asranlib$(EXEEXT)|sed '$(transform)'` + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(DESTDIR)$(bindir)/asranlib$(EXEEXT) + +# Performing self-test +# -------------------- +check: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + $(INSTALL) -d $(DESTDIR)$(bindir) + + +# Creating dependencies +# --------------------- +dep: + +$(TARGET): $(OBJECTS) dbuf.o dbuf_string.o + $(CC) $(LDFLAGS) -o $@ $(OBJECTS) dbuf.o dbuf_string.o + +dbuf.o: $(srcdir)/../../support/Util/dbuf.c + $(CC) $(CFLAGS) $(CPPFLAGS) -c $< -o $@ + +dbuf_string.o: $(srcdir)/../../support/Util/dbuf_string.c + $(CC) $(CFLAGS) $(CPPFLAGS) -c $< -o $@ + +.c.o: + $(CC) $(CFLAGS) $(CPPFLAGS) -c $< -o $@ + + +checkconf: + +clean: + rm -f *core *[%~] *.[oa] *.output + rm -f .[a-z]*~ \#* + rm -f $(top_builddir)/bin/asranlib$(EXEEXT) + +distclean realclean: clean + rm -f Makefile diff --git a/as/asranlib/asranlib.c b/as/asranlib/asranlib.c new file mode 100644 index 0000000..0181df5 --- /dev/null +++ b/as/asranlib/asranlib.c @@ -0,0 +1,856 @@ +/* asranlib.c - ranlib for asxxxx arvhives + version 1.0.0, April 27th, 2008 + + Copyright (C) 2008-2009 Borut Razem, borut dot razem at siol dot net + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include +#include +#include +#include +#include "dbuf_string.h" +#include "lkar.h" + +#ifdef _WIN32 +#include +#else +#include +#endif + +#define NELEM(x) (sizeof (x) / sizeof (*x)) + + +static int verbose = 0; +static int list = 0; +static int print_index = 0; + +int +is_ar (FILE * libfp) +{ + char buf[SARMAG]; + int ret; + + if (!(ret = fread (buf, 1, sizeof (buf), libfp) == sizeof (buf) && memcmp (buf, ARMAG, SARMAG) == 0)) + rewind (libfp); + + return ret; +} + +static char *sym_tab; +static int sym_tab_size; + +char * +get_member_name (char *name, size_t *p_size, int allocate, FILE * libfp) +{ + *p_size = 0; + + if (0 == memcmp (name, "#1/", 3)) + { + char *p; + size_t len = strtoul (&name [3], &p, 10); + if (p > &name [3]) + { + /* BSD appends real file name to the file header */ + if (p_size != NULL) + *p_size = len; + + if (allocate) + { + char *n = (char *) malloc (len); + if (fread (n, 1, len, libfp) != len) + { + /* not an ar archive or broken ar archive */ + return NULL; + } + else + return n; + } + else + { + /* just advance the file pointer */ + fseek (libfp, len, SEEK_CUR); + return NULL; + } + } + else + { + /* not an ar archive or broken ar archive */ + return NULL; + } + } + else if (allocate) + { + if (name[0] == '/') + { + if (NULL != sym_tab) + { + char *p; + + int name_offset = strtol (++name, &p, 0); + if (p != name && name_offset < sym_tab_size) + { + int len = p - name + 1; + while (len < AR_NAME_LEN && name[len++] == ' ') + ; + if (len == AR_NAME_LEN) + { + char *n; + + /* long name: get it from the symbol table */ + name = &sym_tab[name_offset]; + for (p = name; *p != '/' && *p != '\n'; ++p) + assert (p < &sym_tab[sym_tab_size]); + + if (p[0] != '/' || p[1] != '\n') + while (*++p != '\n') + assert (p < &sym_tab[sym_tab_size]); + + n = (char *) malloc (p - name + 1); + memcpy (n, name, p - name); + n[p - name] = '\0'; + return n; + } + } + } + } + else + { + char *p = strrchr (name, '/'); + + if (NULL != p) + { + int len = p - name; + while (name[++len] == ' ') + ; + if (len == AR_NAME_LEN) + { + char *n = (char *) malloc (p - name + 1); + memcpy (n, name, p - name); + n[p - name] = '\0'; + return n; + } + } + else + { + /* BSD formed member name: + trim trailing spaces */ + char *n; + + p = name + AR_NAME_LEN; + while (*--p == ' ' && p >= name) + ; + ++p; + n = (char *) malloc (p - name + 1); + memcpy (n, name, p - name); + n[p - name] = '\0'; + return n; + } + } + + /* bad formed member name: + just return it */ + + return strdup (name); + } + else + return NULL; +} + +size_t +ar_get_header (struct ar_hdr *hdr, FILE * libfp, char **p_obj_name) +{ + char header[ARHDR_LEN]; + char buf[AR_DATE_LEN + 1]; + char *obj_name; + size_t size; + + if (fread (header, 1, sizeof (header), libfp) != sizeof (header) + || memcmp (header + AR_FMAG_OFFSET, ARFMAG, AR_FMAG_LEN) != 0) + { + /* not an ar archive */ + return 0; + } + + memcpy (hdr->ar_name, &header[AR_NAME_OFFSET], AR_NAME_LEN); + hdr->ar_name[AR_NAME_LEN] = '\0'; + + memcpy (buf, &header[AR_DATE_OFFSET], AR_DATE_LEN); + buf[AR_DATE_LEN] = '\0'; + hdr->ar_date = strtol (buf, NULL, 0); + + memcpy (buf, &header[AR_UID_OFFSET], AR_GID_LEN); + buf[AR_GID_LEN] = '\0'; + hdr->ar_uid = (uid_t) strtol (buf, NULL, 0); + + memcpy (buf, &header[AR_GID_OFFSET], AR_DATE_LEN); + buf[AR_DATE_LEN] = '\0'; + hdr->ar_gid = (gid_t) strtol (buf, NULL, 0); + + memcpy (buf, &header[AR_MODE_OFFSET], AR_MODE_LEN); + buf[AR_MODE_LEN] = '\0'; + hdr->ar_mode = (mode_t) strtoul (buf, NULL, 0); + + memcpy (buf, &header[AR_SIZE_OFFSET], AR_SIZE_LEN); + buf[AR_SIZE_LEN] = '\0'; + hdr->ar_size = strtol (buf, NULL, 0); + + if (NULL == (obj_name = get_member_name (hdr->ar_name, &size, p_obj_name != NULL, libfp)) && p_obj_name != NULL) + { + /* Malformed archive */ + return 0; + } + + if (p_obj_name != NULL) + *p_obj_name = obj_name; + + /* treat BSD appended real file name as a part of the header */ + hdr->ar_size -= size; + + return size + ARHDR_LEN; +} + +static char * +get_member_name_by_offset (FILE * fp, long offset) +{ + struct ar_hdr hdr; + char *name; + + fseek (fp, offset, SEEK_SET); + return (ar_get_header (&hdr, fp, &name) != 0) ? name : NULL; +} + +struct symbol_s + { + const char *name; + size_t offset; + struct symbol_s *next; + }; + +struct symbol_s *symlist, *lastsym; +unsigned int offset, first_member_offset; + +int +add_symbol (const char *sym, void *param) +{ + struct symbol_s *s; + + if ((s = (struct symbol_s *) malloc (sizeof (struct symbol_s))) == NULL) + return 0; + + if (verbose) + printf ("%s\n", sym); + + s->name = strdup (sym); + s->offset = offset - first_member_offset; + s->next = NULL; + + if (NULL == symlist) + { + lastsym = symlist = s; + } + else + { + lastsym->next = s; + lastsym = s; + } + + return 0; +} + +int +is_rel (FILE * libfp) +{ + int c; + long pos = ftell (libfp); + int ret = 0; + + /* [XDQ][HL] */ + if (((c = getc (libfp)) == 'X' || c == 'D' || c == 'Q') && ((c = getc (libfp)) == 'H' || c == 'L')) + { + switch (getc (libfp)) + { + case '\r': + if (getc (libfp) == '\n') + ret = 1; + break; + + case '\n': + ret = 1; + } + } + else if (c == ';') + { + char buf[6]; + + if (fread (buf, 1, sizeof (buf), libfp) == sizeof (buf) && memcmp (buf, "!FILE ", 6) == 0) + ret = 1; + } + fseek (libfp, pos, SEEK_SET); + return ret; +} + +int +enum_symbols (FILE * fp, long size, int (*func) (const char *sym, void *param), void *param) +{ + long end; + struct dbuf_s buf; + struct dbuf_s symname; + + assert (func != NULL); + + dbuf_init (&buf, 512); + dbuf_init (&symname, 32); + + end = (size >= 0) ? ftell (fp) + size : -1; + + /* + * Read in the object file. Look for lines that + * begin with "S" and end with "D". These are + * symbol table definitions. If we find one, see + * if it is our symbol. Make sure we only read in + * our object file and don't go into the next one. + */ + + while (end < 0 || ftell (fp) < end) + { + const char *p; + + dbuf_set_length (&buf, 0); + if (dbuf_getline (&buf, fp) == 0) + break; + + p = dbuf_c_str (&buf); + + if ('T' == p[0]) + break; + + /* + * Skip everything that's not a symbol record. + */ + if ('S' == p[0] && ' ' == p[1]) + { + dbuf_set_length (&symname, 0); + + for (p += 2; *p && ' ' != *p; ++p) + dbuf_append_char (&symname, *p); + + /* If it's an actual symbol, record it */ + if (' ' == p[0] && 'D' == p[1]) + if (func != NULL) + if ((*func) (dbuf_c_str (&symname), NULL)) + return 1; + } + } + + dbuf_destroy (&buf); + dbuf_destroy (&symname); + + return 0; +} + +static int +process_symbol_table (struct ar_hdr *hdr, FILE *fp) +{ + long pos = ftell (fp); + + if (print_index) + { + char *buf, *po, *ps; + int i; + long nsym; + + printf ("Archive index:\n"); + + buf = (char *) malloc (hdr->ar_size); + + if (fread (buf, 1, hdr->ar_size, fp) != hdr->ar_size) + { + free (buf); + return 0; + } + + nsym = sgetl (buf); + + po = buf + 4; + ps = po + nsym * 4; + + for (i = 0; i < nsym; ++i) + { + char *obj; + + offset = sgetl (po); + po += 4; + + if (NULL == (obj = get_member_name_by_offset (fp, offset))) /* member name */ + return 0; + + printf ("%s in %s", ps, obj); + if (verbose) + printf (" at 0x%04x\n", offset); + else + putchar ('\n'); + free (obj); + + ps += strlen(ps) + 1; + + } + free (buf); + + fseek (fp, pos, SEEK_SET); + + putchar ('\n'); + } + + /* skip the symbol table */ + fseek (fp, pos + hdr->ar_size + (hdr->ar_size & 1), SEEK_SET); + + return 1; +} + +static int +process_bsd_symbol_table (struct ar_hdr *hdr, FILE *fp) +{ + long pos = ftell (fp); + + if (print_index) + { + char *buf, *po, *ps; + int i; + long tablesize; + long nsym; + + printf ("Archive index:\n"); + + buf = (char *) malloc (hdr->ar_size); + + if (fread (buf, 1, hdr->ar_size, fp) != hdr->ar_size) + { + free (buf); + return 0; + } + + tablesize = sgetl (buf); + nsym = tablesize / 8; + + po = buf + 4; + + ps = po + tablesize + 4; + + for (i = 0; i < nsym; ++i) + { + char *obj; + long sym; + + sym = sgetl (po); + po += 4; + offset = sgetl (po); + po += 4; + + printf ("%s in ", ps + sym); + + if (NULL == (obj = get_member_name_by_offset (fp, offset))) /* member name */ + return 0; + + printf ("%s\n", obj); + free (obj); + } + free (buf); + putchar ('\n'); + } + + /* skip the symbol table */ + fseek (fp, pos + hdr->ar_size + (hdr->ar_size & 1), SEEK_SET); + + return 1; +} + +int +get_symbols (FILE * fp, const char *archive) +{ + struct ar_hdr hdr; + size_t hdr_len; + char *name; + + if (!is_ar (fp) || !(hdr_len = ar_get_header (&hdr, fp, &name))) + { + free (name); + + return 0; + } + + if (AR_IS_SYMBOL_TABLE (name)) + { + free (name); + + if (!process_symbol_table (&hdr, fp)) + return 0; + + if (feof (fp)) + return 1; + else if (!(hdr_len = ar_get_header (&hdr, fp, (verbose || list) ? &name : NULL))) + return 0; + } + else if (AR_IS_BSD_SYMBOL_TABLE (name)) + { + free (name); + + if (!process_bsd_symbol_table (&hdr, fp)) + return 0; + + if (feof (fp)) + return 1; + else if (!(hdr_len = ar_get_header (&hdr, fp, (verbose || list) ? &name : NULL))) + return 0; + } + else if (!verbose && !list) + free (name); + + first_member_offset = ftell (fp) - hdr_len; + + /* walk trough all archive members */ + do + { + if (is_rel (fp)) + { + if (verbose || list) + { + printf ("%s%s\n", name, verbose ? ":" : ""); + free (name); + } + + if (!list) + { + long mdule_offset = ftell (fp); + + offset = mdule_offset - hdr_len; + + enum_symbols (fp, hdr.ar_size, add_symbol, NULL); + + fseek (fp, mdule_offset + hdr.ar_size + (hdr.ar_size & 1), SEEK_SET); + } + + if (verbose) + putchar ('\n'); + } + else + { + if (verbose || list) + { + fprintf (stderr, "asranlib: %s: File format not recognized\n", name); + free (name); + } + + /* skip if the member is not a .REL format */ + fseek (fp, hdr.ar_size + (hdr.ar_size & 1), SEEK_CUR); + } + } + while ((hdr_len = ar_get_header (&hdr, fp, (verbose || list) ? &name : NULL))); + + return feof (fp) ? 1 : 0; +} + +void +do_ranlib (const char *archive) +{ + FILE *infp; + + if (NULL == (infp = fopen (archive, "rb"))) + { + fprintf (stderr, "asranlib: %s: ", archive); + perror (NULL); + exit (1); + } + + if (!get_symbols (infp, archive)) + { + fprintf (stderr, "asranlib: %s: Malformed archive\n", archive); + fclose (infp); + exit (1); + } + else if (!list && !print_index) + { + FILE *outfp; + struct symbol_s *symp; + char buf[4]; + int str_length; + int pad; + int nsym; + int symtab_size; + char tmpfile[] = "arXXXXXX"; + struct stat stat_buf; + int can_stat; + +#ifdef _WIN32 + if (NULL == _mktemp (tmpfile) || NULL == (outfp = fopen (tmpfile, "wb"))) + { + fclose (infp); + fprintf (stderr, "asranlib: %s: ", tmpfile); + perror (NULL); + exit (1); + } +#else + if ((pad = mkstemp (tmpfile)) < 0) + { + fclose (infp); + fprintf (stderr, "asranlib: %s: ", tmpfile); + perror (NULL); + exit (1); + } + + if (NULL == (outfp = fdopen (pad, "wb"))) + { + close (pad); + fclose (infp); + perror ("asranlib"); + exit (1); + } +#endif + + /* calculate the size of symbol table */ + for (str_length = 0, nsym = 0, symp = symlist; symp; ++nsym, symp = symp->next) + { + str_length += strlen (symp->name) + 1; + } + + symtab_size = 4 + 4 * nsym + str_length; + + fprintf (outfp, ARMAG AR_SYMBOL_TABLE_NAME "%-12d%-6d%-6d%-8d%-10d" ARFMAG, (int) time (NULL), 0, 0, 0, symtab_size); + + if (symtab_size & 1) + { + pad = 1; + ++symtab_size; + } + else + pad = 0; + + symtab_size += SARMAG + ARHDR_LEN; + + sputl (nsym, buf); + fwrite (buf, 1, sizeof (buf), outfp); + + for (symp = symlist; symp; symp = symp->next) + { + sputl (symp->offset + symtab_size, buf); + fwrite (buf, 1, sizeof (buf), outfp); + } + + for (symp = symlist; symp; symp = symp->next) + { + fputs (symp->name, outfp); + putc ('\0', outfp); + } + + if (pad) + putc ('\n', outfp); + + fseek (infp, first_member_offset, SEEK_SET); + + while (EOF != (pad = getc (infp))) + putc (pad, outfp); + + fclose (outfp); + + if (0 != fstat(fileno(infp), &stat_buf)) + { + fprintf (stderr, "asranlib: can't stat %s: ", archive); + perror (NULL); + fclose (infp); + can_stat = 0; + } + else + can_stat = 1; + + fclose (infp); + + if (0 != remove (archive)) + { + fprintf (stderr, "asranlib: can't remove %s to %s: ", tmpfile, archive); + perror (NULL); + } + else if (0 != rename (tmpfile, archive)) + { + fprintf (stderr, "asranlib: can't rename %s to %s: ", tmpfile, archive); + perror (NULL); + } + else if (!can_stat || 0 != chmod (archive, stat_buf.st_mode)) + { + fprintf (stderr, "asranlib: can't chmod %s: ", archive); + perror (NULL); + } + } + else + fclose (infp); +} + +void +do_verbose (void) +{ + verbose = 1; +} + +void +print_version (void) +{ + printf ("SDCC asxxxx ranlib 1.0.0 $Revision: 5410 $\n"); + exit (0); +} + +void +do_list (void) +{ + list = 1; +} + +void +print_armap (void) +{ + print_index = 1; +} + +void usage (void); + +struct opt_s + { + char short_opt; + const char *long_opt; + void (*optfnc) (void); + const char *comment; + } +opts[] = + { + { 'v', "verbose", &do_verbose, "Be more verbose about the operation" }, + { 'V', "version", &print_version, "Print this help message" }, + { 'h', "help", &usage, "Print version information" }, + { 't', "list", &do_list, "List the contents of an archive" }, + { 's', "print-armap", &print_armap, "Print the archive index" }, + }; + +void +usage (void) +{ + int i; + + printf ("Usage: asranlib [options] archive\n" + " Generate an index to speed access to archives\n" + " The options are:\n"); + + for (i = 0; i < NELEM (opts); ++i) + { + int len = 5; + if ('\0' != opts[i].short_opt) + printf (" -%c ", opts[i].short_opt); + else + printf (" "); + + if (NULL != opts[i].long_opt) + { + printf ("--%s ", opts[i].long_opt); + len += strlen (opts[i].long_opt); + } + + while (len++ < 30) + putchar (' '); + printf ("%s\n", opts[i].comment); + } + + printf ("asranlib: supported targets: asxxxx\n"); + + exit (1); +} + +int +main (int argc, char *argv[]) +{ + char **argp; + int noopts = 0; + int narch = 0; + + for (argp = argv + 1; *argp; ++argp) + { + if (!noopts && (*argp)[0] == '-') + { + int i; + + if ((*argp)[1] == '-') + { + if ((*argp)[2] == '\0') + { + /* end of options */ + noopts = 1; + continue; + } + else + { + /* long option */ + for (i = 0; i < NELEM (opts); ++i) + { + if (0 == strcmp (&(*argp)[2], opts[i].long_opt)) + { + if (NULL != opts[i].optfnc) + { + (*opts[i].optfnc) (); + break; + } + } + } + if (i >= NELEM (opts)) + { + fprintf (stderr, "asranlib: unrecognized option `%s'\n", *argp); + usage (); + } + } + } + else + { + char *optp; + + /* short option */ + for (optp = &(*argp)[1]; *optp != '\0'; ++optp) + { + for (i = 0; i < NELEM (opts); ++i) + { + if (*optp == opts[i].short_opt) + { + if (NULL != opts[i].optfnc) + { + (*opts[i].optfnc) (); + break; + } + } + } + if (i >= NELEM (opts)) + { + fprintf (stderr, "asranlib: invalid option -- %c\n", *optp); + usage (); + } + } + } + } + else + { + /* not an option */ + do_ranlib (*argp); + ++narch; + } + } + + if (!narch) + usage (); + + return 0; +} diff --git a/as/asranlib/asranlib.dsp b/as/asranlib/asranlib.dsp new file mode 100644 index 0000000..be1e0b4 --- /dev/null +++ b/as/asranlib/asranlib.dsp @@ -0,0 +1,132 @@ +# Microsoft Developer Studio Project File - Name="asranlib" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Console Application" 0x0103 + +CFG=asranlib - Win32 Debug +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "asranlib.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "asranlib.mak" CFG="asranlib - Win32 Debug" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "asranlib - Win32 Release" (based on "Win32 (x86) Console Application") +!MESSAGE "asranlib - Win32 Debug" (based on "Win32 (x86) Console Application") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "asranlib - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 0 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 0 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD CPP /nologo /W3 /GX /O2 /I "../link" /I "../../support/Util" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD BASE RSC /l 0x424 /d "NDEBUG" +# ADD RSC /l 0x424 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /machine:I386 +# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /machine:I386 + +!ELSEIF "$(CFG)" == "asranlib - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /GZ /c +# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I "../link" /I "../../support/Util" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /FR /YX /FD /GZ /c +# ADD BASE RSC /l 0x424 /d "_DEBUG" +# ADD RSC /l 0x424 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /debug /machine:I386 /pdbtype:sept +# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /debug /machine:I386 /pdbtype:sept + +!ENDIF + +# Begin Target + +# Name "asranlib - Win32 Release" +# Name "asranlib - Win32 Debug" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\asranlib.c +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf.c +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf_string.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=..\link\aslink.h +# End Source File +# Begin Source File + +SOURCE=..\link\asxxxx_config.h +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf.h +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf_string.h +# End Source File +# Begin Source File + +SOURCE=..\link\lkar.h +# End Source File +# Begin Source File + +SOURCE=..\link\lkrel.h +# End Source File +# End Group +# Begin Group "Resource Files" + +# PROP Default_Filter "ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe" +# End Group +# End Target +# End Project diff --git a/as/asxxsrc/aslex.c b/as/asxxsrc/aslex.c new file mode 100644 index 0000000..d639209 --- /dev/null +++ b/as/asxxsrc/aslex.c @@ -0,0 +1,542 @@ +/* aslex.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 28-Oct-97 JLH bug in getst(): sign extend on ~(SPACE|ILL) + * causes infinite loop + */ + +/* + * Extensions: P. Felber, M. Hope + */ + +#include +#include +#include +#include "dbuf_string.h" +#include "asm.h" + +/*)Module aslex.c + * + * The module aslex.c includes the general lexical + * analysis routines for the assembler. + * + * aslex.c contains the following functions: + * char endline() + * char get() + * VOID getid(id,c) + * int as_getline() + * int getmap() + * char getnb() + * VOID getst() + * int more() + * VOID unget(c) + * + * aslex.c contains no local/static variables + */ + +/*)Function VOID getid(id,c) + * + * char * id a pointer to a string of + * maximum length NCPS + * int c mode flag + * >=0 this is first character to + * copy to the string buffer + * <0 skip white space, first + * character must be a LETTER + * + * The function getid() scans the current assembler-source text line + * from the current position copying the next LETTER | DIGIT string + * into the external string buffer (id). The string ends when a non + * LETTER or DIGIT character is found. The maximum number of + * characters copied is NCPS. If the input string is larger than + * NCPS characters then the string is truncated, if the input string + * is shorter than NCPS characters then the string is NULL filled. + * If the mode argument (c) is >=0 then (c) is the first character + * copied to the string buffer, if (c) is <0 then intervening white + * space (SPACES and TABS) are skipped and the first character found + * must be a LETTER else a 'q' error terminates the parse of this + * assembler-source text line. + * + * local variables: + * char * p pointer to external string buffer + * int c current character value + * + * global variables: + * char ctype[] a character array which defines the + * type of character being processed. + * This index is the character + * being processed. + * + * called functions: + * char get() aslex.c + * char getnb() aslex.c + * VOID unget() aslex.c + * + * side effects: + * use of getnb(), get(), and unget() updates the + * global pointer ip, the position in the current + * assembler-source text line. + */ + +VOID +getid(id, c) +register int c; +char *id; +{ + register char *p; + + if (c < 0) { + c = getnb(); + if ((ctype[c] & LETTER) == 0) + qerr(); + } + p = id; + do { + if (p < &id[NCPS]) + *p++ = c; + } while (ctype[c=get()] & (LETTER|DIGIT)); + unget(c); + while (p < &id[NCPS]) + *p++ = 0; +} + +/*)Function VOID getst(id,c) + * + * char * id a pointer to a string of + * maximum length NCPS + * int c mode flag + * >=0 this is first character to + * copy to the string buffer + * <0 skip white space, first + * character must be a LETTER + * + * The function getnbid() scans the current assembler-source text line + * from the current position copying the next character string into + * the external string buffer (id). The string ends when a SPACE or + * ILL character is found. The maximum number of + * characters copied is NCPS. If the input string is larger than + * NCPS characters then the string is truncated, if the input string + * is shorter than NCPS characters then the string is NULL filled. + * If the mode argument (c) is >=0 then (c) is the first character + * copied to the string buffer, if (c) is <0 then intervening white + * space (SPACES and TABS) are skipped and the first character found + * must be a LETTER else a 'q' error terminates the parse of this + * assembler-source text line. + * + * local variables: + * char * p pointer to external string buffer + * int c current character value + * + * global variables: + * char ctype[] a character array which defines the + * type of character being processed. + * This index is the character + * being processed. + * + * called functions: + * char get() aslex.c + * char getnb() aslex.c + * VOID unget() aslex.c + * + * side effects: + * use of getnb(), get(), and unget() updates the + * global pointer ip, the position in the current + * assembler-source text line. + */ + +VOID +getst(id, c) +register int c; +char *id; +{ + register char *p; + + if (c < 0) { + c = getnb(); + if ((ctype[c] & LETTER) == 0) + qerr(); + } + p = id; + do { + if (p < &id[NCPS]) + *p++ = c; + } while (ctype[c=get()] & (0xFF - (SPACE|ILL))); + unget(c); + while (p < &id[NCPS]) + *p++ = 0; +} + +/*)Function char getnb() + * + * The function getnb() scans the current assembler-source + * text line returning the first character not a SPACE or TAB. + * + * local variables: + * int c current character from + * assembler-source text line + * + * global variables: + * none + * + * called functions: + * char get() aslex.c + * + * side effects: + * use of get() updates the global pointer ip, the position + * in the current assembler-source text line + */ + +char +getnb() +{ + register int c; + + while ((c=get()) == ' ' || c == '\t') + ; + return (c); +} + +/*)Function char get() + * + * The function get() returns the next character in the + * assembler-source text line, at the end of the line a + * NULL character is returned. + * + * local variables: + * int c current character from + * assembler-source text line + * + * global variables: + * char * ip pointer into the current + * assembler-source text line + * + * called functions: + * none + * + * side effects: + * updates ip to the next character position in the + * assembler-source text line. If ip is at the end of the + * line, ip is not updated. + */ + +char +get() +{ + register int c; + + if ((c = *ip) != 0) + ++ip; + return (c); +} + +/*)Function VOID unget(c) + * + * int c value of last character read from + * assembler-source text line + * + * If (c) is not a NULL character then the global pointer ip + * is updated to point to the preceeding character in the + * assembler-source text line. + * + * NOTE: This function does not push the character (c) + * back into the assembler-source text line, only + * the pointer ip is changed. + * + * local variables: + * int c last character read from + * assembler-source text line + * + * global variables: + * char * ip position into the current + * assembler-source text line + * + * called functions: + * none + * + * side effects: + * ip decremented by 1 character position + */ + +VOID +unget(c) +{ + if (c) + if (ip != ib) + --ip; +} + +/*)Function int getmap(d) + * + * int d value to compare with the + * assembler-source text line character + * + * The function getmap() converts the 'C' style characters \b, \f, + * \n, \r, and \t to their equivalent ascii values and also + * converts 'C' style octal constants '\123' to their equivalent + * numeric values. If the first character is equivalent to (d) then + * a (-1) is returned, if the end of the line is detected then + * a 'q' error terminates the parse for this line, or if the first + * character is not a \ then the character value is returned. + * + * local variables: + * int c value of character from the + * assembler-source text line + * int n looping counter + * int v current value of numeric conversion + * + * global variables: + * none + * + * called functions: + * char get() aslex.c + * + * side effects: + * use of get() updates the global pointer ip the position + * in the current assembler-source text line + */ + +int +getmap(d) +{ + register int c, n, v; + + if ((c=get()) == '\0') + qerr(); + if (c == d) + return (-1); + if (c == '\\') { + c = get(); + switch (c) { + + case 'b': + c = '\b'; + break; + + case 'f': + c = '\f'; + break; + + case 'n': + c = '\n'; + break; + + case 'r': + c = '\r'; + break; + + case 't': + c = '\t'; + break; + + case '0': + case '1': + case '2': + case '3': + case '4': + case '5': + case '6': + case '7': + n = 0; + v = 0; + while (++n<=3 && c>='0' && c<='7') { + v = (v<<3) + c - '0'; + c = get(); + } + unget(c); + c = v; + break; + } + } + return (c); +} + +/*)Function int as_getline() + * + * The function as_getline() reads a line of assembler-source text + * from an assembly source text file or an include file. + * Lines of text are processed from assembler-source files until + * all files have been read. If an include file is opened then + * lines of text are read from the include file (or nested + * include file) until the end of the include file is found. + * The input text line is copied into the global string ib[] + * and converted to a NULL terminated string. The function + * as_getline() returns a (1) after succesfully reading a line + * or a (0) if all files have been read. + * + * local variables: + * int i string length + * + * global variables: + * const char ib[] string buffer containing + * assembler-source text line + * char ifp[] array of file handles for + * include files + * int incfil index for ifp[] specifies + * active include file + * int incline[] array of include file + * line numbers + * char sfp[] array of file handles for + * assembler source files + * int cfile index for sfp[] specifies + * active source file + * int srcline[] array of source file + * line numbers + * int inpfil maximum input file index + * + * called functions: + * int dbuf_init() + * int dbuf_set_length() + * int dbuf_getline() + * const char * dbuf_c_str() + * int fclose() c-library + * char * fgets() c-library + * int strlen() c-library + * + * side effects: + * include file will be closed at detection of end of file. + * the next sequential source file may be selected. + * the global file indexes incfil or cfile may be changed. + * The respective source line or include line counter + * will be updated. + */ + +int +as_getline(void) +{ + static struct dbuf_s dbuf; + static char dbufInitialized = 0; + size_t len; + + if (!dbufInitialized) + { + dbuf_init (&dbuf, 1024); + dbufInitialized = 1; + } + else + dbuf_set_length (&dbuf, 0); + +loop: + if (incfil >= 0) + { + if ((len = dbuf_getline (&dbuf, ifp[incfil])) == 0) + { + fclose (ifp[incfil]); + ifp[incfil--] = NULL; + lop = NLPP; + goto loop; + } + else + { + ++incline[incfil]; + } + } + else + { + if ((len = dbuf_getline (&dbuf, sfp[cfile])) == 0) + { + if (++cfile <= inpfil) + { + srcline[cfile] = 0; + goto loop; + } + return 0; + } + else + { + ++srcline[cfile]; + } + } + ib = dbuf_c_str (&dbuf); + + /* remove the trailing NL */ + if (len > 0 && '\n' == ib[len - 1]) + { + --len; + if (len > 0 && '\r' == ib[len - 1]) + --len; + dbuf_set_length (&dbuf, len); + ib = dbuf_c_str (&dbuf); + } + + return 1; +} + +/*)Function int more() + * + * The function more() scans the assembler-source text line + * skipping white space (SPACES and TABS) and returns a (0) + * if the end of the line or a comment delimeter (;) is found, + * or a (1) if their are additional characters in the line. + * + * local variables: + * int c next character from the + * assembler-source text line + * + * global variables: + * none + * + * called functions: + * char getnb() aslex.c + * VOID unget() aslex.c + * + * side effects: + * use of getnb() and unget() updates the global pointer ip + * the position in the current assembler-source text line + */ + +int +more() +{ + register int c; + + c = getnb(); + unget(c); + return( (c == '\0' || c == ';') ? 0 : 1 ); +} + +/*)Function char endline() + * + * The function endline() scans the assembler-source text line + * skipping white space (SPACES and TABS) and returns the next + * character or a (0) if the end of the line is found or a + * comment delimiter (;) is found. + * + * local variables: + * int c next character from the + * assembler-source text line + * + * global variables: + * none + * + * called functions: + * char getnb() aslex.c + * + * side effects: + * use of getnb() updates the global pointer ip the + * position in the current assembler-source text line + */ + +char +endline() +{ + register int c; + + c = getnb(); + return( (c == '\0' || c == ';') ? 0 : c ); +} diff --git a/as/asxxsrc/asnoice.c b/as/asxxsrc/asnoice.c new file mode 100644 index 0000000..a13fec7 --- /dev/null +++ b/as/asxxsrc/asnoice.c @@ -0,0 +1,147 @@ +/* asnoice.c - Extensions to CUG 292 assembler ASxxxx to produce NoICE debug files + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * Extensions to CUG 292 assembler ASxxxx to produce NoICE debug files + * + * 3-Nov-1997 by John Hartman + */ + +#include +#include +#include +#include +#include "asm.h" + +/* Return basic file name without path or extension. + If spacesToUnderscores != 0 then spaces are converted to underscores */ + +char* BaseFileName( int fileNumber, int spacesToUnderscores ) +{ + static int prevFile = -1; + static char baseName[ PATH_MAX ]; + + char *p1, *p2; + + if (fileNumber != prevFile) + { + prevFile = fileNumber; + + p1 = srcfn[prevFile]; + + /* issue a FILE command with full path and extension */ + fprintf( ofp, ";!FILE %s\n", p1 ); + + /* Name starts after any colon or backslash (DOS) */ + p2 = strrchr( p1, '\\' ); + if (p2 == NULL) p2 = strrchr( p1, '/' ); + if (p2 == NULL) p2 = strrchr( p1, ':' ); + if (p2 == NULL) p2 = p1-1; + strcpy( baseName, p2+1 ); + + /* Name ends at any separator */ + p2 = strrchr( baseName, FSEPX ); + if (p2 != NULL) *p2 = 0; + /* SD comment this out since not a ANSI Function */ + /* strupr( baseName ); */ + + if (spacesToUnderscores) + { + /* Convert spaces to underscores */ + for (p1 = baseName; *p1; ++p1) + if (isspace(*p1)) + *p1 = '_'; + } + } + return baseName; +} + +/* Define a symbol for current location: FILE.line# */ +void DefineNoICE_Line() +{ + char name[ NCPS ]; + struct sym *pSym; + + /* symbol is FILE.nnn */ + sprintf( name, "%s.%u", BaseFileName( cfile, 0 ), srcline[ cfile ] ); + + pSym = lookup( name ); + pSym->s_type = S_USER; + pSym->s_area = dot.s_area; + pSym->s_addr = laddr; + pSym->s_flag |= S_GBL; +} + +/* Define a symbol for current location: A$FILE$line# */ +void DefineCDB_Line() +{ + char name[ NCPS ]; + struct sym *pSym; + + /* symbol is FILE.nnn */ + sprintf( name, "A$%s$%u", BaseFileName( cfile, 1 ), srcline[ cfile ] ); + + pSym = lookup( name ); + pSym->s_type = S_USER; + pSym->s_area = dot.s_area; + pSym->s_addr = laddr; + pSym->s_flag |= S_GBL; +} + +#if 0 +OLD VERSION +/* Define a symbol for current location: FILE.line# */ +void DefineNoICE_Line() +{ + static int prevFile = -1; + static struct area *pPrevArea = NULL; + static char baseName[ PATH_MAX ]; + + int j; + char *p1, *p2; + + /* Get outfilename without extension for use as base symbol name */ + if (baseName[0] == 0) + { + p1 = srcfn[0]; + p2 = baseName; + while ((*p1 != 0) && (*p1 != FSEPX)) + { + *p2++ = *p1++; + } + *p2 = 0; + /* SD Commented this out since it is not a + ASNI Function */ + /* strupr( baseName ); */ + } + + if ((cfile != prevFile) || (dot.s_area != pPrevArea)) + { + prevFile = cfile; + pPrevArea = dot.s_area; + + /* file or area change: issue FILE command with base @ */ + fprintf( ofp, ";!FILE %s %s_%s\n", srcfn[ cfile ], + baseName, + dot.s_area->a_id ); + } + + fprintf( ofp, ";!LINE %u. 0x%X\n", srcline[ cfile ], laddr ); +} + +#endif diff --git a/as/asxxsrc/assym.c b/as/asxxsrc/assym.c new file mode 100644 index 0000000..172ff40 --- /dev/null +++ b/as/asxxsrc/assym.c @@ -0,0 +1,514 @@ +/* assym.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 10-Nov-07 borutr: + * - use strsto instead StoreString and include it in assym.c + * for compatibility with the original asxxxx + * - applied changes from 28-Oct-97 JLH: + * - lookup: Use StoreString for sym construction + * - change symeq() to do length-independent string compare + * - change hash() to do length-independent hash calculation + * - applied changes from 29-Oct-97 JLH: + * - make mnemonics case insensitive ALWAYS + * - make hash() case-insensitive always + * - replace symeq() call in mlookup with strcmpi + */ + +#include +#include +#include +#include +#include "asm.h" + +/*)Module assym.c + * + * The module assym.c contains the functions that operate + * on the mnemonic/directive and symbol structures. + * + * assym.c contains the following functions: + * VOID allglob() + * area * alookup() + * int hash() + * sym * lookup() + * mne * mlookup() + * VOID * new() + * int symeq() + * VOID syminit() + * VOID symglob() + * + * assym.c contains no local/static variables. + */ + +/*)Function VOID syminit() + * + * The function syminit() is called early in the game + * to set up the hashtables. First all buckets in a + * table are cleared. Then a pass is made through + * the respective symbol lists, linking them into + * their hash buckets. Finally the base area pointer + * is set to 'dca'. + * + * local variables: + * int h computed hash value + * mne * mp pointer to a mne structure + * mne ** mpp pointer to an array of + * mne structure pointers + * sym * sp pointer to a sym structure + * sym ** spp pointer to an array of + * sym structure pointers + * + * global variables: + * area area[] single elememt area array + * area dca defined as area[0] + * mne * mnehash[] array of pointers to NHASH + * linked mnemonic/directive lists + * sym * symhash[] array of pointers to NHASH + * linked symbol lists + * + * functions called: + * none + * + * side effects: + * (1) The symbol hash tables are initialized, + * the only defined symbol is '.'. + * (2) The mnemonic/directive hash tables are + * initialized with the assembler directives + * and mnemonics found in the machine dependent + * file ___pst.c. + * (3) The area pointer is initialized to dca (area[0]). + */ + +VOID +syminit(void) +{ + register struct mne *mp; + struct mne **mpp; + register struct sym *sp; + struct sym **spp; + register int h; + + mpp = &mnehash[0]; + while (mpp < &mnehash[NHASH]) + *mpp++ = NULL; + mp = &mne[0]; + for (;;) { + h = hash(mp->m_id); + mp->m_mp = mnehash[h]; + mnehash[h] = mp; + if (mp->m_flag&S_END) + break; + ++mp; + } + + spp = &symhash[0]; + while (spp < &symhash[NHASH]) + *spp++ = NULL; + sp = &sym[0]; + for (;;) { + h = hash(sp->s_id); + sp->s_sp = symhash[h]; + symhash[h] = sp; + if (sp->s_flag&S_END) + break; + ++sp; + } + + areap = &dca; +} + +/*)Function area * alookup(id) + * + * char * id area name string + * + * The function alookup() searches the area list for a + * match with id. If the area is defined then a pointer + * to this area is returned else a NULL is returned. + * + * local variables: + * area * ap pointer to area structure + * + * global variables: + * area * areap pointer to an area structure + * + * functions called: + * int symeq() assym.c + * + * side effects: + * none + */ + +struct area * +alookup(char *id) +{ + register struct area *ap; + + ap = areap; + while (ap) { + if (symeq(id, ap->a_id)) { + return (ap); + } + ap = ap->a_ap; + } + return(NULL); +} + +/*)Function mne * mlookup(id) + * + * char * id mnemonic/directive name string + * + * The function mlookup() searches the mnemonic/directive + * hash tables for a match returning a pointer to the + * mne structure else it returns a NULL. + * + * local variables: + * mne * mp pointer to mne structure + * int h calculated hash value + * + * global variables: + * mne * mnehash[] array of pointers to NHASH + * linked mnemonic/directive lists + * + * functions called: + * none + * + * side effects: + * none + */ + +struct mne * +mlookup(char *id) +{ + register struct mne *mp; + register int h; + + h = hash(id); + mp = mnehash[h]; + while (mp) { + if (as_strcmpi(id, mp->m_id) == 0) /* JLH: case insensitive */ + return (mp); + mp = mp->m_mp; + } + return (NULL); +} + +/*)Function sym * lookup(id) + * + * char * id symbol name string + * + * The function lookup() searches the symbol hash tables for + * a symbol name match returning a pointer to the sym structure. + * If the symbol is not found then a sym structure is created, + * initialized, and linked to the appropriate hash table. + * A pointer to this new sym structure is returned. + * + * local variables: + * int h computed hash value + * sym * sp pointer to a sym structure + * + * global varaibles: + * sym * symhash[] array of pointers to NHASH + * linked symbol lists + * + * functions called: + * int hash() assym.c + * VOID * new() assym.c + * int symeq() assym.c + * + * side effects: + * If the function new() fails to allocate space + * for the new sym structure the assembly terminates. + */ + +struct sym * +lookup(char *id) +{ + register struct sym *sp; + register int h; + + h = hash(id); + sp = symhash[h]; + while (sp) { + if (symeq(id, sp->s_id)) + return (sp); + sp = sp->s_sp; + } + sp = (struct sym *) new (sizeof(struct sym)); + sp->s_sp = symhash[h]; + symhash[h] = sp; + sp->s_tsym = NULL; + sp->s_id = strsto(id); + sp->s_type = S_NEW; + sp->s_flag = 0; + sp->s_area = NULL; + sp->s_ref = 0; + sp->s_addr = 0; + return (sp); +} + +/*)Function VOID symglob() + * + * The function symglob() will mark all symbols of + * type S_NEW as global. Called at the beginning of pass 1 + * if the assembly option -g was specified. + * + * local variables: + * sym * sp pointer to a sym structure + * int i loop index + * + * global variables: + * sym * symhash[] array of pointers to NHASH + * linked symbol lists + * + * functions called: + * none + * + * side effects: + * Symbol types changed. + */ + +VOID +symglob(void) +{ + register struct sym *sp; + register int i; + + for (i=0; is_type == S_NEW) + sp->s_flag |= S_GBL; + sp = sp->s_sp; + } + } +} + +/*)Function VOID allglob() + * + * The function allglob() will mark all symbols of + * type S_USER as global. Called at the beginning of pass 1 + * if the assembly option -a was specified. + * + * local variables: + * sym * sp pointer to a sym structure + * int i loop index + * + * global variables: + * sym * symhash[] array of pointers to NHASH + * linked symbol lists + * + * functions called: + * none + * + * side effects: + * Symbol types changed. + */ + +VOID +allglob(void) +{ + register struct sym *sp; + register int i; + + for (i=0; is_type == S_USER) + sp->s_flag |= S_GBL; + sp = sp->s_sp; + } + } +} + +/*)Function int symeq(p1, p2) + * + * char * p1 name string + * char * p2 name string + * + * The function symeq() compares the two name strings for a match. + * The return value is 1 for a match and 0 for no match. + * + * local variables: + * int h loop counter + * + * global variables: + * char ccase[] an array of characters which + * perform the case translation function + * + * functions called: + * none + * + * side effects: + * none + * + */ + +int +symeq(char *p1, char *p2) +{ +#if CASE_SENSITIVE + return (strcmp( p1, p2 ) == 0); +#else + return (as_strcmpi( p1, p2 ) == 0); +#endif +} + +/*)Function int hash(p) + * + * char * p pointer to string to hash + * + * The function hash() computes a hash code using the sum + * of all characters mod table size algorithm. + * + * local variables: + * int h accumulated character sum + * int n loop counter + * + * global variables: + * char ccase[] an array of characters which + * perform the case translation function + * + * functions called: + * none + * + * side effects: + * none + */ + +int +hash(char *p) +{ + register int h; + + h = 0; + while (*p) { + /* JLH: case insensitive hash: Doesn't much affect + * hashing, and allows same function for mnemonics and symbols + */ + h += ccase[(int)*p++]; + } + return (h&HMASK); +} + +/*)Function char * strsto(str) + * + * char * str pointer to string to save + * + * Allocate space for "str", copy str into new space. + * Return a pointer to the allocated string. + * + * This function based on code by + * John L. Hartman + * jhartman at compuserve dot com + * + * local variables: + * int l string length + 1 + * int bytes bytes remaining in buffer area + * char * p pointer to head of copied string + * char * pnext next location in buffer area + * + * global variables: + * none + * + * functions called: + * VOID * new() assym.c + * char * strncpy() c_library + * + * side effects: + * Space allocated for string, string copied + * to space. Out of Space terminates assembler. + */ + +/* + * To avoid wasting memory headers on small allocations, we + * allocate a big chunk and parcel it out as required. + * These static variables remember our hunk + */ + +#define STR_SPC 1024 +static char * pnext = NULL; +static int bytes = 0; + +char * +strsto(char *str) +{ + int l; + char *p; + + /* + * What we need, including a null. + */ + l = strlen(str) + 1; + + if (l > bytes) { + /* + * No space. Allocate a new hunk. + * We lose the pointer to any old hunk. + * We don't care, as the names are never deleted. + */ + pnext = (char *) new (STR_SPC); + bytes = STR_SPC; + } + + /* + * Copy the name and terminating null. + */ + p = pnext; + strncpy(p, str, l); + + pnext += l; + bytes -= l; + + return(p); +} + +/*)Function VOID * new(n) + * + * unsigned int n allocation size in bytes + * + * The function new() allocates n bytes of space and returns + * a pointer to this memory. If no space is available the + * assembly is terminated. + * + * local variables: + * VOID * p a general pointer + * + * global variables: + * none + * + * functions called: + * VOID asexit() asmain.c + * int fprintf() c_library + * VOID * malloc() c_library + * + * side effects: + * Memory is allocated, if allocation fails + * the assembly is terminated. + */ + +VOID * +new(unsigned int n) +{ + register VOID *p; + + if ((p = (VOID *) malloc(n)) == NULL) { + fprintf(stderr, "Out of space!\n"); + asexit(1); + } + return (p); +} diff --git a/as/asxxsrc/strcmpi.c b/as/asxxsrc/strcmpi.c new file mode 100644 index 0000000..c45ce9d --- /dev/null +++ b/as/asxxsrc/strcmpi.c @@ -0,0 +1,55 @@ +/* strcmpi.c */ + +/* + * Compare two strings ignoring case. + * + * Taken from GLIBC 2.2.5. Original code is copyrighted "Free + * Software Foundation" and published under the GNU Lesser General + * Public License. + * + */ + +#include +#include + +int as_strcmpi (const char *s1, const char *s2) +{ + const unsigned char *p1 = (const unsigned char *) s1; + const unsigned char *p2 = (const unsigned char *) s2; + unsigned char c1, c2; + + if (p1 == p2) + return 0; + + do + { + c1 = tolower (*p1++); + c2 = tolower (*p2++); + if (c1 == '\0') + break; + } + while (c1 == c2); + + return c1 - c2; +} + +int as_strncmpi (const char *s1, const char *s2, size_t n) +{ + const unsigned char *p1 = (const unsigned char *) s1; + const unsigned char *p2 = (const unsigned char *) s2; + unsigned char c1, c2; + + if ((p1 == p2) || (n == 0)) + return 0; + + do + { + c1 = tolower (*p1++); + c2 = tolower (*p2++); + if (c1 == '\0') + break; + } + while ((c1 == c2) && --n); + + return c1 - c2; +} diff --git a/as/clean.mk b/as/clean.mk new file mode 100644 index 0000000..5d9b58f --- /dev/null +++ b/as/clean.mk @@ -0,0 +1,10 @@ +clean: + $(MAKE) -C z80 clean BUILDDIR=$(BUILDDIR) + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + rm -f *.dep + rm -rf obj + +distclean: + $(MAKE) -C z80 distclean BUILDDIR=$(BUILDDIR) + rm -f Makefile diff --git a/as/doc/README b/as/doc/README new file mode 100644 index 0000000..7b8effa --- /dev/null +++ b/as/doc/README @@ -0,0 +1,460 @@ +(README 2-Apr-1998 by John Hartman. jhartman@compuserve.com) + +I have made several modifications to the CUG292 assemblers and +linker, beginning with version 1.7 (the most recent I know of). + +The original assembler was written by + * Alan R. Baldwin + * 721 Berkeley St. + * Kent, Ohio 44240 + +To conserve space on my web site, this ZIP file does not include all +of the files in the original CUG292 release. In particular, the +assembler test files and ASSIST monitors have been removed. All source +files and documents are included. The original is widely available +on the net. + +Your comments and bug reports are solicited. + +The changes are of three types +1) bug fixes and small changes +2) an 8051 version of the assembler +3) generation of line and symbol information for NoICE + +======================================================================== +MISCELLANEOUS CHANGES + +* There is a bug in LKMAIN: it tests S_DEF flag in "s_flag". + No one else uses s_flag in the linker - S_DEF is defined in s_type + instead. Presumably LKMAIN should use s_type as well? Changed. + +* There is a portability problem in aslex: the test + while (ctype[c=get()] & ~(SPACE | ILL)) + causes an infinite loop with my (old Zortech) compiler: + ILL = 0x80, SPACE=0. When I read a null at the end of a line, + ctype[] returns "ILL". My compiler sign extends this 0x80 to int 0xFF80. + Sign extend on ~ILL makes 0x7F into 0xFF7F. The result of the AND is + true and we spin. I changed this to + while (ctype[c=get()] & (0xFF - (SPACE|ILL))) + +* I made changes to mlookup() so that mnemonics and pseudo-ops are always + case insensitive, regardless of the CASE_SENSITIVE flag. This simplifies + using the assembler on existing code. + +* The scheme described below for debug information can make for very long + symbol names. Thus, I have modified the assembler and linker to allow + names up to 80 characters, moving the name strings out of the sym struct. + This will save significant heap space over simply increasing NCPS to 80. + +* I have added one module, ASNOICE.C, to each assembler; and one module, + LKNOICE.C, to the linker. My make files are named XSnnnn.MAK for the + asseblers, and XSLINK.MAK for the linker. I have not modified any + of the original make or project files, since I have no means to test + them. + +======================================================================== +8051 ASSEMBLER + +I was somewhat surprised that there was no AS8051 - so I wrote one. +It is comprised of the modules: + i8051.h + i51pst.c + i51mch.c + i51adr.c + i51ext.c + appendk.txt "Appendix K" about the 8051 for the documentation + +I added four attributes to the .area directive to support +the 8051's multiple address spaces: + CODE for codespace + DATA for internal data + BIT for internal bit-addressable + XDATA for external data. + +These will typically be used as follows (names are examples): + .area IDATA (DATA) + .area IBIT (BIT) + .area MYXDATA (REL,CON,XDATA) + .area MYCODE (REL,CON,CODE) + +The default segment, _CODE, should not be used for the 8051. For +compatibility reasons, _CODE is allocated in "DATA" space. You +should always define an area in the CODE space. + +DETAILS: + +i51mch.c is not especially pretty - it includes some brute-force switch +statements which could, I suspect, be trimmed down by application of +a few appropriate functions. + +The 8051 includes two instructions, AJMP and ACALL, which have eleven +bit destination addresses. The upper three address bits are encoded +into the top three bits of the op-code. In order to achieve this, I +was forced to make changes to several ASxxx and LKxxx modules: + asm.h line 179 equate for R_J11, 583 outr11 prototype + asout.c lines 1087-1132 function outr11: output 11 bit dest + aslink.h line 131 equate for R_J11 + lkrloc.c lines 354-377 link/locate 11 bit destination + +The definition of R_J11 is as (R_WORD | R_BYT2) +A comment in lkrloc says + * R_WORD with the R_BYT2 mode is flagged + * as an 'r' error by the assembler, + * but it is processed here anyway. +This is no longer true, so the code in question is #defined out +in the linker only. I suspect that this would cause problems +if a module with R_WORD | R_BYT1 by other cause were to be processed. + +I am not entirely happy with outr11 in the case where the destination +is an absolute value. The ideal would be to pass the value thru to the +linker, and resolve at link time whether or not the address is within +2K of the instruction location. Unfortunately, I couldn't figure out +how to pass an absolute value to the linker, as it has no area. Thus, +I interpreted absolute values as being relative to the beginning of the +current area, as is done in the other assemblers for relative branch +instructions. I am less happy with this solution here, as a 2K range +is far larger than the +-128 for a branch instruction. I can envision +code such as + reset = 123 + ... + ajmp reset + +If the ajmp is in a relocatable area, the effect will be not at all what +is desired. If you can offer any other solution, I would appreciate it. + +======================================================================== +SOURCE-LEVEL DEBUG OF ASSEMBLY CODE WITH NoICE + +1) The switch "-j" has been added to the assembler. This causes + assembly lines to generate line number information in the object + file. You may also wish to use the "-a" switch to make all symbols + global. Non-global symbols are not passed to the object file. + +2) The assemblers will pass any line beginning with the characters + ";!" (semi-colon, exclamation point) intact to the object file. + You can use such comments in your assembly modules to embed NoICE + commands in your source code. + +3) The switch "-j" has been added to the linker. This causes a + NoICE debug file, with extension ".NOI" to be created. All symbol + and line number information in the object files, as well as any + ";!" comments will be included. Specifying the -j switch will force + a map file to be produced as well. + +4) The linker will process any line beginning with the characters + ";!" (semi-colon, exclamation point) by removing the ";!" and + passing the remainder of the line to the .NOI file (if any). + This allows NoICE commands to be placed as ";!" comments in + the assembly file, and passed through the assember and linker + to the .NOI file. + +5) If the linker is requested to produce a hex output file (-i or -s + switches), a LOAD command for the hex file will be placed in the + .NOI file (if any). + +6) The linker will output the ";!" lines after all symbols have been + output. Thus, such lines can contain NoICE commands which refer to + symbols by name. + +======================================================================== +SOURCE-LEVEL DEBUG OF C CODE FOR NoICE + +This section is primarily of interest to compiler writers. + +Compilers which produce assembly code can pass debug information +through the assembler and linker to the NoICE command file. In +addition, the linker will provide special processing of symbols +with certain formats described below. + +1) The switch "-j" should NOT be used on assembly files which + represent compiler output. Instead, the compiler should generate + line number symbols for each code-producing source line as + described below. if your project contains a mixture of C and assembly + source files, you may wish to use "-j" on the assembly modules. + +2) The assemblers will pass any line beginning with the characters + ";!" (semi-colon, exclamation point) intact to the .REL file. + The compiler can make use of this fact to pass datatype information + and stack offsets for automatic symbols through the assembler and + linker to NoICE. This is described in detail below. + +3) The switch "-j" has been added to the linker. This causes a + NoICE debug file, with extension ".NOI" to be created. Contents + will be as described below. Specifying the -j switch will force + a map file to be produced as well. + +4) The linker will process any line beginning with the characters + ";!" (semi-colon, exclamation point) by removing the ";!" and + passing the remainder of the line to the .NOI file (if any). + +5) If the linker is requested to produce a hex output file (-i or -s + switches), a LOAD command for the hex file will be placed in the + .NOI file (if any). + +6) The linker will process symbols with names of the form + text + + into NoICE DEFINE (global symbol) commands in the .NOI output file + DEF name symbolvalue + +7) The linker will process symbols with names of the form + text.integer + + into NoICE FILE and LINE (line number) commands in the .NOI output file. + It will assume that "text" is the file name without path or extension, + that "integer" is the decimal line number within the file, and that + the value of the symbol is equal to the address of the first instruction + produced by the line. + +8) The linker will process symbols with names of the form + text.name + + into NoICE FILE and DEFINESCOPED commands in the .NOI file + (if any), to define file-scope variables: + FILE text + DEFS name symbolvalue + +9) The linker will process symbols with names of the form + text.name.name2 + + into NoICE FILE, FUNCTION, and DEFINESCOPED commands in the + .NOI file (if any), to define function-scope variables: + FILE text + FUNC name + DEFS name2 symbolvalue + +10) The linker will process symbols with names of the form + text.name.name2.integer + + into NoICE FILE, FUNCTION, and DEFINESCOPED commands in the + .NOI file (if any), to define function-scope variables, to allow + multiple scopes within a single C function. "Integer" is a scope + number, and should be zero for the first scope, and increment + for each new scope within the function. Since NoICE cannot currently + cope with scope finer than function, it will produce symbols of + the form: + FILE text + FUNC name + DEFS name2_integer symbolvalue + + The trailing "_integer" will be omitted for integer == 0 (function). + +11) The linker will process symbols with names of the form + text.name..FN + + into NoICE FILE, DEFINE, and FUNCTION commands in the .NOI + file (if any), to define the start of a global function: + FILE text + DEF name symbolvalue %code + FUNC name symbolvalue + +12) The linker will process symbols with names of the form + text.name..SFN + + into NoICE FILE, DEFINESCOPED, and SFUNCTION commands in the .NOI + file (if any), to define the start of a file-scope (static) + function: + FILE text + DEFS name symbolvalue %code + SFUNC name symbolvalue + +13) The linker will process symbols with names of the form + text.name..EFN + + into NoICE ENDFUNCTION commands in the .NOI file (if any) to + define the end of a global or file-scope function: + ENDF name symbolvalue + +14) The linker will output the symbols in each "area" or memory + section in order of increasing address. + +15) The linker will output the ";!" lines after all symbols + have been output. + +The features listed above may be used to add full source-level +debug information to assembly files produced by a compiler. The +example file ctest1.c, and the hypothetical ctest1.s produced by +compiling it illustrate this. The comments in the file describe +the information, but would not be present in an actual implementation. + +1) Begin each file with a ";!FILE" specifying the file name and its + original extension (usually ".c"), and with the path if the file is + not in the current directory. + ;!FILE ctest1.c + +2) Define any basic data types: char defaults to S08. Redefine as U08 or + ASCII if you desire. "int" defaults to S16. Redefine if necessary. + ;!DEFT 0 char %ASCII + +3) Define any data structures, typedefs, enums, etc. (C generally + does this per source file. Types will remain in scope unless + redefined). For example, the C structure + + typedef struct { + char c; + int i; + int ai[ 10 ]; + int *pi; + } STR; + + would generate the commands: + ;!STRUCT 0. STR + ;!DEFT 0. c %char + ;!DEFT 1. i %int + ;!DEFT 3. ai %int[10.] + ;!DEFT 23. pi %*int + ;!ENDS 25. + + Since the user can change input radix at will, it is generally + recommended to specify radix explicitly in the ;! commands: by + a trailing "." for decimal, or leading "0x" for hex. + +4) Use ;!FUNC, (or ;!SFUNC), ;!DEFS, and ;!ENDF to define any + function arguments and local variables. The function + void main( void ) + { + /* declare some local variables */ + char lc, *plc; + int *pli; + int *lnpi; + int *lfpi; + ... + + would generate stack-based symbol definitions with their datatypes. + (Note that the stack offsets are not passed to the assembler by + name, as they need not be relocated. Thus, it is the compiler's + duty to generate these. Note that the 68HC11 TSX instruction + increments the value of SP by one. Thus, "SP+nn" should use + "nn" values one greater than for use as offsets from X. + ;!FUNC main + ;!DEFS lfpi SP+6. %*int + ;!DEFS lnpi SP+8. %*int + ;!DEFS pli SP+10. %*int + ;!DEFS plc SP+12. %*char + ;!DEFS lc SP+14. %char + + When all local variables and parameters have been defined, the + function scope must be closed: + ;!ENDF + +5) In general, it is desirable to generate two symbols for each + function: one with an underbar, at the first byte of the + function, so that the disassembler will show it as the destination + of the JSR; and a second without an underbar at the address of + the first source line after stack frame is set up. The latter + will be a common breakpoint location. + + CUG292 can generate global symbols by using a "::" + _main:: + tsx + xgdx + subd #44 + xgdx + txs + +6) Once the stack frame is set up, declare the beginning of the + function body. The value of this symbol is the lowest address + which NoICE will consider to be within the function for scoping + purposes. + ctest1.main..FN:: + +7) Each C source line which produces code should emit a symbol + consisting of the file name without path or extension, followed + by the line number (in decimal) in the C source file. + ctest1.56:: + ldd #6 + std _gestr + +8) Declare the end of the function body. The value of this symbol + is the highest address which NoICE will consider to be within the + function for scoping purposes. The address must be on or before + the RTS, so that it does not overlap the following function. + Normally, the address will be the last C source line in the + function before stack frame is destroyed. + ctest1.main..EFN:: + xgdx + addd #44 + xgdx + txs + rts + +9) Global variables defined in the file, and their datatypes, may be + defined at any time. Debugging is most convenient if the + traditional C leading underbar is omitted. The global declarations + int gi; + STR *pgstr; + + would generate: + ;!DEF gi %*int + gi:: + .blkb 2 + + ;!DEF pgstr %*STR + pgstr:: + .blkb 2 + + Here, the ";!" command defines the datatype, which is unknown to + the assembler, while the "::" defintion defines the value, which + is unknown until link time. + +10) File-scope static variables, and their datatypes, must be defined + between the ;!FILE and the ;!ENDFILE in order to set proper scope. + Debugging is most convenient if the traditional C leading underbar + is omitted. The static declarations + static int si; + static STR sstr; + + would generate: + ;!DEFS si %*int + ctest1.si:: + .blkb 2 + + ;!DEFS sstr %STR + ctest1.sstr:: + .blkb 25 + + We note that while the ;!DEFS must be between ;!FILE and ;!ENDFILE, + the "::" definitions may be elsewhere in the file if it is + convenient, as the symbol name carries the scoping information. + +11) Function-scope static variables, and their datatypes, must be + defined between the ;!FUNC (or ;!SFUNC) and the corresponding + ;!ENDF in order to set proper scope. Debugging is most convenient + if the traditional C leading underbar is omitted. The static + declarations + void main( void ) + { + static int si; + static STR sstr; + + would generate: + ;!FUNC main + + at some point, and then + ;!DEFS si %*int + ctest1.main.si:: + .blkb 2 + + ;!DEFS sstr %STR + ctest1.main.sstr:: + .blkb 25 + + We note that while the ;!DEFS must be between ;!FUNC and ;!ENDF, + the "::" definitions may be elsewhere in the file if it is + convenient, as the symbol name carries the scoping information. + +12) After all code, data, and ;! defintions, declare end of file. + This is necessary to prevent mangled scope when several modules + are linked together. + ;!ENDFILE + + CTEST1.C - sample C source code + CTEST1.S - output from ImageCraft compiler, hand-doctored + to add additional debug information + CTEST2.C - second C module + CTEST2.S - output from ImageCraft compiler, undoctored + CTEST.BAT - assemble and link CTEST1+CTEST2 + +Run CTEST.BAT to produce CTEST1.NOI, a NoICE command file. + +end README diff --git a/as/doc/abstra.txt b/as/doc/abstra.txt new file mode 100644 index 0000000..e684232 --- /dev/null +++ b/as/doc/abstra.txt @@ -0,0 +1,60 @@ + + + ASxxxx Cross Assemblers, Version 1.7, November 1995 + + Submitted by Alan R. Baldwin, + Kent State University, Kent, Ohio + + Operating System: TSX+, RT-11, MS/DOS, PDOS + or other supporting K&R C. + + Source Langauge: C + + Abstract: + + The ASxxxx assemblers are a series of microprocessor assem- + blers written in the C programming language. This collection + contains cross assemblers for the 6800(6802/6808), 6801(hd6303), + 6804, 6805, 68HC08, 6809, 6811, 68HC16, 8085(8080), + z80(hd64180), H8/3xx, and 6500 series microprocessors. Each as- + sembler has a device specific section which includes: (1) + device description, byte order, and file extension information, + (2) a table of assembler general directives, special directives, + assembler mnemonics and associated operation codes, (3) machine + specific code for processing the device mnemonics, addressing + modes, and special directives. + + The assemblers have a common device independent section which + handles the details of file input/output, symbol table genera- + tion, program/data areas, expression analysis, and assembler + directive processing. + + The assemblers provide the following features: (1) alpha- + betized, formatted symbol table listings, (2) relocatable object + modules, (3) global symbols for linking object modules, (4) con- + ditional assembly directives, (5) reusable local symbols, and + (6) include-file processing. + + The companion program ASLINK is a relocating linker perform- + ing the following functions: (1) bind multiple object modules + into a single memory image, (2) resolve inter-module symbol + references, (3) resolve undefined symbols from specified + librarys of object modules, (4) process absolute, relative, con- + catenated, and overlay attributes in data and program sections, + (5) perform byte and word program-counter relative (pc or pcr) + addressing calculations, (6) define absolute symbol values at + link time, (7) define absolute area base address values at link + time, (8) produce Intel Hex or Motorola S19 output file, (9) + produce a map of the linked memory image, and (10) update the + ASxxxx assembler listing files with the absolute linked ad- + dresses and data. + + The assemblers and linker have been tested using DECUS C + under TSX+ and RT-11, PDOS C V5.4b, and Symantec C/C++ V6.1/V7.0 + under DOS/Windows 3.x. Complete source code and documentation + for the assemblers and linker is included with the distribution. + Additionally, test code for each assembler and several micropro- + cessor monitors ( ASSIST05 for the 6805, MONDEB and ASSIST09 for + the 6809, and BUFFALO 2.5 for the 6811) are included as working + examples of use of these assemblers. + \ No newline at end of file diff --git a/as/doc/appendk.txt b/as/doc/appendk.txt new file mode 100644 index 0000000..ec23296 --- /dev/null +++ b/as/doc/appendk.txt @@ -0,0 +1,158 @@ + + + + + + + + + + + + + + + APPENDIX K + + AS8051 ASSEMBLER + + + + + + K.1 8051 REGISTER SET + + The following is a list of the 8051 registers used by AS8051: + + a,b - 8-bit accumulators + r0,r1,r2,r3 - 8-bit registers + r4,r5,r6,r7 + dptr - data pointer + sp - stack pointer + pc - program counter + psw - status word + c - carry (bit in status word) + + + K.2 8051 INSTRUCTION SET + + + The following tables list all 8051 mnemonics recognized + by the AS8051 assembler. The following list specifies the + format for each addressing mode supported by AS8051: + + #data immediate data + byte or word data + + r,r1,r2 register r0,r1,r2,r3,r4,r5,r6, or r7 + + @r indirect on register r0 or r1 + @dptr indirect on data pointer + @a+dptr indirect on accumulator plus data pointer + @a+pc indirect on accumulator plus program counter + + addr direct memory address + + bitaddr bit address + + label call or jump label + + The terms data, addr, bitaddr, and label may all be expressions. + + Note that not all addressing modes are valid with every in- + struction. Refer to the 8051 technical data for valid + modes. + + + K.2.1 Inherent Instructions + + nop + + + K.2.6 Move Instructions + + mov a,#data mov a,addr + mov a,r mov a,@r + + mov r,#data mov r,addr + mov r,a + + mov addr,a mov addr,#data + mov addr,r mov addr,@r + mov addr1,addr2 mov bitaddr,c + + mov @r,#data mov @r,addr + mov @r,a + + mov c,bitaddr + mov dptr,#data + + movc a,@a+dptr movc a,@a+pc + movx a,@dptr movx a,@r + movx @dptr,a movx @r,a + + + K.2.8 Single Operand Instructions + + clr a clr c + clr bitaddr + cpl a cpl c + cpl bitaddr + setb c setb bitaddr + + da a + rr a rrc a + rl a rlc a + swap a + + dec a dec r + dec @r + inc a inc r + inc dptr inc @r + + div ab mul ab + + pop addr push addr + + + K.2.8 Two Operand Instructions + + add a,#data add a,addr + add a,r add a,@r + addc a,#data addc a,addr + addc a,r addc a,@r + subb a,#data subb a,addr + subb a,r subb a,@r + orl a,#data orl a,addr + orl a,r orl a,@r + orl addr,a orl addr,#data + orl c,bitaddr orl c,/bitaddr + anl a,#data anl a,addr + anl a,r anl a,@r + anl addr,a anl addr,#data + anl c,bitaddr anl c,/bitaddr + xrl a,#data xrl a,addr + xrl a,r xrl a,@r + xrl addr,a xrl addr,#data + xrl c,bitaddr xrl c,/bitaddr + xch a,addr xch a,r + xch a,@r xchd a,@r + + + K.2.3 Call and Return Instructions + + acall label lcall label + ret reti + + K.2.4 Jump Instructions + + ajmp label + cjne a,#data,label cjne a,addr,label + cjne r,#data,label cjne @r,#data,label + djnz r,label djnz addr,label + jbc bitadr,label + jb bitadr,label jnb bitadr,label + jc label jnc label + jz label jnz label + jmp @a+dptr + ljmp label sjmp label diff --git a/as/doc/asmlnk.txt b/as/doc/asmlnk.txt new file mode 100644 index 0000000..244d823 --- /dev/null +++ b/as/doc/asmlnk.txt @@ -0,0 +1,5814 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + SDCC ASxxxx Assemblers + + + and + + + SDCC ASLINK Relocating Linker + + + CHAPTER 1 THE ASSEMBLER 1-1 + 1.1 THE ASXXXX ASSEMBLERS 1-1 + 1.1.1 Assembly Pass 1 1-2 + 1.1.2 Assembly Pass 2 1-2 + 1.1.3 Assembly Pass 3 1-2 + 1.2 SOURCE PROGRAM FORMAT 1-3 + 1.2.1 Statement Format 1-3 + 1.2.1.1 Label Field 1-3 + 1.2.1.2 Operator Field 1-5 + 1.2.1.3 Operand Field 1-5 + 1.2.1.4 Comment Field 1-6 + 1.3 SYMBOLS AND EXPRESSIONS 1-6 + 1.3.1 Character Set 1-6 + 1.3.2 User-Defined Symbols 1-10 + 1.3.3 Local Symbols 1-11 + 1.3.4 Current Location Counter 1-12 + 1.3.5 Numbers 1-14 + 1.3.6 Terms 1-14 + 1.3.7 Expressions 1-15 + 1.4 GENERAL ASSEMBLER DIRECTIVES 1-16 + 1.4.1 .module Directive 1-16 + 1.4.2 .title Directive 1-17 + 1.4.3 .sbttl Directive 1-17 + 1.4.4 .page Directive 1-17 + 1.4.5 .byte and .db Directives 1-17 + 1.4.6 .word and .dw Directives 1-18 + 1.4.7 .blkb, .blkw, and .ds Directives 1-18 + 1.4.8 .ascii Directive 1-18 + 1.4.9 .ascis Directive 1-19 + 1.4.10 .asciz Directive 1-19 + 1.4.11 .radix Directive 1-20 + 1.4.12 .even Directive 1-20 + 1.4.13 .odd Directive 1-20 + 1.4.14 .area Directive 1-21 + 1.4.15 .org Directive 1-22 + 1.4.16 .globl Directive 1-23 + 1.4.17 .if, .else, and .endif Directives 1-23 + 1.4.18 .include Directive 1-24 + 1.4.19 .setdp Directive 1-25 + 1.5 INVOKING ASXXXX 1-27 + 1.6 ERRORS 1-28 + 1.7 LISTING FILE 1-29 + 1.8 SYMBOL TABLE FILE 1-30 + 1.9 OBJECT FILE 1-31 + + CHAPTER 2 THE LINKER 2-1 + 2.1 ASLINK RELOCATING LINKER 2-1 + 2.2 INVOKING ASLINK 2-2 + 2.3 LIBRARY PATH(S) AND FILE(S) 2-3 + 2.4 ASLINK PROCESSING 2-4 + 2.5 LINKER INPUT FORMAT 2-5 + 2.5.1 Object Module Format 2-6 + 2.5.2 Header Line 2-6 + 2.5.3 Module Line 2-6 + 2.5.4 Symbol Line 2-6 + 2.5.5 Area Line 2-7 + + + Page ii + + + + 2.5.6 T Line 2-7 + 2.5.7 R Line 2-7 + 2.5.8 P Line 2-8 + 2.6 LINKER ERROR MESSAGES 2-8 + 2.7 INTEL HEX OUTPUT FORMAT 2-11 + 2.8 MOTORLA S1-S9 OUTPUT FORMAT 2-12 + + CHAPTER 3 BUILDING ASXXXX AND ASLINK 3-1 + 3.1 BUILDING AN ASSEMBLER 3-1 + 3.2 BUILDING ASLINK 3-2 + + APPENDIX A AS6800 ASSEMBLER A-1 + A.1 6800 REGISTER SET A-1 + A.2 6800 INSTRUCTION SET A-1 + A.2.1 Inherent Instructions A-2 + A.2.2 Branch Instructions A-2 + A.2.3 Single Operand Instructions A-3 + A.2.4 Double Operand Instructions A-4 + A.2.5 Jump and Jump to Subroutine Instructions A-4 + A.2.6 Long Register Instructions A-5 + + APPENDIX B AS6801 ASSEMBLER B-1 + B.1 .hd6303 DIRECTIVE B-1 + B.2 6801 REGISTER SET B-1 + B.3 6801 INSTRUCTION SET B-1 + B.3.1 Inherent Instructions B-2 + B.3.2 Branch Instructions B-2 + B.3.3 Single Operand Instructions B-3 + B.3.4 Double Operand Instructions B-4 + B.3.5 Jump and Jump to Subroutine Instructions B-5 + B.3.6 Long Register Instructions B-5 + B.3.7 6303 Specific Instructions B-5 + + APPENDIX C AS6804 ASSEMBLER C-1 + C.1 6804 REGISTER SET C-1 + C.2 6804 INSTRUCTION SET C-1 + C.2.1 Inherent Instructions C-2 + C.2.2 Branch Instructions C-2 + C.2.3 Single Operand Instructions C-2 + C.2.4 Jump and Jump to Subroutine Instructions C-2 + C.2.5 Bit Test Instructions C-2 + C.2.6 Load Immediate data Instruction C-3 + C.2.7 6804 Derived Instructions C-3 + + APPENDIX D AS6805 ASSEMBLER D-1 + D.1 6805 REGISTER SET D-1 + D.2 6805 INSTRUCTION SET D-1 + D.2.1 Control Instructions D-2 + D.2.2 Bit Manipulation Instructions D-2 + D.2.3 Branch Instructions D-2 + D.2.4 Read-Modify-Write Instructions D-3 + D.2.5 Register\Memory Instructions D-3 + + + Page iii + + + + D.2.6 Jump and Jump to Subroutine Instructions D-4 + + APPENDIX E AS68HC08 ASSEMBLER E-1 + E.1 68HC08 REGISTER SET E-1 + E.2 68HC08 INSTRUCTION SET E-1 + E.2.1 Control Instructions E-2 + E.2.2 Bit Manipulation Instructions E-2 + E.2.3 Branch Instructions E-3 + E.2.4 Complex Branch Instructions E-3 + E.2.5 Read-Modify-Write Instructions E-4 + E.2.6 Register\Memory Instructions E-5 + E.2.7 Double Operand Move Instruction E-5 + E.2.8 16-Bit Index Register Instructions E-5 + E.2.9 Jump and Jump to Subroutine Instructions E-5 + + APPENDIX F AS6809 ASSEMBLER F-1 + F.1 6809 REGISTER SET F-1 + F.2 6809 INSTRUCTION SET F-1 + F.2.1 Inherent Instructions F-3 + F.2.2 Short Branch Instructions F-3 + F.2.3 Long Branch Instructions F-3 + F.2.4 Single Operand Instructions F-4 + F.2.5 Double Operand Instructions F-5 + F.2.6 D-register Instructions F-5 + F.2.7 Index/Stack Register Instructions F-5 + F.2.8 Jump and Jump to Subroutine Instructions F-6 + F.2.9 Register - Register Instructions F-6 + F.2.10 Condition Code Register Instructions F-6 + F.2.11 6800 Compatibility Instructions F-6 + + APPENDIX G AS6811 ASSEMBLER G-1 + G.1 6811 REGISTER SET G-1 + G.2 6811 INSTRUCTION SET G-1 + G.2.1 Inherent Instructions G-2 + G.2.2 Branch Instructions G-2 + G.2.3 Single Operand Instructions G-3 + G.2.4 Double Operand Instructions G-4 + G.2.5 Bit Manupulation Instructions G-4 + G.2.6 Jump and Jump to Subroutine Instructions G-5 + G.2.7 Long Register Instructions G-5 + + APPENDIX H AS6816 ASSEMBLER H-1 + H.1 6816 REGISTER SET H-1 + H.2 6816 INSTRUCTION SET H-1 + H.2.1 Inherent Instructions H-2 + H.2.2 Push/Pull Multiple Register Instructions H-3 + H.2.3 Short Branch Instructions H-3 + H.2.4 Long Branch Instructions H-3 + H.2.5 Bit Manipulation Instructions H-3 + H.2.6 Single Operand Instructions H-4 + H.2.7 Double Operand Instructions H-5 + H.2.8 Index/Stack Register Instructions H-5 + + + Page iv + + + + H.2.9 Jump and Jump to Subroutine Instructions H-6 + H.2.10 Condition Code Register Instructions H-6 + H.2.11 Multiply and Accumulate Instructions H-6 + + APPENDIX I ASH8 ASSEMBLER I-1 + I.1 H8/3XX REGISTER SET I-1 + I.2 H8/3XX INSTRUCTION SET I-1 + I.2.1 Inherent Instructions I-2 + I.2.2 Branch Instructions I-2 + I.2.3 Single Operand Instructions I-3 + I.2.4 Double Operand Instructions I-4 + I.2.5 Mov Instructions I-5 + I.2.6 Bit Manipulation Instructions I-6 + I.2.7 Extended Bit Manipulation Instructions I-7 + I.2.8 Condition Code Instructions I-7 + I.2.9 Other Instructions I-8 + I.2.10 Jump and Jump to Subroutine Instructions I-8 + + APPENDIX J AS8085 ASSEMBLER J-1 + J.1 8085 REGISTER SET J-1 + J.2 8085 INSTRUCTION SET J-1 + J.2.1 Inherent Instructions J-2 + J.2.2 Register/Memory/Immediate Instructions J-2 + J.2.3 Call and Return Instructions J-2 + J.2.4 Jump Instructions J-2 + J.2.5 Input/Output/Reset Instructions J-3 + J.2.6 Move Instructions J-3 + J.2.7 Other Instructions J-3 + + APPENDIX K ASZ80 ASSEMBLER K-1 + K.1 .hd64 DIRECTIVE K-1 + K.2 Z80 REGISTER SET AND CONDITIONS K-1 + K.3 Z80 INSTRUCTION SET K-2 + K.3.1 Inherent Instructions K-3 + K.3.2 Implicit Operand Instructions K-3 + K.3.3 Load Instruction K-4 + K.3.4 Call/Return Instructions K-4 + K.3.5 Jump and Jump to Subroutine Instructions K-4 + K.3.6 Bit Manipulation Instructions K-5 + K.3.7 Interrupt Mode and Reset Instructions K-5 + K.3.8 Input and Output Instructions K-5 + K.3.9 Register Pair Instructions K-5 + K.3.10 HD64180 Specific Instructions K-6 + + APPENDIX L AS6500 ASSEMBLER L-1 + L.1 ACKNOWLEDGMENT L-1 + L.2 6500 REGISTER SET L-2 + L.3 6500 INSTRUCTION SET L-2 + L.3.1 Processor Specific Directives L-3 + L.3.2 65xx Core Inherent Instructions L-3 + L.3.3 65xx Core Branch Instructions L-3 + L.3.4 65xx Core Single Operand Instructions L-3 + + + Page v + + + + L.3.5 65xx Core Double Operand Instructions L-4 + L.3.6 65xx Core Jump and Jump to Subroutine + Instructions L-4 + L.3.7 65xx Core Miscellaneous X and Y Register + Instructions L-4 + L.3.8 65F11 and 65F12 Specific Instructions L-5 + L.3.9 65C00/21 and 65C29 Specific Instructions L-5 + L.3.10 65C02, 65C102, and 65C112 Specific + Instructions L-6 + + + Page vi + + + + ASxxxx Cross Assemblers, Version 1.7 + + Submitted by: + Alan R. Baldwin, + Physics Dept. + Kent State University + Kent, Ohio 44242 + + Operating System: TSX+, RT-11, PDOS, MS/DOS, Windows 3.x + or other supporting K&R C. + + Source Langauge: C + + The ASxxxx Cross Assembler and Linker package (V1.7 November + 1995) contains cross assemblers for the 6800(6802/6808), + 6801(hd6303), 6804, 6805, 68HC08, 6809, 6811, 68HC16, + 8085(8080), z80(hd64180), H8/3xx, and 6500 series microproces- + sors. Complete source code is provided with the assem- + bler/linker submission. + + + + + + The ASxxxx Cross Assembler and Linker package is available + from Kent State University at shop-pdp.kent.edu by "anonymous" + FTP. + + + Page vii + + + + + + + + + P R E F A C E + + + + + + The ASxxxx assemblers were written following the style of + several cross assemblers found in the Digital Equipment Corpora- + tion Users Society (DECUS) distribution of the C programming + language. The DECUS code was provided with no documentation as + to the input syntax or the output format. Study of the code + revealed that the unknown author of the code had attempted to + formulate an assembler with attributes similiar to those of the + PDP-11 MACRO assembler (without macro's). The incomplete code + from the DECUS C distribution has been largely rewritten, only + the program structure, and C source file organization remains + relatively unchanged. However, I wish to thank the author for + his contribution to this set of assemblers. + + The ASLINK program was written as a companion to the ASxxxx + assemblers, its design and implementation was not derived from + any other work. + + I would greatly appreciate receiving the details of any + changes, additions, or errors pertaining to these programs and + will attempt to incorporate any fixes or generally useful + changes in a future update to these programs. + + + + Alan R. Baldwin + Kent State University + Physics Department + Kent, Ohio 44242 + + + baldwin@shop-pdp.kent.edu + tel: (216) 672 2531 + fax: (216) 672 2959 + + + + E N D U S E R L I C E N S E A G R E E M E N T + + + + + + This program is free software; you can redistribute it and/or + modify it under the terms of the GNU General Public License as + published by the Free Software Foundation; either version 3, or + (at your option) any later version. + + This program is distributed in the hope that it will be + useful, but WITHOUT ANY WARRANTY; without even the implied + warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU General Public License for more details. + + You should have received a copy of the GNU General Public + License along with this program. If not, see + . + + + + + + + + + + + + + + + CHAPTER 1 + + THE ASSEMBLER + + + + + + 1.1 THE ASXXXX ASSEMBLERS + + + The ASxxxx assemblers are a series of microprocessor assem- + blers written in the C programming language. Each assembler has + a device specific section which includes: + + 1. device description, byte order, and file extension in- + formation + + 2. a table of the assembler general directives, special + device directives, assembler mnemonics and associated + operation codes + + 3. machine specific code for processing the device mnemon- + ics, addressing modes, and special directives + + The device specific information is detailed in the appendices. + + The assemblers have a common device independent section which + handles the details of file input/output, symbol table genera- + tion, program/data areas, expression analysis, and assembler + directive processing. + + The assemblers provide the following features: + + 1. Command string control of assembly functions + + 2. Alphabetized, formatted symbol table listing + + 3. Relocatable object modules + + 4. Global symbols for linking object modules + + 5. Conditional assembly directives + + + + THE ASSEMBLER PAGE 1-2 + THE ASXXXX ASSEMBLERS + + + 6. Program sectioning directives + + + ASxxxx assembles one or more source files into a single relo- + catable ascii object file. The output of the ASxxxx assemblers + consists of an ascii relocatable object file(*.rel), an assembly + listing file(*.lst), and a symbol file(*.sym). + + + 1.1.1 Assembly Pass 1 + + + During pass 1, ASxxxx opens all source files and performs a + rudimenatry assembly of each source statement. During this pro- + cess all symbol tables are built, program sections defined, and + number of bytes for each assembled source line is estimated. + + At the end of pass 1 all undefined symbols may be made global + (external) using the ASxxxx switch -g, otherwise undefined sym- + bols will be flagged as errors during succeeding passes. + + + 1.1.2 Assembly Pass 2 + + + During pass 2 the ASxxxx assembler resolves forward refer- + ences and determines the number of bytes for each assembled + line. The number of bytes used by a particular assembler in- + struction may depend upon the addressing mode, whether the in- + struction allows multiple forms based upon the relative distance + to the addressed location, or other factors. Pass 2 resolves + these cases and determines the address of all symbols. + + + 1.1.3 Assembly Pass 3 + + + Pass 3 by the assembler generates the listing file, the relo- + catable output file, and the symbol tables. Also during pass 3 + the errors will be reported. + + The relocatable object file is an ascii file containing sym- + bol references and definitions, program area definitions, and + the relocatable assembled code, the linker ASLINK will use this + information to generate an absolute load file (Motorola or Intel + formats). + + + + + THE ASSEMBLER PAGE 1-3 + SOURCE PROGRAM FORMAT + + + 1.2 SOURCE PROGRAM FORMAT + + + + 1.2.1 Statement Format + + + A source program is composed of assembly-language statements. + Each statement must be completed on one line. A line may con- + tain a maximum of 128 characters, longer lines are truncated and + lost. + + An ASxxxx assembler statement may have as many as four + fields. These fields are identified by their order within the + statement and/or by separating characters between fields. The + general format of the ASxxxx statement is: + + [label:] Operator Operand [;Comment(s)] + + The label and comment fields are optional. The operator and + operand fields are interdependent. The operator field may be an + assembler directive or an assembly mnemonic. The operand field + may be optional or required as defined in the context of the + operator. + + ASxxxx interprets and processes source statements one at a + time. Each statement causes a particular operation to be per- + formed. + + + 1.2.1.1 Label Field - + + A label is a user-defined symbol which is assigned the value + of the current location counter and entered into the user de- + fined symbol table. The current location counter is used by + ASxxxx to assign memory addresses to the source program state- + ments as they are encountered during the assembly process. Thus + a label is a means of symbolically referring to a specific + statement. + + When a program section is absolute, the value of the current + location counter is absolute; its value references an absolute + memory address. Similarly, when a program section is relocat- + able, the value of the current location counter is relocatable. + A relocation bias calculated at link time is added to the ap- + parent value of the current location counter to establish its + effective absolute address at execution time. (The user can + also force the linker to relocate sections defined as absolute. + This may be required under special circumstances.) + + If present, a label must be the first field in a source + statement and must be terminated by a colon (:). For example, + + + THE ASSEMBLER PAGE 1-4 + SOURCE PROGRAM FORMAT + + + if the value of the current location counter is absolute + 01F0(H), the statement: + + abcd: nop + + assigns the value 01F0(H) to the label abcd. If the location + counter value were relocatable, the final value of abcd would be + 01F0(H)+K, where K represents the relocation bias of the program + section, as calculated by the linker at link time. + + More than one label may appear within a single label field. + Each label so specified is assigned the same address value. For + example, if the value of the current location counter is + 1FF0(H), the multiple labels in the following statement are each + assigned the value 1FF0(H): + + abcd: aq: $abc: nop + + Multiple labels may also appear on successive lines. For ex- + ample, the statements + + abcd: + aq: + $abc: nop + + likewise cause the same value to be assigned to all three la- + bels. + + A double colon (::) defines the label as a global symbol. + For example, the statement + + abcd:: nop + + establishes the label abcd as a global symbol. The distinguish- + ing attribute of a global symbol is that it can be referenced + from within an object module other than the module in which the + symbol is defined. References to this label in other modules + are resolved when the modules are linked as a composite execut- + able image. + + The legal characters for defining labels are: + + A through Z + a through z + 0 through 9 + . (Period) + $ (Dollar sign) + _ (underscore) + + A label may be any length, however, only the first eight (8) + characters are significant and, therefore must be unique among + all labels in the source program (not necessarily among + + + THE ASSEMBLER PAGE 1-5 + SOURCE PROGRAM FORMAT + + + separately compiled modules). An error code(s) (m or p) will be + generated in the assembly listing if the first eight characters + in two or more labels are the same. The m code is caused by the + redeclaration of the symbol or its reference by another state- + ment. The p code is generated because the symbols location is + changing on each pass through the source file. + + The label must not start with the characters 0-9, as this + designates a local symbol with special attributes described in a + later section. + + The label must not start with the sequence $$, as this + represents the temporary radix 16 for constants. + + + 1.2.1.2 Operator Field - + + The operator field specifies the action to be performed. It + may consist of an instruction mnemonic (op code) or an assembler + directive. + + When the operator is an instruction mnemonic, a machine in- + struction is generated and the assembler evaluates the addresses + of the operands which follow. When the operator is a directive + ASxxxx performs certain control actions or processing operations + during assembly of the source program. + + Leading and trailing spaces or tabs in the operator field + have no significance; such characters serve only to separate + the operator field from the preceeding and following fields. + + An operator is terminated by a space, tab or end of line. + + + 1.2.1.3 Operand Field - + + When the operator is an instruction mnemonic (op code), the + operand field contains program variables that are to be + evaluated/manipulated by the operator. + + Operands may be expressions or symbols, depending on the + operator. Multiple expressions used in the operand fields may + be separated by a comma. An operand should be preceeded by an + operator field; if it is not, the statement will give an error + (q or o). All operands following instruction mnemonics are + treated as expressions. + + The operand field is terminated by a semicolon when the field + is followed by a comment. For example, in the following + statement: + + label: lda abcd,x ;Comment field + + + THE ASSEMBLER PAGE 1-6 + SOURCE PROGRAM FORMAT + + + + the tab between lda and abcd terminates the operator field and + defines the beginning of the operand field; a comma separates + the operands abcd and x; and a semicolon terminates the operand + field and defines the beginning of the comment field. When no + comment field follows, the operand field is terminated by the + end of the source line. + + + 1.2.1.4 Comment Field - + + The comment field begins with a semicolon and extends through + the end of the line. This field is optional and may contain any + 7-bit ascii character except null. + + Comments do not affect assembly processing or program execu- + tion. + + + 1.3 SYMBOLS AND EXPRESSIONS + + + This section describes the generic components of the ASxxxx + assemblers: the character set, the conventions observed in con- + structing symbols, and the use of numbers, operators, and ex- + pressions. + + + 1.3.1 Character Set + + + The following characters are legal in ASxxxx source programs: + + 1. The letters A through Z. Both upper- and lower-case + letters are acceptable. The assemblers are case sensi- + tive, i.e. ABCD and abcd are different symbols. (The + assemblers can be made case insensitive by recompiling + with the appropriate switches.) + + 2. The digits 0 through 9 + + 3. The characters . (period), $ (dollar sign), and _ (un- + derscore). + + 4. The special characters listed in Tables 1 through 6. + + + Tables 1 through 6 describe the various ASxxxx label and + field terminators, assignment operators, operand separators, as- + sembly, unary, binary, and radix operators. + + + THE ASSEMBLER PAGE 1-7 + SYMBOLS AND EXPRESSIONS + + + Table 1 Label Terminators and Assignment Operators + ---------------------------------------------------------------- + + : Colon Label terminator. + + :: Double colon Label Terminator; defines the + label as a global label. + + = Equal sign Direct assignment operator. + + == Double equal Direct assignment operator; + sign defines the symbol as a global + symbol. + + ---------------------------------------------------------------- + + + + + + Table 2 Field Terminators and Operand Separators + ---------------------------------------------------------------- + + Tab Item or field terminator. + + Space Item or field terminator. + + , Comma Operand field separator. + + ; Semicolon Comment field indicator. + + ---------------------------------------------------------------- + + + + + + Table 3 Assembler Operators + ---------------------------------------------------------------- + + # Number sign Immediate expression indicator. + + . Period Current location counter. + + ( Left parenthesis Expression delimiter. + + ) Right parenthesis Expression delimeter. + + ---------------------------------------------------------------- + + + THE ASSEMBLER PAGE 1-8 + SYMBOLS AND EXPRESSIONS + + + + + + + + Table 4 Unary Operators + ---------------------------------------------------------------- + + < Left bracket Right bracket >FEDC Produces the upper byte + value of the expression. + (FE) + + + Plus sign +A Positive value of A + + - Minus sign -A Produces the negative + (2's complement) of A. + + ~ Tilde ~A Produces the 1's comple- + ment of A. + + ' Single quote 'D Produces the value of + the character D. + + " Double quote "AB Produces the double byte + value for AB. + + \ Backslash '\n Unix style characters + \b, \f, \n, \r, \t + or '\001 or octal byte values. + + ---------------------------------------------------------------- + + + + + + + + THE ASSEMBLER PAGE 1-9 + SYMBOLS AND EXPRESSIONS + + + Table 5 Binary Operators + ---------------------------------------------------------------- + + << Double 0800 << 4 Produces the 4 bit + Left bracket left-shifted value of + 0800. (8000) + + >> Double 0800 >> 4 Produces the 4 bit + Right bracket right-shifted value of + 0800. (0080) + + + Plus sign A + B Arithmetic Addition + operator. + + - Minus sign A - B Arithmetic Subtraction + operator. + + * Asterisk A * B Arithmetic Multiplica- + tion operator. (signed + 16-bit) + + / Slash A / B Arithmetic Division + operator. (signed + 16-bit quotient) + + & Ampersand A & B Logical AND operator. + + | Bar A | B Logical OR operator. + + % Percent sign A % B Modulus operator. + (16-bit value) + + ^ Up arrow or A ^ B EXCLUSIVE OR operator. + circumflex + + ---------------------------------------------------------------- + + + + + + + + THE ASSEMBLER PAGE 1-10 + SYMBOLS AND EXPRESSIONS + + + Table 6 Temporary Radix Operators + ---------------------------------------------------------------- + + $%, 0b, 0B Binary radix operator. + + $&, 0o, 0O, 0q, 0Q Octal radix operator. + + $#, 0d, 0D Decimal radix operator. + + $$, 0h, 0H, 0x, 0X Hexidecimal radix operator. + + + Potential ambiguities arising from the use of 0b and 0d + as temporary radix operators may be circumvented by pre- + ceding all non-prefixed hexidecimal numbers with 00. + Leading 0's are required in any case where the first + hexidecimal digit is abcdef as the assembler will treat + the letter sequence as a label. + + ---------------------------------------------------------------- + + + + + + + + 1.3.2 User-Defined Symbols + + + User-defined symbols are those symbols that are equated to a + specific value through a direct assignment statement or appear + as labels. These symbols are added to the User Symbol Table as + they are encountered during assembly. + + The following rules govern the creation of user-defined symbols: + + 1. Symbols can be composed of alphanumeric characters, + dollar signs ($), periods (.), and underscores (_) + only. + + 2. The first character of a symbol must not be a number + (except in the case of local symbols). + + 3. The first eight characters of a symbol must be unique. + A symbol can be written with more than eight legal + characters, but the ninth and subsequent characters are + ignored. + + 4. Spaces and Tabs must not be embedded within a symbol. + + + + + THE ASSEMBLER PAGE 1-11 + SYMBOLS AND EXPRESSIONS + + + 1.3.3 Local Symbols + + + Local symbols are specially formatted symbols used as labels + within a block of coding that has been delimited as a local sym- + bol block. Local symbols are of the form n$, where n is a + decimal integer from 0 to 255, inclusive. Examples of local + symbols are: + + 1$ + 27$ + 138$ + 244$ + + The range of a local symbol block consists of those state- + ments between two normally constructed symbolic labels. Note + that a statement of the form: + + ALPHA = EXPRESSION + + is a direct assignment statement but does not create a label and + thus does not delimit the range of a local symbol block. + + Note that the range of a local symbol block may extend across + program areas. + + Local symbols provide a convenient means of generating labels + for branch instructions and other such references within local + symbol blocks. Using local symbols reduces the possibility of + symbols with multiple definitions appearing within a user pro- + gram. In addition, the use of local symbols differentiates + entry-point labels from local labels, since local labels cannot + be referenced from outside their respective local symbol blocks. + Thus, local symbols of the same name can appear in other local + symbol blocks without conflict. Local symbols require less sym- + bol table space than normal symbols. Their use is recommended. + + The use of the same local symbol within a local symbol block + will generate one or both of the m or p errors. + + + THE ASSEMBLER PAGE 1-12 + SYMBOLS AND EXPRESSIONS + + + Example of local symbols: + + a: ldx #atable ;get table address + lda #0d48 ;table length + 1$: clr ,x+ ;clear + deca + bne 1$ + + b: ldx #btable ;get table address + lda #0d48 ;table length + 1$: clr ,x+ ;clear + deca + bne 1$ + + + 1.3.4 Current Location Counter + + + The period (.) is the symbol for the current location coun- + ter. When used in the operand field of an instruction, the + period represents the address of the first byte of the + instruction: + + AS: ldx #. ;The period (.) refers to + ;the address of the ldx + ;instruction. + + When used in the operand field of an ASxxxx directive, it + represents the address of the current byte or word: + + QK = 0 + + .word 0xFFFE,.+4,QK ;The operand .+4 in the .word + ;directive represents a value + ;stored in the second of the + ;three words during assembly. + + If we assume the current value of the program counter is + 0H0200, then during assembly, ASxxxx reserves three words of + storage starting at location 0H0200. The first value, a hex- + idecimal constant FFFE, will be stored at location 0H0200. The + second value represented by .+4 will be stored at location + 0H0202, its value will be 0H0206 ( = 0H0202 + 4). The third + value defined by the symbol QK will be placed at location + 0H0204. + + At the beginning of each assembly pass, ASxxxx resets the lo- + cation counter. Normally, consecutive memory locations are as- + signed to each byte of object code generated. However, the + value of the location counter can be changed through a direct + assignment statement of the following form: + + + + THE ASSEMBLER PAGE 1-13 + SYMBOLS AND EXPRESSIONS + + + . = . + expression + + + The new location counter can only be specified relative to + the current location counter. Neglecting to specify the current + program counter along with the expression on the right side of + the assignment operator will generate the (.) error. (Absolute + program areas may use the .org directive to specify the absolute + location of the current program counter.) + + The following coding illustrates the use of the current location + counter: + + .area CODE1 (ABS) ;program area CODE1 + ;is ABSOLUTE + + .org 0H100 ;set location to + ;0H100 absolute + + num1: ldx #.+0H10 ;The label num1 has + ;the value 0H100. + ;X is loaded with + ;0H100 + 0H10 + + .org 0H130 ;location counter + ;set to 0H130 + + num2: ldy #. ;The label num2 has + ;the value 0H130. + ;Y is loaded with + ;value 0H130. + + + .area CODE2 (REL) ;program area CODE2 + ;is RELOCATABLE + + . = . + 0H20 ;Set location counter + ;to relocatable 0H20 of + ;the program section. + + num3: .word 0 ;The label num3 has + ;the value + ;of relocatable 0H20. + + . = . + 0H40 ;will reserve 0H40 + ;bytes of storage as will + .blkb 0H40 ;or + .blkw 0H20 + + The .blkb and .blkw directives are the preferred methods of + allocating space. + + + + THE ASSEMBLER PAGE 1-14 + SYMBOLS AND EXPRESSIONS + + + 1.3.5 Numbers + + + ASxxxx assumes that all numbers in the source program are to + be interpreted in decimal radix unless otherwise specified. The + .radix directive may be used to specify the default as octal, + decimal, or hexidecimal. Individual numbers can be designated + as binary, octal, decimal, or hexidecimal through the temporary + radix prefixes shown in table 6. + + Negative numbers must be preceeded by a minus sign; ASxxxx + translates such numbers into two's complement form. Positive + numbers may (but need not) be preceeded by a plus sign. + + Numbers are always considered to be absolute values, therefor + they are never relocatable. + + + 1.3.6 Terms + + + A term is a component of an expression and may be one of the + following: + + + 1. A number. + + 2. A symbol: + 1. A period (.) specified in an expression causes the + current location counter to be used. + 2. A User-defined symbol. + 3. An undefined symbol is assigned a value of zero and + inserted in the User-Defined symbol table as an un- + defined symbol. + + 3. A single quote followed by a single ascii character, or + a double quote followed by two ascii characters. + + 4. An expression enclosed in parenthesis. Any expression + so enclosed is evaluated and reduced to a single term + before the remainder of the expression in which it ap- + pears is evaluated. Parenthesis, for example, may be + used to alter the left-to-right evaluation of expres- + sions, (as in A*B+C versus A*(B+C)), or to apply a un- + ary operator to an entire expression (as in -(A+B)). + + 5. A unary operator followed by a symbol or number. + + + + + + THE ASSEMBLER PAGE 1-15 + SYMBOLS AND EXPRESSIONS + + + 1.3.7 Expressions + + + Expressions are combinations of terms joined together by + binary operators. Expressions reduce to a 16-bit value. The + evaluation of an expression includes the determination of its + attributes. A resultant expression value may be one of three + types (as described later in this section): relocatable, ab- + solute, and external. + + Expressions are evaluate with an operand hierarchy as follows: + + * / % multiplication, + division, and + modulus first. + + + - addition and + subtraction second. + + << >> left shift and + right shift third. + + ^ exclusive or fourth. + + & logical and fifth. + + | logical or last + + except that unary operators take precedence over binary + operators. + + + A missing or illegal operator terminates the expression + analysis, causing error codes (o) and/or (q) to be generated + depending upon the context of the expression itself. + + At assembly time the value of an external (global) expression + is equal to the value of the absolute part of that expression. + For example, the expression external+4, where 'external' is an + external symbol, has the value of 4. This expression, however, + when evaluated at link time takes on the resolved value of the + symbol 'external', plus 4. + + Expressions, when evaluated by ASxxxx, are one of three + types: relocatable, absolute, or external. The following dis- + tinctions are important: + + 1. An expression is relocatable if its value is fixed re- + lative to the base address of the program area in which + it appears; it will have an offset value added at link + time. Terms that contain labels defined in relocatable + program areas will have a relocatable value; + + + THE ASSEMBLER PAGE 1-16 + SYMBOLS AND EXPRESSIONS + + + similarly, a period (.) in a relocatable program area, + representing the value of the current program location + counter, will also have a relocatable value. + + 2. An expression is absolute if its value is fixed. An + expression whose terms are numbers and ascii characters + will reduce to an absolute value. A relocatable ex- + pression or term minus a relocatable term, where both + elements being evaluated belong to the same program + area, is an absolute expression. This is because every + term in a program area has the same relocation bias. + When one term is subtracted from the other the reloca- + tion bias is zero. + + 3. An expression is external (or global) if it contains a + single global reference (plus or minus an absolute ex- + pression value) that is not defined within the current + program. Thus, an external expression is only par- + tially defined following assembly and must be resolved + at link time. + + + + 1.4 GENERAL ASSEMBLER DIRECTIVES + + + An ASxxxx directive is placed in the operator field of the + source line. Only one directive is allowed per source line. + Each directive may have a blank operand field or one or more + operands. Legal operands differ with each directive. + + + 1.4.1 .module Directive + + Format: + + .module string + + The .module directive causes the string to be included in the + assemblers output file as an identifier for this particular ob- + ject module. The string may be from 1 to 8 characters in + length. Only one identifier is allowed per assembled module. + The main use of this directive is to allow the linker to report + a modules' use of undefined symbols. At link time all undefined + symbols are reported and the modules referencing them are + listed. + + + + + THE ASSEMBLER PAGE 1-17 + GENERAL ASSEMBLER DIRECTIVES + + + 1.4.2 .title Directive + + Format: + + .title string + + The .title directive provides a character string to be placed + on the second line of each page during listing. + + + 1.4.3 .sbttl Directive + + Format: + + .sbttl string + + The .sbttl directive provides a character string to be placed + on the third line of each page during listing. + + + 1.4.4 .page Directive + + Format: + + .page + + The .page directive causes a page ejection with a new heading + to be printed. The new page occurs after the next line of the + source program is processed, this allows an immediately follow- + ing .sbttl directive to appear on the new page. The .page + source line will not appear in the file listing. Paging may be + disabled by invoking the -p directive. + + + 1.4.5 .byte and .db Directives + + Format: + + .byte exp ;Stores the binary value + .db exp ;of the expression in the + ;next byte. + + .byte exp1,exp2,expn ;Stores the binary values + .db exp1,exp2,expn ;of the list of expressions + ;in successive bytes. + + where: exp, represent expressions that will be + exp1, truncated to 8-bits of data. + . Each expression will be calculated + . as a 16-bit word expression, + . the high-order byte will be truncated. + . Multiple expressions must be + + + THE ASSEMBLER PAGE 1-18 + GENERAL ASSEMBLER DIRECTIVES + + + expn separated by commas. + + The .byte or .db directives are used to generate successive + bytes of binary data in the object module. + + + 1.4.6 .word and .dw Directives + + Format: + + .word exp ;Stores the binary value + .dw exp ;of the expression in + ;the next word. + + .word exp1,exp2,expn ;Stores the binary values + .dw exp1,exp2,expn ;of the list of expressions + ;in successive words. + + where: exp, represent expressions that will occupy two + exp1, bytes of data. Each expression will be + . calculated as a 16-bit word expression. + . Multiple expressions must be + expn separated by commas. + + The .word or .dw directives are used to generate successive + words of binary data in the object module. + + + 1.4.7 .blkb, .blkw, and .ds Directives + + Format: + + .blkb N ;reserve N bytes of space + .blkw N ;reserve N words of space + .ds N ;reserve N bytes of space + + The .blkb and .ds directives reserve byte blocks in the ob- + ject module; the .blkw directive reserves word blocks. + + + 1.4.8 .ascii Directive + + Format: + + .ascii /string/ + + where: string is a string of printable ascii characters. + + / / represent the delimiting characters. These + delimiters may be any paired printing + characters, as long as the characters are not + contained within the string itself. If the + + + THE ASSEMBLER PAGE 1-19 + GENERAL ASSEMBLER DIRECTIVES + + + delimiting characters do not match, the .ascii + directive will give the (q) error. + + The .ascii directive places one binary byte of data for each + character in the string into the object module. + + + 1.4.9 .ascis Directive + + Format: + + .ascis /string/ + + where: string is a string of printable ascii characters. + + / / represent the delimiting characters. These + delimiters may be any paired printing + characters, as long as the characters are not + contained within the string itself. If the + delimiting characters do not match, the .ascis + directive will give the (q) error. + + The .ascis directive places one binary byte of data for each + character in the string into the object module. The last + character in the string will have the high order bit set. + + + 1.4.10 .asciz Directive + + Format: + + .asciz /string/ + + where: string is a string of printable ascii characters. + + / / represent the delimiting characters. These + delimiters may be any paired printing + characters, as long as the characters are not + contained within the string itself. If the + delimiting characters do not match, the .asciz + directive will give the (q) error. + + The .asciz directive places one binary byte of data for each + character in the string into the object module. Following all + the character data a zero byte is inserted to terminate the + character string. + + + + + THE ASSEMBLER PAGE 1-20 + GENERAL ASSEMBLER DIRECTIVES + + + 1.4.11 .radix Directive + + Format: + + .radix character + + where: character represents a single character specifying the + default radix to be used for succeeding numbers. + The character may be any one of the following: + + B,b Binary + + O,o Octal + Q,q + + D,d Decimal + 'blank' + + H,h Hexidecimal + X,x + + + 1.4.12 .even Directive + + Format: + + .even + + The .even directive ensures that the current location counter + contains an even boundary value by adding 1 if the current loca- + tion is odd. + + + 1.4.13 .odd Directive + + Format: + + .odd + + The .odd directive ensures that the current location counter + contains an odd boundary value by adding one if the current lo- + cation is even. + + + + + THE ASSEMBLER PAGE 1-21 + GENERAL ASSEMBLER DIRECTIVES + + + 1.4.14 .area Directive + + Format: + + .area name [(options)] + + where: name represents the symbolic name of the program sec- + tion. This name may be the same as any + user-defined symbol as the area names are in- + dependent of all symbols and labels. + + options specify the type of program or data area: + ABS absolute (automatically invokes OVR) + REL relocatable + OVR overlay + CON concatenate + PAG paged area + + + The .area directive provides a means of defining and separat- + ing multiple programming and data sections. The name is the + area label used by the assembler and the linker to collect code + from various separately assembled modules into one section. The + name may be from 1 to 8 characters in length. + + The options are specified within parenthesis and separated by + commas as shown in the following example: + + .area TEST (REL,CON) ;This section is relocatable + ;and concatenated with other + ;sections of this program area. + + .area DATA (REL,OVR) ;This section is relocatable + ;and overlays other sections + ;of this program area. + + .area SYS (ABS,OVR) ;(CON not allowed with ABS) + ;This section is defined as + ;absolute. Absolute sections + ;are always overlayed with + ;other sections of this program + ;area. + + .area PAGE (PAG) ;This is a paged section. The + ;section must be on a 256 byte + ;boundary and its length is + ;checked by the linker to be + ;no larger than 256 bytes. + ;This is useful for direct page + ;areas. + + + + THE ASSEMBLER PAGE 1-22 + GENERAL ASSEMBLER DIRECTIVES + + + The default area type is REL|CON; i.e. a relocatable sec- + tion which is concatenated with other sections of code with the + same area name. The ABS option indicates an absolute area. The + OVR and CON options indicate if program sections of the same + name will overlay each other (start at the same location) or be + concatenated with each other (appended to each other). + + Multiple invocations of the .area directive with the same + name must specify the same options or leave the options field + blank, this defaults to the previously specified options for + this program area. + The ASxxxx assemblers automatically provide two program + sections: + + '. .ABS.' This dumby section contains all absolute + symbols and their values. + + '_CODE' This is the default program/data area. + This program area is of type (REL,CON). + The ASxxxx assemblers also automatically generate two symbols + for each program area: + + 's_' This is the starting address of the pro- + gram area. + + indent -16 'l_' This is the + length of the program area. + + + 1.4.15 .org Directive + + Format: + + .org exp + + where: exp is an absolute expression that becomes the cur- + rent location counter. + + The .org directive is valid only in an absolute program section + and will give a (q) error if used in a relocatable program area. + The .org directive specifies that the current location counter + is to become the specified absolute value. + + + + + THE ASSEMBLER PAGE 1-23 + GENERAL ASSEMBLER DIRECTIVES + + + 1.4.16 .globl Directive + + Format: + + .globl sym1,sym2,...,symn + + where: sym1, represent legal symbolic names. When + sym2,... When multiple symbols are specified, + symn they are separated by commas. + + A .globl directive may also have a label field and/or a com- + ment field. + + The .globl directive is provided to define (and thus provide + linkage to) symbols not otherwise defined as global symbols + within a module. In defining global symbols the directive + .globl J is similar to: + + J == expression or J:: + + Because object modules are linked by global symbols, these + symbols are vital to a program. All internal symbols appearing + within a given program must be defined at the end of pass 1 or + they will be considered undefined. The assembly directive (-g) + can be be invoked to make all undefined symbols global at the + end of pass 1. + + + 1.4.17 .if, .else, and .endif Directives + + Format: + + .if expr + . ;} + . ;} range of true condition + . ;} + .else + . ;} + . ;} range of false condition + . ;} + .endif + + The conditional assembly directives allow you to include or + exclude blocks of source code during the assembly process, based + on the evaluation of the condition test. + + The range of true condition will be processed if the expres- + sion 'expr' is not zero (i.e. true) and the range of false con- + dition will be processed if the expression 'expr' is zero (i.e + false). The range of true condition is optional as is the .else + directive and the range of false condition. The following are + all valid .if/.else/.endif constructions: + + + THE ASSEMBLER PAGE 1-24 + GENERAL ASSEMBLER DIRECTIVES + + + + .if A-4 ;evaluate A-4 + .byte 1,2 ;insert bytes if A-4 is + .endif ;not zero + + .if K+3 ;evaluate K+3 + .else + .byte 3,4 ;insert bytes if K+3 + .endif ;is zero + + .if J&3 ;evaluate J masked by 3 + .byte 12 ;insert this byte if J&3 + .else ;is not zero + .byte 13 ;insert this byte if J&3 + .endif ;is zero + + + The .if/.else/.endif directives may be nested upto 10 levels. + + The .page directive is processed within a false condition + range to allow extended textual information to be incorporated + in the source program with out the need to use the comment + delimiter (;): + + .if 0 + + .page + This text will be bypassed during assembly + but appear in the listing file. + . + . + . + + .endif + + + 1.4.18 .include Directive + + Format: + + .include string + + where: string represents a delimited string that is the file + specification of an ASxxxx source file. + + The .include directive is used to insert a source file within + the source file currently being assembled. When this directive + is encountered, an implicit .page directive is issued. When the + end of the specified source file is reached, an implicit .page + directive is issued and input continues from the previous source + file. The maximum nesting level of source files specified by a + .include directive is five. + + + THE ASSEMBLER PAGE 1-25 + GENERAL ASSEMBLER DIRECTIVES + + + The total number of separately specified .include files is + unlimited as each .include file is opened and then closed during + each pass made by the assembler. + + + 1.4.19 .setdp Directive + + Format: + + .setdp [base [,area]] + + The set direct page directive has a common format in all the + AS68xx assemblers. The .setdp directive is used to inform the + assembler of the current direct page region and the offset ad- + dress within the selected area. The normal invocation methods + are: + + .area DIRECT (PAG) + .setdp + + or + + .setdp 0,DIRECT + + for all the 68xx microprocessors (the 6804 has only the paged + ram area). The commands specify that the direct page is in area + DIRECT and its offset address is 0 (the only valid value for all + but the 6809 microprocessor). Be sure to place the DIRECT area + at address 0 during linking. When the base address and area are + not specified, then zero and the current area are the defaults. + If a .setdp directive is not issued the assembler defaults the + direct page to the area "_CODE" at offset 0. + + The assembler verifies that any local variable used in a + direct variable reference is located in this area. Local vari- + able and constant value direct access addresses are checked to + be within the address range from 0 to 255. + + External direct references are assumed by the assembler to be + in the correct area and have valid offsets. The linker will + check all direct page relocations to verify that they are within + the correct area. + + The 6809 microprocessor allows the selection of the direct + page to be on any 256 byte boundary by loading the appropriate + value into the dp register. Typically one would like to select + the page boundary at link time, one method follows: + + + THE ASSEMBLER PAGE 1-26 + GENERAL ASSEMBLER DIRECTIVES + + + .area DIRECT (PAG) ; define the direct page + .setdp + . + . + . + .area PROGRAM + . + ldd #DIRECT ; load the direct page register + tfr a,dp ; for access to the direct page + + At link time specify the base and global equates to locate the + direct page: + + -b DIRECT = 0x1000 + -g DIRECT = 0x1000 + + Both the area address and offset value must be specified (area + and variable names are independent). The linker will verify + that the relocated direct page accesses are within the direct + page. + The preceeding sequence could be repeated for multiple paged + areas, however an alternate method is to define a non-paged area + and use the .setdp directive to specify the offset value: + + .area DIRECT ; define non-paged area + . + . + . + .area PROGRAM + . + .setdp 0,DIRECT ; direct page area + ldd #DIRECT ; load the direct page register + tfr a,dp ; for access to the direct page + . + . + .setdp 0x100,DIRECT ; direct page area + ldd #DIRECT+0x100 ; load the direct page register + tfr a,dp ; for access to the direct page + + The linker will verify that subsequent direct page references + are in the specified area and offset address range. It is the + programmers responsibility to load the dp register with the cor- + rect page segment corresponding to the .setdp base address + specified. + + For those cases where a single piece of code must access a + defined data structure within a direct page and there are many + pages, define a dumby direct page linked at address 0. This + dumby page is used only to define the variable labels. Then + load the dp register with the real base address but donot use a + .setdp directive. This method is equivalent to indexed + + + THE ASSEMBLER PAGE 1-27 + GENERAL ASSEMBLER DIRECTIVES + + + addressing, where the dp register is the index register and the + direct addressing is the offset. + + + 1.5 INVOKING ASXXXX + + + The ASxxxx assemblers are command line oriented. After the + assembler is started, enter the option(s) and file(s) to assem- + ble following the 'argv:' prompt: + + argv: [-dqxjgalcposf] file1 [file2 file3 ... file6] + + The options are: + + d decimal listing + q octal listing + x hex listing (default) + + The listing radix affects the + .lst, .rel, and .sym files. + + j add line number and debug information to file + g undefined symbols made global + a all user symbols made global + + l create list output file1.lst + o create object output file1.rel + s create symbol output file1.sym + + c generate sdcdb debug information + + p disable listing pagination + + relocatable reference flagging: + + f by ` in the listing file + ff by mode in the listing file + + asx8051 specific command line option: + -I Add the named directory to the include file + search path. This option may be used more than once. + Directories are searched in the order given. + + The file name for the .lst, .rel, and .sym files is the first + file name specified in the command line. All output files are + ascii text files which may be edited, copied, etc. The output + files are the concatenation of all the input files, if files are + to be assembled independently invoke the assembler for each + file. + + The .rel file contains a radix directive so that the linker + will use the proper conversion for this file. Linked files may + have different radices. + + If the list (l) option is specified without the symbol table + (s) option, the symbol table is placed at the end of the listing + file. + + ASXXXX assembles supported by and distributed with SDCC are: + asx8051 (Intel 8051) + as-z80 (Zilog Z80 / Hitachi HD64180) + as-gbz80 (GameBoy Z80-like CPU) + as-hc08 (Motorola 68HC08) + + + THE ASSEMBLER PAGE 1-28 + ERRORS + + + 1.6 ERRORS + + + The ASxxxx assemblers provide limited diagnostic error codes + during the assembly process, these errors will be noted in the + listing file and printed on the stderr device. + + The assembler reports the errors on the stderr device as + + ?ASxxxx-Error-<*> in line nnn of filename + + where * is the error code, nnn is the line number, and filename + is the source/include file. + + The errors are: + + (.) This error is caused by an absolute direct assign- + ment of the current location counter + . = expression (incorrect) + rather than the correct + . = . + expression + + (a) Indicates a machine specific addressing or address- + ing mode error. + + (b) Indicates a direct page boundary error. + + (d) Indicates a direct page addressing error. + + (i) Caused by an .include file error or an .if/.endif + mismatch. + + (m) Multiple definitions of the same label, multiple + .module directives, or multiple conflicting attri- + butes in an .area directive. + + (o) Directive or mnemonic error or the use of the .org + directive in a relocatable area. + + (p) Phase error: label location changing between passes + 2 and 3. Normally caused by having more than one + level of forward referencing. + + (q) Questionable syntax: missing or improper operators, + terminators, or delimiters. + + (r) Relocation error: logic operation attempted on a + relocatable term, addition of two relocatable terms, + subtraction of two relocatable terms not within the + same programming area or external symbols. + + (u) Undefined symbol encountered during assembly. + + + THE ASSEMBLER PAGE 1-29 + LISTING FILE + + + 1.7 LISTING FILE + + + The (-l) option produces an ascii output listing file. Each + page of output contains a four line header: + + + 1. The ASxxxx program name and page number + + 2. Title from a .title directive (if any) + + 3. Subtitle from a .sbttl directive (if any) + + 4. Blank line + + + + Each succeeding line contains five fields: + + + 1. Error field (first three characters of line) + + 2. Current location counter + + 3. Generated code in byte format + + 4. Source text line number + + 5. Source text + + + The error field may contain upto 2 error flags indicating any + errors encountered while assembling this line of source code. + + The current location counter field displays the 16-bit pro- + gram position. This field will be in the selected radix. + + The generated code follows the program location. The listing + radix determines the number of bytes that will be displayed in + this field. Hexidecimal listing allows six bytes of data within + the field, decimal and octal allow four bytes within the field. + If more than one field of data is generated from the assembly of + a single line of source code, then the data field is repeated on + successive lines. + + The source text line number is printed in decimal and is fol- + lowed by the source text. + + Two special cases will disable the listing of a line of + source text: + + + + THE ASSEMBLER PAGE 1-30 + LISTING FILE + + + 1. Source line with a .page directive is never listed. + + 2. Source line with a .include file directive is not + listed unless the .include file cannot be opened. + + + Two data field options are available to flag those bytes + which will be relocated by the linker. If the -f option is + specified then each byte to be relocated will be preceeded by + the '`' character. If the -ff option is specified then each + byte to be relocated will be preceeded by one of the following + characters: + + 1. * paged relocation + + 2. u low byte of unsigned word or unsigned byte + + 3. v high byte of unsigned word + + 4. p PCR low byte of word relocation or PCR byte + + 5. q PCR high byte of word relocation + + 6. r low byte relocation or byte relocation + + 7. s high byte relocation + + + + 1.8 SYMBOL TABLE FILE + + + The symbol table has two parts: + + 1. The alphabetically sorted list of symbols and/or labels + defined or referenced in the source program. + + 2. A list of the program areas defined during assembly of + the source program. + + + The sorted list of symbols and/or labels contains the follow- + ing information: + + 1. Program area number (none if absolute value or exter- + nal) + + 2. The symbol or label + + 3. Directly assigned symbol is denoted with an (=) sign + + + + THE ASSEMBLER PAGE 1-31 + SYMBOL TABLE FILE + + + 4. The value of a symbol, location of a label relative to + the program area base address (=0), or a **** indicat- + ing the symbol or label is undefined. + + 5. The characters: G - global, R - relocatable, and X - + external. + + + The list of program areas provides the correspondence between + the program area numbers and the defined program areas, the size + of the program areas, and the area flags (attributes). + + + 1.9 OBJECT FILE + + + The object file is an ascii file containing the information + needed by the linker to bind multiple object modules into a com- + plete loadable memory image. The object module contains the + following designators: + + [XDQ][HL] + X Hexidecimal radix + D Decimal radix + Q Octal radix + + H Most significant byte first + L Least significant byte first + + H Header + M Module + A Area + S Symbol + T Object code + R Relocation information + P Paging information + + Refer to the linker for a detailed description of each of the + designators and the format of the information contained in the + object file. + + + + + + + + + + + + + + + CHAPTER 2 + + THE LINKER + + + + + + 2.1 ASLINK RELOCATING LINKER + + + ASLINK is the companion linker for the ASxxxx assemblers. + + The program ASLINK is a general relocating linker performing + the following functions: + + 1. Bind multiple object modules into a single memory image + + 2. Resolve inter-module symbol references + + 3. Combine code belonging to the same area from multiple + object files into a single contiguous memory region + + 4. Search and import object module libraries for undefined + global variables + + 5. Perform byte and word program counter relative + (pc or pcr) addressing calculations + + 6. Define absolute symbol values at link time + + 7. Define absolute area base address values at link time + + 8. Produce Intel Hex or Motorola S19 output file + + 9. Produce a map of the linked memory image + + 10. Produce an updated listing file with the relocated ad- + dresses and data + + + + + + THE LINKER PAGE 2-2 + INVOKING ASLINK + + + 2.2 INVOKING ASLINK + + + The linker may run in the command line mode or command file + modes. The allowed startup linker commands are: + + -c/-f command line / command file modes + + -p/-n enable/disable echo file.lnk input to stdout + + If command line mode is selected, all linker commands come + from stdin, if the command file mode is selected the commands + are input from the specified file (extension must be .lnk). + + The linker is started via + + ASLINK -(cfpn) + + After invoking the linker the valid options are: + + 1. -i/-s Intel Hex (file.ihx) or Motorola S19 (file.s19) + image output file. + + 2. -m Generate a map file (file.map). This file con- + tains a list of the symbols (by area) with absolute ad- + dresses, sizes of linked areas, and other linking + information. + + 3. -u Generate an updated listing file (file.rst) + derived from the relocated addresses and data from the + linker + + 4. -xdq Specifies the number radix for the map file + (Hexidecimal, Decimal, or Octal). + + 5. fileN Files to be linked. Files may be on the same + line as the above options or on a separate line(s) one + file per line or multiple files separated by spaces or + tabs. + + 6. -b area = expression (one definition per line) + This specifies an area base address where the expres- + sion may contain constants and/or defined symbols from + the linked files. + + 7. -g symbol = expression (one definition per line) + This specifies the value for the symbol where the ex- + pression may contain constants and/or defined symbols + from the linked files. + + 8. -k library directory path + (one definition per line) This specifies one possible + + + + THE LINKER PAGE 2-3 + INVOKING ASLINK + + + path to an object library. More than one path is al- + lowed. + + 9. -l library file specification + (one definition per line) This specifies a possible + library file. More than one file is allowed. + + 10. -e or null line, terminates input to the linker. + + ASLINK linkers supported by and distributed with SDCC are: + aslink (Intel 8051) + link-z90 (Zilog Z80 / Hitachi HD64180) + link-gbz80 (GameBoy Z80-like CPU) + link-hc08 (Motorola 68HC08) + + aslink (Intel 8051) specific options: + + Output: + -j Produce NoICE debug as file[NOI] + -z Produce SDCdb debug as file[cdb] + -u Update listing file(s) with link data as file(s)[.RST] + Miscellaneous: + -a [iram-size] Check for internal RAM overflow + -v [xram-size] Check for external RAM overflow + -w [code-size] Check for code overflow + -y Generate memory usage summary file[mem] + -Y Pack internal ram + -A [stack-size] Allocate space for stack + + + link-z80 (Zilog Z80 / Hitachi HD64180) specific options: + + Map format: + -j no$gmb symbol file generated as file[SYM] + Output: + -z Produce SDCdb debug as file[cdb] + -Z Gameboy image as file[GB] + List: + -u Update listing file(s) with link data as file(s)[.RST] + + + link-gbz80 (GameBoy Z80-like CPU) specific options: + + Relocation: + -yo Number of rom banks (default: 2) + -ya Number of ram banks (default: 0) + -yt MBC type (default: no MBC) + -yn Name of program (default: name of output file) + -yp# Patch one byte in the output GB file (# is: addr=byte) + Map format: + -j no$gmb symbol file generated as file[SYM] + Output: + -Z Gameboy image as file[GB] + List: + -u Update listing file(s) with link data as file(s)[.RST] + + + link-hc08 (Motorola 68HC08) specific options: + Output: + -t ELF executable as file[elf] + -j Produce NoICE debug as file[NOI] + -z Produce SDCdb debug as file[cdb] + -u Update listing file(s) with link data as file(s)[.RST] + Miscellaneous: + -a [iram-size] Check for internal RAM overflow + -v [xram-size] Check for external RAM overflow + -w [code-size] Check for code overflow + + + + 2.3 LIBRARY PATH(S) AND FILE(S) + + + The process of resolving undefined symbols after scanning the + input object files includes the scanning of object module + libraries. The linker will search through all combinations of + the library path specifications (input by the -k option) and the + library file specifications (input by the -l option) that lead + to an existing library file. Each library file contains a list + (one file per line) of modules included in this particular + library. Each existing object module is scanned for a match to + the undefined symbol. The first module containing the symbol is + then linked with the previous modules to resolve the symbol de- + finition. The library object modules are rescanned until no + more symbols can be resolved. The scanning algorithm allows + resolution of back references. No errors are reported for non + existant library files or object modules. + + The library file specification may be formed in one of two + ways: + + 1. If the library file contained an absolute path/file + specification then this is the object module's + path/file. + (i.e. C:\...) + + 2. If the library file contains a relative path/file + specification then the concatenation of the path and + this file specification becomes the object module's + path/file. + (i.e. \...) + + + As an example, assume there exists a library file termio.lib + in the syslib directory specifying the following object modules: + + \6809\io_disk first object module + d:\special\io_comm second object module + + and the following parameters were specified to the linker: + + + + THE LINKER PAGE 2-4 + LIBRARY PATH(S) AND FILE(S) + + + -k c:\iosystem\ the first path + -k c:\syslib\ the second path + + -l termio the first library file + -l io the second library file (no such file) + + The linker will attempt to use the following object modules to + resolve any undefined symbols: + + c:\syslib\6809\io_disk.rel (concatenated path/file) + d:\special\io_comm.rel (absolute path/file) + + all other path(s)/file(s) don't exist. (No errors are reported + for non existant path(s)/file(s).) + + + 2.4 ASLINK PROCESSING + + + The linker processes the files in the order they are + presented. The first pass through the input files is used to + define all program areas, the section area sizes, and symbols + defined or referenced. Undefined symbols will initiate a search + of any specified library file(s) and the importing of the module + containing the symbol definition. After the first pass the -b + (area base address) definitions, if any, are processed and the + areas linked. + + The area linking proceeds by first examining the area types + ABS, CON, REL, OVR and PAG. Absolute areas (ABS) from separate + object modules are always overlayed and have been assembled at a + specific address, these are not normally relocated (if a -b com- + mand is used on an absolute area the area will be relocated). + Relative areas (normally defined as REL|CON) have a base address + of 0x0000 as read from the object files, the -b command speci- + fies the beginning address of the area. All subsequent relative + areas will be concatenated with proceeding relative areas. + Where specific ordering is desired, the first linker input file + should have the area definitions in the desired order. At the + completion of the area linking all area addresses and lengths + have been determined. The areas of type PAG are verified to be + on a 256 byte boundary and that the length does not exceed 256 + bytes. Any errors are noted on stderr and in the map file. + + Next the global symbol definitions (-g option), if any, are + processed. The symbol definitions have been delayed until this + point because the absolute addresses of all internal symbols are + known and can be used in the expression calculations. + + Before continuing with the linking process the symbol table + is scanned to determine if any symbols have been referenced but + not defined. Undefined symbols are listed on the stderr device. + + + THE LINKER PAGE 2-5 + ASLINK PROCESSING + + + if a .module directive was included in the assembled file the + module making the reference to this undefined variable will be + printed. + + Constants defined as global in more than one module will be + flagged as multiple definitions if their values are not identi- + cal. + + After the preceeding processes are complete the linker may + output a map file (-m option). This file provides the following + information: + + 1. Global symbol values and label absolute addresses + + 2. Defined areas and there lengths + + 3. Remaining undefined symbols + + 4. List of modules linked + + 5. List of library modules linked + + 6. List of -b and -g definitions + + + + + The final step of the linking process is performed during the + second pass of the input files. As the xxx.rel files are read + the code is relocated by substituting the physical addresses for + the referenced symbols and areas and may be output in Intel or + Motorola formats. The number of files linked and symbols de- + fined/referenced is limited by the processor space available to + build the area/symbol lists. If the -u option is specified then + the listing files (file.lst) associated with the relocation + files (file.rel) are scanned and used to create a new file + (file.rst) which has all addresses and data relocated to their + final values. + + + 2.5 LINKER INPUT FORMAT + + + The linkers' input object file is an ascii file containing + the information needed by the linker to bind multiple object + modules into a complete loadable memory image. + + The object module contains the following designators: + + [XDQ][HL] + X Hexidecimal radix + D Decimal radix + + + THE LINKER PAGE 2-6 + LINKER INPUT FORMAT + + + Q Octal radix + + H Most significant byte first + L Least significant byte first + + H Header + M Module + A Area + S Symbol + T Object code + R Relocation information + P Paging information + + + 2.5.1 Object Module Format + + + The first line of an object module contains the [XDQ][HL] + format specifier (i.e. XH indicates a hexidecimal file with + most significant byte first) for the following designators. + + + 2.5.2 Header Line + + H aa areas gg global symbols + + The header line specifies the number of areas(aa) and the + number of global symbols(gg) defined or referenced in this ob- + ject module segment. + + + 2.5.3 Module Line + + M name + + The module line specifies the module name from which this + header segment was assembled. The module line will not appear + if the .module directive was not used in the source program. + + + 2.5.4 Symbol Line + + S string Defnnnn + + or + + S string Refnnnn + + The symbol line defines (Def) or references (Ref) the symbol + 'string' with the value nnnn. The defined value is relative to + the current area base address. References to constants and + external global symbols will always appear before the first area + + + THE LINKER PAGE 2-7 + LINKER INPUT FORMAT + + + definition. References to external symbols will have a value of + zero. + + + 2.5.5 Area Line + + A label size ss flags ff + + The area line defines the area label, the size (ss) of the + area in bytes, and the area flags (ff). The area flags specify + the ABS, REL, CON, OVR, and PAG parameters: + + OVR/CON (0x04/0x00 i.e. bit position 2) + + ABS/REL (0x08/0x00 i.e. bit position 3) + + PAG (0x10 i.e. bit position 4) + + + 2.5.6 T Line + + T xx xx nn nn nn nn nn ... + + The T line contains the assembled code output by the assem- + bler with xx xx being the offset address from the current area + base address and nn being the assembled instructions and data in + byte format. + + + 2.5.7 R Line + + R 0 0 nn nn n1 n2 xx xx ... + + The R line provides the relocation information to the linker. + The nn nn value is the current area index, i.e. which area the + current values were assembled. Relocation information is en- + coded in groups of 4 bytes: + + 1. n1 is the relocation mode and object format + 1. bit 0 word(0x00)/byte(0x01) + 2. bit 1 relocatable area(0x00)/symbol(0x02) + 3. bit 2 normal(0x00)/PC relative(0x04) relocation + 4. bit 3 1-byte(0x00)/2-byte(0x08) object format for + byte data + 5. bit 4 signed(0x00)/unsigned(0x10) byte data + 6. bit 5 normal(0x00)/page '0'(0x20) reference + 7. bit 6 normal(0x00)/page 'nnn'(0x40) reference + 8. bit 7 LSB byte(0x00)/MSB byte(0x80) with 2-byte + mode + + 2. n2 is a byte index into the corresponding (i.e. pre- + ceeding) T line data (i.e. a pointer to the data to be + + + THE LINKER PAGE 2-8 + LINKER INPUT FORMAT + + + updated by the relocation). The T line data may be + 1-byte or 2-byte byte data format or 2-byte word + format. + + 3. xx xx is the area/symbol index for the area/symbol be- + ing referenced. the corresponding area/symbol is found + in the header area/symbol lists. + + + The groups of 4 bytes are repeated for each item requiring relo- + cation in the preceeding T line. + + + 2.5.8 P Line + + P 0 0 nn nn n1 n2 xx xx + + The P line provides the paging information to the linker as + specified by a .setdp directive. The format of the relocation + information is identical to that of the R line. The correspond- + ing T line has the following information: + T xx xx aa aa bb bb + + Where aa aa is the area reference number which specifies the + selected page area and bb bb is the base address of the page. + bb bb will require relocation processing if the 'n1 n2 xx xx' is + specified in the P line. The linker will verify that the base + address is on a 256 byte boundary and that the page length of an + area defined with the PAG type is not larger than 256 bytes. + + The linker defaults any direct page references to the first + area defined in the input REL file. All ASxxxx assemblers will + specify the _CODE area first, making this the default page area. + + + 2.6 LINKER ERROR MESSAGES + + + The linker provides detailed error messages allowing the pro- + grammer to quickly find the errant code. As the linker com- + pletes pass 1 over the input file(s) it reports any page + boundary or page length errors as follows: + + ?ASlink-Warning-Paged Area PAGE0 Boundary Error + + and/or + + ?ASlink-Warning-Paged Area PAGE0 Length Error + + where PAGE0 is the paged area. + + + + THE LINKER PAGE 2-9 + LINKER ERROR MESSAGES + + + During Pass two the linker reads the T, R, and P lines per- + forming the necessary relocations and outputting the absolute + code. Various errors may be reported during this process + The P line processing can produce only one possible error: + + ?ASlink-Warning-Page Definition Boundary Error + file module pgarea pgoffset + PgDef t6809l t6809l PAGE0 0001 + + The error message specifies the file and module where the .setdp + direct was issued and indicates the page area and the page + offset value determined after relocation. + + + The R line processing produces various errors: + + ?ASlink-Warning-Byte PCR relocation error for symbol bra2 + file module area offset + Refby t6809l t6809l TEST 00FE + Defin tconst tconst . .ABS. 0080 + + ?ASlink-Warning-Unsigned Byte error for symbol two56 + file module area offset + Refby t6800l t6800l DIRECT 0015 + Defin tconst tconst . .ABS. 0100 + + ?ASlink-Warning-Page0 relocation error for symbol ltwo56 + file module area offset + Refby t6800l t6800l DIRECT 000D + Defin tconst tconst DIRECT 0100 + + ?ASlink-Warning-Page Mode relocation error for symbol two56 + file module area offset + Refby t6809l t6809l DIRECT 0005 + Defin tconst tconst . .ABS. 0100 + + ?ASlink-Warning-Page Mode relocation error + file module area offset + Refby t Pagetest PROGRAM 0006 + Defin t Pagetest DIRECT 0100 + + These error messages specify the file, module, area, and offset + within the area of the code referencing (Refby) and defining + (Defin) the symbol. If the symbol is defined in the same module + as the reference the linker is unable to report the symbol name. + The assembler listing file(s) should be examined at the offset + from the specified area to located the offending code. + + The errors are: + + 1. The byte PCR error is caused by exceeding the pc rela- + tive byte branch range. + + + THE LINKER PAGE 2-10 + LINKER ERROR MESSAGES + + + 2. The Unsigned byte error indicates an indexing value was + negative or larger than 255. + + 3. The Page0 error is generated if the direct page vari- + able is not in the page0 range of 0 to 255. + + 4. The page mode error is generated if the direct variable + is not within the current direct page (6809). + + + + THE LINKER Page 2-11 + INTEL HEX OUTPUT FORMAT + + + 2.7 INTEL HEX OUTPUT FORMAT + + Record Mark Field - This field signifies the start of a + record, and consists of an ascii colon + (:). + + Record Length Field - This field consists of two ascii + characters which indicate the number of + data bytes in this record. The + characters are the result of converting + the number of bytes in binary to two + ascii characters, high digit first. An + End of File record contains two ascii + zeros in this field. + + Load Address Field - This field consists of the four ascii + characters which result from converting + the the binary value of the address in + which to begin loading this record. The + order is as follows: + + High digit of high byte of address. + Low digit of high byte of address. + High digit of low byte of address. + Low digit of low byte of address. + + In an End of File record this field con- + sists of either four ascii zeros or the + program entry address. Currently the + entry address option is not supported. + + Record Type Field - This field identifies the record type, + which is either 0 for data records or 1 + for an End of File record. It consists + of two ascii characters, with the high + digit of the record type first, followed + by the low digit of the record type. + + Data Field - This field consists of the actual data, + converted to two ascii characters, high + digit first. There are no data bytes in + the End of File record. + + Checksum Field - The checksum field is the 8 bit binary + sum of the record length field, the load + address field, the record type field, + and the data field. This sum is then + negated (2's complement) and converted + to two ascii characters, high digit + first. + + + THE LINKER Page 2-12 + MOTOROLA S1-S9 OUTPUT FORMAT + + + 2.8 MOTORLA S1-S9 OUTPUT FORMAT + + Record Type Field - This field signifies the start of a + record and identifies the the record + type as follows: + + Ascii S1 - Data Record + Ascii S9 - End of File Record + + Record Length Field - This field specifies the record length + which includes the address, data, and + checksum fields. The 8 bit record + length value is converted to two ascii + characters, high digit first. + + Load Address Field - This field consists of the four ascii + characters which result from converting + the the binary value of the address in + which to begin loading this record. The + order is as follows: + + High digit of high byte of address. + Low digit of high byte of address. + High digit of low byte of address. + Low digit of low byte of address. + + In an End of File record this field con- + sists of either four ascii zeros or the + program entry address. Currently the + entry address option is not supported. + + Data Field - This field consists of the actual data, + converted to two ascii characters, high + digit first. There are no data bytes in + the End of File record. + + Checksum Field - The checksum field is the 8 bit binary + sum of the record length field, the load + address field, and the data field. This + sum is then complemented (1's comple- + ment) and converted to two ascii + characters, high digit first. + + + + + + + + + + + + + + + CHAPTER 3 + + BUILDING ASXXXX AND ASLINK + + + + + The assemblers and linker have been successfully compiled us- + ing the DECUS C (PDP-11) compiler (patch level 9) with + RT-11/TSX+, Eyring Research Institute, Inc. PDOS (680x0) C + V5.4b compiler, and Symantec C/C++ V6.1/V7.0. + + The device specific header file (i.e. m6800.h, m6801.h, + etc.) contains the DECUS C 'BUILD' directives for generating a + command file to compile, assemble, and link the necessary files + to prepare an executable image for a particular assembler. + + + 3.1 BUILDING AN ASSEMBLER + + + The building of a typical assembler (6809 for example) re- + quires the following files: + + 1. M6809.H + 2. M09EXT.C + 3. M09MCH.C + 4. M09ADR.C + 5. M09PST.C + 6. ASM.H + 7. ASMAIN.C + 8. ASLEX.C + 9. ASSYM.C + 10. ASSUBR.C + 11. ASEXPR.C + 12. ASDATA.C + 13. ASLIST.C + 14. ASOUT.C + + + The first five files are the 6809 processor dependent sec- + tions which contain the following: + + + + + BUILDING ASXXXX AND ASLINK PAGE 3-2 + BUILDING AN ASSEMBLER + + + 1. m6809.h - header file containing the machine specific + definitions of constants, variables, structures, and + types + + 2. m09ext - device description, byte order, and file ex- + tension information + + 3. m09pst - a table of the assembler general directives, + special device directives, and assembler mnemonics with + associated operation codes + + 4. m09mch / m09adr - machine specific code for processing + the device mnemonics, addressing modes, and special + directives + + + The remaining nine files provide the device independent sec- + tions which handle the details of file input/output, symbol + table generation, program/data areas, expression analysis, and + assembler directive processing. + + The assembler defaults to the not case sensitive mode. This + may be altered by changing the case sensitivity flag in asm.h to + + /* + * Case Sensitivity Flag + */ + #define CASE_SENSITIVE 1 + + The assemblers and linker should be compiled with the same + case sensitivity option. + + + 3.2 BUILDING ASLINK + + + The building of the linker requires the following files: + + 1. ASLINK.H + 2. LKMAIN.C + 3. LKLEX.C + 4. LKAREA.C + 5. LKHEAD.C + 6. LKSYM.C + 7. LKEVAL.C + 8. LKDATA.C + 9. LKLIST.C + 10. LKRLOC.C + 11. LKLIBR.C + 12. LKS19.C + 13. LKIHX.C + + + + BUILDING ASXXXX AND ASLINK PAGE 3-3 + BUILDING ASLINK + + + The linker defaults to the not case sensitive mode. This may + be altered by changing the case sensitivity flag in aslink.h to + + /* + * Case Sensitivity Flag + */ + #define CASE_SENSITIVE 1 + + The linker and assemblers should be compiled with the same + case sensitivity option. + + + + + + + + + + + + + + + APPENDIX A + + AS6800 ASSEMBLER + + + + + + A.1 6800 REGISTER SET + + The following is a list of the 6800 registers used by AS6800: + + a,b - 8-bit accumulators + x - index register + + + A.2 6800 INSTRUCTION SET + + + The following tables list all 6800/6802/6808 mnemonics recog- + nized by the AS6800 assembler. The designation [] refers to a + required addressing mode argument. The following list specifies + the format for each addressing mode supported by AS6800: + + #data immediate data + byte or word data + + *dir direct page addressing + (see .setdp directive) + 0 <= dir <= 255 + + ,x register indirect addressing + zero offset + + offset,x register indirect addressing + 0 <= offset <= 255 + + ext extended addressing + + label branch label + + The terms data, dir, offset, ext, and label may all be expres- + sions. + + + + AS6800 ASSEMBLER PAGE A-2 + 6800 INSTRUCTION SET + + + Note that not all addressing modes are valid with every in- + struction, refer to the 6800 technical data for valid modes. + + + A.2.1 Inherent Instructions + + aba cba + clc cli + clv daa + des dex + ins inx + nop rti + rts sba + sec sei + sev swi + tab tap + tba tpa + tsx txs + wai + + psha pshb + psh a psh b + pula pulb + pul a pul b + + + A.2.2 Branch Instructions + + bra label bhi label + bls label bcc label + bhs label bcs label + blo label bne label + beq label bvc label + bvs label bpl label + bmi label bge label + blt label bgt label + ble label bsr label + + + AS6800 ASSEMBLER PAGE A-3 + 6800 INSTRUCTION SET + + + A.2.3 Single Operand Instructions + + asla aslb + asl a asl b + asl [] + + asra asrb + asr a asr b + asr [] + + clra clrb + clr a clr b + clr [] + + coma comb + com a com b + com [] + + deca decb + dec a dec b + dec [] + + inca incb + inc a inc b + inc [] + + lsla lslb + lsl a lsl b + lsl [] + + lsra lsrb + lsr a lsr b + lsr [] + + nega negb + neg a neg b + neg [] + + rola rolb + rol a rol b + rol [] + + rora rorb + ror a ror b + ror [] + + tsta tstb + tst a tst b + tst [] + + + AS6800 ASSEMBLER PAGE A-4 + 6800 INSTRUCTION SET + + + A.2.4 Double Operand Instructions + + adca [] adcb [] + adc a [] adc b [] + + adda [] addb [] + add a [] add b [] + + anda [] andb [] + and a [] and b [] + + bita [] bitb [] + bit a [] bit b [] + + cmpa [] cmpb [] + cmp a [] cmp b [] + + eora [] eorb [] + eor a [] eor b [] + + ldaa [] ldab [] + lda a [] lda b [] + + oraa [] orab [] + ora a [] ora b [] + + sbca [] sbcb [] + sbc a [] sbc b [] + + staa [] stab [] + sta a [] sta b [] + + suba [] subb [] + sub a [] sub b [] + + + A.2.5 Jump and Jump to Subroutine Instructions + + jmp [] jsr [] + + + + + AS6800 ASSEMBLER PAGE A-5 + 6800 INSTRUCTION SET + + + A.2.6 Long Register Instructions + + cpx [] + lds [] sts [] + ldx [] stx [] + + + + + + + + + + + + + + + APPENDIX B + + AS6801 ASSEMBLER + + + + + + B.1 .hd6303 DIRECTIVE + + Format: + + .hd6303 + + The .hd6303 directive enables processing of the HD6303 specific + mnemonics not included in the 6801 instruction set. HD6303 + mnemonics encountered without the .hd6303 directive will be + flagged with an 'o' error. + + + B.2 6801 REGISTER SET + + The following is a list of the 6801 registers used by AS6801: + + a,b - 8-bit accumulators + d - 16-bit accumulator + x - index register + + + B.3 6801 INSTRUCTION SET + + + The following tables list all 6801/6303 mnemonics recognized + by the AS6801 assembler. The designation [] refers to a re- + quired addressing mode argument. The following list specifies + the format for each addressing mode supported by AS6801: + + #data immediate data + byte or word data + + *dir direct page addressing + (see .setdp directive) + 0 <= dir <= 255 + + + + AS6801 ASSEMBLER PAGE B-2 + 6801 INSTRUCTION SET + + + ,x register indirect addressing + zero offset + + offset,x register indirect addressing + 0 <= offset <= 255 + + ext extended addressing + + label branch label + + The terms data, dir, offset, ext, and label may all be expres- + sions. + + Note that not all addressing modes are valid with every in- + struction, refer to the 6801/6303 technical data for valid + modes. + + + B.3.1 Inherent Instructions + + aba abx + cba clc + cli clv + daa des + dex ins + inx mul + nop rti + rts sba + sec sei + sev swi + tab tap + tba tpa + tsx txs + wai + + + B.3.2 Branch Instructions + + bra label brn label + bhi label bls label + bcc label bhs label + bcs label blo label + bne label beq label + bvc label bvs label + bpl label bmi label + bge label blt label + bgt label ble label + bsr label + + + AS6801 ASSEMBLER PAGE B-3 + 6801 INSTRUCTION SET + + + B.3.3 Single Operand Instructions + + asla aslb asld + asl a asl b asl d + asl [] + + asra asrb + asr a asr b + asr [] + + clra clrb + clr a clr b + clr [] + + coma comb + com a com b + com [] + + deca decb + dec a dec b + dec [] + + eora eorb + eor a eor b + eor [] + + inca incb + inc a inc b + inc [] + + lsla lslb lsld + lsl a lsl b lsl d + lsl [] + + lsra lsrb lsrd + lsr a lsr b lsr d + lsr [] + + nega negb + neg a neg b + neg [] + + psha pshb pshx + psh a psh b psh x + + pula pulb pulx + pul a pul b pul x + + rola rolb + rol a rol b + rol [] + + + + AS6801 ASSEMBLER PAGE B-4 + 6801 INSTRUCTION SET + + + rora rorb + ror a ror b + ror [] + + tsta tstb + tst a tst b + tst [] + + + B.3.4 Double Operand Instructions + + adca [] adcb [] + adc a [] adc b [] + + adda [] addb [] addd [] + add a [] add b [] add d [] + + anda [] andb [] + and a [] and b [] + + bita [] bitb [] + bit a [] bit b [] + + cmpa [] cmpb [] + cmp a [] cmp b [] + + ldaa [] ldab [] + lda a [] lda b [] + + oraa [] orab [] + ora a [] ora b [] + + sbca [] sbcb [] + sbc a [] sbc b [] + + staa [] stab [] + sta a [] sta b [] + + suba [] subb [] subd [] + sub a [] sub b [] sub d [] + + + + + AS6801 ASSEMBLER PAGE B-5 + 6801 INSTRUCTION SET + + + B.3.5 Jump and Jump to Subroutine Instructions + + jmp [] jsr [] + + + B.3.6 Long Register Instructions + + cpx [] ldd [] + lds [] ldx [] + std [] sts [] + stx [] + + + B.3.7 6303 Specific Instructions + + aim #data, [] eim #data, [] + oim #data, [] tim #data, [] + + xgdx slp + + + + + + + + + + + + + + + APPENDIX C + + AS6804 ASSEMBLER + + + + + Requires the .setdp directive to specify the ram area. + + + C.1 6804 REGISTER SET + + The following is a list of the 6804 registers used by AS6804: + + x,y - index registers + + + C.2 6804 INSTRUCTION SET + + + The following tables list all 6804 mnemonics recognized by + the AS6804 assembler. The designation [] refers to a required + addressing mode argument. The following list specifies the + format for each addressing mode supported by AS6804: + + #data immediate data + byte or word data + + ,x register indirect addressing + + dir direct addressing + (see .setdp directive) + 0 <= dir <= 255 + + ext extended addressing + + label branch label + + The terms data, dir, and ext may be expressions. The label for + the short branchs beq, bne, bcc, and bcs must not be external. + + Note that not all addressing modes are valid with every in- + struction, refer to the 6804 technical data for valid modes. + + + AS6804 ASSEMBLER PAGE C-2 + 6804 INSTRUCTION SET + + + C.2.1 Inherent Instructions + + coma decx + decy incx + incy rola + rti rts + stop tax + tay txa + tya wait + + + C.2.2 Branch Instructions + + bne label beq label + bcc label bcs label + + + C.2.3 Single Operand Instructions + + add [] + and [] + cmp [] + dec [] + inc [] + lda [] + sta [] + sub [] + + + C.2.4 Jump and Jump to Subroutine Instructions + + jsr [] + jmp [] + + + C.2.5 Bit Test Instructions + + brclr #data,[],label + brset #data,[],label + + bclr #label,[] + bset #label,[] + + + + + AS6804 ASSEMBLER PAGE C-3 + 6804 INSTRUCTION SET + + + C.2.6 Load Immediate data Instruction + + mvi [],#data + + + C.2.7 6804 Derived Instructions + + asla + bam label + bap label + bxmi label + bxpl label + bymi label + bypl label + clra + clrx + clry + deca + decx + decy + inca + incx + incy + ldxi #data + ldyi #data + nop + tax + tay + txa + tya + + + + + + + + + + + + + + + APPENDIX D + + AS6805 ASSEMBLER + + + + + + D.1 6805 REGISTER SET + + The following is a list of the 6805 registers used by AS6805: + + a - 8-bit accumulator + x - index register + + + D.2 6805 INSTRUCTION SET + + + The following tables list all 6805 mnemonics recognized by + the AS6805 assembler. The designation [] refers to a required + addressing mode argument. The following list specifies the + format for each addressing mode supported by AS6805: + + #data immediate data + byte or word data + + *dir direct page addressing + (see .setdp directive) + 0 <= dir <= 255 + + ,x register indirect addressing + zero offset + + offset,x register indirect addressing + 0 <= offset <= 255 --- byte mode + 256 <= offset <= 65535 --- word mode + (an externally defined offset uses the + word mode) + + ext extended addressing + + label branch label + + + + AS6805 ASSEMBLER PAGE D-2 + 6805 INSTRUCTION SET + + + The terms data, dir, offset, and ext may all be expressions. + + Note that not all addressing modes are valid with every in- + struction, refer to the 6805 technical data for valid modes. + + + D.2.1 Control Instructions + + clc cli + nop rsp + rti rts + sec sei + stop swi + tax txa + wait + + + D.2.2 Bit Manipulation Instructions + + brset #data,*dir,label + brclr #data,*dir,label + + bset #data,*dir + bclr #data,*dir + + + D.2.3 Branch Instructions + + bra label brn label + bhi label bls label + bcc label bcs label + bne label beq label + bhcc label bhcs label + bpl label bmi label + bmc label bms label + bil label bih label + bsr label + + + AS6805 ASSEMBLER PAGE D-3 + 6805 INSTRUCTION SET + + + D.2.4 Read-Modify-Write Instructions + + nega negx + neg [] + + coma comx + com [] + + lsra lsrx + lsr [] + + rora rorx + ror [] + + asra asrx + asr [] + + lsla lslx + lsl [] + + rola rolx + rol [] + + deca decx + dec [] + + inca incx + inc [] + + tsta tstx + tst [] + + clra clrx + clr [] + + + D.2.5 Register\Memory Instructions + + sub [] cmp [] + sbc [] cpx [] + and [] bit [] + lda [] sta [] + eor [] adc [] + ora [] add [] + ldx [] stx [] + + + AS6805 ASSEMBLER PAGE D-4 + 6805 INSTRUCTION SET + + + D.2.6 Jump and Jump to Subroutine Instructions + + jmp [] jsr [] + + + + + + + + + + + + + + + APPENDIX E + + AS68HC08 ASSEMBLER + + + + + + E.1 68HC08 REGISTER SET + + The following is a list of the 68HC08 registers used by + AS68HC08: + + a - 8-bit accumulator + x - index register + s - stack pointer + + + E.2 68HC08 INSTRUCTION SET + + + The following tables list all 68HC08 mnemonics recognized by + the AS68HC08 assembler. The designation [] refers to a required + addressing mode argument. The following list specifies the + format for each addressing mode supported by AS68HC08: + + #data immediate data + byte or word data + + *dir direct page addressing + (see .setdp directive) + 0 <= dir <= 255 + + ,x register indexed addressing + zero offset + + offset,x register indexed addressing + 0 <= offset <= 255 --- byte mode + 256 <= offset <= 65535 --- word mode + (an externally defined offset uses the + word mode) + + ,x+ register indexed addressing + zero offset with post increment + + + AS68HC08 ASSEMBLER PAGE E-2 + 68HC08 INSTRUCTION SET + + + + offset,x+ register indexed addressing + unsigned byte offset with post increment + + offset,s stack pointer indexed addressing + 0 <= offset <= 255 --- byte mode + 256 <= offset <= 65535 --- word mode + (an externally defined offset uses the + word mode) + + ext extended addressing + + label branch label + + The terms data, dir, offset, and ext may all be expressions. + + Note that not all addressing modes are valid with every in- + struction, refer to the 68HC08 technical data for valid modes. + + + E.2.1 Control Instructions + + clc cli daa div + mul nop nsa psha + pshh pshx pula pulh + pulx rsp rti rts + sec sei stop swi + tap tax tpa tsx + txa txs wait + + + E.2.2 Bit Manipulation Instructions + + brset #data,*dir,label + brclr #data,*dir,label + + bset #data,*dir + bclr #data,*dir + + + AS68HC08 ASSEMBLER PAGE E-3 + 68HC08 INSTRUCTION SET + + + E.2.3 Branch Instructions + + bra label brn label + bhi label bls label + bcc label bcs label + bne label beq label + bhcc label bhcs label + bpl label bmi label + bmc label bms label + bil label bih label + bsr label bge label + blt label bgt label + ble label + + + E.2.4 Complex Branch Instructions + + cbeqa [],label + cbeqx [],label + cbeq [],label + dbnza label + dbnzx label + dbnz [],label + + + AS68HC08 ASSEMBLER PAGE E-4 + 68HC08 INSTRUCTION SET + + + E.2.5 Read-Modify-Write Instructions + + nega negx + neg [] + + coma comx + com [] + + lsra lsrx + lsr [] + + rora rorx + ror [] + + asra asrx + asr [] + + asla aslx + asl [] + + lsla lslx + lsl [] + + rola rolx + rol [] + + deca decx + dec [] + + inca incx + inc [] + + tsta tstx + tst [] + + clra clrx + clr [] clrh + + aix #data + + ais #data + + + AS68HC08 ASSEMBLER PAGE E-5 + 68HC08 INSTRUCTION SET + + + E.2.6 Register\Memory Instructions + + sub [] cmp [] + sbc [] cpx [] + and [] bit [] + lda [] sta [] + eor [] adc [] + ora [] add [] + ldx [] stx [] + + + E.2.7 Double Operand Move Instruction + + mov [],[] + + + E.2.8 16-Bit Index Register Instructions + + cphx [] + ldhx [] + sthx [] + + + E.2.9 Jump and Jump to Subroutine Instructions + + jmp [] jsr [] + + + + + + + + + + + + + + + APPENDIX F + + AS6809 ASSEMBLER + + + + + + F.1 6809 REGISTER SET + + The following is a list of the 6809 registers used by AS6809: + + a,b - 8-bit accumulators + d - 16-bit accumulator + x,y - index registers + s,u - stack pointers + pc - program counter + cc - condition code + dp - direct page + + + F.2 6809 INSTRUCTION SET + + + The following tables list all 6809 mnemonics recognized by + the AS6809 assembler. The designation [] refers to a required + addressing mode argument. The following list specifies the + format for each addressing mode supported by AS6809: + + #data immediate data + byte or word data + + *dir direct page addressing + (see .setdp directive) + 0 <= dir <= 255 + + label branch label + + r,r1,r2 registers + cc,a,b,d,dp,x,y,s,u,pc + + ,-x ,--x register indexed + autodecrement + + + + AS6809 ASSEMBLER PAGE F-2 + 6809 INSTRUCTION SET + + + ,x+ ,x++ register indexed + autoincrement + + ,x register indexed addressing + zero offset + + offset,x register indexed addressing + -16 <= offset <= 15 --- 5-bit + -128 <= offset <= -17 --- 8-bit + 16 <= offset <= 127 --- 8-bit + -32768 <= offset <= -129 --- 16-bit + 128 <= offset <= 32767 --- 16-bit + (external definition of offset + uses 16-bit mode) + + a,x accumulator offset indexed addressing + + ext extended addressing + + ext,pc pc addressing ( pc <- pc + ext ) + + ext,pcr pc relative addressing + + [,--x] register indexed indirect + autodecrement + + [,x++] register indexed indirect + autoincrement + + [,x] register indexed indirect addressing + zero offset + + [offset,x] register indexed indirect addressing + -128 <= offset <= 127 --- 8-bit + -32768 <= offset <= -129 --- 16-bit + 128 <= offset <= 32767 --- 16-bit + (external definition of offset + uses 16-bit mode) + + [a,x] accumulator offset indexed + indirect addressing + + [ext] extended indirect addressing + + [ext,pc] pc indirect addressing + ( [pc <- pc + ext] ) + + [ext,pcr] pc relative indirect addressing + + The terms data, dir, label, offset, and ext may all be expres- + sions. + + + + AS6809 ASSEMBLER PAGE F-3 + 6809 INSTRUCTION SET + + + Note that not all addressing modes are valid with every in- + struction, refer to the 6809 technical data for valid modes. + + + F.2.1 Inherent Instructions + + abx daa + mul nop + rti rts + sex swi + swi1 swi2 + swi3 sync + + + F.2.2 Short Branch Instructions + + bcc label bcs label + beq label bge label + bgt label bhi label + bhis label bhs label + ble label blo label + blos label bls label + blt label bmi label + bne label bpl label + bra label brn label + bvc label bvs label + bsr label + + + F.2.3 Long Branch Instructions + + lbcc label lbcs label + lbeq label lbge label + lbgt label lbhi label + lbhis label lbhs label + lble label lblo label + lblos label lbls label + lblt label lbmi label + lbne label lbpl label + lbra label lbrn label + lbvc label lbvs label + lbsr label + + + AS6809 ASSEMBLER PAGE F-4 + 6809 INSTRUCTION SET + + + F.2.4 Single Operand Instructions + + asla aslb + asl [] + + asra asrb + asr [] + + clra clrb + clr [] + + coma comb + com [] + + deca decb + dec [] + + inca incb + inc [] + + lsla lslb + lsl [] + + lsra lsrb + lsr [] + + nega negb + neg [] + + rola rolb + rol [] + + rora rorb + ror [] + + tsta tstb + tst [] + + + AS6809 ASSEMBLER PAGE F-5 + 6809 INSTRUCTION SET + + + F.2.5 Double Operand Instructions + + adca [] adcb [] + + adda [] addb [] + + anda [] andb [] + + bita [] bitb [] + + cmpa [] cmpb [] + + eora [] eorb [] + + lda [] ldb [] + + ora [] orb [] + + sbca [] sbcb [] + + sta [] stb [] + + suba [] subb [] + + + F.2.6 D-register Instructions + + addd [] subd [] + cmpd [] ldd [] + std [] + + + F.2.7 Index/Stack Register Instructions + + cmps [] cmpu [] + cmpx [] cmpy [] + + lds [] ldu [] + ldx [] ldy [] + + leas [] leau [] + leax [] leay [] + + sts [] stu [] + stx [] sty [] + + pshs r pshu r + puls r pulu r + + + AS6809 ASSEMBLER PAGE F-6 + 6809 INSTRUCTION SET + + + F.2.8 Jump and Jump to Subroutine Instructions + + jmp [] jsr [] + + + F.2.9 Register - Register Instructions + + exg r1,r2 tfr r1,r2 + + + F.2.10 Condition Code Register Instructions + + andcc #data orcc #data + cwai #data + + + F.2.11 6800 Compatibility Instructions + + aba cba + clc cli + clv des + dex ins + inx + ldaa [] ldab [] + oraa [] orab [] + psha pshb + pula pulb + sba sec + sei sev + staa [] stab [] + tab tap + tba tpa + tsx txs + wai + + + + + + + + + + + + + + + APPENDIX G + + AS6811 ASSEMBLER + + + + + + G.1 6811 REGISTER SET + + The following is a list of the 6811 registers used by AS6811: + + a,b - 8-bit accumulators + d - 16-bit accumulator + x,y - index registers + + + G.2 6811 INSTRUCTION SET + + + The following tables list all 6811 mnemonics recognized by + the AS6811 assembler. The designation [] refers to a required + addressing mode argument. The following list specifies the + format for each addressing mode supported by AS6811: + + #data immediate data + byte or word data + + *dir direct page addressing + (see .setdp directive) + 0 <= dir <= 255 + + ,x register indirect addressing + zero offset + + offset,x register indirect addressing + 0 <= offset <= 255 + + ext extended addressing + + label branch label + + The terms data, dir, offset, and ext may all be expressions. + + + + AS6811 ASSEMBLER PAGE G-2 + 6811 INSTRUCTION SET + + + Note that not all addressing modes are valid with every in- + struction, refer to the 6811 technical data for valid modes. + + + G.2.1 Inherent Instructions + + aba abx + aby cba + clc cli + clv daa + des dex + dey fdiv + idiv ins + inx iny + mul nop + rti rts + sba sec + sei sev + stop swi + tab tap + tba tpa + tsx txs + wai xgdx + xgdy + + psha pshb + psh a psh b + pshx pshy + psh x psh y + + pula pulb + pul a pul b + pulx puly + pul x pul y + + + G.2.2 Branch Instructions + + bra label brn label + bhi label bls label + bcc label bhs label + bcs label blo label + bne label beq label + bvc label bvs label + bpl label bmi label + bge label blt label + bgt label ble label + bsr label + + + AS6811 ASSEMBLER PAGE G-3 + 6811 INSTRUCTION SET + + + G.2.3 Single Operand Instructions + + asla aslb asld + asl a asl b asl d + asl [] + + asra asrb + asr a asr b + asr [] + + clra clrb + clr a clr b + clr label + + coma comb + com a com b + com [] + + deca decb + dec a dec b + dec [] + + inca incb + inc a inc b + inc [] + + lsla lslb lsld + lsl a lsl b lsl d + lsl [] + + lsra lsrb lsrd + lsr a lsr b lsr d + lsr [] + + nega negb + neg a neg b + neg [] + + rola rolb + rol a rol b + rol [] + + rora rorb + ror a ror b + ror [] + + tsta tstb + tst a tst b + tst [] + + + AS6811 ASSEMBLER PAGE G-4 + 6811 INSTRUCTION SET + + + G.2.4 Double Operand Instructions + + adca [] adcb [] + adc a [] adc b [] + + adda [] addb [] addd [] + add a [] add b [] add d [] + + anda [] andb [] + and a [] and b [] + + bita [] bitb [] + bit a [] bit b [] + + cmpa [] cmpb [] + cmp a [] cmp b [] + + eora [] eorb [] + eor a [] eor b [] + + ldaa [] ldab [] + lda a [] lda b [] + + oraa [] orab [] + ora a [] ora b [] + + sbca [] sbcb [] + sbc a [] sbc b [] + + staa [] stab [] + sta a [] sta b [] + + suba [] subb [] subd [] + sub a [] sub b [] sub d [] + + + G.2.5 Bit Manupulation Instructions + + bclr [],#data + bset [],#data + + brclr [],#data,label + brset [],#data,label + + + + + AS6811 ASSEMBLER PAGE G-5 + 6811 INSTRUCTION SET + + + G.2.6 Jump and Jump to Subroutine Instructions + + jmp [] jsr [] + + + G.2.7 Long Register Instructions + + cpx [] cpy [] + + ldd [] lds [] + ldx [] ldy [] + + std [] sts [] + stx [] sty [] + + + + + + + + + + + + + + + APPENDIX H + + AS6816 ASSEMBLER + + + + + + H.1 6816 REGISTER SET + + The following is a list of the 6816 registers used by AS6816: + + a,b - 8-bit accumulators + d - 16-bit accumulator + e - 16-bit accumulator + x,y,z - index registers + k - address extension register + s - stack pointer + ccr - condition code + + + H.2 6816 INSTRUCTION SET + + + The following tables list all 6816 mnemonics recognized by + the AS6816 assembler. The designation [] refers to a required + addressing mode argument. The following list specifies the + format for each addressing mode supported by AS6816: + + #data immediate data + byte or word data + + #xo,#yo local immediate data (mac / rmac) + + label branch label + + r register + ccr,a,b,d,e,x,y,z,s + + ,x zero offset register indexed addressing + ,x8 + ,x16 + + offset,x register indexed addressing + + + AS6816 ASSEMBLER PAGE H-2 + 6816 INSTRUCTION SET + + + 0 <= offset <= 255 --- 8-bit + -32768 <= offset <= -1 --- 16-bit + 256 <= offset <= 32767 --- 16-bit + (external definition of offset + uses 16-bit mode) + + offset,x8 unsigned 8-bit offset indexed addressing + offset,x16 signed 16-bit offset indexed addressing + + e,x accumulator offset indexed addressing + + ext extended addressing + + bank 64K bank number (jmp / jsr) + + The terms data, label, offset, bank, and ext may all be expres- + sions. + + Note that not all addressing modes are valid with every in- + struction, refer to the 6816 technical data for valid modes. + + + H.2.1 Inherent Instructions + + aba abx aby abz + ace aced ade adx + ady adz aex aey + aez bgnd cba daa + ediv edivs emul emuls + fdiv fmuls idiv ldhi + lpstop mul nop psha + pshb pshmac pula pulb + pulmac rtr rts sba + sde sted swi sxt + tab tap tba tbek + tbsk tbxk tbyk tbzk + tde tdmsk tdp ted + tedm tekb tem tmer + tmet tmxed tpa tpd + tskb tsx tsy tsz + txkb txs txy txz + tykb tys tyx tyz + tzkb tzs tzx tzy + wai xgab xgde xgdx + xgdy xgdz xgex xgey + xgez + + + AS6816 ASSEMBLER PAGE H-3 + 6816 INSTRUCTION SET + + + H.2.2 Push/Pull Multiple Register Instructions + + pshm r,... pulm r,... + + + H.2.3 Short Branch Instructions + + bcc label bcs label + beq label bge label + bgt label bhi label + bhis label bhs label + ble label blo label + blos label bls label + blt label bmi label + bne label bpl label + bra label brn label + bvc label bvs label + bsr label + + + H.2.4 Long Branch Instructions + + lbcc label lbcs label + lbeq label lbge label + lbgt label lbhi label + lbhis label lbhs label + lble label lblo label + lblos label lbls label + lblt label lbmi label + lbne label lbpl label + lbra label lbrn label + lbvc label lbvs label + lbsr label + + + H.2.5 Bit Manipulation Instructions + + bclr [],#data + bset [],#data + + brclr [],#data,label + brset [],#data,label + + + AS6816 ASSEMBLER PAGE H-4 + 6816 INSTRUCTION SET + + + H.2.6 Single Operand Instructions + + asla aslb + asld asle + aslm + asl [] aslw [] + + asra asrb + asrd asre + asrm + asr [] asrw [] + + clra clrb + clrd clre + clrm + clr [] clrw [] + + coma comb + comd come + com [] comw [] + + deca decb + dec [] decw [] + + inca incb + inc [] incw [] + + lsla lslb + lsld lsle + lslm + lsl [] lslw [] + + lsra lsrb + lsrd lsre + lsr [] lsrw [] + + nega negb + negd nege + neg [] negw [] + + rola rolb + rold role + rol [] rolw [] + + rora rorb + rord rore + ror [] rorw [] + + tsta tstb + tsta tste + tst [] tstw [] + + + AS6816 ASSEMBLER PAGE H-5 + 6816 INSTRUCTION SET + + + H.2.7 Double Operand Instructions + + adca [] adcb [] + adcd [] adce [] + + adda [] addb [] + addd [] adde [] + + anda [] andb [] + andd [] ande [] + + bita [] bitb [] + + cmpa [] cmpb [] + cpd [] cpe [] + + eora [] eorb [] + eord [] eore [] + + ldaa [] ldab [] + ldd [] lde [] + + oraa [] orab [] + ord [] ore [] + + sbca [] sbcb [] + sbcd [] sbce [] + + staa [] stab [] + std [] ste [] + + suba [] subb [] + subd [] sube [] + + + H.2.8 Index/Stack Register Instructions + + cps [] cpx [] + cpy [] cpz [] + + lds [] ldx [] + ldy [] ldz [] + + sts [] stx [] + sty [] stz [] + + + AS6816 ASSEMBLER PAGE H-6 + 6816 INSTRUCTION SET + + + H.2.9 Jump and Jump to Subroutine Instructions + + jmp bank,[] jsr bank,[] + + + H.2.10 Condition Code Register Instructions + + andp #data orp #data + + + H.2.11 Multiply and Accumulate Instructions + + mac #data rmac #data + mac #xo,#yo rmac #xo,#yo + + + + + + + + + + + + + + + APPENDIX I + + ASH8 ASSEMBLER + + + + + + I.1 H8/3XX REGISTER SET + + The following is a list of the H8 registers used by ASH8: + + r0 - r7,sp 16-bit accumulators + r0L - r7L,spL 8-bit accumulators + r0H - r7H,spH 8-bit accumulators + spL,spH,sp stack pointers + ccr condition code + + + I.2 H8/3XX INSTRUCTION SET + + + The following tables list all H8/3xx mnemonics recognized by + the ASH8 assembler. The designation [] refers to a required ad- + dressing mode argument. The following list specifies the format + for each addressing mode supported by ASH8: + + #xx:3 immediate data (3 bit) + #xx:8 immediate data (8 bit) + #xx:16 immediate data (16 bit) + + *dir direct page addressing + (see .setdp directive) + 0 <= dir <= 255 + + label branch label + + + rn registers (16 bit) + r0-r7,sp + + rnB registers (8 bit) + r0H-r7H,r0L-r7L,spH,spL + + + + ASH8 ASSEMBLER PAGE I-2 + H8/3XX INSTRUCTION SET + + + ccr condition code register + + @rn register indirect + + @-rn register indirect (auto pre-decrement) + + @rn+ register indirect (auto post-increment) + + @[offset,rn] register indirect, 16-bit displacement + + @@offset memory indirect, (8-bit address) + + ext extended addressing (16-bit) + + The terms data, dir, label, offset, and ext may all be expres- + sions. + + Note that not all addressing modes are valid with every in- + struction, refer to the H8/3xx technical data for valid modes. + + + I.2.1 Inherent Instructions + + eepmov + nop + sleep + rte + rts + + + I.2.2 Branch Instructions + + bcc label bcs label + beq label bf label + bge label bgt label + bhi label bhis label + bhs label ble label + blo label blos label + bls label blt label + bmi label bne label + bpl label bra label + brn label bt label + bvc label bvs label + bsr label + + + ASH8 ASSEMBLER PAGE I-3 + H8/3XX INSTRUCTION SET + + + I.2.3 Single Operand Instructions + + Free Form + + daa rnB das rnB + + dec rnB inc rnB + + neg rnB not rnB + + rotxl rnB rotxr rnB + + rotl rnB rotr rnB + + shal rnB shar rnB + + shll rnB shlr rnB + + push rn pop rn + + + Byte / Word Form + + daa.b rnB das.b rnB + + dec.b rnB inc.b rnB + + neg.b rnB not.b rnB + + rotxl.b rnB rotxr.b rnB + + rotl.b rnB rotr.b rnB + + shal.b rnB shar.b rnB + + shll.b rnB shlr.b rnB + + push.w rn pop.w rn + + + ASH8 ASSEMBLER PAGE I-4 + H8/3XX INSTRUCTION SET + + + I.2.4 Double Operand Instructions + + Free Form + + add rnB,rnB add #xx:8,rnB + add rn,rn + + cmp rnB,rnB cmp #xx:8,rnB + cmp rn,rn + + sub rnB,rnB + sub rn,rn + + addx rnB,rnB addx #xx:8,rnB + + and rnB,rnB and #xx:8,rnB + and #xx:8,ccr + + or rnB,rnB or #xx:8,rnB + or #xx:8,ccr + + subx rnB,rnB subx #xx:8,rnB + + xor rnB,rnB xor #xx:8,rnB + xor #xx:8,ccr + + + Byte / Word Form + + add.b rnB,rnB add.b #xx:8,rnB + add.w rn,rn + + cmp.b rnB,rnB cmp.b #xx:8,rnB + cmp.w rn,rn + + sub.b rnB,rnB + sub.w rn,rn + + addx.b rnB,rnB addx.b #xx:8,rnB + + and.b rnB,rnB and.b #xx:8,rnB + and.b #xx:8,ccr + + or.b rnB,rnB or.b #xx:8,rnB + or.b #xx:8,ccr + + subx.b rnB,rnB subx.b #xx:8,rnB + + xor.b rnB,rnB xor.b #xx:8,rnB + xor.b #xx:8,ccr + + + ASH8 ASSEMBLER PAGE I-5 + H8/3XX INSTRUCTION SET + + + I.2.5 Mov Instructions + + Free Form + + mov rnB,rnB mov rn,rn + mov #xx:8,rnB mov #xx:16,rn + mov @rn,rnB mov @rn,rn + mov @[offset,rn],rnB mov @[offset,rn],rn + mov @rn+,rnB mov @rn+,rn + mov @dir,rnB + mov dir,rnB + mov *@dir,rnB + mov *dir,rnB + mov @label,rnB mov @label,rn + mov label,rnB mov label,rn + mov rnB,@rn mov rn,@rn + mov rnB,@[offset,rn] mov rn,@[offset,rn] + mov rnB,@-rn mov rn,@-rn + mov rnB,@dir + mov rnB,dir + mov rnB,*@dir + mov rnB,*dir + mov rnB,@label mov rn,@label + mov rnB,label mov rn,label + + + Byte / Word Form + + mov.b rnB,rnB mov.w rn,rn + mov.b #xx:8,rnB mov.w #xx:16,rn + mov.b @rn,rnB mov.w @rn,rn + mov.b @[offset,rn],rnB mov.w @[offset,rn],rn + mov.b @rn+,rnB mov.w @rn+,rn + mov.b @dir,rnB + mov.b dir,rnB + mov.b *@dir,rnB + mov.b *dir,rnB + mov.b @label,rnB mov.w @label,rn + mov.b label,rnB mov.w label,rn + mov.b rnB,@rn mov.w rn,@rn + mov.b rnB,@[offset,rn] mov.w rn,@[offset,rn] + mov.b rnB,@-rn mov.w rn,@-rn + mov.b rnB,@dir + mov.b rnB,dir + mov.b rnB,*@dir + mov.b rnB,*dir + mov.b rnB,@label mov.w rn,@label + mov.b rnB,label mov.w rn,label + + + ASH8 ASSEMBLER PAGE I-6 + H8/3XX INSTRUCTION SET + + + I.2.6 Bit Manipulation Instructions + + bld #xx:3,rnB bld #xx:3,@rn + bld #xx:3,@dir bld #xx:3,dir + bld #xx:3,*@dir bld #xx:3,*dir + + bild #xx:3,rnB bild #xx:3,@rn + bild #xx:3,@dir bild #xx:3,dir + bild #xx:3,*@dir bild #xx:3,*dir + + bst #xx:3,rnB bst #xx:3,@rn + bst #xx:3,@dir bst #xx:3,dir + bst #xx:3,*@dir bst #xx:3,*dir + + bist #xx:3,rnB bist #xx:3,@rn + bist #xx:3,@dir bist #xx:3,dir + bist #xx:3,*@dir bist #xx:3,*dir + + band #xx:3,rnB band #xx:3,@rn + band #xx:3,@dir band #xx:3,dir + band #xx:3,*@dir band #xx:3,*dir + + biand #xx:3,rnB biand #xx:3,@rn + biand #xx:3,@dir biand #xx:3,dir + biand #xx:3,*@dir biand #xx:3,*dir + + bor #xx:3,rnB bor #xx:3,@rn + bor #xx:3,@dir bor #xx:3,dir + bor #xx:3,*@dir bor #xx:3,*dir + + bior #xx:3,rnB bior #xx:3,@rn + bior #xx:3,@dir bior #xx:3,dir + bior #xx:3,*@dir bior #xx:3,*dir + + bxor #xx:3,rnB bxor #xx:3,@rn + bxor #xx:3,@dir bxor #xx:3,dir + bxor #xx:3,*@dir bxor #xx:3,*dir + + bixor #xx:3,rnB bixor #xx:3,@rn + bixor #xx:3,@dir bixor #xx:3,dir + bixor #xx:3,*@dir bixor #xx:3,*dir + + + ASH8 ASSEMBLER PAGE I-7 + H8/3XX INSTRUCTION SET + + + I.2.7 Extended Bit Manipulation Instructions + + bset #xx:3,rnB bset #xx:3,@rn + bset #xx:3,@dir bset #xx:3,dir + bset #xx:3,*@dir bset #xx:3,*dir + bset rnB,rnB bset rnB,@rn + bset rnB,@dir bset rnB,dir + bset rnB,*@dir bset rnB,*dir + + bclr #xx:3,rnB bclr #xx:3,@rn + bclr #xx:3,@dir bclr #xx:3,dir + bclr #xx:3,*@dir bclr #xx:3,*dir + bclr rnB,rnB bclr rnB,@rn + bclr rnB,@dir bclr rnB,dir + bclr rnB,*@dir bclr rnB,*dir + + bnot #xx:3,rnB bnot #xx:3,@rn + bnot #xx:3,@dir bnot #xx:3,dir + bnot #xx:3,*@dir bnot #xx:3,*dir + bnot rnB,rnB bnot rnB,@rn + bnot rnB,@dir bnot rnB,dir + bnot rnB,*@dir bnot rnB,*dir + + btst #xx:3,rnB btst #xx:3,@rn + btst #xx:3,@dir btst #xx:3,dir + btst #xx:3,*@dir btst #xx:3,*dir + btst rnB,rnB btst rnB,@rn + btst rnB,@dir btst rnB,dir + btst rnB,*@dir btst rnB,*dir + + + I.2.8 Condition Code Instructions + + andc #xx:8,ccr andc #xx:8 + and #xx:8,ccr and.b #xx:8,ccr + + ldc #xx:8,ccr ldc #xx:8 + ldc rnB,ccr ldc rnB + + orc #xx:8,ccr orc #xx:8 + or #xx:8,ccr or.b #xx:8,ccr + + xorc #xx:8,ccr xorc #xx:8 + xor #xx:8,ccr xor.b #xx:8,ccr + + stc ccr,rnB stc rnB + + + ASH8 ASSEMBLER PAGE I-8 + H8/3XX INSTRUCTION SET + + + I.2.9 Other Instructions + + divxu rnB,rn divxu.b rnB,rn + + mulxu rnB,rn mulxu.b rnB,rn + + movfpe @label,rnB movfpe label,rnB + movfpe.b @label,rnB movfpe.b label,rnB + + movtpe @label,rnB movtpe label,rnB + movtpe.b @label,rnB movtpe.b label,rnB + + + I.2.10 Jump and Jump to Subroutine Instructions + + jmp @rn jmp @@dir + jmp @label jmp label + + jsr @rn jsr @@dir + jsr @label jsr label + + + + + + + + + + + + + + + APPENDIX J + + AS8085 ASSEMBLER + + + + + + J.1 8085 REGISTER SET + + The following is a list of the 8080/8085 registers used by + AS8085: + + a,b,c,d,e,h,l - 8-bit accumulators + m - memory through (hl) + sp - stack pointer + psw - status word + + + J.2 8085 INSTRUCTION SET + + + The following tables list all 8080/8085 mnemonics recognized + by the AS8085 assembler. The following list specifies the + format for each addressing mode supported by AS8085: + + #data immediate data + byte or word data + + r,r1,r2 register or register pair + psw,a,b,c,d,e,h,l + bc,de,hl,sp,pc + + m memory address using (hl) + + addr direct memory addressing + + label call or jump label + + The terms data, m, addr, and label may be expressions. + + Note that not all addressing modes are valid with every in- + struction, refer to the 8080/8085 technical data for valid + modes. + + + AS8085 ASSEMBLER PAGE J-2 + 8085 INSTRUCTION SET + + + J.2.1 Inherent Instructions + + cma cmc + daa di + ei hlt + nop pchl + ral rar + ret rim + rrc rlc + sim sphl + stc xchg + xthl + + + J.2.2 Register/Memory/Immediate Instructions + + adc r adc m aci #data + add r add m adi #data + ana r ana m ani #data + cmp r cmp m cpi #data + ora r ora m ori #data + sbb r sbb m sbi #data + sub r sub m sui #data + xra r xra m xri #data + + + J.2.3 Call and Return Instructions + + cc label rc + cm label rm + cnc label rnc + cnz label rnz + cp label rp + cpe label rpe + cpo label rpo + cz label rz + call label + + + J.2.4 Jump Instructions + + jc label + jm label + jnc label + jnz label + jp label + jpe label + jpo label + jz label + jmp label + + + AS8085 ASSEMBLER PAGE J-3 + 8085 INSTRUCTION SET + + + J.2.5 Input/Output/Reset Instructions + + in data + out data + rst data + + + J.2.6 Move Instructions + + mov r1,r2 + mov r,m + mov m,r + + mvi r,#data + mvi m,#data + + + J.2.7 Other Instructions + + dcr r dcr m + inr r inr m + + dad r dcx r + inx r ldax r + pop r push r + stax r + + lda addr lhld addr + shld addr sta addr + + lxi r,#data + + + + + + + + + + + + + + + APPENDIX K + + ASZ80 ASSEMBLER + + + + + + K.1 .hd64 DIRECTIVE + + Format: + + .hd64 + + The .hd64 directive enables processing of the HD64180 specific + mnemonics not included in the Z80 instruction set. HD64180 + mnemonics encountered without the .hd64 directive will be + flagged with an 'o' error. + + + K.2 Z80 REGISTER SET AND CONDITIONS + + + The following is a complete list of register designations and + condition mnemonics: + + byte registers - a,b,c,d,e,h,l,i,r + register pairs - af,af',bc,de,hl + word registers - pc,sp,ix,iy + + C - carry bit set + M - sign bit set + NC - carry bit clear + NZ - zero bit clear + P - sign bit clear + PE - parity even + PO - parity odd + Z - zero bit set + + + + + ASZ80 ASSEMBLER PAGE K-2 + Z80 INSTRUCTION SET + + + K.3 Z80 INSTRUCTION SET + + + The following tables list all Z80/HD64180 mnemonics recog- + nized by the ASZ80 assembler. The designation [] refers to a + required addressing mode argument. The following list specifies + the format for each addressing mode supported by ASZ80: + + #data immediate data + byte or word data + + n byte value + + rg a byte register + a,b,c,d,e,h,l + + rp a register pair + bc,de,hl + + (hl) implied addressing or + register indirect addressing + + (label) direct addressing + + offset(ix) indexed addressing with + an offset + + label call/jmp/jr label + + The terms data, dir, offset, and ext may all be expressions. + The terms dir and offset are not allowed to be external refer- + ences. + + Note that not all addressing modes are valid with every in- + struction, refer to the Z80/HD64180 technical data for valid + modes. + + + ASZ80 ASSEMBLER PAGE K-3 + Z80 INSTRUCTION SET + + + K.3.1 Inherent Instructions + + ccf cpd + cpdr cpi + cpir cpl + daa di + ei exx + halt neg + nop reti + retn rla + rlca rld + rra rrca + rrd scf + + + K.3.2 Implicit Operand Instructions + + adc a,[] adc [] + add a,[] add [] + and a,[] and [] + cp a,[] cp [] + dec a,[] dec [] + inc a,[] inc [] + or a,[] or [] + rl a,[] rl [] + rlc a,[] rlc [] + rr a,[] rr [] + rrc a,[] rrc [] + sbc a,[] sbc [] + sla a,[] sla [] + sra a,[] sra [] + srl a,[] srl [] + sub a,[] sub [] + xor a,[] xor [] + + + ASZ80 ASSEMBLER PAGE K-4 + Z80 INSTRUCTION SET + + + K.3.3 Load Instruction + + ld rg,[] ld [],rg + ld (bc),a ld a,(bc) + ld (de),a ld a,(de) + ld (label),a ld a,(label) + ld (label),rp ld rp,(label) + ld i,a ld r,a + ld a,i ld a,r + ld sp,hl ld sp,ix + ld sp,iy ld rp,#data + + ldd lddr + ldi ldir + + + K.3.4 Call/Return Instructions + + call C,label ret C + call M,label ret M + call NC,label ret NC + call NZ,label ret NZ + call P,label ret P + call PE,label ret PE + call PO,label ret PO + call Z,label ret Z + call label ret + + + K.3.5 Jump and Jump to Subroutine Instructions + + jp C,label jp M,label + jp NC,label jp NZ,label + jp P,label jp PE,label + jp PO,label jp Z,label + + jp (hl) jp (ix) + jp (iy) jp label + + djnz label + + jr C,label jr NC,label + jr NZ,label jr Z,label + jr label + + + ASZ80 ASSEMBLER PAGE K-5 + Z80 INSTRUCTION SET + + + K.3.6 Bit Manipulation Instructions + + bit n,[] + res n,[] + set n,[] + + + K.3.7 Interrupt Mode and Reset Instructions + + im n + im n + im n + rst n + + + K.3.8 Input and Output Instructions + + in a,(n) in rg,(c) + ind indr + ini inir + + out (n),a out (c),rg + outd otdr + outi otir + + + K.3.9 Register Pair Instructions + + add hl,rp add ix,rp + add iy,rp + + adc hl,rp sbc hl,rp + + ex (sp),hl ex (sp),ix + ex (sp),iy + ex de,hl + ex af,af' + + push rp pop rp + + + ASZ80 ASSEMBLER PAGE K-6 + Z80 INSTRUCTION SET + + + K.3.10 HD64180 Specific Instructions + + in0 rg,(n) + out0 (n),rg + + otdm otdmr + otim otimr + + mlt bc mlt de + mlt hl mlt sp + + slp + + tst a + tstio #data + + + + + + + + + + + + + + + APPENDIX L + + AS6500 ASSEMBLER + + + + + + L.1 ACKNOWLEDGMENT + + + Thanks to Marko Makela for his contribution of the AS6500 + cross assembler. + + Marko Makela + Sillitie 10 A + 01480 Vantaa + Finland + Internet: Marko.Makela@Helsinki.Fi + EARN/BitNet: msmakela@finuh + + Several additions and modifications were made to his code to + support the following families of 6500 processors: + + (1) 650X and 651X processor family + (2) 65F11 and 65F12 processor family + (3) 65C00/21 and 65C29 processor family + (4) 65C02, 65C102, and 65C112 processor family + + The instruction syntax of this cross assembler contains two + peculiarities: (1) the addressing indirection is denoted by the + square brackets [] and (2) the `bbrx' and `bbsx' instructions + are written `bbr0 memory,label'. + + + + + AS6500 ASSEMBLER PAGE L-2 + 6500 REGISTER SET + + + L.2 6500 REGISTER SET + + The following is a list of the 6500 registers used by AS6500: + + a - 8-bit accumulator + x,y - index registers + + + L.3 6500 INSTRUCTION SET + + + The following tables list all 6500 family mnemonics recog- + nized by the AS6500 assembler. The designation [] refers to a + required addressing mode argument. The following list specifies + the format for each addressing mode supported by AS6500: + + #data immediate data + byte or word data + + *dir direct page addressing + (see .setdp directive) + 0 <= dir <= 255 + + offset,x indexed addressing + offset,y indexed addressing + address = (offset + (x or y)) + + [offset,x] pre-indexed indirect addressing + 0 <= offset <= 255 + address = contents of location + (offset + (x or y)) mod 256 + + [offset],y post-indexed indirect addressing + address = contents of location at offset + plus the value of the y register + + [address] indirect addressing + + ext extended addressing + + label branch label + + address,label direct page memory location + branch label + bbrx and bbsx instruction addressing + + The terms data, dir, offset, address, ext, and label may all be + expressions. + + Note that not all addressing modes are valid with every in- + struction, refer to the 65xx technical data for valid modes. + + + AS6500 ASSEMBLER PAGE L-3 + 6500 INSTRUCTION SET + + + L.3.1 Processor Specific Directives + + + The AS6500 cross assembler has four (4) processor specific + assembler directives which define the target 65xx processor + family: + + .r6500 Core 650X and 651X family (default) + .r65f11 Core plus 65F11 and 65F12 + .r65c00 Core plus 65C00/21 and 65C29 + .r65c02 Core plus 65C02, 65C102, and 65C112 + + + L.3.2 65xx Core Inherent Instructions + + brk clc + cld cli + clv dex + dey inx + iny nop + pha php + pla plp + rti rts + sec sed + sei tax + tay tsx + txa txs + tya + + + L.3.3 65xx Core Branch Instructions + + bcc label bhs label + bcs label blo label + beq label bmi label + bne label bpl label + bvc label bvs label + + + L.3.4 65xx Core Single Operand Instructions + + asl [] + dec [] + inc [] + lsr [] + rol [] + ror [] + + + AS6500 ASSEMBLER PAGE L-4 + 6500 INSTRUCTION SET + + + L.3.5 65xx Core Double Operand Instructions + + adc [] + and [] + bit [] + cmp [] + eor [] + lda [] + ora [] + sbc [] + sta [] + + + L.3.6 65xx Core Jump and Jump to Subroutine Instructions + + jmp [] jsr [] + + + L.3.7 65xx Core Miscellaneous X and Y Register Instructions + + cpx [] + cpy [] + ldx [] + stx [] + ldy [] + sty [] + + + AS6500 ASSEMBLER PAGE L-5 + 6500 INSTRUCTION SET + + + L.3.8 65F11 and 65F12 Specific Instructions + + bbr0 [],label bbr1 [],label + bbr2 [],label bbr3 [],label + bbr4 [],label bbr5 [],label + bbr6 [],label bbr7 [],label + + bbs0 [],label bbs1 [],label + bbs2 [],label bbs3 [],label + bbs4 [],label bbs5 [],label + bbs6 [],label bbs7 [],label + + rmb0 [] rmb1 [] + rmb2 [] rmb3 [] + rmb4 [] rmb5 [] + rmb6 [] rmb7 [] + + smb0 [] smb1 [] + smb2 [] smb3 [] + smb4 [] smb5 [] + smb6 [] smb7 [] + + + L.3.9 65C00/21 and 65C29 Specific Instructions + + bbr0 [],label bbr1 [],label + bbr2 [],label bbr3 [],label + bbr4 [],label bbr5 [],label + bbr6 [],label bbr7 [],label + + bbs0 [],label bbs1 [],label + bbs2 [],label bbs3 [],label + bbs4 [],label bbs5 [],label + bbs6 [],label bbs7 [],label + + bra label + + phx phy + plx ply + + rmb0 [] rmb1 [] + rmb2 [] rmb3 [] + rmb4 [] rmb5 [] + rmb6 [] rmb7 [] + + smb0 [] smb1 [] + smb2 [] smb3 [] + smb4 [] smb5 [] + smb6 [] smb7 [] + + + AS6500 ASSEMBLER PAGE L-6 + 6500 INSTRUCTION SET + + + L.3.10 65C02, 65C102, and 65C112 Specific Instructions + + bbr0 [],label bbr1 [],label + bbr2 [],label bbr3 [],label + bbr4 [],label bbr5 [],label + bbr6 [],label bbr7 [],label + + bbs0 [],label bbs1 [],label + bbs2 [],label bbs3 [],label + bbs4 [],label bbs5 [],label + bbs6 [],label bbs7 [],label + + bra label + + phx phy + plx ply + + rmb0 [] rmb1 [] + rmb2 [] rmb3 [] + rmb4 [] rmb5 [] + rmb6 [] rmb7 [] + + smb0 [] smb1 [] + smb2 [] smb3 [] + smb4 [] smb5 [] + smb6 [] smb7 [] + + stz [] + trb [] + tsb [] + + Additional addressing modes for the following core instruc- + tions are also available with the 65C02, 65C102, and 65C112 pro- + cessors. + + adc [] and [] + cmp [] eor [] + lda [] ora [] + sbc [] sta [] + + bit [] jmp [] + + dec inc + \ No newline at end of file diff --git a/as/doc/asxhtm.html b/as/doc/asxhtm.html new file mode 100644 index 0000000..6ec571d --- /dev/null +++ b/as/doc/asxhtm.html @@ -0,0 +1,6561 @@ + + +ASxxxx Cross Assembler Documentation + + + + + + +

ASxxxx Cross Assembler Documentation

+ + + +
+
+                              SDCCASxxxx Assemblers
+
+
+                                       and
+
+
+                          SDCC ASLINK Relocating Linker
+
+
+
+
+                                  Version   2.0
+                                   August 1998
+
+
+                                                                  Page 2
+
+
+
+
+                                  P R E F A C E
+
+
+
+
+
+           The  ASxxxx  assemblers  were  written following the style of
+        several cross assemblers found in the Digital Equipment Corpora-
+        tion  Users  Society  (DECUS)  distribution of the C programming
+        language.  The DECUS code was provided with no documentation  as
+        to  the  input  syntax  or the output format.  Study of the code
+        revealed that the unknown author of the code  had  attempted  to
+        formulate  an assembler with attributes similiar to those of the
+        PDP-11 MACRO assembler (without macro's).  The  incomplete  code
+        from  the  DECUS C distribution has been largely rewritten, only
+        the program structure, and C source  file  organization  remains
+        relatively  unchanged.   However, I wish to thank the author for
+        his contribution to this set of assemblers.
+
+           The  ASLINK  program was written as a companion to the ASxxxx
+        assemblers, its design and implementation was not  derived  from
+        any other work.
+
+           I  would  greatly  appreciate  receiving  the  details of any
+        changes, additions, or errors pertaining to these  programs  and
+        will  attempt  to  incorporate  any  fixes  or  generally useful
+        changes in a future update to these programs.
+
+
+
+                Alan R.  Baldwin
+                Kent State University
+                Physics Department
+                Kent, Ohio 44242
+                U.S.A.
+
+
+                http://shop-pdp.kent.edu/ashtml/asxxxx.htm
+
+                baldwin@shop-pdp.kent.edu
+                tel:  (330) 672 2531
+                fax:  (330) 672 2959
+
+
+
+               E N D   U S E R   L I C E N S E   A G R E E M E N T
+
+
+
+
+
+          This  program is free software; you can redistribute it and/or
+        modify  it under the terms of the GNU General Public License  as
+        published  by the Free Software Foundation; either version 3, or
+        (at your option) any later version.
+
+          This  program  is  distributed  in the hope that  it  will  be
+        useful,  but  WITHOUT ANY WARRANTY;  without  even  the  implied
+        warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+        See the GNU General Public License for more details.
+
+          You  should  have  received a copy of the GNU  General  Public
+        License     along     with    this program.      If not,     see
+        .
+
+
+                                                                  Page 3
+
+
+
+
+
+
+
+
+                             C O N T R I B U T O R S
+
+
+
+
+           Thanks  to  Marko  Makela  for his contribution of the AS6500
+        cross assembler.
+
+                Marko Makela
+                Sillitie 10 A
+                01480 Vantaa
+                Finland
+                Internet: Marko.Makela@Helsinki.Fi
+                EARN/BitNet: msmakela@finuh
+
+
+
+
+
+           Thanks  to  John  Hartman  for his contribution of the AS8051
+        cross assembler and updates to the ASxxxx and ASLINK internals.
+
+                John L. Hartman
+                jhartman@compuserve.com
+                http://ourworld.compuserve.com/homepages/jhartman/
+
+
+
+
+
+           Thanks  to  G.   Osborn  for his contributions to LKS19.C and
+        LKIHX.C.
+
+                G. Osborn
+                gary@s-4.com
+
+
+                                                                  Page 4
+
+
+
+        ASxxxx Cross Assemblers, Version 2.00, August 1998
+
+        Submitted by Alan R.  Baldwin,
+        Kent State University, Kent, Ohio
+
+        Operating System:  TSX+, RT-11, MS/DOS, PDOS
+        or other supporting K&R C.
+
+        Source Langauge:  C
+
+        Abstract:
+
+           The  ASxxxx  assemblers are a series of microprocessor assem-
+        blers written in the C programming  language.   This  collection
+        contains cross assemblers for the 6800(6802/6808), 6801(hd6303),
+        6804,  6805,  68HC08,  6809,  68HC11,  68HC12,   68HC16,   8051,
+        8085(8080),  z80(hd64180),  H8/3xx, and 6500 series microproces-
+        sors.  Each  assembler  has  a  device  specific  section  which
+        includes:   (1)  device description, byte order, and file exten-
+        sion information, (2) a table of assembler  general  directives,
+        special directives, assembler mnemonics and associated operation
+        codes, (3) machine  specific  code  for  processing  the  device
+        mnemonics, addressing modes, and special directives.
+
+           The assemblers have a common device independent section which
+        handles the details of file input/output, symbol  table  genera-
+        tion,  program/data  areas,  expression  analysis, and assembler
+        directive processing.
+
+           The  assemblers  provide  the following features:  (1) alpha-
+        betized, formatted symbol table listings, (2) relocatable object
+        modules, (3) global symbols for linking object modules, (4) con-
+        ditional assembly directives, (5) reusable  local  symbols,  and
+        (6) include-file processing.
+
+           The  companion program ASLINK is a relocating linker perform-
+        ing the following functions:  (1) bind multiple  object  modules
+        into  a  single  memory  image,  (2) resolve inter-module symbol
+        references,  (3)  resolve  undefined  symbols   from   specified
+        librarys of object modules, (4) process absolute, relative, con-
+        catenated, and overlay attributes in data and program  sections,
+        (5)  perform  byte and word program-counter relative (pc or pcr)
+        addressing calculations, (6) define absolute  symbol  values  at
+        link  time, (7) define absolute area base address values at link
+        time, (8) produce Intel Hex or Motorola  S19  output  file,  (9)
+        produce  a  map  of the linked memory image, and (10) update the
+        ASxxxx assembler listing files  with  the  absolute  linked  ad-
+        dresses and data.
+
+           The  assemblers  and  linker  have  been tested using DECUS C
+        under TSX+ and RT-11, PDOS C V5.4b, and Symantec C/C++ V6.1/V7.2
+        under  DOS/Windows  3.x/95.  Complete source code and documenta-
+        tion for the assemblers and linker is included with the  distri-
+        bution.   Additionally, test code for each assembler and several
+        microprocessor monitors ( ASSIST05  for  the  6805,  MONDEB  and
+        ASSIST09  for  the  6809,  and BUFFALO 2.5 for the 6811) are in-
+        cluded as working examples of use of these assemblers.
+
+
+        CHAPTER 1  THE ASSEMBLER                                     1-1
+          1.1     THE ASXXXX ASSEMBLERS                              1-1
+          1.1.1     Assembly Pass 1                                  1-2
+          1.1.2     Assembly Pass 2                                  1-2
+          1.1.3     Assembly Pass 3                                  1-2
+          1.2     SOURCE PROGRAM FORMAT                              1-3
+          1.2.1     Statement Format                                 1-3
+          1.2.1.1     Label Field                                    1-3
+          1.2.1.2     Operator Field                                 1-5
+          1.2.1.3     Operand Field                                  1-5
+          1.2.1.4     Comment Field                                  1-6
+          1.3     SYMBOLS AND EXPRESSIONS                            1-6
+          1.3.1     Character Set                                    1-6
+          1.3.2     User-Defined Symbols                            1-10
+          1.3.3     Local Symbols                                   1-11
+          1.3.4     Current Location Counter                        1-12
+          1.3.5     Numbers                                         1-14
+          1.3.6     Terms                                           1-14
+          1.3.7     Expressions                                     1-15
+          1.4     GENERAL ASSEMBLER DIRECTIVES                      1-16
+          1.4.1     .module Directive                               1-16
+          1.4.2     .title Directive                                1-17
+          1.4.3     .sbttl Directive                                1-17
+          1.4.4     .page Directive                                 1-17
+          1.4.5     .byte and .db Directives                        1-17
+          1.4.6     .word and .dw Directives                        1-18
+          1.4.7     .blkb, .blkw, and .ds Directives                1-18
+          1.4.8     .ascii Directive                                1-18
+          1.4.9     .ascis Directive                                1-19
+          1.4.10    .asciz Directive                                1-19
+          1.4.11    .radix Directive                                1-20
+          1.4.12    .even Directive                                 1-20
+          1.4.13    .odd Directive                                  1-20
+          1.4.14    .area Directive                                 1-21
+          1.4.15    .org Directive                                  1-22
+          1.4.16    .globl Directive                                1-23
+          1.4.17    .if, .else, and .endif Directives               1-23
+          1.4.18    .include Directive                              1-24
+          1.4.19    .setdp Directive                                1-25
+          1.5     INVOKING ASXXXX                                   1-27
+          1.6     ERRORS                                            1-28
+          1.7     LISTING FILE                                      1-29
+          1.8     SYMBOL TABLE FILE                                 1-30
+          1.9     OBJECT FILE                                       1-31
+
+        CHAPTER 2  THE LINKER                                        2-1
+          2.1     ASLINK RELOCATING LINKER                           2-1
+          2.2     INVOKING ASLINK                                    2-2
+          2.3     LIBRARY PATH(S) AND FILE(S)                        2-3
+          2.4     ASLINK PROCESSING                                  2-4
+          2.5     LINKER INPUT FORMAT                                2-6
+          2.5.1     Object Module Format                             2-6
+          2.5.2     Header Line                                      2-6
+          2.5.3     Module Line                                      2-7
+          2.5.4     Symbol Line                                      2-7
+          2.5.5     Area Line                                        2-7
+
+
+                                                                 Page ii
+
+
+
+          2.5.6     T Line                                           2-7
+          2.5.7     R Line                                           2-8
+          2.5.8     P Line                                           2-8
+          2.6     LINKER ERROR MESSAGES                              2-9
+          2.7     INTEL HEX OUTPUT FORMAT                           2-11
+          2.8     MOTORLA S1-S9 OUTPUT FORMAT                       2-12
+
+        CHAPTER 3  BUILDING ASXXXX AND ASLINK                        3-1
+          3.1     BUILDING AN ASSEMBLER                              3-1
+          3.2     BUILDING ASLINK                                    3-2
+
+        APPENDIX A  AS6800 ASSEMBLER                                 A-1
+          A.1     6800 REGISTER SET                                  A-1
+          A.2     6800 INSTRUCTION SET                               A-1
+          A.2.1     Inherent Instructions                            A-2
+          A.2.2     Branch Instructions                              A-2
+          A.2.3     Single Operand Instructions                      A-3
+          A.2.4     Double Operand Instructions                      A-4
+          A.2.5     Jump and Jump to Subroutine Instructions         A-4
+          A.2.6     Long Register Instructions                       A-5
+
+        APPENDIX B  AS6801 ASSEMBLER                                 B-1
+          B.1     .hd6303 DIRECTIVE                                  B-1
+          B.2     6801 REGISTER SET                                  B-1
+          B.3     6801 INSTRUCTION SET                               B-1
+          B.3.1     Inherent Instructions                            B-2
+          B.3.2     Branch Instructions                              B-2
+          B.3.3     Single Operand Instructions                      B-3
+          B.3.4     Double Operand Instructions                      B-4
+          B.3.5     Jump and Jump to Subroutine Instructions         B-5
+          B.3.6     Long Register Instructions                       B-5
+          B.3.7     6303 Specific Instructions                       B-5
+
+        APPENDIX C  AS6804 ASSEMBLER                                 C-1
+          C.1     6804 REGISTER SET                                  C-1
+          C.2     6804 INSTRUCTION SET                               C-1
+          C.2.1     Inherent Instructions                            C-2
+          C.2.2     Branch Instructions                              C-2
+          C.2.3     Single Operand Instructions                      C-2
+          C.2.4     Jump and Jump to Subroutine Instructions         C-2
+          C.2.5     Bit Test Instructions                            C-2
+          C.2.6     Load Immediate data Instruction                  C-3
+          C.2.7     6804 Derived Instructions                        C-3
+
+        APPENDIX D  AS6805 ASSEMBLER                                 D-1
+          D.1     6805 REGISTER SET                                  D-1
+          D.2     6805 INSTRUCTION SET                               D-1
+          D.2.1     Control Instructions                             D-2
+          D.2.2     Bit Manipulation Instructions                    D-2
+          D.2.3     Branch Instructions                              D-2
+          D.2.4     Read-Modify-Write Instructions                   D-3
+          D.2.5     Register\Memory Instructions                     D-3
+
+
+                                                                Page iii
+
+
+
+          D.2.6     Jump and Jump to Subroutine Instructions         D-4
+
+        APPENDIX E  AS6808 ASSEMBLER                                 E-1
+          E.1     68HC08 REGISTER SET                                E-1
+          E.2     68HC08 INSTRUCTION SET                             E-1
+          E.2.1     Control Instructions                             E-2
+          E.2.2     Bit Manipulation Instructions                    E-2
+          E.2.3     Branch Instructions                              E-3
+          E.2.4     Complex Branch Instructions                      E-3
+          E.2.5     Read-Modify-Write Instructions                   E-4
+          E.2.6     Register\Memory Instructions                     E-5
+          E.2.7     Double Operand Move Instruction                  E-5
+          E.2.8     16-Bit <H:X> Index Register Instructions         E-5
+          E.2.9     Jump and Jump to Subroutine Instructions         E-5
+
+        APPENDIX F  AS6809 ASSEMBLER                                 F-1
+          F.1     6809 REGISTER SET                                  F-1
+          F.2     6809 INSTRUCTION SET                               F-1
+          F.2.1     Inherent Instructions                            F-3
+          F.2.2     Short Branch Instructions                        F-3
+          F.2.3     Long Branch Instructions                         F-3
+          F.2.4     Single Operand Instructions                      F-4
+          F.2.5     Double Operand Instructions                      F-5
+          F.2.6     D-register Instructions                          F-5
+          F.2.7     Index/Stack Register Instructions                F-5
+          F.2.8     Jump and Jump to Subroutine Instructions         F-6
+          F.2.9     Register - Register Instructions                 F-6
+          F.2.10    Condition Code Register Instructions             F-6
+          F.2.11    6800 Compatibility Instructions                  F-6
+
+        APPENDIX G  AS6811 ASSEMBLER                                 G-1
+          G.1     68HC11 REGISTER SET                                G-1
+          G.2     68HC11 INSTRUCTION SET                             G-1
+          G.2.1     Inherent Instructions                            G-2
+          G.2.2     Branch Instructions                              G-2
+          G.2.3     Single Operand Instructions                      G-3
+          G.2.4     Double Operand Instructions                      G-4
+          G.2.5     Bit Manupulation Instructions                    G-4
+          G.2.6     Jump and Jump to Subroutine Instructions         G-5
+          G.2.7     Long Register Instructions                       G-5
+
+        APPENDIX H  AS6812 ASSEMBLER                                 H-1
+          H.1     68HC12 REGISTER SET                                H-1
+          H.2     68HC12 INSTRUCTION SET                             H-1
+          H.2.1     Inherent Instructions                            H-3
+          H.2.2     Short Branch Instructions                        H-3
+          H.2.3     Long Branch Instructions                         H-3
+          H.2.4     Branch on Decrement, Test, or Increment          H-4
+          H.2.5     Bit Clear and Set Instructions                   H-4
+          H.2.6     Branch on Bit Clear or Set                       H-4
+          H.2.7     Single Operand Instructions                      H-5
+          H.2.8     Double Operand Instructions                      H-6
+
+
+                                                                 Page iv
+
+
+
+          H.2.9     Move Instructions                                H-6
+          H.2.10    D-register Instructions                          H-6
+          H.2.11    Index/Stack Register Instructions                H-7
+          H.2.12    Jump and Jump/Call to Subroutine
+                    Instructions                                     H-7
+          H.2.13    Other Special Instructions                       H-7
+          H.2.14    Register - Register Instructions                 H-7
+          H.2.15    Condition Code Register Instructions             H-7
+          H.2.16    M68HC11 Compatibility Mode Instructions          H-8
+
+        APPENDIX I  AS6816 ASSEMBLER                                 I-1
+          I.1     68HC16 REGISTER SET                                I-1
+          I.2     68HC16 INSTRUCTION SET                             I-1
+          I.2.1     Inherent Instructions                            I-2
+          I.2.2     Push/Pull Multiple Register Instructions         I-3
+          I.2.3     Short Branch Instructions                        I-3
+          I.2.4     Long Branch Instructions                         I-3
+          I.2.5     Bit Manipulation Instructions                    I-3
+          I.2.6     Single Operand Instructions                      I-4
+          I.2.7     Double Operand Instructions                      I-5
+          I.2.8     Index/Stack Register Instructions                I-5
+          I.2.9     Jump and Jump to Subroutine Instructions         I-6
+          I.2.10    Condition Code Register Instructions             I-6
+          I.2.11    Multiply and Accumulate Instructions             I-6
+
+        APPENDIX J  ASH8 ASSEMBLER                                   J-1
+          J.1     H8/3XX REGISTER SET                                J-1
+          J.2     H8/3XX INSTRUCTION SET                             J-1
+          J.2.1     Inherent Instructions                            J-2
+          J.2.2     Branch Instructions                              J-2
+          J.2.3     Single Operand Instructions                      J-3
+          J.2.4     Double Operand Instructions                      J-4
+          J.2.5     Mov Instructions                                 J-5
+          J.2.6     Bit Manipulation Instructions                    J-6
+          J.2.7     Extended Bit Manipulation Instructions           J-7
+          J.2.8     Condition Code Instructions                      J-7
+          J.2.9     Other Instructions                               J-8
+          J.2.10    Jump and Jump to Subroutine Instructions         J-8
+
+        APPENDIX K  AS8051 ASSEMBLER                                 K-1
+          K.1     ACKNOWLEDGMENT                                     K-1
+          K.2     8051 REGISTER SET                                  K-1
+          K.3     8051 INSTRUCTION SET                               K-2
+          K.3.1     Inherent Instructions                            K-2
+          K.3.2     Move Instructions                                K-3
+          K.3.3     Single Operand Instructions                      K-3
+          K.3.4     Two Operand Instructions                         K-4
+          K.3.5     Call and Return Instructions                     K-4
+          K.3.6     Jump Instructions                                K-4
+          K.3.7     Predefined Symbols:  SFR Map                     K-5
+          K.3.8     Predefined Symbols:  SFR Bit Addresses           K-6
+          K.3.9     Predefined Symbols:  Control Bits                K-7
+
+
+                                                                  Page v
+
+
+
+        APPENDIX L  AS8085 ASSEMBLER                                 L-1
+          L.1     8085 REGISTER SET                                  L-1
+          L.2     8085 INSTRUCTION SET                               L-1
+          L.2.1     Inherent Instructions                            L-2
+          L.2.2     Register/Memory/Immediate Instructions           L-2
+          L.2.3     Call and Return Instructions                     L-2
+          L.2.4     Jump Instructions                                L-2
+          L.2.5     Input/Output/Reset Instructions                  L-3
+          L.2.6     Move Instructions                                L-3
+          L.2.7     Other Instructions                               L-3
+
+        APPENDIX M  ASZ80 ASSEMBLER                                  M-1
+          M.1     .hd64 DIRECTIVE                                    M-1
+          M.2     Z80 REGISTER SET AND CONDITIONS                    M-1
+          M.3     Z80 INSTRUCTION SET                                M-2
+          M.3.1     Inherent Instructions                            M-3
+          M.3.2     Implicit Operand Instructions                    M-3
+          M.3.3     Load Instruction                                 M-4
+          M.3.4     Call/Return Instructions                         M-4
+          M.3.5     Jump and Jump to Subroutine Instructions         M-4
+          M.3.6     Bit Manipulation Instructions                    M-5
+          M.3.7     Interrupt Mode and Reset Instructions            M-5
+          M.3.8     Input and Output Instructions                    M-5
+          M.3.9     Register Pair Instructions                       M-5
+          M.3.10    HD64180 Specific Instructions                    M-6
+
+        APPENDIX N  AS6500 ASSEMBLER                                 N-1
+          N.1     ACKNOWLEDGMENT                                     N-1
+          N.2     6500 REGISTER SET                                  N-2
+          N.3     6500 INSTRUCTION SET                               N-2
+          N.3.1     Processor Specific Directives                    N-3
+          N.3.2     65xx Core Inherent Instructions                  N-3
+          N.3.3     65xx Core Branch Instructions                    N-3
+          N.3.4     65xx Core Single Operand Instructions            N-3
+          N.3.5     65xx Core Double Operand Instructions            N-4
+          N.3.6     65xx Core Jump and Jump to Subroutine
+                    Instructions                                     N-4
+          N.3.7     65xx Core Miscellaneous X and Y Register
+                    Instructions                                     N-4
+          N.3.8     65F11 and 65F12 Specific Instructions            N-5
+          N.3.9     65C00/21 and 65C29 Specific Instructions         N-5
+          N.3.10    65C02, 65C102, and 65C112 Specific
+                    Instructions                                     N-6
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                    CHAPTER 1
+
+                                  THE ASSEMBLER
+
+
+
+
+
+        1.1  THE ASXXXX ASSEMBLERS
+
+
+           The  ASxxxx  assemblers are a series of microprocessor assem-
+        blers written in the C programming language.  Each assembler has
+        a device specific section which includes:
+
+             1.  device  description, byte order, and file extension in-
+                 formation
+
+             2.  a  table  of  the assembler general directives, special
+                 device directives, assembler mnemonics  and  associated
+                 operation codes
+
+             3.  machine specific code for processing the device mnemon-
+                 ics, addressing modes, and special directives
+
+        The device specific information is detailed in the appendices.
+
+           The assemblers have a common device independent section which
+        handles the details of file input/output, symbol  table  genera-
+        tion,  program/data  areas,  expression  analysis, and assembler
+        directive processing.
+
+        The assemblers provide the following features:
+
+             1.  Command string control of assembly functions
+
+             2.  Alphabetized, formatted symbol table listing
+
+             3.  Relocatable object modules
+
+             4.  Global symbols for linking object modules
+
+             5.  Conditional assembly directives
+
+
+
+        THE ASSEMBLER                                           PAGE 1-2
+        THE ASXXXX ASSEMBLERS
+
+
+             6.  Program sectioning directives
+
+
+           ASxxxx assembles one or more source files into a single relo-
+        catable ascii object file.  The output of the ASxxxx  assemblers
+        consists of an ascii relocatable object file(*.rel), an assembly
+        listing file(*.lst), and a symbol file(*.sym).
+
+
+        1.1.1  Assembly Pass 1
+
+
+           During  pass  1, ASxxxx opens all source files and performs a
+        rudimenatry assembly of each source statement.  During this pro-
+        cess  all symbol tables are built, program sections defined, and
+        number of bytes for each assembled source line is estimated.
+
+           At the end of pass 1 all undefined symbols may be made global
+        (external) using the ASxxxx switch -g, otherwise undefined  sym-
+        bols will be flagged as errors during succeeding passes.
+
+
+        1.1.2  Assembly Pass 2
+
+
+           During  pass  2  the ASxxxx assembler resolves forward refer-
+        ences and determines the number  of  bytes  for  each  assembled
+        line.   The  number  of bytes used by a particular assembler in-
+        struction may depend upon the addressing mode, whether  the  in-
+        struction allows multiple forms based upon the relative distance
+        to the addressed location, or other factors.   Pass  2  resolves
+        these cases and determines the address of all symbols.
+
+
+        1.1.3  Assembly Pass 3
+
+
+           Pass 3 by the assembler generates the listing file, the relo-
+        catable output file, and the symbol tables.  Also during pass  3
+        the errors will be reported.
+
+           The  relocatable object file is an ascii file containing sym-
+        bol references and definitions, program  area  definitions,  and
+        the  relocatable assembled code, the linker ASLINK will use this
+        information to generate an absolute load file (Motorola or Intel
+        formats).
+
+
+
+
+        THE ASSEMBLER                                           PAGE 1-3
+        SOURCE PROGRAM FORMAT
+
+
+        1.2  SOURCE PROGRAM FORMAT
+
+
+
+        1.2.1  Statement Format
+
+
+           A source program is composed of assembly-language statements.
+        Each statement must be completed on one line.  A line  may  con-
+        tain a maximum of 128 characters, longer lines are truncated and
+        lost.
+
+           An  ASxxxx  assembler  statement  may  have  as  many as four
+        fields.  These fields are identified by their order  within  the
+        statement  and/or  by separating characters between fields.  The
+        general format of the ASxxxx statement is:
+
+              [label:]  Operator        Operand         [;Comment(s)]
+
+           The  label and comment fields are optional.  The operator and
+        operand fields are interdependent.  The operator field may be an
+        assembler  directive or an assembly mnemonic.  The operand field
+        may be optional or required as defined in  the  context  of  the
+        operator.
+
+           ASxxxx  interprets  and  processes source statements one at a
+        time.  Each statement causes a particular operation to  be  per-
+        formed.
+
+
+        1.2.1.1  Label Field  -
+
+           A  label is a user-defined symbol which is assigned the value
+        of the current location counter and entered into  the  user  de-
+        fined  symbol  table.   The  current location counter is used by
+        ASxxxx to assign memory addresses to the source  program  state-
+        ments as they are encountered during the assembly process.  Thus
+        a label is a means  of  symbolically  referring  to  a  specific
+        statement.
+
+           When  a program section is absolute, the value of the current
+        location counter is absolute;  its value references an  absolute
+        memory  address.   Similarly, when a program section is relocat-
+        able, the value of the current location counter is  relocatable.
+        A  relocation  bias  calculated at link time is added to the ap-
+        parent value of the current location counter  to  establish  its
+        effective  absolute  address  at  execution time.  (The user can
+        also force the linker to relocate sections defined as  absolute.
+        This may be required under special circumstances.)
+
+           If  present,  a  label  must  be  the first field in a source
+        statement and must be terminated by a colon (:).   For  example,
+
+
+        THE ASSEMBLER                                           PAGE 1-4
+        SOURCE PROGRAM FORMAT
+
+
+        if  the  value  of  the  current  location  counter  is absolute
+        01F0(H), the statement:
+
+              abcd:     nop
+
+        assigns  the  value  01F0(H) to the label abcd.  If the location
+        counter value were relocatable, the final value of abcd would be
+        01F0(H)+K, where K represents the relocation bias of the program
+        section, as calculated by the linker at link time.
+
+           More  than  one label may appear within a single label field.
+        Each label so specified is assigned the same address value.  For
+        example,  if  the  value  of  the  current  location  counter is
+        1FF0(H), the multiple labels in the following statement are each
+        assigned the value 1FF0(H):
+
+              abcd:     aq:     $abc:   nop
+
+           Multiple labels may also appear on successive lines.  For ex-
+        ample, the statements
+
+              abcd:
+              aq:
+              $abc:     nop
+
+        likewise  cause  the  same value to be assigned to all three la-
+        bels.
+
+           A  double  colon  (::)  defines the label as a global symbol.
+        For example, the statement
+
+              abcd::    nop
+
+        establishes the label abcd as a global symbol.  The distinguish-
+        ing attribute of a global symbol is that it  can  be  referenced
+        from  within an object module other than the module in which the
+        symbol is defined.  References to this label  in  other  modules
+        are  resolved when the modules are linked as a composite execut-
+        able image.
+
+        The legal characters for defining labels are:
+
+                A through Z
+                a through z
+                0 through 9
+                . (Period)
+                $ (Dollar sign)
+                _ (underscore)
+
+           A  label  may  be  any  length,  however  only  the  first 79
+        characters are significant and, therefore must be  unique  among
+        all   labels  in  the  source  program  (not  necessarily  among
+
+
+        THE ASSEMBLER                                           PAGE 1-5
+        SOURCE PROGRAM FORMAT
+
+
+        separately compiled modules).  An error code(s) (m or p) will be
+        generated  in the assembly listing if the first 79 characters in
+        two or more labels are the same.  The m code is  caused  by  the
+        redeclaration  of  the symbol or its reference by another state-
+        ment.  The p code is generated because the symbols  location  is
+        changing on each pass through the source file.
+
+           The  label  must  not  start with the characters 0-9, as this
+        designates a local symbol with special attributes described in a
+        later section.
+
+           The  label  must  not  start  with  the  sequence $$, as this
+        represents the temporary radix 16 for constants.
+
+
+        1.2.1.2  Operator Field  -
+
+           The  operator field specifies the action to be performed.  It
+        may consist of an instruction mnemonic (op code) or an assembler
+        directive.
+
+           When  the  operator is an instruction mnemonic, a machine in-
+        struction is generated and the assembler evaluates the addresses
+        of  the operands which follow.  When the operator is a directive
+        ASxxxx performs certain control actions or processing operations
+        during assembly of the source program.
+
+           Leading  and  trailing  spaces  or tabs in the operator field
+        have no significance;  such characters serve  only  to  separate
+        the operator field from the preceeding and following fields.
+
+           An operator is terminated by a space, tab or end of line.
+
+
+        1.2.1.3  Operand Field  -
+
+           When  the  operator is an instruction mnemonic (op code), the
+        operand  field  contains  program  variables  that  are  to   be
+        evaluated/manipulated by the operator.
+
+           Operands  may  be  expressions  or  symbols, depending on the
+        operator.  Multiple expressions used in the operand  fields  may
+        be  separated  by a comma.  An operand should be preceeded by an
+        operator field;  if it is not, the statement will give an  error
+        (q  or  o).   All  operands  following instruction mnemonics are
+        treated as expressions.
+
+           The operand field is terminated by a semicolon when the field
+        is followed  by  a  comment.   For  example,  in  the  following
+        statement:
+
+              label:    lda     abcd,x          ;Comment field
+
+
+        THE ASSEMBLER                                           PAGE 1-6
+        SOURCE PROGRAM FORMAT
+
+
+
+        the  tab  between lda and abcd terminates the operator field and
+        defines the beginning of the operand field;  a  comma  separates
+        the operands abcd and x;  and a semicolon terminates the operand
+        field and defines the beginning of the comment field.   When  no
+        comment  field  follows,  the operand field is terminated by the
+        end of the source line.
+
+
+        1.2.1.4  Comment Field  -
+
+           The comment field begins with a semicolon and extends through
+        the end of the line.  This field is optional and may contain any
+        7-bit ascii character except null.
+
+           Comments  do not affect assembly processing or program execu-
+        tion.
+
+
+        1.3  SYMBOLS AND EXPRESSIONS
+
+
+           This  section  describes the generic components of the ASxxxx
+        assemblers:  the character set, the conventions observed in con-
+        structing  symbols,  and  the use of numbers, operators, and ex-
+        pressions.
+
+
+        1.3.1  Character Set
+
+
+           The following characters are legal in ASxxxx source programs:
+
+             1.  The  letters  A  through Z.  Both upper- and lower-case
+                 letters are acceptable.  The  assemblers,  by  default,
+                 are  not  case  sensitive,  i.e.  ABCD and abcd are the
+                 same symbols.  (The assemblers can be made case  sensi-
+                 tive by using the -z command line option.)
+
+             2.  The digits 0 through 9
+
+             3.  The  characters . (period), $ (dollar sign), and _ (un-
+                 derscore).
+
+             4.  The special characters listed in Tables 1 through 6.
+
+
+           Tables  1  through  6  describe  the various ASxxxx label and
+        field terminators, assignment operators, operand separators, as-
+        sembly, unary, binary, and radix operators.
+
+
+        THE ASSEMBLER                                           PAGE 1-7
+        SYMBOLS AND EXPRESSIONS
+
+
+        Table 1         Label Terminators and Assignment Operators
+        ----------------------------------------------------------------
+
+                :   Colon               Label terminator.
+
+                ::  Double colon        Label  Terminator;   defines the
+                                        label as a global label.
+
+                =   Equal sign          Direct assignment operator.
+
+                ==  Double equal        Direct assignment operator;
+                    sign                defines  the  symbol as a global
+                                        symbol.
+
+        ----------------------------------------------------------------
+
+
+
+
+
+        Table 2         Field Terminators and Operand Separators
+        ----------------------------------------------------------------
+
+                    Tab                 Item or field terminator.
+
+                    Space               Item or field terminator.
+
+                ,   Comma               Operand field separator.
+
+                ;   Semicolon           Comment field indicator.
+
+        ----------------------------------------------------------------
+
+
+
+
+
+        Table 3         Assembler Operators
+        ----------------------------------------------------------------
+
+                #   Number sign         Immediate expression indicator.
+
+                .   Period              Current location counter.
+
+                (   Left parenthesis    Expression delimiter.
+
+                )   Right parenthesis   Expression delimeter.
+
+        ----------------------------------------------------------------
+
+
+        THE ASSEMBLER                                           PAGE 1-8
+        SYMBOLS AND EXPRESSIONS
+
+
+
+
+
+
+
+        Table 4         Unary Operators
+        ----------------------------------------------------------------
+
+                <   Left bracket        <FEDC   Produces  the lower byte
+                                                value of the expression.
+                                                (DC)
+
+                >   Right bracket       >FEDC   Produces  the upper byte
+                                                value of the expression.
+                                                (FE)
+
+                +   Plus sign           +A      Positive value of A
+
+                -   Minus sign          -A      Produces   the  negative
+                                                (2's complement) of A.
+
+                ~   Tilde               ~A      Produces the 1's comple-
+                                                ment of A.
+
+                '   Single quote        'D      Produces  the  value  of
+                                                the character D.
+
+                "   Double quote        "AB     Produces the double byte
+                                                value for AB.
+
+                \   Backslash           '\n     Unix style characters
+                                                \b, \f, \n, \r, \t
+                                     or '\001   or octal byte values.
+
+        ----------------------------------------------------------------
+
+
+
+
+
+
+
+        THE ASSEMBLER                                           PAGE 1-9
+        SYMBOLS AND EXPRESSIONS
+
+
+        Table 5         Binary Operators
+        ----------------------------------------------------------------
+
+                <<  Double          0800 << 4   Produces the 4 bit
+                    Left bracket                left-shifted   value  of
+                                                0800.  (8000)
+
+                >>  Double          0800 >> 4   Produces the 4 bit
+                    Right bracket               right-shifted  value  of
+                                                0800.  (0080)
+
+                +   Plus sign       A + B       Arithmetic      Addition
+                                                operator.
+
+                -   Minus sign      A - B       Arithmetic   Subtraction
+                                                operator.
+
+                *   Asterisk        A * B       Arithmetic   Multiplica-
+                                                tion operator.   (signed
+                                                16-bit)
+
+                /   Slash           A / B       Arithmetic      Division
+                                                operator.        (signed
+                                                16-bit quotient)
+
+                &   Ampersand       A & B       Logical AND operator.
+
+                |   Bar             A | B       Logical OR operator.
+
+                %   Percent sign    A % B       Modulus operator.
+                                                (16-bit value)
+
+                ^   Up arrow or     A ^ B       EXCLUSIVE OR operator.
+                    circumflex
+
+        ----------------------------------------------------------------
+
+
+
+
+
+
+
+        THE ASSEMBLER                                          PAGE 1-10
+        SYMBOLS AND EXPRESSIONS
+
+
+        Table 6         Temporary Radix Operators
+        ----------------------------------------------------------------
+
+                $%,   0b, 0B            Binary radix operator.
+
+                $&,   0o, 0O, 0q, 0Q    Octal radix operator.
+
+                $#,   0d, 0D            Decimal radix operator.
+
+                $$,   0h, 0H, 0x, 0X    Hexidecimal radix operator.
+
+
+                Potential  ambiguities arising from the use of 0b and 0d
+                as temporary radix operators may be circumvented by pre-
+                ceding  all  non-prefixed  hexidecimal  numbers with 00.
+                Leading 0's are required in any  case  where  the  first
+                hexidecimal  digit is abcdef as the assembler will treat
+                the letter sequence as a label.
+
+        ----------------------------------------------------------------
+
+
+
+
+
+
+
+        1.3.2  User-Defined Symbols
+
+
+           User-defined  symbols are those symbols that are equated to a
+        specific value through a direct assignment statement  or  appear
+        as  labels.  These symbols are added to the User Symbol Table as
+        they are encountered during assembly.
+
+        The following rules govern the creation of user-defined symbols:
+
+             1.  Symbols  can  be  composed  of alphanumeric characters,
+                 dollar signs ($),  periods  (.),  and  underscores  (_)
+                 only.
+
+             2.  The  first  character  of a symbol must not be a number
+                 (except in the case of local symbols).
+
+             3.  The  first 79 characters of a symbol must be unique.  A
+                 symbol  can  be  written  with  more  than   79   legal
+                 characters,  but the 80th and subsequent characters are
+                 ignored.
+
+             4.  Spaces and Tabs must not be embedded within a symbol.
+
+
+
+
+        THE ASSEMBLER                                          PAGE 1-11
+        SYMBOLS AND EXPRESSIONS
+
+
+        1.3.3  Local Symbols
+
+
+           Local  symbols are specially formatted symbols used as labels
+        within a block of coding that has been delimited as a local sym-
+        bol  block.   Local  symbols  are  of  the form n$, where n is a
+        decimal integer from 0 to 255,  inclusive.   Examples  of  local
+        symbols are:
+
+              1$
+              27$
+              138$
+              244$
+
+           The  range  of  a local symbol block consists of those state-
+        ments between two normally constructed  symbolic  labels.   Note
+        that a statement of the form:
+
+              ALPHA = EXPRESSION
+
+        is a direct assignment statement but does not create a label and
+        thus does not delimit the range of a local symbol block.
+
+           Note that the range of a local symbol block may extend across
+        program areas.
+
+           Local symbols provide a convenient means of generating labels
+        for branch instructions and other such references  within  local
+        symbol  blocks.   Using local symbols reduces the possibility of
+        symbols with multiple definitions appearing within a  user  pro-
+        gram.   In  addition,  the  use  of local symbols differentiates
+        entry-point labels from local labels, since local labels  cannot
+        be referenced from outside their respective local symbol blocks.
+        Thus, local symbols of the same name can appear in  other  local
+        symbol blocks without conflict.  Local symbols require less sym-
+        bol table space than normal symbols.  Their use is recommended.
+
+           The  use of the same local symbol within a local symbol block
+        will generate one or both of the m or p errors.
+
+
+        THE ASSEMBLER                                          PAGE 1-12
+        SYMBOLS AND EXPRESSIONS
+
+
+        Example of local symbols:
+
+                a:      ldx     #atable ;get table address
+                        lda     #0d48   ;table length
+                1$:     clr     ,x+     ;clear
+                        deca
+                        bne     1$
+
+                b:      ldx     #btable ;get table address
+                        lda     #0d48   ;table length
+                1$:     clr     ,x+     ;clear
+                        deca
+                        bne     1$
+
+
+        1.3.4  Current Location Counter
+
+
+           The  period  (.) is the symbol for the current location coun-
+        ter.  When used in the operand  field  of  an  instruction,  the
+        period   represents  the  address  of  the  first  byte  of  the
+        instruction:
+
+                AS:     ldx     #.      ;The period (.) refers to
+                                        ;the address of the ldx
+                                        ;instruction.
+
+           When  used  in  the  operand field of an ASxxxx directive, it
+        represents the address of the current byte or word:
+
+                QK = 0
+
+                .word   0xFFFE,.+4,QK   ;The operand .+4 in the .word
+                                        ;directive represents a value
+                                        ;stored in the second of the
+                                        ;three words during assembly.
+
+           If  we  assume  the  current  value of the program counter is
+        0H0200, then during assembly, ASxxxx  reserves  three  words  of
+        storage  starting  at  location 0H0200.  The first value, a hex-
+        idecimal constant FFFE, will be stored at location 0H0200.   The
+        second  value  represented  by  .+4  will  be stored at location
+        0H0202, its value will be 0H0206 ( = 0H0202  +  4).   The  third
+        value  defined  by  the  symbol  QK  will  be placed at location
+        0H0204.
+
+           At the beginning of each assembly pass, ASxxxx resets the lo-
+        cation counter.  Normally, consecutive memory locations are  as-
+        signed  to  each  byte  of  object code generated.  However, the
+        value of the location counter can be changed  through  a  direct
+        assignment statement of the following form:
+
+
+
+        THE ASSEMBLER                                          PAGE 1-13
+        SYMBOLS AND EXPRESSIONS
+
+
+              . = . + expression
+
+
+           The  new  location  counter can only be specified relative to
+        the current location counter.  Neglecting to specify the current
+        program  counter  along with the expression on the right side of
+        the assignment operator will generate the (.) error.   (Absolute
+        program areas may use the .org directive to specify the absolute
+        location of the current program counter.)
+
+        The following coding illustrates the use of the current location
+        counter:
+
+                .area   CODE1   (ABS)   ;program area CODE1
+                                        ;is ABSOLUTE
+
+                .org    0H100           ;set location to
+                                        ;0H100 absolute
+
+        num1:   ldx     #.+0H10         ;The label num1 has
+                                        ;the value 0H100.
+                                        ;X is loaded with
+                                        ;0H100 + 0H10
+
+                .org    0H130           ;location counter
+                                        ;set to 0H130
+
+        num2:   ldy     #.              ;The label num2 has
+                                        ;the value 0H130.
+                                        ;Y is loaded with
+                                        ;value 0H130.
+
+
+                .area   CODE2   (REL)   ;program area CODE2
+                                        ;is RELOCATABLE
+
+                . = . + 0H20            ;Set location counter
+                                        ;to relocatable 0H20 of
+                                        ;the program section.
+
+        num3:   .word   0               ;The label num3 has
+                                        ;the value
+                                        ;of relocatable 0H20.
+
+                . = . + 0H40            ;will reserve 0H40
+                                        ;bytes of storage as will
+                .blkb   0H40            ;or
+                .blkw   0H20
+
+           The  .blkb  and .blkw directives are the preferred methods of
+        allocating space.
+
+
+
+        THE ASSEMBLER                                          PAGE 1-14
+        SYMBOLS AND EXPRESSIONS
+
+
+        1.3.5  Numbers
+
+
+           ASxxxx  assumes that all numbers in the source program are to
+        be interpreted in decimal radix unless otherwise specified.  The
+        .radix  directive  may  be used to specify the default as octal,
+        decimal, or hexidecimal.  Individual numbers can  be  designated
+        as  binary, octal, decimal, or hexidecimal through the temporary
+        radix prefixes shown in table 6.
+
+           Negative  numbers  must be preceeded by a minus sign;  ASxxxx
+        translates such numbers into two's  complement  form.   Positive
+        numbers may (but need not) be preceeded by a plus sign.
+
+           Numbers are always considered to be absolute values, therefor
+        they are never relocatable.
+
+
+        1.3.6  Terms
+
+
+           A  term is a component of an expression and may be one of the
+        following:
+
+
+             1.  A number.
+
+             2.  A symbol:
+                 1.  A  period (.) specified in an expression causes the
+                     current location counter to be used.
+                 2.  A User-defined symbol.
+                 3.  An undefined symbol is assigned a value of zero and
+                     inserted in the User-Defined symbol table as an un-
+                     defined symbol.
+
+             3.  A single quote followed by a single ascii character, or
+                 a double quote followed by two ascii characters.
+
+             4.  An  expression enclosed in parenthesis.  Any expression
+                 so enclosed is evaluated and reduced to a  single  term
+                 before  the remainder of the expression in which it ap-
+                 pears is evaluated.  Parenthesis, for example,  may  be
+                 used  to  alter the left-to-right evaluation of expres-
+                 sions, (as in A*B+C versus A*(B+C)), or to apply a  un-
+                 ary operator to an entire expression (as in -(A+B)).
+
+             5.  A unary operator followed by a symbol or number.
+
+
+
+
+
+        THE ASSEMBLER                                          PAGE 1-15
+        SYMBOLS AND EXPRESSIONS
+
+
+        1.3.7  Expressions
+
+
+           Expressions  are  combinations  of  terms  joined together by
+        binary operators.  Expressions reduce to a  16-bit  value.   The
+        evaluation  of  an  expression includes the determination of its
+        attributes.  A resultant expression value may be  one  of  three
+        types  (as  described  later in this section):  relocatable, ab-
+        solute, and external.
+
+        Expressions are evaluate with an operand hierarchy as follows:
+
+                *       /       %       multiplication,
+                                        division, and
+                                        modulus first.
+
+                +       -               addition and
+                                        subtraction second.
+
+                <<      >>              left shift and
+                                        right shift third.
+
+                ^                       exclusive or fourth.
+
+                &                       logical and fifth.
+
+                |                       logical or last
+
+                except that unary operators take precedence over binary
+                operators.
+
+
+           A  missing  or  illegal  operator  terminates  the expression
+        analysis, causing error codes (o) and/or  (q)  to  be  generated
+        depending upon the context of the expression itself.
+
+           At assembly time the value of an external (global) expression
+        is equal to the value of the absolute part of  that  expression.
+        For  example,  the expression external+4, where 'external' is an
+        external symbol, has the value of 4.  This expression,  however,
+        when  evaluated  at link time takes on the resolved value of the
+        symbol 'external', plus 4.
+
+           Expressions,  when  evaluated  by  ASxxxx,  are  one of three
+        types:  relocatable, absolute, or external.  The following  dis-
+        tinctions are important:
+
+             1.  An  expression is relocatable if its value is fixed re-
+                 lative to the base address of the program area in which
+                 it appears;  it will have an offset value added at link
+                 time.  Terms that contain labels defined in relocatable
+                 program   areas   will   have   a   relocatable  value;
+
+
+        THE ASSEMBLER                                          PAGE 1-16
+        SYMBOLS AND EXPRESSIONS
+
+
+                 similarly, a period (.) in a relocatable program  area,
+                 representing  the value of the current program location
+                 counter, will also have a relocatable value.
+
+             2.  An  expression  is  absolute if its value is fixed.  An
+                 expression whose terms are numbers and ascii characters
+                 will  reduce  to  an absolute value.  A relocatable ex-
+                 pression or term minus a relocatable term,  where  both
+                 elements  being  evaluated  belong  to the same program
+                 area, is an absolute expression.  This is because every
+                 term  in  a  program area has the same relocation bias.
+                 When one term is subtracted from the other the  reloca-
+                 tion bias is zero.
+
+             3.  An  expression is external (or global) if it contains a
+                 single global reference (plus or minus an absolute  ex-
+                 pression  value) that is not defined within the current
+                 program.  Thus, an external  expression  is  only  par-
+                 tially  defined following assembly and must be resolved
+                 at link time.
+
+
+
+        1.4  GENERAL ASSEMBLER DIRECTIVES
+
+
+           An  ASxxxx  directive  is placed in the operator field of the
+        source line.  Only one directive is  allowed  per  source  line.
+        Each  directive  may  have  a blank operand field or one or more
+        operands.  Legal operands differ with each directive.
+
+
+        1.4.1  .module Directive
+
+        Format:
+
+                .module string
+
+           The .module directive causes the string to be included in the
+        assemblers output file as an identifier for this particular  ob-
+        ject  module.   The  string  may  be  from 1 to 79 characters in
+        length.  Only one identifier is allowed  per  assembled  module.
+        The  main use of this directive is to allow the linker to report
+        a modules' use of undefined symbols.  At link time all undefined
+        symbols  are  reported  and  the  modules  referencing  them are
+        listed.
+
+
+
+
+        THE ASSEMBLER                                          PAGE 1-17
+        GENERAL ASSEMBLER DIRECTIVES
+
+
+        1.4.2  .title Directive
+
+        Format:
+
+                .title  string
+
+           The .title directive provides a character string to be placed
+        on the second line of each page during listing.
+
+
+        1.4.3  .sbttl Directive
+
+        Format:
+
+                .sbttl  string
+
+           The .sbttl directive provides a character string to be placed
+        on the third line of each page during listing.
+
+
+        1.4.4  .page Directive
+
+        Format:
+
+                .page
+
+           The .page directive causes a page ejection with a new heading
+        to be printed.  The new page occurs after the next line  of  the
+        source  program is processed, this allows an immediately follow-
+        ing .sbttl directive to appear  on  the  new  page.   The  .page
+        source  line will not appear in the file listing.  Paging may be
+        disabled by invoking the -p directive.
+
+
+        1.4.5  .byte and .db Directives
+
+        Format:
+
+                .byte   exp             ;Stores the binary value
+                .db     exp             ;of the expression in the
+                                        ;next byte.
+
+                .byte   exp1,exp2,expn  ;Stores the binary values
+                .db     exp1,exp2,expn  ;of the list of expressions
+                                        ;in successive bytes.
+
+        where:  exp,    represent expressions that will be
+                exp1,   truncated to 8-bits of data.
+                .       Each expression will be calculated
+                .       as a 16-bit word expression,
+                .       the high-order byte will be truncated.
+                .       Multiple expressions must be
+
+
+        THE ASSEMBLER                                          PAGE 1-18
+        GENERAL ASSEMBLER DIRECTIVES
+
+
+                expn    separated by commas.
+
+           The  .byte  or .db directives are used to generate successive
+        bytes of binary data in the object module.
+
+
+        1.4.6  .word and .dw Directives
+
+        Format:
+
+                .word   exp             ;Stores the binary value
+                .dw     exp             ;of the expression in
+                                        ;the next word.
+
+                .word   exp1,exp2,expn  ;Stores the binary values
+                .dw     exp1,exp2,expn  ;of the list of expressions
+                                        ;in successive words.
+
+        where:  exp,    represent expressions that will occupy two
+                exp1,   bytes of data. Each expression will be
+                .       calculated as a 16-bit word expression.
+                .       Multiple expressions must be
+                expn    separated by commas.
+
+           The  .word  or .dw directives are used to generate successive
+        words of binary data in the object module.
+
+
+        1.4.7  .blkb, .blkw, and .ds Directives
+
+        Format:
+
+                .blkb   N       ;reserve N bytes of space
+                .blkw   N       ;reserve N words of space
+                .ds     N       ;reserve N bytes of space
+
+           The  .blkb  and .ds directives reserve byte blocks in the ob-
+        ject module;  the .blkw directive reserves word blocks.
+
+
+        1.4.8  .ascii Directive
+
+        Format:
+
+                .ascii  /string/
+
+        where:  string  is a string of printable ascii characters.
+
+                /  /    represent   the  delimiting  characters.   These
+                        delimiters   may   be   any   paired    printing
+                        characters,  as  long  as the characters are not
+                        contained within  the  string  itself.   If  the
+
+
+        THE ASSEMBLER                                          PAGE 1-19
+        GENERAL ASSEMBLER DIRECTIVES
+
+
+                        delimiting  characters  do not match, the .ascii
+                        directive will give the (q) error.
+
+        The  .ascii  directive  places  one binary byte of data for each
+        character in the string into the object module.
+
+
+        1.4.9  .ascis Directive
+
+        Format:
+
+                .ascis  /string/
+
+        where:  string  is a string of printable ascii characters.
+
+                /  /    represent   the  delimiting  characters.   These
+                        delimiters   may   be   any   paired    printing
+                        characters,  as  long  as the characters are not
+                        contained within  the  string  itself.   If  the
+                        delimiting  characters  do not match, the .ascis
+                        directive will give the (q) error.
+
+        The  .ascis  directive  places  one binary byte of data for each
+        character in the  string  into  the  object  module.   The  last
+        character in the string will have the high order bit set.
+
+
+        1.4.10  .asciz Directive
+
+        Format:
+
+                .asciz  /string/
+
+        where:  string  is a string of printable ascii characters.
+
+                /  /    represent   the  delimiting  characters.   These
+                        delimiters   may   be   any   paired    printing
+                        characters,  as  long  as the characters are not
+                        contained within  the  string  itself.   If  the
+                        delimiting  characters  do not match, the .asciz
+                        directive will give the (q) error.
+
+        The  .asciz  directive  places  one binary byte of data for each
+        character in the string into the object module.   Following  all
+        the  character  data  a  zero  byte is inserted to terminate the
+        character string.
+
+
+
+
+        THE ASSEMBLER                                          PAGE 1-20
+        GENERAL ASSEMBLER DIRECTIVES
+
+
+        1.4.11  .radix Directive
+
+        Format:
+
+                .radix  character
+
+        where:  character  represents  a single character specifying the
+                        default radix to be used for succeeding numbers.
+                        The character may be any one of the following:
+
+                        B,b     Binary
+
+                        O,o     Octal
+                        Q,q
+
+                        D,d     Decimal
+                        'blank'
+
+                        H,h     Hexidecimal
+                        X,x
+
+
+        1.4.12  .even Directive
+
+        Format:
+
+                .even
+
+           The .even directive ensures that the current location counter
+        contains an even boundary value by adding 1 if the current loca-
+        tion is odd.
+
+
+        1.4.13  .odd Directive
+
+        Format:
+
+                .odd
+
+           The  .odd directive ensures that the current location counter
+        contains an odd boundary value by adding one if the current  lo-
+        cation is even.
+
+
+
+
+        THE ASSEMBLER                                          PAGE 1-21
+        GENERAL ASSEMBLER DIRECTIVES
+
+
+        1.4.14  .area Directive
+
+        Format:
+
+                .area   name    [(options)]
+
+        where:  name    represents the symbolic name of the program sec-
+                        tion.   This  name  may  be  the  same  as   any
+                        user-defined  symbol  as  the area names are in-
+                        dependent of all symbols and labels.
+
+                options specify the type of program or data area:
+                        ABS     absolute
+                        REL     relocatable
+                        OVR     overlay
+                        CON     concatenate
+                        PAG     paged area
+
+
+           The .area directive provides a means of defining and separat-
+        ing multiple programming and data sections.   The  name  is  the
+        area  label used by the assembler and the linker to collect code
+        from various separately assembled modules into one section.  The
+        name may be from 1 to 79 characters in length.
+
+           The options are specified within parenthesis and separated by
+        commas as shown in the following example:
+
+                .area  TEST  (REL,CON)  ;This section is relocatable
+                                        ;and concatenated with other
+                                        ;sections of this program area.
+
+                .area  DATA  (REL,OVR)  ;This section is relocatable
+                                        ;and overlays other sections
+                                        ;of this program area.
+
+                .area  SYS   (ABS,OVR)  ;This section is defined as
+                                        ;absolute and overlays other
+                                        ;sections of this program area.
+
+                .area  PAGE  (PAG)      ;This is a paged section. The
+                                        ;section must be on a 256 byte
+                                        ;boundary and its length is
+                                        ;checked by the linker to be
+                                        ;no larger than 256 bytes.
+                                        ;This is useful for direct page
+                                        ;areas.
+
+
+
+        THE ASSEMBLER                                          PAGE 1-22
+        GENERAL ASSEMBLER DIRECTIVES
+
+
+           The  default  area type is REL|CON;  i.e.  a relocatable sec-
+        tion which is concatenated with other sections of code with  the
+        same area name.  The ABS option indicates an absolute area.  The
+        OVR and CON options indicate if program  sections  of  the  same
+        name  will overlay each other (start at the same location) or be
+        concatenated with each other (appended to each other).
+
+           Warning: ABS used to automatically invoke OVR and CON was not
+        allowed  with ABS.  This  behaviour  has been changed.  Absolute
+        sections  need an explicit  OVR flag to be overlayed  with other
+        sections of this program area.  Overlapping  absolute areas will
+        generate a warning unless OVR is specified.
+
+           Multiple  invocations  of  the  .area directive with the same
+        name must specify the same options or leave  the  options  field
+        blank,  this  defaults  to  the previously specified options for
+        this program area.
+
+        The   ASxxxx   assemblers   automatically  provide  two  program
+        sections:
+
+                '.  .ABS.'      This dummy section contains all absolute
+                                symbols and their values.
+
+                '_CODE'         This  is  the default program/data area.
+                                This program area is of type (REL,CON).
+
+        The  ASxxxx  assemblers  also automatically generate two symbols
+        for each program area:
+
+                's_<area>'      This is the starting address of the pro-
+                                gram area.
+
+                                indent  -16  'l_<area>'      This is the
+                                length of the program area.
+
+        The .area names and options are never case sensitive.
+
+
+        1.4.15  .org Directive
+
+        Format:
+
+                .org    exp
+
+        where:  exp     is  an absolute expression that becomes the cur-
+                        rent location counter.
+
+        The  .org directive is valid only in an absolute program section
+        and will give a (q) error if used in a relocatable program area.
+        The  .org  directive specifies that the current location counter
+        is to become the specified absolute value.
+
+
+
+
+        THE ASSEMBLER                                          PAGE 1-23
+        GENERAL ASSEMBLER DIRECTIVES
+
+
+        1.4.16  .globl Directive
+
+        Format:
+
+                .globl  sym1,sym2,...,symn
+
+        where:  sym1,           represent legal symbolic names. When
+                sym2,...        When multiple symbols are specified,
+                symn            they are separated by commas.
+
+           A  .globl directive may also have a label field and/or a com-
+        ment field.
+
+           The  .globl directive is provided to define (and thus provide
+        linkage to) symbols not  otherwise  defined  as  global  symbols
+        within  a  module.   In  defining  global  symbols the directive
+        .globl J is similar to:
+
+              J == expression or J::
+
+           Because  object  modules  are linked by global symbols, these
+        symbols are vital to a program.  All internal symbols  appearing
+        within  a  given program must be defined at the end of pass 1 or
+        they will be considered undefined.  The assembly directive  (-g)
+        can  be  be  invoked to make all undefined symbols global at the
+        end of pass 1.
+
+
+        1.4.17  .if, .else, and .endif Directives
+
+        Format:
+
+                .if     expr
+                .                       ;}
+                .                       ;} range of true condition
+                .                       ;}
+                .else
+                .                       ;}
+                .                       ;} range of false condition
+                .                       ;}
+                .endif
+
+           The  conditional  assembly directives allow you to include or
+        exclude blocks of source code during the assembly process, based
+        on the evaluation of the condition test.
+
+           The  range of true condition will be processed if the expres-
+        sion 'expr' is not zero (i.e.  true) and the range of false con-
+        dition  will  be processed if the expression 'expr' is zero (i.e
+        false).  The range of true condition is optional as is the .else
+        directive  and  the range of false condition.  The following are
+        all valid .if/.else/.endif constructions:
+
+
+        THE ASSEMBLER                                          PAGE 1-24
+        GENERAL ASSEMBLER DIRECTIVES
+
+
+
+                .if     A-4             ;evaluate A-4
+                .byte   1,2             ;insert bytes if A-4 is
+                .endif                  ;not zero
+
+                .if     K+3             ;evaluate K+3
+                .else
+                .byte   3,4             ;insert bytes if K+3
+                .endif                  ;is zero
+
+                .if     J&3             ;evaluate J masked by 3
+                .byte   12              ;insert this byte if J&3
+                .else                   ;is not zero
+                .byte   13              ;insert this byte if J&3
+                .endif                  ;is zero
+
+
+        The .if/.else/.endif directives may be nested upto 10 levels.
+
+           The  .page  directive  is  processed within a false condition
+        range to allow extended textual information to  be  incorporated
+        in  the  source  program  with  out  the need to use the comment
+        delimiter (;):
+
+                .if     0
+
+                .page
+                This text will be bypassed during assembly
+                but appear in the listing file.
+                .
+                .
+                .
+
+                .endif
+
+
+        1.4.18  .include Directive
+
+        Format:
+
+                .include        string
+
+        where:  string  represents  a  delimited string that is the file
+                        specification of an ASxxxx source file.
+
+           The .include directive is used to insert a source file within
+        the source file currently being assembled.  When this  directive
+        is encountered, an implicit .page directive is issued.  When the
+        end of the specified source file is reached, an  implicit  .page
+        directive is issued and input continues from the previous source
+        file.  The maximum nesting level of source files specified by  a
+        .include directive is five.
+
+
+        THE ASSEMBLER                                          PAGE 1-25
+        GENERAL ASSEMBLER DIRECTIVES
+
+
+           The  total  number  of separately specified .include files is
+        unlimited as each .include file is opened and then closed during
+        each pass made by the assembler.
+
+
+        1.4.19  .setdp Directive
+
+        Format:
+
+                .setdp [base [,area]]
+
+        The  set  direct  page  directive has a common format in all the
+        AS68xx assemblers.  The .setdp directive is used to  inform  the
+        assembler  of  the current direct page region and the offset ad-
+        dress within the selected area.  The normal  invocation  methods
+        are:
+
+                .area   DIRECT  (PAG)
+                .setdp
+
+                or
+
+                .setdp  0,DIRECT
+
+        for  all  the  68xx microprocessors (the 6804 has only the paged
+        ram area).  The commands specify that the direct page is in area
+        DIRECT and its offset address is 0 (the only valid value for all
+        but the 6809 microprocessor).  Be sure to place the DIRECT  area
+        at address 0 during linking.  When the base address and area are
+        not specified, then zero and the current area are the  defaults.
+        If  a  .setdp directive is not issued the assembler defaults the
+        direct page to the area "_CODE" at offset 0.
+
+           The  assembler  verifies  that  any  local variable used in a
+        direct variable reference is located in this area.  Local  vari-
+        able  and  constant value direct access addresses are checked to
+        be within the address range from 0 to 255.
+
+           External direct references are assumed by the assembler to be
+        in the correct area and have valid  offsets.   The  linker  will
+        check all direct page relocations to verify that they are within
+        the correct area.
+
+           The  6809  microprocessor  allows the selection of the direct
+        page to be on any 256 byte boundary by loading  the  appropriate
+        value  into the dp register.  Typically one would like to select
+        the page boundary at link time, one method follows:
+
+
+        THE ASSEMBLER                                          PAGE 1-26
+        GENERAL ASSEMBLER DIRECTIVES
+
+
+                .area   DIRECT  (PAG)   ; define the direct page
+                .setdp
+                .
+                .
+                .
+                .area   PROGRAM
+                .
+                ldd     #DIRECT         ; load the direct page register
+                tfr     a,dp            ; for access to the direct page
+
+        At  link  time specify the base and global equates to locate the
+        direct page:
+
+                -b DIRECT = 0x1000
+                -g DIRECT = 0x1000
+
+        Both  the  area address and offset value must be specified (area
+        and variable names are independent).   The  linker  will  verify
+        that  the  relocated  direct page accesses are within the direct
+        page.
+        The  preceeding  sequence  could  be repeated for multiple paged
+        areas, however an alternate method is to define a non-paged area
+        and use the .setdp directive to specify the offset value:
+
+                .area   DIRECT          ; define non-paged area
+                .
+                .
+                .
+                .area   PROGRAM
+                .
+                .setdp  0,DIRECT        ; direct page area
+                ldd     #DIRECT         ; load the direct page register
+                tfr     a,dp            ; for access to the direct page
+                .
+                .
+                .setdp  0x100,DIRECT    ; direct page area
+                ldd     #DIRECT+0x100   ; load the direct page register
+                tfr     a,dp            ; for access to the direct page
+
+        The  linker  will  verify that subsequent direct page references
+        are in the specified area and offset address range.  It  is  the
+        programmers responsibility to load the dp register with the cor-
+        rect page segment  corresponding  to  the  .setdp  base  address
+        specified.
+
+           For  those  cases  where a single piece of code must access a
+        defined data structure within a direct page and there  are  many
+        pages,  define  a  dumby  direct page linked at address 0.  This
+        dumby page is used only to define  the  variable  labels.   Then
+        load  the dp register with the real base address but donot use a
+        .setdp  directive.   This  method  is  equivalent   to   indexed
+
+
+        THE ASSEMBLER                                          PAGE 1-27
+        GENERAL ASSEMBLER DIRECTIVES
+
+
+        addressing,  where the dp register is the index register and the
+        direct addressing is the offset.
+
+
+        1.5  INVOKING ASXXXX
+
+
+           The  ASxxxx assemblers are command line oriented.  The PC as-
+        semblers are started with the appropriate option(s) and  file(s)
+        to assemble following the assembler name:
+
+        as-z80 [-dqxjgaloscpff] file1 [file2 file3 ...  file6]
+
+        The options are:
+
+                d       decimal listing
+                q       octal   listing
+                x       hex     listing (default)
+
+                        The listing radix affects the
+                        .lst, .rel, and .sym files.
+
+                j       add line number and debug information to file
+                g       undefined symbols made global
+                a       all user symbols made global
+
+                l       create list   output file1.lst
+                o       create object output file1.rel
+                s       create symbol output file1.sym
+
+                c       generate sdcdb debug information
+
+                p       disable listing pagination
+
+                        relocatable reference flagging:
+
+                f       by  `   in the listing file
+                ff      by mode in the listing file
+
+        asx8051 specific command line option:
+                -I  Add the named directory to the include file
+                        search path.  This option may be used more than once.
+                        Directories are searched in the order given.
+
+           The file name for the .lst, .rel, and .sym files is the first
+        file name specified in the command line.  All output  files  are
+        ascii  text  files which may be edited, copied, etc.  The output
+        files are the concatenation of all the input files, if files are
+        to  be  assembled  independently  invoke  the assembler for each
+        file.
+
+           The  .rel  file contains a radix directive so that the linker
+        will use the proper conversion for this file.  Linked files  may
+        have different radices.
+
+        ASXXXX assembles supported by and distributed with SDCC are:
+                asx8051         (Intel 8051)
+                as-z80          (Zilog Z80 / Hitachi HD64180)
+                as-gbz80        (GameBoy Z80-like CPU)
+                as-hc08         (Motorola 68HC08)
+
+
+        THE ASSEMBLER                                          PAGE 1-28
+        INVOKING ASXXXX
+
+
+           If  the list (l) option is specified without the symbol table
+        (s) option, the symbol table is placed at the end of the listing
+        file.
+
+
+        1.6  ERRORS
+
+
+           The  ASxxxx assemblers provide limited diagnostic error codes
+        during the assembly process, these errors will be noted  in  the
+        listing file and printed on the stderr device.
+
+           The assembler reports the errors on the stderr device as
+
+                ?ASxxxx-Error-<*> in line nnn of filename
+
+        where  * is the error code, nnn is the line number, and filename
+        is the source/include file.
+
+           The errors are:
+
+              (.)   This  error  is caused by an absolute direct assign-
+                    ment of the current location counter
+                          . = expression (incorrect)
+                    rather than the correct
+                          . = . + expression
+
+              (a)   Indicates  a machine specific addressing or address-
+                    ing mode error.
+
+              (b)   Indicates a direct page boundary error.
+
+              (d)   Indicates a direct page addressing error.
+
+              (i)   Caused  by  an  .include file error or an .if/.endif
+                    mismatch.
+
+              (m)   Multiple  definitions  of  the  same label, multiple
+                    .module directives, or multiple  conflicting  attri-
+                    butes in an .area directive.
+
+              (o)   Directive  or  mnemonic error or the use of the .org
+                    directive in a relocatable area.
+
+              (p)   Phase error:  label location changing between passes
+                    2 and 3.  Normally caused by having  more  than  one
+                    level of forward referencing.
+
+              (q)   Questionable syntax:  missing or improper operators,
+                    terminators, or delimiters.
+
+              (r)   Relocation  error:   logic  operation attempted on a
+
+
+        THE ASSEMBLER                                          PAGE 1-29
+        ERRORS
+
+
+                    relocatable term, addition of two relocatable terms,
+                    subtraction  of two relocatable terms not within the
+                    same programming area or external symbols.
+
+              (u)   Undefined symbol encountered during assembly.
+
+
+        1.7  LISTING FILE
+
+
+           The  (-l) option produces an ascii output listing file.  Each
+        page of output contains a four line header:
+
+
+             1.  The ASxxxx program name and page number
+
+             2.  Title from a .title directive (if any)
+
+             3.  Subtitle from a .sbttl directive (if any)
+
+             4.  Blank line
+
+
+
+        Each succeeding line contains five fields:
+
+
+             1.  Error field (first three characters of line)
+
+             2.  Current location counter
+
+             3.  Generated code in byte format
+
+             4.  Source text line number
+
+             5.  Source text
+
+
+           The error field may contain upto 2 error flags indicating any
+        errors encountered while assembling this line of source code.
+
+           The  current  location counter field displays the 16-bit pro-
+        gram position.  This field will be in the selected radix.
+
+           The generated code follows the program location.  The listing
+        radix determines the number of bytes that will be  displayed  in
+        this field.  Hexidecimal listing allows six bytes of data within
+        the field, decimal and octal allow four bytes within the  field.
+        If more than one field of data is generated from the assembly of
+        a single line of source code, then the data field is repeated on
+        successive lines.
+
+
+
+        THE ASSEMBLER                                          PAGE 1-30
+        LISTING FILE
+
+
+           The source text line number is printed in decimal and is fol-
+        lowed by the source text.
+
+           Two  special  cases  will  disable  the  listing of a line of
+        source text:
+
+             1.  Source line with a .page directive is never listed.
+
+             2.  Source  line  with  a  .include  file  directive is not
+                 listed unless the .include file cannot be opened.
+
+
+           Two  data  field  options  are  available to flag those bytes
+        which will be relocated by the linker.   If  the  -f  option  is
+        specified  then  each  byte to be relocated will be preceeded by
+        the '`' character.  If the -ff option  is  specified  then  each
+        byte  to  be relocated will be preceeded by one of the following
+        characters:
+
+             1.  *   paged relocation
+
+             2.  u   low  byte of unsigned word or unsigned byte
+
+             3.  v   high byte of unsigned word
+
+             4.  p   PCR low  byte of word relocation or PCR byte
+
+             5.  q   PCR high byte of word relocation
+
+             6.  r   low  byte relocation or byte relocation
+
+             7.  s   high byte relocation
+
+
+
+        1.8  SYMBOL TABLE FILE
+
+
+           The symbol table has two parts:
+
+             1.  The alphabetically sorted list of symbols and/or labels
+                 defined or referenced in the source program.
+
+             2.  A  list of the program areas defined during assembly of
+                 the source program.
+
+
+           The sorted list of symbols and/or labels contains the follow-
+        ing information:
+
+             1.  Program  area  number (none if absolute value or exter-
+                 nal)
+
+
+        THE ASSEMBLER                                          PAGE 1-31
+        SYMBOL TABLE FILE
+
+
+             2.  The symbol or label
+
+             3.  Directly assigned symbol is denoted with an (=) sign
+
+             4.  The  value of a symbol, location of a label relative to
+                 the program area base address (=0), or a ****  indicat-
+                 ing the symbol or label is undefined.
+
+             5.  The  characters:   G - global, R - relocatable, and X -
+                 external.
+
+
+           The list of program areas provides the correspondence between
+        the program area numbers and the defined program areas, the size
+        of the program areas, and the area flags (attributes).
+
+
+        1.9  OBJECT FILE
+
+
+           The  object  file is an ascii file containing the information
+        needed by the linker to bind multiple object modules into a com-
+        plete  loadable  memory  image.   The object module contains the
+        following designators:
+
+                [XDQ][HL]
+                        X       Hexidecimal radix
+                        D       Decimal radix
+                        Q       Octal radix
+
+                        H       Most significant byte first
+                        L       Least significant byte first
+
+                H       Header
+                M       Module
+                A       Area
+                S       Symbol
+                T       Object code
+                R       Relocation information
+                P       Paging information
+
+           Refer to the linker for a detailed description of each of the
+        designators and the format of the information contained  in  the
+        object file.
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                    CHAPTER 2
+
+                                   THE LINKER
+
+
+
+
+
+        2.1  ASLINK RELOCATING LINKER
+
+
+           ASLINK is the companion linker for the ASxxxx assemblers.
+
+           The  program ASLINK is a general relocating linker performing
+        the following functions:
+
+             1.  Bind multiple object modules into a single memory image
+
+             2.  Resolve inter-module symbol references
+
+             3.  Combine  code  belonging to the same area from multiple
+                 object files into a single contiguous memory region
+
+             4.  Search and import object module libraries for undefined
+                 global variables
+
+             5.  Perform   byte   and   word  program  counter  relative
+                 (pc or pcr) addressing calculations
+
+             6.  Define absolute symbol values at link time
+
+             7.  Define absolute area base address values at link time
+
+             8.  Produce Intel Hex or Motorola S19 output file
+
+             9.  Produce a map of the linked memory image
+
+            10.  Produce  an updated listing file with the relocated ad-
+                 dresses and data
+
+
+
+
+
+        THE LINKER                                              PAGE 2-2
+        INVOKING ASLINK
+
+
+        2.2  INVOKING ASLINK
+
+
+           The  linker  may run in the command line mode or command file
+        modes.  The allowed startup linker commands are:
+
+        -c/-f           command line / command file modes
+
+        -p/-n           enable/disable echo file.lnk input to stdout
+
+           If  command  line  mode is selected, all linker commands come
+        from stdin, if the command file mode is  selected  the  commands
+        are input from the specified file (extension must be .lnk).
+
+           Most  sytems require the initial options to be entered on the
+           command line:
+
+                ASLINK -[cfpn]
+
+           Some  systems  may  request the arguments after the linker is
+           started at a system specific prompt:
+
+                ASLINK
+                argv:  -[cfpn]
+
+        After invoking the linker the valid options are:
+
+             1.  -i/-s   Intel Hex (file.ihx) or Motorola S19 (file.s19)
+                 image output file.
+
+             2.  -m      Generate a map file (file.map).  This file con-
+                 tains a list of the symbols (by area) with absolute ad-
+                 dresses,  sizes  of  linked  areas,  and  other linking
+                 information.
+
+             3.  -xdq    Specifies  the  number  radix  for the map file
+                 (Hexidecimal, Decimal, or Octal).
+
+             4.  -u      Generate  an  updated  listing  file (file.rst)
+                 derived from the relocated addresses and data from  the
+                 linker
+
+             5.  fileN   Files  to  be linked.  Files may be on the same
+                 line as the above options or on a separate line(s)  one
+                 file  per line or multiple files separated by spaces or
+                 tabs.
+
+             6.  -b  area = expression (one definition per line)
+                 This  specifies  an area base address where the expres-
+                 sion may contain constants and/or defined symbols  from
+                 the linked files.
+
+             7.  -g  symbol = expression (one definition per line)
+                 This  specifies  the value for the symbol where the ex-
+                 pression may contain constants and/or  defined  symbols
+                 from the linked files.
+
+             8.  -k  library directory path
+                 (one  definition  per line) This specifies one possible
+
+
+
+        THE LINKER                                              PAGE 2-3
+        INVOKING ASLINK
+
+
+                 path to an object library.  More than one path  is  al-
+                 lowed.
+
+             9.  -l  library file specification
+                 (one  definition  per  line)  This specifies a possible
+                 library file.  More than one file is allowed.
+
+            10.  -e      or null line, terminates input to the linker.
+
+        ASLINK linkers supported by and distributed with SDCC are:
+                aslink          (Intel 8051)
+                link-z90        (Zilog Z80 / Hitachi HD64180)
+                link-gbz80      (GameBoy Z80-like CPU)
+                link-hc08       (Motorola 68HC08)
+
+        aslink (Intel 8051) specific options:
+
+        Output:
+          -j   Produce NoICE debug as file[NOI]
+          -z   Produce SDCdb debug as file[cdb]
+          -u   Update listing file(s) with link data as file(s)[.RST]
+        Miscellaneous:
+          -a   [iram-size] Check for internal RAM overflow
+          -v   [xram-size] Check for external RAM overflow
+          -w   [code-size] Check for code overflow
+          -y   Generate memory usage summary file[mem]
+          -Y   Pack internal ram
+          -A   [stack-size] Allocate space for stack
+
+
+        link-z80 (Zilog Z80 / Hitachi HD64180) specific options:
+
+        Map format:
+          -j   no$gmb symbol file generated as file[SYM]
+        Output:
+          -z   Produce SDCdb debug as file[cdb]
+          -Z   Gameboy image as file[GB]
+        List:
+          -u   Update listing file(s) with link data as file(s)[.RST]
+
+
+        link-gbz80 (GameBoy Z80-like CPU) specific options:
+
+        Relocation:
+          -yo  Number of rom banks (default: 2)
+          -ya  Number of ram banks (default: 0)
+          -yt  MBC type (default: no MBC)
+          -yn  Name of program (default: name of output file)
+          -yp# Patch one byte in the output GB file (# is: addr=byte)
+        Map format:
+          -j   no$gmb symbol file generated as file[SYM]
+        Output:
+          -Z   Gameboy image as file[GB]
+        List:
+          -u   Update listing file(s) with link data as file(s)[.RST]
+
+
+        link-hc08 (Motorola 68HC08) specific options:
+        Output:
+          -t   ELF executable as file[elf]
+          -j    Produce NoICE debug as file[NOI]
+          -z   Produce SDCdb debug as file[cdb]
+          -u    Update listing file(s) with link data as file(s)[.RST]
+        Miscellaneous:
+          -a    [iram-size] Check for internal RAM overflow
+          -v    [xram-size] Check for external RAM overflow
+          -w    [code-size] Check for code overflow
+
+
+
+        2.3  LIBRARY PATH(S) AND FILE(S)
+
+
+           The process of resolving undefined symbols after scanning the
+        input object  files  includes  the  scanning  of  object  module
+        libraries.   The  linker will search through all combinations of
+        the library path specifications (input by the -k option) and the
+        library  file  specifications (input by the -l option) that lead
+        to an existing library file.  Each library file contains a  list
+        (one  file  per  line)  of  modules  included in this particular
+        library.  Each existing object module is scanned for a match  to
+        the undefined symbol.  The first module containing the symbol is
+        then linked with the previous modules to resolve the symbol  de-
+        finition.   The  library  object  modules are rescanned until no
+        more symbols can be resolved.   The  scanning  algorithm  allows
+        resolution  of  back references.  No errors are reported for non
+        existant library files or object modules.
+
+           The  library  file  specification may be formed in one of two
+        ways:
+
+             1.  If  the  library  file  contained an absolute path/file
+                 specification  then  this  is   the   object   module's
+                 path/file.
+                 (i.e.  C:\...)
+
+             2.  If  the  library  file  contains  a  relative path/file
+                 specification then the concatenation of  the  path  and
+
+
+        THE LINKER                                              PAGE 2-4
+        LIBRARY PATH(S) AND FILE(S)
+
+
+                 this  file  specification  becomes  the object module's
+                 path/file.
+                 (i.e.  \...)
+
+
+           As  an example, assume there exists a library file termio.lib
+        in the syslib directory specifying the following object modules:
+
+        \6809\io_disk        first object module
+        d:\special\io_comm   second object module
+
+        and the following parameters were specified to the linker:
+
+        -k c:\iosystem\    the first path
+        -k c:\syslib\      the second path
+
+        -l termio          the first library file
+        -l io              the second library file (no such file)
+
+        The  linker  will attempt to use the following object modules to
+        resolve any undefined symbols:
+
+        c:\syslib\6809\io_disk.rel     (concatenated path/file)
+        d:\special\io_comm.rel         (absolute path/file)
+
+        all  other path(s)/file(s) don't exist.  (No errors are reported
+        for non existant path(s)/file(s).)
+
+
+        2.4  ASLINK PROCESSING
+
+
+           The  linker  processes  the  files  in  the  order  they  are
+        presented.  The first pass through the input files  is  used  to
+        define  all  program  areas, the section area sizes, and symbols
+        defined or referenced.  Undefined symbols will initiate a search
+        of any specified library file(s) and the importing of the module
+        containing the symbol definition.  After the first pass  the  -b
+        (area  base  address) definitions, if any, are processed and the
+        areas linked.
+
+           The  area  linking proceeds by first examining the area types
+        ABS, CON, REL, OVR and PAG.  Absolute areas (ABS) from  separate
+        object modules are always overlayed and have been assembled at a
+        specific address, these are not normally relocated (if a -b com-
+        mand  is  used  on an absolute area the area will be relocated).
+        Relative areas (normally defined as REL|CON) have a base address
+        of  0x0000  as read from the object files, the -b command speci-
+        fies the beginning address of the area.  All subsequent relative
+        areas  will  be  concatenated  with  proceeding  relative areas.
+        Where specific ordering is desired, the first linker input  file
+        should  have  the area definitions in the desired order.  At the
+
+
+        THE LINKER                                              PAGE 2-5
+        ASLINK PROCESSING
+
+
+        completion of the area linking all area  addresses  and  lengths
+        have  been determined.  The areas of type PAG are verified to be
+        on a 256 byte boundary and that the length does not  exceed  256
+        bytes.  Any errors are noted on stderr and in the map file.
+
+           Next  the  global symbol definitions (-g option), if any, are
+        processed.  The symbol definitions have been delayed until  this
+        point because the absolute addresses of all internal symbols are
+        known and can be used in the expression calculations.
+
+           Before  continuing  with the linking process the symbol table
+        is scanned to determine if any symbols have been referenced  but
+        not defined.  Undefined symbols are listed on the stderr device.
+        if a .module directive was included in the  assembled  file  the
+        module  making  the reference to this undefined variable will be
+        printed.
+
+           Constants  defined  as global in more than one module will be
+        flagged as multiple definitions if their values are not  identi-
+        cal.
+
+           After  the  preceeding  processes are complete the linker may
+        output a map file (-m option).  This file provides the following
+        information:
+
+             1.  Global symbol values and label absolute addresses
+
+             2.  Defined areas and there lengths
+
+             3.  Remaining undefined symbols
+
+             4.  List of modules linked
+
+             5.  List of library modules linked
+
+             6.  List of -b and -g definitions
+
+
+
+
+           The final step of the linking process is performed during the
+        second pass of the input files.  As the xxx.rel files  are  read
+        the code is relocated by substituting the physical addresses for
+        the referenced symbols and areas and may be output in  Intel  or
+        Motorola  formats.   The  number of files linked and symbols de-
+        fined/referenced is limited by the processor space available  to
+        build the area/symbol lists.  If the -u option is specified then
+        the listing files  (file.lst)  associated  with  the  relocation
+        files  (file.rel)  are  scanned  and  used  to create a new file
+        (file.rst) which has all addresses and data relocated  to  their
+        final values.
+
+
+
+        THE LINKER                                              PAGE 2-6
+        LINKER INPUT FORMAT
+
+
+        2.5  LINKER INPUT FORMAT
+
+
+           The  linkers'  input  object file is an ascii file containing
+        the information needed by the linker  to  bind  multiple  object
+        modules into a complete loadable memory image.
+
+        The object module contains the following designators:
+
+                [XDQ][HL]
+                        X       Hexidecimal radix
+                        D       Decimal radix
+                        Q       Octal radix
+
+                        H       Most significant byte first
+                        L       Least significant byte first
+
+                H       Header
+                M       Module
+                A       Area
+                S       Symbol
+                T       Object code
+                R       Relocation information
+                P       Paging information
+
+
+        2.5.1  Object Module Format
+
+
+           The  first  line  of  an object module contains the [XDQ][HL]
+        format specifier (i.e.  XH indicates  a  hexidecimal  file  with
+        most significant byte first) for the following designators.
+
+
+        2.5.2  Header Line
+
+                H aa areas gg global symbols
+
+           The  header  line  specifies  the number of areas(aa) and the
+        number of global symbols(gg) defined or referenced in  this  ob-
+        ject module segment.
+
+
+
+
+        THE LINKER                                              PAGE 2-7
+        LINKER INPUT FORMAT
+
+
+        2.5.3  Module Line
+
+                M name
+
+           The  module  line  specifies  the module name from which this
+        header segment was assembled.  The module line will  not  appear
+        if the .module directive was not used in the source program.
+
+
+        2.5.4  Symbol Line
+
+                S string Defnnnn
+
+                        or
+
+                S string Refnnnn
+
+           The  symbol line defines (Def) or references (Ref) the symbol
+        'string' with the value nnnn.  The defined value is relative  to
+        the  current area base address.  References to constants and ex-
+        ternal global symbols will always appear before the  first  area
+        definition.  References to external symbols will have a value of
+        zero.
+
+
+        2.5.5  Area Line
+
+                A label size ss flags ff
+
+           The  area  line  defines the area label, the size (ss) of the
+        area in bytes, and the area flags (ff).  The area flags  specify
+        the ABS, REL, CON, OVR, and PAG parameters:
+
+                OVR/CON  (0x04/0x00 i.e.  bit position 2)
+
+                ABS/REL  (0x08/0x00 i.e.  bit position 3)
+
+                PAG      (0x10 i.e.  bit position 4)
+
+
+        2.5.6  T Line
+
+                T xx xx nn nn nn nn nn ...
+
+           The  T  line contains the assembled code output by the assem-
+        bler with xx xx being the offset address from the  current  area
+        base address and nn being the assembled instructions and data in
+        byte format.
+
+
+
+
+        THE LINKER                                              PAGE 2-8
+        LINKER INPUT FORMAT
+
+
+        2.5.7  R Line
+
+                R 0 0 nn nn n1 n2 xx xx ...
+
+           The R line provides the relocation information to the linker.
+        The nn nn value is the current area index, i.e.  which area  the
+        current  values  were  assembled.  Relocation information is en-
+        coded in groups of 4 bytes:
+
+             1.  n1  is  the  relocation mode and object format, for the
+                 adhoc extension modes refer to asxxxx.h or aslink.h
+                 1.  bit 0  word(0x00)/byte(0x01)
+                 2.  bit 1  relocatable area(0x00)/symbol(0x02)
+                 3.  bit 2  normal(0x00)/PC relative(0x04) relocation
+                 4.  bit 3  1-byte(0x00)/2-byte(0x08)  object format for
+                     byte data
+                 5.  bit 4  signed(0x00)/unsigned(0x10) byte data
+                 6.  bit 5  normal(0x00)/page '0'(0x20) reference
+                 7.  bit 6  normal(0x00)/page 'nnn'(0x40) reference
+                 8.  bit 7  LSB  byte(0x00)/MSB  byte(0x80)  with 2-byte
+                     mode
+
+             2.  n2  is  a byte index into the corresponding (i.e.  pre-
+                 ceeding) T line data (i.e.  a pointer to the data to be
+                 updated  by  the  relocation).   The T line data may be
+                 1-byte or  2-byte  byte  data  format  or  2-byte  word
+                 format.
+
+             3.  xx xx  is the area/symbol index for the area/symbol be-
+                 ing referenced.  the corresponding area/symbol is found
+                 in the header area/symbol lists.
+
+
+        The groups of 4 bytes are repeated for each item requiring relo-
+        cation in the preceeding T line.
+
+
+        2.5.8  P Line
+
+                P 0 0 nn nn n1 n2 xx xx
+
+           The  P  line provides the paging information to the linker as
+        specified by a .setdp directive.  The format of  the  relocation
+        information is identical to that of the R line.  The correspond-
+        ing T line has the following information:
+                T xx xx aa aa bb bb
+
+           Where  aa aa is the area reference number which specifies the
+        selected page area and bb bb is the base address  of  the  page.
+        bb bb will require relocation processing if the 'n1 n2 xx xx' is
+        specified in the P line.  The linker will verify that  the  base
+
+
+        THE LINKER                                              PAGE 2-9
+        LINKER INPUT FORMAT
+
+
+        address is on a 256 byte boundary and that the page length of an
+        area defined with the PAG type is not larger than 256 bytes.
+
+           The  linker  defaults any direct page references to the first
+        area defined in the input REL file.  All ASxxxx assemblers  will
+        specify the _CODE area first, making this the default page area.
+
+
+        2.6  LINKER ERROR MESSAGES
+
+
+           The linker provides detailed error messages allowing the pro-
+        grammer to quickly find the errant code.   As  the  linker  com-
+        pletes  pass 1  over  the  input  file(s)  it  reports  any page
+        boundary or page length errors as follows:
+
+        ?ASlink-Warning-Paged Area PAGE0 Boundary Error
+
+        and/or
+
+        ?ASlink-Warning-Paged Area PAGE0 Length Error
+
+        where PAGE0 is the paged area.
+
+           During  Pass  two the linker reads the T, R, and P lines per-
+        forming the necessary relocations and  outputting  the  absolute
+        code.  Various errors may be reported during this process
+        The P line processing can produce only one possible error:
+
+        ?ASlink-Warning-Page Definition Boundary Error
+                 file        module      pgarea      pgoffset
+          PgDef  t6809l      t6809l      PAGE0       0001
+
+        The error message specifies the file and module where the .setdp
+        direct was issued and indicates  the  page  area  and  the  page
+        offset value determined after relocation.
+
+
+        The R line processing produces various errors:
+
+        ?ASlink-Warning-Byte PCR relocation error for symbol  bra2
+                 file        module      area        offset
+          Refby  t6809l      t6809l      TEST        00FE
+          Defin  tconst      tconst      .  .ABS.    0080
+
+        ?ASlink-Warning-Unsigned Byte error for symbol  two56
+                 file        module      area        offset
+          Refby  t6800l      t6800l      DIRECT      0015
+          Defin  tconst      tconst      .  .ABS.    0100
+
+
+        THE LINKER                                             PAGE 2-10
+        LINKER ERROR MESSAGES
+
+
+        ?ASlink-Warning-Page0 relocation error for symbol  ltwo56
+                 file        module      area        offset
+          Refby  t6800l      t6800l      DIRECT      000D
+          Defin  tconst      tconst      DIRECT      0100
+
+        ?ASlink-Warning-Page Mode relocation error for symbol  two56
+                 file        module      area        offset
+          Refby  t6809l      t6809l      DIRECT      0005
+          Defin  tconst      tconst      .  .ABS.    0100
+
+        ?ASlink-Warning-Page Mode relocation error
+                 file        module      area        offset
+          Refby  t           Pagetest    PROGRAM     0006
+          Defin  t           Pagetest    DIRECT      0100
+
+        These  error messages specify the file, module, area, and offset
+        within the area of the code  referencing  (Refby)  and  defining
+        (Defin) the symbol.  If the symbol is defined in the same module
+        as the reference the linker is unable to report the symbol name.
+        The  assembler  listing file(s) should be examined at the offset
+        from the specified area to located the offending code.
+
+           The errors are:
+
+             1.  The  byte PCR error is caused by exceeding the pc rela-
+                 tive byte branch range.
+
+             2.  The Unsigned byte error indicates an indexing value was
+                 negative or larger than 255.
+
+             3.  The  Page0  error is generated if the direct page vari-
+                 able is not in the page0 range of 0 to 255.
+
+             4.  The page mode error is generated if the direct variable
+                 is not within the current direct page (6809).
+
+
+
+        THE LINKER                                             Page 2-11
+        INTEL HEX OUTPUT FORMAT
+
+
+        2.7  INTEL HEX OUTPUT FORMAT
+
+        Record Mark Field    -  This  field  signifies  the  start  of a
+                                record, and consists of an  ascii  colon
+                                (:).
+
+        Record Length Field  -  This   field   consists   of  two  ascii
+                                characters which indicate the number  of
+                                data   bytes   in   this   record.   The
+                                characters are the result of  converting
+                                the  number  of  bytes  in binary to two
+                                ascii characters, high digit first.   An
+                                End  of  File  record contains two ascii
+                                zeros in this field.
+
+        Load Address Field   -  This  field  consists  of the four ascii
+                                characters which result from  converting
+                                the  the  binary value of the address in
+                                which to begin loading this record.  The
+                                order is as follows:
+
+                                    High digit of high byte of address.
+                                    Low digit of high byte of address.
+                                    High digit of low byte of address.
+                                    Low digit of low byte of address.
+
+                                In an End of File record this field con-
+                                sists of either four ascii zeros or  the
+                                program  entry  address.   Currently the
+                                entry address option is not supported.
+
+        Record Type Field    -  This  field  identifies the record type,
+                                which is either 0 for data records or  1
+                                for  an End of File record.  It consists
+                                of two ascii characters, with  the  high
+                                digit of the record type first, followed
+                                by the low digit of the record type.
+
+        Data Field           -  This  field consists of the actual data,
+                                converted to two ascii characters,  high
+                                digit first.  There are no data bytes in
+                                the End of File record.
+
+        Checksum Field       -  The  checksum  field is the 8 bit binary
+                                sum of the record length field, the load
+                                address  field,  the  record type field,
+                                and the data field.  This  sum  is  then
+                                negated  (2's  complement) and converted
+                                to  two  ascii  characters,  high  digit
+                                first.
+
+
+        THE LINKER                                             Page 2-12
+        MOTOROLA S1-S9 OUTPUT FORMAT
+
+
+        2.8  MOTORLA S1-S9 OUTPUT FORMAT
+
+        Record Type Field    -  This  field  signifies  the  start  of a
+                                record and  identifies  the  the  record
+                                type as follows:
+
+                                    Ascii S1 - Data Record
+                                    Ascii S9 - End of File Record
+
+        Record Length Field  -  This  field  specifies the record length
+                                which includes the  address,  data,  and
+                                checksum   fields.   The  8  bit  record
+                                length value is converted to  two  ascii
+                                characters, high digit first.
+
+        Load Address Field   -  This  field  consists  of the four ascii
+                                characters which result from  converting
+                                the  the  binary value of the address in
+                                which to begin loading this record.  The
+                                order is as follows:
+
+                                    High digit of high byte of address.
+                                    Low digit of high byte of address.
+                                    High digit of low byte of address.
+                                    Low digit of low byte of address.
+
+                                In an End of File record this field con-
+                                sists of either four ascii zeros or  the
+                                program  entry  address.   Currently the
+                                entry address option is not supported.
+
+        Data Field           -  This  field consists of the actual data,
+                                converted to two ascii characters,  high
+                                digit first.  There are no data bytes in
+                                the End of File record.
+
+        Checksum Field       -  The  checksum  field is the 8 bit binary
+                                sum of the record length field, the load
+                                address field, and the data field.  This
+                                sum is then  complemented  (1's  comple-
+                                ment)   and   converted   to  two  ascii
+                                characters, high digit first.
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                    CHAPTER 3
+
+                           BUILDING ASXXXX AND ASLINK
+
+
+
+
+           The assemblers and linker have been successfully compiled us-
+        ing  the  DECUS C  (PDP-11)  compiler  (patch  level   9)   with
+        RT-11/TSX+,  Eyring  Research  Institute,  Inc.   PDOS (680x0) C
+        V5.4b compiler, and Symantec C/C++ V6.1/V7.2.
+
+           The  device  specific  header  file  (i.e.  m6800.h, m6801.h,
+        etc.) contains the DECUS C 'BUILD' directives for  generating  a
+        command  file to compile, assemble, and link the necessary files
+        to prepare an executable image for a particular assembler.
+
+
+        3.1  BUILDING AN ASSEMBLER
+
+
+           The  building  of  a typical assembler (6809 for example) re-
+        quires the following files:
+
+             1.  M6809.H
+             2.  M09EXT.C
+             3.  M09MCH.C
+             4.  M09ADR.C
+             5.  M09PST.C
+             6.  ASXXXX.H
+             7.  ASMAIN.C
+             8.  ASLEX.C
+             9.  ASSYM.C
+            10.  ASSUBR.C
+            11.  ASEXPR.C
+            12.  ASDATA.C
+            13.  ASLIST.C
+            14.  ASOUT.C
+
+
+           The  first  five  files are the 6809 processor dependent sec-
+        tions which contain the following:
+
+
+
+
+        BUILDING ASXXXX AND ASLINK                              PAGE 3-2
+        BUILDING AN ASSEMBLER
+
+
+             1.  m6809.h -  header  file containing the machine specific
+                 definitions of constants,  variables,  structures,  and
+                 types
+
+             2.  m09ext -  device  description, byte order, and file ex-
+                 tension information
+
+             3.  m09pst -  a  table of the assembler general directives,
+                 special device directives, and assembler mnemonics with
+                 associated operation codes
+
+             4.  m09mch / m09adr -  machine specific code for processing
+                 the device mnemonics,  addressing  modes,  and  special
+                 directives
+
+
+           The  remaining nine files provide the device independent sec-
+        tions which handle the  details  of  file  input/output,  symbol
+        table  generation,  program/data areas, expression analysis, and
+        assembler directive processing.
+
+
+        3.2  BUILDING ASLINK
+
+
+           The building of the linker requires the following files:
+
+             1.  ASLINK.H
+             2.  LKMAIN.C
+             3.  LKLEX.C
+             4.  LKAREA.C
+             5.  LKHEAD.C
+             6.  LKSYM.C
+             7.  LKEVAL.C
+             8.  LKDATA.C
+             9.  LKLIST.C
+            10.  LKRLOC.C
+            11.  LKLIBR.C
+            12.  LKS19.C
+            13.  LKIHX.C
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                   APPENDIX A
+
+                                AS6800 ASSEMBLER
+
+
+
+
+
+        A.1  6800 REGISTER SET
+
+        The following is a list of the 6800 registers used by AS6800:
+
+                a,b     -       8-bit accumulators
+                x       -       index register
+
+
+        A.2  6800 INSTRUCTION SET
+
+
+           The following tables list all 6800/6802/6808 mnemonics recog-
+        nized by the AS6800 assembler.  The designation [] refers  to  a
+        required addressing mode argument.  The following list specifies
+        the format for each addressing mode supported by AS6800:
+
+                #data           immediate data
+                                byte or word data
+
+                *dir            direct page addressing
+                                (see .setdp directive)
+                                0 <= dir <= 255
+
+                ,x              register indirect addressing
+                                zero offset
+
+                offset,x        register indirect addressing
+                                0 <= offset <= 255
+
+                ext             extended addressing
+
+                label           branch label
+
+        The  terms  data, dir, offset, ext, and label may all be expres-
+        sions.
+
+
+
+        AS6800 ASSEMBLER                                        PAGE A-2
+        6800 INSTRUCTION SET
+
+
+           Note  that  not all addressing modes are valid with every in-
+        struction, refer to the 6800 technical data for valid modes.
+
+
+        A.2.1  Inherent Instructions
+
+                aba                     cba
+                clc                     cli
+                clv                     daa
+                des                     dex
+                ins                     inx
+                nop                     rti
+                rts                     sba
+                sec                     sei
+                sev                     swi
+                tab                     tap
+                tba                     tpa
+                tsx                     txs
+                wai
+
+                psha                    pshb
+                psh a                   psh b
+                pula                    pulb
+                pul a                   pul b
+
+
+        A.2.2  Branch Instructions
+
+                bra     label           bhi     label
+                bls     label           bcc     label
+                bhs     label           bcs     label
+                blo     label           bne     label
+                beq     label           bvc     label
+                bvs     label           bpl     label
+                bmi     label           bge     label
+                blt     label           bgt     label
+                ble     label           bsr     label
+
+
+        AS6800 ASSEMBLER                                        PAGE A-3
+        6800 INSTRUCTION SET
+
+
+        A.2.3  Single Operand Instructions
+
+                asla                    aslb
+                asl a                   asl b
+                asl     []
+
+                asra                    asrb
+                asr a                   asr b
+                asr     []
+
+                clra                    clrb
+                clr a                   clr b
+                clr     []
+
+                coma                    comb
+                com a                   com b
+                com     []
+
+                deca                    decb
+                dec a                   dec b
+                dec     []
+
+                inca                    incb
+                inc a                   inc b
+                inc     []
+
+                lsla                    lslb
+                lsl a                   lsl b
+                lsl     []
+
+                lsra                    lsrb
+                lsr a                   lsr b
+                lsr     []
+
+                nega                    negb
+                neg a                   neg b
+                neg     []
+
+                rola                    rolb
+                rol a                   rol b
+                rol     []
+
+                rora                    rorb
+                ror a                   ror b
+                ror     []
+
+                tsta                    tstb
+                tst a                   tst b
+                tst     []
+
+
+        AS6800 ASSEMBLER                                        PAGE A-4
+        6800 INSTRUCTION SET
+
+
+        A.2.4  Double Operand Instructions
+
+                adca    []              adcb    []
+                adc a   []              adc b   []
+
+                adda    []              addb    []
+                add a   []              add b   []
+
+                anda    []              andb    []
+                and a   []              and b   []
+
+                bita    []              bitb    []
+                bit a   []              bit b   []
+
+                cmpa    []              cmpb    []
+                cmp a   []              cmp b   []
+
+                eora    []              eorb    []
+                eor a   []              eor b   []
+
+                ldaa    []              ldab    []
+                lda a   []              lda b   []
+
+                oraa    []              orab    []
+                ora a   []              ora b   []
+
+                sbca    []              sbcb    []
+                sbc a   []              sbc b   []
+
+                staa    []              stab    []
+                sta a   []              sta b   []
+
+                suba    []              subb    []
+                sub a   []              sub b   []
+
+
+        A.2.5  Jump and Jump to Subroutine Instructions
+
+                jmp     []              jsr     []
+
+
+
+
+        AS6800 ASSEMBLER                                        PAGE A-5
+        6800 INSTRUCTION SET
+
+
+        A.2.6  Long Register Instructions
+
+                cpx     []
+                lds     []              sts     []
+                ldx     []              stx     []
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                   APPENDIX B
+
+                                AS6801 ASSEMBLER
+
+
+
+
+
+        B.1  .hd6303 DIRECTIVE
+
+        Format:
+
+                .hd6303
+
+        The  .hd6303 directive enables processing of the HD6303 specific
+        mnemonics not included in  the  6801  instruction  set.   HD6303
+        mnemonics  encountered  without  the  .hd6303  directive will be
+        flagged with an 'o' error.
+
+
+        B.2  6801 REGISTER SET
+
+        The following is a list of the 6801 registers used by AS6801:
+
+                a,b     -       8-bit accumulators
+                d       -       16-bit accumulator <a:b>
+                x       -       index register
+
+
+        B.3  6801 INSTRUCTION SET
+
+
+           The  following tables list all 6801/6303 mnemonics recognized
+        by the AS6801 assembler.  The designation []  refers  to  a  re-
+        quired  addressing  mode argument.  The following list specifies
+        the format for each addressing mode supported by AS6801:
+
+                #data           immediate data
+                                byte or word data
+
+                *dir            direct page addressing
+                                (see .setdp directive)
+                                0 <= dir <= 255
+
+
+
+        AS6801 ASSEMBLER                                        PAGE B-2
+        6801 INSTRUCTION SET
+
+
+                ,x              register indirect addressing
+                                zero offset
+
+                offset,x        register indirect addressing
+                                0 <= offset <= 255
+
+                ext             extended addressing
+
+                label           branch label
+
+        The  terms  data, dir, offset, ext, and label may all be expres-
+        sions.
+
+           Note  that  not all addressing modes are valid with every in-
+        struction, refer to  the  6801/6303  technical  data  for  valid
+        modes.
+
+
+        B.3.1  Inherent Instructions
+
+                aba             abx
+                cba             clc
+                cli             clv
+                daa             des
+                dex             ins
+                inx             mul
+                nop             rti
+                rts             sba
+                sec             sei
+                sev             swi
+                tab             tap
+                tba             tpa
+                tsx             txs
+                wai
+
+
+        B.3.2  Branch Instructions
+
+                bra     label           brn     label
+                bhi     label           bls     label
+                bcc     label           bhs     label
+                bcs     label           blo     label
+                bne     label           beq     label
+                bvc     label           bvs     label
+                bpl     label           bmi     label
+                bge     label           blt     label
+                bgt     label           ble     label
+                bsr     label
+
+
+        AS6801 ASSEMBLER                                        PAGE B-3
+        6801 INSTRUCTION SET
+
+
+        B.3.3  Single Operand Instructions
+
+                asla            aslb            asld
+                asl a           asl b           asl d
+                asl     []
+
+                asra            asrb
+                asr a           asr b
+                asr     []
+
+                clra            clrb
+                clr a           clr b
+                clr     []
+
+                coma            comb
+                com a           com b
+                com     []
+
+                deca            decb
+                dec a           dec b
+                dec     []
+
+                eora            eorb
+                eor a           eor b
+                eor     []
+
+                inca            incb
+                inc a           inc b
+                inc     []
+
+                lsla            lslb            lsld
+                lsl a           lsl b           lsl d
+                lsl     []
+
+                lsra            lsrb            lsrd
+                lsr a           lsr b           lsr d
+                lsr     []
+
+                nega            negb
+                neg a           neg b
+                neg     []
+
+                psha            pshb            pshx
+                psh a           psh b           psh x
+
+                pula            pulb            pulx
+                pul a           pul b           pul x
+
+                rola            rolb
+                rol a           rol b
+                rol     []
+
+
+
+        AS6801 ASSEMBLER                                        PAGE B-4
+        6801 INSTRUCTION SET
+
+
+                rora            rorb
+                ror a           ror b
+                ror     []
+
+                tsta            tstb
+                tst a           tst b
+                tst     []
+
+
+        B.3.4  Double Operand Instructions
+
+                adca    []      adcb    []
+                adc a   []      adc b   []
+
+                adda    []      addb    []      addd    []
+                add a   []      add b   []      add d   []
+
+                anda    []      andb    []
+                and a   []      and b   []
+
+                bita    []      bitb    []
+                bit a   []      bit b   []
+
+                cmpa    []      cmpb    []
+                cmp a   []      cmp b   []
+
+                ldaa    []      ldab    []
+                lda a   []      lda b   []
+
+                oraa    []      orab    []
+                ora a   []      ora b   []
+
+                sbca    []      sbcb    []
+                sbc a   []      sbc b   []
+
+                staa    []      stab    []
+                sta a   []      sta b   []
+
+                suba    []      subb    []      subd    []
+                sub a   []      sub b   []      sub d   []
+
+
+
+
+        AS6801 ASSEMBLER                                        PAGE B-5
+        6801 INSTRUCTION SET
+
+
+        B.3.5  Jump and Jump to Subroutine Instructions
+
+                jmp     []      jsr     []
+
+
+        B.3.6  Long Register Instructions
+
+                cpx     []      ldd     []
+                lds     []      ldx     []
+                std     []      sts     []
+                stx     []
+
+
+        B.3.7  6303 Specific Instructions
+
+                aim     #data, []       eim     #data, []
+                oim     #data, []       tim     #data, []
+
+                xgdx            slp
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                   APPENDIX C
+
+                                AS6804 ASSEMBLER
+
+
+
+
+           Requires the .setdp directive to specify the ram area.
+
+
+        C.1  6804 REGISTER SET
+
+        The following is a list of the 6804 registers used by AS6804:
+
+                x,y     -       index registers
+
+
+        C.2  6804 INSTRUCTION SET
+
+
+           The  following  tables  list all 6804 mnemonics recognized by
+        the AS6804 assembler.  The designation [] refers to  a  required
+        addressing  mode  argument.   The  following  list specifies the
+        format for each addressing mode supported by AS6804:
+
+                #data           immediate data
+                                byte or word data
+
+                ,x              register indirect addressing
+
+                dir             direct addressing
+                                (see .setdp directive)
+                                0 <= dir <= 255
+
+                ext             extended addressing
+
+                label           branch label
+
+        The  terms data, dir, and ext may be expressions.  The label for
+        the short branchs beq, bne, bcc, and bcs must not be external.
+
+           Note  that  not all addressing modes are valid with every in-
+        struction, refer to the 6804 technical data for valid modes.
+
+
+        AS6804 ASSEMBLER                                        PAGE C-2
+        6804 INSTRUCTION SET
+
+
+        C.2.1  Inherent Instructions
+
+                coma            decx
+                decy            incx
+                incy            rola
+                rti             rts
+                stop            tax
+                tay             txa
+                tya             wait
+
+
+        C.2.2  Branch Instructions
+
+                bne     label           beq     label
+                bcc     label           bcs     label
+
+
+        C.2.3  Single Operand Instructions
+
+                add     []
+                and     []
+                cmp     []
+                dec     []
+                inc     []
+                lda     []
+                sta     []
+                sub     []
+
+
+        C.2.4  Jump and Jump to Subroutine Instructions
+
+                jsr     []
+                jmp     []
+
+
+        C.2.5  Bit Test Instructions
+
+                brclr   #data,[],label
+                brset   #data,[],label
+
+                bclr    #label,[]
+                bset    #label,[]
+
+
+
+
+        AS6804 ASSEMBLER                                        PAGE C-3
+        6804 INSTRUCTION SET
+
+
+        C.2.6  Load Immediate data Instruction
+
+                mvi     [],#data
+
+
+        C.2.7  6804 Derived Instructions
+
+                asla
+                bam     label
+                bap     label
+                bxmi    label
+                bxpl    label
+                bymi    label
+                bypl    label
+                clra
+                clrx
+                clry
+                deca
+                decx
+                decy
+                inca
+                incx
+                incy
+                ldxi    #data
+                ldyi    #data
+                nop
+                tax
+                tay
+                txa
+                tya
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                   APPENDIX D
+
+                                AS6805 ASSEMBLER
+
+
+
+
+
+        D.1  6805 REGISTER SET
+
+        The following is a list of the 6805 registers used by AS6805:
+
+                a       -       8-bit accumulator
+                x       -       index register
+
+
+        D.2  6805 INSTRUCTION SET
+
+
+           The  following  tables  list all 6805 mnemonics recognized by
+        the AS6805 assembler.  The designation [] refers to  a  required
+        addressing  mode  argument.   The  following  list specifies the
+        format for each addressing mode supported by AS6805:
+
+                #data           immediate data
+                                byte or word data
+
+                *dir            direct page addressing
+                                (see .setdp directive)
+                                0 <= dir <= 255
+
+                ,x              register indirect addressing
+                                zero offset
+
+                offset,x        register indirect addressing
+                                  0 <= offset <= 255   --- byte mode
+                                256 <= offset <= 65535 --- word mode
+                                (an externally defined offset uses the
+                                 word mode)
+
+                ext             extended addressing
+
+                label           branch label
+
+
+
+        AS6805 ASSEMBLER                                        PAGE D-2
+        6805 INSTRUCTION SET
+
+
+        The terms data, dir, offset, and ext may all be expressions.
+
+           Note  that  not all addressing modes are valid with every in-
+        struction, refer to the 6805 technical data for valid modes.
+
+
+        D.2.1  Control Instructions
+
+                clc             cli
+                nop             rsp
+                rti             rts
+                sec             sei
+                stop            swi
+                tax             txa
+                wait
+
+
+        D.2.2  Bit Manipulation Instructions
+
+                brset   #data,*dir,label
+                brclr   #data,*dir,label
+
+                bset    #data,*dir
+                bclr    #data,*dir
+
+
+        D.2.3  Branch Instructions
+
+                bra     label           brn     label
+                bhi     label           bls     label
+                bcc     label           bcs     label
+                bne     label           beq     label
+                bhcc    label           bhcs    label
+                bpl     label           bmi     label
+                bmc     label           bms     label
+                bil     label           bih     label
+                bsr     label
+
+
+        AS6805 ASSEMBLER                                        PAGE D-3
+        6805 INSTRUCTION SET
+
+
+        D.2.4  Read-Modify-Write Instructions
+
+                nega            negx
+                neg     []
+
+                coma            comx
+                com     []
+
+                lsra            lsrx
+                lsr     []
+
+                rora            rorx
+                ror     []
+
+                asra            asrx
+                asr     []
+
+                lsla            lslx
+                lsl     []
+
+                rola            rolx
+                rol     []
+
+                deca            decx
+                dec     []
+
+                inca            incx
+                inc     []
+
+                tsta            tstx
+                tst     []
+
+                clra            clrx
+                clr     []
+
+
+        D.2.5  Register\Memory Instructions
+
+                sub     []              cmp     []
+                sbc     []              cpx     []
+                and     []              bit     []
+                lda     []              sta     []
+                eor     []              adc     []
+                ora     []              add     []
+                ldx     []              stx     []
+
+
+        AS6805 ASSEMBLER                                        PAGE D-4
+        6805 INSTRUCTION SET
+
+
+        D.2.6  Jump and Jump to Subroutine Instructions
+
+                jmp     []              jsr     []
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                   APPENDIX E
+
+                                AS6808 ASSEMBLER
+
+
+
+
+
+        E.1  68HC08 REGISTER SET
+
+        The  following  is  a  list  of  the  68HC08  registers  used by
+        AS68HC08:
+
+                a       -       8-bit accumulator
+                x       -       index register  <H:X>
+                s       -       stack pointer
+
+
+        E.2  68HC08 INSTRUCTION SET
+
+
+           The  following tables list all 68HC08 mnemonics recognized by
+        the AS6808 assembler.  The designation [] refers to  a  required
+        addressing  mode  argument.   The  following  list specifies the
+        format for each addressing mode supported by AS6808:
+
+                #data           immediate data
+                                byte or word data
+
+                *dir            direct page addressing
+                                (see .setdp directive)
+                                0 <= dir <= 255
+
+                ,x              register indexed addressing
+                                zero offset
+
+                offset,x        register indexed addressing
+                                  0 <= offset <= 255   --- byte mode
+                                256 <= offset <= 65535 --- word mode
+                                (an externally defined offset uses the
+                                 word mode)
+
+                ,x+             register indexed addressing
+                                zero offset with post increment
+
+
+        AS6808 ASSEMBLER                                        PAGE E-2
+        68HC08 INSTRUCTION SET
+
+
+
+                offset,x+       register indexed addressing
+                                unsigned byte offset with post increment
+
+                offset,s        stack pointer indexed addressing
+                                  0 <= offset <= 255   --- byte mode
+                                256 <= offset <= 65535 --- word mode
+                                (an externally defined offset uses the
+                                 word mode)
+
+                ext             extended addressing
+
+                label           branch label
+
+        The terms data, dir, offset, and ext may all be expressions.
+
+           Note  that  not all addressing modes are valid with every in-
+        struction, refer to the 68HC08 technical data for valid modes.
+
+
+        E.2.1  Control Instructions
+
+                clc             cli             daa             div
+                mul             nop             nsa             psha
+                pshh            pshx            pula            pulh
+                pulx            rsp             rti             rts
+                sec             sei             stop            swi
+                tap             tax             tpa             tsx
+                txa             txs             wait
+
+
+        E.2.2  Bit Manipulation Instructions
+
+                brset   #data,*dir,label
+                brclr   #data,*dir,label
+
+                bset    #data,*dir
+                bclr    #data,*dir
+
+
+        AS6808 ASSEMBLER                                        PAGE E-3
+        68HC08 INSTRUCTION SET
+
+
+        E.2.3  Branch Instructions
+
+                bra     label           brn     label
+                bhi     label           bls     label
+                bcc     label           bcs     label
+                bne     label           beq     label
+                bhcc    label           bhcs    label
+                bpl     label           bmi     label
+                bmc     label           bms     label
+                bil     label           bih     label
+                bsr     label           bge     label
+                blt     label           bgt     label
+                ble     label
+
+
+        E.2.4  Complex Branch Instructions
+
+                cbeqa   [],label
+                cbeqx   [],label
+                cbeq    [],label
+                dbnza   label
+                dbnzx   label
+                dbnz    [],label
+
+
+        AS6808 ASSEMBLER                                        PAGE E-4
+        68HC08 INSTRUCTION SET
+
+
+        E.2.5  Read-Modify-Write Instructions
+
+                nega                    negx
+                neg     []
+
+                coma                    comx
+                com     []
+
+                lsra                    lsrx
+                lsr     []
+
+                rora                    rorx
+                ror     []
+
+                asra                    asrx
+                asr     []
+
+                asla                    aslx
+                asl     []
+
+                lsla                    lslx
+                lsl     []
+
+                rola                    rolx
+                rol     []
+
+                deca                    decx
+                dec     []
+
+                inca                    incx
+                inc     []
+
+                tsta                    tstx
+                tst     []
+
+                clra                    clrx
+                clr     []              clrh
+
+                aix     #data
+
+                ais     #data
+
+
+        AS6808 ASSEMBLER                                        PAGE E-5
+        68HC08 INSTRUCTION SET
+
+
+        E.2.6  Register\Memory Instructions
+
+                sub     []              cmp     []
+                sbc     []              cpx     []
+                and     []              bit     []
+                lda     []              sta     []
+                eor     []              adc     []
+                ora     []              add     []
+                ldx     []              stx     []
+
+
+        E.2.7  Double Operand Move Instruction
+
+                mov     [],[]
+
+
+        E.2.8  16-Bit <H:X> Index Register Instructions
+
+                cphx    []
+                ldhx    []
+                sthx    []
+
+
+        E.2.9  Jump and Jump to Subroutine Instructions
+
+                jmp     []              jsr     []
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                   APPENDIX F
+
+                                AS6809 ASSEMBLER
+
+
+
+
+
+        F.1  6809 REGISTER SET
+
+        The following is a list of the 6809 registers used by AS6809:
+
+                a,b     -       8-bit accumulators
+                d       -       16-bit accumulator <a:b>
+                x,y     -       index registers
+                s,u     -       stack pointers
+                pc      -       program counter
+                cc      -       condition code
+                dp      -       direct page
+
+
+        F.2  6809 INSTRUCTION SET
+
+
+           The  following  tables  list all 6809 mnemonics recognized by
+        the AS6809 assembler.  The designation [] refers to  a  required
+        addressing  mode  argument.   The  following  list specifies the
+        format for each addressing mode supported by AS6809:
+
+                #data           immediate data
+                                byte or word data
+
+                *dir            direct page addressing
+                                (see .setdp directive)
+                                0 <= dir <= 255
+
+                label           branch label
+
+                r,r1,r2         registers
+                                cc,a,b,d,dp,x,y,s,u,pc
+
+                ,-x     ,--x    register indexed
+                                autodecrement
+
+
+
+        AS6809 ASSEMBLER                                        PAGE F-2
+        6809 INSTRUCTION SET
+
+
+                ,x+     ,x++    register indexed
+                                autoincrement
+
+                ,x              register indexed addressing
+                                zero offset
+
+                offset,x        register indexed addressing
+                                   -16 <= offset <= 15    ---  5-bit
+                                  -128 <= offset <= -17   ---  8-bit
+                                    16 <= offset <= 127   ---  8-bit
+                                -32768 <= offset <= -129  --- 16-bit
+                                   128 <= offset <= 32767 --- 16-bit
+                                (external definition of offset
+                                 uses 16-bit mode)
+
+                a,x             accumulator offset indexed addressing
+
+                ext             extended addressing
+
+                ext,pc          pc addressing ( pc <- pc + ext )
+
+                ext,pcr         pc relative addressing
+
+                [,--x]          register indexed indirect
+                                autodecrement
+
+                [,x++]          register indexed indirect
+                                autoincrement
+
+                [,x]            register indexed indirect addressing
+                                zero offset
+
+                [offset,x]      register indexed indirect addressing
+                                  -128 <= offset <= 127   ---  8-bit
+                                -32768 <= offset <= -129  --- 16-bit
+                                   128 <= offset <= 32767 --- 16-bit
+                                (external definition of offset
+                                 uses 16-bit mode)
+
+                [a,x]           accumulator offset indexed
+                                indirect addressing
+
+                [ext]           extended indirect addressing
+
+                [ext,pc]        pc indirect addressing
+                                ( [pc <- pc + ext] )
+
+                [ext,pcr]       pc relative indirect addressing
+
+        The  terms  data, dir, label, offset, and ext may all be expres-
+        sions.
+
+
+
+        AS6809 ASSEMBLER                                        PAGE F-3
+        6809 INSTRUCTION SET
+
+
+           Note  that  not all addressing modes are valid with every in-
+        struction, refer to the 6809 technical data for valid modes.
+
+
+        F.2.1  Inherent Instructions
+
+                abx             daa
+                mul             nop
+                rti             rts
+                sex             swi
+                swi1            swi2
+                swi3            sync
+
+
+        F.2.2  Short Branch Instructions
+
+                bcc     label           bcs     label
+                beq     label           bge     label
+                bgt     label           bhi     label
+                bhis    label           bhs     label
+                ble     label           blo     label
+                blos    label           bls     label
+                blt     label           bmi     label
+                bne     label           bpl     label
+                bra     label           brn     label
+                bvc     label           bvs     label
+                bsr     label
+
+
+        F.2.3  Long Branch Instructions
+
+                lbcc    label           lbcs    label
+                lbeq    label           lbge    label
+                lbgt    label           lbhi    label
+                lbhis   label           lbhs    label
+                lble    label           lblo    label
+                lblos   label           lbls    label
+                lblt    label           lbmi    label
+                lbne    label           lbpl    label
+                lbra    label           lbrn    label
+                lbvc    label           lbvs    label
+                lbsr    label
+
+
+        AS6809 ASSEMBLER                                        PAGE F-4
+        6809 INSTRUCTION SET
+
+
+        F.2.4  Single Operand Instructions
+
+                asla            aslb
+                asl     []
+
+                asra            asrb
+                asr     []
+
+                clra            clrb
+                clr     []
+
+                coma            comb
+                com     []
+
+                deca            decb
+                dec     []
+
+                inca            incb
+                inc     []
+
+                lsla            lslb
+                lsl     []
+
+                lsra            lsrb
+                lsr     []
+
+                nega            negb
+                neg     []
+
+                rola            rolb
+                rol     []
+
+                rora            rorb
+                ror     []
+
+                tsta            tstb
+                tst     []
+
+
+        AS6809 ASSEMBLER                                        PAGE F-5
+        6809 INSTRUCTION SET
+
+
+        F.2.5  Double Operand Instructions
+
+                adca    []              adcb    []
+
+                adda    []              addb    []
+
+                anda    []              andb    []
+
+                bita    []              bitb    []
+
+                cmpa    []              cmpb    []
+
+                eora    []              eorb    []
+
+                lda     []              ldb     []
+
+                ora     []              orb     []
+
+                sbca    []              sbcb    []
+
+                sta     []              stb     []
+
+                suba    []              subb    []
+
+
+        F.2.6  D-register Instructions
+
+                addd    []              subd    []
+                cmpd    []              ldd     []
+                std     []
+
+
+        F.2.7  Index/Stack Register Instructions
+
+                cmps    []              cmpu    []
+                cmpx    []              cmpy    []
+
+                lds     []              ldu     []
+                ldx     []              ldy     []
+
+                leas    []              leau    []
+                leax    []              leay    []
+
+                sts     []              stu     []
+                stx     []              sty     []
+
+                pshs    r               pshu    r
+                puls    r               pulu    r
+
+
+        AS6809 ASSEMBLER                                        PAGE F-6
+        6809 INSTRUCTION SET
+
+
+        F.2.8  Jump and Jump to Subroutine Instructions
+
+                jmp     []              jsr     []
+
+
+        F.2.9  Register - Register Instructions
+
+                exg     r1,r2           tfr     r1,r2
+
+
+        F.2.10  Condition Code Register Instructions
+
+                andcc   #data           orcc    #data
+                cwai    #data
+
+
+        F.2.11  6800 Compatibility Instructions
+
+                aba             cba
+                clc             cli
+                clv             des
+                dex             ins
+                inx
+                ldaa    []      ldab    []
+                oraa    []      orab    []
+                psha            pshb
+                pula            pulb
+                sba             sec
+                sei             sev
+                staa    []      stab    []
+                tab             tap
+                tba             tpa
+                tsx             txs
+                wai
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                   APPENDIX G
+
+                                AS6811 ASSEMBLER
+
+
+
+
+
+        G.1  68HC11 REGISTER SET
+
+        The following is a list of the 68HC11 registers used by AS6811:
+
+                a,b     -       8-bit accumulators
+                d       -       16-bit accumulator <a:b>
+                x,y     -       index registers
+
+
+        G.2  68HC11 INSTRUCTION SET
+
+
+           The  following tables list all 68HC11 mnemonics recognized by
+        the AS6811 assembler.  The designation [] refers to  a  required
+        addressing  mode  argument.   The  following  list specifies the
+        format for each addressing mode supported by AS6811:
+
+                #data           immediate data
+                                byte or word data
+
+                *dir            direct page addressing
+                                (see .setdp directive)
+                                0 <= dir <= 255
+
+                ,x              register indirect addressing
+                                zero offset
+
+                offset,x        register indirect addressing
+                                0 <= offset <= 255
+
+                ext             extended addressing
+
+                label           branch label
+
+        The terms data, dir, offset, and ext may all be expressions.
+
+
+
+        AS6811 ASSEMBLER                                        PAGE G-2
+        68HC11 INSTRUCTION SET
+
+
+           Note  that  not all addressing modes are valid with every in-
+        struction, refer to the 68HC11 technical data for valid modes.
+
+
+        G.2.1  Inherent Instructions
+
+                aba             abx
+                aby             cba
+                clc             cli
+                clv             daa
+                des             dex
+                dey             fdiv
+                idiv            ins
+                inx             iny
+                mul             nop
+                rti             rts
+                sba             sec
+                sei             sev
+                stop            swi
+                tab             tap
+                tba             tpa
+                tsx             txs
+                wai             xgdx
+                xgdy
+
+                psha            pshb
+                psh a           psh b
+                pshx            pshy
+                psh x           psh y
+
+                pula            pulb
+                pul a           pul b
+                pulx            puly
+                pul x           pul y
+
+
+        G.2.2  Branch Instructions
+
+                bra     label           brn     label
+                bhi     label           bls     label
+                bcc     label           bhs     label
+                bcs     label           blo     label
+                bne     label           beq     label
+                bvc     label           bvs     label
+                bpl     label           bmi     label
+                bge     label           blt     label
+                bgt     label           ble     label
+                bsr     label
+
+
+        AS6811 ASSEMBLER                                        PAGE G-3
+        68HC11 INSTRUCTION SET
+
+
+        G.2.3  Single Operand Instructions
+
+                asla            aslb            asld
+                asl a           asl b           asl d
+                asl     []
+
+                asra            asrb
+                asr a           asr b
+                asr     []
+
+                clra            clrb
+                clr a           clr b
+                clr     label
+
+                coma            comb
+                com a           com b
+                com     []
+
+                deca            decb
+                dec a           dec b
+                dec     []
+
+                inca            incb
+                inc a           inc b
+                inc     []
+
+                lsla            lslb            lsld
+                lsl a           lsl b           lsl d
+                lsl     []
+
+                lsra            lsrb            lsrd
+                lsr a           lsr b           lsr d
+                lsr     []
+
+                nega            negb
+                neg a           neg b
+                neg     []
+
+                rola            rolb
+                rol a           rol b
+                rol     []
+
+                rora            rorb
+                ror a           ror b
+                ror     []
+
+                tsta            tstb
+                tst a           tst b
+                tst     []
+
+
+        AS6811 ASSEMBLER                                        PAGE G-4
+        68HC11 INSTRUCTION SET
+
+
+        G.2.4  Double Operand Instructions
+
+                adca    []              adcb    []
+                adc a   []              adc b   []
+
+                adda    []      addb    []      addd    []
+                add a   []      add b   []      add d   []
+
+                anda    []              andb    []
+                and a   []              and b   []
+
+                bita    []              bitb    []
+                bit a   []              bit b   []
+
+                cmpa    []              cmpb    []
+                cmp a   []              cmp b   []
+
+                eora    []              eorb    []
+                eor a   []              eor b   []
+
+                ldaa    []              ldab    []
+                lda a   []              lda b   []
+
+                oraa    []              orab    []
+                ora a   []              ora b   []
+
+                sbca    []              sbcb    []
+                sbc a   []              sbc b   []
+
+                staa    []              stab    []
+                sta a   []              sta b   []
+
+                suba    []      subb    []      subd    []
+                sub a   []      sub b   []      sub d   []
+
+
+        G.2.5  Bit Manupulation Instructions
+
+                bclr    [],#data
+                bset    [],#data
+
+                brclr   [],#data,label
+                brset   [],#data,label
+
+
+
+
+        AS6811 ASSEMBLER                                        PAGE G-5
+        68HC11 INSTRUCTION SET
+
+
+        G.2.6  Jump and Jump to Subroutine Instructions
+
+                jmp     []              jsr     []
+
+
+        G.2.7  Long Register Instructions
+
+                cpx     []              cpy     []
+
+                ldd     []              lds     []
+                ldx     []              ldy     []
+
+                std     []              sts     []
+                stx     []              sty     []
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                   APPENDIX H
+
+                                AS6812 ASSEMBLER
+
+
+
+
+
+        H.1  68HC12 REGISTER SET
+
+        The following is a list of the 68HC12 registers used by AS6812:
+
+                a,b     -       8-bit accumulators
+                d       -       16-bit accumulator <a:b>
+                x,y     -       index registers
+                sp,s    -       stack pointer
+                pc      -       program counter
+                ccr,cc  -       condition code register
+
+
+        H.2  68HC12 INSTRUCTION SET
+
+
+           The  following tables list all 68HC12 mnemonics recognized by
+        the AS6812 assembler.  The designation [] refers to  a  required
+        addressing  mode  argument.   The  following  list specifies the
+        format for each addressing mode supported by AS6812:
+
+                #data           immediate data
+                                byte or word data
+
+                ext             extended addressing
+
+                pg              memory page number
+
+                *dir            direct page addressing
+                                (see .setdp directive)
+                                0 <= dir <= 255
+
+                label           branch label
+
+                r,r1,r2         registers
+                                ccr,a,b,d,x,y,sp,pc
+
+
+
+        AS6812 ASSEMBLER                                        PAGE H-2
+        68HC12 INSTRUCTION SET
+
+
+                -x      x-      register indexed, pre or
+                ,-x     ,x-     post autodecrement by 1
+
+                n,-x    n,x-    register indexed, pre or
+                                post autodecrement by 1 - 8
+
+                +x      x+      register indexed, pre or
+                ,+x     ,x+     post autoincrement by 1
+
+                n,+x    n,x+    register indexed, pre or
+                                post autoincrement by 1 - 8
+
+                offset,x        register indexed addressing
+                                   -16 <= offset <= 15    ---  5-bit
+                                  -256 <= offset <= -17   ---  9-bit
+                                    16 <= offset <= 255   ---  9-bit
+                                -32768 <= offset <= -257  --- 16-bit
+                                   256 <= offset <= 32767 --- 16-bit
+                                (external definition of offset
+                                 uses 16-bit mode)
+
+                [offset,x]      register indexed indirect addressing
+                                -32768 <= offset <= 32767 --- 16-bit
+
+                [,x]            register indexed indirect addressing
+                                zero offset
+
+                a,x             accumulator offset indexed addressing
+
+                [d,x]           d accumulator offset indexed
+                                indirect addressing
+
+        The  terms  data, dir, label, offset, and ext may all be expres-
+        sions.
+
+           Note  that  not all addressing modes are valid with every in-
+        struction, refer to the 68HC12 technical data for valid modes.
+
+
+        AS6812 ASSEMBLER                                        PAGE H-3
+        68HC12 INSTRUCTION SET
+
+
+        H.2.1  Inherent Instructions
+
+                aba             bgnd            cba
+                daa             dex             dey
+                ediv            edivs           emul
+                emuls           fdiv            idiv
+                idivs           inx             iny
+                mem             mul             nop
+                psha            pshb            pshc
+                pshd            pshx            pshy
+                pula            pulb            pulc
+                puld            pulx            puly
+                rev             revw            rtc
+                rti             rts             sba
+                stop            swi             tab
+                tba             wai             wav
+                wavr
+
+
+        H.2.2  Short Branch Instructions
+
+                bcc     label           bcs     label
+                beq     label           bge     label
+                bgt     label           bhi     label
+                bhis    label           bhs     label
+                ble     label           blo     label
+                blos    label           bls     label
+                blt     label           bmi     label
+                bne     label           bpl     label
+                bra     label           brn     label
+                bvc     label           bvs     label
+                bsr     label
+
+
+        H.2.3  Long Branch Instructions
+
+                lbcc    label           lbcs    label
+                lbeq    label           lbge    label
+                lbgt    label           lbhi    label
+                lbhis   label           lbhs    label
+                lble    label           lblo    label
+                lblos   label           lbls    label
+                lblt    label           lbmi    label
+                lbne    label           lbpl    label
+                lbra    label           lbrn    label
+                lbvc    label           lbvs    label
+
+
+        AS6812 ASSEMBLER                                        PAGE H-4
+        68HC12 INSTRUCTION SET
+
+
+        H.2.4  Branch on Decrement, Test, or Increment
+
+                dbeq    r,label         dbne    r,label
+                ibeq    r,label         ibne    r,label
+                tbeq    r,label         tbne    r,label
+
+
+        H.2.5  Bit Clear and Set Instructions
+
+                bclr    [],#data
+                bset    [],#data
+
+
+        H.2.6  Branch on Bit Clear or Set
+
+                brclr   [],#data,label
+                brset   [],#data,label
+
+
+        AS6812 ASSEMBLER                                        PAGE H-5
+        68HC12 INSTRUCTION SET
+
+
+        H.2.7  Single Operand Instructions
+
+                asla            aslb
+                asl     []
+
+                asra            asrb
+                asr     []
+
+                clra            clrb
+                clr     []
+
+                coma            comb
+                com     []
+
+                deca            decb
+                dec     []
+
+                inca            incb
+                inc     []
+
+                lsla            lslb
+                lsl     []
+
+                lsra            lsrb
+                lsr     []
+
+                nega            negb
+                neg     []
+
+                rola            rolb
+                rol     []
+
+                rora            rorb
+                ror     []
+
+                tsta            tstb
+                tst     []
+
+
+        AS6812 ASSEMBLER                                        PAGE H-6
+        68HC12 INSTRUCTION SET
+
+
+        H.2.8  Double Operand Instructions
+
+                adca    []              adcb    []
+
+                adda    []              addb    []
+
+                anda    []              andb    []
+
+                bita    []              bitb    []
+
+                cmpa    []              cmpb    []
+
+                eora    []              eorb    []
+
+                ldaa    []      <=>     lda     []
+
+                ldab    []      <=>     ldb     []
+
+                oraa    []      <=>     ora     []
+
+                orab    []      <=>     orb     []
+
+                sbca    []              sbcb    []
+
+                staa    []      <=>     sta     []
+
+                stab    []      <=>     stb     []
+
+                suba    []              subb    []
+
+
+        H.2.9  Move Instructions
+
+                movb    [],[]           movw    [],[]
+
+
+        H.2.10  D-register Instructions
+
+                addd    []              subd    []
+                cpd     []      <=>     cmpd    []
+                ldd     []              std     []
+
+
+        AS6812 ASSEMBLER                                        PAGE H-7
+        68HC12 INSTRUCTION SET
+
+
+        H.2.11  Index/Stack Register Instructions
+
+                cps     []      <=>     cmps    []
+                cpx     []      <=>     cmpx    []
+                cpy     []      <=>     cmpy    []
+
+                lds     []
+                ldx     []              ldy     []
+
+                leas    []
+                leax    []              leay    []
+
+                sts     []
+                stx     []              sty     []
+
+
+        H.2.12  Jump and Jump/Call to Subroutine Instructions
+
+                call    [],pg
+                jmp     []              jsr     []
+
+
+        H.2.13  Other Special Instructions
+
+                emacs   []
+                emaxd   []              emaxm   []
+                emind   []              eminm   []
+                etbl    []
+                maxa    []              maxm    []
+                mina    []              minm    []
+                tbl     []              trap    #data
+
+
+        H.2.14  Register - Register Instructions
+
+                exg     r1,r2           sex     r1,r2
+                tfr     r1,r2
+
+
+        H.2.15  Condition Code Register Instructions
+
+                andcc   #data           orcc    #data
+
+
+        AS6812 ASSEMBLER                                        PAGE H-8
+        68HC12 INSTRUCTION SET
+
+
+        H.2.16  M68HC11 Compatibility Mode Instructions
+
+                abx             aby             clc
+                cli             clv             des
+                ins             sec             sei
+                sev             tap             tpa
+                tsx             tsy             txs
+                tys             xgdx            xgdy
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                   APPENDIX I
+
+                                AS6816 ASSEMBLER
+
+
+
+
+
+        I.1  68HC16 REGISTER SET
+
+        The following is a list of the 68HC16 registers used by AS6816:
+
+                a,b     -       8-bit accumulators
+                d       -       16-bit accumulator <a:b>
+                e       -       16-bit accumulator
+                x,y,z   -       index registers
+                k       -       address extension register
+                s       -       stack pointer
+                ccr     -       condition code
+
+
+        I.2  68HC16 INSTRUCTION SET
+
+
+           The  following tables list all 68HC16 mnemonics recognized by
+        the AS6816 assembler.  The designation [] refers to  a  required
+        addressing  mode  argument.   The  following  list specifies the
+        format for each addressing mode supported by AS6816:
+
+                #data           immediate data
+                                byte or word data
+
+                #xo,#yo         local immediate data (mac / rmac)
+
+                label           branch label
+
+                r               register
+                                ccr,a,b,d,e,x,y,z,s
+
+                ,x              zero offset register indexed addressing
+                ,x8
+                ,x16
+
+                offset,x        register indexed addressing
+
+
+        AS6816 ASSEMBLER                                        PAGE I-2
+        68HC16 INSTRUCTION SET
+
+
+                                     0 <= offset <= 255   ---  8-bit
+                                -32768 <= offset <= -1    --- 16-bit
+                                   256 <= offset <= 32767 --- 16-bit
+                                (external definition of offset
+                                 uses 16-bit mode)
+
+                offset,x8       unsigned 8-bit offset indexed addressing
+                offset,x16      signed 16-bit offset indexed addressing
+
+                e,x             accumulator offset indexed addressing
+
+                ext             extended addressing
+
+                bank            64K bank number (jmp / jsr)
+
+        The  terms data, label, offset, bank, and ext may all be expres-
+        sions.
+
+           Note  that  not all addressing modes are valid with every in-
+        struction, refer to the 6816 technical data for valid modes.
+
+
+        I.2.1  Inherent Instructions
+
+                aba             abx             aby             abz
+                ace             aced            ade             adx
+                ady             adz             aex             aey
+                aez             bgnd            cba             daa
+                ediv            edivs           emul            emuls
+                fdiv            fmuls           idiv            ldhi
+                lpstop          mul             nop             psha
+                pshb            pshmac          pula            pulb
+                pulmac          rtr             rts             sba
+                sde             sted            swi             sxt
+                tab             tap             tba             tbek
+                tbsk            tbxk            tbyk            tbzk
+                tde             tdmsk           tdp             ted
+                tedm            tekb            tem             tmer
+                tmet            tmxed           tpa             tpd
+                tskb            tsx             tsy             tsz
+                txkb            txs             txy             txz
+                tykb            tys             tyx             tyz
+                tzkb            tzs             tzx             tzy
+                wai             xgab            xgde            xgdx
+                xgdy            xgdz            xgex            xgey
+                xgez
+
+
+        AS6816 ASSEMBLER                                        PAGE I-3
+        68HC16 INSTRUCTION SET
+
+
+        I.2.2  Push/Pull Multiple Register Instructions
+
+                pshm    r,...           pulm    r,...
+
+
+        I.2.3  Short Branch Instructions
+
+                bcc     label           bcs     label
+                beq     label           bge     label
+                bgt     label           bhi     label
+                bhis    label           bhs     label
+                ble     label           blo     label
+                blos    label           bls     label
+                blt     label           bmi     label
+                bne     label           bpl     label
+                bra     label           brn     label
+                bvc     label           bvs     label
+                bsr     label
+
+
+        I.2.4  Long Branch Instructions
+
+                lbcc    label           lbcs    label
+                lbeq    label           lbge    label
+                lbgt    label           lbhi    label
+                lbhis   label           lbhs    label
+                lble    label           lblo    label
+                lblos   label           lbls    label
+                lblt    label           lbmi    label
+                lbne    label           lbpl    label
+                lbra    label           lbrn    label
+                lbvc    label           lbvs    label
+                lbsr    label
+
+
+        I.2.5  Bit Manipulation Instructions
+
+                bclr    [],#data
+                bset    [],#data
+
+                brclr   [],#data,label
+                brset   [],#data,label
+
+
+        AS6816 ASSEMBLER                                        PAGE I-4
+        68HC16 INSTRUCTION SET
+
+
+        I.2.6  Single Operand Instructions
+
+                asla                    aslb
+                asld                    asle
+                aslm
+                asl     []              aslw    []
+
+                asra                    asrb
+                asrd                    asre
+                asrm
+                asr     []              asrw    []
+
+                clra                    clrb
+                clrd                    clre
+                                        clrm
+                clr     []              clrw    []
+
+                coma                    comb
+                comd                    come
+                com     []              comw    []
+
+                deca                    decb
+                dec     []              decw    []
+
+                inca                    incb
+                inc     []              incw    []
+
+                lsla                    lslb
+                lsld                    lsle
+                lslm
+                lsl     []              lslw    []
+
+                lsra                    lsrb
+                lsrd                    lsre
+                lsr     []              lsrw    []
+
+                nega                    negb
+                negd                    nege
+                neg     []              negw    []
+
+                rola                    rolb
+                rold                    role
+                rol     []              rolw    []
+
+                rora                    rorb
+                rord                    rore
+                ror     []              rorw    []
+
+                tsta                    tstb
+                tsta                    tste
+                tst     []              tstw    []
+
+
+        AS6816 ASSEMBLER                                        PAGE I-5
+        68HC16 INSTRUCTION SET
+
+
+        I.2.7  Double Operand Instructions
+
+                adca    []              adcb    []
+                adcd    []              adce    []
+
+                adda    []              addb    []
+                addd    []              adde    []
+
+                anda    []              andb    []
+                andd    []              ande    []
+
+                bita    []              bitb    []
+
+                cmpa    []              cmpb    []
+                cpd     []              cpe     []
+
+                eora    []              eorb    []
+                eord    []              eore    []
+
+                ldaa    []              ldab    []
+                ldd     []              lde     []
+
+                oraa    []              orab    []
+                ord     []              ore     []
+
+                sbca    []              sbcb    []
+                sbcd    []              sbce    []
+
+                staa    []              stab    []
+                std     []              ste     []
+
+                suba    []              subb    []
+                subd    []              sube    []
+
+
+        I.2.8  Index/Stack Register Instructions
+
+                cps     []              cpx     []
+                cpy     []              cpz     []
+
+                lds     []              ldx     []
+                ldy     []              ldz     []
+
+                sts     []              stx     []
+                sty     []              stz     []
+
+
+        AS6816 ASSEMBLER                                        PAGE I-6
+        68HC16 INSTRUCTION SET
+
+
+        I.2.9  Jump and Jump to Subroutine Instructions
+
+                jmp     bank,[]         jsr     bank,[]
+
+
+        I.2.10  Condition Code Register Instructions
+
+                andp    #data           orp     #data
+
+
+        I.2.11  Multiply and Accumulate Instructions
+
+                mac     #data           rmac    #data
+                mac     #xo,#yo         rmac    #xo,#yo
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                   APPENDIX J
+
+                                 ASH8 ASSEMBLER
+
+
+
+
+
+        J.1  H8/3XX REGISTER SET
+
+        The following is a list of the H8 registers used by ASH8:
+
+                r0  -  r7,sp            16-bit accumulators
+                r0L -  r7L,spL          8-bit accumulators
+                r0H -  r7H,spH          8-bit accumulators
+                spL,spH,sp              stack pointers
+                ccr                     condition code
+
+
+        J.2  H8/3XX INSTRUCTION SET
+
+
+           The  following tables list all H8/3xx mnemonics recognized by
+        the ASH8 assembler.  The designation [] refers to a required ad-
+        dressing mode argument.  The following list specifies the format
+        for each addressing mode supported by ASH8:
+
+                #xx:3           immediate data (3  bit)
+                #xx:8           immediate data (8  bit)
+                #xx:16          immediate data (16 bit)
+
+                *dir            direct page addressing
+                                (see .setdp directive)
+                                0xFF00 <= dir <= 0xFFFF
+
+                label           branch label
+
+
+                rn              registers (16 bit)
+                                r0-r7,sp
+
+                rnB             registers (8 bit)
+                                r0H-r7H,r0L-r7L,spH,spL
+
+
+
+        ASH8 ASSEMBLER                                          PAGE J-2
+        H8/3XX INSTRUCTION SET
+
+
+                ccr             condition code register
+
+                @rn             register indirect
+
+                @-rn            register indirect (auto pre-decrement)
+
+                @rn+            register indirect (auto post-increment)
+
+                @[offset,rn]    register indirect, 16-bit displacement
+
+                @@offset        memory indirect, (8-bit address)
+
+                ext             extended addressing (16-bit)
+
+        The  terms  data, dir, label, offset, and ext may all be expres-
+        sions.
+
+           Note  that  not all addressing modes are valid with every in-
+        struction, refer to the H8/3xx technical data for valid modes.
+
+
+        J.2.1  Inherent Instructions
+
+                eepmov
+                nop
+                sleep
+                rte
+                rts
+
+
+        J.2.2  Branch Instructions
+
+                bcc     label                   bcs     label
+                beq     label                   bf      label
+                bge     label                   bgt     label
+                bhi     label                   bhis    label
+                bhs     label                   ble     label
+                blo     label                   blos    label
+                bls     label                   blt     label
+                bmi     label                   bne     label
+                bpl     label                   bra     label
+                brn     label                   bt      label
+                bvc     label                   bvs     label
+                bsr     label
+
+
+        ASH8 ASSEMBLER                                          PAGE J-3
+        H8/3XX INSTRUCTION SET
+
+
+        J.2.3  Single Operand Instructions
+
+                Free Form
+
+                daa     rnB                     das     rnB
+
+                dec     rnB                     inc     rnB
+
+                neg     rnB                     not     rnB
+
+                rotxl   rnB                     rotxr   rnB
+
+                rotl    rnB                     rotr    rnB
+
+                shal    rnB                     shar    rnB
+
+                shll    rnB                     shlr    rnB
+
+                push    rn                      pop     rn
+
+
+                Byte / Word Form
+
+                daa.b   rnB                     das.b   rnB
+
+                dec.b   rnB                     inc.b   rnB
+
+                neg.b   rnB                     not.b   rnB
+
+                rotxl.b rnB                     rotxr.b rnB
+
+                rotl.b  rnB                     rotr.b  rnB
+
+                shal.b  rnB                     shar.b  rnB
+
+                shll.b  rnB                     shlr.b  rnB
+
+                push.w  rn                      pop.w   rn
+
+
+        ASH8 ASSEMBLER                                          PAGE J-4
+        H8/3XX INSTRUCTION SET
+
+
+        J.2.4  Double Operand Instructions
+
+                Free Form
+
+                add     rnB,rnB                 add     #xx:8,rnB
+                add     rn,rn
+                adds    #1,rn                   adds    #2,rn
+                addx    rnB,rnB                 addx    #xx:8,rnB
+
+                cmp     rnB,rnB                 cmp     #xx:8,rnB
+                cmp     rn,rn
+
+                sub     rnB,rnB
+                sub     rn,rn
+                subs    #1,rn                   subs    #2,rn
+                subx    rnB,rnB                 subx    #xx:8,rnB
+
+                and     rnB,rnB                 and     #xx:8,rnB
+                                                and     #xx:8,ccr
+
+                or      rnB,rnB                 or      #xx:8,rnB
+                                                or      #xx:8,ccr
+
+                xor     rnB,rnB                 xor     #xx:8,rnB
+                                                xor     #xx:8,ccr
+
+
+                Byte / Word Form
+
+                add.b   rnB,rnB                 add.b   #xx:8,rnB
+                add.w   rn,rn
+
+                cmp.b   rnB,rnB                 cmp.b   #xx:8,rnB
+                cmp.w   rn,rn
+
+                sub.b   rnB,rnB
+                sub.w   rn,rn
+
+                addx.b  rnB,rnB                 addx.b  #xx:8,rnB
+
+                and.b   rnB,rnB                 and.b   #xx:8,rnB
+                                                and.b   #xx:8,ccr
+
+                or.b    rnB,rnB                 or.b    #xx:8,rnB
+                                                or.b    #xx:8,ccr
+
+                subx.b  rnB,rnB                 subx.b  #xx:8,rnB
+
+                xor.b   rnB,rnB                 xor.b   #xx:8,rnB
+                                                xor.b   #xx:8,ccr
+
+
+        ASH8 ASSEMBLER                                          PAGE J-5
+        H8/3XX INSTRUCTION SET
+
+
+        J.2.5  Mov Instructions
+
+                Free Form
+
+                mov     rnB,rnB                 mov     rn,rn
+                mov     #xx:8,rnB               mov     #xx:16,rn
+                mov     @rn,rnB                 mov     @rn,rn
+                mov     @[offset,rn],rnB        mov     @[offset,rn],rn
+                mov     @rn+,rnB                mov     @rn+,rn
+                mov     @dir,rnB
+                mov     dir,rnB
+                mov     *@dir,rnB
+                mov     *dir,rnB
+                mov     @label,rnB              mov     @label,rn
+                mov     label,rnB               mov     label,rn
+                mov     rnB,@rn                 mov     rn,@rn
+                mov     rnB,@[offset,rn]        mov     rn,@[offset,rn]
+                mov     rnB,@-rn                mov     rn,@-rn
+                mov     rnB,@dir
+                mov     rnB,dir
+                mov     rnB,*@dir
+                mov     rnB,*dir
+                mov     rnB,@label              mov     rn,@label
+                mov     rnB,label               mov     rn,label
+
+
+                Byte / Word Form
+
+                mov.b   rnB,rnB                 mov.w   rn,rn
+                mov.b   #xx:8,rnB               mov.w   #xx:16,rn
+                mov.b   @rn,rnB                 mov.w   @rn,rn
+                mov.b   @[offset,rn],rnB        mov.w   @[offset,rn],rn
+                mov.b   @rn+,rnB                mov.w   @rn+,rn
+                mov.b   @dir,rnB
+                mov.b   dir,rnB
+                mov.b   *@dir,rnB
+                mov.b   *dir,rnB
+                mov.b   @label,rnB              mov.w   @label,rn
+                mov.b   label,rnB               mov.w   label,rn
+                mov.b   rnB,@rn                 mov.w   rn,@rn
+                mov.b   rnB,@[offset,rn]        mov.w   rn,@[offset,rn]
+                mov.b   rnB,@-rn                mov.w   rn,@-rn
+                mov.b   rnB,@dir
+                mov.b   rnB,dir
+                mov.b   rnB,*@dir
+                mov.b   rnB,*dir
+                mov.b   rnB,@label              mov.w   rn,@label
+                mov.b   rnB,label               mov.w   rn,label
+
+
+        ASH8 ASSEMBLER                                          PAGE J-6
+        H8/3XX INSTRUCTION SET
+
+
+        J.2.6  Bit Manipulation Instructions
+
+                bld     #xx:3,rnB               bld     #xx:3,@rn
+                bld     #xx:3,@dir              bld     #xx:3,dir
+                bld     #xx:3,*@dir             bld     #xx:3,*dir
+
+                bild    #xx:3,rnB               bild    #xx:3,@rn
+                bild    #xx:3,@dir              bild    #xx:3,dir
+                bild    #xx:3,*@dir             bild    #xx:3,*dir
+
+                bst     #xx:3,rnB               bst     #xx:3,@rn
+                bst     #xx:3,@dir              bst     #xx:3,dir
+                bst     #xx:3,*@dir             bst     #xx:3,*dir
+
+                bist    #xx:3,rnB               bist    #xx:3,@rn
+                bist    #xx:3,@dir              bist    #xx:3,dir
+                bist    #xx:3,*@dir             bist    #xx:3,*dir
+
+                band    #xx:3,rnB               band    #xx:3,@rn
+                band    #xx:3,@dir              band    #xx:3,dir
+                band    #xx:3,*@dir             band    #xx:3,*dir
+
+                biand   #xx:3,rnB               biand   #xx:3,@rn
+                biand   #xx:3,@dir              biand   #xx:3,dir
+                biand   #xx:3,*@dir             biand   #xx:3,*dir
+
+                bor     #xx:3,rnB               bor     #xx:3,@rn
+                bor     #xx:3,@dir              bor     #xx:3,dir
+                bor     #xx:3,*@dir             bor     #xx:3,*dir
+
+                bior    #xx:3,rnB               bior    #xx:3,@rn
+                bior    #xx:3,@dir              bior    #xx:3,dir
+                bior    #xx:3,*@dir             bior    #xx:3,*dir
+
+                bxor    #xx:3,rnB               bxor    #xx:3,@rn
+                bxor    #xx:3,@dir              bxor    #xx:3,dir
+                bxor    #xx:3,*@dir             bxor    #xx:3,*dir
+
+                bixor   #xx:3,rnB               bixor   #xx:3,@rn
+                bixor   #xx:3,@dir              bixor   #xx:3,dir
+                bixor   #xx:3,*@dir             bixor   #xx:3,*dir
+
+
+        ASH8 ASSEMBLER                                          PAGE J-7
+        H8/3XX INSTRUCTION SET
+
+
+        J.2.7  Extended Bit Manipulation Instructions
+
+                bset    #xx:3,rnB               bset    #xx:3,@rn
+                bset    #xx:3,@dir              bset    #xx:3,dir
+                bset    #xx:3,*@dir             bset    #xx:3,*dir
+                bset    rnB,rnB                 bset    rnB,@rn
+                bset    rnB,@dir                bset    rnB,dir
+                bset    rnB,*@dir               bset    rnB,*dir
+
+                bclr    #xx:3,rnB               bclr    #xx:3,@rn
+                bclr    #xx:3,@dir              bclr    #xx:3,dir
+                bclr    #xx:3,*@dir             bclr    #xx:3,*dir
+                bclr    rnB,rnB                 bclr    rnB,@rn
+                bclr    rnB,@dir                bclr    rnB,dir
+                bclr    rnB,*@dir               bclr    rnB,*dir
+
+                bnot    #xx:3,rnB               bnot    #xx:3,@rn
+                bnot    #xx:3,@dir              bnot    #xx:3,dir
+                bnot    #xx:3,*@dir             bnot    #xx:3,*dir
+                bnot    rnB,rnB                 bnot    rnB,@rn
+                bnot    rnB,@dir                bnot    rnB,dir
+                bnot    rnB,*@dir               bnot    rnB,*dir
+
+                btst    #xx:3,rnB               btst    #xx:3,@rn
+                btst    #xx:3,@dir              btst    #xx:3,dir
+                btst    #xx:3,*@dir             btst    #xx:3,*dir
+                btst    rnB,rnB                 btst    rnB,@rn
+                btst    rnB,@dir                btst    rnB,dir
+                btst    rnB,*@dir               btst    rnB,*dir
+
+
+        J.2.8  Condition Code Instructions
+
+                andc    #xx:8,ccr               andc    #xx:8
+                and     #xx:8,ccr               and.b   #xx:8,ccr
+
+                ldc     #xx:8,ccr               ldc     #xx:8
+                ldc     rnB,ccr                 ldc     rnB
+
+                orc     #xx:8,ccr               orc     #xx:8
+                or      #xx:8,ccr               or.b    #xx:8,ccr
+
+                xorc    #xx:8,ccr               xorc    #xx:8
+                xor     #xx:8,ccr               xor.b   #xx:8,ccr
+
+                stc     ccr,rnB                 stc     rnB
+
+
+        ASH8 ASSEMBLER                                          PAGE J-8
+        H8/3XX INSTRUCTION SET
+
+
+        J.2.9  Other Instructions
+
+                divxu   rnB,rn                  divxu.b rnB,rn
+
+                mulxu   rnB,rn                  mulxu.b rnB,rn
+
+                movfpe  @label,rnB              movfpe  label,rnB
+                movfpe.b  @label,rnB            movfpe.b  label,rnB
+
+                movtpe  @label,rnB              movtpe  label,rnB
+                movtpe.b  @label,rnB            movtpe.b  label,rnB
+
+
+        J.2.10  Jump and Jump to Subroutine Instructions
+
+                jmp     @rn                     jmp     @@dir
+                jmp     @label                  jmp     label
+
+                jsr     @rn                     jsr     @@dir
+                jsr     @label                  jsr     label
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                   APPENDIX K
+
+                                AS8051 ASSEMBLER
+
+
+
+
+
+        K.1  ACKNOWLEDGMENT
+
+
+           Thanks  to  John  Hartman  for his contribution of the AS8051
+        cross assembler.
+
+                John L. Hartman
+                jhartman@compuserve.com
+
+
+        K.2  8051 REGISTER SET
+
+        The following is a list of the 8051 registers used by AS8051:
+
+                a,b             -       8-bit accumulators
+                r0,r1,r2,r3     -       8-bit registers
+                r4,r5,r6,r7
+                dptr            -       data pointer
+                sp              -       stack pointer
+                pc              -       program counter
+                psw             -       status word
+                c               -       carry (bit in status word)
+
+
+        AS8051 ASSEMBLER                                        PAGE K-2
+        8051 REGISTER SET
+
+
+        K.3  8051 INSTRUCTION SET
+
+
+           The  following  tables  list all 8051 mnemonics recognized by
+        the AS8051 assembler.  The following list specifies  the  format
+        for each addressing mode supported by AS8051:
+
+                #data           immediate data
+                                byte or word data
+
+                r,r1,r2         register r0,r1,r2,r3,r4,r5,r6, or r7
+
+                @r              indirect on register r0 or r1
+                @dptr           indirect on data pointer
+                @a+dptr         indirect on accumulator
+                                plus data pointer
+                @a+pc           indirect on accumulator
+                                plus program counter
+
+                addr            direct memory address
+
+                bitaddr         bit address
+
+                label           call or jump label
+
+        The terms data, addr, bitaddr, and label may all be expressions.
+
+           Note  that  not all addressing modes are valid with every in-
+        struction.  Refer to the 8051 technical data for valid modes.
+
+
+        K.3.1  Inherent Instructions
+
+                nop
+
+
+        AS8051 ASSEMBLER                                        PAGE K-3
+        8051 INSTRUCTION SET
+
+
+        K.3.2  Move Instructions
+
+                mov     a,#data         mov     a,addr
+                mov     a,r             mov     a,@r
+
+                mov     r,#data         mov     r,addr
+                mov     r,a
+
+                mov     addr,a          mov     addr,#data
+                mov     addr,r          mov     addr,@r
+                mov     addr1,addr2     mov     bitaddr,c
+
+                mov     @r,#data        mov     @r,addr
+                mov     @r,a
+
+                mov     c,bitaddr
+                mov     dptr,#data
+
+                movc    a,@a+dptr       movc    a,@a+pc
+                movx    a,@dptr         movx    a,@r
+                movx    @dptr,a         movx    @r,a
+
+
+        K.3.3  Single Operand Instructions
+
+                clr     a               clr     c
+                clr     bitaddr
+                cpl     a               cpl     c
+                cpl     bitaddr
+                setb    c               setb    bitaddr
+
+                da      a
+                rr      a               rrc     a
+                rl      a               rlc     a
+                swap    a
+
+                dec     a               dec     r
+                dec     @r
+                inc     a               inc     r
+                inc     dptr            inc     @r
+
+                div     ab              mul     ab
+
+                pop     addr            push    addr
+
+
+        AS8051 ASSEMBLER                                        PAGE K-4
+        8051 INSTRUCTION SET
+
+
+        K.3.4  Two Operand Instructions
+
+                add     a,#data         add     a,addr
+                add     a,r             add     a,@r
+                addc    a,#data         addc    a,addr
+                addc    a,r             addc    a,@r
+                subb    a,#data         subb    a,addr
+                subb    a,r             subb    a,@r
+                orl     a,#data         orl     a,addr
+                orl     a,r             orl     a,@r
+                orl     addr,a          orl     addr,#data
+                orl     c,bitaddr       orl     c,/bitaddr
+                anl     a,#data         anl     a,addr
+                anl     a,r             anl     a,@r
+                anl     addr,a          anl     addr,#data
+                anl     c,bitaddr       anl     c,/bitaddr
+                xrl     a,#data         xrl     a,addr
+                xrl     a,r             xrl     a,@r
+                xrl     addr,a          xrl     addr,#data
+                xrl     c,bitaddr       xrl     c,/bitaddr
+                xch     a,addr          xch     a,r
+                xch     a,@r            xchd    a,@r
+
+
+        K.3.5  Call and Return Instructions
+
+                acall   label           lcall   label
+                ret                     reti
+                in      data
+                out     data
+                rst     data
+
+
+        K.3.6  Jump Instructions
+
+                ajmp    label
+                cjne    a,#data,label   cjne    a,addr,label
+                cjne    r,#data,label   cjne    @r,#data,label
+                djnz    r,label         djnz    addr,label
+                jbc     bitadr,label
+                jb      bitadr,label    jnb     bitadr,label
+                jc      label           jnc     label
+                jz      label           jnz     label
+                jmp     @a+dptr
+                ljmp    label           sjmp    label
+
+
+        AS8051 ASSEMBLER                                        PAGE K-5
+        8051 INSTRUCTION SET
+
+
+        K.3.7  Predefined Symbols:  SFR Map
+
+                        --------- 4 Bytes ----------
+                        ----    ----    ----    ----
+                FC                                          FF
+                F8                                          FB
+                F4                                          F7
+                F0      B                                   F3
+                EC                                          EF
+                E8                                          EB
+                E4                                          E7
+                E0      ACC                                 E3
+                DC                                          DF
+                D8                                          DB
+                D4                                          D7
+                D0      PSW                                 D3
+                CC   [  TL2     TH2                     ]   CF
+                C8   [  T2CON           RCAP2L  RCAP2H  ]   CB
+                C4                                          C7
+                C0                                          C3
+                BC                                          BF
+                B8      IP                                  BB
+                B4                                          B7
+                B0      P3                                  B3
+                AC                                          AF
+                A8      IE                                  AB
+                A4                                          A7
+                A0      P2                                  A3
+                9C                                          9F
+                98      SCON    SBUF                        9B
+                94                                          97
+                90      P1                                  93
+                8C      TH0     TH1                         8F
+                88      TCON    TMOD    TL0     TL1         8B
+                84                              PCON        87
+                80      P0      SP      DPL     DPH         83
+
+                [...] Indicates Resident in 8052, not 8051
+
+
+        AS8051 ASSEMBLER                                        PAGE K-6
+        8051 INSTRUCTION SET
+
+
+        K.3.8  Predefined Symbols:  SFR Bit Addresses
+
+                        ---------- 4 BITS ----------
+                        ----    ----    ----    ----
+                FC                                          FF
+                F8                                          FB
+                F4      B.4     B.5     B.6     B.7         F7
+                F0      B.0     B.1     B.2     B.3         F3
+                EC                                          EF
+                E8                                          EB
+                E4      ACC.4   ACC.5   ACC.6   ACC.7       E7
+                E0      ACC.0   ACC.1   ACC.2   ACC.3       E3
+                DC                                          DF
+                D8                                          DB
+                D4      PSW.4   PSW.5   PSW.6   PSW.7       D7
+                D0      PSW.0   PSW.1   PSW.2   PSW.3       D3
+                CC   [  T2CON.4 T2CON.5 T2CON.6 T2CON.7 ]   CF
+                C8   [  T2CON.0 T2CON.1 T2CON.2 T2CON.3 ]   CB
+                C4                                          C7
+                C0                                          C3
+                BC      IP.4    IP.5    IP.6    IP.7        BF
+                B8      IP.0    IP.1    IP.2    IP.3        BB
+                B4      P3.4    P3.5    P3.6    P3.7        B7
+                B0      P3.0    P3.1    P3.2    P3.3        B3
+                AC      IE.4    IE.5    EI.6    IE.7        AF
+                A8      IE.0    IE.1    IE.2    IE.3        AB
+                A4      P2.4    P2.5    P2.6    P2.7        A7
+                A0      P2.0    P2.1    P2.2    P2.3        A3
+                9C      SCON.4  SCON.5  SCON.6  SCON.7      9F
+                98      SCON.0  SCON.1  SCON.2  SCON.3      9B
+                94      P1.4    P1.5    P1.6    P1.7        97
+                90      P1.0    P1.1    P1.2    P1.3        93
+                8C      TCON.4  TCON.5  TCON.6  TCON.7      8F
+                88      TCON.0  TCON.1  TCON.2  TCON.3      8B
+                84      P0.4    P0.5    P0.6    P0.7        87
+                80      P0.0    P0.1    P0.2    P0.3        83
+
+                [...] Indicates Resident in 8052, not 8051
+
+
+        AS8051 ASSEMBLER                                        PAGE K-7
+        8051 INSTRUCTION SET
+
+
+        K.3.9  Predefined Symbols:  Control Bits
+
+                        ---------- 4 BITS ----------
+                        ----    ----    ----    ----
+                FC                                          FF
+                F8                                          FB
+                F4                                          F7
+                F0                                          F3
+                EC                                          EF
+                E8                                          EB
+                E4                                          E7
+                E0                                          E3
+                DC                                          DF
+                D8                                          DB
+                D4      RS1     F0      AC      CY          D7
+                D0      P               OV      RS0         D3
+                CC   [  TLCK    RCLK    EXF2    TF2     ]   CF
+                C8   [  CPRL2   CT2     TR2     EXEN2   ]   CB
+                C4                                          C7
+                C0                                          C3
+                BC      PS      PT2                         BF
+                B8      PX0     PT0     PX1     PT1         BB
+                B4                                          B7
+                B0      RXD     TXD     INT0    INT1        B3
+                AC      ES      ET2             EA          AF
+                A8      EX0     ET0     EX1     ET1         AB
+                A4                                          A7
+                A0                                          A3
+                9C      REN     SM2     SM1     SM0         9F
+                98      RI      TI      RB8     TB8         9B
+                94                                          97
+                90                                          93
+                8C      TR0     TF0     TR1     TF1         8F
+                88      IT0     IE0     IT1     IE1         8B
+                84                                          87
+                80                                          83
+
+                [...] Indicates Resident in 8052, not 8051
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                   APPENDIX L
+
+                                AS8085 ASSEMBLER
+
+
+
+
+
+        L.1  8085 REGISTER SET
+
+        The  following  is  a  list  of  the 8080/8085 registers used by
+        AS8085:
+
+                a,b,c,d,e,h,l   -       8-bit accumulators
+                m               -       memory through (hl)
+                sp              -       stack pointer
+                psw             -       status word
+
+
+        L.2  8085 INSTRUCTION SET
+
+
+           The  following tables list all 8080/8085 mnemonics recognized
+        by the AS8085  assembler.   The  following  list  specifies  the
+        format for each addressing mode supported by AS8085:
+
+                #data           immediate data
+                                byte or word data
+
+                r,r1,r2         register or register pair
+                                psw,a,b,c,d,e,h,l
+                                bc,de,hl,sp,pc
+
+                m               memory address using (hl)
+
+                addr            direct memory addressing
+
+                label           call or jump label
+
+        The terms data, m, addr, and label may be expressions.
+
+           Note  that  not all addressing modes are valid with every in-
+        struction, refer to  the  8080/8085  technical  data  for  valid
+        modes.
+
+
+        AS8085 ASSEMBLER                                        PAGE L-2
+        8085 INSTRUCTION SET
+
+
+        L.2.1  Inherent Instructions
+
+                cma             cmc
+                daa             di
+                ei              hlt
+                nop             pchl
+                ral             rar
+                ret             rim
+                rrc             rlc
+                sim             sphl
+                stc             xchg
+                xthl
+
+
+        L.2.2  Register/Memory/Immediate Instructions
+
+                adc     r       adc     m       aci     #data
+                add     r       add     m       adi     #data
+                ana     r       ana     m       ani     #data
+                cmp     r       cmp     m       cpi     #data
+                ora     r       ora     m       ori     #data
+                sbb     r       sbb     m       sbi     #data
+                sub     r       sub     m       sui     #data
+                xra     r       xra     m       xri     #data
+
+
+        L.2.3  Call and Return Instructions
+
+                cc      label           rc
+                cm      label           rm
+                cnc     label           rnc
+                cnz     label           rnz
+                cp      label           rp
+                cpe     label           rpe
+                cpo     label           rpo
+                cz      label           rz
+                call    label
+
+
+        L.2.4  Jump Instructions
+
+                jc      label
+                jm      label
+                jnc     label
+                jnz     label
+                jp      label
+                jpe     label
+                jpo     label
+                jz      label
+                jmp     label
+
+
+        AS8085 ASSEMBLER                                        PAGE L-3
+        8085 INSTRUCTION SET
+
+
+        L.2.5  Input/Output/Reset Instructions
+
+                in      data
+                out     data
+                rst     data
+
+
+        L.2.6  Move Instructions
+
+                mov     r1,r2
+                mov     r,m
+                mov     m,r
+
+                mvi     r,#data
+                mvi     m,#data
+
+
+        L.2.7  Other Instructions
+
+                dcr     r               dcr     m
+                inr     r               inr     m
+
+                dad     r               dcx     r
+                inx     r               ldax    r
+                pop     r               push    r
+                stax    r
+
+                lda     addr            lhld    addr
+                shld    addr            sta     addr
+
+                lxi     r,#data
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                   APPENDIX M
+
+                                 ASZ80 ASSEMBLER
+
+
+
+
+
+        M.1  .hd64 DIRECTIVE
+
+        Format:
+
+                .hd64
+
+        The  .hd64  directive enables processing of the HD64180 specific
+        mnemonics not included in  the  Z80  instruction  set.   HD64180
+        mnemonics  encountered  without  the  .hd64  directive  will  be
+        flagged with an 'o' error.
+
+
+        M.2  Z80 REGISTER SET AND CONDITIONS
+
+
+           The following is a complete list of register designations and
+        condition mnemonics:
+
+                byte registers  -       a,b,c,d,e,h,l,i,r
+                register pairs  -       af,af',bc,de,hl
+                word registers  -       pc,sp,ix,iy
+
+                C -     carry bit set
+                M -     sign bit set
+                NC -    carry bit clear
+                NZ -    zero bit clear
+                P -     sign bit clear
+                PE -    parity even
+                PO -    parity odd
+                Z -     zero bit set
+
+
+
+
+        ASZ80 ASSEMBLER                                         PAGE M-2
+        Z80 INSTRUCTION SET
+
+
+        M.3  Z80 INSTRUCTION SET
+
+
+           The  following  tables  list all Z80/HD64180 mnemonics recog-
+        nized by the ASZ80 assembler.  The designation []  refers  to  a
+        required addressing mode argument.  The following list specifies
+        the format for each addressing mode supported by ASZ80:
+
+                #data           immediate data
+                                byte or word data
+
+                n               byte value
+
+                rg              a byte register
+                                a,b,c,d,e,h,l
+
+                rp              a register pair
+                                bc,de,hl
+
+                (hl)            implied addressing or
+                                register indirect addressing
+
+                (label)         direct addressing
+
+                offset(ix)      indexed addressing with
+                                an offset
+
+                label           call/jmp/jr label
+
+        The  terms  data,  dir,  offset, and ext may all be expressions.
+        The terms dir and offset are not allowed to be  external  refer-
+        ences.
+
+           Note  that  not all addressing modes are valid with every in-
+        struction, refer to the Z80/HD64180  technical  data  for  valid
+        modes.
+
+
+        ASZ80 ASSEMBLER                                         PAGE M-3
+        Z80 INSTRUCTION SET
+
+
+        M.3.1  Inherent Instructions
+
+                ccf             cpd
+                cpdr            cpi
+                cpir            cpl
+                daa             di
+                ei              exx
+                halt            neg
+                nop             reti
+                retn            rla
+                rlca            rld
+                rra             rrca
+                rrd             scf
+
+
+        M.3.2  Implicit Operand Instructions
+
+                adc     a,[]            adc     []
+                add     a,[]            add     []
+                and     a,[]            and     []
+                cp      a,[]            cp      []
+                dec     a,[]            dec     []
+                inc     a,[]            inc     []
+                or      a,[]            or      []
+                rl      a,[]            rl      []
+                rlc     a,[]            rlc     []
+                rr      a,[]            rr      []
+                rrc     a,[]            rrc     []
+                sbc     a,[]            sbc     []
+                sla     a,[]            sla     []
+                sra     a,[]            sra     []
+                srl     a,[]            srl     []
+                sub     a,[]            sub     []
+                xor     a,[]            xor     []
+
+
+        ASZ80 ASSEMBLER                                         PAGE M-4
+        Z80 INSTRUCTION SET
+
+
+        M.3.3  Load Instruction
+
+                ld      rg,[]           ld      [],rg
+                ld      (bc),a          ld      a,(bc)
+                ld      (de),a          ld      a,(de)
+                ld      (label),a       ld      a,(label)
+                ld      (label),rp      ld      rp,(label)
+                ld      i,a             ld      r,a
+                ld      a,i             ld      a,r
+                ld      sp,hl           ld      sp,ix
+                ld      sp,iy           ld      rp,#data
+
+                ldd                     lddr
+                ldi                     ldir
+
+
+        M.3.4  Call/Return Instructions
+
+                call    C,label         ret     C
+                call    M,label         ret     M
+                call    NC,label        ret     NC
+                call    NZ,label        ret     NZ
+                call    P,label         ret     P
+                call    PE,label        ret     PE
+                call    PO,label        ret     PO
+                call    Z,label         ret     Z
+                call    label           ret
+
+
+        M.3.5  Jump and Jump to Subroutine Instructions
+
+                jp      C,label         jp      M,label
+                jp      NC,label        jp      NZ,label
+                jp      P,label         jp      PE,label
+                jp      PO,label        jp      Z,label
+
+                jp      (hl)            jp      (ix)
+                jp      (iy)            jp      label
+
+                djnz    label
+
+                jr      C,label         jr      NC,label
+                jr      NZ,label        jr      Z,label
+                jr      label
+
+
+        ASZ80 ASSEMBLER                                         PAGE M-5
+        Z80 INSTRUCTION SET
+
+
+        M.3.6  Bit Manipulation Instructions
+
+                bit     n,[]
+                res     n,[]
+                set     n,[]
+
+
+        M.3.7  Interrupt Mode and Reset Instructions
+
+                im      n
+                im      n
+                im      n
+                rst     n
+
+
+        M.3.8  Input and Output Instructions
+
+                in      a,(n)           in      rg,(c)
+                ind                     indr
+                ini                     inir
+
+                out     (n),a           out     (c),rg
+                outd                    otdr
+                outi                    otir
+
+
+        M.3.9  Register Pair Instructions
+
+                add     hl,rp           add     ix,rp
+                add     iy,rp
+
+                adc     hl,rp           sbc     hl,rp
+
+                ex      (sp),hl         ex      (sp),ix
+                ex      (sp),iy
+                ex      de,hl
+                ex      af,af'
+
+                push    rp              pop     rp
+
+
+        ASZ80 ASSEMBLER                                         PAGE M-6
+        Z80 INSTRUCTION SET
+
+
+        M.3.10  HD64180 Specific Instructions
+
+                in0     rg,(n)
+                out0    (n),rg
+
+                otdm                    otdmr
+                otim                    otimr
+
+                mlt     bc              mlt     de
+                mlt     hl              mlt     sp
+
+                slp
+
+                tst     a
+                tstio   #data
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+                                   APPENDIX N
+
+                                AS6500 ASSEMBLER
+
+
+
+
+
+        N.1  ACKNOWLEDGMENT
+
+
+           Thanks  to  Marko  Makela  for his contribution of the AS6500
+        cross assembler.
+
+                Marko Makela
+                Sillitie 10 A
+                01480 Vantaa
+                Finland
+                Internet: Marko.Makela@Helsinki.Fi
+                EARN/BitNet: msmakela@finuh
+
+           Several  additions and modifications were made to his code to
+        support the following families of 6500 processors:
+
+                (1)     650X and 651X processor family
+                (2)     65F11 and 65F12 processor family
+                (3)     65C00/21 and 65C29 processor family
+                (4)     65C02, 65C102, and 65C112 processor family
+
+           The  instruction  syntax of this cross assembler contains two
+        peculiarities:  (1) the addressing indirection is denoted by the
+        square  brackets  []  and (2) the `bbrx' and `bbsx' instructions
+        are written `bbr0 memory,label'.
+
+
+
+
+        AS6500 ASSEMBLER                                        PAGE N-2
+        6500 REGISTER SET
+
+
+        N.2  6500 REGISTER SET
+
+        The following is a list of the 6500 registers used by AS6500:
+
+                a       -       8-bit accumulator
+                x,y     -       index registers
+
+
+        N.3  6500 INSTRUCTION SET
+
+
+           The  following  tables  list all 6500 family mnemonics recog-
+        nized by the AS6500 assembler.  The designation [] refers  to  a
+        required addressing mode argument.  The following list specifies
+        the format for each addressing mode supported by AS6500:
+
+                #data           immediate data
+                                byte or word data
+
+                *dir            direct page addressing
+                                (see .setdp directive)
+                                0 <= dir <= 255
+
+                offset,x        indexed addressing
+                offset,y        indexed addressing
+                                address = (offset + (x or y))
+
+                [offset,x]      pre-indexed indirect addressing
+                                0 <= offset <= 255
+                                address = contents of location
+                                    (offset + (x or y)) mod 256
+
+                [offset],y      post-indexed indirect addressing
+                                address = contents of location at offset
+                                    plus the value of the y register
+
+                [address]       indirect addressing
+
+                ext             extended addressing
+
+                label           branch label
+
+                address,label   direct page memory location
+                                branch label
+                                bbrx and bbsx instruction addressing
+
+        The  terms data, dir, offset, address, ext, and label may all be
+        expressions.
+
+           Note  that  not all addressing modes are valid with every in-
+        struction, refer to the 65xx technical data for valid modes.
+
+
+        AS6500 ASSEMBLER                                        PAGE N-3
+        6500 INSTRUCTION SET
+
+
+        N.3.1  Processor Specific Directives
+
+
+           The  AS6500  cross  assembler has four (4) processor specific
+        assembler directives which  define  the  target  65xx  processor
+        family:
+
+                .r6500          Core 650X and 651X family (default)
+                .r65f11         Core plus 65F11 and 65F12
+                .r65c00         Core plus 65C00/21 and 65C29
+                .r65c02         Core plus 65C02, 65C102, and 65C112
+
+
+        N.3.2  65xx Core Inherent Instructions
+
+                brk                     clc
+                cld                     cli
+                clv                     dex
+                dey                     inx
+                iny                     nop
+                pha                     php
+                pla                     plp
+                rti                     rts
+                sec                     sed
+                sei                     tax
+                tay                     tsx
+                txa                     txs
+                tya
+
+
+        N.3.3  65xx Core Branch Instructions
+
+                bcc     label           bhs     label
+                bcs     label           blo     label
+                beq     label           bmi     label
+                bne     label           bpl     label
+                bvc     label           bvs     label
+
+
+        N.3.4  65xx Core Single Operand Instructions
+
+                asl     []
+                dec     []
+                inc     []
+                lsr     []
+                rol     []
+                ror     []
+
+
+        AS6500 ASSEMBLER                                        PAGE N-4
+        6500 INSTRUCTION SET
+
+
+        N.3.5  65xx Core Double Operand Instructions
+
+                adc     []
+                and     []
+                bit     []
+                cmp     []
+                eor     []
+                lda     []
+                ora     []
+                sbc     []
+                sta     []
+
+
+        N.3.6  65xx Core Jump and Jump to Subroutine Instructions
+
+                jmp     []              jsr     []
+
+
+        N.3.7  65xx Core Miscellaneous X and Y Register Instructions
+
+                cpx     []
+                cpy     []
+                ldx     []
+                stx     []
+                ldy     []
+                sty     []
+
+
+        AS6500 ASSEMBLER                                        PAGE N-5
+        6500 INSTRUCTION SET
+
+
+        N.3.8  65F11 and 65F12 Specific Instructions
+
+                bbr0    [],label                bbr1    [],label
+                bbr2    [],label                bbr3    [],label
+                bbr4    [],label                bbr5    [],label
+                bbr6    [],label                bbr7    [],label
+
+                bbs0    [],label                bbs1    [],label
+                bbs2    [],label                bbs3    [],label
+                bbs4    [],label                bbs5    [],label
+                bbs6    [],label                bbs7    [],label
+
+                rmb0    []                      rmb1    []
+                rmb2    []                      rmb3    []
+                rmb4    []                      rmb5    []
+                rmb6    []                      rmb7    []
+
+                smb0    []                      smb1    []
+                smb2    []                      smb3    []
+                smb4    []                      smb5    []
+                smb6    []                      smb7    []
+
+
+        N.3.9  65C00/21 and 65C29 Specific Instructions
+
+                bbr0    [],label                bbr1    [],label
+                bbr2    [],label                bbr3    [],label
+                bbr4    [],label                bbr5    [],label
+                bbr6    [],label                bbr7    [],label
+
+                bbs0    [],label                bbs1    [],label
+                bbs2    [],label                bbs3    [],label
+                bbs4    [],label                bbs5    [],label
+                bbs6    [],label                bbs7    [],label
+
+                bra     label
+
+                phx                             phy
+                plx                             ply
+
+                rmb0    []                      rmb1    []
+                rmb2    []                      rmb3    []
+                rmb4    []                      rmb5    []
+                rmb6    []                      rmb7    []
+
+                smb0    []                      smb1    []
+                smb2    []                      smb3    []
+                smb4    []                      smb5    []
+                smb6    []                      smb7    []
+
+
+        AS6500 ASSEMBLER                                        PAGE N-6
+        6500 INSTRUCTION SET
+
+
+        N.3.10  65C02, 65C102, and 65C112 Specific Instructions
+
+                bbr0    [],label                bbr1    [],label
+                bbr2    [],label                bbr3    [],label
+                bbr4    [],label                bbr5    [],label
+                bbr6    [],label                bbr7    [],label
+
+                bbs0    [],label                bbs1    [],label
+                bbs2    [],label                bbs3    [],label
+                bbs4    [],label                bbs5    [],label
+                bbs6    [],label                bbs7    [],label
+
+                bra     label
+
+                phx                             phy
+                plx                             ply
+
+                rmb0    []                      rmb1    []
+                rmb2    []                      rmb3    []
+                rmb4    []                      rmb5    []
+                rmb6    []                      rmb7    []
+
+                smb0    []                      smb1    []
+                smb2    []                      smb3    []
+                smb4    []                      smb5    []
+                smb6    []                      smb7    []
+
+                stz     []
+                trb     []
+                tsb     []
+
+           Additional  addressing  modes for the following core instruc-
+        tions are also available with the 65C02, 65C102, and 65C112 pro-
+        cessors.
+
+                adc     []                      and     []
+                cmp     []                      eor     []
+                lda     []                      ora     []
+                sbc     []                      sta     []
+
+                bit     []                      jmp     []
+
+                dec                             inc
+
 + + + +

+ +... Home Page

+ + diff --git a/as/doc/format.txt b/as/doc/format.txt new file mode 100644 index 0000000..0cc625e --- /dev/null +++ b/as/doc/format.txt @@ -0,0 +1,142 @@ + 2.5.1 Object Module Format + + + The first line of an object module contains the [XDQ][HL] + format specifier (i.e. XH indicates a hexidecimal file with + most significant byte first) for the following designators. + + + 2.5.2 Header Line + + H aa areas gg global symbols + + The header line specifies the number of areas(aa) and the + number of global symbols(gg) defined or referenced in this ob- + ject module segment. + + + 2.5.3 Module Line + + M name + + The module line specifies the module name from which this + header segment was assembled. The module line will not appear + if the .module directive was not used in the source program. + + + 2.5.4 Symbol Line + + S string Defnnnn + + or + + S string Refnnnn + + The symbol line defines (Def) or references (Ref) the symbol + 'string' with the value nnnn. The defined value is relative to + the current area base address. References to constants and + external global symbols will always appear before the first area + definition. References to external symbols will have a value of + zero. + + + 2.5.5 Area Line + + A label size ss flags ff + + The area line defines the area label, the size (ss) of the + area in bytes, and the area flags (ff). The area flags specify + the ABS, REL, CON, OVR, and PAG parameters: + + OVR/CON (0x04/0x00 i.e. bit position 2) + + ABS/REL (0x08/0x00 i.e. bit position 3) + + PAG (0x10 i.e. bit position 4) + + + 2.5.6 T Line + + T xx xx nn nn nn nn nn ... + + The T line contains the assembled code output by the assem- + bler with xx xx being the offset address from the current area + base address and nn being the assembled instructions and data in + byte format. + + + 2.5.7 R Line + + R 0 0 nn nn n1 [n1x] n2 xx xx ... + + The R line provides the relocation information to the linker. + The nn nn value is the current area index, i.e. which area the + current values were assembled. Relocation information is en- + coded in groups of 4 (possibly 5) bytes: + + 1. n1 (and optionally n1x) is the relocation mode and object + format: + 1. bit 0 word(0x00)/byte(0x01) + 2. bit 1 relocatable area(0x00)/symbol(0x02) + 3. bit 2 normal(0x00)/PC relative(0x04) relocation + 4. bit 3 1-byte(0x00)/2-byte(0x08) object format for + byte data + 5. bit 4 signed(0x00)/unsigned(0x10) byte data + 6. bit 5 normal(0x00)/page '0'(0x20) reference + 7. bit 6 normal(0x00)/page 'nnn'(0x40) reference + 8. bit 7 LSB byte(0x00)/MSB byte(0x80) with 2-byte + mode + 9. bit 8 1 or 2 (0x00)/3-byte (0x100) object format + for byte data. + 10. bit 9 LSB or MSB (middle byte) (0x00) or byte 3 + (real MSB) (0x200) for 3-byte mode. + + If the upper four bits of n1 are set (i.e. + (n1 & 0xf0) == 0xf0), it is taken as an escape character, + and the relocation mode will consist of the lower four bits + of n1 left shifted 8 bits or'ed with the value of n1x. If + the upper four bits of n1 are not all set, then it is not an + escape character, and the n1x byte is not present. + + This escape mechanism allows a 12-bit relocation mode value. + + Note that in byte mode, when 3-byte mode is used (bits 0 + and 8 are both set), the MSB bit (bit 7) really refers to + the 16 bit MSB (the middle byte of the 24-bit value) while + the "byte 3" bit (bit 9) refers to the 24-bit MSB. + + 2. n2 is a byte index into the corresponding (i.e. pre- + ceeding) T line data (i.e. a pointer to the data to be + updated by the relocation). The T line data may be + 1-byte or 2-byte byte data format or 2-byte word + format. + + 3. xx xx is the area/symbol index for the area/symbol be- + ing referenced. the corresponding area/symbol is found + in the header area/symbol lists. + + + The groups of 4 bytes are repeated for each item requiring relo- + cation in the preceeding T line. + + + 2.5.8 P Line + + P 0 0 nn nn n1 n2 xx xx + + The P line provides the paging information to the linker as + specified by a .setdp directive. The format of the relocation + information is identical to that of the R line. The correspond- + ing T line has the following information: + T xx xx aa aa bb bb + + Where aa aa is the area reference number which specifies the + selected page area and bb bb is the base address of the page. + bb bb will require relocation processing if the 'n1 n2 xx xx' is + specified in the P line. The linker will verify that the base + address is on a 256 byte boundary and that the page length of an + area defined with the PAG type is not larger than 256 bytes. + + The linker defaults any direct page references to the first + area defined in the input REL file. All ASxxxx assemblers will + specify the _CODE area first, making this the default page area. diff --git a/as/hc08/Makefile.as_hc08 b/as/hc08/Makefile.as_hc08 new file mode 100644 index 0000000..b2bf0b1 --- /dev/null +++ b/as/hc08/Makefile.as_hc08 @@ -0,0 +1,59 @@ +CC=gcc +LEX=flex +YACC=bison +INCROOT=. +CFLAGS=-ggdb -O2 -I $(INCROOT) +TARGETS=$(SDCCDIR)/bin/as_hc08 +ALLOBJECTS= asmain.o aslex.o assym.o assubr.o asnoice.o \ + asexpr.o asdata.o aslist.o asout.o \ + h08ext.o h08pst.o h08mch.o h08adr.o strcmpi.o + +all:: $(TARGETS) + +clean:: + rm -f $(TARGETS) $(ALLOBJECTS) + +asmain.o : asmain.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o asmain.o asmain.c + +aslex.o : aslex.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o aslex.o aslex.c + +assym.o : assym.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o assym.o assym.c + +assubr.o : assubr.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o assubr.o assubr.c + +asexpr.o : asexpr.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o asexpr.o asexpr.c + +asdata.o : asdata.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o asdata.o asdata.c + +aslist.o : aslist.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o aslist.o aslist.c + +asout.o : asout.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o asout.o asout.c + +asnoice.o : asnoice.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o asnoice.o asnoice.c + +h08ext.o : h08ext.c asm.h m6808.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o h08ext.o h08ext.c + +h08pst.o : h08pst.c asm.h m6808.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o h08pst.o h08pst.c + +h08mch.o : h08mch.c asm.h m6808.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o h08mch.o h08mch.c + +h08adr.o : h08adr.c asm.h m6808.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o h08adr.o h08adr.c + +strcmpi.o : strcmpi.c strcmpi.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o strcmpi.o strcmpi.c + +$(TARGETS): $(ALLOBJECTS) + $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $(ALLOBJECTS) diff --git a/as/hc08/Makefile.bcc b/as/hc08/Makefile.bcc new file mode 100644 index 0000000..b822c8d --- /dev/null +++ b/as/hc08/Makefile.bcc @@ -0,0 +1,19 @@ +# Makefile for Borland C++ + +PRJDIR = ../.. + +!include $(PRJDIR)/Bcc.inc + +ASOBJECTS = asmain.obj aslex.obj assubr.obj \ + asexpr.obj asdata.obj aslist.obj asout.obj \ + h08ext.obj h08pst.obj h08mch.obj h08adr.obj \ + ../asxxsrc/strcmpi.obj ../asxxsrc/assym.obj \ + ../asxxsrc/asnoice.obj \ + ../../support/Util/dbuf.obj ../../support/Util/dbuf_string.obj + +ASX8051 = $(PRJDIR)/bin/asx8051.exe + +all: $(ASX8051) + +$(ASX8051): $(ASOBJECTS) + $(CC) $(CFLAGS) -e$@ $(ASOBJECTS) diff --git a/as/hc08/Makefile.in b/as/hc08/Makefile.in new file mode 100644 index 0000000..97cdcd0 --- /dev/null +++ b/as/hc08/Makefile.in @@ -0,0 +1,136 @@ +# +# +# + +VERSION = @VERSION@ +VERSIONHI = @VERSIONHI@ +VERSIONLO = @VERSIONLO@ +VERSIONP = @VERSIONP@ + +SHELL = /bin/sh +CC = @CC@ +CPP = @CPP@ +INSTALL = @INSTALL@ +STRIP = @STRIP@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +srcdir = @srcdir@ +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @info@ + +EXEEXT = @EXEEXT@ + +VPATH = @srcdir@ + +CPPFLAGS = @CPPFLAGS@ -I. -I$(srcdir) +CFLAGS = @CFLAGS@ -Wall -I. -I$(srcdir) -I$(srcdir)/../../support/Util +M_OR_MM = @M_OR_MM@ +LDFLAGS = @LDFLAGS@ + +OBJDIR = obj + +UTILLIB = $(srcdir)/../../support/Util +UTILSRC = dbuf.c dbuf_string.c +UTILLIBOBJS = $(UTILSRC:%.c=$(OBJDIR)/%.o) + +ASXXLIB = $(srcdir)/../asxxsrc +ASXXLIBSRC = strcmpi.c assym.c aslex.c asnoice.c +ASXXLIBOBJS = $(ASXXLIBSRC:%.c=$(OBJDIR)/%.o) + +SRC = asmain.c assubr.c \ + asexpr.c asdata.c aslist.c asout.c \ + m08ext.c m08pst.c m08mch.c m08adr.c +OBJS = $(SRC:%.c=$(OBJDIR)/%.o) + +ASSOURCES = $(SRC) $(ASXXLIBSRC:%.c=$(ASXXLIB)/%.c) $(UTILSRC:%.c=$(UTILLIB)/%.c) + +ASOBJECTS = $(OBJS) $(ASXXLIBOBJS) $(UTILLIBOBJS) + +ASX = $(top_builddir)/bin/as-hc08$(EXEEXT) +DEST = $(DESTDIR)$(bindir)/as-hc08$(EXEEXT) + +transform = @program_transform_name@ + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf $(ASX) + +$(ASX): $(ASOBJECTS) + $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $(ASOBJECTS) + +# Compiling and installing everything and running test +# ---------------------------------------------------- +install: all installdirs + $(INSTALL) $(ASX) `echo $(DEST)|sed '$(transform)'` + $(STRIP) `echo $(DEST)|sed '$(transform)'` + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(DEST) + + +# Performing self-test +# -------------------- +check: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + $(INSTALL) -d $(DESTDIR)$(bindir) + + +# Creating dependencies +# --------------------- +dep: Makefile.dep + +Makefile.dep: $(ASSOURCES) $(srcdir)/*.h + $(CPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.c,$^) >Makefile.dep + +ifeq "$(findstring $(MAKECMDGOALS),uninstall check installcheck installdirs \ + clean distclean mostlyclean realclean)" "" + -include Makefile.dep +endif +include $(srcdir)/clean.mk + +# My rules +# -------- +$(OBJDIR)/.stamp: + mkdir -p $(OBJDIR) + touch $(OBJDIR)/.stamp + +$(OBJDIR)/%.o: %.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + +$(OBJDIR)/%.o: $(ASXXLIB)/%.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + +$(OBJDIR)/%.o: $(UTILLIB)/%.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" freshconf;\ + fi + +# End of Makefile diff --git a/as/hc08/as_hc08.dsp b/as/hc08/as_hc08.dsp new file mode 100644 index 0000000..3f2fd2d --- /dev/null +++ b/as/hc08/as_hc08.dsp @@ -0,0 +1,174 @@ +# Microsoft Developer Studio Project File - Name="as_hc08" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Console Application" 0x0103 + +CFG=as_hc08 - Win32 Debug +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "as_hc08.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "as_hc08.mak" CFG="as_hc08 - Win32 Debug" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "as_hc08 - Win32 Release" (based on "Win32 (x86) Console Application") +!MESSAGE "as_hc08 - Win32 Debug" (based on "Win32 (x86) Console Application") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "as_hc08 - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 0 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 0 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD CPP /nologo /W3 /GX /O2 /I "." /I "../../support/Util" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /machine:I386 +# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /machine:I386 /out:"..\..\bin_vc\as-hc08.exe" + +!ELSEIF "$(CFG)" == "as_hc08 - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /GZ /c +# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I "." /I "../../support/Util" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /GZ /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /debug /machine:I386 /pdbtype:sept +# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /debug /machine:I386 /out:"..\..\bin_vc\as-hc08.exe" /pdbtype:sept + +!ENDIF + +# Begin Target + +# Name "as_hc08 - Win32 Release" +# Name "as_hc08 - Win32 Debug" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\asdata.c +# End Source File +# Begin Source File + +SOURCE=.\asexpr.c +# End Source File +# Begin Source File + +SOURCE=..\asxxsrc\aslex.c +# End Source File +# Begin Source File + +SOURCE=.\aslist.c +# End Source File +# Begin Source File + +SOURCE=.\asmain.c +# End Source File +# Begin Source File + +SOURCE=..\asxxsrc\asnoice.c +# End Source File +# Begin Source File + +SOURCE=.\asout.c +# End Source File +# Begin Source File + +SOURCE=.\assubr.c +# End Source File +# Begin Source File + +SOURCE=..\asxxsrc\assym.c +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf.c +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf_string.c +# End Source File +# Begin Source File + +SOURCE=.\m08adr.c +# End Source File +# Begin Source File + +SOURCE=.\m08ext.c +# End Source File +# Begin Source File + +SOURCE=.\m08mch.c +# End Source File +# Begin Source File + +SOURCE=.\m08pst.c +# End Source File +# Begin Source File + +SOURCE=..\asxxsrc\strcmpi.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=.\asm.h +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf.h +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf_string.h +# End Source File +# Begin Source File + +SOURCE=.\m6808.h +# End Source File +# End Group +# End Target +# End Project diff --git a/as/hc08/asdata.c b/as/hc08/asdata.c new file mode 100644 index 0000000..0349acd --- /dev/null +++ b/as/hc08/asdata.c @@ -0,0 +1,300 @@ +/* asdata.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 28-Oct-97 JLH: + * - change s_id from [NCPS] to pointer (comment) + * 2-Nov-97 JLH: + * - add jflag for debug control + */ + +#include +#include +#include +#include "asm.h" + +/*)Module asdata.c + * + * The module asdata.c contains the global constants, + * structures, and variables used in the assembler. + */ + +int aserr; /* ASxxxx error counter + */ +jmp_buf jump_env; /* compiler dependent structure + * used by setjmp() and longjmp() + */ +int inpfil; /* count of assembler + * input files specified + */ +int incfil; /* current file handle index + * for include files + */ +int cfile; /* current file handle index + * of input assembly files + */ +int flevel; /* IF-ELSE-ENDIF flag will be non + * zero for false conditional case + */ +int tlevel; /* current conditional level + */ +int ifcnd[MAXIF+1]; /* array of IF statement condition + * values (0 = FALSE) indexed by tlevel + */ +int iflvl[MAXIF+1]; /* array of IF-ELSE-ENDIF flevel + * values indexed by tlevel + */ + +char afn[PATH_MAX]; /* afile temporary file name + */ +char srcfn[MAXFIL][PATH_MAX];/* array of source file names + */ +int srcline[MAXFIL]; /* source line number + */ +char incfn[MAXINC][PATH_MAX];/* array of include file names + */ +int incline[MAXINC]; /* include line number + */ + +int radix; /* current number conversion radix: + * 2 (binary), 8 (octal), 10 (decimal), + * 16 (hexadecimal) + */ +int line; /* current assembler source + * line number + */ +int page; /* current page number + */ +int lop; /* current line number on page + */ +int pass; /* assembler pass number + */ +int org_cnt; /* .org directive counter + */ +int lflag; /* -l, generate listing flag + */ +int cflag; /* -lc, generate sdcdb debug info + */ +int gflag; /* -g, make undefined symbols global flag + */ +int aflag; /* -a, make all symbols global flag + */ +int jflag; /* -j, generate debug information flag + */ +int oflag; /* -o, generate relocatable output flag + */ +int sflag; /* -s, generate symbol table flag + */ +int pflag; /* -p, enable listing pagination + */ +int xflag; /* -x, listing radix flag + */ +int fflag; /* -f(f), relocations flagged flag + */ +Addr_T laddr; /* address of current assembler line + * or value of .if argument + */ +Addr_T fuzz; /* tracks pass to pass changes in the + * address of symbols caused by + * variable length instruction formats + */ +int lmode; /* listing mode + */ +char *ep; /* pointer into error list + * array eb[NERR] + */ +char eb[NERR]; /* array of generated error codes + */ +const char *ip; /* pointer into the assembler-source + * text line in ib[] + */ +const char *ib; /* assembler-source text line + */ +char *cp; /* pointer to assembler output + * array cb[] + */ +char cb[NCODE]; /* array of assembler output values + */ +int *cpt; /* pointer to assembler relocation type + * output array cbt[] + */ +int cbt[NCODE]; /* array of assembler relocation types + * describing the data in cb[] + */ +char tb[NTITL]; /* Title string buffer + */ +char stb[NSBTL]; /* Subtitle string buffer + */ +char optsdcc[NINPUT]; /* sdcc compile options + */ +int flat24Mode; /* non-zero if we are using DS390 24 bit + * flat mode (via .flat24 directive). + */ + +char symtbl[] = { "Symbol Table" }; +char aretbl[] = { "Area Table" }; + +char module[NCPS]; /* module name string + */ + +/* + * The mne structure is a linked list of the assembler + * mnemonics and directives. The list of mnemonics and + * directives contained in the device dependent file + * xxxpst.c are hashed and linked into NHASH lists in + * module assym.c by syminit(). The structure contains + * the mnemonic/directive name, a subtype which directs + * the evaluation of this mnemonic/directive, a flag which + * is used to detect the end of the mnemonic/directive + * list in xxxpst.c, and a value which is normally + * associated with the assembler mnemonic base instruction + * value. + * + * struct mne + * { + * struct mne *m_mp; Hash link + * char m_id[NCPS]; Mnemonic + * char m_type; Mnemonic subtype + * char m_flag; Mnemonic flags + * Addr_T m_valu; Value + * }; + */ +struct mne *mnehash[NHASH]; + +/* + * The sym structure is a linked list of symbols defined + * in the assembler source files. The first symbol is "." + * defined here. The entry 'struct tsym *s_tsym' + * links any temporary symbols following this symbol and + * preceeding the next normal symbol. The structure also + * contains the symbol's name, type (USER or NEW), flag + * (global, assigned, and multiply defined), a pointer + * to the area structure defining where the symbol is + * located, a reference number assigned by outgsd() in + * asout.c, and the symbols address relative to the base + * address of the area where the symbol is located. + * + * struct sym + * { + * struct sym *s_sp; Hash link + * struct tsym *s_tsym; Temporary symbol link + * char *s_id; Symbol (JLH) + * char s_type; Symbol subtype + * char s_flag; Symbol flags + * struct area *s_area; Area line, 0 if absolute + * int s_ref; Ref. number + * Addr_T s_addr; Address + * }; + */ +struct sym sym[] = { + {NULL, NULL, ".", S_USER, S_END, NULL, 0, 0} +}; + +struct sym *symp; /* pointer to a symbol structure + */ +struct sym *symhash[NHASH]; /* array of pointers to NHASH + * linked symbol lists + */ + +/* + * The area structure contains the parameter values for a + * specific program or data section. The area structure + * is a linked list of areas. The initial default area + * is "_CODE" defined here, the next area structure + * will be linked to this structure through the structure + * element 'struct area *a_ep'. The structure contains the + * area name, area reference number ("_CODE" is 0) determined + * by the order of .area directives, area size determined + * from the total code and/or data in an area, area fuzz is + * an variable used to track pass to pass changes in the + * area size caused by variable length instruction formats, + * and area flags which specify the area's relocation type. + * + * struct area + * { + * struct area *a_ap; Area link + * char a_id[NCPS]; Area Name + * int a_ref; Reference number + * Addr_T a_size; Area size + * Addr_T a_fuzz; Area fuzz + * int a_flag; Area flags + * }; + */ +struct area area[] = { + {NULL, "_CODE", 0, 0, 0, A_CON|A_REL} +}; + +struct area *areap; /* pointer to an area structure + */ + +FILE *lfp; /* list output file handle + */ +FILE *ofp; /* relocation output file handle + */ +FILE *tfp; /* symbol table output file handle + */ +FILE *sfp[MAXFIL]; /* array of assembler-source file handles + */ +FILE *ifp[MAXINC]; /* array of include-file file handles + */ + +/* + * array of character types, one per + * ASCII character + */ +unsigned char ctype[128] = { +/*NUL*/ ILL, ILL, ILL, ILL, ILL, ILL, ILL, ILL, +/*BS*/ ILL, SPACE, ILL, ILL, SPACE, ILL, ILL, ILL, +/*DLE*/ ILL, ILL, ILL, ILL, ILL, ILL, ILL, ILL, +/*CAN*/ ILL, ILL, ILL, ILL, ILL, ILL, ILL, ILL, +/*SPC*/ SPACE, ETC, ETC, ETC, LETTER, BINOP, BINOP, ETC, +/*(*/ ETC, ETC, BINOP, BINOP, ETC, BINOP, LETTER, BINOP, +/*0*/ DGT2, DGT2, DGT8, DGT8, DGT8, DGT8, DGT8, DGT8, +/*8*/ DGT10, DGT10, ETC, ETC, BINOP, ETC, BINOP, ETC, +/*@*/ ETC, LTR16, LTR16, LTR16, LTR16, LTR16, LTR16, LETTER, +/*H*/ LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, +/*P*/ LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, +/*X*/ LETTER, LETTER, LETTER, ETC, ETC, ETC, BINOP, LETTER, +/*`*/ ETC, LTR16, LTR16, LTR16, LTR16, LTR16, LTR16, LETTER, +/*h*/ LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, +/*p*/ LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, +/*x*/ LETTER, LETTER, LETTER, ETC, BINOP, ETC, ETC, ETC +}; + +/* + * an array of characters which + * perform the case translation function + */ +char ccase[128] = { +/*NUL*/ '\000', '\001', '\002', '\003', '\004', '\005', '\006', '\007', +/*BS*/ '\010', '\011', '\012', '\013', '\014', '\015', '\016', '\017', +/*DLE*/ '\020', '\021', '\022', '\023', '\024', '\025', '\026', '\027', +/*CAN*/ '\030', '\031', '\032', '\033', '\034', '\035', '\036', '\037', +/*SPC*/ '\040', '\041', '\042', '\043', '\044', '\045', '\046', '\047', +/*(*/ '\050', '\051', '\052', '\053', '\054', '\055', '\056', '\057', +/*0*/ '\060', '\061', '\062', '\063', '\064', '\065', '\066', '\067', +/*8*/ '\070', '\071', '\072', '\073', '\074', '\075', '\076', '\077', +/*@*/ '\100', '\141', '\142', '\143', '\144', '\145', '\146', '\147', +/*H*/ '\150', '\151', '\152', '\153', '\154', '\155', '\156', '\157', +/*P*/ '\160', '\161', '\162', '\163', '\164', '\165', '\166', '\167', +/*X*/ '\170', '\171', '\172', '\133', '\134', '\135', '\136', '\137', +/*`*/ '\140', '\141', '\142', '\143', '\144', '\145', '\146', '\147', +/*h*/ '\150', '\151', '\152', '\153', '\154', '\155', '\156', '\157', +/*p*/ '\160', '\161', '\162', '\163', '\164', '\165', '\166', '\167', +/*x*/ '\170', '\171', '\172', '\173', '\174', '\175', '\176', '\177' +}; diff --git a/as/hc08/asexpr.c b/as/hc08/asexpr.c new file mode 100644 index 0000000..348f4fc --- /dev/null +++ b/as/hc08/asexpr.c @@ -0,0 +1,710 @@ +/* asexpr.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include +#include "asm.h" + +/*)Module asexpr.c + * + * The module asexpr.c contains the routines to evaluate + * arithmetic/numerical expressions. The functions in + * asexpr.c perform a recursive evaluation of the arithmetic + * expression read from the assembler-source text line. + * The expression may include binary/unary operators, brackets, + * symbols, labels, and constants in hexadecimal, decimal, octal + * and binary. Arithmetic operations are prioritized and + * evaluated by normal arithmetic conventions. + * + * asexpr.c contains the following functions: + * VOID abscheck() + * Addr_T absexpr() + * VOID clrexpr() + * int digit() + * VOID expr() + * int oprio() + * VOID term() + * + * asexpr.c contains no local/static variables + */ + +/*)Function VOID expr(esp, n) + * + * expr * esp pointer to an expr structure + * int n a firewall priority; all top + * level calls (from the user) + * should be made with n set to 0. + * + * The function expr() evaluates an expression and + * stores its value and relocation information into + * the expr structure supplied by the user. + * + * local variables: + * int c current assembler-source + * text character + * int p current operator priority + * area * ap pointer to an area structure + * exp re internal expr structure + * + * global variables: + * char ctype[] array of character types, one per + * ASCII character + * + * functions called: + * VOID abscheck() asexpr.c + * VOID clrexpr() asexpr.c + * VOID expr() asexpr.c + * int getnb() aslex.c + * int oprio() asexpr.c + * VOID qerr() assubr.c + * VOID rerr() assubr.c + * VOID term() asexpr.c + * VOID unget() aslex.c + * + * + * side effects: + * An expression is evaluated modifying the user supplied + * expr structure, a sym structure maybe created for an + * undefined symbol, and the parse of the expression may + * terminate if a 'q' error occurs. + */ + +VOID +expr(register struct expr *esp, int n) +{ + register int c, p; + struct area *ap; + struct expr re; + + term(esp); + while (ctype[c = getnb()] & BINOP) { + /* + * Handle binary operators + - * / & | % ^ << >> + */ + if ((p = oprio(c)) <= n) + break; + if ((c == '>' || c == '<') && c != get()) + qerr(); + clrexpr(&re); + expr(&re, p); + esp->e_rlcf |= re.e_rlcf; + if (c == '+') { + /* + * esp + re, at least one must be absolute + */ + if (esp->e_base.e_ap == NULL) { + /* + * esp is absolute (constant), + * use area from re + */ + esp->e_base.e_ap = re.e_base.e_ap; + } else + if (re.e_base.e_ap) { + /* + * re should be absolute (constant) + */ + rerr(); + } + if (esp->e_flag && re.e_flag) + rerr(); + if (re.e_flag) + esp->e_flag = 1; + esp->e_addr += re.e_addr; + } else + if (c == '-') { + /* + * esp - re + */ + if ((ap = re.e_base.e_ap) != NULL) { + if (esp->e_base.e_ap == ap) { + esp->e_base.e_ap = NULL; + } else { + rerr(); + } + } + if (re.e_flag) + rerr(); + esp->e_addr -= re.e_addr; + } else { + /* + * Both operands (esp and re) must be constants + */ + /* SD :- moved the abscheck to each case + case and change the right shift operator.. if + right shift by 8 bits of a relocatable address then + the user wants the higher order byte. set the R_MSB + for the expression */ + switch (c) { + + case '*': + abscheck(esp); + abscheck(&re); + esp->e_addr *= re.e_addr; + break; + + case '/': + abscheck(esp); + abscheck(&re); + esp->e_addr /= re.e_addr; + break; + + case '&': + abscheck(esp); + abscheck(&re); + esp->e_addr &= re.e_addr; + break; + + case '|': + abscheck(esp); + abscheck(&re); + esp->e_addr |= re.e_addr; + break; + + case '%': + abscheck(esp); + abscheck(&re); + esp->e_addr %= re.e_addr; + break; + + case '^': + abscheck(esp); + abscheck(&re); + esp->e_addr ^= re.e_addr; + break; + + case '<': + abscheck(esp); + abscheck(&re); + esp->e_addr <<= re.e_addr; + break; + + case '>': + /* SD change here */ + abscheck(&re); + /* if the left is a relative address & + the right side is == 8 then */ + if (esp->e_base.e_ap && re.e_addr == 8) { + esp->e_rlcf |= R_MSB ; + break; + } + else if (esp->e_base.e_ap && re.e_addr == 16) + { + if (flat24Mode) + { + esp->e_rlcf |= R_HIB; + } + else + { + warnBanner(); + fprintf(stderr, + "(expr >> 16) is only meaningful in " + ".flat24 mode.\n"); + qerr(); + } + + break; + } + /* else continue with the normal processing */ + abscheck(esp); + esp->e_addr >>= re.e_addr; + break; + + default: + qerr(); + break; + } + } + } + unget(c); +} + +/*)Function Addr_T absexpr() + * + * The function absexpr() evaluates an expression, verifies it + * is absolute (i.e. not position dependent or relocatable), and + * returns its value. + * + * local variables: + * expr e expr structure + * + * global variables: + * none + * + * functions called: + * VOID abscheck() asexpr.c + * VOID clrexpr() asexpr.c + * VOID expr() asexpr.c + * + * side effects: + * If the expression is not absolute then + * a 'r' error is reported. + */ + +Addr_T +absexpr(void) +{ + struct expr e; + + clrexpr(&e); + expr(&e, 0); + abscheck(&e); + return (e.e_addr); +} + +/*)Function VOID term(esp) + * + * expr * esp pointer to an expr structure + * + * The function term() evaluates a single constant + * or symbol value prefaced by any unary operator + * ( +, -, ~, ', ", >, or < ). This routine is also + * responsible for setting the relocation type to symbol + * based (e.flag != 0) on global references. + * + * local variables: + * int c current character + * char id[] symbol name + * char * jp pointer to assembler-source text + * int n constant evaluation running sum + * int r current evaluation radix + * sym * sp pointer to a sym structure + * tsym * tp pointer to a tsym structure + * int v current digit evaluation + * + * global variables: + * char ctype[] array of character types, one per + * ASCII character + * sym * symp pointer to a symbol structure + * + * functions called: + * VOID abscheck() asexpr.c + * int digit() asexpr.c + * VOID err() assubr.c + * VOID expr() asexpr.c + * int is_abs() asexpr.c + * int get() aslex.c + * VOID getid() aslex.c + * int getmap() aslex.c + * int getnb() aslex.c + * sym * lookup() assym.c + * VOID qerr() assubr.c + * VOID unget() aslex.c + * + * side effects: + * An arithmetic term is evaluated, a symbol structure + * may be created, term evaluation may be terminated + * by a 'q' error. + */ + +VOID +term(register struct expr *esp) +{ + register int c, n; + register const char *jp; + char id[NCPS]; + struct sym *sp; + struct tsym *tp; + int r=0, v; + + c = getnb(); + /* + * Discard the unary '+' at this point and + * also any reference to numerical arguments + * associated with the '#' prefix. + */ + while (c == '+' || c == '#') { c = getnb(); } + /* + * Evaluate all binary operators + * by recursively calling expr(). + */ + if (c == LFTERM) { + expr(esp, 0); + if (getnb() != RTTERM) + qerr(); + return; + } + if (c == '-') { + expr(esp, 100); + abscheck(esp); + esp->e_addr = 0-esp->e_addr; + return; + } + if (c == '~') { + expr(esp, 100); + abscheck(esp); + esp->e_addr = ~esp->e_addr; + return; + } + if (c == '\'') { + esp->e_mode = S_USER; + esp->e_addr = getmap(-1)&0377; + return; + } + if (c == '\"') { + esp->e_mode = S_USER; + if (hilo) { + esp->e_addr = (getmap(-1)&0377)<<8; + esp->e_addr |= (getmap(-1)&0377); + } else { + esp->e_addr = (getmap(-1)&0377); + esp->e_addr |= (getmap(-1)&0377)<<8; + } + return; + } + if (c == '>' || c == '<') { + expr(esp, 100); + if (is_abs (esp)) { + /* + * evaluate msb/lsb directly + */ + if (c == '>') + esp->e_addr >>= 8; + esp->e_addr &= 0377; + return; + } else { + /* + * let linker perform msb/lsb, lsb is default + */ + esp->e_rlcf |= R_BYT2; + if (c == '>') + esp->e_rlcf |= R_MSB; + return; + } + } + /* + * Evaluate digit sequences as local symbols + * if followed by a '$' or as constants. + */ + if (ctype[c] & DIGIT) { + esp->e_mode = S_USER; + jp = ip; + while (ctype[(int)*jp] & RAD10) { + jp++; + } + if (*jp == '$') { + n = 0; + while ((v = digit(c, 10)) >= 0) { + n = 10*n + v; + c = get(); + } + tp = symp->s_tsym; + while (tp) { + if (n == tp->t_num) { + esp->e_base.e_ap = tp->t_area; + esp->e_addr = tp->t_addr; + return; + } + tp = tp->t_lnk; + } + err('u'); + return; + } + r = radix; + if (c == '0') { + c = get(); + switch (c) { + case 'b': + case 'B': + r = 2; + c = get(); + break; + case 'o': + case 'O': + case 'q': + case 'Q': + r = 8; + c = get(); + break; + case 'd': + case 'D': + r = 10; + c = get(); + break; + case 'h': + case 'H': + case 'x': + case 'X': + r = 16; + c = get(); + break; + default: + break; + } + } + n = 0; + while ((v = digit(c, r)) >= 0) { + n = r*n + v; + c = get(); + } + unget(c); + esp->e_addr = n; + return; + } + /* + * Evaluate '$' sequences as a temporary radix + * if followed by a '%', '&', '#', or '$'. + */ + if (c == '$') { + c = get(); + if (c == '%' || c == '&' || c == '#' || c == '$') { + switch (c) { + case '%': + r = 2; + break; + case '&': + r = 8; + break; + case '#': + r = 10; + break; + case '$': + r = 16; + break; + default: + break; + } + c = get(); + n = 0; + while ((v = digit(c, r)) >= 0) { + n = r*n + v; + c = get(); + } + unget(c); + esp->e_mode = S_USER; + esp->e_addr = n; + return; + } + unget(c); + c = '$'; + } + /* + * Evaluate symbols and labels + */ + if (ctype[c] & LETTER) { + esp->e_mode = S_USER; + getid(id, c); + sp = lookup(id); + if (sp->s_type == S_NEW) { + esp->e_addr = 0; + if (sp->s_flag&S_GBL) { + esp->e_flag = 1; + esp->e_base.e_sp = sp; + return; + } + /* err('u'); */ + } else { + esp->e_mode = sp->s_type; + esp->e_addr = sp->s_addr; + esp->e_base.e_ap = sp->s_area; + } + return; + } + /* + * Else not a term. + */ + qerr(); +} + +/*)Function int digit(c, r) + * + * int c digit character + * int r current radix + * + * The function digit() returns the value of c + * in the current radix r. If the c value is not + * a number of the current radix then a -1 is returned. + * + * local variables: + * none + * + * global variables: + * char ctype[] array of character types, one per + * ASCII character + * + * functions called: + * none + * + * side effects: + * none + */ + +int +digit(register int c, register int r) +{ + if (r == 16) { + if (ctype[c] & RAD16) { + if (c >= 'A' && c <= 'F') + return (c - 'A' + 10); + if (c >= 'a' && c <= 'f') + return (c - 'a' + 10); + return (c - '0'); + } + } else + if (r == 10) { + if (ctype[c] & RAD10) + return (c - '0'); + } else + if (r == 8) { + if (ctype[c] & RAD8) + return (c - '0'); + } else + if (r == 2) { + if (ctype[c] & RAD2) + return (c - '0'); + } + return (-1); +} + +/*)Function VOID abscheck(esp) + * + * expr * esp pointer to an expr structure + * + * The function abscheck() tests the evaluation of an + * expression to verify it is absolute. If the evaluation + * is relocatable then an 'r' error is noted and the expression + * made absolute. + * + * Note: The area type (i.e. ABS) is not checked because + * the linker can be told to explicitly relocate an + * absolute area. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * VOID rerr() assubr.c + * + * side effects: + * The expression may be changed to absolute and the + * 'r' error invoked. + */ + +VOID +abscheck(register struct expr *esp) +{ + if (esp->e_flag || esp->e_base.e_ap) { + esp->e_flag = 0; + esp->e_base.e_ap = NULL; + rerr(); + } +} + +/*)Function int is_abs(esp) + * + * expr * esp pointer to an expr structure + * + * The function is_abs() tests the evaluation of an + * expression to verify it is absolute. If the evaluation + * is absolute then 1 is returned, else 0 is returned. + * + * Note: The area type (i.e. ABS) is not checked because + * the linker can be told to explicitly relocate an + * absolute area. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ + +int +is_abs (register struct expr *esp) +{ + if (esp->e_flag || esp->e_base.e_ap) { + return(0); + } + return(1); +} + +/*)Function int oprio(c) + * + * int c operator character + * + * The function oprio() returns a relative priority + * for all valid unary and binary operators. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ + +int +oprio(register int c) +{ + if (c == '*' || c == '/' || c == '%') + return (10); + if (c == '+' || c == '-') + return (7); + if (c == '<' || c == '>') + return (5); + if (c == '^') + return (4); + if (c == '&') + return (3); + if (c == '|') + return (1); + return (0); +} + +/*)Function VOID clrexpr(esp) + * + * expr * esp pointer to expression structure + * + * The function clrexpr() clears the expression structure. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * expression structure cleared. + */ + +VOID +clrexpr(register struct expr *esp) +{ + esp->e_mode = 0; + esp->e_flag = 0; + esp->e_addr = 0; + esp->e_base.e_ap = NULL; + esp->e_rlcf = 0; +} diff --git a/as/hc08/aslist.c b/as/hc08/aslist.c new file mode 100644 index 0000000..af165f1 --- /dev/null +++ b/as/hc08/aslist.c @@ -0,0 +1,748 @@ +/* aslist.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 28-Oct-97 JLH: + * - lstsym: show s_id as string rather than array [NCPS] + */ + +#include +#include +#include +#include +#include "asm.h" + +/*)Module aslist.c + * + * The module aslist.c contains all the functions used + * to generate the assembler list and symbol output files. + * + * aslist.c contains the following functions: + * VOID list() + * VOID list1() + * VOID list2() + * VOID slew() + * VOID lstsym() + * + * The module aslist.c contains no local/static variables + */ + +/*)Function VOID list() + * + * The function list() generates the listing output + * which includes the input source, line numbers, + * and generated code. Numerical output may be selected + * as hexadecimal, decimal, or octal. + * + * local variables: + * int * wp pointer to the assembled data bytes + * int * wpt pointer to the data byte mode + * int nb computed number of assembled bytes + * + * global variables: + * int cb[] array of assembler output values + * int cbt[] array of assembler relocation types + * describing the data in cb[] + * int * cp pointer to assembler output array cb[] + * int * cpt pointer to assembler relocation type + * output array cbt[] + * char eb[] array of generated error codes + * char * ep pointer into error list + * array eb[] + * char ib[] assembler-source text line + * FILE * lfp list output file handle + * int line current assembler source line number + * int lmode listing mode + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * VOID list1() aslist.c + * int putc() c_library + * VOID slew() asslist.c + * + * side effects: + * Listing or symbol output updated. + */ + +VOID +list() +{ + register char *wp; + register int *wpt; + register int nb; + + if (lfp == NULL || lmode == NLIST) + return; + + /* + * Get Correct Line Number + */ + if (incfil >= 0) { + line = incline[incfil]; + if (line == 0) { + if (incfil > 0) { + line = incline[incfil-1]; + } else { + line = srcline[cfile]; + } + } + } else { + line = srcline[cfile]; + } + + /* + * Move to next line. + */ + slew(lfp, pflag); + + /* + * Output a maximum of NERR error codes with listing. + */ + while (ep < &eb[NERR]) + *ep++ = ' '; + fprintf(lfp, "%.2s", eb); + + /* + * Source listing only option. + */ + if (lmode == SLIST) { + fprintf(lfp, "%24s%5u %s\n", "", line, ib); + return; + } + if (lmode == ALIST) { + outchk(HUGE,HUGE); + } + + /* + * HEX output Option. + */ + if (xflag == 0) { /* HEX */ + /* + * Equate only + */ + if (lmode == ELIST) { + fprintf(lfp, "%18s%04X", "", laddr); + fprintf(lfp, " %5u %s\n", line, ib); + return; + } + + /* + * Address (with allocation) + */ + fprintf(lfp, " %04X", laddr); + if (lmode == ALIST || lmode == BLIST) { + fprintf(lfp, "%19s%5u %s\n", "", line, ib); + outdot(); + return; + } + wp = cb; + wpt = cbt; + nb = (int) (cp - cb); + + /* + * First line of output for this source line with data. + */ + list1(wp, wpt, nb, 1); + fprintf(lfp, " %5u %s\n", line, ib); + + /* + * Subsequent lines of output if more data. + */ + while ((nb -= 6) > 0) { + wp += 6; + wpt += 6; + slew(lfp, 0); + fprintf(lfp, "%7s", ""); + list1(wp, wpt, nb, 0); + putc('\n', lfp); + } + } else + /* + * OCTAL output Option. + */ + if (xflag == 1) { /* OCTAL */ + /* + * Equate only + */ + if (lmode == ELIST) { + fprintf(lfp, "%16s%06o", "", laddr); + fprintf(lfp, " %5u %s\n", line, ib); + return; + } + + /* + * Address (with allocation) + */ + fprintf(lfp, " %06o", laddr); + if (lmode == ALIST || lmode == BLIST) { + fprintf(lfp, "%17s%5u %s\n", "", line, ib); + outdot(); + return; + } + wp = cb; + wpt = cbt; + nb = (int) (cp - cb); + + /* + * First line of output for this source line with data. + */ + list1(wp, wpt, nb, 1); + fprintf(lfp, " %5u %s\n", line, ib); + + /* + * Subsequent lines of output if more data. + */ + while ((nb -= 4) > 0) { + wp += 4; + wpt += 4; + slew(lfp, 0); + fprintf(lfp, "%9s", ""); + list1(wp, wpt, nb, 0); + putc('\n', lfp); + } + } else + /* + * DECIMAL output Option. + */ + if (xflag == 2) { /* DECIMAL */ + /* + * Equate only + */ + if (lmode == ELIST) { + fprintf(lfp, "%16s%05u", "", laddr); + fprintf(lfp, " %5u %s\n", line, ib); + return; + } + + /* + * Address (with allocation) + */ + fprintf(lfp, " %05u", laddr); + if (lmode == ALIST || lmode == BLIST) { + fprintf(lfp, "%17s%5u %s\n", "", line, ib); + outdot(); + return; + } + wp = cb; + wpt = cbt; + nb = (int) (cp - cb); + + /* + * First line of output for this source line with data. + */ + list1(wp, wpt, nb, 1); + fprintf(lfp, " %5u %s\n", line, ib); + + /* + * Subsequent lines of output if more data. + */ + while ((nb -= 4) > 0) { + wp += 4; + wpt += 4; + slew(lfp, 0); + fprintf(lfp, "%9s", ""); + list1(wp, wpt, nb, 0); + putc('\n', lfp); + } + } +} + +/*)Function VOID list1(wp, wpt, nw, f) + * + * int f fill blank fields (1) + * int nb number of data bytes + * int * wp pointer to data bytes + * int * wpt pointer to data byte mode + * + * local variables: + * int i loop counter + * + * global variables: + * int xflag -x, listing radix flag + * + * functions called: + * VOID list2() asslist.c + * int fprintf() c_library + * + * side effects: + * Data formatted and output to listing. + */ + +VOID +list1(wp, wpt, nb, f) +register char *wp; +register int *wpt, nb, f; +{ + register int i; + + /* + * HEX output Option. + */ + if (xflag == 0) { /* HEX */ + /* + * Bound number of words to HEX maximum per line. + */ + if (nb > 6) + nb = 6; + + /* + * Output bytes. + */ + for (i=0; i 4) + nb = 4; + + /* + * Output bytes. + */ + for (i=0; i 4) + nb = 4; + + /* + * Output bytes. + */ + for (i=0; i= 2) { + if (t & R_RELOC) { + if (t & (R_PAG0|R_PAG)) { + c = '*'; + } else if (t & R_USGN) { + c = 'u'; + } else if (t & R_PCR) { + c = 'p'; + } else { + c = 'r'; + } + if (t & R_HIGH) c += 1; + } + } + + /* + * Output the selected mode. + */ + putc(c, lfp); +} + +/*)Function VOID slew(fp, flag) + * + * FILE * fp file handle for listing + * int flag enable pagination + * + * The function slew() increments the page line count. + * If the page overflows and pagination is enabled: + * 1) put out a page skip, + * 2) a title, + * 3) a subtitle, + * 4) and reset the line count. + * + * local variables: + * none + * + * global variables: + * char cpu[] cpu type string + * int lop current line number on page + * int page current page number + * char stb[] Subtitle string buffer + * char tb[] Title string buffer + * + * functions called: + * int fprintf() c_library + * + * side effects: + * Increments page line counter, on overflow + * a new page header is output to the listing file. + */ + +VOID +slew(fp,flag) +FILE *fp; +int flag; +{ + if ((lop++ >= NLPP) && flag) { + fprintf(fp, "\fASxxxx Assembler %s (%s), page %u.\n", + VERSION, cpu, ++page); + fprintf(fp, "%s\n", tb); + fprintf(fp, "%s\n\n", stb); + lop = 5; + } +} + +/* Used for qsort call in lstsym */ +static int _cmpSym(const void *p1, const void *p2) +{ + struct sym **s1 = (struct sym **)(p1); + struct sym **s2 = (struct sym **)(p2); + return strcmp((*s1)->s_id,(*s2)->s_id); +} + +/*)Function VOID lstsym(fp) + * + * FILE * fp file handle for output + * + * The function lstsym() outputs alphabetically + * sorted symbol and area tables. + * + * local variables: + * int c temporary + * int i loop counter + * int j temporary + * int k temporary + * char * ptr pointer to an id string + * int nmsym number of symbols + * int narea number of areas + * sym * sp pointer to symbol structure + * sym ** p pointer to an array of + * pointers to symbol structures + * area * ap pointer to an area structure + * + * global variables: + * area * areap pointer to an area structure + * char aretbl[] string "Area Table" + * sym dot defined as sym[0] + * char stb[] Subtitle string buffer + * sym * symhash[] array of pointers to NHASH + * linked symbol lists + * char symtbl[] string "Symbol Table" + * FILE * tfp symbol table output file handle + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * int putc() c_library + * VOID slew() aslist.c + * int strcmp() c_library + * char * strcpy() c_library + * + * side effects: + * Symbol and area tables output. + */ + +VOID +lstsym(fp) +FILE *fp; +{ + register int c, i, j, k; + register char *ptr; + int nmsym, narea; + struct sym *sp; + struct sym **p; + struct area *ap; + + /* + * Symbol Table Header + */ + strcpy(stb, &symtbl[0]); + lop = NLPP; + if (fp == tfp) + page = 0; + slew(fp, 1); + + /* + * Find number of symbols + */ + nmsym = 0; + for (i=0; is_sp; + } + } + if (nmsym == 0) + goto atable; + + /* + * Allocate space for an array of pointers to symbols + * and load array. + */ + if ((p = (struct sym **) malloc(sizeof((struct sym *) sp)*nmsym)) + == NULL) { + fprintf(fp, "Insufficient space to build Symbol Table.\n"); + return; + } + nmsym = 0; + for (i=0; is_sp; + } + } + +#if 0 + /* BUBBLE SORT?? WTF??? */ + /* + * Bubble Sort on Symbol Table Array + */ + j = 1; + c = nmsym - 1; + while (j) { + j = 0; + for (i=0; is_id[0],&p[i+1]->s_id[0]) > 0) { + j = 1; + sp = p[i+1]; + p[i+1] = p[i]; + p[i] = sp; + } + } + } +#else + + qsort(p, nmsym, sizeof(struct sym *), _cmpSym); +#endif + + /* + * Symbol Table Output + */ + for (i=0; is_area) { + j = sp->s_area->a_ref; + if (xflag == 0) { + fprintf(fp, " %2X ", j); + } else + if (xflag == 1) { + fprintf(fp, "%3o ", j); + } else + if (xflag == 2) { + fprintf(fp, "%3u ", j); + } + } else { + fprintf(fp, " "); + } + ptr = &sp->s_id[0]; + fprintf(fp, "%-60s", ptr ); /* JLH */ + + if (sp->s_flag & S_ASG) { + putc('=', fp); + } else { + putc(' ', fp); + } + if (sp->s_type == S_NEW) { + if (xflag == 0) { + fprintf(fp, " **** "); + } else + if (xflag == 1) { + fprintf(fp, "****** "); + } else + if (xflag == 2) { + fprintf(fp, " ***** "); + } + } else { + j = sp->s_addr; + if (xflag == 0) { + fprintf(fp, " %04X ", j); + } else + if (xflag == 1) { + fprintf(fp, "%06o ", j); + } else + if (xflag == 2) { + fprintf(fp, " %05u ", j); + } + } + j = 0; + if (sp->s_flag & S_GBL) { + putc('G', fp); + ++j; + } + if (sp->s_area != NULL) { + putc('R', fp); + ++j; + } + if (sp->s_type == S_NEW) { + putc('X', fp); + ++j; + } +#if NCPS-8 + putc('\n', fp); + slew(fp, 0); + ++i; +#else + if (++i % 3 == 0) { + putc('\n', fp); + slew(fp, pflag); + } else + if (i < nmsym) { + while (j++ < 4) + putc(' ', fp); + fprintf(fp, "| "); + } +#endif + } + putc('\n', fp); + + /* + * Area Table Header + */ + +atable: + strcpy(stb, &aretbl[0]); + lop = NLPP; + slew(fp, 1); + + /* + * Area Table Output + */ + narea = 0; + ap = areap; + while (ap) { + ++narea; + ap = ap->a_ap; + } + for (i=0; ia_ap; + j = ap->a_ref; + if (xflag == 0) { + fprintf(fp, " %2X ", j); + } else + if (xflag == 1) { + fprintf(fp, " %3o ", j); + } else + if (xflag == 2) { + fprintf(fp, " %3u ", j); + } + ptr = &ap->a_id[0]; + while (ptr < &ap->a_id[NCPS]) { + if ((c = *ptr++) != 0) { + putc(c, fp); + } else { + putc(' ', fp); + } + } + j = ap->a_size; + k = ap->a_flag; + if (xflag==0) { + fprintf(fp, " size %4X flags %X\n", j, k); + } else + if (xflag==1) { + fprintf(fp, " size %6o flags %o\n", j, k); + } else + if (xflag==2) { + fprintf(fp, " size %5u flags %u\n", j, k); + } + } +} diff --git a/as/hc08/asm.h b/as/hc08/asm.h new file mode 100644 index 0000000..9b293ea --- /dev/null +++ b/as/hc08/asm.h @@ -0,0 +1,713 @@ +/* asm.h + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 28-Oct-97 JLH: + * - add proto for StoreString + * - change s_id from [NCPS] to pointer + * - change m_id from [NCPS] to pointer + * - change NCPS to 80 + * - case sensitive + * - add R_J11 for 8051 assembler + * - add outr11 prototype for 8051 assembler + * - always define "ccase" + * 2-Nov-97 JLH: + * - add jflag for debug control + * - prototypes for DefineNoICE_Line + * 30-Jan-98 JLH: + * - add memory space flags to a_flag for 8051 + * + * 3-Feb-00 KV: + * - add DS80C390 flat mode support. + */ + +#define VERSION "V01.70 + NoICE + SDCC mods + Flat24 Feb-1999" + +#if !defined(__BORLANDC__) && !defined(_MSC_VER) +#include +#endif + +/* + * Case Sensitivity Flag + */ +#define CASE_SENSITIVE 1 + +/*)Module asm.h + * + * The module asm.h contains the definitions for constants, + * structures, global variables, and ASxxxx functions + * contained in the ASxxxx.c files. The two functions + * and three global variables from the machine dependent + * files are also defined. + */ + +/* + * compiler/operating system specific definitions + */ + +/* DECUS C void definition */ +/* File/extension seperator */ + +#ifdef decus +#define VOID char +#define FSEPX '.' +#endif + +/* PDOS C void definition */ +/* File/extension seperator */ + +#ifdef PDOS +#define VOID char +#define FSEPX ':' +#endif + +/* Default void definition */ +/* File/extension seperator */ + +#ifndef VOID +#define VOID void +#define FSEPX '.' +#define OTHERSYSTEM +#endif + +/* + * PATH_MAX + */ +#include +#ifndef PATH_MAX /* POSIX, but not required */ +#if defined(_MSC_VER) || defined(__BORLANDC__) /* Microsoft C or Borland C*/ +#include +#define PATH_MAX _MAX_PATH +#else +#define PATH_MAX /* define a reasonable value */ +#endif +#endif + +#ifdef _WIN32 /* WIN32 native */ + +# define NATIVE_WIN32 1 +# ifdef __MINGW32__ /* GCC MINGW32 depends on configure */ +# include "../../sdccconf.h" +# else +# include "../../sdcc_vc.h" +# define PATH_MAX _MAX_PATH +# endif + +#else /* Assume Un*x style system */ +# include "../../sdccconf.h" +#endif + +/* + * Assembler definitions. + */ +#define LFTERM '(' /* Left expression delimeter */ +#define RTTERM ')' /* Right expression delimeter */ + +#define NCPS 80 /* Chars. per symbol (JLH: change from 8) */ +#define HUGE 1000 /* A huge number */ +#define NERR 3 /* Errors per line */ +#define NINPUT 1024 /* Input buffer size (icodes need space) */ +#define NCODE 128 /* Listing code buffer size */ +#define NTITL 64 /* Title buffer size */ +#define NSBTL 64 /* SubTitle buffer size */ +#define NHASH 64 /* Buckets in hash table */ +#define HMASK 077 /* Hash mask */ +#define NLPP 60 /* Lines per page */ +#define MAXFIL 6 /* Maximum command line input files */ +#define MAXINC 6 /* Maximum nesting of include files */ +#define MAXIF 10 /* Maximum nesting of if/else/endif */ + +#define NLIST 0 /* No listing */ +#define SLIST 1 /* Source only */ +#define ALIST 2 /* Address only */ +#define BLIST 3 /* Address only with allocation */ +#define CLIST 4 /* Code */ +#define ELIST 5 /* Equate only */ + +#define dot sym[0] /* Dot, current loc */ +#define dca area[0] /* Dca, default code area */ + + +/* NB: for Flat24 extentions to work, Addr_T must be at least 24 + * bits. This is checked at runtime when the .flat24 directive + * is processed. + */ +typedef unsigned int Addr_T; + +/* + * The area structure contains the parameter values for a + * specific program or data section. The area structure + * is a linked list of areas. The initial default area + * is "_CODE" defined in asdata.c, the next area structure + * will be linked to this structure through the structure + * element 'struct area *a_ap'. The structure contains the + * area name, area reference number ("_CODE" is 0) determined + * by the order of .area directives, area size determined + * from the total code and/or data in an area, area fuzz is + * a variable used to track pass to pass changes in the + * area size caused by variable length instruction formats, + * and area flags which specify the area's relocation type. + */ +struct area +{ + struct area *a_ap; /* Area link */ + char a_id[NCPS]; /* Area Name */ + int a_ref; /* Ref. number */ + Addr_T a_addr; /* Area address */ + Addr_T a_size; /* Area size */ + Addr_T a_fuzz; /* Area fuzz */ + int a_flag; /* Area flags */ +}; + +/* + * The "A_" area constants define values used in + * generating the assembler area output data. + * + * Area flags + * + * 7 6 5 4 3 2 1 0 + * +-----+-----+-----+-----+-----+-----+-----+-----+ + * | BIT |XDATA|DATA | PAG | ABS | OVR | | | + * +-----+-----+-----+-----+-----+-----+-----+-----+ + */ + +#define A_CON 0000 /* Concatenating */ +#define A_OVR 0004 /* Overlaying */ +#define A_REL 0000 /* Relocatable */ +#define A_ABS 0010 /* absolute */ +#define A_NOPAG 0000 /* Non-Paged */ +#define A_PAG 0020 /* Paged */ + +/* Additional flags for 8051 address spaces */ +#define A_DATA 0000 /* data space (default)*/ +#define A_CODE 0040 /* code space */ +#define A_XDATA 0100 /* external data space */ +#define A_BIT 0200 /* bit addressable space */ + +#define A_NOLOAD 0400 /* nonloadable */ +#define A_LOAD 0000 /* loadable (default) */ + +/* + * The "R_" relocation constants define values used in + * generating the assembler relocation output data for + * areas, symbols, and code. + * + * Relocation flags + * + * 7 6 5 4 3 2 1 0 + * +-----+-----+-----+-----+-----+-----+-----+-----+ + * | MSB | PAGn| PAG0| USGN| BYT2| PCR | SYM | BYT | + * +-----+-----+-----+-----+-----+-----+-----+-----+ + */ + +#define R_WORD 0x00 /* 16 bit */ +#define R_BYTE 0x01 /* 8 bit */ + +#define R_AREA 0x00 /* Base type */ +#define R_SYM 0x02 + +#define R_NORM 0x00 /* PC adjust */ +#define R_PCR 0x04 + +#define R_BYT1 0x00 /* Byte count for R_BYTE = 1 */ +#define R_BYT2 0x08 /* Byte count for R_BYTE = 2 */ + +#define R_SGND 0x00 /* Signed Byte */ +#define R_USGN 0x10 /* Unsigned Byte */ + +#define R_NOPAG 0x00 /* Page Mode */ +#define R_PAG0 0x20 /* Page '0' */ +#define R_PAG 0x40 /* Page 'nnn' */ + +#define R_LSB 0x00 /* low byte */ +#define R_MSB 0x80 /* high byte */ + +#define R_BYT3 0x100 /* if R_BYTE is set, this is a + * 3 byte address, of which + * the linker must select one byte. + */ +#define R_HIB 0x200 /* If R_BYTE & R_BYT3 are set, linker + * will select byte 3 of the relocated + * 24 bit address. + */ + +#define R_J11 (R_WORD|R_BYT2) /* JLH: 11 bit JMP and CALL (8051) */ +#define R_J19 (R_WORD|R_BYT2|R_MSB) /* 19 bit JMP/CALL (DS80C390) */ +#define R_C24 (R_WORD|R_BYT1|R_MSB) /* 24 bit address (DS80C390) */ +#define R_J19_MASK (R_BYTE|R_BYT2|R_MSB) + +#define IS_R_J19(x) (((x) & R_J19_MASK) == R_J19) +#define IS_R_J11(x) (((x) & R_J19_MASK) == R_J11) +#define IS_C24(x) (((x) & R_J19_MASK) == R_C24) + +#define R_ESCAPE_MASK 0xf0 /* Used to escape relocation modes + * greater than 0xff in the .rel + * file. + */ + +/* + * Listing Control Flags + */ + +#define R_HIGH 0040000 /* High Byte */ +#define R_RELOC 0100000 /* Relocation */ + +#define R_DEF 00 /* Global def. */ +#define R_REF 01 /* Global ref. */ +#define R_REL 00 /* Relocatable */ +#define R_ABS 02 /* Absolute */ +#define R_GBL 00 /* Global */ +#define R_LCL 04 /* Local */ + +/* + * The mne structure is a linked list of the assembler + * mnemonics and directives. The list of mnemonics and + * directives contained in the device dependent file + * xxxpst.c are hashed and linked into NHASH lists in + * module assym.c by syminit(). The structure contains + * the mnemonic/directive name, a subtype which directs + * the evaluation of this mnemonic/directive, a flag which + * is used to detect the end of the mnemonic/directive + * list in xxxpst.c, and a value which is normally + * associated with the assembler mnemonic base instruction + * value. + */ +struct mne +{ + struct mne *m_mp; /* Hash link */ + char *m_id; /* Mnemonic JLH: change from [NCPS] */ + char m_type; /* Mnemonic subtype */ + char m_flag; /* Mnemonic flags */ + Addr_T m_valu; /* Value */ +}; + +/* + * The sym structure is a linked list of symbols defined + * in the assembler source files. The first symbol is "." + * defined in asdata.c. The entry 'struct tsym *s_tsym' + * links any temporary symbols following this symbol and + * preceeding the next normal symbol. The structure also + * contains the symbol's name, type (USER or NEW), flag + * (global, assigned, and multiply defined), a pointer + * to the area structure defining where the symbol is + * located, a reference number assigned by outgsd() in + * asout.c, and the symbols address relative to the base + * address of the area where the symbol is located. + */ +struct sym +{ + struct sym *s_sp; /* Hash link */ + struct tsym *s_tsym; /* Temporary symbol link */ + char *s_id; /* Symbol: JLH change from [NCPS] */ + char s_type; /* Symbol subtype */ + char s_flag; /* Symbol flags */ + struct area *s_area; /* Area line, 0 if absolute */ + int s_ref; /* Ref. number */ + Addr_T s_addr; /* Address */ + Addr_T s_org; /* Start Address if absolute */ +}; + +#define S_GBL 01 /* Global */ +#define S_ASG 02 /* Assigned */ +#define S_MDF 04 /* Mult. def */ +#define S_END 010 /* End mark for pst. */ + +#define S_NEW 0 /* New name */ +#define S_USER 1 /* User name */ + /* unused slot */ + /* unused slot */ + /* unused slot */ + +#define S_BYTE 5 /* .byte */ +#define S_WORD 6 /* .word */ +#define S_ASCII 7 /* .ascii */ +#define S_ASCIZ 8 /* .asciz */ +#define S_BLK 9 /* .blkb or .blkw */ +#define S_INCL 10 /* .include */ +#define S_DAREA 11 /* .area */ +#define S_ATYP 12 /* .area type */ +#define S_AREA 13 /* .area name */ +#define S_GLOBL 14 /* .globl */ +#define S_PAGE 15 /* .page */ +#define S_TITLE 16 /* .title */ +#define S_SBTL 17 /* .sbttl */ +#define S_IF 18 /* .if */ +#define S_ELSE 19 /* .else */ +#define S_ENDIF 20 /* .endif */ +#define S_EVEN 21 /* .even */ +#define S_ODD 22 /* .odd */ +#define S_RADIX 23 /* .radix */ +#define S_ORG 24 /* .org */ +#define S_MODUL 25 /* .module */ +#define S_ASCIS 26 /* .ascis */ +#define S_FLAT24 27 /* .flat24 */ +#define S_OPTSDCC 28 /* .optsdcc */ +#define S_ULEB128 29 /* .uleb128 */ +#define S_SLEB128 30 /* .sleb128 */ + +/* + * The tsym structure is a linked list of temporary + * symbols defined in the assembler source files following + * a normal symbol. The structure contains the temporary + * symbols number, a flag (multiply defined), a pointer to the + * area structure defining where the temporary structure + * is located, and the temporary symbol's address relative + * to the base address of the area where the symbol + * is located. + */ +struct tsym +{ + struct tsym *t_lnk; /* Link to next */ +/* sandeep changed to 'int' from 'char' */ +/* this will increase the number temp symbols + that can be defined from 255 to INT_MAX */ + int t_num; /* 0-INT_MAX$ */ + int t_flg; /* flags */ + + struct area *t_area; /* Area */ + Addr_T t_addr; /* Address */ +}; + +/* + * External Definitions for all Global Variables + */ + +extern int aserr; /* ASxxxx error counter + */ +extern jmp_buf jump_env; /* compiler dependent structure + * used by setjmp() and longjmp() + */ +extern int inpfil; /* count of assembler + * input files specified + */ +extern int incfil; /* current file handle index + * for include files + */ +extern int cfile; /* current file handle index + * of input assembly files + */ +extern int flevel; /* IF-ELSE-ENDIF flag will be non + * zero for false conditional case + */ +extern int tlevel; /* current conditional level + */ +extern int ifcnd[MAXIF+1]; /* array of IF statement condition + * values (0 = FALSE) indexed by tlevel + */ +extern int iflvl[MAXIF+1]; /* array of IF-ELSE-ENDIF flevel + * values indexed by tlevel + */ +extern char + afn[PATH_MAX]; /* afile() temporary filespec + */ +extern char + srcfn[MAXFIL][PATH_MAX]; /* array of source file names + */ +extern int + srcline[MAXFIL]; /* current source file line + */ +extern char + incfn[MAXINC][PATH_MAX]; /* array of include file names + */ +extern int + incline[MAXINC]; /* current include file line + */ +extern int radix; /* current number conversion radix: + * 2 (binary), 8 (octal), 10 (decimal), + * 16 (hexadecimal) + */ +extern int line; /* current assembler source + * line number + */ +extern int page; /* current page number + */ +extern int lop; /* current line number on page + */ +extern int pass; /* assembler pass number + */ +extern int org_cnt; /* .org directive counter + */ +extern int lflag; /* -l, generate listing flag + */ +extern int cflag; /* -c, generate sdcdb debug information + */ +extern int gflag; /* -g, make undefined symbols global flag + */ +extern int aflag; /* -a, make all symbols global flag + */ +extern int jflag; /* -j, generate debug information flag + */ +extern int oflag; /* -o, generate relocatable output flag + */ +extern int sflag; /* -s, generate symbol table flag + */ +extern int pflag; /* -p, enable listing pagination + */ +extern int xflag; /* -x, listing radix flag + */ +extern int fflag; /* -f(f), relocations flagged flag + */ +extern Addr_T laddr; /* address of current assembler line + * or value of .if argument + */ +extern Addr_T fuzz; /* tracks pass to pass changes in the + * address of symbols caused by + * variable length instruction formats + */ +extern int lmode; /* listing mode + */ +extern struct area area[]; /* array of 1 area + */ +extern struct area *areap; /* pointer to an area structure + */ +extern struct sym sym[]; /* array of 1 symbol + */ +extern struct sym *symp; /* pointer to a symbol structure + */ +extern struct sym *symhash[NHASH]; /* array of pointers to NHASH + * linked symbol lists + */ +extern struct mne *mnehash[NHASH]; /* array of pointers to NHASH + * linked mnemonic/directive lists + */ +extern char *ep; /* pointer into error list + * array eb[NERR] + */ +extern char eb[NERR]; /* array of generated error codes + */ +extern const char *ip; /* pointer into the assembler-source + * text line in ib[] + */ +extern const char *ib; /* assembler-source text line + */ +extern char *cp; /* pointer to assembler output + * array cb[] + */ +extern char cb[NCODE]; /* array of assembler output values + */ +extern int *cpt; /* pointer to assembler relocation type + * output array cbt[] + */ +extern int cbt[NCODE]; /* array of assembler relocation types + * describing the data in cb[] + */ +extern char tb[NTITL]; /* Title string buffer + */ +extern char stb[NSBTL]; /* Subtitle string buffer + */ +extern char optsdcc[NINPUT]; /* sdcc compile options + */ +extern int flat24Mode; /* non-zero if we are using DS390 24 bit + * flat mode (via .flat24 directive). + */ +extern char symtbl[]; /* string "Symbol Table" + */ +extern char aretbl[]; /* string "Area Table" + */ +extern char module[NCPS]; /* module name string + */ +extern FILE *lfp; /* list output file handle + */ +extern FILE *ofp; /* relocation output file handle + */ +extern FILE *tfp; /* symbol table output file handle + */ +extern FILE *sfp[MAXFIL]; /* array of assembler-source file handles + */ +extern FILE *ifp[MAXINC]; /* array of include-file file handles + */ +extern unsigned char ctype[128]; /* array of character types, one per + * ASCII character + */ + +extern char ccase[128]; /* an array of characters which + * perform the case translation function + */ +/* + * Definitions for Character Types + */ +#define SPACE 0000 +#define ETC 0000 +#define LETTER 0001 +#define DIGIT 0002 +#define BINOP 0004 +#define RAD2 0010 +#define RAD8 0020 +#define RAD10 0040 +#define RAD16 0100 +#define ILL 0200 + +#define DGT2 DIGIT|RAD16|RAD10|RAD8|RAD2 +#define DGT8 DIGIT|RAD16|RAD10|RAD8 +#define DGT10 DIGIT|RAD16|RAD10 +#define LTR16 LETTER|RAD16 + +/* + * The exp structure is used to return the evaluation + * of an expression. The structure supports three valid + * cases: + * (1) The expression evaluates to a constant, + * mode = S_USER, flag = 0, addr contains the + * constant, and base = NULL. + * (2) The expression evaluates to a defined symbol + * plus or minus a constant, mode = S_USER, + * flag = 0, addr contains the constant, and + * base = pointer to area symbol. + * (3) The expression evaluates to a external + * global symbol plus or minus a constant, + * mode = S_NEW, flag = 1, addr contains the + * constant, and base = pointer to symbol. + */ +struct expr +{ + char e_mode; /* Address mode */ + char e_flag; /* Symbol flag */ + Addr_T e_addr; /* Address */ + union { + struct area *e_ap; + struct sym *e_sp; + } e_base; /* Rel. base */ + int e_rlcf; /* Rel. flags */ +}; + +/* C Library functions */ +/* for reference only +extern VOID exit(); +extern int fclose(); +extern char * fgets(); +extern FILE * fopen(); +extern int fprintf(); +extern VOID longjmp(); +extern VOID * malloc(); +extern int printf(); +extern char putc(); +extern int rewind(); +extern int setjmp(); +extern int strcmp(); +extern char * strcpy(); +extern int strlen(); +extern char * strncpy(); +*/ + +/* Machine independent functions */ + +/* asmain.c */ +extern FILE * afile(); +extern VOID asexit(); +extern VOID asmbl(); +extern int main(); +extern VOID newdot(); +extern VOID phase(); +extern VOID usage(); + +/* aslex.c */ +extern char endline(); +extern char get(); +extern VOID getid(); +extern int as_getline(); +extern int getmap(); +extern char getnb(); +extern VOID getst(); +extern int more(); +extern VOID unget(); +extern VOID chop_crlf(); + +/* assym.c */ +extern struct area * alookup(); +extern struct mne * mlookup(); +extern int hash(); +extern struct sym * lookup(); +extern VOID * new(); +extern char * strsto(char *str); +extern int symeq(); +extern VOID syminit(); +extern VOID symglob(); +extern VOID allglob(); + +/* assubr.c */ +extern VOID aerr(); +extern VOID diag(); +extern VOID err(); +extern VOID warnBanner(void); +extern char * geterr(); +extern VOID qerr(); +extern VOID rerr(); + +/* asexpr.c */ +extern VOID abscheck(); +extern Addr_T absexpr(); +extern VOID clrexpr(); +extern int digit(); +extern int is_abs(); +extern VOID expr(); +extern int oprio(); +extern VOID term(); + +/* aslist.c */ +extern VOID list(); +extern VOID list1(); +extern VOID list2(); +extern VOID lstsym(); +extern VOID slew(); + +/* asout.c */ +extern int hibyte(); +extern int lobyte(); +extern int byte3(int); +extern VOID out(); +extern VOID outab(); +extern VOID outarea(); +extern VOID outaw(); +extern VOID outall(); +extern VOID outdot(); +extern VOID outbuf(); +extern VOID outchk(); +extern VOID outgsd(); +extern VOID outrb(); +extern VOID outrw(struct expr *, int); +extern VOID outr24(struct expr *, int); +extern VOID outsym(); +extern VOID out_lb(); +extern VOID out_lw(); +extern VOID out_l24(int, int); +extern VOID out_rw(); +extern VOID out_tw(); +extern VOID out_t24(int); +extern VOID outr11(); /* JLH */ +extern VOID outr19(struct expr *, int, int); +extern VOID outdp(struct area *, struct expr *); + +/* asnoice.c */ +extern void DefineNoICE_Line(); +extern void DefineCDB_Line(); + +/* Machine dependent variables */ + +extern char * cpu; +extern char * dsft; +extern int hilo; +extern struct mne mne[]; + +/* Machine dependent functions */ + +extern VOID minit(); +extern VOID machine(struct mne *); + +/* strcmpi.c */ +extern int as_strcmpi(const char *s1, const char *s2); +extern int as_strncmpi(const char *s1, const char *s2, size_t n); diff --git a/as/hc08/asmain.c b/as/hc08/asmain.c new file mode 100644 index 0000000..d771e77 --- /dev/null +++ b/as/hc08/asmain.c @@ -0,0 +1,1363 @@ +/* asmain.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 29-Oct-97 JLH pass ";!" comments to output file + */ + +#include +#include +#include +#include +#include + +#include "asm.h" + +/*)Module asmain.c + * + * The module asmain.c includes the command argument parser, + * the three pass sequencer, and the machine independent + * assembler parsing code. + * + * asmain.c contains the following functions: + * VOID main(argc, argv) + * VOID asexit() + * VOID asmbl() + * FILE * afile(fn, ft, wf) + * VOID newdot(nap) + * VOID phase(ap, a) + * VOID usage() + * + * asmain.c contains the array char *usetxt[] which + * references the usage text strings printed by usage(). + */ + +static const char *search_path[100]; +static int search_path_length; + +/** + * The search_path_append is used to append another directory to the end + * of the include file search path. + * + * @param dir + * The directory to be added to the path. + */ +void +search_path_append(const char *dir) +{ + if (search_path_length < sizeof(search_path)/sizeof(char*)) + { + search_path[search_path_length++] = dir; + } +} + +/** + * The search_path_fopen function is used to open the named file. If + * the file isn't in the current directory, the search path is then used + * to build a series of possible file names, and attempts to open them. + * The first found is used. + * + * @param filename + * The name of the file to be opened. + * @param mode + * The mode of the file to be opened. + * @returns + * what the fopen function would return on success, or NULL if the + * file is not anywhere in the search path. + */ +static FILE * +search_path_fopen(const char *filename, const char *mode) +{ + FILE *fp; + int j; + + fp = fopen(filename, mode); + if (fp != NULL || filename[0] == '/' || filename[0] == '\\') + return fp; + for (j = 0; j < search_path_length; ++j) + { + char path[2000]; + + strncpy(path, search_path[j], sizeof(path)); + if ((path[strlen(path) - 1] != '/') && + (path[strlen(path) - 1] != DIR_SEPARATOR_CHAR)) + { + strncat(path, DIR_SEPARATOR_STRING, sizeof(path)); + } + strncat(path, filename, sizeof(path)); + fp = fopen(path, mode); + if (fp != NULL) + return fp; + } + errno = ENOENT; + return NULL; +} + +/*)Function VOID main(argc, argv) + * + * int argc argument count + * char * argv array of pointers to argument strings + * + * The function main() is the entry point to the assembler. + * The purpose of main() is to (1) parse the command line + * arguments for options and source file specifications and + * (2) to process the source files through the 3 pass assembler. + * Before each assembler pass various variables are initialized + * and source files are rewound to their beginning. During each + * assembler pass each assembler-source text line is processed. + * After each assembler pass the assembler information is flushed + * to any opened output files and the if-else-endif processing + * is checked for proper termination. + * + * The function main() is also responsible for opening all + * output files (REL, LST, and SYM), sequencing the global (-g) + * and all-global (-a) variable definitions, and dumping the + * REL file header information. + * + * local variables: + * char * p pointer to argument string + * int c character from argument string + * int i argument loop counter + * area * ap pointer to area structure + * + * global variables: + * int aflag -a, make all symbols global flag + * char afn[] afile() constructed filespec + * area * areap pointer to an area structure + * int cb[] array of assembler output values + * int cbt[] array of assembler relocation types + * describing the data in cb[] + * int cfile current file handle index + * of input assembly files + * int * cp pointer to assembler output array cb[] + * int * cpt pointer to assembler relocation type + * output array cbt[] + * char eb[] array of generated error codes + * char * ep pointer into error list array eb[] + * int fflag -f(f), relocations flagged flag + * int flevel IF-ELSE-ENDIF flag will be non + * zero for false conditional case + * Addr_T fuzz tracks pass to pass changes in the + * address of symbols caused by + * variable length instruction formats + * int gflag -g, make undefined symbols global flag + * char ib[] assembler-source text line + * int inpfil count of assembler + * input files specified + * int ifcnd[] array of IF statement condition + * values (0 = FALSE) indexed by tlevel + * int iflvl[] array of IF-ELSE-ENDIF flevel + * values indexed by tlevel + * int incfil current file handle index + * for include files + * char * ip pointer into the assembler-source + * text line in ib[] + * jmp_buf jump_env compiler dependent structure + * used by setjmp() and longjmp() + * int lflag -l, generate listing flag + * int line current assembler source + * line number + * int lop current line number on page + * int oflag -o, generate relocatable output flag + * int jflag -j, generate debug info flag + * int page current page number + * int pflag enable listing pagination + * int pass assembler pass number + * int radix current number conversion radix: + * 2 (binary), 8 (octal), 10 (decimal), + * 16 (hexadecimal) + * int sflag -s, generate symbol table flag + * char srcfn[][] array of source file names + * int srcline[] current source file line + * char stb[] Subtitle string buffer + * sym * symp pointer to a symbol structure + * int tlevel current conditional level + * int xflag -x, listing radix flag + * FILE * lfp list output file handle + * FILE * ofp relocation output file handle + * FILE * tfp symbol table output file handle + * FILE * sfp[] array of assembler-source file handles + * + * called functions: + * FILE * afile() asmain.c + * VOID allglob() assym.c + * VOID asexit() asmain.c + * VOID diag() assubr.c + * VOID err() assubr.c + * int fprintf() c-library + * int as_getline() aslex.c + * VOID list() aslist.c + * VOID lstsym() aslist.c + * VOID minit() ___mch.c + * VOID newdot() asmain.c + * VOID outchk() asout.c + * VOID outgsd() asout.c + * int rewind() c-library + * int setjmp() c-library + * VOID symglob() assym.c + * VOID syminit() assym.c + * VOID usage() asmain.c + * + * side effects: + * Completion of main() completes the assembly process. + * REL, LST, and/or SYM files may be generated. + */ + +int fatalErrors=0; +char relFile[128]; + +int +main(int argc, char *argv[]) +{ + register char *p; + register int c, i; + struct area *ap; + + /*fprintf(stdout, "\n");*/ + inpfil = -1; + pflag = 1; + for (i=1; i= 0) + usage(); + ++p; + while ((c = *p++) != 0) + switch(c) { + + case 'a': + case 'A': + ++aflag; + break; + + case 'c': + case 'C': + ++cflag; + break; + + case 'g': + case 'G': + ++gflag; + break; + + case 'i': + case 'I': + search_path_append(p); + while (*p) + ++p; + break; + + case 'j': /* JLH: debug info */ + case 'J': + ++jflag; + ++oflag; /* force object */ + break; + + case 'l': + case 'L': + ++lflag; + break; + + case 'o': + case 'O': + ++oflag; + break; + + case 's': + case 'S': + ++sflag; + break; + + case 'p': + case 'P': + pflag = 0; + break; + + case 'x': + case 'X': + xflag = 0; + break; + + case 'q': + case 'Q': + xflag = 1; + break; + + case 'd': + case 'D': + xflag = 2; + break; + + case 'f': + case 'F': + ++fflag; + break; + + default: + usage(); + } + } else { + if (++inpfil == MAXFIL) { + fprintf(stderr, "too many input files\n"); + asexit(1); + } + sfp[inpfil] = afile(p, "", 0); + strcpy(srcfn[inpfil],afn); + if (inpfil == 0) { + if (lflag) + lfp = afile(p, "lst", 1); + if (oflag) { + ofp = afile(p, "rel", 1); + // save the file name if we have to delete it on error + strcpy(relFile,afn); + } + if (sflag) + tfp = afile(p, "sym", 1); + } + } + } + if (inpfil < 0) + usage(); + syminit(); + for (pass=0; pass<3; ++pass) { + if (gflag && pass == 1) + symglob(); + if (aflag && pass == 1) + allglob(); + if (oflag && pass == 2) + outgsd(); + flevel = 0; + tlevel = 0; + ifcnd[0] = 0; + iflvl[0] = 0; + radix = 10; + srcline[0] = 0; + page = 0; + org_cnt = 0; + stb[0] = 0; + lop = NLPP; + cfile = 0; + incfil = -1; + for (i = 0; i <= inpfil; i++) + rewind(sfp[i]); + ap = areap; + while (ap) { + ap->a_fuzz = 0; + ap->a_size = 0; + ap = ap->a_ap; + } + fuzz = 0; + dot.s_addr = 0; + dot.s_area = &dca; + symp = ˙ + minit(); + while (as_getline()) { + cp = cb; + cpt = cbt; + ep = eb; + ip = ib; + + /* JLH: if line begins with ";!", then + * pass this comment on to the output file + */ + if (oflag && (pass == 1) && + (ip[0] == ';') && (ip[1] == '!')) + { + fprintf(ofp, "%s\n", ip ); + } + + if (setjmp(jump_env) == 0) + asmbl(); + + if (pass == 2) { + diag(); + list(); + } + } + newdot(dot.s_area); /* Flush area info */ + if (flevel || tlevel) + err('i'); + } + if (oflag) + outchk(HUGE, HUGE); /* Flush */ + if (sflag) { + lstsym(tfp); + } else + if (lflag) { + lstsym(lfp); + } + //printf ("aserr: %d\n", aserr); + //printf ("fatalErrors: %d\n", fatalErrors); + asexit(fatalErrors); + return 0; // hush the compiler +} + +/*)Function VOID asexit(i) + * + * int i exit code + * + * The function asexit() explicitly closes all open + * files and then terminates the program. + * + * local variables: + * int j loop counter + * + * global variables: + * FILE * ifp[] array of include-file file handles + * FILE * lfp list output file handle + * FILE * ofp relocation output file handle + * FILE * tfp symbol table output file handle + * FILE * sfp[] array of assembler-source file handles + * + * functions called: + * int fclose() c-library + * VOID exit() c-library + * + * side effects: + * All files closed. Program terminates. + */ + +VOID +asexit(int i) +{ + int j; + + if (lfp != NULL) fclose(lfp); + if (ofp != NULL) fclose(ofp); + if (tfp != NULL) fclose(tfp); + + for (j=0; j= 0) { + n = 10*n + d; + c = get(); + } + if (c != '$' || get() != ':') + qerr(); + tp = symp->s_tsym; + if (pass == 0) { + while (tp) { + if (n == tp->t_num) { + tp->t_flg |= S_MDF; + break; + } + tp = tp->t_lnk; + } + if (tp == NULL) { + tp=(struct tsym *) new (sizeof(struct tsym)); + tp->t_lnk = symp->s_tsym; + tp->t_num = n; + tp->t_flg = 0; + tp->t_area = dot.s_area; + tp->t_addr = dot.s_addr; + symp->s_tsym = tp; + } + } else { + while (tp) { + if (n == tp->t_num) { + break; + } + tp = tp->t_lnk; + } + if (tp) { + if (pass == 1) { + fuzz = tp->t_addr - dot.s_addr; + tp->t_area = dot.s_area; + tp->t_addr = dot.s_addr; + } else { + phase(tp->t_area, tp->t_addr); + if (tp->t_flg & S_MDF) + err('m'); + } + } else { + err('u'); + } + } + lmode = ALIST; + goto loop; + } + /* + * If the first character is a letter then assume a label, + * symbol, assembler directive, or assembler mnemonic is + * being processed. + */ + if ((ctype[c] & LETTER) == 0) { + if (flevel) { + return; + } else { + qerr(); + } + } + getid(id, c); + c = getnb(); + /* + * If the next character is a : then a label is being processed. + * A double :: defines a global label. If this is new label + * then create a symbol structure. + * pass 0: + * Flag multiply defined labels. + * pass 1: + * Load area, address, and fuzz values + * into structure symp. + * pass 2: + * Check for assembler phase error and + * multiply defined error. + */ + if (c == ':') { + if (flevel) + return; + if ((c = get()) != ':') { + unget(c); + c = 0; + } + symp = lookup(id); + if (symp == &dot) + err('.'); + if (pass == 0) + if ((symp->s_type != S_NEW) && + ((symp->s_flag & S_ASG) == 0)) + symp->s_flag |= S_MDF; + if (pass != 2) { + fuzz = symp->s_addr - dot.s_addr; + symp->s_type = S_USER; + symp->s_area = dot.s_area; + symp->s_addr = dot.s_addr; + } else { + if (symp->s_flag & S_MDF) + err('m'); + phase(symp->s_area, symp->s_addr); + } + if (c) { + symp->s_flag |= S_GBL; + } + lmode = ALIST; + goto loop; + } + /* + * If the next character is a = then an equate is being processed. + * A double == defines a global equate. If this is new variable + * then create a symbol structure. + */ + if (c == '=') { + if (flevel) + return; + if ((c = get()) != '=') { + unget(c); + c = 0; + } + clrexpr(&e1); + expr(&e1, 0); + sp = lookup(id); + if (sp == &dot) { + outall(); + if (e1.e_flag || e1.e_base.e_ap != dot.s_area) + err('.'); + } else + if (sp->s_type != S_NEW && (sp->s_flag & S_ASG) == 0) { + err('m'); + } + sp->s_type = S_USER; + sp->s_area = e1.e_base.e_ap; + sp->s_addr = laddr = e1.e_addr; + sp->s_flag |= S_ASG; + if (c) { + sp->s_flag |= S_GBL; + } + lmode = ELIST; + goto loop; + } + unget(c); + lmode = flevel ? SLIST : CLIST; + if ((mp = mlookup(id)) == NULL) { + if (!flevel) + err('o'); + return; + } + /* + * If we have gotten this far then we have found an + * assembler directive or an assembler mnemonic. + * + * Check for .if, .else, .endif, and .page directives + * which are not controlled by the conditional flags + */ + switch (mp->m_type) { + + case S_IF: + n = absexpr(); + if (tlevel < MAXIF) { + ++tlevel; + ifcnd[tlevel] = n; + iflvl[tlevel] = flevel; + if (n == 0) { + ++flevel; + } + } else { + err('i'); + } + lmode = ELIST; + laddr = n; + return; + + case S_ELSE: + if (ifcnd[tlevel]) { + if (++flevel > (iflvl[tlevel]+1)) { + err('i'); + } + } else { + if (--flevel < iflvl[tlevel]) { + err('i'); + } + } + lmode = SLIST; + return; + + case S_ENDIF: + if (tlevel) { + flevel = iflvl[tlevel--]; + } else { + err('i'); + } + lmode = SLIST; + return; + + case S_PAGE: + lop = NLPP; + lmode = NLIST; + return; + + default: + break; + } + if (flevel) + return; + /* + * If we are not in a false state for .if/.else then + * process the assembler directives here. + */ + switch (mp->m_type) { + + case S_EVEN: + outall(); + laddr = dot.s_addr = (dot.s_addr + 1) & ~1; + lmode = ALIST; + break; + + case S_ODD: + outall(); + laddr = dot.s_addr |= 1; + lmode = ALIST; + break; + + case S_BYTE: + case S_WORD: + do { + clrexpr(&e1); + expr(&e1, 0); + if (mp->m_type == S_BYTE) { + outrb(&e1, R_NORM); + } else { + outrw(&e1, R_NORM); + } + } while ((c = getnb()) == ','); + unget(c); + break; + + case S_ULEB128: + case S_SLEB128: + do { + Addr_T val = absexpr(); + int bit = sizeof(val)*8 - 1; + int impliedBit; + + if (mp->m_type == S_ULEB128) { + impliedBit = 0; + } else { + impliedBit = (val & (1 << bit)) ? 1 : 0; + } + while ((bit>0) && (((val & (1 << bit)) ? 1 : 0) == impliedBit)) { + bit--; + } + if (mp->m_type == S_SLEB128) { + bit++; + } + while (bit>=0) { + if (bit<7) { + outab(val & 0x7f); + } else { + outab(0x80 | (val & 0x7f)); + } + bit -= 7; + val >>= 7; + } + } while ((c = getnb()) == ','); + unget(c); + break; + + case S_ASCII: + case S_ASCIZ: + if ((d = getnb()) == '\0') + qerr(); + while ((c = getmap(d)) >= 0) + outab(c); + if (mp->m_type == S_ASCIZ) + outab(0); + break; + + case S_ASCIS: + if ((d = getnb()) == '\0') + qerr(); + c = getmap(d); + while (c >= 0) { + if ((n = getmap(d)) >= 0) { + outab(c); + } else { + outab(c | 0x80); + } + c = n; + } + break; + + case S_BLK: + clrexpr(&e1); + expr(&e1, 0); + outchk(HUGE,HUGE); + dot.s_addr += e1.e_addr*mp->m_valu; + lmode = BLIST; + break; + + case S_TITLE: + p = tb; + if ((c = getnb()) != 0) { + do { + if (p < &tb[NTITL-1]) + *p++ = c; + } while ((c = get()) != 0); + } + *p = 0; + unget(c); + lmode = SLIST; + break; + + case S_SBTL: + p = stb; + if ((c = getnb()) != 0) { + do { + if (p < &stb[NSBTL-1]) + *p++ = c; + } while ((c = get()) != 0); + } + *p = 0; + unget(c); + lmode = SLIST; + break; + + case S_MODUL: + getst(id, getnb()); // a module can start with a digit + if (pass == 0) { + if (module[0]) { + err('m'); + } else { + strncpy(module, id, NCPS); + } + } + lmode = SLIST; + break; + + case S_OPTSDCC: + p = optsdcc; + if ((c = getnb()) != 0) { + do { + if (p < &optsdcc[NINPUT-1]) + *p++ = c; + } while ((c = get()) != 0); + } + *p = 0; + unget(c); + lmode = SLIST; + /*if (pass == 0) printf("optsdcc=%s\n", optsdcc);*/ + break; + + case S_GLOBL: + do { + getid(id, -1); + sp = lookup(id); + sp->s_flag |= S_GBL; + } while ((c = getnb()) == ','); + unget(c); + lmode = SLIST; + break; + + case S_DAREA: + getid(id, -1); + uaf = 0; + uf = A_CON|A_REL; + if ((c = getnb()) == '(') { + do { + getid(opt, -1); + mp = mlookup(opt); + if (mp && mp->m_type == S_ATYP) { + ++uaf; + uf |= mp->m_valu; + } else { + err('u'); + } + } while ((c = getnb()) == ','); + if (c != ')') + qerr(); + } else { + unget(c); + } + if ((ap = alookup(id)) != NULL) { + if (uaf && uf != ap->a_flag) + err('m'); + } else { + ap = (struct area *) new (sizeof(struct area)); + ap->a_ap = areap; + strncpy(ap->a_id, id, NCPS); + ap->a_ref = areap->a_ref + 1; + ap->a_addr = 0; + ap->a_size = 0; + ap->a_fuzz = 0; + ap->a_flag = uaf ? uf : (A_CON|A_REL); + areap = ap; + } + newdot(ap); + lmode = SLIST; + if (dot.s_area->a_flag & A_ABS) + abs_ap = ap; + break; + + case S_ORG: + if (dot.s_area->a_flag & A_ABS) { + char buf[NCPS]; + + laddr = absexpr(); + sprintf(buf, "%s%x", abs_ap->a_id, org_cnt++); + if ((ap = alookup(buf)) == NULL) { + ap = (struct area *) new (sizeof(struct area)); + *ap = *areap; + ap->a_ap = areap; + strncpy(ap->a_id, buf, NCPS); + ap->a_ref = areap->a_ref + 1; + ap->a_size = 0; + ap->a_fuzz = 0; + areap = ap; + } + newdot(ap); + lmode = ALIST; + dot.s_addr = dot.s_org = laddr; + } else { + err('o'); + } + break; + + case S_RADIX: + if (more()) { + switch (getnb()) { + case 'b': + case 'B': + radix = 2; + break; + case '@': + case 'o': + case 'O': + case 'q': + case 'Q': + radix = 8; + break; + case 'd': + case 'D': + radix = 10; + break; + case 'h': + case 'H': + case 'x': + case 'X': + radix = 16; + break; + default: + radix = 10; + qerr(); + break; + } + } else { + radix = 10; + } + lmode = SLIST; + break; + + case S_INCL: + d = getnb(); + p = fn; + while ((c = get()) != d) { + if (p < &fn[PATH_MAX-1]) { + *p++ = c; + } else { + break; + } + } + *p = 0; + if ((++incfil == MAXINC) || + (ifp[incfil] = search_path_fopen(fn, "r")) == NULL) { + --incfil; + err('i'); + } else { + lop = NLPP; + incline[incfil] = 0; + strcpy(incfn[incfil],fn); + } + lmode = SLIST; + break; + + case S_FLAT24: + if (more()) + { + getst(id, -1); + + if (!as_strcmpi(id, "on")) + { + /* Quick sanity check: size of + * Addr_T must be at least 24 bits. + */ + if (sizeof(Addr_T) < 3) + { + warnBanner(); + fprintf(stderr, + "Cannot enable Flat24 mode: " + "host system must have 24 bit " + "or greater integers.\n"); + } + else + { + flat24Mode = 1; + } + } + else if (!as_strcmpi(id, "off")) + { + flat24Mode = 0; + } + else + { + qerr(); + } + } + else + { + qerr(); + } + lmode = SLIST; + #if 0 + printf("as8051: ds390 flat mode %sabled.\n", + flat24Mode ? "en" : "dis"); + #endif + break; + + + /* + * If not an assembler directive then go to + * the machine dependent function which handles + * all the assembler mnemonics. + */ + default: + machine(mp); + /* if cdb information then generate the line info */ + if (cflag && (pass == 1)) + DefineCDB_Line(); + + /* JLH: if -j, generate a line number symbol */ + if (jflag && (pass == 1)) + { + DefineNoICE_Line(); + } + + } + goto loop; +} + +/*)Function FILE * afile(fn, ft, wf) + * + * char * fn file specification string + * char * ft file type string + * int wf read(0)/write(1) flag + * + * The function afile() opens a file for reading or writing. + * (1) If the file type specification string ft + * is not NULL then a file specification is + * constructed with the file path\name in fn + * and the extension in ft. + * (2) If the file type specification string ft + * is NULL then the file specification is + * constructed from fn. If fn does not have + * a file type then the default source file + * type dsft is appended to the file specification. + * + * afile() returns a file handle for the opened file or aborts + * the assembler on an open error. + * + * local variables: + * int c character value + * FILE * fp filehandle for opened file + * char * p1 pointer to filespec string fn + * char * p2 pointer to filespec string fb + * char * p3 pointer to filetype string ft + * + * global variables: + * char afn[] afile() constructed filespec + * char dsft[] default assembler file type string + * char afn[] constructed file specification string + * + * functions called: + * VOID asexit() asmain.c + * FILE * fopen() c_library + * int fprintf() c_library + * + * side effects: + * File is opened for read or write. + */ + +FILE * +afile(char *fn, char *ft, int wf) +{ + register char *p2, *p3; + register int c; + FILE *fp; + + p2 = afn; + p3 = ft; + + strcpy (afn, fn); + p2 = strrchr (afn, FSEPX); // search last '.' + if (!p2) + p2 = afn + strlen (afn); + if (p2 > &afn[PATH_MAX-4]) // truncate filename, if it's too long + p2 = &afn[PATH_MAX-4]; + *p2++ = FSEPX; + + // choose a file-extension + if (*p3 == 0) { // extension supplied? + p3 = strrchr (fn, FSEPX); // no: extension in fn? + if (p3) + ++p3; + else + p3 = dsft; // no: default extension + } + + while ((c = *p3++) != 0) { // strncpy + if (p2 < &afn[PATH_MAX-1]) + *p2++ = c; + } + *p2++ = 0; + + if ((fp = fopen(afn, wf?"w":"r")) == NULL) { + fprintf(stderr, "%s: cannot %s.\n", afn, wf?"create":"open"); + asexit(1); + } + return (fp); +} + +/*)Function VOID newdot(nap) + * + * area * nap pointer to the new area structure + * + * The function newdot(): + * (1) copies the current values of fuzz and the last + * address into the current area referenced by dot + * (2) loads dot with the pointer to the new area and + * loads the fuzz and last address parameters + * (3) outall() is called to flush any remaining + * bufferred code from the old area to the output + * + * local variables: + * area * oap pointer to old area + * + * global variables: + * sym dot defined as sym[0] + * Addr_T fuzz tracks pass to pass changes in the + * address of symbols caused by + * variable length instruction formats + * + * functions called: + * none + * + * side effects: + * Current area saved, new area loaded, buffers flushed. + */ + +VOID +newdot(register struct area *nap) +{ + register struct area *oap; + + oap = dot.s_area; + /* fprintf (stderr, "%s dot.s_area->a_size: %d dot.s_addr: %d\n", + oap->a_id, dot.s_area->a_size, dot.s_addr); */ + oap->a_fuzz = fuzz; + if (oap->a_flag & A_OVR) { + // the size of an overlay is the biggest size encountered + if (oap->a_size < dot.s_addr) { + oap->a_size = dot.s_addr; + } + } else if (oap->a_flag & A_ABS) { + oap->a_addr = dot.s_org; + oap->a_size += dot.s_addr - dot.s_org; + dot.s_addr = dot.s_org = 0; + } else { + oap->a_addr = 0; + oap->a_size = dot.s_addr; + } + if (nap->a_flag & A_OVR) { + // a new overlay starts at 0, no fuzz + dot.s_addr = 0; + fuzz = 0; + } else if (nap->a_flag & A_ABS) { + // a new absolute starts at org, no fuzz + dot.s_addr = dot.s_org; + fuzz = 0; + } else { + dot.s_addr = nap->a_size; + fuzz = nap->a_fuzz; + } + dot.s_area = nap; + outall(); +} + +/*)Function VOID phase(ap, a) + * + * area * ap pointer to area + * Addr_T a address in area + * + * Function phase() compares the area ap and address a + * with the current area dot.s_area and address dot.s_addr + * to determine if the position of the symbol has changed + * between assembler passes. + * + * local variables: + * none + * + * global varaibles: + * sym * dot defined as sym[0] + * + * functions called: + * none + * + * side effects: + * The p error is invoked if the area and/or address + * has changed. + */ + +VOID +phase(struct area *ap, Addr_T a) +{ + if (ap != dot.s_area || a != dot.s_addr) + err('p'); +} + +char *usetxt[] = { + "Usage: [-dqxjgalopsf][ -I ] file1 [file2 file3 ...]", + " d decimal listing", + " q octal listing", + " x hex listing (default)", + " j add line number and debug information to file", /* JLH */ + " g undefined symbols made global", + " a all user symbols made global", + " l create list output file1[LST]", + " o create object output file1[REL]", + " s create symbol output file1[SYM]", + " c generate sdcdb debug information", + " p disable listing pagination", + " f flag relocatable references by ` in listing file", + " ff flag relocatable references by mode in listing file", + "-I Add the named directory to the include file", + " search path. This option may be used more than once.", + " Directories are searched in the order given.", + "", + 0 +}; + +/*)Function VOID usage() + * + * The function usage() outputs to the stderr device the + * assembler name and version and a list of valid assembler options. + * + * local variables: + * char ** dp pointer to an array of + * text string pointers. + * + * global variables: + * char cpu[] assembler type string + * char * usetxt[] array of string pointers + * + * functions called: + * VOID asexit() asmain.c + * int fprintf() c_library + * + * side effects: + * program is terminated + */ + +VOID +usage(void) +{ + register char **dp; + + fprintf(stderr, "\nASxxxx Assembler %s (%s)\n\n", VERSION, cpu); + for (dp = usetxt; *dp; dp++) + fprintf(stderr, "%s\n", *dp); + asexit(1); +} diff --git a/as/hc08/asout.c b/as/hc08/asout.c new file mode 100644 index 0000000..9ba6f4d --- /dev/null +++ b/as/hc08/asout.c @@ -0,0 +1,1493 @@ +/* asout.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 28-Oct-97 JLH: + * - outsym: show s_id as string rather than array [NCPS] + * - Added outr11 to support 8051's 11 bit destination address + */ + +#include +#include +#include +#include "asm.h" + + +/*)Module asout.c + * + * The module asout.c contains all the functions used to + * generate the .REL assembler output file. + * + * + * The assemblers' output object file is an ascii file containing + * the information needed by the linker to bind multiple object + * modules into a complete loadable memory image. + * + * The object module contains the following designators: + * + * [XDQ][HL] + * X Hexadecimal radix + * D Decimal radix + * Q Octal radix + * + * H Most significant byte first + * L Least significant byte first + * + * H Header + * M Module + * A Area + * S Symbol + * T Object code + * R Relocation information + * P Paging information + * + * + * (1) Radix Line + * + * The first line of an object module contains the [XDQ][HL] + * format specifier (i.e. XH indicates a hexadecimal file with + * most significant byte first) for the following designators. + * + * + * (2) Header Line + * + * H aa areas gg global symbols + * + * The header line specifies the number of areas(aa) and the + * number of global symbols(gg) defined or referenced in this ob- + * ject module segment. + * + * + * (3) Module Line + * + * M name + * + * The module line specifies the module name from which this + * header segment was assembled. The module line will not appear + * if the .module directive was not used in the source program. + * + * + * (4) Symbol Line + * + * S string Defnnnn + * + * or + * + * S string Refnnnn + * + * The symbol line defines (Def) or references (Ref) the symbol + * 'string' with the value nnnn. The defined value is relative to + * the current area base address. References to constants and ex- + * ternal global symbols will always appear before the first area + * definition. References to external symbols will have a value of + * zero. + * + * + * (5) Area Line + * + * A label size ss flags ff + * + * The area line defines the area label, the size (ss) of the + * area in bytes, and the area flags (ff). The area flags specify + * the ABS, REL, CON, OVR, and PAG parameters: + * + * OVR/CON (0x04/0x00 i.e. bit position 2) + * + * ABS/REL (0x08/0x00 i.e. bit position 3) + * + * PAG (0x10 i.e. bit position 4) + * + * + * (6) T Line + * + * T xx xx nn nn nn nn nn ... + * + * The T line contains the assembled code output by the assem- + * bler with xx xx being the offset address from the current area + * base address and nn being the assembled instructions and data in + * byte format. + * + * + * (7) R Line + * + * R 0 0 nn nn n1 n2 xx xx ... + * + * The R line provides the relocation information to the linker. + * The nn nn value is the current area index, i.e. which area the + * current values were assembled. Relocation information is en- + * coded in groups of 4 bytes: + * + * 1. n1 is the relocation mode and object format + * 1. bit 0 word(0x00)/byte(0x01) + * 2. bit 1 relocatable area(0x00)/symbol(0x02) + * 3. bit 2 normal(0x00)/PC relative(0x04) relocation + * 4. bit 3 1-byte(0x00)/2-byte(0x08) object format for + * byte data + * 5. bit 4 signed(0x00)/unsigned(0x10) byte data + * 6. bit 5 normal(0x00)/page '0'(0x20) reference + * 7. bit 6 normal(0x00)/page 'nnn'(0x40) reference + * 8. bit 7 normal(0x00)/MSB of value + * + * 2. n2 is a byte index into the corresponding (i.e. pre- + * ceeding) T line data (i.e. a pointer to the data to be + * updated by the relocation). The T line data may be + * 1-byte or 2-byte byte data format or 2-byte word + * format. + * + * 3. xx xx is the area/symbol index for the area/symbol be- + * ing referenced. the corresponding area/symbol is found + * in the header area/symbol lists. + * + * + * The groups of 4 bytes are repeated for each item requiring relo- + * cation in the preceeding T line. + * + * + * (8) P Line + * + * P 0 0 nn nn n1 n2 xx xx + * + * The P line provides the paging information to the linker as + * specified by a .setdp directive. The format of the relocation + * information is identical to that of the R line. The correspond- + * ing T line has the following information: + * T xx xx aa aa bb bb + * + * Where aa aa is the area reference number which specifies the + * selected page area and bb bb is the base address of the page. + * bb bb will require relocation processing if the 'n1 n2 xx xx' is + * specified in the P line. The linker will verify that the base + * address is on a 256 byte boundary and that the page length of an + * area defined with the PAG type is not larger than 256 bytes. + * + * The linker defaults any direct page references to the first + * area defined in the input REL file. All ASxxxx assemblers will + * specify the _CODE area first, making this the default page area. + * + * + * asout.c contains the following functions: + * int lobyte() + * int hibyte() + * VOID out() + * VOID outab() + * VOID outall() + * VOID outarea() + * VOID outaw() + * VOID outbuf() + * VOID outchk() + * VOID outdot() + * VOID outdp() + * VOID outgsd() + * VOID outrb() + * VOID outrw() + * VOID outsym() + * VOID out_lb() + * VOID out_lw() + * VOID out_rw() + * VOID out_tw() + * + * The module asout.c contains the following local variables: + * int rel[] relocation data for code/data array + * int * relp pointer to rel array + * int txt[] assembled code/data array + * int * txtp pointer to txt array + */ + +#define NTXT 16 +#define NREL 16 + +char txt[NTXT]; +char rel[NREL]; + +char *txtp = { &txt[0] }; +char *relp = { &rel[0] }; + +/*)Function VOID outab(b) + * + * int b assembler data word + * + * The function outab() processes a single word of + * assembled data in absolute format. + * + * local variables: + * int * txtp pointer to data word + * + * global variables: + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID outchk() asout.c + * VOID out_lb() asout.c + * + * side effects: + * The current assembly address is incremented by 1. + */ + +VOID +outab(int b) +{ + if (pass == 2) { + out_lb(b,0); + if (oflag) { + outchk(1, 0); + *txtp++ = lobyte(b); + } + } + ++dot.s_addr; +} + +/*)Function VOID outaw(w) + * + * int w assembler data word + * + * The function outaw() processes a single word of + * assembled data in absolute format. + * + * local variables: + * int * txtp pointer to data word + * + * global variables: + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID outchk() asout.c + * VOID out_lw() asout.c + * + * side effects: + * The current assembly address is incremented by 2. + */ + +VOID +outaw(int w) +{ + if (pass == 2) { + out_lw(w,0); + if (oflag) { + outchk(2, 0); + out_tw(w); + } + } + dot.s_addr += 2; +} + +/*)Function VOID write_rmode(r) + * + * int r relocation mode + * + * write_rmode puts the passed relocation mode into the + * output relp buffer, escaping it if necessary. + * + * global variables: + * int * relp pointer to rel array + * + * functions called: + * VOID rerr() assubr.c + * + * side effects: + * relp is incremented appropriately. + */ +VOID +write_rmode(int r) +{ + /* We need to escape the relocation mode if it is greater + * than a byte, or if it happens to look like an escape. + * (I don't think that the latter case is legal, but + * better safe than sorry). + */ + if ((r > 0xff) || ((r & R_ESCAPE_MASK) == R_ESCAPE_MASK)) + { + /* Hack in up to an extra 4 bits of flags with escape. */ + if (r > 0xfff) + { + /* uh-oh.. we have more than 4 extra bits. */ + fprintf(stderr, + "Internal error: relocation mode 0x%X too big.\n", + r); + rerr(); + } + /* printf("escaping relocation mode\n"); */ + *relp++ = R_ESCAPE_MASK | (r >> 8); + *relp++ = r & 0xff; + } + else + { + *relp++ = r; + } +} + +/*)Function VOID outrb(esp, r) + * + * expr * esp pointer to expr structure + * int r relocation mode + * + * The function outrb() processes a byte of generated code + * in either absolute or relocatable format dependent upon + * the data contained in the expr structure esp. If the + * .REL output is enabled then the appropriate information + * is loaded into the txt and rel buffers. + * + * local variables: + * int n symbol/area reference number + * int * relp pointer to rel array + * int * txtp pointer to txt array + * + * global variables: + * sym dot defined as sym[0] + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID aerr() assubr.c + * VOID outchk() asout.c + * VOID out_lb() asout.c + * VOID out_rb() asout.c + * VOID out_tb() asout.c + * + * side effects: + * The current assembly address is incremented by 1. + */ + +VOID +outrb(struct expr *esp, int r) +{ + register int n; + + if (pass == 2) { + if (esp->e_flag==0 && esp->e_base.e_ap==NULL) { + /* This is a constant; simply write the + * const byte to the T line and don't + * generate any relocation info. + */ + out_lb(lobyte(esp->e_addr),0); + if (oflag) { + outchk(1, 0); + *txtp++ = lobyte(esp->e_addr); + } + } else { + /* We are generating a single byte of relocatable + * info. + * + * In 8051 mode, we generate a 16 bit address. The + * linker will later select a single byte based on + * whether R_MSB is set. + * + * In flat24 mode, we generate a 24 bit address. The + * linker will select a single byte based on + * whether R_MSB or R_HIB is set. + */ + if (!flat24Mode) + { + r |= R_BYTE | R_BYT2 | esp->e_rlcf; + if (r & R_MSB) { + out_lb(hibyte(esp->e_addr),r|R_RELOC|R_HIGH); + } else { + out_lb(lobyte(esp->e_addr),r|R_RELOC); + } + if (oflag) { + outchk(2, 5); + out_tw(esp->e_addr); + if (esp->e_flag) { + n = esp->e_base.e_sp->s_ref; + r |= R_SYM; + } else { + n = esp->e_base.e_ap->a_ref; + } + write_rmode(r); + *relp++ = txtp - txt - 2; + out_rw(n); + } + } + else + { + /* 24 bit mode. */ + r |= R_BYTE | R_BYT3 | esp->e_rlcf; + if (r & R_HIB) + { + /* Probably should mark this differently in the + * listing file. + */ + out_lb(byte3(esp->e_addr),r|R_RELOC|R_HIGH); + } + else if (r & R_MSB) { + out_lb(hibyte(esp->e_addr),r|R_RELOC|R_HIGH); + } else { + out_lb(lobyte(esp->e_addr),r|R_RELOC); + } + if (oflag) { + outchk(3, 5); + out_t24(esp->e_addr); + if (esp->e_flag) { + n = esp->e_base.e_sp->s_ref; + r |= R_SYM; + } else { + n = esp->e_base.e_ap->a_ref; + } + write_rmode(r); + *relp++ = txtp - txt - 3; + out_rw(n); + } + } + } + } + ++dot.s_addr; +} + +/*)Function VOID outrw(esp, r) + * + * expr * esp pointer to expr structure + * int r relocation mode + * + * The function outrw() processes a word of generated code + * in either absolute or relocatable format dependent upon + * the data contained in the expr structure esp. If the + * .REL output is enabled then the appropriate information + * is loaded into the txt and rel buffers. + * + * local variables: + * int n symbol/area reference number + * int * relp pointer to rel array + * int * txtp pointer to txt array + * + * global variables: + * sym dot defined as sym[0] + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID aerr() assubr.c + * VOID outchk() asout.c + * VOID out_lw() asout.c + * VOID out_rw() asout.c + * VOID out_tw() asout.c + * + * side effects: + * The current assembly address is incremented by 2. + */ + +VOID +outrw(struct expr *esp, int r) +{ + register int n; + + if (pass == 2) { + + if (esp->e_addr > 0xffff) + { + warnBanner(); + fprintf(stderr, + "large constant 0x%x truncated to 16 bits\n", + esp->e_addr); + } + if (esp->e_flag==0 && esp->e_base.e_ap==NULL) { + out_lw(esp->e_addr,0); + if (oflag) { + outchk(2, 0); + out_tw(esp->e_addr); + } + } else { + r |= R_WORD | esp->e_rlcf; + if (r & R_BYT2) { + rerr(); + if (r & R_MSB) { + out_lw(hibyte(esp->e_addr),r|R_RELOC); + } else { + out_lw(lobyte(esp->e_addr),r|R_RELOC); + } + } else { + out_lw(esp->e_addr,r|R_RELOC); + } + if (oflag) { + outchk(2, 5); + out_tw(esp->e_addr); + if (esp->e_flag) { + n = esp->e_base.e_sp->s_ref; + r |= R_SYM; + } else { + n = esp->e_base.e_ap->a_ref; + } + + if (IS_C24(r)) + { + /* If this happens, the linker will + * attempt to process this 16 bit field + * as 24 bits. That would be bad. + */ + fprintf(stderr, + "***Internal error: C24 out in " + "outrw()\n"); + rerr(); + } + write_rmode(r); + *relp++ = txtp - txt - 2; + out_rw(n); + } + } + } + dot.s_addr += 2; +} + +/*)Function VOID outr24(esp, r) + * + * expr * esp pointer to expr structure + * int r relocation mode + * + * The function outr24() processes 24 bits of generated code + * in either absolute or relocatable format dependent upon + * the data contained in the expr structure esp. If the + * .REL output is enabled then the appropriate information + * is loaded into the txt and rel buffers. + * + * local variables: + * int n symbol/area reference number + * int * relp pointer to rel array + * int * txtp pointer to txt array + * + * global variables: + * sym dot defined as sym[0] + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID aerr() assubr.c + * VOID outchk() asout.c + * VOID out_l24() asout.c + * VOID out_rw() asout.c + * VOID out_t24() asout.c + * + * side effects: + * The current assembly address is incremented by 3. + */ + +VOID +outr24(struct expr *esp, int r) +{ + register int n; + + if (pass == 2) { + if (esp->e_flag==0 && esp->e_base.e_ap==NULL) { + /* This is a constant expression. */ + out_l24(esp->e_addr,0); + if (oflag) { + outchk(3, 0); + out_t24(esp->e_addr); + } + } else { + /* This is a symbol. */ + r |= R_WORD | esp->e_rlcf; + if (r & R_BYT2) { + /* I have no idea what this case is. */ + rerr(); + if (r & R_MSB) { + out_lw(hibyte(esp->e_addr),r|R_RELOC); + } else { + out_lw(lobyte(esp->e_addr),r|R_RELOC); + } + } else { + out_l24(esp->e_addr,r|R_RELOC); + } + if (oflag) { + outchk(3, 5); + out_t24(esp->e_addr); + if (esp->e_flag) { + n = esp->e_base.e_sp->s_ref; + r |= R_SYM; + } else { + n = esp->e_base.e_ap->a_ref; + } + + if (r & R_BYTE) + { + /* If this occurs, we cannot properly + * code the relocation data with the + * R_C24 flag. This means the linker + * will fail to do the 24 bit relocation. + * Which will suck. + */ + fprintf(stderr, + "***Internal error: BYTE out in 24 " + "bit flat mode unexpected.\n"); + rerr(); + } + + write_rmode(r | R_C24); + *relp++ = txtp - txt - 3; + out_rw(n); + } + } + } + dot.s_addr += 3; +} + +/*)Function VOID outdp(carea, esp) + * + * area * carea pointer to current area strcuture + * expr * esp pointer to expr structure + * + * The function outdp() flushes the output buffer and + * outputs paging information to the .REL file. + * + * local variables: + * int n symbol/area reference number + * int r relocation mode + * int * relp pointer to rel array + * int * txtp pointer to txt array + * + * global variables: + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID outbuf() asout.c + * VOID outchk() asout.c + * VOID out_rw() asout.c + * VOID out_tw() asout.c + * + * side effects: + * Output buffer flushed to .REL fiel. + * Paging information dumped to .REL file. + */ + +VOID +outdp(register struct area *carea, register struct expr *esp) +{ + register int n, r; + + if (oflag && pass==2) { + outchk(HUGE,HUGE); + out_tw(carea->a_ref); + out_tw(esp->e_addr); + if (esp->e_flag || esp->e_base.e_ap!=NULL) { + r = R_WORD; + if (esp->e_flag) { + n = esp->e_base.e_sp->s_ref; + r |= R_SYM; + } else { + n = esp->e_base.e_ap->a_ref; + } + write_rmode(r); + *relp++ = txtp - txt - 2; + out_rw(n); + } + outbuf("P"); + } +} + +/*)Function VOID outall() + * + * The function outall() will output any bufferred assembled + * data and relocation information (during pass 2 if the .REL + * output has been enabled). + * + * local variables: + * none + * + * global variables: + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID outbuf() asout.c + * + * side effects: + * assembled data and relocation buffers will be cleared. + */ + +VOID +outall(void) +{ + if (oflag && pass==2) + outbuf("R"); +} + +/*)Function VOID outdot() + * + * The function outdot() outputs information about the + * current program counter value (during pass 2 if the .REL + * output has been enabled). + * + * local variables: + * none + * + * global variables: + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * int fprintf() c_library + * VOID out() asout.c + * + * side effects: + * assembled data and relocation buffers will be cleared. + */ + +VOID +outdot(void) +{ + if (oflag && pass==2) { + fprintf(ofp, "T"); + out(txt,(int) (txtp-txt)); + fprintf(ofp, "\n"); + fprintf(ofp, "R"); + out(rel,(int) (relp-rel)); + fprintf(ofp, "\n"); + txtp = txt; + relp = rel; + } +} + +/*)Function outchk(nt, nr) + * + * int nr number of additional relocation words + * int nt number of additional data words + * + * The function outchk() checks the data and relocation buffers + * for space to insert the nt data words and nr relocation words. + * If space is not available then output the current data and + * initialize the data buffers to receive the new data. + * + * local variables: + * area * ap pointer to an area structure + * int * relp pointer to rel array + * int * txtp pointer to txt array + * + * global variables: + * sym dot defined as sym[0] + * + * functions called: + * VOID outbuf() asout.c + * + * side effects: + * Data and relocation buffers may be emptied and initialized. + */ + +VOID +outchk(int nt, int nr) +{ + register struct area *ap; + + if (txtp+nt > &txt[NTXT] || relp+nr > &rel[NREL]) { + outbuf("R"); + } + if (txtp == txt) { + out_tw(dot.s_addr); + if ((ap = dot.s_area) != NULL) { + write_rmode(R_WORD|R_AREA); + *relp++ = 0; + out_rw(ap->a_ref); + } + } +} + +/*)Function VOID outbuf() + * + * The function outbuf() will output any bufferred data + * and relocation information to the .REL file. The output + * buffer pointers and counters are initialized. + * + * local variables: + * int rel[] relocation data for code/data array + * int * relp pointer to rel array + * int txt[] assembled code/data array + * int * txtp pointer to txt array + * + * global variables: + * FILE * ofp relocation output file handle + * + * functions called: + * VOID out() asout.c + * + * side effects: + * All bufferred data written to .REL file and + * buffer pointers and counters initialized. + */ + +VOID +outbuf(char *s) +{ + if (txtp > &txt[2]) { + fprintf(ofp, "T"); + out(txt,(int) (txtp-txt)); + fprintf(ofp, "\n"); + fprintf(ofp, "%s", s); + out(rel,(int) (relp-rel)); + fprintf(ofp, "\n"); + } + txtp = txt; + relp = rel; +} + +/*)Function VOID outgsd() + * + * The function outgsd() performs the following: + * (1) outputs the .REL file radix + * (2) outputs the header specifying the number + * of areas and global symbols + * (3) outputs the module name + * (4) set the reference number and output a symbol line + * for all external global variables and absolutes + * (5) output an area name, set reference number and output + * a symbol line for all global relocatables in the area. + * Repeat this proceedure for all areas. + * + * local variables: + * area * ap pointer to an area structure + * sym * sp pointer to a sym structure + * int i loop counter + * int j loop counter + * int c string character value + * int narea number of code areas + * char * ptr string pointer + * int nglob number of global symbols + * int rn symbol reference number + * + * global variables: + * area * areap pointer to an area structure + * char module[] module name string + * sym * symhash[] array of pointers to NHASH + * linked symbol lists + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * VOID outarea() asout.c + * VOID outsym() asout.c + * int putc() c_library + * + * side effects: + * All symbols are given reference numbers, all symbol + * and area information is output to the .REL file. + */ + +VOID +outgsd(void) +{ + register struct area *ap; + register struct sym *sp; + register int i, j; + char *ptr; + int c, narea, nglob, rn; + + /* + * Number of areas + */ + narea = areap->a_ref + 1; + + /* + * Number of global references/absolutes + */ + nglob = 0; + for (i = 0; i < NHASH; ++i) { + sp = symhash[i]; + while (sp) { + if (sp->s_flag&S_GBL) + ++nglob; + sp = sp->s_sp; + } + } + + /* + * Output Radix and number of areas and symbols + */ + if (xflag == 0) { + fprintf(ofp, "X%c\n", hilo ? 'H' : 'L'); + fprintf(ofp, "H %X areas %X global symbols\n", narea, nglob); + } else + if (xflag == 1) { + fprintf(ofp, "Q%c\n", hilo ? 'H' : 'L'); + fprintf(ofp, "H %o areas %o global symbols\n", narea, nglob); + } else + if (xflag == 2) { + fprintf(ofp, "D%c\n", hilo ? 'H' : 'L'); + fprintf(ofp, "H %u areas %u global symbols\n", narea, nglob); + } + + /* + * Module name + */ + if (module[0]) { + fprintf(ofp, "M "); + ptr = &module[0]; + while (ptr < &module[NCPS]) { + if ((c = *ptr++) != 0) + putc(c, ofp); + } + putc('\n', ofp); + } + + /* + * Sdcc compile options + */ + if (strlen(optsdcc)) fprintf(ofp, "O %s\n", optsdcc); + + /* + * Global references and absolutes. + */ + rn = 0; + for (i=0; is_area==NULL && sp->s_flag&S_GBL) { + sp->s_ref = rn++; + outsym(sp); + } + sp = sp->s_sp; + } + } + + /* + * Global relocatables. + */ + for (i=0; ia_ref != i) + ap = ap->a_ap; + outarea(ap); + for (j=0; js_area==ap && sp->s_flag&S_GBL) { + sp->s_ref = rn++; + outsym(sp); + } + sp = sp->s_sp; + } + } + } +} + +/*)Function VOID outarea(ap) + * + * area * ap pointer to an area structure + * + * The function outarea() outputs the A line to the .REL + * file. The A line contains the area's name, size, and + * attributes. + * + * local variables: + * char * ptr pointer to area id string + * int c character value + * + * global variables: + * FILE * ofp relocation output file handle + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * int putc() c_library + * + * side effects: + * The A line is sent to the .REL file. + */ + +VOID +outarea(register struct area *ap) +{ + register char *ptr; + register int c; + + fprintf(ofp, "A "); + ptr = &ap->a_id[0]; + while (ptr < &ap->a_id[NCPS]) { + if ((c = *ptr++) != 0) + putc(c, ofp); + } + if (xflag == 0) { + fprintf(ofp, " size %X flags %X addr %X\n", ap->a_size, ap->a_flag, ap->a_addr); + } else + if (xflag == 1) { + fprintf(ofp, " size %o flags %o\n", ap->a_size, ap->a_flag); + } else + if (xflag == 2) { + fprintf(ofp, " size %u flags %u\n", ap->a_size, ap->a_flag); + } +} + +/*)Function VOID outsym(sp) + * + * sym * sp pointer to a sym structure + * + * The function outsym() outputs the S line to the .REL + * file. The S line contains the symbols name and whether the + * the symbol is defined or referenced. + * + * local variables: + * char * ptr pointer to symbol id string + * int c character value + * + * global variables: + * FILE * ofp relocation output file handle + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * int putc() c_library + * + * side effects: + * The S line is sent to the .REL file. + */ + +VOID +outsym(register struct sym *sp) +{ + register char *ptr; + + fprintf(ofp, "S "); + ptr = &sp->s_id[0]; + fprintf(ofp, "%s", ptr ); + fprintf(ofp, " %s", sp->s_type==S_NEW ? "Ref" : "Def"); + if (xflag == 0) { + fprintf(ofp, "%04X\n", sp->s_addr); + } else + if (xflag == 1) { + fprintf(ofp, "%06o\n", sp->s_addr); + } else + if (xflag == 2) { + fprintf(ofp, "%05u\n", sp->s_addr); + } +} + +/*)Function VOID out(p, n) + * + * int n number of words to output + * int * p pointer to data words + * + * The function out() outputs the data words to the .REL file + * int the specified radix. + * + * local variables: + * none + * + * global variables: + * FILE * ofp relocation output file handle + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * + * side effects: + * Data is sent to the .REL file. + */ + +VOID +out(char *p, int n) +{ + while (n--) { + if (xflag == 0) { + fprintf(ofp, " %02X", (*p++)&0xff); + } else + if (xflag == 1) { + fprintf(ofp, " %03o", (*p++)&0xff); + } else + if (xflag == 2) { + fprintf(ofp, " %03u", (*p++)&0xff); + } + } +} + +/*)Function VOID out_lb(b, t) + * + * int b assembled data + * int t relocation type + * + * The function out_lb() copies the assembled data and + * its relocation type to the list data buffers. + * + * local variables: + * none + * + * global variables: + * int * cp pointer to assembler output array cb[] + * int * cpt pointer to assembler relocation type + * output array cbt[] + * + * functions called: + * none + * + * side effects: + * Pointers to data and relocation buffers incremented by 1. + */ + +VOID +out_lb(register int b, register int t) +{ + if (cp < &cb[NCODE]) { + *cp++ = b; + *cpt++ = t; + } +} + +/*)Function VOID out_lw(n, t) + * + * int n assembled data + * int t relocation type + * + * The function out_lw() copies the assembled data and + * its relocation type to the list data buffers. + * + * local variables: + * none + * + * global variables: + * int * cp pointer to assembler output array cb[] + * int * cpt pointer to assembler relocation type + * output array cbt[] + * + * functions called: + * none + * + * side effects: + * Pointers to data and relocation buffers incremented by 2. + */ + +VOID +out_lw(register int n, register int t) +{ + if (hilo) { + out_lb(hibyte(n),t ? t|R_HIGH : 0); + out_lb(lobyte(n),t); + } else { + out_lb(lobyte(n),t); + out_lb(hibyte(n),t ? t|R_HIGH : 0); + } +} + +/*)Function VOID out_l24(n, t) + * + * int n assembled data + * int t relocation type + * + * The function out_l24() copies the assembled data and + * its relocation type to the list data buffers. + * + * local variables: + * none + * + * global variables: + * int * cp pointer to assembler output array cb[] + * int * cpt pointer to assembler relocation type + * output array cbt[] + * + * functions called: + * none + * + * side effects: + * Pointers to data and relocation buffers incremented by 3. + */ + +VOID +out_l24(int n, int t) +{ + if (hilo) { + out_lb(byte3(n),t ? t|R_HIGH : 0); + out_lb(hibyte(n),t); + out_lb(lobyte(n),t); + } else { + out_lb(lobyte(n),t); + out_lb(hibyte(n),t); + out_lb(byte3(n),t ? t|R_HIGH : 0); + } +} + +/*)Function VOID out_rw(n) + * + * int n data word + * + * The function out_rw() outputs the relocation (R) + * data word as two bytes ordered according to hilo. + * + * local variables: + * int * relp pointer to rel array + * + * global variables: + * none + * + * functions called: + * int lobyte() asout.c + * int hibyte() asout.c + * + * side effects: + * Pointer to relocation buffer incremented by 2. + */ + +VOID +out_rw(register int n) +{ + if (hilo) { + *relp++ = hibyte(n); + *relp++ = lobyte(n); + } else { + *relp++ = lobyte(n); + *relp++ = hibyte(n); + } +} + +/*)Function VOID out_tw(n) + * + * int n data word + * + * The function out_tw() outputs the text (T) + * data word as two bytes ordered according to hilo. + * + * local variables: + * int * txtp pointer to txt array + * + * global variables: + * none + * + * functions called: + * int lobyte() asout.c + * int hibyte() asout.c + * + * side effects: + * Pointer to relocation buffer incremented by 2. + */ + +VOID +out_tw(register int n) +{ + if (hilo) { + *txtp++ = hibyte(n); + *txtp++ = lobyte(n); + } else { + *txtp++ = lobyte(n); + *txtp++ = hibyte(n); + } +} + +/*)Function VOID out_t24(n) + * + * int n data word + * + * The function out_t24() outputs the text (T) + * data word as three bytes ordered according to hilo. + * + * local variables: + * int * txtp pointer to txt array + * + * global variables: + * none + * + * functions called: + * int lobyte() asout.c + * int hibyte() asout.c + * + * side effects: + * Pointer to relocation buffer incremented by 3. + */ + +VOID +out_t24(int n) +{ + if (hilo) { + *txtp++ = byte3(n); + *txtp++ = hibyte(n); + *txtp++ = lobyte(n); + } else { + *txtp++ = lobyte(n); + *txtp++ = hibyte(n); + *txtp++ = byte3(n); + } +} + +/*)Function int lobyte(n) + * + * int n data word + * + * The function lobyte() returns the lower byte of + * integer n. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ + +int +lobyte(int n) +{ + return (n&0377); +} + +/*)Function int hibyte(n) + * + * int n data word + * + * The function hibyte() returns the higher byte of + * integer n. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ + +int +hibyte(int n) +{ + return ((n>>8)&0377); +} + +/*)Function int byte3(n) + * + * int n 24 bit data + * + * The function byte3() returns the MSB of the + * 24 bit integer n. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ +int +byte3(int n) +{ + return ((n >> 16) & 0xff); +} + +/* + * JLH: Output relocatable 11 bit jump/call + * + * This function is derived from outrw(), adding the parameter for the + * 11 bit address. This form of address is used only on the 8051 and 8048. + */ +VOID +outr11(register struct expr *esp, int op, int r) +{ + register int n; + + if (pass == 2) { + if (esp->e_flag==0 && esp->e_base.e_ap==NULL) { + /* Absolute destination. + * Listing shows only the address. + */ + out_lw(esp->e_addr,0); + if (oflag) { + outchk(3, 0); + out_tw(esp->e_addr); + *txtp++ = op; + + write_rmode(r); + *relp++ = txtp - txt - 3; + out_rw(0xFFFF); + } + } else { + /* Relocatable destination. Build THREE + * byte output: relocatable word, followed + * by op-code. Linker will combine them. + * Listing shows only the address. + */ + r |= R_WORD | esp->e_rlcf; + out_lw(esp->e_addr,r|R_RELOC); + if (oflag) { + outchk(3, 5); + out_tw(esp->e_addr); + *txtp++ = op; + + if (esp->e_flag) { + n = esp->e_base.e_sp->s_ref; + r |= R_SYM; + } else { + n = esp->e_base.e_ap->a_ref; + } + write_rmode(r); + *relp++ = txtp - txt - 3; + out_rw(n); + } + } + } + dot.s_addr += 2; +} + +/* + * Output relocatable 19 bit jump/call + * + * This function is derived from outrw(), adding the parameter for the + * 19 bit address. This form of address is used only in the DS80C390 + * Flat24 mode. + */ +VOID +outr19(struct expr * esp, int op, int r) +{ + register int n; + + if (pass == 2) { + if (esp->e_flag==0 && esp->e_base.e_ap==NULL) { + /* Absolute destination. + * Listing shows only the address. + */ + out_lw(esp->e_addr,0); + if (oflag) { + outchk(4, 0); + out_t24(esp->e_addr); + *txtp++ = op; + + write_rmode(r); + *relp++ = txtp - txt - 4; + out_rw(0xFFFF); + } + } else { + /* Relocatable destination. Build FOUR + * byte output: relocatable 24-bit entity, followed + * by op-code. Linker will combine them. + * Listing shows only the address. + */ + r |= R_WORD | esp->e_rlcf; + out_l24(esp->e_addr,r|R_RELOC); + if (oflag) { + outchk(4, 5); + out_t24(esp->e_addr); + *txtp++ = op; + + if (esp->e_flag) { + n = esp->e_base.e_sp->s_ref; + r |= R_SYM; + } else { + n = esp->e_base.e_ap->a_ref; + } + write_rmode(r); + *relp++ = txtp - txt - 4; + out_rw(n); + } + } + } + dot.s_addr += 3; +} diff --git a/as/hc08/assubr.c b/as/hc08/assubr.c new file mode 100644 index 0000000..f21c847 --- /dev/null +++ b/as/hc08/assubr.c @@ -0,0 +1,282 @@ +/* assubr.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include +#include "asm.h" + +/*)Module assubr.c + * + * The module assubr.c contains the error + * processing routines. + * + * assubr.c contains the following functions: + * VOID aerr() + * VOID diag() + * VOID err() + * VOID qerr() + * VOID rerr() + * + * assubr.c contains the local array of *error[] + */ + +/*)Function VOID err(c) + * + * int c error type character + * + * The function err() logs the error code character + * suppressing duplicate errors. If the error code + * is 'q' then the parse of the current assembler-source + * text line is terminated. + * + * local variables: + * char * p pointer to the error array + * + * global variables: + * char eb[] array of generated error codes + * + * functions called: + * VOID longjmp() c_library + * + * side effects: + * The error code may be inserted into the + * error code array eb[] or the parse terminated. + */ + +VOID +err(c) +register int c; +{ + register char *p; + + aserr++; + p = eb; + while (p < ep) + if (*p++ == c) + return; + if (p < &eb[NERR]) { + *p++ = c; + ep = p; + } + if (c == 'q') + longjmp(jump_env, -1); +} + +/*)Function VOID diag() + * + * The function diag() prints any error codes and + * the source line number to the stderr output device. + * + * local variables: + * char * p pointer to error code array eb[] + * + * global variables: + * int cfile current source file index + * char eb[] array of generated error codes + * char * ep pointer into error list + * int incfile current include file index + * char incfn[] array of include file names + * int incline[] array of include line numbers + * char srcfn[] array of source file names + * int srcline[] array of source line numbers + * FILE * stderr c_library + * + * functions called: + * int fprintf() c_library + * char * geterr() assubr.c + * + * side effects: + * none + */ + +extern int fatalErrors; + +VOID +diag() +{ + register char *p,*errstr; + + if (eb != ep) { + fatalErrors++; + p = eb; + fprintf(stderr, "?ASxxxx-Error-<"); + while (p < ep) { + fprintf(stderr, "%c", *p++); + } + fprintf(stderr, "> in line "); + if (incfil >= 0) { + fprintf(stderr, "%d", incline[incfil]); + fprintf(stderr, " of %s\n", incfn[incfil]); + } else { + fprintf(stderr, "%d", srcline[cfile]); + fprintf(stderr, " of %s\n", srcfn[cfile]); + } + p = eb; + while (p < ep) { + if ((errstr = geterr(*p++)) != NULL) { + fprintf(stderr, " %s\n", errstr); + } + } + } +} + +/*)Function VOID warnBanner() + * + * The function warnBanner() prints a generic warning message + * header (including the current source file/line) and positions + * the output for a more specific warning message. + * + * It is assumed that the call to warnBanner will be followed with + * a fprintf to stderr (or equivalent) with the specific warning + * text. + * + * local variables: + * none + * + * global variables: + * int cfile current source file index + * int incfile current include file index + * char incfn[] array of include file names + * int incline[] array of include line numbers + * char srcfn[] array of source file names + * int srcline[] array of source line numbers + * FILE * stderr c_library + * + * functions called: + * int fprintf() c_library + * + * side effects: + * none + */ +VOID +warnBanner(void) +{ + fprintf(stderr, "?ASxxxx-Warning in line "); + if (incfil >= 0) { + fprintf(stderr, "%d", incline[incfil]); + fprintf(stderr, " of %s\n", incfn[incfil]); + } else { + fprintf(stderr, "%d", srcline[cfile]); + fprintf(stderr, " of %s\n", srcfn[cfile]); + } + fprintf(stderr, " "); +} + +/*)Functions: VOID aerr() + * VOID qerr() + * VOID rerr() + * + * The functions aerr(), qerr(), and rerr() report their + * respective error type. These are included only for + * convenience. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * VOID err() assubr.c + * + * side effects: + * The appropriate error code is inserted into the + * error array and the parse may be terminated. + */ + +/* + * Note an 'r' error. + */ +VOID +rerr() +{ + err('r'); +} + +/* + * Note an 'a' error. + */ +VOID +aerr() +{ + err('a'); +} + +/* + * Note a 'q' error. + */ +VOID +qerr() +{ + err('q'); +} + +/* + * ASxxxx assembler errors + */ +char *errors[] = { + "<.> use \". = . + \" not \". = \"", + " machine specific addressing or addressing mode error", + " direct page boundary error", + " direct page addressing error", + " .include file error or an .if/.endif mismatch", + " multiple definitions error", + " .org in REL area or directive / mnemonic error", + "

phase error: label location changing between passes 2 and 3", + " missing or improper operators, terminators, or delimiters", + " relocation error", + " undefined symbol encountered during assembly", + NULL +}; + +/*)Function: char *getarr(c) + * + * int c the error code character + * + * The function geterr() scans the list of errors returning the + * error string corresponding to the input error character. + * + * local variables: + * int i error index counter + * + * global variables: + * char *errors[] array of pointers to the + * error strings + * + * functions called: + * none + * + * side effects: + * A pointer to the appropriate + * error code string is returned. + */ +char * +geterr(c) +int c; +{ + int i; + + for (i=0; errors[i]!=NULL; i++) { + if (c == errors[i][1]) { + return(errors[i]); + } + } + return(NULL); +} + diff --git a/as/hc08/clean.mk b/as/hc08/clean.mk new file mode 100644 index 0000000..78a6753 --- /dev/null +++ b/as/hc08/clean.mk @@ -0,0 +1,23 @@ +# Deleting all files created by building the program +# -------------------------------------------------- +include $(top_builddir)/Makefile.common + +clean: mostlyclean + rm -f *.dep + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f Makefile + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + rm -f $(top_builddir)/bin/as-hc08$(EXEEXT) as-hc08$(EXEEXT) + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean diff --git a/as/hc08/conf.mk b/as/hc08/conf.mk new file mode 100644 index 0000000..ac65f24 --- /dev/null +++ b/as/hc08/conf.mk @@ -0,0 +1,10 @@ +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_builddir) && $(SHELL) ./config.status + +# End of conf.mk diff --git a/as/hc08/m08adr.c b/as/hc08/m08adr.c new file mode 100644 index 0000000..1f0821c --- /dev/null +++ b/as/hc08/m08adr.c @@ -0,0 +1,212 @@ +/* m08adr.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include "asm.h" +#include "m6808.h" + +int +addr(esp) +register struct expr *esp; +{ + register int c; + register struct area *espa; + register Addr_T espv; + const char *tcp; + + if ((c = getnb()) == '#') { + expr(esp, 0); + esp->e_mode = S_IMMED; + } else if (c == ',') { + switch(admode(axs)) { + default: + aerr(); + + case S_X: + c = S_IX; + break; + + case S_S: + c = S_IS; + break; + + case S_XP: + c = S_IXP; + break; + } + esp->e_mode = c; + } else if (c == '*') { + expr(esp, 0); + esp->e_mode = S_DIR; + if (esp->e_addr & ~0xFF) + err('d'); + if (more()) { + comma(); + tcp = ip; + switch(admode(axs)) { + case S_X: + esp->e_mode = S_IX1; + break; + + case S_S: + esp->e_mode = S_SP1; + break; + + case S_XP: + esp->e_mode = S_IX1P; + break; + + default: + ip = --tcp; + } + } + } else { + unget(c); + if ((esp->e_mode = admode(axs)) != 0) { + ; + } else { + expr(esp, 0); + espa = esp->e_base.e_ap; + espv = esp->e_addr; + if (more()) { + comma(); + c = admode(axs); + if (esp->e_flag == 0 && + espa == NULL && + (espv & ~0xFF) == 0) { + switch(c) { + default: + aerr(); + + case S_X: + c = S_IX1; + break; + + case S_S: + c = S_SP1; + break; + + case S_XP: + c = S_IX1P; + break; + } + } else { + switch(c) { + default: + aerr(); + + case S_X: + c = S_IX2; + break; + + case S_S: + c = S_SP2; + break; + + case S_XP: + c = S_IX2P; + break; + } + } + esp->e_mode = c; + } else { + esp->e_mode = S_EXT; + } + } + } + return (esp->e_mode); +} + +/* + * Enter admode() to search a specific addressing mode table + * for a match. Return the addressing value on a match or + * zero for no match. + */ +int +admode(sp) +register struct adsym *sp; +{ + register char *ptr; + register int i; + register const char *ips; + + ips = ip; + unget(getnb()); + + i = 0; + while ( *(ptr = &sp[i].a_str[0]) ) { + if (srch(ptr)) { + return(sp[i].a_val); + } + i++; + } + ip = ips; + return(0); +} + +/* + * srch --- does string match ? + */ +int +srch(str) +register char *str; +{ + register const char *ptr; + ptr = ip; + + while (*ptr && *str) { + if(ccase[*ptr & 0x007F] != ccase[*str & 0x007F]) + break; + ptr++; + str++; + } + if (ccase[*ptr & 0x007F] == ccase[*str & 0x007F]) { + ip = ptr; + return(1); + } + + if (!*str) + if (any(*ptr," \t\n,];")) { + ip = ptr; + return(1); + } + return(0); +} + +/* + * any --- does str contain c? + */ +int +any(c,str) +int c; +char*str; +{ + while (*str) + if(*str++ == c) + return(1); + return(0); +} + +struct adsym axs[] = { /* a, x, or s registers */ + { "a", S_A }, + { "x", S_X }, + { "s", S_S }, + { "x+", S_XP }, + { "", 0x00 } +}; diff --git a/as/hc08/m08ext.c b/as/hc08/m08ext.c new file mode 100644 index 0000000..319fde0 --- /dev/null +++ b/as/hc08/m08ext.c @@ -0,0 +1,26 @@ +/* m08ext.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include "asm.h" +#include "m6808.h" + +char *cpu = "Motorola 68HC08"; +int hilo = 1; +char *dsft = "asm"; diff --git a/as/hc08/m08mch.c b/as/hc08/m08mch.c new file mode 100644 index 0000000..155d10a --- /dev/null +++ b/as/hc08/m08mch.c @@ -0,0 +1,470 @@ +/* m08mch.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include "asm.h" +#include "m6808.h" + +/* + * Process a machine op. + */ +VOID +machine(mp) +struct mne *mp; +{ + register int op, t1, t2, type; + struct expr e1, e2, e3; + Addr_T espv; + struct area *espa; + char id[NCPS]; + int c, v1; + + clrexpr(&e1); + clrexpr(&e2); + clrexpr(&e3); + op = mp->m_valu; + type = mp->m_type; + switch (type) { + + case S_SDP: + espa = NULL; + if (more()) { + expr(&e1, 0); + if (e1.e_flag == 0 && e1.e_base.e_ap == NULL) { + if (e1.e_addr) { + err('b'); + } + } + if ((c = getnb()) == ',') { + getid(id, -1); + espa = alookup(id); + if (espa == NULL) { + err('u'); + } + } else { + unget(c); + } + } + if (espa) { + outdp(espa, &e1); + } else { + outdp(dot.s_area, &e1); + } + lmode = SLIST; + break; + + case S_INH: + outab(op); + break; + + case S_BRA: + expr(&e1, 0); + outab(op); + if (mchpcr(&e1)) { + v1 = e1.e_addr - dot.s_addr - 1; + if ((v1 < -128) || (v1 > 127)) + aerr(); + outab(v1); + } else { + outrb(&e1, R_PCR); + } + if (e1.e_mode != S_USER) + rerr(); + break; + + case S_TYP1: + t1 = addr(&e1); + if (t1 == S_A) { + outab(op+0x10); + break; + } + if (t1 == S_X) { + outab(op+0x20); + break; + } + if (t1 == S_DIR || t1 == S_EXT) { + outab(op); + outrb(&e1, R_PAG0); + break; + } + if (t1 == S_IX) { + outab(op+0x40); + break; + } + if (t1 == S_IX1 || t1 == S_IX2) { + if (chkindx(&e1)) + aerr(); + outab(op+0x30); + outrb(&e1, R_USGN); + break; + } + if (t1 == S_SP1 || t1 == S_SP2) { + if (chkindx(&e1)) + aerr(); + outab(0x9e); + outab(op+0x30); + outrb(&e1, R_USGN); + break; + } + aerr(); + break; + + case S_TYP2: + t1 = addr(&e1); + if (t1 == S_IMMED) { + if ((op == 0xA7) || (op == 0xAC) || + (op == 0xAD) || (op == 0xAF)) + aerr(); + outab(op); + outrb(&e1, 0); + break; + } + if (t1 == S_DIR) { + outab(op+0x10); + outrb(&e1, R_PAG0); + break; + } + if (t1 == S_EXT) { + outab(op+0x20); + outrw(&e1, 0); + break; + } + if (t1 == S_IX) { + outab(op+0x50); + break; + } + if (t1 == S_IX1) { + outab(op+0x40); + outrb(&e1, R_USGN); + break; + } + if (t1 == S_IX2) { + outab(op+0x30); + outrw(&e1, 0); + break; + } + if (t1 == S_SP1) { + if (op == 0xAC || op == 0xAD) + aerr(); + outab(0x9e); + outab(op+0x40); + outrb(&e1, R_USGN); + break; + } + if (t1 == S_SP2) { + if (op == 0xAC || op == 0xAD) + aerr(); + outab(0x9e); + outab(op+0x30); + outrw(&e1, 0); + break; + } + aerr(); + break; + + case S_TYP3: + t1 = addr(&e1); + espv = e1.e_addr; + if (t1 != S_IMMED || espv & ~0x07) + aerr(); + comma(); + t2 = addr(&e2); + if (t2 != S_DIR) + aerr(); + outab(op + 2*(espv&0x07)); + outrb(&e2, R_PAG0); + break; + + case S_TYP4: + t1 = addr(&e1); + espv = e1.e_addr; + if (t1 != S_IMMED || espv & ~0x07) + aerr(); + comma(); + t2 = addr(&e2); + if (t2 != S_DIR) + aerr(); + comma(); + expr(&e3, 0); + outab(op + 2*(espv&0x07)); + outrb(&e2, R_PAG0); + if (mchpcr(&e3)) { + v1 = e3.e_addr - dot.s_addr - 1; + if ((v1 < -128) || (v1 > 127)) + aerr(); + outab(v1); + } else { + outrb(&e3, R_PCR); + } + if (e3.e_mode != S_USER) + rerr(); + break; + + case S_TYPAI: + t1 = addr(&e1); + if (t1 == S_IMMED) { + outab(op); + if (e1.e_flag == 0 && e1.e_base.e_ap == NULL) { + v1 = e1.e_addr; + if ((v1 < -128) || (v1 > 127)) + aerr(); + outab(v1); + } else { + outrb(&e1, 0); + } + break; + } + aerr(); + break; + + case S_TYPHX: + t1 = addr(&e1); + if (t1 == S_IMMED) { + if (op == 0x25) + aerr(); + outab(op); + outrw(&e1, 0); + break; + } + if (t1 == S_DIR || t1 == S_EXT) { + outab(op | 0x10); + outrb(&e1, R_PAG0); + break; + } + aerr(); + break; + + case S_CBEQ: + t1 = addr(&e1); + comma(); + expr(&e2, 0); + if (t1 == S_IMMED) { + outab(op); + outrb(&e1, 0); + } else + if (t1 == S_DIR || t1 == S_EXT) { + outab(op); + outrb(&e1, R_PAG0); + } else + if (t1 == S_IXP) { + outab(op+0x40); + } else + if (t1 == S_IX1P || t1 == S_IX2P) { + if (chkindx(&e1)) + aerr(); + outab(op+0x30); + outrb(&e1, R_USGN); + } else + if (t1 == S_SP1 || t1 == S_SP2) { + if (chkindx(&e1)) + aerr(); + outab(0x9E); + outab(op+0x30); + outrb(&e1, R_USGN); + } else { + aerr(); + break; + } + if (mchpcr(&e2)) { + v1 = e2.e_addr - dot.s_addr - 1; + if ((v1 < -128) || (v1 > 127)) + aerr(); + outab(v1); + } else { + outrb(&e2, R_PCR); + } + if (e2.e_mode != S_USER) + rerr(); + break; + + case S_CQAX: + t1 = addr(&e1); + if (t1 != S_IMMED) + aerr(); + comma(); + expr(&e2, 0); + outab(op); + outrb(&e1, 0); + if (mchpcr(&e2)) { + v1 = e2.e_addr - dot.s_addr - 1; + if ((v1 < -128) || (v1 > 127)) + aerr(); + outab(v1); + } else { + outrb(&e2, R_PCR); + } + if (e2.e_mode != S_USER) + rerr(); + break; + + case S_DBNZ: + t1 = addr(&e1); + comma(); + expr(&e2, 0); + if (t1 == S_DIR || t1 == S_EXT) { + outab(op); + outrb(&e1, R_PAG0); + } else + if (t1 == S_IX) { + outab(op+0x40); + } else + if (t1 == S_IX1 || t1 == S_IX2) { + if (chkindx(&e1)) + aerr(); + outab(op+0x30); + outrb(&e1, R_USGN); + } else + if (t1 == S_SP1 || t1 == S_SP2) { + if (chkindx(&e1)) + aerr(); + outab(0x9E); + outab(op+0x30); + outrb(&e1, R_USGN); + } else { + aerr(); + break; + } + if (mchpcr(&e2)) { + v1 = e2.e_addr - dot.s_addr - 1; + if ((v1 < -128) || (v1 > 127)) + aerr(); + outab(v1); + } else { + outrb(&e2, R_PCR); + } + if (e2.e_mode != S_USER) + rerr(); + break; + + case S_DZAX: + expr(&e1, 0); + outab(op); + if (mchpcr(&e1)) { + v1 = e1.e_addr - dot.s_addr - 1; + if ((v1 < -128) || (v1 > 127)) + aerr(); + outab(v1); + } else { + outrb(&e1, R_PCR); + } + if (e1.e_mode != S_USER) + rerr(); + break; + + case S_MOV: + t1 = addr(&e1); + if (t1 == S_IX1P || t1 == S_IX2P) { + if (chkindx(&e1)) + aerr(); + outab(op+0x10); + outrb(&e1, R_PAG0); + break; + } + comma(); + t2 = addr(&e2); + if (t1 == S_IMMED) { + if (t2 == S_DIR || t2 == S_EXT) { + outab(op+0x20); + outrb(&e1, 0); + outrb(&e2, R_PAG0); + break; + } + } + if (t1 == S_DIR || t1 == S_EXT) { + if (t2 == S_DIR || t2 == S_EXT) { + outab(op); + outrb(&e1, R_PAG0); + outrb(&e2, R_PAG0); + break; + } + } + if (t1 == S_IXP) { + if (t2 == S_DIR || t2 == S_EXT) { + outab(op+0x30); + outrb(&e2, R_PAG0); + break; + } + } + aerr(); + break; + + default: + err('o'); + } +} + +/* + * Check index byte + */ +int +chkindx(exp) +struct expr *exp; +{ + if (exp->e_flag == 0 && exp->e_base.e_ap == NULL) { + if (exp->e_addr & ~0xFF) { + return(1); + } + } + return(0); +} + +/* + * Branch/Jump PCR Mode Check + */ +int +mchpcr(esp) +register struct expr *esp; +{ + if (esp->e_base.e_ap == dot.s_area) { + return(1); + } + if (esp->e_flag==0 && esp->e_base.e_ap==NULL) { + /* + * Absolute Destination + * + * Use the global symbol '.__.ABS.' + * of value zero and force the assembler + * to use this absolute constant as the + * base value for the relocation. + */ + esp->e_flag = 1; + esp->e_base.e_sp = &sym[1]; + } + return(0); +} + +/* + * The next character must be a + * comma. + */ +int +comma() +{ + if (getnb() != ',') + qerr(); + return(1); +} + +/* + * Machine specific initialization. + */ +VOID +minit() +{ +} diff --git a/as/hc08/m08pst.c b/as/hc08/m08pst.c new file mode 100644 index 0000000..f1caf1b --- /dev/null +++ b/as/hc08/m08pst.c @@ -0,0 +1,209 @@ +/* m08pst.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include "asm.h" +#include "m6808.h" + +struct mne mne[] = { + + /* machine */ + + { NULL, ".setdp", S_SDP, 0, 0 }, + + /* system */ + + { NULL, "CON", S_ATYP, 0, A_CON }, + { NULL, "OVR", S_ATYP, 0, A_OVR }, + { NULL, "REL", S_ATYP, 0, A_REL }, + { NULL, "ABS", S_ATYP, 0, A_ABS }, + { NULL, "NOPAG", S_ATYP, 0, A_NOPAG }, + { NULL, "PAG", S_ATYP, 0, A_PAG }, + { NULL, "CODE", S_ATYP, 0, A_CODE }, + { NULL, "DATA", S_ATYP, 0, A_DATA }, + { NULL, "LOAD", S_ATYP, 0, A_LOAD }, + { NULL, "NOLOAD", S_ATYP, 0, A_NOLOAD }, + + { NULL, ".uleb128", S_ULEB128, 0, 0 }, + { NULL, ".sleb128", S_SLEB128, 0, 0 }, + { NULL, ".byte", S_BYTE, 0, 1 }, + { NULL, ".db", S_BYTE, 0, 1 }, + { NULL, ".word", S_WORD, 0, 2 }, + { NULL, ".dw", S_WORD, 0, 2 }, + { NULL, ".ascii", S_ASCII, 0, 0 }, + { NULL, ".asciz", S_ASCIZ, 0, 0 }, + { NULL, ".blkb", S_BLK, 0, 1 }, + { NULL, ".ds", S_BLK, 0, 1 }, + { NULL, ".blkw", S_BLK, 0, 2 }, + { NULL, ".page", S_PAGE, 0, 0 }, + { NULL, ".title", S_TITLE, 0, 0 }, + { NULL, ".sbttl", S_SBTL, 0, 0 }, + { NULL, ".globl", S_GLOBL, 0, 0 }, + { NULL, ".area", S_DAREA, 0, 0 }, + { NULL, ".even", S_EVEN, 0, 0 }, + { NULL, ".odd", S_ODD, 0, 0 }, + { NULL, ".if", S_IF, 0, 0 }, + { NULL, ".else", S_ELSE, 0, 0 }, + { NULL, ".endif", S_ENDIF, 0, 0 }, + { NULL, ".include", S_INCL, 0, 0 }, + { NULL, ".radix", S_RADIX, 0, 0 }, + { NULL, ".org", S_ORG, 0, 0 }, + { NULL, ".module", S_MODUL, 0, 0 }, + { NULL, ".ascis", S_ASCIS, 0, 0 }, + { NULL, ".optsdcc", S_OPTSDCC, 0, 0}, +// { NULL, ".assume", S_ERROR, 0, 0 }, +// { NULL, ".error", S_ERROR, 0, 1 }, + + /* 68HC08 */ + + { NULL, "neg", S_TYP1, 0, 0x30 }, + { NULL, "com", S_TYP1, 0, 0x33 }, + { NULL, "lsr", S_TYP1, 0, 0x34 }, + { NULL, "ror", S_TYP1, 0, 0x36 }, + { NULL, "asr", S_TYP1, 0, 0x37 }, + { NULL, "asl", S_TYP1, 0, 0x38 }, + { NULL, "lsl", S_TYP1, 0, 0x38 }, + { NULL, "rol", S_TYP1, 0, 0x39 }, + { NULL, "dec", S_TYP1, 0, 0x3A }, + { NULL, "inc", S_TYP1, 0, 0x3C }, + { NULL, "tst", S_TYP1, 0, 0x3D }, + { NULL, "clr", S_TYP1, 0, 0x3F }, + + { NULL, "sub", S_TYP2, 0, 0xA0 }, + { NULL, "cmp", S_TYP2, 0, 0xA1 }, + { NULL, "sbc", S_TYP2, 0, 0xA2 }, + { NULL, "cpx", S_TYP2, 0, 0xA3 }, + { NULL, "and", S_TYP2, 0, 0xA4 }, + { NULL, "bit", S_TYP2, 0, 0xA5 }, + { NULL, "lda", S_TYP2, 0, 0xA6 }, + { NULL, "sta", S_TYP2, 0, 0xA7 }, + { NULL, "eor", S_TYP2, 0, 0xA8 }, + { NULL, "adc", S_TYP2, 0, 0xA9 }, + { NULL, "ora", S_TYP2, 0, 0xAA }, + { NULL, "add", S_TYP2, 0, 0xAB }, + { NULL, "jmp", S_TYP2, 0, 0xAC }, + { NULL, "jsr", S_TYP2, 0, 0xAD }, + { NULL, "ldx", S_TYP2, 0, 0xAE }, + { NULL, "stx", S_TYP2, 0, 0xAF }, + + { NULL, "bset", S_TYP3, 0, 0x10 }, + { NULL, "bclr", S_TYP3, 0, 0x11 }, + + { NULL, "brset", S_TYP4, 0, 0x00 }, + { NULL, "brclr", S_TYP4, 0, 0x01 }, + + { NULL, "ais", S_TYPAI, 0, 0xA7 }, + { NULL, "aix", S_TYPAI, 0, 0xAF }, + + { NULL, "sthx", S_TYPHX, 0, 0x25 }, + { NULL, "ldhx", S_TYPHX, 0, 0x45 }, + { NULL, "cphx", S_TYPHX, 0, 0x65 }, + + { NULL, "cbeq", S_CBEQ, 0, 0x31 }, + { NULL, "cbeqa", S_CQAX, 0, 0x41 }, + { NULL, "cbeqx", S_CQAX, 0, 0x51 }, + + { NULL, "dbnz", S_DBNZ, 0, 0x3B }, + { NULL, "dbnza", S_DZAX, 0, 0x4B }, + { NULL, "dbnzx", S_DZAX, 0, 0x5B }, + + { NULL, "mov", S_MOV, 0, 0x4E }, + + { NULL, "bra", S_BRA, 0, 0x20 }, + { NULL, "brn", S_BRA, 0, 0x21 }, + { NULL, "bhi", S_BRA, 0, 0x22 }, + { NULL, "bls", S_BRA, 0, 0x23 }, + { NULL, "bcc", S_BRA, 0, 0x24 }, + { NULL, "bhs", S_BRA, 0, 0x24 }, + { NULL, "bcs", S_BRA, 0, 0x25 }, + { NULL, "blo", S_BRA, 0, 0x25 }, + { NULL, "bne", S_BRA, 0, 0x26 }, + { NULL, "beq", S_BRA, 0, 0x27 }, + { NULL, "bhcc", S_BRA, 0, 0x28 }, + { NULL, "bhcs", S_BRA, 0, 0x29 }, + { NULL, "bpl", S_BRA, 0, 0x2A }, + { NULL, "bmi", S_BRA, 0, 0x2B }, + { NULL, "bmc", S_BRA, 0, 0x2C }, + { NULL, "bms", S_BRA, 0, 0x2D }, + { NULL, "bil", S_BRA, 0, 0x2E }, + { NULL, "bih", S_BRA, 0, 0x2F }, + { NULL, "bge", S_BRA, 0, 0x90 }, + { NULL, "blt", S_BRA, 0, 0x91 }, + { NULL, "bgt", S_BRA, 0, 0x92 }, + { NULL, "ble", S_BRA, 0, 0x93 }, + { NULL, "bsr", S_BRA, 0, 0xAD }, + + { NULL, "nega", S_INH, 0, 0x40 }, + { NULL, "mul", S_INH, 0, 0x42 }, + { NULL, "coma", S_INH, 0, 0x43 }, + { NULL, "lsra", S_INH, 0, 0x44 }, + { NULL, "rora", S_INH, 0, 0x46 }, + { NULL, "asra", S_INH, 0, 0x47 }, + { NULL, "asla", S_INH, 0, 0x48 }, + { NULL, "lsla", S_INH, 0, 0x48 }, + { NULL, "rola", S_INH, 0, 0x49 }, + { NULL, "deca", S_INH, 0, 0x4A }, + { NULL, "inca", S_INH, 0, 0x4C }, + { NULL, "tsta", S_INH, 0, 0x4D }, + { NULL, "clra", S_INH, 0, 0x4F }, + + { NULL, "negx", S_INH, 0, 0x50 }, + { NULL, "div", S_INH, 0, 0x52 }, + { NULL, "comx", S_INH, 0, 0x53 }, + { NULL, "lsrx", S_INH, 0, 0x54 }, + { NULL, "rorx", S_INH, 0, 0x56 }, + { NULL, "asrx", S_INH, 0, 0x57 }, + { NULL, "aslx", S_INH, 0, 0x58 }, + { NULL, "lslx", S_INH, 0, 0x58 }, + { NULL, "rolx", S_INH, 0, 0x59 }, + { NULL, "decx", S_INH, 0, 0x5A }, + { NULL, "incx", S_INH, 0, 0x5C }, + { NULL, "tstx", S_INH, 0, 0x5D }, + { NULL, "clrx", S_INH, 0, 0x5F }, + + { NULL, "nsa", S_INH, 0, 0x62 }, + + { NULL, "daa", S_INH, 0, 0x72 }, + + { NULL, "rti", S_INH, 0, 0x80 }, + { NULL, "rts", S_INH, 0, 0x81 }, + { NULL, "swi", S_INH, 0, 0x83 }, + { NULL, "tap", S_INH, 0, 0x84 }, + { NULL, "tpa", S_INH, 0, 0x85 }, + { NULL, "pula", S_INH, 0, 0x86 }, + { NULL, "psha", S_INH, 0, 0x87 }, + { NULL, "pulx", S_INH, 0, 0x88 }, + { NULL, "pshx", S_INH, 0, 0x89 }, + { NULL, "pulh", S_INH, 0, 0x8A }, + { NULL, "pshh", S_INH, 0, 0x8B }, + { NULL, "clrh", S_INH, 0, 0x8C }, + { NULL, "stop", S_INH, 0, 0x8E }, + { NULL, "wait", S_INH, 0, 0x8F }, + + { NULL, "txs", S_INH, 0, 0x94 }, + { NULL, "tsx", S_INH, 0, 0x95 }, + { NULL, "tax", S_INH, 0, 0x97 }, + { NULL, "clc", S_INH, 0, 0x98 }, + { NULL, "sec", S_INH, 0, 0x99 }, + { NULL, "cli", S_INH, 0, 0x9A }, + { NULL, "sei", S_INH, 0, 0x9B }, + { NULL, "rsp", S_INH, 0, 0x9C }, + { NULL, "nop", S_INH, 0, 0x9D }, + { NULL, "txa", S_INH, S_END, 0x9F } +}; diff --git a/as/hc08/m6808.h b/as/hc08/m6808.h new file mode 100644 index 0000000..397e6ab --- /dev/null +++ b/as/hc08/m6808.h @@ -0,0 +1,126 @@ +/* m6808.h + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/*)BUILD + $(PROGRAM) = AS6808 + $(INCLUDE) = { + ASM.H + M6808.H + } + $(FILES) = { + M08EXT.C + M08MCH.C + M08ADR.C + M08PST.C + ASMAIN.C + ASLEX.C + ASSYM.C + ASSUBR.C + ASEXPR.C + ASDATA.C + ASLIST.C + ASOUT.C + } + $(STACK) = 3000 +*/ + +struct adsym +{ + char a_str[4]; /* addressing string */ + int a_val; /* addressing mode value */ +}; + +/* + * Addressing types + */ +#define S_IMMED 30 +#define S_DIR 31 +#define S_EXT 32 +#define S_IX 33 +#define S_IXP 34 +#define S_IX1 35 +#define S_IX1P 36 +#define S_IX2 37 +#define S_IX2P 38 +#define S_IS 39 +#define S_SP1 40 +#define S_SP2 41 +#define S_A 42 +#define S_X 43 +#define S_S 44 +#define S_XP 45 + +/* + * Instruction types + */ +#define S_INH 60 +#define S_BRA 61 +#define S_TYP1 62 +#define S_TYP2 63 +#define S_TYP3 64 +#define S_TYP4 65 +#define S_TYPAI 66 +#define S_TYPHX 67 +#define S_CBEQ 68 +#define S_CQAX 69 +#define S_DBNZ 70 +#define S_DZAX 71 +#define S_MOV 72 + +/* + * Set Direct Pointer + */ +#define S_SDP 80 + + + /* machine dependent functions */ + +#ifdef OTHERSYSTEM + + /* m08adr.c */ +extern struct adsym axs[]; +extern int addr(struct expr *esp); +extern int admode(struct adsym *sp); +extern int any(int c, char *str); +extern int srch(char *str); + + /* m08mch.c */ +extern VOID machine(struct mne *mp); +extern int chkindx(struct expr *exp); +extern int mchpcr(struct expr *esp); +extern VOID minit(void); +extern int comma(void); + +#else + + /* m08adr.c */ +extern struct adsym axs[]; +extern int addr(); +extern int admode(); +extern int any(); +extern int srch(); + + /* m08mch.c */ +extern VOID machine(); +extern int chkindx(); +extern int mchpcr(); +extern VOID minit(); +extern int comma(); + +#endif + diff --git a/as/link/Makefile.in b/as/link/Makefile.in new file mode 100644 index 0000000..ae52990 --- /dev/null +++ b/as/link/Makefile.in @@ -0,0 +1,21 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ + +include $(top_builddir)/Makefile.common + +PORTS = z80 gbz80 + +all: + $(MAKE) -C z80 _link-z80 _link-gbz80 E=$(E) BUILDDIR=../../../bin/ + +install: all + $(INSTALL) $(top_builddir)/bin/link-z80$(EXEEXT) `echo $(DESTDIR)$(bindir)/link-z80$(EXEEXT)|sed '$(transform)'` + $(STRIP) `echo $(DESTDIR)$(bindir)/link-z80$(EXEEXT)|sed '$(transform)'` + $(INSTALL) $(top_builddir)/bin/link-gbz80$(EXEEXT) `echo $(DESTDIR)$(bindir)/link-gbz80$(EXEEXT)|sed '$(transform)'` + $(STRIP) `echo $(DESTDIR)$(bindir)/link-gbz80$(EXEEXT)|sed '$(transform)'` + +uninstall: + cd $(DESTDIR)$(bindir); rm -f link-z80$(EXEEXT) link-gbz80$(EXEEXT) + +include $(srcdir)/clean.mk diff --git a/as/link/README b/as/link/README new file mode 100644 index 0000000..5aba86d --- /dev/null +++ b/as/link/README @@ -0,0 +1,8 @@ +sdcc/link +--------- + +In gbdk the linker and assembler were split into seperate packages. + +For now I'm keeping that split, and leaving the mcs51 version as is. + +-- Michael diff --git a/as/link/aslink.h b/as/link/aslink.h new file mode 100644 index 0000000..ff45b46 --- /dev/null +++ b/as/link/aslink.h @@ -0,0 +1,857 @@ +/* aslink.h + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* 28-Oct-97 JLH: + * - add proto for StoreString + * - change s_id from [NCPS] to pointer + * - change NCPS to 80 + * - case sensitive + * - add R_J11 for 8051 assembler + * 31-Oct-97 JLH: + * - add jflag and jfp for NoICE output + * 30-Jan-98 JLH: + * - add memory space flags to a_flag for 8051 + * + * Extensions: P. Felber + */ + +#define VERSION "V01.75 + NoICE + SDCC Feb 1999" + +/* + * Case Sensitivity Flag + */ +#define CASE_SENSITIVE 1 + +/*)Module asmlnk.h + * + * The module asmlnk.h contains the definitions for constants, + * structures, global variables, and LKxxxx functions + * contained in the LKxxxx.c files. + */ + +/*)BUILD + $(PROGRAM) = ASLINK + $(INCLUDE) = ASLINK.H + $(FILES) = { + LKMAIN.C + LKLEX.C + LKAREA.C + LKHEAD.C + LKSYM.C + LKEVAL.C + LKDATA.C + LKLIST.C + LKRLOC.C + LKLIBR.C + LKS19.C + LKIHX.C + } + $(STACK) = 2000 +*/ + +#if defined decus +/* DECUS C void definition */ +/* File/extension seperator */ + +#define VOID char +#define FSEPX '.' + +#elif defined PDOS +/* PDOS C void definition */ +/* File/extension seperator */ + +#define VOID char +#define FSEPX ':' + +#elif defined UNIX +/* UNIX void definition */ +/* File/extension seperator */ + +#define VOID void +#define FSEPX '.' +#define LKDIRSEP '/' +#define LKDIRSEPSTR "/" +#define OTHERSYSTEM + +#else +/* DOS/WINDOWS void definition */ +/* File/extension seperator */ + +#define VOID void +#define FSEPX '.' +#define LKDIRSEP '\\' +#define LKDIRSEPSTR "\\" +#define OTHERSYSTEM + +#endif + +/* + * PATH_MAX + */ +#include +#ifndef PATH_MAX /* POSIX, but not required */ + #if defined(__BORLANDC__) || defined(_MSC_VER) + #include + #define PATH_MAX _MAX_PATH + #else + #define PATH_MAX 255 /* define a reasonable value */ + #endif +#endif + +#ifdef SDK + #define LKOBJEXT "o" +#else /* SDK */ + #define LKOBJEXT "rel" +#endif /* SDK */ + +/* + * This file defines the format of the + * relocatable binary file. + */ + +#define NCPS 80 /* characters per symbol (JLH: change from 8) */ +#define NDATA 16 /* actual data */ +#define NINPUT PATH_MAX /* Input buffer size */ +#define NHASH 64 /* Buckets in hash table */ +#define HMASK 077 /* Hash mask */ +#define NLPP 60 /* Lines per page */ +#define NTXT 16 /* T values */ + +/* + * The "R_" relocation constants define values used in + * generating the assembler relocation output data for + * areas, symbols, and code. + * + * + * Relocation types. + * + * 7 6 5 4 3 2 1 0 + * +-----+-----+-----+-----+-----+-----+-----+-----+ + * | MSB | PAGn| PAG0| USGN| BYT2| PCR | SYM | BYT | + * +-----+-----+-----+-----+-----+-----+-----+-----+ + */ + +#define R_WORD 0x00 /* 16 bit */ +#define R_BYTE 0x01 /* 8 bit */ + +#define R_AREA 0x00 /* Base type */ +#define R_SYM 0x02 + +#define R_NORM 0x00 /* PC adjust */ +#define R_PCR 0x04 + +#define R_BYT1 0x00 /* Byte count for R_BYTE = 1 */ +#define R_BYT2 0x08 /* Byte count for R_BYTE = 2 */ + +#define R_SGND 0x00 /* Signed Byte */ +#define R_USGN 0x10 /* Unsigned Byte */ + +#define R_NOPAG 0x00 /* Page Mode */ +#define R_PAG0 0x20 /* Page '0' */ +#define R_PAG 0x40 /* Page 'nnn' */ + +#define R_LSB 0x00 /* low byte */ +#define R_MSB 0x80 /* high byte */ + +#define R_BYT3 0x100 /* if R_BYTE is set, this is a + * 3 byte address, of which + * the linker must select one byte. + */ +#define R_HIB 0x200 /* If R_BYTE & R_BYT3 are set, linker + * will select byte 3 of the relocated + * 24 bit address. + */ + +#define R_BIT 0x400 /* Linker will convert from byte-addressable + * space to bit-addressable space. + */ + +#define R_J11 (R_WORD|R_BYT2) /* JLH: 11 bit JMP and CALL (8051) */ +#define R_J19 (R_WORD|R_BYT2|R_MSB) /* 19 bit JMP/CALL (DS80C390) */ +#define R_C24 (R_WORD|R_BYT1|R_MSB) /* 24 bit address (DS80C390) */ +#define R_J19_MASK (R_BYTE|R_BYT2|R_MSB) + +#define IS_R_J19(x) (((x) & R_J19_MASK) == R_J19) +#define IS_R_J11(x) (((x) & R_J19_MASK) == R_J11) +#define IS_C24(x) (((x) & R_J19_MASK) == R_C24) + +#define R_ESCAPE_MASK 0xf0 /* Used to escape relocation modes + * greater than 0xff in the .rel + * file. + */ + +/* + * Global symbol types. + */ +#define S_REF 1 /* referenced */ +#define S_DEF 2 /* defined */ + +/* + * Area type flags + */ +#define A_CON 0000 /* concatenate */ +#define A_OVR 0004 /* overlay */ +#define A_REL 0000 /* relocatable */ +#define A_ABS 0010 /* absolute */ +#define A_NOPAG 0000 /* non-paged */ +#define A_PAG 0020 /* paged */ + +/* Additional flags for 8051 address spaces */ +#define A_DATA 0000 /* data space (default)*/ +#define A_CODE 0040 /* code space */ +#define A_XDATA 0100 /* external data space */ +#define A_BIT 0200 /* bit addressable space */ + +/* Additional flags for hc08 */ +#define A_NOLOAD 0400 /* nonloadable */ +#define A_LOAD 0000 /* loadable (default) */ + +/* + * File types + */ +#define F_INV 0 /* invalid */ +#define F_STD 1 /* stdin */ +#define F_LNK 2 /* File.lnk */ +#define F_REL 3 /* File.rel */ +#define F_CMD 4 /* Command line */ + +#ifdef GAMEBOY +/* + * Multiple banks support + */ +extern int nb_rom_banks; +extern int nb_ram_banks; +extern int current_rom_bank; +extern int mbc_type; +extern char cart_name[]; +/* + * ROM patching support + */ +typedef struct _patch { + unsigned int addr; + unsigned char value; + struct _patch *next; +} patch; +extern patch* patches; +#endif /* GAMEBOY */ + +/* + * General assembler address type + */ +typedef unsigned int Addr_T; + +/* + * The structures of head, area, areax, and sym are created + * as the REL files are read during the first pass of the + * linker. The struct head is created upon encountering a + * H directive in the REL file. The structure contains a + * link to a link file structure (struct lfile) which describes + * the file containing the H directive, the number of data/code + * areas contained in this header segment, the number of + * symbols referenced/defined in this header segment, a pointer + * to an array of pointers to areax structures (struct areax) + * created as each A directive is read, and a pointer to an + * array of pointers to symbol structures (struct sym) for + * all referenced/defined symbols. As H directives are read + * from the REL files a linked list of head structures is + * created by placing a link to the new head structure + * in the previous head structure. + */ +struct head +{ + struct head *h_hp; /* Header link */ + struct lfile *h_lfile;/* Associated file */ + int h_narea; /* # of areas */ + struct areax **a_list; /* Area list */ + int h_nglob; /* # of global symbols */ + struct sym **s_list; /* Globle symbol list */ + char m_id[NCPS]; /* Module name */ +}; + +/* + * A structure area is created for each 'unique' data/code + * area definition found as the REL files are read. The + * struct area contains the name of the area, a flag byte + * which contains the area attributes (REL/CON/OVR/ABS), + * an area subtype (not used in this assembler), and the + * area base address and total size which will be filled + * in at the end of the first pass through the REL files. + * As A directives are read from the REL files a linked + * list of unique area structures is created by placing a + * link to the new area structure in the previous area structure. + */ +struct area +{ + struct area *a_ap; /* Area link */ + struct areax *a_axp; /* Area extension link */ + Addr_T a_addr; /* Beginning address of area */ + Addr_T a_size; /* Total size of the area */ + Addr_T a_unaloc; /* Total number of unallocated bytes, for error reporting */ + char a_type; /* Area subtype */ + int a_flag; /* Flag byte */ + char a_id[NCPS]; /* Name */ + char *a_image; /* Something for hc08/lkelf */ + char *a_used; /* Something for hc08/lkelf */ +}; + +/* + * An areax structure is created for every A directive found + * while reading the REL files. The struct areax contains a + * link to the 'unique' area structure referenced by the A + * directive and to the head structure this area segment is + * a part of. The size of this area segment as read from the + * A directive is placed in the areax structure. The beginning + * address of this segment will be filled in at the end of the + * first pass through the REL files. As A directives are read + * from the REL files a linked list of areax structures is + * created for each unique area. The final areax linked + * list has at its head the 'unique' area structure linked + * to the linked areax structures (one areax structure for + * each A directive for this area). + */ +struct areax +{ + struct areax *a_axp; /* Area extension link */ + struct area *a_bap; /* Base area link */ + struct head *a_bhp; /* Base header link */ + Addr_T a_addr; /* Beginning address of section */ + Addr_T a_size; /* Size of the area in section */ +}; + +/* + * A sym structure is created for every unique symbol + * referenced/defined while reading the REL files. The + * struct sym contains the symbol's name, a flag value + * (not used in this linker), a symbol type denoting + * referenced/defined, and an address which is loaded + * with the relative address within the area in which + * the symbol was defined. The sym structure also + * contains a link to the area where the symbol was defined. + * The sym structures are linked into linked lists using + * the symbol link element. + */ +struct sym +{ + struct sym *s_sp; /* Symbol link */ + struct areax *s_axp; /* Symbol area link */ + char s_type; /* Symbol subtype */ + char s_flag; /* Flag byte */ + Addr_T s_addr; /* Address */ + char *s_id; /* Name: JLH change from [NCPS] */ +}; + +/* + * The structure lfile contains a pointer to a + * file specification string, the file type, and + * a link to the next lfile structure. + */ +struct lfile +{ + struct lfile *f_flp; /* lfile link */ + int f_type; /* File type */ + char *f_idp; /* Pointer to file spec */ +}; + +/* + * The struct base contains a pointer to a + * base definition string and a link to the next + * base structure. + */ +struct base +{ + struct base *b_base; /* Base link */ + char *b_strp; /* String pointer */ +}; + +/* + * The struct globl contains a pointer to a + * global definition string and a link to the next + * global structure. + */ +struct globl +{ + struct globl *g_globl; /* Global link */ + char *g_strp; /* String pointer */ +}; + +/* + * A structure sdp is created for each 'unique' paged + * area definition found as the REL files are read. + * As P directives are read from the REL files a linked + * list of unique sdp structures is created by placing a + * link to the new sdp structure in the previous area structure. + */ +struct sdp +{ + struct area *s_area; /* Paged Area link */ + struct areax *s_areax; /* Paged Area Extension Link */ + Addr_T s_addr; /* Page address offset */ +}; + +/* + * The structure rerr is loaded with the information + * required to report an error during the linking + * process. The structure contains an index value + * which selects the areax structure from the header + * areax structure list, a mode value which selects + * symbol or area relocation, the base address in the + * area section, an area/symbol list index value, and + * an area/symbol offset value. + */ +struct rerr +{ + int aindex; /* Linking area */ + int mode; /* Relocation mode */ + Addr_T rtbase; /* Base address in section */ + int rindex; /* Area/Symbol reloaction index */ + Addr_T rval; /* Area/Symbol offset value */ +}; + +/* + * The structure lbpath is created for each library + * path specification input by the -k option. The + * lbpath structures are linked into a list using + * the next link element. + */ +struct lbpath { + struct lbpath *next; + char *path; +}; + +/* + * The structure lbname is created for all combinations of the + * library path specifications (input by the -k option) and the + * library file specifications (input by the -l option) that + * lead to an existing file. The element path points to + * the path string, element libfil points to the library + * file string, and the element libspc is the concatenation + * of the valid path and libfil strings. + * + * The lbpath structures are linked into a list + * using the next link element. + * + * Each library file contains a list of object files + * that are contained in the particular library. e.g.: + * + * \iolib\termio + * \inilib\termio + * + * Only one specification per line is allowed. + */ +struct lbname { + struct lbname *next; + char *path; + char *libfil; + char *libspc; +}; + +/* + * The function fndsym() searches through all combinations of the + * library path specifications (input by the -k option) and the + * library file specifications (input by the -l option) that + * lead to an existing file for a symbol definition. + * + * The structure lbfile is created for the first library + * object file which contains the definition for the + * specified undefined symbol. + * + * The element libspc points to the library file path specification + * and element relfil points to the object file specification string. + * The element filspc is the complete path/file specification for + * the library file to be imported into the linker. The + * file specicifation may be formed in one of two ways: + * + * (1) If the library file contained an absolute + * path/file specification then this becomes filspc. + * (i.e. C:\...) + * + * (2) If the library file contains a relative path/file + * specification then the concatenation of the path + * and this file specification becomes filspc. + * (i.e. \...) + * + * The lbpath structures are linked into a list + * using the next link element. + */ +struct lbfile { + struct lbfile *next; + char *libspc; + char *relfil; + char *filspc; + long offset; + unsigned int type; +}; + +/* + * External Definitions for all Global Variables + */ + +extern char *_abs_; /* = { ". .ABS." }; + */ +extern int lkerr; /* ASLink error flag + */ +extern char *ip; /* pointer into the REL file + * text line in ib[] + */ +extern char ib[NINPUT]; /* REL file text line + */ +extern char *rp; /* pointer into the LST file + * text line in rb[] + */ +extern char rb[NINPUT]; /* LST file text line being + * address relocated + */ +extern unsigned char ctype[]; /* array of character types, one per + * ASCII character + */ + +extern char sdccopt[NINPUT]; +extern char sdccopt_module[NINPUT]; +extern char curr_module[NINPUT]; + +/* + * Character Type Definitions + */ +#define SPACE 0000 +#define ETC 0000 +#define LETTER 0001 +#define DIGIT 0002 +#define BINOP 0004 +#define RAD2 0010 +#define RAD8 0020 +#define RAD10 0040 +#define RAD16 0100 +#define ILL 0200 + +#define DGT2 DIGIT|RAD16|RAD10|RAD8|RAD2 +#define DGT8 DIGIT|RAD16|RAD10|RAD8 +#define DGT10 DIGIT|RAD16|RAD10 +#define LTR16 LETTER|RAD16 + +#if CASE_SENSITIVE +#else +extern char ccase[]; /* an array of characters which + * perform the case translation function + */ +#endif + +extern struct lfile *filep; /* The pointers (lfile *) filep, + * (lfile *) cfp, and (FILE *) sfp + * are used in conjunction with + * the routine lk_getline() to read + * asmlnk commands from + * (1) the standard input or + * (2) or a command file + * and to read the REL files + * sequentially as defined by the + * asmlnk input commands. + * + * The pointer *filep points to the + * beginning of a linked list of + * lfile structures. + */ +extern struct lfile *cfp; /* The pointer *cfp points to the + * current lfile structure + */ +extern struct lfile *startp;/* asmlnk startup file structure + */ +extern struct lfile *linkp; /* pointer to first lfile structure + * containing an input REL file + * specification + */ +extern struct lfile *lfp; /* pointer to current lfile structure + * being processed by parse() + */ +extern struct head *headp; /* The pointer to the first + * head structure of a linked list + */ +extern struct head *hp; /* Pointer to the current + * head structure + */ +extern struct area *areap; /* The pointer to the first + * area structure of a linked list + */ +extern struct area *ap; /* Pointer to the current + * area structure + */ +extern struct areax *axp; /* Pointer to the current + * areax structure + */ +extern struct sym *symhash[NHASH]; /* array of pointers to NHASH + * linked symbol lists + */ +extern struct base *basep; /* The pointer to the first + * base structure + */ +extern struct base *bsp; /* Pointer to the current + * base structure + */ +extern struct globl *globlp;/* The pointer to the first + * globl structure + */ +extern struct globl *gsp; /* Pointer to the current + * globl structure + */ +extern struct sdp sdp; /* Base Paged structure + */ +extern struct rerr rerr; /* Structure containing the + * linker error information + */ +extern FILE *ofp; /* Linker Output file handle + */ +extern FILE *mfp; /* Map output file handle + */ +extern FILE *jfp; /* NoICE output file handle + */ +extern FILE *rfp; /* File handle for output + * address relocated ASxxxx + * listing file + */ +extern FILE *sfp; /* The file handle sfp points to the + * currently open file + */ +extern FILE *tfp; /* File handle for input + * ASxxxx listing file + */ +extern FILE *dfp; /* File handle for debug info output + */ +extern int dflag; /* Output debug information flag + */ +extern int oflag; /* Output file type flag + */ +extern int mflag; /* Map output flag + */ +extern int sflag; /* JCF: Memory usage output flag + */ +extern int packflag; /* Pack data memory flag + */ +extern int stacksize; /* Pack data memory flag + */ +extern int jflag; /* NoICE output flag + */ +extern int symflag; /* no$gmb .sym output flag + */ +extern int xflag; /* Map file radix type flag + */ +extern int pflag; /* print linker command file flag + */ +extern int uflag; /* Listing relocation flag + */ +extern int rflag; /* Extended linear address record flag. + */ +extern int radix; /* current number conversion radix: + * 2 (binary), 8 (octal), 10 (decimal), + * 16 (hexadecimal) + */ +extern int line; /* current line number + */ +extern int page; /* current page number + */ +extern int lop; /* current line number on page + */ +extern int pass; /* linker pass number + */ +extern int rtcnt; /* count of elements in the + * rtval[] and rtflg[] arrays + */ +extern Addr_T rtval[]; /* data associated with relocation + */ +extern int rtflg[]; /* indicates if rtval[] value is + * to be sent to the output file. + * (always set in this linker) + */ +extern int hilo; /* REL file byte ordering + */ +extern int gline; /* LST file relocation active + * for current line + */ +extern int gcntr; /* LST file relocation active + * counter + */ +extern struct lbpath *lbphead; /* pointer to the first + * library path structure + */ +extern struct lbname *lbnhead; /* pointer to the first + * library name structure + */ +extern struct lbfile *lbfhead; /* pointer to the first + * library file structure + */ +extern Addr_T iram_size; /* internal ram size + */ +extern long xram_size; /* external ram size + */ +extern long code_size; /* code size + */ + + +/* C Library function definitions */ +/* for reference only +extern VOID exit(); +extern int fclose(); +extern char * fgets(); +extern FILE * fopen(); +extern int fprintf(); +extern VOID free(); +extern VOID * malloc(); +extern char putc(); +extern char * strcpy(); +extern int strlen(); +extern char * strncpy(); +*/ + +/* Program function definitions */ + +/* lkmain.c */ +extern FILE * afile(); +extern VOID bassav(); +extern VOID gblsav(); +extern VOID iramsav(); +extern VOID xramsav(); +extern VOID codesav(); +extern VOID iramcheck(); +extern VOID link_main(); +extern VOID lkexit(); +extern int main(); +extern VOID map(); +extern VOID sym(); +extern int parse(); +extern VOID setbas(); +extern VOID setgbl(); +extern VOID usage(); +extern VOID copyfile(); + +/* lklex.c */ +extern char endline(); +extern char get(); +extern VOID getfid(); +extern VOID getid(); +extern VOID getSid(char *id); +extern int lk_getline(); +extern int getmap(); +extern char getnb(); +extern int more(); +extern VOID skip(); +extern VOID unget(); +extern VOID chop_crlf(); + +/* lkarea.c */ +extern VOID lkparea(); +extern VOID lnkarea(); +extern VOID lnkarea2(); +extern VOID newarea(); + +/* lkhead.c */ +extern VOID module(); +extern VOID newhead(); + +/* lksym.c */ +extern int hash(); +extern struct sym * lkpsym(); +extern VOID * new(); +extern struct sym * newsym(); +extern VOID symdef(); +extern int symeq(); +extern VOID syminit(); +extern VOID symmod(); +extern Addr_T symval(); + +/* lkeval.c */ +extern int digit(); +extern Addr_T eval(); +extern Addr_T expr(); +extern int oprio(); +extern Addr_T term(); + +/* lklist.c */ +extern int dgt(); +extern VOID lkulist(); +extern VOID lkalist(); +extern VOID lkglist(); +extern VOID lstarea(); +extern VOID newpag(); +extern VOID slew(); + +/* lkrloc.c */ +extern Addr_T adb_b(register Addr_T v, register int i); +extern Addr_T adb_bit(register Addr_T v, register int i); +extern Addr_T adb_hi(Addr_T v, int i); +extern Addr_T adb_lo(Addr_T v, int i); +extern Addr_T adb_24_bit(register Addr_T v, register int i); +extern Addr_T adb_24_hi(Addr_T v, int i); +extern Addr_T adb_24_mid(Addr_T v, int i); +extern Addr_T adb_24_lo(Addr_T v, int i); +extern Addr_T adw_w(register Addr_T v, register int i); +extern Addr_T adw_24(Addr_T v, int i); +extern Addr_T adw_hi(Addr_T v, int i); +extern Addr_T adw_lo(Addr_T v, int i); +extern Addr_T evword(VOID); +extern VOID rele(VOID); +extern VOID reloc(char c); +extern VOID relt(VOID); +extern VOID relr(VOID); +extern VOID relp(VOID); +extern VOID relerr(char *str); +extern char * errmsg[]; +extern VOID errdmp(FILE *fptr, char *str); +extern VOID relerp(char *str); +extern VOID erpdmp(FILE *fptr, char *str); +extern VOID prntval(FILE *fptr, Addr_T v); +extern int lastExtendedAddress; + +/* lklibr.c */ +extern int addfile(); +extern VOID addlib(); +extern VOID addpath(); +extern int fndsym(); +extern VOID library(); +extern VOID loadfile(); +extern VOID search(); + +/* lks19.c */ +extern VOID s19(); + +/* lkihx.c */ +extern VOID ihx(); +extern VOID ihxExtendedLinearAddress(Addr_T); +extern VOID ihxNewArea(); + +/* lkstore.c */ +extern char * StoreString( char *str ); + +/* lknoice.c */ +extern void DefineNoICE( char *name, Addr_T value, int page ); + +/* EEP: lkelf.c */ +extern VOID elf(); + +/* JCF: lkmem.c */ +extern int summary(struct area * xp); +extern int summary2(struct area * xp); + +/* JCF: lkaomf51.c */ +extern void SaveLinkedFilePath(char * filepath); +extern void CreateAOMF51(void); + +/* lkgb.h */ +VOID gb(int in); +VOID gg(int in); + +/* strcmpi.h */ +extern int as_strcmpi(const char *s1, const char *s2); +extern int as_strncmpi(const char *s1, const char *s2, size_t n); diff --git a/as/link/asxxxx_config.h.in b/as/link/asxxxx_config.h.in new file mode 100644 index 0000000..fb4f91d --- /dev/null +++ b/as/link/asxxxx_config.h.in @@ -0,0 +1,20 @@ +#ifndef __ASXXXX_CONFIG_H +#define __ASXXXX_CONFIG_H + +#undef TYPE_BYTE +#undef TYPE_WORD +#undef TYPE_DWORD +#undef TYPE_UBYTE +#undef TYPE_UWORD +#undef TYPE_UDWORD + +#if !defined TYPE_WORD && defined _WIN32 +# define TYPE_BYTE char +# define TYPE_WORD short +# define TYPE_DWORD int +# define TYPE_UBYTE unsigned TYPE_BYTE +# define TYPE_UWORD unsigned TYPE_WORD +# define TYPE_UDWORD unsigned TYPE_DWORD +#endif + +#endif /* __ASXXXX_CONFIG_H */ diff --git a/as/link/clean.mk b/as/link/clean.mk new file mode 100644 index 0000000..f573a00 --- /dev/null +++ b/as/link/clean.mk @@ -0,0 +1,10 @@ +clean: + $(MAKE) -C z80 clean + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + rm -f *.dep + rm -rf obj + +distclean: clean + $(MAKE) -C z80 distclean + rm -f Makefile diff --git a/as/link/getline.c b/as/link/getline.c new file mode 100644 index 0000000..ba208ee --- /dev/null +++ b/as/link/getline.c @@ -0,0 +1,93 @@ +/* + getline.c - read a line from file into a buffer + version 1.0.0, April 25th, 2008 + + Copyright (c) 2008 Borut Razem + + This software is provided 'as-is', without any express or implied + warranty. In no event will the authors be held liable for any damages + arising from the use of this software. + + Permission is granted to anyone to use this software for any purpose, + including commercial applications, and to alter it and redistribute it + freely, subject to the following restrictions: + + 1. The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + 2. Altered source versions must be plainly marked as such, and must not be + misrepresented as being the original software. + 3. This notice may not be removed or altered from any source distribution. + + Borut Razem + borut.razem@siol.net +*/ + +#include "getline.h" + +/******************************************************************************* + + getline + +getline() reads in at most one less than size characters from stream and stores +them into the buffer pointed to by s. Reading stops after an EOF or a newline. +The newline character is not stored into the buffer. A '\0' is stored after the +last character in the buffer. All the characters between size and the newline or +EOF are skipped. + +getline() return s on success, and NULL on error or when end of file occurs +while no characters have been read. + +*******************************************************************************/ + +char * +getline (char *s, int size, FILE * stream) +{ + static char eof_f = 0; + int c = '\0'; + char *s_o; + char prev_c; + + if (eof_f) + { + eof_f = 0; + return NULL; + } + + s_o = s; + --size; /* for null terminator */ + while (size > 0) + { + prev_c = c; + if ((c = getc (stream)) == '\n' || c == EOF) + break; + + if (prev_c == '\r') + { + *s++ = prev_c; + if (--size <= 0) + break; + } + + if (c != '\r') + { + *s++ = c; + --size; + } + } + *s = '\0'; + + while (c != '\n' && c != EOF) + c = getc (stream); + + if (c == EOF) + { + if (s == s_o) + return NULL; + + eof_f = 1; + } + + return s_o; +} diff --git a/as/link/getline.h b/as/link/getline.h new file mode 100644 index 0000000..3877461 --- /dev/null +++ b/as/link/getline.h @@ -0,0 +1,44 @@ +/* + getline.h - read a line from file into a buffer + version 1.0.0, Aprile 25th, 2008 + + Copyright (c) 2008 Borut Razem + + This software is provided 'as-is', without any express or implied + warranty. In no event will the authors be held liable for any damages + arising from the use of this software. + + Permission is granted to anyone to use this software for any purpose, + including commercial applications, and to alter it and redistribute it + freely, subject to the following restrictions: + + 1. The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + 2. Altered source versions must be plainly marked as such, and must not be + misrepresented as being the original software. + 3. This notice may not be removed or altered from any source distribution. + + Borut Razem + borut.razem@siol.net +*/ + + +#ifndef __GETLINE_H +#define __GETLINE_H + +#include + +#ifdef __cplusplus +extern "C" +{ +#endif + + char *getline (char *s, int size, FILE * stream); + +#ifdef __cplusplus +} +#endif + +#endif /* __GETLINE_H */ diff --git a/as/link/hc08/Makefile.aslink b/as/link/hc08/Makefile.aslink new file mode 100644 index 0000000..0aebe56 --- /dev/null +++ b/as/link/hc08/Makefile.aslink @@ -0,0 +1,68 @@ +CC=gcc +LEX=flex +YACC=bison +INCROOT=. +CFLAGS=-ggdb -O2 -I $(INCROOT) +TARGETS=$(SDCCDIR)/bin/aslink +ALLOBJECTS= lkmain.o lkhead.o lkarea.o lkdata.o\ + lkeval.o lklex.o lksym.o lkrloc.o\ + lklibr.o lklist.o lkihx.o lks19.o\ + lkstore.o lknoice.o lkmem.o lkaomf51.o strcmpi.o +all:: $(TARGETS) + +clean:: + rm -f $(TARGETS) $(ALLOBJECTS) + +lkmain.o : lkmain.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkmain.o lkmain.c + +lkhead.o : lkhead.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkhead.o lkhead.c + +lkarea.o : lkarea.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkarea.o lkarea.c + +lkdata.o : lkdata.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkdata.o lkdata.c + +lkeval.o : lkeval.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkeval.o lkeval.c + +lklex.o : lklex.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lklex.o lklex.c + +lksym.o : lksym.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lksym.o lksym.c + +lkrloc.o : lkrloc.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkrloc.o lkrloc.c + +lklibr.o : lklibr.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lklibr.o lklibr.c + +lklist.o : lklist.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lklist.o lklist.c + +lkihx.o : lkihx.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkihx.o lkihx.c + +lks19.o : lks19.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lks19.o lks19.c + +lkstore.o : lkstore.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkstore.o lkstore.c + +lknoice.o : lknoice.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lknoice.o lknoice.c + +strcmpi.o : strcmpi.c strcmpi.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o strcmpi.o strcmpi.c + +lkmem.o : lkmem.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkmem.o lkmem.c + +lkaomf51.o : lkaomf51.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkaomf51.o lkaomf51.c + +$(TARGETS): $(ALLOBJECTS) + $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $(ALLOBJECTS) diff --git a/as/link/hc08/Makefile.bcc b/as/link/hc08/Makefile.bcc new file mode 100644 index 0000000..5775da2 --- /dev/null +++ b/as/link/hc08/Makefile.bcc @@ -0,0 +1,19 @@ +# Makefile for Borland C++ + +PRJDIR = ../.. + +!include $(PRJDIR)/Bcc.inc + +LKOBJECTS = lkmain.obj lkarea.obj lkihx.obj \ + lkrloc.obj lks19.obj lkmem.obj \ + ../lkaomf51.obj ../lkdata.obj \ + ../lkeval.obj ../lkhead.obj ../lklex.obj ../lklibr.obj \ + ../lklist.obj ../lknoice.obj ../lkstore.obj ../lksym.obj \ + ../../asxxsrc/strcmpi.obj + +ASLINK = $(PRJDIR)/bin/aslink.exe + +all: $(ASLINK) + +$(ASLINK): $(LKOBJECTS) + $(CC) $(CFLAGS) -e$@ $(LKOBJECTS) diff --git a/as/link/hc08/Makefile.in b/as/link/hc08/Makefile.in new file mode 100644 index 0000000..c74d260 --- /dev/null +++ b/as/link/hc08/Makefile.in @@ -0,0 +1,140 @@ +# +# +# + +VERSION = @VERSION@ +VERSIONHI = @VERSIONHI@ +VERSIONLO = @VERSIONLO@ +VERSIONP = @VERSIONP@ + +SHELL = /bin/sh +CC = @CC@ +CPP = @CPP@ +INSTALL = @INSTALL@ +STRIP = @STRIP@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +srcdir = @srcdir@ +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @info@ + +EXEEXT = @EXEEXT@ + +VPATH = @srcdir@ + +CPPFLAGS = @CPPFLAGS@ -I.. -I$(srcdir)/.. +CFLAGS = @CFLAGS@ -Wall -DUNIX -I.. -I$(srcdir)/.. +M_OR_MM = @M_OR_MM@ +LDFLAGS = @LDFLAGS@ + +OBJDIR = obj + +ASXXLIB = $(srcdir)/../../asxxsrc + +LKLIB = $(srcdir)/.. + +ASXXLIBSRC = strcmpi.c + +LKLIBSRC = getline.c lkaomf51.c lkar.c lkdata.c lkeval.c \ + lkhead.c lklex.c lklib.c lklibr.c lklist.c \ + lknoice.c lkrel.c lksdcclib.c lkstore.c lksym.c + +SRC = lkmain.c lkarea.c lkihx.c \ + lkrloc.c lks19.c lkelf.c lkmem.c + +LKSOURCES = $(SRC) $(LKLIBSRC:%.c=$(LKLIB)/%.c) $(ASXXLIBSRC:%.c=$(ASXXLIB)/%.c) + +OBJS = $(SRC:%.c=$(OBJDIR)/%.o) +LKOBJS = $(LKLIBSRC:%.c=$(OBJDIR)/%.o) +ASXXLIBOBJS = $(ASXXLIBSRC:%.c=$(OBJDIR)/%.o) +LKOBJECTS = $(OBJS) $(LKOBJS) $(ASXXLIBOBJS) + +ASLINK = $(top_builddir)/bin/link-hc08$(EXEEXT) + +transform = @program_transform_name@ + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf $(ASLINK) +#all: +# echo $(LKSOURCES) + +$(ASLINK): $(LKOBJECTS) + $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $(LKOBJECTS) + +# Compiling and installing everything and running test +# ---------------------------------------------------- +install: all installdirs + $(INSTALL) $(ASLINK) `echo $(DESTDIR)$(bindir)/link-hc08$(EXEEXT)|sed '$(transform)'` + $(STRIP) `echo $(DESTDIR)$(bindir)/link-hc08$(EXEEXT)|sed '$(transform)'` + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(DESTDIR)$(bindir)/link-hc08$(EXEEXT) + + +# Performing self-test +# -------------------- +check: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + $(INSTALL) -d $(DESTDIR)$(bindir) + + +# Creating dependencies +# --------------------- +dep: Makefile.dep + +Makefile.dep: $(LKSOURCES) $(LKLIB)/*.h $(top_builddir)/*.h + $(CPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.c,$^) >Makefile.dep + +ifeq "$(findstring $(MAKECMDGOALS),uninstall check installcheck installdirs \ + clean distclean mostlyclean realclean)" "" + -include Makefile.dep +endif +include $(srcdir)/clean.mk + +# My rules +# -------- +$(OBJDIR)/.stamp: + mkdir -p $(OBJDIR) + touch $(OBJDIR)/.stamp + +$(OBJDIR)/%.o: %.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + +$(OBJDIR)/%.o: $(LKLIB)/%.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + +$(OBJDIR)/%.o: $(ASXXLIB)/%.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" freshconf;\ + fi + +# End of Makefile diff --git a/as/link/hc08/aslink.mak b/as/link/hc08/aslink.mak new file mode 100644 index 0000000..300803d --- /dev/null +++ b/as/link/hc08/aslink.mak @@ -0,0 +1,263 @@ +ORIGIN = Symantec C++ +ORIGIN_VER = Version 7.00 +VERSION = RELEASE + +!IFDEF SUB_DEBUG +DEBUG = $(SUB_DEBUG) +NDEBUG = !$(SUB_DEBUG) +!ELSE +DEBUG = 0 +NDEBUG = 1 +!ENDIF + +PROJ = ASLINK +APPTYPE = DOS EXE +PROJTYPE = EXE + +CC = SC +CPP = SPP +MAKE = SMAKE +RC = RCC +HC = HC31 +ASM = SC +DISASM = OBJ2ASM +LNK = LINK +DLLS = + +HEADERS = ..\linksrc\aslink.h + +DEFFILE = ASLINK.DEF + +!IF $(DEBUG) +OUTPUTDIR = . +CREATEOUTPUTDIR = +TARGETDIR = . +CREATETARGETDIR = + +LIBS = + +CFLAGS = -A -Jm -J -ms -o+time -S -2 -a2 -c +LFLAGS = /PACKF +DEFINES = -D_DEBUG=1 +!ELSE +OUTPUTDIR = . +CREATEOUTPUTDIR = +TARGETDIR = . +CREATETARGETDIR = + +LIBS = + +CFLAGS = -A -Jm -J -ms -o+time -S -2 -a2 -c +LFLAGS = /PACKF +DEFINES = +!ENDIF + +HFLAGS = $(CFLAGS) +MFLAGS = MASTERPROJ=$(PROJ) +LIBFLAGS = /C +RESFLAGS = +DEBUGGERFLAGS = -LOADSYMBOLS +AFLAGS = $(CFLAGS) +HELPFLAGS = + +MODEL = S + +PAR = PROJS BATS OBJS + +RCDEFINES = + +LIBDIRS = + +INCLUDES = -Ic:\asxxxx\linksrc + +INCLUDEDOBJS = + +OBJS = $(OUTPUTDIR)\lkarea.OBJ $(OUTPUTDIR)\lkdata.OBJ $(OUTPUTDIR)\lkeval.OBJ \ + $(OUTPUTDIR)\lkhead.OBJ $(OUTPUTDIR)\lkihx.OBJ $(OUTPUTDIR)\lklex.OBJ $(OUTPUTDIR)\lklibr.OBJ \ + $(OUTPUTDIR)\lklist.OBJ $(OUTPUTDIR)\lkmain.OBJ $(OUTPUTDIR)\lkrloc.OBJ $(OUTPUTDIR)\lks19.OBJ \ + $(OUTPUTDIR)\lksym.OBJ + +RCFILES = + +RESFILES = + +SYMS = + +HELPFILES = + +BATS = + +.SUFFIXES: .C .CP .CPP .CXX .CC .H .HPP .HXX .COM .EXE .DLL .LIB .RTF .DLG .ASM .RES .RC .OBJ + +.C.OBJ: + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$*.obj $*.c + +.CPP.OBJ: + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$*.obj $*.cpp + +.CXX.OBJ: + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$*.obj $*.cxx + +.CC.OBJ: + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$*.obj $*.cc + +.CP.OBJ: + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$*.obj $*.cp + +.H.SYM: + $(CC) $(HFLAGS) $(DEFINES) $(INCLUDES) -HF -o$(*B).sym $*.h + +.HPP.SYM: + $(CC) $(HFLAGS) $(DEFINES) $(INCLUDES) -HF -o$(*B).sym $*.hpp + +.HXX.SYM: + $(CC) $(HFLAGS) $(DEFINES) $(INCLUDES) -HF -o$(*B).sym $*.hxx + +.C.EXP: + $(CPP) $(CFLAGS) $(DEFINES) $(INCLUDES) $*.c -o$*.lst + +.CPP.EXP: + $(CPP) $(CFLAGS) $(DEFINES) $(INCLUDES) $*.cpp -o$*.lst + +.CXX.EXP: + $(CPP) $(CFLAGS) $(DEFINES) $(INCLUDES) $*.cxx -o$*.lst + +.CP.EXP: + $(CPP) $(CFLAGS) $(DEFINES) $(INCLUDES) $*.cp -o$*.lst + +.CC.EXP: + $(CPP) $(CFLAGS) $(DEFINES) $(INCLUDES) $*.cc -o$*.lst + +.ASM.EXP: + $(CPP) $(CFLAGS) $(DEFINES) $(INCLUDES) $*.asm -o$*.lst + +.OBJ.COD: + $(DISASM) $*.OBJ >$*.cod + +.OBJ.EXE: + $(LNK) $(LFLAGS) @$(PROJ).LNK + +.RTF.HLP: + $(HC) $(HELPFLAGS) $*.HPJ + +.ASM.OBJ: + $(ASM) $(AFLAGS) $(DEFINES) $(INCLUDES) -o$*.obj $*.asm + +.RC.RES: + $(RC) $(RCDEFINES) $(RESFLAGS) $(INCLUDES) $*.rc -o$*.res + +.DLG.RES: + echo ^#include "windows.h" >$$$*.rc + echo ^IF EXIST "$*.h" >>$$$*.rc + echo ^#include "$*.h" >>$$$*.rc + echo ^#include "$*.dlg" >>$$$*.rc + $(RC) $(RCDEFINES) $(RESFLAGS) $(INCLUDES) $$$*.rc + -del $*.res + -ren $$$*.res $*.res + + + +all: createdir $(PRECOMPILE) $(SYMS) $(OBJS) $(INCLUDEDOBJS) $(POSTCOMPILE) $(TARGETDIR)\$(PROJ).$(PROJTYPE) $(POSTLINK) _done + +createdir: + $(CREATEOUTPUTDIR) + $(CREATETARGETDIR) + +$(TARGETDIR)\$(PROJ).$(PROJTYPE): $(OBJS) $(INCLUDEDOBJS) $(RCFILES) $(RESFILES) $(HELPFILES) + $(LNK) $(LFLAGS) @$(PROJ).LNK; + -del $(TARGETDIR)\$(PROJ).$(PROJTYPE) + -ren $(TARGETDIR)\$$SCW$$.$(PROJTYPE) $(PROJ).$(PROJTYPE) + -echo $(TARGETDIR)\$(PROJ).$(PROJTYPE) built + +_done: + -echo $(PROJ).$(PROJTYPE) done + +buildall: clean all + + +clean: + -del $(TARGETDIR)\$$SCW$$.$(PROJTYPE) + -del $(TARGETDIR)\$(PROJ).CLE + -del $(OUTPUTDIR)\SCPH.SYM + -del $(OBJS) + +cleanres: + +res: cleanres $(RCFILES) all + + +link: + $(LNK) $(LFLAGS) @$(PROJ).LNK; + -del $(TARGETDIR)\$(PROJ).$(PROJTYPE) + -ren $(TARGETDIR)\$$SCW$$.$(PROJTYPE) $(PROJ).$(PROJTYPE) + + + + +!IF EXIST (ASLINK.dpd) +!INCLUDE ASLINK.dpd +!ENDIF + + + +$(OUTPUTDIR)\lkarea.OBJ: ..\linksrc\lkarea.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lkarea.obj ..\linksrc\lkarea.c + + + +$(OUTPUTDIR)\lkdata.OBJ: ..\linksrc\lkdata.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lkdata.obj ..\linksrc\lkdata.c + + + +$(OUTPUTDIR)\lkeval.OBJ: ..\linksrc\lkeval.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lkeval.obj ..\linksrc\lkeval.c + + + +$(OUTPUTDIR)\lkhead.OBJ: ..\linksrc\lkhead.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lkhead.obj ..\linksrc\lkhead.c + + + +$(OUTPUTDIR)\lkihx.OBJ: ..\linksrc\lkihx.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lkihx.obj ..\linksrc\lkihx.c + + + +$(OUTPUTDIR)\lklex.OBJ: ..\linksrc\lklex.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lklex.obj ..\linksrc\lklex.c + + + +$(OUTPUTDIR)\lklibr.OBJ: ..\linksrc\lklibr.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lklibr.obj ..\linksrc\lklibr.c + + + +$(OUTPUTDIR)\lklist.OBJ: ..\linksrc\lklist.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lklist.obj ..\linksrc\lklist.c + + + +$(OUTPUTDIR)\lkmain.OBJ: ..\linksrc\lkmain.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lkmain.obj ..\linksrc\lkmain.c + + + +$(OUTPUTDIR)\lkrloc.OBJ: ..\linksrc\lkrloc.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lkrloc.obj ..\linksrc\lkrloc.c + + + +$(OUTPUTDIR)\lks19.OBJ: ..\linksrc\lks19.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lks19.obj ..\linksrc\lks19.c + + + +$(OUTPUTDIR)\lksym.OBJ: ..\linksrc\lksym.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lksym.obj ..\linksrc\lksym.c + + + + diff --git a/as/link/hc08/clean.mk b/as/link/hc08/clean.mk new file mode 100644 index 0000000..430d9f0 --- /dev/null +++ b/as/link/hc08/clean.mk @@ -0,0 +1,25 @@ +# Deleting all files created by building the program +# -------------------------------------------------- +include $(top_builddir)/Makefile.common + +clean: + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + rm -f $(top_builddir)/bin/link-hc08$(EXEEXT) link-hc08$(EXEEXT) + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f Makefile *.dep + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean diff --git a/as/link/hc08/conf.mk b/as/link/hc08/conf.mk new file mode 100644 index 0000000..ac65f24 --- /dev/null +++ b/as/link/hc08/conf.mk @@ -0,0 +1,10 @@ +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_builddir) && $(SHELL) ./config.status + +# End of conf.mk diff --git a/as/link/hc08/link_hc08.dsp b/as/link/hc08/link_hc08.dsp new file mode 100644 index 0000000..1099f61 --- /dev/null +++ b/as/link/hc08/link_hc08.dsp @@ -0,0 +1,210 @@ +# Microsoft Developer Studio Project File - Name="link_hc08" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Console Application" 0x0103 + +CFG=link_hc08 - Win32 Debug +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "link_hc08.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "link_hc08.mak" CFG="link_hc08 - Win32 Debug" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "link_hc08 - Win32 Release" (based on "Win32 (x86) Console Application") +!MESSAGE "link_hc08 - Win32 Debug" (based on "Win32 (x86) Console Application") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "link_hc08 - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 0 +# PROP BASE Output_Dir "hc08\Release" +# PROP BASE Intermediate_Dir "hc08\Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 0 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD CPP /nologo /W3 /GX /O2 /I ".." /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /machine:I386 +# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /machine:I386 /out:"..\..\..\bin_vc\link-hc08.exe" + +!ELSEIF "$(CFG)" == "link_hc08 - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "hc08\Debug" +# PROP BASE Intermediate_Dir "hc08\Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /GZ /c +# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /FR /YX /FD /GZ /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /debug /machine:I386 /pdbtype:sept +# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /debug /machine:I386 /out:"..\..\..\bin_vc\link-hc08.exe" /pdbtype:sept + +!ENDIF + +# Begin Target + +# Name "link_hc08 - Win32 Release" +# Name "link_hc08 - Win32 Debug" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=..\getline.c +# End Source File +# Begin Source File + +SOURCE=..\lkaomf51.c +# End Source File +# Begin Source File + +SOURCE=..\lkar.c +# End Source File +# Begin Source File + +SOURCE=.\lkarea.c +# End Source File +# Begin Source File + +SOURCE=..\lkdata.c +# End Source File +# Begin Source File + +SOURCE=.\lkelf.c +# End Source File +# Begin Source File + +SOURCE=..\lkeval.c +# End Source File +# Begin Source File + +SOURCE=..\lkhead.c +# End Source File +# Begin Source File + +SOURCE=.\lkihx.c +# End Source File +# Begin Source File + +SOURCE=..\lklex.c +# End Source File +# Begin Source File + +SOURCE=..\lklib.c +# End Source File +# Begin Source File + +SOURCE=..\lklibr.c +# End Source File +# Begin Source File + +SOURCE=..\lklist.c +# End Source File +# Begin Source File + +SOURCE=.\lkmain.c +# End Source File +# Begin Source File + +SOURCE=.\lkmem.c +# End Source File +# Begin Source File + +SOURCE=..\lknoice.c +# End Source File +# Begin Source File + +SOURCE=..\lkrel.c +# End Source File +# Begin Source File + +SOURCE=.\lkrloc.c +# End Source File +# Begin Source File + +SOURCE=.\lks19.c +# End Source File +# Begin Source File + +SOURCE=..\lksdcclib.c +# End Source File +# Begin Source File + +SOURCE=..\lkstore.c +# End Source File +# Begin Source File + +SOURCE=..\lksym.c +# End Source File +# Begin Source File + +SOURCE=..\..\asxxsrc\strcmpi.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=..\aslink.h +# End Source File +# Begin Source File + +SOURCE=..\asxxxx_config.h +# End Source File +# Begin Source File + +SOURCE=..\getline.h +# End Source File +# Begin Source File + +SOURCE=..\lkar.h +# End Source File +# Begin Source File + +SOURCE=..\lklibr.h +# End Source File +# Begin Source File + +SOURCE=..\lkrel.h +# End Source File +# End Group +# End Target +# End Project diff --git a/as/link/hc08/lkarea.c b/as/link/hc08/lkarea.c new file mode 100644 index 0000000..0f44b0e --- /dev/null +++ b/as/link/hc08/lkarea.c @@ -0,0 +1,651 @@ +/* lkarea.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 3-Nov-97 JLH: + * - change lkparea to use a_type == 0 as "virgin area" flag + * 02-Apr-98 JLH: add code to link 8051 data spaces + */ + +#include +#include +#include "aslink.h" + +/*)Module lkarea.c + * + * The module lkarea.c contains the functions which + * create and link together all area definitions read + * from the .rel file(s). + * + * lkarea.c contains the following functions: + * VOID lnkarea() + * VOID lnksect() + * VOID lkparea() + * VOID newarea() + * + * lkarea.c contains no global variables. + */ + +/*)Function VOID newarea() + * + * The function newarea() creates and/or modifies area + * and areax structures for each A directive read from + * the .rel file(s). The function lkparea() is called + * to find the area structure associated with this name. + * If the area does not yet exist then a new area + * structure is created and linked to any existing + * linked area structures. The area flags are copied + * into the area flag variable. For each occurence of + * an A directive an areax structure is created and + * linked to the areax structures associated with this + * area. The size of this area section is placed into + * the areax structure. The flag value for all subsequent + * area definitions for the same area are compared and + * flagged as an error if they are not identical. + * The areax structure created for every occurence of + * an A directive is loaded with a pointer to the base + * area structure and a pointer to the associated + * head structure. And finally, a pointer to this + * areax structure is loaded into the list of areax + * structures in the head structure. Refer to lkdata.c + * for details of the structures and their linkage. + * + * local variables: + * areax **halp pointer to an array of pointers + * int i counter, loop variable, value + * char id[] id string + * int narea number of areas in this head structure + * areax * taxp pointer to an areax structure + * to areax structures + * + * global variables: + * area *ap Pointer to the current + * area structure + * areax *axp Pointer to the current + * areax structure + * head *hp Pointer to the current + * head structure + * int lkerr error flag + * + * functions called: + * Addr_T eval() lkeval.c + * VOID exit() c_library + * int fprintf() c_library + * VOID getid() lklex.c + * VOID lkparea() lkarea.c + * VOID skip() lklex.c + * + * side effects: + * The area and areax structures are created and + * linked with the appropriate head structures. + * Failure to allocate area or areax structure + * space will terminate the linker. Other internal + * errors most likely caused by corrupted .rel + * files will also terminate the linker. + */ + +/* + * Create an area entry. + * + * A xxxxxx size nnnn flags mm + * | | | + * | | `-- ap->a_flag + * | `------------- axp->a_size + * `------------------------- ap->a_id + * + */ +VOID +newarea() +{ + register int i, narea; + struct areax *taxp; + struct areax **halp; + char id[NCPS]; + + /* + * Create Area entry + */ + getid(id, -1); + lkparea(id); + /* + * Evaluate area size + */ + skip(-1); + axp->a_size = eval(); + /* + * Evaluate flags + */ + skip(-1); + i = 0; + taxp = ap->a_axp; + while (taxp->a_axp) { + ++i; + taxp = taxp->a_axp; + } + if (i == 0) { + ap->a_flag = eval(); + } else { + i = eval(); +/* if (i && (ap->a_flag != i)) { */ +/* fprintf(stderr, "Conflicting flags in area %8s\n", id); */ +/* lkerr++; */ +/* } */ + } + /* + * Evaluate area address + */ + skip(-1); + axp->a_addr = eval(); + /* + * Place pointer in header area list + */ + if (headp == NULL) { + fprintf(stderr, "No header defined\n"); + lkexit(1); + } + narea = hp->h_narea; + halp = hp->a_list; + for (i=0; i < narea ;++i) { + if (halp[i] == NULL) { + halp[i] = taxp; + return; + } + } + fprintf(stderr, "Header area list overflow\n"); + lkexit(1); +} + +/*)Function VOID lkparea(id) + * + * char * id pointer to the area name string + * + * The function lkparea() searches the linked area structures + * for a name match. If the name is not found then an area + * structure is created. An areax structure is created and + * appended to the areax structures linked to the area structure. + * The associated base area and head structure pointers are + * loaded into the areax structure. + * + * local variables: + * area * tap pointer to an area structure + * areax * taxp pointer to an areax structure + * + * global variables: + * area *ap Pointer to the current + * area structure + * area *areap The pointer to the first + * area structure of a linked list + * areax *axp Pointer to the current + * areax structure + * + * functions called: + * VOID * new() lksym() + * char * strcpy() c_library + * int symeq() lksym.c + * + * side effects: + * Area and/or areax structures are created. + * Failure to allocate space for created structures + * will terminate the linker. + */ + +VOID +lkparea(char *id) +{ + register struct area *tap; + register struct areax *taxp; + + ap = areap; + axp = (struct areax *) new (sizeof(struct areax)); + axp->a_addr = -1; /* default: no address yet */ + while (ap) { + if (symeq(id, ap->a_id)) { + taxp = ap->a_axp; + while (taxp->a_axp) + taxp = taxp->a_axp; + taxp->a_axp = axp; + axp->a_bap = ap; + axp->a_bhp = hp; + return; + } + ap = ap->a_ap; + } + ap = (struct area *) new (sizeof(struct area)); + if (areap == NULL) { + areap = ap; + } else { + tap = areap; + while (tap->a_ap) + tap = tap->a_ap; + tap->a_ap = ap; + } + ap->a_axp = axp; + axp->a_bap = ap; + axp->a_bhp = hp; + strncpy(ap->a_id, id, NCPS); + ap->a_addr = 0; +} + +/*)Function VOID lnkarea() + * + * The function lnkarea() resolves all area addresses. + * The function evaluates each area structure (and all + * the associated areax structures) in sequence. The + * linking process supports four (4) possible area types: + * + * ABS/OVR - All sections (each individual areax + * section) starts at the identical base + * area address overlaying all other + * areax sections for this area. The + * size of the area is largest of the area + * sections. + * + * ABS/CON - All sections (each individual areax + * section) are concatenated with the + * first section starting at the base + * area address. The size of the area + * is the sum of the section sizes. + * + * NOTE: Multiple absolute (ABS) areas are + * never concatenated with each other, + * thus absolute area A and absolute area + * B will overlay each other if they begin + * at the same location (the default is + * always address 0 for absolute areas). + * + * REL/OVR - All sections (each individual areax + * section) starts at the identical base + * area address overlaying all other + * areax sections for this area. The + * size of the area is largest of the area + * sections. + * + * REL/CON - All sections (each individual areax + * section) are concatenated with the + * first section starting at the base + * area address. The size of the area + * is the sum of the section sizes. + * + * NOTE: Relocatable (REL) areas are always concatenated + * with each other, thus relocatable area B + * (defined after area A) will follow + * relocatable area A independent of the + * starting address of area A. Within a + * specific area each areax section may be + * overlayed or concatenated with other + * areax sections. + * + * + * If a base address for an area is specified then the + * area will start at that address. Any relocatable + * areas defined subsequently will be concatenated to the + * previous relocatable area if it does not have a base + * address specified. + * + * The names s_ and l_ are created to + * define the starting address and length of each area. + * + * local variables: + * Addr_T rloc ;current relocation address + * char temp[] ;temporary string + * struct symbol *sp ;symbol structure + * + * global variables: + * area *ap Pointer to the current + * area structure + * area *areap The pointer to the first + * area structure of a linked list + * + * functions called: + * int fprintf() c_library + * VOID lnksect() lkarea.c + * symbol *lkpsym() lksym.c + * char * strncpy() c_library + * int symeq() lksym.c + * + * side effects: + * All area and areax addresses and sizes are + * determined and saved in their respective + * structures. + */ + +unsigned long codemap[2048]; +Addr_T lnksect(struct area *tap); +/* + * Resolve all area addresses. + */ +VOID +lnkarea() +{ + Addr_T rloc[4] = {0, 0, 0, 0}; + Addr_T gs_size = 0; + int locIndex; + char temp[NCPS]; + struct sym *sp; + /*JCF: used to save the REG_BANK_[0-3] and SBIT_BYTES area pointers*/ + struct area *ta[5]; + int j; + struct area *abs_ap = NULL; + struct area *gs0_ap = NULL; + + memset(codemap, 0, sizeof(codemap)); + + /* first sort all absolute areas to the front */ + ap = areap; + /* no need to check first area, it's in front anyway */ + while (ap && ap->a_ap) + { + if (ap->a_ap->a_flag & A_ABS) + {/* next area is absolute, move it to front, + reversed sequence is no problem for absolutes */ + abs_ap = ap->a_ap; + ap->a_ap = abs_ap->a_ap; + abs_ap->a_ap = areap; + areap = abs_ap; + } + else + { + ap = ap->a_ap; + } + } + + /* next accumulate all GSINITx/GSFINAL area sizes + into GSINIT so they stay together */ + ap = areap; + while (ap) + { + if (!strncmp(ap->a_id, "GS", 2)) + {/* GSxxxxx area */ + if (ap->a_size == 0) + { + axp = ap->a_axp; + while (axp) + { + ap->a_size += axp->a_size; + axp = axp->a_axp; + } + } + gs_size += ap->a_size; + if (!strcmp(ap->a_id, "GSINIT0")) + {/* GSINIT0 area */ + gs0_ap = ap; + } + } + ap = ap->a_ap; + } + if (gs0_ap) + gs0_ap->a_size = gs_size; + + ap = areap; + while (ap) { + if (ap->a_flag & A_ABS) { + /* + * Absolute sections + */ + lnksect(ap); + } else { + /* Determine memory space */ + locIndex = 0; + #if 0 + if (ap->a_flag & A_CODE) { + locIndex = 1; + } + if (ap->a_flag & A_XDATA) { + locIndex = 2; + } + if (ap->a_flag & A_BIT) { + locIndex = 3; + } + #endif + /* + * Relocatable sections + */ + if (ap->a_type == 0) { /* JLH */ + if (ap->a_flag & A_NOLOAD) { + locIndex = 2; + ap->a_addr = 0; + } else { + ap->a_addr = rloc[ locIndex ]; + } + ap->a_type = 1; + } + + rloc[ locIndex ] = lnksect(ap); + } + + /* + * Create symbols called: + * s_ the start address of the area + * l_ the length of the area + */ + + if (! symeq(ap->a_id, _abs_)) + { + strncpy(temp+2,ap->a_id,NCPS-2); + *(temp+1) = '_'; + + *temp = 's'; + sp = lkpsym(temp, 1); + sp->s_addr = ap->a_addr ; + /* sp->s_axp = ap->a_axp; JLH: was NULL; */ + sp->s_type |= S_DEF; + + *temp = 'l'; + sp = lkpsym(temp, 1); + sp->s_addr = ap->a_size; + sp->s_axp = NULL; + sp->s_type |= S_DEF; + + } + + /*JCF: Since area BSEG is defined just before BSEG_BYTES, use the bit size of BSEG + to compute the byte size of BSEG_BYTES: */ + if (!strcmp(ap->a_id, "BSEG")) { + ap->a_ap->a_axp->a_size=(ap->a_addr/8)+((ap->a_size+7)/8); /*Bits to bytes*/ + } + else if (!strcmp(ap->a_id, "REG_BANK_0")) ta[0]=ap; + else if (!strcmp(ap->a_id, "REG_BANK_1")) ta[1]=ap; + else if (!strcmp(ap->a_id, "REG_BANK_2")) ta[2]=ap; + else if (!strcmp(ap->a_id, "REG_BANK_3")) ta[3]=ap; + else if (!strcmp(ap->a_id, "BSEG_BYTES")) + { + ta[4]=ap; + for(j=4; j>1; j--) + { + /*If upper register banks are not used roll back the relocation counter*/ + if ( (ta[j]->a_size==0) && (ta[j-1]->a_size==0) ) + { + rloc[0]-=8; + } + else break; + } + } + ap = ap->a_ap; + } +} + +static +Addr_T find_empty_space(Addr_T start, Addr_T size, unsigned long *map) +{ + int i, j, k; + unsigned long mask, b; + + while (1) + { + Addr_T a = start; + i = start >> 5; + j = (start + size) >> 5; + mask = -(1 << (start & 0x1F)); + + while (i < j) + { + if (map[i] & mask) + { + k = 32; + for (b=0x80000000; b!=0; b>>=1, k--) + { + if (map[i] & b) + break; + } + start = a + k; + break; + } + i++; + mask = 0xFFFFFFFF; + a += 32; + } + if (start > a) + continue; + + mask &= (1 << ((start + size) & 0x1F)) - 1; + if (map[i] & mask) + { + k = 32; + for (b=0x80000000; b!=0; b>>=1, k--) + { + if (map[i] & b) + break; + } + start = (a & ~0x1F) + k; + } + if (start <= a) + break; + } + return start; +} + +static +Addr_T allocate_space(Addr_T start, Addr_T size, char* id, unsigned long *map) +{ + int i, j; + unsigned long mask; + Addr_T a = start; + i = start >> 5; + j = (start + size) >> 5; + mask = -(1 << (start & 0x1F)); + + while (i < j) + { + if (map[i] & mask) + { + fprintf(stderr, "memory overlap near 0x%X for %s\n", a, id); + } + map[i++] |= mask; + mask = 0xFFFFFFFF; + a += 32; + } + mask &= (1 << ((start + size) & 0x1F)) - 1; + if (map[i] & mask) + { + fprintf(stderr, "memory overlap near 0x%X for %s\n", a, id); + } + map[i] |= mask; + return start; +} + +/*)Function VOID lnksect() + * + * area * tap pointer to an area structure + * + * The function lnksect() is the function called by + * lnkarea() to resolve the areax addresses. Refer + * to the function lnkarea() for more detail. Pageing + * boundary and length errors will be reported by this + * function. + * + * local variables: + * Addr_T size size of area + * Addr_T addr address of area + * areax * taxp pointer to an areax structure + * + * global variables: + * int lkerr error flag + * + * functions called: + * none + * + * side effects: + * All area and areax addresses and sizes area determined + * and linked into the structures. + */ + +Addr_T lnksect(struct area *tap) +{ + register Addr_T size, addr; + register struct areax *taxp; + + size = 0; + addr = tap->a_addr; + + if ((tap->a_flag&A_PAG) && (addr & 0xFF)) { + fprintf(stderr, + "\n?ASlink-Warning-Paged Area %8s Boundary Error\n", tap->a_id); + lkerr++; + } + + taxp = tap->a_axp; + if (tap->a_flag&A_OVR) { + /* + * Overlayed sections + */ + while (taxp) { + taxp->a_addr = addr; + if (taxp->a_size > size) + size = taxp->a_size; + taxp = taxp->a_axp; + } + } else if (tap->a_flag & A_ABS) { + /* + * Absolute sections + */ + while (taxp) { + allocate_space(taxp->a_addr, taxp->a_size, tap->a_id, codemap); + taxp->a_addr = 0; /* reset to zero so relative addresses become absolute */ + size += taxp->a_size; + taxp = taxp->a_axp; + } + } else { + /* + * Concatenated sections + */ + if (tap->a_size) { + addr = find_empty_space(addr, tap->a_size, codemap); + } + while (taxp) { + //find next unused address now + if (taxp->a_size) + { + addr = find_empty_space(addr, taxp->a_size, codemap); + allocate_space(addr, taxp->a_size, tap->a_id, codemap); + } + taxp->a_addr = addr; + addr += taxp->a_size; + size += taxp->a_size; + taxp = taxp->a_axp; + } + } + tap->a_size = size; + + if ((tap->a_flag&A_PAG) && (size > 256)) { + fprintf(stderr, + "\n?ASlink-Warning-Paged Area %8s Length Error\n", tap->a_id); + lkerr++; + } + + return addr; +} diff --git a/as/link/hc08/lkelf.c b/as/link/hc08/lkelf.c new file mode 100644 index 0000000..e1c191f --- /dev/null +++ b/as/link/hc08/lkelf.c @@ -0,0 +1,773 @@ +/* lkelf.c - Create an executable ELF/DWARF file + + Copyright (C) 2004 Erik Petrich, epetrich at users dot sourceforge dot net + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include +#include +#include + +#include "aslink.h" + +static int execStartMSB; +static int execStartLSB; +static char execStartMSBfound; +static char execStartLSBfound; + +typedef TYPE_UDWORD Elf32_Addr; +typedef TYPE_WORD Elf32_Half; +typedef TYPE_UDWORD Elf32_Off; +typedef TYPE_DWORD Elf32_Sword; +typedef TYPE_UDWORD Elf32_Word; + +enum +{ + EI_MAG0 = 0, + EI_MAG1, + EI_MAG2, + EI_MAG3, + EI_CLASS, + EI_DATA, + EI_VERSION, + EI_PAD, + EI_NIDENT = 16 +}; + +enum +{ + ELFMAG0 = 0x7f, + ELFMAG1 = 'E', + ELFMAG2 = 'L', + ELFMAG3 = 'F' +}; + +enum +{ + ET_NONE = 0, + ET_REL, + ET_EXEC, + ET_DYN, + ET_CORE +}; + +/* These e_machine values are from "Motorola 8- and 16-bit Embedded */ +/* Application Binary Interface (M8/16EABI)" version 2.0 */ +enum +{ + EM_NONE = 0, + EM_68HC05 = 72, + EM_68HC08 = 71, + EM_68HC11 = 70, + EM_68HC12 = 53, + EM_68HC16 = 69 +}; + +enum +{ + EV_NONE = 0, + EV_CURRENT +}; + +enum +{ + ELFCLASSNONE = 0, + ELFCLASS32, + ELFCLASS64 +}; + +enum +{ + ELFDATANONE = 0, + ELFDATA2LSB, + ELFDATA2MSB +}; + +enum +{ + SHT_NULL = 0, + SHT_PROGBITS, + SHT_SYMTAB, + SHT_STRTAB, + SHT_RELA, + SHT_HASH, + SHT_DYNAMIC, + SHT_NOTE, + SHT_NOBITS, + SHT_REL, + SHT_SHLIB, + SHT_DYNSYM +}; + +enum +{ + SHF_WRITE = (1 << 0), + SHF_ALLOC = (1 << 1), + SHF_EXECINSTR = (1 << 2), +}; + +enum +{ + PT_NULL = 0, + PT_LOAD +}; + +enum +{ + PF_X = (1 << 0), + PF_W = (1 << 1), + PF_R = (1 << 2) +}; + +typedef struct +{ + unsigned char e_ident[EI_NIDENT]; + Elf32_Half e_type; + Elf32_Half e_machine; + Elf32_Word e_version; + Elf32_Addr e_entry; + Elf32_Off e_phoff; + Elf32_Off e_shoff; + Elf32_Word e_flags; + Elf32_Half e_ehsize; + Elf32_Half e_phentsize; + Elf32_Half e_phnum; + Elf32_Half e_shentsize; + Elf32_Half e_shnum; + Elf32_Half e_shstrndx; +} Elf32_Ehdr; + +typedef struct +{ + Elf32_Word sh_name; + Elf32_Word sh_type; + Elf32_Word sh_flags; + Elf32_Addr sh_addr; + Elf32_Off sh_offset; + Elf32_Word sh_size; + Elf32_Word sh_link; + Elf32_Word sh_info; + Elf32_Word sh_addralign; + Elf32_Word sh_entsize; +} Elf32_Shdr; + +typedef struct +{ + Elf32_Word p_type; + Elf32_Off p_offset; + Elf32_Addr p_vaddr; + Elf32_Addr p_paddr; + Elf32_Word p_filesz; + Elf32_Word p_memsz; + Elf32_Word p_flags; + Elf32_Word p_align; +} Elf32_Phdr; + +typedef struct strtabString +{ + char * string; + struct strtabString * prev; + struct strtabString * next; + Elf32_Word index; +} strtabString; + +typedef struct +{ + strtabString * first; + strtabString * last; +} strtabList; + +static strtabList shstrtab; + + +typedef struct listEntry +{ + void * item; + struct listEntry * prev; + struct listEntry * next; +} listEntry; + +typedef struct +{ + listEntry * first; + listEntry * last; + int count; +} listHeader; + + + +static void +listAdd (listHeader * lhp, void * item) +{ + listEntry * lep; + + lep = new (sizeof (*lep)); + lep->item = item; + lep->prev = lhp->last; + if (lep->prev) + lep->prev->next = lep; + + lhp->last = lep; + if (!lhp->first) + lhp->first = lep; + + lhp->count++; +} + +static listHeader * +listNew (void) +{ + listHeader * lhp; + + lhp = new (sizeof (*lhp)); + + return lhp; +} + + +#if 0 +static Elf32_Word +strtabFind (strtabList * strtab, char * str) +{ + strtabString * sp; + sp = strtab->first; + + while (sp) + { + if (!strcmp (str, sp->string)) + return sp->index; + sp = sp->next; + } + + return 0; +} +#endif + +/*-------------------------------------------------------------------*/ +/* strtabFindOrAdd - Finds a string in a string table or adds the */ +/* string if it does not already exist. Returns the offset of the */ +/* string in the table. */ +/*-------------------------------------------------------------------*/ +static Elf32_Word +strtabFindOrAdd (strtabList * strtab, char * str) +{ + strtabString * sp; + sp = strtab->first; + + while (sp) + { + if (!strcmp (str, sp->string)) + return sp->index; + sp = sp->next; + } + + sp = new (sizeof(*sp)); + if (strtab->last) + sp->index = strtab->last->index + 1 + strlen (strtab->last->string); + else + sp->index = 1; + sp->string = new (1+strlen (str)); + strcpy (sp->string, str); + + sp->prev = strtab->last; + if (sp->prev) + sp->prev->next = sp; + strtab->last = sp; + if (!strtab->first) + strtab->first = sp; + + return sp->index; +} + +/*-------------------------------------------------------------------*/ +/* fputElfStrtab - writes a string table to a file */ +/*-------------------------------------------------------------------*/ +static void +fputElfStrtab (strtabList *strtab, FILE *fp) +{ + strtabString * sp; + + fputc (0, fp); /* index 0 must be the null character */ + + sp = strtab->first; + while (sp) + { + fputs (sp->string, fp); + fputc (0, fp); + sp = sp->next; + } +} + +/*-------------------------------------------------------------------*/ +/* fputElf32_Word - writes an Elf32_Word value to a file */ +/*-------------------------------------------------------------------*/ +static void +fputElf32_Word (Elf32_Word x, FILE *fp) +{ + if (hilo == 0) + { + fputc (x & 0xff, fp); + fputc ((x >> 8) & 0xff, fp); + fputc ((x >> 16) & 0xff, fp); + fputc ((x >> 24) & 0xff, fp); + } + else + { + fputc ((x >> 24) & 0xff, fp); + fputc ((x >> 16) & 0xff, fp); + fputc ((x >> 8) & 0xff, fp); + fputc (x & 0xff, fp); + } +} + +/*-------------------------------------------------------------------*/ +/* fputElf32_Off - writes an Elf32_Off value to a file */ +/*-------------------------------------------------------------------*/ +static void +fputElf32_Off (Elf32_Off x, FILE *fp) +{ + if (hilo == 0) + { + fputc (x & 0xff, fp); + fputc ((x >> 8) & 0xff, fp); + fputc ((x >> 16) & 0xff, fp); + fputc ((x >> 24) & 0xff, fp); + } + else + { + fputc ((x >> 24) & 0xff, fp); + fputc ((x >> 16) & 0xff, fp); + fputc ((x >> 8) & 0xff, fp); + fputc (x & 0xff, fp); + } +} + +/*-------------------------------------------------------------------*/ +/* fputElf32_Addr - writes an Elf32_Addr value to a file */ +/*-------------------------------------------------------------------*/ +static void +fputElf32_Addr (Elf32_Addr x, FILE *fp) +{ + if (hilo == 0) + { + fputc (x & 0xff, fp); + fputc ((x >> 8) & 0xff, fp); + fputc ((x >> 16) & 0xff, fp); + fputc ((x >> 24) & 0xff, fp); + } + else + { + fputc ((x >> 24) & 0xff, fp); + fputc ((x >> 16) & 0xff, fp); + fputc ((x >> 8) & 0xff, fp); + fputc (x & 0xff, fp); + } +} + +/*-------------------------------------------------------------------*/ +/* fputElf32_Half - writes an Elf32_Half value to a file */ +/*-------------------------------------------------------------------*/ +static void +fputElf32_Half (Elf32_Half x, FILE *fp) +{ + if (hilo == 0) + { + fputc (x & 0xff, fp); + fputc ((x >> 8) & 0xff, fp); + } + else + { + fputc ((x >> 8) & 0xff, fp); + fputc (x & 0xff, fp); + } +} + +/*------------------------------------------------------------------------*/ +/* fputElf32_Ehdr - writes an Elf32_Ehdr struct (ELF header) to a file */ +/*------------------------------------------------------------------------*/ +static void +fputElf32_Ehdr (Elf32_Ehdr * ehdr, FILE * fp) +{ + int i; + + for (i=0; ie_ident[i], fp); + + fputElf32_Half (ehdr->e_type, fp); + fputElf32_Half (ehdr->e_machine, fp); + fputElf32_Word (ehdr->e_version, fp); + fputElf32_Addr (ehdr->e_entry, fp); + fputElf32_Off (ehdr->e_phoff, fp); + fputElf32_Off (ehdr->e_shoff, fp); + fputElf32_Word (ehdr->e_flags, fp); + fputElf32_Half (ehdr->e_ehsize, fp); + fputElf32_Half (ehdr->e_phentsize, fp); + fputElf32_Half (ehdr->e_phnum, fp); + fputElf32_Half (ehdr->e_shentsize, fp); + fputElf32_Half (ehdr->e_shnum, fp); + fputElf32_Half (ehdr->e_shstrndx, fp); +} + +/*-------------------------------------------------------------------------*/ +/* fputElf32_Ehdr - writes an Elf32_Shdr struct (section header) to a file */ +/*-------------------------------------------------------------------------*/ +static void +fputElf32_Shdr (Elf32_Shdr * shdr, FILE * fp) +{ + fputElf32_Word (shdr->sh_name, fp); + fputElf32_Word (shdr->sh_type, fp); + fputElf32_Word (shdr->sh_flags, fp); + fputElf32_Addr (shdr->sh_addr, fp); + fputElf32_Off (shdr->sh_offset, fp); + fputElf32_Word (shdr->sh_size, fp); + fputElf32_Word (shdr->sh_link, fp); + fputElf32_Word (shdr->sh_info, fp); + fputElf32_Word (shdr->sh_addralign, fp); + fputElf32_Word (shdr->sh_entsize, fp); +} + +/*-------------------------------------------------------------------------*/ +/* fputElf32_Ehdr - writes an Elf32_Phdr struct (segment header) to a file */ +/*-------------------------------------------------------------------------*/ +static void +fputElf32_Phdr (Elf32_Phdr * phdr, FILE * fp) +{ + fputElf32_Word (phdr->p_type, fp); + fputElf32_Off (phdr->p_offset, fp); + fputElf32_Addr (phdr->p_vaddr, fp); + fputElf32_Addr (phdr->p_paddr, fp); + fputElf32_Word (phdr->p_filesz, fp); + fputElf32_Word (phdr->p_memsz, fp); + fputElf32_Word (phdr->p_flags, fp); + fputElf32_Word (phdr->p_align, fp); +} + + +/*--------------------------------------------------------------------------*/ +/* elfGenerateAbs - generates segments and sections for an absolute area. */ +/* This is a little more complicated than a relative area since it may */ +/* contain noncontiguous regions. */ +/*--------------------------------------------------------------------------*/ +static void +elfGenerateAbs (struct area *ap, listHeader * segments, listHeader * sections) +{ + Elf32_Addr ofs; + Elf32_Addr addr; + Elf32_Word size; + Elf32_Phdr * phdrp; + Elf32_Shdr * shdrp; + + if (!ap->a_image) + { + return; + } + + ofs = 0; + for (;;) + { + /* Find the start of a contiguously */ + /* used region within this area */ + while (ofs < ap->a_size && !ap->a_used[ofs]) + ofs++; + if (ofs >= ap->a_size) + return; + + /* Find the end of the region */ + addr = ap->a_addr + ofs; + while (ofs < ap->a_size && ap->a_used[ofs]) + ofs++; + size = ap->a_addr + ofs - addr; + + /* create a segment header for this region if loadable */ + if (!(ap->a_flag & A_NOLOAD)) + { + phdrp = new (sizeof (*phdrp)); + phdrp->p_type = PT_LOAD; + phdrp->p_offset = ftell (ofp); + phdrp->p_vaddr = addr; + phdrp->p_paddr = addr; + phdrp->p_filesz = size; + phdrp->p_memsz = size; + phdrp->p_flags = PF_R; + if (ap->a_flag & A_CODE) + phdrp->p_flags |= PF_X; + phdrp->p_align = 1; + listAdd (segments, phdrp); + } + + /* create a section header for this region */ + shdrp = new (sizeof (*shdrp)); + shdrp->sh_name = strtabFindOrAdd (&shstrtab, ap->a_id); + shdrp->sh_type = SHT_PROGBITS; + shdrp->sh_flags = 0; + if (!(ap->a_flag & A_NOLOAD)) + shdrp->sh_flags |= SHF_ALLOC; + if (ap->a_flag & A_CODE) + shdrp->sh_flags |= SHF_EXECINSTR; + shdrp->sh_addr = addr; + shdrp->sh_offset = ftell (ofp); + shdrp->sh_size = size; + shdrp->sh_link = 0; + shdrp->sh_info = 0; + shdrp->sh_addralign = 0; + shdrp->sh_entsize = 0; + listAdd (sections, shdrp); + + fwrite (&ap->a_image[addr-ap->a_addr], 1, size, ofp); + } +} + +/*--------------------------------------------------------------------------*/ +/* elfGenerateRel - generates a segment and section for a relative area. */ +/*--------------------------------------------------------------------------*/ +static void +elfGenerateRel (struct area *ap, listHeader * segments, listHeader * sections) +{ + Elf32_Phdr * phdrp; + Elf32_Shdr * shdrp; + + if (!ap->a_image) + { + return; + } + + /* create a segment header for this area if loadable */ + if (!(ap->a_flag & A_NOLOAD)) + { + phdrp = new (sizeof (*phdrp)); + phdrp->p_type = PT_LOAD; + phdrp->p_offset = ftell (ofp); + phdrp->p_vaddr = ap->a_addr; + phdrp->p_paddr = ap->a_addr; + phdrp->p_filesz = ap->a_size; + phdrp->p_memsz = ap->a_size; + phdrp->p_flags = PF_R; + if (ap->a_flag & A_CODE) + phdrp->p_flags |= PF_X; + phdrp->p_align = 1; + listAdd (segments, phdrp); + } + + /* create a section header for this area */ + shdrp = new (sizeof (*shdrp)); + shdrp->sh_name = strtabFindOrAdd (&shstrtab, ap->a_id); + shdrp->sh_type = SHT_PROGBITS; + shdrp->sh_flags = 0; + if (!(ap->a_flag & A_NOLOAD)) + shdrp->sh_flags |= SHF_ALLOC; + if (ap->a_flag & A_CODE) + shdrp->sh_flags |= SHF_EXECINSTR; + shdrp->sh_addr = ap->a_addr; + shdrp->sh_offset = ftell (ofp); + shdrp->sh_size = ap->a_size; + shdrp->sh_link = 0; + shdrp->sh_info = 0; + shdrp->sh_addralign = 0; + shdrp->sh_entsize = 0; + listAdd (sections, shdrp); + + fwrite (ap->a_image, 1, ap->a_size, ofp); +} + +/*--------------------------------------------------------------------------*/ +/* elfGenerate - generates the complete ELF file */ +/*--------------------------------------------------------------------------*/ +static void +elfGenerate (void) +{ + listHeader * sections = listNew(); + listHeader * segments = listNew(); + struct area *ap; + Elf32_Ehdr ehdr; + Elf32_Shdr * shdrp; + Elf32_Phdr * phdrp; + listEntry * lep; + int i; + Elf32_Word shstrtabName; + + /* create the null section header for index 0 */ + shdrp = new (sizeof (*shdrp)); + shdrp->sh_name = 0; + shdrp->sh_type = SHT_NULL; + shdrp->sh_flags = 0; + shdrp->sh_addr = 0; + shdrp->sh_offset = 0; + shdrp->sh_size = 0; + shdrp->sh_link = 0; + shdrp->sh_info = 0; + shdrp->sh_addralign = 0; + shdrp->sh_entsize = 0; + listAdd (sections, shdrp); + + /* Initialize the ELF header */ + for (i=0; ia_size) + { + if (ap->a_flag & A_ABS) + elfGenerateAbs (ap, segments, sections); + else + elfGenerateRel (ap, segments, sections); + } + ap = ap->a_ap; + } + + /* Create the string table section after the other sections */ + shdrp = new (sizeof (*shdrp)); + shdrp->sh_name = strtabFindOrAdd (&shstrtab, ".shstrtab"); + shdrp->sh_type = SHT_STRTAB; + shdrp->sh_flags = 0; + shdrp->sh_addr = 0; + shdrp->sh_offset = ftell (ofp); + shdrp->sh_size = shstrtab.last->index + strlen (shstrtab.last->string) + 1; + shdrp->sh_link = 0; + shdrp->sh_info = 0; + shdrp->sh_addralign = 0; + shdrp->sh_entsize = 0; + listAdd (sections, shdrp); + fputElfStrtab (&shstrtab, ofp); + + /* Find the index of the section string table */ + /* header and save it in the ELF header */ + ehdr.e_shstrndx = 0; + shstrtabName = shdrp->sh_name; + lep = sections->first; + while (lep) + { + shdrp = lep->item; + if (shdrp->sh_name == shstrtabName) + break; + ehdr.e_shstrndx++; + lep = lep->next; + } + + /* Write out the segment headers */ + ehdr.e_phnum = segments->count; + ehdr.e_phoff = ftell (ofp); + lep = segments->first; + while (lep) + { + phdrp = lep->item; + fputElf32_Phdr (phdrp, ofp); + lep = lep->next; + } + + /* Write out the section headers */ + ehdr.e_shnum = sections->count; + ehdr.e_shoff = ftell (ofp); + lep = sections->first; + while (lep) + { + shdrp = lep->item; + fputElf32_Shdr (shdrp, ofp); + lep = lep->next; + } + + /* All the values in the ELF header have now been computed; write */ + /* over the placeholder header with the final values */ + fseek (ofp, 0, SEEK_SET); + fputElf32_Ehdr (&ehdr, ofp); + fseek (ofp, 0, SEEK_END); +} + +/*--------------------------------------------------------------------------*/ +/* elf - incrementally called by the linker core to generate ELF file data. */ +/* The parameter is nonzero when there is data available and zero when */ +/* the linker is finished. */ +/*--------------------------------------------------------------------------*/ +void +elf (int i) +{ + Addr_T address; + + /* Buffer the data until we have it all */ + if (i) + { + if (hilo == 0) + address = rtval[0] + (rtval[1] << 8); /* little endian order */ + else + address = rtval[1] + (rtval[0] << 8); /* big endian order */ + + /* If this area doesn't have an image buffer, create one */ + if (!ap->a_image) + { + ap->a_image = new (ap->a_size); + if (ap->a_flag & A_ABS) + ap->a_used = new (ap->a_size); + } + + /* Copy the data into the image buffer */ + for (i = 2; i < rtcnt ; i++) + { + if (rtflg[i]) + { + ap->a_image[address-ap->a_addr] = rtval[i]; + if (ap->a_used) + ap->a_used[address-ap->a_addr] = 1; + + /* Make note of the reset vector */ + if (!(ap->a_flag & A_NOLOAD)) + { + if (address == 0xfffe) + { + execStartMSB = rtval[i]; + execStartMSBfound = 1; + } + if (address == 0xffff) + { + execStartLSB = rtval[i]; + execStartLSBfound = 1; + } + } + address++; + } + } + } + else + elfGenerate(); +} diff --git a/as/link/hc08/lkihx.c b/as/link/hc08/lkihx.c new file mode 100644 index 0000000..196f1dc --- /dev/null +++ b/as/link/hc08/lkihx.c @@ -0,0 +1,269 @@ +/* lkihx.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include "aslink.h" + +/*)Module lkihx.c + * + * The module lkihx.c contains the function to + * output the relocated object code in the + * Intel Hex format. + * + * lkihx.c contains the following functions: + * VOID hexRecord(addr, rtvalIndex) + * VOID ihx(i) + * VOID ihxExtendedLinearAddress(a) + * + * local variables: hexPageOverrun, lastHexAddr + */ + +/*Intel Hex Format + * Record Mark Field - This field signifies the start of a + * record, and consists of an ascii colon + * (:). + * + * Record Length Field - This field consists of two ascii + * characters which indicate the number of + * data bytes in this record. The + * characters are the result of converting + * the number of bytes in binary to two + * ascii characters, high digit first. An + * End of File record contains two ascii + * zeros in this field. + * + * Load Address Field - This field consists of the four ascii + * characters which result from converting + * the the binary value of the address in + * which to begin loading this record. The + * order is as follows: + * + * High digit of high byte of address. + * Low digit of high byte of address. + * High digit of low byte of address. + * Low digit of low byte of address. + * + * In an End of File record this field con- + * sists of either four ascii zeros or the + * program entry address. Currently the + * entry address option is not supported. + * + * Record Type Field - This field identifies the record type, + * which is either 0 for data records or 1 + * for an End of File record. It consists + * of two ascii characters, with the high + * digit of the record type first, followed + * by the low digit of the record type. + * + * Data Field - This field consists of the actual data, + * converted to two ascii characters, high + * digit first. There are no data bytes in + * the End of File record. + * + * Checksum Field - The checksum field is the 8 bit binary + * sum of the record length field, the load + * address field, the record type field, + * and the data field. This sum is then + * negated (2's complement) and converted + * to two ascii characters, high digit + * first. + */ + +/* Static variable which holds the count of hex page overruns + * (crossings of the 64kB boundary). Cleared at explicit extended + * address output. + */ +static int hexPageOverrun = 0; + +/* Global which holds the last (16 bit) address of hex record. + * Cleared at begin of new area or when the extended address is output. + */ +unsigned int lastHexAddr = 0; + + +/*)Function hexRecord(addr, rtvalIndex) + * + * unsigned addr starting address of hex record + * int rtvalIndex starting index into the rtval[] array + * + * The function hexRecord() outputs the relocated data + * in the standard Intel Hex format (with inserting + * the extended address record if necessary). + * + * local variables: + * Addr_T chksum byte checksum + * int i index for loops + * int overrun temporary storage for hexPageOverrun + * int bytes counter for bytes written + * + * global variables: + * FILE * ofp output file handle + * int rtcnt count of data words + * int rtflg[] output the data flag + * Addr_T rtval[] relocated data + * + * functions called: + * int fprintf() c_library + * ihxExtendedLinearAddress() lkihx.c + * hexRecord() lkihx.c (recursion) + * + * side effects: + * hexPageOverrun is eventually incremented, + * lastHexAddr is updated + */ + +VOID +hexRecord(unsigned addr, int rtvalIndex) +{ + Addr_T chksum; + int i, overrun, bytes; + + for (i = rtvalIndex, chksum = 0; i < rtcnt; i++) { + if (rtflg[i]) { + if (addr + ++chksum > 0xffff) + break; + } + } + if (chksum == 0) + return; // nothing to output + + if (lastHexAddr > addr) { + overrun = hexPageOverrun + 1; + ihxExtendedLinearAddress(lastExtendedAddress + overrun); + hexPageOverrun = overrun; + hexRecord(addr, rtvalIndex); + return; + } + + lastHexAddr = addr; + fprintf(ofp, ":%02X%04X00", chksum, addr); + chksum += (addr >> 8) + (addr & 0xff); + for (i = rtvalIndex, bytes = 0; i < rtcnt; i++) { + if (rtflg[i]) { + fprintf(ofp, "%02X", rtval[i]); + chksum += rtval[i]; +#if 0 + if (addr + ++bytes > 0xffff) { + if (rflag) { + fprintf(ofp, "%02X\n", (0-chksum) & 0xff); + overrun = hexPageOverrun + 1; + ihxExtendedLinearAddress(lastExtendedAddress + overrun); + hexPageOverrun = overrun; + hexRecord(0, i + 1); + return; + } else { + fprintf(stderr, + "warning: extended linear address encountered; " + "you probably want the -r flag.\n"); + } + } +#endif + } + } + fprintf(ofp, "%02X\n", (0-chksum) & 0xff); +} + +/*)Function ihx(i) + * + * int i 0 - process data + * 1 - end of data + * + * The function ihx() calls the hexRecord() function for processing data + * or writes the End of Data record to the file defined by ofp. + * + * local variables: + * Addr_T n auxiliary variable + * + * global variables: + * int hilo byte order + * FILE * ofp output file handle + * Addr_T rtval[] relocated data + * + * functions called: + * VOID hexRecord() lkihx.c + * int fprintf() c_library + * + * side effects: + * The sequence of rtval[0], rtval[1] is eventually changed. + */ + +VOID +ihx(i) +{ + Addr_T n; + if (i) { + if (ap->a_flag & A_NOLOAD) + return; + if (hilo == 0) { + n = rtval[0]; + rtval[0] = rtval[1]; + rtval[1] = n; + } + hexRecord((rtval[0]<<8) + rtval[1], 2); + } else { + fprintf(ofp, ":00000001FF\n"); + } +} + +/*)Function ihxNewArea(i) + * The function ihxNewArea() is called when processing of new area is started. + * It resets the value of lastHexAddr. + */ + +VOID +ihxNewArea() +{ + lastHexAddr = 0; +} + +/*)Function ihxExtendedLinearAddress(i) + * + * Addr_T i 16 bit extended linear address. + * + * The function ihxExtendedLinearAddress() writes an extended + * linear address record (type 04) to the output file. + * + * local variables: + * Addr_T chksum byte checksum + * + * global variables: + * FILE * ofp output file handle + * + * functions called: + * int fprintf() c_library + * + * side effects: + * The data is output to the file defined by ofp. + * hexPageOverrun and lastHexAddr is cleared + */ +VOID +ihxExtendedLinearAddress(Addr_T a) +{ + Addr_T chksum; + + /* The checksum is the complement of the bytes in the + * record: the 2 is record length, 4 is the extended linear + * address record type, plus the two address bytes. + */ + chksum = 2 + 4 + (a & 0xff) + ((a >> 8) & 0xff); + + fprintf(ofp, ":02000004%04X%02X\n", a & 0xffff, (0-chksum) & 0xff); + hexPageOverrun = 0; + lastHexAddr = 0; +} diff --git a/as/link/hc08/lkmain.c b/as/link/hc08/lkmain.c new file mode 100644 index 0000000..8bab546 --- /dev/null +++ b/as/link/hc08/lkmain.c @@ -0,0 +1,1406 @@ +/* lkmain.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 31-Oct-97 JLH: + * - add jflag and jfp to control NoICE output file genration + * 3-Nov-97 JLH: + * - use a_type == 0 as "virgin area" flag: set == 1 if -b + */ + +#include +#include +#include +#include "aslink.h" + +#ifdef WIN32T +#include + +void Timer(int action, char * message) +{ + static double start, end, total=0.0; + static const double secs_per_tick = 1.0 / CLOCKS_PER_SEC; + + if(action==0) start=clock()*secs_per_tick; + else if(action==1) + { + end=clock() * secs_per_tick; + printf("%s \t%f seconds.\n", message, (end-start)); + total+=end-start; + } + else + { + printf("Total time: \t%f seconds.\n", total); + total=0.0; + } +} +#endif + +/*)Module lkmain.c + * + * The module lkmain.c contains the functions which + * (1) input the linker options, parameters, and specifications + * (2) perform a two pass link + * (3) produce the appropriate linked data output and/or + * link map file and/or relocated listing files. + * + * lkmain.c contains the following functions: + * FILE * afile(fn,ft,wf) + * VOID bassav() + * VOID gblsav() + * VOID link_main() + * VOID lkexit() + * VOID main(argc,argv) + * VOID map() + * int parse() + * VOID setbas() + * VOID setgbl() + * VOID usage() + * + * lkmain.c contains the following local variables: + * char * usetext[] array of pointers to the + * command option tect lines + * + */ + +/*JCF: Creates some of the default areas so they are allocated in the right order.*/ +void Areas51 (void) +{ + char * rel[]={ + "XH", + "H 7 areas 0 global symbols", + "A _CODE size 0 flags 0", /*Each .rel has one, so...*/ + "A REG_BANK_0 size 0 flags 4", /*Register banks are overlayable*/ + "A REG_BANK_1 size 0 flags 4", + "A REG_BANK_2 size 0 flags 4", + "A REG_BANK_3 size 0 flags 4", + "A BSEG size 0 flags 80", /*BSEG must be just before BITS*/ + "A BSEG_BYTES size 0 flags 0", /*Size will be obtained from BSEG in lnkarea()*/ + "" + }; + int j; + + for (j=0; rel[j][0]!=0; j++) + { + ip=rel[j]; + link_main(); + } + + /*Set the start address of the default areas:*/ + for(ap=areap; ap; ap=ap->a_ap) + { + /**/ if (!strcmp(ap->a_id, "REG_BANK_0")) { ap->a_addr=0x00; ap->a_type=1; } + else if (!strcmp(ap->a_id, "REG_BANK_1")) { ap->a_addr=0x08; ap->a_type=1; } + else if (!strcmp(ap->a_id, "REG_BANK_2")) { ap->a_addr=0x10; ap->a_type=1; } + else if (!strcmp(ap->a_id, "REG_BANK_3")) { ap->a_addr=0x18; ap->a_type=1; } + else if (!strcmp(ap->a_id, "BSEG_BYTES")) { ap->a_addr=0x20; ap->a_type=1; } + } +} + +/*)Function VOID main(argc,argv) + * + * int argc number of command line arguments + 1 + * char * argv[] array of pointers to the command line + * arguments + * + * The function main() evaluates the command line arguments to + * determine if the linker parameters are to input through 'stdin' + * or read from a command file. The functions lk_getline() and parse() + * are to input and evaluate the linker parameters. The linking process + * proceeds by making the first pass through each .rel file in the order + * presented to the linker. At the end of the first pass the setbase(), + * lnkarea(), setgbl(), and symdef() functions are called to evaluate + * the base address terms, link all areas, define global variables, + * and look for undefined symbols. Following these routines a linker + * map file may be produced and the linker output files may be opened. + * The second pass through the .rel files will output the linked data + * in one of the four supported formats. + * + * local variables: + * char * p pointer to an argument string + * int c character from argument string + * int i loop counter + * + * global variables: + * text line in ib[] + * lfile *cfp The pointer *cfp points to the + * current lfile structure + * char ctype[] array of character types, one per + * ASCII character + * lfile *filep The pointer *filep points to the + * beginning of a linked list of + * lfile structures. + * head *hp Pointer to the current + * head structure + * char ib[NINPUT] .rel file text line + * char *ip pointer into the .rel file + * lfile *linkp pointer to first lfile structure + * containing an input .rel file + * specification + * int lkerr error flag + * int mflag Map output flag + * int oflag Output file type flag + * FILE *ofp Output file handle + * for word formats + * FILE *ofph Output file handle + * for high byte format + * FILE *ofpl Output file handle + * for low byte format + * int pass linker pass number + * int pflag print linker command file flag + * int radix current number conversion radix + * FILE *sfp The file handle sfp points to the + * currently open file + * lfile *startp asmlnk startup file structure + * FILE * stdin c_library + * FILE * stdout c_library + * + * functions called: + * FILE * afile() lkmain.c + * int fclose() c_library + * int fprintf() c_library + * int lk_getline() lklex.c + * VOID library() lklibr.c + * VOID link_main() lkmain.c + * VOID lkexit() lkmain.c + * VOID lnkarea() lkarea.c + * VOID map() lkmain.c + * VOID new() lksym.c + * int parse() lkmain.c + * VOID reloc() lkreloc.c + * VOID search() lklibr.c + * VOID setbas() lkmain.c + * VOID setgbl() lkmain.c + * VOID symdef() lksym.c + * VOID usage() lkmain.c + * + * side effects: + * Completion of main() completes the linking process + * and may produce a map file (.map) and/or a linked + * data files (.ihx or .s19) and/or one or more + * relocated listing files (.rst). + */ + +int +main(int argc, char *argv[]) +{ + register char *p; + register int c, i; + +#ifdef WIN32T + Timer(0, ""); +#endif + + startp = (struct lfile *) new (sizeof (struct lfile)); + + pflag = 1; + for (i=1; if_type = F_STD; + break; + + case 'f': + case 'F': + startp->f_type = F_LNK; + break; + + case 'n': + case 'N': + pflag = 0; + break; + + case 'p': + case 'P': + pflag = 1; + break; + + default: + usage(); + } + } + } else { + if (startp->f_type == F_LNK) { + startp->f_idp = p; + } + } + } + if (startp->f_type == 0) + usage(); + if (startp->f_type == F_LNK && startp->f_idp == NULL) + usage(); + + cfp = NULL; + sfp = NULL; + filep = startp; + while (1) { + ip = ib; + if (lk_getline() == 0) + break; + if (pflag && sfp != stdin) + fprintf(stdout, "%s\n", ip); + if (*ip == '\0' || parse()) + break; + } + + if (sfp) { + fclose(sfp); + sfp = NULL; + } + + if (linkp == NULL) + usage(); + + syminit(); + + if (dflag){ + //dfp = afile("temp", "cdb", 1); + SaveLinkedFilePath(linkp->f_idp); //Must be the first one... + dfp = afile(linkp->f_idp,"cdb",1); //JCF: Nov 30, 2002 + if (dfp == NULL) + lkexit(1); + } + + for (pass=0; pass<2; ++pass) { + cfp = NULL; + sfp = NULL; + filep = linkp; + hp = NULL; + radix = 10; + + Areas51(); /*JCF: Create the default 8051 areas in the right order*/ + + while (lk_getline()) { + ip = ib; + + /* pass any "magic comments" to NoICE output */ + if ((ip[0] == ';') && (ip[1] == '!') && jfp) { + fprintf( jfp, "%s\n", &ip[2] ); + } + link_main(); + } + if (pass == 0) { + /* + * Search libraries for global symbols + */ + search(); + /* + * Set area base addresses. + */ + setbas(); + /* + * Link all area addresses. + */ + lnkarea(); + /* + * Process global definitions. + */ + setgbl(); + /* + * Check for undefined globals. + */ + symdef(stderr); + + /* Open NoICE output file if requested */ + if (jflag) { + jfp = afile(linkp->f_idp, "NOI", 1); + if (jfp == NULL) { + lkexit(1); + } + } + + /* + * Output Link Map if requested, + * or if NoICE output requested (since NoICE + * file is generated in part by map() processing) + */ + if (mflag || jflag) + map(); + + if (sflag) /*JCF: memory usage summary output*/ + if(summary(areap))lkexit(1); + + if (iram_size) + iramcheck(); + + /* + * Open output file + */ + if (oflag == 1) { + ofp = afile(linkp->f_idp, "ihx", 1); + if (ofp == NULL) { + lkexit(1); + } + /* include NoICE command to load hex file */ + if (jfp) fprintf( jfp, "LOAD %s.IHX\n", linkp->f_idp ); + + } else + if (oflag == 2) { + ofp = afile(linkp->f_idp, "S19", 1); + if (ofp == NULL) { + lkexit(1); + } + /* include NoICE command to load hex file */ + if (jfp) fprintf( jfp, "LOAD %s.S19\n", linkp->f_idp ); + } else + if (oflag == 3) { + ofp = afile(linkp->f_idp, "elf", 4); + if (ofp == NULL) { + lkexit(1); + } + } + } else { + /* + * Link in library files + */ + library(); + reloc('E'); + } + } + //JCF: + //CreateAOMF51(); + +#ifdef WIN32T + Timer(1, "Linker execution time"); +#endif + + lkexit(lkerr); + return 0; +} + +/*)Function VOID lkexit(i) + * + * int i exit code + * + * The function lkexit() explicitly closes all open + * files and then terminates the program. + * + * local variables: + * none + * + * global variables: + * FILE * mfp file handle for .map + * FILE * ofp file handle for .ihx/.s19 + * FILE * rfp file hanlde for .rst + * FILE * sfp file handle for .rel + * FILE * tfp file handle for .lst + * + * functions called: + * int fclose() c_library + * VOID exit() c_library + * + * side effects: + * All files closed. Program terminates. + */ + +VOID +lkexit(int i) +{ + if (mfp != NULL) fclose(mfp); + if (jfp != NULL) fclose(jfp); + if (ofp != NULL) fclose(ofp); + if (rfp != NULL) fclose(rfp); + if (sfp != NULL) fclose(sfp); + if (tfp != NULL) fclose(tfp); + if (dfp != NULL) fclose(dfp); + /*if (dfp != NULL) + FILE *xfp = afile(linkp->f_idp,"cdb",1); + dfp = freopen("temp.cdb","r",dfp); + copyfile(xfp,dfp); + fclose(xfp); + fclose(dfp); + remove("temp.cdb"); + }*/ + exit(i); +} + +/*)Function link_main() + * + * The function link_main() evaluates the directives for each line of + * text read from the .rel file(s). The valid directives processed + * are: + * X, D, Q, H, M, A, S, T, R, and P. + * + * local variables: + * int c first non blank character of a line + * + * global variables: + * head *headp The pointer to the first + * head structure of a linked list + * head *hp Pointer to the current + * head structure + * int pass linker pass number + * int radix current number conversion radix + * + * functions called: + * char endline() lklex.c + * VOID module() lkhead.c + * VOID newarea() lkarea.c + * VOID newhead() lkhead.c + * sym * newsym() lksym.c + * VOID reloc() lkreloc.c + * + * side effects: + * Head, area, and symbol structures are created and + * the radix is set as the .rel file(s) are read. + */ + +VOID +link_main() +{ + register char c; + + if ((c=endline()) == 0) { return; } + switch (c) { + + case 'O': /*For some important sdcc options*/ + if (pass == 0) + { + if(strlen(sdccopt)==0) + { + strcpy(sdccopt, &ip[1]); + strcpy(sdccopt_module, curr_module); + } + else + { + if(strcmp(sdccopt, &ip[1])!=0) + { + fprintf(stderr, + "?ASlink-Warning-Conflicting sdcc options:\n" + " \"%s\" in module \"%s\" and\n" + " \"%s\" in module \"%s\".\n", + sdccopt, sdccopt_module, &ip[1], curr_module); + lkerr++; + } + } + } + break; + + case 'X': + radix = 16; + break; + + case 'D': + radix = 10; + break; + + case 'Q': + radix = 8; + break; + + case 'H': + if (pass == 0) { + newhead(); + } else { + if (hp == 0) { + hp = headp; + } else { + hp = hp->h_hp; + } + } + sdp.s_area = NULL; + sdp.s_areax = NULL; + sdp.s_addr = 0; + break; + + case 'M': + if (pass == 0) + { + strcpy(curr_module, &ip[1]); + module(); + } + break; + + case 'A': + if (pass == 0) + newarea(); + if (sdp.s_area == NULL) { + sdp.s_area = areap; + sdp.s_areax = areap->a_axp; + sdp.s_addr = 0; + } + break; + + case 'S': + if (pass == 0) + newsym(); + break; + + case 'T': + case 'R': + case 'P': + if (pass == 0) + break; + reloc(c); + break; + + default: + break; + } + if (c == 'X' || c == 'D' || c == 'Q') { + if ((c = get()) == 'H') { + hilo = 1; + } else + if (c == 'L') { + hilo = 0; + } + } +} + + +/*)Function VOID map() + * + * The function map() opens the output map file and calls the various + * routines to + * (1) output the variables in each area, + * (2) list the files processed with module names, + * (3) list the libraries file processed, + * (4) list base address definitions, + * (5) list global variable definitions, and + * (6) list any undefined variables. + * + * local variables: + * int i counter + * head * hdp pointer to head structure + * lbfile *lbfh pointer to library file structure + * + * global variables: + * area *ap Pointer to the current + * area structure + * area *areap The pointer to the first + * area structure of a linked list + * base *basep The pointer to the first + * base structure + * base *bsp Pointer to the current + * base structure + * lfile *filep The pointer *filep points to the + * beginning of a linked list of + * lfile structures. + * globl *globlp The pointer to the first + * globl structure + * globl *gsp Pointer to the current + * globl structure + * head *headp The pointer to the first + * head structure of a linked list + * lbfile *lbfhead The pointer to the first + * lbfile structure of a linked list + * lfile *linkp pointer to first lfile structure + * containing an input REL file + * specification + * int lop current line number on page + * FILE *mfp Map output file handle + * int page current page number + * + * functions called: + * FILE * afile() lkmain.c + * int fprintf() c_library + * VOID lkexit() lkmain.c + * VOID lstarea() lklist.c + * VOID newpag() lklist.c + * VOID symdef() lksym.c + * + * side effects: + * The map file is created. + */ + +VOID +map() +{ + register int i; + register struct head *hdp; + register struct lbfile *lbfh; + + /* + * Open Map File + */ + mfp = afile(linkp->f_idp, "map", 1); + if (mfp == NULL) { + lkexit(1); + } + + /* + * Output Map Area Lists + */ + page = 0; + lop = NLPP; + ap = areap; + while (ap) { + lstarea(ap); + ap = ap->a_ap; + } + /* + * List Linked Files + */ + newpag(mfp); + fprintf(mfp, "\nFiles Linked [ module(s) ]\n\n"); + hdp = headp; + filep = linkp; + while (filep) { + fprintf(mfp, "%-16s", filep->f_idp); + i = 0; + while ((hdp != NULL) && (hdp->h_lfile == filep)) { + if (i % 5) { + fprintf(mfp, ", %8.8s", hdp->m_id); + } else { + if (i) { + fprintf(mfp, ",\n%20s%8.8s", "", hdp->m_id); + } else { + fprintf(mfp, " [ %8.8s", hdp->m_id); + } + } + hdp = hdp->h_hp; + i++; + } + if (i) + fprintf(mfp, " ]"); + fprintf(mfp, "\n"); + filep = filep->f_flp; + } + /* + * List Linked Libraries + */ + if (lbfhead != NULL) { + fprintf(mfp, + "\nLibraries Linked [ object file ]\n\n"); + for (lbfh=lbfhead; lbfh; lbfh=lbfh->next) { + fprintf(mfp, "%-32s [ %16.16s ]\n", + lbfh->libspc, lbfh->relfil); + } + fprintf(mfp, "\n"); + } + /* + * List Base Address Definitions + */ + if (basep) { + newpag(mfp); + fprintf(mfp, "\nUser Base Address Definitions\n\n"); + bsp = basep; + while (bsp) { + fprintf(mfp, "%s\n", bsp->b_strp); + bsp = bsp->b_base; + } + } + /* + * List Global Definitions + */ + if (globlp) { + newpag(mfp); + fprintf(mfp, "\nUser Global Definitions\n\n"); + gsp = globlp; + while (gsp) { + fprintf(mfp, "%s\n", gsp->g_strp); + gsp = gsp->g_globl; + } + } + fprintf(mfp, "\n\f"); + symdef(mfp); +} + +/*)Function int parse() + * + * The function parse() evaluates all command line or file input + * linker directives and updates the appropriate variables. + * + * local variables: + * int c character value + * char fid[] file id string + * + * global variables: + * char ctype[] array of character types, one per + * ASCII character + * lfile *lfp pointer to current lfile structure + * being processed by parse() + * lfile *linkp pointer to first lfile structure + * containing an input REL file + * specification + * int mflag Map output flag + * int oflag Output file type flag + * int pflag print linker command file flag + * FILE * stderr c_library + * int uflag Relocated listing flag + * int xflag Map file radix type flag + * + * Functions called: + * VOID addlib() lklibr.c + * VOID addpath() lklibr.c + * VOID bassav() lkmain.c + * int fprintf() c_library + * VOID gblsav() lkmain.c + * VOID getfid() lklex.c + * char getnb() lklex.c + * VOID lkexit() lkmain.c + * char * strcpy() c_library + * int strlen() c_library + * + * side effects: + * Various linker flags are updated and the linked + * structure lfile is created. + */ + +int +parse() +{ + register int c; + char fid[NINPUT]; + + while ((c = getnb()) != 0) { + if ( c == ';') + return(0); + if ( c == '-') { + while (ctype[c=get()] & LETTER) { + switch(c) { + + case 'i': + case 'I': + oflag = 1; + break; + + case 's': + case 'S': + oflag = 2; + break; + + case 't': + case 'T': + oflag = 3; + break; + + case 'm': + case 'M': + ++mflag; + break; + + case 'y': /*JCF: memory usage summary output*/ + case 'Y': + ++sflag; + break; + + case 'j': + case 'J': + jflag = 1; + break; + + case 'u': + case 'U': + uflag = 1; + break; + case 'r': + case 'R': + rflag = 1; + break; + case 'x': + case 'X': + xflag = 0; + break; + + case 'q': + case 'Q': + xflag = 1; + break; + + case 'd': + case 'D': + xflag = 2; + break; + + case 'e': + case 'E': + return(1); + + case 'n': + case 'N': + pflag = 0; + break; + + case 'p': + case 'P': + pflag = 1; + break; + + case 'b': + case 'B': + bassav(); + return(0); + + case 'g': + case 'G': + gblsav(); + return(0); + + case 'k': + case 'K': + addpath(); + return(0); + + case 'l': + case 'L': + addlib(); + return(0); + + case 'a': + case 'A': + iramsav(); + return(0); + + case 'v': + case 'V': + xramsav(); + return(0); + + case 'w': + case 'W': + codesav(); + return(0); + + case 'z': + case 'Z': + dflag = 1; + return(0); + default: + fprintf(stderr, "Invalid option\n"); + lkexit(1); + } + } + if ( c == ';') + return(0); + } else + if (ctype[c] & ILL) { + fprintf(stderr, "Invalid input"); + lkexit(1); + } else { + if (linkp == NULL) { + linkp = (struct lfile *) + new (sizeof (struct lfile)); + lfp = linkp; + } else { + lfp->f_flp = (struct lfile *) + new (sizeof (struct lfile)); + lfp = lfp->f_flp; + } + getfid(fid, c); + lfp->f_idp = (char *) new (strlen(fid)+1); + strcpy(lfp->f_idp, fid); + lfp->f_type = F_REL; + } + } + return(0); +} + +/*)Function VOID bassav() + * + * The function bassav() creates a linked structure containing + * the base address strings input to the linker. + * + * local variables: + * none + * + * global variables: + * base *basep The pointer to the first + * base structure + * base *bsp Pointer to the current + * base structure + * char *ip pointer into the REL file + * text line in ib[] + * + * functions called: + * char getnb() lklex.c + * VOID * new() lksym.c + * int strlen() c_library + * char * strcpy() c_library + * VOID unget() lklex.c + * + * side effects: + * The basep structure is created. + */ + +VOID +bassav() +{ + if (basep == NULL) { + basep = (struct base *) + new (sizeof (struct base)); + bsp = basep; + } else { + bsp->b_base = (struct base *) + new (sizeof (struct base)); + bsp = bsp->b_base; + } + unget(getnb()); + bsp->b_strp = (char *) new (strlen(ip)+1); + strcpy(bsp->b_strp, ip); +} + +/*)Function VOID setbas() + * + * The function setbas() scans the base address lines in the + * basep structure, evaluates the arguments, and sets beginning + * address of the specified areas. + * + * local variables: + * int v expression value + * char id[] base id string + * + * global variables: + * area *ap Pointer to the current + * area structure + * area *areap The pointer to the first + * area structure of a linked list + * base *basep The pointer to the first + * base structure + * base *bsp Pointer to the current + * base structure + * char *ip pointer into the REL file + * text line in ib[] + * int lkerr error flag + * + * functions called: + * Addr_T expr() lkeval.c + * int fprintf() c_library + * VOID getid() lklex.c + * char getnb() lklex.c + * int symeq() lksym.c + * + * side effects: + * The base address of an area is set. + */ + +VOID +setbas() +{ + register int v; + char id[NCPS]; + + bsp = basep; + while (bsp) { + ip = bsp->b_strp; + getid(id, -1); + if (getnb() == '=') { + v = expr(0); + for (ap = areap; ap != NULL; ap = ap->a_ap) { + if (symeq(id, ap->a_id)) + break; + } + if (ap == NULL) { + fprintf(stderr, + "ASlink-Warning-No definition of area %s\n", id); + lkerr++; + } else { + ap->a_addr = v; + ap->a_type = 1; /* JLH: value set */ + } + } else { + fprintf(stderr, "ASlink-Warning-No '=' in base expression"); + lkerr++; + } + bsp = bsp->b_base; + } +} + +/*)Function VOID gblsav() + * + * The function gblsav() creates a linked structure containing + * the global variable strings input to the linker. + * + * local variable: + * none + * + * global variables: + * globl *globlp The pointer to the first + * globl structure + * globl *gsp Pointer to the current + * globl structure + * char *ip pointer into the REL file + * text line in ib[] + * int lkerr error flag + * + * functions called: + * char getnb() lklex.c + * VOID * new() lksym.c + * int strlen() c_library + * char * strcpy() c_library + * VOID unget() lklex.c + * + * side effects: + * The globlp structure is created. + */ + +VOID +gblsav() +{ + if (globlp == NULL) { + globlp = (struct globl *) + new (sizeof (struct globl)); + gsp = globlp; + } else { + gsp->g_globl = (struct globl *) + new (sizeof (struct globl)); + gsp = gsp->g_globl; + } + unget(getnb()); + gsp->g_strp = (char *) new (strlen(ip)+1); + strcpy(gsp->g_strp, ip); +} + +/*)Function VOID setgbl() + * + * The function setgbl() scans the global variable lines in the + * globlp structure, evaluates the arguments, and sets a variable + * to this value. + * + * local variables: + * int v expression value + * char id[] base id string + * sym * sp pointer to a symbol structure + * + * global variables: + * char *ip pointer into the REL file + * text line in ib[] + * globl *globlp The pointer to the first + * globl structure + * globl *gsp Pointer to the current + * globl structure + * FILE * stderr c_library + * int lkerr error flag + * + * functions called: + * Addr_T expr() lkeval.c + * int fprintf() c_library + * VOID getid() lklex.c + * char getnb() lklex.c + * sym * lkpsym() lksym.c + * + * side effects: + * The value of a variable is set. + */ + +VOID +setgbl() +{ + register int v; + register struct sym *sp; + char id[NCPS]; + + gsp = globlp; + while (gsp) { + ip = gsp->g_strp; + getid(id, -1); + if (getnb() == '=') { + v = expr(0); + sp = lkpsym(id, 0); + if (sp == NULL) { + fprintf(stderr, + "No definition of symbol %s\n", id); + lkerr++; + } else { + if (sp->s_flag & S_DEF) { + fprintf(stderr, + "Redefinition of symbol %s\n", id); + lkerr++; + sp->s_axp = NULL; + } + sp->s_addr = v; + sp->s_type |= S_DEF; + } + } else { + fprintf(stderr, "No '=' in global expression"); + lkerr++; + } + gsp = gsp->g_globl; + } +} + +/*)Function FILE * afile(fn,, ft, wf) + * + * char * fn file specification string + * char * ft file type string + * int wf read(0)/write(1) flag + * + * The function afile() opens a file for reading or writing. + * (1) If the file type specification string ft + * is not NULL then a file specification is + * constructed with the file path\name in fn + * and the extension in ft. + * (2) If the file type specification string ft + * is NULL then the file specification is + * constructed from fn. If fn does not have + * a file type then the default .rel file + * type is appended to the file specification. + * + * afile() returns a file handle for the opened file or aborts + * the assembler on an open error. + * + * local variables: + * char fb[] constructed file specification string + * FILE * fp filehandle for opened file + * + * global variables: + * int lkerr error flag + * + * functions called: + * FILE * fopen() c_library + * int fprintf() c_library + * + * side effects: + * File is opened for read or write. + */ + +FILE * +afile(char *fn, char *ft, int wf) +{ + FILE *fp; + char fb[PATH_MAX]; + char *omode; + int i; + + switch (wf) { + case 0: omode = "r"; break; + case 1: omode = "w"; break; + case 2: omode = "a"; break; + case 3: omode = "rb"; break; + case 4: omode = "wb"; break; + case 5: omode = "ab"; break; + default: omode = "r"; break; + } + + /*Look backward the name path and get rid of the extension, if any*/ + i=strlen(fn); + for(; (fn[i]!='.')&&(fn[i]!='\\')&&(fn[i]!='/')&&(i>0); i--); + if( (fn[i]=='.') && strcmp(ft, "lnk") ) + { + strncpy(fb, fn, i); + fb[i]=0; + } + else + { + strcpy(fb, fn); + } + + /*Add the extension*/ + if (fb[i] != '.') + { + strcat(fb, "."); + strcat(fb, strlen(ft)?ft:"rel"); + } + + fp = fopen(fb, omode); + if (fp==NULL) + { + if (strcmp(ft,"adb"))/*Do not complaint for optional adb files*/ + { + fprintf(stderr, "%s: cannot %s.\n", fb, wf?"create":"open"); + lkerr++; + } + } + return (fp); +} + +/*)Function VOID iramsav() + * + * The function iramsav() stores the size of the chip's internal RAM. + * This is used after linking to check that variable assignment to this + * dataspace didn't overflow into adjoining segments. Variables in the + * DSEG, OSEG, and ISEG are assigned to this dataspace. + * + * local variables: + * none + * + * global variables: + * char *ip pointer into the REL file + * text line in ib[] + * unsigned int size of chip's internal + * iram_size RAM segment + * + * functions called: + * char getnb() lklex.c + * VOID unget() lklex.c + * Addr_T expr() lkeval.c + * + * side effects: + * The iram_size may be modified. + */ + +VOID +iramsav() +{ + unget(getnb()); + if (ip && *ip) + iram_size = expr(0); /* evaluate size expression */ + else + iram_size = 128; /* Default is 128 (0x80) bytes */ +} + +/*Similar to iramsav but for xram memory*/ +VOID +xramsav() +{ + unget(getnb()); + if (ip && *ip) + xram_size = expr(0); /* evaluate size expression */ + else + xram_size = rflag?0x1000000:0x10000; +} + +/*Similar to iramsav but for code memory*/ +VOID +codesav() +{ + unget(getnb()); + if (ip && *ip) + code_size = expr(0); /* evaluate size expression */ + else + code_size = rflag?0x1000000:0x10000; +} + + +/*)Function VOID iramcheck() + * + * The function iramcheck() is used at the end of linking to check that + * the internal RAM area wasn't overflowed by too many variable + * assignments. Variables in the DSEG, ISEG, and OSEG are assigned to + * the chip's internal RAM. + * + * local variables: + * none + * + * global variables: + * unsigned int size of chip's internal + * iram_size RAM segment + * struct area linked list of memory + * *areap areas + * + * functions called: + * + * side effects: + */ + +VOID +iramcheck() +{ + register unsigned int last_addr; + register struct area *ap; + + for (ap = areap; ap; ap=ap->a_ap) { + if ((ap->a_size != 0) && + (!strcmp(ap->a_id, "DSEG") || + !strcmp(ap->a_id, "OSEG") || + !strcmp(ap->a_id, "ISEG") + ) + ) + { + last_addr = ap->a_addr + ap->a_size - 1; + if (last_addr >= iram_size) + fprintf(stderr, + "\nWARNING! Segment %s extends past the end\n" + " of internal RAM. Check map file.\n", + ap->a_id); + } + } +} + +char *usetxt[] = { + "Startup:", + " -c Command line input", + " -f file[LNK] File input", + " -p Prompt and echo of file[LNK] to stdout (default)", + " -n No echo of file[LNK] to stdout", +/* "Usage: [-Options] file [file ...]", */ + "Libraries:", + " -k Library path specification, one per -k", + " -l Library file specification, one per -l", + "Relocation:", + " -b area base address = expression", + " -g global symbol = expression", + "Map format:", + " -m Map output generated as file[MAP]", + " -x Hexadecimal (default), -d Decimal, -q Octal", + "Output:", + " -i Intel Hex as file[IHX]", + " -s Motorola S19 as file[S19]", + " -t ELF executable as file[elf]", + " -j Produce NoICE debug as file[NOI]", + " -z Produce SDCdb debug as file[cdb]", +/* "List:", */ + " -u Update listing file(s) with link data as file(s)[.RST]", + "Miscellaneous:\n" + " -a [iram-size] Check for internal RAM overflow", + " -v [xram-size] Check for external RAM overflow", + " -w [code-size] Check for code overflow", + "End:", + " -e or null line terminates input", + 0 +}; + +/*)Function VOID usage() + * + * The function usage() outputs to the stderr device the + * assembler name and version and a list of valid assembler options. + * + * local variables: + * char ** dp pointer to an array of + * text string pointers. + * + * global variables: + * FILE * stderr c_library + * + * functions called: + * int fprintf() c_library + * + * side effects: + * none + */ + +VOID +usage() +{ + register char **dp; + + fprintf(stderr, "\nASxxxx Linker %s\n\n", VERSION); + for (dp = usetxt; *dp; dp++) + fprintf(stderr, "%s\n", *dp); + lkexit(1); +} + +/*)Function VOID copyfile() + * + * FILE *dest destination file + * FILE *src source file + * + * function will copy source file to destination file + * + * + * functions called: + * int fgetc() c_library + * int fputc() c_library + * + * side effects: + * none + */ +VOID copyfile (dest,src) +FILE *src,*dest ; +{ + int ch; + + while ((ch = fgetc(src)) != EOF) { + fputc(ch,dest); + } +} diff --git a/as/link/hc08/lkmem.c b/as/link/hc08/lkmem.c new file mode 100644 index 0000000..433e905 --- /dev/null +++ b/as/link/hc08/lkmem.c @@ -0,0 +1,357 @@ +/* lkmem.c - Create a memory summary file with extension .mem + + Copyright (C) 2002 Jesus Calvino-Fraga, jesusc at ieee dot org + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include +#include "aslink.h" + +int summary(struct area * areap) +{ + #define EQ(A,B) !as_strcmpi((A),(B)) + #define MIN_STACK 16 + #define REPORT_ERROR(A, H) \ + {\ + fprintf(of, "%s%s", (H)?"*** ERROR: ":"", (A)); \ + fprintf(stderr, "%s%s", (H)?"\n?ASlink-Error-":"",(A)); \ + toreturn=1; \ + } + + #define REPORT_WARNING(A, H) \ + { \ + fprintf(of, "%s%s", (H)?"*** WARNING: ":"", (A)); \ + fprintf(stderr, "%s%s",(H)?"\n?ASlink-Warning-":"", (A)); \ + } + + char buff[128]; + int j, toreturn=0; + unsigned int Total_Last=0, k; + + struct area * xp; + FILE * of; + + /*Artifacts used for printing*/ + char start[15], end[15], size[15], max[15]; + char format[]=" %-16.16s %-8.8s %-8.8s %-8.8s %-8.8s\n"; + char line[]="---------------------"; + + typedef struct + { + unsigned long Start; + unsigned long Size; + unsigned long Max; + char Name[NCPS]; + unsigned long flag; + } _Mem; + + unsigned int dram[0x100]; + _Mem Ram[]={ + {0, 0, 0, "REG_BANK_0", 0x0001}, + {0x0, 0, 0, "REG_BANK_1", 0x0002}, + {0x0, 0, 0, "REG_BANK_2", 0x0004}, + {0x0, 0, 0, "REG_BANK_3", 0x0008}, + {0x0, 0, 0, "BSEG_BYTES", 0x0010}, + {0, 0, 256, "UNUSED", 0x0000}, + {0xff, 0, 256, "DATA", 0x0020}, + {0, 0, 256, "TOTAL:", 0x0000} + }; + + _Mem IRam= {0xff, 0, 0, "INDIRECT RAM", 0x0080}; + _Mem Stack={0xff, 0, 1, "STACK", 0x0000}; + _Mem XRam= {0xffff, 0, 65536, "EXTERNAL RAM", 0x0100}; + _Mem Rom= {0xffff, 0, 65536, "ROM/EPROM/FLASH", 0x0200}; + +#if 0 + if(rflag) /*For the DS390*/ + { + XRam.Max=0x1000000; /*24 bits*/ + XRam.Start=0xffffff; + Rom.Max=0x1000000; + Rom.Start=0xffffff; + } + + if((iram_size<=0)||(iram_size>0x100)) /*Default: 8052 like memory*/ + { + Ram[5].Max=0x80; + Ram[6].Max=0x80; + Ram[7].Max=0x80; + IRam.Max=0x80; + iram_size=0x100; + } + else if(iram_size<0x80) + { + Ram[5].Max=iram_size; + Ram[6].Max=iram_size; + Ram[7].Max=iram_size; + IRam.Max=0; + } + else + { + Ram[5].Max=0x80; + Ram[6].Max=0x80; + Ram[7].Max=0x80; + IRam.Max=iram_size-0x80; + } +#endif + + for(j=0; j<(int)iram_size; j++) dram[j]=0; + for(; j<0x100; j++) dram[j]=0x8000; /*Memory not available*/ + + /* Open Memory Summary File*/ + of = afile(linkp->f_idp, "mem", 1); + if (of == NULL) + { + lkexit(1); + } + + xp=areap; + while (xp) + { + /**/ if (EQ(xp->a_id, "REG_BANK_0")) + { + Ram[0].Size=xp->a_size; + } + else if (EQ(xp->a_id, "REG_BANK_1")) + { + Ram[1].Size=xp->a_size; + } + else if (EQ(xp->a_id, "REG_BANK_2")) + { + Ram[2].Size=xp->a_size; + } + else if (EQ(xp->a_id, "REG_BANK_3")) + { + Ram[3].Size=xp->a_size; + } + else if (EQ(xp->a_id, "BSEG_BYTES")) + { + Ram[4].Size=xp->a_size; + } + else if ( EQ(xp->a_id, "DSEG") || EQ(xp->a_id, "OSEG") ) + { + Ram[6].Size+=xp->a_size; + if(xp->a_addra_addr; + } + + else if( EQ(xp->a_id, "CSEG") || EQ(xp->a_id, "GSINIT") || + EQ(xp->a_id, "GSFINAL") || EQ(xp->a_id, "HOME") ) + { + Rom.Size+=xp->a_size; + if(xp->a_addra_addr; + } + + else if (EQ(xp->a_id, "SSEG")) + { + Stack.Size+=xp->a_size; + if(xp->a_addra_addr; + } + + else if (EQ(xp->a_id, "XSEG") || EQ(xp->a_id, "XISEG")) + { + XRam.Size+=xp->a_size; + if(xp->a_addra_addr; + } + + else if (EQ(xp->a_id, "ISEG")) + { + IRam.Size+=xp->a_size; + if(xp->a_addra_addr; + } + xp=xp->a_ap; + } + + for(j=0; j<7; j++) + for(k=Ram[j].Start; (k<(Ram[j].Start+Ram[j].Size))&&(k<0x100); k++) + dram[k]|=Ram[j].flag; /*Mark as used*/ + +#if 0 + for(k=IRam.Start; (k<(IRam.Start+IRam.Size))&&(k<0x100); k++) + dram[k]|=IRam.flag; /*Mark as used*/ +#endif + + /*Compute the amount of unused memory in direct data Ram. This is the + gap between the last register bank or bit segment and the data segment.*/ + for(k=Ram[6].Start-1; (dram[k]==0) && (k>0); k--); + Ram[5].Start=k+1; + Ram[5].Size=Ram[6].Start-Ram[5].Start; /*It may be zero (which is good!)*/ + + /*Compute the data Ram totals*/ + for(j=0; j<7; j++) + { + if(Ram[7].Start>Ram[j].Start) Ram[7].Start=Ram[j].Start; + Ram[7].Size+=Ram[j].Size; + } + Total_Last=Ram[6].Size+Ram[6].Start-1; + + /*Report the Ram totals*/ + fprintf(of, "Direct Internal RAM:\n"); + fprintf(of, format, "Name", "Start", "End", "Size", "Max"); + + for(j=0; j<8; j++) + { + if((j==0) || (j==7)) fprintf(of, format, line, line, line, line, line); + if((j!=5) || (Ram[j].Size>0)) + { + sprintf(start, "0x%02lx", Ram[j].Start); + if(Ram[j].Size==0) + end[0]=0;/*Empty string*/ + else + sprintf(end, "0x%02lx", j==7?Total_Last:Ram[j].Size+Ram[j].Start-1); + sprintf(size, "%5lu", Ram[j].Size); + sprintf(max, "%5lu", Ram[j].Max); + fprintf(of, format, Ram[j].Name, start, end, size, max); + } + } + +#if 0 + for(k=Ram[6].Start; (k<(Ram[6].Start+Ram[6].Size))&&(k<0x100); k++) + { + if(dram[k]!=Ram[6].flag) + { + sprintf(buff, "Internal memory overlap starting at 0x%02x.\n", k); + REPORT_ERROR(buff, 1); + break; + } + } + + + if(Ram[4].Size>Ram[4].Max) + { + k=Ram[4].Size-Ram[4].Max; + sprintf(buff, "Insufficient bit addressable memory. " + "%d byte%s short.\n", k, (k==1)?"":"s"); + REPORT_ERROR(buff, 1); + } + + if(Ram[5].Size!=0) + { + sprintf(buff, "%ld bytes in data memory wasted. " + "SDCC link could use: --data-loc 0x%02lx\n", + Ram[5].Size, Ram[6].Start-Ram[5].Size); + REPORT_WARNING(buff, 1); + } + + if((Ram[6].Start+Ram[6].Size)>Ram[6].Max) + { + k=(Ram[6].Start+Ram[6].Size)-Ram[6].Max; + sprintf(buff, "Insufficient space in data memory. " + "%d byte%s short.\n", k, (k==1)?"":"s"); + REPORT_ERROR(buff, 1); + } +#endif + /*Report the position of the beginning of the stack*/ + fprintf(of, "\n%stack starts at: 0x%02lx (sp set to 0x%02lx)", + rflag ? "16 bit mode initial s" : "S", Stack.Start, Stack.Start-1); + +#if 0 + /*Check that the stack pointer is landing in a safe place:*/ + if( (dram[Stack.Start] & 0x8000) == 0x8000 ) + { + fprintf(of, ".\n"); + sprintf(buff, "Stack set to unavailable memory.\n"); + REPORT_ERROR(buff, 1); + } + else if(dram[Stack.Start]) + { + fprintf(of, ".\n"); + sprintf(buff, "Stack overlaps area "); + REPORT_ERROR(buff, 1); + for(j=0; j<7; j++) + { + if(dram[Stack.Start]&Ram[j].flag) + { + sprintf(buff, "'%s'\n", Ram[j].Name); + break; + } + } + if(dram[Stack.Start]&IRam.flag) + { + sprintf(buff, "'%s'\n", IRam.Name); + } + REPORT_ERROR(buff, 0); + } + else + { + for(j=Stack.Start, k=0; (j<(int)iram_size)&&(dram[j]==0); j++, k++); + fprintf(of, " with %d bytes available\n", k); + if (k(IRam.Max+0x80)) + { + sprintf(buff, "Insufficient INDIRECT RAM memory.\n"); + REPORT_ERROR(buff, 1); + } +#endif + if( ((XRam.Start+XRam.Size)>XRam.Max) || + (((int)XRam.Size>xram_size)&&(xram_size>=0)) ) + { + sprintf(buff, "Insufficient EXTERNAL RAM memory.\n"); + REPORT_ERROR(buff, 1); + } + if( ((Rom.Start+Rom.Size)>Rom.Max) || + (((int)Rom.Size>code_size)&&(code_size>=0)) ) + { + sprintf(buff, "Insufficient ROM/EPROM/FLASH memory.\n"); + REPORT_ERROR(buff, 1); + } + + fclose(of); + return toreturn; +} diff --git a/as/link/hc08/lkrloc.c b/as/link/hc08/lkrloc.c new file mode 100644 index 0000000..ca6f358 --- /dev/null +++ b/as/link/hc08/lkrloc.c @@ -0,0 +1,1447 @@ +/* lkrloc.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 29-Oct-97 JLH: + * - errdmp: show s_id as string rather than array [NCPS] + * - relr: add support for 11 bit 8051 addressing + * 02-Apr-98 JLH: don't output empty hex records + */ + +#include +#include +#include "aslink.h" + +/*)Module lkrloc.c + * + * The module lkrloc.c contains the functions which + * perform the relocation calculations. + * + * lkrloc.c contains the following functions: + * Addr_T adb_b() + * Addr_T adb_lo() + * Addr_T adb_hi() + * Addr_T adw_w() + * Addr_T adw_lo() + * Addr_T adw_hi() + * VOID erpdmp() + * VOID errdmp() + * Addr_T evword() + * VOID prntval() + * VOID rele() + * VOID relerr() + * VOID relerp() + * VOID reloc() + * VOID relp() + * VOID relr() + * VOID relt() + * + * lkrloc.c the local variable errmsg[]. + * + */ + +/* Global which holds the upper 16 bits of the last 32 bit area adress + * output. Useful only for iHex mode. + */ +int lastExtendedAddress=-1; + +/* Static variable which holds the index of last processed area. + * Useful only for iHex mode. + */ +static int lastAreaIndex = -1; + +/*)Function VOID reloc(c) + * + * char c process code + * + * The function reloc() calls a particular relocation + * function determined by the process code. + * + * local variable: + * none + * + * global variables: + * int lkerr error flag + * + * called functions: + * int fprintf() c_library + * VOID rele() lkrloc.c + * VOID relp() lkrloc.c + * VOID relr() lkrloc.c + * VOId relt() lkrloc.c + * + * side effects: + * Refer to the called relocation functions. + * + */ + +VOID reloc(char c) +{ + switch(c) { + + case 'T': + relt(); + break; + + case 'R': + relr(); + break; + + case 'P': + relp(); + break; + + case 'E': + rele(); + break; + + default: + fprintf(stderr, "Undefined Relocation Operation\n"); + lkerr++; + break; + + } +} + + +/*)Function VOID relt() + * + * The function relt() evaluates a T line read by + * the linker. Each byte value read is saved in the + * rtval[] array, rtflg[] is set, and the number of + * evaluations is maintained in rtcnt. + * + * T Line + * + * T xx xx nn nn nn nn nn ... + * + * + * In: "T n0 n1 n2 n3 ... nn" + * + * Out: 0 1 2 .. rtcnt + * +----+----+----+----+----+ + * rtval | n0 | n1 | n2 | .. | nn | + * +----+----+----+----+----+ + * rtflag| 1 | 1 | 1 | 1 | 1 | + * +----+----+----+----+----+ + * + * The T line contains the assembled code output by the assem- + * bler with xx xx being the offset address from the current area + * base address and nn being the assembled instructions and data in + * byte format. + * + * local variable: + * none + * + * global variables: + * int rtcnt number of values evaluated + * int rtflg[] array of evaluation flags + * int rtval[] array of evaluation values + * + * called functions: + * int eval() lkeval.c + * int more() lklex.c + * + * side effects: + * Linker input T line evaluated. + * + */ + +VOID relt(VOID) +{ + rtcnt = 0; + while (more()) { + if (rtcnt < NTXT) { + rtval[rtcnt] = eval(); + rtflg[rtcnt] = 1; + rtcnt++; + } + } +} + +/*)Function VOID relr() + * + * The function relr() evaluates a R line read by + * the linker. The R line data is combined with the + * previous T line data to perform the relocation of + * code and data bytes. The S19 / IHX output and + * translation of the LST files to RST files may be + * performed. + * + * R Line + * + * R 0 0 nn nn n1 n2 xx xx ... + * + * The R line provides the relocation information to the linker. + * The nn nn value is the current area index, i.e. which area the + * current values were assembled. Relocation information is en- + * coded in groups of 4 bytes: + * + * 1. n1 is the relocation mode and object format + * 1. bit 0 word(0x00)/byte(0x01) + * 2. bit 1 relocatable area(0x00)/symbol(0x02) + * 3. bit 2 normal(0x00)/PC relative(0x04) relocation + * 4. bit 3 1-byte(0x00)/2-byte(0x08) object format for + * byte data + * 5. bit 4 signed(0x00)/unsigned(0x10) byte data + * 6. bit 5 normal(0x00)/page '0'(0x20) reference + * 7. bit 6 normal(0x00)/page 'nnn'(0x40) reference + * + * 2. n2 is a byte index into the corresponding (i.e. pre- + * ceeding) T line data (i.e. a pointer to the data to be + * updated by the relocation). The T line data may be + * 1-byte or 2-byte byte data format or 2-byte word + * format. + * + * 3. xx xx is the area/symbol index for the area/symbol be- + * ing referenced. the corresponding area/symbol is found + * in the header area/symbol lists. + * + * The groups of 4 bytes are repeated for each item requiring relo- + * cation in the preceeding T line. + * + * local variable: + * areax **a pointer to array of area pointers + * int aindex area index + * char *errmsg[] array of pointers to error strings + * int error error code + * int lkerr error flag + * int mode relocation mode + * adrr_t paga paging base area address + * Addr_T pags paging symbol address + * Addr_T pc relocated base address + * Addr_T r PCR relocation value + * Addr_T reli relocation initial value + * Addr_T relv relocation final value + * int rindex symbol / area index + * Addr_T rtbase base code address + * Addr_T rtofst rtval[] index offset + * int rtp index into T data + * sym **s pointer to array of symbol pointers + * + * global variables: + * head *hp pointer to the head structure + * rerr rerr linker error structure + * FILE *stderr standard error device + * + * called functions: + * Addr_T adb_b() lkrloc.c + * Addr_T adb_lo() lkrloc.c + * Addr_T adb_hi() lkrloc.c + * Addr_T adw_w() lkrloc.c + * VOID elf() lkelf.c + * Addr_T evword() lkrloc.c + * int eval() lkeval.c + * int fprintf() c_library + * VOID ihx() lkihx.c + * int lkulist lklist.c + * int more() lklex.c + * VOID relerr() lkrloc.c + * VOID s19() lks19.c + * int symval() lksym.c + * + * side effects: + * The R and T lines are combined to produce + * relocated code and data. Output S19 / IHX + * and relocated listing files may be produced. + * + */ + +VOID relr(VOID) +{ + register int mode; + register Addr_T reli, relv; + int aindex, rindex, rtp, error; + Addr_T r, rtbase, rtofst, paga, pags, pc; + struct areax **a; + struct sym **s; + + /* + * Get area and symbol lists + */ + a = hp->a_list; + s = hp->s_list; + + /* + * Verify Area Mode + */ + if (eval() != (R_WORD | R_AREA) || eval()) { + fprintf(stderr, "R input error\n"); + lkerr++; + } + + /* + * Get area pointer + */ + aindex = evword(); + if (aindex >= hp->h_narea) { + fprintf(stderr, "R area error\n"); + lkerr++; + return; + } + ap = a[aindex]->a_bap; + + /* + * Base values + */ + rtbase = adw_w(0, 0); + rtofst = 2; + + /* + * Relocate address + */ + pc = adw_w(a[aindex]->a_addr, 0); + + #if 0 + printf("area %d base address: 0x%x size: 0x%x rtbase: 0x%x\n", aindex, + a[aindex]->a_addr, a[aindex]->a_size, rtbase); + #endif + /* + * Do remaining relocations + */ + while (more()) { + error = 0; + mode = eval(); + + if ((mode & R_ESCAPE_MASK) == R_ESCAPE_MASK) + { + mode = ((mode & ~R_ESCAPE_MASK) << 8) | eval(); + /* printf("unescaping rmode\n"); */ + } + + rtp = eval(); + rindex = evword(); + + /* + * R_SYM or R_AREA references + */ + if (mode & R_SYM) { + if (rindex >= hp->h_nglob) { + fprintf(stderr, "R symbol error\n"); + lkerr++; + return; + } + reli = symval(s[rindex]); + } else { + if (rindex >= hp->h_narea) { + fprintf(stderr, "R area error\n"); + lkerr++; + return; + } + reli = a[rindex]->a_addr; + } + + /* + * R_PCR addressing + */ + if (mode & R_PCR) { + if (mode & R_BYTE) { + reli -= (pc + (rtp-rtofst) + 1); + } else { + reli -= (pc + (rtp-rtofst) + 2); + } + } + + /* + * R_PAG0 or R_PAG addressing + */ + if (mode & (R_PAG0 | R_PAG)) { + paga = sdp.s_area->a_addr; + pags = sdp.s_addr; + reli -= paga + pags; + } + + /* + * R_BYTE or R_WORD operation + */ + if (mode & R_BYTE) { + if (mode & R_BYT3) + { + /* This is a three byte address, of which + * we will select one byte. + */ + if (mode & R_HIB) + { + /* printf("24 bit address selecting hi byte.\n"); */ + relv = adb_24_hi(reli, rtp); + } + else if (mode & R_MSB) + { + /* Note that in 24 bit mode, R_MSB + * is really the middle byte, not + * the most significant byte. + * + * This is ugly and I can only apologize + * for any confusion. + */ + /* printf("24 bit address selecting middle byte.\n"); */ + relv = adb_24_mid(reli, rtp); + } + else + { + /* printf("24 bit address selecting lo byte.\n"); */ + relv = adb_24_lo(reli, rtp); + } + } + else if (mode & R_BYT2) { + /* This is a two byte address, of + * which we will select one byte. + */ + if (mode & R_MSB) { + relv = adb_hi(reli, rtp); + } else { + relv = adb_lo(reli, rtp); + } + } else { + relv = adb_b(reli, rtp); + } + } else if (IS_R_J11(mode)) { + /* JLH: 11 bit jump destination for 8051. Forms + / two byte instruction with op-code bits + / in the MIDDLE! + / rtp points at 3 byte locus: first two + / will get the instructiion. third one + / has raw op-code. + */ + + /* Calculate absolute destination + / relv must be on same 2K page as pc + */ + relv = adw_w(reli, rtp); + + if ((relv & ~0x7ff) != ((pc + rtp - rtofst) & ~0x7ff)) { + error = 2; + } + + /* Merge MSB (byte 0) with op-code, ignoring + / top 5 bits of address. Then hide the op-code + */ + rtval[rtp] = ((rtval[rtp] & 0x07)<<5) | rtval[rtp+2]; + rtflg[rtp+2] = 0; + rtofst += 1; + } + else if (IS_R_J19(mode)) { + /* 19 bit jump destination for DS80C390. Forms + / three byte instruction with op-code bits + / in the MIDDLE! + / rtp points at 4 byte locus: first three + / will get the instructiion. fourth one + / has raw op-code. + */ + + /* Calculate absolute destination + / relv must be on same 512K page as pc + */ + relv = adw_24(reli, rtp); + + if ((relv & ~0x7ffff) != ((pc + rtp - rtofst) & ~0x7ffff)) { + error = 2; + } + + /* Merge MSB (byte 0) with op-code, ignoring + / top 5 bits of address. Then hide the op-code + */ + rtval[rtp] = ((rtval[rtp] & 0x07)<<5) | rtval[rtp+3]; + rtflg[rtp+3] = 0; + rtofst += 1; + } + else if (IS_C24(mode)) + { + /* 24 bit address */ + relv = adw_24(reli, rtp); + } + else + { + /* 16 bit address. */ + relv = adw_w(reli, rtp); + } + + /* + * R_BYTE with R_BYT2 offset adjust + */ + if (mode & R_BYTE) { + if (mode & R_BYT2) { + rtofst += 1; + } + } + + /* + * Unsigned Byte Checking + */ + if (mode & R_USGN && mode & R_BYTE && relv & ~0xFF) + error = 1; + + /* + * PCR Relocation Error Checking + */ + if (mode & R_PCR && mode & R_BYTE) { + r = relv & ~0x7F; + if (r != (Addr_T) ~0x7F && r != 0) + error = 2; + } + + /* + * Page Relocation Error Checking + */ + /* if (mode & R_PAG0 && (relv & ~0xFF || paga || pags)) + error = 3;*/ + if (mode & R_PAG && (relv & ~0xFF)) + error = 4; + + /* + * Error Processing + */ + if (error) { + rerr.aindex = aindex; + rerr.mode = mode; + rerr.rtbase = rtbase + rtp - rtofst - 1; + rerr.rindex = rindex; + rerr.rval = relv - reli; + relerr(errmsg[error-1]); + } + } + if (uflag != 0) { + lkulist(1); + } + + /* JLH: output only if data (beyond two byte address) */ + if ((oflag == 1) && (rtcnt > 2)) { + // int extendedAddress = (a[aindex]->a_addr >> 16) & 0xffff; + + /* Boy, is this a hack: for ABS sections, the + * base address is stored as zero, and the T records + * indicate the offset from zero. + * + * Since T records can only indicate a 16 bit offset, this + * obviously creates a problem for ABS segments located + * above 64K (this is only meaningful in flat24 mode). + * + * However, the size of an ABS area is stored as + * base address + section size (I suspect this is a bug, + * but it's a handy one right now). So the upper 8 bits of + * the 24 bit address are stored in the size record. + * Thus we add it in. + * + * This is another reason why we can't have areas greater + * than 64K yet, even in flat24 mode. + */ + // extendedAddress += ((a[aindex]->a_size) >> 16 & 0xffff); + // commented out by jr + + if (lastAreaIndex != aindex) { + lastAreaIndex = aindex; + ihxNewArea(); + } +#if 0 + if (extendedAddress != lastExtendedAddress) + { + + if (lastExtendedAddress!=-1) { + printf("output extended linear address record 0x%x 0x%x\n", + extendedAddress, lastExtendedAddress); + } + + if (rflag) + { + ihxExtendedLinearAddress(extendedAddress); + } + else if (extendedAddress) + { + /* Not allowed to generate extended address records, + * but one is called for here... + */ + fprintf(stderr, + "warning: extended linear address encountered; " + "you probably want the -r flag.\n"); + } + lastExtendedAddress = extendedAddress; + } +#endif + ihx(1); + } else + if ((oflag == 2) && (rtcnt > 2)) { + s19(1); + } else + if ((oflag == 3) && (rtcnt > 2)) { + elf(1); + } +} + +char *errmsg[] = { + "Unsigned Byte error", + "Byte PCR relocation error", + "Page0 relocation error", + "Page Mode relocation error" +}; + + +/*)Function VOID relp() + * + * The function relp() evaluates a P line read by + * the linker. The P line data is combined with the + * previous T line data to set the base page address + * and test the paging boundary and length. + * + * P Line + * + * P 0 0 nn nn n1 n2 xx xx + * + * The P line provides the paging information to the linker as + * specified by a .setdp directive. The format of the relocation + * information is identical to that of the R line. The correspond- + * ing T line has the following information: + * T xx xx aa aa bb bb + * + * Where aa aa is the area reference number which specifies the + * selected page area and bb bb is the base address of the page. + * bb bb will require relocation processing if the 'n1 n2 xx xx' is + * specified in the P line. The linker will verify that the base + * address is on a 256 byte boundary and that the page length of an + * area defined with the PAG type is not larger than 256 bytes. + * + * local variable: + * areax **a pointer to array of area pointers + * int aindex area index + * int mode relocation mode + * Addr_T relv relocation value + * int rindex symbol / area index + * int rtp index into T data + * sym **s pointer to array of symbol pointers + * + * global variables: + * head *hp pointer to the head structure + * int lkerr error flag + * sdp sdp base page structure + * FILE *stderr standard error device + * + * called functions: + * Addr_T adw_w() lkrloc.c + * Addr_T evword() lkrloc.c + * int eval() lkeval.c + * int fprintf() c_library + * int more() lklex.c + * int symval() lksym.c + * + * side effects: + * The P and T lines are combined to set + * the base page address and report any + * paging errors. + * + */ + +VOID relp(VOID) +{ + register int aindex, rindex; + int mode, rtp; + Addr_T relv; + struct areax **a; + struct sym **s; + + /* + * Get area and symbol lists + */ + a = hp->a_list; + s = hp->s_list; + + /* + * Verify Area Mode + */ + if (eval() != (R_WORD | R_AREA) || eval()) { + fprintf(stderr, "P input error\n"); + lkerr++; + } + + /* + * Get area pointer + */ + aindex = evword(); + if (aindex >= hp->h_narea) { + fprintf(stderr, "P area error\n"); + lkerr++; + return; + } + + /* + * Do remaining relocations + */ + while (more()) { + mode = eval(); + rtp = eval(); + rindex = evword(); + + /* + * R_SYM or R_AREA references + */ + if (mode & R_SYM) { + if (rindex >= hp->h_nglob) { + fprintf(stderr, "P symbol error\n"); + lkerr++; + return; + } + relv = symval(s[rindex]); + } else { + if (rindex >= hp->h_narea) { + fprintf(stderr, "P area error\n"); + lkerr++; + return; + } + relv = a[rindex]->a_addr; + } + adw_w(relv, rtp); + } + + /* + * Paged values + */ + aindex = adw_w(0,2); + if (aindex >= hp->h_narea) { + fprintf(stderr, "P area error\n"); + lkerr++; + return; + } + sdp.s_areax = a[aindex]; + sdp.s_area = sdp.s_areax->a_bap; + sdp.s_addr = adw_w(0,4); + if (sdp.s_area->a_addr & 0xFF || sdp.s_addr & 0xFF) + relerp("Page Definition Boundary Error"); +} + +/*)Function VOID rele() + * + * The function rele() closes all open output files + * at the end of the linking process. + * + * local variable: + * none + * + * global variables: + * int oflag output type flag + * int uflag relocation listing flag + * + * called functions: + * VOID elf() lkelf.c + * VOID ihx() lkihx.c + * VOID lkulist() lklist.c + * VOID s19() lks19.c + * + * side effects: + * All open output files are closed. + * + */ + +VOID rele(VOID) +{ + if (uflag != 0) { + lkulist(0); + } + if (oflag == 1) { + ihx(0); + } else + if (oflag == 2) { + s19(0); + } else + if (oflag == 3) { + elf(0); + } +} + +/*)Function Addr_T evword() + * + * The function evword() combines two byte values + * into a single word value. + * + * local variable: + * Addr_T v temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * int eval() lkeval.c + * + * side effects: + * Relocation text line is scanned to combine + * two byte values into a single word value. + * + */ + +Addr_T evword(VOID) +{ + register Addr_T v; + + if (hilo) { + v = (eval() << 8); + v += eval(); + } else { + v = eval(); + v += (eval() << 8); + } + return(v); +} + +/*)Function Addr_T adb_b(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_b() adds the value of v to + * the single byte value contained in rtval[i]. + * The new value of rtval[i] is returned. + * + * local variable: + * none + * + * global variables: + * none + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * + */ + +Addr_T adb_b(register Addr_T v, register int i) +{ + return(rtval[i] += v); +} + +/*)Function Addr_T adb_lo(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_lo() adds the value of v to the + * double byte value contained in rtval[i] and rtval[i+1]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The MSB rtflg[] is cleared. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The rtflg[] value corresponding to the + * MSB of the word value is cleared to reflect + * the fact that the LSB is the selected byte. + * + */ + +Addr_T adb_lo(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_w(v, i); + /* + * Remove Hi byte + */ + if (hilo) { + rtflg[i] = 0; + } else { + rtflg[i+1] = 0; + } + return (j); +} + +/*)Function Addr_T adb_hi(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_hi() adds the value of v to the + * double byte value contained in rtval[i] and rtval[i+1]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The LSB rtflg[] is cleared. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The rtflg[] value corresponding to the + * LSB of the word value is cleared to reflect + * the fact that the MSB is the selected byte. + * + */ + +Addr_T adb_hi(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_w(v, i); + /* + * Remove Lo byte + */ + if (hilo) { + rtflg[i+1] = 0; + } else { + rtflg[i] = 0; + } + return (j); +} + +/*)Function Addr_T adb_24_hi(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_24_hi() adds the value of v to the + * 24 bit value contained in rtval[i] - rtval[i+2]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The LSB & middle byte rtflg[] is cleared. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The rtflg[] value corresponding to the + * LSB & middle byte of the word value is cleared to + * reflect the fact that the MSB is the selected byte. + * + */ + +Addr_T adb_24_hi(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_24(v, i); + + /* Remove the lower two bytes. */ + if (hilo) + { + rtflg[i+2] = 0; + } + else + { + rtflg[i] = 0; + } + rtflg[i+1] = 0; + + return (j); +} + +/*)Function Addr_T adb_24_mid(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_24_mid() adds the value of v to the + * 24 bit value contained in rtval[i] - rtval[i+2]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The LSB & MSB byte rtflg[] is cleared. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The rtflg[] value corresponding to the + * LSB & MSB of the 24 bit value is cleared to reflect + * the fact that the middle byte is the selected byte. + * + */ + +Addr_T adb_24_mid(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_24(v, i); + + /* remove the MSB & LSB. */ + rtflg[i+2] = 0; + rtflg[i] = 0; + + return (j); +} + +/*)Function Addr_T adb_24_lo(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_24_lo() adds the value of v to the + * 24 bit value contained in rtval[i] - rtval[i+2]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The MSB & middle byte rtflg[] is cleared. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The rtflg[] value corresponding to the + * MSB & middle byte of the word value is cleared to + * reflect the fact that the LSB is the selected byte. + * + */ + +Addr_T adb_24_lo(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_24(v, i); + + /* Remove the upper two bytes. */ + if (hilo) + { + rtflg[i] = 0; + } + else + { + rtflg[i+2] = 0; + } + rtflg[i+1] = 0; + + return (j); +} + +/*)Function Addr_T adw_w(v, i) + * + * int v value to add to word + * int i rtval[] index + * + * The function adw_w() adds the value of v to the + * word value contained in rtval[i] and rtval[i+1]. + * The new value of rtval[i] / rtval[i+1] is returned. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The word value of rtval[] is changed. + * + */ + +Addr_T adw_w(register Addr_T v, register int i) +{ + register Addr_T j; + + if (hilo) { + j = v + (rtval[i] << 8) + (rtval[i+1] & 0xff); + rtval[i] = (j >> 8) & 0xff; + rtval[i+1] = j & 0xff; + } else { + j = v + (rtval[i] & 0xff) + (rtval[i+1] << 8); + rtval[i] = j & 0xff; + rtval[i+1] = (j >> 8) & 0xff; + } + return(j); +} + +/*)Function Addr_T adw_24(v, i) + * + * int v value to add to word + * int i rtval[] index + * + * The function adw_w() adds the value of v to the + * 24 bit value contained in rtval[i] - rtval[i+2]. + * The new value of rtval[i] - rtval[i+2] is returned. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The word value of rtval[] is changed. + * + */ +Addr_T adw_24(Addr_T v, int i) +{ + register Addr_T j; + + if (hilo) { + j = v + ((rtval[i] & 0xff) << 16) + + ((rtval[i+1] & 0xff) << 8) + + (rtval[i+2] & 0xff); + rtval[i] = (j >> 16) & 0xff; + rtval[i+1] = (j >> 8) & 0xff; + rtval[i+2] = j & 0xff; + } else { + j = v + (rtval[i] & 0xff) + + ((rtval[i+1] & 0xff) << 8) + + ((rtval[i+2] & 0xff) << 16); + rtval[i] = j & 0xff; + rtval[i+1] = (j >> 8) & 0xff; + rtval[i+2] = (j >> 16) & 0xff; + } + return(j); +} + +/*)Function Addr_T adw_lo(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adw_lo() adds the value of v to the + * double byte value contained in rtval[i] and rtval[i+1]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The MSB rtval[] is zeroed. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The MSB of the word value is cleared to reflect + * the fact that the LSB is the selected byte. + * + */ + +Addr_T adw_lo(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_w(v, i); + /* + * Clear Hi byte + */ + if (hilo) { + rtval[i] = 0; + } else { + rtval[i+1] = 0; + } + return (j); +} + +/*)Function Addr_T adw_hi(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adw_hi() adds the value of v to the + * double byte value contained in rtval[i] and rtval[i+1]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The MSB and LSB values are interchanged. + * The MSB rtval[] is zeroed. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The MSB and LSB values are interchanged and + * then the MSB cleared. + * + */ + +Addr_T adw_hi(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_w(v, i); + /* + * LSB = MSB, Clear MSB + */ + if (hilo) { + rtval[i+1] = rtval[i]; + rtval[i] = 0; + } else { + rtval[i] = rtval[i+1]; + rtval[i+1] = 0; + } + return (j); +} + +/*)Function VOID relerr(str) + * + * char *str error string + * + * The function relerr() outputs the error string to + * stderr and to the map file (if it is open). + * + * local variable: + * none + * + * global variables: + * FILE *mfp handle for the map file + * + * called functions: + * VOID errdmp() lkrloc.c + * + * side effects: + * Error message inserted into map file. + * + */ + +VOID relerr(char *str) +{ + errdmp(stderr, str); + if (mfp) + errdmp(mfp, str); +} + +/*)Function VOID errdmp(fptr, str) + * + * FILE *fptr output file handle + * char *str error string + * + * The function errdmp() outputs the error string str + * to the device specified by fptr. Additional information + * is output about the definition and referencing of + * the symbol / area error. + * + * local variable: + * int mode error mode + * int aindex area index + * int lkerr error flag + * int rindex error index + * sym **s pointer to array of symbol pointers + * areax **a pointer to array of area pointers + * areax *raxp error area extension pointer + * + * global variables: + * sdp sdp base page structure + * + * called functions: + * int fprintf() c_library + * VOID prntval() lkrloc.c + * + * side effects: + * Error reported. + * + */ + +VOID errdmp(FILE *fptr, char *str) +{ + int mode, aindex, rindex; + struct sym **s; + struct areax **a; + struct areax *raxp; + + a = hp->a_list; + s = hp->s_list; + + mode = rerr.mode; + aindex = rerr.aindex; + rindex = rerr.rindex; + + /* + * Print Error + */ + fprintf(fptr, "\n?ASlink-Warning-%s", str); + lkerr++; + + /* + * Print symbol if symbol based + */ + if (mode & R_SYM) { + fprintf(fptr, " for symbol %s\n", + &s[rindex]->s_id[0]); + } else { + fprintf(fptr, "\n"); + } + + /* + * Print Ref Info + */ + fprintf(fptr, + " file module area offset\n"); + fprintf(fptr, + " Refby %-8.8s %-8.8s %-8.8s ", + hp->h_lfile->f_idp, + &hp->m_id[0], + &a[aindex]->a_bap->a_id[0]); + prntval(fptr, rerr.rtbase); + + /* + * Print Def Info + */ + if (mode & R_SYM) { + raxp = s[rindex]->s_axp; + } else { + raxp = a[rindex]; + } + fprintf(fptr, + " Defin %-8.8s %-8.8s %-8.8s ", + raxp->a_bhp->h_lfile->f_idp, + &raxp->a_bhp->m_id[0], + &raxp->a_bap->a_id[0]); + if (mode & R_SYM) { + prntval(fptr, s[rindex]->s_addr); + } else { + prntval(fptr, rerr.rval); + } +} + +/*)Function VOID prntval(fptr, v) + * + * FILE *fptr output file handle + * Addr_T v value to output + * + * The function prntval() outputs the value v, in the + * currently selected radix, to the device specified + * by fptr. + * + * local variable: + * none + * + * global variables: + * int xflag current radix + * + * called functions: + * int fprintf() c_library + * + * side effects: + * none + * + */ + +VOID prntval(FILE *fptr, Addr_T v) +{ + if (xflag == 0) { + fprintf(fptr, "%04X\n", v); + } else + if (xflag == 1) { + fprintf(fptr, "%06o\n", v); + } else + if (xflag == 2) { + fprintf(fptr, "%05u\n", v); + } +} + +/*)Function VOID relerp(str) + * + * char *str error string + * + * The function relerp() outputs the paging error string to + * stderr and to the map file (if it is open). + * + * local variable: + * none + * + * global variables: + * FILE *mfp handle for the map file + * + * called functions: + * VOID erpdmp() lkrloc.c + * + * side effects: + * Error message inserted into map file. + * + */ + +VOID relerp(char *str) +{ + erpdmp(stderr, str); + if (mfp) + erpdmp(mfp, str); +} + +/*)Function VOID erpdmp(fptr, str) + * + * FILE *fptr output file handle + * char *str error string + * + * The function erpdmp() outputs the error string str + * to the device specified by fptr. + * + * local variable: + * head *thp pointer to head structure + * + * global variables: + * int lkerr error flag + * sdp sdp base page structure + * + * called functions: + * int fprintf() c_library + * VOID prntval() lkrloc.c + * + * side effects: + * Error reported. + * + */ + +VOID erpdmp(FILE *fptr, char *str) +{ + register struct head *thp; + + thp = sdp.s_areax->a_bhp; + + /* + * Print Error + */ + fprintf(fptr, "\n?ASlink-Warning-%s\n", str); + lkerr++; + + /* + * Print PgDef Info + */ + fprintf(fptr, + " file module pgarea pgoffset\n"); + fprintf(fptr, + " PgDef %-8.8s %-8.8s %-8.8s ", + thp->h_lfile->f_idp, + &thp->m_id[0], + &sdp.s_area->a_id[0]); + prntval(fptr, sdp.s_area->a_addr + sdp.s_addr); +} diff --git a/as/link/hc08/lks19.c b/as/link/hc08/lks19.c new file mode 100644 index 0000000..8918396 --- /dev/null +++ b/as/link/hc08/lks19.c @@ -0,0 +1,131 @@ +/* lks19.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include "aslink.h" + +/*)Module lks19.c + * + * The module lks19.c contains the function to + * output the relocated object code in the + * Motorola S19 format. + * + * lks19.c contains the following function: + * VOID s19(i) + * + * lks19.c contains no local variables. + */ + +/*)S19 Format + * Record Type Field - This field signifies the start of a + * record and identifies the the record + * type as follows: + * + * Ascii S1 - Data Record + * Ascii S9 - End of File Record + * + * Record Length Field - This field specifies the record length + * which includes the address, data, and + * checksum fields. The 8 bit record + * length value is converted to two ascii + * characters, high digit first. + * + * Load Address Field - This field consists of the four ascii + * characters which result from converting + * the the binary value of the address in + * which to begin loading this record. The + * order is as follows: + * + * High digit of high byte of address. + * Low digit of high byte of address. + * High digit of low byte of address. + * Low digit of low byte of address. + * + * In an End of File record this field con- + * sists of either four ascii zeros or the + * program entry address. Currently the + * entry address option is not supported. + * + * Data Field - This field consists of the actual data, + * converted to two ascii characters, high + * digit first. There are no data bytes in + * the End of File record. + * + * Checksum Field - The checksum field is the 8 bit binary + * sum of the record length field, the load + * address field, and the data field. This + * sum is then complemented (1's comple- + * ment) and converted to two ascii + * characters, high digit first. + */ + +/*)Function s19(i) + * + * int i 0 - process data + * 1 - end of data + * + * The function s19() outputs the relocated data + * in the standard Motorola S19 format. + * + * local variables: + * Addr_T chksum byte checksum + * + * global variables: + * int hilo byte order + * FILE * ofp output file handle + * int rtcnt count of data words + * int rtflg[] output the data flag + * Addr_T rtval[] relocated data + * + * functions called: + * int fprintf() c_library + * + * side effects: + * The data is output to the file defined by ofp. + */ + +VOID +s19(i) +{ + register Addr_T chksum; + + if (i) { + if (ap->a_flag & A_NOLOAD) + return; + if (hilo == 0) { + chksum = rtval[0]; + rtval[0] = rtval[1]; + rtval[1] = chksum; + } + for (i = 0, chksum = 1; i < rtcnt; i++) { + if (rtflg[i]) + chksum++; + } + fprintf(ofp, "S1%02X", chksum); + for (i = 0; i < rtcnt ; i++) { + if (rtflg[i]) { + fprintf(ofp, "%02X", rtval[i]); + chksum += rtval[i]; + } + } + fprintf(ofp, "%02X\n", (0-chksum-1) & 0xff); + } else { + fprintf(ofp, "S9030000FC\n"); + } +} diff --git a/as/link/lkaomf51.c b/as/link/lkaomf51.c new file mode 100644 index 0000000..3213bce --- /dev/null +++ b/as/link/lkaomf51.c @@ -0,0 +1,985 @@ +/* lkaomf51.c - Create an absolute object memory format 51 file + + Copyright (C) 2002 Jesus Calvino-Fraga, jesusc at ieee dot org + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include +#include +#include "aslink.h" + +#define EQ(A,B) !strcmp((A),(B)) +#define MEMSIZE 0x10000 +//#define DODUMP 1 + +typedef struct +{ + char PathName[PATH_MAX]; + char ModuleName[PATH_MAX]; +} _infn; + +int numin=0; +_infn * infn=NULL; + +char ihxFileName[PATH_MAX]; +char aomf51FileName[PATH_MAX]; + +typedef struct +{ + char name[0x100]; + int FileNameNumber; + int Procedure;//If the symbol belongs to a function + int Static; //If the symbol is only public on its file + int Address; + int UsageType; +} _symbol; + +int numsym=0; +_symbol * symbol=NULL; + +typedef struct +{ + char name[0x100]; + int FileNameNumber; + int BeginAdd; + int EndAdd; +} _procedure; + +int numproc=0; +_procedure * procedure=NULL; + +typedef struct +{ + int Number; + int Address; + int Procedure; + int FileNameNumber; +} _linenum; + +int numlinenum=0; +_linenum * linenum=NULL; +#if 0 +typedef struct +{ + char * name; + int usage; +} +_UsageType; + +_UsageType UsageType[]= +{ + {"CSEG", 0}, + {"GSINIT", 0}, + {"GSINIT0", 0}, + {"GSINIT1", 0}, + {"GSINIT2", 0}, + {"GSINIT3", 0}, + {"GSINIT4", 0}, + {"GSINIT5", 0}, + {"GSFINAL", 0}, + {"HOME", 0}, + {"XINIT", 0}, + {"XSEG", 1}, + {"XISEG", 1}, + {"REG_BANK_0", 2}, + {"REG_BANK_1", 2}, + {"REG_BANK_2", 2}, + {"REG_BANK_3", 2}, + {"DSEG", 2}, + {"OSEG", 2}, + {"SSEG", 2}, + {"ISEG", 3}, + {"BSEG", 4}, + {"", 5} /*A typeless number?*/ +}; +#endif +char * UsageTypeName[]={"CODE", "XDATA", "DATA", "IDATA", "BIT", "NUMBER"}; +int AddNumber; +unsigned char * ihxBuff=NULL; +FILE * aomf51out; +int GlobalChkSum=0; +int HexSize, HexBegin=0x10000; + + +void GetName(char * filepath, char * name) +{ + int j, k; + for(j=strlen(filepath); j>0; j--) + if( (filepath[j-1]=='/')||(filepath[j-1]=='\\') ) break; + for(k=0; (filepath[j]!=0)&&(filepath[j]!='.'); j++, k++) + name[k]=filepath[j]; + name[k]=0; +} + +void SaveLinkedFilePath(char * filepath) +{ + int j; + + if((dflag) && (!rflag)) + { + infn=realloc(infn, sizeof(_infn)*(numin+1)); + + strcpy(infn[numin].PathName, filepath); + j=strlen(infn[numin].PathName); + + /*If there is an extension remove it*/ + if(j>=4) + { + if(EQ(&infn[numin].PathName[j-4], ".rel")) + { + infn[numin].PathName[j-4]=0; + } + } + + /*Get the module name=filename, no drive, no dir, no ext*/ + GetName(infn[numin].PathName, infn[numin].ModuleName); + //printf("%s, %s\n", infn[numin].PathName, infn[numin].ModuleName); + + /*Check if this filename is already in*/ + for(j=0; j=0)?procedure[symbol[j].Procedure].name:"GLOBAL", + symbol[j].Address, + k<6?UsageTypeName[k]:"???"); + } + + fprintf(DumpFile,"\nPROCEDURES:\n"); + for(j=0; j %s\n", + linenum[j].Number, + linenum[j].Address, + infn[linenum[j].FileNameNumber].PathName, + (linenum[j].Procedure>=0)?procedure[linenum[j].Procedure].name:"I don't know"); + } + + fclose(DumpFile); +} +#endif + +void OutputAOEMF51(void) +{ + int i, j, k, recsize; + char MHRname[0x100], Mname[0x100]; + + strcpy(aomf51FileName, infn[0].PathName); + + aomf51out=fopen(aomf51FileName, "wb"); + if(aomf51out==NULL) + { + printf("Couldn't create file %s\n", aomf51FileName); + return; + } + + GetName(infn[0].PathName, MHRname); + GlobalChkSum=0; + + /*Module header record*/ + OutputByte(0x02);/*REC TYPE*/ + OutputWord((strlen(MHRname)+1)+3);/*Record Length*/ + OutputName(MHRname);/*Module Name*/ + OutputByte(0xff);/*TRN ID: RL51?*/ + OutputByte(0x00); + OutputChkSum(); + + for(j=0; j2) /*If there are any symbols*/ + { + OutputByte(0x12); /*REC TYPE*/ + OutputWord(recsize);/*Record Length*/ + OutputByte(0x01); /*DEF TYPE: Public symbols*/ + for(k=0; k2) /*If there are any symbols*/ + { + OutputByte(0x12); /*REC TYPE*/ + OutputWord(recsize);/*Record Length*/ + OutputByte(0x00); /*DEF TYPE: Local symbols*/ + for(k=0; k2) /*If there are any symbols*/ + { + OutputByte(0x12); /*REC TYPE*/ + OutputWord(recsize);/*Record Length*/ + OutputByte(0x00); /*DEF TYPE: Local symbols*/ + for(i=0; i2) /*If there are any line numbers*/ + { + OutputByte(0x12); /*REC TYPE*/ + OutputWord(recsize);/*Record Length*/ + OutputByte(0x03); /*DEF TYPE: Line numbers*/ + for(i=0; i|L}$$$(),

,," + char Sfmt[]="%[^$] %c %[^$] %c %[^$] %c %s"; + char c; + char scope[0x100]; + char name[0x100]; + char level[0x100]; + char block[0x100]; + char Bfmt[]="%[^)] %c %c %c %c %d %c %d"; + char TypeInfo[0x100]; + char AddressSpace; + int OnStack; + int StackOffset; + int Address, CLine; + + if(numin==0) return; + + if (dfp != NULL) + { + fclose(dfp); + dfp=NULL; + } + + /*Build the source filename*/ + strcpy(SourceName, infn[0].PathName); + strcat(SourceName, ".cdb"); + CDBin=fopen(SourceName, "r"); + if(CDBin==NULL) + { + printf("Couldn't open file '%s'\n", SourceName); + lkexit(1); + } + + CurrentModule=0; /*Set the active module as the first one*/ + while(!feof(CDBin)) + { + fgets(buff, sizeof(buff)-1, CDBin); + + if(!feof(CDBin)) switch(buff[0]) + { + /*Example: "M:adq"*/ + case 'M': + sscanf(&buff[2], "%s", name); + for(j=0; j(),
,,*/ + sscanf(block, Bfmt, + TypeInfo, &c, &c, + &AddressSpace, &c, + &OnStack, &c, + &StackOffset); + + i=-1; k=-1; + switch(scope[2]) + { + case 'G': /*Global symbol*/ + break; + case 'L': /*Local symbol of a procedure*/ + for(j=0; j=procedure[k].BeginAdd) && + (linenum[j].Address<=procedure[k].EndAdd) && + (linenum[j].FileNameNumber==procedure[k].FileNameNumber) ) + { + linenum[j].Procedure=k; + } + } + } + + fclose(CDBin); +} + +int hex2dec (unsigned char hex_digit) +{ + if (isdigit (hex_digit)) + return hex_digit-'0'; + else + return toupper (hex_digit)-'A'+10; +} + +unsigned char GetByte(char * buffer) +{ + return hex2dec(buffer[0])*0x10+hex2dec(buffer[1]); +} + +unsigned short GetWord(char * buffer) +{ + return hex2dec(buffer[0])*0x1000+ + hex2dec(buffer[1])*0x100+ + hex2dec(buffer[2])*0x10+ + hex2dec(buffer[3]); +} + +int ReadHexFile(int * Begin) +{ + char buffer[1024]; + FILE * filein; + int j; + unsigned char linesize, recordtype, rchksum, value; + unsigned short address; + int MaxAddress=0; + int chksum; + + /*If the hexfile is already open, close it*/ + if(ofp!=NULL) + { + fclose(ofp); + ofp=NULL; + } + + strcpy(ihxFileName, infn[0].PathName); + strcat(ihxFileName, ".ihx"); + + if ( (filein=fopen(ihxFileName, "r")) == NULL ) + { + printf("Error: Can't open file `%s`.\r\n", ihxFileName); + return 0; + } + + ihxBuff=calloc(MEMSIZE, sizeof(unsigned char)); + if(ihxBuff==NULL) + { + printf("Insufficient memory\n"); + fclose(filein); + return -1; + } + + for(j=0; j. */ + +/* + * With contributions for the + * object libraries from + * Ken Hornstein + * kenh@cmf.nrl.navy.mil + * + */ + +/* + * Extensions: P. Felber + */ + +#include +#include +#include +#include + +#include "aslink.h" +#include "lklibr.h" +#include "lkrel.h" +#include "lkar.h" + + +#ifndef max +# define max(a,b) ((a) > (b) ? (a) : (b)) +#endif + +#ifndef min +# define min(a,b) ((a) < (b) ? (a) : (b)) +#endif + + +static int +is_ar (FILE * libfp) +{ + char buf[SARMAG]; + int ret; + + if (!(ret = fread (buf, 1, sizeof (buf), libfp) == sizeof (buf) && memcmp (buf, ARMAG, SARMAG) == 0)) + rewind (libfp); + + return ret; +} + +static char *sym_tab; +static int sym_tab_size; + +char * +get_member_name (char *name, size_t *p_size, int allocate, FILE * libfp) +{ + *p_size = 0; + + if (0 == memcmp (name, "#1/", 3)) + { + char *p; + size_t len = strtoul (&name [3], &p, 10); + if (p > &name [3]) + { + /* BSD appends real file name to the file header */ + if (p_size != NULL) + *p_size = len; + + if (allocate) + { + char *n = (char *) malloc (len); + if (fread (n, 1, len, libfp) != len) + { + /* not an ar archive or broken ar archive */ + return NULL; + } + else + return n; + } + else + { + /* just advance the file pointer */ + fseek (libfp, len, SEEK_CUR); + return NULL; + } + } + else + { + /* not an ar archive or broken ar archive */ + return NULL; + } + } + else if (allocate) + { + if (name[0] == '/') + { + if (NULL != sym_tab) + { + char *p; + + int name_offset = strtol (++name, &p, 0); + if (p != name && name_offset < sym_tab_size) + { + int len = p - name + 1; + while (len < AR_NAME_LEN && name[len++] == ' ') + ; + if (len == AR_NAME_LEN) + { + char *n; + + /* long name: get it from the symbol table */ + name = &sym_tab[name_offset]; + for (p = name; *p != '/' && *p != '\n'; ++p) + assert (p < &sym_tab[sym_tab_size]); + + if (p[0] != '/' || p[1] != '\n') + while (*++p != '\n') + assert (p < &sym_tab[sym_tab_size]); + + n = (char *) malloc (p - name + 1); + memcpy (n, name, p - name); + n[p - name] = '\0'; + return n; + } + } + } + } + else + { + char *p = strrchr (name, '/'); + + if (NULL != p) + { + int len = p - name; + while (name[++len] == ' ') + ; + if (len == AR_NAME_LEN) + { + char *n = (char *) malloc (p - name + 1); + memcpy (n, name, p - name); + n[p - name] = '\0'; + return n; + } + } + else + { + /* BSD formed member name: + trim trailing spaces */ + char *n; + + p = name + AR_NAME_LEN; + while (*--p == ' ' && p >= name) + ; + ++p; + n = (char *) malloc (p - name + 1); + memcpy (n, name, p - name); + n[p - name] = '\0'; + return n; + } + } + + /* bad formed member name: + just return it */ + + return strdup (name); + } + else + return NULL; +} + +size_t +ar_get_header (struct ar_hdr *hdr, FILE * libfp, char **p_obj_name) +{ + char header[ARHDR_LEN]; + char buf[AR_DATE_LEN + 1]; + char *obj_name; + size_t size; + + if (fread (header, 1, sizeof (header), libfp) != sizeof (header) + || memcmp (header + AR_FMAG_OFFSET, ARFMAG, AR_FMAG_LEN) != 0) + { + /* not an ar archive */ + return 0; + } + + memcpy (hdr->ar_name, &header[AR_NAME_OFFSET], AR_NAME_LEN); + hdr->ar_name[AR_NAME_LEN] = '\0'; + + memcpy (buf, &header[AR_DATE_OFFSET], AR_DATE_LEN); + buf[AR_DATE_LEN] = '\0'; + hdr->ar_date = strtol (buf, NULL, 0); + + memcpy (buf, &header[AR_UID_OFFSET], AR_GID_LEN); + buf[AR_GID_LEN] = '\0'; + hdr->ar_uid = (uid_t) strtol (buf, NULL, 0); + + memcpy (buf, &header[AR_GID_OFFSET], AR_DATE_LEN); + buf[AR_DATE_LEN] = '\0'; + hdr->ar_gid = (gid_t) strtol (buf, NULL, 0); + + memcpy (buf, &header[AR_MODE_OFFSET], AR_MODE_LEN); + buf[AR_MODE_LEN] = '\0'; + hdr->ar_mode = (mode_t) strtoul (buf, NULL, 0); + + memcpy (buf, &header[AR_SIZE_OFFSET], AR_SIZE_LEN); + buf[AR_SIZE_LEN] = '\0'; + hdr->ar_size = strtol (buf, NULL, 0); + + obj_name = get_member_name (hdr->ar_name, &size, p_obj_name != NULL, libfp); + + if (p_obj_name != NULL) + *p_obj_name = obj_name; + + /* treat BSD appended real file name as a part of the header */ + hdr->ar_size -= size; + + return size + ARHDR_LEN; +} + +#if INDEXLIB +static char * +get_member_name_by_offset (FILE * fp, long offset) +{ + struct ar_hdr hdr; + char *name; + + fseek (fp, offset, SEEK_SET); + return (ar_get_header (&hdr, fp, &name) != 0) ? name : NULL; +} + +static pmlibraryfile +find_member_by_offset (const char *libspc, long offset) +{ + pmlibraryfile p; + + /* walk trough all archive members */ + for (p = libr; p; p = p->next) + { + if (0 == strcmp (libspc, p->libspc) && p->offset == offset) + return p; + } + + return NULL; +} + +static pmlibraryfile +buildlibraryindex_ar (struct lbname *lbnh, FILE * libfp, pmlibraryfile This, int type) +{ + struct ar_hdr hdr; + char *obj_name; + size_t hdr_size; + + /* walk trough all archive members */ + while ((hdr_size = ar_get_header (&hdr, libfp, &obj_name)) != 0) + { + if (AR_IS_SYMBOL_TABLE (obj_name)) + { + char *buf, *po, *ps; + int i; + long nsym; + long pos; + + free (obj_name); + + buf = (char *) new (hdr.ar_size); + + if (fread (buf, 1, hdr.ar_size, libfp) != hdr.ar_size) + { + free (buf); + return This; + } + + pos = ftell (libfp); + + nsym = sgetl (buf); + + po = buf + 4; + ps = po + nsym * 4; + + for (i = 0; i < nsym; ++i) + { + pmlibrarysymbol ThisSym; + char *sym; + long offset; + pmlibraryfile entry; + + offset = sgetl (po); + po += 4; + + sym = strdup (ps); + ps += strlen (ps) + 1; + + if ((entry = find_member_by_offset (lbnh->libspc, offset)) != NULL) + { + for (ThisSym = entry->symbols; ThisSym->next != NULL; ThisSym = ThisSym->next) + ; + } + else + { + /* Opened OK - create a new libraryfile object for it */ + if (This == NULL) + { + assert (libr == NULL); + libr = This = (pmlibraryfile) new (sizeof (mlibraryfile)); + } + else + { + This->next = (pmlibraryfile) new (sizeof (mlibraryfile)); + This = This->next; + } + This->next = NULL; + This->loaded = 0; + This->libspc = lbnh->libspc; + This->offset = offset; + This->relfil = get_member_name_by_offset (libfp, offset); /* member name */ + This->filspc = strdup (This->relfil); /* member file name */ + This->type = type; + + /* start a new linked list of symbols for this module. */ + This->symbols = ThisSym = NULL; + } + + if (ThisSym == NULL) + ThisSym = This->symbols = (pmlibrarysymbol) new (sizeof (mlibrarysymbol)); + else + { + ThisSym->next = (pmlibrarysymbol) new (sizeof (mlibrarysymbol)); + ThisSym = ThisSym->next; + } + ThisSym->next = NULL; + ThisSym->name = sym; + } + free (buf); + + fseek (libfp, pos, SEEK_SET); + break; + } + else if (AR_IS_BSD_SYMBOL_TABLE (obj_name)) + { + char *buf, *po, *ps; + int i; + long nsym, tablesize; + long pos; + + free (obj_name); + + buf = (char *) new (hdr.ar_size); + + if (fread (buf, 1, hdr.ar_size, libfp) != hdr.ar_size) + { + free (buf); + return This; + } + + pos = ftell (libfp); + + tablesize = sgetl (buf); + nsym = tablesize / 8; + + po = buf + 4; + + ps = po + tablesize + 4; + + for (i = 0; i < nsym; ++i) + { + pmlibrarysymbol ThisSym; + char *sym; + long offset; + pmlibraryfile entry; + + sym = ps + sgetl (po); + po += 4; + offset = sgetl (po); + po += 4; + + sym = strdup (ps); + + if ((entry = find_member_by_offset (lbnh->libspc, offset)) != NULL) + { + for (ThisSym = entry->symbols; ThisSym->next != NULL; ThisSym = ThisSym->next) + ; + } + else + { + /* Opened OK - create a new libraryfile object for it */ + if (This == NULL) + { + assert (libr == NULL); + libr = This = (pmlibraryfile) new (sizeof (mlibraryfile)); + } + else + { + This->next = (pmlibraryfile) new (sizeof (mlibraryfile)); + This = This->next; + } + This->next = NULL; + This->loaded = 0; + This->libspc = lbnh->libspc; + This->offset = offset; + This->relfil = get_member_name_by_offset (libfp, offset); /* member name */ + This->filspc = strdup (This->relfil); /* member file name */ + This->type = type; + + /* start a new linked list of symbols for this module. */ + This->symbols = ThisSym = NULL; + } + + if (ThisSym == NULL) + ThisSym = This->symbols = (pmlibrarysymbol) new (sizeof (mlibrarysymbol)); + else + { + ThisSym->next = (pmlibrarysymbol) new (sizeof (mlibrarysymbol)); + ThisSym = ThisSym->next; + } + ThisSym->next = NULL; + ThisSym->name = sym; + } + free (buf); + + fseek (libfp, pos, SEEK_SET); + break; + } + else if (AR_IS_STRING_TABLE (obj_name)) + { + free (obj_name); + + if (sym_tab) + free (sym_tab); + + sym_tab = (char *) new (hdr.ar_size); + + if (fread (sym_tab, 1, hdr.ar_size, libfp) != hdr.ar_size) + { + free (sym_tab); + sym_tab_size = 0; + return This; + } + sym_tab_size = hdr.ar_size; + } + else + { + long moduleOffset = ftell (libfp); + + free (obj_name); + + /* Opened OK - create a new libraryfile object for it */ + if (This == NULL) + { + assert (libr == NULL); + libr = This = (pmlibraryfile) new (sizeof (mlibraryfile)); + } + else + { + This->next = (pmlibraryfile) new (sizeof (mlibraryfile)); + This = This->next; + } + This->next = NULL; + This->loaded = -1; + This->libspc = lbnh->libspc; + This->offset = moduleOffset - hdr_size; + + This->relfil = obj_name; /* member name */ + This->filspc = strdup (This->relfil); /* member file name */ + + D (" Indexing module: %s\n", This->relfil); + + This->type = type; + + /* start a new linked list of symbols for this module. */ + This->symbols = NULL; + + add_rel_index (libfp, hdr.ar_size, This); + + fseek (libfp, moduleOffset + hdr.ar_size + (hdr.ar_size & 1), SEEK_SET); + } + } + + if (NULL != sym_tab) + { + free (sym_tab); + sym_tab = NULL; + sym_tab_size = 0; + } + + return This; +} + +#else + +#if 0 +static int +load_adb (FILE * libfp, struct lbfile *lbfh) +{ + struct ar_hdr hdr; + char *adb_name; + char *obj_name; + size_t hdr_size; + + /* check if it is a .rel file */ + if (0 != stricmp (&lbfh->relfil[strlen (lbfh->relfil) - 4], ".rel")) + return 0; + + + adb_name = (char *) new (strlen (lbfh->relfil) + 1); + memcpy (adb_name, lbfh->relfil, strlen (lbfh->relfil) - 4); + memcpy (&adb_name[strlen (lbfh->relfil) - 4], ".adb", 5); + + if (!is_ar (libfp)) + { + fprintf (stderr, "?ASlink-Error-%s is not an archive\n", lbfh->libspc); + fclose (libfp); + lkexit (1); + } + + + /* walk trough all archive members */ + while ((hdr_size = ar_get_header (&hdr, libfp, &obj_name)) != 0) + { + if (AR_IS_STRING_TABLE (obj_name)) + { + free (obj_name); + + if (sym_tab) + free (sym_tab); + + sym_tab = (char *) new (hdr.ar_size); + + if ((off_t) fread (sym_tab, 1, hdr.ar_size, libfp) != hdr.ar_size) + { + free (sym_tab); + sym_tab_size = 0; + return 0; + } + sym_tab_size = hdr.ar_size; + } + if (AR_IS_SYMBOL_TABLE (obj_name) || 0 != stricmp (obj_name, adb_name)) + { + free (obj_name); + + /* skip the mamber */ + fseek (libfp, hdr.ar_size + (hdr.ar_size & 1), SEEK_CUR); + } + else + { + long left = hdr.ar_size; + char buf[4096]; + + free (obj_name); + + while (left) + { + size_t n = min (left, sizeof buf); + + if (fread (buf, 1, n, libfp) != n) + { + assert (0); + } + + fwrite (buf, 1, n, dfp); + + left -= n; + } + + if (hdr.ar_size & 1) + getc (libfp); + + free (adb_name); + return 1; + } + } + + free (adb_name); + return 0; +} +#endif + +static int +fndsym_ar (const char *name, struct lbname *lbnh, FILE * libfp, int type) +{ + struct ar_hdr hdr; + int ret = 0; + size_t hdr_size; + char *obj_name; + + /* walk trough all archive members */ + while ((hdr_size = ar_get_header (&hdr, libfp, &obj_name)) != 0) + { + char filspc[PATH_MAX]; + + if (lbnh->path != NULL) + { + strcpy (filspc, lbnh->path); +#ifdef OTHERSYSTEM + if (*filspc != '\0' && (filspc[strlen (filspc) - 1] != '/') && (filspc[strlen (filspc) - 1] != LKDIRSEP)) + { + strcat (filspc, LKDIRSEPSTR); + } +#endif + } + + if (AR_IS_SYMBOL_TABLE (obj_name)) + { + char *buf, *po, *ps; + int i; + long nsym; + + free (obj_name); + + buf = (char *) new (hdr.ar_size); + + if (fread (buf, 1, hdr.ar_size, libfp) != hdr.ar_size) + { + free (buf); + return 0; + } + + nsym = sgetl (buf); + + po = buf + 4; + ps = po + nsym * 4; + + for (i = 0; i < nsym; ++i) + { + char *sym; + long offset; + + offset = sgetl (po); + po += 4; + + sym = ps; + while (*ps++ != '\0') + ; + + if (0 == strcmp (name, sym)) + { + fseek (libfp, offset, SEEK_SET); + if (ar_get_header (&hdr, libfp, NULL)) + { + sprintf (&filspc[strlen (filspc)], "%s", hdr.ar_name); + + /* If this module has been loaded already don't load it again. */ + if (!is_module_loaded (filspc)) + { + struct lbfile *lbfh, *lbf; + + lbfh = (struct lbfile *) new (sizeof (struct lbfile)); + lbfh->libspc = strdup (lbnh->libspc); + lbfh->relfil = strdup (hdr.ar_name); + lbfh->filspc = strdup (filspc); + lbfh->offset = offset; + lbfh->type = type; + + if (lbfhead == NULL) + { + lbfhead = lbfh; + } + else + { + for (lbf = lbfhead; lbf->next != NULL; lbf = lbf->next) + ; + + lbf->next = lbfh; + } + + D ("Loading module %s from file %s.\n", hdr.ar_name, lbfh->libspc); + load_rel (libfp, hdr.ar_size); + ///* if cdb information required & .adb file present */ + //if (dflag && dfp) + // { + // if (load_adb(FILE *libfp, struct lbfile *lbfh)) + // SaveLinkedFilePath (filspc); + // } + ret = 1; + break; + } + } + else + { + fprintf (stderr, "?ASlink-Error-Bad offset in library file %s(%s)\n", lbnh->libspc, name); + fclose (libfp); + lkexit (1); + } + } + } + free (buf); + + break; + } + else if (AR_IS_BSD_SYMBOL_TABLE (obj_name)) + { + char *buf, *po, *ps; + int i; + long nsym, tablesize; + + free (obj_name); + + buf = (char *) new (hdr.ar_size); + + if (fread (buf, 1, hdr.ar_size, libfp) != hdr.ar_size) + { + free (buf); + return 0; + } + + tablesize = sgetl (buf); + nsym = tablesize / 8; + + po = buf + 4; + + ps = po + tablesize + 4; + + for (i = 0; i < nsym; ++i) + { + char *sym; + long offset; + + sym = ps + sgetl (po); + po += 4; + offset = sgetl (po); + po += 4; + + if (0 == strcmp (name, sym)) + { + fseek (libfp, offset, SEEK_SET); + if (ar_get_header (&hdr, libfp, NULL)) + { + sprintf (&filspc[strlen (filspc)], "%s", hdr.ar_name); + + /* If this module has been loaded already don't load it again. */ + if (!is_module_loaded (filspc)) + { + struct lbfile *lbfh, *lbf; + + lbfh = (struct lbfile *) new (sizeof (struct lbfile)); + lbfh->libspc = strdup (lbnh->libspc); + lbfh->relfil = strdup (hdr.ar_name); + lbfh->filspc = strdup (filspc); + lbfh->offset = offset; + lbfh->type = type; + + if (lbfhead == NULL) + { + lbfhead = lbfh; + } + else + { + for (lbf = lbfhead; lbf->next != NULL; lbf = lbf->next) + ; + + lbf->next = lbfh; + } + + D ("Loading module %s from file %s.\n", hdr.ar_name, lbfh->libspc); + load_rel (libfp, hdr.ar_size); + ///* if cdb information required & .adb file present */ + //if (dflag && dfp) + // { + // if (load_adb(FILE *libfp, struct lbfile *lbfh)) + // SaveLinkedFilePath (filspc); + // } + ret = 1; + break; + } + } + else + { + fprintf (stderr, "?ASlink-Error-Bad offset in library file %s(%s)\n", lbnh->libspc, name); + fclose (libfp); + lkexit (1); + } + } + } + free (buf); + + break; + } + else if (AR_IS_STRING_TABLE (obj_name)) + { + free (obj_name); + + if (sym_tab) + free (sym_tab); + + sym_tab = (char *) new (hdr.ar_size); + + if (fread (sym_tab, 1, hdr.ar_size, libfp) != hdr.ar_size) + { + free (sym_tab); + sym_tab = NULL; + sym_tab_size = 0; + return 0; + } + sym_tab_size = hdr.ar_size; + } + else + { + long moduleOffset = ftell (libfp); + + free (obj_name); + + D (" Module: %s\n", hdr.ar_name); + + sprintf (&filspc[strlen (filspc)], "%s", hdr.ar_name); + + /* Opened OK - create a new libraryfile object for it */ + ret = add_rel_file (name, lbnh, hdr.ar_name, filspc, moduleOffset - hdr_size, libfp, hdr.ar_size, type); + ///* if cdb information required & .adb file present */ + //if (dflag && dfp) + // { + // if (load_adb(FILE *libfp, struct lbfile *lbfh)) + // SaveLinkedFilePath (filspc); + // } + if (ret) + break; + + fseek (libfp, moduleOffset + hdr.ar_size + (hdr.ar_size & 1), SEEK_SET); + } + } + + if (NULL != sym_tab) + { + free (sym_tab); + sym_tab = NULL; + sym_tab_size = 0; + } + + return ret; +} +#endif + +static void +loadfile_ar (struct lbfile *lbfh) +{ + FILE *fp; + +#ifdef __CYGWIN__ + char posix_path[PATH_MAX]; + void cygwin_conv_to_full_posix_path (char *win_path, char *posix_path); + cygwin_conv_to_full_posix_path (lbfh->libspc, posix_path); + fp = fopen (posix_path, "rb"); +#else + fp = fopen (lbfh->libspc, "rb"); +#endif + + if (fp != NULL) + { + struct ar_hdr hdr; + + fseek (fp, lbfh->offset, SEEK_SET); + if (ar_get_header (&hdr, fp, NULL) != 0) + { + D ("Loading module %s from file %s.\n", hdr.ar_name, lbfh->libspc); + load_rel (fp, hdr.ar_size); + fclose (fp); + } + else + { + fprintf (stderr, "?ASlink-Error-Bad offset in library file %s(%s)\n", lbfh->libspc, lbfh->relfil); + fclose (fp); + lkexit (1); + } + } + else + { + fprintf (stderr, "?ASlink-Error-Opening library '%s'\n", lbfh->libspc); + lkexit (1); + } +} + +struct aslib_target aslib_target_ar = { + &is_ar, +#ifdef INDEXLIB + &buildlibraryindex_ar, +#else + &fndsym_ar, +#endif + &loadfile_ar, +}; diff --git a/as/link/lkar.h b/as/link/lkar.h new file mode 100644 index 0000000..af77754 --- /dev/null +++ b/as/link/lkar.h @@ -0,0 +1,85 @@ +/* lkar.h - ar library format handling + + Copyright (C) 2008-2009 Borut Razem, borut dot razem at siol dot net + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#ifndef __LKAR_H +#define __LKAR_H + +#include +#include + + +#ifdef _WIN32 +typedef unsigned short mode_t; +typedef short uid_t; +typedef short gid_t; +typedef _off_t off_t; +#endif + +#define sgetl(buf) (((((((unsigned char)(buf)[0] << 8) + (unsigned char)(buf)[1]) << 8) + (unsigned char)(buf)[2]) << 8) + (unsigned char)(buf)[3]) +#define sputl(value, buf) ((buf)[0] = (value) >> 24, (buf)[1] = (value) >> 16, (buf)[2] = (value) >> 8, (buf)[3] = (value)) + +#define ARMAG "!\n" /* magic string */ +#define SARMAG (sizeof (ARMAG) - 1) /* length of magic string */ + +#define ARFMAG "`\n" /* header trailer string */ + +#define AR_NAME_OFFSET 0 +#define AR_NAME_LEN 16 + +#define AR_DATE_OFFSET 16 +#define AR_DATE_LEN 12 + +#define AR_UID_OFFSET 28 +#define AR_UID_LEN 6 + +#define AR_GID_OFFSET 34 +#define AR_GID_LEN 6 + +#define AR_MODE_OFFSET 40 +#define AR_MODE_LEN 8 + +#define AR_SIZE_OFFSET 48 +#define AR_SIZE_LEN 10 + +#define AR_FMAG_OFFSET 58 +#define AR_FMAG_LEN (sizeof (ARFMAG) - 1) + +#define ARHDR_LEN (AR_NAME_LEN + AR_DATE_LEN + AR_UID_LEN + AR_GID_LEN + AR_MODE_LEN + AR_SIZE_LEN + AR_FMAG_LEN) + +#define AR_SYMBOL_TABLE_NAME "/ " +#define AR_STRING_TABLE_NAME "// " + +#define AR_BSD_SYMBOL_TABLE_NAME "__.SYMDEF " +#define AR_BSD_SORTED_SYMBOL_TABLE_NAME "__.SYMDEF SORTED" + +#define AR_IS_SYMBOL_TABLE(name) (0 == strcmp((name), AR_SYMBOL_TABLE_NAME)) +#define AR_IS_STRING_TABLE(name) (0 == strcmp((name), AR_STRING_TABLE_NAME)) + +#define AR_IS_BSD_SYMBOL_TABLE(name) (0 == strcmp((name), AR_BSD_SYMBOL_TABLE_NAME) || 0 == strcmp((name), AR_BSD_SORTED_SYMBOL_TABLE_NAME)) + + +struct ar_hdr /* archive member header */ +{ + char ar_name[AR_NAME_LEN + 1]; /* archive member name */ + time_t ar_date; /* archive member date */ + uid_t ar_uid; /* archive member user identification */ + gid_t ar_gid; /* archive member group identification */ + mode_t ar_mode; /* archive member mode (octal) */ + size_t ar_size; /* archive member size */ +}; + +#endif /* __LKAR_H */ diff --git a/as/link/lkdata.c b/as/link/lkdata.c new file mode 100644 index 0000000..4f62161 --- /dev/null +++ b/as/link/lkdata.c @@ -0,0 +1,506 @@ +/* lkdata.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 28-Oct-97 JLH: + * - change s_id from [NCPS] to pointer (comment) + * 31-Oct-97 JLH: + * - add jflag and jfp for NoICE output + */ + +#include +#include +#include "aslink.h" + +/*)Module lkdata.c + * + * The module lkdata contains the global variables + * and structures used in the linker aslink. + */ + +/* + * Definitions for all Global Variables + */ + +char *_abs_ = { ". .ABS." }; + +int lkerr; /* Linker error flag + */ +char *ip; /* Pointer into the REL file text line in ib[] + */ +char ib[NINPUT]; /* REL file text line + */ +char *rp; /* pointer into the LST file + * text line in rb[] + */ +char rb[NINPUT]; /* LST file text line being + * address relocated + */ + +char sdccopt[NINPUT]=""; +char sdccopt_module[NINPUT]=""; +char curr_module[NINPUT]=""; + +int dflag; /* Debug information output flag + */ +int oflag; /* Output file type flag + */ +int mflag; /* Map output flag + */ +int sflag; /* JCF: Memory usage output flag + */ +int packflag=0; /* JCF: Pack internal memory flag + */ +int stacksize=0; /* JCF: Stack size + */ +int aflag; /* Overlapping area warning flag + */ +int jflag; /* NoICE output flag + */ +int symflag; /* no$gmb .sym output flag + */ +int xflag; /* Map file radix type flag + */ +int pflag; /* print linker command file flag + */ +int uflag; /* Listing relocation flag + */ +int rflag; /* Extended linear address record flag. + */ +int radix; /* current number conversion radix: + * 2 (binary), 8 (octal), 10 (decimal), + * 16 (hexadecimal) + */ +int line; /* current line number + */ +int page; /* current page number + */ +int lop; /* current line number on page + */ +int pass; /* linker pass number + */ +int rtcnt; /* count of elements in the + * rtval[] and rtflg[] arrays + */ +Addr_T rtval[NTXT]; /* data associated with relocation + */ +int rtflg[NTXT]; /* indicates if rtval[] value is + * to be sent to the output file. + * (always set in this linker) + */ +int hilo; /* REL file byte ordering + */ +int gline; /* LST file relocation active + * for current line + */ +int gcntr; /* LST file relocation active + * counter + */ +Addr_T iram_size; /* internal ram size + */ +long xram_size=-1; /* external ram size + */ +long code_size=-1; /* code size + */ + +/* + * The structure lfile contains a pointer to a + * file specification string, the file type, and + * a link to the next lfile structure. + * + * struct lfile + * { + * struct lfile *f_flp; lfile link + * int f_type; File type + * char *f_idp; Pointer to file spec + * }; + */ +struct lfile *filep; /* The pointers (lfile *) filep, + * (lfile *) cfp, and (FILE *) sfp + * are used in conjunction with + * the routine lk_getline() to read + * asmlnk commands from + * (1) the standard input or + * (2) or a command file + * and to read the REL files + * sequentially as defined by the + * asmlnk input commands. + * + * The pointer *filep points to the + * beginning of a linked list of + * lfile structures. + */ +struct lfile *cfp; /* The pointer *cfp points to the + * current lfile structure + */ +struct lfile *startp;/* asmlnk startup file structure + */ +struct lfile *linkp; /* pointer to first lfile structure + * containing an input REL file + * specification + */ +struct lfile *lfp; /* pointer to current lfile structure + * being processed by parse() + */ +FILE *ofp; /* Output file handle + * for word formats + */ +FILE *mfp; /* Map output file handle + */ +FILE *jfp; /* NoICE output file handle + */ +FILE *rfp; /* File handle for output + * address relocated ASxxxx + * listing file + */ +FILE *sfp; /* The file handle sfp points to the + * currently open file + */ +FILE *tfp; /* File handle for input + * ASxxxx listing file + */ +FILE *dfp = NULL ; /* + * File handle for debug + * information output file + */ +/* + * The structures of head, area, areax, and sym are created + * as the REL files are read during the first pass of the + * linker. The struct head is created upon encountering a + * H directive in the REL file. The structure contains a + * link to a link file structure (struct lfile) which describes + * the file containing the H directive, the number of data/code + * areas contained in this header segment, the number of + * symbols referenced/defined in this header segment, a pointer + * to an array of pointers to areax structures (struct areax) + * created as each A directive is read, and a pointer to an + * array of pointers to symbol structures (struct sym) for + * all referenced/defined symbols. As H directives are read + * from the REL files a linked list of head structures is + * created by placing a link to the new head structure + * in the previous head structure. + * + * struct head + * { + * struct head *h_hp; Header link + * struct lfile *h_lfile; Associated file + * int h_narea; # of areas + * struct areax **a_list; Area list + * int h_nglob; # of global symbols + * struct sym **s_list; Global symbol list + * char m_id[NCPS]; Module name + * }; + */ +struct head *headp; /* The pointer to the first + * head structure of a linked list + */ +struct head *hp; /* Pointer to the current + * head structure + */ + +/* + * A structure area is created for each 'unique' data/code + * area definition found as the REL files are read. The + * struct area contains the name of the area, a flag byte + * which contains the area attributes (REL/CON/OVR/ABS), + * an area subtype (not used in this assembler), and the + * area base address and total size which will be filled + * in at the end of the first pass through the REL files. + * As A directives are read from the REL files a linked + * list of unique area structures is created by placing a + * link to the new area structure in the previous area structure. + * + * struct area + * { + * struct area *a_ap; Area link + * struct areax *a_axp; Area extension link + * Addr_T a_addr; Beginning address of area + * Addr_T a_size; Total size of the area + * char a_type; Area subtype + * char a_flag; Flag byte + * char a_id[NCPS]; Name + * }; + */ +struct area *areap; /* The pointer to the first + * area structure of a linked list + */ +struct area *ap; /* Pointer to the current + * area structure + */ + +/* + * An areax structure is created for every A directive found + * while reading the REL files. The struct areax contains a + * link to the 'unique' area structure referenced by the A + * directive and to the head structure this area segment is + * a part of. The size of this area segment as read from the + * A directive is placed in the areax structure. The beginning + * address of this segment will be filled in at the end of the + * first pass through the REL files. As A directives are read + * from the REL files a linked list of areax structures is + * created for each unique area. The final areax linked + * list has at its head the 'unique' area structure linked + * to the linked areax structures (one areax structure for + * each A directive for this area). + * + * struct areax + * { + * struct areax *a_axp; Area extension link + * struct area *a_bap; Base area link + * struct head *a_bhp; Base header link + * Addr_T a_addr; Beginning address of section + * Addr_T a_size; Size of the area in section + * }; + */ +struct areax *axp; /* Pointer to the current + * areax structure + */ + +/* + * A sym structure is created for every unique symbol + * referenced/defined while reading the REL files. The + * struct sym contains the symbol's name, a flag value + * (not used in this linker), a symbol type denoting + * referenced/defined, and an address which is loaded + * with the relative address within the area in which + * the symbol was defined. The sym structure also + * contains a link to the area where the symbol was defined. + * The sym structures are linked into linked lists using + * the symbol link element. + * + * struct sym + * { + * struct sym *s_sp; Symbol link + * struct areax *s_axp; Symbol area link + * char s_type; Symbol subtype + * char s_flag; Flag byte + * Addr_T s_addr; Address + * char *s_id; Name (JLH) + * }; + */ +struct sym *symhash[NHASH]; /* array of pointers to NHASH + * linked symbol lists + */ +/* + * The struct base contains a pointer to a + * base definition string and a link to the next + * base structure. + * + * struct base + * { + * struct base *b_base; Base link + * char *b_strp; String pointer + * }; + */ +struct base *basep; /* The pointer to the first + * base structure + */ +struct base *bsp; /* Pointer to the current + * base structure + */ + +/* + * The struct globl contains a pointer to a + * global definition string and a link to the next + * global structure. + * + * struct globl + * { + * struct globl *g_globl; Global link + * char *g_strp; String pointer + * }; + */ +struct globl *globlp;/* The pointer to the first + * globl structure + */ +struct globl *gsp; /* Pointer to the current + * globl structure + */ + +/* + * A structure sdp is created for each 'unique' paged + * area definition found as the REL files are read. + * As P directives are read from the REL files a linked + * list of unique sdp structures is created by placing a + * link to the new sdp structure in the previous area structure. + * + * struct sdp + * { + * struct area *s_area; Paged Area link + * struct areax *s_areax; Paged Area Extension Link + * Addr_T s_addr; Page address offset + * }; + */ +struct sdp sdp; /* Base Page Structure */ + +/* + * The structure rerr is loaded with the information + * required to report an error during the linking + * process. The structure contains an index value + * which selects the areax structure from the header + * areax structure list, a mode value which selects + * symbol or area relocation, the base address in the + * area section, an area/symbol list index value, and + * an area/symbol offset value. + * + * struct rerr + * { + * int aindex; Linking area + * int mode; Relocation mode + * Addr_T rtbase; Base address in section + * int rindex; Area/Symbol reloaction index + * Addr_T rval; Area/Symbol offset value + * }; + */ +struct rerr rerr; /* Structure containing the + * linker error information + */ + +/* + * The structure lbpath is created for each library + * path specification input by the -k option. The + * lbpath structures are linked into a list using + * the next link element. + * + * struct lbpath { + * struct lbpath *next; + * char *path; + * }; + */ +struct lbpath *lbphead; /* pointer to the first + * library path structure + */ + +/* + * The structure lbname is created for all combinations of the + * library path specifications (input by the -k option) and the + * library file specifications (input by the -l option) that + * lead to an existing file. The element path points to + * the path string, element libfil points to the library + * file string, and the element libspc is the concatenation + * of the valid path and libfil strings. + * + * The lbpath structures are linked into a list + * using the next link element. + * + * Each library file contains a list of object files + * that are contained in the particular library. e.g.: + * + * \iolib\termio + * \inilib\termio + * + * Only one specification per line is allowed. + * + * struct lbname { + * struct lbname *next; + * char *path; + * char *libfil; + * char *libspc; + * }; + */ +struct lbname *lbnhead; /* pointer to the first + * library name structure + */ + +/* + * The function fndsym() searches through all combinations of the + * library path specifications (input by the -k option) and the + * library file specifications (input by the -l option) that + * lead to an existing file for a symbol definition. + * + * The structure lbfile is created for the first library + * object file which contains the definition for the + * specified undefined symbol. + * + * The element libspc points to the library file path specification + * and element relfil points to the object file specification string. + * The element filspc is the complete path/file specification for + * the library file to be imported into the linker. The + * file specicifation may be formed in one of two ways: + * + * (1) If the library file contained an absolute + * path/file specification then this becomes filspc. + * (i.e. C:\...) + * + * (2) If the library file contains a relative path/file + * specification then the concatenation of the path + * and this file specification becomes filspc. + * (i.e. \...) + * + * The lbpath structures are linked into a list + * using the next link element. + * + * struct lbfile { + * struct lbfile *next; + * char *libspc; + * char *relfil; + * char *filspc; + * }; + */ +struct lbfile *lbfhead; /* pointer to the first + * library file structure + */ + +/* + * array of character types, one per + * ASCII character + */ +unsigned char ctype[128] = { +/*NUL*/ ILL, ILL, ILL, ILL, ILL, ILL, ILL, ILL, +/*BS*/ ILL, SPACE, ILL, ILL, SPACE, ILL, ILL, ILL, +/*DLE*/ ILL, ILL, ILL, ILL, ILL, ILL, ILL, ILL, +/*CAN*/ ILL, ILL, ILL, ILL, ILL, ILL, ILL, ILL, +/*SPC*/ SPACE, ETC, ETC, ETC, LETTER, BINOP, BINOP, ETC, +/*(*/ ETC, ETC, BINOP, BINOP, ETC, BINOP, LETTER, BINOP, +/*0*/ DGT2, DGT2, DGT8, DGT8, DGT8, DGT8, DGT8, DGT8, +/*8*/ DGT10, DGT10, ETC, ETC, BINOP, ETC, BINOP, ETC, +/*@*/ ETC, LTR16, LTR16, LTR16, LTR16, LTR16, LTR16, LETTER, +/*H*/ LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, +/*P*/ LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, +/*X*/ LETTER, LETTER, LETTER, BINOP, ETC, ETC, BINOP, LETTER, +/*`*/ ETC, LTR16, LTR16, LTR16, LTR16, LTR16, LTR16, LETTER, +/*h*/ LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, +/*p*/ LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, +/*x*/ LETTER, LETTER, LETTER, ETC, BINOP, ETC, ETC, ETC +}; + +/* + * an array of characters which + * perform the case translation function + */ +#if CASE_SENSITIVE +#else +char ccase[128] = { +/*NUL*/ '\000', '\001', '\002', '\003', '\004', '\005', '\006', '\007', +/*BS*/ '\010', '\011', '\012', '\013', '\014', '\015', '\016', '\017', +/*DLE*/ '\020', '\021', '\022', '\023', '\024', '\025', '\026', '\027', +/*CAN*/ '\030', '\031', '\032', '\033', '\034', '\035', '\036', '\037', +/*SPC*/ '\040', '\041', '\042', '\043', '\044', '\045', '\046', '\047', +/*(*/ '\050', '\051', '\052', '\053', '\054', '\055', '\056', '\057', +/*0*/ '\060', '\061', '\062', '\063', '\064', '\065', '\066', '\067', +/*8*/ '\070', '\071', '\072', '\073', '\074', '\075', '\076', '\077', +/*@*/ '\100', '\141', '\142', '\143', '\144', '\145', '\146', '\147', +/*H*/ '\150', '\151', '\152', '\153', '\154', '\155', '\156', '\157', +/*P*/ '\160', '\161', '\162', '\163', '\164', '\165', '\166', '\167', +/*X*/ '\170', '\171', '\172', '\133', '\134', '\135', '\136', '\137', +/*`*/ '\140', '\141', '\142', '\143', '\144', '\145', '\146', '\147', +/*h*/ '\150', '\151', '\152', '\153', '\154', '\155', '\156', '\157', +/*p*/ '\160', '\161', '\162', '\163', '\164', '\165', '\166', '\167', +/*x*/ '\170', '\171', '\172', '\173', '\174', '\175', '\176', '\177' +}; +#endif diff --git a/as/link/lkeval.c b/as/link/lkeval.c new file mode 100644 index 0000000..433edbc --- /dev/null +++ b/as/link/lkeval.c @@ -0,0 +1,404 @@ +/* lkeval.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include "aslink.h" + +/*)Module lkeval.c + * + * The module lkeval.c contains the routines to evaluate + * arithmetic/numerical expressions. The functions in + * lkeval.c perform a recursive evaluation of the arithmetic + * expression read from the input text line. + * The expression may include binary/unary operators, brackets, + * symbols, labels, and constants in hexadecimal, decimal, octal + * and binary. Arithmetic operations are prioritized and + * evaluated by normal arithmetic conventions. + * + * lkeval.c contains the following functions: + * int digit() + * Addr_T eval() + * Addr_T expr() + * int oprio() + * Addr_T term() + * + * lkeval.c contains no local/static variables + */ + +/*)Function Addr_T eval() + * + * The function eval() evaluates a character string to a + * numerical value. + * + * local variables: + * int c character from input string + * int v value of character in current radix + * Addr_T n evaluation value + * + * global variables: + * int radix current number conversion radix + * + * functions called: + * int digit() lkeval.c + * char get() lklex.c + * char getnb() lklex.c + * VOID unget() lklex.c + * + * side effects: + * Input test is scanned and evaluated to a + * numerical value. + */ + +Addr_T +eval() +{ + register int c, v; + register Addr_T n; + + c = getnb(); + n = 0; + while ((v = digit(c, radix)) >= 0) { + n = n*radix + v; + c = get(); + } + unget(c); + return(n); +} + +/*)Function Addr_T expr(n) + * + * int n a firewall priority; all top + * level calls (from the user) + * should be made with n set to 0. + * + * The function expr() evaluates an expression and + * returns the value. + * + * local variables: + * int c current input text character + * int p current operator priority + * Addr_T v value returned by term() + * Addr_T ve value returned by a + * recursive call to expr() + * + * global variables: + * char ctype[] array of character types, one per + * ASCII character + * int lkerr error flag + * FILE * stderr c_library + * + * functions called: + * VOID expr() lkeval.c + * int fprintf() c_library + * int getnb() lklex.c + * int oprio() lkeval.c + * VOID term() lkeval.c + * VOID unget() lklex.c + * + * + * side effects: + * An expression is evaluated by scanning the input + * text string. + */ + +Addr_T +expr (n) +{ + register int c, p; + register Addr_T v, ve; + + v = term(); + while (ctype[c = getnb()] & BINOP) { + if ((p = oprio(c)) <= n) + break; + if ((c == '>' || c == '<') && c != get()) { + fprintf(stderr, "Invalid expression"); + lkerr++; + return(v); + } + ve = expr(p); + if (c == '+') { + v += ve; + } else + if (c == '-') { + v -= ve; + } else { + switch (c) { + + case '*': + v *= ve; + break; + + case '/': + v /= ve; + break; + + case '&': + v &= ve; + break; + + case '|': + v |= ve; + break; + + case '%': + v %= ve; + break; + + case '^': + v ^= ve; + break; + + case '<': + v <<= ve; + break; + + case '>': + v >>= ve; + break; + } + } + } + unget(c); + return(v); +} + +/*)Function Addr_T term() + * + * The function term() evaluates a single constant + * or symbol value prefaced by any unary operator + * ( +, -, ~, ', ", >, or < ). + * + * local variables: + * int c current character + * char id[] symbol name + * int n value of digit in current radix + * int r current evaluation radix + * sym * sp pointer to a sym structure + * Addr_T v evaluation value + * + * global variables: + * char ctype[] array of character types, one per + * ASCII character + * int lkerr error flag + * + * functions called: + * int digit() lkeval.c + * VOID expr() lkeval.c + * int fprintf() c_library + * int get() lklex.c + * VOID getid() lklex.c + * int getmap() lklex.c + * int getnb() lklex.c + * sym * lkpsym() lksym.c + * Addr_T symval() lksym.c + * VOID unget() lklex.c + * + * side effects: + * An arithmetic term is evaluated by scanning input text. + */ + +Addr_T +term() +{ + register int c, r, n; + register Addr_T v; + struct sym *sp; + char id[NCPS]; + + c = getnb(); + if (c == '#') { c = getnb(); } + if (c == '(') { + v = expr(0); + if (getnb() != ')') { + fprintf(stderr, "Missing delimiter"); + lkerr++; + } + return(v); + } + if (c == '-') { + return(0-expr(100)); + } + if (c == '~') { + return(~expr(100)); + } + if (c == '\'') { + return(getmap(-1)&0377); + } + if (c == '\"') { + if (hilo) { + v = (getmap(-1)&0377)<<8; + v |= getmap(-1)&0377; + } else { + v = getmap(-1)&0377; + v |= (getmap(-1)&0377)<<8; + } + return(v); + } + if (c == '>' || c == '<') { + v = expr(100); + if (c == '>') + v >>= 8; + return(v&0377); + } + if (ctype[c] & DIGIT) { + r = 10; + if (c == '0') { + c = get(); + switch (c) { + case 'b': + case 'B': + r = 2; + c = get(); + break; + case '@': + case 'o': + case 'O': + case 'q': + case 'Q': + r = 8; + c = get(); + break; + case 'd': + case 'D': + r = 10; + c = get(); + break; + case 'h': + case 'H': + case 'x': + case 'X': + r = 16; + c = get(); + break; + default: + break; + } + } + v = 0; + while ((n = digit(c, r)) >= 0) { + v = r*v + n; + c = get(); + } + unget(c); + return(v); + } + if (ctype[c] & LETTER) { + getid(id, c); + if ((sp = lkpsym(id, 0)) == NULL) { + fprintf(stderr, "Undefined symbol %8s\n", id); + lkerr++; + return(0); + } else { + return(symval(sp)); + } + } + /* Shouldn't get here. */ + return(0); +} + +/*)Function int digit(c, r) + * + * int c digit character + * int r current radix + * + * The function digit() returns the value of c + * in the current radix r. If the c value is not + * a number of the current radix then a -1 is returned. + * + * local variables: + * none + * + * global variables: + * char ctype[] array of character types, one per + * ASCII character + * + * functions called: + * none + * + * side effects: + * none + */ + +int +digit(c, r) +register int c, r; +{ + if (r == 16) { + if (ctype[c] & RAD16) { + if (c >= 'A' && c <= 'F') + return (c - 'A' + 10); + if (c >= 'a' && c <= 'f') + return (c - 'a' + 10); + return (c - '0'); + } + } else + if (r == 10) { + if (ctype[c] & RAD10) + return (c - '0'); + } else + if (r == 8) { + if (ctype[c] & RAD8) + return (c - '0'); + } else + if (r == 2) { + if (ctype[c] & RAD2) + return (c - '0'); + } + return (-1); +} + +/*)Function int oprio(c) + * + * int c operator character + * + * The function oprio() returns a relative priority + * for all valid unary and binary operators. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ + +int +oprio(c) +register int c; +{ + if (c == '*' || c == '/' || c == '%') + return (10); + if (c == '+' || c == '-') + return (7); + if (c == '<' || c == '>') + return (5); + if (c == '^') + return (4); + if (c == '&') + return (3); + if (c == '|') + return (1); + return (0); +} diff --git a/as/link/lkhead.c b/as/link/lkhead.c new file mode 100644 index 0000000..0dd2f5d --- /dev/null +++ b/as/link/lkhead.c @@ -0,0 +1,161 @@ +/* lkhead.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include "aslink.h" + +/*Module lkhead.c + * + * The module lkhead.c contains the function newhead() which + * creates a head structure and the function module() which + * loads the module name into the current head structure. + * + * lkhead.c contains the following functions: + * VOID newhead() + * VOID module() + * + * lkhead.c contains no local variables. + */ + +/*)Function VOID newhead() + * + * The function newhead() creates a head structure. All head + * structures are linked to form a linked list of head structures + * with the current head structure at the tail of the list. + * + * local variables: + * int i evaluation value + * head * thp temporary pointer + * to a header structure + * + * global variables: + * area *ap Pointer to the current + * area structure + * lfile *cfp The pointer *cfp points to the + * current lfile structure + * head *headp The pointer to the first + * head structure of a linked list + * head *hp Pointer to the current + * head structure + * + * functions called: + * Addr_T expr() lkeval.c + * VOID * new() lksym.c + * VOID lkparea() lkarea.c + * + * side effects: + * A new head structure is created and linked to any + * existing linked head structure. The head structure + * parameters of file handle, number of areas, and number + * of global symbols are loaded into the structure. + * The default area "_abs_" is created when the first + * head structure is created and an areax structure is + * created for every head structure called. + */ + +/* + * Create a new header entry. + * + * H n areas n global symbols + * | | + * | `---- hp->h_nglob + * `------------ hp->h_narea + * + */ +VOID +newhead() +{ + register int i; + struct head *thp; + + hp = (struct head *) new (sizeof(struct head)); + if (headp == NULL) { + headp = hp; + } else { + thp = headp; + while (thp->h_hp) + thp = thp->h_hp; + thp->h_hp = hp; + } + /* + * Set file pointer + */ + hp->h_lfile = cfp; + /* + * Evaluate and build Area pointer list + */ + i = hp->h_narea = eval(); + if (i) + hp->a_list = (struct areax **) new (i*sizeof(struct areax *)); + /* + * Evaluate and build Global symbol pointer list + */ + skip(-1); + i = hp->h_nglob = eval(); + if (i) + hp->s_list = (struct sym **) new (i*sizeof(struct sym *)); + /* + * Setup Absolute DEF linkage. + */ + lkparea(_abs_); + ap->a_flag = A_ABS; + axp->a_addr = 0; +} + +/*)Function VOID module() + * + * The function module() copies the module name into + * the current head structure. + * + * local variables: + * char id[] module id string + * + * global variables: + * head *headp The pointer to the first + * head structure of a linked list + * head *hp Pointer to the current + * head structure + * int lkerr error flag + * FILE * stderr c_library + * + * functions called: + * int fprintf() c_library + * VOID getid() lklex.c + * char * strncpy() c_library + * + * side effects: + * The module name is copied into the head structure. + */ + +/* + * Module Name + */ +VOID +module() +{ + char id[NCPS]; + + if (headp) { + getid(id, -1); + strncpy(hp->m_id, id, NCPS); + } else { + fprintf(stderr, "No header defined\n"); + lkerr++; + } +} diff --git a/as/link/lklex.c b/as/link/lklex.c new file mode 100644 index 0000000..8d373a9 --- /dev/null +++ b/as/link/lklex.c @@ -0,0 +1,642 @@ +/* lklex.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include "aslink.h" + +/*)Module lklex.c + * + * The module lklex.c contains the general lexical analysis + * functions used to scan the text lines from the .rel files. + * + * lklex.c contains the fllowing functions: + * char endline() + * char get() + * VOID getfid() + * VOID getid() + * VOID getSid() + * int lk_getline() + * int getmap() + * char getnb() + * int more() + * VOID skip() + * VOID unget() + * + * lklex.c contains no local variables. + */ + +/*)Function VOID getid(id,c) + * + * char * id a pointer to a string of + * maximum length NCPS + * int c mode flag + * >=0 this is first character to + * copy to the string buffer + * <0 skip white space + * + * The function getid() scans the current input text line + * from the current position copying the next LETTER | DIGIT string + * into the external string buffer (id). The string ends when a non + * LETTER or DIGIT character is found. The maximum number of + * characters copied is NCPS. If the input string is larger than + * NCPS characters then the string is truncated, if the input string + * is shorter than NCPS characters then the string is NULL filled. + * If the mode argument (c) is >=0 then (c) is the first character + * copied to the string buffer, if (c) is <0 then intervening white + * space (SPACES and TABS) are skipped. + * + * local variables: + * char * p pointer to external string buffer + * int c current character value + * + * global variables: + * char ctype[] a character array which defines the + * type of character being processed. + * This index is the character + * being processed. + * + * called functions: + * char get() lklex.c + * char getnb() lklex.c + * VOID unget() lklex.c + * + * side effects: + * use of getnb(), get(), and unget() updates the + * global pointer ip the position in the current + * input text line. + */ + +VOID +getid(id, c) +register int c; +char *id; +{ + register char *p; + + if (c < 0) { + c = getnb(); + } + p = id; + do { + if (p < &id[NCPS]) + *p++ = c; + } while (ctype[c=get()] & (LETTER|DIGIT)); + unget(c); + while (p < &id[NCPS]) + *p++ = 0; +} + +/*)Function VOID getSid (char *id) + * + * char * id a pointer to a string of + * maximum length NCPS + * + * getSid is derived from getid. It is called from newsym() + * in lksym.c, when an S-record has to be scanned. getSid accepts + * much more characters than getid, which is necessary for SDCC. + * + * The function getSid() scans the current input text line + * from the current position copying the next string + * into the external string buffer (id). The string ends when a space + * character (space, tab, \0) is found. The maximum number of + * characters copied is NCPS. If the input string is larger than + * NCPS characters then the string is truncated, if the input string + * is shorter than NCPS characters then the string is NULL filled. + * Intervening white space (SPACES and TABS) are skipped. + * + * local variables: + * char * p pointer to external string buffer + * int c current character value + * + * global variables: + * char ctype[] a character array which defines the + * type of character being processed. + * This index is the character + * being processed. + * + * called functions: + * char get() lklex.c + * char getnb() lklex.c + * VOID unget() lklex.c + * + * side effects: + * use of getnb(), get(), and unget() updates the + * global pointer ip the position in the current + * input text line. + */ + +VOID +getSid (char *id) +{ + register int c; + register char *p; + + c = getnb(); + p = id; + do { + if (p < &id[NCPS]) + *p++ = c; + c = get(); + } while (c != '\0' && c != ' ' && c != '\t'); + unget(c); + while (p < &id[NCPS]) + *p++ = 0; +} + +/*)Function VOID getfid(fid,c) + * + * char * str a pointer to a string of + * maximum length PATH_MAX + * int c this is first character to + * copy to the string buffer + * + * The function getfid() scans the current input text line from + * the current position copying the next string into the external + * string buffer (str). The string ends when end of line is found. + * Trailing spaces are removed. The maximum number of characters + * copied is PATH_MAX. If the input string is larger than PATH_MAX + * characters then the string is truncated. The string is NULL + * terminated. + * + * local variables: + * char * p pointer to external string buffer + * int c current character value + * + * global variables: + * char ctype[] a character array which defines the + * type of character being processed. + * This index is the character + * being processed. + * + * called functions: + * char get() lklex.c + * + * side effects: + * use of get() updates the global pointer ip + * the position in the current input text line. + */ + +VOID +getfid(char *str, register int c) +{ + register char *p; + + p = str; + do + { + if (p < &str[PATH_MAX-1]) + *p++ = c; + c = get(); + if (c == ';') + while (c) + c = get(); + } while (c); + /* trim trailing spaces */ + --p; + while (p >= str && ctype[(int)*p] == SPACE) + --p; + /* terminate the string */ + *(++p) = '\0'; +} + +/*)Function char getnb() + * + * The function getnb() scans the current input text + * line returning the first character not a SPACE or TAB. + * + * local variables: + * int c current character from input + * + * global variables: + * none + * + * called functions: + * char get() lklex.c + * + * side effects: + * use of get() updates the global pointer ip, the position + * in the current input text line + */ + +char +getnb() +{ + register int c; + + while ((c=get())==' ' || c=='\t') + ; + return (c); +} + +/*)Function VOID skip() + * + * The function skip() scans the input text skipping all + * letters and digits. + * + * local variables: + * none + * + * global variables: + * char ctype[] array of character types, one per + * ASCII character + * + * functions called: + * char get() lklex.c + * char getnb() lklex.c + * VOID unget() lklex.c + * + * side effects: + * Input letters and digits are skipped. + */ + +VOID +skip(register int c) +{ + if (c < 0) + c = getnb(); + while (ctype[c=get()] & (LETTER|DIGIT)) { ; } + unget(c); +} + +/*)Function char get() + * + * The function get() returns the next character in the + * input text line, at the end of the line a + * NULL character is returned. + * + * local variables: + * int c current character from + * input text line + * + * global variables: + * char * ip pointer into the current + * input text line + * + * called functions: + * none + * + * side effects: + * updates ip to the next character position in the + * input text line. If ip is at the end of the + * line, ip is not updated. + */ + +char +get() +{ + register int c; + + if ((c = *ip) != 0) + ++ip; + return (c); +} + +/*)Function VOID unget(c) + * + * int c value of last character + * read from input text line + * + * If (c) is not a NULL character then the global pointer ip + * is updated to point to the preceeding character in the + * input text line. + * + * NOTE: This function does not push the character (c) + * back into the input text line, only + * the pointer ip is changed. + * + * local variables: + * int c last character read + * from input text line + * + * global variables: + * char * ip position into the current + * input text line + * + * called functions: + * none + * + * side effects: + * ip decremented by 1 character position + */ + +VOID +unget(int c) +{ + if (c != 0) + --ip; +} + +/*)Function int getmap(d) + * + * int d value to compare with the + * input text line character + * + * The function getmap() converts the 'C' style characters \b, \f, + * \n, \r, and \t to their equivalent ascii values and also + * converts 'C' style octal constants '\123' to their equivalent + * numeric values. If the first character is equivalent to (d) then + * a (-1) is returned, if the end of the line is detected then + * a 'q' error terminates the parse for this line, or if the first + * character is not a \ then the character value is returned. + * + * local variables: + * int c value of character + * from input text line + * int n looping counter + * int v current value of numeric conversion + * + * global variables: + * none + * + * called functions: + * char get() lklex.c + * VOID unget() lklex.c + * + * side effects: + * use of get() updates the global pointer ip the position + * in the current input text line + */ + +int +getmap(int d) +{ + register int c, n, v; + + if ((c = get()) == '\0') + return (-1); + if (c == d) + return (-1); + if (c == '\\') { + c = get(); + switch (c) { + + case 'b': + c = '\b'; + break; + + case 'f': + c = '\f'; + break; + + case 'n': + c = '\n'; + break; + + case 'r': + c = '\r'; + break; + + case 't': + c = '\t'; + break; + + case '0': + case '1': + case '2': + case '3': + case '4': + case '5': + case '6': + case '7': + n = 0; + v = 0; + while (++n<=3 && c>='0' && c<='7') { + v = (v<<3) + c - '0'; + c = get(); + } + unget(c); + c = v; + break; + } + } + return (c); +} + +/*)Function int lk_getline() + * + * The function lk_getline() reads a line of input text from a + * .rel source text file, a .lnk command file or from stdin. + * Lines of text are processed from a single .lnk file or + * multiple .rel files until all files have been read. + * The input text line is copied into the global string ib[] + * and converted to a NULL terminated string. The function + * lk_getline() returns a (1) after succesfully reading a line + * or a (0) if all files have been read. + * This function also opens each input .lst file and output + * .rst file as each .rel file is processed. + * + * local variables: + * int i string length + * int ftype file type + * char * fid file name + * + * global variables: + * lfile *cfp The pointer *cfp points to the + * current lfile structure + * lfile *filep The pointer *filep points to the + * beginning of a linked list of + * lfile structures. + * int gline get a line from the LST file + * to translate for the RST file + * char ib[NINPUT] REL file text line + * int pass linker pass number + * int pflag print linker command file flag + * FILE *rfp The file handle to the current + * output RST file + * FILE *sfp The file handle sfp points to the + * currently open file + * FILE * stdin c_library + * FILE * stdout c_library + * FILE *tfp The file handle to the current + * LST file being scanned + * int uflag update listing flag + * + * called functions: + * FILE * afile() lkmain.c + * int fclose() c_library + * char * fgets() c_library + * int fprintf() c_library + * VOID lkulist() lklist.c + * VOID lkexit() lkmain.c + * int strlen() c_library + * + * side effects: + * The input stream is scanned. The .rel files will be + * opened and closed sequentially scanning each in turn. + */ + +int +lk_getline() +{ + register int ftype; + register char *fid; + +loop: if (pflag && cfp && cfp->f_type == F_STD) + fprintf(stdout, "ASlink >> "); + + if (sfp == NULL || fgets(ib, sizeof ib, sfp) == NULL) { + if (sfp) { + fclose(sfp); + sfp = NULL; + lkulist(0); + } + if (cfp == NULL) { + cfp = filep; + } else { + cfp = cfp->f_flp; + } + if (cfp) { + ftype = cfp->f_type; + fid = cfp->f_idp; + if (ftype == F_STD) { + sfp = stdin; + } else + if (ftype == F_LNK) { + sfp = afile(fid, "lnk", 0); + } else + if (ftype == F_REL) { + sfp = afile(fid, LKOBJEXT, 0); + /* if a .adb file exists then copy it over */ + if (dflag && sfp && dfp && pass == 0) { + FILE *xfp = afile(fid,"adb",0); //JCF: Nov 30, 2002 + if (xfp) { + copyfile(dfp,xfp); + fclose(xfp); + } + } + if (uflag && pass != 0) { + SaveLinkedFilePath(fid); //Save the linked path for aomf51 + if ((tfp = afile(fid, "lst", 0)) != NULL) { + if ((rfp = afile(fid, "rst", 1)) == NULL) { + fclose(tfp); + tfp = NULL; + } + } + } + gline = 1; + } else { + fprintf(stderr, "Invalid file type\n"); + lkexit(1); + } + if (sfp == NULL) { + lkexit(1); + } + goto loop; + } else { + filep = NULL; + return(0); + } + } + chop_crlf(ib); + return (1); +} + +/*)Function int more() + * + * The function more() scans the input text line + * skipping white space (SPACES and TABS) and returns a (0) + * if the end of the line or a comment delimeter (;) is found, + * or a (1) if their are additional characters in the line. + * + * local variables: + * int c next character from + * the input text line + * + * global variables: + * none + * + * called functions: + * char getnb() lklex.c + * VOID unget() lklex.c + * + * side effects: + * use of getnb() and unget() updates the global pointer ip + * the position in the current input text line + */ + +int +more() +{ + register int c; + + c = getnb(); + unget(c); + return( (c == '\0' || c == ';') ? 0 : 1 ); +} + +/*)Function char endline() + * + * The function endline() scans the input text line + * skipping white space (SPACES and TABS) and returns the next + * character or a (0) if the end of the line is found or a + * comment delimiter (;) is found. + * + * local variables: + * int c next character from + * the input text line + * + * global variables: + * none + * + * called functions: + * char getnb() lklex.c + * + * side effects: + * Use of getnb() updates the global pointer ip the + * position in the current input text line. + */ + +char +endline() +{ + register int c; + + c = getnb(); + return( (c == '\0' || c == ';') ? 0 : c ); +} + +/*)Function VOID chop_crlf(str) + * + * char *str string to chop + * + * The function chop_crlf() removes trailing LF or CR/LF from + * str, if present. + * + * local variables: + * int i string length + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ + +VOID +chop_crlf(char *str) +{ + register int i; + + i = strlen(str); + if (i >= 1 && str[i-1] == '\n') str[i-1] = 0; + if (i >= 2 && str[i-2] == '\r') str[i-2] = 0; +} diff --git a/as/link/lklib.c b/as/link/lklib.c new file mode 100644 index 0000000..66ff0be --- /dev/null +++ b/as/link/lklib.c @@ -0,0 +1,252 @@ +/* lklib.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + Copyright (C) 2008-2009 Borut Razem, borut dot razem at siol dot net + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * With contributions for the + * object libraries from + * Ken Hornstein + * kenh@cmf.nrl.navy.mil + * + */ + +/* + * Extensions: P. Felber + */ + +#include + +#include "getline.h" +#include "aslink.h" +#include "lklibr.h" +#include "lkrel.h" + +static int +is_lib (FILE * libfp) +{ + return 1; +} + +#ifdef INDEXLIB +/* buildlibraryindex - build an in-memory cache of the symbols contained in + * the libraries + */ +static pmlibraryfile +buildlibraryindex_lib (struct lbname *lbnh, FILE * libfp, pmlibraryfile This, int type) +{ + char relfil[NINPUT]; + + while (getline (relfil, sizeof (relfil), libfp) != NULL) + { + FILE *fp; + char str[PATH_MAX]; + + if (lbnh->path != NULL) + { + strcpy (str, lbnh->path); +#ifdef OTHERSYSTEM + if ((*str != '\0') && (str[strlen (str) - 1] != '/') && (str[strlen (str) - 1] != LKDIRSEP)) + { + strcat (str, LKDIRSEPSTR); + } +#endif + } + else + str[0] = '\0'; + + if ((relfil[0] == '/') || (relfil[0] == LKDIRSEP)) + { + strcat (str, relfil + 1); + } + else + { + strcat (str, relfil); + } + + if (strchr (relfil, FSEPX) == NULL) + { + sprintf (&str[strlen (str)], "%c%s", FSEPX, LKOBJEXT); + } + + if ((fp = fopen (str, "rb")) != NULL) + { + /* Opened OK - create a new libraryfile object for it */ + if (libr == NULL) + { + libr = This = (pmlibraryfile) new (sizeof (mlibraryfile)); + } + else + { + This->next = (pmlibraryfile) new (sizeof (mlibraryfile)); + This = This->next; + } + This->next = NULL; + This->loaded = -1; + This->libspc = lbnh->libspc; + This->relfil = strdup (relfil); + This->filspc = strdup (str); + This->type = type; + + /* Start a new linked list of symbols for this module: */ + This->symbols = NULL; + + add_rel_index (fp, -1, This); + fclose (fp); + } /* Closes if object file opened OK */ + else + { + fprintf (stderr, "?ASlink-Warning-Cannot open library module %s\n", str); + } + } /* Ends while - processing all in libr */ + + return This; +} + +#else + +static int +fndsym_lib (const char *name, struct lbname *lbnh, FILE * libfp, int type) +{ + char relfil[NINPUT]; + + D ("Searching symbol: %s\n", name); + + while (getline (relfil, sizeof (relfil), libfp) != NULL) + { + char str[PATH_MAX]; + FILE *fp; + + if (lbnh->path != NULL) + { + strcpy (str, lbnh->path); +#ifdef OTHERSYSTEM + if ((*str != '\0') && (str[strlen (str) - 1] != '/') && (str[strlen (str) - 1] != LKDIRSEP)) + { + strcat (str, LKDIRSEPSTR); + } +#endif + } + else + str[0] = '\0'; + + if ((relfil[0] == '/') || (relfil[0] == LKDIRSEP)) + { + strcat (str, relfil + 1); + } + else + { + strcat (str, relfil); + } + + if (strchr (relfil, FSEPX) == NULL) + { + sprintf (&str[strlen (str)], "%c%s", FSEPX, LKOBJEXT); + } + + if ((fp = fopen (str, "rb")) != NULL) + { + /* Opened OK - create a new libraryfile object for it */ + int ret = add_rel_file (name, lbnh, relfil, str, -1, fp, -1, type); + fclose (fp); + if (ret) + { + D ("Loaded module %s from file %s.\n", str, str); + /* if cdb information required & adb file present */ + if (dflag && dfp) + { + FILE *xfp = afile (str, "adb", 0); //JCF: Nov 30, 2002 + if (xfp) + { + SaveLinkedFilePath (str); + copyfile (dfp, xfp); + fclose (xfp); + } + } + return 1; /* Found the symbol, so success! */ + } + } /* Closes if object file opened OK */ + else + { + fprintf (stderr, "?ASlink-Warning-Cannot open library module %s\n", str); + } + } /* Ends while - processing all in libr */ + + return 0; /* The symbol is not in this library */ +} +#endif + +/*)Function VOID loadfile_lib(filspc) + * + * char *filspc library object file specification + * + * The function loadfile() links the library object module. + * + * local variables: + * FILE *fp file handle + * int i input line length + * char str[] file input line + * + * global variables: + * char *ip pointer to linker input string + * + * functions called: + * int fclose() c_library + * char *getline() getline.c + * FILE * fopen() c_library + * VOID link_main() lkmain.c + * int strlen() c_library + * + * side effects: + * If file exists it is linked. + */ + +static VOID +loadfile_lib (struct lbfile *lbfh) +{ + FILE *fp; +#ifdef __CYGWIN__ + char posix_path[PATH_MAX]; + void cygwin_conv_to_full_posix_path (char *win_path, char *posix_path); + cygwin_conv_to_full_posix_path (lbfh->filspc, posix_path); + fp = fopen (posix_path, "rb"); +#else + fp = fopen (lbfh->filspc, "rb"); +#endif + + if (fp != NULL) + { + load_rel (fp, -1); + fclose (fp); + } + else + { + fprintf (stderr, "?ASlink-Error-Opening library '%s'\n", lbfh->filspc); + fclose (fp); + lkexit (1); + } +} + +struct aslib_target aslib_target_lib = { + &is_lib, +#ifdef INDEXLIB + &buildlibraryindex_lib, +#else + &fndsym_lib, +#endif + &loadfile_lib, +}; diff --git a/as/link/lklibr.c b/as/link/lklibr.c new file mode 100644 index 0000000..93ac1df --- /dev/null +++ b/as/link/lklibr.c @@ -0,0 +1,843 @@ +/* lklibr.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + Copyright (C) 2008-2009 Borut Razem, borut dot razem at siol dot net + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * With contributions for the + * object libraries from + * Ken Hornstein + * kenh@cmf.nrl.navy.mil + * + */ + +/* + * Extensions: P. Felber + */ + +#include +#include +#include +#include +#include + +#include "aslink.h" +#include "lkrel.h" +#include "lklibr.h" + +/*)Module lklibr.c + * + * The module lklibr.c contains the functions which + * (1) specify the path(s) to library files [.LIB] + * (2) specify the library file(s) [.LIB] to search + * (3) search the library files for specific symbols + * and link the module containing this symbol + * + * lklibr.c contains the following functions: + * VOID addpath() + * VOID addlib() + * VOID addfile() + * VOID search() + * VOID fndsym() + * VOID library() + * VOID loadfile() + * + */ + +#define EQ(A,B) !strcmp((A),(B)) +#define NELEM(x) (sizeof (x) / sizeof (*x)) + +#ifdef INDEXLIB +/* First entry in the library object symbol cache */ +pmlibraryfile libr = NULL; + +int buildlibraryindex (void); +void freelibraryindex (void); +#endif /* INDEXLIB */ + +struct aslib_target *aslib_targets[] = { + &aslib_target_sdcclib, + &aslib_target_ar, + &aslib_target_lib, +}; + +/*)Function VOID addpath() + * + * The function addpath() creates a linked structure containing + * the paths to various object module library files. + * + * local variables: + * lbpath *lbph pointer to new path structure + * lbpath *lbp temporary pointer + * + * global variables: + * lbpath *lbphead The pointer to the first + * path structure + * + * functions called: + * char getnb() lklex.c + * VOID * new() lksym.c + * int strlen() c_library + * char * strcpy() c_library + * VOID unget() lklex.c + * + * side effects: + * An lbpath structure may be created. + */ + +VOID +addpath (void) +{ + struct lbpath *lbph, *lbp; + + lbph = (struct lbpath *) new (sizeof (struct lbpath)); + if (lbphead == NULL) + { + lbphead = lbph; + } + else + { + lbp = lbphead; + while (lbp->next) + { + lbp = lbp->next; + } + lbp->next = lbph; + } + unget (getnb ()); + lbph->path = strdup (ip); +} + +/*)Function VOID addlib() + * + * The function addlib() tests for the existance of a + * library path structure to determine the method of + * adding this library file to the library search structure. + * + * This function calls the function addfile() to actually + * add the library file to the search list. + * + * local variables: + * lbpath *lbph pointer to path structure + * + * global variables: + * lbpath *lbphead The pointer to the first + * path structure + * ip a pointer to the library name + * + * functions called: + * VOID addfile() lklibr.c + * char getnb() lklex.c + * VOID unget() lklex.c + * + * side effects: + * The function addfile() may add the file to + * the library search list. + */ + +VOID +addlib (void) +{ + struct lbpath *lbph; + int foundcount = 0; + + unget (getnb ()); + + if (lbphead == NULL) + { + foundcount = addfile (NULL, ip); + } + else + { + for (lbph = lbphead; lbph; lbph = lbph->next) + { + foundcount += addfile (lbph->path, ip); + } + } + if (foundcount == 0) + { + fprintf (stderr, "?ASlink-Warning-Couldn't find library '%s'\n", ip); + } +} + +/*)Function int addfile(path,libfil) + * + * char *path library path specification + * char *libfil library file specification + * + * The function addfile() searches for the library file + * by concatenating the path and libfil specifications. + * if the library is found, an lbname structure is created + * and linked to any previously defined structures. This + * linked list is used by the function fndsym() to attempt + * to find any undefined symbols. + * + * The function does not give report an error on invalid + * path / file specifications or if the file is not found. + * + * local variables: + * lbname *lbnh pointer to new name structure + * lbname *lbn temporary pointer + * + * global variables: + * lbname *lbnhead The pointer to the first + * path structure + * + * functions called: + * char getnb() lklex.c + * VOID * new() lksym.c + * int strlen() c_library + * char * strcpy() c_library + * VOID unget() lklex.c + * + * side effects: + * An lbname structure may be created. + * + * return: + * 1: the library was found + * 0: the library was not found + */ + +int +addfile (char *path, char *libfil) +{ + FILE *fp; + char *str; + struct lbname *lbnh, *lbn; +#ifdef OTHERSYSTEM + int libfilinc = 0; +#endif + + if (path != NULL) + { + str = (char *) new (strlen (path) + strlen (libfil) + 6); + strcpy (str, path); +#ifdef OTHERSYSTEM + if (strlen (str) && (str[strlen (str) - 1] != '/') && (str[strlen (str) - 1] != LKDIRSEP)) + { + strcat (str, LKDIRSEPSTR); + } +#endif + } + else + { + str = (char *) new (strlen (libfil) + 5); + } + +#ifdef OTHERSYSTEM + if ((libfil[0] == '/') || (libfil[0] == LKDIRSEP)) + { + libfil++; + libfilinc = 1; + } +#endif + + strcat (str, libfil); + if (strchr (libfil, FSEPX) == NULL) + { + sprintf (&str[strlen (str)], "%clib", FSEPX); + } + + fp = fopen (str, "rb"); + if (fp == NULL) + { + /*Ok, that didn't work. Try with the 'libfil' name only */ +#ifdef OTHERSYSTEM + if (libfilinc) + libfil--; +#endif + fp = fopen (libfil, "rb"); + if (fp != NULL) + { + /*Bingo! 'libfil' is the absolute path of the library */ + strcpy (str, libfil); + path = NULL; /*This way 'libfil' and 'path' will be rebuilt from 'str' */ + } + } + + if (path == NULL) + { + /*'path' can not be null since it is needed to find the object files associated with + the library. So, get 'path' from 'str' and then chop it off and recreate 'libfil'. + That way putting 'path' and 'libfil' together will result into the original filepath + as contained in 'str'. */ + int j; + path = strdup (str); + for (j = strlen (path) - 1; j >= 0; j--) + { + if ((path[j] == '/') || (path[j] == LKDIRSEP)) + { + strcpy (libfil, &path[j + 1]); + path[j + 1] = 0; + break; + } + } + if (j <= 0) + path[0] = 0; + } + + if (fp != NULL) + { + fclose (fp); + lbnh = (struct lbname *) new (sizeof (struct lbname)); + if (lbnhead == NULL) + { + lbnhead = lbnh; + } + else + { + lbn = lbnhead; + while (lbn->next) + { + lbn = lbn->next; + } + lbn->next = lbnh; + } + + lbnh->path = path; + lbnh->libfil = strdup (libfil); + lbnh->libspc = str; + return 1; + } + else + { + free (str); + return 0; + } +} + +/*)Function VOID search() + * + * The function search() looks through all the symbol tables + * at the end of pass 1. If any undefined symbols are found + * then the function fndsym() is called. Function fndsym() + * searches any specified library files to automagically + * import the object modules containing the needed symbol. + * + * After a symbol is found and imported by the function + * fndsym() the symbol tables are again searched. The + * symbol tables are search until no more symbols can be + * resolved within the library files. This ensures that + * back references from one library module to another are + * also resolved. + * + * local variables: + * int i temporary counter + * sym *sp pointer to a symbol structure + * int symfnd found a symbol flag + * + * global variables: + * sym *symhash[] array of pointers to symbol tables + * + * functions called: + * int fndsym() lklibr.c + * + * side effects: + * If a symbol is found then the library object module + * containing the symbol will be imported and linked. + */ + +VOID +search (void) +{ + register struct sym *sp; + register int i, symfnd; + + /* + * Look for undefined symbols. Keep + * searching until no more symbols are resolved. + */ + symfnd = 1; + while (symfnd) + { + symfnd = 0; + /* + * Look through all the symbols + */ + for (i = 0; i < NHASH; ++i) + { + sp = symhash[i]; + while (sp) + { + /* If we find an undefined symbol + * (one where S_DEF is not set), then + * try looking for it. If we find it + * in any of the libraries then + * increment symfnd. This will force + * another pass of symbol searching and + * make sure that back references work. + */ + if ((sp->s_type & S_DEF) == 0) + { + if (fndsym (sp->s_id)) + { + symfnd++; + } + } + sp = sp->s_sp; + } + } + } +} + +/*)Function VOID fndsym(name) + * + * char *name symbol name to find + * + * The function fndsym() searches through all combinations of the + * library path specifications (input by the -k option) and the + * library file specifications (input by the -l option) that + * lead to an existing file. + * + * The file specicifation may be formed in one of two ways: + * + * (1) If the library file contained an absolute + * path/file specification then this becomes filspc. + * (i.e. C:\...) + * + * (2) If the library file contains a relative path/file + * specification then the concatenation of the path + * and this file specification becomes filspc. + * (i.e. \...) + * + * The structure lbfile is created for the first library + * object file which contains the definition for the + * specified undefined symbol. + * + * If the library file [.LIB] contains file specifications for + * non existant files, no errors are returned. + * + * local variables: + * char buf[] [.REL] file input line + * char c [.REL] file input character + * FILE *fp file handle for object file + * lbfile *lbf temporary pointer + * lbfile *lbfh pointer to lbfile structure + * FILE *libfp file handle for library file + * lbname *lbnh pointer to lbname structure + * char *path file specification path + * char relfil[] [.REL] file specification + * char *str combined path and file specification + * char symname[] [.REL] file symbol string + * + * global variables: + * lbname *lbnhead The pointer to the first + * name structure + * lbfile *lbfhead The pointer to the first + * file structure + * + * functions called: + * int fclose() c_library + * FILE *fopen() c_library + * VOID free() c_library + * char getnb() lklex.c + * VOID lkexit() lkmain.c + * VOID loadfile() lklibr.c + * VOID * new() lksym.c + * char * sprintf() c_library + * int sscanf() c_library + * char * strcat() c_library + * char * strchr() c_library + * char * strcpy() c_library + * int strlen() c_library + * int strncmp() c_library + * VOID unget() lklex.c + * + * side effects: + * If the symbol is found then a new lbfile structure + * is created and added to the linked list of lbfile + * structures. The file containing the found symbol + * is linked. + */ + +#ifdef INDEXLIB +int +fndsym (char *name) +{ + struct lbfile *lbfh, *lbf; + pmlibraryfile ThisLibr; + pmlibrarysymbol ThisSym = NULL; + + pmlibraryfile FirstFound; + int numfound = 0; + + D ("Searching symbol: %s\n", name); + + /* Build the index if this is the first call to fndsym */ + if (libr == NULL) + buildlibraryindex (); + + /* Iterate through all library object files */ + FirstFound = libr; /* So gcc stops whining */ + for (ThisLibr = libr; ThisLibr != NULL; ThisLibr = ThisLibr->next) + { + /* Iterate through all symbols in an object file */ + for (ThisSym = ThisLibr->symbols; ThisSym != NULL; ThisSym = ThisSym->next) + { + if (!strcmp (ThisSym->name, name)) + { + if ((!ThisLibr->loaded) && (numfound == 0)) + { + /* Object file is not loaded - add it to the list */ + lbfh = (struct lbfile *) new (sizeof (struct lbfile)); + if (lbfhead == NULL) + { + lbfhead = lbfh; + } + else + { + for (lbf = lbfhead; lbf->next != NULL; lbf = lbf->next) + ; + + lbf->next = lbfh; + } + lbfh->libspc = ThisLibr->libspc; + lbfh->filspc = ThisLibr->filspc; + lbfh->relfil = strdup (ThisLibr->relfil); + lbfh->offset = ThisLibr->offset; + lbfh->type = ThisLibr->type; + + (*aslib_targets[lbfh->type]->loadfile) (lbfh); + + ThisLibr->loaded = 1; + } + + if (numfound == 0) + { + numfound++; + FirstFound = ThisLibr; + } + else + { + char absPath1[PATH_MAX]; + char absPath2[PATH_MAX]; +#if defined(__BORLANDC__) || defined(_MSC_VER) || defined(__MINGW32__) + int j; + + _fullpath (absPath1, FirstFound->libspc, PATH_MAX); + _fullpath (absPath2, ThisLibr->libspc, PATH_MAX); + for (j = 0; absPath1[j] != 0; j++) + absPath1[j] = tolower ((unsigned char) absPath1[j]); + for (j = 0; absPath2[j] != 0; j++) + absPath2[j] = tolower ((unsigned char) absPath2[j]); +#else + realpath (FirstFound->libspc, absPath1); + realpath (ThisLibr->libspc, absPath2); +#endif + if (!(EQ (absPath1, absPath2) && EQ (FirstFound->relfil, ThisLibr->relfil))) + { + if (numfound == 1) + { + fprintf (stderr, "?ASlink-Warning-Definition of public symbol '%s'" " found more than once:\n", name); + fprintf (stderr, " Library: '%s', Module: '%s'\n", FirstFound->libspc, FirstFound->relfil); + } + fprintf (stderr, " Library: '%s', Module: '%s'\n", ThisLibr->libspc, ThisLibr->relfil); + numfound++; + } + } + } + } + } + return numfound; +} + +struct add_sym_s +{ + pmlibraryfile plf; + pmlibrarysymbol pls; +}; + +static int +add_sybmol (const char *sym, void *param) +{ + struct add_sym_s *as = (struct add_sym_s *) param; + pmlibrarysymbol ps = (pmlibrarysymbol) new (sizeof (mlibrarysymbol)); + + D (" Indexing symbol: %s\n", sym); + + as->plf->loaded = 0; + ps->next = NULL; + ps->name = strdup (sym); + + if (as->pls == NULL) + { + as->pls = as->plf->symbols = ps; + } + else + { + as->pls->next = ps; + as->pls = as->pls->next; + } + + return 0; +} + +pmlibrarysymbol +add_rel_index (FILE * fp, long size, pmlibraryfile This) +{ + struct add_sym_s as; + as.plf = This; + as.pls = This->symbols; + + assert (This->symbols == NULL); + + enum_symbols (fp, size, &add_sybmol, &as); + + return as.pls; +} + +/* buildlibraryindex - build an in-memory cache of the symbols contained in + * the libraries + */ +int +buildlibraryindex (void) +{ + pmlibraryfile This = NULL; + struct lbname *lbnh; + + /* + * Search through every library in the linked list "lbnhead". + */ + for (lbnh = lbnhead; lbnh; lbnh = lbnh->next) + { + FILE *libfp; + int i; + + D ("Indexing library: %s\n", lbnh->libspc); + + if ((libfp = fopen (lbnh->libspc, "rb")) == NULL) + { + fprintf (stderr, "?ASlink-Error-Cannot open library file %s\n", lbnh->libspc); + lkexit (1); + } + + for (i = 0; i < NELEM (aslib_targets); ++i) + { + if ((*aslib_targets[i]->is_lib) (libfp)) + { + This = (*aslib_targets[i]->buildlibraryindex) (lbnh, libfp, This, i); + break; + } + } + + if (i >= NELEM (aslib_targets)) + fprintf (stderr, "?ASlink-Error-Unknown library file format %s\n", lbnh->libspc); + + fclose (libfp); + } + + return 0; +} + +/* Release all memory allocated for the in-memory library index */ +void +freelibraryindex (void) +{ + pmlibraryfile ThisLibr, ThisLibr2Free; + pmlibrarysymbol ThisSym, ThisSym2Free; + + ThisLibr = libr; + + while (ThisLibr) + { + ThisSym = ThisLibr->symbols; + + while (ThisSym) + { + free (ThisSym->name); + ThisSym2Free = ThisSym; + ThisSym = ThisSym->next; + free (ThisSym2Free); + } + free (ThisLibr->filspc); + free (ThisLibr->relfil); + ThisLibr2Free = ThisLibr; + ThisLibr = ThisLibr->next; + free (ThisLibr2Free); + } + + libr = NULL; +} + +#else /* INDEXLIB */ + +struct load_sym_s +{ + const char *name; + struct lbname *lbnh; + const char *relfil; + const char *filspc; + int offset; + int type; +}; + +static int +load_sybmol (const char *sym, void *params) +{ + struct load_sym_s *ls = (struct load_sym_s *) params; + + D (" Symbol: %s\n", sym); + + if (strcmp (ls->name, sym) == 0) + { + struct lbfile *lbfh, *lbf; + + D (" Symbol %s found in module %s!\n", sym, ls->relfil); + + lbfh = (struct lbfile *) new (sizeof (struct lbfile)); + lbfh->libspc = ls->lbnh->libspc; + lbfh->relfil = strdup (ls->relfil); + lbfh->filspc = strdup (ls->filspc); + lbfh->offset = ls->offset; + lbfh->type = ls->type; + + if (lbfhead == NULL) + lbfhead = lbfh; + else + { + for (lbf = lbfhead; lbf->next != NULL; lbf = lbf->next) + ; + lbf->next = lbfh; + } + (*aslib_targets[ls->type]->loadfile) (lbfh); + + return 1; + } + else + return 0; +} + +/*)Function int is_module_loaded(filspc) + * + * If this module has been already loaded + */ + +int +is_module_loaded (const char *filspc) +{ + struct lbfile *lbf; + + for (lbf = lbfhead; lbf != NULL; lbf = lbf->next) + { + if (EQ (filspc, lbf->filspc)) + { + D (" Module %s already loaded!\n", filspc); + return 1; /* Module already loaded */ + } + } + return 0; +} + +int +add_rel_file (const char *name, struct lbname *lbnh, const char *relfil, + const char *filspc, int offset, FILE * fp, long size, int type) +{ + struct load_sym_s ls; + + /* If this module has been loaded already don't load it again. */ + if (is_module_loaded (filspc)) + return 0; + else + { + ls.name = name; + ls.lbnh = lbnh; + ls.relfil = relfil; + ls.filspc = filspc; + ls.offset = offset; + ls.type = type; + + return enum_symbols (fp, size, &load_sybmol, &ls); + } +} + +int +fndsym (const char *name) +{ + FILE *libfp; + struct lbname *lbnh; + int i; + + /* + * Search through every library in the linked list "lbnhead". + */ + + D ("Searching symbol: %s\n", name); + + for (lbnh = lbnhead; lbnh; lbnh = lbnh->next) + { + int ret = 0; + + D ("Library: %s\n", lbnh->libspc); + + if ((libfp = fopen (lbnh->libspc, "rb")) == NULL) + { + fprintf (stderr, "?ASlink-Error-Cannot open library file %s\n", lbnh->libspc); + lkexit (1); + } + + for (i = 0; i < NELEM (aslib_targets); ++i) + { + if ((*aslib_targets[i]->is_lib) (libfp)) + { + ret = (*aslib_targets[i]->fndsym) (name, lbnh, libfp, i); + break; + } + } + + if (i >= NELEM (aslib_targets)) + fprintf (stderr, "?ASlink-Error-Unknown library file format %s\n", lbnh->libspc); + + fclose (libfp); + + if (ret) + return 1; + + } /* Ends good open of libr file */ + return 0; +} +#endif /* INDEXLIB */ + +/*)Function VOID library() + * + * The function library() links all the library object files + * contained in the lbfile structures. + * + * local variables: + * lbfile *lbfh pointer to lbfile structure + * + * global variables: + * lbfile *lbfhead pointer to first lbfile structure + * + * functions called: + * VOID loadfile lklibr.c + * + * side effects: + * Links all files contained in the lbfile structures. + */ + +VOID +library (void) +{ + struct lbfile *lbfh; + + for (lbfh = lbfhead; lbfh; lbfh = lbfh->next) + (*aslib_targets[lbfh->type]->loadfile) (lbfh); + +#ifdef INDEXLIB + freelibraryindex (); +#endif +} diff --git a/as/link/lklibr.h b/as/link/lklibr.h new file mode 100644 index 0000000..49659a0 --- /dev/null +++ b/as/link/lklibr.h @@ -0,0 +1,95 @@ +/* lklibr.h + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + Copyright (C) 2008 Borut Razem, borut dot razem at siol dot net + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * With contributions for the + * object libraries from + * Ken Hornstein + * kenh@cmf.nrl.navy.mil + * + */ + +/* + * Extensions: P. Felber + */ + +#ifndef __LKLIBR_H +#define __LKLIBR_H + +#include + +#ifdef INDEXLIB +typedef struct slibrarysymbol mlibrarysymbol; +typedef struct slibrarysymbol *pmlibrarysymbol; + +struct slibrarysymbol +{ + char *name; /* Warning: allocate memory before using */ + pmlibrarysymbol next; +}; + +typedef struct slibraryfile mlibraryfile; +typedef struct slibraryfile *pmlibraryfile; + +struct slibraryfile +{ + int loaded; + char *libspc; + char *relfil; /* Warning: allocate memory before using */ + char *filspc; /* Warning: allocate memory before using */ + long offset; /* The embedded file offset in the library file libspc */ + unsigned int type; + pmlibrarysymbol symbols; + pmlibraryfile next; +}; + +extern pmlibraryfile libr; + +pmlibrarysymbol add_rel_index (FILE * fp, long size, pmlibraryfile This); +#else +int is_module_loaded (const char *filspc); +int add_rel_file (const char *name, struct lbname *lbnh, const char *relfil, + const char *filspc, int offset, FILE * fp, long size, int type); +#endif + +struct aslib_target +{ + int (*is_lib) (FILE * libfp); +#ifdef INDEXLIB + pmlibraryfile (*buildlibraryindex) (struct lbname * lbnh, FILE * libfp, pmlibraryfile This, int type); +#else + int (*fndsym) (const char *name, struct lbname * lbnh, FILE * libfp, int type); +#endif + void (*loadfile) (struct lbfile * lbfh); +}; + +extern struct aslib_target aslib_target_sdcclib; +extern struct aslib_target aslib_target_ar; +extern struct aslib_target aslib_target_lib; + +//// +//#define DEBUG_PRINT + +#ifdef DEBUG_PRINT +# define D printf +#else +# define D 1 ? (void)0 : (*(void (*)(const char *, ...))0) +#endif + +#endif /* __LKLIBR_H */ diff --git a/as/link/lklist.c b/as/link/lklist.c new file mode 100644 index 0000000..3448539 --- /dev/null +++ b/as/link/lklist.c @@ -0,0 +1,1135 @@ +/* lklist.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 28-Oct-97 JLH: + * - lstarea: show s_id as string rather than array [NCPS] + * - lstarea: show a_id as string rather than array [NCPS] + * 31-Oct-97 JLH: add NoICE output file genration in lstarea + * 02-Apr-98 JLH: add XDATA, DATA, BIT flags to area output + */ + +#include +#include +#include +#include "aslink.h" + +/*)Module lklist.c + * + * The module lklist.c contains the functions which + * output the linker .map file and produce a relocated + * listing .rst file. + * + * lklist.c contains the following functions: + * int dgt() + * VOID lstarea() + * VOID lkulist() + * VOID lkalist() + * VOID lkglist() + * VOID newpag() + * VOID slew() + * + * lklist.c contains no local variables. + */ + +/*)Function VOID slew(fp) + * + * FILE * fp output file handle + * + * The function slew() increments the page line counter. + * If the number of lines exceeds the maximum number of + * lines per page then a page skip and a page header are + * output. + * + * local variables: + * int i loop counter + * + * global variables: + * int lop current line number on page + * int xflag Map file radix type flag + * + * functions called: + * int fprintf() c_library + * VOID newpag() lklist.c + * + * side effects: + * The page line and the page count may be updated. + */ + +VOID +slew(fp) +FILE *fp; +{ + register int i; + + if (lop++ >= NLPP) { + newpag(fp); + if (xflag == 0) { + fprintf(fp, "Hexadecimal\n\n"); + } else + if (xflag == 1) { + fprintf(fp, "Octal\n\n"); + } else + if (xflag == 2) { + fprintf(fp, "Decimal\n\n"); + } + fprintf(fp, "Area Addr Size"); + fprintf(fp, " Decimal Bytes (Attributes)\n"); + for(i=0;i<4;++i) + fprintf(fp, " Value--Global"); + fprintf(fp, "\n\n"); + lop += 6; + } +} + +/*)Function VOID newpag() + * + * The function newpag() outputs a page skip, writes the + * first page header line, sets the line count to 1, and + * increments the page counter. + * + * local variables: + * none + * + * global variables: + * int lop current line number on page + * int page current page number + * + * functions called: + * int fprintf() c_library + * + * side effects: + * The page and line counters are updated. + */ + +VOID +newpag(fp) +FILE *fp; +{ + fprintf(fp, "\fASxxxx Linker %s, page %u.\n", VERSION, ++page); + lop = 1; +} + +/* Used for qsort call in lstsym */ +static int _cmpSymByAddr(const void *p1, const void *p2) +{ + struct sym **s1 = (struct sym **)(p1); + struct sym **s2 = (struct sym **)(p2); + int delta = ((*s1)->s_addr + (*s1)->s_axp->a_addr) - + ((*s2)->s_addr + (*s2)->s_axp->a_addr); + + /* Sort first by address, then by name. */ + if (delta) + { + return delta; + } + return strcmp((*s1)->s_id,(*s2)->s_id); +} + + +#if NCPS-8 + +/* NCPS != 8 */ +/*)Function VOID lstarea(xp) + * + * area * xp pointer to an area structure + * + * The function lstarea() creates the linker map output for + * the area specified by pointer xp. The generated output + * area header includes the area name, starting address, + * size of area, number of words (in decimal), and the + * area attributes. The symbols defined in this area are + * sorted by ascending address and output one per line + * in the selected radix. + * + * local variables: + * areax * oxp pointer to an area extension structure + * int c character value + * int i loop counter + * char * ptr pointer to an id string + * int nmsym number of symbols in area + * Addr_T ai temporary + * Addr_T aj temporary + * sym * sp pointer to a symbol structure + * sym ** p pointer to an array of + * pointers to symbol structures + * + * global variables: + * FILE *mfp Map output file handle + * sym *symhash[NHASH] array of pointers to NHASH + * linked symbol lists + * int xflag Map file radix type flag + * + * functions called: + * int fprintf() c_library + * VOID free() c_library + * char * malloc() c_library + * char putc() c_library + * VOID slew() lklist.c + * + * side effects: + * Map output generated. + */ + +VOID +lstarea(struct area *xp) +{ + register struct areax *oxp; + register int i; + register char *ptr; + int nmsym; + Addr_T ai, aj; + struct sym *sp; + struct sym **p; + int memPage; + + putc('\n', mfp); + + /* + * Find number of symbols in area + */ + nmsym = 0; + oxp = xp->a_axp; + while (oxp) { + for (i=0; is_axp) + ++nmsym; + sp = sp->s_sp; + } + } + oxp = oxp->a_axp; + } + if (nmsym == 0) { + return; + } + + if (xflag == 0) { + fprintf(mfp, "Hexadecimal\n\n"); + } else + if (xflag == 1) { + fprintf(mfp, "Octal\n\n"); + } else + if (xflag == 2) { + fprintf(mfp, "Decimal\n\n"); + } + fprintf(mfp, "Area "); + fprintf(mfp, "Addr Size Decimal %s (Attributes)\n", + (xp->a_flag & A_BIT)?"Bits ":"Bytes");/* JCF: For BIT print bits...*/ + fprintf(mfp, "-------------------------------- "); + fprintf(mfp, "---- ---- ------- ----- ------------\n"); + /* + * Output Area Header + */ + ptr = &xp->a_id[0]; + fprintf(mfp, "%-32s", ptr ); /* JLH: width matches --- above */ + ai = xp->a_addr; + aj = xp->a_size; + if (xflag == 0) { + fprintf(mfp, " %04X %04X", ai, aj); + } else + if (xflag == 1) { + fprintf(mfp, " %06o %06o", ai, aj); + } else + if (xflag == 2) { + fprintf(mfp, " %05u %05u", ai, aj); + } + fprintf(mfp, " = %6u. %s ", aj, + (xp->a_flag & A_BIT)?"bits ":"bytes"); /* JCF: For BIT print bits...*/ + if (xp->a_flag & A_ABS) { + fprintf(mfp, "(ABS"); + } else { + fprintf(mfp, "(REL"); + } + if (xp->a_flag & A_OVR) { + fprintf(mfp, ",OVR"); + } else { + fprintf(mfp, ",CON"); + } + if (xp->a_flag & A_PAG) { + fprintf(mfp, ",PAG"); + } + + memPage = 0x00; + if (xp->a_flag & A_CODE) { + fprintf(mfp, ",CODE"); + memPage = 0x0C; + } + if (xp->a_flag & A_XDATA) { + fprintf(mfp, ",XDATA"); + memPage = 0x0D; + } + if (xp->a_flag & A_BIT) { + fprintf(mfp, ",BIT"); + memPage = 0x0B; + } + fprintf(mfp, ")"); + if (xp->a_flag & A_PAG) { + ai = (ai & 0xFF); + aj = (aj > 256); + if (ai || aj) { fprintf(mfp, " "); } + if (ai) { fprintf(mfp, " Boundary"); } + if (ai & aj) { fprintf(mfp, " /"); } + if (aj) { fprintf(mfp, " Length"); } + if (ai || aj) { fprintf(mfp, " Error"); } + } + + /* + * Allocate space for an array of pointers to symbols + * and load array. + */ + if ( (p = (struct sym **) malloc(nmsym*sizeof(struct sym *))) + == NULL) { + fprintf(mfp, "\nInsufficient space to build Map Segment.\n"); + return; + } + nmsym = 0; + oxp = xp->a_axp; + while (oxp) { + for (i=0; is_axp) { + p[nmsym++] = sp; + } + sp = sp->s_sp; + } + } + oxp = oxp->a_axp; + } + + qsort(p, nmsym, sizeof(struct sym *), _cmpSymByAddr); + + /* + * Symbol Table Output + */ + + i = 0; + fprintf(mfp, "\n\n"); + fprintf(mfp, " Value Global\n"); + fprintf(mfp, " -------- --------------------------------"); + while (i < nmsym) { + fprintf(mfp, "\n"); + if (memPage != 0) + fprintf(mfp, " %02X:", memPage); + else + fprintf(mfp, " "); + + sp = p[i]; + aj = sp->s_addr + sp->s_axp->a_addr; + if (xflag == 0) { + fprintf(mfp, "%04X ", aj); + } else + if (xflag == 1) { + fprintf(mfp, "%06o ", aj); + } else + if (xflag == 2) { + fprintf(mfp, "%05u ", aj); + } + ptr = &sp->s_id[0]; + fprintf(mfp, "%s", ptr ); + + /* if cdb flag set the output cdb Information + and the symbol has a '$' sign in it then */ + if (dflag && + strchr(ptr,'$')) + fprintf(dfp,"L:%s:%X\n",ptr,aj); + + /* NoICE output of symbol */ + if (jflag) DefineNoICE( ptr, aj, memPage ); + + i++; + } + putc('\n', mfp); + free(p); +} + +#else + +/* NCPS == 8 */ +/*)Function VOID lstarea(xp) + * + * area * xp pointer to an area structure + * + * The function lstarea() creates the linker map output for + * the area specified by pointer xp. The generated output + * area header includes the area name, starting address, + * size of area, number of words (in decimal), and the + * area attributes. The symbols defined in this area are + * sorted by ascending address and output four per line + * in the selected radix. + * + * local variables: + * areax * oxp pointer to an area extension structure + * int c character value + * int i loop counter + * char * ptr pointer to an id string + * int nmsym number of symbols in area + * Addr_T ai temporary + * Addr_T aj temporary + * sym * sp pointer to a symbol structure + * sym ** p pointer to an array of + * pointers to symbol structures + * + * global variables: + * FILE *mfp Map output file handle + * sym *symhash[NHASH] array of pointers to NHASH + * linked symbol lists + * int xflag Map file radix type flag + * + * functions called: + * int fprintf() c_library + * VOID free() c_library + * char * malloc() c_library + * char putc() c_library + * VOID slew() lklist.c + * + * side effects: + * Map output generated. + */ + +VOID +lstarea(struct area *xp) +{ + register struct areax *oxp; + register int c, i; + register char *ptr; + int nmsym; + Addr_T ai, aj; + struct sym *sp; + struct sym **p; + int page; + + putc('\n', mfp); + slew(mfp); + /* + * Output Area Header + */ + ptr = &xp->a_id[0]; + while (ptr < &xp->a_id[NCPS]) { + if ((c = *ptr++) != 0) { + putc(c, mfp); + } else { + putc(' ', mfp); + } + } + ai = xp->a_addr; + aj = xp->a_size; + if (xflag == 0) { + fprintf(mfp, " %04X %04X", ai, aj); + } else + if (xflag == 1) { + fprintf(mfp, " %06o %06o", ai, aj); + } else + if (xflag == 2) { + fprintf(mfp, " %05u %05u", ai, aj); + } + fprintf(mfp, " = %6u. bytes ", aj); + if (xp->a_flag & A_ABS) { + fprintf(mfp, "(ABS"); + } else { + fprintf(mfp, "(REL"); + } + if (xp->a_flag & A_OVR) { + fprintf(mfp, ",OVR"); + } else { + fprintf(mfp, ",CON"); + } + if (xp->a_flag & A_PAG) { + fprintf(mfp, ",PAG"); + } + + page = 0x00; + if (xp->a_flag & A_CODE) { + fprintf(mfp, ",CODE"); + memPage = 0x0C; + } + if (xp->a_flag & A_XDATA) { + fprintf(mfp, ",XDATA"); + memPage = 0x0D; + } + if (xp->a_flag & A_BIT) { + fprintf(mfp, ",BIT"); + memPage = 0x0B; + } + fprintf(mfp, ")"); + if (xp->a_flag & A_PAG) { + ai = (ai & 0xFF); + aj = (aj > 256); + if (ai || aj) { fprintf(mfp, " "); } + if (ai) { fprintf(mfp, " Boundary"); } + if (ai & aj) { fprintf(mfp, " /"); } + if (aj) { fprintf(mfp, " Length"); } + if (ai || aj) { fprintf(mfp, " Error"); } + } + + /* + * Find number of symbols in area + */ + nmsym = 0; + oxp = xp->a_axp; + while (oxp) { + for (i=0; is_axp) + ++nmsym; + sp = sp->s_sp; + } + } + oxp = oxp->a_axp; + } + if (nmsym == 0) { + putc('\n', mfp); + slew(mfp); + return; + } + + /* + * Allocate space for an array of pointers to symbols + * and load array. + */ + if ( (p = (struct sym **) malloc(nmsym*sizeof(struct sym *))) + == NULL) { + fprintf(mfp, "\nInsufficient space to build Map Segment.\n"); + slew(mfp); + return; + } + nmsym = 0; + oxp = xp->a_axp; + while (oxp) { + for (i=0; is_axp) { + p[nmsym++] = sp; + } + sp = sp->s_sp; + } + } + oxp = oxp->a_axp; + } + + qsort(p, nmsym, sizeof(struct sym *), _cmpSymByAddr); + + /* + * Symbol Table Output + */ + i = 0; + while (i < nmsym) { + fprintf(mfp, "\n"); + slew(mfp); + fprintf(mfp, " "); + sp = p[i]; + aj = sp->s_addr + sp->s_axp->a_addr; + if (xflag == 0) { + fprintf(mfp, " %04X ", aj); + } else + if (xflag == 1) { + fprintf(mfp, "%06o ", aj); + } else + if (xflag == 2) { + fprintf(mfp, " %05u ", aj); + } + ptr = &sp->s_id[0]; + fprintf(mfp, "%*s", NCPS, ptr ); + + /* NoICE output of symbol */ + if (jflag) DefineNoICE( ptr, aj, memPage ); + } + putc('\n', mfp); + free(p); + slew(mfp); +} +#endif + +#ifdef SDK +VOID lstareatosym(struct area *xp) +{ + /* Output the current area symbols to a NO$GMB .sym file */ + register struct areax *oxp; + register int i; + int nmsym; + Addr_T a0; + struct sym *sp; + struct sym **p; + + /* + * Find number of symbols in area + */ + nmsym = 0; + oxp = xp->a_axp; + while (oxp) { + for (i=0; is_axp) + ++nmsym; + sp = sp->s_sp; + } + } + oxp = oxp->a_axp; + } + + /* + * Symbol Table Output + */ + if (!((xp->a_size==0)&&(xp->a_addr==0)&&(nmsym==0))) { + /* Dont worry about any area information */ + fprintf(mfp, "; Area: %s\n", xp->a_id ); + if (nmsym>0) { + /* + * Allocate space for an array of pointers to symbols + * and load array. + */ + if ( (p = (struct sym **) malloc(nmsym*sizeof(struct sym *))) + == NULL) { + fprintf(mfp, "\nInsufficient space to build Map Segment.\n"); + return; + } + nmsym = 0; + oxp = xp->a_axp; + while (oxp) { + for (i=0; is_axp) { + p[nmsym++] = sp; + } + sp = sp->s_sp; + } + } + oxp = oxp->a_axp; + } + + qsort(p, nmsym, sizeof(struct sym *), _cmpSymByAddr); + + i = 0; + while (i < nmsym) { + /* no$gmb requires the symbol names to be less than 32 chars long. Truncate. */ + char name[32]; + strncpy(name, p[i]->s_id, 31); + name[31] = '\0'; + if ((strncmp("l__", name, 3)!=0)&&(strchr(name,' ')==NULL)) { + a0=p[i]->s_addr + p[i]->s_axp->a_addr; + if (a0>0x7FFFU) { + /* Not inside the ROM, so treat as being in bank zero */ + fprintf(mfp, "00:%04X %s\n", a0, name); + } + else { + fprintf(mfp, "%02X:%04X %s\n", a0/16384, a0, name); + } + } + i++; + } + free(p); + } + } +} +#endif + +/*)Function VOID lkulist(i) + * + * int i i # 0 process LST to RST file + * i = 0 copy remainder of LST file + * to RST file and close files + * + * The function lkulist() creates a relocated listing (.rst) + * output file from the ASxxxx assembler listing (.lst) + * files. The .lst file's program address and code bytes + * are changed to reflect the changes made by ASlink as + * the .rel files are combined into a single relocated + * output file. + * + * local variables: + * Addr_T pc current program counter address + * + * global variables: + * int hilo byte order + * int gline get a line from the LST file + * to translate for the RST file + * char rb[] read listing file text line + * FILE *rfp The file handle to the current + * output RST file + * int rtcnt count of data words + * int rtflg[] output the data flag + * Addr_T rtval[] relocated data + * FILE *tfp The file handle to the current + * LST file being scanned + * + * functions called: + * int fclose() c_library + * int fgets() c_library + * int fprintf() c_library + * VOID lkalist() lklist.c + * VOID lkglist() lklist.c + * + * side effects: + * A .rst file is created for each available .lst + * file associated with a .rel file. + */ + +VOID +lkulist(int i) +{ + Addr_T pc; + + /* + * Exit if listing file is not open + */ + if (tfp == NULL) + return; + + /* + * Normal processing of LST to RST + */ + if (i) { + /* + * Evaluate current code address + */ + if (hilo == 0) { + pc = ((rtval[1] & 0xFF) << 8) + (rtval[0] & 0xFF); + } else { + pc = ((rtval[0] & 0xFF) << 8) + (rtval[1] & 0xFF); + } + + /* + * Line with only address + */ + if (rtcnt == 2) { + lkalist(pc); + + /* + * Line with address and code + */ + } else { + for (i=2; i < rtcnt; i++) { + if (rtflg[i]) { + lkglist(pc++, rtval[i] & 0xFF); + } + } + } + + /* + * Copy remainder of LST to RST + */ + } else { + if (gline == 0) + fprintf(rfp, "%s", rb); + + while (fgets(rb, sizeof(rb), tfp) != 0) { + fprintf(rfp, "%s", rb); + } + fclose(tfp); + tfp = NULL; + fclose(rfp); + rfp = NULL; + } +} + +/*)Function VOID lkalist(pc) + * + * int pc current program counter value + * + * The function lkalist() performs the following functions: + * + * (1) if the value of gline = 0 then the current listing + * file line is copied to the relocated listing file output. + * + * (2) the listing file is read line by line and copied to + * the relocated listing file until a valid source + * line number and a program counter value of the correct + * radix is found. The new relocated pc value is substituted + * and the line is written to the RST file. + * + * local variables: + * int i loop counter + * char str[] temporary string + * + * global variables: + * int gcntr data byte counter + * int gline get a line from the LST file + * to translate for the RST file + * char rb[] read listing file text line + * char *rp pointer to listing file text line + * FILE *rfp The file handle to the current + * output RST file + * FILE *tfp The file handle to the current + * LST file being scanned + * + * functions called: + * int dgt() lklist.c + * int fclose() c_library + * int fgets() c_library + * int fprintf() c_library + * int sprintf() c_library + * char * strncpy() c_library + * + * side effects: + * Lines of the LST file are copied to the RST file, + * the last line copied has the code address + * updated to reflect the program relocation. + */ + +VOID +lkalist(Addr_T pc) +{ + char str[8]; + int i; + + /* + * Exit if listing file is not open + */ +loop: if (tfp == NULL) + return; + + /* + * Copy current LST to RST + */ + if (gline == 0) { + fprintf(rfp, "%s", rb); + gline = 1; + } + + /* + * Clear text line buffer + */ + for (i=0,rp=rb; i. */ + +/* + * Extensions to CUG 292 linker ASLINK to produce NoICE debug files + * + * 31-Oct-1997 by John Hartman + * 30-Jan-98 JLH add page to DefineNoICE for 8051 + * 2-Feb-98 JLH Allow optional .nest on local vars - C scoping rules... + */ + +#include +#include +#include +#include "aslink.h" + +static void DefineGlobal( char *name, Addr_T value, int page ); +static void DefineScoped( char *name, Addr_T value, int page ); +static void DefineFile( char *name, Addr_T value, int page ); +static void DefineFunction( char *name, Addr_T value, int page ); +static void DefineStaticFunction( char *name, Addr_T value, int page ); +static void DefineEndFunction( Addr_T value, int page ); +static void DefineLine( char *lineString, Addr_T value, int page ); +static void PagedAddress( Addr_T value, int page ); + +/* + * Called from lstarea in lklist.c for each symbol. + * + * Generates appropriate NoICE commands into output file, if any is open + * + */ +void DefineNoICE( char *name, Addr_T value, int page ) +{ + char token1[NCPS]; /* parse for file.function.symbol */ + char token2[NCPS]; + char token3[NCPS]; + // char token4[NCPS]; + char sep1, sep2; + int j, level; + + /* no output if file is not open */ + if (jfp == NULL) return; + + j = sscanf( name, "%[^.]%c%[^.]%c%s", + token1, &sep1, token2, &sep2, token3 ); + switch (j) + { + /* file.function.symbol, or file.function..SPECIAL */ + case 5: + DefineFile( token1, 0, 0 ); + if (token3[0] == '.') + { + if (strcmp( token3, ".FN" ) == 0) + { + /* Global function */ + DefineFunction( token2, value, page ); + } + else if (strcmp( token3, ".SFN" ) == 0) + { + /* Static (file-scope) function */ + DefineStaticFunction( token2, value, page ); + } + else if (strcmp( token3, ".EFN" ) == 0) + { + /* End of function */ + DefineEndFunction( value, page ); + } + } + else + { + /* Function-scope var. */ + DefineFunction( token2, 0, 0 ); + + /* Look for optional level integer */ + j = sscanf( token3, "%[^.]%c%u", token1, &sep1, &level ); + if ((j == 3) && (level != 0)) + { + sprintf( &token1[ strlen(token1) ], "_%u", level ); + } + DefineScoped( token1, value, page ); + } + break; + + /* file.func. is illegal */ + case 4: + break; + + /* either file.symbol or file.line# */ + case 3: + DefineFile( token1, 0, 0 ); + if ((token2[0] >= '0') && (token2[0] <= '9')) + { + /* Line number */ + DefineLine( token2, value, page ); + } + else + { + /* File-scope symbol. (Kill any function) */ + DefineEndFunction( 0, 0 ); + DefineScoped( token2, value, page ); + } + break; + + /* symbol. is illegal */ + case 2: + break; + + /* just a symbol */ + case 1: + DefineGlobal( token1, value, page ); + break; + } +} + +static char currentFile[NCPS]; +static char currentFunction[NCPS]; + +/* + * static function: + * Define "name" as a global symbol + */ +void DefineGlobal( char *name, Addr_T value, int page ) +{ + fprintf( jfp, "DEF %s ", name ); + PagedAddress( value, page ); +} + +/* + * static function: + * Define "name" as a static (scoped) symbol + */ +void DefineScoped( char *name, Addr_T value, int page ) +{ + fprintf( jfp, "DEFS %s ", name ); + PagedAddress( value, page ); +} + +/* + * static function: + * Define "name" as the current file + */ +void DefineFile( char *name, Addr_T value, int page ) +{ + if (as_strcmpi( name, currentFile ) != 0) + { + strcpy( currentFile, name ); + if (value != 0) + { + fprintf( jfp, "FILE %s ", name ); + PagedAddress( value, page ); + } + else + { + fprintf( jfp, "FILE %s\n", name ); + } + } +} + +/* + * static function: + * Define "name" as the current function + */ +void DefineFunction( char *name, Addr_T value, int page ) +{ + if (as_strcmpi( name, currentFunction ) != 0) + { + strcpy( currentFunction, name ); + if (value != 0) + { + fprintf( jfp, "DEF %s ", name ); + PagedAddress( value, page ); + fprintf( jfp, "FUNC %s ", name ); + PagedAddress( value, page ); + } + else + { + fprintf( jfp, "FUNC %s\n", name ); + } + } +} + +/* + * static function: + * Define "name" as the current static (scoped) function + */ +void DefineStaticFunction( char *name, Addr_T value, int page ) +{ + if (as_strcmpi( name, currentFunction ) != 0) + { + strcpy( currentFunction, name ); + if (value != 0) + { + fprintf( jfp, "DEFS %s ", name ); + PagedAddress( value, page ); + fprintf( jfp, "SFUNC %s ", name ); + PagedAddress( value, page ); + } + else + { + fprintf( jfp, "SFUNC %s\n", name ); + } + } +} + +/* + * static function: + * Define the end of the current function + */ +void DefineEndFunction( Addr_T value, int page ) +{ + if (currentFunction[0] != 0) + { + if (value != 0) + { + fprintf( jfp, "ENDF " ); + PagedAddress( value, page ); + } + else + { + fprintf( jfp, "ENDF\n" ); + } + + currentFunction[0] = 0; + } +} + +/* + * static function: + * Define "lineNumber" as a line in the current file + */ +void DefineLine( char *lineString, Addr_T value, int page ) +{ + int indigit, lineNumber = 0; + + while( (indigit=digit( *lineString++, 10 )) >= 0) + { + lineNumber = 10*lineNumber + indigit; + } + fprintf( jfp, "LINE %u ", lineNumber ); + PagedAddress( value, page ); +} + +void PagedAddress( Addr_T value, int page ) +{ + fprintf( jfp, "%X:0x%X\n", page, value ); +} diff --git a/as/link/lkrel.c b/as/link/lkrel.c new file mode 100644 index 0000000..5aae61e --- /dev/null +++ b/as/link/lkrel.c @@ -0,0 +1,142 @@ +/* lkrel.c - .rel object file handling + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + Copyright (C) 2008-2009 Borut Razem, borut dot razem at siol dot net + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * With contributions for the + * object libraries from + * Ken Hornstein + * kenh@cmf.nrl.navy.mil + * + */ + +/* + * Extensions: P. Felber + */ + +#include +#include + +#include "getline.h" +#include "aslink.h" +#include "lkrel.h" + +int +is_rel (FILE * libfp) +{ + int c; + long pos = ftell (libfp); + int ret = 0; + + /* [XDQ][HL] */ + if (((c = getc (libfp)) == 'X' || c == 'D' || c == 'Q') && ((c = getc (libfp)) == 'H' || c == 'L')) + { + switch (getc (libfp)) + { + case '\r': + if (getc (libfp) == '\n') + ret = 1; + break; + + case '\n': + ret = 1; + } + } + else if (c == ';') + { + char buf[6]; + + if (fread (buf, 1, sizeof (buf), libfp) == sizeof (buf) && memcmp (buf, "!FILE ", 6) == 0) + ret = 1; + } + fseek (libfp, pos, SEEK_SET); + return ret; +} + +/* Load a standalone or embedded .rel */ +int +load_rel (FILE * libfp, long size) +{ + if (is_rel (libfp)) + { + char str[NINPUT]; + long end; + + end = (size >= 0) ? ftell (libfp) + size : -1; + + while ((end < 0 || ftell (libfp) < end) && getline (str, sizeof (str), libfp) != NULL) + { + if (0 == strcmp (str, "")) + return 1; + + ip = str; + link_main (); + } + + return 1; + } + else + return 0; +} + +int +enum_symbols (FILE * fp, long size, int (*func) (const char *symvoid, void *param), void *param) +{ + char buf[NINPUT]; + long end = (size >= 0) ? ftell (fp) + size : -1; + + assert (func != NULL); + + /* + * Read in the object file. Look for lines that + * begin with "S" and end with "D". These are + * symbol table definitions. If we find one, see + * if it is our symbol. Make sure we only read in + * our object file and don't go into the next one. + */ + + while ((end < 0 || ftell (fp) < end) && getline (buf, sizeof (buf), fp) != NULL) + { + char symname[NINPUT]; + char c; + + /* + * When a 'T line' is found terminate file scan. + * All 'S line's preceed 'T line's in .REL files. + */ + if (buf[0] == 'T') + break; + + /* + * Skip everything that's not a symbol record. + */ + if (buf[0] != 'S') + continue; + + sscanf (buf, "S %s %c", symname, &c); + + /* If it's an actual symbol, record it */ + if (c == 'D') + { + if ((*func) (symname, param)) + return 1; + } + } + + return 0; +} diff --git a/as/link/lkrel.h b/as/link/lkrel.h new file mode 100644 index 0000000..ec846e8 --- /dev/null +++ b/as/link/lkrel.h @@ -0,0 +1,51 @@ +/* lkrel.h - .rel object file handling + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + Copyright (C) 2008-2009 Borut Razem, borut dot razem at siol dot net + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * With contributions for the + * object libraries from + * Ken Hornstein + * kenh@cmf.nrl.navy.mil + * + */ + +/* + * Extensions: P. Felber + */ + +#ifndef __LKREL_H +#define __LKREL_H + +#include + +#ifdef __cplusplus +extern "C" +{ +#endif + + int is_rel (FILE * libfp); + int load_rel (FILE * libfp, long size); + int enum_symbols (FILE * fp, long size, int (*func) (const char *symvoid, void *param), void *param); + + +#ifdef __cplusplus +} +#endif + +#endif /* __LKREL_H */ diff --git a/as/link/lksdcclib.c b/as/link/lksdcclib.c new file mode 100644 index 0000000..6f4dc46 --- /dev/null +++ b/as/link/lksdcclib.c @@ -0,0 +1,402 @@ +/* lksdcclib.c - sdcc library format handling + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + Copyright (C) 2008 Borut Razem, borut dot razem at siol dot net + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * With contributions for the + * object libraries from + * Ken Hornstein + * kenh@cmf.nrl.navy.mil + * + */ + +/* + * Extensions: P. Felber + */ + +#include +#include + +#include "getline.h" +#include "aslink.h" +#include "lklibr.h" +#include "lkrel.h" + +#define EQ(A,B) !strcmp((A),(B)) +#define MAXLINE 254 /*when using getline */ + + +static int +is_sdcclib (FILE * libfp) +{ +#define SDCCLIB_MAGIC "" +#define SDCCLIB_MAGIC_LEN (sizeof ("") - 1) + + char buf[SDCCLIB_MAGIC_LEN]; + + if (fread (buf, 1, sizeof (buf), libfp) == sizeof (buf) && memcmp (buf, SDCCLIB_MAGIC, SDCCLIB_MAGIC_LEN) == 0) + { + switch (getc (libfp)) + { + case '\r': + if (getc (libfp) == '\n') + return 1; + + case '\n': + return 1; + } + } + rewind (libfp); + return 0; +} + +/* Load a .rel file embedded in a sdcclib file */ +static int +LoadRel (char *libfname, FILE * libfp, char *ModName) +{ + char str[NINPUT]; + int state = 0; + + while (getline (str, sizeof (str), libfp) != NULL) + { + switch (state) + { + case 0: + if (EQ (str, "")) + { + if (NULL != getline (str, sizeof (str), libfp) && EQ (str, ModName)) + state = 1; + else + return 0; + } + else + return 0; + break; + + case 1: + return EQ (str, "") ? load_rel (libfp, -1) : 0; + } + } + + return 0; +} + +#ifdef INDEXLIB +static pmlibraryfile +buildlibraryindex_sdcclib (struct lbname *lbnh, FILE * libfp, pmlibraryfile This, int type) +{ + char FLine[MAXLINE]; + int state = 0; + long IndexOffset = 0; + pmlibrarysymbol ThisSym = NULL; + + while (getline (FLine, sizeof (FLine), libfp)) + { + switch (state) + { + case 0: + if (EQ (FLine, "")) + { + /*The next line has the size of the index */ + getline (FLine, sizeof (FLine), libfp); + IndexOffset = atol (FLine); + state = 1; + } + break; + + case 1: + if (EQ (FLine, "")) + { + char buff[PATH_MAX]; + char ModName[NCPS] = ""; + long FileOffset; + + /* The next line has the name of the module and the offset + of the corresponding embedded file in the library */ + getline (FLine, sizeof (FLine), libfp); + sscanf (FLine, "%s %ld", ModName, &FileOffset); + state = 2; + + /* Create a new libraryfile object for this module */ + if (libr == NULL) + { + libr = This = (pmlibraryfile) new (sizeof (mlibraryfile)); + } + else + { + This->next = (pmlibraryfile) new (sizeof (mlibraryfile)); + This = This->next; + } + This->next = NULL; + This->loaded = -1; + This->offset = FileOffset + IndexOffset; + This->libspc = lbnh->libspc; + This->relfil = strdup (ModName); + sprintf (buff, "%s%s%c%s", lbnh->path, ModName, FSEPX, LKOBJEXT); + This->filspc = strdup (buff); + This->type = type; + + This->symbols = ThisSym = NULL; /* Start a new linked list of symbols */ + } + else if (EQ (FLine, "")) + { + return This; /* Finish, get out of here */ + } + break; + + case 2: + if (EQ (FLine, "")) + { + This->loaded = 0; + /* Create the index for the next module */ + state = 1; + } + else + { + /* Add the symbols */ + if (ThisSym == NULL) /* First symbol of the current module */ + { + ThisSym = This->symbols = (pmlibrarysymbol) new (sizeof (mlibrarysymbol)); + } + else + { + ThisSym->next = (pmlibrarysymbol) new (sizeof (mlibrarysymbol)); + ThisSym = ThisSym->next; + } + ThisSym->next = NULL; + ThisSym->name = strdup (FLine); + } + break; + + default: + return This; /* State machine should never reach this point, but just in case... */ + break; + } + } + + return This; /* State machine should never reach this point, but just in case... */ +} + +#else + +/* Load an .adb file embedded in a sdcclib file. If there is +something between and returns 1, otherwise returns 0. +This way the aomf51 will not have useless empty modules. */ + +static int +LoadAdb (FILE * libfp) +{ + char str[MAXLINE]; + int state = 0; + int ret = 0; + + while (getline (str, sizeof (str), libfp) != NULL) + { + switch (state) + { + case 0: + if (EQ (str, "")) + state = 1; + break; + + case 1: + if (EQ (str, "")) + return ret; + fprintf (dfp, "%s\n", str); + ret = 1; + break; + } + } + return ret; +} + +/* Check for a symbol in a SDCC library. If found, add the embedded .rel and + .adb files from the library. The library must be created with the SDCC + librarian 'sdcclib' since the linking process depends on the correct file offsets + embedded in the library file. */ + +static int +findsym_sdcclib (const char *name, struct lbname *lbnh, FILE * libfp, int type) +{ + struct lbfile *lbfh; + char ModName[NCPS] = ""; + char FLine[MAXLINE]; + int state = 0; + long IndexOffset = 0, FileOffset; + + while (getline (FLine, sizeof (FLine), libfp)) + { + char filspc[PATH_MAX]; + + if (lbnh->path != NULL) + { + strcpy (filspc, lbnh->path); +#ifdef OTHERSYSTEM + if (*filspc != '\0' && (filspc[strlen (filspc) - 1] != '/') && (filspc[strlen (filspc) - 1] != LKDIRSEP)) + { + strcat (filspc, LKDIRSEPSTR); + } +#endif + } + + switch (state) + { + case 0: + if (EQ (FLine, "")) + { + /* The next line has the size of the index */ + getline (FLine, sizeof (FLine), libfp); + IndexOffset = atol (FLine); + state = 1; + } + break; + + case 1: + if (EQ (FLine, "")) + { + /* The next line has the name of the module and the offset + of the corresponding embedded file in the library */ + getline (FLine, sizeof (FLine), libfp); + sscanf (FLine, "%s %ld", ModName, &FileOffset); + state = 2; + } + else if (EQ (FLine, "")) + { + /* Reached the end of the index. The symbol is not in this library. */ + return 0; + } + break; + + case 2: + if (EQ (FLine, "")) + { + /* The symbol is not in this module, try the next one */ + state = 1; + } + else + { + /* Check if this is the symbol we are looking for. */ + if (strncmp (name, FLine, NCPS) == 0) + { + /* The symbol is in this module. */ + + /* As in the original library format, it is assumed that the .rel + files reside in the same directory as the lib files. */ + sprintf (&filspc[strlen (filspc)], "%s%c%s", ModName, FSEPX, LKOBJEXT); + + /* If this module has been loaded already don't load it again. */ + if (is_module_loaded (filspc)) + return 1; + + /* Add the embedded file to the list of files to be loaded in + the second pass. That is performed latter by the function + library() below. */ + lbfh = (struct lbfile *) new (sizeof (struct lbfile)); + if (lbfhead == NULL) + { + lbfhead = lbfh; + } + else + { + struct lbfile *lbf; + + for (lbf = lbfhead; lbf->next; lbf = lbf->next) + ; + + lbf->next = lbfh; + } + + lbfh->libspc = lbnh->libspc; + lbfh->filspc = strdup (filspc); + lbfh->relfil = strdup (ModName); + /* Library embedded file, so lbfh->offset must be >=0 */ + lbfh->offset = IndexOffset + FileOffset; + + /* Jump to where the .rel begins and load it. */ + fseek (libfp, lbfh->offset, SEEK_SET); + if (!LoadRel (lbnh->libspc, libfp, ModName)) + { + fclose (libfp); + fprintf (stderr, "?ASlink-Error-Bad offset in library file %s(%s)\n", lbfh->libspc, ModName); + lkexit (1); + } + /* if cdb information required & .adb file present */ + if (dflag && dfp) + { + if (LoadAdb (libfp)) + SaveLinkedFilePath (filspc); + } + return 1; /* Found the symbol, so success! */ + } + } + break; + + default: + return 0; /* It should never reach this point, but just in case... */ + break; + } + } + + return 0; /* The symbol is not in this library */ +} + +#endif + +static void +loadfile_sdcclib (struct lbfile *lbfh) +{ + FILE *fp; + int res; + +#ifdef __CYGWIN__ + char posix_path[PATH_MAX]; + void cygwin_conv_to_full_posix_path (char *win_path, char *posix_path); + cygwin_conv_to_full_posix_path (lbfh->libspc, posix_path); + fp = fopen (posix_path, "rb"); +#else + fp = fopen (lbfh->libspc, "rb"); +#endif + + if (fp != NULL) + { + fseek (fp, lbfh->offset, SEEK_SET); + res = LoadRel (lbfh->libspc, fp, lbfh->relfil); + fclose (fp); + + if (!res) + { + fprintf (stderr, "?ASlink-Error-Bad offset in library file %s(%s)\n", lbfh->libspc, lbfh->relfil); + lkexit (1); + } + } + else + { + fprintf (stderr, "?ASlink-Error-Opening library '%s'\n", lbfh->libspc); + lkexit (1); + } +} + +struct aslib_target aslib_target_sdcclib = { + &is_sdcclib, +#ifdef INDEXLIB + &buildlibraryindex_sdcclib, +#else + &findsym_sdcclib, +#endif + &loadfile_sdcclib, +}; diff --git a/as/link/lkstore.c b/as/link/lkstore.c new file mode 100644 index 0000000..08e981b --- /dev/null +++ b/as/link/lkstore.c @@ -0,0 +1,66 @@ +/* lkstore.c - Allocated string storage module. + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * Allocated string storage module. + * + * 31-Oct-1997 by John Hartman + */ + +#include +#include +#include +#include "aslink.h" + +/* + * Allocate space for "str", copy str into new space + * Return a pointer to the allocated name, or NULL if out of memory + */ +char *StoreString( char *str ) +{ + /* To avoid wasting memory headers on small allocations, we + / allocate a big chunk and parcel it out as required. + / These static variables remember our hunk + */ + #define STR_STORE_HUNK 2000 + static char *pNextFree = NULL; + static int bytesLeft = 0; + + int length; + char *pStoredString; + + length = strlen( str ) + 1; /* what we need, including null */ + + if (length > bytesLeft) + { + /* no space. Allocate a new hunk. We lose the pointer to any + / old hunk. We don't care, as the names are never deleted. + */ + pNextFree = (char*)new( STR_STORE_HUNK ); + bytesLeft = STR_STORE_HUNK; + } + + /* Copy the name and terminating null into the name store */ + pStoredString = pNextFree; + memcpy( pStoredString, str, length ); + + pNextFree += length; + bytesLeft -= length; + + return pStoredString; +} diff --git a/as/link/lksym.c b/as/link/lksym.c new file mode 100644 index 0000000..d3cacbe --- /dev/null +++ b/as/link/lksym.c @@ -0,0 +1,487 @@ +/* lksym.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 28-Oct-97 JLH: + * - lkpsym: Use StoreString for sym construction + * - change symeq() to do length-independent string compare + * - change hash() to do length-independent hash calculation + */ + +#include +#include +#include +#include "aslink.h" + +/*)Module lksym.c + * + * The module lksym.c contains the functions that operate + * on the symbol structures. + * + * lksym.c contains the following functions: + * int hash() + * sym * lkpsym() + * VOID * new() + * sym * newsym() + * VOID symdef() + * int symeq() + * VOID syminit() + * VOID symmod() + * Addr_T symval() + * + * lksym.c contains no local/static variables. + */ + +/*)Function VOID syminit() + * + * The function syminit() is called to clear the hashtable. + * + * local variables: + * int h computed hash value + * sym ** spp pointer to an array of + * sym structure pointers + * + * global variables: + * sym * symhash[] array of pointers to NHASH + * linked symbol lists + * + * functions called: + * none + * + * side effects: + * (1) The symbol hash tables are cleared + */ + +VOID +syminit(void) +{ + struct sym **spp; + + spp = &symhash[0]; + while (spp < &symhash[NHASH]) + *spp++ = NULL; +} + +/*)Function sym * newsym() + * + * The function newsym() is called to evaluate the symbol + * definition/reference directive from the .rel file(s). + * If the symbol is not found in the symbol table a new + * symbol structure is created. Evaluation of the + * directive determines if this is a reference or a definition. + * Multiple definitions of the same variable will be flagged + * as an error if the values are not identical. A symbol + * definition places the symbol value and area extension + * into the symbols data structure. And finally, a pointer + * to the symbol structure is placed into the head structure + * symbol list. Refer to the description of the header, symbol, + * area, and areax structures in lkdata.c for structure and + * linkage details. + * + * local variables: + * int c character from input text + * int i evaluation value + * char id[] symbol name + * int nglob number of symbols in this header + * sym * tsp pointer to symbol structure + * sym ** s list of pointers to symbol structures + * + * global variables: + * areax *axp Pointer to the current + * areax structure + * head *headp The pointer to the first + * head structure of a linked list + * int lkerr error flag + * + * functions called: + * Addr_T eval() lkeval.c + * VOID exit() c_library + * int fprintf() c_library + * char getSid() lklex.c + * char get() lklex.c + * char getnb() lklex.c + * sym * lkpsym() lksym.c + * + * side effects: + * A symbol structure is created and/or modified. + * If structure space allocation fails linker will abort. + * Several severe errors (these are internal errors + * indicating a corrupted .rel file or corrupted + * assembler or linker) will terminated the linker. + */ + +/* + * Find/Create a global symbol entry. + * + * S xxxxxx Defnnnn + * | | | + * | | `-- sp->s_addr + * | `----- sp->s_type + * `------------ sp->s_id + * + */ +struct sym * +newsym(void) +{ + register unsigned i ; + register unsigned nglob ; + register int c ; + struct sym *tsp; + struct sym **s; + char id[NCPS]; + + getSid(id); // old: getid(id, -1); + tsp = lkpsym(id, 1); + c = getnb();get();get(); + if (c == 'R') { + tsp->s_type |= S_REF; + if (eval()) { + fprintf(stderr, "Non zero S_REF\n"); + lkerr++; + } + } else + if (c == 'D') { + i = eval(); + if (tsp->s_type & S_DEF && tsp->s_addr != i) { + fprintf(stderr, "Multiple definition of %s\n", id); + lkerr++; + } + tsp->s_type |= S_DEF; + /* + * Set value and area extension link. + */ + tsp->s_addr = i; + tsp->s_axp = axp; + } else { + fprintf(stderr, "Invalid symbol type %c for %s\n", c, id); + lkexit(1); + } + /* + * Place pointer in header symbol list + */ + if (headp == NULL) { + fprintf(stderr, "No header defined\n"); + lkexit(1); + } + nglob = hp->h_nglob; + s = hp->s_list; + for (i=0; i < nglob ;++i) { + if (s[i] == NULL) { + s[i] = tsp; + return(tsp); + } + } + fprintf(stderr, "Header symbol list overflow\n"); + lkexit(1); + + /* Never reached */ + return(0); +} + +/*)Function sym * lkpsym(id,f) + * + * char * id symbol name string + * int f f == 0, lookup only + * f != 0, create if not found + * + * The function lookup() searches the symbol hash tables for + * a symbol name match returning a pointer to the sym structure. + * If the symbol is not found then a sym structure is created, + * initialized, and linked to the appropriate hash table if f != 0. + * A pointer to this new sym structure is returned or a NULL + * pointer is returned if f == 0. + * + * local variables: + * int h computed hash value + * sym * sp pointer to a sym structure + * + * global varaibles: + * sym * symhash[] array of pointers to NHASH + * linked symbol lists + * + * functions called: + * int hash() lksym.c + * VOID * new() lksym.c + * int symeq() lksym.c + * + * side effects: + * If the function new() fails to allocate space + * for the new sym structure the linker terminates. + */ + +struct sym * +lkpsym(char *id, int f) +{ + register struct sym *sp; + register int h; + + h = hash(id); + sp = symhash[h]; + while (sp != NULL) { + if (symeq(id, sp->s_id)) + return (sp); + sp = sp->s_sp; + } + if (f == 0) + return (NULL); + sp = (struct sym *) new (sizeof(struct sym)); + sp->s_sp = symhash[h]; + symhash[h] = sp; + sp->s_id = StoreString( id ); /* JLH */ + return (sp); +} + +/*)Function Addr_T symval(tsp) + * + * sym * tsp pointer to a symbol structure + * + * The function symval() returns the value of the + * relocated symbol by adding the variable definition + * value to the areax base address. + * + * local variables: + * Addr_T val relocated address value + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ + +Addr_T +symval(register struct sym *tsp) +{ + register Addr_T val; + + val = tsp->s_addr; + if (tsp->s_axp) { + val += tsp->s_axp->a_addr; + } + return(val); +} + +/*)Function VOID symdef(fp) + * + * FILE * fp file handle for output + * + * The function symdef() scans the hashed symbol table + * searching for variables referenced but not defined. + * Undefined variables are linked to the default + * area "_CODE" and reported as referenced by the + * appropriate module. + * + * local variables: + * int i hash table index loop variable + * sym * sp pointer to linked symbol structure + * + * global variables: + * area *areap The pointer to the first + * area structure of a linked list + * sym *symhash[NHASH] array of pointers to NHASH + * linked symbol lists + * + * functions called: + * symmod() lksym.c + * + * side effects: + * Undefined variables have their areas set to "_CODE". + */ + +VOID +symdef(FILE *fp) +{ + register struct sym *sp; + register int i; + + for (i=0; is_axp == NULL) + sp->s_axp = areap->a_axp; + if ((sp->s_type & S_DEF) == 0) + symmod(fp, sp); + sp = sp->s_sp; + } + } +} + +/*)Function VOID symmod(fp,tsp) + * + * FILE * fp output file handle + * sym * tsp pointer to a symbol structure + * + * The function symmod() scans the header structures + * searching for a reference to the symbol structure + * pointer to by tsp. The function then generates an error + * message whichs names the module having referenced the + * undefined variable. + * + * local variables: + * int i loop counter + * sym ** p pointer to a list of pointers + * to symbol structures + * + * global variables: + * head *headp The pointer to the first + * head structure of a linked list + * head *hp Pointer to the current + * head structure + * int lkerr error flag + * + * functions called: + * int fprintf() c_library + * + * side effects: + * Error output generated. + */ + +VOID +symmod(FILE *fp, struct sym *tsp) +{ + register int i; + struct sym **p; + + if ((hp = headp) != NULL) { + while(hp) { + p = hp->s_list; + for (i=0; ih_nglob; ++i) { + if (p[i] == tsp) { + fprintf(fp, "\n?ASlink-Warning-Undefined Global '%s' ", tsp->s_id); + fprintf(fp, "referenced by module '%s'\n", hp->m_id); + lkerr++; + } + } + hp = hp->h_hp; + } + } +} + +/*)Function int symeq(p1, p2) + * + * char * p1 name string + * char * p2 name string + * + * The function symeq() compares the two name strings for a match. + * The return value is 1 for a match and 0 for no match. + * + * local variables: + * int h loop counter + * + * global variables: + * char ccase[] an array of characters which + * perform the case translation function + * + * functions called: + * none + * + * side effects: + * none + * + */ + +int +symeq(register char *p1, register char *p2) +{ +#if CASE_SENSITIVE + return (strncmp( p1, p2, NCPS ) == 0); +#else + return (as_strncmpi( p1, p2, NCPS ) == 0); +#endif +} + +/*)Function int hash(p) + * + * char * p pointer to string to hash + * + * The function hash() computes a hash code using the sum + * of all characters mod table size algorithm. + * + * local variables: + * int h accumulated character sum + * int n loop counter + * + * global variables: + * char ccase[] an array of characters which + * perform the case translation function + * + * functions called: + * none + * + * side effects: + * none + * + */ + +int +hash(register char *p) +{ + register int h, n; + + h = 0; + n = NCPS; + while (*p && n--) { + +#if CASE_SENSITIVE + h += *p++; +#else + h += ccase[(unsigned char)(*p++)]; +#endif + + } + return (h&HMASK); +} + +/*)Function VOID * new(n) + * + * unsigned int n allocation size in bytes + * + * The function new() allocates n bytes of space and returns + * a pointer to this memory. If no space is available the + * linker is terminated. + * + * local variables: + * char * p a general pointer + * char * q a general pointer + * + * global variables: + * none + * + * functions called: + * int fprintf() c_library + * VOID * malloc() c_library + * + * side effects: + * Memory is allocated, if allocation fails + * the linker is terminated. + */ + +VOID * +new(unsigned int n) +{ + register char *p; + + if ((p = (char *) calloc(n, 1)) == NULL) { + fprintf(stderr, "Out of space!\n"); + lkexit(1); + } + return (p); +} diff --git a/as/link/mcs51/Makefile.aslink b/as/link/mcs51/Makefile.aslink new file mode 100644 index 0000000..d9b44fc --- /dev/null +++ b/as/link/mcs51/Makefile.aslink @@ -0,0 +1,70 @@ +CC=gcc +LEX=flex +YACC=bison +INCROOT=.. +CFLAGS=-ggdb -O2 -I $(INCROOT) +TARGETS=$(SDCCDIR)/bin/aslink +ALLOBJECTS= lkmain.o lkhead.o lkarea.o lkdata.o\ + lkeval.o lklex.o lksym.o lkrloc.o\ + lklibr.o lklist.o lkihx.o lks19.o\ + lknoice.o lkmem.o lkaomf51.o\ + ../lkstore.o\ + strcmpi.o +all:: $(TARGETS) + +clean:: + rm -f $(TARGETS) $(ALLOBJECTS) + +lkmain.o : lkmain.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkmain.o lkmain.c + +lkhead.o : lkhead.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkhead.o lkhead.c + +lkarea.o : lkarea.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkarea.o lkarea.c + +lkdata.o : lkdata.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkdata.o lkdata.c + +lkeval.o : lkeval.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkeval.o lkeval.c + +lklex.o : lklex.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lklex.o lklex.c + +lksym.o : lksym.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lksym.o lksym.c + +lkrloc.o : lkrloc.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkrloc.o lkrloc.c + +lklibr.o : lklibr.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lklibr.o lklibr.c + +lklist.o : lklist.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lklist.o lklist.c + +lkihx.o : lkihx.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkihx.o lkihx.c + +lks19.o : lks19.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lks19.o lks19.c + +lkstore.o : lkstore.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o ../lkstore.o ../lkstore.c + +lknoice.o : lknoice.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lknoice.o lknoice.c + +strcmpi.o : strcmpi.c strcmpi.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o strcmpi.o strcmpi.c + +lkmem.o : lkmem.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkmem.o lkmem.c + +lkaomf51.o : lkaomf51.c aslink.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o lkaomf51.o lkaomf51.c + +$(TARGETS): $(ALLOBJECTS) + $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $(ALLOBJECTS) diff --git a/as/link/mcs51/Makefile.bcc b/as/link/mcs51/Makefile.bcc new file mode 100644 index 0000000..5775da2 --- /dev/null +++ b/as/link/mcs51/Makefile.bcc @@ -0,0 +1,19 @@ +# Makefile for Borland C++ + +PRJDIR = ../.. + +!include $(PRJDIR)/Bcc.inc + +LKOBJECTS = lkmain.obj lkarea.obj lkihx.obj \ + lkrloc.obj lks19.obj lkmem.obj \ + ../lkaomf51.obj ../lkdata.obj \ + ../lkeval.obj ../lkhead.obj ../lklex.obj ../lklibr.obj \ + ../lklist.obj ../lknoice.obj ../lkstore.obj ../lksym.obj \ + ../../asxxsrc/strcmpi.obj + +ASLINK = $(PRJDIR)/bin/aslink.exe + +all: $(ASLINK) + +$(ASLINK): $(LKOBJECTS) + $(CC) $(CFLAGS) -e$@ $(LKOBJECTS) diff --git a/as/link/mcs51/Makefile.in b/as/link/mcs51/Makefile.in new file mode 100644 index 0000000..e14498d --- /dev/null +++ b/as/link/mcs51/Makefile.in @@ -0,0 +1,138 @@ +# +# +# + +VERSION = @VERSION@ +VERSIONHI = @VERSIONHI@ +VERSIONLO = @VERSIONLO@ +VERSIONP = @VERSIONP@ + +SHELL = /bin/sh +CC = @CC@ +CPP = @CPP@ +INSTALL = @INSTALL@ +STRIP = @STRIP@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +srcdir = @srcdir@ +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @info@ + +EXEEXT = @EXEEXT@ + +VPATH = @srcdir@ + +CPPFLAGS = @CPPFLAGS@ -I.. -I$(srcdir)/.. +CFLAGS = @CFLAGS@ -Wall -DINDEXLIB -DUNIX -I.. -I$(srcdir)/.. +M_OR_MM = @M_OR_MM@ +LDFLAGS = @LDFLAGS@ + +OBJDIR = obj + +ASXXLIB = $(srcdir)/../../asxxsrc + +LKLIB = $(srcdir)/.. + +ASXXLIBSRC = strcmpi.c + +LKLIBSRC = getline.c lkaomf51.c lkar.c lkdata.c lkeval.c \ + lkhead.c lklex.c lklib.c lklibr.c lklist.c \ + lknoice.c lkrel.c lksdcclib.c lkstore.c lksym.c + +SRC = lkmain.c lkarea.c lkihx.c \ + lkrloc.c lks19.c lkmem.c + +LKSOURCES = $(SRC) $(LKLIBSRC:%.c=$(LKLIB)/%.c) $(ASXXLIBSRC:%.c=$(ASXXLIB)/%.c) + +OBJS = $(SRC:%.c=$(OBJDIR)/%.o) +LKOBJS = $(LKLIBSRC:%.c=$(OBJDIR)/%.o) +ASXXLIBOBJS = $(ASXXLIBSRC:%.c=$(OBJDIR)/%.o) +LKOBJECTS = $(OBJS) $(LKOBJS) $(ASXXLIBOBJS) + +ASLINK = $(top_builddir)/bin/aslink$(EXEEXT) + +transform = @program_transform_name@ + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf $(ASLINK) + +$(ASLINK): $(LKOBJECTS) + $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $(LKOBJECTS) + +# Compiling and installing everything and running test +# ---------------------------------------------------- +install: all installdirs + $(INSTALL) $(ASLINK) `echo $(DESTDIR)$(bindir)/aslink$(EXEEXT)|sed '$(transform)'` + $(STRIP) `echo $(DESTDIR)$(bindir)/aslink$(EXEEXT)|sed '$(transform)'` + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(DESTDIR)$(bindir)/aslink$(EXEEXT) + + +# Performing self-test +# -------------------- +check: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + $(INSTALL) -d $(DESTDIR)$(bindir) + + +# Creating dependencies +# --------------------- +dep: Makefile.dep + +Makefile.dep: $(LKSOURCES) $(LKLIB)/*.h $(top_builddir)/*.h + $(CPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.c,$^) >Makefile.dep + +ifeq "$(findstring $(MAKECMDGOALS),uninstall check installcheck installdirs \ + clean distclean mostlyclean realclean)" "" + -include Makefile.dep +endif +include $(srcdir)/clean.mk + +# My rules +# -------- +$(OBJDIR)/.stamp: + mkdir -p $(OBJDIR) + touch $(OBJDIR)/.stamp + +$(OBJDIR)/%.o: %.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + +$(OBJDIR)/%.o: $(LKLIB)/%.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + +$(OBJDIR)/%.o: $(ASXXLIB)/%.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" freshconf;\ + fi + +# End of Makefile diff --git a/as/link/mcs51/aslink.dsp b/as/link/mcs51/aslink.dsp new file mode 100644 index 0000000..4ac3540 --- /dev/null +++ b/as/link/mcs51/aslink.dsp @@ -0,0 +1,207 @@ +# Microsoft Developer Studio Project File - Name="aslink" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Console Application" 0x0103 + +CFG=aslink - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "aslink.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "aslink.mak" CFG="aslink - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "aslink - Win32 Debug" (based on "Win32 (x86) Console Application") +!MESSAGE "aslink - Win32 Release" (based on "Win32 (x86) Console Application") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "aslink - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "mcs51\Debug" +# PROP BASE Intermediate_Dir "mcs51\Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "MLH_MAP" /FR /FD /GZ /c +# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /D "_DEBUG" /D "WIN32" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "MLH_MAP" /FR /FD /GZ /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 /nologo /subsystem:console /debug /machine:I386 /out:"..\..\..\bin_vc\aslink.exe" /pdbtype:sept +# ADD LINK32 /nologo /subsystem:console /debug /machine:I386 /out:"..\..\..\bin_vc\aslink.exe" /pdbtype:sept + +!ELSEIF "$(CFG)" == "aslink - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 0 +# PROP BASE Output_Dir "mcs51\Release" +# PROP BASE Intermediate_Dir "mcs51\Release" +# PROP BASE Ignore_Export_Lib 0 +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 0 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "MLH_MAP" /FD /c +# ADD CPP /nologo /W3 /GX /O2 /I ".." /D "NDEBUG" /D "WIN32" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "MLH_MAP" /FD /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 /nologo /subsystem:console /machine:I386 /out:"..\..\..\bin_vc\aslink.exe" /pdbtype:sept +# ADD LINK32 /nologo /subsystem:console /machine:I386 /out:"..\..\..\bin_vc\aslink.exe" /pdbtype:sept + +!ENDIF + +# Begin Target + +# Name "aslink - Win32 Debug" +# Name "aslink - Win32 Release" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=..\getline.c +# End Source File +# Begin Source File + +SOURCE=..\lkaomf51.c +# End Source File +# Begin Source File + +SOURCE=..\lkar.c +# End Source File +# Begin Source File + +SOURCE=.\lkarea.c +# End Source File +# Begin Source File + +SOURCE=..\lkdata.c +# End Source File +# Begin Source File + +SOURCE=..\lkeval.c +# End Source File +# Begin Source File + +SOURCE=..\lkhead.c +# End Source File +# Begin Source File + +SOURCE=.\lkihx.c +# End Source File +# Begin Source File + +SOURCE=..\lklex.c +# End Source File +# Begin Source File + +SOURCE=..\lklib.c +# End Source File +# Begin Source File + +SOURCE=..\lklibr.c +# End Source File +# Begin Source File + +SOURCE=..\lklist.c +# End Source File +# Begin Source File + +SOURCE=.\lkmain.c +# End Source File +# Begin Source File + +SOURCE=.\lkmem.c +# End Source File +# Begin Source File + +SOURCE=..\lknoice.c +# End Source File +# Begin Source File + +SOURCE=..\lkrel.c +# End Source File +# Begin Source File + +SOURCE=.\lkrloc.c +# End Source File +# Begin Source File + +SOURCE=.\lks19.c +# End Source File +# Begin Source File + +SOURCE=..\lksdcclib.c +# End Source File +# Begin Source File + +SOURCE=..\lkstore.c +# End Source File +# Begin Source File + +SOURCE=..\lksym.c +# End Source File +# Begin Source File + +SOURCE=..\..\asxxsrc\strcmpi.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=..\aslink.h +# End Source File +# Begin Source File + +SOURCE=..\asxxxx_config.h +# End Source File +# Begin Source File + +SOURCE=..\getline.h +# End Source File +# Begin Source File + +SOURCE=..\lkar.h +# End Source File +# Begin Source File + +SOURCE=..\lklibr.h +# End Source File +# Begin Source File + +SOURCE=..\lkrel.h +# End Source File +# End Group +# End Target +# End Project diff --git a/as/link/mcs51/aslink.mak b/as/link/mcs51/aslink.mak new file mode 100644 index 0000000..300803d --- /dev/null +++ b/as/link/mcs51/aslink.mak @@ -0,0 +1,263 @@ +ORIGIN = Symantec C++ +ORIGIN_VER = Version 7.00 +VERSION = RELEASE + +!IFDEF SUB_DEBUG +DEBUG = $(SUB_DEBUG) +NDEBUG = !$(SUB_DEBUG) +!ELSE +DEBUG = 0 +NDEBUG = 1 +!ENDIF + +PROJ = ASLINK +APPTYPE = DOS EXE +PROJTYPE = EXE + +CC = SC +CPP = SPP +MAKE = SMAKE +RC = RCC +HC = HC31 +ASM = SC +DISASM = OBJ2ASM +LNK = LINK +DLLS = + +HEADERS = ..\linksrc\aslink.h + +DEFFILE = ASLINK.DEF + +!IF $(DEBUG) +OUTPUTDIR = . +CREATEOUTPUTDIR = +TARGETDIR = . +CREATETARGETDIR = + +LIBS = + +CFLAGS = -A -Jm -J -ms -o+time -S -2 -a2 -c +LFLAGS = /PACKF +DEFINES = -D_DEBUG=1 +!ELSE +OUTPUTDIR = . +CREATEOUTPUTDIR = +TARGETDIR = . +CREATETARGETDIR = + +LIBS = + +CFLAGS = -A -Jm -J -ms -o+time -S -2 -a2 -c +LFLAGS = /PACKF +DEFINES = +!ENDIF + +HFLAGS = $(CFLAGS) +MFLAGS = MASTERPROJ=$(PROJ) +LIBFLAGS = /C +RESFLAGS = +DEBUGGERFLAGS = -LOADSYMBOLS +AFLAGS = $(CFLAGS) +HELPFLAGS = + +MODEL = S + +PAR = PROJS BATS OBJS + +RCDEFINES = + +LIBDIRS = + +INCLUDES = -Ic:\asxxxx\linksrc + +INCLUDEDOBJS = + +OBJS = $(OUTPUTDIR)\lkarea.OBJ $(OUTPUTDIR)\lkdata.OBJ $(OUTPUTDIR)\lkeval.OBJ \ + $(OUTPUTDIR)\lkhead.OBJ $(OUTPUTDIR)\lkihx.OBJ $(OUTPUTDIR)\lklex.OBJ $(OUTPUTDIR)\lklibr.OBJ \ + $(OUTPUTDIR)\lklist.OBJ $(OUTPUTDIR)\lkmain.OBJ $(OUTPUTDIR)\lkrloc.OBJ $(OUTPUTDIR)\lks19.OBJ \ + $(OUTPUTDIR)\lksym.OBJ + +RCFILES = + +RESFILES = + +SYMS = + +HELPFILES = + +BATS = + +.SUFFIXES: .C .CP .CPP .CXX .CC .H .HPP .HXX .COM .EXE .DLL .LIB .RTF .DLG .ASM .RES .RC .OBJ + +.C.OBJ: + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$*.obj $*.c + +.CPP.OBJ: + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$*.obj $*.cpp + +.CXX.OBJ: + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$*.obj $*.cxx + +.CC.OBJ: + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$*.obj $*.cc + +.CP.OBJ: + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$*.obj $*.cp + +.H.SYM: + $(CC) $(HFLAGS) $(DEFINES) $(INCLUDES) -HF -o$(*B).sym $*.h + +.HPP.SYM: + $(CC) $(HFLAGS) $(DEFINES) $(INCLUDES) -HF -o$(*B).sym $*.hpp + +.HXX.SYM: + $(CC) $(HFLAGS) $(DEFINES) $(INCLUDES) -HF -o$(*B).sym $*.hxx + +.C.EXP: + $(CPP) $(CFLAGS) $(DEFINES) $(INCLUDES) $*.c -o$*.lst + +.CPP.EXP: + $(CPP) $(CFLAGS) $(DEFINES) $(INCLUDES) $*.cpp -o$*.lst + +.CXX.EXP: + $(CPP) $(CFLAGS) $(DEFINES) $(INCLUDES) $*.cxx -o$*.lst + +.CP.EXP: + $(CPP) $(CFLAGS) $(DEFINES) $(INCLUDES) $*.cp -o$*.lst + +.CC.EXP: + $(CPP) $(CFLAGS) $(DEFINES) $(INCLUDES) $*.cc -o$*.lst + +.ASM.EXP: + $(CPP) $(CFLAGS) $(DEFINES) $(INCLUDES) $*.asm -o$*.lst + +.OBJ.COD: + $(DISASM) $*.OBJ >$*.cod + +.OBJ.EXE: + $(LNK) $(LFLAGS) @$(PROJ).LNK + +.RTF.HLP: + $(HC) $(HELPFLAGS) $*.HPJ + +.ASM.OBJ: + $(ASM) $(AFLAGS) $(DEFINES) $(INCLUDES) -o$*.obj $*.asm + +.RC.RES: + $(RC) $(RCDEFINES) $(RESFLAGS) $(INCLUDES) $*.rc -o$*.res + +.DLG.RES: + echo ^#include "windows.h" >$$$*.rc + echo ^IF EXIST "$*.h" >>$$$*.rc + echo ^#include "$*.h" >>$$$*.rc + echo ^#include "$*.dlg" >>$$$*.rc + $(RC) $(RCDEFINES) $(RESFLAGS) $(INCLUDES) $$$*.rc + -del $*.res + -ren $$$*.res $*.res + + + +all: createdir $(PRECOMPILE) $(SYMS) $(OBJS) $(INCLUDEDOBJS) $(POSTCOMPILE) $(TARGETDIR)\$(PROJ).$(PROJTYPE) $(POSTLINK) _done + +createdir: + $(CREATEOUTPUTDIR) + $(CREATETARGETDIR) + +$(TARGETDIR)\$(PROJ).$(PROJTYPE): $(OBJS) $(INCLUDEDOBJS) $(RCFILES) $(RESFILES) $(HELPFILES) + $(LNK) $(LFLAGS) @$(PROJ).LNK; + -del $(TARGETDIR)\$(PROJ).$(PROJTYPE) + -ren $(TARGETDIR)\$$SCW$$.$(PROJTYPE) $(PROJ).$(PROJTYPE) + -echo $(TARGETDIR)\$(PROJ).$(PROJTYPE) built + +_done: + -echo $(PROJ).$(PROJTYPE) done + +buildall: clean all + + +clean: + -del $(TARGETDIR)\$$SCW$$.$(PROJTYPE) + -del $(TARGETDIR)\$(PROJ).CLE + -del $(OUTPUTDIR)\SCPH.SYM + -del $(OBJS) + +cleanres: + +res: cleanres $(RCFILES) all + + +link: + $(LNK) $(LFLAGS) @$(PROJ).LNK; + -del $(TARGETDIR)\$(PROJ).$(PROJTYPE) + -ren $(TARGETDIR)\$$SCW$$.$(PROJTYPE) $(PROJ).$(PROJTYPE) + + + + +!IF EXIST (ASLINK.dpd) +!INCLUDE ASLINK.dpd +!ENDIF + + + +$(OUTPUTDIR)\lkarea.OBJ: ..\linksrc\lkarea.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lkarea.obj ..\linksrc\lkarea.c + + + +$(OUTPUTDIR)\lkdata.OBJ: ..\linksrc\lkdata.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lkdata.obj ..\linksrc\lkdata.c + + + +$(OUTPUTDIR)\lkeval.OBJ: ..\linksrc\lkeval.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lkeval.obj ..\linksrc\lkeval.c + + + +$(OUTPUTDIR)\lkhead.OBJ: ..\linksrc\lkhead.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lkhead.obj ..\linksrc\lkhead.c + + + +$(OUTPUTDIR)\lkihx.OBJ: ..\linksrc\lkihx.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lkihx.obj ..\linksrc\lkihx.c + + + +$(OUTPUTDIR)\lklex.OBJ: ..\linksrc\lklex.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lklex.obj ..\linksrc\lklex.c + + + +$(OUTPUTDIR)\lklibr.OBJ: ..\linksrc\lklibr.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lklibr.obj ..\linksrc\lklibr.c + + + +$(OUTPUTDIR)\lklist.OBJ: ..\linksrc\lklist.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lklist.obj ..\linksrc\lklist.c + + + +$(OUTPUTDIR)\lkmain.OBJ: ..\linksrc\lkmain.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lkmain.obj ..\linksrc\lkmain.c + + + +$(OUTPUTDIR)\lkrloc.OBJ: ..\linksrc\lkrloc.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lkrloc.obj ..\linksrc\lkrloc.c + + + +$(OUTPUTDIR)\lks19.OBJ: ..\linksrc\lks19.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lks19.obj ..\linksrc\lks19.c + + + +$(OUTPUTDIR)\lksym.OBJ: ..\linksrc\lksym.c + $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o$(OUTPUTDIR)\lksym.obj ..\linksrc\lksym.c + + + + diff --git a/as/link/mcs51/clean.mk b/as/link/mcs51/clean.mk new file mode 100644 index 0000000..5e26992 --- /dev/null +++ b/as/link/mcs51/clean.mk @@ -0,0 +1,25 @@ +# Deleting all files created by building the program +# -------------------------------------------------- +include $(top_builddir)/Makefile.common + +clean: + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + rm -f $(top_builddir)/bin/aslink$(EXEEXT) aslink$(EXEEXT) + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f Makefile *.dep + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean diff --git a/as/link/mcs51/conf.mk b/as/link/mcs51/conf.mk new file mode 100644 index 0000000..e0e3431 --- /dev/null +++ b/as/link/mcs51/conf.mk @@ -0,0 +1,10 @@ +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_prjdir) && $(SHELL) ./config.status + +# End of conf.mk diff --git a/as/link/mcs51/lkarea.c b/as/link/mcs51/lkarea.c new file mode 100644 index 0000000..d8097c5 --- /dev/null +++ b/as/link/mcs51/lkarea.c @@ -0,0 +1,1108 @@ +/* lkarea.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 3-Nov-97 JLH: + * - change lkparea to use a_type == 0 as "virgin area" flag + * 02-Apr-98 JLH: add code to link 8051 data spaces + */ + +#include +#include +#include "aslink.h" + +/*)Module lkarea.c + * + * The module lkarea.c contains the functions which + * create and link together all area definitions read + * from the .rel file(s). + * + * lkarea.c contains the following functions: + * VOID lnkarea() + * VOID lnksect() + * VOID lkparea() + * VOID newarea() + * + * lkarea.c contains no global variables. + */ + +/*)Function VOID newarea() + * + * The function newarea() creates and/or modifies area + * and areax structures for each A directive read from + * the .rel file(s). The function lkparea() is called + * to find the area structure associated with this name. + * If the area does not yet exist then a new area + * structure is created and linked to any existing + * linked area structures. The area flags are copied + * into the area flag variable. For each occurence of + * an A directive an areax structure is created and + * linked to the areax structures associated with this + * area. The size of this area section is placed into + * the areax structure. The flag value for all subsequent + * area definitions for the same area are compared and + * flagged as an error if they are not identical. + * The areax structure created for every occurence of + * an A directive is loaded with a pointer to the base + * area structure and a pointer to the associated + * head structure. And finally, a pointer to this + * areax structure is loaded into the list of areax + * structures in the head structure. Refer to lkdata.c + * for details of the structures and their linkage. + * + * local variables: + * areax **halp pointer to an array of pointers + * int i counter, loop variable, value + * char id[] id string + * int narea number of areas in this head structure + * areax * taxp pointer to an areax structure + * to areax structures + * + * global variables: + * area *ap Pointer to the current + * area structure + * areax *axp Pointer to the current + * areax structure + * head *hp Pointer to the current + * head structure + * int lkerr error flag + * + * functions called: + * Addr_T eval() lkeval.c + * VOID exit() c_library + * int fprintf() c_library + * VOID getid() lklex.c + * VOID lkparea() lkarea.c + * VOID skip() lklex.c + * + * side effects: + * The area and areax structures are created and + * linked with the appropriate head structures. + * Failure to allocate area or areax structure + * space will terminate the linker. Other internal + * errors most likely caused by corrupted .rel + * files will also terminate the linker. + */ + +/* + * Create an area entry. + * + * A xxxxxx size nnnn flags mm + * | | | + * | | `-- ap->a_flag + * | `------------- axp->a_size + * `------------------------- ap->a_id + * + */ +VOID +newarea() +{ + register int i, narea; + struct areax *taxp; + struct areax **halp; + char id[NCPS]; + + /* + * Create Area entry + */ + getid(id, -1); + lkparea(id); + /* + * Evaluate area size + */ + skip(-1); + axp->a_size = eval(); + /* + * Evaluate flags + */ + skip(-1); + i = 0; + taxp = ap->a_axp; + while (taxp->a_axp) { + ++i; + taxp = taxp->a_axp; + } + if (i == 0) { + ap->a_flag = eval(); + } else { + i = eval(); +/* if (i && (ap->a_flag != i)) { */ +/* fprintf(stderr, "Conflicting flags in area %8s\n", id); */ +/* lkerr++; */ +/* } */ + } + /* + * Evaluate area address + */ + skip(-1); + axp->a_addr = eval(); + /* + * Place pointer in header area list + */ + if (headp == NULL) { + fprintf(stderr, "No header defined\n"); + lkexit(1); + } + narea = hp->h_narea; + halp = hp->a_list; + for (i=0; i < narea ;++i) { + if (halp[i] == NULL) { + halp[i] = taxp; + return; + } + } + fprintf(stderr, "Header area list overflow\n"); + lkexit(1); +} + +/*)Function VOID lkparea(id) + * + * char * id pointer to the area name string + * + * The function lkparea() searches the linked area structures + * for a name match. If the name is not found then an area + * structure is created. An areax structure is created and + * appended to the areax structures linked to the area structure. + * The associated base area and head structure pointers are + * loaded into the areax structure. + * + * local variables: + * area * tap pointer to an area structure + * areax * taxp pointer to an areax structure + * + * global variables: + * area *ap Pointer to the current + * area structure + * area *areap The pointer to the first + * area structure of a linked list + * areax *axp Pointer to the current + * areax structure + * + * functions called: + * VOID * new() lksym() + * char * strcpy() c_library + * int symeq() lksym.c + * + * side effects: + * Area and/or areax structures are created. + * Failure to allocate space for created structures + * will terminate the linker. + */ + +VOID +lkparea(char *id) +{ + register struct area *tap; + register struct areax *taxp; + + ap = areap; + axp = (struct areax *) new (sizeof(struct areax)); + axp->a_addr = -1; /* default: no address yet */ + while (ap) { + if (symeq(id, ap->a_id)) { + taxp = ap->a_axp; + while (taxp->a_axp) + taxp = taxp->a_axp; + taxp->a_axp = axp; + axp->a_bap = ap; + axp->a_bhp = hp; + return; + } + ap = ap->a_ap; + } + ap = (struct area *) new (sizeof(struct area)); + if (areap == NULL) { + areap = ap; + } else { + tap = areap; + while (tap->a_ap) + tap = tap->a_ap; + tap->a_ap = ap; + } + ap->a_axp = axp; + axp->a_bap = ap; + axp->a_bhp = hp; + strncpy(ap->a_id, id, NCPS); + ap->a_addr = 0; +} + +/*)Function VOID lnkarea() + * + * The function lnkarea() resolves all area addresses. + * The function evaluates each area structure (and all + * the associated areax structures) in sequence. The + * linking process supports four (4) possible area types: + * + * ABS/OVR - All sections (each individual areax + * section) starts at the identical base + * area address overlaying all other + * areax sections for this area. The + * size of the area is largest of the area + * sections. + * + * ABS/CON - All sections (each individual areax + * section) are concatenated with the + * first section starting at the base + * area address. The size of the area + * is the sum of the section sizes. + * + * NOTE: Multiple absolute (ABS) areas are + * never concatenated with each other, + * thus absolute area A and absolute area + * B will overlay each other if they begin + * at the same location (the default is + * always address 0 for absolute areas). + * + * REL/OVR - All sections (each individual areax + * section) starts at the identical base + * area address overlaying all other + * areax sections for this area. The + * size of the area is largest of the area + * sections. + * + * REL/CON - All sections (each individual areax + * section) are concatenated with the + * first section starting at the base + * area address. The size of the area + * is the sum of the section sizes. + * + * NOTE: Relocatable (REL) areas are always concatenated + * with each other, thus relocatable area B + * (defined after area A) will follow + * relocatable area A independent of the + * starting address of area A. Within a + * specific area each areax section may be + * overlayed or concatenated with other + * areax sections. + * + * + * If a base address for an area is specified then the + * area will start at that address. Any relocatable + * areas defined subsequently will be concatenated to the + * previous relocatable area if it does not have a base + * address specified. + * + * The names s_ and l_ are created to + * define the starting address and length of each area. + * + * local variables: + * Addr_T rloc ;current relocation address + * char temp[] ;temporary string + * struct symbol *sp ;symbol structure + * + * global variables: + * area *ap Pointer to the current + * area structure + * area *areap The pointer to the first + * area structure of a linked list + * + * functions called: + * int fprintf() c_library + * VOID lnksect() lkarea.c + * symbol *lkpsym() lksym.c + * char * strncpy() c_library + * int symeq() lksym.c + * + * side effects: + * All area and areax addresses and sizes are + * determined and saved in their respective + * structures. + */ + +VOID lnksect(register struct area *tap); +/* + * Resolve all area addresses. + */ +VOID +lnkarea() +{ + Addr_T rloc[4]; + int locIndex; + char temp[NCPS]; + struct sym *sp; + /*JCF: used to save the REG_BANK_[0-3] and SBIT_BYTES area pointers*/ + struct area *ta[5]; + int j; + + rloc[0] = rloc[1] = rloc[2] = rloc[3] = 0; + ap = areap; + while (ap) { + if (ap->a_flag&A_ABS) { + /* + * Absolute sections + */ + lnksect(ap); + } else { + /* Determine memory space */ + locIndex = 0; + if (ap->a_flag & A_CODE) { + locIndex = 1; + } + if (ap->a_flag & A_XDATA) { + locIndex = 2; + } + if (ap->a_flag & A_BIT) { + locIndex = 3; + } + /* + * Relocatable sections + */ + if (ap->a_type == 0) { /* JLH */ + ap->a_addr = rloc[ locIndex ]; + ap->a_type = 1; + } + lnksect(ap); + rloc[ locIndex ] = ap->a_addr + ap->a_size; + } + + /* + * Create symbols called: + * s_ the start address of the area + * l_ the length of the area + */ + + if (! symeq(ap->a_id, _abs_)) { + strncpy(temp+2,ap->a_id,NCPS-2); + *(temp+1) = '_'; + + *temp = 's'; + sp = lkpsym(temp, 1); + sp->s_addr = ap->a_addr ; + /* sp->s_axp = ap->a_axp; JLH: was NULL; */ + sp->s_type |= S_DEF; + + *temp = 'l'; + sp = lkpsym(temp, 1); + sp->s_addr = ap->a_size; + sp->s_axp = NULL; + sp->s_type |= S_DEF; + + } + + /*JCF: Since area BSEG is defined just before BSEG_BYTES, use the bit size of BSEG + to compute the byte size of BSEG_BYTES: */ + if (!strcmp(ap->a_id, "BSEG")) { + ap->a_ap->a_axp->a_size += ((ap->a_addr + ap->a_size + 7)/8); /*Bits to bytes*/ + } + else if (!strcmp(ap->a_id, "REG_BANK_0")) ta[0]=ap; + else if (!strcmp(ap->a_id, "REG_BANK_1")) ta[1]=ap; + else if (!strcmp(ap->a_id, "REG_BANK_2")) ta[2]=ap; + else if (!strcmp(ap->a_id, "REG_BANK_3")) ta[3]=ap; + else if (!strcmp(ap->a_id, "BSEG_BYTES")) + { + ta[4]=ap; + for(j=4; j>1; j--) + { + /*If upper register banks are not used roll back the relocation counter*/ + if ( (ta[j]->a_size==0) && (ta[j-1]->a_size==0) ) + { + rloc[0]-=8; + } + else break; + } + } + ap = ap->a_ap; + } +} + +/*)Function VOID lnksect() + * + * area * tap pointer to an area structure + * + * The function lnksect() is the function called by + * lnkarea() to resolve the areax addresses. Refer + * to the function lnkarea() for more detail. Pageing + * boundary and length errors will be reported by this + * function. + * + * local variables: + * Addr_T size size of area + * Addr_T addr address of area + * areax * taxp pointer to an areax structure + * + * global variables: + * int lkerr error flag + * + * functions called: + * none + * + * side effects: + * All area and areax addresses and sizes area determined + * and linked into the structures. + */ + +VOID +lnksect(register struct area *tap) +{ + register Addr_T size, addr; + register struct areax *taxp; + + size = 0; + addr = tap->a_addr; +#if 0 + if ((tap->a_flag&A_PAG) && (addr & 0xFF)) { + fprintf(stderr, + "\n?ASlink-Warning-Paged Area %8s Boundary Error\n", tap->a_id); + lkerr++; + } +#endif + taxp = tap->a_axp; + if (tap->a_flag&A_OVR) { + /* + * Overlayed sections + */ + while (taxp) { + taxp->a_addr = addr; + if (taxp->a_size > size) + size = taxp->a_size; + taxp = taxp->a_axp; + } + } else { + /* + * Concatenated sections + */ + while (taxp) { + taxp->a_addr = addr; + addr += taxp->a_size; + size += taxp->a_size; + taxp = taxp->a_axp; + } + } + tap->a_size = size; + if ((tap->a_flag&A_PAG) && (size > 256)) { + fprintf(stderr, + "\n?ASlink-Warning-Paged Area %8s Length Error\n", tap->a_id); + lkerr++; + } + if ((tap->a_flag&A_PAG) && (tap->a_size) && + ((tap->a_addr & 0xFFFFFF00) != ((addr-1) & 0xFFFFFF00))) + { + fprintf(stderr, + "\n?ASlink-Warning-Paged Area %8s Boundary Error\n", tap->a_id); + lkerr++; + } +} + +Addr_T lnksect2 (struct area *tap, int locIndex); +char idatamap[256]; +unsigned long codemap[524288]; +unsigned long xdatamap[131072]; +struct area *dseg_ap = NULL; +Addr_T dram_start = 0; +Addr_T iram_start = 0; + +/*Modified version of the functions for packing variables in internal data memory*/ +VOID lnkarea2 (void) +{ + Addr_T rloc[4]={0, 0, 0, 0}; + Addr_T gs_size = 0; + int locIndex; + char temp[NCPS]; + struct sym *sp; + int j; + struct area *bseg_ap = NULL; + struct area *abs_ap = NULL; + struct area *gs0_ap = NULL; + struct sym *sp_dseg_s=NULL, *sp_dseg_l=NULL; + + for(j=0; j<256; j++) idatamap[j]=' '; + memset(codemap, 0, sizeof(codemap)); + memset(xdatamap, 0, sizeof(xdatamap)); + + /* first sort all absolute areas to the front */ + ap = areap; + /* no need to check first area, it's in front anyway */ + while (ap && ap->a_ap) + { + if (ap->a_ap->a_flag & A_ABS) + {/* next area is absolute, move it to front, + reversed sequence is no problem for absolutes */ + abs_ap = ap->a_ap; + ap->a_ap = abs_ap->a_ap; + abs_ap->a_ap = areap; + areap = abs_ap; + } + else + { + ap = ap->a_ap; + } + } + + /* next accumulate all GSINITx/GSFINAL area sizes + into GSINIT so they stay together */ + ap = areap; + abs_ap = areap; + while (ap) + { + if (ap->a_flag & A_ABS) + { + abs_ap = ap; /* Remember the last abs area */ + } + if (!strncmp(ap->a_id, "GS", 2)) + {/* GSxxxxx area */ + if (ap->a_size == 0) + { + axp = ap->a_axp; + while (axp) + { + ap->a_size += axp->a_size; + axp = axp->a_axp; + } + } + gs_size += ap->a_size; + if (!strcmp(ap->a_id, "GSINIT0")) + {/* GSINIT0 area */ + gs0_ap = ap; + } + } + /*Since area BSEG is defined just before BSEG_BYTES, use the bit size of BSEG + to compute the byte size of BSEG_BYTES: */ + else if (!strcmp(ap->a_id, "BSEG")) + { + bseg_ap = ap->a_ap; //BSEG_BYTES + for (axp=ap->a_axp; axp; axp=axp->a_axp) + ap->a_size += axp->a_size; + bseg_ap->a_axp->a_size = ((ap->a_addr + ap->a_size + 7)/8); /*Bits to bytes*/ + ap->a_ap = bseg_ap->a_ap; //removed BSEG_BYTES from list + bseg_ap->a_ap = abs_ap->a_ap; + abs_ap->a_ap = bseg_ap; //inserted BSEG_BYTES after abs + bseg_ap = ap; //BSEG + } + else if (!strcmp(ap->a_id, "DSEG")) + { + dseg_ap = ap; /*Need it later*/ + dram_start = ap->a_addr; + } + else if (!strcmp(ap->a_id, "ISEG")) + { + iram_start = ap->a_addr; + } + ap = ap->a_ap; + } + if (gs0_ap) + gs0_ap->a_size = gs_size; + + ap = areap; + while (ap) + { + /* Determine memory space */ + if (ap->a_flag & A_CODE) locIndex = 1; + else if (ap->a_flag & A_XDATA) locIndex = 2; + else if (ap->a_flag & A_BIT) locIndex = 3; + else locIndex = 0; + + if (ap->a_flag & A_ABS) /* Absolute sections */ + { + lnksect2(ap, locIndex); + } + else /* Relocatable sections */ + { + if (ap->a_type == 0) + { + ap->a_addr = rloc[locIndex]; + ap->a_type = 1; + } + + rloc[locIndex] = lnksect2(ap, locIndex); + } + + if (!strcmp(ap->a_id, "BSEG_BYTES")) + { + bseg_ap->a_addr = (ap->a_axp->a_addr - 0x20) * 8; /*Bytes to bits*/ + } + /* + * Create symbols called: + * s_ the start address of the area + * l_ the length of the area + */ + + if (! symeq(ap->a_id, _abs_)) + { + strncpy(temp+2,ap->a_id,NCPS-2); + *(temp+1) = '_'; + + *temp = 's'; + sp = lkpsym(temp, 1); + sp->s_addr = ap->a_addr; + sp->s_type |= S_DEF; + if (!strcmp(ap->a_id, "DSEG")) sp_dseg_s=sp; + + *temp = 'l'; + sp = lkpsym(temp, 1); + sp->s_addr = ap->a_size; + sp->s_axp = NULL; + sp->s_type |= S_DEF; + if (!strcmp(ap->a_id, "DSEG")) sp_dseg_l=sp; + } + + ap = ap->a_ap; + } + + /*Compute the size of DSEG*/ + if(dseg_ap!=NULL) + { + dseg_ap->a_addr=0; + dseg_ap->a_size=0; + for(j=0; j<0x80; j++) if(idatamap[j]!=' ') dseg_ap->a_size++; + } + if(sp_dseg_s!=NULL) sp_dseg_s->s_addr=0; + if(sp_dseg_l!=NULL) sp_dseg_l->s_addr=dseg_ap->a_size; +} + +static +Addr_T find_empty_space(Addr_T start, Addr_T size, unsigned long *map) +{ + int i, j, k; + unsigned long mask, b; + + while (1) + { + Addr_T a = start; + i = start >> 5; + j = (start + size) >> 5; + mask = -(1 << (start & 0x1F)); + + while (i < j) + { + if (map[i] & mask) + { + k = 32; + for (b=0x80000000; b!=0; b>>=1, k--) + { + if (map[i] & b) + break; + } + start = a + k; + break; + } + i++; + mask = 0xFFFFFFFF; + a += 32; + } + if (start > a) + continue; + + mask &= (1 << ((start + size) & 0x1F)) - 1; + if (map[i] & mask) + { + k = 32; + for (b=0x80000000; b!=0; b>>=1, k--) + { + if (map[i] & b) + break; + } + start = (a & ~0x1F) + k; + } + if (start <= a) + break; + } + return start; +} + +static +Addr_T allocate_space(Addr_T start, Addr_T size, char* id, unsigned long *map) +{ + int i, j; + unsigned long mask; + Addr_T a = start; + i = start >> 5; + j = (start + size) >> 5; + mask = -(1 << (start & 0x1F)); + + while (i < j) + { + if (map[i] & mask) + { + fprintf(stderr, "memory overlap near 0x%X for %s\n", a, id); + } + map[i++] |= mask; + mask = 0xFFFFFFFF; + a += 32; + } + mask &= (1 << ((start + size) & 0x1F)) - 1; + if (map[i] & mask) + { + fprintf(stderr, "memory overlap near 0x%X for %s\n", a, id); + } + map[i] |= mask; + return start; +} + +Addr_T lnksect2 (struct area *tap, int locIndex) +{ + register Addr_T size, addr; + register struct areax *taxp; + int j, k, ramlimit, ramstart; + char fchar=' ', dchar='a'; + char ErrMsg[]="?ASlink-Error-Could not get %d consecutive byte%s" + " in internal RAM for area %s.\n"; + + tap->a_unaloc=0; + + /*Notice that only ISEG and SSEG can be in the indirectly addressable internal RAM*/ + if( (!strcmp(tap->a_id, "ISEG")) || (!strcmp(tap->a_id, "SSEG")) ) + { + ramstart = iram_start; + + if ((iram_size <= 0) || (ramstart + iram_size > 0x100)) + ramlimit = 0x100; + else + ramlimit = ramstart + iram_size; + } + else + { + ramstart = dram_start; + + if ((iram_size <= 0) || (ramstart + iram_size > 0x80)) + ramlimit = 0x80; + else + ramlimit = ramstart + iram_size; + } + + size = 0; + addr = tap->a_addr; +#if 0 + if ((tap->a_flag&A_PAG) && (addr & 0xFF)) + { + fprintf(stderr, + "\n?ASlink-Warning-Paged Area %8s Boundary Error\n", tap->a_id); + lkerr++; + } +#endif + taxp = tap->a_axp; + + /*Use a letter to identify each area in the internal RAM layout map*/ + if (locIndex==0) + { + /**/ if(!strcmp(tap->a_id, "DSEG")) + fchar='D'; /*It will be converted to letters 'a' to 'z' later for each areax*/ + else if(!strcmp(tap->a_id, "ISEG")) + fchar='I'; + else if(!strcmp(tap->a_id, "SSEG")) + fchar='S'; + else if(!strcmp(tap->a_id, "OSEG")) + fchar='Q'; + else if(!strcmp(tap->a_id, "REG_BANK_0")) + fchar='0'; + else if(!strcmp(tap->a_id, "REG_BANK_1")) + fchar='1'; + else if(!strcmp(tap->a_id, "REG_BANK_2")) + fchar='2'; + else if(!strcmp(tap->a_id, "REG_BANK_3")) + fchar='3'; + else if(!strcmp(tap->a_id, "BSEG_BYTES")) + fchar='B'; + else if(!strcmp(tap->a_id, "BIT_BANK")) + fchar='T'; + else + fchar=' ';/*???*/ + } + else if (locIndex == 1) + { + /**/ if(!strcmp(tap->a_id, "GSINIT")) + fchar='G'; + } + else if (locIndex == 2) + { + /**/ if(!strcmp(tap->a_id, "XSTK")) + fchar='K'; + } + + if (tap->a_flag&A_OVR) /* Overlayed sections */ + { + while (taxp) + { + if(taxp->a_size == 0) + { + taxp = taxp->a_axp; + continue; + } + + if ( (fchar=='0')||(fchar=='1')||(fchar=='2')||(fchar=='3') ) /*Reg banks*/ + { + addr=(fchar-'0')*8; + taxp->a_addr=addr; + size=taxp->a_size; + for(j=addr; (j<(int)(addr+size)) && (ja_size=0; j(int)taxp->a_size) + taxp->a_size=k; + } + else + { + k=0; + } + } + stacksize=taxp->a_size; + } + + /*If more space required, release the previously allocated areax in + internal RAM and search for a bigger one*/ + if((int)taxp->a_size>size) + { + size=(int)taxp->a_size; + + for(j=ramstart; ja_size) + break; + } + + /*Mark the memory used for overlay*/ + if(k==(int)taxp->a_size) + { + addr = j-k+1; + for(j=addr; (j<(int)(addr+size)); j++) + idatamap[j]=fchar; + } + else /*Couldn't find a chunk big enough: report the problem.*/ + { + tap->a_unaloc=taxp->a_size; + fprintf(stderr, ErrMsg, taxp->a_size, taxp->a_size>1?"s":"", tap->a_id); + lkerr++; + } + } + } + else if (fchar=='T') /*Bit addressable bytes in internal RAM*/ + { + /*Find the size of the space currently used for this areax overlay*/ +// for(j=0x20, size=0; j<0x30; j++) +// if(idatamap[j]==fchar) size++; + + /*If more space required, release the previously allocated areax in + internal RAM and search for a bigger one*/ + if((int)taxp->a_size>size) + { + size=(int)taxp->a_size; + + for(j=0x20; j<0x30; j++) + if(idatamap[j]==fchar) idatamap[j]=' '; + + /*Search for a space large enough in data memory for this overlay areax*/ + for(j=0x20, k=0; j<0x30; j++) + { + if(idatamap[j]==' ') + k++; + else + k=0; + if(k==(int)taxp->a_size) + break; + } + + /*Mark the memory used for overlay*/ + if(k==(int)size) + { + addr = j-k+1; + for(j=addr; (j<(int)(addr+size)); j++) + idatamap[j]=fchar; + } + else /*Couldn't find a chunk big enough: report the problem.*/ + { + tap->a_unaloc=taxp->a_size; + fprintf(stderr, ErrMsg, taxp->a_size, taxp->a_size>1?"s":"", tap->a_id); + lkerr++; + } + } + } + else /*Overlay areas not in internal ram*/ + { + taxp->a_addr = addr; + if (taxp->a_size > size) size = taxp->a_size; + } + taxp = taxp->a_axp; + } + /*Now set all overlayed areax to the same start address*/ + taxp = tap->a_axp; + while (taxp) + { + taxp->a_addr = addr; + taxp = taxp->a_axp; + } + } + else if (tap->a_flag & A_ABS) /* Absolute sections */ + { + while (taxp) + { + if (locIndex == 0) + { + for (j=taxp->a_addr; (j<(int)(taxp->a_addr+taxp->a_size)) && (j<256); j++) + { + if (idatamap[j] == ' ') + idatamap[j] = 'A'; + else + fprintf(stderr, "memory overlap at 0x%X for %s\n", j, tap->a_id); + } + } + else if (locIndex == 1) + { + allocate_space(taxp->a_addr, taxp->a_size, tap->a_id, codemap); + } + else if (locIndex == 2) + { + allocate_space(taxp->a_addr, taxp->a_size, tap->a_id, xdatamap); + } + taxp->a_addr = 0; /* reset to zero so relative addresses become absolute */ + size += taxp->a_size; + taxp = taxp->a_axp; + } + } + else /* Concatenated sections */ + { + if ((locIndex == 1) && tap->a_size) + { + addr = find_empty_space(addr, tap->a_size, codemap); + } + if ((locIndex == 2) && tap->a_size) + { + addr = find_empty_space(addr, tap->a_size, xdatamap); + } + while (taxp) + { + if( (fchar=='D') || (fchar=='I') ) + { + if(taxp->a_size) + { + /*Search for a space large enough in internal RAM for this areax*/ + for(j=ramstart, k=0; ja_size) + break; + } + + if(k==(int)taxp->a_size) + { + taxp->a_addr = j-k+1; + + size += taxp->a_size; + + for(j=taxp->a_addr; (j<(int)(taxp->a_addr+taxp->a_size)) && (ja_size>0)&&(fchar=='D'))dchar++; + if((dchar<'a')||(dchar>'z')) dchar='D'; /*Ran out of letters?*/ + } + else /*We are in trouble, there is not enough memory for an areax chunk*/ + { + taxp->a_addr = addr; + addr += taxp->a_size; + size += taxp->a_size; + tap->a_unaloc+=taxp->a_size; + fprintf(stderr, ErrMsg, taxp->a_size, taxp->a_size>1?"s":"", tap->a_id); + lkerr++; + } + } + taxp = taxp->a_axp; + } + else if(fchar=='B') + { + if(taxp->a_size!=0) + { + /*Search for a space large enough in data memory for this areax*/ + for(j=0x20, k=0; j<0x30; j++) + { + if(idatamap[j]==' ') + k++; + else + k=0; + if(k==(int)taxp->a_size) break; + } + + /*Mark the memory used*/ + if(k==(int)taxp->a_size) + { + taxp->a_addr = j-k+1; + for(j=taxp->a_addr; (j<(int)(taxp->a_addr+taxp->a_size)) && (j<0x30); j++) + idatamap[j]=fchar; + } + else /*Couldn't find a chunk big enough: report the problem.*/ + { + tap->a_unaloc=taxp->a_size; + fprintf(stderr, ErrMsg, taxp->a_size, taxp->a_size>1?"s":"", tap->a_id); + lkerr++; + } + } + size += taxp->a_size; + taxp = taxp->a_axp; + } + else /*For concatenated BIT, CODE, and XRAM areax's*/ + { + if((fchar=='K') && (taxp->a_size == 1)) + { + taxp->a_size = 256-(addr & 0xFF); + } + //find next unused address now + if ((locIndex == 1) && taxp->a_size) + { + addr = find_empty_space(addr, taxp->a_size, codemap); + allocate_space(addr, taxp->a_size, tap->a_id, codemap); + } + if ((locIndex == 2) && taxp->a_size) + { + addr = find_empty_space(addr, taxp->a_size, xdatamap); + allocate_space(addr, taxp->a_size, tap->a_id, xdatamap); + } + taxp->a_addr = addr; + addr += taxp->a_size; + size += taxp->a_size; + taxp = taxp->a_axp; + } + } + } + tap->a_size = size; + tap->a_addr = tap->a_axp->a_addr; + + if ((tap->a_flag&A_PAG) && (size > 256)) + { + fprintf(stderr, + "\n?ASlink-Warning-Paged Area %8s Length Error\n", tap->a_id); + lkerr++; + } + if ((tap->a_flag&A_PAG) && (tap->a_size) && + ((tap->a_addr & 0xFFFFFF00) != ((addr-1) & 0xFFFFFF00))) + { + fprintf(stderr, + "\n?ASlink-Warning-Paged Area %8s Boundary Error\n", tap->a_id); + lkerr++; + } + return addr; +} diff --git a/as/link/mcs51/lkihx.c b/as/link/mcs51/lkihx.c new file mode 100644 index 0000000..bfe383e --- /dev/null +++ b/as/link/mcs51/lkihx.c @@ -0,0 +1,268 @@ +/* lkihx.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include "aslink.h" + +/*)Module lkihx.c + * + * The module lkihx.c contains the function to + * output the relocated object code in the + * Intel Hex format. + * + * lkihx.c contains the following functions: + * VOID hexRecord(addr, rtvalIndex) + * VOID ihx(i) + * VOID ihxExtendedLinearAddress(a) + * + * local variables: hexPageOverrun, lastHexAddr + */ + +/*Intel Hex Format + * Record Mark Field - This field signifies the start of a + * record, and consists of an ascii colon + * (:). + * + * Record Length Field - This field consists of two ascii + * characters which indicate the number of + * data bytes in this record. The + * characters are the result of converting + * the number of bytes in binary to two + * ascii characters, high digit first. An + * End of File record contains two ascii + * zeros in this field. + * + * Load Address Field - This field consists of the four ascii + * characters which result from converting + * the the binary value of the address in + * which to begin loading this record. The + * order is as follows: + * + * High digit of high byte of address. + * Low digit of high byte of address. + * High digit of low byte of address. + * Low digit of low byte of address. + * + * In an End of File record this field con- + * sists of either four ascii zeros or the + * program entry address. Currently the + * entry address option is not supported. + * + * Record Type Field - This field identifies the record type, + * which is either 0 for data records or 1 + * for an End of File record. It consists + * of two ascii characters, with the high + * digit of the record type first, followed + * by the low digit of the record type. + * + * Data Field - This field consists of the actual data, + * converted to two ascii characters, high + * digit first. There are no data bytes in + * the End of File record. + * + * Checksum Field - The checksum field is the 8 bit binary + * sum of the record length field, the load + * address field, the record type field, + * and the data field. This sum is then + * negated (2's complement) and converted + * to two ascii characters, high digit + * first. + */ + +/* Static variable which holds the count of hex page overruns + * (crossings of the 64kB boundary). Cleared at explicit extended + * address output. + */ +static int hexPageOverrun = 0; + +/* Global which holds the last (16 bit) address of hex record. + * Cleared at begin of new area or when the extended address is output. + */ +unsigned int lastHexAddr = 0; + + +/*)Function hexRecord(addr, rtvalIndex) + * + * unsigned addr starting address of hex record + * int rtvalIndex starting index into the rtval[] array + * + * The function hexRecord() outputs the relocated data + * in the standard Intel Hex format (with inserting + * the extended address record if necessary). + * + * local variables: + * Addr_T chksum byte checksum + * int i index for loops + * int overrun temporary storage for hexPageOverrun + * int bytes counter for bytes written + * + * global variables: + * FILE * ofp output file handle + * int rtcnt count of data words + * int rtflg[] output the data flag + * Addr_T rtval[] relocated data + * + * functions called: + * int fprintf() c_library + * ihxExtendedLinearAddress() lkihx.c + * hexRecord() lkihx.c (recursion) + * + * side effects: + * hexPageOverrun is eventually incremented, + * lastHexAddr is updated + */ + +VOID +hexRecord(unsigned addr, int rtvalIndex) +{ + Addr_T chksum; + int i, overrun, bytes; + + for (i = rtvalIndex, chksum = 0; i < rtcnt; i++) { + if (rtflg[i]) { + if (addr + ++chksum > 0xffff) + break; + } + } + if (chksum == 0) + return; // nothing to output + + /* Is this record in the same bank as previous? */ + if ( ((lastHexAddr>>16) != (addr>>16)) && (rflag) ) { + overrun = hexPageOverrun + 1; + ihxExtendedLinearAddress(lastExtendedAddress + overrun); + hexPageOverrun = overrun; + hexRecord(addr, rtvalIndex); + return; + } + + lastHexAddr = addr; + fprintf(ofp, ":%02X%04X00", chksum, addr); + chksum += (addr >> 8) + (addr & 0xff); + for (i = rtvalIndex, bytes = 0; i < rtcnt; i++) { + if (rtflg[i]) { + fprintf(ofp, "%02X", rtval[i]); + chksum += rtval[i]; + if (addr + ++bytes > 0xffff) { + if (rflag) { + fprintf(ofp, "%02X\n", (0-chksum) & 0xff); + overrun = hexPageOverrun + 1; + ihxExtendedLinearAddress(lastExtendedAddress + overrun); + hexPageOverrun = overrun; + hexRecord(0, i + 1); + return; + } else { + fprintf(stderr, + "warning: extended linear address encountered; " + "you probably want the -r flag.\n"); + } + } + } + } + fprintf(ofp, "%02X\n", (0-chksum) & 0xff); +} + +/*)Function ihx(i) + * + * int i 0 - process data + * 1 - end of data + * + * The function ihx() calls the hexRecord() function for processing data + * or writes the End of Data record to the file defined by ofp. + * + * local variables: + * Addr_T n auxiliary variable + * + * global variables: + * int hilo byte order + * FILE * ofp output file handle + * Addr_T rtval[] relocated data + * + * functions called: + * VOID hexRecord() lkihx.c + * int fprintf() c_library + * + * side effects: + * The sequence of rtval[0], rtval[1] is eventually changed. + */ + +VOID +ihx(i) +{ + Addr_T n; + if (i) { + if (hilo == 0) { + n = rtval[0]; + rtval[0] = rtval[1]; + rtval[1] = n; + } + hexRecord((rtval[0]<<8) + rtval[1], 2); + } else { + if (rflag) /* linear start address, hardcoded as reset vector (0x0000) */ + fprintf(ofp, ":0400000500000000F7\n"); + fprintf(ofp, ":00000001FF\n"); + } +} + +/*)Function ihxNewArea(i) + * The function ihxNewArea() is called when processing of new area is started. + * It resets the value of lastHexAddr. + */ + +VOID +ihxNewArea() +{ + lastHexAddr = 0; +} + +/*)Function ihxExtendedLinearAddress(i) + * + * Addr_T i 16 bit extended linear address. + * + * The function ihxExtendedLinearAddress() writes an extended + * linear address record (type 04) to the output file. + * + * local variables: + * Addr_T chksum byte checksum + * + * global variables: + * FILE * ofp output file handle + * + * functions called: + * int fprintf() c_library + * + * side effects: + * The data is output to the file defined by ofp. + * hexPageOverrun and lastHexAddr is cleared + */ +VOID +ihxExtendedLinearAddress(Addr_T a) +{ + Addr_T chksum; + + /* The checksum is the complement of the bytes in the + * record: the 2 is record length, 4 is the extended linear + * address record type, plus the two address bytes. + */ + chksum = 2 + 4 + (a & 0xff) + ((a >> 8) & 0xff); + + fprintf(ofp, ":02000004%04X%02X\n", a & 0xffff, (0-chksum) & 0xff); + hexPageOverrun = 0; + lastHexAddr = 0; +} diff --git a/as/link/mcs51/lkmain.c b/as/link/mcs51/lkmain.c new file mode 100644 index 0000000..cb0d05e --- /dev/null +++ b/as/link/mcs51/lkmain.c @@ -0,0 +1,1455 @@ +/* lkmain.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 31-Oct-97 JLH: + * - add jflag and jfp to control NoICE output file generation + * 3-Nov-97 JLH: + * - use a_type == 0 as "virgin area" flag: set == 1 if -b + */ + +#include +#include +#include +#include "aslink.h" + +#ifdef WIN32T +#include + +void Timer(int action, char * message) +{ + static double start, end, total=0.0; + static const double secs_per_tick = 1.0 / CLOCKS_PER_SEC; + + if(action==0) start=clock()*secs_per_tick; + else if(action==1) + { + end=clock() * secs_per_tick; + printf("%s \t%f seconds.\n", message, (end-start)); + total+=end-start; + } + else + { + printf("Total time: \t%f seconds.\n", total); + total=0.0; + } +} +#endif + +/*)Module lkmain.c + * + * The module lkmain.c contains the functions which + * (1) input the linker options, parameters, and specifications + * (2) perform a two pass link + * (3) produce the appropriate linked data output and/or + * link map file and/or relocated listing files. + * + * lkmain.c contains the following functions: + * FILE * afile(fn,ft,wf) + * VOID bassav() + * VOID gblsav() + * VOID link_main() + * VOID lkexit() + * VOID main(argc,argv) + * VOID map() + * int parse() + * VOID setbas() + * VOID setgbl() + * VOID usage() + * + * lkmain.c contains the following local variables: + * char * usetext[] array of pointers to the + * command option tect lines + * + */ + +/*JCF: Creates some of the default areas so they are allocated in the right order.*/ +void Areas51 (void) +{ + char * rel[]={ + "XH", + "H 7 areas 0 global symbols", + "A _CODE size 0 flags 0", /*Each .rel has one, so...*/ + "A REG_BANK_0 size 0 flags 4", /*Register banks are overlayable*/ + "A REG_BANK_1 size 0 flags 4", + "A REG_BANK_2 size 0 flags 4", + "A REG_BANK_3 size 0 flags 4", + "A BSEG size 0 flags 80", /*BSEG must be just before BITS*/ + "A BSEG_BYTES size 0 flags 0", /*Size will be obtained from BSEG in lnkarea()*/ + "" + }; + + char * rel2[]={ + "XH", + "H C areas 0 global symbols", + "A _CODE size 0 flags 0", /*Each .rel has one, so...*/ + "A REG_BANK_0 size 0 flags 4", /*Register banks are overlayable*/ + "A REG_BANK_1 size 0 flags 4", + "A REG_BANK_2 size 0 flags 4", + "A REG_BANK_3 size 0 flags 4", + "A BSEG size 0 flags 80", /*BSEG must be just before BITS*/ + "A BSEG_BYTES size 0 flags 0", /*Size will be obtained from BSEG in lnkarea()*/ + "A BIT_BANK size 0 flags 4", /*Bit register bank is overlayable*/ + "A DSEG size 0 flags 0", + "A OSEG size 0 flags 4", + "A ISEG size 0 flags 0", + "A SSEG size 0 flags 4", + "" + }; + int j; + struct sym * sp; + + if(packflag) + { + for (j=0; rel2[j][0]!=0; j++) + { + ip=rel2[j]; + link_main(); + } + } + else + { + for (j=0; rel[j][0]!=0; j++) + { + ip=rel[j]; + link_main(); + } + } + + /*Set the start address of the default areas:*/ + for(ap=areap; ap; ap=ap->a_ap) + { + /**/ if (!strcmp(ap->a_id, "REG_BANK_0")) { ap->a_addr=0x00; ap->a_type=1; } + else if (!strcmp(ap->a_id, "REG_BANK_1")) { ap->a_addr=0x08; ap->a_type=1; } + else if (!strcmp(ap->a_id, "REG_BANK_2")) { ap->a_addr=0x10; ap->a_type=1; } + else if (!strcmp(ap->a_id, "REG_BANK_3")) { ap->a_addr=0x18; ap->a_type=1; } + else if (!strcmp(ap->a_id, "BSEG_BYTES")) { ap->a_addr=0x20; ap->a_type=1; } + else if (!strcmp(ap->a_id, "SSEG")) + { + if(stacksize) ap->a_axp->a_size=stacksize; + } + } + + sp = lkpsym("l_IRAM", 1); + sp->s_addr = ((iram_size>0) && (iram_size<=0x100)) ? iram_size : 0x0100; + sp->s_axp = NULL; + sp->s_type |= S_DEF; +} + +/*)Function VOID main(argc,argv) + * + * int argc number of command line arguments + 1 + * char * argv[] array of pointers to the command line + * arguments + * + * The function main() evaluates the command line arguments to + * determine if the linker parameters are to input through 'stdin' + * or read from a command file. The functions lk_getline() and parse() + * are to input and evaluate the linker parameters. The linking process + * proceeds by making the first pass through each .rel file in the order + * presented to the linker. At the end of the first pass the setbase(), + * lnkarea(), setgbl(), and symdef() functions are called to evaluate + * the base address terms, link all areas, define global variables, + * and look for undefined symbols. Following these routines a linker + * map file may be produced and the linker output files may be opened. + * The second pass through the .rel files will output the linked data + * in one of the four supported formats. + * + * local variables: + * char * p pointer to an argument string + * int c character from argument string + * int i loop counter + * + * global variables: + * text line in ib[] + * lfile *cfp The pointer *cfp points to the + * current lfile structure + * char ctype[] array of character types, one per + * ASCII character + * lfile *filep The pointer *filep points to the + * beginning of a linked list of + * lfile structures. + * head *hp Pointer to the current + * head structure + * char ib[NINPUT] .rel file text line + * char *ip pointer into the .rel file + * lfile *linkp pointer to first lfile structure + * containing an input .rel file + * specification + * int lkerr error flag + * int mflag Map output flag + * int oflag Output file type flag + * FILE *ofp Output file handle + * for word formats + * FILE *ofph Output file handle + * for high byte format + * FILE *ofpl Output file handle + * for low byte format + * int pass linker pass number + * int pflag print linker command file flag + * int radix current number conversion radix + * FILE *sfp The file handle sfp points to the + * currently open file + * lfile *startp asmlnk startup file structure + * FILE * stdin c_library + * FILE * stdout c_library + * + * functions called: + * FILE * afile() lkmain.c + * int fclose() c_library + * int fprintf() c_library + * int lk_getline() lklex.c + * VOID library() lklibr.c + * VOID link_main() lkmain.c + * VOID lkexit() lkmain.c + * VOID lnkarea() lkarea.c + * VOID map() lkmain.c + * VOID new() lksym.c + * int parse() lkmain.c + * VOID reloc() lkreloc.c + * VOID search() lklibr.c + * VOID setbas() lkmain.c + * VOID setgbl() lkmain.c + * VOID symdef() lksym.c + * VOID usage() lkmain.c + * + * side effects: + * Completion of main() completes the linking process + * and may produce a map file (.map) and/or a linked + * data files (.ihx or .s19) and/or one or more + * relocated listing files (.rst). + */ + +int +main(int argc, char *argv[]) +{ + register char *p; + register int c, i; + +#ifdef WIN32T + Timer(0, ""); +#endif + + startp = (struct lfile *) new (sizeof (struct lfile)); + + pflag = 1; + for (i=1; if_type = F_STD; + break; + + case 'f': + case 'F': + startp->f_type = F_LNK; + break; + + case 'n': + case 'N': + pflag = 0; + break; + + case 'p': + case 'P': + pflag = 1; + break; + + default: + usage(); + } + } + } else { + if (startp->f_type == F_LNK) { + startp->f_idp = p; + } + } + } + if (startp->f_type == 0) + usage(); + if (startp->f_type == F_LNK && startp->f_idp == NULL) + usage(); + + cfp = NULL; + sfp = NULL; + filep = startp; + while (1) { + ip = ib; + if (lk_getline() == 0) + break; + if (pflag && sfp != stdin) + fprintf(stdout, "%s\n", ip); + if (*ip == '\0' || parse()) + break; + } + + if (sfp) { + fclose(sfp); + sfp = NULL; + } + + if (linkp == NULL) + usage(); + + syminit(); + + if (dflag){ + //dfp = afile("temp", "cdb", 1); + SaveLinkedFilePath(linkp->f_idp); //Must be the first one... + dfp = afile(linkp->f_idp,"cdb",1); //JCF: Nov 30, 2002 + if (dfp == NULL) + lkexit(1); + } + + for (pass=0; pass<2; ++pass) { + cfp = NULL; + sfp = NULL; + filep = linkp; + hp = NULL; + radix = 10; + + Areas51(); /*JCF: Create the default 8051 areas in the right order*/ + + while (lk_getline()) { + ip = ib; + + /* pass any "magic comments" to NoICE output */ + if ((ip[0] == ';') && (ip[1] == '!') && jfp) { + fprintf( jfp, "%s\n", &ip[2] ); + } + link_main(); + } + if (pass == 0) { + /* + * Search libraries for global symbols + */ + search(); + /* + * Set area base addresses. + */ + setbas(); + /* + * Link all area addresses. + */ + if(!packflag) + lnkarea(); + else + lnkarea2(); + /* + * Process global definitions. + */ + setgbl(); + /* + * Check for undefined globals. + */ + symdef(stderr); + + /* Open NoICE output file if requested */ + if (jflag) { + jfp = afile(linkp->f_idp, "NOI", 1); + if (jfp == NULL) { + lkexit(1); + } + } + + /* + * Output Link Map if requested, + * or if NoICE output requested (since NoICE + * file is generated in part by map() processing) + */ + if (mflag || jflag) + map(); + + if (sflag) /*JCF: memory usage summary output*/ + { + if(!packflag) + { + if(summary(areap)) lkexit(1); + } + else + { + if(summary2(areap)) lkexit(1); + } + } + + if ((iram_size) && (!packflag)) + iramcheck(); + + /* + * Open output file + */ + if (oflag == 1) { + ofp = afile(linkp->f_idp, "ihx", 1); + if (ofp == NULL) { + lkexit(1); + } + /* include NoICE command to load hex file */ + if (jfp) fprintf( jfp, "LOAD %s.IHX\n", linkp->f_idp ); + + } else + if (oflag == 2) { + ofp = afile(linkp->f_idp, "S19", 1); + if (ofp == NULL) { + lkexit(1); + } + /* include NoICE command to load hex file */ + if (jfp) fprintf( jfp, "LOAD %s.S19\n", linkp->f_idp ); + } + } else { + /* + * Link in library files + */ + library(); + reloc('E'); + } + } + //JCF: + CreateAOMF51(); + +#ifdef WIN32T + Timer(1, "Linker execution time"); +#endif + + lkexit(lkerr); + + /* Never get here. */ + return 0; +} + +/*)Function VOID lkexit(i) + * + * int i exit code + * + * The function lkexit() explicitly closes all open + * files and then terminates the program. + * + * local variables: + * none + * + * global variables: + * FILE * mfp file handle for .map + * FILE * ofp file handle for .ihx/.s19 + * FILE * rfp file hanlde for .rst + * FILE * sfp file handle for .rel + * FILE * tfp file handle for .lst + * + * functions called: + * int fclose() c_library + * VOID exit() c_library + * + * side effects: + * All files closed. Program terminates. + */ + +VOID +lkexit(int i) +{ + if (mfp != NULL) fclose(mfp); + if (jfp != NULL) fclose(jfp); + if (ofp != NULL) fclose(ofp); + if (rfp != NULL) fclose(rfp); + if (sfp != NULL) fclose(sfp); + if (tfp != NULL) fclose(tfp); + if (dfp != NULL) fclose(dfp); + exit(i); +} + +/*)Function link_main() + * + * The function link_main() evaluates the directives for each line of + * text read from the .rel file(s). The valid directives processed + * are: + * X, D, Q, H, M, A, S, T, R, and P. + * + * local variables: + * int c first non blank character of a line + * + * global variables: + * head *headp The pointer to the first + * head structure of a linked list + * head *hp Pointer to the current + * head structure + * int pass linker pass number + * int radix current number conversion radix + * + * functions called: + * char endline() lklex.c + * VOID module() lkhead.c + * VOID newarea() lkarea.c + * VOID newhead() lkhead.c + * sym * newsym() lksym.c + * VOID reloc() lkreloc.c + * + * side effects: + * Head, area, and symbol structures are created and + * the radix is set as the .rel file(s) are read. + */ + +VOID +link_main() +{ + register char c; + + if ((c=endline()) == 0) { return; } + switch (c) { + + case 'O': /*For some important sdcc options*/ + if (pass == 0) + { + if(strlen(sdccopt)==0) + { + strcpy(sdccopt, &ip[1]); + strcpy(sdccopt_module, curr_module); + } + else + { + if(strcmp(sdccopt, &ip[1])!=0) + { + fprintf(stderr, + "?ASlink-Warning-Conflicting sdcc options:\n" + " \"%s\" in module \"%s\" and\n" + " \"%s\" in module \"%s\".\n", + sdccopt, sdccopt_module, &ip[1], curr_module); + lkerr++; + } + } + } + break; + + case 'X': + radix = 16; + break; + + case 'D': + radix = 10; + break; + + case 'Q': + radix = 8; + break; + + case 'H': + if (pass == 0) { + newhead(); + } else { + if (hp == 0) { + hp = headp; + } else { + hp = hp->h_hp; + } + } + sdp.s_area = NULL; + sdp.s_areax = NULL; + sdp.s_addr = 0; + break; + + case 'M': + if (pass == 0) + { + strcpy(curr_module, &ip[1]); + module(); + } + break; + + case 'A': + if (pass == 0) + newarea(); + if (sdp.s_area == NULL) { + sdp.s_area = areap; + sdp.s_areax = areap->a_axp; + sdp.s_addr = 0; + } + break; + + case 'S': + if (pass == 0) + newsym(); + break; + + case 'T': + case 'R': + case 'P': + if (pass == 0) + break; + reloc(c); + break; + + default: + break; + } + if (c == 'X' || c == 'D' || c == 'Q') { + if ((c = get()) == 'H') { + hilo = 1; + } else + if (c == 'L') { + hilo = 0; + } + } +} + +/*)Function VOID map() + * + * The function map() opens the output map file and calls the various + * routines to + * (1) output the variables in each area, + * (2) list the files processed with module names, + * (3) list the libraries file processed, + * (4) list base address definitions, + * (5) list global variable definitions, and + * (6) list any undefined variables. + * + * local variables: + * int i counter + * head * hdp pointer to head structure + * lbfile *lbfh pointer to library file structure + * + * global variables: + * area *ap Pointer to the current + * area structure + * area *areap The pointer to the first + * area structure of a linked list + * base *basep The pointer to the first + * base structure + * base *bsp Pointer to the current + * base structure + * lfile *filep The pointer *filep points to the + * beginning of a linked list of + * lfile structures. + * globl *globlp The pointer to the first + * globl structure + * globl *gsp Pointer to the current + * globl structure + * head *headp The pointer to the first + * head structure of a linked list + * lbfile *lbfhead The pointer to the first + * lbfile structure of a linked list + * lfile *linkp pointer to first lfile structure + * containing an input REL file + * specification + * int lop current line number on page + * FILE *mfp Map output file handle + * int page current page number + * + * functions called: + * FILE * afile() lkmain.c + * int fprintf() c_library + * VOID lkexit() lkmain.c + * VOID lstarea() lklist.c + * VOID newpag() lklist.c + * VOID symdef() lksym.c + * + * side effects: + * The map file is created. + */ + +VOID +map() +{ + register int i; + register struct head *hdp; + register struct lbfile *lbfh; + + /* + * Open Map File + */ + mfp = afile(linkp->f_idp, "map", 1); + if (mfp == NULL) { + lkexit(1); + } + + /* + * Output Map Area Lists + */ + page = 0; + lop = NLPP; + ap = areap; + while (ap) { + lstarea(ap); + ap = ap->a_ap; + } + /* + * List Linked Files + */ + newpag(mfp); + fprintf(mfp, "\nFiles Linked [ module(s) ]\n\n"); + hdp = headp; + filep = linkp; + while (filep) { + fprintf(mfp, "%-16s", filep->f_idp); + i = 0; + while ((hdp != NULL) && (hdp->h_lfile == filep)) { + if (i % 5) { + fprintf(mfp, ", %8.8s", hdp->m_id); + } else { + if (i) { + fprintf(mfp, ",\n%20s%8.8s", "", hdp->m_id); + } else { + fprintf(mfp, " [ %8.8s", hdp->m_id); + } + } + hdp = hdp->h_hp; + i++; + } + if (i) + fprintf(mfp, " ]"); + fprintf(mfp, "\n"); + filep = filep->f_flp; + } + /* + * List Linked Libraries + */ + if (lbfhead != NULL) { + fprintf(mfp, + "\nLibraries Linked [ object file ]\n\n"); + for (lbfh=lbfhead; lbfh; lbfh=lbfh->next) { + fprintf(mfp, "%-32s [ %16.16s ]\n", + lbfh->libspc, lbfh->relfil); + } + fprintf(mfp, "\n"); + } + /* + * List Base Address Definitions + */ + if (basep) { + newpag(mfp); + fprintf(mfp, "\nUser Base Address Definitions\n\n"); + bsp = basep; + while (bsp) { + fprintf(mfp, "%s\n", bsp->b_strp); + bsp = bsp->b_base; + } + } + /* + * List Global Definitions + */ + if (globlp) { + newpag(mfp); + fprintf(mfp, "\nUser Global Definitions\n\n"); + gsp = globlp; + while (gsp) { + fprintf(mfp, "%s\n", gsp->g_strp); + gsp = gsp->g_globl; + } + } + fprintf(mfp, "\n\f"); + symdef(mfp); +} + +/*)Function int parse() + * + * The function parse() evaluates all command line or file input + * linker directives and updates the appropriate variables. + * + * local variables: + * int c character value + * char fid[] file id string + * + * global variables: + * char ctype[] array of character types, one per + * ASCII character + * lfile *lfp pointer to current lfile structure + * being processed by parse() + * lfile *linkp pointer to first lfile structure + * containing an input REL file + * specification + * int mflag Map output flag + * int oflag Output file type flag + * int pflag print linker command file flag + * FILE * stderr c_library + * int uflag Relocated listing flag + * int xflag Map file radix type flag + * + * Functions called: + * VOID addlib() lklibr.c + * VOID addpath() lklibr.c + * VOID bassav() lkmain.c + * int fprintf() c_library + * VOID gblsav() lkmain.c + * VOID getfid() lklex.c + * char getnb() lklex.c + * VOID lkexit() lkmain.c + * char * strcpy() c_library + * int strlen() c_library + * + * side effects: + * Various linker flags are updated and the linked + * structure lfile is created. + */ + +int +parse() +{ + register int c; + char fid[NINPUT]; + + while ((c = getnb()) != 0) { + if ( c == ';') + return(0); + if ( c == '-') { + while (ctype[c=get()] & LETTER) { + switch(c) { + + case 'i': + case 'I': + oflag = 1; + break; + + case 's': + case 'S': + oflag = 2; + break; + + case 'm': + case 'M': + ++mflag; + break; + + case 'y': /*JCF: memory usage summary output*/ + ++sflag; + break; + + case 'Y': + unget(getnb()); + packflag=1; + break; + + case 'A': + unget(getnb()); + if (ip && *ip) + { + stacksize=expr(0); + if(stacksize>256) stacksize=256; + else if(stacksize<0) stacksize=0; + } + return(0); + + case 'j': + case 'J': + jflag = 1; + break; + + case 'u': + case 'U': + uflag = 1; + break; + case 'r': + case 'R': + rflag = 1; + break; + + case 'x': + case 'X': + xflag = 0; + break; + + case 'q': + case 'Q': + xflag = 1; + break; + + case 'd': + case 'D': + xflag = 2; + break; + + case 'e': + case 'E': + return(1); + + case 'n': + case 'N': + pflag = 0; + break; + + case 'p': + case 'P': + pflag = 1; + break; + + case 'b': + case 'B': + bassav(); + return(0); + + case 'g': + case 'G': + gblsav(); + return(0); + + case 'k': + case 'K': + addpath(); + return(0); + + case 'l': + case 'L': + addlib(); + return(0); + + case 'a': + iramsav(); + return(0); + + case 'v': + case 'V': + xramsav(); + return(0); + + case 'w': + case 'W': + codesav(); + return(0); + + case 'z': + case 'Z': + dflag = 1; + return(0); + default: + fprintf(stderr, "Invalid option\n"); + lkexit(1); + } + } + if ( c == ';') + return(0); + } else + if (ctype[c] & ILL) { + fprintf(stderr, "Invalid input"); + lkexit(1); + } else { + if (linkp == NULL) { + linkp = (struct lfile *) + new (sizeof (struct lfile)); + lfp = linkp; + } else { + lfp->f_flp = (struct lfile *) + new (sizeof (struct lfile)); + lfp = lfp->f_flp; + } + getfid(fid, c); + lfp->f_idp = (char *) new (strlen(fid)+1); + strcpy(lfp->f_idp, fid); + lfp->f_type = F_REL; + } + } + return(0); +} + +/*)Function VOID bassav() + * + * The function bassav() creates a linked structure containing + * the base address strings input to the linker. + * + * local variables: + * none + * + * global variables: + * base *basep The pointer to the first + * base structure + * base *bsp Pointer to the current + * base structure + * char *ip pointer into the REL file + * text line in ib[] + * + * functions called: + * char getnb() lklex.c + * VOID * new() lksym.c + * int strlen() c_library + * char * strcpy() c_library + * VOID unget() lklex.c + * + * side effects: + * The basep structure is created. + */ + +VOID +bassav() +{ + if (basep == NULL) { + basep = (struct base *) + new (sizeof (struct base)); + bsp = basep; + } else { + bsp->b_base = (struct base *) + new (sizeof (struct base)); + bsp = bsp->b_base; + } + unget(getnb()); + bsp->b_strp = (char *) new (strlen(ip)+1); + strcpy(bsp->b_strp, ip); +} + +/*)Function VOID setbas() + * + * The function setbas() scans the base address lines in the + * basep structure, evaluates the arguments, and sets beginning + * address of the specified areas. + * + * local variables: + * int v expression value + * char id[] base id string + * + * global variables: + * area *ap Pointer to the current + * area structure + * area *areap The pointer to the first + * area structure of a linked list + * base *basep The pointer to the first + * base structure + * base *bsp Pointer to the current + * base structure + * char *ip pointer into the REL file + * text line in ib[] + * int lkerr error flag + * + * functions called: + * Addr_T expr() lkeval.c + * int fprintf() c_library + * VOID getid() lklex.c + * char getnb() lklex.c + * int symeq() lksym.c + * + * side effects: + * The base address of an area is set. + */ + +VOID +setbas() +{ + register int v; + char id[NCPS]; + + bsp = basep; + while (bsp) { + ip = bsp->b_strp; + getid(id, -1); + if (getnb() == '=') { + v = expr(0); + for (ap = areap; ap != NULL; ap = ap->a_ap) { + if (symeq(id, ap->a_id)) + break; + } + if (ap == NULL) { + fprintf(stderr, + "ASlink-Warning-No definition of area %s\n", id); + lkerr++; + } else { + ap->a_addr = v; + ap->a_type = 1; /* JLH: value set */ + } + } else { + fprintf(stderr, "ASlink-Warning-No '=' in base expression"); + lkerr++; + } + bsp = bsp->b_base; + } +} + +/*)Function VOID gblsav() + * + * The function gblsav() creates a linked structure containing + * the global variable strings input to the linker. + * + * local variable: + * none + * + * global variables: + * globl *globlp The pointer to the first + * globl structure + * globl *gsp Pointer to the current + * globl structure + * char *ip pointer into the REL file + * text line in ib[] + * int lkerr error flag + * + * functions called: + * char getnb() lklex.c + * VOID * new() lksym.c + * int strlen() c_library + * char * strcpy() c_library + * VOID unget() lklex.c + * + * side effects: + * The globlp structure is created. + */ + +VOID +gblsav() +{ + if (globlp == NULL) { + globlp = (struct globl *) + new (sizeof (struct globl)); + gsp = globlp; + } else { + gsp->g_globl = (struct globl *) + new (sizeof (struct globl)); + gsp = gsp->g_globl; + } + unget(getnb()); + gsp->g_strp = (char *) new (strlen(ip)+1); + strcpy(gsp->g_strp, ip); +} + +/*)Function VOID setgbl() + * + * The function setgbl() scans the global variable lines in the + * globlp structure, evaluates the arguments, and sets a variable + * to this value. + * + * local variables: + * int v expression value + * char id[] base id string + * sym * sp pointer to a symbol structure + * + * global variables: + * char *ip pointer into the REL file + * text line in ib[] + * globl *globlp The pointer to the first + * globl structure + * globl *gsp Pointer to the current + * globl structure + * FILE * stderr c_library + * int lkerr error flag + * + * functions called: + * Addr_T expr() lkeval.c + * int fprintf() c_library + * VOID getid() lklex.c + * char getnb() lklex.c + * sym * lkpsym() lksym.c + * + * side effects: + * The value of a variable is set. + */ + +VOID +setgbl() +{ + register int v; + register struct sym *sp; + char id[NCPS]; + + gsp = globlp; + while (gsp) { + ip = gsp->g_strp; + getid(id, -1); + if (getnb() == '=') { + v = expr(0); + sp = lkpsym(id, 0); + if (sp == NULL) { + fprintf(stderr, "No definition of symbol %s\n", id); + lkerr++; + } else { + if (sp->s_flag & S_DEF) { + fprintf(stderr, "Redefinition of symbol %s\n", id); + lkerr++; + sp->s_axp = NULL; + } + sp->s_addr = v; + sp->s_type |= S_DEF; + } + } else { + fprintf(stderr, "No '=' in global expression"); + lkerr++; + } + gsp = gsp->g_globl; + } +} + +/*)Function FILE * afile(fn, ft, wf) + * + * char * fn file specification string + * char * ft file type string + * int wf read(0)/write(1) flag + * + * The function afile() opens a file for reading or writing. + * (1) If the file type specification string ft + * is not NULL then a file specification is + * constructed with the file path\name in fn + * and the extension in ft. + * (2) If the file type specification string ft + * is NULL then the file specification is + * constructed from fn. If fn does not have + * a file type then the default .rel file + * type is appended to the file specification. + * + * afile() returns a file handle for the opened file or aborts + * the assembler on an open error. + * + * local variables: + * char fb[] constructed file specification string + * FILE * fp filehandle for opened file + * + * global variables: + * int lkerr error flag + * + * functions called: + * FILE * fopen() c_library + * int fprintf() c_library + * + * side effects: + * File is opened for read or write. + */ + +FILE * +afile(char *fn, char *ft, int wf) +{ + FILE *fp; + char fb[PATH_MAX]; + char *omode; + int i; + + switch (wf) { + case 0: omode = "r"; break; + case 1: omode = "w"; break; + case 2: omode = "a"; break; + case 3: omode = "rb"; break; + case 4: omode = "wb"; break; + case 5: omode = "ab"; break; + default: omode = "r"; break; + } + + /*Look backward the name path and get rid of the extension, if any*/ + i=strlen(fn); + for(; (fn[i]!=FSEPX)&&(fn[i]!=LKDIRSEP)&&(fn[i]!='/')&&(i>0); i--); + if( (fn[i]==FSEPX) && strcmp(ft, "lnk") ) + { + strncpy(fb, fn, i); + fb[i]=0; + } + else + { + strcpy(fb, fn); + } + + /*Add the extension*/ + if (fb[i] != FSEPX) + { + fb[i] = FSEPX; + fb[i+1] = 0; + strcat(fb, strlen(ft)?ft:LKOBJEXT); + } + + fp = fopen(fb, omode); + if (fp==NULL) + { + if (strcmp(ft,"adb"))/*Do not complain for optional adb files*/ + { + fprintf(stderr, "%s: cannot %s.\n", fb, (wf%3)==1?"create":"open"); + lkerr++; + } + } + return (fp); +} + +/*)Function VOID iramsav() + * + * The function iramsav() stores the size of the chip's internal RAM. + * This is used after linking to check that variable assignment to this + * dataspace didn't overflow into adjoining segments. Variables in the + * DSEG, OSEG, and ISEG are assigned to this dataspace. + * + * local variables: + * none + * + * global variables: + * char *ip pointer into the REL file + * text line in ib[] + * unsigned int size of chip's internal + * iram_size RAM segment + * + * functions called: + * char getnb() lklex.c + * VOID unget() lklex.c + * Addr_T expr() lkeval.c + * + * side effects: + * The iram_size may be modified. + */ + +VOID +iramsav() +{ + unget(getnb()); + if (ip && *ip) + iram_size = expr(0); /* evaluate size expression */ + else + iram_size = 128; /* Default is 128 (0x80) bytes */ + if ((iram_size<=0) || (iram_size>256)) + iram_size = 128; /* Default is 128 (0x80) bytes */ +} + +/*Similar to iramsav but for xram memory*/ +VOID +xramsav() +{ + unget(getnb()); + if (ip && *ip) + xram_size = expr(0); /* evaluate size expression */ + else + xram_size = rflag?0x1000000:0x10000; +} + +/*Similar to iramsav but for code memory*/ +VOID +codesav() +{ + unget(getnb()); + if (ip && *ip) + code_size = expr(0); /* evaluate size expression */ + else + code_size = rflag?0x1000000:0x10000; +} + + +/*)Function VOID iramcheck() + * + * The function iramcheck() is used at the end of linking to check that + * the internal RAM area wasn't overflowed by too many variable + * assignments. Variables in the DSEG, ISEG, and OSEG are assigned to + * the chip's internal RAM. + * + * local variables: + * none + * + * global variables: + * unsigned int size of chip's internal + * iram_size RAM segment + * struct area linked list of memory + * *areap areas + * + * functions called: + * + * side effects: + */ + +VOID +iramcheck() +{ + register unsigned int last_addr; + register struct area *ap; + + for (ap = areap; ap; ap=ap->a_ap) { + if ((ap->a_size != 0) && + (!strcmp(ap->a_id, "DSEG") || + !strcmp(ap->a_id, "OSEG") || + !strcmp(ap->a_id, "ISEG") + ) + ) + { + last_addr = ap->a_addr + ap->a_size - 1; + if (last_addr >= iram_size) + fprintf(stderr, + "\nWARNING! Segment %s extends past the end\n" + " of internal RAM. Check map file.\n", + ap->a_id); + } + } +} + +char *usetxt[] = { + "Startup:", + " -c Command line input", + " -f file[LNK] File input", + " -p Prompt and echo of file[LNK] to stdout (default)", + " -n No echo of file[LNK] to stdout", +/* "Usage: [-Options] file [file ...]", */ + "Libraries:", + " -k Library path specification, one per -k", + " -l Library file specification, one per -l", + "Relocation:", + " -b area base address = expression", + " -g global symbol = expression", + "Map format:", + " -m Map output generated as file[MAP]", + " -x Hexadecimal (default), -d Decimal, -q Octal", + "Output:", + " -i Intel Hex as file[IHX]", + " -s Motorola S19 as file[S19]", + " -j Produce NoICE debug as file[NOI]", + " -z Produce SDCdb debug as file[cdb]", +/* "List:", */ + " -u Update listing file(s) with link data as file(s)[.RST]", + "Miscellaneous:\n" + " -a [iram-size] Check for internal RAM overflow", + " -v [xram-size] Check for external RAM overflow", + " -w [code-size] Check for code overflow", + " -y Generate memory usage summary file[mem]", + " -Y Pack internal ram", + " -A [stack-size] Allocate space for stack", + "End:", + " -e or null line terminates input", + 0 +}; + +/*)Function VOID usage() + * + * The function usage() outputs to the stderr device the + * assembler name and version and a list of valid assembler options. + * + * local variables: + * char ** dp pointer to an array of + * text string pointers. + * + * global variables: + * FILE * stderr c_library + * + * functions called: + * int fprintf() c_library + * + * side effects: + * none + */ + +VOID +usage() +{ + register char **dp; + + fprintf(stderr, "\nASxxxx Linker %s\n\n", VERSION); + for (dp = usetxt; *dp; dp++) + fprintf(stderr, "%s\n", *dp); + lkexit(1); +} + +/*)Function VOID copyfile() + * + * FILE *dest destination file + * FILE *src source file + * + * function will copy source file to destination file + * + * + * functions called: + * int fgetc() c_library + * int fputc() c_library + * + * side effects: + * none + */ +VOID copyfile (FILE *dest, FILE *src) +{ + int ch; + + while ((ch = fgetc(src)) != EOF) { + fputc(ch,dest); + } +} diff --git a/as/link/mcs51/lkmem.c b/as/link/mcs51/lkmem.c new file mode 100644 index 0000000..24b2ff9 --- /dev/null +++ b/as/link/mcs51/lkmem.c @@ -0,0 +1,609 @@ +/* lkmem.c - Create a memory summary file with extension .mem + + Copyright (C) 2002 Jesus Calvino-Fraga, jesusc at ieee dot org + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include +#include "aslink.h" + +int summary(struct area * areap) +{ + #define EQ(A,B) !as_strcmpi((A),(B)) + #define MIN_STACK 16 + #define REPORT_ERROR(A, H) \ + {\ + fprintf(of, "%s%s", (H)?"*** ERROR: ":"", (A)); \ + fprintf(stderr, "%s%s", (H)?"\n?ASlink-Error-":"",(A)); \ + toreturn=1; \ + } + + #define REPORT_WARNING(A, H) \ + { \ + fprintf(of, "%s%s", (H)?"*** WARNING: ":"", (A)); \ + fprintf(stderr, "%s%s",(H)?"\n?ASlink-Warning-":"", (A)); \ + } + + char buff[128]; + int j, toreturn=0; + unsigned int Total_Last=0, k; + + struct area * xp; + FILE * of; + + /*Artifacts used for printing*/ + char start[15], end[15], size[15], max[15]; + char format[]=" %-16.16s %-8.8s %-8.8s %-8.8s %-8.8s\n"; + char line[]="---------------------"; + + typedef struct + { + unsigned long Start; + unsigned long Size; + unsigned long Max; + char Name[NCPS]; + unsigned long flag; + } _Mem; + + unsigned int dram[0x100]; + _Mem Ram[]={ + {0, 8, 8, "REG_BANK_0", 0x0001}, + {0x8, 8, 8, "REG_BANK_1", 0x0002}, + {0x10, 8, 8, "REG_BANK_2", 0x0004}, + {0x18, 8, 8, "REG_BANK_3", 0x0008}, + {0x20, 0, 16, "BSEG_BYTES", 0x0010}, + {0, 0, 128, "UNUSED", 0x0000}, + {0x7f, 0, 128, "DATA", 0x0020}, + {0, 0, 128, "TOTAL:", 0x0000} + }; + + _Mem IRam= {0xff, 0, 128, "INDIRECT RAM", 0x0080}; + _Mem Stack={0xff, 0, 1, "STACK", 0x0000}; + _Mem XRam= {0xffff, 0, 65536, "EXTERNAL RAM", 0x0100}; + _Mem Rom= {0xffff, 0, 65536, "ROM/EPROM/FLASH", 0x0200}; + + if(stacksize==0) stacksize=MIN_STACK; + + if(rflag) /*For the DS390*/ + { + XRam.Max=0x1000000; /*24 bits*/ + XRam.Start=0xffffff; + Rom.Max=0x1000000; + Rom.Start=0xffffff; + } + + if((iram_size<=0)||(iram_size>0x100)) /*Default: 8052 like memory*/ + { + Ram[5].Max=0x80; + Ram[6].Max=0x80; + Ram[7].Max=0x80; + IRam.Max=0x80; + iram_size=0x100; + } + else if(iram_size<0x80) + { + Ram[5].Max=iram_size; + Ram[6].Max=iram_size; + Ram[7].Max=iram_size; + IRam.Max=0; + } + else + { + Ram[5].Max=0x80; + Ram[6].Max=0x80; + Ram[7].Max=0x80; + IRam.Max=iram_size-0x80; + } + + for(j=0; j<(int)iram_size; j++) dram[j]=0; + for(; j<0x100; j++) dram[j]=0x8000; /*Memory not available*/ + + /* Open Memory Summary File*/ + of = afile(linkp->f_idp, "mem", 1); + if (of == NULL) + { + lkexit(1); + } + + xp=areap; + while (xp) + { + /**/ if (EQ(xp->a_id, "REG_BANK_0")) + { + Ram[0].Size=xp->a_size; + } + else if (EQ(xp->a_id, "REG_BANK_1")) + { + Ram[1].Size=xp->a_size; + } + else if (EQ(xp->a_id, "REG_BANK_2")) + { + Ram[2].Size=xp->a_size; + } + else if (EQ(xp->a_id, "REG_BANK_3")) + { + Ram[3].Size=xp->a_size; + } + else if (EQ(xp->a_id, "BSEG_BYTES")) + { + Ram[4].Size+=xp->a_size; + } + else if (EQ(xp->a_id, "BIT_BANK")) + { + Ram[4].Size+=xp->a_size; + } + + else if(xp->a_flag & A_CODE) + { + if(xp->a_size>0) + { + Rom.Size+=xp->a_size; + if(xp->a_addra_addr; + } + } + + else if (EQ(xp->a_id, "SSEG")) + { + Stack.Size+=xp->a_size; + if(xp->a_addra_addr; + } + + else if(xp->a_flag & A_XDATA) + { + if(xp->a_size>0) + { + XRam.Size+=xp->a_size; + if(xp->a_addra_addr; + } + } + + else if (EQ(xp->a_id, "ISEG")) + { + IRam.Size+=xp->a_size; + if(xp->a_addra_addr; + } + + /*If is not a register bank, bit, stack, or idata, then it should be data*/ + else if((xp->a_flag & (A_CODE|A_BIT|A_XDATA))==0) + { + if(xp->a_size) + { + Ram[6].Size+=xp->a_size; + if(xp->a_addra_addr; + } + } + + xp=xp->a_ap; + } + + for(j=0; j<7; j++) + for(k=Ram[j].Start; (k<(Ram[j].Start+Ram[j].Size))&&(k<0x100); k++) + dram[k]|=Ram[j].flag; /*Mark as used*/ + + for(k=IRam.Start; (k<(IRam.Start+IRam.Size))&&(k<0x100); k++) + dram[k]|=IRam.flag; /*Mark as used*/ + + /*Compute the amount of unused memory in direct data Ram. This is the + gap between the last register bank or bit segment and the data segment.*/ + for(k=Ram[6].Start-1; (dram[k]==0) && (k>0); k--); + Ram[5].Start=k+1; + Ram[5].Size=Ram[6].Start-Ram[5].Start; /*It may be zero (which is good!)*/ + + /*Compute the data Ram totals*/ + for(j=0; j<7; j++) + { + if(Ram[7].Start>Ram[j].Start) Ram[7].Start=Ram[j].Start; + Ram[7].Size+=Ram[j].Size; + } + Total_Last=Ram[6].Size+Ram[6].Start-1; + + /*Report the Ram totals*/ + fprintf(of, "Direct Internal RAM:\n"); + fprintf(of, format, "Name", "Start", "End", "Size", "Max"); + + for(j=0; j<8; j++) + { + if((j==0) || (j==7)) fprintf(of, format, line, line, line, line, line); + if((j!=5) || (Ram[j].Size>0)) + { + sprintf(start, "0x%02lx", Ram[j].Start); + if(Ram[j].Size==0) + end[0]=0;/*Empty string*/ + else + sprintf(end, "0x%02lx", j==7?Total_Last:Ram[j].Size+Ram[j].Start-1); + sprintf(size, "%5lu", Ram[j].Size); + sprintf(max, "%5lu", Ram[j].Max); + fprintf(of, format, Ram[j].Name, start, end, size, max); + } + } + + for(k=Ram[6].Start; (k<(Ram[6].Start+Ram[6].Size))&&(k<0x100); k++) + { + if(dram[k]!=Ram[6].flag) + { + sprintf(buff, "Internal memory overlap starting at 0x%02x.\n", k); + REPORT_ERROR(buff, 1); + break; + } + } + + if(Ram[4].Size>Ram[4].Max) + { + k=Ram[4].Size-Ram[4].Max; + sprintf(buff, "Insufficient bit addressable memory. " + "%d byte%s short.\n", k, (k==1)?"":"s"); + REPORT_ERROR(buff, 1); + } + + if(Ram[5].Size!=0) + { + sprintf(buff, "%ld bytes in data memory wasted. " + "SDCC link could use: --data-loc 0x%02lx\n", + Ram[5].Size, Ram[6].Start-Ram[5].Size); + REPORT_WARNING(buff, 1); + } + + if((Ram[6].Start+Ram[6].Size)>Ram[6].Max) + { + k=(Ram[6].Start+Ram[6].Size)-Ram[6].Max; + sprintf(buff, "Insufficient space in data memory. " + "%d byte%s short.\n", k, (k==1)?"":"s"); + REPORT_ERROR(buff, 1); + } + + /*Report the position of the beginning of the stack*/ + fprintf(of, "\n%stack starts at: 0x%02lx (sp set to 0x%02lx)", + rflag ? "16 bit mode initial s" : "S", Stack.Start, Stack.Start-1); + + /*Check that the stack pointer is landing in a safe place:*/ + if( (dram[Stack.Start] & 0x8000) == 0x8000 ) + { + fprintf(of, ".\n"); + sprintf(buff, "Stack set to unavailable memory.\n"); + REPORT_ERROR(buff, 1); + } + else if(dram[Stack.Start]) + { + fprintf(of, ".\n"); + sprintf(buff, "Stack overlaps area "); + REPORT_ERROR(buff, 1); + for(j=0; j<7; j++) + { + if(dram[Stack.Start]&Ram[j].flag) + { + sprintf(buff, "'%s'\n", Ram[j].Name); + break; + } + } + if(dram[Stack.Start]&IRam.flag) + { + sprintf(buff, "'%s'\n", IRam.Name); + } + REPORT_ERROR(buff, 0); + } + else + { + for(j=Stack.Start, k=0; (j<(int)iram_size)&&(dram[j]==0); j++, k++); + fprintf(of, " with %d bytes available\n", k); + if ((int)k(IRam.Max+0x80)) + { + sprintf(buff, "Insufficient INDIRECT RAM memory.\n"); + REPORT_ERROR(buff, 1); + } + if( ((XRam.Start+XRam.Size)>XRam.Max) || + (((int)XRam.Size>xram_size)&&(xram_size>=0)) ) + { + sprintf(buff, "Insufficient EXTERNAL RAM memory.\n"); + REPORT_ERROR(buff, 1); + } + if( ((Rom.Start+Rom.Size)>Rom.Max) || + (((int)Rom.Size>code_size)&&(code_size>=0)) ) + { + sprintf(buff, "Insufficient ROM/EPROM/FLASH memory.\n"); + REPORT_ERROR(buff, 1); + } + + fclose(of); + return toreturn; +} + +extern char idatamap[]; //0:not used, 1:used + + +int summary2(struct area * areap) +{ + #define EQ(A,B) !as_strcmpi((A),(B)) + + char buff[128]; + int toreturn = 0; + unsigned int j; + unsigned long int Stack_Start=0, Stack_Size; + + struct area * xp; + struct area * xstack_xp = NULL; + FILE * of; + + /*Artifacts used for printing*/ + char start[15], end[15], size[15], max[15]; + char format[]=" %-16.16s %-8.8s %-8.8s %-8.8s %-8.8s\n"; + char line[]="---------------------"; + + typedef struct + { + unsigned long Start; + unsigned long End; + unsigned long Size; + unsigned long Max; + char Name[NCPS]; + unsigned long flag; + } _Mem; + + _Mem Stack={0xff, 0, 0, 1, "STACK", 0x0000}; + _Mem Paged={0xffff, 0, 0, 256, "PAGED EXT. RAM", A_PAG}; + _Mem XRam= {0xffff, 0, 0, 65536, "EXTERNAL RAM", 0x0100}; + _Mem Rom= {0xffff, 0, 0, 65536, "ROM/EPROM/FLASH", 0x0200}; + + if(rflag) /*For the DS390*/ + { + XRam.Max=0x1000000; /*24 bits*/ + XRam.Start=0xffffff; + Rom.Max=0x1000000; + Rom.Start=0xffffff; + } + + /* Open Memory Summary File*/ + of = afile(linkp->f_idp, "mem", 1); + if (of == NULL) + { + lkexit(1); + } + + xp=areap; + while (xp) + { + if (xp->a_flag & A_CODE) + { + if(xp->a_size) + { + Rom.Size += xp->a_size; + if(xp->a_addr < Rom.Start) + Rom.Start = xp->a_addr; + if(xp->a_addr + xp->a_size > Rom.End) + Rom.End = xp->a_addr + xp->a_size; + } + } + + else if (EQ(xp->a_id, "SSEG")) + { + Stack.Size += xp->a_size; + if(xp->a_addr < Stack.Start) + Stack.Start = xp->a_addr; + if(xp->a_addr + xp->a_size > Stack.End) + Stack.End = xp->a_addr + xp->a_size; + } + + else if (EQ(xp->a_id, "PSEG")) + { + Paged.Size += xp->a_size; + if(xp->a_addr < Paged.Start) + Paged.Start = xp->a_addr; + if(xp->a_addr + xp->a_size > Paged.End) + Paged.End = xp->a_addr + xp->a_size; + } + + else if (EQ(xp->a_id, "XSTK")) + { + xstack_xp = xp; + Paged.Size += xp->a_size; + if(xp->a_addr < Paged.Start) + Paged.Start = xp->a_addr; + if(xp->a_addr + xp->a_size > Paged.End) + Paged.End = xp->a_addr + xp->a_size; + } + + else if (xp->a_flag & A_XDATA) + { + if(xp->a_size) + { + XRam.Size += xp->a_size; + if(xp->a_addr < XRam.Start) + XRam.Start = xp->a_addr; + if(xp->a_addr + xp->a_size > XRam.End) + XRam.End = xp->a_addr + xp->a_size; + } + } + + xp = xp->a_ap; + } + + /*Report the Ram totals*/ + fprintf(of, "Internal RAM layout:\n"); + fprintf(of, " 0 1 2 3 4 5 6 7 8 9 A B C D E F"); + for(j=0; j<256; j++) + { + if(j%16==0) fprintf(of, "\n0x%02x:|", j); + fprintf(of, "%c|", idatamap[j]); + } + fprintf(of, "\n0-3:Reg Banks, T:Bit regs, a-z:Data, B:Bits, Q:Overlay, I:iData, S:Stack, A:Absolute\n"); + + for(j=0; j<256; j++) + { + if(idatamap[j]=='S') + { + Stack_Start=j; + break; + } + } + + for(j=Stack_Start, Stack_Size=0; j<((iram_size)?iram_size:256); j++) + { + if((idatamap[j]=='S')||(idatamap[j]==' ')) Stack_Size++; + else break; + } + + xp=areap; + while (xp) + { + if(xp->a_unaloc>0) + { + fprintf(of, "\nERROR: Couldn't get %d byte%s allocated" + " in internal RAM for area %s.", + xp->a_unaloc, xp->a_unaloc>1?"s":"", xp->a_id); + toreturn=1; + } + xp=xp->a_ap; + } + + /*Report the position of the begining of the stack*/ + if(Stack_Start!=256) + fprintf(of, "\n%stack starts at: 0x%02lx (sp set to 0x%02lx) with %ld bytes available.", + rflag ? "16 bit mode initial s" : "S", Stack_Start, Stack_Start-1, Stack_Size); + else + fprintf(of, "\nI don't have a clue where the stack ended up! Sorry..."); + + /*Report about xstack*/ + if (xstack_xp) + { + Stack_Start = xstack_xp->a_addr; + Stack_Size = xstack_xp->a_size; + fprintf(of, "\nXstack starts at: 0x%04lx with %ld bytes available.", + Stack_Start, Stack_Size); + } + + fprintf(of, "\n\nOther memory:\n"); + fprintf(of, format, "Name", "Start", "End", "Size", "Max"); + fprintf(of, format, line, line, line, line, line); + + /*Report Paged XRam totals:*/ + if(Paged.Size==0) + { + start[0]=0;/*Empty string*/ + end[0]=0;/*Empty string*/ + } + else + { + sprintf(start, "0x%04lx", Paged.Start); + sprintf(end, "0x%04lx", Paged.End-1); + } + sprintf(size, "%5lu", Paged.Size); + sprintf(max, "%5lu", xram_size<0 ? Paged.Max : xram_size<256 ? xram_size : 256); + fprintf(of, format, Paged.Name, start, end, size, max); + + /*Report XRam totals:*/ + if(XRam.Size==0) + { + start[0]=0;/*Empty string*/ + end[0]=0;/*Empty string*/ + } + else + { + sprintf(start, "0x%04lx", XRam.Start); + sprintf(end, "0x%04lx", XRam.End-1); + } + sprintf(size, "%5lu", XRam.Size); + sprintf(max, "%5lu", xram_size<0?XRam.Max:xram_size); + fprintf(of, format, XRam.Name, start, end, size, max); + + /*Report Rom/Flash totals:*/ + if(Rom.Size==0) + { + start[0]=0;/*Empty string*/ + end[0]=0;/*Empty string*/ + } + else + { + sprintf(start, "0x%04lx", Rom.Start); + sprintf(end, "0x%04lx", Rom.End-1); + } + sprintf(size, "%5lu", Rom.Size); + sprintf(max, "%5lu", code_size<0?Rom.Max:code_size); + fprintf(of, format, Rom.Name, start, end, size, max); + + /*Report any excess:*/ + if( ((XRam.End) > XRam.Max) || + (((int)XRam.Size>xram_size)&&(xram_size>=0)) ) + { + sprintf(buff, "Insufficient EXTERNAL RAM memory.\n"); + REPORT_ERROR(buff, 1); + } + if( ((Rom.End) > Rom.Max) || + (((int)Rom.Size>code_size)&&(code_size>=0)) ) + { + sprintf(buff, "Insufficient ROM/EPROM/FLASH memory.\n"); + REPORT_ERROR(buff, 1); + } + + fclose(of); + return toreturn; +} diff --git a/as/link/mcs51/lkrloc.c b/as/link/mcs51/lkrloc.c new file mode 100644 index 0000000..92fd8e1 --- /dev/null +++ b/as/link/mcs51/lkrloc.c @@ -0,0 +1,1535 @@ +/* lkrloc.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 29-Oct-97 JLH: + * - errdmp: show s_id as string rather than array [NCPS] + * - relr: add support for 11 bit 8051 addressing + * 02-Apr-98 JLH: don't output empty hex records + */ + +#include +#include +#include "aslink.h" + +/*)Module lkrloc.c + * + * The module lkrloc.c contains the functions which + * perform the relocation calculations. + * + * lkrloc.c contains the following functions: + * Addr_T adb_b() + * Addr_T adb_lo() + * Addr_T adb_hi() + * Addr_T adw_w() + * Addr_T adw_lo() + * Addr_T adw_hi() + * VOID erpdmp() + * VOID errdmp() + * Addr_T evword() + * VOID prntval() + * VOID rele() + * VOID relerr() + * VOID relerp() + * VOID reloc() + * VOID relp() + * VOID relr() + * VOID relt() + * + * lkrloc.c the local variable errmsg[]. + * + */ + +/* Global which holds the upper 16 bits of the last 32 bit area adress + * output. Useful only for iHex mode. + */ +int lastExtendedAddress=-1; + +/* Static variable which holds the index of last processed area. + * Useful only for iHex mode. + */ +static int lastAreaIndex = -1; + +/*)Function VOID reloc(c) + * + * char c process code + * + * The function reloc() calls a particular relocation + * function determined by the process code. + * + * local variable: + * none + * + * global variables: + * int lkerr error flag + * + * called functions: + * int fprintf() c_library + * VOID rele() lkrloc.c + * VOID relp() lkrloc.c + * VOID relr() lkrloc.c + * VOId relt() lkrloc.c + * + * side effects: + * Refer to the called relocation functions. + * + */ + +VOID reloc(char c) +{ + switch(c) { + + case 'T': + relt(); + break; + + case 'R': + relr(); + break; + + case 'P': + relp(); + break; + + case 'E': + rele(); + break; + + default: + fprintf(stderr, "Undefined Relocation Operation\n"); + lkerr++; + break; + + } +} + + +/*)Function VOID relt() + * + * The function relt() evaluates a T line read by + * the linker. Each byte value read is saved in the + * rtval[] array, rtflg[] is set, and the number of + * evaluations is maintained in rtcnt. + * + * T Line + * + * T xx xx nn nn nn nn nn ... + * + * + * In: "T n0 n1 n2 n3 ... nn" + * + * Out: 0 1 2 .. rtcnt + * +----+----+----+----+----+ + * rtval | n0 | n1 | n2 | .. | nn | + * +----+----+----+----+----+ + * rtflag| 1 | 1 | 1 | 1 | 1 | + * +----+----+----+----+----+ + * + * The T line contains the assembled code output by the assem- + * bler with xx xx being the offset address from the current area + * base address and nn being the assembled instructions and data in + * byte format. + * + * local variable: + * none + * + * global variables: + * int rtcnt number of values evaluated + * int rtflg[] array of evaluation flags + * int rtval[] array of evaluation values + * + * called functions: + * int eval() lkeval.c + * int more() lklex.c + * + * side effects: + * Linker input T line evaluated. + * + */ + +VOID relt(VOID) +{ + rtcnt = 0; + while (more()) { + if (rtcnt < NTXT) { + rtval[rtcnt] = eval(); + rtflg[rtcnt] = 1; + rtcnt++; + } + } +} + +/*)Function VOID relr() + * + * The function relr() evaluates a R line read by + * the linker. The R line data is combined with the + * previous T line data to perform the relocation of + * code and data bytes. The S19 / IHX output and + * translation of the LST files to RST files may be + * performed. + * + * R Line + * + * R 0 0 nn nn n1 n2 xx xx ... + * + * The R line provides the relocation information to the linker. + * The nn nn value is the current area index, i.e. which area the + * current values were assembled. Relocation information is en- + * coded in groups of 4 bytes: + * + * 1. n1 is the relocation mode and object format + * 1. bit 0 word(0x00)/byte(0x01) + * 2. bit 1 relocatable area(0x00)/symbol(0x02) + * 3. bit 2 normal(0x00)/PC relative(0x04) relocation + * 4. bit 3 1-byte(0x00)/2-byte(0x08) object format for + * byte data + * 5. bit 4 signed(0x00)/unsigned(0x10) byte data + * 6. bit 5 normal(0x00)/page '0'(0x20) reference + * 7. bit 6 normal(0x00)/page 'nnn'(0x40) reference + * + * 2. n2 is a byte index into the corresponding (i.e. pre- + * ceeding) T line data (i.e. a pointer to the data to be + * updated by the relocation). The T line data may be + * 1-byte or 2-byte byte data format or 2-byte word + * format. + * + * 3. xx xx is the area/symbol index for the area/symbol be- + * ing referenced. the corresponding area/symbol is found + * in the header area/symbol lists. + * + * The groups of 4 bytes are repeated for each item requiring relo- + * cation in the preceeding T line. + * + * local variable: + * areax **a pointer to array of area pointers + * int aindex area index + * char *errmsg[] array of pointers to error strings + * int error error code + * int lkerr error flag + * int mode relocation mode + * adrr_t paga paging base area address + * Addr_T pags paging symbol address + * Addr_T pc relocated base address + * Addr_T r PCR relocation value + * Addr_T reli relocation initial value + * Addr_T relv relocation final value + * int rindex symbol / area index + * Addr_T rtbase base code address + * Addr_T rtofst rtval[] index offset + * int rtp index into T data + * sym **s pointer to array of symbol pointers + * + * global variables: + * head *hp pointer to the head structure + * rerr rerr linker error structure + * FILE *stderr standard error device + * + * called functions: + * Addr_T adb_b() lkrloc.c + * Addr_T adb_lo() lkrloc.c + * Addr_T adb_hi() lkrloc.c + * Addr_T adw_w() lkrloc.c + * Addr_T evword() lkrloc.c + * int eval() lkeval.c + * int fprintf() c_library + * VOID ihx() lkihx.c + * int lkulist lklist.c + * int more() lklex.c + * VOID relerr() lkrloc.c + * VOID s19() lks19.c + * int symval() lksym.c + * + * side effects: + * The R and T lines are combined to produce + * relocated code and data. Output S19 / IHX + * and relocated listing files may be produced. + * + */ + +VOID relr(VOID) +{ + register int mode; + register Addr_T reli, relv; + int aindex, rindex, rtp, error; + Addr_T r, rtbase, rtofst, paga, pags, pc; + struct areax **a; + struct sym **s; + + /* + * Get area and symbol lists + */ + a = hp->a_list; + s = hp->s_list; + + /* + * Verify Area Mode + */ + if (eval() != (R_WORD | R_AREA) || eval()) { + fprintf(stderr, "R input error\n"); + lkerr++; + } + + /* + * Get area pointer + */ + aindex = evword(); + if (aindex >= hp->h_narea) { + fprintf(stderr, "R area error\n"); + lkerr++; + return; + } + + /* + * Base values + */ + rtbase = adw_w(0, 0); + rtofst = 2; + + /* + * Relocate address + */ + pc = adw_w(a[aindex]->a_addr, 0); + + #if 0 + printf("area %d base address: 0x%x size: 0x%x rtbase: 0x%x\n", aindex, + a[aindex]->a_addr, a[aindex]->a_size, rtbase); + #endif + /* + * Do remaining relocations + */ + while (more()) { + error = 0; + mode = eval(); + + if ((mode & R_ESCAPE_MASK) == R_ESCAPE_MASK) + { + mode = ((mode & ~R_ESCAPE_MASK) << 8) | eval(); + /* printf("unescaping rmode\n"); */ + } + + rtp = eval(); + rindex = evword(); + + /* + * R_SYM or R_AREA references + */ + if (mode & R_SYM) { + if (rindex >= hp->h_nglob) { + fprintf(stderr, "R symbol error\n"); + lkerr++; + return; + } + reli = symval(s[rindex]); + } else if ((IS_R_J11(mode) || IS_R_J19(mode)) && (rindex == 0xFFFF)) { + /* absolute acall/ajmp address */ + reli = 0; + } else { + if (rindex >= hp->h_narea) { + fprintf(stderr, "R area error\n"); + lkerr++; + return; + } + reli = a[rindex]->a_addr; + } + + /* + * R_PCR addressing + */ + if (mode & R_PCR) { + if (mode & R_BYTE) { + reli -= (pc + (rtp-rtofst) + 1); + } else { + reli -= (pc + (rtp-rtofst) + 2); + } + } + + /* + * R_PAG0 or R_PAG addressing + */ + if (mode & (R_PAG0 | R_PAG)) { + paga = sdp.s_area->a_addr; + pags = sdp.s_addr; + reli -= paga + pags; + } + + /* + * R_BYTE or R_WORD operation + */ + if (mode & R_BYTE) { + if (mode & R_BYT3) + { + /* This is a three byte address, of which + * we will select one byte. + */ + if (mode & R_BIT) + { + relv = adb_24_bit(reli, rtp); + } + else if (mode & R_HIB) + { + /* printf("24 bit address selecting hi byte.\n"); */ + relv = adb_24_hi(reli, rtp); + } + else if (mode & R_MSB) + { + /* Note that in 24 bit mode, R_MSB + * is really the middle byte, not + * the most significant byte. + * + * This is ugly and I can only apologize + * for any confusion. + */ + /* printf("24 bit address selecting middle byte.\n"); */ + relv = adb_24_mid(reli, rtp); + } + else + { + /* printf("24 bit address selecting lo byte.\n"); */ + relv = adb_24_lo(reli, rtp); + } + } + else if (mode & R_BYT2) { + /* This is a two byte address, of + * which we will select one byte. + */ + if (mode & R_BIT) { + relv = adb_bit(reli, rtp); + } else if (mode & R_MSB) { + relv = adb_hi(reli, rtp); + } else { + relv = adb_lo(reli, rtp); + } + } else { + relv = adb_b(reli, rtp); + } + } else if (IS_R_J11(mode)) { + /* JLH: 11 bit jump destination for 8051. Forms + / two byte instruction with op-code bits + / in the MIDDLE! + / rtp points at 3 byte locus: first two + / will get the instructiion. third one + / has raw op-code. + */ + + /* Calculate absolute destination + / relv must be on same 2K page as pc + */ + relv = adw_w(reli, rtp); + + if ((relv & ~0x7ff) != ((pc + rtp - rtofst) & ~0x7ff)) { + error = 2; + } + + /* Merge MSB (byte 0) with op-code, ignoring + / top 5 bits of address. Then hide the op-code + */ + rtval[rtp] = ((rtval[rtp] & 0x07)<<5) | rtval[rtp+2]; + rtflg[rtp+2] = 0; + rtofst += 1; + } + else if (IS_R_J19(mode)) { + /* 19 bit jump destination for DS80C390. Forms + / three byte instruction with op-code bits + / in the MIDDLE! + / rtp points at 4 byte locus: first three + / will get the instructiion. fourth one + / has raw op-code. + */ + + /* Calculate absolute destination + / relv must be on same 512K page as pc + */ + relv = adw_24(reli, rtp); + + if ((relv & ~0x7ffff) != ((pc + rtp - rtofst) & ~0x7ffff)) { + error = 2; + } + + /* Merge MSB (byte 0) with op-code, ignoring + / top 5 bits of address. Then hide the op-code + */ + rtval[rtp] = ((rtval[rtp] & 0x07)<<5) | rtval[rtp+3]; + rtflg[rtp+3] = 0; + rtofst += 1; + } + else if (IS_C24(mode)) + { + /* 24 bit address */ + relv = adw_24(reli, rtp); + } + else + { + /* 16 bit address. */ + relv = adw_w(reli, rtp); + } + + /* + * R_BYTE with R_BYT2 offset adjust + */ + if (mode & R_BYTE) { + if (mode & R_BYT2) { + rtofst += 1; + } + } + + /* + * Unsigned Byte Checking + */ + if (mode & R_USGN && mode & R_BYTE && relv & ~0xFF) + error = 1; + + /* + * PCR Relocation Error Checking + */ + if (mode & R_PCR && mode & R_BYTE) { + r = relv & ~0x7F; + if (r != (Addr_T) ~0x7F && r != 0) + error = 2; + } + + /* + * Page Relocation Error Checking + */ + /* if (mode & R_PAG0 && (relv & ~0xFF || paga || pags)) + error = 3;*/ + if (mode & R_PAG && (relv & ~0xFF)) + error = 4; + if ((mode & R_BIT) && (relv & ~0x87FF)) + error = 5; + + /* + * Error Processing + */ + if (error) { + rerr.aindex = aindex; + rerr.mode = mode; + rerr.rtbase = rtbase + rtp - rtofst - 1; + rerr.rindex = rindex; + rerr.rval = relv - reli; + relerr(errmsg[error-1]); + } + } + if (uflag != 0) { + lkulist(1); + } + + /* JLH: output only if data (beyond two byte address) */ + if ((oflag == 1) && (rtcnt > 2)) { + int extendedAddress = (a[aindex]->a_addr >> 16) & 0xffff; + + /* Boy, is this a hack: for ABS sections, the + * base address is stored as zero, and the T records + * indicate the offset from zero. + * + * Since T records can only indicate a 16 bit offset, this + * obviously creates a problem for ABS segments located + * above 64K (this is only meaningful in flat24 mode). + * + * However, the size of an ABS area is stored as + * base address + section size (I suspect this is a bug, + * but it's a handy one right now). So the upper 8 bits of + * the 24 bit address are stored in the size record. + * Thus we add it in. + * + * This is another reason why we can't have areas greater + * than 64K yet, even in flat24 mode. + */ + // extendedAddress += ((a[aindex]->a_size) >> 16 & 0xffff); + // commented out by jr + + if (lastAreaIndex != aindex) { + lastAreaIndex = aindex; + ihxNewArea(); + } + + if (extendedAddress != lastExtendedAddress) + { + + if (lastExtendedAddress!=-1) { + printf("output extended linear address record 0x%x 0x%x\n", + extendedAddress, lastExtendedAddress); + } + + if (rflag) + { + ihxExtendedLinearAddress(extendedAddress); + } + else if (extendedAddress) + { + /* Not allowed to generate extended address records, + * but one is called for here... + */ + fprintf(stderr, + "warning: extended linear address encountered; " + "you probably want the -r flag.\n"); + } + lastExtendedAddress = extendedAddress; + } + ihx(1); + } else + if ((oflag == 2) && (rtcnt > 2)) { + s19(1); + } +} + +char *errmsg[] = { + "Unsigned Byte error", + "Byte PCR relocation error", + "Page0 relocation error", + "Page Mode relocation error", + "Bit-addressable relocation error" +}; + + +/*)Function VOID relp() + * + * The function relp() evaluates a P line read by + * the linker. The P line data is combined with the + * previous T line data to set the base page address + * and test the paging boundary and length. + * + * P Line + * + * P 0 0 nn nn n1 n2 xx xx + * + * The P line provides the paging information to the linker as + * specified by a .setdp directive. The format of the relocation + * information is identical to that of the R line. The correspond- + * ing T line has the following information: + * T xx xx aa aa bb bb + * + * Where aa aa is the area reference number which specifies the + * selected page area and bb bb is the base address of the page. + * bb bb will require relocation processing if the 'n1 n2 xx xx' is + * specified in the P line. The linker will verify that the base + * address is on a 256 byte boundary and that the page length of an + * area defined with the PAG type is not larger than 256 bytes. + * + * local variable: + * areax **a pointer to array of area pointers + * int aindex area index + * int mode relocation mode + * Addr_T relv relocation value + * int rindex symbol / area index + * int rtp index into T data + * sym **s pointer to array of symbol pointers + * + * global variables: + * head *hp pointer to the head structure + * int lkerr error flag + * sdp sdp base page structure + * FILE *stderr standard error device + * + * called functions: + * Addr_T adw_w() lkrloc.c + * Addr_T evword() lkrloc.c + * int eval() lkeval.c + * int fprintf() c_library + * int more() lklex.c + * int symval() lksym.c + * + * side effects: + * The P and T lines are combined to set + * the base page address and report any + * paging errors. + * + */ + +VOID relp(VOID) +{ + register int aindex, rindex; + int mode, rtp; + Addr_T relv; + struct areax **a; + struct sym **s; + + /* + * Get area and symbol lists + */ + a = hp->a_list; + s = hp->s_list; + + /* + * Verify Area Mode + */ + if (eval() != (R_WORD | R_AREA) || eval()) { + fprintf(stderr, "P input error\n"); + lkerr++; + } + + /* + * Get area pointer + */ + aindex = evword(); + if (aindex >= hp->h_narea) { + fprintf(stderr, "P area error\n"); + lkerr++; + return; + } + + /* + * Do remaining relocations + */ + while (more()) { + mode = eval(); + rtp = eval(); + rindex = evword(); + + /* + * R_SYM or R_AREA references + */ + if (mode & R_SYM) { + if (rindex >= hp->h_nglob) { + fprintf(stderr, "P symbol error\n"); + lkerr++; + return; + } + relv = symval(s[rindex]); + } else { + if (rindex >= hp->h_narea) { + fprintf(stderr, "P area error\n"); + lkerr++; + return; + } + relv = a[rindex]->a_addr; + } + adw_w(relv, rtp); + } + + /* + * Paged values + */ + aindex = adw_w(0,2); + if (aindex >= hp->h_narea) { + fprintf(stderr, "P area error\n"); + lkerr++; + return; + } + sdp.s_areax = a[aindex]; + sdp.s_area = sdp.s_areax->a_bap; + sdp.s_addr = adw_w(0,4); + if (sdp.s_area->a_addr & 0xFF || sdp.s_addr & 0xFF) + relerp("Page Definition Boundary Error"); +} + +/*)Function VOID rele() + * + * The function rele() closes all open output files + * at the end of the linking process. + * + * local variable: + * none + * + * global variables: + * int oflag output type flag + * int uflag relocation listing flag + * + * called functions: + * VOID ihx() lkihx.c + * VOID lkulist() lklist.c + * VOID s19() lks19.c + * + * side effects: + * All open output files are closed. + * + */ + +VOID rele(VOID) +{ + if (uflag != 0) { + lkulist(0); + } + if (oflag == 1) { + ihx(0); + } else + if (oflag == 2) { + s19(0); + } +} + +/*)Function Addr_T evword() + * + * The function evword() combines two byte values + * into a single word value. + * + * local variable: + * Addr_T v temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * int eval() lkeval.c + * + * side effects: + * Relocation text line is scanned to combine + * two byte values into a single word value. + * + */ + +Addr_T evword(VOID) +{ + register Addr_T v; + + if (hilo) { + v = (eval() << 8); + v += eval(); + } else { + v = eval(); + v += (eval() << 8); + } + return(v); +} + +/*)Function Addr_T adb_b(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_b() adds the value of v to + * the single byte value contained in rtval[i]. + * The new value of rtval[i] is returned. + * + * local variable: + * none + * + * global variables: + * none + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * + */ + +Addr_T adb_b(register Addr_T v, register int i) +{ + return(rtval[i] += v); +} + +/*)Function Addr_T adb_bit(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_bit() converts the single + * byte address value contained in rtval[i] to bit- + * addressable space and adds the value of v to it. + * The new value of rtval[i] is returned. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * none + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * + */ + +Addr_T adb_bit(register Addr_T v, register int i) +{ + register Addr_T j; + + j = adb_lo(v, i) & 0xFF; + if ((j >= 0x20) && (j <= 0x2F)) { + j = (j - 0x20) * 8; + } else if ((j < 0x80) || ((j & 0x07) != 0)) { + return(0x100);//error + } + + if (hilo) { + j = rtval[i+1] = j + (rtval[i] & 0x07); + } else { + j = rtval[i] = j + (rtval[i+1] & 0x07); + } + return(j); +} + +/*)Function Addr_T adb_lo(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_lo() adds the value of v to the + * double byte value contained in rtval[i] and rtval[i+1]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The MSB rtflg[] is cleared. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The rtflg[] value corresponding to the + * MSB of the word value is cleared to reflect + * the fact that the LSB is the selected byte. + * + */ + +Addr_T adb_lo(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_w(v, i); + /* + * Remove Hi byte + */ + if (hilo) { + rtflg[i] = 0; + } else { + rtflg[i+1] = 0; + } + return (j); +} + +/*)Function Addr_T adb_hi(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_hi() adds the value of v to the + * double byte value contained in rtval[i] and rtval[i+1]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The LSB rtflg[] is cleared. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The rtflg[] value corresponding to the + * LSB of the word value is cleared to reflect + * the fact that the MSB is the selected byte. + * + */ + +Addr_T adb_hi(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_w(v, i); + /* + * Remove Lo byte + */ + if (hilo) { + rtflg[i+1] = 0; + } else { + rtflg[i] = 0; + } + return (j); +} + +/*)Function Addr_T adb_24_bit(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_24_bit() converts the single + * byte address value contained in rtval[i] to bit- + * addressable space and adds the value of v to it. + * The new value of rtval[i] is returned. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * none + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * + */ + +Addr_T adb_24_bit(register Addr_T v, register int i) +{ + register Addr_T j; + + j = adb_24_lo(v, i) & 0xFF; + if ((j >= 0x20) && (j <= 0x2F)) { + j = (j - 0x20) * 8; + } else if ((j < 0x80) || ((j & 0x07) != 0)) { + return(0x100);//error + } + + if (hilo) { + j = rtval[i+2] = j + (rtval[i+1] & 0x07); + } else { + j = rtval[i] = j + (rtval[i+1] & 0x07); + } + return(j); +} + +/*)Function Addr_T adb_24_hi(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_24_hi() adds the value of v to the + * 24 bit value contained in rtval[i] - rtval[i+2]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The LSB & middle byte rtflg[] is cleared. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The rtflg[] value corresponding to the + * LSB & middle byte of the word value is cleared to + * reflect the fact that the MSB is the selected byte. + * + */ + +Addr_T adb_24_hi(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_24(v, i); + + /* Remove the lower two bytes. */ + if (hilo) + { + rtflg[i+2] = 0; + } + else + { + rtflg[i] = 0; + } + rtflg[i+1] = 0; + + return (j); +} + +/*)Function Addr_T adb_24_mid(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_24_mid() adds the value of v to the + * 24 bit value contained in rtval[i] - rtval[i+2]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The LSB & MSB byte rtflg[] is cleared. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The rtflg[] value corresponding to the + * LSB & MSB of the 24 bit value is cleared to reflect + * the fact that the middle byte is the selected byte. + * + */ + +Addr_T adb_24_mid(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_24(v, i); + + /* remove the MSB & LSB. */ + rtflg[i+2] = 0; + rtflg[i] = 0; + + return (j); +} + +/*)Function Addr_T adb_24_lo(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_24_lo() adds the value of v to the + * 24 bit value contained in rtval[i] - rtval[i+2]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The MSB & middle byte rtflg[] is cleared. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The rtflg[] value corresponding to the + * MSB & middle byte of the word value is cleared to + * reflect the fact that the LSB is the selected byte. + * + */ + +Addr_T adb_24_lo(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_24(v, i); + + /* Remove the upper two bytes. */ + if (hilo) + { + rtflg[i] = 0; + } + else + { + rtflg[i+2] = 0; + } + rtflg[i+1] = 0; + + return (j); +} + +/*)Function Addr_T adw_w(v, i) + * + * int v value to add to word + * int i rtval[] index + * + * The function adw_w() adds the value of v to the + * word value contained in rtval[i] and rtval[i+1]. + * The new value of rtval[i] / rtval[i+1] is returned. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The word value of rtval[] is changed. + * + */ + +Addr_T adw_w(register Addr_T v, register int i) +{ + register Addr_T j; + + if (hilo) { + j = v + (rtval[i] << 8) + (rtval[i+1] & 0xff); + rtval[i] = (j >> 8) & 0xff; + rtval[i+1] = j & 0xff; + } else { + j = v + (rtval[i] & 0xff) + (rtval[i+1] << 8); + rtval[i] = j & 0xff; + rtval[i+1] = (j >> 8) & 0xff; + } + return(j); +} + +/*)Function Addr_T adw_24(v, i) + * + * int v value to add to word + * int i rtval[] index + * + * The function adw_w() adds the value of v to the + * 24 bit value contained in rtval[i] - rtval[i+2]. + * The new value of rtval[i] - rtval[i+2] is returned. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The word value of rtval[] is changed. + * + */ +Addr_T adw_24(Addr_T v, int i) +{ + register Addr_T j; + + if (hilo) { + j = v + ((rtval[i] & 0xff) << 16) + + ((rtval[i+1] & 0xff) << 8) + + (rtval[i+2] & 0xff); + rtval[i] = (j >> 16) & 0xff; + rtval[i+1] = (j >> 8) & 0xff; + rtval[i+2] = j & 0xff; + } else { + j = v + (rtval[i] & 0xff) + + ((rtval[i+1] & 0xff) << 8) + + ((rtval[i+2] & 0xff) << 16); + rtval[i] = j & 0xff; + rtval[i+1] = (j >> 8) & 0xff; + rtval[i+2] = (j >> 16) & 0xff; + } + return(j); +} + +/*)Function Addr_T adw_lo(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adw_lo() adds the value of v to the + * double byte value contained in rtval[i] and rtval[i+1]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The MSB rtval[] is zeroed. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The MSB of the word value is cleared to reflect + * the fact that the LSB is the selected byte. + * + */ + +Addr_T adw_lo(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_w(v, i); + /* + * Clear Hi byte + */ + if (hilo) { + rtval[i] = 0; + } else { + rtval[i+1] = 0; + } + return (j); +} + +/*)Function Addr_T adw_hi(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adw_hi() adds the value of v to the + * double byte value contained in rtval[i] and rtval[i+1]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The MSB and LSB values are interchanged. + * The MSB rtval[] is zeroed. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The MSB and LSB values are interchanged and + * then the MSB cleared. + * + */ + +Addr_T adw_hi(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_w(v, i); + /* + * LSB = MSB, Clear MSB + */ + if (hilo) { + rtval[i+1] = rtval[i]; + rtval[i] = 0; + } else { + rtval[i] = rtval[i+1]; + rtval[i+1] = 0; + } + return (j); +} + +/*)Function VOID relerr(str) + * + * char *str error string + * + * The function relerr() outputs the error string to + * stderr and to the map file (if it is open). + * + * local variable: + * none + * + * global variables: + * FILE *mfp handle for the map file + * + * called functions: + * VOID errdmp() lkrloc.c + * + * side effects: + * Error message inserted into map file. + * + */ + +VOID relerr(char *str) +{ + errdmp(stderr, str); + if (mfp) + errdmp(mfp, str); +} + +/*)Function VOID errdmp(fptr, str) + * + * FILE *fptr output file handle + * char *str error string + * + * The function errdmp() outputs the error string str + * to the device specified by fptr. Additional information + * is output about the definition and referencing of + * the symbol / area error. + * + * local variable: + * int mode error mode + * int aindex area index + * int lkerr error flag + * int rindex error index + * sym **s pointer to array of symbol pointers + * areax **a pointer to array of area pointers + * areax *raxp error area extension pointer + * + * global variables: + * sdp sdp base page structure + * + * called functions: + * int fprintf() c_library + * VOID prntval() lkrloc.c + * + * side effects: + * Error reported. + * + */ + +VOID errdmp(FILE *fptr, char *str) +{ + int mode, aindex, rindex; + struct sym **s; + struct areax **a; + struct areax *raxp; + + a = hp->a_list; + s = hp->s_list; + + mode = rerr.mode; + aindex = rerr.aindex; + rindex = rerr.rindex; + + /* + * Print Error + */ + fprintf(fptr, "\n?ASlink-Warning-%s", str); + lkerr++; + + /* + * Print symbol if symbol based + */ + if (mode & R_SYM) { + fprintf(fptr, " for symbol %s\n", + &s[rindex]->s_id[0]); + } else { + fprintf(fptr, "\n"); + } + + /* + * Print Ref Info + */ + fprintf(fptr, + " file module area offset\n"); + fprintf(fptr, + " Refby %-8.8s %-8.8s %-8.8s ", + hp->h_lfile->f_idp, + &hp->m_id[0], + &a[aindex]->a_bap->a_id[0]); + prntval(fptr, rerr.rtbase); + + /* + * Print Def Info + */ + if (mode & R_SYM) { + raxp = s[rindex]->s_axp; + } else { + raxp = a[rindex]; + } + fprintf(fptr, + " Defin %-8.8s %-8.8s %-8.8s ", + raxp->a_bhp->h_lfile->f_idp, + &raxp->a_bhp->m_id[0], + &raxp->a_bap->a_id[0]); + if (mode & R_SYM) { + prntval(fptr, s[rindex]->s_addr); + } else { + prntval(fptr, rerr.rval); + } +} + +/*)Function VOID prntval(fptr, v) + * + * FILE *fptr output file handle + * Addr_T v value to output + * + * The function prntval() outputs the value v, in the + * currently selected radix, to the device specified + * by fptr. + * + * local variable: + * none + * + * global variables: + * int xflag current radix + * + * called functions: + * int fprintf() c_library + * + * side effects: + * none + * + */ + +VOID prntval(FILE *fptr, Addr_T v) +{ + if (xflag == 0) { + fprintf(fptr, "%04X\n", v); + } else + if (xflag == 1) { + fprintf(fptr, "%06o\n", v); + } else + if (xflag == 2) { + fprintf(fptr, "%05u\n", v); + } +} + +/*)Function VOID relerp(str) + * + * char *str error string + * + * The function relerp() outputs the paging error string to + * stderr and to the map file (if it is open). + * + * local variable: + * none + * + * global variables: + * FILE *mfp handle for the map file + * + * called functions: + * VOID erpdmp() lkrloc.c + * + * side effects: + * Error message inserted into map file. + * + */ + +VOID relerp(char *str) +{ + erpdmp(stderr, str); + if (mfp) + erpdmp(mfp, str); +} + +/*)Function VOID erpdmp(fptr, str) + * + * FILE *fptr output file handle + * char *str error string + * + * The function erpdmp() outputs the error string str + * to the device specified by fptr. + * + * local variable: + * head *thp pointer to head structure + * + * global variables: + * int lkerr error flag + * sdp sdp base page structure + * + * called functions: + * int fprintf() c_library + * VOID prntval() lkrloc.c + * + * side effects: + * Error reported. + * + */ + +VOID erpdmp(FILE *fptr, char *str) +{ + register struct head *thp; + + thp = sdp.s_areax->a_bhp; + + /* + * Print Error + */ + fprintf(fptr, "\n?ASlink-Warning-%s\n", str); + lkerr++; + + /* + * Print PgDef Info + */ + fprintf(fptr, + " file module pgarea pgoffset\n"); + fprintf(fptr, + " PgDef %-8.8s %-8.8s %-8.8s ", + thp->h_lfile->f_idp, + &thp->m_id[0], + &sdp.s_area->a_id[0]); + prntval(fptr, sdp.s_area->a_addr + sdp.s_addr); +} diff --git a/as/link/mcs51/lks19.c b/as/link/mcs51/lks19.c new file mode 100644 index 0000000..e4a297f --- /dev/null +++ b/as/link/mcs51/lks19.c @@ -0,0 +1,129 @@ +/* lks19.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include "aslink.h" + +/*)Module lks19.c + * + * The module lks19.c contains the function to + * output the relocated object code in the + * Motorola S19 format. + * + * lks19.c contains the following function: + * VOID s19(i) + * + * lks19.c contains no local variables. + */ + +/*)S19 Format + * Record Type Field - This field signifies the start of a + * record and identifies the the record + * type as follows: + * + * Ascii S1 - Data Record + * Ascii S9 - End of File Record + * + * Record Length Field - This field specifies the record length + * which includes the address, data, and + * checksum fields. The 8 bit record + * length value is converted to two ascii + * characters, high digit first. + * + * Load Address Field - This field consists of the four ascii + * characters which result from converting + * the the binary value of the address in + * which to begin loading this record. The + * order is as follows: + * + * High digit of high byte of address. + * Low digit of high byte of address. + * High digit of low byte of address. + * Low digit of low byte of address. + * + * In an End of File record this field con- + * sists of either four ascii zeros or the + * program entry address. Currently the + * entry address option is not supported. + * + * Data Field - This field consists of the actual data, + * converted to two ascii characters, high + * digit first. There are no data bytes in + * the End of File record. + * + * Checksum Field - The checksum field is the 8 bit binary + * sum of the record length field, the load + * address field, and the data field. This + * sum is then complemented (1's comple- + * ment) and converted to two ascii + * characters, high digit first. + */ + +/*)Function s19(i) + * + * int i 0 - process data + * 1 - end of data + * + * The function s19() outputs the relocated data + * in the standard Motorola S19 format. + * + * local variables: + * Addr_T chksum byte checksum + * + * global variables: + * int hilo byte order + * FILE * ofp output file handle + * int rtcnt count of data words + * int rtflg[] output the data flag + * Addr_T rtval[] relocated data + * + * functions called: + * int fprintf() c_library + * + * side effects: + * The data is output to the file defined by ofp. + */ + +VOID +s19(i) +{ + register Addr_T chksum; + + if (i) { + if (hilo == 0) { + chksum = rtval[0]; + rtval[0] = rtval[1]; + rtval[1] = chksum; + } + for (i = 0, chksum = 1; i < rtcnt; i++) { + if (rtflg[i]) + chksum++; + } + fprintf(ofp, "S1%02X", chksum); + for (i = 0; i < rtcnt ; i++) { + if (rtflg[i]) { + fprintf(ofp, "%02X", rtval[i]); + chksum += rtval[i]; + } + } + fprintf(ofp, "%02X\n", (0-chksum-1) & 0xff); + } else { + fprintf(ofp, "S9030000FC\n"); + } +} diff --git a/as/link/mcs51/readme.390 b/as/link/mcs51/readme.390 new file mode 100644 index 0000000..80170bd --- /dev/null +++ b/as/link/mcs51/readme.390 @@ -0,0 +1,141 @@ +DS80C390 flat mode support + +2/4/2000 Kevin Vigor (e-mail: kevin at vigor.nu) + +I have hacked the 8051 assembler to support the 24 bit flat address mode of +the DS80C390 processor. This mode allows the chip to directly address up to +4 Meg of RAM. Details can be found at Dallas' web site: www.dalsemi.com. + +1: Assembler changes. + +24 bit mode is entered via a new assembler directive, .flat24. This directive +takes a mandatory argument, which is either the string "on" or the string +"off". ".flat24 on" enables 24-bit mode, and ".flat24 off" puts the assembler +into standard 8051 mode. + +Note that any .included files within a ".flat24 on" segment of the code will +be compiled in 24-bit mode. + +In 24-bit mode, 8 instructions have altered behavior. Of these, 5 modify +the instruction encoding, while 3 differ only in behavior. These +instructions are discussed in the DS80C390 User's Guide, but a summary is +included here: + +ACALL and AJMP now take a 19 bit offset instead of the 8051's 11 bit offset. +An extra address byte is added to the encoded instruction. + +LCALL and LJMP now take a 24 bit target address instead of the 8051's 16 bit +address. An extra address byte is added to the encoded instruction. + +MOV DPTR, #immed now takes a 24 bit immediate value instead of the 8051's 16 +bit address. An extra data byte is added to the encoded instruction. + +INC DPTR now increments the entire 24 bit DPTR. The encoding is not changed. + +RET and RETI restore the full 24 bit PC from the stack. The encoding is not +changed. + +2: Linker changes. + +The linker supports (through a variety of evil hacks) 19 bit ACALL/AJMP +relocations and 24 bit LCALL/LJMP/DPTR relocations. These changes should be +invisible to the user. + +The linker can now also generated extended linear address records in the +Intel hex output format. This is necessary for any areas located above the +64K mark. This is enabled by the "-r" linker flag, and is disabled by +default (but the linker will throw a warning if an extended address is +encountered without the -r flag being enabled). + +Note that for various reasons, areas may still not be larger than 64K. +However, they may be located anywhere in the 4 Meg address space via the +assembler .org directive (for ABS areas) or the linker "-b" option. + +3: Examples + +Note that this example uses ABS areas to make the layout obvious. This code +won't do anything useful at all, but demonstrates the instruction encoding +in .flat24 mode vs 8051 mode. + +; test1.asm +.area CODE (ABS) +.org 0 + +; SFRs not known to the assembler yet... +$TA = 0x00C7 +$ACON = 0x009D + +; Set the chip to 24 bit flat mode via the DS "timed access" procedure. +mov $TA, #0xAA +mov $TA, #0x55 +mov $ACON, #0x06 ; 10 bit stack & 24 bit flat addressing. + +.flat24 on ; Enable 24-bit mode. The AM1 bit had better be + ; on... + +mov dptr, #myData ; Valid on the '390: myData is in the FARDATA + ; area at 0x300001. + ; Generates: 90 30 00 01 +acall _junkNear ; Within 11 bit range, but still must generate + ; 19 bit address for '390 flat mode. + ; Generates: 11 04 00 +ajmp _junkFar ; Within 16 bit range. + ; Generates 01 08 00 +acall _junkReallyFar ; Within 19 bit range. + ; Generates 91 00 00 +lcall _junkReallyReallyFar ; Within 24 bit range. + ; Generates 12 08 00 00 + +; Set the chip to 8051 mode via the DS "timed access" procedure. +mov $TA, #0x0AA +mov $TA, #0x055 +mov $ACON, #0x00 ; 8 bit stack & 16 bit flat addressing. + +.flat24 off ; Now we're an 8051 again. The AM1 bit had better be + ; off... + +;mov dptr, #myData ; Can't do that: myData is too far away. +acall _junkNear ; Within 11 bit range. + ; Generates 91 00 +ljmp _junkFar ; Within 16 bit range; can't AJMP, but can LJMP + ; Generates 02 08 00 +ret + +.area CODE2 (ABS) +.org 0x400 +; This is within the 11 bit ACALL/AJMP range of the 8051. +_junkNear: +ret + +.area CODE3 (ABS) +.org 0x800 +; This is within the 390's 19 bit ACALL/AJMP range, and inside the stock +; 8051's 16 bit LCALL range. +_junkFar: +ret + +.area CODE4 (ABS) +; This is within the 390's 19 bit ACALL/AJMP range and outside the +; 8051's LCALL range. +; Note that to link an image with an area beyond 64K (like this one), +; the '-r' flag must be provided to the linker, and Intel Hex output format +; must be used. +.org 0x40000 +_junkReallyFar: +ret + +.area CODE5 (ABS) +; This is outside anybody's ACALL/AJMP range. +.org 0x80000 +_junkReallyReallyFar: +ret + +.area FARDATA (ABS) +.org 0x300000 +; This is way, way up there. +.byte 0x01 +myData: +.byte 0x02 + +; test1.asm ends. + diff --git a/as/link/z80/Makefile.in b/as/link/z80/Makefile.in new file mode 100644 index 0000000..35374ec --- /dev/null +++ b/as/link/z80/Makefile.in @@ -0,0 +1,69 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +include $(top_builddir)/Makefile.common + +OBJDIR = obj$(EXT) + +ASXXLIB = $(srcdir)/../../asxxsrc + +ASXXLIBSRC = strcmpi.c + +LKLIB = $(srcdir)/.. + +LKLIBSRC = getline.c lkaomf51.c lkar.c lkdata.c lkeval.c \ + lkhead.c lklex.c lklib.c lklibr.c lklist.c \ + lknoice.c lkrel.c lksdcclib.c lkstore.c lksym.c + +SRC = lkmain.c lkarea.c lkihx.c \ + lkrloc.c lks19.c lkgb.c lkgg.c + +LKSOURCES = $(SRC) $(LKLIBSRC:%.c=$(LKLIB)/%.c) $(ASXXLIBSRC:%.c=$(ASXXLIB)/%.c) + +OBJS = $(SRC:%.c=$(OBJDIR)/%.o) +LKOBJS = $(LKLIBSRC:%.c=$(OBJDIR)/%.o) +ASXXLIBOBJS = $(ASXXLIBSRC:%.c=$(OBJDIR)/%.o) +LKOBJECTS = $(OBJS) $(LKOBJS) $(ASXXLIBOBJS) + +BINS = $(BUILDDIR)link$(EXT)$(EXEEXT) + +CPPFLAGS += -I.. -I$(srcdir)/.. +CFLAGS += $(CPPFLAGS) $(OPTS) -DINDEXLIB -DMLH_MAP -DSDK +CFLAGS += -funsigned-char -DUNIX +CFLAGS += -I$(top_builddir)/as/$(PORT) + +LDFLAGS = @LDFLAGS@ -lm $(EXTRALIBS) + +all: $(BINS) + +$(BINS): $(LKOBJECTS) + $(CC) -g -o $(BINS) $(LKOBJECTS) $(LDFLAGS) + +# We need a '.stamp'-file in $(OBJDIR), because the time stamp +# of $(OBJDIR) itself is always updated, when a file in $(OBJDIR) +# is updated. A rule like +# $(OBJDIR)/anyfile: $(OBJDIR) +# will always force a remake (at least on Linux ext2). + +$(OBJDIR)/.stamp: + mkdir -p $(OBJDIR) + touch $(OBJDIR)/.stamp + +$(OBJDIR)/%.o: %.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + +$(OBJDIR)/%.o: $(LKLIB)/%.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + +$(OBJDIR)/%.o: $(ASXXLIB)/%.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + +_link-z80: + $(MAKE) EXT=-z80$(E) PORT=z80 + +_link-gbz80: + $(MAKE) EXT=-gbz80$(E) OPTS=-DGAMEBOY PORT=z80 + +include $(srcdir)/clean.mk diff --git a/as/link/z80/clean.mk b/as/link/z80/clean.mk new file mode 100644 index 0000000..ce8ba5f --- /dev/null +++ b/as/link/z80/clean.mk @@ -0,0 +1,24 @@ +# Deleting all files created by building the program +# -------------------------------------------------- +include $(top_builddir)/Makefile.common + +clean: + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + rm -f $(top_builddir)/bin/link-z80$(EXEEXT) link-z80$(EXEEXT) + rm -f $(top_builddir)/bin/link-gbz80$(EXEEXT) link-gbz80$(EXEEXT) + rm -rf obj + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f Makefile *.dep + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean diff --git a/as/link/z80/conf.mk b/as/link/z80/conf.mk new file mode 100644 index 0000000..e6262c4 --- /dev/null +++ b/as/link/z80/conf.mk @@ -0,0 +1,23 @@ +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + rm -f $(top_builddir)/bin/link-z80 link-z80 + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f Makefile *.dep + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean diff --git a/as/link/z80/linkgbz80.dsp b/as/link/z80/linkgbz80.dsp new file mode 100644 index 0000000..e762ed7 --- /dev/null +++ b/as/link/z80/linkgbz80.dsp @@ -0,0 +1,216 @@ +# Microsoft Developer Studio Project File - Name="linkgbz80" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Console Application" 0x0103 + +CFG=linkgbz80 - Win32 Debug +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "linkgbz80.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "linkgbz80.mak" CFG="linkgbz80 - Win32 Debug" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "linkgbz80 - Win32 Release" (based on "Win32 (x86) Console Application") +!MESSAGE "linkgbz80 - Win32 Debug" (based on "Win32 (x86) Console Application") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "linkgbz80 - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 0 +# PROP BASE Output_Dir "Release_gbz80" +# PROP BASE Intermediate_Dir "Release_gbz80" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 0 +# PROP Output_Dir "Release_gbz80" +# PROP Intermediate_Dir "Release_gbz80" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD CPP /nologo /W3 /GX /O2 /I ".." /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "SDK" /D "GAMEBOY" /YX /FD /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /machine:I386 +# ADD LINK32 /nologo /subsystem:console /machine:I386 /out:"..\..\..\bin_vc\link-gbz80.exe" +# SUBTRACT LINK32 /pdb:none + +!ELSEIF "$(CFG)" == "linkgbz80 - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug_gbz80" +# PROP BASE Intermediate_Dir "Debug_gbz80" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug_gbz80" +# PROP Intermediate_Dir "Debug_gbz80" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /GZ /c +# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "SDK" /D "GAMEBOY" /YX /FD /GZ /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /debug /machine:I386 /pdbtype:sept +# ADD LINK32 /nologo /subsystem:console /debug /machine:I386 /out:"..\..\..\bin_vc\link-gbz80.exe" /pdbtype:sept +# SUBTRACT LINK32 /pdb:none + +!ENDIF + +# Begin Target + +# Name "linkgbz80 - Win32 Release" +# Name "linkgbz80 - Win32 Debug" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=..\getline.c +# End Source File +# Begin Source File + +SOURCE=..\lkaomf51.c +# End Source File +# Begin Source File + +SOURCE=..\lkar.c +# End Source File +# Begin Source File + +SOURCE=.\lkarea.c +# End Source File +# Begin Source File + +SOURCE=..\lkdata.c +# End Source File +# Begin Source File + +SOURCE=..\lkeval.c +# End Source File +# Begin Source File + +SOURCE=.\lkgb.c +# End Source File +# Begin Source File + +SOURCE=.\lkgg.c +# End Source File +# Begin Source File + +SOURCE=..\lkhead.c +# End Source File +# Begin Source File + +SOURCE=.\lkihx.c +# End Source File +# Begin Source File + +SOURCE=..\lklex.c +# End Source File +# Begin Source File + +SOURCE=..\lklib.c +# End Source File +# Begin Source File + +SOURCE=..\lklibr.c +# End Source File +# Begin Source File + +SOURCE=..\lklist.c +# End Source File +# Begin Source File + +SOURCE=.\lkmain.c +# End Source File +# Begin Source File + +SOURCE=..\lknoice.c +# End Source File +# Begin Source File + +SOURCE=..\lkrel.c +# End Source File +# Begin Source File + +SOURCE=.\lkrloc.c +# End Source File +# Begin Source File + +SOURCE=.\lks19.c +# End Source File +# Begin Source File + +SOURCE=..\lksdcclib.c +# End Source File +# Begin Source File + +SOURCE=..\lkstore.c +# End Source File +# Begin Source File + +SOURCE=..\lksym.c +# End Source File +# Begin Source File + +SOURCE=..\..\asxxsrc\strcmpi.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=..\aslink.h +# End Source File +# Begin Source File + +SOURCE=..\asxxxx_config.h +# End Source File +# Begin Source File + +SOURCE=..\getline.h +# End Source File +# Begin Source File + +SOURCE=..\lkar.h +# End Source File +# Begin Source File + +SOURCE=..\lklibr.h +# End Source File +# Begin Source File + +SOURCE=..\lkrel.h +# End Source File +# End Group +# Begin Group "Resource Files" + +# PROP Default_Filter "ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe" +# End Group +# End Target +# End Project diff --git a/as/link/z80/linkz80.dsp b/as/link/z80/linkz80.dsp new file mode 100644 index 0000000..4f9e44b --- /dev/null +++ b/as/link/z80/linkz80.dsp @@ -0,0 +1,216 @@ +# Microsoft Developer Studio Project File - Name="linkz80" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Console Application" 0x0103 + +CFG=linkz80 - Win32 Debug +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "linkz80.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. 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Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug_z80" +# PROP BASE Intermediate_Dir "Debug_z80" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug_z80" +# PROP Intermediate_Dir "Debug_z80" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /GZ /c +# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /D "_DEBUG" /D "WIN32" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "SDK" /YX /FD /GZ /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /debug /machine:I386 /pdbtype:sept +# ADD LINK32 /nologo /subsystem:console /debug /machine:I386 /out:"..\..\..\bin_vc\link-z80.exe" /pdbtype:sept +# SUBTRACT LINK32 /pdb:none + +!ENDIF + +# Begin Target + +# Name "linkz80 - Win32 Release" +# Name "linkz80 - Win32 Debug" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=..\getline.c +# End Source File +# Begin Source File + +SOURCE=..\lkaomf51.c +# End Source File +# Begin Source File + +SOURCE=..\lkar.c +# End Source File +# Begin Source File + +SOURCE=.\lkarea.c +# End Source File +# Begin Source File + +SOURCE=..\lkdata.c +# End Source File +# Begin Source File + +SOURCE=..\lkeval.c +# End Source File +# Begin Source File + +SOURCE=.\lkgb.c +# End Source File +# Begin Source File + +SOURCE=.\lkgg.c +# End Source File +# Begin Source File + +SOURCE=..\lkhead.c +# End Source File +# Begin Source File + +SOURCE=.\lkihx.c +# End Source File +# Begin Source File + +SOURCE=..\lklex.c +# End Source File +# Begin Source File + +SOURCE=..\lklib.c +# End Source File +# Begin Source File + +SOURCE=..\lklibr.c +# End Source File +# Begin Source File + +SOURCE=..\lklist.c +# End Source File +# Begin Source File + +SOURCE=.\lkmain.c +# End Source File +# Begin Source File + +SOURCE=..\lknoice.c +# End Source File +# Begin Source File + +SOURCE=..\lkrel.c +# End Source File +# Begin Source File + +SOURCE=.\lkrloc.c +# End Source File +# Begin Source File + +SOURCE=.\lks19.c +# End Source File +# Begin Source File + +SOURCE=..\lksdcclib.c +# End Source File +# Begin Source File + +SOURCE=..\lkstore.c +# End Source File +# Begin Source File + +SOURCE=..\lksym.c +# End Source File +# Begin Source File + +SOURCE=..\..\asxxsrc\strcmpi.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=..\aslink.h +# End Source File +# Begin Source File + +SOURCE=..\asxxxx_config.h +# End Source File +# Begin Source File + +SOURCE=..\getline.h +# End Source File +# Begin Source File + +SOURCE=..\lkar.h +# End Source File +# Begin Source File + +SOURCE=..\lklibr.h +# End Source File +# Begin Source File + +SOURCE=..\lkrel.h +# End Source File +# End Group +# Begin Group "Resource Files" + +# PROP Default_Filter "ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe" +# End Group +# End Target +# End Project diff --git a/as/link/z80/lkarea.c b/as/link/z80/lkarea.c new file mode 100644 index 0000000..7292d95 --- /dev/null +++ b/as/link/z80/lkarea.c @@ -0,0 +1,606 @@ +/* lkarea.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include "aslink.h" + +/*)Module lkarea.c + * + * The module lkarea.c contains the functions which + * create and link together all area definitions read + * from the .rel file(s). + * + * lkarea.c contains the following functions: + * VOID lnkarea() + * VOID lnksect() + * VOID lkparea() + * VOID newarea() + * + * lkarea.c contains no global variables. + */ + +/*)Function VOID newarea() + * + * The function newarea() creates and/or modifies area + * and areax structures for each A directive read from + * the .rel file(s). The function lkparea() is called + * to find the area structure associated with this name. + * If the area does not yet exist then a new area + * structure is created and linked to any existing + * linked area structures. The area flags are copied + * into the area flag variable. For each occurence of + * an A directive an areax structure is created and + * linked to the areax structures associated with this + * area. The size of this area section is placed into + * the areax structure. The flag value for all subsequent + * area definitions for the same area are compared and + * flagged as an error if they are not identical. + * The areax structure created for every occurence of + * an A directive is loaded with a pointer to the base + * area structure and a pointer to the associated + * head structure. And finally, a pointer to this + * areax structure is loaded into the list of areax + * structures in the head structure. Refer to lkdata.c + * for details of the structures and their linkage. + * + * local variables: + * areax **halp pointer to an array of pointers + * int i counter, loop variable, value + * char id[] id string + * int narea number of areas in this head structure + * areax * taxp pointer to an areax structure + * to areax structures + * + * global variables: + * area *ap Pointer to the current + * area structure + * areax *axp Pointer to the current + * areax structure + * head *hp Pointer to the current + * head structure + * int lkerr error flag + * + * functions called: + * Addr_T eval() lkeval.c + * VOID exit() c_library + * int fprintf() c_library + * VOID getid() lklex.c + * VOID lkparea() lkarea.c + * VOID skip() lklex.c + * + * side effects: + * The area and areax structures are created and + * linked with the appropriate head structures. + * Failure to allocate area or areax structure + * space will terminate the linker. Other internal + * errors most likely caused by corrupted .rel + * files will also terminate the linker. + */ + +/* + * Create an area entry. + * + * A xxxxxx size nnnn flags mm + * | | | + * | | `-- ap->a_flag + * | `------------- axp->a_size + * `------------------------- ap->a_id + * + */ +VOID +newarea() +{ + register int i, narea; + struct areax *taxp; + struct areax **halp; + char id[NCPS]; + + /* + * Create Area entry + */ + getid(id, -1); + lkparea(id); + /* + * Evaluate area size + */ + skip(-1); + axp->a_size = eval(); + /* + * Evaluate flags + */ + skip(-1); + i = 0; + taxp = ap->a_axp; + while (taxp->a_axp) { + ++i; + taxp = taxp->a_axp; + } + if (i == 0) { + ap->a_flag = eval(); + } else { + i = eval(); + if (i && (ap->a_flag != i)) { + fprintf(stderr, "Conflicting flags in area %.8s\n", id); + lkerr++; + } + } + /* + * Place pointer in header area list + */ + if (headp == NULL) { + fprintf(stderr, "No header defined\n"); + lkexit(1); + } + narea = hp->h_narea; + halp = hp->a_list; + for (i=0; i < narea ;++i) { + if (halp[i] == NULL) { + halp[i] = taxp; + return; + } + } + fprintf(stderr, "Header area list overflow\n"); + lkexit(1); +} + +/*)Function VOID lkparea(id) + * + * char * id pointer to the area name string + * + * The function lkparea() searches the linked area structures + * for a name match. If the name is not found then an area + * structure is created. An areax structure is created and + * appended to the areax structures linked to the area structure. + * The associated base area and head structure pointers are + * loaded into the areax structure. + * + * local variables: + * area * tap pointer to an area structure + * areax * taxp pointer to an areax structure + * + * global variables: + * area *ap Pointer to the current + * area structure + * area *areap The pointer to the first + * area structure of a linked list + * areax *axp Pointer to the current + * areax structure + * + * functions called: + * VOID * new() lksym() + * char * strcpy() c_library + * int symeq() lksym.c + * + * side effects: + * Area and/or areax structures are created. + * Failure to allocate space for created structures + * will terminate the linker. + */ + +VOID +lkparea(char *id) +{ + register struct area *tap; + register struct areax *taxp; + + ap = areap; + axp = (struct areax *) new (sizeof(struct areax)); + while (ap) { + if (symeq(id, ap->a_id)) { + taxp = ap->a_axp; + while (taxp->a_axp) + taxp = taxp->a_axp; + taxp->a_axp = axp; + axp->a_bap = ap; + axp->a_bhp = hp; + return; + } + ap = ap->a_ap; + } + ap = (struct area *) new (sizeof(struct area)); + if (areap == NULL) { + areap = ap; + } else { + tap = areap; + while (tap->a_ap) + tap = tap->a_ap; + tap->a_ap = ap; + } + ap->a_axp = axp; + axp->a_bap = ap; + axp->a_bhp = hp; + strncpy(ap->a_id, id, NCPS); + ap->a_addr = 0; +} + +/*)Function VOID lnkarea() + * + * The function lnkarea() resolves all area addresses. + * The function evaluates each area structure (and all + * the associated areax structures) in sequence. The + * linking process supports four (4) possible area types: + * + * ABS/OVR - All sections (each individual areax + * section) starts at the identical base + * area address overlaying all other + * areax sections for this area. The + * size of the area is largest of the area + * sections. + * + * ABS/CON - All sections (each individual areax + * section) are concatenated with the + * first section starting at the base + * area address. The size of the area + * is the sum of the section sizes. + * + * NOTE: Multiple absolute (ABS) areas are + * never concatenated with each other, + * thus absolute area A and absolute area + * B will overlay each other if they begin + * at the same location (the default is + * always address 0 for absolute areas). + * + * REL/OVR - All sections (each individual areax + * section) starts at the identical base + * area address overlaying all other + * areax sections for this area. The + * size of the area is largest of the area + * sections. + * + * REL/CON - All sections (each individual areax + * section) are concatenated with the + * first section starting at the base + * area address. The size of the area + * is the sum of the section sizes. + * + * NOTE: Relocatable (REL) areas are always concatenated + * with each other, thus relocatable area B + * (defined after area A) will follow + * relocatable area A independent of the + * starting address of area A. Within a + * specific area each areax section may be + * overlayed or concatenated with other + * areax sections. + * + * + * If a base address for an area is specified then the + * area will start at that address. Any relocatable + * areas defined subsequently will be concatenated to the + * previous relocatable area if it does not have a base + * address specified. + * + * The names s_ and l_ are created to + * define the starting address and length of each area. + * + * local variables: + * Addr_T rloc ;current relocation address + * char temp[] ;temporary string + * struct symbol *sp ;symbol structure + * + * global variables: + * area *ap Pointer to the current + * area structure + * area *areap The pointer to the first + * area structure of a linked list + * + * functions called: + * int fprintf() c_library + * VOID lnksect() lkarea.c + * symbol *lkpsym() lksym.c + * char * strncpy() c_library + * int symeq() lksym.c + * + * side effects: + * All area and areax addresses and sizes are + * determined and saved in their respective + * structures. + */ + +//unsigned long codemap[2048]; +//Addr_T lnksect(register struct area *tap); +VOID lnksect(register struct area *tap); +/* + * Resolve all area addresses. + */ +VOID +lnkarea() +{ + register Addr_T rloc = 0; +// Addr_T gs_size = 0; + char temp[NCPS]; + struct sym *sp; +#if 0 + struct area *abs_ap = NULL; + struct area *gs0_ap = NULL; + + memset(codemap, 0, sizeof(codemap)); + + /* first sort all absolute areas to the front */ + ap = areap; + /* no need to check first area, it's in front anyway */ + while (ap && ap->a_ap) + { + if (ap->a_ap->a_flag & A_ABS) + {/* next area is absolute, move it to front, + reversed sequence is no problem for absolutes */ + abs_ap = ap->a_ap; + ap->a_ap = abs_ap->a_ap; + abs_ap->a_ap = areap; + areap = abs_ap; + } + else + { + ap = ap->a_ap; + } + } + + /* next accumulate all GSINITx/GSFINAL area sizes + into GSINIT so they stay together */ + ap = areap; + while (ap) + { + if (!strncmp(ap->a_id, "GS", 2)) + {/* GSxxxxx area */ + if (ap->a_size == 0) + { + axp = ap->a_axp; + while (axp) + { + ap->a_size += axp->a_size; + axp = axp->a_axp; + } + } + gs_size += ap->a_size; + if (!strcmp(ap->a_id, "GSINIT0")) + {/* GSINIT0 area */ + gs0_ap = ap; + } + } + ap = ap->a_ap; + } + if (gs0_ap) + gs0_ap->a_size = gs_size; +#endif + ap = areap; + while (ap) + { + if (ap->a_flag & A_ABS) { + /* + * Absolute sections + */ + lnksect(ap); + } else { + /* + * Relocatable sections + */ + if (ap->a_addr == 0) + ap->a_addr = rloc; +// rloc = lnksect(ap); + lnksect(ap); + rloc = ap->a_addr + ap->a_size; + } + + /* + * Create symbols called: + * s_ the start address of the area + * l_ the length of the area + */ + + if (! symeq(ap->a_id, _abs_)) + { + strncpy(temp+2,ap->a_id,NCPS-2); + *(temp+1) = '_'; + + *temp = 's'; + sp = lkpsym(temp, 1); + sp->s_addr = ap->a_addr; + sp->s_axp = NULL; + sp->s_type |= S_DEF; + + *temp = 'l'; + sp = lkpsym(temp, 1); + sp->s_addr = ap->a_size; + sp->s_axp = NULL; + sp->s_type |= S_DEF; + } + ap = ap->a_ap; + } +} +#if 0 +static +Addr_T find_empty_space(Addr_T start, Addr_T size, unsigned long *map) +{ + int i, j, k; + unsigned long mask, b; + + while (1) + { + Addr_T a = start; + i = start >> 5; + j = (start + size) >> 5; + mask = -(1 << (start & 0x1F)); + + while (i < j) + { + if (map[i] & mask) + { + k = 32; + for (b=0x80000000; b!=0; b>>=1, k--) + { + if (map[i] & b) + break; + } + start = a + k; + break; + } + i++; + mask = 0xFFFFFFFF; + a += 32; + } + if (start > a) + continue; + + mask &= (1 << ((start + size) & 0x1F)) - 1; + if (map[i] & mask) + { + k = 32; + for (b=0x80000000; b!=0; b>>=1, k--) + { + if (map[i] & b) + break; + } + start = (a & ~0x1F) + k; + } + if (start <= a) + break; + } + return start; +} + +static +Addr_T allocate_space(Addr_T start, Addr_T size, char* id, unsigned long *map) +{ + int i, j; + unsigned long mask; + Addr_T a = start; + i = start >> 5; + j = (start + size) >> 5; + mask = -(1 << (start & 0x1F)); + + while (i < j) + { + if (map[i] & mask) + { + fprintf(stderr, "memory overlap near 0x%X for %s\n", a, id); + } + map[i++] |= mask; + mask = 0xFFFFFFFF; + a += 32; + } + mask &= (1 << ((start + size) & 0x1F)) - 1; + if (map[i] & mask) + { + fprintf(stderr, "memory overlap near 0x%X for %s\n", a, id); + } + map[i] |= mask; + return start; +} +#endif +/*)Function VOID lnksect() + * + * area * tap pointer to an area structure + * + * The function lnksect() is the function called by + * lnkarea() to resolve the areax addresses. Refer + * to the function lnkarea() for more detail. Pageing + * boundary and length errors will be reported by this + * function. + * + * local variables: + * Addr_T size size of area + * Addr_T addr address of area + * areax * taxp pointer to an areax structure + * + * global variables: + * int lkerr error flag + * + * functions called: + * none + * + * side effects: + * All area and areax addresses and sizes area determined + * and linked into the structures. + */ + +VOID lnksect(register struct area *tap) +//Addr_T lnksect(register struct area *tap) +{ + register Addr_T size, addr; + register struct areax *taxp; + + size = 0; + addr = tap->a_addr; + if ((tap->a_flag&A_PAG) && (addr & 0xFF)) { + fprintf(stderr, + "\n?ASlink-Warning-Paged Area %.8s Boundary Error\n", tap->a_id); + lkerr++; + } + + taxp = tap->a_axp; + if (tap->a_flag & A_OVR) { + /* + * Overlayed sections + */ + while (taxp) { + taxp->a_addr = addr; + if (taxp->a_size > size) + size = taxp->a_size; + taxp = taxp->a_axp; + } + } +#if 0 + else if (tap->a_flag & A_ABS) + { + /* + * Absolute sections + */ + while (taxp) + { + allocate_space(taxp->a_addr, taxp->a_size, tap->a_id, codemap); + taxp->a_addr = 0; /* reset to zero so relative addresses become absolute */ + size += taxp->a_size; + taxp = taxp->a_axp; + } + } +#endif + else + { + /* + * Concatenated sections + */ +/* + if (tap->a_size) { + addr = find_empty_space(addr, tap->a_size, codemap); + } +*/ + while (taxp) { +/* + //find next unused address now + if (taxp->a_size) + { + addr = find_empty_space(addr, taxp->a_size, codemap); + allocate_space(addr, taxp->a_size, tap->a_id, codemap); + } +*/ + taxp->a_addr = addr; + addr += taxp->a_size; + size += taxp->a_size; + taxp = taxp->a_axp; + } + } + tap->a_size = size; + + if ((tap->a_flag & A_PAG) && (size > 256)) + { + fprintf(stderr, + "\n?ASlink-Warning-Paged Area %.8s Length Error\n", tap->a_id); + lkerr++; + } +// return addr; +} diff --git a/as/link/z80/lkgb.c b/as/link/z80/lkgb.c new file mode 100644 index 0000000..b20299a --- /dev/null +++ b/as/link/z80/lkgb.c @@ -0,0 +1,206 @@ +/* lkgb.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * P. Felber + */ + +#ifdef GAMEBOY + +#include +#include +#include +#include +#include "aslink.h" + +/* Value used to fill the unused portions of the image */ +/* FFh puts less stress on a EPROM/Flash */ +#define FILLVALUE 0xFF + +#define CARTSIZE ((unsigned long)nb_rom_banks*16UL*1024UL) +#define NBSEG 8UL +#define SEGSIZE (CARTSIZE/NBSEG) + +#define ROMSIZE 0x8000UL +#define BANKSTART 0x4000UL +#define BANKSIZE 0x4000UL + +unsigned char *cart[NBSEG]; + +int nb_rom_banks; +int nb_ram_banks; +int current_rom_bank; +int mbc_type; +char cart_name[16] = ""; + +patch* patches = NULL; + +VOID gb(int in) +{ + static int first = 1; + unsigned long pos, chk; + int i; + patch *p; + + if(first) { + for(i = 0; i < NBSEG; i++) { + if((cart[i] = malloc(SEGSIZE)) == NULL) { + fprintf(stderr, "ERROR: can't allocate %dth segment of memory (%d bytes)\n", i, (int)SEGSIZE); + exit(EXIT_FAILURE); + } + memset(cart[i], FILLVALUE, SEGSIZE); + } + first = 0; + } + if(in) { + if(rtcnt > 2) { + if(hilo == 0) + pos = rtval[0] | (rtval[1]<<8); + else + pos = rtval[1] | (rtval[0]<<8); + + /* Perform some validity checks */ + if(pos >= ROMSIZE) { + fprintf(stderr, "ERROR: address overflow (addr %lx >= %lx)\n", pos, ROMSIZE); + exit(EXIT_FAILURE); + } + if(current_rom_bank >= nb_rom_banks) { + fprintf(stderr, "ERROR: bank overflow (addr %x > %x)\n", current_rom_bank, nb_rom_banks); + exit(EXIT_FAILURE); + } + if(current_rom_bank > 0 && pos < BANKSTART) { + fprintf(stderr, "ERROR: address underflow (addr %lx < %lx)\n", pos, BANKSTART); + exit(EXIT_FAILURE); + } + if(nb_rom_banks == 2 && current_rom_bank > 0) { + fprintf(stderr, "ERROR: only 1 32kB segment with 2 bank\n"); + exit(EXIT_FAILURE); + } + if(current_rom_bank > 1) + pos += (current_rom_bank-1)*BANKSIZE; + for(i = 2; i < rtcnt; i++) { + if(rtflg[i]) { + if(pos < CARTSIZE) { + if(cart[pos/SEGSIZE][pos%SEGSIZE] != FILLVALUE) + fprintf(stderr, "WARNING: possibly wrote twice at addr %lx (%02X->%02X)\n", pos, rtval[i], cart[pos/SEGSIZE][pos%SEGSIZE]); + cart[pos/SEGSIZE][pos%SEGSIZE] = rtval[i]; + } else { + fprintf(stderr, "ERROR: cartridge size overflow (addr %lx >= %lx)\n", pos, CARTSIZE); + exit(EXIT_FAILURE); + } + pos++; + } + } + } + } else { + /* EOF */ + if(cart_name[0] == 0 && linkp->f_idp != NULL) { + for(i = strlen(linkp->f_idp); + i > 0 && (isalnum((unsigned char)linkp->f_idp[i-1]) || linkp->f_idp[i-1] == '.'); + i--) + ; + for(pos = 0; pos < 16 && linkp->f_idp[i] != '.'; pos++, i++) + cart_name[pos] = toupper((unsigned char)linkp->f_idp[i]); + if(pos < 16) + cart_name[pos] = 0; + } + for(pos = 0x0134, i = 0; + pos < 0x0144 && cart_name[i]; + pos++, i++) + cart[pos/SEGSIZE][pos%SEGSIZE] = cart_name[i]; + for(; pos < 0x0144; pos++) + cart[pos/SEGSIZE][pos%SEGSIZE] = 0; + cart[0x147/SEGSIZE][0x147%SEGSIZE] = mbc_type; + switch(nb_rom_banks) { + case 2: + cart[0x148/SEGSIZE][0x148%SEGSIZE] = 0; + break; + case 4: + cart[0x148/SEGSIZE][0x148%SEGSIZE] = 1; + break; + case 8: + cart[0x148/SEGSIZE][0x148%SEGSIZE] = 2; + break; + case 16: + cart[0x148/SEGSIZE][0x148%SEGSIZE] = 3; + break; + case 32: + cart[0x148/SEGSIZE][0x148%SEGSIZE] = 4; + break; + case 64: + cart[0x148/SEGSIZE][0x148%SEGSIZE] = 5; + break; + case 128: + cart[0x148/SEGSIZE][0x148%SEGSIZE] = 6; + break; + case 256: + cart[0x148/SEGSIZE][0x148%SEGSIZE] = 7; + break; + case 512: + cart[0x148/SEGSIZE][0x148%SEGSIZE] = 8; + break; + default: + fprintf(stderr, "WARNING: unsupported number of ROM banks (%d)\n", nb_rom_banks); + cart[0x148/SEGSIZE][0x148%SEGSIZE] = 0; + break; + } + switch(nb_ram_banks) { + case 0: + cart[0x149/SEGSIZE][0x149%SEGSIZE] = 0; + break; + case 1: + cart[0x149/SEGSIZE][0x149%SEGSIZE] = 2; + break; + case 4: + cart[0x149/SEGSIZE][0x149%SEGSIZE] = 3; + break; + case 16: + cart[0x149/SEGSIZE][0x149%SEGSIZE] = 4; + break; + default: + fprintf(stderr, "WARNING: unsupported number of RAM banks (%d)\n", nb_ram_banks); + cart[0x149/SEGSIZE][0x149%SEGSIZE] = 0; + break; + } + + /* Patch before calculating the checksum */ + if(patches) + for(p = patches; p; p = p->next) + cart[p->addr/SEGSIZE][p->addr%SEGSIZE] = p->value; + + /* Update complement checksum */ + chk = 0; + for(pos = 0x0134; pos < 0x014D; pos++) + chk += cart[pos/SEGSIZE][pos%SEGSIZE]; + cart[0x014D/SEGSIZE][0x014D%SEGSIZE] = (unsigned char)(0xE7 - (chk&0xFF)); + /* Update checksum */ + chk = 0; + cart[0x014E/SEGSIZE][0x014E%SEGSIZE] = 0; + cart[0x014F/SEGSIZE][0x014F%SEGSIZE] = 0; + for(i = 0; i < NBSEG; i++) + for(pos = 0; pos < SEGSIZE; pos++) + chk += cart[i][pos]; + cart[0x014E/SEGSIZE][0x014E%SEGSIZE] = (unsigned char)((chk>>8)&0xFF); + cart[0x014F/SEGSIZE][0x014F%SEGSIZE] = (unsigned char)(chk&0xFF); + + for(i = 0; i < NBSEG; i++) + fwrite(cart[i], 1, SEGSIZE, ofp); + } +} + +#endif /* GAMEBOY */ diff --git a/as/link/z80/lkgg.c b/as/link/z80/lkgg.c new file mode 100644 index 0000000..3c3842b --- /dev/null +++ b/as/link/z80/lkgg.c @@ -0,0 +1,94 @@ +/* lkgg.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * P. Felber + */ + +#ifdef GAMEGEAR + +#include +#include +#include +#include +#include "aslink.h" + +#define CARTSIZE ((unsigned long)4*16UL*1024UL) +#define NBSEG 8UL +#define SEGSIZE (CARTSIZE/NBSEG) + +unsigned char *cart[NBSEG]; + +#define ROMSIZE 0x10000UL +#define BANKSIZE 0x4000UL + +int current_rom_bank; + +VOID gg(int in) +{ + static int first = 1; + unsigned long pos; + int i; + + if(first) { + for(i = 0; i < NBSEG; i++) { + if((cart[i] = malloc(SEGSIZE)) == NULL) { + fprintf(stderr, "ERROR: can't allocate %dth segment of memory (%d bytes)\n", i, (int)SEGSIZE); + exit(EXIT_FAILURE); + } + memset(cart[i], 0, SEGSIZE); + } + first = 0; + } + if(in) { + if(rtcnt > 2) { + if(hilo == 0) + pos = rtval[0] | (rtval[1]<<8); + else + pos = rtval[1] | (rtval[0]<<8); + + /* Perform some validity checks */ + if(pos >= ROMSIZE) { + fprintf(stderr, "ERROR: address overflow (addr %lx >= %lx)\n", pos, ROMSIZE); + exit(EXIT_FAILURE); + } + if(current_rom_bank > 1) + pos += (current_rom_bank-1)*BANKSIZE; + for(i = 2; i < rtcnt; i++) { + if(rtflg[i]) { + if(pos < CARTSIZE) { + if(cart[pos/SEGSIZE][pos%SEGSIZE] != 0) + fprintf(stderr, "WARNING: wrote twice at addr %lx (%02X->%02X)\n", pos, rtval[i], cart[pos/SEGSIZE][pos%SEGSIZE]); + cart[pos/SEGSIZE][pos%SEGSIZE] = rtval[i]; + } else { + fprintf(stderr, "ERROR: cartridge size overflow (addr %lx >= %lx)\n", pos, CARTSIZE); + exit(EXIT_FAILURE); + } + pos++; + } + } + } + } else { + /* EOF */ + /* Patch before calculating the checksum */ + for(i = 0; i < NBSEG; i++) + fwrite(cart[i], 1, SEGSIZE, ofp); + } +} + +#endif /* GAMEGEAR */ diff --git a/as/link/z80/lkihx.c b/as/link/z80/lkihx.c new file mode 100644 index 0000000..812e446 --- /dev/null +++ b/as/link/z80/lkihx.c @@ -0,0 +1,140 @@ +/* lkihx.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include "aslink.h" + +/*)Module lkihx.c + * + * The module lkihx.c contains the function to + * output the relocated object code in the + * Intel Hex format. + * + * lkihx.c contains the following functions: + * VOID ihx(i) + * + * lkihx.c contains no local variables. + */ + +/*Intel Hex Format + * Record Mark Field - This field signifies the start of a + * record, and consists of an ascii colon + * (:). + * + * Record Length Field - This field consists of two ascii + * characters which indicate the number of + * data bytes in this record. The + * characters are the result of converting + * the number of bytes in binary to two + * ascii characters, high digit first. An + * End of File record contains two ascii + * zeros in this field. + * + * Load Address Field - This field consists of the four ascii + * characters which result from converting + * the the binary value of the address in + * which to begin loading this record. The + * order is as follows: + * + * High digit of high byte of address. + * Low digit of high byte of address. + * High digit of low byte of address. + * Low digit of low byte of address. + * + * In an End of File record this field con- + * sists of either four ascii zeros or the + * program entry address. Currently the + * entry address option is not supported. + * + * Record Type Field - This field identifies the record type, + * which is either 0 for data records or 1 + * for an End of File record. It consists + * of two ascii characters, with the high + * digit of the record type first, followed + * by the low digit of the record type. + * + * Data Field - This field consists of the actual data, + * converted to two ascii characters, high + * digit first. There are no data bytes in + * the End of File record. + * + * Checksum Field - The checksum field is the 8 bit binary + * sum of the record length field, the load + * address field, the record type field, + * and the data field. This sum is then + * negated (2's complement) and converted + * to two ascii characters, high digit + * first. + */ + +/*)Function ihx(i) + * + * int i 0 - process data + * 1 - end of data + * + * The function ihx() outputs the relocated data + * in the standard Intel Hex format. + * + * local variables: + * Addr_T chksum byte checksum + * + * global variables: + * int hilo byte order + * FILE * ofp output file handle + * int rtcnt count of data words + * int rtflg[] output the data flag + * Addr_T rtval[] relocated data + * + * functions called: + * int fprintf() c_library + * + * side effects: + * The data is output to the file defined by ofp. + */ + +VOID +ihx(i) +{ + register Addr_T chksum; + + if (i) { + if (hilo == 0) { + chksum = rtval[0]; + rtval[0] = rtval[1]; + rtval[1] = chksum; + } + for (i = 0, chksum = -2; i < rtcnt; i++) { + if (rtflg[i]) + chksum++; + } + fprintf(ofp, ":%02X", chksum); + for (i = 0; i < rtcnt ; i++) { + if (rtflg[i]) { + fprintf(ofp, "%02X", rtval[i]); + chksum += rtval[i]; + } + if (i == 1) { + fprintf(ofp, "00"); + } + } + fprintf(ofp, "%02X\n", (0-chksum) & 0xff); + } else { + fprintf(ofp, ":00000001FF\n"); + } +} diff --git a/as/link/z80/lkmain.c b/as/link/z80/lkmain.c new file mode 100644 index 0000000..70404c2 --- /dev/null +++ b/as/link/z80/lkmain.c @@ -0,0 +1,1549 @@ +/* lkmain.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * Extensions: P. Felber + */ + +#include +#include +#include +#include "aslink.h" + +#ifndef SDK_VERSION_STRING +#define SDK_VERSION_STRING "3.0.0" +#endif +#ifndef TARGET_STRING +#define TARGET_STRING "gbz80" +#endif + +#ifdef WIN32T +#include + +void Timer(int action, char * message) +{ + static double start, end, total=0.0; + static const double secs_per_tick = 1.0 / CLOCKS_PER_SEC; + + if(action==0) start=clock()*secs_per_tick; + else if(action==1) + { + end=clock() * secs_per_tick; + printf("%s \t%f seconds.\n", message, (end-start)); + total+=end-start; + } + else + { + printf("Total time: \t%f seconds.\n", total); + total=0.0; + } +} +#endif + +/*)Module lkmain.c + * + * The module lkmain.c contains the functions which + * (1) input the linker options, parameters, and specifications + * (2) perform a two pass link + * (3) produce the appropriate linked data output and/or + * link map file and/or relocated listing files. + * + * lkmain.c contains the following functions: + * FILE * afile(fn,ft,wf) + * VOID bassav() + * VOID gblsav() + * VOID link_main() + * VOID lkexit() + * VOID main(argc,argv) + * VOID map() + * int parse() + * VOID setbas() + * VOID setgbl() + * VOID usage() + * + * lkmain.c contains the following local variables: + * char * usetext[] array of pointers to the + * command option tect lines + * + */ + +/*)Function VOID main(argc,argv) + * + * int argc number of command line arguments + 1 + * char * argv[] array of pointers to the command line + * arguments + * + * The function main() evaluates the command line arguments to + * determine if the linker parameters are to input through 'stdin' + * or read from a command file. The functions lk_getline() and parse() + * are to input and evaluate the linker parameters. The linking process + * proceeds by making the first pass through each .rel file in the order + * presented to the linker. At the end of the first pass the setbase(), + * lnkarea(), setgbl(), and symdef() functions are called to evaluate + * the base address terms, link all areas, define global variables, + * and look for undefined symbols. Following these routines a linker + * map file may be produced and the linker output files may be opened. + * The second pass through the .rel files will output the linked data + * in one of the four supported formats. + * + * local variables: + * char * p pointer to an argument string + * int c character from argument string + * int i loop counter + * + * global variables: + * text line in ib[] + * lfile *cfp The pointer *cfp points to the + * current lfile structure + * char ctype[] array of character types, one per + * ASCII character + * lfile *filep The pointer *filep points to the + * beginning of a linked list of + * lfile structures. + * head *hp Pointer to the current + * head structure + * char ib[NINPUT] .rel file text line + * char *ip pointer into the .rel file + * lfile *linkp pointer to first lfile structure + * containing an input .rel file + * specification + * int lkerr error flag + * int mflag Map output flag + * int oflag Output file type flag + * FILE *ofp Output file handle + * for word formats + * FILE *ofph Output file handle + * for high byte format + * FILE *ofpl Output file handle + * for low byte format + * int pass linker pass number + * int pflag print linker command file flag + * int radix current number conversion radix + * FILE *sfp The file handle sfp points to the + * currently open file + * lfile *startp asmlnk startup file structure + * FILE * stdin c_library + * FILE * stdout c_library + * + * functions called: + * FILE * afile() lkmain.c + * int fclose() c_library + * int fprintf() c_library + * int lk_getline() lklex.c + * VOID library() lklibr.c + * VOID link_main() lkmain.c + * VOID lkexit() lkmain.c + * VOID lnkarea() lkarea.c + * VOID map() lkmain.c + * VOID new() lksym.c + * int parse() lkmain.c + * VOID reloc() lkreloc.c + * VOID search() lklibr.c + * VOID setbas() lkmain.c + * VOID setgbl() lkmain.c + * VOID symdef() lksym.c + * VOID usage() lkmain.c + * + * side effects: + * Completion of main() completes the linking process + * and may produce a map file (.map) and/or a linked + * data files (.ihx or .s19) and/or one or more + * relocated listing files (.rst). + */ + +#ifdef SDK +int binary = 0; +#endif /* SDK */ +#ifdef GAMEBOY +char *default_basep[] = { + "_CODE=0x0200", + "_DATA=0xC0A0", + NULL +}; + +char *default_globlp[] = { + /* DMA transfer must start at multiples of 0x100 */ + ".OAM=0xC000", + ".STACK=0xE000", + ".refresh_OAM=0xFF80", + + ".init=0x0000", + + NULL +}; +#endif /* GAMEBOY */ + +int +main(int argc, char *argv[]) +{ + register char *p; + register int c, i; + +#ifdef WIN32T + Timer(0, ""); +#endif + +#ifdef GAMEBOY + nb_rom_banks = 2; + nb_ram_banks = 0; + mbc_type = 0; + symflag=0; + + for(i = 0; default_basep[i] != NULL; i++) { + if(basep == NULL) { + basep = (struct base *)new(sizeof(struct base)); + bsp = basep; + } else { + bsp->b_base = (struct base *)new(sizeof(struct base)); + bsp = bsp->b_base; + } + bsp->b_strp = default_basep[i]; + } + for(i = 0; default_globlp[i] != NULL; i++) { + if(globlp == NULL) { + globlp = (struct globl *)new(sizeof(struct globl)); + gsp = globlp; + } else { + gsp->g_globl = (struct globl *)new(sizeof(struct globl)); + gsp = gsp->g_globl; + } + gsp->g_strp = default_globlp[i]; + } +#endif /* GAMEBOY */ +#ifndef SDK + fprintf(stdout, "\n"); +#endif /* SDK */ + + startp = (struct lfile *) new (sizeof (struct lfile)); + + pflag = 1; + for (i=1; if_type = F_STD; + break; + + case 'f': + case 'F': + startp->f_type = F_LNK; + break; + + case 'n': + case 'N': + pflag = 0; + break; + + case 'p': + case 'P': + pflag = 1; + break; + + default: + usage(); + } + } + +#ifdef SDK + if(c == '-') { + startp->f_type = F_CMD; + startp->f_idp = (char *)&argv[i+1]; + break; + } +#endif /* SDK */ + + } else { + if (startp->f_type == F_LNK) { + startp->f_idp = p; + } + } + } + if (startp->f_type == F_INV) + usage(); + if (startp->f_type == F_LNK && startp->f_idp == NULL) + usage(); +#ifdef SDK + if (startp->f_type == F_CMD && startp->f_idp == NULL) + usage(); +#endif /* SDK */ + + cfp = NULL; + sfp = NULL; + filep = startp; + while (1) { + ip = ib; + if (lk_getline() == 0) + break; + if (pflag && sfp != stdin) + fprintf(stdout, "%s\n", ip); + if (*ip == '\0' || parse()) + break; + } + + if (sfp) { + fclose(sfp); + sfp = NULL; + } + + if (linkp == NULL) + usage(); +#ifdef SDK + if (linkp->f_flp == NULL) + usage(); +#endif /* SDK */ + +#ifdef GAMEBOY + for(i = 1; i < nb_rom_banks; i++) { + bsp->b_base = (struct base *)new(sizeof(struct base)); + bsp = bsp->b_base; + bsp->b_strp = (char *)malloc(18); + sprintf(bsp->b_strp, "_CODE_%d=0x4000", i); + } + for(i = 0; i < nb_ram_banks; i++) { + bsp->b_base = (struct base *)new(sizeof(struct base)); + bsp = bsp->b_base; + bsp->b_strp = (char *)malloc(18); + sprintf(bsp->b_strp, "_DATA_%d=0xA000", i); + } +#endif /* GAMEBOY */ + + syminit(); + + if (dflag){ + SaveLinkedFilePath(linkp->f_idp); //Must be the first one... + dfp = afile(linkp->f_idp,"cdb",1); + if (dfp == NULL) + lkexit(1); + } + + for (pass=0; pass<2; ++pass) { + cfp = NULL; + sfp = NULL; +#ifdef SDK + filep = linkp->f_flp; +#else /* SDK */ + filep = linkp; +#endif /* SDK */ + hp = NULL; + radix = 10; + + while (lk_getline()) { + ip = ib; + link_main(); + } + if (pass == 0) { + /* + * Search libraries for global symbols + */ + search(); + /* + * Set area base addresses. + */ + setbas(); + /* + * Link all area addresses. + */ + lnkarea(); + /* + * Process global definitions. + */ + setgbl(); + /* + * Check for undefined globals. + */ + symdef(stderr); +#ifdef SDK + if (symflag) + sym(); +#endif + /* + * Output Link Map if requested. + */ + if (mflag) + map(); + /* + * Open output file + */ + if (oflag == 1) { +#ifdef SDK + ofp = afile(linkp->f_idp, "ihx", 1); +#else /* SDK */ + ofp = afile(linkp->f_idp, "IHX", 1); +#endif /* SDK */ + if (ofp == NULL) { + lkexit(1); + } + } else + if (oflag == 2) { +#ifdef SDK + ofp = afile(linkp->f_idp, "s19", 1); +#else /* SDK */ + ofp = afile(linkp->f_idp, "S19", 1); +#endif /* SDK */ + if (ofp == NULL) { + lkexit(1); + } +#ifdef SDK + } else + if (oflag == 3) { + binary = 1; + ofp = afile(linkp->f_idp, "", 1); + binary = 0; + if (ofp == NULL) { + lkexit(1); + } +#endif /* SDK */ + } + } else { + /* + * Link in library files + */ + library(); + reloc('E'); + } + } +#ifdef WIN32T + Timer(1, "Linker execution time"); +#endif + + lkexit(lkerr); + + /* Never get here. */ + return 0; +} + +/*)Function VOID lkexit(i) + * + * int i exit code + * + * The function lkexit() explicitly closes all open + * files and then terminates the program. + * + * local variables: + * none + * + * global variables: + * FILE * mfp file handle for .map + * FILE * ofp file handle for .ihx/.s19 + * FILE * rfp file hanlde for .rst + * FILE * sfp file handle for .rel + * FILE * tfp file handle for .lst + * + * functions called: + * int fclose() c_library + * VOID exit() c_library + * + * side effects: + * All files closed. Program terminates. + */ + +VOID +lkexit(int i) +{ + if (mfp != NULL) fclose(mfp); + if (ofp != NULL) fclose(ofp); + if (rfp != NULL) fclose(rfp); + if (sfp != NULL) fclose(sfp); + if (tfp != NULL) fclose(tfp); + if (dfp != NULL) fclose(dfp); + exit(i); +} + +/*)Function link_main() + * + * The function link_main() evaluates the directives for each line of + * text read from the .rel file(s). The valid directives processed + * are: + * X, D, Q, H, M, A, S, T, R, and P. + * + * local variables: + * int c first non blank character of a line + * + * global variables: + * head *headp The pointer to the first + * head structure of a linked list + * head *hp Pointer to the current + * head structure + * int pass linker pass number + * int radix current number conversion radix + * + * functions called: + * char endline() lklex.c + * VOID module() lkhead.c + * VOID newarea() lkarea.c + * VOID newhead() lkhead.c + * sym * newsym() lksym.c + * VOID reloc() lkreloc.c + * + * side effects: + * Head, area, and symbol structures are created and + * the radix is set as the .rel file(s) are read. + */ + +VOID +link_main() +{ + register char c; + + if ((c=endline()) == 0) { return; } + switch (c) { + + case 'O': /*For some important sdcc options*/ + if (pass == 0) + { + if(strlen(sdccopt)==0) + { + strcpy(sdccopt, &ip[1]); + strcpy(sdccopt_module, curr_module); + } + else + { + if(strcmp(sdccopt, &ip[1])!=0) + { + fprintf(stderr, + "?ASlink-Warning-Conflicting sdcc options:\n" + " \"%s\" in module \"%s\" and\n" + " \"%s\" in module \"%s\".\n", + sdccopt, sdccopt_module, &ip[1], curr_module); + lkerr++; + } + } + } + break; + + case 'X': + radix = 16; + break; + + case 'D': + radix = 10; + break; + + case 'Q': + radix = 8; + break; + + case 'H': + if (pass == 0) { + newhead(); + } else { + if (hp == 0) { + hp = headp; + } else { + hp = hp->h_hp; + } + } + sdp.s_area = NULL; + sdp.s_areax = NULL; + sdp.s_addr = 0; + break; + + case 'M': + if (pass == 0) + { + strcpy(curr_module, &ip[1]); + module(); + } + break; + + case 'A': + if (pass == 0) + newarea(); + if (sdp.s_area == NULL) { + sdp.s_area = areap; + sdp.s_areax = areap->a_axp; + sdp.s_addr = 0; + } + break; + + case 'S': + if (pass == 0) + newsym(); + break; + + case 'T': + case 'R': + case 'P': + if (pass == 0) + break; + reloc(c); + break; + + default: + break; + } + if (c == 'X' || c == 'D' || c == 'Q') { + if ((c = get()) == 'H') { + hilo = 1; + } else + if (c == 'L') { + hilo = 0; + } + } +} + +/*)Function VOID map() + * + * The function map() opens the output map file and calls the various + * routines to + * (1) output the variables in each area, + * (2) list the files processed with module names, + * (3) list the libraries file processed, + * (4) list base address definitions, + * (5) list global variable definitions, and + * (6) list any undefined variables. + * + * local variables: + * int i counter + * head * hdp pointer to head structure + * lbfile *lbfh pointer to library file structure + * + * global variables: + * area *ap Pointer to the current + * area structure + * area *areap The pointer to the first + * area structure of a linked list + * base *basep The pointer to the first + * base structure + * base *bsp Pointer to the current + * base structure + * lfile *filep The pointer *filep points to the + * beginning of a linked list of + * lfile structures. + * globl *globlp The pointer to the first + * globl structure + * globl *gsp Pointer to the current + * globl structure + * head *headp The pointer to the first + * head structure of a linked list + * lbfile *lbfhead The pointer to the first + * lbfile structure of a linked list + * lfile *linkp pointer to first lfile structure + * containing an input REL file + * specification + * int lop current line number on page + * FILE *mfp Map output file handle + * int page current page number + * + * functions called: + * FILE * afile() lkmain.c + * int fprintf() c_library + * VOID lkexit() lkmain.c + * VOID lstarea() lklist.c + * VOID newpag() lklist.c + * VOID symdef() lksym.c + * + * side effects: + * The map file is created. + */ + +#ifndef MLH_MAP +VOID +map() +{ + register int i; + register struct head *hdp; + register struct lbfile *lbfh; + + /* + * Open Map File + */ +#ifdef SDK + mfp = afile(linkp->f_idp, "map", 1); +#else /* SDK */ + mfp = afile(linkp->f_idp, "MAP", 1); +#endif /* SDK */ + if (mfp == NULL) { + lkexit(1); + } + + /* + * Output Map Area Lists + */ + page = 0; + lop = NLPP; + ap = areap; + while (ap) { + lstarea(ap); + ap = ap->a_ap; + } + /* + * List Linked Files + */ + newpag(mfp); + fprintf(mfp, "\nFiles Linked [ module(s) ]\n\n"); + hdp = headp; +#ifdef SDK + filep = linkp->f_flp; +#else /* SDK */ + filep = linkp; +#endif /* SDK */ + while (filep) { + fprintf(mfp, "%-16s", filep->f_idp); + i = 0; + while ((hdp != NULL) && (hdp->h_lfile == filep)) { + if (i % 5) { + fprintf(mfp, ", %8.8s", hdp->m_id); + } else { + if (i) { + fprintf(mfp, ",\n%20s%8.8s", "", hdp->m_id); + } else { + fprintf(mfp, " [ %8.8s", hdp->m_id); + } + } + hdp = hdp->h_hp; + i++; + } + if (i) + fprintf(mfp, " ]"); + fprintf(mfp, "\n"); + filep = filep->f_flp; + } + /* + * List Linked Libraries + */ + if (lbfhead != NULL) { + fprintf(mfp, + "\nLibraries Linked [ object file ]\n\n"); + for (lbfh=lbfhead; lbfh; lbfh=lbfh->next) { + fprintf(mfp, "%-32s [ %16.16s ]\n", + lbfh->libspc, lbfh->relfil); + } + fprintf(mfp, "\n"); + } + /* + * List Base Address Definitions + */ + if (basep) { + newpag(mfp); + fprintf(mfp, "\nUser Base Address Definitions\n\n"); + bsp = basep; + while (bsp) { + fprintf(mfp, "%s\n", bsp->b_strp); + bsp = bsp->b_base; + } + } + /* + * List Global Definitions + */ + if (globlp) { + newpag(mfp); + fprintf(mfp, "\nUser Global Definitions\n\n"); + gsp = globlp; + while (gsp) { + fprintf(mfp, "%s\n", gsp->g_strp); + gsp = gsp->g_globl; + } + } + fprintf(mfp, "\n\f"); + symdef(mfp); +} +#else +VOID map() +{ + register struct head *hdp; + register struct lbfile *lbfh; + + /* + * Open Map File + */ +#ifdef SDK + mfp = afile(linkp->f_idp, "map", 1); +#else /* SDK */ + mfp = afile(linkp->f_idp, "MAP", 1); +#endif /* SDK */ + if (mfp == NULL) { + lkexit(1); + } + + /* + *Output Map Area Lists + */ + page = 0; + lop = NLPP; + ap = areap; + while (ap) { + lstarea(ap); + ap = ap->a_ap; + } + /* + * List Linked Files + */ + hdp = headp; +#ifdef SDK + filep = linkp->f_flp; +#else /* SDK */ + filep = linkp; +#endif /* SDK */ + if (filep) { + fprintf( mfp, "MODULES\n"); + } + while (filep) { + fprintf(mfp, "\tFILE %s\n", filep->f_idp); + while ((hdp != NULL) && (hdp->h_lfile == filep)) { + if (strlen(hdp->m_id)>0) + fprintf(mfp, "\t\tNAME %s\n", hdp->m_id); + hdp = hdp->h_hp; + } + filep = filep->f_flp; + } + /* + * List Linked Libraries + */ + if (lbfhead != NULL) { + fprintf(mfp, "LIBRARIES\n"); + for (lbfh=lbfhead; lbfh; lbfh=lbfh->next) { + fprintf(mfp, "\tLIBRARY %s\n" + "\t\tMODULE %s\n", + lbfh->libspc, lbfh->relfil); + } + } + /* + * List Base Address Definitions + */ + if (basep) { + fprintf(mfp, "USERBASEDEF\n"); + bsp = basep; + while (bsp) { + fprintf(mfp, "\t%s\n", bsp->b_strp); + bsp = bsp->b_base; + } + } + /* + * List Global Definitions + */ + if (globlp) { + fprintf(mfp, "USERGLOBALDEF\n"); + gsp = globlp; + while (gsp) { + fprintf(mfp, "\t%s\n", gsp->g_strp); + gsp = gsp->g_globl; + } + } + symdef(mfp); +#ifdef SDK + if (mfp!=NULL) { + fclose(mfp); + mfp = NULL; + } +#endif +} +#endif /* MLH_MAP */ + +#ifdef SDK +/* PENDING */ +VOID lstareatosym(struct area *xp); + +VOID sym() +{ + /* + * Open sym File + */ + mfp = afile(linkp->f_idp, "sym", 1); + if (mfp == NULL) { + lkexit(1); + } + fprintf( mfp, "; no$gmb format .sym file\n" + "; Generated automagically by ASxxxx linker %s (SDK " SDK_VERSION_STRING ")\n" + , VERSION ); + /* + * Output sym Area Lists + */ + page = 0; + lop = NLPP; + ap = areap; + while (ap) { + lstareatosym(ap); + ap = ap->a_ap; + } + if (mfp!=NULL) { + fclose(mfp); + mfp = NULL; + } +} +#endif /* SDK */ + +/*)Function int parse() + * + * The function parse() evaluates all command line or file input + * linker directives and updates the appropriate variables. + * + * local variables: + * int c character value + * char fid[] file id string + * + * global variables: + * char ctype[] array of character types, one per + * ASCII character + * lfile *lfp pointer to current lfile structure + * being processed by parse() + * lfile *linkp pointer to first lfile structure + * containing an input REL file + * specification + * int mflag Map output flag + * int oflag Output file type flag + * int pflag print linker command file flag + * FILE * stderr c_library + * int uflag Relocated listing flag + * int xflag Map file radix type flag + * + * Functions called: + * VOID addlib() lklibr.c + * VOID addpath() lklibr.c + * VOID bassav() lkmain.c + * int fprintf() c_library + * VOID gblsav() lkmain.c + * VOID getfid() lklex.c + * char getnb() lklex.c + * VOID lkexit() lkmain.c + * char * strcpy() c_library + * int strlen() c_library + * + * side effects: + * Various linker flags are updated and the linked + * structure lfile is created. + */ + +int +parse() +{ + register int c; + char fid[NINPUT]; + + while ((c = getnb()) != 0) { + if (c == ';') + return(0); + if ( c == '-') { + while (ctype[c=get()] & LETTER) { + switch(c) { + + case 'i': + case 'I': + oflag = 1; + break; + + case 's': + case 'S': + oflag = 2; + break; +#ifdef GAMEBOY + case 'y': + case 'Y': + c = get(); + if(c == 'O' || c == 'o') + nb_rom_banks = expr(0); + else if(c == 'A' || c == 'a') + nb_ram_banks = expr(0); + else if(c == 'T' || c == 't') + mbc_type = expr(0); + else if(c == 'N' || c == 'n') { + int i = 0; + if(getnb() != '=' || getnb() != '"') { + fprintf(stderr, "Syntax error in -YN=\"name\" flag\n"); + lkexit(1); + } + while((c = get()) != '"' && i < 16) { + cart_name[i++] = c; + } + if(i < 16) + cart_name[i] = 0; + else + while(get() != '"') + ; + } else if(c == 'P' || c == 'p') { + patch *p = patches; + + patches = (patch *)malloc(sizeof(patch)); + patches->next = p; + patches->addr = expr(0); + if(getnb() != '=') { + fprintf(stderr, "Syntax error in -YHaddr=val flag\n"); + lkexit(1); + } + patches->value = expr(0); + } else { + fprintf(stderr, "Invalid option\n"); + lkexit(1); + } + break; + +#endif /* GAMEBOY */ +#ifdef SDK + case 'j': + case 'J': + ++symflag; + break; + case 'Z': + oflag = 3; + break; +#endif /* SDK */ +#ifndef GAMEBOY + case 'z': + dflag = 1; + return(0); +#endif + case 'm': + case 'M': + ++mflag; + break; + + case 'u': + case 'U': + uflag = 1; + break; + + case 'x': + case 'X': + xflag = 0; + break; + + case 'q': + case 'Q': + xflag = 1; + break; + + case 'd': + case 'D': + xflag = 2; + break; + + case 'e': + case 'E': + return(1); + + case 'n': + case 'N': + pflag = 0; + break; + + case 'p': + case 'P': + pflag = 1; + break; + + case 'b': + case 'B': + bassav(); + return(0); + + case 'g': + case 'G': + gblsav(); + return(0); + + case 'k': + case 'K': + addpath(); + return(0); + + case 'l': + case 'L': + addlib(); + return(0); + default: + fprintf(stderr, "Invalid option\n"); + lkexit(1); + } + } + if (c == ';') + return(0); + } else if (ctype[c] & ILL) { + fprintf(stderr, "Invalid input"); + lkexit(1); + } else { + if (linkp == NULL) { + linkp = (struct lfile *) + new (sizeof (struct lfile)); + lfp = linkp; + } else { + lfp->f_flp = (struct lfile *) + new (sizeof (struct lfile)); + lfp = lfp->f_flp; + } + getfid(fid, c); + lfp->f_idp = (char *) new (strlen(fid)+1); + strcpy(lfp->f_idp, fid); + lfp->f_type = F_REL; + } + } + return(0); +} + +/*)Function VOID bassav() + * + * The function bassav() creates a linked structure containing + * the base address strings input to the linker. + * + * local variables: + * none + * + * global variables: + * base *basep The pointer to the first + * base structure + * base *bsp Pointer to the current + * base structure + * char *ip pointer into the REL file + * text line in ib[] + * + * functions called: + * char getnb() lklex.c + * VOID * new() lksym.c + * int strlen() c_library + * char * strcpy() c_library + * VOID unget() lklex.c + * + * side effects: + * The basep structure is created. + */ + +VOID +bassav() +{ + if (basep == NULL) { + basep = (struct base *) + new (sizeof (struct base)); + bsp = basep; + } else { + bsp->b_base = (struct base *) + new (sizeof (struct base)); + bsp = bsp->b_base; + } + unget(getnb()); + bsp->b_strp = (char *) new (strlen(ip)+1); + strcpy(bsp->b_strp, ip); +} + +/*)Function VOID setbas() + * + * The function setbas() scans the base address lines in the + * basep structure, evaluates the arguments, and sets beginning + * address of the specified areas. + * + * local variables: + * int v expression value + * char id[] base id string + * + * global variables: + * area *ap Pointer to the current + * area structure + * area *areap The pointer to the first + * area structure of a linked list + * base *basep The pointer to the first + * base structure + * base *bsp Pointer to the current + * base structure + * char *ip pointer into the REL file + * text line in ib[] + * int lkerr error flag + * + * functions called: + * Addr_T expr() lkeval.c + * int fprintf() c_library + * VOID getid() lklex.c + * char getnb() lklex.c + * int symeq() lksym.c + * + * side effects: + * The base address of an area is set. + */ + +VOID +setbas() +{ + register int v; + char id[NCPS]; + + bsp = basep; + while (bsp) { + ip = bsp->b_strp; + getid(id, -1); + if (getnb() == '=') { + v = expr(0); + for (ap = areap; ap != NULL; ap = ap->a_ap) { + if (symeq(id, ap->a_id)) + break; + } + if (ap == NULL) { +#ifndef SDK + fprintf(stderr, + "ASlink-Warning-No definition of area %s\n", id); + lkerr++; +#endif /* SDK */ + } else { + ap->a_addr = v; + } + } else { + fprintf(stderr, "ASlink-Warning-No '=' in base expression"); + lkerr++; + } + bsp = bsp->b_base; + } +} + +/*)Function VOID gblsav() + * + * The function gblsav() creates a linked structure containing + * the global variable strings input to the linker. + * + * local variable: + * none + * + * global variables: + * globl *globlp The pointer to the first + * globl structure + * globl *gsp Pointer to the current + * globl structure + * char *ip pointer into the REL file + * text line in ib[] + * int lkerr error flag + * + * functions called: + * char getnb() lklex.c + * VOID * new() lksym.c + * int strlen() c_library + * char * strcpy() c_library + * VOID unget() lklex.c + * + * side effects: + * The globlp structure is created. + */ + +VOID +gblsav() +{ + if (globlp == NULL) { + globlp = (struct globl *) + new (sizeof (struct globl)); + gsp = globlp; + } else { + gsp->g_globl = (struct globl *) + new (sizeof (struct globl)); + gsp = gsp->g_globl; + } + unget(getnb()); + gsp->g_strp = (char *) new (strlen(ip)+1); + strcpy(gsp->g_strp, ip); +} + +/*)Function VOID setgbl() + * + * The function setgbl() scans the global variable lines in the + * globlp structure, evaluates the arguments, and sets a variable + * to this value. + * + * local variables: + * int v expression value + * char id[] base id string + * sym * sp pointer to a symbol structure + * + * global variables: + * char *ip pointer into the REL file + * text line in ib[] + * globl *globlp The pointer to the first + * globl structure + * globl *gsp Pointer to the current + * globl structure + * FILE * stderr c_library + * int lkerr error flag + * + * functions called: + * Addr_T expr() lkeval.c + * int fprintf() c_library + * VOID getid() lklex.c + * char getnb() lklex.c + * sym * lkpsym() lksym.c + * + * side effects: + * The value of a variable is set. + */ + +VOID +setgbl() +{ + register int v; + register struct sym *sp; + char id[NCPS]; + + gsp = globlp; + while (gsp) { + ip = gsp->g_strp; + getid(id, -1); + if (getnb() == '=') { + v = expr(0); + sp = lkpsym(id, 0); + if (sp == NULL) { +#ifndef SDK + fprintf(stderr, + "No definition of symbol %s\n", id); + lkerr++; +#endif /* SDK */ + } else { +#ifndef SDK + if (sp->s_flag & S_DEF) { + fprintf(stderr, + "Redefinition of symbol %s\n", id); + lkerr++; + sp->s_axp = NULL; + } +#endif /* SDK */ + sp->s_addr = v; + sp->s_type |= S_DEF; + } + } else { + fprintf(stderr, "No '=' in global expression"); + lkerr++; + } + gsp = gsp->g_globl; + } +} + +/*)Function FILE * afile(fn,, ft, wf) + * + * char * fn file specification string + * char * ft file type string + * int wf read(0)/write(1) flag + * + * The function afile() opens a file for reading or writing. + * (1) If the file type specification string ft + * is not NULL then a file specification is + * constructed with the file path\name in fn + * and the extension in ft. + * (2) If the file type specification string ft + * is NULL then the file specification is + * constructed from fn. If fn does not have + * a file type then the default .rel file + * type is appended to the file specification. + * + * afile() returns a file handle for the opened file or aborts + * the assembler on an open error. + * + * local variables: + * int c character value + * char fb[] constructed file specification string + * FILE * fp filehandle for opened file + * char * p1 pointer to filespec string fn + * char * p2 pointer to filespec string fb + * char * p3 pointer to filetype string ft + * + * global variables: + * int lkerr error flag + * + * functions called: + * FILE * fopen() c_library + * int fprintf() c_library + * + * side effects: + * File is opened for read or write. + */ + +FILE * +afile(char *fn, char *ft, int wf) +{ +#if 0 + register char *p1, *p2, *p3; + register int c; +#else + int i; +#endif + FILE *fp; + char fb[PATH_MAX]; + +#if 0 + p1 = fn; + p2 = fb; + p3 = ft; + while ((c = *p1++) != 0 && c != FSEPX) { + if (p2 < &fb[PATH_MAX-4]) + *p2++ = c; + } + *p2++ = FSEPX; + if (*p3 == 0) { + if (c == FSEPX) { + p3 = p1; + } else { +#ifdef SDK + p3 = "rel"; +#else /* SDK */ + p3 = "REL"; +#endif /* SDK */ + } + } + while ((c = *p3++) != 0) { + if (p2 < &fb[FILSPC-1]) + *p2++ = c; + } + *p2++ = 0; +#else + /*Look backward the name path and get rid of the extension, if any*/ + i=strlen(fn); + for(; (fn[i]!='.')&&(fn[i]!='\\')&&(fn[i]!='/')&&(i>0); i--); + if( (fn[i]=='.') && *ft && strcmp(ft, "lnk") ) + { + strncpy(fb, fn, i); + fb[i]=0; + } + else + { + strcpy(fb, fn); + } + + /*Add the extension*/ + if (fb[i] != '.') + { + strcat(fb, "."); +#ifdef SDK + strcat(fb, strlen(ft)?ft:"rel"); +#else + strcat(fb, strlen(ft)?ft:"REL"); +#endif + } +#endif + +#ifdef SDK + if ((fp = fopen(fb, wf?(binary?"wb":"w"):(binary?"rb":"r"))) == NULL) { +#else /* SDK */ + if ((fp = fopen(fb, wf?"w":"r")) == NULL) { +#endif /* SDK */ + if (strcmp(ft,"adb"))/*Do not complaint for optional adb files*/ + { + fprintf(stderr, "%s: cannot %s.\n", fb, wf?"create":"open"); + lkerr++; + } + } + return (fp); +} + +char *usetxt[] = { +#ifdef SDK + "Distributed with SDK " SDK_VERSION_STRING ", built on " __DATE__ " " __TIME__, + "Compile options: SDK Target " TARGET_STRING +#ifdef INDEXLIB + " INDEXLIB" +#endif + "\n", +#endif + "Startup:", + " -c Command line input", + " -f file[LNK] File input", + " -p Prompt and echo of file[LNK] to stdout (default)", + " -n No echo of file[LNK] to stdout", +#if 0 +#ifdef SDK + "Usage: [-Options] outfile file [file ...]", +#else /* SDK */ + "Usage: [-Options] file [file ...]", +#endif /* SDK */ +#endif + "Libraries:", + " -k Library path specification, one per -k", + " -l Library file specification, one per -l", + "Relocation:", + " -b area base address = expression", + " -g global symbol = expression", +#ifdef GAMEBOY + " -yo Number of rom banks (default: 2)", + " -ya Number of ram banks (default: 0)", + " -yt MBC type (default: no MBC)", + " -yn Name of program (default: name of output file)", + " -yp# Patch one byte in the output GB file (# is: addr=byte)", +#endif /* GAMEBOY */ + "Map format:", + " -m Map output generated as file[MAP]", +#ifdef SDK + " -j no$gmb symbol file generated as file[SYM]", +#endif /* SDK */ + " -x Hexadecimal (default), -d Decimal, -q Octal", + "Output:", + " -i Intel Hex as file[IHX]", + " -s Motorola S19 as file[S19]", +#ifndef GAMEBOY + " -z Produce SDCdb debug as file[cdb]", +#endif +#ifdef SDK +#ifdef GAMEGEAR + " -Z Gamegear image as file[GG]", +#else + " -Z Gameboy image as file[GB]", +#endif /* GAMEGEAR */ +#endif /* SDK */ + "List:", + " -u Update listing file(s) with link data as file(s)[.RST]", + "End:", + " -e or null line terminates input", + "", + 0 +}; + +/*)Function VOID usage() + * + * The function usage() outputs to the stderr device the + * assembler name and version and a list of valid assembler options. + * + * local variables: + * char ** dp pointer to an array of + * text string pointers. + * + * global variables: + * FILE * stderr c_library + * + * functions called: + * int fprintf() c_library + * + * side effects: + * none + */ + +VOID +usage() +{ + register char **dp; + + fprintf(stderr, "\nASxxxx Linker %s\n\n", VERSION); + for (dp = usetxt; *dp; dp++) + fprintf(stderr, "%s\n", *dp); + lkexit(1); +} + +/*)Function VOID copyfile() + * + * FILE *dest destination file + * FILE *src source file + * + * function will copy source file to destination file + * + * + * functions called: + * int fgetc() c_library + * int fputc() c_library + * + * side effects: + * none + */ +VOID copyfile (dest,src) +FILE *src,*dest ; +{ + int ch; + + while ((ch = fgetc(src)) != EOF) { + fputc(ch,dest); + } +} diff --git a/as/link/z80/lkrloc.c b/as/link/z80/lkrloc.c new file mode 100644 index 0000000..063793d --- /dev/null +++ b/as/link/z80/lkrloc.c @@ -0,0 +1,1142 @@ +/* lkrloc.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * Extensions: P. Felber + */ + +#include +#include +#include +#include +#include "aslink.h" + +/*)Module lkrloc.c + * + * The module lkrloc.c contains the functions which + * perform the relocation calculations. + * + * lkrloc.c contains the following functions: + * Addr_T adb_b() + * Addr_T adb_lo() + * Addr_T adb_hi() + * Addr_T adw_w() + * Addr_T adw_lo() + * Addr_T adw_hi() + * VOID erpdmp() + * VOID errdmp() + * Addr_T evword() + * VOID prntval() + * VOID rele() + * VOID relerr() + * VOID relerp() + * VOID reloc() + * VOID relp() + * VOID relr() + * VOID relt() + * + * lkrloc.c the local variable errmsg[]. + * + */ + +/*)Function VOID reloc(c) + * + * char c process code + * + * The function reloc() calls a particular relocation + * function determined by the process code. + * + * local variable: + * none + * + * global variables: + * int lkerr error flag + * + * called functions: + * int fprintf() c_library + * VOID rele() lkrloc.c + * VOID relp() lkrloc.c + * VOID relr() lkrloc.c + * VOId relt() lkrloc.c + * + * side effects: + * Refer to the called relocation functions. + * + */ + +VOID reloc(char c) +{ + switch(c) { + + case 'T': + relt(); + break; + + case 'R': + relr(); + break; + + case 'P': + relp(); + break; + + case 'E': + rele(); + break; + + default: + fprintf(stderr, "Undefined Relocation Operation\n"); + lkerr++; + break; + + } +} + + +/*)Function VOID relt() + * + * The function relt() evaluates a T line read by + * the linker. Each byte value read is saved in the + * rtval[] array, rtflg[] is set, and the number of + * evaluations is maintained in rtcnt. + * + * T Line + * + * T xx xx nn nn nn nn nn ... + * + * + * In: "T n0 n1 n2 n3 ... nn" + * + * Out: 0 1 2 .. rtcnt + * +----+----+----+----+----+ + * rtval | n0 | n1 | n2 | .. | nn | + * +----+----+----+----+----+ + * rtflag| 1 | 1 | 1 | 1 | 1 | + * +----+----+----+----+----+ + * + * The T line contains the assembled code output by the assem- + * bler with xx xx being the offset address from the current area + * base address and nn being the assembled instructions and data in + * byte format. + * + * local variable: + * none + * + * global variables: + * int rtcnt number of values evaluated + * int rtflg[] array of evaluation flags + * int rtval[] array of evaluation values + * + * called functions: + * int eval() lkeval.c + * int more() lklex.c + * + * side effects: + * Linker input T line evaluated. + * + */ + +VOID relt(VOID) +{ + rtcnt = 0; + while (more()) { + if (rtcnt < NTXT) { + rtval[rtcnt] = eval(); + rtflg[rtcnt] = 1; + rtcnt++; + } + } +} + +/*)Function VOID relr() + * + * The function relr() evaluates a R line read by + * the linker. The R line data is combined with the + * previous T line data to perform the relocation of + * code and data bytes. The S19 / IHX output and + * translation of the LST files to RST files may be + * performed. + * + * R Line + * + * R 0 0 nn nn n1 n2 xx xx ... + * + * The R line provides the relocation information to the linker. + * The nn nn value is the current area index, i.e. which area the + * current values were assembled. Relocation information is en- + * coded in groups of 4 bytes: + * + * 1. n1 is the relocation mode and object format + * 1. bit 0 word(0x00)/byte(0x01) + * 2. bit 1 relocatable area(0x00)/symbol(0x02) + * 3. bit 2 normal(0x00)/PC relative(0x04) relocation + * 4. bit 3 1-byte(0x00)/2-byte(0x08) object format for + * byte data + * 5. bit 4 signed(0x00)/unsigned(0x10) byte data + * 6. bit 5 normal(0x00)/page '0'(0x20) reference + * 7. bit 6 normal(0x00)/page 'nnn'(0x40) reference + * + * 2. n2 is a byte index into the corresponding (i.e. pre- + * ceeding) T line data (i.e. a pointer to the data to be + * updated by the relocation). The T line data may be + * 1-byte or 2-byte byte data format or 2-byte word + * format. + * + * 3. xx xx is the area/symbol index for the area/symbol be- + * ing referenced. the corresponding area/symbol is found + * in the header area/symbol lists. + * + * The groups of 4 bytes are repeated for each item requiring relo- + * cation in the preceeding T line. + * + * local variable: + * areax **a pointer to array of area pointers + * int aindex area index + * char *errmsg[] array of pointers to error strings + * int error error code + * int lkerr error flag + * int mode relocation mode + * adrr_t paga paging base area address + * Addr_T pags paging symbol address + * Addr_T pc relocated base address + * Addr_T r PCR relocation value + * Addr_T reli relocation initial value + * Addr_T relv relocation final value + * int rindex symbol / area index + * Addr_T rtbase base code address + * Addr_T rtofst rtval[] index offset + * int rtp index into T data + * sym **s pointer to array of symbol pointers + * + * global variables: + * head *hp pointer to the head structure + * rerr rerr linker error structure + * FILE *stderr standard error device + * + * called functions: + * Addr_T adb_b() lkrloc.c + * Addr_T adb_lo() lkrloc.c + * Addr_T adb_hi() lkrloc.c + * Addr_T adw_w() lkrloc.c + * Addr_T evword() lkrloc.c + * int eval() lkeval.c + * int fprintf() c_library + * VOID ihx() lkihx.c + * int lkulist lklist.c + * int more() lklex.c + * VOID relerr() lkrloc.c + * VOID s19() lks19.c + * int symval() lksym.c + * + * side effects: + * The R and T lines are combined to produce + * relocated code and data. Output S19 / IHX + * and relocated listing files may be produced. + * + */ + +VOID relr(VOID) +{ + register int mode; + register Addr_T reli, relv; + int aindex, rindex, rtp, error; + Addr_T r, rtbase, rtofst, paga = 0, pags = 0, pc; + struct areax **a; + struct sym **s; + + /* + * Get area and symbol lists + */ + a = hp->a_list; + s = hp->s_list; + + /* + * Verify Area Mode + */ + if (eval() != (R_WORD | R_AREA) || eval()) { + fprintf(stderr, "R input error\n"); + lkerr++; + } + + /* + * Get area pointer + */ + aindex = evword(); + if (aindex >= hp->h_narea) { + fprintf(stderr, "R area error\n"); + lkerr++; + return; + } + + /* + * Base values + */ + rtbase = adw_w(0, 0); + rtofst = 2; + + /* + * Relocate address + */ + pc = adw_w(a[aindex]->a_addr, 0); + +#ifdef GAMEBOY + { + char *s = strrchr(a[aindex]->a_bap->a_id, '_'); + if(s != NULL && isdigit((unsigned char)s[1])) + current_rom_bank = atoi(s+1); + else + current_rom_bank = 0; + } +#endif /* GAMEBOY */ + /* + * Do remaining relocations + */ + while (more()) { + error = 0; + mode = eval(); + rtp = eval(); + rindex = evword(); + + /* + * R_SYM or R_AREA references + */ + if (mode & R_SYM) { + if (rindex >= hp->h_nglob) { + fprintf(stderr, "R symbol error\n"); + lkerr++; + return; + } + reli = symval(s[rindex]); + } else { + if (rindex >= hp->h_narea) { + fprintf(stderr, "R area error\n"); + lkerr++; + return; + } + reli = a[rindex]->a_addr; + } + + /* + * R_PCR addressing + */ + if (mode & R_PCR) { + if (mode & R_BYTE) { + reli -= (pc + (rtp-rtofst) + 1); + } else { + reli -= (pc + (rtp-rtofst) + 2); + } + } + + /* + * R_PAG0 or R_PAG addressing + */ + if (mode & (R_PAG0 | R_PAG)) { + paga = sdp.s_area->a_addr; + pags = sdp.s_addr; + reli -= paga + pags; + } + + /* + * R_BYTE or R_WORD operation + */ + if (mode & R_BYTE) { + if (mode & R_BYT2) { + /* This is a two byte address, of + * which we will select one byte. + */ + if (mode & R_MSB) { + relv = adb_hi(reli, rtp); + } else { + relv = adb_lo(reli, rtp); + } + } else { + relv = adb_b(reli, rtp); + } + } else { + /* + * R_WORD with the R_BYT2 mode is flagged + * as an 'r' error by the assembler, + * but it is processed here anyway. + */ + if (mode & R_BYT2) { + if (mode & R_MSB) { + relv = adw_hi(reli, rtp); + } else { + relv = adw_lo(reli, rtp); + } + } else { + relv = adw_w(reli, rtp); + } + } + + /* + * R_BYTE with R_BYT2 offset adjust + */ + if (mode & R_BYTE) { + if (mode & R_BYT2) { + rtofst += 1; + } + } + + /* + * Unsigned Byte Checking + */ + if (mode & R_USGN && mode & R_BYTE && relv & ~0xFF) + error = 1; + + /* + * PCR Relocation Error Checking + */ + if (mode & R_PCR && mode & R_BYTE) { + r = relv & ~0x7F; + if (r != (Addr_T) ~0x7F && r != 0) + error = 2; + } + + /* + * Page Relocation Error Checking + */ + if (mode & R_PAG0 && (relv & ~0xFF || paga || pags)) + error = 3; + if (mode & R_PAG && (relv & ~0xFF)) + error = 4; + + /* + * Error Processing + */ + if (error) { + rerr.aindex = aindex; + rerr.mode = mode; + rerr.rtbase = rtbase + rtp - rtofst - 1; + rerr.rindex = rindex; + rerr.rval = relv - reli; + relerr(errmsg[error-1]); + } + } + if (uflag != 0) { + lkulist(1); + } + if (oflag == 1) { + ihx(1); + } else + if (oflag == 2) { + s19(1); +#ifdef SDK + } else + if (oflag == 3) { +#ifdef GAMEGEAR + gg(1); +#endif /* GAMEGEAR */ +#ifdef GAMEBOY + gb(1); +#endif /* GAMEBOY */ +#endif /* SDK */ + } +} + +char *errmsg[] = { + "Unsigned Byte error", + "Byte PCR relocation error", + "Page0 relocation error", + "Page Mode relocation error" +}; + + +/*)Function VOID relp() + * + * The function relp() evaluates a P line read by + * the linker. The P line data is combined with the + * previous T line data to set the base page address + * and test the paging boundary and length. + * + * P Line + * + * P 0 0 nn nn n1 n2 xx xx + * + * The P line provides the paging information to the linker as + * specified by a .setdp directive. The format of the relocation + * information is identical to that of the R line. The correspond- + * ing T line has the following information: + * T xx xx aa aa bb bb + * + * Where aa aa is the area reference number which specifies the + * selected page area and bb bb is the base address of the page. + * bb bb will require relocation processing if the 'n1 n2 xx xx' is + * specified in the P line. The linker will verify that the base + * address is on a 256 byte boundary and that the page length of an + * area defined with the PAG type is not larger than 256 bytes. + * + * local variable: + * areax **a pointer to array of area pointers + * int aindex area index + * int mode relocation mode + * Addr_T relv relocation value + * int rindex symbol / area index + * int rtp index into T data + * sym **s pointer to array of symbol pointers + * + * global variables: + * head *hp pointer to the head structure + * int lkerr error flag + * sdp sdp base page structure + * FILE *stderr standard error device + * + * called functions: + * Addr_T adw_w() lkrloc.c + * Addr_T evword() lkrloc.c + * int eval() lkeval.c + * int fprintf() c_library + * int more() lklex.c + * int symval() lksym.c + * + * side effects: + * The P and T lines are combined to set + * the base page address and report any + * paging errors. + * + */ + +VOID relp(VOID) +{ + register int aindex, rindex; + int mode, rtp; + Addr_T relv; + struct areax **a; + struct sym **s; + + /* + * Get area and symbol lists + */ + a = hp->a_list; + s = hp->s_list; + + /* + * Verify Area Mode + */ + if (eval() != (R_WORD | R_AREA) || eval()) { + fprintf(stderr, "P input error\n"); + lkerr++; + } + + /* + * Get area pointer + */ + aindex = evword(); + if (aindex >= hp->h_narea) { + fprintf(stderr, "P area error\n"); + lkerr++; + return; + } + + /* + * Do remaining relocations + */ + while (more()) { + mode = eval(); + rtp = eval(); + rindex = evword(); + + /* + * R_SYM or R_AREA references + */ + if (mode & R_SYM) { + if (rindex >= hp->h_nglob) { + fprintf(stderr, "P symbol error\n"); + lkerr++; + return; + } + relv = symval(s[rindex]); + } else { + if (rindex >= hp->h_narea) { + fprintf(stderr, "P area error\n"); + lkerr++; + return; + } + relv = a[rindex]->a_addr; + } + adw_w(relv, rtp); + } + + /* + * Paged values + */ + aindex = adw_w(0,2); + if (aindex >= hp->h_narea) { + fprintf(stderr, "P area error\n"); + lkerr++; + return; + } + sdp.s_areax = a[aindex]; + sdp.s_area = sdp.s_areax->a_bap; + sdp.s_addr = adw_w(0,4); + if (sdp.s_area->a_addr & 0xFF || sdp.s_addr & 0xFF) + relerp("Page Definition Boundary Error"); +} + +/*)Function VOID rele() + * + * The function rele() closes all open output files + * at the end of the linking process. + * + * local variable: + * none + * + * global variables: + * int oflag output type flag + * int uflag relocation listing flag + * + * called functions: + * VOID ihx() lkihx.c + * VOID lkulist() lklist.c + * VOID s19() lks19.c + * + * side effects: + * All open output files are closed. + * + */ + +VOID rele(VOID) +{ + if (uflag != 0) { + lkulist(0); + } + if (oflag == 1) { + ihx(0); + } else + if (oflag == 2) { + s19(0); +#ifdef SDK + } else + if (oflag == 3) { +#ifdef GAMEGEAR + gg(0); +#endif /* GAMEGEAR */ +#ifdef GAMEBOY + gb(0); +#endif /* GAMEBOY */ +#endif /* SDK */ + } +} + +/*)Function Addr_T evword() + * + * The function evword() combines two byte values + * into a single word value. + * + * local variable: + * Addr_T v temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * int eval() lkeval.c + * + * side effects: + * Relocation text line is scanned to combine + * two byte values into a single word value. + * + */ + +Addr_T evword(VOID) +{ + register Addr_T v; + + if (hilo) { + v = (eval() << 8); + v += eval(); + } else { + v = eval(); + v += (eval() << 8); + } + return(v); +} + +/*)Function Addr_T adb_b(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_b() adds the value of v to + * the single byte value contained in rtval[i]. + * The new value of rtval[i] is returned. + * + * local variable: + * none + * + * global variables: + * none + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * + */ + +Addr_T adb_b(register Addr_T v, register int i) +{ + return(rtval[i] += v); +} + +/*)Function Addr_T adb_lo(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_lo() adds the value of v to the + * double byte value contained in rtval[i] and rtval[i+1]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The MSB rtflg[] is cleared. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The rtflg[] value corresponding to the + * MSB of the word value is cleared to reflect + * the fact that the LSB is the selected byte. + * + */ + +Addr_T adb_lo(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_w(v, i); + /* + * Remove Hi byte + */ + if (hilo) { + rtflg[i] = 0; + } else { + rtflg[i+1] = 0; + } + return (j); +} + +/*)Function Addr_T adb_hi(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adb_hi() adds the value of v to the + * double byte value contained in rtval[i] and rtval[i+1]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The LSB rtflg[] is cleared. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The rtflg[] value corresponding to the + * LSB of the word value is cleared to reflect + * the fact that the MSB is the selected byte. + * + */ + +Addr_T adb_hi(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_w(v, i); + /* + * Remove Lo byte + */ + if (hilo) { + rtflg[i+1] = 0; + } else { + rtflg[i] = 0; + } + return (j); +} + +/*)Function Addr_T adw_w(v, i) + * + * int v value to add to word + * int i rtval[] index + * + * The function adw_w() adds the value of v to the + * word value contained in rtval[i] and rtval[i+1]. + * The new value of rtval[i] / rtval[i+1] is returned. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The word value of rtval[] is changed. + * + */ + +Addr_T adw_w(register Addr_T v, register int i) +{ + register Addr_T j; + + if (hilo) { + j = v + (rtval[i] << 8) + (rtval[i+1] & 0xff); + rtval[i] = (j >> 8) & 0xff; + rtval[i+1] = j & 0xff; + } else { + j = v + (rtval[i] & 0xff) + (rtval[i+1] << 8); + rtval[i] = j & 0xff; + rtval[i+1] = (j >> 8) & 0xff; + } + return(j); +} + +/*)Function Addr_T adw_lo(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adw_lo() adds the value of v to the + * double byte value contained in rtval[i] and rtval[i+1]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The MSB rtval[] is zeroed. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The MSB of the word value is cleared to reflect + * the fact that the LSB is the selected byte. + * + */ + +Addr_T adw_lo(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_w(v, i); + /* + * Clear Hi byte + */ + if (hilo) { + rtval[i] = 0; + } else { + rtval[i+1] = 0; + } + return (j); +} + +/*)Function Addr_T adw_hi(v, i) + * + * int v value to add to byte + * int i rtval[] index + * + * The function adw_hi() adds the value of v to the + * double byte value contained in rtval[i] and rtval[i+1]. + * The new value of rtval[i] / rtval[i+1] is returned. + * The MSB and LSB values are interchanged. + * The MSB rtval[] is zeroed. + * + * local variable: + * Addr_T j temporary evaluation variable + * + * global variables: + * hilo byte ordering parameter + * + * called functions: + * none + * + * side effects: + * The value of rtval[] is changed. + * The MSB and LSB values are interchanged and + * then the MSB cleared. + * + */ + +Addr_T adw_hi(Addr_T v, int i) +{ + register Addr_T j; + + j = adw_w(v, i); + /* + * LSB = MSB, Clear MSB + */ + if (hilo) { + rtval[i+1] = rtval[i]; + rtval[i] = 0; + } else { + rtval[i] = rtval[i+1]; + rtval[i+1] = 0; + } + return (j); +} + +/*)Function VOID relerr(str) + * + * char *str error string + * + * The function relerr() outputs the error string to + * stderr and to the map file (if it is open). + * + * local variable: + * none + * + * global variables: + * FILE *mfp handle for the map file + * + * called functions: + * VOID errdmp() lkrloc.c + * + * side effects: + * Error message inserted into map file. + * + */ + +VOID relerr(char *str) +{ + errdmp(stderr, str); + if (mfp) + errdmp(mfp, str); +} + +/*)Function VOID errdmp(fptr, str) + * + * FILE *fptr output file handle + * char *str error string + * + * The function errdmp() outputs the error string str + * to the device specified by fptr. Additional information + * is output about the definition and referencing of + * the symbol / area error. + * + * local variable: + * int mode error mode + * int aindex area index + * int lkerr error flag + * int rindex error index + * sym **s pointer to array of symbol pointers + * areax **a pointer to array of area pointers + * areax *raxp error area extension pointer + * + * global variables: + * sdp sdp base page structure + * + * called functions: + * int fprintf() c_library + * VOID prntval() lkrloc.c + * + * side effects: + * Error reported. + * + */ + +VOID errdmp(FILE *fptr, char *str) +{ + int mode, aindex, rindex; + struct sym **s; + struct areax **a; + struct areax *raxp; + + a = hp->a_list; + s = hp->s_list; + + mode = rerr.mode; + aindex = rerr.aindex; + rindex = rerr.rindex; + + /* + * Print Error + */ + fprintf(fptr, "\n?ASlink-Warning-%s", str); + lkerr++; + + /* + * Print symbol if symbol based + */ + if (mode & R_SYM) { + fprintf(fptr, " for symbol %.*s\n", + NCPS, &s[rindex]->s_id[0]); + } else { + fprintf(fptr, "\n"); + } + + /* + * Print Ref Info + */ + fprintf(fptr, + " file module area offset\n"); + fprintf(fptr, + " Refby %-8.8s %-8.8s %-8.8s ", + hp->h_lfile->f_idp, + &hp->m_id[0], + &a[aindex]->a_bap->a_id[0]); + prntval(fptr, rerr.rtbase); + + /* + * Print Def Info + */ + if (mode & R_SYM) { + raxp = s[rindex]->s_axp; + } else { + raxp = a[rindex]; + } + fprintf(fptr, + " Defin %-8.8s %-8.8s %-8.8s ", + raxp->a_bhp->h_lfile->f_idp, + &raxp->a_bhp->m_id[0], + &raxp->a_bap->a_id[0]); + if (mode & R_SYM) { + prntval(fptr, s[rindex]->s_addr); + } else { + prntval(fptr, rerr.rval); + } +} + +/*)Function VOID prntval(fptr, v) + * + * FILE *fptr output file handle + * Addr_T v value to output + * + * The function prntval() outputs the value v, in the + * currently selected radix, to the device specified + * by fptr. + * + * local variable: + * none + * + * global variables: + * int xflag current radix + * + * called functions: + * int fprintf() c_library + * + * side effects: + * none + * + */ + +VOID prntval(FILE *fptr, Addr_T v) +{ + if (xflag == 0) { + fprintf(fptr, "%04X\n", v); + } else + if (xflag == 1) { + fprintf(fptr, "%06o\n", v); + } else + if (xflag == 2) { + fprintf(fptr, "%05u\n", v); + } +} + +/*)Function VOID relerp(str) + * + * char *str error string + * + * The function relerp() outputs the paging error string to + * stderr and to the map file (if it is open). + * + * local variable: + * none + * + * global variables: + * FILE *mfp handle for the map file + * + * called functions: + * VOID erpdmp() lkrloc.c + * + * side effects: + * Error message inserted into map file. + * + */ + +VOID relerp(char *str) +{ + erpdmp(stderr, str); + if (mfp) + erpdmp(mfp, str); +} + +/*)Function VOID erpdmp(fptr, str) + * + * FILE *fptr output file handle + * char *str error string + * + * The function erpdmp() outputs the error string str + * to the device specified by fptr. + * + * local variable: + * head *thp pointer to head structure + * + * global variables: + * int lkerr error flag + * sdp sdp base page structure + * + * called functions: + * int fprintf() c_library + * VOID prntval() lkrloc.c + * + * side effects: + * Error reported. + * + */ + +VOID erpdmp(FILE *fptr, char *str) +{ + register struct head *thp; + + thp = sdp.s_areax->a_bhp; + + /* + * Print Error + */ + fprintf(fptr, "\n?ASlink-Warning-%s\n", str); + lkerr++; + + /* + * Print PgDef Info + */ + fprintf(fptr, + " file module pgarea pgoffset\n"); + fprintf(fptr, + " PgDef %-8.8s %-8.8s %-8.8s ", + thp->h_lfile->f_idp, + &thp->m_id[0], + &sdp.s_area->a_id[0]); + prntval(fptr, sdp.s_area->a_addr + sdp.s_addr); +} diff --git a/as/link/z80/lks19.c b/as/link/z80/lks19.c new file mode 100644 index 0000000..e4a297f --- /dev/null +++ b/as/link/z80/lks19.c @@ -0,0 +1,129 @@ +/* lks19.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include "aslink.h" + +/*)Module lks19.c + * + * The module lks19.c contains the function to + * output the relocated object code in the + * Motorola S19 format. + * + * lks19.c contains the following function: + * VOID s19(i) + * + * lks19.c contains no local variables. + */ + +/*)S19 Format + * Record Type Field - This field signifies the start of a + * record and identifies the the record + * type as follows: + * + * Ascii S1 - Data Record + * Ascii S9 - End of File Record + * + * Record Length Field - This field specifies the record length + * which includes the address, data, and + * checksum fields. The 8 bit record + * length value is converted to two ascii + * characters, high digit first. + * + * Load Address Field - This field consists of the four ascii + * characters which result from converting + * the the binary value of the address in + * which to begin loading this record. The + * order is as follows: + * + * High digit of high byte of address. + * Low digit of high byte of address. + * High digit of low byte of address. + * Low digit of low byte of address. + * + * In an End of File record this field con- + * sists of either four ascii zeros or the + * program entry address. Currently the + * entry address option is not supported. + * + * Data Field - This field consists of the actual data, + * converted to two ascii characters, high + * digit first. There are no data bytes in + * the End of File record. + * + * Checksum Field - The checksum field is the 8 bit binary + * sum of the record length field, the load + * address field, and the data field. This + * sum is then complemented (1's comple- + * ment) and converted to two ascii + * characters, high digit first. + */ + +/*)Function s19(i) + * + * int i 0 - process data + * 1 - end of data + * + * The function s19() outputs the relocated data + * in the standard Motorola S19 format. + * + * local variables: + * Addr_T chksum byte checksum + * + * global variables: + * int hilo byte order + * FILE * ofp output file handle + * int rtcnt count of data words + * int rtflg[] output the data flag + * Addr_T rtval[] relocated data + * + * functions called: + * int fprintf() c_library + * + * side effects: + * The data is output to the file defined by ofp. + */ + +VOID +s19(i) +{ + register Addr_T chksum; + + if (i) { + if (hilo == 0) { + chksum = rtval[0]; + rtval[0] = rtval[1]; + rtval[1] = chksum; + } + for (i = 0, chksum = 1; i < rtcnt; i++) { + if (rtflg[i]) + chksum++; + } + fprintf(ofp, "S1%02X", chksum); + for (i = 0; i < rtcnt ; i++) { + if (rtflg[i]) { + fprintf(ofp, "%02X", rtval[i]); + chksum += rtval[i]; + } + } + fprintf(ofp, "%02X\n", (0-chksum-1) & 0xff); + } else { + fprintf(ofp, "S9030000FC\n"); + } +} diff --git a/as/mcs51/Makefile.asx8051 b/as/mcs51/Makefile.asx8051 new file mode 100644 index 0000000..dc5103a --- /dev/null +++ b/as/mcs51/Makefile.asx8051 @@ -0,0 +1,59 @@ +CC=gcc +LEX=flex +YACC=bison +INCROOT=. +CFLAGS=-ggdb -O2 -I $(INCROOT) +TARGETS=$(SDCCDIR)/bin/asx8051 +ALLOBJECTS= asmain.o aslex.o assym.o assubr.o asnoice.o \ + asexpr.o asdata.o aslist.o asout.o \ + i51ext.o i51pst.o i51mch.o i51adr.o strcmpi.o + +all:: $(TARGETS) + +clean:: + rm -f $(TARGETS) $(ALLOBJECTS) + +asmain.o : asmain.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o asmain.o asmain.c + +aslex.o : aslex.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o aslex.o aslex.c + +assym.o : assym.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o assym.o assym.c + +assubr.o : assubr.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o assubr.o assubr.c + +asexpr.o : asexpr.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o asexpr.o asexpr.c + +asdata.o : asdata.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o asdata.o asdata.c + +aslist.o : aslist.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o aslist.o aslist.c + +asout.o : asout.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o asout.o asout.c + +asnoice.o : asnoice.c asm.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o asnoice.o asnoice.c + +i51ext.o : i51ext.c asm.h i8051.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o i51ext.o i51ext.c + +i51pst.o : i51pst.c asm.h i8051.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o i51pst.o i51pst.c + +i51mch.o : i51mch.c asm.h i8051.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o i51mch.o i51mch.c + +i51adr.o : i51adr.c asm.h i8051.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o i51adr.o i51adr.c + +strcmpi.o : strcmpi.c strcmpi.h + $(CC) $(CFLAGS) $(LDFLAGS) -c -o strcmpi.o strcmpi.c + +$(TARGETS): $(ALLOBJECTS) + $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $(ALLOBJECTS) diff --git a/as/mcs51/Makefile.bcc b/as/mcs51/Makefile.bcc new file mode 100644 index 0000000..cc7d98b --- /dev/null +++ b/as/mcs51/Makefile.bcc @@ -0,0 +1,19 @@ +# Makefile for Borland C++ + +PRJDIR = ../.. + +!include $(PRJDIR)/Bcc.inc + +ASOBJECTS = asmain.obj aslex.obj assubr.obj \ + asexpr.obj asdata.obj aslist.obj asout.obj \ + i51ext.obj i51pst.obj i51mch.obj i51adr.obj \ + ../asxxsrc/strcmpi.obj ../asxxsrc/assym.obj \ + ../asxxsrc/asnoice.obj \ + ../../support/Util/dbuf.obj ../../support/Util/dbuf_string.obj + +ASX8051 = $(PRJDIR)/bin/asx8051.exe + +all: $(ASX8051) + +$(ASX8051): $(ASOBJECTS) + $(CC) $(CFLAGS) -e$@ $(ASOBJECTS) diff --git a/as/mcs51/Makefile.in b/as/mcs51/Makefile.in new file mode 100644 index 0000000..3cd5b2f --- /dev/null +++ b/as/mcs51/Makefile.in @@ -0,0 +1,136 @@ +# +# +# + +VERSION = @VERSION@ +VERSIONHI = @VERSIONHI@ +VERSIONLO = @VERSIONLO@ +VERSIONP = @VERSIONP@ + +SHELL = /bin/sh +CC = @CC@ +CPP = @CPP@ +INSTALL = @INSTALL@ +STRIP = @STRIP@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +srcdir = @srcdir@ +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @info@ + +EXEEXT = @EXEEXT@ + +VPATH = @srcdir@ + +CPPFLAGS = @CPPFLAGS@ -I. -I$(srcdir) +CFLAGS = @CFLAGS@ -Wall -DINDEXLIB -I. -I$(srcdir) -I$(srcdir)/../../support/Util +M_OR_MM = @M_OR_MM@ +LDFLAGS = @LDFLAGS@ + +OBJDIR = obj + +UTILLIB = $(srcdir)/../../support/Util +UTILSRC = dbuf.c dbuf_string.c +UTILLIBOBJS = $(UTILSRC:%.c=$(OBJDIR)/%.o) + +ASXXLIB = $(srcdir)/../asxxsrc +ASXXLIBSRC = strcmpi.c assym.c aslex.c asnoice.c +ASXXLIBOBJS = $(ASXXLIBSRC:%.c=$(OBJDIR)/%.o) + +SRC = asmain.c assubr.c \ + asexpr.c asdata.c aslist.c asout.c \ + i51ext.c i51pst.c i51mch.c i51adr.c +OBJS = $(SRC:%.c=$(OBJDIR)/%.o) + +ASSOURCES = $(SRC) $(ASXXLIBSRC:%.c=$(ASXXLIB)/%.c) $(UTILSRC:%.c=$(UTILLIB)/%.c) + +ASOBJECTS = $(OBJS) $(ASXXLIBOBJS) $(UTILLIBOBJS) + +ASX = $(top_builddir)/bin/asx8051$(EXEEXT) +DEST = $(DESTDIR)$(bindir)/asx8051$(EXEEXT) + +transform = @program_transform_name@ + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf $(ASX) + +$(ASX): $(ASOBJECTS) + $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $(ASOBJECTS) + +# Compiling and installing everything and running test +# ---------------------------------------------------- +install: all installdirs + $(INSTALL) $(ASX) `echo $(DEST)|sed '$(transform)'` + $(STRIP) `echo $(DEST)|sed '$(transform)'` + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(DEST) + + +# Performing self-test +# -------------------- +check: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + $(INSTALL) -d $(DESTDIR)$(bindir) + + +# Creating dependencies +# --------------------- +dep: Makefile.dep + +Makefile.dep: $(ASSOURCES) $(srcdir)/*.h + $(CPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.c,$^) >Makefile.dep + +ifeq "$(findstring $(MAKECMDGOALS),uninstall check installcheck installdirs \ + clean distclean mostlyclean realclean)" "" + -include Makefile.dep +endif +include $(srcdir)/clean.mk + +# My rules +# -------- +$(OBJDIR)/.stamp: + mkdir -p $(OBJDIR) + touch $(OBJDIR)/.stamp + +$(OBJDIR)/%.o: %.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + +$(OBJDIR)/%.o: $(ASXXLIB)/%.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + +$(OBJDIR)/%.o: $(UTILLIB)/%.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" freshconf;\ + fi + +# End of Makefile diff --git a/as/mcs51/asdata.c b/as/mcs51/asdata.c new file mode 100644 index 0000000..c6cd1a6 --- /dev/null +++ b/as/mcs51/asdata.c @@ -0,0 +1,300 @@ +/* asdata.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 28-Oct-97 JLH: + * - change s_id from [NCPS] to pointer (comment) + * 2-Nov-97 JLH: + * - add jflag for debug control + */ + +#include +#include +#include +#include "asm.h" + +/*)Module asdata.c + * + * The module asdata.c contains the global constants, + * structures, and variables used in the assembler. + */ + +int aserr; /* ASxxxx error counter + */ +jmp_buf jump_env; /* compiler dependent structure + * used by setjmp() and longjmp() + */ +int inpfil; /* count of assembler + * input files specified + */ +int incfil; /* current file handle index + * for include files + */ +int cfile; /* current file handle index + * of input assembly files + */ +int flevel; /* IF-ELSE-ENDIF flag will be non + * zero for false conditional case + */ +int tlevel; /* current conditional level + */ +int ifcnd[MAXIF+1]; /* array of IF statement condition + * values (0 = FALSE) indexed by tlevel + */ +int iflvl[MAXIF+1]; /* array of IF-ELSE-ENDIF flevel + * values indexed by tlevel + */ + +char afn[PATH_MAX]; /* afile temporary file name + */ +char srcfn[MAXFIL][PATH_MAX];/* array of source file names + */ +int srcline[MAXFIL]; /* source line number + */ +char incfn[MAXINC][PATH_MAX];/* array of include file names + */ +int incline[MAXINC]; /* include line number + */ + +int radix; /* current number conversion radix: + * 2 (binary), 8 (octal), 10 (decimal), + * 16 (hexadecimal) + */ +int line; /* current assembler source + * line number + */ +int page; /* current page number + */ +int lop; /* current line number on page + */ +int pass; /* assembler pass number + */ +int org_cnt; /* .org directive counter + */ +int lflag; /* -l, generate listing flag + */ +int cflag; /* -lc, generate sdcdb debug info + */ +int gflag; /* -g, make undefined symbols global flag + */ +int aflag; /* -a, make all symbols global flag + */ +int jflag; /* -j, generate debug information flag + */ +int oflag; /* -o, generate relocatable output flag + */ +int sflag; /* -s, generate symbol table flag + */ +int pflag; /* -p, enable listing pagination + */ +int xflag; /* -x, listing radix flag + */ +int fflag; /* -f(f), relocations flagged flag + */ +Addr_T laddr; /* address of current assembler line + * or value of .if argument + */ +Addr_T fuzz; /* tracks pass to pass changes in the + * address of symbols caused by + * variable length instruction formats + */ +int lmode; /* listing mode + */ +char *ep; /* pointer into error list + * array eb[NERR] + */ +char eb[NERR]; /* array of generated error codes + */ +const char *ip; /* pointer into the assembler-source + * text line in ib[] + */ +const char *ib; /* assembler-source text line + */ +char *cp; /* pointer to assembler output + * array cb[] + */ +char cb[NCODE]; /* array of assembler output values + */ +int *cpt; /* pointer to assembler relocation type + * output array cbt[] + */ +int cbt[NCODE]; /* array of assembler relocation types + * describing the data in cb[] + */ +char tb[NTITL]; /* Title string buffer + */ +char stb[NSBTL]; /* Subtitle string buffer + */ +char optsdcc[NINPUT]; /* sdcc compile options + */ +int flat24Mode; /* non-zero if we are using DS390 24 bit + * flat mode (via .flat24 directive). + */ + +char symtbl[] = { "Symbol Table" }; +char aretbl[] = { "Area Table" }; + +char module[NCPS]; /* module name string + */ + +/* + * The mne structure is a linked list of the assembler + * mnemonics and directives. The list of mnemonics and + * directives contained in the device dependent file + * xxxpst.c are hashed and linked into NHASH lists in + * module assym.c by syminit(). The structure contains + * the mnemonic/directive name, a subtype which directs + * the evaluation of this mnemonic/directive, a flag which + * is used to detect the end of the mnemonic/directive + * list in xxxpst.c, and a value which is normally + * associated with the assembler mnemonic base instruction + * value. + * + * struct mne + * { + * struct mne *m_mp; Hash link + * char m_id[NCPS]; Mnemonic + * char m_type; Mnemonic subtype + * char m_flag; Mnemonic flags + * Addr_T m_valu; Value + * }; + */ +struct mne *mnehash[NHASH]; + +/* + * The sym structure is a linked list of symbols defined + * in the assembler source files. The first symbol is "." + * defined here. The entry 'struct tsym *s_tsym' + * links any temporary symbols following this symbol and + * preceeding the next normal symbol. The structure also + * contains the symbol's name, type (USER or NEW), flag + * (global, assigned, and multiply defined), a pointer + * to the area structure defining where the symbol is + * located, a reference number assigned by outgsd() in + * asout.c, and the symbols address relative to the base + * address of the area where the symbol is located. + * + * struct sym + * { + * struct sym *s_sp; Hash link + * struct tsym *s_tsym; Temporary symbol link + * char *s_id; Symbol (JLH) + * char s_type; Symbol subtype + * char s_flag; Symbol flags + * struct area *s_area; Area line, 0 if absolute + * int s_ref; Ref. number + * Addr_T s_addr; Address + * }; + */ +struct sym sym[] = { + {NULL, NULL, ".", S_USER, S_END, NULL, 0, 0} +}; + +struct sym *symp; /* pointer to a symbol structure + */ +struct sym *symhash[NHASH]; /* array of pointers to NHASH + * linked symbol lists + */ + +/* + * The area structure contains the parameter values for a + * specific program or data section. The area structure + * is a linked list of areas. The initial default area + * is "_CODE" defined here, the next area structure + * will be linked to this structure through the structure + * element 'struct area *a_ep'. The structure contains the + * area name, area reference number ("_CODE" is 0) determined + * by the order of .area directives, area size determined + * from the total code and/or data in an area, area fuzz is + * an variable used to track pass to pass changes in the + * area size caused by variable length instruction formats, + * and area flags which specify the area's relocation type. + * + * struct area + * { + * struct area *a_ap; Area link + * char a_id[NCPS]; Area Name + * int a_ref; Reference number + * Addr_T a_size; Area size + * Addr_T a_fuzz; Area fuzz + * int a_flag; Area flags + * }; + */ +struct area area[] = { + {NULL, "_CODE", 0, 0, 0, A_CON|A_REL} +}; + +struct area *areap; /* pointer to an area structure + */ + +FILE *lfp; /* list output file handle + */ +FILE *ofp; /* relocation output file handle + */ +FILE *tfp; /* symbol table output file handle + */ +FILE *sfp[MAXFIL]; /* array of assembler-source file handles + */ +FILE *ifp[MAXINC]; /* array of include-file file handles + */ + +/* + * array of character types, one per + * ASCII character + */ +unsigned char ctype[128] = { +/*NUL*/ ILL, ILL, ILL, ILL, ILL, ILL, ILL, ILL, +/*BS*/ ILL, SPACE, ILL, ILL, SPACE, ILL, ILL, ILL, +/*DLE*/ ILL, ILL, ILL, ILL, ILL, ILL, ILL, ILL, +/*CAN*/ ILL, ILL, ILL, ILL, ILL, ILL, ILL, ILL, +/*SPC*/ SPACE, ETC, ETC, ETC, LETTER, BINOP, BINOP, ETC, +/*(*/ ETC, ETC, BINOP, BINOP, ETC, BINOP, LETTER, BINOP, +/*0*/ DGT2, DGT2, DGT8, DGT8, DGT8, DGT8, DGT8, DGT8, +/*8*/ DGT10, DGT10, ETC, ETC, BINOP, ETC, BINOP, ETC, +/*@*/ ETC, LTR16, LTR16, LTR16, LTR16, LTR16, LTR16, LETTER, +/*H*/ LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, +/*P*/ LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, +/*X*/ LETTER, LETTER, LETTER, BINOP, ETC, ETC, BINOP, LETTER, +/*`*/ ETC, LTR16, LTR16, LTR16, LTR16, LTR16, LTR16, LETTER, +/*h*/ LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, +/*p*/ LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, +/*x*/ LETTER, LETTER, LETTER, ETC, BINOP, ETC, ETC, ETC +}; + +/* + * an array of characters which + * perform the case translation function + */ +char ccase[128] = { +/*NUL*/ '\000', '\001', '\002', '\003', '\004', '\005', '\006', '\007', +/*BS*/ '\010', '\011', '\012', '\013', '\014', '\015', '\016', '\017', +/*DLE*/ '\020', '\021', '\022', '\023', '\024', '\025', '\026', '\027', +/*CAN*/ '\030', '\031', '\032', '\033', '\034', '\035', '\036', '\037', +/*SPC*/ '\040', '\041', '\042', '\043', '\044', '\045', '\046', '\047', +/*(*/ '\050', '\051', '\052', '\053', '\054', '\055', '\056', '\057', +/*0*/ '\060', '\061', '\062', '\063', '\064', '\065', '\066', '\067', +/*8*/ '\070', '\071', '\072', '\073', '\074', '\075', '\076', '\077', +/*@*/ '\100', '\141', '\142', '\143', '\144', '\145', '\146', '\147', +/*H*/ '\150', '\151', '\152', '\153', '\154', '\155', '\156', '\157', +/*P*/ '\160', '\161', '\162', '\163', '\164', '\165', '\166', '\167', +/*X*/ '\170', '\171', '\172', '\133', '\134', '\135', '\136', '\137', +/*`*/ '\140', '\141', '\142', '\143', '\144', '\145', '\146', '\147', +/*h*/ '\150', '\151', '\152', '\153', '\154', '\155', '\156', '\157', +/*p*/ '\160', '\161', '\162', '\163', '\164', '\165', '\166', '\167', +/*x*/ '\170', '\171', '\172', '\173', '\174', '\175', '\176', '\177' +}; diff --git a/as/mcs51/asexpr.c b/as/mcs51/asexpr.c new file mode 100644 index 0000000..edf70ae --- /dev/null +++ b/as/mcs51/asexpr.c @@ -0,0 +1,732 @@ +/* asexpr.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include +#include "asm.h" + +/*)Module asexpr.c + * + * The module asexpr.c contains the routines to evaluate + * arithmetic/numerical expressions. The functions in + * asexpr.c perform a recursive evaluation of the arithmetic + * expression read from the assembler-source text line. + * The expression may include binary/unary operators, brackets, + * symbols, labels, and constants in hexadecimal, decimal, octal + * and binary. Arithmetic operations are prioritized and + * evaluated by normal arithmetic conventions. + * + * asexpr.c contains the following functions: + * VOID abscheck() + * Addr_T absexpr() + * VOID clrexpr() + * int digit() + * VOID expr() + * int oprio() + * VOID term() + * + * asexpr.c contains no local/static variables + */ + +/*)Function VOID expr(esp, n) + * + * expr * esp pointer to an expr structure + * int n a firewall priority; all top + * level calls (from the user) + * should be made with n set to 0. + * + * The function expr() evaluates an expression and + * stores its value and relocation information into + * the expr structure supplied by the user. + * + * local variables: + * int c current assembler-source + * text character + * int p current operator priority + * area * ap pointer to an area structure + * exp re internal expr structure + * + * global variables: + * char ctype[] array of character types, one per + * ASCII character + * + * functions called: + * VOID abscheck() asexpr.c + * VOID clrexpr() asexpr.c + * VOID expr() asexpr.c + * int getnb() aslex.c + * int oprio() asexpr.c + * VOID qerr() assubr.c + * VOID rerr() assubr.c + * VOID term() asexpr.c + * VOID unget() aslex.c + * + * + * side effects: + * An expression is evaluated modifying the user supplied + * expr structure, a sym structure maybe created for an + * undefined symbol, and the parse of the expression may + * terminate if a 'q' error occurs. + */ + +VOID +expr(register struct expr *esp, int n) +{ + register int c, p; + struct area *ap; + struct expr re; + + term(esp); + while (ctype[c = getnb()] & BINOP) { + /* + * Handle binary operators + - * / & | % ^ << >> [ + */ + if ((p = oprio(c)) <= n) + break; + if ((c == '>' || c == '<') && c != get()) + qerr(); + clrexpr(&re); + expr(&re, p); + esp->e_rlcf |= re.e_rlcf; + if (c == '+') { + /* + * esp + re, at least one must be absolute + */ + if (esp->e_base.e_ap == NULL) { + /* + * esp is absolute (constant), + * use area from re + */ + esp->e_base.e_ap = re.e_base.e_ap; + } else + if (re.e_base.e_ap) { + /* + * re should be absolute (constant) + */ + rerr(); + } + if (esp->e_flag && re.e_flag) + rerr(); + if (re.e_flag) + esp->e_flag = 1; + esp->e_addr += re.e_addr; + } else + if (c == '-') { + /* + * esp - re + */ + if ((ap = re.e_base.e_ap) != NULL) { + if (esp->e_base.e_ap == ap) { + esp->e_base.e_ap = NULL; + } else { + rerr(); + } + } + if (re.e_flag) + rerr(); + esp->e_addr -= re.e_addr; + } else { + /* + * Both operands (esp and re) must be constants + */ + /* SD :- moved the abscheck to each case + case and change the right shift operator.. if + right shift by 8 bits of a relocatable address then + the user wants the higher order byte. set the R_MSB + for the expression */ + switch (c) { + + case '*': + abscheck(esp); + abscheck(&re); + esp->e_addr *= re.e_addr; + break; + + case '/': + abscheck(esp); + abscheck(&re); + esp->e_addr /= re.e_addr; + break; + + case '&': + abscheck(esp); + abscheck(&re); + esp->e_addr &= re.e_addr; + break; + + case '|': + abscheck(esp); + abscheck(&re); + esp->e_addr |= re.e_addr; + break; + + case '%': + abscheck(esp); + abscheck(&re); + esp->e_addr %= re.e_addr; + break; + + case '^': + abscheck(esp); + abscheck(&re); + esp->e_addr ^= re.e_addr; + break; + + case '<': + abscheck(esp); + abscheck(&re); + esp->e_addr <<= re.e_addr; + break; + + case '>': + /* SD change here */ + abscheck(&re); + /* if the left is a relative address & + the right side is == 8 then */ + if (esp->e_base.e_ap && re.e_addr == 8) { + esp->e_rlcf |= R_MSB ; + break; + } + else if (esp->e_base.e_ap && re.e_addr == 16) + { +// if (flat24Mode) +// { + esp->e_rlcf |= R_HIB; +// } +// else +// { +// warnBanner(); +// fprintf(stderr, +// "(expr >> 16) is only meaningful in " +// ".flat24 mode.\n"); +// qerr(); +// } + + break; + } + /* else continue with the normal processing */ + abscheck(esp); + esp->e_addr >>= re.e_addr; + break; + case '[': + /* MB added [ for bit access in bdata */ + abscheck(&re); + if (getnb() != ']') + qerr(); + + /* if the left is a relative address then */ + if (esp->e_base.e_ap) { + esp->e_addr |= (re.e_addr | 0x80) << 8; + break; + } + else if ((esp->e_addr & 0x87) == 0x80) { + esp->e_addr |= re.e_addr; + break; + } + + default: + qerr(); + break; + } + } + } + unget(c); +} + +/*)Function Addr_T absexpr() + * + * The function absexpr() evaluates an expression, verifies it + * is absolute (i.e. not position dependent or relocatable), and + * returns its value. + * + * local variables: + * expr e expr structure + * + * global variables: + * none + * + * functions called: + * VOID abscheck() asexpr.c + * VOID clrexpr() asexpr.c + * VOID expr() asexpr.c + * + * side effects: + * If the expression is not absolute then + * a 'r' error is reported. + */ + +Addr_T +absexpr(void) +{ + struct expr e; + + clrexpr(&e); + expr(&e, 0); + abscheck(&e); + return (e.e_addr); +} + +/*)Function VOID term(esp) + * + * expr * esp pointer to an expr structure + * + * The function term() evaluates a single constant + * or symbol value prefaced by any unary operator + * ( +, -, ~, ', ", >, or < ). This routine is also + * responsible for setting the relocation type to symbol + * based (e.flag != 0) on global references. + * + * local variables: + * int c current character + * char id[] symbol name + * char * jp pointer to assembler-source text + * int n constant evaluation running sum + * int r current evaluation radix + * sym * sp pointer to a sym structure + * tsym * tp pointer to a tsym structure + * int v current digit evaluation + * + * global variables: + * char ctype[] array of character types, one per + * ASCII character + * sym * symp pointer to a symbol structure + * + * functions called: + * VOID abscheck() asexpr.c + * int digit() asexpr.c + * VOID err() assubr.c + * VOID expr() asexpr.c + * int is_abs() asexpr.c + * int get() aslex.c + * VOID getid() aslex.c + * int getmap() aslex.c + * int getnb() aslex.c + * sym * lookup() assym.c + * VOID qerr() assubr.c + * VOID unget() aslex.c + * + * side effects: + * An arithmetic term is evaluated, a symbol structure + * may be created, term evaluation may be terminated + * by a 'q' error. + */ + +VOID +term(register struct expr *esp) +{ + register int c, n; + register const char *jp; + char id[NCPS]; + struct sym *sp; + struct tsym *tp; + int r=0, v; + + c = getnb(); + /* + * Discard the unary '+' at this point and + * also any reference to numerical arguments + * associated with the '#' prefix. + */ + while (c == '+' || c == '#') { c = getnb(); } + /* + * Evaluate all binary operators + * by recursively calling expr(). + */ + if (c == LFTERM) { + expr(esp, 0); + if (getnb() != RTTERM) + qerr(); + return; + } + if (c == '-') { + expr(esp, 100); + abscheck(esp); + esp->e_addr = 0-esp->e_addr; + return; + } + if (c == '~') { + expr(esp, 100); + abscheck(esp); + esp->e_addr = ~esp->e_addr; + return; + } + if (c == '\'') { + esp->e_mode = S_USER; + esp->e_addr = getmap(-1)&0377; + return; + } + if (c == '\"') { + esp->e_mode = S_USER; + if (hilo) { + esp->e_addr = (getmap(-1)&0377)<<8; + esp->e_addr |= (getmap(-1)&0377); + } else { + esp->e_addr = (getmap(-1)&0377); + esp->e_addr |= (getmap(-1)&0377)<<8; + } + return; + } + if (c == '>' || c == '<') { + expr(esp, 100); + if (is_abs (esp)) { + /* + * evaluate msb/lsb directly + */ + if (c == '>') + esp->e_addr >>= 8; + esp->e_addr &= 0377; + return; + } else { + /* + * let linker perform msb/lsb, lsb is default + */ + esp->e_rlcf |= R_BYT2; + if (c == '>') + esp->e_rlcf |= R_MSB; + return; + } + } + /* + * Evaluate digit sequences as local symbols + * if followed by a '$' or as constants. + */ + if (ctype[c] & DIGIT) { + esp->e_mode = S_USER; + jp = ip; + while (ctype[(int)*jp] & RAD10) { + jp++; + } + if (*jp == '$') { + n = 0; + while ((v = digit(c, 10)) >= 0) { + n = 10*n + v; + c = get(); + } + tp = symp->s_tsym; + while (tp) { + if (n == tp->t_num) { + esp->e_base.e_ap = tp->t_area; + esp->e_addr = tp->t_addr; + return; + } + tp = tp->t_lnk; + } + err('u'); + return; + } + r = radix; + if (c == '0') { + c = get(); + switch (c) { + case 'b': + case 'B': + r = 2; + c = get(); + break; + case 'o': + case 'O': + case 'q': + case 'Q': + r = 8; + c = get(); + break; + case 'd': + case 'D': + r = 10; + c = get(); + break; + case 'h': + case 'H': + case 'x': + case 'X': + r = 16; + c = get(); + break; + default: + break; + } + } + n = 0; + while ((v = digit(c, r)) >= 0) { + n = r*n + v; + c = get(); + } + unget(c); + esp->e_addr = n; + return; + } + /* + * Evaluate '$' sequences as a temporary radix + * if followed by a '%', '&', '#', or '$'. + */ + if (c == '$') { + c = get(); + if (c == '%' || c == '&' || c == '#' || c == '$') { + switch (c) { + case '%': + r = 2; + break; + case '&': + r = 8; + break; + case '#': + r = 10; + break; + case '$': + r = 16; + break; + default: + break; + } + c = get(); + n = 0; + while ((v = digit(c, r)) >= 0) { + n = r*n + v; + c = get(); + } + unget(c); + esp->e_mode = S_USER; + esp->e_addr = n; + return; + } + unget(c); + c = '$'; + } + /* + * Evaluate symbols and labels + */ + if (ctype[c] & LETTER) { + esp->e_mode = S_USER; + getid(id, c); + sp = lookup(id); + if (sp->s_type == S_NEW) { + esp->e_addr = 0; + if (sp->s_flag&S_GBL) { + esp->e_flag = 1; + esp->e_base.e_sp = sp; + return; + } + /* err('u'); */ + } else { + esp->e_mode = sp->s_type; + esp->e_addr = sp->s_addr; + esp->e_base.e_ap = sp->s_area; + /* MB: abused bit 15 of s_addr to indicate bit-addressable bytes */ + if ((sp->s_addr & 0x8000) && sp->s_area && + (!strcmp(sp->s_area->a_id, "BSEG_BYTES") || !strcmp(sp->s_area->a_id, "BIT_BANK"))) { + esp->e_rlcf |= R_BIT | R_BYT2; + } + } + return; + } + /* + * Else not a term. + */ + qerr(); +} + +/*)Function int digit(c, r) + * + * int c digit character + * int r current radix + * + * The function digit() returns the value of c + * in the current radix r. If the c value is not + * a number of the current radix then a -1 is returned. + * + * local variables: + * none + * + * global variables: + * char ctype[] array of character types, one per + * ASCII character + * + * functions called: + * none + * + * side effects: + * none + */ + +int +digit(register int c, register int r) +{ + if (r == 16) { + if (ctype[c] & RAD16) { + if (c >= 'A' && c <= 'F') + return (c - 'A' + 10); + if (c >= 'a' && c <= 'f') + return (c - 'a' + 10); + return (c - '0'); + } + } else + if (r == 10) { + if (ctype[c] & RAD10) + return (c - '0'); + } else + if (r == 8) { + if (ctype[c] & RAD8) + return (c - '0'); + } else + if (r == 2) { + if (ctype[c] & RAD2) + return (c - '0'); + } + return (-1); +} + +/*)Function VOID abscheck(esp) + * + * expr * esp pointer to an expr structure + * + * The function abscheck() tests the evaluation of an + * expression to verify it is absolute. If the evaluation + * is relocatable then an 'r' error is noted and the expression + * made absolute. + * + * Note: The area type (i.e. ABS) is not checked because + * the linker can be told to explicitly relocate an + * absolute area. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * VOID rerr() assubr.c + * + * side effects: + * The expression may be changed to absolute and the + * 'r' error invoked. + */ + +VOID +abscheck(register struct expr *esp) +{ + if (esp->e_flag || esp->e_base.e_ap) { + esp->e_flag = 0; + esp->e_base.e_ap = NULL; + rerr(); + } +} + +/*)Function int is_abs(esp) + * + * expr * esp pointer to an expr structure + * + * The function is_abs() tests the evaluation of an + * expression to verify it is absolute. If the evaluation + * is absolute then 1 is returned, else 0 is returned. + * + * Note: The area type (i.e. ABS) is not checked because + * the linker can be told to explicitly relocate an + * absolute area. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ + +int +is_abs (register struct expr *esp) +{ + if (esp->e_flag || esp->e_base.e_ap) { + return(0); + } + return(1); +} + +/*)Function int oprio(c) + * + * int c operator character + * + * The function oprio() returns a relative priority + * for all valid unary and binary operators. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ + +int +oprio(register int c) +{ + if (c == '[') + return (12); + if (c == '*' || c == '/' || c == '%') + return (10); + if (c == '+' || c == '-') + return (7); + if (c == '<' || c == '>') + return (5); + if (c == '^') + return (4); + if (c == '&') + return (3); + if (c == '|') + return (1); + return (0); +} + +/*)Function VOID clrexpr(esp) + * + * expr * esp pointer to expression structure + * + * The function clrexpr() clears the expression structure. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * expression structure cleared. + */ + +VOID +clrexpr(register struct expr *esp) +{ + esp->e_mode = 0; + esp->e_flag = 0; + esp->e_addr = 0; + esp->e_base.e_ap = NULL; + esp->e_rlcf = 0; +} diff --git a/as/mcs51/aslist.c b/as/mcs51/aslist.c new file mode 100644 index 0000000..af165f1 --- /dev/null +++ b/as/mcs51/aslist.c @@ -0,0 +1,748 @@ +/* aslist.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 28-Oct-97 JLH: + * - lstsym: show s_id as string rather than array [NCPS] + */ + +#include +#include +#include +#include +#include "asm.h" + +/*)Module aslist.c + * + * The module aslist.c contains all the functions used + * to generate the assembler list and symbol output files. + * + * aslist.c contains the following functions: + * VOID list() + * VOID list1() + * VOID list2() + * VOID slew() + * VOID lstsym() + * + * The module aslist.c contains no local/static variables + */ + +/*)Function VOID list() + * + * The function list() generates the listing output + * which includes the input source, line numbers, + * and generated code. Numerical output may be selected + * as hexadecimal, decimal, or octal. + * + * local variables: + * int * wp pointer to the assembled data bytes + * int * wpt pointer to the data byte mode + * int nb computed number of assembled bytes + * + * global variables: + * int cb[] array of assembler output values + * int cbt[] array of assembler relocation types + * describing the data in cb[] + * int * cp pointer to assembler output array cb[] + * int * cpt pointer to assembler relocation type + * output array cbt[] + * char eb[] array of generated error codes + * char * ep pointer into error list + * array eb[] + * char ib[] assembler-source text line + * FILE * lfp list output file handle + * int line current assembler source line number + * int lmode listing mode + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * VOID list1() aslist.c + * int putc() c_library + * VOID slew() asslist.c + * + * side effects: + * Listing or symbol output updated. + */ + +VOID +list() +{ + register char *wp; + register int *wpt; + register int nb; + + if (lfp == NULL || lmode == NLIST) + return; + + /* + * Get Correct Line Number + */ + if (incfil >= 0) { + line = incline[incfil]; + if (line == 0) { + if (incfil > 0) { + line = incline[incfil-1]; + } else { + line = srcline[cfile]; + } + } + } else { + line = srcline[cfile]; + } + + /* + * Move to next line. + */ + slew(lfp, pflag); + + /* + * Output a maximum of NERR error codes with listing. + */ + while (ep < &eb[NERR]) + *ep++ = ' '; + fprintf(lfp, "%.2s", eb); + + /* + * Source listing only option. + */ + if (lmode == SLIST) { + fprintf(lfp, "%24s%5u %s\n", "", line, ib); + return; + } + if (lmode == ALIST) { + outchk(HUGE,HUGE); + } + + /* + * HEX output Option. + */ + if (xflag == 0) { /* HEX */ + /* + * Equate only + */ + if (lmode == ELIST) { + fprintf(lfp, "%18s%04X", "", laddr); + fprintf(lfp, " %5u %s\n", line, ib); + return; + } + + /* + * Address (with allocation) + */ + fprintf(lfp, " %04X", laddr); + if (lmode == ALIST || lmode == BLIST) { + fprintf(lfp, "%19s%5u %s\n", "", line, ib); + outdot(); + return; + } + wp = cb; + wpt = cbt; + nb = (int) (cp - cb); + + /* + * First line of output for this source line with data. + */ + list1(wp, wpt, nb, 1); + fprintf(lfp, " %5u %s\n", line, ib); + + /* + * Subsequent lines of output if more data. + */ + while ((nb -= 6) > 0) { + wp += 6; + wpt += 6; + slew(lfp, 0); + fprintf(lfp, "%7s", ""); + list1(wp, wpt, nb, 0); + putc('\n', lfp); + } + } else + /* + * OCTAL output Option. + */ + if (xflag == 1) { /* OCTAL */ + /* + * Equate only + */ + if (lmode == ELIST) { + fprintf(lfp, "%16s%06o", "", laddr); + fprintf(lfp, " %5u %s\n", line, ib); + return; + } + + /* + * Address (with allocation) + */ + fprintf(lfp, " %06o", laddr); + if (lmode == ALIST || lmode == BLIST) { + fprintf(lfp, "%17s%5u %s\n", "", line, ib); + outdot(); + return; + } + wp = cb; + wpt = cbt; + nb = (int) (cp - cb); + + /* + * First line of output for this source line with data. + */ + list1(wp, wpt, nb, 1); + fprintf(lfp, " %5u %s\n", line, ib); + + /* + * Subsequent lines of output if more data. + */ + while ((nb -= 4) > 0) { + wp += 4; + wpt += 4; + slew(lfp, 0); + fprintf(lfp, "%9s", ""); + list1(wp, wpt, nb, 0); + putc('\n', lfp); + } + } else + /* + * DECIMAL output Option. + */ + if (xflag == 2) { /* DECIMAL */ + /* + * Equate only + */ + if (lmode == ELIST) { + fprintf(lfp, "%16s%05u", "", laddr); + fprintf(lfp, " %5u %s\n", line, ib); + return; + } + + /* + * Address (with allocation) + */ + fprintf(lfp, " %05u", laddr); + if (lmode == ALIST || lmode == BLIST) { + fprintf(lfp, "%17s%5u %s\n", "", line, ib); + outdot(); + return; + } + wp = cb; + wpt = cbt; + nb = (int) (cp - cb); + + /* + * First line of output for this source line with data. + */ + list1(wp, wpt, nb, 1); + fprintf(lfp, " %5u %s\n", line, ib); + + /* + * Subsequent lines of output if more data. + */ + while ((nb -= 4) > 0) { + wp += 4; + wpt += 4; + slew(lfp, 0); + fprintf(lfp, "%9s", ""); + list1(wp, wpt, nb, 0); + putc('\n', lfp); + } + } +} + +/*)Function VOID list1(wp, wpt, nw, f) + * + * int f fill blank fields (1) + * int nb number of data bytes + * int * wp pointer to data bytes + * int * wpt pointer to data byte mode + * + * local variables: + * int i loop counter + * + * global variables: + * int xflag -x, listing radix flag + * + * functions called: + * VOID list2() asslist.c + * int fprintf() c_library + * + * side effects: + * Data formatted and output to listing. + */ + +VOID +list1(wp, wpt, nb, f) +register char *wp; +register int *wpt, nb, f; +{ + register int i; + + /* + * HEX output Option. + */ + if (xflag == 0) { /* HEX */ + /* + * Bound number of words to HEX maximum per line. + */ + if (nb > 6) + nb = 6; + + /* + * Output bytes. + */ + for (i=0; i 4) + nb = 4; + + /* + * Output bytes. + */ + for (i=0; i 4) + nb = 4; + + /* + * Output bytes. + */ + for (i=0; i= 2) { + if (t & R_RELOC) { + if (t & (R_PAG0|R_PAG)) { + c = '*'; + } else if (t & R_USGN) { + c = 'u'; + } else if (t & R_PCR) { + c = 'p'; + } else { + c = 'r'; + } + if (t & R_HIGH) c += 1; + } + } + + /* + * Output the selected mode. + */ + putc(c, lfp); +} + +/*)Function VOID slew(fp, flag) + * + * FILE * fp file handle for listing + * int flag enable pagination + * + * The function slew() increments the page line count. + * If the page overflows and pagination is enabled: + * 1) put out a page skip, + * 2) a title, + * 3) a subtitle, + * 4) and reset the line count. + * + * local variables: + * none + * + * global variables: + * char cpu[] cpu type string + * int lop current line number on page + * int page current page number + * char stb[] Subtitle string buffer + * char tb[] Title string buffer + * + * functions called: + * int fprintf() c_library + * + * side effects: + * Increments page line counter, on overflow + * a new page header is output to the listing file. + */ + +VOID +slew(fp,flag) +FILE *fp; +int flag; +{ + if ((lop++ >= NLPP) && flag) { + fprintf(fp, "\fASxxxx Assembler %s (%s), page %u.\n", + VERSION, cpu, ++page); + fprintf(fp, "%s\n", tb); + fprintf(fp, "%s\n\n", stb); + lop = 5; + } +} + +/* Used for qsort call in lstsym */ +static int _cmpSym(const void *p1, const void *p2) +{ + struct sym **s1 = (struct sym **)(p1); + struct sym **s2 = (struct sym **)(p2); + return strcmp((*s1)->s_id,(*s2)->s_id); +} + +/*)Function VOID lstsym(fp) + * + * FILE * fp file handle for output + * + * The function lstsym() outputs alphabetically + * sorted symbol and area tables. + * + * local variables: + * int c temporary + * int i loop counter + * int j temporary + * int k temporary + * char * ptr pointer to an id string + * int nmsym number of symbols + * int narea number of areas + * sym * sp pointer to symbol structure + * sym ** p pointer to an array of + * pointers to symbol structures + * area * ap pointer to an area structure + * + * global variables: + * area * areap pointer to an area structure + * char aretbl[] string "Area Table" + * sym dot defined as sym[0] + * char stb[] Subtitle string buffer + * sym * symhash[] array of pointers to NHASH + * linked symbol lists + * char symtbl[] string "Symbol Table" + * FILE * tfp symbol table output file handle + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * int putc() c_library + * VOID slew() aslist.c + * int strcmp() c_library + * char * strcpy() c_library + * + * side effects: + * Symbol and area tables output. + */ + +VOID +lstsym(fp) +FILE *fp; +{ + register int c, i, j, k; + register char *ptr; + int nmsym, narea; + struct sym *sp; + struct sym **p; + struct area *ap; + + /* + * Symbol Table Header + */ + strcpy(stb, &symtbl[0]); + lop = NLPP; + if (fp == tfp) + page = 0; + slew(fp, 1); + + /* + * Find number of symbols + */ + nmsym = 0; + for (i=0; is_sp; + } + } + if (nmsym == 0) + goto atable; + + /* + * Allocate space for an array of pointers to symbols + * and load array. + */ + if ((p = (struct sym **) malloc(sizeof((struct sym *) sp)*nmsym)) + == NULL) { + fprintf(fp, "Insufficient space to build Symbol Table.\n"); + return; + } + nmsym = 0; + for (i=0; is_sp; + } + } + +#if 0 + /* BUBBLE SORT?? WTF??? */ + /* + * Bubble Sort on Symbol Table Array + */ + j = 1; + c = nmsym - 1; + while (j) { + j = 0; + for (i=0; is_id[0],&p[i+1]->s_id[0]) > 0) { + j = 1; + sp = p[i+1]; + p[i+1] = p[i]; + p[i] = sp; + } + } + } +#else + + qsort(p, nmsym, sizeof(struct sym *), _cmpSym); +#endif + + /* + * Symbol Table Output + */ + for (i=0; is_area) { + j = sp->s_area->a_ref; + if (xflag == 0) { + fprintf(fp, " %2X ", j); + } else + if (xflag == 1) { + fprintf(fp, "%3o ", j); + } else + if (xflag == 2) { + fprintf(fp, "%3u ", j); + } + } else { + fprintf(fp, " "); + } + ptr = &sp->s_id[0]; + fprintf(fp, "%-60s", ptr ); /* JLH */ + + if (sp->s_flag & S_ASG) { + putc('=', fp); + } else { + putc(' ', fp); + } + if (sp->s_type == S_NEW) { + if (xflag == 0) { + fprintf(fp, " **** "); + } else + if (xflag == 1) { + fprintf(fp, "****** "); + } else + if (xflag == 2) { + fprintf(fp, " ***** "); + } + } else { + j = sp->s_addr; + if (xflag == 0) { + fprintf(fp, " %04X ", j); + } else + if (xflag == 1) { + fprintf(fp, "%06o ", j); + } else + if (xflag == 2) { + fprintf(fp, " %05u ", j); + } + } + j = 0; + if (sp->s_flag & S_GBL) { + putc('G', fp); + ++j; + } + if (sp->s_area != NULL) { + putc('R', fp); + ++j; + } + if (sp->s_type == S_NEW) { + putc('X', fp); + ++j; + } +#if NCPS-8 + putc('\n', fp); + slew(fp, 0); + ++i; +#else + if (++i % 3 == 0) { + putc('\n', fp); + slew(fp, pflag); + } else + if (i < nmsym) { + while (j++ < 4) + putc(' ', fp); + fprintf(fp, "| "); + } +#endif + } + putc('\n', fp); + + /* + * Area Table Header + */ + +atable: + strcpy(stb, &aretbl[0]); + lop = NLPP; + slew(fp, 1); + + /* + * Area Table Output + */ + narea = 0; + ap = areap; + while (ap) { + ++narea; + ap = ap->a_ap; + } + for (i=0; ia_ap; + j = ap->a_ref; + if (xflag == 0) { + fprintf(fp, " %2X ", j); + } else + if (xflag == 1) { + fprintf(fp, " %3o ", j); + } else + if (xflag == 2) { + fprintf(fp, " %3u ", j); + } + ptr = &ap->a_id[0]; + while (ptr < &ap->a_id[NCPS]) { + if ((c = *ptr++) != 0) { + putc(c, fp); + } else { + putc(' ', fp); + } + } + j = ap->a_size; + k = ap->a_flag; + if (xflag==0) { + fprintf(fp, " size %4X flags %X\n", j, k); + } else + if (xflag==1) { + fprintf(fp, " size %6o flags %o\n", j, k); + } else + if (xflag==2) { + fprintf(fp, " size %5u flags %u\n", j, k); + } + } +} diff --git a/as/mcs51/asm.h b/as/mcs51/asm.h new file mode 100644 index 0000000..681a81d --- /dev/null +++ b/as/mcs51/asm.h @@ -0,0 +1,712 @@ +/* asm.h + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 28-Oct-97 JLH: + * - add proto for StoreString + * - change s_id from [NCPS] to pointer + * - change m_id from [NCPS] to pointer + * - change NCPS to 80 + * - case sensitive + * - add R_J11 for 8051 assembler + * - add outr11 prototype for 8051 assembler + * - always define "ccase" + * 2-Nov-97 JLH: + * - add jflag for debug control + * - prototypes for DefineNoICE_Line + * 30-Jan-98 JLH: + * - add memory space flags to a_flag for 8051 + * + * 3-Feb-00 KV: + * - add DS80C390 flat mode support. + */ + +#define VERSION "V01.70 + NoICE + SDCC mods + Flat24 Feb-1999" + +#if !defined(__BORLANDC__) && !defined(_MSC_VER) +#include +#endif + +/* + * Case Sensitivity Flag + */ +#define CASE_SENSITIVE 1 + +/*)Module asm.h + * + * The module asm.h contains the definitions for constants, + * structures, global variables, and ASxxxx functions + * contained in the ASxxxx.c files. The two functions + * and three global variables from the machine dependent + * files are also defined. + */ + +/* + * compiler/operating system specific definitions + */ + +/* DECUS C void definition */ +/* File/extension seperator */ + +#ifdef decus +#define VOID char +#define FSEPX '.' +#endif + +/* PDOS C void definition */ +/* File/extension seperator */ + +#ifdef PDOS +#define VOID char +#define FSEPX ':' +#endif + +/* Default void definition */ +/* File/extension seperator */ + +#ifndef VOID +#define VOID void +#define FSEPX '.' +#define OTHERSYSTEM +#endif + +/* + * PATH_MAX + */ +#include +#ifndef PATH_MAX /* POSIX, but not required */ +#if defined(_MSC_VER) || defined(__BORLANDC__) /* Microsoft C or Borland C*/ +#include +#define PATH_MAX _MAX_PATH +#else +#define PATH_MAX /* define a reasonable value */ +#endif +#endif + +#ifdef _WIN32 /* WIN32 native */ + +# define NATIVE_WIN32 1 +# ifdef __MINGW32__ /* GCC MINGW32 depends on configure */ +# include "../../sdccconf.h" +# else +# include "../../sdcc_vc.h" +# define PATH_MAX _MAX_PATH +# endif + +#else /* Assume Un*x style system */ +# include "../../sdccconf.h" +#endif + +/* + * Assembler definitions. + */ +#define LFTERM '(' /* Left expression delimeter */ +#define RTTERM ')' /* Right expression delimeter */ + +#define NCPS 80 /* Chars. per symbol (JLH: change from 8) */ +#define HUGE 1000 /* A huge number */ +#define NERR 3 /* Errors per line */ +#define NINPUT 1024 /* Input buffer size (icodes need space) */ +#define NCODE 128 /* Listing code buffer size */ +#define NTITL 64 /* Title buffer size */ +#define NSBTL 64 /* SubTitle buffer size */ +#define NHASH 64 /* Buckets in hash table */ +#define HMASK 077 /* Hash mask */ +#define NLPP 60 /* Lines per page */ +#define MAXFIL 6 /* Maximum command line input files */ +#define MAXINC 6 /* Maximum nesting of include files */ +#define MAXIF 10 /* Maximum nesting of if/else/endif */ + +#define NLIST 0 /* No listing */ +#define SLIST 1 /* Source only */ +#define ALIST 2 /* Address only */ +#define BLIST 3 /* Address only with allocation */ +#define CLIST 4 /* Code */ +#define ELIST 5 /* Equate only */ + +#define dot sym[0] /* Dot, current loc */ +#define dca area[0] /* Dca, default code area */ + + +/* NB: for Flat24 extentions to work, Addr_T must be at least 24 + * bits. This is checked at runtime when the .flat24 directive + * is processed. + */ +typedef unsigned int Addr_T; + +/* + * The area structure contains the parameter values for a + * specific program or data section. The area structure + * is a linked list of areas. The initial default area + * is "_CODE" defined in asdata.c, the next area structure + * will be linked to this structure through the structure + * element 'struct area *a_ap'. The structure contains the + * area name, area reference number ("_CODE" is 0) determined + * by the order of .area directives, area size determined + * from the total code and/or data in an area, area fuzz is + * a variable used to track pass to pass changes in the + * area size caused by variable length instruction formats, + * and area flags which specify the area's relocation type. + */ +struct area +{ + struct area *a_ap; /* Area link */ + char a_id[NCPS]; /* Area Name */ + int a_ref; /* Ref. number */ + Addr_T a_addr; /* Area address */ + Addr_T a_size; /* Area size */ + Addr_T a_fuzz; /* Area fuzz */ + int a_flag; /* Area flags */ +}; + +/* + * The "A_" area constants define values used in + * generating the assembler area output data. + * + * Area flags + * + * 7 6 5 4 3 2 1 0 + * +-----+-----+-----+-----+-----+-----+-----+-----+ + * | BIT |XDATA|DATA | PAG | ABS | OVR | | | + * +-----+-----+-----+-----+-----+-----+-----+-----+ + */ + +#define A_CON 0000 /* Concatenating */ +#define A_OVR 0004 /* Overlaying */ +#define A_REL 0000 /* Relocatable */ +#define A_ABS 0010 /* absolute */ +#define A_NOPAG 0000 /* Non-Paged */ +#define A_PAG 0020 /* Paged */ + +/* Additional flags for 8051 address spaces */ +#define A_DATA 0000 /* data space (default)*/ +#define A_CODE 0040 /* code space */ +#define A_XDATA 0100 /* external data space */ +#define A_BIT 0200 /* bit addressable space */ + +/* + * The "R_" relocation constants define values used in + * generating the assembler relocation output data for + * areas, symbols, and code. + * + * Relocation flags + * + * 7 6 5 4 3 2 1 0 + * +-----+-----+-----+-----+-----+-----+-----+-----+ + * | MSB | PAGn| PAG0| USGN| BYT2| PCR | SYM | BYT | + * +-----+-----+-----+-----+-----+-----+-----+-----+ + */ + +#define R_WORD 0x00 /* 16 bit */ +#define R_BYTE 0x01 /* 8 bit */ + +#define R_AREA 0x00 /* Base type */ +#define R_SYM 0x02 + +#define R_NORM 0x00 /* PC adjust */ +#define R_PCR 0x04 + +#define R_BYT1 0x00 /* Byte count for R_BYTE = 1 */ +#define R_BYT2 0x08 /* Byte count for R_BYTE = 2 */ + +#define R_SGND 0x00 /* Signed Byte */ +#define R_USGN 0x10 /* Unsigned Byte */ + +#define R_NOPAG 0x00 /* Page Mode */ +#define R_PAG0 0x20 /* Page '0' */ +#define R_PAG 0x40 /* Page 'nnn' */ + +#define R_LSB 0x00 /* low byte */ +#define R_MSB 0x80 /* high byte */ + +#define R_BYT3 0x100 /* if R_BYTE is set, this is a + * 3 byte address, of which + * the linker must select one byte. + */ +#define R_HIB 0x200 /* If R_BYTE & R_BYT3 are set, linker + * will select byte 3 of the relocated + * 24 bit address. + */ + +#define R_BIT 0x400 /* Linker will convert from byte-addressable + * space to bit-addressable space. + */ + +#define R_J11 (R_WORD|R_BYT2) /* JLH: 11 bit JMP and CALL (8051) */ +#define R_J19 (R_WORD|R_BYT2|R_MSB) /* 19 bit JMP/CALL (DS80C390) */ +#define R_C24 (R_WORD|R_BYT1|R_MSB) /* 24 bit address (DS80C390) */ +#define R_J19_MASK (R_BYTE|R_BYT2|R_MSB) + +#define IS_R_J19(x) (((x) & R_J19_MASK) == R_J19) +#define IS_R_J11(x) (((x) & R_J19_MASK) == R_J11) +#define IS_C24(x) (((x) & R_J19_MASK) == R_C24) + +#define R_ESCAPE_MASK 0xf0 /* Used to escape relocation modes + * greater than 0xff in the .rel + * file. + */ + +/* + * Listing Control Flags + */ + +#define R_HIGH 0040000 /* High Byte */ +#define R_RELOC 0100000 /* Relocation */ + +#define R_DEF 00 /* Global def. */ +#define R_REF 01 /* Global ref. */ +#define R_REL 00 /* Relocatable */ +#define R_ABS 02 /* Absolute */ +#define R_GBL 00 /* Global */ +#define R_LCL 04 /* Local */ + +/* + * The mne structure is a linked list of the assembler + * mnemonics and directives. The list of mnemonics and + * directives contained in the device dependent file + * xxxpst.c are hashed and linked into NHASH lists in + * module assym.c by syminit(). The structure contains + * the mnemonic/directive name, a subtype which directs + * the evaluation of this mnemonic/directive, a flag which + * is used to detect the end of the mnemonic/directive + * list in xxxpst.c, and a value which is normally + * associated with the assembler mnemonic base instruction + * value. + */ +struct mne +{ + struct mne *m_mp; /* Hash link */ + char *m_id; /* Mnemonic JLH: change from [NCPS] */ + char m_type; /* Mnemonic subtype */ + char m_flag; /* Mnemonic flags */ + Addr_T m_valu; /* Value */ +}; + +/* + * The sym structure is a linked list of symbols defined + * in the assembler source files. The first symbol is "." + * defined in asdata.c. The entry 'struct tsym *s_tsym' + * links any temporary symbols following this symbol and + * preceeding the next normal symbol. The structure also + * contains the symbol's name, type (USER or NEW), flag + * (global, assigned, and multiply defined), a pointer + * to the area structure defining where the symbol is + * located, a reference number assigned by outgsd() in + * asout.c, and the symbols address relative to the base + * address of the area where the symbol is located. + */ +struct sym +{ + struct sym *s_sp; /* Hash link */ + struct tsym *s_tsym; /* Temporary symbol link */ + char *s_id; /* Symbol: JLH change from [NCPS] */ + char s_type; /* Symbol subtype */ + char s_flag; /* Symbol flags */ + struct area *s_area; /* Area line, 0 if absolute */ + int s_ref; /* Ref. number */ + Addr_T s_addr; /* Address */ + Addr_T s_org; /* Start Address if absolute */ +}; + +#define S_GBL 01 /* Global */ +#define S_ASG 02 /* Assigned */ +#define S_MDF 04 /* Mult. def */ +#define S_END 010 /* End mark for pst. */ +#define S_BIT 020 /* address of bit in byte memory */ + +#define S_NEW 0 /* New name */ +#define S_USER 1 /* User name */ + /* unused slot */ + /* unused slot */ + /* unused slot */ + +#define S_BYTE 5 /* .byte */ +#define S_WORD 6 /* .word */ +#define S_ASCII 7 /* .ascii */ +#define S_ASCIZ 8 /* .asciz */ +#define S_BLK 9 /* .blkb or .blkw */ +#define S_INCL 10 /* .include */ +#define S_DAREA 11 /* .area */ +#define S_ATYP 12 /* .area type */ +#define S_AREA 13 /* .area name */ +#define S_GLOBL 14 /* .globl */ +#define S_PAGE 15 /* .page */ +#define S_TITLE 16 /* .title */ +#define S_SBTL 17 /* .sbttl */ +#define S_IF 18 /* .if */ +#define S_ELSE 19 /* .else */ +#define S_ENDIF 20 /* .endif */ +#define S_EVEN 21 /* .even */ +#define S_ODD 22 /* .odd */ +#define S_RADIX 23 /* .radix */ +#define S_ORG 24 /* .org */ +#define S_MODUL 25 /* .module */ +#define S_ASCIS 26 /* .ascis */ +#define S_FLAT24 27 /* .flat24 */ +#define S_OPTSDCC 28 /* .optsdcc */ + +/* + * The tsym structure is a linked list of temporary + * symbols defined in the assembler source files following + * a normal symbol. The structure contains the temporary + * symbols number, a flag (multiply defined), a pointer to the + * area structure defining where the temporary structure + * is located, and the temporary symbol's address relative + * to the base address of the area where the symbol + * is located. + */ +struct tsym +{ + struct tsym *t_lnk; /* Link to next */ +/* sandeep changed to 'int' from 'char' */ +/* this will increase the number temp symbols + that can be defined from 255 to INT_MAX */ + int t_num; /* 0-INT_MAX$ */ + int t_flg; /* flags */ + + struct area *t_area; /* Area */ + Addr_T t_addr; /* Address */ +}; + +/* + * External Definitions for all Global Variables + */ + +extern int aserr; /* ASxxxx error counter + */ +extern jmp_buf jump_env; /* compiler dependent structure + * used by setjmp() and longjmp() + */ +extern int inpfil; /* count of assembler + * input files specified + */ +extern int incfil; /* current file handle index + * for include files + */ +extern int cfile; /* current file handle index + * of input assembly files + */ +extern int flevel; /* IF-ELSE-ENDIF flag will be non + * zero for false conditional case + */ +extern int tlevel; /* current conditional level + */ +extern int ifcnd[MAXIF+1]; /* array of IF statement condition + * values (0 = FALSE) indexed by tlevel + */ +extern int iflvl[MAXIF+1]; /* array of IF-ELSE-ENDIF flevel + * values indexed by tlevel + */ +extern char + afn[PATH_MAX]; /* afile() temporary filespec + */ +extern char + srcfn[MAXFIL][PATH_MAX]; /* array of source file names + */ +extern int + srcline[MAXFIL]; /* current source file line + */ +extern char + incfn[MAXINC][PATH_MAX]; /* array of include file names + */ +extern int + incline[MAXINC]; /* current include file line + */ +extern int radix; /* current number conversion radix: + * 2 (binary), 8 (octal), 10 (decimal), + * 16 (hexadecimal) + */ +extern int line; /* current assembler source + * line number + */ +extern int page; /* current page number + */ +extern int lop; /* current line number on page + */ +extern int pass; /* assembler pass number + */ +extern int org_cnt; /* .org directive counter + */ +extern int lflag; /* -l, generate listing flag + */ +extern int cflag; /* -c, generate sdcdb debug information + */ +extern int gflag; /* -g, make undefined symbols global flag + */ +extern int aflag; /* -a, make all symbols global flag + */ +extern int jflag; /* -j, generate debug information flag + */ +extern int oflag; /* -o, generate relocatable output flag + */ +extern int sflag; /* -s, generate symbol table flag + */ +extern int pflag; /* -p, enable listing pagination + */ +extern int xflag; /* -x, listing radix flag + */ +extern int fflag; /* -f(f), relocations flagged flag + */ +extern Addr_T laddr; /* address of current assembler line + * or value of .if argument + */ +extern Addr_T fuzz; /* tracks pass to pass changes in the + * address of symbols caused by + * variable length instruction formats + */ +extern int lmode; /* listing mode + */ +extern struct area area[]; /* array of 1 area + */ +extern struct area *areap; /* pointer to an area structure + */ +extern struct sym sym[]; /* array of 1 symbol + */ +extern struct sym *symp; /* pointer to a symbol structure + */ +extern struct sym *symhash[NHASH]; /* array of pointers to NHASH + * linked symbol lists + */ +extern struct mne *mnehash[NHASH]; /* array of pointers to NHASH + * linked mnemonic/directive lists + */ +extern char *ep; /* pointer into error list + * array eb[NERR] + */ +extern char eb[NERR]; /* array of generated error codes + */ +extern const char *ip; /* pointer into the assembler-source + * text line in ib[] + */ +extern const char *ib; /* assembler-source text line + */ +extern char *cp; /* pointer to assembler output + * array cb[] + */ +extern char cb[NCODE]; /* array of assembler output values + */ +extern int *cpt; /* pointer to assembler relocation type + * output array cbt[] + */ +extern int cbt[NCODE]; /* array of assembler relocation types + * describing the data in cb[] + */ +extern char tb[NTITL]; /* Title string buffer + */ +extern char stb[NSBTL]; /* Subtitle string buffer + */ +extern char optsdcc[NINPUT]; /* sdcc compile options + */ +extern int flat24Mode; /* non-zero if we are using DS390 24 bit + * flat mode (via .flat24 directive). + */ +extern char symtbl[]; /* string "Symbol Table" + */ +extern char aretbl[]; /* string "Area Table" + */ +extern char module[NCPS]; /* module name string + */ +extern FILE *lfp; /* list output file handle + */ +extern FILE *ofp; /* relocation output file handle + */ +extern FILE *tfp; /* symbol table output file handle + */ +extern FILE *sfp[MAXFIL]; /* array of assembler-source file handles + */ +extern FILE *ifp[MAXINC]; /* array of include-file file handles + */ +extern unsigned char ctype[128]; /* array of character types, one per + * ASCII character + */ + +extern char ccase[128]; /* an array of characters which + * perform the case translation function + */ +/* + * Definitions for Character Types + */ +#define SPACE 0000 +#define ETC 0000 +#define LETTER 0001 +#define DIGIT 0002 +#define BINOP 0004 +#define RAD2 0010 +#define RAD8 0020 +#define RAD10 0040 +#define RAD16 0100 +#define ILL 0200 + +#define DGT2 DIGIT|RAD16|RAD10|RAD8|RAD2 +#define DGT8 DIGIT|RAD16|RAD10|RAD8 +#define DGT10 DIGIT|RAD16|RAD10 +#define LTR16 LETTER|RAD16 + +/* + * The exp structure is used to return the evaluation + * of an expression. The structure supports three valid + * cases: + * (1) The expression evaluates to a constant, + * mode = S_USER, flag = 0, addr contains the + * constant, and base = NULL. + * (2) The expression evaluates to a defined symbol + * plus or minus a constant, mode = S_USER, + * flag = 0, addr contains the constant, and + * base = pointer to area symbol. + * (3) The expression evaluates to a external + * global symbol plus or minus a constant, + * mode = S_NEW, flag = 1, addr contains the + * constant, and base = pointer to symbol. + */ +struct expr +{ + char e_mode; /* Address mode */ + char e_flag; /* Symbol flag */ + Addr_T e_addr; /* Address */ + union { + struct area *e_ap; + struct sym *e_sp; + } e_base; /* Rel. base */ + int e_rlcf; /* Rel. flags */ +}; + +/* C Library functions */ +/* for reference only +extern VOID exit(); +extern int fclose(); +extern char * fgets(); +extern FILE * fopen(); +extern int fprintf(); +extern VOID longjmp(); +extern VOID * malloc(); +extern int printf(); +extern char putc(); +extern int rewind(); +extern int setjmp(); +extern int strcmp(); +extern char * strcpy(); +extern int strlen(); +extern char * strncpy(); +*/ + +/* Machine independent functions */ + +/* asmain.c */ +extern FILE * afile(); +extern VOID asexit(); +extern VOID asmbl(); +extern int main(); +extern VOID newdot(); +extern VOID phase(); +extern VOID usage(); + +/* aslex.c */ +extern char endline(); +extern char get(); +extern VOID getid(); +extern int as_getline(); +extern int getmap(); +extern char getnb(); +extern VOID getst(); +extern int more(); +extern VOID unget(); +extern VOID chop_crlf(); + +/* assym.c */ +extern struct area * alookup(); +extern struct mne * mlookup(); +extern int hash(); +extern struct sym * lookup(); +extern VOID * new(); +extern char * strsto(char *str); +extern int symeq(); +extern VOID syminit(); +extern VOID symglob(); +extern VOID allglob(); + +/* assubr.c */ +extern VOID aerr(); +extern VOID diag(); +extern VOID err(); +extern VOID warnBanner(void); +extern char * geterr(); +extern VOID qerr(); +extern VOID rerr(); + +/* asexpr.c */ +extern VOID abscheck(); +extern Addr_T absexpr(); +extern VOID clrexpr(); +extern int digit(); +extern int is_abs(); +extern VOID expr(); +extern int oprio(); +extern VOID term(); + +/* aslist.c */ +extern VOID list(); +extern VOID list1(); +extern VOID list2(); +extern VOID lstsym(); +extern VOID slew(); + +/* asout.c */ +extern int hibyte(); +extern int lobyte(); +extern int byte3(int); +extern VOID out(); +extern VOID outab(); +extern VOID outarea(); +extern VOID outaw(); +extern VOID outall(); +extern VOID outdot(); +extern VOID outbuf(); +extern VOID outchk(); +extern VOID outgsd(); +extern VOID outrb(); +extern VOID outrw(struct expr *, int); +extern VOID outr24(struct expr *, int); +extern VOID outsym(); +extern VOID out_lb(); +extern VOID out_lw(); +extern VOID out_l24(int, int); +extern VOID out_rw(); +extern VOID out_tw(); +extern VOID out_t24(int); +extern VOID outr11(); /* JLH */ +extern VOID outr19(struct expr *, int, int); + +/* asnoice.c */ +extern void DefineNoICE_Line(); +extern void DefineCDB_Line(); + +/* Machine dependent variables */ + +extern char * cpu; +extern char * dsft; +extern int hilo; +extern struct mne mne[]; + +/* Machine dependent functions */ + +extern VOID minit(); +extern VOID machine(struct mne *); + +/* strcmpi.c */ +extern int as_strcmpi(const char *s1, const char *s2); +extern int as_strncmpi(const char *s1, const char *s2, size_t n); diff --git a/as/mcs51/asmain.c b/as/mcs51/asmain.c new file mode 100644 index 0000000..817f83f --- /dev/null +++ b/as/mcs51/asmain.c @@ -0,0 +1,1332 @@ +/* asmain.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 29-Oct-97 JLH pass ";!" comments to output file + */ + +#include +#include +#include +#include +#include + +#include "asm.h" + +/*)Module asmain.c + * + * The module asmain.c includes the command argument parser, + * the three pass sequencer, and the machine independent + * assembler parsing code. + * + * asmain.c contains the following functions: + * VOID main(argc, argv) + * VOID asexit() + * VOID asmbl() + * FILE * afile(fn, ft, wf) + * VOID newdot(nap) + * VOID phase(ap, a) + * VOID usage() + * + * asmain.c contains the array char *usetxt[] which + * references the usage text strings printed by usage(). + */ + +static const char *search_path[100]; +static int search_path_length; + +/** + * The search_path_append is used to append another directory to the end + * of the include file search path. + * + * @param dir + * The directory to be added to the path. + */ +void +search_path_append(const char *dir) +{ + if (search_path_length < sizeof(search_path)/sizeof(char*)) + { + search_path[search_path_length++] = dir; + } +} + +/** + * The search_path_fopen function is used to open the named file. If + * the file isn't in the current directory, the search path is then used + * to build a series of possible file names, and attempts to open them. + * The first found is used. + * + * @param filename + * The name of the file to be opened. + * @param mode + * The mode of the file to be opened. + * @returns + * what the fopen function would return on success, or NULL if the + * file is not anywhere in the search path. + */ +static FILE * +search_path_fopen(const char *filename, const char *mode) +{ + FILE *fp; + int j; + + fp = fopen(filename, mode); + if (fp != NULL || filename[0] == '/' || filename[0] == '\\') + return fp; + for (j = 0; j < search_path_length; ++j) + { + char path[2000]; + + strncpy(path, search_path[j], sizeof(path)); + if ((path[strlen(path) - 1] != '/') && + (path[strlen(path) - 1] != DIR_SEPARATOR_CHAR)) + { + strncat(path, DIR_SEPARATOR_STRING, sizeof(path)); + } + strncat(path, filename, sizeof(path)); + fp = fopen(path, mode); + if (fp != NULL) + return fp; + } + errno = ENOENT; + return NULL; +} + +/*)Function VOID main(argc, argv) + * + * int argc argument count + * char * argv array of pointers to argument strings + * + * The function main() is the entry point to the assembler. + * The purpose of main() is to (1) parse the command line + * arguments for options and source file specifications and + * (2) to process the source files through the 3 pass assembler. + * Before each assembler pass various variables are initialized + * and source files are rewound to their beginning. During each + * assembler pass each assembler-source text line is processed. + * After each assembler pass the assembler information is flushed + * to any opened output files and the if-else-endif processing + * is checked for proper termination. + * + * The function main() is also responsible for opening all + * output files (REL, LST, and SYM), sequencing the global (-g) + * and all-global (-a) variable definitions, and dumping the + * REL file header information. + * + * local variables: + * char * p pointer to argument string + * int c character from argument string + * int i argument loop counter + * area * ap pointer to area structure + * + * global variables: + * int aflag -a, make all symbols global flag + * char afn[] afile() constructed filespec + * area * areap pointer to an area structure + * int cb[] array of assembler output values + * int cbt[] array of assembler relocation types + * describing the data in cb[] + * int cfile current file handle index + * of input assembly files + * int * cp pointer to assembler output array cb[] + * int * cpt pointer to assembler relocation type + * output array cbt[] + * char eb[] array of generated error codes + * char * ep pointer into error list array eb[] + * int fflag -f(f), relocations flagged flag + * int flevel IF-ELSE-ENDIF flag will be non + * zero for false conditional case + * Addr_T fuzz tracks pass to pass changes in the + * address of symbols caused by + * variable length instruction formats + * int gflag -g, make undefined symbols global flag + * char ib[] assembler-source text line + * int inpfil count of assembler + * input files specified + * int ifcnd[] array of IF statement condition + * values (0 = FALSE) indexed by tlevel + * int iflvl[] array of IF-ELSE-ENDIF flevel + * values indexed by tlevel + * int incfil current file handle index + * for include files + * char * ip pointer into the assembler-source + * text line in ib[] + * jmp_buf jump_env compiler dependent structure + * used by setjmp() and longjmp() + * int lflag -l, generate listing flag + * int line current assembler source + * line number + * int lop current line number on page + * int oflag -o, generate relocatable output flag + * int jflag -j, generate debug info flag + * int page current page number + * int pflag enable listing pagination + * int pass assembler pass number + * int radix current number conversion radix: + * 2 (binary), 8 (octal), 10 (decimal), + * 16 (hexadecimal) + * int sflag -s, generate symbol table flag + * char srcfn[][] array of source file names + * int srcline[] current source file line + * char stb[] Subtitle string buffer + * sym * symp pointer to a symbol structure + * int tlevel current conditional level + * int xflag -x, listing radix flag + * FILE * lfp list output file handle + * FILE * ofp relocation output file handle + * FILE * tfp symbol table output file handle + * FILE * sfp[] array of assembler-source file handles + * + * called functions: + * FILE * afile() asmain.c + * VOID allglob() assym.c + * VOID asexit() asmain.c + * VOID diag() assubr.c + * VOID err() assubr.c + * int fprintf() c-library + * int as_getline() aslex.c + * VOID list() aslist.c + * VOID lstsym() aslist.c + * VOID minit() ___mch.c + * VOID newdot() asmain.c + * VOID outchk() asout.c + * VOID outgsd() asout.c + * int rewind() c-library + * int setjmp() c-library + * VOID symglob() assym.c + * VOID syminit() assym.c + * VOID usage() asmain.c + * + * side effects: + * Completion of main() completes the assembly process. + * REL, LST, and/or SYM files may be generated. + */ + +int fatalErrors=0; +char relFile[128]; + +int +main(int argc, char *argv[]) +{ + register char *p; + register int c, i; + struct area *ap; + + /*fprintf(stdout, "\n");*/ + inpfil = -1; + pflag = 1; + for (i=1; i= 0) + usage(); + ++p; + while ((c = *p++) != 0) + switch(c) { + + case 'a': + case 'A': + ++aflag; + break; + + case 'c': + case 'C': + ++cflag; + break; + + case 'g': + case 'G': + ++gflag; + break; + + case 'i': + case 'I': + search_path_append(p); + while (*p) + ++p; + break; + + case 'j': /* JLH: debug info */ + case 'J': + ++jflag; + ++oflag; /* force object */ + break; + + case 'l': + case 'L': + ++lflag; + break; + + case 'o': + case 'O': + ++oflag; + break; + + case 's': + case 'S': + ++sflag; + break; + + case 'p': + case 'P': + pflag = 0; + break; + + case 'x': + case 'X': + xflag = 0; + break; + + case 'q': + case 'Q': + xflag = 1; + break; + + case 'd': + case 'D': + xflag = 2; + break; + + case 'f': + case 'F': + ++fflag; + break; + + default: + usage(); + } + } else { + if (++inpfil == MAXFIL) { + fprintf(stderr, "too many input files\n"); + asexit(1); + } + sfp[inpfil] = afile(p, "", 0); + strcpy(srcfn[inpfil],afn); + if (inpfil == 0) { + if (lflag) + lfp = afile(p, "lst", 1); + if (oflag) { + ofp = afile(p, "rel", 1); + // save the file name if we have to delete it on error + strcpy(relFile,afn); + } + if (sflag) + tfp = afile(p, "sym", 1); + } + } + } + if (inpfil < 0) + usage(); + syminit(); + for (pass=0; pass<3; ++pass) { + if (gflag && pass == 1) + symglob(); + if (aflag && pass == 1) + allglob(); + if (oflag && pass == 2) + outgsd(); + flevel = 0; + tlevel = 0; + ifcnd[0] = 0; + iflvl[0] = 0; + radix = 10; + srcline[0] = 0; + page = 0; + org_cnt = 0; + stb[0] = 0; + lop = NLPP; + cfile = 0; + incfil = -1; + for (i = 0; i <= inpfil; i++) + rewind(sfp[i]); + ap = areap; + while (ap) { + ap->a_fuzz = 0; + ap->a_size = 0; + ap = ap->a_ap; + } + fuzz = 0; + dot.s_addr = 0; + dot.s_area = &dca; + symp = ˙ + minit(); + while (as_getline()) { + cp = cb; + cpt = cbt; + ep = eb; + ip = ib; + + /* JLH: if line begins with ";!", then + * pass this comment on to the output file + */ + if (oflag && (pass == 1) && + (ip[0] == ';') && (ip[1] == '!')) + { + fprintf(ofp, "%s\n", ip ); + } + + if (setjmp(jump_env) == 0) + asmbl(); + + if (pass == 2) { + diag(); + list(); + } + } + newdot(dot.s_area); /* Flush area info */ + if (flevel || tlevel) + err('i'); + } + if (oflag) + outchk(HUGE, HUGE); /* Flush */ + if (sflag) { + lstsym(tfp); + } else + if (lflag) { + lstsym(lfp); + } + //printf ("aserr: %d\n", aserr); + //printf ("fatalErrors: %d\n", fatalErrors); + asexit(fatalErrors); + return 0; // hush the compiler +} + +/*)Function VOID asexit(i) + * + * int i exit code + * + * The function asexit() explicitly closes all open + * files and then terminates the program. + * + * local variables: + * int j loop counter + * + * global variables: + * FILE * ifp[] array of include-file file handles + * FILE * lfp list output file handle + * FILE * ofp relocation output file handle + * FILE * tfp symbol table output file handle + * FILE * sfp[] array of assembler-source file handles + * + * functions called: + * int fclose() c-library + * VOID exit() c-library + * + * side effects: + * All files closed. Program terminates. + */ + +VOID +asexit(int i) +{ + int j; + + if (lfp != NULL) fclose(lfp); + if (ofp != NULL) fclose(ofp); + if (tfp != NULL) fclose(tfp); + + for (j=0; j= 0) { + n = 10*n + d; + c = get(); + } + if (c != '$' || get() != ':') + qerr(); + tp = symp->s_tsym; + if (pass == 0) { + while (tp) { + if (n == tp->t_num) { + tp->t_flg |= S_MDF; + break; + } + tp = tp->t_lnk; + } + if (tp == NULL) { + tp=(struct tsym *) new (sizeof(struct tsym)); + tp->t_lnk = symp->s_tsym; + tp->t_num = n; + tp->t_flg = 0; + tp->t_area = dot.s_area; + tp->t_addr = dot.s_addr; + symp->s_tsym = tp; + } + } else { + while (tp) { + if (n == tp->t_num) { + break; + } + tp = tp->t_lnk; + } + if (tp) { + if (pass == 1) { + fuzz = tp->t_addr - dot.s_addr; + tp->t_area = dot.s_area; + tp->t_addr = dot.s_addr; + } else { + phase(tp->t_area, tp->t_addr); + if (tp->t_flg & S_MDF) + err('m'); + } + } else { + err('u'); + } + } + lmode = ALIST; + goto loop; + } + /* + * If the first character is a letter then assume a label, + * symbol, assembler directive, or assembler mnemonic is + * being processed. + */ + if ((ctype[c] & LETTER) == 0) { + if (flevel) { + return; + } else { + qerr(); + } + } + getid(id, c); + c = getnb(); + /* + * If the next character is a : then a label is being processed. + * A double :: defines a global label. If this is new label + * then create a symbol structure. + * pass 0: + * Flag multiply defined labels. + * pass 1: + * Load area, address, and fuzz values + * into structure symp. + * pass 2: + * Check for assembler phase error and + * multiply defined error. + */ + if (c == ':') { + if (flevel) + return; + if ((c = get()) != ':') { + unget(c); + c = 0; + } + symp = lookup(id); + if (symp == &dot) + err('.'); + if (pass == 0) + if ((symp->s_type != S_NEW) && + ((symp->s_flag & S_ASG) == 0)) + symp->s_flag |= S_MDF; + if (pass != 2) { + fuzz = symp->s_addr - dot.s_addr; + symp->s_type = S_USER; + symp->s_area = dot.s_area; + symp->s_addr = dot.s_addr; + } else { + if (symp->s_flag & S_MDF) + err('m'); + phase(symp->s_area, symp->s_addr); + } + if (c) { + symp->s_flag |= S_GBL; + } + lmode = ALIST; + goto loop; + } + /* + * If the next character is a = then an equate is being processed. + * A double == defines a global equate. If this is new variable + * then create a symbol structure. + */ + if (c == '=') { + if (flevel) + return; + if ((c = get()) != '=') { + unget(c); + c = 0; + } + clrexpr(&e1); + expr(&e1, 0); + sp = lookup(id); + if (sp == &dot) { + outall(); + if (e1.e_flag || e1.e_base.e_ap != dot.s_area) + err('.'); + } else + if (sp->s_type != S_NEW && (sp->s_flag & S_ASG) == 0) { + err('m'); + } + sp->s_type = S_USER; + sp->s_area = e1.e_base.e_ap; + sp->s_addr = laddr = e1.e_addr; + sp->s_flag |= S_ASG; + if (c) { + sp->s_flag |= S_GBL; + } + lmode = ELIST; + goto loop; + } + unget(c); + lmode = flevel ? SLIST : CLIST; + if ((mp = mlookup(id)) == NULL) { + if (!flevel) + err('o'); + return; + } + /* + * If we have gotten this far then we have found an + * assembler directive or an assembler mnemonic. + * + * Check for .if, .else, .endif, and .page directives + * which are not controlled by the conditional flags + */ + switch (mp->m_type) { + + case S_IF: + n = absexpr(); + if (tlevel < MAXIF) { + ++tlevel; + ifcnd[tlevel] = n; + iflvl[tlevel] = flevel; + if (n == 0) { + ++flevel; + } + } else { + err('i'); + } + lmode = ELIST; + laddr = n; + return; + + case S_ELSE: + if (ifcnd[tlevel]) { + if (++flevel > (iflvl[tlevel]+1)) { + err('i'); + } + } else { + if (--flevel < iflvl[tlevel]) { + err('i'); + } + } + lmode = SLIST; + return; + + case S_ENDIF: + if (tlevel) { + flevel = iflvl[tlevel--]; + } else { + err('i'); + } + lmode = SLIST; + return; + + case S_PAGE: + lop = NLPP; + lmode = NLIST; + return; + + default: + break; + } + if (flevel) + return; + /* + * If we are not in a false state for .if/.else then + * process the assembler directives here. + */ + switch (mp->m_type) { + + case S_EVEN: + outall(); + laddr = dot.s_addr = (dot.s_addr + 1) & ~1; + lmode = ALIST; + break; + + case S_ODD: + outall(); + laddr = dot.s_addr |= 1; + lmode = ALIST; + break; + + case S_BYTE: + case S_WORD: + do { + clrexpr(&e1); + expr(&e1, 0); + if (mp->m_type == S_BYTE) { + outrb(&e1, R_NORM); + } else { + outrw(&e1, R_NORM); + } + } while ((c = getnb()) == ','); + unget(c); + break; + + case S_ASCII: + case S_ASCIZ: + if ((d = getnb()) == '\0') + qerr(); + while ((c = getmap(d)) >= 0) + outab(c); + if (mp->m_type == S_ASCIZ) + outab(0); + break; + + case S_ASCIS: + if ((d = getnb()) == '\0') + qerr(); + c = getmap(d); + while (c >= 0) { + if ((n = getmap(d)) >= 0) { + outab(c); + } else { + outab(c | 0x80); + } + c = n; + } + break; + + case S_BLK: + clrexpr(&e1); + expr(&e1, 0); + outchk(HUGE,HUGE); + dot.s_addr += e1.e_addr*mp->m_valu; + lmode = BLIST; + break; + + case S_TITLE: + p = tb; + if ((c = getnb()) != 0) { + do { + if (p < &tb[NTITL-1]) + *p++ = c; + } while ((c = get()) != 0); + } + *p = 0; + unget(c); + lmode = SLIST; + break; + + case S_SBTL: + p = stb; + if ((c = getnb()) != 0) { + do { + if (p < &stb[NSBTL-1]) + *p++ = c; + } while ((c = get()) != 0); + } + *p = 0; + unget(c); + lmode = SLIST; + break; + + case S_MODUL: + getst(id, getnb()); // a module can start with a digit + if (pass == 0) { + if (module[0]) { + err('m'); + } else { + strncpy(module, id, NCPS); + } + } + lmode = SLIST; + break; + + case S_OPTSDCC: + p = optsdcc; + if ((c = getnb()) != 0) { + do { + if (p < &optsdcc[NINPUT-1]) + *p++ = c; + } while ((c = get()) != 0); + } + *p = 0; + unget(c); + lmode = SLIST; + /*if (pass == 0) printf("optsdcc=%s\n", optsdcc);*/ + break; + + case S_GLOBL: + do { + getid(id, -1); + sp = lookup(id); + sp->s_flag |= S_GBL; + } while ((c = getnb()) == ','); + unget(c); + lmode = SLIST; + break; + + case S_DAREA: + getid(id, -1); + uaf = 0; + uf = A_CON|A_REL; + if ((c = getnb()) == '(') { + do { + getid(opt, -1); + mp = mlookup(opt); + if (mp && mp->m_type == S_ATYP) { + ++uaf; + uf |= mp->m_valu; + } else { + err('u'); + } + } while ((c = getnb()) == ','); + if (c != ')') + qerr(); + } else { + unget(c); + } + if ((ap = alookup(id)) != NULL) { + if (uaf && uf != ap->a_flag) + err('m'); + } else { + ap = (struct area *) new (sizeof(struct area)); + ap->a_ap = areap; + strncpy(ap->a_id, id, NCPS); + ap->a_ref = areap->a_ref + 1; + ap->a_addr = 0; + ap->a_size = 0; + ap->a_fuzz = 0; + ap->a_flag = uaf ? uf : (A_CON|A_REL); + areap = ap; + } + newdot(ap); + lmode = SLIST; + if (dot.s_area->a_flag & A_ABS) + abs_ap = ap; + break; + + case S_ORG: + if (dot.s_area->a_flag & A_ABS) { + char buf[NCPS]; + + laddr = absexpr(); + sprintf(buf, "%s%x", abs_ap->a_id, org_cnt++); + if ((ap = alookup(buf)) == NULL) { + ap = (struct area *) new (sizeof(struct area)); + *ap = *areap; + ap->a_ap = areap; + strncpy(ap->a_id, buf, NCPS); + ap->a_ref = areap->a_ref + 1; + ap->a_size = 0; + ap->a_fuzz = 0; + areap = ap; + } + newdot(ap); + lmode = ALIST; + dot.s_addr = dot.s_org = laddr; + } else { + err('o'); + } + break; + + case S_RADIX: + if (more()) { + switch (getnb()) { + case 'b': + case 'B': + radix = 2; + break; + case '@': + case 'o': + case 'O': + case 'q': + case 'Q': + radix = 8; + break; + case 'd': + case 'D': + radix = 10; + break; + case 'h': + case 'H': + case 'x': + case 'X': + radix = 16; + break; + default: + radix = 10; + qerr(); + break; + } + } else { + radix = 10; + } + lmode = SLIST; + break; + + case S_INCL: + d = getnb(); + p = fn; + while ((c = get()) != d) { + if (p < &fn[PATH_MAX-1]) { + *p++ = c; + } else { + break; + } + } + *p = 0; + if ((++incfil == MAXINC) || + (ifp[incfil] = search_path_fopen(fn, "r")) == NULL) { + --incfil; + err('i'); + } else { + lop = NLPP; + incline[incfil] = 0; + strcpy(incfn[incfil],fn); + } + lmode = SLIST; + break; + + case S_FLAT24: + if (more()) + { + getst(id, -1); + + if (!as_strcmpi(id, "on")) + { + /* Quick sanity check: size of + * Addr_T must be at least 24 bits. + */ + if (sizeof(Addr_T) < 3) + { + warnBanner(); + fprintf(stderr, + "Cannot enable Flat24 mode: " + "host system must have 24 bit " + "or greater integers.\n"); + } + else + { + flat24Mode = 1; + } + } + else if (!as_strcmpi(id, "off")) + { + flat24Mode = 0; + } + else + { + qerr(); + } + } + else + { + qerr(); + } + lmode = SLIST; + #if 0 + printf("as8051: ds390 flat mode %sabled.\n", + flat24Mode ? "en" : "dis"); + #endif + break; + + + /* + * If not an assembler directive then go to + * the machine dependent function which handles + * all the assembler mnemonics. + */ + default: + machine(mp); + /* if cdb information then generate the line info */ + if (cflag && (pass == 1)) + DefineCDB_Line(); + + /* JLH: if -j, generate a line number symbol */ + if (jflag && (pass == 1)) + { + DefineNoICE_Line(); + } + + } + goto loop; +} + +/*)Function FILE * afile(fn, ft, wf) + * + * char * fn file specification string + * char * ft file type string + * int wf read(0)/write(1) flag + * + * The function afile() opens a file for reading or writing. + * (1) If the file type specification string ft + * is not NULL then a file specification is + * constructed with the file path\name in fn + * and the extension in ft. + * (2) If the file type specification string ft + * is NULL then the file specification is + * constructed from fn. If fn does not have + * a file type then the default source file + * type dsft is appended to the file specification. + * + * afile() returns a file handle for the opened file or aborts + * the assembler on an open error. + * + * local variables: + * int c character value + * FILE * fp filehandle for opened file + * char * p1 pointer to filespec string fn + * char * p2 pointer to filespec string fb + * char * p3 pointer to filetype string ft + * + * global variables: + * char afn[] afile() constructed filespec + * char dsft[] default assembler file type string + * char afn[] constructed file specification string + * + * functions called: + * VOID asexit() asmain.c + * FILE * fopen() c_library + * int fprintf() c_library + * + * side effects: + * File is opened for read or write. + */ + +FILE * +afile(char *fn, char *ft, int wf) +{ + register char *p2, *p3; + register int c; + FILE *fp; + + p2 = afn; + p3 = ft; + + strcpy (afn, fn); + p2 = strrchr (afn, FSEPX); // search last '.' + if (!p2) + p2 = afn + strlen (afn); + if (p2 > &afn[PATH_MAX-4]) // truncate filename, if it's too long + p2 = &afn[PATH_MAX-4]; + *p2++ = FSEPX; + + // choose a file-extension + if (*p3 == 0) { // extension supplied? + p3 = strrchr (fn, FSEPX); // no: extension in fn? + if (p3) + ++p3; + else + p3 = dsft; // no: default extension + } + + while ((c = *p3++) != 0) { // strncpy + if (p2 < &afn[PATH_MAX-1]) + *p2++ = c; + } + *p2++ = 0; + + if ((fp = fopen(afn, wf?"w":"r")) == NULL) { + fprintf(stderr, "%s: cannot %s.\n", afn, wf?"create":"open"); + asexit(1); + } + return (fp); +} + +/*)Function VOID newdot(nap) + * + * area * nap pointer to the new area structure + * + * The function newdot(): + * (1) copies the current values of fuzz and the last + * address into the current area referenced by dot + * (2) loads dot with the pointer to the new area and + * loads the fuzz and last address parameters + * (3) outall() is called to flush any remaining + * bufferred code from the old area to the output + * + * local variables: + * area * oap pointer to old area + * + * global variables: + * sym dot defined as sym[0] + * Addr_T fuzz tracks pass to pass changes in the + * address of symbols caused by + * variable length instruction formats + * + * functions called: + * none + * + * side effects: + * Current area saved, new area loaded, buffers flushed. + */ + +VOID +newdot(register struct area *nap) +{ + register struct area *oap; + + oap = dot.s_area; + /* fprintf (stderr, "%s dot.s_area->a_size: %d dot.s_addr: %d\n", + oap->a_id, dot.s_area->a_size, dot.s_addr); */ + oap->a_fuzz = fuzz; + if (oap->a_flag & A_OVR) { + // the size of an overlay is the biggest size encountered + if (oap->a_size < dot.s_addr) { + oap->a_size = dot.s_addr; + } + } else if (oap->a_flag & A_ABS) { + oap->a_addr = dot.s_org; + oap->a_size += dot.s_addr - dot.s_org; + dot.s_addr = dot.s_org = 0; + } else { + oap->a_addr = 0; + oap->a_size = dot.s_addr; + } + if (nap->a_flag & A_OVR) { + // a new overlay starts at 0, no fuzz + dot.s_addr = 0; + fuzz = 0; + } else if (nap->a_flag & A_ABS) { + // a new absolute starts at org, no fuzz + dot.s_addr = dot.s_org; + fuzz = 0; + } else { + dot.s_addr = nap->a_size; + fuzz = nap->a_fuzz; + } + dot.s_area = nap; + outall(); +} + +/*)Function VOID phase(ap, a) + * + * area * ap pointer to area + * Addr_T a address in area + * + * Function phase() compares the area ap and address a + * with the current area dot.s_area and address dot.s_addr + * to determine if the position of the symbol has changed + * between assembler passes. + * + * local variables: + * none + * + * global varaibles: + * sym * dot defined as sym[0] + * + * functions called: + * none + * + * side effects: + * The p error is invoked if the area and/or address + * has changed. + */ + +VOID +phase(struct area *ap, Addr_T a) +{ + if (ap != dot.s_area || a != dot.s_addr) + err('p'); +} + +char *usetxt[] = { + "Usage: [-dqxjgalopsf][ -I ] file1 [file2 file3 ...]", + " d decimal listing", + " q octal listing", + " x hex listing (default)", + " j add line number and debug information to file", /* JLH */ + " g undefined symbols made global", + " a all user symbols made global", + " l create list output file1[LST]", + " o create object output file1[REL]", + " s create symbol output file1[SYM]", + " c generate sdcdb debug information", + " p disable listing pagination", + " f flag relocatable references by ` in listing file", + " ff flag relocatable references by mode in listing file", + "-I Add the named directory to the include file", + " search path. This option may be used more than once.", + " Directories are searched in the order given.", + "", + 0 +}; + +/*)Function VOID usage() + * + * The function usage() outputs to the stderr device the + * assembler name and version and a list of valid assembler options. + * + * local variables: + * char ** dp pointer to an array of + * text string pointers. + * + * global variables: + * char cpu[] assembler type string + * char * usetxt[] array of string pointers + * + * functions called: + * VOID asexit() asmain.c + * int fprintf() c_library + * + * side effects: + * program is terminated + */ + +VOID +usage(void) +{ + register char **dp; + + fprintf(stderr, "\nASxxxx Assembler %s (%s)\n\n", VERSION, cpu); + for (dp = usetxt; *dp; dp++) + fprintf(stderr, "%s\n", *dp); + asexit(1); +} diff --git a/as/mcs51/asout.c b/as/mcs51/asout.c new file mode 100644 index 0000000..f65d789 --- /dev/null +++ b/as/mcs51/asout.c @@ -0,0 +1,1466 @@ +/* asout.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 28-Oct-97 JLH: + * - outsym: show s_id as string rather than array [NCPS] + * - Added outr11 to support 8051's 11 bit destination address + */ + +#include +#include +#include +#include "asm.h" + + +/*)Module asout.c + * + * The module asout.c contains all the functions used to + * generate the .REL assembler output file. + * + * + * The assemblers' output object file is an ascii file containing + * the information needed by the linker to bind multiple object + * modules into a complete loadable memory image. + * + * The object module contains the following designators: + * + * [XDQ][HL] + * X Hexadecimal radix + * D Decimal radix + * Q Octal radix + * + * H Most significant byte first + * L Least significant byte first + * + * H Header + * M Module + * A Area + * S Symbol + * T Object code + * R Relocation information + * P Paging information + * + * + * (1) Radix Line + * + * The first line of an object module contains the [XDQ][HL] + * format specifier (i.e. XH indicates a hexadecimal file with + * most significant byte first) for the following designators. + * + * + * (2) Header Line + * + * H aa areas gg global symbols + * + * The header line specifies the number of areas(aa) and the + * number of global symbols(gg) defined or referenced in this ob- + * ject module segment. + * + * + * (3) Module Line + * + * M name + * + * The module line specifies the module name from which this + * header segment was assembled. The module line will not appear + * if the .module directive was not used in the source program. + * + * + * (4) Symbol Line + * + * S string Defnnnn + * + * or + * + * S string Refnnnn + * + * The symbol line defines (Def) or references (Ref) the symbol + * 'string' with the value nnnn. The defined value is relative to + * the current area base address. References to constants and ex- + * ternal global symbols will always appear before the first area + * definition. References to external symbols will have a value of + * zero. + * + * + * (5) Area Line + * + * A label size ss flags ff + * + * The area line defines the area label, the size (ss) of the + * area in bytes, and the area flags (ff). The area flags specify + * the ABS, REL, CON, OVR, and PAG parameters: + * + * OVR/CON (0x04/0x00 i.e. bit position 2) + * + * ABS/REL (0x08/0x00 i.e. bit position 3) + * + * PAG (0x10 i.e. bit position 4) + * + * + * (6) T Line + * + * T xx xx nn nn nn nn nn ... + * + * The T line contains the assembled code output by the assem- + * bler with xx xx being the offset address from the current area + * base address and nn being the assembled instructions and data in + * byte format. + * + * + * (7) R Line + * + * R 0 0 nn nn n1 n2 xx xx ... + * + * The R line provides the relocation information to the linker. + * The nn nn value is the current area index, i.e. which area the + * current values were assembled. Relocation information is en- + * coded in groups of 4 bytes: + * + * 1. n1 is the relocation mode and object format + * 1. bit 0 word(0x00)/byte(0x01) + * 2. bit 1 relocatable area(0x00)/symbol(0x02) + * 3. bit 2 normal(0x00)/PC relative(0x04) relocation + * 4. bit 3 1-byte(0x00)/2-byte(0x08) object format for + * byte data + * 5. bit 4 signed(0x00)/unsigned(0x10) byte data + * 6. bit 5 normal(0x00)/page '0'(0x20) reference + * 7. bit 6 normal(0x00)/page 'nnn'(0x40) reference + * 8. bit 7 normal(0x00)/MSB of value + * + * 2. n2 is a byte index into the corresponding (i.e. pre- + * ceeding) T line data (i.e. a pointer to the data to be + * updated by the relocation). The T line data may be + * 1-byte or 2-byte byte data format or 2-byte word + * format. + * + * 3. xx xx is the area/symbol index for the area/symbol be- + * ing referenced. the corresponding area/symbol is found + * in the header area/symbol lists. + * + * + * The groups of 4 bytes are repeated for each item requiring relo- + * cation in the preceeding T line. + * + * + * (8) P Line + * + * P 0 0 nn nn n1 n2 xx xx + * + * The P line provides the paging information to the linker as + * specified by a .setdp directive. The format of the relocation + * information is identical to that of the R line. The correspond- + * ing T line has the following information: + * T xx xx aa aa bb bb + * + * Where aa aa is the area reference number which specifies the + * selected page area and bb bb is the base address of the page. + * bb bb will require relocation processing if the 'n1 n2 xx xx' is + * specified in the P line. The linker will verify that the base + * address is on a 256 byte boundary and that the page length of an + * area defined with the PAG type is not larger than 256 bytes. + * + * The linker defaults any direct page references to the first + * area defined in the input REL file. All ASxxxx assemblers will + * specify the _CODE area first, making this the default page area. + * + * + * asout.c contains the following functions: + * int lobyte() + * int hibyte() + * VOID out() + * VOID outab() + * VOID outall() + * VOID outarea() + * VOID outaw() + * VOID outbuf() + * VOID outchk() + * VOID outdot() + * VOID outdp() + * VOID outgsd() + * VOID outrb() + * VOID outrw() + * VOID outsym() + * VOID out_lb() + * VOID out_lw() + * VOID out_rw() + * VOID out_tw() + * + * The module asout.c contains the following local variables: + * int rel[] relocation data for code/data array + * int * relp pointer to rel array + * int txt[] assembled code/data array + * int * txtp pointer to txt array + */ + +#define NTXT 16 +#define NREL 16 + +char txt[NTXT]; +char rel[NREL]; + +char *txtp = { &txt[0] }; +char *relp = { &rel[0] }; + +/*)Function VOID outab(b) + * + * int b assembler data word + * + * The function outab() processes a single word of + * assembled data in absolute format. + * + * local variables: + * int * txtp pointer to data word + * + * global variables: + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID outchk() asout.c + * VOID out_lb() asout.c + * + * side effects: + * The current assembly address is incremented by 1. + */ + +VOID +outab(int b) +{ + if (pass == 2) { + out_lb(b,0); + if (oflag) { + outchk(1, 0); + *txtp++ = lobyte(b); + } + } + ++dot.s_addr; +} + +/*)Function VOID outaw(w) + * + * int w assembler data word + * + * The function outaw() processes a single word of + * assembled data in absolute format. + * + * local variables: + * int * txtp pointer to data word + * + * global variables: + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID outchk() asout.c + * VOID out_lw() asout.c + * + * side effects: + * The current assembly address is incremented by 2. + */ + +VOID +outaw(int w) +{ + if (pass == 2) { + out_lw(w,0); + if (oflag) { + outchk(2, 0); + out_tw(w); + } + } + dot.s_addr += 2; +} + +/*)Function VOID write_rmode(r) + * + * int r relocation mode + * + * write_rmode puts the passed relocation mode into the + * output relp buffer, escaping it if necessary. + * + * global variables: + * int * relp pointer to rel array + * + * functions called: + * VOID rerr() assubr.c + * + * side effects: + * relp is incremented appropriately. + */ +VOID +write_rmode(int r) +{ + /* We need to escape the relocation mode if it is greater + * than a byte, or if it happens to look like an escape. + * (I don't think that the latter case is legal, but + * better safe than sorry). + */ + if ((r > 0xff) || ((r & R_ESCAPE_MASK) == R_ESCAPE_MASK)) + { + /* Hack in up to an extra 4 bits of flags with escape. */ + if (r > 0xfff) + { + /* uh-oh.. we have more than 4 extra bits. */ + fprintf(stderr, + "Internal error: relocation mode 0x%X too big.\n", + r); + rerr(); + } + /* printf("escaping relocation mode\n"); */ + *relp++ = R_ESCAPE_MASK | (r >> 8); + *relp++ = r & 0xff; + } + else + { + *relp++ = r; + } +} + +/*)Function VOID outrb(esp, r) + * + * expr * esp pointer to expr structure + * int r relocation mode + * + * The function outrb() processes a byte of generated code + * in either absolute or relocatable format dependent upon + * the data contained in the expr structure esp. If the + * .REL output is enabled then the appropriate information + * is loaded into the txt and rel buffers. + * + * local variables: + * int n symbol/area reference number + * int * relp pointer to rel array + * int * txtp pointer to txt array + * + * global variables: + * sym dot defined as sym[0] + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID aerr() assubr.c + * VOID outchk() asout.c + * VOID out_lb() asout.c + * VOID out_rb() asout.c + * VOID out_tb() asout.c + * + * side effects: + * The current assembly address is incremented by 1. + */ + +VOID +outrb(struct expr *esp, int r) +{ + register int n; + + if (pass == 2) { + if (esp->e_flag==0 && esp->e_base.e_ap==NULL) { + /* This is a constant; simply write the + * const byte to the T line and don't + * generate any relocation info. + */ + out_lb(lobyte(esp->e_addr),0); + if (oflag) { + outchk(1, 0); + *txtp++ = lobyte(esp->e_addr); + } + } else { + /* We are generating a single byte of relocatable + * info. + * + * We generate a 24 bit address. The linker will + * select a single byte based on whether R_MSB or + * R_HIB is set. + */ + { + /* 24 bit mode. */ + r |= R_BYTE | R_BYT3 | esp->e_rlcf; + if (r & R_HIB) + { + /* Probably should mark this differently in the + * listing file. + */ + out_lb(byte3(esp->e_addr),r|R_RELOC|R_HIGH); + } + else if (r & R_MSB) { + out_lb(hibyte(esp->e_addr),r|R_RELOC|R_HIGH); + } else { + out_lb(lobyte(esp->e_addr),r|R_RELOC); + } + if (oflag) { + outchk(3, 5); + out_t24(esp->e_addr); + if (esp->e_flag) { + n = esp->e_base.e_sp->s_ref; + r |= R_SYM; + } else { + n = esp->e_base.e_ap->a_ref; + } + write_rmode(r); + *relp++ = txtp - txt - 3; + out_rw(n); + } + } + } + } + ++dot.s_addr; +} + +/*)Function VOID outrw(esp, r) + * + * expr * esp pointer to expr structure + * int r relocation mode + * + * The function outrw() processes a word of generated code + * in either absolute or relocatable format dependent upon + * the data contained in the expr structure esp. If the + * .REL output is enabled then the appropriate information + * is loaded into the txt and rel buffers. + * + * local variables: + * int n symbol/area reference number + * int * relp pointer to rel array + * int * txtp pointer to txt array + * + * global variables: + * sym dot defined as sym[0] + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID aerr() assubr.c + * VOID outchk() asout.c + * VOID out_lw() asout.c + * VOID out_rw() asout.c + * VOID out_tw() asout.c + * + * side effects: + * The current assembly address is incremented by 2. + */ + +VOID +outrw(struct expr *esp, int r) +{ + register int n; + + if (pass == 2) { + + if (esp->e_addr > 0xffff) + { + warnBanner(); + fprintf(stderr, + "large constant 0x%x truncated to 16 bits\n", + esp->e_addr); + } + if (esp->e_flag==0 && esp->e_base.e_ap==NULL) { + out_lw(esp->e_addr,0); + if (oflag) { + outchk(2, 0); + out_tw(esp->e_addr); + } + } else { + r |= R_WORD | esp->e_rlcf; + if (r & R_BYT2) { + rerr(); + if (r & R_MSB) { + out_lw(hibyte(esp->e_addr),r|R_RELOC); + } else { + out_lw(lobyte(esp->e_addr),r|R_RELOC); + } + } else { + out_lw(esp->e_addr,r|R_RELOC); + } + if (oflag) { + outchk(2, 5); + out_tw(esp->e_addr); + if (esp->e_flag) { + n = esp->e_base.e_sp->s_ref; + r |= R_SYM; + } else { + n = esp->e_base.e_ap->a_ref; + } + + if (IS_C24(r)) + { + /* If this happens, the linker will + * attempt to process this 16 bit field + * as 24 bits. That would be bad. + */ + fprintf(stderr, + "***Internal error: C24 out in " + "outrw()\n"); + rerr(); + } + write_rmode(r); + *relp++ = txtp - txt - 2; + out_rw(n); + } + } + } + dot.s_addr += 2; +} + +/*)Function VOID outr24(esp, r) + * + * expr * esp pointer to expr structure + * int r relocation mode + * + * The function outr24() processes 24 bits of generated code + * in either absolute or relocatable format dependent upon + * the data contained in the expr structure esp. If the + * .REL output is enabled then the appropriate information + * is loaded into the txt and rel buffers. + * + * local variables: + * int n symbol/area reference number + * int * relp pointer to rel array + * int * txtp pointer to txt array + * + * global variables: + * sym dot defined as sym[0] + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID aerr() assubr.c + * VOID outchk() asout.c + * VOID out_l24() asout.c + * VOID out_rw() asout.c + * VOID out_t24() asout.c + * + * side effects: + * The current assembly address is incremented by 3. + */ + +VOID +outr24(struct expr *esp, int r) +{ + register int n; + + if (pass == 2) { + if (esp->e_flag==0 && esp->e_base.e_ap==NULL) { + /* This is a constant expression. */ + out_l24(esp->e_addr,0); + if (oflag) { + outchk(3, 0); + out_t24(esp->e_addr); + } + } else { + /* This is a symbol. */ + r |= R_WORD | esp->e_rlcf; + if (r & R_BYT2) { + /* I have no idea what this case is. */ + rerr(); + if (r & R_MSB) { + out_lw(hibyte(esp->e_addr),r|R_RELOC); + } else { + out_lw(lobyte(esp->e_addr),r|R_RELOC); + } + } else { + out_l24(esp->e_addr,r|R_RELOC); + } + if (oflag) { + outchk(3, 5); + out_t24(esp->e_addr); + if (esp->e_flag) { + n = esp->e_base.e_sp->s_ref; + r |= R_SYM; + } else { + n = esp->e_base.e_ap->a_ref; + } + + if (r & R_BYTE) + { + /* If this occurs, we cannot properly + * code the relocation data with the + * R_C24 flag. This means the linker + * will fail to do the 24 bit relocation. + * Which will suck. + */ + fprintf(stderr, + "***Internal error: BYTE out in 24 " + "bit flat mode unexpected.\n"); + rerr(); + } + + write_rmode(r | R_C24); + *relp++ = txtp - txt - 3; + out_rw(n); + } + } + } + dot.s_addr += 3; +} + +/*)Function VOID outdp(carea, esp) + * + * area * carea pointer to current area strcuture + * expr * esp pointer to expr structure + * + * The function outdp() flushes the output buffer and + * outputs paging information to the .REL file. + * + * local variables: + * int n symbol/area reference number + * int r relocation mode + * int * relp pointer to rel array + * int * txtp pointer to txt array + * + * global variables: + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID outbuf() asout.c + * VOID outchk() asout.c + * VOID out_rw() asout.c + * VOID out_tw() asout.c + * + * side effects: + * Output buffer flushed to .REL fiel. + * Paging information dumped to .REL file. + */ + +VOID +outdp(register struct area *carea, register struct expr *esp) +{ + register int n, r; + + if (oflag && pass==2) { + outchk(HUGE,HUGE); + out_tw(carea->a_ref); + out_tw(esp->e_addr); + if (esp->e_flag || esp->e_base.e_ap!=NULL) { + r = R_WORD; + if (esp->e_flag) { + n = esp->e_base.e_sp->s_ref; + r |= R_SYM; + } else { + n = esp->e_base.e_ap->a_ref; + } + write_rmode(r); + *relp++ = txtp - txt - 2; + out_rw(n); + } + outbuf("P"); + } +} + +/*)Function VOID outall() + * + * The function outall() will output any bufferred assembled + * data and relocation information (during pass 2 if the .REL + * output has been enabled). + * + * local variables: + * none + * + * global variables: + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID outbuf() asout.c + * + * side effects: + * assembled data and relocation buffers will be cleared. + */ + +VOID +outall(void) +{ + if (oflag && pass==2) + outbuf("R"); +} + +/*)Function VOID outdot() + * + * The function outdot() outputs information about the + * current program counter value (during pass 2 if the .REL + * output has been enabled). + * + * local variables: + * none + * + * global variables: + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * int fprintf() c_library + * VOID out() asout.c + * + * side effects: + * assembled data and relocation buffers will be cleared. + */ + +VOID +outdot(void) +{ + if (oflag && pass==2) { + fprintf(ofp, "T"); + out(txt,(int) (txtp-txt)); + fprintf(ofp, "\n"); + fprintf(ofp, "R"); + out(rel,(int) (relp-rel)); + fprintf(ofp, "\n"); + txtp = txt; + relp = rel; + } +} + +/*)Function outchk(nt, nr) + * + * int nr number of additional relocation words + * int nt number of additional data words + * + * The function outchk() checks the data and relocation buffers + * for space to insert the nt data words and nr relocation words. + * If space is not available then output the current data and + * initialize the data buffers to receive the new data. + * + * local variables: + * area * ap pointer to an area structure + * int * relp pointer to rel array + * int * txtp pointer to txt array + * + * global variables: + * sym dot defined as sym[0] + * + * functions called: + * VOID outbuf() asout.c + * + * side effects: + * Data and relocation buffers may be emptied and initialized. + */ + +VOID +outchk(int nt, int nr) +{ + register struct area *ap; + + if (txtp+nt > &txt[NTXT] || relp+nr > &rel[NREL]) { + outbuf("R"); + } + if (txtp == txt) { + out_tw(dot.s_addr); + if ((ap = dot.s_area) != NULL) { + write_rmode(R_WORD|R_AREA); + *relp++ = 0; + out_rw(ap->a_ref); + } + } +} + +/*)Function VOID outbuf() + * + * The function outbuf() will output any bufferred data + * and relocation information to the .REL file. The output + * buffer pointers and counters are initialized. + * + * local variables: + * int rel[] relocation data for code/data array + * int * relp pointer to rel array + * int txt[] assembled code/data array + * int * txtp pointer to txt array + * + * global variables: + * FILE * ofp relocation output file handle + * + * functions called: + * VOID out() asout.c + * + * side effects: + * All bufferred data written to .REL file and + * buffer pointers and counters initialized. + */ + +VOID +outbuf(char *s) +{ + if (txtp > &txt[2]) { + fprintf(ofp, "T"); + out(txt,(int) (txtp-txt)); + fprintf(ofp, "\n"); + fprintf(ofp, "%s", s); + out(rel,(int) (relp-rel)); + fprintf(ofp, "\n"); + } + txtp = txt; + relp = rel; +} + +/*)Function VOID outgsd() + * + * The function outgsd() performs the following: + * (1) outputs the .REL file radix + * (2) outputs the header specifying the number + * of areas and global symbols + * (3) outputs the module name + * (4) set the reference number and output a symbol line + * for all external global variables and absolutes + * (5) output an area name, set reference number and output + * a symbol line for all global relocatables in the area. + * Repeat this proceedure for all areas. + * + * local variables: + * area * ap pointer to an area structure + * sym * sp pointer to a sym structure + * int i loop counter + * int j loop counter + * int c string character value + * int narea number of code areas + * char * ptr string pointer + * int nglob number of global symbols + * int rn symbol reference number + * + * global variables: + * area * areap pointer to an area structure + * char module[] module name string + * sym * symhash[] array of pointers to NHASH + * linked symbol lists + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * VOID outarea() asout.c + * VOID outsym() asout.c + * int putc() c_library + * + * side effects: + * All symbols are given reference numbers, all symbol + * and area information is output to the .REL file. + */ + +VOID +outgsd(void) +{ + register struct area *ap; + register struct sym *sp; + register int i, j; + char *ptr; + int c, narea, nglob, rn; + + /* + * Number of areas + */ + narea = areap->a_ref + 1; + + /* + * Number of global references/absolutes + */ + nglob = 0; + for (i = 0; i < NHASH; ++i) { + sp = symhash[i]; + while (sp) { + if (sp->s_flag&S_GBL) + ++nglob; + sp = sp->s_sp; + } + } + + /* + * Output Radix and number of areas and symbols + */ + if (xflag == 0) { + fprintf(ofp, "X%c\n", hilo ? 'H' : 'L'); + fprintf(ofp, "H %X areas %X global symbols\n", narea, nglob); + } else + if (xflag == 1) { + fprintf(ofp, "Q%c\n", hilo ? 'H' : 'L'); + fprintf(ofp, "H %o areas %o global symbols\n", narea, nglob); + } else + if (xflag == 2) { + fprintf(ofp, "D%c\n", hilo ? 'H' : 'L'); + fprintf(ofp, "H %u areas %u global symbols\n", narea, nglob); + } + + /* + * Module name + */ + if (module[0]) { + fprintf(ofp, "M "); + ptr = &module[0]; + while (ptr < &module[NCPS]) { + if ((c = *ptr++) != 0) + putc(c, ofp); + } + putc('\n', ofp); + } + + /* + * Sdcc compile options + */ + if (strlen(optsdcc)) fprintf(ofp, "O %s\n", optsdcc); + + /* + * Global references and absolutes. + */ + rn = 0; + for (i=0; is_area==NULL && sp->s_flag&S_GBL) { + sp->s_ref = rn++; + outsym(sp); + } + sp = sp->s_sp; + } + } + + /* + * Global relocatables. + */ + for (i=0; ia_ref != i) + ap = ap->a_ap; + outarea(ap); + for (j=0; js_area==ap && sp->s_flag&S_GBL) { + sp->s_ref = rn++; + outsym(sp); + } + sp = sp->s_sp; + } + } + } +} + +/*)Function VOID outarea(ap) + * + * area * ap pointer to an area structure + * + * The function outarea() outputs the A line to the .REL + * file. The A line contains the area's name, size, and + * attributes. + * + * local variables: + * char * ptr pointer to area id string + * int c character value + * + * global variables: + * FILE * ofp relocation output file handle + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * int putc() c_library + * + * side effects: + * The A line is sent to the .REL file. + */ + +VOID +outarea(register struct area *ap) +{ + register char *ptr; + register int c; + + fprintf(ofp, "A "); + ptr = &ap->a_id[0]; + while (ptr < &ap->a_id[NCPS]) { + if ((c = *ptr++) != 0) + putc(c, ofp); + } + if (xflag == 0) { + fprintf(ofp, " size %X flags %X addr %X\n", ap->a_size, ap->a_flag, ap->a_addr); + } else + if (xflag == 1) { + fprintf(ofp, " size %o flags %o\n", ap->a_size, ap->a_flag); + } else + if (xflag == 2) { + fprintf(ofp, " size %u flags %u\n", ap->a_size, ap->a_flag); + } +} + +/*)Function VOID outsym(sp) + * + * sym * sp pointer to a sym structure + * + * The function outsym() outputs the S line to the .REL + * file. The S line contains the symbols name and whether the + * the symbol is defined or referenced. + * + * local variables: + * char * ptr pointer to symbol id string + * int c character value + * + * global variables: + * FILE * ofp relocation output file handle + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * int putc() c_library + * + * side effects: + * The S line is sent to the .REL file. + */ + +VOID +outsym(register struct sym *sp) +{ + register char *ptr; + + fprintf(ofp, "S "); + ptr = &sp->s_id[0]; + fprintf(ofp, "%s", ptr ); + fprintf(ofp, " %s", sp->s_type==S_NEW ? "Ref" : "Def"); + if (xflag == 0) { + fprintf(ofp, "%04X\n", sp->s_addr); + } else + if (xflag == 1) { + fprintf(ofp, "%06o\n", sp->s_addr); + } else + if (xflag == 2) { + fprintf(ofp, "%05u\n", sp->s_addr); + } +} + +/*)Function VOID out(p, n) + * + * int n number of words to output + * int * p pointer to data words + * + * The function out() outputs the data words to the .REL file + * int the specified radix. + * + * local variables: + * none + * + * global variables: + * FILE * ofp relocation output file handle + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * + * side effects: + * Data is sent to the .REL file. + */ + +VOID +out(char *p, int n) +{ + while (n--) { + if (xflag == 0) { + fprintf(ofp, " %02X", (*p++)&0xff); + } else + if (xflag == 1) { + fprintf(ofp, " %03o", (*p++)&0xff); + } else + if (xflag == 2) { + fprintf(ofp, " %03u", (*p++)&0xff); + } + } +} + +/*)Function VOID out_lb(b, t) + * + * int b assembled data + * int t relocation type + * + * The function out_lb() copies the assembled data and + * its relocation type to the list data buffers. + * + * local variables: + * none + * + * global variables: + * int * cp pointer to assembler output array cb[] + * int * cpt pointer to assembler relocation type + * output array cbt[] + * + * functions called: + * none + * + * side effects: + * Pointers to data and relocation buffers incremented by 1. + */ + +VOID +out_lb(register int b, register int t) +{ + if (cp < &cb[NCODE]) { + *cp++ = b; + *cpt++ = t; + } +} + +/*)Function VOID out_lw(n, t) + * + * int n assembled data + * int t relocation type + * + * The function out_lw() copies the assembled data and + * its relocation type to the list data buffers. + * + * local variables: + * none + * + * global variables: + * int * cp pointer to assembler output array cb[] + * int * cpt pointer to assembler relocation type + * output array cbt[] + * + * functions called: + * none + * + * side effects: + * Pointers to data and relocation buffers incremented by 2. + */ + +VOID +out_lw(register int n, register int t) +{ + if (hilo) { + out_lb(hibyte(n),t ? t|R_HIGH : 0); + out_lb(lobyte(n),t); + } else { + out_lb(lobyte(n),t); + out_lb(hibyte(n),t ? t|R_HIGH : 0); + } +} + +/*)Function VOID out_l24(n, t) + * + * int n assembled data + * int t relocation type + * + * The function out_l24() copies the assembled data and + * its relocation type to the list data buffers. + * + * local variables: + * none + * + * global variables: + * int * cp pointer to assembler output array cb[] + * int * cpt pointer to assembler relocation type + * output array cbt[] + * + * functions called: + * none + * + * side effects: + * Pointers to data and relocation buffers incremented by 3. + */ + +VOID +out_l24(int n, int t) +{ + if (hilo) { + out_lb(byte3(n),t ? t|R_HIGH : 0); + out_lb(hibyte(n),t); + out_lb(lobyte(n),t); + } else { + out_lb(lobyte(n),t); + out_lb(hibyte(n),t); + out_lb(byte3(n),t ? t|R_HIGH : 0); + } +} + +/*)Function VOID out_rw(n) + * + * int n data word + * + * The function out_rw() outputs the relocation (R) + * data word as two bytes ordered according to hilo. + * + * local variables: + * int * relp pointer to rel array + * + * global variables: + * none + * + * functions called: + * int lobyte() asout.c + * int hibyte() asout.c + * + * side effects: + * Pointer to relocation buffer incremented by 2. + */ + +VOID +out_rw(register int n) +{ + if (hilo) { + *relp++ = hibyte(n); + *relp++ = lobyte(n); + } else { + *relp++ = lobyte(n); + *relp++ = hibyte(n); + } +} + +/*)Function VOID out_tw(n) + * + * int n data word + * + * The function out_tw() outputs the text (T) + * data word as two bytes ordered according to hilo. + * + * local variables: + * int * txtp pointer to txt array + * + * global variables: + * none + * + * functions called: + * int lobyte() asout.c + * int hibyte() asout.c + * + * side effects: + * Pointer to relocation buffer incremented by 2. + */ + +VOID +out_tw(register int n) +{ + if (hilo) { + *txtp++ = hibyte(n); + *txtp++ = lobyte(n); + } else { + *txtp++ = lobyte(n); + *txtp++ = hibyte(n); + } +} + +/*)Function VOID out_t24(n) + * + * int n data word + * + * The function out_t24() outputs the text (T) + * data word as three bytes ordered according to hilo. + * + * local variables: + * int * txtp pointer to txt array + * + * global variables: + * none + * + * functions called: + * int lobyte() asout.c + * int hibyte() asout.c + * + * side effects: + * Pointer to relocation buffer incremented by 3. + */ + +VOID +out_t24(int n) +{ + if (hilo) { + *txtp++ = byte3(n); + *txtp++ = hibyte(n); + *txtp++ = lobyte(n); + } else { + *txtp++ = lobyte(n); + *txtp++ = hibyte(n); + *txtp++ = byte3(n); + } +} + +/*)Function int lobyte(n) + * + * int n data word + * + * The function lobyte() returns the lower byte of + * integer n. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ + +int +lobyte(int n) +{ + return (n&0377); +} + +/*)Function int hibyte(n) + * + * int n data word + * + * The function hibyte() returns the higher byte of + * integer n. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ + +int +hibyte(int n) +{ + return ((n>>8)&0377); +} + +/*)Function int byte3(n) + * + * int n 24 bit data + * + * The function byte3() returns the MSB of the + * 24 bit integer n. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ +int +byte3(int n) +{ + return ((n >> 16) & 0xff); +} + +/* + * JLH: Output relocatable 11 bit jump/call + * + * This function is derived from outrw(), adding the parameter for the + * 11 bit address. This form of address is used only on the 8051 and 8048. + */ +VOID +outr11(register struct expr *esp, int op, int r) +{ + register int n; + + if (pass == 2) { + if (esp->e_flag==0 && esp->e_base.e_ap==NULL) { + /* Absolute destination. + * Listing shows only the address. + */ + out_lw(esp->e_addr,0); + if (oflag) { + outchk(3, 0); + out_tw(esp->e_addr); + *txtp++ = op; + + write_rmode(r); + *relp++ = txtp - txt - 3; + out_rw(0xFFFF); + } + } else { + /* Relocatable destination. Build THREE + * byte output: relocatable word, followed + * by op-code. Linker will combine them. + * Listing shows only the address. + */ + r |= R_WORD | esp->e_rlcf; + out_lw(esp->e_addr,r|R_RELOC); + if (oflag) { + outchk(3, 5); + out_tw(esp->e_addr); + *txtp++ = op; + + if (esp->e_flag) { + n = esp->e_base.e_sp->s_ref; + r |= R_SYM; + } else { + n = esp->e_base.e_ap->a_ref; + } + write_rmode(r); + *relp++ = txtp - txt - 3; + out_rw(n); + } + } + } + dot.s_addr += 2; +} + +/* + * Output relocatable 19 bit jump/call + * + * This function is derived from outrw(), adding the parameter for the + * 19 bit address. This form of address is used only in the DS80C390 + * Flat24 mode. + */ +VOID +outr19(struct expr * esp, int op, int r) +{ + register int n; + + if (pass == 2) { + if (esp->e_flag==0 && esp->e_base.e_ap==NULL) { + /* Absolute destination. + * Listing shows only the address. + */ + out_lw(esp->e_addr,0); + if (oflag) { + outchk(4, 0); + out_t24(esp->e_addr); + *txtp++ = op; + + write_rmode(r); + *relp++ = txtp - txt - 4; + out_rw(0xFFFF); + } + } else { + /* Relocatable destination. Build FOUR + * byte output: relocatable 24-bit entity, followed + * by op-code. Linker will combine them. + * Listing shows only the address. + */ + r |= R_WORD | esp->e_rlcf; + out_l24(esp->e_addr,r|R_RELOC); + if (oflag) { + outchk(4, 5); + out_t24(esp->e_addr); + *txtp++ = op; + + if (esp->e_flag) { + n = esp->e_base.e_sp->s_ref; + r |= R_SYM; + } else { + n = esp->e_base.e_ap->a_ref; + } + write_rmode(r); + *relp++ = txtp - txt - 4; + out_rw(n); + } + } + } + dot.s_addr += 3; +} diff --git a/as/mcs51/assubr.c b/as/mcs51/assubr.c new file mode 100644 index 0000000..f21c847 --- /dev/null +++ b/as/mcs51/assubr.c @@ -0,0 +1,282 @@ +/* assubr.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include +#include "asm.h" + +/*)Module assubr.c + * + * The module assubr.c contains the error + * processing routines. + * + * assubr.c contains the following functions: + * VOID aerr() + * VOID diag() + * VOID err() + * VOID qerr() + * VOID rerr() + * + * assubr.c contains the local array of *error[] + */ + +/*)Function VOID err(c) + * + * int c error type character + * + * The function err() logs the error code character + * suppressing duplicate errors. If the error code + * is 'q' then the parse of the current assembler-source + * text line is terminated. + * + * local variables: + * char * p pointer to the error array + * + * global variables: + * char eb[] array of generated error codes + * + * functions called: + * VOID longjmp() c_library + * + * side effects: + * The error code may be inserted into the + * error code array eb[] or the parse terminated. + */ + +VOID +err(c) +register int c; +{ + register char *p; + + aserr++; + p = eb; + while (p < ep) + if (*p++ == c) + return; + if (p < &eb[NERR]) { + *p++ = c; + ep = p; + } + if (c == 'q') + longjmp(jump_env, -1); +} + +/*)Function VOID diag() + * + * The function diag() prints any error codes and + * the source line number to the stderr output device. + * + * local variables: + * char * p pointer to error code array eb[] + * + * global variables: + * int cfile current source file index + * char eb[] array of generated error codes + * char * ep pointer into error list + * int incfile current include file index + * char incfn[] array of include file names + * int incline[] array of include line numbers + * char srcfn[] array of source file names + * int srcline[] array of source line numbers + * FILE * stderr c_library + * + * functions called: + * int fprintf() c_library + * char * geterr() assubr.c + * + * side effects: + * none + */ + +extern int fatalErrors; + +VOID +diag() +{ + register char *p,*errstr; + + if (eb != ep) { + fatalErrors++; + p = eb; + fprintf(stderr, "?ASxxxx-Error-<"); + while (p < ep) { + fprintf(stderr, "%c", *p++); + } + fprintf(stderr, "> in line "); + if (incfil >= 0) { + fprintf(stderr, "%d", incline[incfil]); + fprintf(stderr, " of %s\n", incfn[incfil]); + } else { + fprintf(stderr, "%d", srcline[cfile]); + fprintf(stderr, " of %s\n", srcfn[cfile]); + } + p = eb; + while (p < ep) { + if ((errstr = geterr(*p++)) != NULL) { + fprintf(stderr, " %s\n", errstr); + } + } + } +} + +/*)Function VOID warnBanner() + * + * The function warnBanner() prints a generic warning message + * header (including the current source file/line) and positions + * the output for a more specific warning message. + * + * It is assumed that the call to warnBanner will be followed with + * a fprintf to stderr (or equivalent) with the specific warning + * text. + * + * local variables: + * none + * + * global variables: + * int cfile current source file index + * int incfile current include file index + * char incfn[] array of include file names + * int incline[] array of include line numbers + * char srcfn[] array of source file names + * int srcline[] array of source line numbers + * FILE * stderr c_library + * + * functions called: + * int fprintf() c_library + * + * side effects: + * none + */ +VOID +warnBanner(void) +{ + fprintf(stderr, "?ASxxxx-Warning in line "); + if (incfil >= 0) { + fprintf(stderr, "%d", incline[incfil]); + fprintf(stderr, " of %s\n", incfn[incfil]); + } else { + fprintf(stderr, "%d", srcline[cfile]); + fprintf(stderr, " of %s\n", srcfn[cfile]); + } + fprintf(stderr, " "); +} + +/*)Functions: VOID aerr() + * VOID qerr() + * VOID rerr() + * + * The functions aerr(), qerr(), and rerr() report their + * respective error type. These are included only for + * convenience. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * VOID err() assubr.c + * + * side effects: + * The appropriate error code is inserted into the + * error array and the parse may be terminated. + */ + +/* + * Note an 'r' error. + */ +VOID +rerr() +{ + err('r'); +} + +/* + * Note an 'a' error. + */ +VOID +aerr() +{ + err('a'); +} + +/* + * Note a 'q' error. + */ +VOID +qerr() +{ + err('q'); +} + +/* + * ASxxxx assembler errors + */ +char *errors[] = { + "<.> use \". = . + \" not \". = \"", + " machine specific addressing or addressing mode error", + " direct page boundary error", + " direct page addressing error", + " .include file error or an .if/.endif mismatch", + " multiple definitions error", + " .org in REL area or directive / mnemonic error", + "

phase error: label location changing between passes 2 and 3", + " missing or improper operators, terminators, or delimiters", + " relocation error", + " undefined symbol encountered during assembly", + NULL +}; + +/*)Function: char *getarr(c) + * + * int c the error code character + * + * The function geterr() scans the list of errors returning the + * error string corresponding to the input error character. + * + * local variables: + * int i error index counter + * + * global variables: + * char *errors[] array of pointers to the + * error strings + * + * functions called: + * none + * + * side effects: + * A pointer to the appropriate + * error code string is returned. + */ +char * +geterr(c) +int c; +{ + int i; + + for (i=0; errors[i]!=NULL; i++) { + if (c == errors[i][1]) { + return(errors[i]); + } + } + return(NULL); +} + diff --git a/as/mcs51/asx8051.dsp b/as/mcs51/asx8051.dsp new file mode 100644 index 0000000..6e3afef --- /dev/null +++ b/as/mcs51/asx8051.dsp @@ -0,0 +1,179 @@ +# Microsoft Developer Studio Project File - Name="asx8051" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Console Application" 0x0103 + +CFG=asx8051 - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "asx8051.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "asx8051.mak" CFG="asx8051 - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "asx8051 - Win32 Debug" (based on "Win32 (x86) Console Application") +!MESSAGE "asx8051 - Win32 Release" (based on "Win32 (x86) Console Application") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "asx8051 - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "MLH_MAP" /FR /FD /GZ /c +# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I "." /I "../../support/Util" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "MLH_MAP" /FR /FD /GZ /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 /nologo /subsystem:console /debug /machine:I386 /out:"..\..\bin_vc\asx8051.exe" /pdbtype:sept +# ADD LINK32 /nologo /subsystem:console /debug /machine:I386 /out:"..\..\bin_vc\asx8051.exe" /pdbtype:sept + +!ELSEIF "$(CFG)" == "asx8051 - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Ignore_Export_Lib 0 +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /ML /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "MLH_MAP" /FD /c +# ADD CPP /nologo /ML /W3 /GX /O2 /I "." /I "../../support/Util" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "MLH_MAP" /FD /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 /nologo /subsystem:console /machine:I386 /out:"..\..\bin_vc\asx8051.exe" /pdbtype:sept +# ADD LINK32 /nologo /subsystem:console /machine:I386 /out:"..\..\bin_vc\asx8051.exe" /pdbtype:sept + +!ENDIF + +# Begin Target + +# Name "asx8051 - Win32 Debug" +# Name "asx8051 - Win32 Release" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\asdata.c +# End Source File +# Begin Source File + +SOURCE=.\asexpr.c +# End Source File +# Begin Source File + +SOURCE=..\asxxsrc\aslex.c +# End Source File +# Begin Source File + +SOURCE=.\aslist.c +# End Source File +# Begin Source File + +SOURCE=.\asmain.c +# End Source File +# Begin Source File + +SOURCE=..\asxxsrc\asnoice.c +# End Source File +# Begin Source File + +SOURCE=.\asout.c +# End Source File +# Begin Source File + +SOURCE=.\assubr.c +# End Source File +# Begin Source File + +SOURCE=..\asxxsrc\assym.c +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf.c +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf_string.c +# End Source File +# Begin Source File + +SOURCE=.\i51adr.c +# End Source File +# Begin Source File + +SOURCE=.\i51ext.c +# End Source File +# Begin Source File + +SOURCE=.\i51mch.c +# End Source File +# Begin Source File + +SOURCE=.\i51pst.c +# End Source File +# Begin Source File + +SOURCE=..\asxxsrc\strcmpi.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=.\asm.h +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf.h +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf_string.h +# End Source File +# Begin Source File + +SOURCE=.\i8051.h +# End Source File +# Begin Source File + +SOURCE=..\..\sdcc_vc.h +# End Source File +# End Group +# End Target +# End Project diff --git a/as/mcs51/clean.mk b/as/mcs51/clean.mk new file mode 100644 index 0000000..c36ba5e --- /dev/null +++ b/as/mcs51/clean.mk @@ -0,0 +1,23 @@ +# Deleting all files created by building the program +# -------------------------------------------------- +include $(top_builddir)/Makefile.common + +clean: mostlyclean + rm -f *.dep + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f Makefile + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + rm -f $(top_builddir)/bin/asx8051$(EXEEXT) asx8051$(EXEEXT) + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean diff --git a/as/mcs51/conf.mk b/as/mcs51/conf.mk new file mode 100644 index 0000000..e0e3431 --- /dev/null +++ b/as/mcs51/conf.mk @@ -0,0 +1,10 @@ +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_prjdir) && $(SHELL) ./config.status + +# End of conf.mk diff --git a/as/mcs51/i51adr.c b/as/mcs51/i51adr.c new file mode 100644 index 0000000..87a00af --- /dev/null +++ b/as/mcs51/i51adr.c @@ -0,0 +1,267 @@ +/* i51adr.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * Ported from 8085 to 8051 by John Hartman 30-Apr-1995 + * Continued, 29-May-95 + */ + +#include +#include +#include "asm.h" +#include "i8051.h" + +extern int admode (struct adsym *); + +struct adsym reg51[] = { /* R0 thru R7 registers */ +{ "R0", R0}, +{ "R1", R1}, +{ "R2", R2}, +{ "R3", R3}, +{ "R4", R4}, +{ "R5", R5}, +{ "R6", R6}, +{ "R7", R7}, +{ "A", A}, +{ "DPTR", DPTR}, +{ "PC", PC}, +{ "C", C}, +{ "AB", AB}, +{ "r0", R0}, +{ "r1", R1}, +{ "r2", R2}, +{ "r3", R3}, +{ "r4", R4}, +{ "r5", R5}, +{ "r6", R6}, +{ "r7", R7}, +{ "a", A}, +{ "dptr", DPTR}, +{ "pc", PC}, +{ "c", C}, +{ "ab", AB}, +{ "", 0x00} +}; + +/* Classify argument as to address mode */ +int +addr(esp) +register struct expr *esp; +{ + register int c; + register unsigned rd; + + if ((c = getnb()) == '#') { + /* Immediate mode */ + expr(esp, 0); + esp->e_mode = S_IMMED; + } + else if (c == '@') { + /* choices are @R0, @R1, @DPTR, @A+PC, @A+DPTR */ + switch (reg()) { + case R0: + esp->e_mode = S_AT_R; + esp->e_addr = R0; + break; + case R1: + esp->e_mode = S_AT_R; + esp->e_addr = R1; + break; + case DPTR: + esp->e_mode = S_AT_DP; + esp->e_addr = DPTR; + break; + case A: + if (getnb() == '+') { + rd = reg(); + if (rd == PC) { + esp->e_mode = S_AT_APC; + esp->e_addr = 0; + } else if (rd == DPTR) { + esp->e_mode = S_AT_ADP; + esp->e_addr = 0; + } else { + aerr(); + } + } else + aerr(); + break; + } + + esp->e_flag = 0; + esp->e_base.e_ap = NULL; + } + else if (c == '*') { + /* Force direct page */ + expr(esp, 0); + esp->e_mode = S_DIR; + if (esp->e_addr & ~0xFF) + err('d'); + } + else if (c == '/') { + /* Force inverted bit */ + expr(esp, 0); + esp->e_mode = S_NOT_BIT; + if (esp->e_addr & ~0xFF) + err('d'); + } + else { + unget(c); + + /* try for register: A, AB, R0-R7, DPTR, PC, Cy */ + if ((esp->e_addr = admode(reg51)) != -1) { + switch (esp->e_addr) { + case A: + esp->e_mode = S_A; + break; + case AB: + esp->e_mode = S_RAB; + break; + case DPTR: + esp->e_mode = S_DPTR; + break; + case PC: + esp->e_mode = S_PC; + break; + case C: + esp->e_mode = S_C; + break; + default: + /* R0-R7 */ + esp->e_mode = S_REG; + } + } else { + /* Must be an expression */ + expr(esp, 0); + if ((!esp->e_flag) + && (esp->e_base.e_ap==NULL) + && !(esp->e_addr & ~0xFF)) { + esp->e_mode = S_DIR; + } else { + esp->e_mode = S_EXT; + } + } + } + return (esp->e_mode); +} + + +/* + * any --- does str contain c? + */ +int +any(c,str) +char c, *str; +{ + while (*str) + if(*str++ == c) + return(1); + return(0); +} + +int +srch(str) +register char *str; +{ + register const char *ptr; + ptr = ip; + +#if CASE_SENSITIVE + while (*ptr && *str) { + if(*ptr != *str) + break; + ptr++; + str++; + } + if (*ptr == *str) { + ip = ptr; + return(1); + } +#else + while (*ptr && *str) { + if(ccase[*ptr] != ccase[*str]) + break; + ptr++; + str++; + } + if (ccase[*ptr] == ccase[*str]) { + ip = ptr; + return(1); + } +#endif + + if (!*str) + if (any(*ptr," \t\n,];")) { + ip = ptr; + return(1); + } + return(0); +} + +/* + * Enter admode() to search a specific addressing mode table + * for a match. Return the addressing value on a match or + * -1 for no match. + */ +int +admode(sp) +register struct adsym *sp; +{ + register char *ptr; + register int i; + unget(getnb()); + i = 0; + while ( *(ptr = (char *) &sp[i]) ) { + if (srch(ptr)) { + return(sp[i].a_val); + } + i++; + } + return(-1); +} + +/* + * srch --- does string match ? + */ + +/* + * Read a register name. Return register value, -1 if no register found + */ +int +reg() +{ + register struct mne *mp; + char id[NCPS]; + + getid(id, -1); + if ((mp = mlookup(id))==NULL) { + aerr(); + return (-1); + } + switch (mp->m_type) { + case S_A: + case S_AB: + case S_DPTR: + case S_PC: + case S_REG: + return (mp->m_valu); + + default: + return (-1); + } +} diff --git a/as/mcs51/i51ext.c b/as/mcs51/i51ext.c new file mode 100644 index 0000000..60efc63 --- /dev/null +++ b/as/mcs51/i51ext.c @@ -0,0 +1,30 @@ +/* i51ext.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * Ported from 8085 to 8051 by John Hartman 30-Apr-1995 + */ + +#include +#include +#include "asm.h" +#include "i8051.h" + +char *cpu = "Intel 8051"; +int hilo = 1; +char *dsft = "ASM"; diff --git a/as/mcs51/i51mch.c b/as/mcs51/i51mch.c new file mode 100644 index 0000000..df73096 --- /dev/null +++ b/as/mcs51/i51mch.c @@ -0,0 +1,725 @@ +/* i85mch.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 28-Oct-97 Ported from 8085 to 8051 by John Hartman + */ + +#include +#include +#include "asm.h" +#include "i8051.h" + +extern int addr(struct expr *); +/* + * Process machine ops. + */ +VOID +machine(struct mne *mp) +{ + register unsigned op; + register int t, t1, v1; + struct expr e, e1, e2; + + clrexpr(&e); + clrexpr(&e1); + clrexpr(&e2); + + op = mp->m_valu; + switch (mp->m_type) { + + case S_INH: + outab(op); + break; + + case S_JMP11: + /* ACALL or AJMP. In Flat24 mode, this is a + * 19 bit destination; in 8051 mode, this is a + * 11 bit destination. + * + * The opcode is merged with the address in a + * hack-o-matic fashion by the linker. + */ + expr(&e, 0); + if (flat24Mode) + { + outr19(&e, op, R_J19); + } + else + { + outr11(&e, op, R_J11); + } + break; + + case S_JMP16: + /* LCALL or LJMP. In Flat24 mode, this is a 24 bit + * destination; in 8051 mode, this is a 16 bit + * destination. + */ + expr(&e, 0); + outab(op); + if (flat24Mode) + { + outr24(&e, 0); + } + else + { + outrw(&e, 0); + } + break; + + case S_ACC: + t = addr(&e); + if (t != S_A) + aerr(); + outab(op); + break; + + case S_TYP1: + /* A, direct, @R0, @R1, R0 to R7. "INC" also allows DPTR */ + t = addr(&e); + + switch (t) { + case S_A: + outab(op + 4); + break; + + case S_DIR: + case S_EXT: + /* Direct is also legal */ + outab(op + 5); + outrb(&e, R_PAG0); + break; + + case S_AT_R: + outab(op + 6 + e.e_addr); + break; + + case S_REG: + outab(op + 8 + e.e_addr); + break; + + case S_DPTR: + if (op != 0) + /* only INC (op=0) has DPTR mode */ + aerr(); + else + outab( 0xA3); + break; + + default: + aerr(); + } + break; + + case S_TYP2: + /* A,#imm; A,direct; A,@R0; A,@R1; A,R0 to A,R7 */ + t = addr(&e); + if (t != S_A) + aerr(); + comma(); + t1 = addr(&e1); + + switch (t1) { + case S_IMMED: + outab(op + 4); + outrb(&e1, 0); + break; + + case S_DIR: + case S_EXT: + outab(op + 5); + outrb(&e1, R_PAG0); + break; + + case S_AT_R: + outab(op + 6 + e1.e_addr); + break; + + case S_REG: + outab(op + 8 + (e1.e_addr)); + break; + + default: + aerr(); + } + break; + + case S_TYP3: + /* dir,A; dir,#imm; + * A,#imm; A,direct; A,@R0; A,@R1; A,R0 to A,R7 + * C,direct; C,/direct + */ + t = addr(&e); + comma(); + t1 = addr(&e1); + + switch (t) { + case S_DIR: + case S_EXT: + switch (t1) { + case S_A: + outab(op + 2); + outrb(&e, R_PAG0); + break; + + case S_IMMED: + outab(op + 3); + outrb(&e, 0); + outrb(&e1, 0); + break; + default: + aerr(); + } + break; + + case S_A: + switch (t1) { + case S_IMMED: + outab(op + 4); + outrb(&e1, 0); + break; + + case S_DIR: + case S_EXT: + outab(op + 5); + outrb(&e1, R_PAG0); + break; + + case S_AT_R: + outab(op + 6 + e1.e_addr); + break; + + case S_REG: + outab(op + 8 + e1.e_addr); + break; + + default: + aerr(); + } + break; + + case S_C: + /* XRL has no boolean version. Trap it */ + if (op == 0x60) + aerr(); + + switch (t1) { + case S_DIR: + case S_EXT: + outab(op + 0x32); + outrb(&e1, R_PAG0); + break; + + case S_NOT_BIT: + outab(op + 0x60); + outrb(&e1, 0); + break; + + default: + aerr(); + } + break; + + default: + aerr(); + } + break; + + case S_TYP4: + /* A,direct; A,@R0; A,@R1; A,R0 to A,R7 */ + t = addr(&e); + if (t != S_A) + aerr(); + comma(); + t1 = addr(&e1); + + switch (t1) { + case S_DIR: + case S_EXT: + outab(op + 5); + outrb(&e1, R_PAG0); + break; + + case S_AT_R: + outab(op + 6 + e1.e_addr); + break; + + case S_REG: + outab(op + 8 + e1.e_addr); + break; + + default: + aerr(); + } + break; + + /* MOV instruction, all modes */ + case S_MOV: + t = addr(&e); + comma(); + t1 = addr(&e1); + + switch (t) { + case S_A: + switch (t1) { + case S_IMMED: + outab(0x74); + outrb(&e1, 0); + break; + + case S_DIR: + case S_EXT: + outab(0xE5); + outrb(&e1, R_PAG0); + break; + + case S_AT_R: + outab(0xE6 + e1.e_addr); + break; + + case S_REG: + outab(0xE8 + e1.e_addr); + break; + + default: + aerr(); + } + break; + + case S_REG: + switch (t1) { + case S_A: + outab(0xF8 + e.e_addr); + break; + + case S_IMMED: + outab(0x78 + e.e_addr); + outrb(&e1, 0); + break; + + case S_DIR: + case S_EXT: + outab(0xA8 + e.e_addr); + outrb(&e1, R_PAG0); + break; + + default: + aerr(); + } + break; + + case S_DIR: + case S_EXT: + switch (t1) { + case S_A: + outab(0xF5); + outrb(&e, R_PAG0); + break; + + case S_IMMED: + outab(0x75); + outrb(&e, R_PAG0); + outrb(&e1, 0); + break; + + case S_DIR: + case S_EXT: + outab(0x85); + outrb(&e1, R_PAG0); + outrb(&e, R_PAG0); + break; + + case S_AT_R: + outab(0x86 + e1.e_addr); + outrb(&e, R_PAG0); + break; + + case S_REG: + outab(0x88 + e1.e_addr); + outrb(&e, R_PAG0); + break; + + case S_C: + outab(0x92); + outrb(&e, R_PAG0); + break; + + default: + aerr(); + } + break; + + case S_AT_R: + switch (t1) { + case S_IMMED: + outab(0x76 + e.e_addr); + outrb(&e1, 0); + break; + + case S_DIR: + case S_EXT: + outab(0xA6 + e.e_addr); + outrb(&e1, R_PAG0); + break; + + case S_A: + outab(0xF6 + e.e_addr); + break; + + default: + aerr(); + } + break; + + case S_C: + if ((t1 != S_DIR) && (t1 != S_EXT)) + aerr(); + outab(0xA2); + outrb(&e1, R_PAG0); + break; + + case S_DPTR: + if (t1 != S_IMMED) + aerr(); + outab(0x90); + + /* mov DPTR, #immed: for Flat24 mode, + * #immed is a 24 bit constant. For 8051, + * it is a 16 bit constant. + */ + if (flat24Mode) + { + outr24(&e1, 0); + } + else + { + outrw(&e1, 0); + } + break; + + default: + aerr(); + } + break; + + case S_BITBR: + /* Branch on bit set/clear */ + t = addr(&e); + if ((t != S_DIR) && (t != S_EXT)) + aerr(); + comma(); + expr(&e1, 0); + outab(op); + outrb(&e, R_PAG0); + if (e1.e_base.e_ap == NULL || e1.e_base.e_ap == dot.s_area) { + v1 = e1.e_addr - dot.s_addr - 1; + if (pass==2 && ((v1 < -128) || (v1 > 127))) + aerr(); + outab(v1); + } else { + outrb(&e1, R_PCR); + } + if (e1.e_mode != S_USER) + rerr(); + break; + + case S_BR: + /* Relative branch */ + expr(&e1, 0); + outab(op); + if (e1.e_base.e_ap == NULL || e1.e_base.e_ap == dot.s_area) { + v1 = e1.e_addr - dot.s_addr - 1; + if (pass == 2 && ((v1 < -128) || (v1 > 127))) + aerr(); + outab(v1); + } else { + outrb(&e1, R_PCR); + } + if (e1.e_mode != S_USER) + rerr(); + break; + + case S_CJNE: + /* A,#; A,dir; @R0,#; @R1,#; Rn,# */ + t = addr(&e); + comma(); + t1 = addr(&e1); + comma(); + expr(&e2, 0); + switch (t) { + case S_A: + if (t1 == S_IMMED) { + outab(op + 4); + outrb(&e1, 0); + } + else if ((t1 == S_DIR) || (t1 == S_EXT)) { + outab(op + 5); + outrb(&e1, R_PAG0); + } + else + aerr(); + break; + + case S_AT_R: + outab(op + 6 + e.e_addr); + if (t1 != S_IMMED) + aerr(); + outrb(&e1, 0); + break; + + case S_REG: + outab(op + 8 + e.e_addr); + if (t1 != S_IMMED) + aerr(); + outrb(&e1, 0); + break; + + default: + aerr(); + } + + /* branch destination */ + if (e2.e_base.e_ap == NULL || e2.e_base.e_ap == dot.s_area) { + v1 = e2.e_addr - dot.s_addr - 1; + if (pass == 2 && ((v1 < -128) || (v1 > 127))) + aerr(); + outab(v1); + } else { + outrb(&e2, R_PCR); + } + if (e2.e_mode != S_USER) + rerr(); + break; + + case S_DJNZ: + /* Dir,dest; Reg,dest */ + t = addr(&e); + comma(); + expr(&e1, 0); + switch (t) { + + case S_DIR: + case S_EXT: + outab(op + 5); + outrb(&e, R_PAG0); + break; + + case S_REG: + outab(op + 8 + e.e_addr); + break; + + default: + aerr(); + } + + /* branch destination */ + if (e1.e_base.e_ap == NULL || e1.e_base.e_ap == dot.s_area) { + v1 = e1.e_addr - dot.s_addr - 1; + if (pass == 2 && ((v1 < -128) || (v1 > 127))) + aerr(); + outab(v1); + } else { + outrb(&e1, R_PCR); + } + if (e1.e_mode != S_USER) + rerr(); + break; + + case S_JMP: + /* @A+DPTR */ + t = addr(&e); + if (t != S_AT_ADP) + aerr(); + outab(op); + break; + + case S_MOVC: + /* A,@A+DPTR A,@A+PC */ + t = addr(&e); + if (t != S_A) + aerr(); + comma(); + t1 = addr(&e1); + if (t1 == S_AT_ADP) + outab(0x93); + else if (t1 == S_AT_APC) + outab(0x83); + else + aerr(); + break; + + case S_MOVX: + /* A,@DPTR A,@R0 A,@R1 @DPTR,A @R0,A @R1,A */ + t = addr(&e); + comma(); + t1 = addr(&e1); + + switch (t) { + case S_A: + switch (t1) { + case S_AT_DP: + outab(0xE0); + break; + case S_AT_R: + outab(0xE2 + e1.e_addr); + break; + default: + aerr(); + } + break; + + case S_AT_DP: + if (t1 == S_A) + outab(0xF0); + else + aerr(); + break; + + case S_AT_R: + if (t1 == S_A) + outab(0xF2 + e.e_addr); + else + aerr(); + break; + + default: + aerr(); + } + break; + + /* MUL/DIV A,B */ + case S_AB: + t = addr(&e); + if (t != S_RAB) + aerr(); + outab(op); + break; + + /* CLR or CPL: A, C, or bit */ + case S_ACBIT: + t = addr(&e); + switch (t) { + case S_A: + if (op == 0xB2) + outab(0xF4); + else + outab(0xE4); + break; + + case S_C: + outab(op+1); + break; + + case S_DIR: + case S_EXT: + outab(op); + outrb(&e, R_PAG0); + break; + + default: + aerr(); + } + break; + + /* SETB C or bit */ + case S_SETB: + t = addr(&e); + switch (t) { + case S_C: + outab(op+1); + break; + + case S_DIR: + case S_EXT: + outab(op); + outrb(&e, R_PAG0); + break; + + default: + aerr(); + } + break; + + /* direct */ + case S_DIRECT: + t = addr(&e); + if ((t != S_DIR) && (t != S_EXT)) { + aerr(); + break; + } + outab(op); + outrb(&e, R_PAG0); + break; + + /* XCHD A,@Rn */ + case S_XCHD: + t = addr(&e); + if (t != S_A) + aerr(); + comma(); + t1 = addr(&e1); + switch (t1) { + case S_AT_R: + outab(op + e1.e_addr); + break; + default: + aerr(); + } + break; + + default: + err('o'); + } +} + +/* + * Is the next character a comma ? + */ +int +comma() +{ + if (getnb() != ',') + qerr(); + return(1); +} + + /* + * Machine specific initialization + */ + VOID + minit() + { + static int beenHere=0; /* set non-zero if we have done that... */ + struct sym *sp; + struct PreDef *pd; + + /* First time only, add the pre-defined symbols to the symbol table*/ + if (beenHere == 0) { + pd = preDef; + while (*pd->id) { + sp = lookup(pd->id); + if (sp->s_type == S_NEW) { + sp->s_addr = pd->value; + sp->s_type = S_DIR; + } + pd++; + } + beenHere = 1; + } +} diff --git a/as/mcs51/i51pst.c b/as/mcs51/i51pst.c new file mode 100644 index 0000000..08225d8 --- /dev/null +++ b/as/mcs51/i51pst.c @@ -0,0 +1,483 @@ +/* i85pst.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 28-Oct-97 Ported from 8085 to 8051 by John Hartman + * 30-Jan-98 JLH: add memory-space flags for .AREA + */ + +#include +#include +#include "asm.h" +#include "i8051.h" + +struct mne mne[] = { + + /* machine */ + + /* system */ + + { NULL, "CON", S_ATYP, 0, A_CON}, + { NULL, "OVR", S_ATYP, 0, A_OVR}, + { NULL, "REL", S_ATYP, 0, A_REL}, + { NULL, "ABS", S_ATYP, 0, A_ABS}, + { NULL, "NOPAG", S_ATYP, 0, A_NOPAG}, + { NULL, "PAG", S_ATYP, 0, A_PAG}, + + { NULL, "CODE", S_ATYP, 0, A_CODE}, + { NULL, "DATA", S_ATYP, 0, A_DATA}, + { NULL, "XDATA", S_ATYP, 0, A_XDATA}, + { NULL, "BIT", S_ATYP, 0, A_BIT}, + + { NULL, ".byte", S_BYTE, 0, 0}, + { NULL, ".db", S_BYTE, 0, 0}, + { NULL, ".word", S_WORD, 0, 0}, + { NULL, ".dw", S_WORD, 0, 0}, + { NULL, ".ascii", S_ASCII, 0, 0}, + { NULL, ".asciz", S_ASCIZ, 0, 0}, + { NULL, ".blkb", S_BLK, 0, 1}, + { NULL, ".ds", S_BLK, 0, 1}, + { NULL, ".blkw", S_BLK, 0, 2}, + { NULL, ".page", S_PAGE, 0, 0}, + { NULL, ".title", S_TITLE, 0, 0}, + { NULL, ".sbttl", S_SBTL, 0, 0}, + { NULL, ".globl", S_GLOBL, 0, 0}, + { NULL, ".area", S_DAREA, 0, 0}, + { NULL, ".even", S_EVEN, 0, 0}, + { NULL, ".odd", S_ODD, 0, 0}, + { NULL, ".if", S_IF, 0, 0}, + { NULL, ".else", S_ELSE, 0, 0}, + { NULL, ".endif", S_ENDIF, 0, 0}, + { NULL, ".include", S_INCL, 0, 0}, + { NULL, ".radix", S_RADIX, 0, 0}, + { NULL, ".org", S_ORG, 0, 0}, + { NULL, ".module", S_MODUL, 0, 0}, + { NULL, ".ascis", S_ASCIS, 0, 0}, + { NULL, ".flat24", S_FLAT24, 0, 0}, + { NULL, ".optsdcc", S_OPTSDCC, 0, 0}, + + /* 8051 */ + + { NULL, "a", S_A, 0, A}, + { NULL, "ab", S_AB, 0, 0}, + { NULL, "dptr", S_DPTR, 0, DPTR}, + { NULL, "pc", S_PC, 0, PC}, + { NULL, "r0", S_REG, 0, R0}, + { NULL, "r1", S_REG, 0, R1}, + { NULL, "r2", S_REG, 0, R2}, + { NULL, "r3", S_REG, 0, R3}, + { NULL, "r4", S_REG, 0, R4}, + { NULL, "r5", S_REG, 0, R5}, + { NULL, "r6", S_REG, 0, R6}, + { NULL, "r7", S_REG, 0, R7}, + + { NULL, "nop", S_INH, 0, 0x00}, + { NULL, "ret", S_INH, 0, 0x22}, + { NULL, "reti", S_INH, 0, 0x32}, + + { NULL, "ajmp", S_JMP11, 0, 0x01}, + { NULL, "acall", S_JMP11, 0, 0x11}, + { NULL, "ljmp", S_JMP16, 0, 0x02}, + { NULL, "lcall", S_JMP16, 0, 0x12}, + + { NULL, "rr", S_ACC, 0, 0x03}, + { NULL, "rrc", S_ACC, 0, 0x13}, + { NULL, "rl", S_ACC, 0, 0x23}, + { NULL, "rlc", S_ACC, 0, 0x33}, + { NULL, "swap", S_ACC, 0, 0xC4}, + { NULL, "da", S_ACC, 0, 0xD4}, + + { NULL, "inc", S_TYP1, 0, 0x00}, + { NULL, "dec", S_TYP1, 0, 0x10}, + + { NULL, "add", S_TYP2, 0, 0x20}, + { NULL, "addc", S_TYP2, 0, 0x30}, + { NULL, "subb", S_TYP2, 0, 0x90}, + + { NULL, "orl", S_TYP3, 0, 0x40}, + { NULL, "anl", S_TYP3, 0, 0x50}, + { NULL, "xrl", S_TYP3, 0, 0x60}, + + { NULL, "xch", S_TYP4, 0, 0xC0}, + + { NULL, "mov", S_MOV, 0, 0x00}, + + { NULL, "jbc", S_BITBR, 0, 0x10}, + { NULL, "jb", S_BITBR, 0, 0x20}, + { NULL, "jnb", S_BITBR, 0, 0x30}, + + { NULL, "jc", S_BR, 0, 0x40}, + { NULL, "jnc", S_BR, 0, 0x50}, + { NULL, "jz", S_BR, 0, 0x60}, + { NULL, "jnz", S_BR, 0, 0x70}, + { NULL, "sjmp", S_BR, 0, 0x80}, + + { NULL, "cjne", S_CJNE, 0, 0xB0}, + { NULL, "djnz", S_DJNZ, 0, 0xD0}, + { NULL, "jmp", S_JMP, 0, 0x73}, + { NULL, "movc", S_MOVC, 0, 0x83}, + { NULL, "movx", S_MOVX, 0, 0x00}, + { NULL, "div", S_AB, 0, 0x84}, + { NULL, "mul", S_AB, 0, 0xA4}, + { NULL, "clr", S_ACBIT, 0, 0xC2}, + { NULL, "cpl", S_ACBIT, 0, 0xB2}, + { NULL, "setb", S_SETB, 0, 0xD2}, + { NULL, "push", S_DIRECT, 0, 0xC0}, + { NULL, "pop", S_DIRECT, 0, 0xD0}, + { NULL, "xchd", S_XCHD, S_END, 0xD6} +}; + +struct PreDef preDef[] = { + {"AC", 0x00D6}, + {"ac", 0x00D6}, + {"A", 0x00D6}, + {"a", 0x00D6}, + {"ACC", 0x00E0}, + {"acc", 0x00E0}, + {"ACC.0", 0x00E0}, + {"ACC.1", 0x00E1}, + {"ACC.2", 0x00E2}, + {"ACC.3", 0x00E3}, + {"ACC.4", 0x00E4}, + {"ACC.5", 0x00E5}, + {"ACC.6", 0x00E6}, + {"ACC.7", 0x00E7}, + {"acc.0", 0x00E0}, + {"acc.1", 0x00E1}, + {"acc.2", 0x00E2}, + {"acc.3", 0x00E3}, + {"acc.4", 0x00E4}, + {"acc.5", 0x00E5}, + {"acc.6", 0x00E6}, + {"acc.7", 0x00E7}, + {"B", 0x00F0}, + {"B.0", 0x00F0}, + {"B.1", 0x00F1}, + {"B.2", 0x00F2}, + {"B.3", 0x00F3}, + {"B.4", 0x00F4}, + {"B.5", 0x00F5}, + {"B.6", 0x00F6}, + {"B.7", 0x00F7}, + {"b", 0x00F0}, + {"b.0", 0x00F0}, + {"b.1", 0x00F1}, + {"b.2", 0x00F2}, + {"b.3", 0x00F3}, + {"b.4", 0x00F4}, + {"b.5", 0x00F5}, + {"b.6", 0x00F6}, + {"b.7", 0x00F7}, + {"CPRL2", 0x00C8}, + {"cprl2", 0x00C8}, + {"CT2", 0x00C9}, + {"ct2", 0x00C9}, + {"CY", 0x00D7}, + {"cy", 0x00D7}, + {"DPH", 0x0083}, + {"DPL", 0x0082}, + {"dph", 0x0083}, + {"dpl", 0x0082}, + {"EA", 0x00AF}, + {"ea", 0x00AF}, + {"ES", 0x00AC}, + {"es", 0x00AC}, + {"ET0", 0x00A9}, + {"et0", 0x00A9}, + {"ET1", 0x00AB}, + {"et1", 0x00AB}, + {"ET2", 0x00AD}, + {"et2", 0x00AD}, + {"EX0", 0x00A8}, + {"ex0", 0x00A8}, + {"EX1", 0x00AA}, + {"ex1", 0x00AA}, + {"EXEN2", 0x00CB}, + {"exen2", 0x00CB}, + {"EXF2", 0x00CE}, + {"exf2", 0x00CE}, + {"F0", 0x00D5}, + {"f0", 0x00D5}, + {"IE", 0x00A8}, + {"IE.0", 0x00A8}, + {"IE.1", 0x00A9}, + {"IE.2", 0x00AA}, + {"IE.3", 0x00AB}, + {"IE.4", 0x00AC}, + {"IE.5", 0x00AD}, + {"IE.7", 0x00AF}, + {"ie", 0x00A8}, + {"ie.0", 0x00A8}, + {"ie.1", 0x00A9}, + {"ie.2", 0x00AA}, + {"ie.3", 0x00AB}, + {"ie.4", 0x00AC}, + {"ie.5", 0x00AD}, + {"ie.7", 0x00AF}, + {"IE0", 0x0089}, + {"ie0", 0x0089}, + {"IE1", 0x008B}, + {"ie1", 0x008B}, + {"INT0", 0x00B2}, + {"int0", 0x00B2}, + {"INT1", 0x00B3}, + {"int1", 0x00B3}, + {"IP", 0x00B8}, + {"IP.0", 0x00B8}, + {"IP.1", 0x00B9}, + {"IP.2", 0x00BA}, + {"IP.3", 0x00BB}, + {"IP.4", 0x00BC}, + {"IP.5", 0x00BD}, + {"ip", 0x00B8}, + {"ip.0", 0x00B8}, + {"ip.1", 0x00B9}, + {"ip.2", 0x00BA}, + {"ip.3", 0x00BB}, + {"ip.4", 0x00BC}, + {"ip.5", 0x00BD}, + {"IT0", 0x0088}, + {"it0", 0x0088}, + {"IT1", 0x008A}, + {"it1", 0x008A}, + {"OV", 0x00D2}, + {"ov", 0x00D2}, + {"P", 0x00D0}, + {"p", 0x00D0}, + {"P0", 0x0080}, + {"P0.0", 0x0080}, + {"P0.1", 0x0081}, + {"P0.2", 0x0082}, + {"P0.3", 0x0083}, + {"P0.4", 0x0084}, + {"P0.5", 0x0085}, + {"P0.6", 0x0086}, + {"P0.7", 0x0087}, + {"p0", 0x0080}, + {"p0.0", 0x0080}, + {"p0.1", 0x0081}, + {"p0.2", 0x0082}, + {"p0.3", 0x0083}, + {"p0.4", 0x0084}, + {"p0.5", 0x0085}, + {"p0.6", 0x0086}, + {"p0.7", 0x0087}, + {"P1", 0x0090}, + {"P1.0", 0x0090}, + {"P1.1", 0x0091}, + {"P1.2", 0x0092}, + {"P1.3", 0x0093}, + {"P1.4", 0x0094}, + {"P1.5", 0x0095}, + {"P1.6", 0x0096}, + {"P1.7", 0x0097}, + {"p1", 0x0090}, + {"p1.0", 0x0090}, + {"p1.1", 0x0091}, + {"p1.2", 0x0092}, + {"p1.3", 0x0093}, + {"p1.4", 0x0094}, + {"p1.5", 0x0095}, + {"p1.6", 0x0096}, + {"p1.7", 0x0097}, + {"P2", 0x00A0}, + {"P2.0", 0x00A0}, + {"P2.1", 0x00A1}, + {"P2.2", 0x00A2}, + {"P2.3", 0x00A3}, + {"P2.4", 0x00A4}, + {"P2.5", 0x00A5}, + {"P2.6", 0x00A6}, + {"P2.7", 0x00A7}, + {"p2", 0x00A0}, + {"p2.0", 0x00A0}, + {"p2.1", 0x00A1}, + {"p2.2", 0x00A2}, + {"p2.3", 0x00A3}, + {"p2.4", 0x00A4}, + {"p2.5", 0x00A5}, + {"p2.6", 0x00A6}, + {"p2.7", 0x00A7}, + {"P3", 0x00B0}, + {"P3.0", 0x00B0}, + {"P3.1", 0x00B1}, + {"P3.2", 0x00B2}, + {"P3.3", 0x00B3}, + {"P3.4", 0x00B4}, + {"P3.5", 0x00B5}, + {"P3.6", 0x00B6}, + {"P3.7", 0x00B7}, + {"p3", 0x00B0}, + {"p3.0", 0x00B0}, + {"p3.1", 0x00B1}, + {"p3.2", 0x00B2}, + {"p3.3", 0x00B3}, + {"p3.4", 0x00B4}, + {"p3.5", 0x00B5}, + {"p3.6", 0x00B6}, + {"p3.7", 0x00B7}, + {"PCON", 0x0087}, + {"pcon", 0x0087}, + {"PS", 0x00BC}, + {"ps", 0x00BC}, + {"PSW", 0x00D0}, + {"PSW.0", 0x00D0}, + {"PSW.1", 0x00D1}, + {"PSW.2", 0x00D2}, + {"PSW.3", 0x00D3}, + {"PSW.4", 0x00D4}, + {"PSW.5", 0x00D5}, + {"PSW.6", 0x00D6}, + {"PSW.7", 0x00D7}, + {"psw", 0x00D0}, + {"psw.0", 0x00D0}, + {"psw.1", 0x00D1}, + {"psw.2", 0x00D2}, + {"psw.3", 0x00D3}, + {"psw.4", 0x00D4}, + {"psw.5", 0x00D5}, + {"psw.6", 0x00D6}, + {"psw.7", 0x00D7}, + {"PT0", 0x00B9}, + {"pt0", 0x00B9}, + {"PT1", 0x00BB}, + {"pt1", 0x00BB}, + {"PT2", 0x00BD}, + {"pt2", 0x00BD}, + {"PX0", 0x00B8}, + {"px0", 0x00B8}, + {"PX1", 0x00BA}, + {"px1", 0x00BA}, + {"RB8", 0x009A}, + {"rb8", 0x009A}, + {"RCAP2H", 0x00CB}, + {"rcap2h", 0x00CB}, + {"RCAP2L", 0x00CA}, + {"rcap2l", 0x00CA}, + {"RCLK", 0x00CD}, + {"rclk", 0x00CD}, + {"REN", 0x009C}, + {"ren", 0x009C}, + {"RI", 0x0098}, + {"ri", 0x0098}, + {"RS0", 0x00D3}, + {"rs0", 0x00D3}, + {"RS1", 0x00D4}, + {"rs1", 0x00D4}, + {"rxd", 0x00B0}, + {"RXD", 0x00B0}, + {"SBUF", 0x0099}, + {"sbuf", 0x0099}, + {"SCON", 0x0098}, + {"SCON.0", 0x0098}, + {"SCON.1", 0x0099}, + {"SCON.2", 0x009A}, + {"SCON.3", 0x009B}, + {"SCON.4", 0x009C}, + {"SCON.5", 0x009D}, + {"SCON.6", 0x009E}, + {"SCON.7", 0x009F}, + {"scon", 0x0098}, + {"scon.0", 0x0098}, + {"scon.1", 0x0099}, + {"scon.2", 0x009A}, + {"scon.3", 0x009B}, + {"scon.4", 0x009C}, + {"scon.5", 0x009D}, + {"scon.6", 0x009E}, + {"scon.7", 0x009F}, + {"SM0", 0x009F}, + {"sm0", 0x009F}, + {"SM1", 0x009E}, + {"sm1", 0x009E}, + {"SM2", 0x009D}, + {"sm2", 0x009D}, + {"SP", 0x0081}, + {"sp", 0x0081}, + {"T2CON", 0x00C8}, + {"T2CON.0",0x00C8}, + {"T2CON.1",0x00C9}, + {"T2CON.2",0x00CA}, + {"T2CON.3",0x00CB}, + {"T2CON.4",0x00CC}, + {"T2CON.5",0x00CD}, + {"T2CON.6",0x00CE}, + {"T2CON.7",0x00CF}, + {"t2con", 0x00C8}, + {"t2con.0",0x00C8}, + {"t2con.1",0x00C9}, + {"t2con.2",0x00CA}, + {"t2con.3",0x00CB}, + {"t2con.4",0x00CC}, + {"t2con.5",0x00CD}, + {"t2con.6",0x00CE}, + {"t2con.7",0x00CF}, + {"TB8", 0x009B}, + {"tb8", 0x009B}, + {"TCLK", 0x00CC}, + {"tclk", 0x00CC}, + {"TCON", 0x0088}, + {"TCON.0", 0x0088}, + {"TCON.1", 0x0089}, + {"TCON.2", 0x008A}, + {"TCON.3", 0x008B}, + {"TCON.4", 0x008C}, + {"TCON.5", 0x008D}, + {"TCON.6", 0x008E}, + {"TCON.7", 0x008F}, + {"tcon", 0x0088}, + {"tcon.0", 0x0088}, + {"tcon.1", 0x0089}, + {"tcon.2", 0x008A}, + {"tcon.3", 0x008B}, + {"tcon.4", 0x008C}, + {"tcon.5", 0x008D}, + {"tcon.6", 0x008E}, + {"tcon.7", 0x008F}, + {"TF0", 0x008D}, + {"tf0", 0x008D}, + {"TF1", 0x008F}, + {"tf1", 0x008F}, + {"TF2", 0x00CF}, + {"tf2", 0x00CF}, + {"TH0", 0x008C}, + {"th0", 0x008C}, + {"TH1", 0x008D}, + {"th1", 0x008D}, + {"TH2", 0x00CD}, + {"th2", 0x00CD}, + {"TI", 0x0099}, + {"ti", 0x0099}, + {"TL0", 0x008A}, + {"tl0", 0x008A}, + {"TL1", 0x008B}, + {"tl1", 0x008B}, + {"TL2", 0x00CC}, + {"tl2", 0x00CC}, + {"TMOD", 0x0089}, + {"tmod", 0x0089}, + {"TR0", 0x008C}, + {"tr0", 0x008C}, + {"TR1", 0x008E}, + {"tr1", 0x008E}, + {"TR2", 0x00CA}, + {"tr2", 0x00CA}, + {"TXD", 0x00B1}, + {"txd", 0x00B1}, + {"", 0x0000}, +}; diff --git a/as/mcs51/i8051.h b/as/mcs51/i8051.h new file mode 100644 index 0000000..fba39d8 --- /dev/null +++ b/as/mcs51/i8051.h @@ -0,0 +1,126 @@ +/* i8051.h + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * Ported from 8085 to 8051 by John Hartman 30-Apr-1995 + * Continued, 2-Jun-95 + */ + +/*)BUILD + $(PROGRAM) = AS8051 + $(INCLUDE) = { + ASM.H + I8051.H + } + $(FILES) = { + I51EXT.C + I51MCH.C + I51PST.C + ASMAIN.C + ASLEX.C + ASSYM.C + ASSUBR.C + ASEXPR.C + ASDATA.C + ASLIST.C + ASOUT.C + } + $(STACK) = 2000 +*/ + +/* + * Symbol types. + */ +#define S_INH 50 /* One byte inherent */ +#define S_JMP11 51 /* Jump and call 11 bit. */ +#define S_JMP16 52 /* Jump and call 16 bit */ +#define S_ACC 53 /* Accumulator */ +#define S_TYP1 54 /* Type 1 (inc and dec) */ +#define S_TYP2 55 /* Type 2 (arith ops) */ +#define S_TYP3 56 /* Type 3 (logic ops) */ +#define S_TYP4 57 /* Type 4 (XCH) */ +#define S_MOV 58 /* MOV */ +#define S_BITBR 59 /* bit branch */ +#define S_BR 60 /* branch */ +#define S_ACBIT 61 /* CLR, CPL */ +#define S_CJNE 62 /* CJNE */ +#define S_DJNZ 63 /* DJNZ */ +#define S_JMP 64 /* JMP */ +#define S_MOVC 65 /* MOVC */ +#define S_MOVX 66 /* MOVX */ +#define S_AB 67 /* AB (div and mul) */ +#define S_CPL 68 /* CPL */ +#define S_SETB 69 /* SETB */ +#define S_DIRECT 70 /* DIRECT (pusha and pop) */ +#define S_XCHD 71 /* XCHD */ + +/* Addressing modes */ +#define S_A 30 /* A */ +/* #define S_B 31 */ /* B */ +#define S_C 32 /* C (carry) */ +#define S_RAB 33 /* AB */ +#define S_DPTR 34 /* DPTR */ +#define S_REG 35 /* Register R0-R7 */ +#define S_IMMED 36 /* immediate */ +#define S_DIR 37 /* direct */ +#define S_EXT 38 /* extended */ +#define S_PC 39 /* PC (for addressing mode) */ + +#define S_AT_R 40 /* @R0 or @R1 */ +#define S_AT_DP 41 /* @DPTR */ +#define S_AT_APC 42 /* @A+PC */ +#define S_AT_ADP 43 /* @A+DPTR */ +#define S_NOT_BIT 44 /* /BIT (/DIR) */ + +/* + * Registers. Value == address in RAM, except for PC + */ +#define R0 0 +#define R1 1 +#define R2 2 +#define R3 3 +#define R4 4 +#define R5 5 +#define R6 6 +#define R7 7 +#define A 0xE0 +#define DPTR 0x82 +#define PC 0xFF /* dummy number for register ID only */ +#define AB 0xFE /* dummy number for register ID only */ +#define C 0xFD /* dummy number for register ID only */ + +struct adsym +{ + char a_str[5]; /* addressing string (length for DPTR+null)*/ + int a_val; /* addressing mode value */ +}; + +/* pre-defined symbol structure: name and value */ +struct PreDef +{ + char id[NCPS]; + int value; +}; +extern struct PreDef preDef[]; + + /* machine dependent functions */ + + /* i51mch.c */ +extern int comma(); +extern VOID minit(); +extern int reg(); diff --git a/as/mcs51/readme.390 b/as/mcs51/readme.390 new file mode 100644 index 0000000..80170bd --- /dev/null +++ b/as/mcs51/readme.390 @@ -0,0 +1,141 @@ +DS80C390 flat mode support + +2/4/2000 Kevin Vigor (e-mail: kevin at vigor.nu) + +I have hacked the 8051 assembler to support the 24 bit flat address mode of +the DS80C390 processor. This mode allows the chip to directly address up to +4 Meg of RAM. Details can be found at Dallas' web site: www.dalsemi.com. + +1: Assembler changes. + +24 bit mode is entered via a new assembler directive, .flat24. This directive +takes a mandatory argument, which is either the string "on" or the string +"off". ".flat24 on" enables 24-bit mode, and ".flat24 off" puts the assembler +into standard 8051 mode. + +Note that any .included files within a ".flat24 on" segment of the code will +be compiled in 24-bit mode. + +In 24-bit mode, 8 instructions have altered behavior. Of these, 5 modify +the instruction encoding, while 3 differ only in behavior. These +instructions are discussed in the DS80C390 User's Guide, but a summary is +included here: + +ACALL and AJMP now take a 19 bit offset instead of the 8051's 11 bit offset. +An extra address byte is added to the encoded instruction. + +LCALL and LJMP now take a 24 bit target address instead of the 8051's 16 bit +address. An extra address byte is added to the encoded instruction. + +MOV DPTR, #immed now takes a 24 bit immediate value instead of the 8051's 16 +bit address. An extra data byte is added to the encoded instruction. + +INC DPTR now increments the entire 24 bit DPTR. The encoding is not changed. + +RET and RETI restore the full 24 bit PC from the stack. The encoding is not +changed. + +2: Linker changes. + +The linker supports (through a variety of evil hacks) 19 bit ACALL/AJMP +relocations and 24 bit LCALL/LJMP/DPTR relocations. These changes should be +invisible to the user. + +The linker can now also generated extended linear address records in the +Intel hex output format. This is necessary for any areas located above the +64K mark. This is enabled by the "-r" linker flag, and is disabled by +default (but the linker will throw a warning if an extended address is +encountered without the -r flag being enabled). + +Note that for various reasons, areas may still not be larger than 64K. +However, they may be located anywhere in the 4 Meg address space via the +assembler .org directive (for ABS areas) or the linker "-b" option. + +3: Examples + +Note that this example uses ABS areas to make the layout obvious. This code +won't do anything useful at all, but demonstrates the instruction encoding +in .flat24 mode vs 8051 mode. + +; test1.asm +.area CODE (ABS) +.org 0 + +; SFRs not known to the assembler yet... +$TA = 0x00C7 +$ACON = 0x009D + +; Set the chip to 24 bit flat mode via the DS "timed access" procedure. +mov $TA, #0xAA +mov $TA, #0x55 +mov $ACON, #0x06 ; 10 bit stack & 24 bit flat addressing. + +.flat24 on ; Enable 24-bit mode. The AM1 bit had better be + ; on... + +mov dptr, #myData ; Valid on the '390: myData is in the FARDATA + ; area at 0x300001. + ; Generates: 90 30 00 01 +acall _junkNear ; Within 11 bit range, but still must generate + ; 19 bit address for '390 flat mode. + ; Generates: 11 04 00 +ajmp _junkFar ; Within 16 bit range. + ; Generates 01 08 00 +acall _junkReallyFar ; Within 19 bit range. + ; Generates 91 00 00 +lcall _junkReallyReallyFar ; Within 24 bit range. + ; Generates 12 08 00 00 + +; Set the chip to 8051 mode via the DS "timed access" procedure. +mov $TA, #0x0AA +mov $TA, #0x055 +mov $ACON, #0x00 ; 8 bit stack & 16 bit flat addressing. + +.flat24 off ; Now we're an 8051 again. The AM1 bit had better be + ; off... + +;mov dptr, #myData ; Can't do that: myData is too far away. +acall _junkNear ; Within 11 bit range. + ; Generates 91 00 +ljmp _junkFar ; Within 16 bit range; can't AJMP, but can LJMP + ; Generates 02 08 00 +ret + +.area CODE2 (ABS) +.org 0x400 +; This is within the 11 bit ACALL/AJMP range of the 8051. +_junkNear: +ret + +.area CODE3 (ABS) +.org 0x800 +; This is within the 390's 19 bit ACALL/AJMP range, and inside the stock +; 8051's 16 bit LCALL range. +_junkFar: +ret + +.area CODE4 (ABS) +; This is within the 390's 19 bit ACALL/AJMP range and outside the +; 8051's LCALL range. +; Note that to link an image with an area beyond 64K (like this one), +; the '-r' flag must be provided to the linker, and Intel Hex output format +; must be used. +.org 0x40000 +_junkReallyFar: +ret + +.area CODE5 (ABS) +; This is outside anybody's ACALL/AJMP range. +.org 0x80000 +_junkReallyReallyFar: +ret + +.area FARDATA (ABS) +.org 0x300000 +; This is way, way up there. +.byte 0x01 +myData: +.byte 0x02 + +; test1.asm ends. + diff --git a/as/xa51/Makefile.in b/as/xa51/Makefile.in new file mode 100644 index 0000000..87c4756 --- /dev/null +++ b/as/xa51/Makefile.in @@ -0,0 +1,43 @@ +VPATH = @srcdir@ + +CC = gcc +CFLAGS = -ggdb -Wall +YACC = bison -y -d +LEX = flex -i +LEXLIB = + +all: xa_rasm xa_link + +OBJECTS = xa_main.o xa_rasm.tab.o xa_rasm.lex.o + +xa_rasm: $(OBJECTS) + $(CC) -o xa_rasm $(OBJECTS) $(LEXLIB) + #strip xa_rasm + +xa_rasm.lex.o: xa_rasm.lex.c xa_rasm.tab.h xa_main.h + $(CC) $(CFLAGS) -c xa_rasm.lex.c + +xa_rasm.tab.o: xa_rasm.tab.c xa_rasm.tab.h xa_main.h + $(CC) $(CFLAGS) -c xa_rasm.tab.c + +xa_main.o: xa_main.c xa_main.h xa_version.h + $(CC) $(CFLAGS) -Wall -c xa_main.c + +xa_link.o: xa_link.c xa_main.h xa_version.h + $(CC) $(CFLAGS) -Wall -c xa_link.c + +xa_rasm.tab.c xa_rasm.tab.h: xa_rasm.y + $(YACC) xa_rasm.y + mv y.tab.c xa_rasm.tab.c + mv y.tab.h xa_rasm.tab.h + +xa_rasm.lex.c: xa_rasm.l + $(LEX) xa_rasm.l + mv lex.yy.c xa_rasm.lex.c + +all: xa_rasm + +clean: + rm -f *.tab.c *.tab.h *.lex.c *.o *.bak y.output *.hex *.lst *.obj + rm -f xa_rasm xa_link core *~ + diff --git a/as/xa51/xa_link.c b/as/xa51/xa_link.c new file mode 100644 index 0000000..a6823d2 --- /dev/null +++ b/as/xa51/xa_link.c @@ -0,0 +1,864 @@ +/* xa_link.c + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* WORK IN PROGRESS: do not watch this if you don't have the legal + age in your country to watch this. +*/ + +/* This is a cheap hack. The xa51 has a couple of ways to scramble + relocation info into it's opcode that the standard linker can't + handle, not to mention word allignment. + + No hash or qsort yet. + + The relocatable format looks like the known one, BUT ISN'T. + + The only things that are handled now are: + + "SDCCXA rel, version %f" must be the first line, sort of MAGIC word + "H %d areas %d global symbols" defines the # of areas and globals + "S [Ref0000 | DefXXXX | AbsXXXX]" Def's are supposed to be + defined in their own area/segment + "A size %d flags %d" switch to another segment. this can happen + multiple times and should be equal. flags is ignored for now + "T xxxx 0" + "R xxxx " the relocation info. xxxx is the address + within relative code space. How is something like REL_FF, REL_FFFF, + ABS_70FF. Symbol is the referenced symbol and pc+ is the program + counter that will be used to calculate the relative address (that is + the address of the following instruction). + + So, this is not a standalone linker. It will only link files generated + by xa_rasm, which will only process files generated by the xa51 sdcc + port. +*/ + +#include +#include +#include +#include + +#include "xa_version.h" + +enum { + // these are all concatenated into the code image + GSINIT=1, + CSEG, + XINIT, + + // here goes the final output and should be used by the assembler + GSFINAL, + + // these are only for storage + BSEG, + DSEG, + XSEG, + XISEG, + + // that's all + MAX_SEGMENTS +}; + +enum { + REL_FF=1, + REL_FFFF, + BIT_03FF, + DIR_07FF, + DIR_70FF, + DIR_0700FF, + ABS_0F, + ABS_FF, + ABS_FFFF, + ABS_PC, + MAX_REFS +}; + +char *refModes[]={ + "???", + "REL_FF", + "REL_FFFF", + "BIT_03FF", + "DIR_07FF", + "DIR_70FF", + "DIR_0700FF", + "ABS_0F", + "ABS_FF", + "ABS_FFFF", + "ABS_PC" +}; + +#define CODESIZE 0x10000 + +int fatalErrors=0; + +unsigned char gsinitImage[CODESIZE]; +unsigned char csegImage[CODESIZE]; +unsigned char xinitImage[CODESIZE]; +unsigned char gsfinalImage[CODESIZE]; + +struct SEGMENT { + short id; + char *name; + int hasSymbols; + int _size; + int start; + int current; + unsigned char *image; +} segments[MAX_SEGMENTS]={ + {0, "???", 0, 0, 0, 0, NULL}, + + {GSINIT, "GSINIT", 0, 0, 0, 0, gsinitImage}, + {CSEG, "CSEG", 0, 0, 0, 0, csegImage}, + {XINIT, "XINIT", 0, 0, 0, 0, xinitImage}, + {GSFINAL, "GSFINAL", 0, 0, 0, 0, gsfinalImage}, + + {BSEG, "BSEG", 0, 0, 0, 0, NULL}, + {DSEG, "DSEG", 0, 0, 0, 0, NULL}, + {XSEG, "XSEG", 0, 0, 0, 0, NULL}, + {XISEG, "XISEG", 0, 0, 0, 0, NULL}, +}; + +struct MODULE { + char *name; + int offset[MAX_SEGMENTS]; + int size[MAX_SEGMENTS]; + int isLib; + struct MODULE *next; + struct MODULE *last; +} *modules=NULL; + + +struct SYMBOL { + char *name; + struct MODULE *module; + int lineno; + struct SEGMENT *segment; + char absolute; + int address; + struct SYMBOL *next; + struct SYMBOL *last; +} *symbols=NULL; + +struct REFERENCE { + char *name; + struct MODULE *module; + struct SEGMENT *segment; + int lineno; + unsigned address, pc; + short how; + short resolved; + struct REFERENCE *next; + struct REFERENCE *last; +} *references=NULL; + +char *libraryPaths[128]; +int nlibPaths=0; +char *libraryFiles[128]; +int nlibFiles=0; + +static char outFileName[PATH_MAX]={'\0'}; +static char mapFileName[PATH_MAX]={'\0'}; +FILE *mapOut; + +struct SEGMENT *currentSegment; +struct MODULE *currentModule; +int currentLine; + +int howToReference(char *how) { + int r; + for (r=1; rnext) { + if (strcmp(symbol->name, symName)==0) { + return symbol; + } + } + return 0; +} + +struct MODULE *findModuleByName(char *modName) { + struct MODULE *module; + for (module=modules; module; module=module->next) { + if (strcmp(module->name, modName)==0) { + return module; + } + } + return NULL; +} + +void addToModules (char *name, int isLib) { + struct MODULE *module; + int s; + + module=calloc(1, sizeof(struct MODULE)); + module->name=strdup(name); + for (s=0; soffset[s]=(segments[s]._size+1)&0xfffffe; + } + module->isLib=isLib; + if (!modules) { + modules=module; + } else { + modules->last->next=module; + } + currentModule=modules->last=module; +} + +void addToRefs(char *ref, int address, char *how, int pc) { + struct REFERENCE *reference; + + reference=calloc(1, sizeof(struct REFERENCE)); + reference->name=strdup(ref); + reference->module=currentModule; + reference->segment=currentSegment; + reference->lineno=currentLine; + reference->address=address; + reference->how=howToReference(how); + if (reference->how==ABS_PC) { + reference->resolved=1; + } + reference->pc=pc; + if (!references) { + references=reference; + } else { + references->last->next=reference; + } + references->last=reference; +} + +void resolve() { + struct REFERENCE *reference; + for (reference=references; reference; reference=reference->next) { + if ((reference->how==ABS_PC) || findSymbolByName(reference->name)) { + reference->resolved=1; + } + } +} + +int isUnresolved(char *ref, int resolved) { + struct REFERENCE *reference; + + for (reference=references; reference; reference=reference->next) { + if (strcmp(reference->name, ref)==0) { + // found + if (reference->resolved) { + // already resolved + return 0; + } + if (resolved) { + reference->resolved=1; + return 1; + } + } + } + return 0; +} + +void addToDefs(char *def, int address, char absolute) { + struct SYMBOL *symbol; + + // no duplicates allowed + if ((symbol=findSymbolByName(def))) { + fprintf (stderr, "*** %s:%d duplicate symbol %s first defined in " + "module %s:%d\n", + currentModule->name, currentLine, def, + symbol->module->name, symbol->lineno); + fatalErrors++; + } + + symbol=calloc(1, sizeof(struct SYMBOL)); + symbol->name=strdup(def); + symbol->module=currentModule; + symbol->lineno=currentLine; + symbol->segment=currentSegment; + symbol->absolute=absolute; + symbol->address=currentModule->offset[currentSegment->id]+address; + if (!symbols) { + symbols=symbol; + } else { + symbols->last->next=symbol; + } + symbols->last=symbol; + currentSegment->hasSymbols++; +} + +void syntaxError (char *err) { + fprintf (stderr, "*** %s:%d error while parsing '%s'\n", + currentModule->name, currentLine, err); + fatalErrors++; +} + +void readModule(char *module, int isLib) { + double hisVersion; + char line[132]; + FILE *relModule; + char moduleName[PATH_MAX]; + int segments, globals; + + currentLine=1; + + if ((relModule=fopen(module, "r"))==NULL) { + perror (module); + exit (1); + } + + // first we need to check if this is a valid file + if (sscanf(fgets(line, 132, relModule), + "SDCCXA rel, version %lf", &hisVersion)!=1) { + fprintf (stderr, "*** %s is not a valid input file\n", module); + exit (1); + } + if (hisVersion!=version) { + fprintf (stderr, "*** WARNING: version conflict; " + "we(%1.1f) != %s(%1.1f)\n", + version, module, hisVersion); + } + currentLine++; + + // H 7 areas 168 global symbols + if (sscanf(fgets(line, 132, relModule), + "H %d areas %d global symbols", + &segments, &globals)!=2) { + syntaxError(line); + } + currentLine++; + + // M module + if (sscanf(fgets(line, 132, relModule), + "M %s", moduleName)!=1) { + syntaxError(line); + } + + // add this to the known modules with current offsets + addToModules(module, isLib); + + currentLine++; + + // now for the ASTR tags + while (fgets(line, 132, relModule)) { + switch (line[0]) + { + case 'A': { + char segment[32]; + int size, flags; + if (sscanf(line, "A %[^ ] size %d flags %d", + segment, &size, &flags)!=3) { + syntaxError(line); + } + // do we know this segment? + if (!(currentSegment=findSegmentByName(segment))) { + fprintf (stderr, "*** %s:%d unknown area: %s\n", module, + currentLine, segment); + exit (1); + } + // double check repeated 'A' records + if (currentModule->size[currentSegment->id]) { + // pleased to meet you again, I hope ... + if (currentModule->size[currentSegment->id] != size) { + fprintf (stderr, "*** %s:%d error %s size %d != %d\n", + module, currentLine, + currentSegment->name, + currentModule->size[currentSegment->id], + size); + fatalErrors++; + } + } else { + currentSegment->_size += size; + currentModule->size[currentSegment->id] = size; + } + // never mind about the flags for now + break; + } + case 'S': { + char symbol[132]; + char refdef[132]; + unsigned int address; + if (sscanf(line, "S %[^ ] %s", symbol, refdef)!=2) { + fprintf (stderr, "*** %s:%d syntax error near \"%s\"\n", + module, currentLine, line); + exit (1); + } + if (strncmp(refdef, "Ref", 3)==0) { + // we don't need them + } else if (strncmp(refdef, "Def", 3)==0) { + sscanf (refdef, "Def%04x", &address); + addToDefs(symbol, address, 0); + } else if (strncmp(refdef, "Abs", 3)==0) { + sscanf (refdef, "Abs%04x", &address); + addToDefs(symbol, address, 1); + } else { + fprintf (stderr, "%s:%d found invalid symbol definition \"%s\"\n", + module, currentLine, line); + exit (1); + } + break; + } + case 'T': { + unsigned int address; + unsigned int byte; + char *tline=NULL; + if (currentSegment->id!=CSEG && + currentSegment->id!=GSINIT && + currentSegment->id!=XINIT) { + fprintf (stderr, "%s:%d cannot emit bytes in %s\n", + module, currentLine, currentSegment->name); + exit (1); + } + if (sscanf(strtok(&line[2], " "), "%04x", &address)!=1) { + fprintf (stderr, "%s:%d error in T record\n", module, currentLine); + fatalErrors++; + } + + address+=currentModule->offset[currentSegment->id]; + //address+=currentSegment->current; + for ( ; + (tline=strtok(NULL, " \t\n")) && + (sscanf(tline, "%02x", &byte)==1); + ) { + currentSegment->image[address++]=byte; + currentSegment->current++; + } + break; + } + case 'R': { + unsigned address, pc; + char symbol[132]; + char how[32]; + sscanf (line, "R %x %[^ ] %[^ ] %x", &address, how, symbol, &pc); + addToRefs (symbol, address, how, pc); + break; + } + default: + fprintf (stderr, "%s:%d unknown record \"%s\"\n", + module, currentLine, line); + fatalErrors++; + break; + } + currentLine++; + } + fclose (relModule); +} + +void writeModule(char *outFileName) { + FILE *fOut; + unsigned int address=segments[GSFINAL].start; + unsigned int size=segments[GSFINAL]._size; + unsigned int len; + unsigned int checksum; + + if ((fOut=fopen(outFileName, "w"))==NULL) { + perror (outFileName); + } + + while (size) { + len = size>16 ? 16 : size; + size-=len; + fprintf (fOut, ":%02X%04X%02X", len, address, 0); + checksum = len + (address>>8) + (address&0xff); + while (len--) { + checksum += gsfinalImage[address]; + fprintf (fOut, "%02X", gsfinalImage[address++]); + } + checksum &= 0xff; + if (checksum) { + checksum = 0x100 - checksum; + } + fprintf (fOut, "%02X\n", checksum); + } + fprintf (fOut, ":00000001FF\n"); + + fclose (fOut); +} + +int relocate() { + struct SYMBOL *symbol; + struct REFERENCE *reference; + char *from, *to; + int length=segments[GSINIT]._size + + segments[CSEG]._size + + segments[XINIT]._size; + int unresolved=0; + + // first check if it will fit + if (length > 0xffff) { + fprintf (stderr, "error: code segment exceeds 0xffff\n"); + fatalErrors++; + } + + // resolve reverences + for (reference=references; reference; reference=reference->next) { + if (!reference->resolved && !findSymbolByName(reference->name)) { + unresolved++; + } + } + if (unresolved) { + // first scan the libraries + return unresolved; + } + + // GSFINAL starts at --code-loc ( -b CSEG = 0x1234 ) + if (segments[CSEG].start & 1) { + fprintf (stderr, "*** error: code doesn't start at " + "an even address: %04x\n", segments[CSEG].start); + exit (1); + } + segments[GSFINAL].start=segments[CSEG].start; + memset(gsfinalImage, 0xff, CODESIZE); + + // copy gsinit to gsfinal + from = gsinitImage; + to = gsfinalImage + segments[GSFINAL].start + segments[GSFINAL]._size; + memcpy(to, from, segments[GSINIT]._size); + segments[GSINIT].start=segments[GSFINAL].start; + segments[GSFINAL]._size += segments[GSINIT]._size; + if (segments[GSFINAL]._size & 1) { + segments[GSFINAL]._size++; + } + + // append cseg to gsfinal + from=csegImage; + to = gsfinalImage + segments[GSFINAL].start + segments[GSFINAL]._size; + memcpy(to, from, segments[CSEG]._size); + segments[CSEG].start=segments[GSFINAL].start+segments[GSFINAL]._size; + segments[GSFINAL]._size += segments[CSEG]._size; + if (segments[GSFINAL]._size & 1) { + segments[GSFINAL]._size++; + } + + // append xinit to gsfinal + from=xinitImage; + to = gsfinalImage + segments[GSFINAL].start + segments[GSFINAL]._size; + memcpy(to, from, segments[XINIT]._size); + segments[XINIT].start=segments[GSFINAL].start+segments[GSFINAL]._size; + segments[GSFINAL]._size += segments[XINIT]._size; + if (segments[GSFINAL]._size & 1) { + segments[GSFINAL]._size++; + } + + // XISEG is located after XSEG + if (segments[XSEG].start & 1) { + fprintf (stderr, "*** warning: xdata doesn't start at " + "an even address: %04x\n", segments[XSEG].start); + } + if (segments[XSEG]._size & 1) { + segments[XSEG]._size++; + } + + segments[XISEG].start=segments[XSEG].start + + segments[XSEG]._size; + + // now relocate the defined symbols + for (symbol=symbols; symbol; symbol=symbol->next) { + if (!symbol->absolute) { + symbol->address += symbol->segment->start; + } + } + // and the references + for (reference=references; reference; reference=reference->next) { + symbol=findSymbolByName(reference->name); + if (!reference->resolved && !symbol && reference->how!=ABS_PC) { + // this reference isn't resolved after all + fprintf (stderr, "*** %s:%d undefined symbol %s\n", + reference->module->name, reference->lineno, + reference->name); + fatalErrors++; + } else { + reference->address += + reference->module->offset[reference->segment->id]+ + reference->segment->start; + reference->pc += + reference->module->offset[reference->segment->id]+ + reference->segment->start; + switch (reference->how) + { + case REL_FF: { + int rel8 = symbol->address-(reference->pc & ~1); + if (rel8<-256 || rel8>256) { + fprintf (stderr, + "rel8 target for %s is out of range in module %s:%d\n", + reference->name, reference->module->name, + reference->lineno); + fatalErrors++; + } + gsfinalImage[reference->address]=rel8/2; + break; + } + case REL_FFFF: { + int rel16 = symbol->address-(reference->pc & ~1); + if (rel16<-65536 || rel16>65534) { + fprintf (stderr, + "rel16 target for %s is out of range in module %s:%d\n", + reference->name, reference->module->name, + reference->lineno); + fatalErrors++; + } + gsfinalImage[reference->address]=(rel16/2)>>8; + gsfinalImage[reference->address+1]=rel16/2; + break; + } + case DIR_70FF: + gsfinalImage[reference->address] = + (gsfinalImage[reference->address]&~0x70) + + ((symbol->address>>4)&0x70); + gsfinalImage[reference->address+1] = symbol->address; + break; + case ABS_FFFF: + gsfinalImage[reference->address] = symbol->address>>8; + gsfinalImage[reference->address+1] = symbol->address; + break; + case ABS_FF: + gsfinalImage[reference->address] = symbol->address; + break; + case ABS_PC: + { + unsigned int address= + (gsfinalImage[reference->address]<<8) + + gsfinalImage[reference->address+1]; + address += reference->module->offset[reference->segment->id]; + address += segments[reference->segment->id].start; + gsfinalImage[reference->address] = address>>8; + gsfinalImage[reference->address+1] = address; + }; + break; + default: + fprintf (stderr, "unsupported reference mode %d.\n", + reference->how); + fatalErrors++; + } + } + } + return 0; +} + +void usage (char * progName, int errNo) { + fprintf (stderr, "usage: %s lnkCmdFile\n", progName); + if (errNo) { + exit (errNo); + } +} + +int scanLibraries(int unresolved) { + int resolved=0; + int nlp, nlf; + char libFiles[PATH_MAX]; + char libFile[PATH_MAX]; + char line[132]; + char symName[132]; + FILE *lf, *lfs; + + for (nlp=0; nlpnext) { + if (!reference->resolved) { + fprintf (stderr, "*** unresolved symbol %s in %s:%d\n", + reference->name, reference->module->name, + reference->lineno); + fatalErrors++; + } + } + break; + } + } + + if (unresolved==0) { + writeModule(outFileName); + } + + // the modules + fprintf (mapOut, "Modules:\n"); + for (module=modules; module; module=module->next) { + fprintf (mapOut, "\t%s\n", module->name); + for (s=0; ssize[s]) { + fprintf (mapOut, "\t\t%s:0x%04x-0x%04x\n", segments[s].name, + module->offset[s]+segments[s].start, + module->offset[s]+segments[s].start+module->size[s]); + } + } + } + + // the segments + fprintf (mapOut, "\nSegments:\n"); + for (s=1; snext) { + fprintf (mapOut, "%s\t%s %s0x%04x %s\n", symbol->name, + symbol->segment->name, + symbol->absolute ? "= " : "", + symbol->address, symbol->module->name); + } + + fclose(mapOut); + return fatalErrors? 1 : 0; +} + diff --git a/as/xa51/xa_main.c b/as/xa51/xa_main.c new file mode 100644 index 0000000..8717905 --- /dev/null +++ b/as/xa51/xa_main.c @@ -0,0 +1,709 @@ +/* xa_main.c - Paul's XA51 Assembler + + Copyright 1997,2002 Paul Stoffregen (paul at pjrc dot com) + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* adapted from the osu8asm project, 1995 */ +/* http://www.pjrc.com/tech/osu8/index.html */ + +/* + made "relocatable" by johan.knol@iduna.nl for sdcc + + This isn't a standalone assembler anymore. It's only purpose is to + create relocatable modules (that has to be processed with xa_link) + out of sdcc-generated .xa files +*/ + +#define D(x) x + +#include +#include +#include +#include + +#define printf(x...) fprintf(stderr,x) + +#include "xa_main.h" +#include "xa_version.h" +extern void yyrestart(FILE *new_file); +extern int yyparse(); + + +char modulename[PATH_MAX]; +char infilename[PATH_MAX]; +char outfilename[PATH_MAX]; +char listfilename[PATH_MAX]; +char symfilename[PATH_MAX]; + +/* global variables */ + +FILE *frel, *fmem, *list_fp, *sym_fp; +extern FILE *yyin; +extern char *yytext; +extern char last_line_text[]; +struct symbol *sym_list=NULL; +struct target *targ_list=NULL; +int lineno=1; +int p1=0, p2=0, p3=0; +int expr_result, expr_ok, jump_dest, inst; +int opcode; +char symbol_name[1000]; +struct area_struct area[NUM_AREAS]; +int current_area=0; + +char rel_line[2][132]; + +char *areaToString (int area) { + switch (area) + { + case AREA_CSEG: return "CSEG"; + case AREA_DSEG: return "DSEG"; + //case AREA_OSEG: return "OSEG"; + //case AREA_ISEG: return "ISEG"; + case AREA_BSEG: return "BSEG"; + case AREA_XSEG: return "XSEG"; + case AREA_XISEG: return "XISEG"; + case AREA_XINIT: return "XINIT"; + case AREA_GSINIT: return "GSINIT"; + //case AREA_GSFINAL: return "GSFINAL"; + //case AREA_HOME: return "HOME"; + //case AREA_SSEG: return "SSEG"; + } + return ("UNKNOW"); +} + +/* "mem" is replaced by area[current_area].alloc_position */ +/* int mem=0; */ /* mem is location in memory */ + +/* add symbols to list when we find their definition in pass #1 */ +/* we will evaluate their values in pass #2, and figure out if */ +/* they are branch targets betweem passes 1 and 2. Every symbol */ +/* should appear exactly once in this list, since it can't be redefined */ + +struct symbol * build_sym_list(char *thename) +{ + struct symbol *new, *p; + + if ((p=findSymbol(thename))) { + if (p->isdef) { + fprintf (stderr, "error: symbol %s already defined\n", thename); + exit (1); + } else { + return p; + } + } + + //printf(" Symbol: %s Line: %d\n", thename, lineno); + new = (struct symbol *) malloc(sizeof(struct symbol)); + new->name = (char *) malloc(strlen(thename)+1); + strcpy(new->name, thename); + new->value = 0; + new->istarget = 0; + new->isdef = 0; + new->isbit = 0; + new->isreg = 0; + new->line_def = lineno - 1; + new->area = current_area; + new->mode = 'X'; // start with an external + new->next = NULL; + if (sym_list == NULL) return (sym_list = new); + p = sym_list; + while (p->next != NULL) p = p->next; + p->next = new; + return (new); +} + +struct symbol *findSymbol (char *thename) { + struct symbol *p; + for (p=sym_list; p; p=p->next) { + if (strcasecmp(thename, p->name)==0) { + return p; + } + } + return NULL; +} + +int assign_value(char *thename, int thevalue, char mode) { + struct symbol *p; + + p = sym_list; + while (p != NULL) { + if (!(strcasecmp(thename, p->name))) { + p->area=current_area; + p->value = thevalue; + p->isdef = 1; + p->mode = mode; + return (0); + } + p = p->next; + } + fprintf(stderr, "Internal Error! Couldn't find symbol\n"); + exit(1); +} + +int mk_bit(char *thename, int area) +{ + struct symbol *p; + + p = sym_list; + while (p != NULL) { + if (!(strcasecmp(thename, p->name))) { + p->isbit = 1; + p->area = area; + return (0); + } + p = p->next; + } + fprintf(stderr, "Internal Error! Couldn't find symbol\n"); + exit(1); +} + +int mk_sfr(char *thename) +{ + struct symbol *p; + + p = sym_list; + while (p != NULL) { + if (!(strcasecmp(thename, p->name))) { + p->issfr = 1; + p->area = 0; + return (0); + } + p = p->next; + } + fprintf(stderr, "Internal Error! Couldn't find symbol\n"); + exit(1); +} + + +int mk_reg(char *thename) +{ + struct symbol *p; + + p = sym_list; + while (p != NULL) { + if (!(strcasecmp(thename, p->name))) { + p->isreg = 1; + return (0); + } + p = p->next; + } + fprintf(stderr, "Internal Error! Couldn't find symbol\n"); + exit(1); +} + +int mk_global(char *thename) +{ + struct symbol *p; + + p = sym_list; + while (p != NULL) { + if (!(strcasecmp(thename, p->name))) { + p->global = 1; + return (0); + } + p = p->next; + } + fprintf(stderr, "Internal Error! Couldn't find symbol\n"); + exit(1); +} + +int get_value(char *thename) +{ + struct symbol *p; + p = sym_list; + while (p != NULL) { + if (!(strcasecmp(thename, p->name))) { + if (p->mode=='=') + ;//return 0; + return (p->value); + } + p = p->next; + } + fprintf(stderr, "Internal Error! Couldn't find symbol value\n"); + exit(1); +} + + + +/* add every branch target to this list as we find them */ +/* ok if multiple entries of same symbol name in this list */ + +struct target * build_target_list(char *thename) +{ + struct target *new, *p; + new = (struct target *) malloc(sizeof(struct target)); + new->name = (char *) malloc(strlen(thename)+1); + strcpy(new->name, thename); + new->next = NULL; + if (targ_list == NULL) return (targ_list = new); + p = targ_list; + while (p->next != NULL) p = p->next; + p->next = new; + return (new); +} + +/* figure out which symbols are branch targets */ + +void flag_targets() +{ + struct symbol *p_sym; + struct target *p_targ; + p_targ = targ_list; + while (p_targ != NULL) { + p_sym = sym_list; + while (p_sym != NULL) { + if (!strcasecmp(p_sym->name, p_targ->name)) + p_sym->istarget = 1; + p_sym = p_sym->next; + } + p_targ = p_targ->next; + } +} + +void print_symbol_table() +{ + struct symbol *p; + p = sym_list; + while (p != NULL) { +#if 0 + fprintf(sym_fp, "Sym in %-5s: %s\n", areaToString(p->area), p->name); + fprintf(sym_fp, " at: 0x%04X (%5d)", p->value, p->value); + fprintf(sym_fp, " Def:%s", p->isdef ? "Yes" : "No "); + fprintf(sym_fp, " Bit:%s", p->isbit ? "Yes" : "No "); + fprintf(sym_fp, " Target:%s", p->istarget ? "Yes" : "No "); + fprintf(sym_fp, " Line %d\n", p->line_def); +#else + if (p->issfr) { + fprintf (sym_fp, "%-7s", "SFR"); + } else if (p->isbit && !p->area) { + fprintf (sym_fp, "%-7s", "SBIT"); + } else if (p->mode=='=') { + fprintf (sym_fp,"ABS "); + } else if (!p->isdef) { + fprintf (sym_fp,"EXTRN "); + } else { + fprintf (sym_fp, "%-7s", areaToString(p->area)); + } + fprintf (sym_fp, " 0x%04x (%5d)", p->value, p->value); + fprintf (sym_fp, " %s", p->isdef ? "D" : "-"); + fprintf (sym_fp, "%s", p->isbit ? "B" : "-"); + fprintf (sym_fp, "%s", p->istarget ? "T" : "-"); + fprintf (sym_fp, " %s\n", p->name); +#endif + p = p->next; + } +} + +/* check that every symbol is in the table only once */ + +void check_redefine() +{ + struct symbol *p1, *p2; + p1 = sym_list; + while (p1 != NULL) { + p2 = p1->next; + while (p2 != NULL) { + if (!strcasecmp(p1->name, p2->name)) { + fprintf(stderr, "Error: symbol '%s' redefined on line %d", + p1->name, p2->line_def); + fprintf(stderr, ", first defined on line %d\n", p1->line_def); + exit(1); + } + p2 = p2->next; + } + p1 = p1->next; + } +} + +int is_target(char *thename) +{ + struct symbol *p; + p = sym_list; + while (p != NULL) { + if (!strcasecmp(thename, p->name)) return (p->istarget); + p = p->next; + } + return (0); +} + +int is_bit(char *thename) +{ + struct symbol *p; + p = sym_list; + while (p != NULL) { + if (!strcasecmp(thename, p->name)) return (p->isbit); + p = p->next; + } + return (0); +} + +int is_reg(char *thename) +{ + struct symbol *p; + p = sym_list; + while (p != NULL) { + if (!strcasecmp(thename, p->name)) return (p->isreg); + p = p->next; + } + return (0); +} + + +struct symbol *is_def(char *thename) +{ + struct symbol *p; + p = sym_list; + while (p != NULL) { + if (!strcasecmp(thename, p->name) && p->isdef) + return p; + p = p->next; + } + return NULL; +} + +struct symbol *is_ref(char *thename) { + struct symbol *p; + p = sym_list; + while (p != NULL) { + if (strcasecmp(thename, p->name)==0) + return p; + p = p->next; + } + return NULL; +} + +int is_abs(char *thename) { + struct symbol *p; + p = sym_list; + while (p != NULL) { + if (strcasecmp(thename, p->name)==0) + return p->mode == '='; + p = p->next; + } + return 0; +} + +/* this routine is used to dump a group of bytes to the output */ +/* it is responsible for generating the list file and sending */ +/* the bytes one at a time to the object code generator */ +/* this routine is also responsible for generatine the list file */ +/* though is it expected that the lexer has placed all the actual */ +/* original text from the line in "last_line_text" */ + +static short last_area=-1; + +int debug=0; + +void out(int *byte_list, int num) { + struct symbol *p; + int i, first=1; + + if (num > 0) fprintf(list_fp, "%06X: ", MEM_POS); + else fprintf(list_fp, "\t"); + + if (last_area!=current_area) { + // emit area information + if (area[current_area].size) { + fprintf (frel, "A %s size %d flags 0\n", + areaToString(current_area), + area[current_area].size); + if (!area[current_area].defsEmitted) { + for (p=sym_list; p; p=p->next) { + if (p->global && p->isdef && p->area==current_area) { + // skip temp labels + if (p->name[strlen(p->name)-1]!='$') { + if (p->mode=='=') { + fprintf (frel, "S %s Abs%04x\n", p->name, p->value); + } else { + fprintf (frel, "S %s Def%04x\n", p->name, p->value); + } + } + } + } + area[current_area].defsEmitted=1; + } + } + last_area=current_area; + } + if (current_area==AREA_CSEG || + current_area==AREA_GSINIT || + current_area==AREA_XINIT) { + if (num) { + for (i=0; i= 0; i--) { + sum += j * (str[i] == '1'); + j *= 2; + } + return (sum); +} + +void print_usage(int); + +void init_areas(void) +{ + area[AREA_CSEG].start=area[AREA_CSEG].alloc_position = 0; + area[AREA_DSEG].start=area[AREA_DSEG].alloc_position = 0; + area[AREA_BSEG].start=area[AREA_BSEG].alloc_position = 0; + area[AREA_XSEG].start=area[AREA_XSEG].alloc_position = 0; + area[AREA_XISEG].start=area[AREA_XISEG].alloc_position = 0; + area[AREA_XINIT].start=area[AREA_XINIT].alloc_position = 0; + area[AREA_GSINIT].start=area[AREA_GSINIT].alloc_position = 0; + area[AREA_GSFINAL].start=area[AREA_GSFINAL].alloc_position = 0; + area[AREA_HOME].start=area[AREA_HOME].alloc_position = 0; +} + +void relPrelude() { + //char buffer[132]; + int i, areas=0, globals=0; + struct symbol *p; + + fprintf (frel, "SDCCXA rel, version %1.1f\n", version); + for (i=1; inext) { + if (p->isdef) { + // skip temp labels + if (p->name[strlen(p->name)-1]!='$') { + globals++; + } + } + } + fprintf (frel, "H %d areas %d global symbols\n", areas, globals); + fprintf (frel, "M %s\n", modulename); + for (p=sym_list; p; p=p->next) { + if (!p->isdef) { + fprintf (frel, "S %s Ref0000\n", p->name); + } + } +} + +void printVersion() { + printf("\nPaul's XA51 Assembler\n"); + printf("Copyright 1997,2002 Paul Stoffregen\n\n"); + printf("This program is free software; you can redistribute it\n"); + printf("and/or modify it under the terms of the GNU General Public\n"); + printf("License, Version 2, published by the Free Software Foundation\n\n"); + printf("This program is distributed in the hope that it will be useful,\n"); + printf("but WITHOUT ANY WARRANTY; without even the implied warranty of\n"); + printf("MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.\n\n"); +} + +int verbose=0, createSymbolFile=0; + +void process_args(int argc, char **argv) +{ + int i=0; + + if (argc < 2) print_usage(1); + + while (++i. */ + +#define SIZE8 0 +#define SIZE16 1 +#define SIZE32 2 +#define UNKNOWN -1 +#define WORD_REG 16384 +#define BYTE_REG 32768 + +/* max # of bytes in db directive */ +#define MAX_DB 2500 + +/* max # char in symbol name */ +#define MAX_SYMBOL 1024 + +/* max # of bytes per line */ +#define MAX_LINE 4096 + +/* REL() computes branch operand from dest and memory */ +/* location of the jump instruction itself */ +/* this is later adjusted by one for jcu, of course */ +#define BRANCH_SPACING 2 +#define REL(dest, mem) (((dest)-((((mem)+1)/(\ +BRANCH_SPACING))*(BRANCH_SPACING)))/(BRANCH_SPACING)) + +#define NOP_OPCODE 0 /* opcode for NOP */ + +/* a linked list of all the symbols */ + +struct symbol { + char *name; + int value; + int istarget; /* 1 if a branch target, 0 otherwise */ + int isdef; /* 1 if defined, 0 if no value yet */ + int line_def; /* line in which is was defined */ + int isbit; /* 1 if a bit address, 0 otherwise */ + int issfr; + int isreg; /* 1 if a register, 0 otehrwise */ + int global ; /* is defined as global */ + char mode; /* Absolute, Relative, Tmplabel, eXternal */ + short lk_index; /* symbol index for the linker */ + int area; /* the area that this symbol is in */ + struct symbol *next; }; + +/* a list of all the symbols that are branch targets */ +/* (and will need to get aligned on 4 byte boundries) */ + +struct target { + char *name; + struct target *next; }; + +struct area_struct { + int start; + int alloc_position; + int defsEmitted; + int size; +}; + +extern int current_area; + +#define MEM_POS (area[current_area].alloc_position) + +enum { + AREA_CSEG=1, + AREA_DSEG, + // AREA_OSEG, + // AREA_ISEG, + AREA_BSEG, + AREA_XSEG, + AREA_XISEG, + AREA_XINIT, + AREA_GSINIT, + AREA_GSFINAL, + AREA_HOME, + AREA_SSEG, + NUM_AREAS=AREA_SSEG +}; + +extern struct area_struct area[NUM_AREAS]; + +extern FILE *yyin; +extern char *yytext; +extern int lineno; +extern int p1, p2, p3, mem, m_len; + +extern struct symbol * build_sym_list(char *thename); +extern int assign_value(char *thename, int thevalue, char mode); +extern int mk_bit(char *thename, int current_area); +extern int mk_reg(char *thename); +extern void out(int *byte_list, int num); +extern int is_target(char *thename); +extern void pad_with_nop(); +extern int binary2int(char *str); +extern int is_bit(char *thename); +extern int is_reg(char *thename); +extern struct symbol * is_def(char *thename); +extern struct symbol * is_ref(char *thename); +extern int get_value(char *thename); +extern struct symbol *findSymbol (char *thename); +extern char rel_line[2][132]; +extern char operand[2][MAX_SYMBOL]; +extern void error(char*); +int mk_bit(char*, int); +int mk_sfr(char*); +int mk_global(char*); +struct target * build_target_list(char *thename); +struct symbol * build_sym_list(char *); +int find_size_reg(int op1spec); +int find_size0(int isize); +int find_size1(int isize, int op1spec); +int find_size2(int isize, int op1spec, int op2spec); +int yyerror(char *s); +int imm_data4_signed(int value); +int imm_data4_unsigned(int value); +int imm_data5_unsigned(int value); +int imm_data8(int value); +int imm_data16(int value); +int reg(int reg_spec); +int reg_indirect(int reg_spec); +int lsb(int value); +int msb(int value); +int direct_addr(int value); +int bit_addr(int value); +int rel16(int pos, int dest); +int rel8(int pos, int dest); +char *areaToString (int area); + +FILE *frel, *fmem, *list_fp, *sym_fp; + +extern void relout(); diff --git a/as/xa51/xa_rasm.l b/as/xa51/xa_rasm.l new file mode 100644 index 0000000..b72b9e0 --- /dev/null +++ b/as/xa51/xa_rasm.l @@ -0,0 +1,335 @@ +%{ +/* xa_rasm.l - This file is part of Paul's XA51 Assembler + + Copyright 1997,2002 Paul Stoffregen (paul at pjrc dot com) + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* Author contact: paul@pjrc.com */ + +#include +#include +#include "xa_main.h" +#include "xa_rasm.tab.h" + +extern int inst_size, yylval; +char line_text[MAX_LINE]={'\0'}, last_line_text[MAX_LINE]; +char lex_sym_name[MAX_SYMBOL]; +extern char base_symbol_name[]; +#define LIST if (p3) strcat(line_text, yytext) +%} + +%% + +add\.w {LIST; inst_size=SIZE16; return ADD;} +add\.b {LIST; inst_size=SIZE8; return ADD;} +add {LIST; inst_size=UNKNOWN; return ADD;} +addc\.w {LIST; inst_size=SIZE16; return ADDC;} +addc\.b {LIST; inst_size=SIZE8; return ADDC;} +addc {LIST; inst_size=UNKNOWN; return ADDC;} +adds\.w {LIST; inst_size=SIZE16; return ADDS;} +adds\.b {LIST; inst_size=SIZE8; return ADDS;} +adds {LIST; inst_size=UNKNOWN; return ADDS;} +and\.w {LIST; inst_size=SIZE16; return AND;} +and\.b {LIST; inst_size=SIZE8; return AND;} +and {LIST; inst_size=UNKNOWN; return AND;} +anl {LIST; inst_size=UNKNOWN; return ANL;} +asl\.d {LIST; inst_size=SIZE32; return ASL;} +asl\.w {LIST; inst_size=SIZE16; return ASL;} +asl\.b {LIST; inst_size=SIZE8; return ASL;} +asl {LIST; inst_size=UNKNOWN; return ASL;} +asr\.d {LIST; inst_size=SIZE32; return ASR;} +asr\.w {LIST; inst_size=SIZE16; return ASR;} +asr\.b {LIST; inst_size=SIZE8; return ASR;} +asr {LIST; inst_size=UNKNOWN; return ASR;} +bcc {LIST; inst_size=UNKNOWN; return BCC;} +bcs {LIST; inst_size=UNKNOWN; return BCS;} +beq {LIST; inst_size=UNKNOWN; return BEQ;} +bg {LIST; inst_size=UNKNOWN; return BG;} +bge {LIST; inst_size=UNKNOWN; return BGE;} +bgt {LIST; inst_size=UNKNOWN; return BGT;} +bkpt {LIST; inst_size=UNKNOWN; return BKPT;} +bl {LIST; inst_size=UNKNOWN; return BL;} +ble {LIST; inst_size=UNKNOWN; return BLE;} +blt {LIST; inst_size=UNKNOWN; return BLT;} +bmi {LIST; inst_size=UNKNOWN; return BMI;} +bne {LIST; inst_size=UNKNOWN; return BNE;} +bnv {LIST; inst_size=UNKNOWN; return BNV;} +bov {LIST; inst_size=UNKNOWN; return BOV;} +bpl {LIST; inst_size=UNKNOWN; return BPL;} +br {LIST; inst_size=UNKNOWN; return BR;} +call {LIST; inst_size=UNKNOWN; return CALL;} +cjne\.w {LIST; inst_size=SIZE16; return CJNE;} +cjne\.b {LIST; inst_size=SIZE8; return CJNE;} +cjne {LIST; inst_size=UNKNOWN; return CJNE;} +clr {LIST; inst_size=UNKNOWN; return CLR;} +cmp\.w {LIST; inst_size=SIZE16; return CMP;} +cmp\.b {LIST; inst_size=SIZE8; return CMP;} +cmp {LIST; inst_size=UNKNOWN; return CMP;} +cpl\.w {LIST; inst_size=SIZE16; return CPL;} +cpl\.b {LIST; inst_size=SIZE8; return CPL;} +cpl {LIST; inst_size=UNKNOWN; return CPL;} +da\.b {LIST; inst_size=SIZE8; return DA;} +da {LIST; inst_size=UNKNOWN; return DA;} +div\.d {LIST; inst_size=SIZE32; return DIV;} +div\.w {LIST; inst_size=SIZE16; return DIV;} +div\.b {LIST; inst_size=SIZE8; return DIV;} +div {LIST; inst_size=UNKNOWN; return DIV;} +divu\.d {LIST; inst_size=SIZE32; return DIVU;} +divu\.w {LIST; inst_size=SIZE16; return DIVU;} +divu\.b {LIST; inst_size=SIZE8; return DIVU;} +divu {LIST; inst_size=UNKNOWN; return DIVU;} +djnz\.w {LIST; inst_size=SIZE16; return DJNZ;} +djnz\.b {LIST; inst_size=SIZE8; return DJNZ;} +djnz {LIST; inst_size=UNKNOWN; return DJNZ;} +fcall {LIST; inst_size=UNKNOWN; return FCALL;} +fjmp {LIST; inst_size=UNKNOWN; return FJMP;} +jb {LIST; inst_size=UNKNOWN; return JB;} +jbc {LIST; inst_size=UNKNOWN; return JBC;} +jmp {LIST; inst_size=UNKNOWN; return JMP;} +jnb {LIST; inst_size=UNKNOWN; return JNB;} +jnz {LIST; inst_size=UNKNOWN; return JNZ;} +jz {LIST; inst_size=UNKNOWN; return JZ;} +lea\.w {LIST; inst_size=SIZE16; return LEA;} +lea {LIST; inst_size=UNKNOWN; return LEA;} +lsr\.d {LIST; inst_size=SIZE32; return LSR;} +lsr\.w {LIST; inst_size=SIZE16; return LSR;} +lsr\.b {LIST; inst_size=SIZE8; return LSR;} +lsr {LIST; inst_size=UNKNOWN; return LSR;} +mov\.w {LIST; inst_size=SIZE16; return MOV;} +mov\.b {LIST; inst_size=SIZE8; return MOV;} +mov {LIST; inst_size=UNKNOWN; return MOV;} +movc\.w {LIST; inst_size=SIZE16; return MOVC;} +movc\.b {LIST; inst_size=SIZE8; return MOVC;} +movc {LIST; inst_size=UNKNOWN; return MOVC;} +movs\.w {LIST; inst_size=SIZE16; return MOVS;} +movs\.b {LIST; inst_size=SIZE8; return MOVS;} +movs {LIST; inst_size=UNKNOWN; return MOVS;} +movx\.w {LIST; inst_size=SIZE16; return MOVX;} +movx\.b {LIST; inst_size=SIZE8; return MOVX;} +movx {LIST; inst_size=UNKNOWN; return MOVX;} +mul\.d {LIST; inst_size=SIZE32; return MUL;} +mul\.w {LIST; inst_size=SIZE16; return MUL;} +mul\.b {LIST; inst_size=SIZE8; return MUL;} +mul {LIST; inst_size=UNKNOWN; return MUL;} +mulu\.d {LIST; inst_size=SIZE32; return MULU;} +mulu\.w {LIST; inst_size=SIZE16; return MULU;} +mulu\.b {LIST; inst_size=SIZE8; return MULU;} +mulu {LIST; inst_size=UNKNOWN; return MULU;} +neg\.w {LIST; inst_size=SIZE16; return NEG;} +neg\.b {LIST; inst_size=SIZE8; return NEG;} +neg {LIST; inst_size=UNKNOWN; return NEG;} +nop {LIST; inst_size=UNKNOWN; return NOP;} +norm\.d {LIST; inst_size=SIZE32; return NORM;} +norm\.w {LIST; inst_size=SIZE16; return NORM;} +norm\.b {LIST; inst_size=SIZE8; return NORM;} +norm {LIST; inst_size=UNKNOWN; return NORM;} +or\.w {LIST; inst_size=SIZE16; return OR;} +or\.b {LIST; inst_size=SIZE8; return OR;} +or {LIST; inst_size=UNKNOWN; return OR;} +orl {LIST; inst_size=UNKNOWN; return ORL;} +pop\.w {LIST; inst_size=SIZE16; return POP;} +pop\.b {LIST; inst_size=SIZE8; return POP;} +pop {LIST; inst_size=UNKNOWN; return POP;} +popu\.w {LIST; inst_size=SIZE16; return POPU;} +popu\.b {LIST; inst_size=SIZE8; return POPU;} +popu {LIST; inst_size=UNKNOWN; return POPU;} +push\.w {LIST; inst_size=SIZE16; return PUSH;} +push\.b {LIST; inst_size=SIZE8; return PUSH;} +push {LIST; inst_size=UNKNOWN; return PUSH;} +pushu\.w {LIST; inst_size=SIZE16; return PUSHU;} +pushu\.b {LIST; inst_size=SIZE8; return PUSHU;} +pushu {LIST; inst_size=UNKNOWN; return PUSHU;} +reset {LIST; inst_size=UNKNOWN; return RESET;} +ret {LIST; inst_size=UNKNOWN; return RET;} +reti {LIST; inst_size=UNKNOWN; return RETI;} +rl\.w {LIST; inst_size=SIZE16; return RL;} +rl\.b {LIST; inst_size=SIZE8; return RL;} +rl {LIST; inst_size=UNKNOWN; return RL;} +rlc\.w {LIST; inst_size=SIZE16; return RLC;} +rlc\.b {LIST; inst_size=SIZE8; return RLC;} +rlc {LIST; inst_size=UNKNOWN; return RLC;} +rr\.w {LIST; inst_size=SIZE16; return RR;} +rr\.b {LIST; inst_size=SIZE8; return RR;} +rr {LIST; inst_size=UNKNOWN; return RR;} +rrc\.w {LIST; inst_size=SIZE16; return RRC;} +rrc\.b {LIST; inst_size=SIZE8; return RRC;} +rrc {LIST; inst_size=UNKNOWN; return RRC;} +setb {LIST; inst_size=UNKNOWN; return SETB;} +sext\.w {LIST; inst_size=SIZE16; return SEXT;} +sext\.b {LIST; inst_size=SIZE8; return SEXT;} +sext {LIST; inst_size=UNKNOWN; return SEXT;} +sub\.w {LIST; inst_size=SIZE16; return SUB;} +sub\.b {LIST; inst_size=SIZE8; return SUB;} +sub {LIST; inst_size=UNKNOWN; return SUB;} +subb\.w {LIST; inst_size=SIZE16; return SUBB;} +subb\.b {LIST; inst_size=SIZE8; return SUBB;} +subb {LIST; inst_size=UNKNOWN; return SUBB;} +trap {LIST; inst_size=UNKNOWN; return TRAP;} +xch\.w {LIST; inst_size=SIZE16; return XCH;} +xch\.b {LIST; inst_size=SIZE8; return XCH;} +xch {LIST; inst_size=UNKNOWN; return XCH;} +xor\.w {LIST; inst_size=SIZE16; return XOR;} +xor\.b {LIST; inst_size=SIZE8; return XOR;} +xor {LIST; inst_size=UNKNOWN; return XOR;} + + +dptr {LIST; return DPTR;} +pc {LIST; return PC;} +a {LIST; return A;} +c {LIST; return C;} +usp {LIST; return USP;} + +org {LIST; return ORG;} +equ {LIST; return EQU;} +sfr {LIST; return SFR;} +db {LIST; return DB;} +dw {LIST; return DW;} +byte {LIST; return DB;} +bit {LIST; return BITDEF;} +reg {LIST; return REGDEF;} +area {LIST; return AREA;} +ds {LIST; return DS;} +DSEG {LIST; yylval = AREA_DSEG; return AREA_NAME;} +BSEG {LIST; yylval = AREA_BSEG; return AREA_NAME;} +XSEG {LIST; yylval = AREA_XSEG; return AREA_NAME;} +XISEG {LIST; yylval = AREA_XISEG; return AREA_NAME;} +XINIT {LIST; yylval = AREA_XINIT; return AREA_NAME;} +GSINIT {LIST; yylval = AREA_GSINIT; return AREA_NAME;} +GSFINAL {LIST; yylval = AREA_GSFINAL; return AREA_NAME;} +HOME {LIST; yylval = AREA_HOME; return AREA_NAME;} +SSEG {LIST; yylval = AREA_SSEG; return AREA_NAME;} +CSEG {LIST; yylval = AREA_CSEG; return AREA_NAME;} +module {LIST; return MODULE;} +globl {LIST; return GLOBL;} +\(DATA\) {LIST; return AREA_DESC;} +\(OVR,XDATA\) {LIST; return AREA_DESC;} +\(BIT\) {LIST; return AREA_DESC;} +\(XDATA\) {LIST; return AREA_DESC;} +\(CODE\) {LIST; return AREA_DESC;} +low {LIST; return LOW;} +high {LIST; return HIGH;} +>> {LIST; return RSHIFT;} +\<\< {LIST; return LSHIFT;} + +R[0-9] {LIST; yylval = yytext[1] - '0' + WORD_REG; return REG;} +R1[0-5] {LIST; yylval = yytext[2] - '0' + 10 + WORD_REG; return REG;} +R[0-7]L {LIST; yylval = (yytext[1] - '0') * 2 + BYTE_REG; return REG;} +R[0-7]H {LIST; yylval = (yytext[1] - '0') * 2 + 1 + BYTE_REG; return REG;} + + +[a-z_][a-z0-9_]* { + LIST; + if (is_def(yytext)) { + yylval = get_value(yytext); + } else { + if (p1) build_sym_list(yytext); + yylval = 0; + //if (p3) error("Symbol undefined"); + } + /* keep name in lex_sym_name since yytext */ + /* could be overwritten if the parser does */ + /* a lookahead operation */ + strcpy(lex_sym_name, yytext); + if (is_def(lex_sym_name)) { + yylval = get_value(lex_sym_name); + /* return correct type if special */ + if (is_bit(lex_sym_name)) return BIT; + if (is_reg(lex_sym_name)) return REG; + } + if (p3) { + if (*operand[0]) { + // first one in use + strcpy (operand[1], yytext); + } else { + strcpy (operand[0], yytext); + } + } + return WORD; + } +[0-9]+\$ { + LIST; + /* should print error if base_symbol_name */ + /* is not defined */ + sprintf(lex_sym_name, "%s:%s", + base_symbol_name, yytext); + if (is_def(lex_sym_name)) { + yylval = get_value(lex_sym_name); + } else { + yylval = 0; + if (p3) error("Symbol undefined"); + } + return WORD; + } +[01]+[bq] { + LIST; + yylval = binary2int(yytext); + return NUMBER; + } +0x[0-9a-f]+ { + LIST; + sscanf(yytext, "%*c%*c%x", &yylval); + return NUMBER; + } +[0-9a-f]+[h] { + LIST; + sscanf(yytext, "%x%*[hH]", &yylval); + return NUMBER; + } +\$[0-9a-f]+ { + LIST; + sscanf(yytext, "$%x", &yylval); + return NUMBER; + } +-?[0-9]+ { + LIST; + sscanf(yytext, "%d", &yylval); + return NUMBER; + } +\'.\' { + LIST; + yylval = (int)yytext[1]; + return CHAR; + } +\'\\.\' { + LIST; + switch (yytext[1]) { + case 'n': + case 'N': yylval = 10; break; + case 'r': + case 'R': yylval = 13; break; + case '0': yylval = 0; break; + default: yylval = (int)yytext[1]; + /* print a warning here */ + } + return CHAR; + } +\"[^"\n]*["\n] { + LIST; + return STRING; + } + +;[^\n]* {LIST; /* comments */} +[ \t\r] {LIST; /* whitespace */} + +\n { + strcpy(last_line_text, line_text); + line_text[0] = '\0'; + ++lineno; + return EOL; + } + +. {LIST; return yytext[0];} + +%% diff --git a/as/xa51/xa_rasm.y b/as/xa51/xa_rasm.y new file mode 100644 index 0000000..be78e10 --- /dev/null +++ b/as/xa51/xa_rasm.y @@ -0,0 +1,1490 @@ +%{ +/* xa_rasm.y - This file is part of Paul's XA51 Assembler + + Copyright 1997,2002 Paul Stoffregen (paul at pjrc dot com) + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* Author contact: paul@pjrc.com */ + +/* parser for the 51-XA assembler, Paul Stoffregen, July 1997 */ +#include +#include +#include + +#include "xa_main.h" + +int op[MAX_DB]; +int size; +int inst_size; +int arith_opcode, short_opcode, num_op, opcode0, opcode1; +int shift_imm_opcode, shift_reg_opcode, rotate_opcode; +int stack_addr_opcode, stack_reg_opcode, branch_opcode; +int rlist_reg_bank, rlist_bitmask, rlist_size; +int db_count, dw_count, i; +char symbol_name[MAX_SYMBOL], base_symbol_name[MAX_SYMBOL]={'\0'}; +char operand[2][MAX_SYMBOL]={{'\0'},{'\0'}}; + +extern char lex_sym_name[]; +extern int yylex(); + +extern void yyrestart(FILE *new_file); +extern char * disasm(int byte, int memory_location); +void error(char *s); + + +void RELOC_FF(unsigned where, unsigned pc, short rl) { + // pc = PC of the next instruction + struct symbol *sym; + if ((sym=findSymbol(operand[0]))) { + if (sym->mode=='X' || sym->area!=current_area) { + sprintf (rel_line[rl], "R %04x REL_FF %s %04x", + where, sym->name, pc); + } + } +} + +void RELOC_FFFF(unsigned where, unsigned pc, short rl) { + struct symbol *sym; + if ((sym=findSymbol(operand[0]))) { + if (sym->mode=='X' || sym->area!=current_area) { + sprintf (rel_line[rl], "R %04x REL_FFFF %s %04x", + where, sym->name, pc); + } + } +} + +void RELOC_ABS_0F(unsigned where, int seq) { + struct symbol *sym; + if ((sym=findSymbol(operand[seq])) && sym->mode!='A') { + sprintf (rel_line[seq], "R %04x ABS_0F %s 0", where, sym->name); + } +} + +void RELOC_BIT_03FF(unsigned where, int seq) { + struct symbol *sym; + if ((sym=findSymbol(operand[seq])) && sym->mode!='A') { + sprintf (rel_line[seq], "R %04x BIT_03FF %s 0", where, sym->name); + } +} + +void RELOC_DIR_07FF(unsigned where, int seq) { + struct symbol *sym; + if ((sym=findSymbol(operand[seq])) && sym->mode!='A') { + sprintf (rel_line[seq], "R %04x DIR_07FF %s 0", where, sym->name); + } +} + +void RELOC_DIR_70FF(unsigned where, int seq) { + struct symbol *sym; + if ((sym=findSymbol(operand[seq])) && sym->mode!='A') { + sprintf (rel_line[seq], "R %04x DIR_70FF %s 0", where, sym->name); + } +} + +void RELOC_ABS_FF(unsigned where, int seq) { + struct symbol *sym; + if ((sym=findSymbol(operand[seq])) && sym->mode!='A') { + sprintf (rel_line[seq], "R %04x DIR_FF %s 0", where, sym->name); + } +} + +void RELOC_ABS_FFFF(unsigned where, int seq) { + struct symbol *sym; + if ((sym=findSymbol(operand[seq]))) { + switch (sym->mode) { + case 'A': + // sfr or sbit, already in instruction + case '=': + // equat, already in instruction + break; + case 'X': + // external reference + sprintf (rel_line[seq], "R %04x ABS_FFFF %s %04x", where, sym->name, + sym->value); + break; + case 'R': + // absolute in current segment + sprintf (rel_line[seq], "R %04x ABS_PC PC %04x", where, sym->value); + break; + default: + fprintf (stderr, "unknown ABS_FFFF\n"); + exit (1); + } + } +} + +void RELOC_DIR_0700FF(unsigned where, int seq) { + struct symbol *sym; + if ((sym=findSymbol(operand[seq])) && sym->mode!='A') { + sprintf (rel_line[seq], "R %04x ABS_0700FF %s 0", where, sym->name); + } +} + +%} + +%token ADD ADDC ADDS AND ANL ASL ASR BCC BCS BEQ BG BGE BGT +%token BKPT BL BLE BLT BMI BNE BNV BOV BPL BR CALL CJNE CLR +%token CMP CPL DA DIV DIVU DJNZ FCALL FJMP JB JBC JMP JNB JNZ +%token JZ LEA LSR MOV MOVC MOVS MOVX MUL MULU NEG NOP NORM +%token OR ORL POP POPU PUSH PUSHU RESET RET RETI RL RLC RR RRC +%token SETB SEXT SUB SUBB TRAP XCH XOR +%token REG DPTR PC A C USP +%token WORD BIT NUMBER CHAR STRING EOL LOCAL_LABEL +%token ORG EQU SFR DB DW BITDEF REGDEF LOW HIGH +%token RSHIFT LSHIFT +%token AREA AREA_NAME AREA_DESC DS +%token MODULE GLOBL + +%left '&' '|' '^' +%left RSHIFT LSHIFT +%left '+' '-' +%left '*' '/' +%nonassoc UNARY + +%% +all: line + | line all; + +line: linesymbol ':' linenosym { + if (p1) { + build_sym_list(symbol_name); + if (current_area == AREA_BSEG) { + mk_bit(symbol_name, current_area); + } + } + if (p1 || p2) assign_value(symbol_name, MEM_POS, 'R'); + MEM_POS += $3; + } + | linenosym { + if (!is_abs(symbol_name)) { + MEM_POS += $1; + } + } + +linenosym: directive EOL { + if (p3) out(op, $1); + $$ = $1; + } + | instruction EOL { + if (p3) out(op, $1); + $$ = $1; + } + | EOL { + if (p3) out(NULL, 0); + $$ = 0; + } + | error EOL /* try to recover from any parse error */ + + +directive: '.' ORG expr { + MEM_POS = $3; + $$ = 0; + } + | ORG expr { + MEM_POS = $2; + $$ = 0; + } + | '.' EQU symbol ',' expr { + if (p1) build_sym_list(symbol_name); + if (p1 || p2) assign_value(symbol_name, $5, '?'); + $$ = 0; + } + | symbol '=' expr { + if (p1) build_sym_list(symbol_name); + if (p1 || p2) assign_value(symbol_name, $3, '='); + } + | symbol SFR expr { + if (p1) build_sym_list(symbol_name); + if (p1 || p2) assign_value(symbol_name, $3, 'A'); + if (p1 || p2) mk_sfr(symbol_name); + $$ = 0; + } + | '.' BITDEF bitsymbol ',' bit { + if (p1) { + build_sym_list(symbol_name); + mk_bit(symbol_name, 0); + } + if (p1 || p2) assign_value(symbol_name, $5, '?'); + $$ = 0; + } + | bitsymbol BITDEF bit { + if (p1) { + build_sym_list(symbol_name); + mk_bit(symbol_name, 0); + } + if (p1 || p2) assign_value(symbol_name, $3, '?'); + $$ = 0; + } + | bitsymbol BITDEF expr { + if (p1) { + build_sym_list(symbol_name); + mk_bit(symbol_name, 0); + } + if (p1 || p2) assign_value(symbol_name, $3, 'A'); + $$ = 0; + } + | '.' REGDEF regsymbol ',' REG { + if (p1) { + build_sym_list(symbol_name); + mk_reg(symbol_name); + } + if (p1 || p2) assign_value(symbol_name, $5, '?'); + $$ = 0; + } + | regsymbol REGDEF REG { + if (p1) { + build_sym_list(symbol_name); + mk_reg(symbol_name); + } + if (p1 || p2) assign_value(symbol_name, $3, '?'); + $$ = 0; + } + + | '.' db_directive bytes { + $$ = db_count; + } + | '.' dw_directive words { + $$ = dw_count; + } + | '.' AREA AREA_NAME AREA_DESC { + if ($3 < 0 || $3 > NUM_AREAS) { + error("Illegal Area Directive"); + } + symbol_name[0] = '\0'; + current_area = $3; + $$ = 0; + } + | '.' MODULE WORD { + /* ignore module definition */ + $$ = 0; + } + | '.' GLOBL WORD { + mk_global(lex_sym_name); + /* ignore global symbol declaration */ + $$ = 0; + } + | '.' GLOBL bit { + /* ignore bit symbol declaration */ + $$ = 0; + } + | '.' DS expr { + /* todo: if CSEG, emit some filler bytes */ + $$ = $3; + } + +db_directive: DB {db_count = 0;} + + +linesymbol: normal_or_bit_symbol { + strcpy(symbol_name, lex_sym_name); + if (!strchr(lex_sym_name, ':')) { + /* non-local label, remember base name */ + strcpy(base_symbol_name, lex_sym_name); + } + if (is_target(symbol_name)) pad_with_nop(); + } + +normal_or_bit_symbol: WORD {$$ = $1;} + | BIT {$$ = $1;} + +bytes: byte_element + | bytes ',' byte_element + +byte_element: expr { + op[db_count] = $1 & 255; + if (++db_count >= MAX_DB) { + error("too many bytes, use two DB"); + db_count--; + } + } + | STRING { + for(i=1; i < strlen(yytext)-1; i++) { + op[db_count++] = yytext[i]; + if (db_count >= MAX_DB) { + error("too many bytes, use two DB"); + db_count--; + } + } + } + +dw_directive: DW {dw_count = 0;} + +words: words ',' word_element + | word_element + +word_element: expr { + op[dw_count] = $1 & 255; + op[dw_count+1] = ($1 >> 8) & 255; + dw_count += 2; + if (dw_count >= MAX_DB) { + error("too many bytes, use two DW"); + db_count -= 2; + } + } + + + +symbol: WORD { + strcpy(symbol_name, lex_sym_name); + } + +bitsymbol: WORD { strcpy(symbol_name, lex_sym_name); } + | BIT { strcpy(symbol_name, lex_sym_name); } + + +regsymbol: WORD { strcpy(symbol_name, lex_sym_name); } + | REG { strcpy(symbol_name, lex_sym_name); } + +bit: expr '.' expr { + if ($3 < 0 || $3 > 7) { + /* only 8 bits in a byte */ + error("Only eight bits in a byte"); + } + $$ = 100000; /* should really check $1 is valid */ + if ($1 >= 0x20 && $1 <= 0x3F) { + $$ = $1 * 8 + $3; + } + if ($1 >= 0x400 && $1 <= 0x43F) { + $$ = ($1 - 0x400) * 8 + $3 + 0x200; + } + } + | REG '.' expr { + $$ = 100000; + if (find_size_reg($1) == SIZE8) { + if ($3 < 0 || $3 > 7) + error("byte reg has only 8 bits"); + $$ = reg($1) * 8 + $3; + } + if (find_size_reg($1) == SIZE16) { + if ($3 < 0 || $3 > 15) + error("word reg has only 16 bits"); + $$ = reg($1) * 16 + $3; + } + } + | BIT {$$ = $1;} + +jmpaddr: WORD { + $$ = $1; + if (p1) build_target_list(lex_sym_name); + } + | NUMBER { + if ($1 & 1) error("Jump target must be aligned"); + $$ = $1; + } + + +expr: value {$$ = $1;} + | expr '+' expr {$$ = $1 + $3;} + | expr '-' expr {$$ = $1 - $3;} + | expr '*' expr {$$ = $1 * $3;} + | expr '/' expr {$$ = $1 / $3;} + | expr '&' expr {$$ = $1 & $3;} + | expr '|' expr {$$ = $1 | $3;} + | expr '^' expr {$$ = $1 ^ $3;} + | expr RSHIFT expr {$$ = $1 >> $3;} + | expr LSHIFT expr {$$ = $1 << $3;} + | '-' expr %prec UNARY {$$ = $2 * -1;} + | '+' expr %prec UNARY {$$ = $2;} + | '(' expr ')' {$$ = $2;} + | LOW expr %prec UNARY {$$ = $2 & 255;} + | HIGH expr %prec UNARY {$$ = ($2 >> 8) & 255;} + + +value: NUMBER {$$ = $1;} + | CHAR {$$ = $1;} + | WORD { $$ = $1;} + +rlist: REG { + rlist_bitmask = 1<<(reg($1) % 8); + rlist_reg_bank = (reg($1) / 8) ? 1 : 0; + rlist_size = find_size_reg($1); + } + | REG ',' rlist { + rlist_bitmask |= 1<<(reg($1) % 8); + if (rlist_reg_bank != ((reg($1) / 8) ? 1 : 0)) + error("register list may not mix 0-7/8-15 regs"); + if (rlist_size != find_size_reg($1)) + error("register list may not mix 8/16 bit registers"); + } + + + + + +instruction: + + arith_inst REG ',' REG { + $$ = 2; + size = find_size2(inst_size, $2, $4); + op[0] = arith_opcode * 16 + size * 8 + 1; + op[1] = reg($2) * 16 + reg($4); + } +| arith_inst REG ',' '[' REG ']' { + $$ = 2; + size = find_size1(inst_size, $2); + op[0] = arith_opcode * 16 + size * 8 + 2; + op[1] = reg($2) * 16 + reg_indirect($5); + } +| arith_inst '[' REG ']' ',' REG { + $$ = 2; + size = find_size1(inst_size, $6); + op[0] = arith_opcode * 16 + size * 8 + 2; + op[1] = reg($6) * 16 + 8 + reg_indirect($3); + } +| arith_inst REG ',' '[' REG '+' expr ']' { + size = find_size1(inst_size, $2); + if ($7 >= -128 && $7 <= 127) { + $$ = 3; + op[0] = arith_opcode * 16 + size * 8 + 4; + op[1] = reg($2) * 16 + reg_indirect($5); + op[2] = ($7 >= 0) ? $7 : 256 + $7; + RELOC_ABS_FF(MEM_POS+2,0); + } else { + $$ = 4; + op[0] = arith_opcode * 16 + size * 8 + 5; + op[1] = reg($2) * 16 + reg_indirect($5); + op[2] = ($7 >= 0) ? msb($7) : msb(65536 + $7); + op[3] = ($7 >= 0) ? lsb($7) : lsb(65536 + $7); + RELOC_ABS_FFFF(MEM_POS+2,0); + } + } +| arith_inst '[' REG '+' expr ']' ',' REG { + size = find_size1(inst_size, $8); + if ($5 >= -128 && $5 <= 127) { + $$ = 3; + op[0] = arith_opcode * 16 + size * 8 + 4; + op[1] = reg($8) * 16 + 8 + reg_indirect($3); + op[2] = ($5 >= 0) ? $5 : 256 + $5; + RELOC_ABS_FF(MEM_POS+2,0); + } else { + $$ = 4; + op[0] = arith_opcode * 16 + size * 8 + 5; + op[1] = reg($8) * 16 + 8 + reg_indirect($3); + op[2] = ($5 >= 0) ? msb($5) : msb(65536 + $5); + op[3] = ($5 >= 0) ? lsb($5) : lsb(65536 + $5); + RELOC_ABS_FFFF(MEM_POS+2,0); + } + } +| arith_inst REG ',' '[' REG '+' ']' { + $$ = 2; + size = find_size1(inst_size, $2); + op[0] = arith_opcode * 16 + size * 8 + 3; + op[1] = reg($2) * 16 + reg_indirect($5); + } +| arith_inst '[' REG '+' ']' ',' REG { + $$ = 2; + size = find_size1(inst_size, $7); + op[0] = arith_opcode * 16 + size * 8 + 3; + op[1] = reg($7) * 16 + 8 + reg_indirect($3); + } +| arith_inst WORD ',' REG { + $$ = 3; + size = find_size1(inst_size, $4); + op[0] = arith_opcode * 16 + size * 8 + 6; + op[1] = reg($4) * 16 + 8 + msb(direct_addr($2)); + op[2] = lsb(direct_addr($2)); + RELOC_DIR_07FF(MEM_POS+1, 0); + } +| arith_inst REG ',' WORD { + $$ = 3; + size = find_size1(inst_size, $2); + op[0] = arith_opcode * 16 + size * 8 + 6; + op[1] = reg($2) * 16 + msb(direct_addr($4)); + op[2] = lsb(direct_addr($4)); + RELOC_DIR_07FF(MEM_POS+1, 0); + } +| arith_inst REG ',' '#' expr { + size = find_size1(inst_size, $2); + if (size == SIZE8) { + $$ = 3; + op[0] = 0x91; + op[1] = reg($2) * 16 + arith_opcode; + op[2] = imm_data8($5); + RELOC_ABS_FF(MEM_POS+2, 0); + } else { + $$ = 4; + op[0] = 0x99; + op[1] = reg($2) * 16 + arith_opcode; + op[2] = msb(imm_data16($5)); + op[3] = lsb(imm_data16($5)); + RELOC_ABS_FFFF (MEM_POS+2, 0); + } + } +| arith_inst '[' REG ']' ',' '#' expr { + size = find_size0(inst_size); + if (size == SIZE8) { + $$ = 3; + op[0] = 0x92; + op[1] = reg_indirect($3) * 16 + arith_opcode; + op[2] = imm_data8($7); + RELOC_ABS_FF(MEM_POS+2, 0); + } else { + $$ = 4; + op[0] = 0x9A; + op[1] = reg_indirect($3) * 16 + arith_opcode; + op[2] = msb(imm_data16($7)); + op[3] = lsb(imm_data16($7)); + RELOC_ABS_FFFF (MEM_POS+2, 0); + } + } +| arith_inst '[' REG '+' ']' ',' '#' expr { + size = find_size0(inst_size); + if (size == SIZE8) { + $$ = 3; + op[0] = 0x93; + op[1] = reg_indirect($3) * 16 + arith_opcode; + op[2] = imm_data8($8); + RELOC_ABS_FF(MEM_POS+2, 0); + } else { + $$ = 4; + op[0] = 0x9B; + op[1] = reg_indirect($3) * 16 + arith_opcode; + op[2] = msb(imm_data16($8)); + op[3] = lsb(imm_data16($8)); + RELOC_ABS_FFFF (MEM_POS+2, 0); + } + } +| arith_inst '[' REG '+' expr ']' ',' '#' expr { + size = find_size0(inst_size); + if ($5 >= -128 && $5 <= 127) { + if (size == SIZE8) { + $$ = 4; + op[0] = 0x94; + op[1] = reg_indirect($3) * 16 + arith_opcode; + op[2] = ($5 >= 0) ? $5 : 256 + $5; + op[3] = imm_data8($9); + RELOC_ABS_FF(MEM_POS+2, 0); + RELOC_ABS_FF(MEM_POS+3, 1); + } else { + $$ = 5; + op[0] = 0x9C; + op[1] = reg_indirect($3) * 16 + arith_opcode; + op[2] = ($5 >= 0) ? $5 : 256 + $5; + op[3] = msb(imm_data16($9)); + op[4] = lsb(imm_data16($9)); + RELOC_ABS_FF(MEM_POS+2, 0); + RELOC_ABS_FFFF(MEM_POS+3, 1); + } + } else { + if (size == SIZE8) { + $$ = 5; + op[0] = 0x95; + op[1] = reg_indirect($3) * 16 + arith_opcode; + op[2] = ($5 >= 0) ? msb($5) : msb(65536 + $5); + op[3] = ($5 >= 0) ? lsb($5) : lsb(65536 + $5); + op[4] = imm_data8($9); + RELOC_ABS_FFFF(MEM_POS+2,0); + RELOC_ABS_FF(MEM_POS+4,1); + } else { + $$ = 6; + op[0] = 0x9D; + op[1] = reg_indirect($3) * 16 + arith_opcode; + op[2] = ($5 >= 0) ? msb($5) : msb(65536 + $5); + op[3] = ($5 >= 0) ? lsb($5) : lsb(65536 + $5); + op[4] = msb(imm_data16($9)); + op[5] = lsb(imm_data16($9)); + RELOC_ABS_FFFF(MEM_POS+2, 0); + RELOC_ABS_FFFF(MEM_POS+4, 1); + } + } + } +| arith_inst WORD ',' '#' expr { + size = find_size0(inst_size); + if (size == SIZE8) { + $$ = 4; + op[0] = 0x96; + op[1] = msb(direct_addr($2)) * 16 + arith_opcode; + op[2] = lsb(direct_addr($2)); + op[3] = imm_data8($5); + RELOC_DIR_70FF(MEM_POS+1,0); + RELOC_ABS_FF(MEM_POS+3,1); + } else { + $$ = 5; + op[0] = 0x9E; + op[1] = msb(direct_addr($2)) * 16 + arith_opcode; + op[2] = lsb(direct_addr($2)); + op[3] = msb(imm_data16($5)); + op[4] = lsb(imm_data16($5)); + RELOC_DIR_70FF(MEM_POS+1,0); + RELOC_ABS_FFFF (MEM_POS+3,1); + } + } + +/* the next 8 instructions are MOV, but because MOV was used in the */ +/* arith_inst group, it will cause a shift/reduce conflict if used */ +/* directly below... so we're forced to use arith_inst and then */ +/* add a bit of code to make sure it was MOV and not the other ones */ + +| arith_inst '[' REG '+' ']' ',' '[' REG '+' ']' { + /* this addr mode is only valid for MOV */ + if (arith_opcode != 8) error("Addr mode only valid for MOV (1)"); + size = find_size0(inst_size); + $$ = 2; + op[0] = 0x90 + size * 8; + op[1] = reg_indirect($3) * 16 + reg_indirect($8); + } +| arith_inst WORD ',' '[' REG ']' { + /* this addr mode is only valid for MOV */ + if (arith_opcode != 8) error("Addr mode only valid for MOV (2)"); + size = find_size0(inst_size); + $$ = 3; + op[0] = 0xA0 + size * 8; + op[1] = 128 + reg_indirect($5) * 16 + msb(direct_addr($2)); + op[2] = lsb(direct_addr($2)); + RELOC_DIR_07FF(MEM_POS+1, 0); + } +| arith_inst '[' REG ']' ',' WORD { + /* this addr mode is only valid for MOV */ + if (arith_opcode != 8) error("Addr mode only valid for MOV (3)"); + size = find_size0(inst_size); + $$ = 3; + op[0] = 0xA0 + size * 8; + op[1] = reg_indirect($3) * 16 + msb(direct_addr($6)); + op[2] = lsb(direct_addr($6)); + RELOC_DIR_07FF(MEM_POS+1, 0); + } +| arith_inst WORD ',' WORD { + /* this addr mode is only valid for MOV */ + if (arith_opcode != 8) error("Addr mode only valid for MOV (4)"); + size = find_size0(inst_size); + $$ = 4; + op[0] = 0x97 + size * 8; + op[1] = msb(direct_addr($2)) * 16 + msb(direct_addr($4)); + op[2] = lsb(direct_addr($2)); + op[3] = lsb(direct_addr($4)); + RELOC_DIR_70FF(MEM_POS+1, 0); + RELOC_DIR_0700FF(MEM_POS+1, 1); + } +| arith_inst REG ',' USP { + /* this addr mode is only valid for MOV */ + if (arith_opcode != 8) error("Addr mode only valid for MOV (5)"); + $$ = 2; + op[0] = 0x90; + op[1] = reg($2) * 16 + 15; + } +| arith_inst USP ',' REG { + /* this addr mode is only valid for MOV */ + if (arith_opcode != 8) error("Addr mode only valid for MOV (6)"); + $$ = 2; + op[0] = 0x98; + op[1] = reg($4) * 16 + 15; + } +| arith_inst C ',' bit { + /* this addr mode is only valid for MOV */ + if (arith_opcode != 8) error("Addr mode only valid for MOV (7)"); + $$ = 3; + op[0] = 0x08; + op[1] = 0x20 + msb(bit_addr($4)); + op[2] = lsb(bit_addr($4)); + RELOC_BIT_03FF(MEM_POS+1, 0); + } +| arith_inst bit ',' C { + /* this addr mode is only valid for MOV */ + if (arith_opcode != 8) error("Addr mode only valid for MOV (8)"); + $$ = 3; + op[0] = 0x08; + op[1] = 0x30 + msb(bit_addr($2)); + op[2] = lsb(bit_addr($2)); + RELOC_BIT_03FF(MEM_POS+1, 0); + } + +| MOVC REG ',' '[' REG '+' ']' { + size = find_size1(inst_size, $2); + $$ = 2; + op[0] = 0x80 + size * 8; + op[1] = reg($2) * 16 + reg_indirect($5); + } +| MOVC A ',' '[' A '+' DPTR ']' { + $$ = 2; + op[0] = 0x90; + op[1] = 0x4E; + } +| MOVC A ',' '[' A '+' PC ']' { + $$ = 2; + op[0] = 0x90; + op[1] = 0x4C; + } +| MOVX REG ',' '[' REG ']' { + $$ = 2; + size = find_size1(inst_size, $2); + op[0] = 0xA7 + size * 8; + op[1] = reg($2) * 16 + reg_indirect($5); + } +| MOVX '[' REG ']' ',' REG { + $$ = 2; + size = find_size1(inst_size, $6); + op[0] = 0xA7 + size * 8; + op[1] = reg($6) * 16 + 8 + reg_indirect($3); + } +| XCH REG ',' REG { + $$ = 2; + size = find_size2(inst_size, $2, $4); + op[0] = 0x60 + size * 8; + op[1] = reg($2) * 16 + reg($4); + } +| XCH REG ',' '[' REG ']' { + $$ = 2; + size = find_size1(inst_size, $2); + op[0] = 0x50 + size * 8; + op[1] = reg($2) * 16 + reg_indirect($5); + } +| XCH REG ',' WORD { + $$ = 3; + size = find_size1(inst_size, $2); + op[0] = 0xA0 + size * 8; + op[1] = reg($2) * 16 + msb(direct_addr($4)); + op[2] = lsb(direct_addr($4)); + RELOC_DIR_07FF(MEM_POS+1, 0); + } +| short_data_inst REG ',' '#' expr { + $$ = 2; + size = find_size1(inst_size, $2); + op[0] = short_opcode + size * 8 + 1; + op[1] = reg($2) * 16 + imm_data4_signed($5); + RELOC_ABS_0F(MEM_POS+1, 0); + } +| short_data_inst '[' REG ']' ',' '#' expr { + $$ = 2; + size = find_size0(inst_size); + op[0] = short_opcode + size * 8 + 2; + op[1] = reg_indirect($3) * 16 + imm_data4_signed($7); + RELOC_ABS_0F(MEM_POS+1, 0); + } +| short_data_inst '[' REG '+' ']' ',' '#' expr { + $$ = 2; + size = find_size0(inst_size); + op[0] = short_opcode + size * 8 + 3; + op[1] = reg_indirect($3) * 16 + imm_data4_signed($8); + RELOC_ABS_0F(MEM_POS+1, 0); + } +| short_data_inst '[' REG '+' expr ']' ',' '#' expr { + size = find_size0(inst_size); + if ($5 >= -128 && $5 <= 127) { + $$ = 3; + op[0] = short_opcode + size * 8 + 4; + op[1] = reg_indirect($3) * 16 + imm_data4_signed($9); + op[2] = op[2] = ($5 >= 0) ? $5 : 256 + $5; + RELOC_ABS_0F(MEM_POS+1, 1); + RELOC_ABS_FF(MEM_POS+2, 0); + } else { + $$ = 4; + op[0] = short_opcode + size * 8 + 5; + op[1] = reg_indirect($3) * 16 + imm_data4_signed($9); + op[2] = ($5 >= 0) ? msb($5) : msb(65536 + $5); + op[3] = ($5 >= 0) ? lsb($5) : lsb(65536 + $5); + RELOC_ABS_0F(MEM_POS+1, 1); + RELOC_ABS_FFFF(MEM_POS+2, 0); + } + } +| short_data_inst expr ',' '#' expr { + $$ = 3; + size = find_size0(inst_size); + op[0] = short_opcode + size * 8 + 6; + op[1] = msb(direct_addr($2)) * 16 + imm_data4_signed($5); + op[2] = lsb(direct_addr($2)); + RELOC_ABS_0F(MEM_POS+1, 0); + } +| ANL C ',' bit { + $$ = 3; + op[0] = 0x08; + op[1] = 0x40 + msb(bit_addr($4)); + op[2] = lsb(bit_addr($4)); + RELOC_BIT_03FF(MEM_POS+1, 0); + } +| ANL C ',' '/' bit { + $$ = 3; + op[0] = 0x08; + op[1] = 0x50 + msb(bit_addr($5)); + op[2] = lsb(bit_addr($5)); + RELOC_BIT_03FF(MEM_POS+1, 0); + } + +| ORL C ',' bit { + $$ = 3; + op[0] = 0x08; + op[1] = 0x60 + msb(bit_addr($4)); + op[2] = lsb(bit_addr($4)); + RELOC_BIT_03FF(MEM_POS+1, 0); + } +| ORL C ',' '/' bit { + $$ = 3; + op[0] = 0x08; + op[1] = 0x70 + msb(bit_addr($5)); + op[2] = lsb(bit_addr($5)); + RELOC_BIT_03FF(MEM_POS+1, 0); + } +| CLR bit { + $$ = 3; + op[0] = 0x08; + op[1] = msb(bit_addr($2)); + op[2] = lsb(bit_addr($2)); + RELOC_BIT_03FF(MEM_POS+1, 0); + } +| SETB bit { + $$ = 3; + op[0] = 0x08; + op[1] = 0x10 + msb(bit_addr($2)); + op[2] = lsb(bit_addr($2)); + RELOC_BIT_03FF(MEM_POS+1, 0); + } +| logical_shift_inst REG ',' REG { + size = find_size1(inst_size, $2); + if (find_size_reg($4) != SIZE8) + error("Second register in logical shift must be byte size"); + $$ = 2; + op[0] = shift_reg_opcode; + switch (size) { + case SIZE8: op[0] += 0; break; + case SIZE16: op[0] += 8; break; + case SIZE32: op[0] += 12; break; + } + op[1] = reg($2) * 16 + reg($4); + } +| logical_shift_inst REG ',' '#' NUMBER { + size = find_size1(inst_size, $2); + $$ = 2; + if (shift_imm_opcode == -1) + error("NORM may not use a constant"); + op[0] = shift_imm_opcode; + switch (size) { + case SIZE8: op[0] += 0; break; + case SIZE16: op[0] += 8; break; + case SIZE32: op[0] += 12; break; + } + switch (size) { + case SIZE8: + case SIZE16: + op[1] = reg($2) * 16 + imm_data4_unsigned($5); + break; + case SIZE32: + op[1] = (reg($2) / 2) * 32 + imm_data5_unsigned($5); + break; + } + } +| no_opperand_inst { + $$ = num_op; + op[0] = opcode0; + op[1] = opcode1; + } + +| TRAP '#' NUMBER { + $$ = 2; + op[0] = 0xD6; + op[1] = 0x30 + imm_data4_unsigned($3); + } +| CPL REG { + $$ = 2; + size = find_size1(inst_size, $2); + op[0] = 0x90 + size * 8; + op[1] = reg($2) * 16 + 10; + } +| DA REG { + $$ = 2; + op[0] = 0x90; + op[1] = reg($2) * 16 + 8; + } +| NEG REG { + $$ = 2; + size = find_size1(inst_size, $2); + op[0] = 0x90 + size * 8; + op[1] = reg($2) * 16 + 11; + } +| SEXT REG { + $$ = 2; + size = find_size1(inst_size, $2); + op[0] = 0x90 + size * 8; + op[1] = reg($2) * 16 + 9; + } + +| rotate_inst REG ',' '#' NUMBER { + $$ = 2; + size = find_size1(inst_size, $2); + op[0] = rotate_opcode + size * 8; + op[1] = reg($2) * 16 + imm_data4_unsigned($5); + } + + +| LEA REG ',' REG '+' expr { + if ($6 >= -128 && $6 <= 127) { + $$ = 3; + op[0] = 0x40; + op[1] = reg($2) * 16 + reg_indirect($4); + op[2] = ($6 >= 0) ? $6 : 256 + $6; + RELOC_ABS_FF(MEM_POS+2, 0); + } else { + op[0] = 0x48; + op[1] = reg($2) * 16 + reg_indirect($4); + op[2] = ($6 >= 0) ? msb($6) : msb(65536 + $6); + op[3] = ($6 >= 0) ? lsb($6) : lsb(65536 + $6); + RELOC_ABS_FFFF(MEM_POS+2, 0); + } + } +| stack_inst WORD { + $$ = 3; + size = find_size0(inst_size); + op[0] = msb(stack_addr_opcode) + size * 8; + op[1] = lsb(stack_addr_opcode) + msb(direct_addr($2)); + op[2] = lsb(direct_addr($2)); + RELOC_DIR_07FF(MEM_POS+1, 0); + } +| stack_inst rlist { + $$ = 2; + if (inst_size != UNKNOWN && find_size0(inst_size) != rlist_size) + error("inst specifies different size than registers used"); + op[0] = stack_reg_opcode + rlist_reg_bank * 64 + rlist_size * 8; + op[1] = rlist_bitmask; + } + + +| MUL REG ',' REG { + $$ = 2; + size = find_size2(inst_size, $2, $4); + op[0] = 0xE6; + op[1] = reg($2) * 16 + reg($4); + } +| MULU REG ',' REG { + $$ = 2; + size = find_size2(inst_size, $2, $4); + if (size == SIZE8) { + op[0] = 0xE0; + op[1] = reg($2) * 16 + reg($4); + } else { + op[0] = 0xE4; + op[1] = reg($2) * 16 + reg($4); + } + } +| MUL REG ',' '#' expr { + $$ = 2; + size = find_size1(inst_size, $2); + op[0] = 0xE9; + op[1] = reg($2) + 8; + op[2] = msb(imm_data16($5)); + op[3] = lsb(imm_data16($5)); + RELOC_ABS_FFFF(MEM_POS+2, 0); + } +| MULU REG ',' '#' expr { + size = find_size2(inst_size, $2, $4); + if (size == SIZE8) { + $$ = 3; + op[0] = 0xE8; + op[1] = reg($2) * 16; + op[2] = imm_data8($5); + RELOC_ABS_FF(MEM_POS+2, 0); + } else { + $$ = 4; + op[0] = 0xE9; + op[1] = reg($2) * 16; + op[2] = msb(imm_data16($5)); + op[3] = lsb(imm_data16($5)); + RELOC_ABS_FFFF(MEM_POS+2, 0); + } + } +| DIV REG ',' REG { + $$ = 2; + size = find_size2(inst_size, $2, $4); + switch (size) { + case SIZE8: + error("Signed DIV can't be 8 bit size"); break; + case SIZE16: + op[0] = 0xE7; + op[1] = reg($2) * 16 + reg($4); + break; + case SIZE32: + op[0] = 0xEF; + op[1] = (reg($2) / 2) * 32 + reg($4); + break; + } + } +| DIVU REG ',' REG { + $$ = 2; + size = find_size2(inst_size, $2, $4); + switch (size) { + case SIZE8: + op[0] = 0xE1; + op[1] = reg($2) * 16 + reg($4); + break; + case SIZE16: + op[0] = 0xE5; + op[1] = reg($2) * 16 + reg($4); + break; + case SIZE32: + op[0] = 0xED; + op[1] = (reg($2) / 2) * 32 + reg($4); + break; + } + } +| DIV REG ',' '#' expr { + size = find_size1(inst_size, $2); + switch (size) { + case SIZE8: + error("Singed DIV can't be 8 bit size"); break; + case SIZE16: + $$ = 3; + op[0] = 0xE8; + op[1] = reg($2) * 16 + 11; + op[2] = imm_data8($5); + RELOC_ABS_FF(MEM_POS+2, 0); + break; + case SIZE32: + $$ = 4; + op[0] = 0xE9; + op[1] = (reg($2) / 2) * 32 + 9; + op[2] = msb(imm_data16($5)); + op[3] = lsb(imm_data16($5)); + RELOC_ABS_FFFF(MEM_POS+2, 0); + break; + } + } +| DIVU REG ',' '#' expr { + size = find_size1(inst_size, $2); + switch (size) { + case SIZE8: + $$ = 3; + op[0] = 0xE8; + op[1] = reg($2) * 16 + 1; + op[2] = imm_data8($5); + RELOC_ABS_FF(MEM_POS+2, 0); + break; + case SIZE16: + $$ = 3; + op[0] = 0xE8; + op[1] = reg($2) * 16 + 3; + op[2] = imm_data8($5); + RELOC_ABS_FF(MEM_POS+2, 0); + break; + case SIZE32: + $$ = 4; + op[0] = 0xE9; + op[1] = (reg($2) / 2) * 32 + 1; + op[2] = msb(imm_data16($5)); + op[3] = lsb(imm_data16($5)); + RELOC_ABS_FFFF(MEM_POS+2, 0); + break; + } + } +| CALL '[' REG ']' { + $$ = 2; + op[0] = 0xC6; + op[1] = reg($3); + } +| FCALL jmpaddr { + $$ = 4; + op[0] = 0xC4; + op[1] = ($2 >> 8) & 255; + op[2] = $2 & 255; + op[3] = ($2 >> 16) & 255; + } +| FJMP jmpaddr { + $$ = 4; + op[0] = 0xD4; + op[1] = ($2 >> 8) & 255; + op[2] = $2 & 255; + op[3] = ($2 >> 16) & 255; + } +| JMP '[' REG ']' { + $$ = 2; + op[0] = 0xD6; + op[1] = 0x70 + reg_indirect($3); + } +| JMP '[' A '+' DPTR ']' { + $$ = 2; + op[0] = 0xD6; + op[1] = 0x46; + } +| JMP '[' '[' REG '+' ']' ']' { + $$ = 2; + op[0] = 0xD6; + op[1] = 0x60 + reg_indirect($4); + } + +| JMP jmpaddr { + $$ = 3; + op[0] = 0xD5; + op[1] = msb(rel16(MEM_POS + $$, $2)); + op[2] = lsb(rel16(MEM_POS + $$, $2)); + RELOC_FFFF(MEM_POS+1,MEM_POS+$$,0); + } + +| CALL jmpaddr { + $$ = 3; + op[0] = 0xC5; + op[1] = msb(rel16(MEM_POS + $$, $2)); + op[2] = lsb(rel16(MEM_POS + $$, $2)); + RELOC_FFFF(MEM_POS+1, MEM_POS+$$, 0); + } +| branch_inst jmpaddr { + $$ = 2; + op[0] = branch_opcode; + op[1] = rel8(MEM_POS + $$, $2); + RELOC_FF(MEM_POS+1,MEM_POS + $$, 0); + } +| CJNE REG ',' expr ',' jmpaddr { + $$ = 4; + size = find_size1(inst_size, $2); + op[0] = 0xE2 + size * 8; + op[1] = reg($2) * 16 + msb(direct_addr($4)); + op[2] = lsb(direct_addr($4)); + op[3] = rel8(MEM_POS + $$, $6); + RELOC_DIR_07FF(MEM_POS+1, 0); + RELOC_FF(MEM_POS+3, MEM_POS + $$, 1); + } +| CJNE REG ',' '#' expr ',' jmpaddr { + size = find_size1(inst_size, $2); + if (size == SIZE8) { + $$ = 4; + op[0] = 0xE3; + op[1] = reg($2) * 16; + op[2] = rel8(MEM_POS + $$, $7); + op[3] = imm_data8($5); + RELOC_ABS_FF(MEM_POS+3, 0); + } else { + $$ = 5; + op[0] = 0xEB; + op[1] = reg($2) * 16; + op[2] = rel8(MEM_POS + $$, $7); + op[3] = msb(imm_data16($5)); + op[4] = lsb(imm_data16($5)); + RELOC_ABS_FFFF(MEM_POS+3, 0); + } + } +| CJNE '[' REG ']' ',' '#' expr ',' jmpaddr { + size = find_size0(inst_size); + if (size == SIZE8) { + $$ = 4; + op[0] = 0xE3; + op[1] = reg_indirect($3) * 16 + 8; + op[2] = rel8(MEM_POS + $$, $9); + op[3] = imm_data8($7); + RELOC_ABS_FF(MEM_POS+3, 0); + } else { + $$ = 5; + op[0] = 0xEB; + op[1] = reg_indirect($3) * 16 + 8; + op[2] = rel8(MEM_POS + $$, $9); + op[3] = msb(imm_data16($7)); + op[4] = lsb(imm_data16($7)); + RELOC_ABS_FFFF(MEM_POS+3, 0); + } + } +| DJNZ REG ',' jmpaddr { + $$ = 3; + size = find_size1(inst_size, $2); + op[0] = 0x87 + size * 8; + op[1] = reg($2) * 16 + 8; + op[2] = rel8(MEM_POS + $$, $4); + RELOC_FF(MEM_POS+2, MEM_POS+$$, 0); + } + + +| DJNZ WORD ',' jmpaddr { + $$ = 4; + size = find_size0(inst_size); + op[0] = 0xE2 + size * 8; + op[1] = msb(direct_addr($2)) + 8; + op[2] = lsb(direct_addr($2)); + op[3] = rel8(MEM_POS + $$, $4); + RELOC_DIR_07FF(MEM_POS+1, 0); + RELOC_FF(MEM_POS+3, MEM_POS + $$, 1) + } + +| JB bit ',' jmpaddr { + $$ = 4; + op[0] = 0x97; + op[1] = 0x80 + msb(bit_addr($2)); + op[2] = lsb(bit_addr($2)); + op[3] = rel8(MEM_POS + $$, $4); + RELOC_BIT_03FF(MEM_POS+1, 0); + RELOC_FF(MEM_POS+3, MEM_POS + $$, 1); + } + +| JBC bit ',' jmpaddr { + $$ = 4; + op[0] = 0x97; + op[1] = 0xC0 + msb(bit_addr($2)); + op[2] = lsb(bit_addr($2)); + op[3] = rel8(MEM_POS + $$, $4); + RELOC_BIT_03FF(MEM_POS+1, 0); + RELOC_FF(MEM_POS+3, MEM_POS + $$, 1); + } + +| JNB bit ',' jmpaddr { + $$ = 4; + op[0] = 0x97; + op[1] = 0xA0 + msb(bit_addr($2)); + op[2] = lsb(bit_addr($2)); + op[3] = rel8(MEM_POS + $$, $4); + RELOC_BIT_03FF(MEM_POS+1, 0); + RELOC_FF(MEM_POS+3, MEM_POS + $$, 1); + } + + +arith_inst: + ADD {arith_opcode = 0;} + | ADDC {arith_opcode = 1;} + | AND {arith_opcode = 5;} + | CMP {arith_opcode = 4;} + | MOV {arith_opcode = 8;} + | OR {arith_opcode = 6;} + | SUB {arith_opcode = 2;} + | SUBB {arith_opcode = 3;} + | XOR {arith_opcode = 7;} + +short_data_inst: + ADDS {short_opcode = 0xA0;} + | MOVS {short_opcode = 0xB0;} + +logical_shift_inst: + ASL {shift_reg_opcode = 0xC1; shift_imm_opcode = 0xD1;} + | ASR {shift_reg_opcode = 0xC2; shift_imm_opcode = 0xD2;} + | LSR {shift_reg_opcode = 0xC0; shift_imm_opcode = 0xD0;} + | NORM {shift_reg_opcode = 0xC3; shift_imm_opcode = -1;} + +rotate_inst: + RL {rotate_opcode = 0xD3;} + | RLC {rotate_opcode = 0xD7;} + | RR {rotate_opcode = 0xD0;} + | RRC {rotate_opcode = 0xD7;} + +stack_inst: + POP {stack_addr_opcode = 0x8710; stack_reg_opcode = 0x27;} + | POPU {stack_addr_opcode = 0x8700; stack_reg_opcode = 0x37;} + | PUSH {stack_addr_opcode = 0x8730; stack_reg_opcode = 0x07;} + | PUSHU {stack_addr_opcode = 0x8720; stack_reg_opcode = 0x17;} + +no_opperand_inst: + BKPT {num_op = 1; opcode0 = 255; opcode1 = 0;} + | NOP {num_op = 1; opcode0 = 0; opcode1 = 0;} + | RESET {num_op = 2; opcode0 = 0xD6; opcode1 = 0x10;} + | RET {num_op = 2; opcode0 = 0xD6; opcode1 = 0x80;} + | RETI {num_op = 2; opcode0 = 0xD6; opcode1 = 0x90;} + +branch_inst: + BCC {branch_opcode = 0xF0;} + | BCS {branch_opcode = 0xF1;} + | BEQ {branch_opcode = 0xF3;} + | BG {branch_opcode = 0xF8;} + | BGE {branch_opcode = 0xFA;} + | BGT {branch_opcode = 0xFC;} + | BL {branch_opcode = 0xF9;} + | BLE {branch_opcode = 0xFD;} + | BLT {branch_opcode = 0xFB;} + | BMI {branch_opcode = 0xF7;} + | BNE {branch_opcode = 0xF2;} + | BNV {branch_opcode = 0xF4;} + | BOV {branch_opcode = 0xF5;} + | BPL {branch_opcode = 0xF6;} + | BR {branch_opcode = 0xFE;} + | JZ {branch_opcode = 0xEC;} + | JNZ {branch_opcode = 0xEE;} + + + +%% + + +int reg(int reg_spec) +{ + return reg_spec & 15; +} + +int reg_indirect(int reg_spec) +{ + if (reg_spec & BYTE_REG) + error("Indirect addressing may not use byte registers"); + if ((reg_spec & 15) > 7) + error("Only R0 through R7 may be used for indirect addr"); + return reg_spec & 7; +} + +int rel16(int pos, int dest) +{ + int rel; + + if (!p3) return 0; /* don't bother unless writing code */ + if (dest & (BRANCH_SPACING - 1)) + error("Attempt to jump to unaligned location"); + pos &= ~(BRANCH_SPACING - 1); + rel = (dest - pos) / BRANCH_SPACING; + if (rel < -32768 || rel > 32767) + error("Attempt to jump out of 16 bit relative range"); + if (rel < 0) rel += 65536; + return rel; +} + +int rel8(int pos, int dest) +{ + int rel; + + if (!p3) return 0; /* don't bother unless writing code */ + if (dest & (BRANCH_SPACING - 1)) + error("Attempt to jump to unaligned location"); + pos &= ~(BRANCH_SPACING - 1); + rel = (dest - pos) / BRANCH_SPACING; + if (rel < -128 || rel > 127) + error("Attempt to jump out of 16 bit relative range"); + if (rel < 0) rel += 256; + return rel; +} + +int msb(int value) +{ + return (value >> 8) & 255; +} + +int lsb(int value) +{ + return value & 255; +} + +int direct_addr(int value) +{ + char buf[250]; + + if (value < 0 || value > 2047) { + sprintf(buf, "illegal value (%d) for direct address", value); + error(buf); + } + return value; +} + +int imm_data4_signed(int value) +{ + if (value < -8 || value > 7) + error("illegal 4 bit (signed) value"); + if (value >= 0) return value; + else return (16 + value); +} + +int imm_data4_unsigned(int value) +{ + if (value < 0 || value > 15) + error("illegal 4 bit (unsigned) value"); + return value; +} + +int imm_data5_unsigned(int value) +{ + if (value < 0 || value > 31) + error("illegal 5 bit (unsigned) value"); + return value; +} + +int imm_data8(int value) +{ + if (value < -128 || value > 255) + error("illegal 8 bit value"); + if (value >= 0) return value; + else return (256 + value); +} + +int imm_data16(int value) +{ + if (value < -32728 || value > 65535) + error("illegal 16 bit value"); + if (value >= 0) return value; + else return (65536 + value); +} + +int bit_addr(int value) +{ + if (value < 0 || value > 1023) { + fprintf(stderr, "bad bit addr of 0x%04X (%d dec)\n", + value, value); + error("illegal bit address"); + } + return value; +} + + +int find_size_reg(int op1spec) +{ + int op1size=UNKNOWN; + + if (op1spec & BYTE_REG) op1size = SIZE8; + if (op1spec & WORD_REG) op1size = SIZE16; + if (op1size == UNKNOWN) + error("Register without implied size"); + return op1size; +} + +int find_size0(int isize) +{ + if (isize == UNKNOWN) + error("Can't determine data size from instruction"); + return isize; +} + +int find_size1(int isize, int op1spec) +{ + int op1size=UNKNOWN; + + if (op1spec & BYTE_REG) op1size = SIZE8; + if (op1spec & WORD_REG) op1size = SIZE16; + if (op1size == UNKNOWN) + error("Register without implied size"); + + if (isize == SIZE32 && op1size == SIZE16) return SIZE32; + if (isize == UNKNOWN) return op1size; + else { + if (isize != op1size) + error("data size of register and inst don't agree"); + return isize; + } +} + +int find_size2(int isize, int op1spec, int op2spec) +{ + int op1size=UNKNOWN, op2size=UNKNOWN; + + if (op1spec & BYTE_REG) op1size = SIZE8; + if (op1spec & WORD_REG) op1size = SIZE16; + if (op1size == UNKNOWN) + error("Register without implied size"); + if (op2spec & BYTE_REG) op2size = SIZE8; + if (op2spec & WORD_REG) op2size = SIZE16; + if (op1size == UNKNOWN) + error("Register without implied size"); + + if (op1size != op2size) + error("data sizes of two registers don't agree"); + if (isize == UNKNOWN) return op1size; + else { + if (isize != op1size) + error("data size of registers and inst don't agree"); + return isize; + } +} + +int yyerror(char *s) +{ + if (yytext[0] >= 32) { + fprintf(stderr, "%s near '%s', line %d\n", + s, yytext, lineno); + } else { + fprintf(stderr, "%s, line %d\n", s, lineno - 1); + } + return 0; +} + +void error(char *s) +{ + yyerror(s); + exit(1); +} + +int yywrap() +{ + return 1; +} diff --git a/as/xa51/xa_version.h b/as/xa51/xa_version.h new file mode 100644 index 0000000..66c45b7 --- /dev/null +++ b/as/xa51/xa_version.h @@ -0,0 +1,18 @@ +/* xa_version.h + + Copyright 1997,2002 Paul Stoffregen (paul at pjrc dot com) + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#define version 0.1 diff --git a/as/z80/Makefile.bcc b/as/z80/Makefile.bcc new file mode 100644 index 0000000..149e313 --- /dev/null +++ b/as/z80/Makefile.bcc @@ -0,0 +1,21 @@ +# Makefile for Borland C + +PRJDIR = ../.. + +!include $(PRJDIR)/Bcc.inc + +CFLAGS = $(CFLAGS) -DINDEXLIB -DMLH_MAP -DSDK + +OBJECTS = asdata.obj asexpr.obj aslex.obj aslist.obj asmain.obj \ + asout.obj assubr.obj z80adr.obj z80ext.obj \ + z80mch.obj z80pst.obj \ + ../asxxsrc/strcmpi.obj ../asxxsrc/assym.obj ../asxxsrc/aslex.obj \ + ../asxxsrc/asnoice.obj \ + ../../support/Util/dbuf.obj ../../support/Util/dbuf_string.obj + +TARGET = $(PRJDIR)/bin/as-z80.exe + +all: $(TARGET) + +$(TARGET): $(OBJECTS) + $(CC) $(CFLAGS) -e$@ $(OBJECTS) diff --git a/as/z80/Makefile.in b/as/z80/Makefile.in new file mode 100644 index 0000000..e005ab6 --- /dev/null +++ b/as/z80/Makefile.in @@ -0,0 +1,74 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +include $(top_builddir)/Makefile.common + +OBJDIR = obj$(EXT) + +UTILLIB = $(srcdir)/../../support/Util +UTILSRC = dbuf.c dbuf_string.c +UTILLIBOBJS = $(UTILSRC:%.c=$(OBJDIR)/%.o) + +ASXXLIB = $(srcdir)/../asxxsrc +ASXXLIBSRC = strcmpi.c assym.c aslex.c asnoice.c +ASXXLIBOBJS = $(ASXXLIBSRC:%.c=$(OBJDIR)/%.o) + +SRC = asmain.c assubr.c \ + asexpr.c asdata.c aslist.c asout.c \ + z80ext.c z80pst.c z80mch.c z80adr.c +OBJS = $(SRC:%.c=$(OBJDIR)/%.o) + +ASSOURCES = $(SRC) $(ASXXLIBSRC:%.c=$(ASXXLIB)/%.c) $(UTILSRC:%.c=$(UTILLIB)/%.c) + +ASOBJECTS = $(OBJS) $(ASXXLIBOBJS) $(UTILLIBOBJS) + +BINS = $(BUILDDIR)/as$(EXT)$(EXEEXT) + +CFLAGS += $(CPPFLAGS) $(OPTS) -I. -I$(srcdir)/../../support/Util -DINDEXLIB -DMLH_MAP -DUNIX -DSDK +CFLAGS += -funsigned-char + +LDFLAGS = @LDFLAGS@ -lm $(EXTRALIBS) + +all: dep $(BINS) + +dep: Makefile.dep + +Makefile.dep: $(ASSOURCES) $(srcdir)/*.h + $(CPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.c,$^) > Makefile.dep + +ifeq "$(findstring $(MAKECMDGOALS),uninstall check installcheck installdirs \ + clean distclean mostlyclean realclean)" "" + -include Makefile.dep +endif + +# We need a '.stamp'-file in $(OBJDIR), because the time stamp +# of $(OBJDIR) itself is always updated, when a file in $(OBJDIR) +# is updated. A rule like +# $(OBJDIR)/anyfile: $(OBJDIR) +# will always force a remake (at least on Linux ext2). + +$(OBJDIR)/.stamp: + mkdir -p $(OBJDIR) + touch $(OBJDIR)/.stamp + +$(BINS): $(ASOBJECTS) + $(CC) -o $(BINS) $(ASOBJECTS) $(LDFLAGS) + +$(OBJDIR)/%.o: %.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + +$(OBJDIR)/%.o: $(ASXXLIB)/%.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + +$(OBJDIR)/%.o: $(UTILLIB)/%.c $(OBJDIR)/.stamp + $(CC) -c $(CFLAGS) -o $@ $< + +_as-z80: + $(MAKE) EXT=-z80$(E) + +_as-gbz80: + $(MAKE) EXT=-gbz80$(E) OPTS=-DGAMEBOY + +include $(srcdir)/clean.mk diff --git a/as/z80/as_gbz80.dsp b/as/z80/as_gbz80.dsp new file mode 100644 index 0000000..6c6740e --- /dev/null +++ b/as/z80/as_gbz80.dsp @@ -0,0 +1,193 @@ +# Microsoft Developer Studio Project File - Name="as_gbz80" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Console Application" 0x0103 + +CFG=as_gbz80 - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "as_gbz80.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "as_gbz80.mak" CFG="as_gbz80 - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "as_gbz80 - Win32 Debug" (based on "Win32 (x86) Console Application") +!MESSAGE "as_gbz80 - Win32 Release" (based on "Win32 (x86) Console Application") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "as_gbz80 - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug_gbz80" +# PROP BASE Intermediate_Dir "Debug_gbz80" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug_gbz80" +# PROP Intermediate_Dir "Debug_gbz80" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "MLH_MAP" /D "SDK" /FR /FD /GZ /c +# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I "." /I "../../support/Util" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "MLH_MAP" /D "SDK" /FR /FD /GZ /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 /nologo /subsystem:console /debug /machine:I386 /out:"..\..\bin_vc\as-z80.exe" /pdbtype:sept +# ADD LINK32 /nologo /subsystem:console /debug /machine:I386 /out:"..\..\bin_vc\as-gbz80.exe" /pdbtype:sept + +!ELSEIF "$(CFG)" == "as_gbz80 - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release_gbz80" +# PROP BASE Intermediate_Dir "Release_gbz80" +# PROP BASE Ignore_Export_Lib 0 +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Release_gbz80" +# PROP Intermediate_Dir "Release_gbz80" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /ML /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "MLH_MAP" /D "SDK" /FD /c +# ADD CPP /nologo /ML /W3 /GX /O2 /I "." /I "../../support/Util" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "MLH_MAP" /D "SDK" /FD /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 /nologo /subsystem:console /machine:I386 /out:"..\..\bin_vc\as-z80.exe" /pdbtype:sept +# ADD LINK32 /nologo /subsystem:console /machine:I386 /out:"..\..\bin_vc\as-gbz80.exe" /pdbtype:sept + +!ENDIF + +# Begin Target + +# Name "as_gbz80 - Win32 Debug" +# Name "as_gbz80 - Win32 Release" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\asdata.c +# ADD CPP /D "GAMEBOY" +# End Source File +# Begin Source File + +SOURCE=.\asexpr.c +# ADD CPP /D "GAMEBOY" +# End Source File +# Begin Source File + +SOURCE=..\asxxsrc\aslex.c +# End Source File +# Begin Source File + +SOURCE=.\aslist.c +# ADD CPP /D "GAMEBOY" +# End Source File +# Begin Source File + +SOURCE=.\asmain.c +# ADD CPP /D "GAMEBOY" +# End Source File +# Begin Source File + +SOURCE=..\asxxsrc\asnoice.c +# End Source File +# Begin Source File + +SOURCE=.\asout.c +# ADD CPP /D "GAMEBOY" +# End Source File +# Begin Source File + +SOURCE=.\assubr.c +# ADD CPP /D "GAMEBOY" +# End Source File +# Begin Source File + +SOURCE=..\asxxsrc\assym.c +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf.c +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf_string.c +# End Source File +# Begin Source File + +SOURCE=..\asxxsrc\strcmpi.c +# End Source File +# Begin Source File + +SOURCE=.\z80adr.c +# ADD CPP /D "GAMEBOY" +# End Source File +# Begin Source File + +SOURCE=.\z80ext.c +# ADD CPP /D "GAMEBOY" +# End Source File +# Begin Source File + +SOURCE=.\z80mch.c +# ADD CPP /D "GAMEBOY" +# End Source File +# Begin Source File + +SOURCE=.\z80pst.c +# ADD CPP /D "GAMEBOY" +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=.\alloc.h +# End Source File +# Begin Source File + +SOURCE=.\asm.h +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf.h +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf_string.h +# End Source File +# Begin Source File + +SOURCE=.\string.h +# End Source File +# Begin Source File + +SOURCE=.\z80.h +# End Source File +# End Group +# End Target +# End Project diff --git a/as/z80/as_z80.dsp b/as/z80/as_z80.dsp new file mode 100644 index 0000000..6f8f823 --- /dev/null +++ b/as/z80/as_z80.dsp @@ -0,0 +1,183 @@ +# Microsoft Developer Studio Project File - Name="as_z80" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Console Application" 0x0103 + +CFG=as_z80 - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "as_z80.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "as_z80.mak" CFG="as_z80 - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "as_z80 - Win32 Debug" (based on "Win32 (x86) Console Application") +!MESSAGE "as_z80 - Win32 Release" (based on "Win32 (x86) Console Application") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "as_z80 - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "MLH_MAP" /D "SDK" /FR /FD /GZ /c +# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I "." /I "../../support/Util" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "MLH_MAP" /D "SDK" /FR /FD /GZ /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 /nologo /subsystem:console /debug /machine:I386 /out:"..\..\bin_vc\as-z80.exe" /pdbtype:sept +# ADD LINK32 /nologo /subsystem:console /debug /machine:I386 /out:"..\..\bin_vc\as-z80.exe" /pdbtype:sept + +!ELSEIF "$(CFG)" == "as_z80 - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Ignore_Export_Lib 0 +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /ML /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "MLH_MAP" /D "SDK" /FD /c +# ADD CPP /nologo /ML /W3 /GX /O2 /I "." /I "../../support/Util" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "INDEXLIB" /D "MLH_MAP" /D "SDK" /FD /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 /nologo /subsystem:console /machine:I386 /out:"..\..\bin_vc\as-z80.exe" /pdbtype:sept +# ADD LINK32 /nologo /subsystem:console /machine:I386 /out:"..\..\bin_vc\as-z80.exe" /pdbtype:sept + +!ENDIF + +# Begin Target + +# Name "as_z80 - Win32 Debug" +# Name "as_z80 - Win32 Release" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\asdata.c +# End Source File +# Begin Source File + +SOURCE=.\asexpr.c +# End Source File +# Begin Source File + +SOURCE=..\asxxsrc\aslex.c +# End Source File +# Begin Source File + +SOURCE=.\aslist.c +# End Source File +# Begin Source File + +SOURCE=.\asmain.c +# End Source File +# Begin Source File + +SOURCE=..\asxxsrc\asnoice.c +# End Source File +# Begin Source File + +SOURCE=.\asout.c +# End Source File +# Begin Source File + +SOURCE=.\assubr.c +# End Source File +# Begin Source File + +SOURCE=..\asxxsrc\assym.c +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf.c +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf_string.c +# End Source File +# Begin Source File + +SOURCE=..\asxxsrc\strcmpi.c +# End Source File +# Begin Source File + +SOURCE=.\z80adr.c +# End Source File +# Begin Source File + +SOURCE=.\z80ext.c +# End Source File +# Begin Source File + +SOURCE=.\z80mch.c +# End Source File +# Begin Source File + +SOURCE=.\z80pst.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=.\alloc.h +# End Source File +# Begin Source File + +SOURCE=.\asm.h +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf.h +# End Source File +# Begin Source File + +SOURCE=..\..\support\Util\dbuf_string.h +# End Source File +# Begin Source File + +SOURCE=.\string.h +# End Source File +# Begin Source File + +SOURCE=.\z80.h +# End Source File +# End Group +# End Target +# End Project diff --git a/as/z80/asdata.c b/as/z80/asdata.c new file mode 100644 index 0000000..69c5a3d --- /dev/null +++ b/as/z80/asdata.c @@ -0,0 +1,289 @@ +/* asdata.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include + +#include "asm.h" + +/*)Module asdata.c + * + * The module asdata.c contains the global constants, + * structures, and variables used in the assembler. + */ + +int aserr; /* ASxxxx error counter + */ +jmp_buf jump_env; /* compiler dependent structure + * used by setjmp() and longjmp() + */ +int inpfil; /* count of assembler + * input files specified + */ +int incfil; /* current file handle index + * for include files + */ +int cfile; /* current file handle index + * of input assembly files + */ +int flevel; /* IF-ELSE-ENDIF flag will be non + * zero for false conditional case + */ +int tlevel; /* current conditional level + */ +int ifcnd[MAXIF+1]; /* array of IF statement condition + * values (0 = FALSE) indexed by tlevel + */ +int iflvl[MAXIF+1]; /* array of IF-ELSE-ENDIF flevel + * values indexed by tlevel + */ + +char afn[FILSPC]; /* afile temporary file name + */ +char srcfn[MAXFIL][FILSPC]; /* array of source file names + */ +int srcline[MAXFIL]; /* source line number + */ +char incfn[MAXINC][FILSPC]; /* array of include file names + */ +int incline[MAXINC]; /* include line number + */ + +int radix; /* current number conversion radix: + * 2 (binary), 8 (octal), 10 (decimal), + * 16 (hexadecimal) + */ +int line; /* current assembler source + * line number + */ +int page; /* current page number + */ +int lop; /* current line number on page + */ +int pass; /* assembler pass number + */ +int lflag; /* -l, generate listing flag + */ +int cflag; /* -c, generate sdcdb debug info + */ +int gflag; /* -g, make undefined symbols global flag + */ +int aflag; /* -a, make all symbols global flag + */ +int jflag; /* -j, generate debug information flag + */ +int oflag; /* -o, generate relocatable output flag + */ +int sflag; /* -s, generate symbol table flag + */ +int pflag; /* -p, enable listing pagination + */ +int xflag; /* -x, listing radix flag + */ +int fflag; /* -f(f), relocations flagged flag + */ +Addr_T laddr; /* address of current assembler line + * or value of .if argument + */ +Addr_T fuzz; /* tracks pass to pass changes in the + * address of symbols caused by + * variable length instruction formats + */ +int lmode; /* listing mode + */ +char *ep; /* pointer into error list + * array eb[NERR] + */ +char eb[NERR]; /* array of generated error codes + */ +const char *ip; /* pointer into the assembler-source + * text line in ib[] + */ +const char *ib; /* assembler-source text line + */ +char *cp; /* pointer to assembler output + * array cb[] + */ +char cb[NCODE]; /* array of assembler output values + */ +int *cpt; /* pointer to assembler relocation type + * output array cbt[] + */ +int cbt[NCODE]; /* array of assembler relocation types + * describing the data in cb[] + */ +char tb[NTITL]; /* Title string buffer + */ +char stb[NSBTL]; /* Subtitle string buffer + */ +char optsdcc[NINPUT]; /* sdcc compile options + */ + +char symtbl[] = { "Symbol Table" }; +char aretbl[] = { "Area Table" }; + +char module[NCPS]; /* module name string + */ + +/* + * The mne structure is a linked list of the assembler + * mnemonics and directives. The list of mnemonics and + * directives contained in the device dependent file + * xxxpst.c are hashed and linked into NHASH lists in + * module assym.c by syminit(). The structure contains + * the mnemonic/directive name, a subtype which directs + * the evaluation of this mnemonic/directive, a flag which + * is used to detect the end of the mnemonic/directive + * list in xxxpst.c, and a value which is normally + * associated with the assembler mnemonic base instruction + * value. + * + * struct mne + * { + * struct mne *m_mp; Hash link + * char *m_id; Mnemonic + * char m_type; Mnemonic subtype + * char m_flag; Mnemonic flags + * Addr_T m_valu; Value + * }; + */ +struct mne *mnehash[NHASH]; + +/* + * The sym structure is a linked list of symbols defined + * in the assembler source files. The first symbol is "." + * defined here. The entry 'struct tsym *s_tsym' + * links any temporary symbols following this symbol and + * preceeding the next normal symbol. The structure also + * contains the symbol's name, type (USER or NEW), flag + * (global, assigned, and multiply defined), a pointer + * to the area structure defining where the symbol is + * located, a reference number assigned by outgsd() in + * asout.c, and the symbols address relative to the base + * address of the area where the symbol is located. + * + * struct sym + * { + * struct sym *s_sp; Hash link + * struct tsym *s_tsym; Temporary symbol link + * char *s_id; Symbol + * char s_type; Symbol subtype + * char s_flag; Symbol flags + * struct area *s_area; Area line, 0 if absolute + * int s_ref; Ref. number + * Addr_T s_addr; Address + * }; + */ +struct sym sym[] = { + { NULL, NULL, ".", S_USER, S_END, NULL, 0, } +}; + +struct sym *symp; /* pointer to a symbol structure + */ +struct sym *symhash[NHASH]; /* array of pointers to NHASH + * linked symbol lists + */ + +/* + * The area structure contains the parameter values for a + * specific program or data section. The area structure + * is a linked list of areas. The initial default area + * is "_CODE" defined here, the next area structure + * will be linked to this structure through the structure + * element 'struct area *a_ep'. The structure contains the + * area name, area reference number ("_CODE" is 0) determined + * by the order of .area directives, area size determined + * from the total code and/or data in an area, area fuzz is + * an variable used to track pass to pass changes in the + * area size caused by variable length instruction formats, + * and area flags which specify the area's relocation type. + * + * struct area + * { + * struct area *a_ap; Area link + * char *a_id; Area Name + * int a_ref; Reference number + * Addr_T a_size; Area size + * Addr_T a_fuzz; Area fuzz + * int a_flag; Area flags + * }; + */ +struct area area[] = { + { NULL, "_CODE", 0, 0, 0, A_CON|A_REL } +}; + +struct area *areap; /* pointer to an area structure + */ + +FILE *lfp; /* list output file handle + */ +FILE *ofp; /* relocation output file handle + */ +FILE *tfp; /* symbol table output file handle + */ +FILE *sfp[MAXFIL]; /* array of assembler-source file handles + */ +FILE *ifp[MAXINC]; /* array of include-file file handles + */ + +/* + * array of character types, one per + * ASCII character + */ +unsigned char ctype[128] = { +/*NUL*/ ILL, ILL, ILL, ILL, ILL, ILL, ILL, ILL, +/*BS*/ ILL, SPACE, ILL, ILL, SPACE, ILL, ILL, ILL, +/*DLE*/ ILL, ILL, ILL, ILL, ILL, ILL, ILL, ILL, +/*CAN*/ ILL, ILL, ILL, ILL, ILL, ILL, ILL, ILL, +/*SPC*/ SPACE, ETC, ETC, ETC, LETTER, BINOP, BINOP, ETC, +/*(*/ ETC, ETC, BINOP, BINOP, ETC, BINOP, LETTER, BINOP, +/*0*/ DGT2, DGT2, DGT8, DGT8, DGT8, DGT8, DGT8, DGT8, +/*8*/ DGT10, DGT10, ETC, ETC, BINOP, ETC, BINOP, ETC, +/*@*/ ETC, LTR16, LTR16, LTR16, LTR16, LTR16, LTR16, LETTER, +/*H*/ LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, +/*P*/ LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, +/*X*/ LETTER, LETTER, LETTER, ETC, ETC, ETC, BINOP, LETTER, +/*`*/ ETC, LTR16, LTR16, LTR16, LTR16, LTR16, LTR16, LETTER, +/*h*/ LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, +/*p*/ LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, LETTER, +/*x*/ LETTER, LETTER, LETTER, ETC, BINOP, ETC, ETC, ETC +}; + +/* + * an array of characters which + * perform the case translation function + */ +char ccase[128] = { +/*NUL*/ '\000', '\001', '\002', '\003', '\004', '\005', '\006', '\007', +/*BS*/ '\010', '\011', '\012', '\013', '\014', '\015', '\016', '\017', +/*DLE*/ '\020', '\021', '\022', '\023', '\024', '\025', '\026', '\027', +/*CAN*/ '\030', '\031', '\032', '\033', '\034', '\035', '\036', '\037', +/*SPC*/ '\040', '\041', '\042', '\043', '\044', '\045', '\046', '\047', +/*(*/ '\050', '\051', '\052', '\053', '\054', '\055', '\056', '\057', +/*0*/ '\060', '\061', '\062', '\063', '\064', '\065', '\066', '\067', +/*8*/ '\070', '\071', '\072', '\073', '\074', '\075', '\076', '\077', +/*@*/ '\100', '\141', '\142', '\143', '\144', '\145', '\146', '\147', +/*H*/ '\150', '\151', '\152', '\153', '\154', '\155', '\156', '\157', +/*P*/ '\160', '\161', '\162', '\163', '\164', '\165', '\166', '\167', +/*X*/ '\170', '\171', '\172', '\133', '\134', '\135', '\136', '\137', +/*`*/ '\140', '\141', '\142', '\143', '\144', '\145', '\146', '\147', +/*h*/ '\150', '\151', '\152', '\153', '\154', '\155', '\156', '\157', +/*p*/ '\160', '\161', '\162', '\163', '\164', '\165', '\166', '\167', +/*x*/ '\170', '\171', '\172', '\173', '\174', '\175', '\176', '\177' +}; diff --git a/as/z80/asexpr.c b/as/z80/asexpr.c new file mode 100644 index 0000000..6d9211c --- /dev/null +++ b/as/z80/asexpr.c @@ -0,0 +1,674 @@ +/* asexpr.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +#include +#include +#include + +#include "asm.h" + +/*)Module asexpr.c + * + * The module asexpr.c contains the routines to evaluate + * arithmetic/numerical expressions. The functions in + * asexpr.c perform a recursive evaluation of the arithmetic + * expression read from the assembler-source text line. + * The expression may include binary/unary operators, brackets, + * symbols, labels, and constants in hexadecimal, decimal, octal + * and binary. Arithmetic operations are prioritized and + * evaluated by normal arithmetic conventions. + * + * asexpr.c contains the following functions: + * VOID abscheck() + * Addr_T absexpr() + * VOID clrexpr() + * int digit() + * VOID expr() + * int oprio() + * VOID term() + * + * asexpr.c contains no local/static variables + */ + +/*)Function VOID expr(esp, n) + * + * expr * esp pointer to an expr structure + * int n a firewall priority; all top + * level calls (from the user) + * should be made with n set to 0. + * + * The function expr() evaluates an expression and + * stores its value and relocation information into + * the expr structure supplied by the user. + * + * local variables: + * int c current assembler-source + * text character + * int p current operator priority + * area * ap pointer to an area structure + * exp re internal expr structure + * + * global variables: + * char ctype[] array of character types, one per + * ASCII character + * + * functions called: + * VOID abscheck() asexpr.c + * VOID clrexpr() asexpr.c + * VOID expr() asexpr.c + * int getnb() aslex.c + * int oprio() asexpr.c + * VOID qerr() assubr.c + * VOID rerr() assubr.c + * VOID term() asexpr.c + * VOID unget() aslex.c + * + * + * side effects: + * An expression is evaluated modifying the user supplied + * expr structure, a sym structure maybe created for an + * undefined symbol, and the parse of the expression may + * terminate if a 'q' error occurs. + */ + +VOID +expr(esp, n) +register struct expr *esp; +int n; +{ + register int c, p; + struct area *ap; + struct expr re; + + term(esp); + while (ctype[c = getnb()] & BINOP) { + /* + * Handle binary operators + - * / & | % ^ << >> + */ + if ((p = oprio(c)) <= n) + break; + if ((c == '>' || c == '<') && c != get()) + qerr(); + clrexpr(&re); + expr(&re, p); + esp->e_rlcf |= re.e_rlcf; + if (c == '+') { + /* + * esp + re, at least one must be absolute + */ + if (esp->e_base.e_ap == NULL) { + /* + * esp is absolute (constant), + * use area from re + */ + esp->e_base.e_ap = re.e_base.e_ap; + } else + if (re.e_base.e_ap) { + /* + * re should be absolute (constant) + */ + rerr(); + } + if (esp->e_flag && re.e_flag) + rerr(); + if (re.e_flag) + esp->e_flag = 1; + esp->e_addr += re.e_addr; + } else + if (c == '-') { + /* + * esp - re + */ + if ((ap = re.e_base.e_ap) != NULL) { + if (esp->e_base.e_ap == ap) { + esp->e_base.e_ap = NULL; + } else { + rerr(); + } + } + if (re.e_flag) + rerr(); + esp->e_addr -= re.e_addr; + } else { + /* + * Both operands (esp and re) must be constants + */ + abscheck(esp); + abscheck(&re); + switch (c) { + + case '*': + esp->e_addr *= re.e_addr; + break; + + case '/': + esp->e_addr /= re.e_addr; + break; + + case '&': + esp->e_addr &= re.e_addr; + break; + + case '|': + esp->e_addr |= re.e_addr; + break; + + case '%': + esp->e_addr %= re.e_addr; + break; + + case '^': + esp->e_addr ^= re.e_addr; + break; + + case '<': + esp->e_addr <<= re.e_addr; + break; + + case '>': + esp->e_addr >>= re.e_addr; + break; + + default: + qerr(); + break; + } + } + } + unget(c); +} + +/*)Function Addr_T absexpr() + * + * The function absexpr() evaluates an expression, verifies it + * is absolute (i.e. not position dependent or relocatable), and + * returns its value. + * + * local variables: + * expr e expr structure + * + * global variables: + * none + * + * functions called: + * VOID abscheck() asexpr.c + * VOID clrexpr() asexpr.c + * VOID expr() asexpr.c + * + * side effects: + * If the expression is not absolute then + * a 'r' error is reported. + */ + +Addr_T +absexpr() +{ + struct expr e; + + clrexpr(&e); + expr(&e, 0); + abscheck(&e); + return (e.e_addr); +} + +/*)Function VOID term(esp) + * + * expr * esp pointer to an expr structure + * + * The function term() evaluates a single constant + * or symbol value prefaced by any unary operator + * ( +, -, ~, ', ", >, or < ). This routine is also + * responsible for setting the relocation type to symbol + * based (e.flag != 0) on global references. + * + * local variables: + * int c current character + * char id[] symbol name + * char * jp pointer to assembler-source text + * int n constant evaluation running sum + * int r current evaluation radix + * sym * sp pointer to a sym structure + * tsym * tp pointer to a tsym structure + * int v current digit evaluation + * + * global variables: + * char ctype[] array of character types, one per + * ASCII character + * sym * symp pointer to a symbol structure + * + * functions called: + * VOID abscheck() asexpr.c + * int digit() asexpr.c + * VOID err() assubr.c + * VOID expr() asexpr.c + * int is_abs() asexpr.c + * int get() aslex.c + * VOID getid() aslex.c + * int getmap() aslex.c + * int getnb() aslex.c + * sym * lookup() assym.c + * VOID qerr() assubr.c + * VOID unget() aslex.c + * + * side effects: + * An arithmetic term is evaluated, a symbol structure + * may be created, term evaluation may be terminated + * by a 'q' error. + */ + +VOID +term(esp) +register struct expr *esp; +{ + register int c, n; + register const char *jp; + char id[NCPS]; + struct sym *sp; + struct tsym *tp; + int r = 0, v; + + c = getnb(); + /* + * Discard the unary '+' at this point and + * also any reference to numerical arguments + * associated with the '#' prefix. + */ + while (c == '+' || c == '#') { c = getnb(); } + /* + * Evaluate all binary operators + * by recursively calling expr(). + */ + if (c == LFTERM) { + expr(esp, 0); + if (getnb() != RTTERM) + qerr(); + return; + } + if (c == '-') { + expr(esp, 100); + abscheck(esp); + esp->e_addr = 0 - esp->e_addr; + return; + } + if (c == '~') { + expr(esp, 100); + abscheck(esp); + esp->e_addr = ~esp->e_addr; + return; + } + if (c == '\'') { + esp->e_mode = S_USER; + esp->e_addr = getmap(-1)&0377; + return; + } + if (c == '\"') { + esp->e_mode = S_USER; + if (hilo) { + esp->e_addr = (getmap(-1)&0377)<<8; + esp->e_addr |= (getmap(-1)&0377); + } else { + esp->e_addr = (getmap(-1)&0377); + esp->e_addr |= (getmap(-1)&0377)<<8; + } + return; + } + if (c == '>' || c == '<') { + expr(esp, 100); + if (is_abs (esp)) { + /* + * evaluate msb/lsb directly + */ + if (c == '>') + esp->e_addr >>= 8; + esp->e_addr &= 0377; + return; + } else { + /* + * let linker perform msb/lsb, lsb is default + */ + esp->e_rlcf |= R_BYT2; + if (c == '>') + esp->e_rlcf |= R_MSB; + return; + } + } + /* + * Evaluate digit sequences as local symbols + * if followed by a '$' or as constants. + */ + if (ctype[c] & DIGIT) { + esp->e_mode = S_USER; + jp = ip; + while (ctype[(unsigned char)(*jp)] & RAD10) { + jp++; + } + if (*jp == '$') { + n = 0; + while ((v = digit(c, 10)) >= 0) { + n = 10*n + v; + c = get(); + } + tp = symp->s_tsym; + while (tp) { + if (n == tp->t_num) { + esp->e_base.e_ap = tp->t_area; + esp->e_addr = tp->t_addr; + return; + } + tp = tp->t_lnk; + } + err('u'); + return; + } + r = radix; + if (c == '0') { + c = get(); + switch (c) { + case 'b': + case 'B': + r = 2; + c = get(); + break; + case 'o': + case 'O': + case 'q': + case 'Q': + r = 8; + c = get(); + break; + case 'd': + case 'D': + r = 10; + c = get(); + break; + case 'h': + case 'H': + case 'x': + case 'X': + r = 16; + c = get(); + break; + default: + break; + } + } + n = 0; + while ((v = digit(c, r)) >= 0) { + n = r*n + v; + c = get(); + } + unget(c); + esp->e_addr = n; + return; + } + /* + * Evaluate '$' sequences as a temporary radix + * if followed by a '%', '&', '#', or '$'. + */ + if (c == '$') { + c = get(); + if (c == '%' || c == '&' || c == '#' || c == '$') { + switch (c) { + case '%': + r = 2; + break; + case '&': + r = 8; + break; + case '#': + r = 10; + break; + case '$': + r = 16; + break; + default: + break; + } + c = get(); + n = 0; + while ((v = digit(c, r)) >= 0) { + n = r*n + v; + c = get(); + } + unget(c); + esp->e_mode = S_USER; + esp->e_addr = n; + return; + } + unget(c); + c = '$'; + } + /* + * Evaluate symbols and labels + */ + if (ctype[c] & LETTER) { + esp->e_mode = S_USER; + getid(id, c); + sp = lookup(id); + if (sp->s_type == S_NEW) { + if (sp->s_flag&S_GBL) { + esp->e_flag = 1; + esp->e_base.e_sp = sp; + return; + } + err('u'); + } else { + esp->e_mode = sp->s_type; + esp->e_addr = sp->s_addr; + esp->e_base.e_ap = sp->s_area; + } + return; + } + /* + * Else not a term. + */ + qerr(); +} + +/*)Function int digit(c, r) + * + * int c digit character + * int r current radix + * + * The function digit() returns the value of c + * in the current radix r. If the c value is not + * a number of the current radix then a -1 is returned. + * + * local variables: + * none + * + * global variables: + * char ctype[] array of character types, one per + * ASCII character + * + * functions called: + * none + * + * side effects: + * none + */ + +int +digit(c, r) +register int c, r; +{ + if (r == 16) { + if (ctype[c] & RAD16) { + if (c >= 'A' && c <= 'F') + return (c - 'A' + 10); + if (c >= 'a' && c <= 'f') + return (c - 'a' + 10); + return (c - '0'); + } + } else + if (r == 10) { + if (ctype[c] & RAD10) + return (c - '0'); + } else + if (r == 8) { + if (ctype[c] & RAD8) + return (c - '0'); + } else + if (r == 2) { + if (ctype[c] & RAD2) + return (c - '0'); + } + return (-1); +} + +/*)Function VOID abscheck(esp) + * + * expr * esp pointer to an expr structure + * + * The function abscheck() tests the evaluation of an + * expression to verify it is absolute. If the evaluation + * is relocatable then an 'r' error is noted and the expression + * made absolute. + * + * Note: The area type (i.e. ABS) is not checked because + * the linker can be told to explicitly relocate an + * absolute area. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * VOID rerr() assubr.c + * + * side effects: + * The expression may be changed to absolute and the + * 'r' error invoked. + */ + +VOID +abscheck(esp) +register struct expr *esp; +{ + if (esp->e_flag || esp->e_base.e_ap) { + esp->e_flag = 0; + esp->e_base.e_ap = NULL; + rerr(); + } +} + +/*)Function int is_abs(esp) + * + * expr * esp pointer to an expr structure + * + * The function is_abs() tests the evaluation of an + * expression to verify it is absolute. If the evaluation + * is absolute then 1 is returned, else 0 is returned. + * + * Note: The area type (i.e. ABS) is not checked because + * the linker can be told to explicitly relocate an + * absolute area. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ + +int +is_abs (esp) +register struct expr *esp; +{ + if (esp->e_flag || esp->e_base.e_ap) { + return(0); + } + return(1); +} + +/*)Function int oprio(c) + * + * int c operator character + * + * The function oprio() returns a relative priority + * for all valid unary and binary operators. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ + +int +oprio(c) +register int c; +{ + if (c == '*' || c == '/' || c == '%') + return (10); + if (c == '+' || c == '-') + return (7); + if (c == '<' || c == '>') + return (5); + if (c == '^') + return (4); + if (c == '&') + return (3); + if (c == '|') + return (1); + return (0); +} + +/*)Function VOID clrexpr(esp) + * + * expr * esp pointer to expression structure + * + * The function clrexpr() clears the expression structure. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * expression structure cleared. + */ + +VOID +clrexpr(esp) +register struct expr *esp; +{ + esp->e_mode = 0; + esp->e_flag = 0; + esp->e_addr = 0; + esp->e_base.e_ap = NULL; + esp->e_rlcf = 0; +} diff --git a/as/z80/aslist.c b/as/z80/aslist.c new file mode 100644 index 0000000..675ead5 --- /dev/null +++ b/as/z80/aslist.c @@ -0,0 +1,796 @@ +/* aslist.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * Extensions: P. Felber + */ + +#include +#include +#include +#include + + +#include "asm.h" + +/*)Module aslist.c + * + * The module aslist.c contains all the functions used + * to generate the assembler list and symbol output files. + * + * aslist.c contains the following functions: + * VOID list() + * VOID list1() + * VOID list2() + * VOID slew() + * VOID lstsym() + * + * The module aslist.c contains no local/static variables + */ + +/*)Function VOID list() + * + * The function list() generates the listing output + * which includes the input source, line numbers, + * and generated code. Numerical output may be selected + * as hexadecimal, decimal, or octal. + * + * local variables: + * int * wp pointer to the assembled data bytes + * int * wpt pointer to the data byte mode + * int nb computed number of assembled bytes + * + * global variables: + * int cb[] array of assembler output values + * int cbt[] array of assembler relocation types + * describing the data in cb[] + * int * cp pointer to assembler output array cb[] + * int * cpt pointer to assembler relocation type + * output array cbt[] + * char eb[] array of generated error codes + * char * ep pointer into error list + * array eb[] + * char ib[] assembler-source text line + * FILE * lfp list output file handle + * int line current assembler source line number + * int lmode listing mode + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * VOID list1() aslist.c + * int putc() c_library + * VOID slew() asslist.c + * + * side effects: + * Listing or symbol output updated. + */ + +#ifndef MLH_LST +VOID +list() +{ + register char *wp; + register int *wpt; + register int nb; + + if (lfp == NULL || lmode == NLIST) + return; + + /* + * Get Correct Line Number + */ + if (incfil >= 0) { + line = incline[incfil]; + if (line == 0) { + if (incfil > 0) { + line = incline[incfil-1]; + } else { + line = srcline[cfile]; + } + } + } else { + line = srcline[cfile]; + } + + /* + * Move to next line. + */ + slew(lfp, pflag); + + /* + * Output a maximum of NERR error codes with listing. + */ + while (ep < &eb[NERR]) + *ep++ = ' '; + fprintf(lfp, "%.2s", eb); + + /* + * Source listing only option. + */ + if (lmode == SLIST) { + fprintf(lfp, "%24s%5u %s\n", "", line, ib); + return; + } +#ifndef SDK + if (lmode == ALIST) { + outchk(HUGE,HUGE); + } +#endif + + /* + * HEX output Option. + */ + if (xflag == 0) { /* HEX */ + /* + * Equate only + */ + if (lmode == ELIST) { + fprintf(lfp, "%18s%04X", "", laddr); + fprintf(lfp, " %5u %s\n", line, ib); + return; + } + + /* + * Address (with allocation) + */ + fprintf(lfp, " %04X", laddr); + if (lmode == ALIST || lmode == BLIST) { + fprintf(lfp, "%19s%5u %s\n", "", line, ib); +#ifndef SDK + outdot(); +#endif + return; + } + wp = cb; + wpt = cbt; + nb = (int) (cp - cb); + + /* + * First line of output for this source line with data. + */ + list1(wp, wpt, nb, 1); + fprintf(lfp, " %5u %s\n", line, ib); + + /* + * Subsequent lines of output if more data. + */ + while ((nb -= 6) > 0) { + wp += 6; + wpt += 6; + slew(lfp, 0); + fprintf(lfp, "%7s", ""); + list1(wp, wpt, nb, 0); + putc('\n', lfp); + } + } else + /* + * OCTAL output Option. + */ + if (xflag == 1) { /* OCTAL */ + /* + * Equate only + */ + if (lmode == ELIST) { + fprintf(lfp, "%16s%06o", "", laddr); + fprintf(lfp, " %5u %s\n", line, ib); + return; + } + + /* + * Address (with allocation) + */ + fprintf(lfp, " %06o", laddr); + if (lmode == ALIST || lmode == BLIST) { + fprintf(lfp, "%17s%5u %s\n", "", line, ib); +#ifndef SDK + outdot(); +#endif + return; + } + wp = cb; + wpt = cbt; + nb = (int) (cp - cb); + + /* + * First line of output for this source line with data. + */ + list1(wp, wpt, nb, 1); + fprintf(lfp, " %5u %s\n", line, ib); + + /* + * Subsequent lines of output if more data. + */ + while ((nb -= 4) > 0) { + wp += 4; + wpt += 4; + slew(lfp, 0); + fprintf(lfp, "%9s", ""); + list1(wp, wpt, nb, 0); + putc('\n', lfp); + } + } else + /* + * DECIMAL output Option. + */ + if (xflag == 2) { /* DECIMAL */ + /* + * Equate only + */ + if (lmode == ELIST) { + fprintf(lfp, "%16s%05u", "", laddr); + fprintf(lfp, " %5u %s\n", line, ib); + return; + } + + /* + * Address (with allocation) + */ + fprintf(lfp, " %05u", laddr); + if (lmode == ALIST || lmode == BLIST) { + fprintf(lfp, "%17s%5u %s\n", "", line, ib); +#ifndef SDK + outdot(); +#endif + return; + } + wp = cb; + wpt = cbt; + nb = (int) (cp - cb); + + /* + * First line of output for this source line with data. + */ + list1(wp, wpt, nb, 1); + fprintf(lfp, " %5u %s\n", line, ib); + + /* + * Subsequent lines of output if more data. + */ + while ((nb -= 4) > 0) { + wp += 4; + wpt += 4; + slew(lfp, 0); + fprintf(lfp, "%9s", ""); + list1(wp, wpt, nb, 0); + putc('\n', lfp); + } + } +} +#else +VOID +list() +{ + register char *wp; + register int *wpt; + register nb; + + if (lfp == NULL || lmode == NLIST) + return; + + /* + * Get Correct Line Number + */ + if (incfil >= 0) { + line = incline[incfil]; + if (line == 0) { + if (incfil > 0) { + line = incline[incfil-1]; + } else { + line = srcline[cfile]; + } + } + } else { + line = srcline[cfile]; + } + + /* + * HEX output Option. + */ + /* Output filename relative_address line_number */ + + if (incfil >= 0) { + fprintf(lfp, "%s ", incfn[incfil]); + } + else { + fprintf(lfp, "%s ", srcfn[cfile]); + } + fprintf(lfp, "%u %04X\n", line, laddr); +#if 0 + wp = cb; + wpt = cbt; + nb = (int) (cp - cb); + + /* + * First line of output for this source line with data. + */ + list1(wp, wpt, nb, 1); + fprintf(lfp, " %5u %s\n", line, ib); + + /* + * Subsequent lines of output if more data. + */ + while ((nb -= 6) > 0) { + wp += 6; + wpt += 6; + slew(lfp, 0); + fprintf(lfp, "%7s", ""); + list1(wp, wpt, nb, 0); + putc('\n', lfp); + } +#endif +} +#endif /* MLH_LST */ + +/*)Function VOID list1(wp, wpt, nw, f) + * + * int f fill blank fields (1) + * int nb number of data bytes + * int * wp pointer to data bytes + * int * wpt pointer to data byte mode + * + * local variables: + * int i loop counter + * + * global variables: + * int xflag -x, listing radix flag + * + * functions called: + * VOID list2() asslist.c + * int fprintf() c_library + * + * side effects: + * Data formatted and output to listing. + */ + +VOID +list1(wp, wpt, nb, f) +register char *wp; +register int *wpt, nb, f; +{ + register int i; + + /* + * HEX output Option. + */ + if (xflag == 0) { /* HEX */ + /* + * Bound number of words to HEX maximum per line. + */ + if (nb > 6) + nb = 6; + + /* + * Output bytes. + */ + for (i=0; i 4) + nb = 4; + + /* + * Output bytes. + */ + for (i=0; i 4) + nb = 4; + + /* + * Output bytes. + */ + for (i=0; i= 2) { + if (t & R_RELOC) { + if (t & (R_PAG0|R_PAG)) { + c = '*'; + } else if (t & R_USGN) { + c = 'u'; + } else if (t & R_PCR) { + c = 'p'; + } else { + c = 'r'; + } + if (t & R_HIGH) c += 1; + } + } + + /* + * Output the selected mode. + */ + putc(c, lfp); +} + +/*)Function VOID slew(fp, flag) + * + * FILE * fp file handle for listing + * int flag enable pagination + * + * The function slew() increments the page line count. + * If the page overflows and pagination is enabled: + * 1) put out a page skip, + * 2) a title, + * 3) a subtitle, + * 4) and reset the line count. + * + * local variables: + * none + * + * global variables: + * char cpu[] cpu type string + * int lop current line number on page + * int page current page number + * char stb[] Subtitle string buffer + * char tb[] Title string buffer + * + * functions called: + * int fprintf() c_library + * + * side effects: + * Increments page line counter, on overflow + * a new page header is output to the listing file. + */ + +VOID +slew(fp,flag) +FILE *fp; +int flag; +{ + if ((lop++ >= NLPP) && flag) { + fprintf(fp, "\fASxxxx Assembler %s (%s), page %u.\n", + VERSION, cpu, ++page); + fprintf(fp, "%s\n", tb); + fprintf(fp, "%s\n\n", stb); + lop = 5; + } +} + +/*)Function VOID lstsym(fp) + * + * FILE * fp file handle for output + * + * The function lstsym() outputs alphabetically + * sorted symbol and area tables. + * + * local variables: + * int c temporary + * int i loop counter + * int j temporary + * int k temporary + * int nmsym number of symbols + * int narea number of areas + * sym * sp pointer to symbol structure + * sym ** p pointer to an array of + * pointers to symbol structures + * area * ap pointer to an area structure + * + * global variables: + * area * areap pointer to an area structure + * char aretbl[] string "Area Table" + * sym dot defined as sym[0] + * char stb[] Subtitle string buffer + * sym * symhash[] array of pointers to NHASH + * linked symbol lists + * char symtbl[] string "Symbol Table" + * FILE * tfp symbol table output file handle + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * int putc() c_library + * VOID slew() aslist.c + * int strcmp() c_library + * char * strcpy() c_library + * + * side effects: + * Symbol and area tables output. + */ + +VOID +lstsym(FILE *fp) +{ + register int c, i, j, k; + int nmsym, narea; + struct sym *sp; + struct sym **p; + struct area *ap; + + /* + * Symbol Table Header + */ + strcpy(stb, &symtbl[0]); + lop = NLPP; + if (fp == tfp) + page = 0; + slew(fp, 1); + + /* + * Find number of symbols + */ + nmsym = 0; + for (i=0; is_sp; + } + } + if (nmsym == 0) + goto atable; + + /* + * Allocate space for an array of pointers to symbols + * and load array. + */ + if ((p = (struct sym **) malloc(sizeof((struct sym *) sp)*nmsym)) + == NULL) { + fprintf(fp, "Insufficient space to build Symbol Table.\n"); + return; + } + nmsym = 0; + for (i=0; is_sp; + } + } + + /* + * Bubble Sort on Symbol Table Array + */ + j = 1; + c = nmsym - 1; + while (j) { + j = 0; + for (i=0; is_id[0],&p[i+1]->s_id[0]) > 0) { + j = 1; + sp = p[i+1]; + p[i+1] = p[i]; + p[i] = sp; + } + } + } + + /* + * Symbol Table Output + */ + for (i=0; is_area) { + j = sp->s_area->a_ref; + if (xflag == 0) { + fprintf(fp, " %2X ", j); + } else + if (xflag == 1) { + fprintf(fp, "%3o ", j); + } else + if (xflag == 2) { + fprintf(fp, "%3u ", j); + } + } else { + fprintf(fp, " "); + } + fprintf(fp, "%-60s", sp->s_id); + if (sp->s_flag & S_ASG) { + putc('=', fp); + } else { + putc(' ', fp); + } + if (sp->s_type == S_NEW) { + if (xflag == 0) { + fprintf(fp, " **** "); + } else + if (xflag == 1) { + fprintf(fp, "****** "); + } else + if (xflag == 2) { + fprintf(fp, " ***** "); + } + } else { + j = sp->s_addr; + if (xflag == 0) { + fprintf(fp, " %04X ", j); + } else + if (xflag == 1) { + fprintf(fp, "%06o ", j); + } else + if (xflag == 2) { + fprintf(fp, " %05u ", j); + } + } + j = 0; + if (sp->s_flag & S_GBL) { + putc('G', fp); + ++j; + } + if (sp->s_area != NULL) { + putc('R', fp); + ++j; + } + if (sp->s_type == S_NEW) { + putc('X', fp); + ++j; + } +#if NCPS-8 + putc('\n', fp); + slew(fp, 0); + ++i; +#else + if (++i % 3 == 0) { + putc('\n', fp); + slew(fp, pflag); + } else + if (i < nmsym) { + while (j++ < 4) + putc(' ', fp); + fprintf(fp, "| "); + } +#endif + } + putc('\n', fp); + + /* + * Area Table Header + */ + +atable: + strcpy(stb, &aretbl[0]); + lop = NLPP; + slew(fp, 1); + + /* + * Area Table Output + */ + narea = 0; + ap = areap; + while (ap) { + ++narea; + ap = ap->a_ap; + } + for (i=0; ia_ap; + j = ap->a_ref; + if (xflag == 0) { + fprintf(fp, " %2X ", j); + } else + if (xflag == 1) { + fprintf(fp, " %3o ", j); + } else + if (xflag == 2) { + fprintf(fp, " %3u ", j); + } + fprintf(fp, "%-60s", ap->a_id); + j = ap->a_size; + k = ap->a_flag; + if (xflag==0) { + fprintf(fp, " size %4X flags %X\n", j, k); + } else + if (xflag==1) { + fprintf(fp, " size %6o flags %o\n", j, k); + } else + if (xflag==2) { + fprintf(fp, " size %5u flags %u\n", j, k); + } + } +} diff --git a/as/z80/asm.h b/as/z80/asm.h new file mode 100644 index 0000000..0f5f0af --- /dev/null +++ b/as/z80/asm.h @@ -0,0 +1,654 @@ +/* asm.h + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 10-Nov-07 borutr: + * - add proto for strsto + * - change s_id from [NCPS] to pointer + * - change m_id from [NCPS] to pointer + * - change a_id from [NCPS] to pointer + * - change NCPS to 80 + * - case sensitive + * - always define "ccase" + */ + +/* + * Extensions: P. Felber + */ + +#define VERSION "V01.75 + SDCC mods" + +/* + * Case Sensitivity Flag + */ +#define CASE_SENSITIVE 1 + +/*)Module asm.h + * + * The module asm.h contains the definitions for constants, + * structures, global variables, and ASxxxx functions + * contained in the ASxxxx.c files. The two functions + * and three global variables from the machine dependent + * files are also defined. + */ + +/* + * compiler/operating system specific definitions + */ + +/* DECUS C void definition */ +/* File/extension seperator */ + +#ifdef decus +#define VOID char +#define FSEPX '.' +#endif + +/* PDOS C void definition */ +/* File/extension seperator */ + +#ifdef PDOS +#define VOID char +#define FSEPX ':' +#endif + +/* Default void definition */ +/* File/extension seperator */ + +#ifndef VOID +#define VOID void +#define FSEPX '.' +#define OTHERSYSTEM +#endif + +/* + * PATH_MAX + */ +#include +#ifndef PATH_MAX /* POSIX, but not required */ +#if defined(_MSC_VER) || defined(__BORLANDC__) /* Microsoft C or Borland C*/ +#include +#define PATH_MAX _MAX_PATH +#else +#define PATH_MAX /* define a reasonable value */ +#endif +#endif + +#ifdef _WIN32 /* WIN32 native */ + +# define NATIVE_WIN32 1 +# ifdef __MINGW32__ /* GCC MINGW32 depends on configure */ +# include "../../sdccconf.h" +# else +# include "../../sdcc_vc.h" +# define PATH_MAX _MAX_PATH +# endif + +#else /* Assume Un*x style system */ +# include "../../sdccconf.h" +#endif + +/* + * Assembler definitions. + */ +#define LFTERM '(' /* Left expression delimeter */ +#define RTTERM ')' /* Right expression delimeter */ + +#ifdef SDK +#define NCPS 80 /* characters per symbol */ +#else /* SDK */ +#define NCPS 8 /* Chars. per symbol */ +#endif /* SDK */ +/* #define NCPS 32 */ /* Chars. per symbol */ +#define HUGE 1000 /* A huge number */ +#define NERR 3 /* Errors per line */ +#define NINPUT 1024 /* Input buffer size */ +#define NCODE 128 /* Listing code buffer size */ +#define NTITL 64 /* Title buffer size */ +#define NSBTL 64 /* SubTitle buffer size */ +#define NHASH 64 /* Buckets in hash table */ +#define HMASK 077 /* Hash mask */ +#define NLPP 60 /* Lines per page */ +#define MAXFIL 6 /* Maximum command line input files */ +#define MAXINC 6 /* Maximum nesting of include files */ +#define MAXIF 10 /* Maximum nesting of if/else/endif */ +#define FILSPC 256 /* Chars. in filespec */ + +#define NLIST 0 /* No listing */ +#define SLIST 1 /* Source only */ +#define ALIST 2 /* Address only */ +#define BLIST 3 /* Address only with allocation */ +#define CLIST 4 /* Code */ +#define ELIST 5 /* Equate only */ + +#define dot sym[0] /* Dot, current loc */ +#define dca area[0] /* Dca, default code area */ + + +typedef unsigned int Addr_T; + +/* + * The area structure contains the parameter values for a + * specific program or data section. The area structure + * is a linked list of areas. The initial default area + * is "_CODE" defined in asdata.c, the next area structure + * will be linked to this structure through the structure + * element 'struct area *a_ap'. The structure contains the + * area name, area reference number ("_CODE" is 0) determined + * by the order of .area directives, area size determined + * from the total code and/or data in an area, area fuzz is + * a variable used to track pass to pass changes in the + * area size caused by variable length instruction formats, + * and area flags which specify the area's relocation type. + */ +struct area +{ + struct area *a_ap; /* Area link */ + char *a_id; /* Area Name */ + int a_ref; /* Ref. number */ + Addr_T a_size; /* Area size */ + Addr_T a_fuzz; /* Area fuzz */ + int a_flag; /* Area flags */ +}; + +/* + * The "A_" area constants define values used in + * generating the assembler area output data. + * + * Area flags + * + * 7 6 5 4 3 2 1 0 + * +-----+-----+-----+-----+-----+-----+-----+-----+ + * | | | | PAG | ABS | OVR | | | + * +-----+-----+-----+-----+-----+-----+-----+-----+ + */ + +#define A_CON 000 /* Concatenating */ +#define A_OVR 004 /* Overlaying */ +#define A_REL 000 /* Relocatable */ +#define A_ABS 010 /* absolute */ +#define A_NOPAG 000 /* Non-Paged */ +#define A_PAG 020 /* Paged */ + +/* + * The "R_" relocation constants define values used in + * generating the assembler relocation output data for + * areas, symbols, and code. + * + * Relocation flags + * + * 7 6 5 4 3 2 1 0 + * +-----+-----+-----+-----+-----+-----+-----+-----+ + * | MSB | PAGn| PAG0| USGN| BYT2| PCR | SYM | BYT | + * +-----+-----+-----+-----+-----+-----+-----+-----+ + */ + +#define R_WORD 0000 /* 16 bit */ +#define R_BYTE 0001 /* 8 bit */ + +#define R_AREA 0000 /* Base type */ +#define R_SYM 0002 + +#define R_NORM 0000 /* PC adjust */ +#define R_PCR 0004 + +#define R_BYT1 0000 /* Byte count for R_BYTE = 1 */ +#define R_BYT2 0010 /* Byte count for R_BYTE = 2 */ + +#define R_SGND 0000 /* Signed Byte */ +#define R_USGN 0020 /* Unsigned Byte */ + +#define R_NOPAG 0000 /* Page Mode */ +#define R_PAG0 0040 /* Page '0' */ +#define R_PAG 0100 /* Page 'nnn' */ + +#define R_LSB 0000 /* low byte */ +#define R_MSB 0200 /* high byte */ + +/* + * Listing Control Flags + */ + +#define R_HIGH 0040000 /* High Byte */ +#define R_RELOC 0100000 /* Relocation */ + +#define R_DEF 00 /* Global def. */ +#define R_REF 01 /* Global ref. */ +#define R_REL 00 /* Relocatable */ +#define R_ABS 02 /* Absolute */ +#define R_GBL 00 /* Global */ +#define R_LCL 04 /* Local */ + +/* + * The mne structure is a linked list of the assembler + * mnemonics and directives. The list of mnemonics and + * directives contained in the device dependent file + * xxxpst.c are hashed and linked into NHASH lists in + * module assym.c by syminit(). The structure contains + * the mnemonic/directive name, a subtype which directs + * the evaluation of this mnemonic/directive, a flag which + * is used to detect the end of the mnemonic/directive + * list in xxxpst.c, and a value which is normally + * associated with the assembler mnemonic base instruction + * value. + */ +struct mne +{ + struct mne *m_mp; /* Hash link */ + char *m_id; /* Mnemonic */ + char m_type; /* Mnemonic subtype */ + char m_flag; /* Mnemonic flags */ + Addr_T m_valu; /* Value */ +}; + +/* + * The sym structure is a linked list of symbols defined + * in the assembler source files. The first symbol is "." + * defined in asdata.c. The entry 'struct tsym *s_tsym' + * links any temporary symbols following this symbol and + * preceeding the next normal symbol. The structure also + * contains the symbol's name, type (USER or NEW), flag + * (global, assigned, and multiply defined), a pointer + * to the area structure defining where the symbol is + * located, a reference number assigned by outgsd() in + * asout.c, and the symbols address relative to the base + * address of the area where the symbol is located. + */ +struct sym +{ + struct sym *s_sp; /* Hash link */ + struct tsym *s_tsym; /* Temporary symbol link */ + char *s_id; /* Symbol */ + char s_type; /* Symbol subtype */ + char s_flag; /* Symbol flags */ + struct area *s_area; /* Area line, 0 if absolute */ + int s_ref; /* Ref. number */ + Addr_T s_addr; /* Address */ +}; + +#define S_GBL 01 /* Global */ +#define S_ASG 02 /* Assigned */ +#define S_MDF 04 /* Mult. def */ +#define S_END 010 /* End mark for pst. */ + +#define S_NEW 0 /* New name */ +#define S_USER 1 /* User name */ + /* unused slot */ + /* unused slot */ + /* unused slot */ + +#define S_BYTE 5 /* .byte */ +#define S_WORD 6 /* .word */ +#define S_ASCII 7 /* .ascii */ +#define S_ASCIZ 8 /* .asciz */ +#define S_BLK 9 /* .blkb or .blkw */ +#define S_INCL 10 /* .include */ +#define S_DAREA 11 /* .area */ +#define S_ATYP 12 /* .area type */ +#define S_AREA 13 /* .area name */ +#define S_GLOBL 14 /* .globl */ +#define S_PAGE 15 /* .page */ +#define S_TITLE 16 /* .title */ +#define S_SBTL 17 /* .sbttl */ +#define S_IF 18 /* .if */ +#define S_ELSE 19 /* .else */ +#define S_ENDIF 20 /* .endif */ +#define S_EVEN 21 /* .even */ +#define S_ODD 22 /* .odd */ +#define S_RADIX 23 /* .radix */ +#define S_ORG 24 /* .org */ +#define S_MODUL 25 /* .module */ +#define S_ASCIS 26 /* .ascis */ +#ifdef SDK +# define S_FLOAT 27 /* .df */ +#endif +#define S_OPTSDCC 28 /* .optsdcc */ + +/* + * The tsym structure is a linked list of temporary + * symbols defined in the assembler source files following + * a normal symbol. The structure contains the temporary + * symbols number, a flag (multiply defined), a pointer to the + * area structure defining where the temporary structure + * is located, and the temporary symbol's address relative + * to the base address of the area where the symbol + * is located. + */ +struct tsym +{ + struct tsym *t_lnk; /* Link to next */ + int t_num; /* 0-lots$ */ + char t_flg; /* flags */ + struct area *t_area; /* Area */ + Addr_T t_addr; /* Address */ +}; + +/* + * External Definitions for all Global Variables + */ + +extern int aserr; /* ASxxxx error counter + */ +extern jmp_buf jump_env; /* compiler dependent structure + * used by setjmp() and longjmp() + */ +extern int inpfil; /* count of assembler + * input files specified + */ +extern int incfil; /* current file handle index + * for include files + */ +extern int cfile; /* current file handle index + * of input assembly files + */ +extern int flevel; /* IF-ELSE-ENDIF flag will be non + * zero for false conditional case + */ +extern int tlevel; /* current conditional level + */ +extern int ifcnd[MAXIF+1]; /* array of IF statement condition + * values (0 = FALSE) indexed by tlevel + */ +extern int iflvl[MAXIF+1]; /* array of IF-ELSE-ENDIF flevel + * values indexed by tlevel + */ +extern char + afn[FILSPC]; /* afile() temporary filespec + */ +extern char + srcfn[MAXFIL][FILSPC]; /* array of source file names + */ +extern int + srcline[MAXFIL]; /* current source file line + */ +extern char + incfn[MAXINC][FILSPC]; /* array of include file names + */ +extern int + incline[MAXINC]; /* current include file line + */ +extern int radix; /* current number conversion radix: + * 2 (binary), 8 (octal), 10 (decimal), + * 16 (hexadecimal) + */ +extern int line; /* current assembler source + * line number + */ +extern int page; /* current page number + */ +extern int lop; /* current line number on page + */ +extern int pass; /* assembler pass number + */ +extern int lflag; /* -l, generate listing flag + */ +extern int cflag; /* -c, generate sdcdb debug information + */ +extern int gflag; /* -g, make undefined symbols global flag + */ +extern int aflag; /* -a, make all symbols global flag + */ +extern int jflag; /* -j, generate debug information flag + */ +extern int oflag; /* -o, generate relocatable output flag + */ +extern int sflag; /* -s, generate symbol table flag + */ +extern int pflag; /* -p, enable listing pagination + */ +extern int xflag; /* -x, listing radix flag + */ +extern int fflag; /* -f(f), relocations flagged flag + */ +extern Addr_T laddr; /* address of current assembler line + * or value of .if argument + */ +extern Addr_T fuzz; /* tracks pass to pass changes in the + * address of symbols caused by + * variable length instruction formats + */ +extern int lmode; /* listing mode + */ +extern struct area area[]; /* array of 1 area + */ +extern struct area *areap; /* pointer to an area structure + */ +extern struct sym sym[]; /* array of 1 symbol + */ +extern struct sym *symp; /* pointer to a symbol structure + */ +extern struct sym *symhash[NHASH]; /* array of pointers to NHASH + * linked symbol lists + */ +extern struct mne *mnehash[NHASH]; /* array of pointers to NHASH + * linked mnemonic/directive lists + */ +extern char *ep; /* pointer into error list + * array eb[NERR] + */ +extern char eb[NERR]; /* array of generated error codes + */ +extern const char *ip; /* pointer into the assembler-source + * text line in ib[] + */ +extern const char *ib; /* assembler-source text line + */ +extern char *cp; /* pointer to assembler output + * array cb[] + */ +extern char cb[NCODE]; /* array of assembler output values + */ +extern int *cpt; /* pointer to assembler relocation type + * output array cbt[] + */ +extern int cbt[NCODE]; /* array of assembler relocation types + * describing the data in cb[] + */ +extern char tb[NTITL]; /* Title string buffer + */ +extern char stb[NSBTL]; /* Subtitle string buffer + */ +extern char optsdcc[NINPUT]; /* sdcc compile options + */ +extern char symtbl[]; /* string "Symbol Table" + */ +extern char aretbl[]; /* string "Area Table" + */ +extern char module[NCPS]; /* module name string + */ +extern FILE *lfp; /* list output file handle + */ +extern FILE *ofp; /* relocation output file handle + */ +extern FILE *tfp; /* symbol table output file handle + */ +extern FILE *sfp[MAXFIL]; /* array of assembler-source file handles + */ +extern FILE *ifp[MAXINC]; /* array of include-file file handles + */ +extern unsigned char ctype[128]; /* array of character types, one per + * ASCII character + */ +extern char ccase[128]; /* an array of characters which + * perform the case translation function + */ + +/* + * Definitions for Character Types + */ +#define SPACE 0000 +#define ETC 0000 +#define LETTER 0001 +#define DIGIT 0002 +#define BINOP 0004 +#define RAD2 0010 +#define RAD8 0020 +#define RAD10 0040 +#define RAD16 0100 +#define ILL 0200 + +#define DGT2 DIGIT|RAD16|RAD10|RAD8|RAD2 +#define DGT8 DIGIT|RAD16|RAD10|RAD8 +#define DGT10 DIGIT|RAD16|RAD10 +#define LTR16 LETTER|RAD16 + +/* + * The exp structure is used to return the evaluation + * of an expression. The structure supports three valid + * cases: + * (1) The expression evaluates to a constant, + * mode = S_USER, flag = 0, addr contains the + * constant, and base = NULL. + * (2) The expression evaluates to a defined symbol + * plus or minus a constant, mode = S_USER, + * flag = 0, addr contains the constant, and + * base = pointer to area symbol. + * (3) The expression evaluates to a external + * global symbol plus or minus a constant, + * mode = S_NEW, flag = 1, addr contains the + * constant, and base = pointer to symbol. + */ +struct expr +{ + char e_mode; /* Address mode */ + char e_flag; /* Symbol flag */ + Addr_T e_addr; /* Address */ + union { + struct area *e_ap; + struct sym *e_sp; + } e_base; /* Rel. base */ + char e_rlcf; /* Rel. flags */ +}; + +/* C Library functions */ +/* for reference only +extern VOID exit(); +extern int fclose(); +extern char * fgets(); +extern FILE * fopen(); +extern int fprintf(); +extern VOID longjmp(); +extern VOID * malloc(); +extern int printf(); +extern char putc(); +extern int rewind(); +extern int setjmp(); +extern int strcmp(); +extern char * strcpy(); +extern int strlen(); +extern char * strncpy(); +*/ + +/* Machine independent functions */ + +/* asmain.c */ +extern FILE * afile(); +extern VOID asexit(); +extern VOID asmbl(); +extern int main(); +extern VOID newdot(); +extern VOID phase(); +extern VOID usage(); + +/* aslex.c */ +extern char endline(); +extern char get(); +extern VOID getid(); +extern int as_getline(); +extern int getmap(); +extern char getnb(); +extern VOID getst(); +extern int more(); +extern VOID unget(); + +/* assym.c */ +extern struct area * alookup(); +extern struct mne * mlookup(); +extern int hash(); +extern struct sym * lookup(); +extern VOID * new(); +extern char * strsto(char *str); +extern int symeq(); +extern VOID syminit(); +extern VOID symglob(); +extern VOID allglob(); + +/* assubr.c */ +extern VOID aerr(); +extern VOID diag(); +extern VOID err(); +extern char * geterr(); +extern VOID qerr(); +extern VOID rerr(); + +/* asexpr.c */ +extern VOID abscheck(); +extern Addr_T absexpr(); +extern VOID clrexpr(); +extern int digit(); +extern int is_abs(); +extern VOID expr(); +extern int oprio(); +extern VOID term(); + +/* aslist.c */ +extern VOID list(); +extern VOID list1(); +extern VOID list2(); +extern VOID lstsym(); +extern VOID slew(); + +/* asout.c */ +extern int hibyte(); +extern int lobyte(); +extern VOID out(); +extern VOID outab(); +extern VOID outarea(); +extern VOID outaw(); +extern VOID outall(); +extern VOID outdot(); +extern VOID outbuf(); +extern VOID outchk(); +extern VOID outgsd(); +extern VOID outrb(); +extern VOID outrw(); +extern VOID outsym(); +extern VOID out_lb(); +extern VOID out_lw(); +extern VOID out_rw(); +extern VOID out_tw(); + +/* asnoice.c */ +extern void DefineNoICE_Line(); +extern void DefineCDB_Line(); + + +/* Machine dependent variables */ + +extern char * cpu; +extern char * dsft; +extern int hilo; +extern struct mne mne[]; + +/* Machine dependent functions */ + +extern VOID minit(); + +/* strcmpi.c */ +extern int as_strcmpi(const char *s1, const char *s2); +extern int as_strncmpi(const char *s1, const char *s2, size_t n); diff --git a/as/z80/asmain.c b/as/z80/asmain.c new file mode 100644 index 0000000..b072acc --- /dev/null +++ b/as/z80/asmain.c @@ -0,0 +1,1251 @@ +/* asmain.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * Extensions: P. Felber + * 13-Feb-08 AD -j and -c as in 8051 as + */ + +#include +#include +#include + +#ifdef SDK +#include +#include +#undef HUGE +#endif +#include "asm.h" +#include "z80.h" + +/*)Module asmain.c + * + * The module asmain.c includes the command argument parser, + * the three pass sequencer, and the machine independent + * assembler parsing code. + * + * asmain.c contains the following functions: + * VOID main(argc, argv) + * VOID asexit() + * VOID asmbl() + * FILE * afile(fn, ft, wf) + * VOID newdot(nap) + * VOID phase(ap, a) + * VOID usage() + * + * asmain.c contains the array char *usetxt[] which + * references the usage text strings printed by usage(). + */ + +/*)Function VOID main(argc, argv) + * + * int argc argument count + * char * argv array of pointers to argument strings + * + * The function main() is the entry point to the assembler. + * The purpose of main() is to (1) parse the command line + * arguments for options and source file specifications and + * (2) to process the source files through the 3 pass assembler. + * Before each assembler pass various variables are initialized + * and source files are rewound to their beginning. During each + * assembler pass each assembler-source text line is processed. + * After each assembler pass the assembler information is flushed + * to any opened output files and the if-else-endif processing + * is checked for proper termination. + * + * The function main() is also responsible for opening all + * output files (REL, LST, and SYM), sequencing the global (-g) + * and all-global (-a) variable definitions, and dumping the + * REL file header information. + * + * local variables: + * char * p pointer to argument string + * int c character from argument string + * int i argument loop counter + * area * ap pointer to area structure + * + * global variables: + * int aflag -a, make all symbols global flag + * char afn[] afile() constructed filespec + * area * areap pointer to an area structure + * int cb[] array of assembler output values + * int cbt[] array of assembler relocation types + * describing the data in cb[] + * int cfile current file handle index + * of input assembly files + * int * cp pointer to assembler output array cb[] + * int * cpt pointer to assembler relocation type + * output array cbt[] + * char eb[] array of generated error codes + * char * ep pointer into error list array eb[] + * int fflag -f(f), relocations flagged flag + * int flevel IF-ELSE-ENDIF flag will be non + * zero for false conditional case + * Addr_T fuzz tracks pass to pass changes in the + * address of symbols caused by + * variable length instruction formats + * int gflag -g, make undefined symbols global flag + * char ib[] assembler-source text line + * int inpfil count of assembler + * input files specified + * int ifcnd[] array of IF statement condition + * values (0 = FALSE) indexed by tlevel + * int iflvl[] array of IF-ELSE-ENDIF flevel + * values indexed by tlevel + * int incfil current file handle index + * for include files + * char * ip pointer into the assembler-source + * text line in ib[] + * jmp_buf jump_env compiler dependent structure + * used by setjmp() and longjmp() + * int lflag -l, generate listing flag + * int line current assembler source + * line number + * int lop current line number on page + * int oflag -o, generate relocatable output flag + * int jflag -j, generate debug info flag + * int page current page number + * int pflag enable listing pagination + * int pass assembler pass number + * int radix current number conversion radix: + * 2 (binary), 8 (octal), 10 (decimal), + * 16 (hexadecimal) + * int sflag -s, generate symbol table flag + * char srcfn[][] array of source file names + * int srcline[] current source file line + * char stb[] Subtitle string buffer + * sym * symp pointer to a symbol structure + * int tlevel current conditional level + * int xflag -x, listing radix flag + * FILE * lfp list output file handle + * FILE * ofp relocation output file handle + * FILE * tfp symbol table output file handle + * FILE * sfp[] array of assembler-source file handles + * + * called functions: + * FILE * afile() asmain.c + * VOID allglob() assym.c + * VOID asexit() asmain.c + * VOID diag() assubr.c + * VOID err() assubr.c + * int fprintf() c-library + * int as_getline() aslex.c + * VOID list() aslist.c + * VOID lstsym() aslist.c + * VOID minit() ___mch.c + * VOID newdot() asmain.c + * VOID outchk() asout.c + * VOID outgsd() asout.c + * int rewind() c-library + * int setjmp() c-library + * VOID symglob() assym.c + * VOID syminit() assym.c + * VOID usage() asmain.c + * + * side effects: + * Completion of main() completes the assembly process. + * REL, LST, and/or SYM files may be generated. + */ + +int +main(int argc, char **argv) +{ + register char *p; + register int c, i; + struct area *ap; + + /* Check to make sure there are the right number of filenames */ + /* before openning any of them */ +#ifdef SDK + inpfil = -2; +#else /* SDK */ + inpfil = -1; +#endif /* SDK */ + for (i=1; i= 0) + usage(); + ++p; + while ((c = *p++) != 0) + switch(c) { + + case 'a': + case 'A': + ++aflag; + break; + + case 'c': + case 'C': + ++cflag; + break; + + case 'g': + case 'G': + ++gflag; + break; + + case 'j': /* JLH: debug info */ + case 'J': + ++jflag; + ++oflag; /* force object */ + break; + + case 'l': + case 'L': + ++lflag; + break; + + case 'o': + case 'O': + ++oflag; + break; + + case 's': + case 'S': + ++sflag; + break; + + case 'p': + case 'P': + pflag = 0; + break; + + case 'x': + case 'X': + xflag = 0; + break; + + case 'q': + case 'Q': + xflag = 1; + break; + + case 'd': + case 'D': + xflag = 2; + break; + + case 'f': + case 'F': + ++fflag; + break; + + default: + usage(); + } + } else { +#ifdef SDK + if(inpfil != -2) { +#endif /* SDK */ + if (++inpfil == MAXFIL) { + fprintf(stderr, "too many input files\n"); + asexit(1); + } + sfp[inpfil] = afile(p, "", 0); + strcpy(srcfn[inpfil],afn); +#ifdef SDK + } else + inpfil++; + if (inpfil == -1) { + if (lflag) + lfp = afile(p, "lst", 1); + if (oflag) + ofp = afile(p, "", 1); + if (sflag) + tfp = afile(p, "sym", 1); + } +#else /* SDK */ + if (inpfil == 0) { + if (lflag) + lfp = afile(p, "LST", 1); + if (oflag) + ofp = afile(p, "REL", 1); + if (sflag) + tfp = afile(p, "SYM", 1); + } +#endif /* SDK */ + } + } + if (inpfil < 0) + usage(); + syminit(); + for (pass=0; pass<3; ++pass) { + if (gflag && pass == 1) + symglob(); + if (aflag && pass == 1) + allglob(); + if (oflag && pass == 2) + outgsd(); + flevel = 0; + tlevel = 0; + ifcnd[0] = 0; + iflvl[0] = 0; + radix = 10; + srcline[0] = 0; + page = 0; + stb[0] = 0; + lop = NLPP; + cfile = 0; + incfil = -1; + for (i = 0; i <= inpfil; i++) + rewind(sfp[i]); + ap = areap; + while (ap) { + ap->a_fuzz = 0; + ap->a_size = 0; + ap = ap->a_ap; + } + fuzz = 0; + dot.s_addr = 0; + dot.s_area = &dca; + symp = ˙ + minit(); + while (as_getline()) { + cp = cb; + cpt = cbt; + ep = eb; + ip = ib; + if (setjmp(jump_env) == 0) + asmbl(); + if (pass == 2) { + diag(); + list(); + } + } + newdot(dot.s_area); /* Flush area info */ + if (flevel || tlevel) + err('i'); + } + if (oflag) + outchk(HUGE, HUGE); /* Flush */ + if (sflag) { + lstsym(tfp); + } else + if (lflag) { + lstsym(lfp); + } + asexit(aserr != 0); + /* Never reached */ + return 0; +} + +/*)Function VOID asexit(i) + * + * int i exit code + * + * The function asexit() explicitly closes all open + * files and then terminates the program. + * + * local variables: + * int j loop counter + * + * global variables: + * FILE * ifp[] array of include-file file handles + * FILE * lfp list output file handle + * FILE * ofp relocation output file handle + * FILE * tfp symbol table output file handle + * FILE * sfp[] array of assembler-source file handles + * + * functions called: + * int fclose() c-library + * VOID exit() c-library + * + * side effects: + * All files closed. Program terminates. + */ + +VOID +asexit(int i) +{ + int j; + + if (lfp != NULL) fclose(lfp); + if (ofp != NULL) fclose(ofp); + if (tfp != NULL) fclose(tfp); + + for (j=0; j= 0) { + n = 10*n + d; + c = get(); + } + if (c != '$' || get() != ':') + qerr(); + tp = symp->s_tsym; + if (pass == 0) { + while (tp) { + if (n == tp->t_num) { + tp->t_flg |= S_MDF; + break; + } + tp = tp->t_lnk; + } + if (tp == NULL) { + tp=(struct tsym *) new (sizeof(struct tsym)); + tp->t_lnk = symp->s_tsym; + tp->t_num = n; + tp->t_flg = 0; + tp->t_area = dot.s_area; + tp->t_addr = dot.s_addr; + symp->s_tsym = tp; + } + } else { + while (tp) { + if (n == tp->t_num) { + break; + } + tp = tp->t_lnk; + } + if (tp) { + if (pass == 1) { + fuzz = tp->t_addr - dot.s_addr; + tp->t_area = dot.s_area; + tp->t_addr = dot.s_addr; + } else { + phase(tp->t_area, tp->t_addr); + if (tp->t_flg & S_MDF) + err('m'); + } + } else { + err('u'); + } + } + lmode = ALIST; + goto loop; + } + /* + * If the first character is a letter then assume a label, + * symbol, assembler directive, or assembler mnemonic is + * being processed. + */ + if ((ctype[c] & LETTER) == 0) { + if (flevel) { + return; + } else { + qerr(); + } + } + getid(id, c); + c = getnb(); + /* + * If the next character is a : then a label is being processed. + * A double :: defines a global label. If this is new label + * then create a symbol structure. + * pass 0: + * Flag multiply defined labels. + * pass 1: + * Load area, address, and fuzz values + * into structure symp. + * pass 2: + * Check for assembler phase error and + * multiply defined error. + */ + if (c == ':') { + if (flevel) + return; + if ((c = get()) != ':') { + unget(c); + c = 0; + } + symp = lookup(id); + if (symp == &dot) + err('.'); + if (pass == 0) + if ((symp->s_type != S_NEW) && + ((symp->s_flag & S_ASG) == 0)) + symp->s_flag |= S_MDF; + if (pass != 2) { + fuzz = symp->s_addr - dot.s_addr; + symp->s_type = S_USER; + symp->s_area = dot.s_area; + symp->s_addr = dot.s_addr; + } else { + if (symp->s_flag & S_MDF) + err('m'); + phase(symp->s_area, symp->s_addr); + } + if (c) { + symp->s_flag |= S_GBL; + } + lmode = ALIST; + goto loop; + } + /* + * If the next character is a = then an equate is being processed. + * A double == defines a global equate. If this is new variable + * then create a symbol structure. + */ + if (c == '=') { + if (flevel) + return; + if ((c = get()) != '=') { + unget(c); + c = 0; + } + clrexpr(&e1); + expr(&e1, 0); + sp = lookup(id); + if (sp == &dot) { + outall(); + if (e1.e_flag || e1.e_base.e_ap != dot.s_area) + err('.'); + } else + if (sp->s_type != S_NEW && (sp->s_flag & S_ASG) == 0) { + err('m'); + } + sp->s_type = S_USER; + sp->s_area = e1.e_base.e_ap; + sp->s_addr = laddr = e1.e_addr; + sp->s_flag |= S_ASG; + if (c) { + sp->s_flag |= S_GBL; + } + lmode = ELIST; + goto loop; + } + unget(c); + lmode = flevel ? SLIST : CLIST; + if ((mp = mlookup(id)) == NULL) { + if (!flevel) + err('o'); + return; + } + /* + * If we have gotten this far then we have found an + * assembler directive or an assembler mnemonic. + * + * Check for .if, .else, .endif, and .page directives + * which are not controlled by the conditional flags + */ + switch (mp->m_type) { + + case S_IF: + n = absexpr(); + if (tlevel < MAXIF) { + ++tlevel; + ifcnd[tlevel] = n; + iflvl[tlevel] = flevel; + if (n == 0) { + ++flevel; + } + } else { + err('i'); + } + lmode = ELIST; + laddr = n; + return; + + case S_ELSE: + if (ifcnd[tlevel]) { + if (++flevel > (iflvl[tlevel]+1)) { + err('i'); + } + } else { + if (--flevel < iflvl[tlevel]) { + err('i'); + } + } + lmode = SLIST; + return; + + case S_ENDIF: + if (tlevel) { + flevel = iflvl[tlevel--]; + } else { + err('i'); + } + lmode = SLIST; + return; + + case S_PAGE: + lop = NLPP; + lmode = NLIST; + return; + + default: + break; + } + if (flevel) + return; + /* + * If we are not in a false state for .if/.else then + * process the assembler directives here. + */ + switch (mp->m_type) { + + case S_EVEN: + outall(); + laddr = dot.s_addr = (dot.s_addr + 1) & ~1; + lmode = ALIST; + break; + + case S_ODD: + outall(); + laddr = dot.s_addr |= 1; + lmode = ALIST; + break; + + case S_BYTE: + case S_WORD: + do { + clrexpr(&e1); + expr(&e1, 0); + if (mp->m_type == S_BYTE) { + outrb(&e1, R_NORM); + } else { + outrw(&e1, R_NORM); + } + } while ((c = getnb()) == ','); + unget(c); + break; + +#ifdef SDK + case S_FLOAT: + do { + getid( readbuffer, ' ' ); /* Hack :) */ + if ((c=getnb())=='.') + { + getid(&readbuffer[strlen(readbuffer)],'.'); + } + else + unget(c); + + f1 = strtod( readbuffer, (char **)NULL ); + /* Convert f1 to a gb-lib type fp + * 24 bit mantissa followed by 7 bit exp and 1 bit sign + */ + + if (f1!=0) + { + + f2 = floor(log(fabs(f1))/log(2))+1; + mantissa = (unsigned int) ((0x1000000*fabs(f1))/exp(f2*log(2))) ; + mantissa &=0xffffff; + exponent = (unsigned int) (f2 + 0x40) ; + if (f1<0) + exponent |=0x80; + } + + else + { + mantissa=0; + exponent=0; + } + + outab(mantissa&0xff); + outab((mantissa>>8)&0xff); + outab((mantissa>>16)&0xff); + outab(exponent&0xff); + + } while ((c = getnb()) == ','); + unget(c); + break; +#endif + + case S_ASCII: + case S_ASCIZ: + if ((d = getnb()) == '\0') + qerr(); + while ((c = getmap(d)) >= 0) + outab(c); + if (mp->m_type == S_ASCIZ) + outab(0); + break; + + case S_ASCIS: + if ((d = getnb()) == '\0') + qerr(); + c = getmap(d); + while (c >= 0) { + if ((n = getmap(d)) >= 0) { + outab(c); + } else { + outab(c | 0x80); + } + c = n; + } + break; + + case S_BLK: + clrexpr(&e1); + expr(&e1, 0); + dot.s_addr += e1.e_addr*mp->m_valu; + outchk(HUGE,HUGE); + lmode = BLIST; + break; + + case S_TITLE: + p = tb; + if ((c = getnb()) != 0) { + do { + if (p < &tb[NTITL-1]) + *p++ = c; + } while ((c = get()) != 0); + } + *p = 0; + unget(c); + lmode = SLIST; + break; + + case S_SBTL: + p = stb; + if ((c = getnb()) != 0) { + do { + if (p < &stb[NSBTL-1]) + *p++ = c; + } while ((c = get()) != 0); + } + *p = 0; + unget(c); + lmode = SLIST; + break; + + case S_MODUL: + getst(id, getnb()); // a module can start with a digit + if (pass == 0) { + if (module[0]) { + err('m'); + } else { + strncpy(module, id, NCPS); + } + } + lmode = SLIST; + break; + + case S_OPTSDCC: + p = optsdcc; + if ((c = getnb()) != 0) { + do { + if (p < &optsdcc[NINPUT-1]) + *p++ = c; + } while ((c = get()) != 0); + } + *p = 0; + unget(c); + lmode = SLIST; + break; + + case S_GLOBL: + do { + getid(id, -1); + sp = lookup(id); + sp->s_flag |= S_GBL; + } while ((c = getnb()) == ','); + unget(c); + lmode = SLIST; + break; + + case S_DAREA: + getid(id, -1); + uaf = 0; + uf = A_CON|A_REL; + if ((c = getnb()) == '(') { + do { + getid(opt, -1); + mp = mlookup(opt); + if (mp && mp->m_type == S_ATYP) { + ++uaf; + uf |= mp->m_valu; + } else { + err('u'); + } + } while ((c = getnb()) == ','); + if (c != ')') + qerr(); + } else { + unget(c); + } + if ((ap = alookup(id)) != NULL) { + if (uaf && uf != ap->a_flag) + err('m'); + } else { + ap = (struct area *) new (sizeof(struct area)); + ap->a_ap = areap; + ap->a_id = strsto(id); + ap->a_ref = areap->a_ref + 1; + ap->a_size = 0; + ap->a_fuzz = 0; + ap->a_flag = uaf ? uf : (A_CON|A_REL); + areap = ap; + } + newdot(ap); + lmode = SLIST; + break; + + case S_ORG: + if (dot.s_area->a_flag & A_ABS) { + outall(); + laddr = dot.s_addr = absexpr(); + } else { + err('o'); + } + outall(); + lmode = ALIST; + break; + + case S_RADIX: + if (more()) { + switch (getnb()) { + case 'b': + case 'B': + radix = 2; + break; + case '@': + case 'o': + case 'O': + case 'q': + case 'Q': + radix = 8; + break; + case 'd': + case 'D': + radix = 10; + break; + case 'h': + case 'H': + case 'x': + case 'X': + radix = 16; + break; + default: + radix = 10; + qerr(); + break; + } + } else { + radix = 10; + } + lmode = SLIST; + break; + + case S_INCL: + d = getnb(); + p = fn; + while ((c = get()) != d) { + if (p < &fn[FILSPC-1]) { + *p++ = c; + } else { + break; + } + } + *p = 0; + if (++incfil == MAXINC || + (ifp[incfil] = fopen(fn, "r")) == NULL) { + --incfil; + err('i'); + } else { + lop = NLPP; + incline[incfil] = 0; + strcpy(incfn[incfil],fn); + } + lmode = SLIST; + break; + + /* + * If not an assembler directive then go to + * the machine dependent function which handles + * all the assembler mnemonics. + */ + default: + /* if cdb information then generate the line info */ + if (cflag && (pass == 1)) + DefineCDB_Line(); + + /* JLH: if -j, generate a line number symbol */ + if (jflag && (pass == 1)) + { + DefineNoICE_Line(); + } + + + machine(mp); + } + goto loop; +} + +/*)Function FILE * afile(fn, ft, wf) + * + * char * fn file specification string + * char * ft file type string + * int wf read(0)/write(1) flag + * + * The function afile() opens a file for reading or writing. + * (1) If the file type specification string ft + * is not NULL then a file specification is + * constructed with the file path\name in fn + * and the extension in ft. + * (2) If the file type specification string ft + * is NULL then the file specification is + * constructed from fn. If fn does not have + * a file type then the default source file + * type dsft is appended to the file specification. + * + * afile() returns a file handle for the opened file or aborts + * the assembler on an open error. + * + * local variables: + * int c character value + * FILE * fp filehandle for opened file + * char * p1 pointer to filespec string fn + * char * p2 pointer to filespec string fb + * char * p3 pointer to filetype string ft + * + * global variables: + * char afn[] afile() constructed filespec + * char dsft[] default assembler file type string + * char afn[] constructed file specification string + * + * functions called: + * VOID asexit() asmain.c + * FILE * fopen() c_library + * int fprintf() c_library + * + * side effects: + * File is opened for read or write. + */ + +FILE * +afile(char *fn, char *ft, int wf) +{ + register char *p2, *p3; + register int c; + FILE *fp; + + p2 = afn; + p3 = ft; + + strcpy (afn, fn); + p2 = strrchr (afn, FSEPX); // search last '.' + if (!p2) + p2 = afn + strlen (afn); + if (p2 > &afn[FILSPC-4]) // truncate filename, if it's too long + p2 = &afn[FILSPC-4]; + *p2++ = FSEPX; + + // choose a file-extension + if (*p3 == 0) { // extension supplied? + p3 = strrchr (fn, FSEPX); // no: extension in fn? + if (p3) + ++p3; + else + p3 = dsft; // no: default extension + } + + while ((c = *p3++) != 0) { // strncpy + if (p2 < &afn[FILSPC-1]) + *p2++ = c; + } + *p2++ = 0; + + if ((fp = fopen(afn, wf?"w":"r")) == NULL) { + fprintf(stderr, "%s: cannot %s.\n", afn, wf?"create":"open"); + asexit(1); + } + return (fp); +} + +/*)Function VOID newdot(nap) + * + * area * nap pointer to the new area structure + * + * The function newdot(): + * (1) copies the current values of fuzz and the last + * address into the current area referenced by dot + * (2) loads dot with the pointer to the new area and + * loads the fuzz and last address parameters + * (3) outall() is called to flush any remaining + * bufferred code from the old area to the output + * + * local variables: + * area * oap pointer to old area + * + * global variables: + * sym dot defined as sym[0] + * Addr_T fuzz tracks pass to pass changes in the + * address of symbols caused by + * variable length instruction formats + * + * functions called: + * none + * + * side effects: + * Current area saved, new area loaded, buffers flushed. + */ + +VOID +newdot(struct area *nap) +{ + register struct area *oap; + + oap = dot.s_area; + oap->a_fuzz = fuzz; + oap->a_size = dot.s_addr; + fuzz = nap->a_fuzz; + dot.s_area = nap; + dot.s_addr = nap->a_size; + outall(); +} + +/*)Function VOID phase(ap, a) + * + * area * ap pointer to area + * Addr_T a address in area + * + * Function phase() compares the area ap and address a + * with the current area dot.s_area and address dot.s_addr + * to determine if the position of the symbol has changed + * between assembler passes. + * + * local variables: + * none + * + * global varaibles: + * sym * dot defined as sym[0] + * + * functions called: + * none + * + * side effects: + * The p error is invoked if the area and/or address + * has changed. + */ + +VOID +phase(struct area *ap, Addr_T a) +{ + if (ap != dot.s_area || a != dot.s_addr) + err('p'); +} + +char *usetxt[] = { +#ifdef SDK + "Usage: [-dqxjgalopscf] outfile file1 [file2 file3 ...]", +#else /* SDK */ + "Usage: [-dqxjgalopscf] file1 [file2 file3 ...]", +#endif /* SDK */ + " d decimal listing", + " q octal listing", + " x hex listing (default)", + " j add line number and debug information to file", /* JLH */ + " g undefined symbols made global", + " a all user symbols made global", +#ifdef SDK + " l create list output outfile[LST]", + " o create object output outfile[o]", + " s create symbol output outfile[SYM]", +#else /* SDK */ + " l create list output file1[LST]", + " o create object output file1[REL]", + " s create symbol output file1[SYM]", +#endif /* SDK */ + " c generate sdcdb debug information", + " p disable listing pagination", + " f flag relocatable references by ` in listing file", + " ff flag relocatable references by mode in listing file", + "", + 0 +}; + +/*)Function VOID usage() + * + * The function usage() outputs to the stderr device the + * assembler name and version and a list of valid assembler options. + * + * local variables: + * char ** dp pointer to an array of + * text string pointers. + * + * global variables: + * char cpu[] assembler type string + * char * usetxt[] array of string pointers + * + * functions called: + * VOID asexit() asmain.c + * int fprintf() c_library + * + * side effects: + * program is terminated + */ + +VOID +usage(void) +{ + register char **dp; + + fprintf(stderr, "\nASxxxx Assembler %s (%s)\n\n", VERSION, cpu); + for (dp = usetxt; *dp; dp++) + fprintf(stderr, "%s\n", *dp); + asexit(1); +} diff --git a/as/z80/asout.c b/as/z80/asout.c new file mode 100644 index 0000000..044a375 --- /dev/null +++ b/as/z80/asout.c @@ -0,0 +1,1071 @@ +/* asout.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * 10-Nov-07 borutr: + * - applied changes from 28-Oct-97 JLH: + * - outsym: show s_id as string rather than array [NCPS] + */ + +#include +#include +#include +#include "asm.h" + + +/*)Module asout.c + * + * The module asout.c contains all the functions used to + * generate the .REL assembler output file. + * + * + * The assemblers' output object file is an ascii file containing + * the information needed by the linker to bind multiple object + * modules into a complete loadable memory image. + * + * The object module contains the following designators: + * + * [XDQ][HL] + * X Hexidecimal radix + * D Decimal radix + * Q Octal radix + * + * H Most significant byte first + * L Least significant byte first + * + * H Header + * M Module + * A Area + * S Symbol + * T Object code + * R Relocation information + * P Paging information + * + * + * (1) Radix Line + * + * The first line of an object module contains the [XDQ][HL] + * format specifier (i.e. XH indicates a hexidecimal file with + * most significant byte first) for the following designators. + * + * + * (2) Header Line + * + * H aa areas gg global symbols + * + * The header line specifies the number of areas(aa) and the + * number of global symbols(gg) defined or referenced in this ob- + * ject module segment. + * + * + * (3) Module Line + * + * M name + * + * The module line specifies the module name from which this + * header segment was assembled. The module line will not appear + * if the .module directive was not used in the source program. + * + * + * (4) Symbol Line + * + * S string Defnnnn + * + * or + * + * S string Refnnnn + * + * The symbol line defines (Def) or references (Ref) the symbol + * 'string' with the value nnnn. The defined value is relative to + * the current area base address. References to constants and ex- + * ternal global symbols will always appear before the first area + * definition. References to external symbols will have a value of + * zero. + * + * + * (5) Area Line + * + * A label size ss flags ff + * + * The area line defines the area label, the size (ss) of the + * area in bytes, and the area flags (ff). The area flags specify + * the ABS, REL, CON, OVR, and PAG parameters: + * + * OVR/CON (0x04/0x00 i.e. bit position 2) + * + * ABS/REL (0x08/0x00 i.e. bit position 3) + * + * PAG (0x10 i.e. bit position 4) + * + * + * (6) T Line + * + * T xx xx nn nn nn nn nn ... + * + * The T line contains the assembled code output by the assem- + * bler with xx xx being the offset address from the current area + * base address and nn being the assembled instructions and data in + * byte format. + * + * + * (7) R Line + * + * R 0 0 nn nn n1 n2 xx xx ... + * + * The R line provides the relocation information to the linker. + * The nn nn value is the current area index, i.e. which area the + * current values were assembled. Relocation information is en- + * coded in groups of 4 bytes: + * + * 1. n1 is the relocation mode and object format + * 1. bit 0 word(0x00)/byte(0x01) + * 2. bit 1 relocatable area(0x00)/symbol(0x02) + * 3. bit 2 normal(0x00)/PC relative(0x04) relocation + * 4. bit 3 1-byte(0x00)/2-byte(0x08) object format for + * byte data + * 5. bit 4 signed(0x00)/unsigned(0x10) byte data + * 6. bit 5 normal(0x00)/page '0'(0x20) reference + * 7. bit 6 normal(0x00)/page 'nnn'(0x40) reference + * 8. bit 7 normal(0x00)/MSB of value + * + * 2. n2 is a byte index into the corresponding (i.e. pre- + * ceeding) T line data (i.e. a pointer to the data to be + * updated by the relocation). The T line data may be + * 1-byte or 2-byte byte data format or 2-byte word + * format. + * + * 3. xx xx is the area/symbol index for the area/symbol be- + * ing referenced. the corresponding area/symbol is found + * in the header area/symbol lists. + * + * + * The groups of 4 bytes are repeated for each item requiring relo- + * cation in the preceeding T line. + * + * + * (8) P Line + * + * P 0 0 nn nn n1 n2 xx xx + * + * The P line provides the paging information to the linker as + * specified by a .setdp directive. The format of the relocation + * information is identical to that of the R line. The correspond- + * ing T line has the following information: + * T xx xx aa aa bb bb + * + * Where aa aa is the area reference number which specifies the + * selected page area and bb bb is the base address of the page. + * bb bb will require relocation processing if the 'n1 n2 xx xx' is + * specified in the P line. The linker will verify that the base + * address is on a 256 byte boundary and that the page length of an + * area defined with the PAG type is not larger than 256 bytes. + * + * The linker defaults any direct page references to the first + * area defined in the input REL file. All ASxxxx assemblers will + * specify the _CODE area first, making this the default page area. + * + * + * asout.c contains the following functions: + * int lobyte() + * int hibyte() + * VOID out() + * VOID outab() + * VOID outall() + * VOID outarea() + * VOID outaw() + * VOID outbuf() + * VOID outchk() + * VOID outdot() + * VOID outdp() + * VOID outgsd() + * VOID outrb() + * VOID outrw() + * VOID outsym() + * VOID out_lb() + * VOID out_lw() + * VOID out_rw() + * VOID out_tw() + * + * The module asout.c contains the following local variables: + * int rel[] relocation data for code/data array + * int * relp pointer to rel array + * int txt[] assembled code/data array + * int * txtp pointer to txt array + */ + +#define NTXT 16 +#define NREL 16 + +char txt[NTXT]; +char rel[NREL]; + +char *txtp = { &txt[0] }; +char *relp = { &rel[0] }; + +/*)Function VOID outab(b) + * + * int b assembler data word + * + * The function outab() processes a single word of + * assembled data in absolute format. + * + * local variables: + * int * txtp pointer to data word + * + * global variables: + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID outchk() asout.c + * VOID out_lb() asout.c + * + * side effects: + * The current assembly address is incremented by 1. + */ + +VOID +outab(int b) +{ + if (pass == 2) { + out_lb(b,0); + if (oflag) { + outchk(1, 0); + *txtp++ = lobyte(b); + } + } + ++dot.s_addr; +} + +/*)Function VOID outaw(w) + * + * int w assembler data word + * + * The function outaw() processes a single word of + * assembled data in absolute format. + * + * local variables: + * int * txtp pointer to data word + * + * global variables: + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID outchk() asout.c + * VOID out_lw() asout.c + * + * side effects: + * The current assembly address is incremented by 2. + */ + +VOID +outaw(int w) +{ + if (pass == 2) { + out_lw(w,0); + if (oflag) { + outchk(2, 0); + out_tw(w); + } + } + dot.s_addr += 2; +} + +/*)Function VOID outrb(esp, r) + * + * expr * esp pointer to expr structure + * int r relocation mode + * + * The function outrb() processes a byte of generated code + * in either absolute or relocatable format dependent upon + * the data contained in the expr structure esp. If the + * .REL output is enabled then the appropriate information + * is loaded into the txt and rel buffers. + * + * local variables: + * int n symbol/area reference number + * int * relp pointer to rel array + * int * txtp pointer to txt array + * + * global variables: + * sym dot defined as sym[0] + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID aerr() assubr.c + * VOID outchk() asout.c + * VOID out_lb() asout.c + * VOID out_rb() asout.c + * VOID out_tb() asout.c + * + * side effects: + * The current assembly address is incremented by 1. + */ + +VOID +outrb(struct expr *esp, int r) +{ + register int n; + + if (pass == 2) { + if (esp->e_flag==0 && esp->e_base.e_ap==NULL) { + out_lb(lobyte(esp->e_addr),0); + if (oflag) { + outchk(1, 0); + *txtp++ = lobyte(esp->e_addr); + } + } else { + r |= R_BYTE | R_BYT2 | esp->e_rlcf; + if (r & R_MSB) { + out_lb(hibyte(esp->e_addr),r|R_RELOC|R_HIGH); + } else { + out_lb(lobyte(esp->e_addr),r|R_RELOC); + } + if (oflag) { + outchk(2, 4); + out_tw(esp->e_addr); + if (esp->e_flag) { + n = esp->e_base.e_sp->s_ref; + r |= R_SYM; + } else { + n = esp->e_base.e_ap->a_ref; + } + *relp++ = r; + *relp++ = txtp - txt - 2; + out_rw(n); + } + } + } + ++dot.s_addr; +} + +/*)Function VOID outrw(esp, r) + * + * expr * esp pointer to expr structure + * int r relocation mode + * + * The function outrw() processes a word of generated code + * in either absolute or relocatable format dependent upon + * the data contained in the expr structure esp. If the + * .REL output is enabled then the appropriate information + * is loaded into the txt and rel buffers. + * + * local variables: + * int n symbol/area reference number + * int * relp pointer to rel array + * int * txtp pointer to txt array + * + * global variables: + * sym dot defined as sym[0] + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID aerr() assubr.c + * VOID outchk() asout.c + * VOID out_lw() asout.c + * VOID out_rw() asout.c + * VOID out_tw() asout.c + * + * side effects: + * The current assembly address is incremented by 2. + */ + +VOID +outrw(struct expr *esp, int r) +{ + register int n; + + if (pass == 2) { + if (esp->e_flag==0 && esp->e_base.e_ap==NULL) { + out_lw(esp->e_addr,0); + if (oflag) { + outchk(2, 0); + out_tw(esp->e_addr); + } + } else { + r |= R_WORD | esp->e_rlcf; + if (r & R_BYT2) { + rerr(); + if (r & R_MSB) { + out_lw(hibyte(esp->e_addr),r|R_RELOC); + } else { + out_lw(lobyte(esp->e_addr),r|R_RELOC); + } + } else { + out_lw(esp->e_addr,r|R_RELOC); + } + if (oflag) { + outchk(2, 4); + out_tw(esp->e_addr); + if (esp->e_flag) { + n = esp->e_base.e_sp->s_ref; + r |= R_SYM; + } else { + n = esp->e_base.e_ap->a_ref; + } + *relp++ = r; + *relp++ = txtp - txt - 2; + out_rw(n); + } + } + } + dot.s_addr += 2; +} + +/*)Function VOID outdp(carea, esp) + * + * area * carea pointer to current area strcuture + * expr * esp pointer to expr structure + * + * The function outdp() flushes the output buffer and + * outputs paging information to the .REL file. + * + * local variables: + * int n symbol/area reference number + * int r relocation mode + * int * relp pointer to rel array + * int * txtp pointer to txt array + * + * global variables: + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID outbuf() asout.c + * VOID outchk() asout.c + * VOID out_rw() asout.c + * VOID out_tw() asout.c + * + * side effects: + * Output buffer flushed to .REL fiel. + * Paging information dumped to .REL file. + */ + +VOID +outdp(struct area *carea, struct expr *esp) +{ + register int n, r; + + if (oflag && pass==2) { + outchk(HUGE,HUGE); + out_tw(carea->a_ref); + out_tw(esp->e_addr); + if (esp->e_flag || esp->e_base.e_ap!=NULL) { + r = R_WORD; + if (esp->e_flag) { + n = esp->e_base.e_sp->s_ref; + r |= R_SYM; + } else { + n = esp->e_base.e_ap->a_ref; + } + *relp++ = r; + *relp++ = txtp - txt - 2; + out_rw(n); + } + outbuf("P"); + } +} + +/*)Function VOID outall() + * + * The function outall() will output any bufferred assembled + * data and relocation information (during pass 2 if the .REL + * output has been enabled). + * + * local variables: + * none + * + * global variables: + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * VOID outbuf() asout.c + * + * side effects: + * assembled data and relocation buffers will be cleared. + */ + +VOID +outall(void) +{ + if (oflag && pass==2) + outbuf("R"); +} + +/*)Function VOID outdot() + * + * The function outdot() outputs information about the + * current program counter value (during pass 2 if the .REL + * output has been enabled). + * + * local variables: + * none + * + * global variables: + * int oflag -o, generate relocatable output flag + * int pass assembler pass number + * + * functions called: + * int fprintf() c_library + * VOID out() asout.c + * + * side effects: + * assembled data and relocation buffers will be cleared. + */ + +VOID +outdot(void) +{ + if (oflag && pass==2) { + fprintf(ofp, "T"); + out(txt,(int) (txtp-txt)); + fprintf(ofp, "\n"); + fprintf(ofp, "R"); + out(rel,(int) (relp-rel)); + fprintf(ofp, "\n"); + txtp = txt; + relp = rel; + } +} + +/*)Function outchk(nt, nr) + * + * int nr number of additional relocation words + * int nt number of additional data words + * + * The function outchk() checks the data and relocation buffers + * for space to insert the nt data words and nr relocation words. + * If space is not available then output the current data and + * initialize the data buffers to receive the new data. + * + * local variables: + * area * ap pointer to an area structure + * int * relp pointer to rel array + * int * txtp pointer to txt array + * + * global variables: + * sym dot defined as sym[0] + * + * functions called: + * VOID outbuf() asout.c + * + * side effects: + * Data and relocation buffers may be emptied and initialized. + */ + +VOID +outchk(int nt, int nr) +{ + register struct area *ap; + + if (txtp+nt > &txt[NTXT] || relp+nr > &rel[NREL]) { + outbuf("R"); + } + if (txtp == txt) { + out_tw(dot.s_addr); + if ((ap = dot.s_area) != NULL) { + *relp++ = R_WORD|R_AREA; + *relp++ = 0; + out_rw(ap->a_ref); + } + } +} + +/*)Function VOID outbuf() + * + * The function outbuf() will output any bufferred data + * and relocation information to the .REL file. The output + * buffer pointers and counters are initialized. + * + * local variables: + * int rel[] relocation data for code/data array + * int * relp pointer to rel array + * int txt[] assembled code/data array + * int * txtp pointer to txt array + * + * global variables: + * FILE * ofp relocation output file handle + * + * functions called: + * VOID out() asout.c + * + * side effects: + * All bufferred data written to .REL file and + * buffer pointers and counters initialized. + */ + +VOID +outbuf(char *s) +{ + if (txtp > &txt[2]) { + fprintf(ofp, "T"); + out(txt,(int) (txtp-txt)); + fprintf(ofp, "\n"); + fprintf(ofp, "%s", s); + out(rel,(int) (relp-rel)); + fprintf(ofp, "\n"); + } + txtp = txt; + relp = rel; +} + +/*)Function VOID outgsd() + * + * The function outgsd() performs the following: + * (1) outputs the .REL file radix + * (2) outputs the header specifying the number + * of areas and global symbols + * (3) outputs the module name + * (4) set the reference number and output a symbol line + * for all external global variables and absolutes + * (5) output an area name, set reference number and output + * a symbol line for all global relocatables in the area. + * Repeat this proceedure for all areas. + * + * local variables: + * area * ap pointer to an area structure + * sym * sp pointer to a sym structure + * int i loop counter + * int j loop counter + * int c string character value + * int narea number of code areas + * char * ptr string pointer + * int nglob number of global symbols + * int rn symbol reference number + * + * global variables: + * area * areap pointer to an area structure + * char module[] module name string + * sym * symhash[] array of pointers to NHASH + * linked symbol lists + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * VOID outarea() asout.c + * VOID outsym() asout.c + * int putc() c_library + * + * side effects: + * All symbols are given reference numbers, all symbol + * and area information is output to the .REL file. + */ + +VOID +outgsd(void) +{ + register struct area *ap; + register struct sym *sp; + register int i, j; + char *ptr; + int c, narea, nglob, rn; + + /* + * Number of areas + */ + narea = areap->a_ref + 1; + + /* + * Number of global references/absolutes + */ + nglob = 0; + for (i = 0; i < NHASH; ++i) { + sp = symhash[i]; + while (sp) { + if (sp->s_flag&S_GBL) + ++nglob; + sp = sp->s_sp; + } + } + + /* + * Output Radix and number of areas and symbols + */ + if (xflag == 0) { + fprintf(ofp, "X%c\n", hilo ? 'H' : 'L'); + fprintf(ofp, "H %X areas %X global symbols\n", narea, nglob); + } else + if (xflag == 1) { + fprintf(ofp, "Q%c\n", hilo ? 'H' : 'L'); + fprintf(ofp, "H %o areas %o global symbols\n", narea, nglob); + } else + if (xflag == 2) { + fprintf(ofp, "D%c\n", hilo ? 'H' : 'L'); + fprintf(ofp, "H %u areas %u global symbols\n", narea, nglob); + } + + /* + * Module name + */ + if (module[0]) { + fprintf(ofp, "M "); + ptr = &module[0]; + while (ptr < &module[NCPS]) { + if ((c = *ptr++) != 0) + putc(c, ofp); + } + putc('\n', ofp); + } + + /* + * Sdcc compile options + */ + if (strlen(optsdcc)) fprintf(ofp, "O %s\n", optsdcc); + + /* + * Global references and absolutes. + */ + rn = 0; + for (i=0; is_area==NULL && sp->s_flag&S_GBL) { + sp->s_ref = rn++; + outsym(sp); + } + sp = sp->s_sp; + } + } + + /* + * Global relocatables. + */ + for (i=0; ia_ref != i) + ap = ap->a_ap; + outarea(ap); + for (j=0; js_area==ap && sp->s_flag&S_GBL) { + sp->s_ref = rn++; + outsym(sp); + } + sp = sp->s_sp; + } + } + } +} + +/*)Function VOID outarea(ap) + * + * area * ap pointer to an area structure + * + * The function outarea() outputs the A line to the .REL + * file. The A line contains the area's name, size, and + * attributes. + * + * local variables: + * char * ptr pointer to area id string + * int c character value + * + * global variables: + * FILE * ofp relocation output file handle + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * int putc() c_library + * + * side effects: + * The A line is sent to the .REL file. + */ + +VOID +outarea(struct area *ap) +{ + fprintf(ofp, "A %s", ap->a_id); + if (xflag == 0) { + fprintf(ofp, " size %X flags %X\n", ap->a_size, ap->a_flag); + } else + if (xflag == 1) { + fprintf(ofp, " size %o flags %o\n", ap->a_size, ap->a_flag); + } else + if (xflag == 2) { + fprintf(ofp, " size %u flags %u\n", ap->a_size, ap->a_flag); + } +} + +/*)Function VOID outsym(sp) + * + * sym * sp pointer to a sym structure + * + * The function outsym() outputs the S line to the .REL + * file. The S line contains the symbols name and whether the + * the symbol is defined or referenced. + * + * local variables: + * char * ptr pointer to symbol id string + * int c character value + * + * global variables: + * FILE * ofp relocation output file handle + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * int putc() c_library + * + * side effects: + * The S line is sent to the .REL file. + */ + +VOID +outsym(struct sym *sp) +{ + fprintf(ofp, "S %s", sp->s_id); + fprintf(ofp, " %s", sp->s_type==S_NEW ? "Ref" : "Def"); + if (xflag == 0) { + fprintf(ofp, "%04X\n", sp->s_addr); + } else + if (xflag == 1) { + fprintf(ofp, "%06o\n", sp->s_addr); + } else + if (xflag == 2) { + fprintf(ofp, "%05u\n", sp->s_addr); + } +} + +/*)Function VOID out(p, n) + * + * int n number of words to output + * int * p pointer to data words + * + * The function out() outputs the data words to the .REL file + * int the specified radix. + * + * local variables: + * none + * + * global variables: + * FILE * ofp relocation output file handle + * int xflag -x, listing radix flag + * + * functions called: + * int fprintf() c_library + * + * side effects: + * Data is sent to the .REL file. + */ + +VOID +out(char *p, int n) +{ + while (n--) { + if (xflag == 0) { + fprintf(ofp, " %02X", (*p++)&0377); + } else + if (xflag == 1) { + fprintf(ofp, " %03o", (*p++)&0377); + } else + if (xflag == 2) { + fprintf(ofp, " %03u", (*p++)&0377); + } + } +} + +/*)Function VOID out_lb(b, t) + * + * int b assembled data + * int t relocation type + * + * The function out_lb() copies the assembled data and + * its relocation type to the list data buffers. + * + * local variables: + * none + * + * global variables: + * int * cp pointer to assembler output array cb[] + * int * cpt pointer to assembler relocation type + * output array cbt[] + * + * functions called: + * none + * + * side effects: + * Pointers to data and relocation buffers incremented by 1. + */ + +VOID +out_lb(int b,int t) +{ + if (cp < &cb[NCODE]) { + *cp++ = b; + *cpt++ = t; + } +} + +/*)Function VOID out_lw(n, t) + * + * int n assembled data + * int t relocation type + * + * The function out_lw() copies the assembled data and + * its relocation type to the list data buffers. + * + * local variables: + * none + * + * global variables: + * int * cp pointer to assembler output array cb[] + * int * cpt pointer to assembler relocation type + * output array cbt[] + * + * functions called: + * none + * + * side effects: + * Pointers to data and relocation buffers incremented by 2. + */ + +VOID +out_lw(int n,int t) +{ + if (hilo) { + out_lb(hibyte(n),t ? t|R_HIGH : 0); + out_lb(lobyte(n),t); + } else { + out_lb(lobyte(n),t); + out_lb(hibyte(n),t ? t|R_HIGH : 0); + } +} + +/*)Function VOID out_rw(n) + * + * int n data word + * + * The function out_rw() outputs the relocation (R) + * data word as two bytes ordered according to hilo. + * + * local variables: + * int * relp pointer to rel array + * + * global variables: + * none + * + * functions called: + * int lobyte() asout.c + * int hibyte() asout.c + * + * side effects: + * Pointer to relocation buffer incremented by 2. + */ + +VOID +out_rw(int n) +{ + if (hilo) { + *relp++ = hibyte(n); + *relp++ = lobyte(n); + } else { + *relp++ = lobyte(n); + *relp++ = hibyte(n); + } +} + +/*)Function VOID out_tw(n) + * + * int n data word + * + * The function out_tw() outputs the text (T) + * data word as two bytes ordered according to hilo. + * + * local variables: + * int * txtp pointer to txt array + * + * global variables: + * none + * + * functions called: + * int lobyte() asout.c + * int hibyte() asout.c + * + * side effects: + * Pointer to relocation buffer incremented by 2. + */ + +VOID +out_tw(int n) +{ + if (hilo) { + *txtp++ = hibyte(n); + *txtp++ = lobyte(n); + } else { + *txtp++ = lobyte(n); + *txtp++ = hibyte(n); + } +} + +/*)Function int lobyte(n) + * + * int n data word + * + * The function lobyte() returns the lower byte of + * integer n. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ + +int +lobyte(int n) +{ + return (n&0377); +} + +/*)Function int hibyte(n) + * + * int n data word + * + * The function hibyte() returns the higher byte of + * integer n. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * none + * + * side effects: + * none + */ + +int +hibyte(int n) +{ + return ((n>>8)&0377); +} + diff --git a/as/z80/assubr.c b/as/z80/assubr.c new file mode 100644 index 0000000..ac45e8e --- /dev/null +++ b/as/z80/assubr.c @@ -0,0 +1,261 @@ +/* assubr.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * Extensions: P. Felber, M. Hope + */ + +#include +#include +#include +#include "asm.h" + +/*)Module assubr.c + * + * The module assubr.c contains the error + * processing routines. + * + * assubr.c contains the following functions: + * VOID aerr() + * VOID diag() + * VOID err() + * VOID qerr() + * VOID rerr() + * + * assubr.c contains the local array of *error[] + */ + +/*)Function VOID err(c) + * + * int c error type character + * + * The function err() logs the error code character + * suppressing duplicate errors. If the error code + * is 'q' then the parse of the current assembler-source + * text line is terminated. + * + * local variables: + * char * p pointer to the error array + * + * global variables: + * char eb[] array of generated error codes + * + * functions called: + * VOID longjmp() c_library + * + * side effects: + * The error code may be inserted into the + * error code array eb[] or the parse terminated. + */ + +VOID +err(c) +register int c; +{ + register char *p; + +#ifndef SDK + aserr++; +#endif /* SDK */ + p = eb; + while (p < ep) + if (*p++ == c) + return; + if (p < &eb[NERR]) { + *p++ = c; + ep = p; + } + if (c == 'q') + longjmp(jump_env, -1); +} + +/*)Function VOID diag() + * + * The function diag() prints any error codes and + * the source line number to the stderr output device. + * + * local variables: + * char * p pointer to error code array eb[] + * + * global variables: + * int cfile current source file index + * char eb[] array of generated error codes + * char * ep pointer into error list + * int incfile current include file index + * char incfn[] array of include file names + * int incline[] array of include line numbers + * char srcfn[] array of source file names + * int srcline[] array of source line numbers + * FILE * stderr c_library + * + * functions called: + * int fprintf() c_library + * char * geterr() assubr.c + * + * side effects: + * none + */ + +VOID +diag() +{ + register char *p,*errstr; + + if (eb != ep) { + p = eb; +#ifndef SDK + fprintf(stderr, "?ASxxxx-Error-<"); + while (p < ep) { + fprintf(stderr, "%c", *p++); + } + fprintf(stderr, "> in line "); + if (incfil >= 0) { + fprintf(stderr, "%d", incline[incfil]); + fprintf(stderr, " of %s\n", incfn[incfil]); + } else { + fprintf(stderr, "%d", srcline[cfile]); + fprintf(stderr, " of %s\n", srcfn[cfile]); + } + p = eb; +#endif /* SDK */ + while (p < ep) { + if ((errstr = geterr(*p++)) != NULL) { +#ifdef SDK + /* Modified to conform to gcc error standard, M. Hope, 7 Feb 98. */ + if (incfil >= 0) { + fprintf(stderr, "%s:", incfn[incfil]); + fprintf(stderr, "%d: Error:", incline[incfil]); + } + else { + fprintf(stderr, "%s:", srcfn[cfile]); + fprintf(stderr, "%d: Error:", srcline[cfile]); + } + fprintf(stderr, " %s\n", errstr); +#else + fprintf(stderr, " %s\n", errstr); +#endif /* SDK */ + } + } +#ifdef SDK + aserr++; +#endif /* SDK */ + } +} + +/*)Functions: VOID aerr() + * VOID qerr() + * VOID rerr() + * + * The functions aerr(), qerr(), and rerr() report their + * respective error type. These are included only for + * convenience. + * + * local variables: + * none + * + * global variables: + * none + * + * functions called: + * VOID err() assubr.c + * + * side effects: + * The appropriate error code is inserted into the + * error array and the parse may be terminated. + */ + +/* + * Note an 'r' error. + */ +VOID +rerr() +{ + err('r'); +} + +/* + * Note an 'a' error. + */ +VOID +aerr() +{ + err('a'); +} + +/* + * Note a 'q' error. + */ +VOID +qerr() +{ + err('q'); +} + +/* + * ASxxxx assembler errors + */ +char *errors[] = { + "<.> use \". = . + \" not \". = \"", + " machine specific addressing or addressing mode error", + " direct page boundary error", + " direct page addressing error", + " .include file error or an .if/.endif mismatch", + " multiple definitions error", + " .org in REL area or directive / mnemonic error", + "

phase error: label location changing between passes 2 and 3", + " missing or improper operators, terminators, or delimiters", + " relocation error", + " undefined symbol encountered during assembly", + NULL +}; + +/*)Function: char *getarr(c) + * + * int c the error code character + * + * The function geterr() scans the list of errors returning the + * error string corresponding to the input error character. + * + * local variables: + * int i error index counter + * + * global variables: + * char *errors[] array of pointers to the + * error strings + * + * functions called: + * none + * + * side effects: + * A pointer to the appropriate + * error code string is returned. + */ +char * +geterr(c) +int c; +{ + int i; + + for (i=0; errors[i]!=NULL; i++) { + if (c == errors[i][1]) { + return(errors[i]); + } + } + return(NULL); +} + diff --git a/as/z80/clean.mk b/as/z80/clean.mk new file mode 100644 index 0000000..10ac250 --- /dev/null +++ b/as/z80/clean.mk @@ -0,0 +1,25 @@ +# Deleting all files created by building the program +# -------------------------------------------------- +include $(top_builddir)/Makefile.common + +clean: mostlyclean + rm -f *.dep + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f Makefile + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: + rm -rf obj + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + rm -f $(top_builddir)/bin/as-z80$(EXEEXT) as-z80$(EXEEXT) + rm -f $(top_builddir)/bin/as-gbz80$(EXEEXT) as-gbz80$(EXEEXT) + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean diff --git a/as/z80/conf.mk b/as/z80/conf.mk new file mode 100644 index 0000000..6b1b704 --- /dev/null +++ b/as/z80/conf.mk @@ -0,0 +1,23 @@ +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + rm -f $(top_builddir)/bin/as-z80 as-z80 + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f Makefile *.dep + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean diff --git a/as/z80/incld1.asm b/as/z80/incld1.asm new file mode 100644 index 0000000..6994f27 --- /dev/null +++ b/as/z80/incld1.asm @@ -0,0 +1,10 @@ + xxx ;1 + .include "incld2.asm" ;2 + ;3 + ;4 + ;5 + xxx ;6 + ;7 + ;8 + ;9 + ;10 diff --git a/as/z80/incld2.asm b/as/z80/incld2.asm new file mode 100644 index 0000000..2c33ce8 --- /dev/null +++ b/as/z80/incld2.asm @@ -0,0 +1,10 @@ + ;1 + xxx ;2 + .include "incld3.asm" ;3 + ;4 + ;5 + ;6 + xxx ;7 + ;8 + ;9 + ;10 diff --git a/as/z80/incld3.asm b/as/z80/incld3.asm new file mode 100644 index 0000000..0c66f55 --- /dev/null +++ b/as/z80/incld3.asm @@ -0,0 +1,10 @@ + ;1 + ;2 + xxx ;3 + .include "incld4.asm" ;4 + ;5 + ;6 + ;7 + xxx ;8 + ;9 + ;10 diff --git a/as/z80/incld4.asm b/as/z80/incld4.asm new file mode 100644 index 0000000..0fc64c5 --- /dev/null +++ b/as/z80/incld4.asm @@ -0,0 +1,10 @@ + ;1 + ;2 + ;3 + xxx ;4 + .include "incld5.asm" ;5 + ;6 + ;7 + ;8 + xxx ;9 + ;10 diff --git a/as/z80/incld5.asm b/as/z80/incld5.asm new file mode 100644 index 0000000..9392a00 --- /dev/null +++ b/as/z80/incld5.asm @@ -0,0 +1,10 @@ + ;1 + ;2 + ;3 + ;4 + xxx ;5 + .include "incldx.asm" ;6 + ;7 + ;8 + ;9 + xxx ;10 diff --git a/as/z80/itsta.asm b/as/z80/itsta.asm new file mode 100644 index 0000000..c87c4fc --- /dev/null +++ b/as/z80/itsta.asm @@ -0,0 +1,42 @@ + .include "incld1.asm" ;1 + ;2 + ;3 + ;4 + ;5 + ;6 + ;7 + ;8 + ;9 + ;10 + xxx ;11 +; +; This is a simple test of the error reporting +; for source and include files. +; +; assemble inctst: +; asxxxx itsta itstb +; +; ?ASxxxx-E- in line 1 of incld1.asm +; ?ASxxxx-E- in line 2 of incld2.asm +; ?ASxxxx-E- in line 3 of incld3.asm +; ?ASxxxx-E- in line 4 of incld4.asm +; ?ASxxxx-E- in line 5 of incld5.asm +; ?ASxxxx-E- in line 6 of incld5.asm +; ?ASxxxx-E- in line 10 of incld5.asm +; ?ASxxxx-E- in line 9 of incld4.asm +; ?ASxxxx-E- in line 8 of incld3.asm +; ?ASxxxx-E- in line 7 of incld2.asm +; ?ASxxxx-E- in line 6 of incld1.asm +; ?ASxxxx-E- in line 11 of itsta.asm +; ?ASxxxx-E- in line 1 of incld1.asm +; ?ASxxxx-E- in line 2 of incld2.asm +; ?ASxxxx-E- in line 3 of incld3.asm +; ?ASxxxx-E- in line 4 of incld4.asm +; ?ASxxxx-E- in line 5 of incld5.asm +; ?ASxxxx-E- in line 6 of incld5.asm +; ?ASxxxx-E- in line 10 of incld5.asm +; ?ASxxxx-E- in line 9 of incld4.asm +; ?ASxxxx-E- in line 8 of incld3.asm +; ?ASxxxx-E- in line 7 of incld2.asm +; ?ASxxxx-E- in line 6 of incld1.asm +; ?ASxxxx-E- in line 11 of itstb.asm diff --git a/as/z80/itstb.asm b/as/z80/itstb.asm new file mode 100644 index 0000000..c87c4fc --- /dev/null +++ b/as/z80/itstb.asm @@ -0,0 +1,42 @@ + .include "incld1.asm" ;1 + ;2 + ;3 + ;4 + ;5 + ;6 + ;7 + ;8 + ;9 + ;10 + xxx ;11 +; +; This is a simple test of the error reporting +; for source and include files. +; +; assemble inctst: +; asxxxx itsta itstb +; +; ?ASxxxx-E- in line 1 of incld1.asm +; ?ASxxxx-E- in line 2 of incld2.asm +; ?ASxxxx-E- in line 3 of incld3.asm +; ?ASxxxx-E- in line 4 of incld4.asm +; ?ASxxxx-E- in line 5 of incld5.asm +; ?ASxxxx-E- in line 6 of incld5.asm +; ?ASxxxx-E- in line 10 of incld5.asm +; ?ASxxxx-E- in line 9 of incld4.asm +; ?ASxxxx-E- in line 8 of incld3.asm +; ?ASxxxx-E- in line 7 of incld2.asm +; ?ASxxxx-E- in line 6 of incld1.asm +; ?ASxxxx-E- in line 11 of itsta.asm +; ?ASxxxx-E- in line 1 of incld1.asm +; ?ASxxxx-E- in line 2 of incld2.asm +; ?ASxxxx-E- in line 3 of incld3.asm +; ?ASxxxx-E- in line 4 of incld4.asm +; ?ASxxxx-E- in line 5 of incld5.asm +; ?ASxxxx-E- in line 6 of incld5.asm +; ?ASxxxx-E- in line 10 of incld5.asm +; ?ASxxxx-E- in line 9 of incld4.asm +; ?ASxxxx-E- in line 8 of incld3.asm +; ?ASxxxx-E- in line 7 of incld2.asm +; ?ASxxxx-E- in line 6 of incld1.asm +; ?ASxxxx-E- in line 11 of itstb.asm diff --git a/as/z80/tconst.asm b/as/z80/tconst.asm new file mode 100644 index 0000000..c8f254b --- /dev/null +++ b/as/z80/tconst.asm @@ -0,0 +1,68 @@ + .title Assembler Link Test Constants + + .module tconst + + .area TEST (ABS,OVR) + + bra1 == 0 ; branching constants + bra2 == 0x80 + bra3 == 0x182 + bra4 == 0x204 + + .blkb 0x7E ;bra1: + .blkb 0x02 + .blkb 0x7F ;bra2: + .blkb 0x02 + .blkb 0x02 + .blkb 0x7F + .blkb 0x00 ;bra3: + .blkb 0x02 + .blkb 0x80 + .blkb 0x00 ;bra4: + + .globl bra5,bra6,bra7,bra8 + + ; branching labels +bra5: .blkb 0x7E ;bra5: + .blkb 0x02 +bra6: .blkb 0x7F ;bra6: + .blkb 0x02 + .blkb 0x02 + .blkb 0x7F +bra7: .blkb 0x00 ;bra7: + .blkb 0x02 + .blkb 0x80 +bra8: .blkb 0x00 ;bra8: + + + ; 12-Bit numbers are considered valid if: + ; 1) the most significant 4 bits of the 16-bit number are zero + ; 2) the most significant 4 bits of the 16-bit number are all ones + + n0FFF == 0x0FFF ;largest positive + n1000 == 0x1000 ;+1 + + nF000 == 0xF000 ;largest negative + nEFFF == 0xEFFF ;-1 + + + .area DIRECT (ABS,OVR) + .setdp + + boundary == 0x101 + + minus1 == -1 ; paging / indexing constants + zero == 0 + two55 == 0d255 + two56 == 0d256 + five11 == 0d511 + five12 == 0d512 + + + .globl lzero,ltwo55,ltwo56,lminus1 + +lzero: .blkb 0x00FF ; paging labels +ltwo55: .blkb 0x0001 +ltwo56: .blkb 0xFEFF +lminus1:.blkb 0d0000 + diff --git a/as/z80/tz80.asm b/as/z80/tz80.asm new file mode 100644 index 0000000..a33edc2 --- /dev/null +++ b/as/z80/tz80.asm @@ -0,0 +1,1013 @@ + .title Test of Z80 / HD64180 assembler + + offset = 0x55 ;arbitrary constants + n = 0x20 + nn = 0x0584 + + ; notes: + ; Leading 'a' operand is optional. + ; If offset is ommitted 0 is assumed. + + ;*********************************************************** + ; add with carry to 'a' + adc a,(hl) ;8E + adc a,offset(ix) ;DD 8E 55 + adc a,offset(iy) ;FD 8E 55 + adc a,a ;8F + adc a,b ;88 + adc a,c ;89 + adc a,d ;8A + adc a,e ;8B + adc a,h ;8C + adc a,l ;8D + adc a,#n ;CE 20 + ;*********************************************************** + adc (hl) ;8E + adc offset(ix) ;DD 8E 55 + adc offset(iy) ;FD 8E 55 + adc a ;8F + adc b ;88 + adc c ;89 + adc d ;8A + adc e ;8B + adc h ;8C + adc l ;8D + adc #n ;CE 20 + ;*********************************************************** + ; add with carry register pair to 'hl' + adc hl,bc ;ED 4A + adc hl,de ;ED 5A + adc hl,hl ;ED 6A + adc hl,sp ;ED 7A + ;*********************************************************** + ; add operand to 'a' + add a,(hl) ;86 + add a,offset(ix) ;DD 86 55 + add a,offset(iy) ;FD 86 55 + add a,a ;87 + add a,b ;80 + add a,c ;81 + add a,d ;82 + add a,e ;83 + add a,h ;84 + add a,l ;85 + add a,#n ;C6 20 + ;*********************************************************** + ; add register pair to 'hl' + add hl,bc ;09 + add hl,de ;19 + add hl,hl ;29 + add hl,sp ;39 + ;*********************************************************** + ; add register pair to 'ix' + add ix,bc ;DD 09 + add ix,de ;DD 19 + add ix,ix ;DD 29 + add ix,sp ;DD 39 + ;*********************************************************** + ; add register pair to 'iy' + add iy,bc ;FD 09 + add iy,de ;FD 19 + add iy,iy ;FD 29 + add iy,sp ;FD 39 + ;*********************************************************** + ; logical 'and' operand with 'a' + and a,(hl) ;A6 + and a,offset(ix) ;DD A6 55 + and a,offset(iy) ;FD A6 55 + and a,a ;A7 + and a,b ;A0 + and a,c ;A1 + and a,d ;A2 + and a,e ;A3 + and a,h ;A4 + and a,l ;A5 + and a,#n ;E6 20 + ;*********************************************************** + ; test bit of location or register + bit 0,(hl) ;CB 46 + bit 0,offset(ix) ;DD CB 55 46 + bit 0,offset(iy) ;FD CB 55 46 + bit 0,a ;CB 47 + bit 0,b ;CB 40 + bit 0,c ;CB 41 + bit 0,d ;CB 42 + bit 0,e ;CB 43 + bit 0,h ;CB 44 + bit 0,l ;CB 45 + bit 1,(hl) ;CB 4E + bit 1,offset(ix) ;DD CB 55 4E + bit 1,offset(iy) ;FD CB 55 4E + bit 1,a ;CB 4F + bit 1,b ;CB 48 + bit 1,c ;CB 49 + bit 1,d ;CB 4A + bit 1,e ;CB 4B + bit 1,h ;CB 4C + bit 1,l ;CB 4D + bit 2,(hl) ;CB 56 + bit 2,offset(ix) ;DD CB 55 56 + bit 2,offset(iy) ;FD CB 55 56 + bit 2,a ;CB 57 + bit 2,b ;CB 50 + bit 2,c ;CB 51 + bit 2,d ;CB 52 + bit 2,e ;CB 53 + bit 2,h ;CB 54 + bit 2,l ;CB 55 + bit 3,(hl) ;CB 5E + bit 3,offset(ix) ;DD CB 55 5E + bit 3,offset(iy) ;FD CB 55 5E + bit 3,a ;CB 5F + bit 3,b ;CB 58 + bit 3,c ;CB 59 + bit 3,d ;CB 5A + bit 3,e ;CB 5B + bit 3,h ;CB 5C + bit 3,l ;CB 5D + bit 4,(hl) ;CB 66 + bit 4,offset(ix) ;DD CB 55 66 + bit 4,offset(iy) ;FD CB 55 66 + bit 4,a ;CB 67 + bit 4,b ;CB 60 + bit 4,c ;CB 61 + bit 4,d ;CB 62 + bit 4,e ;CB 63 + bit 4,h ;CB 64 + bit 4,l ;CB 65 + bit 5,(hl) ;CB 6E + bit 5,offset(ix) ;DD CB 55 6E + bit 5,offset(iy) ;FD CB 55 6E + bit 5,a ;CB 6F + bit 5,b ;CB 68 + bit 5,c ;CB 69 + bit 5,d ;CB 6A + bit 5,e ;CB 6B + bit 5,h ;CB 6C + bit 5,l ;CB 6D + bit 6,(hl) ;CB 76 + bit 6,offset(ix) ;DD CB 55 76 + bit 6,offset(iy) ;FD CB 55 76 + bit 6,a ;CB 77 + bit 6,b ;CB 70 + bit 6,c ;CB 71 + bit 6,d ;CB 72 + bit 6,e ;CB 73 + bit 6,h ;CB 74 + bit 6,l ;CB 75 + bit 7,(hl) ;CB 7E + bit 7,offset(ix) ;DD CB 55 7E + bit 7,offset(iy) ;FD CB 55 7E + bit 7,a ;CB 7F + bit 7,b ;CB 78 + bit 7,c ;CB 79 + bit 7,d ;CB 7A + bit 7,e ;CB 7B + bit 7,h ;CB 7C + bit 7,l ;CB 7D + ;*********************************************************** + ; call subroutine at nn if condition is true + call C,nn ;DC 84 05 + call M,nn ;FC 84 05 + call NC,nn ;D4 84 05 + call NZ,nn ;C4 84 05 + call P,nn ;F4 84 05 + call PE,nn ;EC 84 05 + call PO,nn ;E4 84 05 + call Z,nn ;CC 84 05 + ;*********************************************************** + ; unconditional call to subroutine at nn + call nn ;CD 84 05 + ;*********************************************************** + ; complement carry flag + ccf ;3F + ;*********************************************************** + ; compare operand with 'a' + cp a,(hl) ;BE + cp a,offset(ix) ;DD BE 55 + cp a,offset(iy) ;FD BE 55 + cp a,a ;BF + cp a,b ;B8 + cp a,c ;B9 + cp a,d ;BA + cp a,e ;BB + cp a,h ;BC + cp a,l ;BD + cp a,#n ;FE 20 + ;*********************************************************** + ; compare location (hl) and 'a' + ; decrement 'hl' and 'bc' + cpd ;ED A9 + ;*********************************************************** + ; compare location (hl) and 'a' + ; decrement 'hl' and 'bc' + ; repeat until 'bc' = 0 + cpdr ;ED B9 + ;*********************************************************** + ; compare location (hl) and 'a' + ; increment 'hl' and decrement 'bc' + cpi ;ED A1 + ;*********************************************************** + ; compare location (hl) and 'a' + ; increment 'hl' and decrement 'bc' + ; repeat until 'bc' = 0 + cpir ;ED B1 + ;*********************************************************** + ; 1's complement of 'a' + cpl ;2F + ;*********************************************************** + ; decimal adjust 'a' + daa ;27 + ;*********************************************************** + ; decrement operand + dec (hl) ;35 + dec offset(ix) ;DD 35 55 + dec offset(iy) ;FD 35 55 + dec a ;3D + dec b ;05 + dec bc ;0B + dec c ;0D + dec d ;15 + dec de ;1B + dec e ;1D + dec h ;25 + dec hl ;2B + dec ix ;DD 2B + dec iy ;FD 2B + dec l ;2D + dec sp ;3B + ;*********************************************************** + ; disable interrupts + di ;F3 + ;*********************************************************** + ; decrement b and jump relative if b # 0 + djnz .+0x12 ;10 10 + ;*********************************************************** + ; enable interrupts + ei ;FB + ;*********************************************************** + ; exchange location and (sp) + ex (sp),hl ;E3 + ex (sp),ix ;DD E3 + ex (sp),iy ;FD E3 + ;*********************************************************** + ; exchange af and af' + ex af,af' ;08 + ;*********************************************************** + ; exchange de and hl + ex de,hl ;EB + ;*********************************************************** + ; exchange: + ; bc <-> bc' + ; de <-> de' + ; hl <-> hl' + exx ;D9 + ;*********************************************************** + ; halt (wait for interrupt or reset) + halt ;76 + ;*********************************************************** + ; set interrupt mode + im 0 ;ED 46 + im 1 ;ED 56 + im 2 ;ED 5E + ;*********************************************************** + ; load 'a' with input from device n + in a,(n) ;DB 20 + ;*********************************************************** + ; load register with input from (c) + in a,(c) ;ED 78 + in b,(c) ;ED 40 + in c,(c) ;ED 48 + in d,(c) ;ED 50 + in e,(c) ;ED 58 + in h,(c) ;ED 60 + in l,(c) ;ED 68 + ;*********************************************************** + ; increment operand + inc (hl) ;34 + inc offset(ix) ;DD 34 55 + inc offset(iy) ;FD 34 55 + inc a ;3C + inc b ;04 + inc bc ;03 + inc c ;0C + inc d ;14 + inc de ;13 + inc e ;1C + inc h ;24 + inc hl ;23 + inc ix ;DD 23 + inc iy ;FD 23 + inc l ;2C + inc sp ;33 + ;*********************************************************** + ; load location (hl) with input + ; from port (c) + ; decrement 'hl' and 'b' + ind ;ED AA + ;*********************************************************** + ; load location (hl) with input + ; from port (c) + ; decrement 'hl' and 'b' + ; repeat until 'b' = 0 + indr ;ED BA + ;*********************************************************** + ; load location (hl) with input + ; from port (c) + ; increment 'hl' and decrement 'b' + ini ;ED A2 + ;*********************************************************** + ; load location (hl) with input + ; from port (c) + ; increment 'hl' and decrement 'b' + ; repeat until 'b' = 0 + inir ;ED B2 + ;*********************************************************** + ; unconditional jump to location nn + jp nn ;C3 84 05 + jp (hl) ;E9 + jp (ix) ;DD E9 + jp (iy) ;FD E9 + ;*********************************************************** + ; jump to location if condition is true + jp C,nn ;DA 84 05 + jp M,nn ;FA 84 05 + jp NC,nn ;D2 84 05 + jp NZ,nn ;C2 84 05 + jp P,nn ;F2 84 05 + jp PE,nn ;EA 84 05 + jp PO,nn ;E2 84 05 + jp Z,nn ;CA 84 05 + ;*********************************************************** + ; unconditional jump relative to PC+e + jr jr1+0x10 ;18 10 + ;*********************************************************** + ; jump relative to PC+e if condition is true +jr1: jr C,jr2+0x10 ;38 10 +jr2: jr NC,jr3+0x10 ;30 10 +jr3: jr NZ,jr4+0x10 ;20 10 +jr4: jr Z,jr5+0x10 ;28 10 +jr5: + ;*********************************************************** + ; load source to destination + ld a,(hl) ;7E + ld a,offset(ix) ;DD 7E 55 + ld a,offset(iy) ;FD 7E 55 + ld a,a ;7F + ld a,b ;78 + ld a,c ;79 + ld a,d ;7A + ld a,e ;7B + ld a,h ;7C + ld a,l ;7D + ld a,#n ;3E 20 + ld b,(hl) ;46 + ld b,offset(ix) ;DD 46 55 + ld b,offset(iy) ;FD 46 55 + ld b,a ;47 + ld b,b ;40 + ld b,c ;41 + ld b,d ;42 + ld b,e ;43 + ld b,h ;44 + ld b,l ;45 + ld b,#n ;06 20 + ld c,(hl) ;4E + ld c,offset(ix) ;DD 4E 55 + ld c,offset(iy) ;FD 4E 55 + ld c,a ;4F + ld c,b ;48 + ld c,c ;49 + ld c,d ;4A + ld c,e ;4B + ld c,h ;4C + ld c,l ;4D + ld c,#n ;0E 20 + ld d,(hl) ;56 + ld d,offset(ix) ;DD 56 55 + ld d,offset(iy) ;FD 56 55 + ld d,a ;57 + ld d,b ;50 + ld d,c ;51 + ld d,d ;52 + ld d,e ;53 + ld d,h ;54 + ld d,l ;55 + ld d,#n ;16 20 + ld e,(hl) ;5E + ld e,offset(ix) ;DD 5E 55 + ld e,offset(iy) ;FD 5E 55 + ld e,a ;5F + ld e,b ;58 + ld e,c ;59 + ld e,d ;5A + ld e,e ;5B + ld e,h ;5C + ld e,l ;5D + ld e,#n ;1E 20 + ld h,(hl) ;66 + ld h,offset(ix) ;DD 66 55 + ld h,offset(iy) ;FD 66 55 + ld h,a ;67 + ld h,b ;60 + ld h,c ;61 + ld h,d ;62 + ld h,e ;63 + ld h,h ;64 + ld h,l ;65 + ld h,#n ;26 20 + ld l,(hl) ;6E + ld l,offset(ix) ;DD 6E 55 + ld l,offset(iy) ;FD 6E 55 + ld l,a ;6F + ld l,b ;68 + ld l,c ;69 + ld l,d ;6A + ld l,e ;6B + ld l,h ;6C + ld l,l ;6D + ld l,#n ;2E 20 + ;*********************************************************** + ld i,a ;ED 47 + ld r,a ;ED 4F + ld a,i ;ED 57 + ld a,r ;ED 5F + ;*********************************************************** + ld (bc),a ;02 + ld (de),a ;12 + ld a,(bc) ;0A + ld a,(de) ;1A + ;*********************************************************** + ld (hl),a ;77 + ld (hl),b ;70 + ld (hl),c ;71 + ld (hl),d ;72 + ld (hl),e ;73 + ld (hl),h ;74 + ld (hl),l ;75 + ld (hl),#n ;36 20 + ;*********************************************************** + ld offset(ix),a ;DD 77 55 + ld offset(ix),b ;DD 70 55 + ld offset(ix),c ;DD 71 55 + ld offset(ix),d ;DD 72 55 + ld offset(ix),e ;DD 73 55 + ld offset(ix),h ;DD 74 55 + ld offset(ix),l ;DD 75 55 + ld offset(ix),#n ;DD 36 55 20 + ;*********************************************************** + ld offset(iy),a ;FD 77 55 + ld offset(iy),b ;FD 70 55 + ld offset(iy),c ;FD 71 55 + ld offset(iy),d ;FD 72 55 + ld offset(iy),e ;FD 73 55 + ld offset(iy),h ;FD 74 55 + ld offset(iy),l ;FD 75 55 + ld offset(iy),#n ;FD 36 55 20 + ;*********************************************************** + ld (nn),a ;32 84 05 + ld (nn),bc ;ED 43 84 05 + ld (nn),de ;ED 53 84 05 + ld (nn),hl ;22 84 05 + ld (nn),sp ;ED 73 84 05 + ld (nn),ix ;DD 22 84 05 + ld (nn),iy ;FD 22 84 05 + ;*********************************************************** + ld a,(nn) ;3A 84 05 + ld bc,(nn) ;ED 4B 84 05 + ld de,(nn) ;ED 5B 84 05 + ld hl,(nn) ;2A 84 05 + ld sp,(nn) ;ED 7B 84 05 + ld ix,(nn) ;DD 2A 84 05 + ld iy,(nn) ;FD 2A 84 05 + ;*********************************************************** + ld bc,#nn ;01 84 05 + ld de,#nn ;11 84 05 + ld hl,#nn ;21 84 05 + ld sp,#nn ;31 84 05 + ld ix,#nn ;DD 21 84 05 + ld iy,#nn ;FD 21 84 05 + ;*********************************************************** + ld sp,hl ;F9 + ld sp,ix ;DD F9 + ld sp,iy ;FD F9 + ;*********************************************************** + ; load location (hl) + ; with location (de) + ; decrement de, hl + ; decrement bc + ldd ;ED A8 + ;*********************************************************** + ; load location (hl) + ; with location (de) + ; decrement de, hl + ; decrement bc + ; repeat until bc = 0 + lddr ;ED B8 + ;*********************************************************** + ; load location (hl) + ; with location (de) + ; increment de, hl + ; decrement bc + ldi ;ED A0 + ;*********************************************************** + ; load location (hl) + ; with location (de) + ; increment de, hl + ; decrement bc + ; repeat until bc = 0 + ldir ;ED B0 + ;*********************************************************** + ; 2's complement of 'a' + neg ;ED 44 + ;*********************************************************** + ; no operation + nop ;00 + ;*********************************************************** + ; logical 'or' operand with 'a' + or a,(hl) ;B6 + or a,offset(ix) ;DD B6 55 + or a,offset(iy) ;FD B6 55 + or a,a ;B7 + or a,b ;B0 + or a,c ;B1 + or a,d ;B2 + or a,e ;B3 + or a,h ;B4 + or a,l ;B5 + or a,#n ;F6 20 + ;*********************************************************** + ; load output port (c) + ; with location (hl) + ; decrement hl and decrement b + ; repeat until b = 0 + otdr ;ED BB + ;*********************************************************** + ; load output port (c) + ; with location (hl) + ; increment hl and decrement b + ; repeat until b = 0 + otir ;ED B3 + ;*********************************************************** + ; load output port (c) with reg + out (c),a ;ED 79 + out (c),b ;ED 41 + out (c),c ;ED 49 + out (c),d ;ED 51 + out (c),e ;ED 59 + out (c),h ;ED 61 + out (c),l ;ED 69 + ;*********************************************************** + ; load output port (n) with 'a' + out (n),a ;D3 20 + ;*********************************************************** + ; load output port (c) + ; with location (hl) + ; decrement hl and decrement b + outd ;ED AB + ;*********************************************************** + ; load output port (c) + ; with location (hl) + ; increment hl and decrement b + outi ;ED A3 + ;*********************************************************** + ; load destination with top of stack + pop af ;F1 + pop bc ;C1 + pop de ;D1 + pop hl ;E1 + pop ix ;DD E1 + pop iy ;FD E1 + ;*********************************************************** + ; put source on stack + push af ;F5 + push bc ;C5 + push de ;D5 + push hl ;E5 + push ix ;DD E5 + push iy ;FD E5 + ;*********************************************************** + ; reset bit of location or register + res 0,(hl) ;CB 86 + res 0,offset(ix) ;DD CB 55 86 + res 0,offset(iy) ;FD CB 55 86 + res 0,a ;CB 87 + res 0,b ;CB 80 + res 0,c ;CB 81 + res 0,d ;CB 82 + res 0,e ;CB 83 + res 0,h ;CB 84 + res 0,l ;CB 85 + res 1,(hl) ;CB 8E + res 1,offset(ix) ;DD CB 55 8E + res 1,offset(iy) ;FD CB 55 8E + res 1,a ;CB 8F + res 1,b ;CB 88 + res 1,c ;CB 89 + res 1,d ;CB 8A + res 1,e ;CB 8B + res 1,h ;CB 8C + res 1,l ;CB 8D + res 2,(hl) ;CB 96 + res 2,offset(ix) ;DD CB 55 96 + res 2,offset(iy) ;FD CB 55 96 + res 2,a ;CB 97 + res 2,b ;CB 90 + res 2,c ;CB 91 + res 2,d ;CB 92 + res 2,e ;CB 93 + res 2,h ;CB 94 + res 2,l ;CB 95 + res 3,(hl) ;CB 9E + res 3,offset(ix) ;DD CB 55 9E + res 3,offset(iy) ;FD CB 55 9E + res 3,a ;CB 9F + res 3,b ;CB 98 + res 3,c ;CB 99 + res 3,d ;CB 9A + res 3,e ;CB 9B + res 3,h ;CB 9C + res 3,l ;CB 9D + res 4,(hl) ;CB A6 + res 4,offset(ix) ;DD CB 55 A6 + res 4,offset(iy) ;FD CB 55 A6 + res 4,a ;CB A7 + res 4,b ;CB A0 + res 4,c ;CB A1 + res 4,d ;CB A2 + res 4,e ;CB A3 + res 4,h ;CB A4 + res 4,l ;CB A5 + res 5,(hl) ;CB AE + res 5,offset(ix) ;DD CB 55 AE + res 5,offset(iy) ;FD CB 55 AE + res 5,a ;CB AF + res 5,b ;CB A8 + res 5,c ;CB A9 + res 5,d ;CB AA + res 5,e ;CB AB + res 5,h ;CB AC + res 5,l ;CB AD + res 6,(hl) ;CB B6 + res 6,offset(ix) ;DD CB 55 B6 + res 6,offset(iy) ;FD CB 55 B6 + res 6,a ;CB B7 + res 6,b ;CB B0 + res 6,c ;CB B1 + res 6,d ;CB B2 + res 6,e ;CB B3 + res 6,h ;CB B4 + res 6,l ;CB B5 + res 7,(hl) ;CB BE + res 7,offset(ix) ;DD CB 55 BE + res 7,offset(iy) ;FD CB 55 BE + res 7,a ;CB BF + res 7,b ;CB B8 + res 7,c ;CB B9 + res 7,d ;CB BA + res 7,e ;CB BB + res 7,h ;CB BC + res 7,l ;CB BD + ;*********************************************************** + ; return from subroutine + ret ;C9 + ;*********************************************************** + ; return from subroutine if condition is true + ret C ;D8 + ret M ;F8 + ret NC ;D0 + ret NZ ;C0 + ret P ;F0 + ret PE ;E8 + ret PO ;E0 + ret Z ;C8 + ;*********************************************************** + ; return from interrupt + reti ;ED 4D + ;*********************************************************** + ; return from non-maskable interrupt + retn ;ED 45 + ;*********************************************************** + ; rotate left through carry + rl a,(hl) ;CB 16 + rl a,offset(ix) ;DD CB 55 16 + rl a,offset(iy) ;FD CB 55 16 + rl a,a ;CB 17 + rl a,b ;CB 10 + rl a,c ;CB 11 + rl a,d ;CB 12 + rl a,e ;CB 13 + rl a,h ;CB 14 + rl a,l ;CB 15 + ;*********************************************************** + ; rotate left 'a' with carry + rla ;17 + ;*********************************************************** + ; rotate left circular + rlc a,(hl) ;CB 06 + rlc a,offset(ix) ;DD CB 55 06 + rlc a,offset(iy) ;FD CB 55 06 + rlc a,a ;CB 07 + rlc a,b ;CB 00 + rlc a,c ;CB 01 + rlc a,d ;CB 02 + rlc a,e ;CB 03 + rlc a,h ;CB 04 + rlc a,l ;CB 05 + ;*********************************************************** + ; rotate left 'a' circular + rlca ;07 + ;*********************************************************** + ; rotate digit left and right + ; between 'a' and location (hl) + rld ;ED 6F + ;*********************************************************** + ; rotate right through carry + rr a,(hl) ;CB 1E + rr a,offset(ix) ;DD CB 55 1E + rr a,offset(iy) ;FD CB 55 1E + rr a,a ;CB 1F + rr a,b ;CB 18 + rr a,c ;CB 19 + rr a,d ;CB 1A + rr a,e ;CB 1B + rr a,h ;CB 1C + rr a,l ;CB 1D + ;*********************************************************** + ; rotate 'a' right with carry + rra ;1F + ;*********************************************************** + ; rotate right circular + rrc a,(hl) ;CB 0E + rrc a,offset(ix) ;DD CB 55 0E + rrc a,offset(iy) ;FD CB 55 0E + rrc a,a ;CB 0F + rrc a,b ;CB 08 + rrc a,c ;CB 09 + rrc a,d ;CB 0A + rrc a,e ;CB 0B + rrc a,h ;CB 0C + rrc a,l ;CB 0D + ;*********************************************************** + ; rotate 'a' right circular + rrca ;0F + ;*********************************************************** + ; rotate digit right and left + ; between 'a' and location (hl) + rrd ;ED 67 + ;*********************************************************** + ; restart location + rst 0x00 ;C7 + rst 0x08 ;CF + rst 0x10 ;D7 + rst 0x18 ;DF + rst 0x20 ;E7 + rst 0x28 ;EF + rst 0x30 ;F7 + rst 0x38 ;FF + ;*********************************************************** + ; subtract with carry to 'a' + sbc a,(hl) ;9E + sbc a,offset(ix) ;DD 9E 55 + sbc a,offset(iy) ;FD 9E 55 + sbc a,a ;9F + sbc a,b ;98 + sbc a,c ;99 + sbc a,d ;9A + sbc a,e ;9B + sbc a,h ;9C + sbc a,l ;9D + sbc a,#n ;DE 20 + ;*********************************************************** + ; add with carry register pair to 'hl' + sbc hl,bc ;ED 42 + sbc hl,de ;ED 52 + sbc hl,hl ;ED 62 + sbc hl,sp ;ED 72 + ;*********************************************************** + ; set carry flag (C=1) + scf ;37 + ;*********************************************************** + ; set bit of location or register + set 0,(hl) ;CB C6 + set 0,offset(ix) ;DD CB 55 C6 + set 0,offset(iy) ;FD CB 55 C6 + set 0,a ;CB C7 + set 0,b ;CB C0 + set 0,c ;CB C1 + set 0,d ;CB C2 + set 0,e ;CB C3 + set 0,h ;CB C4 + set 0,l ;CB C5 + set 1,(hl) ;CB CE + set 1,offset(ix) ;DD CB 55 CE + set 1,offset(iy) ;FD CB 55 CE + set 1,a ;CB CF + set 1,b ;CB C8 + set 1,c ;CB C9 + set 1,d ;CB CA + set 1,e ;CB CB + set 1,h ;CB CC + set 1,l ;CB CD + set 2,(hl) ;CB D6 + set 2,offset(ix) ;DD CB 55 D6 + set 2,offset(iy) ;FD CB 55 D6 + set 2,a ;CB D7 + set 2,b ;CB D0 + set 2,c ;CB D1 + set 2,d ;CB D2 + set 2,e ;CB D3 + set 2,h ;CB D4 + set 2,l ;CB D5 + set 3,(hl) ;CB DE + set 3,offset(ix) ;DD CB 55 DE + set 3,offset(iy) ;FD CB 55 DE + set 3,a ;CB DF + set 3,b ;CB D8 + set 3,c ;CB D9 + set 3,d ;CB DA + set 3,e ;CB DB + set 3,h ;CB DC + set 3,l ;CB DD + set 4,(hl) ;CB E6 + set 4,offset(ix) ;DD CB 55 E6 + set 4,offset(iy) ;FD CB 55 E6 + set 4,a ;CB E7 + set 4,b ;CB E0 + set 4,c ;CB E1 + set 4,d ;CB E2 + set 4,e ;CB E3 + set 4,h ;CB E4 + set 4,l ;CB E5 + set 5,(hl) ;CB EE + set 5,offset(ix) ;DD CB 55 EE + set 5,offset(iy) ;FD CB 55 EE + set 5,a ;CB EF + set 5,b ;CB E8 + set 5,c ;CB E9 + set 5,d ;CB EA + set 5,e ;CB EB + set 5,h ;CB EC + set 5,l ;CB ED + set 6,(hl) ;CB F6 + set 6,offset(ix) ;DD CB 55 F6 + set 6,offset(iy) ;FD CB 55 F6 + set 6,a ;CB F7 + set 6,b ;CB F0 + set 6,c ;CB F1 + set 6,d ;CB F2 + set 6,e ;CB F3 + set 6,h ;CB F4 + set 6,l ;CB F5 + set 7,(hl) ;CB FE + set 7,offset(ix) ;DD CB 55 FE + set 7,offset(iy) ;FD CB 55 FE + set 7,a ;CB FF + set 7,b ;CB F8 + set 7,c ;CB F9 + set 7,d ;CB FA + set 7,e ;CB FB + set 7,h ;CB FC + set 7,l ;CB FD + ;*********************************************************** + ; shift operand left arithmetic + sla a,(hl) ;CB 26 + sla a,offset(ix) ;DD CB 55 26 + sla a,offset(iy) ;FD CB 55 26 + sla a,a ;CB 27 + sla a,b ;CB 20 + sla a,c ;CB 21 + sla a,d ;CB 22 + sla a,e ;CB 23 + sla a,h ;CB 24 + sla a,l ;CB 25 + ;*********************************************************** + ; shift operand right arithmetic + sra a,(hl) ;CB 2E + sra a,offset(ix) ;DD CB 55 2E + sra a,offset(iy) ;FD CB 55 2E + sra a,a ;CB 2F + sra a,b ;CB 28 + sra a,c ;CB 29 + sra a,d ;CB 2A + sra a,e ;CB 2B + sra a,h ;CB 2C + sra a,l ;CB 2D + ;*********************************************************** + ; shift operand right logical + srl a,(hl) ;CB 3E + srl a,offset(ix) ;DD CB 55 3E + srl a,offset(iy) ;FD CB 55 3E + srl a,a ;CB 3F + srl a,b ;CB 38 + srl a,c ;CB 39 + srl a,d ;CB 3A + srl a,e ;CB 3B + srl a,h ;CB 3C + srl a,l ;CB 3D + ;*********************************************************** + ; subtract operand from 'a' + sub a,(hl) ;96 + sub a,offset(ix) ;DD 96 55 + sub a,offset(iy) ;FD 96 55 + sub a,a ;97 + sub a,b ;90 + sub a,c ;91 + sub a,d ;92 + sub a,e ;93 + sub a,h ;94 + sub a,l ;95 + sub a,#n ;D6 20 + ;*********************************************************** + ; logical 'xor' operand with 'a' + xor a,(hl) ;AE + xor a,offset(ix) ;DD AE 55 + xor a,offset(iy) ;FD AE 55 + xor a,a ;AF + xor a,b ;A8 + xor a,c ;A9 + xor a,d ;AA + xor a,e ;AB + xor a,h ;AC + xor a,l ;AD + xor a,#n ;EE 20 + + .page + ;*********************************************************** + ; Hitachi HD64180 Codes + ;*********************************************************** + + .hd64 + + ;*********************************************************** + ; load register with input from port (n) + in0 a,(n) ;ED 38 20 + in0 b,(n) ;ED 00 20 + in0 c,(n) ;ED 08 20 + in0 d,(n) ;ED 10 20 + in0 e,(n) ;ED 18 20 + in0 h,(n) ;ED 20 20 + in0 l,(n) ;ED 28 20 + ;*********************************************************** + ; multiplication of each half + ; of the specified register pair + ; with the 16-bit result going to + ; the specified register pair + mlt bc ;ED 4C + mlt de ;ED 5C + mlt hl ;ED 6C + mlt sp ;ED 7C + ;*********************************************************** + ; load output port (c) with + ; location (hl), + ; decrement hl and b + ; decrement c + otdm ;ED 8B + ;*********************************************************** + ; load output port (c) with + ; location (hl), + ; decrement hl and c + ; decrement b + ; repeat until b = 0 + otdmr ;ED 9B + ;*********************************************************** + ; load output port (c) with + ; location (hl), + ; increment hl and b + ; decrement c + otim ;ED 83 + ;*********************************************************** + ; load output port (c) with + ; location (hl), + ; increment hl and c + ; decrement b + ; repeat until b = 0 + otimr ;ED 93 + ;*********************************************************** + ; load output port (n) from register + out0 (n),a ;ED 39 20 + out0 (n),b ;ED 01 20 + out0 (n),c ;ED 09 20 + out0 (n),d ;ED 11 20 + out0 (n),e ;ED 19 20 + out0 (n),h ;ED 21 20 + out0 (n),l ;ED 29 20 + ;*********************************************************** + ; enter sleep mode + slp ;ED 76 + ;*********************************************************** + ; non-destructive'and' with accumulator and specified operand + tst a ;ED 3C + tst b ;ED 04 + tst c ;ED 0C + tst d ;ED 14 + tst e ;ED 1C + tst h ;ED 24 + tst l ;ED 2C + tst #n ;ED 64 20 + tst (hl) ;ED 34 + ;*********************************************************** + ; non-destructive 'and' of n and the contents of port (c) + tstio #n ;ED 74 20 + ;*********************************************************** + diff --git a/as/z80/tz80l.asm b/as/z80/tz80l.asm new file mode 100644 index 0000000..aec2ba2 --- /dev/null +++ b/as/z80/tz80l.asm @@ -0,0 +1,47 @@ + .sbttl Assembler Link Tests + + .module tz80l + + ; This file and TCONST.ASM should be assembled and linked. + ; + ; ASZ80 -XGOL TZ80L + ; ASZ80 -XGOL TCONST + ; + ; ASLINK -C + ; -XMS + ; TZ80L + ; TCONST + ; -E + ; + ; The following tests verify the correct processing of + ; external references for the branches. + ; + ; *L signifies an error will be reported at link time. + + ; branch test must be first + + .area TEST (ABS,OVR) + + .blkb 0x7E ;bra1: + jr C,bra1 ; 38 00 [38 80] + .blkb 0x7F ;bra2: + jr C,bra2 ;*L 38 00 [38 7F] + jr C,bra3 ; 38 00 [38 7F] + .blkb 0x7F + .blkb 0x00 ;bra3: + jr C,bra4 ;*L 38 00 [38 [80] + .blkb 0x80 + .blkb 0x00 ;bra4: + + .blkb 0x7E ;bra5: + jr C,bra5 ; 38 00 [38 80] + .blkb 0x7F ;bra6: + jr C,bra6 ;*L 38 00 [38 7F] + jr C,bra7 ; 38 00 [38 7F] + .blkb 0x7F + .blkb 0x00 ;bra7: + jr C,bra8 ;*L 38 00 [38 [80] + .blkb 0x80 + .blkb 0x00 ;bra8: + + diff --git a/as/z80/z80.h b/as/z80/z80.h new file mode 100644 index 0000000..3255a81 --- /dev/null +++ b/as/z80/z80.h @@ -0,0 +1,198 @@ +/* z80.h + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * Extensions: P. Felber + */ + +/*)BUILD + $(PROGRAM) = ASZ80 + $(INCLUDE) = { + ASM.H + Z80.H + } + $(FILES) = { + Z80EXT.C + Z80MCH.C + Z80ADR.C + Z80PST.C + ASMAIN.C + ASLEX.C + ASSYM.C + ASSUBR.C + ASEXPR.C + ASDATA.C + ASLIST.C + ASOUT.C + } + $(STACK) = 2000 +*/ + +/* + * Indirect Addressing delimeters + */ +#define LFIND '(' +#define RTIND ')' + +/* + * Registers + */ +#define B 0 +#define C 1 +#define D 2 +#define E 3 +#define H 4 +#define L 5 +#define A 7 + +#define I 0107 +#define R 0117 + +#define BC 0 +#define DE 1 +#define HL 2 +#define SP 3 +#define AF 4 +#ifndef GAMEBOY +#define IX 5 +#define IY 6 +#else /* GAMEBOY */ +#define HLD 5 +#define HLI 6 +#endif /* GAMEBOY */ + +/* + * Conditional definitions + */ +#define NZ 0 +#define Z 1 +#define NC 2 +#define CS 3 +#ifndef GAMEBOY +#define PO 4 +#define PE 5 +#define P 6 +#define M 7 +#endif /* GAMEBOY */ + +/* + * Symbol types + */ +#define S_IMMED 30 +#define S_R8 31 +#define S_R8X 32 +#define S_R16 33 +#define S_R16X 34 +#define S_CND 35 +#define S_FLAG 36 + +/* + * Indexing modes + */ +#define S_INDB 40 +#define S_IDC 41 +#define S_INDR 50 +#define S_IDBC 50 +#define S_IDDE 51 +#define S_IDHL 52 +#define S_IDSP 53 +#ifndef GAMEBOY +#define S_IDIX 55 +#define S_IDIY 56 +#else /* GAMEBOY */ +#define S_IDHLD 55 +#define S_IDHLI 56 +#endif /* GAMEBOY */ +#define S_INDM 57 + +/* + * Instruction types + */ +#define S_LD 60 +#define S_CALL 61 +#define S_JP 62 +#define S_JR 63 +#define S_RET 64 +#define S_BIT 65 +#define S_INC 66 +#define S_DEC 67 +#define S_ADD 68 +#define S_ADC 69 +#define S_AND 70 +#ifndef GAMEBOY +#define S_EX 71 +#endif /* GAMEBOY */ +#define S_PUSH 72 +#ifndef GAMEBOY +#define S_IN 73 +#define S_OUT 74 +#endif /* GAMEBOY */ +#define S_RL 75 +#define S_RST 76 +#define S_IM 77 +#define S_INH1 78 +#ifndef GAMEBOY +#define S_INH2 79 +#define S_DJNZ 80 +#endif /* GAMEBOY */ +#define S_SUB 81 +#define S_SBC 82 +#ifdef GAMEBOY +#define S_STOP 83 +#define S_LDH 84 +#define S_LDA 85 +#define S_LDHL 86 +#endif /* GAMEBOY */ + +/* + * HD64180 Instructions + */ +#define X_HD64 90 +#define X_INH2 91 +#define X_IN 92 +#define X_OUT 93 +#define X_MLT 94 +#define X_TST 95 +#define X_TSTIO 96 + +struct adsym +{ + char a_str[4]; /* addressing string */ + int a_val; /* addressing mode value */ +}; + +extern struct adsym R8[]; +extern struct adsym R8X[]; +extern struct adsym R16[]; +extern struct adsym R16X[]; +extern struct adsym CND[]; + + /* machine dependent functions */ + + /* z80adr.c */ +extern int addr(); +extern int admode(); +extern int any(); +extern int srch(); + + /* z80mch.c */ +extern int comma(); +extern int genop(); +extern int gixiy(); +extern VOID minit(); +extern VOID machine(struct mne *mp) ; diff --git a/as/z80/z80adr.c b/as/z80/z80adr.c new file mode 100644 index 0000000..cc273c2 --- /dev/null +++ b/as/z80/z80adr.c @@ -0,0 +1,292 @@ +/* z80adr.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * Extensions: P. Felber + */ + +#include +#include +#include "asm.h" +#include "z80.h" + +/* + * Read an address specifier. Pack the + * address information into the supplied + * `expr' structure. Return the mode of + * the address. + * + * This addr(esp) routine performs the following addressing decoding: + * + * address mode flag addr base + * #n S_IMMED 0 n NULL + * label s_type ---- s_addr s_area + * [REG] S_IND+icode 0 0 NULL + * [label] S_INDM ---- s_addr s_area + * offset[REG] S_IND+icode ---- offset ---- + */ +int +addr(esp) +register struct expr *esp; +{ + register int c, mode = 0, indx; + + if ((c = getnb()) == '#') { + expr(esp, 0); + esp->e_mode = S_IMMED; + } else + if (c == LFIND) { + if ((indx = admode(R8)) != 0) { + mode = S_INDB; + } else + if ((indx = admode(R16)) != 0) { + mode = S_INDR; + } else + if ((indx = admode(R8X)) != 0) { + mode = S_R8X; + aerr(); + } else + if ((indx = admode(R16X)) != 0) { + mode = S_R16X; + aerr(); + } else { + expr(esp, 0); + esp->e_mode = S_INDM; + } + if (indx) { + esp->e_mode = (mode + indx)&0xFF; + esp->e_base.e_ap = NULL; + } + if ((c = getnb()) != RTIND) + qerr(); + } else { + unget(c); + if ((indx = admode(R8)) != 0) { + mode = S_R8; + } else + if ((indx = admode(R16)) != 0) { + mode = S_R16; + } else + if ((indx = admode(R8X)) != 0) { + mode = S_R8X; + } else + if ((indx = admode(R16X)) != 0) { + mode = S_R16X; + } else { + expr(esp, 0); + esp->e_mode = S_USER; + } + if (indx) { + esp->e_addr = indx&0xFF; + esp->e_mode = mode; + esp->e_base.e_ap = NULL; + } + if ((c = getnb()) == LFIND) { +#ifndef GAMEBOY + if ((indx=admode(R16))!=0 + && ((indx&0xFF)==IX || (indx&0xFF)==IY)) { +#else /* GAMEBOY */ + if ((indx=admode(R16))!=0) { +#endif /* GAMEBOY */ + esp->e_mode = S_INDR + (indx&0xFF); + } else { + aerr(); + } + if ((c = getnb()) != RTIND) + qerr(); + } else { + unget(c); + } + } + return (esp->e_mode); +} + +/* + * Enter admode() to search a specific addressing mode table + * for a match. Return the addressing value on a match or + * zero for no match. + */ +int +admode(sp) +register struct adsym *sp; +{ + register char *ptr; + register int i; + register const char *ips; + + ips = ip; + unget(getnb()); + + i = 0; + while ( *(ptr = (char *) &sp[i]) ) { + if (srch(ptr)) { + return(sp[i].a_val); + } + i++; + } + ip = ips; + return(0); +} + +/* + * srch --- does string match ? + */ +int +srch(str) +register char *str; +{ + register const char *ptr; + ptr = ip; + +#if CASE_SENSITIVE + while (*ptr && *str) { + if (*ptr != *str) + break; + ptr++; + str++; + } + if (*ptr == *str) { + ip = ptr; + return(1); + } +#else + while (*ptr && *str) { + if (ccase[(unsigned char)(*ptr)] != ccase[(unsigned char)(*str)]) + break; + ptr++; + str++; + } + if (ccase[(unsigned char)(*ptr)] == ccase[(unsigned char)(*str)]) { + ip = ptr; + return(1); + } +#endif + + if (!*str) + if (any(*ptr," \t\n,);")) { + ip = ptr; + return(1); + } + return(0); +} + +/* + * any --- does str contain c? + */ +int +any(c,str) +char c, *str; +{ + while (*str) + if(*str++ == c) + return(1); + return(0); +} + +/* + * Registers + */ + +struct adsym R8[] = { + { "b", B|0400 }, + { "c", C|0400 }, + { "d", D|0400 }, + { "e", E|0400 }, + { "h", H|0400 }, + { "l", L|0400 }, + { "a", A|0400 }, + { "B", B|0400 }, + { "C", C|0400 }, + { "D", D|0400 }, + { "E", E|0400 }, + { "H", H|0400 }, + { "L", L|0400 }, + { "A", A|0400 }, + { "", 000 } +}; + +struct adsym R8X[] = { + { "i", I|0400 }, + { "r", R|0400 }, + { "I", I|0400 }, + { "R", R|0400 }, + { "", 000 } +}; + +struct adsym R16[] = { + { "bc", BC|0400 }, + { "de", DE|0400 }, + { "hl", HL|0400 }, + { "sp", SP|0400 }, + { "BC", BC|0400 }, + { "DE", DE|0400 }, + { "HL", HL|0400 }, + { "SP", SP|0400 }, +#ifndef GAMEBOY + { "ix", IX|0400 }, + { "iy", IY|0400 }, + { "IX", IX|0400 }, + { "IY", IY|0400 }, +#else /* GAMEBOY */ + { "hl-", HLD|0400 }, + { "hl+", HLI|0400 }, + { "hld", HLD|0400 }, + { "hli", HLI|0400 }, + { "HL-", HLD|0400 }, + { "HL+", HLI|0400 }, + { "HLD", HLD|0400 }, + { "HLI", HLI|0400 }, +#endif /* GAMEBOY */ + { "", 000 } +}; + +struct adsym R16X[] = { + { "af", AF|0400 }, + { "AF", AF|0400 }, +#ifndef GAMEBOY + { "af'", AF|0400 }, + { "AF'", AF|0400 }, +#endif /* GAMEBOY */ + { "", 000 } +}; + +/* + * Conditional definitions + */ + +struct adsym CND[] = { + { "NZ", NZ|0400 }, + { "Z", Z |0400 }, + { "NC", NC|0400 }, + { "C", CS|0400 }, + { "nz", NZ|0400 }, + { "z", Z |0400 }, + { "nc", NC|0400 }, + { "c", CS|0400 }, +#ifndef GAMEBOY + { "PO", PO|0400 }, + { "PE", PE|0400 }, + { "P", P |0400 }, + { "M", M |0400 }, + { "po", PO|0400 }, + { "pe", PE|0400 }, + { "p", P |0400 }, + { "m", M |0400 }, +#endif /* GAMEBOY */ + { "", 000 } +}; diff --git a/as/z80/z80ext.c b/as/z80/z80ext.c new file mode 100644 index 0000000..118d4ad --- /dev/null +++ b/as/z80/z80ext.c @@ -0,0 +1,34 @@ +/* z80ext.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * Extensions: P. Felber + */ + +#include +#include +#include "asm.h" +#include "z80.h" + +#ifndef GAMEBOY +char *cpu = "Zilog Z80 / Hitachi HD64180"; +#else /* GAMEBOY */ +char *cpu = "GameBoy Z80-like CPU"; +#endif /* GAMEBOY */ +int hilo = 0; +char *dsft = "ASM"; diff --git a/as/z80/z80mch.c b/as/z80/z80mch.c new file mode 100644 index 0000000..fe99901 --- /dev/null +++ b/as/z80/z80mch.c @@ -0,0 +1,789 @@ +/* z80mch.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * Extensions: P. Felber + */ + +#include +#include +#include "asm.h" +#include "z80.h" + +char imtab[3] = { 0x46, 0x56, 0x5E }; +#ifndef GAMEBOY +int hd64; +#endif /* GAMEBOY */ + +/* + * Process a machine op. + */ +VOID +machine(mp) +struct mne *mp; +{ + register int op, t1, t2; + struct expr e1, e2; + int rf, v1, v2; + + clrexpr(&e1); + clrexpr(&e2); + op = mp->m_valu; + rf = mp->m_type; +#ifndef GAMEBOY + if (!hd64 && rf>X_HD64) + rf = 0; +#endif /* GAMEBOY */ + switch (rf) { + + case S_INH1: + outab(op); + break; + +#ifndef GAMEBOY + case S_INH2: + outab(0xED); + outab(op); + break; +#endif /* GAMEBOY */ + + case S_RET: + if (more()) { + if ((v1 = admode(CND)) != 0) { + outab(op | v1<<3); + } else { + qerr(); + } + } else { + outab(0xC9); + } + break; + + case S_PUSH: + if (admode(R16X)) { + outab(op+0x30); + break; + } else + if ((v1 = admode(R16)) != 0 && (v1 &= 0xFF) != SP) { + if (v1 != gixiy(v1)) { + outab(op+0x20); + break; + } + outab(op | v1<<4); + break; + } + aerr(); + break; + + case S_RST: + v1 = absexpr(); + if (v1 & ~0x38) { + aerr(); + v1 = 0; + } + outab(op|v1); + break; + + case S_IM: + expr(&e1, 0); + abscheck(&e1); + if (e1.e_addr > 2) { + aerr(); + e1.e_addr = 0; + } + outab(op); + outab(imtab[e1.e_addr]); + break; + + case S_BIT: + expr(&e1, 0); + t1 = 0; + v1 = e1.e_addr; + if (v1 > 7) { + ++t1; + v1 &= 0x07; + } + op |= (v1<<3); + comma(); + addr(&e2); + abscheck(&e1); + if (genop(0xCB, op, &e2, 0) || t1) + aerr(); + break; + + case S_RL: + t1 = 0; + t2 = addr(&e2); + if (more()) { + if ((t2 != S_R8) || (e2.e_addr != A)) + ++t1; + comma(); + clrexpr(&e2); + t2 = addr(&e2); + } + if (genop(0xCB, op, &e2, 0) || t1) + aerr(); + break; + + case S_AND: + case S_SUB: + t1 = 0; + t2 = addr(&e2); + if (more()) { + if ((t2 != S_R8) || (e2.e_addr != A)) + ++t1; + comma(); + clrexpr(&e2); + t2 = addr(&e2); + } + if (genop(0, op, &e2, 1) || t1) + aerr(); + break; + + case S_ADD: + case S_ADC: + case S_SBC: + t1 = addr(&e1); + t2 = 0; + if (more()) { + comma(); + t2 = addr(&e2); + } + if (t2 == 0) { + if (genop(0, op, &e1, 1)) + aerr(); + break; + } + if ((t1 == S_R8) && (e1.e_addr == A)) { + if (genop(0, op, &e2, 1)) + aerr(); + break; + } + if ((t1 == S_R16) && (t2 == S_R16)) { +#ifndef GAMEBOY + if (rf == S_ADD) + op = 0x09; + if (rf == S_ADC) + op = 0x4A; + if (rf == S_SBC) + op = 0x42; + v1 = e1.e_addr; + v2 = e2.e_addr; + if ((v1 == HL) && (v2 <= SP)) { + if (rf != S_ADD) + outab(0xED); + outab(op | (v2<<4)); + break; + } + if (rf != S_ADD) { + aerr(); + break; + } + if ((v1 == IX) && (v2 != HL) && (v2 != IY)) { + if (v2 == IX) + v2 = HL; + outab(0xDD); + outab(op | (v2<<4)); + break; + } + if ((v1 == IY) && (v2 != HL) && (v2 != IX)) { + if (v2 == IY) + v2 = HL; + outab(0xFD); + outab(op | (v2<<4)); + break; + } + } +#else /* GAMEBOY */ + v1 = e1.e_addr; + v2 = e2.e_addr; + if ((v1 == HL) && (v2 <= SP) && (rf == S_ADD)) { + outab(0x09 | (v2<<4)); + break; + } + } + /* + * 0xE8 : ADD SP,#n + */ + if ((rf == S_ADD) && (t1 == S_R16) && (e1.e_addr == SP) && (t2 == S_IMMED)) { + outab(0xE8); + outrb(&e2,0); + break; + } +#endif /* GAMEBOY */ + aerr(); + break; + + case S_LD: + t1 = addr(&e1); + comma(); + t2 = addr(&e2); + if (t1 == S_R8) { + v1 = op | e1.e_addr<<3; + if (genop(0, v1, &e2, 0) == 0) + break; + if (t2 == S_IMMED) { + outab(e1.e_addr<<3 | 0x06); + outrb(&e2,0); + break; + } + } + v1 = e1.e_addr; + v2 = e2.e_addr; + if ((t1 == S_R16) && (t2 == S_IMMED)) { + v1 = gixiy(v1); + outab(0x01|v1<<4); + outrw(&e2, 0); + break; + } +#ifndef GAMEBOY + if ((t1 == S_R16) && (t2 == S_INDM)) { + if (gixiy(v1) == HL) { + outab(0x2A); + } else { + outab(0xED); + outab(0x4B | v1<<4); + } + outrw(&e2, 0); + break; + } + if ((t1 == S_INDM) && (t2 == S_R16)) { + if (gixiy(v2) == HL) { + outab(0x22); + } else { + outab(0xED); + outab(0x43 | v2<<4); + } + outrw(&e1, 0); + break; + } + if ((t1 == S_R8) && (v1 == A) && (t2 == S_INDM)) { + outab(0x3A); + outrw(&e2, 0); + break; + } + if ((t1 == S_INDM) && (t2 == S_R8) && (v2 == A)) { + outab(0x32); + outrw(&e1, 0); + break; + } +#endif /* GAMEBOY */ + if ((t2 == S_R8) && (gixiy(t1) == S_IDHL)) { + outab(0x70|v2); + if (t1 != S_IDHL) + outrb(&e1, 0); + break; + } + if ((t2 == S_IMMED) && (gixiy(t1) == S_IDHL)) { + outab(0x36); + if (t1 != S_IDHL) + outrb(&e1, 0); + outrb(&e2, 0); + break; + } +#ifndef GAMEBOY + if ((t1 == S_R8X) && (t2 == S_R8) && (v2 == A)) { + outab(0xED); + outab(v1); + break; + } + if ((t1 == S_R8) && (v1 == A) && (t2 == S_R8X)) { + outab(0xED); + outab(v2|0x10); + break; + } +#endif /* GAMEBOY */ + if ((t1 == S_R16) && (v1 == SP)) { + if ((t2 == S_R16) && (gixiy(v2) == HL)) { + outab(0xF9); + break; + } + } + if ((t1 == S_R8) && (v1 == A)) { + if ((t2 == S_IDBC) || (t2 == S_IDDE)) { + outab(0x0A | (t2-S_INDR)<<4); + break; + } + } + if ((t2 == S_R8) && (v2 == A)) { + if ((t1 == S_IDBC) || (t1 == S_IDDE)) { + outab(0x02 | (t1-S_INDR)<<4); + break; + } + } +#ifdef GAMEBOY + /* + * 0x08 : LD (nn),SP + */ + if ((t1 == S_INDM) && (t2 == S_R16) && (v2 == SP)) { + outab(0x08); + outrw(&e1, 0); + break; + } + /* + * 0xEA : LD (nn),A + * 0xFA : LD A,(nn) + */ + if ((t1 == S_INDM) && (t2 == S_R8) && (v2 == A)) { + outab(0xEA); + outrw(&e1, 0); + break; + } + if ((t2 == S_INDM) && (t1 == S_R8) && (v1 == A)) { + outab(0xFA); + outrw(&e2, 0); + break; + } + /* + * 0x32 : LD (HL-),A + * 0x3A : LD A,(HL-) + */ + if ((t1 == S_R8) && (v1 == A) && (t2 == S_IDHLD)) { + outab(0x3A); + break; + } + if ((t2 == S_R8) && (v2 == A) && (t1 == S_IDHLD)) { + outab(0x32); + break; + } + /* + * 0x22 : LD (HL+),A + * 0x2A : LD A,(HL+) + */ + if ((t1 == S_R8) && (v1 == A) && (t2 == S_IDHLI)) { + outab(0x2A); + break; + } + if ((t2 == S_R8) && (v2 == A) && (t1 == S_IDHLI)) { + outab(0x22); + break; + } +#endif /* GAMEBOY */ + aerr(); + break; + + +#ifdef GAMEBOY + case S_STOP: /* 0x10 */ + /* + * 0x10 : STOP + */ + outab(op); + outab(0x00); + break; + + + case S_LDH: /* 0xE0 */ + /* + * 0xE0 : LDH (n),A = LD ($FF00+n),A + * 0xE2 : LDH (C),A = LD ($FF00+C),A + * 0xF0 : LDH A,(n) = LD A,($FF00+n) + * 0xF2 : LDH A,(C) = LD A,($FF00+C) + */ + t1 = addr(&e1); + comma(); + t2 = addr(&e2); + if ((t1 == S_INDM) && (t2 == S_R8) && (e2.e_addr == A)) { + outab(0xE0); + outrb(&e1, 0); + break; + } + if ((t1 == S_IDC) && (t2 == S_R8) && (e2.e_addr == A)) { + outab(0xE2); + break; + } + if ((t2 == S_INDM) && (t1 == S_R8) && (e1.e_addr == A)) { + outab(0xF0); + outrb(&e2, 0); + break; + } + if ((t2 == S_IDC) && (t1 == S_R8) && (e1.e_addr == A)) { + outab(0xF2); + break; + } + aerr(); + break; + + + case S_LDA: /* 0xE8 */ + /* + * 0xE8 : LDA SP,#n(SP) + * 0xF8 : LDA HL,#n(SP) + */ + t1 = addr(&e1); + comma(); + t2 = addr(&e2); + if ((t1 == S_R16) && (e1.e_addr == SP) && (t2 == S_INDR+SP)) { + outab(0xE8); + outrb(&e2,0); + break; + } + if ((t1 == S_R16) && (e1.e_addr == HL) && (t2 == S_INDR+SP)) { + outab(0xF8); + outrb(&e2,0); + break; + } + aerr(); + break; + + + case S_LDHL: /* 0xF8 */ + /* + * 0xF8 : LDHL SP,#n + */ + t1 = addr(&e1); + comma(); + t2 = addr(&e2); + if ((t1 == S_R16) && (e1.e_addr == SP) && (t2 == S_IMMED)) { + outab(0xF8); + outrb(&e2,0); + break; + } + aerr(); + break; +#endif /* GAMEBOY */ + + +#ifndef GAMEBOY + case S_EX: + t1 = addr(&e1); + comma(); + t2 = addr(&e2); + if (t2 == S_R16) { + v1 = e1.e_addr; + v2 = e2.e_addr; + if ((t1 == S_IDSP) && (v1 == 0)) { + if (gixiy(v2) == HL) { + outab(op); + break; + } + } + if (t1 == S_R16) { + if ((v1 == DE) && (v2 == HL)) { + outab(0xEB); + break; + } + } + } + if ((t1 == S_R16X) && (t2 == S_R16X)) { + outab(0x08); + break; + } + aerr(); + break; + + case S_IN: + case S_OUT: + if (rf == S_IN) { + t1 = addr(&e1); + comma(); + t2 = addr(&e2); + } else { + t2 = addr(&e2); + comma(); + t1 = addr(&e1); + } + v1 = e1.e_addr; + v2 = e2.e_addr; + if (t1 == S_R8) { + if ((v1 == A) && (t2 == S_INDM)) { + outab(op); + outab(v2); + break; + } + if (t2 == S_IDC) { + outab(0xED); + outab(((rf == S_IN) ? 0x40 : 0x41) + (v1<<3)); + break; + } + } + aerr(); + break; +#endif /* GAMEBOY */ + + case S_DEC: + case S_INC: + t1 = addr(&e1); + v1 = e1.e_addr; + if (t1 == S_R8) { + outab(op|(v1<<3)); + break; + } + if (t1 == S_IDHL) { + outab(op|0x30); + break; + } + if (t1 != gixiy(t1)) { + outab(op|0x30); + outrb(&e1,0); + break; + } + if (t1 == S_R16) { + v1 = gixiy(v1); + if (rf == S_INC) { + outab(0x03|(v1<<4)); + break; + } + if (rf == S_DEC) { + outab(0x0B|(v1<<4)); + break; + } + } + aerr(); + break; + +#ifndef GAMEBOY + case S_DJNZ: + case S_JR: + if ((v1 = admode(CND)) != 0 && rf != S_DJNZ) { + if ((v1 &= 0xFF) <= 0x03) { + op += (v1+1)<<3; + } else { + aerr(); + } + comma(); + } +#else /* GAMEBOY */ + case S_JR: + if ((v1 = admode(CND)) != 0) { + if ((v1 &= 0xFF) <= 0x18) { + op += (v1+1)<<3; + } else { + aerr(); + } + comma(); + } +#endif /* GAMEBOY */ + expr(&e2, 0); + outab(op); + if (e2.e_base.e_ap == NULL || e2.e_base.e_ap == dot.s_area) { + v2 = e2.e_addr - dot.s_addr - 1; + if (pass == 2 && ((v2 < -128) || (v2 > 127))) + aerr(); + outab(v2); + } else { + outrb(&e2, R_PCR); + } + if (e2.e_mode != S_USER) + rerr(); + break; + + case S_CALL: + if ((v1 = admode(CND)) != 0) { + op |= (v1&0xFF)<<3; + comma(); + } else { + op = 0xCD; + } + expr(&e1, 0); + outab(op); + outrw(&e1, 0); + break; + + case S_JP: + if ((v1 = admode(CND)) != 0) { + op |= (v1&0xFF)<<3; + comma(); + expr(&e1, 0); + outab(op); + outrw(&e1, 0); + break; + } + t1 = addr(&e1); + if (t1 == S_USER) { + outab(0xC3); + outrw(&e1, 0); + break; + } + if ((e1.e_addr == 0) && (gixiy(t1) == S_IDHL)) { + outab(0xE9); + break; + } + aerr(); + break; + +#ifndef GAMEBOY + case X_HD64: + ++hd64; + break; + + case X_INH2: + outab(0xED); + outab(op); + break; + + case X_IN: + case X_OUT: + if (rf == X_IN) { + t1 = addr(&e1); + comma(); + t2 = addr(&e2); + } else { + t2 = addr(&e2); + comma(); + t1 = addr(&e1); + } + if ((t1 == S_R8) && (t2 == S_INDM)) { + outab(0xED); + outab(op | e1.e_addr<<3); + outrb(&e2, 0); + break; + } + aerr(); + break; + + case X_MLT: + t1 = addr(&e1); + if ((t1 == S_R16) && ((v1 = e1.e_addr) <= SP)) { + outab(0xED); + outab(op | v1<<4); + break; + } + aerr(); + break; + + case X_TST: + t1 = addr(&e1); + if (t1 == S_R8) { + outab(0xED); + outab(op | e1.e_addr<<3); + break; + } + if (t1 == S_IDHL) { + outab(0xED); + outab(0x34); + break; + } + if (t1 == S_IMMED) { + outab(0xED); + outab(0x64); + outrb(&e1, 0); + break; + } + aerr(); + break; + + case X_TSTIO: + t1 = addr(&e1); + if (t1 == S_IMMED) { + outab(0xED); + outab(op); + outrb(&e1, 0); + break; + } + aerr(); + break; +#endif /* GAMEBOY */ + + default: + err('o'); + } +} + +/* + * general addressing evaluation + * return(0) if general addressing mode output, else + * return(esp->e_mode) + */ +int +genop(pop, op, esp, f) +register int pop, op; +register struct expr *esp; +int f; +{ + register int t1; + if ((t1 = esp->e_mode) == S_R8) { + if (pop) + outab(pop); + outab(op|esp->e_addr); + return(0); + } + if (t1 == S_IDHL) { + if (pop) + outab(pop); + outab(op|0x06); + return(0); + } + if (gixiy(t1) == S_IDHL) { + if (pop) { + outab(pop); + outrb(esp,0); + outab(op|0x06); + } else { + outab(op|0x06); + outrb(esp,0); + } + return(0); + } + if ((t1 == S_IMMED) && (f)) { + if (pop) + outab(pop); + outab(op|0x46); + outrb(esp,0); + return(0); + } + return(t1); +} + +/* + * IX and IY prebyte check + */ +int +gixiy(v) +int v; +{ +#ifndef GAMEBOY + if (v == IX) { + v = HL; + outab(0xDD); + } else if (v == IY) { + v = HL; + outab(0xFD); + } else if (v == S_IDIX) { + v = S_IDHL; + outab(0xDD); + } else if (v == S_IDIY) { + v = S_IDHL; + outab(0xFD); + } +#endif /* GAMEBOY */ + return(v); +} + +/* + * The next character must be a + * comma. + */ +int +comma() +{ + if (getnb() != ',') + qerr(); + return(1); +} + +/* + * Machine dependent initialization + */ +VOID +minit() +{ +#ifndef GAMEBOY + hd64 = 0; +#endif /* GAMEBOY */ +} diff --git a/as/z80/z80pst.c b/as/z80/z80pst.c new file mode 100644 index 0000000..1c4b431 --- /dev/null +++ b/as/z80/z80pst.c @@ -0,0 +1,187 @@ +/* z80pst.c + + Copyright (C) 1989-1995 Alan R. Baldwin + 721 Berkeley St., Kent, Ohio 44240 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . */ + +/* + * Extensions: P. Felber + */ + +#include +#include +#include "asm.h" +#include "z80.h" + +struct mne mne[] = { + + /* machine */ + + /* system */ + + { NULL, "CON", S_ATYP, 0, A_CON }, + { NULL, "OVR", S_ATYP, 0, A_OVR }, + { NULL, "REL", S_ATYP, 0, A_REL }, + { NULL, "ABS", S_ATYP, 0, A_ABS }, + { NULL, "NOPAG", S_ATYP, 0, A_NOPAG }, + { NULL, "PAG", S_ATYP, 0, A_PAG }, + + { NULL, ".byte", S_BYTE, 0, 0 }, + { NULL, ".db", S_BYTE, 0, 0 }, + { NULL, ".word", S_WORD, 0, 0 }, + { NULL, ".dw", S_WORD, 0, 0 }, + { NULL, ".df", S_FLOAT, 0, 0 }, + { NULL, ".ascii", S_ASCII, 0, 0 }, + { NULL, ".asciz", S_ASCIZ, 0, 0 }, + { NULL, ".blkb", S_BLK, 0, 1 }, + { NULL, ".ds", S_BLK, 0, 1 }, + { NULL, ".blkw", S_BLK, 0, 2 }, + { NULL, ".page", S_PAGE, 0, 0 }, + { NULL, ".title", S_TITLE, 0, 0 }, + { NULL, ".sbttl", S_SBTL, 0, 0 }, + { NULL, ".globl", S_GLOBL, 0, 0 }, + { NULL, ".area", S_DAREA, 0, 0 }, + { NULL, ".even", S_EVEN, 0, 0 }, + { NULL, ".odd", S_ODD, 0, 0 }, + { NULL, ".if", S_IF, 0, 0 }, + { NULL, ".else", S_ELSE, 0, 0 }, + { NULL, ".endif", S_ENDIF, 0, 0 }, + { NULL, ".include", S_INCL, 0, 0 }, + { NULL, ".radix", S_RADIX, 0, 0 }, + { NULL, ".org", S_ORG, 0, 0 }, + { NULL, ".module", S_MODUL, 0, 0 }, + { NULL, ".ascis", S_ASCIS, 0, 0 }, + { NULL, ".optsdcc", S_OPTSDCC, 0, 0 }, + + /* z80 / hd64180 */ + + { NULL, "ld", S_LD, 0, 0x40 }, + + { NULL, "call", S_CALL, 0, 0xC4 }, + { NULL, "jp", S_JP, 0, 0xC2 }, + { NULL, "jr", S_JR, 0, 0x18 }, +#ifndef GAMEBOY + { NULL, "djnz", S_DJNZ, 0, 0x10 }, +#endif /* GAMEBOY */ + { NULL, "ret", S_RET, 0, 0xC0 }, + + { NULL, "bit", S_BIT, 0, 0x40 }, + { NULL, "res", S_BIT, 0, 0x80 }, + { NULL, "set", S_BIT, 0, 0xC0 }, + + { NULL, "inc", S_INC, 0, 0x04 }, + { NULL, "dec", S_DEC, 0, 0x05 }, + + { NULL, "add", S_ADD, 0, 0x80 }, + { NULL, "adc", S_ADC, 0, 0x88 }, + { NULL, "sub", S_SUB, 0, 0x90 }, + { NULL, "sbc", S_SBC, 0, 0x98 }, + + { NULL, "and", S_AND, 0, 0xA0 }, + { NULL, "cp", S_AND, 0, 0xB8 }, + { NULL, "or", S_AND, 0, 0xB0 }, + { NULL, "xor", S_AND, 0, 0xA8 }, + +#ifndef GAMEBOY + { NULL, "ex", S_EX, 0, 0xE3 }, +#endif /* GAMEBOY */ + + { NULL, "push", S_PUSH, 0, 0xC5 }, + { NULL, "pop", S_PUSH, 0, 0xC1 }, + +#ifndef GAMEBOY + { NULL, "in", S_IN, 0, 0xDB }, + { NULL, "out", S_OUT, 0, 0xD3 }, +#endif /* GAMEBOY */ + + { NULL, "rl", S_RL, 0, 0x10 }, + { NULL, "rlc", S_RL, 0, 0x00 }, + { NULL, "rr", S_RL, 0, 0x18 }, + { NULL, "rrc", S_RL, 0, 0x08 }, + { NULL, "sla", S_RL, 0, 0x20 }, + { NULL, "sra", S_RL, 0, 0x28 }, + { NULL, "srl", S_RL, 0, 0x38 }, + + { NULL, "rst", S_RST, 0, 0xC7 }, + +#ifndef GAMEBOY + { NULL, "im", S_IM, 0, 0xED }, +#endif /* GAMEBOY */ + + { NULL, "ccf", S_INH1, 0, 0x3F }, + { NULL, "cpl", S_INH1, 0, 0x2F }, + { NULL, "daa", S_INH1, 0, 0x27 }, + { NULL, "di", S_INH1, 0, 0xF3 }, + { NULL, "ei", S_INH1, 0, 0xFB }, +#ifndef GAMEBOY + { NULL, "exx", S_INH1, 0, 0xD9 }, +#endif /* GAMEBOY */ + { NULL, "nop", S_INH1, 0, 0x00 }, + { NULL, "halt", S_INH1, 0, 0x76 }, + { NULL, "rla", S_INH1, 0, 0x17 }, + { NULL, "rlca", S_INH1, 0, 0x07 }, + { NULL, "rra", S_INH1, 0, 0x1F }, + { NULL, "rrca", S_INH1, 0, 0x0F }, + { NULL, "scf", S_INH1, 0, 0x37 }, + +#ifndef GAMEBOY + { NULL, "cpd", S_INH2, 0, 0xA9 }, + { NULL, "cpdr", S_INH2, 0, 0xB9 }, + { NULL, "cpi", S_INH2, 0, 0xA1 }, + { NULL, "cpir", S_INH2, 0, 0xB1 }, + { NULL, "ind", S_INH2, 0, 0xAA }, + { NULL, "indr", S_INH2, 0, 0xBA }, + { NULL, "ini", S_INH2, 0, 0xA2 }, + { NULL, "inir", S_INH2, 0, 0xB2 }, + { NULL, "ldd", S_INH2, 0, 0xA8 }, + { NULL, "lddr", S_INH2, 0, 0xB8 }, + { NULL, "ldi", S_INH2, 0, 0xA0 }, + { NULL, "ldir", S_INH2, 0, 0xB0 }, + { NULL, "neg", S_INH2, 0, 0x44 }, + { NULL, "otdr", S_INH2, 0, 0xBB }, + { NULL, "otir", S_INH2, 0, 0xB3 }, + { NULL, "outd", S_INH2, 0, 0xAB }, + { NULL, "outi", S_INH2, 0, 0xA3 }, + { NULL, "reti", S_INH2, 0, 0x4D }, + { NULL, "retn", S_INH2, 0, 0x45 }, + { NULL, "rld", S_INH2, 0, 0x6F }, + { NULL, "rrd", S_INH2, 0, 0x67 }, + + /* 64180 */ + + { NULL, ".hd64", X_HD64, 0, 0 }, + + { NULL, "otdm", X_INH2, 0, 0x8B }, + { NULL, "otdmr", X_INH2, 0, 0x9B }, + { NULL, "otim", X_INH2, 0, 0x83 }, + { NULL, "otimr", X_INH2, 0, 0x93 }, + { NULL, "slp", X_INH2, 0, 0x76 }, + + { NULL, "in0", X_IN, 0, 0x00 }, + { NULL, "out0", X_OUT, 0, 0x01 }, + + { NULL, "mlt", X_MLT, 0, 0x4C }, + + { NULL, "tst", X_TST, 0, 0x04 }, + { NULL, "tstio", X_TSTIO, S_END, 0x7 } +#else /* GAMEBOY */ + { NULL, "stop", S_STOP, 0, 0x10 }, + { NULL, "swap", S_RL, 0, 0x30 }, + { NULL, "reti", S_INH1, 0, 0xD9 }, + { NULL, "ldh", S_LDH, 0, 0xE0 }, + { NULL, "lda", S_LDA, 0, 0xE8 }, + { NULL, "ldhl", S_LDHL, S_END, 0xF } +#endif /* GAMEBOY */ +}; diff --git a/bin/README b/bin/README new file mode 100644 index 0000000..9273d97 --- /dev/null +++ b/bin/README @@ -0,0 +1,4 @@ +sdcc/bin +-------- + +Where binary files end up. diff --git a/clean.mk b/clean.mk new file mode 100644 index 0000000..bd9f607 --- /dev/null +++ b/clean.mk @@ -0,0 +1,23 @@ +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + cd bin && for name in *; do if [ -f $$name -a $$name != README ]; then rm $$name; fi; done + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f config.cache config.log config.status Makefile Makefile.common + rm -f sdccconf.h main.mk *.dep + rm -f ports.all ports.build + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean diff --git a/conf.mk b/conf.mk new file mode 100644 index 0000000..b7d8f08 --- /dev/null +++ b/conf.mk @@ -0,0 +1,16 @@ +# +# Makefile targets to remake configuration +# + +freshconf: $(srcdir)/configure main.mk + +$(srcdir)/configure: $(srcdir)/configure.in + cd $(srcdir) && $(SHELL) autoconf + +main.mk: $(srcdir)/main_in.mk $(srcdir)/configure.in + $(SHELL) ./config.status + +config.status: $(srcdir)/configure + $(SHELL) ./config.status --recheck + +# End of conf.mk diff --git a/config.dsp b/config.dsp new file mode 100644 index 0000000..2d30ad4 --- /dev/null +++ b/config.dsp @@ -0,0 +1,154 @@ +# Microsoft Developer Studio Project File - Name="config" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Generic Project" 0x010a + +CFG=config - Win32 Debug +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "config.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. 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See below for descriptions of some of the useful variables. + +Defaults for the options are specified in brackets. + +Configuration: + -h, --help display this help and exit + --help=short display options specific to this package + --help=recursive display the short help of all the included packages + -V, --version display version information and exit + -q, --quiet, --silent do not print \`checking...' messages + --cache-file=FILE cache test results in FILE [disabled] + -C, --config-cache alias for \`--cache-file=config.cache' + -n, --no-create do not create output files + --srcdir=DIR find the sources in DIR [configure dir or \`..'] + +Installation directories: + --prefix=PREFIX install architecture-independent files in PREFIX + [$ac_default_prefix] + --exec-prefix=EPREFIX install architecture-dependent files in EPREFIX + [PREFIX] + +By default, \`make install' will install all the files in +\`$ac_default_prefix/bin', \`$ac_default_prefix/lib' etc. You can specify +an installation prefix other than \`$ac_default_prefix' using \`--prefix', +for instance \`--prefix=\$HOME'. + +For better control, use the options below. + +Fine tuning of the installation directories: + --bindir=DIR user executables [EPREFIX/bin] + --sbindir=DIR system admin executables [EPREFIX/sbin] + --libexecdir=DIR program executables [EPREFIX/libexec] + --sysconfdir=DIR read-only single-machine data [PREFIX/etc] + --sharedstatedir=DIR modifiable architecture-independent data [PREFIX/com] + --localstatedir=DIR modifiable single-machine data [PREFIX/var] + --libdir=DIR object code libraries [EPREFIX/lib] + --includedir=DIR C header files [PREFIX/include] + --oldincludedir=DIR C header files for non-gcc [/usr/include] + --datarootdir=DIR read-only arch.-independent data root [PREFIX/share] + --datadir=DIR read-only architecture-independent data [DATAROOTDIR] + --infodir=DIR info documentation [DATAROOTDIR/info] + --localedir=DIR locale-dependent data [DATAROOTDIR/locale] + --mandir=DIR man documentation [DATAROOTDIR/man] + --docdir=DIR documentation root [DATAROOTDIR/doc/PACKAGE] + --htmldir=DIR html documentation [DOCDIR] + --dvidir=DIR dvi documentation [DOCDIR] + --pdfdir=DIR pdf documentation [DOCDIR] + --psdir=DIR ps documentation [DOCDIR] +_ACEOF + + cat <<\_ACEOF + +Program names: + --program-prefix=PREFIX prepend PREFIX to installed program names + --program-suffix=SUFFIX append SUFFIX to installed program names + --program-transform-name=PROGRAM run sed PROGRAM on installed program names +_ACEOF +fi + +if test -n "$ac_init_help"; then + + cat <<\_ACEOF + +Optional Features: + --disable-option-checking ignore unrecognized --enable/--with options + --disable-FEATURE do not include FEATURE (same as --enable-FEATURE=no) + --enable-FEATURE[=ARG] include FEATURE [ARG=yes] + --disable-mcs51-port Excludes the Intel mcs51 port + --disable-gbz80-port Excludes the Gameboy gbz80 port + --disable-z80-port Excludes the z80 port + --disable-avr-port Excludes the AVR port + --disable-ds390-port Excludes the DS390 port + --disable-ds400-port Excludes the DS400 port + --disable-pic-port Excludes the PIC port + --disable-pic16-port Excludes the PIC16 port + --disable-xa51-port Excludes the XA51 port + --disable-hc08-port Excludes the HC08 port + --disable-ucsim Disables configuring and building of ucsim + --disable-device-lib Disables building device libraries + --disable-packihx Disables building packihx + --disable-sdcpp Disables building sdcpp + --disable-sdcdb Disables building sdcdb + --enable-doc Enables building the documentation + --enable-libgc Use the Bohem memory allocator. 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" >&6; } +if test "${ac_cv_prog_AWK+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$AWK"; then + ac_cv_prog_AWK="$AWK" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_AWK="$ac_prog" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +AWK=$ac_cv_prog_AWK +if test -n "$AWK"; then + { $as_echo "$as_me:$LINENO: result: $AWK" >&5 +$as_echo "$AWK" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$AWK" && break +done + + +{ $as_echo "$as_me:$LINENO: checking version of the package" >&5 +$as_echo_n "checking version of the package... " >&6; } +if test -f ${srcdir}/.version; then + { read VERSION; } < ${srcdir}/.version + { $as_echo "$as_me:$LINENO: result: $VERSION" >&5 +$as_echo "$VERSION" >&6; } +elif test -f ../.version; then + { read VERSION; } < ../.version + { $as_echo "$as_me:$LINENO: result: $VERSION" >&5 +$as_echo "$VERSION" >&6; } +else + VERSION="0.0.0" + { $as_echo "$as_me:$LINENO: result: unknown using 0.0.0" >&5 +$as_echo "unknown using 0.0.0" >&6; } +fi +VERSIONHI=`echo $VERSION|$AWK 'BEGIN {FS="."} {print $1}'` +VERSIONLO=`echo $VERSION|$AWK 'BEGIN {FS="."} {print $2}'` +VERSIONP=`echo $VERSION|$AWK 'BEGIN {FS="."} {print $3}'` + +PACKAGE=sdcc + + + + + +cat >>confdefs.h <<_ACEOF +#define SDCC_VERSION_LO ${VERSIONLO} +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define SDCC_VERSION_HI ${VERSIONHI} +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define SDCC_VERSION_P ${VERSIONP} +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define SDCC_VERSION_STR "${VERSION}" +_ACEOF + +test "$program_prefix" != NONE && + program_transform_name="s&^&$program_prefix&;$program_transform_name" +# Use a double $ so make ignores it. +test "$program_suffix" != NONE && + program_transform_name="s&\$&$program_suffix&;$program_transform_name" +# Double any \ or $. +# By default was `s,x,x', remove it if useless. +ac_script='s/[\\$]/&&/g;s/;s,x,x,$//' +program_transform_name=`$as_echo "$program_transform_name" | sed "$ac_script"` + +sdcc_cv_version=$VERSION +sdcc_cv_versionhi=$VERSIONHI +sdcc_cv_versionlo=$VERSIONLO +sdcc_cv_versionp=$VERSIONP + + +# Required programs +# =========================================================================== +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}gcc", so it can be a program name with args. +set dummy ${ac_tool_prefix}gcc; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="${ac_tool_prefix}gcc" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { $as_echo "$as_me:$LINENO: result: $CC" >&5 +$as_echo "$CC" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_CC"; then + ac_ct_CC=$CC + # Extract the first word of "gcc", so it can be a program name with args. +set dummy gcc; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_ac_ct_CC+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_CC="gcc" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { $as_echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 +$as_echo "$ac_ct_CC" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:$LINENO: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +else + CC="$ac_cv_prog_CC" +fi + +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}cc", so it can be a program name with args. +set dummy ${ac_tool_prefix}cc; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="${ac_tool_prefix}cc" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { $as_echo "$as_me:$LINENO: result: $CC" >&5 +$as_echo "$CC" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + + fi +fi +if test -z "$CC"; then + # Extract the first word of "cc", so it can be a program name with args. +set dummy cc; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else + ac_prog_rejected=no +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then + ac_prog_rejected=yes + continue + fi + ac_cv_prog_CC="cc" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +if test $ac_prog_rejected = yes; then + # We found a bogon in the path, so make sure we never use it. + set dummy $ac_cv_prog_CC + shift + if test $# != 0; then + # We chose a different compiler from the bogus one. + # However, it has the same basename, so the bogon will be chosen + # first if we set CC to just the basename; use the full file name. + shift + ac_cv_prog_CC="$as_dir/$ac_word${1+' '}$@" + fi +fi +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { $as_echo "$as_me:$LINENO: result: $CC" >&5 +$as_echo "$CC" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + for ac_prog in cl.exe + do + # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. +set dummy $ac_tool_prefix$ac_prog; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="$ac_tool_prefix$ac_prog" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { $as_echo "$as_me:$LINENO: result: $CC" >&5 +$as_echo "$CC" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$CC" && break + done +fi +if test -z "$CC"; then + ac_ct_CC=$CC + for ac_prog in cl.exe +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_ac_ct_CC+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_CC="$ac_prog" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { $as_echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 +$as_echo "$ac_ct_CC" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$ac_ct_CC" && break +done + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:$LINENO: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +fi + +fi + + +test -z "$CC" && { { $as_echo "$as_me:$LINENO: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +{ { $as_echo "$as_me:$LINENO: error: no acceptable C compiler found in \$PATH +See \`config.log' for more details." >&5 +$as_echo "$as_me: error: no acceptable C compiler found in \$PATH +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; }; } + +# Provide some information about the compiler. +$as_echo "$as_me:$LINENO: checking for C compiler version" >&5 +set X $ac_compile +ac_compiler=$2 +{ (ac_try="$ac_compiler --version >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compiler --version >&5") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } +{ (ac_try="$ac_compiler -v >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compiler -v >&5") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } +{ (ac_try="$ac_compiler -V >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compiler -V >&5") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } + +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +ac_clean_files_save=$ac_clean_files +ac_clean_files="$ac_clean_files a.out a.out.dSYM a.exe b.out" +# Try to create an executable without -o first, disregard a.out. +# It will help us diagnose broken compilers, and finding out an intuition +# of exeext. +{ $as_echo "$as_me:$LINENO: checking for C compiler default output file name" >&5 +$as_echo_n "checking for C compiler default output file name... " >&6; } +ac_link_default=`$as_echo "$ac_link" | sed 's/ -o *conftest[^ ]*//'` + +# The possible output files: +ac_files="a.out conftest.exe conftest a.exe a_out.exe b.out conftest.*" + +ac_rmfiles= +for ac_file in $ac_files +do + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.dSYM | *.o | *.obj ) ;; + * ) ac_rmfiles="$ac_rmfiles $ac_file";; + esac +done +rm -f $ac_rmfiles + +if { (ac_try="$ac_link_default" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_link_default") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; then + # Autoconf-2.13 could set the ac_cv_exeext variable to `no'. +# So ignore a value of `no', otherwise this would lead to `EXEEXT = no' +# in a Makefile. We should not override ac_cv_exeext if it was cached, +# so that the user can short-circuit this test for compilers unknown to +# Autoconf. +for ac_file in $ac_files '' +do + test -f "$ac_file" || continue + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.dSYM | *.o | *.obj ) + ;; + [ab].out ) + # We found the default executable, but exeext='' is most + # certainly right. + break;; + *.* ) + if test "${ac_cv_exeext+set}" = set && test "$ac_cv_exeext" != no; + then :; else + ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'` + fi + # We set ac_cv_exeext here because the later test for it is not + # safe: cross compilers may not add the suffix if given an `-o' + # argument, so we may need to know it at that point already. + # Even if this section looks crufty: it has the advantage of + # actually working. + break;; + * ) + break;; + esac +done +test "$ac_cv_exeext" = no && ac_cv_exeext= + +else + ac_file='' +fi + +{ $as_echo "$as_me:$LINENO: result: $ac_file" >&5 +$as_echo "$ac_file" >&6; } +if test -z "$ac_file"; then + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +{ { $as_echo "$as_me:$LINENO: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +{ { $as_echo "$as_me:$LINENO: error: C compiler cannot create executables +See \`config.log' for more details." >&5 +$as_echo "$as_me: error: C compiler cannot create executables +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; }; } +fi + +ac_exeext=$ac_cv_exeext + +# Check that the compiler produces executables we can run. If not, either +# the compiler is broken, or we cross compile. +{ $as_echo "$as_me:$LINENO: checking whether the C compiler works" >&5 +$as_echo_n "checking whether the C compiler works... " >&6; } +# FIXME: These cross compiler hacks should be removed for Autoconf 3.0 +# If not cross compiling, check that we can run a simple program. +if test "$cross_compiling" != yes; then + if { ac_try='./$ac_file' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + cross_compiling=no + else + if test "$cross_compiling" = maybe; then + cross_compiling=yes + else + { { $as_echo "$as_me:$LINENO: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +{ { $as_echo "$as_me:$LINENO: error: cannot run C compiled programs. +If you meant to cross compile, use \`--host'. +See \`config.log' for more details." >&5 +$as_echo "$as_me: error: cannot run C compiled programs. +If you meant to cross compile, use \`--host'. +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; }; } + fi + fi +fi +{ $as_echo "$as_me:$LINENO: result: yes" >&5 +$as_echo "yes" >&6; } + +rm -f -r a.out a.out.dSYM a.exe conftest$ac_cv_exeext b.out +ac_clean_files=$ac_clean_files_save +# Check that the compiler produces executables we can run. If not, either +# the compiler is broken, or we cross compile. +{ $as_echo "$as_me:$LINENO: checking whether we are cross compiling" >&5 +$as_echo_n "checking whether we are cross compiling... " >&6; } +{ $as_echo "$as_me:$LINENO: result: $cross_compiling" >&5 +$as_echo "$cross_compiling" >&6; } + +{ $as_echo "$as_me:$LINENO: checking for suffix of executables" >&5 +$as_echo_n "checking for suffix of executables... " >&6; } +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; then + # If both `conftest.exe' and `conftest' are `present' (well, observable) +# catch `conftest.exe'. For instance with Cygwin, `ls conftest' will +# work properly (i.e., refer to `conftest.exe'), while it won't with +# `rm'. +for ac_file in conftest.exe conftest conftest.*; do + test -f "$ac_file" || continue + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.dSYM | *.o | *.obj ) ;; + *.* ) ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'` + break;; + * ) break;; + esac +done +else + { { $as_echo "$as_me:$LINENO: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +{ { $as_echo "$as_me:$LINENO: error: cannot compute suffix of executables: cannot compile and link +See \`config.log' for more details." >&5 +$as_echo "$as_me: error: cannot compute suffix of executables: cannot compile and link +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; }; } +fi + +rm -f conftest$ac_cv_exeext +{ $as_echo "$as_me:$LINENO: result: $ac_cv_exeext" >&5 +$as_echo "$ac_cv_exeext" >&6; } + +rm -f conftest.$ac_ext +EXEEXT=$ac_cv_exeext +ac_exeext=$EXEEXT +{ $as_echo "$as_me:$LINENO: checking for suffix of object files" >&5 +$as_echo_n "checking for suffix of object files... " >&6; } +if test "${ac_cv_objext+set}" = set; then + $as_echo_n "(cached) " >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.o conftest.obj +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; then + for ac_file in conftest.o conftest.obj conftest.*; do + test -f "$ac_file" || continue; + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.dSYM ) ;; + *) ac_cv_objext=`expr "$ac_file" : '.*\.\(.*\)'` + break;; + esac +done +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +{ { $as_echo "$as_me:$LINENO: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +{ { $as_echo "$as_me:$LINENO: error: cannot compute suffix of object files: cannot compile +See \`config.log' for more details." >&5 +$as_echo "$as_me: error: cannot compute suffix of object files: cannot compile +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; }; } +fi + +rm -f conftest.$ac_cv_objext conftest.$ac_ext +fi +{ $as_echo "$as_me:$LINENO: result: $ac_cv_objext" >&5 +$as_echo "$ac_cv_objext" >&6; } +OBJEXT=$ac_cv_objext +ac_objext=$OBJEXT +{ $as_echo "$as_me:$LINENO: checking whether we are using the GNU C compiler" >&5 +$as_echo_n "checking whether we are using the GNU C compiler... " >&6; } +if test "${ac_cv_c_compiler_gnu+set}" = set; then + $as_echo_n "(cached) " >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ +#ifndef __GNUC__ + choke me +#endif + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_compiler_gnu=yes +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_compiler_gnu=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +ac_cv_c_compiler_gnu=$ac_compiler_gnu + +fi +{ $as_echo "$as_me:$LINENO: result: $ac_cv_c_compiler_gnu" >&5 +$as_echo "$ac_cv_c_compiler_gnu" >&6; } +if test $ac_compiler_gnu = yes; then + GCC=yes +else + GCC= +fi +ac_test_CFLAGS=${CFLAGS+set} +ac_save_CFLAGS=$CFLAGS +{ $as_echo "$as_me:$LINENO: checking whether $CC accepts -g" >&5 +$as_echo_n "checking whether $CC accepts -g... " >&6; } +if test "${ac_cv_prog_cc_g+set}" = set; then + $as_echo_n "(cached) " >&6 +else + ac_save_c_werror_flag=$ac_c_werror_flag + ac_c_werror_flag=yes + ac_cv_prog_cc_g=no + CFLAGS="-g" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_prog_cc_g=yes +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + CFLAGS="" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + : +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_c_werror_flag=$ac_save_c_werror_flag + CFLAGS="-g" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_prog_cc_g=yes +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + ac_c_werror_flag=$ac_save_c_werror_flag +fi +{ $as_echo "$as_me:$LINENO: result: $ac_cv_prog_cc_g" >&5 +$as_echo "$ac_cv_prog_cc_g" >&6; } +if test "$ac_test_CFLAGS" = set; then + CFLAGS=$ac_save_CFLAGS +elif test $ac_cv_prog_cc_g = yes; then + if test "$GCC" = yes; then + CFLAGS="-g -O2" + else + CFLAGS="-g" + fi +else + if test "$GCC" = yes; then + CFLAGS="-O2" + else + CFLAGS= + fi +fi +{ $as_echo "$as_me:$LINENO: checking for $CC option to accept ISO C89" >&5 +$as_echo_n "checking for $CC option to accept ISO C89... " >&6; } +if test "${ac_cv_prog_cc_c89+set}" = set; then + $as_echo_n "(cached) " >&6 +else + ac_cv_prog_cc_c89=no +ac_save_CC=$CC +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#include +#include +/* Most of the following tests are stolen from RCS 5.7's src/conf.sh. */ +struct buf { int x; }; +FILE * (*rcsopen) (struct buf *, struct stat *, int); +static char *e (p, i) + char **p; + int i; +{ + return p[i]; +} +static char *f (char * (*g) (char **, int), char **p, ...) +{ + char *s; + va_list v; + va_start (v,p); + s = g (p, va_arg (v,int)); + va_end (v); + return s; +} + +/* OSF 4.0 Compaq cc is some sort of almost-ANSI by default. It has + function prototypes and stuff, but not '\xHH' hex character constants. + These don't provoke an error unfortunately, instead are silently treated + as 'x'. The following induces an error, until -std is added to get + proper ANSI mode. Curiously '\x00'!='x' always comes out true, for an + array size at least. It's necessary to write '\x00'==0 to get something + that's true only with -std. */ +int osf4_cc_array ['\x00' == 0 ? 1 : -1]; + +/* IBM C 6 for AIX is almost-ANSI by default, but it replaces macro parameters + inside strings and character constants. */ +#define FOO(x) 'x' +int xlc6_cc_array[FOO(a) == 'x' ? 1 : -1]; + +int test (int i, double x); +struct s1 {int (*f) (int a);}; +struct s2 {int (*f) (double a);}; +int pairnames (int, char **, FILE *(*)(struct buf *, struct stat *, int), int, int); +int argc; +char **argv; +int +main () +{ +return f (e, argv, 0) != argv[0] || f (e, argv, 1) != argv[1]; + ; + return 0; +} +_ACEOF +for ac_arg in '' -qlanglvl=extc89 -qlanglvl=ansi -std \ + -Ae "-Aa -D_HPUX_SOURCE" "-Xc -D__EXTENSIONS__" +do + CC="$ac_save_CC $ac_arg" + rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_prog_cc_c89=$ac_arg +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext + test "x$ac_cv_prog_cc_c89" != "xno" && break +done +rm -f conftest.$ac_ext +CC=$ac_save_CC + +fi +# AC_CACHE_VAL +case "x$ac_cv_prog_cc_c89" in + x) + { $as_echo "$as_me:$LINENO: result: none needed" >&5 +$as_echo "none needed" >&6; } ;; + xno) + { $as_echo "$as_me:$LINENO: result: unsupported" >&5 +$as_echo "unsupported" >&6; } ;; + *) + CC="$CC $ac_cv_prog_cc_c89" + { $as_echo "$as_me:$LINENO: result: $ac_cv_prog_cc_c89" >&5 +$as_echo "$ac_cv_prog_cc_c89" >&6; } ;; +esac + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu +{ $as_echo "$as_me:$LINENO: checking how to run the C preprocessor" >&5 +$as_echo_n "checking how to run the C preprocessor... " >&6; } +# On Suns, sometimes $CPP names a directory. +if test -n "$CPP" && test -d "$CPP"; then + CPP= +fi +if test -z "$CPP"; then + if test "${ac_cv_prog_CPP+set}" = set; then + $as_echo_n "(cached) " >&6 +else + # Double quotes because CPP needs to be expanded + for CPP in "$CC -E" "$CC -E -traditional-cpp" "/lib/cpp" + do + ac_preproc_ok=false +for ac_c_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then + : +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Broken: fails on valid input. +continue +fi + +rm -f conftest.err conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then + # Broken: success on invalid input. +continue +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Passes both tests. +ac_preproc_ok=: +break +fi + +rm -f conftest.err conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.err conftest.$ac_ext +if $ac_preproc_ok; then + break +fi + + done + ac_cv_prog_CPP=$CPP + +fi + CPP=$ac_cv_prog_CPP +else + ac_cv_prog_CPP=$CPP +fi +{ $as_echo "$as_me:$LINENO: result: $CPP" >&5 +$as_echo "$CPP" >&6; } +ac_preproc_ok=false +for ac_c_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then + : +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Broken: fails on valid input. +continue +fi + +rm -f conftest.err conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then + # Broken: success on invalid input. +continue +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Passes both tests. +ac_preproc_ok=: +break +fi + +rm -f conftest.err conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.err conftest.$ac_ext +if $ac_preproc_ok; then + : +else + { { $as_echo "$as_me:$LINENO: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +{ { $as_echo "$as_me:$LINENO: error: C preprocessor \"$CPP\" fails sanity check +See \`config.log' for more details." >&5 +$as_echo "$as_me: error: C preprocessor \"$CPP\" fails sanity check +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; }; } +fi + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + +ac_aux_dir= +for ac_dir in "$srcdir" "$srcdir/.." "$srcdir/../.."; do + if test -f "$ac_dir/install-sh"; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/install-sh -c" + break + elif test -f "$ac_dir/install.sh"; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/install.sh -c" + break + elif test -f "$ac_dir/shtool"; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/shtool install -c" + break + fi +done +if test -z "$ac_aux_dir"; then + { { $as_echo "$as_me:$LINENO: error: cannot find install-sh or install.sh in \"$srcdir\" \"$srcdir/..\" \"$srcdir/../..\"" >&5 +$as_echo "$as_me: error: cannot find install-sh or install.sh in \"$srcdir\" \"$srcdir/..\" \"$srcdir/../..\"" >&2;} + { (exit 1); exit 1; }; } +fi + +# These three variables are undocumented and unsupported, +# and are intended to be withdrawn in a future Autoconf release. +# They can cause serious problems if a builder's source tree is in a directory +# whose full name contains unusual characters. +ac_config_guess="$SHELL $ac_aux_dir/config.guess" # Please don't use this var. +ac_config_sub="$SHELL $ac_aux_dir/config.sub" # Please don't use this var. +ac_configure="$SHELL $ac_aux_dir/configure" # Please don't use this var. + + +# Find a good install program. We prefer a C program (faster), +# so one script is as good as another. But avoid the broken or +# incompatible versions: +# SysV /etc/install, /usr/sbin/install +# SunOS /usr/etc/install +# IRIX /sbin/install +# AIX /bin/install +# AmigaOS /C/install, which installs bootblocks on floppy discs +# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag +# AFS /usr/afsws/bin/install, which mishandles nonexistent args +# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" +# OS/2's system install, which has a completely different semantic +# ./install, which can be erroneously created by make from ./install.sh. +# Reject install programs that cannot install multiple files. +{ $as_echo "$as_me:$LINENO: checking for a BSD-compatible install" >&5 +$as_echo_n "checking for a BSD-compatible install... " >&6; } +if test -z "$INSTALL"; then +if test "${ac_cv_path_install+set}" = set; then + $as_echo_n "(cached) " >&6 +else + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + # Account for people who put trailing slashes in PATH elements. +case $as_dir/ in + ./ | .// | /cC/* | \ + /etc/* | /usr/sbin/* | /usr/etc/* | /sbin/* | /usr/afsws/bin/* | \ + ?:\\/os2\\/install\\/* | ?:\\/OS2\\/INSTALL\\/* | \ + /usr/ucb/* ) ;; + *) + # OSF1 and SCO ODT 3.0 have their own names for install. + # Don't use installbsd from OSF since it installs stuff as root + # by default. + for ac_prog in ginstall scoinst install; do + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_prog$ac_exec_ext" && $as_test_x "$as_dir/$ac_prog$ac_exec_ext"; }; then + if test $ac_prog = install && + grep dspmsg "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then + # AIX install. It has an incompatible calling convention. + : + elif test $ac_prog = install && + grep pwplus "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then + # program-specific install script used by HP pwplus--don't use. + : + else + rm -rf conftest.one conftest.two conftest.dir + echo one > conftest.one + echo two > conftest.two + mkdir conftest.dir + if "$as_dir/$ac_prog$ac_exec_ext" -c conftest.one conftest.two "`pwd`/conftest.dir" && + test -s conftest.one && test -s conftest.two && + test -s conftest.dir/conftest.one && + test -s conftest.dir/conftest.two + then + ac_cv_path_install="$as_dir/$ac_prog$ac_exec_ext -c" + break 3 + fi + fi + fi + done + done + ;; +esac + +done +IFS=$as_save_IFS + +rm -rf conftest.one conftest.two conftest.dir + +fi + if test "${ac_cv_path_install+set}" = set; then + INSTALL=$ac_cv_path_install + else + # As a last resort, use the slow shell script. Don't cache a + # value for INSTALL within a source directory, because that will + # break other packages using the cache if that directory is + # removed, or if the value is a relative name. + INSTALL=$ac_install_sh + fi +fi +{ $as_echo "$as_me:$LINENO: result: $INSTALL" >&5 +$as_echo "$INSTALL" >&6; } + +# Use test -z because SunOS4 sh mishandles braces in ${var-val}. +# It thinks the first close brace ends the variable substitution. +test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}' + +test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL}' + +test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' + +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. +set dummy ${ac_tool_prefix}ranlib; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_RANLIB+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$RANLIB"; then + ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +RANLIB=$ac_cv_prog_RANLIB +if test -n "$RANLIB"; then + { $as_echo "$as_me:$LINENO: result: $RANLIB" >&5 +$as_echo "$RANLIB" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_RANLIB"; then + ac_ct_RANLIB=$RANLIB + # Extract the first word of "ranlib", so it can be a program name with args. +set dummy ranlib; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_ac_ct_RANLIB+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_RANLIB"; then + ac_cv_prog_ac_ct_RANLIB="$ac_ct_RANLIB" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_RANLIB="ranlib" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_RANLIB=$ac_cv_prog_ac_ct_RANLIB +if test -n "$ac_ct_RANLIB"; then + { $as_echo "$as_me:$LINENO: result: $ac_ct_RANLIB" >&5 +$as_echo "$ac_ct_RANLIB" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_RANLIB" = x; then + RANLIB=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:$LINENO: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + RANLIB=$ac_ct_RANLIB + fi +else + RANLIB="$ac_cv_prog_RANLIB" +fi + +# Extract the first word of "autoconf", so it can be a program name with args. +set dummy autoconf; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_AUTOCONF+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$AUTOCONF"; then + ac_cv_prog_AUTOCONF="$AUTOCONF" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_AUTOCONF="autoconf" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_AUTOCONF" && ac_cv_prog_AUTOCONF=":" +fi +fi +AUTOCONF=$ac_cv_prog_AUTOCONF +if test -n "$AUTOCONF"; then + { $as_echo "$as_me:$LINENO: result: $AUTOCONF" >&5 +$as_echo "$AUTOCONF" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +# Extract the first word of "strip", so it can be a program name with args. +set dummy strip; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_STRIP+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$STRIP"; then + ac_cv_prog_STRIP="$STRIP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_STRIP="strip" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_STRIP" && ac_cv_prog_STRIP=":" +fi +fi +STRIP=$ac_cv_prog_STRIP +if test -n "$STRIP"; then + { $as_echo "$as_me:$LINENO: result: $STRIP" >&5 +$as_echo "$STRIP" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +# Extract the first word of "as", so it can be a program name with args. +set dummy as; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_AS+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$AS"; then + ac_cv_prog_AS="$AS" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_AS="as" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_AS" && ac_cv_prog_AS=":" +fi +fi +AS=$ac_cv_prog_AS +if test -n "$AS"; then + { $as_echo "$as_me:$LINENO: result: $AS" >&5 +$as_echo "$AS" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +# Extract the first word of "cp", so it can be a program name with args. +set dummy cp; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_CP+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$CP"; then + ac_cv_prog_CP="$CP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CP="cp" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_CP" && ac_cv_prog_CP=":" +fi +fi +CP=$ac_cv_prog_CP +if test -n "$CP"; then + { $as_echo "$as_me:$LINENO: result: $CP" >&5 +$as_echo "$CP" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + + +for ac_prog in flex lex +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_LEX+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$LEX"; then + ac_cv_prog_LEX="$LEX" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_LEX="$ac_prog" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +LEX=$ac_cv_prog_LEX +if test -n "$LEX"; then + { $as_echo "$as_me:$LINENO: result: $LEX" >&5 +$as_echo "$LEX" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$LEX" && break +done +test -n "$LEX" || LEX=":" + + +for ac_prog in 'bison -y' byacc yacc +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_YACC+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$YACC"; then + ac_cv_prog_YACC="$YACC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_YACC="$ac_prog" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +YACC=$ac_cv_prog_YACC +if test -n "$YACC"; then + { $as_echo "$as_me:$LINENO: result: $YACC" >&5 +$as_echo "$YACC" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$YACC" && break +done +test -n "$YACC" || YACC=":" + + + + +if test "$YACC" = ":"; then + { { $as_echo "$as_me:$LINENO: error: Cannot find required program bison." >&5 +$as_echo "$as_me: error: Cannot find required program bison." >&2;} + { (exit 1); exit 1; }; } + fi + +if test "$LEX" = ":"; then + { { $as_echo "$as_me:$LINENO: error: Cannot find required program flex." >&5 +$as_echo "$as_me: error: Cannot find required program flex." >&2;} + { (exit 1); exit 1; }; } + fi + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + + +# Check whether --with-ccache was given. +if test "${with_ccache+set}" = set; then + withval=$with_ccache; +fi + +case x${with_ccache-yes} in + xyes) # Extract the first word of "ccache", so it can be a program name with args. +set dummy ccache; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_CCACHE+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$CCACHE"; then + ac_cv_prog_CCACHE="$CCACHE" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CCACHE="ccache" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CCACHE=$ac_cv_prog_CCACHE +if test -n "$CCACHE"; then + { $as_echo "$as_me:$LINENO: result: $CCACHE" >&5 +$as_echo "$CCACHE" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + ;; + xno) ;; + *) CCACHE=$with_ccache + ;; +esac + + +# Checking for functions +# =========================================================================== + + +for ac_func in strerror +do +as_ac_var=`$as_echo "ac_cv_func_$ac_func" | $as_tr_sh` +{ $as_echo "$as_me:$LINENO: checking for $ac_func" >&5 +$as_echo_n "checking for $ac_func... " >&6; } +if { as_var=$as_ac_var; eval "test \"\${$as_var+set}\" = set"; }; then + $as_echo_n "(cached) " >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define $ac_func to an innocuous variant, in case declares $ac_func. + For example, HP-UX 11i declares gettimeofday. */ +#define $ac_func innocuous_$ac_func + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char $ac_func (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef $ac_func + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char $ac_func (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_$ac_func || defined __stub___$ac_func +choke me +#endif + +int +main () +{ +return $ac_func (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && { + test "$cross_compiling" = yes || + $as_test_x conftest$ac_exeext + }; then + eval "$as_ac_var=yes" +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_var=no" +fi + +rm -rf conftest.dSYM +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +fi +ac_res=`eval 'as_val=${'$as_ac_var'} + $as_echo "$as_val"'` + { $as_echo "$as_me:$LINENO: result: $ac_res" >&5 +$as_echo "$ac_res" >&6; } +as_val=`eval 'as_val=${'$as_ac_var'} + $as_echo "$as_val"'` + if test "x$as_val" = x""yes; then + cat >>confdefs.h <<_ACEOF +#define `$as_echo "HAVE_$ac_func" | $as_tr_cpp` 1 +_ACEOF + +fi +done + + + + + +for ac_func in vsnprintf snprintf vsprintf mkstemp +do +as_ac_var=`$as_echo "ac_cv_func_$ac_func" | $as_tr_sh` +{ $as_echo "$as_me:$LINENO: checking for $ac_func" >&5 +$as_echo_n "checking for $ac_func... " >&6; } +if { as_var=$as_ac_var; eval "test \"\${$as_var+set}\" = set"; }; then + $as_echo_n "(cached) " >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define $ac_func to an innocuous variant, in case declares $ac_func. + For example, HP-UX 11i declares gettimeofday. */ +#define $ac_func innocuous_$ac_func + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char $ac_func (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef $ac_func + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char $ac_func (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_$ac_func || defined __stub___$ac_func +choke me +#endif + +int +main () +{ +return $ac_func (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && { + test "$cross_compiling" = yes || + $as_test_x conftest$ac_exeext + }; then + eval "$as_ac_var=yes" +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_var=no" +fi + +rm -rf conftest.dSYM +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +fi +ac_res=`eval 'as_val=${'$as_ac_var'} + $as_echo "$as_val"'` + { $as_echo "$as_me:$LINENO: result: $ac_res" >&5 +$as_echo "$ac_res" >&6; } +as_val=`eval 'as_val=${'$as_ac_var'} + $as_echo "$as_val"'` + if test "x$as_val" = x""yes; then + cat >>confdefs.h <<_ACEOF +#define `$as_echo "HAVE_$ac_func" | $as_tr_cpp` 1 +_ACEOF + +fi +done + + + +# Macro definitions +# =========================================================================== + +# adl_DD_COPT macro checks if the compiler specified as the 1st parameter +# supports option specified as the 2nd parameter +# For example: DD_CPORT(CXX, fPIC) + + + +# This macro expands DIR and assigns it to RET. +# If DIR is NONE, then it's replaced by DEFAULT. +# +# Based on AC_DEFINE_DIR +# +# Examples: +# +# adl_EXPAND(prefix, "/usr/local", expanded_prefix) + + + +# adl_NORMALIZE_PATH +# +# - empty paths are changed to '.' +# - trailing slashes are removed +# - repeated slashes are squeezed except a leading doubled slash '//' +# (which might indicate a networked disk on some OS). +# +# +# REFERENCE_STRING is used to turn '/' into '\' and vice-versa: if +# REFERENCE_STRING contains some backslashes, all slashes and backslashes +# are turned into backslashes, otherwise they are all turned into slashes. +# +# This makes processing of DOS filenames quite easier, because you can turn a +# filename to the Unix notation, make your processing, and turn it back to +# original notation. + + + + +# adl_COMPUTE_RELATIVE_PATH +# +# PATH_LIST is a space-separated list of colon-separated triplets of the form +# 'FROM:TO:RESULT'. This function iterates over these triplets and set $RESULT +# to the relative path from $FROM to $TO. Note that $FROM and $TO needs to be +# absolute filenames for this macro to success. + + + +## Note: +## ***** +## The following helper macros are too fragile to be used out +## of adl_COMPUTE_RELATIVE_PATHS (mainly because they assume that +## paths are normalized), that's why I'm keeping them in the same file. +## Still, some of them maybe worth to reuse. + + + + + + + + + + + + + + + + + +# Checking characteristics of compilers and other programs +# =========================================================================== +{ $as_echo "$as_me:$LINENO: checking whether preprocessor accepts -MM or -M" >&5 +$as_echo_n "checking whether preprocessor accepts -MM or -M... " >&6; } +if test "${sdcc_cv_MM+set}" = set; then + $as_echo_n "(cached) " >&6 +else + echo "#include " >_test_.c +echo "" >>_test_.c +$CPP -v -MM _test_.c 1>&5 2>&5 +if test "$?" = "0"; then + sdcc_cv_MM="-MM" +else + sdcc_cv_MM="-M" +fi +rm -f _test_.* +fi +{ $as_echo "$as_me:$LINENO: result: $sdcc_cv_MM" >&5 +$as_echo "$sdcc_cv_MM" >&6; } +M_OR_MM=$sdcc_cv_MM + + +# This is the first time when CFLAGS are set/modified!! + +{ $as_echo "$as_me:$LINENO: checking whether $CC accepts -ggdb" >&5 +$as_echo_n "checking whether $CC accepts -ggdb... " >&6; } +if test "${sdcc_cv_CCggdb+set}" = set; then + $as_echo_n "(cached) " >&6 +else + cat >_test_.c < +void main(void) {} +EOF +$CC -v -ggdb -c _test_.c 1>&5 2>&5 +if test "$?" = "0"; then + sdcc_cv_CCggdb="yes" +else + sdcc_cv_CCggdb="no" +fi +rm -f _test_.* a.out +fi +{ $as_echo "$as_me:$LINENO: result: $sdcc_cv_CCggdb" >&5 +$as_echo "$sdcc_cv_CCggdb" >&6; } + +if test "$sdcc_cv_CCggdb" = "yes"; then + CFLAGS="-ggdb ${CFLAGS}" +fi + + +{ $as_echo "$as_me:$LINENO: checking whether $CC accepts -pipe" >&5 +$as_echo_n "checking whether $CC accepts -pipe... " >&6; } +if test "${sdcc_cv_CCpipe+set}" = set; then + $as_echo_n "(cached) " >&6 +else + cat >_test_.c < +void main(void) {} +EOF +$CC -v -pipe -c _test_.c 1>&5 2>&5 +if test "$?" = "0"; then + sdcc_cv_CCpipe="yes" +else + sdcc_cv_CCpipe="no" +fi +rm -f _test_.* a.out +fi +{ $as_echo "$as_me:$LINENO: result: $sdcc_cv_CCpipe" >&5 +$as_echo "$sdcc_cv_CCpipe" >&6; } + +if test "$sdcc_cv_CCpipe" = "yes"; then + CFLAGS="-pipe $CFLAGS" +fi + + +# Checks for typedefs, structures, and compiler characteristics. +# =========================================================================== +{ $as_echo "$as_me:$LINENO: checking return type of signal handlers" >&5 +$as_echo_n "checking return type of signal handlers... " >&6; } +if test "${ac_cv_type_signal+set}" = set; then + $as_echo_n "(cached) " >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include + +int +main () +{ +return *(signal (0, 0)) (0) == 1; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_type_signal=int +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_signal=void +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ $as_echo "$as_me:$LINENO: result: $ac_cv_type_signal" >&5 +$as_echo "$ac_cv_type_signal" >&6; } + +cat >>confdefs.h <<_ACEOF +#define RETSIGTYPE $ac_cv_type_signal +_ACEOF + + + + +{ $as_echo "$as_me:$LINENO: checking for grep that handles long lines and -e" >&5 +$as_echo_n "checking for grep that handles long lines and -e... " >&6; } +if test "${ac_cv_path_GREP+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -z "$GREP"; then + ac_path_GREP_found=false + # Loop through the user's path and test for each of PROGNAME-LIST + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in grep ggrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_GREP="$as_dir/$ac_prog$ac_exec_ext" + { test -f "$ac_path_GREP" && $as_test_x "$ac_path_GREP"; } || continue +# Check for GNU ac_path_GREP and select it if it is found. + # Check for GNU $ac_path_GREP +case `"$ac_path_GREP" --version 2>&1` in +*GNU*) + ac_cv_path_GREP="$ac_path_GREP" ac_path_GREP_found=:;; +*) + ac_count=0 + $as_echo_n 0123456789 >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + $as_echo 'GREP' >> "conftest.nl" + "$ac_path_GREP" -e 'GREP$' -e '-(cannot match)-' < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + ac_count=`expr $ac_count + 1` + if test $ac_count -gt ${ac_path_GREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_GREP="$ac_path_GREP" + ac_path_GREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + $ac_path_GREP_found && break 3 + done + done +done +IFS=$as_save_IFS + if test -z "$ac_cv_path_GREP"; then + { { $as_echo "$as_me:$LINENO: error: no acceptable grep could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&5 +$as_echo "$as_me: error: no acceptable grep could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&2;} + { (exit 1); exit 1; }; } + fi +else + ac_cv_path_GREP=$GREP +fi + +fi +{ $as_echo "$as_me:$LINENO: result: $ac_cv_path_GREP" >&5 +$as_echo "$ac_cv_path_GREP" >&6; } + GREP="$ac_cv_path_GREP" + + +{ $as_echo "$as_me:$LINENO: checking for egrep" >&5 +$as_echo_n "checking for egrep... " >&6; } +if test "${ac_cv_path_EGREP+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if echo a | $GREP -E '(a|b)' >/dev/null 2>&1 + then ac_cv_path_EGREP="$GREP -E" + else + if test -z "$EGREP"; then + ac_path_EGREP_found=false + # Loop through the user's path and test for each of PROGNAME-LIST + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in egrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_EGREP="$as_dir/$ac_prog$ac_exec_ext" + { test -f "$ac_path_EGREP" && $as_test_x "$ac_path_EGREP"; } || continue +# Check for GNU ac_path_EGREP and select it if it is found. + # Check for GNU $ac_path_EGREP +case `"$ac_path_EGREP" --version 2>&1` in +*GNU*) + ac_cv_path_EGREP="$ac_path_EGREP" ac_path_EGREP_found=:;; +*) + ac_count=0 + $as_echo_n 0123456789 >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + $as_echo 'EGREP' >> "conftest.nl" + "$ac_path_EGREP" 'EGREP$' < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + ac_count=`expr $ac_count + 1` + if test $ac_count -gt ${ac_path_EGREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_EGREP="$ac_path_EGREP" + ac_path_EGREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + $ac_path_EGREP_found && break 3 + done + done +done +IFS=$as_save_IFS + if test -z "$ac_cv_path_EGREP"; then + { { $as_echo "$as_me:$LINENO: error: no acceptable egrep could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&5 +$as_echo "$as_me: error: no acceptable egrep could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&2;} + { (exit 1); exit 1; }; } + fi +else + ac_cv_path_EGREP=$EGREP +fi + + fi +fi +{ $as_echo "$as_me:$LINENO: result: $ac_cv_path_EGREP" >&5 +$as_echo "$ac_cv_path_EGREP" >&6; } + EGREP="$ac_cv_path_EGREP" + + +{ $as_echo "$as_me:$LINENO: checking for ANSI C header files" >&5 +$as_echo_n "checking for ANSI C header files... " >&6; } +if test "${ac_cv_header_stdc+set}" = set; then + $as_echo_n "(cached) " >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#include +#include + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_header_stdc=yes +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_header_stdc=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + +if test $ac_cv_header_stdc = yes; then + # SunOS 4.x string.h does not declare mem*, contrary to ANSI. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "memchr" >/dev/null 2>&1; then + : +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "free" >/dev/null 2>&1; then + : +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. + if test "$cross_compiling" = yes; then + : +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#if ((' ' & 0x0FF) == 0x020) +# define ISLOWER(c) ('a' <= (c) && (c) <= 'z') +# define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c)) +#else +# define ISLOWER(c) \ + (('a' <= (c) && (c) <= 'i') \ + || ('j' <= (c) && (c) <= 'r') \ + || ('s' <= (c) && (c) <= 'z')) +# define TOUPPER(c) (ISLOWER(c) ? ((c) | 0x40) : (c)) +#endif + +#define XOR(e, f) (((e) && !(f)) || (!(e) && (f))) +int +main () +{ + int i; + for (i = 0; i < 256; i++) + if (XOR (islower (i), ISLOWER (i)) + || toupper (i) != TOUPPER (i)) + return 2; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + : +else + $as_echo "$as_me: program exited with status $ac_status" >&5 +$as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +ac_cv_header_stdc=no +fi +rm -rf conftest.dSYM +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi + + +fi +fi +{ $as_echo "$as_me:$LINENO: result: $ac_cv_header_stdc" >&5 +$as_echo "$ac_cv_header_stdc" >&6; } +if test $ac_cv_header_stdc = yes; then + +cat >>confdefs.h <<\_ACEOF +#define STDC_HEADERS 1 +_ACEOF + +fi + +# On IRIX 5.3, sys/types and inttypes.h are conflicting. + + + + + + + + + +for ac_header in sys/types.h sys/stat.h stdlib.h string.h memory.h strings.h \ + inttypes.h stdint.h unistd.h +do +as_ac_Header=`$as_echo "ac_cv_header_$ac_header" | $as_tr_sh` +{ $as_echo "$as_me:$LINENO: checking for $ac_header" >&5 +$as_echo_n "checking for $ac_header... " >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + $as_echo_n "(cached) " >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + +#include <$ac_header> +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + eval "$as_ac_Header=yes" +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_Header=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +ac_res=`eval 'as_val=${'$as_ac_Header'} + $as_echo "$as_val"'` + { $as_echo "$as_me:$LINENO: result: $ac_res" >&5 +$as_echo "$ac_res" >&6; } +as_val=`eval 'as_val=${'$as_ac_Header'} + $as_echo "$as_val"'` + if test "x$as_val" = x""yes; then + cat >>confdefs.h <<_ACEOF +#define `$as_echo "HAVE_$ac_header" | $as_tr_cpp` 1 +_ACEOF + +fi + +done + + +# The cast to long int works around a bug in the HP C Compiler +# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects +# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. +# This bug is HP SR number 8606223364. +{ $as_echo "$as_me:$LINENO: checking size of char" >&5 +$as_echo_n "checking size of char... " >&6; } +if test "${ac_cv_sizeof_char+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (char))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (char))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid; break +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (char))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (char))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=$ac_mid; break +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (char))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_char=$ac_lo;; +'') if test "$ac_cv_type_char" = yes; then + { { $as_echo "$as_me:$LINENO: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +{ { $as_echo "$as_me:$LINENO: error: cannot compute sizeof (char) +See \`config.log' for more details." >&5 +$as_echo "$as_me: error: cannot compute sizeof (char) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; }; } + else + ac_cv_sizeof_char=0 + fi ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +static long int longval () { return (long int) (sizeof (char)); } +static unsigned long int ulongval () { return (long int) (sizeof (char)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (char))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (char)))) + return 1; + fprintf (f, "%ld", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (char)))) + return 1; + fprintf (f, "%lu", i); + } + /* Do not output a trailing newline, as this causes \r\n confusion + on some platforms. */ + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_char=`cat conftest.val` +else + $as_echo "$as_me: program exited with status $ac_status" >&5 +$as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test "$ac_cv_type_char" = yes; then + { { $as_echo "$as_me:$LINENO: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +{ { $as_echo "$as_me:$LINENO: error: cannot compute sizeof (char) +See \`config.log' for more details." >&5 +$as_echo "$as_me: error: cannot compute sizeof (char) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; }; } + else + ac_cv_sizeof_char=0 + fi +fi +rm -rf conftest.dSYM +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +fi +{ $as_echo "$as_me:$LINENO: result: $ac_cv_sizeof_char" >&5 +$as_echo "$ac_cv_sizeof_char" >&6; } + + + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_CHAR $ac_cv_sizeof_char +_ACEOF + + +# The cast to long int works around a bug in the HP C Compiler +# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects +# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. +# This bug is HP SR number 8606223364. +{ $as_echo "$as_me:$LINENO: checking size of short" >&5 +$as_echo_n "checking size of short... " >&6; } +if test "${ac_cv_sizeof_short+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (short))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (short))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid; break +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (short))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (short))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=$ac_mid; break +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (short))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_short=$ac_lo;; +'') if test "$ac_cv_type_short" = yes; then + { { $as_echo "$as_me:$LINENO: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +{ { $as_echo "$as_me:$LINENO: error: cannot compute sizeof (short) +See \`config.log' for more details." >&5 +$as_echo "$as_me: error: cannot compute sizeof (short) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; }; } + else + ac_cv_sizeof_short=0 + fi ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +static long int longval () { return (long int) (sizeof (short)); } +static unsigned long int ulongval () { return (long int) (sizeof (short)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (short))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (short)))) + return 1; + fprintf (f, "%ld", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (short)))) + return 1; + fprintf (f, "%lu", i); + } + /* Do not output a trailing newline, as this causes \r\n confusion + on some platforms. */ + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_short=`cat conftest.val` +else + $as_echo "$as_me: program exited with status $ac_status" >&5 +$as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test "$ac_cv_type_short" = yes; then + { { $as_echo "$as_me:$LINENO: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +{ { $as_echo "$as_me:$LINENO: error: cannot compute sizeof (short) +See \`config.log' for more details." >&5 +$as_echo "$as_me: error: cannot compute sizeof (short) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; }; } + else + ac_cv_sizeof_short=0 + fi +fi +rm -rf conftest.dSYM +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +fi +{ $as_echo "$as_me:$LINENO: result: $ac_cv_sizeof_short" >&5 +$as_echo "$ac_cv_sizeof_short" >&6; } + + + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_SHORT $ac_cv_sizeof_short +_ACEOF + + +# The cast to long int works around a bug in the HP C Compiler +# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects +# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. +# This bug is HP SR number 8606223364. +{ $as_echo "$as_me:$LINENO: checking size of int" >&5 +$as_echo_n "checking size of int... " >&6; } +if test "${ac_cv_sizeof_int+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (int))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (int))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid; break +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (int))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (int))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=$ac_mid; break +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (int))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_int=$ac_lo;; +'') if test "$ac_cv_type_int" = yes; then + { { $as_echo "$as_me:$LINENO: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +{ { $as_echo "$as_me:$LINENO: error: cannot compute sizeof (int) +See \`config.log' for more details." >&5 +$as_echo "$as_me: error: cannot compute sizeof (int) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; }; } + else + ac_cv_sizeof_int=0 + fi ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +static long int longval () { return (long int) (sizeof (int)); } +static unsigned long int ulongval () { return (long int) (sizeof (int)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (int))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (int)))) + return 1; + fprintf (f, "%ld", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (int)))) + return 1; + fprintf (f, "%lu", i); + } + /* Do not output a trailing newline, as this causes \r\n confusion + on some platforms. */ + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_int=`cat conftest.val` +else + $as_echo "$as_me: program exited with status $ac_status" >&5 +$as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test "$ac_cv_type_int" = yes; then + { { $as_echo "$as_me:$LINENO: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +{ { $as_echo "$as_me:$LINENO: error: cannot compute sizeof (int) +See \`config.log' for more details." >&5 +$as_echo "$as_me: error: cannot compute sizeof (int) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; }; } + else + ac_cv_sizeof_int=0 + fi +fi +rm -rf conftest.dSYM +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +fi +{ $as_echo "$as_me:$LINENO: result: $ac_cv_sizeof_int" >&5 +$as_echo "$ac_cv_sizeof_int" >&6; } + + + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_INT $ac_cv_sizeof_int +_ACEOF + + +# The cast to long int works around a bug in the HP C Compiler +# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects +# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. +# This bug is HP SR number 8606223364. +{ $as_echo "$as_me:$LINENO: checking size of long" >&5 +$as_echo_n "checking size of long... " >&6; } +if test "${ac_cv_sizeof_long+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (long))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (long))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid; break +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (long))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (long))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=$ac_mid; break +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (long))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_long=$ac_lo;; +'') if test "$ac_cv_type_long" = yes; then + { { $as_echo "$as_me:$LINENO: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +{ { $as_echo "$as_me:$LINENO: error: cannot compute sizeof (long) +See \`config.log' for more details." >&5 +$as_echo "$as_me: error: cannot compute sizeof (long) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; }; } + else + ac_cv_sizeof_long=0 + fi ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +static long int longval () { return (long int) (sizeof (long)); } +static unsigned long int ulongval () { return (long int) (sizeof (long)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (long))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (long)))) + return 1; + fprintf (f, "%ld", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (long)))) + return 1; + fprintf (f, "%lu", i); + } + /* Do not output a trailing newline, as this causes \r\n confusion + on some platforms. */ + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_long=`cat conftest.val` +else + $as_echo "$as_me: program exited with status $ac_status" >&5 +$as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test "$ac_cv_type_long" = yes; then + { { $as_echo "$as_me:$LINENO: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +{ { $as_echo "$as_me:$LINENO: error: cannot compute sizeof (long) +See \`config.log' for more details." >&5 +$as_echo "$as_me: error: cannot compute sizeof (long) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; }; } + else + ac_cv_sizeof_long=0 + fi +fi +rm -rf conftest.dSYM +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +fi +{ $as_echo "$as_me:$LINENO: result: $ac_cv_sizeof_long" >&5 +$as_echo "$ac_cv_sizeof_long" >&6; } + + + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_LONG $ac_cv_sizeof_long +_ACEOF + + + +{ $as_echo "$as_me:$LINENO: checking whether char is unsigned" >&5 +$as_echo_n "checking whether char is unsigned... " >&6; } +if test "${ac_cv_c_char_unsigned+set}" = set; then + $as_echo_n "(cached) " >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ +static int test_array [1 - 2 * !(((char) -1) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_c_char_unsigned=no +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_c_char_unsigned=yes +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ $as_echo "$as_me:$LINENO: result: $ac_cv_c_char_unsigned" >&5 +$as_echo "$ac_cv_c_char_unsigned" >&6; } +if test $ac_cv_c_char_unsigned = yes && test "$GCC" != yes; then + cat >>confdefs.h <<\_ACEOF +#define __CHAR_UNSIGNED__ 1 +_ACEOF + +fi + + +type_name() +{ + if expr "$ac_cv_sizeof_char" '>=' "$1" >/dev/null; then + echo "char" + exit + fi + if expr "$ac_cv_sizeof_short" '>=' "$1" >/dev/null; then + echo "short" + exit + fi + if expr "$ac_cv_sizeof_int" '>=' "$1" >/dev/null; then + echo "int" + exit + fi + if expr "$ac_cv_sizeof_long" '>=' "$1" >/dev/null; then + echo "long" + exit + fi + echo "long" +} + +{ $as_echo "$as_me:$LINENO: checking type name for byte" >&5 +$as_echo_n "checking type name for byte... " >&6; } +TYPE_CHAR=`type_name 1` +if test "$ac_cv_c_char_unsigned" = "yes"; then + TYPE_BYTE="signed $TYPE_CHAR" +else + TYPE_BYTE=$TYPE_CHAR +fi +{ $as_echo "$as_me:$LINENO: result: $TYPE_BYTE" >&5 +$as_echo "$TYPE_BYTE" >&6; } +{ $as_echo "$as_me:$LINENO: checking type name for word" >&5 +$as_echo_n "checking type name for word... " >&6; } +TYPE_WORD=`type_name 2` +{ $as_echo "$as_me:$LINENO: result: $TYPE_WORD" >&5 +$as_echo "$TYPE_WORD" >&6; } +{ $as_echo "$as_me:$LINENO: checking type name for dword" >&5 +$as_echo_n "checking type name for dword... " >&6; } +TYPE_DWORD=`type_name 4` +{ $as_echo "$as_me:$LINENO: result: $TYPE_DWORD" >&5 +$as_echo "$TYPE_DWORD" >&6; } + +cat >>confdefs.h <<_ACEOF +#define TYPE_BYTE $TYPE_BYTE +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define TYPE_WORD $TYPE_WORD +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define TYPE_DWORD $TYPE_DWORD +_ACEOF + + +cat >>confdefs.h <<_ACEOF +#define TYPE_UBYTE unsigned $TYPE_CHAR +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define TYPE_UWORD unsigned $TYPE_WORD +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define TYPE_UDWORD unsigned $TYPE_DWORD +_ACEOF + + + +# SDCC_BUILD_BIGENDIAN ([ACTION-IF-TRUE], [ACTION-IF-FALSE], [ACTION-IF-UNKNOWN]) +# ------------------------------------------------------------------------- +# SDCC_BUILD_BIGENDIAN + +{ $as_echo "$as_me:$LINENO: checking whether host machine byte ordering is bigendian" >&5 +$as_echo_n "checking whether host machine byte ordering is bigendian... " >&6; } +if test "${sdcc_cv_build_bigendian+set}" = set; then + $as_echo_n "(cached) " >&6 +else + # See if sys/param.h defines the BYTE_ORDER macro. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include + +int +main () +{ +#if ! (defined BYTE_ORDER && defined BIG_ENDIAN && defined LITTLE_ENDIAN \ + && BYTE_ORDER && BIG_ENDIAN && LITTLE_ENDIAN) + bogus endian macros +#endif + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + # It does; now see whether it defined to BIG_ENDIAN or not. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include + +int +main () +{ +#if BYTE_ORDER != BIG_ENDIAN + not big endian +#endif + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + sdcc_cv_build_bigendian=yes +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + sdcc_cv_build_bigendian=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # It does not; compile a test program. +if test "$cross_compiling" = yes; then + # try to guess the endianness by grepping values into an object file + sdcc_cv_build_bigendian=unknown + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +short int ascii_mm[] = { 0x4249, 0x4765, 0x6E44, 0x6961, 0x6E53, 0x7953, 0 }; +short int ascii_ii[] = { 0x694C, 0x5454, 0x656C, 0x6E45, 0x6944, 0x6E61, 0 }; +void _ascii () { char *s = (char *) ascii_mm; s = (char *) ascii_ii; } +short int ebcdic_ii[] = { 0x89D3, 0xE3E3, 0x8593, 0x95C5, 0x89C4, 0x9581, 0 }; +short int ebcdic_mm[] = { 0xC2C9, 0xC785, 0x95C4, 0x8981, 0x95E2, 0xA8E2, 0 }; +void _ebcdic () { char *s = (char *) ebcdic_mm; s = (char *) ebcdic_ii; } +int +main () +{ + _ascii (); _ebcdic (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + if grep BIGenDianSyS conftest.$ac_objext >/dev/null ; then + sdcc_cv_build_bigendian=yes +fi +if grep LiTTleEnDian conftest.$ac_objext >/dev/null ; then + if test "$sdcc_cv_build_bigendian" = unknown; then + sdcc_cv_build_bigendian=no + else + # finding both strings is unlikely to happen, but who knows? + sdcc_cv_build_bigendian=unknown + fi +fi +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ + + /* Are we little or big endian? From Harbison&Steele. */ + union + { + long int l; + char c[sizeof (long int)]; + } u; + u.l = 1; + return u.c[sizeof (long int) - 1] == 1; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + sdcc_cv_build_bigendian=no +else + $as_echo "$as_me: program exited with status $ac_status" >&5 +$as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +sdcc_cv_build_bigendian=yes +fi +rm -rf conftest.dSYM +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ $as_echo "$as_me:$LINENO: result: $sdcc_cv_build_bigendian" >&5 +$as_echo "$sdcc_cv_build_bigendian" >&6; } +case $sdcc_cv_build_bigendian in + yes) + +cat >>confdefs.h <<\_ACEOF +#define BUILD_WORDS_BIGENDIAN 1 +_ACEOF + ;; + no) + ;; + *) + { { $as_echo "$as_me:$LINENO: error: unknown endianness +presetting sdcc_cv_build_bigendian=no (or yes) will help" >&5 +$as_echo "$as_me: error: unknown endianness +presetting sdcc_cv_build_bigendian=no (or yes) will help" >&2;} + { (exit 1); exit 1; }; } ;; +esac + + +# Set standard installation paths +# =========================================================================== + +# In the Makefiles we need paths with '/' as directory separator, even if +# crosscompiling for Win32. +# And we want to preserve the macros (e.g. ${prefix}) in the Makefiles. +# The variables in the Makefiles are replaced by AC_SUBST() +# +# In sdccconf.h the '/' in paths can be replaced by "\\" (normalized), if +# +# The macros are expanded for the header. +# The variables in the header are replaced by AC_*DEFINE*() +# sdccconf_h_dir_separator contains a backslash. + +if test "x${sdccconf_h_dir_separator}" = "x"; then + sdccconf_h_dir_separator="/" +fi + +# Makefiles +########### + +# LIB_TYPE: +# *nix default: "RANLIB" + + +if test "${LIB_TYPE}" = ""; then + LIB_TYPE="RANLIB" +fi + +# include_dir_suffix: +# *nix default: "sdcc/include" + + +if test "${include_dir_suffix}" = ""; then + include_dir_suffix="sdcc/include" +fi + +# lib_dir_suffix: +# *nix default: "sdcc/lib" + +if test "${lib_dir_suffix}" = ""; then + lib_dir_suffix="sdcc/lib" +fi + +# docdir: +# *nix default: "${datadir}/sdcc/doc" + +if test "${docdir}" = ""; then + docdir="\${datadir}"/sdcc/doc +fi + + + +# sdccconf.h +############ + +cat >>confdefs.h <<_ACEOF +#define DIR_SEPARATOR_STRING "${sdccconf_h_dir_separator}" +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define DIR_SEPARATOR_CHAR '${sdccconf_h_dir_separator}' +_ACEOF + + +# prefix: +# default: "NONE", ${ac_default_prefix}: "/usr/local" + + test "x$prefix" = xNONE && prefix="$ac_default_prefix" + test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + ac_expand=$prefix + test "x$ac_expand" = xNONE && ac_expand="$ac_default_prefix" + ac_expand=`eval echo $ac_expand` + expanded_prefix=`eval echo $ac_expand` + + + ac_ndu=$expanded_prefix + case ":$ac_ndu:" in + ::) ac_ndu='.' ;; + :*[\\/]:) ac_ndu=`echo "$ac_ndu" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $sdccconf_h_dir_separator in + + *\\*) ac_ndu=`echo "$ac_ndu" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) ac_ndu=`echo "$ac_ndu" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac + cat >>confdefs.h <<_ACEOF +#define PREFIX "${ac_ndu}" +_ACEOF + + + +# exec_prefix: +# default: "${prefix}" + + test "x$prefix" = xNONE && prefix="$ac_default_prefix" + test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + ac_expand=$exec_prefix + test "x$ac_expand" = xNONE && ac_expand="$expanded_prefix" + ac_expand=`eval echo $ac_expand` + expanded_exec_prefix=`eval echo $ac_expand` + + + ac_ndu=$expanded_exec_prefix + case ":$ac_ndu:" in + ::) ac_ndu='.' ;; + :*[\\/]:) ac_ndu=`echo "$ac_ndu" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $sdccconf_h_dir_separator in + + *\\*) ac_ndu=`echo "$ac_ndu" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) ac_ndu=`echo "$ac_ndu" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac + cat >>confdefs.h <<_ACEOF +#define EXEC_PREFIX "${ac_ndu}" +_ACEOF + + + +# bindir: +# default: "${exec_prefix}/bin" + + test "x$prefix" = xNONE && prefix="$ac_default_prefix" + test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + ac_expand=$bindir + test "x$ac_expand" = xNONE && ac_expand="$"NONE"" + ac_expand=`eval echo $ac_expand` + expanded_bindir=`eval echo $ac_expand` + + + ac_ndu=$expanded_bindir + case ":$ac_ndu:" in + ::) ac_ndu='.' ;; + :*[\\/]:) ac_ndu=`echo "$ac_ndu" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $sdccconf_h_dir_separator in + + *\\*) ac_ndu=`echo "$ac_ndu" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) ac_ndu=`echo "$ac_ndu" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac + cat >>confdefs.h <<_ACEOF +#define BINDIR "${ac_ndu}" +_ACEOF + + + +# datadir: +# default: "${prefix}/share" + + test "x$prefix" = xNONE && prefix="$ac_default_prefix" + test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + ac_expand=$datadir + test "x$ac_expand" = xNONE && ac_expand="$"NONE"" + ac_expand=`eval echo $ac_expand` + expanded_datadir=`eval echo $ac_expand` + + + ac_ndu=$expanded_datadir + case ":$ac_ndu:" in + ::) ac_ndu='.' ;; + :*[\\/]:) ac_ndu=`echo "$ac_ndu" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $sdccconf_h_dir_separator in + + *\\*) ac_ndu=`echo "$ac_ndu" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) ac_ndu=`echo "$ac_ndu" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac + cat >>confdefs.h <<_ACEOF +#define DATADIR "${ac_ndu}" +_ACEOF + + + +# include/lib suffix +norm_inc_dir_suffix=${include_dir_suffix} +case ":$norm_inc_dir_suffix:" in + ::) norm_inc_dir_suffix='.' ;; + :*[\\/]:) norm_inc_dir_suffix=`echo "$norm_inc_dir_suffix" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $sdccconf_h_dir_separator in + + *\\*) norm_inc_dir_suffix=`echo "$norm_inc_dir_suffix" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) norm_inc_dir_suffix=`echo "$norm_inc_dir_suffix" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac +cat >>confdefs.h <<_ACEOF +#define INCLUDE_DIR_SUFFIX DIR_SEPARATOR_STRING "${norm_inc_dir_suffix}" +_ACEOF + +norm_lib_dir_suffix=${lib_dir_suffix} +case ":$norm_lib_dir_suffix:" in + ::) norm_lib_dir_suffix='.' ;; + :*[\\/]:) norm_lib_dir_suffix=`echo "$norm_lib_dir_suffix" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $sdccconf_h_dir_separator in + + *\\*) norm_lib_dir_suffix=`echo "$norm_lib_dir_suffix" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) norm_lib_dir_suffix=`echo "$norm_lib_dir_suffix" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac +cat >>confdefs.h <<_ACEOF +#define LIB_DIR_SUFFIX DIR_SEPARATOR_STRING "${norm_lib_dir_suffix}" +_ACEOF + + +# relative paths +for _lcl_i in expanded_bindir:expanded_datadir:bin2data_dir; do + _lcl_from=\$`echo "$_lcl_i" | sed 's,:.*$,,'` + _lcl_to=\$`echo "$_lcl_i" | sed 's,^[^:]*:,,' | sed 's,:[^:]*$,,'` + _lcl_result_var=`echo "$_lcl_i" | sed 's,^.*:,,'` + _lcl_receval="$_lcl_from" +_lcl_from=`(test "x$prefix" = xNONE && prefix="$ac_default_prefix" + test "x$exec_prefix" = xNONE && exec_prefix="${prefix}" + _lcl_receval_old='' + while test "$_lcl_receval_old" != "$_lcl_receval"; do + _lcl_receval_old="$_lcl_receval" + eval _lcl_receval="\"$_lcl_receval\"" + done + echo "$_lcl_receval")` + _lcl_receval="$_lcl_to" +_lcl_to=`(test "x$prefix" = xNONE && prefix="$ac_default_prefix" + test "x$exec_prefix" = xNONE && exec_prefix="${prefix}" + _lcl_receval_old='' + while test "$_lcl_receval_old" != "$_lcl_receval"; do + _lcl_receval_old="$_lcl_receval" + eval _lcl_receval="\"$_lcl_receval\"" + done + echo "$_lcl_receval")` + _lcl_notation="$_lcl_from$_lcl_to" + case ":$_lcl_from:" in + ::) _lcl_from='.' ;; + :*[\\/]:) _lcl_from=`echo "$_lcl_from" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case '/' in + + *\\*) _lcl_from=`echo "$_lcl_from" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) _lcl_from=`echo "$_lcl_from" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac + case ":$_lcl_to:" in + ::) _lcl_to='.' ;; + :*[\\/]:) _lcl_to=`echo "$_lcl_to" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case '/' in + + *\\*) _lcl_to=`echo "$_lcl_to" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) _lcl_to=`echo "$_lcl_to" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac + _lcl_common_prefix='' +_lcl_second_prefix_match='' +while test "$_lcl_second_prefix_match" != 0; do + _lcl_first_prefix=`expr "x$_lcl_from" : "x\($_lcl_common_prefix/*[^/]*\)"` + _lcl_second_prefix_match=`expr "x$_lcl_to" : "x$_lcl_first_prefix"` + if test "$_lcl_second_prefix_match" != 0; then + if test "$_lcl_first_prefix" != "$_lcl_common_prefix"; then + _lcl_common_prefix="$_lcl_first_prefix" + else + _lcl_second_prefix_match=0 + fi + fi +done +_lcl_first_suffix=`expr "x$_lcl_from" : "x$_lcl_common_prefix/*\(.*\)"` +_lcl_first_rel='' +_lcl_tmp='xxx' +while test "$_lcl_tmp" != ''; do + _lcl_tmp=`expr "x$_lcl_first_suffix" : "x[^/]*/*\(.*\)"` + if test "$_lcl_first_suffix" != ''; then + _lcl_first_suffix="$_lcl_tmp" + _lcl_first_rel="../$_lcl_first_rel" + fi +done +_lcl_second_suffix=`expr "x$_lcl_to" : "x$_lcl_common_prefix/*\(.*\)"` +_lcl_result_tmp="$_lcl_first_rel$_lcl_second_suffix" + case ":$_lcl_result_tmp:" in + ::) _lcl_result_tmp='.' ;; + :*[\\/]:) _lcl_result_tmp=`echo "$_lcl_result_tmp" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case "$_lcl_notation" in + + *\\*) _lcl_result_tmp=`echo "$_lcl_result_tmp" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) _lcl_result_tmp=`echo "$_lcl_result_tmp" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac + eval $_lcl_result_var='$_lcl_result_tmp' +done +case ":$bin2data_dir:" in + ::) bin2data_dir='.' ;; + :*[\\/]:) bin2data_dir=`echo "$bin2data_dir" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $sdccconf_h_dir_separator in + + *\\*) bin2data_dir=`echo "$bin2data_dir" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) bin2data_dir=`echo "$bin2data_dir" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac +cat >>confdefs.h <<_ACEOF +#define BIN2DATA_DIR DIR_SEPARATOR_STRING "${bin2data_dir}" +_ACEOF + + +for _lcl_i in expanded_prefix:expanded_bindir:prefix2bin_dir; do + _lcl_from=\$`echo "$_lcl_i" | sed 's,:.*$,,'` + _lcl_to=\$`echo "$_lcl_i" | sed 's,^[^:]*:,,' | sed 's,:[^:]*$,,'` + _lcl_result_var=`echo "$_lcl_i" | sed 's,^.*:,,'` + _lcl_receval="$_lcl_from" +_lcl_from=`(test "x$prefix" = xNONE && prefix="$ac_default_prefix" + test "x$exec_prefix" = xNONE && exec_prefix="${prefix}" + _lcl_receval_old='' + while test "$_lcl_receval_old" != "$_lcl_receval"; do + _lcl_receval_old="$_lcl_receval" + eval _lcl_receval="\"$_lcl_receval\"" + done + echo "$_lcl_receval")` + _lcl_receval="$_lcl_to" +_lcl_to=`(test "x$prefix" = xNONE && prefix="$ac_default_prefix" + test "x$exec_prefix" = xNONE && exec_prefix="${prefix}" + _lcl_receval_old='' + while test "$_lcl_receval_old" != "$_lcl_receval"; do + _lcl_receval_old="$_lcl_receval" + eval _lcl_receval="\"$_lcl_receval\"" + done + echo "$_lcl_receval")` + _lcl_notation="$_lcl_from$_lcl_to" + case ":$_lcl_from:" in + ::) _lcl_from='.' ;; + :*[\\/]:) _lcl_from=`echo "$_lcl_from" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case '/' in + + *\\*) _lcl_from=`echo "$_lcl_from" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) _lcl_from=`echo "$_lcl_from" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac + case ":$_lcl_to:" in + ::) _lcl_to='.' ;; + :*[\\/]:) _lcl_to=`echo "$_lcl_to" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case '/' in + + *\\*) _lcl_to=`echo "$_lcl_to" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) _lcl_to=`echo "$_lcl_to" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac + _lcl_common_prefix='' +_lcl_second_prefix_match='' +while test "$_lcl_second_prefix_match" != 0; do + _lcl_first_prefix=`expr "x$_lcl_from" : "x\($_lcl_common_prefix/*[^/]*\)"` + _lcl_second_prefix_match=`expr "x$_lcl_to" : "x$_lcl_first_prefix"` + if test "$_lcl_second_prefix_match" != 0; then + if test "$_lcl_first_prefix" != "$_lcl_common_prefix"; then + _lcl_common_prefix="$_lcl_first_prefix" + else + _lcl_second_prefix_match=0 + fi + fi +done +_lcl_first_suffix=`expr "x$_lcl_from" : "x$_lcl_common_prefix/*\(.*\)"` +_lcl_first_rel='' +_lcl_tmp='xxx' +while test "$_lcl_tmp" != ''; do + _lcl_tmp=`expr "x$_lcl_first_suffix" : "x[^/]*/*\(.*\)"` + if test "$_lcl_first_suffix" != ''; then + _lcl_first_suffix="$_lcl_tmp" + _lcl_first_rel="../$_lcl_first_rel" + fi +done +_lcl_second_suffix=`expr "x$_lcl_to" : "x$_lcl_common_prefix/*\(.*\)"` +_lcl_result_tmp="$_lcl_first_rel$_lcl_second_suffix" + case ":$_lcl_result_tmp:" in + ::) _lcl_result_tmp='.' ;; + :*[\\/]:) _lcl_result_tmp=`echo "$_lcl_result_tmp" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case "$_lcl_notation" in + + *\\*) _lcl_result_tmp=`echo "$_lcl_result_tmp" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) _lcl_result_tmp=`echo "$_lcl_result_tmp" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac + eval $_lcl_result_var='$_lcl_result_tmp' +done +case ":$prefix2bin_dir:" in + ::) prefix2bin_dir='.' ;; + :*[\\/]:) prefix2bin_dir=`echo "$prefix2bin_dir" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $sdccconf_h_dir_separator in + + *\\*) prefix2bin_dir=`echo "$prefix2bin_dir" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) prefix2bin_dir=`echo "$prefix2bin_dir" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac +cat >>confdefs.h <<_ACEOF +#define PREFIX2BIN_DIR DIR_SEPARATOR_STRING "${prefix2bin_dir}" +_ACEOF + + +for _lcl_i in expanded_prefix:expanded_datadir:prefix2data_dir; do + _lcl_from=\$`echo "$_lcl_i" | sed 's,:.*$,,'` + _lcl_to=\$`echo "$_lcl_i" | sed 's,^[^:]*:,,' | sed 's,:[^:]*$,,'` + _lcl_result_var=`echo "$_lcl_i" | sed 's,^.*:,,'` + _lcl_receval="$_lcl_from" +_lcl_from=`(test "x$prefix" = xNONE && prefix="$ac_default_prefix" + test "x$exec_prefix" = xNONE && exec_prefix="${prefix}" + _lcl_receval_old='' + while test "$_lcl_receval_old" != "$_lcl_receval"; do + _lcl_receval_old="$_lcl_receval" + eval _lcl_receval="\"$_lcl_receval\"" + done + echo "$_lcl_receval")` + _lcl_receval="$_lcl_to" +_lcl_to=`(test "x$prefix" = xNONE && prefix="$ac_default_prefix" + test "x$exec_prefix" = xNONE && exec_prefix="${prefix}" + _lcl_receval_old='' + while test "$_lcl_receval_old" != "$_lcl_receval"; do + _lcl_receval_old="$_lcl_receval" + eval _lcl_receval="\"$_lcl_receval\"" + done + echo "$_lcl_receval")` + _lcl_notation="$_lcl_from$_lcl_to" + case ":$_lcl_from:" in + ::) _lcl_from='.' ;; + :*[\\/]:) _lcl_from=`echo "$_lcl_from" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case '/' in + + *\\*) _lcl_from=`echo "$_lcl_from" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) _lcl_from=`echo "$_lcl_from" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac + case ":$_lcl_to:" in + ::) _lcl_to='.' ;; + :*[\\/]:) _lcl_to=`echo "$_lcl_to" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case '/' in + + *\\*) _lcl_to=`echo "$_lcl_to" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) _lcl_to=`echo "$_lcl_to" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac + _lcl_common_prefix='' +_lcl_second_prefix_match='' +while test "$_lcl_second_prefix_match" != 0; do + _lcl_first_prefix=`expr "x$_lcl_from" : "x\($_lcl_common_prefix/*[^/]*\)"` + _lcl_second_prefix_match=`expr "x$_lcl_to" : "x$_lcl_first_prefix"` + if test "$_lcl_second_prefix_match" != 0; then + if test "$_lcl_first_prefix" != "$_lcl_common_prefix"; then + _lcl_common_prefix="$_lcl_first_prefix" + else + _lcl_second_prefix_match=0 + fi + fi +done +_lcl_first_suffix=`expr "x$_lcl_from" : "x$_lcl_common_prefix/*\(.*\)"` +_lcl_first_rel='' +_lcl_tmp='xxx' +while test "$_lcl_tmp" != ''; do + _lcl_tmp=`expr "x$_lcl_first_suffix" : "x[^/]*/*\(.*\)"` + if test "$_lcl_first_suffix" != ''; then + _lcl_first_suffix="$_lcl_tmp" + _lcl_first_rel="../$_lcl_first_rel" + fi +done +_lcl_second_suffix=`expr "x$_lcl_to" : "x$_lcl_common_prefix/*\(.*\)"` +_lcl_result_tmp="$_lcl_first_rel$_lcl_second_suffix" + case ":$_lcl_result_tmp:" in + ::) _lcl_result_tmp='.' ;; + :*[\\/]:) _lcl_result_tmp=`echo "$_lcl_result_tmp" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case "$_lcl_notation" in + + *\\*) _lcl_result_tmp=`echo "$_lcl_result_tmp" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) _lcl_result_tmp=`echo "$_lcl_result_tmp" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac + eval $_lcl_result_var='$_lcl_result_tmp' +done +case ":$prefix2data_dir:" in + ::) prefix2data_dir='.' ;; + :*[\\/]:) prefix2data_dir=`echo "$prefix2data_dir" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $sdccconf_h_dir_separator in + + *\\*) prefix2data_dir=`echo "$prefix2data_dir" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) prefix2data_dir=`echo "$prefix2data_dir" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac +if test "${prefix2data_dir}" = "."; then + # small optimization for Mingw32; otherwise Borut will complain ;-) + cat >>confdefs.h <<_ACEOF +#define PREFIX2DATA_DIR "" +_ACEOF + +else + cat >>confdefs.h <<_ACEOF +#define PREFIX2DATA_DIR DIR_SEPARATOR_STRING "${prefix2data_dir}" +_ACEOF + +fi + +# standard libs +cat >>confdefs.h <<_ACEOF +#define STD_LIB "libsdcc" +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define STD_INT_LIB "libint" +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define STD_LONG_LIB "liblong" +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define STD_FP_LIB "libfloat" +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define STD_DS390_LIB "libds390" +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define STD_DS400_LIB "libds400" +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define STD_XA51_LIB "libxa51" +_ACEOF + + +# SDCC runtime environment variables +sdcc_dir_name="SDCC_HOME" +cat >>confdefs.h <<_ACEOF +#define SDCC_DIR_NAME "${sdcc_dir_name}" +_ACEOF + + +sdcc_include_name="SDCC_INCLUDE" +cat >>confdefs.h <<_ACEOF +#define SDCC_INCLUDE_NAME "${sdcc_include_name}" +_ACEOF + + +sdcc_lib_name="SDCC_LIB" +cat >>confdefs.h <<_ACEOF +#define SDCC_LIB_NAME "${sdcc_lib_name}" +_ACEOF + + +# Port selection helper +# =========================================================================== +# macro AC_DO_ENABLER() +# $1 used to access enable_$1, e.g. enable_doc +# $2 OPT_DISABLE_$2, normally uppercase of $1, e.g. DOC +# $3 help string + + +# macro AC_DO_DISABLER() +# $1 used to access disable_$1, e.g. ucsim +# $2 OPT_DISABLE_$2, normally uppercase of $1, e.g. UCSIM +# $3 help string + + +# macro AC_DO_PORT($1, $2, $3, $4) +# $1 used to access enable_$2_port, e.g. gbz80 +# $2 port name in ports.all and ports.build, e.g. z80 +# $3 OPT_DISABLE_$3, normally uppercase of $2, e.g. GBZ80 +# $4 help string + + +# Now handle the port selection +# =========================================================================== +rm -f ports.all ports.build + + # Check whether --enable-mcs51-port was given. +if test "${enable_mcs51_port+set}" = set; then + enableval=$enable_mcs51_port; +fi + + + if test "$enable_mcs51_port" = "no"; then + OPT_DISABLE_MCS51=1 + else + enable_mcs51_port="yes" + OPT_DISABLE_MCS51=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_DISABLE_MCS51 $OPT_DISABLE_MCS51 +_ACEOF + + + + echo mcs51 >>ports.all + if test $OPT_DISABLE_MCS51 = 0; then + echo mcs51 >>ports.build + fi + + + # Check whether --enable-gbz80-port was given. +if test "${enable_gbz80_port+set}" = set; then + enableval=$enable_gbz80_port; +fi + + + if test "$enable_gbz80_port" = "no"; then + OPT_DISABLE_GBZ80=1 + else + enable_gbz80_port="yes" + OPT_DISABLE_GBZ80=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_DISABLE_GBZ80 $OPT_DISABLE_GBZ80 +_ACEOF + + + + echo z80 >>ports.all + if test $OPT_DISABLE_GBZ80 = 0; then + echo z80 >>ports.build + fi + + + # Check whether --enable-z80-port was given. +if test "${enable_z80_port+set}" = set; then + enableval=$enable_z80_port; +fi + + + if test "$enable_z80_port" = "no"; then + OPT_DISABLE_Z80=1 + else + enable_z80_port="yes" + OPT_DISABLE_Z80=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_DISABLE_Z80 $OPT_DISABLE_Z80 +_ACEOF + + + + echo z80 >>ports.all + if test $OPT_DISABLE_Z80 = 0; then + echo z80 >>ports.build + fi + + + # Check whether --enable-avr-port was given. +if test "${enable_avr_port+set}" = set; then + enableval=$enable_avr_port; +fi + + + if test "$enable_avr_port" = "no"; then + OPT_DISABLE_AVR=1 + else + enable_avr_port="yes" + OPT_DISABLE_AVR=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_DISABLE_AVR $OPT_DISABLE_AVR +_ACEOF + + + + echo avr >>ports.all + if test $OPT_DISABLE_AVR = 0; then + echo avr >>ports.build + fi + + + # Check whether --enable-ds390-port was given. +if test "${enable_ds390_port+set}" = set; then + enableval=$enable_ds390_port; +fi + + + if test "$enable_ds390_port" = "no"; then + OPT_DISABLE_DS390=1 + else + enable_ds390_port="yes" + OPT_DISABLE_DS390=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_DISABLE_DS390 $OPT_DISABLE_DS390 +_ACEOF + + + + echo ds390 >>ports.all + if test $OPT_DISABLE_DS390 = 0; then + echo ds390 >>ports.build + fi + +cat >>confdefs.h <<_ACEOF +#define OPT_DISABLE_TININative $OPT_DISABLE_DS390 +_ACEOF + + + # Check whether --enable-ds400-port was given. +if test "${enable_ds400_port+set}" = set; then + enableval=$enable_ds400_port; +fi + + + if test "$enable_ds400_port" = "no"; then + OPT_DISABLE_DS400=1 + else + enable_ds400_port="yes" + OPT_DISABLE_DS400=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_DISABLE_DS400 $OPT_DISABLE_DS400 +_ACEOF + + + + echo ds400 >>ports.all + if test $OPT_DISABLE_DS400 = 0; then + echo ds400 >>ports.build + fi + + + # Check whether --enable-pic-port was given. +if test "${enable_pic_port+set}" = set; then + enableval=$enable_pic_port; +fi + + + if test "$enable_pic_port" = "no"; then + OPT_DISABLE_PIC=1 + else + enable_pic_port="yes" + OPT_DISABLE_PIC=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_DISABLE_PIC $OPT_DISABLE_PIC +_ACEOF + + + + echo pic >>ports.all + if test $OPT_DISABLE_PIC = 0; then + echo pic >>ports.build + fi + + + # Check whether --enable-pic16-port was given. +if test "${enable_pic16_port+set}" = set; then + enableval=$enable_pic16_port; +fi + + + if test "$enable_pic16_port" = "no"; then + OPT_DISABLE_PIC16=1 + else + enable_pic16_port="yes" + OPT_DISABLE_PIC16=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_DISABLE_PIC16 $OPT_DISABLE_PIC16 +_ACEOF + + + + echo pic16 >>ports.all + if test $OPT_DISABLE_PIC16 = 0; then + echo pic16 >>ports.build + fi + + + # Check whether --enable-xa51-port was given. +if test "${enable_xa51_port+set}" = set; then + enableval=$enable_xa51_port; +fi + + + if test "$enable_xa51_port" = "no"; then + OPT_DISABLE_XA51=1 + else + enable_xa51_port="yes" + OPT_DISABLE_XA51=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_DISABLE_XA51 $OPT_DISABLE_XA51 +_ACEOF + + + + echo xa51 >>ports.all + if test $OPT_DISABLE_XA51 = 0; then + echo xa51 >>ports.build + fi + + + # Check whether --enable-hc08-port was given. +if test "${enable_hc08_port+set}" = set; then + enableval=$enable_hc08_port; +fi + + + if test "$enable_hc08_port" = "no"; then + OPT_DISABLE_HC08=1 + else + enable_hc08_port="yes" + OPT_DISABLE_HC08=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_DISABLE_HC08 $OPT_DISABLE_HC08 +_ACEOF + + + + echo hc08 >>ports.all + if test $OPT_DISABLE_HC08 = 0; then + echo hc08 >>ports.build + fi + + + + # Check whether --enable-ucsim was given. +if test "${enable_ucsim+set}" = set; then + enableval=$enable_ucsim; +fi + + + arg1=`echo ucsim | sed s/-/_/` + + if test "`eval echo \\$enable_$arg1`" = "no"; then + OPT_DISABLE_UCSIM=1 + else + OPT_DISABLE_UCSIM=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_DISABLE_UCSIM $OPT_DISABLE_UCSIM +_ACEOF + + + + + # Check whether --enable-device-lib was given. +if test "${enable_device_lib+set}" = set; then + enableval=$enable_device_lib; +fi + + + arg1=`echo device-lib | sed s/-/_/` + + if test "`eval echo \\$enable_$arg1`" = "no"; then + OPT_DISABLE_DEVICE_LIB=1 + else + OPT_DISABLE_DEVICE_LIB=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_DISABLE_DEVICE_LIB $OPT_DISABLE_DEVICE_LIB +_ACEOF + + + + + # Check whether --enable-packihx was given. +if test "${enable_packihx+set}" = set; then + enableval=$enable_packihx; +fi + + + arg1=`echo packihx | sed s/-/_/` + + if test "`eval echo \\$enable_$arg1`" = "no"; then + OPT_DISABLE_PACKIHX=1 + else + OPT_DISABLE_PACKIHX=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_DISABLE_PACKIHX $OPT_DISABLE_PACKIHX +_ACEOF + + + + + # Check whether --enable-sdcpp was given. +if test "${enable_sdcpp+set}" = set; then + enableval=$enable_sdcpp; +fi + + + arg1=`echo sdcpp | sed s/-/_/` + + if test "`eval echo \\$enable_$arg1`" = "no"; then + OPT_DISABLE_SDCPP=1 + else + OPT_DISABLE_SDCPP=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_DISABLE_SDCPP $OPT_DISABLE_SDCPP +_ACEOF + + + + + # Check whether --enable-sdcdb was given. +if test "${enable_sdcdb+set}" = set; then + enableval=$enable_sdcdb; +fi + + + arg1=`echo sdcdb | sed s/-/_/` + + if test "`eval echo \\$enable_$arg1`" = "no"; then + OPT_DISABLE_SDCDB=1 + else + OPT_DISABLE_SDCDB=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_DISABLE_SDCDB $OPT_DISABLE_SDCDB +_ACEOF + + + + + + # Check whether --enable-doc was given. +if test "${enable_doc+set}" = set; then + enableval=$enable_doc; +fi + + + if test "$enable_doc" = "yes"; then + OPT_ENABLE_DOC=1 + else + OPT_ENABLE_DOC=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_ENABLE_DOC $OPT_ENABLE_DOC +_ACEOF + + + +# Extract the first word of "lyx", so it can be a program name with args. +set dummy lyx; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_LYX+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$LYX"; then + ac_cv_prog_LYX="$LYX" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_LYX="lyx" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_LYX" && ac_cv_prog_LYX=":" +fi +fi +LYX=$ac_cv_prog_LYX +if test -n "$LYX"; then + { $as_echo "$as_me:$LINENO: result: $LYX" >&5 +$as_echo "$LYX" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +# Extract the first word of "latex2html", so it can be a program name with args. +set dummy latex2html; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_LATEX2HTML+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$LATEX2HTML"; then + ac_cv_prog_LATEX2HTML="$LATEX2HTML" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_LATEX2HTML="latex2html" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_LATEX2HTML" && ac_cv_prog_LATEX2HTML=":" +fi +fi +LATEX2HTML=$ac_cv_prog_LATEX2HTML +if test -n "$LATEX2HTML"; then + { $as_echo "$as_me:$LINENO: result: $LATEX2HTML" >&5 +$as_echo "$LATEX2HTML" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +# Extract the first word of "pdflatex", so it can be a program name with args. +set dummy pdflatex; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_PDFLATEX+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$PDFLATEX"; then + ac_cv_prog_PDFLATEX="$PDFLATEX" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_PDFLATEX="pdflatex" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_PDFLATEX" && ac_cv_prog_PDFLATEX=":" +fi +fi +PDFLATEX=$ac_cv_prog_PDFLATEX +if test -n "$PDFLATEX"; then + { $as_echo "$as_me:$LINENO: result: $PDFLATEX" >&5 +$as_echo "$PDFLATEX" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +# Extract the first word of "pdfopt", so it can be a program name with args. +set dummy pdfopt; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_PDFOPT+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$PDFOPT"; then + ac_cv_prog_PDFOPT="$PDFOPT" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_PDFOPT="pdfopt" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_PDFOPT" && ac_cv_prog_PDFOPT=":" +fi +fi +PDFOPT=$ac_cv_prog_PDFOPT +if test -n "$PDFOPT"; then + { $as_echo "$as_me:$LINENO: result: $PDFOPT" >&5 +$as_echo "$PDFOPT" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +# Extract the first word of "makeindex", so it can be a program name with args. +set dummy makeindex; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_MAKEINDEX+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$MAKEINDEX"; then + ac_cv_prog_MAKEINDEX="$MAKEINDEX" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_MAKEINDEX="makeindex" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_MAKEINDEX" && ac_cv_prog_MAKEINDEX=":" +fi +fi +MAKEINDEX=$ac_cv_prog_MAKEINDEX +if test -n "$MAKEINDEX"; then + { $as_echo "$as_me:$LINENO: result: $MAKEINDEX" >&5 +$as_echo "$MAKEINDEX" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + + +if test $OPT_ENABLE_DOC = 1; then + if test "$LYX" = ":"; then + { { $as_echo "$as_me:$LINENO: error: Cannot find required program lyx." >&5 +$as_echo "$as_me: error: Cannot find required program lyx." >&2;} + { (exit 1); exit 1; }; } + fi + + if test "$LATEX2HTML" = ":"; then + { { $as_echo "$as_me:$LINENO: error: Cannot find required program latex2html." >&5 +$as_echo "$as_me: error: Cannot find required program latex2html." >&2;} + { (exit 1); exit 1; }; } + fi + + if test "$PDFLATEX" = ":"; then + { { $as_echo "$as_me:$LINENO: error: Cannot find required program pdflatex." >&5 +$as_echo "$as_me: error: Cannot find required program pdflatex." >&2;} + { (exit 1); exit 1; }; } + fi + + if test "$PDFOPT" = ":"; then + { { $as_echo "$as_me:$LINENO: error: Cannot find required program pdfopt." >&5 +$as_echo "$as_me: error: Cannot find required program pdfopt." >&2;} + { (exit 1); exit 1; }; } + fi + + if test "$MAKEINDEX" = ":"; then + { { $as_echo "$as_me:$LINENO: error: Cannot find required program makeindex." >&5 +$as_echo "$as_me: error: Cannot find required program makeindex." >&2;} + { (exit 1); exit 1; }; } + fi + +fi + + + # Check whether --enable-libgc was given. +if test "${enable_libgc+set}" = set; then + enableval=$enable_libgc; +fi + + + if test "$enable_libgc" = "yes"; then + OPT_ENABLE_LIBGC=1 + else + OPT_ENABLE_LIBGC=0 + fi + + cat >>confdefs.h <<_ACEOF +#define OPT_ENABLE_LIBGC $OPT_ENABLE_LIBGC +_ACEOF + + + +if test $OPT_ENABLE_LIBGC = 1; then + +{ $as_echo "$as_me:$LINENO: checking for GC_malloc in -lgc" >&5 +$as_echo_n "checking for GC_malloc in -lgc... " >&6; } +if test "${ac_cv_lib_gc_GC_malloc+set}" = set; then + $as_echo_n "(cached) " >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-lgc $LIBS" +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char GC_malloc (); +int +main () +{ +return GC_malloc (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\"" +$as_echo "$ac_try_echo") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + $as_echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && { + test "$cross_compiling" = yes || + $as_test_x conftest$ac_exeext + }; then + ac_cv_lib_gc_GC_malloc=yes +else + $as_echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_lib_gc_GC_malloc=no +fi + +rm -rf conftest.dSYM +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ $as_echo "$as_me:$LINENO: result: $ac_cv_lib_gc_GC_malloc" >&5 +$as_echo "$ac_cv_lib_gc_GC_malloc" >&6; } +if test "x$ac_cv_lib_gc_GC_malloc" = x""yes; then + cat >>confdefs.h <<_ACEOF +#define HAVE_LIBGC 1 +_ACEOF + + LIBS="-lgc $LIBS" + +fi + + if test $ac_cv_lib_gc_GC_malloc = no; then + { { $as_echo "$as_me:$LINENO: error: Cannot find library libgc with Bohem memory allocator." >&5 +$as_echo "$as_me: error: Cannot find library libgc with Bohem memory allocator." >&2;} + { (exit 1); exit 1; }; } + fi +fi + +#remove duplicates +uniq ports.all ports +mv ports ports.all +uniq ports.build ports +mv ports ports.build + +# Generating output files +# =========================================================================== +test $OPT_DISABLE_SDCPP = 0 && + +subdirs="$subdirs support/cpp" + +test $OPT_DISABLE_PACKIHX = 0 && subdirs="$subdirs support/packihx" + +test $OPT_DISABLE_UCSIM = 0 && subdirs="$subdirs sim/ucsim" + +test $OPT_DISABLE_SDCDB = 0 && subdirs="$subdirs debugger/mcs51" + +ac_config_files="$ac_config_files doc/Makefile" + + +test $OPT_DISABLE_AVR = 0 && ac_config_files="$ac_config_files src/avr/Makefile" + + +if test $OPT_DISABLE_DS390 = 0; then + ac_config_files="$ac_config_files src/ds390/Makefile" + + test $OPT_DISABLE_DEVICE_LIB = 0 && ac_config_files="$ac_config_files device/lib/ds390/Makefile" + +fi + +if test $OPT_DISABLE_DS400 = 0; then + ac_config_files="$ac_config_files src/ds400/Makefile" + + test $OPT_DISABLE_DEVICE_LIB = 0 && ac_config_files="$ac_config_files device/lib/ds400/Makefile" + +fi + +if test $OPT_DISABLE_HC08 = 0; then + ac_config_files="$ac_config_files src/hc08/Makefile as/hc08/Makefile as/link/hc08/Makefile" + + test $OPT_DISABLE_DEVICE_LIB = 0 && ac_config_files="$ac_config_files device/lib/hc08/Makefile" + +fi + +if test $OPT_DISABLE_MCS51 = 0; then + ac_config_files="$ac_config_files src/mcs51/Makefile as/mcs51/Makefile as/link/mcs51/Makefile" + + test $OPT_DISABLE_DEVICE_LIB = 0 && ac_config_files="$ac_config_files device/lib/mcs51/Makefile device/lib/small/Makefile device/lib/medium/Makefile device/lib/large/Makefile" + +fi + +if test $OPT_DISABLE_PIC = 0; then + ac_config_files="$ac_config_files src/pic/Makefile" + + test $OPT_DISABLE_DEVICE_LIB = 0 && subdirs="$subdirs device/lib/pic" + +fi +if test $OPT_DISABLE_PIC16 = 0; then + ac_config_files="$ac_config_files src/pic16/Makefile" + + test $OPT_DISABLE_DEVICE_LIB = 0 && subdirs="$subdirs device/lib/pic16" + +fi + +test $OPT_DISABLE_XA51 = 0 && ac_config_files="$ac_config_files src/xa51/Makefile" + + +if test $OPT_DISABLE_Z80 = 0; then + ac_config_files="$ac_config_files src/z80/Makefile as/Makefile as/z80/Makefile as/link/Makefile as/link/z80/Makefile" + + test $OPT_DISABLE_DEVICE_LIB = 0 && ac_config_files="$ac_config_files device/lib/z80/Makefile device/lib/gbz80/Makefile" + +fi + +test $OPT_DISABLE_DEVICE_LIB = 0 && ac_config_files="$ac_config_files device/lib/Makefile" + + +ac_config_files="$ac_config_files main.mk:main_in.mk src/Makefile device/include/Makefile as/asranlib/Makefile support/librarian/Makefile support/makebin/Makefile support/regression/Makefile support/valdiag/Makefile Makefile Makefile.common:Makefile.common.in" + +cat >confcache <<\_ACEOF +# This file is a shell script that caches the results of configure +# tests run on this system so they can be shared between configure +# scripts and configure runs, see configure's option --config-cache. +# It is not useful on other systems. If it contains results you don't +# want to keep, you may remove or edit it. +# +# config.status only pays attention to the cache file if you give it +# the --recheck option to rerun configure. +# +# `ac_cv_env_foo' variables (set or unset) will be overridden when +# loading this file, other *unset* `ac_cv_foo' will be assigned the +# following values. + +_ACEOF + +# The following way of writing the cache mishandles newlines in values, +# but we know of no workaround that is simple, portable, and efficient. +# So, we kill variables containing newlines. +# Ultrix sh set writes to stderr and can't be redirected directly, +# and sets the high bit in the cache file unless we assign to the vars. +( + for ac_var in `(set) 2>&1 | sed -n 's/^\([a-zA-Z_][a-zA-Z0-9_]*\)=.*/\1/p'`; do + eval ac_val=\$$ac_var + case $ac_val in #( + *${as_nl}*) + case $ac_var in #( + *_cv_*) { $as_echo "$as_me:$LINENO: WARNING: cache variable $ac_var contains a newline" >&5 +$as_echo "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;; + esac + case $ac_var in #( + _ | IFS | as_nl) ;; #( + BASH_ARGV | BASH_SOURCE) eval $ac_var= ;; #( + *) $as_unset $ac_var ;; + esac ;; + esac + done + + (set) 2>&1 | + case $as_nl`(ac_space=' '; set) 2>&1` in #( + *${as_nl}ac_space=\ *) + # `set' does not quote correctly, so add quotes (double-quote + # substitution turns \\\\ into \\, and sed turns \\ into \). + sed -n \ + "s/'/'\\\\''/g; + s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='\\2'/p" + ;; #( + *) + # `set' quotes correctly as required by POSIX, so do not add quotes. + sed -n "/^[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*=/p" + ;; + esac | + sort +) | + sed ' + /^ac_cv_env_/b end + t clear + :clear + s/^\([^=]*\)=\(.*[{}].*\)$/test "${\1+set}" = set || &/ + t end + s/^\([^=]*\)=\(.*\)$/\1=${\1=\2}/ + :end' >>confcache +if diff "$cache_file" confcache >/dev/null 2>&1; then :; else + if test -w "$cache_file"; then + test "x$cache_file" != "x/dev/null" && + { $as_echo "$as_me:$LINENO: updating cache $cache_file" >&5 +$as_echo "$as_me: updating cache $cache_file" >&6;} + cat confcache >$cache_file + else + { $as_echo "$as_me:$LINENO: not updating unwritable cache $cache_file" >&5 +$as_echo "$as_me: not updating unwritable cache $cache_file" >&6;} + fi +fi +rm -f confcache + +test "x$prefix" = xNONE && prefix=$ac_default_prefix +# Let make expand exec_prefix. +test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + +DEFS=-DHAVE_CONFIG_H + +ac_libobjs= +ac_ltlibobjs= +for ac_i in : $LIBOBJS; do test "x$ac_i" = x: && continue + # 1. Remove the extension, and $U if already installed. + ac_script='s/\$U\././;s/\.o$//;s/\.obj$//' + ac_i=`$as_echo "$ac_i" | sed "$ac_script"` + # 2. Prepend LIBOBJDIR. When used with automake>=1.10 LIBOBJDIR + # will be set to the directory where LIBOBJS objects are built. + ac_libobjs="$ac_libobjs \${LIBOBJDIR}$ac_i\$U.$ac_objext" + ac_ltlibobjs="$ac_ltlibobjs \${LIBOBJDIR}$ac_i"'$U.lo' +done +LIBOBJS=$ac_libobjs + +LTLIBOBJS=$ac_ltlibobjs + + + +: ${CONFIG_STATUS=./config.status} +ac_write_fail=0 +ac_clean_files_save=$ac_clean_files +ac_clean_files="$ac_clean_files $CONFIG_STATUS" +{ $as_echo "$as_me:$LINENO: creating $CONFIG_STATUS" >&5 +$as_echo "$as_me: creating $CONFIG_STATUS" >&6;} +cat >$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 +#! $SHELL +# Generated by $as_me. +# Run this file to recreate the current configuration. +# Compiler output produced by configure, useful for debugging +# configure, is in config.log if it exists. + +debug=false +ac_cs_recheck=false +ac_cs_silent=false +SHELL=\${CONFIG_SHELL-$SHELL} +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 +## --------------------- ## +## M4sh Initialization. ## +## --------------------- ## + +# Be more Bourne compatible +DUALCASE=1; export DUALCASE # for MKS sh +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in + *posix*) set -o posix ;; +esac + +fi + + + + +# PATH needs CR +# Avoid depending upon Character Ranges. +as_cr_letters='abcdefghijklmnopqrstuvwxyz' +as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +as_cr_Letters=$as_cr_letters$as_cr_LETTERS +as_cr_digits='0123456789' +as_cr_alnum=$as_cr_Letters$as_cr_digits + +as_nl=' +' +export as_nl +# Printing a long string crashes Solaris 7 /usr/bin/printf. +as_echo='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\' +as_echo=$as_echo$as_echo$as_echo$as_echo$as_echo +as_echo=$as_echo$as_echo$as_echo$as_echo$as_echo$as_echo +if (test "X`printf %s $as_echo`" = "X$as_echo") 2>/dev/null; then + as_echo='printf %s\n' + as_echo_n='printf %s' +else + if test "X`(/usr/ucb/echo -n -n $as_echo) 2>/dev/null`" = "X-n $as_echo"; then + as_echo_body='eval /usr/ucb/echo -n "$1$as_nl"' + as_echo_n='/usr/ucb/echo -n' + else + as_echo_body='eval expr "X$1" : "X\\(.*\\)"' + as_echo_n_body='eval + arg=$1; + case $arg in + *"$as_nl"*) + expr "X$arg" : "X\\(.*\\)$as_nl"; + arg=`expr "X$arg" : ".*$as_nl\\(.*\\)"`;; + esac; + expr "X$arg" : "X\\(.*\\)" | tr -d "$as_nl" + ' + export as_echo_n_body + as_echo_n='sh -c $as_echo_n_body as_echo' + fi + export as_echo_body + as_echo='sh -c $as_echo_body as_echo' +fi + +# The user is always right. +if test "${PATH_SEPARATOR+set}" != set; then + PATH_SEPARATOR=: + (PATH='/bin;/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 && { + (PATH='/bin:/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 || + PATH_SEPARATOR=';' + } +fi + +# Support unset when possible. +if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then + as_unset=unset +else + as_unset=false +fi + + +# IFS +# We need space, tab and new line, in precisely that order. Quoting is +# there to prevent editors from complaining about space-tab. +# (If _AS_PATH_WALK were called with IFS unset, it would disable word +# splitting by setting IFS to empty value.) +IFS=" "" $as_nl" + +# Find who we are. Look in the path if we contain no directory separator. +case $0 in + *[\\/]* ) as_myself=$0 ;; + *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break +done +IFS=$as_save_IFS + + ;; +esac +# We did not find ourselves, most probably we were run as `sh COMMAND' +# in which case we are not to be found in the path. +if test "x$as_myself" = x; then + as_myself=$0 +fi +if test ! -f "$as_myself"; then + $as_echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2 + { (exit 1); exit 1; } +fi + +# Work around bugs in pre-3.0 UWIN ksh. +for as_var in ENV MAIL MAILPATH +do ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var +done +PS1='$ ' +PS2='> ' +PS4='+ ' + +# NLS nuisances. +LC_ALL=C +export LC_ALL +LANGUAGE=C +export LANGUAGE + +# Required to use basename. +if expr a : '\(a\)' >/dev/null 2>&1 && + test "X`expr 00001 : '.*\(...\)'`" = X001; then + as_expr=expr +else + as_expr=false +fi + +if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then + as_basename=basename +else + as_basename=false +fi + + +# Name of the executable. +as_me=`$as_basename -- "$0" || +$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \ + X"$0" : 'X\(//\)$' \| \ + X"$0" : 'X\(/\)' \| . 2>/dev/null || +$as_echo X/"$0" | + sed '/^.*\/\([^/][^/]*\)\/*$/{ + s//\1/ + q + } + /^X\/\(\/\/\)$/{ + s//\1/ + q + } + /^X\/\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + +# CDPATH. +$as_unset CDPATH + + + + as_lineno_1=$LINENO + as_lineno_2=$LINENO + test "x$as_lineno_1" != "x$as_lineno_2" && + test "x`expr $as_lineno_1 + 1`" = "x$as_lineno_2" || { + + # Create $as_me.lineno as a copy of $as_myself, but with $LINENO + # uniformly replaced by the line number. The first 'sed' inserts a + # line-number line after each line using $LINENO; the second 'sed' + # does the real work. The second script uses 'N' to pair each + # line-number line with the line containing $LINENO, and appends + # trailing '-' during substitution so that $LINENO is not a special + # case at line end. + # (Raja R Harinath suggested sed '=', and Paul Eggert wrote the + # scripts with optimization help from Paolo Bonzini. Blame Lee + # E. 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exit ;; + -q | -quiet | --quiet | --quie | --qui | --qu | --q \ + | -silent | --silent | --silen | --sile | --sil | --si | --s) + ac_cs_silent=: ;; + + # This is an error. + -*) { $as_echo "$as_me: error: unrecognized option: $1 +Try \`$0 --help' for more information." >&2 + { (exit 1); exit 1; }; } ;; + + *) ac_config_targets="$ac_config_targets $1" + ac_need_defaults=false ;; + + esac + shift +done + +ac_configure_extra_args= + +if $ac_cs_silent; then + exec 6>/dev/null + ac_configure_extra_args="$ac_configure_extra_args --silent" +fi + +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 +if \$ac_cs_recheck; then + set X '$SHELL' '$0' $ac_configure_args \$ac_configure_extra_args --no-create --no-recursion + shift + \$as_echo "running CONFIG_SHELL=$SHELL \$*" >&6 + CONFIG_SHELL='$SHELL' + export CONFIG_SHELL + exec "\$@" +fi + +_ACEOF +cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 +exec 5>>config.log +{ + echo + sed 'h;s/./-/g;s/^.../## /;s/...$/ ##/;p;x;p;x' <<_ASBOX +## Running $as_me. ## +_ASBOX + $as_echo "$ac_log" +} >&5 + +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 + +# Handling of arguments. +for ac_config_target in $ac_config_targets +do + case $ac_config_target in + "sdccconf.h") CONFIG_HEADERS="$CONFIG_HEADERS sdccconf.h:sdccconf_in.h" ;; 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+ + *) { { $as_echo "$as_me:$LINENO: error: invalid argument: $ac_config_target" >&5 +$as_echo "$as_me: error: invalid argument: $ac_config_target" >&2;} + { (exit 1); exit 1; }; };; + esac +done + + +# If the user did not use the arguments to specify the items to instantiate, +# then the envvar interface is used. Set only those that are not. +# We use the long form for the default assignment because of an extremely +# bizarre bug on SunOS 4.1.3. +if $ac_need_defaults; then + test "${CONFIG_FILES+set}" = set || CONFIG_FILES=$config_files + test "${CONFIG_HEADERS+set}" = set || CONFIG_HEADERS=$config_headers +fi + +# Have a temporary directory for convenience. Make it in the build tree +# simply because there is no reason against having it here, and in addition, +# creating and moving files from /tmp can sometimes cause problems. +# Hook for its removal unless debugging. +# Note that there is a small window in which the directory will not be cleaned: +# after its creation but before its name has been assigned to `$tmp'. +$debug || +{ + tmp= + trap 'exit_status=$? + { test -z "$tmp" || test ! -d "$tmp" || rm -fr "$tmp"; } && exit $exit_status +' 0 + trap '{ (exit 1); exit 1; }' 1 2 13 15 +} +# Create a (secure) tmp directory for tmp files. + +{ + tmp=`(umask 077 && mktemp -d "./confXXXXXX") 2>/dev/null` && + test -n "$tmp" && test -d "$tmp" +} || +{ + tmp=./conf$$-$RANDOM + (umask 077 && mkdir "$tmp") +} || +{ + $as_echo "$as_me: cannot create a temporary directory in ." >&2 + { (exit 1); exit 1; } +} + +# Set up the scripts for CONFIG_FILES section. +# No need to generate them if there are no CONFIG_FILES. +# This happens for instance with `./config.status config.h'. +if test -n "$CONFIG_FILES"; then + + +ac_cr=' +' +ac_cs_awk_cr=`$AWK 'BEGIN { print "a\rb" }' /dev/null` +if test "$ac_cs_awk_cr" = "a${ac_cr}b"; then + ac_cs_awk_cr='\\r' +else + ac_cs_awk_cr=$ac_cr +fi + +echo 'BEGIN {' >"$tmp/subs1.awk" && +_ACEOF + + +{ + echo "cat >conf$$subs.awk <<_ACEOF" && + echo "$ac_subst_vars" | sed 's/.*/&!$&$ac_delim/' && + echo "_ACEOF" +} >conf$$subs.sh || + { { $as_echo "$as_me:$LINENO: error: could not make $CONFIG_STATUS" >&5 +$as_echo "$as_me: error: could not make $CONFIG_STATUS" >&2;} + { (exit 1); exit 1; }; } +ac_delim_num=`echo "$ac_subst_vars" | grep -c '$'` +ac_delim='%!_!# ' +for ac_last_try in false false false false false :; do + . ./conf$$subs.sh || + { { $as_echo "$as_me:$LINENO: error: could not make $CONFIG_STATUS" >&5 +$as_echo "$as_me: error: could not make $CONFIG_STATUS" >&2;} + { (exit 1); exit 1; }; } + + ac_delim_n=`sed -n "s/.*$ac_delim\$/X/p" conf$$subs.awk | grep -c X` + if test $ac_delim_n = $ac_delim_num; then + break + elif $ac_last_try; then + { { $as_echo "$as_me:$LINENO: error: could not make $CONFIG_STATUS" >&5 +$as_echo "$as_me: error: could not make $CONFIG_STATUS" >&2;} + { (exit 1); exit 1; }; } + else + ac_delim="$ac_delim!$ac_delim _$ac_delim!! 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Preserve backslash +# newline sequences. + +ac_word_re=[_$as_cr_Letters][_$as_cr_alnum]* +sed -n ' +s/.\{148\}/&'"$ac_delim"'/g +t rset +:rset +s/^[ ]*#[ ]*define[ ][ ]*/ / +t def +d +:def +s/\\$// +t bsnl +s/["\\]/\\&/g +s/^ \('"$ac_word_re"'\)\(([^()]*)\)[ ]*\(.*\)/P["\1"]="\2"\ +D["\1"]=" \3"/p +s/^ \('"$ac_word_re"'\)[ ]*\(.*\)/D["\1"]=" \2"/p +d +:bsnl +s/["\\]/\\&/g +s/^ \('"$ac_word_re"'\)\(([^()]*)\)[ ]*\(.*\)/P["\1"]="\2"\ +D["\1"]=" \3\\\\\\n"\\/p +t cont +s/^ \('"$ac_word_re"'\)[ ]*\(.*\)/D["\1"]=" \2\\\\\\n"\\/p +t cont +d +:cont +n +s/.\{148\}/&'"$ac_delim"'/g +t clear +:clear +s/\\$// +t bsnlc +s/["\\]/\\&/g; s/^/"/; s/$/"/p +d +:bsnlc +s/["\\]/\\&/g; s/^/"/; s/$/\\\\\\n"\\/p +b cont +' >$CONFIG_STATUS || ac_write_fail=1 + +cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 + for (key in D) D_is_set[key] = 1 + FS = "" +} +/^[\t ]*#[\t ]*(define|undef)[\t ]+$ac_word_re([\t (]|\$)/ { + line = \$ 0 + split(line, arg, " ") + if (arg[1] == "#") { + defundef = arg[2] + mac1 = arg[3] + } else { + defundef = substr(arg[1], 2) + mac1 = arg[2] + } + split(mac1, mac2, "(") #) + macro = mac2[1] + prefix = substr(line, 1, index(line, defundef) - 1) + if (D_is_set[macro]) { + # Preserve the white space surrounding the "#". + print prefix "define", macro P[macro] D[macro] + next + } else { + # Replace #undef with comments. This is necessary, for example, + # in the case of _POSIX_SOURCE, which is predefined and required + # on some systems where configure will not decide to define it. + if (defundef == "undef") { + print "/*", prefix defundef, macro, "*/" + next + } + } +} +{ print } +_ACAWK +_ACEOF +cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 + { { $as_echo "$as_me:$LINENO: error: could not setup config headers machinery" >&5 +$as_echo "$as_me: error: could not setup config headers machinery" >&2;} + { (exit 1); exit 1; }; } +fi # test -n "$CONFIG_HEADERS" + + +eval set X " :F $CONFIG_FILES :H $CONFIG_HEADERS " +shift +for ac_tag +do + case $ac_tag in + :[FHLC]) ac_mode=$ac_tag; continue;; + esac + case $ac_mode$ac_tag in + :[FHL]*:*);; + :L* | :C*:*) { { $as_echo "$as_me:$LINENO: error: invalid tag $ac_tag" >&5 +$as_echo "$as_me: error: invalid tag $ac_tag" >&2;} + { (exit 1); exit 1; }; };; + :[FH]-) ac_tag=-:-;; + :[FH]*) ac_tag=$ac_tag:$ac_tag.in;; + esac + ac_save_IFS=$IFS + IFS=: + set x $ac_tag + IFS=$ac_save_IFS + shift + ac_file=$1 + shift + + case $ac_mode in + :L) ac_source=$1;; + :[FH]) + ac_file_inputs= + for ac_f + do + case $ac_f in + -) ac_f="$tmp/stdin";; + *) # Look for the file first in the build tree, then in the source tree + # (if the path is not absolute). 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+ *) # Relative name. + ac_sub_cache_file=$ac_top_build_prefix$cache_file ;; + esac + + { $as_echo "$as_me:$LINENO: running $SHELL $ac_sub_configure $ac_sub_configure_args --cache-file=$ac_sub_cache_file --srcdir=$ac_srcdir" >&5 +$as_echo "$as_me: running $SHELL $ac_sub_configure $ac_sub_configure_args --cache-file=$ac_sub_cache_file --srcdir=$ac_srcdir" >&6;} + # The eval makes quoting arguments work. + eval "\$SHELL \"\$ac_sub_configure\" $ac_sub_configure_args \ + --cache-file=\"\$ac_sub_cache_file\" --srcdir=\"\$ac_srcdir\"" || + { { $as_echo "$as_me:$LINENO: error: $ac_sub_configure failed for $ac_dir" >&5 +$as_echo "$as_me: error: $ac_sub_configure failed for $ac_dir" >&2;} + { (exit 1); exit 1; }; } + fi + + cd "$ac_popdir" + done +fi +if test -n "$ac_unrecognized_opts" && test "$enable_option_checking" != no; then + { $as_echo "$as_me:$LINENO: WARNING: unrecognized options: $ac_unrecognized_opts" >&5 +$as_echo "$as_me: WARNING: unrecognized options: $ac_unrecognized_opts" >&2;} +fi + + +# I found no better place +mkdir -p bin + +# Prepare result message +# ====================== + +# In the C-header we need \\ as dir-separator, but in the message only \ +dirch=${sdccconf_h_dir_separator} +test ${dirch} = '\\' && dirch='\' + +# calc friendly strings + +binPath=`echo "/${prefix2bin_dir}" | sed 's,/\./,/,g'` +case ":$binPath:" in + ::) binPath='.' ;; + :*[\\/]:) binPath=`echo "$binPath" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $dirch in + + *\\*) binPath=`echo "$binPath" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) binPath=`echo "$binPath" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac +binPath=`echo "$binPath" | sed 's,\\\\\\\\,\\\\,g'` + + +incPath1=`echo "/${prefix2data_dir}/${norm_inc_dir_suffix}" | sed 's,/\./,/,g'` +case ":$incPath1:" in + ::) incPath1='.' ;; + :*[\\/]:) incPath1=`echo "$incPath1" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $dirch in + + *\\*) incPath1=`echo "$incPath1" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) incPath1=`echo "$incPath1" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac +incPath1=`echo "$incPath1" | sed 's,\\\\\\\\,\\\\,g'` + + +incPath2=`echo "/${bin2data_dir}/${norm_inc_dir_suffix}" | sed 's,/\./,/,g'` +case ":$incPath2:" in + ::) incPath2='.' ;; + :*[\\/]:) incPath2=`echo "$incPath2" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $dirch in + + *\\*) incPath2=`echo "$incPath2" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) incPath2=`echo "$incPath2" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac +incPath2=`echo "$incPath2" | sed 's,\\\\\\\\,\\\\,g'` + + +incPath3=`echo "${expanded_datadir}/${norm_inc_dir_suffix}" | sed 's,/\./,/,g'` +case ":$incPath3:" in + ::) incPath3='.' ;; + :*[\\/]:) incPath3=`echo "$incPath3" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $dirch in + + *\\*) incPath3=`echo "$incPath3" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) incPath3=`echo "$incPath3" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac +incPath3=`echo "$incPath3" | sed 's,\\\\\\\\,\\\\,g'` + + +libPath1=`echo "/${prefix2data_dir}/${norm_lib_dir_suffix}" | sed 's,/\./,/,g'` +case ":$libPath1:" in + ::) libPath1='.' ;; + :*[\\/]:) libPath1=`echo "$libPath1" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $dirch in + + *\\*) libPath1=`echo "$libPath1" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) libPath1=`echo "$libPath1" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac +libPath1=`echo "$libPath1" | sed 's,\\\\\\\\,\\\\,g'` + + +libPath2=`echo "/${bin2data_dir}/${norm_lib_dir_suffix}" | sed 's,/\./,/,g'` +case ":$libPath2:" in + ::) libPath2='.' ;; + :*[\\/]:) libPath2=`echo "$libPath2" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $dirch in + + *\\*) libPath2=`echo "$libPath2" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) libPath2=`echo "$libPath2" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac +libPath2=`echo "$libPath2" | sed 's,\\\\\\\\,\\\\,g'` + + +libPath3=`echo "${expanded_datadir}/${norm_lib_dir_suffix}" | sed 's,/\./,/,g'` +case ":$libPath3:" in + ::) libPath3='.' ;; + :*[\\/]:) libPath3=`echo "$libPath3" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $dirch in + + *\\*) libPath3=`echo "$libPath3" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) libPath3=`echo "$libPath3" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac +libPath3=`echo "$libPath3" | sed 's,\\\\\\\\,\\\\,g'` + + +{ $as_echo "$as_me:$LINENO: result: +sdcc ${VERSION} is now configured for + + Build: ${build_alias} + Host: ${host_alias} + Source directory: ${srcdir} + C compiler: ${CC} + CFLAGS: ${CFLAGS} + + ENABLED Ports: + avr ${enable_avr_port} + ds390 ${enable_ds390_port} + ds400 ${enable_ds400_port} + gbz80 ${enable_gbz80_port} + hc08 ${enable_hc08_port} + mcs51 ${enable_mcs51_port} + pic ${enable_pic_port} + pic16 ${enable_pic16_port} + xa51 ${enable_xa51_port} + z80 ${enable_z80_port} + + Disable packihx: ${OPT_DISABLE_PACKIHX} + Disable ucsim: ${OPT_DISABLE_UCSIM} + Disable device lib: ${OPT_DISABLE_DEVICE_LIB} + Disable sdcpp: ${OPT_DISABLE_SDCPP} + Disable sdcdb: ${OPT_DISABLE_SDCDB} + Enable documentation: ${OPT_ENABLE_DOC} + Enable libgc: ${OPT_ENABLE_LIBGC} + + Install paths: + binary files: ${exec_prefix} + include files: ${datadir}/${include_dir_suffix} + library files: ${datadir}/${lib_dir_suffix} + documentation: ${docdir} + + prefix: ${prefix} + datadir: ${datadir} + datarootdir: ${datarootdir} + + Search paths (incomplete, see manual for all search paths): + binary files: \$SDCC_HOME${binPath} + include files: ${incPath1} + path(argv[0])${incPath2} + ${incPath3} + library files: \$SDCC_HOME${libPath1}${dirch} + path(argv[0])${libPath2}${dirch} + ${libPath3}${dirch} +" >&5 +$as_echo " +sdcc ${VERSION} is now configured for + + Build: ${build_alias} + Host: ${host_alias} + Source directory: ${srcdir} + C compiler: ${CC} + CFLAGS: ${CFLAGS} + + ENABLED Ports: + avr ${enable_avr_port} + ds390 ${enable_ds390_port} + ds400 ${enable_ds400_port} + gbz80 ${enable_gbz80_port} + hc08 ${enable_hc08_port} + mcs51 ${enable_mcs51_port} + pic ${enable_pic_port} + pic16 ${enable_pic16_port} + xa51 ${enable_xa51_port} + z80 ${enable_z80_port} + + Disable packihx: ${OPT_DISABLE_PACKIHX} + Disable ucsim: ${OPT_DISABLE_UCSIM} + Disable device lib: ${OPT_DISABLE_DEVICE_LIB} + Disable sdcpp: ${OPT_DISABLE_SDCPP} + Disable sdcdb: ${OPT_DISABLE_SDCDB} + Enable documentation: ${OPT_ENABLE_DOC} + Enable libgc: ${OPT_ENABLE_LIBGC} + + Install paths: + binary files: ${exec_prefix} + include files: ${datadir}/${include_dir_suffix} + library files: ${datadir}/${lib_dir_suffix} + documentation: ${docdir} + + prefix: ${prefix} + datadir: ${datadir} + datarootdir: ${datarootdir} + + Search paths (incomplete, see manual for all search paths): + binary files: \$SDCC_HOME${binPath} + include files: ${incPath1} + path(argv[0])${incPath2} + ${incPath3} + library files: \$SDCC_HOME${libPath1}${dirch} + path(argv[0])${libPath2}${dirch} + ${libPath3}${dirch} +" >&6; } +# End of configure/configure.in diff --git a/configure.in b/configure.in new file mode 100644 index 0000000..dc4bab5 --- /dev/null +++ b/configure.in @@ -0,0 +1,855 @@ +#!/bin/sh + +AC_PREREQ(2.60) +AC_INIT(.version) +AC_CONFIG_SRCDIR([Makefile.in]) +AC_CONFIG_HEADER([sdccconf.h:sdccconf_in.h as/link/asxxxx_config.h]) + +AC_PROG_AWK + +AC_MSG_CHECKING(version of the package) +if test -f ${srcdir}/.version; then + { read VERSION; } < ${srcdir}/.version + AC_MSG_RESULT($VERSION) +elif test -f ../.version; then + { read VERSION; } < ../.version + AC_MSG_RESULT($VERSION) +else + VERSION="0.0.0" + AC_MSG_RESULT(unknown using 0.0.0) +fi +VERSIONHI=`echo $VERSION|$AWK 'BEGIN {FS="."} {print $1}'` +VERSIONLO=`echo $VERSION|$AWK 'BEGIN {FS="."} {print $2}'` +VERSIONP=`echo $VERSION|$AWK 'BEGIN {FS="."} {print $3}'` + +AC_SUBST(PACKAGE, [sdcc]) +AC_SUBST(VERSION) +AC_SUBST(VERSIONHI) +AC_SUBST(VERSIONLO) +AC_SUBST(VERSIONP) +AC_DEFINE_UNQUOTED(SDCC_VERSION_LO, ${VERSIONLO}) +AC_DEFINE_UNQUOTED(SDCC_VERSION_HI, ${VERSIONHI}) +AC_DEFINE_UNQUOTED(SDCC_VERSION_P, ${VERSIONP}) +AC_DEFINE_UNQUOTED(SDCC_VERSION_STR, "${VERSION}") +AC_ARG_PROGRAM +sdcc_cv_version=$VERSION +sdcc_cv_versionhi=$VERSIONHI +sdcc_cv_versionlo=$VERSIONLO +sdcc_cv_versionp=$VERSIONP + + +# Required programs +# =========================================================================== +AC_PROG_CC +AC_PROG_CPP +AC_PROG_INSTALL +AC_PROG_RANLIB +AC_CHECK_PROG(AUTOCONF, autoconf, autoconf, :) +AC_CHECK_PROG(STRIP, strip, strip, :) +AC_CHECK_PROG(AS, as, as, :) +AC_CHECK_PROG(CP, cp, cp, :) + +dnl Don't use AC_PROG_LEX +dnl LEXLIB is not useful in gcc. +AC_CHECK_PROGS(LEX, flex lex, :) + +dnl Don't use AC_PROG_YACC +AC_CHECK_PROGS(YACC, 'bison -y' byacc yacc, :) + +AC_DEFUN([SDCC_REQUIRE_PROG], +[if test "$1" = ":"; then + AC_MSG_ERROR([Cannot find required program $2.]) + fi +]) + +SDCC_REQUIRE_PROG($YACC, bison) +SDCC_REQUIRE_PROG($LEX, flex) + +AC_LANG_C + +AC_ARG_WITH([ccache], + AC_HELP_STRING([--without-ccache], [do not use ccache even if available]), + [], []) +case x${with_ccache-yes} in + xyes) AC_CHECK_PROG([CCACHE], [ccache], [ccache], []) ;; + xno) AC_SUBST([CCACHE], []) ;; + *) AC_SUBST([CCACHE], [$with_ccache]) ;; +esac + + +# Checking for functions +# =========================================================================== +AC_CHECK_FUNCS(strerror) +AC_CHECK_FUNCS(vsnprintf snprintf vsprintf mkstemp) + + +# Macro definitions +# =========================================================================== + +# adl_DD_COPT macro checks if the compiler specified as the 1st parameter +# supports option specified as the 2nd parameter +# For example: DD_CPORT(CXX, fPIC) + +AC_DEFUN([adl_DD_COPT], [ +AC_CACHE_CHECK(whether $$1 accepts -$2,sdcc_cv_$1$2, +cat >_test_.c < +void main(void) {} +EOF +$$1 -v -$2 -c _test_.c 1>&5 2>&5 +if test "$?" = "0"; then + sdcc_cv_$1$2="yes" +else + sdcc_cv_$1$2="no" +fi +rm -f _test_.* a.out) +]) + +# This macro expands DIR and assigns it to RET. +# If DIR is NONE, then it's replaced by DEFAULT. +# +# Based on AC_DEFINE_DIR +# +# Examples: +# +# adl_EXPAND(prefix, "/usr/local", expanded_prefix) + +AC_DEFUN([adl_EXPAND], [ + test "x$prefix" = xNONE && prefix="$ac_default_prefix" + test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + ac_expand=[$]$1 + test "x$ac_expand" = xNONE && ac_expand="[$]$2" + ac_expand=`eval echo [$]ac_expand` + $3=`eval echo [$]ac_expand` +]) + +# adl_NORMALIZE_PATH +# +# - empty paths are changed to '.' +# - trailing slashes are removed +# - repeated slashes are squeezed except a leading doubled slash '//' +# (which might indicate a networked disk on some OS). +# +# +# REFERENCE_STRING is used to turn '/' into '\' and vice-versa: if +# REFERENCE_STRING contains some backslashes, all slashes and backslashes +# are turned into backslashes, otherwise they are all turned into slashes. +# +# This makes processing of DOS filenames quite easier, because you can turn a +# filename to the Unix notation, make your processing, and turn it back to +# original notation. + +dnl Available from the GNU Autoconf Macro Archive at: +dnl http://www.gnu.org/software/ac-archive/htmldoc/normpath.html +dnl +AC_DEFUN([adl_NORMALIZE_PATH], +[case ":[$]$1:" in +dnl change empty paths to '.' + ::) $1='.' ;; +dnl strip trailing slashes + :*[[\\/]]:) $1=`echo "[$]$1" | sed 's,[[\\/]]*[$],,'` ;; + :*:) ;; +esac +dnl squeze repeated slashes +case ifelse($2,,"[$]$1",$2) in +dnl if the path contains any backslashes, turn slashes into backslashes + +dnl Bernhard Held 2003-04-06 +dnl This was the original line. It does not: +dnl - convert the first slash +dnl - replace a slash with a double-backslash +dnl *\\*) $1=`echo "[$]$1" | sed 's,\(.\)[[\\/]][[\\/]]*,\1\\\\,g'` ;; + *\\*) $1=`echo "[$]$1" | sed 's,\(.\)[[\\/]][[\\/]]*,\1\\\\\\\\,g + s,^[[\\/]],\\\\\\\\,'` ;; + +dnl if the path contains slashes, also turn backslashes into slashes + *) $1=`echo "[$]$1" | sed 's,\(.\)[[\\/]][[\\/]]*,\1/,g'` ;; +esac]) + + +# adl_COMPUTE_RELATIVE_PATH +# +# PATH_LIST is a space-separated list of colon-separated triplets of the form +# 'FROM:TO:RESULT'. This function iterates over these triplets and set $RESULT +# to the relative path from $FROM to $TO. Note that $FROM and $TO needs to be +# absolute filenames for this macro to success. + +AC_DEFUN([adl_COMPUTE_RELATIVE_PATHS], +[for _lcl_i in $1; do + _lcl_from=\[$]`echo "[$]_lcl_i" | sed 's,:.*$,,'` + _lcl_to=\[$]`echo "[$]_lcl_i" | sed 's,^[[^:]]*:,,' | sed 's,:[[^:]]*$,,'` + _lcl_result_var=`echo "[$]_lcl_i" | sed 's,^.*:,,'` + adl_RECURSIVE_EVAL([[$]_lcl_from], [_lcl_from]) + adl_RECURSIVE_EVAL([[$]_lcl_to], [_lcl_to]) + _lcl_notation="$_lcl_from$_lcl_to" + adl_NORMALIZE_PATH([_lcl_from],['/']) + adl_NORMALIZE_PATH([_lcl_to],['/']) + adl_COMPUTE_RELATIVE_PATH([_lcl_from], [_lcl_to], [_lcl_result_tmp]) + adl_NORMALIZE_PATH([_lcl_result_tmp],["[$]_lcl_notation"]) + eval $_lcl_result_var='[$]_lcl_result_tmp' +done]) + +## Note: +## ***** +## The following helper macros are too fragile to be used out +## of adl_COMPUTE_RELATIVE_PATHS (mainly because they assume that +## paths are normalized), that's why I'm keeping them in the same file. +## Still, some of them maybe worth to reuse. + +dnl adl_COMPUTE_RELATIVE_PATH(FROM, TO, RESULT) +dnl =========================================== +dnl Compute the relative path to go from $FROM to $TO and set the value +dnl of $RESULT to that value. This function work on raw filenames +dnl (for instead it will considerate /usr//local and /usr/local as +dnl two distinct paths), you should really use adl_COMPUTE_REALTIVE_PATHS +dnl instead to have the paths sanitized automatically. +dnl +dnl For instance: +dnl first_dir=/somewhere/on/my/disk/bin +dnl second_dir=/somewhere/on/another/disk/share +dnl adl_COMPUTE_RELATIVE_PATH(first_dir, second_dir, first_to_second) +dnl will set $first_to_second to '../../../another/disk/share'. +AC_DEFUN([adl_COMPUTE_RELATIVE_PATH], +[adl_COMPUTE_COMMON_PATH([$1], [$2], [_lcl_common_prefix]) +adl_COMPUTE_BACK_PATH([$1], [_lcl_common_prefix], [_lcl_first_rel]) +adl_COMPUTE_SUFFIX_PATH([$2], [_lcl_common_prefix], [_lcl_second_suffix]) +$3="[$]_lcl_first_rel[$]_lcl_second_suffix"]) + +dnl adl_COMPUTE_COMMON_PATH(LEFT, RIGHT, RESULT) +dnl ============================================ +dnl Compute the common path to $LEFT and $RIGHT and set the result to $RESULT. +dnl +dnl For instance: +dnl first_path=/somewhere/on/my/disk/bin +dnl second_path=/somewhere/on/another/disk/share +dnl adl_COMPUTE_COMMON_PATH(first_path, second_path, common_path) +dnl will set $common_path to '/somewhere/on'. +AC_DEFUN([adl_COMPUTE_COMMON_PATH], +[$3='' +_lcl_second_prefix_match='' +while test "[$]_lcl_second_prefix_match" != 0; do + _lcl_first_prefix=`expr "x[$]$1" : "x\([$]$3/*[[^/]]*\)"` + _lcl_second_prefix_match=`expr "x[$]$2" : "x[$]_lcl_first_prefix"` + if test "[$]_lcl_second_prefix_match" != 0; then + if test "[$]_lcl_first_prefix" != "[$]$3"; then + $3="[$]_lcl_first_prefix" + else + _lcl_second_prefix_match=0 + fi + fi +done]) + +dnl adl_COMPUTE_SUFFIX_PATH(PATH, SUBPATH, RESULT) +dnl ============================================== +dnl Substrack $SUBPATH from $PATH, and set the resulting suffix +dnl (or the empty string if $SUBPATH is not a subpath of $PATH) +dnl to $RESULT. +dnl +dnl For instace: +dnl first_path=/somewhere/on/my/disk/bin +dnl second_path=/somewhere/on +dnl adl_COMPUTE_SUFFIX_PATH(first_path, second_path, common_path) +dnl will set $common_path to '/my/disk/bin'. +AC_DEFUN([adl_COMPUTE_SUFFIX_PATH], +[$3=`expr "x[$]$1" : "x[$]$2/*\(.*\)"`]) + +dnl adl_COMPUTE_BACK_PATH(PATH, SUBPATH, RESULT) +dnl ============================================ +dnl Compute the relative path to go from $PATH to $SUBPATH, knowing that +dnl $SUBPATH is a subpath of $PATH (any other words, only repeated '../' +dnl should be needed to move from $PATH to $SUBPATH) and set the value +dnl of $RESULT to that value. If $SUBPATH is not a subpath of PATH, +dnl set $RESULT to the empty string. +dnl +dnl For instance: +dnl first_path=/somewhere/on/my/disk/bin +dnl second_path=/somewhere/on +dnl adl_COMPUTE_BACK_PATH(first_path, second_path, back_path) +dnl will set $back_path to '../../../'. +AC_DEFUN([adl_COMPUTE_BACK_PATH], +[adl_COMPUTE_SUFFIX_PATH([$1], [$2], [_lcl_first_suffix]) +$3='' +_lcl_tmp='xxx' +while test "[$]_lcl_tmp" != ''; do + _lcl_tmp=`expr "x[$]_lcl_first_suffix" : "x[[^/]]*/*\(.*\)"` + if test "[$]_lcl_first_suffix" != ''; then + _lcl_first_suffix="[$]_lcl_tmp" + $3="../[$]$3" + fi +done]) + + +dnl adl_RECURSIVE_EVAL(VALUE, RESULT) +dnl ================================= +dnl Interpolate the VALUE in loop until it does not change, +dnl and set the result to $RESULT. +dnl WARNING: It is easy to get an infinite loop with some unsane input. +AC_DEFUN([adl_RECURSIVE_EVAL], +[_lcl_receval="$1" +$2=`(test "x$prefix" = xNONE && prefix="$ac_default_prefix" + test "x$exec_prefix" = xNONE && exec_prefix="${prefix}" + _lcl_receval_old='' + while test "[$]_lcl_receval_old" != "[$]_lcl_receval"; do + _lcl_receval_old="[$]_lcl_receval" + eval _lcl_receval="\"[$]_lcl_receval\"" + done + echo "[$]_lcl_receval")`]) + +dnl adl_NORMALIZE_DEFINE_UNQUOTED(var, DEFINE, REFERENCE_STRING) +AC_DEFUN([adl_NORMALIZE_DEFINE_UNQUOTED], [ + ac_ndu=[$]$1 + adl_NORMALIZE_PATH([ac_ndu], [$]$3) + AC_DEFINE_UNQUOTED($2, "${ac_ndu}") +]) + +dnl adl_NORMALIZE_PATH_MSG(input_string, var, dir_separator) +dnl ======================================================== +dnl call adl_NORMALIZE_PATH and format it for the result message +AC_DEFUN([adl_NORMALIZE_PATH_MSG], [ +dnl replace /./ by / +$2=`echo "$1" | sed 's,/\./,/,g'` +adl_NORMALIZE_PATH([$2], [$3]) +dnl replace \\ by \ +$2=`echo "[$]$2" | sed 's,\\\\\\\\,\\\\,g'` +]) + + +# Checking characteristics of compilers and other programs +# =========================================================================== +AC_CACHE_CHECK(whether preprocessor accepts -MM or -M,sdcc_cv_MM, +echo "#include " >_test_.c +echo "" >>_test_.c +$CPP -v -MM _test_.c 1>&5 2>&5 +if test "$?" = "0"; then + sdcc_cv_MM="-MM" +else + sdcc_cv_MM="-M" +fi +rm -f _test_.*) +M_OR_MM=$sdcc_cv_MM +AC_SUBST(M_OR_MM) + +# This is the first time when CFLAGS are set/modified!! +adl_DD_COPT(CC, ggdb) +if test "$sdcc_cv_CCggdb" = "yes"; then + CFLAGS="-ggdb ${CFLAGS}" +fi + +adl_DD_COPT(CC, pipe) +if test "$sdcc_cv_CCpipe" = "yes"; then + CFLAGS="-pipe $CFLAGS" +fi + + +# Checks for typedefs, structures, and compiler characteristics. +# =========================================================================== +AC_TYPE_SIGNAL + +AC_CHECK_SIZEOF(char) +AC_CHECK_SIZEOF(short) +AC_CHECK_SIZEOF(int) +AC_CHECK_SIZEOF(long) +AC_C_CHAR_UNSIGNED + +type_name() +{ + if expr "$ac_cv_sizeof_char" '>=' "$1" >/dev/null; then + echo "char" + exit + fi + if expr "$ac_cv_sizeof_short" '>=' "$1" >/dev/null; then + echo "short" + exit + fi + if expr "$ac_cv_sizeof_int" '>=' "$1" >/dev/null; then + echo "int" + exit + fi + if expr "$ac_cv_sizeof_long" '>=' "$1" >/dev/null; then + echo "long" + exit + fi + echo "long" +} + +AC_MSG_CHECKING(type name for byte) +TYPE_CHAR=`type_name 1` +if test "$ac_cv_c_char_unsigned" = "yes"; then + TYPE_BYTE="signed $TYPE_CHAR" +else + TYPE_BYTE=$TYPE_CHAR +fi +AC_MSG_RESULT($TYPE_BYTE) +AC_MSG_CHECKING(type name for word) +TYPE_WORD=`type_name 2` +AC_MSG_RESULT($TYPE_WORD) +AC_MSG_CHECKING(type name for dword) +TYPE_DWORD=`type_name 4` +AC_MSG_RESULT($TYPE_DWORD) + +AC_DEFINE_UNQUOTED(TYPE_BYTE, $TYPE_BYTE) +AC_DEFINE_UNQUOTED(TYPE_WORD, $TYPE_WORD) +AC_DEFINE_UNQUOTED(TYPE_DWORD, $TYPE_DWORD) + +AC_DEFINE_UNQUOTED(TYPE_UBYTE, unsigned $TYPE_CHAR) +AC_DEFINE_UNQUOTED(TYPE_UWORD, unsigned $TYPE_WORD) +AC_DEFINE_UNQUOTED(TYPE_UDWORD, unsigned $TYPE_DWORD) + + +# SDCC_BUILD_BIGENDIAN ([ACTION-IF-TRUE], [ACTION-IF-FALSE], [ACTION-IF-UNKNOWN]) +# ------------------------------------------------------------------------- +AC_DEFUN([SDCC_BUILD_BIGENDIAN], +[AC_CACHE_CHECK(whether host machine byte ordering is bigendian, sdcc_cv_build_bigendian, +[# See if sys/param.h defines the BYTE_ORDER macro. +AC_COMPILE_IFELSE([AC_LANG_PROGRAM([#include +#include +], +[#if ! (defined BYTE_ORDER && defined BIG_ENDIAN && defined LITTLE_ENDIAN \ + && BYTE_ORDER && BIG_ENDIAN && LITTLE_ENDIAN) + bogus endian macros +#endif +])], +[# It does; now see whether it defined to BIG_ENDIAN or not. +AC_COMPILE_IFELSE([AC_LANG_PROGRAM([#include +#include +], [#if BYTE_ORDER != BIG_ENDIAN + not big endian +#endif +])], [sdcc_cv_build_bigendian=yes], [sdcc_cv_build_bigendian=no])], +[# It does not; compile a test program. +AC_RUN_IFELSE( +[AC_LANG_PROGRAM([AC_INCLUDES_DEFAULT], [[ + /* Are we little or big endian? From Harbison&Steele. */ + union + { + long int l; + char c[sizeof (long int)]; + } u; + u.l = 1; + return u.c[sizeof (long int) - 1] == 1; +]])], + [sdcc_cv_build_bigendian=no], + [sdcc_cv_build_bigendian=yes], +[# try to guess the endianness by grepping values into an object file + sdcc_cv_build_bigendian=unknown + AC_COMPILE_IFELSE([AC_LANG_PROGRAM( +[[short int ascii_mm[] = { 0x4249, 0x4765, 0x6E44, 0x6961, 0x6E53, 0x7953, 0 }; +short int ascii_ii[] = { 0x694C, 0x5454, 0x656C, 0x6E45, 0x6944, 0x6E61, 0 }; +void _ascii () { char *s = (char *) ascii_mm; s = (char *) ascii_ii; } +short int ebcdic_ii[] = { 0x89D3, 0xE3E3, 0x8593, 0x95C5, 0x89C4, 0x9581, 0 }; +short int ebcdic_mm[] = { 0xC2C9, 0xC785, 0x95C4, 0x8981, 0x95E2, 0xA8E2, 0 }; +void _ebcdic () { char *s = (char *) ebcdic_mm; s = (char *) ebcdic_ii; }]], +[[ _ascii (); _ebcdic (); ]])], +[if grep BIGenDianSyS conftest.$ac_objext >/dev/null ; then + sdcc_cv_build_bigendian=yes +fi +if grep LiTTleEnDian conftest.$ac_objext >/dev/null ; then + if test "$sdcc_cv_build_bigendian" = unknown; then + sdcc_cv_build_bigendian=no + else + # finding both strings is unlikely to happen, but who knows? + sdcc_cv_build_bigendian=unknown + fi +fi])])])]) +case $sdcc_cv_build_bigendian in + yes) + m4_default([$1], + [AC_DEFINE([BUILD_WORDS_BIGENDIAN], 1, + [Define to 1 if your processor stores words with the most significant + byte first (like Motorola and SPARC, unlike Intel and VAX).])]) ;; + no) + $2 ;; + *) + m4_default([$3], + [AC_MSG_ERROR([unknown endianness +presetting sdcc_cv_build_bigendian=no (or yes) will help])]) ;; +esac +])# SDCC_BUILD_BIGENDIAN + +SDCC_BUILD_BIGENDIAN + +# Set standard installation paths +# =========================================================================== + +# In the Makefiles we need paths with '/' as directory separator, even if +# crosscompiling for Win32. +# And we want to preserve the macros (e.g. ${prefix}) in the Makefiles. +# The variables in the Makefiles are replaced by AC_SUBST() +# +# In sdccconf.h the '/' in paths can be replaced by "\\" (normalized), if +# +# The macros are expanded for the header. +# The variables in the header are replaced by AC_*DEFINE*() +# sdccconf_h_dir_separator contains a backslash. +AC_ARG_VAR([sdccconf_h_dir_separator], [needed in sdccconf.h: either "/" (default) or "\\"]) +if test "x${sdccconf_h_dir_separator}" = "x"; then + sdccconf_h_dir_separator="/" +fi + +# Makefiles +########### + +# LIB_TYPE: +# *nix default: "RANLIB" + +AC_ARG_VAR([LIB_TYPE], [library type: LIB, SDCCLIB, AR or RANLIB (default)]) +if test "${LIB_TYPE}" = ""; then + LIB_TYPE="RANLIB" +fi + +# include_dir_suffix: +# *nix default: "sdcc/include" + +AC_ARG_VAR([include_dir_suffix], [appended to datadir to define SDCC's include directory]) +if test "${include_dir_suffix}" = ""; then + include_dir_suffix="sdcc/include" +fi + +# lib_dir_suffix: +# *nix default: "sdcc/lib" +AC_ARG_VAR([lib_dir_suffix], [appended to datadir to define SDCC's library root directory]) +if test "${lib_dir_suffix}" = ""; then + lib_dir_suffix="sdcc/lib" +fi + +# docdir: +# *nix default: "${datadir}/sdcc/doc" +AC_ARG_VAR([docdir], [documentation installation directory]) +if test "${docdir}" = ""; then + docdir="\${datadir}"/sdcc/doc +fi + +AC_SUBST(EXEEXT) + +# sdccconf.h +############ + +AC_DEFINE_UNQUOTED(DIR_SEPARATOR_STRING, "${sdccconf_h_dir_separator}") +AC_DEFINE_UNQUOTED(DIR_SEPARATOR_CHAR, '${sdccconf_h_dir_separator}') + +# prefix: +# default: "NONE", ${ac_default_prefix}: "/usr/local" +adl_EXPAND(prefix, ac_default_prefix, expanded_prefix) +adl_NORMALIZE_DEFINE_UNQUOTED(expanded_prefix, PREFIX, sdccconf_h_dir_separator) + +# exec_prefix: +# default: "${prefix}" +adl_EXPAND(exec_prefix, expanded_prefix, expanded_exec_prefix) +adl_NORMALIZE_DEFINE_UNQUOTED(expanded_exec_prefix, EXEC_PREFIX, sdccconf_h_dir_separator) + +# bindir: +# default: "${exec_prefix}/bin" +adl_EXPAND(bindir, "NONE", expanded_bindir) +adl_NORMALIZE_DEFINE_UNQUOTED(expanded_bindir, BINDIR, sdccconf_h_dir_separator) + +# datadir: +# default: "${prefix}/share" +adl_EXPAND(datadir, "NONE", expanded_datadir) +adl_NORMALIZE_DEFINE_UNQUOTED(expanded_datadir, DATADIR, sdccconf_h_dir_separator) + +# include/lib suffix +norm_inc_dir_suffix=${include_dir_suffix} +adl_NORMALIZE_PATH([norm_inc_dir_suffix], [$sdccconf_h_dir_separator]) +AC_DEFINE_UNQUOTED(INCLUDE_DIR_SUFFIX, + DIR_SEPARATOR_STRING "${norm_inc_dir_suffix}") +norm_lib_dir_suffix=${lib_dir_suffix} +adl_NORMALIZE_PATH([norm_lib_dir_suffix], [$sdccconf_h_dir_separator]) +AC_DEFINE_UNQUOTED(LIB_DIR_SUFFIX, + DIR_SEPARATOR_STRING "${norm_lib_dir_suffix}") + +# relative paths +adl_COMPUTE_RELATIVE_PATHS([expanded_bindir:expanded_datadir:bin2data_dir]) +adl_NORMALIZE_PATH(bin2data_dir, [$sdccconf_h_dir_separator]) +AC_DEFINE_UNQUOTED(BIN2DATA_DIR, + DIR_SEPARATOR_STRING "${bin2data_dir}") + +adl_COMPUTE_RELATIVE_PATHS([expanded_prefix:expanded_bindir:prefix2bin_dir]) +adl_NORMALIZE_PATH(prefix2bin_dir, [$sdccconf_h_dir_separator]) +AC_DEFINE_UNQUOTED(PREFIX2BIN_DIR, + DIR_SEPARATOR_STRING "${prefix2bin_dir}") + +adl_COMPUTE_RELATIVE_PATHS([expanded_prefix:expanded_datadir:prefix2data_dir]) +adl_NORMALIZE_PATH(prefix2data_dir, [$sdccconf_h_dir_separator]) +if test "${prefix2data_dir}" = "."; then + # small optimization for Mingw32; otherwise Borut will complain ;-) + AC_DEFINE_UNQUOTED(PREFIX2DATA_DIR, "") +else + AC_DEFINE_UNQUOTED(PREFIX2DATA_DIR, + DIR_SEPARATOR_STRING "${prefix2data_dir}") +fi + +# standard libs +AC_DEFINE_UNQUOTED(STD_LIB, "libsdcc") +AC_DEFINE_UNQUOTED(STD_INT_LIB, "libint") +AC_DEFINE_UNQUOTED(STD_LONG_LIB, "liblong") +AC_DEFINE_UNQUOTED(STD_FP_LIB, "libfloat") +AC_DEFINE_UNQUOTED(STD_DS390_LIB, "libds390") +AC_DEFINE_UNQUOTED(STD_DS400_LIB, "libds400") +AC_DEFINE_UNQUOTED(STD_XA51_LIB, "libxa51") + +# SDCC runtime environment variables +sdcc_dir_name="SDCC_HOME" +AC_DEFINE_UNQUOTED(SDCC_DIR_NAME, "${sdcc_dir_name}") + +sdcc_include_name="SDCC_INCLUDE" +AC_DEFINE_UNQUOTED(SDCC_INCLUDE_NAME, "${sdcc_include_name}") + +sdcc_lib_name="SDCC_LIB" +AC_DEFINE_UNQUOTED(SDCC_LIB_NAME, "${sdcc_lib_name}") + +# Port selection helper +# =========================================================================== +# macro AC_DO_ENABLER() +# $1 used to access enable_$1, e.g. enable_doc +# $2 OPT_DISABLE_$2, normally uppercase of $1, e.g. DOC +# $3 help string +AC_DEFUN([AC_DO_ENABLER], [ + AC_ARG_ENABLE($1, AC_HELP_STRING([--enable-$1], $3)) + + if test "[$]enable_$1" = "yes"; then + OPT_ENABLE_$2=1 + else + OPT_ENABLE_$2=0 + fi + + AC_DEFINE_UNQUOTED(OPT_ENABLE_$2, [$]OPT_ENABLE_$2) + AC_SUBST(OPT_ENABLE_$2) +]) + +# macro AC_DO_DISABLER() +# $1 used to access disable_$1, e.g. ucsim +# $2 OPT_DISABLE_$2, normally uppercase of $1, e.g. UCSIM +# $3 help string +AC_DEFUN([AC_DO_DISABLER], [ + AC_ARG_ENABLE($1, AC_HELP_STRING([--disable-$1], $3)) + + dnl the '-' in 'device-lib' needs special handling, + dnl because the variable is 'enable_device_lib' + arg1=`echo $1 | sed s/-/_/` + + if test "`eval echo \\$enable_$arg1`" = "no"; then + OPT_DISABLE_$2=1 + else + OPT_DISABLE_$2=0 + fi + + AC_DEFINE_UNQUOTED(OPT_DISABLE_$2, [$]OPT_DISABLE_$2) + AC_SUBST(OPT_DISABLE_$2) +]) + +# macro AC_DO_PORT($1, $2, $3, $4) +# $1 used to access enable_$2_port, e.g. gbz80 +# $2 port name in ports.all and ports.build, e.g. z80 +# $3 OPT_DISABLE_$3, normally uppercase of $2, e.g. GBZ80 +# $4 help string +AC_DEFUN([AC_DO_PORT], [ + AC_ARG_ENABLE($1-port, + AC_HELP_STRING([--disable-$1-port], $4)) + + if test "[$]enable_$1_port" = "no"; then + OPT_DISABLE_$3=1 + else + enable_$1_port="yes" + OPT_DISABLE_$3=0 + fi + + AC_DEFINE_UNQUOTED(OPT_DISABLE_$3, [$]OPT_DISABLE_$3) + AC_SUBST(OPT_DISABLE_$3) + + echo $2 >>ports.all + if test [$]OPT_DISABLE_$3 = 0; then + echo $2 >>ports.build + fi +]) + +# Now handle the port selection +# =========================================================================== +rm -f ports.all ports.build +AC_DO_PORT(mcs51, mcs51, MCS51, [Excludes the Intel mcs51 port]) +AC_DO_PORT(gbz80, z80, GBZ80, [Excludes the Gameboy gbz80 port]) +AC_DO_PORT(z80, z80, Z80, [Excludes the z80 port]) +AC_DO_PORT(avr, avr, AVR, [Excludes the AVR port]) +AC_DO_PORT(ds390, ds390, DS390, [Excludes the DS390 port]) +AC_DEFINE_UNQUOTED(OPT_DISABLE_TININative, $OPT_DISABLE_DS390) +AC_DO_PORT(ds400, ds400, DS400, [Excludes the DS400 port]) +AC_DO_PORT(pic, pic, PIC, [Excludes the PIC port]) +AC_DO_PORT(pic16, pic16, PIC16, [Excludes the PIC16 port]) +AC_DO_PORT(xa51, xa51, XA51, [Excludes the XA51 port]) +AC_DO_PORT(hc08, hc08, HC08, [Excludes the HC08 port]) + +AC_DO_DISABLER(ucsim, UCSIM, [Disables configuring and building of ucsim]) +AC_DO_DISABLER(device-lib, DEVICE_LIB, [Disables building device libraries]) +AC_DO_DISABLER(packihx, PACKIHX, [Disables building packihx]) +AC_DO_DISABLER(sdcpp, SDCPP, [Disables building sdcpp]) +AC_DO_DISABLER(sdcdb, SDCDB, [Disables building sdcdb]) + +AC_DO_ENABLER(doc, DOC, [Enables building the documentation]) +AC_CHECK_PROG([LYX], [lyx], [lyx], [:]) +AC_CHECK_PROG([LATEX2HTML], [latex2html], [latex2html], [:]) +AC_CHECK_PROG([PDFLATEX], [pdflatex], [pdflatex], [:]) +AC_CHECK_PROG([PDFOPT], [pdfopt], [pdfopt], [:]) +AC_CHECK_PROG([MAKEINDEX], [makeindex], [makeindex], [:]) + +if test $OPT_ENABLE_DOC = 1; then + SDCC_REQUIRE_PROG($LYX, lyx) + SDCC_REQUIRE_PROG($LATEX2HTML, latex2html) + SDCC_REQUIRE_PROG($PDFLATEX, pdflatex) + SDCC_REQUIRE_PROG($PDFOPT, pdfopt) + SDCC_REQUIRE_PROG($MAKEINDEX, makeindex) +fi + +AC_DO_ENABLER(libgc, LIBGC, [Use the Bohem memory allocator. Lower runtime footprint.]) +if test $OPT_ENABLE_LIBGC = 1; then + AC_CHECK_LIB(gc, GC_malloc) + if test $ac_cv_lib_gc_GC_malloc = no; then + AC_MSG_ERROR([Cannot find library libgc with Bohem memory allocator.]) + fi +fi + +#remove duplicates +uniq ports.all ports +mv ports ports.all +uniq ports.build ports +mv ports ports.build + +# Generating output files +# =========================================================================== +test $OPT_DISABLE_SDCPP = 0 && AC_CONFIG_SUBDIRS(support/cpp) +test $OPT_DISABLE_PACKIHX = 0 && AC_CONFIG_SUBDIRS(support/packihx) +test $OPT_DISABLE_UCSIM = 0 && AC_CONFIG_SUBDIRS(sim/ucsim) +test $OPT_DISABLE_SDCDB = 0 && AC_CONFIG_SUBDIRS(debugger/mcs51) +AC_CONFIG_FILES([doc/Makefile]) + +test $OPT_DISABLE_AVR = 0 && AC_CONFIG_FILES([src/avr/Makefile]) + +if test $OPT_DISABLE_DS390 = 0; then + AC_CONFIG_FILES([src/ds390/Makefile]) + test $OPT_DISABLE_DEVICE_LIB = 0 && AC_CONFIG_FILES([device/lib/ds390/Makefile]) +fi + +if test $OPT_DISABLE_DS400 = 0; then + AC_CONFIG_FILES([src/ds400/Makefile]) + test $OPT_DISABLE_DEVICE_LIB = 0 && AC_CONFIG_FILES([device/lib/ds400/Makefile]) +fi + +if test $OPT_DISABLE_HC08 = 0; then + AC_CONFIG_FILES([src/hc08/Makefile + as/hc08/Makefile + as/link/hc08/Makefile]) + test $OPT_DISABLE_DEVICE_LIB = 0 && AC_CONFIG_FILES([device/lib/hc08/Makefile]) +fi + +if test $OPT_DISABLE_MCS51 = 0; then + AC_CONFIG_FILES([src/mcs51/Makefile + as/mcs51/Makefile + as/link/mcs51/Makefile]) + test $OPT_DISABLE_DEVICE_LIB = 0 && AC_CONFIG_FILES([device/lib/mcs51/Makefile + device/lib/small/Makefile + device/lib/medium/Makefile + device/lib/large/Makefile]) +fi + +if test $OPT_DISABLE_PIC = 0; then + AC_CONFIG_FILES(src/pic/Makefile) + test $OPT_DISABLE_DEVICE_LIB = 0 && AC_CONFIG_SUBDIRS(device/lib/pic) +fi +if test $OPT_DISABLE_PIC16 = 0; then + AC_CONFIG_FILES(src/pic16/Makefile) + test $OPT_DISABLE_DEVICE_LIB = 0 && AC_CONFIG_SUBDIRS(device/lib/pic16) +fi + +test $OPT_DISABLE_XA51 = 0 && AC_CONFIG_FILES([src/xa51/Makefile]) + +if test $OPT_DISABLE_Z80 = 0; then + AC_CONFIG_FILES([src/z80/Makefile + as/Makefile + as/z80/Makefile + as/link/Makefile + as/link/z80/Makefile]) + test $OPT_DISABLE_DEVICE_LIB = 0 && AC_CONFIG_FILES([device/lib/z80/Makefile + device/lib/gbz80/Makefile]) +fi + +test $OPT_DISABLE_DEVICE_LIB = 0 && AC_CONFIG_FILES([device/lib/Makefile]) + +AC_CONFIG_FILES([main.mk:main_in.mk +src/Makefile +device/include/Makefile +as/asranlib/Makefile +support/librarian/Makefile +support/makebin/Makefile +support/regression/Makefile +support/valdiag/Makefile +Makefile +Makefile.common:Makefile.common.in +]) +AC_OUTPUT + +# I found no better place +mkdir -p bin + +# Prepare result message +# ====================== + +# In the C-header we need \\ as dir-separator, but in the message only \ +dirch=${sdccconf_h_dir_separator} +test ${dirch} = '\\' && dirch='\' + +# calc friendly strings +adl_NORMALIZE_PATH_MSG(/${prefix2bin_dir}, [binPath], [$dirch]) +adl_NORMALIZE_PATH_MSG(/${prefix2data_dir}/${norm_inc_dir_suffix}, [incPath1], [$dirch]) +adl_NORMALIZE_PATH_MSG(/${bin2data_dir}/${norm_inc_dir_suffix}, [incPath2], [$dirch]) +adl_NORMALIZE_PATH_MSG(${expanded_datadir}/${norm_inc_dir_suffix}, [incPath3], [$dirch]) +adl_NORMALIZE_PATH_MSG(/${prefix2data_dir}/${norm_lib_dir_suffix}, [libPath1], [$dirch]) +adl_NORMALIZE_PATH_MSG(/${bin2data_dir}/${norm_lib_dir_suffix}, [libPath2], [$dirch]) +adl_NORMALIZE_PATH_MSG(${expanded_datadir}/${norm_lib_dir_suffix}, [libPath3], [$dirch]) + +AC_MSG_RESULT([ +sdcc ${VERSION} is now configured for + + Build: ${build_alias} + Host: ${host_alias} + Source directory: ${srcdir} + C compiler: ${CC} + CFLAGS: ${CFLAGS} + + ENABLED Ports: + avr ${enable_avr_port} + ds390 ${enable_ds390_port} + ds400 ${enable_ds400_port} + gbz80 ${enable_gbz80_port} + hc08 ${enable_hc08_port} + mcs51 ${enable_mcs51_port} + pic ${enable_pic_port} + pic16 ${enable_pic16_port} + xa51 ${enable_xa51_port} + z80 ${enable_z80_port} + + Disable packihx: ${OPT_DISABLE_PACKIHX} + Disable ucsim: ${OPT_DISABLE_UCSIM} + Disable device lib: ${OPT_DISABLE_DEVICE_LIB} + Disable sdcpp: ${OPT_DISABLE_SDCPP} + Disable sdcdb: ${OPT_DISABLE_SDCDB} + Enable documentation: ${OPT_ENABLE_DOC} + Enable libgc: ${OPT_ENABLE_LIBGC} + + Install paths: + binary files: ${exec_prefix} + include files: ${datadir}/${include_dir_suffix} + library files: ${datadir}/${lib_dir_suffix} + documentation: ${docdir} + + prefix: ${prefix} + datadir: ${datadir} + datarootdir: ${datarootdir} + + Search paths (incomplete, see manual for all search paths): + binary files: \$SDCC_HOME${binPath} + include files: ${incPath1} + path(argv[[0]])${incPath2} + ${incPath3} + library files: \$SDCC_HOME${libPath1}${dirch} + path(argv[[0]])${libPath2}${dirch} + ${libPath3}${dirch} +]) +# End of configure/configure.in diff --git a/configure_vc.awk b/configure_vc.awk new file mode 100644 index 0000000..e9235ab --- /dev/null +++ b/configure_vc.awk @@ -0,0 +1,60 @@ +#!/usr/bin/awk + +# configure_vc.awk - Genarate sdcc_vc.h using sdcc_vc_in.h as template +# and insert the version number definitions from .version +# +# Written By - Borut Razem borut.razem@siol.net +# +# This file is part of sdcc. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 2, or (at your option) any +# later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +BEGIN { + # get the values from .version + FS="."; + getline <".version"; + version_high = $1; + version_lo = $2; + version_patch = $3; + + print "/*" + print " * Generated automatically by configure_vc.awk, DO NOT edit!" + print " */" + print "" +} + +/^#undef SDCC_VERSION_HI$/ { + print("#define SDCC_VERSION_HI " version_high); + next +} + +/^#undef SDCC_VERSION_LO$/ { + print("#define SDCC_VERSION_LO " version_lo); + next +} + +/^#undef SDCC_VERSION_P$/ { + print("#define SDCC_VERSION_P " version_patch); + next +} + +/^#undef SDCC_VERSION_STR$/ { + print("#define SDCC_VERSION_STR " "\"" version_high "." version_lo "." version_patch "\""); + next +} + +{ + print +} diff --git a/debugger/README b/debugger/README new file mode 100644 index 0000000..ccf3e76 --- /dev/null +++ b/debugger/README @@ -0,0 +1,518 @@ +sdcc/debugger + +SDCDB debugger - Development notes. +====================== + + +ddd - Notes from Martin Helmling, May 23, 2003 +======================== + +Additionally following new commands work: + +ignore - ignore the breakpoint n times +condition <|>|<=|>=|==|!= - break condition +commands - see gdb description - + +ddd - Notes from Martin Helmling, April 28, 2003 +======================== + +To fullfill the requirements of 'ddd' ( Data Display Debugger ) to use it at +graphical frontend to 'sdcdb' some new commands must be implemented. + +Now you can run the ddd with the commandline + +ddd -debugger 'sdcdb -cpu 8032 ' + +Following commands are additional implemented: + +1. execution: + +stepi - Step one instruction exactly using simulator 'step' command. +nexti - Step one instruction, but proceed through subroutine calls using simulator 'next' command. +break * - Set breakpoint at program address + +log examples: +-> "stepi\n" +<- "Simulator stopped at Address 0x0051\n" + "\032\032x.c:31:1:beg:0x00000051\n" + "(sdcdb) " +-> "nexti\n" +<- "Simulator stopped at Address 0x0055\n" + "\032\032x.c:33:1:beg:0x00000055\n" + "(sdcdb) " + +2. show machine code window: + +x /i - disassemble one asm command +x disassemble asm commands + +log examples: +-> "x /i 0x00000055\n" +<- "0x00000055 :\t\tmov\tr0,#_l\n" + "(sdcdb) " +-> "disassemble 0x00000055\n" +<- "Dump of assembler code for function main:\n" + "0x0000004f

:\t\tmov\tr0,#_ttt\n" + "0x00000051 :\t\tmov\t@r0,#0x01\n" +<- "0x00000053 :\t\tmov\tr2,#0x09\n" + "0x00000055 :\t\tmov\tr0,#_l\n" +... + "0x000000c1 :\t\tret\n" + "End of assembler dump.\n" + "(sdcdb) " +-> "disassemble 0x40 0x45\n" +<- "Dump of assembler code from 0x00000040 to 0x00000045:\n" + "0x00000040 :\t\tinc\tr0\n" + "0x00000041 :\t\tmov\t@r0,ar3\n" + "0x00000043 :\t\tmov\ta,r3\n" + "0x00000044 :\t\trlc\ta\n" + "0x00000045 :\t\tsubb\ta,acc\n" + "End of assembler dump.\n" + "(sdcdb) " +-> "break x.c:23\n" +<- "Breakpoint 1 at 0x4b: file x.c, line 23.\n" + "(sdcdb) " +-> "info breakpoints\n" +<- "Num Type Disp Enb Address What\n" + "1 breakpoint keep y 0x0000004b at x.c:23\n" + "(sdcdb) " +-> + +3. show registers and stack + +frame - print information about the current Stack +where - print stack +up - Select and print stack frame that called this one +down - Select and print stack frame that called this one +info registers - show registers +info all-registers - show also special these function registers, + which are symbolical defined. +help show short help for ddd tooltip info +log examples: + +-> "where\n" +<- "#0 0x0000004b in subfunc1 () at x.c:23\n" + "#1 0x0000004f in main () at x.c:31\n" + "(sdcdb) " +-> "frame\n" +<- "#0 0x0000004b in subfunc1 () at x.c:23\n" + "\032\032x.c:23:1:beg:0x0000004b\n" + "(sdcdb) " +-> "up\n" +<- "#1 0x0000004f in main () at x.c:31\n" + "\032\032x.c:31:1:beg:0x0000004f\n" + "(sdcdb) " +-> "frame\n" +<- "#1 0x0000004f in main () at x.c:31\n" + "\032\032x.c:31:1:beg:0x0000004f\n" + "(sdcdb) " +-> "down\n" +<- "#0 0x0000004b in subfunc1 () at x.c:23\n" + "\032\032x.c:23:1:beg:0x0000004b\n" + "(sdcdb) " +-> "frame\n" +<- "#0 0x0000004b in subfunc1 () at x.c:23\n" + "\032\032x.c:23:1:beg:0x0000004b\n" + "(sdcdb) " +-> "info registers\n" +<- "R0 : 0x87 135 .\n" + "R1 : 0x00 0 .\n" + "R2 : 0x05 5 .\n" + "R3 : 0x00 0 .\n" + "R4 : 0x00 0 .\n" + "R5 : 0x08 8 .\n" + "R6 : 0x00 0 .\n" + "ACC : 0x00 0 .\n" + "B : 0x00 0 .\n" + "DPTR: 0x0005 5\n" + "@DPTR: 0x00 0 .\n" + "PSW : 0x00 | CY : 0 | AC : 0 | OV : 0 | P : 0\n" + "(sdcdb) " +# Showing all registers. +-> "info all-registers\n" +<- "R0 : 0x87 135 .\n" + "R1 : 0x00 0 .\n" + "R2 : 0x05 5 .\n" + "R3 : 0x00 0 .\n" + "R4 : 0x00 0 .\n" + "R5 : 0x08 8 .\n" + "R6 : 0x00 0 .\n" + "ACC : 0x00 0 .\n" + "B : 0x00 0 .\n" + "DPTR: 0x0005 5\n" + "@DPTR: 0x00 0 .\n" + "PSW : 0x00 | CY : 0 | AC : 0 | OV : 0 | P : 0\n" + "Special Function Registers:\n" +<- "P0=0xff P0_0=1 P0_1=1 P0_2=1 P0_3=1\n" + "SP=0x13\n" + "(sdcdb) " +-> "help step\n" +<- "Step program until it reaches a different source line.\n" + "(sdcdb) " +-> "help stepi\n" +<- "Step one instruction exactly.\n" + "(sdcdb) " + +4. show and set variables: +output [/] print value of without newline for tooltip of ddd +print [/] print value of with newline +display [/] print value of every time the program is stopped + or 'display' command without args is used. + +set variable = + + + is the format for the basic type which is print out. +If no format is set the default format is used. +format is set by ddd 'x' as hex 'o' as octal, 'd' as dezimal and 't' as binary. + + can by a variable , a array element , a structure element ( [] and . is parsed ). +indices of arrays may be constants or variables. +( dereference of pointers and casting today not implemented !! ) + +log examples: +code: + +typedef unsigned char uchar; +idata long l; +typedef struct _txstate +{ + uchar dstatus[4]; + uchar avalue [8 ]; +} txstate_t; + +xdata txstate_t txstates[8]; + +-> "output l\n" +<- "5(sdcdb) " +-> "display l\n" +<- "(sdcdb) " +-> "display /x l\n" +<- "(sdcdb) " +-> "display\n" +<- "2: /x l = 0x00000005\n" + "1: l = 5\n" + "(sdcdb) " +-> "display /o l\n" +<- "(sdcdb) " +-> "display\n" +<- "3: /o l = 00000000005\n" + "2: /x l = 0x00000005\n" + "1: l = 5\n" + "(sdcdb) " +-> "display /d l\n" +<- "(sdcdb) " +-> "display\n" +<- "4: /d l = 5\n" + "3: /o l = 00000000005\n" + "2: /x l = 0x00000005\n" + "1: l = 5\n" + "(sdcdb) " +-> "display /t l\n" +<- "(sdcdb) " +-> "display\n" +<- "5: /t l = 00000000000000000000000000000101\n" + "4: /d l = 5\n" + "3: /o l = 00000000005\n" + "2: /x l = 0x00000005\n" + "1: l = 5\n" + "(sdcdb) " +-> "output l\n" +<- "5(sdcdb) " +-> "print txstates\n" +<- "$2 = { { dstatus = {\'\\1\',\'\\0\',\'\\0\',\'\\0\'}, + avalue = {\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\'}}, + { dstatus = {\'\\0\',\'\\2\',\'\\0\',\'\\0\'}, + avalue = {\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\'}}, + { dstatus = {\'\\0\',\'\\0\',\'\\375\',\'\\0\'}, + avalue = {\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\'}}, + { dstatus = {\'\\0\',\'\\0\',\'\\0\',\'\\0\'}, + avalue = {\'\\0\',\'\\0\',\'\\0\',\'\\4\',\'\\0\',\'\\0\',\'\\0\',\ +'\\0\'}}, { dstatus = {\'\\0\',\'\\0\',\'\\0\',\'\\0\'}, + avalue = {\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\'}}, + { dstatus = {\'\\0\',\'\\0\',\'\\0\',\'\\0\'}, + avalue = {\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\'}}, + { dstatus = {\'\\0\',\'\\0\',\'\\0\',\'\\0\'}, + avalue = {\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\'}}, + { dstatus = {\'\\0\',\'\\0\',\'\\0\',\'\\0\'}, + avalue = {\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\0\',\'\\ +0\'}}}\n" + "(sdcdb) " +-> "print txstates[1].dstatus[1]\n" +<- "$5 = \'\\2\'\n" + "(sdcdb) " +-> "print /x txstates[1].dstatus[1]\n" +<- "$7 = 0x02\n" +-> "output txstates[1].dstatus[1]\n" +<- "\'\\2\'(sdcdb) " +-> "set variable txstates[1].dstatus[1] = 0x10\n" +<- "(sdcdb) " +-> "print /t txstates[1].dstatus[1]\n" +<- "$9 = 00010000\n" +-> "print /x txstates[1].dstatus[1]\n" +<- "$10 = 0x10\n" + +-> "output l\n" +<- "5(sdcdb) " +-> "set variable l = 2\n" +<- "(sdcdb) " +-> "print l\n" +<- "$15 = 2\n" +-> "print /x txstates[l].dstatus[2]\n" +<- "$16 = 0xfd\n" + + +--------------------------------------------------- + +Implementation Notes: + +IMEM and XMEM are cached to optimize the printaut of structures and arrays + + + +Notes April 23, 2003 +======================== +Martin Helmling added support for ddd GUI debugger. +Code added to display assembly, set variables, and other commands +to interface to ddd. + +From Martins email: + +in the attachment is my actual patch. + +The 'up' and 'down' stack commands are not implemented. +But the features for 'ddd' to see bopth the c source and the assembler +works, +also the display of variables. +Set variables are only implemented for basic types. +Register variables can also displayed, but here I think a problem in the +*.cdb file exists. +Sometimes the register name not exists: + +S:LcacheTxAnalogValue$offset$1$1({1}SC:U),E,0,0 +S:LcacheTxAnalogValue$i$1$1({1}SC:S),R,0,0,[] +S:LcacheTxAnalogValue$val$1$1({4}ST__00020000:S),E,0,0 +S:LcacheTxAnalogValue$value$1$1({1}SC:U),R,0,0,[] +S:LcacheTxAnalogValue$sloc0$1$0({4}SL:U),E,0,0 +S:LsetRelays$addr$1$1({1}SC:U),R,0,0,[r2] +S:LsetRelays$state$1$1({1}SC:U),R,0,0,[r3] +S:LsetRelays$value$1$1({1}SC:U),R,0,0,[r5] +S:L_main$i$1$1({1}SC:U),R,0,0,[] +S:L_main$j$1$1({1}SC:U),R,0,0,[r3] +S:L_main$ok$1$1({1}SC:U),R,0,0,[r3] + +the empty [] I mean !! + +Is this a known bug in sdcc ? + +Also sometimes not the correct breakpoints for stepping found in sdcdb. +I try to fix this tomorrow. + +Additional patches and notes from Martin(4-24-03): +in the attachment you found three patches: +debugpatch: Only for debugging, you can switch on and off the 4 different + debug and you can grep the debug by the prefix. +signalpatch:Now the simulator stops if the user sends an interrupt + ( or 'ddd' ) and also the simulator does not die by another + user signal. + +sympatch: This is not a feature, THIS is the fix of a BUG !!! + In some circumstances in the *.cdb file the Symbol record + comes before the function record. So the symbol was + generated TWO TIMES in the symbol list. The L:G and L:XG + + records then insert entry and exit address to the wrong + symbol. So before a new symbol is generated for the + function, a lookup in the symboltable is done. + +Example of a *.cdb: + +S:G$ZpuInitialize$0$0({2}DF,SV:S),C,0,0 +S:G$ZpuInitialize$0$0({2}DF,SV:S),C,0,0 +F:G$ZpuInitialize$0$0({2}DF,SV:S),Z,0,0,0,0,0 +S:LZpuInitialize$i$1$1({2}SI:S),R,0,0,[] +L:G$ZpuInitialize$0$0:ADF +L:XG$ZpuInitialize$0$0:BBB + + +Notes Feb 10, 2002 - Karl Bongers +======================== + +SDCDB is a debugger for SDCC compiler. It works as a front +end to the ucSim simulator/disassembler program. + +WARNING: SDCDB is EXPERIMENTAL and NOT A FULLY FUNCTIONING TOOL. + +SDCDB does hold out promise for a nice debugger tool that +could integrate well with ucSim and other SDCC tools. It has +some nice functionality that could augment ucSim nicely. +It reads in a lot of symbolic information from the .CDB +debug files as well as the source code and assembly +listings referred to in these CDB files. +This can be used to display your program data, list +c or asm source code and set breakpoints. + +Unfortunately, SDCDB is not quite finished and does not +function well enough yet to recommend for general use. + + +Usage Notes +====================== +Compile with --debug option: +sdcc --debug hi.c +This should generate .cdb symbolic debug files. + +Load sdcdb, like this: +sdcdb hi.ihx + +Then you need to do an initial "run" command. It should hopefully +stop somewhere at the main() entrypoint. + +Now you should be able to list code, and set breakpoints. Type +"c" to continue running to a breakpoint, or type "s" to single +step or "n" to skip function calls. Tpye "help" for a summary +of commands. + +Use a preceeding bang("!") to do s51 simulator commands. So for +example: +!pc +will send the "pc" command to ucSim and +give you the program counter and list the current line of assembly. +!help +will give you the brief command line help listing of ucSim. But +this help will scroll of the screen. So to get a list, I redirect +stdout to a text file to examine like this: +sdcdb hi.ihx 2>&1 | tee sdcdb.log + +Type '.' to toggle to a full time ucSim prompt. + + +SDCDB problem areas. +====================== + +Ok, so what are some of its problems? Lets try to itemize +them so we can fix them: + +* It hangs sometimes when trying to do step or next. + + This probably has something to do with the context + sdcdb tries to build dynamically. Sdcdb tries to + trace program operation by placing hidden breakpoints + and stepping threw the simulation between these. + +* Does not print variables properly. Seems to use the + wrong address for the variable. (fixed) + +* ASM listing not implemented. + This should be easy enough to add. This feature + really needs to be implemented before this is a useful + tool. That or addresses of code functions need to be + readily available for raw ucSim commands. + +* No way to browse symbols, files names. + Preferably, it is easy to learn the addresses of variables + and functions too. + (working on this... see new ls,lm,lf commands) + +* Does not allow listing, setting breakpoints or viewing variables + before starting the simulation. + (I am fixing now, partly fixed) + +* p codestr - print on code char * broken, could be CDB info invalid. + + +Changes Made +====================== + +Added a -z option. Any options after -z on sdcdb invocation line + are passed directly to ucSim. + +Fixed print basic variable command(was not parsing or expecting + "0x" in data coming from ucSim). Dump bit command changed from + "db" to "dump". + +Add support for the following alternative ucSim binaries: + -mz80 - use "uz80" simulator. + -mavr - use "uavr" simulator. + -mxa - use "uxa" simulator. + + Note that Z80(and probably avr/xa) does not produce enough + CDB debugging information to + make SDCDB useful. Hopefully CDB support will be + added to these other linkers and code generators. + +Added lf,lm,ls commands(list functions, list modules, list symbols). + This allows browsing some the CDB information SDCDB pulls in + to do the wonderful things it does. + +Added '.' prefix/command, used alone switches back and forth + from ucSim/SDCDB command mode). Also when at the (ucsim) prompt, + if a command is prefixed with '.' it will route the command to + the SDCDB command processor. (This could obsolete the '!' prefix). + + +====================== + +Fix any remaining shortcomings above and make sdcdb integrate better with +ucSim. + +Concerning the hanging on next/step instructions: This is critical +to fix. I beleive the problem is related to SDCDB's attempt to +dynamically track context. To do this, it sets many temporary break +points and uses these to progress step by step through the source code. +It does not seem reliable. It might be an idea to offer a simplified +mode of stepping and breakpoints. Need to study this more. + +Make SDCDB integrate better with ucSim. +I think if sdcdb can act more transparently in regard to ucSim +it would be used more. So stress adding value and enhancing +ucSim operation, and not block or hide the functionality of ucSim. + +* combine print "p" & "pt" together. We have room on the screen, +might as well print its type, address and value in one command. + +* "fr" command prints the current position in the C code. +Should also print the raw code address for dumping ucSim code. + + + +Developer Notes: +====================== +To debug, it might be helpful to turn on verbose debug dumps +by uncommenting #define SDCDB_DEBUG in sdcdb.h. + +Some basic layout: +sdcdb.c - main shell of the program. +cmd.c - process user commands typed in. +simi.c - handle talking to the simulator via a socket connection. +symtab.c - Misc. functions to translate and process linked list + structures(modules, functions, symbols, etc) and CDB file + parsing. +break.c - track and implement break points. + +Understanding the structures and access mechanisms of SDCDB +is a bit of work. The structures include generic linked list +and function access. These lists are accessed in part by the +functions from ../../src/SDCCset.c and SDCChash.c. See the +cmd.c:infoSymbols() routine to gain some insight into these +main program structures. Or type "info symbols" to dump +out some of these. The new ls,lm,lf commands are also based +on showing information about these lists of structures. + +Generic functions are used to act on these linked lists of +structures. For example, in cmd.c, DEFSETFUNC(funcWithName) +function will find a function structure with a given name. +So the linked list of function structures(with the head +"functions") is traversed and when one is found with a matching +name, a pointer to the function structure is returned. + +The src/SDCCset.c,SDCCset.h contain much of the core helper +routines to allowed to implement these linked list access +functions. + +The dynamic context tracking is difficult to understand. +It has some concept of stack use, as in +cmd.c:printSymValue(), where it can print variables relative +to the stack pointer. + + diff --git a/debugger/mcs51/Makefile.in b/debugger/mcs51/Makefile.in new file mode 100644 index 0000000..ebba94b --- /dev/null +++ b/debugger/mcs51/Makefile.in @@ -0,0 +1,117 @@ +# +# +# + +SHELL = /bin/sh +CC = @CC@ +CPP = @CPP@ +INSTALL = @INSTALL@ +STRIP = @STRIP@ + + +top_builddir = ../../ +top_srcdir = @srcdir@/../.. +SLIB = $(top_srcdir)/support/Util +SDCCLIB = $(top_srcdir)/src + +VPATH = @srcdir@ +srcdir = @srcdir@ + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ + +STD_INC = @sdcc_include_dir@ +CPPFLAGS = @CPPFLAGS@ -I. -I$(top_builddir) -I$(top_srcdir) -I$(SLIB) -DHAVE_CONFIG_H +CFLAGS = @CFLAGS@ +M_OR_MM = @M_OR_MM@ +LDFLAGS = @LDFLAGS@ + +EXEEXT = @EXEEXT@ + +LIBS = @LIBS@ @LIBREADLINE@ +LIBDIRS = + +OBJECTS = sdcdb.o symtab.o simi.o \ + break.o cmd.o +SLIBOBJS = NewAlloc.o +SDCCOBJS = SDCCset.o SDCChasht.o SDCCerr.o + +SOURCES = $(patsubst %.o,%.c,$(OBJECTS)) +SLIBSOURCES = $(patsubst %.o,$(SLIB)/%.c,$(SLIBOBJS)) +SDCCSOURCES = $(patsubst %.o,$(SDCCLIB)/%.c,$(SDCCOBJS)) + +TARGET = $(top_builddir)/bin/sdcdb$(EXEEXT) + + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf $(TARGET) + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: all installdirs + $(INSTALL) $(TARGET) $(DESTDIR)$(bindir)/sdcdb$(EXEEXT) + $(STRIP) $(DESTDIR)$(bindir)/sdcdb$(EXEEXT) + cp $(srcdir)/sdcdb.el $(DESTDIR)$(bindir)/sdcdb.el + cp $(srcdir)/sdcdbsrc.el $(DESTDIR)$(bindir)/sdcdbsrc.el + + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(DESTDIR)$(bindir)/sdcdb$(EXEEXT) + rm -f $(DESTDIR)$(bindir)/sdcdb.el + rm -f $(DESTDIR)$(bindir)/sdcdbsrc.el + +# Performing self-test +# -------------------- +check: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + $(INSTALL) -d $(DESTDIR)$(bindir) + + +# Creating dependencies +# --------------------- +dep: Makefile.dep + +Makefile.dep: $(SOURCES) $(SLIBSOURCES) $(SDCCSOURCES) $(srcdir)/*.h $(top_builddir)/*.h $(top_srcdir)/*.h + $(CPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.c,$^) >Makefile.dep + +ifeq "$(findstring $(MAKECMDGOALS),uninstall installcheck installdirs checkconf \ + clean distclean mostlyclean realclean)" "" + -include Makefile.dep +endif +include $(srcdir)/clean.mk + +# My rules +# -------- +$(TARGET): $(OBJECTS) $(SLIBOBJS) $(SDCCOBJS) + $(CC) $(LDFLAGS) -o $@ $(OBJECTS) $(SLIBOBJS) $(SDCCOBJS) $(LIBDIRS) $(LIBS) + +.c.o: + $(CC) $(CPPFLAGS) $(CFLAGS) -c -o $@ $< + +$(SLIBOBJS):%.o:$(SLIB)/%.c + $(CC) $(CPPFLAGS) $(CFLAGS) -c -o $@ $< + +$(SDCCOBJS):%.o:$(SDCCLIB)/%.c + $(CC) $(CPPFLAGS) $(CFLAGS) -c -o $@ $< + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" freshconf;\ + fi + +# End of cpp/Makefile diff --git a/debugger/mcs51/acinclude.m4 b/debugger/mcs51/acinclude.m4 new file mode 100644 index 0000000..c738322 --- /dev/null +++ b/debugger/mcs51/acinclude.m4 @@ -0,0 +1,76 @@ +dnl Borut Razem +dnl +dnl This macro checks for the presence of the readline library. +dnl It works also in cross-compilation environment. +dnl +dnl To get it into the aclocal.m4 dnl file, do this: +dnl aclocal -I . --verbose +dnl +dnl The --verbose will show all of the files that are searched +dnl for .m4 macros. + +AC_DEFUN([wi_LIB_READLINE], [ + dnl check for the readline.h header file + + AC_CHECK_HEADER(readline/readline.h) + + if test "$ac_cv_header_readline_readline_h" = yes; then + dnl check the readline version + + cat > conftest.$ac_ext < +#include +wi_LIB_READLINE_VERSION RL_VERSION_MAJOR RL_VERSION_MINOR +EOF + + wi_READLINE_VERSION=$($CPP $CPPFLAGS conftest.$ac_ext | sed -n -e "s/^wi_LIB_READLINE_VERSION *\([[0-9\]][[0-9\]]*\) *\([[0-9\]][[0-9\]]*\)$/\1.\2/p") + rm -rf conftest* + + if test -n "$wi_READLINE_VERSION"; then + wi_MAJOR=$(expr $wi_READLINE_VERSION : '\([[0-9]][[0-9]]*\)\.') + wi_MINOR=$(expr $wi_READLINE_VERSION : '[[0-9]][[0-9]]*\.\([[0-9]][[0-9]]*$\)') + if test $wi_MINOR -lt 10; then + wi_MINOR=$(expr $wi_MINOR \* 10) + fi + wi_READLINE_VERSION=$(expr $wi_MAJOR \* 100 + $wi_MINOR) + else + wi_READLINE_VERSION=-1 + fi + + dnl check for the readline library + + ac_save_LIBS="$LIBS" + # Note: $LIBCURSES is permitted to be empty. + + for LIBREADLINE in "-lreadline.dll" "-lreadline" "-lreadline $LIBCURSES" "-lreadline -ltermcap" "-lreadline -lncurses" "-lreadline -lcurses" + do + AC_MSG_CHECKING([for GNU Readline library $LIBREADLINE]) + + LIBS="$ac_save_LIBS $LIBREADLINE" + + AC_TRY_LINK([ + /* includes */ + #include + #include + ],[ + /* function-body */ + int dummy = rl_completion_append_character; /* rl_completion_append_character appeared in version 2.1 */ + readline(NULL); + ],[ + wi_cv_lib_readline=yes + AC_MSG_RESULT(yes) + ],[ + wi_cv_lib_readline=no + AC_MSG_RESULT(no) + ]) + + if test "$wi_cv_lib_readline" = yes; then + AC_SUBST(LIBREADLINE) + AC_DEFINE_UNQUOTED(HAVE_LIBREADLINE, $wi_READLINE_VERSION, [Readline]) + break + fi + done + + LIBS="$ac_save_LIBS" + fi +]) diff --git a/debugger/mcs51/aclocal.m4 b/debugger/mcs51/aclocal.m4 new file mode 100644 index 0000000..b76b053 --- /dev/null +++ b/debugger/mcs51/aclocal.m4 @@ -0,0 +1,85 @@ +dnl aclocal.m4 generated automatically by aclocal 1.4-p6 + +dnl Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc. +dnl This file is free software; the Free Software Foundation +dnl gives unlimited permission to copy and/or distribute it, +dnl with or without modifications, as long as this notice is preserved. + +dnl This program is distributed in the hope that it will be useful, +dnl but WITHOUT ANY WARRANTY, to the extent permitted by law; without +dnl even the implied warranty of MERCHANTABILITY or FITNESS FOR A +dnl PARTICULAR PURPOSE. + +dnl This macro will check for the presence of the readline library. +dnl To get it into the aclocal.m4 dnl file, do this: +dnl aclocal -I . --verbose +dnl +dnl The --verbose will show all of the files that are searched +dnl for .m4 macros. + +AC_DEFUN([wi_LIB_READLINE], [ + dnl check for the readline.h header file + + AC_CHECK_HEADER(readline/readline.h) + + if test "$ac_cv_header_readline_readline_h" = yes; then + dnl check the readline version + + cat > conftest.$ac_ext < +#include +wi_LIB_READLINE_VERSION RL_VERSION_MAJOR RL_VERSION_MINOR +EOF + + wi_READLINE_VERSION=$($CPP $CPPFLAGS conftest.$ac_ext | sed -n -e "s/^wi_LIB_READLINE_VERSION *\([[0-9\]][[0-9\]]*\) *\([[0-9\]][[0-9\]]*\)$/\1.\2/p") + rm -rf conftest* + + if test -n "$wi_READLINE_VERSION"; then + wi_MAJOR=$(expr $wi_READLINE_VERSION : '\([[0-9]][[0-9]]*\)\.') + wi_MINOR=$(expr $wi_READLINE_VERSION : '[[0-9]][[0-9]]*\.\([[0-9]][[0-9]]*$\)') + if test $wi_MINOR -lt 10; then + wi_MINOR=$(expr $wi_MINOR \* 10) + fi + wi_READLINE_VERSION=$(expr $wi_MAJOR \* 100 + $wi_MINOR) + else + wi_READLINE_VERSION=-1 + fi + + dnl check for the readline library + + ac_save_LIBS="$LIBS" + # Note: $LIBCURSES is permitted to be empty. + + for LIBREADLINE in "-lreadline.dll" "-lreadline" "-lreadline $LIBCURSES" "-lreadline -ltermcap" "-lreadline -lncurses" "-lreadline -lcurses" + do + AC_MSG_CHECKING([for GNU Readline library $LIBREADLINE]) + + LIBS="$ac_save_LIBS $LIBREADLINE" + + AC_TRY_LINK([ + /* includes */ + #include + #include + ],[ + /* function-body */ + int dummy = rl_completion_append_character; /* rl_completion_append_character appeared in version 2.1 */ + readline(NULL); + ],[ + wi_cv_lib_readline=yes + AC_MSG_RESULT(yes) + ],[ + wi_cv_lib_readline=no + AC_MSG_RESULT(no) + ]) + + if test "$wi_cv_lib_readline" = yes; then + AC_SUBST(LIBREADLINE) + AC_DEFINE_UNQUOTED(HAVE_LIBREADLINE, $wi_READLINE_VERSION, [Readline]) + break + fi + done + + LIBS="$ac_save_LIBS" + fi +]) + diff --git a/debugger/mcs51/break.c b/debugger/mcs51/break.c new file mode 100644 index 0000000..0637661 --- /dev/null +++ b/debugger/mcs51/break.c @@ -0,0 +1,612 @@ +/*------------------------------------------------------------------------- + break.c - Source file for break point management + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "sdcdb.h" +#include "symtab.h" +#include "break.h" +#include "cmd.h" +#include "newalloc.h" + +hTab *bptable = NULL; +char doingSteps = 0; +char userBpPresent = 0; + +/* call stack can be 1024 deep */ +STACK_DCL(callStack,function *,1024); + +#ifdef SDCDB_DEBUG +char *debug_bp_type_strings[] = + {"ERR-0", + "DATA", + "CODE" , + "A_CODE" , + "USER" , + "STEP" , + "NEXT" , + "FENTRY" , + "FEXIT", "TMPUSER", ""}; +#endif + +static long bpnum = 0; + +long getLastBreakptNumber() +{ + return bpnum; +} + +void resetHitCount() +{ + int k; + breakp *bp; + for ( bp = hTabFirstItem(bptable,&k); bp ; + bp = hTabNextItem(bptable,&k)) + { + bp->hitCnt = 0; + bp->ignoreCnt = 0; + } +} + +/*-----------------------------------------------------------------*/ +/* setBreakPoint - creates an entry in the break point table */ +/*-----------------------------------------------------------------*/ +int setBreakPoint (unsigned addr, char addrType, char bpType, + int (*callBack)(unsigned,breakp *,context *) , + char *fileName, int lineno) +{ + breakp *bp, *bpl; + + Dprintf(D_break, ("setBreakPoint: addr:%x atype:%s bpType:%s [%s:%d]\n", + addr, + debug_bp_type_strings[addrType], + debug_bp_type_strings[bpType], + fileName, lineno+1)); + + /* allocate & init a new bp */ + bp = Safe_calloc(1,sizeof(breakp)); + bp->addr = addr; + bp->addrType = addrType; + bp->bpType = bpType; + bp->callBack = callBack; + bp->bpnum = ((bpType == USER || bpType == TMPUSER)? ++bpnum : 0); + bp->filename = fileName; + bp->lineno = lineno; + + /* if this is an user break point then + check if there already exists one for this address */ + if (bpType == USER || bpType == TMPUSER) + { + for ( bpl = hTabFirstItemWK(bptable,addr) ; bpl; + bpl = hTabNextItemWK(bptable)) + { + + /* if also a user break point then issue Note : */ + if (bpl->bpType == USER || bpType == TMPUSER) + fprintf(stderr,"Note: breakpoint %d also set at pc 0x%x\n", + bpl->bpnum,bpl->addr); + } + + fprintf(stderr,"Breakpoint %d at 0x%x: file %s, line %d.\n", + bp->bpnum, addr, fileName, lineno+1); + + userBpPresent++; + } + + if (bpType != STEP && bpType != NEXT) + { + /* if a break point does not already exist then + send command to simulator to add one */ + if (!hTabSearch(bptable,addr)) + /* send the break command to the simulator */ + simSetBP (addr); + } + + /* now add the break point to list */ + hTabAddItem(&bptable,addr,bp); + + return bp->bpnum ; +} + +/*-----------------------------------------------------------------*/ +/* deleteSTEPbp - deletes all step break points */ +/*-----------------------------------------------------------------*/ +void deleteSTEPbp () +{ + breakp *bp; + int k; + + Dprintf(D_break, ("break: Deleting all STEP BPs\n")); + /* for break points delete if they are STEP */ + for ( bp = hTabFirstItem(bptable,&k); bp ; + bp = hTabNextItem(bptable,&k)) + { + + /* if this is a step then delete */ + if (bp->bpType == STEP) + { + hTabDeleteItem(&bptable,bp->addr,bp,DELETE_ITEM,NULL); + Safe_free(bp); + } + } + +} + +/*-----------------------------------------------------------------*/ +/* deleteNEXTbp - deletes all step break points */ +/*-----------------------------------------------------------------*/ +void deleteNEXTbp () +{ + breakp *bp; + int k; + + Dprintf(D_break, ("break: Deleting all NEXT BPs\n")); + + /* for break points delete if they are NEXT */ + for ( bp = hTabFirstItem(bptable,&k); bp ; + bp = hTabNextItem(bptable,&k)) + { + + /* if this is a step then delete */ + if (bp->bpType == NEXT) + { + hTabDeleteItem(&bptable,bp->addr,bp,DELETE_ITEM,NULL); + Safe_free(bp); + } + } + +} + +static void freeUSERbp(breakp *bp) +{ + if ( bp->commands ) + Safe_free(bp->commands); + if ( bp->condition ) + Safe_free(bp->condition); + Safe_free(bp); +} + +/*-----------------------------------------------------------------*/ +/* deleteUSERbp - deletes USER break point with number */ +/*-----------------------------------------------------------------*/ +void deleteUSERbp (int bpnum) +{ + breakp *bp; + int k; + + Dprintf(D_break, ("break: deleteUSERbp %d\n", bpnum)); + + /* for break points delete if they are STEP */ + for ( bp = hTabFirstItem(bptable,&k); bp ; + bp = hTabNextItem(bptable,&k)) { + + /* if this is a user then delete if break + point matches or bpnumber == -1 (meaning delete + all user break points */ + if ((bp->bpType == USER || bp->bpType == TMPUSER ) + && ( bp->bpnum == bpnum || bpnum == -1)) + { + hTabDeleteItem(&bptable,bp->addr,bp,DELETE_ITEM,NULL); + + /* if this leaves no other break points then + send command to simulator to delete bp from this addr */ + if (hTabSearch(bptable,bp->addr) == NULL) { + simClearBP (bp->addr); + Dprintf(D_break, ("break: deleteUSERbp:simClearBP 0x%x\n", bp->addr)); + + } + fprintf(stdout,"Deleted breakpoint %d\n",bp->bpnum); + userBpPresent-- ; + freeUSERbp(bp); + if (bpnum == -1) + continue ; + else + break; + } + } + + if (!bp && bpnum != -1) + fprintf(stderr,"No breakpoint number %d.\n",bpnum); +} + +/*-----------------------------------------------------------------*/ +/* setUserbpCommand - set commandstring for breakpoint */ +/*-----------------------------------------------------------------*/ +void setUserbpCommand (int bpnum, char *cmds) +{ + breakp *bp; + int k; + Dprintf(D_break, ("break: setUserbpCommand %d: commands:\n%send\n", + bpnum, cmds)); + + for ( bp = hTabFirstItem(bptable,&k); bp ; + bp = hTabNextItem(bptable,&k)) + { + if ((bp->bpType == USER || bp->bpType == TMPUSER ) + && ( bp->bpnum == bpnum )) + { + if ( bp->commands ) + Safe_free(bp->commands); + bp->commands = cmds; + return; + } + } + fprintf(stderr,"No breakpoint number %d.\n",bpnum); +} + +/*-----------------------------------------------------------------*/ +/* setUserbpCondition - set condition string for breakpoint */ +/*-----------------------------------------------------------------*/ +void setUserbpCondition (int bpnum, char *cond) +{ + breakp *bp; + int k; + Dprintf(D_break, ("break: setUserbpCondition %d: condition:'%s'\n", + bpnum, cond?cond:"")); + + for ( bp = hTabFirstItem(bptable,&k); bp ; + bp = hTabNextItem(bptable,&k)) + { + if ((bp->bpType == USER || bp->bpType == TMPUSER ) + && ( bp->bpnum == bpnum )) + { + if ( bp->condition ) + Safe_free(bp->condition); + bp->condition = cond; + return; + } + } + fprintf(stderr,"No breakpoint number %d.\n",bpnum); +} + +/*-----------------------------------------------------------------*/ +/* setUserbpIgnCount - set ignorecount for breakpoint */ +/*-----------------------------------------------------------------*/ +void setUserbpIgnCount (int bpnum, int ignorecnt ) +{ + breakp *bp; + int k; + Dprintf(D_break, ("break: setUserbpIgnCount %d: ignorecnt=%d\n", + bpnum, ignorecnt)); + + for ( bp = hTabFirstItem(bptable,&k); bp ; + bp = hTabNextItem(bptable,&k)) + { + if ((bp->bpType == USER || bp->bpType == TMPUSER ) + && ( bp->bpnum == bpnum )) + { + bp->ignoreCnt = bp->hitCnt + ignorecnt; + return; + } + } + fprintf(stderr,"No breakpoint number %d.\n",bpnum); +} + +/*-----------------------------------------------------------------*/ +/* listUSERbp - list all user break points */ +/*-----------------------------------------------------------------*/ +void listUSERbp () +{ + breakp *bp; + int k, isuser; + + /* if there are none then say so & return */ + if (!userBpPresent) { + fprintf(stdout,"No breakpoints.\n"); + return ; + } + fprintf(stdout,"Num Type Disp Enb Address What\n"); + for ( bp = hTabFirstItem(bptable,&k) ; bp ; + bp = hTabNextItem(bptable,&k)) { + + isuser = 0; + if (bp->bpType == USER ) { + fprintf(stdout,"%-3d breakpoint keep y 0x%08x at %s:%d\n", + bp->bpnum,bp->addr, + bp->filename,bp->lineno+1); + isuser = 1; + } + else if (bp->bpType == TMPUSER ) { + fprintf(stdout,"%-3d breakpoint del y 0x%08x at %s:%d\n", + bp->bpnum,bp->addr, + bp->filename,bp->lineno+1); + isuser = 1; + } + if ( ! isuser ) + continue; + if ( bp->ignoreCnt > bp->hitCnt ) + fprintf(stdout,"\tignore next %d hits\n", + bp->ignoreCnt - bp->hitCnt ); + if ( bp->condition ) + fprintf(stdout,"\tstop only if %s\n",bp->condition ); + if ( bp->hitCnt > 0 ) + fprintf(stdout,"\tbreakpoint already hit %d time%s\n", + bp->hitCnt,bp->hitCnt>1?"s":"" ); + + + } +} + +/*-----------------------------------------------------------------*/ +/* simStopBPCB - simulator stopped break point */ +/*-----------------------------------------------------------------*/ +static int simStopBPCB( unsigned int addr) +{ + fprintf(stdout,"Simulator stopped at Address 0x%04x\n",addr); + fprintf(stdout,"%s",simResponse()); + return 1; +} + +/*-----------------------------------------------------------------*/ +/* clearUSERbp - deletes USER break point at address */ +/*-----------------------------------------------------------------*/ +void clearUSERbp ( unsigned int addr ) +{ + breakp *bp; + + /* for break points delete if they are STEP */ + for ( bp = hTabFirstItemWK(bptable,addr); bp ; + bp = hTabNextItemWK(bptable)) { + + /* if this is a step then delete */ + if (bp->bpType == USER || bp->bpType == TMPUSER) + { + hTabDeleteItem(&bptable,bp->addr,bp,DELETE_ITEM,NULL); + + /* if this leaves no other break points then + send command to simulator to delete bp from this addr */ + if (hTabSearch(bptable,bp->addr) == NULL) + { + simClearBP(bp->addr); + } + fprintf(stdout,"Deleted breakpoint %d\n", + bp->bpnum); + userBpPresent-- ; + freeUSERbp(bp); + break; + } + } + + if (!bp) + fprintf(stderr,"No breakpoint at address 0x%x.\n",addr); +} + +/*-----------------------------------------------------------------*/ +/* dispatchCB - will lookup the bp table and dispatch the cb funcs */ +/*-----------------------------------------------------------------*/ +int dispatchCB (unsigned addr, context *ctxt) +{ + breakp *bp; + int rv =0; + + Dprintf(D_break, ("break: dispatchCB: addr:0x%x \n", addr)); + + /* if no break points set for this address + then use a simulator stop break point */ + if ((bp = hTabFirstItemWK(bptable,addr)) == NULL) { + if ( doingSteps == 2 ) return 1; + if ( doingSteps ) return 0; + if ( contsim ) return 0; + return simStopBPCB(addr); + } + + /* dispatch the call back functions */ + for (; bp; bp = hTabNextItemWK(bptable)) + { + rv += (*bp->callBack)(addr,bp,ctxt); + } + + if (rv == 0) { + Dprintf(D_break, ("break: dispatchCB: WARNING rv==0\n", rv)); + } + + return rv; +} + +/*-----------------------------------------------------------------*/ +/* fentryCB - callback function for function entry */ +/*-----------------------------------------------------------------*/ +BP_CALLBACK(fentryCB) +{ + function *func; + + /* we save the value of SP + which will be used to display the value of local variables + and parameters on the stack */ + ctxt->func->stkaddr = simGetValue (0x81,'I',1); + + Dprintf(D_break, ("break: fentryCB: BP_CALLBACK entry %s sp=0x%02x %p\n", + ctxt->func->sym->name, + ctxt->func->stkaddr, p_callStack)); + + /* and set laddr of calling function to return addr from stack */ + if ((func = STACK_PEEK(callStack))) + { + /* extern stack ?? 'A' */ + func->laddr = simGetValue (ctxt->func->stkaddr-1,'B',2); + } + /* add the current function into the call stack */ + STACK_PUSH(callStack,ctxt->func); + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* fexitCB - call back for function exit */ +/*-----------------------------------------------------------------*/ +BP_CALLBACK(fexitCB) +{ + function *func; + /* pop the top most from the call stack */ + func = STACK_POP(callStack); + + if (!func) + { + fprintf(stdout, "Stack underflow\n"); + return 1; + } + + Dprintf(D_break, ("break: fexitCB: BP_CALLBACK entry %s %p\n", func->sym->name, p_callStack)); + + /* check main function */ + if ( !strcmp(func->sym->name, "main")) + { + fprintf(stdout, "Program exited with code %lu.\n", simGetValue (0x82,'I',2)); + return 1; + } + return 0; +} +/*-----------------------------------------------------------------*/ +/* userBpCB - call back function for user break points */ +/*-----------------------------------------------------------------*/ +BP_CALLBACK(userBpCB) +{ + bp->hitCnt++ ; + Dprintf(D_break, ("break: userBpCB: BP_CALLBACK entry hit=%d ignor=%d\n", + bp->hitCnt, bp->ignoreCnt)); + + if ( bp->ignoreCnt > bp->hitCnt ) + return 0; + + if ( bp->condition ) + { + if (! conditionIsTrue( bp->condition, ctxt )) + return 0; + } + + if ( bp->commands ) + { + Dprintf(D_break, ("break: userBpCB: commands:%p\n", bp->commands)); + setCmdLine(bp->commands); + } + + if (srcMode == SRC_CMODE) { + fprintf(stdout,"Breakpoint %d, %s() at %s:%d\n", + bp->bpnum, + ctxt->func->sym->name, + ctxt->func->mod->c_name, + ctxt->cline+1); + if (ctxt->func->mod && ctxt->cline > 0) + fprintf(stdout,"%d\t%s",ctxt->cline+1, + ctxt->func->mod->cLines[ctxt->cline]->src); + } else { + fprintf(stdout,"Breakpoint %d, %s() at %s:%d\n", + bp->bpnum, + ctxt->func->sym->name, + ctxt->func->mod->asm_name, + ctxt->asmline+1); + if (ctxt->func->mod && ctxt->asmline > 0) + fprintf(stdout,"%d\t%s",ctxt->asmline+1, + ctxt->func->mod->asmLines[ctxt->asmline]->src); + } + + if ( bp->bpType == TMPUSER && bp->bpnum > 0 ) + { + hTabDeleteItem(&bptable,bp->addr,bp,DELETE_ITEM,NULL); + + /* if this leaves no other break points then + send command to simulator to delete bp from this addr */ + if (hTabSearch(bptable,bp->addr) == NULL) + { + simClearBP (bp->addr); + Dprintf(D_break, ("break: simClearBP 0x%x\n", bp->addr)); + + } + userBpPresent-- ; + freeUSERbp(bp); + } + return 1; +} + +/*-----------------------------------------------------------------*/ +/* stepBpCB - call back function for step break points */ +/*-----------------------------------------------------------------*/ +BP_CALLBACK(stepBpCB) +{ + static function *lfunc = NULL; + + Dprintf(D_break, ("break: stepBpCB: BP_CALLBACK entry\n")); + + if (srcMode == SRC_CMODE) { + if ((lfunc && lfunc != ctxt->func) || !lfunc) + fprintf(stdout,"%s () at %s:%d\n", + ctxt->func->sym->name, + ctxt->func->mod->c_name, + ctxt->cline+1); + + if (ctxt->func->mod && ctxt->cline > 0) { + fprintf(stdout,"%d\t%s",ctxt->cline+1 , + ctxt->func->mod->cLines[ctxt->cline]->src); + } + } else { + if ((lfunc && lfunc != ctxt->func) || !lfunc) + fprintf(stdout,"%s () at %s:%d\n", + ctxt->func->sym->name, + ctxt->func->mod->asm_name, + ctxt->asmline); + + if (ctxt->func->mod && ctxt->cline > 0) { + fprintf(stdout,"%d\t%s",ctxt->asmline , + ctxt->func->mod->asmLines[ctxt->asmline]->src); + } + } + lfunc = ctxt->func; + + deleteSTEPbp(); + return 1; +} + +/*-----------------------------------------------------------------*/ +/* nextBpCB - call back function for next break points */ +/*-----------------------------------------------------------------*/ +BP_CALLBACK(nextBpCB) +{ + static function *lfunc = NULL; + + Dprintf(D_break, ("break: nextBpCB: BP_CALLBACK entry\n")); + + if (srcMode == SRC_CMODE) { + if ((lfunc && lfunc != ctxt->func) || !lfunc) + fprintf(stdout,"%s () at %s:%d\n", + ctxt->func->sym->name, + ctxt->func->mod->c_name, + ctxt->cline+1); + + if (ctxt->func->mod && ctxt->cline > 0) + fprintf(stdout,"%d\t%s",ctxt->cline+1, + ctxt->func->mod->cLines[ctxt->cline]->src); + } else { + if ((lfunc && lfunc != ctxt->func) || !lfunc) + fprintf(stdout,"%s () at %s:%d\n", + ctxt->func->sym->name, + ctxt->func->mod->asm_name, + ctxt->asmline); + + if (ctxt->func->mod && ctxt->asmline > 0) + fprintf(stdout,"%d\t%s",ctxt->asmline, + ctxt->func->mod->asmLines[ctxt->asmline]->src); + + } + lfunc = ctxt->func; + + deleteNEXTbp(); + return 1; +} diff --git a/debugger/mcs51/break.h b/debugger/mcs51/break.h new file mode 100644 index 0000000..062cb22 --- /dev/null +++ b/debugger/mcs51/break.h @@ -0,0 +1,98 @@ +/*------------------------------------------------------------------------- + break.h - Header file for break point management + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCDB_BREAK_H +#define SDCDB_BREAK_H + +#include "simi.h" + +/* break point type */ +enum { + DATA = 1, + CODE , + A_CODE , + USER , + STEP , + NEXT , + FENTRY , + FEXIT, + TMPUSER }; + +typedef struct breakp +{ + unsigned addr; /* address of break point */ + int bpnum ; /* break point number */ + char addrType; /* data or code */ + char bpType ; /* bp type USER/ LOGICAL */ + char *filename; /* file name */ + int lineno ; /* lineno */ + int (*callBack) + (unsigned,struct breakp *,context *);/* address of call back + * function */ + char *commands; + int ignoreCnt; + int hitCnt; + char *condition; +} breakp; + + +#define BP_CALLBACK(func) \ + int func (unsigned addr, \ + breakp *bp, \ + context *ctxt) + +#define EXTERN_BP_CALLBACK(func) \ + extern int func (unsigned addr, \ + breakp *bp, \ + context *ctxt) + +extern char userBpPresent; +extern char doingSteps; +extern hTab *bptable; + + + +int setBreakPoint (unsigned , char , char, + int (*callBack)(unsigned,breakp *bp,context *),char *, int); + +long getLastBreakptNumber(void); +void resetHitCount(void); +void setUserbpCommand (int , char *); +void setUserbpCondition (int , char *); +void setUserbpIgnCount (int , int ); + +void clearUSERbp ( unsigned int ); +void deleteSTEPbp(); +void deleteNEXTbp(); +void deleteUSERbp(int); +int dispatchCB (unsigned, context *); +void listUSERbp (); + +/* call back functions */ +EXTERN_BP_CALLBACK(fexitCB); +EXTERN_BP_CALLBACK(fentryCB); +EXTERN_BP_CALLBACK(userBpCB); +EXTERN_BP_CALLBACK(stepBpCB); +EXTERN_BP_CALLBACK(nextBpCB); + +#endif diff --git a/debugger/mcs51/clean.mk b/debugger/mcs51/clean.mk new file mode 100644 index 0000000..e105224 --- /dev/null +++ b/debugger/mcs51/clean.mk @@ -0,0 +1,23 @@ +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + rm -f $(top_builddir)/bin/sdcdb$(EXEEXT) + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f config.h config.cache config.log config.status + rm -f Makefile *.dep + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean diff --git a/debugger/mcs51/cmd.c b/debugger/mcs51/cmd.c new file mode 100644 index 0000000..4bfc16f --- /dev/null +++ b/debugger/mcs51/cmd.c @@ -0,0 +1,3343 @@ +/*------------------------------------------------------------------------- + cmd.c - source file for debugger command execution + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "sdcdb.h" +#include "symtab.h" +#include "simi.h" +#include "break.h" +#include "cmd.h" +#include "newalloc.h" + +/* default number of lines to list out */ +#define LISTLINES 10 +static int listlines = LISTLINES; + +/* mainly used to retain a reference to the active module being + listed. May be used as a general context for other commands if + no better context is available */ +static module *list_mod = NULL; + +EXTERN_STACK_DCL(callStack,function *,1024); + +#if defined(__APPLE__) && defined(__MACH__) +static char *copying= +{" GNU GENERAL PUBLIC LICENSE Version 2"}; +static char *warranty= +{" NO WARRANTY"}; +#else +static char *copying= +" GNU GENERAL PUBLIC LICENSE\n" +" Version 2, June 1991\n" +"\n" +" Copyright (C) 1989, 1991 Free Software Foundation, Inc.\n" +" 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA\n" +" Everyone is permitted to copy and distribute verbatim copies\n" +" of this license document, but changing it is not allowed.\n" +"\n" +" Preamble\n" +"\n" +" The licenses for most software are designed to take away your\n" +"freedom to share and change it. By contrast, the GNU General Public\n" +"License is intended to guarantee your freedom to share and change free\n" +"software--to make sure the software is free for all its users. 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The Free Software Foundation may publish revised and/or new versions\n" +"of the General Public License from time to time. Such new versions will\n" +"be similar in spirit to the present version, but may differ in detail to\n" +"address new problems or concerns.\n" +"\n" +"Each version is given a distinguishing version number. If the Program\n" +"specifies a version number of this License which applies to it and \"any\n" +"later version\", you have the option of following the terms and conditions\n" +"either of that version or of any later version published by the Free\n" +"Software Foundation. If the Program does not specify a version number of\n" +"this License, you may choose any version ever published by the Free Software\n" +"Foundation.\n" +"\n" +" 10. If you wish to incorporate parts of the Program into other free\n" +"programs whose distribution conditions are different, write to the author\n" +"to ask for permission. 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SHOULD THE\n" +"PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,\n" +"REPAIR OR CORRECTION.\n" +"\n" +" 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING\n" +"WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR\n" +"REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,\n" +"INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING\n" +"OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED\n" +"TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY\n" +"YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER\n" +"PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE\n" +"POSSIBILITY OF SUCH DAMAGES.\n"; +#endif + +static void printTypeInfo(link *); +static void printValAggregates (symbol *,link *,char,unsigned int,int); +static int printOrSetSymValue (symbol *sym, context *cctxt, + int flg, int dnum, int fmt, + char *rs, char *val, char cmp); + +int srcMode = SRC_CMODE ; +set *dispsymbols = NULL ; /* set of displayable symbols */ +static int currentFrame = 0; /* actual displayed frame */ +/*-----------------------------------------------------------------*/ +/* funcWithName - returns function with name */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(funcWithName) +{ + function *func = item; + V_ARG(char *,name); + V_ARG(function **,funcp); + + if (*funcp) + return 0; + + if (strcmp(func->sym->name,name) == 0) { + *funcp = func; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* symWithAddr - look for symbol with sfr / sbit address */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(symWithAddr) +{ + symbol *sym = item; + V_ARG(unsigned long,laddr); + V_ARG(int ,laddrspace); + V_ARG(symbol **,rsym); + + if (*rsym) + return 0; + + if ( sym->addr == laddr && + sym->addrspace == laddrspace ) + { + *rsym = sym; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* setBPatModLine - set break point at the line specified for the */ +/*-----------------------------------------------------------------*/ +static void setBPatModLine (module *mod, int line, char bpType ) +{ + int next_line; + + /* look for the first executable line after the line + specified & get the break point there */ + + if ( line < 0 ) + return; + + if (srcMode == SRC_CMODE && line > mod->ncLines) { + fprintf(stderr,"No line %d in file \"%s\".\n", + line,mod->c_name); + return ; + } + + if (srcMode == SRC_AMODE && line > mod->nasmLines) { + fprintf(stderr,"No line %d in file \"%s\".\n", + line,mod->asm_name); + return ; + } + + next_line = line; + for ( ; next_line < (srcMode == SRC_CMODE ? mod->ncLines : mod->nasmLines ) ; + next_line++ ) { + if (srcMode == SRC_CMODE) { + if (mod->cLines[next_line]->addr != INT_MAX) { + setBreakPoint (mod->cLines[next_line]->addr, CODE, bpType, + userBpCB, mod->c_name, next_line); + return; +// break; + } + } + else { + if (mod->asmLines[next_line]->addr != INT_MAX) { + setBreakPoint (mod->asmLines[next_line]->addr, CODE, bpType, + userBpCB, mod->asm_name, next_line); + return; +// break; + } + } + } + + fprintf(stderr,"No line %d or after in file \"%s\"..\n", + line,mod->c_name); + + return; +} + +/*-----------------------------------------------------------------*/ +/* clearBPatModLine - clr break point at the line specified */ +/*-----------------------------------------------------------------*/ +static void clearBPatModLine (module *mod, int line) +{ + /* look for the first executable line after the line + specified & get the break point there */ + if (srcMode == SRC_CMODE && line > mod->ncLines) { + fprintf(stderr,"No line %d in file \"%s\".\n", + line,mod->c_name); + return ; + } + + if (srcMode == SRC_AMODE && line > mod->ncLines) { + fprintf(stderr,"No line %d in file \"%s\".\n", + line,mod->c_name); + return ; + } + + for ( ; line < (srcMode == SRC_CMODE ? mod->ncLines : mod->nasmLines ) ; + line++ ) { + if (srcMode == SRC_CMODE) + if (mod->cLines[line]->addr) { + clearUSERbp (mod->cLines[line]->addr); + break; + } + else + if (mod->asmLines[line]->addr) { + clearUSERbp (mod->asmLines[line]->addr); + break; + } + } + + return; +} + +/*-----------------------------------------------------------------*/ +/* moduleLineWithAddr - finds and returns a line with a given address */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(moduleLineWithAddr) +{ + module *mod = item; + int i; + + V_ARG(unsigned int,addr); + V_ARG(module **,rmod); + V_ARG(int *,line); + + if (*rmod) + return 0; + + for (i=0; i < mod->nasmLines; i++ ) + { + if ( mod->asmLines[i]->addr == addr) + { + *rmod = mod ; + if (line ) + { + *line = 0; + for ( i=0; i < mod->ncLines; i++ ) + { + if ( mod->cLines[i]->addr > addr) + break; + *line = i; + } + return 1; + } + } + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* funcWithNameModule - returns functions with a name module combo */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(funcWithNameModule) +{ + function *func = item; + V_ARG(char *,fname); + V_ARG(char *,mname); + V_ARG(function **,funcp); + + if (*funcp) + return 0; + + if (strcmp(func->sym->name,fname) == 0 && + strcmp(func->mod->c_name,mname) == 0) { + *funcp = func; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* funcInAddr - given an address returns the function */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(funcInAddr) +{ + function *func = item; + V_ARG(unsigned int,addr); + V_ARG(function **,funcp); + + if (*funcp) + return 0; + + /* in the address range */ + if (func->sym->addr <= addr && + func->sym->eaddr >= addr) { + + *funcp = func; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* setStepBp - will set STEP Bp @ function entry points */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(setStepBp) +{ + function *func = item; + + if (func->sym && func->sym->addr ) { + + /* set the entry break point */ + setBreakPoint (func->sym->addr , CODE , STEP , + stepBpCB ,func->mod->c_name , func->entryline); + + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* setStepEPBp - sets a given type of bp @ the execution point */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(setStepEPBp) +{ + exePoint *ep = item; + V_ARG(int,bptype); + V_ARG(char *,mname); + + setBreakPoint (ep->addr, CODE, bptype, + stepBpCB, mname, ep->line); + return 1; +} + +/*-----------------------------------------------------------------*/ +/* setNextEPBp - sets a given type of bp @ the execution point */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(setNextEPBp) +{ + exePoint *ep = item; + V_ARG(int,bptype); + V_ARG(char *,mname); + + setBreakPoint (ep->addr, CODE, bptype, + nextBpCB, mname, ep->line); + return 1; +} + +/*-----------------------------------------------------------------*/ +/* lineAtAddr - for execution points returns the one with addr */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(lineAtAddr) +{ + exePoint *ep = item; + V_ARG(unsigned int,addr); + V_ARG(int *,line); + V_ARG(int *,block); + V_ARG(int *,level); + + /* address must be an exact match */ + if (ep->addr == addr) { + *line = ep->line; + if (block) + *block = ep->block ; + if (level) + *level = ep->level ; + return 1; + } + + return 0; + +} + +/*-----------------------------------------------------------------*/ +/* lineNearAddr - for execution points returns the one with addr */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(lineNearAddr) +{ + exePoint *ep = item; + V_ARG(unsigned int,addr); + V_ARG(int *,line); + V_ARG(int *,block); + V_ARG(int *,level); + + /* the line in which the address is */ + if (ep->addr <= addr) { + *line = ep->line; + if (block) + *block = ep->block ; + if (level) + *level = ep->level ; + return 1; + } + + return 0; + +} + +/*-----------------------------------------------------------------*/ +/* discoverContext - find out the current context of the bp */ +/*-----------------------------------------------------------------*/ +context *discoverContext (unsigned addr, function *func) +{ + module *mod = NULL; + int line = 0; + + /* find the function we are in */ + if (!func && !applyToSet(functions,funcInAddr,addr,&func)) { + if (!applyToSet(functions,funcWithName,"_main",&func) || + !applyToSet(modules,moduleLineWithAddr,addr,&mod,NULL)) + { + fprintf(stderr, "addr 0x%x in no module/function (runtime env?)\n",addr); + return NULL; + } + currCtxt->func = func; + currCtxt->addr = addr; + currCtxt->modName = mod->name; + currCtxt->cline = func->exitline; + } + else + { + currCtxt->func = func; + currCtxt->addr = func->laddr = addr; + currCtxt->modName = func->modName; + + /* find the c line number */ + if(applyToSet(func->cfpoints,lineAtAddr,addr, + &line,&currCtxt->block,&currCtxt->level)) + currCtxt->cline = func->lline = line; + else if(applyToSet(func->cfpoints,lineNearAddr,addr, + &line,&currCtxt->block,&currCtxt->level)) + currCtxt->cline = func->lline = line; + else + currCtxt->cline = -1; + } + /* find the asm line number */ + line = 0; + if (applyToSet(func->afpoints,lineAtAddr,addr, + &line,NULL,NULL)) + currCtxt->asmline = line; + else + currCtxt->asmline = -1; + + return currCtxt ; +} + + +/*-----------------------------------------------------------------*/ +/* simGo - send 'go' cmd to simulator and wait till a break occurs */ +/*-----------------------------------------------------------------*/ +void simGo (unsigned int gaddr) +{ + unsigned int addr ; + context *ctxt; + int rv; + stopCommandList(); + top: + if ( userinterrupt ) + { + userinterrupt = 0; + return; + } + if ( gaddr == 0 ) + { + function *func = NULL;; + if (applyToSet(functions,funcInAddr,gaddr,&func)) + STACK_PUSH(callStack,func); + } + addr = simGoTillBp (gaddr); + + /* got the pc for the break point now first + discover the program context i.e. module, function + linenumber of the source etc, etc etc */ + currentFrame = 0; + ctxt = discoverContext (addr, NULL); + + /* dispatch all the break point call back functions */ + rv = dispatchCB (addr,ctxt); + + /* the dispatch call back function will return + non-zero if an user break point has been hit + if not then we continue with the execution + of the program */ + if (!rv) + { + if ( gaddr == 0 ) + gaddr = -1; + if ( gaddr == -1 || doingSteps == 1 ) + goto top ; + } + +} + +/*-----------------------------------------------------------------*/ +/* preparePrint - common parse function for set variable, */ +/* output, print and display */ +/*-----------------------------------------------------------------*/ +static char *preparePrint(char *s, context *cctxt, int *fmt, symbol **sym) +{ + char *bp; + char save_ch ; + + *fmt = FMT_NON; + *sym = NULL; + + s = trim(s); + if (!*s) + return (char *)0; + + if ( *s == '/' ) + { + /* format of printout */ + switch ( *++s ) + { + case 'x': + *fmt = FMT_HEX ; + break; + case 'o': + *fmt = FMT_OCT ; + break; + default: + case 'd': + *fmt = FMT_DEZ ; + break; + case 't': + *fmt = FMT_BIN ; + break; + } + s++; + s = trim_left(s); + } + for ( bp = s; *bp && ( isalnum( *bp ) || *bp == '_' || *bp == '$'); bp++ ); + save_ch = *bp; + if ( *bp ) + *bp = '\0'; + + if ( *s ) + *sym = symLookup(s,cctxt); + *bp = save_ch; + + if ( ! *sym ) + fprintf(stdout,"No symbol \"%s\" in current context.\n", s); + return bp; +} + +static int printAsmLine( function *func, module *m, unsigned saddr, unsigned eaddr) +{ + int i,j,delta; + unsigned symaddr; + unsigned lastaddr = saddr+1; + char *symname; + + if ( func ) + { + symaddr = func->sym->addr; + symname = func->sym->name; + } + else + { + symaddr = saddr; + symname = "" ; + } + for (j=0,i=0; i < m->nasmLines; i++ ) + { + if ( saddr >= 0 && m->asmLines[i]->addr < saddr) + { + continue; + } + if ( eaddr >= 0 && m->asmLines[i]->addr > eaddr) + { + continue; + } + if ( func && + (m->asmLines[i]->addr < func->sym->addr || + m->asmLines[i]->addr > func->sym->eaddr )) + { + continue; + } + delta = m->asmLines[i]->addr - symaddr; + if ( delta >= 0 ) + { + j++; + lastaddr = m->asmLines[i]->addr; + printf("0x%08x <%s",lastaddr,symname); + if (delta > 0) printf("+%d",delta); + printf(">:\t%s",m->asmLines[i]->src); + } + } + return lastaddr; +} + +/*-----------------------------------------------------------------*/ +/* cmdDisasm - disassemble asm instruction */ +/*-----------------------------------------------------------------*/ +static int cmdDisasm (char *s, context *cctxt, int args) +{ + function *func = NULL; + long saddr = -1; + long eaddr = -1; + int found = 0; + module *modul; + /* white space skip */ + + if ( args > 0 ) + { + s = trim_left(s); + + if ( isdigit(*s)) + { + saddr = strtol(s,&s,0); + if ( args > 1 ) + { + s = trim_left(s); + + if ( isdigit(*s)) + eaddr = strtol(s,0,0); + } + else + eaddr = saddr+1; + } + } + + if ( eaddr == -1 ) + { + /* no start or only start so dump function */ + if ( saddr == -1 ) + { + func = cctxt->func; + } + else + { + applyToSet(functions,funcInAddr,saddr,&func); + } + if ( func ) + { + printf("Dump of assembler code for function %s:\n",func->sym->name); + printAsmLine(func,func->mod,-1,-1); + printf("End of assembler dump.\n"); + return 0; + } + else + { + if (applyToSet(modules,moduleLineWithAddr,saddr,&modul,NULL)) + { + eaddr = saddr + 5; + printf("Dump of assembler code:\n"); + printAsmLine(NULL,modul,saddr,eaddr); + printf("End of assembler dump.\n"); + return 0; + } + } + } + else + { + if ( args > 1 ) + printf("Dump of assembler code from 0x%08lx to 0x%08lx:\n",saddr,eaddr); + found = 0; + while ( saddr < eaddr ) + { + func = NULL; + if (applyToSet(functions,funcInAddr,saddr,&func)) + { + found = 1; + modul = func->mod; + } + else + { + if ( found ) + break; + if (!applyToSet(modules,moduleLineWithAddr,saddr,&modul,NULL)) + break; + } + saddr = printAsmLine(func,modul,saddr,eaddr) + 1; + } + if( saddr >= eaddr) + { + if ( args > 1 ) + printf("End of assembler dump.\n"); + return 0; + } + + } + fprintf(stderr,"No function contains specified address.\n"); + if( saddr >= 0 ) + { + char lbuf[64]; + sprintf(lbuf,"dis 0x%lx 0 %ld\n",saddr,( eaddr == -1 )?1L:eaddr-saddr); + sendSim(lbuf); + waitForSim(1000, NULL); + fputs(simResponse(),stdout); + } + return 0; +} +/*-----------------------------------------------------------------*/ +/* cmdDisasm1 - disassemble one asm instruction */ +/*-----------------------------------------------------------------*/ +int cmdDisasm1 (char *s, context *cctxt) +{ + return cmdDisasm( s, cctxt, 1); +} + +/*-----------------------------------------------------------------*/ +/* cmdDisasmF - disassemble asm instructions */ +/*-----------------------------------------------------------------*/ +int cmdDisasmF(char *s, context *cctxt) +{ + return cmdDisasm( s, cctxt, 2); +} + +static int commonSetUserBp(char *s, context *cctxt, char bpType) +{ + char *bp ; + function *func = NULL; + + /* user break point location specification can be of the following + forms + a) - break point at current location + b) lineno - number of the current module + c) filename:lineno - line number of the given file + e) filename:function- function X in file Y (useful for static functions) + f) function - function entry point + g) *addr - break point at address + */ + + if (!cctxt) { + fprintf(stdout,"No symbol table is loaded. Use the \"file\" command.\n"); + return 0; + } + /* trim left and right */ + s = trim(s); + + /* case a) nothing */ + /* if nothing given then current location : we know + the current execution location from the currentContext */ + if (! *s ) { + + /* if current context is known */ + if (cctxt->func) { + Dprintf(D_break, ("commonSetUserBp: a) cctxtaddr:%x \n",cctxt->addr)); + if (srcMode == SRC_CMODE) + /* set the break point */ + setBreakPoint ( cctxt->addr , CODE , bpType , userBpCB , + cctxt->func->mod->c_name, cctxt->cline); + else + setBreakPoint ( cctxt->addr , CODE , bpType , userBpCB , + cctxt->func->mod->asm_name, cctxt->asmline); + + } + else + fprintf(stderr,"No default breakpoint address now.\n"); + + goto ret ; + } + /* case g) *addr */ + if ( *s == '*' && isdigit(*(s+1))) + { + int line = 0; + long braddr = strtol(s+1,0,0); + if (!applyToSet(functions,funcInAddr,braddr,&func)) + { + module *modul; + if (!applyToSet(modules,moduleLineWithAddr,braddr,&modul,&line)) + { + fprintf(stderr,"Address 0x%08lx not exists in code.\n",braddr); + } + else + { + Dprintf(D_break, ("commonSetUserBp: g) addr:%lx \n",braddr)); + setBreakPoint ( braddr , CODE , bpType , userBpCB , + modul->c_name,line); + } + goto ret ; + } + else + { + int line = func->exitline; + if ( !applyToSet(func->cfpoints,lineAtAddr,braddr, + &line,NULL,NULL)) + applyToSet(func->cfpoints,lineNearAddr,braddr,&line,NULL,NULL); + setBreakPoint ( braddr , CODE , bpType , userBpCB , + func->mod->c_name,line); + } + goto ret ; + } + /* case b) lineno */ + /* check if line number */ + if ( !strchr(s,':') && isdigit(*s)) { + /* get the lineno */ + int line = atoi(s) -1; + Dprintf(D_break, ("commonSetUserBp: b) line:%d \n",line)); + if ( line < 0 ) + { + fprintf(stdout,"linenumber <= 0\n"); + goto ret; + } + /* if current context not present then we must get the module + which has main & set the break point @ line number provided + of that module : if current context known then set the bp + at the line number given for the current module + */ + if (cctxt->func) { + if (!cctxt->func->mod) { + if (!applyToSet(functions,funcWithName,"main")) + fprintf(stderr,"Function \"main\" not defined.\n"); + else + setBPatModLine(func->mod,line, bpType); + } else + setBPatModLine(cctxt->func->mod,line, bpType); + } else { + if (list_mod) { + setBPatModLine(list_mod,line, bpType); + } else { + fprintf(stdout,"Sdcdb fails to have module symbol context at %d\n", __LINE__); + } + } + + goto ret; + } + + if ((bp = strchr(s,':'))) { + + module *mod = NULL; + *bp = '\0'; + + if (srcMode == SRC_CMODE) { + if (!applyToSet(modules,moduleWithCName,s,&mod)) { + fprintf (stderr,"No source file named %s.\n",s); + goto ret; + } + } else { + if (!applyToSet(modules,moduleWithAsmName,s,&mod)) { + fprintf (stderr,"No source file named %s.\n",s); + goto ret; + } + } + + /* case c) filename:lineno */ + if (isdigit(*(bp +1))) { + Dprintf(D_break, ("commonSetUserBp: c) line:%d \n",atoi(bp+1))); + setBPatModLine (mod,atoi(bp+1)-1,bpType); + goto ret; + + } + /* case d) filename:function */ + if (!applyToSet(functions,funcWithNameModule,bp+1,s,&func)) + fprintf(stderr,"Function \"%s\" not defined.\n",bp+1); + else + Dprintf(D_break, ("commonSetUserBp: d) \n")); + setBPatModLine (mod, + (srcMode == SRC_CMODE ? + func->entryline : + func->aentryline),bpType); + + goto ret; + } + + /* case e) function */ + Dprintf(D_break, ("commonSetUserBp: e) \n")); + if (!applyToSet(functions,funcWithName,s,&func)) + fprintf(stderr,"Function \"%s\" not defined.\n",s); + else + setBPatModLine(func->mod, + (srcMode == SRC_CMODE ? + func->entryline : + func->aentryline),bpType); + + ret: + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdSetTmpUserBp - settempory break point at the user specified location */ +/*-----------------------------------------------------------------*/ +int cmdSetTmpUserBp (char *s, context *cctxt) +{ + return commonSetUserBp(s, cctxt, TMPUSER ); +} + +/*-----------------------------------------------------------------*/ +/* cmdSetUserBp - set break point at the user specified location */ +/*-----------------------------------------------------------------*/ +int cmdSetUserBp (char *s, context *cctxt) +{ + return commonSetUserBp(s, cctxt, USER ); +} + +/*-----------------------------------------------------------------*/ +/* cmdJump - set program counter */ +/*-----------------------------------------------------------------*/ +int cmdJump (char *s, context *cctxt) +{ + char *bp; + function *func = NULL; + if (STACK_EMPTY(callStack)) + { + fprintf(stdout,"The program is not running.\n"); + return 0; + } + + /* trim left and right */ + s = trim(s); + + if (! *s ) + { + fprintf(stdout,"No argument: need line or *addr.\n"); + return 0; + } + if ( *s == '*' && isdigit(*(s+1))) + { + unsigned int addr = atoi(s); + if (cctxt && cctxt->func && + cctxt->func->sym->addr <= addr && + cctxt->func->sym->eaddr >= addr) + { + simSetPC(addr); + return 0; + } + fprintf(stdout,"Warning addr 0x%x outside actual function.\n",addr); + simSetPC(addr); + return 0; + } + if (isdigit(*s)) + { + /* get the lineno */ + int line = atoi(s) -1; + if (!cctxt || !cctxt->func || !cctxt->func->mod) + { + fprintf(stderr,"Function not defined.\n"); + return 0; + } + if (line >= cctxt->func->entryline && + line <= cctxt->func->exitline ) + { + simSetPC(cctxt->func->mod->cLines[line]->addr); + return 0; + } + if (line >= cctxt->func->mod->ncLines ) + { + fprintf(stderr,"line not in module.\n"); + return 0; + } + fprintf(stdout,"Warning line %d outside actual function.\n",line+1); + simSetPC(cctxt->func->mod->cLines[line]->addr); + return 0; + } + if ((bp = strchr(s,':'))) + { + int line; + module *mod = NULL; + *bp++ = '\0'; + if (!applyToSet(modules,moduleWithCName,s,&mod)) + { + fprintf (stderr,"No source file named %s.\n",s); + return 0; + } + if (!isdigit(*bp)) + { + fprintf (stderr,"No line number.\n"); + return 0; + } + line = atoi(bp) -1; + if (line >= mod->ncLines ) + { + fprintf(stderr,"line not in module.\n"); + return 0; + } + if ( mod != cctxt->func->mod || + line < cctxt->func->entryline || + line > cctxt->func->exitline ) + { + fprintf(stdout,"Warning line %d outside actual function.\n", + line+1); + } + simSetPC(mod->cLines[line]->addr); + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdListAsm - list assembler source code */ +/*-----------------------------------------------------------------*/ +int cmdListAsm (char *s, context *cctxt) +{ + if ( cctxt && cctxt->func) + { + /* actual line */ + if ( cctxt->addr != INT_MAX ) + { + if (printAsmLine(cctxt->func,cctxt->func->mod, + (long)cctxt->addr,(long)cctxt->addr)) + return 0; + } + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdSetOption - set debugger options */ +/*-----------------------------------------------------------------*/ +int cmdSetOption (char *s, context *cctxt) +{ + s = trim_left(s); + if (strncmp(s,"srcmode",7) == 0 ) { + if (srcMode == SRC_CMODE) + srcMode = SRC_AMODE; + else + srcMode = SRC_CMODE; + fprintf(stderr,"source mode set to '%s'\n", + (srcMode == SRC_CMODE ? "C" : "asm")); + return 0; + } + + if (strncmp(s,"listsize ",9) == 0) + { + listlines = strtol(s+9,0,0); + if ( listlines < LISTLINES ) + listlines = LISTLINES; + return 0; + } + +#ifdef SDCDB_DEBUG + if (strncmp(s,"debug ",6) == 0) + { + sdcdbDebug = strtol(s+6,0,0); + return 0; + } +#endif + if (strncmp(s,"variable ",9) == 0) + { + symbol *sym ; + int fmt; + char *rs; + s += 9; + if ( !( rs = preparePrint(s, cctxt, &fmt, &sym ))) + return 0; + s = rs; + while (*s && *s != '=') s++; + *s++ = '\0'; + s = trim_left(s); + if (*s && sym) + { + printOrSetSymValue(sym,cctxt,0,0,0,rs,s,'\0'); + return 0; + } + else + fprintf(stdout,"No new value for \"%s\".\n",s); + return 0; + } + + + fprintf(stderr,"'set %s' command not yet implemented\n",s); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdContinue - continue till next break point */ +/*-----------------------------------------------------------------*/ +int cmdContinue (char *s, context *cctxt) +{ + if (STACK_EMPTY(callStack)) { + fprintf(stdout,"The program is not being run.\n"); + return 0; + } + + fprintf(stdout,"Continuing.\n"); + simGo(-1); + showfull = 1; + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdIgnore - set ignorecount for breakpoint */ +/*-----------------------------------------------------------------*/ +int cmdIgnore (char *s, context *cctxt) +{ + int bpnum, cnt ; + s = trim_left(s); + if (!*s ) + { + fprintf(stdout,"Argument required (breakpoint number).\n"); + return 0; + } + bpnum = strtol(s,&s,10); + s = trim_left(s); + if (!*s ) + { + fprintf(stdout,"Second argument (specified ignore-count) is missing."); + return 0; + } + cnt = strtol(s,0,10); + setUserbpIgnCount(bpnum,cnt); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdCondition - set condition for breakpoint */ +/*-----------------------------------------------------------------*/ +int cmdCondition (char *s, context *cctxt) +{ + int bpnum ; + s = trim_left(s); + if (!*s ) + { + fprintf(stdout,"Argument required (breakpoint number).\n"); + return 0; + } + bpnum = strtol(s,&s,10); + s = trim_left(s); + if (*s) + s = Safe_strdup(s); + else + s = NULL; + setUserbpCondition(bpnum,s); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdCommands - set commands for breakpoint */ +/*-----------------------------------------------------------------*/ +int cmdCommands (char *s, context *cctxt) +{ + int bpnum ; + char *cmds,*line; + s = trim_left(s); + + if (!*s ) + bpnum = getLastBreakptNumber(); + else + bpnum = strtol(s,0,10); + + cmds = NULL; + while ((line = getNextCmdLine())) + { + line = trim_left(line); + if (!strncmp(line,"end",3)) + break; + if (! cmds ) + { + cmds = Safe_strdup(line); + } + else + { + cmds = Safe_realloc( cmds, strlen(cmds) + 1 + strlen(line)); + strcat(cmds,line); + } + } + setUserbpCommand(bpnum,cmds); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdDelUserBp - delete user break point */ +/*-----------------------------------------------------------------*/ +int cmdDelUserBp (char *s, context *cctxt) +{ + int bpnum ; + s = trim_left(s); + + if (!*s ) { + if (userBpPresent) { + char buffer[10]; + fprintf (stdout,"Delete all breakpoints? (y or n) "); + fflush(stdout); + fgets(buffer,sizeof(buffer),stdin); + if (toupper(buffer[0]) == 'Y') + deleteUSERbp(-1); + } + return 0; + } + + /* determine the break point number */ + if (sscanf(s,"%d",&bpnum) == 1) + deleteUSERbp(bpnum); + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdStepi - single step exactly one instruction */ +/*-----------------------------------------------------------------*/ +int cmdStepi (char *s, context *cctxt) +{ + + if (0 /*STACK_EMPTY(callStack)*/) + fprintf(stdout,"The program is not being run.\n"); + else + { + doingSteps = 2; + simGo(2); + doingSteps = 0; + showfull = 1; + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdStep - single step thru C source file */ +/*-----------------------------------------------------------------*/ +int cmdStep (char *s, context *cctxt) +{ + function *func = NULL; + + if (STACK_EMPTY(callStack)) + fprintf(stdout,"The program is not being run.\n"); + else { + /* if we are @ the end of a function then set + break points at execution points of the + function in the call stack... */ + if (cctxt->addr == cctxt->func->sym->eaddr) { + if ((func = STACK_PEEK(callStack))) { + if (srcMode == SRC_CMODE) + applyToSet (func->cfpoints,setStepEPBp,STEP, + func->mod->c_name); + else + applyToSet (func->afpoints,setStepEPBp,STEP, + func->mod->asm_name); + } + } else { + /* set breakpoints at all function entry points + and all exepoints of this functions & for + all functions one up in the call stack */ + + /* all function entry points */ + applyToSet(functions,setStepBp); + + if (srcMode == SRC_CMODE) { + /* for all execution points in this function */ + applyToSet(cctxt->func->cfpoints,setStepEPBp,STEP, + cctxt->func->mod->c_name); + + /* set a break point @ the current function's + exit */ + setBreakPoint (cctxt->func->sym->eaddr, CODE, STEP , + stepBpCB, cctxt->func->mod->c_name, + cctxt->func->exitline); + + /* now break point @ callers execution points */ + if ((func = STACK_PPEEK(callStack))) { + applyToSet (func->cfpoints,setStepEPBp,STEP, + func->mod->c_name); + /* set bp @ callers exit point */ + setBreakPoint (func->sym->eaddr, CODE, STEP , + stepBpCB, func->mod->c_name, + func->exitline); + } + } else { + /* for all execution points in this function */ + applyToSet(cctxt->func->afpoints,setStepEPBp,STEP, + cctxt->func->mod->asm_name); + + /* set a break point @ the current function's + exit */ + setBreakPoint (cctxt->func->sym->eaddr, CODE, STEP , + stepBpCB, cctxt->func->mod->asm_name, + cctxt->func->aexitline); + + /* now break point @ callers execution points */ + if ((func = STACK_PPEEK(callStack))) { + + applyToSet (func->afpoints,setStepEPBp,STEP, + func->mod->asm_name); + + /* set bp @ callers exit point */ + setBreakPoint (func->sym->eaddr, CODE, STEP , + stepBpCB, func->mod->asm_name, + func->aexitline); + } + } + } + + doingSteps = 1; + simGo(2); + doingSteps = 0; + showfull = 1; + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdNexti - next instruction but proceed function call */ +/*-----------------------------------------------------------------*/ +int cmdNexti (char *s, context *cctxt) +{ + if (STACK_EMPTY(callStack)) + fprintf(stdout,"The program is not being run.\n"); + else + { + doingSteps = 2; + simGo(1); + doingSteps = 0; + showfull = 1; + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdNext - next executable C statement file */ +/*-----------------------------------------------------------------*/ +int cmdNext (char *s, context *cctxt) +{ + function *func = NULL; + /* next is almost the same as step except we don't + we don't set break point for all function entry + points */ + if (STACK_EMPTY(callStack)) + fprintf(stdout,"The program is not being run.\n"); + else { + /* if we are @ the end of a function then set + break points at execution points of the + function in the call stack... */ + if (cctxt->addr == cctxt->func->sym->eaddr) { + if ((func = STACK_PEEK(callStack))) { + if (srcMode == SRC_CMODE) + applyToSet (func->cfpoints,setStepEPBp,NEXT, + func->mod->c_name); + else + applyToSet (func->afpoints,setStepEPBp,NEXT, + func->mod->asm_name); + } + } else { + if (srcMode == SRC_CMODE) { + /* for all execution points in this function */ + applyToSet(cctxt->func->cfpoints,setNextEPBp,NEXT, + cctxt->func->mod->c_name); + /* set a break point @ the current function's + exit */ + setBreakPoint (cctxt->func->sym->eaddr, CODE, NEXT , + nextBpCB, cctxt->func->mod->c_name, + cctxt->func->exitline); + + /* now break point @ callers execution points */ + if ((func = STACK_PPEEK(callStack))) { + applyToSet (func->cfpoints,setNextEPBp,NEXT , + func->mod->c_name); + /* set bp @ callers exit point */ + setBreakPoint (func->sym->eaddr, CODE, NEXT , + stepBpCB, func->mod->c_name, + func->exitline); + } + } else { + /* for all execution points in this function */ + applyToSet(cctxt->func->afpoints,setNextEPBp,NEXT, + cctxt->func->mod->asm_name); + /* set a break point @ the current function's + exit */ + setBreakPoint (cctxt->func->sym->eaddr, CODE, NEXT , + nextBpCB, cctxt->func->mod->asm_name, + cctxt->func->aexitline); + + /* now break point @ callers execution points */ + if ((func = STACK_PPEEK(callStack))) { + applyToSet (func->cfpoints,setNextEPBp,NEXT , + func->mod->asm_name); + /* set bp @ callers exit point */ + setBreakPoint (func->sym->eaddr, CODE, NEXT , + stepBpCB, func->mod->asm_name, + func->aexitline); + } + } + } + doingSteps = 1; + simGo(1); + doingSteps = 0; + showfull = 1; + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdRun - run till next break point */ +/*-----------------------------------------------------------------*/ +int cmdRun (char *s, context *cctxt) +{ + char buff[10]; + if (STACK_EMPTY(callStack)) { + fprintf(stdout,"Starting program\n"); + if ( ! simactive ) + { + fprintf(stdout,"No executable file specified.\nUse the \"file\" command.\n"); + return 0; + } + resetHitCount(); + simGo(0); + } else { + + fprintf(stdout, + "The program being debugged has been started already.\n"); + fprintf(stdout,"Start it from the beginning? (y or n) "); + fflush(stdout); + + fgets(buff,sizeof(buff),stdin); + if (toupper(buff[0]) == 'Y') { + simReset(); + resetHitCount(); + simGo(0); + } + } + showfull = 1; + return 0; +} + +/*----------------------------------------------------------------- + cmdListSymbols - list symbols +|-----------------------------------------------------------------*/ +int cmdListSymbols (char *s, context *cctxt) +{ + int our_verbose = 0; + symbol *sy; + int i; + + if (strstr(s, "v1")) { + our_verbose = 1; + } else if (strstr(s, "v2")) { + our_verbose = 2; + } + + printf("[symbols]\n"); + sy = setFirstItem(symbols); + i = 0; + for (;;) { + if (sy == NULL) + break; + if (our_verbose <= 1) + printf("<%s>", sy->name); + + if (our_verbose > 1) { + printf(" %d) name:%s, size:%d, level:%d block:%d\n", i, + sy->name, sy->size, sy->level, sy->block); + printf(" isonstack:%d, isfunc:%d, offset:%d addr:%d\n", + sy->isonstack, sy->isfunc, sy->offset, sy->addr); + printf(" eaddr:%d, addr_type:%c, type:%p etype:%p\n", + sy->eaddr, sy->addr_type, sy->type, sy->etype); + printf(" scopetype:%c, sname:%s, rname:%s addrspace:%c\n", + sy->scopetype, sy->sname, sy->rname, sy->addrspace); + printf(" next:%p\n", sy->next); + } + ++i; + sy = setNextItem(symbols); + } + printf(" %d symbols\n", i); + return 0; +} + +/*----------------------------------------------------------------- + cmdListFunctions - list functions. +|-----------------------------------------------------------------*/ +int cmdListFunctions (char *s, context *cctxt) +{ + function *f; + int i; + int our_verbose = 0; + + if (strstr(s, "v1")) { + our_verbose = 1; + } else if (strstr(s, "v2")) { + our_verbose = 2; + } + + printf("[functions]\n"); + f = setFirstItem(functions); + i = 0; + while (f != NULL) { + if (our_verbose) { + printf(" %d) sym:%p, fname:%s, modName:%s, mod:%p\n", i, + f->sym, f->sym->name, f->modName, f->mod); + printf(" entryline:%d, aentryline:%d, exitline:%d, aexitline:%d\n", + f->entryline, f->aentryline, f->exitline, f->aexitline); + printf(" cfpoints:%p, afpoints:%p, laddr:%x, lline:%d\n", + f->cfpoints, f->afpoints, f->laddr, f->lline); + } + else { + printf("<%s>", f->sym->name); + } + ++i; + f = setNextItem(functions); + } + printf(" %d functions\n", i); + return 0; +} + +/*----------------------------------------------------------------- + cmdListModules - list modules. +|-----------------------------------------------------------------*/ +int cmdListModules (char *s, context *cctxt) +{ + module *m; + srcLine *cs, *as; + int i, mi; + int our_verbose = 0; + + if (strstr(s, "v1")) { + our_verbose = 1; + } else if (strstr(s, "v2")) { + our_verbose = 2; + } + + printf("[modules]\n"); + m = setFirstItem(modules); + mi = 0; + for (;;) { + if (m == NULL) + break; + + if (our_verbose >= 0) { + printf(" %d) cfullname:%s, afullname:%s, name:%s\n", ++mi, + m->cfullname, m->afullname, m->name); + printf(" c_name:%s, asm_name:%s, ncLines:%d, nasmLines:%d\n", + m->c_name, m->asm_name, m->ncLines, m->nasmLines); + printf(" cLines:%p, asmLines:%p\n", + m->cLines, m->asmLines); + } + if (our_verbose >= 2) { + if (m->ncLines) { + printf(" [cLines] "); + if ( our_verbose) + for (i=0; incLines; i++ ) { + cs = m->cLines[i]; + printf(" (%d) addr:%x, block:%d, level:%d, src:%s\n", + i, cs->addr, cs->block, cs->level, cs->src); + } + if (!our_verbose) + printf("%d records", i); + } + if (m->nasmLines) { + printf(" [asmLines] "); + if ( our_verbose) + for (i=0; inasmLines; i++ ) { + as = m->asmLines[i]; + printf(" (%d) addr:%x, block:%d, level:%d, src:%s\n", + i, as->addr, as->block, as->level, as->src); + } + if (!our_verbose) + printf("%d records", i); + } + printf("\n"); + } + + m = setNextItem(modules); + } + return 0; +} + +/*----------------------------------------------------------------- + infoSymbols - This is really just a tool to dump all these + huge program structures out into human readable form. +|-----------------------------------------------------------------*/ +static void infoSymbols(context *ctxt) +{ + int our_verbose = 0; + + printf("[context:%p] func:%p modName:%s addr:%x\n", + ctxt, ctxt->func, ctxt->modName, ctxt->addr); + + printf(" cline:%d asmline:%d block:%d level:%d\n", + ctxt->cline, ctxt->asmline, ctxt->block, ctxt->level); + + printf("[globals] currCtxt:%p, modules:%p, functions:%p symbols:%p\n", + currCtxt, modules, functions, symbols); + printf(" nStructs:%d, structs:%p, ssdirl:%s\n", + nStructs, structs, ssdirl); + + /**************** modules *******************/ + { + module *m; + srcLine *cs, *as; + int i, mi; + printf("[modules]\n"); + m = setFirstItem(modules); + mi = 0; + for (;;) { + if (m == NULL) + break; + printf(" %d) cfullname:%s, afullname:%s, name:%s\n", ++mi, + m->cfullname, m->afullname, m->name); + printf(" c_name:%s, asm_name:%s, ncLines:%d, nasmLines:%d\n", + m->c_name, m->asm_name, m->ncLines, m->nasmLines); + printf(" cLines:%p, asmLines:%p\n", + m->cLines, m->asmLines); + i = 0; + if (m->cLines) { + cs = m->cLines[i++]; + printf(" [cLines] "); + while (cs) { + if (our_verbose) + printf(" (%d) addr:%x, block:%d, level:%d, src:%s\n", + i, cs->addr, cs->block, cs->level, cs->src); + cs = m->cLines[i++]; + } + if (!our_verbose) + printf("%d records", i); + } + i = 0; + if (m->asmLines) { + as = m->asmLines[i++]; + printf(" [asmLines] "); + while (as) { + if (our_verbose) + printf(" (%d) addr:%x, block:%d, level:%d, src:%s\n", + i, as->addr, as->block, as->level, as->src); + as = m->asmLines[i++]; + } + if (!our_verbose) + printf("%d records", i); + } + printf("\n"); + + m = setNextItem(modules); + } + } + + /**************** functions *******************/ + { + function *f; + int i; + printf("[functions]\n"); + f = setFirstItem(functions); + i = 0; + for (;;) { + if (f == NULL) + break; + if (our_verbose) { + printf(" %d) sym:%p, modName:%s, mod:%p\n", i, + f->sym, f->modName, f->mod); + printf(" entryline:%d, aentryline:%d, exitline:%d, aexitline:%d\n", + f->entryline, f->aentryline, f->exitline, f->aexitline); + printf(" cfpoints:%p, afpoints:%p, laddr:%x, lline:%d\n", + f->cfpoints, f->afpoints, f->laddr, f->lline); + } + ++i; + f = setNextItem(functions); + } + if (!our_verbose) + printf(" %d functions\n", i); + } + + /**************** symbols *******************/ + { + symbol *s; + int i; + printf("[symbols]\n"); + s = setFirstItem(symbols); + i = 0; + for (;;) { + if (s == NULL) + break; + if (our_verbose) { + printf(" %d) name:%s, size:%d, level:%d block:%d\n", i, + s->name, s->size, s->level, s->block); + printf(" isonstack:%d, isfunc:%d, offset:%d addr:%d\n", + s->isonstack, s->isfunc, s->offset, s->addr); + printf(" eaddr:%d, addr_type:%c, type:%p etype:%p\n", + s->eaddr, s->addr_type, s->type, s->etype); + printf(" scopetype:%c, sname:%s, rname:%s addrspace:%c\n", + s->scopetype, s->sname, s->rname, s->addrspace); + printf(" next:%p\n", s->next); + } + ++i; + s = setNextItem(symbols); + } + if (!our_verbose) + printf(" %d symbols\n", i); + } + +} + +/*-----------------------------------------------------------------*/ +/* infoRegisters - print register information */ +/*-----------------------------------------------------------------*/ +static void infoRegisters( int all, context *ctxt) +{ + static int regaddrs[] = {0x81,0x82,0x83,0xb8,0xd0,0xe0,0xf0,0}; + unsigned long val; + int i,j,*r; + + i = simGetValue (0xd0,'I',1); + fprintf(stdout,"IP : 0x%04X RegisterBank %d:\nR0-7:",ctxt->addr,(i>>3)&3); + for ( j = 0; j < 8 ; j++ ) + { + val = simGetValue (j,'R',1); + fprintf(stdout," 0x%02lX",val); + } + fprintf(stdout,"\n"); + val = simGetValue (0xe0,'I',1); + fprintf(stdout,"ACC : 0x%02lX %lu %c\n",val,val,(isprint(val) ? (char)val : '.')); + val = simGetValue (0xf0,'I',1); + fprintf(stdout,"B : 0x%02lX %lu %c\n",val,val,(isprint(val) ? (char)val : '.')); + val = simGetValue (0x82,'I',2); + fprintf(stdout,"DPTR: 0x%04lX %lu\n",val,val); + val = simGetValue (0x81,'I',1); + fprintf(stdout,"SP : 0x%02lX (0x%04lX)\n",val,simGetValue (val-1,'B',2)); + fprintf(stdout,"PSW : 0x%02X | CY : %c | AC : %c | OV : %c | P : %c\n", + i,(i&0x80)?'1':'0',(i&0x40)?'1':'0',(i&4)?'1':'0',(i&1)?'1':'0'); + if ( all ) + { + fprintf(stdout,"Special Function Registers:\n"); + r = regaddrs; + for ( i = 0x80 ; i < 0x100 ; i++ ) + { + symbol *sym = NULL; + if ( *r && *r == i ) + { + /* skip normal registers */ + r++ ; + continue; + } + if (applyToSetFTrue(sfrsymbols,symWithAddr,i,'I',&sym)) + { + val = simGetValue (sym->addr,sym->addrspace,sym->size); + fprintf(stdout,"%s : 0x%02lx",sym->name,val); + if ( !(i & 0x07 )) + { + for ( j = 0 ; j < 8 ; j++ ) + { + sym = NULL; + if (applyToSetFTrue(sfrsymbols,symWithAddr,i+j,'J',&sym)) + { + //val = simGetValue (sym->addr,sym->addrspace,sym->size); + fprintf(stdout," %s=%c",sym->name,(val&1)? '1':'0'); + } + val >>= 1; + } + } + fprintf(stdout,"\n"); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* infoStack - print call stack information */ +/*-----------------------------------------------------------------*/ +static void infoStack(context *ctxt) +{ + function *func ; + int i = 0 ; + + STACK_STARTWALK(callStack) ; + while ((func = STACK_WALK(callStack))) { + Dprintf(D_break, ("break: infoStack: %s %p (%p)\n",func->sym->name, w_callStack,p_callStack)); + + fprintf(stdout,"#%d 0x%08x in %s () at %s:%d\n",i++, + func->laddr,func->sym->name, + func->mod->c_name,func->lline+1); + } + if ( !i ) + fprintf(stdout,"no stack.\n"); +} + +/*-----------------------------------------------------------------*/ +/* cmdWhere - where command */ +/*-----------------------------------------------------------------*/ +int cmdWhere(char *s, context *cctxt) +{ + infoStack(cctxt); + return 0; +} + + +static int infomode = 0; +/*-----------------------------------------------------------------*/ +/* cmdInfo - info command */ +/*-----------------------------------------------------------------*/ +int cmdInfo (char *s, context *cctxt) +{ + /* trim left and_right*/ + s = trim(s); + + /* list all break points */ + if (strncmp(s,"break",5) == 0) { + listUSERbp(); + return 0; + } + + /* info frame same as frame */ + if (strncmp(s,"frame",5) == 0) { + cmdFrame (s+5,cctxt); + return 0; + } + + if (strncmp(s,"line",4) == 0) { + infomode=1; + cmdListSrc (s+4,cctxt); + return 0; + } + if (strncmp(s,"source",6) == 0) + { + module *m; + if ( s[6] == 's' ) + { + int k = 0; + fprintf(stdout,"Source files for which symbols have been read in:\n\n"); + for (m = setFirstItem(modules); m ; m = setNextItem(modules)) + { + fprintf(stdout,"%s%s, %s",k ? ", ":"",m->cfullname, m->afullname); + k = 1; + } + fprintf(stdout,"\n"); + } + else + { + if (!cctxt || !cctxt->func || !cctxt->func->mod) + { + fprintf(stdout,"No source file loaded\n"); + return 0; + } + m = cctxt->func->mod; + fprintf(stdout,"Current source file is %s\n",m->c_name); + fprintf(stdout,"Located in %s\n",m->cfullname); + fprintf(stdout,"Contains %d lines.\nSource language is c.\n", + m->ncLines); + } + return 0; + } + if (strcmp(s,"functions") == 0) + { + function *f; + module *m = NULL; + fprintf(stdout,"All defined functions:\n"); + for ( f = setFirstItem(functions); f ; f = setNextItem(functions)) + { + if ( f->mod != m ) + { + m = f->mod; + fprintf(stdout,"\nFile %s\n", m->c_name); + } + fprintf(stdout,"%s();\n",f->sym->name); + } + return 0; + } + /* info stack display call stack */ + if (strcmp(s,"stack") == 0) { + infoStack(cctxt); + showfull = 1; + return 0; + } + + /* info stack display call stack */ + if (strcmp(s,"registers") == 0) { + infoRegisters(0,cctxt); + return 0; + } + + /* info stack display call stack */ + if (strcmp(s,"all-registers") == 0) + { + infoRegisters(1,cctxt); + return 0; + } + + /* info stack display call stack */ + if (strcmp(s,"symbols") == 0) { + /* dump out symbols we have read in */ + fprintf(stdout,"Dumping symbols...\n"); + infoSymbols(cctxt); + return 0; + } + + if (strcmp(s,"variables") == 0) { + /* dump out symbols we have read in */ + fprintf(stdout,"Dumping symbols...\n"); + infoSymbols(cctxt); + return 0; + } + + fprintf(stdout,"Undefined info command: \"%s\". Try \"help\n",s); + return 0; + +} + +/*-----------------------------------------------------------------*/ +/* cmdQuit - quit debugging */ +/*-----------------------------------------------------------------*/ +int cmdQuit (char *s, context *cctxt) +{ + if (simactive) + closeSimulator(); + return 1; +} + +/*-----------------------------------------------------------------*/ +/* cmdListSrc - list src */ +/*-----------------------------------------------------------------*/ +int cmdListSrc (char *s, context *cctxt) +{ + static int currline = 0; + int i =0 ; + int pline = 0; + int llines = listlines; + function *func = NULL; + + + s = trim_left(s); + + /* if the user has spcified line numer then the line number + can be of the following formats + LINE - just line number + FILE:LINE - filename line number + FILE:LINE,LASTLINE + last line + FUNCTION - list a function + FILE:FUNCTION - function in file */ + + if (*s) { + /* case a) LINE */ + if (isdigit(*s)) { + if (!cctxt || !cctxt->func || !cctxt->func->mod) { + if (!list_mod) { + fprintf(stdout,"Sdcdb fails to have a proper context at %d.\n", __LINE__); + return 0; + } + } + else + list_mod = cctxt->func->mod; + pline = strtol(s,&s,10) - 1; + if (s && (s = strchr(s,','))) + { + /* LINE,LASTLINE */ + llines = strtol(s+1,0,10); + if ( llines > 0 ) + llines -= pline+1; + else + llines = listlines; + } + } + else { + char *bp; + + /* if ':' present then FILE:LINE || FILE:FUNCTION */ + if ((bp = strchr(s,':'))) { + *bp = '\0'; + bp ++; + if (isdigit(*bp)) { + /* FILE:LINE */ + list_mod=NULL; /* bug fix 2-09-02, moduleWithCName expects mod to be null */ + if (srcMode == SRC_CMODE) { + if (!applyToSet(modules,moduleWithCName,s,&list_mod)) { + fprintf (stderr,"No c source file named %s.\n",s); + return 0; + } + } else { + if (!applyToSet(modules,moduleWithAsmName,s,&list_mod)) { + fprintf (stderr,"No source file named %s.\n",s); + return 0; + } + } + pline = strtol(bp,&bp,10) - 1; + if (bp && (bp = strchr(bp,','))) + { + /* FILE:LINE,LASTLINE */ + llines = strtol(bp+1,0,10); + if ( llines > 0 ) + llines -= pline+1; + else + llines = listlines; + } + } else { + /* FILE:FUCTION */ + if (!applyToSet(functions,funcWithNameModule,bp,s,&func)) { + fprintf(stdout,"Function \"%s\" not defined.\n",bp); + return 0; + } + list_mod = func->mod; + if (srcMode == SRC_CMODE) { + pline = func->entryline; + llines = func->exitline - func->entryline + 1; + } else { + pline = func->aentryline; + llines = func->aexitline - func->aentryline + 1; + } + } + } + else { + /* FUNCTION */ + if (*s == '\'') + { + /* 'FUNCTION' */ + s++ ; + if ((bp = strrchr(s,'\''))) + { + *bp = '\0'; + } + + } + if (!applyToSet(functions,funcWithName,s,&func)) { + fprintf(stderr,"Function \"%s\" not defined.\n",s); + return 0; + } + else { + list_mod = func->mod; + if (srcMode == SRC_CMODE) { + pline = func->entryline; + llines = func->exitline - func->entryline + 1; + } else { + pline = func->aentryline; + llines = func->aexitline - func->aentryline + 1; + } + } + } + } + } else { + /* if no line specified & we had listed + before then continue from that listing */ + if (currline) + pline = currline ; + else { + if (!cctxt || !cctxt->func || !cctxt->func->mod) { + fprintf(stdout,"Missing context at %d. Try list filename:lineno\n", __LINE__); + return 0; + } + list_mod = cctxt->func->mod; + if (srcMode == SRC_CMODE) + pline = cctxt->cline; + else + pline = cctxt->asmline; + } + } + + if (!list_mod) { + fprintf(stdout,"Sdcdb fails to have a valid module context at %d.\n", __LINE__); + return 0; + } + + if ( pline < 0 ) + return 0; + if ( infomode ) + { + unsigned firstaddr , lastaddr ; + if ( pline >= list_mod->ncLines ) + pline = cctxt->cline; + firstaddr = lastaddr = list_mod->cLines[pline]->addr; + if (!func && cctxt && cctxt->func ) + func = cctxt->func; + fprintf(stdout,"Line %d of \"%s\" starts at address 0x%08x <%s+%d>", + pline+1, + list_mod->c_name, lastaddr, + func ? func->sym->name : "?", + func ? lastaddr -func->sym->addr : 0); + llines = pline +1; + for ( ; pline < list_mod->ncLines; pline++ ) + { + if ( list_mod->cLines[pline]->addr > lastaddr ) + { + lastaddr = list_mod->cLines[pline]->addr -1; + break; + } + } + fprintf(stdout," and ends at 0x%08x <%s+%d>.\n", + lastaddr, + func ? func->sym->name : "?", + func ? lastaddr -func->sym->addr : 0); + infomode=0; + if ( func ) + fprintf(stdout,"\032\032%s:%d:1:beg:0x%08x\n", + func->mod->cfullname, + llines,firstaddr); + else + showfull=1; + return 0; + } + for ( i = 0 ; i < llines ; i++ ) { + if (srcMode == SRC_CMODE) { + if ( (pline + i) >= list_mod->ncLines ) + break; + fprintf(stdout,"%d\t%s",pline + i, + list_mod->cLines[pline +i]->src); + } else { + if ( (pline + i) >= list_mod->nasmLines ) + break; + fprintf(stdout,"%d\t%s",pline + i, + list_mod->asmLines[pline +i]->src); + } + } + currline = pline + i ; + return 0; +} + +static unsigned long getValBasic(symbol *sym, link *type, char *val) +{ + char *s; + union + { + float f; + unsigned long val; + long sval; + struct { + unsigned short lo; + unsigned short hi; + } i; + unsigned char b[4]; + }v; + + if (IS_FLOAT(type)) + v.f = strtod(val,NULL); + else + if (IS_PTR(type)) + v.val = strtol(val,NULL,0); + else + { + if (IS_INTEGRAL(type)) + { + link *etype; + if ( type->next ) + etype = type->next; + else + etype = type; + if (IS_CHAR(etype)) + { + if (( s = strchr(val,'\''))) + { + if ( s[1] == '\\' ) + v.b[0] = strtol(s+2,NULL,8); + else + v.b[0] = s[1]; + } + else + { + v.b[0] = strtol(val,NULL,0); + } + } + else + if (IS_INT(etype)) + if (IS_LONG(etype)) + v.val = strtol(val,NULL,0); + else + v.i.lo = strtol(val,NULL,0); + else + v.val = strtol(val,NULL,0); + } + else + v.val = strtol(val,NULL,0); + } + return v.val; +} + +/*-----------------------------------------------------------------*/ +/* printFmtInteger - print value in bin,oct,dez or hex */ +/*-----------------------------------------------------------------*/ +static void printFmtInteger(char *deffmt,int fmt, long val, + int sign, int size) +{ + static char digits[] = + { + '0' , '1' , '2' , '3' , '4' , '5' , + '6' , '7' , '8' , '9' , 'a' , 'b' , + 'c' , 'd' , 'e' , 'f' , 'g' , 'h' + }; + static int radixOfFormat[] = { 0 , 2, 8 ,10, 16 }; + static int olenOfSize[] = { 0 , 3, 6 , 8, 11 }; + char buf[40]; + char negative = 0; + int charPos = 38; + int radix; + + if ( fmt == FMT_NON || fmt == FMT_DEZ ) + { + fprintf(stdout,deffmt,val); + return; + } + radix = radixOfFormat[fmt]; + + /* + if ( sign && val < 0 ) + negative = 1; + */ + + if (!negative) + val = -val; + + buf[39] = '\0'; + while (val <= -radix) + { + buf[charPos--] = digits[-(val % radix)]; + val = val / radix; + } + buf[charPos] = digits[-val]; + + switch ( fmt ) + { + case FMT_OCT: + radix = olenOfSize[size]; + break; + case FMT_HEX: + radix = size << 1; + break; + case FMT_BIN: + radix = size << 3; + break; + } + + while (charPos > 39 - radix ) + { + buf[--charPos] = '0'; + } + switch ( fmt ) + { + case FMT_OCT: + if ( buf[charPos] != '0' ) + buf[--charPos] = '0'; + break; + case FMT_HEX: + buf[--charPos] = 'x'; + buf[--charPos] = '0'; + break; + } + if (negative) { + buf[--charPos] = '-'; + } + fputs(&buf[charPos],stdout); +} + +/*-----------------------------------------------------------------*/ +/* printValBasic - print value of basic types */ +/*-----------------------------------------------------------------*/ +static void printValBasic(symbol *sym, link *type, + char mem, unsigned addr,int size, int fmt) +{ + union { + float f; + unsigned long val; + long sval; + struct { + unsigned short lo; + unsigned short hi; + } i; + unsigned char b[4]; + }v; + + v.val = simGetValue(addr,mem,size); + /* if this a floating point number then */ + if (IS_FLOAT(type)) + fprintf(stdout,"%f",v.f); + else + if (IS_PTR(type)) + fprintf(stdout,"0x%*lx",size<<1,v.val); + else + if (IS_INTEGRAL(type)) + { + link *etype; + if ( type->next ) + etype = type->next; + else + etype = type; + if (IS_CHAR(etype)) + { + if ( isprint(v.val)) + printFmtInteger((SPEC_USIGN(etype)?"0x%02x":"'%c'"), + fmt,(long)v.val,0,size); + else + printFmtInteger((SPEC_USIGN(etype)?"0x%02x":"'\\%o'"), + fmt,(long)v.val,0,size); + } + else + { + if (IS_INT(etype)) + if (IS_LONG(etype)) + if (SPEC_USIGN(etype)) + printFmtInteger("%u",fmt,(long)v.val,0,size); + else + printFmtInteger("%d",fmt,(long)v.sval,1,size); + else + if (SPEC_USIGN(etype)) + printFmtInteger("%u",fmt,(long)v.i.lo,0,size); + else + printFmtInteger("%d",fmt,(long)v.i.lo,1,size); + else + { + if (IS_BITVAR(etype)) + fprintf(stdout,"%c",(v.val?'1':'0')); + else + fprintf(stdout,"0x%0*lx",size<<1,v.val); + } + } + } else + fprintf(stdout,"0x%0*lx",size<<1,v.val); +} + +/*-----------------------------------------------------------------*/ +/* printValFunc - prints function values */ +/*-----------------------------------------------------------------*/ +static void printValFunc (symbol *sym, int fmt) +{ + fprintf(stdout,"print function not yet implemented"); +} + +/*-----------------------------------------------------------------*/ +/* printArrayValue - will print the values of array elements */ +/*-----------------------------------------------------------------*/ +static void printArrayValue (symbol *sym, link *type, + char space, unsigned int addr, int fmt) +{ + link *elem_type = type->next; + int i; + + fprintf(stdout,"{"); + for (i = 0 ; i < DCL_ELEM(type) ; i++) { + if (IS_AGGREGATE(elem_type)) { + printValAggregates(sym,elem_type,space,addr,fmt); + } else { + printValBasic(sym,elem_type,space,addr,getSize(elem_type),fmt); + } + addr += getSize(elem_type); + if (i != DCL_ELEM(type) -1) + fprintf(stdout,","); + } + + fprintf(stdout,"}"); +} + +/*-----------------------------------------------------------------*/ +/* printStructValue - prints structures elements */ +/*-----------------------------------------------------------------*/ +static void printStructValue (symbol *sym, link *type, + char space, unsigned int addr, int fmt) +{ + symbol *fields = SPEC_STRUCT(type)->fields; + int first = 1; + fprintf(stdout," { "); + while (fields) { + fprintf(stdout,"%s%s = ",(first ? "": ", "),fields->name); + first = 0; + if (IS_AGGREGATE(fields->type)) { + printValAggregates(fields,fields->type,space, addr, fmt); + } else { + printValBasic(fields,fields->type,space,addr,getSize(fields->type), fmt); + } + addr += getSize(fields->type); + fields = fields->next; + } + fprintf(stdout,"}"); +} + +/*-----------------------------------------------------------------*/ +/* printValAggregates - print value of aggregates */ +/*-----------------------------------------------------------------*/ +static void printValAggregates (symbol *sym, link *type, + char space,unsigned int addr, int fmt) +{ + + if (IS_ARRAY(type)) { + printArrayValue(sym, type, space, addr, fmt); + return ; + } + + if (IS_STRUCT(type)) { + printStructValue(sym, type, space, addr, fmt); + return; + } +} + +/*-----------------------------------------------------------------*/ +/* printOrSetSymValue - print or set value of a symbol */ +/*-----------------------------------------------------------------*/ +static int printOrSetSymValue (symbol *sym, context *cctxt, + int flg, int dnum, int fmt, char *rs, + char *val, char cmp ) +{ + static char fmtChar[] = " todx "; + static int stack = 1; + symbol *fields; + link *type; + unsigned int addr; + int size, n; + char *s, *s2; + char save_ch, save_ch2; + + /* if it is on stack then compute address & fall thru */ + if (sym->isonstack) + { + symbol *bp = symLookup("bp",cctxt); + if (!bp) + { + fprintf(stdout,"cannot determine stack frame\n"); + return 1; + } + + sym->addr = simGetValue(bp->addr,bp->addrspace,bp->size) + + sym->offset ; + } + + /* get the value from the simulator and + print it */ + switch (flg) + { + case 0: + default: + break; + case 1: + fprintf(stdout,"$%d = ",stack++); + break; + case 2: + fprintf(stdout,"%d: ", dnum); + if ( fmt != FMT_NON ) + fprintf(stdout,"/%c ",fmtChar[fmt]); + fprintf(stdout,"%s%s = ",sym->name,rs); + break; + } + + addr = sym->addr; + type = sym->type; + size = sym->size; + + while ( *rs ) + { + if ( *rs == '[' && IS_ARRAY(type)) + { + s = rs+1; + while ( *rs && *rs != ']' ) rs++ ; + save_ch = *rs; + *rs = '\0' ; + if ( ! isdigit(*s )) + { + /* index seems a variable */ + for ( s2 = s; *s2 && ( isalnum( *s2 ) || *s2 == '_'); s2++ ); + save_ch2 = *s2; + if ( *s2 ) + *s2 = '\0'; + fields = symLookup(s,cctxt); + *s2 = save_ch2; + if ( ! fields ) + { + fprintf(stdout,"Unknown variable \"%s\" for index.\n", s); + return 1; + } + /* arrays & structures first */ + if (! IS_INTEGRAL(fields->type)) + { + fprintf(stdout,"Wrong type of variable \"%s\" for index \n", s); + return 1; + } + n = simGetValue(fields->addr,fields->addrspace,getSize(fields->type)); + } + else + { + n = strtol(s,0,0); + } + if ( n < 0 || n >= DCL_ELEM(type)) + { + fprintf(stdout,"Wrong index %d.\n", n); + return 1; + } + type = type->next; + size = getSize(type); + addr += size * n; + *rs++ = save_ch; + } + else if ( *rs == '.' && IS_STRUCT(type)) + { + s = rs+1; + /* search structure element */ + for ( rs = s; *rs && ( isalnum( *rs ) || *rs == '_'); rs++ ); + save_ch = *rs; + if ( *rs ) + *rs = '\0'; + for (fields = SPEC_STRUCT(type)->fields; fields; fields = fields->next) + { + if (!(strcmp(s,fields->name))) + break; + } + *rs = save_ch; + if ( ! fields ) + { + fprintf(stdout,"Unknown field \"%s\" of structure\n", s); + return 1; + } + type = fields->type; + size = getSize(type); + addr += fields->offset; + } + else + break; + } + + /* arrays & structures first */ + if (IS_AGGREGATE(type)) + { + if ( val ) + { + fprintf(stdout,"Cannot set/compare aggregate variable\n"); + return 1; + } + else + printValAggregates(sym,type,sym->addrspace,addr,fmt); + } + else + /* functions */ + if (IS_FUNC(type)) + { + if ( !val ) + printValFunc(sym,fmt); + else + return 1; + } + else + { + if ( val ) + { + unsigned long newval; + newval = getValBasic(sym,type,val); + + if ( cmp ) + { + unsigned long lval; + lval = simGetValue(addr,sym->addrspace,size); + switch ( cmp ) + { + case '<' : return ( lval < newval ? 1:0 ); break; + case '>' : return ( lval > newval ? 1:0 ); break; + case 'l' : return ( lval <= newval ? 1:0 ); break; + case 'g' : return ( lval >= newval ? 1:0 ); break; + case '=' : return ( lval == newval ? 1:0 ); break; + case '!' : return ( lval != newval ? 1:0 ); break; + } + } + else + { + if ( sym->addrspace == 'I' && addr == 0xb8 ) + { + /* Symbol with address of IP */ + if ( cctxt ) cctxt->addr = newval; + simSetPC(cctxt->addr); + } + else + simSetValue(addr,sym->addrspace,size,newval); + return 1; + } + } + else + printValBasic(sym,type,sym->addrspace,addr,size,fmt); + } + if ( flg > 0 ) fprintf(stdout,"\n"); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* printStructInfo - print out structure information */ +/*-----------------------------------------------------------------*/ +static void printStructInfo (structdef *sdef) +{ + symbol *field = sdef->fields ; + int i = 0 ; + + while (field) { + i += field->offset; + field = field->next; + } + + fprintf(stdout,"%s %s {\n",(i ? "struct" : "union" ), sdef->tag); + field = sdef->fields; + while (field) { + printTypeInfo (field->type); + fprintf(stdout," %s ;\n",field->name); + field = field->next ; + } + + fprintf(stdout,"}\n"); + +} + +/*-----------------------------------------------------------------*/ +/* printTypeInfo - print out the type information */ +/*-----------------------------------------------------------------*/ +static void printTypeInfo(link *p) +{ + if (!p) + return ; + + if (IS_DECL(p)) { + switch (DCL_TYPE(p)) { + case FUNCTION: + printTypeInfo (p->next); + fprintf(stdout,"()"); + break; + case ARRAY: + printTypeInfo (p->next); + fprintf(stdout,"[%d]",DCL_ELEM(p)); + break; + + case IPOINTER: + case PPOINTER: + case POINTER: + printTypeInfo (p->next); + fprintf(stdout,"(_near *)"); + break; + + case FPOINTER: + printTypeInfo (p->next); + fprintf(stdout,"(_xdata *)"); + break; + + case CPOINTER: + printTypeInfo( p->next); + fprintf(stdout,"(_code *)"); + break; + + case GPOINTER: + printTypeInfo( p->next); + fprintf(stdout,"(_generic *)"); + break; + } + } else { + switch (SPEC_NOUN(p)) { /* depending on the specifier type */ + case V_INT: + (IS_LONG(p) ? fputs("long ",stdout) : + ( IS_SHORT(p) ? fputs("short ",stdout) : + fputs("int ",stdout))) ; + break; + case V_FLOAT: + fputs("float ",stdout); + break; + + case V_CHAR: + fputs ("char ",stdout); + break; + + case V_VOID: + fputs("void ",stdout); + break; + + case V_STRUCT: + printStructInfo (SPEC_STRUCT(p)); + break; + + case V_SBIT: + fputs("sbit ",stdout); + break; + + case V_BIT: + fprintf(stdout,": %d" ,SPEC_BLEN(p)); + break; + } + } +} + +/*-----------------------------------------------------------------*/ +/* conditionIsTrue - compare variable with constant value */ +/*-----------------------------------------------------------------*/ +int conditionIsTrue( char *s, context *cctxt) +{ + symbol *sym = NULL; + int fmt; + char *rs, *dup, cmp_char; + dup = s = Safe_strdup(s); + if ( !( rs = preparePrint(s, cctxt, &fmt, &sym )) || !sym) + fmt = 1; + else if (!( s = strpbrk(rs,"<>=!"))) + fmt = 1; + else + { + cmp_char = *s; + *s++ = '\0'; + if ( *s == '=' ) + { + /* if <= or >= an other char is used + * == or != not checked in switch + */ + switch( cmp_char ) + { + case '>': cmp_char = 'g' ; break; + case '<': cmp_char = 'l' ; break; + } + s++ ; + } + s = trim_left(s); + fmt = printOrSetSymValue(sym,cctxt,0,0,0,rs,s,cmp_char); + } + Safe_free(dup); + return fmt; +} + +/*-----------------------------------------------------------------*/ +/* cmdPrint - print value of variable */ +/*-----------------------------------------------------------------*/ +int cmdPrint (char *s, context *cctxt) +{ + symbol *sym ; + int fmt; + char *rs; + if ( !( rs = preparePrint(s, cctxt, &fmt, &sym ))) + return 0; + + if ( sym ) + { + printOrSetSymValue(sym,cctxt,1,0,fmt,rs,NULL,'\0'); + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdOutput - print value of variable without number and newline */ +/*-----------------------------------------------------------------*/ +int cmdOutput (char *s, context *cctxt) +{ + symbol *sym ; + int fmt; + char *rs; + if ( !( rs = preparePrint(s, cctxt, &fmt, &sym ))) + return 0; + + if ( sym ) + { + printOrSetSymValue(sym,cctxt,0,0,fmt,rs,NULL,'\0'); + } + return 0; +} + +/** find display entry with this number */ + +DEFSETFUNC(dsymWithNumber) +{ + dsymbol *dsym = item; + V_ARG(int , dnum); + V_ARG(dsymbol **,dsymp); + + if ( dsym->dnum == dnum ) + { + *dsymp = dsym; + return 1; + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* displayAll - display all valid variables */ +/*-----------------------------------------------------------------*/ +void displayAll(context *cctxt) +{ + dsymbol *dsym; + symbol *sym; + if ( !dispsymbols ) + return; + for (dsym = setFirstItem(dispsymbols); + dsym ; + dsym = setNextItem(dispsymbols)) + { + if ( (sym = symLookup(dsym->name,cctxt))) + printOrSetSymValue(sym,cctxt,2,dsym->dnum,dsym->fmt, + dsym->rs,NULL,'\0'); + } +} + +/*-----------------------------------------------------------------*/ +/* cmdDisplay - display value of variable */ +/*-----------------------------------------------------------------*/ +int cmdDisplay (char *s, context *cctxt) +{ + static int dnum = 1; + symbol *sym ; + int fmt; + char *rs; + if ( !( rs = preparePrint(s, cctxt, &fmt, &sym ))) + { + displayAll(cctxt); + return 0; + } + + if ( sym ) + { + dsymbol *dsym = (dsymbol *)Safe_calloc(1,sizeof(dsymbol)); + dsym->dnum = dnum++ ; + dsym->name = sym->name; + dsym->fmt = fmt; + dsym->rs = gc_strdup(rs); + addSetHead(&dispsymbols,dsym); + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdUnDisplay - undisplay value of variable */ +/*-----------------------------------------------------------------*/ +int cmdUnDisplay (char *s, context *cctxt) +{ + dsymbol *dsym; + int dnum; + + s = trim_left(s); + if (!*s) + { + for (dsym = setFirstItem(dispsymbols); + dsym; + dsym = setNextItem(dispsymbols)) + { + Safe_free(dsym->rs); + Safe_free(dsym); + } + deleteSet(&dispsymbols); + return 0; + } + while ( s && *s ) + { + dnum = strtol(s,&s,10); + if (applyToSetFTrue(dispsymbols,dsymWithNumber,dnum,&dsym)) + { + deleteSetItem(&dispsymbols,dsym); + Safe_free(dsym->rs); + Safe_free(dsym); + } + else + { + fprintf(stdout,"Arguments must be display numbers.\n"); + } + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdPrintType - print type of a variable */ +/*-----------------------------------------------------------------*/ +int cmdPrintType (char *s, context *cctxt) +{ + symbol *sym ; + + /* trim left and right */ + s = trim(s); + if (!*s) return 0; + + if ((sym = symLookup(s,cctxt))) { + printTypeInfo(sym->type); + fprintf(stdout,"\n"); + } else { + fprintf(stdout, + "No symbol \"%s\" in current context.\n", + s); + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdClrUserBp - clear user break point */ +/*-----------------------------------------------------------------*/ +int cmdClrUserBp (char *s, context *cctxt) +{ + char *bp ; + function *func = NULL; + + /* clear break point location specification can be of the following + forms + a) - break point at current location + b) lineno - number of the current module + c) filename:lineno - line number of the given file + e) filename:function- function X in file Y (useful for static functions) + f) function - function entry point + */ + + if (!cctxt) { + fprintf(stdout,"No symbol table is loaded. Use the \"file\" command.\n"); + return 0; + } + + /* trim left and right */ + s = trim(s); + + /* case a) nothing */ + /* if nothing given then current location : we know + the current execution location from the currentContext */ + if (! *s ) { + + /* if current context is known */ + if (cctxt->func) + /* clear the break point @ current location */ + clearUSERbp (cctxt->addr); + else + fprintf(stderr,"No default breakpoint address now.\n"); + + goto ret ; + } + + /* case b) lineno */ + /* check if line number */ + if (isdigit(*s)) { + /* get the lineno */ + int line = atoi(s); + + /* if current context not present then we must get the module + which has main & set the break point @ line number provided + of that module : if current context known then set the bp + at the line number given for the current module + */ + if (cctxt->func) { + if (!cctxt->func->mod) { + if (!applyToSet(functions,funcWithName,"main")) + fprintf(stderr,"Function \"main\" not defined.\n"); + else + clearBPatModLine(func->mod,line); + } else + clearBPatModLine(cctxt->func->mod,line); + } + + goto ret; + } + + if ((bp = strchr(s,':'))) { + + module *mod = NULL; + *bp = '\0'; + + if (!applyToSet(modules,moduleWithCName,s,&mod)) { + fprintf (stderr,"No source file named %s.\n",s); + goto ret; + } + + /* case c) filename:lineno */ + if (isdigit(*(bp +1))) { + + clearBPatModLine (mod,atoi(bp+1)); + goto ret; + + } + /* case d) filename:function */ + if (!applyToSet(functions,funcWithNameModule,bp+1,s,&func)) + fprintf(stderr,"Function \"%s\" not defined.\n",bp+1); + else + clearBPatModLine (mod,func->entryline); + + goto ret; + } + + /* case e) function */ + if (!applyToSet(functions,funcWithName,s,&func)) + fprintf(stderr,"Function \"%s\" not defined.\n",s); + else + clearBPatModLine(func->mod,func->entryline); + + ret: + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdSimulator - send command to simulator */ +/*-----------------------------------------------------------------*/ +int cmdSimulator (char *s, context *cctxt) +{ + char tmpstr[82]; + + if (strlen(s) > 80) { + printf("error 3A\n"); + exit(1); + } + strcpy(tmpstr, s); + strcat(tmpstr, "\n"); + sendSim(tmpstr); + waitForSim(200,NULL); + fprintf(stdout,"%s",simResponse()); + return 0; +} + +void setMainContext() +{ + function *func = NULL; + currentFrame = 0; + if (!applyToSet(functions,funcWithName,"_main",&func) && + !applyToSet(functions,funcWithName,"main",&func)) + return; + + discoverContext (func->sym->addr, func); +} + +function *needExtraMainFunction() +{ + function *func = NULL; + if (!applyToSet(functions,funcWithName,"_main",&func)) + { + if (applyToSet(functions,funcWithName,"main",&func)) + { + return func; + } + } + return NULL; +} + +static void printFrame() +{ + int i; + function *func = NULL; + function *lastfunc = NULL; + + if ( currentFrame < 0 ) + { + currentFrame = 0; + fprintf(stdout,"Bottom (i.e., innermost) frame selected; you cannot go down.\n"); + return; + } + STACK_STARTWALK(callStack) ; + for ( i = 0; i <= currentFrame ; i++ ) + { + func = STACK_WALK(callStack); + if ( !func ) + { + currentFrame = i-1; + fprintf(stdout,"Initial frame selected; you cannot go up.\n"); + return; + } + } + fprintf(stdout,"#%d 0x%08x in %s () at %s:%d\n", + currentFrame,func->laddr,func->sym->name,func->mod->c_name,func->lline+1); + fprintf(stdout,"\032\032%s:%d:1:beg:0x%08x\n", + func->mod->cfullname,func->lline+1,func->laddr); + + discoverContext (func->laddr, func); +} + + +/*-----------------------------------------------------------------*/ +/* cmdUp - Up command */ +/*-----------------------------------------------------------------*/ +int cmdUp(char *s, context *cctxt) +{ + s = trim_left(s); + if ( *s ) + currentFrame += strtol(s,0,10); + else + currentFrame++ ; + + printFrame(); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdDown - down command */ +/*-----------------------------------------------------------------*/ +int cmdDown(char *s, context *cctxt) +{ + s = trim_left(s); + if ( *s ) + currentFrame -= strtol(s,0,10); + else + currentFrame-- ; + + printFrame(); + return 0; +} +/*-----------------------------------------------------------------*/ +/* cmdFrame - Frame command */ +/*-----------------------------------------------------------------*/ +int cmdFrame (char *s, context *cctxt) +{ + function *func = NULL; + int framenr = 0; + + s = trim_left(s); + if ( *s ) + currentFrame = strtol(s,0,10); + printFrame(); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdFinish - exec till end of current function */ +/*-----------------------------------------------------------------*/ +int cmdFinish (char *s, context *ctxt) +{ + if (STACK_EMPTY(callStack)) { + fprintf(stdout,"The program is not running.\n"); + return 0; + } + + if (srcMode == SRC_CMODE) { + setBreakPoint (ctxt->func->sym->eaddr, CODE, STEP, + stepBpCB, ctxt->func->mod->c_name, + ctxt->func->exitline); + } else { + setBreakPoint (ctxt->func->sym->eaddr, CODE, STEP, + stepBpCB, ctxt->func->mod->asm_name, + ctxt->func->aexitline); + } + + simGo(-1); + showfull = 1; + return 0; + +} + + +/*-----------------------------------------------------------------*/ +/* cmdShow - show command */ +/*-----------------------------------------------------------------*/ +int cmdShow (char *s, context *cctxt) +{ + /* skip white space */ + s = trim_left(s); + + if (strcmp(s,"copying") == 0) { + fputs(copying,stdout); + return 0; + } + + if (strcmp(s,"warranty") == 0) { + fputs(warranty,stdout); + return 0; + } + + return 0; +} + diff --git a/debugger/mcs51/cmd.h b/debugger/mcs51/cmd.h new file mode 100644 index 0000000..41a46eb --- /dev/null +++ b/debugger/mcs51/cmd.h @@ -0,0 +1,73 @@ +/*------------------------------------------------------------------------- + cmd.h - header file for debugger command execution + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCDB_CMD_H +#define SDCDB_CMD_H +/* forward definition for command functions */ +extern int cmdSetTmpUserBp (char *, context *); +extern int cmdSetUserBp (char *, context *); +extern int cmdClrUserBp (char *, context *); +extern int cmdHelp (char *, context *); +extern int cmdJump (char *, context *); +extern int cmdListSrc (char *, context *); +extern int cmdListAsm (char *, context *); +extern int cmdSetOption (char *, context *); +extern int cmdCondition (char *, context *); +extern int cmdIgnore (char *, context *); +extern int cmdContinue (char *, context *); +extern int cmdDelUserBp (char *, context *); +extern int cmdStep (char *, context *); +extern int cmdRun (char *, context *); +extern int cmdNext (char *, context *); +extern int cmdPrint (char *, context *); +extern int cmdFrame (char *, context *); +extern int cmdSimulator (char *, context *); +extern int cmdQuit (char *, context *); +extern int cmdPrintType (char *, context *); +extern int cmdFile (char *, context *); +extern int cmdInfo (char *, context *); +extern int cmdShow (char *, context *); +extern int cmdFinish (char *, context *); +extern int cmdCommands (char *, context *); +extern int cmdStepi (char *, context *); +extern int cmdNexti (char *, context *); +extern int cmdUp (char *, context *); +extern int cmdDown (char *, context *); +extern int cmdWhere (char *, context *); +extern int cmdOutput (char *, context *); +extern int cmdDisasm1 (char *, context *); +extern int cmdDisasmF (char *, context *); +extern int cmdDisplay (char *, context *); +extern int cmdUnDisplay (char *, context *); +extern int cmdSource (char *, context *); +extern void displayAll (context *); + +extern int cmdListModules (char *s, context *cctxt); +extern int cmdListFunctions (char *s, context *cctxt); +extern int cmdListSymbols (char *s, context *cctxt); + +extern void setMainContext( void); +extern function *needExtraMainFunction(void); +int conditionIsTrue( char *s, context *cctxt); + +#endif diff --git a/debugger/mcs51/conf.mk b/debugger/mcs51/conf.mk new file mode 100644 index 0000000..ac65f24 --- /dev/null +++ b/debugger/mcs51/conf.mk @@ -0,0 +1,10 @@ +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_builddir) && $(SHELL) ./config.status + +# End of conf.mk diff --git a/debugger/mcs51/config.h.in b/debugger/mcs51/config.h.in new file mode 100644 index 0000000..1cd5b6f --- /dev/null +++ b/debugger/mcs51/config.h.in @@ -0,0 +1,20 @@ +/* + */ + +#ifndef CONFIG_H +#define CONFIG_H + + +#undef DIR_SEPARATOR_STRING + +#undef DATADIR + +#undef LIB_DIR_SUFFIX + +#undef HAVE_SYS_SOCKET_H + +#undef HAVE_LIBREADLINE + +#endif + +/* End of config.h */ diff --git a/debugger/mcs51/configure b/debugger/mcs51/configure new file mode 100644 index 0000000..e1e2418 --- /dev/null +++ b/debugger/mcs51/configure @@ -0,0 +1,6866 @@ +#! /bin/sh +# Guess values for system-dependent variables and create Makefiles. +# Generated by GNU Autoconf 2.60. +# +# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, +# 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +# This configure script is free software; the Free Software Foundation +# gives unlimited permission to copy, distribute and modify it. +## --------------------- ## +## M4sh Initialization. ## +## --------------------- ## + +# Be Bourne compatible +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac +fi +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh + + +# PATH needs CR +# Avoid depending upon Character Ranges. +as_cr_letters='abcdefghijklmnopqrstuvwxyz' +as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +as_cr_Letters=$as_cr_letters$as_cr_LETTERS +as_cr_digits='0123456789' +as_cr_alnum=$as_cr_Letters$as_cr_digits + +# The user is always right. +if test "${PATH_SEPARATOR+set}" != set; then + echo "#! /bin/sh" >conf$$.sh + echo "exit 0" >>conf$$.sh + chmod +x conf$$.sh + if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then + PATH_SEPARATOR=';' + else + PATH_SEPARATOR=: + fi + rm -f conf$$.sh +fi + +# Support unset when possible. +if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then + as_unset=unset +else + as_unset=false +fi + + +# IFS +# We need space, tab and new line, in precisely that order. Quoting is +# there to prevent editors from complaining about space-tab. +# (If _AS_PATH_WALK were called with IFS unset, it would disable word +# splitting by setting IFS to empty value.) +as_nl=' +' +IFS=" "" $as_nl" + +# Find who we are. Look in the path if we contain no directory separator. +case $0 in + *[\\/]* ) as_myself=$0 ;; + *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break +done +IFS=$as_save_IFS + + ;; +esac +# We did not find ourselves, most probably we were run as `sh COMMAND' +# in which case we are not to be found in the path. +if test "x$as_myself" = x; then + as_myself=$0 +fi +if test ! -f "$as_myself"; then + echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2 + { (exit 1); exit 1; } +fi + +# Work around bugs in pre-3.0 UWIN ksh. +for as_var in ENV MAIL MAILPATH +do ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var +done +PS1='$ ' +PS2='> ' +PS4='+ ' + +# NLS nuisances. +for as_var in \ + LANG LANGUAGE LC_ADDRESS LC_ALL LC_COLLATE LC_CTYPE LC_IDENTIFICATION \ + LC_MEASUREMENT LC_MESSAGES LC_MONETARY LC_NAME LC_NUMERIC LC_PAPER \ + LC_TELEPHONE LC_TIME +do + if (set +x; test -z "`(eval $as_var=C; export $as_var) 2>&1`"); then + eval $as_var=C; export $as_var + else + ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var + fi +done + +# Required to use basename. +if expr a : '\(a\)' >/dev/null 2>&1 && + test "X`expr 00001 : '.*\(...\)'`" = X001; then + as_expr=expr +else + as_expr=false +fi + +if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then + as_basename=basename +else + as_basename=false +fi + + +# Name of the executable. +as_me=`$as_basename -- "$0" || +$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \ + X"$0" : 'X\(//\)$' \| \ + X"$0" : 'X\(/\)' \| . 2>/dev/null || +echo X/"$0" | + sed '/^.*\/\([^/][^/]*\)\/*$/{ + s//\1/ + q + } + /^X\/\(\/\/\)$/{ + s//\1/ + q + } + /^X\/\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + +# CDPATH. +$as_unset CDPATH + + +if test "x$CONFIG_SHELL" = x; then + if (eval ":") 2>/dev/null; then + as_have_required=yes +else + as_have_required=no +fi + + if test $as_have_required = yes && (eval ": +(as_func_return () { + (exit \$1) +} +as_func_success () { + as_func_return 0 +} +as_func_failure () { + as_func_return 1 +} +as_func_ret_success () { + return 0 +} +as_func_ret_failure () { + return 1 +} + +exitcode=0 +if as_func_success; then + : +else + exitcode=1 + echo as_func_success failed. +fi + +if as_func_failure; then + exitcode=1 + echo as_func_failure succeeded. +fi + +if as_func_ret_success; then + : +else + exitcode=1 + echo as_func_ret_success failed. +fi + +if as_func_ret_failure; then + exitcode=1 + echo as_func_ret_failure succeeded. +fi + +if ( set x; as_func_ret_success y && test x = \"\$1\" ); then + : +else + exitcode=1 + echo positional parameters were not saved. +fi + +test \$exitcode = 0) || { (exit 1); exit 1; } + +( + as_lineno_1=\$LINENO + as_lineno_2=\$LINENO + test \"x\$as_lineno_1\" != \"x\$as_lineno_2\" && + test \"x\`expr \$as_lineno_1 + 1\`\" = \"x\$as_lineno_2\") || { (exit 1); exit 1; } +") 2> /dev/null; then + : +else + as_candidate_shells= + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in /usr/bin/posix$PATH_SEPARATOR/bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + case $as_dir in + /*) + for as_base in sh bash ksh sh5; do + as_candidate_shells="$as_candidate_shells $as_dir/$as_base" + done;; + esac +done +IFS=$as_save_IFS + + + for as_shell in $as_candidate_shells $SHELL; do + # Try only shells that exist, to save several forks. + if { test -f "$as_shell" || test -f "$as_shell.exe"; } && + { ("$as_shell") 2> /dev/null <<\_ASEOF +# Be Bourne compatible +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac +fi +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh + +: +_ASEOF +}; then + CONFIG_SHELL=$as_shell + as_have_required=yes + if { "$as_shell" 2> /dev/null <<\_ASEOF +# Be Bourne compatible +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac +fi +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh + +: +(as_func_return () { + (exit $1) +} +as_func_success () { + as_func_return 0 +} +as_func_failure () { + as_func_return 1 +} +as_func_ret_success () { + return 0 +} +as_func_ret_failure () { + return 1 +} + +exitcode=0 +if as_func_success; then + : +else + exitcode=1 + echo as_func_success failed. +fi + +if as_func_failure; then + exitcode=1 + echo as_func_failure succeeded. +fi + +if as_func_ret_success; then + : +else + exitcode=1 + echo as_func_ret_success failed. +fi + +if as_func_ret_failure; then + exitcode=1 + echo as_func_ret_failure succeeded. +fi + +if ( set x; as_func_ret_success y && test x = "$1" ); then + : +else + exitcode=1 + echo positional parameters were not saved. +fi + +test $exitcode = 0) || { (exit 1); exit 1; } + +( + as_lineno_1=$LINENO + as_lineno_2=$LINENO + test "x$as_lineno_1" != "x$as_lineno_2" && + test "x`expr $as_lineno_1 + 1`" = "x$as_lineno_2") || { (exit 1); exit 1; } + +_ASEOF +}; then + break +fi + +fi + + done + + if test "x$CONFIG_SHELL" != x; then + for as_var in BASH_ENV ENV + do ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var + done + export CONFIG_SHELL + exec "$CONFIG_SHELL" "$as_myself" ${1+"$@"} +fi + + + if test $as_have_required = no; then + echo This script requires a shell more modern than all the + echo shells that I found on your system. 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Use of quotes ensures accuracy. + *) ac_configure_args="$ac_configure_args '$ac_arg'" ;; + esac + fi +done +if $ac_cache_corrupted; then + { echo "$as_me:$LINENO: error: changes in the environment can compromise the build" >&5 +echo "$as_me: error: changes in the environment can compromise the build" >&2;} + { { echo "$as_me:$LINENO: error: run \`make distclean' and/or \`rm $cache_file' and start over" >&5 +echo "$as_me: error: run \`make distclean' and/or \`rm $cache_file' and start over" >&2;} + { (exit 1); exit 1; }; } +fi + + + + + + + + + + + + + + + + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + + +ac_config_headers="$ac_config_headers config.h" + + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}gcc", so it can be a program name with args. +set dummy ${ac_tool_prefix}gcc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="${ac_tool_prefix}gcc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_CC"; then + ac_ct_CC=$CC + # Extract the first word of "gcc", so it can be a program name with args. +set dummy gcc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_CC="gcc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 +echo "${ECHO_T}$ac_ct_CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +else + CC="$ac_cv_prog_CC" +fi + +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}cc", so it can be a program name with args. +set dummy ${ac_tool_prefix}cc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="${ac_tool_prefix}cc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + fi +fi +if test -z "$CC"; then + # Extract the first word of "cc", so it can be a program name with args. +set dummy cc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else + ac_prog_rejected=no +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then + ac_prog_rejected=yes + continue + fi + ac_cv_prog_CC="cc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +if test $ac_prog_rejected = yes; then + # We found a bogon in the path, so make sure we never use it. + set dummy $ac_cv_prog_CC + shift + if test $# != 0; then + # We chose a different compiler from the bogus one. + # However, it has the same basename, so the bogon will be chosen + # first if we set CC to just the basename; use the full file name. + shift + ac_cv_prog_CC="$as_dir/$ac_word${1+' '}$@" + fi +fi +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + for ac_prog in cl.exe + do + # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. +set dummy $ac_tool_prefix$ac_prog; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="$ac_tool_prefix$ac_prog" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + test -n "$CC" && break + done +fi +if test -z "$CC"; then + ac_ct_CC=$CC + for ac_prog in cl.exe +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_CC="$ac_prog" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 +echo "${ECHO_T}$ac_ct_CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + test -n "$ac_ct_CC" && break +done + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +fi + +fi + + +test -z "$CC" && { { echo "$as_me:$LINENO: error: no acceptable C compiler found in \$PATH +See \`config.log' for more details." >&5 +echo "$as_me: error: no acceptable C compiler found in \$PATH +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } + +# Provide some information about the compiler. +echo "$as_me:$LINENO: checking for C compiler version" >&5 +ac_compiler=`set X $ac_compile; echo $2` +{ (ac_try="$ac_compiler --version >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compiler --version >&5") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } +{ (ac_try="$ac_compiler -v >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compiler -v >&5") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } +{ (ac_try="$ac_compiler -V >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compiler -V >&5") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } + +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +ac_clean_files_save=$ac_clean_files +ac_clean_files="$ac_clean_files a.out a.exe b.out" +# Try to create an executable without -o first, disregard a.out. +# It will help us diagnose broken compilers, and finding out an intuition +# of exeext. +{ echo "$as_me:$LINENO: checking for C compiler default output file name" >&5 +echo $ECHO_N "checking for C compiler default output file name... $ECHO_C" >&6; } +ac_link_default=`echo "$ac_link" | sed 's/ -o *conftest[^ ]*//'` +# +# List of possible output files, starting from the most likely. +# The algorithm is not robust to junk in `.', hence go to wildcards (a.*) +# only as a last resort. b.out is created by i960 compilers. +ac_files='a_out.exe a.exe conftest.exe a.out conftest a.* conftest.* b.out' +# +# The IRIX 6 linker writes into existing files which may not be +# executable, retaining their permissions. Remove them first so a +# subsequent execution test works. +ac_rmfiles= +for ac_file in $ac_files +do + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.o | *.obj ) ;; + * ) ac_rmfiles="$ac_rmfiles $ac_file";; + esac +done +rm -f $ac_rmfiles + +if { (ac_try="$ac_link_default" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link_default") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; then + # Autoconf-2.13 could set the ac_cv_exeext variable to `no'. +# So ignore a value of `no', otherwise this would lead to `EXEEXT = no' +# in a Makefile. We should not override ac_cv_exeext if it was cached, +# so that the user can short-circuit this test for compilers unknown to +# Autoconf. +for ac_file in $ac_files +do + test -f "$ac_file" || continue + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.o | *.obj ) + ;; + [ab].out ) + # We found the default executable, but exeext='' is most + # certainly right. + break;; + *.* ) + if test "${ac_cv_exeext+set}" = set && test "$ac_cv_exeext" != no; + then :; else + ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'` + fi + # We set ac_cv_exeext here because the later test for it is not + # safe: cross compilers may not add the suffix if given an `-o' + # argument, so we may need to know it at that point already. + # Even if this section looks crufty: it has the advantage of + # actually working. + break;; + * ) + break;; + esac +done +test "$ac_cv_exeext" = no && ac_cv_exeext= + +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +{ { echo "$as_me:$LINENO: error: C compiler cannot create executables +See \`config.log' for more details." >&5 +echo "$as_me: error: C compiler cannot create executables +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } +fi + +ac_exeext=$ac_cv_exeext +{ echo "$as_me:$LINENO: result: $ac_file" >&5 +echo "${ECHO_T}$ac_file" >&6; } + +# Check that the compiler produces executables we can run. If not, either +# the compiler is broken, or we cross compile. +{ echo "$as_me:$LINENO: checking whether the C compiler works" >&5 +echo $ECHO_N "checking whether the C compiler works... $ECHO_C" >&6; } +# FIXME: These cross compiler hacks should be removed for Autoconf 3.0 +# If not cross compiling, check that we can run a simple program. +if test "$cross_compiling" != yes; then + if { ac_try='./$ac_file' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + cross_compiling=no + else + if test "$cross_compiling" = maybe; then + cross_compiling=yes + else + { { echo "$as_me:$LINENO: error: cannot run C compiled programs. +If you meant to cross compile, use \`--host'. +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot run C compiled programs. +If you meant to cross compile, use \`--host'. +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } + fi + fi +fi +{ echo "$as_me:$LINENO: result: yes" >&5 +echo "${ECHO_T}yes" >&6; } + +rm -f a.out a.exe conftest$ac_cv_exeext b.out +ac_clean_files=$ac_clean_files_save +# Check that the compiler produces executables we can run. If not, either +# the compiler is broken, or we cross compile. +{ echo "$as_me:$LINENO: checking whether we are cross compiling" >&5 +echo $ECHO_N "checking whether we are cross compiling... $ECHO_C" >&6; } +{ echo "$as_me:$LINENO: result: $cross_compiling" >&5 +echo "${ECHO_T}$cross_compiling" >&6; } + +{ echo "$as_me:$LINENO: checking for suffix of executables" >&5 +echo $ECHO_N "checking for suffix of executables... $ECHO_C" >&6; } +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; then + # If both `conftest.exe' and `conftest' are `present' (well, observable) +# catch `conftest.exe'. For instance with Cygwin, `ls conftest' will +# work properly (i.e., refer to `conftest.exe'), while it won't with +# `rm'. +for ac_file in conftest.exe conftest conftest.*; do + test -f "$ac_file" || continue + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.o | *.obj ) ;; + *.* ) ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'` + break;; + * ) break;; + esac +done +else + { { echo "$as_me:$LINENO: error: cannot compute suffix of executables: cannot compile and link +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute suffix of executables: cannot compile and link +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } +fi + +rm -f conftest$ac_cv_exeext +{ echo "$as_me:$LINENO: result: $ac_cv_exeext" >&5 +echo "${ECHO_T}$ac_cv_exeext" >&6; } + +rm -f conftest.$ac_ext +EXEEXT=$ac_cv_exeext +ac_exeext=$EXEEXT +{ echo "$as_me:$LINENO: checking for suffix of object files" >&5 +echo $ECHO_N "checking for suffix of object files... $ECHO_C" >&6; } +if test "${ac_cv_objext+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.o conftest.obj +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; then + for ac_file in conftest.o conftest.obj conftest.*; do + test -f "$ac_file" || continue; + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf ) ;; + *) ac_cv_objext=`expr "$ac_file" : '.*\.\(.*\)'` + break;; + esac +done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +{ { echo "$as_me:$LINENO: error: cannot compute suffix of object files: cannot compile +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute suffix of object files: cannot compile +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } +fi + +rm -f conftest.$ac_cv_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_objext" >&5 +echo "${ECHO_T}$ac_cv_objext" >&6; } +OBJEXT=$ac_cv_objext +ac_objext=$OBJEXT +{ echo "$as_me:$LINENO: checking whether we are using the GNU C compiler" >&5 +echo $ECHO_N "checking whether we are using the GNU C compiler... $ECHO_C" >&6; } +if test "${ac_cv_c_compiler_gnu+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ +#ifndef __GNUC__ + choke me +#endif + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_compiler_gnu=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_compiler_gnu=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +ac_cv_c_compiler_gnu=$ac_compiler_gnu + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_c_compiler_gnu" >&5 +echo "${ECHO_T}$ac_cv_c_compiler_gnu" >&6; } +GCC=`test $ac_compiler_gnu = yes && echo yes` +ac_test_CFLAGS=${CFLAGS+set} +ac_save_CFLAGS=$CFLAGS +{ echo "$as_me:$LINENO: checking whether $CC accepts -g" >&5 +echo $ECHO_N "checking whether $CC accepts -g... $ECHO_C" >&6; } +if test "${ac_cv_prog_cc_g+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_save_c_werror_flag=$ac_c_werror_flag + ac_c_werror_flag=yes + ac_cv_prog_cc_g=no + CFLAGS="-g" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_prog_cc_g=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + CFLAGS="" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_c_werror_flag=$ac_save_c_werror_flag + CFLAGS="-g" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_prog_cc_g=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + ac_c_werror_flag=$ac_save_c_werror_flag +fi +{ echo "$as_me:$LINENO: result: $ac_cv_prog_cc_g" >&5 +echo "${ECHO_T}$ac_cv_prog_cc_g" >&6; } +if test "$ac_test_CFLAGS" = set; then + CFLAGS=$ac_save_CFLAGS +elif test $ac_cv_prog_cc_g = yes; then + if test "$GCC" = yes; then + CFLAGS="-g -O2" + else + CFLAGS="-g" + fi +else + if test "$GCC" = yes; then + CFLAGS="-O2" + else + CFLAGS= + fi +fi +{ echo "$as_me:$LINENO: checking for $CC option to accept ISO C89" >&5 +echo $ECHO_N "checking for $CC option to accept ISO C89... $ECHO_C" >&6; } +if test "${ac_cv_prog_cc_c89+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_cv_prog_cc_c89=no +ac_save_CC=$CC +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#include +#include +/* Most of the following tests are stolen from RCS 5.7's src/conf.sh. */ +struct buf { int x; }; +FILE * (*rcsopen) (struct buf *, struct stat *, int); +static char *e (p, i) + char **p; + int i; +{ + return p[i]; +} +static char *f (char * (*g) (char **, int), char **p, ...) +{ + char *s; + va_list v; + va_start (v,p); + s = g (p, va_arg (v,int)); + va_end (v); + return s; +} + +/* OSF 4.0 Compaq cc is some sort of almost-ANSI by default. It has + function prototypes and stuff, but not '\xHH' hex character constants. + These don't provoke an error unfortunately, instead are silently treated + as 'x'. The following induces an error, until -std is added to get + proper ANSI mode. Curiously '\x00'!='x' always comes out true, for an + array size at least. It's necessary to write '\x00'==0 to get something + that's true only with -std. */ +int osf4_cc_array ['\x00' == 0 ? 1 : -1]; + +/* IBM C 6 for AIX is almost-ANSI by default, but it replaces macro parameters + inside strings and character constants. */ +#define FOO(x) 'x' +int xlc6_cc_array[FOO(a) == 'x' ? 1 : -1]; + +int test (int i, double x); +struct s1 {int (*f) (int a);}; +struct s2 {int (*f) (double a);}; +int pairnames (int, char **, FILE *(*)(struct buf *, struct stat *, int), int, int); +int argc; +char **argv; +int +main () +{ +return f (e, argv, 0) != argv[0] || f (e, argv, 1) != argv[1]; + ; + return 0; +} +_ACEOF +for ac_arg in '' -qlanglvl=extc89 -qlanglvl=ansi -std \ + -Ae "-Aa -D_HPUX_SOURCE" "-Xc -D__EXTENSIONS__" +do + CC="$ac_save_CC $ac_arg" + rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_prog_cc_c89=$ac_arg +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext + test "x$ac_cv_prog_cc_c89" != "xno" && break +done +rm -f conftest.$ac_ext +CC=$ac_save_CC + +fi +# AC_CACHE_VAL +case "x$ac_cv_prog_cc_c89" in + x) + { echo "$as_me:$LINENO: result: none needed" >&5 +echo "${ECHO_T}none needed" >&6; } ;; + xno) + { echo "$as_me:$LINENO: result: unsupported" >&5 +echo "${ECHO_T}unsupported" >&6; } ;; + *) + CC="$CC $ac_cv_prog_cc_c89" + { echo "$as_me:$LINENO: result: $ac_cv_prog_cc_c89" >&5 +echo "${ECHO_T}$ac_cv_prog_cc_c89" >&6; } ;; +esac + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu +{ echo "$as_me:$LINENO: checking how to run the C preprocessor" >&5 +echo $ECHO_N "checking how to run the C preprocessor... $ECHO_C" >&6; } +# On Suns, sometimes $CPP names a directory. +if test -n "$CPP" && test -d "$CPP"; then + CPP= +fi +if test -z "$CPP"; then + if test "${ac_cv_prog_CPP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + # Double quotes because CPP needs to be expanded + for CPP in "$CC -E" "$CC -E -traditional-cpp" "/lib/cpp" + do + ac_preproc_ok=false +for ac_c_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Broken: fails on valid input. +continue +fi + +rm -f conftest.err conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + # Broken: success on invalid input. +continue +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Passes both tests. +ac_preproc_ok=: +break +fi + +rm -f conftest.err conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.err conftest.$ac_ext +if $ac_preproc_ok; then + break +fi + + done + ac_cv_prog_CPP=$CPP + +fi + CPP=$ac_cv_prog_CPP +else + ac_cv_prog_CPP=$CPP +fi +{ echo "$as_me:$LINENO: result: $CPP" >&5 +echo "${ECHO_T}$CPP" >&6; } +ac_preproc_ok=false +for ac_c_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Broken: fails on valid input. +continue +fi + +rm -f conftest.err conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + # Broken: success on invalid input. +continue +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Passes both tests. +ac_preproc_ok=: +break +fi + +rm -f conftest.err conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.err conftest.$ac_ext +if $ac_preproc_ok; then + : +else + { { echo "$as_me:$LINENO: error: C preprocessor \"$CPP\" fails sanity check +See \`config.log' for more details." >&5 +echo "$as_me: error: C preprocessor \"$CPP\" fails sanity check +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } +fi + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + +{ echo "$as_me:$LINENO: checking for grep that handles long lines and -e" >&5 +echo $ECHO_N "checking for grep that handles long lines and -e... $ECHO_C" >&6; } +if test "${ac_cv_path_GREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + # Extract the first word of "grep ggrep" to use in msg output +if test -z "$GREP"; then +set dummy grep ggrep; ac_prog_name=$2 +if test "${ac_cv_path_GREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_path_GREP_found=false +# Loop through the user's path and test for each of PROGNAME-LIST +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in grep ggrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_GREP="$as_dir/$ac_prog$ac_exec_ext" + { test -f "$ac_path_GREP" && $as_executable_p "$ac_path_GREP"; } || continue + # Check for GNU ac_path_GREP and select it if it is found. + # Check for GNU $ac_path_GREP +case `"$ac_path_GREP" --version 2>&1` in +*GNU*) + ac_cv_path_GREP="$ac_path_GREP" ac_path_GREP_found=:;; +*) + ac_count=0 + echo $ECHO_N "0123456789$ECHO_C" >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + echo 'GREP' >> "conftest.nl" + "$ac_path_GREP" -e 'GREP$' -e '-(cannot match)-' < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + ac_count=`expr $ac_count + 1` + if test $ac_count -gt ${ac_path_GREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_GREP="$ac_path_GREP" + ac_path_GREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + + $ac_path_GREP_found && break 3 + done +done + +done +IFS=$as_save_IFS + + +fi + +GREP="$ac_cv_path_GREP" +if test -z "$GREP"; then + { { echo "$as_me:$LINENO: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&5 +echo "$as_me: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&2;} + { (exit 1); exit 1; }; } +fi + +else + ac_cv_path_GREP=$GREP +fi + + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_path_GREP" >&5 +echo "${ECHO_T}$ac_cv_path_GREP" >&6; } + GREP="$ac_cv_path_GREP" + + +{ echo "$as_me:$LINENO: checking for egrep" >&5 +echo $ECHO_N "checking for egrep... $ECHO_C" >&6; } +if test "${ac_cv_path_EGREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if echo a | $GREP -E '(a|b)' >/dev/null 2>&1 + then ac_cv_path_EGREP="$GREP -E" + else + # Extract the first word of "egrep" to use in msg output +if test -z "$EGREP"; then +set dummy egrep; ac_prog_name=$2 +if test "${ac_cv_path_EGREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_path_EGREP_found=false +# Loop through the user's path and test for each of PROGNAME-LIST +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in egrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_EGREP="$as_dir/$ac_prog$ac_exec_ext" + { test -f "$ac_path_EGREP" && $as_executable_p "$ac_path_EGREP"; } || continue + # Check for GNU ac_path_EGREP and select it if it is found. + # Check for GNU $ac_path_EGREP +case `"$ac_path_EGREP" --version 2>&1` in +*GNU*) + ac_cv_path_EGREP="$ac_path_EGREP" ac_path_EGREP_found=:;; +*) + ac_count=0 + echo $ECHO_N "0123456789$ECHO_C" >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + echo 'EGREP' >> "conftest.nl" + "$ac_path_EGREP" 'EGREP$' < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + ac_count=`expr $ac_count + 1` + if test $ac_count -gt ${ac_path_EGREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_EGREP="$ac_path_EGREP" + ac_path_EGREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + + $ac_path_EGREP_found && break 3 + done +done + +done +IFS=$as_save_IFS + + +fi + +EGREP="$ac_cv_path_EGREP" +if test -z "$EGREP"; then + { { echo "$as_me:$LINENO: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&5 +echo "$as_me: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&2;} + { (exit 1); exit 1; }; } +fi + +else + ac_cv_path_EGREP=$EGREP +fi + + + fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_path_EGREP" >&5 +echo "${ECHO_T}$ac_cv_path_EGREP" >&6; } + EGREP="$ac_cv_path_EGREP" + + +{ echo "$as_me:$LINENO: checking for ANSI C header files" >&5 +echo $ECHO_N "checking for ANSI C header files... $ECHO_C" >&6; } +if test "${ac_cv_header_stdc+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#include +#include + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_header_stdc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_header_stdc=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + +if test $ac_cv_header_stdc = yes; then + # SunOS 4.x string.h does not declare mem*, contrary to ANSI. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "memchr" >/dev/null 2>&1; then + : +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "free" >/dev/null 2>&1; then + : +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. + if test "$cross_compiling" = yes; then + : +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#if ((' ' & 0x0FF) == 0x020) +# define ISLOWER(c) ('a' <= (c) && (c) <= 'z') +# define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c)) +#else +# define ISLOWER(c) \ + (('a' <= (c) && (c) <= 'i') \ + || ('j' <= (c) && (c) <= 'r') \ + || ('s' <= (c) && (c) <= 'z')) +# define TOUPPER(c) (ISLOWER(c) ? ((c) | 0x40) : (c)) +#endif + +#define XOR(e, f) (((e) && !(f)) || (!(e) && (f))) +int +main () +{ + int i; + for (i = 0; i < 256; i++) + if (XOR (islower (i), ISLOWER (i)) + || toupper (i) != TOUPPER (i)) + return 2; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + : +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +ac_cv_header_stdc=no +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi + + +fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_stdc" >&5 +echo "${ECHO_T}$ac_cv_header_stdc" >&6; } +if test $ac_cv_header_stdc = yes; then + +cat >>confdefs.h <<\_ACEOF +#define STDC_HEADERS 1 +_ACEOF + +fi + +# On IRIX 5.3, sys/types and inttypes.h are conflicting. + + + + + + + + + +for ac_header in sys/types.h sys/stat.h stdlib.h string.h memory.h strings.h \ + inttypes.h stdint.h unistd.h +do +as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` +{ echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + +#include <$ac_header> +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + eval "$as_ac_Header=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_Header=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_Header'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 +_ACEOF + +fi + +done + + + + + if test "${ac_cv_header_readline_readline_h+set}" = set; then + { echo "$as_me:$LINENO: checking for readline/readline.h" >&5 +echo $ECHO_N "checking for readline/readline.h... $ECHO_C" >&6; } +if test "${ac_cv_header_readline_readline_h+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_readline_readline_h" >&5 +echo "${ECHO_T}$ac_cv_header_readline_readline_h" >&6; } +else + # Is the header compilable? +{ echo "$as_me:$LINENO: checking readline/readline.h usability" >&5 +echo $ECHO_N "checking readline/readline.h usability... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +#include +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_header_compiler=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_compiler=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 +echo "${ECHO_T}$ac_header_compiler" >&6; } + +# Is the header present? +{ echo "$as_me:$LINENO: checking readline/readline.h presence" >&5 +echo $ECHO_N "checking readline/readline.h presence... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + ac_header_preproc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_preproc=no +fi + +rm -f conftest.err conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 +echo "${ECHO_T}$ac_header_preproc" >&6; } + +# So? What about this header? +case $ac_header_compiler:$ac_header_preproc:$ac_c_preproc_warn_flag in + yes:no: ) + { echo "$as_me:$LINENO: WARNING: readline/readline.h: accepted by the compiler, rejected by the preprocessor!" >&5 +echo "$as_me: WARNING: readline/readline.h: accepted by the compiler, rejected by the preprocessor!" >&2;} + { echo "$as_me:$LINENO: WARNING: readline/readline.h: proceeding with the compiler's result" >&5 +echo "$as_me: WARNING: readline/readline.h: proceeding with the compiler's result" >&2;} + ac_header_preproc=yes + ;; + no:yes:* ) + { echo "$as_me:$LINENO: WARNING: readline/readline.h: present but cannot be compiled" >&5 +echo "$as_me: WARNING: readline/readline.h: present but cannot be compiled" >&2;} + { echo "$as_me:$LINENO: WARNING: readline/readline.h: check for missing prerequisite headers?" >&5 +echo "$as_me: WARNING: readline/readline.h: check for missing prerequisite headers?" >&2;} + { echo "$as_me:$LINENO: WARNING: readline/readline.h: see the Autoconf documentation" >&5 +echo "$as_me: WARNING: readline/readline.h: see the Autoconf documentation" >&2;} + { echo "$as_me:$LINENO: WARNING: readline/readline.h: section \"Present But Cannot Be Compiled\"" >&5 +echo "$as_me: WARNING: readline/readline.h: section \"Present But Cannot Be Compiled\"" >&2;} + { echo "$as_me:$LINENO: WARNING: readline/readline.h: proceeding with the preprocessor's result" >&5 +echo "$as_me: WARNING: readline/readline.h: proceeding with the preprocessor's result" >&2;} + { echo "$as_me:$LINENO: WARNING: readline/readline.h: in the future, the compiler will take precedence" >&5 +echo "$as_me: WARNING: readline/readline.h: in the future, the compiler will take precedence" >&2;} + + ;; +esac +{ echo "$as_me:$LINENO: checking for readline/readline.h" >&5 +echo $ECHO_N "checking for readline/readline.h... $ECHO_C" >&6; } +if test "${ac_cv_header_readline_readline_h+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_cv_header_readline_readline_h=$ac_header_preproc +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_readline_readline_h" >&5 +echo "${ECHO_T}$ac_cv_header_readline_readline_h" >&6; } + +fi + + + + if test "$ac_cv_header_readline_readline_h" = yes; then + + cat > conftest.$ac_ext < +#include +wi_LIB_READLINE_VERSION RL_VERSION_MAJOR RL_VERSION_MINOR +EOF + + wi_READLINE_VERSION=$($CPP $CPPFLAGS conftest.$ac_ext | sed -n -e "s/^wi_LIB_READLINE_VERSION *\([0-9\][0-9\]*\) *\([0-9\][0-9\]*\)$/\1.\2/p") + rm -rf conftest* + + if test -n "$wi_READLINE_VERSION"; then + wi_MAJOR=$(expr $wi_READLINE_VERSION : '\([0-9][0-9]*\)\.') + wi_MINOR=$(expr $wi_READLINE_VERSION : '[0-9][0-9]*\.\([0-9][0-9]*$\)') + if test $wi_MINOR -lt 10; then + wi_MINOR=$(expr $wi_MINOR \* 10) + fi + wi_READLINE_VERSION=$(expr $wi_MAJOR \* 100 + $wi_MINOR) + else + wi_READLINE_VERSION=-1 + fi + + + ac_save_LIBS="$LIBS" + # Note: $LIBCURSES is permitted to be empty. + + for LIBREADLINE in "-lreadline.dll" "-lreadline" "-lreadline $LIBCURSES" "-lreadline -ltermcap" "-lreadline -lncurses" "-lreadline -lcurses" + do + { echo "$as_me:$LINENO: checking for GNU Readline library $LIBREADLINE" >&5 +echo $ECHO_N "checking for GNU Readline library $LIBREADLINE... $ECHO_C" >&6; } + + LIBS="$ac_save_LIBS $LIBREADLINE" + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + + /* includes */ + #include + #include + +int +main () +{ + + /* function-body */ + int dummy = rl_completion_append_character; /* rl_completion_append_character appeared in version 2.1 */ + readline(NULL); + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + + wi_cv_lib_readline=yes + { echo "$as_me:$LINENO: result: yes" >&5 +echo "${ECHO_T}yes" >&6; } + +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + + wi_cv_lib_readline=no + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } + +fi + +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext + + if test "$wi_cv_lib_readline" = yes; then + + +cat >>confdefs.h <<_ACEOF +#define HAVE_LIBREADLINE $wi_READLINE_VERSION +_ACEOF + + break + fi + done + + LIBS="$ac_save_LIBS" + fi + + +# Required programs +# =========================================================================== +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}gcc", so it can be a program name with args. +set dummy ${ac_tool_prefix}gcc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="${ac_tool_prefix}gcc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_CC"; then + ac_ct_CC=$CC + # Extract the first word of "gcc", so it can be a program name with args. +set dummy gcc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_CC="gcc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 +echo "${ECHO_T}$ac_ct_CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +else + CC="$ac_cv_prog_CC" +fi + +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}cc", so it can be a program name with args. +set dummy ${ac_tool_prefix}cc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="${ac_tool_prefix}cc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + fi +fi +if test -z "$CC"; then + # Extract the first word of "cc", so it can be a program name with args. +set dummy cc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else + ac_prog_rejected=no +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then + ac_prog_rejected=yes + continue + fi + ac_cv_prog_CC="cc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +if test $ac_prog_rejected = yes; then + # We found a bogon in the path, so make sure we never use it. + set dummy $ac_cv_prog_CC + shift + if test $# != 0; then + # We chose a different compiler from the bogus one. + # However, it has the same basename, so the bogon will be chosen + # first if we set CC to just the basename; use the full file name. + shift + ac_cv_prog_CC="$as_dir/$ac_word${1+' '}$@" + fi +fi +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + for ac_prog in cl.exe + do + # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. +set dummy $ac_tool_prefix$ac_prog; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="$ac_tool_prefix$ac_prog" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + test -n "$CC" && break + done +fi +if test -z "$CC"; then + ac_ct_CC=$CC + for ac_prog in cl.exe +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_CC="$ac_prog" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 +echo "${ECHO_T}$ac_ct_CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + test -n "$ac_ct_CC" && break +done + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +fi + +fi + + +test -z "$CC" && { { echo "$as_me:$LINENO: error: no acceptable C compiler found in \$PATH +See \`config.log' for more details." >&5 +echo "$as_me: error: no acceptable C compiler found in \$PATH +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } + +# Provide some information about the compiler. +echo "$as_me:$LINENO: checking for C compiler version" >&5 +ac_compiler=`set X $ac_compile; echo $2` +{ (ac_try="$ac_compiler --version >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compiler --version >&5") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } +{ (ac_try="$ac_compiler -v >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compiler -v >&5") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } +{ (ac_try="$ac_compiler -V >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compiler -V >&5") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } + +{ echo "$as_me:$LINENO: checking whether we are using the GNU C compiler" >&5 +echo $ECHO_N "checking whether we are using the GNU C compiler... $ECHO_C" >&6; } +if test "${ac_cv_c_compiler_gnu+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ +#ifndef __GNUC__ + choke me +#endif + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_compiler_gnu=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_compiler_gnu=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +ac_cv_c_compiler_gnu=$ac_compiler_gnu + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_c_compiler_gnu" >&5 +echo "${ECHO_T}$ac_cv_c_compiler_gnu" >&6; } +GCC=`test $ac_compiler_gnu = yes && echo yes` +ac_test_CFLAGS=${CFLAGS+set} +ac_save_CFLAGS=$CFLAGS +{ echo "$as_me:$LINENO: checking whether $CC accepts -g" >&5 +echo $ECHO_N "checking whether $CC accepts -g... $ECHO_C" >&6; } +if test "${ac_cv_prog_cc_g+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_save_c_werror_flag=$ac_c_werror_flag + ac_c_werror_flag=yes + ac_cv_prog_cc_g=no + CFLAGS="-g" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_prog_cc_g=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + CFLAGS="" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_c_werror_flag=$ac_save_c_werror_flag + CFLAGS="-g" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_prog_cc_g=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + ac_c_werror_flag=$ac_save_c_werror_flag +fi +{ echo "$as_me:$LINENO: result: $ac_cv_prog_cc_g" >&5 +echo "${ECHO_T}$ac_cv_prog_cc_g" >&6; } +if test "$ac_test_CFLAGS" = set; then + CFLAGS=$ac_save_CFLAGS +elif test $ac_cv_prog_cc_g = yes; then + if test "$GCC" = yes; then + CFLAGS="-g -O2" + else + CFLAGS="-g" + fi +else + if test "$GCC" = yes; then + CFLAGS="-O2" + else + CFLAGS= + fi +fi +{ echo "$as_me:$LINENO: checking for $CC option to accept ISO C89" >&5 +echo $ECHO_N "checking for $CC option to accept ISO C89... $ECHO_C" >&6; } +if test "${ac_cv_prog_cc_c89+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_cv_prog_cc_c89=no +ac_save_CC=$CC +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#include +#include +/* Most of the following tests are stolen from RCS 5.7's src/conf.sh. */ +struct buf { int x; }; +FILE * (*rcsopen) (struct buf *, struct stat *, int); +static char *e (p, i) + char **p; + int i; +{ + return p[i]; +} +static char *f (char * (*g) (char **, int), char **p, ...) +{ + char *s; + va_list v; + va_start (v,p); + s = g (p, va_arg (v,int)); + va_end (v); + return s; +} + +/* OSF 4.0 Compaq cc is some sort of almost-ANSI by default. It has + function prototypes and stuff, but not '\xHH' hex character constants. + These don't provoke an error unfortunately, instead are silently treated + as 'x'. The following induces an error, until -std is added to get + proper ANSI mode. Curiously '\x00'!='x' always comes out true, for an + array size at least. It's necessary to write '\x00'==0 to get something + that's true only with -std. */ +int osf4_cc_array ['\x00' == 0 ? 1 : -1]; + +/* IBM C 6 for AIX is almost-ANSI by default, but it replaces macro parameters + inside strings and character constants. */ +#define FOO(x) 'x' +int xlc6_cc_array[FOO(a) == 'x' ? 1 : -1]; + +int test (int i, double x); +struct s1 {int (*f) (int a);}; +struct s2 {int (*f) (double a);}; +int pairnames (int, char **, FILE *(*)(struct buf *, struct stat *, int), int, int); +int argc; +char **argv; +int +main () +{ +return f (e, argv, 0) != argv[0] || f (e, argv, 1) != argv[1]; + ; + return 0; +} +_ACEOF +for ac_arg in '' -qlanglvl=extc89 -qlanglvl=ansi -std \ + -Ae "-Aa -D_HPUX_SOURCE" "-Xc -D__EXTENSIONS__" +do + CC="$ac_save_CC $ac_arg" + rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_prog_cc_c89=$ac_arg +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext + test "x$ac_cv_prog_cc_c89" != "xno" && break +done +rm -f conftest.$ac_ext +CC=$ac_save_CC + +fi +# AC_CACHE_VAL +case "x$ac_cv_prog_cc_c89" in + x) + { echo "$as_me:$LINENO: result: none needed" >&5 +echo "${ECHO_T}none needed" >&6; } ;; + xno) + { echo "$as_me:$LINENO: result: unsupported" >&5 +echo "${ECHO_T}unsupported" >&6; } ;; + *) + CC="$CC $ac_cv_prog_cc_c89" + { echo "$as_me:$LINENO: result: $ac_cv_prog_cc_c89" >&5 +echo "${ECHO_T}$ac_cv_prog_cc_c89" >&6; } ;; +esac + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu +{ echo "$as_me:$LINENO: checking how to run the C preprocessor" >&5 +echo $ECHO_N "checking how to run the C preprocessor... $ECHO_C" >&6; } +# On Suns, sometimes $CPP names a directory. +if test -n "$CPP" && test -d "$CPP"; then + CPP= +fi +if test -z "$CPP"; then + if test "${ac_cv_prog_CPP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + # Double quotes because CPP needs to be expanded + for CPP in "$CC -E" "$CC -E -traditional-cpp" "/lib/cpp" + do + ac_preproc_ok=false +for ac_c_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Broken: fails on valid input. +continue +fi + +rm -f conftest.err conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + # Broken: success on invalid input. +continue +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Passes both tests. +ac_preproc_ok=: +break +fi + +rm -f conftest.err conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.err conftest.$ac_ext +if $ac_preproc_ok; then + break +fi + + done + ac_cv_prog_CPP=$CPP + +fi + CPP=$ac_cv_prog_CPP +else + ac_cv_prog_CPP=$CPP +fi +{ echo "$as_me:$LINENO: result: $CPP" >&5 +echo "${ECHO_T}$CPP" >&6; } +ac_preproc_ok=false +for ac_c_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Broken: fails on valid input. +continue +fi + +rm -f conftest.err conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + # Broken: success on invalid input. +continue +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Passes both tests. +ac_preproc_ok=: +break +fi + +rm -f conftest.err conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.err conftest.$ac_ext +if $ac_preproc_ok; then + : +else + { { echo "$as_me:$LINENO: error: C preprocessor \"$CPP\" fails sanity check +See \`config.log' for more details." >&5 +echo "$as_me: error: C preprocessor \"$CPP\" fails sanity check +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } +fi + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + +ac_aux_dir= +for ac_dir in "$srcdir" "$srcdir/.." "$srcdir/../.."; do + if test -f "$ac_dir/install-sh"; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/install-sh -c" + break + elif test -f "$ac_dir/install.sh"; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/install.sh -c" + break + elif test -f "$ac_dir/shtool"; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/shtool install -c" + break + fi +done +if test -z "$ac_aux_dir"; then + { { echo "$as_me:$LINENO: error: cannot find install-sh or install.sh in \"$srcdir\" \"$srcdir/..\" \"$srcdir/../..\"" >&5 +echo "$as_me: error: cannot find install-sh or install.sh in \"$srcdir\" \"$srcdir/..\" \"$srcdir/../..\"" >&2;} + { (exit 1); exit 1; }; } +fi + +# These three variables are undocumented and unsupported, +# and are intended to be withdrawn in a future Autoconf release. +# They can cause serious problems if a builder's source tree is in a directory +# whose full name contains unusual characters. +ac_config_guess="$SHELL $ac_aux_dir/config.guess" # Please don't use this var. +ac_config_sub="$SHELL $ac_aux_dir/config.sub" # Please don't use this var. +ac_configure="$SHELL $ac_aux_dir/configure" # Please don't use this var. + + +# Find a good install program. We prefer a C program (faster), +# so one script is as good as another. But avoid the broken or +# incompatible versions: +# SysV /etc/install, /usr/sbin/install +# SunOS /usr/etc/install +# IRIX /sbin/install +# AIX /bin/install +# AmigaOS /C/install, which installs bootblocks on floppy discs +# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag +# AFS /usr/afsws/bin/install, which mishandles nonexistent args +# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" +# OS/2's system install, which has a completely different semantic +# ./install, which can be erroneously created by make from ./install.sh. +{ echo "$as_me:$LINENO: checking for a BSD-compatible install" >&5 +echo $ECHO_N "checking for a BSD-compatible install... $ECHO_C" >&6; } +if test -z "$INSTALL"; then +if test "${ac_cv_path_install+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + # Account for people who put trailing slashes in PATH elements. +case $as_dir/ in + ./ | .// | /cC/* | \ + /etc/* | /usr/sbin/* | /usr/etc/* | /sbin/* | /usr/afsws/bin/* | \ + ?:\\/os2\\/install\\/* | ?:\\/OS2\\/INSTALL\\/* | \ + /usr/ucb/* ) ;; + *) + # OSF1 and SCO ODT 3.0 have their own names for install. + # Don't use installbsd from OSF since it installs stuff as root + # by default. + for ac_prog in ginstall scoinst install; do + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_prog$ac_exec_ext" && $as_executable_p "$as_dir/$ac_prog$ac_exec_ext"; }; then + if test $ac_prog = install && + grep dspmsg "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then + # AIX install. It has an incompatible calling convention. + : + elif test $ac_prog = install && + grep pwplus "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then + # program-specific install script used by HP pwplus--don't use. + : + else + ac_cv_path_install="$as_dir/$ac_prog$ac_exec_ext -c" + break 3 + fi + fi + done + done + ;; +esac +done +IFS=$as_save_IFS + + +fi + if test "${ac_cv_path_install+set}" = set; then + INSTALL=$ac_cv_path_install + else + # As a last resort, use the slow shell script. Don't cache a + # value for INSTALL within a source directory, because that will + # break other packages using the cache if that directory is + # removed, or if the value is a relative name. + INSTALL=$ac_install_sh + fi +fi +{ echo "$as_me:$LINENO: result: $INSTALL" >&5 +echo "${ECHO_T}$INSTALL" >&6; } + +# Use test -z because SunOS4 sh mishandles braces in ${var-val}. +# It thinks the first close brace ends the variable substitution. +test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}' + +test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL}' + +test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' + +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. +set dummy ${ac_tool_prefix}ranlib; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_RANLIB+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$RANLIB"; then + ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +RANLIB=$ac_cv_prog_RANLIB +if test -n "$RANLIB"; then + { echo "$as_me:$LINENO: result: $RANLIB" >&5 +echo "${ECHO_T}$RANLIB" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_RANLIB"; then + ac_ct_RANLIB=$RANLIB + # Extract the first word of "ranlib", so it can be a program name with args. +set dummy ranlib; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_RANLIB+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_RANLIB"; then + ac_cv_prog_ac_ct_RANLIB="$ac_ct_RANLIB" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_RANLIB="ranlib" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_RANLIB=$ac_cv_prog_ac_ct_RANLIB +if test -n "$ac_ct_RANLIB"; then + { echo "$as_me:$LINENO: result: $ac_ct_RANLIB" >&5 +echo "${ECHO_T}$ac_ct_RANLIB" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + if test "x$ac_ct_RANLIB" = x; then + RANLIB=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + RANLIB=$ac_ct_RANLIB + fi +else + RANLIB="$ac_cv_prog_RANLIB" +fi + +# Extract the first word of "autoconf", so it can be a program name with args. +set dummy autoconf; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_AUTOCONF+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$AUTOCONF"; then + ac_cv_prog_AUTOCONF="$AUTOCONF" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_AUTOCONF="autoconf" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_AUTOCONF" && ac_cv_prog_AUTOCONF=":" +fi +fi +AUTOCONF=$ac_cv_prog_AUTOCONF +if test -n "$AUTOCONF"; then + { echo "$as_me:$LINENO: result: $AUTOCONF" >&5 +echo "${ECHO_T}$AUTOCONF" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +# Extract the first word of "strip", so it can be a program name with args. +set dummy strip; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_STRIP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$STRIP"; then + ac_cv_prog_STRIP="$STRIP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_STRIP="strip" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_STRIP" && ac_cv_prog_STRIP=":" +fi +fi +STRIP=$ac_cv_prog_STRIP +if test -n "$STRIP"; then + { echo "$as_me:$LINENO: result: $STRIP" >&5 +echo "${ECHO_T}$STRIP" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +# Extract the first word of "as", so it can be a program name with args. +set dummy as; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_AS+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$AS"; then + ac_cv_prog_AS="$AS" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_AS="as" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_AS" && ac_cv_prog_AS=":" +fi +fi +AS=$ac_cv_prog_AS +if test -n "$AS"; then + { echo "$as_me:$LINENO: result: $AS" >&5 +echo "${ECHO_T}$AS" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +# Extract the first word of "cp", so it can be a program name with args. +set dummy cp; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CP"; then + ac_cv_prog_CP="$CP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CP="cp" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_CP" && ac_cv_prog_CP=":" +fi +fi +CP=$ac_cv_prog_CP +if test -n "$CP"; then + { echo "$as_me:$LINENO: result: $CP" >&5 +echo "${ECHO_T}$CP" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + + +# Checking for header files. +# =========================================================================== +socket_type=unknown + +for ac_header in sys/socket.h +do +as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + { echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +else + # Is the header compilable? +{ echo "$as_me:$LINENO: checking $ac_header usability" >&5 +echo $ECHO_N "checking $ac_header usability... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +#include <$ac_header> +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_header_compiler=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_compiler=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 +echo "${ECHO_T}$ac_header_compiler" >&6; } + +# Is the header present? +{ echo "$as_me:$LINENO: checking $ac_header presence" >&5 +echo $ECHO_N "checking $ac_header presence... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include <$ac_header> +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + ac_header_preproc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_preproc=no +fi + +rm -f conftest.err conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 +echo "${ECHO_T}$ac_header_preproc" >&6; } + +# So? What about this header? +case $ac_header_compiler:$ac_header_preproc:$ac_c_preproc_warn_flag in + yes:no: ) + { echo "$as_me:$LINENO: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&5 +echo "$as_me: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the compiler's result" >&5 +echo "$as_me: WARNING: $ac_header: proceeding with the compiler's result" >&2;} + ac_header_preproc=yes + ;; + no:yes:* ) + { echo "$as_me:$LINENO: WARNING: $ac_header: present but cannot be compiled" >&5 +echo "$as_me: WARNING: $ac_header: present but cannot be compiled" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: check for missing prerequisite headers?" >&5 +echo "$as_me: WARNING: $ac_header: check for missing prerequisite headers?" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: see the Autoconf documentation" >&5 +echo "$as_me: WARNING: $ac_header: see the Autoconf documentation" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&5 +echo "$as_me: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the preprocessor's result" >&5 +echo "$as_me: WARNING: $ac_header: proceeding with the preprocessor's result" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: in the future, the compiler will take precedence" >&5 +echo "$as_me: WARNING: $ac_header: in the future, the compiler will take precedence" >&2;} + + ;; +esac +{ echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + eval "$as_ac_Header=\$ac_header_preproc" +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } + +fi +if test `eval echo '${'$as_ac_Header'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 +_ACEOF + socket_type=sys_socket_h +fi + +done + +if test $socket_type = unknown; then + +for ac_header in winsock2.h +do +as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + { echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +else + # Is the header compilable? +{ echo "$as_me:$LINENO: checking $ac_header usability" >&5 +echo $ECHO_N "checking $ac_header usability... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +#include <$ac_header> +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_header_compiler=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_compiler=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 +echo "${ECHO_T}$ac_header_compiler" >&6; } + +# Is the header present? +{ echo "$as_me:$LINENO: checking $ac_header presence" >&5 +echo $ECHO_N "checking $ac_header presence... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include <$ac_header> +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + ac_header_preproc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_preproc=no +fi + +rm -f conftest.err conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 +echo "${ECHO_T}$ac_header_preproc" >&6; } + +# So? What about this header? +case $ac_header_compiler:$ac_header_preproc:$ac_c_preproc_warn_flag in + yes:no: ) + { echo "$as_me:$LINENO: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&5 +echo "$as_me: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the compiler's result" >&5 +echo "$as_me: WARNING: $ac_header: proceeding with the compiler's result" >&2;} + ac_header_preproc=yes + ;; + no:yes:* ) + { echo "$as_me:$LINENO: WARNING: $ac_header: present but cannot be compiled" >&5 +echo "$as_me: WARNING: $ac_header: present but cannot be compiled" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: check for missing prerequisite headers?" >&5 +echo "$as_me: WARNING: $ac_header: check for missing prerequisite headers?" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: see the Autoconf documentation" >&5 +echo "$as_me: WARNING: $ac_header: see the Autoconf documentation" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&5 +echo "$as_me: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the preprocessor's result" >&5 +echo "$as_me: WARNING: $ac_header: proceeding with the preprocessor's result" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: in the future, the compiler will take precedence" >&5 +echo "$as_me: WARNING: $ac_header: in the future, the compiler will take precedence" >&2;} + + ;; +esac +{ echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + eval "$as_ac_Header=\$ac_header_preproc" +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } + +fi +if test `eval echo '${'$as_ac_Header'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 +_ACEOF + socket_type=winsock2_h +fi + +done + +fi + + +# Checking for functions/libs +# =========================================================================== +if test $socket_type = winsock2_h; then + LIBS="-lws2_32 $LIBS" +else + +{ echo "$as_me:$LINENO: checking for socket in -lsocket" >&5 +echo $ECHO_N "checking for socket in -lsocket... $ECHO_C" >&6; } +if test "${ac_cv_lib_socket_socket+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-lsocket $LIBS" +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char socket (); +int +main () +{ +return socket (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_lib_socket_socket=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_lib_socket_socket=no +fi + +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ echo "$as_me:$LINENO: result: $ac_cv_lib_socket_socket" >&5 +echo "${ECHO_T}$ac_cv_lib_socket_socket" >&6; } +if test $ac_cv_lib_socket_socket = yes; then + cat >>confdefs.h <<_ACEOF +#define HAVE_LIBSOCKET 1 +_ACEOF + + LIBS="-lsocket $LIBS" + +fi + + +{ echo "$as_me:$LINENO: checking for xdr_short in -lnsl" >&5 +echo $ECHO_N "checking for xdr_short in -lnsl... $ECHO_C" >&6; } +if test "${ac_cv_lib_nsl_xdr_short+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-lnsl $LIBS" +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char xdr_short (); +int +main () +{ +return xdr_short (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_lib_nsl_xdr_short=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_lib_nsl_xdr_short=no +fi + +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ echo "$as_me:$LINENO: result: $ac_cv_lib_nsl_xdr_short" >&5 +echo "${ECHO_T}$ac_cv_lib_nsl_xdr_short" >&6; } +if test $ac_cv_lib_nsl_xdr_short = yes; then + cat >>confdefs.h <<_ACEOF +#define HAVE_LIBNSL 1 +_ACEOF + + LIBS="-lnsl $LIBS" + +fi + +fi + + +# Macro definitions +# =========================================================================== + +# adl_DD_COPT macro checks if the compiler specified as the 1st parameter +# supports option specified as the 2nd parameter +# For example: DD_CPORT(CXX, fPIC) + + + +# This macro expands DIR and assigns it to RET. +# If DIR is NONE, then it's replaced by DEFAULT. +# +# Based on AC_DEFINE_DIR +# +# Examples: +# +# adl_EXPAND(prefix, "/usr/local", expanded_prefix) + + + +# adl_NORMALIZE_PATH +# +# - empty paths are changed to '.' +# - trailing slashes are removed +# - repeated slashes are squeezed except a leading doubled slash '//' +# (which might indicate a networked disk on some OS). +# +# +# REFERENCE_STRING is used to turn '/' into '\' and vice-versa: if +# REFERENCE_STRING contains some backslashes, all slashes and backslashes +# are turned into backslashes, otherwise they are all turned into slashes. +# +# This makes processing of DOS filenames quite easier, because you can turn a +# filename to the Unix notation, make your processing, and turn it back to +# original notation. + + + + + + + +# Checking characteristics of compilers and other programs +# =========================================================================== +{ echo "$as_me:$LINENO: checking whether preprocessor accepts -MM or -M" >&5 +echo $ECHO_N "checking whether preprocessor accepts -MM or -M... $ECHO_C" >&6; } +if test "${sdcc_cv_MM+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + echo "#include " >_test_.c +echo "" >>_test_.c +$CPP -v -MM _test_.c 1>&5 2>&5 +if test "$?" = "0"; then + sdcc_cv_MM="-MM" +else + sdcc_cv_MM="-M" +fi +rm -f _test_.* +fi +{ echo "$as_me:$LINENO: result: $sdcc_cv_MM" >&5 +echo "${ECHO_T}$sdcc_cv_MM" >&6; } +M_OR_MM=$sdcc_cv_MM + + +# This is the first time when CFLAGS are set/modified!! + +{ echo "$as_me:$LINENO: checking whether $CC accepts -ggdb" >&5 +echo $ECHO_N "checking whether $CC accepts -ggdb... $ECHO_C" >&6; } +if test "${sdcc_cv_CCggdb+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >_test_.c < +void main(void) {} +EOF +$CC -v -ggdb -c _test_.c 1>&5 2>&5 +if test "$?" = "0"; then + sdcc_cv_CCggdb="yes" +else + sdcc_cv_CCggdb="no" +fi +rm -f _test_.* a.out +fi +{ echo "$as_me:$LINENO: result: $sdcc_cv_CCggdb" >&5 +echo "${ECHO_T}$sdcc_cv_CCggdb" >&6; } + +if test "$sdcc_cv_CCggdb" = "yes"; then + CFLAGS="-ggdb ${CFLAGS}" +fi + + +{ echo "$as_me:$LINENO: checking whether $CC accepts -pipe" >&5 +echo $ECHO_N "checking whether $CC accepts -pipe... $ECHO_C" >&6; } +if test "${sdcc_cv_CCpipe+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >_test_.c < +void main(void) {} +EOF +$CC -v -pipe -c _test_.c 1>&5 2>&5 +if test "$?" = "0"; then + sdcc_cv_CCpipe="yes" +else + sdcc_cv_CCpipe="no" +fi +rm -f _test_.* a.out +fi +{ echo "$as_me:$LINENO: result: $sdcc_cv_CCpipe" >&5 +echo "${ECHO_T}$sdcc_cv_CCpipe" >&6; } + +if test "$sdcc_cv_CCpipe" = "yes"; then + CFLAGS="-pipe $CFLAGS" +fi + + +# Set standard installation paths +# =========================================================================== + +# In the Makefiles we need paths with '/' as directory separator, even if +# crosscompiling for Win32. +# And we want to preserve the macros (e.g. ${prefix}) in the Makefiles. +# The variables in the Makefiles are replaced by AC_SUBST() +# +# In sdccconf.h the '/' in paths can be replaced by "\\" (normalized), if +# +# The macros are expanded for the header. +# The variables in the header are replaced by AC_*DEFINE*() +# sdccconf_h_dir_separator contains a backslash. + +if test "x${sdccconf_h_dir_separator}" = "x"; then + sdccconf_h_dir_separator="/" +fi + +# Makefiles +########### + +# lib_dir_suffix: +# *nix default: "sdcc/lib" + +if test "${lib_dir_suffix}" = ""; then + lib_dir_suffix="sdcc/lib" +fi + + + + +# sdccconf.h +############ + +cat >>confdefs.h <<_ACEOF +#define DIR_SEPARATOR_STRING "${sdccconf_h_dir_separator}" +_ACEOF + + +# datadir: +# default: "${prefix}/share" + + test "x$prefix" = xNONE && prefix="$ac_default_prefix" + test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + ac_expand=$datadir + test "x$ac_expand" = xNONE && ac_expand="$"NONE"" + ac_expand=`eval echo $ac_expand` + expanded_datadir=`eval echo $ac_expand` + + + ac_ndu=$expanded_datadir + case ":$ac_ndu:" in + ::) ac_ndu='.' ;; + :*[\\/]:) ac_ndu=`echo "$ac_ndu" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $sdccconf_h_dir_separator in + + *\\*) ac_ndu=`echo "$ac_ndu" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) ac_ndu=`echo "$ac_ndu" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac + cat >>confdefs.h <<_ACEOF +#define DATADIR "${ac_ndu}" +_ACEOF + + + +# lib suffix +norm_lib_dir_suffix=${lib_dir_suffix} +case ":$norm_lib_dir_suffix:" in + ::) norm_lib_dir_suffix='.' ;; + :*[\\/]:) norm_lib_dir_suffix=`echo "$norm_lib_dir_suffix" | sed 's,[\\/]*$,,'` ;; + :*:) ;; +esac +case $sdccconf_h_dir_separator in + + *\\*) norm_lib_dir_suffix=`echo "$norm_lib_dir_suffix" | sed 's,\(.\)[\\/][\\/]*,\1\\\\\\\\,g + s,^[\\/],\\\\\\\\,'` ;; + + *) norm_lib_dir_suffix=`echo "$norm_lib_dir_suffix" | sed 's,\(.\)[\\/][\\/]*,\1/,g'` ;; +esac +cat >>confdefs.h <<_ACEOF +#define LIB_DIR_SUFFIX DIR_SEPARATOR_STRING "${norm_lib_dir_suffix}" +_ACEOF + + + +# Generating output files +# =========================================================================== +ac_config_files="$ac_config_files Makefile" + +cat >confcache <<\_ACEOF +# This file is a shell script that caches the results of configure +# tests run on this system so they can be shared between configure +# scripts and configure runs, see configure's option --config-cache. +# It is not useful on other systems. If it contains results you don't +# want to keep, you may remove or edit it. +# +# config.status only pays attention to the cache file if you give it +# the --recheck option to rerun configure. +# +# `ac_cv_env_foo' variables (set or unset) will be overridden when +# loading this file, other *unset* `ac_cv_foo' will be assigned the +# following values. + +_ACEOF + +# The following way of writing the cache mishandles newlines in values, +# but we know of no workaround that is simple, portable, and efficient. +# So, we kill variables containing newlines. +# Ultrix sh set writes to stderr and can't be redirected directly, +# and sets the high bit in the cache file unless we assign to the vars. +( + for ac_var in `(set) 2>&1 | sed -n 's/^\([a-zA-Z_][a-zA-Z0-9_]*\)=.*/\1/p'`; do + eval ac_val=\$$ac_var + case $ac_val in #( + *${as_nl}*) + case $ac_var in #( + *_cv_*) { echo "$as_me:$LINENO: WARNING: Cache variable $ac_var contains a newline." >&5 +echo "$as_me: WARNING: Cache variable $ac_var contains a newline." >&2;} ;; + esac + case $ac_var in #( + _ | IFS | as_nl) ;; #( + *) $as_unset $ac_var ;; + esac ;; + esac + done + + (set) 2>&1 | + case $as_nl`(ac_space=' '; set) 2>&1` in #( + *${as_nl}ac_space=\ *) + # `set' does not quote correctly, so add quotes (double-quote + # substitution turns \\\\ into \\, and sed turns \\ into \). + sed -n \ + "s/'/'\\\\''/g; + s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='\\2'/p" + ;; #( + *) + # `set' quotes correctly as required by POSIX, so do not add quotes. + sed -n "/^[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*=/p" + ;; + esac | + sort +) | + sed ' + /^ac_cv_env_/b end + t clear + :clear + s/^\([^=]*\)=\(.*[{}].*\)$/test "${\1+set}" = set || &/ + t end + s/^\([^=]*\)=\(.*\)$/\1=${\1=\2}/ + :end' >>confcache +if diff "$cache_file" confcache >/dev/null 2>&1; then :; else + if test -w "$cache_file"; then + test "x$cache_file" != "x/dev/null" && + { echo "$as_me:$LINENO: updating cache $cache_file" >&5 +echo "$as_me: updating cache $cache_file" >&6;} + cat confcache >$cache_file + else + { echo "$as_me:$LINENO: not updating unwritable cache $cache_file" >&5 +echo "$as_me: not updating unwritable cache $cache_file" >&6;} + fi +fi +rm -f confcache + +test "x$prefix" = xNONE && prefix=$ac_default_prefix +# Let make expand exec_prefix. +test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + +DEFS=-DHAVE_CONFIG_H + +ac_libobjs= +ac_ltlibobjs= +for ac_i in : $LIBOBJS; do test "x$ac_i" = x: && continue + # 1. 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Please make sure it is defined." >&5 +echo "$as_me: WARNING: $ac_file contains a reference to the variable \`datarootdir' +which seems to be undefined. Please make sure it is defined." >&2;} + + rm -f "$tmp/stdin" + case $ac_file in + -) cat "$tmp/out"; rm -f "$tmp/out";; + *) rm -f "$ac_file"; mv "$tmp/out" $ac_file;; + esac + ;; + :H) + # + # CONFIG_HEADER + # +_ACEOF + +# Transform confdefs.h into a sed script `conftest.defines', that +# substitutes the proper values into config.h.in to produce config.h. +rm -f conftest.defines conftest.tail +# First, append a space to every undef/define line, to ease matching. +echo 's/$/ /' >conftest.defines +# Then, protect against being on the right side of a sed subst, or in +# an unquoted here document, in config.status. If some macros were +# called several times there might be several #defines for the same +# symbol, which is useless. But do not sort them, since the last +# AC_DEFINE must be honored. +ac_word_re=[_$as_cr_Letters][_$as_cr_alnum]* +# These sed commands are passed to sed as "A NAME B PARAMS C VALUE D", where +# NAME is the cpp macro being defined, VALUE is the value it is being given. +# PARAMS is the parameter list in the macro definition--in most cases, it's +# just an empty string. +ac_dA='s,^\\([ #]*\\)[^ ]*\\([ ]*' +ac_dB='\\)[ (].*,\\1define\\2' +ac_dC=' ' +ac_dD=' ,' + +uniq confdefs.h | + sed -n ' + t rset + :rset + s/^[ ]*#[ ]*define[ ][ ]*// + t ok + d + :ok + s/[\\&,]/\\&/g + s/^\('"$ac_word_re"'\)\(([^()]*)\)[ ]*\(.*\)/ '"$ac_dA"'\1'"$ac_dB"'\2'"${ac_dC}"'\3'"$ac_dD"'/p + s/^\('"$ac_word_re"'\)[ ]*\(.*\)/'"$ac_dA"'\1'"$ac_dB$ac_dC"'\2'"$ac_dD"'/p + ' >>conftest.defines + +# Remove the space that was appended to ease matching. +# Then replace #undef with comments. This is necessary, for +# example, in the case of _POSIX_SOURCE, which is predefined and required +# on some systems where configure will not decide to define it. +# (The regexp can be short, since the line contains either #define or #undef.) +echo 's/ $// +s,^[ #]*u.*,/* & */,' >>conftest.defines + +# Break up conftest.defines: +ac_max_sed_lines=50 + +# First sed command is: sed -f defines.sed $ac_file_inputs >"$tmp/out1" +# Second one is: sed -f defines.sed "$tmp/out1" >"$tmp/out2" +# Third one will be: sed -f defines.sed "$tmp/out2" >"$tmp/out1" +# et cetera. +ac_in='$ac_file_inputs' +ac_out='"$tmp/out1"' +ac_nxt='"$tmp/out2"' + +while : +do + # Write a here document: + cat >>$CONFIG_STATUS <<_ACEOF + # First, check the format of the line: + cat >"\$tmp/defines.sed" <<\\CEOF +/^[ ]*#[ ]*undef[ ][ ]*$ac_word_re[ ]*\$/b def +/^[ ]*#[ ]*define[ ][ ]*$ac_word_re[( ]/b def +b +:def +_ACEOF + sed ${ac_max_sed_lines}q conftest.defines >>$CONFIG_STATUS + echo 'CEOF + sed -f "$tmp/defines.sed"' "$ac_in >$ac_out" >>$CONFIG_STATUS + ac_in=$ac_out; ac_out=$ac_nxt; ac_nxt=$ac_in + sed 1,${ac_max_sed_lines}d conftest.defines >conftest.tail + grep . conftest.tail >/dev/null || break + rm -f conftest.defines + mv conftest.tail conftest.defines +done +rm -f conftest.defines conftest.tail + +echo "ac_result=$ac_in" >>$CONFIG_STATUS +cat >>$CONFIG_STATUS <<\_ACEOF + if test x"$ac_file" != x-; then + echo "/* $configure_input */" >"$tmp/config.h" + cat "$ac_result" >>"$tmp/config.h" + if diff $ac_file "$tmp/config.h" >/dev/null 2>&1; then + { echo "$as_me:$LINENO: $ac_file is unchanged" >&5 +echo "$as_me: $ac_file is unchanged" >&6;} + else + rm -f $ac_file + mv "$tmp/config.h" $ac_file + fi + else + echo "/* $configure_input */" + cat "$ac_result" + fi + rm -f "$tmp/out12" + ;; + + + esac + +done # for ac_tag + + +{ (exit 0); exit 0; } +_ACEOF +chmod +x $CONFIG_STATUS +ac_clean_files=$ac_clean_files_save + + +# configure is writing to config.log, and then calls config.status. +# config.status does its own redirection, appending to config.log. +# Unfortunately, on DOS this fails, as config.log is still kept open +# by configure, so config.status won't be able to write to it; its +# output is simply discarded. So we exec the FD to /dev/null, +# effectively closing config.log, so it can be properly (re)opened and +# appended to by config.status. When coming back to configure, we +# need to make the FD available again. +if test "$no_create" != yes; then + ac_cs_success=: + ac_config_status_args= + test "$silent" = yes && + ac_config_status_args="$ac_config_status_args --quiet" + exec 5>/dev/null + $SHELL $CONFIG_STATUS $ac_config_status_args || ac_cs_success=false + exec 5>>config.log + # Use ||, not &&, to avoid exiting from the if with $? = 1, which + # would make configure fail if this is the last instruction. + $ac_cs_success || { (exit 1); exit 1; } +fi + + +# End of configure/configure.in diff --git a/debugger/mcs51/configure.in b/debugger/mcs51/configure.in new file mode 100644 index 0000000..97f6cd4 --- /dev/null +++ b/debugger/mcs51/configure.in @@ -0,0 +1,216 @@ +#!/bin/sh + +AC_PREREQ(2.60) +AC_INIT +AC_CONFIG_SRCDIR([Makefile.in]) +AC_CONFIG_HEADER(config.h) + + +wi_LIB_READLINE + +# Required programs +# =========================================================================== +AC_PROG_CC +AC_PROG_CPP +AC_PROG_INSTALL +AC_PROG_RANLIB +AC_CHECK_PROG(AUTOCONF, autoconf, autoconf, :) +AC_CHECK_PROG(STRIP, strip, strip, :) +AC_CHECK_PROG(AS, as, as, :) +AC_CHECK_PROG(CP, cp, cp, :) + +AC_LANG_C + + +# Checking for header files. +# =========================================================================== +socket_type=unknown +AC_CHECK_HEADERS(sys/socket.h, socket_type=sys_socket_h) +if test $socket_type = unknown; then + AC_CHECK_HEADERS(winsock2.h, socket_type=winsock2_h) +fi + + +# Checking for functions/libs +# =========================================================================== +if test $socket_type = winsock2_h; then + LIBS="-lws2_32 $LIBS" +else + AC_CHECK_LIB(socket,socket) + AC_CHECK_LIB(nsl,xdr_short) +fi + + +# Macro definitions +# =========================================================================== + +# adl_DD_COPT macro checks if the compiler specified as the 1st parameter +# supports option specified as the 2nd parameter +# For example: DD_CPORT(CXX, fPIC) + +AC_DEFUN(adl_DD_COPT, [ +AC_CACHE_CHECK(whether $$1 accepts -$2,sdcc_cv_$1$2, +cat >_test_.c < +void main(void) {} +EOF +$$1 -v -$2 -c _test_.c 1>&5 2>&5 +if test "$?" = "0"; then + sdcc_cv_$1$2="yes" +else + sdcc_cv_$1$2="no" +fi +rm -f _test_.* a.out) +]) + +# This macro expands DIR and assigns it to RET. +# If DIR is NONE, then it's replaced by DEFAULT. +# +# Based on AC_DEFINE_DIR +# +# Examples: +# +# adl_EXPAND(prefix, "/usr/local", expanded_prefix) + +AC_DEFUN([adl_EXPAND], [ + test "x$prefix" = xNONE && prefix="$ac_default_prefix" + test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + ac_expand=[$]$1 + test "x$ac_expand" = xNONE && ac_expand="[$]$2" + ac_expand=`eval echo [$]ac_expand` + $3=`eval echo [$]ac_expand` +]) + +# adl_NORMALIZE_PATH +# +# - empty paths are changed to '.' +# - trailing slashes are removed +# - repeated slashes are squeezed except a leading doubled slash '//' +# (which might indicate a networked disk on some OS). +# +# +# REFERENCE_STRING is used to turn '/' into '\' and vice-versa: if +# REFERENCE_STRING contains some backslashes, all slashes and backslashes +# are turned into backslashes, otherwise they are all turned into slashes. +# +# This makes processing of DOS filenames quite easier, because you can turn a +# filename to the Unix notation, make your processing, and turn it back to +# original notation. + +dnl Available from the GNU Autoconf Macro Archive at: +dnl http://www.gnu.org/software/ac-archive/htmldoc/normpath.html +dnl +AC_DEFUN([adl_NORMALIZE_PATH], +[case ":[$]$1:" in +dnl change empty paths to '.' + ::) $1='.' ;; +dnl strip trailing slashes + :*[[\\/]]:) $1=`echo "[$]$1" | sed 's,[[\\/]]*[$],,'` ;; + :*:) ;; +esac +dnl squeze repeated slashes +case ifelse($2,,"[$]$1",$2) in +dnl if the path contains any backslashes, turn slashes into backslashes + +dnl Bernhard Held 2003-04-06 +dnl This was the original line. It does not: +dnl - convert the first slash +dnl - replace a slash with a double-backslash +dnl *\\*) $1=`echo "[$]$1" | sed 's,\(.\)[[\\/]][[\\/]]*,\1\\\\,g'` ;; + *\\*) $1=`echo "[$]$1" | sed 's,\(.\)[[\\/]][[\\/]]*,\1\\\\\\\\,g + s,^[[\\/]],\\\\\\\\,'` ;; + +dnl if the path contains slashes, also turn backslashes into slashes + *) $1=`echo "[$]$1" | sed 's,\(.\)[[\\/]][[\\/]]*,\1/,g'` ;; +esac]) + + +dnl adl_NORMALIZE_DEFINE_UNQUOTED(var, DEFINE, REFERENCE_STRING) +AC_DEFUN([adl_NORMALIZE_DEFINE_UNQUOTED], [ + ac_ndu=[$]$1 + adl_NORMALIZE_PATH([ac_ndu], [$]$3) + AC_DEFINE_UNQUOTED($2, "${ac_ndu}") +]) + + +# Checking characteristics of compilers and other programs +# =========================================================================== +AC_CACHE_CHECK(whether preprocessor accepts -MM or -M,sdcc_cv_MM, +echo "#include " >_test_.c +echo "" >>_test_.c +$CPP -v -MM _test_.c 1>&5 2>&5 +if test "$?" = "0"; then + sdcc_cv_MM="-MM" +else + sdcc_cv_MM="-M" +fi +rm -f _test_.*) +M_OR_MM=$sdcc_cv_MM +AC_SUBST(M_OR_MM) + +# This is the first time when CFLAGS are set/modified!! +adl_DD_COPT(CC, ggdb) +if test "$sdcc_cv_CCggdb" = "yes"; then + CFLAGS="-ggdb ${CFLAGS}" +fi + +adl_DD_COPT(CC, pipe) +if test "$sdcc_cv_CCpipe" = "yes"; then + CFLAGS="-pipe $CFLAGS" +fi + + +# Set standard installation paths +# =========================================================================== + +# In the Makefiles we need paths with '/' as directory separator, even if +# crosscompiling for Win32. +# And we want to preserve the macros (e.g. ${prefix}) in the Makefiles. +# The variables in the Makefiles are replaced by AC_SUBST() +# +# In sdccconf.h the '/' in paths can be replaced by "\\" (normalized), if +# +# The macros are expanded for the header. +# The variables in the header are replaced by AC_*DEFINE*() +# sdccconf_h_dir_separator contains a backslash. +AC_ARG_VAR(sdccconf_h_dir_separator, needed in sdccconf.h: either "/" (default) or "\\") +if test "x${sdccconf_h_dir_separator}" = "x"; then + sdccconf_h_dir_separator="/" +fi + +# Makefiles +########### + +# lib_dir_suffix: +# *nix default: "sdcc/lib" +AC_ARG_VAR(lib_dir_suffix, appended to datadir to define SDCC's library root directory) +if test "${lib_dir_suffix}" = ""; then + lib_dir_suffix="sdcc/lib" +fi +AC_SUBST(lib_dir_suffix) + +AC_SUBST(EXEEXT) + +# sdccconf.h +############ + +AC_DEFINE_UNQUOTED(DIR_SEPARATOR_STRING, "${sdccconf_h_dir_separator}") + +# datadir: +# default: "${prefix}/share" +adl_EXPAND(datadir, "NONE", expanded_datadir) +adl_NORMALIZE_DEFINE_UNQUOTED(expanded_datadir, DATADIR, sdccconf_h_dir_separator) + +# lib suffix +norm_lib_dir_suffix=${lib_dir_suffix} +adl_NORMALIZE_PATH([norm_lib_dir_suffix], [$sdccconf_h_dir_separator]) +AC_DEFINE_UNQUOTED(LIB_DIR_SUFFIX, + DIR_SEPARATOR_STRING "${norm_lib_dir_suffix}") + + +# Generating output files +# =========================================================================== +AC_CONFIG_FILES([Makefile]) +AC_OUTPUT + +# End of configure/configure.in diff --git a/debugger/mcs51/sdcdb.c b/debugger/mcs51/sdcdb.c new file mode 100644 index 0000000..fc132d8 --- /dev/null +++ b/debugger/mcs51/sdcdb.c @@ -0,0 +1,1778 @@ +/*------------------------------------------------------------------------- + sdcdb.c - main source file for sdcdb debugger + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "sdcdb.h" +#include "symtab.h" +#include "simi.h" +#include "break.h" +#include "cmd.h" +#include "newalloc.h" +#if defined HAVE_LIBREADLINE && HAVE_LIBREADLINE != -1 +#define HAVE_READLINE_COMPLETITION 1 +#endif +#ifdef HAVE_LIBREADLINE +#include +#include +#endif /* HAVE_LIBREADLINE */ + +#ifdef SDCDB_DEBUG +int sdcdbDebug = 0; +#endif + +char *currModName = NULL; +cdbrecs *recsRoot = NULL ; +set *modules = NULL; /* set of all modules */ +set *functions = NULL ; /* set of functions */ +set *symbols = NULL ; /* set of symbols */ +set *sfrsymbols= NULL ; /* set of symbols of sfr or sbit */ +int nStructs = 0 ; +structdef **structs = NULL ; /* all structures */ +int nLinkrecs = 0; +linkrec **linkrecs = NULL; /* all linkage editor records */ +context *currCtxt = NULL; +short fullname = 0; +short showfull = 0; +char userinterrupt = 0; +char nointerrupt = 0; +char contsim = 0; +char *ssdirl = DATADIR LIB_DIR_SUFFIX ":" DATADIR LIB_DIR_SUFFIX DIR_SEPARATOR_STRING "small" ; +char *simArgs[40]; +int nsimArgs = 0; +char model_str[20]; +/* fake filename & lineno to make linker */ +char *filename=NULL; +int lineno = 0; +int fatalError = 0; + +static void commandLoop(FILE *cmdfile); +#ifdef HAVE_READLINE_COMPLETITION +char *completionCmdSource(const char *text, int state); +char *completionCmdFile(const char *text, int state); +char *completionCmdInfo(const char *text, int state); +char *completionCmdShow(const char *text, int state); +char *completionCmdListSymbols(const char *text, int state); +char *completionCmdPrintType(const char *text, int state); +char *completionCmdPrint(const char *text, int state); +char *completionCmdDelUserBp(const char *text, int state); +char *completionCmdUnDisplay(const char *text, int state); +char *completionCmdSetUserBp(const char *text, int state); +char *completionCmdSetOption(const char *text, int state); +#else +#define completionCmdSource NULL +#define completionCmdFile NULL +#define completionCmdInfo NULL +#define completionCmdShow NULL +#define completionCmdListSymbols NULL +#define completionCmdPrintType NULL +#define completionCmdPrint NULL +#define completionCmdDelUserBp NULL +#define completionCmdUnDisplay NULL +#define completionCmdSetUserBp NULL +#define completionCmdSetOption NULL +#endif /* HAVE_READLINE_COMPLETITION */ + +/* command table */ +struct cmdtab +{ + char *cmd ; /* command the user will enter */ + int (*cmdfunc)(char *,context *); /* function to execute when command is entered */ +#ifdef HAVE_READLINE_COMPLETITION + rl_compentry_func_t *completion_func; +#else + void *dummy; +#endif /* HAVE_READLINE_COMPLETITION */ + char *htxt ; /* short help text */ + +} cmdTab[] = { + /* NOTE:- the search is done from the top, so "break" should + precede the synonym "b" */ + /* break point */ + { "break" , cmdSetUserBp , completionCmdSetUserBp, + "{b}reak\t\t\t [LINE | FILE:LINE | FILE:FUNCTION | FUNCTION | *
]\n", + }, + { "tbreak" , cmdSetTmpUserBp , completionCmdSetUserBp/*same as "break"*/, + "tbreak\t\t\t [LINE | FILE:LINE | FILE:FUNCTION | FUNCTION | *
]\n", + }, + { "b" , cmdSetUserBp , completionCmdSetUserBp , NULL,}, + + { "jump" , cmdJump , NULL, + "jump\t\t\tContinue program being debugged at specified line or address\n [LINE | FILE:LINE | *
]\n", + }, + { "clear" , cmdClrUserBp , completionCmdSetUserBp/*same as "break"*/, + "{cl}ear\t\t\t [LINE | FILE:LINE | FILE:FUNCTION | FUNCTION]\n" + }, + { "cl" , cmdClrUserBp , completionCmdSetUserBp/*same as "break"*/ , NULL,}, + + { "continue" , cmdContinue , NULL, + "{c}ontinue\t\t Continue program being debugged, after breakpoint.\n" + }, + { "condition" , cmdCondition , completionCmdDelUserBp/*same as "delete"*/, + "condition brkpoint_number expr\t\tSet condition for breakpoint.\n" + }, + { "ignore" , cmdIgnore , completionCmdDelUserBp/*same as "delete"*/, + "ignore brkpoint_number count\t\tSet ignore count for breakpoint.\n" + }, + { "commands" , cmdCommands , completionCmdDelUserBp/*same as "delete"*/, + "commands [brkpoint_number]\t\tSetting commands for breakpoint.\n" + }, + { "c" , cmdContinue , NULL , NULL,}, + + { "disassemble",cmdDisasmF , NULL, "disassemble [startaddr [endaddress]]\tdisassemble asm commands\n" }, + { "delete" , cmdDelUserBp , completionCmdDelUserBp, + "{d}elete n\t\t clears break point number n\n" + }, + { "display" , cmdDisplay , completionCmdPrint/*same as "print"*/, + "display [/] []\t print value of given variable each time the program stops\n" + }, + { "undisplay" , cmdUnDisplay , completionCmdUnDisplay, + "undisplay []\t dont display this variable or all\n" + }, + { "down" , cmdDown , NULL, + "down\t\tSelect and print stack frame called by this one.\nAn argument says how many frames down to go.\n" + }, + { "up" , cmdUp , NULL, + "up\t\tSelect and print stack frame that called this one.\nAn argument says how many frames up to go.\n" + }, + { "d" , cmdDelUserBp , completionCmdDelUserBp, NULL }, + + { "info" , cmdInfo , completionCmdInfo, + "info \n" + "\t list all break points, call-stack, frame or register information\n" + }, + + { "listasm" , cmdListAsm , NULL, + "listasm {la}\t\t list assembler code for the current C line\n" + }, + { "la" , cmdListAsm , NULL, NULL }, + { "ls" , cmdListSymbols , completionCmdListSymbols, "ls,lf,lm\t\t list symbols,functions,modules\n" }, + { "lf" , cmdListFunctions, completionCmdListSymbols, NULL }, + { "lm" , cmdListModules , completionCmdListSymbols, NULL }, + { "list" , cmdListSrc , completionCmdSetUserBp/*same as "break"*/, + "{l}ist\t\t\t [LINE | FILE:LINE | FILE:FUNCTION | FUNCTION]\n" + }, + { "l" , cmdListSrc , completionCmdSetUserBp/*same as "break"*/, NULL }, + { "show" , cmdShow , completionCmdShow, + "show" + " \t copying & distribution terms, warranty\n" + }, + { "set" , cmdSetOption , completionCmdSetOption, "set \t\t toggle between c/asm.\nset variable = >value\t\tset variable to new value\n" }, + { "stepi" , cmdStepi , NULL, + "stepi\t\t\tStep one instruction exactly.\n" + }, + { "step" , cmdStep , NULL, + "{s}tep\t\t\tStep program until it reaches a different source line.\n" + }, + { "source" , cmdSource , completionCmdSource, + "source \t\t\tRead commands from a file named FILE.\n" + }, + { "s" , cmdStep , NULL, NULL }, + { "nexti" , cmdNexti , NULL, + "nexti\t\t\tStep one instruction, but proceed through subroutine calls.\n" + }, + { "next" , cmdNext , NULL, + "{n}ext\t\t\tStep program, proceeding through subroutine calls.\n" + }, + { "n" , cmdNext , NULL, NULL }, + { "run" , cmdRun , NULL, + "{r}un\t\t\tStart debugged program. \n" + }, + { "r" , cmdRun , NULL, NULL }, + { "ptype" , cmdPrintType , completionCmdPrintType, + "{pt}ype \tprint type information of a variable\n" + }, + { "pt" , cmdPrintType , NULL, NULL }, + { "print" , cmdPrint , completionCmdPrintType, + "{p}rint \t print value of given variable\n" + }, + { "output" , cmdOutput , completionCmdPrint/*same as "print"*/, + "output \t print value of given variable without $ and newline \n" + }, + { "p" , cmdPrint , completionCmdPrintType, NULL }, + { "file" , cmdFile , completionCmdFile, + "file \t\t load symbolic information from \n" + }, + { "frame" , cmdFrame , NULL, + "{fr}ame\t\t print information about the current Stack\n" + }, + { "finish" , cmdFinish , NULL, + "{fi}nish\t\t execute till return of current function\n" + }, + { "fi" , cmdFinish , NULL, NULL }, + { "where" , cmdWhere , NULL, "where\t\t print stack\n" }, + { "fr" , cmdFrame , NULL, NULL }, + { "f" , cmdFrame , NULL, NULL }, + { "x /i" , cmdDisasm1 , NULL, "x\t\t disassemble one asm command\n" }, + { "!" , cmdSimulator , NULL, + "!\t send a command directly to the simulator\n" + }, + { "." , cmdSimulator , NULL, + ".{cmd}\t switch from simulator or debugger command mode\n" + }, + { "help" , cmdHelp , NULL, + "{h|?}elp\t [CMD_NAME | 0,1,2,3(help page)] (general help or specific help)\n" + }, + { "?" , cmdHelp , NULL, NULL }, + { "h" , cmdHelp , NULL, NULL }, + + { "quit" , cmdQuit , NULL, + "{q}uit\t\t\t \"Watch me now. Iam going Down. My name is Bobby Brown\"\n" + }, + { "q" , cmdQuit , NULL, NULL } +}; + +/*-----------------------------------------------------------------*/ +/* trimming functions */ +/*-----------------------------------------------------------------*/ +char *trim_left(char *s) +{ + while (isspace(*s)) + ++s; + + return s; +} + +char *trim_right(char *s) +{ + char *p = &s[strlen(s) - 1]; + + while (p >= s && isspace(*p)) + --p; + *++p = '\0'; + + return s; +} + +char *trim(char *s) +{ + return trim_right(trim_left(s)); +} + +/*-----------------------------------------------------------------*/ +/* gc_strdup - make a string duplicate garbage collector aware */ +/*-----------------------------------------------------------------*/ +char *gc_strdup(const char *s) +{ + char *ret; + ret = Safe_malloc(strlen(s)+1); + strcpy(ret, s); + return ret; +} + +/*-----------------------------------------------------------------*/ +/* alloccpy - allocate copy and return a new string */ +/*-----------------------------------------------------------------*/ +char *alloccpy ( char *s, int size) +{ + char *d; + + if (!size) + return NULL; + + d = Safe_malloc(size+1); + memcpy(d,s,size); + d[size] = '\0'; + + return d; +} + +/*-----------------------------------------------------------------*/ +/* resize - resizes array of type with new size */ +/*-----------------------------------------------------------------*/ +void **resize (void **array, int newSize) +{ + void **vptr; + + if (array) + vptr = Safe_realloc(array,newSize*(sizeof(void **))); + else + vptr = calloc(1, sizeof(void **)); + + if (!vptr) { + fprintf(stderr,"sdcdb: out of memory \n"); + exit(1); + } + + return vptr; + +} + +/*-----------------------------------------------------------------*/ +/* readCdb - reads the cdb files & puts the records into cdbLine */ +/* linked list */ +/*-----------------------------------------------------------------*/ +static int readCdb (FILE *file) +{ + cdbrecs *currl ; + char buffer[1024]; + char *bp ; + + if (!(bp = fgets(buffer,sizeof(buffer),file))) + return 0; + + currl = Safe_calloc(1,sizeof(cdbrecs)); + recsRoot = currl ; + + while (1) { + + /* make sure this is a cdb record */ + if (strchr("STLFM",*bp) && *(bp+1) == ':') { + /* depending on the record type */ + + switch (*bp) { + case 'S': + /* symbol record */ + currl->type = SYM_REC; + break; + case 'T': + currl->type = STRUCT_REC; + break; + case 'L': + currl->type = LNK_REC; + break; + case 'F': + currl->type = FUNC_REC; + break; + case 'M': + currl->type = MOD_REC ; + } + + bp += 2; + currl->line = Safe_malloc(strlen(bp)); + strncpy(currl->line,bp,strlen(bp)-1); + currl->line[strlen(bp)-1] = '\0'; + } + + if (!(bp = fgets(buffer,sizeof(buffer),file))) + break; + + if (feof(file)) + break; + + currl->next = Safe_calloc(1,sizeof(cdbrecs)); + currl = currl->next; + } + + return (recsRoot->line ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* searchDirsFname - search directory list & return the filename */ +/*-----------------------------------------------------------------*/ +char *searchDirsFname (char *fname) +{ + char *dirs , *sdirs; + FILE *rfile = NULL; + char buffer[128]; + + /* first try the current directory */ + if ((rfile = fopen(fname,"r"))) { + fclose(rfile); + return strdup(fname) ; + } + + if (!ssdirl) + return strdup(fname); + + /* make a copy of the source directories */ + dirs = sdirs = strdup(ssdirl); + + /* assume that the separator is ':' + and try for each directory in the search list */ + dirs = strtok(dirs,":"); + while (dirs) { + if (dirs[strlen(dirs)] == '/') + sprintf(buffer,"%s%s",dirs,fname); + else + sprintf(buffer,"%s/%s",dirs,fname); + if ((rfile = fopen(buffer,"r"))) + break ; + dirs = strtok(NULL,":"); + } + + free(sdirs); + if (rfile) { + fclose(rfile); + return strdup(buffer); + } else + return strdup(fname); +} + +/*-----------------------------------------------------------------*/ +/* searchDirsFopen - go thru list of directories for filename given*/ +/*-----------------------------------------------------------------*/ +FILE *searchDirsFopen(char *fname) +{ + char *dirs , *sdirs; + FILE *rfile = NULL; + char buffer[128]; + + /* first try the current directory */ + if ((rfile = fopen(fname,"r"))) + return rfile; + + if (!ssdirl) + return NULL; + /* make a copy of the source directories */ + dirs = sdirs = strdup(ssdirl); + + /* assume that the separator is ':' + and try for each directory in the search list */ + dirs = strtok(dirs,":"); + while (dirs) { + sprintf(buffer,"%s/%s",dirs,fname); + if ((rfile = fopen(buffer,"r"))) + break ; + dirs = strtok(NULL,":"); + } + + free(sdirs); + return rfile ; + +} + +/*-----------------------------------------------------------------*/ +/* loadFile - loads a file into module buffer */ +/*-----------------------------------------------------------------*/ +srcLine **loadFile (char *name, int *nlines) +{ + FILE *mfile ; + char buffer[512]; + char *bp; + srcLine **slines = NULL; + + + if (!(mfile = searchDirsFopen(name))) { + fprintf(stderr,"sdcdb: cannot open module %s -- use '--directory= option\n",name); + return NULL; + } + + while ((bp = fgets(buffer,sizeof(buffer),mfile))) { + (*nlines)++; + + slines = (srcLine **)resize((void **)slines,*nlines); + + slines[(*nlines)-1] = Safe_calloc(1,sizeof(srcLine)); + slines[(*nlines)-1]->src = alloccpy(bp,strlen(bp)); + slines[(*nlines)-1]->addr= INT_MAX; + } + + fclose(mfile); + return slines; +} + + +/*-----------------------------------------------------------------*/ +/* loadModules - reads the source files into module structure */ +/*-----------------------------------------------------------------*/ +static void loadModules (void) +{ + cdbrecs *loop; + module *currMod; + char *rs; + + /* go thru the records & find out the module + records & load the modules specified */ + for ( loop = recsRoot ; loop ; loop = loop->next ) { + + switch (loop->type) { + /* for module records do */ + case MOD_REC: + currMod = parseModule(loop->line, TRUE); + currModName = currMod->name ; + + currMod->cfullname = searchDirsFname(currMod->c_name); + + /* load it into buffer */ + currMod->cLines = loadFile (currMod->c_name, + &currMod->ncLines); + + /* do the same for the assembler file */ + currMod->afullname = searchDirsFname(currMod->asm_name); + currMod->asmLines=loadFile (currMod->asm_name, + &currMod->nasmLines); + break; + + /* if this is a function record */ + case FUNC_REC: + parseFunc(loop->line); + break; + + /* if this is a structure record */ + case STRUCT_REC: + parseStruct(loop->line); + break; + + /* if symbol then parse the symbol */ + case SYM_REC: + parseSymbol(loop->line,&rs,2); + break; + + case LNK_REC: + parseLnkRec(loop->line); + break; + } + } +} + +/*-----------------------------------------------------------------*/ +/* generate extra sets of sfr and sbit symbols */ +/*-----------------------------------------------------------------*/ +static void specialFunctionRegs (void) +{ + symbol *sym; + for (sym = setFirstItem(symbols); + sym ; + sym = setNextItem(symbols)) + { + if ( sym->addrspace == 'I' || + sym->addrspace == 'J') + { + addSet(&sfrsymbols,sym); + } + } +} +/*-----------------------------------------------------------------*/ +/* functionPoints - determine the execution points within a func */ +/*-----------------------------------------------------------------*/ +static void functionPoints (void) +{ + function *func; + symbol *sym; + exePoint *ep ; + + // add _main dummy for runtime env + if ((func = needExtraMainFunction())) + { + function *func1; + + /* alloc new _main function */ + func1 = Safe_calloc(1,sizeof(function)); + *func1 = *func; + func1->sym = Safe_calloc(1,sizeof(symbol)); + *func1->sym = *func->sym; + func1->sym->name = alloccpy("_main",5); + func1->sym->rname = alloccpy("G$_main$0$",10); + /* TODO must be set by symbol information */ + func1->sym->addr = 0; + func1->sym->eaddr = 0x2f; + addSet(&functions,func1); + } + + /* for all functions do */ + for ( func = setFirstItem(functions); func; + func = setNextItem(functions)) { + int j ; + module *mod; + + sym = func->sym; + + Dprintf(D_sdcdb, ("sdcdb: func '%s' has entry '0x%x' exit '0x%x'\n", + func->sym->name, + func->sym->addr, + func->sym->eaddr)); + + if (!func->sym->addr && !func->sym->eaddr) + continue ; + + /* for all source lines in the module find + the ones with address >= start and <= end + and put them in the point */ + mod = NULL ; + if (! applyToSet(modules,moduleWithName,func->modName,&mod)) + continue ; + func->mod = mod ; + func->entryline= INT_MAX-2; + func->exitline = 0; + func->aentryline = INT_MAX-2 ; + func->aexitline = 0; + + /* do it for the C Lines first */ + for ( j = 0 ; j < mod->ncLines ; j++ ) { + if (mod->cLines[j]->addr < INT_MAX && + mod->cLines[j]->addr >= sym->addr && + mod->cLines[j]->addr <= sym->eaddr ) { + + + /* add it to the execution point */ + if (func->entryline > j) + func->entryline = j; + + if (func->exitline < j) + func->exitline = j; + + ep = Safe_calloc(1,sizeof(exePoint)); + ep->addr = mod->cLines[j]->addr ; + ep->line = j; + ep->block= mod->cLines[j]->block; + ep->level= mod->cLines[j]->level; + addSet(&func->cfpoints,ep); + } + } + /* check double line execution points of module */ + for (ep = setFirstItem(mod->cfpoints); ep; + ep = setNextItem(mod->cfpoints)) + { + if (ep->addr >= sym->addr && + ep->addr <= sym->eaddr ) + { + addSet(&func->cfpoints,ep); + } + } + /* do the same for asm execution points */ + for ( j = 0 ; j < mod->nasmLines ; j++ ) { + if (mod->asmLines[j]->addr < INT_MAX && + mod->asmLines[j]->addr >= sym->addr && + mod->asmLines[j]->addr <= sym->eaddr ) { + + exePoint *ep ; + /* add it to the execution point */ + if (func->aentryline > j) + func->aentryline = j; + + if (func->aexitline < j) + func->aexitline = j; + + /* add it to the execution point */ + ep = Safe_calloc(1,sizeof(exePoint)); + ep->addr = mod->asmLines[j]->addr ; + ep->line = j; + addSet(&func->afpoints,ep); + } + } + if ( func->entryline == INT_MAX-2 ) + func->entryline = 0; + if ( func->aentryline == INT_MAX-2 ) + func->aentryline = 0; + +#ifdef SDCDB_DEBUG + if (!( D_sdcdb & sdcdbDebug)) + continue; + + Dprintf(D_sdcdb, ("sdcdb: function '%s' has the following C exePoints\n", + func->sym->name)); + { + exePoint *ep; + + for (ep = setFirstItem(func->cfpoints); ep; + ep = setNextItem(func->cfpoints)) + Dprintf(D_sdcdb, ("sdcdb: {0x%x,%d} %s", + ep->addr,ep->line+1,mod->cLines[ep->line]->src)); + + Dprintf(D_sdcdb, ("sdcdb: and the following ASM exePoints\n")); + for (ep = setFirstItem(func->afpoints); ep; + ep = setNextItem(func->afpoints)) + Dprintf (D_sdcdb, ("sdcdb: {0x%x,%d} %s", + ep->addr,ep->line+1,mod->asmLines[ep->line]->src)); + } +#endif + } +} + + +/*-----------------------------------------------------------------*/ +/* setEntryExitBP - set the entry & exit Break Points for functions*/ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(setEntryExitBP) +{ + function *func = item; + + if (func->sym && func->sym->addr && func->sym->eaddr) { + + /* set the entry break point */ + setBreakPoint (func->sym->addr , CODE , FENTRY , + fentryCB ,func->mod->c_name , func->entryline); + + /* set the exit break point */ + setBreakPoint (func->sym->eaddr , CODE , FEXIT , + fexitCB ,func->mod->c_name , func->exitline ); + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdFile - load file into the debugger */ +/*-----------------------------------------------------------------*/ +int cmdFile (char *s,context *cctxt) +{ + FILE *cdbFile; + char buffer[128]; + char *bp; + + s = trim_left(s); + + if (!*s) { + fprintf(stdout,"No exec file now.\nNo symbol file now.\n"); + return 0; + } + + sprintf(buffer,"%s.cdb",s); + /* try creating the cdbfile */ + if (!(cdbFile = searchDirsFopen(buffer))) { + fprintf(stdout,"Cannot open file\"%s\", no symbolic information loaded\n",buffer); + // return 0; + } + + /* allocate for context */ + currCtxt = Safe_calloc(1,sizeof(context)); + + if (cdbFile) { + /* readin the debug information */ + if (!readCdb (cdbFile)) { + fprintf(stdout,"No symbolic information found in file %s.cdb\n",s); + //return 0; + } + } + + /* parse and load the modules required */ + loadModules(); + + /* determine the execution points for this + module */ + functionPoints(); + + /* extract known special function registers */ + specialFunctionRegs(); + + /* start the simulator & setup connection to it */ +#ifdef _WIN32 + if (INVALID_SOCKET == sock) +#else + if ( sock == -1 ) +#endif + openSimulator((char **)simArgs,nsimArgs); + fprintf(stdout,"%s",simResponse()); + /* now send the filename to be loaded to the simulator */ + sprintf(buffer,"%s.ihx",s); + bp=searchDirsFname(buffer); + simLoadFile(bp); + free(bp); + + /*set the break points + required by the debugger . i.e. the function entry + and function exit break points */ + applyToSet(functions,setEntryExitBP); + + setMainContext(); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdSource - read commands from file */ +/*-----------------------------------------------------------------*/ +int cmdSource (char *s, context *cctxt) +{ + FILE *cmdfile; + + s = trim(s); + + if (!( cmdfile = searchDirsFopen(s))) + { + fprintf(stderr,"commandfile '%s' not found\n",s); + return 0; + } + commandLoop( cmdfile ); + fclose( cmdfile ); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cmdHelp - help command */ +/*-----------------------------------------------------------------*/ +int cmdHelp (char *s, context *cctxt) +{ + int i ; + int endline = 999; + int startline = 0; + + s = trim_left(s); + + if (isdigit(*s)) { + endline = ((*s - '0') * 20) + 20; + if (endline > 0) + startline = endline - 20; + } + else if (*s) + { + for (i = 0 ; i < (sizeof(cmdTab)/sizeof(struct cmdtab)) ; i++) + { + if ((cmdTab[i].htxt) && !strcmp(cmdTab[i].cmd,s)) + { + s = strrchr(cmdTab[i].htxt,'\t'); + if ( !s ) + s = cmdTab[i].htxt; + else + s++; + fprintf(stdout,"%s",s); + break; + } + } + return 0; + } + + for (i = 0 ; i < (sizeof(cmdTab)/sizeof(struct cmdtab)) ; i++) { + + /* command string matches */ + + if ((cmdTab[i].htxt) && (i >= startline)) + fprintf(stdout,"%s",cmdTab[i].htxt); + if (i == endline) + break; + } + + return 0; +} + +#define MAX_CMD_LEN 512 +static char cmdbuff[MAX_CMD_LEN]; +static int sim_cmd_mode = 0; + +/*----------------------------------------------------------------- + interpretCmd - interpret and do the command. Return 0 to continue, + return 1 to exit program. +|-----------------------------------------------------------------*/ +int interpretCmd (char *s) +{ + static char *pcmd = NULL; + int i ; + int rv = 0 ; + + /* if nothing & previous command exists then + execute the previous command again */ + if (*s == '\n' && pcmd) + strcpy(s,pcmd); + + /* if previous command exists & is different + from the current command then copy it */ + if (pcmd) { + if (strcmp(pcmd,s)) { + free(pcmd); + pcmd = strdup(s); + } + } else + pcmd = strdup(s); + + /* trim trailing blanks */ + s = trim_right(s); + + if (sim_cmd_mode) { + if (strcmp(s,".") == 0) { + sim_cmd_mode = 0; + return 0; + } + else if (s[0] == '.') { + /* kill the preceeding '.' and pass on as SDCDB command */ + char *s1 = s+1; + char *s2 = s; + while (*s1 != 0) + *s2++ = *s1++; + *s2 = 0; + } else { + cmdSimulator (s, currCtxt); + return 0; + } + } else { + if (strcmp(s,".") ==0) { + sim_cmd_mode = 1; + return 0; + } + } + + for (i = 0 ; i < (sizeof(cmdTab)/sizeof(struct cmdtab)) ; i++) { + + /* command string matches */ + if (strncmp(s,cmdTab[i].cmd,strlen(cmdTab[i].cmd)) == 0) { + if (!cmdTab[i].cmdfunc) + return 1; + + rv = (*cmdTab[i].cmdfunc)(s + strlen(cmdTab[i].cmd),currCtxt); + + /* if full name then give the file name & position */ + if (fullname && showfull && currCtxt && currCtxt->func) { + showfull = 0; + if (srcMode == SRC_CMODE) + fprintf(stdout,"\032\032%s:%d:1:beg:0x%08x\n", + currCtxt->func->mod->cfullname, + currCtxt->cline+1,currCtxt->addr); + else + fprintf(stdout,"\032\032%s:%d:1:beg:0x%08x\n", + currCtxt->func->mod->afullname, + currCtxt->asmline,currCtxt->addr); + displayAll(currCtxt); + } + goto ret; + } + } + + fprintf(stdout,"Undefined command: \"%s\". Try \"help\".\n",s); + ret: + return rv; +} + +static FILE *actualcmdfile=NULL ; +static char *actualcmds=NULL; +static int stopcmdlist; +/*-----------------------------------------------------------------*/ +/* getNextCmdLine get additional lines used by special commands */ +/*-----------------------------------------------------------------*/ +char *getNextCmdLine(void) +{ + //fprintf(stderr,"getNextCmdLine() actualcmdfile=%p\n",actualcmdfile); + if (!actualcmdfile) + return NULL; + fprintf(stdout,">"); + fflush(stdout); + if (fgets(cmdbuff,sizeof(cmdbuff),actualcmdfile) == NULL) + { + // fprintf(stderr,"getNextCmdLine() returns null\n"); + return NULL; + } + //fprintf(stderr,"getNextCmdLine() returns: %s",cmdbuff); + return cmdbuff; +} + +void setCmdLine( char *cmds ) +{ + actualcmds = cmds; +} + +void stopCommandList() +{ + stopcmdlist = 1; +} + +#ifdef HAVE_READLINE_COMPLETITION +// helper function for doing readline completion. +// input: toknum=index of token to find (0=first token) +// output: *start=first character index of the token, +// or the index of '\0' +// *end=first blank character right after the token, +// or the index of '\0' +// return value: 0=token not found, 1=token found +int completionHelper_GetTokenNumber(int toknum, int *start, int *end) +{ + int tok_index; + const char *p = rl_line_buffer; + + tok_index = 0; + *start = *end = 0; + while (p[*end] != 0) + { + // start = skip blanks from end + *start = *end; + while (p[*start] && isspace( p[*start] )) + (*start)++; + + // end = skip non-blanks from start + *end = *start; + while (p[*end] && !isspace( p[*end] )) + (*end)++; + + if (tok_index == toknum) + return 1; // found + + tok_index++; + } + + return 0; // not found +} + +// helper function for doing readline completion. +// returns the token number that we were asked to complete. +// 0=first token (command name), 1=second token... +int completionHelper_GetCurrTokenNumber() +{ + int toknum, start, end; + + toknum = start = end = 0; + while (1) + { + if (!completionHelper_GetTokenNumber(toknum, &start, &end)) + return toknum; + + if (rl_point <= end) + return toknum; + + toknum++; + } +} + +// exapmle for vallist on entry: +// "copying\0warranty\0"; +char *completionCompleteFromStrList(const char *text, int state, char *vallist) +{ + static char *ptr; + int len; + + if (state == 0) + ptr = vallist; + else + ptr += strlen(ptr)+1; + + len = strlen(text); + while (*ptr) + { + if ( (len < strlen(ptr)) && + !strncmp(text, ptr, len) ) + return strdup(ptr); + + ptr += strlen(ptr)+1; + } + + return NULL; +} + +// readline library completion function. +// completes from the list of all sdcdb command. +char *completionCommandsList(const char *text, int state) +{ + static int i = 0; + + if (state == 0) // new completion? + { // yes, only complete if this is the first token on the line. + int ok = 0; // try to complete this request? + char *p = rl_line_buffer; + + // skip blanks + while (p && isspace(*p)) + { + if (p-rl_line_buffer == rl_point) + ok = 1; + p++; + } + + while (p && !isspace(*p)) + { + if (p-rl_line_buffer == rl_point) + ok = 1; + p++; + } + + if (p-rl_line_buffer == rl_point) + ok = 1; + + if ( !ok ) + return NULL; // no more completions + + i = 0; // ok, gonna complete. initialize static variable. + } + else i++; + + for (; i < (sizeof(cmdTab)/sizeof(struct cmdtab)) ; i++) + { + int len = strlen(text); + if (len <= strlen(cmdTab[i].cmd)) + { + if (strncmp(text,cmdTab[i].cmd,len) == 0) + return strdup(cmdTab[i].cmd); + } + } + + return NULL; // no more completions +} + +// readline library completion function. +// completes from the list of symbols. +char *completionSymbolName(const char *text, int state) +{ + static symbol *sy; + + if (state == 0) // new completion? + sy = setFirstItem(symbols); // yes + else + sy = setNextItem(symbols); + + for (; sy != NULL; ) + { + int len = strlen(text); + if (len <= strlen(sy->name)) + { + if (strncmp(text,sy->name,len) == 0) + return strdup(sy->name); + } + + sy = setNextItem(symbols); + } + return NULL; +} + +// readline library completion function. +// completes from the list known functions. +// module_flag - if false, ignore function module name +// if true, compare against module_name:fnction_name +char *completionFunctionName(const char *text, int state, int module_flag) +{ + static function *f; + + if (state == 0) // new completion? + f = setFirstItem(functions); // yes + else + f = setNextItem(functions); + + for (; f != NULL; ) + { + int text_len = strlen(text); + + if (!module_flag) + { + if (text_len <= strlen(f->sym->name) && + !strncmp(text,f->sym->name,text_len)) + return strdup(f->sym->name); + } + else + { + int modname_len = strlen(f->mod->c_name); + int funcname_len = strlen(f->sym->name); + char *functext = malloc(modname_len+funcname_len+2); + //assert(functext); + strcpy(functext,f->mod->c_name); + strcat(functext,":"); + strcat(functext,f->sym->name); + if (text_len <= strlen(functext) && + !strncmp(text,functext,text_len)) + return functext; + else + free(functext); + } + f = setNextItem(functions); + } + return NULL; +} + +// readline library completion function. +// completes from the list known modules. +char *completionModuleName(const char *text, int state) +{ + static module *m; + + if (state == 0) // new completion? + m = setFirstItem(modules); // yes + else + m = setNextItem(modules); + + for (; m != NULL; ) + { + int len = strlen(text); + if ( (len <= strlen(m->c_name)) && + !strncmp(text,m->c_name,len) ) + return strdup(m->c_name); + + if ( (len <= strlen(m->asm_name)) && + (strncmp(text,m->asm_name,len) == 0) ) + return strdup(m->asm_name); + + m = setNextItem(modules); + } + return NULL; +} + +// readline completion function for "file" command +char *completionCmdFile(const char *text, int state) +{ + if (state == 0) + { + if (completionHelper_GetCurrTokenNumber() != 1) + return NULL; + } + + // we use filename_completion_function() from the readline library. + return rl_filename_completion_function(text, state); +} + +// readline completion function for "source" command +char *completionCmdSource(const char *text, int state) +{ + return completionCmdFile(text, state); +} + +// readline completion function for "info" command +char *completionCmdInfo(const char *text, int state) +{ + static char *ptr; + + if (state == 0) + { + if (completionHelper_GetCurrTokenNumber() != 1) + return NULL; + } + + return completionCompleteFromStrList(text, state, + "break\0stack\0frame\0registers\0all-registers\0" + "line\0source\0functions\0symbols\0variables\0"); +} + +// readline completion function for "show" command +char *completionCmdShow(const char *text, int state) +{ + static char *ptr; + + if (state == 0) + { + if (completionHelper_GetCurrTokenNumber() != 1) + return NULL; + } + return completionCompleteFromStrList(text, state, "copying\0warranty\0"); +} + +// readline completion function for "la" command +char *completionCmdListSymbols(const char *text, int state) +{ + static char *ptr; + + if (state == 0) + { + if (completionHelper_GetCurrTokenNumber() != 1) + return NULL; + } + return completionCompleteFromStrList(text, state, "v1\0v2\0"); +} + +char *completionCmdPrintType(const char *text, int state) +{ + if (state == 0) + { + if (completionHelper_GetCurrTokenNumber() != 1) + return NULL; + } + return completionSymbolName(text, state); +} + +char *completionCmdPrint(const char *text, int state) +{ + if (state == 0) + { + int i = completionHelper_GetCurrTokenNumber(); + if (i != 1 && i != 2) + return NULL; + } + return completionSymbolName(text, state); +} + +char *completionCmdDelUserBp(const char *text, int state) +{ + static breakp *bp; + static int k; + + if (state == 0) + { + if (completionHelper_GetCurrTokenNumber() != 1) + return NULL; + + if (!userBpPresent) + return NULL; + + bp = hTabFirstItem(bptable,&k); + } + else + bp = hTabNextItem(bptable,&k); + + for ( ; bp ; bp = hTabNextItem(bptable,&k)) + { + if (bp->bpType == USER || bp->bpType == TMPUSER) + { + char buff[20]; + sprintf(buff, "%d", bp->bpnum); + return strdup(buff); + } + } + + return NULL; +} + +// readline completion function for "undisplay" command +char *completionCmdUnDisplay(const char *text, int state) +{ + static dsymbol *dsym; + + if (state == 0) + { + if (completionHelper_GetCurrTokenNumber() != 1) + return NULL; + dsym = setFirstItem(dispsymbols); + } + + if (dsym) + { + char buff[30]; + sprintf(buff, "%d", dsym->dnum); + dsym = setNextItem(dispsymbols); + return strdup(buff); + } + return NULL; +} + +char *completionCmdSetUserBp(const char *text, int state) +{ + static int internal_state; // 0=calling completionFunctionName(text, state, 0) + // 1=calling completionFunctionName(text, 1, 1) + if (state == 0) + { + if (completionHelper_GetCurrTokenNumber() != 1) + return NULL; + + internal_state = 0; + } + if (internal_state == 0) + { + char *p = completionFunctionName(text, state, 0); + if (p) + return p; + internal_state = 1; + return completionFunctionName(text, 0, 1); + } + else + { + return completionFunctionName(text, 1, 1); + } +} + +char *completionCmdSetOption(const char *text, int state) +{ + static char *ptr; + static int currtok; + + if (state == 0) + { + int start,end; + + currtok = completionHelper_GetCurrTokenNumber(); + + if (currtok == 2 || currtok == 3) + { + // make sure token 1 == "variable" + completionHelper_GetTokenNumber(1, &start, &end); + if (end - start != 8 || + strncmp(rl_line_buffer+start,"variable",8)) + return NULL; + } + else if (currtok != 1) + { + return NULL; + } + } + + switch (currtok) + { + case 1: + return completionCompleteFromStrList(text, state, +#ifdef SDCDB_DEBUG + "debug\0" +#endif + "srcmode\0listsize\0variable\0"); + case 2: + return completionSymbolName(text, state); + + case 3: + return completionCompleteFromStrList(text, state, "=\0"); + } +} + +// our main readline completion function +// calls the other completion functions as needed. +char *completionMain(const char *text, int state) +{ + static rl_compentry_func_t *compl_func; + int i, start, end, len; + + if (state == 0) // new completion? + { + compl_func = NULL; + + if (completionHelper_GetCurrTokenNumber() == 0) + compl_func = &completionCommandsList; + else + { // not completing first token, find the right completion + // function according to the first token the user typed. + completionHelper_GetTokenNumber(0, &start, &end); + len = end-start; + + for (i=0; i < (sizeof(cmdTab)/sizeof(struct cmdtab)) ; i++) + { + if (!strncmp(rl_line_buffer+start,cmdTab[i].cmd,len) && + cmdTab[i].cmd[len] == '\0') + { + compl_func = cmdTab[i].completion_func; + break; + } + } + } + if (!compl_func) + return NULL; + } + + return (*compl_func)(text,state); +} +#endif /* HAVE_READLINE_COMPLETITION */ + +/*-----------------------------------------------------------------*/ +/* commandLoop - the main command loop or loop over command file */ +/*-----------------------------------------------------------------*/ +static void commandLoop(FILE *cmdfile) +{ + char *line, save_ch, *s; + char *line_read; + +#ifdef HAVE_LIBREADLINE + FILE *old_rl_instream, *old_rl_outstream; + actualcmdfile = cmdfile; + +#ifdef HAVE_READLINE_COMPLETITION + rl_completion_entry_function = completionMain; +#endif /* HAVE_READLINE_COMPLETITION */ + rl_readline_name = "sdcdb"; // Allow conditional parsing of the ~/.inputrc file. + + // save readline's input/output streams + // this is done to support nested calls to commandLoop() + // i wonder if it works... + old_rl_instream = rl_instream; + old_rl_outstream = rl_outstream; + + // set new streams for readline + if ( cmdfile == stdin ) + rl_instream = rl_outstream = NULL; // use stdin/stdout pair + else + rl_instream = rl_outstream = cmdfile; + + while (1) + { + if ( cmdfile == stdin ) + { + if (sim_cmd_mode) + line_read = (char*)readline ("(sim) "); + else + line_read = (char*)readline ("(sdcdb) "); + } + else + line_read = (char*)readline (""); + + if (line_read) + { + /* If the line has any text in it, + save it on the history. */ + if (line_read && *line_read) + add_history (line_read); + + // FIX: readline returns malloced string. + // should check the source to verify it can be used + // directly. for now - just copy it to cmdbuff. + strcpy(cmdbuff,line_read); +#if defined(_WIN32) || defined(HAVE_RL_FREE) + rl_free(line_read); +#else + free(line_read); +#endif + line_read = NULL; + } + else + break; // EOF +#else + actualcmdfile = cmdfile; + + while (1) + { + if ( cmdfile == stdin ) + { + if (sim_cmd_mode) + printf("(sim) "); + else + fprintf(stdout,"(sdcdb) "); + fflush(stdout); + } + //fprintf(stderr,"commandLoop actualcmdfile=%p cmdfile=%p\n", + // actualcmdfile,cmdfile); + if (fgets(cmdbuff,sizeof(cmdbuff),cmdfile) == NULL) + break; +#endif /* HAVE_LIBREADLINE */ + + if (interpretCmd(cmdbuff)) + break; + + while ( actualcmds ) + { + strcpy(cmdbuff,actualcmds); + actualcmds = NULL; + stopcmdlist= 0; + for ( line = cmdbuff; *line ; line = s ) + { + if ( (s=strchr(line ,'\n'))) + { + save_ch = *++s; + *s = '\0'; + } + else + { + s += strlen( line ); + save_ch = '\0'; + } + if (interpretCmd( line )) + { + *s = save_ch; + break; + } + *s = save_ch; + if ( stopcmdlist ) + break; + } + } + } +#ifdef HAVE_LIBREADLINE + // restore readline's input/output streams + rl_instream = old_rl_instream; + rl_outstream = old_rl_outstream; +#endif /* HAVE_LIBREADLINE */ +} + +/*-----------------------------------------------------------------*/ +/* printVersionInfo - print the version information */ +/*-----------------------------------------------------------------*/ +static void printVersionInfo() +{ + fprintf(stdout, + "SDCDB is free software and you are welcome to distribute copies of it\n" + "under certain conditions; type \"show copying\" to see the conditions.\n" + "There is absolutely no warranty for SDCDB; type \"show warranty\" for details.\n" + "SDCDB 0.8 . Copyright (C) 1999 Sandeep Dutta (sandeep.dutta@usa.net)\n" + "Type ? for help\n"); + +} + +/*-----------------------------------------------------------------*/ +/* parseCmdLine - parse the commandline arguments */ +/*-----------------------------------------------------------------*/ +static void parseCmdLine (int argc, char **argv) +{ + int i ; + char *filename = NULL; + int passon_args_flag = 0; /* if true, pass on args to simulator */ + + Dprintf(D_sdcdb, ("sdcdb: parseCmdLine\n")); + contsim=0; + + for ( i = 1; i < argc ; i++) { + //fprintf(stdout,"%s\n",argv[i]); + + if (passon_args_flag) { /* if true, pass on args to simulator */ + simArgs[nsimArgs++] = strdup(argv[i]); + continue; + } + + /* if this is an option */ + if (argv[i][0] == '-') { + + /* if directory then mark directory */ + if (strncmp(argv[i],"--directory=",12) == 0) { + if (!ssdirl) + ssdirl = &argv[i][12]; + else { + char *p = Safe_malloc(strlen(ssdirl)+strlen(&argv[i][12])+2); + strcat(strcat(strcpy(p,&argv[i][12]),":"),ssdirl); + ssdirl = p; + } + continue; + } + + if (strncmp(argv[i],"-fullname",9) == 0) { + fullname = TRUE; + continue; + } + + if (strcmp(argv[i],"-cd") == 0) { + i++; + chdir(argv[i]); + continue; + } + + if (strncmp(argv[i],"-cd=",4) == 0) { + chdir(argv[i][4]); + continue; + } + +#ifdef SDCDB_DEBUG + if (strncmp(argv[i],"-d=",3) == 0) { + sdcdbDebug = strtol(&argv[i][3],0,0); + continue; + } +#endif + if (strncmp(argv[i],"-contsim",8) == 0) { + contsim=1; + continue; + } + if (strncmp(argv[i],"-q",2) == 0) { + continue; + } + + /* model string */ + if (strncmp(argv[i],"-m",2) == 0) { + strncpy(model_str, &argv[i][2], 15); + if (strcmp(model_str,"avr") == 0) + simArgs[0] = "savr"; + else if (strcmp(model_str,"xa") == 0) + simArgs[0] = "sxa"; + else if (strcmp(model_str,"z80") == 0) + simArgs[0] = "sz80"; + continue ; + } + + /* -z all remaining options are for simulator */ + if (strcmp(argv[i],"-z") == 0) { + passon_args_flag = 1; + continue ; + } + + /* the simulator arguments */ + + /* cpu */ + if (strcmp(argv[i],"-t") == 0 || + strcmp(argv[i],"-cpu") == 0) { + + simArgs[nsimArgs++] = "-t"; + simArgs[nsimArgs++] = strdup(argv[++i]); + continue ; + } + + /* XTAL Frequency */ + if (strcmp(argv[i],"-X") == 0 || + strcmp(argv[i],"-frequency") == 0) { + simArgs[nsimArgs++] = "-X"; + simArgs[nsimArgs++] = strdup(argv[++i]); + continue ; + } + + /* serial port */ + if ( (strcmp(argv[i],"-S") == 0) || + (strcmp(argv[i],"-s") == 0)) { + simArgs[nsimArgs++] = strdup(argv[i]); + simArgs[nsimArgs++] = strdup(argv[++i]); + continue ; + } + + /* network serial port */ + if ( (strcmp(argv[i],"-k") == 0)) { + simArgs[nsimArgs++] = strdup(argv[i]); + simArgs[nsimArgs++] = strdup(argv[++i]); + continue ; + } + + fprintf(stderr,"unknown option %s --- ignored\n", + argv[i]); + + } else { + /* must be file name */ + if (filename) { + fprintf(stderr,"too many filenames .. parameter '%s' ignored\n", + argv[i]); + continue ; + } + + if (-1 != access(argv[i], 0)) { + /* file exists: strip the cdb or ihx externsion */ + char *p = strrchr(argv[i], '.'); + + if (NULL != p && + (0 == strcmp(p, ".cdb") || 0 == strcmp(p, ".ihx"))) + *p = '\0'; + } + filename = argv[i]; + + } + } + + if (filename) + cmdFile(filename,NULL); +} + +/*-----------------------------------------------------------------*/ +/* setsignals - catch some signals */ +/*-----------------------------------------------------------------*/ +#include +static void +bad_signal(int sig) +{ + if ( simactive ) + closeSimulator(); + exit(1); +} + +static void +sigintr(int sig) +{ + /* may be interrupt from user: stop debugger and also simulator */ + userinterrupt = 1; + if ( !nointerrupt ) + sendSim("stop\n"); +} + +#ifndef _WIN32 +/* the only child can be the simulator */ +static void sigchld(int sig) +{ + /* the only child can be the simulator */ + int status, retpid; + retpid = wait ( &status ); + /* if ( retpid == simPid ) */ + simactive = 0; +} +#endif + +static void +setsignals() +{ + signal(SIGINT , sigintr ); + signal(SIGABRT, bad_signal); + signal(SIGTERM, bad_signal); + +#ifndef _WIN32 + signal(SIGHUP , SIG_IGN); + signal(SIGCONT, SIG_IGN); + signal(SIGCHLD, sigchld ); + + signal(SIGALRM, bad_signal); + //signal(SIGFPE, bad_signal); + //signal(SIGILL, bad_signal); + signal(SIGPIPE, bad_signal); + signal(SIGQUIT, bad_signal); + //signal(SIGSEGV, bad_signal); +#endif +} + +/*-----------------------------------------------------------------*/ +/* main - */ +/*-----------------------------------------------------------------*/ + +int main ( int argc, char **argv) +{ + printVersionInfo(); + printf("WARNING: SDCDB is EXPERIMENTAL.\n"); + + simArgs[nsimArgs++] = "s51"; + simArgs[nsimArgs++] = "-P"; + simArgs[nsimArgs++] = "-r 9756"; + /* parse command line */ + + setsignals(); + parseCmdLine(argc,argv); + + commandLoop(stdin); + + return 0; +} diff --git a/debugger/mcs51/sdcdb.el b/debugger/mcs51/sdcdb.el new file mode 100644 index 0000000..6919b1c --- /dev/null +++ b/debugger/mcs51/sdcdb.el @@ -0,0 +1,650 @@ +;;; sdcdb.el --- run sdcdb under Emacs + +;; Author: W. Schelter, University of Texas +;; wfs@rascal.ics.utexas.edu +;; Rewritten by rms. +;; Keywords: c, unix, tools, debugging + +;; Some ideas are due to Masanobu. + +;; This file is part of XEmacs. + +;; XEmacs is free software; you can redistribute it and/or modify it +;; under the terms of the GNU General Public License as published by +;; the Free Software Foundation; either version 2, or (at your option) +;; any later version. + +;; XEmacs is distributed in the hope that it will be useful, but +;; WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +;; General Public License for more details. + +;; You should have received a copy of the GNU General Public License +;; along with XEmacs; see the file COPYING. If not, write to the Free +;; Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +;; 02111-1307, USA. + +;;; Synched up with: Not in FSF + +;;; Commentary: + +;; Description of SDCDB interface: + +;; A facility is provided for the simultaneous display of the source code +;; in one window, while using sdcdb to step through a function in the +;; other. A small arrow in the source window, indicates the current +;; line. + +;; Starting up: + +;; In order to use this facility, invoke the command SDCDB to obtain a +;; shell window with the appropriate command bindings. You will be asked +;; for the name of a file to run. Sdcdb will be invoked on this file, in a +;; window named *sdcdb-foo* if the file is foo. + +;; M-s steps by one line, and redisplays the source file and line. + +;; You may easily create additional commands and bindings to interact +;; with the display. For example to put the sdcdb command next on \M-n +;; (def-sdcdb next "\M-n") + +;; This causes the emacs command sdcdb-next to be defined, and runs +;; sdcdb-display-frame after the command. + +;; sdcdb-display-frame is the basic display function. It tries to display +;; in the other window, the file and line corresponding to the current +;; position in the sdcdb window. For example after a sdcdb-step, it would +;; display the line corresponding to the position for the last step. Or +;; if you have done a backtrace in the sdcdb buffer, and move the cursor +;; into one of the frames, it would display the position corresponding to +;; that frame. + +;; sdcdb-display-frame is invoked automatically when a filename-and-line-number +;; appears in the output. + +;;; Code: + +(require 'comint) +(require 'shell) + +(condition-case nil + (if (featurep 'toolbar) + (require 'eos-toolbar "sun-eos-toolbar")) + (error nil)) + +(defvar sdcdb-last-frame) +(defvar sdcdb-delete-prompt-marker) +(defvar sdcdb-filter-accumulator) +(defvar sdcdb-last-frame-displayed-p) +(defvar sdcdb-arrow-extent nil) +(or (fboundp 'make-glyph) (fset 'make-glyph 'identity)) ; work w/ pre beta v12 +(defvar sdcdb-arrow-glyph (make-glyph "=>")) + +(make-face 'sdcdb-arrow-face) +(or (face-differs-from-default-p 'sdcdb-arrow-face) + ;; Usually has a better default value than highlight does + (copy-face 'isearch 'sdcdb-arrow-face)) + +;; Hooks can side-effect extent arg to change extent properties +(defvar sdcdb-arrow-extent-hooks '()) + +(defvar sdcdb-prompt-pattern "^>\\|^(.*sdcdb[+]?) *\\|^---Type to.*--- *" + "A regexp to recognize the prompt for sdcdb or sdcdb+.") + +(defvar sdcdb-mode-map nil + "Keymap for sdcdb-mode.") + +(defvar sdcdb-toolbar nil) + +(if sdcdb-mode-map + nil + (setq sdcdb-mode-map (make-sparse-keymap)) + (set-keymap-name sdcdb-mode-map 'sdcdb-mode-map) + (set-keymap-parents sdcdb-mode-map (list comint-mode-map)) + (define-key sdcdb-mode-map "\C-l" 'sdcdb-refresh) + (define-key sdcdb-mode-map "\C-c\C-c" 'sdcdb-control-c-subjob) + (define-key sdcdb-mode-map "\t" 'comint-dynamic-complete) + (define-key sdcdb-mode-map "\M-?" 'comint-dynamic-list-completions)) + +(define-key ctl-x-map " " 'sdcdb-break) +(define-key ctl-x-map "&" 'send-sdcdb-command) + +;;Of course you may use `def-sdcdb' with any other sdcdb command, including +;;user defined ones. + +(defmacro def-sdcdb (name key &optional doc &rest forms) + (let* ((fun (intern (format "sdcdb-%s" name))) + (cstr (list 'if '(not (= 1 arg)) + (list 'format "%s %s" name 'arg) + name))) + (list 'progn + (nconc (list 'defun fun '(arg) + (or doc "") + '(interactive "p") + (list 'sdcdb-call cstr)) + forms) + (and key (list 'define-key 'sdcdb-mode-map key (list 'quote fun)))))) + +(def-sdcdb "step" "\M-s" "Step one source line with display" + (sdcdb-delete-arrow-extent)) +(def-sdcdb "stepi" "\M-i" "Step one instruction with display" + (sdcdb-delete-arrow-extent)) +(def-sdcdb "finish" "\C-c\C-f" "Finish executing current function" + (sdcdb-delete-arrow-extent)) +(def-sdcdb "run" nil "Run the current program" + (sdcdb-delete-arrow-extent)) + +;;"next" and "cont" were bound to M-n and M-c in Emacs 18, but these are +;;poor choices, since M-n is used for history navigation and M-c is +;;capitalize-word. These are defined without key bindings so that users +;;may choose their own bindings. +(def-sdcdb "next" "\C-c\C-n" "Step one source line (skip functions)" + (sdcdb-delete-arrow-extent)) +(def-sdcdb "cont" "\C-c\M-c" "Proceed with the program" + (sdcdb-delete-arrow-extent)) + +(def-sdcdb "up" "\C-c<" "Go up N stack frames (numeric arg) with display") +(def-sdcdb "down" "\C-c>" "Go down N stack frames (numeric arg) with display") + +(defvar sdcdb-display-mode nil + "Minor mode for sdcdb frame display") +(or (assq 'sdcdb-display-mode minor-mode-alist) + (setq minor-mode-alist + (purecopy + (append minor-mode-alist + '((sdcdb-display-mode " Frame")))))) + +(defun sdcdb-display-mode (&optional arg) + "Toggle SDCDB Frame display mode +With arg, turn display mode on if and only if arg is positive. +In the display minor mode, source file are displayed in another +window for repective \\[sdcdb-display-frame] commands." + (interactive "P") + (setq sdcdb-display-mode (if (null arg) + (not sdcdb-display-mode) + (> (prefix-numeric-value arg) 0)))) + +;; Using cc-mode's syntax table is broken. +(defvar sdcdb-mode-syntax-table nil + "Syntax table for SDCDB mode.") + +;; This is adapted from CC Mode 5.11. +(unless sdcdb-mode-syntax-table + (setq sdcdb-mode-syntax-table (make-syntax-table)) + ;; DO NOT TRY TO SET _ (UNDERSCORE) TO WORD CLASS! + (modify-syntax-entry ?_ "_" sdcdb-mode-syntax-table) + (modify-syntax-entry ?\\ "\\" sdcdb-mode-syntax-table) + (modify-syntax-entry ?+ "." sdcdb-mode-syntax-table) + (modify-syntax-entry ?- "." sdcdb-mode-syntax-table) + (modify-syntax-entry ?= "." sdcdb-mode-syntax-table) + (modify-syntax-entry ?% "." sdcdb-mode-syntax-table) + (modify-syntax-entry ?< "." sdcdb-mode-syntax-table) + (modify-syntax-entry ?> "." sdcdb-mode-syntax-table) + (modify-syntax-entry ?& "." sdcdb-mode-syntax-table) + (modify-syntax-entry ?| "." sdcdb-mode-syntax-table) + (modify-syntax-entry ?\' "\"" sdcdb-mode-syntax-table) + ;; add extra comment syntax + (modify-syntax-entry ?/ ". 14" sdcdb-mode-syntax-table) + (modify-syntax-entry ?* ". 23" sdcdb-mode-syntax-table)) + + +(defun sdcdb-mode () + "Major mode for interacting with an inferior Sdcdb process. +The following commands are available: + +\\{sdcdb-mode-map} + +\\[sdcdb-display-frame] displays in the other window +the last line referred to in the sdcdb buffer. See also +\\[sdcdb-display-mode]. + +\\[sdcdb-step],\\[sdcdb-next], and \\[sdcdb-nexti] in the sdcdb window, +call sdcdb to step,next or nexti and then update the other window +with the current file and position. + +If you are in a source file, you may select a point to break +at, by doing \\[sdcdb-break]. + +Commands: +Many commands are inherited from comint mode. +Additionally we have: + +\\[sdcdb-display-frame] display frames file in other window +\\[sdcdb-step] advance one line in program +\\[send-sdcdb-command] used for special printing of an arg at the current point. +C-x SPACE sets break point at current line." + (interactive) + (comint-mode) + (use-local-map sdcdb-mode-map) + (set-syntax-table sdcdb-mode-syntax-table) + (make-local-variable 'sdcdb-last-frame-displayed-p) + (make-local-variable 'sdcdb-last-frame) + (make-local-variable 'sdcdb-delete-prompt-marker) + (make-local-variable 'sdcdb-display-mode) + (make-local-variable' sdcdb-filter-accumulator) + (setq sdcdb-last-frame nil + sdcdb-delete-prompt-marker nil + sdcdb-filter-accumulator nil + sdcdb-display-mode t + major-mode 'sdcdb-mode + mode-name "Inferior SDCDB" + comint-prompt-regexp sdcdb-prompt-pattern + sdcdb-last-frame-displayed-p t) + (set (make-local-variable 'shell-dirtrackp) t) + ;;(make-local-variable 'sdcdb-arrow-extent) + (and (extentp sdcdb-arrow-extent) + (delete-extent sdcdb-arrow-extent)) + (setq sdcdb-arrow-extent nil) + ;; XEmacs change: + (make-local-hook 'kill-buffer-hook) + (add-hook 'kill-buffer-hook 'sdcdb-delete-arrow-extent nil t) + (add-hook 'comint-input-filter-functions 'shell-directory-tracker nil t) + (run-hooks 'sdcdb-mode-hook)) + +(defun sdcdb-delete-arrow-extent () + (let ((inhibit-quit t)) + (if sdcdb-arrow-extent + (delete-extent sdcdb-arrow-extent)) + (setq sdcdb-arrow-extent nil))) + +(defvar current-sdcdb-buffer nil) + +;;;###autoload +(defvar sdcdb-command-name "sdcdb" + "Pathname for executing sdcdb.") + +;;;###autoload +(defun sdcdb (path &optional corefile) + "Run sdcdb on program FILE in buffer *sdcdb-FILE*. +The directory containing FILE becomes the initial working directory +and source-file directory for SDCDB. If you wish to change this, use +the SDCDB commands `cd DIR' and `directory'." + (interactive "FRun sdcdb on file: ") + (setq path (file-truename (expand-file-name path))) + (let ((file (file-name-nondirectory path))) + (switch-to-buffer (concat "*sdcdb-" file "*")) + (setq default-directory (file-name-directory path)) + (or (bolp) (newline)) + (insert "Current directory is " default-directory "\n") + (apply 'make-comint + (concat "sdcdb-" file) + (substitute-in-file-name sdcdb-command-name) + nil + "-fullname" + "-cd" default-directory + file + (and corefile (list corefile))) + (set-process-filter (get-buffer-process (current-buffer)) 'sdcdb-filter) + (set-process-sentinel (get-buffer-process (current-buffer)) 'sdcdb-sentinel) + ;; XEmacs change: turn on sdcdb mode after setting up the proc filters + ;; for the benefit of shell-font.el + (sdcdb-mode) + (sdcdb-set-buffer))) + +;;;###autoload +(defun sdcdb-with-core (file corefile) + "Debug a program using a corefile." + (interactive "fProgram to debug: \nfCore file to use: ") + (sdcdb file corefile)) + +(defun sdcdb-set-buffer () + (cond ((eq major-mode 'sdcdb-mode) + (setq current-sdcdb-buffer (current-buffer)) + (if (featurep 'eos-toolbar) + (set-specifier default-toolbar (cons (current-buffer) + sdcdb-toolbar)))))) + + +;; This function is responsible for inserting output from SDCDB +;; into the buffer. +;; Aside from inserting the text, it notices and deletes +;; each filename-and-line-number; +;; that SDCDB prints to identify the selected frame. +;; It records the filename and line number, and maybe displays that file. +(defun sdcdb-filter (proc string) + (let ((inhibit-quit t)) + (save-current-buffer + (set-buffer (process-buffer proc)) + (if sdcdb-filter-accumulator + (sdcdb-filter-accumulate-marker + proc (concat sdcdb-filter-accumulator string)) + (sdcdb-filter-scan-input proc string))))) + +(defun sdcdb-filter-accumulate-marker (proc string) + (setq sdcdb-filter-accumulator nil) + (if (> (length string) 1) + (if (= (aref string 1) ?\032) + (let ((end (string-match "\n" string))) + (if end + (progn + (let* ((first-colon (string-match ":" string 2)) + (second-colon + (string-match ":" string (1+ first-colon)))) + (setq sdcdb-last-frame + (cons (substring string 2 first-colon) + (string-to-int + (substring string (1+ first-colon) + second-colon))))) + (setq sdcdb-last-frame-displayed-p nil) + (sdcdb-filter-scan-input proc + (substring string (1+ end)))) + (setq sdcdb-filter-accumulator string))) + (sdcdb-filter-insert proc "\032") + (sdcdb-filter-scan-input proc (substring string 1))) + (setq sdcdb-filter-accumulator string))) + +(defun sdcdb-filter-scan-input (proc string) + (if (equal string "") + (setq sdcdb-filter-accumulator nil) + (let ((start (string-match "\032" string))) + (if start + (progn (sdcdb-filter-insert proc (substring string 0 start)) + (sdcdb-filter-accumulate-marker proc + (substring string start))) + (sdcdb-filter-insert proc string))))) + +(defun sdcdb-filter-insert (proc string) + (let ((moving (= (point) (process-mark proc))) + (output-after-point (< (point) (process-mark proc)))) + (save-excursion + ;; Insert the text, moving the process-marker. + (goto-char (process-mark proc)) + (insert-before-markers string) + (set-marker (process-mark proc) (point)) + (sdcdb-maybe-delete-prompt) + ;; Check for a filename-and-line number. + (sdcdb-display-frame + ;; Don't display the specified file + ;; unless (1) point is at or after the position where output appears + ;; and (2) this buffer is on the screen. + (or output-after-point + (not (get-buffer-window (current-buffer)))) + ;; Display a file only when a new filename-and-line-number appears. + t)) + (if moving (goto-char (process-mark proc)))) + + (let (s) + (if (and (should-use-dialog-box-p) + (setq s (or (string-match " (y or n) *\\'" string) + (string-match " (yes or no) *\\'" string)))) + (sdcdb-mouse-prompt-hack (substring string 0 s) (current-buffer)))) + ) + +(defun sdcdb-mouse-prompt-hack (prompt buffer) + (popup-dialog-box + (list prompt + (vector "Yes" (list 'sdcdb-mouse-prompt-hack-answer 't buffer) t) + (vector "No" (list 'sdcdb-mouse-prompt-hack-answer 'nil buffer) t) + nil + (vector "Cancel" (list 'sdcdb-mouse-prompt-hack-answer 'nil buffer) t) + ))) + +(defun sdcdb-mouse-prompt-hack-answer (answer buffer) + (let ((b (current-buffer))) + (unwind-protect + (progn + (set-buffer buffer) + (goto-char (process-mark (get-buffer-process buffer))) + (delete-region (point) (point-max)) + (insert (if answer "yes" "no")) + (comint-send-input)) + (set-buffer b)))) + +(defun sdcdb-sentinel (proc msg) + (cond ((null (buffer-name (process-buffer proc))) + ;; buffer killed + ;; Stop displaying an arrow in a source file. + ;(setq overlay-arrow-position nil) -- done by kill-buffer-hook + (set-process-buffer proc nil)) + ((memq (process-status proc) '(signal exit)) + ;; Stop displaying an arrow in a source file. + (sdcdb-delete-arrow-extent) + ;; Fix the mode line. + (setq modeline-process + (concat ": sdcdb " (symbol-name (process-status proc)))) + (let* ((obuf (current-buffer))) + ;; save-excursion isn't the right thing if + ;; process-buffer is current-buffer + (unwind-protect + (progn + ;; Write something in *compilation* and hack its mode line, + (set-buffer (process-buffer proc)) + ;; Force mode line redisplay soon + (set-buffer-modified-p (buffer-modified-p)) + (if (eobp) + (insert ?\n mode-name " " msg) + (save-excursion + (goto-char (point-max)) + (insert ?\n mode-name " " msg))) + ;; If buffer and mode line will show that the process + ;; is dead, we can delete it now. Otherwise it + ;; will stay around until M-x list-processes. + (delete-process proc)) + ;; Restore old buffer, but don't restore old point + ;; if obuf is the sdcdb buffer. + (set-buffer obuf)))))) + + +(defun sdcdb-refresh (&optional arg) + "Fix up a possibly garbled display, and redraw the arrow." + (interactive "P") + (recenter arg) + (sdcdb-display-frame)) + +(defun sdcdb-display-frame (&optional nodisplay noauto) + "Find, obey and delete the last filename-and-line marker from SDCDB. +The marker looks like \\032\\032FILENAME:LINE:CHARPOS\\n. +Obeying it means displaying in another window the specified file and line." + (interactive) + (sdcdb-set-buffer) + (and sdcdb-last-frame (not nodisplay) + sdcdb-display-mode + (or (not sdcdb-last-frame-displayed-p) (not noauto)) + (progn (sdcdb-display-line (car sdcdb-last-frame) (cdr sdcdb-last-frame)) + (setq sdcdb-last-frame-displayed-p t)))) + +;; Make sure the file named TRUE-FILE is in a buffer that appears on the screen +;; and that its line LINE is visible. +;; Put the overlay-arrow on the line LINE in that buffer. + +(defun sdcdb-display-line (true-file line &optional select-method) + ;; FILE to display + ;; LINE number to highlight and make visible + ;; SELECT-METHOD 'source, 'debugger, or 'none. (default is 'debugger) + (and (null select-method) (setq select-method 'debugger)) + (let* ((pre-display-buffer-function nil) ; screw it, put it all in one screen + (pop-up-windows t) + (source-buffer (find-file-noselect true-file)) + (source-window (display-buffer source-buffer)) + (debugger-window (get-buffer-window current-sdcdb-buffer)) + (extent sdcdb-arrow-extent) + pos) + ;; XEmacs change: make sure we find a window displaying the source file + ;; even if we are already sitting in it when a breakpoint is hit. + ;; Otherwise the t argument to display-buffer will prevent it from being + ;; displayed. + (save-excursion + (cond ((eq select-method 'debugger) + ;; might not already be displayed + (setq debugger-window (display-buffer current-sdcdb-buffer)) + (select-window debugger-window)) + ((eq select-method 'source) + (select-window source-window)))) + (and extent + (not (eq (extent-object extent) source-buffer)) + (setq extent (delete-extent extent))) + (or extent + (progn + (setq extent (make-extent 1 1 source-buffer)) + (set-extent-face extent 'sdcdb-arrow-face) + (set-extent-begin-glyph extent sdcdb-arrow-glyph) + (set-extent-begin-glyph-layout extent 'whitespace) + (set-extent-priority extent 2000) + (setq sdcdb-arrow-extent extent))) + (save-current-buffer + (set-buffer source-buffer) + (save-restriction + (widen) + (goto-line line) + (set-window-point source-window (point)) + (setq pos (point)) + (end-of-line) + (set-extent-endpoints extent pos (point)) + (run-hook-with-args 'sdcdb-arrow-extent-hooks extent)) + (cond ((or (< pos (point-min)) (> pos (point-max))) + (widen) + (goto-char pos)))) + ;; Added by Stig. It caused lots of problems for several users + ;; and since its purpose is unclear it is getting commented out. + ;;(and debugger-window + ;; (set-window-point debugger-window pos)) + )) + +(defun sdcdb-call (command) + "Invoke sdcdb COMMAND displaying source in other window." + (interactive) + (goto-char (point-max)) + ;; Record info on the last prompt in the buffer and its position. + ;; This is used in sdcdb-maybe-delete-prompt + ;; to prevent multiple prompts from accumulating. + (save-excursion + (goto-char (process-mark (get-buffer-process current-sdcdb-buffer))) + (let ((pt (point))) + (beginning-of-line) + (setq sdcdb-delete-prompt-marker + (if (= (point) pt) + nil + (list (point-marker) (- pt (point)) + (buffer-substring (point) pt)))))) + (sdcdb-set-buffer) + (process-send-string (get-buffer-process current-sdcdb-buffer) + (concat command "\n"))) + +(defun sdcdb-maybe-delete-prompt () + (if sdcdb-delete-prompt-marker + ;; Get the string that we used as the prompt before. + (let ((prompt (nth 2 sdcdb-delete-prompt-marker)) + (length (nth 1 sdcdb-delete-prompt-marker))) + ;; Position after it. + (goto-char (+ (car sdcdb-delete-prompt-marker) length)) + ;; Delete any duplicates of it which follow right after. + (while (and (<= (+ (point) length) (point-max)) + (string= prompt + (buffer-substring (point) (+ (point) length)))) + (delete-region (point) (+ (point) length))) + ;; If that didn't take us to where output is arriving, + ;; we have encountered something other than a prompt, + ;; so stop trying to delete any more prompts. + (if (not (= (point) + (process-mark (get-buffer-process current-sdcdb-buffer)))) + (progn + (set-marker (car sdcdb-delete-prompt-marker) nil) + (setq sdcdb-delete-prompt-marker nil)))))) + +(defun sdcdb-break (temp) + "Set SDCDB breakpoint at this source line. With ARG set temporary breakpoint." + (interactive "P") + (let* ((file-name (file-name-nondirectory buffer-file-name)) + (line (save-restriction + (widen) + (beginning-of-line) + (1+ (count-lines 1 (point))))) + (cmd (concat (if temp "tbreak " "break ") file-name ":" + (int-to-string line)))) + (set-buffer current-sdcdb-buffer) + (goto-char (process-mark (get-buffer-process current-sdcdb-buffer))) + (delete-region (point) (point-max)) + (insert cmd) + (comint-send-input) + ;;(process-send-string (get-buffer-process current-sdcdb-buffer) cmd) + )) + +(defun sdcdb-clear () + "Set SDCDB breakpoint at this source line." + (interactive) + (let* ((file-name (file-name-nondirectory buffer-file-name)) + (line (save-restriction + (widen) + (beginning-of-line) + (1+ (count-lines 1 (point))))) + (cmd (concat "clear " file-name ":" + (int-to-string line)))) + (set-buffer current-sdcdb-buffer) + (goto-char (process-mark (get-buffer-process current-sdcdb-buffer))) + (delete-region (point) (point-max)) + (insert cmd) + (comint-send-input) + ;;(process-send-string (get-buffer-process current-sdcdb-buffer) cmd) + )) + +(defun sdcdb-read-address() + "Return a string containing the core-address found in the buffer at point." + (save-excursion + (let ((pt (point)) found begin) + (setq found (if (search-backward "0x" (- pt 7) t)(point))) + (cond (found (forward-char 2) + (buffer-substring found + (progn (re-search-forward "[^0-9a-f]") + (forward-char -1) + (point)))) + (t (setq begin (progn (re-search-backward "[^0-9]") (forward-char 1) + (point))) + (forward-char 1) + (re-search-forward "[^0-9]") + (forward-char -1) + (buffer-substring begin (point))))))) + + +(defvar sdcdb-commands nil + "List of strings or functions used by send-sdcdb-command. +It is for customization by you.") + +(defun send-sdcdb-command (arg) + + "This command reads the number where the cursor is positioned. It + then inserts this ADDR at the end of the sdcdb buffer. A numeric arg + selects the ARG'th member COMMAND of the list sdcdb-print-command. If + COMMAND is a string, (format COMMAND ADDR) is inserted, otherwise + (funcall COMMAND ADDR) is inserted. eg. \"p (rtx)%s->fld[0].rtint\" + is a possible string to be a member of sdcdb-commands. " + + + (interactive "P") + (let (comm addr) + (if arg (setq comm (nth arg sdcdb-commands))) + (setq addr (sdcdb-read-address)) + (if (eq (current-buffer) current-sdcdb-buffer) + (set-mark (point))) + (cond (comm + (setq comm + (if (stringp comm) (format comm addr) (funcall comm addr)))) + (t (setq comm addr))) + (switch-to-buffer current-sdcdb-buffer) + (goto-char (point-max)) + (insert comm))) + +(fset 'sdcdb-control-c-subjob 'comint-interrupt-subjob) + +;(defun sdcdb-control-c-subjob () +; "Send a Control-C to the subprocess." +; (interactive) +; (process-send-string (get-buffer-process (current-buffer)) +; "\C-c")) + +(defun sdcdb-toolbar-break () + (interactive) + (save-excursion + (message (car sdcdb-last-frame)) + (set-buffer (find-file-noselect (car sdcdb-last-frame))) + (sdcdb-break nil))) + +(defun sdcdb-toolbar-clear () + (interactive) + (save-excursion + (message (car sdcdb-last-frame)) + (set-buffer (find-file-noselect (car sdcdb-last-frame))) + (sdcdb-clear))) + +(provide 'sdcdb) + +;;; sdcdb.el ends here diff --git a/debugger/mcs51/sdcdb.h b/debugger/mcs51/sdcdb.h new file mode 100644 index 0000000..b286ac1 --- /dev/null +++ b/debugger/mcs51/sdcdb.h @@ -0,0 +1,282 @@ +/*------------------------------------------------------------------------- + sdcdb.h - Header file used by ALL source files for the debugger + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCDB_H +#define SDCDB_H + +#define SDCDB_DEBUG + +#ifdef SDCDB_DEBUG +// set D_x to 0 to turn off, 1 to turn on. +#define D_break 0x01 +#define D_simi 0x02 +#define D_sdcdb 0x04 +#define D_symtab 0x08 + +extern int sdcdbDebug; + +#define Dprintf(f, fs) {if (f & sdcdbDebug) printf fs ; } +#else +#define Dprintf(f, fs) { } +#endif + +#include +#include +#include +#include +#include +#include "config.h" +#include "src/SDCCset.h" +#include "src/SDCChasht.h" + +#define TRUE 1 +#define FALSE !TRUE + +typedef short bool; + +#ifndef max +#define max(a,b) (a > b ? a : b) +#endif + +#ifndef min +#define min(a,b) (a < b ? a : b) +#endif + +/* + * #ifndef ALLOC + * #define ALLOC(x,sz) if (!(x = calloc(1, sz))) \ + * { \ + * fprintf(stderr,"sdcdb: out of memory\n"); \ + * exit (1); \ + * } + * #endif + * #ifndef ALLOC_ATOMIC + * #define ALLOC_ATOMIC(x,sz) if (!(x = calloc(1, sz))) \ + * { \ + * fprintf(stderr,"sdcdb: out of memory\n"); \ + * exit (1); \ + * } + * #endif + */ + +/* generalpurpose stack related macros */ +#define STACK_DCL(stack,type,size) \ + typedef type t_##stack ; \ + t_##stack stack[size] ; \ + t_##stack (*p_##stack) = stack + (size); \ + t_##stack (*w_##stack) ; + +/* define extern stack */ +#define EXTERN_STACK_DCL(stack,type,size) \ + typedef type t_##stack ; \ + extern t_##stack stack[size] ; \ + extern t_##stack *p_##stack; \ + extern t_##stack *w_##stack; + +#define STACK_FULL(stack) ((p_##stack) <= stack ) +#define STACK_EMPTY(stack) ((p_##stack) >= (stack + \ + sizeof(stack)/sizeof(*stack)) ) + +#define STACK_PUSH_(stack,x) (*--p_##stack = (x)) +#define STACK_POP_(stack) (*p_##stack++) + +#define STACK_PUSH(stack,x) (STACK_FULL(stack) \ + ?((t_##stack)(long)(STACK_ERR(1))) \ + : STACK_PUSH_(stack,x) ) + +#define STACK_POP(stack) (STACK_EMPTY(stack) \ + ?((t_##stack) NULL) \ + : STACK_POP_(stack) ) + +#define STACK_PEEK(stack) (STACK_EMPTY(stack) \ + ?((t_##stack) NULL) \ + : *p_##stack ) + +#define STACK_PPEEK(stack) (((p_##stack + 1) >= (stack + \ + sizeof(stack)/sizeof(*stack))) \ + ?((t_##stack) NULL) \ + : *(p_##stack + 1) ) + +#define STACK_ERR(o) ( o \ + ? fprintf(stderr,"stack Overflow\n")\ + : fprintf(stderr,"stack underflow\n")) + +#define STACK_STARTWALK(stack) (w_##stack = p_##stack) + +#define STACK_WALK(stack) (w_##stack >= (stack + sizeof(stack)/sizeof(*stack)) \ + ? NULL : *w_##stack++ ) + +#include "src/SDCCbitv.h" + +enum { + SYM_REC = 1, + LNK_REC , + FUNC_REC , + STRUCT_REC, + MOD_REC +}; + +enum { + FMT_NON = 0, + FMT_BIN = 1, + FMT_OCT = 2, + FMT_DEZ = 3, + FMT_HEX = 4 +}; + +enum { SRC_CMODE = 1, SRC_AMODE }; + +/*-----------------------------------------------------------------*/ +/* source line structure */ +/*-----------------------------------------------------------------*/ +typedef struct srcLine +{ + unsigned addr ; + short block, level; /* scope information */ + char *src ; + +} srcLine ; + +/*-----------------------------------------------------------------*/ +/* structure for cdb record */ +/*-----------------------------------------------------------------*/ +typedef struct cdbrecs { + char type ; /* type of line */ + char *line; /* contents of line */ + struct cdbrecs *next; /* next in chain */ +} cdbrecs ; + +/*-----------------------------------------------------------------*/ +/* module definition */ +/*-----------------------------------------------------------------*/ +typedef struct module { + char *cfullname ; /* full name Includeing path for the module */ + char *afullname; /* fullname of assembly file */ + char *name ; /* name of module */ + char *c_name; /* c filename */ + char *asm_name; /* asm file name */ + int ncLines; /* number of lines in this module */ + int nasmLines; /* # of lines in the assembler file */ + srcLine **cLines; /* actual source lines */ + srcLine **asmLines; /* actual assembler source lines*/ + set *cfpoints; /* set of double line execution points */ +} module; + +/*-----------------------------------------------------------------*/ +/* execution point definition */ +/*-----------------------------------------------------------------*/ +typedef struct exePoint +{ + unsigned addr ; + int line ; + short block , level ; +} exePoint ; + +/*-----------------------------------------------------------------*/ +/* definition for a function */ +/*-----------------------------------------------------------------*/ +typedef struct function { + struct symbol *sym ;/* pointer to symbol for function */ + char *modName ;/* module name */ + module *mod ;/* module for this function */ + int entryline ;/* first line in the function */ + int aentryline ; + int exitline ;/* last line in the function */ + int aexitline ; + set *cfpoints ;/* set of all C execution points in func */ + set *afpoints ;/* set of all ASM execution points in func */ + unsigned int laddr ;/* last executed address */ + int lline ;/* last executed linenumber */ + unsigned int stkaddr ;/* stackpointer at beginning of function + * (not reentrant ! ) only actual */ +} function ; + +/*-----------------------------------------------------------------*/ +/* link record defintion */ +/*-----------------------------------------------------------------*/ +typedef struct linkrec { + char type; /* type of linker rec */ + unsigned addr ; /* address specified by the linker rec */ + char *name ; /* name specified by linker rec */ +} linkrec; + +/*-----------------------------------------------------------------*/ +/* program context */ +/*-----------------------------------------------------------------*/ +typedef struct context { + function *func; /* current function we are in */ + char *modName; /* name of the module */ + unsigned int addr ; /* current pc */ + int cline ; /* current c line number */ + int asmline; /* current asm line number */ + int block ; /* current block number */ + int level ; /* current level number */ +} context ; + +/*-----------------------------------------------------------------*/ +/* symbol display information */ +/*-----------------------------------------------------------------*/ +typedef struct _dsymbol +{ + char *name; + int dnum; + int fmt; + char *rs; +} dsymbol; + + +extern cdbrecs *recsRoot ; +extern context *currCtxt ; +extern set *modules ; /* set of modules */ +extern set *functions; /* set of functions */ +extern set *symbols ; /* set of symbols */ +extern set *sfrsymbols;/* set of symbols of sfr or sbit */ +extern set *dispsymbols; /* set of displayable symbols */ + + +extern char *currModName ; +extern char userinterrupt ; +extern char nointerrupt ; +extern short showfull ; +extern int nStructs ; +extern struct structdef **structs ; /* all structures */ +extern char *ssdirl; /* source directory search path */ +void **resize (void **, int ); +char *alloccpy(char *,int ); +char *gc_strdup(const char *s); +srcLine **loadFile (char *name, int *nlines); + +extern short fullname; +extern int srcMode; +extern char contsim; +char *searchDirsFname (char *); +char *getNextCmdLine(void ); +void setCmdLine( char * ); +void stopCommandList( void ); + +/* trimming functions */ +extern char *trim_left(char *s); +extern char *trim_right(char *s); +extern char *trim(char *s); + +#endif diff --git a/debugger/mcs51/sdcdbsrc.el b/debugger/mcs51/sdcdbsrc.el new file mode 100644 index 0000000..7b3f7b9 --- /dev/null +++ b/debugger/mcs51/sdcdbsrc.el @@ -0,0 +1,1557 @@ +;;; sdcdbsrc.el -- Source-based (as opposed to comint-based) debugger +;; interaction mode eventually, this will be unified with GUD +;; (after gud works reliably w/ XEmacs...) +;; Keywords: c, unix, tools, debugging + +;; Copyright (C) 1990 Debby Ayers , and +;; Rich Schaefer +;; Copyright (C) 1994, 1995 Tinker Systems and INS Engineering Corp. +;; +;; Copyright (C) 1999 Sandeep Dutta +;; +;; This file is part of XEmacs. +;; +;; XEmacs is free software; you can redistribute it and/or modify +;; it under the terms of the GNU General Public License as published by +;; the Free Software Foundation; either version 2 of the License, or +;; (at your option) any later version. +;; +;; XEmacs is distributed in the hope that it will be useful, +;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;; GNU General Public License for more details. +;; +;; You should have received a copy of the GNU General Public License +;; along with XEmacs; if not, write to the Free Software +;; Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + +;; Based upon code for version18 by Debra Ayers + +;;; SDCDBSRC:: +;;; Sdcdbsrc extends the emacs SDCDB interface to accept sdcdb commands issued +;;; from the source code buffer. Sdcdbsrc behaves similar to sdcdb except +;;; now most debugging may be done from the source code using the *sdcdb* +;;; buffer to view output. Supports a point and click model under X to +;;; evaluate source code expressions (no more typing long variable names). +;;; +;;; Supports C source at the moment but C++ support will be added if there +;;; is sufficient interest. +;;; + +;; SDCDBSRC::Sdcdb Source Mode Interface description. +;; Sdcdbsrc extends the emacs SDCDB interface to accept sdcdb commands issued +;; from the source code buffer. Sdcdbsrc behaves similar to sdcdb except now all +;; debugging may be done from the currently focused source buffer using +;; the *sdcdb* buffer to view output. + +;; When source files are displayed through sdcdbsrc, buffers are put in +;; sdcdbsrc-mode minor mode. This mode puts the buffer in read-only state +;; and sets up a special key and mouse map to invoke communication with +;; the current sdcdb process. The minor mode may be toggled on/off as needed. +;; (ESC-T) + +;; C-expressions may be evaluated by sdcdbsrc by simply pointing at text in the +;; current source buffer with the mouse or by centering the cursor over text +;; and typing a single key command. ('p' for print, '*' for print *). + +;; As code is debugged and new buffers are displayed, the focus of sdcdbsrc +;; follows to each new source buffer. Makes debugging fun. (sound like a +;; commercial or what!) +;; + +;; Current Listing :: +;;key binding Comment +;;--- ------- ------- +;; +;; r sdcdb-return-from-src SDCDB return command +;; n sdcdb-next-from-src SDCDB next command +;; b sdcdb-back-from-src SDCDB back command +;; w sdcdb-where-from-src SDCDB where command +;; f sdcdb-finish-from-src SDCDB finish command +;; u sdcdb-up-from-src SDCDB up command +;; d sdcdb-down-from-src SDCDB down command +;; c sdcdb-cont-from-src SDCDB continue command +;; i sdcdb-stepi-from-src SDCDB step instruction command +;; s sdcdb-step-from-src SDCDB step command +;; ? sdcdb-whatis-c-sexp SDCDB whatis command for data at +;; buffer point +;; x sdcdbsrc-delete SDCDB Delete all breakpoints if no arg +;; given or delete arg (C-u arg x) +;; m sdcdbsrc-frame SDCDB Display current frame if no arg, +;; given or display frame arg +;; * sdcdb-*print-c-sexp SDCDB print * command for data at +;; buffer point +;; ! sdcdbsrc-goto-sdcdb Goto the SDCDB output buffer +;; p sdcdb-print-c-sexp SDCDB print * command for data at +;; buffer point +;; g sdcdbsrc-goto-sdcdb Goto the SDCDB output buffer +;; t sdcdbsrc-mode Toggles Sdcdbsrc mode (turns it off) +;; +;; C-c C-f sdcdb-finish-from-src SDCDB finish command +;; +;; C-x SPC sdcdb-break Set break for line with point +;; ESC t sdcdbsrc-mode Toggle Sdcdbsrc mode +;; ESC m sdcdbsrc-srcmode Toggle list mode +;; +;; Local Bindings for buffer when you exit Sdcdbsrc minor mode +;; +;; C-x SPC sdcdb-break Set break for line with point +;; ESC t sdcdbsrc-mode Toggle Sdcdbsrc mode +;; + +;;; (eval-when-compile +;;; (or noninteractive +;;; (progn +;;; (message "ONLY compile sdcdbsrc except with -batch because of advice") +;;; (ding) +;;; ))) +;;; sdcdb.el --- run sdcdb under Emacs + +;; Author: W. Schelter, University of Texas +;; wfs@rascal.ics.utexas.edu +;; Rewritten by rms. +;; Keywords: c, unix, tools, debugging + +;; Some ideas are due to Masanobu. + +;; This file is part of XEmacs. + +;; XEmacs is free software; you can redistribute it and/or modify it +;; under the terms of the GNU General Public License as published by +;; the Free Software Foundation; either version 2, or (at your option) +;; any later version. + +;; XEmacs is distributed in the hope that it will be useful, but +;; WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +;; General Public License for more details. + +;; You should have received a copy of the GNU General Public License +;; along with XEmacs; see the file COPYING. If not, write to the Free +;; Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +;; 02111-1307, USA. + +;;; Synched up with: Not in FSF + +;;; Commentary: + +;; Description of SDCDB interface: + +;; A facility is provided for the simultaneous display of the source code +;; in one window, while using sdcdb to step through a function in the +;; other. A small arrow in the source window, indicates the current +;; line. + +;; Starting up: + +;; In order to use this facility, invoke the command SDCDB to obtain a +;; shell window with the appropriate command bindings. You will be asked +;; for the name of a file to run. Sdcdb will be invoked on this file, in a +;; window named *sdcdb-foo* if the file is foo. + +;; M-s steps by one line, and redisplays the source file and line. + +;; You may easily create additional commands and bindings to interact +;; with the display. For example to put the sdcdb command next on \M-n +;; (def-sdcdb next "\M-n") + +;; This causes the emacs command sdcdb-next to be defined, and runs +;; sdcdb-display-frame after the command. + +;; sdcdb-display-frame is the basic display function. It tries to display +;; in the other window, the file and line corresponding to the current +;; position in the sdcdb window. For example after a sdcdb-step, it would +;; display the line corresponding to the position for the last step. Or +;; if you have done a backtrace in the sdcdb buffer, and move the cursor +;; into one of the frames, it would display the position corresponding to +;; that frame. + +;; sdcdb-display-frame is invoked automatically when a filename-and-line-number +;; appears in the output. + +;;; Code: + +(require 'comint) +(require 'shell) + +(condition-case nil + (if (featurep 'toolbar) + (require 'eos-toolbar "sun-eos-toolbar")) + (error nil)) + +(defvar sdcdb-last-frame) +(defvar sdcdb-delete-prompt-marker) +(defvar sdcdb-filter-accumulator) +(defvar sdcdb-last-frame-displayed-p) +(defvar sdcdb-arrow-extent nil) +(or (fboundp 'make-glyph) (fset 'make-glyph 'identity)) ; work w/ pre beta v12 +(defvar sdcdb-arrow-glyph (make-glyph "=>")) + +(make-face 'sdcdb-arrow-face) +(or (face-differs-from-default-p 'sdcdb-arrow-face) + ;; Usually has a better default value than highlight does + (copy-face 'isearch 'sdcdb-arrow-face)) + +;; Hooks can side-effect extent arg to change extent properties +(defvar sdcdb-arrow-extent-hooks '()) + +(defvar sdcdb-prompt-pattern "^>\\|^(.*sdcdb[+]?) *\\|^---Type to.*--- *" + "A regexp to recognize the prompt for sdcdb or sdcdb+.") + +(defvar sdcdb-mode-map nil + "Keymap for sdcdb-mode.") + +(defvar sdcdb-toolbar nil) + +(if sdcdb-mode-map + nil + (setq sdcdb-mode-map (make-sparse-keymap)) + (set-keymap-name sdcdb-mode-map 'sdcdb-mode-map) + (set-keymap-parents sdcdb-mode-map (list comint-mode-map)) + (define-key sdcdb-mode-map "\C-l" 'sdcdb-refresh) + (define-key sdcdb-mode-map "\C-c\C-c" 'sdcdb-control-c-subjob) + (define-key sdcdb-mode-map "\t" 'comint-dynamic-complete) + (define-key sdcdb-mode-map "\M-?" 'comint-dynamic-list-completions)) + +(define-key ctl-x-map " " 'sdcdb-break) +(define-key ctl-x-map "&" 'send-sdcdb-command) + +;;Of course you may use `def-sdcdb' with any other sdcdb command, including +;;user defined ones. + +(defmacro def-sdcdb (name key &optional doc &rest forms) + (let* ((fun (intern (format "sdcdb-%s" name))) + (cstr (list 'if '(not (= 1 arg)) + (list 'format "%s %s" name 'arg) + name))) + (list 'progn + (nconc (list 'defun fun '(arg) + (or doc "") + '(interactive "p") + (list 'sdcdb-call cstr)) + forms) + (and key (list 'define-key 'sdcdb-mode-map key (list 'quote fun)))))) + +(def-sdcdb "step" "\M-s" "Step one source line with display" + (sdcdb-delete-arrow-extent)) +(def-sdcdb "stepi" "\M-i" "Step one instruction with display" + (sdcdb-delete-arrow-extent)) +(def-sdcdb "finish" "\C-c\C-f" "Finish executing current function" + (sdcdb-delete-arrow-extent)) +(def-sdcdb "run" nil "Run the current program" + (sdcdb-delete-arrow-extent)) + +;;"next" and "cont" were bound to M-n and M-c in Emacs 18, but these are +;;poor choices, since M-n is used for history navigation and M-c is +;;capitalize-word. These are defined without key bindings so that users +;;may choose their own bindings. +(def-sdcdb "next" "\C-c\C-n" "Step one source line (skip functions)" + (sdcdb-delete-arrow-extent)) +(def-sdcdb "cont" "\C-c\M-c" "Proceed with the program" + (sdcdb-delete-arrow-extent)) + +(def-sdcdb "up" "\C-c<" "Go up N stack frames (numeric arg) with display") +(def-sdcdb "down" "\C-c>" "Go down N stack frames (numeric arg) with display") + +(defvar sdcdb-display-mode nil + "Minor mode for sdcdb frame display") +(or (assq 'sdcdb-display-mode minor-mode-alist) + (setq minor-mode-alist + (purecopy + (append minor-mode-alist + '((sdcdb-display-mode " Frame")))))) + +(defun sdcdb-display-mode (&optional arg) + "Toggle SDCDB Frame display mode +With arg, turn display mode on if and only if arg is positive. +In the display minor mode, source file are displayed in another +window for repective \\[sdcdb-display-frame] commands." + (interactive "P") + (setq sdcdb-display-mode (if (null arg) + (not sdcdb-display-mode) + (> (prefix-numeric-value arg) 0)))) + +;; Using cc-mode's syntax table is broken. +(defvar sdcdb-mode-syntax-table nil + "Syntax table for SDCDB mode.") + +;; This is adapted from CC Mode 5.11. +(unless sdcdb-mode-syntax-table + (setq sdcdb-mode-syntax-table (make-syntax-table)) + ;; DO NOT TRY TO SET _ (UNDERSCORE) TO WORD CLASS! + (modify-syntax-entry ?_ "_" sdcdb-mode-syntax-table) + (modify-syntax-entry ?\\ "\\" sdcdb-mode-syntax-table) + (modify-syntax-entry ?+ "." sdcdb-mode-syntax-table) + (modify-syntax-entry ?- "." sdcdb-mode-syntax-table) + (modify-syntax-entry ?= "." sdcdb-mode-syntax-table) + (modify-syntax-entry ?% "." sdcdb-mode-syntax-table) + (modify-syntax-entry ?< "." sdcdb-mode-syntax-table) + (modify-syntax-entry ?> "." sdcdb-mode-syntax-table) + (modify-syntax-entry ?& "." sdcdb-mode-syntax-table) + (modify-syntax-entry ?| "." sdcdb-mode-syntax-table) + (modify-syntax-entry ?\' "\"" sdcdb-mode-syntax-table) + ;; add extra comment syntax + (modify-syntax-entry ?/ ". 14" sdcdb-mode-syntax-table) + (modify-syntax-entry ?* ". 23" sdcdb-mode-syntax-table)) + + +(defun sdcdb-mode () + "Major mode for interacting with an inferior Sdcdb process. +The following commands are available: + +\\{sdcdb-mode-map} + +\\[sdcdb-display-frame] displays in the other window +the last line referred to in the sdcdb buffer. See also +\\[sdcdb-display-mode]. + +\\[sdcdb-step],\\[sdcdb-next], and \\[sdcdb-nexti] in the sdcdb window, +call sdcdb to step,next or nexti and then update the other window +with the current file and position. + +If you are in a source file, you may select a point to break +at, by doing \\[sdcdb-break]. + +Commands: +Many commands are inherited from comint mode. +Additionally we have: + +\\[sdcdb-display-frame] display frames file in other window +\\[sdcdb-step] advance one line in program +\\[send-sdcdb-command] used for special printing of an arg at the current point. +C-x SPACE sets break point at current line." + (interactive) + (comint-mode) + (use-local-map sdcdb-mode-map) + (set-syntax-table sdcdb-mode-syntax-table) + (make-local-variable 'sdcdb-last-frame-displayed-p) + (make-local-variable 'sdcdb-last-frame) + (make-local-variable 'sdcdb-delete-prompt-marker) + (make-local-variable 'sdcdb-display-mode) + (make-local-variable' sdcdb-filter-accumulator) + (setq sdcdb-last-frame nil + sdcdb-delete-prompt-marker nil + sdcdb-filter-accumulator nil + sdcdb-display-mode t + major-mode 'sdcdb-mode + mode-name "Inferior SDCDB" + comint-prompt-regexp sdcdb-prompt-pattern + sdcdb-last-frame-displayed-p t) + (set (make-local-variable 'shell-dirtrackp) t) + ;;(make-local-variable 'sdcdb-arrow-extent) + (and (extentp sdcdb-arrow-extent) + (delete-extent sdcdb-arrow-extent)) + (setq sdcdb-arrow-extent nil) + ;; XEmacs change: + (make-local-hook 'kill-buffer-hook) + (add-hook 'kill-buffer-hook 'sdcdb-delete-arrow-extent nil t) + (add-hook 'comint-input-filter-functions 'shell-directory-tracker nil t) + (run-hooks 'sdcdb-mode-hook)) + +(defun sdcdb-delete-arrow-extent () + (let ((inhibit-quit t)) + (if sdcdb-arrow-extent + (delete-extent sdcdb-arrow-extent)) + (setq sdcdb-arrow-extent nil))) + +(defvar current-sdcdb-buffer nil) + +;;;###autoload +(defvar sdcdb-command-name "sdcdb" + "Pathname for executing sdcdb.") +;; +;; default values should be changed as needed +;; +(defvar sdcdbsrc-cpu-type "51") +(defvar sdcdbsrc-frequency "11059200") +(defvar sdcdbsrc-serial nil) + +;;;###autoload +(defun sdcdb (path &optional corefile) + "Run sdcdb on program FILE in buffer *sdcdb-FILE*. +The directory containing FILE becomes the initial working directory +and source-file directory for SDCDB. If you wish to change this, use +the SDCDB commands `cd DIR' and `directory'." + (interactive "FRun sdcdb on file: ") + (setq path (file-truename (expand-file-name path))) + (let ((file (file-name-nondirectory path))) + (switch-to-buffer (concat "*sdcdb-" file "*")) + (setq default-directory (file-name-directory path)) + (or (bolp) (newline)) + (insert "Current directory is " default-directory "\n") + (apply 'make-comint + (concat "sdcdb-" file) + (substitute-in-file-name sdcdb-command-name) + nil + "-cpu" + sdcdbsrc-cpu-type + "-X" + sdcdbsrc-frequency + "-fullname" + file + (and corefile (list corefile))) + (set-process-filter (get-buffer-process (current-buffer)) 'sdcdb-filter) + (set-process-sentinel (get-buffer-process (current-buffer)) 'sdcdb-sentinel) + ;; XEmacs change: turn on sdcdb mode after setting up the proc filters + ;; for the benefit of shell-font.el + (sdcdb-mode) + (sdcdb-set-buffer))) + +;;;###autoload +(defun sdcdb-with-core (file corefile) + "Debug a program using a corefile." + (interactive "fProgram to debug: \nfCore file to use: ") + (sdcdb file corefile)) + +(defun sdcdb-set-buffer () + (cond ((eq major-mode 'sdcdb-mode) + (setq current-sdcdb-buffer (current-buffer)) + (if (featurep 'eos-toolbar) + (set-specifier default-toolbar (cons (current-buffer) + sdcdb-toolbar)))))) + + +;; This function is responsible for inserting output from SDCDB +;; into the buffer. +;; Aside from inserting the text, it notices and deletes +;; each filename-and-line-number; +;; that SDCDB prints to identify the selected frame. +;; It records the filename and line number, and maybe displays that file. +(defun sdcdb-filter (proc string) + (let ((inhibit-quit t)) + (save-current-buffer + (set-buffer (process-buffer proc)) + (if sdcdb-filter-accumulator + (sdcdb-filter-accumulate-marker + proc (concat sdcdb-filter-accumulator string)) + (sdcdb-filter-scan-input proc string))))) + +(defun sdcdb-filter-accumulate-marker (proc string) + (setq sdcdb-filter-accumulator nil) + (if (> (length string) 1) + (if (= (aref string 1) ?\032) + (let ((end (string-match "\n" string))) + (if end + (progn + (let* ((first-colon (string-match ":" string 2)) + (second-colon + (string-match ":" string (1+ first-colon)))) + (setq sdcdb-last-frame + (cons (substring string 2 first-colon) + (string-to-int + (substring string (1+ first-colon) + second-colon))))) + (setq sdcdb-last-frame-displayed-p nil) + (sdcdb-filter-scan-input proc + (substring string (1+ end)))) + (setq sdcdb-filter-accumulator string))) + (sdcdb-filter-insert proc "\032") + (sdcdb-filter-scan-input proc (substring string 1))) + (setq sdcdb-filter-accumulator string))) + +(defun sdcdb-filter-scan-input (proc string) + (if (equal string "") + (setq sdcdb-filter-accumulator nil) + (let ((start (string-match "\032" string))) + (if start + (progn (sdcdb-filter-insert proc (substring string 0 start)) + (sdcdb-filter-accumulate-marker proc + (substring string start))) + (sdcdb-filter-insert proc string))))) + +(defun sdcdb-filter-insert (proc string) + (let ((moving (= (point) (process-mark proc))) + (output-after-point (< (point) (process-mark proc)))) + (save-excursion + ;; Insert the text, moving the process-marker. + (goto-char (process-mark proc)) + (insert-before-markers string) + (set-marker (process-mark proc) (point)) + (sdcdb-maybe-delete-prompt) + ;; Check for a filename-and-line number. + (sdcdb-display-frame + ;; Don't display the specified file + ;; unless (1) point is at or after the position where output appears + ;; and (2) this buffer is on the screen. + (or output-after-point + (not (get-buffer-window (current-buffer)))) + ;; Display a file only when a new filename-and-line-number appears. + t)) + (if moving (goto-char (process-mark proc)))) + + (let (s) + (if (and (should-use-dialog-box-p) + (setq s (or (string-match " (y or n) *\\'" string) + (string-match " (yes or no) *\\'" string)))) + (sdcdb-mouse-prompt-hack (substring string 0 s) (current-buffer)))) + ) + +(defun sdcdb-mouse-prompt-hack (prompt buffer) + (popup-dialog-box + (list prompt + (vector "Yes" (list 'sdcdb-mouse-prompt-hack-answer 't buffer) t) + (vector "No" (list 'sdcdb-mouse-prompt-hack-answer 'nil buffer) t) + nil + (vector "Cancel" (list 'sdcdb-mouse-prompt-hack-answer 'nil buffer) t) + ))) + +(defun sdcdb-mouse-prompt-hack-answer (answer buffer) + (let ((b (current-buffer))) + (unwind-protect + (progn + (set-buffer buffer) + (goto-char (process-mark (get-buffer-process buffer))) + (delete-region (point) (point-max)) + (insert (if answer "yes" "no")) + (comint-send-input)) + (set-buffer b)))) + +(defun sdcdb-sentinel (proc msg) + (cond ((null (buffer-name (process-buffer proc))) + ;; buffer killed + ;; Stop displaying an arrow in a source file. + ;(setq overlay-arrow-position nil) -- done by kill-buffer-hook + (set-process-buffer proc nil)) + ((memq (process-status proc) '(signal exit)) + ;; Stop displaying an arrow in a source file. + (sdcdb-delete-arrow-extent) + ;; Fix the mode line. + (setq modeline-process + (concat ": sdcdb " (symbol-name (process-status proc)))) + (let* ((obuf (current-buffer))) + ;; save-excursion isn't the right thing if + ;; process-buffer is current-buffer + (unwind-protect + (progn + ;; Write something in *compilation* and hack its mode line, + (set-buffer (process-buffer proc)) + ;; Force mode line redisplay soon + (set-buffer-modified-p (buffer-modified-p)) + (if (eobp) + (insert ?\n mode-name " " msg) + (save-excursion + (goto-char (point-max)) + (insert ?\n mode-name " " msg))) + ;; If buffer and mode line will show that the process + ;; is dead, we can delete it now. Otherwise it + ;; will stay around until M-x list-processes. + (delete-process proc)) + ;; Restore old buffer, but don't restore old point + ;; if obuf is the sdcdb buffer. + (set-buffer obuf)))))) + + +(defun sdcdb-refresh (&optional arg) + "Fix up a possibly garbled display, and redraw the arrow." + (interactive "P") + (recenter arg) + (sdcdb-display-frame)) + +(defun sdcdb-display-frame (&optional nodisplay noauto) + "Find, obey and delete the last filename-and-line marker from SDCDB. +The marker looks like \\032\\032FILENAME:LINE:CHARPOS\\n. +Obeying it means displaying in another window the specified file and line." + (interactive) + (sdcdb-set-buffer) + (and sdcdb-last-frame (not nodisplay) + sdcdb-display-mode + (or (not sdcdb-last-frame-displayed-p) (not noauto)) + (progn (sdcdb-display-line (car sdcdb-last-frame) (cdr sdcdb-last-frame)) + (setq sdcdb-last-frame-displayed-p t)))) + +;; Make sure the file named TRUE-FILE is in a buffer that appears on the screen +;; and that its line LINE is visible. +;; Put the overlay-arrow on the line LINE in that buffer. + +(defun sdcdb-display-line (true-file line &optional select-method) + ;; FILE to display + ;; LINE number to highlight and make visible + ;; SELECT-METHOD 'source, 'debugger, or 'none. (default is 'debugger) + (and (null select-method) (setq select-method 'debugger)) + (let* ((pre-display-buffer-function nil) ; screw it, put it all in one screen + (pop-up-windows t) + (source-buffer (find-file-noselect true-file)) + (source-window (display-buffer source-buffer)) + (debugger-window (get-buffer-window current-sdcdb-buffer)) + (extent sdcdb-arrow-extent) + pos) + ;; XEmacs change: make sure we find a window displaying the source file + ;; even if we are already sitting in it when a breakpoint is hit. + ;; Otherwise the t argument to display-buffer will prevent it from being + ;; displayed. + (save-excursion + (cond ((eq select-method 'debugger) + ;; might not already be displayed + (setq debugger-window (display-buffer current-sdcdb-buffer)) + (select-window debugger-window)) + ((eq select-method 'source) + (select-window source-window)))) + (and extent + (not (eq (extent-object extent) source-buffer)) + (setq extent (delete-extent extent))) + (or extent + (progn + (setq extent (make-extent 1 1 source-buffer)) + (set-extent-face extent 'sdcdb-arrow-face) + (set-extent-begin-glyph extent sdcdb-arrow-glyph) + (set-extent-begin-glyph-layout extent 'whitespace) + (set-extent-priority extent 2000) + (setq sdcdb-arrow-extent extent))) + (save-current-buffer + (set-buffer source-buffer) + (save-restriction + (widen) + (goto-line line) + (set-window-point source-window (point)) + (setq pos (point)) + (end-of-line) + (set-extent-endpoints extent pos (point)) + (run-hook-with-args 'sdcdb-arrow-extent-hooks extent)) + (cond ((or (< pos (point-min)) (> pos (point-max))) + (widen) + (goto-char pos)))) + ;; Added by Stig. It caused lots of problems for several users + ;; and since its purpose is unclear it is getting commented out. + ;;(and debugger-window + ;; (set-window-point debugger-window pos)) + )) + +(defun sdcdb-call (command) + "Invoke sdcdb COMMAND displaying source in other window." + (interactive) + (goto-char (point-max)) + ;; Record info on the last prompt in the buffer and its position. + ;; This is used in sdcdb-maybe-delete-prompt + ;; to prevent multiple prompts from accumulating. + (save-excursion + (goto-char (process-mark (get-buffer-process current-sdcdb-buffer))) + (let ((pt (point))) + (beginning-of-line) + (setq sdcdb-delete-prompt-marker + (if (= (point) pt) + nil + (list (point-marker) (- pt (point)) + (buffer-substring (point) pt)))))) + (sdcdb-set-buffer) + (process-send-string (get-buffer-process current-sdcdb-buffer) + (concat command "\n"))) + +(defun sdcdb-maybe-delete-prompt () + (if sdcdb-delete-prompt-marker + ;; Get the string that we used as the prompt before. + (let ((prompt (nth 2 sdcdb-delete-prompt-marker)) + (length (nth 1 sdcdb-delete-prompt-marker))) + ;; Position after it. + (goto-char (+ (car sdcdb-delete-prompt-marker) length)) + ;; Delete any duplicates of it which follow right after. + (while (and (<= (+ (point) length) (point-max)) + (string= prompt + (buffer-substring (point) (+ (point) length)))) + (delete-region (point) (+ (point) length))) + ;; If that didn't take us to where output is arriving, + ;; we have encountered something other than a prompt, + ;; so stop trying to delete any more prompts. + (if (not (= (point) + (process-mark (get-buffer-process current-sdcdb-buffer)))) + (progn + (set-marker (car sdcdb-delete-prompt-marker) nil) + (setq sdcdb-delete-prompt-marker nil)))))) + +(defun sdcdb-break (temp) + "Set SDCDB breakpoint at this source line. With ARG set temporary breakpoint." + (interactive "P") + (let* ((file-name (file-name-nondirectory buffer-file-name)) + (line (save-restriction + (widen) + (beginning-of-line) + (1+ (count-lines 1 (point))))) + (cmd (concat (if temp "tbreak " "break ") file-name ":" + (int-to-string line)))) + (set-buffer current-sdcdb-buffer) + (goto-char (process-mark (get-buffer-process current-sdcdb-buffer))) + (delete-region (point) (point-max)) + (insert cmd) + (comint-send-input) + ;;(process-send-string (get-buffer-process current-sdcdb-buffer) cmd) + )) + +(defun sdcdb-clear () + "Set SDCDB breakpoint at this source line." + (interactive) + (let* ((file-name (file-name-nondirectory buffer-file-name)) + (line (save-restriction + (widen) + (beginning-of-line) + (1+ (count-lines 1 (point))))) + (cmd (concat "clear " file-name ":" + (int-to-string line)))) + (set-buffer current-sdcdb-buffer) + (goto-char (process-mark (get-buffer-process current-sdcdb-buffer))) + (delete-region (point) (point-max)) + (insert cmd) + (comint-send-input) + ;;(process-send-string (get-buffer-process current-sdcdb-buffer) cmd) + )) + +(defun sdcdb-read-address() + "Return a string containing the core-address found in the buffer at point." + (save-excursion + (let ((pt (point)) found begin) + (setq found (if (search-backward "0x" (- pt 7) t)(point))) + (cond (found (forward-char 2) + (buffer-substring found + (progn (re-search-forward "[^0-9a-f]") + (forward-char -1) + (point)))) + (t (setq begin (progn (re-search-backward "[^0-9]") (forward-char 1) + (point))) + (forward-char 1) + (re-search-forward "[^0-9]") + (forward-char -1) + (buffer-substring begin (point))))))) + + +(defvar sdcdb-commands nil + "List of strings or functions used by send-sdcdb-command. +It is for customization by you.") + +(defun send-sdcdb-command (arg) + + "This command reads the number where the cursor is positioned. It + then inserts this ADDR at the end of the sdcdb buffer. A numeric arg + selects the ARG'th member COMMAND of the list sdcdb-print-command. If + COMMAND is a string, (format COMMAND ADDR) is inserted, otherwise + (funcall COMMAND ADDR) is inserted. eg. \"p (rtx)%s->fld[0].rtint\" + is a possible string to be a member of sdcdb-commands. " + + + (interactive "P") + (let (comm addr) + (if arg (setq comm (nth arg sdcdb-commands))) + (setq addr (sdcdb-read-address)) + (if (eq (current-buffer) current-sdcdb-buffer) + (set-mark (point))) + (cond (comm + (setq comm + (if (stringp comm) (format comm addr) (funcall comm addr)))) + (t (setq comm addr))) + (switch-to-buffer current-sdcdb-buffer) + (goto-char (point-max)) + (insert comm))) + +(fset 'sdcdb-control-c-subjob 'comint-interrupt-subjob) + +;(defun sdcdb-control-c-subjob () +; "Send a Control-C to the subprocess." +; (interactive) +; (process-send-string (get-buffer-process (current-buffer)) +; "\C-c")) + +(defun sdcdb-toolbar-break () + (interactive) + (save-excursion + (message (car sdcdb-last-frame)) + (set-buffer (find-file-noselect (car sdcdb-last-frame))) + (sdcdb-break nil))) + +(defun sdcdb-toolbar-clear () + (interactive) + (save-excursion + (message (car sdcdb-last-frame)) + (set-buffer (find-file-noselect (car sdcdb-last-frame))) + (sdcdb-clear))) + +(provide 'sdcdb) + +(require 'sdcdb "sdcdb") ; NOT gud! (yet...) + +(defvar sdcdbsrc-active-p t + "*Set to nil if you do not want source files put in sdcdbsrc-mode") + +(defvar sdcdbsrc-call-p nil + "True if sdcdb command issued from a source buffer") + +(defvar sdcdbsrc-associated-buffer nil + "Buffer name of attached sdcdb process") + +(defvar sdcdbsrc-mode nil + "Indicates whether buffer is in sdcdbsrc-mode or not") +(make-variable-buffer-local 'sdcdbsrc-mode) + +(defvar sdcdbsrc-global-mode nil + "Indicates whether global sdcdbsrc bindings are in effect or not") + +(defvar sdcdb-prompt-pattern "^[^)#$%>\n]*[)#$%>] *" + "A regexp for matching the end of the sdcdb prompt") + +(defvar eos::toolbar-toggle-srcmode + + (toolbar-make-button-list + (expand-file-name "recycle.xbm" eos::toolbar-icon-directory)) + "A Run icon pair.") +;;; bindings + +(defvar sdcdbsrc-global-map + (let ((map (make-sparse-keymap))) + (set-keymap-name map 'sdcdbsrc-global-map) + (define-key map "\C-x " 'sdcdb-break) + (define-key map "\M-\C-t" 'sdcdbsrc-mode) + (define-key map "\M-\C-g" 'sdcdbsrc-goto-sdcdb) + (define-key map "\M-m" 'sdcdbsrc-srcmode) + ;; middle button to select and print expressions... + (define-key map '(meta button2) 'sdcdbsrc-print-csexp) + (define-key map '(meta shift button2) 'sdcdbsrc-*print-csexp) + ;; left button to position breakpoints + (define-key map '(meta button1) 'sdcdbsrc-set-break) + (define-key map '(meta shift button1) 'sdcdbsrc-set-tbreak-continue) + map) + "Global minor keymap that is active whenever sdcdbsrc is running.") + +(add-minor-mode 'sdcdbsrc-global-mode " SdcdbGlobal" sdcdbsrc-global-map) + +(defvar sdcdbsrc-mode-map + (let ((map (make-sparse-keymap))) + (suppress-keymap map) + (set-keymap-name map 'sdcdbsrc-mode-map) + ;; inherit keys from global sdcdbsrc map just in case that somehow gets turned off. + (set-keymap-parents map (list sdcdbsrc-global-map)) + (define-key map "\C-x\C-q" 'sdcdbsrc-mode) ; toggle read-only + (define-key map "\C-c\C-c" 'sdcdbsrc-mode) + (define-key map "b" 'sdcdb-break) + (define-key map "g" 'sdcdbsrc-goto-sdcdb) + (define-key map "!" 'sdcdbsrc-goto-sdcdb) + (define-key map "p" 'sdcdb-print-c-sexp) + (define-key map "*" 'sdcdb-*print-c-sexp) + (define-key map "?" 'sdcdb-whatis-c-sexp) + (define-key map "R" 'sdcdbsrc-reset) + map) + "Minor keymap for buffers in sdcdbsrc-mode") + +(add-minor-mode 'sdcdbsrc-mode " SdcdbSrc" sdcdbsrc-mode-map) + +(defvar sdcdbsrc-toolbar + '([eos::toolbar-stop-at-icon + sdcdb-break + t + "Stop at selected position"] + [eos::toolbar-stop-in-icon + sdcdb-break + t + "Stop in function whose name is selected"] + [eos::toolbar-clear-at-icon + sdcdb-clear + t + "Clear at selected position"] + [eos::toolbar-evaluate-icon + sdcdb-print-c-sexp + t + "Evaluate selected expression; shows in separate XEmacs frame"] + [eos::toolbar-run-icon + sdcdbsrc-run + t + "Run current program"] + [eos::toolbar-cont-icon + sdcdbsrc-cont + t + "Continue current program"] + [eos::toolbar-step-into-icon + sdcdbsrc-step + t + "Step into (aka step)"] + [eos::toolbar-step-over-icon + sdcdbsrc-next + t + "Step over (aka next)"] + [eos::toolbar-fix-icon + nil + nil + "Fix (not available with sdcdb)"] + [eos::toolbar-build-icon + toolbar-compile + t + "Build (aka make -NYI)"] + [eos::toolbar-toggle-srcmode + sdcdbsrc-srcmode + t + "Toggle Source C <-> Asm"] + )) + +(defmacro def-sdcdb-from-src (sdcdb-command key &optional doc &rest forms) + "Create a function that will call SDCDB-COMMAND with KEY." + (let* ((fname (format "sdcdbsrc-%s" sdcdb-command)) + (cstr (list 'if 'arg + (list 'format "%s %s" sdcdb-command '(prefix-numeric-value arg)) + sdcdb-command)) + fun) + (while (string-match " " fname) + (aset fname (match-beginning 0) ?-)) + (setq fun (intern fname)) + + (list 'progn + (nconc (list 'defun fun '(arg) + (or doc "") + '(interactive "P") + (list 'sdcdb-call-from-src cstr)) + forms) + (list 'define-key 'sdcdbsrc-mode-map key (list 'quote fun))))) + +(def-sdcdb-from-src "step" "s" "Step one instruction in src" + (sdcdb-delete-arrow-extent)) +(def-sdcdb-from-src "stepi" "i" "Step one source line (skip functions)" + (sdcdb-delete-arrow-extent)) +(def-sdcdb-from-src "cont" "c" "Continue with display" + (sdcdb-delete-arrow-extent)) +(def-sdcdb-from-src "down" "d" "Go down N stack frames (numeric arg) ") +(def-sdcdb-from-src "up" "u" "Go up N stack frames (numeric arg)") +(def-sdcdb-from-src "finish" "f" "Finish frame") +(def-sdcdb-from-src "where" "w" "Display (N frames of) backtrace") +(def-sdcdb-from-src "next" "n" "Step one line with display" + (sdcdb-delete-arrow-extent)) +(def-sdcdb-from-src "run" "r" "Run program from start" + (sdcdb-delete-arrow-extent)) +(def-sdcdb-from-src "return" "R" "Return from selected stack frame") +(def-sdcdb-from-src "disable" "x" "Disable all breakpoints") +(def-sdcdb-from-src "delete" "X" "Delete all breakpoints") +(def-sdcdb-from-src "quit" "Q" "Quit sdcdb." + (sdcdb-delete-arrow-extent)) +(def-sdcdb-from-src "info locals" "l" "Show local variables") +(def-sdcdb-from-src "info break" "B" "Show breakpoints") +(def-sdcdb-from-src "" "\r" "Repeat last command") +(def-sdcdb-from-src "frame" "m" "Show frame if no arg, with arg go to frame") + +;;; code + +;;;###autoload +(defun sdcdbsrc (path &optional core-or-pid) + "Activates a sdcdb session with sdcdbsrc-mode turned on. A numeric prefix +argument can be used to specify a running process to attach, and a non-numeric +prefix argument will cause you to be prompted for a core file to debug." + (interactive (let ((file (read-file-name "Program to debug: " nil nil t))) + (cond ((numberp current-prefix-arg) + (list file (int-to-string current-prefix-arg))) + (current-prefix-arg + (list file (read-file-name "Core file: " nil nil t))) + (t (list file))) + )) + ;; FIXME - this is perhaps an uncool thing to do --Stig + (delete-other-windows) + (split-window-vertically) + (other-window 0) + + (sdcdb path core-or-pid) + (local-set-key 'button2 'sdcdbsrc-select-or-yank) + (setq mode-motion-hook 'sdcdbsrc-mode-motion) + ;; XEmacs change: + (make-local-hook 'kill-buffer-hook) + (add-hook 'kill-buffer-hook 'sdcdbsrc-reset nil t)) + +(defun sdcdbsrc-global-mode () + ;; this can be used as a hook for sdcdb-mode.... + (or current-sdcdb-buffer + (and (eq major-mode 'sdcdb-mode) ; doesn't work w/ energize yet + (setq current-sdcdb-buffer (current-buffer)) + ;; XEmacs change: + (progn + (make-local-hook 'kill-buffer-hook) + (add-hook 'kill-buffer-hook 'sdcdbsrc-reset nil t))) + (error "Cannot determine current-sdcdb-buffer")) +;;; (set-process-filter +;;; (get-buffer-process current-sdcdb-buffer) 'sdcdbsrc-mode-filter) +;;; (set-process-sentinel +;;; (get-buffer-process current-sdcdb-buffer) 'sdcdbsrc-mode-sentinel) + ;; sdcdbsrc-global-mode was set to t here but that tended to piss + ;; people off + (setq sdcdbsrc-global-mode nil + sdcdbsrc-active-p t + sdcdbsrc-call-p nil + sdcdbsrc-mode nil) + (message "Gbd source mode active")) + +(add-hook 'sdcdb-mode-hook 'sdcdbsrc-global-mode) + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;;; Sdcdb Source minor mode. +;;; + +(defvar sdcdbsrc-associated-buffer nil + "The sdcdb buffer to send commands to.") +(defvar sdcdbsrc-initial-readonly 'undefined + "read-only status of buffer when not in sdcdbsrc-mode") +(defvar sdcdbsrc-old-toolbar nil + "saved toolbar for buffer") + +(defun sdcdbsrc-mode (arg &optional quiet) + "Minor mode for interacting with sdcdb from a c source file. +With arg, turn sdcdbsrc-mode on iff arg is positive. In sdcdbsrc-mode, +you may send an associated sdcdb buffer commands from the current buffer +containing c source code." + (interactive "P") + (setq sdcdbsrc-mode + (if (null arg) + (not sdcdbsrc-mode) + (> (prefix-numeric-value arg) 0))) + + (cond (sdcdbsrc-mode + (cond ((not (local-variable-p 'sdcdbsrc-initial-readonly (current-buffer))) + (set (make-local-variable 'sdcdbsrc-initial-readonly) + buffer-read-only) + (set (make-local-variable 'sdcdbsrc-associated-buffer) + current-sdcdb-buffer) + (if (featurep 'toolbar) + (set (make-local-variable 'sdcdbsrc-old-toolbar) + (specifier-specs default-toolbar (current-buffer)))) + ) + ) + (if (featurep 'toolbar) + (set-specifier default-toolbar (cons (current-buffer) + sdcdbsrc-toolbar))) + (setq buffer-read-only t) + (or quiet (message "Entering sdcdbsrc-mode..."))) + (t + (and (local-variable-p 'sdcdbsrc-initial-readonly (current-buffer)) + (progn + (if (featurep 'toolbar) + (if sdcdbsrc-old-toolbar + (set-specifier default-toolbar + (cons (current-buffer) + sdcdbsrc-old-toolbar)) + (remove-specifier default-toolbar (current-buffer)))) + (kill-local-variable 'sdcdbsrc-old-toolbar) + (setq buffer-read-only sdcdbsrc-initial-readonly) + (kill-local-variable 'sdcdbsrc-initial-readonly) + (kill-local-variable 'sdcdbsrc-associated-buffer) + )) + (or quiet (message "Exiting sdcdbsrc-mode...")))) + (redraw-modeline t)) + +;; +;; Sends commands to sdcdb process. + +(defun sdcdb-call-from-src (command) + "Send associated sdcdb process COMMAND displaying source in this window." + (setq sdcdbsrc-call-p t) + (let ((src-win (selected-window)) + (buf (or sdcdbsrc-associated-buffer current-sdcdb-buffer))) + (or (buffer-name buf) + (error "SDCDB buffer deleted")) + (pop-to-buffer buf) + (goto-char (point-max)) + (beginning-of-line) + ;; Go past sdcdb prompt + (re-search-forward + sdcdb-prompt-pattern (save-excursion (end-of-line) (point)) t) + ;; Delete any not-supposed-to-be-there text + (delete-region (point) (point-max)) + (insert command) + (comint-send-input) + (select-window src-win) + )) + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;;; +;;; Define Commands for SDCDB SRC Mode Buffer +;;; + +;;; ;; #### - move elsewhere +(or (fboundp 'event-buffer) + (defun event-buffer (event) + "Return buffer assocaited with EVENT, or nil." + (let ((win (event-window event))) + (and win (window-buffer win))))) + +(defun set-sdcdbsrc-mode-motion-extent (st en action) + ;; by Stig@hackvan.com + (let ((ex (make-extent st en))) + (set-extent-face ex 'highlight) + (set-extent-property ex 'sdcdbsrc t) + (set-extent-property ex 'action action) + (setq mode-motion-extent ex))) + +(defun nuke-mode-motion-extent () + ;; by Stig@hackvan.com + (cond (mode-motion-extent + (delete-extent mode-motion-extent) + (setq mode-motion-extent nil)))) + +(defun looking-at-any (regex-list) + ;; by Stig@hackvan.com + (catch 'found + (while regex-list + (and (looking-at (car regex-list)) + (throw 'found t)) + (setq regex-list (cdr regex-list))))) + +(defconst sdcdb-breakpoint-patterns + '( + ;; when execution stops... + ;;Breakpoint 1, XlwMenuRedisplay (w=0x4d2e00, ev=0xefffe3f8, region=0x580e60) + ;; at /net/stig/src/xemacs/lwlib/xlwmenu.c:2518 + "^[BW][ra][et][ac][kh]point [0-9]+, .*\\(\n\\s .*\\)*" + ;; output of the breakpoint command: + ;;Breakpoint 1 at 0x19f5c8: file /net/stig/src/xemacs/lwlib/xlwmenu.c, line 2715. + "^[BW][ra][et][ac][kh]point [0-9]+ at .*: file \\([^ ,\n]+\\), line \\([0-9]+\\)." + ;;Num Type Disp Enb Address What + ;;1 breakpoint keep y 0x0019ee60 in XlwMenuRedisplay + ;; at /net/stig/src/xemacs/lwlib/xlwmenu.c:2518 + "^[0-9]+\\s +[bw][ra][et][ac][kh]point.* in .*\\(\n\\s +\\)?at [^ :\n]+:[0-9]+\\(\n\\s .*\\)*" + ) + "list of patterns to match sdcdb's various ways of displaying a breakpoint") + +(defun sdcdbsrc-make-breakpoint-action (string) + ;; by Stig@hackvan.com + (if (or (string-match "file \\([^ ,\n]+\\), line \\([0-9]+\\)" string) + (string-match "at \\([^ :\n]+\\):\\([0-9]+\\)" string)) + (list 'sdcdbsrc-display + (match-string 1 string) + (string-to-int (match-string 2 string))))) + +(defconst sdcdb-stack-frame-pattern + ;;#9 0x62f08 in emacs_Xt_next_event (emacs_event=0x4cf804) + ;; at /net/stig/src/xemacs/src/event-Xt.c:1778 + "^#\\([0-9]+\\)\\s +\\(0x[0-9a-f]+ in .*\\|.*\\sw+.* (.*) at .*\\)\\(\n\\s .*\\)*" + "matches the first line of a sdcdb stack frame and all continuation lines. +subex 1 is frame number.") + +(defun sdcdbsrc-mode-motion (ee) + ;; by Stig@hackvan.com + (save-excursion + (set-buffer (event-buffer ee)) + (save-excursion + (if (not (event-point ee)) + (nuke-mode-motion-extent) + (goto-char (event-point ee)) + (beginning-of-line) + (while (and (not (bobp)) (eq ? (char-syntax (following-char)))) + (forward-line -1)) + (if (extent-at (point) (current-buffer) 'sdcdbsrc) + nil + (nuke-mode-motion-extent) + (cond ((looking-at-any sdcdb-breakpoint-patterns) + (set-sdcdbsrc-mode-motion-extent + (match-beginning 0) + (match-end 0) + (sdcdbsrc-make-breakpoint-action (match-string 0)))) + ((looking-at sdcdb-stack-frame-pattern) + (set-sdcdbsrc-mode-motion-extent + (match-beginning 0) + (match-end 0) + (list 'sdcdbsrc-frame + (string-to-int (match-string 1))))) + ))) + ))) + +(defun sdcdbsrc-display (file line) + ;; by Stig@hackvan.com + (select-window (display-buffer (find-file-noselect file))) + (goto-line line)) + +(defun click-inside-selection-p (click) + (or (click-inside-extent-p click primary-selection-extent) + (click-inside-extent-p click zmacs-region-extent) + )) + +(defun click-inside-extent-p (click extent) + "Returns non-nil if the button event is within the bounds of the primary +selection-extent, nil otherwise." + ;; stig@hackvan.com + (let ((ewin (event-window click)) + (epnt (event-point click))) + (and ewin + epnt + extent + (eq (window-buffer ewin) + (extent-object extent)) + (extent-start-position extent) + (> epnt (extent-start-position extent)) + (> (extent-end-position extent) epnt)))) + +(defun point-inside-extent-p (extent) + "Returns non-nil if the point is within or just after the bounds of the +primary selection-extent, nil otherwise." + ;; stig@hackvan.com + (and extent ; FIXME - I'm such a sinner... + (eq (current-buffer) + (extent-object extent)) + (> (point) (extent-start-position extent)) + (>= (extent-end-position extent) (point)))) + +(defun sdcdbsrc-select-or-yank (ee) + ;; by Stig@hackvan.com + (interactive "e") + (let ((action (save-excursion + (set-buffer (event-buffer ee)) + (and mode-motion-extent + (click-inside-extent-p ee mode-motion-extent) + (extent-property mode-motion-extent 'action))) + )) + (if action + (eval action) + (mouse-yank ee)))) + +(defvar sdcdb-print-format "" + "Set this variable to a valid format string to print c-sexps in a +different way (hex,octal, etc).") + +(defun sdcdb-print-c-sexp () + "Find the nearest c-mode sexp. Send it to sdcdb with print command." + (interactive) + (let* ((tag (find-c-sexp)) + (command (concat "print " sdcdb-print-format tag))) + (sdcdb-call-from-src command))) + +(defun sdcdbsrc-srcmode () + "Toggle between assembler & C source modes." + (sdcdb-call-from-src "set srcmode")) + +(defun sdcdb-*print-c-sexp () + "Find the nearest c-mode sexp. Send it to sdcdb with the print * command." + (interactive) + (let* ((tag (find-c-sexp)) + (command (concat "print " sdcdb-print-format "*" tag))) + (sdcdb-call-from-src command))) + +(defun sdcdb-whatis-c-sexp () + "Find the nearest c-mode sexp. Send it to sdcdb with the whatis command. " + (interactive) + (let* ((tag (sdcdbsrc-selection-or-sexp)) + (command (concat "ptype " tag))) + (sdcdb-call-from-src command))) + +(defun sdcdbsrc-goto-sdcdb () + "Hop back and forth between the sdcdb interaction buffer and the sdcdb source +buffer. " + ;; by Stig@hackvan.com + (interactive) + (let ((gbuf (or sdcdbsrc-associated-buffer current-sdcdb-buffer))) + (cond ((eq (current-buffer) gbuf) + (and sdcdb-arrow-extent + (extent-object sdcdb-arrow-extent) + (progn (pop-to-buffer (extent-object sdcdb-arrow-extent)) + (goto-char (extent-start-position sdcdb-arrow-extent))))) + ((buffer-name gbuf) (pop-to-buffer gbuf)) + ((y-or-n-p "No debugger. Start a new one? ") + (call-interactively 'sdcdbsrc)) + (t (error "No sdcdb buffer.")) + ))) + +(defvar sdcdbsrc-last-src-buffer nil) + +(defun sdcdbsrc-goto-src () + (interactive) + (let* ((valid (and sdcdbsrc-last-src-buffer + (memq sdcdbsrc-last-src-buffer (buffer-list)))) + (win (and valid + (get-buffer-window sdcdbsrc-last-src-buffer)))) + (cond (win (select-window win)) + (valid (pop-to-buffer sdcdbsrc-last-src-buffer))))) + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;;; +;;; The following functions are used to extract the closest surrounding +;;; c expression from point +;;; +(defun back-sexp () + "Version of backward-sexp that catches errors" + (condition-case nil + (backward-sexp) + (error t))) + +(defun forw-sexp () + "Version of forward-sexp that catches errors" + (condition-case nil + (forward-sexp) + (error t))) + +(defun sexp-compound-sep (span-start span-end) + "Returns '.' for '->' & '.', returns ' ' for white space, +returns '?' for other puctuation" + (let ((result ? ) + (syntax)) + (while (< span-start span-end) + (setq syntax (char-syntax (char-after span-start))) + (cond + ((= syntax ? ) t) + ((= syntax ?.) (setq syntax (char-after span-start)) + (cond + ((= syntax ?.) (setq result ?.)) + ((and (= syntax ?-) (= (char-after (+ span-start 1)) ?>)) + (setq result ?.) + (setq span-start (+ span-start 1))) + (t (setq span-start span-end) + (setq result ??))))) + (setq span-start (+ span-start 1))) + result + ) + ) + +(defun sexp-compound (first second) + "Returns non-nil if the concatenation of two S-EXPs result in a Single C +token. The two S-EXPs are represented as a cons cells, where the car +specifies the point in the current buffer that marks the begging of the +S-EXP and the cdr specifies the character after the end of the S-EXP +Link S-Exps of the form: + Sexp -> SexpC + Sexp . Sexp + Sexp (Sexp) Maybe exclude if first Sexp is: if, while, do, for, switch + Sexp [Sexp] + (Sexp) Sexp + [Sexp] Sexp" + (let ((span-start (cdr first)) + (span-end (car second)) + (syntax)) + (setq syntax (sexp-compound-sep span-start span-end)) + (cond + ((= (car first) (car second)) nil) + ((= (cdr first) (cdr second)) nil) + ((= syntax ?.) t) + ((= syntax ? ) + (setq span-start (char-after (- span-start 1))) + (setq span-end (char-after span-end)) + (cond + ((= span-start ?) ) t ) + ((= span-start ?] ) t ) + ((= span-end ?( ) t ) + ((= span-end ?[ ) t ) + (t nil)) + ) + (t nil)) + ) + ) + +(defun sexp-cur () + "Returns the S-EXP that Point is a member, Point is set to begging of S-EXP. +The S-EXPs is represented as a cons cell, where the car specifies the point in +the current buffer that marks the begging of the S-EXP and the cdr specifies +the character after the end of the S-EXP" + (let ((p (point)) (begin) (end)) + (back-sexp) + (setq begin (point)) + (forw-sexp) + (setq end (point)) + (if (>= p end) + (progn + (setq begin p) + (goto-char p) + (forw-sexp) + (setq end (point)) + ) + ) + (goto-char begin) + (cons begin end) + ) + ) + +(defun sexp-prev () + "Returns the previous S-EXP, Point is set to begging of that S-EXP. +The S-EXPs is represented as a cons cell, where the car specifies the point in +the current buffer that marks the begging of the S-EXP and the cdr specifies +the character after the end of the S-EXP" + (let ((begin) (end)) + (back-sexp) + (setq begin (point)) + (forw-sexp) + (setq end (point)) + (goto-char begin) + (cons begin end)) +) + +(defun sexp-next () + "Returns the following S-EXP, Point is set to begging of that S-EXP. +The S-EXPs is represented as a cons cell, where the car specifies the point in +the current buffer that marks the begging of the S-EXP and the cdr specifies +the character after the end of the S-EXP" + (let ((begin) (end)) + (forw-sexp) + (forw-sexp) + (setq end (point)) + (back-sexp) + (setq begin (point)) + (cons begin end) + ) + ) + +(defun find-c-sexp () + "Returns the Complex S-EXP that surrounds Point" + (interactive) + (save-excursion + (let ((p) (sexp) (test-sexp)) + (setq p (point)) + (setq sexp (sexp-cur)) + (setq test-sexp (sexp-prev)) + (while (sexp-compound test-sexp sexp) + (setq sexp (cons (car test-sexp) (cdr sexp))) + (goto-char (car sexp)) + (setq test-sexp (sexp-prev)) + ) + (goto-char p) + (setq test-sexp (sexp-next)) + (while (sexp-compound sexp test-sexp) + (setq sexp (cons (car sexp) (cdr test-sexp))) + (setq test-sexp (sexp-next)) + ) + (buffer-substring (car sexp) (cdr sexp)) + ) + ) + ) + +(defun sdcdbsrc-selection-or-sexp (&optional ee) + ;; FIXME - fix this docstring + "If the EVENT is within the primary selection, then return the selected +text, otherwise parse the expression at the point of the mouse click and +return that. If EVENT is nil, then return the C sexp at point." + ;; stig@hackvan.com + (cond ((or (and ee (click-inside-selection-p ee)) + (and (not ee) (point-inside-selection-p))) + (replace-in-string (extent-string primary-selection-extent) "\n\\s *" " ")) + (ee + (sdcdbsrc-get-csexp-at-click ee)) + (t + (find-c-sexp)) + )) + +(defun sdcdbsrc-get-csexp-at-click (ee) + "Returns the containing s-expression located at the mouse cursor to point." + ;; " + ;; by Stig@hackvan.com + (let ((ewin (event-window ee)) + (epnt (event-point ee))) + (or (and ewin epnt) + (error "Must click within a window")) + (save-excursion + (set-buffer (window-buffer ewin)) + (save-excursion + (goto-char epnt) + (find-c-sexp))))) + +(defun sdcdbsrc-print-csexp (&optional ee) + (interactive) + (or ee (setq ee current-mouse-event)) + (sdcdb-call-from-src + (concat "print " sdcdb-print-format (sdcdbsrc-selection-or-sexp ee)))) + +(defun sdcdbsrc-*print-csexp (&optional ee) + (interactive) + (or ee (setq ee current-mouse-event)) + (sdcdb-call-from-src + (concat "print *" sdcdb-print-format (sdcdbsrc-selection-or-sexp ee)))) + +;; (defun sdcdbsrc-print-region (arg) +;; (let (( command (concat "print " sdcdb-print-format (x-get-cut-buffer)))) +;; (sdcdb-call-from-src command))) +;; +;; (defun sdcdbsrc-*print-region (arg) +;; (let (( command (concat "print *" sdcdb-print-format (x-get-cut-buffer)))) +;; (sdcdb-call-from-src command))) + +(defun sdcdbsrc-file:lno () + "returns \"file:lno\" specification for location of point. " + ;; by Stig@hackvan.com + (format "%s:%d" + (file-name-nondirectory buffer-file-name) + (save-restriction + (widen) + (1+ (count-lines (point-min) + (save-excursion (beginning-of-line) (point))))) + )) + +(defun sdcdbsrc-set-break (ee) + "Sets a breakpoint. Click on the selection and it will set a breakpoint +using the selected text. Click anywhere in a source file, and it will set +a breakpoint at that line number of that file." + ;; by Stig@hackvan.com + ;; there is already sdcdb-break, so this only needs to work with mouse clicks. + (interactive "e") + (sdcdb-call-from-src + (concat "break " + (if (click-inside-selection-p ee) + (extent-string primary-selection-extent) + (mouse-set-point ee) + (or buffer-file-name (error "No file in window")) + (- (sdcdbsrc-file:lno) 1) + )))) + +(defun sdcdbsrc-set-tbreak-continue (&optional ee) + "Set a temporary breakpoint at the position of the mouse click and then +continues. This can be bound to either a key or a mouse button." + ;; by Stig@hackvan.com + (interactive) + (or ee (setq ee current-mouse-event)) + (and ee (mouse-set-point ee)) + (sdcdb-call-from-src (concat "tbreak " (sdcdbsrc-file:lno))) + (sdcdb-call-from-src "c")) + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;; Functions extended from sdcdb.el for sdcdbsrc. +;; +;; sdcdbsrc-set-buffer - added a check to set buffer to sdcdbsrc-associated-buffer +;; to handle multiple sdcdb sessions being driven from src +;; files. + +(require 'advice) + +(defadvice sdcdb-set-buffer (after sdcdbsrc activate) ; () + "Advised to work from a source buffer instead of just the sdcdb buffer." + ;; by Stig@hackvan.com + ;; the operations below have tests which are disjoint from the tests in + ;; the original `sdcdb-set-buffer'. Current-sdcdb-buffer cannot be set twice. + (and sdcdbsrc-call-p + sdcdbsrc-associated-buffer + (setq current-sdcdb-buffer sdcdbsrc-associated-buffer))) + +(defadvice sdcdb-display-line (around sdcdbsrc activate) + ;; (true-file line &optional select-method) + "Advised to select the source buffer instead of the sdcdb-buffer" + ;; by Stig@hackvan.com + (ad-set-arg 2 'source) ; tell it not to select the sdcdb window + ad-do-it + (save-excursion + (let* ((buf (extent-object sdcdb-arrow-extent)) + (win (get-buffer-window buf))) + (setq sdcdbsrc-last-src-buffer buf) + (select-window win) + (set-window-point win (extent-start-position sdcdb-arrow-extent)) + (set-buffer buf)) + (and sdcdbsrc-active-p + (not sdcdbsrc-mode) + (not (eq (current-buffer) current-sdcdb-buffer)) + (sdcdbsrc-mode 1)))) + +(defadvice sdcdb-filter (after sdcdbsrc activate) ; (proc string) + ;; by Stig@hackvan.com + ;; if we got a sdcdb prompt and it wasn't a sdcdbsrc command, then it's sdcdb + ;; hitting a breakpoint or having a core dump, so bounce back to the sdcdb + ;; window. + (let* ((selbuf (window-buffer (selected-window))) + win) + ;; if we're at a sdcdb prompt, then display the buffer + (and (save-match-data (string-match sdcdb-prompt-pattern (ad-get-arg 1))) + (prog1 + (not sdcdbsrc-call-p) + (setq sdcdbsrc-call-p nil)) + (setq win (display-buffer current-sdcdb-buffer)) + ;; if we're not in either the source buffer or the sdcdb buffer, + ;; then select the window too... + (not (eq selbuf current-sdcdb-buffer)) + (not (eq selbuf sdcdbsrc-last-src-buffer)) + (progn + (ding nil 'warp) + (select-window win))) + )) + +(defun sdcdbsrc-reset () + ;; tidy house and turn off sdcdbsrc-mode in all buffers + ;; by Stig@hackvan.com + (sdcdb-delete-arrow-extent) + (setq sdcdbsrc-global-mode nil) + (mapcar #'(lambda (buffer) + (set-buffer buffer) + (cond ((eq sdcdbsrc-associated-buffer current-sdcdb-buffer) + (sdcdbsrc-mode -1)))) + (buffer-list))) + +(defadvice sdcdb-sentinel (after sdcdbsrc freeze) ; (proc msg) + ;; by Stig@hackvan.com + (sdcdbsrc-reset) + (message "Sdcdbsrc finished")) + +(provide 'sdcdbsrc) diff --git a/debugger/mcs51/simi.c b/debugger/mcs51/simi.c new file mode 100644 index 0000000..c44b407 --- /dev/null +++ b/debugger/mcs51/simi.c @@ -0,0 +1,785 @@ +/*------------------------------------------------------------------------- + simi.c - source file for simulator interaction + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "sdcdb.h" +#include "simi.h" +#include "newalloc.h" + +#ifdef _WIN32 +#include +#include +#include +#include +#include +#else +#ifdef HAVE_SYS_SOCKET_H +#include +#include +#include +#include +#include +#include +#else +#error "Cannot build debugger without socket support" +#endif +#endif + +FILE *simin ; /* stream for simulator input */ +FILE *simout; /* stream for simulator output */ + +#ifdef _WIN32 +SOCKET sock = INVALID_SOCKET; +PROCESS_INFORMATION *simPid = NULL; +#else +int sock = -1; /* socket descriptor to comm with simulator */ +pid_t simPid = -1; +#endif +static char simibuff[MAX_SIM_BUFF]; /* sim buffer */ +static char regBuff[MAX_SIM_BUFF]; +static char *sbp = simibuff; /* simulator buffer pointer */ +extern char **environ; +char simactive = 0; + +static memcache_t memCache[NMEM_CACHE]; + +/*-----------------------------------------------------------------*/ +/* get data from memory cache/ load cache from simulator */ +/*-----------------------------------------------------------------*/ +static char *getMemCache(unsigned int addr,int cachenum, int size) +{ + char *resp, *buf; + unsigned int laddr; + memcache_t *cache = &memCache[cachenum]; + + if ( cache->size <= 0 || + cache->addr > addr || + cache->addr + cache->size < addr + size ) + { + if ( cachenum == IMEM_CACHE ) + { + sendSim("di 0x0 0xff\n"); + } + else if ( cachenum == SREG_CACHE ) + { + sendSim("ds 0x80 0xff\n"); + } + else + { + laddr = addr & 0xffffffc0; + sprintf(cache->buffer,"dx 0x%x 0x%x\n",laddr,laddr+0xff ); + sendSim(cache->buffer); + } + waitForSim(100,NULL); + resp = simResponse(); + cache->addr = strtol(resp,0,0); + buf = cache->buffer; + cache->size = 0; + while ( *resp && *(resp+1) && *(resp+2)) + { + /* cache is a stringbuffer with ascii data like + " 00 00 00 00 00 00 00 00" + */ + resp += 2; + laddr = 0; + /* skip thru the address part */ + while (isxdigit(*resp)) resp++; + while ( *resp && *resp != '\n') + { + if ( laddr < 24 ) + { + laddr++ ; + *buf++ = *resp ; + } + resp++; + } + resp++ ; + cache->size += 8; + } + *buf = '\0'; + if ( cache->addr > addr || + cache->addr + cache->size < addr + size ) + return NULL; + } + return cache->buffer + (addr - cache->addr)*3; +} + +/*-----------------------------------------------------------------*/ +/* invalidate memory cache */ +/*-----------------------------------------------------------------*/ +static void invalidateCache( int cachenum ) +{ + memCache[cachenum].size = 0; +} + +/*-----------------------------------------------------------------*/ +/* waitForSim - wait till simulator is done its job */ +/*-----------------------------------------------------------------*/ +void waitForSim(int timeout_ms, char *expect) +{ + int i=0; + int ch; + +Dprintf(D_simi, ("simi: waitForSim start(%d)\n", timeout_ms)); + sbp = simibuff; + + while ((ch = fgetc(simin)) > 0 ) { + *sbp++ = ch; + } + *sbp = 0; + Dprintf(D_simi, ("waitForSim(%d) got[%s]\n", timeout_ms, simibuff)); + +} + +/*-----------------------------------------------------------------*/ +/* openSimulator - create a pipe to talk to simulator */ +/*-----------------------------------------------------------------*/ +#ifdef _WIN32 +static void init_winsock(void) +{ + static int is_initialized = 0; + + if (!is_initialized) + { + WSADATA wsaData; + int iResult; + + // Initialize Winsock + if (0 != WSAStartup(MAKEWORD(2,2), &wsaData)) + { + fprintf(stderr, "WSAStartup failed: %d\n", iResult); + exit(1); + } + } +} + +static char *argsToCmdLine(char **args, int nargs) +{ +#define CHUNCK 256 + int i; + int cmdPos = 0; + char *cmd = Safe_malloc(CHUNCK); + int cmdLen = CHUNCK; + + for (i = 0; i < nargs; i++) + { + int quote = 0; + int argLen = strlen(args[i]); + + if (NULL != strchr(args[i], ' ')) + { + quote = 1; + argLen += 2; + } + + if (0 < i) + ++argLen; + + if (cmdPos + argLen >= cmdLen) + { + do + { + cmdLen += cmdLen; + } + while (cmdPos + argLen >= cmdLen); + cmd = Safe_realloc(cmd, cmdLen); + } + + if (0 < i) + { + cmd[cmdPos++] = ' '; + --argLen; + } + + if (quote) + { + cmd[cmdPos++] = '"'; + --argLen; + } + + memcpy(&cmd[cmdPos], args[i], argLen); + cmdPos += argLen; + + if (quote) + cmd[cmdPos++] = '"'; + } + + cmd[cmdPos] = '\0'; + + return cmd; +} + +static PROCESS_INFORMATION *execSimulator(char **args, int nargs) +{ + STARTUPINFO si; + static PROCESS_INFORMATION pi; + char *cmdLine = argsToCmdLine(args, nargs); + + memset(&si, 0, sizeof(si)); + si.cb = sizeof(si); + memset(&pi, 0, sizeof(pi)); + + // Start the child process. + if (!CreateProcess(NULL, // No module name (use command line) + cmdLine, // Command line + NULL, // Process handle not inheritable + NULL, // Thread handle not inheritable + FALSE, // Set handle inheritance to FALSE + 0, // No creation flags + NULL, // Use parent's environment block + NULL, // Use parent's starting directory + &si, // Pointer to STARTUPINFO structure + &pi) // Pointer to PROCESS_INFORMATION structure + ) + { + Safe_free(cmdLine); + printf( "CreateProcess failed (%d).\n", GetLastError() ); + return NULL; + } + + Safe_free(cmdLine); + return π +} + +void openSimulator (char **args, int nargs) +{ + struct sockaddr_in sin; + int retry = 0; + int i; + int fh; + + init_winsock(); + + Dprintf(D_simi, ("simi: openSimulator\n")); +#ifdef SDCDB_DEBUG + if (D_simi & sdcdbDebug) + { + printf("simi: openSimulator: "); + for (i=0; i < nargs; i++ ) + { + printf("arg%d: %s ",i,args[i]); + } + printf("\n"); + } +#endif + invalidateCache(XMEM_CACHE); + invalidateCache(IMEM_CACHE); + invalidateCache(SREG_CACHE); + + if (INVALID_SOCKET == (sock = WSASocket(PF_INET, SOCK_STREAM, IPPROTO_TCP, NULL, 0, 0))) { + fprintf(stderr, "cannot create socket: %d\n", WSAGetLastError()); + exit(1); + } + + memset(&sin,0,sizeof(sin)); + sin.sin_family = AF_INET; + sin.sin_addr.s_addr = inet_addr("127.0.0.1"); + sin.sin_port = htons(9756); + + try_connect: + /* connect to the simulator */ + if (SOCKET_ERROR == connect(sock, (struct sockaddr *)&sin, sizeof(sin))) + { + /* if failed then wait 1 second & try again + do this for 10 secs only */ + if (retry < 10) + { + if ( !retry ) + simPid = execSimulator(args, nargs); + retry ++; + Sleep(1000); + goto try_connect; + } + perror("connect failed :"); + exit(1); + } + + fh = _open_osfhandle((intptr_t)sock, _O_TEXT); + if (-1 == fh) + { + perror("cannot _open_osfhandle"); + exit(1); + } + + /* go the socket now turn it into a file handle */ + if (!(simin = fdopen(fh, "r"))) + { + perror("cannot open socket for read"); + exit(1); + } + + fh = _open_osfhandle((intptr_t)sock, _O_TEXT); + if (-1 == fh) + { + perror("cannot _open_osfhandle"); + exit(1); + } + + if (!(simout = fdopen(fh, "w"))) + { + perror("cannot open socket for write"); + exit(1); + } + /* now that we have opened, wait for the prompt */ + waitForSim(200, NULL); + simactive = 1; +} +#else +static int execSimulator(char **args, int nargs) +{ + if ((simPid = fork())) + { + Dprintf(D_simi, ("simi: simulator pid %d\n",(int) simPid)); + } + else + { + /* we are in the child process : start the simulator */ + signal(SIGINT , SIG_IGN ); + signal(SIGABRT, SIG_IGN ); + signal(SIGHUP , SIG_IGN ); + signal(SIGCHLD, SIG_IGN ); + + if (execvp(args[0],args) < 0) + { + perror("cannot exec simulator"); + exit(1); + } + } + return simPid; +} + +void openSimulator (char **args, int nargs) +{ + struct sockaddr_in sin; + int retry = 0; + int i; + Dprintf(D_simi, ("simi: openSimulator\n")); +#ifdef SDCDB_DEBUG + if (D_simi & sdcdbDebug) + { + printf("simi: openSimulator: "); + for (i=0; i < nargs; i++ ) + { + printf("arg%d: %s ",i,args[i]); + } + printf("\n"); + } +#endif + invalidateCache(XMEM_CACHE); + invalidateCache(IMEM_CACHE); + invalidateCache(SREG_CACHE); + + if ((sock = socket(AF_INET,SOCK_STREAM,0)) < 0) + { + perror("cannot create socket"); + exit(1); + } + + memset(&sin,0,sizeof(sin)); + sin.sin_family = AF_INET; + sin.sin_addr.s_addr = inet_addr("127.0.0.1"); + sin.sin_port = htons(9756); + + try_connect: + /* connect to the simulator */ + if (connect(sock,(struct sockaddr *) &sin, sizeof(sin)) < 0) + { + /* if failed then wait 1 second & try again + do this for 10 secs only */ + if (retry < 10) + { + if ( !retry ) + { + simPid = execSimulator(args, nargs); + } + retry ++; + sleep (1); + goto try_connect; + } + perror("connect failed :"); + exit(1); + } + /* go the socket now turn it into a file handle */ + if (!(simin = fdopen(sock,"r"))) + { + fprintf(stderr,"cannot open socket for read\n"); + exit(1); + } + + if (!(simout = fdopen(sock,"w"))) + { + fprintf(stderr,"cannot open socket for write\n"); + exit(1); + } + /* now that we have opened, wait for the prompt */ + waitForSim(200,NULL); + simactive = 1; +} +#endif + +/*-----------------------------------------------------------------*/ +/* simResponse - returns buffer to simulator's response */ +/*-----------------------------------------------------------------*/ +char *simResponse(void) +{ + return simibuff; +} + +/*-----------------------------------------------------------------*/ +/* sendSim - sends a command to the simuator */ +/*-----------------------------------------------------------------*/ +void sendSim(char *s) +{ + if ( ! simout ) + return; + + Dprintf(D_simi, ("simi: sendSim-->%s", s)); // s has LF at end already + fputs(s,simout); + fflush(simout); +} + + +static int getMemString(char *buffer, char wrflag, + unsigned int *addr, char mem, int size ) +{ + int cachenr = NMEM_CACHE; + char *prefix; + char *cmd ; + + if ( wrflag ) + cmd = "set mem"; + else + cmd = "dump"; + buffer[0] = '\0' ; + + switch (mem) + { + case 'A': /* External stack */ + case 'F': /* External ram */ + prefix = "xram"; + cachenr = XMEM_CACHE; + break; + case 'C': /* Code */ + case 'D': /* Code / static segment */ + prefix = "rom"; + break; + case 'B': /* Internal stack */ + case 'E': /* Internal ram (lower 128) bytes */ + case 'G': /* Internal ram */ + prefix = "iram"; + cachenr = IMEM_CACHE; + break; + case 'H': /* Bit addressable */ + case 'J': /* SBIT space */ + cachenr = BIT_CACHE; + if ( wrflag ) + { + cmd = "set bit"; + } + sprintf(buffer,"%s 0x%x\n",cmd,*addr); + return cachenr; + break; + case 'I': /* SFR space */ + prefix = "sfr" ; + cachenr = SREG_CACHE; + break; + case 'R': /* Register space */ + prefix = "iram"; + /* get register bank */ + cachenr = simGetValue (0xd0,'I',1); + *addr += cachenr & 0x18 ; + cachenr = IMEM_CACHE; + break; + default: + case 'Z': /* undefined space code */ + return cachenr; + } + if ( wrflag ) + sprintf(buffer,"%s %s 0x%x\n",cmd,prefix,*addr); + else + sprintf(buffer,"%s %s 0x%x 0x%x\n",cmd,prefix,*addr,*addr+size-1); + return cachenr; +} + +void simSetPC( unsigned int addr ) +{ + char buffer[40]; + sprintf(buffer,"pc %d\n", addr); + sendSim(buffer); + waitForSim(100,NULL); + simResponse(); +} + +int simSetValue (unsigned int addr,char mem, int size, unsigned long val) +{ + char cachenr, i; + char buffer[40]; + char *s; + + if ( size <= 0 ) + return 0; + + cachenr = getMemString(buffer,1,&addr,mem,size); + if ( cachenr < NMEM_CACHE ) + { + invalidateCache(cachenr); + } + s = buffer + strlen(buffer) -1; + for ( i = 0 ; i < size ; i++ ) + { + sprintf(s," 0x%lx", val & 0xff); + s += strlen(s); + val >>= 8; + } + sprintf(s,"\n"); + sendSim(buffer); + waitForSim(100,NULL); + simResponse(); + return 0; +} + + +/*-----------------------------------------------------------------*/ +/* simGetValue - get value @ address for mem space */ +/*-----------------------------------------------------------------*/ +unsigned long simGetValue (unsigned int addr,char mem, int size) +{ + unsigned int b[4] = {0,0,0,0}; /* can be a max of four bytes long */ + char cachenr, i; + char buffer[40]; + char *resp; + + if ( size <= 0 ) + return 0; + + cachenr = getMemString(buffer,0,&addr,mem,size); + + resp = NULL; + if ( cachenr < NMEM_CACHE ) + { + resp = getMemCache(addr,cachenr,size); + } + if ( !resp ) + { + /* create the simulator command */ + sendSim(buffer); + waitForSim(100,NULL); + resp = simResponse(); + + /* got the response we need to parse it the response + is of the form + [address] [v] [v] [v] ... special case in + case of bit variables which case it becomes + [address] [assembler bit address] [v] */ + /* first skip thru white space */ + resp = trim_left(resp); + + if (strncmp(resp, "0x",2) == 0) + resp += 2; + + /* skip thru the address part */ + while (isxdigit(*resp)) resp++; + + } + /* make the branch for bit variables */ + if ( cachenr == BIT_CACHE) + { + /* skip until newline */ + while (*resp && *resp != '\n' ) resp++ ; + if ( *--resp != '0' ) + b[0] = 1; + } + else + { + for (i = 0 ; i < size ; i++ ) + { + /* skip white space */ + resp = trim_left(resp); + + b[i] = strtol(resp,&resp,16); + } + } + + return b[0] | b[1] << 8 | b[2] << 16 | b[3] << 24 ; + +} + +/*-----------------------------------------------------------------*/ +/* simSetBP - set break point for a given address */ +/*-----------------------------------------------------------------*/ +void simSetBP (unsigned int addr) +{ + char buff[50]; + + sprintf(buff,"break 0x%x\n",addr); + sendSim(buff); + waitForSim(100,NULL); +} + +/*-----------------------------------------------------------------*/ +/* simClearBP - clear a break point */ +/*-----------------------------------------------------------------*/ +void simClearBP (unsigned int addr) +{ + char buff[50]; + + sprintf(buff,"clear 0x%x\n",addr); + sendSim(buff); + waitForSim(100,NULL); +} + +/*-----------------------------------------------------------------*/ +/* simLoadFile - load the simulator file */ +/*-----------------------------------------------------------------*/ +void simLoadFile (char *s) +{ + char buff[128]; + + sprintf(buff,"file \"%s\"\n",s); + printf("%s",buff); + sendSim(buff); + waitForSim(500,NULL); +} + +/*-----------------------------------------------------------------*/ +/* simGoTillBp - send 'go' to simulator till a bp then return addr */ +/*-----------------------------------------------------------------*/ +unsigned int simGoTillBp ( unsigned int gaddr) +{ + char *sr; + unsigned addr ; + char *sfmt; + int wait_ms = 1000; + + invalidateCache(XMEM_CACHE); + invalidateCache(IMEM_CACHE); + invalidateCache(SREG_CACHE); + if (gaddr == 0) { + /* initial start, start & stop from address 0 */ + //char buf[20]; + + // this program is setting up a bunch of breakpoints automatically + // at key places. Like at startup & main() and other function + // entry points. So we don't need to setup one here.. + //sendSim("break 0x0\n"); + //sleep(1); + //waitForSim(); + + sendSim("reset\n"); + waitForSim(wait_ms, NULL); + sendSim("run 0x0\n"); + } else if (gaddr == -1) { /* resume */ + sendSim ("run\n"); + wait_ms = 100; + } + else if (gaddr == 1 ) { /* nexti or next */ + sendSim ("next\n"); + wait_ms = 100; + } + else if (gaddr == 2 ) { /* stepi or step */ + sendSim ("step\n"); + wait_ms = 100; + } + else { + printf("Error, simGoTillBp > 0!\n"); + exit(1); + } + + waitForSim(wait_ms, NULL); + + /* get the simulator response */ + sr = simResponse(); + /* check for errors */ + while ( *sr ) + { + while ( *sr && *sr != 'E' ) sr++ ; + if ( !*sr ) + break; + if ( ! strncmp(sr,"Error:",6)) + { + fputs(sr,stdout); + break; + } + sr++ ; + } + + nointerrupt = 1; + /* get answer of stop command */ + if ( userinterrupt ) + waitForSim(wait_ms, NULL); + + /* better solution: ask pc */ + sendSim ("pc\n"); + waitForSim(100, NULL); + sr = simResponse(); + nointerrupt = 0; + + gaddr = strtol(sr+3,0,0); + return gaddr; +} + +/*-----------------------------------------------------------------*/ +/* simReset - reset the simulator */ +/*-----------------------------------------------------------------*/ +void simReset (void) +{ + invalidateCache(XMEM_CACHE); + invalidateCache(IMEM_CACHE); + invalidateCache(SREG_CACHE); + sendSim("res\n"); + waitForSim(100,NULL); +} + + +/*-----------------------------------------------------------------*/ +/* closeSimulator - close connection to simulator */ +/*-----------------------------------------------------------------*/ +void closeSimulator (void) +{ +#ifdef _WIN32 + if ( ! simin || ! simout || INVALID_SOCKET == sock ) +#else + if ( ! simin || ! simout || sock == -1 ) +#endif + { + simactive = 0; + return; + } + simactive = 0; + sendSim("quit\n"); + fclose (simin); + fclose (simout); + shutdown(sock,2); +#ifdef _WIN32 + closesocket(sock); + sock = -1; + if (NULL != simPid) + TerminateProcess(simPid->hProcess, 0); + // Close process and thread handles. + CloseHandle(simPid->hProcess); + CloseHandle(simPid->hThread); +#else + close(sock); + sock = -1; + if ( simPid > 0 ) + kill (simPid,SIGKILL); +#endif +} diff --git a/debugger/mcs51/simi.h b/debugger/mcs51/simi.h new file mode 100644 index 0000000..237fe27 --- /dev/null +++ b/debugger/mcs51/simi.h @@ -0,0 +1,76 @@ +/*------------------------------------------------------------------------- + simi.h - Header file for simulator interaction + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SIMI_H +#define SIMI_H + +#ifdef _WIN32 +/* ugly hack to prevent the incusion of objidl.h */ +#ifdef __MINGW32__ +#define _OLE2_H +#elif defined _MSC_VER +#define _OLE2_H_ +#endif +#include +#endif + +#define MAX_SIM_BUFF 8*1024 + +#define MAX_CACHE_SIZE 2048 +/* number of cache */ +#define IMEM_CACHE 0 +#define XMEM_CACHE 1 +#define SREG_CACHE 2 +#define NMEM_CACHE 3 +/* special index */ +#define BIT_CACHE 4 + +typedef struct _memcache +{ + int addr; + int size; + char buffer[MAX_CACHE_SIZE]; +} memcache_t; + +//#define SIMNAME "s51" +#ifdef _WIN32 +extern SOCKET sock; +#else +extern int sock; +#endif +extern char simactive; +void openSimulator (char **,int); +void waitForSim(int timeout_ms, char *expect); +void closeSimulator (); +void sendSim(char *); +char *simResponse(); +void simSetPC (unsigned int); +void simSetBP (unsigned int); +void simClearBP (unsigned int); +void simLoadFile(char *); +void simReset (); +char *simRegs() ; +unsigned int simGoTillBp (unsigned int); +unsigned long simGetValue (unsigned int ,char , int ); +int simSetValue (unsigned int ,char , int, unsigned long ); +#endif diff --git a/debugger/mcs51/symtab.c b/debugger/mcs51/symtab.c new file mode 100644 index 0000000..5473d60 --- /dev/null +++ b/debugger/mcs51/symtab.c @@ -0,0 +1,791 @@ +/*------------------------------------------------------------------------- + symtab.c - Header file for symbol table for sdcdb ( debugger ) + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "sdcdb.h" +#include "symtab.h" +#include "newalloc.h" + +structdef *structWithName (char *); +DEFSETFUNC(symWithRName); + +/*------------------------------------------------------------------*/ +/* getSize - returns size of a type chain in bits */ +/*------------------------------------------------------------------*/ +unsigned int getSize ( link *p ) +{ + /* if nothing return 0 */ + if ( ! p ) + return 0 ; + + if ( IS_SPEC(p) ) { /* if this is the specifier then */ + + switch (SPEC_NOUN(p)) { /* depending on the specifier type */ + case V_INT: + return (IS_LONG(p) ? LONGSIZE : ( IS_SHORT(p) ? SHORTSIZE: INTSIZE)) ; + case V_FLOAT: + return FLOATSIZE ; + case V_CHAR: + return CHARSIZE ; + case V_VOID: + return 0 ; + case V_STRUCT: + return SPEC_STRUCT(p)->size ; + case V_LABEL: + return 0 ; + case V_SBIT: + return BITSIZE ; + case V_BIT: + return ((SPEC_BLEN(p) / 8) + (SPEC_BLEN(p) % 8 ? 1 : 0)) ; + default : + return 0 ; + } + } + + /* this is a specifier */ + switch (DCL_TYPE(p)) { + case FUNCTION: + return 2; + case ARRAY: + return DCL_ELEM(p) * getSize (p->next) ; + case IPOINTER: + case PPOINTER: + case POINTER: + return ( PTRSIZE ) ; + case FPOINTER: + case CPOINTER: + return ( FPTRSIZE ); + case GPOINTER: + return ( GPTRSIZE ); + + default : + return 0 ; + } +} + + +/*-----------------------------------------------------------------*/ +/* parseFunc - creates a function record entry */ +/*-----------------------------------------------------------------*/ +void parseFunc (char *line) +{ + function *func ; + char *rs = line ; + int i; + + while (*rs && *rs != '(') rs++ ; + *--rs = '\0'; + + func = Safe_calloc(1,sizeof(function)); + func->sym = NULL; + applyToSetFTrue(symbols,symWithRName,line,&func->sym); + *rs++ = '0'; + if (! func->sym) + func->sym = parseSymbol(line,&rs,1); + func->sym->isfunc = 1; + func->modName = currModName ; + while(*rs && *rs != ',') rs++; + rs++; + sscanf(rs,"%d,%d,%hd",&i, + &(SPEC_INTN(func->sym->etype)), + &(SPEC_BANK(func->sym->etype))); + SPEC_INTRTN(func->sym->etype) = i; + addSet(&functions,func); +} + +/*-----------------------------------------------------------------*/ +/* parseTypeInfo - parse the type info of a symbol expects the type*/ +/* info to be of the form */ +/* ({}size = strtol (s,&bp,10); + /* bp now points to '}' ... go past it */ + s = ++bp; + while (*s != ')') { /* till we reach the end */ + link *type; + type = Safe_calloc(1,sizeof(link)); + if (*s == ',') s++; + + /* is a declarator */ + if (*s == 'D') { + s++; + switch (*s) { + case 'F': + DCL_TYPE(type) = FUNCTION; + s++; + break; + case 'G': + DCL_TYPE(type) = GPOINTER; + s++; + break; + case 'C': + DCL_TYPE(type) = CPOINTER; + s++; + break; + case 'X': + DCL_TYPE(type) = FPOINTER; + s++; + break; + case 'D': + DCL_TYPE(type) = POINTER; + s++; + break; + case 'I': + DCL_TYPE(type) = IPOINTER; + s++; + break; + case 'P': + DCL_TYPE(type) = PPOINTER; + s++; + break; + case 'A': + s++; + DCL_TYPE(type) = ARRAY ; + DCL_ELEM(type) = strtol(s,&s,10); + break; + } + } else { + /* is a specifier */ + type->class = SPECIFIER ; + s++; + switch (*s) { + case 'L': + SPEC_NOUN(type) = V_INT; + SPEC_LONG(type) = 1; + s++; + break; + case 'I': + SPEC_NOUN(type) = V_INT; + s++; + break; + case 'S': + case 'C': + SPEC_NOUN(type) = V_CHAR ; + s++; + break; + case 'V': + SPEC_NOUN(type) = V_VOID; + s++; + break; + case 'F': + SPEC_NOUN(type) = V_FLOAT; + s++; + break; + case 'T': + s++; + SPEC_NOUN(type) = V_STRUCT; + { + char *ss = strtok(strdup(s),",):"); + + SPEC_STRUCT(type) = structWithName(ss); + free(ss); + } + break; + case 'X': + s++; + SPEC_NOUN(type) = V_SBIT; + break; + case 'B': + SPEC_NOUN(type) = V_BIT; + s++; + SPEC_BSTR(type) = strtol(s,&s,10); + s++; + SPEC_BLEN(type) = strtol(s,&s,10); + break; + } + while (*s != ':') s++; + s++; + if (*s++ == 'S') + SPEC_USIGN(type) = 0; + else + SPEC_USIGN(type) = 1; + + } + + /* add the type to the symbol's type chain */ + if (sym->type) + sym->etype = sym->etype->next = type; + else + sym->type = sym->etype = type; + } + + return ++s; + +} + +/*-----------------------------------------------------------------*/ +/* symFromRec - parse a symbol record and extract and create a sym */ +/* expects the input string to be of the form */ +/* {G|F|L}'$''$' */ +/* '$' */ +/*-----------------------------------------------------------------*/ +symbol *parseSymbol (char *s, char **rs, int doadd) +{ + symbol *nsym ; + char save_ch; + char *bp = s; + + /* go the mangled name */ + for ( bp = s; *bp && *bp != '('; bp++ ); + save_ch = *--bp; + *bp = '\0'; + nsym = NULL; + if ( doadd == 2 ) + { + /* add only if not present and if linkrecord before symbol record*/ + if ( applyToSetFTrue(symbols,symWithRName,s,&nsym)) + { + if ( nsym->rname != nsym->name ) + return NULL; + doadd = 0; + } + } + if ( ! nsym ) + { + nsym = Safe_calloc(1,sizeof(symbol)); + nsym->rname = alloccpy(s,bp - s); + } + *bp = save_ch; + /* if this is a Global Symbol */ + nsym->scopetype = *s; + s++ ; + if (nsym->scopetype != 'G') { + /* get the function name it is local to */ + bp = s; + while (*s != '$') s++; + nsym->sname = alloccpy(bp,s - bp); + } + + /* next get the name */ + bp = ++s; + while ( *s != '$' ) s++; + nsym->name = alloccpy(bp,s - bp); + + s++; + /* get the level number */ + nsym->level = strtol (s,&bp,10); + s = ++bp; + /* skip the '$' & get the block number */ + nsym->block = strtol (s,&bp,10); + + s = parseTypeInfo(nsym,bp); + + /* get the address space after going past the comma */ + s++; + nsym->addrspace =*s; + + s+= 2; + nsym->isonstack = strtol(s,&s,10); + /* get the stack offset */ + s++; + nsym->offset = strtol(s,&s,10); + + if ( nsym->addrspace == 'R' ) + { + /* get registeroffset */ + while (*s && *s != '[') s++ ; + s++ ; + if ( *s == 'r' ) + { + nsym->addr = strtol(s+1,&s,10); + } + while (*s && *s != ']') s++ ; + } + + *rs = s; + if ( doadd ) addSet(&symbols,nsym); + + Dprintf(D_symtab, ("symtab: par %s(0x%x) add=%d sym=%p\n",nsym->name,nsym->addr,doadd,nsym)); + + return nsym; +} + + +/*-----------------------------------------------------------------*/ +/* parseStruct - parses a structure record expected in format */ +/* {F}$[()()()...] */ +/*-----------------------------------------------------------------*/ +structdef *parseStruct (char *s) +{ + structdef *nsdef ; + char *bp; + char *name; + symbol *fields = NULL; + + while (*s != '$') s++; + + bp =++s; + while (*s != '[') s++ ; + name = alloccpy(bp,s - bp); + nsdef = structWithName(name); + nsdef->fields = NULL; + nsdef->size = 0; + s++; + while (*s && *s != ']') { + int offset ; + symbol *sym ; + while (!isdigit(*s)) s++; + offset = strtol(s,&s,10); + while (*s != ':') s++; + s++; + sym = parseSymbol(s,&s,0); + sym->offset = offset ; + s += 3; + if (!fields) + fields = nsdef->fields = sym; + else + fields = fields->next = sym; + nsdef->size += sym->size; + } + + return nsdef; +} + +/*-----------------------------------------------------------------*/ +/* parseModule - creates a module with a given name */ +/*-----------------------------------------------------------------*/ +module *parseModule (char *s, bool createName ) +{ + module *nmod ; + char buffer[512]; + + nmod = Safe_calloc(1,sizeof(module)); + + addSet (&modules,nmod); + + + /* create copy file name */ + nmod->name = s; + + if (createName) { + sprintf(buffer,"%s.c",s); + + nmod->c_name = Safe_malloc(strlen(buffer)+1); + strcpy(nmod->c_name,buffer); + + sprintf(buffer,"%s.asm",s); + nmod->asm_name = Safe_malloc(strlen(buffer)+1); + strcpy(nmod->asm_name,buffer); + } + + return nmod; +} + +/*-----------------------------------------------------------------*/ +/* moduleWithName - finds and returns a module with a given name */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(moduleWithName) +{ + module *mod = item; + V_ARG(char *,s); + V_ARG(module **,rmod); + + if (*rmod) + return 0; + + if (strcmp(mod->name,s) == 0) { + *rmod = mod ; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* moduleWithCName - finds and returns a module with a given c_name*/ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(moduleWithCName) +{ + module *mod = item; + V_ARG(char *,s); + V_ARG(module **,rmod); + + if (*rmod) + return 0; + if (strcmp(mod->c_name,s) == 0) { + *rmod = mod; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* moduleWithAsmName - finds & returns a module with given asm_name*/ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(moduleWithAsmName) +{ + module *mod = item; + V_ARG(char *,s); + V_ARG(module **,rmod); + + if (*rmod) + return 0; + if (strcmp(mod->asm_name,s) == 0) { + *rmod = mod; + return 1; + } + + return 0; +} + + +/*-----------------------------------------------------------------*/ +/* structWithName - returns a structure with a given name */ +/*-----------------------------------------------------------------*/ +structdef *structWithName (char *s) +{ + int i; + structdef *nsdef ; + + /* go thru the struct table looking for a match */ + for ( i = 0 ; i < nStructs ; i++ ) { + + if (strcmp(currModName,structs[i]->sname) == 0 && + strcmp(s,structs[i]->tag) == 0) + return structs[i]; + } + + nsdef = Safe_calloc(1,sizeof(structdef)); + nsdef->tag = alloccpy(s,strlen(s)); + nsdef->sname = currModName ; + + nStructs++; + structs = (struct structdef **)resize((void **)structs,nStructs); + structs[nStructs-1] = nsdef; + return nsdef; +} + +/*-----------------------------------------------------------------*/ +/* symWithRName - look for symbol with mangled name = parm */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(symWithRName) +{ + symbol *sym = item; + V_ARG(char *,s); + V_ARG(symbol **,rsym); + + if (*rsym) + return 0; + + if (strcmp(sym->rname,s) == 0) { + *rsym = sym; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* funcWithRName - look for function with name */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(funcWithRName) +{ + function *func = item; + V_ARG(char *,s); + V_ARG(function **,rfunc); + + if (*rfunc) + return 0; + + if (strcmp(func->sym->rname,s) == 0) { + *rfunc = func; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* symLocal - local symbol respecting blocks & levels */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(symLocal) +{ + symbol *sym = item; + V_ARG(char *,name); + V_ARG(char *,sname); + V_ARG(int ,block); + V_ARG(int ,level); + V_ARG(symbol **,rsym); + + if (strcmp(name,sym->name) == 0 && /* name matches */ + sym->scopetype != 'G' && /* local scope */ + (sym->sname && strcmp(sym->sname,sname) == 0) && /* scope == specified scope */ + sym->block <= block && /* block & level kindo matches */ + sym->level <= level) { + + /* if a symbol was previously found then + sure that ones block & level are less + then this one */ + if (*rsym && (*rsym)->block >= block && + (*rsym)->level >= level) + return 0; + + *rsym = sym; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* symGlobal - return global symbol of name */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC(symGlobal) +{ + symbol *sym = item; + V_ARG(char *,name); + V_ARG(symbol **,rsym); + + if (*rsym) + return 0; + + /* simple :: global & name matches */ + if (sym->scopetype == 'G' && + strcmp(sym->name,name) == 0) { + *rsym = sym; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* symLookup - determine symbol from name & context */ +/*-----------------------------------------------------------------*/ +symbol *symLookup (char *name, context *ctxt) +{ + symbol *sym = NULL ; + + if ((ctxt) && (ctxt->func) && + (ctxt->func->sym) && (ctxt->func->sym->name)) { + /* first try & find a local variable for the given name */ + if ( applyToSet(symbols,symLocal, + name, + ctxt->func->sym->name, + ctxt->block, + ctxt->level, + &sym)) + return sym; + sym = NULL; + } + + if ((ctxt) && (ctxt->func) && + (ctxt->func->mod) && (ctxt->func->mod->name)) { + /* then try local to this module */ + if (applyToSet(symbols,symLocal, + name, + ctxt->func->mod->name, + 0,0,&sym)) + return sym; + sym = NULL; + } + + /* no:: try global */ + if ( applyToSet(symbols,symGlobal,name,&sym)) + return sym; + + /* cannot find return null */ + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* lnkFuncEnd - link record for end of function */ +/*-----------------------------------------------------------------*/ +static void lnkFuncEnd (char *s) +{ + char sname[128], *bp = sname; + function *func; + + /* copy till we get to a ':' */ + while ( *s != ':' ) + *bp++ = *s++; + bp -= 1; + *bp = '\0'; + + func = NULL; + if (!applyToSet(functions,funcWithRName,sname,&func)) + return ; + + s++; + sscanf(s,"%x",&func->sym->eaddr); + + Dprintf(D_symtab, ("symtab: ead %s(0x%x)\n",func->sym->name,func->sym->eaddr)); +} + +/*-----------------------------------------------------------------*/ +/* lnkSymRec - record for a symbol */ +/*-----------------------------------------------------------------*/ +static void lnkSymRec (char *s) +{ + char *bp, save_ch ; + symbol *sym; + + /* search to a ':' */ + for ( bp = s; *bp && *bp != ':'; bp++ ); + save_ch = *--bp; + *bp = '\0'; + + + sym = NULL; + applyToSetFTrue(symbols,symWithRName,s,&sym); + if (! sym) + { + sym = Safe_calloc(1,sizeof(symbol)); + sym->rname = alloccpy(s,bp - s); + sym->scopetype = *s; + sym->name = sym->rname; + addSet(&symbols,sym); + } + *bp = save_ch; + if ( *bp ) + { + sscanf(bp+2,"%x",&sym->addr); + } + Dprintf(D_symtab, ("symtab: lnk %s(0x%x)\n",sym->name,sym->addr)); +} + +/*-----------------------------------------------------------------*/ +/* lnkAsmSrc - process linker record for asm sources */ +/*-----------------------------------------------------------------*/ +static void lnkAsmSrc (char *s) +{ + char mname[128], *bp = mname; + int line ; + unsigned addr; + module *mod = NULL; + + /* input will be of format + filename$:
*/ + while (*s != '$' && *s != '.') + *bp++ = *s++; + *bp = '\0'; + /* skip to line stuff */ + while (*s != '$') s++; + + if (!applyToSet(modules,moduleWithName,mname,&mod)) + return ; + + if (sscanf(s,"$%d:%x",&line,&addr) != 2) + return ; + + line--; + if (line < mod->nasmLines) { + mod->asmLines[line]->addr = addr; + Dprintf(D_symtab, ("symtab: asm %s(%d:0x%x) %s",mod->asm_name,line,addr,mod->asmLines[line]->src)); + } +} + +/*-----------------------------------------------------------------*/ +/* lnkCSrc - process linker output for c source */ +/*-----------------------------------------------------------------*/ +static void lnkCSrc (char *s) +{ + char mname[128], *bp = mname; + int block,level,line; + unsigned int addr; + module *mod ; + + /* input will be of format + filename.ext$$$:
*/ + /* get the module name */ + while (*s != '$' ) + *bp++ = *s++; + *bp = '\0'; + /* skip the extension */ + while (*s != '$') s++; + + if (sscanf(s,"$%d$%d$%d:%x", + &line,&level,&block,&addr) != 4) + return ; + + mod = NULL; + if (!applyToSet(modules,moduleWithCName,mname,&mod)) { + mod = parseModule(mname, FALSE); + mod->c_name = alloccpy(mname,strlen(mname)); + mod->cfullname=searchDirsFname(mod->c_name); + mod->cLines = loadFile(mod->c_name,&mod->ncLines); + } + + line--; + /* one line can have more than one address : (for loops !)*/ + if (line < mod->ncLines && line > 0 /*&& + ( !mod->cLines[line]->addr || + mod->cLines[line]->level > level )*/ ) + { + if ( mod->cLines[line]->addr != INT_MAX ) + { + /* save double line information for exepoints */ + exePoint *ep ; + ep = Safe_calloc(1,sizeof(exePoint)); + ep->addr = mod->cLines[line]->addr ; + ep->line = line; + ep->block= mod->cLines[line]->block; + ep->level= mod->cLines[line]->level; + addSet(&mod->cfpoints,ep); + Dprintf(D_symtab, ("symtab: exe %s(%d:0x%x) %s",mod->c_name, + line+1,addr,mod->cLines[line]->src)); + } + mod->cLines[line]->addr = addr; + mod->cLines[line]->block = block; + mod->cLines[line]->level = level; + Dprintf(D_symtab, ("symtab: ccc %s(%d:0x%x) %s",mod->c_name, + line+1,addr,mod->cLines[line]->src)); + } + return; + +} + +/*-----------------------------------------------------------------*/ +/* parseLnkRec - parses a linker generated record */ +/*-----------------------------------------------------------------*/ +void parseLnkRec (char *s) +{ + /* link records can be several types + dpeneding on the type do */ + + switch (*s) { + + /* c source line address */ + case 'C': + lnkCSrc(s+2); + break; + /* assembler source address */ + case 'A': + lnkAsmSrc(s+2); + break; + + case 'X': + lnkFuncEnd(s+1); + break; + + default : + lnkSymRec(s); + break; + } +} diff --git a/debugger/mcs51/symtab.h b/debugger/mcs51/symtab.h new file mode 100644 index 0000000..80eff67 --- /dev/null +++ b/debugger/mcs51/symtab.h @@ -0,0 +1,247 @@ +/*------------------------------------------------------------------------- + symtab.h - Header file for symbol table for sdcdb ( debugger ) + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SYMTAB_H +#define SYMTAB_H + +#define MAX_NEST_LEVEL 256 +#define SDCC_NAME_MAX 64 + +typedef struct structdef { + char *tag ; /* tag part of structure */ + unsigned char level ; /* Nesting level */ + struct symbol *fields ; /* pointer to fields */ + unsigned size ; /* sizeof the table in bytes */ + char *sname ; /* scope name */ + char scopetype ; /* scope type 'G' or 'F' */ +} structdef ; + +/* noun definitions */ +enum { V_INT = 0, + V_FLOAT , + V_CHAR , + V_VOID , + V_STRUCT , + V_LABEL , + V_BIT , + V_SBIT }; + +/* storage class */ +enum { S_FIXED = 0, + S_AUTO , + S_REGISTER , + S_CONSTANT , + S_SFR , + S_SBIT , + S_CODE , + S_XDATA , + S_DATA , + S_IDATA , + S_PDATA , + S_LITERAL , + S_STACK , + S_XSTACK , + S_BIT }; + +/* specifier is the last in the type-chain */ +typedef struct specifier { + unsigned noun ; /* CHAR INT STRUCTURE LABEL */ + unsigned sclass ; /* REGISTER,AUTO,FIX,CONSTANT */ + unsigned _long : 1 ; /* 1=long */ + unsigned _short: 1 ; /* 1=short int */ + unsigned _unsigned: 1 ; /* 1=unsigned, 0=signed */ + unsigned _static: 1 ; /* 1=static keyword found */ + unsigned _extern: 1 ; /* 1=extern found */ + unsigned _absadr: 1 ; /* absolute address specfied */ + unsigned _reent : 1 ; /* function is reentrant */ + unsigned _intrtn: 1 ; /* this is an interrupt routin*/ + unsigned _rbank : 1 ; /* seperate register bank */ + unsigned _volatile : 1; /* is marked as volatile */ + unsigned _const:1 ; /* is a constant */ + unsigned _critical:1 ; /* critical function */ + unsigned _typedef :1 ; /* is typedefed */ + unsigned _IntNo ; /* 1=Interrupt svc routine */ + short _regbank ; /* register bank 2b used */ + unsigned _addr ; /* address of symbol */ + unsigned _stack ; /* stack offset for stacked v */ + unsigned _bitStart ; /* bit start position */ + int _bitLength ; /* bit length */ + + struct structdef *v_struct; /* structure pointer */ +} specifier ; + +/* types of declarators */ +enum { POINTER = 0, /* pointer to near data */ + FPOINTER , /* pointer to far data */ + CPOINTER , /* pointer to code space */ + GPOINTER , /* _generic pointer */ + PPOINTER , /* paged area pointer */ + IPOINTER , /* pointer to upper 128 bytes */ + UPOINTER , /* unknown pointer used only when parsing */ + ARRAY , + FUNCTION }; + +typedef struct declarator { + short dcl_type; /* POINTER,ARRAY or FUNCTION */ + short num_elem; /* # of elems if type==array */ + short ptr_const :1; /* pointer is constant */ + short ptr_volatile:1; /* pointer is volatile */ + struct link *tspec; /* pointer type specifier */ +} declarator ; + +#define DECLARATOR 0 +#define SPECIFIER 1 + +typedef struct link { + unsigned class : 1 ; /* DECLARATOR or SPECIFIER */ + unsigned tdef : 1 ; /* current link created by */ + /* typedef if this flag is set*/ + union { + specifier s ; /* if CLASS == SPECIFIER */ + declarator d ; /* if CLASS == DECLARATOR */ + } select ; + + struct link *next ; /* next element on the chain */ +} link ; + +typedef struct symbol { + char *name ; + + short size ; + short level ; /* declration lev,fld offset */ + short block ; /* sequential block # of defintion */ + short isonstack ; /* is the variable on stack */ + unsigned isfunc :1 ; /* is a functions */ + unsigned offset ; /* offset from top if struct */ + unsigned addr ; /* address if the symbol */ + unsigned eaddr ; /* end address for functions */ + char addr_type ; /* which address space */ + link *type ; /* start of type chain */ + link *etype ; /* end of type chain */ + char scopetype ; /* 'G' global, 'F' - file, 'L' local */ + char *sname ; /* if 'F' or 'L' then scope name */ + char *rname ; /* real name i.e. mangled beyond recognition */ + char addrspace ; /* address space designator */ + struct symbol *next ; +} symbol ; + +/* size's in bytes */ +#define CHARSIZE 1 +#define SHORTSIZE 1 +#define INTSIZE 2 +#define LONGSIZE 4 +#define PTRSIZE 1 +#define FPTRSIZE 2 +#define GPTRSIZE 3 +#define BITSIZE 1 +#define FLOATSIZE 4 +#define MAXBASESIZE 4 + +/* Easy Access Macros */ +#define DCL_TYPE(l) l->select.d.dcl_type +#define DCL_ELEM(l) l->select.d.num_elem +#define DCL_PTR_CONST(l) l->select.d.ptr_const +#define DCL_PTR_VOLATILE(l) l->select.d.ptr_volatile +#define DCL_TSPEC(l) l->select.d.tspec +#define SPEC_NOUN(x) x->select.s.noun +#define SPEC_LONG(x) x->select.s._long +#define SPEC_SHORT(x) x->select.s._short +#define SPEC_USIGN(x) x->select.s._unsigned +#define SPEC_SCLS(x) x->select.s.sclass +#define SPEC_OCLS(x) x->select.s.oclass +#define SPEC_STAT(x) x->select.s._static +#define SPEC_EXTR(x) x->select.s._extern +#define SPEC_CODE(x) x->select.s._codesg +#define SPEC_RENT(x) x->select.s._reent +#define SPEC_INTN(x) x->select.s._IntNo +#define SPEC_ABSA(x) x->select.s._absadr +#define SPEC_BANK(x) x->select.s._regbank +#define SPEC_ADDR(x) x->select.s._addr +#define SPEC_STAK(x) x->select.s._stack +#define SPEC_CVAL(x) x->select.s.const_val +#define SPEC_BSTR(x) x->select.s._bitStart +#define SPEC_BLEN(x) x->select.s._bitLength +#define SPEC_BNKF(x) x->select.s._rbank +#define SPEC_INTRTN(x) x->select.s._intrtn +#define SPEC_CRTCL(x) x->select.s._critical +#define SPEC_VOLATILE(x) x->select.s._volatile +#define SPEC_CONST(x) x->select.s._const +#define SPEC_STRUCT(x) x->select.s.v_struct +#define SPEC_TYPEDEF(x) x->select.s._typedef + +/* type check macros */ +#define IS_DECL(x) ( x && x->class == DECLARATOR ) +#define IS_SPEC(x) ( x && x->class == SPECIFIER ) +#define IS_ARRAY(x) (IS_DECL(x) && DCL_TYPE(x) == ARRAY) +#define IS_PTR(x) (IS_DECL(x) && (DCL_TYPE(x) == POINTER || \ + DCL_TYPE(x) == FPOINTER || \ + DCL_TYPE(x) == GPOINTER || \ + DCL_TYPE(x) == IPOINTER || \ + DCL_TYPE(x) == PPOINTER || \ + DCL_TYPE(x) == CPOINTER || \ + DCL_TYPE(x) == UPOINTER )) +#define IS_PTR_CONST(x) (IS_PTR(x) && DCL_PTR_CONST(x)) +#define IS_FARPTR(x) (IS_DECL(x) && DCL_TYPE(x) == FPOINTER) +#define IS_GENPTR(x) (IS_DECL(x) && DCL_TYPE(x) == GPOINTER) +#define IS_FUNC(x) (IS_DECL(x) && DCL_TYPE(x) == FUNCTION) +#define IS_LONG(x) (IS_SPEC(x) && x->select.s._long) +#define IS_SHORT(x) (IS_SPEC(x) && x->select.s._short) +#define IS_TYPEDEF(x) (IS_SPEC(x) && x->select.s._typedef) +#define IS_CONSTANT(x) (IS_SPEC(x) && (x->select.s.sclass == S_CONSTANT ||\ + x->select.s._const == 1)) +#define IS_STRUCT(x) (IS_SPEC(x) && x->select.s.noun == V_STRUCT) +#define IS_ABSOLUTE(x) (IS_SPEC(x) && x->select.s._absadr ) +#define IS_REGISTER(x) (IS_SPEC(x) && SPEC_SCLS(x) == S_REGISTER) +#define IS_RENT(x) (IS_SPEC(x) && x->select.s._reent ) +#define IS_STATIC(x) (IS_SPEC(x) && SPEC_STAT(x)) +#define IS_INT(x) (IS_SPEC(x) && x->select.s.noun == V_INT) +#define IS_VOID(x) (IS_SPEC(x) && x->select.s.noun == V_VOID) +#define IS_CHAR(x) (IS_SPEC(x) && x->select.s.noun == V_CHAR) +#define IS_EXTERN(x) (IS_SPEC(x) && x->select.s._extern) +#define IS_VOLATILE(x) (IS_SPEC(x) && x->select.s._volatile ) +#define IS_INTEGRAL(x) (IS_SPEC(x) && (x->select.s.noun == V_INT || \ + x->select.s.noun == V_CHAR || \ + x->select.s.noun == V_BIT || \ + x->select.s.noun == V_SBIT )) +#define IS_BITFIELD(x) (IS_SPEC(x) && (x->select.s.noun == V_BIT)) +#define IS_BITVAR(x) (IS_SPEC(x) && (x->select.s.noun == V_BIT || \ + x->select.s.noun == V_SBIT )) +#define IS_FLOAT(x) (IS_SPEC(x) && x->select.s.noun == V_FLOAT) +#define IS_ARITHMETIC(x) (IS_INTEGRAL(x) || IS_FLOAT(x)) +#define IS_AGGREGATE(x) (IS_ARRAY(x) || IS_STRUCT(x)) +#define IS_LITERAL(x) (IS_SPEC(x) && x->select.s.sclass == S_LITERAL) +#define IS_ISR(x) (IS_SPEC(x) && SPEC_INTRTN(x)) + + +symbol *parseSymbol (char *, char **, int); +structdef *parseStruct (char *); +void parseFunc (char *); +module *parseModule (char *, bool); +void parseLnkRec (char *); +symbol *symLookup (char *,context *); +DEFSETFUNC(moduleWithName); +DEFSETFUNC(moduleWithCName); +DEFSETFUNC(moduleWithAsmName); +unsigned int getSize (link *); + +#endif diff --git a/device/README b/device/README new file mode 100644 index 0000000..224c364 --- /dev/null +++ b/device/README @@ -0,0 +1,5 @@ +sdcc/device +----------- + +This directory contains all device only files i.e. a basic C library, +headers, and set of examples. diff --git a/device/examples/Makefile b/device/examples/Makefile new file mode 100644 index 0000000..b640cff --- /dev/null +++ b/device/examples/Makefile @@ -0,0 +1,60 @@ + +#DO_GCC=1 +DO_Z80=1 +#DO_MCS51=1 + +ifdef DO_GCC +CC = gcc -Wall -g +endif + +ifdef DO_Z80 +OBJEXT=o +CC = sdcc +MFLAGS = --debug -mz80 +endif + +ifdef DO_MCS51 +OBJEXT=rel +CC = sdcc +MFLAGS = --debug --model-small --stack-after-data +#CFLAGS = -V +#MFLAGS = --debug --model-large --stack-after-data +#LFLAGS = --xram-loc 0x4000 --code-loc 0x0000 +endif + + +#OBJECTS = test3.c itoa.$(OBJEXT) crc.$(OBJEXT) +OBJECTS = test3.c itoa.$(OBJEXT) + +all: test3.ihx + +ifdef DO_MCS51 +an429.ihx : an429.c + sdcc --model-small an429.c + +test2.ihx : test2.c + sdcc --model-small test2.c +endif + +%.$(OBJEXT): %.c + $(CC) -c $(CFLAGS) $(MFLAGS) $< + +itoa.rel : itoa.c + $(CC) -c $(CFLAGS) $(MFLAGS) itoa.c + +#crc.rel : crc.c +# $(CC) -c $(CFLAGS) $(MFLAGS) crc.c + +test3.ihx: $(OBJECTS) + $(CC) $(MFLAGS) $(LFLAGS) $(OBJECTS) + +test3.bin: test3.ihx + makebin < test3.ihx > test3.bin + +clean: + rm -f core *~ \#* *.asm *.cdb *.rel *.hex *.ihx *.lst *.map *.o \ + *.rst *.sym *.lnk *.lib *.bin + +testser: test3.ihx + s51 -Sout=serial.log test3.ihx + diff --git a/device/examples/an429.c b/device/examples/an429.c new file mode 100644 index 0000000..019d773 --- /dev/null +++ b/device/examples/an429.c @@ -0,0 +1,402 @@ +/* + this program the flow of air through a rotary flowmeter + and displays the calculated cfm. the output of the meter + is a small duty cycle pulse, the period of repatition of + which if proportional to the flow. the flow is compensated + for changes in pressure and temperature to maintain + calibration. if the flow exceeds an adjustable setpoint + it energizes a 2 form c relay for user application use. +*/ + +#include + +#define ZERO_K 2730 /* 0 degress centigrade in kelvin */ +#define ONE_TENTH_CFM 4444444L /* 1/10 cfm in microseconds */ +#define STD_TEMP 2980 /* 25 degrees centigrade in kelvin */ +#define STD_ATM 147 /* one atmosphere in tenths psi */ +#define LOWEST_CFM 0x40 /* maximun period from meter 0x400000 */ +#define START_ADC0 0x28 /* commands to start appropriate */ +#define START_ADC1 0x29 /* a/d conversion cycle */ +#define START_ADC2 0x2a /* */ +#define START_ADC3 0x2b /* */ +#define START_ADC4 0x2c /* */ +#define ADCI 0x10 /* a/d converter status flags */ +#define ADCS 0x08 /* */ +#define FREERUN_I 0x10 /* */ +#define SEG_A 0x01 /* P3 position for display segment 'a' */ +#define CFM 0x01 /* P3 position for 'cfm' led */ +#define SEG_B 0x02 /* P3 position for display segment 'b' */ +#define DEGREES 0x02 /* P3 position for 'degrees' led */ +#define SEG_C 0x04 /* P3 position for display segment 'c' */ +#define PSI 0x04 /* P3 position for 'psi' led */ +#define SEG_D 0x08 /* P3 position for display segment 'd' */ +#define SETPOINT 0x08 /* P3 position for 'setpoint' led */ +#define SEG_E 0x10 /* P3 position for display segment 'e' */ +#define SEG_F 0x20 /* P3 position for display segment 'f' */ +#define SEG_G 0x40 /* P3 position for display segment 'g' */ +#define SEG_DP 0x80 /* P3 position for display decimal pt. */ + +typedef unsigned char byte; /* type define objects with */ +typedef unsigned int word; /* more classical microprocessor */ +typedef unsigned long l_word; /* meaning */ + +#define TRUE 1 /* define logical true / false */ +#define FALSE 0 /* values for bit variables */ + + +/* + define look-up table of possible seven segment display + characters possible to display. table contents need to + be inverted before use to be compatible with U2 (udn2585a) +*/ + +code byte segments[] = +{ + SEG_A | SEG_B | SEG_C | SEG_D | SEG_E | SEG_F , /* 0 */ + SEG_B | SEG_C , /* 1 */ + SEG_A | SEG_B | SEG_D | SEG_E | SEG_G, /* 2 */ + SEG_A | SEG_B | SEG_C | SEG_D | SEG_G, /* 3 */ + SEG_B | SEG_C | SEG_F | SEG_G, /* 4 */ + SEG_A | SEG_C | SEG_D | SEG_F | SEG_G, /* 5 */ + SEG_A | SEG_C | SEG_D | SEG_E | SEG_F | SEG_G, /* 6 */ + SEG_A | SEG_B | SEG_C , /* 7 */ + SEG_A | SEG_B | SEG_C | SEG_D | SEG_E | SEG_F | SEG_G, /* 8 */ + SEG_A | SEG_B | SEG_C | SEG_D | SEG_F | SEG_G, /* 9 */ + SEG_A | SEG_D | SEG_E | SEG_F | SEG_G /* error */ +}; + +sbit RELAY = 0x96; /* active hi to turn on setpoint relay */ +sbit STROBE_0 = 0x80; /* active hi to enable status led's */ +sbit STROBE_1 = 0x81; /* active hi to enable display cr15 */ +sbit STROBE_2 = 0x82; /* active hi to enable display cr14 */ +sbit NO_FLOW = 0x83; /* flag set when no flow detected */ +sbit STROBE_3 = 0x84; /* active hi to enable display cr13 */ +sbit SEL_0 = 0x93; /* active low inputs used to select */ +sbit SEL_1 = 0x94; /* mode being displayed */ +sbit INTR = 0x95; /* */ +sbit UPDATE = 0x97; /* flag set when time to update display */ +data word cfm; /* gas flow in tenths of a cfm */ +data word setpoint; /* relay setpoint in tenths of a cfm */ +data word degree_c; /* temperature in tenths centagrade */ +data l_word corr; /* intermediate calculation value */ +data word psi; /* pressupe in tenths of a psi */ +data byte display0; /* variables to hold values for the */ +data byte display1; /* displays during refresh */ +data byte display2; /* */ +data byte display3; /* */ +data byte disp_pntr; /* pointer to next display to enable */ +data byte refresh; /* counter determines display updates */ +data byte high; /* bits 16 - 23 of flow period */ +data byte middle; /* bits 8 - 15 of flow period */ +data byte low; /* bits 0 - 7 of flow period */ +data byte ticks; /* incremented by timer overflow */ + +/* + use the free-running I timer to multiplex the led displays + at approx. 1000 hz. +*/ + +void multiplex() interrupt 3 +{ + switch(disp_pntr) + { + case 0x00: + STROBE_3 = FALSE; /* turn off display cr13 */ + P3 = 0xff; /* turn off all segments */ + P3 = display0; /* load segments for led's */ + STROBE_0 = TRUE; /* turn on status led's */ + disp_pntr = 1; /* increment pointer to dsiplay */ + break; + case 0x01: + STROBE_0 = FALSE; /* turn off status led's */ + P3 = 0xff; /* turn off all segments */ + P3 = display1; /* load segments for tenths */ + STROBE_1 = TRUE; /* turn on display cr15 */ + disp_pntr = 2; /* increment pointer to dsiplay */ + break; + case 0x02: + STROBE_1 = FALSE; /* turn off display cr15 */ + P3 = 0xff; /* turn off all segments */ + P3 = display2; /* load segments for units */ + STROBE_2 = TRUE; /* turn on display cr14 */ + disp_pntr = 3; /* increment pointer to dsiplay */ + break; + case 0x03: + STROBE_2 = FALSE; /* turn off display cr14 */ + P3 = 0xff; /* turn off all segments */ + P3 = display3; /* load segments for tens */ + STROBE_3 = TRUE; /* turn on display cr13 */ + disp_pntr = 0; /* increment pointer to dsiplay */ + break; + } +} + +/* + use the free running pwm prescaler to generate + interrupts every 92 hz. every 32nd interrupt + set the UPDATE flag to enable the reading of + the command switches, and updating of the led + display contents. +*/ +void read_switch() interrupt 6 +{ + if(refresh++ == 32) + { UPDATE = TRUE; + refresh = 0; + } +} + +/* + whenever the timer overflows from 0xffff to 0x0000 + increment the variable 'ticks' which represent the + highest order (16 - 23) bits of the gas flow period + in microseconds. if the variable 'ticks' is greater + than the period representing a flow of < 0.1 cfm + then set the NO_FLOW flag to enable display of 00.0 +*/ + +void overflow() interrupt 1 +{ + if(++ticks > LOWEST_CFM) + { + cfm = 0; + ticks = 0; + NO_FLOW = TRUE; + } +} + +/* + an external interrupt generated by a tach pulse + from the flowmeter reads the current value of the + timer into variables 'low' and 'middle', and then + resets the timers. the 'ticks' variable described + above is also copied to variable 'high', and then + reset to zero. the NO_FLOW flag is cleared to + enable display of the calculated cfm. +*/ + +void calc_cfm() interrupt 0 +{ + low = TL0; + TL0 = 0; + middle = TH0; + TH0 = 0; + high = ticks; + ticks = 0; + NO_FLOW = FALSE; +} + +void main() +{ + RELAY = 0; /* initialize output pins */ + INTR = 1; + UPDATE = 1; + STROBE_0 = 0; + STROBE_1 = 0; + STROBE_2 = 0; + STROBE_3 = 0; + NO_FLOW = 0; + TL0 = 0; /* timer 0 period 0x10000 u_seconds */ + TH0 = 0; + PWMP = 255; /* pwm timer interrupt at 92 hz */ + TR0 = 1; /* enable timer 0 */ + IT0 = 1; /* INT0 is edge active */ + ticks = 0; /* initialize variables */ + cfm = 0; + low = 0; + middle = 0; + high = 0; + degree_c = 250; + psi = 147; + corr = 0; + refresh = 0; + disp_pntr = 0; + IEN0 = 0xab; /* enable intrrupts */ +#ifdef MY +/* + main execution loop, executes forever. +*/ + + while(1) + { + +/* + calculate base cfm rate - first create long word representing + flow rate period in microseconds. then subtract out the time + overhead in servicing the routine 'calc_cfm'. then divide the + period into the period for 1/10 cfm, to get flow rate in 1/10 + cfm resolution. +*/ + + corr = high * 0x10000L; + corr += (middle * 0x100L); + corr += low; + corr = ONE_TENTH_CFM / corr; + +/* + read temperature - measure output from the LM35 sensor, + scaled by the AMP-02. the scaling results in a range + of 0 to 51.0 degrees centigrade, in 0.2 degree steps. +*/ + + ADCON = START_ADC1; + while(ADCON & ADCS) ; + degree_c = ((word)ADDATH) << 8 | ADDATL; + degree_c *= 2; + +/* + compensate cfm rate for temperature - convert temperature + into degrees kelvin, then divide it into the measured flow + rate multiplied by the calibration temperature of the flow- + meter in degrees kelvin. (nominal 25 degrees centigrade) +*/ + + corr *= STD_TEMP; + corr /= (ZERO_K + degree_c); + +/* + read pressure - measure output of the KP100A pressure trans- + ducer, scaled by the AMP_02. the scaling results in a range + of 0 to 25.5 psi, in 1/10 psi steps. +*/ + + ADCON = START_ADC0; + while(ADCON & ADCS) ; + psi = ((word) ADDATH << 8) | ADDATL; + +/* + compensate cfm rate for pressure - multiply measured pres- + sure and the calculated flow rate, and then divide it by + the standard atmospheric pressure at sea-level. (nominal + 14.7 psi) + +*/ + + corr *= psi; + corr /= STD_ATM; + cfm = corr; + +/* + read setpoint pot to obtain setpoint in the range of + 0 - 25.5 cfm in 1/10 cfm steps. +*/ + + ADCON = START_ADC2; + while(ADCON & ADCS) ; + setpoint = ADAT; + +/* + test if cfm rate greater or equal to the + setpoint, and if so then energize relay +*/ + + if(setpoint > cfm) + RELAY = 0; + else + RELAY = 1; + +/* + test if update flag has been set, and if so reset flag. +*/ + + if(UPDATE) + { + UPDATE = 0; + +/* + then test if the no flow flag has been set. if so then + display 00.0 cfm +*/ + + if(NO_FLOW) + { + display0 = ~CFM; + display1 = ~segments[0]; + display2 = ~(segments[0] | SEG_DP); + display3 = ~segments[0]; + } + +/* + if the no flow flag was not set then read the display + select switches, and display the appropriate data. +*/ + + else if(SEL_0) + { + if(SEL_1) + { + +/* + if no swich is depressed then the default display is + the flow rate in cfm. test the flowrate is greater than + or equal to 30 cfm then display the overrange message + EEE else the flow in XX.X format. +*/ + + if(cfm <= 300) + { + display0 = ~CFM; + display1 = ~segments[cfm % 10]; + cfm /= 10; + display2 = ~(segments[cfm % 10]); + cfm /= 10; + display3 = ~segments[cfm % 10]; + } + else + { + display0 = ~CFM; + display1 = ~segments[10]; + display2 = ~segments[10]; + display3 = ~segments[10]; + } + } + +/* + if switch 1 is depressed then display temperature. +*/ + + else + { + display0 = ~DEGREES; + display1 = ~segments[degree_c % 10]; + degree_c /= 10; + display2 = ~(segments[degree_c % 10] | SEG_DP); + degree_c /= 10; + display3 = ~segments[degree_c % 10]; + } + } + else + { + +/* + if switch 2 depressed then display the pressure. +*/ + + if(SEL_1) + { + display0 = ~PSI; + display1 = ~segments[psi % 10]; + psi /= 10; + display2 = ~(segments[psi % 10] | SEG_DP); + psi /= 10; + display3 = ~segments[psi % 10]; + } + +/* + if switch 3 depressed then display the setpoint. +*/ + + else + { + display0 = ~SETPOINT; + display1 = ~segments[setpoint % 10]; + setpoint /= 10; + display2 = ~(segments[setpoint % 10] | SEG_DP); + setpoint /= 10; + display3 = ~segments[setpoint % 10]; + } + } + } + } +#endif +} diff --git a/device/examples/clean.mk b/device/examples/clean.mk new file mode 100644 index 0000000..8b2f39b --- /dev/null +++ b/device/examples/clean.mk @@ -0,0 +1,28 @@ +include incl.mk + +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] *.rel *.lst *.sym *.asm *.ihx *.dump* + rm -f .[a-z]*~ + rm -f *.dump* + for model in $(MODELS); do \ + rm -rf $$model; \ + done + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f Makefile *.dep + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean diff --git a/device/examples/crc.c b/device/examples/crc.c new file mode 100644 index 0000000..97594e1 --- /dev/null +++ b/device/examples/crc.c @@ -0,0 +1,10 @@ +typedef unsigned char byte; + +byte accum_checksum(byte cs, byte val) +{ + unsigned int tmp; + + tmp = ((cs<<7) | (cs>>1)) + val; + + return (byte)tmp + ((byte) (tmp>>8) & 1); +} diff --git a/device/examples/crcs.c b/device/examples/crcs.c new file mode 100644 index 0000000..5398a39 --- /dev/null +++ b/device/examples/crcs.c @@ -0,0 +1,11 @@ +#include <8051.h> +typedef unsigned char byte; + +byte accum_checksum(byte cs, byte val) +{ + register unsigned char tmp; + + tmp = ((cs<<1) | (cs>>7)) + val; + + return (CY ? ( tmp + 1 ) : tmp); +} diff --git a/device/examples/ds390/Makefile b/device/examples/ds390/Makefile new file mode 100644 index 0000000..0ebdad2 --- /dev/null +++ b/device/examples/ds390/Makefile @@ -0,0 +1,12 @@ +TARGETS = clock390 hello390 i2c390 readmac rtc390 ow390 + +all: $(TARGETS) + for target in $(TARGETS); do \ + (cd $$target; $(MAKE)); \ + done; + +clean: $(TARGETS) + rm -f *~ \#* *.asm *.cdb *.rel *.hex *.ihx *.lst *.map *.rst *.sym *.lnk + for target in $(TARGETS); do \ + (cd $$target; $(MAKE) clean); \ + done; diff --git a/device/examples/ds390/clock390/Makefile b/device/examples/ds390/clock390/Makefile new file mode 100644 index 0000000..a74f83f --- /dev/null +++ b/device/examples/ds390/clock390/Makefile @@ -0,0 +1,19 @@ +CC = sdcc + +MFLAGS = -mds390 +LFLAGS = --xram-loc 0x100080 --code-loc 0x10000 -Wl-r + +OBJECTS = clock390.rel + +all: clock390.hex + +clean: + rm -f *~ \#* *.asm *.cdb *.rel *.hex *.ihx *.lst *.map *.rst *.sym *.lnk core *.dump* + +clock390.hex: $(OBJECTS) + $(CC) $(MFLAGS) $(LFLAGS) $(OBJECTS) + packihx clock390.ihx >clock390.hex + #tinitalk -c execute clock390.hex + +%.rel: %.c + $(CC) -c $(MFLAGS) $< diff --git a/device/examples/ds390/clock390/clock390.c b/device/examples/ds390/clock390/clock390.c new file mode 100644 index 0000000..92a80f3 --- /dev/null +++ b/device/examples/ds390/clock390/clock390.c @@ -0,0 +1,45 @@ +#include + +/* If you don't have an lcd display, don't worry, it will just + toggle some bits in the void, but ok +*/ +#define USE_LCD + +void main (void) { + unsigned long ms, seconds, oldSeconds=-1; + + printf ("\nStarting systemclock test.\n"); + +#ifdef USE_LCD + LcdInit(); + LcdLPutString(0, "Testing clock"); + LcdLPutString(2, "ms: "); +#endif + + while (1) { + ms=ClockTicks(); + seconds=ms/1000; + +#ifdef USE_LCD + LcdLPrintf (2 + (4<<8), "%10ld", ms); +#endif + + if (seconds!=oldSeconds) { + printf ("%02d:%02d.%02d\n", (int)seconds/3600, + (int)(seconds/60)%60, + (int)seconds%60); + oldSeconds=seconds; + _asm + cpl P3.5 ; toggle led + _endasm; + } + if (Serial0CharArrived()) { + switch (getchar()) { + case '2': printf ("Switching to 2 clocks/cycle\n"); CpuSpeed(2); break; + case '4': printf ("Switching to 4 clocks/cycle\n"); CpuSpeed(4); break; + } + } + } +} + + diff --git a/device/examples/ds390/hello390/Makefile b/device/examples/ds390/hello390/Makefile new file mode 100644 index 0000000..2156a63 --- /dev/null +++ b/device/examples/ds390/hello390/Makefile @@ -0,0 +1,8 @@ +hello390.hex: hello390.c + sdcc -mds390 --xram-loc 0x100080 --code-loc 0x10000 \ + -Wl-r hello390.c + packihx hello390.ihx >hello390.hex + #tinitalk -c execute hello390.hex + +clean: + rm -f *~ \#* *.asm *.cdb *.rel *.hex *.ihx *.lst *.map *.rst *.sym *.lnk core *.dump* diff --git a/device/examples/ds390/hello390/hello390.c b/device/examples/ds390/hello390/hello390.c new file mode 100644 index 0000000..5504f73 --- /dev/null +++ b/device/examples/ds390/hello390/hello390.c @@ -0,0 +1,5 @@ +#include + +void main (void) { + printf ("\nHello from 390.\nSee you, bye..."); +} diff --git a/device/examples/ds390/i2c390/Makefile b/device/examples/ds390/i2c390/Makefile new file mode 100644 index 0000000..c3bb5a8 --- /dev/null +++ b/device/examples/ds390/i2c390/Makefile @@ -0,0 +1,19 @@ +CC = sdcc + +MFLAGS = -mds390 +LFLAGS = --xram-loc 0x100080 --code-loc 0x10000 -Wl-r + +OBJECTS = i2c390.rel ds1621.rel pcf8591.rel + +all: i2c390.hex + +clean: + rm -f *~ \#* *.asm *.cdb *.rel *.hex *.ihx *.lst *.map *.rst *.sym *.lnk core *.dump* + +i2c390.hex: $(OBJECTS) + $(CC) $(MFLAGS) $(LFLAGS) $(OBJECTS) + packihx i2c390.ihx >i2c390.hex + #tinitalk -c execute i2c390.hex + +%.rel: %.c + $(CC) -c $(MFLAGS) $< diff --git a/device/examples/ds390/i2c390/ds1621.c b/device/examples/ds390/i2c390/ds1621.c new file mode 100644 index 0000000..7592991 --- /dev/null +++ b/device/examples/ds390/i2c390/ds1621.c @@ -0,0 +1,42 @@ +#include + +#include "ds1621.h" + +float ReadDS1621(char address) { + float temperature; + signed char counter, slope; + + int id=DS1621_ID + (address<<1); + + while (!I2CReset()) { + //fprintf (stderr, "I2C bus busy, retrying.\n"); + } + + i2cTransmitBuffer[0]=0xac; // access config command + i2cTransmitBuffer[1]=0x09; // mode (8=continuous, 9=one-shot) + if (I2CSend(id, 2)) return -999; + + i2cTransmitBuffer[0]=0xee; // start conversion command + if (I2CSend(id, 1)) return -999; + + do { + i2cTransmitBuffer[0]=0xac; // access config command + if (I2CSendReceive(id, 1, 1)) return -999; + } while ((i2cReceiveBuffer[0]&0x80)==0); // wait for conversion done + + i2cTransmitBuffer[0]=0xaa; // read temperature command + + if (I2CSendReceive(id, 1, 1)) return -999; + temperature=i2cReceiveBuffer[0]; + i2cTransmitBuffer[0]=0xa8; // read counter command + if (I2CSendReceive(id, 1, 1)) return -999; + counter=i2cReceiveBuffer[0]; + + i2cTransmitBuffer[0]=0xa9; // read slope command + if (I2CSendReceive(id, 1, 1)) return -999; + slope=i2cReceiveBuffer[0]; + + temperature=temperature - 0.25 + + ((float)slope-(float)counter)/(float)slope; + return temperature; +} diff --git a/device/examples/ds390/i2c390/ds1621.h b/device/examples/ds390/i2c390/ds1621.h new file mode 100644 index 0000000..2114c65 --- /dev/null +++ b/device/examples/ds390/i2c390/ds1621.h @@ -0,0 +1,3 @@ +#define DS1621_ID 0x90 + +extern float ReadDS1621(char address); diff --git a/device/examples/ds390/i2c390/i2c390.c b/device/examples/ds390/i2c390/i2c390.c new file mode 100644 index 0000000..ecdbf89 --- /dev/null +++ b/device/examples/ds390/i2c390/i2c390.c @@ -0,0 +1,17 @@ +#include + +#include "ds1621.h" +#include "pcf8591.h" + + +void main (void) { + + while(1) { + printf ("% 5.2f %03u %03u %03u %03u\n\r", + ReadDS1621(2), + ReadPCF8591(0,0), + ReadPCF8591(0,1), + ReadPCF8591(0,2), + ReadPCF8591(0,3)); + } +} diff --git a/device/examples/ds390/i2c390/pcf8591.c b/device/examples/ds390/i2c390/pcf8591.c new file mode 100644 index 0000000..82d6420 --- /dev/null +++ b/device/examples/ds390/i2c390/pcf8591.c @@ -0,0 +1,22 @@ +#include + +#include "pcf8591.h" + +unsigned char ReadPCF8591(char address, char channel) { + + unsigned char id=PCF8591_ID+(address<<1); + + while (!I2CReset()) { + //fprintf (stderr, "I2C bus busy, retrying.\n"); + } + + // set output enable, no autoincrement + i2cTransmitBuffer[0]=(channel&0x03)+0x40; + + // read 2 bytes, since the first one is the old value + if (I2CSendReceive(id, 1, 2)) + return 0; + + return i2cReceiveBuffer[1]; +} + diff --git a/device/examples/ds390/i2c390/pcf8591.h b/device/examples/ds390/i2c390/pcf8591.h new file mode 100644 index 0000000..7e38b39 --- /dev/null +++ b/device/examples/ds390/i2c390/pcf8591.h @@ -0,0 +1,3 @@ +#define PCF8591_ID 0x90 + +extern unsigned char ReadPCF8591(char address, char channel); diff --git a/device/examples/ds390/ow390/Makefile b/device/examples/ds390/ow390/Makefile new file mode 100644 index 0000000..feeb5f9 --- /dev/null +++ b/device/examples/ds390/ow390/Makefile @@ -0,0 +1,41 @@ +CC = sdcc + +MFLAGS = -mds390 +LFLAGS = --xram-loc 0x180080 --code-loc 0x10000 -Wl-r + +TARGETS = tstfind.hex temp.hex swtloop.hex swtoper.hex counter.hex \ + tstow.hex thermodl.hex gethumd.hex + +OW_OBJECTS = ownetu.rel owsesu.rel owllu.rel owlli.rel owtrnu.rel \ + crcutil.rel tinilnk.rel findtype.rel ds2480ut.rel owfile.rel + +SENSOR_OBJECTS = temp10.rel swt12.rel cnt1d.rel thermo21.rel ad26.rel + +TINI_TEST_OBJECTS = + +all: ow.lib sensors.lib $(TINI_TEST_OBJECTS) $(TARGETS) + +ow.lib: $(OW_OBJECTS) + rm -f $@; \ + for object in $(OW_OBJECTS) $(TINI_TEST_OBJECTS); do \ + echo $$object >>$@; \ + done; + +sensors.lib: $(SENSOR_OBJECTS) + rm -f $@; \ + for object in $(SENSOR_OBJECTS); do \ + echo $$object >>$@; \ + done; + +clean: + rm -f core *~ \#* *.asm *.cdb *.rel *.hex *.ihx *.lst *.map \ + *.rst *.sym *.lnk *.lib *.dump* + +%.hex: ow.lib sensors.lib $(TINI_TEST_OBJECTS) %.rel + $(CC) $(MFLAGS) $(LFLAGS) $*.rel $(TINI_TEST_OBJECTS) \ + -L . ow.lib sensors.lib + packihx $*.ihx >$@ + #tinitalk -c execute $@ + +%.rel: %.c + $(CC) -c $(MFLAGS) $< diff --git a/device/examples/ds390/ow390/ad26.c b/device/examples/ds390/ow390/ad26.c new file mode 100644 index 0000000..703bdc8 --- /dev/null +++ b/device/examples/ds390/ow390/ad26.c @@ -0,0 +1,265 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//-------------------------------------------------------------------------- +// +// ad26.c - Reads the voltage on the 1-Wire +// version 1.00 +// + +// Include Files +#include +#include "ownet.h" +#include "ad26.h" + +int Volt_AD(int portnum, int vdd, uchar *SNum) +{ + uchar send_block[50]; + uchar test; + int send_cnt=0; + int i; + ushort lastcrc8; + int busybyte; + + owSerialNum(portnum,SNum,FALSE); + // Recall the Status/Configuration page + // Recall command + send_block[send_cnt++] = 0xB8; + + // Page to Recall + send_block[send_cnt++] = 0x00; + + if(!owBlock(portnum,FALSE,send_block,send_cnt)) + return FALSE; + + send_cnt = 0; + + if(owAccess(portnum)) + { + // Read the Status/Configuration byte + // Read scratchpad command + send_block[send_cnt++] = 0xBE; + + // Page for the Status/Configuration byte + send_block[send_cnt++] = 0x00; + + for(i=0;i<9;i++) + send_block[send_cnt++] = 0xFF; + + if(owBlock(portnum,FALSE,send_block,send_cnt)) + { + setcrc8(portnum,0); + + for(i=2;i> 3) * 0.03125; + }//Access + + return ret; +} + diff --git a/device/examples/ds390/ow390/ad26.h b/device/examples/ds390/ow390/ad26.h new file mode 100644 index 0000000..83027ba --- /dev/null +++ b/device/examples/ds390/ow390/ad26.h @@ -0,0 +1,33 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// ad26.h - Include file for Smart Battery Monitor demo. +// +// Version: 2.00 + +int Volt_AD(int portnum, int vdd, uchar *); +float Volt_Reading(int portnum, int vdd, uchar *); +double Get_Temperature(int portnum,uchar *); diff --git a/device/examples/ds390/ow390/cnt1d.c b/device/examples/ds390/ow390/cnt1d.c new file mode 100644 index 0000000..cdf66fd --- /dev/null +++ b/device/examples/ds390/ow390/cnt1d.c @@ -0,0 +1,104 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// cnt1D.c - Module to read the DS2423 - counter. +// +// Version: 2.00 +// +// +#include "ownet.h" +#include "cnt1d.h" + +//---------------------------------------------------------------------- +// Read the counter on a specified page of a DS2423. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// 'SerialNum' - Serial Number of DS2423 that contains the counter +// to be read +// 'CounterPage' - page number that the counter is associated with +// 'Count' - pointer to variable where that count will be returned +// +// Returns: TRUE(1) counter has been read and verified +// FALSE(0) could not read the counter, perhaps device is not +// in contact +// +int ReadCounter(int portnum, uchar SerialNum[8], int CounterPage, + unsigned long *Count) +{ + int rt=FALSE; + uchar send_block[30]; + int send_cnt=0, address, i; + ushort lastcrc16; + + setcrc16(portnum,0); + + // set the device serial number to the counter device + owSerialNum(portnum,SerialNum,FALSE); + + // access the device + if (owAccess(portnum)) + { + // create a block to send that reads the counter + // read memory and counter command + send_block[send_cnt++] = 0xA5; + docrc16(portnum,0xA5); + // address of last data byte before counter + address = (CounterPage << 5) + 31; // (1.02) + send_block[send_cnt++] = (uchar)(address & 0xFF); + docrc16(portnum,(ushort)(address & 0xFF)); + send_block[send_cnt++] = (uchar)(address >> 8); + docrc16(portnum,(ushort)(address >> 8)); + // now add the read bytes for data byte,counter,zero bits, crc16 + for (i = 0; i < 11; i++) + send_block[send_cnt++] = 0xFF; + + // now send the block + if (owBlock(portnum,FALSE,send_block,send_cnt)) + { + // perform the CRC16 on the last 11 bytes of packet + for (i = send_cnt - 11; i < send_cnt; i++) + lastcrc16 = docrc16(portnum,send_block[i]); + + // verify CRC16 is correct + if (lastcrc16 == 0xB001) + { + // success + rt = TRUE; + // extract the counter value + *Count = 0; + for (i = send_cnt - 7; i >= send_cnt - 10; i--) + { + *Count <<= 8; + *Count |= send_block[i]; + } + } + } + } + + // return the result flag rt + return rt; +} diff --git a/device/examples/ds390/ow390/cnt1d.h b/device/examples/ds390/ow390/cnt1d.h new file mode 100644 index 0000000..2750069 --- /dev/null +++ b/device/examples/ds390/ow390/cnt1d.h @@ -0,0 +1 @@ +extern int ReadCounter(int, uchar *SerialNum, int, unsigned long *); diff --git a/device/examples/ds390/ow390/counter.c b/device/examples/ds390/ow390/counter.c new file mode 100644 index 0000000..89e6eeb --- /dev/null +++ b/device/examples/ds390/ow390/counter.c @@ -0,0 +1,155 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// counter.c - Application to read the 1-Wire Net DS2423 - counter. +// +// This application uses the files from the 'Public Domain' +// 1-Wire Net libraries ('general' and 'userial'). +// +// Version: 2.00 +// + +#include +#include +#include "ownet.h" +#include "cnt1d.h" + +// defines +#define MAXDEVICES 20 + +// local functions +void PrintSerialNum(uchar *SerialNum); + +// local serial numbers +static uchar FamilySN[MAXDEVICES][8]; + +// tini hack +int argc=2; +char *argv[]={__FILE__, "exow"}; + +//---------------------------------------------------------------------- +// Main Test for the DS2423 - counter +// +int main() //short argc, char **argv) +{ + char return_msg[128]; + int NumDevices=0; + int i; + int CounterPage; + ulong Count; + int portnum=0; + + //------------------------------------------------------ + // Introduction header + printf("\n/---------------------------------------------\n"); + printf(" Counter Application - V2.00\n" + " The following is a test to excersize a\n" + " DS2423 - counter \n\n"); + + printf(" Press any CTRL-C to stop this program.\n\n"); + printf(" Output [Serial Number(s) ... Counter Value ... Counter Value ... " + "Counter Value ... Counter Value] \n\n"); + + // check for required port name + if (argc != 2) + { + printf("1-Wire Net name required on command line!\n" + " (example: \"COM1\" (Win32 DS2480),\"/dev/cua0\" " + "(Linux DS2480),\"1\" (Win32 TMEX)\n"); + exit(1); + } + + // attempt to acquire the 1-Wire Net + if (!owAcquire(portnum, argv[1], return_msg)) + { + printf("%s",return_msg); + exit(1); + } + + // success + printf("%s",return_msg); + + // Find the device(s) + NumDevices = FindDevices(portnum, &FamilySN[0], 0x1D, MAXDEVICES); + if (NumDevices>0) + { + printf("\n"); + printf("Device(s) Found: \n"); + for (i = 0; i < NumDevices; i++) + { + PrintSerialNum(FamilySN[i]); + printf("\n"); + } + printf("\n\n"); + + // (stops on CTRL-C) + do + { + // read the current counters + for (i = 0; i < NumDevices; i++) + { + printf("\n"); + PrintSerialNum(FamilySN[i]); + + for (CounterPage = 12; CounterPage <= 15; CounterPage++) + { + if (ReadCounter(portnum, FamilySN[i], CounterPage, &Count)) + { + printf(" %10ld ", Count); + } + else + printf("\nError reading counter, verify device present:%d\n", + owVerify(portnum,FALSE)); + } + } + printf("\n\n"); + } + while (!key_abort()); + } + else + printf("\n\n\n ERROR, device not found!\n"); + + // release the 1-Wire Net + owRelease(portnum,return_msg); + printf("%s",return_msg); + exit(0); + + return 0; +} + +// ------------------------------------------------------------------------------- +// Read and print the serial number +// +void PrintSerialNum(uchar *SerialNum) +{ + int i; + + for (i = 7; i>=0; i--) + printf("%02X", SerialNum[i]); +} + + + diff --git a/device/examples/ds390/ow390/crcutil.c b/device/examples/ds390/ow390/crcutil.c new file mode 100644 index 0000000..1002ab8 --- /dev/null +++ b/device/examples/ds390/ow390/crcutil.c @@ -0,0 +1,122 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//-------------------------------------------------------------------------- +// +// crcutil.c - Keeps track of the CRC for 16 and 8 bit operations +// version 2.00 + +// tinihack, data is a reserved keyword for sdcc. So: +#define data DaTa + +// Include files +#include "ownet.h" + +// Local global variables +static ushort utilcrc16[MAX_PORTNUM]; +static uchar utilcrc8[MAX_PORTNUM]; +static short oddparity[16] = { 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0 }; +static uchar dscrc_table[] = { + 0, 94,188,226, 97, 63,221,131,194,156,126, 32,163,253, 31, 65, + 157,195, 33,127,252,162, 64, 30, 95, 1,227,189, 62, 96,130,220, + 35,125,159,193, 66, 28,254,160,225,191, 93, 3,128,222, 60, 98, + 190,224, 2, 92,223,129, 99, 61,124, 34,192,158, 29, 67,161,255, + 70, 24,250,164, 39,121,155,197,132,218, 56,102,229,187, 89, 7, + 219,133,103, 57,186,228, 6, 88, 25, 71,165,251,120, 38,196,154, + 101, 59,217,135, 4, 90,184,230,167,249, 27, 69,198,152,122, 36, + 248,166, 68, 26,153,199, 37,123, 58,100,134,216, 91, 5,231,185, + 140,210, 48,110,237,179, 81, 15, 78, 16,242,172, 47,113,147,205, + 17, 79,173,243,112, 46,204,146,211,141,111, 49,178,236, 14, 80, + 175,241, 19, 77,206,144,114, 44,109, 51,209,143, 12, 82,176,238, + 50,108,142,208, 83, 13,239,177,240,174, 76, 18,145,207, 45,115, + 202,148,118, 40,171,245, 23, 73, 8, 86,180,234,105, 55,213,139, + 87, 9,235,181, 54,104,138,212,149,203, 41,119,244,170, 72, 22, + 233,183, 85, 11,136,214, 52,106, 43,117,151,201, 74, 20,246,168, + 116, 42,200,150, 21, 75,169,247,182,232, 10, 84,215,137,107, 53}; + +//-------------------------------------------------------------------------- +// Reset crc16 to the value passed in +// +// 'reset' - data to set crc16 to. +// +void setcrc16(int portnum, ushort reset) +{ + utilcrc16[portnum] = reset; + return; +} + +//-------------------------------------------------------------------------- +// Reset crc8 to the value passed in +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// 'reset' - data to set crc8 to +// +void setcrc8(int portnum, uchar reset) +{ + utilcrc8[portnum] = reset; + return; +} + +//-------------------------------------------------------------------------- +// Calculate a new CRC16 from the input data shorteger. Return the current +// CRC16 and also update the global variable CRC16. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// 'data' - data to perform a CRC16 on +// +// Returns: the current CRC16 +// +ushort docrc16(int portnum, ushort data) +{ + data = (data ^ (utilcrc16[portnum] & 0xff)) & 0xff; + utilcrc16[portnum] >>= 8; + + if (oddparity[data & 0xf] ^ oddparity[data >> 4]) + utilcrc16[portnum] ^= 0xc001; + + data <<= 6; + utilcrc16[portnum] ^= data; + data <<= 1; + utilcrc16[portnum] ^= data; + + return utilcrc16[portnum]; +} + +//-------------------------------------------------------------------------- +// Update the Dallas Semiconductor One Wire CRC (utilcrc8) from the global +// variable utilcrc8 and the argument. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// 'x' - data byte to calculate the 8 bit crc from +// +// Returns: the updated utilcrc8. +// +uchar docrc8(int portnum, uchar x) +{ + utilcrc8[portnum] = dscrc_table[utilcrc8[portnum] ^ x]; + return utilcrc8[portnum]; +} diff --git a/device/examples/ds390/ow390/ds2480.h b/device/examples/ds390/ow390/ds2480.h new file mode 100644 index 0000000..12ab46e --- /dev/null +++ b/device/examples/ds390/ow390/ds2480.h @@ -0,0 +1,187 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// DS2480.H - This file contains the DS2480 constants +// +// Version: 2.00 +// +// History: 1.02 -> 1.03 Make sure uchar is not defined twice. +// +// + +// Mode Commands +#define MODE_DATA 0xE1 +#define MODE_COMMAND 0xE3 +#define MODE_STOP_PULSE 0xF1 + +// Return byte value +#define RB_CHIPID_MASK 0x1C +#define RB_RESET_MASK 0x03 +#define RB_1WIRESHORT 0x00 +#define RB_PRESENCE 0x01 +#define RB_ALARMPRESENCE 0x02 +#define RB_NOPRESENCE 0x03 + +#define RB_BIT_MASK 0x03 +#define RB_BIT_ONE 0x03 +#define RB_BIT_ZERO 0x00 + +// Masks for all bit ranges +#define CMD_MASK 0x80 +#define FUNCTSEL_MASK 0x60 +#define BITPOL_MASK 0x10 +#define SPEEDSEL_MASK 0x0C +#define MODSEL_MASK 0x02 +#define PARMSEL_MASK 0x70 +#define PARMSET_MASK 0x0E + +// Command or config bit +#define CMD_COMM 0x81 +#define CMD_CONFIG 0x01 + +// Function select bits +#define FUNCTSEL_BIT 0x00 +#define FUNCTSEL_SEARCHON 0x30 +#define FUNCTSEL_SEARCHOFF 0x20 +#define FUNCTSEL_RESET 0x40 +#define FUNCTSEL_CHMOD 0x60 + +// Bit polarity/Pulse voltage bits +#define BITPOL_ONE 0x10 +#define BITPOL_ZERO 0x00 +#define BITPOL_5V 0x00 +#define BITPOL_12V 0x10 + +// One Wire speed bits +#define SPEEDSEL_STD 0x00 +#define SPEEDSEL_FLEX 0x04 +#define SPEEDSEL_OD 0x08 +#define SPEEDSEL_PULSE 0x0C + +// Data/Command mode select bits +#define MODSEL_DATA 0x00 +#define MODSEL_COMMAND 0x02 + +// 5V Follow Pulse select bits (If 5V pulse +// will be following the next byte or bit.) +#define PRIME5V_TRUE 0x02 +#define PRIME5V_FALSE 0x00 + +// Parameter select bits +#define PARMSEL_PARMREAD 0x00 +#define PARMSEL_SLEW 0x10 +#define PARMSEL_12VPULSE 0x20 +#define PARMSEL_5VPULSE 0x30 +#define PARMSEL_WRITE1LOW 0x40 +#define PARMSEL_SAMPLEOFFSET 0x50 +#define PARMSEL_ACTIVEPULLUPTIME 0x60 +#define PARMSEL_BAUDRATE 0x70 + +// Pull down slew rate. +#define PARMSET_Slew15Vus 0x00 +#define PARMSET_Slew2p2Vus 0x02 +#define PARMSET_Slew1p65Vus 0x04 +#define PARMSET_Slew1p37Vus 0x06 +#define PARMSET_Slew1p1Vus 0x08 +#define PARMSET_Slew0p83Vus 0x0A +#define PARMSET_Slew0p7Vus 0x0C +#define PARMSET_Slew0p55Vus 0x0E + +// 12V programming pulse time table +#define PARMSET_32us 0x00 +#define PARMSET_64us 0x02 +#define PARMSET_128us 0x04 +#define PARMSET_256us 0x06 +#define PARMSET_512us 0x08 +#define PARMSET_1024us 0x0A +#define PARMSET_2048us 0x0C +#define PARMSET_infinite 0x0E + +// 5V strong pull up pulse time table +#define PARMSET_16p4ms 0x00 +#define PARMSET_65p5ms 0x02 +#define PARMSET_131ms 0x04 +#define PARMSET_262ms 0x06 +#define PARMSET_524ms 0x08 +#define PARMSET_1p05s 0x0A +#define PARMSET_2p10s 0x0C +#define PARMSET_infinite 0x0E + +// Write 1 low time +#define PARMSET_Write8us 0x00 +#define PARMSET_Write9us 0x02 +#define PARMSET_Write10us 0x04 +#define PARMSET_Write11us 0x06 +#define PARMSET_Write12us 0x08 +#define PARMSET_Write13us 0x0A +#define PARMSET_Write14us 0x0C +#define PARMSET_Write15us 0x0E + +// Data sample offset and Write 0 recovery time +#define PARMSET_SampOff3us 0x00 +#define PARMSET_SampOff4us 0x02 +#define PARMSET_SampOff5us 0x04 +#define PARMSET_SampOff6us 0x06 +#define PARMSET_SampOff7us 0x08 +#define PARMSET_SampOff8us 0x0A +#define PARMSET_SampOff9us 0x0C +#define PARMSET_SampOff10us 0x0E + +// Active pull up on time +#define PARMSET_PullUp0p0us 0x00 +#define PARMSET_PullUp0p5us 0x02 +#define PARMSET_PullUp1p0us 0x04 +#define PARMSET_PullUp1p5us 0x06 +#define PARMSET_PullUp2p0us 0x08 +#define PARMSET_PullUp2p5us 0x0A +#define PARMSET_PullUp3p0us 0x0C +#define PARMSET_PullUp3p5us 0x0E + +// Baud rate bits +#define PARMSET_9600 0x00 +#define PARMSET_19200 0x02 +#define PARMSET_57600 0x04 +#define PARMSET_115200 0x06 + +// DS2480 program voltage available +#define DS2480PROG_MASK 0x20 + +// mode bit flags +#define MODE_NORMAL 0x00 +#define MODE_OVERDRIVE 0x01 +#define MODE_STRONG5 0x02 +#define MODE_PROGRAM 0x04 +#define MODE_BREAK 0x08 + +extern int DS2480Detect(int); +extern int DS2480ChangeBaud(int, uchar); + +// global DS2480 state +extern int ULevel[MAX_PORTNUM]; // current DS2480 1-Wire Net level +extern int UBaud[MAX_PORTNUM]; // current DS2480 baud rate +extern int UMode[MAX_PORTNUM]; // current DS2480 command or data mode state +extern int USpeed[MAX_PORTNUM]; // current DS2480 1-Wire Net comm speed + diff --git a/device/examples/ds390/ow390/ds2480ut.c b/device/examples/ds390/ow390/ds2480ut.c new file mode 100644 index 0000000..0e01b3f --- /dev/null +++ b/device/examples/ds390/ow390/ds2480ut.c @@ -0,0 +1,200 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// ds2480ut.c - DS2480 utility functions. +// +// Version: 2.00 +// +// History: 1.00 -> 1.01 Default PDSRC changed from 0.83 to 1.37V/us +// in DS2480Detect. Changed to use msDelay instead +// of Delay. +// 1.01 -> 1.02 Changed global declarations from 'uchar' to 'int'. +// Changed DSO/WORT from 7 to 10us in DS2480Detect. +// 1.02 -> 1.03 Removed caps in #includes for Linux capatibility +// 1.03 -> 2.00 Changed 'MLan' to 'ow'. Added support for +// multiple ports. Changed W1LT to 8us. + +#include "ownet.h" +#include "ds2480.h" + +// global DS2480 state +int ULevel[MAX_PORTNUM]; // current DS2480 1-Wire Net level +int UBaud[MAX_PORTNUM]; // current DS2480 baud rate +int UMode[MAX_PORTNUM]; // current DS2480 command or data mode state +int USpeed[MAX_PORTNUM]; // current DS2480 1-Wire Net communication speed + +//--------------------------------------------------------------------------- +// Attempt to resyc and detect a DS2480 +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// +// Returns: TRUE - DS2480 detected successfully +// FALSE - Could not detect DS2480 +// +int DS2480Detect(int portnum) +{ + uchar sendpacket[10],readbuffer[10]; + short sendlen=0; + short rt=FALSE; + + // reset modes + ULevel[portnum] = MODE_NORMAL; + UMode[portnum] = MODSEL_COMMAND; + UBaud[portnum] = PARMSET_9600; + USpeed[portnum] = SPEEDSEL_FLEX; + + // set the baud rate to 9600 + SetBaudCOM(portnum,(uchar)UBaud[portnum]); + + // send a break to reset the DS2480 + BreakCOM(portnum); + + // delay to let line settle + msDelay(2); + + // flush the buffers + FlushCOM(portnum); + + // send the timing byte + sendpacket[0] = 0xC1; + if (WriteCOM(portnum,1,sendpacket) != 1) + return FALSE; + + // set the FLEX configuration parameters + // default PDSRC = 1.37Vus + sendpacket[sendlen++] = CMD_CONFIG | PARMSEL_SLEW | PARMSET_Slew1p37Vus; + // default W1LT = 8us + sendpacket[sendlen++] = CMD_CONFIG | PARMSEL_WRITE1LOW | PARMSET_Write8us; + // default DSO/WORT = 10us + sendpacket[sendlen++] = CMD_CONFIG | PARMSEL_SAMPLEOFFSET | PARMSET_SampOff10us; + + // construct the command to read the baud rate (to test command block) + sendpacket[sendlen++] = CMD_CONFIG | PARMSEL_PARMREAD | (PARMSEL_BAUDRATE >> 3); + + // also do 1 bit operation (to test 1-Wire block) + sendpacket[sendlen++] = CMD_COMM | FUNCTSEL_BIT | UBaud[portnum] | BITPOL_ONE; + + // flush the buffers + FlushCOM(portnum); + + // send the packet + if (WriteCOM(portnum,sendlen,sendpacket)) + { + // read back the response + if (ReadCOM(portnum,5,readbuffer) == 5) + { + // look at the baud rate and bit operation + // to see if the response makes sense + if (((readbuffer[3] & 0xF1) == 0x00) && + ((readbuffer[3] & 0x0E) == UBaud[portnum]) && + ((readbuffer[4] & 0xF0) == 0x90) && + ((readbuffer[4] & 0x0C) == UBaud[portnum])) + return TRUE; + } + } + + return FALSE; +} + +//--------------------------------------------------------------------------- +// Change the DS2480 from the current baud rate to the new baud rate. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'newbaud' - the new baud rate to change to, defined as: +// PARMSET_9600 0x00 +// PARMSET_19200 0x02 +// PARMSET_57600 0x04 +// PARMSET_115200 0x06 +// +// Returns: current DS2480 baud rate. +// +int DS2480ChangeBaud(int portnum, uchar newbaud) +{ + int rt=FALSE; + uchar readbuffer[5],sendpacket[5],sendpacket2[5]; + int sendlen=0,sendlen2=0; + + // see if diffenent then current baud rate + if (UBaud[portnum] == newbaud) + return TRUE; + else + { + // build the command packet + // check if correct mode + if (UMode[portnum] != MODSEL_COMMAND) + { + UMode[portnum] = MODSEL_COMMAND; + sendpacket[sendlen++] = MODE_COMMAND; + } + // build the command + sendpacket[sendlen++] = CMD_CONFIG | PARMSEL_BAUDRATE | newbaud; + + // flush the buffers + FlushCOM(portnum); + + // send the packet + if (!WriteCOM(portnum,sendlen,sendpacket)) + rt = FALSE; + else + { + // make sure buffer is flushed + msDelay(5); + + // change our baud rate + SetBaudCOM(portnum,newbaud); + UBaud[portnum] = newbaud; + + // wait for things to settle + msDelay(5); + + // build a command packet to read back baud rate + sendpacket2[sendlen2++] = CMD_CONFIG | PARMSEL_PARMREAD | (PARMSEL_BAUDRATE >> 3); + + // flush the buffers + FlushCOM(portnum); + + // send the packet + if (WriteCOM(portnum,sendlen2,sendpacket2)) + { + // read back the 1 byte response + if (ReadCOM(portnum,1,readbuffer) == 1) + { + // verify correct baud + if (((readbuffer[0] & 0x0E) == (sendpacket[sendlen-1] & 0x0E))) + rt = TRUE; + } + } + } + } + + // if lost communication with DS2480 then reset + if (rt != TRUE) + DS2480Detect(portnum); + + return UBaud[portnum]; +} diff --git a/device/examples/ds390/ow390/findtype.c b/device/examples/ds390/ow390/findtype.c new file mode 100644 index 0000000..5fc2a91 --- /dev/null +++ b/device/examples/ds390/ow390/findtype.c @@ -0,0 +1,71 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// findtype.c - Test module to find all devices of one type. +// +// Version: 2.00 +// +//---------------------------------------------------------------------- +// +// +#include "ownet.h" + +//---------------------------------------------------------------------- +// Search for devices +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// +// Returns: TRUE(1) success, device type found +// FALSE(0) device not found +// +int FindDevices(int portnum, uchar FamilySN[][8], int family_code, int MAXDEVICES) +{ + int NumDevices=0; + int TotalDevices=0; + + // find the devices + // set the search to first find that family code + owFamilySearchSetup(portnum,family_code); + + // loop to find all of the devices up to MAXDEVICES + NumDevices = 0; + do + { + // perform the search + if (!owNext(portnum,TRUE, FALSE)) + break; + owSerialNum(portnum,FamilySN[NumDevices], TRUE); + if (FamilySN[NumDevices][0] == family_code) + { + NumDevices++; + } + } + while (NumDevices < (MAXDEVICES - 1)); + + // check if not at least 1 device + return NumDevices; +} diff --git a/device/examples/ds390/ow390/gethumd.c b/device/examples/ds390/ow390/gethumd.c new file mode 100644 index 0000000..074e9a1 --- /dev/null +++ b/device/examples/ds390/ow390/gethumd.c @@ -0,0 +1,111 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// getV.c - This utility gets the Volts for pins Vad and Vdd from the DS2438. +// +// Version: 2.00 +// History: + +#include +#include "ownet.h" +#include "ad26.h" + +#define MAXDEVICES 5 + +// Global necessary for screenio +int VERBOSE; + +// tini hack +int argc=2; +char *argv[]={__FILE__, "exow"}; + +//---------------------------------------------------------------------- +// This is the Main routine for debit +// +int main() //short argc, char **argv) +{ + char msg[200]; + int portnum = 0; + float Vdd,Vad; + double humid,temp; + int i; + int numbat; + uchar famvolt[MAXDEVICES][8]; + + // check for required port name + if (argc != 2) + { + sprintf(msg,"1-Wire Net name required on command line!\n" + " (example: \"COM1\" (Win32 DS2480),\"/dev/cua0\" " + "(Linux DS2480),\"1\" (Win32 TMEX)\n"); + //output_status(LV_ALWAYS,msg); + printf (msg); + return 0; + } + + if(!owAcquire(portnum,argv[1],msg)) + { + //output_status(LV_ALWAYS,msg); + printf (msg); + return 0; + } + else + { + + do + { + numbat = FindDevices(portnum,&famvolt[0],SBATTERY_FAM,MAXDEVICES); + if (numbat==0) { + printf ("No device found.\n"); + } + + for(i=0;i +#endif +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// owFile.C: Rudimentary level functions for reading and writing TMEX +// files on NVRAM iButton using the packet level functions. +// +// Version: 2.00 +// +// History: +// 1.02 -> 1.03 Removed caps in #includes for Linux capatibility +// 1.03 -> 2.00 Changed 'MLan' to 'ow'. Added support for +// multiple ports. +// + +#include "ownet.h" + +//-------------------------------------------------------------------------- +// Read a TMEX file return it in the provided buffer. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'filename' - pointer to five byte filename to read where the +// the first four bytes are the name and the fifth is +// the extension (0 to 101 decimal). +// 'buf' - pointer to a buffer to place the file information into. +// This may need to be as large as 7084 bytes. +// +// Supported devices: All devices supported by owReadPacketStd +// +// Returns: >=0 success, number of bytes in the buffer +// <0 failed to read the file (error code) +// +int owReadFile(int portnum, uchar *filename, uchar *buf) +{ + uchar dirpg=0,pgbuf[32],filepg=0; + char pglen; + ushort bufcnt=0,i; + +#if DEBUG_OW_FILE + printf ("owReadFile: %s\n", filename); +#endif + // loop read directory pages until the file entry is found + do + { + // read a directory page + pglen = owReadPacketStd(portnum,TRUE,dirpg,pgbuf); + + // check for reading error + if (pglen <= 0) + return READ_ERROR; + + // if this is the first page make sure this is a directory + // structure + if ( ((dirpg == 0) && + ((pgbuf[0] != 0xAA) || (pgbuf[1] != 0) || (pglen < 7))) + || + ((pglen-1) % 7) ) + return INVALID_DIR; + + // loop through each file entry in directory page (page 0 exception) + for (i = (dirpg == 0) ? 7 : 0; i < 28; i += 7) + { + // file entry found? + if ((filename[0] == pgbuf[i]) && + (filename[1] == pgbuf[i+1]) && + (filename[2] == pgbuf[i+2]) && + (filename[3] == pgbuf[i+3]) && + (filename[4] == (pgbuf[i+4] & 0x7F)) ) + { + // get the file starting page number + filepg = pgbuf[i+5]; +#if DEBUG_OW_FILE + printf ("owReadFile: file %s starts at %d\n", filename, filepg); +#endif + break; + } + } + + // get the next directory page (from page pointer) + dirpg = pgbuf[pglen-1]; + } + while (dirpg && (filepg == 0)); + + // check if file found + if (!filepg) + return NO_FILE; + + // loop to read the file pages + do + { + // read a file page + pglen = owReadPacketStd(portnum,TRUE,filepg,pgbuf); + + // check result of read + if (pglen <= 0) { + return READ_ERROR; + } + + // append the page data to the buffer + for (i = 0; i < (pglen - 1); i++) + buf[bufcnt++] = pgbuf[i]; + + // get the next file page (from page pointer) + filepg = pgbuf[pglen-1]; + } + while (filepg); + + // return the number of data bytes read + return bufcnt; +} + + +//-------------------------------------------------------------------------- +// Format and Write a TMEX file. +// Any previous files will be removed in the Format operation. +// The file length 'fllen' can be up to: +// 420 bytes for a DS1993 +// 1736 bytes for a DS1995 +// 7084 bytes for a DS1996. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'filename' - pointer to five byte filename to write where the +// the first four bytes are the name and the fifth is +// the extension (0 to 101 decimal). +// 'buf' - pointer to a buffer containing the file information to write. +// +// Supported devices: DS1993, DS1994, DS1995, DS1996 +// +// Returns: TRUE(1) success, device formated and file written +// <0 failed to read the file (error code) +// +// +int owFormatWriteFile(int portnum, uchar *filename, int fllen, uchar *buf) +{ + uchar dummydir[] = { 0xAA, 0, 0x80, 0x01, 0, 0, 0, 0 }, + newdir[] = { 0xAA, 0, 0x80, 0x01, 0, 0, 0, ' ', ' ', ' ', ' ', 0, 1, 1, 0 }, + bmpg1[] = { 0x03,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0x02 }, + bmpg2[] = { 0,0,0,0,0 }, pgbuf[32]; + int i,numdirpgs,flpg,bmpg1len,bmpg2len,cntleft,pos,numpgs; + +#if DEBUG_OW_FILE + printf ("owFormatWriteFile: %s %d\n", filename, fllen); +#endif + // calculate the number of pages needed to write the file + numpgs = (fllen / 28) + ((fllen % 28) ? 1 : 0); + + // put the file in the newdirectory + for(i = 0; i < 5; i++) + newdir[i+7] = filename[i]; + newdir[13] = (uchar)numpgs; + + // set the directory pages for formatting device depending on the device type + switch (SerialNum[portnum][0]) //jpe + { + case 0x06: // DS1993 + // check for file too big + if (numpgs > 15) + return FILE_TOO_BIG; + // set the bitmap in the directory page + for (i = 0; i < numpgs; i++) + bitacc(WRITE_FUNCTION,1,i+1,&newdir[3]); + numdirpgs = 1; + flpg = 1; + newdir[12] = (uchar)flpg; + break; + case 0x0A: // DS1995 + // check for file too big + if (numpgs > 62) + return FILE_TOO_BIG; + // set to external bitmap file + newdir[2] = 0; + // set the bitmap in the first (and only) bitmap page + for (i = 0; i < numpgs; i++) + bitacc(WRITE_FUNCTION,1,i+2,&bmpg1[0]); + numdirpgs = 2; + flpg = 2; + newdir[12] = (uchar)flpg; // startpage + bmpg1len = 9; + newdir[3] = 0; // remove local bitmap + newdir[5] = 1; // bitmap start page + newdir[6] = 1; // bitmap number of pages + break; + case 0x0C: // DS1996 + // check for file too big + if (numpgs > 253) + return FILE_TOO_BIG; + // set to external bitmap file + newdir[2] = 0; + // set the 3rd bitmap page in the bitmap + bitacc(WRITE_FUNCTION,1,2,&bmpg1[0]); + + // set the bitmap in the first and second bitmap page + for (i = 0; i < numpgs; i++) + { + if (i <= 221) + bitacc(WRITE_FUNCTION,1,i+3,&bmpg1[0]); + else + bitacc(WRITE_FUNCTION,1,i-221,&bmpg2[0]); + } + numdirpgs = 3; + flpg = 3; + newdir[12] = (uchar)flpg; // startpage + bmpg1len = 29; + bmpg2len = 5; + newdir[3] = 0; // remove local bitmap + newdir[5] = 1; // bitmap start page + newdir[6] = 2; // bitmap number of pages + break; + default: + return WRONG_TYPE; + } + + // write a dummy directory in page 0 in case we get interrupted + if (!owWritePacketStd(portnum,0,dummydir,8,FALSE,FALSE)) + return WRITE_ERROR; + + // loop to write the file in contiguous pages start with flpg + cntleft = fllen; // count of bytes left to write + pos = 0; // current position in the buffer to write + while (cntleft > 0) + { + // get a page of data to write + for (i = 0; i < ((cntleft > 28) ? 28 : cntleft); i++) + pgbuf[i] = buf[pos++]; + + // adjust the bytes left + cntleft -= i; + + // set the next page pointer + pgbuf[i] = (cntleft == 0) ? 0 : flpg+1; + + // write the page and check to result + if (!owWritePacketStd(portnum,flpg,pgbuf,i+1,FALSE,FALSE)) + return WRITE_ERROR; + + // set the next page + flpg++; + } + + // now write the second bitmap page if needed + if (numdirpgs == 3) + if (!owWritePacketStd(portnum,2,bmpg2,bmpg2len,FALSE,FALSE)) + return WRITE_ERROR; + + // now write the first bitmap page if needed + if (numdirpgs >= 2) + if (!owWritePacketStd(portnum,1,bmpg1,bmpg1len,FALSE,FALSE)) + return WRITE_ERROR; + + // now write the directory page + if (!owWritePacketStd(portnum,0,newdir,15,FALSE,FALSE)) + return WRITE_ERROR; + + // success file written + return TRUE; +} + diff --git a/device/examples/ds390/ow390/owlli.c b/device/examples/ds390/ow390/owlli.c new file mode 100644 index 0000000..314a0c5 --- /dev/null +++ b/device/examples/ds390/ow390/owlli.c @@ -0,0 +1,430 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// iow.c +// +// Minimal access routines for TINI internal one-wire bus patched together +// from Dallas example code (hence the copyright notice above). +// +// Kevin Vigor, 11/20/2000 + +#include +#include "ownet.h" + +/* The internal 1-wire bus is hooked to P3.5, a.k.a T1 */ +/* The "activity" LED is also hooked to this line. */ +#define INT_OW_PORT T1 + +// local variables for this module to hold search state information +static int LastDiscrepancy; +static int LastFamilyDiscrepancy; +static int LastDevice; +static unsigned char iSerialNum[8]; + +static uchar iowTouchBit(uchar); +static uchar iowTouchByte(uchar); + +//-------------------------------------------------------------------------- +// Reset all of the devices on the 1-Wire Net and return the result. +// +// Returns: TRUE(1): presense pulse(s) detected, device(s) reset +// FALSE(0): no presense pulses detected +// +unsigned char iowTouchReset(void) +{ + unsigned char result; + + //printf ("iowTouchReset(): "); + + /* Code stolen straight from appnote 126. */ + INT_OW_PORT = 0; /* drive bus low. */ + ClockMicroSecondsDelay(480); + INT_OW_PORT = 1; /* bus high. */ + ClockMicroSecondsDelay(120); + result = INT_OW_PORT; /* get presence detect pulse. */ + ClockMicroSecondsDelay(360); + + //printf ("%d\n", result); + return result; +} + +//-------------------------------------------------------------------------- +// Send 1 bit of communication to the 1-Wire Net and return the +// result 1 bit read from the 1-Wire Net. The parameter 'sendbit' +// least significant bit is used and the least significant bit +// of the result is the return bit. +// +// Returns: 0: 0 bit read from sendbit +// 1: 1 bit read from sendbit +// +static unsigned char iowTouchBit(unsigned char sendbit) +{ + unsigned char result; + + INT_OW_PORT = 0; /* start timeslot. */ + ClockMicroSecondsDelay(1); + + INT_OW_PORT = sendbit; /* send bit out. */ + ClockMicroSecondsDelay(9); + result = INT_OW_PORT; /* sample result @ 10 us. */ + ClockMicroSecondsDelay(50); + INT_OW_PORT = 1; /* timeslot done. */ + ClockMicroSecondsDelay(5); + + return result; +} + +//-------------------------------------------------------------------------- +// Send 8 bits of communication to the 1-Wire Net and return the +// result 8 bits read from the 1-Wire Net. The parameter 'sendbyte' +// least significant 8 bits are used and the least significant 8 bits +// of the result is the return byte. +// +// 'sendbyte' - 8 bits to send (least significant byte) +// +// Returns: 8 bytes read from sendbyte +// +static unsigned char iowTouchByte(unsigned char sendbyte) +{ + unsigned char i; + unsigned char result = 0; + + //printf ("iowTouchByte(%02x): ", sendbyte); + + for (i = 0; i < 8; i++) + { + result |= (iowTouchBit(sendbyte & 1) << i); + sendbyte >>= 1; + } + + //printf ("%02x\n", result); + return result; +} + +//-------------------------------------------------------------------------- +// Send 8 bits of communication to the 1-Wire Net and verify that the +// 8 bits read from the 1-Wire Net is the same (write operation). +// The parameter 'sendbyte' least significant 8 bits are used. +// +// 'sendbyte' - 8 bits to send (least significant byte) +// +// Returns: TRUE: bytes written and echo was the same +// FALSE: echo was not the same +// +unsigned char iowWriteByte(unsigned char sendbyte) +{ + return (iowTouchByte(sendbyte) == sendbyte) ? TRUE : FALSE; +} + +//-------------------------------------------------------------------------- +// The 'owBlock' transfers a block of data to and from the +// 1-Wire Net with an optional reset at the begining of communication. +// The result is returned in the same buffer. +// +// 'do_reset' - cause a owTouchReset to occure at the begining of +// communication TRUE(1) or not FALSE(0) +// 'tran_buf' - pointer to a block of unsigned +// chars of length 'TranferLength' that will be sent +// to the 1-Wire Net +// 'tran_len' - length in bytes to transfer + +// Supported devices: all +// +// Returns: TRUE (1) : The optional reset returned a valid +// presence (do_reset == TRUE) or there +// was no reset required. +// FALSE (0): The reset did not return a valid prsence +// (do_reset == TRUE). +// +// The maximum tran_len is 64 +// +unsigned char iowBlock(unsigned char do_reset, + unsigned char *tran_buf, + unsigned char tran_len) +{ + int i; + + // check for a block too big + if (tran_len > 64) + return FALSE; + + // check if need to do a owTouchReset first + if (do_reset) + { + if (!iowTouchReset()) + return FALSE; + } + + // send and receive the buffer + for (i = 0; i < tran_len; i++) + tran_buf[i] = iowTouchByte(tran_buf[i]); + + return TRUE; +} + +//-------------------------------------------------------------------------- +// Send 8 bits of read communication to the 1-Wire Net and and return the +// result 8 bits read from the 1-Wire Net. +// +// Returns: 8 bytes read from 1-Wire Net +// +unsigned char iowReadByte(void) +{ + return iowTouchByte(0xFF); +} + +//-------------------------------------------------------------------------- +// The 'owFirst' finds the first device on the 1-Wire Net This function +// contains one parameter 'alarm_only'. When +// 'alarm_only' is TRUE (1) the find alarm command 0xEC is +// sent instead of the normal search command 0xF0. +// Using the find alarm command 0xEC will limit the search to only +// 1-Wire devices that are in an 'alarm' state. +// +// 'do_reset' - TRUE (1) +// perform reset before search. +// 'alarm_only' - TRUE (1) the find alarm command 0xEC is +// sent instead of the normal search command 0xF0 +// +// Returns: TRUE (1) : when a 1-Wire device was found and it's +// Serial Number placed in the global iSerialNum[portnum] +// FALSE (0): There are no devices on the 1-Wire Net. +// +unsigned char iowFirst(unsigned char do_reset, unsigned char alarm_only) +{ + // reset the search state + LastDiscrepancy = 0; + LastDevice = FALSE; + LastFamilyDiscrepancy = 0; + + return iowNext(do_reset,alarm_only); +} + +//-------------------------------------------------------------------------- +// The 'owNext' function does a general search. This function +// continues from the previos search state. The search state +// can be reset by using the 'owFirst' function. +// This function contains one parameter 'alarm_only'. +// When 'alarm_only' is TRUE (1) the find alarm command +// 0xEC is sent instead of the normal search command 0xF0. +// Using the find alarm command 0xEC will limit the search to only +// 1-Wire devices that are in an 'alarm' state. +// +// 'do_reset' - TRUE (1) perform reset before search, FALSE (0) do not +// perform reset before search. +// 'alarm_only' - TRUE (1) the find alarm command 0xEC is +// sent instead of the normal search command 0xF0 +// +// Returns: TRUE (1) : when a 1-Wire device was found and it's +// Serial Number placed in the global iSerialNum[portnum] +// FALSE (0): when no new device was found. Either the +// last search was the last device or there +// are no devices on the 1-Wire Net. +// +unsigned char iowNext(unsigned char do_reset, unsigned char alarm_only) +{ + int bit_test, search_direction, bit_number; + int last_zero, serial_byte_number, next_result; + unsigned char serial_byte_mask; + unsigned char lastcrc8; + + //printf ("iowNext(%d,%d)\n", do_reset, alarm_only); + + // initialize for search + bit_number = 1; + last_zero = 0; + serial_byte_number = 0; + serial_byte_mask = 1; + next_result = 0; + lastcrc8 = 0; + + // if the last call was not the last one + if (!LastDevice) + { + // check if reset first is requested + if (do_reset) + { + // reset the 1-wire + // if there are no parts on 1-wire, return FALSE + if (!iowTouchReset()) + { + // reset the search + LastDiscrepancy = 0; + LastFamilyDiscrepancy = 0; + return FALSE; + } + } + + // If finding alarming devices issue a different command + if (alarm_only) + iowWriteByte(0xEC); // issue the alarming search command + else + iowWriteByte(0xF0); // issue the search command + + // loop to do the search + do + { + // read a bit and its compliment + bit_test = iowTouchBit(1) << 1; + bit_test |= iowTouchBit(1); + + // check for no devices on 1-wire + if (bit_test == 3) + { + break; + } + else + { + // all devices coupled have 0 or 1 + if (bit_test > 0) + { + search_direction = !(bit_test & 0x01); // bit write value for search + } + else + { + // if this discrepancy if before the Last Discrepancy + // on a previous next then pick the same as last time + if (bit_number < LastDiscrepancy) + search_direction = ((iSerialNum[serial_byte_number] & serial_byte_mask) > 0); + else + // if equal to last pick 1, if not then pick 0 + search_direction = (bit_number == LastDiscrepancy); + + // if 0 was picked then record its position in LastZero + if (search_direction == 0) + last_zero = bit_number; + + // check for Last discrepancy in family + if (last_zero < 9) + LastFamilyDiscrepancy = last_zero; + } + + // set or clear the bit in the iSerialNum byte serial_byte_number + // with mask serial_byte_mask + if (search_direction == 1) + iSerialNum[serial_byte_number] |= serial_byte_mask; + else + iSerialNum[serial_byte_number] &= ~serial_byte_mask; + + // serial number search direction write bit + iowTouchBit(search_direction); + + // increment the byte counter bit_number + // and shift the mask serial_byte_mask + bit_number++; + serial_byte_mask <<= 1; + + // if the mask is 0 then go to new iSerialNum byte serial_byte_number + // and reset mask + if (serial_byte_mask == 0) + { + lastcrc8 = docrc8(lastcrc8,iSerialNum[serial_byte_number]); // accumulate the CRC + serial_byte_number++; + serial_byte_mask = 1; + } + } + } + while(serial_byte_number < 8); // loop until through all iSerialNum bytes 0-7 + + // if the search was successful then + if (!((bit_number < 65) || lastcrc8)) + { + // search successful so set LastDiscrepancy,LastDevice,next_result + LastDiscrepancy = last_zero; + LastDevice = (LastDiscrepancy == 0); + next_result = TRUE; + } + } + + // if no device found then reset counters so next 'next' will be + // like a first + if (!next_result || !iSerialNum[0]) + { + LastDiscrepancy = 0; + LastDevice = FALSE; + LastFamilyDiscrepancy = 0; + next_result = FALSE; + } + + return next_result; +} + +//-------------------------------------------------------------------------- +// The 'owSerialNum' function either reads or sets the SerialNum buffer +// that is used in the search functions 'owFirst' and 'owNext'. +// This function contains two parameters, 'serialnum_buf' is a pointer +// to a buffer provided by the caller. 'serialnum_buf' should point to +// an array of 8 unsigned chars. The second parameter is a flag called +// 'do_read' that is TRUE (1) if the operation is to read and FALSE +// (0) if the operation is to set the internal SerialNum buffer from +// the data in the provided buffer. +// +// 'serialnum_buf' - buffer to that contains the serial number to set +// when do_read = FALSE (0) and buffer to get the serial +// number when do_read = TRUE (1). +// 'do_read' - flag to indicate reading (1) or setting (0) the current +// serial number. +// +void iowSerialNum(unsigned char *serialnum_buf, unsigned char do_read) +{ + int i; + + // read the internal buffer and place in 'serialnum_buf' + if (do_read) + { + for (i = 0; i < 8; i++) + { + serialnum_buf[i] = iSerialNum[i]; + } + } + // set the internal buffer from the data in 'serialnum_buf' + else + { + for (i = 0; i < 8; i++) + { + iSerialNum[i] = serialnum_buf[i]; + } + } +} + +// unsupported routines + +uchar iowSpeed(int speed) { + speed; // hush the compiler + printf ("No owSpeed for internal ow yet\n"); + return FALSE; +} + +uchar iowLevel(int level) { + level; // hush the compiler + printf ("No owLevel for internal ow yet\n"); + return FALSE; +} + +uchar iowProgramPulse() { + printf ("No owProgramPulse for internal ow yet\n"); + return FALSE; +} diff --git a/device/examples/ds390/ow390/owllu.c b/device/examples/ds390/ow390/owllu.c new file mode 100644 index 0000000..63242ea --- /dev/null +++ b/device/examples/ds390/ow390/owllu.c @@ -0,0 +1,501 @@ +#define DEBUG_OW_LLU 0 +#if DEBUG_OW_LLU +#include +#endif +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// owLLU.C - Link Layer 1-Wire Net functions using the DS2480/DS2480B (U) +// serial interface chip. +// +// Version: 2.00 +// +// History: 1.00 -> 1.01 DS2480 version number now ignored in +// owTouchReset. +// 1.02 -> 1.03 Removed caps in #includes for Linux capatibility +// Removed #include +// Add #include "ownet.h" to define TRUE,FALSE +// 1.03 -> 2.00 Changed 'MLan' to 'ow'. Added support for +// multiple ports. + +#include "ownet.h" +#include "ds2480.h" + +// local varable flag, true if program voltage available +static int ProgramAvailable[MAX_PORTNUM]; + +//-------------------------------------------------------------------------- +// Reset all of the devices on the 1-Wire Net and return the result. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// +// Returns: TRUE(1): presense pulse(s) detected, device(s) reset +// FALSE(0): no presense pulses detected +// +// WARNING: This routine will not function correctly on some +// Alarm reset types of the DS1994/DS1427/DS2404 with +// Rev 1,2, and 3 of the DS2480/DS2480B. +// +int owTouchReset(int portnum) +{ + uchar readbuffer[10],sendpacket[10]; + int sendlen=0; + +#if DEBUG_OW_LLU + printf ("owTouchReset\n"); +#endif + // make sure normal level + owLevel(portnum,MODE_NORMAL); + + // check if correct mode + if (UMode[portnum] != MODSEL_COMMAND) + { + UMode[portnum] = MODSEL_COMMAND; + sendpacket[sendlen++] = MODE_COMMAND; + } + + // construct the command + sendpacket[sendlen++] = (uchar)(CMD_COMM | FUNCTSEL_RESET | USpeed[portnum]); + + // flush the buffers + FlushCOM(portnum); + + // send the packet + if (WriteCOM(portnum,sendlen,sendpacket)) + { + // read back the 1 byte response + if (ReadCOM(portnum,1,readbuffer) == 1) + { + // make sure this byte looks like a reset byte + if (((readbuffer[0] & RB_RESET_MASK) == RB_PRESENCE) || + ((readbuffer[0] & RB_RESET_MASK) == RB_ALARMPRESENCE)) + { + // check if programming voltage available + ProgramAvailable[portnum] = ((readbuffer[0] & 0x20) == 0x20); + return TRUE; + } + else + return FALSE; + } + } + + // an error occured so re-sync with DS2480 + DS2480Detect(portnum); + + return FALSE; +} + +//-------------------------------------------------------------------------- +// Send 1 bit of communication to the 1-Wire Net and return the +// result 1 bit read from the 1-Wire Net. The parameter 'sendbit' +// least significant bit is used and the least significant bit +// of the result is the return bit. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'sendbit' - the least significant bit is the bit to send +// +// Returns: 0: 0 bit read from sendbit +// 1: 1 bit read from sendbit +// +int owTouchBit(int portnum, int sendbit) +{ + uchar readbuffer[10],sendpacket[10]; + int sendlen=0; + + // make sure normal level + owLevel(portnum,MODE_NORMAL); + + // check if correct mode + if (UMode[portnum] != MODSEL_COMMAND) + { + UMode[portnum] = MODSEL_COMMAND; + sendpacket[sendlen++] = MODE_COMMAND; + } + + // construct the command + sendpacket[sendlen] = (sendbit != 0) ? BITPOL_ONE : BITPOL_ZERO; + sendpacket[sendlen++] |= CMD_COMM | FUNCTSEL_BIT | USpeed[portnum]; + + // flush the buffers + FlushCOM(portnum); + + // send the packet + if (WriteCOM(portnum,sendlen,sendpacket)) + { + // read back the response + if (ReadCOM(portnum,1,readbuffer) == 1) + { + // interpret the response + if (((readbuffer[0] & 0xE0) == 0x80) && + ((readbuffer[0] & RB_BIT_MASK) == RB_BIT_ONE)) + return 1; + else + return 0; + } + } + + // an error occured so re-sync with DS2480 + DS2480Detect(portnum); + + return 0; +} + +//-------------------------------------------------------------------------- +// Send 8 bits of communication to the 1-Wire Net and verify that the +// 8 bits read from the 1-Wire Net is the same (write operation). +// The parameter 'sendbyte' least significant 8 bits are used. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'sendbyte' - 8 bits to send (least significant byte) +// +// Returns: TRUE: bytes written and echo was the same +// FALSE: echo was not the same +// +int owWriteByte(int portnum, int sendbyte) +{ + return (owTouchByte(portnum,sendbyte) == sendbyte) ? TRUE : FALSE; +} + + +//-------------------------------------------------------------------------- +// Send 8 bits of read communication to the 1-Wire Net and and return the +// result 8 bits read from the 1-Wire Net. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// +// Returns: 8 bytes read from 1-Wire Net +// +int owReadByte(int portnum) +{ + return owTouchByte(portnum,0xFF); +} + +//-------------------------------------------------------------------------- +// Send 8 bits of communication to the 1-Wire Net and return the +// result 8 bits read from the 1-Wire Net. The parameter 'sendbyte' +// least significant 8 bits are used and the least significant 8 bits +// of the result is the return byte. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'sendbyte' - 8 bits to send (least significant byte) +// +// Returns: 8 bytes read from sendbyte +// +int owTouchByte(int portnum, int sendbyte) +{ + uchar readbuffer[10],sendpacket[10]; + int sendlen=0; + + // make sure normal level + owLevel(portnum,MODE_NORMAL); + + // check if correct mode + if (UMode[portnum] != MODSEL_DATA) + { + UMode[portnum] = MODSEL_DATA; + sendpacket[sendlen++] = MODE_DATA; + } + + // add the byte to send + sendpacket[sendlen++] = (uchar)sendbyte; + + // check for duplication of data that looks like COMMAND mode + if (sendbyte == MODE_COMMAND) + sendpacket[sendlen++] = (uchar)sendbyte; + + // flush the buffers + FlushCOM(portnum); + + // send the packet + if (WriteCOM(portnum,sendlen,sendpacket)) + { + // read back the 1 byte response + if (ReadCOM(portnum,1,readbuffer) == 1) + { + // return the response + return (int)readbuffer[0]; + } + } + + // an error occured so re-sync with DS2480 + DS2480Detect(portnum); + + return 0; +} + +//-------------------------------------------------------------------------- +// Set the 1-Wire Net communucation speed. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'new_speed' - new speed defined as +// MODE_NORMAL 0x00 +// MODE_OVERDRIVE 0x01 +// +// Returns: current 1-Wire Net speed +// +int owSpeed(int portnum, int new_speed) +{ + uchar sendpacket[5]; + short sendlen=0; + int rt = FALSE; + +#if DEBUG_OW_LLU + printf ("starting owSpeed: %d\n", new_speed); +#endif + // check if change from current mode + if (((new_speed == MODE_OVERDRIVE) && + (USpeed[portnum] != SPEEDSEL_OD)) || + ((new_speed == MODE_NORMAL) && + (USpeed[portnum] != SPEEDSEL_FLEX))) + { + if (new_speed == MODE_OVERDRIVE) + { + // if overdrive then switch to 115200 baud + if (DS2480ChangeBaud(portnum,PARMSET_115200) == PARMSET_115200) + { + USpeed[portnum] = SPEEDSEL_OD; + rt = TRUE; + } + } + else if (new_speed == MODE_NORMAL) + { + // else normal so set to 9600 baud + if (DS2480ChangeBaud(portnum,PARMSET_9600) == PARMSET_9600) + { + USpeed[portnum] = SPEEDSEL_FLEX; + rt = TRUE; + } + } + + // if baud rate is set correctly then change DS2480 speed + if (rt) + { + // check if correct mode + if (UMode[portnum] != MODSEL_COMMAND) + { + UMode[portnum] = MODSEL_COMMAND; + sendpacket[sendlen++] = MODE_COMMAND; + } + + // proceed to set the DS2480 communication speed + sendpacket[sendlen++] = CMD_COMM | FUNCTSEL_SEARCHOFF | USpeed[portnum]; + + // send the packet + if (!WriteCOM(portnum,sendlen,sendpacket)) + { + rt = FALSE; + // lost communication with DS2480 then reset + DS2480Detect(portnum); + } + } + } +#if DEBUG_OW_LLU + printf ("owSpeed: %d\n", rt); +#endif + // return the current speed + return (USpeed[portnum] == SPEEDSEL_OD) ? MODE_OVERDRIVE : MODE_NORMAL; +} + +//-------------------------------------------------------------------------- +// Set the 1-Wire Net line level. The values for new_level are +// as follows: +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'new_level' - new level defined as +// MODE_NORMAL 0x00 +// MODE_STRONG5 0x02 +// MODE_PROGRAM 0x04 +// MODE_BREAK 0x08 (not supported) +// +// Returns: current 1-Wire Net level +// +int owLevel(int portnum, int new_level) +{ + uchar sendpacket[10],readbuffer[10]; + short sendlen=0; + short rt=FALSE; + +#if DEBUG_OW_LLU + printf ("owLevel: %d\n", new_level); +#endif + // check if need to change level + if (new_level != ULevel[portnum]) + { + // check if just putting back to normal + if (new_level == MODE_NORMAL) + { + // check if correct mode + if (UMode[portnum] != MODSEL_COMMAND) + { + UMode[portnum] = MODSEL_COMMAND; + sendpacket[sendlen++] = MODE_COMMAND; + } + + // stop pulse command + sendpacket[sendlen++] = MODE_STOP_PULSE; + + // flush the buffers + FlushCOM(portnum); + + // send the packet + if (WriteCOM(portnum,sendlen,sendpacket)) + { + // read back the 1 byte response + if (ReadCOM(portnum,1,readbuffer) == 1) + { + // check response byte + if ((readbuffer[0] & 0xE0) == 0xE0) + { + rt = TRUE; + ULevel[portnum] = MODE_NORMAL; + } + } + } + } + // set new level + else + { + // check if correct mode + if (UMode[portnum] != MODSEL_COMMAND) + { + UMode[portnum] = MODSEL_COMMAND; + sendpacket[sendlen++] = MODE_COMMAND; + } + + // strong 5 volts + if (new_level == MODE_STRONG5) + { + // set the SPUD time value + sendpacket[sendlen++] = CMD_CONFIG | PARMSEL_5VPULSE | PARMSET_infinite; + // add the command to begin the pulse + sendpacket[sendlen++] = CMD_COMM | FUNCTSEL_CHMOD | SPEEDSEL_PULSE | BITPOL_5V; + } + // 12 volts + else if (new_level == MODE_PROGRAM) + { + // check if programming voltage available + if (!ProgramAvailable[portnum]) + return MODE_NORMAL; + + // set the PPD time value + sendpacket[sendlen++] = CMD_CONFIG | PARMSEL_12VPULSE | PARMSET_infinite; + // add the command to begin the pulse + sendpacket[sendlen++] = CMD_COMM | FUNCTSEL_CHMOD | SPEEDSEL_PULSE | BITPOL_12V; + } + + // flush the buffers + FlushCOM(portnum); + + // send the packet + if (WriteCOM(portnum,sendlen,sendpacket)) + { + // read back the 1 byte response from setting time limit + if (ReadCOM(portnum,1,readbuffer) == 1) + { + // check response byte + if ((readbuffer[0] & 0x81) == 0) + { + ULevel[portnum] = new_level; + rt = TRUE; + } + } + } + } + + // if lost communication with DS2480 then reset + if (rt != TRUE) + DS2480Detect(portnum); + } + + // return the current level + return ULevel[portnum]; +} + +//-------------------------------------------------------------------------- +// This procedure creates a fixed 480 microseconds 12 volt pulse +// on the 1-Wire Net for programming EPROM iButtons. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// +// Returns: TRUE successful +// FALSE program voltage not available +// +int owProgramPulse(int portnum) +{ + uchar sendpacket[10],readbuffer[10]; + short sendlen=0; + + // check if programming voltage available + if (!ProgramAvailable[portnum]) + return FALSE; + + // make sure normal level + owLevel(portnum,MODE_NORMAL); + + // check if correct mode + if (UMode[portnum] != MODSEL_COMMAND) + { + UMode[portnum] = MODSEL_COMMAND; + sendpacket[sendlen++] = MODE_COMMAND; + } + + // set the SPUD time value + sendpacket[sendlen++] = CMD_CONFIG | PARMSEL_12VPULSE | PARMSET_512us; + + // pulse command + sendpacket[sendlen++] = CMD_COMM | FUNCTSEL_CHMOD | BITPOL_12V | SPEEDSEL_PULSE; + + // flush the buffers + FlushCOM(portnum); + + // send the packet + if (WriteCOM(portnum,sendlen,sendpacket)) + { + // read back the 2 byte response + if (ReadCOM(portnum,2,readbuffer) == 2) + { + // check response byte + if (((readbuffer[0] | CMD_CONFIG) == + (CMD_CONFIG | PARMSEL_12VPULSE | PARMSET_512us)) && + ((readbuffer[1] & 0xFC) == + (0xFC & (CMD_COMM | FUNCTSEL_CHMOD | BITPOL_12V | SPEEDSEL_PULSE)))) + return TRUE; + } + } + + // an error occured so re-sync with DS2480 + DS2480Detect(portnum); + + return FALSE; +} diff --git a/device/examples/ds390/ow390/ownet.h b/device/examples/ds390/ow390/ownet.h new file mode 100644 index 0000000..7da3687 --- /dev/null +++ b/device/examples/ds390/ow390/ownet.h @@ -0,0 +1,153 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// ownet.h - Include file for 1-Wire Net library +// +// Version: 2.00 +// +// History: 1.02 -> 1.03 Make sure uchar is not defined twice. +// 1.03 -> 2.00 Changed 'MLan' to 'ow'. +// + +// Typedefs +#ifndef OW_UCHAR +#define OW_UCHAR + typedef unsigned char uchar; + typedef unsigned int ushort; + typedef unsigned long ulong; +#endif + +// general defines +#define WRITE_FUNCTION 1 +#define READ_FUNCTION 0 + +// error codes +#define READ_ERROR -1 +#define INVALID_DIR -2 +#define NO_FILE -3 +#define WRITE_ERROR -4 +#define WRONG_TYPE -5 +#define FILE_TOO_BIG -6 + +// Misc +#define FALSE 0 +#define TRUE 1 +#define MAX_PORTNUM 16 + +// mode bit flags +#define MODE_NORMAL 0x00 +#define MODE_OVERDRIVE 0x01 +#define MODE_STRONG5 0x02 +#define MODE_PROGRAM 0x04 +#define MODE_BREAK 0x08 + +// family codes of devices +#define DIR_FAMILY 0x01 +#define TEMP_FAMILY 0x10 +#define NVRAM64K_FAMILY 0x0c +#define SWITCH_FAMILY 0x12 +#define COUNT_FAMILY 0x1D +#define ATOD_FAMILY 0X20 +#define THERMO_FAM 0x21 +#define SBATTERY_FAM 0x26 +// this is weird, the DS2502 should be 0x09 +#define DS2502_FAMILY 0x89 + +// tinilnk.c +extern void FlushCOM(int); +extern int WriteCOM(int,int,uchar*); +extern int ReadCOM(int,int,uchar*); +extern void BreakCOM(int); +extern void SetBaudCOM(int,int); +extern void msDelay(int); +extern long msGettick(void); +extern int OpenCOM(int,char *); +extern void CloseCOM(int); + +// ownetu.c +extern int owFirst(int,int,int); +extern int owNext(int,int,int); +extern void owSerialNum(int,uchar *, int); +extern void owFamilySearchSetup(int,int); +extern void owSkipFamily(int); +extern int owAccess(int); +extern int owVerify(int,int); +extern int owOverdriveAccess(int); +extern int bitacc(int,int,int,uchar *); +extern uchar SerialNum[MAX_PORTNUM][8]; + +// owtrnu.c +extern int owBlock(int,int,uchar *,int); +extern int owReadPacketStd(int,int,int,uchar *); +extern int owWritePacketStd(int,int,uchar *,int,int,int); +extern int owProgramByte(int,int,int,int,int,int); + +// crcutil.c +extern void setcrc16(int,ushort); +extern ushort docrc16(int,ushort); +extern void setcrc8(int,uchar); +extern uchar docrc8(int,uchar); + +// owllu.c +extern int owTouchReset(int); +extern int owTouchByte(int, int); +extern int owWriteByte(int,int); +extern int owReadByte(int); +extern int owSpeed(int,int); +extern int owLevel(int,int); +extern int owProgramPulse(int); + +// owlli for the internal (TINI) ow bus +extern uchar iowTouchReset(void); +extern uchar iowReadByte(void); +extern uchar iowWriteByte(uchar); +extern uchar iowBlock(uchar, uchar*, uchar); +extern uchar iowFirst(uchar do_reset, uchar alarm_only); +extern uchar iowNext(uchar do_reset, uchar alarm_only); +extern uchar iowSpeed(int speed); +extern uchar iowLevel(int level); +extern uchar iowProgramPulse(void); +extern void iowSerialNum(uchar *, uchar); + +// owsesu.c +extern int owAcquire(int,char *, char *); +//extern int owAcquire(int,char *); +extern void owRelease(int, char *); +//extern void owRelease(int); + +// findtype.c +extern int FindDevices(int, uchar FamilySN[][8], int, int); + +// offile.c +int owReadFile(int,uchar *,uchar *); +int owFormatWriteFile(int,uchar *, int, uchar *); + +// sdcc has no exit +#define exit return +// sdcc has no double +#define double float +// sdcc has no key_abort +#define key_abort Serial0CharArrived diff --git a/device/examples/ds390/ow390/ownetu.c b/device/examples/ds390/ow390/ownetu.c new file mode 100644 index 0000000..8629d43 --- /dev/null +++ b/device/examples/ds390/ow390/ownetu.c @@ -0,0 +1,571 @@ +#define DEBUG_OW_NETU 0 +#if DEBUG_OW_NETU +#include +#endif +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// owNetU.C - Network functions for 1-Wire Net devices +// using the DS2480/DS2480B (U) serial interface chip. +// +// Version: 2.00 +// +// 1.02 -> 1.03 Removed caps in #includes for Linux capatibility +// 1.03 -> 2.00 Changed 'MLan' to 'ow'. Added support for +// multiple ports. +// + +#include "ownet.h" +#include "ds2480.h" + +// globally used +uchar SerialNum[MAX_PORTNUM][8]; + +// local variables for this module to hold search state information +static int LastDiscrepancy[MAX_PORTNUM]; +static int LastFamilyDiscrepancy[MAX_PORTNUM]; +static int LastDevice[MAX_PORTNUM]; + +//-------------------------------------------------------------------------- +// The 'owFirst' finds the first device on the 1-Wire Net This function +// contains one parameter 'alarm_only'. When +// 'alarm_only' is TRUE (1) the find alarm command 0xEC is +// sent instead of the normal search command 0xF0. +// Using the find alarm command 0xEC will limit the search to only +// 1-Wire devices that are in an 'alarm' state. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// 'do_reset' - TRUE (1) perform reset before search, FALSE (0) do not +// perform reset before search. +// 'alarm_only' - TRUE (1) the find alarm command 0xEC is +// sent instead of the normal search command 0xF0 +// +// Returns: TRUE (1) : when a 1-Wire device was found and it's +// Serial Number placed in the global SerialNum +// FALSE (0): There are no devices on the 1-Wire Net. +// +int owFirst(int portnum, int do_reset, int alarm_only) +{ + // reset the search state + LastDiscrepancy[portnum] = 0; + LastDevice[portnum] = FALSE; + LastFamilyDiscrepancy[portnum] = 0; + + return owNext(portnum, do_reset, alarm_only); +} + +//-------------------------------------------------------------------------- +// The 'owNext' function does a general search. This function +// continues from the previos search state. The search state +// can be reset by using the 'owFirst' function. +// This function contains one parameter 'alarm_only'. +// When 'alarm_only' is TRUE (1) the find alarm command +// 0xEC is sent instead of the normal search command 0xF0. +// Using the find alarm command 0xEC will limit the search to only +// 1-Wire devices that are in an 'alarm' state. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'do_reset' - TRUE (1) perform reset before search, FALSE (0) do not +// perform reset before search. +// 'alarm_only' - TRUE (1) the find alarm command 0xEC is +// sent instead of the normal search command 0xF0 +// +// Returns: TRUE (1) : when a 1-Wire device was found and it's +// Serial Number placed in the global SerialNum +// FALSE (0): when no new device was found. Either the +// last search was the last device or there +// are no devices on the 1-Wire Net. +// +int owNext(int portnum, int do_reset, int alarm_only) +{ + int i,tmp_last_desc,pos; + uchar tmp_serial_num[8]; + uchar readbuffer[20],sendpacket[40]; + int sendlen=0; + uchar lastcrc8; + + // if the last call was the last one + if (LastDevice[portnum]) + { + // reset the search + LastDiscrepancy[portnum] = 0; + LastDevice[portnum] = FALSE; + LastFamilyDiscrepancy[portnum] = 0; +#if DEBUG_OW_NETU + printf ("owNext: no (more) devices\n"); +#endif + return FALSE; + } + + // check if reset first is requested + if (do_reset) + { + // reset the 1-wire + // if there are no parts on 1-wire, return FALSE + if (!owTouchReset(portnum)) + { + // reset the search + LastDiscrepancy[portnum] = 0; + LastFamilyDiscrepancy[portnum] = 0; + return FALSE; + } + } + + // build the command stream + // call a function that may add the change mode command to the buff + // check if correct mode + if (UMode[portnum] != MODSEL_DATA) + { + UMode[portnum] = MODSEL_DATA; + sendpacket[sendlen++] = MODE_DATA; + } + + // search command + if (alarm_only) + sendpacket[sendlen++] = 0xEC; // issue the alarming search command + else + sendpacket[sendlen++] = 0xF0; // issue the search command + + // change back to command mode + UMode[portnum] = MODSEL_COMMAND; + sendpacket[sendlen++] = MODE_COMMAND; + + // search mode on + sendpacket[sendlen++] = (uchar)(CMD_COMM | FUNCTSEL_SEARCHON | USpeed[portnum]); + + // change back to data mode + UMode[portnum] = MODSEL_DATA; + sendpacket[sendlen++] = MODE_DATA; + + // set the temp Last Descrep to none + tmp_last_desc = 0xFF; + + // add the 16 bytes of the search + pos = sendlen; + for (i = 0; i < 16; i++) + sendpacket[sendlen++] = 0; + + // only modify bits if not the first search + if (LastDiscrepancy[portnum] != 0xFF) + { + // set the bits in the added buffer + for (i = 0; i < 64; i++) + { + // before last discrepancy + if (i < (LastDiscrepancy[portnum] - 1)) + bitacc(WRITE_FUNCTION, + bitacc(READ_FUNCTION,0,i,&SerialNum[portnum][0]), + (short)(i * 2 + 1), + &sendpacket[pos]); + // at last discrepancy + else if (i == (LastDiscrepancy[portnum] - 1)) + bitacc(WRITE_FUNCTION,1, + (short)(i * 2 + 1), + &sendpacket[pos]); + // after last discrepancy so leave zeros + } + } + + // change back to command mode + UMode[portnum] = MODSEL_COMMAND; + sendpacket[sendlen++] = MODE_COMMAND; + + // search OFF + sendpacket[sendlen++] = (uchar)(CMD_COMM | FUNCTSEL_SEARCHOFF | USpeed[portnum]); + + // flush the buffers + FlushCOM(portnum); + + // send the packet + if (WriteCOM(portnum,sendlen,sendpacket)) + { + // read back the 1 byte response + if (ReadCOM(portnum,17,readbuffer) == 17) + { + // interpret the bit stream + for (i = 0; i < 64; i++) + { + // get the SerialNum bit + bitacc(WRITE_FUNCTION, + bitacc(READ_FUNCTION,0,(short)(i * 2 + 1),&readbuffer[1]), + i, + &tmp_serial_num[0]); + // check LastDiscrepancy + if ((bitacc(READ_FUNCTION,0,(short)(i * 2),&readbuffer[1]) == 1) && + (bitacc(READ_FUNCTION,0,(short)(i * 2 + 1),&readbuffer[1]) == 0)) + { + tmp_last_desc = i + 1; + // check LastFamilyDiscrepancy + if (i < 8) + LastFamilyDiscrepancy[portnum] = i + 1; + } + } + + // do dowcrc + setcrc8(portnum,0); + for (i = 0; i < 8; i++) + lastcrc8 = docrc8(portnum,tmp_serial_num[i]); + + // check results + if ((lastcrc8 != 0) || (LastDiscrepancy[portnum] == 63) || (tmp_serial_num[0] == 0)) + { + // error during search + // reset the search + LastDiscrepancy[portnum] = 0; + LastDevice[portnum] = FALSE; + LastFamilyDiscrepancy[portnum] = 0; +#if DEBUG_OW_NETU + printf ("owNext: check results failed\n"); +#endif + return FALSE; + } + // successful search + else + { + // check for lastone + if ((tmp_last_desc == LastDiscrepancy[portnum]) || (tmp_last_desc == 0xFF)) + LastDevice[portnum] = TRUE; + + // copy the SerialNum to the buffer + for (i = 0; i < 8; i++) + SerialNum[portnum][i] = tmp_serial_num[i]; + + // set the count + LastDiscrepancy[portnum] = tmp_last_desc; + return TRUE; + } + } else { +#if DEBUG_OW_NETU + printf ("owNext: ReadCOM failed\n"); +#endif + } + } else { +#if DEBUG_OW_NETU + printf ("owNext: WriteCOM failed\n"); +#endif + } + + // an error occured so re-sync with DS2480 + DS2480Detect(portnum); + + // reset the search + LastDiscrepancy[portnum] = 0; + LastDevice[portnum] = FALSE; + LastFamilyDiscrepancy[portnum] = 0; + + return FALSE; +} + +//-------------------------------------------------------------------------- +// The 'owSerialNum' function either reads or sets the SerialNum buffer +// that is used in the search functions 'owFirst' and 'owNext'. +// This function contains two parameters, 'serialnum_buf' is a pointer +// to a buffer provided by the caller. 'serialnum_buf' should point to +// an array of 8 unsigned chars. The second parameter is a flag called +// 'do_read' that is TRUE (1) if the operation is to read and FALSE +// (0) if the operation is to set the internal SerialNum buffer from +// the data in the provided buffer. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'serialnum_buf' - buffer to that contains the serial number to set +// when do_read = FALSE (0) and buffer to get the serial +// number when do_read = TRUE (1). +// 'do_read' - flag to indicate reading (1) or setting (0) the current +// serial number. +// +void owSerialNum(int portnum, uchar *serialnum_buf, int do_read) +{ + int i; + + // read the internal buffer and place in 'serialnum_buf' + if (do_read) + { + for (i = 0; i < 8; i++) + serialnum_buf[i] = SerialNum[portnum][i]; + } + // set the internal buffer from the data in 'serialnum_buf' + else + { + for (i = 0; i < 8; i++) + SerialNum[portnum][i] = serialnum_buf[i]; + } +} + +//-------------------------------------------------------------------------- +// Setup the search algorithm to find a certain family of devices +// the next time a search function is called 'owNext'. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'search_family' - family code type to set the search algorithm to find +// next. +// +void owFamilySearchSetup(int portnum, int search_family) +{ + int i; + + // set the search state to find search_family type devices + SerialNum[portnum][0] = (uchar)search_family; + for (i = 1; i < 8; i++) + SerialNum[portnum][i] = 0; + LastDiscrepancy[portnum] = 64; + LastDevice[portnum] = FALSE; +} + +//-------------------------------------------------------------------------- +// Set the current search state to skip the current family code. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// +void owSkipFamily(int portnum) +{ + // set the Last discrepancy to last family discrepancy + LastDiscrepancy[portnum] = LastFamilyDiscrepancy[portnum]; + + // check for end of list + if (LastDiscrepancy[portnum] == 0) + LastDevice[portnum] = TRUE; +} + +//-------------------------------------------------------------------------- +// The 'owAccess' function resets the 1-Wire and sends a MATCH Serial +// Number command followed by the current SerialNum code. After this +// function is complete the 1-Wire device is ready to accept device-specific +// commands. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// +// Returns: TRUE (1) : reset indicates present and device is ready +// for commands. +// FALSE (0): reset does not indicate presence or echos 'writes' +// are not correct. +// +int owAccess(int portnum) +{ + uchar sendpacket[9]; + int i; + + // reset the 1-wire + if (owTouchReset(portnum)) + { + // create a buffer to use with block function + // match Serial Number command 0x55 + sendpacket[0] = 0x55; + // Serial Number + for (i = 1; i < 9; i++) + sendpacket[i] = SerialNum[portnum][i-1]; + + // send/recieve the transfer buffer + if (owBlock(portnum,FALSE,sendpacket,9)) + { + // verify that the echo of the writes was correct + for (i = 1; i < 9; i++) + if (sendpacket[i] != SerialNum[portnum][i-1]) + return FALSE; + if (sendpacket[0] != 0x55) + return FALSE; + else + return TRUE; + } + } + + // reset or match echo failed + return FALSE; +} + +//---------------------------------------------------------------------- +// The function 'owVerify' verifies that the current device +// is in contact with the 1-Wire Net. +// Using the find alarm command 0xEC will verify that the device +// is in contact with the 1-Wire Net and is in an 'alarm' state. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'alarm_only' - TRUE (1) the find alarm command 0xEC +// is sent instead of the normal search +// command 0xF0. +// +// Returns: TRUE (1) : when the 1-Wire device was verified +// to be on the 1-Wire Net +// with alarm_only == FALSE +// or verified to be on the 1-Wire Net +// AND in an alarm state when +// alarm_only == TRUE. +// FALSE (0): the 1-Wire device was not on the +// 1-Wire Net or if alarm_only +// == TRUE, the device may be on the +// 1-Wire Net but in a non-alarm state. +// +int owVerify(int portnum, int alarm_only) +{ + int i,sendlen=0,goodbits=0,cnt=0,s,tst; + uchar sendpacket[50]; + + // construct the search rom + if (alarm_only) + sendpacket[sendlen++] = 0xEC; // issue the alarming search command + else + sendpacket[sendlen++] = 0xF0; // issue the search command + // set all bits at first + for (i = 1; i <= 24; i++) + sendpacket[sendlen++] = 0xFF; + // now set or clear apropriate bits for search + for (i = 0; i < 64; i++) + bitacc(WRITE_FUNCTION,bitacc(READ_FUNCTION,0,i,&SerialNum[portnum][0]),(int)((i+1)*3-1),&sendpacket[1]); + + // send/recieve the transfer buffer + if (owBlock(portnum,TRUE,sendpacket,sendlen)) + { + // check results to see if it was a success + for (i = 0; i < 192; i += 3) + { + tst = (bitacc(READ_FUNCTION,0,i,&sendpacket[1]) << 1) | + bitacc(READ_FUNCTION,0,(int)(i+1),&sendpacket[1]); + + s = bitacc(READ_FUNCTION,0,cnt++,&SerialNum[portnum][0]); + + if (tst == 0x03) // no device on line + { + goodbits = 0; // number of good bits set to zero + break; // quit + } + + if (((s == 0x01) && (tst == 0x02)) || + ((s == 0x00) && (tst == 0x01)) ) // correct bit + goodbits++; // count as a good bit + } + + // check too see if there were enough good bits to be successful + if (goodbits >= 8) + return TRUE; + } + + // block fail or device not present + return FALSE; +} + +//---------------------------------------------------------------------- +// Perform a overdrive MATCH command to select the 1-Wire device with +// the address in the ID data register. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// +// Returns: TRUE: If the device is present on the 1-Wire Net and +// can do overdrive then the device is selected. +// FALSE: Device is not present or not capable of overdrive. +// +// *Note: This function could be converted to send DS2480 +// commands in one packet. +// +int owOverdriveAccess(int portnum) +{ + uchar sendpacket[8]; + int i, bad_echo = FALSE; + +#if DEBUG_OW_NETU + printf ("owOverdriveAccess\n"); +#endif + // make sure normal level + owLevel(portnum,MODE_NORMAL); + + // force to normal communication speed + owSpeed(portnum,MODE_NORMAL); + + // call the 1-Wire Net reset function + if (owTouchReset(portnum)) + { + // send the match command 0x69 + if (owWriteByte(portnum,0x69)) + { + // switch to overdrive communication speed + owSpeed(portnum,MODE_OVERDRIVE); + + // create a buffer to use with block function + // Serial Number + for (i = 0; i < 8; i++) + sendpacket[i] = SerialNum[portnum][i]; + + // send/recieve the transfer buffer + if (owBlock(portnum,FALSE,sendpacket,8)) + { + // verify that the echo of the writes was correct + for (i = 0; i < 8; i++) + if (sendpacket[i] != SerialNum[portnum][i]) + bad_echo = TRUE; + // if echo ok then success + if (!bad_echo) { +#if DEBUG_OW_NETU + printf ("owOverdriveAccess success\n"); +#endif + return TRUE; + } + } + } + } + + // failure, force back to normal communication speed + owSpeed(portnum,MODE_NORMAL); + + return FALSE; +} + +//-------------------------------------------------------------------------- +// Bit utility to read and write a bit in the buffer 'buf'. +// +// 'op' - operation (1) to set and (0) to read +// 'state' - set (1) or clear (0) if operation is write (1) +// 'loc' - bit number location to read or write +// 'buf' - pointer to array of bytes that contains the bit +// to read or write +// +// Returns: 1 if operation is set (1) +// 0/1 state of bit number 'loc' if operation is reading +// +int bitacc(int op, int state, int loc, uchar *buf) +{ + int nbyt,nbit; + + nbyt = (loc / 8); + nbit = loc - (nbyt * 8); + + if (op == WRITE_FUNCTION) + { + if (state) + buf[nbyt] |= (0x01 << nbit); + else + buf[nbyt] &= ~(0x01 << nbit); + + return 1; + } + else + return ((buf[nbyt] >> nbit) & 0x01); +} diff --git a/device/examples/ds390/ow390/owsesu.c b/device/examples/ds390/ow390/owsesu.c new file mode 100644 index 0000000..897f55f --- /dev/null +++ b/device/examples/ds390/ow390/owsesu.c @@ -0,0 +1,96 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// owSesU.C - Acquire and release a Session on the 1-Wire Net. +// +// Version: 2.00 +// +// History: 1.03 -> 2.00 Changed 'MLan' to 'ow'. Added support for +// multiple ports. + +#include +#include "ownet.h" +#include "ds2480.h" + +// keep port name for later message when closing +static char portname[MAX_PORTNUM][128]; + +//--------------------------------------------------------------------------- +// Attempt to acquire a 1-Wire net using a com port and a DS2480 based +// adapter. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'port_zstr' - zero terminated port name. For this platform +// use format COMX where X is the port number. +// 'return_msg' - zero terminated return message. +// +// Returns: TRUE - success, COM port opened +// +int owAcquire(int portnum, char *port_zstr, char *return_msg) +{ + int cnt=0; + portname[portnum][0] = 0; + + // attempt to open the communications port + if (OpenCOM(portnum,port_zstr)) + cnt += sprintf(&return_msg[cnt],"%s opened\n",port_zstr); + else + { + cnt += sprintf(&return_msg[cnt],"Could not open port %s," + " aborting.\nClosing port %s.\n",port_zstr,port_zstr); + return FALSE; + } + + // detect DS2480 + if (DS2480Detect(portnum)) + cnt += sprintf(&return_msg[cnt],"DS2480-based adapter detected\n"); + else + { + cnt += sprintf(&return_msg[cnt],"DS2480-based adapter not detected, aborting program\n"); + cnt += sprintf(&return_msg[cnt],"Closing port %s.\n",port_zstr); + CloseCOM(portnum); + return FALSE; + } + + // success + sprintf(portname[portnum],"%s",port_zstr); + return TRUE; +} + +//--------------------------------------------------------------------------- +// Release the previously acquired a 1-Wire net. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'return_msg' - zero terminated return message. +// +void owRelease(int portnum, char *return_msg) +{ + // close the communications port + sprintf(return_msg,"Closing port %s.\n",portname[portnum]); + CloseCOM(portnum); +} diff --git a/device/examples/ds390/ow390/owtrnu.c b/device/examples/ds390/ow390/owtrnu.c new file mode 100644 index 0000000..441df0e --- /dev/null +++ b/device/examples/ds390/ow390/owtrnu.c @@ -0,0 +1,593 @@ +#define DEBUG_OW_TRNU 0 +#if DEBUG_OW_TRNU +#include +#endif +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// owTranU.C - Transport functions for 1-Wire Net +// using the DS2480 (U) serial interface chip. +// +// Version: 2.00 +// +// History: 1.02 -> 1.03 Removed caps in #includes for Linux capatibility +// 1.03 -> 2.00 Changed 'MLan' to 'ow'. Added support for +// multiple ports. +// + +#include "ownet.h" +#include "ds2480.h" + +// local functions +static int Write_Scratchpad(int,uchar *,int,int); +static int Copy_Scratchpad(int,int,int); + +//-------------------------------------------------------------------------- +// The 'owBlock' transfers a block of data to and from the +// 1-Wire Net with an optional reset at the begining of communication. +// The result is returned in the same buffer. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// 'do_reset' - cause a owTouchReset to occure at the begining of +// communication TRUE(1) or not FALSE(0) +// 'tran_buf' - pointer to a block of unsigned +// chars of length 'tran_len' that will be sent +// to the 1-Wire Net +// 'tran_len' - length in bytes to transfer + +// Supported devices: all +// +// Returns: TRUE (1) : The optional reset returned a valid +// presence (do_reset == TRUE) or there +// was no reset required. +// FALSE (0): The reset did not return a valid prsence +// (do_reset == TRUE). +// +// The maximum tran_length is 64 +// +int owBlock(int portnum, int do_reset, uchar *tran_buf, int tran_len) +{ + uchar sendpacket[150]; + int sendlen=0,pos,i; + + // check for a block too big + if (tran_len > 64) + return FALSE; + + // check if need to do a owTouchReset first + if (do_reset) + { + if (!owTouchReset(portnum)) + return FALSE; + } + + // construct the packet to send to the DS2480 + // check if correct mode + if (UMode[portnum] != MODSEL_DATA) + { + UMode[portnum] = MODSEL_DATA; + sendpacket[sendlen++] = MODE_DATA; + } + + // add the bytes to send + pos = sendlen; + for (i = 0; i < tran_len; i++) + { + sendpacket[sendlen++] = tran_buf[i]; + + // check for duplication of data that looks like COMMAND mode + if (tran_buf[i] == MODE_COMMAND) + sendpacket[sendlen++] = tran_buf[i]; + } + + // flush the buffers + FlushCOM(portnum); + + // send the packet + if (WriteCOM(portnum,sendlen,sendpacket)) + { + // read back the response + if (ReadCOM(portnum,tran_len,tran_buf) == tran_len) { + return TRUE; + } + } + + // an error occured so re-sync with DS2480 + DS2480Detect(portnum); + + return FALSE; +} + +//-------------------------------------------------------------------------- +// Read a Universal Data Packet from a standard NVRAM iButton +// and return it in the provided buffer. The page that the +// packet resides on is 'start_page'. Note that this function is limited +// to single page packets. The buffer 'read_buf' must be at least +// 29 bytes long. +// +// The Universal Data Packet always start on page boundaries but +// can end anywhere. The length is the number of data bytes not +// including the length byte and the CRC16 bytes. There is one +// length byte. The CRC16 is first initialized to the starting +// page number. This provides a check to verify the page that +// was intended is being read. The CRC16 is then calculated over +// the length and data bytes. The CRC16 is then inverted and stored +// low byte first followed by the high byte. +// +// Supported devices: DS1992, DS1993, DS1994, DS1995, DS1996, DS1982, +// DS1985, DS1986, DS2407, and DS1971. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// 'do_access' - flag to indicate if an 'owAccess' should be +// peformed at the begining of the read. This may +// be FALSE (0) if the previous call was to read the +// previous page (start_page-1). +// 'start_page' - page number to start the read from +// 'read_buf' - pointer to a location to store the data read +// +// Returns: >=0 success, number of data bytes in the buffer +// -1 failed to read a valid UDP +// +// +int owReadPacketStd(int portnum, int do_access, int start_page, uchar *read_buf) +{ + int i,length,sendlen=0,head_len=0; + uchar sendpacket[50]; + ushort lastcrc16; + +#if DEBUG_OW_TRNU + printf ("owReadPacketStd: %d %d\n", do_access, start_page); +#endif + // check if access header is done + // (only use if in sequention read with one access at begining) + if (do_access) + { + // match command + sendpacket[sendlen++] = 0x55; + for (i = 0; i < 8; i++) + sendpacket[sendlen++] = SerialNum[portnum][i]; + // read memory command + sendpacket[sendlen++] = 0xF0; + // write the target address + sendpacket[sendlen++] = ((start_page << 5) & 0xFF); + sendpacket[sendlen++] = (start_page >> 3); + // check for DS1982 exception (redirection byte) + if (SerialNum[portnum][0] == 0x09) + sendpacket[sendlen++] = 0xFF; + // record the header length + head_len = sendlen; + } + // read the entire page length byte + for (i = 0; i < 32; i++) + sendpacket[sendlen++] = 0xFF; + + // send/recieve the transfer buffer + if (owBlock(portnum,do_access,sendpacket,sendlen)) + { + // seed crc with page number + setcrc16(portnum,(ushort)start_page); + + // attempt to read UDP from sendpacket + length = sendpacket[head_len]; + docrc16(portnum,(ushort)length); + + // verify length is not too large + if (length <= 29) + { + // loop to read packet including CRC + for (i = 0; i < length; i++) + { + read_buf[i] = sendpacket[i+1+head_len]; + docrc16(portnum,read_buf[i]); + } + + // read and compute the CRC16 + docrc16(portnum,sendpacket[i+1+head_len]); + lastcrc16 = docrc16(portnum,sendpacket[i+2+head_len]); + + // verify the CRC16 is correct + if (lastcrc16 == 0xB001) + return length; // return number of byte in record +#if DEBUG_OW_TRNU + printf ("owReadPacketStd: crc error in page %d\n", start_page); +#endif + } + } +#if DEBUG_OW_TRNU + printf ("owReadPacketStd: block>29 : %d\n", length); +#endif + // failed block or incorrect CRC + return -1; +} + +//-------------------------------------------------------------------------- +// Write a Universal Data Packet onto a standard NVRAM 1-Wire device +// on page 'start_page'. This function is limited to UDPs that +// fit on one page. The data to write is provided as a buffer +// 'write_buf' with a length 'write_len'. +// +// The Universal Data Packet always start on page boundaries but +// can end anywhere. The length is the number of data bytes not +// including the length byte and the CRC16 bytes. There is one +// length byte. The CRC16 is first initialized to the starting +// page number. This provides a check to verify the page that +// was intended is being read. The CRC16 is then calculated over +// the length and data bytes. The CRC16 is then inverted and stored +// low byte first followed by the high byte. +// +// Supported devices: is_eprom=0 +// DS1992, DS1993, DS1994, DS1995, DS1996 +// is_eprom=1, crc_type=0(CRC8) +// DS1982 +// is_eprom=1, crc_type=1(CRC16) +// DS1985, DS1986, DS2407 +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// 'start_page' - page number to write packet to +// 'write_buf' - pointer to buffer containing data to write +// 'write_len' - number of data byte in write_buf +// 'is_eprom' - flag set if device is an EPROM (1 EPROM, 0 NVRAM) +// 'crc_type' - if is_eprom=1 then indicates CRC type +// (0 CRC8, 1 CRC16) +// +// Returns: TRUE(1) success, packet written +// FALSE(0) failure to write, contact lost or device locked +// +// +int owWritePacketStd(int portnum, int start_page, uchar *write_buf, + int write_len, int is_eprom, int crc_type) +{ + uchar construct_buffer[32]; + int i,buffer_cnt=0,start_address,do_access; + ushort lastcrc16; + +#if DEBUG_OW_TRNU + printf ("owWritePacketStd: %d %d\n", start_page, write_len); +#endif + // check to see if data too long to fit on device + if (write_len > 29) { +#if DEBUG_OW_TRNU + printf ("owWritePacketStd: too long\n"); +#endif + return FALSE; + } + + // seed crc with page number + setcrc16(portnum,(ushort)start_page); + + // set length byte + construct_buffer[buffer_cnt++] = (uchar)(write_len); + docrc16(portnum,(ushort)write_len); + + // fill in the data to write + for (i = 0; i < write_len; i++) + { + lastcrc16 = docrc16(portnum,write_buf[i]); + construct_buffer[buffer_cnt++] = write_buf[i]; + } + + // add the crc + construct_buffer[buffer_cnt++] = (uchar)(~(lastcrc16 & 0xFF)); + construct_buffer[buffer_cnt++] = (uchar)(~((lastcrc16 & 0xFF00) >> 8)); + + // check if not EPROM + if (!is_eprom) + { + // write the page + if (!Write_Scratchpad(portnum,construct_buffer,start_page,buffer_cnt)) { +#if DEBUG_OW_TRNU + printf ("owWritePacketStd: couldn't Write_Scratchpad\n"); +#endif + return FALSE; + } + + // copy the scratchpad + if (!Copy_Scratchpad(portnum,start_page,buffer_cnt)) { +#if DEBUG_OW_TRNU + printf ("owWritePacketStd: couldn't Copy_Scratchpad\n"); +#endif + return FALSE; + } + + // copy scratch pad was good then success + return TRUE; + } + // is EPROM + else + { + // calculate the start address + start_address = ((start_page >> 3) << 8) | ((start_page << 5) & 0xFF); + do_access = TRUE; + // loop to program each byte + for (i = 0; i < buffer_cnt; i++) + { + if (owProgramByte(portnum,construct_buffer[i], start_address + i, + 0x0F, crc_type, do_access) != construct_buffer[i]) + return FALSE; + do_access = FALSE; + } + return TRUE; + } +} + +//-------------------------------------------------------------------------- +// Write a byte to an EPROM 1-Wire device. +// +// Supported devices: crc_type=0(CRC8) +// DS1982 +// crc_type=1(CRC16) +// DS1985, DS1986, DS2407 +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// 'write_byte' - byte to program +// 'addr' - address of byte to program +// 'write_cmd' - command used to write (0x0F reg mem, 0x55 status) +// 'crc_type' - CRC used (0 CRC8, 1 CRC16) +// 'do_access' - Flag to access device for each byte +// (0 skip access, 1 do the access) +// WARNING, only use do_access=0 if programing the NEXT +// byte immediatly after the previous byte. +// +// Returns: >=0 success, this is the resulting byte from the program +// effort +// -1 error, device not connected or program pulse voltage +// not available +// +int owProgramByte(int portnum, int write_byte, int addr, int write_cmd, + int crc_type, int do_access) +{ + ushort lastcrc16; + uchar lastcrc8; + + // optionally access the device + if (do_access) + { + if (!owAccess(portnum)) + return -1; + + // send the write command + if (!owWriteByte(portnum,write_cmd)) + return -1; + + // send the address + if (!owWriteByte(portnum,addr & 0xFF)) + return -1; + if (!owWriteByte(portnum,addr >> 8)) + return -1; + } + + // send the data to write + if (!owWriteByte(portnum,write_byte)) + return -1; + + // read the CRC + if (crc_type == 0) + { + // calculate CRC8 + if (do_access) + { + setcrc8(portnum,0); + docrc8(portnum,(uchar)write_cmd); + docrc8(portnum,(uchar)(addr & 0xFF)); + docrc8(portnum,(uchar)(addr >> 8)); + } + else + setcrc8(portnum,(uchar)(addr & 0xFF)); + + docrc8(portnum,(uchar)write_byte); + // read and calculate the read crc + lastcrc8 = docrc8(portnum,(uchar)owReadByte(portnum)); + // crc should now be 0x00 + if (lastcrc8 != 0) + return -1; + } + else + { + // CRC16 + if (do_access) + { + setcrc16(portnum,0); + docrc16(portnum,(ushort)write_cmd); + docrc16(portnum,(ushort)(addr & 0xFF)); + docrc16(portnum,(ushort)(addr >> 8)); + } + else + setcrc16(portnum,(ushort)addr); + docrc16(portnum,(ushort)write_byte); + // read and calculate the read crc + docrc16(portnum,(ushort)owReadByte(portnum)); + lastcrc16 = docrc16(portnum,(ushort)owReadByte(portnum)); + // crc should now be 0xB001 + if (lastcrc16 != 0xB001) + return -1; + } + + // send the program pulse + if (!owProgramPulse(portnum)) + return -1; + + // read back and return the resulting byte + return owReadByte(portnum); +} + +//-------------------------------------------------------------------------- +// Write the scratchpad of a standard NVRam device such as the DS1992,3,4 +// and verify its contents. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// 'write_buf' - pointer to buffer containing data to write +// 'start_page' - page number to write packet to +// 'write_len' - number of data byte in write_buf +// +// Returns: TRUE(1) success, the data was written and verified +// FALSE(0) failure, the data could not be written +// +// +int Write_Scratchpad(int portnum, uchar *write_buf, int start_page, int write_len) +{ + int i,sendlen=0; + uchar sendpacket[50]; + +#if DEBUG_OW_TRNU + printf ("Write_Scratchpad: %d %d\n", start_page, write_len); +#endif + // match command + sendpacket[sendlen++] = 0x55; + for (i = 0; i < 8; i++) + sendpacket[sendlen++] = SerialNum[portnum][i]; + // write scratchpad command + sendpacket[sendlen++] = 0x0F; + // write the target address + sendpacket[sendlen++] = ((start_page << 5) & 0xFF); + sendpacket[sendlen++] = (start_page >> 3); + + // write packet bytes + for (i = 0; i < write_len; i++) + sendpacket[sendlen++] = write_buf[i]; + + // send/recieve the transfer buffer + if (owBlock(portnum,TRUE,sendpacket,sendlen)) + { + // now attempt to read back to check + sendlen = 0; + // match command + sendpacket[sendlen++] = 0x55; + for (i = 0; i < 8; i++) + sendpacket[sendlen++] = SerialNum[portnum][i]; + // read scratchpad command + sendpacket[sendlen++] = 0xAA; + // read the target address, offset and data + for (i = 0; i < (write_len + 3); i++) + sendpacket[sendlen++] = 0xFF; + + // send/recieve the transfer buffer + if (owBlock(portnum,TRUE,sendpacket,sendlen)) + { + // check address and offset of scratchpad read + if ((sendpacket[10] != (int)((start_page << 5) & 0xFF)) || + (sendpacket[11] != (int)(start_page >> 3)) || + (sendpacket[12] != (int)(write_len - 1))) { +#if DEBUG_OW_TRNU + printf ("\nWrite_Scratchpad: check failed\n"); +#endif + //return FALSE; + } + + // verify each data byte + for (i = 0; i < write_len; i++) + if (sendpacket[i+13] != write_buf[i]) { +#if DEBUG_OW_TRNU + printf ("\nWrite_Scratchpad: data check failed\n"); +#endif + return FALSE; + } + + // must have verified + return TRUE; + } + } +#if DEBUG_OW_TRNU + printf ("\nWrite_Scratchpad: owBlock failed\n"); +#endif + + // failed a block tranfer + return FALSE; +} + +//-------------------------------------------------------------------------- +// Copy the contents of the scratchpad to its intended nv ram page. The +// page and length of the data is needed to build the authorization bytes +// to copy. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// 'start_page' - page number to write packet to +// 'write_len' - number of data bytes that are being copied +// +// Returns: TRUE(1) success +// FALSE(0) failure +// +int Copy_Scratchpad(int portnum, int start_page, int write_len) +{ + int i,sendlen=0; + uchar sendpacket[50]; + +#if DEBUG_OW_TRNU + printf ("Copy_Scratchpad: %d %d\n", start_page, write_len); +#endif + + // match command + sendpacket[sendlen++] = 0x55; + for (i = 0; i < 8; i++) + sendpacket[sendlen++] = SerialNum[portnum][i]; + // copy scratchpad command + sendpacket[sendlen++] = 0x55; + // write the target address + sendpacket[sendlen++] = ((start_page << 5) & 0xFF); + sendpacket[sendlen++] = (start_page >> 3); + sendpacket[sendlen++] = write_len - 1; + // read copy result + sendpacket[sendlen++] = 0xFF; + +#if DEBUG_OW_TRNU + printf ("Copy_Scratchpad: %d, %02x %02x %02x %02x\n", sendlen, + sendpacket[10],sendpacket[11],sendpacket[12],sendpacket[13]); +#endif + // send/recieve the transfer buffer + if (owBlock(portnum,TRUE,sendpacket,sendlen)) + { + // check address and offset of scratchpad read + if ((sendpacket[10] != (int)((start_page << 5) & 0xFF)) || + (sendpacket[11] != (int)(start_page >> 3)) || + (sendpacket[12] != (int)(write_len - 1)) || + (sendpacket[13] & 0xF0)) { +#if DEBUG_OW_TRNU + printf ("Copy_Scratchpad: %d, check failed: %02x %02x %02x %02x\n", + sendlen, + sendpacket[10],sendpacket[11],sendpacket[12],sendpacket[13]); +#endif + return FALSE; + } + else { +#if DEBUG_OW_TRNU + printf ("Copy_Scratchpad: %02x %02x %02x %02x\n", + sendpacket[10],sendpacket[11],sendpacket[12],sendpacket[13]); +#endif + return TRUE; + } + } +#if DEBUG_OW_TRNU + printf ("Copy_Scratchpad: owBlock failed\n"); +#endif + // failed a block tranfer + return FALSE; +} + diff --git a/device/examples/ds390/ow390/swt12.c b/device/examples/ds390/ow390/swt12.c new file mode 100644 index 0000000..5060458 --- /dev/null +++ b/device/examples/ds390/ow390/swt12.c @@ -0,0 +1,258 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//-------------------------------------------------------------------------- +// +// swt12.c - Modifies Channel A and B and returns info byte data for +// the DS2406 and DS2407. +// version 2.00 + + +// Include files +#include +#include "ownet.h" +#include "swt12.h" + +//---------------------------------------------------------------------- +// SUBROUTINE - ReadSwitch12 +// +// This routine gets the Channel Info Byte and returns it. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'ClearActivity' - To reset the button +// +// Returns: (-1) If the Channel Info Byte could not be read. +// (Info Byte) If the Channel Info Byte could be read. +// +int ReadSwitch12(int portnum, int ClearActivity) +{ + int rt=-1; //this is the return value depending if the byte was read + int trans_cnt=0; //this is the counter for the number of bytes to send + uchar transfer[30]; //this is the whole block of byte info + + // access and verify it is there + if (owAccess(portnum)) + { + // reset CRC + setcrc16(portnum,0); + + // channel access command + transfer[trans_cnt++] = 0xF5; + docrc16(portnum,0xF5); + + // control bytes + if (ClearActivity) + { + transfer[trans_cnt++] = 0xD5; + docrc16(portnum,0xD5); + } + else + { + transfer[trans_cnt++] = 0x55; + docrc16(portnum,0x55); + } + + transfer[trans_cnt++] = 0xFF; + docrc16(portnum,0xFF); + + // read the info byte + transfer[trans_cnt++] = 0xFF; + + // dummy data + transfer[trans_cnt++] = 0xFF; + transfer[trans_cnt++] = 0xFF; + transfer[trans_cnt++] = 0xFF; + + if (owBlock(portnum,FALSE,transfer,trans_cnt)) + { + rt = transfer[3]; + // read a dummy read byte and CRC16 + docrc16(portnum,transfer[trans_cnt-4]); + docrc16(portnum,transfer[trans_cnt-3]); + docrc16(portnum,transfer[trans_cnt-2]); + if(docrc16(portnum,transfer[trans_cnt-1]) != 0xB001) + rt = -1; + } + } + else + rt = -1; + + return rt; +} + +//---------------------------------------------------------------------- +// SUBROUTINE - SetSwitch12 +// +// This routine sets the channel state of the specified DS2406 +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'SerialNum' - Serial Number of DS2406 to set the switch state +// 'State' - Is a type containing what to set A and/or B to. It +// also contains the other fields that maybe written later +// +// Returns: TRUE(1) State of DS2406 set and verified +// FALSE(0) could not set the DS2406, perhaps device is not +// in contact +// +int SetSwitch12(int portnum, uchar *SerialNum, SwitchProps *State) +{ + ushort st; + int rt=FALSE; + uchar send_block[30]; + int send_cnt=0; + + setcrc16(portnum,0); + + // set the device serial number to the counter device + owSerialNum(portnum,SerialNum,FALSE); + + // access the device + if (owAccess(portnum)) + { + // create a block to send that reads the counter + // write status command + send_block[send_cnt++] = 0x55; + docrc16(portnum,0x55); + + // address of switch state + send_block[send_cnt++] = 0x07; + docrc16(portnum,0x07); + send_block[send_cnt++] = 0x00; + docrc16(portnum,0x00); + + // write state + st = 0x1F; + if(!State->Chan_B) st |= 0x40; + if(!State->Chan_A) st |= 0x20; + // more ifs can be added here for the other fields. + + send_block[send_cnt++] = (uchar)st; + docrc16(portnum,st); + + // read CRC16 + send_block[send_cnt++] = 0xFF; + send_block[send_cnt++] = 0xFF; + + // now send the block + if (owBlock(portnum,FALSE,send_block,send_cnt)) + { + // perform the CRC16 on the last 2 bytes of packet + docrc16(portnum,send_block[send_cnt-2]); + + // verify crc16 is correct + if(docrc16(portnum,send_block[send_cnt-1]) == 0xB001) + rt = TRUE; + } + } + + // return the result flag rt + return rt; +} + + +//---------------------------------------------------------------------- +// SUBROUTINE - SwitchStateToString12 +// +// This routine uses the info byte to return a string with all the data. +// +// 'infobyte' - This is the information byte data from the hardware. +// 'outstr' - This will be the output string. It gets set in the +// the procedure. +// +int SwitchStateToString12(int infobyte, char *outstr) +{ + + int cnt = 0; + + if(infobyte & 0x40) + { + cnt += sprintf(outstr+cnt, "%s", "Channel A and B\n"); + + if(infobyte & 0x80) + cnt += sprintf(outstr+cnt, "%s", "Supply\n"); + else + cnt += sprintf(outstr+cnt, "%s", "No Supply\n"); + + if(infobyte & 0x20) + cnt += sprintf(outstr+cnt, "%s", "Activity on PIO-B\n"); + else + cnt += sprintf(outstr+cnt, "%s", "No activity on PIO-B\n"); + + if(infobyte & 0x10) + cnt += sprintf(outstr+cnt, "%s", "Activity on PIO-A\n"); + else + cnt += sprintf(outstr+cnt, "%s", "No activity on PIO-A\n"); + + if(infobyte & 0x08) + cnt += sprintf(outstr+cnt, "%s", "Hi level on PIO B\n"); + else + cnt += sprintf(outstr+cnt, "%s", "Lo level on PIO B\n"); + + if(infobyte & 0x04) + cnt += sprintf(outstr+cnt, "%s", "Hi level on PIO A\n"); + else + cnt += sprintf(outstr+cnt, "%s", "Lo level on PIO A\n"); + + if(infobyte & 0x02) + cnt += sprintf(outstr+cnt, "%s", "Channel B off\n"); + else + cnt += sprintf(outstr+cnt, "%s", "Channel B on\n"); + + if(infobyte & 0x01) + cnt += sprintf(outstr+cnt, "%s", "Channel A off\n"); + else + cnt += sprintf(outstr+cnt, "%s", "Channel A on\n"); + } + else + { + cnt += sprintf(outstr+cnt, "%s", "Channel A\n"); + + if(infobyte & 0x80) + cnt += sprintf(outstr+cnt, "%s", "Supply\n"); + else + cnt += sprintf(outstr+cnt, "%s", "No Supply\n"); + + if(infobyte & 0x10) + cnt += sprintf(outstr+cnt, "%s", "Activity on PIO-A\n"); + else + cnt += sprintf(outstr+cnt, "%s", "No activity on PIO-A\n"); + + if(infobyte & 0x04) + cnt += sprintf(outstr+cnt, "%s", "Hi level on PIO A\n"); + else + cnt += sprintf(outstr+cnt, "%s", "Lo level on PIO A\n"); + + if(infobyte & 0x01) + cnt += sprintf(outstr+cnt, "%s", "Channel A off\n"); + else + cnt += sprintf(outstr+cnt, "%s", "Channel A on\n"); + + } + + return cnt; +} + + diff --git a/device/examples/ds390/ow390/swt12.h b/device/examples/ds390/ow390/swt12.h new file mode 100644 index 0000000..f13ba11 --- /dev/null +++ b/device/examples/ds390/ow390/swt12.h @@ -0,0 +1,13 @@ +typedef struct tagSRAM +{ + uchar Supply; + uchar Chan_B; + uchar Chan_A; + uchar Chan_Sel; + uchar Sour_Sel; + uchar Polarity; +} SwitchProps; + +int ReadSwitch12(int,int); +int SetSwitch12(int,uchar *,SwitchProps*); +int SwitchStateToString12(int,char *); diff --git a/device/examples/ds390/ow390/swtloop.c b/device/examples/ds390/ow390/swtloop.c new file mode 100644 index 0000000..09c6006 --- /dev/null +++ b/device/examples/ds390/ow390/swtloop.c @@ -0,0 +1,218 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//-------------------------------------------------------------------------- +// +// swtloop.C - Goes through the testing of the DS2406(DS2407) switch +// Version 2.00 + + +// Include files +#include +#include +#include "ownet.h" +#include "swt12.h" + +// Constant definition +#define MAXDEVICES 15 + +// tini hack +int argc=2; +char *argv[]={__FILE__, "exow"}; +#define getkeystroke getchar + +//-------------------------------------------------------------------------- +// This is the begining of the program that tests the different Channels +int main() //short argc, char **argv) +{ + char return_msg[128]; //returned message from 1-wire operations + int i,j,k,n; //loop counters + short test=0; //info byte data + short clear=0; //used to clear the button + SwitchProps sw; //used to set Channel A and B + uchar SwitchSN[MAXDEVICES][8]; //the serial numbers for the devices + int num; //for the number of devices present + int ch; //inputed character from user + char out[140]; //used for output of the info byte data + int portnum=0; + + //---------------------------------------- + // Introduction header + printf("\n/---------------------------------------------\n"); + printf(" swtest - V2.00\n" + " The following is a test to excersize the\n" + " different channels on the DS2406.\n"); + printf(" Press any CTRL-C to stop this program.\n\n"); + + // check for required port name + if (argc != 2) + { + printf("1-Wire Net name required on command line!\n" + " (example: \"COM1\" (Win32 DS2480),\"/dev/cua0\" " + "(Linux DS2480),\"1\" (Win32 TMEX)\n"); + exit(1); + } + + // attempt to acquire the 1-Wire Net + if (!owAcquire(portnum, argv[1], return_msg)) + { + printf("%s",return_msg); + exit(1); + } + + // success + printf("%s",return_msg); + + // this is to get the number of the devices and the serial numbers + num = FindDevices(portnum, &SwitchSN[0], SWITCH_FAMILY, MAXDEVICES); + + // setting up the first print out for the frist device + owSerialNum(portnum, SwitchSN[0], FALSE); + + j=1; + n=0; + do + { + // This is for after the different combinations of channels + // have been tested to reset to a different device to be tested. + if( ((test & 0x40) && (j==5)) || + ((!(test & 0x40)) && (j==3)) ) + { + printf("\n\n"); + for(k=0; k < num; k++) + { + printf("%d ", k+1); + for(i=7; i>=0; i--) + { + printf("%02X", SwitchSN[k][i]); + } + printf("\n"); + } + printf("%d To quit or any other key.\n", k+1); + + printf("\n"); + printf("Pick a device\n"); + + ch = getkeystroke(); + n = 0; + n = (10*n + (ch - '0')) - 1; + + if( (n>num-1) || (n<0) ) + { + n = 0; //used to finish off the loop + break; + } + + owSerialNum(portnum, SwitchSN[n], FALSE); + j = 1; + } + printf("\n"); + + test = ReadSwitch12(portnum,clear); + + // This looks at the info byte to determine if it is a + // two or one channel device. + if(test & 0x40) + { + + switch(j) + { + case 1: + sw.Chan_A = 0; + sw.Chan_B = 0; + break; + case 2: + sw.Chan_A = 0; + sw.Chan_B = 1; + break; + case 3: + sw.Chan_A = 1; + sw.Chan_B = 0; + break; + case 4: + sw.Chan_A = 1; + sw.Chan_B = 1; + break; + default: + sw.Chan_A = 1; + sw.Chan_B = 1; + j=0; + break; + } + } + else + { + switch(j) + { + case 1: + sw.Chan_B = 0; + sw.Chan_A = 0; + break; + case 2: + sw.Chan_B = 0; + sw.Chan_A = 1; + break; + default: + sw.Chan_B = 0; + sw.Chan_A = 1; + j = 0; + break; + } + } + + if(!SetSwitch12(portnum, SwitchSN[n], &sw)) + { + msDelay(50); + if(SetSwitch12(portnum, SwitchSN[n], &sw)) + msDelay(50); + else + printf("Switch not set\n"); + } + + test = ReadSwitch12(portnum,clear); + + printf("\n"); + + for(i=7; i>=0; i--) + { + printf("%02X", SwitchSN[n][i]); + } + printf("\n"); + + SwitchStateToString12(test, out); + printf("%s", out); + + j++; + + } + while(1); + + // release the 1-Wire Net + owRelease(portnum,return_msg); + printf("%s",return_msg); + exit(0); + + return 0; +} + diff --git a/device/examples/ds390/ow390/swtoper.c b/device/examples/ds390/ow390/swtoper.c new file mode 100644 index 0000000..d48eab2 --- /dev/null +++ b/device/examples/ds390/ow390/swtoper.c @@ -0,0 +1,219 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//-------------------------------------------------------------------------- +// +// swtoper.C - Menu-driven test of DS2406(DS2407) 1-Wire switch +// version 2.00 + + +// Include files +#include +#include +#include +#include "ownet.h" +#include "swt12.h" + +// Constant definition +#define MAXDEVICES 15 + +// tini hack +int argc=2; +char *argv[]={__FILE__, "exow"}; +#define getkeystroke getchar + +//--------------------------------------------------------------------------- +// The main program that performs the operations on switches +// +int main() //short argc, char **argv) +{ + char return_msg[128]; //returned message from 1-wire operations + short test; //info byte data + short clear=0; //used to clear the button + short done; //to tell when the user is done + SwitchProps sw; //used to set Channel A and B + uchar SwitchSN[MAXDEVICES][8]; //the serial number for the devices + int num; //for the number of devices present + int ch; //inputed character from user + int i,j,n; //loop counters and indexes + char out[140]; //used for output of the info byte data + int count; //the number of characters in the info byte data + int portnum=0; + + //---------------------------------------- + // Introduction header + printf("\n/---------------------------------------------\n"); + printf(" Switch - V2.00\n" + " The following is a test to excersize the \n" + " setting of the state in a DS2406.\n"); + + printf(" Press any CTRL-C to stop this program.\n\n"); + + // check for required port name + if (argc != 2) + { + printf("1-Wire Net name required on command line!\n" + " (example: \"COM1\" (Win32 DS2480),\"/dev/cua0\" " + "(Linux DS2480),\"1\" (Win32 TMEX)\n"); + exit(1); + } + + // attempt to acquire the 1-Wire Net + if (!owAcquire(portnum, argv[1], return_msg)) + { + printf("%s",return_msg); + exit(1); + } + + // success + printf("%s",return_msg); + + // this is to get the number of the devices and the serial numbers + num = FindDevices(portnum, &SwitchSN[0], SWITCH_FAMILY, MAXDEVICES); + + // setting up the first print out for the frist device + owSerialNum(portnum, SwitchSN[0], FALSE); + + printf("\n"); + n=0; + if(owAccess(portnum)) + { + // loop while not done + do + { + test = ReadSwitch12(portnum, clear); + + for(i=7; i>=0; i--) + printf("%02X", SwitchSN[n][i]); + + printf("\n"); + + count = SwitchStateToString12(test, out); + printf("%s", out); + + // print menu + printf("\n\n(1) Display the switch Info\n" + "(2) Clear activity Latches\n" + "(3) Set Flip Flop(s) on switch\n" + "(4) Select different device\n" + "(5) Quit\n" + "Select a Number:"); + ch = getkeystroke(); + printf("\n\n"); + + // do something from the menu selection + clear = FALSE; + switch(ch) + { + case '1': // Display the switch Info + done = FALSE; + break; + case '2': // Clear activity Latches + clear = TRUE; + done = FALSE; + break; + case '3': // Set Flip Flop(s) on switch + printf("Channel %c Flip Flop (1 set, 0 clear):",'A'); + ch = getkeystroke(); + if (ch == '0') + sw.Chan_A = 0; + else + sw.Chan_A = 1; + printf("\n"); + + if(test & 0x40) + { + printf("Channel %c Flip Flop (1 set, 0 clear):",'B'); + ch = getkeystroke(); + if (ch == '0') + sw.Chan_B = 0; + else + sw.Chan_B = 1; + printf("\n"); + } + else + { + printf("\n"); + sw.Chan_B = 0; + } + printf("\n"); + + if(!SetSwitch12(portnum, SwitchSN[n], &sw)) + { + msDelay(50); + if(SetSwitch12(portnum, SwitchSN[n], &sw)) + msDelay(50); + else + printf("Switch not set\n"); + } + done = FALSE; + break; + case '4': // Switch Devices + for(j=0; j < num; j++) + { + printf("%d ", j+1); + for(i=7; i>=0; i--) + { + printf("%02X", SwitchSN[j][i]); + } + printf("\n"); + } + printf("\n"); + + do + { + printf("Pick a device\n"); + ch = getkeystroke(); + n = 0; + n = (10*n + (ch - '0')) - 1; + printf("\n"); + } + while((!isalnum(ch)) || (n>num-1)); + printf("\n"); + + n = 0; + n = (10*n + (ch - '0')) - 1; + + owSerialNum(portnum, SwitchSN[n], FALSE); + + done = FALSE; + break; + + case '5': case 'q': case 'Q': // Done + done = TRUE; + break; + default: + break; + } + } + while (!done); + } + //One Wire Access + owRelease(portnum,return_msg); + printf("%s",return_msg); + exit(0); + + return 0; +} + diff --git a/device/examples/ds390/ow390/temp.c b/device/examples/ds390/ow390/temp.c new file mode 100644 index 0000000..52b4d0f --- /dev/null +++ b/device/examples/ds390/ow390/temp.c @@ -0,0 +1,154 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// temp.c - Application to find and read the 1-Wire Net +// DS1920/DS1820/DS18S20 - temperature measurement. +// +// This application uses the files from the 'Public Domain' +// 1-Wire Net libraries ('general' and 'userial'). +// +// +// Version: 2.00 +// + +#include +#include +#include "ownet.h" +#include "temp10.h" + +// defines +#define MAXDEVICES 20 + +// local functions +static void PrintSerialNum(uchar FamilySN[8]); + +// local serial numbers +static uchar FamilySN[MAXDEVICES][8]; + +// variables +static int family_code; + +// tini hack +int argc=2; +char *argv[]={__FILE__, "exow"}; + +//---------------------------------------------------------------------- +// Main Test for DS1920/DS1820 temperature measurement +// +int main() //short argc, char **argv) +{ + float current_temp; + char return_msg[128]; + int i = 0; + int j = 0; + int NumDevices=0; + int portnum = 0; + + //---------------------------------------- + // Introduction header + printf("\n/---------------------------------------------\n"); + printf(" Temperature application DS1920/DS1820 - Version 1.00 \n" + " The following is a test to excersize a DS1920/DS1820.\n" + " Temperature Find and Read from a: \n" + " DS1920/DS1820 (at least 1)\n\n"); + + printf(" Press any CTRL-C to stop this program.\n\n"); + printf(" Output [Serial Number(s) ........ Temp1(C)] \n\n"); + + // check for required port name + if (argc != 2) + { + printf("1-Wire Net name required on command line!\n" + " (example: \"COM1\" (Win32 DS2480),\"/dev/cua0\" " + "(Linux DS2480),\"1\" (Win32 TMEX)\n"); + exit(1); + } + + + // attempt to acquire the 1-Wire Net + if (!owAcquire(portnum, argv[1], return_msg)) + { + printf("%s",return_msg); + exit(1); + } + + // success + printf("%s",return_msg); + + // Find the device(s) + NumDevices = FindDevices(portnum, &FamilySN[0], 0x10, MAXDEVICES); + if (NumDevices>0) + { + printf("\n"); + printf("Device(s) Found: \n"); + for (i = 0; i < NumDevices; i++) + { + PrintSerialNum(FamilySN[i]); + printf("\n"); + } + printf("\n\n"); + + // (stops on CTRL-C) + do + { + // read the temperature and print serial number and temperature + for (i = 0; i < NumDevices; i++) + { + + if (ReadTemperature(portnum, FamilySN[i],¤t_temp)) + { + PrintSerialNum(FamilySN[i]); + printf(" %5.2f \n", current_temp); + } + else + printf(" Error reading temperature, verify device present:%d\n", + owVerify(portnum, FALSE)); + } + printf("\n"); + } + while (!key_abort()); + } + else + printf("\n\n\nERROR, device DS1920/DS1820 not found!\n"); + + // release the 1-Wire Net + owRelease(portnum, return_msg); + printf("%s",return_msg); + exit(0); + + return 0; +} + +// ------------------------------------------------------------------------------- +// Read and print the serial number. +// +void PrintSerialNum(uchar FamilySN[8]) +{ + int i; + + for (i = 7; i>=0; i--) + printf("%02X", FamilySN[i]); +} diff --git a/device/examples/ds390/ow390/temp10.c b/device/examples/ds390/ow390/temp10.c new file mode 100644 index 0000000..31c46d3 --- /dev/null +++ b/device/examples/ds390/ow390/temp10.c @@ -0,0 +1,129 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +// --------------------------------------------------------------------------- +// +// temp10.C - Module to read the DS1920/DS1820 - temperature measurement. +// +// Version: 2.00 +// +// --------------------------------------------------------------------------- +// +// +#include "ownet.h" +#include "temp10.h" + +//---------------------------------------------------------------------- +// Read the temperature of a DS1920/DS1820 +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// 'SerialNum' - Serial Number of DS1920/DS1820 to read temperature from +// 'Temp ' - pointer to variable where that temperature will be +// returned +// +// Returns: TRUE(1) temperature has been read and verified +// FALSE(0) could not read the temperature, perhaps device is not +// in contact +// +int ReadTemperature(int portnum, uchar *SerialNum, float *Temp) +{ + int rt=FALSE; + uchar send_block[30],lastcrc8; + int send_cnt=0, tsht, i, loop=0; + float tmp,cr,cpc; + + + setcrc8(portnum,0); + + // set the device serial number to the counter device + owSerialNum(portnum,SerialNum,FALSE); + + for (loop = 0; rt==FALSE && loop < 2; loop ++) + { + // access the device + if (owAccess(portnum)) + { + // send the convert temperature command + owTouchByte(portnum,0x44); + + // set the 1-Wire Net to strong pull-up + if (owLevel(portnum,MODE_STRONG5) != MODE_STRONG5) + return FALSE; + + // sleep for 1 second + msDelay(1000); + + // turn off the 1-Wire Net strong pull-up + if (owLevel(portnum,MODE_NORMAL) != MODE_NORMAL) + return FALSE; + + // access the device + if (owAccess(portnum)) + { + // create a block to send that reads the temperature + // read scratchpad command + send_block[send_cnt++] = 0xBE; + // now add the read bytes for data bytes and crc8 + for (i = 0; i < 9; i++) + send_block[send_cnt++] = 0xFF; + + // now send the block + if (owBlock(portnum,FALSE,send_block,send_cnt)) + { + // perform the CRC8 on the last 8 bytes of packet + for (i = send_cnt - 9; i < send_cnt; i++) + lastcrc8 = docrc8(portnum,send_block[i]); + + // verify CRC8 is correct + if (lastcrc8 == 0x00) + { + // calculate the high-res temperature + tsht = send_block[1]/2; + if (send_block[2] & 0x01) + tsht |= -128; + tmp = (float)(tsht); + cr = send_block[7]; + cpc = send_block[8]; + if (((cpc - cr) == 1) && (loop == 0)) + continue; + if (cpc == 0) + return FALSE; + else + tmp = tmp - (float)0.25 + (cpc - cr)/cpc; + + *Temp = tmp; + // success + rt = TRUE; + } + } + } + } + + } + + // return the result flag rt + return rt; + +} diff --git a/device/examples/ds390/ow390/temp10.h b/device/examples/ds390/ow390/temp10.h new file mode 100644 index 0000000..e452108 --- /dev/null +++ b/device/examples/ds390/ow390/temp10.h @@ -0,0 +1 @@ +extern int ReadTemperature(int, uchar *, float *); diff --git a/device/examples/ds390/ow390/thermo21.c b/device/examples/ds390/ow390/thermo21.c new file mode 100644 index 0000000..a1201f2 --- /dev/null +++ b/device/examples/ds390/ow390/thermo21.c @@ -0,0 +1,1346 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// thermo21.c - Thermochron iButton utility functions +// +// Version: 2.00 +// +// History: +// 1.03 -> 2.00 Reorganization of Public Domain Kit +// Convert to global CRC utility functions +// Y2K fix. + +#include +#include "time.h" +#include +#include "ownet.h" +#include "thermo21.h" + +// a hack for sdcc/TINI, just printf to stdout +int fprintf (FILE *fp, char *format, ...) reentrant { + va_list arg; + *fp; // hush the compiler + va_start(arg, format); + vsprintf(NULL, format, arg); + va_end(arg); +} + +FILE * fopen(char * path, char *mode) { + path, mode; //hush the compiler + return (FILE *)0; +} + +int fclose(FILE *fp) { + fp; // hust the compiler + return 0; +} + +static int RunThermoScript(int,ThermoStateType *,ThermoScript script[], FILE *fp); +static int ThermoStep(int,ThermoStateType *,ThermoScript *,int *,int *,int *,char *); +static int ReadPages(int,int,int,int *,uchar *); +static int WriteScratch(int,uchar *,int,int); +static int CopyScratch(int,int,int); +static int WriteMemory(int,uchar *, int, int); + +// step constants +enum { ST_SETUP=0, ST_READ_STATUS, ST_READ_ALARM, ST_READ_HIST, + ST_READ_LOG, ST_CLEAR_MEM, ST_CLEAR_VERIFY, ST_WRITE_TIME, + ST_WRITE_CONTROL, ST_WRITE_RATE, ST_FINISH, ST_GET_SESSION, + ST_FIND_THERMO, ST_REL_SESSION, ST_READ_PAGES, ST_WRITE_MEM, + ST_CLEAR_SETUP }; + +// status contants +enum { STATUS_STEP_COMPLETE, STATUS_COMPLETE, STATUS_INPROGRESS, + STATUS_ERROR_HALT, STATUS_ERROR_TRANSIENT }; + +// download steps +static ThermoScript Download[] = + {{ ST_READ_STATUS, "Setup to read the mission status"}, + { ST_READ_PAGES, "Read the status page"}, + { ST_READ_ALARM, "Setup to read alarm pages"}, + { ST_READ_PAGES, "Read the alarm pages"}, + { ST_READ_HIST, "Setup to read histogram pages"}, + { ST_READ_PAGES, "Read the histogram pages"}, + { ST_READ_LOG, "Setup to read log pages"}, + { ST_READ_PAGES, "Read the log pages"}, + { ST_FINISH, "Finished"}}; + +// read status only steps +static ThermoScript GetStatus[] = + {{ ST_READ_STATUS, "Setup to read the mission status"}, + { ST_READ_PAGES, "Read the status page"}, + { ST_FINISH, "Finished"}}; + +// mission steps (assume already did StatusThermo) +static ThermoScript Mission[] = + {{ ST_CLEAR_SETUP, "Setup clear memory"}, + { ST_WRITE_MEM, "Write clear memory bit"}, + { ST_CLEAR_MEM, "Clear the memory"}, + { ST_READ_STATUS, "Setup to read the mission status"}, + { ST_READ_PAGES, "Read the status page"}, + { ST_CLEAR_VERIFY, "Verify memory is clear"}, + { ST_WRITE_TIME, "Setup to write the real time clock"}, + { ST_WRITE_MEM, "Write the real time clock"}, + { ST_WRITE_CONTROL,"Setup to write the control"}, + { ST_WRITE_MEM, "Write the control"}, + { ST_WRITE_RATE, "Setup to write the sample rate to start mission"}, + { ST_WRITE_MEM, "Write the sample rate"}, + { ST_READ_STATUS, "Read the new mission status"}, + { ST_FINISH, "Finished"}}; + +// global state information +static int current_speed[MAX_PORTNUM]; + +//-------------------------------------------------------------------------- +// The 'DownloadThermo' downloads the specified Thermochron in 'SerialNum' +// and puts the data in the state variable 'ThermoState'. Progress output +// is printed to the specified file 'fp'. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// 'SerialNum' - Device serial number to download +// 'ThermoState' - pointer to a structure type that holds the raw and +// translated Thermochron data. +// 'fp' - file pointer to print status information to +// +// Returns: TRUE (1) : Thermochron download with raw data in ThermoState +// FALSE (0): not downloaded. Abort due to repeated errors +// or user keypress. +// +int DownloadThermo(int portnum, uchar *SerialNum, + ThermoStateType *ThermoState, FILE *fp) +{ + // set the serial num + owSerialNum(portnum, SerialNum, FALSE); + + // run the script and download thermochron + return RunThermoScript(portnum,ThermoState,Download,fp); +} + +//-------------------------------------------------------------------------- +// The 'ReadThermoStatus' reads the Thermochron status in 'SerialNum' +// and puts the data in the state variable 'ThermoState'. Progress output +// is printed to the specified file 'fp'. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// 'SerialNum' - Device serial number to download +// 'ThermoState' - pointer to a structure type that holds the raw and +// translated Thermochron data. +// 'fp' - file pointer to print status information to +// +// Returns: TRUE (1) : Thermochron status read with raw data in ThermoState +// FALSE (0): status not read. Abort due to repeated errors +// or user keypress. +// +int ReadThermoStatus(int portnum, uchar *SerialNum, + ThermoStateType *ThermoState, FILE *fp) +{ + // set the serial num + owSerialNum(portnum, SerialNum, FALSE); + + // run the script and read status of thermochron + return RunThermoScript(portnum,ThermoState,GetStatus,fp); +} + +//-------------------------------------------------------------------------- +// The 'MissionThermo' starts a new Thermochron mission on 'SerialNum' +// from the state information provided in 'ThermoState'. Progress output +// is printed to the specified file 'fp'. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// 'SerialNum' - Device serial number to download +// 'ThermoState' - pointer to a structure type that holds the raw and +// translated Thermochron data. +// 'fp' - file pointer to print status information to +// +// Returns: TRUE (1) : Thermochron missioned +// FALSE (0): not missioned. Abort due to repeated errors +// or user keypress. +// +int MissionThermo(int portnum, uchar *SerialNum, + ThermoStateType *ThermoState, FILE *fp) +{ + // set the serial num + owSerialNum(portnum, SerialNum, FALSE); + + // run the script and mission thermochron + return RunThermoScript(portnum,ThermoState,Mission,fp); +} + +//-------------------------------------------------------------------------- +// Run the specified script. Return TRUE if all steps completed else FALSE. +// Status is printed to file 'fp'. +// +int RunThermoScript(int portnum, ThermoStateType *ThermoState, + ThermoScript script[], FILE *fp) +{ + char msg[256],LastDescription[256],LastMsg[256]; + int StepCount,SubStep,ErrorCount,Status; + int last_clear_step=0; + + // reset the step to the begining + StepCount = 0; + SubStep = 0; + ErrorCount = 0; + Status = STATUS_INPROGRESS; + + // loop to perform all of the steps to download the Thermochron + do + { + // switch on the status of the last step done + switch(Status) + { + // step complete so go to the next + case STATUS_STEP_COMPLETE: + StepCount++; + SubStep = 0; + ErrorCount = 0; + Status = STATUS_INPROGRESS; + LastDescription[0] = 0; + LastMsg[0] = 0; + break; + // in progress so call again + case STATUS_INPROGRESS: + // record the step position of the last memory clear + // this is in case we need to attempt a clear again + if (script[StepCount].Step == ST_CLEAR_SETUP) + last_clear_step = StepCount; + + // print step description if different + if (strcmp(LastDescription, + script[StepCount].StepDescription) != 0) + { + fprintf(fp,"%s --> ",script[StepCount].StepDescription); + sprintf(LastDescription,"%s",script[StepCount].StepDescription); + } + + // perform a step in the job + ThermoStep(portnum,ThermoState,&script[StepCount],&SubStep, + &Status, &ErrorCount, msg); + + // print results if different + if (strcmp(LastMsg,msg) != 0) + { + fprintf(fp,"%s\n",msg); + sprintf(LastMsg,"%s",msg); + } + else + fprintf(fp,"."); + break; + // encountered a transient error + case STATUS_ERROR_TRANSIENT: + // check if transient error is a memory clear + if (script[StepCount].Step == ST_CLEAR_VERIFY) + { + // put back to starting clear over again + StepCount = last_clear_step; + SubStep = 0; + ErrorCount = 0; + Status = STATUS_INPROGRESS; + break; + } + // if 20 tansient errors in a row then abort + if (ErrorCount > 20) + Status = STATUS_ERROR_HALT; + else + Status = STATUS_INPROGRESS; + break; + // all steps complete + case STATUS_COMPLETE: + fprintf(fp,"End script normally\n"); + return TRUE; + break; + // non-recoverable error + case STATUS_ERROR_HALT: + fprintf(fp,"Aborting script due to non-recoverable error\n"); + return FALSE; + break; + } + } + while (!Serial0CharArrived()); + + // key abort + fprintf(fp,"Aborting script due to key press\n"); + return FALSE; +} + +//---------------------------------------------------------------------- +// Use the script to perform a step and return. +// +int ThermoStep(int portnum, ThermoStateType *ThermoState, + ThermoScript *StateScript, int *SubStep, + int *Status, int *ErrorCount, char *msg) +{ + short rslt; + static int read_page_num, read_pages, write_addr, write_len; + static uchar *read_buf, *write_buf; + static uchar tbuf[5]; + + ErrorCount; // hush the compiler + + // do the current step + switch (StateScript->Step) + { + // the operation is complete + case ST_FINISH: + sprintf(msg,"Operation complete"); + *Status = STATUS_COMPLETE; + break; + + // read the mission status page + case ST_READ_STATUS: + read_page_num = STATUS_PAGE; + read_pages = 1; + read_buf = ThermoState->MissStat.status_raw; + sprintf(msg,"Ready to read status page %d", + read_page_num); + *Status = STATUS_STEP_COMPLETE; + break; + + // set up to read the alarm registers + case ST_READ_ALARM: + read_page_num = 17; + read_pages = 3; + read_buf = ThermoState->AlarmData.alarm_raw; + sprintf(msg,"Ready to read alarm pages %d to %d", + read_page_num, read_page_num + read_pages - 1); + *Status = STATUS_STEP_COMPLETE; + break; + + // set up to read the histogram data + case ST_READ_HIST: + read_page_num = 64; + read_pages = 4; + read_buf = ThermoState->HistData.hist_raw; + sprintf(msg,"Ready to read histogram pages %d to %d", + read_page_num, read_page_num + read_pages - 1); + *Status = STATUS_STEP_COMPLETE; + break; + + // set up to read the log data + case ST_READ_LOG: + read_page_num = 128; + read_pages = 64; + read_buf = ThermoState->LogData.log_raw; + sprintf(msg,"Ready to read log pages %d to %d", + read_page_num, read_page_num + read_pages - 1); + *Status = STATUS_STEP_COMPLETE; + break; + + // read the specified pages + case ST_READ_PAGES: + // check for last page + if (*SubStep == 0) + // set the sub-step to the current page being read + *SubStep = read_page_num; + // read the status page + rslt = ReadPages(portnum, read_page_num, read_pages, SubStep, read_buf); + if (rslt == FALSE) + { + sprintf(msg,"Thermochron not on 1-Wire Net"); + *Status = STATUS_INPROGRESS; + } + else + { + sprintf(msg,"Pages read from Thermochron"); + *Status = STATUS_STEP_COMPLETE; + } + break; + + // setup the clear memory + case ST_CLEAR_SETUP: + // create a small buff to write to start the clear memory + tbuf[0] = 0x40; + write_buf = &tbuf[0]; + write_len = 1; + write_addr = 0x20E; + sprintf(msg,"Write to setup clear memory"); + *Status = STATUS_STEP_COMPLETE; + break; + + // clear the memory + case ST_CLEAR_MEM: + // set the clear memory command (not check return because verify) + owAccess(portnum); + owWriteByte(portnum,0x3C); + msDelay(3); + owTouchReset(portnum); + sprintf(msg,"Clear memory command sent"); + *Status = STATUS_STEP_COMPLETE; + break; + + // clear the memory + case ST_CLEAR_VERIFY: + // look at the memory clear bit + if ((ThermoState->MissStat.status_raw[0x14] & 0x40) == 0x40) + { + sprintf(msg,"Memory is clear"); + *Status = STATUS_STEP_COMPLETE; + break; + } + else + { + sprintf(msg,"Memory did NOT clear"); + *Status = STATUS_ERROR_TRANSIENT; + break; + } + break; + + // setup write time, clock alarm, control, trips + case ST_WRITE_TIME: + // create the write buffer + FormatMission(&ThermoState->MissStat); + write_buf = &ThermoState->MissStat.status_raw[0x00]; + write_len = 13; + write_addr = 0x200; + sprintf(msg,"Write time, clock alarm, and trips setup"); + *Status = STATUS_STEP_COMPLETE; + break; + + // write the control, mission delay and clear flags + case ST_WRITE_CONTROL: + write_buf = &ThermoState->MissStat.status_raw[0x0E]; + write_len = 7; + write_addr = 0x20E; + sprintf(msg,"Write control, mission delay, clear flags setup"); + *Status = STATUS_STEP_COMPLETE; + break; + + case ST_WRITE_RATE: + write_buf = &ThermoState->MissStat.status_raw[0x0D]; + write_len = 1; + write_addr = 0x20D; + sprintf(msg,"Write sample rate setup"); + *Status = STATUS_STEP_COMPLETE; + break; + + // write the specified memory location + case ST_WRITE_MEM: + if (WriteMemory(portnum, write_buf, write_len, write_addr)) + { + sprintf(msg,"Memory written to Thermochron"); + *Status = STATUS_STEP_COMPLETE; + } + else + { + sprintf(msg,"Thermochron not on 1-Wire Net"); + *Status = STATUS_INPROGRESS; + } + default: + break; + } + + return *Status; +} + +//---------------------------------------------------------------------- +// Read a specified number of pages in overdrive +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// +int ReadPages(int portnum, int start_pg, int num_pgs, int *last_pg, uchar *finalbuf) +{ + int skip_overaccess = 0, skip_access = 0; + uchar pkt[60]; + int len,i; + uchar SerialNumber[8]; + ushort lastcrc16; + + // read the rom number + owSerialNum(portnum,SerialNumber,TRUE); + + // verify device is in overdrive + if (current_speed[portnum] == MODE_OVERDRIVE) + { + if (owVerify(portnum,FALSE)) + skip_overaccess = 1; + } + + if (!skip_overaccess) + { + if (owOverdriveAccess(portnum)) + current_speed[portnum] = MODE_OVERDRIVE; + else + current_speed[portnum] = MODE_NORMAL; + } + + // loop while there is pages to read + do + { + // create a packet to read a page + len = 0; + setcrc16(portnum,0); + // optional skip access on subsequent pages + if (!skip_access) + { + // match + pkt[len++] = 0x55; + // rom number + for (i = 0; i < 8; i++) + pkt[len++] = SerialNumber[i]; + // read memory with crc command + pkt[len] = 0xA5; + docrc16(portnum,pkt[len++]); + // address + pkt[len] = (uchar)((*last_pg << 5) & 0xFF); + docrc16(portnum,pkt[len++]); + pkt[len] = (uchar)(*last_pg >> 3); + docrc16(portnum,pkt[len++]); + } + + // set 32 reads for data and 2 for crc + for (i = 0; i < 34; i++) + pkt[len++] = 0xFF; + + // send the bytes + if (owBlock(portnum,!skip_access,pkt,len)) + { + // calucate the CRC over the last 34 bytes + for (i = 0; i < 34; i++) + lastcrc16 = docrc16(portnum,pkt[len - 34 + i]); + + // check crc + if (lastcrc16 == 0xB001) + { + // copy the data into the buffer +#ifdef LetsCrashTheCompiler + for (i = 0; i < 32; i++) + finalbuf[i + (*last_pg - start_pg) * 32] = pkt[len - 34 + i]; +#endif + { + ushort k; + for (i = 0; i < 32; i++) { + k=i + (*last_pg - start_pg) * 32; + finalbuf[k] = pkt[len - 34 + i]; + } + } + // change number of pages + *last_pg = *last_pg + 1; + + // now skip access + skip_access = TRUE; + } + else + return FALSE; + } + else + return FALSE; + } + while ((*last_pg - start_pg) < num_pgs); + + return TRUE; +} + +//----------------------------------------------------------------------------} +// Write a memory location. Data must all be on the same page +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// +int WriteMemory(int portnum, uchar *Buf, int ln, int adr) +{ + // write to scratch and then copy + if (WriteScratch(portnum,Buf,ln,adr)) + return CopyScratch(portnum,ln,adr); + + return FALSE; +} + +//----------------------------------------------------------------------------} +// Write the scratch pad +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// +int WriteScratch(int portnum, uchar *Buf, int ln, int adr) +{ + int i; + uchar pbuf[80]; + + // check for alarm indicator + if (owAccess(portnum)) + { + // construct a packet to send + pbuf[0] = 0x0F; // write scratch command + pbuf[1] = (adr & 0xFF); // address 1 + pbuf[2] = ((adr >> 8) & 0xFF); // address 2 + + // the write bytes + for (i = 0; i < ln; i++) + pbuf[3 + i] = (uchar)(Buf[i]); // data + + // perform the block + if (!owBlock(portnum,FALSE,pbuf,ln+3)) + return FALSE; + + // Now read back the scratch + if (owAccess(portnum)) + { + // construct a packet to send + pbuf[0] = 0xAA; // read scratch command + pbuf[1] = 0xFF; // address 1 + pbuf[2] = 0xFF; // address 2 + pbuf[3] = 0xFF; // offset + + // the write bytes + for (i = 0; i < ln; i++) + pbuf[4 + i] = 0xFF; // data + + // perform the block + if (!owBlock(portnum,FALSE,pbuf,ln+4)) + return FALSE; + + // read address 1 + if (pbuf[1] != (adr & 0xFF)) + return FALSE; + // read address 2 + if (pbuf[2] != ((adr >> 8) & 0xFF)) + return FALSE; + // read the offset + if (pbuf[3] != ((adr + ln - 1) & 0x1F)) + return FALSE; + // read and compare the contents + for (i = 0; i < ln; i++) + { + if (pbuf[4 + i] != Buf[i]) + return FALSE; + } + // success + return TRUE; + } + } + + return FALSE; +} + + +//----------------------------------------------------------------------------} +// Copy the scratch pad +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to +// indicate the symbolic port number. +// +int CopyScratch(int portnum, int ln, int adr) +{ + int i; + uchar pbuf[50]; + + // check for alarm indicator + if (owAccess(portnum)) + { + // construct a packet to send + pbuf[0] = 0x55; // copy scratch command + pbuf[1] = (adr & 0xFF); // address 1 + pbuf[2] = ((adr >> 8) & 0xFF); // address 2 + pbuf[3] = (adr + ln - 1) & 0x1F; // offset + for (i = 0; i <= 9; i++) + pbuf[4 + i] = 0xFF; // result of copy + + // perform the block + if (owBlock(portnum,FALSE,pbuf,14)) + { + if ((pbuf[13] == 0x55) || + (pbuf[13] == 0xAA)) + return TRUE; + } + } + + return FALSE; +} + +//---------------------------------------------------------------------- +// Interpret the Status by looking at the 'raw' portion of the +// mission status structure. +// +void InterpretStatus(MissionStatus *mstatus) +{ + timedate td,tdtmp; + int offset; + ulong tmtmp; + time_t tlong; + struct tm *tstruct; + + // mission in progress flag + mstatus->mission_in_progress = (0x20 & mstatus->status_raw[0x14]) >> 5; + + // sample rate + mstatus->sample_rate = mstatus->status_raw[0x0D]; + + // rollover enabled + mstatus->rollover_enable = (0x08 & mstatus->status_raw[0x0E]) >> 3; + + // startdelay + mstatus->start_delay = ((int)mstatus->status_raw[0x13] << 8) | + mstatus->status_raw[0x12]; + + // number of samples in this mission + mstatus->mission_samples = ((long)mstatus->status_raw[0x1C] << 16) | + ((int)mstatus->status_raw[0x1B] << 8) | + mstatus->status_raw[0x1A]; + + // total number of samples + mstatus->samples_total = ((long)mstatus->status_raw[0x1F] << 16) | + ((int)mstatus->status_raw[0x1E] << 8) | + mstatus->status_raw[0x1D]; + + // temperature thresholds + mstatus->high_threshold = mstatus->status_raw[0x0C]; + mstatus->low_threshold = mstatus->status_raw[0x0B]; + + // rollover occurred + if ((mstatus->mission_samples > 2048) && mstatus->rollover_enable) + mstatus->rollover_occurred = 1; + else + mstatus->rollover_occurred = 0; + + // current real-time clock value + offset = 0x00; + td.second = BCDToBin((uchar)(mstatus->status_raw[offset] & 0x7F)); + td.minute = BCDToBin((uchar)(mstatus->status_raw[offset + 1] & 0x7F)); + // check for 12 hour mode + if (mstatus->status_raw[offset + 2] & 0x40) + { + td.hour = BCDToBin((uchar)(mstatus->status_raw[offset + 2] & 0x1F)); + // check for PM + if (mstatus->status_raw[offset + 2] & 0x20) + td.hour += 12; + } + else + td.hour = BCDToBin((uchar)(mstatus->status_raw[offset + 2] & 0x3F)); + td.day = BCDToBin((uchar)(mstatus->status_raw[offset + 4] & 0x3F)); + td.month = BCDToBin((uchar)(mstatus->status_raw[offset + 5] & 0x1F)); + td.year = BCDToBin(mstatus->status_raw[offset + 6]) + 1900; + // check for century bit + if (mstatus->status_raw[offset + 5] & 0x80) + td.year = BCDToBin(mstatus->status_raw[offset + 6]) + 2000; // (2.00) + // convert to seconds since 1970 + mstatus->current_time = DateToSeconds(&td); + + // date/time when mission started + offset = 0x15; + td.second = (uchar)0; + td.minute = BCDToBin((uchar)(mstatus->status_raw[offset] & 0x7F)); + // check for 12 hour mode + if (mstatus->status_raw[offset + 1] & 0x40) + { + td.hour = BCDToBin((uchar)(mstatus->status_raw[offset + 1] & 0x1F)); + // check for PM + if (mstatus->status_raw[offset + 1] & 0x20) + td.hour += 12; + } + else + td.hour = BCDToBin((uchar)(mstatus->status_raw[offset + 1] & 0x3F)); + td.day = BCDToBin((uchar)(mstatus->status_raw[offset + 2] & 0x3F)); + td.month = BCDToBin((uchar)(mstatus->status_raw[offset + 3] & 0x1F)); + td.year = BCDToBin((uchar)(mstatus->status_raw[offset + 4])); // (2.00) + // (2.00) logic to decide on century of mission stamp + // check if century bit set in mission stamp + if (mstatus->status_raw[offset + 3] & 0x80) + td.year += 2000; + // check in mission in progress + else if (mstatus->mission_in_progress) + { + // calculate the mission start year back from real time clock + tmtmp = mstatus->current_time - + (mstatus->sample_rate * mstatus->mission_samples * 60); + SecondsToDate(&tdtmp,tmtmp); + td.year = tdtmp.year; + } + else + { + // mission stopped so get century by year window + if (td.year <= 70) + td.year += 2000; + else + td.year += 1900; + } + // convert to seconds since 1970 + if ((td.month == 0) || (td.day == 0)) + mstatus->mission_start_time = 0; + else + mstatus->mission_start_time = DateToSeconds(&td); + + // download stations time of reading + time(&tlong); + tstruct = localtime(&tlong); + td.day = tstruct->tm_mday; + td.month = tstruct->tm_mon + 1; // (1.01) + td.year = tstruct->tm_year + 1900; + td.hour = tstruct->tm_hour; + td.minute = tstruct->tm_min; + td.second = tstruct->tm_sec; + mstatus->download_time = DateToSeconds(&td); + + // skip alarm modes and status for now +} + +//-------------------------------------------------------------------------- +// Take the Mission Status structure and create new raw data to start +// a new mission. +// +void FormatMission(MissionStatus *mstatus) +{ + int i; + time_t tlong; + struct tm *tstruct; + + // clear the buffer + for (i = 0; i < 32; i++) + mstatus->status_raw[i] = 0; + + // Real Time Clock + time(&tlong); + tlong++; // add 1 second + tstruct = localtime(&tlong); + // convert to BCD + mstatus->status_raw[0x00] = ToBCD((short)tstruct->tm_sec); + mstatus->status_raw[0x01] = ToBCD((short)tstruct->tm_min); + mstatus->status_raw[0x02] = ToBCD((short)tstruct->tm_hour); + mstatus->status_raw[0x03] = ToBCD((short)(tstruct->tm_wday + 1)); + mstatus->status_raw[0x04] = ToBCD((short)tstruct->tm_mday); + mstatus->status_raw[0x05] = ToBCD((short)(tstruct->tm_mon + 1)); + if (tstruct->tm_year >= 100) + mstatus->status_raw[0x05] |= 0x80; + mstatus->status_raw[0x06] = ToBCD((short)(tstruct->tm_year % 100)); + // Real Time clock Alarm (leave 0's) + // Low temp alarm + mstatus->status_raw[0x0B] = mstatus->low_threshold; + // High temp alarm + mstatus->status_raw[0x0C] = mstatus->high_threshold; + // sample rate + mstatus->status_raw[0x0D] = mstatus->sample_rate; + // control + mstatus->status_raw[0x0E] = 0x40; + if (mstatus->rollover_enable) + mstatus->status_raw[0x0E] |= 0x08; + // mission start delay + mstatus->status_raw[0x12] = mstatus->start_delay & 0xFF; + mstatus->status_raw[0x13] = (mstatus->start_delay >> 8) & 0xFF; +} + +//-------------------------------------------------------------------------- +// Convert an integer to a 1 Byte BCD number (99 max) +// +uchar ToBCD(short num) +{ + uchar rtbyte; + + rtbyte = (num - ((num / 10) * 10)) & 0x0F; + rtbyte = rtbyte | ((num / 10) << 4); + + return rtbyte; +} + + +//-------------------------------------------------------------------------- +// Take the Mission Status structure and convert to string format +// +void MissionStatusToString(MissionStatus *mstatus, int ConvertToF, char *str) +{ + int cnt=0,i; + timedate td; + time_t tlong; + struct tm *tstruct; + + // title + cnt += sprintf(&str[cnt],"Mission State\n-------------\n"); + + // serial number + cnt += sprintf(&str[cnt],"Serial Number of DS1921: "); + for (i = 7; i >= 0; i--) + cnt += sprintf(&str[cnt],"%02X",mstatus->serial_num[i]); + + // mission state + if (mstatus->mission_in_progress) + cnt += sprintf(&str[cnt],"\nMission is in progress\n"); + else + cnt += sprintf(&str[cnt],"\nMission is ended\n"); + + // sample rate + cnt += sprintf(&str[cnt],"Sample rate: %d minute(s)\n",mstatus->sample_rate); + + // rollover + cnt += sprintf(&str[cnt],"Roll-Over Enabled: "); + if (mstatus->rollover_enable) + cnt += sprintf(&str[cnt],"yes\n"); + else + cnt += sprintf(&str[cnt],"no\n"); + cnt += sprintf(&str[cnt],"Roll-Over Occurred: "); + if (mstatus->rollover_occurred) + cnt += sprintf(&str[cnt],"yes\n"); + else + cnt += sprintf(&str[cnt],"no\n"); + + // mission start time + if (mstatus->start_delay == 0) + { + SecondsToDate(&td,mstatus->mission_start_time); + if (mstatus->mission_start_time == 0) + cnt += sprintf(&str[cnt],"Mission Start time: not started yet\n"); + else + cnt += sprintf(&str[cnt],"Mission Start time: %02d/%02d/%04d %02d:%02d:%02d\n", + td.month,td.day,td.year,td.hour,td.minute,td.second); + } + else + cnt += sprintf(&str[cnt],"Mission Start time: na\n"); + + // mission start delay + cnt += sprintf(&str[cnt],"Mission Start delay: %d minute(s)\n",mstatus->start_delay); + + // mission samples + cnt += sprintf(&str[cnt],"Mission Samples: %d\n",mstatus->mission_samples); + + // device total samples + cnt += sprintf(&str[cnt],"Device total samples: %d\n",mstatus->samples_total); + + // temperature display mode + cnt += sprintf(&str[cnt],"Temperature displayed in: "); + if (ConvertToF) + cnt += sprintf(&str[cnt],"(Fahrenheit)\n"); + else + cnt += sprintf(&str[cnt],"(Celsius)\n"); + + // thresholds + cnt += sprintf(&str[cnt],"High Threshold: %6.1f\n", + TempToFloat(mstatus->high_threshold,ConvertToF)); + cnt += sprintf(&str[cnt],"Low Threshold: %6.1f\n", + TempToFloat(mstatus->low_threshold,ConvertToF)); + + // time from D1921 + SecondsToDate(&td,mstatus->current_time); + cnt += sprintf(&str[cnt],"Current Real-Time Clock from DS1921: %02d/%02d/%04d %02d:%02d:%02d\n", + td.month,td.day,td.year,td.hour,td.minute,td.second); + + // current PC time + time(&tlong); + tstruct = localtime(&tlong); + cnt += sprintf(&str[cnt],"Current PC Time: %02d/%02d/%04d %02d:%02d:%02d\n", + tstruct->tm_mon + 1,tstruct->tm_mday,tstruct->tm_year + 1900, + tstruct->tm_hour,tstruct->tm_min,tstruct->tm_sec); + + // zero terminate string + str[cnt] = 0; +} + +//---------------------------------------------------------------------- +// Interpret the Histogram by looking at the 'raw' portion of the +// Histogram structure. Store the temperature range values in Celsius. +// +void InterpretHistogram(Histogram *hist) +{ + int i; + + // loop through each bin value + for (i = 0; i < 126; i += 2) // (2.00) + { + // get the bin value + hist->bin_count[i / 2] = hist->hist_raw[i] | ((int)hist->hist_raw[i + 1] << 8); + + // start value for this bin + hist->start_range[i / 2] = TempToFloat((uchar)((i / 2) << 2),FALSE); + + // end value for this bin + hist->end_range[i / 2] = TempToFloat((uchar)(((i / 2) << 2) | 0x03),FALSE); + } +} + +//-------------------------------------------------------------------------- +// Take the Histogram structure and convert to string format +// +void HistogramToString(Histogram *hist, int ConvertToF, char *str) +{ + int cnt=0,i; + + // title + cnt += sprintf(&str[cnt],"Temperature Histogram\n---------------------\n" + "Format: [Temp Range, Count] "); + if (ConvertToF) + cnt += sprintf(&str[cnt],"(Fahrenheit)\n"); + else + cnt += sprintf(&str[cnt],"(Celsius)\n"); + + // loop through bins + for (i = 0; i < 63; i++) // (2.00) + { + cnt += sprintf(&str[cnt],"%6.1f to %6.1f, %d\n", + (ConvertToF) ? CToF(hist->start_range[i]): hist->start_range[i], + (ConvertToF) ? CToF(hist->end_range[i]): hist->end_range[i], + hist->bin_count[i]); + } + + // zero terminate string + str[cnt] = 0; +} + +//---------------------------------------------------------------------- +// Interpret the Temperature Alarm Event data by looking at the 'raw' +// portion of the TempAlarmEvents structure. Mission Status is needed +// to interpret the events. +// +void InterpretAlarms(TempAlarmEvents *alarm, MissionStatus *mstatus) +{ + int i; + ulong event_mission_count; + uchar duration; + + // low events + alarm->num_low = 0; + for (i = 0; i < 48; i += 4) + { + // get the mission start count of this event + event_mission_count = ((long)alarm->alarm_raw[i + 2] << 16) | + ((int)alarm->alarm_raw[i + 1] << 8) | + alarm->alarm_raw[i]; + + // check if done with low events + if (!event_mission_count) + break; + + // get the duration + duration = alarm->alarm_raw[i + 3]; + + // calculate the start time + alarm->low_start_time[alarm->num_low] = + mstatus->mission_start_time + + (event_mission_count - 1) * (mstatus->sample_rate * 60); + + // calculate the end time + alarm->low_end_time[alarm->num_low] = + alarm->low_start_time[alarm->num_low] + + (duration - 1) * (mstatus->sample_rate * 60); + + // increment number of low events + alarm->num_low++; + } + + // high events + alarm->num_high = 0; + for (i = 48; i < 96; i += 4) + { + // get the mission start count of this event + event_mission_count = ((long)alarm->alarm_raw[i + 2] << 16) | + ((int)alarm->alarm_raw[i + 1] << 8) | + alarm->alarm_raw[i]; + + // check if done with low events + if (!event_mission_count) + break; + + // get the duration + duration = alarm->alarm_raw[i + 3]; + + // calculate the start time + alarm->high_start_time[alarm->num_high] = + mstatus->mission_start_time + + (event_mission_count - 1) * (mstatus->sample_rate * 60); + + // calculate the end time + alarm->high_end_time[alarm->num_high] = + alarm->high_start_time[alarm->num_high] + + (duration - 1) * (mstatus->sample_rate * 60); + + // increment number of low events + alarm->num_high++; + } +} + +//-------------------------------------------------------------------------- +// Take the Temperature Alarms Events structure and convert to string +// format +// +void AlarmsToString(TempAlarmEvents *alarm, char *str) +{ + int i, cnt=0; + timedate td; + + // title + cnt += sprintf(&str[cnt],"Temperature Alarms\n------------------\n" + "Format: [(HIGH/LOW), Time/Date Range]\n"); + + // loop through each low alarm + for (i = 0; i < alarm->num_low; i++) + { + cnt += sprintf(&str[cnt],"LOW , "); + // start time + SecondsToDate(&td,alarm->low_start_time[i]); + cnt += sprintf(&str[cnt]," %02d/%02d/%04d %02d:%02d to ", + td.month,td.day,td.year,td.hour,td.minute); + // end time + SecondsToDate(&td,alarm->low_end_time[i]); + cnt += sprintf(&str[cnt]," %02d/%02d/%04d %02d:%02d\n", + td.month,td.day,td.year,td.hour,td.minute); + } + + // loop through each high alarm + for (i = 0; i < alarm->num_high; i++) + { + cnt += sprintf(&str[cnt],"HIGH , "); + // start time + SecondsToDate(&td,alarm->high_start_time[i]); + cnt += sprintf(&str[cnt]," %02d/%02d/%04d %02d:%02d to ", + td.month,td.day,td.year,td.hour,td.minute); + // end time + SecondsToDate(&td,alarm->high_end_time[i]); + cnt += sprintf(&str[cnt]," %02d/%02d/%04d %02d:%02d\n", + td.month,td.day,td.year,td.hour,td.minute); + } + + // zero terminate string + str[cnt] = 0; +} + +//---------------------------------------------------------------------- +// Interpret the Log data by looking at the 'raw' +// portion of the Log structure. Mission Status is needed +// to interpret when the logs occurred. +// +void InterpretLog(Log *log, MissionStatus *mstatus) +{ + ulong loops=0,overlap=0,lastlog=2048,i; + int logcnt=0; + + // check if wrap occurred + if (mstatus->rollover_occurred) + { + // calculate the number loops + loops = (mstatus->mission_samples / 2048) - 1; + // calculate the number of overlap + overlap = mstatus->mission_samples % 2048; + log->num_log = 2048; + } + else + { + log->start_time = mstatus->mission_start_time; + if (mstatus->mission_samples > 2048) // (1.02) + lastlog = 2048; + else + lastlog = mstatus->mission_samples; + log->num_log = (int)lastlog; + } + + // set the interval + log->interval = mstatus->sample_rate * 60; + + // caluclate the start time of the first log value + log->start_time = mstatus->mission_start_time + + loops * 2048 * log->interval + overlap * log->interval; + + // loop to fill in the remainder first + for (i = overlap; i < lastlog; i++) + log->temp[logcnt++] = TempToFloat(log->log_raw[i],FALSE); + + // loop to get the overlap + for (i = 0; i < overlap; i++) + log->temp[logcnt++] = TempToFloat(log->log_raw[i],FALSE); +} + +//-------------------------------------------------------------------------- +// Take the Log structure and convert to string +// format +// +void LogToString(Log *log, int ConvertToF, char *str) +{ + int i,cnt=0; + ulong logtime; + timedate td; + + // title + cnt += sprintf(&str[cnt],"Log Data\n--------\n" + "Format: [Time/Date , Temperature] "); + if (ConvertToF) + cnt += sprintf(&str[cnt],"(Fahrenheit)\n"); + else + cnt += sprintf(&str[cnt],"(Celsius)\n"); + + // loop through the logs + logtime = log->start_time; + for (i = 0; i < log->num_log; i++) + { + // time + SecondsToDate(&td,logtime); + cnt += sprintf(&str[cnt],"%02d/%02d/%04d %02d:%02d ,", + td.month,td.day,td.year,td.hour,td.minute); + // temp + cnt += sprintf(&str[cnt],"%6.1f\n", + (ConvertToF) ? CToF(log->temp[i]): log->temp[i]); + + // increment the time + logtime += log->interval; + } + + // zero terminate string + str[cnt] = 0; +} + +//-------------------------------------------------------------------------- +// Convert the raw debug data to a string +// +void DebugToString(MissionStatus *mstatus, TempAlarmEvents *alarm, + Histogram *hist, Log *log, char *str) +{ + int i,cnt=0; + + // title + cnt += sprintf(&str[cnt],"Debug Dump\n----------\nRegister Page:\n"); + + // reg + for (i = 0; i < 32; i++) + { + cnt += sprintf(&str[cnt],"%02X ",mstatus->status_raw[i]); + if (i && (((i + 1) % 16) == 0)) + cnt += sprintf(&str[cnt],"\n"); + } + + // alarms + cnt += sprintf(&str[cnt],"Alarms:\n"); + for (i = 0; i < 96; i++) + { + cnt += sprintf(&str[cnt],"%02X ",alarm->alarm_raw[i]); + if (i && (((i + 1) % 16) == 0)) + cnt += sprintf(&str[cnt],"\n"); + } + + // histogram + cnt += sprintf(&str[cnt],"Histogram:\n"); + for (i = 0; i < 128; i++) + { + cnt += sprintf(&str[cnt],"%02X ",hist->hist_raw[i]); + if (i && (((i + 1) % 16) == 0)) + cnt += sprintf(&str[cnt],"\n"); + } + + + // log + cnt += sprintf(&str[cnt],"Log:\n"); + for (i = 0; i < ((log->num_log > 2048) ? 2048 : log->num_log); i++) + { + cnt += sprintf(&str[cnt],"%02X ",log->log_raw[i]); + if (i && (((i + 1) % 16) == 0)) + cnt += sprintf(&str[cnt],"\n"); + } + + // zero terminate string + str[cnt] = 0; +} + +//-------------------------------------------------------------------------- +// Take one byte BCD value and return binary value +// +uchar BCDToBin(uchar bcd) +{ + return (((bcd & 0xF0) >> 4) * 10) + (bcd & 0x0F); +} + + +//-------------------------------------------------------------------------- +// Take a 4 byte long string and convert it into a timedata structure. +// +static int dm[] = { 0,0,31,59,90,120,151,181,212,243,273,304,334,365 }; + +void SecondsToDate(timedate *td, ulong x) +{ + short tmp,i,j; + ulong y; + + // check to make sure date is not over 2070 (sanity check) + if (x > 0xBBF81E00L) + x = 0; + + y = x/60; td->second = (ushort)(x-60*y); + x = y/60; td->minute = (ushort)(y-60*x); + y = x/24; td->hour = (ushort)(x-24*y); + x = 4*(y+731); td->year = (ushort)(x/1461); + i = (int)((x-1461*(ulong)(td->year))/4); td->month = 13; + + do + { + td->month -= 1; + tmp = (td->month > 2) && ((td->year & 3)==0) ? 1 : 0; + j = dm[td->month]+tmp; + + } while (i < j); + + td->day = i-j+1; + + // slight adjustment to algorithm + if (td->day == 0) + td->day = 1; + + td->year = (td->year < 32) ? td->year + 68 + 1900: td->year - 32 + 2000; +} + +//-------------------------------------------------------------------------- +// DateToSeconds takes a time/date structure and converts it into the +// number of seconds since 1970 +// +ulong DateToSeconds(timedate *td) +{ + ulong Sv,Bv,Xv; + + // convert the date/time values into the 5 byte format used in the touch + if (td->year >= 2000) + Sv = td->year + 32 - 2000; + else + Sv = td->year - 68 - 1900; + + if ((td->month > 2) && ( (Sv & 3) == 0)) + Bv = 1; + else + Bv = 0; + + Xv = 365 * (Sv-2) + (Sv-1)/4 + dm[td->month] + td->day + Bv - 1; + + Xv = 86400 * Xv + (ulong)(td->second) + 60*((ulong)(td->minute) + 60*(ulong)(td->hour)); + + return Xv; +} + +//-------------------------------------------------------------------------- +// Convert from DS1921 termature format to a float +// +// +float TempToFloat(uchar tmp, int ConvertToF) +{ + float tfloat; + + tfloat = (float)((tmp / 2.0) - 40.0); + + if (ConvertToF) + return (float)(tfloat * 9.0 / 5.0 + 32.0); + else + return tfloat; +} + +//-------------------------------------------------------------------------- +// Convert from Celsius to Fahrenheit +// +float CToF(float CVal) +{ + return (float)(CVal * 9.0 / 5.0 + 32.0); +} diff --git a/device/examples/ds390/ow390/thermo21.h b/device/examples/ds390/ow390/thermo21.h new file mode 100644 index 0000000..fb48aa0 --- /dev/null +++ b/device/examples/ds390/ow390/thermo21.h @@ -0,0 +1,180 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// thermo.h - Include file for Thermochron demo. +// +// Version: 2.00 +// +// History: +// 1.03 -> 2.00 Reorganization of Public Domain Kit + +#ifndef THERMO_TYPES + +#define THERMO_TYPES + +// hacks for sdcc->TINI +#define FILE void +#define stdin ((void *)0) +#define stdout ((void *)0) +#define stderr ((void *)0) +int fprintf (FILE *fp, char *format, ...) reentrant; +FILE *fopen (char *, char *); +int fclose (FILE *); + +// defines +#define STATUS_PAGE 16 +#define THERMO_FAM 0x21 + +#include + +// Typedefs +#ifndef OW_UCHAR + #define OW_UCHAR + typedef unsigned char uchar; + #ifdef WIN32 + typedef unsigned short ushort; + typedef unsigned long ulong; + #endif +#endif + +// structure to hold the mission status +typedef struct +{ + uchar serial_num[8]; // serial number of thermochron + + uchar mission_in_progress; // 1 mission in progres, 0 mission over + + uchar sample_rate; // minutes between samples + + uchar rollover_enable; // 1 if roll-over enabled + uchar rollover_occurred; // 1 if roll-over occurred + + ushort start_delay; // minutes before mission starts + + ulong mission_start_time; // date/time when mission started + ulong current_time; // current real-time clock value + ulong download_time; // download stations time of reading + + ulong mission_samples; // number of samples in this mission + ulong samples_total; // total number of samples taken by device + + uchar high_threshold; // raw temp of high threshold + uchar low_threshold; // raw temp of low threshold + + // skip alarm modes and status for now + + uchar status_raw[32]; + +} MissionStatus; + +// structure to hold the histogram data +typedef struct +{ + ushort bin_count[56]; // counter per bin 0 to 55 + float start_range[56]; // start temp range (C) in bin 0 to 55 + float end_range[56]; // end temp range (C) in bin 0 to 55 + + uchar hist_raw[128]; // raw data for histogram + +} Histogram; + +// structure to hold the histogram data +typedef struct +{ + int num_low; // number of low events + ulong low_start_time[12]; // start time of event 0 to 12 + ulong low_end_time[12]; // end time of event 0 to 12 + int num_high; // number of high events + ulong high_start_time[12]; // start time of event 0 to 12 + ulong high_end_time[12]; // end time of event 0 to 12 + + uchar alarm_raw[96]; // raw data for alarm events + +} TempAlarmEvents; + +// structure to hold the log data +typedef struct +{ + int num_log; // number of logs + float temp[2048]; // temperature log in (C) + ulong start_time; // start time of log + int interval; // interval in seconds between logs + + uchar log_raw[2048]; // raw data for log + +} Log; + +// structure to hold all of the thermochron data state +typedef struct +{ + MissionStatus MissStat; // mission state + Histogram HistData; // histogram data + TempAlarmEvents AlarmData; // temperature alarm event data + Log LogData; // log data + +} ThermoStateType; + +// type structure to holde time/date +typedef struct +{ + ushort second; + ushort minute; + ushort hour; + ushort day; + ushort month; + ushort year; +} timedate; + +// structure to hold each state in the StateMachine +typedef struct +{ + int Step; + char StepDescription[50]; + +} ThermoScript; + +// Global Function Prototypes + int DownloadThermo(int,uchar *,ThermoStateType *, FILE *); +int ReadThermoStatus(int,uchar *,ThermoStateType *, FILE *); +int MissionThermo(int,uchar *,ThermoStateType *, FILE *); +void SecondsToDate(timedate *, ulong); +ulong DateToSeconds(timedate *); +uchar BCDToBin(uchar); + void InterpretStatus(MissionStatus *); + void MissionStatusToString(MissionStatus *, int, char *); +void FormatMission(MissionStatus *); + void InterpretHistogram(Histogram *); + void HistogramToString(Histogram *, int, char *); + void InterpretAlarms(TempAlarmEvents *, MissionStatus *); + void AlarmsToString(TempAlarmEvents *, char *); + void InterpretLog(Log *, MissionStatus *); + void LogToString(Log *, int, char *); + void DebugToString(MissionStatus *, TempAlarmEvents *, Histogram *, Log *, char *); +float TempToFloat(uchar, int); +float CToF(float); +uchar ToBCD(short); + +#endif diff --git a/device/examples/ds390/ow390/thermodl.c b/device/examples/ds390/ow390/thermodl.c new file mode 100644 index 0000000..8654450 --- /dev/null +++ b/device/examples/ds390/ow390/thermodl.c @@ -0,0 +1,226 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// thermodl.c - This utility uses to download the results of the +// current mission of a DS1921 Thermochron iButton. +// +// Version: 2.00 +// +// History: +// 1.03 -> 2.00 Reorganization of Public Domain Kit +// Y2K update, display all histogram bins, debug +// dump. Supports multiple thermochons. +// + +#include +#include +#include "ownet.h" +#include "thermo21.h" + +// defines +#define MAXDEVICES 20 + +// local function prototypes +void PrintResults(ThermoStateType *,FILE *,int); + +// tini hack +#define ExitProg(msg,exit_code) {printf("%s\n",msg); exit(exit_code);} +int argc=2; +char *argv[]={__FILE__, "exow"}; + +//---------------------------------------------------------------------- +// This is the Main routine for thermodl. +// +int main() //short argc, char **argv) +{ + int Fahrenheit=FALSE,filenum,num,i,j; + char return_msg[128]; + FILE *fp; + ThermoStateType ThermoState; + uchar ThermoSN[MAXDEVICES][8]; //the serial numbers for the devices + int portnum=0; + + // check arguments to see if request instruction with '?' or too many + if ((argc < 2) || (argc > 4) || ((argc > 1) && (argv[1][0] == '?' || argv[1][1] == '?'))) + ExitProg("\nusage: thermodl 1wire_net_name \n" + " - Thermochron download on the 1-Wire Net port\n" + " - 1wire_net_port required port name\n" + " example: \"COM1\" (Win32 DS2480),\"/dev/cua0\" \n" + " (Linux DS2480),\"1\" (Win32 TMEX)\n" + " - optional output filename\n" + " - optional Fahrenheit mode (default Celsius)\n" + " - version 2.00\n",1); + + // attempt to acquire the 1-Wire Net + if (!owAcquire(portnum,argv[1],return_msg)) + ExitProg(return_msg,1); + + // success + printf("%s",return_msg); + + //---------------------------------------- + // Introduction + printf("\n/----------------------------------------------\n"); + printf(" Find and download DS1921 Thermochron iButton(s)\n" + " Version 2.00\n\n"); + + // check arguments for temperature conversion and filename + Fahrenheit = FALSE; + filenum = 0; + if (argc >= 3) + { + if (argv[2][0] != '/') + filenum = 2; + else if ((argv[2][1] == 'F') || (argv[2][1] == 'f')) + Fahrenheit = TRUE; + + if (argc == 4) + { + if (argv[3][0] != '/') + filenum = 3; + else if ((argv[3][1] == 'F') || (argv[3][1] == 'f')) + Fahrenheit = TRUE; + } + } + + // open the output file + fp = NULL; + if (filenum > 0) + { + fp = fopen(argv[filenum],"w+"); + if(fp == NULL) + { + printf("ERROR, Could not open output file!\n"); + exit(1); + } + else + printf("File '%s' opened to write mission results.\n", + argv[filenum]); + } + + // get list of Thermochron's + num = FindDevices(portnum, &ThermoSN[0],THERMO_FAM, MAXDEVICES); + + // check if not present or more then 1 present + if (num == 0) + ExitProg("Thermochron not present on 1-Wire\n",1); + + // loop to download each Thermochron + for (i = 0; i < num; i++) + { + // set the serial number portion in the thermo state + printf("\nDownloading: "); + for (j = 7; j >= 0; j--) + { + ThermoState.MissStat.serial_num[j] = ThermoSN[i][j]; + printf("%02X",ThermoSN[i][j]); + } + printf("\n"); + // download the Thermochron found + if (DownloadThermo(portnum,&ThermoSN[i][0],&ThermoState,stdout)) + { + // interpret the results of the download + InterpretStatus(&ThermoState.MissStat); + InterpretAlarms(&ThermoState.AlarmData, &ThermoState.MissStat); + InterpretHistogram(&ThermoState.HistData); + InterpretLog(&ThermoState.LogData, &ThermoState.MissStat); + + // print the output + PrintResults(&ThermoState,fp,Fahrenheit); + } + else + { + fprintf(fp,"\nError downloading device: "); + for (j = 0; j < 8; j++) + fprintf(fp,"%02X",ThermoSN[i][j]); + fprintf(fp,"\n"); + } + } + + // close opened file + if (fp != NULL) + { + printf("File '%s' closed.\n", + argv[filenum]); + fclose(fp); + } + + // release the 1-Wire Net + //owRelease(portnum,return_msg); + printf("\n%s",return_msg); + ExitProg("End program normally\n",0); + return 0; +} + +//-------------------------------------------------------------------------- +// Prints the mission data optionaly to a file or standard out +// +void PrintResults(ThermoStateType *ThermoState, FILE *fp, int ConvertToF) +{ + // aslink only can handle 64k, so we use the second 64k bank + char *str=(xdata char*)0x190000; + + // check if need to use standard out + if (fp == NULL) + fp = stdout; + +#if 0 + // get big block to use as a buffer + str = malloc(80000); + if (str == NULL) + { + printf("Insufficient memory available to print!\n"); + return; + } +#endif + + // mission status + MissionStatusToString(&ThermoState->MissStat, ConvertToF, &str[0]); + fprintf(fp,"\n%s\n",str); + + // alarm events + AlarmsToString(&ThermoState->AlarmData, &str[0]); + fprintf(fp,"%s\n",str); + + // histogram + HistogramToString(&ThermoState->HistData, ConvertToF, &str[0]); + fprintf(fp,"%s\n",str); + + // log data + LogToString(&ThermoState->LogData, ConvertToF, &str[0]); + fprintf(fp,"%s\n",str); + + // debug raw data + DebugToString(&ThermoState->MissStat, &ThermoState->AlarmData, + &ThermoState->HistData, &ThermoState->LogData, &str[0]); + fprintf(fp,"%s\n",str); + +#if 0 + // free the memory block used + free(str); +#endif +} + diff --git a/device/examples/ds390/ow390/tinilnk.c b/device/examples/ds390/ow390/tinilnk.c new file mode 100644 index 0000000..d1b1669 --- /dev/null +++ b/device/examples/ds390/ow390/tinilnk.c @@ -0,0 +1,293 @@ +#define DEBUG_OW_COM 0 +#if DEBUG_OW_COM +#include +#endif +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// TODO.C - COM functions required by MLANLL.C, MLANTRNU, MLANNETU.C and +// MLanFile.C for MLANU to communicate with the DS2480 based +// Universal Serial Adapter 'U'. Fill in the platform specific code. +// +// Version: 1.02 +// +// History: 1.00 -> 1.01 Added function msDelay. +// +// 1.01 -> 1.02 Changed to generic OpenCOM/CloseCOM for easier +// use with other platforms. +// + +//-------------------------------------------------------------------------- +// Copyright (C) 1998 Andrea Chambers and University of Newcastle upon Tyne, +// All Rights Reserved. +//-------------------------------------------------------------------------- +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL THE UNIVERSITY OF NEWCASTLE UPON TYNE OR ANDREA CHAMBERS +// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +// OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH +// THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +//--------------------------------------------------------------------------- +// +// LinuxLNK.C - COM functions required by MLANLLU.C, MLANTRNU.C, MLANNETU.C +// and MLanFile.C for MLANU to communicate with the DS2480 based +// Universal Serial Adapter 'U'. Platform specific code. +// +// Version: 1.03 +// History: 1.00 -> 1.03 modifications by David Smiczek +// Changed to use generic OpenCOM/CloseCOM +// Pass port name to OpenCOM instead of hard coded +// Changed msDelay to handle long delays +// Reformatted to look like 'TODO.C' +// Added #include "ds2480.h" to use constants. +// Added function SetBaudCOM() +// Added function msGettick() +// Removed delay from WriteCOM(), used tcdrain() +// Added wait for byte available with timeout using +// select() in ReadCOM() +// +// 1.03 -> 2.00 Support for multiple ports. Include "ownet.h". Use +// 'uchar'. Reorder functions. Provide correct +// return values to OpenCOM. Replace 'makeraw' call. +// Should now be POSIX. +// + +#include + +#include "ownet.h" +#include "ds2480.h" + +//--------------------------------------------------------------------------- +// Attempt to open a com port. +// Set the starting baud rate to 9600. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number provided will +// be used to indicate the port number desired when calling +// all other functions in this library. +// +// 'port_zstr' - zero terminate port name. For this platform +// ignored for now +// +// +// Returns: TRUE(1) - success, COM port opened +// FALSE(0) - failure, could not open specified port +// +int OpenCOM(int portnum, char *port_zstr) +{ + unsigned long baud=9600; + + //printf ("OpenCOM(%d,\"%s\")\n", portnum, port_zstr); + + // hush the compiler + portnum; + port_zstr; + + Serial1Init(baud,1); + + return TRUE; // changed (2.00), used to return fd; +} + +//--------------------------------------------------------------------------- +// Closes the connection to the port. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number was provided to +// OpenCOM to indicate the port number. +// +void CloseCOM(int portnum) +{ + //printf ("CloseCOM(%d)\n", portnum); + + // hush the compiler + portnum; +} + + +//-------------------------------------------------------------------------- +// Write an array of bytes to the COM port, verify that it was +// sent out. Assume that baud rate has been set. +// +// 'portnum' - number 0 to MAX_PORTNUM-1. This number provided will +// be used to indicate the port number desired when calling +// all other functions in this library. +// Returns 1 for success and 0 for failure +// +int WriteCOM(int portnum, int outlen, uchar *outbuf) +{ + int i; + +#if DEBUG_OW_COM + printf ("WriteCOM(%d, %d,...): ", portnum, outlen, outbuf); +#endif + + // hush the compiler + portnum; + + for (i=0; i 1.03 Removed caps in #includes for Linux capatibility +// Removed "ds2480.h", and +// includes because not needed +// Added "ownet.h" include to define TRUE/FALSE +// Prompt to search again +// Changed to use Acquire/Release 1-Wire Net functions +// 1.03 -> 2.00 Changed 'MLan' to 'ow'. Added support for +// multiple ports. Don't stop loop at end of each +// search round. + +#include +#include +#include "ownet.h" + +// local funcitons +static void PrintSerialNum(int); + +// tini hack +int argc=2; +char *argv[]={__FILE__, "exow"}; + +//---------------------------------------------------------------------- +// Main for tstfind +// +int main() //short argc, char **argv) +{ + int rslt,cnt; + char return_msg[128]; + int portnum=0; + + // check for required port name + if (argc != 2) + { + printf("1-Wire Net name required on command line!\n" + " (example: \"COM1\" (Win32 DS2480),\"/dev/cua0\" " + "(Linux DS2480),\"1\" (Win32 TMEX)\n"); + exit(1); + } + + // attempt to acquire the 1-Wire Net + if (!owAcquire(portnum,argv[1],return_msg)) + { + printf("%s",return_msg); + exit(1); + } + + // success + printf("%s",return_msg); + + //---------------------------------------- + // Introduction + printf("\n/---------------------------------------------\n"); + printf(" Loop to find all iButton on 1-Wire Net.\n\n"); + + do + { + printf("-------------------- Start of search\n"); + cnt = 0; + + // find the first device (all devices not just alarming) + rslt = owFirst(portnum, TRUE, FALSE); + while (rslt) + { + // print the device number + cnt++; + printf("(%d) ",cnt); + + // print the Serial Number of the device just found + PrintSerialNum(portnum); + + // find the next device + rslt = owNext(portnum, TRUE, FALSE); + } + printf("-------------------- End of search\n\n"); + + } + while (!key_abort()); + + // release the 1-Wire Net + owRelease(portnum,return_msg); + printf("%s",return_msg); + exit(0); + + return 0; +} + +//---------------------------------------------------------------------- +// Read and print the Serial Number. +// +void PrintSerialNum(int portnum) +{ + uchar serial_num[8]; + int i; + + owSerialNum(portnum,serial_num,TRUE); + for (i = 7; i >= 0; i--) + printf("%02X",serial_num[i]); + printf("\n"); +} diff --git a/device/examples/ds390/ow390/tstow.c b/device/examples/ds390/ow390/tstow.c new file mode 100644 index 0000000..2a2d585 --- /dev/null +++ b/device/examples/ds390/ow390/tstow.c @@ -0,0 +1,322 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// tstow.C - Test application to test 1-Wire Net functions. No EPROM writes. +// +// Version: 2.00 +// +// History: 1.00 -> 1.01 Change to use msDelay instead of Sleep. +// +// 1.01 -> 1.02 Changed to generic OpenCOM/CloseCOM for easier +// use with other platforms. +// 1.02 -> 1.03 Removed caps in #includes for Linux capatibility +// Changed to use Acquire/Release 1-Wire Net functions +// 1.03 -> 2.00 Reorganization of Public Domain Kit +// + +#include +#include +#include "ownet.h" + +// local funcitons +void PrintSerialNum(int portnum); + +// tini hack +int argc=2; +char *argv[]={__FILE__, "exow"}; + +//---------------------------------------------------------------------- +// Main Test +// +int main() //short argc, char **argv) +{ + int PortNum=1,rslt,i,j,testcnt=0,length; + uchar TempSerialNum[8]; + uchar tran_buffer[2000], filename[10]; + char return_msg[128]; + int portnum=0; + + // check for required port name + if (argc != 2) + { + printf("1-Wire Net name required on command line!\n" + " (example: \"COM1\" (Win32 DS2480),\"/dev/cua0\" " + "(Linux DS2480),\"1\" (Win32 TMEX)\n"); + exit(1); + } + + // attempt to acquire the 1-Wire Net + if (!owAcquire(portnum, argv[1], return_msg)) + { + printf("%s",return_msg); + exit(1); + } + + // success + printf("%s",return_msg); + + //---------------------------------------- + // Introduction + printf("\n/---------------------------------------------\n"); + printf(" The following is a test excersize of the\n" + " 1-Wire Net public domain library Version 2.00.\n\n" + " This test was run using with 2 DS1920's (DS1820),\n" + " 1 DS1971 (DS2430), and 1 DS1996.\n\n"); + + //---------------------------------------- + // First the devices on the 1-Wire Net + printf("\n/---------------------------------------------\n"); + printf("TEST%d: Searching for devices on 1-Wire Net\n",testcnt++); + + // find the first device (all devices not just alarming) + rslt = owFirst(portnum,TRUE, FALSE); + while (rslt) + { + // print the Serial Number of the device just found + PrintSerialNum(portnum); + + // find the next device + rslt = owNext(portnum,TRUE, FALSE); + } + + //---------------------------------------- + // now search for the part with a 0x0C family code (DS1996) + printf("\n/---------------------------------------------\n"); + printf("TEST%d: Set to find first device with 0x0C family code\n",testcnt++); + + owFamilySearchSetup(portnum,0x0C); + + // find the first 0x0c device + TempSerialNum[0]=0; + while (TempSerialNum[0]!=0x0c && owNext(portnum,TRUE,FALSE)) { + owSerialNum(portnum,TempSerialNum,TRUE); + } + printf("search result %d\n",TempSerialNum[0]==0x0c); + + // print the Serial Number of the device just found + PrintSerialNum(portnum); + + //---------------------------------------- + // Access a device and read ram + printf("\n/---------------------------------------------\n"); + printf("TEST%d: Access the current device and read ram\n",testcnt++); + + printf("owAccess %d\n",owAccess(portnum)); + + printf("Read Ram 0xF0: %02X\n",owTouchByte(portnum,0xF0)); + printf("Address0 0x00: %02X\n",owTouchByte(portnum,0x00)); + printf("Address1 0x00: %02X\n",owTouchByte(portnum,0x00)); + + printf("Page 0: "); + for (i = 0; i < 32; i++) + printf("%02X ",owTouchByte(portnum,0xFF)); + printf("\n"); + + //---------------------------------------- + // Read ram with owBlock + printf("\n/---------------------------------------------\n"); + printf("TEST%d: Read ram with owBlock\n",testcnt++); + for (i = 0; i < 32; i++) + tran_buffer[i] = 0xFF; + + printf("owBlock %d\n",owBlock(portnum,FALSE,tran_buffer,32)); + printf("Page 1: "); + for (i = 0; i < 32; i++) + printf("%02X ",tran_buffer[i]); + printf("\n"); + + //---------------------------------------- + // Write a packet in each page of DS1996 + printf("\n/---------------------------------------------\n"); + printf("TEST%d: Place the DS1996 into overdrive\n",testcnt++); + printf("owOverdriveAccess %d\n",owOverdriveAccess(portnum)); + + //---------------------------------------- + // Write 4 packets with owWritePacketStd + printf("\n/---------------------------------------------\n"); + printf("TEST%d: Write 4 packets with owWritePacketStd\n",testcnt++); + + for (j = 0; j < 4; j++) + { + for (i = 0; i < 29; i++) + tran_buffer[i] = (uchar)i + j; + + printf("Write page %d: %d\n",j,owWritePacketStd(portnum,j,tran_buffer,29,FALSE,FALSE)); + + for (i = 0; i < 29; i++) + tran_buffer[i] = 0; + + length = owReadPacketStd(portnum,TRUE,j,tran_buffer); + + printf("Read page %d: %d\n",j,length); + + for (i = 0; i < length; i++) + printf("%02X",tran_buffer[i]); + printf("\n"); + } + + //---------------------------------------- + // Write a file to DS1996 + printf("\n/---------------------------------------------\n"); + printf("TEST%d: Format and write a file (in overdrive)\n",testcnt++); + sprintf(filename,"DEMO"); + // set the data to write + for (i = 0; i < 2000; i++) + tran_buffer[i] = i % 255; + printf("Format and write file DEMO.000 %d\n", + owFormatWriteFile(portnum,filename,2000,tran_buffer)); + + // clear the buffer + for (i = 0; i < 2000; i++) + tran_buffer[i] = 0x55; + printf("Read file DEMO.000 %d\n",owReadFile(portnum,filename,tran_buffer)); + // print the data result + for (i = 0; i < 2000; i++) + { + if ((i % 0x20) == 0) + printf("\n%03X ",i); + printf("%02X",tran_buffer[i]); + } + printf("\n"); + + //---------------------------------------- + // Turn off overdrive + printf("\n/---------------------------------------------\n"); + printf("TEST%d: Turn off overdrive\n",testcnt++); + printf("Set 1-Wire Net speed to normal %d\n",owSpeed(portnum,MODE_NORMAL)); + + //---------------------------------------- + // Verify a device + printf("\n/---------------------------------------------\n"); + printf("TEST%d: Verify the current device\n",testcnt++); + + printf("owVerify (normal) %d\n",owVerify(portnum,FALSE)); + printf("owVerify (alarm) %d\n",owVerify(portnum,TRUE)); + + //---------------------------------------- + // Skip the first family code found + printf("\n/---------------------------------------------\n"); + printf("TEST%d: Skip the first family code found\n",testcnt++); + + // find the next device + printf("search result of owFirst %d\n",owFirst(portnum,TRUE, FALSE)); + + // print the Serial Number of the device just found + PrintSerialNum(portnum); + + // skip the first family type found + owSkipFamily(portnum); + printf("owSkipFamily called\n"); + + // find the next device + printf("search result of owNext %d\n",owNext(portnum,TRUE, FALSE)); + + // print the Serial Number of the device just found + PrintSerialNum(portnum); + + //---------------------------------------- + // Find first family code (DS1920) and read temperature + printf("\n/---------------------------------------------\n"); + printf("TEST%d: Find first family code (DS1920) and read temperature\n",testcnt++); + + // find the next device + printf("search result of owFirst %d\n",owFirst(portnum,TRUE, FALSE)); + + // print the Serial Number of the device just found + PrintSerialNum(portnum); + + // send the convert temperature command + printf("Convert temperature command %02X\n",owTouchByte(portnum,0x44)); + + // set the 1-Wire Net to strong pull-up + printf("Set power delivery %d\n",owLevel(portnum,MODE_STRONG5)); + + // sleep for 1 second + msDelay(1000); + + // turn off the 1-Wire Net strong pull-up + printf("Disable power delivery %d\n",owLevel(portnum,MODE_NORMAL)); + + // read the DS1920 temperature value + printf("Access the DS1920 %d\n",owAccess(portnum)); + tran_buffer[0] = 0xBE; + tran_buffer[1] = 0xFF; + tran_buffer[2] = 0xFF; + printf("Block to read temperature %d\n",owBlock(portnum,FALSE,tran_buffer,3)); + // interpret the result + printf("result: DS1920 temperature read: %d C\n", (tran_buffer[1] | + ((int)tran_buffer[2] << 8)) / 2); + + //---------------------------------------- + // Verify the current device, could also be alarming + printf("\n/---------------------------------------------\n"); + printf("TEST%d: Verify the current device, could also be alarming\n",testcnt++); + + printf("owVerify (normal) %d\n",owVerify(portnum,FALSE)); + printf("owVerify (alarm) %d\n",owVerify(portnum,TRUE)); + + //---------------------------------------- + // Test setting the Serial Number with owSerialNum + printf("\n/---------------------------------------------\n"); + printf("TEST%d: Test setting the Serial Number with owSerialNum\n",testcnt++); + + // set the Serial Num to 0 to 7 + for (i = 0; i < 8; i++) + TempSerialNum[i] = (uchar)i; + owSerialNum(portnum,TempSerialNum,FALSE); + + // read back the Serial Number + PrintSerialNum(portnum); + + //---------------------------------------- + // Verify the current device (should fail, no such device) + printf("\n/---------------------------------------------\n"); + printf("TEST%d: Verify the current device (should fail, no such device)\n",testcnt++); + + printf("owVerify (normal) %d\n",owVerify(portnum,FALSE)); + printf("owVerify (alarm) %d\n",owVerify(portnum,TRUE)); + + // release the 1-Wire Net + owRelease(portnum,return_msg); + printf("%s",return_msg); + exit(0); + + return 0; +} + +//---------------------------------------------------------------------- +// Read and print the Serial Number. +// +void PrintSerialNum(int portnum) +{ + uchar TempSerialNumber[8]; + int i; + + owSerialNum(portnum,TempSerialNumber,TRUE); + for (i = 7; i >= 0; i--) + printf("%02X",TempSerialNumber[i]); + printf("\n"); +} diff --git a/device/examples/ds390/readmac/Makefile b/device/examples/ds390/readmac/Makefile new file mode 100644 index 0000000..b1c8850 --- /dev/null +++ b/device/examples/ds390/readmac/Makefile @@ -0,0 +1,20 @@ +CC = sdcc + +MFLAGS = -mds390 +LFLAGS = --xram-loc 0x180080 --code-loc 0x10000 -Wl-r + +OBJECTS = readmac.rel ow.rel crcutil.rel + +all: readmac.hex + +clean: + rm -f *~ \#* *.asm *.cdb *.rel *.hex *.ihx *.lst *.map *.rst *.sym *.lnk core *.dump* + +readmac.hex: readmac.ihx + packihx readmac.ihx >readmac.hex + +readmac.ihx: $(OBJECTS) + $(CC) $(MFLAGS) $(LFLAGS) $(OBJECTS) + +%.rel: %.c + $(CC) -c $(MFLAGS) $< diff --git a/device/examples/ds390/readmac/crcutil.c b/device/examples/ds390/readmac/crcutil.c new file mode 100644 index 0000000..fcfd432 --- /dev/null +++ b/device/examples/ds390/readmac/crcutil.c @@ -0,0 +1,88 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//-------------------------------------------------------------------------- +// +// crcutil.c - Keeps track of the CRC for 16 and 8 bit operations +// version 2.00 +// +// Badly abused by Kevin Vigor, 11/20/2000 + +// Include files +#include "crcutil.h" + +// Local global variables +#ifdef WANT_CRC_16 +static short oddparity[16] = { 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0 }; +#endif +static unsigned char dscrc_table[] = { + 0, 94,188,226, 97, 63,221,131,194,156,126, 32,163,253, 31, 65, + 157,195, 33,127,252,162, 64, 30, 95, 1,227,189, 62, 96,130,220, + 35,125,159,193, 66, 28,254,160,225,191, 93, 3,128,222, 60, 98, + 190,224, 2, 92,223,129, 99, 61,124, 34,192,158, 29, 67,161,255, + 70, 24,250,164, 39,121,155,197,132,218, 56,102,229,187, 89, 7, + 219,133,103, 57,186,228, 6, 88, 25, 71,165,251,120, 38,196,154, + 101, 59,217,135, 4, 90,184,230,167,249, 27, 69,198,152,122, 36, + 248,166, 68, 26,153,199, 37,123, 58,100,134,216, 91, 5,231,185, + 140,210, 48,110,237,179, 81, 15, 78, 16,242,172, 47,113,147,205, + 17, 79,173,243,112, 46,204,146,211,141,111, 49,178,236, 14, 80, + 175,241, 19, 77,206,144,114, 44,109, 51,209,143, 12, 82,176,238, + 50,108,142,208, 83, 13,239,177,240,174, 76, 18,145,207, 45,115, + 202,148,118, 40,171,245, 23, 73, 8, 86,180,234,105, 55,213,139, + 87, 9,235,181, 54,104,138,212,149,203, 41,119,244,170, 72, 22, + 233,183, 85, 11,136,214, 52,106, 43,117,151,201, 74, 20,246,168, + 116, 42,200,150, 21, 75,169,247,182,232, 10, 84,215,137,107, 53}; + +#ifdef WANT_CRC_16 +//-------------------------------------------------------------------------- +// Calculate a new CRC16 from the input data shorteger. Return the current +// CRC16. +// +// Returns: the current CRC16 +// + +unsigned int docrc16(unsigned int oldCrc, + unsigned int byte) +{ + byte = (byte ^ (oldCrc & 0xff)) & 0xff; + oldCrc >>= 8; + + if (oddparity[byte & 0xf] ^ oddparity[byte >> 4]) + { + oldCrc ^= 0xc001; + } + + byte <<= 6; + oldCrc ^= byte; + byte <<= 1; + oldCrc ^= byte; + + return oldCrc; +} +#endif + +unsigned char docrc8(unsigned char oldCrc, unsigned char x) +{ + return dscrc_table[oldCrc ^ x]; +} \ No newline at end of file diff --git a/device/examples/ds390/readmac/crcutil.h b/device/examples/ds390/readmac/crcutil.h new file mode 100644 index 0000000..2e12582 --- /dev/null +++ b/device/examples/ds390/readmac/crcutil.h @@ -0,0 +1,9 @@ +#ifndef CRCUTIL_H_ +#define CRCUTIL_H_ + +#ifdef WANT_CRC_16 +unsigned int docrc16(unsigned int oldCrc, unsigned int byte); +#endif + +unsigned char docrc8(unsigned char oldCrc, unsigned char x); +#endif diff --git a/device/examples/ds390/readmac/ow.c b/device/examples/ds390/readmac/ow.c new file mode 100644 index 0000000..6391740 --- /dev/null +++ b/device/examples/ds390/readmac/ow.c @@ -0,0 +1,442 @@ +//--------------------------------------------------------------------------- +// Copyright (C) 2000 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +//--------------------------------------------------------------------------- +// +// ow.c +// +// Minimal access routines for TINI internal one-wire bus patched together +// from Dallas example code (hence the copyright notice above). +// +// Kevin Vigor, 11/20/2000 + +#include + +#include "ow.h" +#include "crcutil.h" + +/* The internal 1-wire bus is hooked to P3.5, a.k.a T1 */ +/* The "activity" LED is also hooked to this line. */ +#define INT_OW_PORT T1 + +// global variables for this module to hold search state information +static int LastDiscrepancy; +static int LastFamilyDiscrepancy; +static int LastDevice; +static unsigned char SerialNum[8]; + +//-------------------------------------------------------------------------- +// Reset all of the devices on the 1-Wire Net and return the result. +// +// Returns: TRUE(1): presense pulse(s) detected, device(s) reset +// FALSE(0): no presense pulses detected +// +unsigned char owTouchReset(void) +{ + unsigned char result; + + /* Code stolen straight from appnote 126. */ + INT_OW_PORT = 0; /* drive bus low. */ + msDelay(480); /* sleep 480 ms */ + INT_OW_PORT = 1; /* bus high. */ + msDelay(120); + result = INT_OW_PORT; /* get presence detect pulse. */ + msDelay(360); + + return result; +} + +//-------------------------------------------------------------------------- +// Send 1 bit of communication to the 1-Wire Net and return the +// result 1 bit read from the 1-Wire Net. The parameter 'sendbit' +// least significant bit is used and the least significant bit +// of the result is the return bit. +// +// Returns: 0: 0 bit read from sendbit +// 1: 1 bit read from sendbit +// +unsigned char owTouchBit(unsigned char sendbit) +{ + unsigned char result; + + INT_OW_PORT = 0; /* start timeslot. */ + msDelay(1); + + INT_OW_PORT = sendbit; /* send bit out. */ + msDelay(9); + result = INT_OW_PORT; /* sample result @ 10 ms. */ + msDelay(50); /* Kill rest of slot. */ + INT_OW_PORT = 1; /* timeslot done. */ + msDelay(5); /* Just to make sure... */ + + return result; +} + +//-------------------------------------------------------------------------- +// Send 8 bits of communication to the 1-Wire Net and return the +// result 8 bits read from the 1-Wire Net. The parameter 'sendbyte' +// least significant 8 bits are used and the least significant 8 bits +// of the result is the return byte. +// +// 'sendbyte' - 8 bits to send (least significant byte) +// +// Returns: 8 bytes read from sendbyte +// +unsigned char owTouchByte(unsigned char sendbyte) +{ + unsigned char i; + unsigned char result = 0; + + for (i = 0; i < 8; i++) + { + result |= (owTouchBit(sendbyte & 1) << i); + sendbyte >>= 1; + } + + return result; +} + +//-------------------------------------------------------------------------- +// Send 8 bits of communication to the 1-Wire Net and verify that the +// 8 bits read from the 1-Wire Net is the same (write operation). +// The parameter 'sendbyte' least significant 8 bits are used. +// +// 'sendbyte' - 8 bits to send (least significant byte) +// +// Returns: TRUE: bytes written and echo was the same +// FALSE: echo was not the same +// +unsigned char owWriteByte(unsigned char sendbyte) +{ + return (owTouchByte(sendbyte) == sendbyte) ? TRUE : FALSE; +} + +//-------------------------------------------------------------------------- +// Send 8 bits of read communication to the 1-Wire Net and and return the +// result 8 bits read from the 1-Wire Net. +// +// Returns: 8 bytes read from 1-Wire Net +// +unsigned char owReadByte(void) +{ + return owTouchByte(0xFF); +} + +//-------------------------------------------------------------------------- +// Description: +// Delay for at least 'len' ms +// +void msDelay(unsigned int len) +{ + len; /* shut compiler up. */ + + _asm + + ; len is in dpl/dph + mov r0, dpl + mov r1, dph + + mov a, r0 + orl a, r1 ; quick out for zero case. + jz _sleepDone + + inc r1 + cjne r0, #0, _sleep1msLoop + dec r1 + + _sleep1msLoop: + nop + nop + nop + nop + nop + nop + nop ; 7 nops + djnz r0, _sleep1msLoop ; 3 cycles x 1 = 3 cycles + ; 10 cycles per iter; we want 9.216, but more is better + ; than less. + djnz r1, _sleep1msLoop +_sleepDone: + + _endasm; +} + +//-------------------------------------------------------------------------- +// The 'owBlock' transfers a block of data to and from the +// 1-Wire Net with an optional reset at the begining of communication. +// The result is returned in the same buffer. +// +// 'do_reset' - cause a owTouchReset to occure at the begining of +// communication TRUE(1) or not FALSE(0) +// 'tran_buf' - pointer to a block of unsigned +// chars of length 'TranferLength' that will be sent +// to the 1-Wire Net +// 'tran_len' - length in bytes to transfer + +// Supported devices: all +// +// Returns: TRUE (1) : The optional reset returned a valid +// presence (do_reset == TRUE) or there +// was no reset required. +// FALSE (0): The reset did not return a valid prsence +// (do_reset == TRUE). +// +// The maximum tran_len is 64 +// +unsigned char owBlock(unsigned char do_reset, + unsigned char *tran_buf, + unsigned char tran_len) +{ + int i; + + // check for a block too big + if (tran_len > 64) + return FALSE; + + // check if need to do a owTouchReset first + if (do_reset) + { + if (!owTouchReset()) + return FALSE; + } + + // send and receive the buffer + for (i = 0; i < tran_len; i++) + tran_buf[i] = owTouchByte(tran_buf[i]); + + return TRUE; +} + +//-------------------------------------------------------------------------- +// The 'owFirst' finds the first device on the 1-Wire Net This function +// contains one parameter 'alarm_only'. When +// 'alarm_only' is TRUE (1) the find alarm command 0xEC is +// sent instead of the normal search command 0xF0. +// Using the find alarm command 0xEC will limit the search to only +// 1-Wire devices that are in an 'alarm' state. +// +// 'do_reset' - TRUE (1) +// perform reset before search. +// 'alarm_only' - TRUE (1) the find alarm command 0xEC is +// sent instead of the normal search command 0xF0 +// +// Returns: TRUE (1) : when a 1-Wire device was found and it's +// Serial Number placed in the global SerialNum[portnum] +// FALSE (0): There are no devices on the 1-Wire Net. +// +unsigned char owFirst(unsigned char do_reset, unsigned char alarm_only) +{ + // reset the search state + LastDiscrepancy = 0; + LastDevice = FALSE; + LastFamilyDiscrepancy = 0; + + return owNext(do_reset,alarm_only); +} + +//-------------------------------------------------------------------------- +// The 'owNext' function does a general search. This function +// continues from the previos search state. The search state +// can be reset by using the 'owFirst' function. +// This function contains one parameter 'alarm_only'. +// When 'alarm_only' is TRUE (1) the find alarm command +// 0xEC is sent instead of the normal search command 0xF0. +// Using the find alarm command 0xEC will limit the search to only +// 1-Wire devices that are in an 'alarm' state. +// +// 'do_reset' - TRUE (1) perform reset before search, FALSE (0) do not +// perform reset before search. +// 'alarm_only' - TRUE (1) the find alarm command 0xEC is +// sent instead of the normal search command 0xF0 +// +// Returns: TRUE (1) : when a 1-Wire device was found and it's +// Serial Number placed in the global SerialNum[portnum] +// FALSE (0): when no new device was found. Either the +// last search was the last device or there +// are no devices on the 1-Wire Net. +// +unsigned char owNext(unsigned char do_reset, unsigned char alarm_only) +{ + int bit_test, search_direction, bit_number; + int last_zero, serial_byte_number, next_result; + unsigned char serial_byte_mask; + unsigned char lastcrc8; + + // initialize for search + bit_number = 1; + last_zero = 0; + serial_byte_number = 0; + serial_byte_mask = 1; + next_result = 0; + lastcrc8 = 0; + + // if the last call was not the last one + if (!LastDevice) + { + // check if reset first is requested + if (do_reset) + { + // reset the 1-wire + // if there are no parts on 1-wire, return FALSE + if (!owTouchReset()) + { + // reset the search + LastDiscrepancy = 0; + LastFamilyDiscrepancy = 0; + return FALSE; + } + } + + // If finding alarming devices issue a different command + if (alarm_only) + owWriteByte(0xEC); // issue the alarming search command + else + owWriteByte(0xF0); // issue the search command + + // loop to do the search + do + { + // read a bit and its compliment + bit_test = owTouchBit(1) << 1; + bit_test |= owTouchBit(1); + + // check for no devices on 1-wire + if (bit_test == 3) + { + break; + } + else + { + // all devices coupled have 0 or 1 + if (bit_test > 0) + { + search_direction = !(bit_test & 0x01); // bit write value for search + } + else + { + // if this discrepancy if before the Last Discrepancy + // on a previous next then pick the same as last time + if (bit_number < LastDiscrepancy) + search_direction = ((SerialNum[serial_byte_number] & serial_byte_mask) > 0); + else + // if equal to last pick 1, if not then pick 0 + search_direction = (bit_number == LastDiscrepancy); + + // if 0 was picked then record its position in LastZero + if (search_direction == 0) + last_zero = bit_number; + + // check for Last discrepancy in family + if (last_zero < 9) + LastFamilyDiscrepancy = last_zero; + } + + // set or clear the bit in the SerialNum byte serial_byte_number + // with mask serial_byte_mask + if (search_direction == 1) + SerialNum[serial_byte_number] |= serial_byte_mask; + else + SerialNum[serial_byte_number] &= ~serial_byte_mask; + + // serial number search direction write bit + owTouchBit(search_direction); + + // increment the byte counter bit_number + // and shift the mask serial_byte_mask + bit_number++; + serial_byte_mask <<= 1; + + // if the mask is 0 then go to new SerialNum byte serial_byte_number + // and reset mask + if (serial_byte_mask == 0) + { + lastcrc8 = docrc8(lastcrc8,SerialNum[serial_byte_number]); // accumulate the CRC + serial_byte_number++; + serial_byte_mask = 1; + } + } + } + while(serial_byte_number < 8); // loop until through all SerialNum bytes 0-7 + + // if the search was successful then + if (!((bit_number < 65) || lastcrc8)) + { + // search successful so set LastDiscrepancy,LastDevice,next_result + LastDiscrepancy = last_zero; + LastDevice = (LastDiscrepancy == 0); + next_result = TRUE; + } + } + + // if no device found then reset counters so next 'next' will be + // like a first + if (!next_result || !SerialNum[0]) + { + LastDiscrepancy = 0; + LastDevice = FALSE; + LastFamilyDiscrepancy = 0; + next_result = FALSE; + } + + return next_result; +} + +//-------------------------------------------------------------------------- +// The 'owSerialNum' function either reads or sets the SerialNum buffer +// that is used in the search functions 'owFirst' and 'owNext'. +// This function contains two parameters, 'serialnum_buf' is a pointer +// to a buffer provided by the caller. 'serialnum_buf' should point to +// an array of 8 unsigned chars. The second parameter is a flag called +// 'do_read' that is TRUE (1) if the operation is to read and FALSE +// (0) if the operation is to set the internal SerialNum buffer from +// the data in the provided buffer. +// +// 'serialnum_buf' - buffer to that contains the serial number to set +// when do_read = FALSE (0) and buffer to get the serial +// number when do_read = TRUE (1). +// 'do_read' - flag to indicate reading (1) or setting (0) the current +// serial number. +// +void owSerialNum(unsigned char *serialnum_buf, unsigned char do_read) +{ + int i; + + // read the internal buffer and place in 'serialnum_buf' + if (do_read) + { + for (i = 0; i < 8; i++) + { + serialnum_buf[i] = SerialNum[i]; + } + } + // set the internal buffer from the data in 'serialnum_buf' + else + { + for (i = 0; i < 8; i++) + { + SerialNum[i] = serialnum_buf[i]; + } + } +} + diff --git a/device/examples/ds390/readmac/ow.h b/device/examples/ds390/readmac/ow.h new file mode 100644 index 0000000..8f9f92b --- /dev/null +++ b/device/examples/ds390/readmac/ow.h @@ -0,0 +1,26 @@ +#ifndef OW_H_ +#define OW_H_ + +#ifndef FALSE +#define FALSE 0 +#endif +#ifndef TRUE +#define TRUE 1 +#endif + +unsigned char owFirst(unsigned char,unsigned char); +unsigned char owNext(unsigned char,unsigned char); +void owSerialNum(unsigned char *,unsigned char); + +/* Low level functions */ +unsigned char owTouchReset(void); +unsigned char owTouchBit(unsigned char); +unsigned char owTouchByte(unsigned char); +unsigned char owWriteByte(unsigned char); +unsigned char owReadByte(void); +void msDelay(unsigned int); + +unsigned char owBlock(unsigned char do_reset, + unsigned char *tran_buf, + unsigned char tran_len); +#endif diff --git a/device/examples/ds390/readmac/readmac.c b/device/examples/ds390/readmac/readmac.c new file mode 100644 index 0000000..eadde5f --- /dev/null +++ b/device/examples/ds390/readmac/readmac.c @@ -0,0 +1,111 @@ +// readmac.c +// +// Uses the internal 1-wire access routines in ow.c to read the MAC address +// from the 2502 on the TINI. + + +#include + +#include "ow.h" +#include "crcutil.h" + +void main(void) +{ + unsigned char serial[32]; + unsigned char mac[6]; + unsigned char myCRC; + unsigned char rc = 0; + unsigned char i; + + printf("Probing internal one-wire bus...\n"); + + if (owTouchReset()) + { + printf("No presence pulse.\n"); + rc = 1; + } + + if (!rc && !owFirst(0, 0)) + { + printf("Nothing on internal 1-wire bus.\n"); + rc = 1; + } + + if (!rc) + { + // Find first device of type 89 on internal 1-wire. + { + owSerialNum(serial, 1); + + #ifdef NOISY + printf("found 1-wire device: %02x%02x%02x%02x%02x%02x%02x%02x\n", + serial[0], serial[1], serial[2], serial[3], + serial[4], serial[5], serial[6], serial[7]); + #endif + } while (serial[0] != 0x89 && owNext(0, 0)); + + owTouchReset(); + + if (serial[0] != 0x89) + { + printf("No DS2502 found on internal 1-wire bus.\n"); + rc = 1; + } + } + + if (!rc) + { + printf("DS2502 located (ID %02x%02x%02x%02x%02x%02x%02x%02x).\n", + serial[0], serial[1], serial[2], serial[3], + serial[4], serial[5], serial[6], serial[7]); + /* Build command packet. */ + serial[0] = 0xCC; /* Skip ROM. */ + serial[1] = 0xF0; /* Read memory. */ + serial[2] = 0x00; /* Start address least significant byte. */ + serial[3] = 0x00; /* start address MSB. */ + serial[4] = 0xFF; /* listen slot for CRC8 of 1-3. */ + + owBlock(0, serial, 5); + + myCRC = docrc8(0, serial[1]); + myCRC = docrc8(myCRC, serial[2]); + myCRC = docrc8(myCRC, serial[3]); + if (myCRC != serial[4]) + { + printf("read failed: bogus CRC: %x != %x\n", myCRC, serial[4]); + rc = 1; + } + } + + if (!rc) + { + for (i = 0; i < 32; i++) + { + serial[i] = 0xFF; + } + owBlock(0, serial, 32); + + #ifdef NOISY + printf("DS2502 memory: "); + for (i = 0; i < 32; i++) + { + printf("%02x ", serial[i]); + } + printf("\n"); + #endif + { + unsigned char *mptr = mac; + unsigned char *sptr = &(serial[10]); + + for (i = 0; i < 6; i++) + { + *mptr++ = *sptr--; + } + } + + printf("MAC address: %02x%02x%02x%02x%02x%02x\n", + mac[0], mac[1], mac[2], + mac[3], mac[4], mac[5]); + owTouchReset(); + } +} diff --git a/device/examples/ds390/rtc390/Makefile b/device/examples/ds390/rtc390/Makefile new file mode 100644 index 0000000..d87c617 --- /dev/null +++ b/device/examples/ds390/rtc390/Makefile @@ -0,0 +1,19 @@ +CC = sdcc + +MFLAGS = -mds390 +LFLAGS = --xram-loc 0x100080 --code-loc 0x10000 -Wl-r + +OBJECTS = rtc390.rel + +all: rtc390.hex + +clean: + rm -f *~ \#* *.asm *.cdb *.rel *.hex *.ihx *.lst *.map *.rst *.sym *.lnk core *.dump* + +rtc390.hex: $(OBJECTS) + $(CC) $(MFLAGS) $(LFLAGS) $(OBJECTS) + packihx rtc390.ihx >rtc390.hex + #tinitalk -c execute rtc390.hex + +%.rel: %.c + $(CC) -c $(MFLAGS) -I . $< diff --git a/device/examples/ds390/rtc390/rtc390.c b/device/examples/ds390/rtc390/rtc390.c new file mode 100644 index 0000000..bbfa2ee --- /dev/null +++ b/device/examples/ds390/rtc390/rtc390.c @@ -0,0 +1,110 @@ +/*------------------------------------------------------------------------- + rtc390.c - time demo using the DS1315 (tested on TINI) + + Written By - Johan Knol, johan.knol@iduna.nl + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include +#include + +// until we have a decent scanf: +int ScanInt(int current) { + char reply[32], *r; + + gets(reply); + if (isdigit(*(r=reply))) { + current=0; + do { + current*=10; + current+=(*r++)-'0'; + } while (isdigit(*r)); + } + return current; +} + +char GetTime(struct tm *rtcTime) { + printf ("Enter year [%d]: ", rtcTime->tm_year+1900); + rtcTime->tm_year=ScanInt(rtcTime->tm_year+1900); + printf ("Enter month [%d]: ", rtcTime->tm_mon+1); + rtcTime->tm_mon=ScanInt(rtcTime->tm_mon)-1; + printf ("Enter day [%d]: ", rtcTime->tm_mday); + rtcTime->tm_mday=ScanInt(rtcTime->tm_mday); + printf ("Enter hour [%d]: ", rtcTime->tm_hour); + rtcTime->tm_hour=ScanInt(rtcTime->tm_hour); + printf ("Enter minute [%d]: ", rtcTime->tm_min); + rtcTime->tm_min=ScanInt(rtcTime->tm_min); + printf ("Enter second [%d]: ", rtcTime->tm_sec); + rtcTime->tm_sec=ScanInt(rtcTime->tm_sec); + return 1; +} + +void PrintTime(struct tm *rtcTime, char verbose) { + + printf ("%s%04d-%02d-%02d %02d:%02d:%02d.%02d\n", + verbose ? "RTC time: " : "", + rtcTime->tm_year+1900, rtcTime->tm_mon+1, rtcTime->tm_mday, + rtcTime->tm_hour, rtcTime->tm_min, rtcTime->tm_sec, + rtcTime->tm_hundredth); + + if (verbose) { + time_t calendarTime=mktime(rtcTime); + printf ("Seconds since 00:00:00 Jan 01 1970: %ld\n", calendarTime); + } +} + +void main (void) { + struct tm rtcTime, *now; + time_t calendarTime; + char seconds=-1; + + printf ("\nStarting RTC demo.\n"); + + RtcRead(&rtcTime); + PrintTime(&rtcTime,1); + + while(1) { + calendarTime=time(0); + now=localtime(&calendarTime); + + if (now->tm_sec!=seconds) { + printf(ctime(&calendarTime)); + seconds=now->tm_sec; + } + + if (Serial0CharArrived()) { + switch (getchar()) + { + case 0: + break; + case 'q': + printf ("Ok.\n"); + return; + default: + RtcRead(&rtcTime); + if (GetTime(&rtcTime)) { + RtcWrite(&rtcTime); + printf ("Time written.\n"); + } + } + } + } +} + diff --git a/device/examples/ds390/test390/Makefile b/device/examples/ds390/test390/Makefile new file mode 100644 index 0000000..3d54c0b --- /dev/null +++ b/device/examples/ds390/test390/Makefile @@ -0,0 +1,18 @@ + +all : test390.ihx + +test390.ihx : test390.c + sdcc -mds390 test390.c + +normal : + sdcc -mds390 --model-large test390.c + +clean: + rm -f mon.ihx *.lst *.rel *.rst *.sym *.cdb *.map *.ihx *.lnk *.asm + +sim: + ./s51 -t DS390F -Sout=test.lst test390.ihx + +sim_norm: + ./s51 -t DS390 -Sout=test.lst test390.ihx + diff --git a/device/examples/ds390/test390/test390.c b/device/examples/ds390/test390/test390.c new file mode 100644 index 0000000..1b91f84 --- /dev/null +++ b/device/examples/ds390/test390/test390.c @@ -0,0 +1,118 @@ +/* +A simple test app for ds390 compiler work +*/ + +#include <8052.h> + +typedef unsigned char byte; +typedef unsigned int word; +typedef unsigned long l_word; + +code char my_message[] = {"Testing 123\n"}; +volatile byte hi_flag = 1; +volatile byte timer = 0; + +/**** + Note(Bug?): stock mcs51 will find this in library routines, + For -mds390 compile, + if this is not here linker does not link in + anything and does not complain or fail the link. +*****/ +unsigned char _sdcc_external_startup () +{ + return 0; +} + +/*------------------------------------------------------------------------ + timer0_int - Timer0 interrupt. Notice we are using register bank 2 + for this interrupt. +|------------------------------------------------------------------------*/ +void timer0_irq_proc(void) interrupt 1 using 2 +{ + if (timer != 0) + { + --timer; + } + else + { + hi_flag = 1; + timer = 250; + } + + TR0 = 0; /* Stop Timer 0 counting */ + TH0 = (~(5000)) >> 8; + TL0 = (~(5000)) & 0xff; + TR0 = 1; /* Start counting again */ +} + +#if 0 +/*------------------------------------------------------------------------ + uart0_int - Interrupt 4 is for the UART, notice we use register bank 1 + for the interrupt routine. +|------------------------------------------------------------------------*/ +void uart0_int(void) interrupt 4 using 1 +{ + if (RI) + { + c = SBUF; + RI = 0; + } +} +#endif + +/*------------------------------------------------------------------------ + tx_char - transmit(tx) a char out the serial uart. +|------------------------------------------------------------------------*/ +void tx_char(char c) +{ + SBUF = c; + while (!TI) + ; + TI = 0; +} + +/*------------------------------------------------------------------------ + tx_str - transmit(tx) a string out the serial uart. +|------------------------------------------------------------------------*/ +void tx_str(char *str) +{ + + while (*str) + tx_char(*str++); +} + +/*------------------------------------------------------------------------ + main - Simple test program to send out something to the serial port. +|------------------------------------------------------------------------*/ +void main(void) +{ + PCON = 0x80; /* power control byte, set SMOD bit for serial port */ + SCON = 0x50; /* serial control byte, mode 1, RI active */ + TMOD = 0x21; /* timer control mode, byte operation */ + TCON = 0; /* timer control register, byte operation */ + + TH1 = 0xFA; /* serial reload value, 9,600 baud at 11.0952Mhz */ + TR1 = 1; /* start serial timer */ + + TR0 = 1; /* start timer0 */ + ET0 = 1; /* Enable Timer 0 overflow interrupt IE.1 */ + EA = 1; /* Enable Interrupts */ + + TI = 0; /* clear this out */ + SBUF = '.'; /* send an initial '.' out serial port */ + hi_flag = 1; + //ES = 1; /* Enable serial interrupts IE.4 */ + + tx_str(my_message); + + for (;;) + { + if (hi_flag) + { + tx_str("Hi There\n"); + hi_flag = 0; + } + } + +} + diff --git a/device/examples/ds390/tinitalk/Makefile b/device/examples/ds390/tinitalk/Makefile new file mode 100644 index 0000000..d4bd41f --- /dev/null +++ b/device/examples/ds390/tinitalk/Makefile @@ -0,0 +1,8 @@ +CFLAGS=-Wall -g + +tinitalk: tinitalk.c tinitalk.h + cc -o $@ $(CFLAGS) $< + cp $@ /usr/local/bin + +clean: + rm -f core *~ *.o tinitalk \#* diff --git a/device/examples/ds390/tinitalk/Makefile.bcc b/device/examples/ds390/tinitalk/Makefile.bcc new file mode 100644 index 0000000..58c46df --- /dev/null +++ b/device/examples/ds390/tinitalk/Makefile.bcc @@ -0,0 +1,14 @@ +# Makefile for Borlad C++ + +PRJDIR = ../../../.. + +!include $(PRJDIR)/Bcc.inc + +OBJECTS = tinitalk.obj + +TARGET = tinitalk.exe + +all: $(TARGET) + +$(TARGET): $(OBJECTS) + $(CC) $(CFLAGS) -e$(TARGET) $(OBJECTS) diff --git a/device/examples/ds390/tinitalk/tinitalk.c b/device/examples/ds390/tinitalk/tinitalk.c new file mode 100644 index 0000000..581a7dd --- /dev/null +++ b/device/examples/ds390/tinitalk/tinitalk.c @@ -0,0 +1,848 @@ +/*------------------------------------------------------------------------- + tinitalk.c - A tini utility to download files to TINI and talk to it + + Written By - Johan Knol johan.knol@iduna.nl + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + -------------------------------------------------------------------------*/ + +#if defined(_MSC_VER) || defined(__BORLANDC__) +#define TINI_PORT "COM2" +#else +#ifdef linux +// must be linux +#define TINI_PORT "/dev/ttyS0" +#else +// could be solaris +#define TINI_PORT "/dev/term/a" +#endif +#endif +#define TINI_BAUD 115200 +#define TINI_ESCAPE_CHAR 0x1b + +#include +#include +#include +#include +#include + +#if !defined( _MSC_VER) && !defined(__BORLANDC__) +#include +#include +#include +#else +#include +#include +#define sleep(ms) Sleep((ms*1000)) +#define usleep(us) Sleep((us/1000)) +#endif + +#include "tinitalk.h" + +char *programName; +char escapeChar = 0; +char *port = NULL; +int baud = 0, appBaud = 0; + +void +Usage () +{ + fprintf (stderr, "usage: %s command [args] \n", programName); + fprintf (stderr, "\nwhere options are:\n"); + fprintf (stderr, " <-p port> set the serial port, defaults to %s\n", TINI_PORT); + fprintf (stderr, " <-b baud> set the baud rate, defaults to %d\n", TINI_BAUD); + fprintf (stderr, " <-B baud> set the baud rate for the application\n"); + fprintf (stderr, " <-c> connect to tini after command (if any)\n"); + fprintf (stderr, " <-e #> to set the escape char\n"); + fprintf (stderr, " <-s> to see some examples.\n"); + fprintf (stderr, "\nand commands are:\n"); + fprintf (stderr, " load a hex file and restart the bootloader\n"); + fprintf (stderr, " load a hex file and/or start the program in bank 1\n"); + exit (1); +} + +void +Examples () +{ + printf ("\n"); + printf ("%s -p /dev/ttyS1\n", programName); + printf (" now you are talking to the bootloader through serial-1\n"); + printf ("%s -b 19200\n", programName); + printf (" now you are talking to the bootloader at 19200 baud\n"); + printf ("%s load tini.hex\n", programName); + printf (" load tini.hex\n"); + printf ("%s -c load tini.hex\n", programName); + printf (" after loading tini.hex you are talking to the bootloader\n"); + printf ("%s execute tini.hex\n", programName); + printf (" load tini.hex and start the program in bank 1\n"); + printf ("%s -c execute tini.hex\n", programName); + printf (" after loading the file you are talking to the (restarted)\n"); + printf (" program in bank 1\n"); + printf ("%s execute\n", programName); + printf (" now the program in bank 1 is restarted.\n"); + printf ("%s -c execute\n", programName); + printf (" now you are talking to the (restarted) program in bank 1\n"); + printf ("%s -b 115200 -B 9600 -c execute tini.hex\n", programName); + printf (" download tini.hex at 115200 baud, but talk the program at 9600 baud\n"); + exit (0); +} + +int +main (int argc, char **argv) +{ + int connect = 0; + char command[64]; + + int arg = 1; + + //programName=argv[0]; + programName = "tinitalk"; + + // process options + while (arg < argc && argv[arg][0] == '-') + { + + // no arguments required + if (argv[arg][1] == 'c') + { + connect = 1; + arg++; + continue; + } + else if (argv[arg][1] == 's') + { + Examples (); + // will not return + } + // argument required + if (arg >= (argc - 1)) + { + Usage (); + } + switch (argv[arg][1]) + { + case 'p': + port = argv[arg + 1]; + break; + case 'b': + baud = atoi (argv[arg + 1]); + break; + case 'B': + appBaud = atoi (argv[arg + 1]); + break; + case 'e': + escapeChar = atoi (argv[arg + 1]); + break; + default: + Usage (); + } + arg += 2; + } + + if (port == NULL) + { + if ((port = getenv ("TINI_PORT")) == NULL) + { + port = TINI_PORT; + } + } + if (baud == 0) + { + if (getenv ("TINI_BAUD")) + { + baud = atoi (getenv ("TINI_BAUD")); + } + else + { + baud = TINI_BAUD; + } + } + if (escapeChar == 0) + { + if (getenv ("TINI_ESCAPE_CHAR")) + { + escapeChar = atoi (getenv ("TINI_ESCAPE_CHAR")); + } + else + { + escapeChar = TINI_ESCAPE_CHAR; + } + } + if (appBaud == 0) + { + appBaud = baud; + } + if (!TiniOpen (port, baud)) + { + exit (1); + } + // process commands + while (arg < argc) + { + if (strcmp (argv[arg], "load") == 0) + { + // argument required + if (arg >= (argc - 1)) + { + Usage (); + } + if (LoadHexFile (argv[arg + 1])) + { + TiniReset (1); + if (connect) + { + TiniConnect (baud); + } + } + exit (0); + } + if (strcmp (argv[arg], "execute") == 0) + { + // argument supplied? + if (arg < (argc - 1)) + { + if (!LoadHexFile (argv[arg + 1])) + { + exit (0); + } + } + TiniReset (0); + if (connect) + { + TiniConnect (appBaud); + } + exit (0); + } + // unsupported command + Usage (); + } + + // no commands, just connect + + // on my linux box, DTR is always set after opening the port, so: + // reset the bootloader + + strcpy (command, "r"); + + while (1) + { + switch (tolower (command[0])) + { + case '?': + case '\n': + case 'h': + printf ("\n"); + printf ("r - reset, start bootloader and connect to TINI\n"); + printf ("e - reset, start program in bank 1 and connect to TINI\n"); + printf ("c - connect to TINI.\n"); + printf ("l - load file.\n"); + printf ("s - save file.\n"); + printf ("q - quit.\n"); + break; + case 'e': + TiniReset (0); + TiniConnect (appBaud); + break; + case 'r': + TiniReset (1); + TiniConnect (baud); + break; + case 'c': + // leave it as it was + TiniConnect (0); + break; + case 'l': + { + char fileName[FILENAME_MAX] = ""; + printf ("Enter filename: "); + fflush (stdout); + fgets (fileName, FILENAME_MAX, stdin); + // remove the EOL character + fileName[strlen (fileName) - 1] = 0; + LoadHexFile (fileName); + } + break; + case 's': + printf ("Command \"%c\" not implemented yet.\n", command[0]); + break; + case 'q': + return 0; + break; + default: + printf ("Unknown command: \"%c\".\n", command[0]); + break; + } + printf ("\n<%s> ", programName); + fflush (stdout); +#if defined(_MSC_VER) || defined(__BORLANDC__) + // don't know why + getch (); +#endif + fgets (command, 64, stdin); + } + return 0; +} + +int +LoadHexFile (char *path) +{ + FILE *hexFile; + char hexLine[256]; + int bank = 0; + int line = 0, type; + char tempString[16]; + char c, ctrlC = 0x03; + int bytesLoaded = 0, progress = 0; + char banksZapped[8] = + {0, 0, 0, 0, 0, 0, 0, 0}; + unsigned int address, bytes, i; + unsigned int checksum, chk; + + if ((hexFile = fopen (path, "r")) == NULL) + { + perror (path); + return 0; + } + TiniFlush (); + + while (fgets (hexLine, 256, hexFile)) + { + + if (TiniRead (&c, 1) == 1) + { + // show error messages from TINI + printf ("\n"); + do + { + putchar (c); + } + while (TiniRead (&c, 1) == 1); + + printf ("\nInterrupted by loader.\n"); + return 0; + } + line++; + + if (hexLine[0] != ':' || + sscanf (&hexLine[1], "%02x", &bytes) != 1 || + sscanf (&hexLine[3], "%04x", &address) != 1 || + sscanf (&hexLine[7], "%02x", &type) != 1) + { + printf ("Invalid ihx record: \"%s\"\n", hexLine); + TiniReset (1); + return 0; + } + // make sure line ends with '\r' or TINI won't swallow it + hexLine[strlen (hexLine) - 1] = '\r'; + + address += bank << 16; + + // test checksum + checksum = 0; + for (i = 0; i < bytes + 5; i++) + { + sscanf (&hexLine[i * 2 + 1], "%02x", &chk); + checksum += chk; + } + if (checksum & 0xff) + { + printf ("\nChecksum error at %06x (0x%02x!=0) in line: %d\n", + address, checksum&0xff, line); + TiniReset (1); + return 0; + } + if (type == 4) + { + // new Hex386 record + sscanf (&hexLine[9], "%04x", &bank); + address = (address & 0xffff) + (bank << 16); + // just for safety + if (bank == 0) + { + printf ("==> No overwrite of bank 0 <==\n"); + return 0; + } + if (0) + { + // interupt loader + TiniWriteAndWait (&ctrlC, 1, '>'); + } + else + { + // reset TINI + TiniReset (1); + } + if (!banksZapped[bank]) + { + // zap bank + sprintf (tempString, "z%d\r", bank); + TiniWriteAndWait (tempString, 3, '?'); + TiniWriteAndWait ("y", 1, '\n'); + printf ("[Zapping bank %d]\n", bank); + TiniWait ('>'); + banksZapped[bank] = 1; + // start loader + //printf ("[Starting loader]\n"); + } + TiniWriteAndWait ("l\r", 2, '\n'); + printf ("[Loading bank %d]\n", bank); + } + if (bank > 0) + { + if ((type == 0) && (1 || ((bytesLoaded / 1024) > progress))) + { + progress = bytesLoaded / 1024; + printf ("[%06x: sent %d bytes]\r", address, bytesLoaded); + fflush (stdout); + } + bytesLoaded += bytes; + + //printf ("data: %s\n", hexLine); + TiniWrite (" ", 12); + TiniWrite (hexLine, strlen (hexLine)); + TiniDrain (); + } + else + { + //printf ("skip: %s\n", hexLine); + } + } + TiniWriteAndWait ("\r", 1, '>'); + printf ("\n[Load succesfull]\n"); + fclose (hexFile); + return 1; +} + +int +SaveFile (char *path) +{ + printf ("Saving file: %s\n", path); + return 1; +} + +/* + this is the io part + */ + +#if defined(_MSC_VER) || defined(__BORLANDC__) +HANDLE tiniHandle; +DCB tiniDcb; +#else +static int tini_fd; +static int tini_status; +static struct termios tini_options; +#endif + +static int initflag = 0; + +int +TiniOpen (char *port, int baud) +{ + + if (initflag) + { + return 1; + } + printf ("[Opening \"%s\" at \"%d\" baud, escape is 0x%02x]\n", + port, baud, escapeChar); + +#if defined(_MSC_VER) || defined(__BORLANDC__) + if ((tiniHandle = CreateFile (port, GENERIC_READ | GENERIC_WRITE, 0, NULL, + OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL)) == + INVALID_HANDLE_VALUE) +#else + if ((tini_fd = open (port, O_RDWR | O_NOCTTY | O_NONBLOCK)) < 0) +#endif + { + fprintf (stderr, "%s: unable to open port %s - ", + "TiniOpen", port); + perror(""); + return 0; + } + // configure the serial port +#if defined(_MSC_VER) || defined(__BORLANDC__) + tiniDcb.DCBlength = sizeof (DCB); + if (GetCommState (tiniHandle, &tiniDcb) != TRUE) + { + fprintf (stderr, "%s: unable to query port %s\n", + "TiniOpen", port); + TiniClose (); + return 0; + } + tiniDcb.StopBits = 0; + tiniDcb.ByteSize = 8; + tiniDcb.Parity = 0; + tiniDcb.fDtrControl = DTR_CONTROL_DISABLE; + tiniDcb.fRtsControl = RTS_CONTROL_DISABLE; + tiniDcb.fOutxCtsFlow = FALSE; + tiniDcb.fOutX = FALSE; + tiniDcb.fInX = FALSE; + if (SetCommState (tiniHandle, &tiniDcb) != TRUE) + { + fprintf (stderr, "%s: unable to configure port %s\n", + "TiniOpen", port); + TiniClose (); + return 0; + } + // reset DTR + EscapeCommFunction (tiniHandle, CLRDTR); +#else + if (ioctl (tini_fd, TIOCMGET, &tini_status)) + { + perror ("0: ioctl(tini_fd, TIOCMGET, &tini_status) - "); + TiniClose (); + return 0; + } + // reset DTR + tini_status &= ~TIOCM_DTR; + if (ioctl (tini_fd, TIOCMSET, &tini_status)) + { + perror ("2: ioctl(tini_fd, TIOCMSET, &tini_status) - "); + TiniClose (); + return 0; + } + tcgetattr (tini_fd, &tini_options); + tini_options.c_cflag |= (CLOCAL | CREAD); + tini_options.c_lflag &= ~(ISIG | ICANON | ECHO); + tini_options.c_iflag |= (IGNCR); + tini_options.c_cc[VMIN] = 0; + tini_options.c_cc[VTIME] = 0; + tcsetattr (tini_fd, TCSANOW, &tini_options); +#endif + + if (!TiniBaudRate (baud)) + { + TiniClose (); + return 0; + } + initflag = 1; + return 1; +} + +#if defined(_MSC_VER) || defined(__BORLANDC__) +#define B9600 CBR_9600 +#define B19200 CBR_19200 +#define B38400 CBR_38400 +#define B57600 CBR_57600 +#define B115200 CBR_115200 +#endif + +int +TiniBaudRate (int baud) +{ + int baudB; + + switch (baud) + { + case 9600: + baudB = B9600; + break; + case 19200: + baudB = B19200; + break; + case 38400: + baudB = B38400; + break; + case 57600: + baudB = B57600; + break; + case 115200: + baudB = B115200; + break; + default: + fprintf (stderr, "%s: illegal baudrate: \"%d\"\n", programName, baud); + return 0; + } + +#if defined(_MSC_VER) || defined(__BORLANDC__) + tiniDcb.BaudRate = baudB; + SetCommState (tiniHandle, &tiniDcb); +#else + cfsetispeed (&tini_options, baudB); + cfsetospeed (&tini_options, baudB); + tcsetattr (tini_fd, TCSANOW, &tini_options); +#endif + + return 1; +} + +int +TiniReset (int toBootLoader) +{ + + // set DTR +#if defined(_MSC_VER) || defined(__BORLANDC__) + EscapeCommFunction (tiniHandle, SETDTR); +#else + tini_status |= TIOCM_DTR; + if (ioctl (tini_fd, TIOCMSET, &tini_status)) + { + perror ("1: ioctl(tini_fd, TIOCMSET, &tini_status) - "); + return 0; + } +#endif + + // wait for 100ms + usleep (100000); + + // drain input and output buffers + TiniDrain (); + + // reset DTR +#if defined(_MSC_VER) || defined(__BORLANDC__) + EscapeCommFunction (tiniHandle, CLRDTR); +#else + tini_status &= ~TIOCM_DTR; + if (ioctl (tini_fd, TIOCMSET, &tini_status)) + { + perror ("2: ioctl(tini_fd, TIOCMSET, &tini_status) - "); + return 0; + } +#endif + + // wait for 100ms + usleep (100000); + + if (TiniWrite ("\r", 1) != 1) + { + fprintf (stderr, "TiniReset: couldn't write to tini\n"); + return 0; + } + // wait for the bootloader prompt + // we should build a timeout here + TiniWait ('>'); + + if (toBootLoader) + { + return 1; + } + TiniWriteAndWait ("E\r", 2, 'E'); + return 1; +} + +#if defined(_MSC_VER) || defined(__BORLANDC__) +// read as much character as available, at most n +int +TiniRead (char *buffer, int n) +{ + int count; + int status; + COMSTAT tiniComStat; + + ClearCommError (tiniHandle, &status, &tiniComStat); + if (tiniComStat.cbInQue < (unsigned int) n) + { + n = tiniComStat.cbInQue; + } + ReadFile (tiniHandle, buffer, n, &count, NULL); + + return count; +} + +int +TiniWrite (char *buffer, int n) +{ + int count; + WriteFile (tiniHandle, buffer, n, &count, NULL); + return count; +} +#else +int +TiniRead (char *buffer, int n) +{ + return read (tini_fd, buffer, n); +} + +int +TiniWrite (char *buffer, int n) +{ + return write (tini_fd, buffer, n); +} +#endif + +// wait for the prompChar +int +TiniWait (char promptChar) +{ + char c; + while (1) + { + switch (TiniRead (&c, 1)) + { + case 0: // no char available + // give up our time slice + + sleep (0); + break; + case 1: // one char read + + putchar (c); + fflush (stdout); + if (c == promptChar) + { + return 1; + } + break; + default: // some error + + perror ("TiniWait: "); + return 0; + break; + } + } +} + +// send the buffer and wait for the promptChar +int +TiniWriteAndWait (char *buffer, int n, char promptChar) +{ + char bytes = TiniWrite (buffer, n); + TiniWait (promptChar); + return bytes; +} + +// flush input and output buffers (wait for it) +void +TiniFlush () +{ +#if defined(_MSC_VER) || defined(__BORLANDC__) + FlushFileBuffers (tiniHandle); +#else + // flush the buffers, isn't there a simpler way? + tcsetattr (tini_fd, TCSAFLUSH, &tini_options); +#endif +} + +// drain input and output buffers (forget it) +void +TiniDrain () +{ +#if defined(_MSC_VER) || defined(__BORLANDC__) + PurgeComm (tiniHandle, PURGE_TXCLEAR | PURGE_RXCLEAR); +#else + // drain the buffers, isn't there a simpler way? + tcsetattr (tini_fd, TCSADRAIN, &tini_options); +#endif +} + +#if defined(_MSC_VER) || defined(__BORLANDC__) +void +TiniConnect (int baud) +{ + char c; + + if (baud) + { + TiniBaudRate (baud); + } + + while (1) + { + if (TiniRead (&c, 1)) + { + // char from TINI, high priority + putchar (c); + fflush (stdout); + } + else if (kbhit ()) + { + // char from console, low priotity + if ((c = getch ()) == escapeChar) + { + // escape from connect? + printf (""); + break; + } + TiniWrite (&c, 1); + } + else + { + // nothing to do, so give up our timeslice + sleep (0); + } + } +} +#else +void +TiniConnect (int baud) +{ + struct termios options, consoleOptions; + int consoleFlags; + char c; + int fno; + + if (baud) + { + TiniBaudRate (baud); + } + + // set stdin to nonblocking IO, noecho + fno = fileno (stdin); + consoleFlags = fcntl (fno, F_GETFL); + fcntl (fno, F_SETFL, consoleFlags | O_NONBLOCK); + + tcgetattr (fno, &consoleOptions); + options = consoleOptions; + options.c_lflag &= ~(ISIG | ICANON | ECHO); + tcsetattr (fno, TCSANOW, &options); + + while (1) + { + if (TiniRead (&c, 1) == 1) + { + // char from TINI, high priority + putchar (c); + } + else if ((c = getchar ()) != EOF) + { + // char from console, low priority + if (c == escapeChar) + { + // escape from connect? + break; + } + if (c == '\n') + { + c = '\r'; + } + TiniWrite (&c, 1); + } + else + { + // nothing to do, so give up our timeslice + sleep (0); + } + } + + // reset stdin + fcntl (fno, F_SETFL, consoleFlags); + tcsetattr (fno, TCSANOW, &consoleOptions); +} +#endif + +void +TiniClose (void) +{ + initflag = 0; +#if defined(_MSC_VER) || defined(__BORLANDC__) + CloseHandle (tiniHandle); +#else + close (tini_fd); +#endif +} diff --git a/device/examples/ds390/tinitalk/tinitalk.dsp b/device/examples/ds390/tinitalk/tinitalk.dsp new file mode 100644 index 0000000..098ad12 --- /dev/null +++ b/device/examples/ds390/tinitalk/tinitalk.dsp @@ -0,0 +1,88 @@ +# Microsoft Developer Studio Project File - Name="tinitalk" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 5.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Console Application" 0x0103 + +CFG=tinitalk - Win32 Debug +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "tinitalk.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "tinitalk.mak" CFG="tinitalk - Win32 Debug" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "tinitalk - Win32 Release" (based on\ + "Win32 (x86) Console Application") +!MESSAGE "tinitalk - Win32 Debug" (based on "Win32 (x86) Console Application") +!MESSAGE + +# Begin Project +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "tinitalk - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 0 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 0 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD BASE RSC /l 0x413 /d "NDEBUG" +# ADD RSC /l 0x413 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /machine:I386 +# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /machine:I386 + +!ELSEIF "$(CFG)" == "tinitalk - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /Zi /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD CPP /nologo /W3 /Gm /GX /Zi /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD BASE RSC /l 0x413 /d "_DEBUG" +# ADD RSC /l 0x413 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /debug /machine:I386 /pdbtype:sept +# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /debug /machine:I386 /pdbtype:sept + +!ENDIF + +# Begin Target + +# Name "tinitalk - Win32 Release" +# Name "tinitalk - Win32 Debug" +# Begin Source File + +SOURCE=.\tinitalk.c +# End Source File +# End Target +# End Project diff --git a/device/examples/ds390/tinitalk/tinitalk.dsw b/device/examples/ds390/tinitalk/tinitalk.dsw new file mode 100644 index 0000000..67b9216 --- /dev/null +++ b/device/examples/ds390/tinitalk/tinitalk.dsw @@ -0,0 +1,29 @@ +Microsoft Developer Studio Workspace File, Format Version 5.00 +# WARNING: DO NOT EDIT OR DELETE THIS WORKSPACE FILE! + +############################################################################### + +Project: "tinitalk"=.\tinitalk.dsp - Package Owner=<4> + +Package=<5> +{{{ +}}} + +Package=<4> +{{{ +}}} + +############################################################################### + +Global: + +Package=<5> +{{{ +}}} + +Package=<3> +{{{ +}}} + +############################################################################### + diff --git a/device/examples/ds390/tinitalk/tinitalk.h b/device/examples/ds390/tinitalk/tinitalk.h new file mode 100644 index 0000000..9f8b0db --- /dev/null +++ b/device/examples/ds390/tinitalk/tinitalk.h @@ -0,0 +1,16 @@ +extern char *globalStringSpace; + +extern int TiniOpen(char *argPort, int argBaud); +extern int TiniBaudRate(int baud); +extern int TiniReset(int toBootLoader); +extern int TiniRead(char*, int); +extern int TiniWrite(char*, int); +extern int TiniWait(char promptChar); +extern int TiniWriteAndWait(char *buffer, int n, char promptChar); +extern void TiniFlush(void); +extern void TiniDrain(void); +extern void TiniConnect(int baud); +extern void TiniClose(void); + +extern int LoadHexFile(char *path); +extern int SaveHexFile(char *path); diff --git a/device/examples/ds400/hello400/Makefile b/device/examples/ds400/hello400/Makefile new file mode 100644 index 0000000..ac1ea7b --- /dev/null +++ b/device/examples/ds400/hello400/Makefile @@ -0,0 +1,20 @@ +CC = ../../../../bin/sdcc + +MFLAGS = -mds400 +LFLAGS = --xram-loc 0x10000 --code-loc 0x400000 -Wl-r + +OBJECTS = hello.rel + +all: hello.hex + +clean: + rm -f *~ \#* *.asm *.cdb *.rel *.hex *.ihx *.lst *.map *.rst *.sym *.lnk + +hello.hex: hello.ihx + packihx hello.ihx >hello.hex + +hello.ihx: $(OBJECTS) + $(CC) $(MFLAGS) $(LFLAGS) $(OBJECTS) + +%.rel: %.c + $(CC) -c $(MFLAGS) $< diff --git a/device/examples/ds400/hello400/Readme b/device/examples/ds400/hello400/Readme new file mode 100644 index 0000000..1659175 --- /dev/null +++ b/device/examples/ds400/hello400/Readme @@ -0,0 +1,2 @@ +This works on a TINIm400. The resulting "hello.hex" can be loaded uaing +JavaKit's 'Load hex as TBIN' option. diff --git a/device/examples/ds400/hello400/hello.c b/device/examples/ds400/hello400/hello.c new file mode 100644 index 0000000..7c69228 --- /dev/null +++ b/device/examples/ds400/hello400/hello.c @@ -0,0 +1,37 @@ +#include +#include + +void main(void) +{ + int i, j; + + printf("Hello world!\n"); + j = 0; + + while (1) + { + printf("Loop %d\n", j++); + + + /* Make LED go blink. */ + P5 |= 4; + for (i = 0; i < 32767; i++) + { + + ; + } + for (i = 0; i < 32767; i++) + { + + ; + } + + P5 &= ~4; + for (i = 0; i < 32767; i++) + { + + ; + } + } + +} diff --git a/device/examples/ds400/monitor400/Makefile b/device/examples/ds400/monitor400/Makefile new file mode 100644 index 0000000..625cca0 --- /dev/null +++ b/device/examples/ds400/monitor400/Makefile @@ -0,0 +1,21 @@ +CC = ../../../../bin/sdcc + +MFLAGS = -mds400 +LFLAGS = --xram-loc 0x10000 --code-loc 0x400000 -Wl-r + +OBJECTS = mon400.rel + +all: mon400.hex + +clean: + rm -f *~ \#* *.asm *.cdb *.rel *.hex *.ihx *.lst *.map *.rst *.sym *.lnk + +mon400.hex: mon400.ihx + packihx mon400.ihx >mon400.hex + +mon400.ihx: $(OBJECTS) + $(CC) $(MFLAGS) $(LFLAGS) $(OBJECTS) + +%.rel: %.c + $(CC) -c $(MFLAGS) $< + diff --git a/device/examples/ds400/monitor400/mon400.c b/device/examples/ds400/monitor400/mon400.c new file mode 100644 index 0000000..c0060de --- /dev/null +++ b/device/examples/ds400/monitor400/mon400.c @@ -0,0 +1,137 @@ +#include +#include + +#include +#include + +#define BUF_LEN 80 + +void usage(void) +{ + puts("Available commands:\n"); + puts("ledon: turns LED on."); + puts("ledoff: turns LED off."); + puts("clock: reports millisecond timer."); + puts("sleep: sleeps for 10 seconds (or forever if you didn't startclock first)."); +} + +void blinker(void) +{ + int i, j; + + while (1) + { + P5 |= 4; + for (j = 0; j < 10; j++) + { + for (i = 0; i < 32767; i++) + { + ; + } + } + + P5 &= ~4; + + for (j = 0; j < 10; j++) + { + for (i = 0; i < 32767; i++) + { + ; + } + } + } +} + + +void main(void) +{ + char buffer[80]; + + // At this stage, the rom isn't initalized. We do have polled serial I/O, but that's + // about the only functional library service. + printf("TINIm400 monitor rev 0.0\n"); + + romInit(1, SPEED_2X); + + // Now we're cooking with gas. + + while (1) + { + // monitor prompt. + printf("-> "); + + gets(buffer); // unsafe, of course, should use some equivalent of fgets. + + if (!strcmp(buffer, "ledon")) + { + P5 &= ~4; // LED on. + printf("LED on.\n"); + } + else if (!strcmp(buffer, "ledoff")) + { + P5 |= 4; + printf("LED off.\n"); + } + else if (!strcmp(buffer, "clock")) + { + printf("Clock: %ld\n", ClockTicks()); + } + else if (!strcmp(buffer, "thread")) + { + printf("Thread ID: %d\n", (int)task_getthreadID()); + } + else if (!strcmp(buffer, "sleep")) + { + printf("Sleeping for 10 seconds...\n"); + + ClockMilliSecondsDelay(10 * 1000); + + printf("Back.\n"); + } + else if (!strcmp(buffer, "pmr")) + { + printf("PMR: %x\n", PMR); + } + else if (!strcmp(buffer, "exif")) + { + printf("EXIF: %x\n", EXIF); + } + else if (!strcmp(buffer, "blink")) + { + blinker(); + } + else if (!strcmp(buffer, "t0")) + { + printf("TH0:TL0 %x:%x\n", TH0, TL0); + } + else if (!strcmp(buffer, "t2")) + { + printf("TH2:TL2 %x:%x\n", TH2, TH2); + } + else if (!strcmp(buffer, "faster")) + { + printf("going really fast...\n"); + P5 |= 4; // LED off. + + PMR = 0x82; + PMR = 0x8a; // 8a for REAL fast + PMR = 0x9a; // 9a for REAL fast. + + while (!(EXIF & 8)) + ; + + PMR = 0x1a; // 1a for REAL fast. + +_asm + nop +_endasm; + + P5 &= ~5; // LED on. + } + else if (buffer[0]) + { + printf("Unknown command \"%s\".\n", buffer); + usage(); + } + } +} diff --git a/device/examples/itoa.c b/device/examples/itoa.c new file mode 100644 index 0000000..a3c7d1b --- /dev/null +++ b/device/examples/itoa.c @@ -0,0 +1,47 @@ +/*------------------------------------------------------------------------- + integer to string conversion + + Written by: Bela Torok, 1999 + bela.torok@kssg.ch + usage: + + uitoa(unsigned int value, char* string, int radix) + itoa(int value, char* string, int radix) + + value -> Number to be converted + string -> Result + radix -> Base of value (e.g.: 2 for binary, 10 for decimal, 16 for hex) +---------------------------------------------------------------------------*/ + +#define NUMBER_OF_DIGITS 16 /* space for NUMBER_OF_DIGITS + '\0' */ + +void uitoa(unsigned int value, char* string, int radix) +{ +unsigned char index, i; + + index = NUMBER_OF_DIGITS; + i = 0; + + do { + string[--index] = '0' + (value % radix); + if ( string[index] > '9') string[index] += 'A' - ':'; /* continue with A, B,.. */ + value /= radix; + } while (value != 0); + + do { + string[i++] = string[index++]; + } while ( index < NUMBER_OF_DIGITS ); + + string[i] = 0; /* string terminator */ +} + +void itoa(int value, char* string, int radix) +{ + if (value < 0 && radix == 10) { + *string++ = '-'; + uitoa(-value, string, radix); + } + else { + uitoa(value, string, radix); + } +} \ No newline at end of file diff --git a/device/examples/ltoa.c b/device/examples/ltoa.c new file mode 100644 index 0000000..f5be64f --- /dev/null +++ b/device/examples/ltoa.c @@ -0,0 +1,48 @@ +/*------------------------------------------------------------------------- + integer to string conversion + + Written by: Bela Torok, 1999 + bela.torok@kssg.ch + usage: + + ultoa(unsigned long value, char* string, int radix) + ltoa(long value, char* string, int radix) + + value -> Number to be converted + string -> Result + radix -> Base of value (e.g.: 2 for binary, 10 for decimal, 16 for hex) +---------------------------------------------------------------------------*/ + +#define NUMBER_OF_DIGITS 32 + +void ultoa(unsigned long value, char* string, int radix) +{ +unsigned char index; +char buffer[NUMBER_OF_DIGITS]; /* space for NUMBER_OF_DIGITS + '\0' */ + + index = NUMBER_OF_DIGITS; + + do { + buffer[--index] = '0' + (value % radix); + if ( buffer[index] > '9') buffer[index] += 'A' - ':'; /* continue with A, B,... */ + value /= radix; + } while (value != 0); + + do { + *string++ = buffer[index++]; + } while ( index < NUMBER_OF_DIGITS ); + + *string = 0; /* string terminator */ +} + +void ltoa(long value, char* string, int radix) +{ + if (value < 0 && radix == 10) { + *string++ = '-'; + ultoa(-value, string, radix); + } + else { + ultoa(value, string, radix); + } +} + diff --git a/device/examples/mcs51/asmblink/Makefile b/device/examples/mcs51/asmblink/Makefile new file mode 100644 index 0000000..b5e2e21 --- /dev/null +++ b/device/examples/mcs51/asmblink/Makefile @@ -0,0 +1,14 @@ +# makefile for Linux + +all : blink.ihx + +blink.ihx : blink.lnk + asx8051 -los blink.asm + aslink -f blink.lnk + +blink.lnk : blink_lnk + cp blink_lnk blink.lnk + +clean: + rm -f mon.ihx *.lst *.rel *.rst *.sym *.cdb *.map *.ihx + diff --git a/device/examples/mcs51/asmblink/blink.asm b/device/examples/mcs51/asmblink/blink.asm new file mode 100644 index 0000000..b66093e --- /dev/null +++ b/device/examples/mcs51/asmblink/blink.asm @@ -0,0 +1,34 @@ +;-------------------------------------------------------- +; blink.asm - simple ASM example to toggle a port pin +; (LED on TINI board). +; +; On a TINI board this toggles really fast, so +; it appears that the LED just dims slightly. +; You may need a scope to detect it. +; +; You can use s51(ucsim simulator) to look at the +; blink.ihx(hex-file). Run like this: +; >S51 blink.ihx +; Then dump code like this: +; s51>dc +;-------------------------------------------------------- + .module bootasm + +;-------------------------------------------------------- +; Stack segment in internal ram +;-------------------------------------------------------- + .area SSEG (DATA) +__start__stack: + .ds 1 + + .area CODE (CODE) + +;-------------------------------------------------------- +; global & static initialisations +;-------------------------------------------------------- + .area GSINIT (CODE) +main: + clr ea ; disable ints + clr p3.5 ; turn LED off + setb p3.5 ; turn LED on + ljmp main diff --git a/device/examples/mcs51/asmblink/blink_lnk b/device/examples/mcs51/asmblink/blink_lnk new file mode 100644 index 0000000..d90d81c --- /dev/null +++ b/device/examples/mcs51/asmblink/blink_lnk @@ -0,0 +1,11 @@ +-muxi +-z +-b CODE = 0x00000 +-b DSEG = 0x0030 +-b XSEG = 0x160000 +-b ISEG = 0x0080 +-b BSEG = 0x0000 +blink +-e + + diff --git a/device/examples/mcs51/asmblink/go_dos.bat b/device/examples/mcs51/asmblink/go_dos.bat new file mode 100644 index 0000000..c79b32e --- /dev/null +++ b/device/examples/mcs51/asmblink/go_dos.bat @@ -0,0 +1,6 @@ +rem DOS CVS access does not like .lnk files, so this is workaround. +copy blink_lnk blink.lnk +asx8051.exe -los blink.asm +aslink -f blink.lnk + + diff --git a/device/examples/mcs51/clock/Makefile b/device/examples/mcs51/clock/Makefile new file mode 100644 index 0000000..c44b459 --- /dev/null +++ b/device/examples/mcs51/clock/Makefile @@ -0,0 +1,24 @@ +CC = sdcc +#CFLAGS = -V +MFLAGS = --model-small --debug +#MFLAGS = --model-large +LFLAGS = --xram-loc 0x4000 --code-loc 0x0000 + +all: clock.bin + +OBJECTS = clock.rel hwinit.rel + +clock.bin: clock.ihx + hex2bin clock.bin + cat clock.bin >/dev/par0 + cu -l /dev/ttyS0 -s 19200 dir + +clock.ihx: $(OBJECTS) + $(CC) $(MFLAGS) $(LFLAGS) $(OBJECTS) + +clean: + rm -f core *~ \#* *.asm *.cdb *.rel *.hex *.ihx *.lst *.map \ + *.rst *.sym *.lnk *.lib *.bin + +%.rel: %.c hw.h + $(CC) -c $(CFLAGS) $(MFLAGS) $< diff --git a/device/examples/mcs51/clock/clock.c b/device/examples/mcs51/clock/clock.c new file mode 100644 index 0000000..dabcd55 --- /dev/null +++ b/device/examples/mcs51/clock/clock.c @@ -0,0 +1,26 @@ +#include <8051.h> +#include + +#include "hw.h" + +void main(void) { + unsigned long ms; + unsigned int seconds, oldseconds=ClockTicks()/1000; + + printf ("Example using the core timer to generate seconds.\n"); + + while (1) { + ms=ClockTicks(); + seconds=ms/1000; + if (oldseconds!=seconds) { + oldseconds=seconds; + printf ("%02d:%02d.%02d %ld\n", + (int)seconds/3600, (int)(seconds/60)%60, + (int)seconds%60, ms); + } + if (RI) { + putchar(getchar()); + printf("%ld\n\r", ClockTicks()); + } + } +} diff --git a/device/examples/mcs51/clock/hw.h b/device/examples/mcs51/clock/hw.h new file mode 100644 index 0000000..4161a2e --- /dev/null +++ b/device/examples/mcs51/clock/hw.h @@ -0,0 +1,6 @@ +#define OSCILLATOR 11059200 +#define BAUD 19200 + +void ClockIrqHandler (void) interrupt 1 using 3; +unsigned long ClockTicks(void); + diff --git a/device/examples/mcs51/clock/hwinit.c b/device/examples/mcs51/clock/hwinit.c new file mode 100644 index 0000000..43fe088 --- /dev/null +++ b/device/examples/mcs51/clock/hwinit.c @@ -0,0 +1,72 @@ +#include "8051.h" + +#include "hw.h" + +// timer 0 used for systemclock +#define TIMER0_RELOAD_VALUE -OSCILLATOR/12/1000 // 0.999348ms for 11.059Mhz + +// timer 1 used for baudrate generator +#define TIMER1_RELOAD_VALUE -(2*OSCILLATOR)/(32*12*BAUD) + +static long data milliSeconds; + +void ClockIrqHandler (void) interrupt 1 using 3 { + TL0 = TIMER0_RELOAD_VALUE&0xff; + TH0 = TIMER0_RELOAD_VALUE>>8; + milliSeconds++; +} + +// we can't just use milliSeconds +unsigned long ClockTicks(void) { + unsigned long ms; + ET0=0; + ms=milliSeconds; + ET0=1; + return ms; +} + +unsigned char _sdcc_external_startup() { + // initialize timer0 for system clock + TR0=0; // stop timer 0 + TMOD =(TMOD&0xf0)|0x01; // T0=16bit timer + // timeout is xtal/12 + TL0 = -TIMER0_RELOAD_VALUE&0xff; + TH0 = -TIMER0_RELOAD_VALUE>>8; + milliSeconds=0; // reset system time + TR0=1; // start timer 0 + ET0=1; // enable timer 0 interrupt + + // initialize timer1 for baudrate + TR1=0; // stop timer 1 + TMOD = (TMOD&0x0f)|0x20; // T1=8bit autoreload timer + // baud = ((2^SMOD)*xtal)/(32*12*(256-TH1)) + PCON |= 0x80; // SMOD=1: double baudrate + TH1=TL1=TIMER1_RELOAD_VALUE; + TR1=1; // start timer 1 + + // initialize serial port + SCON=0x52; // mode 1, ren, txrdy, rxempty + + EA=1; // enable global interrupt + + return 0; +} + +char getchar() { + char c; + while (!RI) + ; + RI=0; + c=SBUF; + return c; +} + +void putchar(char c) { + while (!TI) + ; + TI=0; + SBUF=c; + if (c=='\n') { + putchar('\r'); + } +} diff --git a/device/examples/mcs51/simple/go b/device/examples/mcs51/simple/go new file mode 100755 index 0000000..7b41b17 --- /dev/null +++ b/device/examples/mcs51/simple/go @@ -0,0 +1,3 @@ +#!/bin/bash +sdcc hi.c + diff --git a/device/examples/mcs51/simple/go.bat b/device/examples/mcs51/simple/go.bat new file mode 100644 index 0000000..c3a9048 --- /dev/null +++ b/device/examples/mcs51/simple/go.bat @@ -0,0 +1,10 @@ +; this is a windows batch file to compile hi.c + +; set SDCCINC=c:\usr\local\sdcc\device\include +; set SDCCLIBS=c:\usr\local\sdcc\device\lib\small + +set SDCCINC=c:\sdcc\include +set SDCCLIBS=c:\sdcc\lib\small + +sdcc -I %SDCCINC% -L %SDCCLIBS% hi.c + diff --git a/device/examples/mcs51/simple/hi.c b/device/examples/mcs51/simple/hi.c new file mode 100644 index 0000000..636be08 --- /dev/null +++ b/device/examples/mcs51/simple/hi.c @@ -0,0 +1,165 @@ +/*------------------------------------------------------------------------ + hi.c - This is a simple program designed to operate on basic MCS51 + hardware at 11.0592Mhz. It sets up the baudrate to 9600 and sends + a "Hi\n" "There\n" message every few seconds. The timer interrupt + is used. + + Its intended to be a simple example for SDCC, a good first + program to compile and play with. + + The simulator can be used to run this program: + s51 -Sout=serial.txt hi.ihx (run, stop, quit) + + Notice that unless we use the --stack-after-data option, + the SSEG listed in the map is not accurate, look at the + .asm file and search for "sp," to see where it is really + initialized to. + + 6-28-01 Written by Karl Bongers(karl@turbobit.com) +|------------------------------------------------------------------------*/ +#include <8052.h> + +typedef unsigned char byte; +typedef unsigned int word; +typedef unsigned long l_word; + +//---- most of the following declares are simply to demostrate some +// of SDCC's variable storage declaration syntax + +// volatile keyword is needed for variables shared by interrupt routine +// and normal application thread, otherwise things get optimized out. +volatile data byte timer; +volatile data byte hi_flag; + +data byte a_data_byte; // normal < 128 bytes of 8031 internal memory. +idata byte a_idata_byte; // in +128 byte internal memory of 8032 +xdata byte a_xdata_byte; // in external memory. +xdata at 0x8000 byte mem_mapped_hardware; // example at usage + +bit my_bit; // mcs51 bit variable, stored in single bit of register space + +sfr at 0xd8 WDCON; // special function register declaration +sbit LED_SYS = 0xb5; // P3.5 is led, example use of sbit keyword + +code char my_message[] = {"GNU rocks\n"}; // placed in code space + +void timer0_irq_proc(void) interrupt 1 using 2; + +/*------------------------------------------------------------------------ + timer0_int - Timer0 interrupt. Notice we are using register bank 2 + for this interrupt. +|------------------------------------------------------------------------*/ +void timer0_irq_proc(void) interrupt 1 using 2 +{ + if (timer != 0) + { + --timer; + } + else + { + hi_flag = 1; + timer = 250; + } + + TR0 = 0; /* Stop Timer 0 counting */ + TH0 = (~(5000)) >> 8; + TL0 = (~(5000)) & 0xff; + TR0 = 1; /* Start counting again */ +} + +#if 0 +/*------------------------------------------------------------------------ + uart0_int - Interrupt 4 is for the UART, notice we use register bank 1 + for the interrupt routine. +|------------------------------------------------------------------------*/ +void uart0_int(void) interrupt 4 using 1 +{ + if (RI) + { + c = SBUF; + RI = 0; + } +} +#endif + +/*------------------------------------------------------------------------ + tx_char - transmit(tx) a char out the serial uart. +|------------------------------------------------------------------------*/ +void tx_char(char c) +{ + SBUF = c; + while (!TI) + ; + TI = 0; +} + +/*------------------------------------------------------------------------ + tx_str - transmit(tx) a string out the serial uart. +|------------------------------------------------------------------------*/ +void tx_str(char *str) +{ + + while (*str) + tx_char(*str++); +} + +/*------------------------------------------------------------------------ + stop - a break point in Daniel D's s51 can be set at 65535 memory + location to stop the simulation. This routine also shows how to + embed assembly. +|------------------------------------------------------------------------*/ +void stop(void) +{ + _asm; + mov dptr, #65535; + movx a, @dptr; + nop; + _endasm; +} + +/*------------------------------------------------------------------------ + main - Simple test program to send out something to the serial port. +|------------------------------------------------------------------------*/ +void main(void) +{ + PCON = 0x80; /* power control byte, set SMOD bit for serial port */ + SCON = 0x50; /* serial control byte, mode 1, RI active */ + TMOD = 0x21; /* timer control mode, byte operation */ + TCON = 0; /* timer control register, byte operation */ + + TH1 = 0xFA; /* serial reload value, 9,600 baud at 11.0952Mhz */ + TR1 = 1; /* start serial timer */ + + TR0 = 1; /* start timer0 */ + ET0 = 1; /* Enable Timer 0 overflow interrupt IE.1 */ + EA = 1; /* Enable Interrupts */ + + TI = 0; /* clear this out */ + SBUF = '.'; /* send an initial '.' out serial port */ + hi_flag = 1; + //ES = 1; /* Enable serial interrupts IE.4 */ + + tx_str(my_message); + + for (;;) + { + if (hi_flag) + { + tx_str("Hi There\n"); + hi_flag = 0; + } + +stop(); + +#ifdef TEST_IDLE_MODE + // this was a simple test of the low power sleep mode of a + // dallas DS5000 cmos part, to see how much power requirements + // dropped in sleep mode. + + // into idle mode until next interrupt. Draws only 3ma. + PCON = 0x81; +#endif + } + +} + diff --git a/device/examples/mcs51/simple/test b/device/examples/mcs51/simple/test new file mode 100755 index 0000000..75c88b4 --- /dev/null +++ b/device/examples/mcs51/simple/test @@ -0,0 +1,10 @@ +#!/bin/bash + +# Try out the simulator. Route serial port output to a text file. +# After simulator is started, you need to type: +# run +# stop +# quit + +s51 -Sout=serial.txt hi.ihx + diff --git a/device/examples/mcs51/simple/test.bat b/device/examples/mcs51/simple/test.bat new file mode 100644 index 0000000..cad5c1d --- /dev/null +++ b/device/examples/mcs51/simple/test.bat @@ -0,0 +1,3 @@ +s51 -Sout=serial.txt hi.ihx + + diff --git a/device/examples/mcs51/simple2/go b/device/examples/mcs51/simple2/go new file mode 100755 index 0000000..7b41b17 --- /dev/null +++ b/device/examples/mcs51/simple2/go @@ -0,0 +1,3 @@ +#!/bin/bash +sdcc hi.c + diff --git a/device/examples/mcs51/simple2/go.bat b/device/examples/mcs51/simple2/go.bat new file mode 100644 index 0000000..c3a9048 --- /dev/null +++ b/device/examples/mcs51/simple2/go.bat @@ -0,0 +1,10 @@ +; this is a windows batch file to compile hi.c + +; set SDCCINC=c:\usr\local\sdcc\device\include +; set SDCCLIBS=c:\usr\local\sdcc\device\lib\small + +set SDCCINC=c:\sdcc\include +set SDCCLIBS=c:\sdcc\lib\small + +sdcc -I %SDCCINC% -L %SDCCLIBS% hi.c + diff --git a/device/examples/mcs51/simple2/hi.c b/device/examples/mcs51/simple2/hi.c new file mode 100644 index 0000000..241a6ad --- /dev/null +++ b/device/examples/mcs51/simple2/hi.c @@ -0,0 +1,99 @@ +/*------------------------------------------------------------------------ + hello.c - This is a simple program designed to operate on basic MCS51 + hardware at 11.0592Mhz. It sets up the baudrate to 9600 and responds + to simple ascii commands on the serial port. + + Its intended to be a simple example for SDCC and ucSim. + The redirection of the simluated serial port to a TCP port + is cool, try this: + Try: + 1.) type>s51 -k 5678 hi.ihx + 2.) (Now telnet to 127.0.0.1 Port 5678) + 3.) At the s51 prompt, type: run + 4.) At the telnet prompt, type in a few keys followed by CR + 5.) You should see this program send back what you typed. + + 6-28-01 Written by Karl Bongers(karl@turbobit.com) +|------------------------------------------------------------------------*/ +#include <8052.h> + +typedef unsigned char byte; +typedef unsigned int word; +typedef unsigned long l_word; + +data byte li = 0; // index into lbuf +data byte g_dc; +data byte lbuf[12]; // this is our line buffer, chars gather here till CR seen + +/*------------------------------------------------------------------------ + tx_char - transmit(tx) a char out the serial uart. +|------------------------------------------------------------------------*/ +void tx_char(char c) +{ + SBUF = c; + while (!TI) + ; + TI = 0; +} + +/*------------------------------------------------------------------------ + tx_str - transmit(tx) a string out the serial uart. +|------------------------------------------------------------------------*/ +void tx_str(char *str) +{ + + while (*str) + tx_char(*str++); +} + +/*------------------------------------------------------------------------ + main - +|------------------------------------------------------------------------*/ +void main(void) +{ + PCON = 0x80; /* power control byte, set SMOD bit for serial port */ + SCON = 0x50; /* serial control byte, mode 1, RI active */ + TMOD = 0x21; /* timer control mode, byte operation */ + TCON = 0; /* timer control register, byte operation */ + + TH1 = 0xFA; /* serial reload value, 9,600 baud at 11.0952Mhz */ + TR1 = 1; /* start serial timer */ + + EA = 1; /* Enable Interrupts */ + + TI = 0; /* clear this out */ + SBUF = '.'; /* send an initial '.' out serial port */ + //ES = 1; /* Enable serial interrupts IE.4 */ + + tx_str("Hello World\n"); + + RI = 0; + g_dc = 0; + for (;;) + { + if (RI) // we have new serial rx data + { + g_dc = SBUF; // read the serial char + RI = 0; // reset serial rx flag + + tx_char(g_dc); // echo back out as serial tx data + if ((g_dc == 0x0d) || (g_dc == '.') || (g_dc == 0x0a)) // if CR, then end of line + { + tx_char(0xd); // CR + tx_char(0xa); // LF + lbuf[li] = 0; + li = 0; + tx_str("You typed in this["); + tx_str(lbuf); + tx_str("]\n"); + } + else + { + lbuf[li] = g_dc; + if (li < 11) + ++li; + } + } + } +} + diff --git a/device/examples/mcs51/simple2/test b/device/examples/mcs51/simple2/test new file mode 100755 index 0000000..2b39083 --- /dev/null +++ b/device/examples/mcs51/simple2/test @@ -0,0 +1,4 @@ +#!/bin/bash + +s51 -k 5678 hi.ihx + diff --git a/device/examples/mcs51/simple2/test.bat b/device/examples/mcs51/simple2/test.bat new file mode 100644 index 0000000..7f02b95 --- /dev/null +++ b/device/examples/mcs51/simple2/test.bat @@ -0,0 +1,3 @@ +s51 -k 5678 hi.ihx + + diff --git a/device/examples/serialcomm/windows/serial.c b/device/examples/serialcomm/windows/serial.c new file mode 100644 index 0000000..b42338d --- /dev/null +++ b/device/examples/serialcomm/windows/serial.c @@ -0,0 +1,280 @@ +/*------------------------------------------------------------------------- + Serial library functions for the Windows OS (95-XP) + Tested with different versions of MS Visual Studio (C ad C++) + + Written by - Bela Torok / www.torok.info & www.belatorok.com (February 2006) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU General Public + License as published by the Free Software Foundation; either + version 2 of the License (http://www.gnu.org/licenses/gpl.txt). + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include +#include + +#include "serial.h" +#define ASCII_XON 0x11 +#define ASCII_XOFF 0x13 + +HANDLE SerialInit(char *ComPortName, DWORD BaudRate, int ByteSize, int StopBit, char ParityChar, char Protocol, int RxTimeOut, int TxTimeOut, int RxBufSize, int TxBufSize) +{ + HANDLE hCom; + BOOL bPortReady; + DCB dcb; + COMMTIMEOUTS CommTimeouts; + int Parity; + + switch(ParityChar) { + case 'N': + case 'n': + Parity = NOPARITY; + break; + case 'E': + case 'e': + Parity = EVENPARITY; + break; + case 'O': + case 'o': + Parity = ODDPARITY; + break; + default: + return NULL; // illegal parameter ! + } + + switch(StopBit) + { + case 1: + StopBit = ONESTOPBIT; + break; + case 2: + StopBit = TWOSTOPBITS; + break; + default: + return NULL; // illegal parameter ! + } + + hCom = CreateFile( ComPortName, + GENERIC_READ | GENERIC_WRITE, + 0, // exclusive access + NULL, // no security + OPEN_EXISTING, + 0, // no overlapped I/O + NULL); // null template + + if(hCom == INVALID_HANDLE_VALUE) return NULL; + + bPortReady = SetupComm(hCom, RxBufSize, TxBufSize); // set Rx and Tx buffer sizes + + // Port settings are specified in a Data Communication Block (DCB). + + bPortReady = GetCommState(hCom, &dcb); + + dcb.BaudRate = BaudRate; + dcb.ByteSize = ByteSize; + dcb.Parity = Parity; + dcb.StopBits = StopBit; + dcb.fAbortOnError = TRUE; + + switch(Protocol) { + case 'D': // DTR/DSR + case 'd': + // set XON/XOFF + dcb.fOutX = FALSE; + dcb.fInX = FALSE; + // set RTSCTS + dcb.fOutxCtsFlow = FALSE; + dcb.fRtsControl = RTS_CONTROL_DISABLE; + // set DSRDTR + dcb.fOutxDsrFlow = TRUE; + dcb.fDtrControl = DTR_CONTROL_HANDSHAKE; + break; + case 'R': // RTS/CTS + case 'r': + // set XON/XOFF + dcb.fOutX = FALSE; + dcb.fInX = FALSE; + // set RTSCTS + dcb.fOutxCtsFlow = TRUE; + dcb.fRtsControl = RTS_CONTROL_HANDSHAKE; + // set DSRDTR + dcb.fOutxDsrFlow = FALSE; + dcb.fDtrControl = DTR_CONTROL_DISABLE; + break; + case 'X': // XON/XOFF + case 'x': + // set XON/XOFF + dcb.fOutX = TRUE; + dcb.fInX = TRUE; + dcb.fTXContinueOnXoff = TRUE; + dcb.XoffChar = ASCII_XOFF; + dcb.XoffLim = RxBufSize - (RxBufSize / 4); + dcb.XonChar = ASCII_XON; + dcb.XonLim = RxBufSize - (RxBufSize / 2); + // set RTSCTS + dcb.fOutxCtsFlow = FALSE; + dcb.fRtsControl = RTS_CONTROL_DISABLE; + // set DSRDTR + dcb.fOutxDsrFlow = FALSE; + dcb.fDtrControl = DTR_CONTROL_DISABLE; + break; + case 'N': // NOPROTOCOL + case 'n': + default: + // set XON/XOFF + dcb.fOutX = FALSE; + dcb.fInX = FALSE; + // set RTSCTS + dcb.fOutxCtsFlow = FALSE; + dcb.fRtsControl = RTS_CONTROL_DISABLE; + // set DSRDTR + dcb.fOutxDsrFlow = FALSE; + dcb.fDtrControl = DTR_CONTROL_DISABLE; + break; + } + + bPortReady = SetCommState(hCom, &dcb); + + // Set timeouts + CommTimeouts.ReadIntervalTimeout = RxTimeOut; + CommTimeouts.ReadTotalTimeoutMultiplier = 0; + CommTimeouts.ReadTotalTimeoutConstant = RxTimeOut; + + CommTimeouts.WriteTotalTimeoutMultiplier = 0; + CommTimeouts.WriteTotalTimeoutConstant = TxTimeOut; + + bPortReady = SetCommTimeouts(hCom, &CommTimeouts); + + return hCom; +} + +void SerialClose(HANDLE hSerial) { + CloseHandle(hSerial); +} + +int SerialGetc(HANDLE hSerial) +{ + unsigned char rxchar; + BOOL bReadRC; + static DWORD iBytesRead, dwError; + + if(hSerial == NULL) return 0; + + bReadRC = ReadFile(hSerial, &rxchar, 1, &iBytesRead, NULL); + + if(bReadRC == FALSE) { // error + + ClearCommError(hSerial, &dwError, NULL); + +// PurgeComm(hSerial, PURGE_RXABORT | PURGE_RXCLEAR | PURGE_TXABORT | PURGE_TXCLEAR); +// PurgeComm(hSerial, PURGE_RXCLEAR | PURGE_TXCLEAR); + + if(dwError == 0) return TIMEOUT; // no error, iBytesRead is probably == 0 + if(dwError & CE_BREAK) return BREAK; // break detected + if(dwError & CE_FRAME) return BREAK; // framing error + + /* One, or a combination of the following conditions: + CE_IOE -> 0x0400 I/O error during communication with the device + CE_OVERRUN -> 0x0002 character-buffer overrun, the next character is lost + CE_RXOVER -> 0x0001 input buffer overflow, no room in the input buffer, + or a character was received after the EOF character + CE_RXPARITY -> 0x0004 parity error + CE_TXFULL -> 0x0100 transmit buffer is full + */ + if(dwError & CE_IOE) printf("SerialGetc() I/O error during communication with the device!\n"); + if(dwError & CE_OVERRUN) printf("SerialGetc() Character-buffer overrun, the next character is lost!\n"); + if(dwError & CE_RXOVER) printf("SerialGetc() Input buffer overflow!\n"); + if(dwError & CE_RXPARITY) printf("SerialGetc() Parity error!\n"); + if(dwError & CE_TXFULL) printf("SerialGetc() Transmit buffer is full!\n"); + return SERIAL_ERROR; + } + + if(iBytesRead == 0) return TIMEOUT; // Timeout occured + + return (int) rxchar; +} + + +int SerialPutc(HANDLE hCom, char txchar) +{ + BOOL bWriteRC; + static DWORD iBytesWritten; + + if(hCom == NULL) return -255; + + bWriteRC = WriteFile(hCom, &txchar, 1, &iBytesWritten,NULL); + + if(iBytesWritten = 1) return 0; + + return TIMEOUT; +} + +char SerialGets(char *rxstring, int MaxNumberOfCharsToRead, HANDLE hCom) +{ + int c; + int pos = 0; + unsigned char success = 0; // set to error + + if(hCom == NULL) return success; // Error! + + while(pos <= MaxNumberOfCharsToRead) { + c = SerialGetc(hCom); + + if(c == TIMEOUT) return success; // Error + if(c == '\n') break; + if(c != '\r') rxstring[pos++] = (char) c; // discard carriage return + } + rxstring[pos] = 0; + + success = 1; + + return success; // No errors +} + +void SerialPuts(HANDLE hCom, char *txstring) +{ + BOOL bWriteRC; + static DWORD iBytesWritten; + + if(hCom == NULL) return; + + bWriteRC = WriteFile(hCom, txstring, (DWORD) strlen(txstring), &iBytesWritten,NULL); +} + +int SerialGetModemStatus(HANDLE hCom, int Mask) +{ +// The value for Mask must be one of the following definitions: +// MS_CTS_ON +// MS_DSR_ON +// MS_RING_ON + int ModemStat; + + GetCommModemStatus(hCom, &ModemStat); + + switch( Mask ) { + case MS_CTS_ON: + case MS_DSR_ON: + case MS_RING_ON: + if((ModemStat & Mask) != 0) { + return 1; + } else { + return 0; + } + default: + return -1; + } +} + +void SerialClearRxBuffer(HANDLE hCom) +{ + PurgeComm(hCom, PURGE_RXCLEAR); +} diff --git a/device/examples/serialcomm/windows/serial.h b/device/examples/serialcomm/windows/serial.h new file mode 100644 index 0000000..c33d4f1 --- /dev/null +++ b/device/examples/serialcomm/windows/serial.h @@ -0,0 +1,27 @@ +#define TIMEOUT -1 +#define SERIAL_ERROR -8 +#define BREAK -16 + +#ifdef __cplusplus +extern "C" { +#endif + +HANDLE SerialInit(char*, DWORD, int, int, char, char, int, int, int, int); + +int SerialGetc(HANDLE); + +int SerialPutc(HANDLE, char); + +char SerialGets(char*, int, HANDLE); + +void SerialPuts(HANDLE, char*); + +int SerialGetModemStatus(HANDLE, int); + +void SerialClearRxBuffer(HANDLE); + +void SerialClose(HANDLE); + +#ifdef __cplusplus +} +#endif \ No newline at end of file diff --git a/device/examples/serialcomm/windows/serialcomm.dsp b/device/examples/serialcomm/windows/serialcomm.dsp new file mode 100644 index 0000000..974afce --- /dev/null +++ b/device/examples/serialcomm/windows/serialcomm.dsp @@ -0,0 +1,105 @@ +# Microsoft Developer Studio Project File - Name="serialcomm" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Console Application" 0x0103 + +CFG=serialcomm - Win32 Debug +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "serialcomm.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "serialcomm.mak" CFG="serialcomm - Win32 Debug" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "serialcomm - Win32 Release" (based on "Win32 (x86) Console Application") +!MESSAGE "serialcomm - Win32 Debug" (based on "Win32 (x86) Console Application") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "serialcomm - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 0 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 0 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /machine:I386 +# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /machine:I386 + +!ELSEIF "$(CFG)" == "serialcomm - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /GZ /c +# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /GZ /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo /o"Debug/test_serialcomm.bsc" +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /debug /machine:I386 /pdbtype:sept +# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /debug /machine:I386 /out:"Debug/test_serialcomm.exe" /pdbtype:sept + +!ENDIF + +# Begin Target + +# Name "serialcomm - Win32 Release" +# Name "serialcomm - Win32 Debug" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\serial.c +# End Source File +# Begin Source File + +SOURCE=.\test_serialcomm.cpp +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=.\serial.h +# End Source File +# End Group +# End Target +# End Project diff --git a/device/examples/serialcomm/windows/serialcomm.dsw b/device/examples/serialcomm/windows/serialcomm.dsw new file mode 100644 index 0000000..68cfd2b --- /dev/null +++ b/device/examples/serialcomm/windows/serialcomm.dsw @@ -0,0 +1,29 @@ +Microsoft Developer Studio Workspace File, Format Version 6.00 +# WARNING: DO NOT EDIT OR DELETE THIS WORKSPACE FILE! + +############################################################################### + +Project: "serialcomm"=.\serialcomm.dsp - Package Owner=<4> + +Package=<5> +{{{ +}}} + +Package=<4> +{{{ +}}} + +############################################################################### + +Global: + +Package=<5> +{{{ +}}} + +Package=<3> +{{{ +}}} + +############################################################################### + diff --git a/device/examples/serialcomm/windows/test_serialcomm.cpp b/device/examples/serialcomm/windows/test_serialcomm.cpp new file mode 100644 index 0000000..32f409b --- /dev/null +++ b/device/examples/serialcomm/windows/test_serialcomm.cpp @@ -0,0 +1,34 @@ +// Test program for serial communication. Visual C / MFC Version +// Bela Torok / bela.torok@kssg.ch, March 2001 + +#include // Defines the entry point for the console application. + +#include +#include + +#include "serial.h" + +int main(int argc, char* argv[]) +{ + HANDLE hComPort; + char buf[128]; + + hComPort = SerialInit("com1", 1200, 8, 1, 'N', 'N', 5000, 5000, 2, 128); + + if( hComPort == 0) { + printf("\n\nError initializing %s!\n", "com1"); + exit(1); + } + + // write string to RS232 + SerialPuts(&hComPort, "\nInitialize\n"); +// sleep(5000); + + // read string from RS232 + printf("\nString received: %s\n", SerialGets(buf, sizeof (buf) - 1, hComPort)); + + CloseHandle(hComPort); + + return 0; +} + diff --git a/device/examples/startupcode/c.bat b/device/examples/startupcode/c.bat new file mode 100644 index 0000000..4ba9c8a --- /dev/null +++ b/device/examples/startupcode/c.bat @@ -0,0 +1,10 @@ +set SDCCFLAGS=--debug --stack-after-data --model-large +cls +cd src +sdcc --version +sdcc %SDCCFLAGS% --compile-only startup_code.c +sdcc %SDCCFLAGS% --compile-only cpu_c515a.c +sdcc %SDCCFLAGS% startup_code.rel cpu_c515a.rel +cd .. +pause +c.bat diff --git a/device/examples/startupcode/inc/c515a.h b/device/examples/startupcode/inc/c515a.h new file mode 100644 index 0000000..cd85d39 --- /dev/null +++ b/device/examples/startupcode/inc/c515a.h @@ -0,0 +1,418 @@ +/*------------------------------------------------------------------------- + Register Declarations for SIEMENS SAB 80515 Processor + + Written By - Bela Torok + Bela.Torokt@kssg.ch + based on reg51.h by Sandeep Dutta sandeep.dutta@usa.net + + modified 20. march 2000 by Michael.Schmitt@t-online.de + + KEIL C compatible definitions are included + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SAB80C515A_H +#define SAB80C515A_H + +/* BYTE addressable registers */ +sfr at 0x80 P0 ; +sfr at 0x81 SP ; +sfr at 0x82 DPL ; +sfr at 0x83 DPH ; +sfr at 0x87 PCON ; +sfr at 0x88 TCON ; +sfr at 0x89 TMOD ; +sfr at 0x8A TL0 ; +sfr at 0x8B TL1 ; +sfr at 0x8C TH0 ; +sfr at 0x8D TH1 ; +sfr at 0x90 P1 ; +sfr at 0x98 SCON ; +sfr at 0x99 SBUF ; +sfr at 0xA0 P2 ; +sfr at 0xA8 IE ; +sfr at 0xA8 IEN0 ; /* as called by Siemens */ +sfr at 0xA9 IP0 ; /* interrupt priority register - SAB80515 specific */ +sfr at 0xAA SRELL ; // Baudrategenerator Reload Low Value +sfr at 0xB0 P3 ; +sfr at 0xB1 SYSCON ; // XRAM Controller Access Control SAB80C515A specific +sfr at 0xB8 IEN1 ; /* interrupt enable register - SAB80515 specific */ +sfr at 0xB9 IP1 ; /* interrupt priority register as called by Siemens */ +sfr at 0xBA SRELH ; // Baudrategenerator Reload HIGH Value +sfr at 0xC0 IRCON ; /* interrupt control register - SAB80515 specific */ +sfr at 0xC1 CCEN ; /* compare/capture enable register */ +sfr at 0xC2 CCL1 ; /* compare/capture register 1, low byte */ +sfr at 0xC3 CCH1 ; /* compare/capture register 1, high byte */ +sfr at 0xC4 CCL2 ; /* compare/capture register 2, low byte */ +sfr at 0xC5 CCH2 ; /* compare/capture register 2, high byte */ +sfr at 0xC6 CCL3 ; /* compare/capture register 3, low byte */ +sfr at 0xC7 CCH3 ; /* compare/capture register 3, high byte */ +sfr at 0xC8 T2CON ; +sfr at 0xCA CRCL ; /* compare/reload/capture register, low byte */ +sfr at 0xCB CRCH ; /* compare/reload/capture register, high byte */ +sfr at 0xCC TL2 ; +sfr at 0xCD TH2 ; +sfr at 0xD0 PSW ; +//sfr at 0xD8 ADCON ; /* A/D-converter control register */ + +sfr at 0xD8 ADCON0 ; /* A/D-converter control register as called by Siemens */ +sfr at 0xD8 ADCON1 ; /* A/D-converter control register as called by Siemens */ +sfr at 0xD9 ADDATH ; /* A/D-converter data register High-Byte*/ +sfr at 0xDA ADDATL ; /* A/D-converter data register High-Byte*/ + +//sfr at 0xD8 DAPR ; /* D/A-converter program register */ +sfr at 0xE0 ACC ; +sfr at 0xE0 A ; +sfr at 0xE8 P4 ; /* Port 4 - SAB80515 specific */ +sfr at 0xF0 B ; +sfr at 0xF8 P5 ; /* Port 5 - SAB80515 specific */ + + +/* BIT addressable registers */ +/* P0 */ +sbit at 0x80 P0_0 ; +sbit at 0x81 P0_1 ; +sbit at 0x82 P0_2 ; +sbit at 0x83 P0_3 ; +sbit at 0x84 P0_4 ; +sbit at 0x85 P0_5 ; +sbit at 0x86 P0_6 ; +sbit at 0x87 P0_7 ; + +/* TCON */ +sbit at 0x88 IT0 ; +sbit at 0x89 IE0 ; +sbit at 0x8A IT1 ; +sbit at 0x8B IE1 ; +sbit at 0x8C TR0 ; +sbit at 0x8D TF0 ; +sbit at 0x8E TR1 ; +sbit at 0x8F TF1 ; + +/* P1 */ +sbit at 0x90 P1_0 ; +sbit at 0x91 P1_1 ; +sbit at 0x92 P1_2 ; +sbit at 0x93 P1_3 ; +sbit at 0x94 P1_4 ; +sbit at 0x95 P1_5 ; +sbit at 0x96 P1_6 ; +sbit at 0x97 P1_7 ; + +sbit at 0x90 INT3_CC0 ; /* P1 alternate functions - SAB80515 specific */ +sbit at 0x91 INT4_CC1 ; +sbit at 0x92 INT5_CC2 ; +sbit at 0x93 INT6_CC3 ; +sbit at 0x94 INT2 ; +sbit at 0x95 T2EX ; +sbit at 0x96 CLKOUT ; +sbit at 0x97 T2 ; + +/* SCON */ +sbit at 0x98 RI ; +sbit at 0x99 TI ; +sbit at 0x9A RB8 ; +sbit at 0x9B TB8 ; +sbit at 0x9C REN ; +sbit at 0x9D SM2 ; +sbit at 0x9E SM1 ; +sbit at 0x9F SM0 ; + +/* P2 */ +sbit at 0xA0 P2_0 ; +sbit at 0xA1 P2_1 ; +sbit at 0xA2 P2_2 ; +sbit at 0xA3 P2_3 ; +sbit at 0xA4 P2_4 ; +sbit at 0xA5 P2_5 ; +sbit at 0xA6 P2_6 ; +sbit at 0xA7 P2_7 ; + +/* IEN0 */ +sbit at 0xA8 EX0 ; +sbit at 0xA9 ET0 ; +sbit at 0xAA EX1 ; +sbit at 0xAB ET1 ; +sbit at 0xAC ES ; +sbit at 0xAD ET2 ; +sbit at 0xAE WDT ; /* watchdog timer reset - SAB80515 specific */ +sbit at 0xAF EA ; + +sbit at 0xAF EAL ; /* EA as called by Siemens */ + +/* P3 */ +sbit at 0xB0 P3_0 ; +sbit at 0xB1 P3_1 ; +sbit at 0xB2 P3_2 ; +sbit at 0xB3 P3_3 ; +sbit at 0xB4 P3_4 ; +sbit at 0xB5 P3_5 ; +sbit at 0xB6 P3_6 ; +sbit at 0xB7 P3_7 ; + +sbit at 0xB0 RXD ; +sbit at 0xB1 TXD ; +sbit at 0xB2 INT0 ; +sbit at 0xB3 INT1 ; +sbit at 0xB4 T0 ; +sbit at 0xB5 T1 ; +sbit at 0xB6 WR ; +sbit at 0xB7 RD ; + +// IEN1 von MS geprueft +sbit at 0xB8 EADC ; /* A/D converter interrupt enable */ +sbit at 0xB9 EX2 ; +sbit at 0xBA EX3 ; +sbit at 0xBB EX4 ; +sbit at 0xBC EX5 ; +sbit at 0xBD EX6 ; +sbit at 0xBE SWDT ; /* watchdog timer start/reset */ +sbit at 0xBF EXEN2 ; /* timer2 external reload interrupt enable */ + +// IRCON von MS geprueft +sbit at 0xC0 IADC ; /* A/D converter irq flag */ +sbit at 0xC1 IEX2 ; /* external interrupt edge detect flag */ +sbit at 0xC2 IEX3 ; +sbit at 0xC3 IEX4 ; +sbit at 0xC4 IEX5 ; +sbit at 0xC5 IEX6 ; +sbit at 0xC6 TF2 ; /* timer 2 owerflow flag */ +sbit at 0xC7 EXF2 ; /* timer2 reload flag */ + +/* T2CON */ +sbit at 0xC8 T2CON_0 ; +sbit at 0xC9 T2CON_1 ; +sbit at 0xCA T2CON_2 ; +sbit at 0xCB T2CON_3 ; +sbit at 0xCC T2CON_4 ; +sbit at 0xCD T2CON_5 ; +sbit at 0xCE T2CON_6 ; +sbit at 0xCF T2CON_7 ; + +sbit at 0xC8 T2I0 ; +sbit at 0xC9 T2I1 ; +sbit at 0xCA T2CM ; +sbit at 0xCB T2R0 ; +sbit at 0xCC T2R1 ; +sbit at 0xCD I2FR ; +sbit at 0xCE I3FR ; +sbit at 0xCF T2PS ; + + +/* PSW */ +sbit at 0xD0 P ; +sbit at 0xD1 FL ; +sbit at 0xD2 OV ; +sbit at 0xD3 RS0 ; +sbit at 0xD4 RS1 ; +sbit at 0xD5 F0 ; +sbit at 0xD6 AC ; +sbit at 0xD7 CY ; + +sbit at 0xD1 F1 ; + +/* ADCON */ +sbit at 0xD8 MX0 ; +sbit at 0xD9 MX1 ; +sbit at 0xDA MX2 ; +sbit at 0xDB ADM ; +sbit at 0xDC BSY ; + +sbit at 0xDE CLK ; +sbit at 0xDF BD ; + +/* A */ +sbit at 0xA0 AREG_F0 ; +sbit at 0xA1 AREG_F1 ; +sbit at 0xA2 AREG_F2 ; +sbit at 0xA3 AREG_F3 ; +sbit at 0xA4 AREG_F4 ; +sbit at 0xA5 AREG_F5 ; +sbit at 0xA6 AREG_F6 ; +sbit at 0xA7 AREG_F7 ; + +/* P4 */ +sbit at 0xE8 P4_0 ; +sbit at 0xE9 P4_1 ; +sbit at 0xEA P4_2 ; +sbit at 0xEB P4_3 ; +sbit at 0xEC P4_4 ; +sbit at 0xED P4_5 ; +sbit at 0xEE P4_6 ; +sbit at 0xEF P4_7 ; + +/* B */ +sbit at 0xF0 BREG_F0 ; +sbit at 0xF1 BREG_F1 ; +sbit at 0xF2 BREG_F2 ; +sbit at 0xF3 BREG_F3 ; +sbit at 0xF4 BREG_F4 ; +sbit at 0xF5 BREG_F5 ; +sbit at 0xF6 BREG_F6 ; +sbit at 0xF7 BREG_F7 ; + +/* P5 */ +sbit at 0xF8 P5_0 ; +sbit at 0xF9 P5_1 ; +sbit at 0xFA P5_2 ; +sbit at 0xFB P5_3 ; +sbit at 0xFC P5_4 ; +sbit at 0xFD P5_5 ; +sbit at 0xFE P5_6 ; +sbit at 0xFF P5_7 ; + +/* BIT definitions for bits that are not directly accessible */ +/* PCON bits */ +#define IDL 0x01 +#define PD 0x02 +#define GF0 0x04 +#define GF1 0x08 +#define SMOD 0x80 + +#define IDL_ 0x01 +#define PD_ 0x02 +#define GF0_ 0x04 +#define GF1_ 0x08 +#define SMOD_ 0x80 + +/* TMOD bits */ +#define M0_0 0x01 +#define M1_0 0x02 +#define C_T0 0x04 +#define GATE0 0x08 +#define M0_1 0x10 +#define M1_1 0x20 +#define C_T1 0x40 +#define GATE1 0x80 + +#define M0_0_ 0x01 +#define M1_0_ 0x02 +#define C_T0_ 0x04 +#define GATE0_ 0x08 +#define M0_1_ 0x10 +#define M1_1_ 0x20 +#define C_T1_ 0x40 +#define GATE1_ 0x80 + +#define T0_M0 0x01 +#define T0_M1 0x02 +#define T0_CT 0x04 +#define T0_GATE 0x08 +#define T1_M0 0x10 +#define T1_M1 0x20 +#define T1_CT 0x40 +#define T1_GATE 0x80 + +#define T0_M0_ 0x01 +#define T0_M1_ 0x02 +#define T0_CT_ 0x04 +#define T0_GATE_ 0x08 +#define T1_M0_ 0x10 +#define T1_M1_ 0x20 +#define T1_CT_ 0x40 +#define T1_GATE_ 0x80 + +#define T0_MASK 0x0F +#define T1_MASK 0xF0 + +#define T0_MASK_ 0x0F +#define T1_MASK_ 0xF0 + +/* T2MOD bits */ +#define DCEN 0x01 +#define T2OE 0x02 + +#define DCEN_ 0x01 +#define T2OE_ 0x02 + +/* WMCON bits */ +#define WMCON_WDTEN 0x01 +#define WMCON_WDTRST 0x02 +#define WMCON_DPS 0x04 +#define WMCON_EEMEN 0x08 +#define WMCON_EEMWE 0x10 +#define WMCON_PS0 0x20 +#define WMCON_PS1 0x40 +#define WMCON_PS2 0x80 + +/* SPCR-SPI bits */ +#define SPCR_SPR0 0x01 +#define SPCR_SPR1 0x02 +#define SPCR_CPHA 0x04 +#define SPCR_CPOL 0x08 +#define SPCR_MSTR 0x10 +#define SPCR_DORD 0x20 +#define SPCR_SPE 0x40 +#define SPCR_SPIE 0x80 + +/* SPSR-SPI bits */ +#define SPSR_WCOL 0x40 +#define SPSR_SPIF 0x80 + +/* SPDR-SPI bits */ +#define SPDR_SPD0 0x10 +#define SPDR_SPD1 0x20 +#define SPDR_SPD2 0x40 +#define SPDR_SPD3 0x80 +#define SPDR_SPD4 0x10 +#define SPDR_SPD5 0x20 +#define SPDR_SPD6 0x40 +#define SPDR_SPD7 0x80 + +// SYSCON bits +#define XMAP0_BIT 0x01 +#define XMAP1_BIT 0x02 +#define RMAP_BIT 0x10 +#define EALE_BIT 0x20 + +// ADCON0 bits von MS geprueft +#define ADCON0_MX0 0x01 +#define ADCON0_MX1 0x02 +#define ADCON0_MX2 0x04 +#define ADCON0_ADM 0x08 +#define ADCON0_BSY 0x10 +#define ADCON0_ADEX 0x20 +#define ADCON0_CLK 0x40 +#define ADCON0_BD 0x80 + +// ADCON1 bits von MS geprueft +#define ADCON1_MX0 0x01 +#define ADCON1_MX1 0x02 +#define ADCON1_MX2 0x04 +#define ADCON1_ADCL 0x80 + +/* Interrupt numbers: address = (number * 8) + 3 */ +#define IE0_VECTOR 0 /* 0x03 external interrupt 0 */ +#define TF0_VECTOR 1 /* 0x0b timer 0 */ +#define IE1_VECTOR 2 /* 0x13 external interrupt 1 */ +#define TF1_VECTOR 3 /* 0x1b timer 1 */ +#define SI0_VECTOR 4 /* 0x23 serial port 0 */ +#define TF2_VECTOR 5 /* 0x2B timer 2 */ +#define EX2_VECTOR 5 /* 0x2B external interrupt 2 */ + +#define IADC_VECTOR 8 /* 0x43 A/D converter interrupt */ +#define IEX2_VECTOR 9 /* 0x4B external interrupt 2 */ +#define IEX3_VECTOR 10 /* 0x53 external interrupt 3 */ +#define IEX4_VECTOR 11 /* 0x5B external interrupt 4 */ +#define IEX5_VECTOR 12 /* 0x63 external interrupt 5 */ +#define IEX6_VECTOR 13 /* 0x6B external interrupt 6 */ + +#endif + diff --git a/device/examples/startupcode/inc/cpu_c515a.h b/device/examples/startupcode/inc/cpu_c515a.h new file mode 100644 index 0000000..4607e19 --- /dev/null +++ b/device/examples/startupcode/inc/cpu_c515a.h @@ -0,0 +1,56 @@ +/*------------------------------------------------------------------------- + CPU depending Declarations Header file + + Written By - Dipl.-Ing. (FH) Michael Schmitt + Bug-Fix Oct 15 1999 + mschmitt@mainz-online.de + michael.schmitt@t-online.de + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef __FILE_CPU_C515A +#define __FILE_CPU_C515A + +extern void CpuIdle( void ); +void WatchDog( void ); + +#ifdef SERIAL_VIA_INTERRUPT +// Funktion nur wenn Interrupt Mode +extern void SERIALVIAINTERRUPT (void) interrupt SI0_VECTOR; +#endif + +extern void putchar( char Byte ); +extern char getchar( void ); +extern unsigned char keypressed( void ); + +#ifdef USE_SYSTEM_TIMER +extern void DelayMsec( unsigned long delayTime ); +extern void timer0_isr (void) interrupt TF0_VECTOR; +#endif + +#ifdef USE_ANALOGPORT +extern unsigned int ADCGetValue( char ADCPort ); +#endif + +extern void InitHardware( void ); + +extern volatile unsigned long SystemTicks1msec; + +#endif diff --git a/device/examples/startupcode/inc/hardware_description.h b/device/examples/startupcode/inc/hardware_description.h new file mode 100644 index 0000000..af89fb8 --- /dev/null +++ b/device/examples/startupcode/inc/hardware_description.h @@ -0,0 +1,65 @@ +// INCLUDES & DEFINES =============================================== +// here are some definition about the CPU type + +#ifndef __FILE_HARDWARE_DESCRIBTION_H +#define __FILE_HARDWARE_DESCRIBTION_H + +#define CPUTYPE C515A + +#include "..\inc\c515a.h" // Definitions of registers, SFRs and Bits +#include +#include +#include +#include +#include +#include +#include +#include + +// First some useful definitions +#define FALSE 0 +#define TRUE !FALSE + +// here is a definition of a single nop command as it has to be declared under keil-C and sdcc +#ifdef SDCC +#define NOP _asm nop _endasm +//#define UBYTE unsigned char +//#define UINT unsigned int +//#define BOOL unsigned char +#else +// This is for Keil-C +#define NOP _nop_() +#endif + +// now we specify at what crystal speed the cpu runs (unit is Hz !!) +//#define CPUCLKHZ 11059200 +#define CPUCLKHZ 24000000 + +// We use the internal UART, so we have to set the desired BAUDRATE +//#define BAUDRATE 9600 +//#define BAUDRATE 19200 +#define BAUDRATE 57600 + +// For serial com. we use the internal UART and data exchange is done by interrupt and not via polling +#define SERIAL_VIA_INTERRUPT +// Achtung maximal 127Bytes ! Puffer +#define SERIAL_VIA_INTERRUPT_XBUFLEN 100 +#define SERIAL_VIA_INTERRUPT_RBUFLEN 100 +// disable the above three lines and enable the next one if polling method is used +//#define SERIAL_VIA_POLLING + +// The Siemens CPU C515A has a build in Baudrategenerator, therefore we use it instead +// of timer 1 this gives a better resolution +#define BAUDRATEGENENATOR_USED + +// to measure time and delays we include a 1msec timer +#define USE_SYSTEM_TIMER + +// CPU-Ports + +#define CPUIDLE P3_3 +#define EXTWATCHDOG P3_5 + +#include "..\inc\cpu_c515a.h" + +#endif \ No newline at end of file diff --git a/device/examples/startupcode/inc/startup_code.h b/device/examples/startupcode/inc/startup_code.h new file mode 100644 index 0000000..a1955a0 --- /dev/null +++ b/device/examples/startupcode/inc/startup_code.h @@ -0,0 +1,12 @@ +// INCLUDES & DEFINES =============================================== +// here are some definition about the CPU type + +#ifndef __FILE_WSI_128KFLASH_H +#define __FILE_WSI_128KFLASH_H + +#include "..\inc\hardware_description.h" + +// place all 8051-CPU depending tools ISR and functions here + +//include "..\inc\another_header.h" +#endif \ No newline at end of file diff --git a/device/examples/startupcode/src/cpu_c515a.c b/device/examples/startupcode/src/cpu_c515a.c new file mode 100644 index 0000000..542f61b --- /dev/null +++ b/device/examples/startupcode/src/cpu_c515a.c @@ -0,0 +1,589 @@ +/********************************************************************/ +/* Function : Siemens CPU C515A-L24M dependinge Functions FILE */ +/*------------------------------------------------------------------*/ +/* Description : All CPU dependig functions like UART fe. are */ +/* are initialized here */ +/*------------------------------------------------------------------*/ +/* Author : Michael Schmitt */ +/*------------------------------------------------------------------*/ +/* Input : none */ +/*------------------------------------------------------------------*/ +/* Returnvalue : none */ +/*------------------------------------------------------------------*/ +/* History : 00/03 V1.0 Initial Version */ +/* */ +/********************************************************************/ +#ifndef __FILE_CPU_C515A +#define __FILE_CPU_C515A + +// All that has to be included and / or defined is done here + +#include "../inc/hardware_description.h" + +// END INCLUDES & DEFINES =========================================== + +/********************************************************************/ +/* Function : CpuIdle() SUB */ +/*------------------------------------------------------------------*/ +/* Description : If no CPU Power is need, we put into idle mode */ +/*------------------------------------------------------------------*/ +/* Author : Michael Schmitt */ +/*------------------------------------------------------------------*/ +/* Input : none */ +/*------------------------------------------------------------------*/ +/* Returnvalue : none */ +/*------------------------------------------------------------------*/ +/* History : 00/03 V1.0 Initial Version */ +/* */ +/********************************************************************/ + +void CpuIdle() +{ + // The Siemens Manual says, that we have to wait until the AD-Conversion + // is completed before we put the cpu into idle mode + + // wait until AD-Conversion is finished + while( BSY ) + { + // + } + + + CPUIDLE = 1; +#ifdef USE_SYSTEM_TIMER + PCON |= 0x01; // IDL-Bit in register PCON starts IDLE Mode + PCON |= 0x20; // +#else + // If there is no regular INT source, we better do not use + // the IDLE Mode + NOP; +#endif + CPUIDLE = 0; +} + +/********************************************************************/ +/* Function : WatchDog() SUB */ +/*------------------------------------------------------------------*/ +/* Description : Internal (and external) Watchdogs trigger */ +/*------------------------------------------------------------------*/ +/* Author : Michael Schmitt */ +/*------------------------------------------------------------------*/ +/* Input : none */ +/*------------------------------------------------------------------*/ +/* Returnvalue : none */ +/*------------------------------------------------------------------*/ +/* History : 00/03 V1.0 Initial Version */ +/* */ +/********************************************************************/ + +void WatchDog( void ) +{ + //NOP; + // retrigger Externer Watchdog + // Interner Watchdog not yet implemented +} + + +// =========================================================================== +// Serial IO with the internal UART in Interrupt Mode +#ifdef SERIAL_VIA_INTERRUPT + +#define SERIAL_IS_DEFINED + +// Transmit Buffersize +#ifndef SERIAL_VIA_INTERRUPT_XBUFLEN +#error "SERIAL_VIA_INTERRUPT_XBUFLEN not defined using default size 8" +#define SERIAL_VIA_INTERRUPT_XBUFLEN 8 +#endif + +// Receive Buffersize +#ifndef SERIAL_VIA_INTERRUPT_RBUFLEN +#error "SERIAL_VIA_INTERRUPT_RBUFLEN not defined using default size 8" +#define SERIAL_VIA_INTERRUPT_RBUFLEN 8 +#endif + +// in interrupt mode the ing buffer is placed in XDATA memory +volatile xdata static unsigned char SERIAL_VIA_INTERRUPT_RBUF[SERIAL_VIA_INTERRUPT_RBUFLEN]; +volatile xdata static unsigned char SERIAL_VIA_INTERRUPT_XBUF[SERIAL_VIA_INTERRUPT_XBUFLEN]; +volatile xdata static unsigned char SERIAL_VIA_INTERRUPT_RCNT; +volatile xdata static unsigned char SERIAL_VIA_INTERRUPT_XCNT; +volatile xdata static unsigned char SERIAL_VIA_INTERRUPT_RPOS; +volatile xdata static unsigned char SERIAL_VIA_INTERRUPT_XPOS; +volatile xdata static unsigned char SERIAL_VIA_INTERRUPT_BUSY; + +#endif // SERIAL_VIA_INTERRUPT + +// =========================================================================== +// Serial IO with them internal UART in Polling Mode +#ifdef SERIAL_VIA_POLLING +#define SERIAL_IS_DEFINED +#endif // SERIAL_VIA_POLLING + +#ifdef SERIAL_IS_DEFINED +// calculate the reloadvalues acc. to the definitions +#ifndef CPUCLKHZ +#error "CPUCLKHZ not defined !" +#endif +#ifndef BAUDRATE +#error "BAUDRATE not defined !" +#endif +// The Siemens CPU C515A has a build in Baudrategenerator, therefore we use it instead +// of timer 1 this gives a better resolution + +#define BAUDRATEGENRELOADVALUE (1024-(2*CPUCLKHZ/64/BAUDRATE)) +#define TIMER1MODE2RELOADVALUE (256-(2*CPUCLKHZ/32/12/BAUDRATE)) + +#endif // SERIAL_IS_DEFINED + +// =========================================================================== +// now to the serial functions +#ifdef SERIAL_VIA_INTERRUPT +/********************************************************************/ +/* Function : SERIAL_VIA_INTERRUPT() ISR */ +/*------------------------------------------------------------------*/ +/* Description : If a serial INT occours, the sub function is called*/ +/* if a char is not yet transmitted, it is stored in */ +/* the uart and transmitted, if a char has been */ +/* received, it will be placed in the rx-buffer +/*------------------------------------------------------------------*/ +/* Author : Michael Schmitt */ +/*------------------------------------------------------------------*/ +/* Input : none */ +/*------------------------------------------------------------------*/ +/* Returnvalue : none */ +/*------------------------------------------------------------------*/ +/* History : 00/03 V1.0 Initial Version */ +/* */ +/********************************************************************/ +void SERIALVIAINTERRUPT (void) interrupt SI0_VECTOR +{ + if (RI) + { + RI = 0; + // char that are already inside the buffer should not be overwritten + if (SERIAL_VIA_INTERRUPT_RCNT < SERIAL_VIA_INTERRUPT_RBUFLEN) + { + SERIAL_VIA_INTERRUPT_RBUF [(SERIAL_VIA_INTERRUPT_RPOS+SERIAL_VIA_INTERRUPT_RCNT++) % SERIAL_VIA_INTERRUPT_RBUFLEN] = SBUF; + } + } + if (TI) + { + TI = 0; + if (SERIAL_VIA_INTERRUPT_BUSY = SERIAL_VIA_INTERRUPT_XCNT) + { /* Assignment, _not_ comparison! */ + SERIAL_VIA_INTERRUPT_XCNT--; + SBUF = SERIAL_VIA_INTERRUPT_XBUF [SERIAL_VIA_INTERRUPT_XPOS++]; + if (SERIAL_VIA_INTERRUPT_XPOS >= SERIAL_VIA_INTERRUPT_XBUFLEN) + { + SERIAL_VIA_INTERRUPT_XPOS = 0; + } + } + } +} + +/********************************************************************/ +/* Function : putchar() SUB */ +/*------------------------------------------------------------------*/ +/* Description : everybody knows what this function is doing */ +/*------------------------------------------------------------------*/ +/* Author : Michael Schmitt */ +/*------------------------------------------------------------------*/ +/* Input : char Byte */ +/*------------------------------------------------------------------*/ +/* Returnvalue : none */ +/*------------------------------------------------------------------*/ +/* History : 00/03 V1.0 Initial Version */ +/* */ +/********************************************************************/ +void putchar( char Byte ) +{ + while (SERIAL_VIA_INTERRUPT_XCNT >= SERIAL_VIA_INTERRUPT_XBUFLEN) + { + // buffer is full, wait until room + WatchDog(); + CpuIdle(); + } + ES = 0; + + if (SERIAL_VIA_INTERRUPT_BUSY) + { + SERIAL_VIA_INTERRUPT_XBUF[(SERIAL_VIA_INTERRUPT_XPOS+SERIAL_VIA_INTERRUPT_XCNT++) % SERIAL_VIA_INTERRUPT_XBUFLEN] = Byte; + } + else + { + SBUF = Byte; + SERIAL_VIA_INTERRUPT_BUSY = 1; + } + ES = 1; +} + +/********************************************************************/ +/* Function : getchar() SUB */ +/*------------------------------------------------------------------*/ +/* Description : everybody knows what this function is doing */ +/*------------------------------------------------------------------*/ +/* Author : Michael Schmitt */ +/*------------------------------------------------------------------*/ +/* Input : none */ +/*------------------------------------------------------------------*/ +/* Returnvalue : char Byte */ +/*------------------------------------------------------------------*/ +/* History : 00/03 V1.0 Initial Version */ +/* */ +/********************************************************************/ +char getchar( void ) +{ + unsigned char c; + while (!SERIAL_VIA_INTERRUPT_RCNT) + { + // no char avail, so wait + WatchDog(); + CpuIdle(); + } + ES = 0; + SERIAL_VIA_INTERRUPT_RCNT--; + c = SERIAL_VIA_INTERRUPT_RBUF [SERIAL_VIA_INTERRUPT_RPOS++]; + if (SERIAL_VIA_INTERRUPT_RPOS >= SERIAL_VIA_INTERRUPT_RBUFLEN) + { + SERIAL_VIA_INTERRUPT_RPOS = 0; + + } + ES = 1; + return (c); +} + +/********************************************************************/ +/* Function : keypressed() SUB */ +/*------------------------------------------------------------------*/ +/* Description : checks, if a char is available */ +/*------------------------------------------------------------------*/ +/* Author : Michael Schmitt */ +/*------------------------------------------------------------------*/ +/* Input : none */ +/*------------------------------------------------------------------*/ +/* Returnvalue : TRUE yes, FALSE no */ +/*------------------------------------------------------------------*/ +/* History : 00/03 V1.0 Initial Version */ +/* */ +/********************************************************************/ +char keypressed( void ) +{ + unsigned char c; + + if(SERIAL_VIA_INTERRUPT_RCNT) + { + c = TRUE; + } + else + { + c = FALSE; + } + return (c); +} + +#endif + +// =========================================================================== +// Now the Internal UART Handling if Polling Method is used +#ifdef SERIAL_VIA_POLLING +/********************************************************************/ +/* Function : putchar() SUB */ +/*------------------------------------------------------------------*/ +/* Description : everybody knows what this function is doing */ +/*------------------------------------------------------------------*/ +/* Author : Michael Schmitt */ +/*------------------------------------------------------------------*/ +/* Input : char Byte */ +/*------------------------------------------------------------------*/ +/* Returnvalue : none */ +/*------------------------------------------------------------------*/ +/* History : 00/03 V1.0 Initial Version */ +/* */ +/********************************************************************/ +void putchar( char Byte ) +{ + while( !TI ) /* wait for TI==1 */ + { + WatchDog(); + CpuIdle(); + } + SBUF = Byte; + TI = 0; +} + +/********************************************************************/ +/* Function : getchar() SUB */ +/*------------------------------------------------------------------*/ +/* Description : everybody knows what this function is doing */ +/*------------------------------------------------------------------*/ +/* Author : Michael Schmitt */ +/*------------------------------------------------------------------*/ +/* Input : none */ +/*------------------------------------------------------------------*/ +/* Returnvalue : char Byte */ +/*------------------------------------------------------------------*/ +/* History : 00/03 V1.0 Initial Version */ +/* */ +/********************************************************************/ +char getchar( void ) +{ + while( !RI ) /* wait for RI==1 */ + { + WatchDog(); + CpuIdle(); + } + RI=0; + return (SBUF); +} + +/********************************************************************/ +/* Function : keypressed() SUB */ +/*------------------------------------------------------------------*/ +/* Description : is a char available ? */ +/*------------------------------------------------------------------*/ +/* Author : Michael Schmitt */ +/*------------------------------------------------------------------*/ +/* Input : none */ +/*------------------------------------------------------------------*/ +/* Returnvalue : TRUE yes, FALSE no */ +/*------------------------------------------------------------------*/ +/* History : 00/03 V1.0 Initial Version */ +/* */ +/********************************************************************/ +char keypressed( void ) +{ + unsigned char c; + + if(RI) + { + c = TRUE; + } + else + { + c = FALSE; + } + return (c); +} + +#endif + +// =========================================================================== +// System Timer +#ifdef USE_SYSTEM_TIMER + +volatile unsigned long SystemTicks1msec; + +// Here are the definitions of the 1kHz Timer 0 +// used for delay( xx_msec ) +#ifndef CPUCLKHZ +#error "CPUCLKHZ is not defined !" +#endif + +#define TIMER0INTSPERSECOND 1000 +#define TIMER0MODE1RELOADVALUE (-((CPUCLKHZ/TIMER0INTSPERSECOND)/12)) + +/********************************************************************/ +/* Function : delayMsec() SUB */ +/*------------------------------------------------------------------*/ +/* Description : waste some CPU-Time, CPU will be set into IDLE Mode*/ +/* and is waked up every 1msec by TIMER0 */ +/*------------------------------------------------------------------*/ +/* Author : Michael Schmitt */ +/*------------------------------------------------------------------*/ +/* Input : unsigned long delayTime */ +/*------------------------------------------------------------------*/ +/* Returnvalue : none */ +/*------------------------------------------------------------------*/ +/* History : 99/10 V1.0 Initial Version */ +/* */ +/********************************************************************/ +void DelayMsec( unsigned long delayTime ) +{ + delayTime += SystemTicks1msec; + WatchDog(); + while( SystemTicks1msec < delayTime ) + { + CpuIdle(); + WatchDog(); + } + WatchDog(); +} + +/********************************************************************/ +/* Function : timer0_isr ISR */ +/*------------------------------------------------------------------*/ +/* Description : This ISR is called every 1msec and inc. a variable */ +/* that is used for delay() */ +/*------------------------------------------------------------------*/ +/* Author : Michael Schmitt */ +/*------------------------------------------------------------------*/ +/* Input : none */ +/*------------------------------------------------------------------*/ +/* Returnvalue : none */ +/*------------------------------------------------------------------*/ +/* History : 99/10 V1.0 Initial Version */ +/* */ +/********************************************************************/ +void timer0_isr (void) interrupt TF0_VECTOR +{ + /* Interruptrate will be slightly slower than wanted */ + /* because TL0 is not 0 here, not bug-fix yet */ + TL0 = (TIMER0MODE1RELOADVALUE & 0x00FF); + TH0 = (TIMER0MODE1RELOADVALUE >> 8); + SystemTicks1msec++; +} +#endif // USE_SYSTEM_TIMER + +// =========================================================================== +// Analog Stuff +#ifdef USE_ANALOGPORT + +unsigned int ADCGetValue( char ADCPort ) +{ + // if a conversion is busy, wait + while( BSY ) + { + // + } + WatchDog(); + + // set AD-Port + ADCON1 &= 0xF8; // clear MX0 to MX2 + ADCON1 |= (ADCPort & 0x07); // set Port + + // start AD Conversion + ADDATL = 0x00; + + while( BSY ) + { + // + } + WatchDog(); + + // read AD Converter Register + return( (((unsigned int)ADDATH) << 2) + ((unsigned int)ADDATL >> 6) ); +} +#endif + +// =========================================================================== + +// =================================================================== +// Global Hardware Init +/********************************************************************/ +/* Function : InitHardware() SUB */ +/*------------------------------------------------------------------*/ +/* Description : Should be the first executed after reset to get a */ +/* proper initalised CPU */ +/*------------------------------------------------------------------*/ +/* Author : Michael Schmitt */ +/*------------------------------------------------------------------*/ +/* Input : none */ +/*------------------------------------------------------------------*/ +/* Returnvalue : none */ +/*------------------------------------------------------------------*/ +/* History : 99/10 V1.0 Initial Version */ +/* */ +/********************************************************************/ +void InitHardware( void ) +{ +#ifdef USE_SYSTEM_TIMER + SystemTicks1msec = 0x0; +#endif // USE_SYSTEM_TIMER + + EA = 0; // Disable ALL Ints + ES = 0; // Disable Serial Int + ET1 = 0; // Disable Timer 1 Int + EX1 = 0; // Disable External Interrupt 1 + ET0 = 0; // Disable Timer 0 Int + EX0 = 0; // Disable External Interrupt 0 + EADC = 0; // Disable A/D Converter Interrupt + + TR1 = 0; // Stop Timer 1 + TR0 = 0; // Stop Timer 0 + + // The Siemens CPU C515A has 8 Analog inputs with 10Bit resolution + // Conversion Clock is generated from CPU-Clock but should be less + // than max 2MHZ. + if( CPUCLKHZ < 16000000 ) + { + // CPU Speed < 16MHz Prescaler Ratio is divide by 4 (Reset default) + ADCON1 &= ~ADCON1_ADCL; + // the automatic A/D Converter Calibration needs + // Reset Calibration phase = 26624 / CPUCLKHZ + // @ 16MHz this is about 1,7msec + // or 2219 machine cycle + } + else + { + // CPU Speed > 16MHz Prescaler Ratio is divide by 4 (Reset default) + ADCON1 |= ADCON1_ADCL; + // the automatic A/D Converter Calibration needs + // Reset Calibration phase = 53248 / CPUCLKHZ + // @ 246MHz this is about 2,3msec + // or 4438 machine cycle + } + + + // AD-Conversion stars intern and not with P40 ADST# + ADCON0 &= ~ADCON0_ADM; + +#ifdef USE_SYSTEM_TIMER + // Init Timer 0 as Software Interrupt for 1mSec Timer + TL0 = (TIMER0MODE1RELOADVALUE & 0x00FF); + TH0 = (TIMER0MODE1RELOADVALUE >> 8); + TMOD &= 0xf0; + TMOD |= 0x01; // Setting Timer 0 als GATE=0 TIMER und MODE 1 16-bit Timer mode + TR0 = 1; // Enabling Timer 0 + TR0 = 1; // Start Timer 0 + ET0 = 1; // Enable Timer 0 Interrupt +#endif + +#ifdef SERIAL_VIA_INTERRUPT + // Ringbuffer for Serielle UART init + SERIAL_VIA_INTERRUPT_RCNT = 0; + SERIAL_VIA_INTERRUPT_XCNT = 0; + SERIAL_VIA_INTERRUPT_RPOS = 0; + SERIAL_VIA_INTERRUPT_XPOS = 0; + SERIAL_VIA_INTERRUPT_BUSY = 0; +#endif + +#ifdef SERIAL_IS_DEFINED +#ifdef BAUDRATEGENENATOR_USED + + // We use the internal Bauratengenerator of the Siemens CPU + SRELL = (BAUDRATEGENRELOADVALUE & 0x00FF); + SRELH = (BAUDRATEGENRELOADVALUE >> 8); + ADCON0 |= 0x80; // set BD-Bit, we use internal Baudrate gen. + PCON |= 0x80; // SMOD-Bit forr double Baudrate + +#else + + // use TIMER1 im Mode 2 + PCON |= 0x80; // set SMOD-Bit for double Baudrate + TH1 = TIMER1MODE2RELOADVALUE; + TL1 = TIMER1MODE2RELOADVALUE; + TMOD &= 0x0f; + TMOD |= 0x20; // Timer 1 als GATE=0 TIMER und MODE 2 8-bit auto reload + TR1 = 1; // Enabling Timer 1 + +#endif + + SCON = 0x40; // Init Serial Port as 8-Bit UART + SCON |= 0x10; // Enabling Seriel receive REN-Bit + SCON |= 0x02; // Setting TI-Bit + +#ifdef SERIAL_VIA_INTERRUPT + ES = 1; // Enable Serial Interrupt +#endif + +#endif + +#ifdef USE_CPU_Internal_XRAM + // CPU Internal SRAM einable + SYSCON = ((SYSCON) & ((UBYTE)~(XMAP0_BIT | XMAP1_BIT))); +#endif + + EA = 1; // Enable all Enabled Interrupts +} + +#endif diff --git a/device/examples/startupcode/src/makefile b/device/examples/startupcode/src/makefile new file mode 100644 index 0000000..abe827f --- /dev/null +++ b/device/examples/startupcode/src/makefile @@ -0,0 +1,45 @@ +# Makefile for startup-code + +SDCC = sdcc +AS = asx8051 +CP = cp +RM = rm -f + +CFLAGS = --debug --stack-after-data --model-large +LDFLAGS = --debug --stack-after-data + +COBJECTS = startup_code.rel \ + cpu_c515a.rel + +CSOURCES = $(patsubst %.rel,%.c,$(COBJECTS)) + +.SUFFIXES: .rel + +.c.rel: + $(SDCC) $(CFLAGS) -c $< + +all: startup + $(SDCC) $(LDFLAGS) $(COBJECTS) + +c: $(COBJECTS) + +startup: $(COBJECTS) + +clean: + $(RM) *.lst + $(RM) *.asm + $(RM) *.bak + $(RM) *.rst + $(RM) *.sym + $(RM) *.hex + $(RM) *.map + +-include makefile.dep + +dep: makefile.dep + +makefile.dep: $(CSOURCES) + rm -f makefile.dep + for csrc in $(CSOURCES) ;do\ + $(SDCC) -MM $$csrc >>makefile.dep ;\ + done diff --git a/device/examples/startupcode/src/makefile.dep b/device/examples/startupcode/src/makefile.dep new file mode 100644 index 0000000..3d934f6 --- /dev/null +++ b/device/examples/startupcode/src/makefile.dep @@ -0,0 +1,13 @@ +startup_code.rel: startup_code.c ../inc/startup_code.h \ + ../inc/..\inc\hardware_description.h ../inc/..\inc\c515a.h \ + /usr/local/share/include/stdarg.h /usr/local/share/include/stdio.h \ + /usr/local/share/include/stdlib.h /usr/local/share/include/string.h \ + /usr/local/share/include/ctype.h /usr/local/share/include/assert.h \ + /usr/local/share/include/limits.h /usr/local/share/include/malloc.h \ + ../inc/..\inc\cpu_c515a.h +cpu_c515a.rel: cpu_c515a.c ../inc/hardware_description.h \ + ../inc/..\inc\c515a.h /usr/local/share/include/stdarg.h \ + /usr/local/share/include/stdio.h /usr/local/share/include/stdlib.h \ + /usr/local/share/include/string.h /usr/local/share/include/ctype.h \ + /usr/local/share/include/assert.h /usr/local/share/include/limits.h \ + /usr/local/share/include/malloc.h ../inc/..\inc\cpu_c515a.h diff --git a/device/examples/startupcode/src/startup_code.c b/device/examples/startupcode/src/startup_code.c new file mode 100644 index 0000000..f071bc1 --- /dev/null +++ b/device/examples/startupcode/src/startup_code.c @@ -0,0 +1,21 @@ +// INCLUDES & DEFINES =============================================== + +#define __FILE_STARTUP_CODE_C +// All that has to be included and / or defined is done here + +#include "../inc/startup_code.h" + +// END INCLUDES & DEFINES =========================================== + +void main() +{ + // Init Hardware muss als erstes erfolgen + InitHardware(); + + printf( "\n\rSoftware vom : "); + printf( __DATE__ ); + printf(" "); + printf( __TIME__ ); + + while( 1 ); +} diff --git a/device/examples/test2.c b/device/examples/test2.c new file mode 100644 index 0000000..13c1980 --- /dev/null +++ b/device/examples/test2.c @@ -0,0 +1,910 @@ +/******************************************************************************/ +/* */ +/* 2HACES.C */ +/* */ +/******************************************************************************/ +void watchdog(); +unsigned char codigo(unsigned char, unsigned char, unsigned char, unsigned char); +void contestar(); +void inicializar_registros(); +void bajo_consumo(); +unsigned char recibir_trama(); +unsigned char contestar_si_error(); +void configurar_haz0(unsigned char, unsigned char); +void configurar_haz1(unsigned char, unsigned char); +void telec_actualizacion(); +void telec_conformacion(unsigned char); +void telec_temperatura(); +void telec_pet_Estado(); + +/* Fichero de definición de direcciones de memoria + asignadas a los diferentes registros */ +#include <8051.h> + +/* Direcciones de los puertos P4 y P5 y del TIMER3*/ +sfr P4 = 0xC0; +sfr P5 = 0xC4; +sfr TIMER3 = 0xFF; +sfr ADCON = 0xD8; +sfr ADAT = 0xD7; + +/* Dirección del bit que indica que hay una conversión A/D preparada */ +#define AD_FIN 0x10 + +/* + Valores que utilizamos para obtener el código de Hamming de los mensajes. + El mensaje es de 29 bits (4 bytes) y la redundancia la tomamos de 11 bits. + La matriz de Hamming asociada será por tanto de tamaño (11x29) bits. + En las matrices siguiente colocamos la expresión hexadecimal de cada + una de las columnas de la matriz de Hamming. La obtención de los bits de + redundancia asociados a un mensaje los obtendremos haciendo la operación XOR + entre las columnas de la matriz de Hamming correspondientes a los '1' de los 29 + bits del mensaje. Esto es más eficiente que realizar el producto matricial. + Como la memoria está organizada en bytes, utilizamos dos matrices. En una de ellas, + "Hamming_H", colocamos las tres primeras filas de la matriz de Hamming y en la otra, + "Hamming_L", las 8 filas restantes. +*/ + +#define Hamming_H0 0x0 +#define Hamming_H1 0x1 +#define Hamming_H2 0x2 +#define Hamming_H3 0x1 +#define Hamming_H4 0x6 +#define Hamming_H5 0x5 +#define Hamming_H6 0x2 +#define Hamming_H7 0x7 +#define Hamming_H8 0x8 +#define Hamming_H9 0x3 +#define Hamming_H10 0x9 +#define Hamming_H11 0x6 +#define Hamming_H12 0x2 +#define Hamming_H13 0x9 +#define Hamming_H14 0x4 +#define Hamming_H15 0x4 +#define Hamming_H16 0x3 +#define Hamming_H17 0x8 +#define Hamming_H18 0x7 +#define Hamming_H19 0x6 +#define Hamming_H20 0x0 +#define Hamming_H21 0x8 +#define Hamming_H22 0x7 +#define Hamming_H23 0x6 +#define Hamming_H24 0x9 +#define Hamming_H25 0x2 +#define Hamming_H26 0x3 +#define Hamming_H27 0x7 +#define Hamming_H28 0x3 +#define Hamming_H29 0x3 +#define Hamming_H30 0x3 +#define Hamming_H31 0x3 + + +/* Dirección del bit que inicia la conversión A/D */ +#define AD_INI 0x08 + + +/* Valores booleanos */ +#define TRUE 0x01 +#define FALSE 0x00 + + +/* Máscaras utilizadas para identificar los telecomandos */ +#define CONFORMACION 0xC0 + /* Telecomando que procesan todos los Subarrays. Se cambia el apuntamiento de la antena */ + +#define ACTUALIZACION 0x80 + /* Telecomando en el que se envía a un Subarray el próximo estado de uno de los haces */ + +#define TEMPERATURA 0x00 + /* Telecomando en el que se solicita a un Subarray la temperatura del módulo T/R */ + +#define PETICION_ESTADO 0x40 + /* Telecomando en el que se solicita a un Subarray el estado de programación de un haz */ + + +/* Valores booleanos utilizados en las rutinas de recepción de tramas */ +#define TIEMPO_EXCEDIDO 0x01 +#define TIEMPO_NO_EXCEDIDO 0x00 + + +/* Asociamos etiquetas a los identificadores que utiliza el + compilador para designar algunos registros del micro */ +#define ACUMULADOR ACC +#define BUFFER_SERIE SBUF +#define DATO_RECIBIDO RI +#define DATO_ENVIADO TI +#define PARIDAD_ACC P +#define BIT_PARIDAD_REC RB8 +#define BIT_PARIDAD_TRA TB8 + + +/* Sustituimos por etiquetas algunas operaciones sencillas */ +#define obtener_direc_mensaje (BYTE[0] & 0x3F) +#define direccion_CONFORMACION (BYTE[1] & 0x3F) +#define obtener_tipo_mensaje (BYTE[0] & 0xC0) +#define direc_subarray ((P5 & 0x7E) >> 1) + + +/* DECLARACION DE VARIABLES */ +volatile unsigned char int_serie; +unsigned char BYTE[5]; +unsigned char BYTE_MENSAJE[3]; +volatile unsigned char ERROR_PARIDAD; + + +/* + Matriz que utilizamos para almacenar los estados predefinidos. + En las posiciones pares (0,2,4,...) están los códigos de amplitud y en las + impares (1,3,5,...) los de fase. +*/ +unsigned char tabla_estados[20]; + + +/* + Matriz en la que almacenamos los índices a la tabla de estados correspondientes a la programación + actual de los dos haces. Los índices tienen 11 bits de longitud. El contenido de la matriz es + + estado_haces[0] --> haz 0, i10...i3 + estado_haces[1] --> haz 0, i2...i0 + estado_haces[2] --> haz 1, i10...i3 + estado_haces[3] --> haz 1, i2...i0 +*/ +unsigned char estado_haces[4]; + + +/* + Función principal +*/ +void main() +{ + unsigned char direc_mensaje; + unsigned char TIMEOUT; + unsigned char mensaje; + unsigned char ERROR; + unsigned char DIRECCION_SUBARRAY; + + inicializar_registros(); + + /* Obtenemos la dirección del subarray */ + DIRECCION_SUBARRAY = direc_subarray; + + /* bucle del programa */ + while(1) + { + /* Bandera que utilizamos para determinar si la interrupción + que se produce se ha originado en el puerto serie */ + int_serie = 0; + + /* El micro entra en modo de bajo consumo mientras no se + produzca actividad en el puerto serie */ + while(int_serie == 0) + bajo_consumo(); + + /* Se ha detectado actividad en el bus de telecomandos. Capturamos la trama */ + TIMEOUT = recibir_trama(); + + /* Si no se ha excedido el tiempo límite se procede a identificar el mensaje recibido */ + if (TIMEOUT == FALSE) + { + mensaje = obtener_tipo_mensaje; + direc_mensaje = obtener_direc_mensaje; + + if (direc_mensaje == DIRECCION_SUBARRAY) + ERROR = contestar_si_error(); + + /* Si no ha habido error en la recepción se procesa el telecomando */ + if (ERROR == FALSE) + { + switch(mensaje) + { + case CONFORMACION : telec_conformacion(DIRECCION_SUBARRAY); + + break; + + case ACTUALIZACION : if (direc_mensaje == DIRECCION_SUBARRAY) + telec_actualizacion(); + + break; + + case TEMPERATURA : if (direc_mensaje == DIRECCION_SUBARRAY) + telec_temperatura(); + + break; + + case PETICION_ESTADO : if (direc_mensaje == DIRECCION_SUBARRAY) + telec_pet_Estado(); + + break; + } + } + } + } + +} + + +/* + Subrutina que actualiza el TIMER3 con el que se implementa la función WATCHDOG. + Esta función se habilita conectando un pin externo a nivel bajo, y funciona de + forma independiente al código que se ejecuta en el micro. Cuando el TIMER3 llega + al final de la cuenta se produce un RESET del micro, por tanto, hay que habilitar + un mecanismo de recarga del CONTADOR de forma que entre dos recargas no medie un + tiempo mayor al que emplea la cuenta. + Este tiempo oscila (para la frecuencia de reloj que utilizamos, 11.059 MHz) entre + 2.22 ms para una cuenta mínima y 569 ms para una cuenta máxima. + Aquí usaremos el CONTADOR con cuenta máxima, para lo cual, dado que la cuenta + es ascendente, el valor de recarga es 0. + La recarga la haremos utilizando la interrupción que provoca el TIMER0 al llegar al + final de la cuenta. +*/ +void watchdog() +{ + PCON |= 0x10; + /*TIMER3 = 0x00;*/ +} + + +/* + Subrutina que atiende a la interrupción provocada por la UART del puerto serie + cuando se ha recibido o enviado un carácter. + En esta subrutina lo único que hacemos es poner el valor 1 en la variable 'int_serie' + para indicar que la interrupción ocurrida es debida al puerto serie. Esto es necesario + porque el micro sale del estado de bajo consumo mediante cualquier interrupción, y sólo + queremos que lo haga cuando haya actividad en el puerto serie, de forma que si se produce + alguna otra interrupción el micro chequea esta variable y si está a 0 vuelve a entrar en + el estado de bajo consumo. + + La variable 'int_serie' se pone a cero siempre justo antes de entrar en el modo de bajo + consumo, y es únicamente en esta subrutina donde se pone a valor uno. +*/ +void sint(void) interrupt 4 using 2 +{ + int_serie = 1; +} + + +/* + Subrutina que atiende a la interrupción provocada por el TIMER0. + Utilizamos esta interrupción para recargar el TIMER3 que relacionado con la operación del + WATCHDOG. + Esta interrupción se produce (para la frecuencia de reloj que utilizamos, 11.059 MHz) cada + 71.12 ms, lo que supone un margen de seguridad amplio frente a los 569 ms que emplea el + TIMER3 en realizar una cuenta. +*/ +void tint() interrupt 1 using 1 +{ + /* Llamamos a la subrutina que actualiza el TIMER3 del 'watchdog' */ + watchdog(); +} + + +/* + Función que implementa la codificación de Hamming (40,32) del mensaje + (tc1, tc2, tc3, tc4). + La función devuelve la redundancia del mensaje de entrada en las variables "red" + Como ya hemos comentado al declarar la matriz 'Hamming', para no realizar producto de matriz + por vector para calcular la redundancia, almacenamos la matriz generadora de Hamming como dos + vectores de valores hexadecimales de longitud 29. + Para obtener la redundancia lo que hacemos es realizar la operación XOR entre los valores del + vectores "Hamming_H" cuyo índice coincide con los índices de los dígitos igual a '1' + en la palabra mensaje. + Para encontrar estos índices comparamos cada uno de los 4 bytes de que se compone el mensaje + con las potencias de dos (2^7, 2^6, ... , 2^1, 2^0). +*/ +unsigned char codigo(unsigned char tc1,unsigned char tc2,unsigned char tc3,unsigned char tc4) +{ +// unsigned char red; + unsigned char red = 0; + + if (tc1 != 0x00) + { + if (tc1 & 128) red ^= Hamming_H0; + if (tc1 & 64 ) red ^= Hamming_H1; + if (tc1 & 32 ) red ^= Hamming_H2; + if (tc1 & 16 ) red ^= Hamming_H3; + if (tc1 & 8 ) red ^= Hamming_H4; + if (tc1 & 4 ) red ^= Hamming_H5; + if (tc1 & 2 ) red ^= Hamming_H6; + if (tc1 & 1 ) red ^= Hamming_H7; + } + + if (tc2 != 0x00) + { + if (tc2 & 128) red ^= Hamming_H8; + if (tc2 & 64 ) red ^= Hamming_H9; + if (tc2 & 32 ) red ^= Hamming_H10; + if (tc2 & 16 ) red ^= Hamming_H11; + if (tc2 & 8 ) red ^= Hamming_H12; + if (tc2 & 4 ) red ^= Hamming_H13; + if (tc2 & 2 ) red ^= Hamming_H14; + if (tc2 & 1 ) red ^= Hamming_H15; + } + + if (tc3 != 0x00) + { + if (tc3 & 128) red ^= Hamming_H16; + if (tc3 & 64 ) red ^= Hamming_H17; + if (tc3 & 32 ) red ^= Hamming_H18; + if (tc3 & 16 ) red ^= Hamming_H19; + if (tc3 & 8 ) red ^= Hamming_H20; + if (tc3 & 4 ) red ^= Hamming_H21; + if (tc3 & 2 ) red ^= Hamming_H22; + if (tc3 & 1 ) red ^= Hamming_H23; + } + + if (tc4 != 0x00) + { + if (tc4 & 128) red ^= Hamming_H24; + if (tc4 & 64 ) red ^= Hamming_H25; + if (tc4 & 32 ) red ^= Hamming_H26; + if (tc4 & 16 ) red ^= Hamming_H27; + if (tc4 & 8 ) red ^= Hamming_H28; + if (tc4 & 4 ) red ^= Hamming_H29; + if (tc4 & 2 ) red ^= Hamming_H30; + if (tc4 & 1 ) red ^= Hamming_H31; + } + + return(red); +} + + +/* + Subrutina que implementa el envío de mensajes en respuesta a los telecomandos recibidos. + Los mensajes enviados son siempre de dos bytes más el byte de redundancia del código de Hamming. + Para utilizar el mismo código en transmisión que en recepción, se añade un tercer byte con valor + 0 cuando se calcula la redundancia del mensaje a enviar. Esto mismo hace el módulo que recibe + los mensajes que envían los subarrays para chequear la corrección de dichos mensajes. + + El proceso de envío es el siguiente. + + - Activar el 'driver' de transmisión. + + - Enviar 3 bytes del mensaje: + * Calcular la paridad de cada byte y colarla en el registro de la UART etiquetado como + 'BIT_PARIDAD_TRA'. + * Colocar el byte a transmitir en el registro de salida 'BUFFER_SERIE'. + * Esperar que la UART indique en la bandera 'DATO_ENVIADO' que se ha enviado un byte + antes de enviar el siguiente. + + - Desactivar el 'driver' de transmisión. + + Para evitar que por alguna eventualidad la UART no actualice la bandera 'DATO_ENVIADO' y el + programa quede indefinidamente esperando, utilizamos la variable 'CONTADOR' que se incrementa + cada vez que hacemos una comprobación de la bandera. Cuando se llega a un valor límite no + se hacen mas comprobaciones y se sigue enviando el resto del mensaje. + Podríamos haber optado por abortar la transmisión en el caso de se llegue al valor límite de + la cuenta, porque esto indicaría que se ha producido un error. Sin embargo continuamos la + transmisión dejando que recaiga sobre el módulo que recibe los mensajes la responsabilidad de + actuar frente a la detección de un error. + Esto no supone ningún riesgo grave porque los mensajes de respuesta a telecomandos no afectan + al estado de apuntamiento de la antena. +*/ +void contestar() +{ + unsigned char CONTADOR; + int num_byte; + /* + Paridad impar. Metemos el bit de paridad en BIT_PARIDAD_TRA antes de mandar un byte. + En el "flag" PARIDAD_ACC tenemos la paridad del dato que hay en el ACUMULADOR. + Como la paridad es impar lo negamos + */ + + /* Activar driver transmisión: + (P3.2 a 0) */ + P3 &= 0xFB; + + for (num_byte = 0; num_byte <3; num_byte ++) + { + ACUMULADOR = BYTE_MENSAJE[num_byte]; + BIT_PARIDAD_TRA = ~PARIDAD_ACC; + BUFFER_SERIE = ACUMULADOR; + + /* Esperamos que el dato sea enviado */ + CONTADOR = 0; + while ((DATO_ENVIADO == 0) && (CONTADOR < 254)) + CONTADOR++; + + /* Desactivamos el flag */ + DATO_ENVIADO = 0; + } + + /* Desactivar driver */ + P3 |= 0x04; +} + + +/* + Subrutina que se ejecuta al comenzar a funcionar el microcontrolador + y que adecua al cometido que ha de realizar el micro los valores en + algunos registros. +*/ +void inicializar_registros() +{ + /* Registro de interrupciones: + habilitamos la interrupción del TIMER0 */ + IP =0x82; + + /* Puerto serie */ + /* fosc = 11.059 MHz */ + /* Transmisión a 9600 baudios */ + PCON = 0x00; + TMOD = 0x21; + SCON = 0xD0; + + /* Registros de los 'timers' */ + /* Timer 1 en 'auto-reload' para generar velocidad transmisión */ + /* Usamos el TIMER0 para recargar el TIMER3 mientras se */ + /* espera un nuevo comando */ + /* El TIMER1 se usa para generar el 'baud-rate' */ + /* Los timers son de 16 bits. */ + TH1 = 0xFD; + TL1 = 0x00; + TH0 = 0xFF; + TL0 = 0x00; + + /* Activamos los 'timers' */ + TR1 = 0x1; + TR0 = 0x1; +} + + +/* + Subrutina que hace que el micro entre en estado de bajo consumo +*/ +void bajo_consumo() +{ + /* Habilitamos la interrupción del puerto serie */ + IE = 0x92; + + /* Activamos el modo 'idle' de bajo consumo. De este modo se sale + cuando se produce alguna interrupción */ + PCON |= 1; + + /* Esta instrucción se ejecuta una vez que se ha salido del modo 'idle' + Deshabilitamos la interrupción del puerto serie */ + IE = 0x82; +} + +/* + Subrutina que realiza la recepción de los telecomandos. Todos tienen una longitud de 4 bytes + más el byte del código de Hamming. + Los bytes recibidos los coloca la UART en el registro 'BUFFER_SERIE', y el programa los coloca en las + variables 'BYTE0...4'. + La recepción de cada byte supone esperar que la bandera 'DATO_RECIBIDO' sea actualizada por la UART. + Para evitar que por alguna eventualidad el programa pudiera quedar indefinidamente esperando que se + actualizara dicha bandera se utiliza el mismo método que en la subrutina de enviar mensajes, la variable + 'CONTADOR' se incrementa a cada comprobación que se hace de la bandera. Si se alcanza un valor límite, + en este caso, y a diferencia de la subrutina de transmisión, se aborta la recepción y se devuelve el valor + 'TIEMPO_EXCEDIDO' indicando que ha habido un error en la recepción. + En este caso si que es obligado abortar el proceso puesto que de no hacerlo se podría provocar un + funcionamiento incorrecto de la antena al ejecutar comandos erróneos. + + A cada byte recibido se le comprueba si la paridad es la correcta. Caso de no serlo se actualiza la variable + global 'ERROR_PARIDAD' que evitará que se procesen telecomandos erróneos. Un error de paridad detectado no + aborta la recepción. Lo que se hace es que una vez acabada se envía un mensaje indicando el error detectado. +*/ +unsigned char recibir_trama() +{ + /* + Variable que utilizaremos para evitar que el programa + se quede esperando si se produce una interrupción en + el puerto serie, pero no llega ningún dato + */ + unsigned char CONTADOR; + + /* Indice del byte que se está recibiendo */ + unsigned char num_byte; + + /* Ponemos a cero el indicador de error en la paridad de los datos recibidos */ + ERROR_PARIDAD = 0; + + /* Bucle de recepción */ + for (num_byte = 0; num_byte < 5; num_byte ++) + { + CONTADOR = 0; + + /* esperamos que haya un dato válido */ + while((DATO_RECIBIDO == 0) && (CONTADOR < 254)) + CONTADOR++; + + /* Si no ha llegado ningún dato salimos de la función y devolvemos una señal indicándolo */ + if (CONTADOR == 254) + return TIEMPO_EXCEDIDO; + + /* Desactivamos el "flag" */ + DATO_RECIBIDO = 0; + + /* Almacenamos el dato que ha llegado */ + BYTE[num_byte] = BUFFER_SERIE; + ACUMULADOR = BYTE[num_byte]; + + /* Determinamos la paridad del dato recibido. 'PARIDAD_ACC' indica si el dato en el acumulador + tiene paridad par. Por tanto, habrá un error de paridad cuando la paridad recibida sea la misma + que indica 'PARIDAD_ACC' */ + if (BIT_PARIDAD_REC == PARIDAD_ACC) + ERROR_PARIDAD = 1; + } + + + /* transmisión terminada */ + return TIEMPO_NO_EXCEDIDO; +} + + +/* + Subrutina que envía un mensaje de error si ha ocurrido alguna de las dos situaciones siguientes: + + - Se ha detectado un error de paridad en al recepción de algún byte del último telecomando. + + - El código de Hamming recibido no coincide con el que realmente corresponde a los cuatro bytes + del mensaje recibido. + + En cada ocasión únicamente contesta un Subarray puesto que cada telecomando lleve incluido un campo + que identifica al Subarray direccionado, incluso cuando el telecomando es global. En este último caso + la dirección del Subarray está en el segundo byte del mensaje y en el resto de los casos en el primero. + La subrutina devuelve un indicador de si ha habido error. +*/ +unsigned char contestar_si_error() +{ + BYTE_MENSAJE[2] = codigo(BYTE[0], BYTE[1], BYTE[2], BYTE[3]); + + if ((ERROR_PARIDAD == 1) || (BYTE[4] != BYTE_MENSAJE[2])) + { + BYTE_MENSAJE[0] = BYTE_MENSAJE[1] = BYTE_MENSAJE[1] = 0x00; + contestar(); + return TRUE; + } + + else + return FALSE; +} + + +/**********************************************************************************/ +/* MAPEADO DE LAS LINEAS DE CONTROL DE LOS DOS HACES CON LOS PUERTOS DEL MICRO */ +/* */ +/* Simbolización: Haz 1, bit 2 de Amplitud -> H1A2 */ +/* Haz 0, bit 0 de Fase -> H0F0 */ +/* */ +/* | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5 | BIT6 | BIT7 | */ +/* | | | | | | | | | */ +/* PUERTO 0 -> P0 | H0A9 | | | | | | | | */ +/* | | | | | | | | | */ +/* PUERTO 1 -> P1 | H1F0 | H1F1 | H1F2 | H1F3 | H1F4 | H0F0 | H0F1 | H0F2 | */ +/* | | | | | | | | | */ +/* PUERTO 2 -> P2 | H0A0 | H0A1 | H0A2 | H0A3 | H0A4 | H0A5 | H0A6 | H0A7 | */ +/* | | | | | | | | | */ +/* PUERTO 3 -> P3 | | | | H1A8 | H1A9 | H0F3 | H0F4 | H0A8 | */ +/* | | | | | | | | | */ +/* PUERTO 4 -> P4 | H1A0 | H1A1 | H1A2 | H1A3 | H1A4 | H1A5 | H1A6 | H1A7 | */ +/* */ +/**********************************************************************************/ + + +/* + Subrutina que configura el HAZ 0. + Los valores de las líneas H9..H0 se obtienen según las siguientes expresiones: + + H9 <-- ~A0 + H8 <-- (~A3 & A2) | (A3 & A1) + H7 <-- (~A3 & A1) | (A3 & A2) + H6 <-- A3 | (A1 & ~A2) + H5 <-- A3 | A2 + H4 <-- ~A1 + H3 <-- ~A2 + H2 <-- ~A3 + H1 <-- A4 + H0 <-- ~A4 + + donde, '~', '|' y '&' representan la negación, la operación OR y la operación AND + binaria, respectivamente. +*/ +void configurar_haz0(unsigned char amplitud, unsigned char fase) +{ + unsigned char conf_P2 = 0x00; + + /* ponemos a cero los bits de los puertos que vamos a cambiar mediante una operación 'OR' */ + P0 &= 0xFE; + P1 &= 0x1F; + P3 &= 0x1F; + + /* H0 */ + conf_P2 |= (~(amplitud & 0x10))* 0x01; + + /* H1 */ + conf_P2 |= (amplitud & 0x10) * 0x02; + + /* H2 */ + conf_P2 |= (~(amplitud & 0x08))* 0x04; + + /* H3 */ + conf_P2 |= (~(amplitud & 0x04))* 0x08; + + /* H4 */ + conf_P2 |= (~(amplitud & 0x02))* 0x10; + + /* H5 */ + conf_P2 |= ((amplitud & 0x08) | (amplitud & 0x04))* 0x20; + + /* H6 */ + conf_P2 |= ((amplitud & 0x08) | ((amplitud & 0x02)&(~(amplitud & 0x04))))* 0x40; + + /* H7 */ + conf_P2 |= (((amplitud & 0x08)&(amplitud & 0x04)) | ((amplitud & 0x02)&(~(amplitud & 0x08))))* 0x80; + + /* H8 */ + P3 |= (((amplitud & 0x08)&(amplitud & 0x02)) | ((amplitud & 0x04)&(~(amplitud & 0x08))))* 0x80; + /* H9 */ + P0 |= (~(amplitud & 0x01)) * 0x01; + + /* Actualizamos el puerto P2 */ + P2 = conf_P2; + + /* Actualizamos el puerto P1 */ + P1 |= (fase & 0x07) << 5; + + /* Actualizamos el puerto P3 */ + P3 |= (fase & 0x18) << 2; +} + + +/* + Subrutina que configura el HAZ 1. +*/ +void configurar_haz1(unsigned char amplitud, unsigned char fase) +{ + unsigned char conf_P4 = 0x00; + + /* ponemos a cero los bits de los puertos que vamos a cambiar mediante una operación 'OR' */ + P1 &= 0xE0; + P3 &= 0xE7; + + /* H0 */ + conf_P4 |= (~(amplitud & 0x10))* 0x01; + + /* H1 */ + conf_P4 |= (amplitud & 0x10) * 0x02; + + /* H2 */ + conf_P4 |= (~(amplitud & 0x08))* 0x04; + + /* H3 */ + conf_P4 |= (~(amplitud & 0x04))* 0x08; + + /* H4 */ + conf_P4 |= (~(amplitud & 0x02))* 0x10; + + /* H5 */ + conf_P4 |= ((amplitud & 0x08) | (amplitud & 0x04))* 0x20; + + /* H6 */ + conf_P4 |= ((amplitud & 0x08) | ((amplitud & 0x02)&(~(amplitud & 0x04))))* 0x40; + + /* H7 */ + conf_P4 |= (((amplitud & 0x08)&(amplitud & 0x04)) | ((amplitud & 0x02)&(~(amplitud & 0x08))))* 0x80; + + /* H8 */ + P3 |= (((amplitud & 0x08)&(amplitud & 0x02)) | ((amplitud & 0x04)&(~(amplitud & 0x08))))* 0x08; + /* H9 */ + P3 |= (~(amplitud & 0x01)) * 0x10; + + /* Actualizamos el puerto P4 */ + P4 = conf_P4; + + /* Actualizamos el puerto P1 */ + P1 |= fase; +} + + +/* + Telecomando en el que se envía a un Subarray concreto para actualizar uno de los estados de programación + predefinidos. + El índice del estado consta de bits contenidos en BYTE1 + Los 10 bits de la palabra del nuevo estado están en: + 5 bits de amplitud en BYTE2[4..0] + 5 bits de fase en BYTE3[7..3] +*/ +void telec_actualizacion() +{ + unsigned char fase, amplitud, fila, columna, i, p; + + /* Obtenemos la columna correspondiente al estado que se actualiza */ + /* dentro de la matriztabla_estados */ + columna = 1 << (BYTE[1] & 0x07); + + /* Obtenemos la fila */ + fila = (BYTE[1] >> 3) * 0x0A; + + /* Obtenemos el valor de la fase */ + fase = BYTE[3]; + + /* Obtenemos el valor de la amplitud */ + amplitud = BYTE[2]; + + /* Actualizamos la tabla */ + for (i = 0x00, p = 0x01; i < 0x05; i++, p <<= 1) + { + /* Colocamos un '0' en todas las posiciones correspondientes */ + /* al estado */ + tabla_estados[fila+i ] &= 0xFF ^ columna; + tabla_estados[fila+i+5] &= 0xFF ^ columna; + + /* Según el valor de amplitud y fase colocamos un '1' en las */ + /* posiciones correspondientes */ + if (amplitud & p) tabla_estados[fila+i ] |= columna; + if (fase & p) tabla_estados[fila+i+5] |= columna; + } + + + /* Contestamos indicando que no ha habido error. + Los bytes del mensaje de respuesta son 0xFC y 0x00, + y completa la palabra código Hamming el byte 0x76. + */ + BYTE_MENSAJE[0] = 0xFF; + BYTE_MENSAJE[1] = 0x00; + BYTE_MENSAJE[2] = 0x76; + contestar(); +} + + +/* + Subrutina que actualiza con la nueva programación las líneas de control de la red desfasadora + y atenuadora. + La variable 'haz_conformado' contiene la información sobre el haz que hay que reprogramar. +*/ +void telec_conformacion(unsigned char DIRECCION_SUBARRAY) +{ + unsigned char haz_conformado, amplitud = 0x00, fase = 0x00, fila, columna, i, p; + + /* Obtenemos la columna dentro de la matriz tabla_estados */ + columna = 1 << (BYTE[1] & 0x07); + + /* Obtenemos la fila */ + fila = (BYTE[1] >> 3) * 0x0A; + + /* Obtenemos el haz que se reprograma */ + haz_conformado = BYTE[3]; + + /* Obtenemos los valores de las palabras de amplitud y fase */ + for (i = 0x00, p = 0x01; i < 0x05; i++, p <<= 1) + { + if (tabla_estados[fila+i ] & columna) amplitud |= p; + if (tabla_estados[fila+i+5] & columna) fase |= p; + } + + /* Colocamos los valores correspondientes en + las líneas de control */ + if (haz_conformado == 0x00) + { + estado_haces[0] = amplitud; + estado_haces[1] = fase; + configurar_haz0(amplitud, fase); + } + + if (haz_conformado == 0x01) + { + estado_haces[2] = amplitud; + estado_haces[3] = fase; + configurar_haz1(amplitud, fase); + } + + /* Contestar, si corresponde, que no habido error */ + if (direccion_CONFORMACION == DIRECCION_SUBARRAY) + { + BYTE_MENSAJE[0] = 0xFF; + BYTE_MENSAJE[1] = 0x00; + BYTE_MENSAJE[2] = 0x76; + contestar(); + } +} + + +/* + Subrutina que realiza la adquisición de la temperatura del módulo T/R. + La conversión analógica es de 10 bits. + El mensaje se compone de dos bytes más el código de Hamming con la siguiente distribución: + + MSB LSB + BYTE1 : 0 0 0 0 0 0 T9 T8 + BYTE2 : T7 T6 T5 T4 T3 T2 T1 T0 + BYTE3 : H7 H6 H5 H4 H3 H2 H1 H0 + + donde T9..T0 son los 10 bits de la lectura de la temperatura y + H7..H0 son los 8 bits de la redundancia de Hamming. +*/ +void telec_temperatura() +{ + unsigned char CONTADOR; + + /* Reseteamos el registro de control del conversor A/D */ + ADCON = 0x00; + + /* Activar la conversión A/D */ + ADCON = ADCON | AD_INI; + + /* Esperamos a que termine el muestreo. + Con la variable contador establecemos un tiempo límite de espera */ + CONTADOR = 0; + while (((ADCON & AD_FIN) == 0) || (CONTADOR == 250)) + CONTADOR++; + + /* Si se ha superado el tiempo de espera enviamos mensaje de error */ + if (CONTADOR == 250) + { + BYTE_MENSAJE[0] = BYTE_MENSAJE[1] = BYTE_MENSAJE[2] = 0x00; + contestar(); + return; + } + + /* Realizamos la lectura del conversor */ + BYTE_MENSAJE[0] = (ADCON & 0xC0) >> 6; + BYTE_MENSAJE[1] = ADAT; + + /* Calculamos la palabra código */ + BYTE_MENSAJE[2] = codigo(BYTE_MENSAJE[0], BYTE_MENSAJE[1], 0x00, 0x00); + + /* Enviamos respuesta */ + contestar(); +} + + +/* + Subrutina que implementa dos funciones: + + - Envía un mensaje en respuesta a un telecomando de petición de estado con la + programación actual del haz solicitado, información que está contenida en la + variable 'tabla_estados' en la forma siguiente: + * tabla_haces_prog[2*haz] <- Amplitud (5bits) + * tabla_haces_prog[2*haz+1] <- Fase (5bits) + + El mensaje se compone de dos bytes más el código de Hamming con la siguiente distribución: + + MSB LSB + BYTE1 : 0 0 0 A4 A3 A2 A1 A0 + BYTE2 : 0 0 0 F4 F3 F2 F1 F0 + BYTE3 : H7 H6 H5 H4 H3 H2 H1 H0 + + - Provoca un RESET del microcontrolador cuando el telecomando de petición de temperatura + tiene el segundo byte igual a 0xFF. + Este RESET intencionado se utiliza cuando el módulo que distribuye los mensajes a los distintos + subarrays detecta que hay un error en el bus de telemedidas que persiste cuando se dirige a un + subarray en particular, o bien hay un subarray que no contesta. Estas anomalías posiblemente son + debidas a que un subarray por cualquier motivo desconocido ha sufrido un error en la posición de + memoria donde almacena la dirección que lo identifica, de forma que hay dos subarrays con la misma + dirección o bien un subarray tiene una dirección no válida (superior a 51, dirección máxima). +*/ +void telec_pet_Estado() +{ + unsigned char haz; + + /* Comprobamos si se trata de un comando de reset */ + /* En caso afirmativo entramos en un bucle vacío */ + /* para que se provoque un reset */ + if (BYTE[1] == 0xFF) + { + /* + Deshabilitamos las interrupciones de forma que el TIMER0 no + pueda activar la rutina 'watchdog()' y se produzca un RESET. + */ + IE = 0x00; + + /* Bucle infinito */ + while(1); + } + + + /* Si el telecomando es efectivamente de petición */ + /* de estado obtenemos el haz direccionado */ + haz = BYTE[2]; + + /* Construimos los bytes de respuesta */ + BYTE_MENSAJE[0] = estado_haces[2*haz]; + BYTE_MENSAJE[1] = estado_haces[2*haz+1]; + + BYTE_MENSAJE[2] = codigo(BYTE_MENSAJE[0], BYTE_MENSAJE[1], 0x00, 0x00); + + /* Enviamos mensaje de respuesta */ + contestar(); +} + + diff --git a/device/examples/test3.c b/device/examples/test3.c new file mode 100644 index 0000000..ae808b9 --- /dev/null +++ b/device/examples/test3.c @@ -0,0 +1,131 @@ +/*------------------------------------------------------------------------ + test3.c - A simple multiple module example, uses itoa() and crc() + routines from other modules in same directory. Compile with: + make -f maketest3 +|------------------------------------------------------------------------*/ +#if defined(__mcs51) +#include <8052.h> +#endif +#if defined(__ds390) +#include +#endif +#include + +typedef unsigned char byte; +typedef unsigned int word; +typedef unsigned long l_word; + +void uitoa(unsigned int value, char* string, int radix); +void itoa(int value, char* string, int radix); +byte accum_checksum(byte cs, byte val); + +char tmpstr[30]; + +int i; + +#if defined(__mcs51) || defined(__ds390) +/*------------------------------------------------------------------------ + tx_char - transmit(tx) a char out the serial uart. +|------------------------------------------------------------------------*/ +void tx_char(char c) +{ + SBUF = c; + while (!TI) + ; + TI = 0; +} + +/*------------------------------------------------------------------------ + my_puts - +|------------------------------------------------------------------------*/ +void my_puts(char *str) +{ + + while (*str) + tx_char(*str++); +} + +/*------------------------------------------------------------------------ + init_mcs51 - +|------------------------------------------------------------------------*/ +void init_mcs51(void) +{ + PCON = 0x80; /* power control byte, set SMOD bit for serial port */ + SCON = 0x50; /* serial control byte, mode 1, RI active */ + TMOD = 0x21; /* timer control mode, byte operation */ + TCON = 0; /* timer control register, byte operation */ + + TH1 = 0xFA; /* serial reload value, 9,600 baud at 11.0952Mhz */ + TR1 = 1; /* start serial timer */ + + EA = 1; /* Enable Interrupts */ + + TI = 0; /* clear this out */ +} +#else +/*------------------------------------------------------------------------ + my_puts - +|------------------------------------------------------------------------*/ +void my_puts(char *str) +{ + + while (*str) + putchar(*str++); /* putchar() is lib routine which calls simulator trap */ +} +#endif + +/*------------------------------------------------------------------------ + main - Simple test program to send out something to the serial port. +|------------------------------------------------------------------------*/ +int main(void) +{ + byte ccs; + unsigned int tmp; + +#if defined(__mcs51) || defined(__ds390) + init_mcs51(); +#endif + + ccs = 0x3f; + tmp = (ccs<<7); + my_puts("0x3f<<7 hex="); + uitoa(tmp, tmpstr, 10); + my_puts(tmpstr); + my_puts("\n"); + +#if 0 + byte r,cs,val; + unsigned int tmp; + cs = 0xff; + val = 0; + tmp = ((cs<<7) | (cs>>1)) + val; + printf("tmp=%xH(0x7fff)\n", tmp); + cs = 0xfd; + tmp = ((cs<<7) | (cs>>1)) + val; + printf("tmp=%xH(0x7efe)\n", tmp); + // return (byte)tmp + ((byte) (tmp>>8) & 1); +#endif + + + my_puts("Test3 - multiple module test\n"); + + my_puts("1023 decimal="); + uitoa(1023, tmpstr, 10); + my_puts(tmpstr); + my_puts(" hex="); + uitoa(1023, tmpstr, 0x10); + my_puts(tmpstr); + my_puts("\n"); + + my_puts(" chksum="); +// i = accum_checksum(50, 20); + uitoa(i, tmpstr, 10); + my_puts(tmpstr); + my_puts("\n"); + + for (;;) + { + } + return 0; +} + diff --git a/device/examples/xa51/Makefile b/device/examples/xa51/Makefile new file mode 100644 index 0000000..f439f67 --- /dev/null +++ b/device/examples/xa51/Makefile @@ -0,0 +1,21 @@ +CC = sdcc + +CFLAGS= -Wa-s --dumpall +MFLAGS= -mxa51 +#LFLAGS= --code-loc 0x1000 --xram-loc 0x4000 +LFLAGS= --xram-loc 0x4000 + +all: hello.hex + +OBJECTS = hello.rel hwinit.rel dummy.rel + +hello.hex: $(OBJECTS) + $(CC) $(MFLAGS) $(LFLAGS) $(OBJECTS) + echo go | sxa hello.hex + +clean: + rm -f core *~ \#* *.asm *.cdb *.rel *.hex *.ihx *.lst *.map \ + *.xa *.rst *.sym *.lnk *.lib *.bin *.dump* *.log + +%.rel: %.c hw.h + $(CC) -c $(CFLAGS) $(MFLAGS) $< diff --git a/device/examples/xa51/dummy.c b/device/examples/xa51/dummy.c new file mode 100644 index 0000000..b865fb4 --- /dev/null +++ b/device/examples/xa51/dummy.c @@ -0,0 +1,9 @@ +data char dummy_d1, dummy_d2=3; +xdata char dummy_x1, dummy_x2=3; +code char dummy_c1=4, dummy_c2=3; +bit dummy_b1; + +// and some dummy code +int dummy(void) { + return dummy_x2+dummy_c2; +} diff --git a/device/examples/xa51/hello.c b/device/examples/xa51/hello.c new file mode 100644 index 0000000..f9e42b5 --- /dev/null +++ b/device/examples/xa51/hello.c @@ -0,0 +1,28 @@ +#include "hw.h" + +bit b1, b2=1; +code c1=0; +data d1, d2=2; +xdata x1, x2=3; + +extern bit be; +extern code ce; +extern data de; +extern xdata xe; +extern xdata xee; +xdata at 0x1234 abs; + +void main(void) { + puts ("Hello world.\n\r"); + if (d2==2) { + puts ("d2=2"); + } else { + puts ("d2!=2"); + } + if (d1!=3) { + puts ("d1!=3"); + } else { + puts ("d1==3"); + } + exit_simulator(); +} diff --git a/device/examples/xa51/hw.h b/device/examples/xa51/hw.h new file mode 100644 index 0000000..cde526a --- /dev/null +++ b/device/examples/xa51/hw.h @@ -0,0 +1,10 @@ +#include <80c51xa.h> + +#define BAUD_RATE 9600 +#define OSC 20000000L /* Xtal frequency */ + +void putchar(char); +char getchar(void); +int puts(char *); + +void exit_simulator(void); diff --git a/device/examples/xa51/hwinit.c b/device/examples/xa51/hwinit.c new file mode 100644 index 0000000..16510e6 --- /dev/null +++ b/device/examples/xa51/hwinit.c @@ -0,0 +1,88 @@ +#include "hw.h" + +bit b3; +code c2=1; +data d3, d4=4; +xdata x3, x4=5; + +#define DIVIDER (OSC/(64L*BAUD_RATE)) + +void external_startup(void) { + _asm + mov.b _WDCON,#0 ;shut down the watchdog + mov.b _WFEED1,#0a5h + mov.b _WFEED2,#05ah +; mov.b _BCR,#1 ;BCR: 8 data, 16 address +; mov.b _SCR,#1 ;SCR: page zero mode + _endasm; + + // init serial io + TL1 = RTL1 = -DIVIDER; + TH1 = RTH1 = -DIVIDER >> 8; + TR1 = 1; /* enable timer 1 */ + + S0CON = 0x52; /* mode 1, receiver enable */ + IPA4 |= 0x6; /* maximum priority */ + ERI0=1; /* enable receiver interupts */ + TI0==1; /* transmitter empty */ + RI0=0; /* receiver empty */ + + //PSWH &= 0xf0; /* start interupt system */ +} + +#define SIMULATOR 1 + +#ifdef SIMULATOR + +void putchar(char c) { + c; // hush the compiler + _asm + mov.b r0l, [r7+2] + trap #0EH; + _endasm; +} + +char getchar() { + return 0; +} + +void exit_simulator(void) { + _asm + trap #0FH; + _endasm; +} + +#else + +void putchar(char c) { + while(!TI0) + ; + S0BUF = c; + TI0 = 0; +} + +char getchar(void) { + char c; + + while (!RI0) + ; + c=S0BUF; + RI0=0; + return c; +} + +int kbhit(void) { + return RI0; +} + +#endif + +int puts(char *string) { + int chars=0; + while (*string) { + putchar (*string++); + chars++; + } + putchar ('\n'); + return chars+1; +} diff --git a/device/include/80c51xa.h b/device/include/80c51xa.h new file mode 100644 index 0000000..4c32f3e --- /dev/null +++ b/device/include/80c51xa.h @@ -0,0 +1,225 @@ +/* + * XA G3 SFR definitions + * Extracted directly from Philips documentation + */ + +#ifndef XA_H +#define XA_H + +__sfr __at 0x400 /*unsigned short*/ PSW; /* Program status word */ +__sfr __at 0x400 PSWL; /* Program status word (low byte) */ +__sfr __at 0x401 PSWH; /* Program status word (high byte) */ +__sfr __at 0x402 PSW51; /* 80C51 compatible PSW */ +__sfr __at 0x403 SSEL; /* Segment selection register */ +__sfr __at 0x404 PCON; /* Power control register */ +__sfr __at 0x410 TCON; /* Timer 0 and 1 control register */ +__sfr __at 0x411 TSTAT; /* Timer 0 and 1 extended status */ +__sfr __at 0x418 T2CON; /* Timer 2 control register */ +__sfr __at 0x419 T2MOD; /* Timer 2 mode control */ +__sfr __at 0x41F WDCON; /* Watchdog control register */ +__sfr __at 0x420 S0CON; /* Serial port 0 control register */ +__sfr __at 0x421 S0STAT; /* Serial port 0 extended status */ +__sfr __at 0x424 S1CON; /* Serial port 1 control register */ +__sfr __at 0x425 S1STAT; /* Serial port 1 extended status */ +__sfr __at 0x426 IEL; /* Interrupt enable low byte */ +__sfr __at 0x427 IEH; /* Interrupt enable high byte */ +__sfr __at 0x42A SWR; /* Software Interrupt Request */ +__sfr __at 0x430 P0; /* Port 0 */ +__sfr __at 0x431 P1; /* Port 1 */ +__sfr __at 0x432 P2; /* Port 2 */ +__sfr __at 0x433 P3; /* Port3 */ +__sfr __at 0x440 SCR; /* System configuration register */ +__sfr __at 0x441 DS; /* Data segment */ +__sfr __at 0x442 ES; /* Extra segment */ +__sfr __at 0x443 CS; /* Code segment */ +__sfr __at 0x450 TL0; /* Timer 0 low byte */ +__sfr __at 0x451 TH0; /* Timer 0 high byte */ +__sfr __at 0x452 TL1; /* Timer 1 low byte */ +__sfr __at 0x453 TH1; /* Timer 1 high byte */ +__sfr __at 0x454 RTL0; /* Timer 0 extended reload, low byte */ +__sfr __at 0x455 RTH0; /* Timer 0 extended reload, high byte */ +__sfr __at 0x456 RTL1; /* Timer 1 extended reload, low byte */ +__sfr __at 0x457 RTH1; /* Timer 1 extended reload, high byte */ +__sfr __at 0x458 TL2; /* Timer 2 low byte */ +__sfr __at 0x459 TH2; /* Timer 2 high byte */ +__sfr __at 0x45A T2CAPL; /* Timer 2 capture register, low byte */ +__sfr __at 0x45B T2CAPH; /* Timer 2 capture register, high byte */ +__sfr __at 0x45C TMOD; /* Timer 0 and 1 mode register */ +__sfr __at 0x45D WFEED1; /* Watchdog feed 1 */ +__sfr __at 0x45E WFEED2; /* Watchdog feed 2 */ +__sfr __at 0x45F WDL; /* Watchdog timer reload */ +__sfr __at 0x460 S0BUF; /* Serial port 0 buffer register */ +__sfr __at 0x461 S0ADDR; /* Serial port 0 address register */ +__sfr __at 0x462 S0ADEN; /* Serial port 0 address enable register */ +__sfr __at 0x464 S1BUF; /* Serial port 1 buffer register */ +__sfr __at 0x465 S1ADDR; /* Serial port 1 address register */ +__sfr __at 0x466 S1ADEN; /* Serial port 1 address enable register */ +__sfr __at 0x468 BTRL; /* Bus timing register high byte */ +__sfr __at 0x469 BTRH; /* Bus timing register low byte */ +__sfr __at 0x46A BCR; /* Bus configuration register */ +__sfr __at 0x470 P0CFGA; /* Port 0 configuration A */ +__sfr __at 0x471 P1CFGA; /* Port 1 configuration A */ +__sfr __at 0x472 P2CFGA; /* Port 2 configuration A */ +__sfr __at 0x473 P3CFGA; /* Port 3 configuration A */ +__sfr __at 0x47A SWE; /* Software Interrupt Enable */ +__sfr __at 0x4A0 IPA0; /* Interrupt priority 0 */ +__sfr __at 0x4A1 IPA1; /* Interrupt priority 1 */ +__sfr __at 0x4A2 IPA2; /* Interrupt priority 2 */ +__sfr __at 0x4A4 IPA4; /* Interrupt priority 4 */ +__sfr __at 0x4A5 IPA5; /* Interrupt priority 5 */ +__sfr __at 0x4F0 P0CFGB; /* Port 0 configuration B */ +__sfr __at 0x4F1 P1CFGB; /* Port 1 configuration B */ +__sfr __at 0x4F2 P2CFGB; /* Port 2 configuration B */ +__sfr __at 0x4F3 P3CFGB; /* Port 3 configuration B */ + +__sbit __at 0x33B ETI1; /* TX interrupt enable 1 */ +__sbit __at 0x33A ERI1; /* RX interrupt enable 1 */ +__sbit __at 0x339 ETI0; /* TX interrupt enable 0 */ +__sbit __at 0x338 ERI0; /* RX interrupt enable 0 */ +__sbit __at 0x337 EA; /* global int. enable */ +__sbit __at 0x334 ET2; /* timer 2 interrupt */ +__sbit __at 0x333 ET1; /* timer 1 interrupt */ +__sbit __at 0x332 EX1; /* external interrupt 1 */ +__sbit __at 0x331 ET0; /* timer 0 interrupt */ +__sbit __at 0x330 EX0; /* external interrupt 0 */ +__sbit __at 0x221 PD; /* power down */ +__sbit __at 0x220 IDL; +__sbit __at 0x20F SM; +__sbit __at 0x20E TM; +__sbit __at 0x20D RS1; +__sbit __at 0x20C RS0; +__sbit __at 0x20B IM3; +__sbit __at 0x20A IM2; +__sbit __at 0x209 IM1; +__sbit __at 0x208 IM0; +__sbit __at 0x307 S0M0; +__sbit __at 0x306 S0M1; +__sbit __at 0x305 S0M2; +__sbit __at 0x304 R0EN; +__sbit __at 0x303 T0B8; +__sbit __at 0x302 R0B8; +__sbit __at 0x301 TI0; /* serial port 0 tx ready */ +__sbit __at 0x300 RI0; /* serial port 0 rx ready */ +__sbit __at 0x30B FE0; +__sbit __at 0x30A BR0; +__sbit __at 0x309 OE0; +__sbit __at 0x308 STINT0; +__sbit __at 0x327 S1M0; +__sbit __at 0x326 S1M1; +__sbit __at 0x325 S1M2; +__sbit __at 0x324 R1EN; +__sbit __at 0x323 T1B8; +__sbit __at 0x322 R1B8; +__sbit __at 0x321 TI1; /* serial port 0 tx ready */ +__sbit __at 0x320 RI1; /* serial port 0 rx ready */ +__sbit __at 0x32B FE1; +__sbit __at 0x32A BR1; +__sbit __at 0x329 OE1; +__sbit __at 0x328 STINT1; +__sbit __at 0x356 SWR7; +__sbit __at 0x355 SWR6; +__sbit __at 0x354 SWR5; +__sbit __at 0x353 SWR4; +__sbit __at 0x352 SWR3; +__sbit __at 0x351 SWR2; +__sbit __at 0x350 SWR1; +__sbit __at 0x2C7 TF2; +__sbit __at 0x2C6 EXF2; +__sbit __at 0x2C5 RCLK0; +__sbit __at 0x2C4 TCLK0; +__sbit __at 0x2CD RCLK1; +__sbit __at 0x2CC TCLK1; +__sbit __at 0x2C3 EXEN2; +__sbit __at 0x2C2 TR2; +__sbit __at 0x2C1 CT2; +__sbit __at 0x2C0 CPRL2; +__sbit __at 0x2C9 T2OE; +__sbit __at 0x2C8 DCEN; +__sbit __at 0x287 TF1; +__sbit __at 0x286 TR1; +__sbit __at 0x285 TF0; +__sbit __at 0x284 TR0; +__sbit __at 0x283 IE1; +__sbit __at 0x282 IT1; +__sbit __at 0x281 IE0; +__sbit __at 0x280 IT0; +__sbit __at 0x28A T1OE; +__sbit __at 0x288 T0OE; +__sbit __at 0x2FF PRE2; +__sbit __at 0x2FE PRE1; +__sbit __at 0x2FD PRE0; +__sbit __at 0x2FA WDRUN; +__sbit __at 0x2F9 WDTOF; +__sbit __at 0x2F8 WDMOD; +__sbit __at 0x388 WR1; +__sbit __at 0x38F T2EX; +__sbit __at 0x38C RXD1; +__sbit __at 0x38D TXD1; +__sbit __at 0x398 RXD0; +__sbit __at 0x399 TXD0; +__sbit __at 0x39A INT0; +__sbit __at 0x39B INT1; +__sbit __at 0x39C T0; +__sbit __at 0x39D T1; +__sbit __at 0x39E WR; +__sbit __at 0x39F RD; + +/* + * Interrupt stuff + */ + + +/* Vectors */ + +#define IV_BRKPT 0x04 /* breakpoint vector */ +#define IV_TRACE 0x08 /* Trace mode bit set */ +#define IV_STKOVER 0x0C /* stack overflow */ +#define IV_DIVZERO 0x10 /* divide by zero */ +#define IV_IRET 0x14 /* user mode IRET */ + +#define IV_EX0 0x80 +#define IV_T0 0x84 +#define IV_EX1 0x88 +#define IV_T1 0x8C +#define IV_T2 0x90 +#define IV_RI0 0xA0 +#define IV_TI0 0xA4 +#define IV_RI1 0xA8 +#define IV_TI1 0xAC +#define IV_SWI1 0x100 /* software interrupts */ +#define IV_SWI2 0x104 +#define IV_SWI3 0x108 +#define IV_SWI4 0x10C +#define IV_SWI5 0x110 +#define IV_SWI6 0x114 +#define IV_SWI7 0x118 + +/* PSW Values for interrupt vectors */ + +#define IV_PSW 0x8F00 /* System mode, high priority, bank 0 */ + +#define IV_SYSTEM 0x8000 + +#define IV_PRI00 0x0000 /* priorities 0 - 15 */ +#define IV_PRI01 0x0100 +#define IV_PRI02 0x0200 +#define IV_PRI03 0x0300 +#define IV_PRI04 0x0400 +#define IV_PRI05 0x0500 +#define IV_PRI06 0x0600 +#define IV_PRI07 0x0700 +#define IV_PRI08 0x0800 +#define IV_PRI09 0x0900 +#define IV_PRI10 0x0A00 +#define IV_PRI11 0x0B00 +#define IV_PRI12 0x0C00 +#define IV_PRI13 0x0D00 +#define IV_PRI14 0x0E00 +#define IV_PRI15 0x0F00 + +#define IV_BANK0 0x0000 +#define IV_BANK1 0x1000 +#define IV_BANK2 0x2000 +#define IV_BANK3 0x3000 + +#endif /* XA_H */ diff --git a/device/include/Makefile.in b/device/include/Makefile.in new file mode 100644 index 0000000..89ec426 --- /dev/null +++ b/device/include/Makefile.in @@ -0,0 +1,121 @@ +# +# +# + +VERSION = @VERSION@ +VERSIONHI = @VERSIONHI@ +VERSIONLO = @VERSIONLO@ +VERSIONP = @VERSIONP@ + +SHELL = /bin/sh +CPP = @CPP@ +INSTALL = @INSTALL@ +CP = @CP@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @infodir@ +VPATH = @srcdir@ +srcdir = @srcdir@ + +include_dir_suffix = @include_dir_suffix@ + +sdcc_includedir = $(DESTDIR)$(datadir)/$(include_dir_suffix) + +CPPFLAGS = @CPPFLAGS@ -I$(top_builddir) + + +# Compiling entire program or any subproject +# ------------------------------------------ +all: + +# Compiling and installing everything and running test +# ---------------------------------------------------- +install: all installdirs + $(CP) -r $(srcdir)/asm $(srcdir)/*.h $(sdcc_includedir) + if [ "`grep mcs51 $(top_builddir)/ports.build`" = mcs51 ]; then \ + $(CP) $(srcdir)/mcs51/*.h $(sdcc_includedir)/mcs51 ; \ + fi + if [ "`grep '^pic$$' $(top_builddir)/ports.build`" = pic ]; then \ + $(CP) $(srcdir)/pic/*.h $(sdcc_includedir)/pic ; \ + $(CP) $(srcdir)/pic/*.inc $(sdcc_includedir)/pic ; \ + $(CP) $(srcdir)/pic/*.txt $(sdcc_includedir)/pic ; \ + $(CP) $(srcdir)/pic/pic14devices.txt $(sdcc_includedir)/pic ; \ + fi + if [ "`grep pic16 $(top_builddir)/ports.build`" = pic16 ]; then \ + $(CP) $(srcdir)/pic16/*.h $(sdcc_includedir)/pic16 ; \ + $(CP) $(srcdir)/pic16/*.txt $(sdcc_includedir)/pic16 ; \ + fi + if [ "`grep z80 $(top_builddir)/ports.build`" = z80 ]; then \ + $(CP) $(srcdir)/z80/*.h $(sdcc_includedir)/z80 ; \ + fi + if [ "`grep hc08 $(top_builddir)/ports.build`" = hc08 ]; then \ + $(CP) $(srcdir)/hc08/*.h $(sdcc_includedir)/hc08 ; \ + fi + rm -rf `find $(sdcc_includedir) -type d -name '.svn'` + # some files in CVS are executable :-( + find $(sdcc_includedir) -type f -exec chmod 644 {} \; + + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -rf $(sdcc_includedir) + + +# Performing self-test +# -------------------- +check: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + [ -d $(sdcc_includedir) ] || mkdir -p $(sdcc_includedir) + [ -d $(sdcc_includedir)/mcs51 ] || mkdir -p $(sdcc_includedir)/mcs51 + [ -d $(sdcc_includedir)/pic ] || mkdir -p $(sdcc_includedir)/pic + [ -d $(sdcc_includedir)/pic16 ] || mkdir -p $(sdcc_includedir)/pic16 + [ -d $(sdcc_includedir)/z80 ] || mkdir -p $(sdcc_includedir)/z80 + [ -d $(sdcc_includedir)/hc08 ] || mkdir -p $(sdcc_includedir)/hc08 + + +# Creating dependencies +# --------------------- +dep: #Makefile.dep + +#Makefile.dep: +# $(CPP) $(CPPFLAGS) $(M_OR_MM) *.c >main.dep + +#-include Makefile.dep +include $(srcdir)/clean.mk + +# My rules +# -------- + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f $(srcdir)/conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" \ + freshconf;\ + fi + +# End of main_in.mk/main.mk + diff --git a/device/include/asm/default/features.h b/device/include/asm/default/features.h new file mode 100644 index 0000000..6e02808 --- /dev/null +++ b/device/include/asm/default/features.h @@ -0,0 +1,11 @@ +/** default features. + */ +#ifndef __SDC51_ASM_FEATURES_H +#define __SDC51_ASM_FEATURES_H 1 + +#define _REENTRANT __reentrant +#define _CODE __code +#define _AUTOMEM +#define _STATMEM + +#endif diff --git a/device/include/asm/ds390/features.h b/device/include/asm/ds390/features.h new file mode 100644 index 0000000..9ff9573 --- /dev/null +++ b/device/include/asm/ds390/features.h @@ -0,0 +1,66 @@ +/*--------------------------------------------------------------------------- + DS390/DS400 specific features. + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +---------------------------------------------------------------------------*/ + +#ifndef __SDC51_ASM_DS390_FEATURES_H +#define __SDC51_ASM_DS390_FEATURES_H 1 + +#define _REENTRANT __reentrant +#define _CODE __code + +/* define _AUTOMEM to indicate the default storage class for + automatic variables. To be used with pointers to automatic variables. + Cannot be used in reentrant declared functions! + + void foo(void) + { + char Ar[10]; + char _AUTOMEM * pAr = Ar; + } +*/ +#if defined(SDCC_STACK_AUTO) + #if defined(SDCC_USE_XSTACK) + #define _AUTOMEM __pdata + #elif defined(SDCC_STACK_TENBIT) + #define _AUTOMEM __xdata + #else + #define _AUTOMEM __idata + #endif +#elif defined(SDCC_MODEL_SMALL) + #define _AUTOMEM __data +#else + #define _AUTOMEM __xdata +#endif + +/* define _STATMEM to indicate the default storage class for + global/static variables. To be used with pointers to static variables. + + char Ar[10]; + void foo(void) + { + char _STATMEM * pAr = Ar; + } +*/ +#if defined(SDCC_MODEL_SMALL) + #define _STATMEM __data +#else + #define _STATMEM __xdata +#endif + +#endif diff --git a/device/include/asm/gbz80/features.h b/device/include/asm/gbz80/features.h new file mode 100644 index 0000000..dfaecfe --- /dev/null +++ b/device/include/asm/gbz80/features.h @@ -0,0 +1,23 @@ +/** Z80 specific features. + */ +#ifndef __SDC51_ASM_Z80_FEATURES_H +#define __SDC51_ASM_Z80_FEATURES_H 1 + +#define _REENTRANT +#define _CODE +#define _AUTOMEM +#define _STATMEM + +#define _SDCC_MANGLES_SUPPORT_FUNS 1 +#define _SDCC_Z80_STYLE_LIB_OPT 1 + +/* The following are disabled to make the dhrystone test more authentic. + */ +#define _SDCC_PORT_PROVIDES_MEMCPY 0 +#define _SDCC_PORT_PROVIDES_STRCMP 0 +/* Register allocator is as good as hand coded asm. Cool. */ +#define _SDCC_PORT_PROVIDES_STRCPY 0 + +#define _SDCC_MALLOC_TYPE_MLH 1 + +#endif diff --git a/device/include/asm/mcs51/features.h b/device/include/asm/mcs51/features.h new file mode 100644 index 0000000..637bd0e --- /dev/null +++ b/device/include/asm/mcs51/features.h @@ -0,0 +1,68 @@ +/*--------------------------------------------------------------------------- + MCS51 specific features. + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +---------------------------------------------------------------------------*/ + +#ifndef __SDC51_ASM_MCS51_FEATURES_H +#define __SDC51_ASM_MCS51_FEATURES_H 1 + +#define _REENTRANT __reentrant +#define _CODE __code + +/* define _AUTOMEM to indicate the default storage class for + automatic variables. To be used with pointers to automatic variables. + Cannot be used in reentrant declared functions! + + void foo(void) + { + char Ar[10]; + char _AUTOMEM * pAr = Ar; + } +*/ +#if defined(SDCC_STACK_AUTO) + #if defined(SDCC_USE_XSTACK) + #define _AUTOMEM __pdata + #else + #define _AUTOMEM __idata + #endif +#elif defined(SDCC_MODEL_SMALL) + #define _AUTOMEM __data +#elif defined(SDCC_MODEL_MEDIUM) + #define _AUTOMEM __pdata +#else + #define _AUTOMEM __xdata +#endif + +/* define _STATMEM to indicate the default storage class for + global/static variables. To be used with pointers to static variables. + + char Ar[10]; + void foo(void) + { + char _STATMEM * pAr = Ar; + } +*/ +#if defined(SDCC_MODEL_SMALL) + #define _STATMEM __data +#elif defined(SDCC_MODEL_MEDIUM) + #define _STATMEM __pdata +#else + #define _STATMEM __xdata +#endif + +#endif diff --git a/device/include/asm/pic/features.h b/device/include/asm/pic/features.h new file mode 100644 index 0000000..c2fa375 --- /dev/null +++ b/device/include/asm/pic/features.h @@ -0,0 +1,30 @@ +/* + * PIC14 port features. + * + * This file is part of the GNU PIC Library. + * + * June, 2006: adopted for pic14 + * Raphael Neider + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: features.h 4776 2007-04-29 13:15:51Z borutr $ + * + */ +#ifndef __PIC14_ASM_FEATURES_H +#define __PIC14_ASM_FEATURES_H 1 + +#define _REENTRANT + +#define _IL_REENTRANT +#define _FS_REENTRANT +#define _MATH_REENTRANT + +#define _CODE __code +#define _DATA __data +#define _AUTOMEM +#define _STATMEM + +#endif /* __PIC14_ASM_FEATURES_H */ diff --git a/device/include/asm/pic16/features.h b/device/include/asm/pic16/features.h new file mode 100644 index 0000000..f3a8405 --- /dev/null +++ b/device/include/asm/pic16/features.h @@ -0,0 +1,27 @@ +/* + * PIC16 port features. + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: features.h 3714 2005-04-02 13:13:53Z vrokas $ + * + */ +#ifndef __PIC16_ASM_FEATURES_H +#define __PIC16_ASM_FEATURES_H 1 + +#define _REENTRANT + +#define _IL_REENTRANT +#define _FS_REENTRANT +#define _MATH_REENTRANT + +#define _CODE __code +#define _DATA __data +#define _AUTOMEM +#define _STATMEM + +#endif /* __PIC16_ASM_FEATURES_H */ diff --git a/device/include/asm/z80/features.h b/device/include/asm/z80/features.h new file mode 100644 index 0000000..dfaecfe --- /dev/null +++ b/device/include/asm/z80/features.h @@ -0,0 +1,23 @@ +/** Z80 specific features. + */ +#ifndef __SDC51_ASM_Z80_FEATURES_H +#define __SDC51_ASM_Z80_FEATURES_H 1 + +#define _REENTRANT +#define _CODE +#define _AUTOMEM +#define _STATMEM + +#define _SDCC_MANGLES_SUPPORT_FUNS 1 +#define _SDCC_Z80_STYLE_LIB_OPT 1 + +/* The following are disabled to make the dhrystone test more authentic. + */ +#define _SDCC_PORT_PROVIDES_MEMCPY 0 +#define _SDCC_PORT_PROVIDES_STRCMP 0 +/* Register allocator is as good as hand coded asm. Cool. */ +#define _SDCC_PORT_PROVIDES_STRCPY 0 + +#define _SDCC_MALLOC_TYPE_MLH 1 + +#endif diff --git a/device/include/assert.h b/device/include/assert.h new file mode 100644 index 0000000..419a070 --- /dev/null +++ b/device/include/assert.h @@ -0,0 +1,38 @@ +/*------------------------------------------------------------------------- + assert.h - header file for assert ANSI routine + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#undef assert + +#ifdef NDEBUG + +/* Debugging disabled -- do not evaluate assertions. */ +#define assert(x) ((void)0) + +#else + +/* Debugging enabled -- verify assertions at run time. */ +void _assert(char *, const char *, unsigned int); +#define assert(x) ((x) == 0 ? _assert(#x, __FILE__, __LINE__):(void)0) + +#endif diff --git a/device/include/clean.mk b/device/include/clean.mk new file mode 100644 index 0000000..74b12cb --- /dev/null +++ b/device/include/clean.mk @@ -0,0 +1,22 @@ +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f Makefile *.dep + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean diff --git a/device/include/conf.mk b/device/include/conf.mk new file mode 100644 index 0000000..ac65f24 --- /dev/null +++ b/device/include/conf.mk @@ -0,0 +1,10 @@ +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_builddir) && $(SHELL) ./config.status + +# End of conf.mk diff --git a/device/include/ctype.h b/device/include/ctype.h new file mode 100644 index 0000000..67a24ef --- /dev/null +++ b/device/include/ctype.h @@ -0,0 +1,80 @@ +/*------------------------------------------------------------------------- + ctype.h - ANSI functions forward declarations + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + Revisions: + 1.0 - June.1.2000 1.0 - Bela Torok / bela.torok@kssg.ch + order: function definitions -> macros + corretced macro: isalpha(c) + added macros: _tolower(c), _toupper(c), tolower(c), toupper(c) toascii(c) + + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef __SDC51_CTYPE_H +#define __SDC51_CTYPE_H 1 + +#include + +#ifdef SDCC_STACK_AUTO + +extern char iscntrl (unsigned char ) _REENTRANT ; +extern char isdigit (unsigned char ) _REENTRANT ; +extern char isgraph (unsigned char ) _REENTRANT ; +extern char islower (unsigned char ) _REENTRANT ; +extern char isupper (unsigned char ) _REENTRANT ; +extern char isprint (unsigned char ) _REENTRANT ; +extern char ispunct (unsigned char ) _REENTRANT ; +extern char isspace (unsigned char ) _REENTRANT ; +extern char isxdigit (unsigned char ) _REENTRANT ; + +#else + +extern char iscntrl (unsigned char ) ; +extern char isdigit (unsigned char ) ; +extern char isgraph (unsigned char ) ; +extern char islower (unsigned char ) ; +extern char isupper (unsigned char ) ; +extern char isprint (unsigned char ) ; +extern char ispunct (unsigned char ) ; +extern char isspace (unsigned char ) ; +extern char isxdigit (unsigned char ) ; + +#endif + +#define isalnum(c) (isalpha(c) || isdigit(c)) +#define isalpha(c) (isupper(c) || islower(c)) + +/* ANSI versions of _tolower & _toupper +#define _tolower(c) ((c) - ('a' - 'A')) +#define _toupper(c) ((c) + ('a' - 'A')) +*/ + +/* The _tolower & _toupper functions below can applied to any + alpha characters regardless of the case (upper or lower) */ +#define _tolower(c) ((c) | ('a' - 'A')) +#define _toupper(c) ((c) & ~('a' - 'A')) + +#define tolower(c) ((isupper(c)) ? _tolower(c) : (c)) +#define toupper(c) ((islower(c)) ? _toupper(c) : (c)) +#define toascii(c) ((c) & 0x7F) + +#endif diff --git a/device/include/ds400rom.h b/device/include/ds400rom.h new file mode 100644 index 0000000..c6c5f30 --- /dev/null +++ b/device/include/ds400rom.h @@ -0,0 +1,35 @@ +/* Interface to DS80C400 ROM functions. */ + +#ifndef DS400ROM_H_ +#define DS400ROM_H_ + +extern unsigned char init_rom(void __xdata *loMem, + void __xdata *hiMem) __naked; + +extern unsigned long task_gettimemillis_long(void) __naked; + +extern unsigned char task_getthreadID(void) __naked; + +/** Timer reload value for 14.746 MHz crystal. */ +#define RELOAD_14_746 0xfb33 + +/** Timer reload value for 18.432 MHz crystal. */ +#define RELOAD_18_432 0xfa00 + +/** Timer reload value for 29.491 MHz crystal. */ +#define RELOAD_29_491 0xfd99 + +/** Timer reload value for 36.864 MHz crystal. */ +#define RELOAD_36_864 0xfd00 + +/** Timer reload value for 58.982 MHz crystal. */ +#define RELOAD_58_982 0xfecc + +/** Timer reload value for 73.728 MHz crystal. */ +#define RELOAD_73_728 0xfe80 + +extern unsigned int task_gettickreload(void); + +extern void task_settickreload(unsigned); + +#endif diff --git a/device/include/ds80c390.h b/device/include/ds80c390.h new file mode 100644 index 0000000..54f1265 --- /dev/null +++ b/device/include/ds80c390.h @@ -0,0 +1,190 @@ +/*------------------------------------------------------------------------- + Register Declarations for the DALLAS DS80C390 Processor + far from complete, e.g. no CAN + + Written By - Johan Knol, johan.knol@iduna.nl + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef DS80C390_H +#define DS80C390_H + +__sfr __at 0x80 P4; /* ce3..ce0, a19..a16 */ +__sfr __at 0x81 SP; /* stack pointer */ +__sfr __at 0x82 DPL; /* data pointer 0 lsb */ +__sfr __at 0x83 DPH; /* data pointer 0 msb */ +__sfr __at 0x84 DPL1; /* data pointer 1 lsb */ +__sfr __at 0x85 DPH1; /* data pointer 1 msb */ +__sfr __at 0x86 DPS; /* data pointer select */ +__sfr __at 0x87 PCON; /* power control */ +__sfr __at 0x88 TCON; /* timer/counter control */ + __sbit __at 0x88 IT0; + __sbit __at 0x89 IE0; + __sbit __at 0x8a IT1; + __sbit __at 0x8b IE1; + __sbit __at 0x8c TR0; + __sbit __at 0x8d TF0; + __sbit __at 0x8e TR1; + __sbit __at 0x8f TF1; +__sfr __at 0x89 TMOD; /* timer mode control */ +__sfr __at 0x8a TL0; /* timer 0 lsb */ +__sfr __at 0x8b TL1; /* timer 1 msb */ +__sfr __at 0x8c TH0; /* timer 0 msb */ +__sfr __at 0x8d TH1; /* timer 1 msb */ +__sfr __at 0x8e CKCON; /* clock control */ +__sfr __at 0x90 P1; + __sbit __at 0x90 T2; + __sbit __at 0x91 T2EX; + __sbit __at 0x92 RXD1; + __sbit __at 0x93 TXD1; + __sbit __at 0x94 INT2; + __sbit __at 0x95 INT3; + __sbit __at 0x96 INT4; + __sbit __at 0x97 INT5; +__sfr __at 0x91 EXIF; /* external interrupt flag */ +__sfr __at 0x92 P4CNT; +__sfr __at 0x93 DPX; /* extended datapointer 0 */ +__sfr __at 0x95 DPX1; /* extended datapointer 1 */ +__sfr __at 0x98 SCON0; /* serial 0 control */ + __sbit __at 0x98 RI_0; + __sbit __at 0x99 TI_0; + __sbit __at 0x9a RB8_0; + __sbit __at 0x9b TB8_0; + __sbit __at 0x9c REN_0; + __sbit __at 0x9d SM2_0; + __sbit __at 0x9e SM1_0; + __sbit __at 0x9f SM0_0; + __sbit __at 0x9f FE_0; /* depending on SMOD0 */ +__sfr __at 0x99 SBUF0; /* serial 0 data buffer */ +__sfr __at 0x9b ESP; /* extended stack pointer */ +__sfr __at 0x9c AP; /* address page */ +__sfr __at 0x9d ACON; /* address control */ +__sfr __at 0xa0 P2; /* never mind the sbits */ +__sfr __at 0xa1 P5; +__sfr __at 0xa2 P5CNT; +__sfr __at 0xa8 IE; /* interrupt enable */ + __sbit __at 0xa8 EX0; + __sbit __at 0xa9 ET0; + __sbit __at 0xaa EX1; + __sbit __at 0xab ET1; + __sbit __at 0xac ES0; + __sbit __at 0xad ET2; + __sbit __at 0xae ES1; + __sbit __at 0xaf EA; +__sfr __at 0xb0 P3; + __sbit __at 0xb0 RXD0; + __sbit __at 0xb1 TXD0; + __sbit __at 0xb2 INT0; + __sbit __at 0xb3 INT1; + __sbit __at 0xb4 T0; + __sbit __at 0xb5 T1; + __sbit __at 0xb6 WR; + __sbit __at 0xb7 RD; +__sfr __at 0xb8 IP; /* interupt priority */ + __sbit __at 0xb8 PX0; /* external 0 */ + __sbit __at 0xb9 PT0; /* timer 0 */ + __sbit __at 0xba PX1; /* external 1 */ + __sbit __at 0xbb PT1; /* timer 1 */ + __sbit __at 0xbc PS0; /* serial port 0 */ + __sbit __at 0xbd PT2; /* timer 2 */ + __sbit __at 0xbe PS1; /* serial port 1 */ +__sfr __at 0xc0 SCON1; /* serial 1 control */ + __sbit __at 0xc0 RI_1; + __sbit __at 0xc1 TI_1; + __sbit __at 0xc2 RB8_1; + __sbit __at 0xc3 TB8_1; + __sbit __at 0xc4 REN_1; + __sbit __at 0xc5 SM2_1; + __sbit __at 0xc6 SM1_1; + __sbit __at 0xc7 SM0_1; + __sbit __at 0xc7 FE_1; /* depending on SMOD0 */ +__sfr __at 0xc1 SBUF1; /* serial 1 data buffer */ +__sfr __at 0xc4 PMR; /* power managment */ +__sfr __at 0xc6 MCON; /* memory control register */ +__sfr __at 0xc7 TA; /* timed access register */ +__sfr __at 0xc8 T2CON; /* timer 2 control */ + __sbit __at 0xc8 CP_RL; /* capture/reload */ + __sbit __at 0xc9 C_T; /* count/timer */ + __sbit __at 0xca TR2; /* stop/run */ + __sbit __at 0xcb EXEN2; + __sbit __at 0xcc TCLK; + __sbit __at 0xcd RCLK; + __sbit __at 0xce EXF2; + __sbit __at 0xcf TF2; /* overflow flag */ +__sfr __at 0xc9 T2MOD; /* timer 2 mode */ +__sfr __at 0xca RCAP2L; /* timer 2 capture/reload */ +__sfr __at 0xca RTL2; /* depends on CP_RL */ +__sfr __at 0xcb RCAP2H; +__sfr __at 0xcb RTH2; +__sfr __at 0xcc TL2; /* timer 2 lsb */ +__sfr __at 0xcd TH2; /* timer 2 msb */ +__sfr __at 0xd0 PSW; /* program status word (byte actually) */ + __sbit __at 0xd0 P; /* parity */ + __sbit __at 0xd1 F1; /* user flag 1 */ + __sbit __at 0xd2 OV; /* overflow flag */ + __sbit __at 0xd3 RS0; /* register select l */ + __sbit __at 0xd4 RS1; /* register select h */ + __sbit __at 0xd5 F0; /* user flag 0 */ + __sbit __at 0xd6 AC; /* auxiliary carry flag */ + __sbit __at 0xd7 CY; /* carry flag */ +__sfr __at 0xd1 MCNT0; /* arithmetic accellerator */ +__sfr __at 0xd2 MCNT1; +__sfr __at 0xd3 MA; +__sfr __at 0xd4 MB; +__sfr __at 0xd5 MC; +__sfr __at 0xd8 WDCON; /* watch dog */ + __sbit __at 0xd8 RWT; + __sbit __at 0xd9 EWT; + __sbit __at 0xda WDRF; + __sbit __at 0xdb WDIF; + __sbit __at 0xdc PFI; + __sbit __at 0xdd EPFI; + __sbit __at 0xde POR; + __sbit __at 0xdf SMOD_1; +__sfr __at 0xe0 ACC; /* accumulator */ +__sfr __at 0xe8 EIE; /* extended interrupt enable */ + __sbit __at 0xe8 EX2; + __sbit __at 0xe9 EX3; + __sbit __at 0xea EX4; + __sbit __at 0xeb EX5; + __sbit __at 0xec EWDI; + __sbit __at 0xed C1IE; + __sbit __at 0xee C0IE; + __sbit __at 0xef CANBIE; +__sfr __at 0xea MXAX; /* extended address register */ +__sfr __at 0xf0 B; /* aux accumulator */ +__sfr __at 0xf8 EIP; /* extended interrupt priority */ + __sbit __at 0xf8 PX2; + __sbit __at 0xf9 PX3; + __sbit __at 0xfa PX4; + __sbit __at 0xfb PX5; + __sbit __at 0xfc PWDI; + __sbit __at 0xfd C1IP; + __sbit __at 0xfe C0IP; + __sbit __at 0xff CANBIP; + +/* WORD/DWORD Registers */ + +__sfr16 __at (0x8C8A) TMR0; /* TIMER 0 COUNTER */ +__sfr16 __at (0x8D8B) TMR1; /* TIMER 1 COUNTER */ +__sfr16 __at (0xCDCC) TMR2; /* TIMER 2 COUNTER */ +__sfr16 __at (0xCBCA) RCAP2; /* TIMER 2 CAPTURE REGISTER WORD */ + +#endif /* DS80C390_H */ diff --git a/device/include/errno.h b/device/include/errno.h new file mode 100644 index 0000000..880cdab --- /dev/null +++ b/device/include/errno.h @@ -0,0 +1,31 @@ +/* errno.h: Error codes used in the math functions + + Copyright (C) 2001 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +#ifndef _INC_ERRNO +#define _INC_ERRNO + +extern int errno; + +/* Error Codes: */ + +#define EDOM 33 /* Math argument out of domain of functions */ +#define ERANGE 34 /* Math result not representable */ + +#endif /* _INC_ERRNO */ diff --git a/device/include/float.h b/device/include/float.h new file mode 100644 index 0000000..616c34f --- /dev/null +++ b/device/include/float.h @@ -0,0 +1,98 @@ +/*------------------------------------------------------------------------- + float.h - ANSI functions forward declarations + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef __SDC51_FLOAT_H +#define __SDC51_FLOAT_H 1 + +#include + +#define FLT_RADIX 2 +#define FLT_MANT_DIG 24 +#define FLT_EPSILON 1.192092896E-07F +#define FLT_DIG 6 +#define FLT_MIN_EXP (-125) +#define FLT_MIN 1.175494351E-38F +#define FLT_MIN_10_EXP (-37) +#define FLT_MAX_EXP (+128) +#define FLT_MAX 3.402823466E+38F +#define FLT_MAX_10_EXP (+38) + +/* the following deal with IEEE single-precision numbers */ +#define EXCESS 126 +#define SIGNBIT ((unsigned long)0x80000000) +#define __INFINITY ((unsigned long)0x7F800000) +#define HIDDEN (unsigned long)(1ul << 23) +#define SIGN(fp) (((unsigned long)(fp) >> (8*sizeof(fp)-1)) & 1) +#define EXP(fp) (((unsigned long)(fp) >> 23) & (unsigned int) 0x00FF) +#define MANT(fp) (((fp) & (unsigned long)0x007FFFFF) | HIDDEN) +#define NORM 0xff000000 +#define PACK(s,e,m) ((s) | ((unsigned long)(e) << 23) | (m)) + +float __uchar2fs (unsigned char); +float __schar2fs (signed char); +float __uint2fs (unsigned int); +float __sint2fs (signed int); +float __ulong2fs (unsigned long); +float __slong2fs (signed long); +unsigned char __fs2uchar (float); +signed char __fs2schar (float); +unsigned int __fs2uint (float); +signed int __fs2sint (float); +unsigned long __fs2ulong (float); +signed long __fs2slong (float); + +float __fsadd (float, float); +float __fssub (float, float); +float __fsmul (float, float); +float __fsdiv (float, float); + +char __fslt (float, float); +char __fseq (float, float); +char __fsgt (float, float); + + +#if defined(SDCC_FLOAT_LIB) && defined(SDCC_mcs51) && !defined(SDCC_USE_XSTACK) && !defined(_SDCC_NO_ASM_LIB_FUNCS) + +#define FLOAT_ASM_MCS51 + +/* This adds extra code for proper round-off, in + an attempt to match the results from gcc. */ +#define FLOAT_FULL_ACCURACY + +/* This adds about 66 bytes to the code size and + significantly speeds up shift operations more + than 8 bits (common when subtracting numbers + of significantly different magnitude and scaling + to fixed point) */ +#define FLOAT_SHIFT_SPEEDUP + +#define sign_a psw.1 +#define sign_b psw.5 +#define exp_a dpl +#define exp_b dph +#endif /* using mcs51 assembly */ + + +#endif /* __SDC51_FLOAT_H */ + diff --git a/device/include/hc08/mc68hc908apxx.h b/device/include/hc08/mc68hc908apxx.h new file mode 100644 index 0000000..c56f862 --- /dev/null +++ b/device/include/hc08/mc68hc908apxx.h @@ -0,0 +1,647 @@ +/*------------------------------------------------------------------------- + Register Declarations for Motorola MC68HC908AP16/32/64 + + Copyright (c) 2004, Lucas Loizaga + + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (__at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef MC68HC908APXX_H +#define MC68HC908APXX_H + +#ifndef _UINT8 + #define _UINT8 unsigned char +#endif +#ifndef _UINT16 + #define _UINT16 unsigned int +#endif +#ifndef _VOLDATA + #define _VOLDATA volatile __data +#endif +#ifndef _VOLXDATA + #define _VOLXDATA volatile __xdata +#endif + +struct __hc08_bits +{ + unsigned int bit0:1; + unsigned int bit1:1; + unsigned int bit2:1; + unsigned int bit3:1; + unsigned int bit4:1; + unsigned int bit5:1; + unsigned int bit6:1; + unsigned int bit7:1; +}; + + +_VOLDATA _UINT8 __at 0x00 PTA; /* Port A Data Register */ +#define PORTA PTA /* Alias for PTA */ + #define PTA0 ((struct __hc08_bits *)(&PTA))->bit0 + #define PTA1 ((struct __hc08_bits *)(&PTA))->bit1 + #define PTA2 ((struct __hc08_bits *)(&PTA))->bit2 + #define PTA3 ((struct __hc08_bits *)(&PTA))->bit3 + #define PTA4 ((struct __hc08_bits *)(&PTA))->bit4 + #define PTA5 ((struct __hc08_bits *)(&PTA))->bit5 + #define PTA6 ((struct __hc08_bits *)(&PTA))->bit6 + #define PTA7 ((struct __hc08_bits *)(&PTA))->bit7 + +_VOLDATA _UINT8 __at 0x01 PTB; /* Port B Data Register */ +#define PORTB PTB /* Alias for PTB */ + #define PTB0 ((struct __hc08_bits *)(&PTB))->bit0 + #define PTB1 ((struct __hc08_bits *)(&PTB))->bit1 + #define PTB2 ((struct __hc08_bits *)(&PTB))->bit2 + #define PTB3 ((struct __hc08_bits *)(&PTB))->bit3 + #define PTB4 ((struct __hc08_bits *)(&PTB))->bit4 + #define PTB5 ((struct __hc08_bits *)(&PTB))->bit5 + #define PTB6 ((struct __hc08_bits *)(&PTB))->bit6 + #define PTB7 ((struct __hc08_bits *)(&PTB))->bit7 + +_VOLDATA _UINT8 __at 0x02 PTC; /* Port C Data Register */ +#define PORTC PTC /* Alias for PTC */ + #define PTC0 ((struct __hc08_bits *)(&PTC))->bit0 + #define PTC1 ((struct __hc08_bits *)(&PTC))->bit1 + #define PTC2 ((struct __hc08_bits *)(&PTC))->bit2 + #define PTC3 ((struct __hc08_bits *)(&PTC))->bit3 + #define PTC4 ((struct __hc08_bits *)(&PTC))->bit4 + #define PTC5 ((struct __hc08_bits *)(&PTC))->bit5 + #define PTC6 ((struct __hc08_bits *)(&PTC))->bit6 + #define PTC7 ((struct __hc08_bits *)(&PTC))->bit7 + +_VOLDATA _UINT8 __at 0x03 PTD; /* Port D Data Register */ +#define PORTD PTD /* Alias for PTD */ + #define PTD0 ((struct __hc08_bits *)(&PTD))->bit0 + #define PTD1 ((struct __hc08_bits *)(&PTD))->bit1 + #define PTD2 ((struct __hc08_bits *)(&PTD))->bit2 + #define PTD3 ((struct __hc08_bits *)(&PTD))->bit3 + #define PTD4 ((struct __hc08_bits *)(&PTD))->bit4 + #define PTD5 ((struct __hc08_bits *)(&PTD))->bit5 + #define PTD6 ((struct __hc08_bits *)(&PTD))->bit6 + #define PTD7 ((struct __hc08_bits *)(&PTD))->bit7 + +_VOLDATA _UINT8 __at 0x04 DDRA; /* Data Direction Register A */ + #define DDRA0 ((struct __hc08_bits *)(&DDRA))->bit0 + #define DDRA1 ((struct __hc08_bits *)(&DDRA))->bit1 + #define DDRA2 ((struct __hc08_bits *)(&DDRA))->bit2 + #define DDRA3 ((struct __hc08_bits *)(&DDRA))->bit3 + #define DDRA4 ((struct __hc08_bits *)(&DDRA))->bit4 + #define DDRA5 ((struct __hc08_bits *)(&DDRA))->bit5 + #define DDRA6 ((struct __hc08_bits *)(&DDRA))->bit6 + #define DDRA7 ((struct __hc08_bits *)(&DDRA))->bit7 + +_VOLDATA _UINT8 __at 0x05 DDRB; /* Data Direction Register B */ + #define DDRB0 ((struct __hc08_bits *)(&DDRB))->bit0 + #define DDRB1 ((struct __hc08_bits *)(&DDRB))->bit1 + #define DDRB2 ((struct __hc08_bits *)(&DDRB))->bit2 + #define DDRB3 ((struct __hc08_bits *)(&DDRB))->bit3 + #define DDRB4 ((struct __hc08_bits *)(&DDRB))->bit4 + #define DDRB5 ((struct __hc08_bits *)(&DDRB))->bit5 + #define DDRB6 ((struct __hc08_bits *)(&DDRB))->bit6 + #define DDRB7 ((struct __hc08_bits *)(&DDRB))->bit7 + +_VOLDATA _UINT8 __at 0x06 DDRC; /* Data Direction Register C */ + #define DDRC0 ((struct __hc08_bits *)(&DDRC))->bit0 + #define DDRC1 ((struct __hc08_bits *)(&DDRC))->bit1 + #define DDRC2 ((struct __hc08_bits *)(&DDRC))->bit2 + #define DDRC3 ((struct __hc08_bits *)(&DDRC))->bit3 + #define DDRC4 ((struct __hc08_bits *)(&DDRC))->bit4 + #define DDRC5 ((struct __hc08_bits *)(&DDRC))->bit5 + #define DDRC6 ((struct __hc08_bits *)(&DDRC))->bit6 + #define DDRC7 ((struct __hc08_bits *)(&DDRC))->bit7 + +_VOLDATA _UINT8 __at 0x07 DDRD; /* Data Direction Register D */ + #define DDRD0 ((struct __hc08_bits *)(&DDRD))->bit0 + #define DDRD1 ((struct __hc08_bits *)(&DDRD))->bit1 + #define DDRD2 ((struct __hc08_bits *)(&DDRD))->bit2 + #define DDRD3 ((struct __hc08_bits *)(&DDRD))->bit3 + #define DDRD4 ((struct __hc08_bits *)(&DDRD))->bit4 + #define DDRD5 ((struct __hc08_bits *)(&DDRD))->bit5 + #define DDRD6 ((struct __hc08_bits *)(&DDRD))->bit6 + #define DDRD7 ((struct __hc08_bits *)(&DDRD))->bit7 + +_VOLDATA _UINT8 __at 0x0C LEDA; /* PORTA Led Control Register */ + #define LEDA0 ((struct __hc08_bits *)(&LEDA))->bit0 + #define LEDA1 ((struct __hc08_bits *)(&LEDA))->bit1 + #define LEDA2 ((struct __hc08_bits *)(&LEDA))->bit2 + #define LEDA3 ((struct __hc08_bits *)(&LEDA))->bit3 + #define LEDA4 ((struct __hc08_bits *)(&LEDA))->bit4 + #define LEDA5 ((struct __hc08_bits *)(&LEDA))->bit5 + #define LEDA6 ((struct __hc08_bits *)(&LEDA))->bit6 + #define LEDA7 ((struct __hc08_bits *)(&LEDA))->bit7 + +_VOLDATA _UINT8 __at 0x10 SPCR; /* SPI Control Register */ + #define SPRIE ((struct __hc08_bits *)(&SPCR))->bit7 + #define DMAS ((struct __hc08_bits *)(&SPCR))->bit6 + #define SPMSTR ((struct __hc08_bits *)(&SPCR))->bit5 + #define CPOL ((struct __hc08_bits *)(&SPCR))->bit4 + #define CPHA ((struct __hc08_bits *)(&SPCR))->bit3 + #define SPWOM ((struct __hc08_bits *)(&SPCR))->bit2 + #define SPE ((struct __hc08_bits *)(&SPCR))->bit1 + #define SPTIE ((struct __hc08_bits *)(&SPCR))->bit0 + +_VOLDATA _UINT8 __at 0x11 SPSCR; /* SPI Status and Control Register */ + #define SPRF ((struct __hc08_bits *)(&SPSCR))->bit7 + #define ERRIE ((struct __hc08_bits *)(&SPSCR))->bit6 + #define OVRF ((struct __hc08_bits *)(&SPSCR))->bit5 + #define MODF ((struct __hc08_bits *)(&SPSCR))->bit4 + #define SPTE ((struct __hc08_bits *)(&SPSCR))->bit3 + #define MODFEN ((struct __hc08_bits *)(&SPSCR))->bit2 + #define SPR1 ((struct __hc08_bits *)(&SPSCR))->bit1 + #define SPR0 ((struct __hc08_bits *)(&SPSCR))->bit0 + +_VOLDATA _UINT8 __at 0x12 SPDR; /* SPI Data Register */ + + +_VOLDATA _UINT8 __at 0x13 SCC1; /* SCI Control Register 1 */ + #define LOOPS ((struct __hc08_bits *)(&SCC1))->bit7 + #define ENSCI ((struct __hc08_bits *)(&SCC1))->bit6 + #define TXINV ((struct __hc08_bits *)(&SCC1))->bit5 + #define M ((struct __hc08_bits *)(&SCC1))->bit4 + #define WAKE ((struct __hc08_bits *)(&SCC1))->bit3 + #define ILTY ((struct __hc08_bits *)(&SCC1))->bit2 + #define PEN ((struct __hc08_bits *)(&SCC1))->bit1 + #define PTY ((struct __hc08_bits *)(&SCC1))->bit0 + + +_VOLDATA _UINT8 __at 0x14 SCC2; /* SCI Control Register 2 */ + #define SCTIE ((struct __hc08_bits *)(&SCC2))->bit7 + #define TCIE ((struct __hc08_bits *)(&SCC2))->bit6 + #define SCRIE ((struct __hc08_bits *)(&SCC2))->bit5 + #define ILIE ((struct __hc08_bits *)(&SCC2))->bit4 + #define TE ((struct __hc08_bits *)(&SCC2))->bit3 + #define RE ((struct __hc08_bits *)(&SCC2))->bit2 + #define WRU ((struct __hc08_bits *)(&SCC2))->bit1 + #define SBK ((struct __hc08_bits *)(&SCC2))->bit0 + +_VOLDATA _UINT8 __at 0x15 SCC3; /* SCI Control Register 3 */ + #define SCC3_R8 ((struct __hc08_bits *)(&SCC3))->bit7 + #define SCC3_T8 ((struct __hc08_bits *)(&SCC3))->bit6 + #define DMARE ((struct __hc08_bits *)(&SCC3))->bit5 + #define DMATE ((struct __hc08_bits *)(&SCC3))->bit4 + #define ORIE ((struct __hc08_bits *)(&SCC3))->bit3 + #define NEIE ((struct __hc08_bits *)(&SCC3))->bit2 + #define FEIE ((struct __hc08_bits *)(&SCC3))->bit1 + #define PEIE ((struct __hc08_bits *)(&SCC3))->bit0 + +_VOLDATA _UINT8 __at 0x16 SCS1; /* SCI Status Register 1 */ + #define SCTE ((struct __hc08_bits *)(&SCS1))->bit7 + #define TC ((struct __hc08_bits *)(&SCS1))->bit6 + #define SCRF ((struct __hc08_bits *)(&SCS1))->bit5 + #define IDLE ((struct __hc08_bits *)(&SCS1))->bit4 + #define OR ((struct __hc08_bits *)(&SCS1))->bit3 + #define NF ((struct __hc08_bits *)(&SCS1))->bit2 + #define FE ((struct __hc08_bits *)(&SCS1))->bit1 + #define PE ((struct __hc08_bits *)(&SCS1))->bit0 + +_VOLDATA _UINT8 __at 0x17 SCS2; /* SCI Status Register 2 */ + #define RPF ((struct __hc08_bits *)(&SCS2))->bit0 + #define BKF ((struct __hc08_bits *)(&SCS2))->bit1 + /* Bits 2-7 not implemented */ + +_VOLDATA _UINT8 __at 0x18 SCDR; /* SCI Data Register */ + +_VOLDATA _UINT8 __at 0x19 SCBR; /* SCI Baud Rate Register */ + #define SCP1 ((struct __hc08_bits *)(&SCBR))->bit5 + #define SCP0 ((struct __hc08_bits *)(&SCBR))->bit4 + #define R ((struct __hc08_bits *)(&SCBR))->bit3 + #define SCR2 ((struct __hc08_bits *)(&SCBR))->bit2 + #define SCR1 ((struct __hc08_bits *)(&SCBR))->bit1 + #define SCR0 ((struct __hc08_bits *)(&SCBR))->bit0 + /*-- Bits 6 and 7 do not exist */ + +_VOLDATA _UINT8 __at 0x1a INTKBSCR; /* Keyboard Status and Control Register */ + #define KEYF ((struct __hc08_bits *)(&INTKBSCR))->bit3 + #define ACKK ((struct __hc08_bits *)(&INTKBSCR))->bit2 + #define IMASKK ((struct __hc08_bits *)(&INTKBSCR))->bit1 + #define MODEK ((struct __hc08_bits *)(&INTKBSCR))->bit0 + /*-- Bits 4-7 do not exist */ + +_VOLDATA _UINT8 __at 0x1b INTKBIER; /* Keyboard Interrupt Enable Register */ + #define KBIE7 ((struct __hc08_bits *)(&INTKBIER))->bit7 + #define KBIE6 ((struct __hc08_bits *)(&INTKBIER))->bit6 + #define KBIE5 ((struct __hc08_bits *)(&INTKBIER))->bit5 + #define KBIE4 ((struct __hc08_bits *)(&INTKBIER))->bit4 + #define KBIE3 ((struct __hc08_bits *)(&INTKBIER))->bit3 + #define KBIE2 ((struct __hc08_bits *)(&INTKBIER))->bit2 + #define KBIE1 ((struct __hc08_bits *)(&INTKBIER))->bit1 + #define KBIE0 ((struct __hc08_bits *)(&INTKBIER))->bit0 + +_VOLDATA _UINT8 __at 0x1C INTSCR2; /* Keyboard Status and Control Register */ + #define PUC0ENB ((struct __hc08_bits *)(&INTSCR2))->bit6 + #define IRQF2 ((struct __hc08_bits *)(&INTSCR2))->bit3 + #define ACK2 ((struct __hc08_bits *)(&INTSCR2))->bit2 + #define IMASK2 ((struct __hc08_bits *)(&INTSCR2))->bit1 + #define MODE2 ((struct __hc08_bits *)(&INTSCR2))->bit0 + +_VOLDATA _UINT8 __at 0x1D CONFIG2; /* Configuration Register 2 */ +/* CONFIG2 is one-time writeble, so can't use bitfields */ + + +_VOLDATA _UINT8 __at 0x1E INTSCR1; /* IRQ status/control */ + #define IRQF1 ((struct __hc08_bits *)(&INTSCR1))->bit3 + #define ACK1 ((struct __hc08_bits *)(&INTSCR1))->bit2 + #define IMASK1 ((struct __hc08_bits *)(&INTSCR1))->bit1 + #define MODE1 ((struct __hc08_bits *)(&INTSCR1))->bit0 + /* Bits 4-7 unimplemented */ + +_VOLDATA _UINT8 __at 0x1f CONFIG1; /* Configuration Register 1 */ +/* CONFIG1 is one-time writeable, so can't use bitfields */ + +_VOLDATA _UINT8 __at 0x20 T1SC; /* TIM 1 Status and Control */ + #define PS0 ((struct __hc08_bits *)(&T1SC))->bit0 + #define PS1 ((struct __hc08_bits *)(&T1SC))->bit1 + #define PS2 ((struct __hc08_bits *)(&T1SC))->bit2 + #define TRST ((struct __hc08_bits *)(&T1SC))->bit4 + #define TSTOP ((struct __hc08_bits *)(&T1SC))->bit5 + #define TOIE ((struct __hc08_bits *)(&T1SC))->bit6 + #define TOF ((struct __hc08_bits *)(&T1SC))->bit7 + +_VOLDATA _UINT16 __at 0x21 T1CNT; /* TIM1 Counter High & Low Registers */ +_VOLDATA _UINT8 __at 0x21 T1CNTH; /* TIM1 Counter Register High */ +_VOLDATA _UINT8 __at 0x22 T1CNTL; /* TIM1 Counter Register Low */ + +_VOLDATA _UINT16 __at 0x23 T1MOD; /* TIM1 Counter Modulo High & Low Registers */ +_VOLDATA _UINT8 __at 0x23 T1MODH; /* TIM1 Counter Modulo Register High */ +_VOLDATA _UINT8 __at 0x24 T1MODL; /* TIM1 Counter Modulo Register Low */ + +_VOLDATA _UINT8 __at 0x25 T1SC0; /* TIM1 Channel 0 Status and Control Register */ + #define CH0MAX ((struct __hc08_bits *)(&T1SC0))->bit0 + #define TOV0 ((struct __hc08_bits *)(&T1SC0))->bit1 + #define ELS0A ((struct __hc08_bits *)(&T1SC0))->bit2 + #define ELS0B ((struct __hc08_bits *)(&T1SC0))->bit3 + #define MS0A ((struct __hc08_bits *)(&T1SC0))->bit4 + #define MS0B ((struct __hc08_bits *)(&T1SC0))->bit5 + #define CH0IE ((struct __hc08_bits *)(&T1SC0))->bit6 + #define CH0F ((struct __hc08_bits *)(&T1SC0))->bit7 + +_VOLDATA _UINT16 __at 0x26 T1CH0; /* TIM1 Channel 0 High & Low Registers */ +_VOLDATA _UINT8 __at 0x26 T1CH0H; /* TIM1 Channel 0 Register High */ +_VOLDATA _UINT8 __at 0x27 T1CH0L; /* TIM1 Channel 0 Register Low */ + +_VOLDATA _UINT8 __at 0x28 T1SC1; /* TIM1 Channel 1 Status and Control Register */ + #define CH1MAX ((struct __hc08_bits *)(&T1SC1))->bit0 + #define TOV1 ((struct __hc08_bits *)(&T1SC1))->bit1 + #define ELS1A ((struct __hc08_bits *)(&T1SC1))->bit2 + #define ELS1B ((struct __hc08_bits *)(&T1SC1))->bit3 + #define MS1A ((struct __hc08_bits *)(&T1SC1))->bit4 + #define CH1IE ((struct __hc08_bits *)(&T1SC1))->bit6 + #define CH1F ((struct __hc08_bits *)(&T1SC1))->bit7 + +_VOLDATA _UINT16 __at 0x29 T1CH1; /* TIM1 Channel 1 High & Low Registers */ +_VOLDATA _UINT8 __at 0x29 T1CH1H; /* TIM1 Channel 1 Register High */ +_VOLDATA _UINT8 __at 0x2A T1CH1L; /* TIM1 Channel 1 Register Low */ + +/*------------------*/ +/* TIM 2 REGISTERS */ +/*------------------*/ + +_VOLDATA _UINT8 __at 0x2B T2SC; /* TIM 2 Status and Control */ + #define PS0_2 ((struct __hc08_bits *)(&T2SC))->bit0 + #define PS1_2 ((struct __hc08_bits *)(&T2SC))->bit1 + #define PS2_2 ((struct __hc08_bits *)(&T2SC))->bit2 + #define TRST_2 ((struct __hc08_bits *)(&T2SC))->bit4 + #define TSTOP_2 ((struct __hc08_bits *)(&T2SC))->bit5 + #define TOIE_2 ((struct __hc08_bits *)(&T2SC))->bit6 + #define TOF_2 ((struct __hc08_bits *)(&T2SC))->bit7 + +_VOLDATA _UINT16 __at 0x2C T2CNT; /* TIM2 Counter High & Low Registers */ +_VOLDATA _UINT8 __at 0x2C T2CNTH; /* TIM2 Counter Register High */ +_VOLDATA _UINT8 __at 0x2D T2CNTL; /* TIM2 Counter Register Low */ + +_VOLDATA _UINT16 __at 0x2E T2MOD; /* TIM2 Counter Modulo High & Low Registers */ +_VOLDATA _UINT8 __at 0x2E T2MODH; /* TIM2 Counter Modulo Register High */ +_VOLDATA _UINT8 __at 0x2F T2MODL; /* TIM2 Counter Modulo Register Low */ + +_VOLDATA _UINT8 __at 0x30 T2SC0; /* TIM2 Channel 0 Status and Control Register */ + #define CH0MAX_2 ((struct __hc08_bits *)(&T2SC0))->bit0 + #define TOV0_2 ((struct __hc08_bits *)(&T2SC0))->bit1 + #define ELS0A_2 ((struct __hc08_bits *)(&T2SC0))->bit2 + #define ELS0B_2 ((struct __hc08_bits *)(&T2SC0))->bit3 + #define MS0A_2 ((struct __hc08_bits *)(&T2SC0))->bit4 + #define MS0B_2 ((struct __hc08_bits *)(&T2SC0))->bit5 + #define CH0IE_2 ((struct __hc08_bits *)(&T2SC0))->bit6 + #define CH0F_2 ((struct __hc08_bits *)(&T2SC0))->bit7 + +_VOLDATA _UINT16 __at 0x31 T2CH0; /* TIM2 Channel 0 High & Low Registers */ +_VOLDATA _UINT8 __at 0x31 T2CH0H; /* TIM2 Channel 0 Register High */ +_VOLDATA _UINT8 __at 0x32 T2CH0L; /* TIM2 Channel 0 Register Low */ + +_VOLDATA _UINT8 __at 0x33 T2SC1; /* TIM2 Channel 1 Status and Control Register */ + #define CH1MAX_2 ((struct __hc08_bits *)(&T2SC1))->bit0 + #define TOV1_2 ((struct __hc08_bits *)(&T2SC1))->bit1 + #define ELS1A_2 ((struct __hc08_bits *)(&T2SC1))->bit2 + #define ELS1B_2 ((struct __hc08_bits *)(&T2SC1))->bit3 + #define MS1A_2 ((struct __hc08_bits *)(&T2SC1))->bit4 + #define CH1IE_2 ((struct __hc08_bits *)(&T2SC1))->bit6 + #define CH1F_2 ((struct __hc08_bits *)(&T2SC1))->bit7 + +_VOLDATA _UINT16 __at 0x34 T2CH1; /* TIM2 Channel 1 High & Low Registers */ +_VOLDATA _UINT8 __at 0x34 T2CH1H; /* TIM2 Channel 1 Register High */ +_VOLDATA _UINT8 __at 0x35 T2CH1L; /* TIM2 Channel 1 Register Low */ + +_VOLDATA _UINT8 __at 0x36 PCTL; /* PLL Control Register */ + #define PLLIE ((struct __hc08_bits *)(&PCTL))->bit7 + #define PLLF ((struct __hc08_bits *)(&PCTL))->bit6 + #define PLLON ((struct __hc08_bits *)(&PCTL))->bit5 + #define BCS ((struct __hc08_bits *)(&PCTL))->bit4 + #define PRE1 ((struct __hc08_bits *)(&PCTL))->bit3 + #define PRE0 ((struct __hc08_bits *)(&PCTL))->bit2 + #define VPR1 ((struct __hc08_bits *)(&PCTL))->bit1 + #define VPR0 ((struct __hc08_bits *)(&PCTL))->bit0 + +_VOLDATA _UINT8 __at 0x37 PBWC; /* PLL Bandwidth Control Register */ + #define AUTO ((struct __hc08_bits *)(&PBWC))->bit7 + #define LOCK ((struct __hc08_bits *)(&PBWC))->bit6 + #define ACQ ((struct __hc08_bits *)(&PBWC))->bit5 + /* Bits 1-4, Unimplemented */ + /* Bit 0, Reserved */ + +_VOLDATA _UINT8 __at 0x38 PMSH; /* PLL Multiplier Select High */ + #define MUL11 ((struct __hc08_bits *)(&PMSH))->bit3 + #define MUL10 ((struct __hc08_bits *)(&PMSH))->bit2 + #define MUL9 ((struct __hc08_bits *)(&PMSH))->bit1 + #define MUL8 ((struct __hc08_bits *)(&PMSH))->bit0 + /* Bits 4-7 unimplemented */ + +_VOLDATA _UINT8 __at 0x39 PMSL; /* PLL Multiplir Select Low */ + #define MUL7 ((struct __hc08_bits *)(&PMSL))->bit7 + #define MUL6 ((struct __hc08_bits *)(&PMSL))->bit6 + #define MUL5 ((struct __hc08_bits *)(&PMSL))->bit5 + #define MUL4 ((struct __hc08_bits *)(&PMSL))->bit4 + #define MUL3 ((struct __hc08_bits *)(&PMSL))->bit3 + #define MUL2 ((struct __hc08_bits *)(&PMSL))->bit2 + #define MUL1 ((struct __hc08_bits *)(&PMSL))->bit1 + #define MUL0 ((struct __hc08_bits *)(&PMSL))->bit0 + +_VOLDATA _UINT8 __at 0x3a PMRS; /* PLL VCO Select Range */ + #define VRS7 ((struct __hc08_bits *)(&PMRS))->bit7 + #define VRS6 ((struct __hc08_bits *)(&PMRS))->bit6 + #define VRS5 ((struct __hc08_bits *)(&PMRS))->bit5 + #define VRS4 ((struct __hc08_bits *)(&PMRS))->bit4 + #define VRS3 ((struct __hc08_bits *)(&PMRS))->bit3 + #define VRS2 ((struct __hc08_bits *)(&PMRS))->bit2 + #define VRS1 ((struct __hc08_bits *)(&PMRS))->bit1 + #define VRS0 ((struct __hc08_bits *)(&PMRS))->bit0 + +_VOLDATA _UINT8 __at 0x3b PMDS; /* PLL Reference Divider Select Register */ + #define RDS3 ((struct __hc08_bits *)(&PMDS))->bit3 + #define RDS2 ((struct __hc08_bits *)(&PMDS))->bit2 + #define RDS1 ((struct __hc08_bits *)(&PMDS))->bit1 + #define RDS0 ((struct __hc08_bits *)(&PMDS))->bit0 + /* Bits 4-7 unimplemented */ + + + +_VOLDATA _UINT8 __at 0x40 IRSCC1; /* SCI Control Register 1 */ + #define LOOPS_IR ((struct __hc08_bits *)(&IRSCC1))->bit7 + #define ENSCI_IR ((struct __hc08_bits *)(&IRSCC1))->bit6 + #define TXINV_IR ((struct __hc08_bits *)(&IRSCC1))->bit5 + #define M_IR ((struct __hc08_bits *)(&IRSCC1))->bit4 + #define WAKE_IR ((struct __hc08_bits *)(&IRSCC1))->bit3 + #define ILTY_IR ((struct __hc08_bits *)(&IRSCC1))->bit2 + #define PEN_IR ((struct __hc08_bits *)(&IRSCC1))->bit1 + #define PTY_IR ((struct __hc08_bits *)(&IRSCC1))->bit0 + + +_VOLDATA _UINT8 __at 0x41 IRSCC2; /* SCI Control Register 2 */ + #define SCTIE_IR ((struct __hc08_bits *)(&IRSCC2))->bit7 + #define TCIE_IR ((struct __hc08_bits *)(&IRSCC2))->bit6 + #define SCRIE_IR ((struct __hc08_bits *)(&IRSCC2))->bit5 + #define ILIE_IR ((struct __hc08_bits *)(&IRSCC2))->bit4 + #define TE_IR ((struct __hc08_bits *)(&IRSCC2))->bit3 + #define RE_IR ((struct __hc08_bits *)(&IRSCC2))->bit2 + #define WRU_IR ((struct __hc08_bits *)(&IRSCC2))->bit1 + #define SBK_IR ((struct __hc08_bits *)(&IRSCC2))->bit0 + +_VOLDATA _UINT8 __at 0x42 IRSCC3; /* SCI Control Register 3 */ + #define SCC3_R8_IR ((struct __hc08_bits *)(&IRSCC3))->bit7 + #define SCC3_T8_IR ((struct __hc08_bits *)(&IRSCC3))->bit6 + #define DMARE_IR ((struct __hc08_bits *)(&IRSCC3))->bit5 + #define DMATE_IR ((struct __hc08_bits *)(&IRSCC3))->bit4 + #define ORIE_IR ((struct __hc08_bits *)(&IRSCC3))->bit3 + #define NEIE_IR ((struct __hc08_bits *)(&IRSCC3))->bit2 + #define FEIE_IR ((struct __hc08_bits *)(&IRSCC3))->bit1 + #define PEIE_IR ((struct __hc08_bits *)(&IRSCC3))->bit0 + +_VOLDATA _UINT8 __at 0x43 IRSCS1; /* SCI Status Register 1 */ + #define SCTE_IR ((struct __hc08_bits *)(&IRSCS1))->bit7 + #define TC_IR ((struct __hc08_bits *)(&IRSCS1))->bit6 + #define SCRF_IR ((struct __hc08_bits *)(&IRSCS1))->bit5 + #define IDLE_IR ((struct __hc08_bits *)(&IRSCS1))->bit4 + #define OR_IR ((struct __hc08_bits *)(&IRSCS1))->bit3 + #define NF_IR ((struct __hc08_bits *)(&IRSCS1))->bit2 + #define FE_IR ((struct __hc08_bits *)(&IRSCS1))->bit1 + #define PE_IR ((struct __hc08_bits *)(&IRSCS1))->bit0 + +_VOLDATA _UINT8 __at 0x44 IRSCS2; /* SCI Status Register 2 */ + #define RPF_IR ((struct __hc08_bits *)(&IRSCS2))->bit0 + #define BKF_IR ((struct __hc08_bits *)(&IRSCS2))->bit1 + /* Bits 2-7 not implemented */ + +_VOLDATA _UINT8 __at 0x45 IRSCDR; /* SCI Data Register */ + +_VOLDATA _UINT8 __at 0x46 IRSCBR; /* SCI Baud Rate Register */ + #define CKS_IR ((struct __hc08_bits *)(&IRSCBR))->bit7 + #define SCP1_IR ((struct __hc08_bits *)(&IRSCBR))->bit5 + #define SCP0_IR ((struct __hc08_bits *)(&IRSCBR))->bit4 + #define SCR2_IR ((struct __hc08_bits *)(&IRSCBR))->bit2 + #define SCR1_IR ((struct __hc08_bits *)(&IRSCBR))->bit1 + #define SCR0_IR ((struct __hc08_bits *)(&IRSCBR))->bit0 + +_VOLDATA _UINT8 __at 0x47 IRSCIRCR; /* SCI Baud Rate Register */ + #define TNP1_IR ((struct __hc08_bits *)(&IRSCIRCR))->bit2 + #define TNP0_IR ((struct __hc08_bits *)(&IRSCIRCR))->bit1 + #define IREN_IR ((struct __hc08_bits *)(&IRSCIRCR))->bit0 + + + +_VOLDATA _UINT8 __at 0x48 MMADR; /* MMIIC Address Register. */ + #define MMAD7 ((struct __hc08_bits *)(&MMADR))->bit7 + #define MMAD6 ((struct __hc08_bits *)(&MMADR))->bit6 + #define MMAD5 ((struct __hc08_bits *)(&MMADR))->bit5 + #define MMAD4 ((struct __hc08_bits *)(&MMADR))->bit4 + #define MMAD3 ((struct __hc08_bits *)(&MMADR))->bit3 + #define MMAD2 ((struct __hc08_bits *)(&MMADR))->bit2 + #define MMAD1 ((struct __hc08_bits *)(&MMADR))->bit1 + #define MMEXTAD ((struct __hc08_bits *)(&MMADR))->bit0 + + +_VOLDATA _UINT8 __at 0x49 MMCR1; /* MMIIC Control Register 1. */ + #define MMEN ((struct __hc08_bits *)(&MMCR1))->bit7 + #define MMIEN ((struct __hc08_bits *)(&MMCR1))->bit6 + #define MMCLRBB ((struct __hc08_bits *)(&MMCR1))->bit5 + #define MMTXAK ((struct __hc08_bits *)(&MMCR1))->bit3 + #define REPSEN ((struct __hc08_bits *)(&MMCR1))->bit2 + #define MMCRCBYTE ((struct __hc08_bits *)(&MMCR1))->bit1 + + +_VOLDATA _UINT8 __at 0x4a MMCR2; /* MMIIC Control Register 2. */ + #define MMALIF ((struct __hc08_bits *)(&MMCR2))->bit7 + #define MMNAKIF ((struct __hc08_bits *)(&MMCR2))->bit6 + #define MMBB ((struct __hc08_bits *)(&MMCR2))->bit5 + #define MMAST ((struct __hc08_bits *)(&MMCR2))->bit4 + #define MMRW ((struct __hc08_bits *)(&MMCR2))->bit3 + #define MMCRCEF ((struct __hc08_bits *)(&MMCR2))->bit0 + + +_VOLDATA _UINT8 __at 0x4B MMSR; /* MMIIC Status Register. */ + #define MMRXIF ((struct __hc08_bits *)(&MMSR))->bit7 + #define MMTXIF ((struct __hc08_bits *)(&MMSR))->bit6 + #define MMATCH ((struct __hc08_bits *)(&MMSR))->bit5 + #define MMSRW ((struct __hc08_bits *)(&MMSR))->bit4 + #define MMRXAK ((struct __hc08_bits *)(&MMSR))->bit3 + #define MMCRCBF ((struct __hc08_bits *)(&MMSR))->bit2 + #define MMTXBE ((struct __hc08_bits *)(&MMSR))->bit1 + #define MMRXBF ((struct __hc08_bits *)(&MMSR))->bit0 + +_VOLDATA _UINT8 __at 0x4C MMDTR; /* MMIIC Data Transmit Register */ +_VOLDATA _UINT8 __at 0x4D MMDRR; /* MMIIC Data Receive Register */ +_VOLDATA _UINT8 __at 0x4E MMCRDR; /* MMIIC CRC Data Register */ + + +_VOLDATA _UINT8 __at 0x4F MMFDR; /* MMIIC Frecuency Divider Register */ + #define MMBR2 ((struct __hc08_bits *)(&MMFDR))->bit2 + #define MMBR1 ((struct __hc08_bits *)(&MMFDR))->bit1 + #define MMBR0 ((struct __hc08_bits *)(&MMFDR))->bit0 + + +_VOLDATA _UINT8 __at 0x51 TBCR; /* Time Base Module Control */ + #define TBIF ((struct __hc08_bits *)(&TBCR))->bit7 + #define TBR2 ((struct __hc08_bits *)(&TBCR))->bit6 + #define TBR1 ((struct __hc08_bits *)(&TBCR))->bit5 + #define TBR0 ((struct __hc08_bits *)(&TBCR))->bit4 + #define TACK ((struct __hc08_bits *)(&TBCR))->bit3 + #define TBIE ((struct __hc08_bits *)(&TBCR))->bit2 + #define TBON ((struct __hc08_bits *)(&TBCR))->bit1 + /* Bit 0 Reserved */ + + + +_VOLDATA _UINT8 __at 0x57 ADSCR; /* Analog-to-Digital Status and Control Reg. */ + #define COCO ((struct __hc08_bits *)(&ADSCR))->bit7 + #define AIEN ((struct __hc08_bits *)(&ADSCR))->bit6 + #define ADCO ((struct __hc08_bits *)(&ADSCR))->bit5 + #define ADCH4 ((struct __hc08_bits *)(&ADSCR))->bit4 + #define ADCH3 ((struct __hc08_bits *)(&ADSCR))->bit3 + #define ADCH2 ((struct __hc08_bits *)(&ADSCR))->bit2 + #define ADCH1 ((struct __hc08_bits *)(&ADSCR))->bit1 + #define ADCH0 ((struct __hc08_bits *)(&ADSCR))->bit0 + +_VOLDATA _UINT8 __at 0x58 ADCLK; /* Analog-to-Digital Clock */ + #define ADIV2 ((struct __hc08_bits *)(&ADCLK))->bit7 + #define ADIV1 ((struct __hc08_bits *)(&ADCLK))->bit6 + #define ADIV0 ((struct __hc08_bits *)(&ADCLK))->bit5 + #define ADICLK ((struct __hc08_bits *)(&ADCLK))->bit4 + #define ADMODE1 ((struct __hc08_bits *)(&ADCLK))->bit3 + #define ADMODE0 ((struct __hc08_bits *)(&ADCLK))->bit2 + +_VOLDATA _UINT8 __at 0x59 ADRH0; /* Analog-to-Digital Data Register */ +_VOLDATA _UINT8 __at 0x5a ADRL0; /* Analog-to-Digital Data Register */ +_VOLDATA _UINT8 __at 0x5b ADRL1; /* Analog-to-Digital Data Register */ +_VOLDATA _UINT8 __at 0x5c ADRL2; /* Analog-to-Digital Data Register */ +_VOLDATA _UINT8 __at 0x5d ADRL3; /* Analog-to-Digital Data Register */ + +_VOLDATA _UINT8 __at 0x5e ADASCR; /* ADC Auto Scan Control */ + #define ASCAN ((struct __hc08_bits *)(&ADCLK))->bit0 + #define AUTO0 ((struct __hc08_bits *)(&ADCLK))->bit1 + #define AUTO1 ((struct __hc08_bits *)(&ADCLK))->bit2 + + +_VOLXDATA _UINT8 __at 0xfe00 SBSR; /* SIM Break Status Register */ + #define SBSW ((struct __hc08_bits *)(&SBSR))->bit1 + +_VOLXDATA _UINT8 __at 0xfe01 SRSR; /* SIM Reset Status Register */ + #define LVI ((struct __hc08_bits *)(&SRSR))->bit1 + #define MODRST ((struct __hc08_bits *)(&SRSR))->bit2 + #define ILAD ((struct __hc08_bits *)(&SRSR))->bit3 + #define ILOP ((struct __hc08_bits *)(&SRSR))->bit4 + #define COP ((struct __hc08_bits *)(&SRSR))->bit5 + #define PIN ((struct __hc08_bits *)(&SRSR))->bit6 + #define POR ((struct __hc08_bits *)(&SRSR))->bit7 + /* Bit 0 unimplemented */ + + +_VOLXDATA _UINT8 __at 0xfe03 SBFCR; /* SIM Break Flag Control Register */ + #define BFCE ((struct __hc08_bits *)(&BFCR))->bit7 + +_VOLXDATA _UINT8 __at 0xfe04 INT1; /* Interrupt Status Register 1 */ + #define IF1 ((struct __hc08_bits *)(&INT1))->bit2 + #define IF2 ((struct __hc08_bits *)(&INT1))->bit3 + #define IF3 ((struct __hc08_bits *)(&INT1))->bit4 + #define IF4 ((struct __hc08_bits *)(&INT1))->bit5 + #define IF5 ((struct __hc08_bits *)(&INT1))->bit6 + #define IF6 ((struct __hc08_bits *)(&INT1))->bit7 + /* Bits 0-1 Reserved */ + +_VOLXDATA _UINT8 __at 0xfe05 INT2; /* Interrupt Status Register 2 */ + #define IF14 ((struct __hc08_bits *)(&INT2))->bit7 + #define IF13 ((struct __hc08_bits *)(&INT2))->bit6 + #define IF12 ((struct __hc08_bits *)(&INT2))->bit5 + #define IF11 ((struct __hc08_bits *)(&INT2))->bit4 + #define IF10 ((struct __hc08_bits *)(&INT2))->bit3 + #define IF9 ((struct __hc08_bits *)(&INT2))->bit2 + #define IF8 ((struct __hc08_bits *)(&INT2))->bit1 + #define IF7 ((struct __hc08_bits *)(&INT2))->bit0 + +_VOLXDATA _UINT8 __at 0xfe06 INT3; /* Interrupt Status Register 3 */ + #define IF21 ((struct __hc08_bits *)(&INT3))->bit6 + #define IF20 ((struct __hc08_bits *)(&INT3))->bit5 + #define IF19 ((struct __hc08_bits *)(&INT3))->bit4 + #define IF18 ((struct __hc08_bits *)(&INT3))->bit3 + #define IF17 ((struct __hc08_bits *)(&INT3))->bit2 + #define IF16 ((struct __hc08_bits *)(&INT3))->bit1 + #define IF15 ((struct __hc08_bits *)(&INT3))->bit0 + +_VOLXDATA _UINT8 __at 0xfe08 FLCR; /* FLASH Control Register */ + #define PGM ((struct __hc08_bits *)(&FLCR))->bit0 + #define ERASE ((struct __hc08_bits *)(&FLCR))->bit1 + #define MASS ((struct __hc08_bits *)(&FLCR))->bit2 + #define HVEN ((struct __hc08_bits *)(&FLCR))->bit3 + + +_VOLXDATA _UINT8 __at 0xfe09 FLBPR; /* FLASH Block Protect Register */ + #define BPR0 ((struct __hc08_bits *)(&FLBPR))->bit0 + #define BPR1 ((struct __hc08_bits *)(&FLBPR))->bit1 + #define BPR2 ((struct __hc08_bits *)(&FLBPR))->bit2 + #define BPR3 ((struct __hc08_bits *)(&FLBPR))->bit3 + #define BPR4 ((struct __hc08_bits *)(&FLBPR))->bit4 + #define BPR5 ((struct __hc08_bits *)(&FLBPR))->bit5 + #define BPR6 ((struct __hc08_bits *)(&FLBPR))->bit6 + #define BPR7 ((struct __hc08_bits *)(&FLBPR))->bit7 + + +_VOLXDATA _UINT16 __at 0xfe0C BRK; /* Break Address High & Low Registers */ +_VOLXDATA _UINT8 __at 0xfe0C BRKH; /* Break Address High Register */ +_VOLXDATA _UINT8 __at 0xfe0D BRKL; /* Break Address Low Register */ + +_VOLXDATA _UINT8 __at 0xfe0b BRKSCR; /* Break Status and Control Register */ + #define BRKA ((struct __hc08_bits *)(&BRKSCR))->bit6 + #define BRKE ((struct __hc08_bits *)(&BRKSCR))->bit7 + +_VOLXDATA _UINT8 __at 0xfe0c LVISR; /* Low voltage detect */ + #define LVIOUT ((struct __hc08_bits *)(&LVISR))->bit7 + + +_VOLXDATA _UINT8 __at 0xffff COPCTL; /* COP Control Register */ + +#endif diff --git a/device/include/hc08/mc68hc908gp32.h b/device/include/hc08/mc68hc908gp32.h new file mode 100644 index 0000000..b3a4830 --- /dev/null +++ b/device/include/hc08/mc68hc908gp32.h @@ -0,0 +1,547 @@ +/*------------------------------------------------------------------------- + Register Declarations for Motorola MC68HC908GP32 + + Copyright (c) 2004, Juan Gonzalez + + Based on mc68hc908qy.h, + Written By - Erik Petrich + epetrich@users.sourceforge.net (2003) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef _MC68HC908GP32_H +#define _MC68HC908GP32_H + +#ifndef _UINT8 + #define _UINT8 unsigned char +#endif +#ifndef _UINT16 + #define _UINT16 unsigned int +#endif +#ifndef _VOLDATA + #define _VOLDATA volatile __data +#endif +#ifndef _VOLXDATA + #define _VOLXDATA volatile __xdata +#endif + +struct __hc08_bits +{ + unsigned int bit0:1; + unsigned int bit1:1; + unsigned int bit2:1; + unsigned int bit3:1; + unsigned int bit4:1; + unsigned int bit5:1; + unsigned int bit6:1; + unsigned int bit7:1; +}; + + +_VOLDATA _UINT8 __at 0x00 PTA; /* Port A Data Register */ +#define PORTA PTA /* Alias for PTA */ + #define PTA0 ((struct __hc08_bits *)(&PTA))->bit0 + #define PTA1 ((struct __hc08_bits *)(&PTA))->bit1 + #define PTA2 ((struct __hc08_bits *)(&PTA))->bit2 + #define PTA3 ((struct __hc08_bits *)(&PTA))->bit3 + #define PTA4 ((struct __hc08_bits *)(&PTA))->bit4 + #define PTA5 ((struct __hc08_bits *)(&PTA))->bit5 + #define PTA6 ((struct __hc08_bits *)(&PTA))->bit6 + #define PTA7 ((struct __hc08_bits *)(&PTA))->bit7 + +_VOLDATA _UINT8 __at 0x01 PTB; /* Port B Data Register */ +#define PORTB PTB /* Alias for PTB */ + #define PTB0 ((struct __hc08_bits *)(&PTB))->bit0 + #define PTB1 ((struct __hc08_bits *)(&PTB))->bit1 + #define PTB2 ((struct __hc08_bits *)(&PTB))->bit2 + #define PTB3 ((struct __hc08_bits *)(&PTB))->bit3 + #define PTB4 ((struct __hc08_bits *)(&PTB))->bit4 + #define PTB5 ((struct __hc08_bits *)(&PTB))->bit5 + #define PTB6 ((struct __hc08_bits *)(&PTB))->bit6 + #define PTB7 ((struct __hc08_bits *)(&PTB))->bit7 + +_VOLDATA _UINT8 __at 0x02 PTC; /* Port C Data Register */ +#define PORTC PTC /* Alias for PTC */ + #define PTC0 ((struct __hc08_bits *)(&PTC))->bit0 + #define PTC1 ((struct __hc08_bits *)(&PTC))->bit1 + #define PTC2 ((struct __hc08_bits *)(&PTC))->bit2 + #define PTC3 ((struct __hc08_bits *)(&PTC))->bit3 + #define PTC4 ((struct __hc08_bits *)(&PTC))->bit4 + #define PTC5 ((struct __hc08_bits *)(&PTC))->bit5 + #define PTC6 ((struct __hc08_bits *)(&PTC))->bit6 + #define PTC7 ((struct __hc08_bits *)(&PTC))->bit7 + +_VOLDATA _UINT8 __at 0x03 PTD; /* Port D Data Register */ +#define PORTD PTD /* Alias for PTD */ + #define PTD0 ((struct __hc08_bits *)(&PTD))->bit0 + #define PTD1 ((struct __hc08_bits *)(&PTD))->bit1 + #define PTD2 ((struct __hc08_bits *)(&PTD))->bit2 + #define PTD3 ((struct __hc08_bits *)(&PTD))->bit3 + #define PTD4 ((struct __hc08_bits *)(&PTD))->bit4 + #define PTD5 ((struct __hc08_bits *)(&PTD))->bit5 + #define PTD6 ((struct __hc08_bits *)(&PTD))->bit6 + #define PTD7 ((struct __hc08_bits *)(&PTD))->bit7 + +_VOLDATA _UINT8 __at 0x04 DDRA; /* Data Direction Register A */ + #define DDRA0 ((struct __hc08_bits *)(&DDRA))->bit0 + #define DDRA1 ((struct __hc08_bits *)(&DDRA))->bit1 + #define DDRA2 ((struct __hc08_bits *)(&DDRA))->bit2 + #define DDRA3 ((struct __hc08_bits *)(&DDRA))->bit3 + #define DDRA4 ((struct __hc08_bits *)(&DDRA))->bit4 + #define DDRA5 ((struct __hc08_bits *)(&DDRA))->bit5 + #define DDRA6 ((struct __hc08_bits *)(&DDRA))->bit6 + #define DDRA7 ((struct __hc08_bits *)(&DDRA))->bit7 + +_VOLDATA _UINT8 __at 0x05 DDRB; /* Data Direction Register B */ + #define DDRB0 ((struct __hc08_bits *)(&DDRB))->bit0 + #define DDRB1 ((struct __hc08_bits *)(&DDRB))->bit1 + #define DDRB2 ((struct __hc08_bits *)(&DDRB))->bit2 + #define DDRB3 ((struct __hc08_bits *)(&DDRB))->bit3 + #define DDRB4 ((struct __hc08_bits *)(&DDRB))->bit4 + #define DDRB5 ((struct __hc08_bits *)(&DDRB))->bit5 + #define DDRB6 ((struct __hc08_bits *)(&DDRB))->bit6 + #define DDRB7 ((struct __hc08_bits *)(&DDRB))->bit7 + +_VOLDATA _UINT8 __at 0x06 DDRC; /* Data Direction Register C */ + #define DDRC0 ((struct __hc08_bits *)(&DDRC))->bit0 + #define DDRC1 ((struct __hc08_bits *)(&DDRC))->bit1 + #define DDRC2 ((struct __hc08_bits *)(&DDRC))->bit2 + #define DDRC3 ((struct __hc08_bits *)(&DDRC))->bit3 + #define DDRC4 ((struct __hc08_bits *)(&DDRC))->bit4 + #define DDRC5 ((struct __hc08_bits *)(&DDRC))->bit5 + #define DDRC6 ((struct __hc08_bits *)(&DDRC))->bit6 + #define DDRC7 ((struct __hc08_bits *)(&DDRC))->bit7 + +_VOLDATA _UINT8 __at 0x07 DDRD; /* Data Direction Register D */ + #define DDRD0 ((struct __hc08_bits *)(&DDRD))->bit0 + #define DDRD1 ((struct __hc08_bits *)(&DDRD))->bit1 + #define DDRD2 ((struct __hc08_bits *)(&DDRD))->bit2 + #define DDRD3 ((struct __hc08_bits *)(&DDRD))->bit3 + #define DDRD4 ((struct __hc08_bits *)(&DDRD))->bit4 + #define DDRD5 ((struct __hc08_bits *)(&DDRD))->bit5 + #define DDRD6 ((struct __hc08_bits *)(&DDRD))->bit6 + #define DDRD7 ((struct __hc08_bits *)(&DDRD))->bit7 + +_VOLDATA _UINT8 __at 0x08 PTE; /* Port E Data Register */ +#define PORTE PTE /* Alias for PTE */ + #define PTE0 ((struct __hc08_bits *)(&PTE))->bit0 + #define PTE1 ((struct __hc08_bits *)(&PTE))->bit1 + #define PTE2 ((struct __hc08_bits *)(&PTE))->bit2 + #define PTE3 ((struct __hc08_bits *)(&PTE))->bit3 + #define PTE4 ((struct __hc08_bits *)(&PTE))->bit4 + #define PTE5 ((struct __hc08_bits *)(&PTE))->bit5 + #define PTE6 ((struct __hc08_bits *)(&PTE))->bit6 + #define PTE7 ((struct __hc08_bits *)(&PTE))->bit7 + +_VOLDATA _UINT8 __at 0x0C DDRE; /* Data Direction Register E */ + #define DDRE0 ((struct __hc08_bits *)(&DDRE))->bit0 + #define DDRE1 ((struct __hc08_bits *)(&DDRE))->bit1 + #define DDRE2 ((struct __hc08_bits *)(&DDRE))->bit2 + #define DDRE3 ((struct __hc08_bits *)(&DDRE))->bit3 + #define DDRE4 ((struct __hc08_bits *)(&DDRE))->bit4 + #define DDRE5 ((struct __hc08_bits *)(&DDRE))->bit5 + #define DDRE6 ((struct __hc08_bits *)(&DDRE))->bit6 + #define DDRE7 ((struct __hc08_bits *)(&DDRE))->bit7 + +_VOLDATA _UINT8 __at 0x0D PTAPUE; /* Port A pull-up enables */ + #define PTAPUE0 ((struct __hc08_bits *)(&PTAPUE))->bit0 + #define PTAPUE1 ((struct __hc08_bits *)(&PTAPUE))->bit1 + #define PTAPUE2 ((struct __hc08_bits *)(&PTAPUE))->bit2 + #define PTAPUE3 ((struct __hc08_bits *)(&PTAPUE))->bit3 + #define PTAPUE4 ((struct __hc08_bits *)(&PTAPUE))->bit4 + #define PTAPUE5 ((struct __hc08_bits *)(&PTAPUE))->bit5 + #define PTAPUE6 ((struct __hc08_bits *)(&PTAPUE))->bit6 + #define PTAPUE7 ((struct __hc08_bits *)(&PTAPUE))->bit7 + +_VOLDATA _UINT8 __at 0x0E PTCPUE; /* Port C pull-up enables */ + #define PTCPUE0 ((struct __hc08_bits *)(&PTCPUE))->bit0 + #define PTCPUE1 ((struct __hc08_bits *)(&PTCPUE))->bit1 + #define PTCPUE2 ((struct __hc08_bits *)(&PTCPUE))->bit2 + #define PTCPUE3 ((struct __hc08_bits *)(&PTCPUE))->bit3 + #define PTCPUE4 ((struct __hc08_bits *)(&PTCPUE))->bit4 + #define PTCPUE5 ((struct __hc08_bits *)(&PTCPUE))->bit5 + #define PTCPUE6 ((struct __hc08_bits *)(&PTCPUE))->bit6 + /* PTCPUE7 does not exit! */ + +_VOLDATA _UINT8 __at 0x0F PTDPUE; /* port D pull-up enables */ + #define PTDPUE0 ((struct __hc08_bits *)(&PTDPUE))->bit0 + #define PTDPUE1 ((struct __hc08_bits *)(&PTDPUE))->bit1 + #define PTDPUE2 ((struct __hc08_bits *)(&PTDPUE))->bit2 + #define PTDPUE3 ((struct __hc08_bits *)(&PTDPUE))->bit3 + #define PTDPUE4 ((struct __hc08_bits *)(&PTDPUE))->bit4 + #define PTDPUE5 ((struct __hc08_bits *)(&PTDPUE))->bit5 + #define PTDPUE6 ((struct __hc08_bits *)(&PTDPUE))->bit6 + #define PTDPUE7 ((struct __hc08_bits *)(&PTDPUE))->bit7 + +_VOLDATA _UINT8 __at 0x10 SPCR; /* SPI Control Register */ + #define SPRIE ((struct __hc08_bits *)(&SPCR))->bit7 + #define DMAS ((struct __hc08_bits *)(&SPCR))->bit6 + #define SPMSTR ((struct __hc08_bits *)(&SPCR))->bit5 + #define CPOL ((struct __hc08_bits *)(&SPCR))->bit4 + #define CPHA ((struct __hc08_bits *)(&SPCR))->bit3 + #define SPWOM ((struct __hc08_bits *)(&SPCR))->bit2 + #define SPE ((struct __hc08_bits *)(&SPCR))->bit1 + #define SPTIE ((struct __hc08_bits *)(&SPCR))->bit0 + +_VOLDATA _UINT8 __at 0x11 SPSCR; /* SPI Status and Control Register */ + #define SPRF ((struct __hc08_bits *)(&SPSCR))->bit7 + #define ERRIE ((struct __hc08_bits *)(&SPSCR))->bit6 + #define OVRF ((struct __hc08_bits *)(&SPSCR))->bit5 + #define MODF ((struct __hc08_bits *)(&SPSCR))->bit4 + #define SPTE ((struct __hc08_bits *)(&SPSCR))->bit3 + #define MODFEN ((struct __hc08_bits *)(&SPSCR))->bit2 + #define SPR1 ((struct __hc08_bits *)(&SPSCR))->bit1 + #define SPR0 ((struct __hc08_bits *)(&SPSCR))->bit0 + +_VOLDATA _UINT8 __at 0x12 SPDR; /* SPI Data Register */ + +_VOLDATA _UINT8 __at 0x13 SCC1; /* SCI Control Register 1 */ + #define LOOPS ((struct __hc08_bits *)(&SCC1))->bit7 + #define ENSCI ((struct __hc08_bits *)(&SCC1))->bit6 + #define TXINV ((struct __hc08_bits *)(&SCC1))->bit5 + #define M ((struct __hc08_bits *)(&SCC1))->bit4 + #define WAKE ((struct __hc08_bits *)(&SCC1))->bit3 + #define ILTY ((struct __hc08_bits *)(&SCC1))->bit2 + #define PEN ((struct __hc08_bits *)(&SCC1))->bit1 + #define PTY ((struct __hc08_bits *)(&SCC1))->bit0 + + +_VOLDATA _UINT8 __at 0x14 SCC2; /* SCI Control Register 2 */ + #define SCTIE ((struct __hc08_bits *)(&SCC2))->bit7 + #define TCIE ((struct __hc08_bits *)(&SCC2))->bit6 + #define SCRIE ((struct __hc08_bits *)(&SCC2))->bit5 + #define ILIE ((struct __hc08_bits *)(&SCC2))->bit4 + #define TE ((struct __hc08_bits *)(&SCC2))->bit3 + #define RE ((struct __hc08_bits *)(&SCC2))->bit2 + #define WRU ((struct __hc08_bits *)(&SCC2))->bit1 + #define SBK ((struct __hc08_bits *)(&SCC2))->bit0 + +_VOLDATA _UINT8 __at 0x15 SCC3; /* SCI Control Register 3 */ + #define SCC3_R8 ((struct __hc08_bits *)(&SCC3))->bit7 + #define SCC3_TB ((struct __hc08_bits *)(&SCC3))->bit6 + #define DMARE ((struct __hc08_bits *)(&SCC3))->bit5 + #define DMATE ((struct __hc08_bits *)(&SCC3))->bit4 + #define ORIE ((struct __hc08_bits *)(&SCC3))->bit3 + #define NEIE ((struct __hc08_bits *)(&SCC3))->bit2 + #define FEIE ((struct __hc08_bits *)(&SCC3))->bit1 + #define PEIE ((struct __hc08_bits *)(&SCC3))->bit0 + +_VOLDATA _UINT8 __at 0x16 SCS1; /* SCI Status Register 1 */ + #define SCTE ((struct __hc08_bits *)(&SCS1))->bit7 + #define TC ((struct __hc08_bits *)(&SCS1))->bit6 + #define SCRF ((struct __hc08_bits *)(&SCS1))->bit5 + #define IDLE ((struct __hc08_bits *)(&SCS1))->bit4 + #define OR ((struct __hc08_bits *)(&SCS1))->bit3 + #define NF ((struct __hc08_bits *)(&SCS1))->bit2 + #define FE ((struct __hc08_bits *)(&SCS1))->bit1 + #define PE ((struct __hc08_bits *)(&SCS1))->bit0 + +_VOLDATA _UINT8 __at 0x17 SCS2; /* SCI Status Register 2 */ + #define RPF ((struct __hc08_bits *)(&SCS2))->bit0 + #define BKF ((struct __hc08_bits *)(&SCS2))->bit1 + /* Bits 2-7 not implemented */ + +_VOLDATA _UINT8 __at 0x18 SCDR; /* SCI Data Register */ + +_VOLDATA _UINT8 __at 0x19 SCBR; /* SCI Baud Rate Register */ + #define SCP1 ((struct __hc08_bits *)(&SCBR))->bit5 + #define SCP0 ((struct __hc08_bits *)(&SCBR))->bit4 + #define R ((struct __hc08_bits *)(&SCBR))->bit3 + #define SCR2 ((struct __hc08_bits *)(&SCBR))->bit2 + #define SCR1 ((struct __hc08_bits *)(&SCBR))->bit1 + #define SCR0 ((struct __hc08_bits *)(&SCBR))->bit0 + /*-- Bits 6 and 7 do not exist */ + +_VOLDATA _UINT8 __at 0x1a INTKBSCR; /* Keyboard Status and Control Register */ + #define KEYF ((struct __hc08_bits *)(&INTKBSCR))->bit3 + #define ACKK ((struct __hc08_bits *)(&INTKBSCR))->bit2 + #define IMASKK ((struct __hc08_bits *)(&INTKBSCR))->bit1 + #define MODEK ((struct __hc08_bits *)(&INTKBSCR))->bit0 + /*-- Bits 4-7 do not exist */ + +_VOLDATA _UINT8 __at 0x1b INTKBIER; /* Keyboard Interrupt Enable Register */ + #define KBIE7 ((struct __hc08_bits *)(&INTKBIER))->bit7 + #define KBIE6 ((struct __hc08_bits *)(&INTKBIER))->bit6 + #define KBIE5 ((struct __hc08_bits *)(&INTKBIER))->bit5 + #define KBIE4 ((struct __hc08_bits *)(&INTKBIER))->bit4 + #define KBIE3 ((struct __hc08_bits *)(&INTKBIER))->bit3 + #define KBIE2 ((struct __hc08_bits *)(&INTKBIER))->bit2 + #define KBIE1 ((struct __hc08_bits *)(&INTKBIER))->bit1 + #define KBIE0 ((struct __hc08_bits *)(&INTKBIER))->bit0 + +_VOLDATA _UINT8 __at 0x1C TBCR; /* Time Base Module Control */ + #define TBIF ((struct __hc08_bits *)(&TBCR))->bit7 + #define TBR2 ((struct __hc08_bits *)(&TBCR))->bit6 + #define TBR1 ((struct __hc08_bits *)(&TBCR))->bit5 + #define TBR0 ((struct __hc08_bits *)(&TBCR))->bit4 + #define TACK ((struct __hc08_bits *)(&TBCR))->bit3 + #define TBIE ((struct __hc08_bits *)(&TBCR))->bit2 + #define TBON ((struct __hc08_bits *)(&TBCR))->bit1 + /* Bit 0 Reserved */ + +_VOLDATA _UINT8 __at 0x1D INTSCR; /* IRQ status/control */ + #define IRQF1 ((struct __hc08_bits *)(&INTSCR))->bit3 + #define ACK1 ((struct __hc08_bits *)(&INTSCR))->bit2 + #define IMASK1 ((struct __hc08_bits *)(&INTSCR))->bit1 + #define MODE1 ((struct __hc08_bits *)(&INTSCR))->bit0 + /* Bits 4-7 unimplemented */ + +_VOLDATA _UINT8 __at 0x1e CONFIG2; /* Configuration Register 2 */ +/* CONFIG2 is one-time writeble, so can't use bitfields */ + +_VOLDATA _UINT8 __at 0x1f CONFIG1; /* Configuration Register 1 */ +/* CONFIG1 is one-time writeable, so can't use bitfields */ + +_VOLDATA _UINT8 __at 0x20 T1SC; /* TIM 1 Status and Control */ + #define PS0 ((struct __hc08_bits *)(&T1SC))->bit0 + #define PS1 ((struct __hc08_bits *)(&T1SC))->bit1 + #define PS2 ((struct __hc08_bits *)(&T1SC))->bit2 + #define TRST ((struct __hc08_bits *)(&T1SC))->bit4 + #define TSTOP ((struct __hc08_bits *)(&T1SC))->bit5 + #define TOIE ((struct __hc08_bits *)(&T1SC))->bit6 + #define TOF ((struct __hc08_bits *)(&T1SC))->bit7 + +_VOLDATA _UINT16 __at 0x21 T1CNT; /* TIM1 Counter High & Low Registers */ +_VOLDATA _UINT8 __at 0x21 T1CNTH; /* TIM1 Counter Register High */ +_VOLDATA _UINT8 __at 0x22 T1CNTL; /* TIM1 Counter Register Low */ + +_VOLDATA _UINT16 __at 0x23 T1MOD; /* TIM1 Counter Modulo High & Low Registers */ +_VOLDATA _UINT8 __at 0x23 T1MODH; /* TIM1 Counter Modulo Register High */ +_VOLDATA _UINT8 __at 0x24 T1MODL; /* TIM1 Counter Modulo Register Low */ + +_VOLDATA _UINT8 __at 0x25 T1SC0; /* TIM1 Channel 0 Status and Control Register */ + #define CH0MAX ((struct __hc08_bits *)(&T1SC0))->bit0 + #define TOV0 ((struct __hc08_bits *)(&T1SC0))->bit1 + #define ELS0A ((struct __hc08_bits *)(&T1SC0))->bit2 + #define ELS0B ((struct __hc08_bits *)(&T1SC0))->bit3 + #define MS0A ((struct __hc08_bits *)(&T1SC0))->bit4 + #define MS0B ((struct __hc08_bits *)(&T1SC0))->bit5 + #define CH0IE ((struct __hc08_bits *)(&T1SC0))->bit6 + #define CH0F ((struct __hc08_bits *)(&T1SC0))->bit7 + +_VOLDATA _UINT16 __at 0x26 T1CH0; /* TIM1 Channel 0 High & Low Registers */ +_VOLDATA _UINT8 __at 0x26 T1CH0H; /* TIM1 Channel 0 Register High */ +_VOLDATA _UINT8 __at 0x27 T1CH0L; /* TIM1 Channel 0 Register Low */ + +_VOLDATA _UINT8 __at 0x28 T1SC1; /* TIM1 Channel 1 Status and Control Register */ + #define CH1MAX ((struct __hc08_bits *)(&T1SC1))->bit0 + #define TOV1 ((struct __hc08_bits *)(&T1SC1))->bit1 + #define ELS1A ((struct __hc08_bits *)(&T1SC1))->bit2 + #define ELS1B ((struct __hc08_bits *)(&T1SC1))->bit3 + #define MS1A ((struct __hc08_bits *)(&T1SC1))->bit4 + #define CH1IE ((struct __hc08_bits *)(&T1SC1))->bit6 + #define CH1F ((struct __hc08_bits *)(&T1SC1))->bit7 + +_VOLDATA _UINT16 __at 0x29 T1CH1; /* TIM1 Channel 1 High & Low Registers */ +_VOLDATA _UINT8 __at 0x29 T1CH1H; /* TIM1 Channel 1 Register High */ +_VOLDATA _UINT8 __at 0x2A T1CH1L; /* TIM1 Channel 1 Register Low */ + +/*------------------*/ +/* TIM 2 REGISTERS */ +/*------------------*/ + +_VOLDATA _UINT8 __at 0x2B T2SC; /* TIM 2 Status and Control */ + #define PS0_2 ((struct __hc08_bits *)(&T2SC))->bit0 + #define PS1_2 ((struct __hc08_bits *)(&T2SC))->bit1 + #define PS2_2 ((struct __hc08_bits *)(&T2SC))->bit2 + #define TRST_2 ((struct __hc08_bits *)(&T2SC))->bit4 + #define TSTOP_2 ((struct __hc08_bits *)(&T2SC))->bit5 + #define TOIE_2 ((struct __hc08_bits *)(&T2SC))->bit6 + #define TOF_2 ((struct __hc08_bits *)(&T2SC))->bit7 + +_VOLDATA _UINT16 __at 0x2C T2CNT; /* TIM2 Counter High & Low Registers */ +_VOLDATA _UINT8 __at 0x2C T2CNTH; /* TIM2 Counter Register High */ +_VOLDATA _UINT8 __at 0x2D T2CNTL; /* TIM2 Counter Register Low */ + +_VOLDATA _UINT16 __at 0x2E T2MOD; /* TIM2 Counter Modulo High & Low Registers */ +_VOLDATA _UINT8 __at 0x2E T2MODH; /* TIM2 Counter Modulo Register High */ +_VOLDATA _UINT8 __at 0x2F T2MODL; /* TIM2 Counter Modulo Register Low */ + +_VOLDATA _UINT8 __at 0x30 T2SC0; /* TIM2 Channel 0 Status and Control Register */ + #define CH0MAX_2 ((struct __hc08_bits *)(&T2SC0))->bit0 + #define TOV0_2 ((struct __hc08_bits *)(&T2SC0))->bit1 + #define ELS0A_2 ((struct __hc08_bits *)(&T2SC0))->bit2 + #define ELS0B_2 ((struct __hc08_bits *)(&T2SC0))->bit3 + #define MS0A_2 ((struct __hc08_bits *)(&T2SC0))->bit4 + #define MS0B_2 ((struct __hc08_bits *)(&T2SC0))->bit5 + #define CH0IE_2 ((struct __hc08_bits *)(&T2SC0))->bit6 + #define CH0F_2 ((struct __hc08_bits *)(&T2SC0))->bit7 + +_VOLDATA _UINT16 __at 0x31 T2CH0; /* TIM2 Channel 0 High & Low Registers */ +_VOLDATA _UINT8 __at 0x31 T2CH0H; /* TIM2 Channel 0 Register High */ +_VOLDATA _UINT8 __at 0x32 T2CH0L; /* TIM2 Channel 0 Register Low */ + +_VOLDATA _UINT8 __at 0x33 T2SC1; /* TIM2 Channel 1 Status and Control Register */ + #define CH1MAX_2 ((struct __hc08_bits *)(&T2SC1))->bit0 + #define TOV1_2 ((struct __hc08_bits *)(&T2SC1))->bit1 + #define ELS1A_2 ((struct __hc08_bits *)(&T2SC1))->bit2 + #define ELS1B_2 ((struct __hc08_bits *)(&T2SC1))->bit3 + #define MS1A_2 ((struct __hc08_bits *)(&T2SC1))->bit4 + #define CH1IE_2 ((struct __hc08_bits *)(&T2SC1))->bit6 + #define CH1F_2 ((struct __hc08_bits *)(&T2SC1))->bit7 + +_VOLDATA _UINT16 __at 0x34 T2CH1; /* TIM2 Channel 1 High & Low Registers */ +_VOLDATA _UINT8 __at 0x34 T2CH1H; /* TIM2 Channel 1 Register High */ +_VOLDATA _UINT8 __at 0x35 T2CH1L; /* TIM2 Channel 1 Register Low */ + +_VOLDATA _UINT8 __at 0x36 PCTL; /* PLL Control Register */ + #define PLLIE ((struct __hc08_bits *)(&PCTL))->bit7 + #define PLLF ((struct __hc08_bits *)(&PCTL))->bit6 + #define PLLON ((struct __hc08_bits *)(&PCTL))->bit5 + #define BCS ((struct __hc08_bits *)(&PCTL))->bit4 + #define PRE1 ((struct __hc08_bits *)(&PCTL))->bit3 + #define PRE0 ((struct __hc08_bits *)(&PCTL))->bit2 + #define VPR1 ((struct __hc08_bits *)(&PCTL))->bit1 + #define VPR0 ((struct __hc08_bits *)(&PCTL))->bit0 + +_VOLDATA _UINT8 __at 0x37 PBWC; /* PLL Bandwidth Control Register */ + #define AUTO ((struct __hc08_bits *)(&PBWC))->bit7 + #define LOCK ((struct __hc08_bits *)(&PBWC))->bit6 + #define ACQ ((struct __hc08_bits *)(&PBWC))->bit5 + /* Bits 1-4, Unimplemented */ + /* Bit 0, Reserved */ + +_VOLDATA _UINT8 __at 0x38 PMSH; /* PLL Multiplier Select High */ + #define MUL11 ((struct __hc08_bits *)(&PMSH))->bit3 + #define MUL10 ((struct __hc08_bits *)(&PMSH))->bit2 + #define MUL9 ((struct __hc08_bits *)(&PMSH))->bit1 + #define MUL8 ((struct __hc08_bits *)(&PMSH))->bit0 + /* Bits 4-7 unimplemented */ + +_VOLDATA _UINT8 __at 0x39 PMSL; /* PLL Multiplir Select Low */ + #define MUL7 ((struct __hc08_bits *)(&PMSL))->bit7 + #define MUL6 ((struct __hc08_bits *)(&PMSL))->bit6 + #define MUL5 ((struct __hc08_bits *)(&PMSL))->bit5 + #define MUL4 ((struct __hc08_bits *)(&PMSL))->bit4 + #define MUL3 ((struct __hc08_bits *)(&PMSL))->bit3 + #define MUL2 ((struct __hc08_bits *)(&PMSL))->bit2 + #define MUL1 ((struct __hc08_bits *)(&PMSL))->bit1 + #define MUL0 ((struct __hc08_bits *)(&PMSL))->bit0 + +_VOLDATA _UINT8 __at 0x3a PMRS; /* PLL VCO Select Range */ + #define VRS7 ((struct __hc08_bits *)(&PMRS))->bit7 + #define VRS6 ((struct __hc08_bits *)(&PMRS))->bit6 + #define VRS5 ((struct __hc08_bits *)(&PMRS))->bit5 + #define VRS4 ((struct __hc08_bits *)(&PMRS))->bit4 + #define VRS3 ((struct __hc08_bits *)(&PMRS))->bit3 + #define VRS2 ((struct __hc08_bits *)(&PMRS))->bit2 + #define VRS1 ((struct __hc08_bits *)(&PMRS))->bit1 + #define VRS0 ((struct __hc08_bits *)(&PMRS))->bit0 + +_VOLDATA _UINT8 __at 0x3b PMDS; /* PLL Reference Divider Select Register */ + #define RDS3 ((struct __hc08_bits *)(&PMDS))->bit3 + #define RDS2 ((struct __hc08_bits *)(&PMDS))->bit2 + #define RDS1 ((struct __hc08_bits *)(&PMDS))->bit1 + #define RDS0 ((struct __hc08_bits *)(&PMDS))->bit0 + /* Bits 4-7 unimplemented */ + +_VOLDATA _UINT8 __at 0x3c ADSCR; /* Analog-to-Digital Status and Control Reg. */ + #define COCO ((struct __hc08_bits *)(&ADSCR))->bit7 + #define AIEN ((struct __hc08_bits *)(&ADSCR))->bit6 + #define ADCO ((struct __hc08_bits *)(&ADSCR))->bit5 + #define ADCH4 ((struct __hc08_bits *)(&ADSCR))->bit4 + #define ADCH3 ((struct __hc08_bits *)(&ADSCR))->bit3 + #define ADCH2 ((struct __hc08_bits *)(&ADSCR))->bit2 + #define ADCH1 ((struct __hc08_bits *)(&ADSCR))->bit1 + #define ADCH0 ((struct __hc08_bits *)(&ADSCR))->bit0 + +_VOLDATA _UINT8 __at 0x3d ADR; /* Analog-to-Digital Data Register */ + +_VOLDATA _UINT8 __at 0x3e ADCLK; /* Analog-to-Digital Clock */ + #define ADIV2 ((struct __hc08_bits *)(&ADCLK))->bit7 + #define ADIV1 ((struct __hc08_bits *)(&ADCLK))->bit6 + #define ADIV0 ((struct __hc08_bits *)(&ADCLK))->bit5 + #define ADICLK ((struct __hc08_bits *)(&ADCLK))->bit4 + /* Bits 0-3 unimplemented */ + +_VOLXDATA _UINT8 __at 0xfe00 SBSR; /* SIM Break Status Register */ + #define SBSW ((struct __hc08_bits *)(&SBSR))->bit1 + +_VOLXDATA _UINT8 __at 0xfe01 SRSR; /* SIM Reset Status Register */ + #define LVI ((struct __hc08_bits *)(&SRSR))->bit1 + #define MODRST ((struct __hc08_bits *)(&SRSR))->bit2 + #define ILAD ((struct __hc08_bits *)(&SRSR))->bit3 + #define ILOP ((struct __hc08_bits *)(&SRSR))->bit4 + #define COP ((struct __hc08_bits *)(&SRSR))->bit5 + #define PIN ((struct __hc08_bits *)(&SRSR))->bit6 + #define POR ((struct __hc08_bits *)(&SRSR))->bit7 + /* Bit 0 unimplemented */ + +_VOLXDATA _UINT8 __at 0xfe02 SUBAR; /* SIM Upper Byte Address */ + +_VOLXDATA _UINT8 __at 0xfe03 SBFCR; /* SIM Break Flag Control Register */ + #define BFCE ((struct __hc08_bits *)(&BFCR))->bit7 + +_VOLXDATA _UINT8 __at 0xfe04 INT1; /* Interrupt Status Register 1 */ + #define IF1 ((struct __hc08_bits *)(&INT1))->bit2 + #define IF2 ((struct __hc08_bits *)(&INT1))->bit3 + #define IF3 ((struct __hc08_bits *)(&INT1))->bit4 + #define IF4 ((struct __hc08_bits *)(&INT1))->bit5 + #define IF5 ((struct __hc08_bits *)(&INT1))->bit6 + #define IF6 ((struct __hc08_bits *)(&INT1))->bit7 + /* Bits 0-1 Reserved */ + +_VOLXDATA _UINT8 __at 0xfe05 INT2; /* Interrupt Status Register 2 */ + #define IF14 ((struct __hc08_bits *)(&INT2))->bit7 + #define IF13 ((struct __hc08_bits *)(&INT2))->bit6 + #define IF12 ((struct __hc08_bits *)(&INT2))->bit5 + #define IF11 ((struct __hc08_bits *)(&INT2))->bit4 + #define IF10 ((struct __hc08_bits *)(&INT2))->bit3 + #define IF9 ((struct __hc08_bits *)(&INT2))->bit2 + #define IF8 ((struct __hc08_bits *)(&INT2))->bit1 + #define IF7 ((struct __hc08_bits *)(&INT2))->bit0 + +_VOLXDATA _UINT8 __at 0xfe06 INT3; /* Interrupt Status Register 3 */ + #define IF16 ((struct __hc08_bits *)(&INT3))->bit1 + #define IF15 ((struct __hc08_bits *)(&INT3))->bit0 + +_VOLXDATA _UINT8 __at 0xfe07 FLCTR; /* Flash test/programming */ + +_VOLXDATA _UINT8 __at 0xfe08 FLCR; /* FLASH Control Register */ + #define PGM ((struct __hc08_bits *)(&FLCR))->bit0 + #define ERASE ((struct __hc08_bits *)(&FLCR))->bit1 + #define MASS ((struct __hc08_bits *)(&FLCR))->bit2 + #define HVEN ((struct __hc08_bits *)(&FLCR))->bit3 + +_VOLXDATA _UINT16 __at 0xfe09 BRK; /* Break Address High & Low Registers */ +_VOLXDATA _UINT8 __at 0xfe09 BRKH; /* Break Address High Register */ +_VOLXDATA _UINT8 __at 0xfe0a BRKL; /* Break Address Low Register */ + +_VOLXDATA _UINT8 __at 0xfe0b BRKSCR; /* Break Status and Control Register */ + #define BRKA ((struct __hc08_bits *)(&BRKSCR))->bit6 + #define BRKE ((struct __hc08_bits *)(&BRKSCR))->bit7 + +_VOLXDATA _UINT8 __at 0xfe0c LVISR; /* Low voltage detect */ + #define LVIOUT ((struct __hc08_bits *)(&LVISR))->bit7 + + +_VOLXDATA _UINT8 __at 0xfe7e FLBPR; /* FLASH Block Protect Register */ + #define BPR0 ((struct __hc08_bits *)(&FLBPR))->bit0 + #define BPR1 ((struct __hc08_bits *)(&FLBPR))->bit1 + #define BPR2 ((struct __hc08_bits *)(&FLBPR))->bit2 + #define BPR3 ((struct __hc08_bits *)(&FLBPR))->bit3 + #define BPR4 ((struct __hc08_bits *)(&FLBPR))->bit4 + #define BPR5 ((struct __hc08_bits *)(&FLBPR))->bit5 + #define BPR6 ((struct __hc08_bits *)(&FLBPR))->bit6 + #define BPR7 ((struct __hc08_bits *)(&FLBPR))->bit7 + +_VOLXDATA _UINT8 __at 0xffff COPCTL; /* COP Control Register */ + +#endif diff --git a/device/include/hc08/mc68hc908jb8.h b/device/include/hc08/mc68hc908jb8.h new file mode 100644 index 0000000..ac2744a --- /dev/null +++ b/device/include/hc08/mc68hc908jb8.h @@ -0,0 +1,412 @@ +/*------------------------------------------------------------------------- + Register Declarations for Motorola MC68HC908JB8 + + Copyright (c) 2004, Bjorn Bringert + + Based on mc68hc908qy.h, + Written By - Erik Petrich + epetrich@users.sourceforge.net (2003) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef _MC68HC908JB8_H +#define _MC68HC908JB8_H + +#ifndef _UINT8 + #define _UINT8 unsigned char +#endif +#ifndef _UINT16 + #define _UINT16 unsigned int +#endif +#ifndef _VOLDATA + #define _VOLDATA volatile __data +#endif +#ifndef _VOLXDATA + #define _VOLXDATA volatile __xdata +#endif + +struct __hc08_bits +{ + unsigned int bit0:1; + unsigned int bit1:1; + unsigned int bit2:1; + unsigned int bit3:1; + unsigned int bit4:1; + unsigned int bit5:1; + unsigned int bit6:1; + unsigned int bit7:1; +}; + + +_VOLDATA _UINT8 __at 0x00 PTA; /* Port A Data Register */ + #define PTA0 ((struct __hc08_bits *)(&PTA))->bit0 + #define PTA1 ((struct __hc08_bits *)(&PTA))->bit1 + #define PTA2 ((struct __hc08_bits *)(&PTA))->bit2 + #define PTA3 ((struct __hc08_bits *)(&PTA))->bit3 + #define PTA4 ((struct __hc08_bits *)(&PTA))->bit4 + #define PTA5 ((struct __hc08_bits *)(&PTA))->bit5 + #define PTA6 ((struct __hc08_bits *)(&PTA))->bit6 + #define PTA7 ((struct __hc08_bits *)(&PTA))->bit7 + +_VOLDATA _UINT8 __at 0x01 PTB; /* Port B Data Register */ + #define PTB0 ((struct __hc08_bits *)(&PTB))->bit0 + #define PTB1 ((struct __hc08_bits *)(&PTB))->bit1 + #define PTB2 ((struct __hc08_bits *)(&PTB))->bit2 + #define PTB3 ((struct __hc08_bits *)(&PTB))->bit3 + #define PTB4 ((struct __hc08_bits *)(&PTB))->bit4 + #define PTB5 ((struct __hc08_bits *)(&PTB))->bit5 + #define PTB6 ((struct __hc08_bits *)(&PTB))->bit6 + #define PTB7 ((struct __hc08_bits *)(&PTB))->bit7 + +_VOLDATA _UINT8 __at 0x02 PTC; /* Port C Data Register */ + #define PTC0 ((struct __hc08_bits *)(&PTC))->bit0 + #define PTC1 ((struct __hc08_bits *)(&PTC))->bit1 + #define PTC2 ((struct __hc08_bits *)(&PTC))->bit2 + #define PTC3 ((struct __hc08_bits *)(&PTC))->bit3 + #define PTC4 ((struct __hc08_bits *)(&PTC))->bit4 + #define PTC5 ((struct __hc08_bits *)(&PTC))->bit5 + #define PTC6 ((struct __hc08_bits *)(&PTC))->bit6 + #define PTC7 ((struct __hc08_bits *)(&PTC))->bit7 + +_VOLDATA _UINT8 __at 0x03 PTD; /* Port D Data Register */ + #define PTD0 ((struct __hc08_bits *)(&PTD))->bit0 + #define PTD1 ((struct __hc08_bits *)(&PTD))->bit1 + #define PTD2 ((struct __hc08_bits *)(&PTD))->bit2 + #define PTD3 ((struct __hc08_bits *)(&PTD))->bit3 + #define PTD4 ((struct __hc08_bits *)(&PTD))->bit4 + #define PTD5 ((struct __hc08_bits *)(&PTD))->bit5 + #define PTD6 ((struct __hc08_bits *)(&PTD))->bit6 + #define PTD7 ((struct __hc08_bits *)(&PTD))->bit7 + +_VOLDATA _UINT8 __at 0x04 DDRA; /* Data Direction Register A */ + #define DDRA0 ((struct __hc08_bits *)(&DDRA))->bit0 + #define DDRA1 ((struct __hc08_bits *)(&DDRA))->bit1 + #define DDRA2 ((struct __hc08_bits *)(&DDRA))->bit2 + #define DDRA3 ((struct __hc08_bits *)(&DDRA))->bit3 + #define DDRA4 ((struct __hc08_bits *)(&DDRA))->bit4 + #define DDRA5 ((struct __hc08_bits *)(&DDRA))->bit5 + #define DDRA6 ((struct __hc08_bits *)(&DDRA))->bit6 + #define DDRA7 ((struct __hc08_bits *)(&DDRA))->bit7 + +_VOLDATA _UINT8 __at 0x05 DDRB; /* Data Direction Register B */ + #define DDRB0 ((struct __hc08_bits *)(&DDRB))->bit0 + #define DDRB1 ((struct __hc08_bits *)(&DDRB))->bit1 + #define DDRB2 ((struct __hc08_bits *)(&DDRB))->bit2 + #define DDRB3 ((struct __hc08_bits *)(&DDRB))->bit3 + #define DDRB4 ((struct __hc08_bits *)(&DDRB))->bit4 + #define DDRB5 ((struct __hc08_bits *)(&DDRB))->bit5 + #define DDRB6 ((struct __hc08_bits *)(&DDRB))->bit6 + #define DDRB7 ((struct __hc08_bits *)(&DDRB))->bit7 + +_VOLDATA _UINT8 __at 0x06 DDRC; /* Data Direction Register C */ + #define DDRC0 ((struct __hc08_bits *)(&DDRC))->bit0 + #define DDRC1 ((struct __hc08_bits *)(&DDRC))->bit1 + #define DDRC2 ((struct __hc08_bits *)(&DDRC))->bit2 + #define DDRC3 ((struct __hc08_bits *)(&DDRC))->bit3 + #define DDRC4 ((struct __hc08_bits *)(&DDRC))->bit4 + #define DDRC5 ((struct __hc08_bits *)(&DDRC))->bit5 + #define DDRC6 ((struct __hc08_bits *)(&DDRC))->bit6 + #define DDRC7 ((struct __hc08_bits *)(&DDRC))->bit7 + +_VOLDATA _UINT8 __at 0x07 DDRD; /* Data Direction Register D */ + #define DDRD0 ((struct __hc08_bits *)(&DDRD))->bit0 + #define DDRD1 ((struct __hc08_bits *)(&DDRD))->bit1 + #define DDRD2 ((struct __hc08_bits *)(&DDRD))->bit2 + #define DDRD3 ((struct __hc08_bits *)(&DDRD))->bit3 + #define DDRD4 ((struct __hc08_bits *)(&DDRD))->bit4 + #define DDRD5 ((struct __hc08_bits *)(&DDRD))->bit5 + #define DDRD6 ((struct __hc08_bits *)(&DDRD))->bit6 + #define DDRD7 ((struct __hc08_bits *)(&DDRD))->bit7 + +_VOLDATA _UINT8 __at 0x08 PTE; /* Port E Data Register */ + #define PTE0 ((struct __hc08_bits *)(&PTE))->bit0 + #define PTE1 ((struct __hc08_bits *)(&PTE))->bit1 + #define PTE2 ((struct __hc08_bits *)(&PTE))->bit2 + #define PTE3 ((struct __hc08_bits *)(&PTE))->bit3 + #define PTE4 ((struct __hc08_bits *)(&PTE))->bit4 + #define PTE5 ((struct __hc08_bits *)(&PTE))->bit5 + #define PTE6 ((struct __hc08_bits *)(&PTE))->bit6 + #define PTE7 ((struct __hc08_bits *)(&PTE))->bit7 + +_VOLDATA _UINT8 __at 0x09 DDRE; /* Data Direction Register E */ + #define DDRE0 ((struct __hc08_bits *)(&DDRE))->bit0 + #define DDRE1 ((struct __hc08_bits *)(&DDRE))->bit1 + #define DDRE2 ((struct __hc08_bits *)(&DDRE))->bit2 + #define DDRE3 ((struct __hc08_bits *)(&DDRE))->bit3 + #define DDRE4 ((struct __hc08_bits *)(&DDRE))->bit4 + #define DDRE5 ((struct __hc08_bits *)(&DDRE))->bit5 + #define DDRE6 ((struct __hc08_bits *)(&DDRE))->bit6 + #define DDRE7 ((struct __hc08_bits *)(&DDRE))->bit7 + +_VOLDATA _UINT8 __at 0x0a TSC; /* TIM Status and Control */ + #define PS0 ((struct __hc08_bits *)(&TSC))->bit0 + #define PS1 ((struct __hc08_bits *)(&TSC))->bit1 + #define PS2 ((struct __hc08_bits *)(&TSC))->bit2 + #define TRST ((struct __hc08_bits *)(&TSC))->bit4 + #define TSTOP ((struct __hc08_bits *)(&TSC))->bit5 + #define TOIE ((struct __hc08_bits *)(&TSC))->bit6 + #define TOF ((struct __hc08_bits *)(&TSC))->bit7 + +_VOLDATA _UINT16 __at 0x0c TCNT; /* TIM Counter High & Low Registers */ +_VOLDATA _UINT8 __at 0x0c TCNTH; /* TIM Counter Register High */ +_VOLDATA _UINT8 __at 0x0d TCNTL; /* TIM Counter Register Low */ + +_VOLDATA _UINT16 __at 0x0e TMOD; /* TIM Counter Modulo High & Low Registers */ +_VOLDATA _UINT8 __at 0x0e TMODH; /* TIM Counter Modulo Register High */ +_VOLDATA _UINT8 __at 0x0f TMODL; /* TIM Counter Modulo Register Low */ + +_VOLDATA _UINT8 __at 0x10 TSC0; /* TIM Channel 0 Status and Control Register */ + #define CH0MAX ((struct __hc08_bits *)(&TSC0))->bit0 + #define TOV0 ((struct __hc08_bits *)(&TSC0))->bit1 + #define ELS0A ((struct __hc08_bits *)(&TSC0))->bit2 + #define ELS0B ((struct __hc08_bits *)(&TSC0))->bit3 + #define MS0A ((struct __hc08_bits *)(&TSC0))->bit4 + #define MS0B ((struct __hc08_bits *)(&TSC0))->bit5 + #define CH0IE ((struct __hc08_bits *)(&TSC0))->bit6 + #define CH0F ((struct __hc08_bits *)(&TSC0))->bit7 + +_VOLDATA _UINT16 __at 0x11 TCH0; /* TIM Channel 0 High & Low Registers */ +_VOLDATA _UINT8 __at 0x11 TCH0H; /* TIM Channel 0 Register High */ +_VOLDATA _UINT8 __at 0x12 TCH0L; /* TIM Channel 0 Register Low */ + +_VOLDATA _UINT8 __at 0x13 TSC1; /* TIM Channel 1 Status and Control Register */ + #define CH1MAX ((struct __hc08_bits *)(&TSC1))->bit0 + #define TOV1 ((struct __hc08_bits *)(&TSC1))->bit1 + #define ELS1A ((struct __hc08_bits *)(&TSC1))->bit2 + #define ELS1B ((struct __hc08_bits *)(&TSC1))->bit3 + #define MS1A ((struct __hc08_bits *)(&TSC1))->bit4 + #define CH1IE ((struct __hc08_bits *)(&TSC1))->bit6 + #define CH1F ((struct __hc08_bits *)(&TSC1))->bit7 + +_VOLDATA _UINT16 __at 0x14 TCH1; /* TIM Channel 1 High & Low Registers */ +_VOLDATA _UINT8 __at 0x14 TCH1H; /* TIM Channel 1 Register High */ +_VOLDATA _UINT8 __at 0x15 TCH1L; /* TIM Channel 1 Register Low */ + +_VOLDATA _UINT8 __at 0x16 KBSCR; /* Keyboard Status and Control Register */ + #define MODEK ((struct __hc08_bits *)(&KBSCR))->bit0 + #define IMASKK ((struct __hc08_bits *)(&KBSCR))->bit1 + #define ACKK ((struct __hc08_bits *)(&KBSCR))->bit2 + #define KEYF ((struct __hc08_bits *)(&KBSCR))->bit3 + +_VOLDATA _UINT8 __at 0x17 KBIER; /* Keyboard Interrupt Enable Register */ + #define KBIE0 ((struct __hc08_bits *)(&KBIER))->bit0 + #define KBIE1 ((struct __hc08_bits *)(&KBIER))->bit1 + #define KBIE2 ((struct __hc08_bits *)(&KBIER))->bit2 + #define KBIE3 ((struct __hc08_bits *)(&KBIER))->bit3 + #define KBIE4 ((struct __hc08_bits *)(&KBIER))->bit4 + #define KBIE5 ((struct __hc08_bits *)(&KBIER))->bit5 + #define KBIE6 ((struct __hc08_bits *)(&KBIER))->bit6 + #define KBIE7 ((struct __hc08_bits *)(&KBIER))->bit7 + +_VOLDATA _UINT8 __at 0x18 UIR2; /* USB Interrupt Register 2 */ + #define RXD0FR ((struct __hc08_bits *)(&UIR2))->bit0 + #define TXD0FR ((struct __hc08_bits *)(&UIR2))->bit1 + #define RESUMFR ((struct __hc08_bits *)(&UIR2))->bit2 + #define TXD1FR ((struct __hc08_bits *)(&UIR2))->bit3 + #define RXD2FR ((struct __hc08_bits *)(&UIR2))->bit4 + #define TXD2FR ((struct __hc08_bits *)(&UIR2))->bit5 + #define RSTFR ((struct __hc08_bits *)(&UIR2))->bit6 + #define EOPFR ((struct __hc08_bits *)(&UIR2))->bit7 + +_VOLDATA _UINT8 __at 0x19 UCR2; /* USB Control Register 2 */ + #define TP2SIZ0 ((struct __hc08_bits *)(&UCR2))->bit0 + #define TP2SIZ1 ((struct __hc08_bits *)(&UCR2))->bit1 + #define TP2SIZ2 ((struct __hc08_bits *)(&UCR2))->bit2 + #define TP2SIZ3 ((struct __hc08_bits *)(&UCR2))->bit3 + #define RX2E ((struct __hc08_bits *)(&UCR2))->bit4 + #define TX2E ((struct __hc08_bits *)(&UCR2))->bit5 + #define STALL2 ((struct __hc08_bits *)(&UCR2))->bit6 + #define T2SEQ ((struct __hc08_bits *)(&UCR2))->bit7 + +_VOLDATA _UINT8 __at 0x1a UCR3; /* USB Control Register 3 */ + #define ENABLE1 ((struct __hc08_bits *)(&UCR3))->bit0 + #define ENABLE2 ((struct __hc08_bits *)(&UCR3))->bit1 + #define PULLEN ((struct __hc08_bits *)(&UCR3))->bit2 + #define ISTALL0 ((struct __hc08_bits *)(&UCR3))->bit4 + #define OSTALL0 ((struct __hc08_bits *)(&UCR3))->bit5 + #define TX1STR ((struct __hc08_bits *)(&UCR3))->bit6 + #define TX1ST ((struct __hc08_bits *)(&UCR3))->bit7 + +_VOLDATA _UINT8 __at 0x1b UCR4; /* USB Control Register 4 */ + #define FDM ((struct __hc08_bits *)(&UCR4))->bit0 + #define FDP ((struct __hc08_bits *)(&UCR4))->bit1 + #define FUSB0 ((struct __hc08_bits *)(&UCR4))->bit2 + +_VOLDATA _UINT8 __at 0x1c IOCR; /* IRQ Option Control Register */ + #define IRQPD ((struct __hc08_bits *)(&IOCR))->bit0 + #define PTE4IE ((struct __hc08_bits *)(&IOCR))->bit1 + #define PTE4IF ((struct __hc08_bits *)(&IOCR))->bit2 + +_VOLDATA _UINT8 __at 0x1d POCR; /* Port Option Control Register */ + #define PAP ((struct __hc08_bits *)(&POCR))->bit0 + #define PBP ((struct __hc08_bits *)(&POCR))->bit1 + #define PCP ((struct __hc08_bits *)(&POCR))->bit2 + #define PTE3P ((struct __hc08_bits *)(&POCR))->bit3 + #define PTE4P ((struct __hc08_bits *)(&POCR))->bit4 + #define PTDILDD ((struct __hc08_bits *)(&POCR))->bit5 + #define PTDLDD ((struct __hc08_bits *)(&POCR))->bit6 + #define PTE20P ((struct __hc08_bits *)(&POCR))->bit7 + +_VOLDATA _UINT8 __at 0x1e ISCR; /* IRQ Status and Control Register */ + #define MODE ((struct __hc08_bits *)(&ISCR))->bit0 + #define IMASK ((struct __hc08_bits *)(&ISCR))->bit1 + #define ACK ((struct __hc08_bits *)(&ISCR))->bit2 + #define IRQF ((struct __hc08_bits *)(&ISCR))->bit3 + +_VOLDATA _UINT8 __at 0x1f CONFIG; /* Configuration Register 1 */ +/* CONFIG1 is one-time writeable, so can't use bitfields */ + +_VOLDATA _UINT8 __at 0x20 UE0D0; /* USB Endpoint 0 Data Register 0 */ +_VOLDATA _UINT8 __at 0x21 UE0D1; /* USB Endpoint 0 Data Register 1 */ +_VOLDATA _UINT8 __at 0x22 UE0D2; /* USB Endpoint 0 Data Register 2 */ +_VOLDATA _UINT8 __at 0x23 UE0D3; /* USB Endpoint 0 Data Register 3 */ +_VOLDATA _UINT8 __at 0x24 UE0D4; /* USB Endpoint 0 Data Register 4 */ +_VOLDATA _UINT8 __at 0x25 UE0D5; /* USB Endpoint 0 Data Register 5 */ +_VOLDATA _UINT8 __at 0x26 UE0D6; /* USB Endpoint 0 Data Register 6 */ +_VOLDATA _UINT8 __at 0x27 UE0D7; /* USB Endpoint 0 Data Register 7 */ + +_VOLDATA _UINT8 __at 0x28 UE1D0; /* USB Endpoint 1 Data Register 0 */ +_VOLDATA _UINT8 __at 0x29 UE1D1; /* USB Endpoint 1 Data Register 1 */ +_VOLDATA _UINT8 __at 0x2a UE1D2; /* USB Endpoint 1 Data Register 2 */ +_VOLDATA _UINT8 __at 0x2b UE1D3; /* USB Endpoint 1 Data Register 3 */ +_VOLDATA _UINT8 __at 0x2c UE1D4; /* USB Endpoint 1 Data Register 4 */ +_VOLDATA _UINT8 __at 0x2d UE1D5; /* USB Endpoint 1 Data Register 5 */ +_VOLDATA _UINT8 __at 0x2e UE1D6; /* USB Endpoint 1 Data Register 6 */ +_VOLDATA _UINT8 __at 0x2f UE1D7; /* USB Endpoint 1 Data Register 7 */ + +_VOLDATA _UINT8 __at 0x30 UE2D0; /* USB Endpoint 2 Data Register 0 */ +_VOLDATA _UINT8 __at 0x31 UE2D1; /* USB Endpoint 2 Data Register 1 */ +_VOLDATA _UINT8 __at 0x32 UE2D2; /* USB Endpoint 2 Data Register 2 */ +_VOLDATA _UINT8 __at 0x33 UE2D3; /* USB Endpoint 2 Data Register 3 */ +_VOLDATA _UINT8 __at 0x34 UE2D4; /* USB Endpoint 2 Data Register 4 */ +_VOLDATA _UINT8 __at 0x35 UE2D5; /* USB Endpoint 2 Data Register 5 */ +_VOLDATA _UINT8 __at 0x36 UE2D6; /* USB Endpoint 2 Data Register 6 */ +_VOLDATA _UINT8 __at 0x37 UE2D7; /* USB Endpoint 2 Data Register 7 */ + +_VOLDATA _UINT8 __at 0x38 UADDR; /* USB Address Register */ + #define USBEN ((struct __hc08_bits *)(&UADDR))->bit7 + +_VOLDATA _UINT8 __at 0x39 UIR0; /* USB Interrupt Register 0 */ + #define RXD0IE ((struct __hc08_bits *)(&UIR0))->bit0 + #define TXD0IE ((struct __hc08_bits *)(&UIR0))->bit1 + #define TXD1IE ((struct __hc08_bits *)(&UIR0))->bit3 + #define RXD2IE ((struct __hc08_bits *)(&UIR0))->bit4 + #define TXD2IE ((struct __hc08_bits *)(&UIR0))->bit5 + #define SUSPND ((struct __hc08_bits *)(&UIR0))->bit6 + #define EOPIE ((struct __hc08_bits *)(&UIR0))->bit7 + +_VOLDATA _UINT8 __at 0x3a UIR1; /* USB Interrupt Register 1 */ + #define RXD0F ((struct __hc08_bits *)(&UIR1))->bit0 + #define TXD0F ((struct __hc08_bits *)(&UIR1))->bit1 + #define RESUMF ((struct __hc08_bits *)(&UIR1))->bit2 + #define TXD1F ((struct __hc08_bits *)(&UIR1))->bit3 + #define RXD2F ((struct __hc08_bits *)(&UIR1))->bit4 + #define TXD2F ((struct __hc08_bits *)(&UIR1))->bit5 + #define RSTF ((struct __hc08_bits *)(&UIR1))->bit6 + #define EOPF ((struct __hc08_bits *)(&UIR1))->bit7 + +_VOLDATA _UINT8 __at 0x3b UCR0; /* USB Control Register 0 */ + #define TP0SIZ0 ((struct __hc08_bits *)(&UCR0))->bit0 + #define TP0SIZ1 ((struct __hc08_bits *)(&UCR0))->bit1 + #define TP0SIZ2 ((struct __hc08_bits *)(&UCR0))->bit2 + #define TP0SIZ3 ((struct __hc08_bits *)(&UCR0))->bit3 + #define RX0E ((struct __hc08_bits *)(&UCR0))->bit4 + #define TX0E ((struct __hc08_bits *)(&UCR0))->bit5 + #define T0SEQ ((struct __hc08_bits *)(&UCR0))->bit7 + +_VOLDATA _UINT8 __at 0x3c UCR1; /* USB Control Register 1 */ + #define TP1SIZ0 ((struct __hc08_bits *)(&UCR1))->bit0 + #define TP1SIZ1 ((struct __hc08_bits *)(&UCR1))->bit1 + #define TP1SIZ2 ((struct __hc08_bits *)(&UCR1))->bit2 + #define TP1SIZ3 ((struct __hc08_bits *)(&UCR1))->bit3 + #define FRESUM ((struct __hc08_bits *)(&UCR1))->bit4 + #define TX1E ((struct __hc08_bits *)(&UCR1))->bit5 + #define STALL1 ((struct __hc08_bits *)(&UCR1))->bit6 + #define T1SEQ ((struct __hc08_bits *)(&UCR1))->bit7 + +_VOLDATA _UINT8 __at 0x3d USR0; /* USB Status Register 0 */ + #define RP0SIZ0 ((struct __hc08_bits *)(&USR0))->bit0 + #define RP0SIZ1 ((struct __hc08_bits *)(&USR0))->bit1 + #define RP0SIZ2 ((struct __hc08_bits *)(&USR0))->bit2 + #define RP0SIZ3 ((struct __hc08_bits *)(&USR0))->bit3 + #define SETUP ((struct __hc08_bits *)(&USR0))->bit6 + #define R0SEQ ((struct __hc08_bits *)(&USR0))->bit7 + +_VOLDATA _UINT8 __at 0x3e USR1; /* USB Status Register 1 */ + #define RP2SIZ0 ((struct __hc08_bits *)(&USR1))->bit0 + #define RP2SIZ1 ((struct __hc08_bits *)(&USR1))->bit1 + #define RP2SIZ2 ((struct __hc08_bits *)(&USR1))->bit2 + #define RP2SIZ3 ((struct __hc08_bits *)(&USR1))->bit3 + #define TXSTL ((struct __hc08_bits *)(&USR1))->bit4 + #define TXNAK ((struct __hc08_bits *)(&USR1))->bit5 + #define TXACK ((struct __hc08_bits *)(&USR1))->bit6 + #define R2SEQ ((struct __hc08_bits *)(&USR1))->bit7 + +_VOLXDATA _UINT8 __at 0xfe00 BSR; /* Break Status Register */ + #define SBSW ((struct __hc08_bits *)(&BSR))->bit1 + +_VOLXDATA _UINT8 __at 0xfe01 RSR; /* Reset Status Register */ + #define LVI ((struct __hc08_bits *)(&RSR))->bit1 + #define USB ((struct __hc08_bits *)(&RSR))->bit2 + #define ILAD ((struct __hc08_bits *)(&RSR))->bit3 + #define ILOP ((struct __hc08_bits *)(&RSR))->bit4 + #define COP ((struct __hc08_bits *)(&RSR))->bit5 + #define PIN ((struct __hc08_bits *)(&RSR))->bit6 + #define POR ((struct __hc08_bits *)(&RSR))->bit7 + +_VOLXDATA _UINT8 __at 0xfe03 BFCR; /* Break Flag Control Register */ + #define BFCE ((struct __hc08_bits *)(&BFCR))->bit7 + +_VOLXDATA _UINT8 __at 0xfe04 INT1; /* Interrupt Status Register 1 */ + #define IF1 ((struct __hc08_bits *)(&INT1))->bit2 + #define IF2 ((struct __hc08_bits *)(&INT1))->bit3 + #define IF3 ((struct __hc08_bits *)(&INT1))->bit4 + #define IF4 ((struct __hc08_bits *)(&INT1))->bit5 + #define IF5 ((struct __hc08_bits *)(&INT1))->bit6 + #define IF6 ((struct __hc08_bits *)(&INT1))->bit7 + +_VOLXDATA _UINT8 __at 0xfe08 FLCR; /* FLASH Control Register */ + #define PGM ((struct __hc08_bits *)(&FLCR))->bit0 + #define ERASE ((struct __hc08_bits *)(&FLCR))->bit1 + #define MASS ((struct __hc08_bits *)(&FLCR))->bit2 + #define HVEN ((struct __hc08_bits *)(&FLCR))->bit3 + +_VOLXDATA _UINT8 __at 0xfe09 FLBPR; /* FLASH Block Protect Register */ + #define BPR0 ((struct __hc08_bits *)(&FLBPR))->bit0 + #define BPR1 ((struct __hc08_bits *)(&FLBPR))->bit1 + #define BPR2 ((struct __hc08_bits *)(&FLBPR))->bit2 + #define BPR3 ((struct __hc08_bits *)(&FLBPR))->bit3 + #define BPR4 ((struct __hc08_bits *)(&FLBPR))->bit4 + #define BPR5 ((struct __hc08_bits *)(&FLBPR))->bit5 + #define BPR6 ((struct __hc08_bits *)(&FLBPR))->bit6 + #define BPR7 ((struct __hc08_bits *)(&FLBPR))->bit7 + +_VOLXDATA _UINT16 __at 0xfe0c BRK; /* Break Address High & Low Registers */ +_VOLXDATA _UINT8 __at 0xfe0c BRKH; /* Break Address High Register */ +_VOLXDATA _UINT8 __at 0xfe0d BRKL; /* Break Address Low Register */ + +_VOLXDATA _UINT8 __at 0xfe0e BRKSCR; /* Break Status and Control Register */ + #define BRKA ((struct __hc08_bits *)(&BRKSCR))->bit6 + #define BRKE ((struct __hc08_bits *)(&BRKSCR))->bit7 + +_VOLXDATA _UINT8 __at 0xffff COPCTL; /* COP Control Register */ + +#endif + diff --git a/device/include/hc08/mc68hc908jkjl.h b/device/include/hc08/mc68hc908jkjl.h new file mode 100644 index 0000000..9bfee75 --- /dev/null +++ b/device/include/hc08/mc68hc908jkjl.h @@ -0,0 +1,405 @@ +/*------------------------------------------------------------------------- + Register Declarations for Motorola MC68HC908JK1/JK3/JL3/JK8/JL8 + + Copyright (c) 2004, Lucas Loizaga + + Based on mc68hc908qy.h, + Written By - Erik Petrich + epetrich@users.sourceforge.net (2003) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef _MC68HC908JKJL_H +#define _MC68HC908JKJL_H + +#ifndef _UINT8 + #define _UINT8 unsigned char +#endif +#ifndef _UINT16 + #define _UINT16 unsigned int +#endif +#ifndef _VOLDATA + #define _VOLDATA volatile __data +#endif +#ifndef _VOLXDATA + #define _VOLXDATA volatile __xdata +#endif + +struct __hc08_bits +{ + unsigned int bit0:1; + unsigned int bit1:1; + unsigned int bit2:1; + unsigned int bit3:1; + unsigned int bit4:1; + unsigned int bit5:1; + unsigned int bit6:1; + unsigned int bit7:1; +}; + + +_VOLDATA _UINT8 __at 0x00 PTA; /* Port A Data Register */ +#define PORTA PTA /* Alias for PTA */ + #define PTA0 ((struct __hc08_bits *)(&PTA))->bit0 + #define PTA1 ((struct __hc08_bits *)(&PTA))->bit1 + #define PTA2 ((struct __hc08_bits *)(&PTA))->bit2 + #define PTA3 ((struct __hc08_bits *)(&PTA))->bit3 + #define PTA4 ((struct __hc08_bits *)(&PTA))->bit4 + #define PTA5 ((struct __hc08_bits *)(&PTA))->bit5 + #define PTA6 ((struct __hc08_bits *)(&PTA))->bit6 + #define PTA7 ((struct __hc08_bits *)(&PTA))->bit7 + +_VOLDATA _UINT8 __at 0x01 PTB; /* Port B Data Register */ +#define PORTB PTB /* Alias for PTB */ + #define PTB0 ((struct __hc08_bits *)(&PTB))->bit0 + #define PTB1 ((struct __hc08_bits *)(&PTB))->bit1 + #define PTB2 ((struct __hc08_bits *)(&PTB))->bit2 + #define PTB3 ((struct __hc08_bits *)(&PTB))->bit3 + #define PTB4 ((struct __hc08_bits *)(&PTB))->bit4 + #define PTB5 ((struct __hc08_bits *)(&PTB))->bit5 + #define PTB6 ((struct __hc08_bits *)(&PTB))->bit6 + #define PTB7 ((struct __hc08_bits *)(&PTB))->bit7 + +_VOLDATA _UINT8 __at 0x03 PTD; /* Port D Data Register */ +#define PORTD PTD /* Alias for PTD */ + #define PTD0 ((struct __hc08_bits *)(&PTD))->bit0 + #define PTD1 ((struct __hc08_bits *)(&PTD))->bit1 + #define PTD2 ((struct __hc08_bits *)(&PTD))->bit2 + #define PTD3 ((struct __hc08_bits *)(&PTD))->bit3 + #define PTD4 ((struct __hc08_bits *)(&PTD))->bit4 + #define PTD5 ((struct __hc08_bits *)(&PTD))->bit5 + #define PTD6 ((struct __hc08_bits *)(&PTD))->bit6 + #define PTD7 ((struct __hc08_bits *)(&PTD))->bit7 + +_VOLDATA _UINT8 __at 0x04 DDRA; /* Data Direction Register A */ + #define DDRA0 ((struct __hc08_bits *)(&DDRA))->bit0 + #define DDRA1 ((struct __hc08_bits *)(&DDRA))->bit1 + #define DDRA2 ((struct __hc08_bits *)(&DDRA))->bit2 + #define DDRA3 ((struct __hc08_bits *)(&DDRA))->bit3 + #define DDRA4 ((struct __hc08_bits *)(&DDRA))->bit4 + #define DDRA5 ((struct __hc08_bits *)(&DDRA))->bit5 + #define DDRA6 ((struct __hc08_bits *)(&DDRA))->bit6 + #define DDRA7 ((struct __hc08_bits *)(&DDRA))->bit7 + +_VOLDATA _UINT8 __at 0x05 DDRB; /* Data Direction Register B */ + #define DDRB0 ((struct __hc08_bits *)(&DDRB))->bit0 + #define DDRB1 ((struct __hc08_bits *)(&DDRB))->bit1 + #define DDRB2 ((struct __hc08_bits *)(&DDRB))->bit2 + #define DDRB3 ((struct __hc08_bits *)(&DDRB))->bit3 + #define DDRB4 ((struct __hc08_bits *)(&DDRB))->bit4 + #define DDRB5 ((struct __hc08_bits *)(&DDRB))->bit5 + #define DDRB6 ((struct __hc08_bits *)(&DDRB))->bit6 + #define DDRB7 ((struct __hc08_bits *)(&DDRB))->bit7 + +_VOLDATA _UINT8 __at 0x07 DDRD; /* Data Direction Register D */ + #define DDRD0 ((struct __hc08_bits *)(&DDRD))->bit0 + #define DDRD1 ((struct __hc08_bits *)(&DDRD))->bit1 + #define DDRD2 ((struct __hc08_bits *)(&DDRD))->bit2 + #define DDRD3 ((struct __hc08_bits *)(&DDRD))->bit3 + #define DDRD4 ((struct __hc08_bits *)(&DDRD))->bit4 + #define DDRD5 ((struct __hc08_bits *)(&DDRD))->bit5 + #define DDRD6 ((struct __hc08_bits *)(&DDRD))->bit6 + #define DDRD7 ((struct __hc08_bits *)(&DDRD))->bit7 + +_VOLDATA _UINT8 __at 0x08 PTE; /* Port E Data Register */ +#define PORTE PTE /* Alias for PTE */ + #define PTE0 ((struct __hc08_bits *)(&PTE))->bit0 + #define PTE1 ((struct __hc08_bits *)(&PTE))->bit1 + +_VOLDATA _UINT8 __at 0x0A PDCR; /* Port D Control Register */ + + #define PTDPU6 ((struct __hc08_bits *)(&PDCR))->bit0 + #define PTDPU7 ((struct __hc08_bits *)(&PDCR))->bit1 + #define SLOWD6 ((struct __hc08_bits *)(&PDCR))->bit2 + #define SLOWD7 ((struct __hc08_bits *)(&PDCR))->bit3 + +_VOLDATA _UINT8 __at 0x0C DDRE; /* Data Direction Register E */ + #define DDRE0 ((struct __hc08_bits *)(&DDRE))->bit0 + #define DDRE1 ((struct __hc08_bits *)(&DDRE))->bit1 + + +_VOLDATA _UINT8 __at 0x0D PTAPUE; /* Port A pull-up enables */ + #define PTAPUE0 ((struct __hc08_bits *)(&PTAPUE))->bit0 + #define PTAPUE1 ((struct __hc08_bits *)(&PTAPUE))->bit1 + #define PTAPUE2 ((struct __hc08_bits *)(&PTAPUE))->bit2 + #define PTAPUE3 ((struct __hc08_bits *)(&PTAPUE))->bit3 + #define PTAPUE4 ((struct __hc08_bits *)(&PTAPUE))->bit4 + #define PTAPUE5 ((struct __hc08_bits *)(&PTAPUE))->bit5 + #define PTAPUE6 ((struct __hc08_bits *)(&PTAPUE))->bit6 + #define PTA6EN ((struct __hc08_bits *)(&PTAPUE))->bit7 + +_VOLDATA _UINT8 __at 0x0E PTA7PUE; /* Port A pull-up enables */ + #define PTAPUE7 ((struct __hc08_bits *)(&PTA7PUE))->bit7 + +_VOLDATA _UINT8 __at 0x13 SCC1; /* SCI Control Register 1 */ + #define LOOPS ((struct __hc08_bits *)(&SCC1))->bit7 + #define ENSCI ((struct __hc08_bits *)(&SCC1))->bit6 + #define TXINV ((struct __hc08_bits *)(&SCC1))->bit5 + #define M ((struct __hc08_bits *)(&SCC1))->bit4 + #define WAKE ((struct __hc08_bits *)(&SCC1))->bit3 + #define ILTY ((struct __hc08_bits *)(&SCC1))->bit2 + #define PEN ((struct __hc08_bits *)(&SCC1))->bit1 + #define PTY ((struct __hc08_bits *)(&SCC1))->bit0 + + +_VOLDATA _UINT8 __at 0x14 SCC2; /* SCI Control Register 2 */ + #define SCTIE ((struct __hc08_bits *)(&SCC2))->bit7 + #define TCIE ((struct __hc08_bits *)(&SCC2))->bit6 + #define SCRIE ((struct __hc08_bits *)(&SCC2))->bit5 + #define ILIE ((struct __hc08_bits *)(&SCC2))->bit4 + #define TE ((struct __hc08_bits *)(&SCC2))->bit3 + #define RE ((struct __hc08_bits *)(&SCC2))->bit2 + #define WRU ((struct __hc08_bits *)(&SCC2))->bit1 + #define SBK ((struct __hc08_bits *)(&SCC2))->bit0 + +_VOLDATA _UINT8 __at 0x15 SCC3; /* SCI Control Register 3 */ + #define SCC3_R8 ((struct __hc08_bits *)(&SCC3))->bit7 + #define SCC3_TB ((struct __hc08_bits *)(&SCC3))->bit6 + #define DMARE ((struct __hc08_bits *)(&SCC3))->bit5 + #define DMATE ((struct __hc08_bits *)(&SCC3))->bit4 + #define ORIE ((struct __hc08_bits *)(&SCC3))->bit3 + #define NEIE ((struct __hc08_bits *)(&SCC3))->bit2 + #define FEIE ((struct __hc08_bits *)(&SCC3))->bit1 + #define PEIE ((struct __hc08_bits *)(&SCC3))->bit0 + +_VOLDATA _UINT8 __at 0x16 SCS1; /* SCI Status Register 1 */ + #define SCTE ((struct __hc08_bits *)(&SCS1))->bit7 + #define TC ((struct __hc08_bits *)(&SCS1))->bit6 + #define SCRF ((struct __hc08_bits *)(&SCS1))->bit5 + #define IDLE ((struct __hc08_bits *)(&SCS1))->bit4 + #define OR ((struct __hc08_bits *)(&SCS1))->bit3 + #define NF ((struct __hc08_bits *)(&SCS1))->bit2 + #define FE ((struct __hc08_bits *)(&SCS1))->bit1 + #define PE ((struct __hc08_bits *)(&SCS1))->bit0 + +_VOLDATA _UINT8 __at 0x17 SCS2; /* SCI Status Register 2 */ + #define RPF ((struct __hc08_bits *)(&SCS2))->bit0 + #define BKF ((struct __hc08_bits *)(&SCS2))->bit1 + /* Bits 2-7 not implemented */ + +_VOLDATA _UINT8 __at 0x18 SCDR; /* SCI Data Register */ + +_VOLDATA _UINT8 __at 0x19 SCBR; /* SCI Baud Rate Register */ + #define SCP1 ((struct __hc08_bits *)(&SCBR))->bit5 + #define SCP0 ((struct __hc08_bits *)(&SCBR))->bit4 + #define R ((struct __hc08_bits *)(&SCBR))->bit3 + #define SCR2 ((struct __hc08_bits *)(&SCBR))->bit2 + #define SCR1 ((struct __hc08_bits *)(&SCBR))->bit1 + #define SCR0 ((struct __hc08_bits *)(&SCBR))->bit0 + /*-- Bits 6 and 7 do not exist */ + + +_VOLDATA _UINT8 __at 0x1a KBSCR; /* Keyboard Status and Control Register */ + #define MODEK ((struct __hc08_bits *)(&KBSCR))->bit0 + #define IMASKK ((struct __hc08_bits *)(&KBSCR))->bit1 + #define ACKK ((struct __hc08_bits *)(&KBSCR))->bit2 + #define KEYF ((struct __hc08_bits *)(&KBSCR))->bit3 + /*-- Bits 4-7 do not exist */ + +_VOLDATA _UINT8 __at 0x1b KBIER; /* Keyboard Interrupt Enable Register */ + #define KBIE0 ((struct __hc08_bits *)(&KBIER))->bit0 + #define KBIE1 ((struct __hc08_bits *)(&KBIER))->bit1 + #define KBIE3 ((struct __hc08_bits *)(&KBIER))->bit3 + #define KBIE2 ((struct __hc08_bits *)(&KBIER))->bit2 + #define KBIE4 ((struct __hc08_bits *)(&KBIER))->bit4 + #define KBIE5 ((struct __hc08_bits *)(&KBIER))->bit5 + #define KBIE6 ((struct __hc08_bits *)(&KBIER))->bit6 + #define KBIE7 ((struct __hc08_bits *)(&KBIER))->bit7 + +_VOLDATA _UINT8 __at 0x1D INTSCR; /* IRQ status/control */ + #define IRQF1 ((struct __hc08_bits *)(&INTSCR))->bit3 + #define ACK1 ((struct __hc08_bits *)(&INTSCR))->bit2 + #define IMASK1 ((struct __hc08_bits *)(&INTSCR))->bit1 + #define MODE1 ((struct __hc08_bits *)(&INTSCR))->bit0 + /* Bits 4-7 unimplemented */ + +_VOLDATA _UINT8 __at 0x1e CONFIG2; /* Configuration Register 2 */ +/* CONFIG2 is one-time writeble, so can't use bitfields */ + +_VOLDATA _UINT8 __at 0x1f CONFIG1; /* Configuration Register 1 */ +/* CONFIG1 is one-time writeable, so can't use bitfields */ + +_VOLDATA _UINT8 __at 0x20 T1SC; /* TIM 1 Status and Control */ + #define PS0 ((struct __hc08_bits *)(&T1SC))->bit0 + #define PS1 ((struct __hc08_bits *)(&T1SC))->bit1 + #define PS2 ((struct __hc08_bits *)(&T1SC))->bit2 + #define TRST ((struct __hc08_bits *)(&T1SC))->bit4 + #define TSTOP ((struct __hc08_bits *)(&T1SC))->bit5 + #define TOIE ((struct __hc08_bits *)(&T1SC))->bit6 + #define TOF ((struct __hc08_bits *)(&T1SC))->bit7 + +_VOLDATA _UINT16 __at 0x21 T1CNT; /* TIM1 Counter High & Low Registers */ +_VOLDATA _UINT8 __at 0x21 T1CNTH; /* TIM1 Counter Register High */ +_VOLDATA _UINT8 __at 0x22 T1CNTL; /* TIM1 Counter Register Low */ + +_VOLDATA _UINT16 __at 0x23 T1MOD; /* TIM1 Counter Modulo High & Low Registers */ +_VOLDATA _UINT8 __at 0x23 T1MODH; /* TIM1 Counter Modulo Register High */ +_VOLDATA _UINT8 __at 0x24 T1MODL; /* TIM1 Counter Modulo Register Low */ + +_VOLDATA _UINT8 __at 0x25 T1SC0; /* TIM1 Channel 0 Status and Control Register */ + #define CH0MAX ((struct __hc08_bits *)(&T1SC0))->bit0 + #define TOV0 ((struct __hc08_bits *)(&T1SC0))->bit1 + #define ELS0A ((struct __hc08_bits *)(&T1SC0))->bit2 + #define ELS0B ((struct __hc08_bits *)(&T1SC0))->bit3 + #define MS0A ((struct __hc08_bits *)(&T1SC0))->bit4 + #define MS0B ((struct __hc08_bits *)(&T1SC0))->bit5 + #define CH0IE ((struct __hc08_bits *)(&T1SC0))->bit6 + #define CH0F ((struct __hc08_bits *)(&T1SC0))->bit7 + +_VOLDATA _UINT16 __at 0x26 T1CH0; /* TIM1 Channel 0 High & Low Registers */ +_VOLDATA _UINT8 __at 0x26 T1CH0H; /* TIM1 Channel 0 Register High */ +_VOLDATA _UINT8 __at 0x27 T1CH0L; /* TIM1 Channel 0 Register Low */ + +_VOLDATA _UINT8 __at 0x28 T1SC1; /* TIM1 Channel 1 Status and Control Register */ + #define CH1MAX ((struct __hc08_bits *)(&T1SC1))->bit0 + #define TOV1 ((struct __hc08_bits *)(&T1SC1))->bit1 + #define ELS1A ((struct __hc08_bits *)(&T1SC1))->bit2 + #define ELS1B ((struct __hc08_bits *)(&T1SC1))->bit3 + #define MS1A ((struct __hc08_bits *)(&T1SC1))->bit4 + #define CH1IE ((struct __hc08_bits *)(&T1SC1))->bit6 + #define CH1F ((struct __hc08_bits *)(&T1SC1))->bit7 + +_VOLDATA _UINT16 __at 0x29 T1CH1; /* TIM1 Channel 1 High & Low Registers */ +_VOLDATA _UINT8 __at 0x29 T1CH1H; /* TIM1 Channel 1 Register High */ +_VOLDATA _UINT8 __at 0x2A T1CH1L; /* TIM1 Channel 1 Register Low */ + +_VOLDATA _UINT8 __at 0x30 T2SC; /* TIM2 Status and Control Register */ + #define PS0_2 ((struct __hc08_bits *)(&T2SC))->bit0 + #define PS1_2 ((struct __hc08_bits *)(&T2SC0))->bit1 + #define PS2_2 ((struct __hc08_bits *)(&T2SC0))->bit2 + #define TRST_2 ((struct __hc08_bits *)(&T2SC0))->bit4 + #define TSTOP_2 ((struct __hc08_bits *)(&T2SC0))->bit5 + #define TOIE_2 ((struct __hc08_bits *)(&T2SC0))->bit6 + #define TOF_2 ((struct __hc08_bits *)(&T2SC0))->bit7 + +_VOLDATA _UINT16 __at 0x31 T2CNT; /* TIM2 Counter Registers */ +_VOLDATA _UINT8 __at 0x31 T2CNTH; /* TIM2 Counter Register High */ +_VOLDATA _UINT8 __at 0x32 T2CNTL; /* TIM2 Counter Register Low */ + + +_VOLDATA _UINT16 __at 0x33 T2MOD; /* TIM2 Counter Modulo Registers */ +_VOLDATA _UINT8 __at 0x33 T2MODH; /* TIM2 Counter Modulo Register High */ +_VOLDATA _UINT8 __at 0x34 T2MODL; /* TIM2 Counter Modulo Register Low */ + + +_VOLDATA _UINT8 __at 0x35 T2SC0; /* TIM2 Channel 0 Status and Control Register */ + #define CH0MAX_2 ((struct __hc08_bits *)(&T2SC0))->bit0 + #define TOV0_2 ((struct __hc08_bits *)(&T2SC0))->bit1 + #define ELS0A_2 ((struct __hc08_bits *)(&T2SC0))->bit2 + #define ELS0B_2 ((struct __hc08_bits *)(&T2SC0))->bit3 + #define MS0A_2 ((struct __hc08_bits *)(&T2SC0))->bit4 + #define CH0IE_2 ((struct __hc08_bits *)(&T2SC0))->bit6 + #define CH0F_2 ((struct __hc08_bits *)(&T2SC0))->bit7 + +_VOLDATA _UINT16 __at 0x36 T2CH0; /* TIM2 Channel 0 High & Low Registers */ +_VOLDATA _UINT8 __at 0x36 T2CH0H; /* TIM2 Channel 0 Register High */ +_VOLDATA _UINT8 __at 0x37 T2CH0L; /* TIM2 Channel 0 Register Low */ + +_VOLDATA _UINT8 __at 0x38 T2SC1; /* TIM2 Channel 1 Status and Control Register */ + #define CH1MAX_2 ((struct __hc08_bits *)(&T2SC1))->bit0 + #define TOV1_2 ((struct __hc08_bits *)(&T2SC1))->bit1 + #define ELS1A_2 ((struct __hc08_bits *)(&T2SC1))->bit2 + #define ELS1B_2 ((struct __hc08_bits *)(&T2SC1))->bit3 + #define MS1A_2 ((struct __hc08_bits *)(&T2SC1))->bit4 + #define CH1IE_2 ((struct __hc08_bits *)(&T2SC1))->bit6 + #define CH1F_2 ((struct __hc08_bits *)(&T2SC1))->bit7 + +_VOLDATA _UINT16 __at 0x39 T2CH1; /* TIM2 Channel 1 High & Low Registers */ +_VOLDATA _UINT8 __at 0x39 T2CH1H; /* TIM2 Channel 1 Register High */ +_VOLDATA _UINT8 __at 0x3a T2CH1L; /* TIM2 Channel 1 Register Low */ + + +_VOLDATA _UINT8 __at 0x3c ADSCR; /* Analog-to-Digital Status and Control Reg. */ + #define COCO ((struct __hc08_bits *)(&ADSCR))->bit7 + #define AIEN ((struct __hc08_bits *)(&ADSCR))->bit6 + #define ADCO ((struct __hc08_bits *)(&ADSCR))->bit5 + #define ADCH4 ((struct __hc08_bits *)(&ADSCR))->bit4 + #define ADCH3 ((struct __hc08_bits *)(&ADSCR))->bit3 + #define ADCH2 ((struct __hc08_bits *)(&ADSCR))->bit2 + #define ADCH1 ((struct __hc08_bits *)(&ADSCR))->bit1 + #define ADCH0 ((struct __hc08_bits *)(&ADSCR))->bit0 + +_VOLDATA _UINT8 __at 0x3d ADR; /* Analog-to-Digital Data Register */ + +_VOLDATA _UINT8 __at 0x3e ADCLK; /* Analog-to-Digital Clock */ + #define ADIV2 ((struct __hc08_bits *)(&ADCLK))->bit7 + #define ADIV1 ((struct __hc08_bits *)(&ADCLK))->bit6 + #define ADIV0 ((struct __hc08_bits *)(&ADCLK))->bit5 + /* Bits 0-4 unimplemented */ + +_VOLXDATA _UINT8 __at 0xfe00 BSR; /* SIM Break Status Register */ + #define SBSW ((struct __hc08_bits *)(&BSR))->bit1 + +_VOLXDATA _UINT8 __at 0xfe01 RSR; /* SIM Reset Status Register */ + #define LVI ((struct __hc08_bits *)(&RSR))->bit1 + #define MODRST ((struct __hc08_bits *)(&RSR))->bit2 + #define ILAD ((struct __hc08_bits *)(&RSR))->bit3 + #define ILOP ((struct __hc08_bits *)(&RSR))->bit4 + #define COP ((struct __hc08_bits *)(&RSR))->bit5 + #define PIN ((struct __hc08_bits *)(&RSR))->bit6 + #define POR ((struct __hc08_bits *)(&RSR))->bit7 + /* Bit 0 unimplemented */ + +_VOLXDATA _UINT8 __at 0xfe02 SUBAR; /* SIM Upper Byte Address */ + +_VOLXDATA _UINT8 __at 0xfe03 BFCR; /* SIM Break Flag Control Register */ + #define BFCE ((struct __hc08_bits *)(&BFCR))->bit7 + +_VOLXDATA _UINT8 __at 0xfe04 INT1; /* Interrupt Status Register 1 */ + #define IF1 ((struct __hc08_bits *)(&INT1))->bit2 + #define IF3 ((struct __hc08_bits *)(&INT1))->bit4 + #define IF4 ((struct __hc08_bits *)(&INT1))->bit5 + #define IF5 ((struct __hc08_bits *)(&INT1))->bit6 + + +_VOLXDATA _UINT8 __at 0xfe05 INT2; /* Interrupt Status Register 2 */ + #define IF14 ((struct __hc08_bits *)(&INT2))->bit7 + +_VOLXDATA _UINT8 __at 0xfe06 INT3; /* Interrupt Status Register 3 */ + #define IF16 ((struct __hc08_bits *)(&INT3))->bit1 + #define IF15 ((struct __hc08_bits *)(&INT3))->bit0 + +_VOLXDATA _UINT8 __at 0xfe08 FLCR; /* FLASH Control Register */ + #define PGM ((struct __hc08_bits *)(&FLCR))->bit0 + #define ERASE ((struct __hc08_bits *)(&FLCR))->bit1 + #define MASS ((struct __hc08_bits *)(&FLCR))->bit2 + #define HVEN ((struct __hc08_bits *)(&FLCR))->bit3 + +_VOLXDATA _UINT8 __at 0xfe09 FLBPR; /* Flash Block Protect Register */ + #define BPR0 ((struct __hc08_bits *)(&FLBPR))->bit0 + #define BPR1 ((struct __hc08_bits *)(&FLBPR))->bit1 + #define BPR2 ((struct __hc08_bits *)(&FLBPR))->bit2 + #define BPR3 ((struct __hc08_bits *)(&FLBPR))->bit3 + #define BPR4 ((struct __hc08_bits *)(&FLBPR))->bit4 + #define BPR5 ((struct __hc08_bits *)(&FLBPR))->bit5 + #define BPR6 ((struct __hc08_bits *)(&FLBPR))->bit6 + #define BPR7 ((struct __hc08_bits *)(&FLBPR))->bit7 + +_VOLXDATA _UINT16 __at 0xfe0C BRK; /* Break Address High & Low Registers */ +_VOLXDATA _UINT8 __at 0xfe0C BRKH; /* Break Address High Register */ +_VOLXDATA _UINT8 __at 0xfe0D BRKL; /* Break Address Low Register */ + +_VOLXDATA _UINT8 __at 0xfe0e BRKSCR; /* Break Status and Control Register */ + #define BRKA ((struct __hc08_bits *)(&BRKSCR))->bit6 + #define BRKE ((struct __hc08_bits *)(&BRKSCR))->bit7 + +_VOLXDATA _UINT8 __at 0xffff COPCTL; /* COP Control Register */ + +#endif diff --git a/device/include/hc08/mc68hc908qy.h b/device/include/hc08/mc68hc908qy.h new file mode 100644 index 0000000..7a82570 --- /dev/null +++ b/device/include/hc08/mc68hc908qy.h @@ -0,0 +1,258 @@ +/*------------------------------------------------------------------------- + Register Declarations for Motorola MC68HC908QY & MC68HC908QT + + Written By - Erik Petrich + epetrich@users.sourceforge.net (2003) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef _MC68HC908QY_H +#define _MC68HC908QY_H + +#ifndef _UINT8 + #define _UINT8 unsigned char +#endif +#ifndef _UINT16 + #define _UINT16 unsigned int +#endif +#ifndef _VOLDATA + #define _VOLDATA volatile __data +#endif +#ifndef _VOLXDATA + #define _VOLXDATA volatile __xdata +#endif + +struct __hc08_bits +{ + unsigned int bit0:1; + unsigned int bit1:1; + unsigned int bit2:1; + unsigned int bit3:1; + unsigned int bit4:1; + unsigned int bit5:1; + unsigned int bit6:1; + unsigned int bit7:1; +}; + + +_VOLDATA _UINT8 __at 0x00 PTA; /* Port A Data Register */ + #define PTA0 ((struct __hc08_bits *)(&PTA))->bit0 + #define PTA1 ((struct __hc08_bits *)(&PTA))->bit1 + #define PTA2 ((struct __hc08_bits *)(&PTA))->bit2 + #define PTA3 ((struct __hc08_bits *)(&PTA))->bit3 + #define PTA4 ((struct __hc08_bits *)(&PTA))->bit4 + #define PTA5 ((struct __hc08_bits *)(&PTA))->bit5 + #define AWUL ((struct __hc08_bits *)(&PTA))->bit6 + +_VOLDATA _UINT8 __at 0x01 PTB; /* Port B Data Register */ + #define PTB0 ((struct __hc08_bits *)(&PTB))->bit0 + #define PTB1 ((struct __hc08_bits *)(&PTB))->bit1 + #define PTB2 ((struct __hc08_bits *)(&PTB))->bit2 + #define PTB3 ((struct __hc08_bits *)(&PTB))->bit3 + #define PTB4 ((struct __hc08_bits *)(&PTB))->bit4 + #define PTB5 ((struct __hc08_bits *)(&PTB))->bit5 + #define PTB6 ((struct __hc08_bits *)(&PTB))->bit6 + #define PTB7 ((struct __hc08_bits *)(&PTB))->bit7 + +_VOLDATA _UINT8 __at 0x04 DDRA; /* Data Direction Register A */ + #define DDRA0 ((struct __hc08_bits *)(&DDRA))->bit0 + #define DDRA1 ((struct __hc08_bits *)(&DDRA))->bit1 + #define DDRA3 ((struct __hc08_bits *)(&DDRA))->bit3 + #define DDRA4 ((struct __hc08_bits *)(&DDRA))->bit4 + #define DDRA5 ((struct __hc08_bits *)(&DDRA))->bit5 + +_VOLDATA _UINT8 __at 0x05 DDRB; /* Data Direction Register B */ + #define DDRB0 ((struct __hc08_bits *)(&DDRB))->bit0 + #define DDRB1 ((struct __hc08_bits *)(&DDRB))->bit1 + #define DDRB2 ((struct __hc08_bits *)(&DDRB))->bit2 + #define DDRB3 ((struct __hc08_bits *)(&DDRB))->bit3 + #define DDRB4 ((struct __hc08_bits *)(&DDRB))->bit4 + #define DDRB5 ((struct __hc08_bits *)(&DDRB))->bit5 + #define DDRB6 ((struct __hc08_bits *)(&DDRB))->bit6 + #define DDRB7 ((struct __hc08_bits *)(&DDRB))->bit7 + +_VOLDATA _UINT8 __at 0x0b PTAPUE; /* Port A Input Pullup Enable Register */ + #define PTAPUE0 ((struct __hc08_bits *)(&PTAPUE))->bit0 + #define PTAPUE1 ((struct __hc08_bits *)(&PTAPUE))->bit1 + #define PTAPUE2 ((struct __hc08_bits *)(&PTAPUE))->bit2 + #define PTAPUE3 ((struct __hc08_bits *)(&PTAPUE))->bit3 + #define PTAPUE4 ((struct __hc08_bits *)(&PTAPUE))->bit4 + #define PTAPUE5 ((struct __hc08_bits *)(&PTAPUE))->bit5 + #define OSC2EN ((struct __hc08_bits *)(&PTAPUE))->bit7 + +_VOLDATA _UINT8 __at 0x0c PTBPUE; /* Port B Input Pullup Enable Register */ + #define PTBPUE0 ((struct __hc08_bits *)(&PTBPUE))->bit0 + #define PTBPUE1 ((struct __hc08_bits *)(&PTBPUE))->bit1 + #define PTBPUE2 ((struct __hc08_bits *)(&PTBPUE))->bit2 + #define PTBPUE3 ((struct __hc08_bits *)(&PTBPUE))->bit3 + #define PTBPUE4 ((struct __hc08_bits *)(&PTBPUE))->bit4 + #define PTBPUE5 ((struct __hc08_bits *)(&PTBPUE))->bit5 + #define PTBPUE6 ((struct __hc08_bits *)(&PTBPUE))->bit6 + #define PTBPUE7 ((struct __hc08_bits *)(&PTBPUE))->bit7 + +_VOLDATA _UINT8 __at 0x1a KBSCR; /* Keyboard Status and Control Register */ + #define MODEK ((struct __hc08_bits *)(&KBSCR))->bit0 + #define IMASKK ((struct __hc08_bits *)(&KBSCR))->bit1 + #define ACKK ((struct __hc08_bits *)(&KBSCR))->bit2 + #define KEYF ((struct __hc08_bits *)(&KBSCR))->bit3 + +_VOLDATA _UINT8 __at 0x1b KBIER; /* Keyboard Interrupt Enable Register */ + #define KBIE0 ((struct __hc08_bits *)(&KBIER))->bit0 + #define KBIE1 ((struct __hc08_bits *)(&KBIER))->bit1 + #define KBIE2 ((struct __hc08_bits *)(&KBIER))->bit2 + #define KBIE3 ((struct __hc08_bits *)(&KBIER))->bit3 + #define KBIE4 ((struct __hc08_bits *)(&KBIER))->bit4 + #define KBIE5 ((struct __hc08_bits *)(&KBIER))->bit5 + #define AWUIE ((struct __hc08_bits *)(&KBIER))->bit6 + +_VOLDATA _UINT8 __at 0x1d INTSCR; /* IRQ Status and Control Register */ + #define MODE1 ((struct __hc08_bits *)(&INTSCR))->bit0 + #define IMASK1 ((struct __hc08_bits *)(&INTSCR))->bit1 + #define ACK1 ((struct __hc08_bits *)(&INTSCR))->bit2 + #define IRQF1 ((struct __hc08_bits *)(&INTSCR))->bit3 + +_VOLDATA _UINT8 __at 0x1e CONFIG2; /* Configuration Register 2 */ +/* CONFIG2 is one-time writeable, so can't use bitfields */ + +_VOLDATA _UINT8 __at 0x1f CONFIG1; /* Configuration Register 1 */ +/* CONFIG1 is one-time writeable, so can't use bitfields */ + +_VOLDATA _UINT8 __at 0x20 TSC; /* TIM Status and Control */ + #define PS0 ((struct __hc08_bits *)(&TSC))->bit0 + #define PS1 ((struct __hc08_bits *)(&TSC))->bit1 + #define PS2 ((struct __hc08_bits *)(&TSC))->bit2 + #define TRST ((struct __hc08_bits *)(&TSC))->bit4 + #define TSTOP ((struct __hc08_bits *)(&TSC))->bit5 + #define TOIE ((struct __hc08_bits *)(&TSC))->bit6 + #define TOF ((struct __hc08_bits *)(&TSC))->bit7 + +_VOLDATA _UINT8 __at 0x21 TCNTH; /* TIM Counter Register High */ +_VOLDATA _UINT8 __at 0x22 TCNTL; /* TIM Counter Register Low */ +_VOLDATA _UINT16 __at 0x21 TCNT; /* TIM Counter High & Low Registers */ + +_VOLDATA _UINT8 __at 0x23 TMODH; /* TIM Counter Modulo Register High */ +_VOLDATA _UINT8 __at 0x24 TMODL; /* TIM Counter Modulo Register Low */ +_VOLDATA _UINT16 __at 0x23 TMOD; /* TIM Counter Modulo High & Low Registers */ + +_VOLDATA _UINT8 __at 0x25 TSC0; /* TIM Channel 0 Status and Control Register */ + #define CH0MAX ((struct __hc08_bits *)(&TSC0))->bit0 + #define TOV0 ((struct __hc08_bits *)(&TSC0))->bit1 + #define ELS0A ((struct __hc08_bits *)(&TSC0))->bit2 + #define ELS0B ((struct __hc08_bits *)(&TSC0))->bit3 + #define MS0A ((struct __hc08_bits *)(&TSC0))->bit4 + #define MS0B ((struct __hc08_bits *)(&TSC0))->bit5 + #define CH0IE ((struct __hc08_bits *)(&TSC0))->bit6 + #define CH0F ((struct __hc08_bits *)(&TSC0))->bit7 + +_VOLDATA _UINT8 __at 0x26 TCH0H; /* TIM Channel 0 Register High */ +_VOLDATA _UINT8 __at 0x27 TCH0L; /* TIM Channel 0 Register Low */ +_VOLDATA _UINT16 __at 0x26 TCH0; /* TIM Channel 0 High & Low Registers */ + +_VOLDATA _UINT8 __at 0x28 TSC1; /* TIM Channel 1 Status and Control Register */ + #define CH1MAX ((struct __hc08_bits *)(&TSC1))->bit0 + #define TOV1 ((struct __hc08_bits *)(&TSC1))->bit1 + #define ELS1A ((struct __hc08_bits *)(&TSC1))->bit2 + #define ELS1B ((struct __hc08_bits *)(&TSC1))->bit3 + #define MS1A ((struct __hc08_bits *)(&TSC1))->bit4 + #define MS1B ((struct __hc08_bits *)(&TSC1))->bit5 + #define CH1IE ((struct __hc08_bits *)(&TSC1))->bit6 + #define CH1F ((struct __hc08_bits *)(&TSC1))->bit7 + +_VOLDATA _UINT8 __at 0x29 TCH1H; /* TIM Channel 1 Register High */ +_VOLDATA _UINT8 __at 0x2a TCH1L; /* TIM Channel 1 Register Low */ +_VOLDATA _UINT16 __at 0x29 TCH1; /* TIM Channel 1 High & Low Registers */ + +_VOLDATA _UINT8 __at 0x36 OSCSTAT; /* Oscillator Status Register */ + #define ECGST ((struct __hc08_bits *)(&OSCSTAT))->bit0 + #define ECGON ((struct __hc08_bits *)(&OSCSTAT))->bit1 + +_VOLDATA _UINT8 __at 0x38 OSCTRIM; /* Oscillator Trim Register */ + +_VOLDATA _UINT8 __at 0x3c ADSCR; /* ADC Status and Control Register */ + #define CH0 ((struct __hc08_bits *)(&ADSCR))->bit0 + #define CH1 ((struct __hc08_bits *)(&ADSCR))->bit1 + #define CH2 ((struct __hc08_bits *)(&ADSCR))->bit2 + #define CH3 ((struct __hc08_bits *)(&ADSCR))->bit3 + #define CH4 ((struct __hc08_bits *)(&ADSCR))->bit4 + #define ADC0 ((struct __hc08_bits *)(&ADSCR))->bit5 + #define AIEN ((struct __hc08_bits *)(&ADSCR))->bit6 + #define COCO ((struct __hc08_bits *)(&ADSCR))->bit7 + +_VOLDATA _UINT8 __at 0x3e ADR; /* ADC Data Register */ + +_VOLDATA _UINT8 __at 0x3f ADICLK; /* ADS Input Clock Register */ + #define ADIV0 ((struct __hc08_bits *)(&ADICLK))->bit5 + #define ADIV1 ((struct __hc08_bits *)(&ADICLK))->bit6 + #define ADIV2 ((struct __hc08_bits *)(&ADICLK))->bit7 + +_VOLXDATA _UINT8 __at 0xfe00 BSR; /* Break Status Register */ + #define SBSW ((struct __hc08_bits *)(&BSR))->bit1 + +_VOLXDATA _UINT8 __at 0xfe01 SRSR; /* SIM Reset Status Register */ + #define LVI ((struct __hc08_bits *)(&SRSR))->bit1 + #define MODRST ((struct __hc08_bits *)(&SRSR))->bit2 + #define ILAD ((struct __hc08_bits *)(&SRSR))->bit3 + #define ILOP ((struct __hc08_bits *)(&SRSR))->bit4 + #define COP ((struct __hc08_bits *)(&SRSR))->bit5 + #define PIN ((struct __hc08_bits *)(&SRSR))->bit6 + #define POR ((struct __hc08_bits *)(&SRSR))->bit7 + +_VOLXDATA _UINT8 __at 0xfe02 BRKAR; /* Break Auxilliary Register */ + #define BDCOP ((struct __hc08_bits *)(&BRKAR))->bit0 + +_VOLXDATA _UINT8 __at 0xfe03 BFCF; /* Break Flag Control Register */ + #define BFCF ((struct __hc08_bits *)(&BFCF))->bit7 + +_VOLXDATA _UINT8 __at 0xfe04 INT1; /* Interrupt Status Register 1 */ + #define IF1 ((struct __hc08_bits *)(&INT1))->bit2 + #define IF3 ((struct __hc08_bits *)(&INT1))->bit4 + #define IF4 ((struct __hc08_bits *)(&INT1))->bit5 + #define IF5 ((struct __hc08_bits *)(&INT1))->bit6 + +_VOLXDATA _UINT8 __at 0xfe05 INT2; /* Interrupt Status Register 2 */ + #define IF14 ((struct __hc08_bits *)(&INT2))->bit7 + +_VOLXDATA _UINT8 __at 0xfe06 INT3; /* Interrupt Status Register 3 */ + #define IF15 ((struct __hc08_bits *)(&INT3))->bit0 + +_VOLXDATA _UINT8 __at 0xfe08 FLCR; /* FLASH Control Register */ + #define PGM ((struct __hc08_bits *)(&FLCR))->bit0 + #define ERASE ((struct __hc08_bits *)(&FLCR))->bit1 + #define MASS ((struct __hc08_bits *)(&FLCR))->bit2 + #define HVEN ((struct __hc08_bits *)(&FLCR))->bit3 + +_VOLXDATA _UINT8 __at 0xfe09 BRKH; /* Break Address High Register */ +_VOLXDATA _UINT8 __at 0xfe0a BRKL; /* Break Address Low Register */ +_VOLXDATA _UINT16 __at 0xfe09 BRK; /* Break Address High & Low Registers */ + +_VOLXDATA _UINT8 __at 0xfe0b BRKSCR; /* Break Status and Control Register */ + #define BRKA ((struct __hc08_bits *)(&BRKSCR))->bit6 + #define BRKE ((struct __hc08_bits *)(&BRKSCR))->bit7 + +_VOLXDATA _UINT8 __at 0xfe0c LVISR; /* LVI Status Register */ + #define LVIOUT ((struct __hc08_bits *)(&LVISR))->bit7 + +_VOLXDATA _UINT8 __at 0xffbe FLBPR; /* FLASH Block Protect Register */ +_VOLXDATA _UINT8 __at 0xffc0 OSCTRIMVAL; /* Oscillator Trim Value */ +_VOLXDATA _UINT8 __at 0xffff COPCTL; /* COP Control Register */ + + +#endif + diff --git a/device/include/limits.h b/device/include/limits.h new file mode 100644 index 0000000..23cbc60 --- /dev/null +++ b/device/include/limits.h @@ -0,0 +1,55 @@ +/*------------------------------------------------------------------------- + limits.h - ANSI defines constants for sizes of integral types + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef __SDC51_LIMITS_H +#define __SDC51_LIMITS_H 1 + +#define CHAR_BIT 8 /* bits in a char */ +#define CHAR_MAX 127 +#define CHAR_MIN -128 +#define SCHAR_MAX CHAR_MAX +#define SCHAR_MIN CHAR_MIN +#define UCHAR_MAX 0xff +#define UCHAR_MIN 0 +#define INT_MIN -32768 +#define INT_MAX 32767 +#define SHRT_MAX INT_MAX +#define SHRT_MIN INT_MIN +#define UINT_MAX 0xffff +#define UINT_MIN 0 +#define USHRT_MAX UINT_MAX +#define USHRT_MIN UINT_MIN +#define LONG_MIN -2147483648 +#define LONG_MAX 2147483647 +#define ULONG_MAX 0xffffffff +#define ULONG_MIN 0 + + +#endif + + + + + + diff --git a/device/include/malloc.h b/device/include/malloc.h new file mode 100644 index 0000000..0ddf4f8 --- /dev/null +++ b/device/include/malloc.h @@ -0,0 +1,46 @@ +/*------------------------------------------------------------------------- + malloc.h - malloc header file + + Written By - Written by Dmitry S. Obukhov, 1997 dso@usa.net + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +/* malloc.h */ +#ifndef __SDCC51_MALLOC_H +#define __SDCC51_MALLOC_H +#include +#include + +#if _SDCC_MALLOC_TYPE_MLH + +void * calloc (size_t nmemb, size_t size); +void * malloc (size_t size); +void * realloc (void * ptr, size_t size); +void free (void * ptr); + +#else + +extern void __xdata * calloc (size_t nmemb, size_t size); +extern void __xdata * malloc (size_t size); +extern void __xdata * realloc (void * ptr, size_t size); +extern void free (void * ptr); + +#endif + +#endif diff --git a/device/include/math.h b/device/include/math.h new file mode 100644 index 0000000..bca7090 --- /dev/null +++ b/device/include/math.h @@ -0,0 +1,96 @@ +/* math.h: Floating point math function declarations + + Copyright (C) 2001 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +#ifndef _INC_MATH +#define _INC_MATH + +#define HUGE_VALF 3.402823466e+38 + +#define PI 3.1415926536 +#define TWO_PI 6.2831853071 +#define HALF_PI 1.5707963268 +#define QUART_PI 0.7853981634 +#define iPI 0.3183098862 +#define iTWO_PI 0.1591549431 +#define TWO_O_PI 0.6366197724 + +/* EPS=B**(-t/2), where B is the radix of the floating-point representation + and there are t base-B digits in the significand. Therefore, for floats + EPS=2**(-12). Also define EPS2=EPS*EPS. */ +#define EPS 244.14062E-6 +#define EPS2 59.6046E-9 + +union float_long +{ + float f; + long l; +}; + +#if defined(SDCC_MATH_LIB) && defined(SDCC_mcs51) && !defined(SDCC_USE_XSTACK) && !defined(SDCC_STACK_AUTO) && !defined(_SDCC_NO_ASM_LIB_FUNCS) +/* Compile the mcs51 assembly version only when all these + conditions are met. Since not all the functions are + reentrant, do not compile with --stack-auto is used. */ +#define MATH_ASM_MCS51 +#endif + + +/* Functions on the z80 & gbz80 are always reentrant and so the "reentrant" */ +/* keyword is not defined. */ +#if defined(SDCC_z80) || defined(SDCC_gbz80) +#define _FLOAT_FUNC_REENTRANT +#else +#define _FLOAT_FUNC_REENTRANT __reentrant +#endif + +/********************************************** + * Prototypes for float ANSI C math functions * + **********************************************/ + +/* Trigonometric functions */ +float sinf(const float x) _FLOAT_FUNC_REENTRANT; +float cosf(const float x) _FLOAT_FUNC_REENTRANT; +float tanf(const float x) _FLOAT_FUNC_REENTRANT; +float cotf(const float x) _FLOAT_FUNC_REENTRANT; +float asinf(const float x) _FLOAT_FUNC_REENTRANT; +float acosf(const float x) _FLOAT_FUNC_REENTRANT; +float atanf(const float x) _FLOAT_FUNC_REENTRANT; +float atan2f(const float x, const float y); + +/* Hyperbolic functions */ +float sinhf(const float x) _FLOAT_FUNC_REENTRANT; +float coshf(const float x) _FLOAT_FUNC_REENTRANT; +float tanhf(const float x) _FLOAT_FUNC_REENTRANT; + +/* Exponential, logarithmic and power functions */ +float expf(const float x); +float logf(const float x) _FLOAT_FUNC_REENTRANT; +float log10f(const float x) _FLOAT_FUNC_REENTRANT; +float powf(const float x, const float y); +float sqrtf(const float a) _FLOAT_FUNC_REENTRANT; + +/* Nearest integer, absolute value, and remainder functions */ +float fabsf(const float x) _FLOAT_FUNC_REENTRANT; +float frexpf(const float x, int *pw2); +float ldexpf(const float x, const int pw2); +float ceilf(float x) _FLOAT_FUNC_REENTRANT; +float floorf(float x) _FLOAT_FUNC_REENTRANT; +float modff(float x, float * y); + +#endif /* _INC_MATH */ diff --git a/device/include/mcs51/8051.h b/device/include/mcs51/8051.h new file mode 100644 index 0000000..01a7fe8 --- /dev/null +++ b/device/include/mcs51/8051.h @@ -0,0 +1,175 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Intel 8051 Processor + + Written By - Bela Torok / bela.torok@kssg.ch (July 2000) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef REG8051_H +#define REG8051_H + +/* BYTE Register */ +__sfr __at (0x80) P0 ; +__sfr __at (0x81) SP ; +__sfr __at (0x82) DPL ; +__sfr __at (0x83) DPH ; +__sfr __at (0x87) PCON ; +__sfr __at (0x88) TCON ; +__sfr __at (0x89) TMOD ; +__sfr __at (0x8A) TL0 ; +__sfr __at (0x8B) TL1 ; +__sfr __at (0x8C) TH0 ; +__sfr __at (0x8D) TH1 ; +__sfr __at (0x90) P1 ; +__sfr __at (0x98) SCON ; +__sfr __at (0x99) SBUF ; +__sfr __at (0xA0) P2 ; +__sfr __at (0xA8) IE ; +__sfr __at (0xB0) P3 ; +__sfr __at (0xB8) IP ; +__sfr __at (0xD0) PSW ; +__sfr __at (0xE0) ACC ; +__sfr __at (0xF0) B ; + + +/* BIT Register */ +/* P0 */ +__sbit __at (0x80) P0_0 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x87) P0_7 ; + +/* TCON */ +__sbit __at (0x88) IT0 ; +__sbit __at (0x89) IE0 ; +__sbit __at (0x8A) IT1 ; +__sbit __at (0x8B) IE1 ; +__sbit __at (0x8C) TR0 ; +__sbit __at (0x8D) TF0 ; +__sbit __at (0x8E) TR1 ; +__sbit __at (0x8F) TF1 ; + +/* P1 */ +__sbit __at (0x90) P1_0 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x92) P1_2 ; +__sbit __at (0x93) P1_3 ; +__sbit __at (0x94) P1_4 ; +__sbit __at (0x95) P1_5 ; +__sbit __at (0x96) P1_6 ; +__sbit __at (0x97) P1_7 ; + +/* SCON */ +__sbit __at (0x98) RI ; +__sbit __at (0x99) TI ; +__sbit __at (0x9A) RB8 ; +__sbit __at (0x9B) TB8 ; +__sbit __at (0x9C) REN ; +__sbit __at (0x9D) SM2 ; +__sbit __at (0x9E) SM1 ; +__sbit __at (0x9F) SM0 ; + +/* P2 */ +__sbit __at (0xA0) P2_0 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA4) P2_4 ; +__sbit __at (0xA5) P2_5 ; +__sbit __at (0xA6) P2_6 ; +__sbit __at (0xA7) P2_7 ; + +/* IE */ +__sbit __at (0xA8) EX0 ; +__sbit __at (0xA9) ET0 ; +__sbit __at (0xAA) EX1 ; +__sbit __at (0xAB) ET1 ; +__sbit __at (0xAC) ES ; +__sbit __at (0xAF) EA ; + +/* P3 */ +__sbit __at (0xB0) P3_0 ; +__sbit __at (0xB1) P3_1 ; +__sbit __at (0xB2) P3_2 ; +__sbit __at (0xB3) P3_3 ; +__sbit __at (0xB4) P3_4 ; +__sbit __at (0xB5) P3_5 ; +__sbit __at (0xB6) P3_6 ; +__sbit __at (0xB7) P3_7 ; + +__sbit __at (0xB0) RXD ; +__sbit __at (0xB1) TXD ; +__sbit __at (0xB2) INT0 ; +__sbit __at (0xB3) INT1 ; +__sbit __at (0xB4) T0 ; +__sbit __at (0xB5) T1 ; +__sbit __at (0xB6) WR ; +__sbit __at (0xB7) RD ; + +/* IP */ +__sbit __at (0xB8) PX0 ; +__sbit __at (0xB9) PT0 ; +__sbit __at (0xBA) PX1 ; +__sbit __at (0xBB) PT1 ; +__sbit __at (0xBC) PS ; + +/* PSW */ +__sbit __at (0xD0) P ; +__sbit __at (0xD1) F1 ; +__sbit __at (0xD2) OV ; +__sbit __at (0xD3) RS0 ; +__sbit __at (0xD4) RS1 ; +__sbit __at (0xD5) F0 ; +__sbit __at (0xD6) AC ; +__sbit __at (0xD7) CY ; + +/* BIT definitions for bits that are not directly accessible */ +/* PCON bits */ +#define IDL 0x01 +#define PD 0x02 +#define GF0 0x04 +#define GF1 0x08 +#define SMOD 0x80 + +/* TMOD bits */ +#define T0_M0 0x01 +#define T0_M1 0x02 +#define T0_CT 0x04 +#define T0_GATE 0x08 +#define T1_M0 0x10 +#define T1_M1 0x20 +#define T1_CT 0x40 +#define T1_GATE 0x80 + +#define T0_MASK 0x0F +#define T1_MASK 0xF0 + +/* Interrupt numbers: address = (number * 8) + 3 */ +#define IE0_VECTOR 0 /* 0x03 external interrupt 0 */ +#define TF0_VECTOR 1 /* 0x0b timer 0 */ +#define IE1_VECTOR 2 /* 0x13 external interrupt 1 */ +#define TF1_VECTOR 3 /* 0x1b timer 1 */ +#define SI0_VECTOR 4 /* 0x23 serial port 0 */ + +#endif diff --git a/device/include/mcs51/8052.h b/device/include/mcs51/8052.h new file mode 100644 index 0000000..173b1d0 --- /dev/null +++ b/device/include/mcs51/8052.h @@ -0,0 +1,70 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Intel 8052 Processor + + Written By - Bela Torok / bela.torok@kssg.ch (July 2000) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef REG8052_H +#define REG8052_H + +#include <8051.h> /* load definitions for the 8051 core */ + +#ifdef REG8051_H +#undef REG8051_H +#endif + +/* define 8052 specific registers only */ + +/* T2CON */ +__sfr __at (0xC8) T2CON ; + +/* RCAP2 L & H */ +__sfr __at (0xCA) RCAP2L ; +__sfr __at (0xCB) RCAP2H ; +__sfr __at (0xCC) TL2 ; +__sfr __at (0xCD) TH2 ; + +/* IE */ +__sbit __at (0xAD) ET2 ; /* Enable timer2 interrupt */ + +/* IP */ +__sbit __at (0xBD) PT2 ; /* T2 interrupt priority bit */ + +/* T2CON bits */ +__sbit __at (0xC8) T2CON_0 ; +__sbit __at (0xC9) T2CON_1 ; +__sbit __at (0xCA) T2CON_2 ; +__sbit __at (0xCB) T2CON_3 ; +__sbit __at (0xCC) T2CON_4 ; +__sbit __at (0xCD) T2CON_5 ; +__sbit __at (0xCE) T2CON_6 ; +__sbit __at (0xCF) T2CON_7 ; + +__sbit __at (0xC8) CP_RL2 ; +__sbit __at (0xC9) C_T2 ; +__sbit __at (0xCA) TR2 ; +__sbit __at (0xCB) EXEN2 ; +__sbit __at (0xCC) TCLK ; +__sbit __at (0xCD) RCLK ; +__sbit __at (0xCE) EXF2 ; +__sbit __at (0xCF) TF2 ; + +#endif diff --git a/device/include/mcs51/ADuC84x.h b/device/include/mcs51/ADuC84x.h new file mode 100644 index 0000000..2ce4131 --- /dev/null +++ b/device/include/mcs51/ADuC84x.h @@ -0,0 +1,379 @@ +/*------------------------------------------------------------------------- + Register Declarations for Analog Devices ADuC841/ADuC842/ADuC843 + (Based on datasheet Rev 0, 11/2003 ) + + Written By - Jesus Calvino-Fraga / jesusc at ece.ubc.ca (March 2007) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option); any later version + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#ifndef REG_ADUC84X_H +#define REG_ADUC84X_H + +#include + +SFR(CFG841, 0xAF); // ADuC841 Configuration SFR. +SFR(CFG842, 0xAF); // ADuC842/ADuC843 Configuration SFR. + //For the two SFRs above these are the bits. Warning: some are different for + //the ADuC841 and ADuC842/ADuC843. Check the datasheet! + #define EPM2 0x10 // Flash/EE Controller and PWM Clock Frequency Configuration Bit 2. + #define EPM1 0x08 // Flash/EE Controller and PWM Clock Frequency Configuration Bit 1. + #define EPM0 0x04 // Flash/EE Controller and PWM Clock Frequency Configuration Bit 0. + #define EXSP 0x80 // Extended SP Enable. + #define PWPO 0x40 // PWM Pin Out Selection. + #define DBUF 0x20 // DAC Output Buffer. + #define EXTCLK 0x10 // Set by the user to 1 to select an external clock input on P3.4. + #define MSPI 0x02 // Set to 1 by the user to move the SPI functionality of. + #define XRAMEN 0x01 // XRAM Enable Bit. + +SFR(SP, 0x81); // Stack Pointer. +SFR(SPH, 0xB7); // Stack pointer high. + +SFR(DPL, 0x82); // Data Pointer Low. +SFR(DPH, 0x83); // Data Pointer High. +SFR(DPP, 0x84); // Data Pointer Page Byte. +SFR(DPCON, 0xA7); // Data Pointer Control SFR. + +SFR(PCON, 0x87); // Power Control. + #define SMOD 0x80 //Double UART Baud Rate. + #define SERIPD 0x40 //I2C/SPI Power-Down Interrupt Enable. + #define INT0PD 0x20 //INT0 Power-Down Interrupt Enable. + #define ALEOFF 0x10 //Disable ALE Output. + #define GF1 0x08 //General-Purpose Flag Bit. + #define GF0 0x04 //General-Purpose Flag Bit. + #define PD 0x02 //Power-Down Mode Enable. + #define IDL 0x01 //Idle Mode Enable. + +SFR(TCON, 0x88); // Timer/Counter Control. + SBIT(TF1, 0x88, 7); // Timer 1 overflow flag. + SBIT(TR1, 0x88, 6); // Timer 1 run control flag. + SBIT(TF0, 0x88, 5); // Timer 0 overflow flag. + SBIT(TR0, 0x88, 4); // Timer 0 run control flag. + SBIT(IE1, 0x88, 3); // Interrupt 1 flag. + SBIT(IT1, 0x88, 2); // Interrupt 1 type control bit. + SBIT(IE0, 0x88, 1); // Interrupt 0 flag. + SBIT(IT0, 0x88, 0); // Interrupt 0 type control bit. + +SFR(TMOD, 0x89); // Timer/Counter Mode Control. + #define GATE1 0x80 // External enable for timer 1. + #define C_T1 0x40 // Timer or counter select for timer 1. + #define M1_1 0x20 // Operation mode bit 1 for timer 1. + #define M0_1 0x10 // Operation mode bit 0 for timer 1. + #define GATE0 0x08 // External enable for timer 0. + #define C_T0 0x04 // Timer or counter select for timer 0. + #define M1_0 0x02 // Operation mode bit 1 for timer 0. + #define M0_0 0x01 // Operation mode bit 0 for timer 0. + +SFR(TL0, 0x8A); // Timer 0 LSB. +SFR(TL1, 0x8B); // Timer 1 LSB. +SFR(TH0, 0x8C); // Timer 0 MSB. +SFR(TH1, 0x8D); // Timer 1 MSB. + +SFR(P0, 0x80); // Port 0 + SBIT(P0_0, 0x80, 0); // Port 0 bit 0. + SBIT(P0_1, 0x80, 1); // Port 0 bit 1. + SBIT(P0_2, 0x80, 2); // Port 0 bit 2. + SBIT(P0_3, 0x80, 3); // Port 0 bit 3. + SBIT(P0_4, 0x80, 4); // Port 0 bit 4. + SBIT(P0_5, 0x80, 5); // Port 0 bit 5. + SBIT(P0_6, 0x80, 6); // Port 0 bit 6. + SBIT(P0_7, 0x80, 7); // Port 0 bit 7. + +SFR(P1, 0x90); // Port 1 + SBIT(P1_0, 0x90, 0); // Port 1 bit 0. + SBIT(P1_1, 0x90, 1); // Port 1 bit 1. + SBIT(P1_2, 0x90, 2); // Port 1 bit 2. + SBIT(P1_3, 0x90, 3); // Port 1 bit 3. + SBIT(P1_4, 0x90, 4); // Port 1 bit 4. + SBIT(P1_5, 0x90, 5); // Port 1 bit 5. + SBIT(P1_6, 0x90, 6); // Port 1 bit 6. + SBIT(P1_7, 0x90, 7); // Port 1 bit 7. + // Alternate names + SBIT(T2EX, 0x90, 1); //Capture/reload trigger for Counter 2. + SBIT(T2, 0x90, 0); //Input to Timer/Counter 2. + +SFR(P2, 0xA0); // Port 2 + SBIT(P2_0, 0xA0, 0); // Port 2 bit 0. + SBIT(P2_1, 0xA0, 1); // Port 2 bit 1. + SBIT(P2_2, 0xA0, 2); // Port 2 bit 2. + SBIT(P2_3, 0xA0, 3); // Port 2 bit 3. + SBIT(P2_4, 0xA0, 4); // Port 2 bit 4. + SBIT(P2_5, 0xA0, 5); // Port 2 bit 5. + SBIT(P2_6, 0xA0, 6); // Port 2 bit 6. + SBIT(P2_7, 0xA0, 7); // Port 2 bit 7. + +SFR(P3, 0xB0); // Port 3 + SBIT(P3_0, 0xB0, 0); // Port 3 bit 0. + SBIT(P3_1, 0xB0, 1); // Port 3 bit 1. + SBIT(P3_2, 0xB0, 2); // Port 3 bit 2. + SBIT(P3_3, 0xB0, 3); // Port 3 bit 3. + SBIT(P3_4, 0xB0, 4); // Port 3 bit 4. + SBIT(P3_5, 0xB0, 5); // Port 3 bit 5. + SBIT(P3_6, 0xB0, 6); // Port 3 bit 6. + SBIT(P3_7, 0xB0, 7); // Port 3 bit 7. + // Alternate names. + SBIT(RXD, 0xB0, 0); + SBIT(TXD, 0xB0, 1); + SBIT(INT0, 0xB0, 2); + SBIT(INT1, 0xB0, 3); + SBIT(T0, 0xB0, 4); + SBIT(T1, 0xB0, 5); + SBIT(WR, 0xB0, 6); + SBIT(RD, 0xB0, 7); + +SFR(I2CADD, 0x9B); // I2C Address Register 1. +SFR(I2CADD1, 0x91); // I2C Address Register 2. +SFR(I2CADD2, 0x92); // I2C Address Register 3. +SFR(I2CADD3, 0x93); // I2C Address Register 4. +SFR(I2CDAT, 0x9A); // I2C Data Register. + +SFR(SCON, 0x98); // Serial Port Control. + SBIT(SM0, 0x98, 7); // Serial Port Mode Bit 0. + SBIT(SM1, 0x98, 6); // Serial Port Mode Bit 1. + SBIT(SM2, 0x98, 5); // Serial Port Mode Bit 2. + SBIT(REN, 0x98, 4); // Enables serial reception. + SBIT(TB8, 0x98, 3); // The 9th data bit that will be transmitted in Modes 2 and 3. + SBIT(RB8, 0x98, 2); // In Modes 2 and 3, the 9th data bit that was received. + SBIT(TI, 0x98, 1); // Transmit interrupt flag. + SBIT(RI, 0x98, 0); // Receive interrupt flag. + +SFR(SBUF, 0x99); // Serial Data Buffer. + +//For these two, you may want to check page 68 of the datasheet... +SFR(T3FD, 0x9D); // Fractional divider ratio. +SFR(T3CON, 0x9E); // T3CON is the baud rate control SFR, allowing Timer 3 to be + // used to set up the UART baud rate, and setting up the binary + // divider (DIV). +#define T3BAUDEN 0x80 // T3 UART BAUD Enable. +#define DIV2 0x04 // Binary Divider Factor bit 3. +#define DIV1 0x02 // Binary Divider Factor bit 2. +#define DIV0 0x01 // Binary Divider Factor bit 1. + +SFR(TIMECON, 0xA1); // TIC Control Register. + #define TFH 0x40 // Twenty-Four Hour Select Bit. + #define ITS1 0x20 // Interval Timebase Selection Bit 1. + #define ITS0 0x10 // Interval Timebase Selection Bit 1. + #define STI 0x08 // Single Time Interval Bit. + #define TII 0x04 // TIC Interrupt Bit. + #define TIEN 0x02 // Time Interval Enable Bit. + #define TCEN 0x01 // Time Clock Enable Bit. + +SFR(HTHSEC, 0xA2); // Hundredths Seconds Time Register. +SFR(SEC, 0xA3); // Seconds Time Register. +SFR(MIN, 0xA4); // Minutes Time Register. +SFR(HOUR, 0xA5); // Hours Time Register. +SFR(INTVAL, 0xA6); // User Time Interval Select Register. + +SFR(IE, 0xA8); // Interrupt Enable. + SBIT(EA, 0xA8, 7); // Global Interrupt Enable. + SBIT(EADC, 0xA8, 6); // ADC Interrupt Enable. + SBIT(ET2, 0xA8, 5); // Timer 2 Interrupt Enable. + SBIT(ES, 0xA8, 4); // Serial Interrupt Enable. + SBIT(ET1, 0xA8, 3); // Timer 1 Interrupt Enable. + SBIT(EX1, 0xA8, 2); // External 1 Interrupt Enable. + SBIT(ET0, 0xA8, 1); // Timer 0 Interrupt Enable. + SBIT(EX0, 0xA8, 0); // External 0 Interrupt Enable. + +SFR(IEIP2, 0xA9); // Secondary Interrupt Enable Register + #define PTI 0x40 // Priority for time interval interrupt. + #define PPSM 0x20 // Priority for power supply monitor interrupt. + #define PSI2 0x10 // Priority for SPI/I2C interrupt. Same name as bit in IP??? + #define ETI 0x04 // Enable time interval counter interrupts. + #define EPSMI 0x02 // Enable power supply monitor interrupts. + #define ESI 0x01 // Enable SPI or I2C serial port interrupts. + +SFR(PWMCON, 0xAE); //PWM control. + #define SNGL 0x80 // Turns off PMW output at P2.6 or P3.4. + #define MD2 0x40 // PWM Mode Bit 2. + #define MD1 0x20 // PWM Mode Bit 2. + #define MD0 0x10 // PWM Mode Bit 2. + #define CDIV1 0x08 // PWM Clock Divider bit 1. + #define CDIV0 0x04 // PWM Clock Divider bit 1. + #define CSEL1 0x02 // PWM Clock Select bit 1. (Typo in datasheet???) + #define CSEL0 0x01 // PWM Clock Select bit 0. + +SFR(PWM0L, 0xB1); // PWM 0 duty cycle low. +SFR(PWM0H, 0xB2); // PWM 0 duty cycle high. +SFR(PWM1L, 0xB3); // PWM 1 duty cycle low. +SFR(PWM1H, 0xB4); // PWM 1 duty cycle high. + +SFR(IP, 0xB8); // Interrupt Priority Reg. + SBIT(PSI, 0xB8, 7); // Priority for SPI/I2C interrupt. + SBIT(PADC, 0xB8, 6); // ADC interrupt priority bit. + SBIT(PT2, 0xB8, 5); // Timer 2 interrupt priority bit. + SBIT(PS, 0xB8, 4); // Serial Port interrupt priority bit. + SBIT(PT1, 0xB8, 3); // Timer 1 interrupt priority bit. + SBIT(PX1, 0xB8, 2); // External interrupt 1 priority bit. + SBIT(PT0, 0xB8, 1); // Timer 0 interrupt priority bit. + SBIT(PX0, 0xB8, 0); // External interrupt 0 priority bit. + +SFR(ECON, 0xB9); // Flash/EE Memory Control SFR. +SFR(EDATA1, 0xBC); // EE page data byte 1. +SFR(EDATA2, 0xBD); // EE page data byte 2. +SFR(EDATA3, 0xBE); // EE page data byte 3. +SFR(EDATA4, 0xBF); // EE page data byte 4. +SFR(EADRL, 0xC6); // EE address low. +SFR(EADRH, 0xC7); // EE address high. + +SFR(WDCON, 0xC0); //Watchdog Timer Control Register. + SBIT(PRE3, 0xc0, 7); // Timeout period bit 4. + SBIT(PRE2, 0xc0, 6); // Timeout period bit 3. + SBIT(PRE1, 0xc0, 5); // Timeout period bit 2. + SBIT(PRE0, 0xc0, 4); // Timeout period bit 1. + SBIT(WDIR, 0xc0, 3); // Watchdog Interrupt Response Enable Bit. + SBIT(WDS, 0xc0, 2); // Watchdog Status Bit. + SBIT(WDE, 0xc0, 1); // Watchdog Enable Bit. + SBIT(WDWR, 0xc0, 0); // Watchdog Write Enable Bit. + +SFR(CHIPID, 0xC2); // System Self-Identification? WARNING: No description in the datasheet. + +SFR(T2CON, 0xC8); // Timer / Counter 2 Control. + SBIT(TF2, 0xC8, 7); // Timer 2 overflow flag. + SBIT(EXF2, 0xC8, 6); // Timer 2 external flag. + SBIT(RCLK, 0xC8, 5); // Receive clock flag. + SBIT(TCLK, 0xC8, 4); // Transmit clock flag. + SBIT(EXEN2, 0xC8, 3); // Timer 2 external enable flag. + SBIT(TR2, 0xC8, 2); // Start/stop control for timer 2. + SBIT(CNT2, 0xC8, 1); // Timer or coutner select. + SBIT(CAP2, 0xC8, 0); // Capture/reload flag. + +SFR(RCAP2L, 0xCA); // Timer 2 Capture LSB. +SFR(RCAP2H, 0xCB); // Timer 2 Capture MSB. +SFR(TL2, 0xCC); // Timer 2 LSB. +SFR(TH2, 0xCD); // Timer 2 MSB. + +SFR(PSW, 0xD0); // Program Status Word. + SBIT(CY, 0xD0, 7); // Carry Flag. + SBIT(AC, 0xD0, 6); // Auxiliary Carry Flag. + SBIT(F0, 0xD0, 5); // User-Defined Flag. + SBIT(RS1, 0xD0, 4); // Register Bank Select 1. + SBIT(RS0, 0xD0, 3); // Register Bank Select 0. + SBIT(OV, 0xD0, 2); // Overflow Flag. + SBIT(F1, 0xD0, 1); // User-Defined Flag. + SBIT(P, 0xD0, 0); // Parity Flag. + +SFR(DMAL, 0xD2); // DMA mode address pointer low. +SFR(DMAH, 0xD3); // DMA mode address pointer high. +SFR(DMAP, 0xD4); // DMA mode address pointer page. (?) +SFR(PLLCON, 0xD7); // PLL Control Register. + +SFR(PSMCON, 0xDF); // Power supply monitor. + #define CMPD 0x40 // DVDD Comparator Bit. + #define PSMI 0x20 // Power Supply Monitor Interrupt Bit. + #define TPD1 0x10 // DVDD Trip Point Selection Bit 2. + #define TPD0 0x08 // DVDD Trip Point Selection Bit 1. + #define PSMEN 0x01 // Power Supply Monitor Enable Bit. + +SFR(ACC, 0xE0); // Accumulator + SBIT(ACC_0, 0xE0, 0); // Accumulator bit 0. + SBIT(ACC_1, 0xE0, 1); // Accumulator bit 1. + SBIT(ACC_2, 0xE0, 2); // Accumulator bit 2. + SBIT(ACC_3, 0xE0, 3); // Accumulator bit 3. + SBIT(ACC_4, 0xE0, 4); // Accumulator bit 4. + SBIT(ACC_5, 0xE0, 5); // Accumulator bit 5. + SBIT(ACC_6, 0xE0, 6); // Accumulator bit 6. + SBIT(ACC_7, 0xE0, 7); // Accumulator bit 7. + +SFR(I2CCON, 0xE8); // I2C Control Register + // Master mode + SBIT(MDO, 0xE8, 7); // I2C Software Master Data Output Bit. + SBIT(MDE, 0xE8, 6); // I2C Software Master Data Output Enable Bit. + SBIT(MCO, 0xE8, 5); // I2C Software Master Clock Output Bit. + SBIT(MDI, 0xE8, 4); // I2C Software Master Data Input Bit. + // Slave mode + SBIT(I2CSI, 0xE8, 7); // I2C Stop Interrupt Enable Bit. + SBIT(I2CGC, 0xE8, 6); // I2C General Call Status Bit. + SBIT(I2CID1, 0xE8, 5); // I2C Interrupt Decode Bit 2. + SBIT(I2CID0, 0xE8, 4); // I2C Interrupt Decode Bit 1. + SBIT(I2CM, 0xE8, 3); // I2C Master/Slave Mode Bit. + SBIT(I2CRS, 0xE8, 2); // I2C Reset Bit. + SBIT(I2CTX, 0xE8, 1); // I2C Direction Transfer Bit. + SBIT(I2CI, 0xE8, 0); // I2C Interrupt Bit. + +SFR(B, 0xF0); // B Register + SBIT(B_0, 0xF0, 0); // Register B bit 0. + SBIT(B_1, 0xF0, 1); // Register B bit 1. + SBIT(B_2, 0xF0, 2); // Register B bit 2. + SBIT(B_3, 0xF0, 3); // Register B bit 3. + SBIT(B_4, 0xF0, 4); // Register B bit 4. + SBIT(B_5, 0xF0, 5); // Register B bit 5. + SBIT(B_6, 0xF0, 6); // Register B bit 6. + SBIT(B_7, 0xF0, 7); // Register B bit 7. + +SFR(ADCCON1, 0xEF); //ADC Control SFR 1 + //WARNING: bit 7 is named MD1 in the datasheet, but that name is already used. + #define MD 0x80 // The mode bit selects the active operating mode of the ADC. + #define EXT_REF 0x40 // Set by the user to select an external reference. + #define CK1 0x20 // The ADC clock divide bit 1. + #define CK0 0x10 // The ADC clock divide bit 0. + #define AQ1 0x08 // ADC acquisition select bit 1. + #define AQ0 0x04 // ADC acquisition select bit 0. + #define T2C 0x02 // The Timer 2 conversion bit. + #define EXC 0x01 // The external trigger enable bit. + +SFR(ADCCON2, 0xD8); // ADC Control SFR 2. + SBIT(ADCI, 0xD8, 7); // ADC Interrupt Bit. + SBIT(DMA, 0xD8, 6); // DMA Mode Enable Bit. + SBIT(CCONV, 0xD8, 5); // Continuous Conversion Bit. + SBIT(SCONV, 0xD8, 4); // Single Conversion Bit. + SBIT(CS3, 0xD8, 3); // Channel Selection Bit 4. + SBIT(CS2, 0xD8, 2); // Channel Selection Bit 3. + SBIT(CS1, 0xD8, 1); // Channel Selection Bit 2. + SBIT(CS0, 0xD8, 0); // Channel Selection Bit 1. + +SFR(ADCCON3, 0xF5); //ADC Control SFR 3 + #define BUSY 0x80 // ADC Busy Status Bit. + #define AVGS1 0x20 // Number of Average Selection Bit 2. + #define AVGS0 0x10 // Number of Average Selection Bit 1. + #define TYPICAL 0x02 // Calibration Type Select Bit. + #define SCAL 0x01 // Start Calibration Cycle Bit. + +SFR(ADCDATAL, 0xD9); // ADC Result byte low. +SFR(ADCDATAH, 0xDA); // ADC Result byte high. WARNING: bits 4 to 7 are the ADC channel! +SFR(ADCOFSL, 0xF1); // Offset calibration coefficient byte (low). +SFR(ADCOFSH, 0xF2); // Offset calibration coefficient byte (high). +SFR(ADCGAINL, 0xF3); // Gain calibration coefficient byte (low). +SFR(ADCGAINH, 0xF4); // Gain calibration coefficient byte (high). + +SFR(SPIDAT, 0xF7); // SPI Data Register. + +SFR(SPICON, 0xF8); // SPI Control Register. + SBIT(ISPI, 0xF8, 7); // SPI Interrupt Bit. + SBIT(WCOL, 0xF8, 6); // Write Collision Error Bit. + SBIT(SPE, 0xF8, 5); // SPI Interface Enable Bit. + SBIT(SPIM, 0xF8, 4); // SPI Master/Slave Mode Select Bit. + SBIT(CPOL, 0xF8, 3); // Clock Polarity Select Bit. + SBIT(CPHA, 0xF8, 2); // Clock Phase Select Bit. + SBIT(SPR1, 0xF8, 1); // SPI Bit Rate Select Bit 2. + SBIT(SPR0, 0xF8, 0); // SPI Bit Rate Select Bit 1. + +SFR(DAC0L, 0xF9); // DAC0 Data Low Byte. +SFR(DAC0H, 0xFA); // DAC0 Data High Byte. +SFR(DAC1L, 0xFB); // DAC1 Data Low Byte. +SFR(DAC1H, 0xFC); // DAC1 Data High Byte. +SFR(DACCON, 0xFD); // DAC Control Register. + #define MODE 0x80 // 8/12 bit selection. + #define RNG1 0x40 // DAC1 Range Select Bit. + #define RNG0 0x20 // DAC0 Range Select Bit. + #define CLR1 0x10 // DAC1 Clear Bit. + #define CLR0 0x08 // DAC0 Clear Bit. + #define SYNC 0x04 // DAC0/1 Update Synchronization Bit. + #define PD1 0x02 // DAC1 Power-Down Bit. + #define PD0 0x01 // DAC0 Power-Down Bit. + +#endif //REG_ADUC84X_H diff --git a/device/include/mcs51/C8051F000.h b/device/include/mcs51/C8051F000.h new file mode 100644 index 0000000..4d1ade6 --- /dev/null +++ b/device/include/mcs51/C8051F000.h @@ -0,0 +1,304 @@ +/*--------------------------------------------------------------------------- + Register Declarations for the Cygnal/SiLabs C8051F000-F017 Processor Range + + Copyright (C) 2003 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +---------------------------------------------------------------------------*/ + +#ifndef C8051F000_H +#define C8051F000_H + + +/* BYTE Registers */ +__sfr __at (0x80) P0 ; /* PORT 0 */ +__sfr __at (0x81) SP ; /* STACK POINTER */ +__sfr __at (0x82) DPL ; /* DATA POINTER - LOW BYTE */ +__sfr __at (0x83) DPH ; /* DATA POINTER - HIGH BYTE */ +__sfr __at (0x87) PCON ; /* POWER CONTROL */ +__sfr __at (0x88) TCON ; /* TIMER CONTROL */ +__sfr __at (0x89) TMOD ; /* TIMER MODE */ +__sfr __at (0x8A) TL0 ; /* TIMER 0 - LOW BYTE */ +__sfr __at (0x8B) TL1 ; /* TIMER 1 - LOW BYTE */ +__sfr __at (0x8C) TH0 ; /* TIMER 0 - HIGH BYTE */ +__sfr __at (0x8D) TH1 ; /* TIMER 1 - HIGH BYTE */ +__sfr __at (0x8E) CKCON ; /* CLOCK CONTROL */ +__sfr __at (0x8F) PSCTL ; /* PROGRAM STORE R/W CONTROL */ +__sfr __at (0x90) P1 ; /* PORT 1 */ +__sfr __at (0x91) TMR3CN ; /* TIMER 3 CONTROL */ +__sfr __at (0x92) TMR3RLL ; /* TIMER 3 RELOAD REGISTER - LOW BYTE */ +__sfr __at (0x93) TMR3RLH ; /* TIMER 3 RELOAD REGISTER - HIGH BYTE */ +__sfr __at (0x94) TMR3L ; /* TIMER 3 - LOW BYTE */ +__sfr __at (0x95) TMR3H ; /* TIMER 3 - HIGH BYTE */ +__sfr __at (0x98) SCON ; /* SERIAL PORT CONTROL */ +__sfr __at (0x99) SBUF ; /* SERIAL PORT BUFFER */ +__sfr __at (0x9A) SPI0CFG ; /* SERIAL PERIPHERAL INTERFACE 0 CONFIGURATION */ +__sfr __at (0x9B) SPI0DAT ; /* SERIAL PERIPHERAL INTERFACE 0 DATA */ +__sfr __at (0x9D) SPI0CKR ; /* SERIAL PERIPHERAL INTERFACE 0 CLOCK RATE CONTROL */ +__sfr __at (0x9E) CPT0CN ; /* COMPARATOR 0 CONTROL */ +__sfr __at (0x9F) CPT1CN ; /* COMPARATOR 1 CONTROL */ +__sfr __at (0xA0) P2 ; /* PORT 2 */ +__sfr __at (0xA4) PRT0CF ; /* PORT 0 CONFIGURATION */ +__sfr __at (0xA5) PRT1CF ; /* PORT 1 CONFIGURATION */ +__sfr __at (0xA6) PRT2CF ; /* PORT 2 CONFIGURATION */ +__sfr __at (0xA7) PRT3CF ; /* PORT 3 CONFIGURATION */ +__sfr __at (0xA8) IE ; /* INTERRUPT ENABLE */ +__sfr __at (0xAD) PRT1IF ; /* PORT 1 EXTERNAL INTERRUPT FLAGS */ +__sfr __at (0xAF) EMI0CN ; /* EXTERNAL MEMORY INTERFACE CONTROL */ +__sfr __at (0xAF) _XPAGE ; /* XDATA/PDATA PAGE */ +__sfr __at (0xB0) P3 ; /* PORT 3 */ +__sfr __at (0xB1) OSCXCN ; /* EXTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB2) OSCICN ; /* INTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB6) FLSCL ; /* FLASH MEMORY TIMING PRESCALER */ +__sfr __at (0xB7) FLACL ; /* FLASH ACESS LIMIT */ +__sfr __at (0xB8) IP ; /* INTERRUPT PRIORITY */ +__sfr __at (0xBA) AMX0CF ; /* ADC 0 MUX CONFIGURATION */ +__sfr __at (0xBB) AMX0SL ; /* ADC 0 MUX CHANNEL SELECTION */ +__sfr __at (0xBC) ADC0CF ; /* ADC 0 CONFIGURATION */ +__sfr __at (0xBE) ADC0L ; /* ADC 0 DATA - LOW BYTE */ +__sfr __at (0xBF) ADC0H ; /* ADC 0 DATA - HIGH BYTE */ +__sfr __at (0xC0) SMB0CN ; /* SMBUS 0 CONTROL */ +__sfr __at (0xC1) SMB0STA ; /* SMBUS 0 STATUS */ +__sfr __at (0xC2) SMB0DAT ; /* SMBUS 0 DATA */ +__sfr __at (0xC3) SMB0ADR ; /* SMBUS 0 SLAVE ADDRESS */ +__sfr __at (0xC4) ADC0GTL ; /* ADC 0 GREATER-THAN REGISTER - LOW BYTE */ +__sfr __at (0xC5) ADC0GTH ; /* ADC 0 GREATER-THAN REGISTER - HIGH BYTE */ +__sfr __at (0xC6) ADC0LTL ; /* ADC 0 LESS-THAN REGISTER - LOW BYTE */ +__sfr __at (0xC7) ADC0LTH ; /* ADC 0 LESS-THAN REGISTER - HIGH BYTE */ +__sfr __at (0xC8) T2CON ; /* TIMER 2 CONTROL */ +__sfr __at (0xCA) RCAP2L ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCB) RCAP2H ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCC) TL2 ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCD) TH2 ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xCF) SMB0CR ; /* SMBUS 0 CLOCK RATE */ +__sfr __at (0xD0) PSW ; /* PROGRAM STATUS WORD */ +__sfr __at (0xD1) REF0CN ; /* VOLTAGE REFERENCE 0 CONTROL */ +__sfr __at (0xD2) DAC0L ; /* DAC 0 REGISTER - LOW BYTE */ +__sfr __at (0xD3) DAC0H ; /* DAC 0 REGISTER - HIGH BYTE */ +__sfr __at (0xD4) DAC0CN ; /* DAC 0 CONTROL */ +__sfr __at (0xD5) DAC1L ; /* DAC 1 REGISTER - LOW BYTE */ +__sfr __at (0xD6) DAC1H ; /* DAC 1 REGISTER - HIGH BYTE */ +__sfr __at (0xD7) DAC1CN ; /* DAC 1 CONTROL */ +__sfr __at (0xD8) PCA0CN ; /* PCA 0 COUNTER CONTROL */ +__sfr __at (0xD9) PCA0MD ; /* PCA 0 COUNTER MODE */ +__sfr __at (0xDA) PCA0CPM0 ; /* CONTROL REGISTER FOR PCA 0 MODULE 0 */ +__sfr __at (0xDB) PCA0CPM1 ; /* CONTROL REGISTER FOR PCA 0 MODULE 1 */ +__sfr __at (0xDC) PCA0CPM2 ; /* CONTROL REGISTER FOR PCA 0 MODULE 2 */ +__sfr __at (0xDD) PCA0CPM3 ; /* CONTROL REGISTER FOR PCA 0 MODULE 3 */ +__sfr __at (0xDE) PCA0CPM4 ; /* CONTROL REGISTER FOR PCA 0 MODULE 4 */ +__sfr __at (0xE0) ACC ; /* ACCUMULATOR */ +__sfr __at (0xE1) XBR0 ; /* DIGITAL CROSSBAR CONFIGURATION REGISTER 0 */ +__sfr __at (0xE2) XBR1 ; /* DIGITAL CROSSBAR CONFIGURATION REGISTER 1 */ +__sfr __at (0xE3) XBR2 ; /* DIGITAL CROSSBAR CONFIGURATION REGISTER 2 */ +__sfr __at (0xE6) EIE1 ; /* EXTERNAL INTERRUPT ENABLE 1 */ +__sfr __at (0xE7) EIE2 ; /* EXTERNAL INTERRUPT ENABLE 2 */ +__sfr __at (0xE8) ADC0CN ; /* ADC 0 CONTROL */ +__sfr __at (0xE9) PCA0L ; /* PCA 0 TIMER - LOW BYTE */ +__sfr __at (0xEA) PCA0CPL0 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 0 - LOW BYTE */ +__sfr __at (0xEB) PCA0CPL1 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 1 - LOW BYTE */ +__sfr __at (0xEC) PCA0CPL2 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 2 - LOW BYTE */ +__sfr __at (0xED) PCA0CPL3 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 3 - LOW BYTE */ +__sfr __at (0xEE) PCA0CPL4 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 4 - LOW BYTE */ +__sfr __at (0xEF) RSTSRC ; /* RESET SOURCE */ +__sfr __at (0xF0) B ; /* B REGISTER */ +__sfr __at (0xF6) EIP1 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +__sfr __at (0xF7) EIP2 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 2 */ +__sfr __at (0xF8) SPI0CN ; /* SERIAL PERIPHERAL INTERFACE 0 CONTROL */ +__sfr __at (0xF9) PCA0H ; /* PCA 0 TIMER - HIGH BYTE */ +__sfr __at (0xFA) PCA0CPH0 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 0 - HIGH BYTE */ +__sfr __at (0xFB) PCA0CPH1 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 1 - HIGH BYTE */ +__sfr __at (0xFC) PCA0CPH2 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 2 - HIGH BYTE */ +__sfr __at (0xFD) PCA0CPH3 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 3 - HIGH BYTE */ +__sfr __at (0xFE) PCA0CPH4 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 4 - HIGH BYTE */ +__sfr __at (0xFF) WDTCN ; /* WATCHDOG TIMER CONTROL */ + + +/* WORD/DWORD Registers */ + +__sfr16 __at (0x8C8A) TMR0 ; /* TIMER 0 COUNTER */ +__sfr16 __at (0x8D8B) TMR1 ; /* TIMER 1 COUNTER */ +__sfr16 __at (0xCDCC) TMR2 ; /* TIMER 2 COUNTER */ +__sfr16 __at (0xCBCA) RCAP2 ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0x9594) TMR3 ; /* TIMER 3 COUNTER */ +__sfr16 __at (0x9392) TMR3RL ; /* TIMER 3 CAPTURE REGISTER WORD */ +__sfr16 __at (0xBFBE) ADC0 ; /* ADC 0 DATA WORD */ +__sfr16 __at (0xC5C4) ADC0GT ; /* ADC 0 GREATER-THAN REGISTER WORD */ +__sfr16 __at (0xC7C6) ADC0LT ; /* ADC 0 LESS-THAN REGISTER WORD */ +__sfr16 __at (0xD3D2) DAC0 ; /* DAC 0 REGISTER WORD */ +__sfr16 __at (0xD6D5) DAC1 ; /* DAC 1 REGISTER WORD */ +__sfr16 __at (0xF9E9) PCA0 ; /* PCA COUNTER */ +__sfr16 __at (0xFAEA) PCA0CP0 ; /* PCA CAPTURE 0 WORD */ +__sfr16 __at (0xFBEB) PCA0CP1 ; /* PCA CAPTURE 1 WORD */ +__sfr16 __at (0xFCEC) PCA0CP2 ; /* PCA CAPTURE 2 WORD */ +__sfr16 __at (0xFDED) PCA0CP3 ; /* PCA CAPTURE 3 WORD */ +__sfr16 __at (0xFEEE) PCA0CP4 ; /* PCA CAPTURE 4 WORD */ + + +/* BIT Registers */ + +/* P0 0x80 */ +__sbit __at (0x87) P0_7 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x80) P0_0 ; + +/* TCON 0x88 */ +__sbit __at (0x8F) TF1 ; /* TIMER 1 OVERFLOW FLAG */ +__sbit __at (0x8E) TR1 ; /* TIMER 1 ON/OFF CONTROL */ +__sbit __at (0x8D) TF0 ; /* TIMER 0 OVERFLOW FLAG */ +__sbit __at (0x8C) TR0 ; /* TIMER 0 ON/OFF CONTROL */ +__sbit __at (0x8B) IE1 ; /* EXT. INTERRUPT 1 EDGE FLAG */ +__sbit __at (0x8A) IT1 ; /* EXT. INTERRUPT 1 TYPE */ +__sbit __at (0x89) IE0 ; /* EXT. INTERRUPT 0 EDGE FLAG */ +__sbit __at (0x88) IT0 ; /* EXT. INTERRUPT 0 TYPE */ + +/* P1 0x90 */ +__sbit __at (0x97) P1_7 ; +__sbit __at (0x96) P1_6 ; +__sbit __at (0x95) P1_5 ; +__sbit __at (0x94) P1_4 ; +__sbit __at (0x93) P1_3 ; +__sbit __at (0x92) P1_2 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x90) P1_0 ; + +/* SCON 0x98 */ +__sbit __at (0x9F) SM0 ; /* SERIAL MODE CONTROL BIT 0 */ +__sbit __at (0x9E) SM1 ; /* SERIAL MODE CONTROL BIT 1 */ +__sbit __at (0x9D) SM2 ; /* MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9C) REN ; /* RECEIVE ENABLE */ +__sbit __at (0x9B) TB8 ; /* TRANSMIT BIT 8 */ +__sbit __at (0x9A) RB8 ; /* RECEIVE BIT 8 */ +__sbit __at (0x99) TI ; /* TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x98) RI ; /* RECEIVE INTERRUPT FLAG */ + +/* P2 0xA0 */ +__sbit __at (0xA7) P2_7 ; +__sbit __at (0xA6) P2_6 ; +__sbit __at (0xA5) P2_5 ; +__sbit __at (0xA4) P2_4 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA0) P2_0 ; + +/* IE 0xA8 */ +__sbit __at (0xAF) EA ; /* GLOBAL INTERRUPT ENABLE */ +__sbit __at (0xAD) ET2 ; /* TIMER 2 INTERRUPT ENABLE */ +__sbit __at (0xAC) ES ; /* SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAB) ET1 ; /* TIMER 1 INTERRUPT ENABLE */ +__sbit __at (0xAA) EX1 ; /* EXTERNAL INTERRUPT 1 ENABLE */ +__sbit __at (0xA9) ET0 ; /* TIMER 0 INTERRUPT ENABLE */ +__sbit __at (0xA8) EX0 ; /* EXTERNAL INTERRUPT 0 ENABLE */ + +/* P3 0xB0 */ +__sbit __at (0xB7) P3_7 ; +__sbit __at (0xB6) P3_6 ; +__sbit __at (0xB5) P3_5 ; +__sbit __at (0xB4) P3_4 ; +__sbit __at (0xB3) P3_3 ; +__sbit __at (0xB2) P3_2 ; +__sbit __at (0xB1) P3_1 ; +__sbit __at (0xB0) P3_0 ; + +/* IP 0xB8 */ +__sbit __at (0xBD) PT2 ; /* TIMER 2 PRIORITY */ +__sbit __at (0xBC) PS ; /* SERIAL PORT PRIORITY */ +__sbit __at (0xBB) PT1 ; /* TIMER 1 PRIORITY */ +__sbit __at (0xBA) PX1 ; /* EXTERNAL INTERRUPT 1 PRIORITY */ +__sbit __at (0xB9) PT0 ; /* TIMER 0 PRIORITY */ +__sbit __at (0xB8) PX0 ; /* EXTERNAL INTERRUPT 0 PRIORITY */ + +/* SMB0CN 0xC0 */ +__sbit __at (0xC7) BUSY ; /* SMBUS 0 BUSY */ +__sbit __at (0xC6) ENSMB ; /* SMBUS 0 ENABLE */ +__sbit __at (0xC5) STA ; /* SMBUS 0 START FLAG */ +__sbit __at (0xC4) STO ; /* SMBUS 0 STOP FLAG */ +__sbit __at (0xC3) SI ; /* SMBUS 0 INTERRUPT PENDING FLAG */ +__sbit __at (0xC2) AA ; /* SMBUS 0 ASSERT/ACKNOWLEDGE FLAG */ +__sbit __at (0xC1) SMBFTE ; /* SMBUS 0 FREE TIMER ENABLE */ +__sbit __at (0xC0) SMBTOE ; /* SMBUS 0 TIMEOUT ENABLE */ + +/* T2CON 0xC8 */ +__sbit __at (0xCF) TF2 ; /* TIMER 2 OVERFLOW FLAG */ +__sbit __at (0xCE) EXF2 ; /* EXTERNAL FLAG */ +__sbit __at (0xCD) RCLK ; /* RECEIVE CLOCK FLAG */ +__sbit __at (0xCC) TCLK ; /* TRANSMIT CLOCK FLAG */ +__sbit __at (0xCB) EXEN2 ; /* TIMER 2 EXTERNAL ENABLE FLAG */ +__sbit __at (0xCA) TR2 ; /* TIMER 2 ON/OFF CONTROL */ +__sbit __at (0xC9) CT2 ; /* TIMER OR COUNTER SELECT */ +__sbit __at (0xC8) CPRL2 ; /* CAPTURE OR RELOAD SELECT */ + +/* PSW 0xD0 */ +__sbit __at (0xD7) CY ; /* CARRY FLAG */ +__sbit __at (0xD6) AC ; /* AUXILIARY CARRY FLAG */ +__sbit __at (0xD5) F0 ; /* USER FLAG 0 */ +__sbit __at (0xD4) RS1 ; /* REGISTER BANK SELECT 1 */ +__sbit __at (0xD3) RS0 ; /* REGISTER BANK SELECT 0 */ +__sbit __at (0xD2) OV ; /* OVERFLOW FLAG */ +__sbit __at (0xD1) F1 ; /* USER FLAG 1 */ +__sbit __at (0xD0) P ; /* ACCUMULATOR PARITY FLAG */ + +/* PCA0CN 0xD8H */ +__sbit __at (0xDF) CF ; /* PCA 0 COUNTER OVERFLOW FLAG */ +__sbit __at (0xDE) CR ; /* PCA 0 COUNTER RUN CONTROL BIT */ +__sbit __at (0xDC) CCF4 ; /* PCA 0 MODULE 4 INTERRUPT FLAG */ +__sbit __at (0xDB) CCF3 ; /* PCA 0 MODULE 3 INTERRUPT FLAG */ +__sbit __at (0xDA) CCF2 ; /* PCA 0 MODULE 2 INTERRUPT FLAG */ +__sbit __at (0xD9) CCF1 ; /* PCA 0 MODULE 1 INTERRUPT FLAG */ +__sbit __at (0xD8) CCF0 ; /* PCA 0 MODULE 0 INTERRUPT FLAG */ + +/* ADC0CN 0xE8H */ +__sbit __at (0xEF) AD0EN ; /* ADC 0 ENABLE */ +__sbit __at (0xEE) AD0TM ; /* ADC 0 TRACK MODE */ +__sbit __at (0xED) AD0INT ; /* ADC 0 CONVERISION COMPLETE INTERRUPT FLAG */ +__sbit __at (0xEC) AD0BUSY ; /* ADC 0 BUSY FLAG */ +__sbit __at (0xEB) ADSTM1 ; /* ADC 0 START OF CONVERSION MODE BIT 1 */ +__sbit __at (0xEA) ADSTM0 ; /* ADC 0 START OF CONVERSION MODE BIT 0 */ +__sbit __at (0xE9) AD0WINT ; /* ADC 0 WINDOW COMPARE INTERRUPT FLAG */ +__sbit __at (0xE8) ADLJST ; /* ADC 0 RIGHT JUSTIFY DATA BIT */ + +/* SPI0CN 0xF8H */ +__sbit __at (0xFF) SPIF ; /* SPI 0 INTERRUPT FLAG */ +__sbit __at (0xFE) WCOL ; /* SPI 0 WRITE COLLISION FLAG */ +__sbit __at (0xFD) MODF ; /* SPI 0 MODE FAULT FLAG */ +__sbit __at (0xFC) RXOVRN ; /* SPI 0 RX OVERRUN FLAG */ +__sbit __at (0xFB) TXBSY ; /* SPI 0 TX BUSY FLAG */ +__sbit __at (0xFA) SLVSEL ; /* SPI 0 SLAVE SELECT */ +__sbit __at (0xF9) MSTEN ; /* SPI 0 MASTER ENABLE */ +__sbit __at (0xF8) SPIEN ; /* SPI 0 SPI ENABLE */ + + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define TF3 0x80 /* TMR3CN */ +#define CPFIF 0x10 /* CPTnCN */ +#define CPRIF 0x20 /* CPTnCN */ +#define CPOUT 0x40 /* CPTnCN */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ + +#endif diff --git a/device/include/mcs51/C8051F018.h b/device/include/mcs51/C8051F018.h new file mode 100644 index 0000000..87ae4d6 --- /dev/null +++ b/device/include/mcs51/C8051F018.h @@ -0,0 +1,296 @@ +/*--------------------------------------------------------------------------- + Register Declarations for the Cygnal/SiLabs C8051F018-F019 Processor Range + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +---------------------------------------------------------------------------*/ + +#ifndef C8051F018_H +#define C8051F018_H + + +/* BYTE Registers */ +__sfr __at (0x80) P0 ; /* PORT 0 */ +__sfr __at (0x81) SP ; /* STACK POINTER */ +__sfr __at (0x82) DPL ; /* DATA POINTER - LOW BYTE */ +__sfr __at (0x83) DPH ; /* DATA POINTER - HIGH BYTE */ +__sfr __at (0x87) PCON ; /* POWER CONTROL */ +__sfr __at (0x88) TCON ; /* TIMER CONTROL */ +__sfr __at (0x89) TMOD ; /* TIMER MODE */ +__sfr __at (0x8A) TL0 ; /* TIMER 0 - LOW BYTE */ +__sfr __at (0x8B) TL1 ; /* TIMER 1 - LOW BYTE */ +__sfr __at (0x8C) TH0 ; /* TIMER 0 - HIGH BYTE */ +__sfr __at (0x8D) TH1 ; /* TIMER 1 - HIGH BYTE */ +__sfr __at (0x8E) CKCON ; /* CLOCK CONTROL */ +__sfr __at (0x8F) PSCTL ; /* PROGRAM STORE R/W CONTROL */ +__sfr __at (0x90) P1 ; /* PORT 1 */ +__sfr __at (0x91) TMR3CN ; /* TIMER 3 CONTROL */ +__sfr __at (0x92) TMR3RLL ; /* TIMER 3 RELOAD REGISTER - LOW BYTE */ +__sfr __at (0x93) TMR3RLH ; /* TIMER 3 RELOAD REGISTER - HIGH BYTE */ +__sfr __at (0x94) TMR3L ; /* TIMER 3 - LOW BYTE */ +__sfr __at (0x95) TMR3H ; /* TIMER 3 - HIGH BYTE */ +__sfr __at (0x98) SCON ; /* SERIAL PORT CONTROL */ +__sfr __at (0x99) SBUF ; /* SERIAL PORT BUFFER */ +__sfr __at (0x9A) SPI0CFG ; /* SERIAL PERIPHERAL INTERFACE 0 CONFIGURATION */ +__sfr __at (0x9B) SPI0DAT ; /* SERIAL PERIPHERAL INTERFACE 0 DATA */ +__sfr __at (0x9D) SPI0CKR ; /* SERIAL PERIPHERAL INTERFACE 0 CLOCK RATE CONTROL */ +__sfr __at (0x9E) CPT0CN ; /* COMPARATOR 0 CONTROL */ +__sfr __at (0x9F) CPT1CN ; /* COMPARATOR 1 CONTROL */ +__sfr __at (0xA0) P2 ; /* PORT 2 */ +__sfr __at (0xA4) PRT0CF ; /* PORT 0 CONFIGURATION */ +__sfr __at (0xA5) PRT1CF ; /* PORT 1 CONFIGURATION */ +__sfr __at (0xA6) PRT2CF ; /* PORT 2 CONFIGURATION */ +__sfr __at (0xA7) PRT3CF ; /* PORT 3 CONFIGURATION */ +__sfr __at (0xA8) IE ; /* INTERRUPT ENABLE */ +__sfr __at (0xAD) PRT1IF ; /* PORT 1 EXTERNAL INTERRUPT FLAGS */ +__sfr __at (0xAF) EMI0CN ; /* EXTERNAL MEMORY INTERFACE CONTROL */ +__sfr __at (0xAF) _XPAGE ; /* XDATA/PDATA PAGE */ +__sfr __at (0xB0) P3 ; /* PORT 3 */ +__sfr __at (0xB1) OSCXCN ; /* EXTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB2) OSCICN ; /* INTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB6) FLSCL ; /* FLASH MEMORY TIMING PRESCALER */ +__sfr __at (0xB7) FLACL ; /* FLASH ACESS LIMIT */ +__sfr __at (0xB8) IP ; /* INTERRUPT PRIORITY */ +__sfr __at (0xBA) AMX0CF ; /* ADC 0 MUX CONFIGURATION */ +__sfr __at (0xBB) AMX0SL ; /* ADC 0 MUX CHANNEL SELECTION */ +__sfr __at (0xBC) ADC0CF ; /* ADC 0 CONFIGURATION */ +__sfr __at (0xBE) ADC0L ; /* ADC 0 DATA - LOW BYTE */ +__sfr __at (0xBF) ADC0H ; /* ADC 0 DATA - HIGH BYTE */ +__sfr __at (0xC0) SMB0CN ; /* SMBUS 0 CONTROL */ +__sfr __at (0xC1) SMB0STA ; /* SMBUS 0 STATUS */ +__sfr __at (0xC2) SMB0DAT ; /* SMBUS 0 DATA */ +__sfr __at (0xC3) SMB0ADR ; /* SMBUS 0 SLAVE ADDRESS */ +__sfr __at (0xC4) ADC0GTL ; /* ADC 0 GREATER-THAN REGISTER - LOW BYTE */ +__sfr __at (0xC5) ADC0GTH ; /* ADC 0 GREATER-THAN REGISTER - HIGH BYTE */ +__sfr __at (0xC6) ADC0LTL ; /* ADC 0 LESS-THAN REGISTER - LOW BYTE */ +__sfr __at (0xC7) ADC0LTH ; /* ADC 0 LESS-THAN REGISTER - HIGH BYTE */ +__sfr __at (0xC8) T2CON ; /* TIMER 2 CONTROL */ +__sfr __at (0xCA) RCAP2L ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCB) RCAP2H ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCC) TL2 ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCD) TH2 ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xCF) SMB0CR ; /* SMBUS 0 CLOCK RATE */ +__sfr __at (0xD0) PSW ; /* PROGRAM STATUS WORD */ +__sfr __at (0xD1) REF0CN ; /* VOLTAGE REFERENCE 0 CONTROL */ +__sfr __at (0xD8) PCA0CN ; /* PCA 0 COUNTER CONTROL */ +__sfr __at (0xD9) PCA0MD ; /* PCA 0 COUNTER MODE */ +__sfr __at (0xDA) PCA0CPM0 ; /* CONTROL REGISTER FOR PCA 0 MODULE 0 */ +__sfr __at (0xDB) PCA0CPM1 ; /* CONTROL REGISTER FOR PCA 0 MODULE 1 */ +__sfr __at (0xDC) PCA0CPM2 ; /* CONTROL REGISTER FOR PCA 0 MODULE 2 */ +__sfr __at (0xDD) PCA0CPM3 ; /* CONTROL REGISTER FOR PCA 0 MODULE 3 */ +__sfr __at (0xDE) PCA0CPM4 ; /* CONTROL REGISTER FOR PCA 0 MODULE 4 */ +__sfr __at (0xE0) ACC ; /* ACCUMULATOR */ +__sfr __at (0xE1) XBR0 ; /* DIGITAL CROSSBAR CONFIGURATION REGISTER 0 */ +__sfr __at (0xE2) XBR1 ; /* DIGITAL CROSSBAR CONFIGURATION REGISTER 1 */ +__sfr __at (0xE3) XBR2 ; /* DIGITAL CROSSBAR CONFIGURATION REGISTER 2 */ +__sfr __at (0xE6) EIE1 ; /* EXTERNAL INTERRUPT ENABLE 1 */ +__sfr __at (0xE7) EIE2 ; /* EXTERNAL INTERRUPT ENABLE 2 */ +__sfr __at (0xE8) ADC0CN ; /* ADC 0 CONTROL */ +__sfr __at (0xE9) PCA0L ; /* PCA 0 TIMER - LOW BYTE */ +__sfr __at (0xEA) PCA0CPL0 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 0 - LOW BYTE */ +__sfr __at (0xEB) PCA0CPL1 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 1 - LOW BYTE */ +__sfr __at (0xEC) PCA0CPL2 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 2 - LOW BYTE */ +__sfr __at (0xED) PCA0CPL3 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 3 - LOW BYTE */ +__sfr __at (0xEE) PCA0CPL4 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 4 - LOW BYTE */ +__sfr __at (0xEF) RSTSRC ; /* RESET SOURCE */ +__sfr __at (0xF0) B ; /* B REGISTER */ +__sfr __at (0xF6) EIP1 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +__sfr __at (0xF7) EIP2 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 2 */ +__sfr __at (0xF8) SPI0CN ; /* SERIAL PERIPHERAL INTERFACE 0 CONTROL */ +__sfr __at (0xF9) PCA0H ; /* PCA 0 TIMER - HIGH BYTE */ +__sfr __at (0xFA) PCA0CPH0 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 0 - HIGH BYTE */ +__sfr __at (0xFB) PCA0CPH1 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 1 - HIGH BYTE */ +__sfr __at (0xFC) PCA0CPH2 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 2 - HIGH BYTE */ +__sfr __at (0xFD) PCA0CPH3 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 3 - HIGH BYTE */ +__sfr __at (0xFE) PCA0CPH4 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 4 - HIGH BYTE */ +__sfr __at (0xFF) WDTCN ; /* WATCHDOG TIMER CONTROL */ + + +/* WORD/DWORD Registers */ + +__sfr16 __at (0x8C8A) TMR0 ; /* TIMER 0 COUNTER */ +__sfr16 __at (0x8D8B) TMR1 ; /* TIMER 1 COUNTER */ +__sfr16 __at (0xCDCC) TMR2 ; /* TIMER 2 COUNTER */ +__sfr16 __at (0xCBCA) RCAP2 ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0x9594) TMR3 ; /* TIMER 3 COUNTER */ +__sfr16 __at (0x9392) TMR3RL ; /* TIMER 3 CAPTURE REGISTER WORD */ +__sfr16 __at (0xBFBE) ADC0 ; /* ADC 0 DATA WORD */ +__sfr16 __at (0xC5C4) ADC0GT ; /* ADC 0 GREATER-THAN REGISTER WORD */ +__sfr16 __at (0xC7C6) ADC0LT ; /* ADC 0 LESS-THAN REGISTER WORD */ +__sfr16 __at (0xF9E9) PCA0 ; /* PCA COUNTER */ +__sfr16 __at (0xFAEA) PCA0CP0 ; /* PCA CAPTURE 0 WORD */ +__sfr16 __at (0xFBEB) PCA0CP1 ; /* PCA CAPTURE 1 WORD */ +__sfr16 __at (0xFCEC) PCA0CP2 ; /* PCA CAPTURE 2 WORD */ +__sfr16 __at (0xFDED) PCA0CP3 ; /* PCA CAPTURE 3 WORD */ +__sfr16 __at (0xFEEE) PCA0CP4 ; /* PCA CAPTURE 4 WORD */ + + +/* BIT Registers */ + +/* P0 0x80 */ +__sbit __at (0x87) P0_7 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x80) P0_0 ; + +/* TCON 0x88 */ +__sbit __at (0x8F) TF1 ; /* TIMER 1 OVERFLOW FLAG */ +__sbit __at (0x8E) TR1 ; /* TIMER 1 ON/OFF CONTROL */ +__sbit __at (0x8D) TF0 ; /* TIMER 0 OVERFLOW FLAG */ +__sbit __at (0x8C) TR0 ; /* TIMER 0 ON/OFF CONTROL */ +__sbit __at (0x8B) IE1 ; /* EXT. INTERRUPT 1 EDGE FLAG */ +__sbit __at (0x8A) IT1 ; /* EXT. INTERRUPT 1 TYPE */ +__sbit __at (0x89) IE0 ; /* EXT. INTERRUPT 0 EDGE FLAG */ +__sbit __at (0x88) IT0 ; /* EXT. INTERRUPT 0 TYPE */ + +/* P1 0x90 */ +__sbit __at (0x97) P1_7 ; +__sbit __at (0x96) P1_6 ; +__sbit __at (0x95) P1_5 ; +__sbit __at (0x94) P1_4 ; +__sbit __at (0x93) P1_3 ; +__sbit __at (0x92) P1_2 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x90) P1_0 ; + +/* SCON 0x98 */ +__sbit __at (0x9F) SM0 ; /* SERIAL MODE CONTROL BIT 0 */ +__sbit __at (0x9E) SM1 ; /* SERIAL MODE CONTROL BIT 1 */ +__sbit __at (0x9D) SM2 ; /* MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9C) REN ; /* RECEIVE ENABLE */ +__sbit __at (0x9B) TB8 ; /* TRANSMIT BIT 8 */ +__sbit __at (0x9A) RB8 ; /* RECEIVE BIT 8 */ +__sbit __at (0x99) TI ; /* TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x98) RI ; /* RECEIVE INTERRUPT FLAG */ + +/* P2 0xA0 */ +__sbit __at (0xA7) P2_7 ; +__sbit __at (0xA6) P2_6 ; +__sbit __at (0xA5) P2_5 ; +__sbit __at (0xA4) P2_4 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA0) P2_0 ; + +/* IE 0xA8 */ +__sbit __at (0xAF) EA ; /* GLOBAL INTERRUPT ENABLE */ +__sbit __at (0xAD) ET2 ; /* TIMER 2 INTERRUPT ENABLE */ +__sbit __at (0xAC) ES ; /* SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAB) ET1 ; /* TIMER 1 INTERRUPT ENABLE */ +__sbit __at (0xAA) EX1 ; /* EXTERNAL INTERRUPT 1 ENABLE */ +__sbit __at (0xA9) ET0 ; /* TIMER 0 INTERRUPT ENABLE */ +__sbit __at (0xA8) EX0 ; /* EXTERNAL INTERRUPT 0 ENABLE */ + +/* P3 0xB0 */ +__sbit __at (0xB7) P3_7 ; +__sbit __at (0xB6) P3_6 ; +__sbit __at (0xB5) P3_5 ; +__sbit __at (0xB4) P3_4 ; +__sbit __at (0xB3) P3_3 ; +__sbit __at (0xB2) P3_2 ; +__sbit __at (0xB1) P3_1 ; +__sbit __at (0xB0) P3_0 ; + +/* IP 0xB8 */ +__sbit __at (0xBD) PT2 ; /* TIMER 2 PRIORITY */ +__sbit __at (0xBC) PS ; /* SERIAL PORT PRIORITY */ +__sbit __at (0xBB) PT1 ; /* TIMER 1 PRIORITY */ +__sbit __at (0xBA) PX1 ; /* EXTERNAL INTERRUPT 1 PRIORITY */ +__sbit __at (0xB9) PT0 ; /* TIMER 0 PRIORITY */ +__sbit __at (0xB8) PX0 ; /* EXTERNAL INTERRUPT 0 PRIORITY */ + +/* SMB0CN 0xC0 */ +__sbit __at (0xC7) BUSY ; /* SMBUS 0 BUSY */ +__sbit __at (0xC6) ENSMB ; /* SMBUS 0 ENABLE */ +__sbit __at (0xC5) STA ; /* SMBUS 0 START FLAG */ +__sbit __at (0xC4) STO ; /* SMBUS 0 STOP FLAG */ +__sbit __at (0xC3) SI ; /* SMBUS 0 INTERRUPT PENDING FLAG */ +__sbit __at (0xC2) AA ; /* SMBUS 0 ASSERT/ACKNOWLEDGE FLAG */ +__sbit __at (0xC1) SMBFTE ; /* SMBUS 0 FREE TIMER ENABLE */ +__sbit __at (0xC0) SMBTOE ; /* SMBUS 0 TIMEOUT ENABLE */ + +/* T2CON 0xC8 */ +__sbit __at (0xCF) TF2 ; /* TIMER 2 OVERFLOW FLAG */ +__sbit __at (0xCE) EXF2 ; /* EXTERNAL FLAG */ +__sbit __at (0xCD) RCLK ; /* RECEIVE CLOCK FLAG */ +__sbit __at (0xCC) TCLK ; /* TRANSMIT CLOCK FLAG */ +__sbit __at (0xCB) EXEN2 ; /* TIMER 2 EXTERNAL ENABLE FLAG */ +__sbit __at (0xCA) TR2 ; /* TIMER 2 ON/OFF CONTROL */ +__sbit __at (0xC9) CT2 ; /* TIMER OR COUNTER SELECT */ +__sbit __at (0xC8) CPRL2 ; /* CAPTURE OR RELOAD SELECT */ + +/* PSW 0xD0 */ +__sbit __at (0xD7) CY ; /* CARRY FLAG */ +__sbit __at (0xD6) AC ; /* AUXILIARY CARRY FLAG */ +__sbit __at (0xD5) F0 ; /* USER FLAG 0 */ +__sbit __at (0xD4) RS1 ; /* REGISTER BANK SELECT 1 */ +__sbit __at (0xD3) RS0 ; /* REGISTER BANK SELECT 0 */ +__sbit __at (0xD2) OV ; /* OVERFLOW FLAG */ +__sbit __at (0xD1) F1 ; /* USER FLAG 1 */ +__sbit __at (0xD0) P ; /* ACCUMULATOR PARITY FLAG */ + +/* PCA0CN 0xD8H */ +__sbit __at (0xDF) CF ; /* PCA 0 COUNTER OVERFLOW FLAG */ +__sbit __at (0xDE) CR ; /* PCA 0 COUNTER RUN CONTROL BIT */ +__sbit __at (0xDC) CCF4 ; /* PCA 0 MODULE 4 INTERRUPT FLAG */ +__sbit __at (0xDB) CCF3 ; /* PCA 0 MODULE 3 INTERRUPT FLAG */ +__sbit __at (0xDA) CCF2 ; /* PCA 0 MODULE 2 INTERRUPT FLAG */ +__sbit __at (0xD9) CCF1 ; /* PCA 0 MODULE 1 INTERRUPT FLAG */ +__sbit __at (0xD8) CCF0 ; /* PCA 0 MODULE 0 INTERRUPT FLAG */ + +/* ADC0CN 0xE8H */ +__sbit __at (0xEF) AD0EN ; /* ADC 0 ENABLE */ +__sbit __at (0xEE) AD0TM ; /* ADC 0 TRACK MODE */ +__sbit __at (0xED) AD0INT ; /* ADC 0 CONVERISION COMPLETE INTERRUPT FLAG */ +__sbit __at (0xEC) AD0BUSY ; /* ADC 0 BUSY FLAG */ +__sbit __at (0xEB) ADSTM1 ; /* ADC 0 START OF CONVERSION MODE BIT 1 */ +__sbit __at (0xEA) ADSTM0 ; /* ADC 0 START OF CONVERSION MODE BIT 0 */ +__sbit __at (0xE9) AD0WINT ; /* ADC 0 WINDOW COMPARE INTERRUPT FLAG */ +__sbit __at (0xE8) ADLJST ; /* ADC 0 RIGHT JUSTIFY DATA BIT */ + +/* SPI0CN 0xF8H */ +__sbit __at (0xFF) SPIF ; /* SPI 0 INTERRUPT FLAG */ +__sbit __at (0xFE) WCOL ; /* SPI 0 WRITE COLLISION FLAG */ +__sbit __at (0xFD) MODF ; /* SPI 0 MODE FAULT FLAG */ +__sbit __at (0xFC) RXOVRN ; /* SPI 0 RX OVERRUN FLAG */ +__sbit __at (0xFB) TXBSY ; /* SPI 0 TX BUSY FLAG */ +__sbit __at (0xFA) SLVSEL ; /* SPI 0 SLAVE SELECT */ +__sbit __at (0xF9) MSTEN ; /* SPI 0 MASTER ENABLE */ +__sbit __at (0xF8) SPIEN ; /* SPI 0 SPI ENABLE */ + + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define TF3 0x80 /* TMR3CN */ +#define CPFIF 0x10 /* CPTnCN */ +#define CPRIF 0x20 /* CPTnCN */ +#define CPOUT 0x40 /* CPTnCN */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ + +#endif diff --git a/device/include/mcs51/C8051F020.h b/device/include/mcs51/C8051F020.h new file mode 100644 index 0000000..58326c1 --- /dev/null +++ b/device/include/mcs51/C8051F020.h @@ -0,0 +1,369 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Cygnal/SiLabs C8051F02x Processor Range + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051F020_H +#define C8051F020_H + + +/* BYTE Registers */ +__sfr __at (0x80) P0 ; /* PORT 0 */ +__sfr __at (0x81) SP ; /* STACK POINTER */ +__sfr __at (0x82) DPL ; /* DATA POINTER - LOW BYTE */ +__sfr __at (0x83) DPH ; /* DATA POINTER - HIGH BYTE */ +__sfr __at (0x84) P4 ; /* PORT 4 */ +__sfr __at (0x85) P5 ; /* PORT 5 */ +__sfr __at (0x86) P6 ; /* PORT 6 */ +__sfr __at (0x87) PCON ; /* POWER CONTROL */ +__sfr __at (0x88) TCON ; /* TIMER CONTROL */ +__sfr __at (0x89) TMOD ; /* TIMER MODE */ +__sfr __at (0x8A) TL0 ; /* TIMER 0 - LOW BYTE */ +__sfr __at (0x8B) TL1 ; /* TIMER 1 - LOW BYTE */ +__sfr __at (0x8C) TH0 ; /* TIMER 0 - HIGH BYTE */ +__sfr __at (0x8D) TH1 ; /* TIMER 1 - HIGH BYTE */ +__sfr __at (0x8E) CKCON ; /* CLOCK CONTROL */ +__sfr __at (0x8F) PSCTL ; /* PROGRAM STORE R/W CONTROL */ +__sfr __at (0x90) P1 ; /* PORT 1 */ +__sfr __at (0x91) TMR3CN ; /* TIMER 3 CONTROL */ +__sfr __at (0x92) TMR3RLL ; /* TIMER 3 RELOAD REGISTER - LOW BYTE */ +__sfr __at (0x93) TMR3RLH ; /* TIMER 3 RELOAD REGISTER - HIGH BYTE */ +__sfr __at (0x94) TMR3L ; /* TIMER 3 - LOW BYTE */ +__sfr __at (0x95) TMR3H ; /* TIMER 3 - HIGH BYTE */ +__sfr __at (0x96) P7 ; /* PORT 7 */ +__sfr __at (0x98) SCON ; /* UART0 CONTROL */ +__sfr __at (0x98) SCON0 ; /* UART0 CONTROL */ +__sfr __at (0x99) SBUF ; /* UART0 BUFFER */ +__sfr __at (0x99) SBUF0 ; /* UART0 BUFFER */ +__sfr __at (0x9A) SPI0CFG ; /* SERIAL PERIPHERAL INTERFACE 0 CONFIGURATION */ +__sfr __at (0x9B) SPI0DAT ; /* SERIAL PERIPHERAL INTERFACE 0 DATA */ +__sfr __at (0x9C) ADC1 ; /* ADC 1 DATA */ +__sfr __at (0x9D) SPI0CKR ; /* SERIAL PERIPHERAL INTERFACE 0 CLOCK RATE CONTROL */ +__sfr __at (0x9E) CPT0CN ; /* COMPARATOR 0 CONTROL */ +__sfr __at (0x9F) CPT1CN ; /* COMPARATOR 1 CONTROL */ +__sfr __at (0xA0) P2 ; /* PORT 2 */ +__sfr __at (0xA1) EMI0TC ; /* External Memory Timing Control */ +__sfr __at (0xA3) EMI0CF ; /* EMIF CONFIGURATION */ +__sfr __at (0xA4) PRT0CF ; /* PORT 0 CONFIGURATION */ +__sfr __at (0xA4) P0MDOUT ; /* PORT 0 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA5) PRT1CF ; /* PORT 1 CONFIGURATION */ +__sfr __at (0xA5) P1MDOUT ; /* PORT 1 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA6) PRT2CF ; /* PORT 2 CONFIGURATION */ +__sfr __at (0xA6) P2MDOUT ; /* PORT 2 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA7) PRT3CF ; /* PORT 3 CONFIGURATION */ +__sfr __at (0xA7) P3MDOUT ; /* PORT 3 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA8) IE ; /* INTERRUPT ENABLE */ +__sfr __at (0xA9) SADDR0 ; /* UART0 Slave Address */ +__sfr __at (0xAA) ADC1CN ; /* ADC 1 CONTROL */ +__sfr __at (0xAB) ADC1CF ; /* ADC 1 CONFIGURATION */ +__sfr __at (0xAC) AMX1SL ; /* ADC 1 MUX CHANNEL SELECTION */ +__sfr __at (0xAD) P3IF ; /* PORT 3 EXTERNAL INTERRUPT FLAGS */ +__sfr __at (0xAE) SADEN1 ; /* UART1 Slave Address Enable */ +__sfr __at (0xAF) EMI0CN ; /* EXTERNAL MEMORY INTERFACE CONTROL */ +__sfr __at (0xAF) _XPAGE ; /* XDATA/PDATA PAGE */ +__sfr __at (0xB0) P3 ; /* PORT 3 */ +__sfr __at (0xB1) OSCXCN ; /* EXTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB2) OSCICN ; /* INTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB5) P74OUT ; /* PORT 4 THROUGH 7 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xB6) FLSCL ; /* FLASH MEMORY TIMING PRESCALER */ +__sfr __at (0xB7) FLACL ; /* FLASH ACESS LIMIT */ +__sfr __at (0xB8) IP ; /* INTERRUPT PRIORITY */ +__sfr __at (0xB9) SADEN0 ; /* UART0 Slave Address Enable */ +__sfr __at (0xBA) AMX0CF ; /* ADC 0 MUX CONFIGURATION */ +__sfr __at (0xBB) AMX0SL ; /* ADC 0 MUX CHANNEL SELECTION */ +__sfr __at (0xBC) ADC0CF ; /* ADC 0 CONFIGURATION */ +__sfr __at (0xBD) P1MDIN ; /* PORT 1 Input Mode */ +__sfr __at (0xBE) ADC0L ; /* ADC 0 DATA - LOW BYTE */ +__sfr __at (0xBF) ADC0H ; /* ADC 0 DATA - HIGH BYTE */ +__sfr __at (0xC0) SMB0CN ; /* SMBUS 0 CONTROL */ +__sfr __at (0xC1) SMB0STA ; /* SMBUS 0 STATUS */ +__sfr __at (0xC2) SMB0DAT ; /* SMBUS 0 DATA */ +__sfr __at (0xC3) SMB0ADR ; /* SMBUS 0 SLAVE ADDRESS */ +__sfr __at (0xC4) ADC0GTL ; /* ADC 0 GREATER-THAN REGISTER - LOW BYTE */ +__sfr __at (0xC5) ADC0GTH ; /* ADC 0 GREATER-THAN REGISTER - HIGH BYTE */ +__sfr __at (0xC6) ADC0LTL ; /* ADC 0 LESS-THAN REGISTER - LOW BYTE */ +__sfr __at (0xC7) ADC0LTH ; /* ADC 0 LESS-THAN REGISTER - HIGH BYTE */ +__sfr __at (0xC8) T2CON ; /* TIMER 2 CONTROL */ +__sfr __at (0xC9) T4CON ; /* TIMER 4 CONTROL */ +__sfr __at (0xCA) RCAP2L ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCB) RCAP2H ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCC) TL2 ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCD) TH2 ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xCF) SMB0CR ; /* SMBUS 0 CLOCK RATE */ +__sfr __at (0xD0) PSW ; /* PROGRAM STATUS WORD */ +__sfr __at (0xD1) REF0CN ; /* VOLTAGE REFERENCE 0 CONTROL */ +__sfr __at (0xD2) DAC0L ; /* DAC 0 REGISTER - LOW BYTE */ +__sfr __at (0xD3) DAC0H ; /* DAC 0 REGISTER - HIGH BYTE */ +__sfr __at (0xD4) DAC0CN ; /* DAC 0 CONTROL */ +__sfr __at (0xD5) DAC1L ; /* DAC 1 REGISTER - LOW BYTE */ +__sfr __at (0xD6) DAC1H ; /* DAC 1 REGISTER - HIGH BYTE */ +__sfr __at (0xD7) DAC1CN ; /* DAC 1 CONTROL */ +__sfr __at (0xD8) PCA0CN ; /* PCA 0 COUNTER CONTROL */ +__sfr __at (0xD9) PCA0MD ; /* PCA 0 COUNTER MODE */ +__sfr __at (0xDA) PCA0CPM0 ; /* CONTROL REGISTER FOR PCA 0 MODULE 0 */ +__sfr __at (0xDB) PCA0CPM1 ; /* CONTROL REGISTER FOR PCA 0 MODULE 1 */ +__sfr __at (0xDC) PCA0CPM2 ; /* CONTROL REGISTER FOR PCA 0 MODULE 2 */ +__sfr __at (0xDD) PCA0CPM3 ; /* CONTROL REGISTER FOR PCA 0 MODULE 3 */ +__sfr __at (0xDE) PCA0CPM4 ; /* CONTROL REGISTER FOR PCA 0 MODULE 4 */ +__sfr __at (0xE0) ACC ; /* ACCUMULATOR */ +__sfr __at (0xE1) XBR0 ; /* DIGITAL CROSSBAR CONFIGURATION REGISTER 0 */ +__sfr __at (0xE2) XBR1 ; /* DIGITAL CROSSBAR CONFIGURATION REGISTER 1 */ +__sfr __at (0xE3) XBR2 ; /* DIGITAL CROSSBAR CONFIGURATION REGISTER 2 */ +__sfr __at (0xE4) RCAP4L ; /* TIMER 4 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xE5) RCAP4H ; /* TIMER 4 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xE6) EIE1 ; /* EXTERNAL INTERRUPT ENABLE 1 */ +__sfr __at (0xE7) EIE2 ; /* EXTERNAL INTERRUPT ENABLE 2 */ +__sfr __at (0xE8) ADC0CN ; /* ADC 0 CONTROL */ +__sfr __at (0xE9) PCA0L ; /* PCA 0 TIMER - LOW BYTE */ +__sfr __at (0xEA) PCA0CPL0 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 0 - LOW BYTE */ +__sfr __at (0xEB) PCA0CPL1 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 1 - LOW BYTE */ +__sfr __at (0xEC) PCA0CPL2 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 2 - LOW BYTE */ +__sfr __at (0xED) PCA0CPL3 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 3 - LOW BYTE */ +__sfr __at (0xEE) PCA0CPL4 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 4 - LOW BYTE */ +__sfr __at (0xEF) RSTSRC ; /* RESET SOURCE */ +__sfr __at (0xF0) B ; /* B REGISTER */ +__sfr __at (0xF1) SCON1 ; /* UART1 CONTROL */ +__sfr __at (0xF2) SBUF1 ; /* UART1 DATA */ +__sfr __at (0xF3) SADDR1 ; /* UART1 Slave Address */ +__sfr __at (0xF4) TL4 ; /* TIMER 4 DATA - LOW BYTE */ +__sfr __at (0xF5) TH4 ; /* TIMER 4 DATA - HIGH BYTE */ +__sfr __at (0xF6) EIP1 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +__sfr __at (0xF7) EIP2 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 2 */ +__sfr __at (0xF8) SPI0CN ; /* SERIAL PERIPHERAL INTERFACE 0 CONTROL */ +__sfr __at (0xF9) PCA0H ; /* PCA 0 TIMER - HIGH BYTE */ +__sfr __at (0xFA) PCA0CPH0 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 0 - HIGH BYTE */ +__sfr __at (0xFB) PCA0CPH1 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 1 - HIGH BYTE */ +__sfr __at (0xFC) PCA0CPH2 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 2 - HIGH BYTE */ +__sfr __at (0xFD) PCA0CPH3 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 3 - HIGH BYTE */ +__sfr __at (0xFE) PCA0CPH4 ; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 4 - HIGH BYTE */ +__sfr __at (0xFF) WDTCN ; /* WATCHDOG TIMER CONTROL */ + + +/* WORD/DWORD Registers */ + +__sfr16 __at (0x8C8A) TMR0 ; /* TIMER 0 COUNTER */ +__sfr16 __at (0x8D8B) TMR1 ; /* TIMER 1 COUNTER */ +__sfr16 __at (0xCDCC) TMR2 ; /* TIMER 2 COUNTER */ +__sfr16 __at (0xCBCA) RCAP2 ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0x9594) TMR3 ; /* TIMER 3 COUNTER */ +__sfr16 __at (0x9392) TMR3RL ; /* TIMER 3 CAPTURE REGISTER WORD */ +__sfr16 __at (0xF5F4) TMR4 ; /* TIMER 4 COUNTER */ +__sfr16 __at (0xE5E4) RCAP4 ; /* TIMER 4 CAPTURE REGISTER WORD */ +__sfr16 __at (0xBFBE) ADC0 ; /* ADC 0 DATA WORD */ +__sfr16 __at (0xC5C4) ADC0GT ; /* ADC 0 GREATER-THAN REGISTER WORD */ +__sfr16 __at (0xC7C6) ADC0LT ; /* ADC 0 LESS-THAN REGISTER WORD */ +__sfr16 __at (0xD3D2) DAC0 ; /* DAC 0 REGISTER WORD */ +__sfr16 __at (0xD6D5) DAC1 ; /* DAC 1 REGISTER WORD */ +__sfr16 __at (0xF9E9) PCA0 ; /* PCA COUNTER */ +__sfr16 __at (0xFAEA) PCA0CP0 ; /* PCA CAPTURE 0 WORD */ +__sfr16 __at (0xFBEB) PCA0CP1 ; /* PCA CAPTURE 1 WORD */ +__sfr16 __at (0xFCEC) PCA0CP2 ; /* PCA CAPTURE 2 WORD */ +__sfr16 __at (0xFDED) PCA0CP3 ; /* PCA CAPTURE 3 WORD */ +__sfr16 __at (0xFEEE) PCA0CP4 ; /* PCA CAPTURE 4 WORD */ + + +/* BIT Registers */ + +/* P0 0x80 */ +__sbit __at (0x80) P0_0 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x87) P0_7 ; + +/* TCON 0x88 */ +__sbit __at (0x88) IT0 ; /* EXT. INTERRUPT 0 TYPE */ +__sbit __at (0x89) IE0 ; /* EXT. INTERRUPT 0 EDGE FLAG */ +__sbit __at (0x8A) IT1 ; /* EXT. INTERRUPT 1 TYPE */ +__sbit __at (0x8B) IE1 ; /* EXT. INTERRUPT 1 EDGE FLAG */ +__sbit __at (0x8C) TR0 ; /* TIMER 0 ON/OFF CONTROL */ +__sbit __at (0x8D) TF0 ; /* TIMER 0 OVERFLOW FLAG */ +__sbit __at (0x8E) TR1 ; /* TIMER 1 ON/OFF CONTROL */ +__sbit __at (0x8F) TF1 ; /* TIMER 1 OVERFLOW FLAG */ + +/* P1 0x90 */ +__sbit __at (0x90) P1_0 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x92) P1_2 ; +__sbit __at (0x93) P1_3 ; +__sbit __at (0x94) P1_4 ; +__sbit __at (0x95) P1_5 ; +__sbit __at (0x96) P1_6 ; +__sbit __at (0x97) P1_7 ; + +/* SCON 0x98 */ +__sbit __at (0x98) RI ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x98) RI0 ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x99) TI ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x99) TI0 ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x9A) RB8 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9A) RB80 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9B) TB8 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9B) TB80 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9C) REN ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9C) REN0 ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9D) SM2 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9D) SM20 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9D) MCE0 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9E) SM1 ; /* SCON.6 - SERIAL MODE CONTROL BIT 1 */ +__sbit __at (0x9E) SM10 ; /* SCON.6 - SERIAL MODE CONTROL BIT 1 */ +__sbit __at (0x9F) SM0 ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ +__sbit __at (0x9F) SM00 ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ +__sbit __at (0x9F) S0MODE ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ + +/* P2 0xA0 */ +__sbit __at (0xA0) P2_0 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA4) P2_4 ; +__sbit __at (0xA5) P2_5 ; +__sbit __at (0xA6) P2_6 ; +__sbit __at (0xA7) P2_7 ; + +/* IE 0xA8 */ +__sbit __at (0xA8) EX0 ; /* EXTERNAL INTERRUPT 0 ENABLE */ +__sbit __at (0xA9) ET0 ; /* TIMER 0 INTERRUPT ENABLE */ +__sbit __at (0xAA) EX1 ; /* EXTERNAL INTERRUPT 1 ENABLE */ +__sbit __at (0xAB) ET1 ; /* TIMER 1 INTERRUPT ENABLE */ +__sbit __at (0xAC) ES0 ; /* SERIAL PORT 0 INTERRUPT ENABLE */ +__sbit __at (0xAC) ES ; /* SERIAL PORT 0 INTERRUPT ENABLE */ +__sbit __at (0xAD) ET2 ; /* TIMER 2 INTERRUPT ENABLE */ +__sbit __at (0xAF) EA ; /* GLOBAL INTERRUPT ENABLE */ + +/* P3 0xB0 */ +__sbit __at (0xB0) P3_0 ; +__sbit __at (0xB1) P3_1 ; +__sbit __at (0xB2) P3_2 ; +__sbit __at (0xB3) P3_3 ; +__sbit __at (0xB4) P3_4 ; +__sbit __at (0xB5) P3_5 ; +__sbit __at (0xB6) P3_6 ; +__sbit __at (0xB7) P3_7 ; + +/* IP 0xB8 */ +__sbit __at (0xB8) PX0 ; /* EXTERNAL INTERRUPT 0 PRIORITY */ +__sbit __at (0xB9) PT0 ; /* TIMER 0 PRIORITY */ +__sbit __at (0xBA) PX1 ; /* EXTERNAL INTERRUPT 1 PRIORITY */ +__sbit __at (0xBB) PT1 ; /* TIMER 1 PRIORITY */ +__sbit __at (0xBC) PS0 ; /* SERIAL PORT PRIORITY */ +__sbit __at (0xBC) PS ; /* SERIAL PORT PRIORITY */ +__sbit __at (0xBD) PT2 ; /* TIMER 2 PRIORITY */ + +/* SMB0CN 0xC0 */ +__sbit __at (0xC0) SMBTOE ; /* SMBUS 0 TIMEOUT ENABLE */ +__sbit __at (0xC1) SMBFTE ; /* SMBUS 0 FREE TIMER ENABLE */ +__sbit __at (0xC2) AA ; /* SMBUS 0 ASSERT/ACKNOWLEDGE FLAG */ +__sbit __at (0xC3) SI ; /* SMBUS 0 INTERRUPT PENDING FLAG */ +__sbit __at (0xC4) STO ; /* SMBUS 0 STOP FLAG */ +__sbit __at (0xC5) STA ; /* SMBUS 0 START FLAG */ +__sbit __at (0xC6) ENSMB ; /* SMBUS 0 ENABLE */ +__sbit __at (0xC7) BUSY ; /* SMBUS 0 BUSY */ + +/* T2CON 0xC8 */ +__sbit __at (0xC8) CPRL2 ; /* CAPTURE OR RELOAD SELECT */ +__sbit __at (0xC9) CT2 ; /* TIMER OR COUNTER SELECT */ +__sbit __at (0xCA) TR2 ; /* TIMER 2 ON/OFF CONTROL */ +__sbit __at (0xCB) EXEN2 ; /* TIMER 2 EXTERNAL ENABLE FLAG */ +__sbit __at (0xCC) TCLK ; /* TRANSMIT CLOCK FLAG */ +__sbit __at (0xCD) RCLK ; /* RECEIVE CLOCK FLAG */ +__sbit __at (0xCE) EXF2 ; /* EXTERNAL FLAG */ +__sbit __at (0xCF) TF2 ; /* TIMER 2 OVERFLOW FLAG */ + +/* PSW 0xD0 */ +__sbit __at (0xD0) P ; /* ACCUMULATOR PARITY FLAG */ +__sbit __at (0xD1) F1 ; /* USER FLAG 1 */ +__sbit __at (0xD2) OV ; /* OVERFLOW FLAG */ +__sbit __at (0xD3) RS0 ; /* REGISTER BANK SELECT 0 */ +__sbit __at (0xD4) RS1 ; /* REGISTER BANK SELECT 1 */ +__sbit __at (0xD5) F0 ; /* USER FLAG 0 */ +__sbit __at (0xD6) AC ; /* AUXILIARY CARRY FLAG */ +__sbit __at (0xD7) CY ; /* CARRY FLAG */ + +/* PCA0CN 0xD8H */ +__sbit __at (0xD8) CCF0 ; /* PCA 0 MODULE 0 INTERRUPT FLAG */ +__sbit __at (0xD9) CCF1 ; /* PCA 0 MODULE 1 INTERRUPT FLAG */ +__sbit __at (0xDA) CCF2 ; /* PCA 0 MODULE 2 INTERRUPT FLAG */ +__sbit __at (0xDB) CCF3 ; /* PCA 0 MODULE 3 INTERRUPT FLAG */ +__sbit __at (0xDC) CCF4 ; /* PCA 0 MODULE 4 INTERRUPT FLAG */ +__sbit __at (0xDE) CR ; /* PCA 0 COUNTER RUN CONTROL BIT */ +__sbit __at (0xDF) CF ; /* PCA 0 COUNTER OVERFLOW FLAG */ + +/* ADC0CN 0xE8H */ +__sbit __at (0xE8) ADLJST ; /* ADC 0 RIGHT JUSTIFY DATA BIT */ +__sbit __at (0xE8) AD0LJST ; /* ADC 0 RIGHT JUSTIFY DATA BIT */ +__sbit __at (0xE9) ADWINT ; /* ADC 0 WINDOW COMPARE INTERRUPT FLAG */ +__sbit __at (0xE9) AD0WINT ; /* ADC 0 WINDOW COMPARE INTERRUPT FLAG */ +__sbit __at (0xEA) ADSTM0 ; /* ADC 0 START OF CONVERSION MODE BIT 0 */ +__sbit __at (0xEA) AD0CM0 ; /* ADC 0 START OF CONVERSION MODE BIT 0 */ +__sbit __at (0xEB) ADSTM1 ; /* ADC 0 START OF CONVERSION MODE BIT 1 */ +__sbit __at (0xEB) AD0CM1 ; /* ADC 0 START OF CONVERSION MODE BIT 1 */ +__sbit __at (0xEC) ADBUSY ; /* ADC 0 BUSY FLAG */ +__sbit __at (0xEC) AD0BUSY ; /* ADC 0 BUSY FLAG */ +__sbit __at (0xED) ADCINT ; /* ADC 0 CONVERISION COMPLETE INTERRUPT FLAG */ +__sbit __at (0xED) AD0INT ; /* ADC 0 CONVERISION COMPLETE INTERRUPT FLAG */ +__sbit __at (0xEE) ADCTM ; /* ADC 0 TRACK MODE */ +__sbit __at (0xEE) AD0TM ; /* ADC 0 TRACK MODE */ +__sbit __at (0xEF) ADCEN ; /* ADC 0 ENABLE */ +__sbit __at (0xEF) AD0EN ; /* ADC 0 ENABLE */ + +/* SPI0CN 0xF8H */ +__sbit __at (0xF8) SPIEN ; /* SPI 0 SPI ENABLE */ +__sbit __at (0xF9) MSTEN ; /* SPI 0 MASTER ENABLE */ +__sbit __at (0xFA) SLVSEL ; /* SPI 0 SLAVE SELECT */ +__sbit __at (0xFB) TXBSY ; /* SPI 0 TX BUSY FLAG */ +__sbit __at (0xFC) RXOVRN ; /* SPI 0 RX OVERRUN FLAG */ +__sbit __at (0xFD) MODF ; /* SPI 0 MODE FAULT FLAG */ +__sbit __at (0xFE) WCOL ; /* SPI 0 WRITE COLLISION FLAG */ +__sbit __at (0xFF) SPIF ; /* SPI 0 INTERRUPT FLAG */ + + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define PCON_SMOD0 0x80 /* PCON */ +#define TF3 0x80 /* TMR3CN */ +#define CPFIF 0x10 /* CPTnCN */ +#define CPRIF 0x20 /* CPTnCN */ +#define CPOUT 0x40 /* CPTnCN */ +#define TR4 0x04 /* T4CON */ +#define TF4 0x80 /* T4CON */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ +#define RI1 0x01 /* SCON1 */ +#define TI1 0x02 /* SCON1 */ +#define RB81 0x04 /* SCON1 */ +#define TB81 0x08 /* SCON1 */ +#define REN1 0x10 /* SCON1 */ +#define SM21 0x20 /* SCON1 */ +#define SM11 0x40 /* SCON1 */ +#define SM01 0x80 /* SCON1 */ + +#endif diff --git a/device/include/mcs51/C8051F040.h b/device/include/mcs51/C8051F040.h new file mode 100644 index 0000000..2885a00 --- /dev/null +++ b/device/include/mcs51/C8051F040.h @@ -0,0 +1,505 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Cygnal/SiLabs C8051F04x Processor Range + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051F040_H +#define C8051F040_H + + +/* BYTE Registers */ + +/* All Pages */ +__sfr __at 0x80 P0 ; /* PORT 0 */ +__sfr __at 0x81 SP ; /* STACK POINTER */ +__sfr __at 0x82 DPL ; /* DATA POINTER - LOW BYTE */ +__sfr __at 0x83 DPH ; /* DATA POINTER - HIGH BYTE */ +__sfr __at 0x84 SFRPAGE ; /* SFR PAGE SELECT */ +__sfr __at 0x85 SFRNEXT ; /* SFR STACK NEXT PAGE */ +__sfr __at 0x86 SFRLAST ; /* SFR STACK LAST PAGE */ +__sfr __at 0x87 PCON ; /* POWER CONTROL */ +__sfr __at 0x90 P1 ; /* PORT 1 */ +__sfr __at 0xA0 P2 ; /* PORT 2 */ +__sfr __at 0xA8 IE ; /* INTERRUPT ENABLE */ +__sfr __at 0xB0 P3 ; /* PORT 3 */ +__sfr __at 0xB8 IP ; /* INTERRUPT PRIORITY */ +__sfr __at 0xD0 PSW ; /* PROGRAM STATUS WORD */ +__sfr __at 0xE0 ACC ; /* ACCUMULATOR */ +__sfr __at 0xE6 EIE1 ; /* EXTERNAL INTERRUPT ENABLE 1 */ +__sfr __at 0xE7 EIE2 ; /* EXTERNAL INTERRUPT ENABLE 2 */ +__sfr __at 0xF0 B ; /* B REGISTER */ +__sfr __at 0xF6 EIP1 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +__sfr __at 0xF7 EIP2 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 2 */ +__sfr __at 0xFF WDTCN ; /* WATCHDOG TIMER CONTROL */ + +/* Page 0x00 */ +__sfr __at 0x88 TCON ; /* TIMER CONTROL */ +__sfr __at 0x89 TMOD ; /* TIMER MODE */ +__sfr __at 0x8A TL0 ; /* TIMER 0 - LOW BYTE */ +__sfr __at 0x8B TL1 ; /* TIMER 1 - LOW BYTE */ +__sfr __at 0x8C TH0 ; /* TIMER 0 - HIGH BYTE */ +__sfr __at 0x8D TH1 ; /* TIMER 1 - HIGH BYTE */ +__sfr __at 0x8E CKCON ; /* TIMER 0/1 CLOCK CONTROL */ +__sfr __at 0x8F PSCTL ; /* FLASH WRITE/ERASE CONTROL */ +__sfr __at 0x91 SSTA0 ; /* UART 0 STATUS */ +__sfr __at 0x98 SCON0 ; /* UART 0 CONTROL */ +__sfr __at 0x98 SCON ; /* UART 0 CONTROL */ +__sfr __at 0x99 SBUF0 ; /* UART 0 BUFFER */ +__sfr __at 0x99 SBUF ; /* UART 0 BUFFER */ +__sfr __at 0x9A SPI0CFG ; /* SPI 0 CONFIGURATION */ +__sfr __at 0x9B SPI0DAT ; /* SPI 0 DATA */ +__sfr __at 0x9D SPI0CKR ; /* SPI 0 CLOCK RATE CONTROL */ +__sfr __at 0xA1 EMI0TC ; /* EMIF TIMING CONTROL */ +__sfr __at 0xA2 EMI0CN ; /* EMIF CONTROL */ +__sfr __at 0xA2 _XPAGE ; /* XDATA/PDATA PAGE */ +__sfr __at 0xA3 EMI0CF ; /* EMIF CONFIGURATION */ +__sfr __at 0xA9 SADDR0 ; /* UART 0 SLAVE ADDRESS */ +__sfr __at 0xB7 FLSCL ; /* FLASH SCALE */ +__sfr __at 0xB9 SADEN0 ; /* UART 0 SLAVE ADDRESS MASK */ +__sfr __at 0xBA AMX0CF ; /* ADC 0 MUX CONFIGURATION */ +__sfr __at 0xBB AMX0SL ; /* ADC 0 MUX CHANNEL SELECTION */ +__sfr __at 0xBC ADC0CF ; /* ADC 0 CONFIGURATION */ +__sfr __at 0xBD AMX0PRT ; /* ADC 0 PORT 3 I/O PIN SELECT */ +__sfr __at 0xBE ADC0L ; /* ADC 0 DATA - LOW BYTE */ +__sfr __at 0xBF ADC0H ; /* ADC 0 DATA - HIGH BYTE */ +__sfr __at 0xC0 SMB0CN ; /* SMBUS 0 CONTROL */ +__sfr __at 0xC1 SMB0STA ; /* SMBUS 0 STATUS */ +__sfr __at 0xC2 SMB0DAT ; /* SMBUS 0 DATA */ +__sfr __at 0xC3 SMB0ADR ; /* SMBUS 0 SLAVE ADDRESS */ +__sfr __at 0xC4 ADC0GTL ; /* ADC 0 GREATER-THAN REGISTER - LOW BYTE */ +__sfr __at 0xC5 ADC0GTH ; /* ADC 0 GREATER-THAN REGISTER - HIGH BYTE */ +__sfr __at 0xC6 ADC0LTL ; /* ADC 0 LESS-THAN REGISTER - LOW BYTE */ +__sfr __at 0xC7 ADC0LTH ; /* ADC 0 LESS-THAN REGISTER - HIGH BYTE */ +__sfr __at 0xC8 TMR2CN ; /* TIMER 2 CONTROL */ +__sfr __at 0xC9 TMR2CF ; /* TIMER 2 CONFIGURATION */ +__sfr __at 0xCA RCAP2L ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at 0xCB RCAP2H ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at 0xCC TMR2L ; /* TIMER 2 - LOW BYTE */ +__sfr __at 0xCC TL2 ; /* TIMER 2 - LOW BYTE */ +__sfr __at 0xCD TMR2H ; /* TIMER 2 - HIGH BYTE */ +__sfr __at 0xCD TH2 ; /* TIMER 2 - HIGH BYTE */ +__sfr __at 0xCF SMB0CR ; /* SMBUS 0 CLOCK RATE */ +__sfr __at 0xD1 REF0CN ; /* VOLTAGE REFERENCE 0 CONTROL */ +__sfr __at 0xD2 DAC0L ; /* DAC 0 REGISTER - LOW BYTE */ +__sfr __at 0xD3 DAC0H ; /* DAC 0 REGISTER - HIGH BYTE */ +__sfr __at 0xD4 DAC0CN ; /* DAC 0 CONTROL */ +__sfr __at 0xD6 HVA0CN ; /* HIGH VOLTAGE DIFFERENTIAL AMP CONTROL */ +__sfr __at 0xD8 PCA0CN ; /* PCA 0 COUNTER CONTROL */ +__sfr __at 0xD9 PCA0MD ; /* PCA 0 COUNTER MODE */ +__sfr __at 0xDA PCA0CPM0 ; /* PCA 0 MODULE 0 CONTROL */ +__sfr __at 0xDB PCA0CPM1 ; /* PCA 0 MODULE 1 CONTROL */ +__sfr __at 0xDC PCA0CPM2 ; /* PCA 0 MODULE 2 CONTROL */ +__sfr __at 0xDD PCA0CPM3 ; /* PCA 0 MODULE 3 CONTROL */ +__sfr __at 0xDE PCA0CPM4 ; /* PCA 0 MODULE 4 CONTROL */ +__sfr __at 0xDF PCA0CPM5 ; /* PCA 0 MODULE 5 CONTROL */ +__sfr __at 0xE1 PCA0CPL5 ; /* PCA 0 MODULE 5 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at 0xE2 PCA0CPH5 ; /* PCA 0 MODULE 5 CAPTURE/COMPARE - HIGH BYTE */ +__sfr __at 0xE8 ADC0CN ; /* ADC 0 CONTROL */ +__sfr __at 0xE9 PCA0CPL2 ; /* PCA 0 MODULE 2 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at 0xEA PCA0CPH2 ; /* PCA 0 MODULE 2 CAPTURE/COMPARE - HIGH BYTE */ +__sfr __at 0xEB PCA0CPL3 ; /* PCA 0 MODULE 3 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at 0xEC PCA0CPH3 ; /* PCA 0 MODULE 3 CAPTURE/COMPARE - HIGH BYTE */ +__sfr __at 0xED PCA0CPL4 ; /* PCA 0 MODULE 4 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at 0xEE PCA0CPH4 ; /* PCA 0 MODULE 4 CAPTURE/COMPARE - HIGH BYTE */ +__sfr __at 0xEF RSTSRC ; /* RESET SOURCE */ +__sfr __at 0xF8 SPI0CN ; /* SPI 0 CONTROL */ +__sfr __at 0xF9 PCA0L ; /* PCA 0 TIMER - LOW BYTE */ +__sfr __at 0xFA PCA0H ; /* PCA 0 TIMER - HIGH BYTE */ +__sfr __at 0xFB PCA0CPL0 ; /* PCA 0 MODULE 0 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at 0xFC PCA0CPH0 ; /* PCA 0 MODULE 0 CAPTURE/COMPARE - HIGH BYTE */ +__sfr __at 0xFD PCA0CPL1 ; /* PCA 0 MODULE 1 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at 0xFE PCA0CPH1 ; /* PCA 0 MODULE 1 CAPTURE/COMPARE - HIGH BYTE */ + +/* Page 0x01 */ +__sfr __at 0x88 CPT0CN ; /* COMPARATOR 0 CONTROL */ +__sfr __at 0x89 CPT0MD ; /* COMPARATOR 0 CONFIGURATION */ +__sfr __at 0x98 SCON1 ; /* UART 1 CONTROL */ +__sfr __at 0x99 SBUF1 ; /* UART 1 BUFFER */ +__sfr __at 0xC0 CAN0STA ; /* CAN 0 STATUS */ +__sfr __at 0xC8 TMR3CN ; /* TIMER 3 CONTROL */ +__sfr __at 0xC9 TMR3CF ; /* TIMER 3 CONFIGURATION */ +__sfr __at 0xCA RCAP3L ; /* TIMER 3 CAPTURE REGISTER - LOW BYTE */ +__sfr __at 0xCB RCAP3H ; /* TIMER 3 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at 0xCC TMR3L ; /* TIMER 3 - LOW BYTE */ +__sfr __at 0xCD TMR3H ; /* TIMER 3 - HIGH BYTE */ +__sfr __at 0xD2 DAC1L ; /* DAC 1 REGISTER - LOW BYTE */ +__sfr __at 0xD3 DAC1H ; /* DAC 1 REGISTER - HIGH BYTE */ +__sfr __at 0xD4 DAC1CN ; /* DAC 1 CONTROL */ +__sfr __at 0xD8 CAN0DATL ; /* CAN 0 DATA REGISTER LOW */ +__sfr __at 0xD9 CAN0DATH ; /* CAN 0 DATA REGISTER HIGH */ +__sfr __at 0xDA CAN0ADR ; /* CAN 0 ADDRESS */ +__sfr __at 0xDB CAN0TST ; /* CAN 0 TEST REGISTER */ +__sfr __at 0xF8 CAN0CN ; /* CAN 0 CONTROL */ + +/* Page 0x02 */ +__sfr __at 0x88 CPT1CN ; /* COMPARATOR 1 CONTROL */ +__sfr __at 0x89 CPT1MD ; /* COMPARATOR 1 CONFIGURATION */ +__sfr __at 0xBA AMX2CF ; /* ADC 2 MUX CONFIGURATION */ +__sfr __at 0xBB AMX2SL ; /* ADC 2 MUX CHANNEL SELECTION */ +__sfr __at 0xBC ADC2CF ; /* ADC 2 CONFIGURATION */ +__sfr __at 0xBE ADC2 ; /* ADC 2 DATA */ +__sfr __at 0xC4 ADC2GT ; /* ADC 2 GREATER-THAN REGISTER */ +__sfr __at 0xC6 ADC2LT ; /* ADC 2 LESS-THAN REGISTER */ +__sfr __at 0xC8 TMR4CN ; /* TIMER 4 CONTROL */ +__sfr __at 0xC9 TMR4CF ; /* TIMER 4 CONFIGURATION */ +__sfr __at 0xCA RCAP4L ; /* TIMER 4 CAPTURE REGISTER - LOW BYTE */ +__sfr __at 0xCB RCAP4H ; /* TIMER 4 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at 0xCC TMR4L ; /* TIMER 4 - LOW BYTE */ +__sfr __at 0xCD TMR4H ; /* TIMER 4 - HIGH BYTE */ +__sfr __at 0xE8 ADC2CN ; /* ADC 2 CONTROL */ + +/* Page 0x03 */ +__sfr __at 0x88 CPT2CN ; /* COMPARATOR 2 CONTROL */ +__sfr __at 0x89 CPT2MD ; /* COMPARATOR 2 CONFIGURATION */ + +/* Page 0x0F */ +__sfr __at 0x8A OSCICN ; /* INTERNAL OSCILLATOR CONTROL */ +__sfr __at 0x8B OSCICL ; /* INTERNAL OSCILLATOR CALIBRATION */ +__sfr __at 0x8C OSCXCN ; /* EXTERNAL OSCILLATOR CONTROL */ +__sfr __at 0x96 SFRPGCN ; /* SFR PAGE CONTROL */ +__sfr __at 0x97 CLKSEL ; /* SYSTEM CLOCK SELECT */ +__sfr __at 0x9C P4MDOUT ; /* PORT 4 OUTPUT MODE */ +__sfr __at 0x9D P5MDOUT ; /* PORT 5 OUTPUT MODE */ +__sfr __at 0x9E P6MDOUT ; /* PORT 6 OUTPUT MODE */ +__sfr __at 0x9F P7MDOUT ; /* PORT 7 OUTPUT MODE */ +__sfr __at 0xA4 P0MDOUT ; /* PORT 0 OUTPUT MODE */ +__sfr __at 0xA5 P1MDOUT ; /* PORT 1 OUTPUT MODE */ +__sfr __at 0xA6 P2MDOUT ; /* PORT 2 OUTPUT MODE CONFIGURATION */ +__sfr __at 0xA7 P3MDOUT ; /* PORT 3 OUTPUT MODE CONFIGURATION */ +__sfr __at 0xAD P1MDIN ; /* PORT 1 INPUT MODE */ +__sfr __at 0xAE P2MDIN ; /* PORT 2 INPUT MODE */ +__sfr __at 0xAF P3MDIN ; /* PORT 3 INPUT MODE */ +__sfr __at 0xB7 FLACL ; /* FLASH ACCESS LIMIT */ +__sfr __at 0xC8 P4 ; /* PORT 4 */ +__sfr __at 0xD8 P5 ; /* PORT 5 */ +__sfr __at 0xE1 XBR0 ; /* CROSSBAR CONFIGURATION REGISTER 0 */ +__sfr __at 0xE2 XBR1 ; /* CROSSBAR CONFIGURATION REGISTER 1 */ +__sfr __at 0xE3 XBR2 ; /* CROSSBAR CONFIGURATION REGISTER 2 */ +__sfr __at 0xE4 XBR3 ; /* CROSSBAR CONFIGURATION REGISTER 3 */ +__sfr __at 0xE8 P6 ; /* PORT 6 */ +__sfr __at 0xF8 P7 ; /* PORT 7 */ + +/* +Do NOT use sfr16 for CAN0DAT ! +*/ + +/* BIT Registers */ + +/* P0 0x80 */ +__sbit __at 0x80 P0_0 ; +__sbit __at 0x81 P0_1 ; +__sbit __at 0x82 P0_2 ; +__sbit __at 0x83 P0_3 ; +__sbit __at 0x84 P0_4 ; +__sbit __at 0x85 P0_5 ; +__sbit __at 0x86 P0_6 ; +__sbit __at 0x87 P0_7 ; + +/* TCON 0x88 */ +__sbit __at 0x88 IT0 ; /* EXT. INTERRUPT 0 TYPE */ +__sbit __at 0x89 IE0 ; /* EXT. INTERRUPT 0 EDGE FLAG */ +__sbit __at 0x8A IT1 ; /* EXT. INTERRUPT 1 TYPE */ +__sbit __at 0x8B IE1 ; /* EXT. INTERRUPT 1 EDGE FLAG */ +__sbit __at 0x8C TR0 ; /* TIMER 0 ON/OFF CONTROL */ +__sbit __at 0x8D TF0 ; /* TIMER 0 OVERFLOW FLAG */ +__sbit __at 0x8E TR1 ; /* TIMER 1 ON/OFF CONTROL */ +__sbit __at 0x8F TF1 ; /* TIMER 1 OVERFLOW FLAG */ + +/* CPT0CN 0x88 */ +__sbit __at 0x88 CP0HYN0 ; /* COMPARATOR 0 NEGATIVE HYSTERESIS 0 */ +__sbit __at 0x89 CP0HYN1 ; /* COMPARATOR 0 NEGATIVE HYSTERESIS 1 */ +__sbit __at 0x8A CP0HYP0 ; /* COMPARATOR 0 POSITIVE HYSTERESIS 0 */ +__sbit __at 0x8B CP0HYP1 ; /* COMPARATOR 0 POSITIVE HYSTERESIS 1 */ +__sbit __at 0x8C CP0FIF ; /* COMPARATOR 0 FALLING EDGE INTERRUPT */ +__sbit __at 0x8D CP0RIF ; /* COMPARATOR 0 RISING EDGE INTERRUPT */ +__sbit __at 0x8E CP0OUT ; /* COMPARATOR 0 OUTPUT */ +__sbit __at 0x8F CP0EN ; /* COMPARATOR 0 ENABLE */ + +/* CPT1CN 0x88 */ +__sbit __at 0x88 CP1HYN0 ; /* COMPARATOR 1 NEGATIVE HYSTERESIS 0 */ +__sbit __at 0x89 CP1HYN1 ; /* COMPARATOR 1 NEGATIVE HYSTERESIS 1 */ +__sbit __at 0x8A CP1HYP0 ; /* COMPARATOR 1 POSITIVE HYSTERESIS 0 */ +__sbit __at 0x8B CP1HYP1 ; /* COMPARATOR 1 POSITIVE HYSTERESIS 1 */ +__sbit __at 0x8C CP1FIF ; /* COMPARATOR 1 FALLING EDGE INTERRUPT */ +__sbit __at 0x8D CP1RIF ; /* COMPARATOR 1 RISING EDGE INTERRUPT */ +__sbit __at 0x8E CP1OUT ; /* COMPARATOR 1 OUTPUT */ +__sbit __at 0x8F CP1EN ; /* COMPARATOR 1 ENABLE */ + +/* CPT2CN 0x88 */ +__sbit __at 0x88 CP2HYN0 ; /* COMPARATOR 2 NEGATIVE HYSTERESIS 0 */ +__sbit __at 0x89 CP2HYN1 ; /* COMPARATOR 2 NEGATIVE HYSTERESIS 1 */ +__sbit __at 0x8A CP2HYP0 ; /* COMPARATOR 2 POSITIVE HYSTERESIS 0 */ +__sbit __at 0x8B CP2HYP1 ; /* COMPARATOR 2 POSITIVE HYSTERESIS 1 */ +__sbit __at 0x8C CP2FIF ; /* COMPARATOR 2 FALLING EDGE INTERRUPT */ +__sbit __at 0x8D CP2RIF ; /* COMPARATOR 2 RISING EDGE INTERRUPT */ +__sbit __at 0x8E CP2OUT ; /* COMPARATOR 2 OUTPUT */ +__sbit __at 0x8F CP2EN ; /* COMPARATOR 2 ENABLE */ + +/* P1 0x90 */ +__sbit __at 0x90 P1_0 ; +__sbit __at 0x91 P1_1 ; +__sbit __at 0x92 P1_2 ; +__sbit __at 0x93 P1_3 ; +__sbit __at 0x94 P1_4 ; +__sbit __at 0x95 P1_5 ; +__sbit __at 0x96 P1_6 ; +__sbit __at 0x97 P1_7 ; + +/* SCON0 0x98 */ +__sbit __at 0x98 RI0 ; /* UART 0 RX INTERRUPT FLAG */ +__sbit __at 0x98 RI ; /* UART 0 RX INTERRUPT FLAG */ +__sbit __at 0x99 TI0 ; /* UART 0 TX INTERRUPT FLAG */ +__sbit __at 0x99 TI ; /* UART 0 TX INTERRUPT FLAG */ +__sbit __at 0x9A RB80 ; /* UART 0 RX BIT 8 */ +__sbit __at 0x9B TB80 ; /* UART 0 TX BIT 8 */ +__sbit __at 0x9C REN0 ; /* UART 0 RX ENABLE */ +__sbit __at 0x9C REN ; /* UART 0 RX ENABLE */ +__sbit __at 0x9D SM20 ; /* UART 0 MULTIPROCESSOR EN */ +__sbit __at 0x9E SM10 ; /* UART 0 MODE 1 */ +__sbit __at 0x9F SM00 ; /* UART 0 MODE 0 */ + +/* SCON1 0x98 */ +__sbit __at 0x98 RI1 ; /* UART 1 RX INTERRUPT FLAG */ +__sbit __at 0x99 TI1 ; /* UART 1 TX INTERRUPT FLAG */ +__sbit __at 0x9A RB81 ; /* UART 1 RX BIT 8 */ +__sbit __at 0x9B TB81 ; /* UART 1 TX BIT 8 */ +__sbit __at 0x9C REN1 ; /* UART 1 RX ENABLE */ +__sbit __at 0x9D MCE1 ; /* UART 1 MCE */ +__sbit __at 0x9F S1MODE ; /* UART 1 MODE */ + +/* P2 0xA0 */ +__sbit __at 0xA0 P2_0 ; +__sbit __at 0xA1 P2_1 ; +__sbit __at 0xA2 P2_2 ; +__sbit __at 0xA3 P2_3 ; +__sbit __at 0xA4 P2_4 ; +__sbit __at 0xA5 P2_5 ; +__sbit __at 0xA6 P2_6 ; +__sbit __at 0xA7 P2_7 ; + +/* IE 0xA8 */ +__sbit __at 0xA8 EX0 ; /* EXTERNAL INTERRUPT 0 ENABLE */ +__sbit __at 0xA9 ET0 ; /* TIMER 0 INTERRUPT ENABLE */ +__sbit __at 0xAA EX1 ; /* EXTERNAL INTERRUPT 1 ENABLE */ +__sbit __at 0xAB ET1 ; /* TIMER 1 INTERRUPT ENABLE */ +__sbit __at 0xAC ES0 ; /* UART0 INTERRUPT ENABLE */ +__sbit __at 0xAC ES ; /* UART0 INTERRUPT ENABLE */ +__sbit __at 0xAD ET2 ; /* TIMER 2 INTERRUPT ENABLE */ +__sbit __at 0xAF EA ; /* GLOBAL INTERRUPT ENABLE */ + +/* P3 0xB0 */ +__sbit __at 0xB0 P3_0 ; +__sbit __at 0xB1 P3_1 ; +__sbit __at 0xB2 P3_2 ; +__sbit __at 0xB3 P3_3 ; +__sbit __at 0xB4 P3_4 ; +__sbit __at 0xB5 P3_5 ; +__sbit __at 0xB6 P3_6 ; +__sbit __at 0xB7 P3_7 ; + +/* IP 0xB8 */ +__sbit __at 0xB8 PX0 ; /* EXTERNAL INTERRUPT 0 PRIORITY */ +__sbit __at 0xB9 PT0 ; /* TIMER 0 PRIORITY */ +__sbit __at 0xBA PX1 ; /* EXTERNAL INTERRUPT 1 PRIORITY */ +__sbit __at 0xBB PT1 ; /* TIMER 1 PRIORITY */ +__sbit __at 0xBC PS0 ; /* SERIAL PORT PRIORITY */ +__sbit __at 0xBC PS ; /* SERIAL PORT PRIORITY */ +__sbit __at 0xBD PT2 ; /* TIMER 2 PRIORITY */ + +/* SMB0CN 0xC0 */ +__sbit __at 0xC0 SMBTOE ; /* SMBUS 0 TIMEOUT ENABLE */ +__sbit __at 0xC1 SMBFTE ; /* SMBUS 0 FREE TIMER ENABLE */ +__sbit __at 0xC2 AA ; /* SMBUS 0 ASSERT/ACKNOWLEDGE FLAG */ +__sbit __at 0xC3 SI ; /* SMBUS 0 INTERRUPT PENDING FLAG */ +__sbit __at 0xC4 STO ; /* SMBUS 0 STOP FLAG */ +__sbit __at 0xC5 STA ; /* SMBUS 0 START FLAG */ +__sbit __at 0xC6 ENSMB ; /* SMBUS 0 ENABLE */ +__sbit __at 0xC7 BUSY ; /* SMBUS 0 BUSY */ + +/* CAN0STA 0xC0 */ +__sbit __at 0xC3 CANTXOK ; /* CAN TRANSMITTED A MESSAGE SUCCESSFULLY */ +__sbit __at 0xC4 CANRXOK ; /* CAN RECEIVED A MESSAGE SUCCESSFULLY */ +__sbit __at 0xC5 CANEPASS; /* CAN ERROR PASSIVE */ +__sbit __at 0xC6 CANEWARN; /* CAN WARNING STATUS */ +__sbit __at 0xC7 CANBOFF ; /* CAN BUSOFF STATUS */ + +/* TMR2CN 0xC8 */ +__sbit __at 0xC8 CPRL2 ; /* TIMER 2 CAPTURE SELECT */ +__sbit __at 0xC9 CT2 ; /* TIMER 2 COUNTER SELECT */ +__sbit __at 0xCA TR2 ; /* TIMER 2 ON/OFF CONTROL */ +__sbit __at 0xCB EXEN2 ; /* TIMER 2 EXTERNAL ENABLE FLAG */ +__sbit __at 0xCE EXF2 ; /* TIMER 2 EXTERNAL FLAG */ +__sbit __at 0xCF TF2 ; /* TIMER 2 OVERFLOW FLAG */ + +/* TMR3CN 0xC8 */ +__sbit __at 0xC8 CPRL3 ; /* TIMER 3 CAPTURE SELECT */ +__sbit __at 0xC9 CT3 ; /* TIMER 3 COUNTER SELECT */ +__sbit __at 0xCA TR3 ; /* TIMER 3 ON/OFF CONTROL */ +__sbit __at 0xCB EXEN3 ; /* TIMER 3 EXTERNAL ENABLE FLAG */ +__sbit __at 0xCE EXF3 ; /* TIMER 3 EXTERNAL FLAG */ +__sbit __at 0xCF TF3 ; /* TIMER 3 OVERFLOW FLAG */ + +/* TMR4CN 0xC8 */ +__sbit __at 0xC8 CPRL4 ; /* TIMER 4 CAPTURE SELECT */ +__sbit __at 0xC9 CT4 ; /* TIMER 4 COUNTER SELECT */ +__sbit __at 0xCA TR4 ; /* TIMER 4 ON/OFF CONTROL */ +__sbit __at 0xCB EXEN4 ; /* TIMER 4 EXTERNAL ENABLE FLAG */ +__sbit __at 0xCE EXF4 ; /* TIMER 4 EXTERNAL FLAG */ +__sbit __at 0xCF TF4 ; /* TIMER 4 OVERFLOW FLAG */ + +/* P4 0xC8 */ +__sbit __at 0xC8 P4_0 ; +__sbit __at 0xC9 P4_1 ; +__sbit __at 0xCA P4_2 ; +__sbit __at 0xCB P4_3 ; +__sbit __at 0xCC P4_4 ; +__sbit __at 0xCD P4_5 ; +__sbit __at 0xCE P4_6 ; +__sbit __at 0xCF P4_7 ; + +/* PSW 0xD0 */ +__sbit __at 0xD0 P ; /* ACCUMULATOR PARITY FLAG */ +__sbit __at 0xD1 F1 ; /* USER FLAG 1 */ +__sbit __at 0xD2 OV ; /* OVERFLOW FLAG */ +__sbit __at 0xD3 RS0 ; /* REGISTER BANK SELECT 0 */ +__sbit __at 0xD4 RS1 ; /* REGISTER BANK SELECT 1 */ +__sbit __at 0xD5 F0 ; /* USER FLAG 0 */ +__sbit __at 0xD6 AC ; /* AUXILIARY CARRY FLAG */ +__sbit __at 0xD7 CY ; /* CARRY FLAG */ + +/* PCA0CN 0xD8 */ +__sbit __at 0xD8 CCF0 ; /* PCA 0 MODULE 0 INTERRUPT FLAG */ +__sbit __at 0xD9 CCF1 ; /* PCA 0 MODULE 1 INTERRUPT FLAG */ +__sbit __at 0xDA CCF2 ; /* PCA 0 MODULE 2 INTERRUPT FLAG */ +__sbit __at 0xDB CCF3 ; /* PCA 0 MODULE 3 INTERRUPT FLAG */ +__sbit __at 0xDC CCF4 ; /* PCA 0 MODULE 4 INTERRUPT FLAG */ +__sbit __at 0xDD CCF5 ; /* PCA 0 MODULE 5 INTERRUPT FLAG */ +__sbit __at 0xDE CR ; /* PCA 0 COUNTER RUN CONTROL BIT */ +__sbit __at 0xDF CF ; /* PCA 0 COUNTER OVERFLOW FLAG */ + +/* P5 0xD8 */ +__sbit __at 0xD8 P5_0 ; +__sbit __at 0xD9 P5_1 ; +__sbit __at 0xDA P5_2 ; +__sbit __at 0xDB P5_3 ; +__sbit __at 0xDC P5_4 ; +__sbit __at 0xDD P5_5 ; +__sbit __at 0xDE P5_6 ; +__sbit __at 0xDF P5_7 ; + +/* ADC0CN 0xE8 */ +__sbit __at 0xE8 AD0LJST ; /* ADC 0 RIGHT JUSTIFY DATA BIT */ +__sbit __at 0xE9 AD0WINT ; /* ADC 0 WINDOW INTERRUPT FLAG */ +__sbit __at 0xEA AD0CM0 ; /* ADC 0 CONVERT START MODE BIT 0 */ +__sbit __at 0xEB AD0CM1 ; /* ADC 0 CONVERT START MODE BIT 1 */ +__sbit __at 0xEC AD0BUSY ; /* ADC 0 BUSY FLAG */ +__sbit __at 0xED AD0INT ; /* ADC 0 EOC INTERRUPT FLAG */ +__sbit __at 0xEE AD0TM ; /* ADC 0 TRACK MODE */ +__sbit __at 0xEF AD0EN ; /* ADC 0 ENABLE */ + +/* ADC2CN 0xE8 */ +__sbit __at 0xE8 AD2WINT ; /* ADC 2 WINDOW INTERRUPT FLAG */ +__sbit __at 0xE9 AD2CM0 ; /* ADC 2 CONVERT START MODE BIT 0 */ +__sbit __at 0xEA AD2CM1 ; /* ADC 2 CONVERT START MODE BIT 1 */ +__sbit __at 0xEB AD2CM2 ; /* ADC 2 CONVERT START MODE BIT 2 */ +__sbit __at 0xEC AD2BUSY ; /* ADC 2 BUSY FLAG */ +__sbit __at 0xED AD2INT ; /* ADC 2 EOC INTERRUPT FLAG */ +__sbit __at 0xEE AD2TM ; /* ADC 2 TRACK MODE */ +__sbit __at 0xEF AD2EN ; /* ADC 2 ENABLE */ + +/* P6 0xE8 */ +__sbit __at 0xE8 P6_0 ; +__sbit __at 0xE9 P6_1 ; +__sbit __at 0xEA P6_2 ; +__sbit __at 0xEB P6_3 ; +__sbit __at 0xEC P6_4 ; +__sbit __at 0xED P6_5 ; +__sbit __at 0xEE P6_6 ; +__sbit __at 0xEF P6_7 ; + +/* SPI0CN 0xF8 */ +__sbit __at 0xF8 SPIEN ; /* SPI 0 SPI ENABLE */ +__sbit __at 0xF9 TXBMT ; /* SPI 0 TX BUFFER EMPTY FLAG */ +__sbit __at 0xFA NSSMD0 ; /* SPI 0 SLAVE SELECT MODE 0 */ +__sbit __at 0xFB NSSMD1 ; /* SPI 0 SLAVE SELECT MODE 1 */ +__sbit __at 0xFC RXOVRN ; /* SPI 0 RX OVERRUN FLAG */ +__sbit __at 0xFD MODF ; /* SPI 0 MODE FAULT FLAG */ +__sbit __at 0xFE WCOL ; /* SPI 0 WRITE COLLISION FLAG */ +__sbit __at 0xFF SPIF ; /* SPI 0 INTERRUPT FLAG */ + +/* CAN0CN 0xF8 */ +__sbit __at 0xF8 CANINIT ; /* CAN INITIALIZATION */ +__sbit __at 0xF9 CANIE ; /* CAN MODULE INTERRUPT ENABLE */ +__sbit __at 0xFA CANSIE ; /* CAN STATUS CHANGE INTERRUPT ENABLE */ +__sbit __at 0xFB CANEIE ; /* CAN ERROR INTERRUPT ENABLE */ +__sbit __at 0xFC CANIF ; /* CAN INTERRUPT FLAG */ +__sbit __at 0xFD CANDAR ; /* CAN DISABLE AUTOMATIC RETRANSMISSION */ +__sbit __at 0xFE CANCCE ; /* CAN CONFIGURATION CHANGE ENABLE */ +__sbit __at 0xFF CANTEST ; /* CAN TEST MODE ENABLE */ + +/* P7 0xF8 */ +__sbit __at 0xF8 P7_0 ; +__sbit __at 0xF9 P7_1 ; +__sbit __at 0xFA P7_2 ; +__sbit __at 0xFB P7_3 ; +__sbit __at 0xFC P7_4 ; +__sbit __at 0xFD P7_5 ; +__sbit __at 0xFE P7_6 ; +__sbit __at 0xFF P7_7 ; + + +/* Predefined SFR Bit Masks */ + +#define IDLE 0x01 /* PCON */ +#define STOP 0x02 /* PCON */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ + + +/* SFR PAGE DEFINITIONS */ + +#define CONFIG_PAGE 0x0F /* SYSTEM AND PORT CONFIGURATION PAGE */ +#define LEGACY_PAGE 0x00 /* LEGACY SFR PAGE */ +#define TIMER01_PAGE 0x00 /* TIMER 0 AND TIMER 1 */ +#define CPT0_PAGE 0x01 /* COMPARATOR 0 */ +#define CPT1_PAGE 0x02 /* COMPARATOR 1 */ +#define CPT2_PAGE 0x03 /* COMPARATOR 2 */ +#define UART0_PAGE 0x00 /* UART 0 */ +#define UART1_PAGE 0x01 /* UART 1 */ +#define SPI0_PAGE 0x00 /* SPI 0 */ +#define EMI0_PAGE 0x00 /* EXTERNAL MEMORY INTERFACE */ +#define ADC0_PAGE 0x00 /* ADC 0 */ +#define ADC2_PAGE 0x02 /* ADC 2 */ +#define SMB0_PAGE 0x00 /* SMBUS 0 */ +#define TMR2_PAGE 0x00 /* TIMER 2 */ +#define TMR3_PAGE 0x01 /* TIMER 3 */ +#define TMR4_PAGE 0x02 /* TIMER 4 */ +#define DAC0_PAGE 0x00 /* DAC 0 */ +#define DAC1_PAGE 0x01 /* DAC 1 */ +#define PCA0_PAGE 0x00 /* PCA 0 */ +#define CAN0_PAGE 0x01 /* CAN 0 */ + +#endif diff --git a/device/include/mcs51/C8051F060.h b/device/include/mcs51/C8051F060.h new file mode 100644 index 0000000..a366e94 --- /dev/null +++ b/device/include/mcs51/C8051F060.h @@ -0,0 +1,551 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Cygnal/SiLabs C8051F06x Processor Range + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051F060_H +#define C8051F060_H + + +/* BYTE Registers */ + +/* All Pages */ +__sfr __at 0x80 P0 ; /* PORT 0 */ +__sfr __at 0x81 SP ; /* STACK POINTER */ +__sfr __at 0x82 DPL ; /* DATA POINTER - LOW BYTE */ +__sfr __at 0x83 DPH ; /* DATA POINTER - HIGH BYTE */ +__sfr __at 0x84 SFRPAGE ; /* SFR PAGE SELECT */ +__sfr __at 0x85 SFRNEXT ; /* SFR STACK NEXT PAGE */ +__sfr __at 0x86 SFRLAST ; /* SFR STACK LAST PAGE */ +__sfr __at 0x87 PCON ; /* POWER CONTROL */ +__sfr __at 0x90 P1 ; /* PORT 1 */ +__sfr __at 0xA0 P2 ; /* PORT 2 */ +__sfr __at 0xA8 IE ; /* INTERRUPT ENABLE */ +__sfr __at 0xB0 P3 ; /* PORT 3 */ +__sfr __at 0xB8 IP ; /* INTERRUPT PRIORITY */ +__sfr __at 0xD0 PSW ; /* PROGRAM STATUS WORD */ +__sfr __at 0xE0 ACC ; /* ACCUMULATOR */ +__sfr __at 0xE6 EIE1 ; /* EXTERNAL INTERRUPT ENABLE 1 */ +__sfr __at 0xE7 EIE2 ; /* EXTERNAL INTERRUPT ENABLE 2 */ +__sfr __at 0xF0 B ; /* B REGISTER */ +__sfr __at 0xF6 EIP1 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +__sfr __at 0xF7 EIP2 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 2 */ +__sfr __at 0xFF WDTCN ; /* WATCHDOG TIMER CONTROL */ + +/* Page 0x00 */ +__sfr __at 0x88 TCON ; /* TIMER CONTROL */ +__sfr __at 0x89 TMOD ; /* TIMER MODE */ +__sfr __at 0x8A TL0 ; /* TIMER 0 - LOW BYTE */ +__sfr __at 0x8B TL1 ; /* TIMER 1 - LOW BYTE */ +__sfr __at 0x8C TH0 ; /* TIMER 0 - HIGH BYTE */ +__sfr __at 0x8D TH1 ; /* TIMER 1 - HIGH BYTE */ +__sfr __at 0x8E CKCON ; /* TIMER 0/1 CLOCK CONTROL */ +__sfr __at 0x8F PSCTL ; /* FLASH WRITE/ERASE CONTROL */ +__sfr __at 0x91 SSTA0 ; /* UART 0 STATUS */ +__sfr __at 0x98 SCON0 ; /* UART 0 CONTROL */ +__sfr __at 0x98 SCON ; /* UART 0 CONTROL */ +__sfr __at 0x99 SBUF0 ; /* UART 0 BUFFER */ +__sfr __at 0x99 SBUF ; /* UART 0 BUFFER */ +__sfr __at 0x9A SPI0CFG ; /* SPI 0 CONFIGURATION */ +__sfr __at 0x9B SPI0DAT ; /* SPI 0 DATA */ +__sfr __at 0x9D SPI0CKR ; /* SPI 0 CLOCK RATE CONTROL */ +__sfr __at 0xA1 EMI0TC ; /* EMIF TIMING CONTROL */ +__sfr __at 0xA2 EMI0CN ; /* EMIF CONTROL */ +__sfr __at 0xA2 _XPAGE ; /* XDATA/PDATA PAGE */ +__sfr __at 0xA3 EMI0CF ; /* EMIF CONFIGURATION */ +__sfr __at 0xA9 SADDR0 ; /* UART 0 SLAVE ADDRESS */ +__sfr __at 0xB7 FLSCL ; /* FLASH SCALE */ +__sfr __at 0xB9 SADEN0 ; /* UART 0 SLAVE ADDRESS MASK */ +__sfr __at 0xBB AMX0SL ; /* ADC 0 MUX CHANNEL SELECTION */ +__sfr __at 0xBC ADC0CF ; /* ADC 0 CONFIGURATION */ +__sfr __at 0xBE ADC0L ; /* ADC 0 DATA - LOW BYTE */ +__sfr __at 0xBF ADC0H ; /* ADC 0 DATA - HIGH BYTE */ +__sfr __at 0xC0 SMB0CN ; /* SMBUS 0 CONTROL */ +__sfr __at 0xC1 SMB0STA ; /* SMBUS 0 STATUS */ +__sfr __at 0xC2 SMB0DAT ; /* SMBUS 0 DATA */ +__sfr __at 0xC3 SMB0ADR ; /* SMBUS 0 SLAVE ADDRESS */ +__sfr __at 0xC4 ADC0GTL ; /* ADC 0 GREATER-THAN REGISTER - LOW BYTE */ +__sfr __at 0xC5 ADC0GTH ; /* ADC 0 GREATER-THAN REGISTER - HIGH BYTE */ +__sfr __at 0xC6 ADC0LTL ; /* ADC 0 LESS-THAN REGISTER - LOW BYTE */ +__sfr __at 0xC7 ADC0LTH ; /* ADC 0 LESS-THAN REGISTER - HIGH BYTE */ +__sfr __at 0xC8 TMR2CN ; /* TIMER 2 CONTROL */ +__sfr __at 0xC9 TMR2CF ; /* TIMER 2 CONFIGURATION */ +__sfr __at 0xCA RCAP2L ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at 0xCB RCAP2H ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at 0xCC TMR2L ; /* TIMER 2 - LOW BYTE */ +__sfr __at 0xCC TL2 ; /* TIMER 2 - LOW BYTE */ +__sfr __at 0xCD TMR2H ; /* TIMER 2 - HIGH BYTE */ +__sfr __at 0xCD TH2 ; /* TIMER 2 - HIGH BYTE */ +__sfr __at 0xCF SMB0CR ; /* SMBUS 0 CLOCK RATE */ +__sfr __at 0xD1 REF0CN ; /* VOLTAGE REFERENCE 0 CONTROL */ +__sfr __at 0xD2 DAC0L ; /* DAC 0 REGISTER - LOW BYTE */ +__sfr __at 0xD3 DAC0H ; /* DAC 0 REGISTER - HIGH BYTE */ +__sfr __at 0xD4 DAC0CN ; /* DAC 0 CONTROL */ +__sfr __at 0xD8 PCA0CN ; /* PCA 0 COUNTER CONTROL */ +__sfr __at 0xD9 PCA0MD ; /* PCA 0 COUNTER MODE */ +__sfr __at 0xDA PCA0CPM0 ; /* PCA 0 MODULE 0 CONTROL */ +__sfr __at 0xDB PCA0CPM1 ; /* PCA 0 MODULE 1 CONTROL */ +__sfr __at 0xDC PCA0CPM2 ; /* PCA 0 MODULE 2 CONTROL */ +__sfr __at 0xDD PCA0CPM3 ; /* PCA 0 MODULE 3 CONTROL */ +__sfr __at 0xDE PCA0CPM4 ; /* PCA 0 MODULE 4 CONTROL */ +__sfr __at 0xDF PCA0CPM5 ; /* PCA 0 MODULE 5 CONTROL */ +__sfr __at 0xE1 PCA0CPL5 ; /* PCA 0 MODULE 5 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at 0xE2 PCA0CPH5 ; /* PCA 0 MODULE 5 CAPTURE/COMPARE - HIGH BYTE */ +__sfr __at 0xE8 ADC0CN ; /* ADC 0 CONTROL */ +__sfr __at 0xE9 PCA0CPL2 ; /* PCA 0 MODULE 2 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at 0xEA PCA0CPH2 ; /* PCA 0 MODULE 2 CAPTURE/COMPARE - HIGH BYTE */ +__sfr __at 0xEB PCA0CPL3 ; /* PCA 0 MODULE 3 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at 0xEC PCA0CPH3 ; /* PCA 0 MODULE 3 CAPTURE/COMPARE - HIGH BYTE */ +__sfr __at 0xED PCA0CPL4 ; /* PCA 0 MODULE 4 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at 0xEE PCA0CPH4 ; /* PCA 0 MODULE 4 CAPTURE/COMPARE - HIGH BYTE */ +__sfr __at 0xEF RSTSRC ; /* RESET SOURCE */ +__sfr __at 0xF8 SPI0CN ; /* SPI 0 CONTROL */ +__sfr __at 0xF9 PCA0L ; /* PCA 0 TIMER - LOW BYTE */ +__sfr __at 0xFA PCA0H ; /* PCA 0 TIMER - HIGH BYTE */ +__sfr __at 0xFB PCA0CPL0 ; /* PCA 0 MODULE 0 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at 0xFC PCA0CPH0 ; /* PCA 0 MODULE 0 CAPTURE/COMPARE - HIGH BYTE */ +__sfr __at 0xFD PCA0CPL1 ; /* PCA 0 MODULE 1 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at 0xFE PCA0CPH1 ; /* PCA 0 MODULE 1 CAPTURE/COMPARE - HIGH BYTE */ + +/* Page 0x01 */ +__sfr __at 0x88 CPT0CN ; /* COMPARATOR 0 CONTROL */ +__sfr __at 0x89 CPT0MD ; /* COMPARATOR 0 CONFIGURATION */ +__sfr __at 0x98 SCON1 ; /* UART 1 CONTROL */ +__sfr __at 0x99 SBUF1 ; /* UART 1 BUFFER */ +__sfr __at 0xBC ADC1CF ; /* ADC 1 CONFIGURATION */ +__sfr __at 0xBE ADC1L ; /* ADC 1 DATA - LOW BYTE */ +__sfr __at 0xBF ADC1H ; /* ADC 1 DATA - HIGH BYTE */ +__sfr __at 0xC0 CAN0STA ; /* CAN 0 STATUS */ +__sfr __at 0xC8 TMR3CN ; /* TIMER 3 CONTROL */ +__sfr __at 0xC9 TMR3CF ; /* TIMER 3 CONFIGURATION */ +__sfr __at 0xCA RCAP3L ; /* TIMER 3 CAPTURE REGISTER - LOW BYTE */ +__sfr __at 0xCB RCAP3H ; /* TIMER 3 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at 0xCC TMR3L ; /* TIMER 3 - LOW BYTE */ +__sfr __at 0xCD TMR3H ; /* TIMER 3 - HIGH BYTE */ +__sfr __at 0xD1 REF1CN ; /* VOLTAGE REFERENCE 1 CONTROL */ +__sfr __at 0xD2 DAC1L ; /* DAC 1 REGISTER - LOW BYTE */ +__sfr __at 0xD3 DAC1H ; /* DAC 1 REGISTER - HIGH BYTE */ +__sfr __at 0xD4 DAC1CN ; /* DAC 1 CONTROL */ +__sfr __at 0xD8 CAN0DATL ; /* CAN 0 DATA REGISTER LOW */ +__sfr __at 0xD9 CAN0DATH ; /* CAN 0 DATA REGISTER HIGH */ +__sfr __at 0xDA CAN0ADR ; /* CAN 0 ADDRESS */ +__sfr __at 0xDB CAN0TST ; /* CAN 0 TEST REGISTER */ +__sfr __at 0xE8 ADC1CN ; /* ADC 1 CONTROL */ +__sfr __at 0xF8 CAN0CN ; /* CAN 0 CONTROL */ + +/* Page 0x02 */ +__sfr __at 0x88 CPT1CN ; /* COMPARATOR 1 CONTROL */ +__sfr __at 0x89 CPT1MD ; /* COMPARATOR 1 CONFIGURATION */ +__sfr __at 0xBA AMX2CF ; /* ADC 2 MUX CONFIGURATION */ +__sfr __at 0xBB AMX2SL ; /* ADC 2 MUX CHANNEL SELECTION */ +__sfr __at 0xBC ADC2CF ; /* ADC 2 CONFIGURATION */ +__sfr __at 0xBE ADC2L ; /* ADC 2 DATA - LOW BYTE */ +__sfr __at 0xBF ADC2H ; /* ADC 2 DATA - HIGH BYTE */ +__sfr __at 0xC4 ADC2GTL ; /* ADC 2 GREATER-THAN REGISTER - LOW BYTE */ +__sfr __at 0xC5 ADC2GTH ; /* ADC 2 GREATER-THAN REGISTER - HIGH BYTE */ +__sfr __at 0xC6 ADC2LTL ; /* ADC 2 LESS-THAN REGISTER - LOW BYTE */ +__sfr __at 0xC7 ADC2LTH ; /* ADC 2 LESS-THAN REGISTER - HIGH BYTE */ +__sfr __at 0xC8 TMR4CN ; /* TIMER 4 CONTROL */ +__sfr __at 0xC9 TMR4CF ; /* TIMER 4 CONFIGURATION */ +__sfr __at 0xCA RCAP4L ; /* TIMER 4 CAPTURE REGISTER - LOW BYTE */ +__sfr __at 0xCB RCAP4H ; /* TIMER 4 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at 0xCC TMR4L ; /* TIMER 4 - LOW BYTE */ +__sfr __at 0xCD TMR4H ; /* TIMER 4 - HIGH BYTE */ +__sfr __at 0xD1 REF2CN ; /* VOLTAGE REFERENCE 2 CONTROL */ +__sfr __at 0xE8 ADC2CN ; /* ADC 2 CONTROL */ + +/* Page 0x03 */ +__sfr __at 0x88 CPT2CN ; /* COMPARATOR 2 CONTROL */ +__sfr __at 0x89 CPT2MD ; /* COMPARATOR 2 CONFIGURATION */ +__sfr __at 0xD8 DMA0CN ; /* DMA0 CONTROL */ +__sfr __at 0xD9 DMA0DAL ; /* DMA0 DATA ADDRESS BEGINNING LOW BYTE */ +__sfr __at 0xDA DMA0DAH ; /* DMA0 DATA ADDRESS BEGINNING HIGH BYTE */ +__sfr __at 0xDB DMA0DSL ; /* DMA0 DATA ADDRESS POINTER LOW BYTE */ +__sfr __at 0xDC DMA0DSH ; /* DMA0 DATA ADDRESS POINTER HIGH BYTE */ +__sfr __at 0xDD DMA0IPT ; /* DMA0 INSTRUCTION WRITE ADDRESS */ +__sfr __at 0xDE DMA0IDT ; /* DMA0 INSTRUCTION WRITE DATA */ +__sfr __at 0xF8 DMA0CF ; /* DMA0 CONFIGURATION */ +__sfr __at 0xF9 DMA0CTL ; /* DMA0 REPEAT COUNTER LIMIT LOW BYTE */ +__sfr __at 0xFA DMA0CTH ; /* DMA0 REPEAT COUNTER LIMIT HIGH BYTE */ +__sfr __at 0xFB DMA0CSL ; /* DMA0 REPEAT COUNTER STATUS LOW BYTE */ +__sfr __at 0xFC DMA0CSH ; /* DMA0 REPEAT COUNTER STATUS HIGH BYTE */ +__sfr __at 0xFD DMA0BND ; /* DMA0 INSTRUCTION BOUNDARY */ +__sfr __at 0xFE DMA0ISW ; /* DMA0 INSTRUCTION STATUS */ + +/* Page 0x0F */ +__sfr __at 0x8A OSCICN ; /* INTERNAL OSCILLATOR CONTROL */ +__sfr __at 0x8B OSCICL ; /* INTERNAL OSCILLATOR CALIBRATION */ +__sfr __at 0x8C OSCXCN ; /* EXTERNAL OSCILLATOR CONTROL */ +__sfr __at 0x96 SFRPGCN ; /* SFR PAGE CONTROL */ +__sfr __at 0x97 CLKSEL ; /* SYSTEM CLOCK SELECT */ +__sfr __at 0x9C P4MDOUT ; /* PORT 4 OUTPUT MODE */ +__sfr __at 0x9D P5MDOUT ; /* PORT 5 OUTPUT MODE */ +__sfr __at 0x9E P6MDOUT ; /* PORT 6 OUTPUT MODE */ +__sfr __at 0x9F P7MDOUT ; /* PORT 7 OUTPUT MODE */ +__sfr __at 0xA4 P0MDOUT ; /* PORT 0 OUTPUT MODE */ +__sfr __at 0xA5 P1MDOUT ; /* PORT 1 OUTPUT MODE */ +__sfr __at 0xA6 P2MDOUT ; /* PORT 2 OUTPUT MODE CONFIGURATION */ +__sfr __at 0xA7 P3MDOUT ; /* PORT 3 OUTPUT MODE CONFIGURATION */ +__sfr __at 0xAD P1MDIN ; /* PORT 1 INPUT MODE */ +__sfr __at 0xAE P2MDIN ; /* PORT 2 INPUT MODE */ +__sfr __at 0xB7 FLACL ; /* FLASH ACCESS LIMIT */ +__sfr __at 0xBA ADC0CPT ; /* ADC0 CALIBRATION POINTER */ +__sfr __at 0xBB ADC0CCF ; /* ADC0 CALIBRATION COEFFICIENT */ +__sfr __at 0xC8 P4 ; /* PORT 4 */ +__sfr __at 0xD8 P5 ; /* PORT 5 */ +__sfr __at 0xE1 XBR0 ; /* CROSSBAR CONFIGURATION REGISTER 0 */ +__sfr __at 0xE2 XBR1 ; /* CROSSBAR CONFIGURATION REGISTER 1 */ +__sfr __at 0xE3 XBR2 ; /* CROSSBAR CONFIGURATION REGISTER 2 */ +__sfr __at 0xE4 XBR3 ; /* CROSSBAR CONFIGURATION REGISTER 3 */ +__sfr __at 0xE8 P6 ; /* PORT 6 */ +__sfr __at 0xF8 P7 ; /* PORT 7 */ + + +/* BIT Registers */ + +/* P0 0x80 */ +__sbit __at 0x80 P0_0 ; +__sbit __at 0x81 P0_1 ; +__sbit __at 0x82 P0_2 ; +__sbit __at 0x83 P0_3 ; +__sbit __at 0x84 P0_4 ; +__sbit __at 0x85 P0_5 ; +__sbit __at 0x86 P0_6 ; +__sbit __at 0x87 P0_7 ; + +/* TCON 0x88 */ +__sbit __at 0x88 IT0 ; /* EXT. INTERRUPT 0 TYPE */ +__sbit __at 0x89 IE0 ; /* EXT. INTERRUPT 0 EDGE FLAG */ +__sbit __at 0x8A IT1 ; /* EXT. INTERRUPT 1 TYPE */ +__sbit __at 0x8B IE1 ; /* EXT. INTERRUPT 1 EDGE FLAG */ +__sbit __at 0x8C TR0 ; /* TIMER 0 ON/OFF CONTROL */ +__sbit __at 0x8D TF0 ; /* TIMER 0 OVERFLOW FLAG */ +__sbit __at 0x8E TR1 ; /* TIMER 1 ON/OFF CONTROL */ +__sbit __at 0x8F TF1 ; /* TIMER 1 OVERFLOW FLAG */ + +/* CPT0CN 0x88 */ +__sbit __at 0x88 CP0HYN0 ; /* COMPARATOR 0 NEGATIVE HYSTERESIS 0 */ +__sbit __at 0x89 CP0HYN1 ; /* COMPARATOR 0 NEGATIVE HYSTERESIS 1 */ +__sbit __at 0x8A CP0HYP0 ; /* COMPARATOR 0 POSITIVE HYSTERESIS 0 */ +__sbit __at 0x8B CP0HYP1 ; /* COMPARATOR 0 POSITIVE HYSTERESIS 1 */ +__sbit __at 0x8C CP0FIF ; /* COMPARATOR 0 FALLING EDGE INTERRUPT */ +__sbit __at 0x8D CP0RIF ; /* COMPARATOR 0 RISING EDGE INTERRUPT */ +__sbit __at 0x8E CP0OUT ; /* COMPARATOR 0 OUTPUT */ +__sbit __at 0x8F CP0EN ; /* COMPARATOR 0 ENABLE */ + +/* CPT1CN 0x88 */ +__sbit __at 0x88 CP1HYN0 ; /* COMPARATOR 1 NEGATIVE HYSTERESIS 0 */ +__sbit __at 0x89 CP1HYN1 ; /* COMPARATOR 1 NEGATIVE HYSTERESIS 1 */ +__sbit __at 0x8A CP1HYP0 ; /* COMPARATOR 1 POSITIVE HYSTERESIS 0 */ +__sbit __at 0x8B CP1HYP1 ; /* COMPARATOR 1 POSITIVE HYSTERESIS 1 */ +__sbit __at 0x8C CP1FIF ; /* COMPARATOR 1 FALLING EDGE INTERRUPT */ +__sbit __at 0x8D CP1RIF ; /* COMPARATOR 1 RISING EDGE INTERRUPT */ +__sbit __at 0x8E CP1OUT ; /* COMPARATOR 1 OUTPUT */ +__sbit __at 0x8F CP1EN ; /* COMPARATOR 1 ENABLE */ + +/* CPT2CN 0x88 */ +__sbit __at 0x88 CP2HYN0 ; /* COMPARATOR 2 NEGATIVE HYSTERESIS 0 */ +__sbit __at 0x89 CP2HYN1 ; /* COMPARATOR 2 NEGATIVE HYSTERESIS 1 */ +__sbit __at 0x8A CP2HYP0 ; /* COMPARATOR 2 POSITIVE HYSTERESIS 0 */ +__sbit __at 0x8B CP2HYP1 ; /* COMPARATOR 2 POSITIVE HYSTERESIS 1 */ +__sbit __at 0x8C CP2FIF ; /* COMPARATOR 2 FALLING EDGE INTERRUPT */ +__sbit __at 0x8D CP2RIF ; /* COMPARATOR 2 RISING EDGE INTERRUPT */ +__sbit __at 0x8E CP2OUT ; /* COMPARATOR 2 OUTPUT */ +__sbit __at 0x8F CP2EN ; /* COMPARATOR 2 ENABLE */ + +/* P1 0x90 */ +__sbit __at 0x90 P1_0 ; +__sbit __at 0x91 P1_1 ; +__sbit __at 0x92 P1_2 ; +__sbit __at 0x93 P1_3 ; +__sbit __at 0x94 P1_4 ; +__sbit __at 0x95 P1_5 ; +__sbit __at 0x96 P1_6 ; +__sbit __at 0x97 P1_7 ; + +/* SCON0 0x98 */ +__sbit __at 0x98 RI0 ; /* UART 0 RX INTERRUPT FLAG */ +__sbit __at 0x98 RI ; /* UART 0 RX INTERRUPT FLAG */ +__sbit __at 0x99 TI0 ; /* UART 0 TX INTERRUPT FLAG */ +__sbit __at 0x99 TI ; /* UART 0 TX INTERRUPT FLAG */ +__sbit __at 0x9A RB80 ; /* UART 0 RX BIT 8 */ +__sbit __at 0x9B TB80 ; /* UART 0 TX BIT 8 */ +__sbit __at 0x9C REN0 ; /* UART 0 RX ENABLE */ +__sbit __at 0x9C REN ; /* UART 0 RX ENABLE */ +__sbit __at 0x9D SM20 ; /* UART 0 MULTIPROCESSOR EN */ +__sbit __at 0x9E SM10 ; /* UART 0 MODE 1 */ +__sbit __at 0x9F SM00 ; /* UART 0 MODE 0 */ + +/* SCON1 0x98 */ +__sbit __at 0x98 RI1 ; /* UART 1 RX INTERRUPT FLAG */ +__sbit __at 0x99 TI1 ; /* UART 1 TX INTERRUPT FLAG */ +__sbit __at 0x9A RB81 ; /* UART 1 RX BIT 8 */ +__sbit __at 0x9B TB81 ; /* UART 1 TX BIT 8 */ +__sbit __at 0x9C REN1 ; /* UART 1 RX ENABLE */ +__sbit __at 0x9D MCE1 ; /* UART 1 MCE */ +__sbit __at 0x9F S1MODE ; /* UART 1 MODE */ + +/* P2 0xA0 */ +__sbit __at 0xA0 P2_0 ; +__sbit __at 0xA1 P2_1 ; +__sbit __at 0xA2 P2_2 ; +__sbit __at 0xA3 P2_3 ; +__sbit __at 0xA4 P2_4 ; +__sbit __at 0xA5 P2_5 ; +__sbit __at 0xA6 P2_6 ; +__sbit __at 0xA7 P2_7 ; + +/* IE 0xA8 */ +__sbit __at 0xA8 EX0 ; /* EXTERNAL INTERRUPT 0 ENABLE */ +__sbit __at 0xA9 ET0 ; /* TIMER 0 INTERRUPT ENABLE */ +__sbit __at 0xAA EX1 ; /* EXTERNAL INTERRUPT 1 ENABLE */ +__sbit __at 0xAB ET1 ; /* TIMER 1 INTERRUPT ENABLE */ +__sbit __at 0xAC ES0 ; /* UART0 INTERRUPT ENABLE */ +__sbit __at 0xAC ES ; /* UART0 INTERRUPT ENABLE */ +__sbit __at 0xAD ET2 ; /* TIMER 2 INTERRUPT ENABLE */ +__sbit __at 0xAF EA ; /* GLOBAL INTERRUPT ENABLE */ + +/* P3 0xB0 */ +__sbit __at 0xB0 P3_0 ; +__sbit __at 0xB1 P3_1 ; +__sbit __at 0xB2 P3_2 ; +__sbit __at 0xB3 P3_3 ; +__sbit __at 0xB4 P3_4 ; +__sbit __at 0xB5 P3_5 ; +__sbit __at 0xB6 P3_6 ; +__sbit __at 0xB7 P3_7 ; + +/* IP 0xB8 */ +__sbit __at 0xB8 PX0 ; /* EXTERNAL INTERRUPT 0 PRIORITY */ +__sbit __at 0xB9 PT0 ; /* TIMER 0 PRIORITY */ +__sbit __at 0xBA PX1 ; /* EXTERNAL INTERRUPT 1 PRIORITY */ +__sbit __at 0xBB PT1 ; /* TIMER 1 PRIORITY */ +__sbit __at 0xBC PS0 ; /* SERIAL PORT PRIORITY */ +__sbit __at 0xBC PS ; /* SERIAL PORT PRIORITY */ +__sbit __at 0xBD PT2 ; /* TIMER 2 PRIORITY */ + +/* SMB0CN 0xC0 */ +__sbit __at 0xC0 SMBTOE ; /* SMBUS 0 TIMEOUT ENABLE */ +__sbit __at 0xC1 SMBFTE ; /* SMBUS 0 FREE TIMER ENABLE */ +__sbit __at 0xC2 AA ; /* SMBUS 0 ASSERT/ACKNOWLEDGE FLAG */ +__sbit __at 0xC3 SI ; /* SMBUS 0 INTERRUPT PENDING FLAG */ +__sbit __at 0xC4 STO ; /* SMBUS 0 STOP FLAG */ +__sbit __at 0xC5 STA ; /* SMBUS 0 START FLAG */ +__sbit __at 0xC6 ENSMB ; /* SMBUS 0 ENABLE */ +__sbit __at 0xC7 BUSY ; /* SMBUS 0 BUSY */ + +/* CAN0STA 0xC0 */ +__sbit __at 0xC3 CANTXOK ; /* CAN TRANSMITTED A MESSAGE SUCCESSFULLY */ +__sbit __at 0xC4 CANRXOK ; /* CAN RECEIVED A MESSAGE SUCCESSFULLY */ +__sbit __at 0xC5 CANEPASS; /* CAN ERROR PASSIVE */ +__sbit __at 0xC6 CANEWARN; /* CAN WARNING STATUS */ +__sbit __at 0xC7 CANBOFF ; /* CAN BUSOFF STATUS */ + +/* TMR2CN 0xC8 */ +__sbit __at 0xC8 CPRL2 ; /* TIMER 2 CAPTURE SELECT */ +__sbit __at 0xC9 CT2 ; /* TIMER 2 COUNTER SELECT */ +__sbit __at 0xCA TR2 ; /* TIMER 2 ON/OFF CONTROL */ +__sbit __at 0xCB EXEN2 ; /* TIMER 2 EXTERNAL ENABLE FLAG */ +__sbit __at 0xCE EXF2 ; /* TIMER 2 EXTERNAL FLAG */ +__sbit __at 0xCF TF2 ; /* TIMER 2 OVERFLOW FLAG */ + +/* TMR3CN 0xC8 */ +__sbit __at 0xC8 CPRL3 ; /* TIMER 3 CAPTURE SELECT */ +__sbit __at 0xC9 CT3 ; /* TIMER 3 COUNTER SELECT */ +__sbit __at 0xCA TR3 ; /* TIMER 3 ON/OFF CONTROL */ +__sbit __at 0xCB EXEN3 ; /* TIMER 3 EXTERNAL ENABLE FLAG */ +__sbit __at 0xCE EXF3 ; /* TIMER 3 EXTERNAL FLAG */ +__sbit __at 0xCF TF3 ; /* TIMER 3 OVERFLOW FLAG */ + +/* TMR4CN 0xC8 */ +__sbit __at 0xC8 CPRL4 ; /* TIMER 4 CAPTURE SELECT */ +__sbit __at 0xC9 CT4 ; /* TIMER 4 COUNTER SELECT */ +__sbit __at 0xCA TR4 ; /* TIMER 4 ON/OFF CONTROL */ +__sbit __at 0xCB EXEN4 ; /* TIMER 4 EXTERNAL ENABLE FLAG */ +__sbit __at 0xCE EXF4 ; /* TIMER 4 EXTERNAL FLAG */ +__sbit __at 0xCF TF4 ; /* TIMER 4 OVERFLOW FLAG */ + +/* P4 0xC8 */ +__sbit __at 0xC8 P4_0 ; +__sbit __at 0xC9 P4_1 ; +__sbit __at 0xCA P4_2 ; +__sbit __at 0xCB P4_3 ; +__sbit __at 0xCC P4_4 ; +__sbit __at 0xCD P4_5 ; +__sbit __at 0xCE P4_6 ; +__sbit __at 0xCF P4_7 ; + +/* PSW 0xD0 */ +__sbit __at 0xD0 P ; /* ACCUMULATOR PARITY FLAG */ +__sbit __at 0xD1 F1 ; /* USER FLAG 1 */ +__sbit __at 0xD2 OV ; /* OVERFLOW FLAG */ +__sbit __at 0xD3 RS0 ; /* REGISTER BANK SELECT 0 */ +__sbit __at 0xD4 RS1 ; /* REGISTER BANK SELECT 1 */ +__sbit __at 0xD5 F0 ; /* USER FLAG 0 */ +__sbit __at 0xD6 AC ; /* AUXILIARY CARRY FLAG */ +__sbit __at 0xD7 CY ; /* CARRY FLAG */ + +/* PCA0CN 0xD8 */ +__sbit __at 0xD8 CCF0 ; /* PCA 0 MODULE 0 INTERRUPT FLAG */ +__sbit __at 0xD9 CCF1 ; /* PCA 0 MODULE 1 INTERRUPT FLAG */ +__sbit __at 0xDA CCF2 ; /* PCA 0 MODULE 2 INTERRUPT FLAG */ +__sbit __at 0xDB CCF3 ; /* PCA 0 MODULE 3 INTERRUPT FLAG */ +__sbit __at 0xDC CCF4 ; /* PCA 0 MODULE 4 INTERRUPT FLAG */ +__sbit __at 0xDD CCF5 ; /* PCA 0 MODULE 5 INTERRUPT FLAG */ +__sbit __at 0xDE CR ; /* PCA 0 COUNTER RUN CONTROL BIT */ +__sbit __at 0xDF CF ; /* PCA 0 COUNTER OVERFLOW FLAG */ + +/* DMA0CN 0xD8 */ +__sbit __at 0xD8 DMA0DO0 ; /* ADC0 Data Overflow Warning Flag */ +__sbit __at 0xD9 DMA0DO1 ; /* ADC1 Data Overflow Warning Flag */ +__sbit __at 0xDA DMA0DOE ; /* Data Overflow Warning Interrupt Enable */ +__sbit __at 0xDB DMA0DE0 ; /* ADC0 Data Overflow Error Flag */ +__sbit __at 0xDC DMA0DE1 ; /* ADC1 Data Overflow Error Flag */ +__sbit __at 0xDD DMA0MD ; /* DMA0 Mode Select */ +__sbit __at 0xDE DMA0INT ; /* DMA0 Operations Complete Flag */ +__sbit __at 0xDF DMA0EN ; /* DMA0 Enable */ + +/* P5 0xD8 */ +__sbit __at 0xD8 P5_0 ; +__sbit __at 0xD9 P5_1 ; +__sbit __at 0xDA P5_2 ; +__sbit __at 0xDB P5_3 ; +__sbit __at 0xDC P5_4 ; +__sbit __at 0xDD P5_5 ; +__sbit __at 0xDE P5_6 ; +__sbit __at 0xDF P5_7 ; + +/* ADC0CN 0xE8 */ +__sbit __at 0xE9 AD0WINT ; /* ADC 0 WINDOW INTERRUPT FLAG */ +__sbit __at 0xEA AD0CM0 ; /* ADC 0 CONVERT START MODE BIT 0 */ +__sbit __at 0xEB AD0CM1 ; /* ADC 0 CONVERT START MODE BIT 1 */ +__sbit __at 0xEC AD0BUSY ; /* ADC 0 BUSY FLAG */ +__sbit __at 0xED AD0INT ; /* ADC 0 EOC INTERRUPT FLAG */ +__sbit __at 0xEE AD0TM ; /* ADC 0 TRACK MODE */ +__sbit __at 0xEF AD0EN ; /* ADC 0 ENABLE */ + +/* ADC1CN 0xE8 */ +__sbit __at 0xE9 AD1CM0 ; /* ADC 1 CONVERT START MODE BIT 0 */ +__sbit __at 0xEA AD1CM1 ; /* ADC 1 CONVERT START MODE BIT 1 */ +__sbit __at 0xEB AD1CM2 ; /* ADC 1 CONVERT START MODE BIT 1 */ +__sbit __at 0xEC AD1BUSY ; /* ADC 1 BUSY FLAG */ +__sbit __at 0xED AD1INT ; /* ADC 1 EOC INTERRUPT FLAG */ +__sbit __at 0xEE AD1TM ; /* ADC 1 TRACK MODE */ +__sbit __at 0xEF AD1EN ; /* ADC 1 ENABLE */ + +/* ADC2CN 0xE8 */ +__sbit __at 0xE8 AD2LJST ; /* ADC 2 LEFT JUSTIFY SELECT */ +__sbit __at 0xE9 AD2WINT ; /* ADC 2 WINDOW INTERRUPT FLAG */ +__sbit __at 0xEA AD2CM0 ; /* ADC 2 CONVERT START MODE BIT 0 */ +__sbit __at 0xEB AD2CM1 ; /* ADC 2 CONVERT START MODE BIT 1 */ +__sbit __at 0xEC AD2BUSY ; /* ADC 2 BUSY FLAG */ +__sbit __at 0xED AD2INT ; /* ADC 2 EOC INTERRUPT FLAG */ +__sbit __at 0xEE AD2TM ; /* ADC 2 TRACK MODE */ +__sbit __at 0xEF AD2EN ; /* ADC 2 ENABLE */ + +/* P6 0xE8 */ +__sbit __at 0xE8 P6_0 ; +__sbit __at 0xE9 P6_1 ; +__sbit __at 0xEA P6_2 ; +__sbit __at 0xEB P6_3 ; +__sbit __at 0xEC P6_4 ; +__sbit __at 0xED P6_5 ; +__sbit __at 0xEE P6_6 ; +__sbit __at 0xEF P6_7 ; + +/* SPI0CN 0xF8 */ +__sbit __at 0xF8 SPIEN ; /* SPI 0 SPI ENABLE */ +__sbit __at 0xF9 TXBMT ; /* SPI 0 TX BUFFER EMPTY FLAG */ +__sbit __at 0xFA NSSMD0 ; /* SPI 0 SLAVE SELECT MODE 0 */ +__sbit __at 0xFB NSSMD1 ; /* SPI 0 SLAVE SELECT MODE 1 */ +__sbit __at 0xFC RXOVRN ; /* SPI 0 RX OVERRUN FLAG */ +__sbit __at 0xFD MODF ; /* SPI 0 MODE FAULT FLAG */ +__sbit __at 0xFE WCOL ; /* SPI 0 WRITE COLLISION FLAG */ +__sbit __at 0xFF SPIF ; /* SPI 0 INTERRUPT FLAG */ + +/* CAN0CN 0xF8 */ +__sbit __at 0xF8 CANINIT ; /* CAN INITIALIZATION */ +__sbit __at 0xF9 CANIE ; /* CAN MODULE INTERRUPT ENABLE */ +__sbit __at 0xFA CANSIE ; /* CAN STATUS CHANGE INTERRUPT ENABLE */ +__sbit __at 0xFB CANEIE ; /* CAN ERROR INTERRUPT ENABLE */ +__sbit __at 0xFC CANIF ; /* CAN INTERRUPT FLAG */ +__sbit __at 0xFD CANDAR ; /* CAN DISABLE AUTOMATIC RETRANSMISSION */ +__sbit __at 0xFE CANCCE ; /* CAN CONFIGURATION CHANGE ENABLE */ +__sbit __at 0xFF CANTEST ; /* CAN TEST MODE ENABLE */ + +/* DMA0CF 0xF8 */ +__sbit __at 0xF8 DMA0EO ; /* END-OF-OPERATION FLAG */ +__sbit __at 0xF9 DMA0EOE ; /* END-OF-OPERATION INTERRUPT ENABLE */ +__sbit __at 0xFA DMA0CI ; /* REPEAT COUNTER OVERFLOW FLAG */ +__sbit __at 0xFB DMA0CIE ; /* REPEAT COUNTER OVERFLOW INTERRUPT ENABLE */ +__sbit __at 0xFE DMA0XBY ; /* OFF-CHIP XRAM BUSY FLAG */ +__sbit __at 0xFF DMA0HLT ; /* HALT DMA0 OFF-CHIP XRAM ACCESS */ + +/* P7 0xF8 */ +__sbit __at 0xF8 P7_0 ; +__sbit __at 0xF9 P7_1 ; +__sbit __at 0xFA P7_2 ; +__sbit __at 0xFB P7_3 ; +__sbit __at 0xFC P7_4 ; +__sbit __at 0xFD P7_5 ; +__sbit __at 0xFE P7_6 ; +__sbit __at 0xFF P7_7 ; + + +/* Predefined SFR Bit Masks */ + +#define IDLE 0x01 /* PCON */ +#define STOP 0x02 /* PCON */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ + + +/* SFR PAGE DEFINITIONS */ + +#define CONFIG_PAGE 0x0F /* SYSTEM AND PORT CONFIGURATION PAGE */ +#define LEGACY_PAGE 0x00 /* LEGACY SFR PAGE */ +#define TIMER01_PAGE 0x00 /* TIMER 0 AND TIMER 1 */ +#define CPT0_PAGE 0x01 /* COMPARATOR 0 */ +#define CPT1_PAGE 0x02 /* COMPARATOR 1 */ +#define CPT2_PAGE 0x03 /* COMPARATOR 2 */ +#define UART0_PAGE 0x00 /* UART 0 */ +#define UART1_PAGE 0x01 /* UART 1 */ +#define SPI0_PAGE 0x00 /* SPI 0 */ +#define EMI0_PAGE 0x00 /* EXTERNAL MEMORY INTERFACE */ +#define ADC0_PAGE 0x00 /* ADC 0 */ +#define ADC1_PAGE 0x01 /* ADC 1 */ +#define ADC2_PAGE 0x02 /* ADC 2 */ +#define SMB0_PAGE 0x00 /* SMBUS 0 */ +#define TMR2_PAGE 0x00 /* TIMER 2 */ +#define TMR3_PAGE 0x01 /* TIMER 3 */ +#define TMR4_PAGE 0x02 /* TIMER 4 */ +#define DAC0_PAGE 0x00 /* DAC 0 */ +#define DAC1_PAGE 0x01 /* DAC 1 */ +#define PCA0_PAGE 0x00 /* PCA 0 */ +#define DMA0_PAGE 0x03 /* DMA 0 */ +#define CAN0_PAGE 0x01 /* CAN 0 */ + +#endif diff --git a/device/include/mcs51/C8051F120.h b/device/include/mcs51/C8051F120.h new file mode 100644 index 0000000..d7c09b4 --- /dev/null +++ b/device/include/mcs51/C8051F120.h @@ -0,0 +1,534 @@ +/*--------------------------------------------------------------------------- + Register Declarations for the Cygnal/SiLabs C8051F12x-F13x Processor Range + + Copyright (C) 2003 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +---------------------------------------------------------------------------*/ + +#ifndef C8051F120_H +#define C8051F120_H + + +/* BYTE Registers */ + +/* All Pages */ +__sfr __at (0x80) P0 ; /* PORT 0 */ +__sfr __at (0x81) SP ; /* STACK POINTER */ +__sfr __at (0x82) DPL ; /* DATA POINTER - LOW BYTE */ +__sfr __at (0x83) DPH ; /* DATA POINTER - HIGH BYTE */ +__sfr __at (0x84) SFRPAGE ; /* SFR PAGE SELECT */ +__sfr __at (0x85) SFRNEXT ; /* SFR STACK NEXT PAGE */ +__sfr __at (0x86) SFRLAST ; /* SFR STACK LAST PAGE */ +__sfr __at (0x87) PCON ; /* POWER CONTROL */ +__sfr __at (0x90) P1 ; /* PORT 1 */ +__sfr __at (0xA0) P2 ; /* PORT 2 */ +__sfr __at (0xA8) IE ; /* INTERRUPT ENABLE */ +__sfr __at (0xB0) P3 ; /* PORT 3 */ +__sfr __at (0xB1) PSBANK ; /* FLASH BANK SELECT */ +__sfr __at (0xB8) IP ; /* INTERRUPT PRIORITY */ +__sfr __at (0xD0) PSW ; /* PROGRAM STATUS WORD */ +__sfr __at (0xE0) ACC ; /* ACCUMULATOR */ +__sfr __at (0xE6) EIE1 ; /* EXTERNAL INTERRUPT ENABLE 1 */ +__sfr __at (0xE7) EIE2 ; /* EXTERNAL INTERRUPT ENABLE 2 */ +__sfr __at (0xF0) B ; /* B REGISTER */ +__sfr __at (0xF6) EIP1 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +__sfr __at (0xF7) EIP2 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 2 */ +__sfr __at (0xFF) WDTCN ; /* WATCHDOG TIMER CONTROL */ + +/* Page 0x00 */ +__sfr __at (0x88) TCON ; /* TIMER CONTROL */ +__sfr __at (0x89) TMOD ; /* TIMER MODE */ +__sfr __at (0x8A) TL0 ; /* TIMER 0 - LOW BYTE */ +__sfr __at (0x8B) TL1 ; /* TIMER 1 - LOW BYTE */ +__sfr __at (0x8C) TH0 ; /* TIMER 0 - HIGH BYTE */ +__sfr __at (0x8D) TH1 ; /* TIMER 1 - HIGH BYTE */ +__sfr __at (0x8E) CKCON ; /* TIMER 0/1 CLOCK CONTROL */ +__sfr __at (0x8F) PSCTL ; /* FLASH WRITE/ERASE CONTROL */ +__sfr __at (0x91) SSTA0 ; /* UART 0 STATUS */ +__sfr __at (0x98) SCON0 ; /* UART 0 CONTROL */ +__sfr __at (0x98) SCON ; /* UART 0 CONTROL */ +__sfr __at (0x99) SBUF0 ; /* UART 0 BUFFER */ +__sfr __at (0x99) SBUF ; /* UART 0 BUFFER */ +__sfr __at (0x9A) SPI0CFG ; /* SPI 0 CONFIGURATION */ +__sfr __at (0x9B) SPI0DAT ; /* SPI 0 DATA */ +__sfr __at (0x9D) SPI0CKR ; /* SPI 0 CLOCK RATE CONTROL */ +__sfr __at (0xA1) EMI0TC ; /* EMIF TIMING CONTROL */ +__sfr __at (0xA2) EMI0CN ; /* EMIF CONTROL */ +__sfr __at (0xA2) _XPAGE ; /* XDATA/PDATA PAGE */ +__sfr __at (0xA3) EMI0CF ; /* EMIF CONFIGURATION */ +__sfr __at (0xA9) SADDR0 ; /* UART 0 SLAVE ADDRESS */ +__sfr __at (0xB7) FLSCL ; /* FLASH SCALE */ +__sfr __at (0xB9) SADEN0 ; /* UART 0 SLAVE ADDRESS MASK */ +__sfr __at (0xBA) AMX0CF ; /* ADC 0 MUX CONFIGURATION */ +__sfr __at (0xBB) AMX0SL ; /* ADC 0 MUX CHANNEL SELECTION */ +__sfr __at (0xBC) ADC0CF ; /* ADC 0 CONFIGURATION */ +__sfr __at (0xBE) ADC0L ; /* ADC 0 DATA - LOW BYTE */ +__sfr __at (0xBF) ADC0H ; /* ADC 0 DATA - HIGH BYTE */ +__sfr __at (0xC0) SMB0CN ; /* SMBUS 0 CONTROL */ +__sfr __at (0xC1) SMB0STA ; /* SMBUS 0 STATUS */ +__sfr __at (0xC2) SMB0DAT ; /* SMBUS 0 DATA */ +__sfr __at (0xC3) SMB0ADR ; /* SMBUS 0 SLAVE ADDRESS */ +__sfr __at (0xC4) ADC0GTL ; /* ADC 0 GREATER-THAN REGISTER - LOW BYTE */ +__sfr __at (0xC5) ADC0GTH ; /* ADC 0 GREATER-THAN REGISTER - HIGH BYTE */ +__sfr __at (0xC6) ADC0LTL ; /* ADC 0 LESS-THAN REGISTER - LOW BYTE */ +__sfr __at (0xC7) ADC0LTH ; /* ADC 0 LESS-THAN REGISTER - HIGH BYTE */ +__sfr __at (0xC8) TMR2CN ; /* TIMER 2 CONTROL */ +__sfr __at (0xC9) TMR2CF ; /* TIMER 2 CONFIGURATION */ +__sfr __at (0xCA) RCAP2L ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCB) RCAP2H ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCC) TMR2L ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCC) TL2 ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCD) TMR2H ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xCD) TH2 ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xCF) SMB0CR ; /* SMBUS 0 CLOCK RATE */ +__sfr __at (0xD1) REF0CN ; /* VOLTAGE REFERENCE 0 CONTROL */ +__sfr __at (0xD2) DAC0L ; /* DAC 0 REGISTER - LOW BYTE */ +__sfr __at (0xD3) DAC0H ; /* DAC 0 REGISTER - HIGH BYTE */ +__sfr __at (0xD4) DAC0CN ; /* DAC 0 CONTROL */ +__sfr __at (0xD8) PCA0CN ; /* PCA 0 COUNTER CONTROL */ +__sfr __at (0xD9) PCA0MD ; /* PCA 0 COUNTER MODE */ +__sfr __at (0xDA) PCA0CPM0 ; /* PCA 0 MODULE 0 CONTROL */ +__sfr __at (0xDB) PCA0CPM1 ; /* PCA 0 MODULE 1 CONTROL */ +__sfr __at (0xDC) PCA0CPM2 ; /* PCA 0 MODULE 2 CONTROL */ +__sfr __at (0xDD) PCA0CPM3 ; /* PCA 0 MODULE 3 CONTROL */ +__sfr __at (0xDE) PCA0CPM4 ; /* PCA 0 MODULE 4 CONTROL */ +__sfr __at (0xDF) PCA0CPM5 ; /* PCA 0 MODULE 5 CONTROL */ +__sfr __at (0xE1) PCA0CPL5 ; /* PCA 0 MODULE 5 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at (0xE2) PCA0CPH5 ; /* PCA 0 MODULE 5 CAPTURE/COMPARE - HIGH BYTE */ +__sfr __at (0xE8) ADC0CN ; /* ADC 0 CONTROL */ +__sfr __at (0xE9) PCA0CPL2 ; /* PCA 0 MODULE 2 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at (0xEA) PCA0CPH2 ; /* PCA 0 MODULE 2 CAPTURE/COMPARE - HIGH BYTE */ +__sfr __at (0xEB) PCA0CPL3 ; /* PCA 0 MODULE 3 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at (0xEC) PCA0CPH3 ; /* PCA 0 MODULE 3 CAPTURE/COMPARE - HIGH BYTE */ +__sfr __at (0xED) PCA0CPL4 ; /* PCA 0 MODULE 4 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at (0xEE) PCA0CPH4 ; /* PCA 0 MODULE 4 CAPTURE/COMPARE - HIGH BYTE */ +__sfr __at (0xEF) RSTSRC ; /* RESET SOURCE */ +__sfr __at (0xF8) SPI0CN ; /* SPI 0 CONTROL */ +__sfr __at (0xF9) PCA0L ; /* PCA 0 TIMER - LOW BYTE */ +__sfr __at (0xFA) PCA0H ; /* PCA 0 TIMER - HIGH BYTE */ +__sfr __at (0xFB) PCA0CPL0 ; /* PCA 0 MODULE 0 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at (0xFC) PCA0CPH0 ; /* PCA 0 MODULE 0 CAPTURE/COMPARE - HIGH BYTE */ +__sfr __at (0xFD) PCA0CPL1 ; /* PCA 0 MODULE 1 CAPTURE/COMPARE - LOW BYTE */ +__sfr __at (0xFE) PCA0CPH1 ; /* PCA 0 MODULE 1 CAPTURE/COMPARE - HIGH BYTE */ + +/* Page 0x01 */ +__sfr __at (0x88) CPT0CN ; /* COMPARATOR 0 CONTROL */ +__sfr __at (0x89) CPT0MD ; /* COMPARATOR 0 CONFIGURATION */ +__sfr __at (0x98) SCON1 ; /* UART 1 CONTROL */ +__sfr __at (0x99) SBUF1 ; /* UART 1 BUFFER */ +__sfr __at (0xC8) TMR3CN ; /* TIMER 3 CONTROL */ +__sfr __at (0xC9) TMR3CF ; /* TIMER 3 CONFIGURATION */ +__sfr __at (0xCA) RCAP3L ; /* TIMER 3 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCB) RCAP3H ; /* TIMER 3 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCC) TMR3L ; /* TIMER 3 - LOW BYTE */ +__sfr __at (0xCD) TMR3H ; /* TIMER 3 - HIGH BYTE */ +__sfr __at (0xD2) DAC1L ; /* DAC 1 REGISTER - LOW BYTE */ +__sfr __at (0xD3) DAC1H ; /* DAC 1 REGISTER - HIGH BYTE */ +__sfr __at (0xD4) DAC1CN ; /* DAC 1 CONTROL */ + +/* Page 0x02 */ +__sfr __at (0x88) CPT1CN ; /* COMPARATOR 1 CONTROL */ +__sfr __at (0x89) CPT1MD ; /* COMPARATOR 1 CONFIGURATION */ +__sfr __at (0xBA) AMX2CF ; /* ADC 2 MUX CONFIGURATION */ +__sfr __at (0xBB) AMX2SL ; /* ADC 2 MUX CHANNEL SELECTION */ +__sfr __at (0xBC) ADC2CF ; /* ADC 2 CONFIGURATION */ +__sfr __at (0xBE) ADC2 ; /* ADC 2 DATA */ +__sfr __at (0xC4) ADC2GT ; /* ADC 2 GREATER-THAN REGISTER */ +__sfr __at (0xC6) ADC2LT ; /* ADC 2 LESS-THAN REGISTER */ +__sfr __at (0xC8) TMR4CN ; /* TIMER 4 CONTROL */ +__sfr __at (0xC9) TMR4CF ; /* TIMER 4 CONFIGURATION */ +__sfr __at (0xCA) RCAP4L ; /* TIMER 4 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCB) RCAP4H ; /* TIMER 4 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCC) TMR4L ; /* TIMER 4 - LOW BYTE */ +__sfr __at (0xCD) TMR4H ; /* TIMER 4 - HIGH BYTE */ +__sfr __at (0xE8) ADC2CN ; /* ADC 2 CONTROL */ + +/* Page 0x03 */ +__sfr __at (0x91) MAC0BL ; /* MAC0 B Register Low Byte */ +__sfr __at (0x92) MAC0BH ; /* MAC0 B Register High Byte */ +__sfr __at (0x93) MAC0ACC0 ; /* MAC0 Accumulator Byte 0 (LSB) */ +__sfr __at (0x94) MAC0ACC1 ; /* MAC0 Accumulator Byte 1 */ +__sfr __at (0x95) MAC0ACC2 ; /* MAC0 Accumulator Byte 2 */ +__sfr __at (0x96) MAC0ACC3 ; /* MAC0 Accumulator Byte 3 (MSB) */ +__sfr __at (0x97) MAC0OVR ; /* MAC0 Accumulator Overflow */ +__sfr __at (0xC0) MAC0STA ; /* MAC0 Status Register */ +__sfr __at (0xC1) MAC0AL ; /* MAC0 A Register Low Byte */ +__sfr __at (0xC2) MAC0AH ; /* MAC0 A Register High Byte */ +__sfr __at (0xC3) MAC0CF ; /* MAC0 Configuration */ +__sfr __at (0xCE) MAC0RNDL ; /* MAC0 Rounding Register Low Byte */ +__sfr __at (0xCF) MAC0RNDH ; /* MAC0 Rounding Register High Byte */ + +/* Page 0x0F */ +__sfr __at (0x88) FLSTAT ; /* FLASH STATUS */ +__sfr __at (0x89) PLL0CN ; /* PLL 0 CONTROL */ +__sfr __at (0x8A) OSCICN ; /* INTERNAL OSCILLATOR CONTROL */ +__sfr __at (0x8B) OSCICL ; /* INTERNAL OSCILLATOR CALIBRATION */ +__sfr __at (0x8C) OSCXCN ; /* EXTERNAL OSCILLATOR CONTROL */ +__sfr __at (0x8D) PLL0DIV ; /* PLL 0 DIVIDER */ +__sfr __at (0x8E) PLL0MUL ; /* PLL 0 MULTIPLIER */ +__sfr __at (0x8F) PLL0FLT ; /* PLL 0 FILTER */ +__sfr __at (0x96) SFRPGCN ; /* SFR PAGE CONTROL */ +__sfr __at (0x97) CLKSEL ; /* SYSTEM CLOCK SELECT */ +__sfr __at (0x9A) CCH0MA ; /* CACHE MISS ACCUMULATOR */ +__sfr __at (0x9C) P4MDOUT ; /* PORT 4 OUTPUT MODE */ +__sfr __at (0x9D) P5MDOUT ; /* PORT 5 OUTPUT MODE */ +__sfr __at (0x9E) P6MDOUT ; /* PORT 6 OUTPUT MODE */ +__sfr __at (0x9F) P7MDOUT ; /* PORT 7 OUTPUT MODE */ +__sfr __at (0xA1) CCH0CN ; /* CACHE CONTROL */ +__sfr __at (0xA2) CCH0TN ; /* CACHE TUNING REGISTER */ +__sfr __at (0xA3) CCH0LC ; /* CACHE LOCK */ +__sfr __at (0xA4) P0MDOUT ; /* PORT 0 OUTPUT MODE */ +__sfr __at (0xA5) P1MDOUT ; /* PORT 1 OUTPUT MODE */ +__sfr __at (0xA6) P2MDOUT ; /* PORT 2 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA7) P3MDOUT ; /* PORT 3 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xAD) P1MDIN ; /* PORT 1 INPUT MODE */ +__sfr __at (0xB7) FLACL ; /* FLASH ACCESS LIMIT */ +__sfr __at (0xC8) P4 ; /* PORT 4 */ +__sfr __at (0xD8) P5 ; /* PORT 5 */ +__sfr __at (0xE1) XBR0 ; /* CROSSBAR CONFIGURATION REGISTER 0 */ +__sfr __at (0xE2) XBR1 ; /* CROSSBAR CONFIGURATION REGISTER 1 */ +__sfr __at (0xE3) XBR2 ; /* CROSSBAR CONFIGURATION REGISTER 2 */ +__sfr __at (0xE8) P6 ; /* PORT 6 */ +__sfr __at (0xF8) P7 ; /* PORT 7 */ + + +/* WORD/DWORD Registers */ + +/* Page 0x00 */ +__sfr16 __at (0x8C8A) TMR0 ; /* TIMER 0 COUNTER */ +__sfr16 __at (0x8D8B) TMR1 ; /* TIMER 1 COUNTER */ +__sfr16 __at (0xCDCC) TMR2 ; /* TIMER 2 COUNTER */ +__sfr16 __at (0xCBCA) RCAP2 ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0xBFBE) ADC0 ; /* ADC 0 DATA WORD */ +__sfr16 __at (0xC5C4) ADC0GT ; /* ADC 0 GREATER-THAN REGISTER WORD */ +__sfr16 __at (0xC7C6) ADC0LT ; /* ADC 0 LESS-THAN REGISTER WORD */ +__sfr16 __at (0xD3D2) DAC0 ; /* DAC 0 REGISTER WORD */ +__sfr16 __at (0xFAF9) PCA0 ; /* PCA 0 TIMER COUNTER */ +__sfr16 __at (0xFCFB) PCA0CP0 ; /* PCA 0 MODULE 0 CAPTURE/COMPARE WORD */ +__sfr16 __at (0xFEFD) PCA0CP1 ; /* PCA 0 MODULE 1 CAPTURE/COMPARE WORD */ +__sfr16 __at (0xEAE9) PCA0CP2 ; /* PCA 0 MODULE 2 CAPTURE/COMPARE WORD */ +__sfr16 __at (0xECEB) PCA0CP3 ; /* PCA 0 MODULE 3 CAPTURE/COMPARE WORD */ +__sfr16 __at (0xEEED) PCA0CP4 ; /* PCA 0 MODULE 4 CAPTURE/COMPARE WORD */ +__sfr16 __at (0xE2E1) PCA0CP5 ; /* PCA 0 MODULE 5 CAPTURE/COMPARE WORD */ + +/* Page 0x01 */ +__sfr16 __at (0xCDCC) TMR3 ; /* TIMER 3 COUNTER */ +__sfr16 __at (0xCBCA) RCAP3 ; /* TIMER 3 CAPTURE REGISTER WORD */ +__sfr16 __at (0xD3D2) DAC1 ; /* DAC 1 REGISTER WORD */ + +/* Page 0x02 */ +__sfr16 __at (0xCDCC) TMR4 ; /* TIMER 4 COUNTER */ +__sfr16 __at (0xCBCA) RCAP4 ; /* TIMER 4 CAPTURE REGISTER WORD */ + +/* Page 0x03 */ +__sfr16 __at (0xC2C1) MAC0A ; /* MAC0 A Register */ + /* No sfr16 definition for MAC0B because MAC0BL must be written last */ +__sfr32 __at (0x96959493) MAC0ACC ; /* MAC0 Accumulator */ +__sfr16 __at (0xCFCE) MAC0RND ; /* MAC0 Rounding Register */ + + +/* BIT Registers */ + +/* P0 0x80 */ +__sbit __at (0x80) P0_0 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x87) P0_7 ; + +/* TCON 0x88 */ +__sbit __at (0x88) IT0 ; /* EXT. INTERRUPT 0 TYPE */ +__sbit __at (0x89) IE0 ; /* EXT. INTERRUPT 0 EDGE FLAG */ +__sbit __at (0x8A) IT1 ; /* EXT. INTERRUPT 1 TYPE */ +__sbit __at (0x8B) IE1 ; /* EXT. INTERRUPT 1 EDGE FLAG */ +__sbit __at (0x8C) TR0 ; /* TIMER 0 ON/OFF CONTROL */ +__sbit __at (0x8D) TF0 ; /* TIMER 0 OVERFLOW FLAG */ +__sbit __at (0x8E) TR1 ; /* TIMER 1 ON/OFF CONTROL */ +__sbit __at (0x8F) TF1 ; /* TIMER 1 OVERFLOW FLAG */ + +/* CPT0CN 0x88 */ +__sbit __at (0x88) CP0HYN0 ; /* COMPARATOR 0 NEGATIVE HYSTERESIS 0 */ +__sbit __at (0x89) CP0HYN1 ; /* COMPARATOR 0 NEGATIVE HYSTERESIS 1 */ +__sbit __at (0x8A) CP0HYP0 ; /* COMPARATOR 0 POSITIVE HYSTERESIS 0 */ +__sbit __at (0x8B) CP0HYP1 ; /* COMPARATOR 0 POSITIVE HYSTERESIS 1 */ +__sbit __at (0x8C) CP0FIF ; /* COMPARATOR 0 FALLING EDGE INTERRUPT */ +__sbit __at (0x8D) CP0RIF ; /* COMPARATOR 0 RISING EDGE INTERRUPT */ +__sbit __at (0x8E) CP0OUT ; /* COMPARATOR 0 OUTPUT */ +__sbit __at (0x8F) CP0EN ; /* COMPARATOR 0 ENABLE */ + +/* CPT1CN 0x88 */ +__sbit __at (0x88) CP1HYN0 ; /* COMPARATOR 1 NEGATIVE HYSTERESIS 0 */ +__sbit __at (0x89) CP1HYN1 ; /* COMPARATOR 1 NEGATIVE HYSTERESIS 1 */ +__sbit __at (0x8A) CP1HYP0 ; /* COMPARATOR 1 POSITIVE HYSTERESIS 0 */ +__sbit __at (0x8B) CP1HYP1 ; /* COMPARATOR 1 POSITIVE HYSTERESIS 1 */ +__sbit __at (0x8C) CP1FIF ; /* COMPARATOR 1 FALLING EDGE INTERRUPT */ +__sbit __at (0x8D) CP1RIF ; /* COMPARATOR 1 RISING EDGE INTERRUPT */ +__sbit __at (0x8E) CP1OUT ; /* COMPARATOR 1 OUTPUT */ +__sbit __at (0x8F) CP1EN ; /* COMPARATOR 1 ENABLE */ + +/* FLSTAT 0x88 */ +__sbit __at (0x88) FLHBUSY ; /* FLASH BUSY */ + +/* P1 0x90 */ +__sbit __at (0x90) P1_0 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x92) P1_2 ; +__sbit __at (0x93) P1_3 ; +__sbit __at (0x94) P1_4 ; +__sbit __at (0x95) P1_5 ; +__sbit __at (0x96) P1_6 ; +__sbit __at (0x97) P1_7 ; + +/* SCON0 0x98 */ +__sbit __at (0x98) RI0 ; /* UART 0 RX INTERRUPT FLAG */ +__sbit __at (0x98) RI ; /* UART 0 RX INTERRUPT FLAG */ +__sbit __at (0x99) TI0 ; /* UART 0 TX INTERRUPT FLAG */ +__sbit __at (0x99) TI ; /* UART 0 TX INTERRUPT FLAG */ +__sbit __at (0x9A) RB80 ; /* UART 0 RX BIT 8 */ +__sbit __at (0x9B) TB80 ; /* UART 0 TX BIT 8 */ +__sbit __at (0x9C) REN0 ; /* UART 0 RX ENABLE */ +__sbit __at (0x9C) REN ; /* UART 0 RX ENABLE */ +__sbit __at (0x9D) SM20 ; /* UART 0 MULTIPROCESSOR EN */ +__sbit __at (0x9E) SM10 ; /* UART 0 MODE 1 */ +__sbit __at (0x9F) SM00 ; /* UART 0 MODE 0 */ + +/* SCON1 0x98 */ +__sbit __at (0x98) RI1 ; /* UART 1 RX INTERRUPT FLAG */ +__sbit __at (0x99) TI1 ; /* UART 1 TX INTERRUPT FLAG */ +__sbit __at (0x9A) RB81 ; /* UART 1 RX BIT 8 */ +__sbit __at (0x9B) TB81 ; /* UART 1 TX BIT 8 */ +__sbit __at (0x9C) REN1 ; /* UART 1 RX ENABLE */ +__sbit __at (0x9D) MCE1 ; /* UART 1 MCE */ +__sbit __at (0x9F) S1MODE ; /* UART 1 MODE */ + +/* P2 0xA0 */ +__sbit __at (0xA0) P2_0 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA4) P2_4 ; +__sbit __at (0xA5) P2_5 ; +__sbit __at (0xA6) P2_6 ; +__sbit __at (0xA7) P2_7 ; + +/* IE 0xA8 */ +__sbit __at (0xA8) EX0 ; /* EXTERNAL INTERRUPT 0 ENABLE */ +__sbit __at (0xA9) ET0 ; /* TIMER 0 INTERRUPT ENABLE */ +__sbit __at (0xAA) EX1 ; /* EXTERNAL INTERRUPT 1 ENABLE */ +__sbit __at (0xAB) ET1 ; /* TIMER 1 INTERRUPT ENABLE */ +__sbit __at (0xAC) ES0 ; /* UART0 INTERRUPT ENABLE */ +__sbit __at (0xAC) ES ; /* UART0 INTERRUPT ENABLE */ +__sbit __at (0xAD) ET2 ; /* TIMER 2 INTERRUPT ENABLE */ +__sbit __at (0xAF) EA ; /* GLOBAL INTERRUPT ENABLE */ + +/* P3 0xB0 */ +__sbit __at (0xB0) P3_0 ; +__sbit __at (0xB1) P3_1 ; +__sbit __at (0xB2) P3_2 ; +__sbit __at (0xB3) P3_3 ; +__sbit __at (0xB4) P3_4 ; +__sbit __at (0xB5) P3_5 ; +__sbit __at (0xB6) P3_6 ; +__sbit __at (0xB7) P3_7 ; + +/* IP 0xB8 */ +__sbit __at (0xB8) PX0 ; /* EXTERNAL INTERRUPT 0 PRIORITY */ +__sbit __at (0xB9) PT0 ; /* TIMER 0 PRIORITY */ +__sbit __at (0xBA) PX1 ; /* EXTERNAL INTERRUPT 1 PRIORITY */ +__sbit __at (0xBB) PT1 ; /* TIMER 1 PRIORITY */ +__sbit __at (0xBC) PS0 ; /* SERIAL PORT PRIORITY */ +__sbit __at (0xBC) PS ; /* SERIAL PORT PRIORITY */ +__sbit __at (0xBD) PT2 ; /* TIMER 2 PRIORITY */ + +/* SMB0CN 0xC0 */ +__sbit __at (0xC0) SMBTOE ; /* SMBUS 0 TIMEOUT ENABLE */ +__sbit __at (0xC1) SMBFTE ; /* SMBUS 0 FREE TIMER ENABLE */ +__sbit __at (0xC2) AA ; /* SMBUS 0 ASSERT/ACKNOWLEDGE FLAG */ +__sbit __at (0xC3) SI ; /* SMBUS 0 INTERRUPT PENDING FLAG */ +__sbit __at (0xC4) STO ; /* SMBUS 0 STOP FLAG */ +__sbit __at (0xC5) STA ; /* SMBUS 0 START FLAG */ +__sbit __at (0xC6) ENSMB ; /* SMBUS 0 ENABLE */ +__sbit __at (0xC7) BUSY ; /* SMBUS 0 BUSY */ + +/* MAC0STA 0xC0 */ +__sbit __at (0xC0) MAC0N ; /* MAC 0 NEGATIVE FLAG */ +__sbit __at (0xC1) MAC0SO ; /* MAC 0 SOFT OVERFLOW FLAG */ +__sbit __at (0xC2) MAC0Z ; /* MAC 0 ZERO FLAG */ +__sbit __at (0xC3) MAC0HO ; /* MAC 0 HARD OVERFLOW FLAG */ + +/* TMR2CN 0xC8 */ +__sbit __at (0xC8) CPRL2 ; /* TIMER 2 CAPTURE SELECT */ +__sbit __at (0xC9) CT2 ; /* TIMER 2 COUNTER SELECT */ +__sbit __at (0xCA) TR2 ; /* TIMER 2 ON/OFF CONTROL */ +__sbit __at (0xCB) EXEN2 ; /* TIMER 2 EXTERNAL ENABLE FLAG */ +__sbit __at (0xCE) EXF2 ; /* TIMER 2 EXTERNAL FLAG */ +__sbit __at (0xCF) TF2 ; /* TIMER 2 OVERFLOW FLAG */ + +/* TMR3CN 0xC8 */ +__sbit __at (0xC8) CPRL3 ; /* TIMER 3 CAPTURE SELECT */ +__sbit __at (0xC9) CT3 ; /* TIMER 3 COUNTER SELECT */ +__sbit __at (0xCA) TR3 ; /* TIMER 3 ON/OFF CONTROL */ +__sbit __at (0xCB) EXEN3 ; /* TIMER 3 EXTERNAL ENABLE FLAG */ +__sbit __at (0xCE) EXF3 ; /* TIMER 3 EXTERNAL FLAG */ +__sbit __at (0xCF) TF3 ; /* TIMER 3 OVERFLOW FLAG */ + +/* TMR4CN 0xC8 */ +__sbit __at (0xC8) CPRL4 ; /* TIMER 4 CAPTURE SELECT */ +__sbit __at (0xC9) CT4 ; /* TIMER 4 COUNTER SELECT */ +__sbit __at (0xCA) TR4 ; /* TIMER 4 ON/OFF CONTROL */ +__sbit __at (0xCB) EXEN4 ; /* TIMER 4 EXTERNAL ENABLE FLAG */ +__sbit __at (0xCE) EXF4 ; /* TIMER 4 EXTERNAL FLAG */ +__sbit __at (0xCF) TF4 ; /* TIMER 4 OVERFLOW FLAG */ + +/* P4 0xC8 */ +__sbit __at (0xC8) P4_0 ; +__sbit __at (0xC9) P4_1 ; +__sbit __at (0xCA) P4_2 ; +__sbit __at (0xCB) P4_3 ; +__sbit __at (0xCC) P4_4 ; +__sbit __at (0xCD) P4_5 ; +__sbit __at (0xCE) P4_6 ; +__sbit __at (0xCF) P4_7 ; + +/* PSW 0xD0 */ +__sbit __at (0xD0) P ; /* ACCUMULATOR PARITY FLAG */ +__sbit __at (0xD1) F1 ; /* USER FLAG 1 */ +__sbit __at (0xD2) OV ; /* OVERFLOW FLAG */ +__sbit __at (0xD3) RS0 ; /* REGISTER BANK SELECT 0 */ +__sbit __at (0xD4) RS1 ; /* REGISTER BANK SELECT 1 */ +__sbit __at (0xD5) F0 ; /* USER FLAG 0 */ +__sbit __at (0xD6) AC ; /* AUXILIARY CARRY FLAG */ +__sbit __at (0xD7) CY ; /* CARRY FLAG */ + +/* PCA0CN D8H */ +__sbit __at (0xD8) CCF0 ; /* PCA 0 MODULE 0 INTERRUPT FLAG */ +__sbit __at (0xD9) CCF1 ; /* PCA 0 MODULE 1 INTERRUPT FLAG */ +__sbit __at (0xDA) CCF2 ; /* PCA 0 MODULE 2 INTERRUPT FLAG */ +__sbit __at (0xDB) CCF3 ; /* PCA 0 MODULE 3 INTERRUPT FLAG */ +__sbit __at (0xDC) CCF4 ; /* PCA 0 MODULE 4 INTERRUPT FLAG */ +__sbit __at (0xDD) CCF5 ; /* PCA 0 MODULE 5 INTERRUPT FLAG */ +__sbit __at (0xDE) CR ; /* PCA 0 COUNTER RUN CONTROL BIT */ +__sbit __at (0xDF) CF ; /* PCA 0 COUNTER OVERFLOW FLAG */ + +/* P5 0xD8 */ +__sbit __at (0xD8) P5_0 ; +__sbit __at (0xD9) P5_1 ; +__sbit __at (0xDA) P5_2 ; +__sbit __at (0xDB) P5_3 ; +__sbit __at (0xDC) P5_4 ; +__sbit __at (0xDD) P5_5 ; +__sbit __at (0xDE) P5_6 ; +__sbit __at (0xDF) P5_7 ; + +/* ADC0CN E8H */ +__sbit __at (0xE8) AD0LJST ; /* ADC 0 RIGHT JUSTIFY DATA BIT */ +__sbit __at (0xE9) AD0WINT ; /* ADC 0 WINDOW INTERRUPT FLAG */ +__sbit __at (0xEA) AD0CM0 ; /* ADC 0 CONVERT START MODE BIT 0 */ +__sbit __at (0xEB) AD0CM1 ; /* ADC 0 CONVERT START MODE BIT 1 */ +__sbit __at (0xEC) AD0BUSY ; /* ADC 0 BUSY FLAG */ +__sbit __at (0xED) AD0INT ; /* ADC 0 EOC INTERRUPT FLAG */ +__sbit __at (0xEE) AD0TM ; /* ADC 0 TRACK MODE */ +__sbit __at (0xEF) AD0EN ; /* ADC 0 ENABLE */ + +/* ADC2CN E8H */ +__sbit __at (0xE8) AD2WINT ; /* ADC 2 WINDOW INTERRUPT FLAG */ +__sbit __at (0xE9) AD2CM0 ; /* ADC 2 CONVERT START MODE BIT 0 */ +__sbit __at (0xEA) AD2CM1 ; /* ADC 2 CONVERT START MODE BIT 1 */ +__sbit __at (0xEB) AD2CM2 ; /* ADC 2 CONVERT START MODE BIT 2 */ +__sbit __at (0xEC) AD2BUSY ; /* ADC 2 BUSY FLAG */ +__sbit __at (0xED) AD2INT ; /* ADC 2 EOC INTERRUPT FLAG */ +__sbit __at (0xEE) AD2TM ; /* ADC 2 TRACK MODE */ +__sbit __at (0xEF) AD2EN ; /* ADC 2 ENABLE */ + +/* P6 0xE8 */ +__sbit __at (0xE8) P6_0 ; +__sbit __at (0xE9) P6_1 ; +__sbit __at (0xEA) P6_2 ; +__sbit __at (0xEB) P6_3 ; +__sbit __at (0xEC) P6_4 ; +__sbit __at (0xED) P6_5 ; +__sbit __at (0xEE) P6_6 ; +__sbit __at (0xEF) P6_7 ; + +/* SPI0CN F8H */ +__sbit __at (0xF8) SPIEN ; /* SPI 0 SPI ENABLE */ +__sbit __at (0xF9) TXBMT ; /* SPI 0 TX BUFFER EMPTY FLAG */ +__sbit __at (0xFA) NSSMD0 ; /* SPI 0 SLAVE SELECT MODE 0 */ +__sbit __at (0xFB) NSSMD1 ; /* SPI 0 SLAVE SELECT MODE 1 */ +__sbit __at (0xFC) RXOVRN ; /* SPI 0 RX OVERRUN FLAG */ +__sbit __at (0xFD) MODF ; /* SPI 0 MODE FAULT FLAG */ +__sbit __at (0xFE) WCOL ; /* SPI 0 WRITE COLLISION FLAG */ +__sbit __at (0xFF) SPIF ; /* SPI 0 INTERRUPT FLAG */ + +/* P7 0xF8 */ +__sbit __at (0xF8) P7_0 ; +__sbit __at (0xF9) P7_1 ; +__sbit __at (0xFA) P7_2 ; +__sbit __at (0xFB) P7_3 ; +__sbit __at (0xFC) P7_4 ; +__sbit __at (0xFD) P7_5 ; +__sbit __at (0xFE) P7_6 ; +__sbit __at (0xFF) P7_7 ; + + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define PINRSF 0x01 /* RSTSRC */ +#define PORSF 0x02 /* RSTSRC */ +#define MCDRSF 0x04 /* RSTSRC */ +#define WDTRSF 0x08 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ +#define C0RSEF 0x20 /* RSTSRC */ +#define CNVRSEF 0x40 /* RSTSRC */ + + +/* SFR PAGE DEFINITIONS */ + +#define CONFIG_PAGE 0x0F /* SYSTEM AND PORT CONFIGURATION PAGE */ +#define LEGACY_PAGE 0x00 /* LEGACY SFR PAGE */ +#define TIMER01_PAGE 0x00 /* TIMER 0 AND TIMER 1 */ +#define CPT0_PAGE 0x01 /* COMPARATOR 0 */ +#define CPT1_PAGE 0x02 /* COMPARATOR 1 */ +#define UART0_PAGE 0x00 /* UART 0 */ +#define UART1_PAGE 0x01 /* UART 1 */ +#define SPI0_PAGE 0x00 /* SPI 0 */ +#define EMI0_PAGE 0x00 /* EXTERNAL MEMORY INTERFACE */ +#define ADC0_PAGE 0x00 /* ADC 0 */ +#define ADC2_PAGE 0x02 /* ADC 2 */ +#define SMB0_PAGE 0x00 /* SMBUS 0 */ +#define TMR2_PAGE 0x00 /* TIMER 2 */ +#define TMR3_PAGE 0x01 /* TIMER 3 */ +#define TMR4_PAGE 0x02 /* TIMER 4 */ +#define DAC0_PAGE 0x00 /* DAC 0 */ +#define DAC1_PAGE 0x01 /* DAC 1 */ +#define PCA0_PAGE 0x00 /* PCA 0 */ +#define PLL0_PAGE 0x0F /* PLL 0 */ +#define MAC0_PAGE 0x03 /* MULTIPLY / ACCUMULATE 0 */ + +#endif diff --git a/device/include/mcs51/C8051F200.h b/device/include/mcs51/C8051F200.h new file mode 100644 index 0000000..ddd5c5e --- /dev/null +++ b/device/include/mcs51/C8051F200.h @@ -0,0 +1,230 @@ +/*--------------------------------------------------------------------------- + Register Declarations for the Cygnal/SiLabs C8051F2xx Processor Range + + Copyright (C) 2006 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +---------------------------------------------------------------------------*/ + +#ifndef C8051F200_H +#define C8051F200_H + + +/* BYTE Registers */ +__sfr __at (0x80) P0 ; /* PORT 0 */ +__sfr __at (0x81) SP ; /* STACK POINTER */ +__sfr __at (0x82) DPL ; /* DATA POINTER - LOW BYTE */ +__sfr __at (0x83) DPH ; /* DATA POINTER - HIGH BYTE */ +__sfr __at (0x87) PCON ; /* POWER Control */ +__sfr __at (0x88) TCON ; /* TIMER Control */ +__sfr __at (0x89) TMOD ; /* TIMER MODE */ +__sfr __at (0x8A) TL0 ; /* TIMER 0 - LOW BYTE */ +__sfr __at (0x8B) TL1 ; /* TIMER 1 - LOW BYTE */ +__sfr __at (0x8C) TH0 ; /* TIMER 0 - HIGH BYTE */ +__sfr __at (0x8D) TH1 ; /* TIMER 1 - HIGH BYTE */ +__sfr __at (0x8E) CKCON ; /* CLOCK Control */ +__sfr __at (0x8F) PSCTL ; /* PROGRAM STORE R/W Control */ +__sfr __at (0x90) P1 ; /* PORT 1 */ +__sfr __at (0x98) SCON ; /* SERIAL PORT Control */ +__sfr __at (0x99) SBUF ; /* SERIAL PORT BUFFER */ +__sfr __at (0x9A) SPI0CFG ; /* SERIAL PERIPHERAL INTERFACE 0 Configuration */ +__sfr __at (0x9B) SPI0DAT ; /* SERIAL PERIPHERAL INTERFACE 0 DATA */ +__sfr __at (0x9D) SPI0CKR ; /* SERIAL PERIPHERAL INTERFACE 0 CLOCK RATE Control */ +__sfr __at (0x9E) CPT0CN ; /* COMPARATOR 0 Control */ +__sfr __at (0x9F) CPT1CN ; /* COMPARATOR 1 Control */ +__sfr __at (0xA0) P2 ; /* PORT 2 */ +__sfr __at (0xA4) PRT0CF ; /* PORT 0 OUTPUT MODE Configuration */ +__sfr __at (0xA5) PRT1CF ; /* PORT 1 OUTPUT MODE Configuration */ +__sfr __at (0xA6) PRT2CF ; /* PORT 2 OUTPUT MODE Configuration */ +__sfr __at (0xA7) PRT3CF ; /* PORT 3 OUTPUT MODE Configuration */ +__sfr __at (0xA8) IE ; /* Interrupt Enable */ +__sfr __at (0xAD) SWCINT ; /* SOFTWARE-Controlled Interrupt FLAGS */ +__sfr __at (0xAD) PRT1IF ; /* SOFTWARE-Controlled Interrupt FLAGS (LEGACY NAME) */ +__sfr __at (0xAF) EMI0CN ; /* EXTERNAL MEMORY INTERFACE Control (F206/F226/F236)*/ +__sfr __at (0xAF) _XPAGE ; /* XDATA/PDATA PAGE */ +__sfr __at (0xB0) P3 ; /* PORT 3 */ +__sfr __at (0xB1) OSCXCN ; /* EXTERNAL OSCILLATOR Control */ +__sfr __at (0xB2) OSCICN ; /* INTERNAL OSCILLATOR Control */ +__sfr __at (0xB6) FLSCL ; /* FLASH MEMORY TIMING PRESCALER */ +__sfr __at (0xB7) FLACL ; /* FLASH ACESS LIMIT */ +__sfr __at (0xB8) IP ; /* Interrupt Priority */ +__sfr __at (0xBB) AMX0SL ; /* ADC 0 MUX CHANNEL SELECTION (Not on F230/1/6) */ +__sfr __at (0xBC) ADC0CF ; /* ADC 0 Configuration (Not on F230/1/6) */ +__sfr __at (0xBE) ADC0L ; /* ADC 0 Data LOW ( F206 only ) */ +__sfr __at (0xBF) ADC0H ; /* ADC 0 Data High */ +__sfr __at (0xC4) ADC0GTL ; /* ADC 0 GREATER-THAN Register LOW( F206 only ) */ +__sfr __at (0xC5) ADC0GTH ; /* ADC 0 GREATER-THAN Register (Not on F230/1/6) */ +__sfr __at (0xC6) ADC0LTL ; /* ADC 0 LESS-THAN Register LOW ( F206 only ) */ +__sfr __at (0xC7) ADC0LTH ; /* ADC 0 LESS-THAN Register (Not on F230/1/6) */ +__sfr __at (0xC8) T2CON ; /* TIMER 2 Control */ +__sfr __at (0xCA) RCAP2L ; /* TIMER 2 CAPTURE Register - LOW BYTE */ +__sfr __at (0xCB) RCAP2H ; /* TIMER 2 CAPTURE Register - HIGH BYTE */ +__sfr __at (0xCC) TL2 ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCD) TH2 ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xD0) PSW ; /* PROGRAM STATUS WORD */ +__sfr __at (0xD1) REF0CN ; /* VOLTAGE REFERENCE 0 Control */ +__sfr __at (0xE0) ACC ; /* ACCUMULATOR */ +__sfr __at (0xE1) PRT0MX ; /* PORT MUX Configuration Register 0 */ +__sfr __at (0xE2) PRT1MX ; /* PORT MUX Configuration Register 1 */ +__sfr __at (0xE3) PRT2MX ; /* PORT MUX Configuration Register 2 */ +__sfr __at (0xE6) EIE1 ; /* EXTERNAL Interrupt Enable 1 */ +__sfr __at (0xE7) EIE2 ; /* EXTERNAL Interrupt Enable 2 */ +__sfr __at (0xE8) ADC0CN ; /* ADC 0 Control (Not on F230/1/6) */ +__sfr __at (0xEF) RSTSRC ; /* RESET SOURCE */ +__sfr __at (0xF0) B ; /* B Register */ +__sfr __at (0xF1) P0MODE ; /* PORT 0 INPUT MODE Configuration */ +__sfr __at (0xF2) P1MODE ; /* PORT 1 INPUT MODE Configuration */ +__sfr __at (0xF3) P2MODE ; /* PORT 2 INPUT MODE Configuration */ +__sfr __at (0xF4) P3MODE ; /* PORT 3 INPUT MODE Configuration (Not on F221/F231)*/ +__sfr __at (0xF6) EIP1 ; /* EXTERNAL Interrupt Priority Register 1 */ +__sfr __at (0xF7) EIP2 ; /* EXTERNAL Interrupt Priority Register 2 */ +__sfr __at (0xF8) SPI0CN ; /* SERIAL PERIPHERAL INTERFACE 0 Control */ +__sfr __at (0xFF) WDTCN ; /* WATCHDOG TIMER Control */ + + +/* WORD/DWORD Registers */ + +__sfr16 __at (0x8C8A) TMR0 ; /* TIMER 0 COUNTER */ +__sfr16 __at (0x8D8B) TMR1 ; /* TIMER 1 COUNTER */ +__sfr16 __at (0xCDCC) TMR2 ; /* TIMER 2 COUNTER */ +__sfr16 __at (0xCBCA) RCAP2 ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0xBFBE) ADC0 ; /* ADC 0 DATA WORD */ +__sfr16 __at (0xC5C4) ADC0GT ; /* ADC 0 GREATER-THAN REGISTER WORD */ +__sfr16 __at (0xC7C6) ADC0LT ; /* ADC 0 LESS-THAN REGISTER WORD */ + + +/* BIT Registers */ + +/* P0 0x80 */ +__sbit __at (0x80) P0_0 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x84) P0_4 ; /* Port0 I/O Bits */ +__sbit __at (0x85) P0_5 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x87) P0_7 ; + +/* TCON 0x88 */ +__sbit __at (0x88) IT0 ; /* EXT. Interrupt 0 TYPE */ +__sbit __at (0x89) IE0 ; /* EXT. Interrupt 0 EDGE FLAG */ +__sbit __at (0x8A) IT1 ; /* EXT. Interrupt 1 TYPE */ +__sbit __at (0x8B) IE1 ; /* EXT. Interrupt 1 EDGE FLAG */ +__sbit __at (0x8C) TR0 ; /* TIMER 0 ON/OFF Control */ +__sbit __at (0x8D) TF0 ; /* TIMER 0 Overflow FLAG */ +__sbit __at (0x8E) TR1 ; /* TIMER 1 ON/OFF Control */ +__sbit __at (0x8F) TF1 ; /* TIMER 1 Overflow FLAG */ + +/* P1 0x90 */ +__sbit __at (0x90) P1_0 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x92) P1_2 ; +__sbit __at (0x93) P1_3 ; +__sbit __at (0x94) P1_4 ; /* Port1 I/O Bits */ +__sbit __at (0x95) P1_5 ; +__sbit __at (0x96) P1_6 ; +__sbit __at (0x97) P1_7 ; + +/* SCON 0x98 */ +__sbit __at (0x98) RI ; /* RECEIVE Interrupt FLAG */ +__sbit __at (0x99) TI ; /* TRANSMIT Interrupt FLAG */ +__sbit __at (0x9A) RB8 ; /* RECEIVE BIT 8 */ +__sbit __at (0x9B) TB8 ; /* TRANSMIT BIT 8 */ +__sbit __at (0x9C) REN ; /* RECEIVE Enable */ +__sbit __at (0x9D) SM2 ; /* MULTIPROCESSOR COMMUNICATION Enable */ +__sbit __at (0x9E) SM1 ; /* SERIAL MODE Control BIT 1 */ +__sbit __at (0x9F) SM0 ; /* SERIAL MODE Control BIT 0 */ + +/* P2 0xA0 */ +__sbit __at (0xA0) P2_0 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA4) P2_4 ; /* Port2 I/O Bits */ +__sbit __at (0xA5) P2_5 ; +__sbit __at (0xA6) P2_6 ; +__sbit __at (0xA7) P2_7 ; + +/* IE 0xA8 */ +__sbit __at (0xA8) EX0 ; /* EXTERNAL Interrupt 0 Enable */ +__sbit __at (0xA9) ET0 ; /* TIMER 0 Interrupt Enable */ +__sbit __at (0xAA) EX1 ; /* EXTERNAL Interrupt 1 Enable */ +__sbit __at (0xAB) ET1 ; /* TIMER 1 Interrupt Enable */ +__sbit __at (0xAC) ES ; /* SERIAL PORT Interrupt Enable */ +__sbit __at (0xAD) ET2 ; /* TIMER 2 Interrupt Enable */ +//------------- /* Bit 6 not used */ +__sbit __at (0xAF) EA ; /* GLOBAL Interrupt Enable */ + +/* P2 0xB0 */ +__sbit __at (0xB0) P3_0 ; +__sbit __at (0xB1) P3_1 ; +__sbit __at (0xB2) P3_2 ; +__sbit __at (0xB3) P3_3 ; +__sbit __at (0xB4) P3_4 ; /* Port3 I/O Bits */ +__sbit __at (0xB5) P3_5 ; +__sbit __at (0xB6) P3_6 ; +__sbit __at (0xB7) P3_7 ; + +/* IP 0xB8 */ +__sbit __at (0xB8) PX0 ; /* EXTERNAL Interrupt 0 Priority */ +__sbit __at (0xB9) PT0 ; /* TIMER 0 Priority */ +__sbit __at (0xBA) PX1 ; /* EXTERNAL Interrupt 1 Priority */ +__sbit __at (0xBB) PT1 ; /* TIMER 1 Priority */ +__sbit __at (0xBC) PS ; /* SERIAL PORT Priority */ +__sbit __at (0xBD) PT2 ; /* TIMER 2 Priority */ +//------------- /* Bit 6 not used */ +//------------- /* Bit 7 not used */ + +/* T2CON 0xC8 */ +__sbit __at (0xC8) CPRL2 ; /* CAPTURE OR RELOAD SELECT */ +__sbit __at (0xC9) CT2 ; /* TIMER OR COUNTER SELECT */ +__sbit __at (0xCA) TR2 ; /* TIMER 2 ON/OFF Control */ +__sbit __at (0xCB) EXEN2 ; /* TIMER 2 EXTERNAL Enable FLAG */ +__sbit __at (0xCC) TCLK ; /* TRANSMIT CLOCK FLAG */ +__sbit __at (0xCD) RCLK ; /* RECEIVE CLOCK FLAG */ +__sbit __at (0xCE) EXF2 ; /* EXTERNAL FLAG */ +__sbit __at (0xCF) TF2 ; /* TIMER 2 Overflow FLAG */ + +/* PSW 0xD0 */ +__sbit __at (0xD0) P ; /* ACCUMULATOR PARITY FLAG */ +__sbit __at (0xD1) F1 ; /* USER FLAG 1 */ +__sbit __at (0xD2) OV ; /* Overflow FLAG */ +__sbit __at (0xD3) RS0 ; /* Register BANK SELECT 0 */ +__sbit __at (0xD4) RS1 ; /* Register BANK SELECT 1 */ +__sbit __at (0xD5) F0 ; /* USER FLAG 0 */ +__sbit __at (0xD6) AC ; /* AUXILIARY CARRY FLAG */ +__sbit __at (0xD7) CY ; /* CARRY FLAG */ + +/* ADC0CN 0xE8 */ +__sbit __at (0xE8) ADLJST ; /* Left Justify Data (F206 only) */ +__sbit __at (0xE9) ADWINT ; /* WINDOW COMPARE Interrupt FLAG */ +__sbit __at (0xEA) ADSTM0 ; /* START OF CONVERSION MODE BIT 0 */ +__sbit __at (0xEB) ADSTM1 ; /* START OF CONVERSION MODE BIT 1 */ +__sbit __at (0xEC) ADBUSY ; /* BUSY FLAG */ +__sbit __at (0xED) ADCINT ; /* CONVERISION COMPLETE Interrupt FLAG */ +__sbit __at (0xEE) ADCTM ; /* TRACK MODE */ +__sbit __at (0xEF) ADCEN ; /* Enable */ + +/* SPI0CN 0xF8 */ +__sbit __at (0xF8) SPIEN ; /* SPI Enable */ +__sbit __at (0xF9) MSTEN ; /* MASTER Enable */ +__sbit __at (0xFA) SLVSEL ; /* SLAVE SELECT */ +__sbit __at (0xFB) TXBSY ; /* TX BUSY FLAG */ +__sbit __at (0xFC) RXOVRN ; /* RX OVERRUN FLAG */ +__sbit __at (0xFD) MODF ; /* MODE FAULT FLAG */ +__sbit __at (0xFE) WCOL ; /* WRITE COLLISION FLAG */ +__sbit __at (0xFF) SPIF ; /* Interrupt FLAG */ + +#endif diff --git a/device/include/mcs51/C8051F300.h b/device/include/mcs51/C8051F300.h new file mode 100644 index 0000000..ebeb836 --- /dev/null +++ b/device/include/mcs51/C8051F300.h @@ -0,0 +1,258 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Cygnal/SiLabs C8051F30x Processor Range + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051F300_H +#define C8051F300_H + + +/* BYTE Registers */ + +__sfr __at (0x80) P0 ; /* PORT 0 */ +__sfr __at (0x81) SP ; /* STACK POINTER */ +__sfr __at (0x82) DPL ; /* DATA POINTER - LOW BYTE */ +__sfr __at (0x83) DPH ; /* DATA POINTER - HIGH BYTE */ +__sfr __at (0x87) PCON ; /* POWER CONTROL */ +__sfr __at (0x88) TCON ; /* TIMER CONTROL */ +__sfr __at (0x89) TMOD ; /* TIMER MODE */ +__sfr __at (0x8A) TL0 ; /* TIMER 0 - LOW BYTE */ +__sfr __at (0x8B) TL1 ; /* TIMER 1 - LOW BYTE */ +__sfr __at (0x8C) TH0 ; /* TIMER 0 - HIGH BYTE */ +__sfr __at (0x8D) TH1 ; /* TIMER 1 - HIGH BYTE */ +__sfr __at (0x8E) CKCON ; /* CLOCK CONTROL */ +__sfr __at (0x8F) PSCTL ; /* PROGRAM STORE R/W CONTROL */ +__sfr __at (0x98) SCON ; /* SERIAL PORT CONTROL */ +__sfr __at (0x98) SCON0 ; /* SERIAL PORT CONTROL */ +__sfr __at (0x99) SBUF ; /* SERIAL PORT BUFFER */ +__sfr __at (0x99) SBUF0 ; /* SERIAL PORT BUFFER */ +__sfr __at (0x9D) CPT0MD ; /* COMPARATOR 0 MODE SELECTION */ +__sfr __at (0x9F) CPT0MX ; /* COMPARATOR 0 MUX SELECTION */ +__sfr __at (0xA4) P0MDOUT ; /* PORT 0 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA8) IE ; /* INTERRUPT ENABLE */ +__sfr __at (0xB1) OSCXCN ; /* EXTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB2) OSCICN ; /* INTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB3) OSCICL ; /* INTERNAL OSCILLATOR CALIBRATION */ +__sfr __at (0xB6) FLSCL ; /* FLASH MEMORY TIMING PRESCALER */ +__sfr __at (0xB7) FLKEY ; /* FLASH ACESS LIMIT */ +__sfr __at (0xB8) IP ; /* INTERRUPT PRIORITY */ +__sfr __at (0xBB) AMX0SL ; /* ADC 0 MUX CHANNEL SELECTION */ +__sfr __at (0xBC) ADC0CF ; /* ADC 0 CONFIGURATION */ +__sfr __at (0xBE) ADC0 ; /* ADC 0 DATA */ +__sfr __at (0xC0) SMB0CN ; /* SMBUS CONTROL */ +__sfr __at (0xC1) SMB0CF ; /* SMBUS CONFIGURATION */ +__sfr __at (0xC2) SMB0DAT ; /* SMBUS DATA */ +__sfr __at (0xC4) ADC0GT ; /* ADC 0 GREATER-THAN REGISTER */ +__sfr __at (0xC6) ADC0LT ; /* ADC 0 LESS-THAN REGISTER */ +__sfr __at (0xC8) T2CON ; /* TIMER 2 CONTROL */ +__sfr __at (0xC8) TMR2CN ; /* TIMER 2 CONTROL */ +__sfr __at (0xCA) RCAP2L ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCA) TMR2RLL ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCB) RCAP2H ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCB) TMR2RLH ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCC) TL2 ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCC) TMR2L ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCD) TH2 ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xCD) TMR2H ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xD0) PSW ; /* PROGRAM STATUS WORD */ +__sfr __at (0xD1) REF0CN ; /* VOLTAGE REFERENCE 0 CONTROL */ +__sfr __at (0xD8) PCA0CN ; /* PCA CONTROL */ +__sfr __at (0xD9) PCA0MD ; /* PCA MODE */ +__sfr __at (0xDA) PCA0CPM0 ; /* PCA MODULE 0 MODE REGISTER */ +__sfr __at (0xDB) PCA0CPM1 ; /* PCA MODULE 1 MODE REGISTER */ +__sfr __at (0xDC) PCA0CPM2 ; /* PCA MODULE 2 MODE REGISTER */ +__sfr __at (0xE0) ACC ; /* ACCUMULATOR */ +__sfr __at (0xE1) PRT0MX ; /* PORT MUX CONFIGURATION REGISTER 0 */ +__sfr __at (0xE1) XBR0 ; /* PORT MUX CONFIGURATION REGISTER 0 */ +__sfr __at (0xE2) PRT1MX ; /* PORT MUX CONFIGURATION REGISTER 1 */ +__sfr __at (0xE2) XBR1 ; /* PORT MUX CONFIGURATION REGISTER 1 */ +__sfr __at (0xE3) PRT2MX ; /* PORT MUX CONFIGURATION REGISTER 2 */ +__sfr __at (0xE3) XBR2 ; /* PORT MUX CONFIGURATION REGISTER 2 */ +__sfr __at (0xE4) IT01CF ; /* INT0/INT1 CONFIGURATION REGISTER */ +__sfr __at (0xE4) INT01CF ; /* INT0/INT1 CONFIGURATION REGISTER */ +__sfr __at (0xE6) EIE1 ; /* EXTERNAL INTERRUPT ENABLE 1 */ +__sfr __at (0xE8) ADC0CN ; /* ADC 0 CONTROL */ +__sfr __at (0xE9) PCA0CPL1 ; /* PCA CAPTURE 1 LOW */ +__sfr __at (0xEA) PCA0CPH1 ; /* PCA CAPTURE 1 HIGH */ +__sfr __at (0xEB) PCA0CPL2 ; /* PCA CAPTURE 2 LOW */ +__sfr __at (0xEC) PCA0CPH2 ; /* PCA CAPTURE 2 HIGH */ +__sfr __at (0xEF) RSTSRC ; /* RESET SOURCE */ +__sfr __at (0xF0) B ; /* B REGISTER */ +__sfr __at (0xF1) P0MODE ; /* PORT 0 INPUT MODE CONFIGURATION */ +__sfr __at (0xF1) P0MDIN ; /* PORT 0 INPUT MODE CONFIGURATION */ +__sfr __at (0xF6) EIP1 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +__sfr __at (0xF8) CPT0CN ; /* COMPARATOR 0 CONTROL */ +__sfr __at (0xF9) PCA0L ; /* PCA COUNTER LOW */ +__sfr __at (0xFA) PCA0H ; /* PCA COUNTER HIGH */ +__sfr __at (0xFB) PCA0CPL0 ; /* PCA CAPTURE 0 LOW */ +__sfr __at (0xFC) PCA0CPH0 ; /* PCA CAPTURE 0 HIGH */ + + +/* WORD/DWORD Registers */ + +__sfr16 __at (0x8C8A) TMR0 ; /* TIMER 0 COUNTER */ +__sfr16 __at (0x8D8B) TMR1 ; /* TIMER 1 COUNTER */ +__sfr16 __at (0xCDCC) TMR2 ; /* TIMER 2 COUNTER */ +__sfr16 __at (0xCBCA) RCAP2 ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0xCBCA) TMR2RL ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0xFAF9) PCA0 ; /* PCA COUNTER */ +__sfr16 __at (0xFCFB) PCA0CP0 ; /* PCA CAPTURE 0 WORD */ +__sfr16 __at (0xEAE9) PCA0CP1 ; /* PCA CAPTURE 1 WORD */ +__sfr16 __at (0xECEB) PCA0CP2 ; /* PCA CAPTURE 2 WORD */ + + +/* BIT Registers */ + +/* P0 0x80 */ +__sbit __at (0x80) P0_0 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x87) P0_7 ; + +/* TCON 0x88 */ +__sbit __at (0x88) IT0 ; /* TCON.0 - EXT. INTERRUPT 0 TYPE */ +__sbit __at (0x89) IE0 ; /* TCON.1 - EXT. INTERRUPT 0 EDGE FLAG */ +__sbit __at (0x8A) IT1 ; /* TCON.2 - EXT. INTERRUPT 1 TYPE */ +__sbit __at (0x8B) IE1 ; /* TCON.3 - EXT. INTERRUPT 1 EDGE FLAG */ +__sbit __at (0x8C) TR0 ; /* TCON.4 - TIMER 0 ON/OFF CONTROL */ +__sbit __at (0x8D) TF0 ; /* TCON.5 - TIMER 0 OVERFLOW FLAG */ +__sbit __at (0x8E) TR1 ; /* TCON.6 - TIMER 1 ON/OFF CONTROL */ +__sbit __at (0x8F) TF1 ; /* TCON.7 - TIMER 1 OVERFLOW FLAG */ + +/* SCON 0x98 */ +__sbit __at (0x98) RI ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x98) RI0 ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x99) TI ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x99) TI0 ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x9A) RB8 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9A) RB80 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9B) TB8 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9B) TB80 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9C) REN ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9C) REN0 ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9D) SM2 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9D) MCE0 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9F) SM0 ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ +__sbit __at (0x9F) S0MODE ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ + +/* IE 0xA8 */ +__sbit __at (0xA8) EX0 ; /* IE.0 - EXTERNAL INTERRUPT 0 ENABLE */ +__sbit __at (0xA9) ET0 ; /* IE.1 - TIMER 0 INTERRUPT ENABLE */ +__sbit __at (0xAA) EX1 ; /* IE.2 - EXTERNAL INTERRUPT 1 ENABLE */ +__sbit __at (0xAB) ET1 ; /* IE.3 - TIMER 1 INTERRUPT ENABLE */ +__sbit __at (0xAC) ES ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAC) ES0 ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAD) ET2 ; /* IE.5 - TIMER 2 INTERRUPT ENABLE */ +__sbit __at (0xAE) IEGF0 ; /* IE.6 - GENERAL PURPOSE FLAG 0 */ +__sbit __at (0xAF) EA ; /* IE.7 - GLOBAL INTERRUPT ENABLE */ + +/* IP 0xB8 */ +__sbit __at (0xB8) PX0 ; /* IP.0 - EXTERNAL INTERRUPT 0 PRIORITY */ +__sbit __at (0xB9) PT0 ; /* IP.1 - TIMER 0 PRIORITY */ +__sbit __at (0xBA) PX1 ; /* IP.2 - EXTERNAL INTERRUPT 1 PRIORITY */ +__sbit __at (0xBB) PT1 ; /* IP.3 - TIMER 1 PRIORITY */ +__sbit __at (0xBC) PS ; /* IP.4 - SERIAL PORT PRIORITY */ +__sbit __at (0xBC) PS0 ; /* IP.4 - SERIAL PORT PRIORITY */ +__sbit __at (0xBD) PT2 ; /* IP.5 - TIMER 2 PRIORITY */ + +/* SMB0CN 0xC0 */ +__sbit __at (0xC0) SI ; /* SMB0CN.0 - SMBUS 0 INTERRUPT PENDING FLAG */ +__sbit __at (0xC1) ACK ; /* SMB0CN.1 - SMBUS 0 ACKNOWLEDGE FLAG */ +__sbit __at (0xC2) ARBLOST ; /* SMB0CN.2 - SMBUS 0 ARBITRATION LOST INDICATOR */ +__sbit __at (0xC3) ACKRQ ; /* SMB0CN.3 - SMBUS 0 ACKNOWLEDGE REQUEST */ +__sbit __at (0xC4) STO ; /* SMB0CN.4 - SMBUS 0 STOP FLAG */ +__sbit __at (0xC5) STA ; /* SMB0CN.5 - SMBUS 0 START FLAG */ +__sbit __at (0xC6) TXMODE ; /* SMB0CN.6 - SMBUS 0 TRANSMIT MODE INDICATOR */ +__sbit __at (0xC7) MASTER ; /* SMB0CN.7 - SMBUS 0 MASTER/SLAVE INDICATOR */ + +/* TMR2CN 0xC8 */ +__sbit __at (0xC8) T2XCLK ; /* TMR2CN.0 - TIMER 2 EXTERNAL CLOCK SELECT */ +__sbit __at (0xCA) TR2 ; /* TMR2CN.2 - TIMER 2 ON/OFF CONTROL */ +__sbit __at (0xCB) T2SPLIT ; /* TMR2CN.3 - TIMER 2 SPLIT MODE ENABLE */ +__sbit __at (0xCD) TF2LEN ; /* TMR2CN.5 - TIMER 2 LOW BYTE INTERRUPT ENABLE */ +__sbit __at (0xCE) TF2L ; /* TMR2CN.6 - TIMER 2 LOW BYTE OVERFLOW FLAG */ +__sbit __at (0xCF) TF2 ; /* TMR2CN.7 - TIMER 2 OVERFLOW FLAG */ +__sbit __at (0xCF) TF2H ; /* TMR2CN.7 - TIMER 2 HIGH BYTE OVERFLOW FLAG */ + +/* PSW 0xD0 */ +__sbit __at (0xD0) PARITY ; /* PSW.0 - ACCUMULATOR PARITY FLAG */ +__sbit __at (0xD1) F1 ; /* PSW.1 - FLAG 1 */ +__sbit __at (0xD2) OV ; /* PSW.2 - OVERFLOW FLAG */ +__sbit __at (0xD3) RS0 ; /* PSW.3 - REGISTER BANK SELECT 0 */ +__sbit __at (0xD4) RS1 ; /* PSW.4 - REGISTER BANK SELECT 1 */ +__sbit __at (0xD5) F0 ; /* PSW.5 - FLAG 0 */ +__sbit __at (0xD6) AC ; /* PSW.6 - AUXILIARY CARRY FLAG */ +__sbit __at (0xD7) CY ; /* PSW.7 - CARRY FLAG */ + +/* PCA0CN 0xD8 */ +__sbit __at (0xD8) CCF0 ; /* PCA0CN.0 - PCA MODULE 0 CAPTURE/COMPARE FLAG */ +__sbit __at (0xD9) CCF1 ; /* PCA0CN.1 - PCA MODULE 1 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDA) CCF2 ; /* PCA0CN.2 - PCA MODULE 2 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDE) CR ; /* PCA0CN.6 - PCA COUNTER/TIMER RUN CONTROL */ +__sbit __at (0xDF) CF ; /* PCA0CN.7 - PCA COUNTER/TIMER OVERFLOW FLAG */ + +/* ADC0CN 0xE8 */ +__sbit __at (0xE8) AD0CM0 ; /* ADC0CN.0 - ADC 0 START OF CONV. MODE BIT 0 */ +__sbit __at (0xE9) AD0CM1 ; /* ADC0CN.1 - ADC 0 START OF CONV. MODE BIT 1 */ +__sbit __at (0xEA) AD0CM2 ; /* ADC0CN.2 - ADC 0 START OF CONV. MODE BIT 2 */ +__sbit __at (0xEB) AD0WINT ; /* ADC0CN.3 - ADC 0 WINDOW COMPARE INT. FLAG */ +__sbit __at (0xEC) AD0BUSY ; /* ADC0CN.4 - ADC 0 BUSY FLAG */ +__sbit __at (0xED) AD0INT ; /* ADC0CN.5 - ADC 0 CONV. COMPLETE INT. FLAG */ +__sbit __at (0xEE) AD0TM ; /* ADC0CN.6 - ADC 0 TRACK MODE */ +__sbit __at (0xEF) AD0EN ; /* ADC0CN.7 - ADC 0 ENABLE */ + +/* CPT0CN 0xF8 */ +__sbit __at (0xF8) CP0HYN0 ; /* CPT0CN.0 - Comp.0 Neg. Hysteresis Control Bit0*/ +__sbit __at (0xF9) CP0HYN1 ; /* CPT0CN.1 - Comp.0 Neg. Hysteresis Control Bit1*/ +__sbit __at (0xFA) CP0HYP0 ; /* CPT0CN.2 - Comp.0 Pos. Hysteresis Control Bit0*/ +__sbit __at (0xFB) CP0HYP1 ; /* CPT0CN.3 - Comp.0 Pos. Hysteresis Control Bit1*/ +__sbit __at (0xFC) CP0FIF ; /* CPT0CN.4 - Comparator0 Falling-Edge Int. Flag */ +__sbit __at (0xFD) CP0RIF ; /* CPT0CN.5 - Comparator0 Rising-Edge Int. Flag */ +__sbit __at (0xFE) CP0OUT ; /* CPT0CN.6 - Comparator0 Output State Flag */ +__sbit __at (0xFF) CP0EN ; /* CPT0CN.7 - Comparator0 Enable Bit */ + + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define T1M 0x10 /* CKCON */ +#define PSWE 0x01 /* PSCTL */ +#define PSEE 0x02 /* PSCTL */ +#define ECP0F 0x10 /* EIE1 */ +#define ECP0R 0x20 /* EIE1 */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define CP0E 0x10 /* XBR1 */ +#define CP0OEN 0x10 /* XBR1 */ +#define CP0AE 0x20 /* XBR1 */ +#define CP0AOEN 0x20 /* XBR1 */ + +#endif diff --git a/device/include/mcs51/C8051F310.h b/device/include/mcs51/C8051F310.h new file mode 100644 index 0000000..b520aa7 --- /dev/null +++ b/device/include/mcs51/C8051F310.h @@ -0,0 +1,337 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Cygnal/SiLabs C8051F31x Processor Range + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051F310_H +#define C8051F310_H + + +/* BYTE Registers */ + +__sfr __at (0x80) P0 ; /* PORT 0 */ +__sfr __at (0x81) SP ; /* STACK POINTER */ +__sfr __at (0x82) DPL ; /* DATA POINTER - LOW BYTE */ +__sfr __at (0x83) DPH ; /* DATA POINTER - HIGH BYTE */ +__sfr __at (0x87) PCON ; /* POWER CONTROL */ +__sfr __at (0x88) TCON ; /* TIMER CONTROL */ +__sfr __at (0x89) TMOD ; /* TIMER MODE */ +__sfr __at (0x8A) TL0 ; /* TIMER 0 - LOW BYTE */ +__sfr __at (0x8B) TL1 ; /* TIMER 1 - LOW BYTE */ +__sfr __at (0x8C) TH0 ; /* TIMER 0 - HIGH BYTE */ +__sfr __at (0x8D) TH1 ; /* TIMER 1 - HIGH BYTE */ +__sfr __at (0x8E) CKCON ; /* CLOCK CONTROL */ +__sfr __at (0x8F) PSCTL ; /* PROGRAM STORE R/W CONTROL */ +__sfr __at (0x90) P1 ; /* PORT 1 */ +__sfr __at (0x91) TMR3CN ; /* TIMER 3 CONTROL */ +__sfr __at (0x92) TMR3RLL ; /* TIMER 3 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0x93) TMR3RLH ; /* TIMER 3 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0x94) TMR3L ; /* TIMER 3 - LOW BYTE */ +__sfr __at (0x95) TMR3H ; /* TIMER 3 - HIGH BYTE */ +__sfr __at (0x98) SCON ; /* SERIAL PORT CONTROL */ +__sfr __at (0x98) SCON0 ; /* SERIAL PORT CONTROL */ +__sfr __at (0x99) SBUF ; /* SERIAL PORT BUFFER */ +__sfr __at (0x99) SBUF0 ; /* SERIAL PORT BUFFER */ +__sfr __at (0x9A) CPT1CN ; /* COMPARATOR 1 CONTROL */ +__sfr __at (0x9B) CPT0CN ; /* COMPARATOR 0 CONTROL */ +__sfr __at (0x9C) CPT1MD ; /* COMPARATOR 1 MODE SELECTION */ +__sfr __at (0x9D) CPT0MD ; /* COMPARATOR 0 MODE SELECTION */ +__sfr __at (0x9E) CPT1MX ; /* COMPARATOR 1 MUX SELECTION */ +__sfr __at (0x9F) CPT0MX ; /* COMPARATOR 0 MUX SELECTION */ +__sfr __at (0xA0) P2 ; /* PORT 2 */ +__sfr __at (0xA1) SPI0CFG ; /* SPI0 CONFIGURATION */ +__sfr __at (0xA2) SPI0CKR ; /* SPI0 CLOCK RATE CONTROL */ +__sfr __at (0xA3) SPI0DAT ; /* SPI0 DATA */ +__sfr __at (0xA4) P0MDOUT ; /* PORT 0 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA5) P1MDOUT ; /* PORT 1 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA6) P2MDOUT ; /* PORT 2 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA7) P3MDOUT ; /* PORT 3 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA8) IE ; /* INTERRUPT ENABLE */ +__sfr __at (0xA9) CLKSEL ; /* SYSTEM CLOCK SELECT */ +__sfr __at (0xAA) EMI0CN ; /* EXTERNAL MEMORY INTERFACE CONTROL */ +__sfr __at (0xAA) _XPAGE ; /* XDATA/PDATA PAGE */ +__sfr __at (0xB0) P3 ; /* PORT 3 */ +__sfr __at (0xB1) OSCXCN ; /* EXTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB2) OSCICN ; /* INTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB3) OSCICL ; /* INTERNAL OSCILLATOR CALIBRATION */ +__sfr __at (0xB6) FLSCL ; /* FLASH MEMORY TIMING PRESCALER */ +__sfr __at (0xB7) FLKEY ; /* FLASH ACESS LIMIT */ +__sfr __at (0xB8) IP ; /* INTERRUPT PRIORITY */ +__sfr __at (0xBA) AMX0N ; /* ADC 0 MUX NEGATIVE CHANNEL SELECTION */ +__sfr __at (0xBB) AMX0P ; /* ADC 0 MUX POSITIVE CHANNEL SELECTION */ +__sfr __at (0xBC) ADC0CF ; /* ADC 0 CONFIGURATION */ +__sfr __at (0xBD) ADC0L ; /* ADC 0 DATA WORD LSB */ +__sfr __at (0xBE) ADC0H ; /* ADC 0 DATA WORD MSB */ +__sfr __at (0xC0) SMB0CN ; /* SMBUS CONTROL */ +__sfr __at (0xC1) SMB0CF ; /* SMBUS CONFIGURATION */ +__sfr __at (0xC2) SMB0DAT ; /* SMBUS DATA */ +__sfr __at (0xC3) ADC0GTL ; /* ADC 0 GREATER-THAN LOW BYTE */ +__sfr __at (0xC4) ADC0GTH ; /* ADC 0 GREATER-THAN HIGH BYTE */ +__sfr __at (0xC5) ADC0LTL ; /* ADC 0 LESS-THAN LOW BYTE */ +__sfr __at (0xC6) ADC0LTH ; /* ADC 0 LESS-THAN HIGH BYTE */ +__sfr __at (0xC8) T2CON ; /* TIMER 2 CONTROL */ +__sfr __at (0xC8) TMR2CN ; /* TIMER 2 CONTROL */ +__sfr __at (0xCA) RCAP2L ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCA) TMR2RLL ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCB) RCAP2H ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCB) TMR2RLH ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCC) TL2 ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCC) TMR2L ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCD) TH2 ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xCD) TMR2H ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xD0) PSW ; /* PROGRAM STATUS WORD */ +__sfr __at (0xD1) REF0CN ; /* VOLTAGE REFERENCE 0 CONTROL */ +__sfr __at (0xD4) P0SKIP ; /* PORT 0 SKIP */ +__sfr __at (0xD5) P1SKIP ; /* PORT 1 SKIP */ +__sfr __at (0xD6) P2SKIP ; /* PORT 2 SKIP */ +__sfr __at (0xD8) PCA0CN ; /* PCA CONTROL */ +__sfr __at (0xD9) PCA0MD ; /* PCA MODE */ +__sfr __at (0xDA) PCA0CPM0 ; /* PCA MODULE 0 MODE REGISTER */ +__sfr __at (0xDB) PCA0CPM1 ; /* PCA MODULE 1 MODE REGISTER */ +__sfr __at (0xDC) PCA0CPM2 ; /* PCA MODULE 2 MODE REGISTER */ +__sfr __at (0xDD) PCA0CPM3 ; /* PCA MODULE 3 MODE REGISTER */ +__sfr __at (0xDE) PCA0CPM4 ; /* PCA MODULE 4 MODE REGISTER */ +__sfr __at (0xE0) ACC ; /* ACCUMULATOR */ +__sfr __at (0xE1) XBR0 ; /* PORT MUX CONFIGURATION REGISTER 0 */ +__sfr __at (0xE2) XBR1 ; /* PORT MUX CONFIGURATION REGISTER 1 */ +__sfr __at (0xE4) IT01CF ; /* INT0/INT1 CONFIGURATION REGISTER */ +__sfr __at (0xE4) INT01CF ; /* INT0/INT1 CONFIGURATION REGISTER */ +__sfr __at (0xE6) EIE1 ; /* EXTERNAL INTERRUPT ENABLE 1 */ +__sfr __at (0xE8) ADC0CN ; /* ADC 0 CONTROL */ +__sfr __at (0xE9) PCA0CPL1 ; /* PCA CAPTURE 1 LOW */ +__sfr __at (0xEA) PCA0CPH1 ; /* PCA CAPTURE 1 HIGH */ +__sfr __at (0xEB) PCA0CPL2 ; /* PCA CAPTURE 2 LOW */ +__sfr __at (0xEC) PCA0CPH2 ; /* PCA CAPTURE 2 HIGH */ +__sfr __at (0xED) PCA0CPL3 ; /* PCA CAPTURE 3 LOW */ +__sfr __at (0xEE) PCA0CPH3 ; /* PCA CAPTURE 3 HIGH */ +__sfr __at (0xEF) RSTSRC ; /* RESET SOURCE */ +__sfr __at (0xF0) B ; /* B REGISTER */ +__sfr __at (0xF1) P0MODE ; /* PORT 0 INPUT MODE CONFIGURATION */ +__sfr __at (0xF1) P0MDIN ; /* PORT 0 INPUT MODE CONFIGURATION */ +__sfr __at (0xF2) P1MODE ; /* PORT 1 INPUT MODE CONFIGURATION */ +__sfr __at (0xF2) P1MDIN ; /* PORT 1 INPUT MODE CONFIGURATION */ +__sfr __at (0xF3) P2MODE ; /* PORT 2 INPUT MODE CONFIGURATION */ +__sfr __at (0xF3) P2MDIN ; /* PORT 2 INPUT MODE CONFIGURATION */ +__sfr __at (0xF4) P3MODE ; /* PORT 3 INPUT MODE CONFIGURATION */ +__sfr __at (0xF4) P3MDIN ; /* PORT 3 INPUT MODE CONFIGURATION */ +__sfr __at (0xF6) EIP1 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +__sfr __at (0xF8) SPI0CN ; /* SPI0 CONTROL */ +__sfr __at (0xF9) PCA0L ; /* PCA COUNTER LOW */ +__sfr __at (0xFA) PCA0H ; /* PCA COUNTER HIGH */ +__sfr __at (0xFB) PCA0CPL0 ; /* PCA CAPTURE 0 LOW */ +__sfr __at (0xFC) PCA0CPH0 ; /* PCA CAPTURE 0 HIGH */ +__sfr __at (0xFD) PCA0CPL4 ; /* PCA CAPTURE 4 LOW */ +__sfr __at (0xFE) PCA0CPH4 ; /* PCA CAPTURE 4 HIGH */ +__sfr __at (0xFF) VDM0CN ; /* VDD MONITOR CONTROL */ + + +/* WORD/DWORD Registers */ + +__sfr16 __at (0x8C8A) TMR0 ; /* TIMER 0 COUNTER */ +__sfr16 __at (0x8D8B) TMR1 ; /* TIMER 1 COUNTER */ +__sfr16 __at (0xCDCC) TMR2 ; /* TIMER 2 COUNTER */ +__sfr16 __at (0xCBCA) RCAP2 ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0xCBCA) TMR2RL ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0x9594) TMR3 ; /* TIMER 3 COUNTER */ +__sfr16 __at (0x9392) TMR3RL ; /* TIMER 3 CAPTURE REGISTER WORD */ +__sfr16 __at (0xBEBD) ADC0 ; /* ADC 0 DATA WORD */ +__sfr16 __at (0xC4C3) ADC0GT ; /* ADC 0 GREATER-THAN REGISTER WORD */ +__sfr16 __at (0xC6C5) ADC0LT ; /* ADC 0 LESS-THAN REGISTER WORD */ +__sfr16 __at (0xFAF9) PCA0 ; /* PCA COUNTER */ +__sfr16 __at (0xFCFB) PCA0CP0 ; /* PCA CAPTURE 0 WORD */ +__sfr16 __at (0xEAE9) PCA0CP1 ; /* PCA CAPTURE 1 WORD */ +__sfr16 __at (0xECEB) PCA0CP2 ; /* PCA CAPTURE 2 WORD */ +__sfr16 __at (0xEEED) PCA0CP3 ; /* PCA CAPTURE 3 WORD */ +__sfr16 __at (0xFEFD) PCA0CP4 ; /* PCA CAPTURE 4 WORD */ + + +/* BIT Registers */ + +/* P0 0x80 */ +__sbit __at (0x80) P0_0 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x87) P0_7 ; + +/* TCON 0x88 */ +__sbit __at (0x88) IT0 ; /* TCON.0 - EXT. INTERRUPT 0 TYPE */ +__sbit __at (0x89) IE0 ; /* TCON.1 - EXT. INTERRUPT 0 EDGE FLAG */ +__sbit __at (0x8A) IT1 ; /* TCON.2 - EXT. INTERRUPT 1 TYPE */ +__sbit __at (0x8B) IE1 ; /* TCON.3 - EXT. INTERRUPT 1 EDGE FLAG */ +__sbit __at (0x8C) TR0 ; /* TCON.4 - TIMER 0 ON/OFF CONTROL */ +__sbit __at (0x8D) TF0 ; /* TCON.5 - TIMER 0 OVERFLOW FLAG */ +__sbit __at (0x8E) TR1 ; /* TCON.6 - TIMER 1 ON/OFF CONTROL */ +__sbit __at (0x8F) TF1 ; /* TCON.7 - TIMER 1 OVERFLOW FLAG */ + +/* P1 0x90 */ +__sbit __at (0x90) P1_0 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x92) P1_2 ; +__sbit __at (0x93) P1_3 ; +__sbit __at (0x94) P1_4 ; +__sbit __at (0x95) P1_5 ; +__sbit __at (0x96) P1_6 ; +__sbit __at (0x97) P1_7 ; + +/* SCON 0x98 */ +__sbit __at (0x98) RI ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x98) RI0 ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x99) TI ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x99) TI0 ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x9A) RB8 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9A) RB80 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9B) TB8 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9B) TB80 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9C) REN ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9C) REN0 ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9D) SM2 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9D) MCE0 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9F) SM0 ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ +__sbit __at (0x9F) S0MODE ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ + +/* P2 0xA0 */ +__sbit __at (0xA0) P2_0 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA4) P2_4 ; +__sbit __at (0xA5) P2_5 ; +__sbit __at (0xA6) P2_6 ; +__sbit __at (0xA7) P2_7 ; + +/* IE 0xA8 */ +__sbit __at (0xA8) EX0 ; /* IE.0 - EXTERNAL INTERRUPT 0 ENABLE */ +__sbit __at (0xA9) ET0 ; /* IE.1 - TIMER 0 INTERRUPT ENABLE */ +__sbit __at (0xAA) EX1 ; /* IE.2 - EXTERNAL INTERRUPT 1 ENABLE */ +__sbit __at (0xAB) ET1 ; /* IE.3 - TIMER 1 INTERRUPT ENABLE */ +__sbit __at (0xAC) ES ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAC) ES0 ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAD) ET2 ; /* IE.5 - TIMER 2 INTERRUPT ENABLE */ +__sbit __at (0xAE) ESPI0 ; /* IE.6 - SPI0 INTERRUPT ENABLE */ +__sbit __at (0xAF) EA ; /* IE.7 - GLOBAL INTERRUPT ENABLE */ + +/* P3 0xB0 */ +__sbit __at (0xB0) P3_0 ; +__sbit __at (0xB1) P3_1 ; +__sbit __at (0xB2) P3_2 ; +__sbit __at (0xB3) P3_3 ; +__sbit __at (0xB4) P3_4 ; +__sbit __at (0xB5) P3_5 ; +__sbit __at (0xB6) P3_6 ; +__sbit __at (0xB7) P3_7 ; + +/* IP 0xB8 */ +__sbit __at (0xB8) PX0 ; /* IP.0 - EXTERNAL INTERRUPT 0 PRIORITY */ +__sbit __at (0xB9) PT0 ; /* IP.1 - TIMER 0 PRIORITY */ +__sbit __at (0xBA) PX1 ; /* IP.2 - EXTERNAL INTERRUPT 1 PRIORITY */ +__sbit __at (0xBB) PT1 ; /* IP.3 - TIMER 1 PRIORITY */ +__sbit __at (0xBC) PS ; /* IP.4 - SERIAL PORT PRIORITY */ +__sbit __at (0xBC) PS0 ; /* IP.4 - SERIAL PORT PRIORITY */ +__sbit __at (0xBD) PT2 ; /* IP.5 - TIMER 2 PRIORITY */ +__sbit __at (0xBE) PSPI0 ; /* IP.6 - SPI0 PRIORITY */ + +/* SMB0CN 0xC0 */ +__sbit __at (0xC0) SI ; /* SMB0CN.0 - SMBUS 0 INTERRUPT PENDING FLAG */ +__sbit __at (0xC1) ACK ; /* SMB0CN.1 - SMBUS 0 ACKNOWLEDGE FLAG */ +__sbit __at (0xC2) ARBLOST ; /* SMB0CN.2 - SMBUS 0 ARBITRATION LOST INDICATOR */ +__sbit __at (0xC3) ACKRQ ; /* SMB0CN.3 - SMBUS 0 ACKNOWLEDGE REQUEST */ +__sbit __at (0xC4) STO ; /* SMB0CN.4 - SMBUS 0 STOP FLAG */ +__sbit __at (0xC5) STA ; /* SMB0CN.5 - SMBUS 0 START FLAG */ +__sbit __at (0xC6) TXMODE ; /* SMB0CN.6 - SMBUS 0 TRANSMIT MODE INDICATOR */ +__sbit __at (0xC7) MASTER ; /* SMB0CN.7 - SMBUS 0 MASTER/SLAVE INDICATOR */ + +/* TMR2CN 0xC8 */ +__sbit __at (0xC8) T2XCLK ; /* TMR2CN.0 - TIMER 2 EXTERNAL CLOCK SELECT */ +__sbit __at (0xCA) TR2 ; /* TMR2CN.2 - TIMER 2 ON/OFF CONTROL */ +__sbit __at (0xCB) T2SPLIT ; /* TMR2CN.3 - TIMER 2 SPLIT MODE ENABLE */ +__sbit __at (0xCD) TF2LEN ; /* TMR2CN.5 - TIMER 2 LOW BYTE INTERRUPT ENABLE */ +__sbit __at (0xCE) TF2L ; /* TMR2CN.6 - TIMER 2 LOW BYTE OVERFLOW FLAG */ +__sbit __at (0xCF) TF2 ; /* TMR2CN.7 - TIMER 2 OVERFLOW FLAG */ +__sbit __at (0xCF) TF2H ; /* TMR2CN.7 - TIMER 2 HIGH BYTE OVERFLOW FLAG */ + +/* PSW 0xD0 */ +__sbit __at (0xD0) PARITY ; /* PSW.0 - ACCUMULATOR PARITY FLAG */ +__sbit __at (0xD1) F1 ; /* PSW.1 - FLAG 1 */ +__sbit __at (0xD2) OV ; /* PSW.2 - OVERFLOW FLAG */ +__sbit __at (0xD3) RS0 ; /* PSW.3 - REGISTER BANK SELECT 0 */ +__sbit __at (0xD4) RS1 ; /* PSW.4 - REGISTER BANK SELECT 1 */ +__sbit __at (0xD5) F0 ; /* PSW.5 - FLAG 0 */ +__sbit __at (0xD6) AC ; /* PSW.6 - AUXILIARY CARRY FLAG */ +__sbit __at (0xD7) CY ; /* PSW.7 - CARRY FLAG */ + +/* PCA0CN 0xD8 */ +__sbit __at (0xD8) CCF0 ; /* PCA0CN.0 - PCA MODULE 0 CAPTURE/COMPARE FLAG */ +__sbit __at (0xD9) CCF1 ; /* PCA0CN.1 - PCA MODULE 1 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDA) CCF2 ; /* PCA0CN.2 - PCA MODULE 2 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDB) CCF3 ; /* PCA0CN.3 - PCA MODULE 3 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDC) CCF4 ; /* PCA0CN.4 - PCA MODULE 4 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDE) CR ; /* PCA0CN.6 - PCA COUNTER/TIMER RUN CONTROL */ +__sbit __at (0xDF) CF ; /* PCA0CN.7 - PCA COUNTER/TIMER OVERFLOW FLAG */ + +/* ADC0CN 0xE8 */ +__sbit __at (0xE8) AD0CM0 ; /* ADC0CN.0 - ADC 0 START OF CONV. MODE BIT 0 */ +__sbit __at (0xE9) AD0CM1 ; /* ADC0CN.1 - ADC 0 START OF CONV. MODE BIT 1 */ +__sbit __at (0xEA) AD0CM2 ; /* ADC0CN.2 - ADC 0 START OF CONV. MODE BIT 2 */ +__sbit __at (0xEB) AD0WINT ; /* ADC0CN.3 - ADC 0 WINDOW COMPARE INT. FLAG */ +__sbit __at (0xEC) AD0BUSY ; /* ADC0CN.4 - ADC 0 BUSY FLAG */ +__sbit __at (0xED) AD0INT ; /* ADC0CN.5 - ADC 0 CONV. COMPLETE INT. FLAG */ +__sbit __at (0xEE) AD0TM ; /* ADC0CN.6 - ADC 0 TRACK MODE */ +__sbit __at (0xEF) AD0EN ; /* ADC0CN.7 - ADC 0 ENABLE */ + +/* SPI0CN 0xF8 */ +__sbit __at (0xF8) SPIEN ; /* SPI0CN.0 - SPI0 ENABLE */ +__sbit __at (0xF9) TXBMT ; /* SPI0CN.1 - TRANSMIT BUFFER EMPTY */ +__sbit __at (0xFA) NSSMD0 ; /* SPI0CN.2 - SLAVE SELECT MODE BIT 0 */ +__sbit __at (0xFB) NSSMD1 ; /* SPI0CN.3 - SLAVE SELECT MODE BIT 1 */ +__sbit __at (0xFC) RXOVRN ; /* SPI0CN.4 - RECEIVE OVERRUN FLAG */ +__sbit __at (0xFD) MODF ; /* SPI0CN.5 - MODE FAULT FLAG */ +__sbit __at (0xFE) WCOL ; /* SPI0CN.6 - WRITE COLLISION FLAG */ +__sbit __at (0xFF) SPIF ; /* SPI0CN.7 - SPI0 INTERRUPT FLAG */ + + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define T1M 0x08 /* CKCON */ +#define PSWE 0x01 /* PSCTL */ +#define PSEE 0x02 /* PSCTL */ +#define ECP0 0x20 /* EIE1 */ +#define ECP1 0x40 /* EIE1 */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define CP0E 0x10 /* XBR0 */ +#define CP0OEN 0x10 /* XBR0 */ +#define CP0AE 0x20 /* XBR0 */ +#define CP0AOEN 0x20 /* XBR0 */ +#define CP1E 0x40 /* XBR0 */ +#define CP1AE 0x80 /* XBR0 */ + +#endif diff --git a/device/include/mcs51/C8051F320.h b/device/include/mcs51/C8051F320.h new file mode 100644 index 0000000..77ded17 --- /dev/null +++ b/device/include/mcs51/C8051F320.h @@ -0,0 +1,344 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Cygnal/SiLabs C8051F32x Processor Range + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051F320_H +#define C8051F320_H + + +/* BYTE Registers */ +__sfr __at (0x80) P0 ; /* PORT 0 */ +__sfr __at (0x81) SP ; /* STACK POINTER */ +__sfr __at (0x82) DPL ; /* DATA POINTER - LOW BYTE */ +__sfr __at (0x83) DPH ; /* DATA POINTER - HIGH BYTE */ +__sfr __at (0x87) PCON ; /* POWER CONTROL */ +__sfr __at (0x88) TCON ; /* TIMER CONTROL */ +__sfr __at (0x89) TMOD ; /* TIMER MODE */ +__sfr __at (0x8A) TL0 ; /* TIMER 0 - LOW BYTE */ +__sfr __at (0x8B) TL1 ; /* TIMER 1 - LOW BYTE */ +__sfr __at (0x8C) TH0 ; /* TIMER 0 - HIGH BYTE */ +__sfr __at (0x8D) TH1 ; /* TIMER 1 - HIGH BYTE */ +__sfr __at (0x8E) CKCON ; /* CLOCK CONTROL */ +__sfr __at (0x8F) PSCTL ; /* PROGRAM STORE R/W CONTROL */ +__sfr __at (0x90) P1 ; /* PORT 1 */ +__sfr __at (0x91) TMR3CN ; /* TIMER 3 CONTROL */ +__sfr __at (0x92) TMR3RLL ; /* TIMER 3 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0x93) TMR3RLH ; /* TIMER 3 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0x94) TMR3L ; /* TIMER 3 - LOW BYTE */ +__sfr __at (0x95) TMR3H ; /* TIMER 3 - HIGH BYTE */ +__sfr __at (0x96) USB0ADR ; /* USB0 INDIRECT ADDRESS REGISTER */ +__sfr __at (0x97) USB0DAT ; /* USB0 DATA REGISTER */ +__sfr __at (0x98) SCON ; /* SERIAL PORT CONTROL */ +__sfr __at (0x98) SCON0 ; /* SERIAL PORT CONTROL */ +__sfr __at (0x99) SBUF ; /* SERIAL PORT BUFFER */ +__sfr __at (0x99) SBUF0 ; /* SERIAL PORT BUFFER */ +__sfr __at (0x9A) CPT1CN ; /* COMPARATOR 1 CONTROL */ +__sfr __at (0x9B) CPT0CN ; /* COMPARATOR 0 CONTROL */ +__sfr __at (0x9C) CPT1MD ; /* COMPARATOR 1 MODE SELECTION */ +__sfr __at (0x9D) CPT0MD ; /* COMPARATOR 0 MODE SELECTION */ +__sfr __at (0x9E) CPT1MX ; /* COMPARATOR 1 MUX SELECTION */ +__sfr __at (0x9F) CPT0MX ; /* COMPARATOR 0 MUX SELECTION */ +__sfr __at (0xA0) P2 ; /* PORT 2 */ +__sfr __at (0xA1) SPI0CFG ; /* SPI0 CONFIGURATION */ +__sfr __at (0xA2) SPI0CKR ; /* SPI0 CLOCK RATE CONTROL */ +__sfr __at (0xA3) SPI0DAT ; /* SPI0 DATA */ +__sfr __at (0xA4) P0MDOUT ; /* PORT 0 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA5) P1MDOUT ; /* PORT 1 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA6) P2MDOUT ; /* PORT 2 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA7) P3MDOUT ; /* PORT 3 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA8) IE ; /* INTERRUPT ENABLE */ +__sfr __at (0xA9) CLKSEL ; /* SYSTEM CLOCK SELECT */ +__sfr __at (0xAA) EMI0CN ; /* EXTERNAL MEMORY INTERFACE CONTROL */ +__sfr __at (0xAA) _XPAGE ; /* XDATA/PDATA PAGE */ +__sfr __at (0xB0) P3 ; /* PORT 3 */ +__sfr __at (0xB1) OSCXCN ; /* EXTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB2) OSCICN ; /* INTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB3) OSCICL ; /* INTERNAL OSCILLATOR CALIBRATION */ +__sfr __at (0xB6) FLSCL ; /* FLASH MEMORY TIMING PRESCALER */ +__sfr __at (0xB7) FLKEY ; /* FLASH ACESS LIMIT */ +__sfr __at (0xB8) IP ; /* INTERRUPT PRIORITY */ +__sfr __at (0xB9) CLKMUL ; /* CLOCK MULTIPLIER CONTROL REGISTER */ +__sfr __at (0xBA) AMX0N ; /* ADC 0 MUX NEGATIVE CHANNEL SELECTION */ +__sfr __at (0xBB) AMX0P ; /* ADC 0 MUX POSITIVE CHANNEL SELECTION */ +__sfr __at (0xBC) ADC0CF ; /* ADC 0 CONFIGURATION */ +__sfr __at (0xBD) ADC0L ; /* ADC 0 DATA WORD LSB */ +__sfr __at (0xBE) ADC0H ; /* ADC 0 DATA WORD MSB */ +__sfr __at (0xC0) SMB0CN ; /* SMBUS CONTROL */ +__sfr __at (0xC1) SMB0CF ; /* SMBUS CONFIGURATION */ +__sfr __at (0xC2) SMB0DAT ; /* SMBUS DATA */ +__sfr __at (0xC3) ADC0GTL ; /* ADC 0 GREATER-THAN LOW BYTE */ +__sfr __at (0xC4) ADC0GTH ; /* ADC 0 GREATER-THAN HIGH BYTE */ +__sfr __at (0xC5) ADC0LTL ; /* ADC 0 LESS-THAN LOW BYTE */ +__sfr __at (0xC6) ADC0LTH ; /* ADC 0 LESS-THAN HIGH BYTE */ +__sfr __at (0xC8) T2CON ; /* TIMER 2 CONTROL */ +__sfr __at (0xC8) TMR2CN ; /* TIMER 2 CONTROL */ +__sfr __at (0xC9) REG0CN ; /* VOLTAGE REGULATOR CONTROL */ +__sfr __at (0xCA) RCAP2L ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCA) TMR2RLL ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCB) RCAP2H ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCB) TMR2RLH ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCC) TL2 ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCC) TMR2L ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCD) TH2 ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xCD) TMR2H ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xD0) PSW ; /* PROGRAM STATUS WORD */ +__sfr __at (0xD1) REF0CN ; /* VOLTAGE REFERENCE 0 CONTROL */ +__sfr __at (0xD4) P0SKIP ; /* PORT 0 SKIP */ +__sfr __at (0xD5) P1SKIP ; /* PORT 1 SKIP */ +__sfr __at (0xD6) P2SKIP ; /* PORT 2 SKIP */ +__sfr __at (0xD7) USB0XCN ; /* USB0 TRANSCEIVER CONTROL */ +__sfr __at (0xD8) PCA0CN ; /* PCA CONTROL */ +__sfr __at (0xD9) PCA0MD ; /* PCA MODE */ +__sfr __at (0xDA) PCA0CPM0 ; /* PCA MODULE 0 MODE REGISTER */ +__sfr __at (0xDB) PCA0CPM1 ; /* PCA MODULE 1 MODE REGISTER */ +__sfr __at (0xDC) PCA0CPM2 ; /* PCA MODULE 2 MODE REGISTER */ +__sfr __at (0xDD) PCA0CPM3 ; /* PCA MODULE 3 MODE REGISTER */ +__sfr __at (0xDE) PCA0CPM4 ; /* PCA MODULE 4 MODE REGISTER */ +__sfr __at (0xE0) ACC ; /* ACCUMULATOR */ +__sfr __at (0xE1) XBR0 ; /* PORT MUX CONFIGURATION REGISTER 0 */ +__sfr __at (0xE2) XBR1 ; /* PORT MUX CONFIGURATION REGISTER 1 */ +__sfr __at (0xE4) IT01CF ; /* INT0/INT1 CONFIGURATION REGISTER */ +__sfr __at (0xE4) INT01CF ; /* INT0/INT1 CONFIGURATION REGISTER */ +__sfr __at (0xE6) EIE1 ; /* EXTERNAL INTERRUPT ENABLE 1 */ +__sfr __at (0xE7) EIE2 ; /* EXTERNAL INTERRUPT ENABLE 2 */ +__sfr __at (0xE8) ADC0CN ; /* ADC 0 CONTROL */ +__sfr __at (0xE9) PCA0CPL1 ; /* PCA CAPTURE 1 LOW */ +__sfr __at (0xEA) PCA0CPH1 ; /* PCA CAPTURE 1 HIGH */ +__sfr __at (0xEB) PCA0CPL2 ; /* PCA CAPTURE 2 LOW */ +__sfr __at (0xEC) PCA0CPH2 ; /* PCA CAPTURE 2 HIGH */ +__sfr __at (0xED) PCA0CPL3 ; /* PCA CAPTURE 3 LOW */ +__sfr __at (0xEE) PCA0CPH3 ; /* PCA CAPTURE 3 HIGH */ +__sfr __at (0xEF) RSTSRC ; /* RESET SOURCE */ +__sfr __at (0xF0) B ; /* B REGISTER */ +__sfr __at (0xF1) P0MODE ; /* PORT 0 INPUT MODE CONFIGURATION */ +__sfr __at (0xF1) P0MDIN ; /* PORT 0 INPUT MODE CONFIGURATION */ +__sfr __at (0xF2) P1MODE ; /* PORT 1 INPUT MODE CONFIGURATION */ +__sfr __at (0xF2) P1MDIN ; /* PORT 1 INPUT MODE CONFIGURATION */ +__sfr __at (0xF3) P2MODE ; /* PORT 2 INPUT MODE CONFIGURATION */ +__sfr __at (0xF3) P2MDIN ; /* PORT 2 INPUT MODE CONFIGURATION */ +__sfr __at (0xF4) P3MODE ; /* PORT 3 INPUT MODE CONFIGURATION */ +__sfr __at (0xF4) P3MDIN ; /* PORT 3 INPUT MODE CONFIGURATION */ +__sfr __at (0xF6) EIP1 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +__sfr __at (0xF7) EIP2 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 2 */ +__sfr __at (0xF8) SPI0CN ; /* SPI0 CONTROL */ +__sfr __at (0xF9) PCA0L ; /* PCA COUNTER LOW */ +__sfr __at (0xFA) PCA0H ; /* PCA COUNTER HIGH */ +__sfr __at (0xFB) PCA0CPL0 ; /* PCA CAPTURE 0 LOW */ +__sfr __at (0xFC) PCA0CPH0 ; /* PCA CAPTURE 0 HIGH */ +__sfr __at (0xFD) PCA0CPL4 ; /* PCA CAPTURE 4 LOW */ +__sfr __at (0xFE) PCA0CPH4 ; /* PCA CAPTURE 4 HIGH */ +__sfr __at (0xFF) VDM0CN ; /* VDD MONITOR CONTROL */ + + +/* WORD/DWORD Registers */ + +__sfr16 __at (0x8C8A) TMR0 ; /* TIMER 0 COUNTER */ +__sfr16 __at (0x8D8B) TMR1 ; /* TIMER 1 COUNTER */ +__sfr16 __at (0xCDCC) TMR2 ; /* TIMER 2 COUNTER */ +__sfr16 __at (0xCBCA) RCAP2 ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0xCBCA) TMR2RL ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0x9594) TMR3 ; /* TIMER 3 COUNTER */ +__sfr16 __at (0x9392) TMR3RL ; /* TIMER 3 CAPTURE REGISTER WORD */ +__sfr16 __at (0xBEBD) ADC0 ; /* ADC 0 DATA WORD */ +__sfr16 __at (0xC4C3) ADC0GT ; /* ADC 0 GREATER-THAN REGISTER WORD */ +__sfr16 __at (0xC6C5) ADC0LT ; /* ADC 0 LESS-THAN REGISTER WORD */ +__sfr16 __at (0xFAF9) PCA0 ; /* PCA COUNTER */ +__sfr16 __at (0xFCFB) PCA0CP0 ; /* PCA CAPTURE 0 WORD */ +__sfr16 __at (0xEAE9) PCA0CP1 ; /* PCA CAPTURE 1 WORD */ +__sfr16 __at (0xECEB) PCA0CP2 ; /* PCA CAPTURE 2 WORD */ +__sfr16 __at (0xEEED) PCA0CP3 ; /* PCA CAPTURE 3 WORD */ +__sfr16 __at (0xFEFD) PCA0CP4 ; /* PCA CAPTURE 4 WORD */ + + +/* BIT Registers */ + +/* P0 0x80 */ +__sbit __at (0x80) P0_0 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x87) P0_7 ; + +/* TCON 0x88 */ +__sbit __at (0x88) IT0 ; /* TCON.0 - EXT. INTERRUPT 0 TYPE */ +__sbit __at (0x89) IE0 ; /* TCON.1 - EXT. INTERRUPT 0 EDGE FLAG */ +__sbit __at (0x8A) IT1 ; /* TCON.2 - EXT. INTERRUPT 1 TYPE */ +__sbit __at (0x8B) IE1 ; /* TCON.3 - EXT. INTERRUPT 1 EDGE FLAG */ +__sbit __at (0x8C) TR0 ; /* TCON.4 - TIMER 0 ON/OFF CONTROL */ +__sbit __at (0x8D) TF0 ; /* TCON.5 - TIMER 0 OVERFLOW FLAG */ +__sbit __at (0x8E) TR1 ; /* TCON.6 - TIMER 1 ON/OFF CONTROL */ +__sbit __at (0x8F) TF1 ; /* TCON.7 - TIMER 1 OVERFLOW FLAG */ + +/* P1 0x90 */ +__sbit __at (0x90) P1_0 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x92) P1_2 ; +__sbit __at (0x93) P1_3 ; +__sbit __at (0x94) P1_4 ; +__sbit __at (0x95) P1_5 ; +__sbit __at (0x96) P1_6 ; +__sbit __at (0x97) P1_7 ; + +/* SCON 0x98 */ +__sbit __at (0x98) RI ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x98) RI0 ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x99) TI ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x99) TI0 ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x9A) RB8 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9A) RB80 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9B) TB8 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9B) TB80 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9C) REN ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9C) REN0 ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9D) SM2 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9D) MCE0 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9F) SM0 ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ +__sbit __at (0x9F) S0MODE ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ + +/* P2 0xA0 */ +__sbit __at (0xA0) P2_0 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA4) P2_4 ; +__sbit __at (0xA5) P2_5 ; +__sbit __at (0xA6) P2_6 ; +__sbit __at (0xA7) P2_7 ; + +/* IE 0xA8 */ +__sbit __at (0xA8) EX0 ; /* IE.0 - EXTERNAL INTERRUPT 0 ENABLE */ +__sbit __at (0xA9) ET0 ; /* IE.1 - TIMER 0 INTERRUPT ENABLE */ +__sbit __at (0xAA) EX1 ; /* IE.2 - EXTERNAL INTERRUPT 1 ENABLE */ +__sbit __at (0xAB) ET1 ; /* IE.3 - TIMER 1 INTERRUPT ENABLE */ +__sbit __at (0xAC) ES ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAC) ES0 ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAD) ET2 ; /* IE.5 - TIMER 2 INTERRUPT ENABLE */ +__sbit __at (0xAE) ESPI0 ; /* IE.6 - SPI0 INTERRUPT ENABLE */ +__sbit __at (0xAF) EA ; /* IE.7 - GLOBAL INTERRUPT ENABLE */ + +/* P3 0xB0 */ +__sbit __at (0xB0) P3_0 ; +__sbit __at (0xB1) P3_1 ; +__sbit __at (0xB2) P3_2 ; +__sbit __at (0xB3) P3_3 ; +__sbit __at (0xB4) P3_4 ; +__sbit __at (0xB5) P3_5 ; +__sbit __at (0xB6) P3_6 ; +__sbit __at (0xB7) P3_7 ; + +/* IP 0xB8 */ +__sbit __at (0xB8) PX0 ; /* IP.0 - EXTERNAL INTERRUPT 0 PRIORITY */ +__sbit __at (0xB9) PT0 ; /* IP.1 - TIMER 0 PRIORITY */ +__sbit __at (0xBA) PX1 ; /* IP.2 - EXTERNAL INTERRUPT 1 PRIORITY */ +__sbit __at (0xBB) PT1 ; /* IP.3 - TIMER 1 PRIORITY */ +__sbit __at (0xBC) PS ; /* IP.4 - SERIAL PORT PRIORITY */ +__sbit __at (0xBC) PS0 ; /* IP.4 - SERIAL PORT PRIORITY */ +__sbit __at (0xBD) PT2 ; /* IP.5 - TIMER 2 PRIORITY */ +__sbit __at (0xBE) PSPI0 ; /* IP.6 - SPI0 PRIORITY */ + +/* SMB0CN 0xC0 */ +__sbit __at (0xC0) SI ; /* SMB0CN.0 - SMBUS 0 INTERRUPT PENDING FLAG */ +__sbit __at (0xC1) ACK ; /* SMB0CN.1 - SMBUS 0 ACKNOWLEDGE FLAG */ +__sbit __at (0xC2) ARBLOST ; /* SMB0CN.2 - SMBUS 0 ARBITRATION LOST INDICATOR */ +__sbit __at (0xC3) ACKRQ ; /* SMB0CN.3 - SMBUS 0 ACKNOWLEDGE REQUEST */ +__sbit __at (0xC4) STO ; /* SMB0CN.4 - SMBUS 0 STOP FLAG */ +__sbit __at (0xC5) STA ; /* SMB0CN.5 - SMBUS 0 START FLAG */ +__sbit __at (0xC6) TXMODE ; /* SMB0CN.6 - SMBUS 0 TRANSMIT MODE INDICATOR */ +__sbit __at (0xC7) MASTER ; /* SMB0CN.7 - SMBUS 0 MASTER/SLAVE INDICATOR */ + +/* TMR2CN 0xC8 */ +__sbit __at (0xC8) T2XCLK ; /* TMR2CN.0 - TIMER 2 EXTERNAL CLOCK SELECT */ +__sbit __at (0xCA) TR2 ; /* TMR2CN.2 - TIMER 2 ON/OFF CONTROL */ +__sbit __at (0xCB) T2SPLIT ; /* TMR2CN.3 - TIMER 2 SPLIT MODE ENABLE */ +__sbit __at (0xCC) T2SOF ; /* TMR2CN.4 - TIMER 2 START_OF_FRAME CAPTURE ENA */ +__sbit __at (0xCD) TF2LEN ; /* TMR2CN.5 - TIMER 2 LOW BYTE INTERRUPT ENABLE */ +__sbit __at (0xCE) TF2L ; /* TMR2CN.6 - TIMER 2 LOW BYTE OVERFLOW FLAG */ +__sbit __at (0xCF) TF2 ; /* TMR2CN.7 - TIMER 2 OVERFLOW FLAG */ +__sbit __at (0xCF) TF2H ; /* TMR2CN.7 - TIMER 2 HIGH BYTE OVERFLOW FLAG */ + +/* PSW 0xD0 */ +__sbit __at (0xD0) PARITY ; /* PSW.0 - ACCUMULATOR PARITY FLAG */ +__sbit __at (0xD1) F1 ; /* PSW.1 - FLAG 1 */ +__sbit __at (0xD2) OV ; /* PSW.2 - OVERFLOW FLAG */ +__sbit __at (0xD3) RS0 ; /* PSW.3 - REGISTER BANK SELECT 0 */ +__sbit __at (0xD4) RS1 ; /* PSW.4 - REGISTER BANK SELECT 1 */ +__sbit __at (0xD5) F0 ; /* PSW.5 - FLAG 0 */ +__sbit __at (0xD6) AC ; /* PSW.6 - AUXILIARY CARRY FLAG */ +__sbit __at (0xD7) CY ; /* PSW.7 - CARRY FLAG */ + +/* PCA0CN 0xD8 */ +__sbit __at (0xD8) CCF0 ; /* PCA0CN.0 - PCA MODULE 0 CAPTURE/COMPARE FLAG */ +__sbit __at (0xD9) CCF1 ; /* PCA0CN.1 - PCA MODULE 1 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDA) CCF2 ; /* PCA0CN.2 - PCA MODULE 2 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDB) CCF3 ; /* PCA0CN.3 - PCA MODULE 3 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDC) CCF4 ; /* PCA0CN.4 - PCA MODULE 4 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDE) CR ; /* PCA0CN.6 - PCA COUNTER/TIMER RUN CONTROL */ +__sbit __at (0xDF) CF ; /* PCA0CN.7 - PCA COUNTER/TIMER OVERFLOW FLAG */ + +/* ADC0CN 0xE8 */ +__sbit __at (0xE8) AD0CM0 ; /* ADC0CN.0 - ADC 0 START OF CONV. MODE BIT 0 */ +__sbit __at (0xE9) AD0CM1 ; /* ADC0CN.1 - ADC 0 START OF CONV. MODE BIT 1 */ +__sbit __at (0xEA) AD0CM2 ; /* ADC0CN.2 - ADC 0 START OF CONV. MODE BIT 2 */ +__sbit __at (0xEB) AD0WINT ; /* ADC0CN.3 - ADC 0 WINDOW COMPARE INT. FLAG */ +__sbit __at (0xEC) AD0BUSY ; /* ADC0CN.4 - ADC 0 BUSY FLAG */ +__sbit __at (0xED) AD0INT ; /* ADC0CN.5 - ADC 0 CONV. COMPLETE INT. FLAG */ +__sbit __at (0xEE) AD0TM ; /* ADC0CN.6 - ADC 0 TRACK MODE */ +__sbit __at (0xEF) AD0EN ; /* ADC0CN.7 - ADC 0 ENABLE */ + +/* SPI0CN 0xF8 */ +__sbit __at (0xF8) SPIEN ; /* SPI0CN.0 - SPI0 ENABLE */ +__sbit __at (0xF9) TXBMT ; /* SPI0CN.1 - TRANSMIT BUFFER EMPTY */ +__sbit __at (0xFA) NSSMD0 ; /* SPI0CN.2 - SLAVE SELECT MODE BIT 0 */ +__sbit __at (0xFB) NSSMD1 ; /* SPI0CN.3 - SLAVE SELECT MODE BIT 1 */ +__sbit __at (0xFC) RXOVRN ; /* SPI0CN.4 - RECEIVE OVERRUN FLAG */ +__sbit __at (0xFD) MODF ; /* SPI0CN.5 - MODE FAULT FLAG */ +__sbit __at (0xFE) WCOL ; /* SPI0CN.6 - WRITE COLLISION FLAG */ +__sbit __at (0xFF) SPIF ; /* SPI0CN.7 - SPI0 INTERRUPT FLAG */ + + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define T1M 0x08 /* CKCON */ +#define PSWE 0x01 /* PSCTL */ +#define PSEE 0x02 /* PSCTL */ +#define ECP0 0x20 /* EIE1 */ +#define ECP1 0x40 /* EIE1 */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define CP0E 0x10 /* XBR0 */ +#define CP0OEN 0x10 /* XBR0 */ +#define CP0AE 0x20 /* XBR0 */ +#define CP0AOEN 0x20 /* XBR0 */ +#define CP1E 0x40 /* XBR0 */ +#define CP1AE 0x80 /* XBR0 */ + +#endif diff --git a/device/include/mcs51/C8051F326.h b/device/include/mcs51/C8051F326.h new file mode 100644 index 0000000..fd475e5 --- /dev/null +++ b/device/include/mcs51/C8051F326.h @@ -0,0 +1,174 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Cygnal/SiLabs C8051F326/7 Processor Range + + Copyright (C) 2006 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051F326_H +#define C8051F326_H + + +/* BYTE Registers */ +__sfr __at (0x80) P0 ; /* PORT 0 */ +__sfr __at (0x81) SP ; /* STACK POINTER */ +__sfr __at (0x82) DPL ; /* DATA POINTER - LOW BYTE */ +__sfr __at (0x83) DPH ; /* DATA POINTER - HIGH BYTE */ +__sfr __at (0x87) PCON ; /* POWER CONTROL */ +__sfr __at (0x88) TCON ; /* TIMER CONTROL */ +__sfr __at (0x89) TMOD ; /* TIMER MODE */ +__sfr __at (0x8A) TL0 ; /* TIMER 0 - LOW BYTE */ +__sfr __at (0x8B) TL1 ; /* TIMER 1 - LOW BYTE */ +__sfr __at (0x8C) TH0 ; /* TIMER 0 - HIGH BYTE */ +__sfr __at (0x8D) TH1 ; /* TIMER 1 - HIGH BYTE */ +__sfr __at (0x8E) CKCON ; /* CLOCK CONTROL */ +__sfr __at (0x8F) PSCTL ; /* PROGRAM STORE R/W CONTROL */ +__sfr __at (0x91) SBCON0 ; /* BAUDRATE GENERATOR 0 CONTROL */ +__sfr __at (0x93) SBRLL0 ; /* BAUDRATE GENERATOR 0 RELOAD VALUE - LOW BYTE */ +__sfr __at (0x94) SBRLH0 ; /* BAUDRATE GENERATOR 0 RELOAD VALUE - HIGH BYTE */ +__sfr __at (0x96) USB0ADR ; /* USB0 INDIRECT ADDRESS REGISTER */ +__sfr __at (0x97) USB0DAT ; /* USB0 DATA REGISTER */ +__sfr __at (0x98) SCON ; /* UART0 CONTROL */ +__sfr __at (0x98) SCON0 ; /* UART0 CONTROL */ +__sfr __at (0x99) SBUF ; /* UART0 BUFFER */ +__sfr __at (0x99) SBUF0 ; /* UART0 BUFFER */ +__sfr __at (0x9A) SMOD0 ; /* UART0 MODE */ +__sfr __at (0xA0) P2 ; /* PORT 2 */ +__sfr __at (0xA4) P0MDOUT ; /* PORT 0 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA6) P2MDOUT ; /* PORT 2 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA7) P3MDOUT ; /* PORT 3 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA8) IE ; /* INTERRUPT ENABLE */ +__sfr __at (0xA9) CLKSEL ; /* SYSTEM CLOCK SELECT */ +__sfr __at (0xAA) EMI0CN ; /* EXTERNAL MEMORY INTERFACE CONTROL */ +__sfr __at (0xAA) _XPAGE ; /* XDATA/PDATA PAGE */ +__sfr __at (0xB0) P3 ; /* PORT 3 */ +__sfr __at (0xB2) OSCICN ; /* INTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB3) OSCICL ; /* INTERNAL OSCILLATOR CALIBRATION */ +__sfr __at (0xB6) FLSCL ; /* FLASH MEMORY TIMING PRESCALER */ +__sfr __at (0xB7) FLKEY ; /* FLASH ACESS LIMIT */ +__sfr __at (0xB8) IP ; /* INTERRUPT PRIORITY */ +__sfr __at (0xB9) CLKMUL ; /* CLOCK MULTIPLIER CONTROL REGISTER */ +__sfr __at (0xC9) REG0CN ; /* VOLTAGE REGULATOR CONTROL */ +__sfr __at (0xD0) PSW ; /* PROGRAM STATUS WORD */ +__sfr __at (0xD7) USB0XCN ; /* USB0 TRANSCEIVER CONTROL */ +__sfr __at (0xE0) ACC ; /* ACCUMULATOR */ +__sfr __at (0xE2) GPIOCN ; /* GLOBAL PORT I/O CONTROL */ +__sfr __at (0xE3) OSCLCN ; /* LOW-FREQUENCY OSCILLATOR CONTROL */ +__sfr __at (0xE6) EIE1 ; /* EXTERNAL INTERRUPT ENABLE 1 */ +__sfr __at (0xE7) EIE2 ; /* EXTERNAL INTERRUPT ENABLE 2 */ +__sfr __at (0xEF) RSTSRC ; /* RESET SOURCE */ +__sfr __at (0xF0) B ; /* B REGISTER */ +__sfr __at (0xF6) EIP1 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +__sfr __at (0xF7) EIP2 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 2 */ +__sfr __at (0xFF) VDM0CN ; /* VDD MONITOR CONTROL */ + + +/* WORD/DWORD Registers */ + +__sfr16 __at (0x8C8A) TMR0 ; /* TIMER 0 COUNTER */ +__sfr16 __at (0x8D8B) TMR1 ; /* TIMER 1 COUNTER */ +__sfr16 __at (0x9493) SBRL0 ; /* BAUDRATE GENERATOR 0 RELOAD VALUE WORD */ + + +/* BIT Registers */ + +/* P0 0x80 */ +__sbit __at (0x80) P0_0 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x87) P0_7 ; + +/* TCON 0x88 */ +__sbit __at (0x88) IT0 ; /* TCON.0 - EXT. INTERRUPT 0 TYPE */ +__sbit __at (0x89) IE0 ; /* TCON.1 - EXT. INTERRUPT 0 EDGE FLAG */ +__sbit __at (0x8A) IT1 ; /* TCON.2 - EXT. INTERRUPT 1 TYPE */ +__sbit __at (0x8B) IE1 ; /* TCON.3 - EXT. INTERRUPT 1 EDGE FLAG */ +__sbit __at (0x8C) TR0 ; /* TCON.4 - TIMER 0 ON/OFF CONTROL */ +__sbit __at (0x8D) TF0 ; /* TCON.5 - TIMER 0 OVERFLOW FLAG */ +__sbit __at (0x8E) TR1 ; /* TCON.6 - TIMER 1 ON/OFF CONTROL */ +__sbit __at (0x8F) TF1 ; /* TCON.7 - TIMER 1 OVERFLOW FLAG */ + +/* SCON 0x98 */ +__sbit __at (0x98) RI ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x98) RI0 ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x99) TI ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x99) TI0 ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x9A) RB8 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9A) RBX0 ; /* SCON.2 - EXTRA RECEIVE BIT */ +__sbit __at (0x9B) TB8 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9B) TBX0 ; /* SCON.3 - EXTRA TRANSMIT BIT */ +__sbit __at (0x9C) REN ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9C) REN0 ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9E) PERR0 ; /* SCON.6 - PARITY ERROR FLAG */ +__sbit __at (0x9F) OVR0 ; /* SCON.7 - RECEIVE FIFO OVERRUN FLAG */ + +/* P2 0xA0 */ +__sbit __at (0xA0) P2_0 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA4) P2_4 ; +__sbit __at (0xA5) P2_5 ; + +/* IE 0xA8 */ +__sbit __at (0xA8) EX0 ; /* IE.0 - EXTERNAL INTERRUPT 0 ENABLE */ +__sbit __at (0xA9) ET0 ; /* IE.1 - TIMER 0 INTERRUPT ENABLE */ +__sbit __at (0xAA) EX1 ; /* IE.2 - EXTERNAL INTERRUPT 1 ENABLE */ +__sbit __at (0xAB) ET1 ; /* IE.3 - TIMER 1 INTERRUPT ENABLE */ +__sbit __at (0xAC) ES ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAC) ES0 ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAF) EA ; /* IE.7 - GLOBAL INTERRUPT ENABLE */ + +/* P3 0xB0 */ +__sbit __at (0xB0) P3_0 ; + +/* IP 0xB8 */ +__sbit __at (0xB8) PX0 ; /* IP.0 - EXTERNAL INTERRUPT 0 PRIORITY */ +__sbit __at (0xB9) PT0 ; /* IP.1 - TIMER 0 PRIORITY */ +__sbit __at (0xBA) PX1 ; /* IP.2 - EXTERNAL INTERRUPT 1 PRIORITY */ +__sbit __at (0xBB) PT1 ; /* IP.3 - TIMER 1 PRIORITY */ +__sbit __at (0xBC) PS ; /* IP.4 - SERIAL PORT PRIORITY */ +__sbit __at (0xBC) PS0 ; /* IP.4 - SERIAL PORT PRIORITY */ + +/* PSW 0xD0 */ +__sbit __at (0xD0) PARITY ; /* PSW.0 - ACCUMULATOR PARITY FLAG */ +__sbit __at (0xD1) F1 ; /* PSW.1 - FLAG 1 */ +__sbit __at (0xD2) OV ; /* PSW.2 - OVERFLOW FLAG */ +__sbit __at (0xD3) RS0 ; /* PSW.3 - REGISTER BANK SELECT 0 */ +__sbit __at (0xD4) RS1 ; /* PSW.4 - REGISTER BANK SELECT 1 */ +__sbit __at (0xD5) F0 ; /* PSW.5 - FLAG 0 */ +__sbit __at (0xD6) AC ; /* PSW.6 - AUXILIARY CARRY FLAG */ +__sbit __at (0xD7) CY ; /* PSW.7 - CARRY FLAG */ + + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define T0M 0x04 /* CKCON */ +#define T1M 0x08 /* CKCON */ +#define PSWE 0x01 /* PSCTL */ +#define PSEE 0x02 /* PSCTL */ +#define EUSB0 0x02 /* EIE1 */ +#define EVBUS 0x01 /* EIE2 */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ + +#endif diff --git a/device/include/mcs51/C8051F330.h b/device/include/mcs51/C8051F330.h new file mode 100644 index 0000000..f44e02b --- /dev/null +++ b/device/include/mcs51/C8051F330.h @@ -0,0 +1,310 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Cygnal/SiLabs C8051F33x Processor Range + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051F330_H +#define C8051F330_H + + +/* BYTE Registers */ + +__sfr __at (0x80) P0 ; /* PORT 0 */ +__sfr __at (0x81) SP ; /* STACK POINTER */ +__sfr __at (0x82) DPL ; /* DATA POINTER - LOW BYTE */ +__sfr __at (0x83) DPH ; /* DATA POINTER - HIGH BYTE */ +__sfr __at (0x87) PCON ; /* POWER CONTROL */ +__sfr __at (0x88) TCON ; /* TIMER CONTROL */ +__sfr __at (0x89) TMOD ; /* TIMER MODE */ +__sfr __at (0x8A) TL0 ; /* TIMER 0 - LOW BYTE */ +__sfr __at (0x8B) TL1 ; /* TIMER 1 - LOW BYTE */ +__sfr __at (0x8C) TH0 ; /* TIMER 0 - HIGH BYTE */ +__sfr __at (0x8D) TH1 ; /* TIMER 1 - HIGH BYTE */ +__sfr __at (0x8E) CKCON ; /* CLOCK CONTROL */ +__sfr __at (0x8F) PSCTL ; /* PROGRAM STORE R/W CONTROL */ +__sfr __at (0x90) P1 ; /* PORT 1 */ +__sfr __at (0x91) TMR3CN ; /* TIMER 3 CONTROL */ +__sfr __at (0x92) TMR3RLL ; /* TIMER 3 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0x93) TMR3RLH ; /* TIMER 3 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0x94) TMR3L ; /* TIMER 3 - LOW BYTE */ +__sfr __at (0x95) TMR3H ; /* TIMER 3 - HIGH BYTE */ +__sfr __at (0x96) IDA0L ; /* CURRENT MODE DAC 0 - LOW BYTE */ +__sfr __at (0x97) IDA0H ; /* CURRENT MODE DAC 0 - HIGH BYTE */ +__sfr __at (0x98) SCON ; /* SERIAL PORT CONTROL */ +__sfr __at (0x98) SCON0 ; /* SERIAL PORT CONTROL */ +__sfr __at (0x99) SBUF ; /* SERIAL PORT BUFFER */ +__sfr __at (0x99) SBUF0 ; /* SERIAL PORT BUFFER */ +__sfr __at (0x9B) CPT0CN ; /* COMPARATOR 0 CONTROL */ +__sfr __at (0x9D) CPT0MD ; /* COMPARATOR 0 MODE SELECTION */ +__sfr __at (0x9F) CPT0MX ; /* COMPARATOR 0 MUX SELECTION */ +__sfr __at (0xA0) P2 ; /* PORT 2 */ +__sfr __at (0xA1) SPI0CFG ; /* SPI0 CONFIGURATION */ +__sfr __at (0xA2) SPI0CKR ; /* SPI0 CLOCK RATE CONTROL */ +__sfr __at (0xA3) SPI0DAT ; /* SPI0 DATA */ +__sfr __at (0xA4) P0MDOUT ; /* PORT 0 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA5) P1MDOUT ; /* PORT 1 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA6) P2MDOUT ; /* PORT 2 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA8) IE ; /* INTERRUPT ENABLE */ +__sfr __at (0xA9) CLKSEL ; /* SYSTEM CLOCK SELECT */ +__sfr __at (0xAA) EMI0CN ; /* EXTERNAL MEMORY INTERFACE CONTROL */ +__sfr __at (0xAA) _XPAGE ; /* XDATA/PDATA PAGE */ +__sfr __at (0xB1) OSCXCN ; /* EXTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB2) OSCICN ; /* INTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB3) OSCICL ; /* INTERNAL OSCILLATOR CALIBRATION */ +__sfr __at (0xB6) FLSCL ; /* FLASH MEMORY TIMING PRESCALER */ +__sfr __at (0xB7) FLKEY ; /* FLASH ACESS LIMIT */ +__sfr __at (0xB8) IP ; /* INTERRUPT PRIORITY */ +__sfr __at (0xB9) IDA0CN ; /* CURRENT MODE DAC 0 - CONTROL */ +__sfr __at (0xBA) AMX0N ; /* ADC 0 MUX NEGATIVE CHANNEL SELECTION */ +__sfr __at (0xBB) AMX0P ; /* ADC 0 MUX POSITIVE CHANNEL SELECTION */ +__sfr __at (0xBC) ADC0CF ; /* ADC 0 CONFIGURATION */ +__sfr __at (0xBD) ADC0L ; /* ADC 0 DATA WORD LSB */ +__sfr __at (0xBE) ADC0H ; /* ADC 0 DATA WORD MSB */ +__sfr __at (0xC0) SMB0CN ; /* SMBUS CONTROL */ +__sfr __at (0xC1) SMB0CF ; /* SMBUS CONFIGURATION */ +__sfr __at (0xC2) SMB0DAT ; /* SMBUS DATA */ +__sfr __at (0xC3) ADC0GTL ; /* ADC 0 GREATER-THAN LOW BYTE */ +__sfr __at (0xC4) ADC0GTH ; /* ADC 0 GREATER-THAN HIGH BYTE */ +__sfr __at (0xC5) ADC0LTL ; /* ADC 0 LESS-THAN LOW BYTE */ +__sfr __at (0xC6) ADC0LTH ; /* ADC 0 LESS-THAN HIGH BYTE */ +__sfr __at (0xC8) T2CON ; /* TIMER 2 CONTROL */ +__sfr __at (0xC8) TMR2CN ; /* TIMER 2 CONTROL */ +__sfr __at (0xCA) RCAP2L ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCA) TMR2RLL ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCB) RCAP2H ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCB) TMR2RLH ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCC) TL2 ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCC) TMR2L ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCD) TH2 ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xCD) TMR2H ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xD0) PSW ; /* PROGRAM STATUS WORD */ +__sfr __at (0xD1) REF0CN ; /* VOLTAGE REFERENCE 0 CONTROL */ +__sfr __at (0xD4) P0SKIP ; /* PORT 0 SKIP */ +__sfr __at (0xD5) P1SKIP ; /* PORT 1 SKIP */ +__sfr __at (0xD8) PCA0CN ; /* PCA CONTROL */ +__sfr __at (0xD9) PCA0MD ; /* PCA MODE */ +__sfr __at (0xDA) PCA0CPM0 ; /* PCA MODULE 0 MODE REGISTER */ +__sfr __at (0xDB) PCA0CPM1 ; /* PCA MODULE 1 MODE REGISTER */ +__sfr __at (0xDC) PCA0CPM2 ; /* PCA MODULE 2 MODE REGISTER */ +__sfr __at (0xE0) ACC ; /* ACCUMULATOR */ +__sfr __at (0xE1) XBR0 ; /* PORT MUX CONFIGURATION REGISTER 0 */ +__sfr __at (0xE2) XBR1 ; /* PORT MUX CONFIGURATION REGISTER 1 */ +__sfr __at (0xE3) OSCLCN ; /* LOW-FREQUENCY OSCILLATOR CONTROL */ +__sfr __at (0xE4) IT01CF ; /* INT0/INT1 CONFIGURATION REGISTER */ +__sfr __at (0xE4) INT01CF ; /* INT0/INT1 CONFIGURATION REGISTER */ +__sfr __at (0xE6) EIE1 ; /* EXTERNAL INTERRUPT ENABLE 1 */ +__sfr __at (0xE8) ADC0CN ; /* ADC 0 CONTROL */ +__sfr __at (0xE9) PCA0CPL1 ; /* PCA CAPTURE 1 LOW */ +__sfr __at (0xEA) PCA0CPH1 ; /* PCA CAPTURE 1 HIGH */ +__sfr __at (0xEB) PCA0CPL2 ; /* PCA CAPTURE 2 LOW */ +__sfr __at (0xEC) PCA0CPH2 ; /* PCA CAPTURE 2 HIGH */ +__sfr __at (0xEF) RSTSRC ; /* RESET SOURCE */ +__sfr __at (0xF0) B ; /* B REGISTER */ +__sfr __at (0xF1) P0MODE ; /* PORT 0 INPUT MODE CONFIGURATION */ +__sfr __at (0xF1) P0MDIN ; /* PORT 0 INPUT MODE CONFIGURATION */ +__sfr __at (0xF2) P1MODE ; /* PORT 1 INPUT MODE CONFIGURATION */ +__sfr __at (0xF2) P1MDIN ; /* PORT 1 INPUT MODE CONFIGURATION */ +__sfr __at (0xF6) EIP1 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +__sfr __at (0xF8) SPI0CN ; /* SPI0 CONTROL */ +__sfr __at (0xF9) PCA0L ; /* PCA COUNTER LOW */ +__sfr __at (0xFA) PCA0H ; /* PCA COUNTER HIGH */ +__sfr __at (0xFB) PCA0CPL0 ; /* PCA CAPTURE 0 LOW */ +__sfr __at (0xFC) PCA0CPH0 ; /* PCA CAPTURE 0 HIGH */ +__sfr __at (0xFF) VDM0CN ; /* VDD MONITOR CONTROL */ + + +/* WORD/DWORD Registers */ + +__sfr16 __at (0x8C8A) TMR0 ; /* TIMER 0 COUNTER */ +__sfr16 __at (0x8D8B) TMR1 ; /* TIMER 1 COUNTER */ +__sfr16 __at (0xCDCC) TMR2 ; /* TIMER 2 COUNTER */ +__sfr16 __at (0xCBCA) RCAP2 ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0xCBCA) TMR2RL ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0x9594) TMR3 ; /* TIMER 3 COUNTER */ +__sfr16 __at (0x9392) TMR3RL ; /* TIMER 3 CAPTURE REGISTER WORD */ +__sfr16 __at (0x9796) IDA0 ; /* CURRENT MODE DAC 0 DATA WORD */ +__sfr16 __at (0xBEBD) ADC0 ; /* ADC 0 DATA WORD */ +__sfr16 __at (0xC4C3) ADC0GT ; /* ADC 0 GREATER-THAN REGISTER WORD */ +__sfr16 __at (0xC6C5) ADC0LT ; /* ADC 0 LESS-THAN REGISTER WORD */ +__sfr16 __at (0xFAF9) PCA0 ; /* PCA COUNTER */ +__sfr16 __at (0xFCFB) PCA0CP0 ; /* PCA CAPTURE 0 WORD */ +__sfr16 __at (0xEAE9) PCA0CP1 ; /* PCA CAPTURE 1 WORD */ +__sfr16 __at (0xECEB) PCA0CP2 ; /* PCA CAPTURE 2 WORD */ + + +/* BIT Registers */ + +/* P0 0x80 */ +__sbit __at (0x80) P0_0 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x87) P0_7 ; + +/* TCON 0x88 */ +__sbit __at (0x88) IT0 ; /* TCON.0 - EXT. INTERRUPT 0 TYPE */ +__sbit __at (0x89) IE0 ; /* TCON.1 - EXT. INTERRUPT 0 EDGE FLAG */ +__sbit __at (0x8A) IT1 ; /* TCON.2 - EXT. INTERRUPT 1 TYPE */ +__sbit __at (0x8B) IE1 ; /* TCON.3 - EXT. INTERRUPT 1 EDGE FLAG */ +__sbit __at (0x8C) TR0 ; /* TCON.4 - TIMER 0 ON/OFF CONTROL */ +__sbit __at (0x8D) TF0 ; /* TCON.5 - TIMER 0 OVERFLOW FLAG */ +__sbit __at (0x8E) TR1 ; /* TCON.6 - TIMER 1 ON/OFF CONTROL */ +__sbit __at (0x8F) TF1 ; /* TCON.7 - TIMER 1 OVERFLOW FLAG */ + +/* P1 0x90 */ +__sbit __at (0x90) P1_0 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x92) P1_2 ; +__sbit __at (0x93) P1_3 ; +__sbit __at (0x94) P1_4 ; +__sbit __at (0x95) P1_5 ; +__sbit __at (0x96) P1_6 ; +__sbit __at (0x97) P1_7 ; + +/* SCON 0x98 */ +__sbit __at (0x98) RI ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x98) RI0 ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x99) TI ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x99) TI0 ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x9A) RB8 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9A) RB80 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9B) TB8 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9B) TB80 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9C) REN ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9C) REN0 ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9D) SM2 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9D) MCE0 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9F) SM0 ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ +__sbit __at (0x9F) S0MODE ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ + +/* P2 0xA0 */ +__sbit __at (0xA0) P2_0 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA4) P2_4 ; +__sbit __at (0xA5) P2_5 ; +__sbit __at (0xA6) P2_6 ; +__sbit __at (0xA7) P2_7 ; + +/* IE 0xA8 */ +__sbit __at (0xA8) EX0 ; /* IE.0 - EXTERNAL INTERRUPT 0 ENABLE */ +__sbit __at (0xA9) ET0 ; /* IE.1 - TIMER 0 INTERRUPT ENABLE */ +__sbit __at (0xAA) EX1 ; /* IE.2 - EXTERNAL INTERRUPT 1 ENABLE */ +__sbit __at (0xAB) ET1 ; /* IE.3 - TIMER 1 INTERRUPT ENABLE */ +__sbit __at (0xAC) ES ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAC) ES0 ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAD) ET2 ; /* IE.5 - TIMER 2 INTERRUPT ENABLE */ +__sbit __at (0xAE) ESPI0 ; /* IE.6 - SPI0 INTERRUPT ENABLE */ +__sbit __at (0xAF) EA ; /* IE.7 - GLOBAL INTERRUPT ENABLE */ + +/* IP 0xB8 */ +__sbit __at (0xB8) PX0 ; /* IP.0 - EXTERNAL INTERRUPT 0 PRIORITY */ +__sbit __at (0xB9) PT0 ; /* IP.1 - TIMER 0 PRIORITY */ +__sbit __at (0xBA) PX1 ; /* IP.2 - EXTERNAL INTERRUPT 1 PRIORITY */ +__sbit __at (0xBB) PT1 ; /* IP.3 - TIMER 1 PRIORITY */ +__sbit __at (0xBC) PS ; /* IP.4 - SERIAL PORT PRIORITY */ +__sbit __at (0xBC) PS0 ; /* IP.4 - SERIAL PORT PRIORITY */ +__sbit __at (0xBD) PT2 ; /* IP.5 - TIMER 2 PRIORITY */ +__sbit __at (0xBE) PSPI0 ; /* IP.6 - SPI0 PRIORITY */ + +/* SMB0CN 0xC0 */ +__sbit __at (0xC0) SI ; /* SMB0CN.0 - SMBUS 0 INTERRUPT PENDING FLAG */ +__sbit __at (0xC1) ACK ; /* SMB0CN.1 - SMBUS 0 ACKNOWLEDGE FLAG */ +__sbit __at (0xC2) ARBLOST ; /* SMB0CN.2 - SMBUS 0 ARBITRATION LOST INDICATOR */ +__sbit __at (0xC3) ACKRQ ; /* SMB0CN.3 - SMBUS 0 ACKNOWLEDGE REQUEST */ +__sbit __at (0xC4) STO ; /* SMB0CN.4 - SMBUS 0 STOP FLAG */ +__sbit __at (0xC5) STA ; /* SMB0CN.5 - SMBUS 0 START FLAG */ +__sbit __at (0xC6) TXMODE ; /* SMB0CN.6 - SMBUS 0 TRANSMIT MODE INDICATOR */ +__sbit __at (0xC7) MASTER ; /* SMB0CN.7 - SMBUS 0 MASTER/SLAVE INDICATOR */ + +/* TMR2CN 0xC8 */ +__sbit __at (0xC8) T2XCLK ; /* TMR2CN.0 - TIMER 2 EXTERNAL CLOCK SELECT */ +__sbit __at (0xCA) TR2 ; /* TMR2CN.2 - TIMER 2 ON/OFF CONTROL */ +__sbit __at (0xCB) T2SPLIT ; /* TMR2CN.3 - TIMER 2 SPLIT MODE ENABLE */ +__sbit __at (0xCD) TF2CEN ; /* TMR2CN.5 - TIMER 2 LOW-FREQ OSC CAPTURE ENABLE*/ +__sbit __at (0xCD) TF2LEN ; /* TMR2CN.5 - TIMER 2 LOW BYTE INTERRUPT ENABLE */ +__sbit __at (0xCE) TF2L ; /* TMR2CN.6 - TIMER 2 LOW BYTE OVERFLOW FLAG */ +__sbit __at (0xCF) TF2 ; /* TMR2CN.7 - TIMER 2 OVERFLOW FLAG */ +__sbit __at (0xCF) TF2H ; /* TMR2CN.7 - TIMER 2 HIGH BYTE OVERFLOW FLAG */ + +/* PSW 0xD0 */ +__sbit __at (0xD0) PARITY ; /* PSW.0 - ACCUMULATOR PARITY FLAG */ +__sbit __at (0xD1) F1 ; /* PSW.1 - FLAG 1 */ +__sbit __at (0xD2) OV ; /* PSW.2 - OVERFLOW FLAG */ +__sbit __at (0xD3) RS0 ; /* PSW.3 - REGISTER BANK SELECT 0 */ +__sbit __at (0xD4) RS1 ; /* PSW.4 - REGISTER BANK SELECT 1 */ +__sbit __at (0xD5) F0 ; /* PSW.5 - FLAG 0 */ +__sbit __at (0xD6) AC ; /* PSW.6 - AUXILIARY CARRY FLAG */ +__sbit __at (0xD7) CY ; /* PSW.7 - CARRY FLAG */ + +/* PCA0CN 0xD8 */ +__sbit __at (0xD8) CCF0 ; /* PCA0CN.0 - PCA MODULE 0 CAPTURE/COMPARE FLAG */ +__sbit __at (0xD9) CCF1 ; /* PCA0CN.1 - PCA MODULE 1 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDA) CCF2 ; /* PCA0CN.2 - PCA MODULE 2 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDE) CR ; /* PCA0CN.6 - PCA COUNTER/TIMER RUN CONTROL */ +__sbit __at (0xDF) CF ; /* PCA0CN.7 - PCA COUNTER/TIMER OVERFLOW FLAG */ + +/* ADC0CN 0xE8 */ +__sbit __at (0xE8) AD0CM0 ; /* ADC0CN.0 - ADC 0 START OF CONV. MODE BIT 0 */ +__sbit __at (0xE9) AD0CM1 ; /* ADC0CN.1 - ADC 0 START OF CONV. MODE BIT 1 */ +__sbit __at (0xEA) AD0CM2 ; /* ADC0CN.2 - ADC 0 START OF CONV. MODE BIT 2 */ +__sbit __at (0xEB) AD0WINT ; /* ADC0CN.3 - ADC 0 WINDOW COMPARE INT. FLAG */ +__sbit __at (0xEC) AD0BUSY ; /* ADC0CN.4 - ADC 0 BUSY FLAG */ +__sbit __at (0xED) AD0INT ; /* ADC0CN.5 - ADC 0 CONV. COMPLETE INT. FLAG */ +__sbit __at (0xEE) AD0TM ; /* ADC0CN.6 - ADC 0 TRACK MODE */ +__sbit __at (0xEF) AD0EN ; /* ADC0CN.7 - ADC 0 ENABLE */ + +/* SPI0CN 0xF8 */ +__sbit __at (0xF8) SPIEN ; /* SPI0CN.0 - SPI0 ENABLE */ +__sbit __at (0xF9) TXBMT ; /* SPI0CN.1 - TRANSMIT BUFFER EMPTY */ +__sbit __at (0xFA) NSSMD0 ; /* SPI0CN.2 - SLAVE SELECT MODE BIT 0 */ +__sbit __at (0xFB) NSSMD1 ; /* SPI0CN.3 - SLAVE SELECT MODE BIT 1 */ +__sbit __at (0xFC) RXOVRN ; /* SPI0CN.4 - RECEIVE OVERRUN FLAG */ +__sbit __at (0xFD) MODF ; /* SPI0CN.5 - MODE FAULT FLAG */ +__sbit __at (0xFE) WCOL ; /* SPI0CN.6 - WRITE COLLISION FLAG */ +__sbit __at (0xFF) SPIF ; /* SPI0CN.7 - SPI0 INTERRUPT FLAG */ + + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define T1M 0x08 /* CKCON */ +#define PSWE 0x01 /* PSCTL */ +#define PSEE 0x02 /* PSCTL */ +#define ECP0 0x20 /* EIE1 */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define CP0E 0x10 /* XBR0 */ +#define CP0OEN 0x10 /* XBR0 */ +#define CP0AE 0x20 /* XBR0 */ +#define CP0AOEN 0x20 /* XBR0 */ + +#endif diff --git a/device/include/mcs51/C8051F336.h b/device/include/mcs51/C8051F336.h new file mode 100644 index 0000000..d3bc8c9 --- /dev/null +++ b/device/include/mcs51/C8051F336.h @@ -0,0 +1,338 @@ +/*------------------------------------------------------------------------- + Register Declarations for the SiLabs C8051F336/7/8/9 Processor Range + + Copyright (C) 2008 - Steven Borley, steven.borley@partnerelectronics.com + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051F336_H +#define C8051F336_H + +#include + +/* BYTE Registers */ + +SFR( P0, 0x80 ) ; /* PORT 0 */ +SFR( SP, 0x81 ) ; /* STACK POINTER */ +SFR( DPL, 0x82 ) ; /* DATA POINTER - LOW BYTE */ +SFR( DPH, 0x83 ) ; /* DATA POINTER - HIGH BYTE */ +SFR( PCON, 0x87 ) ; /* POWER CONTROL */ +SFR( TCON, 0x88 ) ; /* TIMER CONTROL */ +SFR( TMOD, 0x89 ) ; /* TIMER MODE */ +SFR( TL0, 0x8A ) ; /* TIMER 0 - LOW BYTE */ +SFR( TL1, 0x8B ) ; /* TIMER 1 - LOW BYTE */ +SFR( TH0, 0x8C ) ; /* TIMER 0 - HIGH BYTE */ +SFR( TH1, 0x8D ) ; /* TIMER 1 - HIGH BYTE */ +SFR( CKCON, 0x8E ) ; /* CLOCK CONTROL */ +SFR( PSCTL, 0x8F ) ; /* PROGRAM STORE R/W CONTROL */ +SFR( P1, 0x90 ) ; /* PORT 1 */ +SFR( TMR3CN, 0x91 ) ; /* TIMER 3 CONTROL */ +SFR( TMR3RLL, 0x92 ) ; /* TIMER 3 CAPTURE REGISTER - LOW BYTE */ +SFR( TMR3RLH, 0x93 ) ; /* TIMER 3 CAPTURE REGISTER - HIGH BYTE */ +SFR( TMR3L, 0x94 ) ; /* TIMER 3 - LOW BYTE */ +SFR( TMR3H, 0x95 ) ; /* TIMER 3 - HIGH BYTE */ +SFR( IDA0L, 0x96 ) ; /* CURRENT MODE DAC 0 - LOW BYTE */ +SFR( IDA0H, 0x97 ) ; /* CURRENT MODE DAC 0 - HIGH BYTE */ +SFR( SCON, 0x98 ) ; /* SERIAL PORT CONTROL */ +SFR( SCON0, 0x98 ) ; /* SERIAL PORT CONTROL */ +SFR( SBUF, 0x99 ) ; /* SERIAL PORT BUFFER */ +SFR( SBUF0, 0x99 ) ; /* SERIAL PORT BUFFER */ +SFR( CPT0CN, 0x9B ) ; /* COMPARATOR 0 CONTROL */ +SFR( CPT0MD, 0x9D ) ; /* COMPARATOR 0 MODE SELECTION */ +SFR( CPT0MX, 0x9F ) ; /* COMPARATOR 0 MUX SELECTION */ +SFR( P2, 0xA0 ) ; /* PORT 2 */ +SFR( SPI0CFG, 0xA1 ) ; /* SPI0 CONFIGURATION */ +SFR( SPI0CKR, 0xA2 ) ; /* SPI0 CLOCK RATE CONTROL */ +SFR( SPI0DAT, 0xA3 ) ; /* SPI0 DATA */ +SFR( P0MDOUT, 0xA4 ) ; /* PORT 0 OUTPUT MODE CONFIGURATION */ +SFR( P1MDOUT, 0xA5 ) ; /* PORT 1 OUTPUT MODE CONFIGURATION */ +SFR( P2MDOUT, 0xA6 ) ; /* PORT 2 OUTPUT MODE CONFIGURATION */ +SFR( IE, 0xA8 ) ; /* INTERRUPT ENABLE */ +SFR( CLKSEL, 0xA9 ) ; /* SYSTEM CLOCK SELECT */ +SFR( EMI0CN, 0xAA ) ; /* EXTERNAL MEMORY INTERFACE CONTROL */ +SFR( _XPAGE, 0xAA ) ; /* XDATA/PDATA PAGE */ +SFR( OSCXCN, 0xB1 ) ; /* EXTERNAL OSCILLATOR CONTROL */ +SFR( OSCICN, 0xB2 ) ; /* INTERNAL OSCILLATOR CONTROL */ +SFR( OSCICL, 0xB3 ) ; /* INTERNAL OSCILLATOR CALIBRATION */ +SFR( FLSCL, 0xB6 ) ; /* FLASH MEMORY TIMING PRESCALER */ +SFR( FLKEY, 0xB7 ) ; /* FLASH ACESS LIMIT */ +SFR( IP, 0xB8 ) ; /* INTERRUPT PRIORITY */ +SFR( IDA0CN, 0xB9 ) ; /* CURRENT MODE DAC 0 - CONTROL */ +SFR( AMX0N, 0xBA ) ; /* ADC 0 MUX NEGATIVE CHANNEL SELECTION */ +SFR( AMX0P, 0xBB ) ; /* ADC 0 MUX POSITIVE CHANNEL SELECTION */ +SFR( ADC0CF, 0xBC ) ; /* ADC 0 CONFIGURATION */ +SFR( ADC0L, 0xBD ) ; /* ADC 0 DATA WORD LSB */ +SFR( ADC0H, 0xBE ) ; /* ADC 0 DATA WORD MSB */ +SFR( SMB0CN, 0xC0 ) ; /* SMBUS CONTROL */ +SFR( SMB0CF, 0xC1 ) ; /* SMBUS CONFIGURATION */ +SFR( SMB0DAT, 0xC2 ) ; /* SMBUS DATA */ +SFR( ADC0GTL, 0xC3 ) ; /* ADC 0 GREATER-THAN LOW BYTE */ +SFR( ADC0GTH, 0xC4 ) ; /* ADC 0 GREATER-THAN HIGH BYTE */ +SFR( ADC0LTL, 0xC5 ) ; /* ADC 0 LESS-THAN LOW BYTE */ +SFR( ADC0LTH, 0xC6 ) ; /* ADC 0 LESS-THAN HIGH BYTE */ +SFR( T2CON, 0xC8 ) ; /* TIMER 2 CONTROL */ +SFR( TMR2CN, 0xC8 ) ; /* TIMER 2 CONTROL */ +SFR( RCAP2L, 0xCA ) ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +SFR( TMR2RLL, 0xCA ) ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +SFR( RCAP2H, 0xCB ) ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +SFR( TMR2RLH, 0xCB ) ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +SFR( TL2, 0xCC ) ; /* TIMER 2 - LOW BYTE */ +SFR( TMR2L, 0xCC ) ; /* TIMER 2 - LOW BYTE */ +SFR( TH2, 0xCD ) ; /* TIMER 2 - HIGH BYTE */ +SFR( TMR2H, 0xCD ) ; /* TIMER 2 - HIGH BYTE */ +SFR( PSW, 0xD0 ) ; /* PROGRAM STATUS WORD */ +SFR( REF0CN, 0xD1 ) ; /* VOLTAGE REFERENCE 0 CONTROL */ +SFR( P0SKIP, 0xD4 ) ; /* PORT 0 SKIP */ +SFR( P1SKIP, 0xD5 ) ; /* PORT 1 SKIP */ +SFR( P2SKIP, 0xD6 ) ; /* PORT 2 SKIP */ +SFR( SMB0ADR, 0xD7 ) ; /* SMBUS SLAVE ADDRESS */ +SFR( PCA0CN, 0xD8 ) ; /* PCA CONTROL */ +SFR( PCA0MD, 0xD9 ) ; /* PCA MODE */ +SFR( PCA0CPM0, 0xDA ) ; /* PCA MODULE 0 MODE REGISTER */ +SFR( PCA0CPM1, 0xDB ) ; /* PCA MODULE 1 MODE REGISTER */ +SFR( PCA0CPM2, 0xDC ) ; /* PCA MODULE 2 MODE REGISTER */ +SFR( ACC, 0xE0 ) ; /* ACCUMULATOR */ +SFR( XBR0, 0xE1 ) ; /* PORT MUX CONFIGURATION REGISTER 0 */ +SFR( XBR1, 0xE2 ) ; /* PORT MUX CONFIGURATION REGISTER 1 */ +SFR( OSCLCN, 0xE3 ) ; /* LOW-FREQUENCY OSCILLATOR CONTROL */ +SFR( IT01CF, 0xE4 ) ; /* INT0/INT1 CONFIGURATION REGISTER */ +SFR( INT01CF, 0xE4 ) ; /* INT0/INT1 CONFIGURATION REGISTER */ +SFR( EIE1, 0xE6 ) ; /* EXTERNAL INTERRUPT ENABLE 1 */ +SFR( SMB0ADM, 0xE7 ) ; /* SMBUS SLAVE ADDRESS MASK */ +SFR( ADC0CN, 0xE8 ) ; /* ADC 0 CONTROL */ +SFR( PCA0CPL1, 0xE9 ) ; /* PCA CAPTURE 1 LOW */ +SFR( PCA0CPH1, 0xEA ) ; /* PCA CAPTURE 1 HIGH */ +SFR( PCA0CPL2, 0xEB ) ; /* PCA CAPTURE 2 LOW */ +SFR( PCA0CPH2, 0xEC ) ; /* PCA CAPTURE 2 HIGH */ +SFR( P1MAT, 0xED ) ; /* PORT 1 MATCH REGISTER */ +SFR( P1MASK, 0xEE ) ; /* PORT 1 MASK REGISTER */ +SFR( RSTSRC, 0xEF ) ; /* RESET SOURCE */ +SFR( B, 0xF0 ) ; /* B REGISTER */ +SFR( P0MODE, 0xF1 ) ; /* PORT 0 INPUT MODE CONFIGURATION */ +SFR( P0MDIN, 0xF1 ) ; /* PORT 0 INPUT MODE CONFIGURATION */ +SFR( P1MODE, 0xF2 ) ; /* PORT 1 INPUT MODE CONFIGURATION */ +SFR( P1MDIN, 0xF2 ) ; /* PORT 1 INPUT MODE CONFIGURATION */ +SFR( P2MDIN, 0xF3 ) ; /* PORT 2 INPUT MODE */ +SFR( EIP1, 0xF6 ) ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +SFR( PCA0PWM, 0xF7 ) ; /* PCA PWM CONFIGURATION */ +SFR( SPI0CN, 0xF8 ) ; /* SPI0 CONTROL */ +SFR( PCA0L, 0xF9 ) ; /* PCA COUNTER LOW */ +SFR( PCA0H, 0xFA ) ; /* PCA COUNTER HIGH */ +SFR( PCA0CPL0, 0xFB ) ; /* PCA CAPTURE 0 LOW */ +SFR( PCA0CPH0, 0xFC ) ; /* PCA CAPTURE 0 HIGH */ +SFR( P0MAT, 0xFD ) ; /* PORT 0 MATCH REGISTER */ +SFR( P0MASK, 0xFE ) ; /* PORT 0 MASK REGISTER */ +SFR( VDM0CN, 0xFF ) ; /* VDD MONITOR CONTROL */ + + +/* WORD/DWORD Registers */ + +SFR16E( TMR0, 0x8C8A ) ; /* TIMER 0 COUNTER */ +SFR16E( TMR1, 0x8D8B ) ; /* TIMER 1 COUNTER */ +SFR16E( TMR2, 0xCDCC ) ; /* TIMER 2 COUNTER */ +SFR16E( RCAP2, 0xCBCA ) ; /* TIMER 2 CAPTURE REGISTER WORD */ +SFR16E( TMR2RL, 0xCBCA ) ; /* TIMER 2 CAPTURE REGISTER WORD */ +SFR16E( TMR3, 0x9594 ) ; /* TIMER 3 COUNTER */ +SFR16E( TMR3RL, 0x9392 ) ; /* TIMER 3 CAPTURE REGISTER WORD */ +SFR16E( IDA0, 0x9796 ) ; /* CURRENT MODE DAC 0 DATA WORD */ +SFR16E( ADC0, 0xBEBD ) ; /* ADC 0 DATA WORD */ +SFR16E( ADC0GT, 0xC4C3 ) ; /* ADC 0 GREATER-THAN REGISTER WORD */ +SFR16E( ADC0LT, 0xC6C5 ) ; /* ADC 0 LESS-THAN REGISTER WORD */ +SFR16E( PCA0, 0xFAF9 ) ; /* PCA COUNTER */ +SFR16E( PCA0CP0, 0xFCFB ) ; /* PCA CAPTURE 0 WORD */ +SFR16E( PCA0CP1, 0xEAE9 ) ; /* PCA CAPTURE 1 WORD */ +SFR16E( PCA0CP2, 0xECEB ) ; /* PCA CAPTURE 2 WORD */ + + +/* BIT Registers */ + +/* P0 0x80 */ +SBIT( P0_0, 0x80, 0 ) ; +SBIT( P0_1, 0x80, 1 ) ; +SBIT( P0_2, 0x80, 2 ) ; +SBIT( P0_3, 0x80, 3 ) ; +SBIT( P0_4, 0x80, 4 ) ; +SBIT( P0_5, 0x80, 5 ) ; +SBIT( P0_6, 0x80, 6 ) ; +SBIT( P0_7, 0x80, 7 ) ; + +/* TCON 0x88 */ +SBIT( IT0, 0x88, 0 ) ; /* TCON.0 - EXT. INTERRUPT 0 TYPE */ +SBIT( IE0, 0x88, 1 ) ; /* TCON.1 - EXT. INTERRUPT 0 EDGE FLAG */ +SBIT( IT1, 0x88, 2 ) ; /* TCON.2 - EXT. INTERRUPT 1 TYPE */ +SBIT( IE1, 0x88, 3 ) ; /* TCON.3 - EXT. INTERRUPT 1 EDGE FLAG */ +SBIT( TR0, 0x88, 4 ) ; /* TCON.4 - TIMER 0 ON/OFF CONTROL */ +SBIT( TF0, 0x88, 5 ) ; /* TCON.5 - TIMER 0 OVERFLOW FLAG */ +SBIT( TR1, 0x88, 6 ) ; /* TCON.6 - TIMER 1 ON/OFF CONTROL */ +SBIT( TF1, 0x88, 7 ) ; /* TCON.7 - TIMER 1 OVERFLOW FLAG */ + +/* P1 0x90 */ +SBIT( P1_0, 0x90, 0 ) ; +SBIT( P1_1, 0x90, 1 ) ; +SBIT( P1_2, 0x90, 2 ) ; +SBIT( P1_3, 0x90, 3 ) ; +SBIT( P1_4, 0x90, 4 ) ; +SBIT( P1_5, 0x90, 5 ) ; +SBIT( P1_6, 0x90, 6 ) ; +SBIT( P1_7, 0x90, 7 ) ; + +/* SCON 0x98 */ +SBIT( RI, 0x98, 0 ) ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +SBIT( RI0, 0x98, 0 ) ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +SBIT( TI, 0x98, 1 ) ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +SBIT( TI0, 0x98, 1 ) ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +SBIT( RB8, 0x98, 2 ) ; /* SCON.2 - RECEIVE BIT 8 */ +SBIT( RB80, 0x98, 2 ) ; /* SCON.2 - RECEIVE BIT 8 */ +SBIT( TB8, 0x98, 3 ) ; /* SCON.3 - TRANSMIT BIT 8 */ +SBIT( TB80, 0x98, 3 ) ; /* SCON.3 - TRANSMIT BIT 8 */ +SBIT( REN, 0x98, 4 ) ; /* SCON.4 - RECEIVE ENABLE */ +SBIT( REN0, 0x98, 4 ) ; /* SCON.4 - RECEIVE ENABLE */ +SBIT( SM2, 0x98, 5 ) ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +SBIT( MCE0, 0x98, 5 ) ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +SBIT( SM0, 0x98, 7 ) ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ +SBIT( S0MODE, 0x98, 7 ) ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ + +/* P2 0xA0 */ +SBIT( P2_0, 0xA0, 0 ) ; +SBIT( P2_1, 0xA0, 1 ) ; +SBIT( P2_2, 0xA0, 2 ) ; +SBIT( P2_3, 0xA0, 3 ) ; +SBIT( P2_4, 0xA0, 4 ) ; +SBIT( P2_5, 0xA0, 5 ) ; +SBIT( P2_6, 0xA0, 6 ) ; +SBIT( P2_7, 0xA0, 7 ) ; + +/* IE 0xA8 */ +SBIT( EX0, 0xA8, 0 ) ; /* IE.0 - EXTERNAL INTERRUPT 0 ENABLE */ +SBIT( ET0, 0xA8, 1 ) ; /* IE.1 - TIMER 0 INTERRUPT ENABLE */ +SBIT( EX1, 0xA8, 2 ) ; /* IE.2 - EXTERNAL INTERRUPT 1 ENABLE */ +SBIT( ET1, 0xA8, 3 ) ; /* IE.3 - TIMER 1 INTERRUPT ENABLE */ +SBIT( ES, 0xA8, 4 ) ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +SBIT( ES0, 0xA8, 4 ) ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +SBIT( ET2, 0xA8, 5 ) ; /* IE.5 - TIMER 2 INTERRUPT ENABLE */ +SBIT( ESPI0, 0xA8, 6 ) ; /* IE.6 - SPI0 INTERRUPT ENABLE */ +SBIT( EA, 0xA8, 7 ) ; /* IE.7 - GLOBAL INTERRUPT ENABLE */ + +/* IP 0xB8 */ +SBIT( PX0, 0xB8, 0 ) ; /* IP.0 - EXTERNAL INTERRUPT 0 PRIORITY */ +SBIT( PT0, 0xB8, 1 ) ; /* IP.1 - TIMER 0 PRIORITY */ +SBIT( PX1, 0xB8, 2 ) ; /* IP.2 - EXTERNAL INTERRUPT 1 PRIORITY */ +SBIT( PT1, 0xB8, 3 ) ; /* IP.3 - TIMER 1 PRIORITY */ +SBIT( PS, 0xB8, 4 ) ; /* IP.4 - SERIAL PORT PRIORITY */ +SBIT( PS0, 0xB8, 4 ) ; /* IP.4 - SERIAL PORT PRIORITY */ +SBIT( PT2, 0xB8, 5 ) ; /* IP.5 - TIMER 2 PRIORITY */ +SBIT( PSPI0, 0xB8, 6 ) ; /* IP.6 - SPI0 PRIORITY */ + +/* SMB0CN 0xC0 */ +SBIT( SI, 0xC0, 0 ) ; /* SMB0CN.0 - SMBUS 0 INTERRUPT PENDING FLAG */ +SBIT( ACK, 0xC0, 1 ) ; /* SMB0CN.1 - SMBUS 0 ACKNOWLEDGE FLAG */ +SBIT( ARBLOST, 0xC0, 2 ) ; /* SMB0CN.2 - SMBUS 0 ARBITRATION LOST INDICATOR */ +SBIT( ACKRQ, 0xC0, 3 ) ; /* SMB0CN.3 - SMBUS 0 ACKNOWLEDGE REQUEST */ +SBIT( STO, 0xC0, 4 ) ; /* SMB0CN.4 - SMBUS 0 STOP FLAG */ +SBIT( STA, 0xC0, 5 ) ; /* SMB0CN.5 - SMBUS 0 START FLAG */ +SBIT( TXMODE, 0xC0, 6 ) ; /* SMB0CN.6 - SMBUS 0 TRANSMIT MODE INDICATOR */ +SBIT( MASTER, 0xC0, 7 ) ; /* SMB0CN.7 - SMBUS 0 MASTER/SLAVE INDICATOR */ + +/* TMR2CN 0xC8 */ +SBIT( T2XCLK, 0xC8, 0 ) ; /* TMR2CN.0 - TIMER 2 EXTERNAL CLOCK SELECT */ +SBIT( TR2, 0xC8, 2 ) ; /* TMR2CN.2 - TIMER 2 ON/OFF CONTROL */ +SBIT( T2SPLIT, 0xC8, 3 ) ; /* TMR2CN.3 - TIMER 2 SPLIT MODE ENABLE */ +SBIT( TF2CEN, 0xC8, 5 ) ; /* TMR2CN.5 - TIMER 2 LOW-FREQ OSC CAPTURE ENABLE*/ +SBIT( TF2LEN, 0xC8, 5 ) ; /* TMR2CN.5 - TIMER 2 LOW BYTE INTERRUPT ENABLE */ +SBIT( TF2L, 0xC8, 6 ) ; /* TMR2CN.6 - TIMER 2 LOW BYTE OVERFLOW FLAG */ +SBIT( TF2, 0xC8, 7 ) ; /* TMR2CN.7 - TIMER 2 OVERFLOW FLAG */ +SBIT( TF2H, 0xC8, 7 ) ; /* TMR2CN.7 - TIMER 2 HIGH BYTE OVERFLOW FLAG */ + +/* PSW 0xD0 */ +SBIT( PARITY, 0xD0, 0 ) ; /* PSW.0 - ACCUMULATOR PARITY FLAG */ +SBIT( F1, 0xD0, 1 ) ; /* PSW.1 - FLAG 1 */ +SBIT( OV, 0xD0, 2 ) ; /* PSW.2 - OVERFLOW FLAG */ +SBIT( RS0, 0xD0, 3 ) ; /* PSW.3 - REGISTER BANK SELECT 0 */ +SBIT( RS1, 0xD0, 4 ) ; /* PSW.4 - REGISTER BANK SELECT 1 */ +SBIT( F0, 0xD0, 5 ) ; /* PSW.5 - FLAG 0 */ +SBIT( AC, 0xD0, 6 ) ; /* PSW.6 - AUXILIARY CARRY FLAG */ +SBIT( CY, 0xD0, 7 ) ; /* PSW.7 - CARRY FLAG */ + +/* PCA0CN 0xD8 */ +SBIT( CCF0, 0xD8, 0 ) ; /* PCA0CN.0 - PCA MODULE 0 CAPTURE/COMPARE FLAG */ +SBIT( CCF1, 0xD8, 1 ) ; /* PCA0CN.1 - PCA MODULE 1 CAPTURE/COMPARE FLAG */ +SBIT( CCF2, 0xD8, 2 ) ; /* PCA0CN.2 - PCA MODULE 2 CAPTURE/COMPARE FLAG */ +SBIT( CR, 0xD8, 6 ) ; /* PCA0CN.6 - PCA COUNTER/TIMER RUN CONTROL */ +SBIT( CF, 0xD8, 7 ) ; /* PCA0CN.7 - PCA COUNTER/TIMER OVERFLOW FLAG */ + +/* ADC0CN 0xE8 */ +SBIT( AD0CM0, 0xE8, 0 ) ; /* ADC0CN.0 - ADC 0 START OF CONV. MODE BIT 0 */ +SBIT( AD0CM1, 0xE8, 1 ) ; /* ADC0CN.1 - ADC 0 START OF CONV. MODE BIT 1 */ +SBIT( AD0CM2, 0xE8, 2 ) ; /* ADC0CN.2 - ADC 0 START OF CONV. MODE BIT 2 */ +SBIT( AD0WINT, 0xE8, 3 ) ; /* ADC0CN.3 - ADC 0 WINDOW COMPARE INT. FLAG */ +SBIT( AD0BUSY, 0xE8, 4 ) ; /* ADC0CN.4 - ADC 0 BUSY FLAG */ +SBIT( AD0INT, 0xE8, 5 ) ; /* ADC0CN.5 - ADC 0 CONV. COMPLETE INT. FLAG */ +SBIT( AD0TM, 0xE8, 6 ) ; /* ADC0CN.6 - ADC 0 TRACK MODE */ +SBIT( AD0EN, 0xE8, 7 ) ; /* ADC0CN.7 - ADC 0 ENABLE */ + +/* SPI0CN 0xF8 */ +SBIT( SPIEN, 0xF8, 0 ) ; /* SPI0CN.0 - SPI0 ENABLE */ +SBIT( TXBMT, 0xF8, 1 ) ; /* SPI0CN.1 - TRANSMIT BUFFER EMPTY */ +SBIT( NSSMD0, 0xF8, 2 ) ; /* SPI0CN.2 - SLAVE SELECT MODE BIT 0 */ +SBIT( NSSMD1, 0xF8, 3 ) ; /* SPI0CN.3 - SLAVE SELECT MODE BIT 1 */ +SBIT( RXOVRN, 0xF8, 4 ) ; /* SPI0CN.4 - RECEIVE OVERRUN FLAG */ +SBIT( MODF, 0xF8, 5 ) ; /* SPI0CN.5 - MODE FAULT FLAG */ +SBIT( WCOL, 0xF8, 6 ) ; /* SPI0CN.6 - WRITE COLLISION FLAG */ +SBIT( SPIF, 0xF8, 7 ) ; /* SPI0CN.7 - SPI0 INTERRUPT FLAG */ + + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define T1M 0x08 /* CKCON */ +#define PSWE 0x01 /* PSCTL */ +#define PSEE 0x02 /* PSCTL */ +#define ECP0 0x20 /* EIE1 */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define CP0E 0x10 /* XBR0 */ +#define CP0OEN 0x10 /* XBR0 */ +#define CP0AE 0x20 /* XBR0 */ +#define CP0AOEN 0x20 /* XBR0 */ + +/* Interrupts */ + +#define INT_EXT0 0 /* External Interrupt 0 */ +#define INT_TIMER0 1 /* Timer0 Overflow */ +#define INT_EXT1 2 /* External Interrupt 1 */ +#define INT_TIMER1 3 /* Timer1 Overflow */ +#define INT_UART0 4 /* Serial Port 0 */ +#define INT_TIMER2 5 /* Timer2 Overflow */ +#define INT_SPI0 6 /* Serial Peripheral Interface 0 */ +#define INT_SMBUS0 7 /* SMBus0 Interface */ +#define INT_PMAT 8 /* Port match */ +#define INT_ADC0_WINDOW 9 /* ADC0 Window Comparison */ +#define INT_ADC0_EOC 10 /* ADC0 End Of Conversion */ +#define INT_PCA0 11 /* PCA0 Peripheral */ +#define INT_COMPARATOR0 12 /* Comparator0 */ +/* 13 Reserved */ +#define INT_TIMER3 14 /* Timer3 Overflow */ + +#endif diff --git a/device/include/mcs51/C8051F340.h b/device/include/mcs51/C8051F340.h new file mode 100644 index 0000000..aa9496f --- /dev/null +++ b/device/include/mcs51/C8051F340.h @@ -0,0 +1,359 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Cygnal/SiLabs C8051F34x Processor Range + + Copyright (C) 2006 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051F340_H +#define C8051F340_H + + +/* BYTE Registers */ +__sfr __at (0x80) P0 ; /* PORT 0 */ +__sfr __at (0x81) SP ; /* STACK POINTER */ +__sfr __at (0x82) DPL ; /* DATA POINTER - LOW BYTE */ +__sfr __at (0x83) DPH ; /* DATA POINTER - HIGH BYTE */ +__sfr __at (0x84) EMI0TC ; /* EXTERNAL MEMORY INTERFACE TIMING */ +__sfr __at (0x85) EMI0CF ; /* EXTERNAL MEMORY INTERFACE CONFIGURATION */ +__sfr __at (0x86) OSCLCN ; /* LOW-FREQUENCY OSCILLATOR CONTROL */ +__sfr __at (0x87) PCON ; /* POWER CONTROL */ +__sfr __at (0x88) TCON ; /* TIMER CONTROL */ +__sfr __at (0x89) TMOD ; /* TIMER MODE */ +__sfr __at (0x8A) TL0 ; /* TIMER 0 - LOW BYTE */ +__sfr __at (0x8B) TL1 ; /* TIMER 1 - LOW BYTE */ +__sfr __at (0x8C) TH0 ; /* TIMER 0 - HIGH BYTE */ +__sfr __at (0x8D) TH1 ; /* TIMER 1 - HIGH BYTE */ +__sfr __at (0x8E) CKCON ; /* CLOCK CONTROL */ +__sfr __at (0x8F) PSCTL ; /* PROGRAM STORE R/W CONTROL */ +__sfr __at (0x90) P1 ; /* PORT 1 */ +__sfr __at (0x91) TMR3CN ; /* TIMER 3 CONTROL */ +__sfr __at (0x92) TMR3RLL ; /* TIMER 3 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0x93) TMR3RLH ; /* TIMER 3 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0x94) TMR3L ; /* TIMER 3 - LOW BYTE */ +__sfr __at (0x95) TMR3H ; /* TIMER 3 - HIGH BYTE */ +__sfr __at (0x96) USB0ADR ; /* USB0 INDIRECT ADDRESS REGISTER */ +__sfr __at (0x97) USB0DAT ; /* USB0 DATA REGISTER */ +__sfr __at (0x98) SCON ; /* SERIAL PORT CONTROL */ +__sfr __at (0x98) SCON0 ; /* SERIAL PORT CONTROL */ +__sfr __at (0x99) SBUF ; /* SERIAL PORT BUFFER */ +__sfr __at (0x99) SBUF0 ; /* SERIAL PORT BUFFER */ +__sfr __at (0x9A) CPT1CN ; /* COMPARATOR 1 CONTROL */ +__sfr __at (0x9B) CPT0CN ; /* COMPARATOR 0 CONTROL */ +__sfr __at (0x9C) CPT1MD ; /* COMPARATOR 1 MODE SELECTION */ +__sfr __at (0x9D) CPT0MD ; /* COMPARATOR 0 MODE SELECTION */ +__sfr __at (0x9E) CPT1MX ; /* COMPARATOR 1 MUX SELECTION */ +__sfr __at (0x9F) CPT0MX ; /* COMPARATOR 0 MUX SELECTION */ +__sfr __at (0xA0) P2 ; /* PORT 2 */ +__sfr __at (0xA1) SPI0CFG ; /* SPI0 CONFIGURATION */ +__sfr __at (0xA2) SPI0CKR ; /* SPI0 CLOCK RATE CONTROL */ +__sfr __at (0xA3) SPI0DAT ; /* SPI0 DATA */ +__sfr __at (0xA4) P0MDOUT ; /* PORT 0 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA5) P1MDOUT ; /* PORT 1 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA6) P2MDOUT ; /* PORT 2 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA7) P3MDOUT ; /* PORT 3 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA8) IE ; /* INTERRUPT ENABLE */ +__sfr __at (0xA9) CLKSEL ; /* SYSTEM CLOCK SELECT */ +__sfr __at (0xAA) EMI0CN ; /* EXTERNAL MEMORY INTERFACE CONTROL */ +__sfr __at (0xAA) _XPAGE ; /* XDATA/PDATA PAGE */ +__sfr __at (0xAC) SBCON1 ; /* UART 1 BAUDRATE GENERATOR CONTROL */ +__sfr __at (0xAE) P4MDOUT ; /* PORT 4 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xAF) PFE0CN ; /* PREFETCH ENGINE CONTROL */ +__sfr __at (0xB0) P3 ; /* PORT 3 */ +__sfr __at (0xB1) OSCXCN ; /* EXTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB2) OSCICN ; /* INTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB3) OSCICL ; /* INTERNAL OSCILLATOR CALIBRATION */ +__sfr __at (0xB4) SBRLL1 ; /* UART 1 BAUDRATE GENERATOR - LOW BYTE */ +__sfr __at (0xB5) SBRLH1 ; /* UART 1 BAUDRATE GENERATOR - HIGH BYTE */ +__sfr __at (0xB6) FLSCL ; /* FLASH MEMORY TIMING PRESCALER */ +__sfr __at (0xB7) FLKEY ; /* FLASH ACESS LIMIT */ +__sfr __at (0xB8) IP ; /* INTERRUPT PRIORITY */ +__sfr __at (0xB9) CLKMUL ; /* CLOCK MULTIPLIER CONTROL REGISTER */ +__sfr __at (0xBA) AMX0N ; /* ADC 0 MUX NEGATIVE CHANNEL SELECTION */ +__sfr __at (0xBB) AMX0P ; /* ADC 0 MUX POSITIVE CHANNEL SELECTION */ +__sfr __at (0xBC) ADC0CF ; /* ADC 0 CONFIGURATION */ +__sfr __at (0xBD) ADC0L ; /* ADC 0 DATA WORD LSB */ +__sfr __at (0xBE) ADC0H ; /* ADC 0 DATA WORD MSB */ +__sfr __at (0xC0) SMB0CN ; /* SMBUS CONTROL */ +__sfr __at (0xC1) SMB0CF ; /* SMBUS CONFIGURATION */ +__sfr __at (0xC2) SMB0DAT ; /* SMBUS DATA */ +__sfr __at (0xC3) ADC0GTL ; /* ADC 0 GREATER-THAN LOW BYTE */ +__sfr __at (0xC4) ADC0GTH ; /* ADC 0 GREATER-THAN HIGH BYTE */ +__sfr __at (0xC5) ADC0LTL ; /* ADC 0 LESS-THAN LOW BYTE */ +__sfr __at (0xC6) ADC0LTH ; /* ADC 0 LESS-THAN HIGH BYTE */ +__sfr __at (0xC7) P4 ; /* PORT 4 */ +__sfr __at (0xC8) T2CON ; /* TIMER 2 CONTROL */ +__sfr __at (0xC8) TMR2CN ; /* TIMER 2 CONTROL */ +__sfr __at (0xC9) REG0CN ; /* VOLTAGE REGULATOR CONTROL */ +__sfr __at (0xCA) RCAP2L ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCA) TMR2RLL ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCB) RCAP2H ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCB) TMR2RLH ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCC) TL2 ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCC) TMR2L ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCD) TH2 ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xCD) TMR2H ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xD0) PSW ; /* PROGRAM STATUS WORD */ +__sfr __at (0xD1) REF0CN ; /* VOLTAGE REFERENCE 0 CONTROL */ +__sfr __at (0xD2) SCON1 ; /* UART 1 CONTROL */ +__sfr __at (0xD3) SBUF1 ; /* UART 1 DATA BUFFER */ +__sfr __at (0xD4) P0SKIP ; /* PORT 0 SKIP */ +__sfr __at (0xD5) P1SKIP ; /* PORT 1 SKIP */ +__sfr __at (0xD6) P2SKIP ; /* PORT 2 SKIP */ +__sfr __at (0xD7) USB0XCN ; /* USB0 TRANSCEIVER CONTROL */ +__sfr __at (0xD8) PCA0CN ; /* PCA CONTROL */ +__sfr __at (0xD9) PCA0MD ; /* PCA MODE */ +__sfr __at (0xDA) PCA0CPM0 ; /* PCA MODULE 0 MODE REGISTER */ +__sfr __at (0xDB) PCA0CPM1 ; /* PCA MODULE 1 MODE REGISTER */ +__sfr __at (0xDC) PCA0CPM2 ; /* PCA MODULE 2 MODE REGISTER */ +__sfr __at (0xDD) PCA0CPM3 ; /* PCA MODULE 3 MODE REGISTER */ +__sfr __at (0xDE) PCA0CPM4 ; /* PCA MODULE 4 MODE REGISTER */ +__sfr __at (0xDF) P3SKIP ; /* PORT 3 SKIP */ +__sfr __at (0xE0) ACC ; /* ACCUMULATOR */ +__sfr __at (0xE1) XBR0 ; /* PORT MUX CONFIGURATION REGISTER 0 */ +__sfr __at (0xE2) XBR1 ; /* PORT MUX CONFIGURATION REGISTER 1 */ +__sfr __at (0xE3) XBR2 ; /* PORT MUX CONFIGURATION REGISTER 2 */ +__sfr __at (0xE4) IT01CF ; /* INT0/INT1 CONFIGURATION REGISTER */ +__sfr __at (0xE4) INT01CF ; /* INT0/INT1 CONFIGURATION REGISTER */ +__sfr __at (0xE5) SMOD1 ; /* UART 1 MODE */ +__sfr __at (0xE6) EIE1 ; /* EXTERNAL INTERRUPT ENABLE 1 */ +__sfr __at (0xE7) EIE2 ; /* EXTERNAL INTERRUPT ENABLE 2 */ +__sfr __at (0xE8) ADC0CN ; /* ADC 0 CONTROL */ +__sfr __at (0xE9) PCA0CPL1 ; /* PCA CAPTURE 1 LOW */ +__sfr __at (0xEA) PCA0CPH1 ; /* PCA CAPTURE 1 HIGH */ +__sfr __at (0xEB) PCA0CPL2 ; /* PCA CAPTURE 2 LOW */ +__sfr __at (0xEC) PCA0CPH2 ; /* PCA CAPTURE 2 HIGH */ +__sfr __at (0xED) PCA0CPL3 ; /* PCA CAPTURE 3 LOW */ +__sfr __at (0xEE) PCA0CPH3 ; /* PCA CAPTURE 3 HIGH */ +__sfr __at (0xEF) RSTSRC ; /* RESET SOURCE */ +__sfr __at (0xF0) B ; /* B REGISTER */ +__sfr __at (0xF1) P0MODE ; /* PORT 0 INPUT MODE CONFIGURATION */ +__sfr __at (0xF1) P0MDIN ; /* PORT 0 INPUT MODE CONFIGURATION */ +__sfr __at (0xF2) P1MODE ; /* PORT 1 INPUT MODE CONFIGURATION */ +__sfr __at (0xF2) P1MDIN ; /* PORT 1 INPUT MODE CONFIGURATION */ +__sfr __at (0xF3) P2MODE ; /* PORT 2 INPUT MODE CONFIGURATION */ +__sfr __at (0xF3) P2MDIN ; /* PORT 2 INPUT MODE CONFIGURATION */ +__sfr __at (0xF4) P3MODE ; /* PORT 3 INPUT MODE CONFIGURATION */ +__sfr __at (0xF4) P3MDIN ; /* PORT 3 INPUT MODE CONFIGURATION */ +__sfr __at (0xF5) P4MDIN ; /* PORT 4 INPUT MODE CONFIGURATION */ +__sfr __at (0xF6) EIP1 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +__sfr __at (0xF7) EIP2 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 2 */ +__sfr __at (0xF8) SPI0CN ; /* SPI0 CONTROL */ +__sfr __at (0xF9) PCA0L ; /* PCA COUNTER LOW */ +__sfr __at (0xFA) PCA0H ; /* PCA COUNTER HIGH */ +__sfr __at (0xFB) PCA0CPL0 ; /* PCA CAPTURE 0 LOW */ +__sfr __at (0xFC) PCA0CPH0 ; /* PCA CAPTURE 0 HIGH */ +__sfr __at (0xFD) PCA0CPL4 ; /* PCA CAPTURE 4 LOW */ +__sfr __at (0xFE) PCA0CPH4 ; /* PCA CAPTURE 4 HIGH */ +__sfr __at (0xFF) VDM0CN ; /* VDD MONITOR CONTROL */ + + +/* WORD/DWORD Registers */ + +__sfr16 __at (0x8C8A) TMR0 ; /* TIMER 0 COUNTER */ +__sfr16 __at (0x8D8B) TMR1 ; /* TIMER 1 COUNTER */ +__sfr16 __at (0xCDCC) TMR2 ; /* TIMER 2 COUNTER */ +__sfr16 __at (0xCBCA) RCAP2 ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0xCBCA) TMR2RL ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0x9594) TMR3 ; /* TIMER 3 COUNTER */ +__sfr16 __at (0x9392) TMR3RL ; /* TIMER 3 CAPTURE REGISTER WORD */ +__sfr16 __at (0xB5B4) SBRL1 ; /* UART 1 BAUDRATE GENERATOR WORD */ +__sfr16 __at (0xBEBD) ADC0 ; /* ADC 0 DATA WORD */ +__sfr16 __at (0xC4C3) ADC0GT ; /* ADC 0 GREATER-THAN REGISTER WORD */ +__sfr16 __at (0xC6C5) ADC0LT ; /* ADC 0 LESS-THAN REGISTER WORD */ +__sfr16 __at (0xFAF9) PCA0 ; /* PCA COUNTER */ +__sfr16 __at (0xFCFB) PCA0CP0 ; /* PCA CAPTURE 0 WORD */ +__sfr16 __at (0xEAE9) PCA0CP1 ; /* PCA CAPTURE 1 WORD */ +__sfr16 __at (0xECEB) PCA0CP2 ; /* PCA CAPTURE 2 WORD */ +__sfr16 __at (0xEEED) PCA0CP3 ; /* PCA CAPTURE 3 WORD */ +__sfr16 __at (0xFEFD) PCA0CP4 ; /* PCA CAPTURE 4 WORD */ + + +/* BIT Registers */ + +/* P0 0x80 */ +__sbit __at (0x80) P0_0 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x87) P0_7 ; + +/* TCON 0x88 */ +__sbit __at (0x88) IT0 ; /* TCON.0 - EXT. INTERRUPT 0 TYPE */ +__sbit __at (0x89) IE0 ; /* TCON.1 - EXT. INTERRUPT 0 EDGE FLAG */ +__sbit __at (0x8A) IT1 ; /* TCON.2 - EXT. INTERRUPT 1 TYPE */ +__sbit __at (0x8B) IE1 ; /* TCON.3 - EXT. INTERRUPT 1 EDGE FLAG */ +__sbit __at (0x8C) TR0 ; /* TCON.4 - TIMER 0 ON/OFF CONTROL */ +__sbit __at (0x8D) TF0 ; /* TCON.5 - TIMER 0 OVERFLOW FLAG */ +__sbit __at (0x8E) TR1 ; /* TCON.6 - TIMER 1 ON/OFF CONTROL */ +__sbit __at (0x8F) TF1 ; /* TCON.7 - TIMER 1 OVERFLOW FLAG */ + +/* P1 0x90 */ +__sbit __at (0x90) P1_0 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x92) P1_2 ; +__sbit __at (0x93) P1_3 ; +__sbit __at (0x94) P1_4 ; +__sbit __at (0x95) P1_5 ; +__sbit __at (0x96) P1_6 ; +__sbit __at (0x97) P1_7 ; + +/* SCON 0x98 */ +__sbit __at (0x98) RI ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x98) RI0 ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x99) TI ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x99) TI0 ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x9A) RB8 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9A) RB80 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9B) TB8 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9B) TB80 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9C) REN ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9C) REN0 ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9D) SM2 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9D) MCE0 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9F) SM0 ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ +__sbit __at (0x9F) S0MODE ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ + +/* P2 0xA0 */ +__sbit __at (0xA0) P2_0 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA4) P2_4 ; +__sbit __at (0xA5) P2_5 ; +__sbit __at (0xA6) P2_6 ; +__sbit __at (0xA7) P2_7 ; + +/* IE 0xA8 */ +__sbit __at (0xA8) EX0 ; /* IE.0 - EXTERNAL INTERRUPT 0 ENABLE */ +__sbit __at (0xA9) ET0 ; /* IE.1 - TIMER 0 INTERRUPT ENABLE */ +__sbit __at (0xAA) EX1 ; /* IE.2 - EXTERNAL INTERRUPT 1 ENABLE */ +__sbit __at (0xAB) ET1 ; /* IE.3 - TIMER 1 INTERRUPT ENABLE */ +__sbit __at (0xAC) ES ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAC) ES0 ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAD) ET2 ; /* IE.5 - TIMER 2 INTERRUPT ENABLE */ +__sbit __at (0xAE) ESPI0 ; /* IE.6 - SPI0 INTERRUPT ENABLE */ +__sbit __at (0xAF) EA ; /* IE.7 - GLOBAL INTERRUPT ENABLE */ + +/* P3 0xB0 */ +__sbit __at (0xB0) P3_0 ; +__sbit __at (0xB1) P3_1 ; +__sbit __at (0xB2) P3_2 ; +__sbit __at (0xB3) P3_3 ; +__sbit __at (0xB4) P3_4 ; +__sbit __at (0xB5) P3_5 ; +__sbit __at (0xB6) P3_6 ; +__sbit __at (0xB7) P3_7 ; + +/* IP 0xB8 */ +__sbit __at (0xB8) PX0 ; /* IP.0 - EXTERNAL INTERRUPT 0 PRIORITY */ +__sbit __at (0xB9) PT0 ; /* IP.1 - TIMER 0 PRIORITY */ +__sbit __at (0xBA) PX1 ; /* IP.2 - EXTERNAL INTERRUPT 1 PRIORITY */ +__sbit __at (0xBB) PT1 ; /* IP.3 - TIMER 1 PRIORITY */ +__sbit __at (0xBC) PS ; /* IP.4 - SERIAL PORT PRIORITY */ +__sbit __at (0xBC) PS0 ; /* IP.4 - SERIAL PORT PRIORITY */ +__sbit __at (0xBD) PT2 ; /* IP.5 - TIMER 2 PRIORITY */ +__sbit __at (0xBE) PSPI0 ; /* IP.6 - SPI0 PRIORITY */ + +/* SMB0CN 0xC0 */ +__sbit __at (0xC0) SI ; /* SMB0CN.0 - SMBUS 0 INTERRUPT PENDING FLAG */ +__sbit __at (0xC1) ACK ; /* SMB0CN.1 - SMBUS 0 ACKNOWLEDGE FLAG */ +__sbit __at (0xC2) ARBLOST ; /* SMB0CN.2 - SMBUS 0 ARBITRATION LOST INDICATOR */ +__sbit __at (0xC3) ACKRQ ; /* SMB0CN.3 - SMBUS 0 ACKNOWLEDGE REQUEST */ +__sbit __at (0xC4) STO ; /* SMB0CN.4 - SMBUS 0 STOP FLAG */ +__sbit __at (0xC5) STA ; /* SMB0CN.5 - SMBUS 0 START FLAG */ +__sbit __at (0xC6) TXMODE ; /* SMB0CN.6 - SMBUS 0 TRANSMIT MODE INDICATOR */ +__sbit __at (0xC7) MASTER ; /* SMB0CN.7 - SMBUS 0 MASTER/SLAVE INDICATOR */ + +/* TMR2CN 0xC8 */ +__sbit __at (0xC8) T2XCLK ; /* TMR2CN.0 - TIMER 2 EXTERNAL CLOCK SELECT */ +__sbit __at (0xC9) T2CSS ; /* TMR2CN.1 - TIMER 2 CAPTURE SOURCE SELECT */ +__sbit __at (0xCA) TR2 ; /* TMR2CN.2 - TIMER 2 ON/OFF CONTROL */ +__sbit __at (0xCB) T2SPLIT ; /* TMR2CN.3 - TIMER 2 SPLIT MODE ENABLE */ +__sbit __at (0xCC) T2CE ; /* TMR2CN.4 - TIMER 2 CAPTURE ENABLE */ +__sbit __at (0xCD) TF2LEN ; /* TMR2CN.5 - TIMER 2 LOW BYTE INTERRUPT ENABLE */ +__sbit __at (0xCE) TF2L ; /* TMR2CN.6 - TIMER 2 LOW BYTE OVERFLOW FLAG */ +__sbit __at (0xCF) TF2 ; /* TMR2CN.7 - TIMER 2 OVERFLOW FLAG */ +__sbit __at (0xCF) TF2H ; /* TMR2CN.7 - TIMER 2 HIGH BYTE OVERFLOW FLAG */ + +/* PSW 0xD0 */ +__sbit __at (0xD0) PARITY ; /* PSW.0 - ACCUMULATOR PARITY FLAG */ +__sbit __at (0xD1) F1 ; /* PSW.1 - FLAG 1 */ +__sbit __at (0xD2) OV ; /* PSW.2 - OVERFLOW FLAG */ +__sbit __at (0xD3) RS0 ; /* PSW.3 - REGISTER BANK SELECT 0 */ +__sbit __at (0xD4) RS1 ; /* PSW.4 - REGISTER BANK SELECT 1 */ +__sbit __at (0xD5) F0 ; /* PSW.5 - FLAG 0 */ +__sbit __at (0xD6) AC ; /* PSW.6 - AUXILIARY CARRY FLAG */ +__sbit __at (0xD7) CY ; /* PSW.7 - CARRY FLAG */ + +/* PCA0CN 0xD8 */ +__sbit __at (0xD8) CCF0 ; /* PCA0CN.0 - PCA MODULE 0 CAPTURE/COMPARE FLAG */ +__sbit __at (0xD9) CCF1 ; /* PCA0CN.1 - PCA MODULE 1 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDA) CCF2 ; /* PCA0CN.2 - PCA MODULE 2 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDB) CCF3 ; /* PCA0CN.3 - PCA MODULE 3 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDC) CCF4 ; /* PCA0CN.4 - PCA MODULE 4 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDE) CR ; /* PCA0CN.6 - PCA COUNTER/TIMER RUN CONTROL */ +__sbit __at (0xDF) CF ; /* PCA0CN.7 - PCA COUNTER/TIMER OVERFLOW FLAG */ + +/* ADC0CN 0xE8 */ +__sbit __at (0xE8) AD0CM0 ; /* ADC0CN.0 - ADC 0 START OF CONV. MODE BIT 0 */ +__sbit __at (0xE9) AD0CM1 ; /* ADC0CN.1 - ADC 0 START OF CONV. MODE BIT 1 */ +__sbit __at (0xEA) AD0CM2 ; /* ADC0CN.2 - ADC 0 START OF CONV. MODE BIT 2 */ +__sbit __at (0xEB) AD0WINT ; /* ADC0CN.3 - ADC 0 WINDOW COMPARE INT. FLAG */ +__sbit __at (0xEC) AD0BUSY ; /* ADC0CN.4 - ADC 0 BUSY FLAG */ +__sbit __at (0xED) AD0INT ; /* ADC0CN.5 - ADC 0 CONV. COMPLETE INT. FLAG */ +__sbit __at (0xEE) AD0TM ; /* ADC0CN.6 - ADC 0 TRACK MODE */ +__sbit __at (0xEF) AD0EN ; /* ADC0CN.7 - ADC 0 ENABLE */ + +/* SPI0CN 0xF8 */ +__sbit __at (0xF8) SPIEN ; /* SPI0CN.0 - SPI0 ENABLE */ +__sbit __at (0xF9) TXBMT ; /* SPI0CN.1 - TRANSMIT BUFFER EMPTY */ +__sbit __at (0xFA) NSSMD0 ; /* SPI0CN.2 - SLAVE SELECT MODE BIT 0 */ +__sbit __at (0xFB) NSSMD1 ; /* SPI0CN.3 - SLAVE SELECT MODE BIT 1 */ +__sbit __at (0xFC) RXOVRN ; /* SPI0CN.4 - RECEIVE OVERRUN FLAG */ +__sbit __at (0xFD) MODF ; /* SPI0CN.5 - MODE FAULT FLAG */ +__sbit __at (0xFE) WCOL ; /* SPI0CN.6 - WRITE COLLISION FLAG */ +__sbit __at (0xFF) SPIF ; /* SPI0CN.7 - SPI0 INTERRUPT FLAG */ + + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define T1M 0x08 /* CKCON */ +#define PSWE 0x01 /* PSCTL */ +#define PSEE 0x02 /* PSCTL */ +#define ECP0 0x20 /* EIE1 */ +#define ECP1 0x40 /* EIE1 */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define CP0E 0x10 /* XBR0 */ +#define CP0AE 0x20 /* XBR0 */ +#define CP1E 0x40 /* XBR0 */ +#define CP1AE 0x80 /* XBR0 */ + +#endif diff --git a/device/include/mcs51/C8051F350.h b/device/include/mcs51/C8051F350.h new file mode 100644 index 0000000..84d93ce --- /dev/null +++ b/device/include/mcs51/C8051F350.h @@ -0,0 +1,328 @@ +/*------------------------------------------------------------------------- + Register Declarations for the SiLabs C8051F35x Processor Range + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051F350_H +#define C8051F350_H + + +/* BYTE Registers */ + +__sfr __at (0x80) P0 ; /* PORT 0 */ +__sfr __at (0x81) SP ; /* STACK POINTER */ +__sfr __at (0x82) DPL ; /* DATA POINTER - LOW BYTE */ +__sfr __at (0x83) DPH ; /* DATA POINTER - HIGH BYTE */ +__sfr __at (0x87) PCON ; /* POWER CONTROL */ +__sfr __at (0x88) TCON ; /* TIMER CONTROL */ +__sfr __at (0x89) TMOD ; /* TIMER MODE */ +__sfr __at (0x8A) TL0 ; /* TIMER 0 - LOW BYTE */ +__sfr __at (0x8B) TL1 ; /* TIMER 1 - LOW BYTE */ +__sfr __at (0x8C) TH0 ; /* TIMER 0 - HIGH BYTE */ +__sfr __at (0x8D) TH1 ; /* TIMER 1 - HIGH BYTE */ +__sfr __at (0x8E) CKCON ; /* CLOCK CONTROL */ +__sfr __at (0x8F) PSCTL ; /* PROGRAM STORE R/W CONTROL */ +__sfr __at (0x90) P1 ; /* PORT 1 */ +__sfr __at (0x91) TMR3CN ; /* TIMER 3 CONTROL */ +__sfr __at (0x92) TMR3RLL ; /* TIMER 3 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0x93) TMR3RLH ; /* TIMER 3 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0x94) TMR3L ; /* TIMER 3 - LOW BYTE */ +__sfr __at (0x95) TMR3H ; /* TIMER 3 - HIGH BYTE */ +__sfr __at (0x96) IDA0 ; /* CURRENT MODE DAC 0 */ +__sfr __at (0x98) SCON ; /* SERIAL PORT CONTROL */ +__sfr __at (0x98) SCON0 ; /* SERIAL PORT CONTROL */ +__sfr __at (0x99) SBUF ; /* SERIAL PORT BUFFER */ +__sfr __at (0x99) SBUF0 ; /* SERIAL PORT BUFFER */ +__sfr __at (0x9A) ADC0DECL ; /* ADC DECIMATION LOW */ +__sfr __at (0x9B) ADC0DECH ; /* ADC DECIMATION HIGH */ +__sfr __at (0x9C) CPT0CN ; /* COMPARATOR 0 CONTROL */ +__sfr __at (0x9D) CPT0MD ; /* COMPARATOR 0 MODE SELECTION */ +__sfr __at (0x9F) CPT0MX ; /* COMPARATOR 0 MUX SELECTION */ +__sfr __at (0xA0) P2 ; /* PORT 2 */ +__sfr __at (0xA1) SPI0CFG ; /* SPI0 CONFIGURATION */ +__sfr __at (0xA2) SPI0CKR ; /* SPI0 CLOCK RATE CONTROL */ +__sfr __at (0xA3) SPI0DAT ; /* SPI0 DATA */ +__sfr __at (0xA4) P0MDOUT ; /* PORT 0 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA5) P1MDOUT ; /* PORT 1 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA6) P2MDOUT ; /* PORT 2 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA8) IE ; /* INTERRUPT ENABLE */ +__sfr __at (0xA9) CLKSEL ; /* SYSTEM CLOCK SELECT */ +__sfr __at (0xAA) EMI0CN ; /* EXTERNAL MEMORY INTERFACE CONTROL */ +__sfr __at (0xAA) _XPAGE ; /* XDATA/PDATA PAGE */ +__sfr __at (0xAB) ADC0CGL ; /* ADC 0 GAIN CALIBRATION LOW */ +__sfr __at (0xAC) ADC0CGM ; /* ADC 0 GAIN CALIBRATION MIDDLE */ +__sfr __at (0xAD) ADC0CGH ; /* ADC 0 GAIN CALIBRATION HIGH */ +__sfr __at (0xB1) OSCXCN ; /* EXTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB2) OSCICN ; /* INTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB3) OSCICL ; /* INTERNAL OSCILLATOR CALIBRATION */ +__sfr __at (0xB6) FLSCL ; /* FLASH MEMORY TIMING PRESCALER */ +__sfr __at (0xB7) FLKEY ; /* FLASH ACESS LIMIT */ +__sfr __at (0xB8) IP ; /* INTERRUPT PRIORITY */ +__sfr __at (0xB9) IDA0CN ; /* CURRENT MODE DAC 0 - CONTROL */ +__sfr __at (0xBA) ADC0COL ; /* ADC 0 OFFSET CALIBRATION LOW */ +__sfr __at (0xBB) ADC0COM ; /* ADC 0 OFFSET CALIBRATION MIDDLE */ +__sfr __at (0xBC) ADC0COH ; /* ADC 0 OFFSET CALIBRATION HIGH */ +__sfr __at (0xBD) ADC0BUF ; /* ADC 0 BUFFER CONTROL */ +__sfr __at (0xBE) CLKMUL ; /* CLOCK MULTIPLIER */ +__sfr __at (0xBF) ADC0DAC ; /* ADC 0 OFFSET DAC */ +__sfr __at (0xC0) SMB0CN ; /* SMBUS CONTROL */ +__sfr __at (0xC1) SMB0CF ; /* SMBUS CONFIGURATION */ +__sfr __at (0xC2) SMB0DAT ; /* SMBUS DATA */ +__sfr __at (0xC3) ADC0L ; /* ADC 0 OUTPUT LOW BYTE */ +__sfr __at (0xC4) ADC0M ; /* ADC 0 OUTPUT MIDDLE BYTE */ +__sfr __at (0xC5) ADC0H ; /* ADC 0 OUTPUT HIGH BYTE */ +__sfr __at (0xC6) ADC0MUX ; /* ADC 0 MULTIPLEXER */ +__sfr __at (0xC8) T2CON ; /* TIMER 2 CONTROL */ +__sfr __at (0xC8) TMR2CN ; /* TIMER 2 CONTROL */ +__sfr __at (0xCA) RCAP2L ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCA) TMR2RLL ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCB) RCAP2H ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCB) TMR2RLH ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCC) TL2 ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCC) TMR2L ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCD) TH2 ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xCD) TMR2H ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xD0) PSW ; /* PROGRAM STATUS WORD */ +__sfr __at (0xD1) REF0CN ; /* VOLTAGE REFERENCE 0 CONTROL */ +__sfr __at (0xD4) P0SKIP ; /* PORT 0 SKIP */ +__sfr __at (0xD5) P1SKIP ; /* PORT 1 SKIP */ +__sfr __at (0xD7) IDA1CN ; /* CURRENT MODE DAC 1 - CONTROL */ +__sfr __at (0xD8) PCA0CN ; /* PCA CONTROL */ +__sfr __at (0xD9) PCA0MD ; /* PCA MODE */ +__sfr __at (0xDA) PCA0CPM0 ; /* PCA MODULE 0 MODE REGISTER */ +__sfr __at (0xDB) PCA0CPM1 ; /* PCA MODULE 1 MODE REGISTER */ +__sfr __at (0xDC) PCA0CPM2 ; /* PCA MODULE 2 MODE REGISTER */ +__sfr __at (0xDD) IDA1 ; /* CURRENT MODE DAC 1 */ +__sfr __at (0xE0) ACC ; /* ACCUMULATOR */ +__sfr __at (0xE1) XBR0 ; /* PORT MUX CONFIGURATION REGISTER 0 */ +__sfr __at (0xE2) XBR1 ; /* PORT MUX CONFIGURATION REGISTER 1 */ +__sfr __at (0xE3) PFE0CN ; /* PREFETCH ENGINE CONTROL */ +__sfr __at (0xE4) IT01CF ; /* INT0/INT1 CONFIGURATION REGISTER */ +__sfr __at (0xE4) INT01CF ; /* INT0/INT1 CONFIGURATION REGISTER */ +__sfr __at (0xE6) EIE1 ; /* EXTERNAL INTERRUPT ENABLE 1 */ +__sfr __at (0xE8) ADC0STA ; /* ADC 0 STATUS */ +__sfr __at (0xE9) PCA0CPL0 ; /* PCA CAPTURE 0 LOW */ +__sfr __at (0xEA) PCA0CPH0 ; /* PCA CAPTURE 0 HIGH */ +__sfr __at (0xEB) PCA0CPL1 ; /* PCA CAPTURE 1 LOW */ +__sfr __at (0xEC) PCA0CPH1 ; /* PCA CAPTURE 1 HIGH */ +__sfr __at (0xED) PCA0CPL2 ; /* PCA CAPTURE 2 LOW */ +__sfr __at (0xEE) PCA0CPH2 ; /* PCA CAPTURE 2 HIGH */ +__sfr __at (0xEF) RSTSRC ; /* RESET SOURCE */ +__sfr __at (0xF0) B ; /* B REGISTER */ +__sfr __at (0xF1) P0MODE ; /* PORT 0 INPUT MODE CONFIGURATION */ +__sfr __at (0xF1) P0MDIN ; /* PORT 0 INPUT MODE CONFIGURATION */ +__sfr __at (0xF2) P1MODE ; /* PORT 1 INPUT MODE CONFIGURATION */ +__sfr __at (0xF2) P1MDIN ; /* PORT 1 INPUT MODE CONFIGURATION */ +__sfr __at (0xF3) ADC0MD ; /* ADC 0 MODE */ +__sfr __at (0xF4) ADC0CN ; /* ADC 0 CONTROL */ +__sfr __at (0xF6) EIP1 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +__sfr __at (0xF7) ADC0CLK ; /* ADC 0 CLOCK */ +__sfr __at (0xF8) SPI0CN ; /* SPI0 CONTROL */ +__sfr __at (0xF9) PCA0L ; /* PCA COUNTER LOW */ +__sfr __at (0xFA) PCA0H ; /* PCA COUNTER HIGH */ +__sfr __at (0xFB) ADC0CF ; /* ADC 0 CONFIGURATION */ +__sfr __at (0xFC) ADC0FL ; /* ADC 0 FAST FILTER OUTPUT LOW */ +__sfr __at (0xFD) ADC0FM ; /* ADC 0 FAST FILTER OUTPUT MIDDLE */ +__sfr __at (0xFE) ADC0FH ; /* ADC 0 FAST FILTER OUTPUT HIGH */ +__sfr __at (0xFF) VDM0CN ; /* VDD MONITOR CONTROL */ + + +/* WORD/DWORD Registers */ + +__sfr16 __at (0x8C8A) TMR0 ; /* TIMER 0 COUNTER */ +__sfr16 __at (0x8D8B) TMR1 ; /* TIMER 1 COUNTER */ +__sfr16 __at (0xCDCC) TMR2 ; /* TIMER 2 COUNTER */ +__sfr16 __at (0xCBCA) RCAP2 ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0xCBCA) TMR2RL ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0x9594) TMR3 ; /* TIMER 3 COUNTER */ +__sfr16 __at (0x9392) TMR3RL ; /* TIMER 3 CAPTURE REGISTER WORD */ + +__sfr16 __at (0x9B9A) ADC0DEC ; /* ADC 0 DECIMATION RATIO REGISTER WORD */ +/* Unfortunately the C8051F350 does not have an sfr that always reads 0x00 and */ +/* ignores what is written to it. That could have enabled sfr32 definitions for */ +/* the 24 bit ADC0 sfr combinations. */ +__sfr16 __at (0xC5C4) ADC0 ; /* 16 bit ADC 0 SINC3 FILTER OUTPUT WORD */ +__sfr16 __at (0xFEFD) ADC0F ; /* 16 bit ADC 0 FAST FILTER OUTPUT WORD */ + +__sfr16 __at (0xFAF9) PCA0 ; /* PCA COUNTER */ +__sfr16 __at (0xEAE9) PCA0CP0 ; /* PCA CAPTURE 0 WORD */ +__sfr16 __at (0xECEB) PCA0CP1 ; /* PCA CAPTURE 1 WORD */ +__sfr16 __at (0xEEED) PCA0CP2 ; /* PCA CAPTURE 2 WORD */ + + +/* BIT Registers */ + +/* P0 0x80 */ +__sbit __at (0x80) P0_0 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x87) P0_7 ; + +/* TCON 0x88 */ +__sbit __at (0x88) IT0 ; /* TCON.0 - EXT. INTERRUPT 0 TYPE */ +__sbit __at (0x89) IE0 ; /* TCON.1 - EXT. INTERRUPT 0 EDGE FLAG */ +__sbit __at (0x8A) IT1 ; /* TCON.2 - EXT. INTERRUPT 1 TYPE */ +__sbit __at (0x8B) IE1 ; /* TCON.3 - EXT. INTERRUPT 1 EDGE FLAG */ +__sbit __at (0x8C) TR0 ; /* TCON.4 - TIMER 0 ON/OFF CONTROL */ +__sbit __at (0x8D) TF0 ; /* TCON.5 - TIMER 0 OVERFLOW FLAG */ +__sbit __at (0x8E) TR1 ; /* TCON.6 - TIMER 1 ON/OFF CONTROL */ +__sbit __at (0x8F) TF1 ; /* TCON.7 - TIMER 1 OVERFLOW FLAG */ + +/* P1 0x90 */ +__sbit __at (0x90) P1_0 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x92) P1_2 ; +__sbit __at (0x93) P1_3 ; +__sbit __at (0x94) P1_4 ; +__sbit __at (0x95) P1_5 ; +__sbit __at (0x96) P1_6 ; +__sbit __at (0x97) P1_7 ; + +/* SCON 0x98 */ +__sbit __at (0x98) RI ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x98) RI0 ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x99) TI ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x99) TI0 ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x9A) RB8 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9A) RB80 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9B) TB8 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9B) TB80 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9C) REN ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9C) REN0 ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9D) SM2 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9D) MCE0 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9F) SM0 ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ +__sbit __at (0x9F) S0MODE ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ + +/* P2 0xA0 */ +__sbit __at (0xA0) P2_0 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA4) P2_4 ; +__sbit __at (0xA5) P2_5 ; +__sbit __at (0xA6) P2_6 ; +__sbit __at (0xA7) P2_7 ; + +/* IE 0xA8 */ +__sbit __at (0xA8) EX0 ; /* IE.0 - EXTERNAL INTERRUPT 0 ENABLE */ +__sbit __at (0xA9) ET0 ; /* IE.1 - TIMER 0 INTERRUPT ENABLE */ +__sbit __at (0xAA) EX1 ; /* IE.2 - EXTERNAL INTERRUPT 1 ENABLE */ +__sbit __at (0xAB) ET1 ; /* IE.3 - TIMER 1 INTERRUPT ENABLE */ +__sbit __at (0xAC) ES ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAC) ES0 ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAD) ET2 ; /* IE.5 - TIMER 2 INTERRUPT ENABLE */ +__sbit __at (0xAE) ESPI0 ; /* IE.6 - SPI0 INTERRUPT ENABLE */ +__sbit __at (0xAF) EA ; /* IE.7 - GLOBAL INTERRUPT ENABLE */ + +/* IP 0xB8 */ +__sbit __at (0xB8) PX0 ; /* IP.0 - EXTERNAL INTERRUPT 0 PRIORITY */ +__sbit __at (0xB9) PT0 ; /* IP.1 - TIMER 0 PRIORITY */ +__sbit __at (0xBA) PX1 ; /* IP.2 - EXTERNAL INTERRUPT 1 PRIORITY */ +__sbit __at (0xBB) PT1 ; /* IP.3 - TIMER 1 PRIORITY */ +__sbit __at (0xBC) PS ; /* IP.4 - SERIAL PORT PRIORITY */ +__sbit __at (0xBC) PS0 ; /* IP.4 - SERIAL PORT PRIORITY */ +__sbit __at (0xBD) PT2 ; /* IP.5 - TIMER 2 PRIORITY */ +__sbit __at (0xBE) PSPI0 ; /* IP.6 - SPI0 PRIORITY */ + +/* SMB0CN 0xC0 */ +__sbit __at (0xC0) SI ; /* SMB0CN.0 - SMBUS 0 INTERRUPT PENDING FLAG */ +__sbit __at (0xC1) ACK ; /* SMB0CN.1 - SMBUS 0 ACKNOWLEDGE FLAG */ +__sbit __at (0xC2) ARBLOST ; /* SMB0CN.2 - SMBUS 0 ARBITRATION LOST INDICATOR */ +__sbit __at (0xC3) ACKRQ ; /* SMB0CN.3 - SMBUS 0 ACKNOWLEDGE REQUEST */ +__sbit __at (0xC4) STO ; /* SMB0CN.4 - SMBUS 0 STOP FLAG */ +__sbit __at (0xC5) STA ; /* SMB0CN.5 - SMBUS 0 START FLAG */ +__sbit __at (0xC6) TXMODE ; /* SMB0CN.6 - SMBUS 0 TRANSMIT MODE INDICATOR */ +__sbit __at (0xC7) MASTER ; /* SMB0CN.7 - SMBUS 0 MASTER/SLAVE INDICATOR */ + +/* TMR2CN 0xC8 */ +__sbit __at (0xC8) T2XCLK ; /* TMR2CN.0 - TIMER 2 EXTERNAL CLOCK SELECT */ +__sbit __at (0xCA) TR2 ; /* TMR2CN.2 - TIMER 2 ON/OFF CONTROL */ +__sbit __at (0xCB) T2SPLIT ; /* TMR2CN.3 - TIMER 2 SPLIT MODE ENABLE */ +__sbit __at (0xCD) TF2CEN ; /* TMR2CN.5 - TIMER 2 LOW-FREQ OSC CAPTURE ENABLE*/ +__sbit __at (0xCD) TF2LEN ; /* TMR2CN.5 - TIMER 2 LOW BYTE INTERRUPT ENABLE */ +__sbit __at (0xCE) TF2L ; /* TMR2CN.6 - TIMER 2 LOW BYTE OVERFLOW FLAG */ +__sbit __at (0xCF) TF2 ; /* TMR2CN.7 - TIMER 2 OVERFLOW FLAG */ +__sbit __at (0xCF) TF2H ; /* TMR2CN.7 - TIMER 2 HIGH BYTE OVERFLOW FLAG */ + +/* PSW 0xD0 */ +__sbit __at (0xD0) PARITY ; /* PSW.0 - ACCUMULATOR PARITY FLAG */ +__sbit __at (0xD1) F1 ; /* PSW.1 - FLAG 1 */ +__sbit __at (0xD2) OV ; /* PSW.2 - OVERFLOW FLAG */ +__sbit __at (0xD3) RS0 ; /* PSW.3 - REGISTER BANK SELECT 0 */ +__sbit __at (0xD4) RS1 ; /* PSW.4 - REGISTER BANK SELECT 1 */ +__sbit __at (0xD5) F0 ; /* PSW.5 - FLAG 0 */ +__sbit __at (0xD6) AC ; /* PSW.6 - AUXILIARY CARRY FLAG */ +__sbit __at (0xD7) CY ; /* PSW.7 - CARRY FLAG */ + +/* PCA0CN 0xD8 */ +__sbit __at (0xD8) CCF0 ; /* PCA0CN.0 - PCA MODULE 0 CAPTURE/COMPARE FLAG */ +__sbit __at (0xD9) CCF1 ; /* PCA0CN.1 - PCA MODULE 1 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDA) CCF2 ; /* PCA0CN.2 - PCA MODULE 2 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDE) CR ; /* PCA0CN.6 - PCA COUNTER/TIMER RUN CONTROL */ +__sbit __at (0xDF) CF ; /* PCA0CN.7 - PCA COUNTER/TIMER OVERFLOW FLAG */ + +/* ADC0STA 0xE8 */ +__sbit __at (0xE8) AD0OVR ; /* ADC0CN.0 - ADC 0 OVERRUN FLAG */ +__sbit __at (0xE9) AD0ERR ; /* ADC0CN.1 - ADC 0 ERROR FLAG */ +__sbit __at (0xEA) AD0CALC ; /* ADC0CN.2 - ADC 0 CALIBRATION COMPLETE FLAG */ +__sbit __at (0xEB) AD0FFC ; /* ADC0CN.3 - ADC 0 FAST FILTER CLIP FLAG */ +__sbit __at (0xEC) AD0S3C ; /* ADC0CN.4 - ADC 0 SINC3 FILTER CLIP FLAG */ +__sbit __at (0xED) AD0INT ; /* ADC0CN.5 - ADC 0 CONV. COMPLETE INT. FLAG */ +__sbit __at (0xEE) AD0CBSY ; /* ADC0CN.6 - ADC 0 CALIBRATION IN PROGRESS FLAG */ +__sbit __at (0xEF) AD0BUSY ; /* ADC0CN.7 - ADC 0 CONVERSION IN PROGRESS FLAG */ + +/* SPI0CN 0xF8 */ +__sbit __at (0xF8) SPIEN ; /* SPI0CN.0 - SPI0 ENABLE */ +__sbit __at (0xF9) TXBMT ; /* SPI0CN.1 - TRANSMIT BUFFER EMPTY */ +__sbit __at (0xFA) NSSMD0 ; /* SPI0CN.2 - SLAVE SELECT MODE BIT 0 */ +__sbit __at (0xFB) NSSMD1 ; /* SPI0CN.3 - SLAVE SELECT MODE BIT 1 */ +__sbit __at (0xFC) RXOVRN ; /* SPI0CN.4 - RECEIVE OVERRUN FLAG */ +__sbit __at (0xFD) MODF ; /* SPI0CN.5 - MODE FAULT FLAG */ +__sbit __at (0xFE) WCOL ; /* SPI0CN.6 - WRITE COLLISION FLAG */ +__sbit __at (0xFF) SPIF ; /* SPI0CN.7 - SPI0 INTERRUPT FLAG */ + + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define T1M 0x08 /* CKCON */ +#define PSWE 0x01 /* PSCTL */ +#define PSEE 0x02 /* PSCTL */ +#define ECP0 0x20 /* EIE1 */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define CP0E 0x10 /* XBR0 */ +#define CP0OEN 0x10 /* XBR0 */ +#define CP0AE 0x20 /* XBR0 */ +#define CP0AOEN 0x20 /* XBR0 */ + +#endif diff --git a/device/include/mcs51/C8051F360.h b/device/include/mcs51/C8051F360.h new file mode 100644 index 0000000..04efab4 --- /dev/null +++ b/device/include/mcs51/C8051F360.h @@ -0,0 +1,353 @@ +/*------------------------------------------------------------------------- + Register Declarations for the SiLabs C8051F36x Processor Range + + Copyright (C) 2007 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051F360_H +#define C8051F360_H + +#include + +/* All Pages */ + +SFR(P0, 0x80); // Port 0 + SBIT(P0_0, 0x80, 0); // Port 0 bit 0 + SBIT(P0_1, 0x80, 1); // Port 0 bit 1 + SBIT(P0_2, 0x80, 2); // Port 0 bit 2 + SBIT(P0_3, 0x80, 3); // Port 0 bit 3 + SBIT(P0_4, 0x80, 4); // Port 0 bit 4 + SBIT(P0_5, 0x80, 5); // Port 0 bit 5 + SBIT(P0_6, 0x80, 6); // Port 0 bit 6 + SBIT(P0_7, 0x80, 7); // Port 0 bit 7 +SFR(SP, 0x81); // Stack Pointer +SFR(DPL, 0x82); // Data Pointer Low Byte +SFR(DPH, 0x83); // Data Pointer High Byte +SFR(SFRNEXT, 0x85); // SFR Stack Next Page +SFR(SFRLAST, 0x86); // SFR Stack Last Page +SFR(PCON, 0x87); // Power Mode Control +SFR(TCON, 0x88); // Timer Control + SBIT(IT0, 0x88, 0); // Ext. Interrupt 0 Type Select + SBIT(IE0, 0x88, 1); // Ext. Interrupt 0 Flag + SBIT(IT1, 0x88, 2); // Ext. Interrupt 1 Type Select + SBIT(IE1, 0x88, 3); // Ext. Interrupt 1 Flag + SBIT(TR0, 0x88, 4); // Timer 0 Run Control + SBIT(TF0, 0x88, 5); // Timer 0 Overflow Flag + SBIT(TR1, 0x88, 6); // Timer 1 Run Control + SBIT(TF1, 0x88, 7); // Timer 1 Overflow Flag +SFR(TMOD, 0x89); // Timer Mode +SFR16E(TMR0, 0x8C8A); // Timer/Counter 0 Word + SFR(TL0, 0x8A); // Timer/Counter 0 Low Byte + SFR(TH0, 0x8C); // Timer/Counter 0 High Byte +SFR16E(TMR1, 0x8D8B); // Timer/Counter 1 Word + SFR(TL1, 0x8B); // Timer/Counter 1 Low Byte + SFR(TH1, 0x8D); // Timer/Counter 1 High Byte +SFR(CKCON, 0x8E); // Clock Control +SFR(P1, 0x90); // Port 1 + SBIT(P1_0, 0x90, 0); // Port 1 bit 0 + SBIT(P1_1, 0x90, 1); // Port 1 bit 1 + SBIT(P1_2, 0x90, 2); // Port 1 bit 2 + SBIT(P1_3, 0x90, 3); // Port 1 bit 3 + SBIT(P1_4, 0x90, 4); // Port 1 bit 4 + SBIT(P1_5, 0x90, 5); // Port 1 bit 5 + SBIT(P1_6, 0x90, 6); // Port 1 bit 6 + SBIT(P1_7, 0x90, 7); // Port 1 bit 7 +SFR(TMR3CN, 0x91); // Timer 3 Control +SFR16(TMR3RL, 0x92); // Timer 3 Reload Register Word + SFR(TMR3RLL, 0x92); // Timer 3 Reload Register Low Byte + SFR(TMR3RLH, 0x93); // Timer 3 Reload Register High Byte +SFR16(TMR3, 0x94); // Timer 3 Word + SFR(TMR3L, 0x94); // Timer 3 Low Byte + SFR(TMR3H, 0x95); // Timer 3 High Byte +SFR16(IDA0, 0x96); // IDAC 0 Word + SFR(IDA0L, 0x96); // IDAC 0 Low Byte + SFR(IDA0H, 0x97); // IDAC 0 High Byte +SFR(SCON0, 0x98); // Serial Port 0 Control + SBIT(RI0, 0x98, 0); // Receive Interrupt Flag + SBIT(TI0, 0x98, 1); // Transmit Interrupt Flag + SBIT(RB80, 0x98, 2); // Ninth Receive Bit + SBIT(TB80, 0x98, 3); // Ninth Transmission Bit + SBIT(REN0, 0x98, 4); // Receive Enable + SBIT(MCE0, 0x98, 5); // Multiprocessor Communication Enable + SBIT(S0MODE, 0x98, 7); // Serial Port 0 Operation Mode +SFR(SBUF0, 0x99); // Serial Port 0 Data Buffer +SFR(CPT1CN, 0x9A); // Comparator 1 Control +SFR(CPT0CN, 0x9B); // Comparator 0 Control +SFR(CPT1MD, 0x9C); // Comparator 1 Mode Selection +SFR(CPT0MD, 0x9D); // Comparator 0 Mode Selection +SFR(CPT1MX, 0x9E); // Comparator 1 MUX Selection +SFR(CPT0MX, 0x9F); // Comparator 0 MUX Selection +SFR(P2, 0xA0); // Port 2 + SBIT(P2_0, 0xA0, 0); // Port 2 bit 0 + SBIT(P2_1, 0xA0, 1); // Port 2 bit 1 + SBIT(P2_2, 0xA0, 2); // Port 2 bit 2 + SBIT(P2_3, 0xA0, 3); // Port 2 bit 3 + SBIT(P2_4, 0xA0, 4); // Port 2 bit 4 + SBIT(P2_5, 0xA0, 5); // Port 2 bit 5 + SBIT(P2_6, 0xA0, 6); // Port 2 bit 6 + SBIT(P2_7, 0xA0, 7); // Port 2 bit 7 +SFR(SPI0CFG, 0xA1); // SPI Configuration +SFR(SPI0CKR, 0xA2); // SPI Clock Rate Control +SFR(SPI0DAT, 0xA3); // SPI Data +SFR(SFRPAGE, 0xA7); // SFR Page Select +SFR(IE, 0xA8); // Interrupt Enable + SBIT(EX0, 0xA8, 0); // Enable External Interrupt 0 + SBIT(ET0, 0xA8, 1); // Enable Timer 0 Interrupt + SBIT(EX1, 0xA8, 2); // Enable External Interrupt 1 + SBIT(ET1, 0xA8, 3); // Enable Timer 1 Interrupt + SBIT(ES0, 0xA8, 4); // Enable Serial Port Interrupt + SBIT(ET2, 0xA8, 5); // Enable Timer 2 Interrupt + SBIT(ESPI0, 0xA8, 6); // Enable SPI0 Interrupt + SBIT(EA, 0xA8, 7); // Global Interrupt Enable +SFR(EMI0CN, 0xAA); // EMIF Control +SFR(_XPAGE, 0xAA); // SDCC: XDATA/PDATA Page +SFR(P3, 0xB0); // Port 3 + SBIT(P3_0, 0xB0, 0); // Port 3 bit 0 + SBIT(P3_1, 0xB0, 1); // Port 3 bit 1 + SBIT(P3_2, 0xB0, 2); // Port 3 bit 2 + SBIT(P3_3, 0xB0, 3); // Port 3 bit 3 + SBIT(P3_4, 0xB0, 4); // Port 3 bit 4 + SBIT(P3_5, 0xB0, 5); // Port 3 bit 5 + SBIT(P3_6, 0xB0, 6); // Port 3 bit 6 + SBIT(P3_7, 0xB0, 7); // Port 3 bit 7 +SFR(P4, 0xB5); // Port 4 +SFR(IP, 0xB8); // Interrupt Priority + SBIT(PX0, 0xB8, 0); // External Interrupt 0 Priority + SBIT(PT0, 0xB8, 1); // Timer 0 Interrupt Priority + SBIT(PX1, 0xB8, 2); // External Interrupt 1 Priority + SBIT(PT1, 0xB8, 3); // Timer 1 Interrupt Priority + SBIT(PS0, 0xB8, 4); // Serial Port Interrupt Priority + SBIT(PT2, 0xB8, 5); // Timer 2 Interrupt Priority + SBIT(PSPI0, 0xB8, 6); // SPI0 Interrupt Priority +SFR(IDA0CN, 0xB9); // IDAC 0 Control +SFR(AMX0N, 0xBA); // AMUX 0 Negative Channel Select +SFR(AMX0P, 0xBB); // AMUX 0 Positive Channel Select +SFR(ADC0CF, 0xBC); // ADC0 Configuration +SFR16(ADC0, 0xBD); // ADC0 Word + SFR(ADC0L, 0xBD); // ADC0 Low Byte + SFR(ADC0H, 0xBE); // ADC0 High Byte +SFR(SMB0CN, 0xC0); // SMBus Control + SBIT(SI, 0xC0, 0); // SMBus Interrupt Flag + SBIT(ACK, 0xC0, 1); // SMBus Acknowledge Flag + SBIT(ARBLOST, 0xC0, 2); // SMBus Arbitration Lost Indicator + SBIT(ACKRQ, 0xC0, 3); // SMBus Acknowledge Request + SBIT(STO, 0xC0, 4); // SMBus Stop Flag + SBIT(STA, 0xC0, 5); // SMBus Start Flag + SBIT(TXMODE, 0xC0, 6); // SMBus Transmit Mode Indicator + SBIT(MASTER, 0xC0, 7); // SMBus Master/Slave Indicator +SFR(SMB0CF, 0xC1); // SMBus Configuration +SFR(SMB0DAT, 0xC2); // SMBus Data +SFR16(ADC0GT, 0xC3); // ADC0 Greater-Than Data Word + SFR(ADC0GTL, 0xC3); // ADC0 Greater-Than Data Low Byte + SFR(ADC0GTH, 0xC4); // ADC0 Greater-Than Data High Byte +SFR16(ADC0LT, 0xC5); // ADC0 Less-Than Data Word + SFR(ADC0LTL, 0xC5); // ADC0 Less-Than Data Low Byte + SFR(ADC0LTH, 0xC6); // ADC0 Less-Than Data High Byte +SFR(TMR2CN, 0xC8); // Timer/Counter 2 Control + SBIT(T2XCLK, 0xC8, 0); // Timer 2 External Clock Select + SBIT(TR2, 0xC8, 2); // Timer 2 Run Control + SBIT(T2SPLIT, 0xC8, 3); // Timer 2 Split Mode Enable + SBIT(TF2CEN, 0xC8, 4); // Timer 2 Low-Frequency Oscillator Capture Enable + SBIT(TF2LEN, 0xC8, 5); // Timer 2 Low Byte Interrupt Enable + SBIT(TF2L, 0xC8, 6); // Timer 2 Low Byte Overflow Flag + SBIT(TF2H, 0xC8, 7); // Timer 2 High Byte Overflow Flag +SFR16(TMR2RL, 0xCA); // Timer/Counter 2 Reload Word + SFR(TMR2RLL, 0xCA); // Timer/Counter 2 Reload Low Byte + SFR(TMR2RLH, 0xCB); // Timer/Counter 2 Reload High Byte +SFR16(TMR2, 0xCC); // Timer/Counter 2 Word + SFR(TMR2L, 0xCC); // Timer/Counter 2 Low Byte + SFR(TMR2H, 0xCD); // Timer/Counter 2 High Byte +SFR(PSW, 0xD0); // Program Status Word + SBIT(P, 0xD0, 0); // Parity Flag + SBIT(F1, 0xD0, 1); // User-Defined Flag + SBIT(OV, 0xD0, 2); // Overflow Flag + SBIT(RS0, 0xD0, 3); // Register Bank Select 0 + SBIT(RS1, 0xD0, 4); // Register Bank Select 1 + SBIT(F0, 0xD0, 5); // User-Defined Flag + SBIT(AC, 0xD0, 6); // Auxiliary Carry Flag + SBIT(CY, 0xD0, 7); // Carry Flag +SFR(REF0CN, 0xD1); // Voltage Reference Control +SFR(PCA0CN, 0xD8); // PCA Control + SBIT(CCF0, 0xD8, 0); // PCA Module 0 Capture/Compare Flag + SBIT(CCF1, 0xD8, 1); // PCA Module 1 Capture/Compare Flag + SBIT(CCF2, 0xD8, 2); // PCA Module 2 Capture/Compare Flag + SBIT(CCF3, 0xD8, 3); // PCA Module 3 Capture/Compare Flag + SBIT(CCF4, 0xD8, 4); // PCA Module 4 Capture/Compare Flag + SBIT(CCF5, 0xD8, 5); // PCA Module 5 Capture/Compare Flag + SBIT(CR, 0xD8, 6); // PCA Counter/Timer Run Control + SBIT(CF, 0xD8, 7); // PCA Counter/Timer Overflow Flag +SFR(PCA0MD, 0xD9); // PCA Mode +SFR(PCA0CPM0, 0xDA); // PCA Module 0 Mode +SFR(PCA0CPM1, 0xDB); // PCA Module 1 Mode +SFR(PCA0CPM2, 0xDC); // PCA Module 2 Mode +SFR(PCA0CPM3, 0xDD); // PCA Module 3 Mode +SFR(PCA0CPM4, 0xDE); // PCA Module 4 Mode +SFR(PCA0CPM5, 0xDF); // PCA Module 5 Mode +SFR(ACC, 0xE0); // Accumulator +SFR(IT01CF, 0xE4); // INT0/INT1 Configuration +SFR(EIE1, 0xE6); // Extended Interrupt Enable 1 +SFR(EIE2, 0xE7); // Extended Interrupt Enable 2 +SFR(ADC0CN, 0xE8); // ADC0 Control + SBIT(AD0CM0, 0xE8, 0); // ADC0 Conversion Start Mode Select Bit 0 + SBIT(AD0CM1, 0xE8, 1); // ADC0 Conversion Start Mode Select Bit 1 + SBIT(AD0CM2, 0xE8, 2); // ADC0 Conversion Start Mode Select Bit 2 + SBIT(AD0WINT, 0xE8, 3); // ADC0 Window Compare Interrupt Flag + SBIT(AD0BUSY, 0xE8, 4); // ADC0 Busy Bit + SBIT(AD0INT, 0xE8, 5); // ADC0 Conversion Complete Interrupt Flag + SBIT(AD0TM, 0xE8, 6); // ADC0 Track Mode Bit + SBIT(AD0EN, 0xE8, 7); // ADC0 Enable Bit +SFR16(PCA0CP1, 0xE9); // PCA Capture 1 Word + SFR(PCA0CPL1, 0xE9); // PCA Capture 1 Low Byte + SFR(PCA0CPH1, 0xEA); // PCA Capture 1 High Byte +SFR16(PCA0CP2, 0xEB); // PCA Capture 2 Word + SFR(PCA0CPL2, 0xEB); // PCA Capture 2 Low Byte + SFR(PCA0CPH2, 0xEC); // PCA Capture 2 High Byte +SFR16(PCA0CP3, 0xED); // PCA Capture 3 Word + SFR(PCA0CPL3, 0xED); // PCA Capture 3 Low Byte + SFR(PCA0CPH3, 0xEE); // PCA Capture 3 High Byte +SFR(RSTSRC, 0xEF); // Reset Source Configuration/Status +SFR(B, 0xF0); // B Register +SFR16(PCA0CP5, 0xF5); // PCA Capture 5 Word + SFR(PCA0CPL5, 0xF5); // PCA Capture 5 Low Byte + SFR(PCA0CPH5, 0xF6); // PCA Capture 5 High Byte +SFR(SPI0CN, 0xF8); // SPI0 Control + SBIT(SPIEN, 0xF8, 0); // SPI0 Enable + SBIT(TXBMT, 0xF8, 1); // SPI0 Transmit Buffer Empty + SBIT(NSSMD0, 0xF8, 2); // SPI0 Slave Select Mode Bit 0 + SBIT(NSSMD1, 0xF8, 3); // SPI0 Slave Select Mode Bit 1 + SBIT(RXOVRN, 0xF8, 4); // SPI0 Receive Overrun Flag + SBIT(MODF, 0xF8, 5); // SPI0 Mode Fault Flag + SBIT(WCOL, 0xF8, 6); // SPI0 Write Collision Flag + SBIT(SPIF, 0xF8, 7); // SPI0 Interrupt Flag +SFR16(PCA0, 0xF9); // PCA Counter Word + SFR(PCA0L, 0xF9); // PCA Counter Low Byte + SFR(PCA0H, 0xFA); // PCA Counter High Byte +SFR16(PCA0CP0, 0xFB); // PCA Capture 0 Word + SFR(PCA0CPL0, 0xFB); // PCA Capture 0 Low Byte + SFR(PCA0CPH0, 0xFC); // PCA Capture 0 High Byte +SFR16(PCA0CP4, 0xFD); // PCA Capture 4 Word + SFR(PCA0CPL4, 0xFD); // PCA Capture 4 Low Byte + SFR(PCA0CPH4, 0xFE); // PCA Capture 4 High Byte +SFR(VDM0CN, 0xFF); // VDD Monitor Control + +/* Page 0x00 */ + +SFR(PSCTL, 0x8F); // Program Store R/W Control +SFR16(MAC0A, 0xA4); // MAC0 A Register Word + SFR(MAC0AL, 0xA4); // MAC0 A Register Low Byte + SFR(MAC0AH, 0xA5); // MAC0 A Register High Byte +SFR16(MAC0RND, 0xAE); // MAC0 Rounding Register Word + SFR(MAC0RNDL, 0xAE); // MAC0 Rounding Register Low Byte + SFR(MAC0RNDH, 0xAF); // MAC0 Rounding Register High Byte +SFR(P2MAT, 0xB1); // Port 2 Match +SFR(P2MASK, 0xB2); // Port 2 Mask +SFR(FLSCL, 0xB6); // Flash Scale +SFR(FLKEY, 0xB7); // Flash Lock and Key +SFR(MAC0STA, 0xCF); // MAC0 Status Register +SFR32(MAC0ACC, 0xD2); // MAC0 Accumulator Long Word + SFR(MAC0ACC0, 0xD2); // MAC0 Accumulator Byte 0 (LSB) + SFR(MAC0ACC1, 0xD3); // MAC0 Accumulator Byte 1 + SFR(MAC0ACC2, 0xD4); // MAC0 Accumulator Byte 2 + SFR(MAC0ACC3, 0xD5); // MAC0 Accumulator Byte 3 (MSB) +SFR(MAC0OVR, 0xD6); // MAC0 Accumulator Overflow +SFR(MAC0CF, 0xD7); // MAC0 Configuration +SFR(P1MAT, 0xE1); // Port 1 Match +SFR(P1MASK, 0xE2); // Port 1 Mask +// No sfr16 definition for MAC0B because MAC0BL must be written last + SFR(MAC0BL, 0xF1); // MAC0 B Register Low Byte + SFR(MAC0BH, 0xF2); // MAC0 B Register High Byte +SFR(P0MAT, 0xF3); // Port 0 Match +SFR(P0MASK, 0xF4); // Port 0 Mask + +/* Page 0x0F */ + +SFR(CCH0CN, 0x84); // Cache Control +SFR(CLKSEL, 0x8F); // Clock Select +SFR(P0MDOUT, 0xA4); // Port 0 Output Mode Configuration +SFR(P1MDOUT, 0xA5); // Port 1 Output Mode Configuration +SFR(P2MDOUT, 0xA6); // Port 2 Output Mode Configuration +SFR(PLL0DIV, 0xA9); // PLL Divider +SFR(FLSTAT, 0xAC); // Flash Status +SFR(OSCLCN, 0xAD); // Internal Low-Frequency Oscillator Control +SFR(P4MDOUT, 0xAE); // Port 4 Output Mode Configuration +SFR(P3MDOUT, 0xAF); // Port 3 Output Mode Configuration +SFR(PLL0MUL, 0xB1); // PLL Multiplier +SFR(PLL0FLT, 0xB2); // PLL Filter +SFR(PLL0CN, 0xB3); // PLL Control +SFR(OSCXCN, 0xB6); // External Oscillator Control +SFR(OSCICN, 0xB7); // Internal Oscillator Control +SFR(OSCICL, 0xBF); // Internal Oscillator Calibration +SFR(EMI0CF, 0xC7); // EMIF Configuration +SFR(CCH0TN, 0xC9); // Cache Tuning +SFR(EIP1, 0xCE); // Extended Interrupt Priority 1 +SFR(EIP2, 0xCF); // Extended Interrupt Priority 2 +SFR(CCH0LC, 0xD2); // Cache Lock +SFR(CCH0MA, 0xD3); // Cache Miss Accumulator +SFR(P0SKIP, 0xD4); // Port 0 Skip +SFR(P1SKIP, 0xD5); // Port 1 Skip +SFR(P2SKIP, 0xD6); // Port 2 Skip +SFR(P3SKIP, 0xD7); // Port 3 Skip +SFR(XBR0, 0xE1); // Port I/O Crossbar Control 0 +SFR(XBR1, 0xE2); // Port I/O Crossbar Control 1 +SFR(SFR0CN, 0xE5); // SFR Page Control +SFR(P0MDIN, 0xF1); // Port 0 Input Mode Configuration +SFR(P1MDIN, 0xF2); // Port 1 Input Mode Configuration +SFR(P2MDIN, 0xF3); // Port 2 Input Mode Configuration +SFR(P3MDIN, 0xF4); // Port 3 Input Mode Configuration +SFR(EMI0TC, 0xF7); // EMIF Timing Control + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define T1M 0x08 /* CKCON */ +#define PSWE 0x01 /* PSCTL */ +#define PSEE 0x02 /* PSCTL */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define CP0E 0x10 /* XBR0 */ +#define CP0AE 0x20 /* XBR0 */ + +/* Interrupts */ + +#define INT_EXT0 0 // External Interrupt 0 +#define INT_TIMER0 1 // Timer0 Overflow +#define INT_EXT1 2 // External Interrupt 1 +#define INT_TIMER1 3 // Timer1 Overflow +#define INT_UART0 4 // Serial Port 0 +#define INT_TIMER2 5 // Timer2 Overflow +#define INT_SPI0 6 // Serial Peripheral Interface 0 +#define INT_SMBUS0 7 // SMBus0 Interface +// 8 Reserved +#define INT_ADC0_WINDOW 9 // ADC0 Window Comparison +#define INT_ADC0_EOC 10 // ADC0 End Of Conversion +#define INT_PCA0 11 // PCA0 Peripheral +#define INT_COMPARATOR0 12 // Comparator0 +#define INT_COMPARATOR1 13 // Comparator1 +#define INT_TIMER3 14 // Timer3 Overflow +// 15 Reserved +#define INT_PORT_MATCH 16 // Port Match + +#endif diff --git a/device/include/mcs51/C8051F410.h b/device/include/mcs51/C8051F410.h new file mode 100644 index 0000000..f66a66e --- /dev/null +++ b/device/include/mcs51/C8051F410.h @@ -0,0 +1,383 @@ +/*------------------------------------------------------------------------- + Register Declarations for the SiLabs C8051F41x Processor Range + + Copyright (C) 2006 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051F410_H +#define C8051F410_H + + +/* BYTE Registers */ + +__sfr __at (0x80) P0 ; /* PORT 0 */ +__sfr __at (0x81) SP ; /* STACK POINTER */ +__sfr __at (0x82) DPL ; /* DATA POINTER - LOW BYTE */ +__sfr __at (0x83) DPH ; /* DATA POINTER - HIGH BYTE */ +__sfr __at (0x84) CRC0CN ; /* CRC 0 CONTROL */ +__sfr __at (0x85) CRC0IN ; /* CRC 0 DATA INPUT */ +__sfr __at (0x86) CRC0DAT ; /* CRC 0 DATA OUTPUT */ +__sfr __at (0x87) PCON ; /* POWER CONTROL */ +__sfr __at (0x88) TCON ; /* TIMER CONTROL */ +__sfr __at (0x89) TMOD ; /* TIMER MODE */ +__sfr __at (0x8A) TL0 ; /* TIMER 0 - LOW BYTE */ +__sfr __at (0x8B) TL1 ; /* TIMER 1 - LOW BYTE */ +__sfr __at (0x8C) TH0 ; /* TIMER 0 - HIGH BYTE */ +__sfr __at (0x8D) TH1 ; /* TIMER 1 - HIGH BYTE */ +__sfr __at (0x8E) CKCON ; /* CLOCK CONTROL */ +__sfr __at (0x8F) PSCTL ; /* PROGRAM STORE R/W CONTROL */ +__sfr __at (0x90) P1 ; /* PORT 1 */ +__sfr __at (0x91) TMR3CN ; /* TIMER 3 CONTROL */ +__sfr __at (0x92) TMR3RLL ; /* TIMER 3 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0x93) TMR3RLH ; /* TIMER 3 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0x94) TMR3L ; /* TIMER 3 - LOW BYTE */ +__sfr __at (0x95) TMR3H ; /* TIMER 3 - HIGH BYTE */ +__sfr __at (0x96) IDA0L ; /* CURRENT MODE DAC 0 - LOW BYTE */ +__sfr __at (0x97) IDA0H ; /* CURRENT MODE DAC 0 - HIGH BYTE */ +__sfr __at (0x98) SCON ; /* SERIAL PORT CONTROL */ +__sfr __at (0x98) SCON0 ; /* SERIAL PORT CONTROL */ +__sfr __at (0x99) SBUF ; /* SERIAL PORT BUFFER */ +__sfr __at (0x99) SBUF0 ; /* SERIAL PORT BUFFER */ +__sfr __at (0x9A) CPT1CN ; /* COMPARATOR 1 CONTROL */ +__sfr __at (0x9B) CPT0CN ; /* COMPARATOR 0 CONTROL */ +__sfr __at (0x9C) CPT1MD ; /* COMPARATOR 1 MODE SELECTION */ +__sfr __at (0x9D) CPT0MD ; /* COMPARATOR 0 MODE SELECTION */ +__sfr __at (0x9E) CPT1MX ; /* COMPARATOR 1 MUX SELECTION */ +__sfr __at (0x9F) CPT0MX ; /* COMPARATOR 0 MUX SELECTION */ +__sfr __at (0xA0) P2 ; /* PORT 2 */ +__sfr __at (0xA1) SPI0CFG ; /* SPI0 CONFIGURATION */ +__sfr __at (0xA2) SPI0CKR ; /* SPI0 CLOCK RATE CONTROL */ +__sfr __at (0xA3) SPI0DAT ; /* SPI0 DATA */ +__sfr __at (0xA4) P0MDOUT ; /* PORT 0 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA5) P1MDOUT ; /* PORT 1 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA6) P2MDOUT ; /* PORT 2 OUTPUT MODE CONFIGURATION */ +__sfr __at (0xA8) IE ; /* INTERRUPT ENABLE */ +__sfr __at (0xA9) CLKSEL ; /* SYSTEM CLOCK SELECT */ +__sfr __at (0xAA) EMI0CN ; /* EXTERNAL MEMORY INTERFACE CONTROL */ +__sfr __at (0xAA) _XPAGE ; /* XDATA/PDATA PAGE */ +__sfr __at (0xAB) CLKMUL ; /* CLOCK MULTIPLIER */ +__sfr __at (0xAC) RTC0ADR ; /* SMARTCLOCK ADDRESS */ +__sfr __at (0xAD) RTC0DAT ; /* SMARTCLOCK DATA */ +__sfr __at (0xAE) RTC0KEY ; /* SMARTCLOCK LOCK AND KEY */ +__sfr __at (0xAF) ONESHOT ; /* FLASH ONESHOT PERIOD */ +__sfr __at (0xB0) P0ODEN ; /* PORT 0 OVERDRIVE */ +__sfr __at (0xB1) OSCXCN ; /* EXTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB2) OSCICN ; /* INTERNAL OSCILLATOR CONTROL */ +__sfr __at (0xB3) OSCICL ; /* INTERNAL OSCILLATOR CALIBRATION */ +__sfr __at (0xB5) IDA1CN ; /* CURRENT MODE DAC 1 - CONTROL */ +__sfr __at (0xB6) FLSCL ; /* FLASH MEMORY TIMING PRESCALER */ +__sfr __at (0xB7) FLKEY ; /* FLASH ACESS LIMIT */ +__sfr __at (0xB8) IP ; /* INTERRUPT PRIORITY */ +__sfr __at (0xB9) IDA0CN ; /* CURRENT MODE DAC 0 - CONTROL */ +__sfr __at (0xBA) ADC0TK ; /* ADC 0 TRACKING MODE SELECT */ +__sfr __at (0xBB) ADC0MX ; /* ADC 0 CHANNEL SELECT */ +__sfr __at (0xBC) ADC0CF ; /* ADC 0 CONFIGURATION */ +__sfr __at (0xBD) ADC0L ; /* ADC 0 DATA WORD LSB */ +__sfr __at (0xBE) ADC0H ; /* ADC 0 DATA WORD MSB */ +__sfr __at (0xBF) P1MASK ; /* PORT 1 MASK */ +__sfr __at (0xC0) SMB0CN ; /* SMBUS CONTROL */ +__sfr __at (0xC1) SMB0CF ; /* SMBUS CONFIGURATION */ +__sfr __at (0xC2) SMB0DAT ; /* SMBUS DATA */ +__sfr __at (0xC3) ADC0GTL ; /* ADC 0 GREATER-THAN LOW BYTE */ +__sfr __at (0xC4) ADC0GTH ; /* ADC 0 GREATER-THAN HIGH BYTE */ +__sfr __at (0xC5) ADC0LTL ; /* ADC 0 LESS-THAN LOW BYTE */ +__sfr __at (0xC6) ADC0LTH ; /* ADC 0 LESS-THAN HIGH BYTE */ +__sfr __at (0xC7) P0MASK ; /* PORT 0 MASK */ +__sfr __at (0xC8) T2CON ; /* TIMER 2 CONTROL */ +__sfr __at (0xC8) TMR2CN ; /* TIMER 2 CONTROL */ +__sfr __at (0xC9) REG0CN ; /* VOLTAGE REGULATOR CONTROL */ +__sfr __at (0xCA) RCAP2L ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCA) TMR2RLL ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +__sfr __at (0xCB) RCAP2H ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCB) TMR2RLH ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +__sfr __at (0xCC) TL2 ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCC) TMR2L ; /* TIMER 2 - LOW BYTE */ +__sfr __at (0xCD) TH2 ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xCD) TMR2H ; /* TIMER 2 - HIGH BYTE */ +__sfr __at (0xCE) PCA0CPM5 ; /* PCA MODULE 5 MODE REGISTER */ +__sfr __at (0xCF) P1MAT ; /* PORT 1 MATCH */ +__sfr __at (0xD0) PSW ; /* PROGRAM STATUS WORD */ +__sfr __at (0xD1) REF0CN ; /* VOLTAGE REFERENCE 0 CONTROL */ +__sfr __at (0xD2) PCA0CPL5 ; /* PCA CAPTURE 5 LOW */ +__sfr __at (0xD3) PCA0CPH5 ; /* PCA CAPTURE 5 HIGH */ +__sfr __at (0xD4) P0SKIP ; /* PORT 0 SKIP */ +__sfr __at (0xD5) P1SKIP ; /* PORT 1 SKIP */ +__sfr __at (0xD6) P2SKIP ; /* PORT 2 SKIP */ +__sfr __at (0xD7) P0MAT ; /* PORT 0 MATCH */ +__sfr __at (0xD8) PCA0CN ; /* PCA CONTROL */ +__sfr __at (0xD9) PCA0MD ; /* PCA MODE */ +__sfr __at (0xDA) PCA0CPM0 ; /* PCA MODULE 0 MODE REGISTER */ +__sfr __at (0xDB) PCA0CPM1 ; /* PCA MODULE 1 MODE REGISTER */ +__sfr __at (0xDC) PCA0CPM2 ; /* PCA MODULE 2 MODE REGISTER */ +__sfr __at (0xDD) PCA0CPM3 ; /* PCA MODULE 3 MODE REGISTER */ +__sfr __at (0xDE) PCA0CPM4 ; /* PCA MODULE 4 MODE REGISTER */ +__sfr __at (0xDF) CRC0FLIP ; /* CRC 0 BIT FLIP */ +__sfr __at (0xE0) ACC ; /* ACCUMULATOR */ +__sfr __at (0xE1) XBR0 ; /* PORT MUX CONFIGURATION REGISTER 0 */ +__sfr __at (0xE2) XBR1 ; /* PORT MUX CONFIGURATION REGISTER 1 */ +__sfr __at (0xE3) PFE0CN ; /* PREFETCH ENGINE CONTROL */ +__sfr __at (0xE4) IT01CF ; /* INT0/INT1 CONFIGURATION REGISTER */ +__sfr __at (0xE4) INT01CF ; /* INT0/INT1 CONFIGURATION REGISTER */ +__sfr __at (0xE6) EIE1 ; /* EXTERNAL INTERRUPT ENABLE 1 */ +__sfr __at (0xE7) EIE2 ; /* EXTERNAL INTERRUPT ENABLE 2 */ +__sfr __at (0xE8) ADC0CN ; /* ADC 0 CONTROL */ +__sfr __at (0xE9) PCA0CPL1 ; /* PCA CAPTURE 1 LOW */ +__sfr __at (0xEA) PCA0CPH1 ; /* PCA CAPTURE 1 HIGH */ +__sfr __at (0xEB) PCA0CPL2 ; /* PCA CAPTURE 2 LOW */ +__sfr __at (0xEC) PCA0CPH2 ; /* PCA CAPTURE 2 HIGH */ +__sfr __at (0xED) PCA0CPL3 ; /* PCA CAPTURE 3 LOW */ +__sfr __at (0xEE) PCA0CPH3 ; /* PCA CAPTURE 3 HIGH */ +__sfr __at (0xEF) RSTSRC ; /* RESET SOURCE */ +__sfr __at (0xF0) B ; /* B REGISTER */ +__sfr __at (0xF1) P0MODE ; /* PORT 0 INPUT MODE CONFIGURATION */ +__sfr __at (0xF1) P0MDIN ; /* PORT 0 INPUT MODE CONFIGURATION */ +__sfr __at (0xF2) P1MODE ; /* PORT 1 INPUT MODE CONFIGURATION */ +__sfr __at (0xF2) P1MDIN ; /* PORT 1 INPUT MODE CONFIGURATION */ +__sfr __at (0xF3) P2MODE ; /* PORT 2 INPUT MODE CONFIGURATION */ +__sfr __at (0xF3) P2MDIN ; /* PORT 2 INPUT MODE CONFIGURATION */ +__sfr __at (0xF4) IDA1L ; /* CURRENT MODE DAC 1 - LOW BYTE */ +__sfr __at (0xF5) IDA1H ; /* CURRENT MODE DAC 1 - HIGH BYTE */ +__sfr __at (0xF6) EIP1 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +__sfr __at (0xF7) EIP2 ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 2 */ +__sfr __at (0xF8) SPI0CN ; /* SPI0 CONTROL */ +__sfr __at (0xF9) PCA0L ; /* PCA COUNTER LOW */ +__sfr __at (0xFA) PCA0H ; /* PCA COUNTER HIGH */ +__sfr __at (0xFB) PCA0CPL0 ; /* PCA CAPTURE 0 LOW */ +__sfr __at (0xFC) PCA0CPH0 ; /* PCA CAPTURE 0 HIGH */ +__sfr __at (0xFD) PCA0CPL4 ; /* PCA CAPTURE 4 LOW */ +__sfr __at (0xFE) PCA0CPH4 ; /* PCA CAPTURE 4 HIGH */ +__sfr __at (0xFF) VDM0CN ; /* VDD MONITOR CONTROL */ + + +/* WORD/DWORD Registers */ + +__sfr16 __at (0x8C8A) TMR0 ; /* TIMER 0 COUNTER */ +__sfr16 __at (0x8D8B) TMR1 ; /* TIMER 1 COUNTER */ +__sfr16 __at (0xCDCC) TMR2 ; /* TIMER 2 COUNTER */ +__sfr16 __at (0xCBCA) RCAP2 ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0xCBCA) TMR2RL ; /* TIMER 2 CAPTURE REGISTER WORD */ +__sfr16 __at (0x9594) TMR3 ; /* TIMER 3 COUNTER */ +__sfr16 __at (0x9392) TMR3RL ; /* TIMER 3 CAPTURE REGISTER WORD */ +__sfr16 __at (0x9796) IDA0 ; /* CURRENT MODE DAC 0 DATA WORD */ +__sfr16 __at (0xF5F4) IDA1 ; /* CURRENT MODE DAC 1 DATA WORD */ +__sfr16 __at (0xBEBD) ADC0 ; /* ADC 0 DATA WORD */ +__sfr16 __at (0xC4C3) ADC0GT ; /* ADC 0 GREATER-THAN REGISTER WORD */ +__sfr16 __at (0xC6C5) ADC0LT ; /* ADC 0 LESS-THAN REGISTER WORD */ +__sfr16 __at (0xFAF9) PCA0 ; /* PCA COUNTER */ +__sfr16 __at (0xFCFB) PCA0CP0 ; /* PCA CAPTURE 0 WORD */ +__sfr16 __at (0xEAE9) PCA0CP1 ; /* PCA CAPTURE 1 WORD */ +__sfr16 __at (0xECEB) PCA0CP2 ; /* PCA CAPTURE 2 WORD */ +__sfr16 __at (0xEEED) PCA0CP3 ; /* PCA CAPTURE 3 WORD */ +__sfr16 __at (0xFEFD) PCA0CP4 ; /* PCA CAPTURE 4 WORD */ +__sfr16 __at (0xD3D2) PCA0CP5 ; /* PCA CAPTURE 5 WORD */ + + +/* BIT Registers */ + +/* P0 0x80 */ +__sbit __at (0x80) P0_0 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x87) P0_7 ; + +/* TCON 0x88 */ +__sbit __at (0x88) IT0 ; /* TCON.0 - EXT. INTERRUPT 0 TYPE */ +__sbit __at (0x89) IE0 ; /* TCON.1 - EXT. INTERRUPT 0 EDGE FLAG */ +__sbit __at (0x8A) IT1 ; /* TCON.2 - EXT. INTERRUPT 1 TYPE */ +__sbit __at (0x8B) IE1 ; /* TCON.3 - EXT. INTERRUPT 1 EDGE FLAG */ +__sbit __at (0x8C) TR0 ; /* TCON.4 - TIMER 0 ON/OFF CONTROL */ +__sbit __at (0x8D) TF0 ; /* TCON.5 - TIMER 0 OVERFLOW FLAG */ +__sbit __at (0x8E) TR1 ; /* TCON.6 - TIMER 1 ON/OFF CONTROL */ +__sbit __at (0x8F) TF1 ; /* TCON.7 - TIMER 1 OVERFLOW FLAG */ + +/* P1 0x90 */ +__sbit __at (0x90) P1_0 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x92) P1_2 ; +__sbit __at (0x93) P1_3 ; +__sbit __at (0x94) P1_4 ; +__sbit __at (0x95) P1_5 ; +__sbit __at (0x96) P1_6 ; +__sbit __at (0x97) P1_7 ; + +/* SCON 0x98 */ +__sbit __at (0x98) RI ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x98) RI0 ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +__sbit __at (0x99) TI ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x99) TI0 ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +__sbit __at (0x9A) RB8 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9A) RB80 ; /* SCON.2 - RECEIVE BIT 8 */ +__sbit __at (0x9B) TB8 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9B) TB80 ; /* SCON.3 - TRANSMIT BIT 8 */ +__sbit __at (0x9C) REN ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9C) REN0 ; /* SCON.4 - RECEIVE ENABLE */ +__sbit __at (0x9D) SM2 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9D) MCE0 ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +__sbit __at (0x9F) SM0 ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ +__sbit __at (0x9F) S0MODE ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ + +/* P2 0xA0 */ +__sbit __at (0xA0) P2_0 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA4) P2_4 ; +__sbit __at (0xA5) P2_5 ; +__sbit __at (0xA6) P2_6 ; +__sbit __at (0xA7) P2_7 ; + +/* IE 0xA8 */ +__sbit __at (0xA8) EX0 ; /* IE.0 - EXTERNAL INTERRUPT 0 ENABLE */ +__sbit __at (0xA9) ET0 ; /* IE.1 - TIMER 0 INTERRUPT ENABLE */ +__sbit __at (0xAA) EX1 ; /* IE.2 - EXTERNAL INTERRUPT 1 ENABLE */ +__sbit __at (0xAB) ET1 ; /* IE.3 - TIMER 1 INTERRUPT ENABLE */ +__sbit __at (0xAC) ES ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAC) ES0 ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +__sbit __at (0xAD) ET2 ; /* IE.5 - TIMER 2 INTERRUPT ENABLE */ +__sbit __at (0xAE) ESPI0 ; /* IE.6 - SPI0 INTERRUPT ENABLE */ +__sbit __at (0xAF) EA ; /* IE.7 - GLOBAL INTERRUPT ENABLE */ + +/* P0ODEN 0xB0 */ +__sbit __at (0xB0) P0OD_0 ; /* P0ODEN.0 - PORT0.0 OVERDRIVE ENABLE */ +__sbit __at (0xB1) P0OD_1 ; /* P0ODEN.1 - PORT0.1 OVERDRIVE ENABLE */ +__sbit __at (0xB2) P0OD_2 ; /* P0ODEN.2 - PORT0.2 OVERDRIVE ENABLE */ +__sbit __at (0xB3) P0OD_3 ; /* P0ODEN.3 - PORT0.3 OVERDRIVE ENABLE */ +__sbit __at (0xB4) P0OD_4 ; /* P0ODEN.4 - PORT0.4 OVERDRIVE ENABLE */ +__sbit __at (0xB5) P0OD_5 ; /* P0ODEN.5 - PORT0.5 OVERDRIVE ENABLE */ +__sbit __at (0xB6) P0OD_6 ; /* P0ODEN.6 - PORT0.6 OVERDRIVE ENABLE */ +__sbit __at (0xB7) P0OD_7 ; /* P0ODEN.7 - PORT0.7 OVERDRIVE ENABLE */ + +/* IP 0xB8 */ +__sbit __at (0xB8) PX0 ; /* IP.0 - EXTERNAL INTERRUPT 0 PRIORITY */ +__sbit __at (0xB9) PT0 ; /* IP.1 - TIMER 0 PRIORITY */ +__sbit __at (0xBA) PX1 ; /* IP.2 - EXTERNAL INTERRUPT 1 PRIORITY */ +__sbit __at (0xBB) PT1 ; /* IP.3 - TIMER 1 PRIORITY */ +__sbit __at (0xBC) PS ; /* IP.4 - SERIAL PORT PRIORITY */ +__sbit __at (0xBC) PS0 ; /* IP.4 - SERIAL PORT PRIORITY */ +__sbit __at (0xBD) PT2 ; /* IP.5 - TIMER 2 PRIORITY */ +__sbit __at (0xBE) PSPI0 ; /* IP.6 - SPI0 PRIORITY */ + +/* SMB0CN 0xC0 */ +__sbit __at (0xC0) SI ; /* SMB0CN.0 - SMBUS 0 INTERRUPT PENDING FLAG */ +__sbit __at (0xC1) ACK ; /* SMB0CN.1 - SMBUS 0 ACKNOWLEDGE FLAG */ +__sbit __at (0xC2) ARBLOST ; /* SMB0CN.2 - SMBUS 0 ARBITRATION LOST INDICATOR */ +__sbit __at (0xC3) ACKRQ ; /* SMB0CN.3 - SMBUS 0 ACKNOWLEDGE REQUEST */ +__sbit __at (0xC4) STO ; /* SMB0CN.4 - SMBUS 0 STOP FLAG */ +__sbit __at (0xC5) STA ; /* SMB0CN.5 - SMBUS 0 START FLAG */ +__sbit __at (0xC6) TXMODE ; /* SMB0CN.6 - SMBUS 0 TRANSMIT MODE INDICATOR */ +__sbit __at (0xC7) MASTER ; /* SMB0CN.7 - SMBUS 0 MASTER/SLAVE INDICATOR */ + +/* TMR2CN 0xC8 */ +__sbit __at (0xC8) T2XCLK ; /* TMR2CN.0 - TIMER 2 EXTERNAL CLOCK SELECT */ +__sbit __at (0xC9) T2RCLK ; /* TMR2CN.1 - TIMER 2 CAPTURE MODE */ +__sbit __at (0xCA) TR2 ; /* TMR2CN.2 - TIMER 2 ON/OFF CONTROL */ +__sbit __at (0xCB) T2SPLIT ; /* TMR2CN.3 - TIMER 2 SPLIT MODE ENABLE */ +__sbit __at (0xCD) TF2CEN ; /* TMR2CN.5 - TIMER 2 LOW-FREQ OSC CAPTURE ENABLE*/ +__sbit __at (0xCD) TF2LEN ; /* TMR2CN.5 - TIMER 2 LOW BYTE INTERRUPT ENABLE */ +__sbit __at (0xCE) TF2L ; /* TMR2CN.6 - TIMER 2 LOW BYTE OVERFLOW FLAG */ +__sbit __at (0xCF) TF2 ; /* TMR2CN.7 - TIMER 2 OVERFLOW FLAG */ +__sbit __at (0xCF) TF2H ; /* TMR2CN.7 - TIMER 2 HIGH BYTE OVERFLOW FLAG */ + +/* PSW 0xD0 */ +__sbit __at (0xD0) PARITY ; /* PSW.0 - ACCUMULATOR PARITY FLAG */ +__sbit __at (0xD1) F1 ; /* PSW.1 - FLAG 1 */ +__sbit __at (0xD2) OV ; /* PSW.2 - OVERFLOW FLAG */ +__sbit __at (0xD3) RS0 ; /* PSW.3 - REGISTER BANK SELECT 0 */ +__sbit __at (0xD4) RS1 ; /* PSW.4 - REGISTER BANK SELECT 1 */ +__sbit __at (0xD5) F0 ; /* PSW.5 - FLAG 0 */ +__sbit __at (0xD6) AC ; /* PSW.6 - AUXILIARY CARRY FLAG */ +__sbit __at (0xD7) CY ; /* PSW.7 - CARRY FLAG */ + +/* PCA0CN 0xD8 */ +__sbit __at (0xD8) CCF0 ; /* PCA0CN.0 - PCA MODULE 0 CAPTURE/COMPARE FLAG */ +__sbit __at (0xD9) CCF1 ; /* PCA0CN.1 - PCA MODULE 1 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDA) CCF2 ; /* PCA0CN.2 - PCA MODULE 2 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDB) CCF3 ; /* PCA0CN.3 - PCA MODULE 3 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDC) CCF4 ; /* PCA0CN.4 - PCA MODULE 4 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDD) CCF5 ; /* PCA0CN.5 - PCA MODULE 5 CAPTURE/COMPARE FLAG */ +__sbit __at (0xDE) CR ; /* PCA0CN.6 - PCA COUNTER/TIMER RUN CONTROL */ +__sbit __at (0xDF) CF ; /* PCA0CN.7 - PCA COUNTER/TIMER OVERFLOW FLAG */ + +/* ADC0CN 0xE8 */ +__sbit __at (0xE8) AD0CM0 ; /* ADC0CN.0 - ADC 0 START OF CONV. MODE BIT 0 */ +__sbit __at (0xE9) AD0CM1 ; /* ADC0CN.1 - ADC 0 START OF CONV. MODE BIT 1 */ +__sbit __at (0xEA) AD0LJST ; /* ADC0CN.2 - ADC 0 LEFT JUSTIFY SELECT */ +__sbit __at (0xEB) AD0WINT ; /* ADC0CN.3 - ADC 0 WINDOW COMPARE INT. FLAG */ +__sbit __at (0xEC) AD0BUSY ; /* ADC0CN.4 - ADC 0 BUSY FLAG */ +__sbit __at (0xED) AD0INT ; /* ADC0CN.5 - ADC 0 CONV. COMPLETE INT. FLAG */ +__sbit __at (0xEE) BURSTEN ; /* ADC0CN.6 - ADC 0 BURST MODE ENABLE */ +__sbit __at (0xEF) AD0EN ; /* ADC0CN.7 - ADC 0 ENABLE */ + +/* SPI0CN 0xF8 */ +__sbit __at (0xF8) SPIEN ; /* SPI0CN.0 - SPI0 ENABLE */ +__sbit __at (0xF9) TXBMT ; /* SPI0CN.1 - TRANSMIT BUFFER EMPTY */ +__sbit __at (0xFA) NSSMD0 ; /* SPI0CN.2 - SLAVE SELECT MODE BIT 0 */ +__sbit __at (0xFB) NSSMD1 ; /* SPI0CN.3 - SLAVE SELECT MODE BIT 1 */ +__sbit __at (0xFC) RXOVRN ; /* SPI0CN.4 - RECEIVE OVERRUN FLAG */ +__sbit __at (0xFD) MODF ; /* SPI0CN.5 - MODE FAULT FLAG */ +__sbit __at (0xFE) WCOL ; /* SPI0CN.6 - WRITE COLLISION FLAG */ +__sbit __at (0xFF) SPIF ; /* SPI0CN.7 - SPI0 INTERRUPT FLAG */ + + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define T1M 0x08 /* CKCON */ +#define PSWE 0x01 /* PSCTL */ +#define PSEE 0x02 /* PSCTL */ +#define ECP0 0x20 /* EIE1 */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define CP0E 0x10 /* XBR0 */ +#define CP0OEN 0x10 /* XBR0 */ +#define CP0AE 0x20 /* XBR0 */ +#define CP0AOEN 0x20 /* XBR0 */ + +/* Interrupts */ + +#define INT_EXT0 0 // External Interrupt 0 +#define INT_TIMER0 1 // Timer0 Overflow +#define INT_EXT1 2 // External Interrupt 1 +#define INT_TIMER1 3 // Timer1 Overflow +#define INT_UART0 4 // Serial Port 0 +#define INT_TIMER2 5 // Timer2 Overflow +#define INT_SPI0 6 // Serial Peripheral Interface 0 +#define INT_SMBUS0 7 // SMBus0 Interface +#define INT_RTC0 8 // RTC0 Interface +#define INT_ADC0_WINDOW 9 // ADC0 Window Comparison +#define INT_ADC0_EOC 10 // ADC0 End Of Conversion +#define INT_PCA0 11 // PCA0 Peripheral +#define INT_COMPARATOR0 12 // Comparator0 +#define INT_COMPARATOR1 13 // Comparator1 +#define INT_TIMER3 14 // Timer3 Overflow +#define INT_VREG_DROPOUT 15 // VREG dropout +#define INT_PORT_MATCH 16 // Port Match + +#endif diff --git a/device/include/mcs51/C8051F520.h b/device/include/mcs51/C8051F520.h new file mode 100644 index 0000000..9a3fd67 --- /dev/null +++ b/device/include/mcs51/C8051F520.h @@ -0,0 +1,235 @@ +/*------------------------------------------------------------------------- + Register Declarations for the SiLabs C8051F52x-F53x Processor Range + + Copyright (C) 2006 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051F520_H +#define C8051F520_H + +#include + +SFR(P0, 0x80); // Port 0 + SBIT(P0_0, 0x80, 0); // Port 0 bit 0 + SBIT(P0_1, 0x80, 1); // Port 0 bit 1 + SBIT(P0_2, 0x80, 2); // Port 0 bit 2 + SBIT(P0_3, 0x80, 3); // Port 0 bit 3 + SBIT(P0_4, 0x80, 4); // Port 0 bit 4 + SBIT(P0_5, 0x80, 5); // Port 0 bit 5 + SBIT(P0_6, 0x80, 6); // Port 0 bit 6 + SBIT(P0_7, 0x80, 7); // Port 0 bit 7 +SFR(SP, 0x81); // Stack Pointer +SFR(DPL, 0x82); // Data Pointer Low Byte +SFR(DPH, 0x83); // Data Pointer High Byte +SFR(PCON, 0x87); // Power Mode Control +SFR(TCON, 0x88); // Timer Control + SBIT(IT0, 0x88, 0); // Ext. Interrupt 0 Type Select + SBIT(IE0, 0x88, 1); // Ext. Interrupt 0 Flag + SBIT(IT1, 0x88, 2); // Ext. Interrupt 1 Type Select + SBIT(IE1, 0x88, 3); // Ext. Interrupt 1 Flag + SBIT(TR0, 0x88, 4); // Timer 0 Run Control + SBIT(TF0, 0x88, 5); // Timer 0 Overflow Flag + SBIT(TR1, 0x88, 6); // Timer 1 Run Control + SBIT(TF1, 0x88, 7); // Timer 1 Overflow Flag +SFR(TMOD, 0x89); // Timer Mode +SFR16E(TMR0, 0x8C8A); // Timer/Counter 0 Word + SFR(TL0, 0x8A); // Timer/Counter 0 Low Byte + SFR(TH0, 0x8C); // Timer/Counter 0 High Byte +SFR16E(TMR1, 0x8D8B); // Timer/Counter 1 Word + SFR(TL1, 0x8B); // Timer/Counter 1 Low Byte + SFR(TH1, 0x8D); // Timer/Counter 1 High Byte +SFR(CKCON, 0x8E); // Clock Control +SFR(PSCTL, 0x8F); // Program Store R/W Control +SFR(P1, 0x90); // Port 1 + SBIT(P1_0, 0x90, 0); // Port 1 bit 0 + SBIT(P1_1, 0x90, 1); // Port 1 bit 1 + SBIT(P1_2, 0x90, 2); // Port 1 bit 2 + SBIT(P1_3, 0x90, 3); // Port 1 bit 3 + SBIT(P1_4, 0x90, 4); // Port 1 bit 4 + SBIT(P1_5, 0x90, 5); // Port 1 bit 5 + SBIT(P1_6, 0x90, 6); // Port 1 bit 6 + SBIT(P1_7, 0x90, 7); // Port 1 bit 7 +SFR(LINADDR, 0x92); // LIN Indirect Address Pointer +SFR(LINDATA, 0x93); // LIN Indirect Data Buffer +SFR(LINCF, 0x95); // LIN Control Mode +SFR(SCON0, 0x98); // Serial Port 0 Control + SBIT(RI0, 0x98, 0); // Receive Interrupt Flag + SBIT(TI0, 0x98, 1); // Transmit Interrupt Flag + SBIT(RB80, 0x98, 2); // Ninth Receive Bit + SBIT(TB80, 0x98, 3); // Ninth Transmission Bit + SBIT(REN0, 0x98, 4); // Receive Enable + SBIT(MCE0, 0x98, 5); // Multiprocessor Communication Enable + SBIT(S0MODE, 0x98, 7); // Serial Port 0 Operation Mode +SFR(SBUF0, 0x99); // Serial Port 0 Data Buffer +SFR(CPT0CN, 0x9B); // Comparator 0 Control +SFR(CPT0MD, 0x9D); // Comparator 0 Mode Selection +SFR(CPT0MX, 0x9F); // Comparator 0 MUX Selection +SFR(SPI0CFG, 0xA1); // SPI Configuration +SFR(SPI0CKR, 0xA2); // SPI Clock Rate Control +SFR(SPI0DAT, 0xA3); // SPI Data +SFR(P0MDOUT, 0xA4); // Port 0 Output Mode Configuration +SFR(P1MDOUT, 0xA5); // Port 1 Output Mode Configuration +SFR(IE, 0xA8); // Interrupt Enable + SBIT(EX0, 0xA8, 0); // Enable External Interrupt 0 + SBIT(ET0, 0xA8, 1); // Enable Timer 0 Interrupt + SBIT(EX1, 0xA8, 2); // Enable External Interrupt 1 + SBIT(ET1, 0xA8, 3); // Enable Timer 1 Interrupt + SBIT(ES0, 0xA8, 4); // Enable Serial Port Interrupt + SBIT(ET2, 0xA8, 5); // Enable Timer 2 Interrupt + SBIT(ESPI0, 0xA8, 6); // Enable SPI0 Interrupt + SBIT(EA, 0xA8, 7); // Global Interrupt Enable +SFR(CLKSEL, 0xA9); // Clock Select +SFR(OSCIFIN, 0xB0); // Internal Oscillator Fine Calibration +SFR(OSCXCN, 0xB1); // External Oscillator Control +SFR(OSCICN, 0xB2); // Internal Oscillator Control +SFR(OSCICL, 0xB3); // Internal Oscillator Calibration +SFR(FLKEY, 0xB7); // Flash Lock and Key +SFR(IP, 0xB8); // Interrupt Priority + SBIT(PX0, 0xB8, 0); // External Interrupt 0 Priority + SBIT(PT0, 0xB8, 1); // Timer 0 Interrupt Priority + SBIT(PX1, 0xB8, 2); // External Interrupt 1 Priority + SBIT(PT1, 0xB8, 3); // Timer 1 Interrupt Priority + SBIT(PS0, 0xB8, 4); // Serial Port Interrupt Priority + SBIT(PT2, 0xB8, 5); // Timer 2 Interrupt Priority + SBIT(PSPI0, 0xB8, 6); // SPI0 Interrupt Priority +SFR(ADC0TK, 0xBA); // ADC0 Tracking Mode Select +SFR(ADC0MX, 0xBB); // ADC0 Channel Select +SFR(ADC0CF, 0xBC); // ADC0 Configuration +SFR16(ADC0, 0xBD); // ADC0 Word + SFR(ADC0L, 0xBD); // ADC0 Low Byte + SFR(ADC0H, 0xBE); // ADC0 High Byte +SFR(P1MASK, 0xBF); // Port 1 Mask +SFR16(ADC0GT, 0xC3); // ADC0 Greater-Than Data Word + SFR(ADC0GTL, 0xC3); // ADC0 Greater-Than Data Low Byte + SFR(ADC0GTH, 0xC4); // ADC0 Greater-Than Data High Byte +SFR16(ADC0LT, 0xC5); // ADC0 Less-Than Data Word + SFR(ADC0LTL, 0xC5); // ADC0 Less-Than Data Low Byte + SFR(ADC0LTH, 0xC6); // ADC0 Less-Than Data High Byte +SFR(P0MASK, 0xC7); // Port 0 Mask +SFR(TMR2CN, 0xC8); // Timer/Counter 2 Control +SFR(REG0CN, 0xC9); // Voltage Regulator Control +SFR16(TMR2RL, 0xCA); // Timer/Counter 2 Reload Word + SFR(TMR2RLL, 0xCA); // Timer/Counter 2 Reload Low Byte + SFR(TMR2RLH, 0xCB); // Timer/Counter 2 Reload High Byte +SFR16(TMR2, 0xCC); // Timer/Counter 2 Word + SFR(TMR2L, 0xCC); // Timer/Counter 2 Low Byte + SFR(TMR2H, 0xCD); // Timer/Counter 2 High Byte +SFR(P1MAT, 0xCF); // Port 1 Match +SFR(PSW, 0xD0); // Program Status Word + SBIT(P, 0xD0, 0); // Parity Flag + SBIT(F1, 0xD0, 1); // User-Defined Flag + SBIT(OV, 0xD0, 2); // Overflow Flag + SBIT(RS0, 0xD0, 3); // Register Bank Select 0 + SBIT(RS1, 0xD0, 4); // Register Bank Select 1 + SBIT(F0, 0xD0, 5); // User-Defined Flag + SBIT(AC, 0xD0, 6); // Auxiliary Carry Flag + SBIT(CY, 0xD0, 7); // Carry Flag +SFR(REF0CN, 0xD1); // Voltage Reference Control +SFR(P0SKIP, 0xD4); // Port 0 Skip +SFR(P1SKIP, 0xD5); // Port 1 Skip +SFR(P0MAT, 0xD7); // Port 0 Match +SFR(PCA0CN, 0xD8); // PCA Control + SBIT(CCF0, 0xD8, 0); // PCA Module 0 Capture/Compare Flag + SBIT(CCF1, 0xD8, 1); // PCA Module 1 Capture/Compare Flag + SBIT(CCF2, 0xD8, 2); // PCA Module 2 Capture/Compare Flag + SBIT(CR, 0xD8, 6); // PCA Counter/Timer Run Control + SBIT(CF, 0xD8, 7); // PCA Counter/Timer Overflow Flag +SFR(PCA0MD, 0xD9); // PCA Mode +SFR(PCA0CPM0, 0xDA); // PCA Module 0 Mode +SFR(PCA0CPM1, 0xDB); // PCA Module 1 Mode +SFR(PCA0CPM2, 0xDC); // PCA Module 2 Mode +SFR(ACC, 0xE0); // Accumulator +SFR(XBR0, 0xE1); // Port I/O Crossbar Control 0 +SFR(XBR1, 0xE2); // Port I/O Crossbar Control 1 +SFR(IT01CF, 0xE4); // INT0/INT1 Configuration +SFR(EIE1, 0xE6); // Extended Interrupt Enable 1 +SFR(ADC0CN, 0xE8); // ADC0 Control + SBIT(AD0CM0, 0xE8, 0); // ADC0 Conversion Start Mode Select Bit 0 + SBIT(AD0CM1, 0xE8, 1); // ADC0 Conversion Start Mode Select Bit 1 + SBIT(AD0LJST, 0xE8, 2); // ADC0 Left Justify Select + SBIT(AD0WINT, 0xE8, 3); // ADC0 Window Compare Interrupt Flag + SBIT(AD0BUSY, 0xE8, 4); // ADC0 Busy Bit + SBIT(AD0INT, 0xE8, 5); // ADC0 Conversion Complete Interrupt Flag + SBIT(BURSTEN, 0xE8, 6); // ADC0 Burst Mode Enable Bit + SBIT(AD0EN, 0xE8, 7); // ADC0 Enable Bit +SFR16(PCA0CP1, 0xE9); // PCA Capture 1 Word + SFR(PCA0CPL1, 0xE9); // PCA Capture 1 Low Byte + SFR(PCA0CPH1, 0xEA); // PCA Capture 1 High Byte +SFR16(PCA0CP2, 0xEB); // PCA Capture 2 Word + SFR(PCA0CPL2, 0xEB); // PCA Capture 2 Low Byte + SFR(PCA0CPH2, 0xEC); // PCA Capture 2 High Byte +SFR(RSTSRC, 0xEF); // Reset Source Configuration/Status +SFR(B, 0xF0); // B Register +SFR(P0MDIN, 0xF1); // Port 0 Input Mode Configuration +SFR(P1MDIN, 0xF2); // Port 1 Input Mode Configuration +SFR(EIP1, 0xF6); // Extended Interrupt Priority 1 +SFR(SPI0CN, 0xF8); // SPI0 Control + SBIT(SPIEN, 0xF8, 0); // SPI0 Enable + SBIT(TXBMT, 0xF8, 1); // SPI0 Transmit Buffer Empty + SBIT(NSSMD0, 0xF8, 2); // SPI0 Slave Select Mode Bit 0 + SBIT(NSSMD1, 0xF8, 3); // SPI0 Slave Select Mode Bit 1 + SBIT(RXOVRN, 0xF8, 4); // SPI0 Receive Overrun Flag + SBIT(MODF, 0xF8, 5); // SPI0 Mode Fault Flag + SBIT(WCOL, 0xF8, 6); // SPI0 Write Collision Flag + SBIT(SPIF, 0xF8, 7); // SPI0 Interrupt Flag +SFR16(PCA0, 0xF9); // PCA Counter Word + SFR(PCA0L, 0xF9); // PCA Counter Low Byte + SFR(PCA0H, 0xFA); // PCA Counter High Byte +SFR16(PCA0CP0, 0xFB); // PCA Capture 0 Word + SFR(PCA0CPL0, 0xFB); // PCA Capture 0 Low Byte + SFR(PCA0CPH0, 0xFC); // PCA Capture 0 High Byte +SFR(VDDMON, 0xFF); // VDD Control + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define T1M 0x08 /* CKCON */ +#define PSWE 0x01 /* PSCTL */ +#define PSEE 0x02 /* PSCTL */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define CP0E 0x10 /* XBR0 */ +#define CP0AE 0x20 /* XBR0 */ + +/* Interrupts */ + +#define INT_EXT0 0 // External Interrupt 0 +#define INT_TIMER0 1 // Timer0 Overflow +#define INT_EXT1 2 // External Interrupt 1 +#define INT_TIMER1 3 // Timer1 Overflow +#define INT_UART0 4 // Serial Port 0 +#define INT_TIMER2 5 // Timer2 Overflow +#define INT_SPI0 6 // Serial Peripheral Interface 0 +#define INT_ADC0_WINDOW 7 // ADC0 Window Comparison +#define INT_ADC0_EOC 8 // ADC0 End Of Conversion +#define INT_PCA0 9 // PCA0 Peripheral +#define INT_COMP_FALLING 10 // Comparator0 Falling +#define INT_COMP_RISING 11 // Comparator0 Rising +#define INT_LIN 12 // LIN +#define INT_VREG_DROPOUT 13 // VREG dropout +#define INT_PORT_MATCH 14 // Port Match + +#endif diff --git a/device/include/mcs51/C8051T600.h b/device/include/mcs51/C8051T600.h new file mode 100644 index 0000000..2dd03c0 --- /dev/null +++ b/device/include/mcs51/C8051T600.h @@ -0,0 +1,282 @@ +/*------------------------------------------------------------------------- + Register Declarations for the SiLabs C8051T60x Processor Range + + Copyright (C) 2008 - Steven Borley, steven.borley@partnerelectronics.com + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051T600_H +#define C8051T600_H + +#include + + +/* BYTE Registers */ + +SFR( P0, 0x80 ) ; /* PORT 0 */ +SFR( SP, 0x81 ) ; /* STACK POINTER */ +SFR( DPL, 0x82 ) ; /* DATA POINTER - LOW BYTE */ +SFR( DPH, 0x83 ) ; /* DATA POINTER - HIGH BYTE */ +SFR( PCON, 0x87 ) ; /* POWER CONTROL */ +SFR( TCON, 0x88 ) ; /* TIMER CONTROL */ +SFR( TMOD, 0x89 ) ; /* TIMER MODE */ +SFR( TL0, 0x8A ) ; /* TIMER 0 - LOW BYTE */ +SFR( TL1, 0x8B ) ; /* TIMER 1 - LOW BYTE */ +SFR( TH0, 0x8C ) ; /* TIMER 0 - HIGH BYTE */ +SFR( TH1, 0x8D ) ; /* TIMER 1 - HIGH BYTE */ +SFR( CKCON, 0x8E ) ; /* CLOCK CONTROL */ +SFR( SCON, 0x98 ) ; /* SERIAL PORT CONTROL */ +SFR( SCON0, 0x98 ) ; /* SERIAL PORT CONTROL */ +SFR( SBUF, 0x99 ) ; /* SERIAL PORT BUFFER */ +SFR( SBUF0, 0x99 ) ; /* SERIAL PORT BUFFER */ +SFR( CPT0MD, 0x9D ) ; /* COMPARATOR 0 MODE SELECTION */ +SFR( CPT0MX, 0x9F ) ; /* COMPARATOR 0 MUX SELECTION */ +SFR( TOFFL, 0xA2 ) ; /* TEMPERATURE SENSOR OFFSET - LOW BYTE */ +SFR( TOFFH, 0xA3 ) ; /* TEMPERATURE SENSOR OFFSET - HIGH BYTE */ +SFR( P0MDOUT, 0xA4 ) ; /* PORT 0 OUTPUT MODE CONFIGURATION */ +SFR( IE, 0xA8 ) ; /* INTERRUPT ENABLE */ +SFR( OSCXCN, 0xB1 ) ; /* EXTERNAL OSCILLATOR CONTROL */ +SFR( OSCICN, 0xB2 ) ; /* INTERNAL OSCILLATOR CONTROL */ +SFR( OSCICL, 0xB3 ) ; /* INTERNAL OSCILLATOR CALIBRATION */ +SFR( IP, 0xB8 ) ; /* INTERRUPT PRIORITY */ +SFR( AMX0SL, 0xBB ) ; /* ADC 0 MUX CHANNEL SELECTION */ +SFR( ADC0CF, 0xBC ) ; /* ADC 0 CONFIGURATION */ +SFR( ADC0L, 0xBD ) ; /* ADC 0 DATA - LOW BYTE */ +SFR( ADC0H, 0xBE ) ; /* ADC 0 DATA - HIGH BYTE */ +SFR( SMB0CN, 0xC0 ) ; /* SMBUS CONTROL */ +SFR( SMB0CF, 0xC1 ) ; /* SMBUS CONFIGURATION */ +SFR( SMB0DAT, 0xC2 ) ; /* SMBUS DATA */ +SFR( ADC0GTL, 0xC3 ) ; /* ADC 0 GREATER-THAN REGISTER - LOW BYTE */ +SFR( ADC0GTH, 0xC4 ) ; /* ADC 0 GREATER-THAN REGISTER - HIGH BYTE */ +SFR( ADC0LTL, 0xC5 ) ; /* ADC 0 LESS-THAN REGISTER - LOW BYTE */ +SFR( ADC0LTH, 0xC6 ) ; /* ADC 0 LESS-THAN REGISTER - HIGH BYTE */ +SFR( REG0CN, 0xC7 ) ; /* Voltage Regulator Control */ +SFR( T2CON, 0xC8 ) ; /* TIMER 2 CONTROL */ +SFR( TMR2CN, 0xC8 ) ; /* TIMER 2 CONTROL */ +SFR( RCAP2L, 0xCA ) ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +SFR( TMR2RLL, 0xCA ) ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +SFR( RCAP2H, 0xCB ) ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +SFR( TMR2RLH, 0xCB ) ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +SFR( TL2, 0xCC ) ; /* TIMER 2 - LOW BYTE */ +SFR( TMR2L, 0xCC ) ; /* TIMER 2 - LOW BYTE */ +SFR( TH2, 0xCD ) ; /* TIMER 2 - HIGH BYTE */ +SFR( TMR2H, 0xCD ) ; /* TIMER 2 - HIGH BYTE */ +SFR( PSW, 0xD0 ) ; /* PROGRAM STATUS WORD */ +SFR( REF0CN, 0xD1 ) ; /* VOLTAGE REFERENCE 0 CONTROL */ +SFR( PCA0CN, 0xD8 ) ; /* PCA CONTROL */ +SFR( PCA0MD, 0xD9 ) ; /* PCA MODE */ +SFR( PCA0CPM0, 0xDA ) ; /* PCA MODULE 0 MODE REGISTER */ +SFR( PCA0CPM1, 0xDB ) ; /* PCA MODULE 1 MODE REGISTER */ +SFR( PCA0CPM2, 0xDC ) ; /* PCA MODULE 2 MODE REGISTER */ +SFR( ACC, 0xE0 ) ; /* ACCUMULATOR */ +SFR( PRT0MX, 0xE1 ) ; /* PORT MUX CONFIGURATION REGISTER 0 */ +SFR( XBR0, 0xE1 ) ; /* PORT MUX CONFIGURATION REGISTER 0 */ +SFR( PRT1MX, 0xE2 ) ; /* PORT MUX CONFIGURATION REGISTER 1 */ +SFR( XBR1, 0xE2 ) ; /* PORT MUX CONFIGURATION REGISTER 1 */ +SFR( PRT2MX, 0xE3 ) ; /* PORT MUX CONFIGURATION REGISTER 2 */ +SFR( XBR2, 0xE3 ) ; /* PORT MUX CONFIGURATION REGISTER 2 */ +SFR( IT01CF, 0xE4 ) ; /* INT0/INT1 CONFIGURATION REGISTER */ +SFR( INT01CF, 0xE4 ) ; /* INT0/INT1 CONFIGURATION REGISTER */ +SFR( EIE1, 0xE6 ) ; /* EXTERNAL INTERRUPT ENABLE 1 */ +SFR( ADC0CN, 0xE8 ) ; /* ADC 0 CONTROL */ +SFR( PCA0CPL1, 0xE9 ) ; /* PCA CAPTURE 1 LOW */ +SFR( PCA0CPH1, 0xEA ) ; /* PCA CAPTURE 1 HIGH */ +SFR( PCA0CPL2, 0xEB ) ; /* PCA CAPTURE 2 LOW */ +SFR( PCA0CPH2, 0xEC ) ; /* PCA CAPTURE 2 HIGH */ +SFR( RSTSRC, 0xEF ) ; /* RESET SOURCE */ +SFR( B, 0xF0 ) ; /* B REGISTER */ +SFR( P0MODE, 0xF1 ) ; /* PORT 0 INPUT MODE CONFIGURATION */ +SFR( P0MDIN, 0xF1 ) ; /* PORT 0 INPUT MODE CONFIGURATION */ +SFR( EIP1, 0xF6 ) ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +SFR( CPT0CN, 0xF8 ) ; /* COMPARATOR 0 CONTROL */ +SFR( PCA0L, 0xF9 ) ; /* PCA COUNTER LOW */ +SFR( PCA0H, 0xFA ) ; /* PCA COUNTER HIGH */ +SFR( PCA0CPL0, 0xFB ) ; /* PCA CAPTURE 0 LOW */ +SFR( PCA0CPH0, 0xFC ) ; /* PCA CAPTURE 0 HIGH */ + + +/* WORD/DWORD Registers */ + +SFR16E( TMR0, 0x8C8A ) ; /* TIMER 0 COUNTER */ +SFR16E( TMR1, 0x8D8B ) ; /* TIMER 1 COUNTER */ +SFR16E( TOFF, 0xA3A2 ) ; /* TEMPERATURE SENSOR OFFSET WORD */ +SFR16E( ADC0, 0xAEAD ) ; /* ADC0 DATA WORD */ +SFR16E( ADC0GT, 0xC4C3 ) ; /* ADC 0 GREATER-THAN REGISTER WORD */ +SFR16E( ADC0LT, 0xC6C5 ) ; /* ADC 0 LESS-THAN REGISTER WORD */ +SFR16E( TMR2, 0xCDCC ) ; /* TIMER 2 COUNTER */ +SFR16E( RCAP2, 0xCBCA ) ; /* TIMER 2 CAPTURE REGISTER WORD */ +SFR16E( TMR2RL, 0xCBCA ) ; /* TIMER 2 CAPTURE REGISTER WORD */ +SFR16E( PCA0, 0xFAF9 ) ; /* PCA COUNTER */ +SFR16E( PCA0CP0, 0xFCFB ) ; /* PCA CAPTURE 0 WORD */ +SFR16E( PCA0CP1, 0xEAE9 ) ; /* PCA CAPTURE 1 WORD */ +SFR16E( PCA0CP2, 0xECEB ) ; /* PCA CAPTURE 2 WORD */ + + +/* BIT Registers */ + +/* P0 0x80 */ +SBIT( P0_0, 0x80, 0 ) ; +SBIT( P0_1, 0x80, 1 ) ; +SBIT( P0_2, 0x80, 2 ) ; +SBIT( P0_3, 0x80, 3 ) ; +SBIT( P0_4, 0x80, 4 ) ; +SBIT( P0_5, 0x80, 5 ) ; +SBIT( P0_6, 0x80, 6 ) ; +SBIT( P0_7, 0x80, 7 ) ; + +/* TCON 0x88 */ +SBIT( IT0, 0x88, 0 ) ; /* TCON.0 - EXT. INTERRUPT 0 TYPE */ +SBIT( IE0, 0x88, 1 ) ; /* TCON.1 - EXT. INTERRUPT 0 EDGE FLAG */ +SBIT( IT1, 0x88, 2 ) ; /* TCON.2 - EXT. INTERRUPT 1 TYPE */ +SBIT( IE1, 0x88, 3 ) ; /* TCON.3 - EXT. INTERRUPT 1 EDGE FLAG */ +SBIT( TR0, 0x88, 4 ) ; /* TCON.4 - TIMER 0 ON/OFF CONTROL */ +SBIT( TF0, 0x88, 5 ) ; /* TCON.5 - TIMER 0 OVERFLOW FLAG */ +SBIT( TR1, 0x88, 6 ) ; /* TCON.6 - TIMER 1 ON/OFF CONTROL */ +SBIT( TF1, 0x88, 7 ) ; /* TCON.7 - TIMER 1 OVERFLOW FLAG */ + +/* SCON 0x98 */ +SBIT( RI, 0x98, 0 ) ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +SBIT( RI0, 0x98, 0 ) ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +SBIT( TI, 0x98, 1 ) ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +SBIT( TI0, 0x98, 1 ) ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +SBIT( RB8, 0x98, 2 ) ; /* SCON.2 - RECEIVE BIT 8 */ +SBIT( RB80, 0x98, 2 ) ; /* SCON.2 - RECEIVE BIT 8 */ +SBIT( TB8, 0x98, 3 ) ; /* SCON.3 - TRANSMIT BIT 8 */ +SBIT( TB80, 0x98, 3 ) ; /* SCON.3 - TRANSMIT BIT 8 */ +SBIT( REN, 0x98, 4 ) ; /* SCON.4 - RECEIVE ENABLE */ +SBIT( REN0, 0x98, 4 ) ; /* SCON.4 - RECEIVE ENABLE */ +SBIT( SM2, 0x98, 5 ) ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +SBIT( MCE0, 0x98, 5 ) ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +SBIT( SM0, 0x98, 7 ) ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ +SBIT( S0MODE, 0x98, 7 ) ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ + +/* IE 0xA8 */ +SBIT( EX0, 0xA8, 0 ) ; /* IE.0 - EXTERNAL INTERRUPT 0 ENABLE */ +SBIT( ET0, 0xA8, 1 ) ; /* IE.1 - TIMER 0 INTERRUPT ENABLE */ +SBIT( EX1, 0xA8, 2 ) ; /* IE.2 - EXTERNAL INTERRUPT 1 ENABLE */ +SBIT( ET1, 0xA8, 3 ) ; /* IE.3 - TIMER 1 INTERRUPT ENABLE */ +SBIT( ES, 0xA8, 4 ) ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +SBIT( ES0, 0xA8, 4 ) ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +SBIT( ET2, 0xA8, 5 ) ; /* IE.5 - TIMER 2 INTERRUPT ENABLE */ +SBIT( IEGF0, 0xA8, 6 ) ; /* IE.6 - GENERAL PURPOSE FLAG 0 */ +SBIT( EA, 0xA8, 7 ) ; /* IE.7 - GLOBAL INTERRUPT ENABLE */ + +/* IP 0xB8 */ +SBIT( PX0, 0xB8, 0 ) ; /* IP.0 - EXTERNAL INTERRUPT 0 PRIORITY */ +SBIT( PT0, 0xB8, 1 ) ; /* IP.1 - TIMER 0 PRIORITY */ +SBIT( PX1, 0xB8, 2 ) ; /* IP.2 - EXTERNAL INTERRUPT 1 PRIORITY */ +SBIT( PT1, 0xB8, 3 ) ; /* IP.3 - TIMER 1 PRIORITY */ +SBIT( PS, 0xB8, 4 ) ; /* IP.4 - SERIAL PORT PRIORITY */ +SBIT( PS0, 0xB8, 4 ) ; /* IP.4 - SERIAL PORT PRIORITY */ +SBIT( PT2, 0xB8, 5 ) ; /* IP.5 - TIMER 2 PRIORITY */ + +/* SMB0CN 0xC0 */ +SBIT( SI, 0xC0, 0 ) ; /* SMB0CN.0 - SMBUS 0 INTERRUPT PENDING FLAG */ +SBIT( ACK, 0xC0, 1 ) ; /* SMB0CN.1 - SMBUS 0 ACKNOWLEDGE FLAG */ +SBIT( ARBLOST, 0xC0, 2 ) ; /* SMB0CN.2 - SMBUS 0 ARBITRATION LOST INDICATOR */ +SBIT( ACKRQ, 0xC0, 3 ) ; /* SMB0CN.3 - SMBUS 0 ACKNOWLEDGE REQUEST */ +SBIT( STO, 0xC0, 4 ) ; /* SMB0CN.4 - SMBUS 0 STOP FLAG */ +SBIT( STA, 0xC0, 5 ) ; /* SMB0CN.5 - SMBUS 0 START FLAG */ +SBIT( TXMODE, 0xC0, 6 ) ; /* SMB0CN.6 - SMBUS 0 TRANSMIT MODE INDICATOR */ +SBIT( MASTER, 0xC0, 7 ) ; /* SMB0CN.7 - SMBUS 0 MASTER/SLAVE INDICATOR */ + +/* TMR2CN 0xC8 */ +SBIT( T2XCLK, 0xC8, 0 ) ; /* TMR2CN.0 - TIMER 2 EXTERNAL CLOCK SELECT */ +SBIT( TR2, 0xC8, 2 ) ; /* TMR2CN.2 - TIMER 2 ON/OFF CONTROL */ +SBIT( T2SPLIT, 0xC8, 3 ) ; /* TMR2CN.3 - TIMER 2 SPLIT MODE ENABLE */ +SBIT( TF2LEN, 0xC8, 5 ) ; /* TMR2CN.5 - TIMER 2 LOW BYTE INTERRUPT ENABLE */ +SBIT( TF2L, 0xC8, 6 ) ; /* TMR2CN.6 - TIMER 2 LOW BYTE OVERFLOW FLAG */ +SBIT( TF2, 0xC8, 7 ) ; /* TMR2CN.7 - TIMER 2 OVERFLOW FLAG */ +SBIT( TF2H, 0xC8, 7 ) ; /* TMR2CN.7 - TIMER 2 HIGH BYTE OVERFLOW FLAG */ + +/* PSW 0xD0 */ +SBIT( PARITY, 0xD0, 0 ) ; /* PSW.0 - ACCUMULATOR PARITY FLAG */ +SBIT( F1, 0xD0, 1 ) ; /* PSW.1 - FLAG 1 */ +SBIT( OV, 0xD0, 2 ) ; /* PSW.2 - OVERFLOW FLAG */ +SBIT( RS0, 0xD0, 3 ) ; /* PSW.3 - REGISTER BANK SELECT 0 */ +SBIT( RS1, 0xD0, 4 ) ; /* PSW.4 - REGISTER BANK SELECT 1 */ +SBIT( F0, 0xD0, 5 ) ; /* PSW.5 - FLAG 0 */ +SBIT( AC, 0xD0, 6 ) ; /* PSW.6 - AUXILIARY CARRY FLAG */ +SBIT( CY, 0xD0, 7 ) ; /* PSW.7 - CARRY FLAG */ + +/* PCA0CN 0xD8 */ +SBIT( CCF0, 0xD8, 0 ) ; /* PCA0CN.0 - PCA MODULE 0 CAPTURE/COMPARE FLAG */ +SBIT( CCF1, 0xD8, 1 ) ; /* PCA0CN.1 - PCA MODULE 1 CAPTURE/COMPARE FLAG */ +SBIT( CCF2, 0xD8, 2 ) ; /* PCA0CN.2 - PCA MODULE 2 CAPTURE/COMPARE FLAG */ +SBIT( CR, 0xD8, 6 ) ; /* PCA0CN.6 - PCA COUNTER/TIMER RUN CONTROL */ +SBIT( CF, 0xD8, 7 ) ; /* PCA0CN.7 - PCA COUNTER/TIMER OVERFLOW FLAG */ + +/* ADC0CN 0xE8 */ +SBIT( AD0CM0, 0xE8, 0 ) ; /* ADC0CN.0 - ADC 0 START OF CONV. MODE BIT 0 */ +SBIT( AD0CM1, 0xE8, 1 ) ; /* ADC0CN.1 - ADC 0 START OF CONV. MODE BIT 1 */ +SBIT( AD0CM2, 0xE8, 2 ) ; /* ADC0CN.2 - ADC 0 START OF CONV. MODE BIT 2 */ +SBIT( AD0WINT, 0xE8, 3 ) ; /* ADC0CN.3 - ADC 0 WINDOW COMPARE INT. FLAG */ +SBIT( AD0BUSY, 0xE8, 4 ) ; /* ADC0CN.4 - ADC 0 BUSY FLAG */ +SBIT( AD0INT, 0xE8, 5 ) ; /* ADC0CN.5 - ADC 0 CONV. COMPLETE INT. FLAG */ +SBIT( AD0TM, 0xE8, 6 ) ; /* ADC0CN.6 - ADC 0 TRACK MODE */ +SBIT( AD0EN, 0xE8, 7 ) ; /* ADC0CN.7 - ADC 0 ENABLE */ + +/* CPT0CN 0xF8 */ +SBIT( CP0HYN0, 0xF8, 0 ) ; /* CPT0CN.0 - Comp.0 Neg. Hysteresis Control Bit0*/ +SBIT( CP0HYN1, 0xF8, 1 ) ; /* CPT0CN.1 - Comp.0 Neg. Hysteresis Control Bit1*/ +SBIT( CP0HYP0, 0xF8, 2 ) ; /* CPT0CN.2 - Comp.0 Pos. Hysteresis Control Bit0*/ +SBIT( CP0HYP1, 0xF8, 3 ) ; /* CPT0CN.3 - Comp.0 Pos. Hysteresis Control Bit1*/ +SBIT( CP0FIF, 0xF8, 4 ) ; /* CPT0CN.4 - Comparator0 Falling-Edge Int. Flag */ +SBIT( CP0RIF, 0xF8, 5 ) ; /* CPT0CN.5 - Comparator0 Rising-Edge Int. Flag */ +SBIT( CP0OUT, 0xF8, 6 ) ; /* CPT0CN.6 - Comparator0 Output State Flag */ +SBIT( CP0EN, 0xF8, 7 ) ; /* CPT0CN.7 - Comparator0 Enable Bit */ + + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define T1M 0x10 /* CKCON */ +#define PSWE 0x01 /* PSCTL */ +#define PSEE 0x02 /* PSCTL */ +#define ECP0F 0x10 /* EIE1 */ +#define ECP0R 0x20 /* EIE1 */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define CP0E 0x10 /* XBR1 */ +#define CP0OEN 0x10 /* XBR1 */ +#define CP0AE 0x20 /* XBR1 */ +#define CP0AOEN 0x20 /* XBR1 */ + +/* Interrupts */ + +#define INT_EXT0 0 /* External Interrupt 0 */ +#define INT_TIMER0 1 /* Timer0 Overflow */ +#define INT_EXT1 2 /* External Interrupt 1 */ +#define INT_TIMER1 3 /* Timer1 Overflow */ +#define INT_UART0 4 /* Serial Port 0 */ +#define INT_TIMER2 5 /* Timer2 Overflow */ +#define INT_SMBUS0 6 /* SMBus0 Interface */ +#define INT_ADC0_WINDOW 7 /* ADC0 Window Comparison */ +#define INT_ADC0_EOC 8 /* ADC0 End Of Conversion */ +#define INT_PCA0 9 /* PCA0 Peripheral */ +#define INT_CP0F 10 /* Comparator0 falling edge */ +#define INT_CP0R 11 /* Comparator1 rising edge */ + +#endif diff --git a/device/include/mcs51/C8051T610.h b/device/include/mcs51/C8051T610.h new file mode 100644 index 0000000..ecd47b5 --- /dev/null +++ b/device/include/mcs51/C8051T610.h @@ -0,0 +1,356 @@ +/*------------------------------------------------------------------------- + Register Declarations for the SiLabs C8051T61x Processor Range + + Copyright (C) 2008 - Steven Borley, steven.borley@partnerelectronics.com + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051T610_H +#define C8051T610_H + +#include + +/* BYTE Registers */ + +SFR( P0, 0x80 ) ; /* PORT 0 */ +SFR( SP, 0x81 ) ; /* STACK POINTER */ +SFR( DPL, 0x82 ) ; /* DATA POINTER - LOW BYTE */ +SFR( DPH, 0x83 ) ; /* DATA POINTER - HIGH BYTE */ +SFR( TOFFL, 0x85 ) ; /* TEMPERATURE SENSOR OFFSET - LOW BYTE */ +SFR( TOFFH, 0x86 ) ; /* TEMPERATURE SENSOR OFFSET - HIGH BYTE */ +SFR( PCON, 0x87 ) ; /* POWER CONTROL */ +SFR( TCON, 0x88 ) ; /* TIMER CONTROL */ +SFR( TMOD, 0x89 ) ; /* TIMER MODE */ +SFR( TL0, 0x8A ) ; /* TIMER 0 - LOW BYTE */ +SFR( TL1, 0x8B ) ; /* TIMER 1 - LOW BYTE */ +SFR( TH0, 0x8C ) ; /* TIMER 0 - HIGH BYTE */ +SFR( TH1, 0x8D ) ; /* TIMER 1 - HIGH BYTE */ +SFR( CKCON, 0x8E ) ; /* CLOCK CONTROL */ +SFR( P1, 0x90 ) ; /* PORT 1 */ +SFR( TMR3CN, 0x91 ) ; /* TIMER 3 CONTROL */ +SFR( TMR3RLL, 0x92 ) ; /* TIMER 3 CAPTURE REGISTER - LOW BYTE */ +SFR( TMR3RLH, 0x93 ) ; /* TIMER 3 CAPTURE REGISTER - HIGH BYTE */ +SFR( TMR3L, 0x94 ) ; /* TIMER 3 - LOW BYTE */ +SFR( TMR3H, 0x95 ) ; /* TIMER 3 - HIGH BYTE */ +SFR( SCON, 0x98 ) ; /* SERIAL PORT CONTROL */ +SFR( SCON0, 0x98 ) ; /* SERIAL PORT CONTROL */ +SFR( SBUF, 0x99 ) ; /* SERIAL PORT BUFFER */ +SFR( SBUF0, 0x99 ) ; /* SERIAL PORT BUFFER */ +SFR( CPT1CN, 0x9A ) ; /* COMPARATOR 1 CONTROL */ +SFR( CPT0CN, 0x9B ) ; /* COMPARATOR 0 CONTROL */ +SFR( CPT1MD, 0x9C ) ; /* COMPARATOR 1 MODE SELECTION */ +SFR( CPT0MD, 0x9D ) ; /* COMPARATOR 0 MODE SELECTION */ +SFR( CPT1MX, 0x9E ) ; /* COMPARATOR 1 MUX SELECTION */ +SFR( CPT0MX, 0x9F ) ; /* COMPARATOR 0 MUX SELECTION */ +SFR( P2, 0xA0 ) ; /* PORT 2 */ +SFR( SPI0CFG, 0xA1 ) ; /* SPI0 CONFIGURATION */ +SFR( SPI0CKR, 0xA2 ) ; /* SPI0 CLOCK RATE CONTROL */ +SFR( SPI0DAT, 0xA3 ) ; /* SPI0 DATA */ +SFR( P0MDOUT, 0xA4 ) ; /* PORT 0 OUTPUT MODE CONFIGURATION */ +SFR( P1MDOUT, 0xA5 ) ; /* PORT 1 OUTPUT MODE CONFIGURATION */ +SFR( P2MDOUT, 0xA6 ) ; /* PORT 2 OUTPUT MODE CONFIGURATION */ +SFR( P3MDOUT, 0xA7 ) ; /* PORT 3 OUTPUT MODE CONFIGURATION */ +SFR( IE, 0xA8 ) ; /* INTERRUPT ENABLE */ +SFR( CLKSEL, 0xA9 ) ; /* SYSTEM CLOCK SELECT */ +SFR( EMI0CN, 0xAA ) ; /* EXTERNAL MEMORY INTERFACE CONTROL */ +SFR( _XPAGE, 0xAA ) ; /* XDATA/PDATA PAGE */ +SFR( P3, 0xB0 ) ; /* PORT 3 */ +SFR( OSCXCN, 0xB1 ) ; /* EXTERNAL OSCILLATOR CONTROL */ +SFR( OSCICN, 0xB2 ) ; /* INTERNAL OSCILLATOR CONTROL */ +SFR( OSCICL, 0xB3 ) ; /* INTERNAL OSCILLATOR CALIBRATION */ +SFR( IP, 0xB8 ) ; /* INTERRUPT PRIORITY */ +SFR( AMX0P, 0xBB ) ; /* ADC 0 MUX POSITIVE CHANNEL SELECTION */ +SFR( ADC0CF, 0xBC ) ; /* ADC 0 CONFIGURATION */ +SFR( ADC0L, 0xBD ) ; /* ADC 0 DATA WORD LSB */ +SFR( ADC0H, 0xBE ) ; /* ADC 0 DATA WORD MSB */ +SFR( SMB0CN, 0xC0 ) ; /* SMBUS CONTROL */ +SFR( SMB0CF, 0xC1 ) ; /* SMBUS CONFIGURATION */ +SFR( SMB0DAT, 0xC2 ) ; /* SMBUS DATA */ +SFR( ADC0GTL, 0xC3 ) ; /* ADC 0 GREATER-THAN LOW BYTE */ +SFR( ADC0GTH, 0xC4 ) ; /* ADC 0 GREATER-THAN HIGH BYTE */ +SFR( ADC0LTL, 0xC5 ) ; /* ADC 0 LESS-THAN LOW BYTE */ +SFR( ADC0LTH, 0xC6 ) ; /* ADC 0 LESS-THAN HIGH BYTE */ +SFR( REG0CN, 0xC7 ) ; /* Voltage Regulator Control */ +SFR( T2CON, 0xC8 ) ; /* TIMER 2 CONTROL */ +SFR( TMR2CN, 0xC8 ) ; /* TIMER 2 CONTROL */ +SFR( RCAP2L, 0xCA ) ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +SFR( TMR2RLL, 0xCA ) ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +SFR( RCAP2H, 0xCB ) ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +SFR( TMR2RLH, 0xCB ) ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +SFR( TL2, 0xCC ) ; /* TIMER 2 - LOW BYTE */ +SFR( TMR2L, 0xCC ) ; /* TIMER 2 - LOW BYTE */ +SFR( TH2, 0xCD ) ; /* TIMER 2 - HIGH BYTE */ +SFR( TMR2H, 0xCD ) ; /* TIMER 2 - HIGH BYTE */ +SFR( PSW, 0xD0 ) ; /* PROGRAM STATUS WORD */ +SFR( REF0CN, 0xD1 ) ; /* VOLTAGE REFERENCE 0 CONTROL */ +SFR( P0SKIP, 0xD4 ) ; /* PORT 0 SKIP */ +SFR( P1SKIP, 0xD5 ) ; /* PORT 1 SKIP */ +SFR( P2SKIP, 0xD6 ) ; /* PORT 2 SKIP */ +SFR( PCA0CN, 0xD8 ) ; /* PCA CONTROL */ +SFR( PCA0MD, 0xD9 ) ; /* PCA MODE */ +SFR( PCA0CPM0, 0xDA ) ; /* PCA MODULE 0 MODE REGISTER */ +SFR( PCA0CPM1, 0xDB ) ; /* PCA MODULE 1 MODE REGISTER */ +SFR( PCA0CPM2, 0xDC ) ; /* PCA MODULE 2 MODE REGISTER */ +SFR( PCA0CPM3, 0xDD ) ; /* PCA MODULE 3 MODE REGISTER */ +SFR( PCA0CPM4, 0xDE ) ; /* PCA MODULE 4 MODE REGISTER */ +SFR( ACC, 0xE0 ) ; /* ACCUMULATOR */ +SFR( XBR0, 0xE1 ) ; /* PORT MUX CONFIGURATION REGISTER 0 */ +SFR( XBR1, 0xE2 ) ; /* PORT MUX CONFIGURATION REGISTER 1 */ +SFR( IT01CF, 0xE4 ) ; /* INT0/INT1 CONFIGURATION REGISTER */ +SFR( INT01CF, 0xE4 ) ; /* INT0/INT1 CONFIGURATION REGISTER */ +SFR( EIE1, 0xE6 ) ; /* EXTERNAL INTERRUPT ENABLE 1 */ +SFR( ADC0CN, 0xE8 ) ; /* ADC 0 CONTROL */ +SFR( PCA0CPL1, 0xE9 ) ; /* PCA CAPTURE 1 LOW */ +SFR( PCA0CPH1, 0xEA ) ; /* PCA CAPTURE 1 HIGH */ +SFR( PCA0CPL2, 0xEB ) ; /* PCA CAPTURE 2 LOW */ +SFR( PCA0CPH2, 0xEC ) ; /* PCA CAPTURE 2 HIGH */ +SFR( PCA0CPL3, 0xED ) ; /* PCA CAPTURE 3 LOW */ +SFR( PCA0CPH3, 0xEE ) ; /* PCA CAPTURE 3 HIGH */ +SFR( RSTSRC, 0xEF ) ; /* RESET SOURCE */ +SFR( B, 0xF0 ) ; /* B REGISTER */ +SFR( P0MODE, 0xF1 ) ; /* PORT 0 INPUT MODE CONFIGURATION */ +SFR( P0MDIN, 0xF1 ) ; /* PORT 0 INPUT MODE CONFIGURATION */ +SFR( P1MODE, 0xF2 ) ; /* PORT 1 INPUT MODE CONFIGURATION */ +SFR( P1MDIN, 0xF2 ) ; /* PORT 1 INPUT MODE CONFIGURATION */ +SFR( P2MODE, 0xF3 ) ; /* PORT 2 INPUT MODE CONFIGURATION */ +SFR( P2MDIN, 0xF3 ) ; /* PORT 2 INPUT MODE CONFIGURATION */ +SFR( P3MODE, 0xF4 ) ; /* PORT 3 INPUT MODE CONFIGURATION */ +SFR( P3MDIN, 0xF4 ) ; /* PORT 3 INPUT MODE CONFIGURATION */ +SFR( EIP1, 0xF6 ) ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +SFR( SPI0CN, 0xF8 ) ; /* SPI0 CONTROL */ +SFR( PCA0L, 0xF9 ) ; /* PCA COUNTER LOW */ +SFR( PCA0H, 0xFA ) ; /* PCA COUNTER HIGH */ +SFR( PCA0CPL0, 0xFB ) ; /* PCA CAPTURE 0 LOW */ +SFR( PCA0CPH0, 0xFC ) ; /* PCA CAPTURE 0 HIGH */ +SFR( PCA0CPL4, 0xFD ) ; /* PCA CAPTURE 4 LOW */ +SFR( PCA0CPH4, 0xFE ) ; /* PCA CAPTURE 4 HIGH */ +SFR( VDM0CN, 0xFF ) ; /* VDD MONITOR CONTROL */ + + +/* WORD/DWORD Registers */ + +SFR16E( TOFF, 0x8685 ) ; /* TEMPERATURE SENSOR OFFSET WORD */ +SFR16E( TMR0, 0x8C8A ) ; /* TIMER 0 COUNTER */ +SFR16E( TMR1, 0x8D8B ) ; /* TIMER 1 COUNTER */ +SFR16E( TMR2, 0xCDCC ) ; /* TIMER 2 COUNTER */ +SFR16E( RCAP2, 0xCBCA ) ; /* TIMER 2 CAPTURE REGISTER WORD */ +SFR16E( TMR2RL, 0xCBCA ) ; /* TIMER 2 CAPTURE REGISTER WORD */ +SFR16E( TMR3, 0x9594 ) ; /* TIMER 3 COUNTER */ +SFR16E( TMR3RL, 0x9392 ) ; /* TIMER 3 CAPTURE REGISTER WORD */ +SFR16E( ADC0, 0xBEBD ) ; /* ADC 0 DATA WORD */ +SFR16E( ADC0GT, 0xC4C3 ) ; /* ADC 0 GREATER-THAN REGISTER WORD */ +SFR16E( ADC0LT, 0xC6C5 ) ; /* ADC 0 LESS-THAN REGISTER WORD */ +SFR16E( PCA0, 0xFAF9 ) ; /* PCA COUNTER */ +SFR16E( PCA0CP0, 0xFCFB ) ; /* PCA CAPTURE 0 WORD */ +SFR16E( PCA0CP1, 0xEAE9 ) ; /* PCA CAPTURE 1 WORD */ +SFR16E( PCA0CP2, 0xECEB ) ; /* PCA CAPTURE 2 WORD */ +SFR16E( PCA0CP3, 0xEEED ) ; /* PCA CAPTURE 3 WORD */ +SFR16E( PCA0CP4, 0xFEFD ) ; /* PCA CAPTURE 4 WORD */ + + +/* BIT Registers */ + +/* P0 0x80 */ +SBIT( P0_0, 0x80, 0 ) ; +SBIT( P0_1, 0x80, 1 ) ; +SBIT( P0_2, 0x80, 2 ) ; +SBIT( P0_3, 0x80, 3 ) ; +SBIT( P0_4, 0x80, 4 ) ; +SBIT( P0_5, 0x80, 5 ) ; +SBIT( P0_6, 0x80, 6 ) ; +SBIT( P0_7, 0x80, 7 ) ; + +/* TCON 0x88 */ +SBIT( IT0, 0x88, 0 ) ; /* TCON.0 - EXT. INTERRUPT 0 TYPE */ +SBIT( IE0, 0x88, 1 ) ; /* TCON.1 - EXT. INTERRUPT 0 EDGE FLAG */ +SBIT( IT1, 0x88, 2 ) ; /* TCON.2 - EXT. INTERRUPT 1 TYPE */ +SBIT( IE1, 0x88, 3 ) ; /* TCON.3 - EXT. INTERRUPT 1 EDGE FLAG */ +SBIT( TR0, 0x88, 4 ) ; /* TCON.4 - TIMER 0 ON/OFF CONTROL */ +SBIT( TF0, 0x88, 5 ) ; /* TCON.5 - TIMER 0 OVERFLOW FLAG */ +SBIT( TR1, 0x88, 6 ) ; /* TCON.6 - TIMER 1 ON/OFF CONTROL */ +SBIT( TF1, 0x88, 7 ) ; /* TCON.7 - TIMER 1 OVERFLOW FLAG */ + +/* P1 0x90 */ +SBIT( P1_0, 0x90, 0 ) ; +SBIT( P1_1, 0x90, 1 ) ; +SBIT( P1_2, 0x90, 2 ) ; +SBIT( P1_3, 0x90, 3 ) ; +SBIT( P1_4, 0x90, 4 ) ; +SBIT( P1_5, 0x90, 5 ) ; +SBIT( P1_6, 0x90, 6 ) ; +SBIT( P1_7, 0x90, 7 ) ; + +/* SCON 0x98 */ +SBIT( RI, 0x98, 0 ) ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +SBIT( RI0, 0x98, 0 ) ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +SBIT( TI, 0x98, 1 ) ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +SBIT( TI0, 0x98, 1 ) ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +SBIT( RB8, 0x98, 2 ) ; /* SCON.2 - RECEIVE BIT 8 */ +SBIT( RB80, 0x98, 2 ) ; /* SCON.2 - RECEIVE BIT 8 */ +SBIT( TB8, 0x98, 3 ) ; /* SCON.3 - TRANSMIT BIT 8 */ +SBIT( TB80, 0x98, 3 ) ; /* SCON.3 - TRANSMIT BIT 8 */ +SBIT( REN, 0x98, 4 ) ; /* SCON.4 - RECEIVE ENABLE */ +SBIT( REN0, 0x98, 4 ) ; /* SCON.4 - RECEIVE ENABLE */ +SBIT( SM2, 0x98, 5 ) ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +SBIT( MCE0, 0x98, 5 ) ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +SBIT( SM0, 0x98, 7 ) ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ +SBIT( S0MODE, 0x98, 7 ) ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ + +/* P2 0xA0 */ +SBIT( P2_0, 0xA0, 0 ) ; +SBIT( P2_1, 0xA0, 1 ) ; +SBIT( P2_2, 0xA0, 2 ) ; +SBIT( P2_3, 0xA0, 3 ) ; +SBIT( P2_4, 0xA0, 4 ) ; +SBIT( P2_5, 0xA0, 5 ) ; +SBIT( P2_6, 0xA0, 6 ) ; +SBIT( P2_7, 0xA0, 7 ) ; + +/* IE 0xA8 */ +SBIT( EX0, 0xA8, 0 ) ; /* IE.0 - EXTERNAL INTERRUPT 0 ENABLE */ +SBIT( ET0, 0xA8, 1 ) ; /* IE.1 - TIMER 0 INTERRUPT ENABLE */ +SBIT( EX1, 0xA8, 2 ) ; /* IE.2 - EXTERNAL INTERRUPT 1 ENABLE */ +SBIT( ET1, 0xA8, 3 ) ; /* IE.3 - TIMER 1 INTERRUPT ENABLE */ +SBIT( ES, 0xA8, 4 ) ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +SBIT( ES0, 0xA8, 4 ) ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +SBIT( ET2, 0xA8, 5 ) ; /* IE.5 - TIMER 2 INTERRUPT ENABLE */ +SBIT( ESPI0, 0xA8, 6 ) ; /* IE.6 - SPI0 INTERRUPT ENABLE */ +SBIT( EA, 0xA8, 7 ) ; /* IE.7 - GLOBAL INTERRUPT ENABLE */ + +/* P3 0xB0 */ +SBIT( P3_0, 0xB0, 0 ) ; +SBIT( P3_1, 0xB0, 1 ) ; +SBIT( P3_2, 0xB0, 2 ) ; +SBIT( P3_3, 0xB0, 3 ) ; +SBIT( P3_4, 0xB0, 4 ) ; +SBIT( P3_5, 0xB0, 5 ) ; +SBIT( P3_6, 0xB0, 6 ) ; +SBIT( P3_7, 0xB0, 7 ) ; + +/* IP 0xB8 */ +SBIT( PX0, 0xB8, 0 ) ; /* IP.0 - EXTERNAL INTERRUPT 0 PRIORITY */ +SBIT( PT0, 0xB8, 1 ) ; /* IP.1 - TIMER 0 PRIORITY */ +SBIT( PX1, 0xB8, 2 ) ; /* IP.2 - EXTERNAL INTERRUPT 1 PRIORITY */ +SBIT( PT1, 0xB8, 3 ) ; /* IP.3 - TIMER 1 PRIORITY */ +SBIT( PS, 0xB8, 4 ) ; /* IP.4 - SERIAL PORT PRIORITY */ +SBIT( PS0, 0xB8, 4 ) ; /* IP.4 - SERIAL PORT PRIORITY */ +SBIT( PT2, 0xB8, 5 ) ; /* IP.5 - TIMER 2 PRIORITY */ +SBIT( PSPI0, 0xB8, 6 ) ; /* IP.6 - SPI0 PRIORITY */ + +/* SMB0CN 0xC0 */ +SBIT( SI, 0xC0, 0 ) ; /* SMB0CN.0 - SMBUS 0 INTERRUPT PENDING FLAG */ +SBIT( ACK, 0xC0, 1 ) ; /* SMB0CN.1 - SMBUS 0 ACKNOWLEDGE FLAG */ +SBIT( ARBLOST, 0xC0, 2 ) ; /* SMB0CN.2 - SMBUS 0 ARBITRATION LOST INDICATOR */ +SBIT( ACKRQ, 0xC0, 3 ) ; /* SMB0CN.3 - SMBUS 0 ACKNOWLEDGE REQUEST */ +SBIT( STO, 0xC0, 4 ) ; /* SMB0CN.4 - SMBUS 0 STOP FLAG */ +SBIT( STA, 0xC0, 5 ) ; /* SMB0CN.5 - SMBUS 0 START FLAG */ +SBIT( TXMODE, 0xC0, 6 ) ; /* SMB0CN.6 - SMBUS 0 TRANSMIT MODE INDICATOR */ +SBIT( MASTER, 0xC0, 7 ) ; /* SMB0CN.7 - SMBUS 0 MASTER/SLAVE INDICATOR */ + +/* TMR2CN 0xC8 */ +SBIT( T2XCLK, 0xC8, 0 ) ; /* TMR2CN.0 - TIMER 2 EXTERNAL CLOCK SELECT */ +SBIT( TR2, 0xC8, 2 ) ; /* TMR2CN.2 - TIMER 2 ON/OFF CONTROL */ +SBIT( T2SPLIT, 0xC8, 3 ) ; /* TMR2CN.3 - TIMER 2 SPLIT MODE ENABLE */ +SBIT( TF2LEN, 0xC8, 5 ) ; /* TMR2CN.5 - TIMER 2 LOW BYTE INTERRUPT ENABLE */ +SBIT( TF2L, 0xC8, 6 ) ; /* TMR2CN.6 - TIMER 2 LOW BYTE OVERFLOW FLAG */ +SBIT( TF2, 0xC8, 7 ) ; /* TMR2CN.7 - TIMER 2 OVERFLOW FLAG */ +SBIT( TF2H, 0xC8, 7 ) ; /* TMR2CN.7 - TIMER 2 HIGH BYTE OVERFLOW FLAG */ + +/* PSW 0xD0 */ +SBIT( PARITY, 0xD0, 0 ) ; /* PSW.0 - ACCUMULATOR PARITY FLAG */ +SBIT( F1, 0xD0, 1 ) ; /* PSW.1 - FLAG 1 */ +SBIT( OV, 0xD0, 2 ) ; /* PSW.2 - OVERFLOW FLAG */ +SBIT( RS0, 0xD0, 3 ) ; /* PSW.3 - REGISTER BANK SELECT 0 */ +SBIT( RS1, 0xD0, 4 ) ; /* PSW.4 - REGISTER BANK SELECT 1 */ +SBIT( F0, 0xD0, 5 ) ; /* PSW.5 - FLAG 0 */ +SBIT( AC, 0xD0, 6 ) ; /* PSW.6 - AUXILIARY CARRY FLAG */ +SBIT( CY, 0xD0, 7 ) ; /* PSW.7 - CARRY FLAG */ + +/* PCA0CN 0xD8 */ +SBIT( CCF0, 0xD8, 0 ) ; /* PCA0CN.0 - PCA MODULE 0 CAPTURE/COMPARE FLAG */ +SBIT( CCF1, 0xD8, 1 ) ; /* PCA0CN.1 - PCA MODULE 1 CAPTURE/COMPARE FLAG */ +SBIT( CCF2, 0xD8, 2 ) ; /* PCA0CN.2 - PCA MODULE 2 CAPTURE/COMPARE FLAG */ +SBIT( CCF3, 0xD8, 3 ) ; /* PCA0CN.3 - PCA MODULE 3 CAPTURE/COMPARE FLAG */ +SBIT( CCF4, 0xD8, 4 ) ; /* PCA0CN.4 - PCA MODULE 4 CAPTURE/COMPARE FLAG */ +SBIT( CR, 0xD8, 6 ) ; /* PCA0CN.6 - PCA COUNTER/TIMER RUN CONTROL */ +SBIT( CF, 0xD8, 7 ) ; /* PCA0CN.7 - PCA COUNTER/TIMER OVERFLOW FLAG */ + +/* ADC0CN 0xE8 */ +SBIT( AD0CM0, 0xE8, 0 ) ; /* ADC0CN.0 - ADC 0 START OF CONV. MODE BIT 0 */ +SBIT( AD0CM1, 0xE8, 1 ) ; /* ADC0CN.1 - ADC 0 START OF CONV. MODE BIT 1 */ +SBIT( AD0CM2, 0xE8, 2 ) ; /* ADC0CN.2 - ADC 0 START OF CONV. MODE BIT 2 */ +SBIT( AD0WINT, 0xE8, 3 ) ; /* ADC0CN.3 - ADC 0 WINDOW COMPARE INT. FLAG */ +SBIT( AD0BUSY, 0xE8, 4 ) ; /* ADC0CN.4 - ADC 0 BUSY FLAG */ +SBIT( AD0INT, 0xE8, 5 ) ; /* ADC0CN.5 - ADC 0 CONV. COMPLETE INT. FLAG */ +SBIT( AD0TM, 0xE8, 6 ) ; /* ADC0CN.6 - ADC 0 TRACK MODE */ +SBIT( AD0EN, 0xE8, 7 ) ; /* ADC0CN.7 - ADC 0 ENABLE */ + +/* SPI0CN 0xF8 */ +SBIT( SPIEN, 0xF8, 0 ) ; /* SPI0CN.0 - SPI0 ENABLE */ +SBIT( TXBMT, 0xF8, 1 ) ; /* SPI0CN.1 - TRANSMIT BUFFER EMPTY */ +SBIT( NSSMD0, 0xF8, 2 ) ; /* SPI0CN.2 - SLAVE SELECT MODE BIT 0 */ +SBIT( NSSMD1, 0xF8, 3 ) ; /* SPI0CN.3 - SLAVE SELECT MODE BIT 1 */ +SBIT( RXOVRN, 0xF8, 4 ) ; /* SPI0CN.4 - RECEIVE OVERRUN FLAG */ +SBIT( MODF, 0xF8, 5 ) ; /* SPI0CN.5 - MODE FAULT FLAG */ +SBIT( WCOL, 0xF8, 6 ) ; /* SPI0CN.6 - WRITE COLLISION FLAG */ +SBIT( SPIF, 0xF8, 7 ) ; /* SPI0CN.7 - SPI0 INTERRUPT FLAG */ + + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define T1M 0x08 /* CKCON */ +#define PSWE 0x01 /* PSCTL */ +#define PSEE 0x02 /* PSCTL */ +#define ECP0 0x20 /* EIE1 */ +#define ECP1 0x40 /* EIE1 */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define CP0E 0x10 /* XBR0 */ +#define CP0OEN 0x10 /* XBR0 */ +#define CP0AE 0x20 /* XBR0 */ +#define CP0AOEN 0x20 /* XBR0 */ +#define CP1E 0x40 /* XBR0 */ +#define CP1AE 0x80 /* XBR0 */ + +/* Interrupts */ + +#define INT_EXT0 0 /* External Interrupt 0 */ +#define INT_TIMER0 1 /* Timer0 Overflow */ +#define INT_EXT1 2 /* External Interrupt 1 */ +#define INT_TIMER1 3 /* Timer1 Overflow */ +#define INT_UART0 4 /* Serial Port 0 */ +#define INT_TIMER2 5 /* Timer2 Overflow */ +#define INT_SPI0 6 /* Serial Peripheral Interface 0 */ +#define INT_SMBUS0 7 /* SMBus0 Interface */ +/* 8 Reserved */ +#define INT_ADC0_WINDOW 9 /* ADC0 Window Comparison */ +#define INT_ADC0_EOC 10 /* ADC0 End Of Conversion */ +#define INT_PCA0 11 /* PCA0 Peripheral */ +#define INT_COMPARATOR0 12 /* Comparator0 */ +#define INT_COMPARATOR1 13 /* Comparator1 */ +#define INT_TIMER3 14 /* Timer3 Overflow */ + +#endif diff --git a/device/include/mcs51/C8051T630.h b/device/include/mcs51/C8051T630.h new file mode 100644 index 0000000..fc330d5 --- /dev/null +++ b/device/include/mcs51/C8051T630.h @@ -0,0 +1,337 @@ +/*------------------------------------------------------------------------- + Register Declarations for the SiLabs C8051T63x Processor Range + + Copyright (C) 2008 - Steven Borley, steven.borley@partnerelectronics.com + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef C8051T630_H +#define C8051T630_H + +#include + +/* BYTE Registers */ + +SFR( P0, 0x80 ) ; /* PORT 0 */ +SFR( SP, 0x81 ) ; /* STACK POINTER */ +SFR( DPL, 0x82 ) ; /* DATA POINTER - LOW BYTE */ +SFR( DPH, 0x83 ) ; /* DATA POINTER - HIGH BYTE */ +SFR( TOFFL, 0x85 ) ; /* TEMPERATURE SENSOR OFFSET - LOW BYTE */ +SFR( TOFFH, 0x86 ) ; /* TEMPERATURE SENSOR OFFSET - HIGH BYTE */ +SFR( PCON, 0x87 ) ; /* POWER CONTROL */ +SFR( TCON, 0x88 ) ; /* TIMER CONTROL */ +SFR( TMOD, 0x89 ) ; /* TIMER MODE */ +SFR( TL0, 0x8A ) ; /* TIMER 0 - LOW BYTE */ +SFR( TL1, 0x8B ) ; /* TIMER 1 - LOW BYTE */ +SFR( TH0, 0x8C ) ; /* TIMER 0 - HIGH BYTE */ +SFR( TH1, 0x8D ) ; /* TIMER 1 - HIGH BYTE */ +SFR( CKCON, 0x8E ) ; /* CLOCK CONTROL */ +SFR( PSCTL, 0x8F ) ; /* PROGRAM STORE R/W CONTROL */ +SFR( P1, 0x90 ) ; /* PORT 1 */ +SFR( TMR3CN, 0x91 ) ; /* TIMER 3 CONTROL */ +SFR( TMR3RLL, 0x92 ) ; /* TIMER 3 CAPTURE REGISTER - LOW BYTE */ +SFR( TMR3RLH, 0x93 ) ; /* TIMER 3 CAPTURE REGISTER - HIGH BYTE */ +SFR( TMR3L, 0x94 ) ; /* TIMER 3 - LOW BYTE */ +SFR( TMR3H, 0x95 ) ; /* TIMER 3 - HIGH BYTE */ +SFR( IDA0L, 0x96 ) ; /* CURRENT MODE DAC 0 - LOW BYTE */ +SFR( IDA0H, 0x97 ) ; /* CURRENT MODE DAC 0 - HIGH BYTE */ +SFR( SCON, 0x98 ) ; /* SERIAL PORT CONTROL */ +SFR( SCON0, 0x98 ) ; /* SERIAL PORT CONTROL */ +SFR( SBUF, 0x99 ) ; /* SERIAL PORT BUFFER */ +SFR( SBUF0, 0x99 ) ; /* SERIAL PORT BUFFER */ +SFR( CPT0CN, 0x9B ) ; /* COMPARATOR 0 CONTROL */ +SFR( CPT0MD, 0x9D ) ; /* COMPARATOR 0 MODE SELECTION */ +SFR( CPT0MX, 0x9F ) ; /* COMPARATOR 0 MUX SELECTION */ +SFR( P2, 0xA0 ) ; /* PORT 2 */ +SFR( SPI0CFG, 0xA1 ) ; /* SPI0 CONFIGURATION */ +SFR( SPI0CKR, 0xA2 ) ; /* SPI0 CLOCK RATE CONTROL */ +SFR( SPI0DAT, 0xA3 ) ; /* SPI0 DATA */ +SFR( P0MDOUT, 0xA4 ) ; /* PORT 0 OUTPUT MODE CONFIGURATION */ +SFR( P1MDOUT, 0xA5 ) ; /* PORT 1 OUTPUT MODE CONFIGURATION */ +SFR( P2MDOUT, 0xA6 ) ; /* PORT 2 OUTPUT MODE CONFIGURATION */ +SFR( IE, 0xA8 ) ; /* INTERRUPT ENABLE */ +SFR( CLKSEL, 0xA9 ) ; /* SYSTEM CLOCK SELECT */ +SFR( EMI0CN, 0xAA ) ; /* EXTERNAL MEMORY INTERFACE CONTROL */ +SFR( _XPAGE, 0xAA ) ; /* XDATA/PDATA PAGE */ +SFR( OSCXCN, 0xB1 ) ; /* EXTERNAL OSCILLATOR CONTROL */ +SFR( OSCICN, 0xB2 ) ; /* INTERNAL OSCILLATOR CONTROL */ +SFR( OSCICL, 0xB3 ) ; /* INTERNAL OSCILLATOR CALIBRATION */ +SFR( IP, 0xB8 ) ; /* INTERRUPT PRIORITY */ +SFR( IDA0CN, 0xB9 ) ; /* CURRENT MODE DAC 0 - CONTROL */ +SFR( AMX0P, 0xBB ) ; /* ADC 0 MUX POSITIVE CHANNEL SELECTION */ +SFR( ADC0CF, 0xBC ) ; /* ADC 0 CONFIGURATION */ +SFR( ADC0L, 0xBD ) ; /* ADC 0 DATA WORD LSB */ +SFR( ADC0H, 0xBE ) ; /* ADC 0 DATA WORD MSB */ +SFR( SMB0CN, 0xC0 ) ; /* SMBUS CONTROL */ +SFR( SMB0CF, 0xC1 ) ; /* SMBUS CONFIGURATION */ +SFR( SMB0DAT, 0xC2 ) ; /* SMBUS DATA */ +SFR( ADC0GTL, 0xC3 ) ; /* ADC 0 GREATER-THAN LOW BYTE */ +SFR( ADC0GTH, 0xC4 ) ; /* ADC 0 GREATER-THAN HIGH BYTE */ +SFR( ADC0LTL, 0xC5 ) ; /* ADC 0 LESS-THAN LOW BYTE */ +SFR( ADC0LTH, 0xC6 ) ; /* ADC 0 LESS-THAN HIGH BYTE */ +SFR( REG0CN, 0xC7 ) ; /* Voltage Regulator Control */ +SFR( T2CON, 0xC8 ) ; /* TIMER 2 CONTROL */ +SFR( TMR2CN, 0xC8 ) ; /* TIMER 2 CONTROL */ +SFR( RCAP2L, 0xCA ) ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +SFR( TMR2RLL, 0xCA ) ; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */ +SFR( RCAP2H, 0xCB ) ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +SFR( TMR2RLH, 0xCB ) ; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */ +SFR( TL2, 0xCC ) ; /* TIMER 2 - LOW BYTE */ +SFR( TMR2L, 0xCC ) ; /* TIMER 2 - LOW BYTE */ +SFR( TH2, 0xCD ) ; /* TIMER 2 - HIGH BYTE */ +SFR( TMR2H, 0xCD ) ; /* TIMER 2 - HIGH BYTE */ +SFR( PSW, 0xD0 ) ; /* PROGRAM STATUS WORD */ +SFR( REF0CN, 0xD1 ) ; /* VOLTAGE REFERENCE 0 CONTROL */ +SFR( P0SKIP, 0xD4 ) ; /* PORT 0 SKIP */ +SFR( P1SKIP, 0xD5 ) ; /* PORT 1 SKIP */ +SFR( SMB0ADR, 0xD7 ) ; /* SMBUS SLAVE ADDRESS */ +SFR( PCA0CN, 0xD8 ) ; /* PCA CONTROL */ +SFR( PCA0MD, 0xD9 ) ; /* PCA MODE */ +SFR( PCA0CPM0, 0xDA ) ; /* PCA MODULE 0 MODE REGISTER */ +SFR( PCA0CPM1, 0xDB ) ; /* PCA MODULE 1 MODE REGISTER */ +SFR( PCA0CPM2, 0xDC ) ; /* PCA MODULE 2 MODE REGISTER */ +SFR( ACC, 0xE0 ) ; /* ACCUMULATOR */ +SFR( XBR0, 0xE1 ) ; /* PORT MUX CONFIGURATION REGISTER 0 */ +SFR( XBR1, 0xE2 ) ; /* PORT MUX CONFIGURATION REGISTER 1 */ +SFR( OSCLCN, 0xE3 ) ; /* LOW-FREQUENCY OSCILLATOR CONTROL */ +SFR( IT01CF, 0xE4 ) ; /* INT0/INT1 CONFIGURATION REGISTER */ +SFR( INT01CF, 0xE4 ) ; /* INT0/INT1 CONFIGURATION REGISTER */ +SFR( EIE1, 0xE6 ) ; /* EXTERNAL INTERRUPT ENABLE 1 */ +SFR( SMB0ADM, 0xE7 ) ; /* SMBUS SLAVE ADDRESS MASK */ +SFR( ADC0CN, 0xE8 ) ; /* ADC 0 CONTROL */ +SFR( PCA0CPL1, 0xE9 ) ; /* PCA CAPTURE 1 LOW */ +SFR( PCA0CPH1, 0xEA ) ; /* PCA CAPTURE 1 HIGH */ +SFR( PCA0CPL2, 0xEB ) ; /* PCA CAPTURE 2 LOW */ +SFR( PCA0CPH2, 0xEC ) ; /* PCA CAPTURE 2 HIGH */ +SFR( P1MAT, 0xED ) ; /* PORT 1 MATCH REGISTER */ +SFR( P1MASK, 0xEE ) ; /* PORT 1 MASK REGISTER */ +SFR( RSTSRC, 0xEF ) ; /* RESET SOURCE */ +SFR( B, 0xF0 ) ; /* B REGISTER */ +SFR( P0MODE, 0xF1 ) ; /* PORT 0 INPUT MODE CONFIGURATION */ +SFR( P0MDIN, 0xF1 ) ; /* PORT 0 INPUT MODE CONFIGURATION */ +SFR( P1MODE, 0xF2 ) ; /* PORT 1 INPUT MODE CONFIGURATION */ +SFR( P1MDIN, 0xF2 ) ; /* PORT 1 INPUT MODE CONFIGURATION */ +SFR( EIP1, 0xF6 ) ; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */ +SFR( PCA0PWM, 0xF7 ) ; /* PCA PWM CONFIGURATION */ +SFR( SPI0CN, 0xF8 ) ; /* SPI0 CONTROL */ +SFR( PCA0L, 0xF9 ) ; /* PCA COUNTER LOW */ +SFR( PCA0H, 0xFA ) ; /* PCA COUNTER HIGH */ +SFR( PCA0CPL0, 0xFB ) ; /* PCA CAPTURE 0 LOW */ +SFR( PCA0CPH0, 0xFC ) ; /* PCA CAPTURE 0 HIGH */ +SFR( P0MAT, 0xFD ) ; /* PORT 0 MATCH REGISTER */ +SFR( P0MASK, 0xFE ) ; /* PORT 0 MASK REGISTER */ +SFR( VDM0CN, 0xFF ) ; /* VDD MONITOR CONTROL */ + + +/* WORD/DWORD Registers */ + +SFR16E( TOFF, 0x8685 ) ; /* TEMPERATURE SENSOR OFFSET WORD */ +SFR16E( TMR0, 0x8C8A ) ; /* TIMER 0 COUNTER */ +SFR16E( TMR1, 0x8D8B ) ; /* TIMER 1 COUNTER */ +SFR16E( TMR2, 0xCDCC ) ; /* TIMER 2 COUNTER */ +SFR16E( RCAP2, 0xCBCA ) ; /* TIMER 2 CAPTURE REGISTER WORD */ +SFR16E( TMR2RL, 0xCBCA ) ; /* TIMER 2 CAPTURE REGISTER WORD */ +SFR16E( TMR3, 0x9594 ) ; /* TIMER 3 COUNTER */ +SFR16E( TMR3RL, 0x9392 ) ; /* TIMER 3 CAPTURE REGISTER WORD */ +SFR16E( IDA0, 0x9796 ) ; /* CURRENT MODE DAC 0 DATA WORD */ +SFR16E( ADC0, 0xBEBD ) ; /* ADC 0 DATA WORD */ +SFR16E( ADC0GT, 0xC4C3 ) ; /* ADC 0 GREATER-THAN REGISTER WORD */ +SFR16E( ADC0LT, 0xC6C5 ) ; /* ADC 0 LESS-THAN REGISTER WORD */ +SFR16E( PCA0, 0xFAF9 ) ; /* PCA COUNTER */ +SFR16E( PCA0CP0, 0xFCFB ) ; /* PCA CAPTURE 0 WORD */ +SFR16E( PCA0CP1, 0xEAE9 ) ; /* PCA CAPTURE 1 WORD */ +SFR16E( PCA0CP2, 0xECEB ) ; /* PCA CAPTURE 2 WORD */ + + +/* BIT Registers */ + +/* P0 0x80 */ +SBIT( P0_0, 0x80, 0 ) ; +SBIT( P0_1, 0x80, 1 ) ; +SBIT( P0_2, 0x80, 2 ) ; +SBIT( P0_3, 0x80, 3 ) ; +SBIT( P0_4, 0x80, 4 ) ; +SBIT( P0_5, 0x80, 5 ) ; +SBIT( P0_6, 0x80, 6 ) ; +SBIT( P0_7, 0x80, 7 ) ; + +/* TCON 0x88 */ +SBIT( IT0, 0x88, 0 ) ; /* TCON.0 - EXT. INTERRUPT 0 TYPE */ +SBIT( IE0, 0x88, 1 ) ; /* TCON.1 - EXT. INTERRUPT 0 EDGE FLAG */ +SBIT( IT1, 0x88, 2 ) ; /* TCON.2 - EXT. INTERRUPT 1 TYPE */ +SBIT( IE1, 0x88, 3 ) ; /* TCON.3 - EXT. INTERRUPT 1 EDGE FLAG */ +SBIT( TR0, 0x88, 4 ) ; /* TCON.4 - TIMER 0 ON/OFF CONTROL */ +SBIT( TF0, 0x88, 5 ) ; /* TCON.5 - TIMER 0 OVERFLOW FLAG */ +SBIT( TR1, 0x88, 6 ) ; /* TCON.6 - TIMER 1 ON/OFF CONTROL */ +SBIT( TF1, 0x88, 7 ) ; /* TCON.7 - TIMER 1 OVERFLOW FLAG */ + +/* P1 0x90 */ +SBIT( P1_0, 0x90, 0 ) ; +SBIT( P1_1, 0x90, 1 ) ; +SBIT( P1_2, 0x90, 2 ) ; +SBIT( P1_3, 0x90, 3 ) ; +SBIT( P1_4, 0x90, 4 ) ; +SBIT( P1_5, 0x90, 5 ) ; +SBIT( P1_6, 0x90, 6 ) ; +SBIT( P1_7, 0x90, 7 ) ; + +/* SCON 0x98 */ +SBIT( RI, 0x98, 0 ) ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +SBIT( RI0, 0x98, 0 ) ; /* SCON.0 - RECEIVE INTERRUPT FLAG */ +SBIT( TI, 0x98, 1 ) ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +SBIT( TI0, 0x98, 1 ) ; /* SCON.1 - TRANSMIT INTERRUPT FLAG */ +SBIT( RB8, 0x98, 2 ) ; /* SCON.2 - RECEIVE BIT 8 */ +SBIT( RB80, 0x98, 2 ) ; /* SCON.2 - RECEIVE BIT 8 */ +SBIT( TB8, 0x98, 3 ) ; /* SCON.3 - TRANSMIT BIT 8 */ +SBIT( TB80, 0x98, 3 ) ; /* SCON.3 - TRANSMIT BIT 8 */ +SBIT( REN, 0x98, 4 ) ; /* SCON.4 - RECEIVE ENABLE */ +SBIT( REN0, 0x98, 4 ) ; /* SCON.4 - RECEIVE ENABLE */ +SBIT( SM2, 0x98, 5 ) ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +SBIT( MCE0, 0x98, 5 ) ; /* SCON.5 - MULTIPROCESSOR COMMUNICATION ENABLE */ +SBIT( SM0, 0x98, 7 ) ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ +SBIT( S0MODE, 0x98, 7 ) ; /* SCON.7 - SERIAL MODE CONTROL BIT 0 */ + +/* P2 0xA0 */ +SBIT( P2_0, 0xA0, 0 ) ; +SBIT( P2_1, 0xA0, 1 ) ; +SBIT( P2_2, 0xA0, 2 ) ; +SBIT( P2_3, 0xA0, 3 ) ; +SBIT( P2_4, 0xA0, 4 ) ; +SBIT( P2_5, 0xA0, 5 ) ; +SBIT( P2_6, 0xA0, 6 ) ; +SBIT( P2_7, 0xA0, 7 ) ; + +/* IE 0xA8 */ +SBIT( EX0, 0xA8, 0 ) ; /* IE.0 - EXTERNAL INTERRUPT 0 ENABLE */ +SBIT( ET0, 0xA8, 1 ) ; /* IE.1 - TIMER 0 INTERRUPT ENABLE */ +SBIT( EX1, 0xA8, 2 ) ; /* IE.2 - EXTERNAL INTERRUPT 1 ENABLE */ +SBIT( ET1, 0xA8, 3 ) ; /* IE.3 - TIMER 1 INTERRUPT ENABLE */ +SBIT( ES, 0xA8, 4 ) ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +SBIT( ES0, 0xA8, 4 ) ; /* IE.4 - SERIAL PORT INTERRUPT ENABLE */ +SBIT( ET2, 0xA8, 5 ) ; /* IE.5 - TIMER 2 INTERRUPT ENABLE */ +SBIT( ESPI0, 0xA8, 6 ) ; /* IE.6 - SPI0 INTERRUPT ENABLE */ +SBIT( EA, 0xA8, 7 ) ; /* IE.7 - GLOBAL INTERRUPT ENABLE */ + +/* IP 0xB8 */ +SBIT( PX0, 0xB8, 0 ) ; /* IP.0 - EXTERNAL INTERRUPT 0 PRIORITY */ +SBIT( PT0, 0xB8, 1 ) ; /* IP.1 - TIMER 0 PRIORITY */ +SBIT( PX1, 0xB8, 2 ) ; /* IP.2 - EXTERNAL INTERRUPT 1 PRIORITY */ +SBIT( PT1, 0xB8, 3 ) ; /* IP.3 - TIMER 1 PRIORITY */ +SBIT( PS, 0xB8, 4 ) ; /* IP.4 - SERIAL PORT PRIORITY */ +SBIT( PS0, 0xB8, 4 ) ; /* IP.4 - SERIAL PORT PRIORITY */ +SBIT( PT2, 0xB8, 5 ) ; /* IP.5 - TIMER 2 PRIORITY */ +SBIT( PSPI0, 0xB8, 6 ) ; /* IP.6 - SPI0 PRIORITY */ + +/* SMB0CN 0xC0 */ +SBIT( SI, 0xC0, 0 ) ; /* SMB0CN.0 - SMBUS 0 INTERRUPT PENDING FLAG */ +SBIT( ACK, 0xC0, 1 ) ; /* SMB0CN.1 - SMBUS 0 ACKNOWLEDGE FLAG */ +SBIT( ARBLOST, 0xC0, 2 ) ; /* SMB0CN.2 - SMBUS 0 ARBITRATION LOST INDICATOR */ +SBIT( ACKRQ, 0xC0, 3 ) ; /* SMB0CN.3 - SMBUS 0 ACKNOWLEDGE REQUEST */ +SBIT( STO, 0xC0, 4 ) ; /* SMB0CN.4 - SMBUS 0 STOP FLAG */ +SBIT( STA, 0xC0, 5 ) ; /* SMB0CN.5 - SMBUS 0 START FLAG */ +SBIT( TXMODE, 0xC0, 6 ) ; /* SMB0CN.6 - SMBUS 0 TRANSMIT MODE INDICATOR */ +SBIT( MASTER, 0xC0, 7 ) ; /* SMB0CN.7 - SMBUS 0 MASTER/SLAVE INDICATOR */ + +/* TMR2CN 0xC8 */ +SBIT( T2XCLK, 0xC8, 0 ) ; /* TMR2CN.0 - TIMER 2 EXTERNAL CLOCK SELECT */ +SBIT( TR2, 0xC8, 2 ) ; /* TMR2CN.2 - TIMER 2 ON/OFF CONTROL */ +SBIT( T2SPLIT, 0xC8, 3 ) ; /* TMR2CN.3 - TIMER 2 SPLIT MODE ENABLE */ +SBIT( TF2CEN, 0xC8, 5 ) ; /* TMR2CN.5 - TIMER 2 LOW-FREQ OSC CAPTURE ENABLE*/ +SBIT( TF2LEN, 0xC8, 5 ) ; /* TMR2CN.5 - TIMER 2 LOW BYTE INTERRUPT ENABLE */ +SBIT( TF2L, 0xC8, 6 ) ; /* TMR2CN.6 - TIMER 2 LOW BYTE OVERFLOW FLAG */ +SBIT( TF2, 0xC8, 7 ) ; /* TMR2CN.7 - TIMER 2 OVERFLOW FLAG */ +SBIT( TF2H, 0xC8, 7 ) ; /* TMR2CN.7 - TIMER 2 HIGH BYTE OVERFLOW FLAG */ + +/* PSW 0xD0 */ +SBIT( PARITY, 0xD0, 0 ) ; /* PSW.0 - ACCUMULATOR PARITY FLAG */ +SBIT( F1, 0xD0, 1 ) ; /* PSW.1 - FLAG 1 */ +SBIT( OV, 0xD0, 2 ) ; /* PSW.2 - OVERFLOW FLAG */ +SBIT( RS0, 0xD0, 3 ) ; /* PSW.3 - REGISTER BANK SELECT 0 */ +SBIT( RS1, 0xD0, 4 ) ; /* PSW.4 - REGISTER BANK SELECT 1 */ +SBIT( F0, 0xD0, 5 ) ; /* PSW.5 - FLAG 0 */ +SBIT( AC, 0xD0, 6 ) ; /* PSW.6 - AUXILIARY CARRY FLAG */ +SBIT( CY, 0xD0, 7 ) ; /* PSW.7 - CARRY FLAG */ + +/* PCA0CN 0xD8 */ +SBIT( CCF0, 0xD8, 0 ) ; /* PCA0CN.0 - PCA MODULE 0 CAPTURE/COMPARE FLAG */ +SBIT( CCF1, 0xD8, 1 ) ; /* PCA0CN.1 - PCA MODULE 1 CAPTURE/COMPARE FLAG */ +SBIT( CCF2, 0xD8, 2 ) ; /* PCA0CN.2 - PCA MODULE 2 CAPTURE/COMPARE FLAG */ +SBIT( CR, 0xD8, 6 ) ; /* PCA0CN.6 - PCA COUNTER/TIMER RUN CONTROL */ +SBIT( CF, 0xD8, 7 ) ; /* PCA0CN.7 - PCA COUNTER/TIMER OVERFLOW FLAG */ + +/* ADC0CN 0xE8 */ +SBIT( AD0CM0, 0xE8, 0 ) ; /* ADC0CN.0 - ADC 0 START OF CONV. MODE BIT 0 */ +SBIT( AD0CM1, 0xE8, 1 ) ; /* ADC0CN.1 - ADC 0 START OF CONV. MODE BIT 1 */ +SBIT( AD0CM2, 0xE8, 2 ) ; /* ADC0CN.2 - ADC 0 START OF CONV. MODE BIT 2 */ +SBIT( AD0WINT, 0xE8, 3 ) ; /* ADC0CN.3 - ADC 0 WINDOW COMPARE INT. FLAG */ +SBIT( AD0BUSY, 0xE8, 4 ) ; /* ADC0CN.4 - ADC 0 BUSY FLAG */ +SBIT( AD0INT, 0xE8, 5 ) ; /* ADC0CN.5 - ADC 0 CONV. COMPLETE INT. FLAG */ +SBIT( AD0TM, 0xE8, 6 ) ; /* ADC0CN.6 - ADC 0 TRACK MODE */ +SBIT( AD0EN, 0xE8, 7 ) ; /* ADC0CN.7 - ADC 0 ENABLE */ + +/* SPI0CN 0xF8 */ +SBIT( SPIEN, 0xF8, 0 ) ; /* SPI0CN.0 - SPI0 ENABLE */ +SBIT( TXBMT, 0xF8, 1 ) ; /* SPI0CN.1 - TRANSMIT BUFFER EMPTY */ +SBIT( NSSMD0, 0xF8, 2 ) ; /* SPI0CN.2 - SLAVE SELECT MODE BIT 0 */ +SBIT( NSSMD1, 0xF8, 3 ) ; /* SPI0CN.3 - SLAVE SELECT MODE BIT 1 */ +SBIT( RXOVRN, 0xF8, 4 ) ; /* SPI0CN.4 - RECEIVE OVERRUN FLAG */ +SBIT( MODF, 0xF8, 5 ) ; /* SPI0CN.5 - MODE FAULT FLAG */ +SBIT( WCOL, 0xF8, 6 ) ; /* SPI0CN.6 - WRITE COLLISION FLAG */ +SBIT( SPIF, 0xF8, 7 ) ; /* SPI0CN.7 - SPI0 INTERRUPT FLAG */ + + +/* Predefined SFR Bit Masks */ + +#define PCON_IDLE 0x01 /* PCON */ +#define PCON_STOP 0x02 /* PCON */ +#define T1M 0x08 /* CKCON */ +#define PSWE 0x01 /* PSCTL */ +#define PSEE 0x02 /* PSCTL */ +#define ECP0 0x20 /* EIE1 */ +#define PORSF 0x02 /* RSTSRC */ +#define SWRSF 0x10 /* RSTSRC */ +#define ECCF 0x01 /* PCA0CPMn */ +#define PWM 0x02 /* PCA0CPMn */ +#define TOG 0x04 /* PCA0CPMn */ +#define MAT 0x08 /* PCA0CPMn */ +#define CAPN 0x10 /* PCA0CPMn */ +#define CAPP 0x20 /* PCA0CPMn */ +#define ECOM 0x40 /* PCA0CPMn */ +#define PWM16 0x80 /* PCA0CPMn */ +#define CP0E 0x10 /* XBR0 */ +#define CP0OEN 0x10 /* XBR0 */ +#define CP0AE 0x20 /* XBR0 */ +#define CP0AOEN 0x20 /* XBR0 */ + +/* Interrupts */ + +#define INT_EXT0 0 /* External Interrupt 0 */ +#define INT_TIMER0 1 /* Timer0 Overflow */ +#define INT_EXT1 2 /* External Interrupt 1 */ +#define INT_TIMER1 3 /* Timer1 Overflow */ +#define INT_UART0 4 /* Serial Port 0 */ +#define INT_TIMER2 5 /* Timer2 Overflow */ +#define INT_SPI0 6 /* Serial Peripheral Interface 0 */ +#define INT_SMBUS0 7 /* SMBus0 Interface */ +#define INT_PMAT 8 /* Port match */ +#define INT_ADC0_WINDOW 9 /* ADC0 Window Comparison */ +#define INT_ADC0_EOC 10 /* ADC0 End Of Conversion */ +#define INT_PCA0 11 /* PCA0 Peripheral */ +#define INT_COMPARATOR0 12 /* Comparator0 */ +/* 13 Reserved */ +#define INT_TIMER3 14 /* Timer3 Overflow */ + +#endif diff --git a/device/include/mcs51/P89LPC901.h b/device/include/mcs51/P89LPC901.h new file mode 100644 index 0000000..dc3caed --- /dev/null +++ b/device/include/mcs51/P89LPC901.h @@ -0,0 +1,184 @@ +/*-------------------------------------------------------------------------- +P89LPC901.H +(English) +This header allows to use the microcontroler Philips P89LPC901 +with the compiler SDCC. + +Copyright (c) 2005 Omar Espinosa--e-mail: opiedrahita2003 AT yahoo.com. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +(Spanish-Español) +Archivo encabezador para el ucontrolador Philips P89LPC901. +Derechos de copy (DC) 2005. OMAR ESPINOSA P. E-mail: opiedrahita2003 AT yahoo.com +Uso libre +--------------------------------------------------------------------------*/ + +#ifndef __REG901_H__ +#define __REG901_H__ + +/* BYTE Registers */ +__sfr __at (0x80) P0 ; +__sfr __at (0x84) P0M1 ; +__sfr __at (0x85) P0M2 ; + +__sfr __at (0x90) P1 ; +__sfr __at (0x91) P1M1 ; +__sfr __at (0x92) P1M2 ; + +__sfr __at (0xB0) P3 ; +__sfr __at (0xB1) P3M1 ; +__sfr __at (0xB2) P3M2 ; +//------------------ +__sfr __at (0xD0) PSW ; +__sfr __at (0xE0) ACC ; +__sfr __at (0xF0) B ; +__sfr __at (0x81) SP ; +__sfr __at (0x82) DPL ; +__sfr __at (0x83) DPH ; +//------------------ +__sfr __at (0xA2) AUXR1 ; +__sfr __at (0xAC) CMP1 ; +__sfr __at (0x95) DIVM ; + +__sfr __at (0xE7) FMADRH ; +__sfr __at (0xE6) FMADRL ; +__sfr __at (0xE4) FMCON ; +__sfr __at (0xE5) FMDATA ; + +__sfr __at (0xA8) IEN0 ; +__sfr __at (0xE8) IEN1 ; + +__sfr __at (0xB8) IP0 ; +__sfr __at (0xB7) IP0H ; +__sfr __at (0xF8) IP1 ; +__sfr __at (0xF7) IP1H ; + +__sfr __at (0x94) KBCON ; +__sfr __at (0x86) KBMASK ; +__sfr __at (0x93) KBPATN ; + +__sfr __at (0x87) PCON ; +__sfr __at (0xB5) PCONA ; +__sfr __at (0xB6) PCONB ; + +__sfr __at (0xF6) PT0AD ; +__sfr __at (0xDF) RSTSRC ; + +__sfr __at (0xD1) RTCCON ; +__sfr __at (0xD2) RTCH ; +__sfr __at (0xD3) RTCL ; + +__sfr __at (0x8F) TAMOD ; +__sfr __at (0x88) TCON ; +__sfr __at (0x8A) TL0 ; +__sfr __at (0x8B) TL1 ; +__sfr __at (0x8C) TH0 ; +__sfr __at (0x8D) TH1 ; +__sfr __at (0x89) TMOD ; +__sfr __at (0x96) TRIM ; + +__sfr __at (0xA7) WDCON ; +__sfr __at (0xC1) WDL ; +__sfr __at (0xC2) WFEED1 ; +__sfr __at (0xC3) WFEED2 ; + + +/* BIT Registers */ +/* PSW */ +__sbit __at (0xD7) PSW_7; +__sbit __at (0xD6) PSW_6; +__sbit __at (0xD5) PSW_5; +__sbit __at (0xD4) PSW_4; +__sbit __at (0xD3) PSW_3; +__sbit __at (0xD2) PSW_2; +__sbit __at (0xD1) PSW_1; +__sbit __at (0xD0) PSW_0; + +#define CY PSW_7 +#define AC PSW_6 +#define F0 PSW_5 +#define RS1 PSW_4 +#define RS0 PSW_3 +#define OV PSW_2 +#define F1 PSW_1 +#define P PSW_0 + +/* TCON */ +__sbit __at (0x8F) TCON_7; +__sbit __at (0x8E) TCON_6; +__sbit __at (0x8D) TCON_5; +__sbit __at (0x8C) TCON_4; + +#define TF1 TCON_7 +#define TR1 TCON_6 +#define TF0 TCON_5 +#define TR0 TCON_4 + +/* IEN0 */ +__sbit __at (0xAF) IEN0_7; +__sbit __at (0xAE) IEN0_6; +__sbit __at (0xAD) IEN0_5; +__sbit __at (0xAB) IEN0_3; +__sbit __at (0xA9) IEN0_1; + +#define EA IEN0_7 +#define EWDRT IEN0_6 +#define EBO IEN0_5 +#define ET1 IEN0_3 +#define ET0 IEN0_1 + +/* IEN1 */ +__sbit __at (0xEA) IEN1_2; +__sbit __at (0xE9) IEN1_1; + +#define EC IEN1_2 +#define EKBI IEN1_1 + +/* IP0 */ +__sbit __at (0xBE) IP0_6; +__sbit __at (0xBD) IP0_5; +__sbit __at (0xBB) IP0_3; +__sbit __at (0xB9) IP0_1; + +#define PWDRT IP0_6 +#define PB0 IP0_5 +#define PT1 IP0_3 +#define PT0 IP0_1 + +/* P0 */ +__sbit __at (0x85) P0_5; +__sbit __at (0x84) P0_4; + +#define KB5 P0_5 +#define CMPREF P0_5 +#define KB4 P0_4 +#define CIN1A P0_4 + +/* P1 */ +__sbit __at (0x95) P1_5; +__sbit __at (0x92) P1_2; + +#define RST P1_5 +#define T0 P1_2 + +/* P3 */ +__sbit __at (0xB1) P3_1; +__sbit __at (0xB0) P3_0; + +#define XTAL1 P3_1 +#define XTAL2 P3_0 + +#endif diff --git a/device/include/mcs51/P89LPC922.h b/device/include/mcs51/P89LPC922.h new file mode 100644 index 0000000..93486ea --- /dev/null +++ b/device/include/mcs51/P89LPC922.h @@ -0,0 +1,280 @@ +/*------------------------------------------------------------------//-------- +P89LPC922.H +(English) +This header allows to use the microcontroler Philips P89LPC922 +with the compiler SDCC. + +Copyright (c) 2005 Omar Espinosa--e-mail: opiedrahita2003 AT yahoo.com. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +(Spanish-Español) +Archivo encabezador para el ucontrolador Philips P89LPC922. +Derechos de copy (DC) 2005. OMAR ESPINOSA P. E-mail: opiedrahita2003 AT yahoo.com +Uso libre +//------------------------------------------------------------------//--//------*/ +#ifndef __REG922_H__ +#define __REG922_H__ + +//* BYTE Registers *// +__sfr __at (0x80) P0 ; +__sfr __at (0x90) P1 ; +__sfr __at (0xB0) P3 ; +__sfr __at (0xD0) PSW ; +__sfr __at (0xE0) ACC ; +__sfr __at (0xF0) B ; +__sfr __at (0x81) SP ; +__sfr __at (0x82) DPL ; +__sfr __at (0x83) DPH ; +__sfr __at (0x87) PCON ; +__sfr __at (0x88) TCON ; +__sfr __at (0x89) TMOD ; +__sfr __at (0x8A) TL0 ; +__sfr __at (0x8B) TL1 ; +__sfr __at (0x8C) TH0 ; +__sfr __at (0x8D) TH1 ; +__sfr __at (0xA8) IEN0 ; +__sfr __at (0xB8) IP0 ; +__sfr __at (0x98) SCON ; +__sfr __at (0x99) SBUF ; + + +__sfr __at (0xA2) AUXR1 ; +__sfr __at (0xA9) SADDR ; +__sfr __at (0xB9) SADEN ; +__sfr __at (0xBE) BRGR0 ; +__sfr __at (0xBF) BRGR1 ; +__sfr __at (0xBD) BRGCON ; +__sfr __at (0xAC) CMP1 ; +__sfr __at (0xAD) CMP2 ; +__sfr __at (0x95) DIVM ; +__sfr __at (0xE7) FMADRH ; +__sfr __at (0xE6) FMADRL ; +__sfr __at (0xE4) FMCON ; +__sfr __at (0xE5) FMDATA ; +__sfr __at (0xDB) I2ADR ; +__sfr __at (0xD8) I2CON ; +__sfr __at (0xDA) I2DAT ; +__sfr __at (0xDD) I2SCLH ; +__sfr __at (0xDC) I2SCLL ; +__sfr __at (0xD9) I2STAT ; +__sfr __at (0xF8) IP1 ; +__sfr __at (0xF7) IP1H ; +__sfr __at (0x94) KBCON ; +__sfr __at (0x86) KBMASK ; +__sfr __at (0x93) KBPATN ; +__sfr __at (0x84) P0M1 ; +__sfr __at (0x85) P0M2 ; +__sfr __at (0x91) P1M1 ; +__sfr __at (0x92) P1M2 ; +__sfr __at (0xB1) P3M1 ; +__sfr __at (0xB2) P3M2 ; +__sfr __at (0xB5) PCONA ; +__sfr __at (0xF6) PT0AD ; +__sfr __at (0xDF) RSTSRC ; +__sfr __at (0xD1) RTCCON ; +__sfr __at (0xD2) RTCH ; +__sfr __at (0xD3) RTCL ; +__sfr __at (0xBA) SSTAT ; +__sfr __at (0x8F) TAMOD ; +__sfr __at (0x96) TRIM ; +__sfr __at (0xA7) WDCON ; +__sfr __at (0xC1) WDL ; +__sfr __at (0xC2) WFEED1 ; +__sfr __at (0xC3) WFEED2 ; +__sfr __at (0xB7) IP0H ; +__sfr __at (0xE8) IEN1 ; + +/* BIT Registers */ +/* PSW */ +__sbit __at (0xD0) PSW_0 ; +__sbit __at (0xD1) PSW_1 ; +__sbit __at (0xD2) PSW_2 ; +__sbit __at (0xD3) PSW_3 ; +__sbit __at (0xD4) PSW_4 ; +__sbit __at (0xD5) PSW_5 ; +__sbit __at (0xD6) PSW_6 ; +__sbit __at (0xD7) PSW_7 ; + +#define CY PSW_7 +#define AC PSW_6 +#define F0 PSW_5 +#define RS1 PSW_4 +#define RS0 PSW_3 +#define OV PSW_2 +#define F1 PSW_1 +#define P PSW_0 + +/* TCON */ +__sbit __at (0x8F) TCON_7 ; +__sbit __at (0x8E) TCON_6 ; +__sbit __at (0x8D) TCON_5 ; +__sbit __at (0x8C) TCON_4 ; +__sbit __at (0x8B) TCON_3 ; +__sbit __at (0x8A) TCON_2 ; +__sbit __at (0x89) TCON_1 ; +__sbit __at (0x88) TCON_0 ; + +#define TF1 TCON_7 +#define TR1 TCON_6 +#define TF0 TCON_5 +#define TR0 TCON_4 +#define IE1 TCON_3 +#define IT1 TCON_2 +#define IE0 TCON_1 +#define IT0 TCON_0 + +/* IEN0 */ +__sbit __at (0xAF) IEN0_7 ; +__sbit __at (0xAE) IEN0_6 ; +__sbit __at (0xAD) IEN0_5 ; +__sbit __at (0xAC) IEN0_4 ; +__sbit __at (0xAB) IEN0_3 ; +__sbit __at (0xAA) IEN0_2 ; +__sbit __at (0xA9) IEN0_1 ; +__sbit __at (0xA8) IEN0_0 ; + +#define EA IEN0_7 +#define EWDRT IEN0_6 +#define EBO IEN0_5 +#define ES IEN0_4 // alternatively "ESR" +#define ESR IEN0_4 +#define ET1 IEN0_3 +#define EX1 IEN0_2 +#define ET0 IEN0_1 +#define EX0 IEN0_0 + +/* IEN1 */ +__sbit __at (0xEA) IEN1_2 ; +__sbit __at (0xE9) IEN1_1 ; +__sbit __at (0xE8) IEN1_0 ; + +#define EC IEN1_2 +#define EKBI IEN1_1 +#define EI2C IEN1_0 + +/* IP1 */ +__sbit __at (0xFE) IP1_6 ; +__sbit __at (0xFA) IP1_2 ; +__sbit __at (0xF9) IP1_1 ; +__sbit __at (0xF8) IP1_0 ; + +#define PST IP1_6 +#define PC IP1_2 +#define PKBI IP1_1 +#define PI2C IP1_0 + +/* IP0 */ +__sbit __at (0xBE) IP0_6 ; +__sbit __at (0xBD) IP0_5 ; +__sbit __at (0xBC) IP0_4 ; // alternatively "PSR" +__sbit __at (0xBB) IP0_3 ; +__sbit __at (0xBA) IP0_2 ; +__sbit __at (0xB9) IP0_1 ; +__sbit __at (0xB8) IP0_0 ; + +#define PWDRT IP0_6 +#define PBO IP0_5 +#define PS IP0_4 // alternatively "PSR" +#define PSR IP0_4 +#define PT1 IP0_3 +#define PX1 IP0_2 +#define PT0 IP0_1 +#define PX0 IP0_0 + +/* SCON */ +__sbit __at (0x98) SCON_0 ; +__sbit __at (0x99) SCON_1 ; +__sbit __at (0x9A) SCON_2 ; +__sbit __at (0x9B) SCON_3 ; +__sbit __at (0x9C) SCON_4 ; +__sbit __at (0x9D) SCON_5 ; +__sbit __at (0x9E) SCON_6 ; +__sbit __at (0x9F) SCON_7 ; + +#define SM0 SCON_7 // alternatively "FE" +#define FE SCON_7 +#define SM1 SCON_6 +#define SM2 SCON_5 +#define REN SCON_4 +#define TB8 SCON_3 +#define RB8 SCON_2 +#define TI SCON_1 +#define RI SCON_0 + +/* I2CON */ +__sbit __at (0xDE) I2CON_6 ; +__sbit __at (0xDD) I2CON_5 ; +__sbit __at (0xDC) I2CON_4 ; +__sbit __at (0xDB) I2CON_3 ; +__sbit __at (0xDA) I2CON_2 ; +__sbit __at (0xD8) I2CON_0 ; + +#define I2EN I2CON_6 +#define STA I2CON_5 +#define STO I2CON_4 +#define SI I2CON_3 +#define AA I2CON_2 +#define CRSEL I2CON_0 + +/* P0 */ +__sbit __at (0x80) P0_0 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x87) P0_7 ; + +#define KB7 P0_7 // alternatively "T1" +#define T1 P0_7 +#define KB6 P0_6 // alternatively "CMP1" +#define CMP1 P0_6 +#define KB5 P0_5 +#define KB4 P0_4 +#define KB3 P0_3 +#define KB2 P0_2 +#define KB1 P0_1 +#define KB0 P0_0 // alternatively "CMP2" +#define CMP2 P0_0 + +/* P1 */ +__sbit __at (0x90) P1_0 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x92) P1_2 ; +__sbit __at (0x93) P1_3 ; +__sbit __at (0x94) P1_4 ; +__sbit __at (0x95) P1_5 ; +__sbit __at (0x96) P1_6 ; +__sbit __at (0x97) P1_7 ; + +#define RST P1_5 +#define INT1 P1_4 +#define INT0 P1_3 // alternatively "SDA" +#define SDA P1_3 +#define T0 P1_2 // alternatively "SCL" +#define SCL P1_2 +#define RxD P1_1 +#define TxD P1_0 + +/* P3 */ +__sbit __at (0xB0) P3_0 ; +__sbit __at (0xB1) P3_1 ; + +#define XTAL1 P3_1 +#define XTAL2 P3_0 + +#endif diff --git a/device/include/mcs51/P89LPC925.h b/device/include/mcs51/P89LPC925.h new file mode 100644 index 0000000..74165e4 --- /dev/null +++ b/device/include/mcs51/P89LPC925.h @@ -0,0 +1,481 @@ +/*------------------------------------------------------------------------- + Register Declarations for NXP P89LPC924 and P89LPC925 + (Based on datasheet Rev. 03 — 15 December 2004) + + Written By - Jesus Calvino-Fraga / jesusc at ece.ubc.ca (February 2007) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option); any later version + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef REG_P89LPC925_H +#define REG_P89LPC925_H + +#include + +SFR(ACC, 0xE0); // Accumulator + SBIT(ACC_7, 0xE0, 7); + SBIT(ACC_6, 0xE0, 6); + SBIT(ACC_5, 0xE0, 5); + SBIT(ACC_4, 0xE0, 4); + SBIT(ACC_3, 0xE0, 3); + SBIT(ACC_2, 0xE0, 2); + SBIT(ACC_1, 0xE0, 1); + SBIT(ACC_0, 0xE0, 0); + +SFR(ADCON1, 0x97); // A/D control register 1 + #define ENBI1 0x80 + #define ENADCI1 0x40 + #define TMM1 0x20 + #define EDGE1 0x10 + #define ADCI1 0x08 + #define ENADC1 0x04 + #define ADCS11 0x02 + #define ADCS10 0x01 + +SFR(ADINS, 0xA3); // A/D input select + #define ADI13 0x80 + #define ADI12 0x40 + #define ADI11 0x20 + #define ADI10 0x10 + +SFR(ADMODA, 0xC0); // A/D mode register A + #define BNDI1 0x80 + #define BURST1 0x40 + #define SCC1 0x20 + #define SCAN1 0x10 + +SFR(ADMODB, 0xA1); // A/D mode register B + #define CLK2 0x80 + #define CLK1 0x40 + #define CLK0 0x20 + #define ENDAC1 0x08 + #define BSA1 0x02 + +SFR(AD1BH, 0xC4); // A/D_1 boundary high register + +SFR(AD1BL, 0xBC); // A/D_1 boundary low register + +SFR(AD1DAT0, 0xD5); // A/D_1 data register 0 + +SFR(AD1DAT1, 0xD6); // A/D_1 data register 1 + +SFR(AD1DAT2, 0xD7); // A/D_1 data register 2 + +SFR(AD1DAT3, 0xF5); // A/D_1 data register 3 + +SFR(AUXR1, 0xA2); // Auxiliary function register + #define CLKLP 0x80 + #define EBRR 0x40 + #define ENT1 0x20 + #define ENT0 0x10 + #define SRST 0x08 + #define DPS 0x01 + +SFR(B, 0xF0); // B register + SBIT(B_7, 0xF0, 7); + SBIT(B_6, 0xF0, 6); + SBIT(B_5, 0xF0, 5); + SBIT(B_4, 0xF0, 4); + SBIT(B_3, 0xF0, 3); + SBIT(B_2, 0xF0, 2); + SBIT(B_1, 0xF0, 1); + SBIT(B_0, 0xF0, 0); + +SFR(BRGR0, 0xBE); // Baud rate generator rate LOW + +SFR(BRGR1, 0xBF); // Baud rate generator rate HIGH + +SFR(BRGCON, 0xBD); // Baud rate generator control + #define SBRGS 0x02 + #define BRGEN 0x01 + +SFR(CMP1, 0xAC); // Comparator1 control register + #define CE1 0x20 + #define CP1 0x10 + #define CN1 0x08 + #define OE1 0x04 + #define CO1 0x02 + #define CMF1 0x01 + +SFR(CMP2, 0xAD); // Comparator2 control register + #define CE2 0x20 + #define CP2 0x10 + #define CN2 0x08 + #define OE2 0x04 + #define CO2 0x02 + #define CMF2 0x01 + +SFR(DIVM, 0x95); // CPU clock divide-by-M control + +SFR(DPH, 0x83); // Data pointer HIGH + +SFR(DPL, 0x82); // Data pointer LOW + +SFR(FMADRH, 0xE7); // Program Flash address HIGH + +SFR(FMADRL, 0xE6); // Program Flash address LOW + +SFR(FMCON, 0xE4); // Program Flash control (Read) + #define BUSY 0x80 + #define HVA 0x08 + #define HVE 0x04 + #define SV 0x02 + #define OI 0x01 + +SFR(FMCON, 0xE4); // Program Flash control (Write) + #define FMCMD_7 0x80 + #define FMCMD_6 0x40 + #define FMCMD_5 0x20 + #define FMCMD_4 0x10 + #define FMCMD_3 0x08 + #define FMCMD_2 0x04 + #define FMCMD_1 0x02 + #define FMCMD_0 0x01 + +SFR(FMDATA, 0xE5); // Program Flash data + +SFR(I2ADR, 0xDB); // I2C slave address register + #define I2ADR_6 0x80 + #define I2ADR_5 0x40 + #define I2ADR_4 0x20 + #define I2ADR_3 0x10 + #define I2ADR_2 0x08 + #define I2ADR_1 0x04 + #define I2ADR_0 0x02 + #define GC 0x01 + +SFR(I2CON, 0xD8); // I2C control register + SBIT(I2EN, 0xD8, 6); + SBIT(STA, 0xD8, 5); + SBIT(STO, 0xD8, 4); + SBIT(SI, 0xD8, 3); + SBIT(AA, 0xD8, 2); + SBIT(CRSEL, 0xD8, 0); + +SFR(I2DAT, 0xDA); // I2C data register + +SFR(I2SCLH, 0xDD); // Serial clock generator/SCL duty cycle register HIGH + +SFR(I2SCLL, 0xDC); // Serial clock generator/SCL duty cycle register LOW + +SFR(I2STAT, 0xD9); // I2C status register + #define STA_4 0x80 + #define STA_3 0x40 + #define STA_2 0x20 + #define STA_1 0x10 + #define STA_0 0x08 + +SFR(IEN0, 0xA8); // Interrupt enable 0 + SBIT(EA, 0xA8, 7); + SBIT(EWDRT, 0xA8, 6); + SBIT(EBO, 0xA8, 5); + SBIT(ES, 0xA8, 4); + SBIT(ESR, 0xA8, 4); + SBIT(ET1, 0xA8, 3); + SBIT(EX1, 0xA8, 2); + SBIT(ET0, 0xA8, 1); + SBIT(EX0, 0xA8, 0); + +SFR(IEN1, 0xE8); // Interrupt enable 1 + SBIT(EAD, 0xE8, 7); + SBIT(EST, 0xE8, 6); + SBIT(EC, 0xE8, 2); + SBIT(EKBI, 0xE8, 1); + SBIT(EI2C, 0xE8, 0); + +SFR(IP0, 0xB8); // Interrupt priority 0 + SBIT(PWDRT, 0xB8, 6); + SBIT(PBO, 0xB8, 5); + SBIT(PS, 0xB8, 4); + SBIT(PSR, 0xB8, 4); + SBIT(PT1, 0xB8, 3); + SBIT(PX1, 0xB8, 2); + SBIT(PT0, 0xB8, 1); + SBIT(PX0, 0xB8, 0); + +SFR(IP0H, 0xB7); // Interrupt priority 0 HIGH + #define PWDRTH 0x40 + #define PBOH 0x20 + #define PSH 0x10 + #define PSRH 0x10 + #define PT1H 0x08 + #define PX1H 0x04 + #define PT0H 0x02 + #define PX0H 0x01 + +SFR(IP1, 0xF8); // Interrupt priority 1 + SBIT(PAD, 0xF8, 7); + SBIT(PST, 0xF8, 6); + SBIT(PC, 0xF8, 2); + SBIT(PKBI, 0xF8, 1); + SBIT(PI2C, 0xF8, 0); + +SFR(IP1H, 0xF7); // Interrupt priority 1 HIGH + #define PADH 0x80 + #define PSTH 0x40 + #define PCH 0x04 + #define PKBIH 0x02 + #define PI2CH 0x01 + +SFR(KBCON, 0x94); // Keypad control register + #define PATN_SEL 0x02 //Pattern Matching Polarity selection + #define KBIF 0x01 // Keypad Interrupt Flag + +SFR(KBMASK, 0x86); // Keypad interrupt register mask + +SFR(KBPATN, 0x93); // Keypad pattern register + +SFR(P0, 0x80); // Port 0 + SBIT(P0_7, 0x80, 7); + SBIT(P0_6, 0x80, 6); + SBIT(P0_5, 0x80, 5); + SBIT(P0_4, 0x80, 4); + SBIT(P0_3, 0x80, 3); + SBIT(P0_2, 0x80, 2); + SBIT(P0_1, 0x80, 1); + SBIT(P0_0, 0x80, 0); + //P0 alternate pin functions + SBIT(T1, 0x80, 7); + SBIT(CMP1b, 0x80, 6); //Should be CMP1 but there is SFR with that name + SBIT(CMPREF, 0x80, 5); + SBIT(CIN1A, 0x80, 4); + SBIT(CIN1B, 0x80, 3); + SBIT(CIN2A, 0x80, 2); + SBIT(CIN2B, 0x80, 1); + SBIT(CMP2b, 0x80, 0); //Should be CMP2 but there is SFR with that name + //More P0 alternate pin functions + SBIT(KB7, 0x80, 7); + SBIT(KB6, 0x80, 6); + SBIT(KB5, 0x80, 5); + SBIT(KB4, 0x80, 4); + SBIT(KB3, 0x80, 3); + SBIT(KB2, 0x80, 2); + SBIT(KB1, 0x80, 1); + SBIT(KB0, 0x80, 0); + +SFR(P1, 0x90); // Port 1 + SBIT(P1_7, 0x90, 7); + SBIT(P1_6, 0x90, 6); + SBIT(P1_5, 0x90, 5); + SBIT(P1_4, 0x90, 4); + SBIT(P1_3, 0x90, 3); + SBIT(P1_2, 0x90, 2); + SBIT(P1_1, 0x90, 1); + SBIT(P1_0, 0x90, 0); + //P1 alternate pin functions + SBIT(RST, 0x90, 5); + SBIT(INT1, 0x90, 4); + SBIT(INT0, 0x90, 3); + SBIT(SDA, 0x90, 3); + SBIT(T0, 0x90, 2); + SBIT(SCL, 0x90, 2); + SBIT(RXD, 0x90, 1); + SBIT(TXD, 0x90, 0); + +SFR(P3, 0xB0); // Port 3 + SBIT(P3_1, 0xB0, 1); + SBIT(P3_0, 0xB0, 0); + SBIT(XTAL1, 0xB0, 1); + SBIT(XTAL2, 0xB0, 0); + +SFR(P0M1, 0x84); // Port0 output mode1 + #define P0M1_7 0x80 + #define P0M1_6 0x40 + #define P0M1_5 0x20 + #define P0M1_4 0x10 + #define P0M1_3 0x08 + #define P0M1_2 0x04 + #define P0M1_1 0x02 + #define P0M1_0 0x01 + +SFR(P0M2, 0x85); // Port0 output mode2 + #define P0M2_7 0x80 + #define P0M2_6 0x40 + #define P0M2_5 0x20 + #define P0M2_4 0x10 + #define P0M2_3 0x08 + #define P0M2_2 0x04 + #define P0M2_1 0x02 + #define P0M2_0 0x01 + +SFR(P1M1, 0x91); // Port1 output mode1 + #define P1M1_7 0x80 + #define P1M1_6 0x40 + #define P1M1_4 0x10 + #define P1M1_3 0x08 + #define P1M1_2 0x04 + #define P1M1_1 0x02 + #define P1M1_0 0x01 + +SFR(P1M2, 0x92); // Port1 output mode2 + #define P1M2_7 0x80 + #define P1M2_6 0x40 + #define P1M2_4 0x10 + #define P1M2_3 0x08 + #define P1M2_2 0x04 + #define P1M2_1 0x02 + #define P1M2_0 0x01 + +SFR(P3M1, 0xB1); // Port3 output mode1 + #define P3M1_1 0x02 + #define P3M1_0 0x01 + +SFR(P3M2, 0xB2); // Port3 output mode2 + #define P3M2_1 0x02 + #define P3M2_0 0x01 + +SFR(PCON, 0x87); // Power control register + #define SMOD1 0x80 + #define SMOD0 0x40 + #define BOPD 0x20 + #define BOI 0x10 + #define GF1 0x08 + #define GF0 0x04 + #define PMOD1 0x02 + #define PMOD0 0x01 + +SFR(PCONA, 0xB5); // Power control register A + #define RTCPD 0x80 + #define VCPD 0x20 + #define ADPD 0x10 + #define I2PD 0x08 + #define SPD 0x02 + +SFR(PSW, 0xD0); // Program status word + SBIT(CY, 0xD0, 7); + SBIT(AC, 0xD0, 6); + SBIT(F0, 0xD0, 5); + SBIT(RS1, 0xD0, 4); + SBIT(RS0, 0xD0, 3); + SBIT(OV, 0xD0, 2); + SBIT(F1, 0xD0, 1); + SBIT(P, 0xD0, 0); + +SFR(PT0AD, 0xF6); // Port0 digital input disable + #define PT0AD_5 0x20 + #define PT0AD_4 0x10 + #define PT0AD_3 0x08 + #define PT0AD_2 0x04 + #define PT0AD_1 0x02 + +SFR(RSTSRC, 0xDF); // Reset source register + #define BOF 0x20 + #define POF 0x10 + #define R_BK 0x08 + #define R_WD 0x04 + #define R_SF 0x02 + #define R_EX 0x01 + +SFR(RTCCON, 0xD1); // Real-time clock control + #define RTCF 0x80 + #define RTCS1 0x40 + #define RTCS0 0x20 + #define ERTC 0x02 + #define RTCEN 0x01 + +SFR(RTCH, 0xD2); // Real-time clock register HIGH + +SFR(RTCL, 0xD3); // Real-time clock register LOW + +SFR(SADDR, 0xA9); // Serial port address register + +SFR(SADEN, 0xB9); // Serial port address enable + +SFR(SBUF, 0x99); // Serial Port data buffer register + +SFR(SCON, 0x98); // Serial port control + SBIT(FE, 0x98, 7); + SBIT(SM0, 0x98, 7); + SBIT(SM1, 0x98, 6); + SBIT(SM2, 0x98, 5); + SBIT(REN, 0x98, 4); + SBIT(TB8, 0x98, 3); + SBIT(RB8, 0x98, 2); + SBIT(TI, 0x98, 1); + SBIT(RI, 0x98, 0); + +SFR(SSTAT, 0xBA); // Serial port extended status register + #define DBMOD 0x80 + #define INTLO 0x40 + #define CIDIS 0x20 + #define DBISEL 0x10 + #define FE 0x08 + #define BR 0x04 + #define OE 0x02 + #define STINT 0x01 + +SFR(SP, 0x81); // Stack pointer + +SFR(TAMOD, 0x8F); // Timer0 and 1 auxiliary mode + #define T1M2 0x10 + #define T0M2 0x01 + +SFR(TCON, 0x88); // Timer0 and 1 control + SBIT(TF1, 0x88, 7); + SBIT(TR1, 0x88, 6); + SBIT(TF0, 0x88, 5); + SBIT(TR0, 0x88, 4); + SBIT(IE1, 0x88, 3); + SBIT(IT1, 0x88, 2); + SBIT(IE0, 0x88, 1); + SBIT(IT0, 0x88, 0); + +SFR(TH0, 0x8C); // Timer0 HIGH + +SFR(TH1, 0x8D); // Timer 1 HIGH + +SFR(TL0, 0x8A); // Timer 0 LOW + +SFR(TL1, 0x8B); // Timer 1 LOW + +SFR(TMOD, 0x89); // Timer0 and 1 mode + #define T1GATE 0x80 + #define T1C_T 0x40 + #define T1M1 0x20 + #define T1M0 0x10 + #define T0GATE 0x08 + #define T0C_T 0x04 + #define T0M1 0x02 + #define T0M0 0x01 + +SFR(TRIM, 0x96); // Internal oscillator trim register + #define RCCLK 0x80 + #define ENCLK 0x40 + #define TRIM_5 0x20 + #define TRIM_4 0x10 + #define TRIM_3 0x08 + #define TRIM_2 0x04 + #define TRIM_1 0x02 + #define TRIM_0 0x01 + +SFR(WDCON, 0xA7); // Watchdog control register + #define PRE2 0x80 //Watchdog Prescaler Tap Select bit 2 + #define PRE1 0x40 //Watchdog Prescaler Tap Select bit 1 + #define PRE0 0x20 //Watchdog Prescaler Tap Select bit 0 + #define WDRUN 0x04 //Watchdog Run Control + #define WDTOF 0x02 //Watchdog Timer Time-Out Flag + #define WDCLK 0x01 //Watchdog input clock select + +SFR(WDL, 0xC1); // Watchdog load + +SFR(WFEED1, 0xC2); // Watchdog feed 1 + +SFR(WFEED2, 0xC3); // Watchdog feed 2 + +#endif /*REG_P89LPC925_H*/ diff --git a/device/include/mcs51/P89LPC932.h b/device/include/mcs51/P89LPC932.h new file mode 100644 index 0000000..36da6f1 --- /dev/null +++ b/device/include/mcs51/P89LPC932.h @@ -0,0 +1,351 @@ +/*-------------------------------------------------------------------------- +P89LPC932.H +(English) +This header allows to use the microcontroler Philips P89LPC932 +with the compiler SDCC. + +Copyright (c) 2005 Omar Espinosa--e-mail: opiedrahita2003 AT yahoo.com. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +(Spanish-Español) +Archivo encabezador para el ucontrolador Philips P89LPC932. +Derechos de copy (DC) 2005. OMAR ESPINOSA P. E-mail: opiedrahita2003 AT yahoo.com +Uso libre +--------------------------------------------------------------------------*/ +#ifndef __REG932_H__ +#define __REG932_H__ + +/* BYTE Registers */ +__sfr __at (0x80) P0 ; +__sfr __at (0x90) P1 ; +__sfr __at (0xA0) P2 ; +__sfr __at (0xB0) P3 ; +__sfr __at (0xD0) PSW ; +__sfr __at (0xE0) ACC ; +__sfr __at (0xF0) B ; +__sfr __at (0x81) SP ; +__sfr __at (0x82) DPL ; +__sfr __at (0x83) DPH ; +__sfr __at (0x87) PCON ; +__sfr __at (0x88) TCON ; +__sfr __at (0x89) TMOD ; +__sfr __at (0x8A) TL0 ; +__sfr __at (0x8B) TL1 ; +__sfr __at (0x8C) TH0 ; +__sfr __at (0x8D) TH1 ; +__sfr __at (0xA8) IEN0 ; +__sfr __at (0xB8) IP0 ; +__sfr __at (0x98) SCON ; +__sfr __at (0x99) SBUF ; + + +__sfr __at (0xA2) AUXR1 ; +__sfr __at (0xA9) SADDR ; +__sfr __at (0xB9) SADEN ; +__sfr __at (0xCC) TL2 ; +__sfr __at (0xCD) TH2 ; +__sfr __at (0xBE) BRGR0 ; +__sfr __at (0xBF) BRGR1 ; +__sfr __at (0xBD) BRGCON ; +__sfr __at (0xEA) CCCRA ; +__sfr __at (0xEB) CCCRB ; +__sfr __at (0xEC) CCCRC ; +__sfr __at (0xED) CCCRD ; +__sfr __at (0xAC) CMP1 ; +__sfr __at (0xAD) CMP2 ; +__sfr __at (0xF1) DEECON ; +__sfr __at (0xF2) DEEDAT ; +__sfr __at (0xF3) DEEADR ; +__sfr __at (0x95) DIVM ; +__sfr __at (0xDB) I2ADR ; +__sfr __at (0xD8) I2CON ; +__sfr __at (0xDA) I2DAT ; +__sfr __at (0xDD) I2SCLH ; +__sfr __at (0xDC) I2SCLL ; +__sfr __at (0xD9) I2STAT ; +__sfr __at (0xAB) ICRAH ; +__sfr __at (0xAA) ICRAL ; +__sfr __at (0xAF) ICRBH ; +__sfr __at (0xAE) ICRBL ; +__sfr __at (0xE8) IEN1 ; +__sfr __at (0xF8) IP1 ; +__sfr __at (0xF7) IP1H ; +__sfr __at (0x94) KBCON ; +__sfr __at (0x86) KBMASK ; +__sfr __at (0x93) KBPATN ; +__sfr __at (0xEF) OCRAH ; +__sfr __at (0xEE) OCRAL ; +__sfr __at (0xFB) OCRBH ; +__sfr __at (0xFA) OCRBL ; +__sfr __at (0xFD) OCRCH ; +__sfr __at (0xFC) OCRCL ; +__sfr __at (0xFF) OCRDH ; +__sfr __at (0xFE) OCRDL ; +__sfr __at (0x84) P0M1 ; +__sfr __at (0x85) P0M2 ; +__sfr __at (0x91) P1M1 ; +__sfr __at (0x92) P1M2 ; +__sfr __at (0xA4) P2M1 ; +__sfr __at (0xA5) P2M2 ; +__sfr __at (0xB1) P3M1 ; +__sfr __at (0xB2) P3M2 ; +__sfr __at (0xB5) PCONA ; +__sfr __at (0xF6) PT0AD ; +__sfr __at (0xDF) RSTSRC ; +__sfr __at (0xD1) RTCCON ; +__sfr __at (0xD2) RTCH ; +__sfr __at (0xD3) RTCL ; +__sfr __at (0xBA) SSTAT ; +__sfr __at (0xE2) SPCTL ; +__sfr __at (0xE1) SPSTAT ; +__sfr __at (0xE3) SPDAT ; +__sfr __at (0x8F) TAMOD ; +__sfr __at (0xC8) TCR20 ; +__sfr __at (0xF9) TCR21 ; +__sfr __at (0xC9) TICR2 ; +__sfr __at (0xE9) TIFR2 ; +__sfr __at (0xDE) TISE2 ; +__sfr __at (0xCF) TOR2H ; +__sfr __at (0xCE) TOR2L ; +__sfr __at (0xCB) TPCR2H ; +__sfr __at (0xCA) TPCR2L ; +__sfr __at (0x96) TRIM ; +__sfr __at (0xA7) WDCON ; +__sfr __at (0xC1) WDL ; +__sfr __at (0xC2) WFEED1 ; +__sfr __at (0xC3) WFEED2 ; +__sfr __at (0xB7) IP0H ; + +/* BIT Registers */ +/* PSW */ +__sbit __at (0xD7) PSW_7; +__sbit __at (0xD6) PSW_6; +__sbit __at (0xD5) PSW_5; +__sbit __at (0xD4) PSW_4; +__sbit __at (0xD3) PSW_3; +__sbit __at (0xD2) PSW_2; +__sbit __at (0xD1) PSW_1; +__sbit __at (0xD0) PSW_0; + +#define CY PSW_7 +#define AC PSW_6 +#define F0 PSW_5 +#define RS1 PSW_4 +#define RS0 PSW_3 +#define OV PSW_2 +#define F1 PSW_1 +#define P PSW_0 + +/* TCON */ +__sbit __at (0x8F) TCON_7; +__sbit __at (0x8E) TCON_6; +__sbit __at (0x8D) TCON_5; +__sbit __at (0x8C) TCON_4; +__sbit __at (0x8B) TCON_3; +__sbit __at (0x8A) TCON_2; +__sbit __at (0x89) TCON_1; +__sbit __at (0x88) TCON_0; + +#define TF1 TCON_7 +#define TR1 TCON_6 +#define TF0 TCON_5 +#define TR0 TCON_4 +#define IE1 TCON_3 +#define IT1 TCON_2 +#define IE0 TCON_1 +#define IT0 TCON_0 + +/* IEN0 */ +__sbit __at (0xAF) IEN0_7; +__sbit __at (0xAE) IEN0_6; +__sbit __at (0xAD) IEN0_5; +__sbit __at (0xAC) IEN0_4; // alternatively "ESR" +__sbit __at (0xAC) IEN0_4; +__sbit __at (0xAB) IEN0_3; +__sbit __at (0xAA) IEN0_2; +__sbit __at (0xA9) IEN0_1; +__sbit __at (0xA8) IEN0_0; + +#define EA IEN0_7 +#define EWDRT IEN0_6 +#define EBO IEN0_5 +#define ES IEN0_4 // alternatively "ESR" +#define ESR IEN0_4 +#define ET1 IEN0_3 +#define EX1 IEN0_2 +#define ET0 IEN0_1 +#define EX0 IEN0_0 + +/* IEN1 */ +__sbit __at (0xEF) IEN1_7; +__sbit __at (0xEE) IEN1_6; +__sbit __at (0xEC) IEN1_4; +__sbit __at (0xEB) IEN1_3; +__sbit __at (0xEA) IEN1_2; +__sbit __at (0xE9) IEN1_1; +__sbit __at (0xE8) IEN1_0; + +#define EIEE IEN1_7 +#define EST IEN1_6 +#define ECCU IEN1_4 +#define ESPI IEN1_3 +#define EC IEN1_2 +#define EKBI IEN1_1 +#define EI2C IEN1_0 + +/* IP0 */ +__sbit __at (0xBE) IP0_6; +__sbit __at (0xBD) IP0_5; +__sbit __at (0xBC) IP0_4; // alternatively "PSR" +__sbit __at (0xBC) IP0_4; +__sbit __at (0xBB) IP0_3; +__sbit __at (0xBA) IP0_2; +__sbit __at (0xB9) IP0_1; +__sbit __at (0xB8) IP0_0; + +#define PWDRT IP0_6 +#define PB0 IP0_5 +#define PS IP0_4 // alternatively "PSR" +#define PSR IP0_4 +#define PT1 IP0_3 +#define PX1 IP0_2 +#define PT0 IP0_1 +#define PX0 IP0_0 + +/* SCON */ +__sbit __at (0x9F) SCON_7; // alternatively "FE" +__sbit __at (0x9E) SCON_6; +__sbit __at (0x9D) SCON_5; +__sbit __at (0x9C) SCON_4; +__sbit __at (0x9B) SCON_3; +__sbit __at (0x9A) SCON_2; +__sbit __at (0x99) SCON_1; +__sbit __at (0x98) SCON_0; + +#define SM0 SCON_7 // alternatively "FE" +#define FE SCON_7 +#define SM1 SCON_6 +#define SM2 SCON_5 +#define REN SCON_4 +#define TB8 SCON_3 +#define RB8 SCON_2 +#define TI SCON_1 +#define RI SCON_0 + +/* I2CON */ +__sbit __at (0xDE) I2CON_6; +__sbit __at (0xDD) I2CON_5; +__sbit __at (0xDC) I2CON_4; +__sbit __at (0xDB) I2CON_3; +__sbit __at (0xDA) I2CON_2; +__sbit __at (0xD8) I2CON_0; + +#define I2EN I2CON_6; +#define STA I2CON_5; +#define STO I2CON_4; +#define SI I2CON_3; +#define AA I2CON_2; +#define CRSEL I2CON_0; + +/* P0 */ +__sbit __at (0x87) P0_7; +__sbit __at (0x86) P0_6; // alternatively "CMP1" +__sbit __at (0x85) P0_5; +__sbit __at (0x84) P0_4; +__sbit __at (0x83) P0_3; +__sbit __at (0x82) P0_2; +__sbit __at (0x81) P0_1; +__sbit __at (0x80) P0_0; // alternatively "CMP2" + +#define KB7 P0_7 // alternatively "T1" +#define T1 P0_7 +#define KB6 P0_6 // alternatively "CMP1" +#define CMP1 P0_6 +#define KB5 P0_5 +#define KB4 P0_4 +#define KB3 P0_3 +#define KB2 P0_2 +#define KB1 P0_1 +#define KB0 P0_0 // alternatively "CMP2" +#define CMP2 P0_0 + +/* P1 */ +__sbit __at (0x97) P1_7; +__sbit __at (0x96) P1_6; +__sbit __at (0x95) P1_5; +__sbit __at (0x94) P1_4; +__sbit __at (0x93) P1_3; +__sbit __at (0x92) P1_2; +__sbit __at (0x91) P1_1; +__sbit __at (0x90) P1_0; + +#define OCC P1_7 +#define OCB P1_6 +#define RST P1_5 +#define INT1 P1_4 +#define INT0 P1_3 // alternatively "SDA" +#define SDA P1_3 +#define T0 P1_2 // alternatively "SCL" +#define SCL P1_2 +#define RxD P1_1 +#define TxD P1_0 + +/* P2 */ +__sbit __at (0xA7) P2_7; +__sbit __at (0xA6) P2_6; +__sbit __at (0xA5) P2_5; +__sbit __at (0xA4) P2_4; +__sbit __at (0xA3) P2_3; +__sbit __at (0xA2) P2_2; +__sbit __at (0xA1) P2_1; +__sbit __at (0xA0) P2_0; + +#define ICA P2_7 +#define OCA P2_6 +#define SPICLK P2_5 +#define SS P2_4 +#define MISO P2_3 +#define MOSI P2_2 +#define OCD P2_1 +#define ICB P2_0 + +/* P3 */ +__sbit __at (0xB1) P3_1; +__sbit __at (0xB0) P3_0; + +#define XTAL1 P3_1 +#define XTAL2 P3_0 + +/* TCR20 */ +__sbit __at (0xCF) TCR20_7; +__sbit __at (0xCE) TCR20_6; +__sbit __at (0xCD) TCR20_5; +__sbit __at (0xCC) TCR20_4; +__sbit __at (0xCB) TCR20_3; +__sbit __at (0xCA) TCR20_2; +__sbit __at (0xC9) TCR20_1; +__sbit __at (0xC8) TCR20_0; + +#define PLLEN TCR20_7 +#define HLTRN TCR20_6 +#define HLTEN TCR20_5 +#define ALTCD TCR20_4 +#define ALTAB TCR20_3 +#define TDIR2 TCR20_2 +#define TMOD21 TCR20_1 +#define TMOD20 TCR20_0 + +#endif diff --git a/device/include/mcs51/P89c51RD2.h b/device/include/mcs51/P89c51RD2.h new file mode 100644 index 0000000..a5b5268 --- /dev/null +++ b/device/include/mcs51/P89c51RD2.h @@ -0,0 +1,256 @@ +/*-------------------------------------------------------------------------- +P89c51RD2.H +(English) +This header allows to use the microcontroler Philips P89c51RD2 +with the compiler SDCC. + +Copyright (c) 2005 Omar Espinosa--e-mail: opiedrahita2003 AT yahoo.com. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +(Spanish-Español) +Archivo encabezador para el ucontrolador Philips P89c51RD2. +Derechos de copy (DC) 2005. OMAR ESPINOSA P. E-mail: opiedrahita2003 AT yahoo.com +Uso libre +--------------------------------------------------------------------------*/ + +#ifndef __P89c51RD2_H__ +#define __P89c51RD2_H__ + +/* BYTE Registers */ +__sfr __at (0x80) P0 ; +__sfr __at (0x90) P1 ; +__sfr __at (0xA0) P2 ; +__sfr __at (0xB0) P3 ; +__sfr __at (0xD0) PSW ; +__sfr __at (0xE0) ACC ; +__sfr __at (0xF0) B ; +__sfr __at (0x81) SP ; +__sfr __at (0x82) DPL ; +__sfr __at (0x83) DPH ; +__sfr __at (0x87) PCON ; +__sfr __at (0x88) TCON ; +__sfr __at (0x89) TMOD ; +__sfr __at (0x8A) TL0 ; +__sfr __at (0x8B) TL1 ; +__sfr __at (0x8C) TH0 ; +__sfr __at (0x8D) TH1 ; +__sfr __at (0xA8) IE ; +__sfr __at (0xB8) IP ; +__sfr __at (0x98) SCON ; +__sfr __at (0x99) SBUF ; + +/* 80C51Fx/Rx Extensions */ +__sfr __at (0x8E) AUXR ; +__sfr __at (0xA2) AUXR1 ; +__sfr __at (0xA9) SADDR ; +__sfr __at (0xB7) IPH ; +__sfr __at (0xB9) SADEN ; +__sfr __at (0xC8) T2CON ; +__sfr __at (0xC9) T2MOD ; +__sfr __at (0xCA) RCAP2L ; +__sfr __at (0xCB) RCAP2H ; +__sfr __at (0xCC) TL2 ; +__sfr __at (0xCD) TH2 ; +__sfr __at (0xD8) CCON ; +__sfr __at (0xD9) CMOD ; +__sfr __at (0xDA) CCAPM0 ; +__sfr __at (0xDB) CCAPM1 ; +__sfr __at (0xDC) CCAPM2 ; +__sfr __at (0xDD) CCAPM3 ; +__sfr __at (0xDE) CCAPM4 ; +__sfr __at (0xE9) CL ; +__sfr __at (0xEA) CCAP0L ; +__sfr __at (0xEB) CCAP1L ; +__sfr __at (0xEC) CCAP2L ; +__sfr __at (0xED) CCAP3L ; +__sfr __at (0xEE) CCAP4L ; +__sfr __at (0xF9) CH ; +__sfr __at (0xFA) CCAP0H ; +__sfr __at (0xFB) CCAP1H ; +__sfr __at (0xFC) CCAP2H ; +__sfr __at (0xFD) CCAP3H ; +__sfr __at (0xFE) CCAP4H ; + + +/* BIT Registers */ +/* PSW */ + +__sbit __at (0xD7) PSW_7; +__sbit __at (0xD6) PSW_6; +__sbit __at (0xD5) PSW_5; +__sbit __at (0xD4) PSW_4; +__sbit __at (0xD3) PSW_3; +__sbit __at (0xD2) PSW_2; +__sbit __at (0xD0) PSW_0; + +#define CY PSW_7 +#define AC PSW_6 +#define F0 PSW_5 +#define RS1 PSW_4 +#define RS0 PSW_3 +#define OV PSW_2 +#define P PSW_0 + +/* TCON */ +__sbit __at (0x8F) TCON_7; +__sbit __at (0x8E) TCON_6; +__sbit __at (0x8D) TCON_5; +__sbit __at (0x8C) TCON_4; +__sbit __at (0x8B) TCON_3; +__sbit __at (0x8A) TCON_2; +__sbit __at (0x89) TCON_1; +__sbit __at (0x88) TCON_0; + +#define TF1 TCON_7 +#define TR1 TCON_6 +#define TF0 TCON_5 +#define TR0 TCON_4 +#define IE1 TCON_3 +#define IT1 TCON_2 +#define IE0 TCON_1 +#define IT0 TCON_0 + +/* IE */ +__sbit __at (0xAF) IE_7; +__sbit __at (0xAE) IE_6; +__sbit __at (0xAD) IE_5; +__sbit __at (0xAC) IE_4; +__sbit __at (0xAB) IE_3; +__sbit __at (0xAA) IE_2; +__sbit __at (0xA9) IE_1; +__sbit __at (0xA8) IE_0; + +#define EA IE_7 +#define EC IE_6 +#define ET2 IE_5 +#define ES IE_4 +#define ET1 IE_3 +#define EX1 IE_2 +#define ET0 IE_1 +#define EX0 IE_0 + +/* IP */ +__sbit __at (0xBE) IP_6; +__sbit __at (0xBD) IP_5; +__sbit __at (0xBC) IP_4; +__sbit __at (0xBB) IP_3; +__sbit __at (0xBA) IP_2; +__sbit __at (0xB9) IP_1; +__sbit __at (0xB8) IP_0; + +#define PPC IP_6 +#define PT2 IP_5 +#define PS IP_4 +#define PT1 IP_3 +#define PX1 IP_2 +#define PT0 IP_1 +#define PX0 IP_0 + +/* P3 */ +__sbit __at (0xB7) P3_7; +__sbit __at (0xB6) P3_6; +__sbit __at (0xB5) P3_5; +__sbit __at (0xB4) P3_4; +__sbit __at (0xB3) P3_3; +__sbit __at (0xB2) P3_2; +__sbit __at (0xB1) P3_1; +__sbit __at (0xB0) P3_0; + +#define RD P3_7 +#define WR P3_6 +#define T1 P3_5 +#define T0 P3_4 +#define INT1 P3_3 +#define INT0 P3_2 +#define TXD P3_1 +#define RXD P3_0 + +/* SCON */ +__sbit __at (0x9F) SCON_7; // alternatively "FE" +__sbit __at (0x9E) SCON_6; +__sbit __at (0x9D) SCON_5; +__sbit __at (0x9C) SCON_4; +__sbit __at (0x9B) SCON_3; +__sbit __at (0x9A) SCON_2; +__sbit __at (0x99) SCON_1; +__sbit __at (0x98) SCON_0; + +#define SM0 SCON_7 // alternatively "FE" +#define FE SCON_7 +#define SM1 SCON_6 +#define SM2 SCON_5 +#define REN SCON_4 +#define TB8 SCON_3 +#define RB8 SCON_2 +#define TI SCON_1 +#define RI SCON_0 + +/* P1 */ +__sbit __at (0x97) P1_7; +__sbit __at (0x96) P1_6; +__sbit __at (0x95) P1_5; +__sbit __at (0x94) P1_4; +__sbit __at (0x93) P1_3; +__sbit __at (0x92) P1_2; +__sbit __at (0x91) P1_1; +__sbit __at (0x90) P1_0; + +#define CEX4 P1_7 +#define CEX3 P1_6 +#define CEX2 P1_5 +#define CEX1 P1_4 +#define CEX0 P1_3 +#define ECI P1_2 +#define T2EX P1_1 +#define T2 P1_0 + +/* T2CON */ +__sbit __at (0xCF) T2CON_7; +__sbit __at (0xCE) T2CON_6; +__sbit __at (0xCD) T2CON_5; +__sbit __at (0xCC) T2CON_4; +__sbit __at (0xCB) T2CON_3; +__sbit __at (0xCA) T2CON_2; +__sbit __at (0xC9) T2CON_1; +__sbit __at (0xC8) T2CON_0; + +#define TF2 T2CON_7 +#define EXF2 T2CON_6 +#define RCLK T2CON_5 +#define TCLK T2CON_4 +#define EXEN2 T2CON_3 +#define TR2 T2CON_2 +#define C_T2 T2CON_1 +#define CP_RL2 T2CON_0 + +/* CCON */ +__sbit __at (0xDF) CCON_7; +__sbit __at (0xDE) CCON_6; +__sbit __at (0xDC) CCON_4; +__sbit __at (0xDB) CCON_3; +__sbit __at (0xDA) CCON_2; +__sbit __at (0xD9) CCON_1; +__sbit __at (0xD8) CCON_0; + +#define CF CCON_7 +#define CR CCON_6 +#define CCF4 CCON_4 +#define CCF3 CCON_3 +#define CCF2 CCON_2 +#define CCF1 CCON_1 +#define CCF0 CCON_0 + +#endif diff --git a/device/include/mcs51/README b/device/include/mcs51/README new file mode 100644 index 0000000..b8cde2b --- /dev/null +++ b/device/include/mcs51/README @@ -0,0 +1,6 @@ +sdcc/device/include/mcs51 +------------------------- + +A lot of the include files in this subdirectory used to be in the directory +one level up from here. Since CVS doesn't support moving files, these files +were removed there and added here. diff --git a/device/include/mcs51/SST89x5xRDx.h b/device/include/mcs51/SST89x5xRDx.h new file mode 100644 index 0000000..43f7f01 --- /dev/null +++ b/device/include/mcs51/SST89x5xRDx.h @@ -0,0 +1,343 @@ +/*------------------------------------------------------------------------- + Register Declarations for SST SST89E516RD2, ST89E516RD, SST89V516RD2, and + SST89V516RD Processors (Based on datasheed S71273-03-000 1/07) + + Written By - Jesus Calvino-Fraga / jesusc at ece.ubc.ca (February 2007) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option); any later version + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef REG_SST89x5xRDx_H +#define REG_SST89x5xRDx_H + +#include + +// From TABLE 3-5: CPU related SFRs + +SFR(ACC, 0xE0); // Accumulator + SBIT(ACC_0, 0xE0, 0); // Accumulator bit 0 + SBIT(ACC_1, 0xE0, 1); // Accumulator bit 1 + SBIT(ACC_2, 0xE0, 2); // Accumulator bit 2 + SBIT(ACC_3, 0xE0, 3); // Accumulator bit 3 + SBIT(ACC_4, 0xE0, 4); // Accumulator bit 4 + SBIT(ACC_5, 0xE0, 5); // Accumulator bit 5 + SBIT(ACC_6, 0xE0, 6); // Accumulator bit 6 + SBIT(ACC_7, 0xE0, 7); // Accumulator bit 7 +SFR(B, 0xF0); // B Register + SBIT(B_0, 0xF0, 0); // Register B bit 0 + SBIT(B_1, 0xF0, 1); // Register B bit 1 + SBIT(B_2, 0xF0, 2); // Register B bit 2 + SBIT(B_3, 0xF0, 3); // Register B bit 3 + SBIT(B_4, 0xF0, 4); // Register B bit 4 + SBIT(B_5, 0xF0, 5); // Register B bit 5 + SBIT(B_6, 0xF0, 6); // Register B bit 6 + SBIT(B_7, 0xF0, 7); // Register B bit 7 +SFR(PSW, 0xD0); // Program Status Word + SBIT(P, 0xD0, 0); // Parity Flag + SBIT(F1, 0xD0, 1); // User-Defined Flag + SBIT(OV, 0xD0, 2); // Overflow Flag + SBIT(RS0, 0xD0, 3); // Register Bank Select 0 + SBIT(RS1, 0xD0, 4); // Register Bank Select 1 + SBIT(F0, 0xD0, 5); // User-Defined Flag + SBIT(AC, 0xD0, 6); // Auxiliary Carry Flag + SBIT(CY, 0xD0, 7); // Carry Flag +SFR(SP, 0x81); // Stack Pointer +SFR(DPL, 0x82); // Data Pointer Low +SFR(DPH, 0x83); // Data Pointer High +SFR(IE, 0xA8); // Interrupt Enable + SBIT(EA, 0xA8, 7); // Global Interrupt Enable + SBIT(EC, 0xA8, 6); // PCA Interrupt Enable + SBIT(ET2, 0xA8, 5); // Timer 2 Interrupt Enable + SBIT(ES, 0xA8, 4); // Serial Interrupt Enable + SBIT(ET1, 0xA8, 3); // Timer 1 Interrupt Enable + SBIT(EX1, 0xA8, 2); // External 1 Interrupt Enable + SBIT(ET0, 0xA8, 1); // Timer 0 Interrupt Enable + SBIT(EX0, 0xA8, 0); // External 0 Interrupt Enable +SFR(IEA, 0xE8); // Interrupt Enable A + SBIT(EBO, 0xE8, 3); // Brown-out Interrupt Enable. (Vector is 0x00b4) +SFR(IP, 0xB8); // Interrupt Priority Reg + SBIT(PPC, 0xB8, 6); // PCA interrupt priority bit + SBIT(PT2, 0xB8, 5); // Timer 2 interrupt priority bit + SBIT(PS, 0xB8, 4); // Serial Port interrupt priority bit + SBIT(PT1, 0xB8, 3); // Timer 1 interrupt priority bit + SBIT(PX1, 0xB8, 2); // External interrupt 1 priority bit + SBIT(PT0, 0xB8, 1); // Timer 0 interrupt priority bit + SBIT(PX0, 0xB8, 0); // External interrupt 0 priority bit +SFR(IPH, 0xB7); // Interrupt Priority Reg High + #define PPCH 0x40 // PCA Interrupt Priority High Bit + #define PT2H 0x20 // Timer 2 Interrupt Interrupt Priority High Bit + #define PSH 0x10 // Serial Port Interrupt Priority High Bit + #define PT1H 0x08 // Timer 1 Interrupt Priority High Bit + #define PX1H 0x04 // External Interrupt 1 Priority High Bit + #define PT0H 0x02 // Timer 0 Interrupt Priority High Bit + #define PX0H 0x01 // External Interrupt 0 Priority High Bit +SFR(IP1, 0xF8); // Interrupt Priority Reg A + SBIT(PBO, 0xF8, 4); // Brown-out interrupt priority bit + SBIT(PX2, 0xF8, 1); // External Interrupt 2 priority bit + SBIT(PX3, 0xF8, 2); // External Interrupt 3 priority bit +SFR(IP1H, 0xF7); // Interrupt Priority Reg A High + #define PBOH 0x08 // Brown-out Interrupt priority bit high + #define PX2H 0x02 // External Interrupt 2 priority bit high + #define PX3H 0x04 // External Interrupt 3 priority bit high +SFR(PCON, 0x87); // Power Control + #define SMOD1 0x80 // Double Baud rate bit + #define SMOD0 0x40 // FE/SM0 Selection bit + #define BOF 0x20 // Brown-out detection status bit + #define POF 0x10 // Power-on reset status bit + #define GF1 0x08 // General-purpose flag bit + #define GF0 0x04 // General-purpose flag bit + #define PD 0x02 // Power-down bit + #define IDL 0x01 // Idle mode bit +SFR(AUXR, 0x8E); // Auxiliary Reg + #define EXTRAM 0x02 // Internal/External RAM access + #define AO 0x01 // Disable/Enable ALE +SFR(AUXR1, 0xA2); // Auxiliary Reg 1 + #define GF2 0x08 // General purpose user-defined flag + #define DPS 0x01 // DPTR registers select bit +SFR(XICON, 0xAE); // External Interrupt Control + #define EX2 0x04 + #define IE2 0x02 + #define IT2 0x01 + #define EX3 0x40 + #define IE3 0x20 + #define IT3 0x10 + +// TABLE 3-6: Flash Memory Programming SFRs + +SFR(SFCF, 0xB1); // SuperFlash Configuration + #define IAPEN 0x40 // Enable IAP operation + #define SWR 0x02 // Software Reset + #define BSEL 0x01 // Program memory block switching bit +SFR(SFCM, 0xB2); // SuperFlash Command + #define FIE 0x80 // Flash Interrupt Enable + #define CHIP_ERASE 0x01 + #define SECTOR_ERASE 0x0B + #define BLOCK_ERASE 0x0D + #define BYTE_VERIFY 0x0C + #define BYTE_PROGRAM 0x0E + #define PROG_SB1 0x0F + #define PROG_SB2 0x03 + #define PROG_SB3 0x05 + #define PROG_SC0 0x09 + #define ENABLE_CLOCK_DOUBLE 0x08 +SFR(SFAL, 0xB3); // SuperFlash Address Low Register - A7 to A0 +SFR(SFAH, 0xB4); // SuperFlash Address High Register - A15 to A8 +SFR(SFDT, 0xB5); // SuperFlash Data Register +SFR(SFST, 0xB6); // SuperFlash Status + #define SB1_i 0x80 // Security Bit 1 status (inverse of SB1 bit) + #define SB2_i 0x40 // Security Bit 2 status (inverse of SB2 bit) + #define SB3_i 0x20 // Security Bit 3 status (inverse of SB3 bit) + #define EDC_i 0x08 // Double Clock Status + #define FLASH_BUSY 0x04 // Flash operation completion polling bit + +// TABLE 3-7: Watchdog Timer SFRs + +SFR(WDTC, 0xC0); // Watchdog Timer Control + SBIT(WDOUT, 0xC0, 4); // Watchdog output enable + SBIT(WDRE, 0xC0, 3); // Watchdog timer reset enable + SBIT(WDTS, 0xC0, 2); // Watchdog timer reset flag + SBIT(WDT, 0xC0, 1); // Watchdog timer refresh + SBIT(SWDT, 0xC0, 0); // Start watchdog timer +SFR(WDTD, 0x85); // Watchdog Timer Data/Reload + +// TABLE 3-8: Timer/Counters SFRs + +SFR(TMOD, 0x89); // Timer/Counter Mode Control GATE C/T# M1 M0 GATE C/T# M1 M0 + #define GATE1 0x80 // External enable for timer 1 + #define C_T1 0x40 // Timer or counter select for timer 1 + #define M1_1 0x20 // Operation mode bit 1 for timer 1 + #define M0_1 0x10 // Operation mode bit 0 for timer 1 + #define GATE0 0x08 // External enable for timer 0 + #define C_T0 0x04 // Timer or counter select for timer 0 + #define M1_0 0x02 // Operation mode bit 1 for timer 0 + #define M0_0 0x01 // Operation mode bit 0 for timer 0 +SFR(TCON, 0x88); // Timer/Counter Control TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 + SBIT(TF1, 0x88, 7); // Timer 1 overflow flag + SBIT(TR1, 0x88, 6); // Timer 1 run control flag + SBIT(TF0, 0x88, 5); // Timer 0 overflow flag + SBIT(TR0, 0x88, 4); // Timer 0 run control flag + SBIT(IE1, 0x88, 3); // Interrupt 1 flag + SBIT(IT1, 0x88, 2); // Interrupt 1 type control bit + SBIT(IE0, 0x88, 1); // Interrupt 0 flag + SBIT(IT0, 0x88, 0); // Interrupt 0 type control bit +SFR(TH0, 0x8C); // Timer 0 MSB +SFR(TL0, 0x8A); // Timer 0 LSB +SFR(TH1, 0x8D); // Timer 1 MSB +SFR(TL1, 0x8B); // Timer 1 LSB +SFR(T2CON, 0xC8); // Timer / Counter 2 Control + SBIT(TF2, 0xC8, 7); // Timer 2 overflow flag + SBIT(EXF2, 0xC8, 6); // Timer 2 external flag + SBIT(RCLK, 0xC8, 5); // Receive clock flag + SBIT(TCLK, 0xC8, 4); // Transmit clock flag + SBIT(EXEN2, 0xC8, 3); // Timer 2 external enable flag + SBIT(TR2, 0xC8, 2); // Start/stop control for timer 2 + SBIT(C_T2, 0xC8, 1); // Timer or coutner select + SBIT(CP_RL2,0xC8, 0); // Capture/reload flag +SFR(T2MOD, 0xC9); // Timer 2 Mode Control + #define DCEN 0x02 // Down count enable bit + #define T2OE 0x01 // Timer 2 output enable bit +SFR(TH2, 0xCD); // Timer 2 MSB +SFR(TL2, 0xCC); // Timer 2 LSB +SFR(RCAP2H, 0xCB); // Timer 2 Capture MSB +SFR(RCAP2L, 0xCA); // Timer 2 Capture LSB + +// TABLE 3-9: Interface SFRs + +SFR(SBUF, 0x99); // Serial Data Buffer +SFR(SCON, 0x98); // Serial Port Control + SBIT(FE, 0x98, 7); // Framing Error when reading, SM0 when writing + SBIT(SM0, 0x98, 7); // Serial Port Mode Bit 0 + SBIT(SM1, 0x98, 6); // Serial Port Mode Bit 1 + SBIT(SM2, 0x98, 5); // Serial Port Mode Bit 2 + SBIT(REN, 0x98, 4); // Enables serial reception + SBIT(TB8, 0x98, 3); // The 9th data bit that will be transmitted in Modes 2 and 3 + SBIT(RB8, 0x98, 2); // In Modes 2 and 3, the 9th data bit that was received + SBIT(TI, 0x98, 1); // Transmit interrupt flag + SBIT(RI, 0x98, 0); // Receive interrupt flag +SFR(SADDR, 0xA9); // Slave Address +SFR(SADEN, 0xB9); // Slave Address Mask +SFR(SPCR, 0xD5); // SPI Control Register + #define SPIE 0x80 // If both SPIE and ES are set to one, SPI interrupts are enabled + #define SPE 0x40 // SPI enable bit. When set enables SPI + #define DORD 0x20 // Data trans. order. 0=MSB first; 1=LSB first + #define MSTR 0x10 // 1=master mode. 0=slave mode + #define CPOL 0x08 // 1=SCK is high when idle (active low), 0=SCK is low when idle (active high) + #define CPHA 0x04 // 1=shift triggered on the trailing edge of SCK. 0=shift trig. on leading edge + #define SPR1 0x02 // SPI Clork Rate select bit 1 + #define SPR0 0x01 // SPI Clork Rate select bit 0 + // 00 = Fosc/4 + // 01 = Fosc/16 + // 10 = Fosc/64 + // 11 = Fosc/128 +SFR(SPSR, 0xAA); // SPI Status Register + #define SPIF 0x80 // SPI interrupt flag + #define WCOL 0x40 // Write collision Flag +SFR(SPDR, 0x86); // SPI Data Register +SFR(P0, 0x80); // Port 0 + SBIT(P0_0, 0x80, 0); // Port 0 bit 0 + SBIT(P0_1, 0x80, 1); // Port 0 bit 1 + SBIT(P0_2, 0x80, 2); // Port 0 bit 2 + SBIT(P0_3, 0x80, 3); // Port 0 bit 3 + SBIT(P0_4, 0x80, 4); // Port 0 bit 4 + SBIT(P0_5, 0x80, 5); // Port 0 bit 5 + SBIT(P0_6, 0x80, 6); // Port 0 bit 6 + SBIT(P0_7, 0x80, 7); // Port 0 bit 7 +SFR(P1, 0x90); // Port 1 + SBIT(P1_0, 0x90, 0); // Port 1 bit 0 + SBIT(P1_1, 0x90, 1); // Port 1 bit 1 + SBIT(P1_2, 0x90, 2); // Port 1 bit 2 + SBIT(P1_3, 0x90, 3); // Port 1 bit 3 + SBIT(P1_4, 0x90, 4); // Port 1 bit 4 + SBIT(P1_5, 0x90, 5); // Port 1 bit 5 + SBIT(P1_6, 0x90, 6); // Port 1 bit 6 + SBIT(P1_7, 0x90, 7); // Port 1 bit 7 + // Alternate names + SBIT(T2, 0x90, 0); // Port 1 bit 0 + SBIT(T2EX, 0x90, 1); // Port 1 bit 1 + SBIT(ECI, 0x90, 2); // Port 1 bit 2 + SBIT(CEX0, 0x90, 3); // Port 1 bit 3 + SBIT(CEX1, 0x90, 4); // Port 1 bit 4 + SBIT(CEX2, 0x90, 5); // Port 1 bit 5 + SBIT(CEX3, 0x90, 6); // Port 1 bit 6 + SBIT(CEX4, 0x90, 7); // Port 1 bit 7 + // More alternate names + SBIT(SS, 0x90, 4); // Port 1 bit 4 + SBIT(MOSI, 0x90, 5); // Port 1 bit 5 + SBIT(MISO, 0x90, 6); // Port 1 bit 6 + SBIT(SCK, 0x90, 7); // Port 1 bit 7 +SFR(P2, 0xA0); // Port 2 + SBIT(P2_0, 0xA0, 0); // Port 2 bit 0 + SBIT(P2_1, 0xA0, 1); // Port 2 bit 1 + SBIT(P2_2, 0xA0, 2); // Port 2 bit 2 + SBIT(P2_3, 0xA0, 3); // Port 2 bit 3 + SBIT(P2_4, 0xA0, 4); // Port 2 bit 4 + SBIT(P2_5, 0xA0, 5); // Port 2 bit 5 + SBIT(P2_6, 0xA0, 6); // Port 2 bit 6 + SBIT(P2_7, 0xA0, 7); // Port 2 bit 7 +SFR(P3, 0xB0); // Port 3 + SBIT(P3_0, 0xB0, 0); // Port 2 bit 0 + SBIT(P3_1, 0xB0, 1); // Port 2 bit 1 + SBIT(P3_2, 0xB0, 2); // Port 2 bit 2 + SBIT(P3_3, 0xB0, 3); // Port 2 bit 3 + SBIT(P3_4, 0xB0, 4); // Port 2 bit 4 + SBIT(P3_5, 0xB0, 5); // Port 2 bit 5 + SBIT(P3_6, 0xB0, 6); // Port 2 bit 6 + SBIT(P3_7, 0xB0, 7); // Port 2 bit 7 + // Alternate names + SBIT(RXD, 0xB0, 0); // Port 2 bit 0 + SBIT(TXD, 0xB0, 1); // Port 2 bit 1 + SBIT(INT0, 0xB0, 2); // Port 2 bit 2 + SBIT(INT1, 0xB0, 3); // Port 2 bit 3 + SBIT(T0, 0xB0, 4); // Port 2 bit 4 + SBIT(T1, 0xB0, 5); // Port 2 bit 5 + SBIT(WR, 0xB0, 6); // Port 2 bit 6 + SBIT(RD, 0xB0, 7); // Port 2 bit 7 +SFR(P4, 0xA5); // Port 4 - not bit addressable + #define P4_0 0x01 + #define P4_1 0x02 + #define P4_2 0x04 + #define P4_3 0x08 + +// TABLE 3-10: PCA SFRs + +SFR(CH, 0xF9); // PCA Timer/Counter High +SFR(CL, 0xE9); // PCA Timer/Counter Low +SFR(CCON, 0xD8); // PCA Timer/Counter Control Register CF CR - CCF4 CCF3 CCF2 CCF1 CCF0 00x00000b + SBIT(CF, 0xD8, 7); // PCA Counter overflow flag + SBIT(CR, 0xD8, 6); // PCA Counter Run Control Bit + SBIT(CCF4, 0xD8, 4); // PCA Module 4 Interrupt Flag + SBIT(CCF3, 0xD8, 3); // PCA Module 3 Interrupt Flag + SBIT(CCF2, 0xD8, 2); // PCA Module 2 Interrupt Flag + SBIT(CCF1, 0xD8, 1); // PCA Module 1 Interrupt Flag + SBIT(CCF0, 0xD8, 0); // PCA Module 0 Interrupt Flag +SFR(CMOD, 0xD9); // PCA Timer/Counter Mode Register + #define CIDL 0x80 // CIDL=0 program the PCA counter to work during idle mode + #define WDTE 0x40 // Watchdog Timer Enable + #define CPS1 0x04 // PCA Count Pulse Select bit 1 + #define CPS0 0x02 // PCA Count Pulse Select bit 0 + // 00=Internal clock, Fosc/6 + // 01=Internal clock, Fosc/6 + // 10=Timer 0 overflow + // 11=External clock at ECI/P1.2 pin (max rate=Fosc/4) + #define ECF 0x01 // PCA Enable Counter Overflow Interrupt +SFR(CCAP0H, 0xFA); // PCA Module 0 Compare/Capture Register High +SFR(CCAP0L, 0xEA); // PCA Module 0 Compare/Capture Register Low +SFR(CCAP1H, 0xFB); // PCA Module 1 Compare/Capture Register High +SFR(CCAP1L, 0xEB); // PCA Module 1 Compare/Capture Register Low +SFR(CCAP2H, 0xFC); // PCA Module 2 Compare/Capture Register High +SFR(CCAP2L, 0xEC); // PCA Module 2 Compare/Capture Register Low +SFR(CCAP3H, 0xFD); // PCA Module 3 Compare/Capture Register High +SFR(CCAP3L, 0xED); // PCA Module 3 Compare/Capture Register Low +SFR(CCAP4H, 0xFE); // PCA Module 4 Compare/Capture Register High +SFR(CCAP4L, 0xEE); // PCA Module 4 Compare/Capture Register Low +SFR(CCAPM0, 0xDA); // PCA Compare/Capture Module 0 Mode Register +SFR(CCAPM1, 0xDB); // PCA Compare/Capture Module 1 Mode Register +SFR(CCAPM2, 0xDC); // PCA Compare/Capture Module 2 Mode Register +SFR(CCAPM3, 0xDD); // PCA Compare/Capture Module 3 Mode Register +SFR(CCAPM4, 0xDE); // PCA Compare/Capture Module 4 Mode Register +// The preceding five registers have the following bits: + #define ECOM 0x40 // Enable Comparator + #define CAPP 0x20 // 1=enables positive edge capture + #define CAPN 0x10 // 1=enables negative edge capture + #define MAT 0x08 // When counter matches sets CCFn bit causing and interrupt + #define TOG 0x04 // Toggle output on match + #define PWM 0x02 // Pulse width modulation mode + #define ECCF 0x01 // Enable CCF interrupt + +#endif /*REG_SST89x5xRDx_H*/ diff --git a/device/include/mcs51/XC866.h b/device/include/mcs51/XC866.h new file mode 100644 index 0000000..78ba0b1 --- /dev/null +++ b/device/include/mcs51/XC866.h @@ -0,0 +1,399 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Infineon XC866 + + Copyright (C) 2005 - Llewellyn van Zyl, eduprep@myconnection.co.za + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef XC866_H +#define XC866_H + +// SFR byte definitions +__sfr __at (0xE0) A; +__sfr __at (0xCA) ADC_CHCTR0; +__sfr __at (0xCB) ADC_CHCTR1; +__sfr __at (0xCC) ADC_CHCTR2; +__sfr __at (0xCD) ADC_CHCTR3; +__sfr __at (0xCE) ADC_CHCTR4; +__sfr __at (0xCF) ADC_CHCTR5; +__sfr __at (0xD2) ADC_CHCTR6; +__sfr __at (0xD3) ADC_CHCTR7; +__sfr __at (0xCB) ADC_CHINCR; +__sfr __at (0xCA) ADC_CHINFR; +__sfr __at (0xCD) ADC_CHINPR; +__sfr __at (0xCC) ADC_CHINSR; +__sfr __at (0xCA) ADC_CRCR1; +__sfr __at (0xCC) ADC_CRMR1; +__sfr __at (0xCB) ADC_CRPR1; +__sfr __at (0xCF) ADC_ETRCR; +__sfr __at (0xCF) ADC_EVINCR; +__sfr __at (0xCE) ADC_EVINFR; +__sfr __at (0xD3) ADC_EVINPR; +__sfr __at (0xD2) ADC_EVINSR; +__sfr __at (0xCA) ADC_GLOBCTR; +__sfr __at (0xCB) ADC_GLOBSTR; +__sfr __at (0xCE) ADC_INPCR0; +__sfr __at (0xCD) ADC_LCBR; +__sfr __at (0xD1) ADC_PAGE; +__sfr __at (0xCC) ADC_PRAR; +__sfr __at (0xCF) ADC_Q0R0; +__sfr __at (0xD2) ADC_QBUR0; +__sfr __at (0xD2) ADC_QINR0; +__sfr __at (0xCD) ADC_QMR0; +__sfr __at (0xCE) ADC_QSR0; +__sfr __at (0xCA) ADC_RCR0; +__sfr __at (0xCB) ADC_RCR1; +__sfr __at (0xCC) ADC_RCR2; +__sfr __at (0xCD) ADC_RCR3; +__sfr __at (0xCB) ADC_RESR0H; +__sfr __at (0xCA) ADC_RESR0L; +__sfr __at (0xCD) ADC_RESR1H; +__sfr __at (0xCC) ADC_RESR1L; +__sfr __at (0xCF) ADC_RESR2H; +__sfr __at (0xCE) ADC_RESR2L; +__sfr __at (0xD3) ADC_RESR3H; +__sfr __at (0xD2) ADC_RESR3L; +__sfr __at (0xCB) ADC_RESRA0H; +__sfr __at (0xCA) ADC_RESRA0L; +__sfr __at (0xCD) ADC_RESRA1H; +__sfr __at (0xCC) ADC_RESRA1L; +__sfr __at (0xCF) ADC_RESRA2H; +__sfr __at (0xCE) ADC_RESRA2L; +__sfr __at (0xD3) ADC_RESRA3H; +__sfr __at (0xD2) ADC_RESRA3L; +__sfr __at (0xCE) ADC_VFCR; +__sfr __at (0xF0) B; +__sfr __at (0xBD) BCON; +__sfr __at (0xBE) BG; +__sfr __at (0xFB) CCU6_CC60RH; +__sfr __at (0xFA) CCU6_CC60RL; +__sfr __at (0xFB) CCU6_CC60SRH; +__sfr __at (0xFA) CCU6_CC60SRL; +__sfr __at (0xFD) CCU6_CC61RH; +__sfr __at (0xFC) CCU6_CC61RL; +__sfr __at (0xFD) CCU6_CC61SRH; +__sfr __at (0xFC) CCU6_CC61SRL; +__sfr __at (0xFF) CCU6_CC62RH; +__sfr __at (0xFE) CCU6_CC62RL; +__sfr __at (0xFF) CCU6_CC62SRH; +__sfr __at (0xFE) CCU6_CC62SRL; +__sfr __at (0x9B) CCU6_CC63RH; +__sfr __at (0x9A) CCU6_CC63RL; +__sfr __at (0x9B) CCU6_CC63SRH; +__sfr __at (0x9A) CCU6_CC63SRL; +__sfr __at (0xA7) CCU6_CMPMODIFH; +__sfr __at (0xA6) CCU6_CMPMODIFL; +__sfr __at (0xFF) CCU6_CMPSTATH; +__sfr __at (0xFE) CCU6_CMPSTATL; +__sfr __at (0x9D) CCU6_IENH; +__sfr __at (0x9C) CCU6_IENL; +__sfr __at (0x9F) CCU6_INPH; +__sfr __at (0x9E) CCU6_INPL; +__sfr __at (0x9D) CCU6_ISH; +__sfr __at (0x9C) CCU6_ISL; +__sfr __at (0xA5) CCU6_ISRH; +__sfr __at (0xA4) CCU6_ISRL; +__sfr __at (0xA5) CCU6_ISSH; +__sfr __at (0xA4) CCU6_ISSL; +__sfr __at (0xA7) CCU6_MCMCTR; +__sfr __at (0x9B) CCU6_MCMOUTH; +__sfr __at (0x9A) CCU6_MCMOUTL; +__sfr __at (0x9F) CCU6_MCMOUTSH; +__sfr __at (0x9E) CCU6_MCMOUTSL; +__sfr __at (0xFD) CCU6_MODCTRH; +__sfr __at (0xFC) CCU6_MODCTRL; +__sfr __at (0xA3) CCU6_PAGE; +__sfr __at (0x9F) CCU6_PISEL0H; +__sfr __at (0x9E) CCU6_PISEL0L; +__sfr __at (0xA4) CCU6_PISEL2; +__sfr __at (0xA6) CCU6_PSLR; +__sfr __at (0xA5) CCU6_T12DTCH; +__sfr __at (0xA4) CCU6_T12DTCL; +__sfr __at (0xFB) CCU6_T12H; +__sfr __at (0xFA) CCU6_T12L; +__sfr __at (0x9B) CCU6_T12MSELH; +__sfr __at (0x9A) CCU6_T12MSELL; +__sfr __at (0x9D) CCU6_T12PRH; +__sfr __at (0x9C) CCU6_T12PRL; +__sfr __at (0xFD) CCU6_T13H; +__sfr __at (0xFC) CCU6_T13L; +__sfr __at (0x9F) CCU6_T13PRH; +__sfr __at (0x9E) CCU6_T13PRL; +__sfr __at (0xA7) CCU6_TCTR0H; +__sfr __at (0xA6) CCU6_TCTR0L; +__sfr __at (0xFB) CCU6_TCTR2H; +__sfr __at (0xFA) CCU6_TCTR2L; +__sfr __at (0x9D) CCU6_TCTR4H; +__sfr __at (0x9C) CCU6_TCTR4L; +__sfr __at (0xFF) CCU6_TRPCTRH; +__sfr __at (0xFE) CCU6_TRPCTRL; +__sfr __at (0xBA) CMCON; +__sfr __at (0x83) DPH; +__sfr __at (0x82) DPL; +__sfr __at (0xA2) EO; +__sfr __at (0xB7) EXICON0; +__sfr __at (0xBA) EXICON1; +__sfr __at (0xBD) FEAH; +__sfr __at (0xBC) FEAL; +__sfr __at (0xF7) HWBPDR; +__sfr __at (0xF6) HWBPSR; +__sfr __at (0xB3) ID; +__sfr __at (0xA8) IEN0; +__sfr __at (0xE8) IEN1; +__sfr __at (0xB8) IP; +__sfr __at (0xF8) IP1; +__sfr __at (0xB9) IPH; +__sfr __at (0xF9) IPH1; +__sfr __at (0xB4) IRCON0; +__sfr __at (0xB5) IRCON1; +__sfr __at (0xF3) MMBPCR; +__sfr __at (0xF1) MMCR; +__sfr __at (0xE9) MMCR2; +__sfr __at (0xF5) MMDR; +__sfr __at (0xF4) MMICR; +__sfr __at (0xF2) MMSR; +__sfr __at (0xB3) MODPISEL; +__sfr __at (0xBB) NMICON; +__sfr __at (0xBC) NMISR; +__sfr __at (0xB6) OSC_CON; +__sfr __at (0x80) P0_ALTSEL0; +__sfr __at (0x86) P0_ALTSEL1; +__sfr __at (0x80) P0_DATA; +__sfr __at (0x86) P0_DIR; +__sfr __at (0x80) P0_OD; +__sfr __at (0x86) P0_PUDEN; +__sfr __at (0x80) P0_PUDSEL; +__sfr __at (0x90) P1_ALTSEL0; +__sfr __at (0x91) P1_ALTSEL1; +__sfr __at (0x90) P1_DATA; +__sfr __at (0x91) P1_DIR; +__sfr __at (0x90) P1_OD; +__sfr __at (0x91) P1_PUDEN; +__sfr __at (0x90) P1_PUDSEL; +__sfr __at (0xA0) P2_DATA; +__sfr __at (0xA1) P2_PUDEN; +__sfr __at (0xA0) P2_PUDSEL; +__sfr __at (0xB0) P3_ALTSEL0; +__sfr __at (0xB1) P3_ALTSEL1; +__sfr __at (0xB0) P3_DATA; +__sfr __at (0xB1) P3_DIR; +__sfr __at (0xB0) P3_OD; +__sfr __at (0xB1) P3_PUDEN; +__sfr __at (0xB0) P3_PUDSEL; +__sfr __at (0xBB) PASSWD; +__sfr __at (0x87) PCON; +__sfr __at (0xB7) PLL_CON; +__sfr __at (0xB4) PMCON0; +__sfr __at (0xB5) PMCON1; +__sfr __at (0xB2) PORT_PAGE; +__sfr __at (0xD0) PSW; +__sfr __at (0x99) SBUF; +__sfr __at (0x98) SCON; +__sfr __at (0xBF) SCU_PAGE; +__sfr __at (0x81) SP; +__sfr __at (0xAF) SSC_BRH; +__sfr __at (0xAE) SSC_BRL; +__sfr __at (0xAB) SSC_CONH_O; +__sfr __at (0xAB) SSC_CONH_P; +__sfr __at (0xAA) SSC_CONL_O; +__sfr __at (0xAA) SSC_CONL_P; +__sfr __at (0xA9) SSC_PISEL; +__sfr __at (0xAD) SSC_RBL; +__sfr __at (0xAC) SSC_TBL; +__sfr __at (0x8F) SYSCON0; +__sfr __at (0xC3) T2_RC2H; +__sfr __at (0xC2) T2_RC2L; +__sfr __at (0xC0) T2_T2CON; +__sfr __at (0xC5) T2_T2H; +__sfr __at (0xC4) T2_T2L; +__sfr __at (0xC1) T2_T2MOD; +__sfr __at (0x88) TCON; +__sfr __at (0x8C) TH0; +__sfr __at (0x8D) TH1; +__sfr __at (0x8A) TL0; +__sfr __at (0x8B) TL1; +__sfr __at (0x89) TMOD; +__sfr __at (0xBB) WDTCON; // located in the mapped SFR area +__sfr __at (0xBF) WDTH; // located in the mapped SFR area +__sfr __at (0xBE) WDTL; // located in the mapped SFR area +__sfr __at (0xBC) WDTREL; // located in the mapped SFR area +__sfr __at (0xBD) WDTWINB; // located in the mapped SFR area + +__sfr __at (0xB3) XADDRH; // beware this is in an sfr page! +__sfr __at (0xB3) _XPAGE; // this is the name SDCC expects for this sfr + +// SFR bit definitions + +/* P0 */ +__sbit __at (0x80) P0_0 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x85) P0_5 ; + +/* P1 */ +__sbit __at (0x90) P1_0 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x92) P1_5 ; +__sbit __at (0x93) P1_6 ; +__sbit __at (0x94) P1_7 ; + +/* P2 */ +__sbit __at (0xA0) P2_0 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA4) P2_4 ; +__sbit __at (0xA5) P2_5 ; +__sbit __at (0xA6) P2_6 ; +__sbit __at (0xA7) P2_7 ; + +/* P3 */ +__sbit __at (0xB0) P3_0 ; +__sbit __at (0xB1) P3_1 ; +__sbit __at (0xB2) P3_2 ; +__sbit __at (0xB3) P3_3 ; +__sbit __at (0xB4) P3_4 ; +__sbit __at (0xB5) P3_5 ; +__sbit __at (0xB6) P3_6 ; +__sbit __at (0xB7) P3_7 ; + + +// IEN0 +__sbit __at (0xAF) EA; +__sbit __at (0xAC) ES; +__sbit __at (0xA9) ET0; +__sbit __at (0xAB) ET1; +__sbit __at (0xAD) ET2; +__sbit __at (0xA8) EX0; +__sbit __at (0xAA) EX1; + +// IEN1 +__sbit __at (0xE8) EADC; +__sbit __at (0xEC) ECCIP0; +__sbit __at (0xED) ECCIP1; +__sbit __at (0xEE) ECCIP2; +__sbit __at (0xEF) ECCIP3; +__sbit __at (0xE9) ESSC; +__sbit __at (0xEA) EX2; +__sbit __at (0xEB) EXM; + +// IP1 +__sbit __at (0xF8) PADC; +__sbit __at (0xFC) PCCIP0; +__sbit __at (0xFD) PCCIP1; +__sbit __at (0xFE) PCCIP2; +__sbit __at (0xFF) PCCIP3; +__sbit __at (0xF9) PSSC; +__sbit __at (0xFA) PX2; +__sbit __at (0xFB) PXM; + +// IP +__sbit __at (0xBC) PS; +__sbit __at (0xB9) PT0; +__sbit __at (0xBB) PT1; +__sbit __at (0xBD) PT2; +__sbit __at (0xB8) PX0; +__sbit __at (0xBA) PX1; + +// PSW +__sbit __at (0xD6) AC; +__sbit __at (0xD7) CY; +__sbit __at (0xD5) F0; +__sbit __at (0xD1) F1; +__sbit __at (0xD2) OV; +__sbit __at (0xD0) P; +__sbit __at (0xD3) RS0; +__sbit __at (0xD4) RS1; + +// SCON +__sbit __at (0x9A) RB8; +__sbit __at (0x9C) REN; +__sbit __at (0x98) RI; +__sbit __at (0x9F) SM0; +__sbit __at (0x9E) SM1; +__sbit __at (0x9D) SM2; +__sbit __at (0x9B) TB8; +__sbit __at (0x99) TI; + +// T2_T2CON +__sbit __at (0xC0) CP_RL2; +__sbit __at (0xC3) EXEN2; +__sbit __at (0xC6) EXF2; +__sbit __at (0xC7) TF2; +__sbit __at (0xC2) TR2; + +// TCON +__sbit __at (0x89) IE0; +__sbit __at (0x8B) IE1; +__sbit __at (0x88) IT0; +__sbit __at (0x8A) IT1; +__sbit __at (0x8D) TF0; +__sbit __at (0x8F) TF1; +__sbit __at (0x8C) TR0; +__sbit __at (0x8E) TR1; + +// Definition of the PAGE SFR + +// PORT_PAGE +#define _pp0 PORT_PAGE=0 // PORT_PAGE postfix +#define _pp1 PORT_PAGE=1 // PORT_PAGE postfix +#define _pp2 PORT_PAGE=2 // PORT_PAGE postfix +#define _pp3 PORT_PAGE=3 // PORT_PAGE postfix + +// ADC_PAGE +#define _ad0 ADC_PAGE=0 // ADC_PAGE postfix +#define _ad1 ADC_PAGE=1 // ADC_PAGE postfix +#define _ad2 ADC_PAGE=2 // ADC_PAGE postfix +#define _ad3 ADC_PAGE=3 // ADC_PAGE postfix +#define _ad4 ADC_PAGE=4 // ADC_PAGE postfix +#define _ad5 ADC_PAGE=5 // ADC_PAGE postfix +#define _ad6 ADC_PAGE=6 // ADC_PAGE postfix + +// SCU_PAGE +#define _su0 SCU_PAGE=0 // SCU_PAGE postfix +#define _su1 SCU_PAGE=1 // SCU_PAGE postfix +#define _su2 SCU_PAGE=2 // SCU_PAGE postfix + +// CCU_PAGE +#define _cc0 CCU_PAGE=0 // CCU_PAGE postfix +#define _cc1 CCU_PAGE=1 // CCU_PAGE postfix +#define _cc2 CCU_PAGE=2 // CCU_PAGE postfix +#define _cc3 CCU_PAGE=3 // CCU_PAGE postfix + +// FLASH_PAGE +#define _fl0 FLASH_PAGE=0 // FLASH_PAGE postfix +#define _fl1 FLASH_PAGE=1 // FLASH_PAGE postfix +#define _fl2 FLASH_PAGE=2 // FLASH_PAGE postfix + +#define SST0 0x80 // Save SFR page to ST0 +#define RST0 0xC0 // Restore SFR page from ST0 +#define SST1 0x90 // Save SFR page to ST1 +#define RST1 0xD0 // Restore SFR page from ST1 +#define SST2 0xA0 // Save SFR page to ST2 +#define RST2 0xE0 // Restore SFR page from ST2 +#define SST3 0xB0 // Save SFR page to ST3 +#define RST3 0xF0 // Restore SFR page from ST3 +#define noSST 0x00 // Switch page without saving + +#define SFR_PAGE(pg,op) pg+op + +#endif + + + + diff --git a/device/include/mcs51/at89S8252.h b/device/include/mcs51/at89S8252.h new file mode 100644 index 0000000..1c09020 --- /dev/null +++ b/device/include/mcs51/at89S8252.h @@ -0,0 +1,343 @@ +/*------------------------------------------------------------------------- + Register Declarations for ATMEL 89S8252 and 89LS8252 Processors + + Written By - Dipl.-Ing. (FH) Michael Schmitt + mschmitt@mainz-online.de + michael.schmitt@t-online.de + + Bug-Fix Jun 29 1999 + + Additional definitions Nov 23 1999 + by Bernd Krueger-Knauber + + based on reg51.h by Sandeep Dutta sandeep.dutta@usa.net + KEIL C compatible definitions are included + + Bug-Fix Feb 16 2006 + by Krzysztof Polomka + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef AT89S8252_H +#define AT89S8252_H + +/* BYTE addressable registers */ +__sfr __at (0x80) P0 ; +__sfr __at (0x81) SP ; +__sfr __at (0x82) DPL ; +__sfr __at (0x82) DP0L ; /* as called by Atmel */ +__sfr __at (0x83) DPH ; +__sfr __at (0x83) DP0H ; /* as called by Atmel */ +__sfr __at (0x84) DP1L ; /* at89S8252 specific register */ +__sfr __at (0x85) DP1H ; /* at89S8252 specific register */ +__sfr __at (0x86) SPDR ; /* at89S8252 specific register */ +__sfr __at (0x87) PCON ; +__sfr __at (0x88) TCON ; +__sfr __at (0x89) TMOD ; +__sfr __at (0x8A) TL0 ; +__sfr __at (0x8B) TL1 ; +__sfr __at (0x8C) TH0 ; +__sfr __at (0x8D) TH1 ; +__sfr __at (0x90) P1 ; +__sfr __at (0x96) WMCON ; /* at89S8252 specific register */ +__sfr __at (0x98) SCON ; +__sfr __at (0x99) SBUF ; +__sfr __at (0xA0) P2 ; +__sfr __at (0xA8) IE ; +__sfr __at (0xAA) SPSR ; /* at89S8252 specific register */ +__sfr __at (0xB0) P3 ; +__sfr __at (0xB8) IP ; +__sfr __at (0xC8) T2CON ; +__sfr __at (0xC9) T2MOD ; +__sfr __at (0xCA) RCAP2L ; +__sfr __at (0xCB) RCAP2H ; +__sfr __at (0xCC) TL2 ; +__sfr __at (0xCD) TH2 ; +__sfr __at (0xD0) PSW ; +__sfr __at (0xD5) SPCR ; /* at89S8252 specific register */ +__sfr __at (0xE0) ACC ; +__sfr __at (0xE0) A ; +__sfr __at (0xF0) B ; + + +/* BIT addressable registers */ +/* P0 */ +__sbit __at (0x80) P0_0 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x87) P0_7 ; + +/* TCON */ +__sbit __at (0x88) IT0 ; +__sbit __at (0x89) IE0 ; +__sbit __at (0x8A) IT1 ; +__sbit __at (0x8B) IE1 ; +__sbit __at (0x8C) TR0 ; +__sbit __at (0x8D) TF0 ; +__sbit __at (0x8E) TR1 ; +__sbit __at (0x8F) TF1 ; + +/* P1 */ +__sbit __at (0x90) P1_0 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x92) P1_2 ; +__sbit __at (0x93) P1_3 ; +__sbit __at (0x94) P1_4 ; +__sbit __at (0x95) P1_5 ; +__sbit __at (0x96) P1_6 ; +__sbit __at (0x97) P1_7 ; + +__sbit __at (0x90) T2 ; +__sbit __at (0x91) T2EX ; + +/* P1 SPI portpins */ +__sbit __at (0x94) SS ; /* SPI: SS - Slave port select input */ +__sbit __at (0x95) MOSI ; /* SPI: MOSI - Master data output, slave data input */ +__sbit __at (0x96) MISO ; /* SPI: MISO - Master data input, slave data output */ +__sbit __at (0x97) SCK ; /* SPI: SCK - Master clock output, slave clock input */ + + +/* SCON */ +__sbit __at (0x98) RI ; +__sbit __at (0x99) TI ; +__sbit __at (0x9A) RB8 ; +__sbit __at (0x9B) TB8 ; +__sbit __at (0x9C) REN ; +__sbit __at (0x9D) SM2 ; +__sbit __at (0x9E) SM1 ; +__sbit __at (0x9F) SM0 ; + +/* P2 */ +__sbit __at (0xA0) P2_0 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA4) P2_4 ; +__sbit __at (0xA5) P2_5 ; +__sbit __at (0xA6) P2_6 ; +__sbit __at (0xA7) P2_7 ; + +/* IE */ +__sbit __at (0xA8) EX0 ; +__sbit __at (0xA9) ET0 ; +__sbit __at (0xAA) EX1 ; +__sbit __at (0xAB) ET1 ; +__sbit __at (0xAC) ES ; +__sbit __at (0xAD) ET2 ; +__sbit __at (0xAF) EA ; + +/* P3 */ +__sbit __at (0xB0) P3_0 ; +__sbit __at (0xB1) P3_1 ; +__sbit __at (0xB2) P3_2 ; +__sbit __at (0xB3) P3_3 ; +__sbit __at (0xB4) P3_4 ; +__sbit __at (0xB5) P3_5 ; +__sbit __at (0xB6) P3_6 ; +__sbit __at (0xB7) P3_7 ; + +__sbit __at (0xB0) RXD ; +__sbit __at (0xB1) TXD ; +__sbit __at (0xB2) INT0 ; +__sbit __at (0xB3) INT1 ; +__sbit __at (0xB4) T0 ; +__sbit __at (0xB5) T1 ; +__sbit __at (0xB6) WR ; +__sbit __at (0xB7) RD ; + +/* IP */ +__sbit __at (0xB8) PX0 ; +__sbit __at (0xB9) PT0 ; +__sbit __at (0xBA) PX1 ; +__sbit __at (0xBB) PT1 ; +__sbit __at (0xBC) PS ; +__sbit __at (0xBD) PT2 ; + +/* T2CON */ +__sbit __at (0xC8) T2CON_0 ; +__sbit __at (0xC9) T2CON_1 ; +__sbit __at (0xCA) T2CON_2 ; +__sbit __at (0xCB) T2CON_3 ; +__sbit __at (0xCC) T2CON_4 ; +__sbit __at (0xCD) T2CON_5 ; +__sbit __at (0xCE) T2CON_6 ; +__sbit __at (0xCF) T2CON_7 ; + +__sbit __at (0xC8) CP_RL2 ; +__sbit __at (0xC9) C_T2 ; +__sbit __at (0xCA) TR2 ; +__sbit __at (0xCB) EXEN2 ; +__sbit __at (0xCC) TCLK ; +__sbit __at (0xCD) RCLK ; +__sbit __at (0xCE) EXF2 ; +__sbit __at (0xCF) TF2 ; + +/* PSW */ +__sbit __at (0xD0) P ; +__sbit __at (0xD1) FL ; +__sbit __at (0xD2) OV ; +__sbit __at (0xD3) RS0 ; +__sbit __at (0xD4) RS1 ; +__sbit __at (0xD5) F0 ; +__sbit __at (0xD6) AC ; +__sbit __at (0xD7) CY ; + +/* B */ +__sbit __at (0xF0) BREG_F0 ; +__sbit __at (0xF1) BREG_F1 ; +__sbit __at (0xF2) BREG_F2 ; +__sbit __at (0xF3) BREG_F3 ; +__sbit __at (0xF4) BREG_F4 ; +__sbit __at (0xF5) BREG_F5 ; +__sbit __at (0xF6) BREG_F6 ; +__sbit __at (0xF7) BREG_F7 ; + + +/* BIT definitions for bits that are not directly accessible */ +/* PCON bits */ +#define IDL 0x01 +#define PD 0x02 +#define GF0 0x04 +#define GF1 0x08 +#define SMOD 0x80 + +#define IDL_ 0x01 +#define PD_ 0x02 +#define GF0_ 0x04 +#define GF1_ 0x08 +#define SMOD_ 0x80 + +/* TMOD bits */ +#define M0_0 0x01 +#define M1_0 0x02 +#define C_T0 0x04 +#define GATE0 0x08 +#define M0_1 0x10 +#define M1_1 0x20 +#define C_T1 0x40 +#define GATE1 0x80 + +#define M0_0_ 0x01 +#define M1_0_ 0x02 +#define C_T0_ 0x04 +#define GATE0_ 0x08 +#define M0_1_ 0x10 +#define M1_1_ 0x20 +#define C_T1_ 0x40 +#define GATE1_ 0x80 + +#define T0_M0 0x01 +#define T0_M1 0x02 +#define T0_CT 0x04 +#define T0_GATE 0x08 +#define T1_M0 0x10 +#define T1_M1 0x20 +#define T1_CT 0x40 +#define T1_GATE 0x80 + +#define T0_M0_ 0x01 +#define T0_M1_ 0x02 +#define T0_CT_ 0x04 +#define T0_GATE_ 0x08 +#define T1_M0_ 0x10 +#define T1_M1_ 0x20 +#define T1_CT_ 0x40 +#define T1_GATE_ 0x80 + +#define T0_MASK 0x0F +#define T1_MASK 0xF0 + +#define T0_MASK_ 0x0F +#define T1_MASK_ 0xF0 + +/* T2MOD bits */ +#define DCEN 0x01 +#define T2OE 0x02 + +#define DCEN_ 0x01 +#define T2OE_ 0x02 + +/* WMCON bits */ +#define WMCON_WDTEN 0x01 +#define WMCON_WDTRST 0x02 +#define WMCON_DPS 0x04 +#define WMCON_EEMEN 0x08 +#define WMCON_EEMWE 0x10 +#define WMCON_PS0 0x20 +#define WMCON_PS1 0x40 +#define WMCON_PS2 0x80 + +/* SPCR-SPI bits */ +#define SPCR_SPR0 0x01 +#define SPCR_SPR1 0x02 +#define SPCR_CPHA 0x04 +#define SPCR_CPOL 0x08 +#define SPCR_MSTR 0x10 +#define SPCR_DORD 0x20 +#define SPCR_SPE 0x40 +#define SPCR_SPIE 0x80 + +/* SPSR-SPI bits */ +#define SPSR_WCOL 0x40 +#define SPSR_SPIF 0x80 + +/* SPDR-SPI bits */ +#define SPDR_SPD0 0x01 +#define SPDR_SPD1 0x02 +#define SPDR_SPD2 0x04 +#define SPDR_SPD3 0x08 +#define SPDR_SPD4 0x10 +#define SPDR_SPD5 0x20 +#define SPDR_SPD6 0x40 +#define SPDR_SPD7 0x80 + +/* Interrupt numbers: address = (number * 8) + 3 */ +#define IE0_VECTOR 0 /* 0x03 external interrupt 0 */ +#define EX0_VECTOR 0 /* 0x03 external interrupt 0 */ +#define TF0_VECTOR 1 /* 0x0b timer 0 */ +#define IE1_VECTOR 2 /* 0x13 external interrupt 1 */ +#define EX1_VECTOR 2 /* 0x13 external interrupt 1 */ +#define TF1_VECTOR 3 /* 0x1b timer 1 */ +#define SI0_VECTOR 4 /* 0x23 serial port 0 */ +#define TF2_VECTOR 5 /* 0x2B timer 2 */ +#define EX2_VECTOR 5 /* 0x2B external interrupt 2 */ + + +/* This is one of the addons coming from Bernd Krueger-Knauber */ + +/* ALE (0x8E) Bit Values */ +__sfr __at 0x8E ALE; /* at89S8252 specific register */ + +/* Macro to enable and disable the toggling of the ALE-pin (EMV) */ + +/* Explanation : Original Intel 8051 Cores (Atmel has to use the */ +/* Intel Core) have a feature that ALE is only active during */ +/* MOVX or MOVC instruction. Otherwise the ALE-Pin is weakly */ +/* pulled high. This can be used to force some external devices */ +/* into standby mode and reduced EMI noise */ + +#define ALE_OFF ALE = ALE | 0x01 +#define ALE_ON ALE = ALE & 0xFE + +#endif diff --git a/device/include/mcs51/at89c51ed2.h b/device/include/mcs51/at89c51ed2.h new file mode 100644 index 0000000..049775a --- /dev/null +++ b/device/include/mcs51/at89c51ed2.h @@ -0,0 +1,242 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Atmel AT89C51RD2/ED2 Processor + + Written By - Jesus Calvino-Fraga / jesusc at ece.ubc.ca (July 2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef REG_AT89C51ED2_H +#define REG_AT89C51ED2_H + +#include <8052.h> // Load definitions for the 8052 + +#ifdef REG8052_H +#undef REG8052_H +#endif + +// Define AT89C51RD2/ED2 specific registers only + +__sfr __at (0x8E) AUXR; //Auxiliary function register + #define DPU 0x80 //'1'=Disables weak pull-up + #define M0 0x20 //'1'=Strechs MOVX control signals + #define XRS2 0x10 // XRAM select bit 2 + #define XRS1 0x08 // XRAM select bit 1 + #define XRS0 0x04 // XRAM select bit 0 + // XRS2 XRS1 XRS2 XRAM Size + // 0 0 0 256 bytes + // 0 0 1 512 bytes + // 0 1 0 768 bytes (default) + // 0 1 1 1024 bytes + // 1 0 0 1792 bytes + #define EXTRAM 0x02 //'0'=uses internal XRAM. + #define AO 0x01 //'1'=Disables ALE generation. + +__sfr __at (0xA2) AUXR1; //Auxiliary function register 1 + #define ENBOOT 0x20 //'0'=Disables boot ROM + #define GF3 0x08 //General purpose user-defined flag. + #define DPS 0x01 //Data pointer select. + +__sfr __at (0x97) CKRL; //Clock Reload Register +__sfr __at (0x8F) CKCON0; //Clock control Register 0 + #define WDTX2 0x40 //Watch Dog Clock speed '1'=12 ck/cy, '0'=6 ck/cy + #define PCAX2 0x20 //Programmable Counter Array Clock speed '1'=12 ck/cy, '0'=6 ck/cy + #define SIX2 0x10 //Enhanced UART Clock (Mode 0 and 2) speed '1'=12 ck/cy, '0'=6 ck/cy + #define T2X2 0x08 //Timer2 Clock speed '1'=12 ck/cy, '0'=6 ck/cy + #define T1X2 0x04 //Timer1 Clock speed '1'=12 ck/cy, '0'=6 ck/cy + #define T0X2 0x02 //Timer0 Clock speed '1'=12 ck/cy, '0'=6 ck/cy + #define X2 0x01 //CPU Clock '0'=12 ck/cy, '1'=6 ck/cy +__sfr __at (0xAF) CKCON1; //Clock control Register 1 + #define XPIX2 0x01 //SPI Clock speed '1'=12 ck/cy, '0'=6 ck/cy + +__sfr __at (0xFA) CCAP0H; //Module 0 Capture HIGH. +__sfr __at (0xFB) CCAP1H; //Module 1 Capture HIGH. +__sfr __at (0xFC) CCAP2H; //Module 2 Capture HIGH. +__sfr __at (0xFD) CCAP3H; //Module 3 Capture HIGH. +__sfr __at (0xFE) CCAP4H; //Module 4 Capture HIGH. +__sfr __at (0xEA) CCAP0L; //Module 0 Capture LOW. +__sfr __at (0xEB) CCAP1L; //Module 1 Capture LOW. +__sfr __at (0xEC) CCAP2L; //Module 2 Capture LOW. +__sfr __at (0xED) CCAP3L; //Module 3 Capture LOW. +__sfr __at (0xEE) CCAP4L; //Module 4 Capture LOW. + +__sfr __at (0xDA) CCAPM0; //Module 0 Mode. +__sfr __at (0xDB) CCAPM1; //Module 1 Mode. +__sfr __at (0xDC) CCAPM2; //Module 2 Mode. +__sfr __at (0xDD) CCAPM3; //Module 3 Mode. +__sfr __at (0xDE) CCAPM4; //Module 4 Mode. +//The preceding five registers have the following bits: + #define ECOM 0x40 //Enable Comparator. + #define CAPP 0x20 //1=enables positive edge capture. + #define CAPN 0x10 //1=enables negative edge capture. + #define MAT 0x08 //When counter matches sets CCF_n bit causing and interrupt. + #define TOG 0x04 //Toggle output on match. + #define PWM 0x02 //Pulse width modulation mode. + #define ECCF 0x01 //Enable CCF interrupt. + +__sfr __at (0xD8) CCON; //PCA Counter Control + __sbit __at (0xDF) CF; //PCA Counter overflow flag. + __sbit __at (0xDE) CR ; //PCA Counter Run Control Bit. 1=counter on. 0=counter off. + __sbit __at (0xDC) CCF4;//PCA Module 4 Interrupt Flag. + __sbit __at (0xDB) CCF3;//PCA Module 3 Interrupt Flag. + __sbit __at (0xDA) CCF2;//PCA Module 2 Interrupt Flag. + __sbit __at (0xD9) CCF1;//PCA Module 1 Interrupt Flag. + __sbit __at (0xD8) CCF0;//PCA Module 0 Interrupt Flag. + +__sfr __at (0xF9) CH; //PCA Counter HIGH. +__sfr __at (0xE9) CL; //PCA Counter LOW. + +__sfr __at (0xD9) CMOD; //PCA Counter Mode. + #define CIDL 0x80 //CIDL=0 program the PCA counter to work during idle mode. + #define WDTE 0x40 //Watchdog Timer Enable. + #define CPS1 0x04 //PCA Count Pulse Select bit 1. + #define CPS0 0x02 //PCA Count Pulse Select bit 0. + //00=Internal clock, Fosc/6 + //01=Internal clock, Fosc/6 + //10=Timer 0 overflow + //11=External clock at ECI/P1.2 pin (max rate=Fosc/4) + #define ECF 0x01 //PCA Enable Counter Overflow Interrupt. + +//Attention IEN0 is the same as register IE found in <8051.h> only bit EC added here. +__sfr __at (0xA8) IEN0; //Interrupt Enable 1. + __sbit __at (0xAE) EC; //PCA Interrupt Enable bit. + +__sfr __at (0xB1) IEN1; //Interrupt Enable 1 + #define ESPI 0x04 //SPA Interrupt Enable bit. + #define KBD 0x01 //Keyboard Interrupt Enable bit. + +//Attention IPL0 is the same as register IP found in <8051.h> +__sfr __at (0xB8) IPL0; //Interrupt Priority 0 LOW + __sbit __at (0xBE) PPCL;//PCA Interrupt Priority low bit. + __sbit __at (0xBD) PT2L;//Timer 2 Interrupt Priority Low Bit. + __sbit __at (0xBC) PLS; //Serial Port Interrupt Priority Low Bit. + __sbit __at (0xBB) PT1L;//Timer 1 Interrupt Priority Low Bit. + __sbit __at (0xBA) PX1L;//External Interrupt 1 Priority Low Bit. + __sbit __at (0xB9) PT0L;//Timer 0 Interrupt Priority Low Bit. + __sbit __at (0xB8) PX0L;//External Interrupt 0 Priority Low Bit. + +__sfr __at (0xB7) IPH0; //Interrupt Priority 0 HIGH + #define PPCH 0x40 //PCA Interrupt Priority High Bit. + #define PT2H 0x20 //Timer 2 Interrupt Priority High Bit. + #define PHS 0x10 //Serial Port Interrupt Priority High Bit. + #define PT1H 0x08 //Timer 1 Interrupt Priority High Bit. + #define PX1H 0x04 //External Interrupt 1 Priority High Bit. + #define PT0H 0x02 //Timer 0 Interrupt Priority High Bit. + #define PX0H 0x01 //External Interrupt 0 Priority High Bit. + +__sfr __at (0xB2) IPL1; //Interrupt Priority 1 LOW. + #define SPIL 0x04 //SPI Priority Low Bit + #define KBDL 0x01 //Keyboard Priority Low Bit + +__sfr __at (0xB3) IPH1; //Interrupt Priority 1 HIGH. + #define SPIH 0x04 //SPI Priority High Bit + #define KBDH 0x01 //Keyboard Priority High Bit + +__sfr __at (0xC0) P4; //8-bit port 4 + __sbit __at (0xC0) P4_0 ; + __sbit __at (0xC1) P4_1 ; + __sbit __at (0xC2) P4_2 ; + __sbit __at (0xC3) P4_3 ; + __sbit __at (0xC4) P4_4 ; + __sbit __at (0xC5) P4_5 ; + __sbit __at (0xC6) P4_6 ; + __sbit __at (0xC7) P4_7 ; + +// S. Qu 12/30/2008 4:23PM +__sfr __at (0xE8) P5; //8-bit port 5 + __sbit __at (0xE8) P5_0 ; + __sbit __at (0xE9) P5_1 ; + __sbit __at (0xEA) P5_2 ; + __sbit __at (0xEB) P5_3 ; + __sbit __at (0xEC) P5_4 ; + __sbit __at (0xED) P5_5 ; + __sbit __at (0xEE) P5_6 ; + __sbit __at (0xEF) P5_7 ; + +__sfr __at (0xA6) WDTRST; //WatchDog Timer Reset +__sfr __at (0xA7) WDTPRG; //WatchDog Timer Program + #define WTO2 0x04 //WDT Time-out select bit 2 + #define WTO1 0x02 //WDT Time-out select bit 1 + #define WTO0 0x01 //WDT Time-out select bit 0 + //This names appear also in the datasheet: + #define S2 0x04 //WDT Time-out select bit 2 + #define S1 0x02 //WDT Time-out select bit 1 + #define S0 0x01 //WDT Time-out select bit 0 + //S2 S1 S0 Selected Time-out + //0 0 0 (2^14 - 1) machine cycles, 16.3 ms @ FOSCA=12 MHz + //0 0 1 (2^15 - 1) machine cycles, 32.7 ms @ FOSCA=12 MHz + //0 1 0 (2^16 - 1) machine cycles, 65.5 ms @ FOSCA=12 MHz + //0 1 1 (2^17 - 1) machine cycles, 131 ms @ FOSCA=12 MHz + //1 0 0 (2^18 - 1) machine cycles, 262 ms @ FOSCA=12 MHz + //1 0 1 (2^19 - 1) machine cycles, 542 ms @ FOSCA=12 MHz + //1 1 0 (2^20 - 1) machine cycles, 1.05 s @ FOSCA=12 MHz + //1 1 1 (2^21 - 1) machine cycles, 2.09 s @ FOSCA=12 MHz + +__sfr __at (0xA9) SADDR; //Serial Port Address Register. +__sfr __at (0xB9) SADEN; //Serial Port Address Enable. + +__sfr __at (0xC3) SPCON; //SPI Control Register + #define SPR2 0x80 //SPI Clork Rate select bit 2. + #define SPEN 0x40 //SPI enable bit. When set enables SPI. + #define SSDIS 0x20 //Cleared to enable SS in both Master and Slave modes. + #define MSTR 0x10 //1=master mode. 0=slave mode. + #define CPOL 0x08 //1=SCK is high when idle (active low), 0=SCK is low when idle (active high). + #define CPHA 0x04 //1=shift triggered on the trailing edge of SCK. 0=shift trig. on leading edge. + #define SPR1 0x02 //SPI Clork Rate select bit 1. + #define SPR0 0x01 //SPI Clork Rate select bit 0. + //SPR2 SPR1 SPR0 Baud Rate Divisor + // 0 0 0 2 + // 0 0 1 4 + // 0 1 0 8 + // 0 1 1 16 + // 1 0 0 32 + // 1 0 1 64 + // 1 1 0 128 + // 1 1 1 Invalid: Don't Use + +__sfr __at (0xC4) SPSTA; //Serial Peripheral Status register + #define SPIF 0x80 //Serial Peripheral Data Transfer Flag + #define WCOL 0x40 //Write collision Flag. + #define SSERR 0x20 //Synchronous Serial Slave Error Flag + #define MODF 0x10 //Mode Fault Flag + +__sfr __at (0xC5) SPDAT; //SPI Data + +__sfr __at (0xC9) T2MOD; //Timer 2 mode control + #define T2OE 0x02 //Timer 2 Output Enable bit. + #define DCEN 0x01 //Down count enable + +__sfr __at (0x9B) BDRCON; //Baud Rate Control + #define BRR 0x10 //Baud Rate Run Control bit. '1'=enable + #define TBCK 0x08 //Transmission Baud rate Generator Selection bit for UART + #define RBCK 0x04 //Reception Baud Rate Generator Selection bit for UART + #define SPD 0x02 //Baud Rate Speed Control bit for UART + #define SRC 0x01 //Baud Rate Source select bit in Mode 0 for UART + +__sfr __at (0x9A) BRL; //Baud Rate Reload + +__sfr __at (0x9C) KBLS; //Keyboard level Selector +__sfr __at (0x9D) KBE; //Keyboard Input Enable +__sfr __at (0x9E) KBF; //Keyboard Flag Register + +__sfr __at (0xD2) EECON; //EEPROM Data Control + #define EEE 0x02 //EEPROM Enable. '1'=use EEPROM, '0'=use XRAM + #define EEBUSY 0x01 //EEPROM Busy. '1'=EEPROM is busy programming + +#endif /*REG_AT89C51ED2_H*/ diff --git a/device/include/mcs51/at89c51snd1c.h b/device/include/mcs51/at89c51snd1c.h new file mode 100644 index 0000000..6a4b7bc --- /dev/null +++ b/device/include/mcs51/at89c51snd1c.h @@ -0,0 +1,610 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Atmel AT89C51SND1C Processor + + Written By - Weston Schmidt (Sept 2005) + + This document is based on the AT8xC51SND1C document + 4109H-8051-01/05 + + $Id: at89c51snd1c.h 4388 2006-09-27 09:31:14Z MaartenBrock $ + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef __AT89C51SND1_H__ +#define __AT89C51SND1_H__ + + +/* BYTE Registers */ +__sfr __at (0xE0) ACC ; /* C51 Core SFRs */ +__sfr __at (0xF0) B ; +__sfr __at (0xD0) PSW ; +__sfr __at (0x81) SP ; +__sfr __at (0x82) DPL ; +__sfr __at (0x83) DPH ; +__sfr __at (0x87) PCON ; /* System Management SFRs */ +__sfr __at (0x8E) AUXR0 ; +__sfr __at (0xA2) AUXR1 ; +__sfr __at (0xFB) NVERS ; +__sfr __at (0x8F) CKCON ; /* PLL and System Clock SFRs */ +__sfr __at (0xE9) PLLCON ; +__sfr __at (0xEE) PLLNDIV ; +__sfr __at (0xEF) PLLRDIV ; +__sfr __at (0xA8) IEN0 ; /* Interrupt SFRs */ +__sfr __at (0xB1) IEN1 ; +__sfr __at (0xB7) IPH0 ; +__sfr __at (0xB8) IPL0 ; +__sfr __at (0xB3) IPH1 ; +__sfr __at (0xB2) IPL1 ; +__sfr __at (0x80) P0 ; /* Port SFRs */ +__sfr __at (0x90) P1 ; +__sfr __at (0xA0) P2 ; +__sfr __at (0xB0) P3 ; +__sfr __at (0xC0) P4 ; +__sfr __at (0xD8) P5 ; +__sfr __at (0xD1) FCON ; /* Flash Memory SFR */ +__sfr __at (0x88) TCON ; /* Timer SFRs */ +__sfr __at (0x89) TMOD ; +__sfr __at (0x8A) TL0 ; +__sfr __at (0x8C) TH0 ; +__sfr __at (0x8B) TL1 ; +__sfr __at (0x8D) TH1 ; +__sfr __at (0xA6) WDTRST ; +__sfr __at (0xA7) WDTPRG ; +__sfr __at (0xAA) MP3CON ; /* MP3 Decoder SFRs */ +__sfr __at (0xC8) MP3STA ; +__sfr __at (0xAF) MP3STA1 ; +__sfr __at (0xAC) MP3DAT ; +__sfr __at (0xAD) MP3ANC ; +__sfr __at (0x9E) MP3VOL ; +__sfr __at (0x9F) MP3VOR ; +__sfr __at (0xB4) MP3BAS ; +__sfr __at (0xB5) MP3MED ; +__sfr __at (0xB6) MP3TRE ; +__sfr __at (0xEB) MP3CLK ; +__sfr __at (0xAE) MP3DBG ; +__sfr __at (0x9A) AUDCON0 ; /* Audio Interface SFRs */ +__sfr __at (0x9B) AUDCON1 ; +__sfr __at (0x9C) AUDSTA ; +__sfr __at (0x9D) AUDDAT ; +__sfr __at (0xEC) AUDCLK ; +__sfr __at (0xBC) USBCON ; /* USB Controller SFRs */ +__sfr __at (0xC6) USBADDR ; +__sfr __at (0xBD) USBINT ; +__sfr __at (0xBE) USBIEN ; +__sfr __at (0xC7) UEPNUM ; +__sfr __at (0xD4) UEPCONX ; +__sfr __at (0xCE) UEPSTAX ; +__sfr __at (0xD5) UEPRST ; +__sfr __at (0xF8) UEPINT ; +__sfr __at (0xC2) UEPIEN ; +__sfr __at (0xCF) UEPDATX ; +__sfr __at (0xE2) UBYCTX ; +__sfr __at (0xBA) UFNUML ; +__sfr __at (0xBB) UFNUMH ; +__sfr __at (0xEA) USBCLK ; +__sfr __at (0xE4) MMCON0 ; /* MMC Controller SFRs */ +__sfr __at (0xE5) MMCON1 ; +__sfr __at (0xE6) MMCON2 ; +__sfr __at (0xDE) MMSTA ; +__sfr __at (0xE7) MMINT ; +__sfr __at (0xDF) MMMSK ; +__sfr __at (0xDD) MMCMD ; +__sfr __at (0xDC) MMDAT ; +__sfr __at (0xED) MMCLK ; +__sfr __at (0xF9) DAT16H ; /* IDE Interface SFR */ +__sfr __at (0x98) SCON ; /* Serial I/O Port SFRs */ +__sfr __at (0x99) SBUF ; +__sfr __at (0xB9) SADEN ; +__sfr __at (0xA9) SADDR ; +__sfr __at (0x92) BDRCON ; +__sfr __at (0x91) BRL ; +__sfr __at (0xC3) SPCON ; /* SPI Controller SFRs */ +__sfr __at (0xC4) SPSTA ; +__sfr __at (0xC5) SPDAT ; +__sfr __at (0x93) SSCON ; /* Two Wire Controller SFRs */ +__sfr __at (0x94) SSSTA ; +__sfr __at (0x95) SSDAT ; +__sfr __at (0x96) SSADR ; +__sfr __at (0xA3) KBCON ; /* Keyboard Interface SFRs */ +__sfr __at (0xA4) KBSTA ; +__sfr __at (0xF3) ADCON ; /* A/D Controller SFRs */ +__sfr __at (0xF4) ADDL ; +__sfr __at (0xF5) ADDH ; +__sfr __at (0xF2) ADCLK ; + + +/* BIT Registers */ +/* PSW */ +__sbit __at (0xD7) CY ; +__sbit __at (0xD6) AC ; +__sbit __at (0xD5) F0 ; +__sbit __at (0xD4) RS1 ; +__sbit __at (0xD3) RS0 ; +__sbit __at (0xD2) OV ; +__sbit __at (0xD1) F1 ; +__sbit __at (0xD0) P ; + +/* IEN0 */ +__sbit __at (0xAF) EA ; +__sbit __at (0xAE) EAUD ; +__sbit __at (0xAD) EMP3 ; +__sbit __at (0xAC) ES ; +__sbit __at (0xAB) ET1 ; +__sbit __at (0xAA) EX1 ; +__sbit __at (0xA9) ET0 ; +__sbit __at (0xA8) EX0 ; + +/* IPLO */ +__sbit __at (0xBE) IPLAUD ; +__sbit __at (0xBD) IPLMP3 ; +__sbit __at (0xBC) IPLS ; +__sbit __at (0xBB) IPLT1 ; +__sbit __at (0xBA) IPLX1 ; +__sbit __at (0xB9) IPLT0 ; +__sbit __at (0xB8) IPLX0 ; + +/* P0 */ +__sbit __at (0x87) P0_7 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x80) P0_0 ; + +/* P1 */ +__sbit __at (0x97) P1_7 ; +__sbit __at (0x96) P1_6 ; +__sbit __at (0x95) P1_5 ; +__sbit __at (0x94) P1_4 ; +__sbit __at (0x93) P1_3 ; +__sbit __at (0x92) P1_2 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x90) P1_0 ; + +__sbit __at (0x97) SDA ; +__sbit __at (0x96) SCL ; +__sbit __at (0x93) KIN3 ; +__sbit __at (0x92) KIN2 ; +__sbit __at (0x91) KIN1 ; +__sbit __at (0x90) KIN0 ; + +/* P2 */ +__sbit __at (0xA7) P2_7 ; +__sbit __at (0xA6) P2_6 ; +__sbit __at (0xA5) P2_5 ; +__sbit __at (0xA4) P2_4 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA0) P2_0 ; + +/* P3 */ +__sbit __at (0xB7) P3_7 ; +__sbit __at (0xB6) P3_6 ; +__sbit __at (0xB5) P3_5 ; +__sbit __at (0xB4) P3_4 ; +__sbit __at (0xB3) P3_3 ; +__sbit __at (0xB2) P3_2 ; +__sbit __at (0xB1) P3_1 ; +__sbit __at (0xB0) P3_0 ; + +__sbit __at (0xB7) RD ; +__sbit __at (0xB6) WR ; +__sbit __at (0xB5) T1 ; +__sbit __at (0xB4) T0 ; +__sbit __at (0xB3) INT1 ; +__sbit __at (0xB2) INT0 ; +__sbit __at (0xB1) TXD ; +__sbit __at (0xB0) RXD ; + +/* P4 */ +__sbit __at (0xC7) P4_7 ; +__sbit __at (0xC6) P4_6 ; +__sbit __at (0xC5) P4_5 ; +__sbit __at (0xC4) P4_4 ; +__sbit __at (0xC3) P4_3 ; +__sbit __at (0xC2) P4_2 ; +__sbit __at (0xC1) P4_1 ; +__sbit __at (0xC0) P4_0 ; + +__sbit __at (0xC3) SS_ ; +__sbit __at (0xC2) SCK ; +__sbit __at (0xC1) MOSI ; +__sbit __at (0xC0) MISO ; + +/* P5 */ +__sbit __at (0xDB) P5_3 ; +__sbit __at (0xDA) P5_2 ; +__sbit __at (0xD9) P5_1 ; +__sbit __at (0xD8) P5_0 ; + +/* TCON */ +__sbit __at (0x8F) TF1 ; +__sbit __at (0x8E) TR1 ; +__sbit __at (0x8D) TF0 ; +__sbit __at (0x8C) TR0 ; +__sbit __at (0x8B) IE1 ; +__sbit __at (0x8A) IT1 ; +__sbit __at (0x89) IE0 ; +__sbit __at (0x88) IT0 ; + +/* MP3STA */ +__sbit __at (0xCF) MPANC ; +__sbit __at (0xCE) MPREQ ; +__sbit __at (0xCD) ERRLAY ; +__sbit __at (0xCC) ERRSYN ; +__sbit __at (0xCB) ERRCRC ; +__sbit __at (0xCA) MPFS1 ; +__sbit __at (0xC9) MPFS0 ; +__sbit __at (0xC8) MPVER ; + +/* UEPINT */ +__sbit __at (0xFA) EP2INT ; +__sbit __at (0xF9) EP1INT ; +__sbit __at (0xF8) EP0INT ; + +/* SCON */ +__sbit __at (0x9F) SM0 ; +__sbit __at (0x9F) FE ; +__sbit __at (0x9E) SM1 ; +__sbit __at (0x9D) SM2 ; +__sbit __at (0x9C) REN ; +__sbit __at (0x9B) TB8 ; +__sbit __at (0x9A) RB8 ; +__sbit __at (0x99) TI ; +__sbit __at (0x98) RI ; + + +/* BIT definitions for bits that are not directly accessible */ +/* PCON bits */ +#define MSK_SMOD1 0x80 +#define MSK_SMOD0 0x40 +#define MSK_GF1 0x08 +#define MSK_GF0 0x04 +#define MSK_PD 0x02 +#define MSK_IDL 0x01 + +/* AUXR0 bits */ +#define MSK_EXT16 0x40 +#define MSK_M0 0x20 +#define MSK_DPHDIS 0x10 +#define MSK_XRS 0x0C +#define MSK_EXTRAM 0x02 +#define MSK_AO 0x01 + +/* AUXR1 bits */ +#define MSK_ENBOOT 0x20 +#define MSK_GF3 0x08 +#define MSK_DPS 0x01 + +/* CKCON bits */ +#define MSK_X2 0x01 + +/* PLLCON bits */ +#define MSK_PLL_R 0xC0 +#define MSK_PLLRES 0x08 +#define MSK_PLLEN 0x02 +#define MSK_PLOCK 0x01 + +/* PLLNDIV bits */ +#define MSK_PLL_N 0x7F + +/* IEN1 bits */ +#define MSK_EUSB 0x40 +#define MSK_EKB 0x10 +#define MSK_EADC 0x08 +#define MSK_ESPI 0x04 +#define MSK_EI2C 0x02 +#define MSK_EMMC 0x01 + +/* IPHO bits */ +#define MSK_IPHAUD 0x40 +#define MSK_IPHMP3 0x20 +#define MSK_IPHS 0x10 +#define MSK_IPHT1 0x08 +#define MSK_IPHX1 0x04 +#define MSK_IPHT0 0x02 +#define MSK_IPHX0 0x01 + +/* IPH1 bits */ +#define MSK_IPHUSB 0x40 +#define MSK_IPHKB 0x10 +#define MSK_IPHADC 0x08 +#define MSK_IPHSPI 0x04 +#define MSK_IPHI2C 0x02 +#define MSK_IPHMMC 0x01 + +/* IPL1 bits */ +#define MSK_IPLUSB 0x40 +#define MSK_IPLKB 0x10 +#define MSK_IPLADC 0x08 +#define MSK_IPLSPI 0x04 +#define MSK_IPLI2C 0x02 +#define MSK_IPLMMC 0x01 + +/* TMOD bits */ +#define MSK_GATE1 0x80 +#define MSK_C_T1 0x40 +#define MSK_MO1 0x30 +#define MSK_GATE0 0x08 +#define MSK_C_T0 0x04 +#define MSK_MO0 0x03 + +/* MP3CON bits */ +#define MSK_MPEN 0x80 +#define MSK_MPBBST 0x40 +#define MSK_CRCEN 0x20 +#define MSK_MSKANC 0x10 +#define MSK_MSKREQ 0x08 +#define MSK_MSKLAY 0x04 +#define MSK_MSKSYN 0x02 +#define MSK_MSKCRC 0x01 + +/* MP3STA1 bits */ +#define MSK_MPFREQ 0x10 +#define MSK_MPBREQ 0x08 + +/* MP3VOL bits */ +#define MSK_VOL 0x1F + +/* MP3VOR bits */ +#define MSK_VOR 0x1F + +/* MP3BAS bits */ +#define MSK_BAS 0x1F + +/* MP3MED bits */ +#define MSK_MED 0x1F + +/* MP3TRE bits */ +#define MSK_TRE 0x1F + +/* MP3CLK bits */ +#define MSK_MPCD 0x1F + +/* MP3DBG bits */ +#define MSK_MPFULL 0x08 + +/* AUDCON0 bits */ +#define MSK_JUST 0xF8 +#define MSK_POL 0x04 +#define MSK_DSIZ 0x02 +#define MSK_HLR 0x01 + +/* AUDCON1 bits */ +#define MSK_SRC 0x80 +#define MSK_DRQEN 0x40 +#define MSK_MSREQ 0x20 +#define MSK_MUDRN 0x10 +#define MSK_DUP 0x06 +#define MSK_AUDEN 0x01 + +/* AUDSTA bits */ +#define MSK_SREQ 0x80 +#define MSK_UDRN 0x40 +#define MSK_AUBUSY 0x20 + +/* AUDCLK bits */ +#define MSK_AUCD 0x1F + +/* USBCON bits */ +#define MSK_USBE 0x80 +#define MSK_SUSPCLK 0x40 +#define MSK_SDRMWUP 0x20 +#define MSK_UPRSM 0x08 +#define MSK_RMWUPE 0x04 +#define MSK_CONFG 0x02 +#define MSK_FADDEN 0x01 + +/* USBADDR bits */ +#define MSK_FEN 0x80 +#define MSK_UADD 0x7F + +/* USBINT bits */ +#define MSK_WUPCPU 0x20 +#define MSK_EORINT 0x10 +#define MSK_SOFINT 0x08 +#define MSK_SPINT 0x01 + +/* USBIEN bits */ +#define MSK_EWUPCPU 0x20 +#define MSK_EEORINT 0x10 +#define MSK_ESOFINT 0x08 +#define MSK_ESPINT 0x01 + +/* UEPNUM bits */ +#define MSK_EPNUM 0x03 + +/* UEPCONX bits */ +#define MSK_EPEN 0x80 +#define MSK_NAKIEN 0x40 +#define MSK_NAKOUT 0x20 +#define MSK_NAKIN 0x10 +#define MSK_DTGL 0x08 +#define MSK_EPDIR 0x04 +#define MSK_EPTYPE 0x03 + +/* UEPSTAX bits */ +#define MSK_DIR 0x80 +#define MSK_RXOUTB1 0x40 +#define MSK_STALLRQ 0x20 +#define MSK_TXRDY 0x10 +#define MSK_STLCRC 0x08 +#define MSK_RXSETUP 0x04 +#define MSK_RXOUTB0 0x02 +#define MSK_TXCMP 0x01 + +/* UEPRST bits */ +#define MSK_EPRST 0x07 +#define MSK_EP2RST 0x04 +#define MSK_EP1RST 0x02 +#define MSK_EP0RST 0x01 + +#define MSK_EPINT 0x07 +#define MSK_EP2INT 0x04 +#define MSK_EP1INT 0x02 +#define MSK_EP0INT 0x01 + +/* UEPIEN bits */ +#define MSK_EPINTE 0x07 +#define MSK_EP2INTE 0x04 +#define MSK_EP1INTE 0x02 +#define MSK_EP0INTE 0x01 + +/* UBYCTX bits */ +#define MSK_BYCT 0x7F + +/* UFNUMH bits */ +#define MSK_CRCOK 0x20 +#define MSK_CRCERR 0x10 +#define MSK_FNUM 0x07 + +/* USBCLK bits */ +#define MSK_USBCD 0x03 + +/* MMCON0 bits */ +#define MSK_DRPTR 0x80 +#define MSK_DTPTR 0x40 +#define MSK_CRPTR 0x20 +#define MSK_CTPTR 0x10 +#define MSK_MBLOCK 0x08 +#define MSK_DFMT 0x04 +#define MSK_RFMT 0x02 +#define MSK_CRCDIS 0x01 + +/* MMCON1 bits */ +#define MSK_BLEN 0xf0 +#define MSK_DATDIR 0x08 +#define MSK_DATEN 0x04 +#define MSK_RESPEN 0x02 +#define MSK_CMDEN 0x01 + +/* MMCON2 bits */ +#define MSK_MMCEN 0x80 +#define MSK_DCR 0x40 +#define MSK_CCR 0x20 +#define MSK_DATD 0x06 +#define MSK_FLOWC 0x01 + +/* MMSTA bits */ +#define MSK_CBUSY 0x20 +#define MSK_CRC16S 0x10 +#define MSK_DATFS 0x08 +#define MSK_CRC7S 0x04 +#define MSK_RESPFS 0x02 +#define MSK_CFLCK 0x01 + +/* MMINT bits */ +#define MSK_MCBI 0x80 +#define MSK_EORI 0x40 +#define MSK_EOCI 0x20 +#define MSK_EOFI 0x10 +#define MSK_F2FI 0x08 +#define MSK_F1FI 0x04 +#define MSK_F2EI 0x02 +#define MSK_F1EI 0x01 + +/* MMMSK bits */ +#define MSK_MCBM 0x80 +#define MSK_EORM 0x40 +#define MSK_EOCM 0x20 +#define MSK_EOFM 0x10 +#define MSK_F2FM 0x08 +#define MSK_F1FM 0x04 +#define MSK_F2EM 0x02 +#define MSK_F1EM 0x01 + +/* BDRCON bits */ +#define MSK_BRR 0x10 +#define MSK_TBCK 0x08 +#define MSK_RBCK 0x04 +#define MSK_SPD 0x02 +#define MSK_M0SRC 0x01 + +/* SPCON bits */ +#define MSK_SPR 0x83 +#define MSK_SPEN 0x40 +#define MSK_SSDIS 0x20 +#define MSK_MSTR 0x10 +#define MSK_MODE 0x0C +#define MSK_CPOL 0x08 +#define MSK_CPHA 0x04 + +/* SPSTA bits */ +#define MSK_SPIF 0x80 +#define MSK_WCOL 0x40 +#define MSK_MODF 0x10 + +/* SSCON bits */ +#define MSK_SSCR 0x83 +#define MSK_SSPE 0x40 +#define MSK_SSSTA 0x20 +#define MSK_SSSTO 0x10 +#define MSK_SSI 0x08 +#define MSK_SSAA 0x04 + +/* SSSTA bits */ +#define MSK_SSC 0xf8 + +/* SSADR bits */ +#define MSK_SSA 0xfe +#define MSK_SSGC 0x01 + +/* KBCON bits */ +#define MSK_KINL 0xf0 +#define MSK_KINM 0x0f + +/* BKSTA bits */ +#define MSK_KPDE 0x80 +#define MSK_KINF 0x0f + +/* ADCON bits */ +#define MSK_ADIDL 0x40 +#define MSK_ADEN 0x20 +#define MSK_ADEOC 0x10 +#define MSK_ADSST 0x80 +#define MSK_ADCS 0x01 + +/* ADCLK bits */ +#define MSK_ADCD 0x1f + +/* ADDL bits */ +#define MSK_ADAT 0x03 + +/* Interrupt numbers: address = (number * 8) + 3 */ +#define IE0_VECTOR 0 /* 0x03 External Interrupt 0 */ +#define TF0_VECTOR 1 /* 0x0b Timer 0 */ +#define IE1_VECTOR 2 /* 0x13 External Interrupt 1 */ +#define TF1_VECTOR 3 /* 0x1b Timer 1 */ +#define SIO_VECTOR 4 /* 0x23 Serial port */ +#define MP3_VECTOR 5 /* 0x2b MP3 Decoder */ +#define AUDIO_VECTOR 6 /* 0x33 Audio Interface */ +#define MMC_VECTOR 7 /* 0x3b MMC Interface */ +#define TWI_VECTOR 8 /* 0x43 Two Wire Controller */ +#define SPI_VECTOR 9 /* 0x4b SPI Controller */ +#define ADC_VECTOR 10 /* 0x53 A to D Contverter */ +#define KBD_VECTOR 11 /* 0x5b Keyboard */ + /* 0x63 Reserved */ +#define USB_VECTOR 13 /* 0x6b USB */ + /* 0x73 Reserved */ + +#endif diff --git a/device/include/mcs51/at89c55.h b/device/include/mcs51/at89c55.h new file mode 100644 index 0000000..17b0ce3 --- /dev/null +++ b/device/include/mcs51/at89c55.h @@ -0,0 +1,259 @@ + +/*------------------------------------------------------------------------- + Register Declarations for ATMEL 89x55 Processors + + Written By - Bernd Bartmann + Bernd.Bartmann@picard.isdn.cs.tu-berlin.de (1999) + based on reg51.h by Sandeep Dutta sandeep.dutta@usa.net + KEIL C compatible definitions are included + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef AT89x55_H +#define AT89x55_H + +/* BYTE addressable registers */ +__sfr __at 0x80 P0 ; +__sfr __at 0x81 SP ; +__sfr __at 0x82 DPL ; +__sfr __at 0x83 DPH ; +__sfr __at 0x87 PCON ; +__sfr __at 0x88 TCON ; +__sfr __at 0x89 TMOD ; +__sfr __at 0x8A TL0 ; +__sfr __at 0x8B TL1 ; +__sfr __at 0x8C TH0 ; +__sfr __at 0x8D TH1 ; +__sfr __at 0x90 P1 ; +__sfr __at 0x98 SCON ; +__sfr __at 0x99 SBUF ; +__sfr __at 0xA0 P2 ; +__sfr __at 0xA8 IE ; +__sfr __at 0xB0 P3 ; +__sfr __at 0xB8 IP ; +__sfr __at 0xC8 T2CON ; +__sfr __at 0xC9 T2MOD ; +__sfr __at 0xCA RCAP2L ; +__sfr __at 0xCB RCAP2H ; +__sfr __at 0xCC TL2 ; +__sfr __at 0xCD TH2 ; +__sfr __at 0xD0 PSW ; +__sfr __at 0xE0 ACC ; +__sfr __at 0xE0 A ; +__sfr __at 0xF0 B ; + + +/* BIT addressable registers */ +/* P0 */ +__sbit __at 0x80 P0_0 ; +__sbit __at 0x81 P0_1 ; +__sbit __at 0x82 P0_2 ; +__sbit __at 0x83 P0_3 ; +__sbit __at 0x84 P0_4 ; +__sbit __at 0x85 P0_5 ; +__sbit __at 0x86 P0_6 ; +__sbit __at 0x87 P0_7 ; + +/* TCON */ +__sbit __at 0x88 IT0 ; +__sbit __at 0x89 IE0 ; +__sbit __at 0x8A IT1 ; +__sbit __at 0x8B IE1 ; +__sbit __at 0x8C TR0 ; +__sbit __at 0x8D TF0 ; +__sbit __at 0x8E TR1 ; +__sbit __at 0x8F TF1 ; + +/* P1 */ +__sbit __at 0x90 P1_0 ; +__sbit __at 0x91 P1_1 ; +__sbit __at 0x92 P1_2 ; +__sbit __at 0x93 P1_3 ; +__sbit __at 0x94 P1_4 ; +__sbit __at 0x95 P1_5 ; +__sbit __at 0x96 P1_6 ; +__sbit __at 0x97 P1_7 ; + +__sbit __at 0x90 T2 ; +__sbit __at 0x91 T2EX ; + +/* SCON */ +__sbit __at 0x98 RI ; +__sbit __at 0x99 TI ; +__sbit __at 0x9A RB8 ; +__sbit __at 0x9B TB8 ; +__sbit __at 0x9C REN ; +__sbit __at 0x9D SM2 ; +__sbit __at 0x9E SM1 ; +__sbit __at 0x9F SM0 ; + +/* P2 */ +__sbit __at 0xA0 P2_0 ; +__sbit __at 0xA1 P2_1 ; +__sbit __at 0xA2 P2_2 ; +__sbit __at 0xA3 P2_3 ; +__sbit __at 0xA4 P2_4 ; +__sbit __at 0xA5 P2_5 ; +__sbit __at 0xA6 P2_6 ; +__sbit __at 0xA7 P2_7 ; + +/* IE */ +__sbit __at 0xA8 EX0 ; +__sbit __at 0xA9 ET0 ; +__sbit __at 0xAA EX1 ; +__sbit __at 0xAB ET1 ; +__sbit __at 0xAC ES ; +__sbit __at 0xAD ET2 ; +__sbit __at 0xAF EA ; + +/* P3 */ +__sbit __at 0xB0 P3_0 ; +__sbit __at 0xB1 P3_1 ; +__sbit __at 0xB2 P3_2 ; +__sbit __at 0xB3 P3_3 ; +__sbit __at 0xB4 P3_4 ; +__sbit __at 0xB5 P3_5 ; +__sbit __at 0xB6 P3_6 ; +__sbit __at 0xB7 P3_7 ; + +__sbit __at 0xB0 RXD ; +__sbit __at 0xB1 TXD ; +__sbit __at 0xB2 INT0 ; +__sbit __at 0xB3 INT1 ; +__sbit __at 0xB4 T0 ; +__sbit __at 0xB5 T1 ; +__sbit __at 0xB6 WR ; +__sbit __at 0xB7 RD ; + +/* IP */ +__sbit __at 0xB8 PX0 ; +__sbit __at 0xB9 PT0 ; +__sbit __at 0xBA PX1 ; +__sbit __at 0xBB PT1 ; +__sbit __at 0xBC PS ; +__sbit __at 0xBD PT2 ; + +/* T2CON */ +__sbit __at 0xC8 T2CON_0 ; +__sbit __at 0xC9 T2CON_1 ; +__sbit __at 0xCA T2CON_2 ; +__sbit __at 0xCB T2CON_3 ; +__sbit __at 0xCC T2CON_4 ; +__sbit __at 0xCD T2CON_5 ; +__sbit __at 0xCE T2CON_6 ; +__sbit __at 0xCF T2CON_7 ; + +__sbit __at 0xC8 CP_RL2 ; +__sbit __at 0xC9 C_T2 ; +__sbit __at 0xCA TR2 ; +__sbit __at 0xCB EXEN2 ; +__sbit __at 0xCC TCLK ; +__sbit __at 0xCD RCLK ; +__sbit __at 0xCE EXF2 ; +__sbit __at 0xCF TF2 ; + +/* PSW */ +__sbit __at 0xD0 P ; +__sbit __at 0xD1 FL ; +__sbit __at 0xD2 OV ; +__sbit __at 0xD3 RS0 ; +__sbit __at 0xD4 RS1 ; +__sbit __at 0xD5 F0 ; +__sbit __at 0xD6 AC ; +__sbit __at 0xD7 CY ; + + +/* BIT definitions for bits that are not directly accessible */ +/* PCON bits */ +#define IDL 0x01 +#define PD 0x02 +#define GF0 0x04 +#define GF1 0x08 +#define SMOD 0x80 + +#define IDL_ 0x01 +#define PD_ 0x02 +#define GF0_ 0x04 +#define GF1_ 0x08 +#define SMOD_ 0x80 + +/* TMOD bits */ +#define M0_0 0x01 +#define M1_0 0x02 +#define C_T0 0x04 +#define GATE0 0x08 +#define M0_1 0x10 +#define M1_1 0x20 +#define C_T1 0x40 +#define GATE1 0x80 + +#define M0_0_ 0x01 +#define M1_0_ 0x02 +#define C_T0_ 0x04 +#define GATE0_ 0x08 +#define M0_1_ 0x10 +#define M1_1_ 0x20 +#define C_T1_ 0x40 +#define GATE1_ 0x80 + +#define T0_M0 0x01 +#define T0_M1 0x02 +#define T0_CT 0x04 +#define T0_GATE 0x08 +#define T1_M0 0x10 +#define T1_M1 0x20 +#define T1_CT 0x40 +#define T1_GATE 0x80 + +#define T0_M0_ 0x01 +#define T0_M1_ 0x02 +#define T0_CT_ 0x04 +#define T0_GATE_ 0x08 +#define T1_M0_ 0x10 +#define T1_M1_ 0x20 +#define T1_CT_ 0x40 +#define T1_GATE_ 0x80 + +#define T0_MASK 0x0F +#define T1_MASK 0xF0 + +#define T0_MASK_ 0x0F +#define T1_MASK_ 0xF0 + +/* T2MOD bits */ +#define DCEN 0x01 +#define T2OE 0x02 + +#define DCEN_ 0x01 +#define T2OE_ 0x02 + + +/* Interrupt numbers: address = (number * 8) + 3 */ +#define IE0_VECTOR 0 /* 0x03 external interrupt 0 */ +#define TF0_VECTOR 1 /* 0x0b timer 0 */ +#define IE1_VECTOR 2 /* 0x13 external interrupt 1 */ +#define TF1_VECTOR 3 /* 0x1b timer 1 */ +#define SI0_VECTOR 4 /* 0x23 serial port 0 */ +#define TF2_VECTOR 5 /* 0x2B timer 2 */ +#define EX2_VECTOR 5 /* 0x2B external interrupt 2 */ + +#endif + + diff --git a/device/include/mcs51/at89s53.h b/device/include/mcs51/at89s53.h new file mode 100644 index 0000000..0cffd2c --- /dev/null +++ b/device/include/mcs51/at89s53.h @@ -0,0 +1,88 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Atmel AT89S53 Processor + + Written By - Jesus Calvino-Fraga / jesusc at ece.ubc.ca (March 2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef REG_AT89S53_H +#define REG_AT89S53_H + +#include <8052.h> /* load difinitions for the 8052 core */ + +#ifdef REG8052_H +#undef REG8052_H +#endif + +/* define AT89S53 specific registers only */ +__sfr __at (0x84) DP1L; /* Data Pointer 1 Low Byte */ +__sfr __at (0x85) DP1H; /* Data Pointer 1 High Byte */ +__sfr __at (0x86) SPDR; /* SPI Data Register */ +__sfr __at (0xAA) SPSR; /* SPI Status Register */ +__sfr __at (0x96) WMCON; /* Watchdog and Memory Control Register */ +__sfr __at (0xD5) SPCR; /* SPI Control Register */ + +/*------------------------------------------------ +SPSR (0xAA) Bit Values - Reset Value = 0000.0000 +------------------------------------------------*/ +#define WCOL_ 0x40 /* SPI Write Collision Flag: 1=Collision */ +#define SPIF_ 0x80 /* SPI Interrupt Flag */ + +/*------------------------------------------------ +WMCON (0x96) Bit Values +------------------------------------------------*/ +#define WDTEN_ 0x01 + +#define WDTRST_ 0x02 /* Watchdog Timer Reset and EEPROM Ready,/Busy Flag*/ +#define EERDY_ 0x02 /* Watchdog Timer Reset and EEPROM Ready,/Busy Flag */ + +#define DPS_ 0x04 /* Data Pointer Select: 0=DP0, 1=DP1 */ +#define EEMEN_ 0x08 /* Internal EEPROM Access Enable: 1=Enabled */ +#define EEMWE_ 0x10 /* Internal EEPROM Write Enable: 1=Enabled */ +#define PS0_ 0x20 /* Prescaler bit 0 for the Watchdog Timer */ +#define PS1_ 0x40 /* Prescaler bit 1 for the Watchdog Timer */ +#define PS2_ 0x80 /* Prescaler bit 2 for the Watchdog Timer */ + /* 000 = 16ms Timeout */ + /* 001 = 32ms Timeout */ + /* 010 = 64ms Timeout */ + /* 011 = 128ms Timeout */ + /* 100 = 256ms Timeout */ + /* 101 = 512ms Timeout */ + /* 110 = 1024ms Timeout */ + /* 111 = 2048ms Timeout */ + +/*------------------------------------------------ +SPCR (0xD5) Bit Values - Reset Value = 0000.01XX +------------------------------------------------*/ +#define SPR0_ 0x01 /* SPI Clock Rate Select bit 0 */ +#define SPR1_ 0x02 /* SPI Clock Rate Select bit 1 */ + /* 00 = Fosc / 4 */ + /* 01 = Fosc / 16 */ + /* 10 = Fosc / 64 */ + /* 11 = Fosc / 128 */ + +#define CPHA_ 0x04 /* SPI Clock Phase */ +#define CPOL_ 0x08 /* SPI Clock Polarity */ +#define MSTR_ 0x10 /* SPI Master/Slave Select: 0=Slave, 1=Master */ +#define DORD_ 0x20 /* SPI Data Order: 0=MSB First, 1=LSB First */ +#define SPE_ 0x40 /* SPI Enable: 0=Disabled, 1=Enabled */ +#define SPIE_ 0x80 /* SPI Interrupt Enable: 0=Disabled, 1=Enabled */ + +#endif /*REG_AT89S53_H*/ diff --git a/device/include/mcs51/at89s8253.h b/device/include/mcs51/at89s8253.h new file mode 100644 index 0000000..36238e0 --- /dev/null +++ b/device/include/mcs51/at89s8253.h @@ -0,0 +1,374 @@ +/*------------------------------------------------------------------------- + Register Declarations for ATMEL 89S8253 Processors + + Written By - Krzysztof Polomka + + based on at89S8252.h By - Dipl.-Ing. (FH) Michael Schmitt + mschmitt@mainz-online.de + michael.schmitt@t-online.de + + Bug-Fix Jun 29 1999 + + Additional definitions Nov 23 1999 + by Bernd Krueger-Knauber + + based on reg51.h by Sandeep Dutta sandeep.dutta@usa.net + KEIL C compatible definitions are included + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef AT89S8253_H +#define AT89S8253_H + +/* BYTE addressable registers */ +__sfr __at (0x80) P0 ; +__sfr __at (0x81) SP ; +__sfr __at (0x82) DPL ; +__sfr __at (0x82) DP0L ; /* as called by Atmel */ +__sfr __at (0x83) DPH ; +__sfr __at (0x83) DP0H ; /* as called by Atmel */ +__sfr __at (0x84) DP1L ; /* at89S8253 specific register */ +__sfr __at (0x85) DP1H ; /* at89S8253 specific register */ +__sfr __at (0x86) SPDR ; /* at89S8253 specific register */ +__sfr __at (0x87) PCON ; +__sfr __at (0x88) TCON ; +__sfr __at (0x89) TMOD ; +__sfr __at (0x8A) TL0 ; +__sfr __at (0x8B) TL1 ; +__sfr __at (0x8C) TH0 ; +__sfr __at (0x8D) TH1 ; +__sfr __at (0x8E) AUXR ; /* at89S8253 specific register */ +__sfr __at (0x8F) CLKREG ; /* at89S8253 specific register */ +__sfr __at (0x90) P1 ; +__sfr __at (0x96) EECON ; /* at89S8253 specific register */ +__sfr __at (0x98) SCON ; +__sfr __at (0x99) SBUF ; +__sfr __at (0xA0) P2 ; +__sfr __at (0xA6) WDTRST ; /* at89S8253 specific register */ +__sfr __at (0xA7) WDTCON ; /* at89S8253 specific register */ +__sfr __at (0xA8) IE ; +__sfr __at (0xA9) SADDR ; /* at89S8253 specific register */ +__sfr __at (0xAA) SPSR ; /* at89S8253 specific register */ +__sfr __at (0xB0) P3 ; +__sfr __at (0xB7) IPH ; /* at89S8253 specific register */ +__sfr __at (0xB8) IP ; +__sfr __at (0xB9) SADEN ; /* at89S8253 specific register */ +__sfr __at (0xC8) T2CON ; +__sfr __at (0xC9) T2MOD ; +__sfr __at (0xCA) RCAP2L ; +__sfr __at (0xCB) RCAP2H ; +__sfr __at (0xCC) TL2 ; +__sfr __at (0xCD) TH2 ; +__sfr __at (0xD0) PSW ; +__sfr __at (0xD5) SPCR ; /* at89S8253 specific register */ +__sfr __at (0xE0) ACC ; +__sfr __at (0xE0) A ; +__sfr __at (0xF0) B ; + + +/* BIT addressable registers */ +/* P0 */ +__sbit __at (0x80) P0_0 ; +__sbit __at (0x81) P0_1 ; +__sbit __at (0x82) P0_2 ; +__sbit __at (0x83) P0_3 ; +__sbit __at (0x84) P0_4 ; +__sbit __at (0x85) P0_5 ; +__sbit __at (0x86) P0_6 ; +__sbit __at (0x87) P0_7 ; + +/* TCON */ +__sbit __at (0x88) IT0 ; +__sbit __at (0x89) IE0 ; +__sbit __at (0x8A) IT1 ; +__sbit __at (0x8B) IE1 ; +__sbit __at (0x8C) TR0 ; +__sbit __at (0x8D) TF0 ; +__sbit __at (0x8E) TR1 ; +__sbit __at (0x8F) TF1 ; + +/* P1 */ +__sbit __at (0x90) P1_0 ; +__sbit __at (0x91) P1_1 ; +__sbit __at (0x92) P1_2 ; +__sbit __at (0x93) P1_3 ; +__sbit __at (0x94) P1_4 ; +__sbit __at (0x95) P1_5 ; +__sbit __at (0x96) P1_6 ; +__sbit __at (0x97) P1_7 ; + +__sbit __at (0x90) T2 ; +__sbit __at (0x91) T2EX ; + +/* P1 SPI portpins */ +__sbit __at (0x94) SS ; /* SPI: SS - Slave port select input */ +__sbit __at (0x95) MOSI ; /* SPI: MOSI - Master data output, slave data input */ +__sbit __at (0x96) MISO ; /* SPI: MISO - Master data input, slave data output */ +__sbit __at (0x97) SCK ; /* SPI: SCK - Master clock output, slave clock input */ + + +/* SCON */ +__sbit __at (0x98) RI ; +__sbit __at (0x99) TI ; +__sbit __at (0x9A) RB8 ; +__sbit __at (0x9B) TB8 ; +__sbit __at (0x9C) REN ; +__sbit __at (0x9D) SM2 ; +__sbit __at (0x9E) SM1 ; +__sbit __at (0x9F) SM0 ; + +/* P2 */ +__sbit __at (0xA0) P2_0 ; +__sbit __at (0xA1) P2_1 ; +__sbit __at (0xA2) P2_2 ; +__sbit __at (0xA3) P2_3 ; +__sbit __at (0xA4) P2_4 ; +__sbit __at (0xA5) P2_5 ; +__sbit __at (0xA6) P2_6 ; +__sbit __at (0xA7) P2_7 ; + +/* IE */ +__sbit __at (0xA8) EX0 ; +__sbit __at (0xA9) ET0 ; +__sbit __at (0xAA) EX1 ; +__sbit __at (0xAB) ET1 ; +__sbit __at (0xAC) ES ; +__sbit __at (0xAD) ET2 ; +__sbit __at (0xAF) EA ; + +/* P3 */ +__sbit __at (0xB0) P3_0 ; +__sbit __at (0xB1) P3_1 ; +__sbit __at (0xB2) P3_2 ; +__sbit __at (0xB3) P3_3 ; +__sbit __at (0xB4) P3_4 ; +__sbit __at (0xB5) P3_5 ; +__sbit __at (0xB6) P3_6 ; +__sbit __at (0xB7) P3_7 ; + +__sbit __at (0xB0) RXD ; +__sbit __at (0xB1) TXD ; +__sbit __at (0xB2) INT0 ; +__sbit __at (0xB3) INT1 ; +__sbit __at (0xB4) T0 ; +__sbit __at (0xB5) T1 ; +__sbit __at (0xB6) WR ; +__sbit __at (0xB7) RD ; + +/* IP */ +__sbit __at (0xB8) PX0 ; +__sbit __at (0xB9) PT0 ; +__sbit __at (0xBA) PX1 ; +__sbit __at (0xBB) PT1 ; +__sbit __at (0xBC) PS ; +__sbit __at (0xBD) PT2 ; + +/* T2CON */ +__sbit __at (0xC8) T2CON_0 ; +__sbit __at (0xC9) T2CON_1 ; +__sbit __at (0xCA) T2CON_2 ; +__sbit __at (0xCB) T2CON_3 ; +__sbit __at (0xCC) T2CON_4 ; +__sbit __at (0xCD) T2CON_5 ; +__sbit __at (0xCE) T2CON_6 ; +__sbit __at (0xCF) T2CON_7 ; + +__sbit __at (0xC8) CP_RL2 ; +__sbit __at (0xC9) C_T2 ; +__sbit __at (0xCA) TR2 ; +__sbit __at (0xCB) EXEN2 ; +__sbit __at (0xCC) TCLK ; +__sbit __at (0xCD) RCLK ; +__sbit __at (0xCE) EXF2 ; +__sbit __at (0xCF) TF2 ; + +/* PSW */ +__sbit __at (0xD0) P ; +__sbit __at (0xD1) FL ; +__sbit __at (0xD2) OV ; +__sbit __at (0xD3) RS0 ; +__sbit __at (0xD4) RS1 ; +__sbit __at (0xD5) F0 ; +__sbit __at (0xD6) AC ; +__sbit __at (0xD7) CY ; + +/* B */ +__sbit __at (0xF0) BREG_F0 ; +__sbit __at (0xF1) BREG_F1 ; +__sbit __at (0xF2) BREG_F2 ; +__sbit __at (0xF3) BREG_F3 ; +__sbit __at (0xF4) BREG_F4 ; +__sbit __at (0xF5) BREG_F5 ; +__sbit __at (0xF6) BREG_F6 ; +__sbit __at (0xF7) BREG_F7 ; + + +/* BIT definitions for bits that are not directly accessible */ +/* PCON bits */ +#define IDL 0x01 +#define PD 0x02 +#define GF0 0x04 +#define GF1 0x08 +#define SMOD 0x80 + +#define IDL_ 0x01 +#define PD_ 0x02 +#define GF0_ 0x04 +#define GF1_ 0x08 +#define SMOD_ 0x80 + +/* TMOD bits */ +#define M0_0 0x01 +#define M1_0 0x02 +#define C_T0 0x04 +#define GATE0 0x08 +#define M0_1 0x10 +#define M1_1 0x20 +#define C_T1 0x40 +#define GATE1 0x80 + +#define M0_0_ 0x01 +#define M1_0_ 0x02 +#define C_T0_ 0x04 +#define GATE0_ 0x08 +#define M0_1_ 0x10 +#define M1_1_ 0x20 +#define C_T1_ 0x40 +#define GATE1_ 0x80 + +#define T0_M0 0x01 +#define T0_M1 0x02 +#define T0_CT 0x04 +#define T0_GATE 0x08 +#define T1_M0 0x10 +#define T1_M1 0x20 +#define T1_CT 0x40 +#define T1_GATE 0x80 + +#define T0_M0_ 0x01 +#define T0_M1_ 0x02 +#define T0_CT_ 0x04 +#define T0_GATE_ 0x08 +#define T1_M0_ 0x10 +#define T1_M1_ 0x20 +#define T1_CT_ 0x40 +#define T1_GATE_ 0x80 + +#define T0_MASK 0x0F +#define T1_MASK 0xF0 + +#define T0_MASK_ 0x0F +#define T1_MASK_ 0xF0 + +/* T2MOD bits */ +#define DCEN 0x01 +#define T2OE 0x02 + +#define DCEN_ 0x01 +#define T2OE_ 0x02 + +/* EECON bits */ +#define EECON_WRTINH 0x01 +#define EECON_RDY 0x02 +#define EECON_DPS 0x04 +#define EECON_EEMEN 0x08 +#define EECON_EEMWE 0x10 +#define EECON_EELD 0x20 + +/* WDTCON bits */ +#define WDTCON_WDTEN 0x01 +#define WDTCON_WSWRST 0x02 +#define WDTCON_HWDT 0x04 +#define WDTCON_DISRTO 0x08 +#define WDTCON_WDIDLE 0x10 +#define WDTCON_PS0 0x20 +#define WDTCON_PS1 0x40 +#define WDTCON_PS2 0x80 + +/* SPCR-SPI bits */ +#define SPCR_SPR0 0x01 +#define SPCR_SPR1 0x02 +#define SPCR_CPHA 0x04 +#define SPCR_CPOL 0x08 +#define SPCR_MSTR 0x10 +#define SPCR_DORD 0x20 +#define SPCR_SPE 0x40 +#define SPCR_SPIE 0x80 + +/* SPSR-SPI bits */ +#define SPSR_ENH 0x01 +#define SPSR_DISSO 0x02 +#define SPSR_LDEN 0x20 +#define SPSR_WCOL 0x40 +#define SPSR_SPIF 0x80 + +/* SPDR-SPI bits */ +#define SPDR_SPD0 0x01 +#define SPDR_SPD1 0x02 +#define SPDR_SPD2 0x04 +#define SPDR_SPD3 0x08 +#define SPDR_SPD4 0x10 +#define SPDR_SPD5 0x20 +#define SPDR_SPD6 0x40 +#define SPDR_SPD7 0x80 + +/* IPH bits */ +#define IPH_PX0H 0x01 +#define IPH_PT0H 0x02 +#define IPH_PX1H 0x04 +#define IPH_PT1H 0x08 +#define IPH_PSH 0x10 +#define IPH_PT2H 0x20 + +/* Interrupt numbers: address = (number * 8) + 3 */ +#define IE0_VECTOR 0 /* 0x03 external interrupt 0 */ +#define EX0_VECTOR 0 /* 0x03 external interrupt 0 */ +#define TF0_VECTOR 1 /* 0x0b timer 0 */ +#define IE1_VECTOR 2 /* 0x13 external interrupt 1 */ +#define EX1_VECTOR 2 /* 0x13 external interrupt 1 */ +#define TF1_VECTOR 3 /* 0x1b timer 1 */ +#define SI0_VECTOR 4 /* 0x23 serial port 0 */ +#define TF2_VECTOR 5 /* 0x2B timer 2 */ +#define EX2_VECTOR 5 /* 0x2B external interrupt 2 */ + +/* AUXR bits */ +#define AUXR_DISALE 0x01 +#define AUXR_INTEL_PWD_EXIT 0x02 + +/* CLKREG bits */ +#define CLKREG_X2 0x01 + +/* This is one of the addons coming from Bernd Krueger-Knauber */ + +/* ALE (0x8E) Bit Values */ +__sfr __at (0x8E) ALE; /* at89S8252 specific register */ + +/* Macro to enable and disable the toggling of the ALE-pin (EMV) */ + +/* Explanation : Original Intel 8051 Cores (Atmel has to use the */ +/* Intel Core) have a feature that ALE is only active during */ +/* MOVX or MOVC instruction. Otherwise the ALE-Pin is weakly */ +/* pulled high. This can be used to force some external devices */ +/* into standby mode and reduced EMI noise */ + +#define ALE_OFF ALE = ALE | 0x01 +#define ALE_ON ALE = ALE & 0xFE + +#endif diff --git a/device/include/mcs51/at89x051.h b/device/include/mcs51/at89x051.h new file mode 100644 index 0000000..8156b4c --- /dev/null +++ b/device/include/mcs51/at89x051.h @@ -0,0 +1,65 @@ +/*------------------------------------------------------------------------- + Register Declarations for Atmel AT89C1051, AT89C2051 and AT89C4051 Processors + + Written By - Bela Torok (august 2000) + bela.torokt@kssg.ch + based on 8051.h (8051.h must be in mcs51 subdirectory) + + KEIL C compatible definitions are included + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef AT89Cx051_H +#define AT89Cx051_H + +#include <8051.h> /* load difinitions for the 8051 core */ + +#ifdef REG8051_H +#undef REG8051_H +#endif + +/* remove non existing registers */ + +#ifdef P0 /* P0 is defined in <8051.h> */ +#undef P0 /* AT89Cx051 has no P0 */ +#undef P0_0 /* undefine bit addressable registers in P0 */ +#undef P0_1 +#undef P0_2 +#undef P0_3 +#undef P0_4 +#undef P0_5 +#undef P0_6 +#undef P0_7 +#endif + +#ifdef P2 /* P2 is defined in <8051.h> */ +#undef P2 /* AT89Cx051 has no P2 */ +#undef P2_0 /* undefine bit addressable registers in P2 */ +#undef P2_1 +#undef P2_2 +#undef P2_3 +#undef P2_4 +#undef P2_5 +#undef P2_6 +#undef P2_7 +#endif + +#endif + diff --git a/device/include/mcs51/at89x51.h b/device/include/mcs51/at89x51.h new file mode 100644 index 0000000..7344274 --- /dev/null +++ b/device/include/mcs51/at89x51.h @@ -0,0 +1,218 @@ +/*------------------------------------------------------------------------- + Register Declarations for ATMEL 89x51 Processors + + Written By - Bernd Bartmann + Bernd.Bartmann@picard.isdn.cs.tu-berlin.de (1999) + based on reg51.h by Sandeep Dutta sandeep.dutta@usa.net + KEIL C compatible definitions are included + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef AT89x51_H +#define AT89x51_H + +/* BYTE addressable registers */ +__sfr __at 0x80 P0 ; +__sfr __at 0x81 SP ; +__sfr __at 0x82 DPL ; +__sfr __at 0x83 DPH ; +__sfr __at 0x87 PCON ; +__sfr __at 0x88 TCON ; +__sfr __at 0x89 TMOD ; +__sfr __at 0x8A TL0 ; +__sfr __at 0x8B TL1 ; +__sfr __at 0x8C TH0 ; +__sfr __at 0x8D TH1 ; +__sfr __at 0x90 P1 ; +__sfr __at 0x98 SCON ; +__sfr __at 0x99 SBUF ; +__sfr __at 0xA0 P2 ; +__sfr __at 0xA8 IE ; +__sfr __at 0xB0 P3 ; +__sfr __at 0xB8 IP ; +__sfr __at 0xD0 PSW ; +__sfr __at 0xE0 ACC ; +__sfr __at 0xE0 A ; +__sfr __at 0xF0 B ; + + +/* BIT addressable registers */ +/* P0 */ +__sbit __at 0x80 P0_0 ; +__sbit __at 0x81 P0_1 ; +__sbit __at 0x82 P0_2 ; +__sbit __at 0x83 P0_3 ; +__sbit __at 0x84 P0_4 ; +__sbit __at 0x85 P0_5 ; +__sbit __at 0x86 P0_6 ; +__sbit __at 0x87 P0_7 ; + +/* TCON */ +__sbit __at 0x88 IT0 ; +__sbit __at 0x89 IE0 ; +__sbit __at 0x8A IT1 ; +__sbit __at 0x8B IE1 ; +__sbit __at 0x8C TR0 ; +__sbit __at 0x8D TF0 ; +__sbit __at 0x8E TR1 ; +__sbit __at 0x8F TF1 ; + +/* P1 */ +__sbit __at 0x90 P1_0 ; +__sbit __at 0x91 P1_1 ; +__sbit __at 0x92 P1_2 ; +__sbit __at 0x93 P1_3 ; +__sbit __at 0x94 P1_4 ; +__sbit __at 0x95 P1_5 ; +__sbit __at 0x96 P1_6 ; +__sbit __at 0x97 P1_7 ; + +/* SCON */ +__sbit __at 0x98 RI ; +__sbit __at 0x99 TI ; +__sbit __at 0x9A RB8 ; +__sbit __at 0x9B TB8 ; +__sbit __at 0x9C REN ; +__sbit __at 0x9D SM2 ; +__sbit __at 0x9E SM1 ; +__sbit __at 0x9F SM0 ; + +/* P2 */ +__sbit __at 0xA0 P2_0 ; +__sbit __at 0xA1 P2_1 ; +__sbit __at 0xA2 P2_2 ; +__sbit __at 0xA3 P2_3 ; +__sbit __at 0xA4 P2_4 ; +__sbit __at 0xA5 P2_5 ; +__sbit __at 0xA6 P2_6 ; +__sbit __at 0xA7 P2_7 ; + +/* IE */ +__sbit __at 0xA8 EX0 ; +__sbit __at 0xA9 ET0 ; +__sbit __at 0xAA EX1 ; +__sbit __at 0xAB ET1 ; +__sbit __at 0xAC ES ; +__sbit __at 0xAF EA ; + +/* P3 */ +__sbit __at 0xB0 P3_0 ; +__sbit __at 0xB1 P3_1 ; +__sbit __at 0xB2 P3_2 ; +__sbit __at 0xB3 P3_3 ; +__sbit __at 0xB4 P3_4 ; +__sbit __at 0xB5 P3_5 ; +__sbit __at 0xB6 P3_6 ; +__sbit __at 0xB7 P3_7 ; + +__sbit __at 0xB0 RXD ; +__sbit __at 0xB1 TXD ; +__sbit __at 0xB2 INT0 ; +__sbit __at 0xB3 INT1 ; +__sbit __at 0xB4 T0 ; +__sbit __at 0xB5 T1 ; +__sbit __at 0xB6 WR ; +__sbit __at 0xB7 RD ; + +/* IP */ +__sbit __at 0xB8 PX0 ; +__sbit __at 0xB9 PT0 ; +__sbit __at 0xBA PX1 ; +__sbit __at 0xBB PT1 ; +__sbit __at 0xBC PS ; + +/* PSW */ +__sbit __at 0xD0 P ; +__sbit __at 0xD1 FL ; +__sbit __at 0xD2 OV ; +__sbit __at 0xD3 RS0 ; +__sbit __at 0xD4 RS1 ; +__sbit __at 0xD5 F0 ; +__sbit __at 0xD6 AC ; +__sbit __at 0xD7 CY ; + + +/* BIT definitions for bits that are not directly accessible */ +/* PCON bits */ +#define IDL 0x01 +#define PD 0x02 +#define GF0 0x04 +#define GF1 0x08 +#define SMOD 0x80 + +#define IDL_ 0x01 +#define PD_ 0x02 +#define GF0_ 0x04 +#define GF1_ 0x08 +#define SMOD_ 0x80 + +/* TMOD bits */ +#define M0_0 0x01 +#define M1_0 0x02 +#define C_T0 0x04 +#define GATE0 0x08 +#define M0_1 0x10 +#define M1_1 0x20 +#define C_T1 0x40 +#define GATE1 0x80 + +#define M0_0_ 0x01 +#define M1_0_ 0x02 +#define C_T0_ 0x04 +#define GATE0_ 0x08 +#define M0_1_ 0x10 +#define M1_1_ 0x20 +#define C_T1_ 0x40 +#define GATE1_ 0x80 + +#define T0_M0 0x01 +#define T0_M1 0x02 +#define T0_CT 0x04 +#define T0_GATE 0x08 +#define T1_M0 0x10 +#define T1_M1 0x20 +#define T1_CT 0x40 +#define T1_GATE 0x80 + +#define T0_M0_ 0x01 +#define T0_M1_ 0x02 +#define T0_CT_ 0x04 +#define T0_GATE_ 0x08 +#define T1_M0_ 0x10 +#define T1_M1_ 0x20 +#define T1_CT_ 0x40 +#define T1_GATE_ 0x80 + +#define T0_MASK 0x0F +#define T1_MASK 0xF0 + +#define T0_MASK_ 0x0F +#define T1_MASK_ 0xF0 + + +/* Interrupt numbers: address = (number * 8) + 3 */ +#define IE0_VECTOR 0 /* 0x03 external interrupt 0 */ +#define TF0_VECTOR 1 /* 0x0b timer 0 */ +#define IE1_VECTOR 2 /* 0x13 external interrupt 1 */ +#define TF1_VECTOR 3 /* 0x1b timer 1 */ +#define SI0_VECTOR 4 /* 0x23 serial port 0 */ + +#endif + diff --git a/device/include/mcs51/at89x52.h b/device/include/mcs51/at89x52.h new file mode 100644 index 0000000..2a01438 --- /dev/null +++ b/device/include/mcs51/at89x52.h @@ -0,0 +1,257 @@ +/*------------------------------------------------------------------------- + Register Declarations for ATMEL 89x52 Processors + + Written By - Bernd Bartmann + Bernd.Bartmann@picard.isdn.cs.tu-berlin.de (1999) + based on reg51.h by Sandeep Dutta sandeep.dutta@usa.net + KEIL C compatible definitions are included + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef AT89x52_H +#define AT89x52_H + +/* BYTE addressable registers */ +__sfr __at 0x80 P0 ; +__sfr __at 0x81 SP ; +__sfr __at 0x82 DPL ; +__sfr __at 0x83 DPH ; +__sfr __at 0x87 PCON ; +__sfr __at 0x88 TCON ; +__sfr __at 0x89 TMOD ; +__sfr __at 0x8A TL0 ; +__sfr __at 0x8B TL1 ; +__sfr __at 0x8C TH0 ; +__sfr __at 0x8D TH1 ; +__sfr __at 0x90 P1 ; +__sfr __at 0x98 SCON ; +__sfr __at 0x99 SBUF ; +__sfr __at 0xA0 P2 ; +__sfr __at 0xA8 IE ; +__sfr __at 0xB0 P3 ; +__sfr __at 0xB8 IP ; +__sfr __at 0xC8 T2CON ; +__sfr __at 0xC9 T2MOD ; +__sfr __at 0xCA RCAP2L ; +__sfr __at 0xCB RCAP2H ; +__sfr __at 0xCC TL2 ; +__sfr __at 0xCD TH2 ; +__sfr __at 0xD0 PSW ; +__sfr __at 0xE0 ACC ; +__sfr __at 0xE0 A ; +__sfr __at 0xF0 B ; + + +/* BIT addressable registers */ +/* P0 */ +__sbit __at 0x80 P0_0 ; +__sbit __at 0x81 P0_1 ; +__sbit __at 0x82 P0_2 ; +__sbit __at 0x83 P0_3 ; +__sbit __at 0x84 P0_4 ; +__sbit __at 0x85 P0_5 ; +__sbit __at 0x86 P0_6 ; +__sbit __at 0x87 P0_7 ; + +/* TCON */ +__sbit __at 0x88 IT0 ; +__sbit __at 0x89 IE0 ; +__sbit __at 0x8A IT1 ; +__sbit __at 0x8B IE1 ; +__sbit __at 0x8C TR0 ; +__sbit __at 0x8D TF0 ; +__sbit __at 0x8E TR1 ; +__sbit __at 0x8F TF1 ; + +/* P1 */ +__sbit __at 0x90 P1_0 ; +__sbit __at 0x91 P1_1 ; +__sbit __at 0x92 P1_2 ; +__sbit __at 0x93 P1_3 ; +__sbit __at 0x94 P1_4 ; +__sbit __at 0x95 P1_5 ; +__sbit __at 0x96 P1_6 ; +__sbit __at 0x97 P1_7 ; + +__sbit __at 0x90 T2 ; +__sbit __at 0x91 T2EX ; + +/* SCON */ +__sbit __at 0x98 RI ; +__sbit __at 0x99 TI ; +__sbit __at 0x9A RB8 ; +__sbit __at 0x9B TB8 ; +__sbit __at 0x9C REN ; +__sbit __at 0x9D SM2 ; +__sbit __at 0x9E SM1 ; +__sbit __at 0x9F SM0 ; + +/* P2 */ +__sbit __at 0xA0 P2_0 ; +__sbit __at 0xA1 P2_1 ; +__sbit __at 0xA2 P2_2 ; +__sbit __at 0xA3 P2_3 ; +__sbit __at 0xA4 P2_4 ; +__sbit __at 0xA5 P2_5 ; +__sbit __at 0xA6 P2_6 ; +__sbit __at 0xA7 P2_7 ; + +/* IE */ +__sbit __at 0xA8 EX0 ; +__sbit __at 0xA9 ET0 ; +__sbit __at 0xAA EX1 ; +__sbit __at 0xAB ET1 ; +__sbit __at 0xAC ES ; +__sbit __at 0xAD ET2 ; +__sbit __at 0xAF EA ; + +/* P3 */ +__sbit __at 0xB0 P3_0 ; +__sbit __at 0xB1 P3_1 ; +__sbit __at 0xB2 P3_2 ; +__sbit __at 0xB3 P3_3 ; +__sbit __at 0xB4 P3_4 ; +__sbit __at 0xB5 P3_5 ; +__sbit __at 0xB6 P3_6 ; +__sbit __at 0xB7 P3_7 ; + +__sbit __at 0xB0 RXD ; +__sbit __at 0xB1 TXD ; +__sbit __at 0xB2 INT0 ; +__sbit __at 0xB3 INT1 ; +__sbit __at 0xB4 T0 ; +__sbit __at 0xB5 T1 ; +__sbit __at 0xB6 WR ; +__sbit __at 0xB7 RD ; + +/* IP */ +__sbit __at 0xB8 PX0 ; +__sbit __at 0xB9 PT0 ; +__sbit __at 0xBA PX1 ; +__sbit __at 0xBB PT1 ; +__sbit __at 0xBC PS ; +__sbit __at 0xBD PT2 ; + +/* T2CON */ +__sbit __at 0xC8 T2CON_0 ; +__sbit __at 0xC9 T2CON_1 ; +__sbit __at 0xCA T2CON_2 ; +__sbit __at 0xCB T2CON_3 ; +__sbit __at 0xCC T2CON_4 ; +__sbit __at 0xCD T2CON_5 ; +__sbit __at 0xCE T2CON_6 ; +__sbit __at 0xCF T2CON_7 ; + +__sbit __at 0xC8 CP_RL2 ; +__sbit __at 0xC9 C_T2 ; +__sbit __at 0xCA TR2 ; +__sbit __at 0xCB EXEN2 ; +__sbit __at 0xCC TCLK ; +__sbit __at 0xCD RCLK ; +__sbit __at 0xCE EXF2 ; +__sbit __at 0xCF TF2 ; + +/* PSW */ +__sbit __at 0xD0 P ; +__sbit __at 0xD1 FL ; +__sbit __at 0xD2 OV ; +__sbit __at 0xD3 RS0 ; +__sbit __at 0xD4 RS1 ; +__sbit __at 0xD5 F0 ; +__sbit __at 0xD6 AC ; +__sbit __at 0xD7 CY ; + + +/* BIT definitions for bits that are not directly accessible */ +/* PCON bits */ +#define IDL 0x01 +#define PD 0x02 +#define GF0 0x04 +#define GF1 0x08 +#define SMOD 0x80 + +#define IDL_ 0x01 +#define PD_ 0x02 +#define GF0_ 0x04 +#define GF1_ 0x08 +#define SMOD_ 0x80 + +/* TMOD bits */ +#define M0_0 0x01 +#define M1_0 0x02 +#define C_T0 0x04 +#define GATE0 0x08 +#define M0_1 0x10 +#define M1_1 0x20 +#define C_T1 0x40 +#define GATE1 0x80 + +#define M0_0_ 0x01 +#define M1_0_ 0x02 +#define C_T0_ 0x04 +#define GATE0_ 0x08 +#define M0_1_ 0x10 +#define M1_1_ 0x20 +#define C_T1_ 0x40 +#define GATE1_ 0x80 + +#define T0_M0 0x01 +#define T0_M1 0x02 +#define T0_CT 0x04 +#define T0_GATE 0x08 +#define T1_M0 0x10 +#define T1_M1 0x20 +#define T1_CT 0x40 +#define T1_GATE 0x80 + +#define T0_M0_ 0x01 +#define T0_M1_ 0x02 +#define T0_CT_ 0x04 +#define T0_GATE_ 0x08 +#define T1_M0_ 0x10 +#define T1_M1_ 0x20 +#define T1_CT_ 0x40 +#define T1_GATE_ 0x80 + +#define T0_MASK 0x0F +#define T1_MASK 0xF0 + +#define T0_MASK_ 0x0F +#define T1_MASK_ 0xF0 + +/* T2MOD bits */ +#define DCEN 0x01 +#define T2OE 0x02 + +#define DCEN_ 0x01 +#define T2OE_ 0x02 + + +/* Interrupt numbers: address = (number * 8) + 3 */ +#define IE0_VECTOR 0 /* 0x03 external interrupt 0 */ +#define TF0_VECTOR 1 /* 0x0b timer 0 */ +#define IE1_VECTOR 2 /* 0x13 external interrupt 1 */ +#define TF1_VECTOR 3 /* 0x1b timer 1 */ +#define SI0_VECTOR 4 /* 0x23 serial port 0 */ +#define TF2_VECTOR 5 /* 0x2B timer 2 */ +#define EX2_VECTOR 5 /* 0x2B external interrupt 2 */ + +#endif + diff --git a/device/include/mcs51/cc1110.h b/device/include/mcs51/cc1110.h new file mode 100644 index 0000000..8e978ac --- /dev/null +++ b/device/include/mcs51/cc1110.h @@ -0,0 +1,557 @@ +/*------------------------------------------------------------------------- + Register Declarations for Chipcon CC1110 + + Written By - Pravin Angolkar (February 2008) + (Based on CC1110 PRELIMINARY Data Sheet (rev. F) ) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef REG_CC1110_H +#define REG_CC1110_H + +#include +/* ------------------------------------------------------------------------------------------------ + * Interrupt Vectors + * ------------------------------------------------------------------------------------------------ + */ +#define RFTXRX_VECTOR 0 /* RF TX done / RX ready */ +#define ADC_VECTOR 1 /* ADC End of Conversion */ +#define URX0_VECTOR 2 /* USART0 RX Complete */ +#define URX1_VECTOR 3 /* USART1 RX Complete */ +#define ENC_VECTOR 4 /* AES Encryption/Decryption Complete */ +#define ST_VECTOR 5 /* Sleep Timer Compare */ +#define P2INT_VECTOR 6 /* Port 2 Inputs */ +#define UTX0_VECTOR 7 /* USART0 TX Complete */ +#define DMA_VECTOR 8 /* DMA Transfer Complete */ +#define T1_VECTOR 9 /* Timer 1 (16-bit) Capture/Compare/Overflow */ +#define T2_VECTOR 10 /* Timer 2 (MAC Timer) Overflow */ +#define T3_VECTOR 11 /* Timer 3 (8-bit) Capture/Compare/Overflow */ +#define T4_VECTOR 12 /* Timer 4 (8-bit) Capture/Compare/Overflow */ +#define P0INT_VECTOR 13 /* Port 0 Inputs */ +#define UTX1_VECTOR 14 /* USART1 TX Complete */ +#define P1INT_VECTOR 15 /* Port 1 Inputs */ +#define RF_VECTOR 16 /* RF General Interrupts */ +#define WDT_VECTOR 17 /* Watchdog Overflow in Timer Mode */ + +SFR(P0, 0x80); // Port 0 + SBIT(P0_0, 0x80, 0); // Port 0 bit 0 + SBIT(P0_1, 0x80, 1); // Port 0 bit 1 + SBIT(P0_2, 0x80, 2); // Port 0 bit 2 + SBIT(P0_3, 0x80, 3); // Port 0 bit 3 + SBIT(P0_4, 0x80, 4); // Port 0 bit 4 + SBIT(P0_5, 0x80, 5); // Port 0 bit 5 + SBIT(P0_6, 0x80, 6); // Port 0 bit 6 + SBIT(P0_7, 0x80, 7); // Port 0 bit 7 + +SFR(SP, 0x81); // Stack Pointer +SFR(DPL0, 0x82); // Data Pointer 0 Low Byte +SFR(DPH0, 0x83); // Data Pointer 0 High Byte +SFR(DPL1, 0x84); // Data Pointer 1 Low Byte +SFR(DPH1, 0x85); // Data Pointer 1 High Byte +SFR(U0CSR, 0x86); // USART 0 Control and Status +SFR(PCON, 0x87); // Power Mode Control + +SFR(TCON, 0x88); // Interrupt Flags + SBIT(IT0, 0x88, 0); // reserved (must always be set to 1) + SBIT(RFTXRXIF, 0x88, 1); // RFERR – RF TX/RX FIFO interrupt flag + SBIT(IT1, 0x88, 2); // reserved (must always be set to 1) + SBIT(URX0IF, 0x88, 3); // USART0 RX Interrupt Flag + SBIT(ADCIF, 0x88, 5); // ADC Interrupt Flag + SBIT(URX1IF, 0x88, 7); // USART1 RX Interrupt Flag + +SFR(P0IFG, 0x89); // Port 0 Interrupt Status Flag +SFR(P1IFG, 0x8A); // Port 1 Interrupt Status Flag +SFR(P2IFG, 0x8B); // Port 2 Interrupt Status Flag +SFR(PICTL, 0x8C); // Port Interrupt Control +SFR(P1IEN, 0x8D); // Port 1 Interrupt Mask +SFR(_SFR8E, 0x8E); // not used +SFR(P0INP, 0x8F); // Port 0 Input Mode + +SFR(P1, 0x90); // Port 1 + SBIT(P1_0, 0x90, 0); // Port 1 bit 0 + SBIT(P1_1, 0x90, 1); // Port 1 bit 1 + SBIT(P1_2, 0x90, 2); // Port 1 bit 2 + SBIT(P1_3, 0x90, 3); // Port 1 bit 3 + SBIT(P1_4, 0x90, 4); // Port 1 bit 4 + SBIT(P1_5, 0x90, 5); // Port 1 bit 5 + SBIT(P1_6, 0x90, 6); // Port 1 bit 6 + SBIT(P1_7, 0x90, 7); // Port 1 bit 7 + +SFR(RFIM, 0x91); // RF Interrupt Mask +SFR(DPS, 0x92); // Data Pointer Select +SFR(MPAGE, 0x93); // Memory Page Select +SFR(_XPAGE, 0x93); // Memory Page Select under the name SDCC needs it +SFR(_SFR94, 0x94); // not used +SFR(_SFR95, 0x95); // not used +SFR(_SFR96, 0x96); // not used +SFR(_SFR97, 0x97); // not used + +SFR(S0CON, 0x98); // Interrupt Flags 2 + SBIT(ENCIF_0, 0x98, 0); // AES Interrupt Flag 0 + SBIT(ENCIF_1, 0x98, 1); // AES Interrupt Flag 1 + +SFR(_SFR99, 0x99); // not used +SFR(IEN2, 0x9A); // Interrupt Enable 2 +SFR(S1CON, 0x9B); // CPU Interrupt Flag 3 +SFR(T2CT, 0x9C); // Timer 2 Count +SFR(T2PR, 0x9D); // Timer 2 Prescaler +SFR(T2CTL, 0x9E); // Timer 2 Control +SFR(_SFR9F, 0x9F); // not used + +SFR(P2, 0xA0); // Port 2 + SBIT(P2_0, 0xA0, 0); // Port 2 bit 0 + SBIT(P2_1, 0xA0, 1); // Port 2 bit 1 + SBIT(P2_2, 0xA0, 2); // Port 2 bit 2 + SBIT(P2_3, 0xA0, 3); // Port 2 bit 3 + SBIT(P2_4, 0xA0, 4); // Port 2 bit 4 + SBIT(P2_5, 0xA0, 5); // Port 2 bit 5 + SBIT(P2_6, 0xA0, 6); // Port 2 bit 6 + SBIT(P2_7, 0xA0, 7); // Port 2 bit 7 + +SFR(WORIRQ, 0xA1); // Sleep Timer Interrupt Control +SFR(WORCTRL, 0xA2); // Sleep Timer Control +SFR(WOREVT0, 0xA3); // Sleep Timer Event0 Timeout Low +SFR(WOREVT1, 0xA4); // Sleep Timer Event0 Timeout High +SFR(WORTIME0, 0xA5); // Sleep Timer Low Byte +SFR(WORTIME1, 0xA6); // Sleep Timer High Byte +SFR(_SFRA7, 0xA7); // not used + +SFR(IEN0, 0xA8); // Interrupt Enable 0 + SBIT(RFTXRXIE, 0xA8, 0); // RF TX/RX FIFO interrupt enable + SBIT(ADCIE, 0xA8, 1); // ADC Interrupt Enable + SBIT(URX0IE, 0xA8, 2); // USART0 RX Interrupt Enable + SBIT(URX1IE, 0xA8, 3); // USART1 RX Interrupt Enable + SBIT(ENCIE, 0xA8, 4); // AES Encryption/Decryption Interrupt Enable + SBIT(STIE, 0xA8, 5); // Sleep Timer Interrupt Enable + SBIT(EA, 0xA8, 7); // Global Interrupt Enable + +SFR(IP0, 0xA9); // Interrupt Priority 0 +SFR(_SFRAA, 0xAA); // not used +SFR(FWT, 0xAB); // Flash Write Timing +SFR(FADDRL, 0xAC); // Flash Address Low Byte +SFR(FADDRH, 0xAD); // Flash Address High Byte +SFR(FCTL, 0xAE); // Flash Control +SFR(FWDATA, 0xAF); // Flash Write Data + +SFR(_SFRB0, 0xB0); // not used +SFR(ENCDI, 0xB1); // Encryption Input Data +SFR(ENCDO, 0xB2); // Encryption Output Data +SFR(ENCCS, 0xB3); // Encryption Control and Status +SFR(ADCCON1, 0xB4); // ADC Control 1 +SFR(ADCCON2, 0xB5); // ADC Control 2 +SFR(ADCCON3, 0xB6); // ADC Control 3 +SFR(_SFRB7, 0xB7); // not used + +SFR(IEN1, 0xB8); // Interrupt Enable 1 + SBIT(DMAIE, 0xB8, 0); // DMA Transfer Interrupt Enable + SBIT(T1IE, 0xB8, 1); // Timer 1 Interrupt Enable + SBIT(T2IE, 0xB8, 2); // Timer 2 Interrupt Enable + SBIT(T3IE, 0xB8, 3); // Timer 3 Interrupt Enable + SBIT(T4IE, 0xB8, 4); // Timer 4 Interrupt Enable + SBIT(P0IE, 0xB8, 5); // Port 0 Interrupt Enable + +SFR(IP1, 0xB9); // Interrupt Priority 1 +SFR(ADCL, 0xBA); // ADC Data Low +SFR(ADCH, 0xBB); // ADC Data High +SFR(RNDL, 0xBC); // Random Number Generator Data Low Byte +SFR(RNDH, 0xBD); // Random Number Generator Data High Byte +SFR(SLEEP, 0xBE); // Sleep Mode Control +SFR(_SFRBF, 0xBF); // not used + +SFR(IRCON, 0xC0); // Interrupt Flags 4 + SBIT(DMAIF, 0xC0, 0); // DMA Complete Interrupt Flag + SBIT(T1IF, 0xC0, 1); // Timer 1 Interrupt Flag + SBIT(T2IF, 0xC0, 2); // Timer 2 Interrupt Flag + SBIT(T3IF, 0xC0, 3); // Timer 3 Interrupt Flag + SBIT(T4IF, 0xC0, 4); // Timer 4 Interrupt Flag + SBIT(P0IF, 0xC0, 5); // Port 0 Interrupt Flag + SBIT(STIF, 0xC0, 7); // Sleep Timer Interrupt Flag + +SFR(U0DBUF, 0xC1); // USART 0 Receive/Transmit Data Buffer +SFR(U0BAUD, 0xC2); // USART 0 Baud Rate Control +SFR(_SFRC3, 0xC3); // not in use +SFR(U0UCR, 0xC4); // USART 0 UART Control +SFR(U0GCR, 0xC5); // USART 0 Generic Control +SFR(CLKCON, 0xC6); // Clock Control +SFR(MEMCTR, 0xC7); // Memory Arbiter Control + +SFR(_SFRC8, 0xC8); // not in use +SFR(WDCTL, 0xC9); // Watchdog Timer Control +SFR(T3CNT, 0xCA); // Timer 3 Counter +SFR(T3CTL, 0xCB); // Timer 3 Control +SFR(T3CCTL0, 0xCC); // Timer 3 Channel 0 Capture/Compare Control +SFR(T3CC0, 0xCD); // Timer 3 Channel 0 Capture/Compare Value +SFR(T3CCTL1, 0xCE); // Timer 3 Channel 1 Capture/Compare Control +SFR(T3CC1, 0xCF); // Timer 3 Channel 1 Capture/Compare Value + +SFR(PSW, 0xD0); // Program Status Word + SBIT(P, 0xD0, 0); // Parity Flag + SBIT(F1, 0xD0, 1); // User-Defined Flag + SBIT(OV, 0xD0, 2); // Overflow Flag + SBIT(RS0, 0xD0, 3); // Register Bank Select 0 + SBIT(RS1, 0xD0, 4); // Register Bank Select 1 + SBIT(F0, 0xD0, 5); // User-Defined Flag + SBIT(AC, 0xD0, 6); // Auxiliary Carry Flag + SBIT(CY, 0xD0, 7); // Carry Flag + +SFR(DMAIRQ, 0xD1); // DMA Interrupt Flag +SFR(DMA1CFGL, 0xD2); // DMA Channel 1-4 Configuration Address Low Byte +SFR(DMA1CFGH, 0xD3); // DMA Channel 1-4 Configuration Address High Byte +SFR(DMA0CFGL, 0xD4); // DMA Channel 0 Configuration Address Low Byte +SFR(DMA0CFGH, 0xD5); // DMA Channel 0 Configuration Address High Byte +SFR(DMAARM, 0xD6); // DMA Channel Arm +SFR(DMAREQ, 0xD7); // DMA Channel Start Request and Status + +SFR(TIMIF, 0xD8); // Timers 1/3/4 Interrupt Mask/Flag + SBIT(T3OVFIF, 0xD8, 0); // Timer 3 overflow interrupt flag 0:no pending 1:pending + SBIT(T3CH0IF, 0xD8, 1); // Timer 3 channel 0 interrupt flag 0:no pending 1:pending + SBIT(T3CH1IF, 0xD8, 2); // Timer 3 channel 1 interrupt flag 0:no pending 1:pending + SBIT(T4OVFIF, 0xD8, 3); // Timer 4 overflow interrupt flag 0:no pending 1:pending + SBIT(T4CH0IF, 0xD8, 4); // Timer 4 channel 0 interrupt flag 0:no pending 1:pending + SBIT(T4CH1IF, 0xD8, 5); // Timer 4 channel 1 interrupt flag 0:no pending 1:pending + SBIT(OVFIM, 0xD8, 6); // Timer 1 overflow interrupt mask + +SFR(RFD, 0xD9); // RF Data +SFR(T1CC0L, 0xDA); // Timer 1 Channel 0 Capture/Compare Value Low Byte +SFR(T1CC0H, 0xDB); // Timer 1 Channel 0 Capture/Compare Value High Byte +SFR(T1CC1L, 0xDC); // Timer 1 Channel 1 Capture/Compare Value Low Byte +SFR(T1CC1H, 0xDD); // Timer 1 Channel 1 Capture/Compare Value High Byte +SFR(T1CC2L, 0xDE); // Timer 1 Channel 2 Capture/Compare Value Low Byte +SFR(T1CC2H, 0xDF); // Timer 1 Channel 2 Capture/Compare Value High Byte + +SFR(ACC, 0xE0); // Accumulator + SBIT(ACC_0, 0xE0, 0); // Accumulator bit 0 + SBIT(ACC_1, 0xE0, 1); // Accumulator bit 1 + SBIT(ACC_2, 0xE0, 2); // Accumulator bit 2 + SBIT(ACC_3, 0xE0, 3); // Accumulator bit 3 + SBIT(ACC_4, 0xE0, 4); // Accumulator bit 4 + SBIT(ACC_5, 0xE0, 5); // Accumulator bit 5 + SBIT(ACC_6, 0xE0, 6); // Accumulator bit 6 + SBIT(ACC_7, 0xE0, 7); // Accumulator bit 7 + +SFR(RFST, 0xE1); // RF Strobe Commands +SFR(T1CNTL, 0xE2); // Timer 1 Counter Low +SFR(T1CNTH, 0xE3); // Timer 1 Counter High +SFR(T1CTL, 0xE4); // Timer 1 Control and Status +SFR(T1CCTL0, 0xE5); // Timer 1 Channel 0 Capture/Compare Control +SFR(T1CCTL1, 0xE6); // Timer 1 Channel 1 Capture/Compare Control +SFR(T1CCTL2, 0xE7); // Timer 1 Channel 2 Capture/Compare Control + +SFR(IRCON2, 0xE8); // Interrupt Flags 5 + SBIT(P2IF, 0xE8, 0); // Port 2 Interrupt Flag + SBIT(UTX0IF, 0xE8, 1); // USART0 TX Interrupt Flag + SBIT(UTX1IF, 0xE8, 2); // USART1 TX Interrupt Flag + SBIT(P1IF, 0xE8, 3); // Port 1 Interrupt Flag + SBIT(WDTIF, 0xE8, 4); // Watchdog Timer Interrupt Flag + +SFR(RFIF, 0xE9); // RF Interrupt Flags +SFR(T4CNT, 0xEA); // Timer 4 Counter +SFR(T4CTL, 0xEB); // Timer 4 Control +SFR(T4CCTL0, 0xEC); // Timer 4 Channel 0 Capture/Compare Control +SFR(T4CC0, 0xED); // Timer 4 Channel 0 Capture/Compare Value +SFR(T4CCTL1, 0xEE); // Timer 4 Channel 1 Capture/Compare Control +SFR(T4CC1, 0xEF); // Timer 4 Channel 1 Capture/Compare Value + +SFR(B, 0xF0); // B Register + SBIT(B_0, 0xF0, 0); // Register B bit 0 + SBIT(B_1, 0xF0, 1); // Register B bit 1 + SBIT(B_2, 0xF0, 2); // Register B bit 2 + SBIT(B_3, 0xF0, 3); // Register B bit 3 + SBIT(B_4, 0xF0, 4); // Register B bit 4 + SBIT(B_5, 0xF0, 5); // Register B bit 5 + SBIT(B_6, 0xF0, 6); // Register B bit 6 + SBIT(B_7, 0xF0, 7); // Register B bit 7 + +SFR(PERCFG, 0xF1); // Peripheral Control +SFR(ADCCFG, 0xF2); // ADC Input Configuration +SFR(P0SEL, 0xF3); // Port 0 Function Select +SFR(P1SEL, 0xF4); // Port 1 Function Select +SFR(P2SEL, 0xF5); // Port 2 Function Select +SFR(P1INP, 0xF6); // Port 1 Input Mode +SFR(P2INP, 0xF7); // Port 2 Input Mode + +SFR(U1CSR, 0xF8); // USART 1 Control and Status + SBIT(ACTIVE, 0xF8, 0); // USART transmit/receive active status 0:idle 1:busy + SBIT(TX_BYTE, 0xF8, 1); // Transmit byte status 0:Byte not transmitted 1:Last byte transmitted + SBIT(RX_BYTE, 0xF8, 2); // Receive byte status 0:No byte received 1:Received byte ready + SBIT(ERR, 0xF8, 3); // UART parity error status 0:No error 1:parity error + SBIT(FE, 0xF8, 4); // UART framing error status 0:No error 1:incorrect stop bit level + SBIT(SLAVE, 0xF8, 5); // SPI master or slave mode select 0:master 1:slave + SBIT(RE, 0xF8, 6); // UART receiver enable 0:disabled 1:enabled + SBIT(MODE, 0xF8, 7); // USART mode select 0:SPI 1:UART + +SFR(U1DBUF, 0xF9); // USART 1 Receive/Transmit Data Buffer +SFR(U1BAUD, 0xFA); // USART 1 Baud Rate Control +SFR(U1UCR, 0xFB); // USART 1 UART Control +SFR(U1GCR, 0xFC); // USART 1 Generic Control +SFR(P0DIR, 0xFD); // Port 0 Direction +SFR(P1DIR, 0xFE); // Port 1 Direction +SFR(P2DIR, 0xFF); // Port 2 Direction + +/* ------------------------------------------------------------------------------------------------ + * Xdata Radio Registers + * ------------------------------------------------------------------------------------------------ + */ + +SFRX(MDMCTRL0H, 0xDF02); + +SFRX(SYNC1, 0xDF00); /* Sync word, high byte */ +SFRX(SYNC0, 0xDF01); /* Sync word, low byte */ +SFRX(PKTLEN, 0xDF02); /* Packet length */ +SFRX(PKTCTRL1, 0xDF03); /* Packet automation control */ +SFRX(PKTCTRL0, 0xDF04); /* Packet automation control */ +SFRX(ADDR, 0xDF05); /* Device address */ +SFRX(CHANNR, 0xDF06); /* Channel number */ +SFRX(FSCTRL1, 0xDF07); /* Frequency synthesizer control */ +SFRX(FSCTRL0, 0xDF08); /* Frequency synthesizer control */ +SFRX(FREQ2, 0xDF09); /* Frequency control word, high byte */ +SFRX(FREQ1, 0xDF0A); /* Frequency control word, middle byte */ +SFRX(FREQ0, 0xDF0B); /* Frequency control word, low byte */ +SFRX(MDMCFG4, 0xDF0C); /* Modem configuration */ +SFRX(MDMCFG3, 0xDF0D); /* Modem configuration */ +SFRX(MDMCFG2, 0xDF0E); /* Modem configuration */ +SFRX(MDMCFG1, 0xDF0F); /* Modem configuration */ +SFRX(MDMCFG0, 0xDF10); /* Modem configuration */ +SFRX(DEVIATN, 0xDF11); /* Modem deviation setting */ +SFRX(MCSM2, 0xDF12); /* Main Radio Control State Machine configuration */ +SFRX(MCSM1, 0xDF13); /* Main Radio Control State Machine configuration */ +SFRX(MCSM0, 0xDF14); /* Main Radio Control State Machine configuration */ +SFRX(FOCCFG, 0xDF15); /* Frequency Offset Compensation configuration */ +SFRX(BSCFG, 0xDF16); /* Bit Synchronization configuration */ +SFRX(AGCCTRL2, 0xDF17); /* AGC control */ +SFRX(AGCCTRL1, 0xDF18); /* AGC control */ +SFRX(AGCCTRL0, 0xDF19); /* AGC control */ +SFRX(FREND1, 0xDF1A); /* Front end RX configuration */ +SFRX(FREND0, 0xDF1B); /* Front end TX configuration */ +SFRX(FSCAL3, 0xDF1C); /* Frequency synthesizer calibration */ +SFRX(FSCAL2, 0xDF1D); /* Frequency synthesizer calibration */ +SFRX(FSCAL1, 0xDF1E); /* Frequency synthesizer calibration */ +SFRX(FSCAL0, 0xDF1F); /* Frequency synthesizer calibration */ +SFRX(_XREGDF20, 0xDF20); /* reserved */ +SFRX(_XREGDF21, 0xDF21); /* reserved */ +SFRX(_XREGDF22, 0xDF22); /* reserved */ +SFRX(TEST2, 0xDF23); /* Various test settings */ +SFRX(TEST1, 0xDF24); /* Various test settings */ +SFRX(TEST0, 0xDF25); /* Various test settings */ +SFRX(_XREGDF26, 0xDF26); /* reserved */ +SFRX(PA_TABLE7, 0xDF27); /* PA power setting 7 */ +SFRX(PA_TABLE6, 0xDF28); /* PA power setting 6 */ +SFRX(PA_TABLE5, 0xDF29); /* PA power setting 5 */ +SFRX(PA_TABLE4, 0xDF2A); /* PA power setting 4 */ +SFRX(PA_TABLE3, 0xDF2B); /* PA power setting 3 */ +SFRX(PA_TABLE2, 0xDF2C); /* PA power setting 2 */ +SFRX(PA_TABLE1, 0xDF2D); /* PA power setting 1 */ +SFRX(PA_TABLE0, 0xDF2E); /* PA power setting 0 */ +SFRX(IOCFG2, 0xDF2F); /* Radio Test Signal Configuration (P1_7) */ +SFRX(IOCFG1, 0xDF30); /* Radio Test Signal Configuration (P1_6) */ +SFRX(IOCFG0, 0xDF31); /* Radio Test Signal Configuration (P1_5) */ +SFRX(_XREGDF32, 0xDF32); /* reserved */ +SFRX(_XREGDF33, 0xDF33); /* reserved */ +SFRX(_XREGDF34, 0xDF34); /* reserved */ +SFRX(_XREGDF35, 0xDF35); /* reserved */ +SFRX(PARTNUM, 0xDF36); /* Chip ID [15:8] */ +SFRX(VERSION, 0xDF37); /* Chip ID [7:0] */ +SFRX(FREQEST, 0xDF38); /* Frequency Offset Estimate */ +SFRX(LQI, 0xDF39); /* Link Quality Indicator */ +SFRX(RSSI, 0xDF3A); /* Received Signal Strength Indication */ +SFRX(MARCSTATE, 0xDF3B); /* Main Radio Control State */ +SFRX(PKTSTATUS, 0xDF3C); /* Packet status */ +SFRX(VCO_VC_DAC, 0xDF3D); /* PLL calibration current */ + +/* ------------------------------------------------------------------------------------------------ + * Xdata I2S Registers + * ------------------------------------------------------------------------------------------------ + */ +SFRX(I2SCFG0, 0xDF40); /* I2S Configuration Register 0 */ +SFRX(I2SCFG1, 0xDF41); /* I2S Configuration Register 1 */ +SFRX(I2SDATL, 0xDF42); /* I2S Data Low Byte */ +SFRX(I2SDATH, 0xDF43); /* I2S Data High Byte */ +SFRX(I2SWCNT, 0xDF44); /* I2S Word Count Register */ +SFRX(I2SSTAT, 0xDF45); /* I2S Status Register */ +SFRX(I2SCLKF0, 0xDF46); /* I2S Clock Configuration Register 0 */ +SFRX(I2SCLKF1, 0xDF47); /* I2S Clock Configuration Register 1 */ +SFRX(I2SCLKF2, 0xDF48); /* I2S Clock Configuration Register 2 */ + +/* ------------------------------------------------------------------------------------------------ + * Xdata Mapped SFRs + * ------------------------------------------------------------------------------------------------ + */ + +/* + * Most SFRs are also accessible through XDATA address space. The register definitions for + * this type of access are listed below. The register names are identical to the SFR names + * but with the prefix X_ to denote an XDATA register. + * + * Some SFRs are not accessible through XDATA space. For clarity, entries are included for these + * registers. They have a prefix of _NA to denote "not available." + * + * The SFRs prefixed with _X_ are not in use, but are listed for a better overview. + * + * For register descriptions, refer to the actual SFR declarations elsewhere in this file. + */ + +SFRX(_NA_P0, 0xDF80); +SFRX(_NA_SP, 0xDF81); +SFRX(_NA_DPL0, 0xDF82); +SFRX(_NA_DPH0, 0xDF83); +SFRX(_NA_DPL1, 0xDF84); +SFRX(_NA_DPH1, 0xDF85); +SFRX(X_U0CSR, 0xDF86); +SFRX(_NA_PCON, 0xDF87); + +SFRX(_NA_TCON, 0xDF88); +SFRX(X_P0IFG, 0xDF89); +SFRX(X_P1IFG, 0xDF8A); +SFRX(X_P2IFG, 0xDF8B); +SFRX(X_PICTL, 0xDF8C); +SFRX(X_P1IEN, 0xDF8D); +SFRX(_X_SFR8E, 0xDF8E); +SFRX(X_P0INP, 0xDF8F); + +SFRX(_NA_P1, 0xDF90); +SFRX(X_RFIM, 0xDF91); +SFRX(_NA_DPS, 0xDF92); +SFRX(X_MPAGE, 0xDF93); +SFRX(_X_SFR94, 0xDF94); +SFRX(_X_SFR95, 0xDF95); +SFRX(_X_SFR96, 0xDF96); +SFRX(_X_SFR97, 0xDF97); + +SFRX(_NA_S0CON, 0xDF98); +SFRX(_X_SFR99, 0xDF99); +SFRX(_NA_IEN2, 0xDF9A); +SFRX(_NA_S1CON, 0xDF9B); +SFRX(X_T2CT, 0xDF9C); +SFRX(X_T2PR, 0xDF9D); +SFRX(X_T2CTL, 0xDF9E); +SFRX(_X_SFR9F, 0xDF9F); + +SFRX(_NA_P2, 0xDFA0); +SFRX(X_WORIRQ, 0xDFA1); +SFRX(X_WORCTRL, 0xDFA2); +SFRX(X_WOREVT0, 0xDFA3); +SFRX(X_WOREVT1, 0xDFA4); +SFRX(X_WORTIME0, 0xDFA5); +SFRX(X_WORTIME1, 0xDFA6); +SFRX(_X_SFRA7, 0xDFA7); + +SFRX(_NA_IEN0, 0xDFA8); +SFRX(_NA_IP0, 0xDFA9); +SFRX(_X_SFRAA, 0xDFAA); +SFRX(X_FWT, 0xDFAB); +SFRX(X_FADDRL, 0xDFAC); +SFRX(X_FADDRH, 0xDFAD); +SFRX(X_FCTL, 0xDFAE); +SFRX(X_FWDATA, 0xDFAF); + +SFRX(_X_SFRB0, 0xDFB0); +SFRX(X_ENCDI, 0xDFB1); +SFRX(X_ENCDO, 0xDFB2); +SFRX(X_ENCCS, 0xDFB3); +SFRX(X_ADCCON1, 0xDFB4); +SFRX(X_ADCCON2, 0xDFB5); +SFRX(X_ADCCON3, 0xDFB6); +SFRX(_X_SFRB7, 0xDFB7); + +SFRX(_NA_IEN1, 0xDFB8); +SFRX(_NA_IP1, 0xDFB9); +SFRX(X_ADCL, 0xDFBA); +SFRX(X_ADCH, 0xDFBB); +SFRX(X_RNDL, 0xDFBC); +SFRX(X_RNDH, 0xDFBD); +SFRX(X_SLEEP, 0xDFBE); +SFRX(_X_SFRBF, 0xDFBF); + +SFRX(_NA_IRCON, 0xDFC0); +SFRX(X_U0DBUF, 0xDFC1); +SFRX(X_U0BAUD, 0xDFC2); +SFRX(_X_SFRC3, 0xDFC3); +SFRX(X_U0UCR, 0xDFC4); +SFRX(X_U0GCR, 0xDFC5); +SFRX(X_CLKCON, 0xDFC6); +SFRX(X_MEMCTR, 0xDFC7); + +SFRX(_X_SFRC8, 0xDFC8); +SFRX(X_WDCTL, 0xDFC9); +SFRX(X_T3CNT, 0xDFCA); +SFRX(X_T3CTL, 0xDFCB); +SFRX(X_T3CCTL0, 0xDFCC); +SFRX(X_T3CC0, 0xDFCD); +SFRX(X_T3CCTL1, 0xDFCE); +SFRX(X_T3CC1, 0xDFCF); + +SFRX(_NA_PSW, 0xDFD0); +SFRX(X_DMAIRQ, 0xDFD1); +SFRX(X_DMA1CFGL, 0xDFD2); +SFRX(X_DMA1CFGH, 0xDFD3); +SFRX(X_DMA0CFGL, 0xDFD4); +SFRX(X_DMA0CFGH, 0xDFD5); +SFRX(X_DMAARM, 0xDFD6); +SFRX(X_DMAREQ, 0xDFD7); + +SFRX(X_TIMIF, 0xDFD8); +SFRX(X_RFD, 0xDFD9); +SFRX(X_T1CC0L, 0xDFDA); +SFRX(X_T1CC0H, 0xDFDB); +SFRX(X_T1CC1L, 0xDFDC); +SFRX(X_T1CC1H, 0xDFDD); +SFRX(X_T1CC2L, 0xDFDE); +SFRX(X_T1CC2H, 0xDFDF); + +SFRX(_NA_ACC, 0xDFE0); +SFRX(X_RFST, 0xDFE1); +SFRX(X_T1CNTL, 0xDFE2); +SFRX(X_T1CNTH, 0xDFE3); +SFRX(X_T1CTL, 0xDFE4); +SFRX(X_T1CCTL0, 0xDFE5); +SFRX(X_T1CCTL1, 0xDFE6); +SFRX(X_T1CCTL2, 0xDFE7); + +SFRX(_NA_IRCON2, 0xDFE8); +SFRX(X_RFIF, 0xDFE9); +SFRX(X_T4CNT, 0xDFEA); +SFRX(X_T4CTL, 0xDFEB); +SFRX(X_T4CCTL0, 0xDFEC); +SFRX(X_T4CC0, 0xDFED); +SFRX(X_T4CCTL1, 0xDFEE); +SFRX(X_T4CC1, 0xDFEF); + +SFRX(_NA_B, 0xDFF0); +SFRX(X_PERCFG, 0xDFF1); +SFRX(X_ADCCFG, 0xDFF2); +SFRX(X_P0SEL, 0xDFF3); +SFRX(X_P1SEL, 0xDFF4); +SFRX(X_P2SEL, 0xDFF5); +SFRX(X_P1INP, 0xDFF6); +SFRX(X_P2INP, 0xDFF7); + +SFRX(X_U1CSR, 0xDFF8); +SFRX(X_U1DBUF, 0xDFF9); +SFRX(X_U1BAUD, 0xDFFA); +SFRX(X_U1UCR, 0xDFFB); +SFRX(X_U1GCR, 0xDFFC); +SFRX(X_P0DIR, 0xDFFD); +SFRX(X_P1DIR, 0xDFFE); +SFRX(X_P2DIR, 0xDFFF); + +/* ------------------------------------------------------------------------------------------------ + */ + +#endif diff --git a/device/include/mcs51/cc2430.h b/device/include/mcs51/cc2430.h new file mode 100644 index 0000000..d4d455c --- /dev/null +++ b/device/include/mcs51/cc2430.h @@ -0,0 +1,431 @@ +/*------------------------------------------------------------------------- + Register Declarations for Chipcon CC2430 + + Written By - Jesus Calvino-Fraga / jesusc at ece.ubc.ca (December 2006) + (Based on CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef REG_CC2430_H +#define REG_CC2430_H + +#include + +// Interrupt Vectors + +#define RFERR_VECTOR 0 // RF TX FIFO underflow and RX FIFO overflow. +#define ADC_VECTOR 1 // ADC end of conversion +#define URX0_VECTOR 2 // USART0 RX complete +#define URX1_VECTOR 3 // USART1 RX complete +#define ENC_VECTOR 4 // AES encryption/decryption complete +#define ST_VECTOR 5 // Sleep Timer compare +#define P2INT_VECTOR 6 // Port 2 inputs +#define UTX0_VECTOR 7 // USART0 TX complete +#define DMA_VECTOR 8 // DMA transfer complete +#define T1_VECTOR 9 // Timer 1 (16-bit) capture/compare/overflow +#define T2_VECTOR 10 // Timer 2 (MAC Timer) +#define T3_VECTOR 11 // Timer 3 (8-bit) capture/compare/overflow +#define T4_VECTOR 12 // Timer 4 (8-bit) capture/compare/overflow +#define P0INT_VECTOR 13 // Port 0 inputs +#define UTX1_VECTOR 14 // USART1 TX complete +#define P1INT_VECTOR 15 // Port 1 inputs +#define RF_VECTOR 16 // RF general interrupts +#define WDT_VECTOR 17 // Watchdog overflow in timer mode + +// SFR Registers and BITs + +SFR(P0, 0x80); // Port 0 + SBIT(P0_0, 0x80, 0); // Port 0 bit 0 + SBIT(P0_1, 0x80, 1); // Port 0 bit 1 + SBIT(P0_2, 0x80, 2); // Port 0 bit 2 + SBIT(P0_3, 0x80, 3); // Port 0 bit 3 + SBIT(P0_4, 0x80, 4); // Port 0 bit 4 + SBIT(P0_5, 0x80, 5); // Port 0 bit 5 + SBIT(P0_6, 0x80, 6); // Port 0 bit 6 + SBIT(P0_7, 0x80, 7); // Port 0 bit 7 +SFR(SP, 0x81); // Stack Pointer +SFR(DPL0, 0x82); // Data Pointer 0 Low Byte +SFR(DPH0, 0x83); // Data Pointer 0 High Byte +SFR(DPL1, 0x84); // Data Pointer 1 Low Byte +SFR(DPH1, 0x85); // Data Pointer 1 High Byte +SFR(U0CSR, 0x86); // USART 0 Control and Status +SFR(PCON, 0x87); // Power Mode Control +SFR(TCON, 0x88); // Interrupt Flags + SBIT(IT0, 0x88, 0); // reserved (must always be set to 1) + SBIT(RFERRIF, 0x88, 1); // RFERR – RF TX/RX FIFO interrupt flag + SBIT(IT1, 0x88, 2); // reserved (must always be set to 1) + SBIT(URX0IF, 0x88, 3); // USART0 RX Interrupt Flag + SBIT(ADCIF, 0x88, 5); // ADC Interrupt Flag + SBIT(URX1IF, 0x88, 7); // USART1 RX Interrupt Flag +SFR(P0IFG, 0x89); // Port 0 Interrupt Status Flag +SFR(P1IFG, 0x8A); // Port 1 Interrupt Status Flag +SFR(P2IFG, 0x8B); // Port 2 Interrupt Status Flag +SFR(PICTL, 0x8C); // Port Interrupt Control +SFR(P1IEN, 0x8D); // Port 1 Interrupt Mask +SFR(P0INP, 0x8F); // Port 0 Input Mode +SFR(P1, 0x90); // Port 1 + SBIT(P1_0, 0x90, 0); // Port 1 bit 0 + SBIT(P1_1, 0x90, 1); // Port 1 bit 1 + SBIT(P1_2, 0x90, 2); // Port 1 bit 2 + SBIT(P1_3, 0x90, 3); // Port 1 bit 3 + SBIT(P1_4, 0x90, 4); // Port 1 bit 4 + SBIT(P1_5, 0x90, 5); // Port 1 bit 5 + SBIT(P1_6, 0x90, 6); // Port 1 bit 6 + SBIT(P1_7, 0x90, 7); // Port 1 bit 7 +SFR(RFIM, 0x91); // RF Interrupt Mask +SFR(DPS, 0x92); // Data Pointer Select +SFR(MPAGE, 0x93); // Memory Page Select +SFR(_XPAGE, 0x93); // Memory Page Select under the name SDCC needs it +SFR(T2CMP, 0x94); // Timer 2 Compare Value +SFR(ST0, 0x95); // Sleep Timer 0 +SFR(ST1, 0x96); // Sleep Timer 1 +SFR(ST2, 0x97); // Sleep Timer 2 +SFR(S0CON, 0x98); // Interrupt Flags 2 + SBIT(ENCIF_0, 0x98, 0); // AES Interrupt Flag 0 + SBIT(ENCIF_1, 0x98, 1); // AES Interrupt Flag 1 +SFR(IEN2, 0x9A); // Interrupt Enable 2 +SFR(S1CON, 0x9B); // Interrupt Flags 3 +SFR(T2PEROF0, 0x9C); // Timer 2 Overflow Capture/Compare 0 +SFR(T2PEROF1, 0x9D); // Timer 2 Overflow Capture/Compare 1 +SFR(T2PEROF2, 0x9E); // Timer 2 Overflow Capture/Compare 2 +SFR(P2, 0xA0); // Port 2 + SBIT(P2_0, 0xA0, 0); // Port 2 bit 0 + SBIT(P2_1, 0xA0, 1); // Port 2 bit 1 + SBIT(P2_2, 0xA0, 2); // Port 2 bit 2 + SBIT(P2_3, 0xA0, 3); // Port 2 bit 3 + SBIT(P2_4, 0xA0, 4); // Port 2 bit 4 + SBIT(P2_5, 0xA0, 5); // Port 2 bit 5 + SBIT(P2_6, 0xA0, 6); // Port 2 bit 6 + SBIT(P2_7, 0xA0, 7); // Port 2 bit 7 +SFR(T2OF0, 0xA1); // Timer 2 Overflow Count 0 +SFR(T2OF1, 0xA2); // Timer 2 Overflow Count 1 +SFR(T2OF2, 0xA3); // Timer 2 Overflow Count 2 +SFR(T2CAPLPL, 0xA4); // Timer 2 Period Low Byte +SFR(T2CAPHPH, 0xA5); // Timer 2 Period High Byte +SFR(T2TLD, 0xA6); // Timer 2 Timer Value Low Byte +SFR(T2THD, 0xA7); // Timer 2 Timer Value High Byte +SFR(IEN0, 0xA8); // Interrupt Enable 0 + SBIT(RFERRIE, 0xA8, 0); // RF TX/RX FIFO interrupt enable + SBIT(ADCIE, 0xA8, 1); // ADC Interrupt Enable + SBIT(URX0IE, 0xA8, 2); // USART0 RX Interrupt Enable + SBIT(URX1IE, 0xA8, 3); // USART1 RX Interrupt Enable + SBIT(ENCIE, 0xA8, 4); // AES Encryption/Decryption Interrupt Enable + SBIT(STIE, 0xA8, 5); // Sleep Timer Interrupt Enable + SBIT(EA, 0xA8, 7); // Global Interrupt Enable +SFR(IP0, 0xA9); // Interrupt Priority 0 +SFR(FWT, 0xAB); // Flash Write Timing +SFR(FADDRL, 0xAC); // Flash Address Low Byte +SFR(FADDRH, 0xAD); // Flash Address High Byte +SFR(FCTL, 0xAE); // Flash Control +SFR(FWDATA, 0xAF); // Flash Write Data +SFR(ENCDI, 0xB1); // Encryption Input Data +SFR(ENCDO, 0xB2); // Encryption Output Data +SFR(ENCCS, 0xB3); // Encryption Control and Status +SFR(ADCCON1, 0xB4); // ADC Control 1 +SFR(ADCCON2, 0xB5); // ADC Control 2 +SFR(ADCCON3, 0xB6); // ADC Control 3 +SFR(IEN1, 0xB8); // Interrupt Enable 1 + SBIT(DMAIE, 0xB8, 0); // DMA Transfer Interrupt Enable + SBIT(T1IE, 0xB8, 1); // Timer 1 Interrupt Enable + SBIT(T2IE, 0xB8, 2); // Timer 2 Interrupt Enable + SBIT(T3IE, 0xB8, 3); // Timer 3 Interrupt Enable + SBIT(T4IE, 0xB8, 4); // Timer 4 Interrupt Enable + SBIT(P0IE, 0xB8, 5); // Port 0 Interrupt Enable +SFR(IP1, 0xB9); // Interrupt Priority 1 +SFR(ADCL, 0xBA); // ADC Data Low +SFR(ADCH, 0xBB); // ADC Data High +SFR(RNDL, 0xBC); // Random Number Generator Data Low Byte +SFR(RNDH, 0xBD); // Random Number Generator Data High Byte +SFR(SLEEP, 0xBE); // Sleep Mode Control +SFR(IRCON, 0xC0); // Interrupt Flags 4 + SBIT(DMAIF, 0xC0, 0); // DMA Complete Interrupt Flag + SBIT(T1IF, 0xC0, 1); // Timer 1 Interrupt Flag + SBIT(T2IF, 0xC0, 2); // Timer 2 Interrupt Flag + SBIT(T3IF, 0xC0, 3); // Timer 3 Interrupt Flag + SBIT(T4IF, 0xC0, 4); // Timer 4 Interrupt Flag + SBIT(P0IF, 0xC0, 5); // Port 0 Interrupt Flag + SBIT(STIF, 0xC0, 7); // Sleep Timer Interrupt Flag +SFR(U0DBUF, 0xC1); // USART 0 Receive/Transmit Data Buffer +SFR(U0BAUD, 0xC2); // USART 0 Baud Rate Control +SFR(T2CNF, 0xC3); // Timer 2 Configuration +SFR(U0UCR, 0xC4); // USART 0 UART Control +SFR(U0GCR, 0xC5); // USART 0 Generic Control +SFR(CLKCON, 0xC6); // Clock Control +SFR(MEMCTR, 0xC7); // Memory Arbiter Control +SFR(WDCTL, 0xC9); // Watchdog Timer Control +SFR(T3CNT, 0xCA); // Timer 3 Counter +SFR(T3CTL, 0xCB); // Timer 3 Control +SFR(T3CCTL0, 0xCC); // Timer 3 Channel 0 Capture/Compare Control +SFR(T3CC0, 0xCD); // Timer 3 Channel 0 Capture/Compare Value +SFR(T3CCTL1, 0xCE); // Timer 3 Channel 1 Capture/Compare Control +SFR(T3CC1, 0xCF); // Timer 3 Channel 1 Capture/Compare Value +SFR(PSW, 0xD0); // Program Status Word + SBIT(P, 0xD0, 0); // Parity Flag + SBIT(F1, 0xD0, 1); // User-Defined Flag + SBIT(OV, 0xD0, 2); // Overflow Flag + SBIT(RS0, 0xD0, 3); // Register Bank Select 0 + SBIT(RS1, 0xD0, 4); // Register Bank Select 1 + SBIT(F0, 0xD0, 5); // User-Defined Flag + SBIT(AC, 0xD0, 6); // Auxiliary Carry Flag + SBIT(CY, 0xD0, 7); // Carry Flag +SFR(DMAIRQ, 0xD1); // DMA Interrupt Flag +SFR(DMA1CFGL, 0xD2); // DMA Channel 1-4 Configuration Address Low Byte +SFR(DMA1CFGH, 0xD3); // DMA Channel 1-4 Configuration Address High Byte +SFR(DMA0CFGL, 0xD4); // DMA Channel 0 Configuration Address Low Byte +SFR(DMA0CFGH, 0xD5); // DMA Channel 0 Configuration Address High Byte +SFR(DMAARM, 0xD6); // DMA Channel Arm +SFR(DMAREQ, 0xD7); // DMA Channel Start Request and Status +SFR(TIMIF, 0xD8); // Timers 1/3/4 Interrupt Mask/Flag + SBIT(T3OVFIF, 0xD8, 0); // Timer 3 overflow interrupt flag 0:no pending 1:pending + SBIT(T3CH0IF, 0xD8, 1); // Timer 3 channel 0 interrupt flag 0:no pending 1:pending + SBIT(T3CH1IF, 0xD8, 2); // Timer 3 channel 1 interrupt flag 0:no pending 1:pending + SBIT(T4OVFIF, 0xD8, 3); // Timer 4 overflow interrupt flag 0:no pending 1:pending + SBIT(T4CH0IF, 0xD8, 4); // Timer 4 channel 0 interrupt flag 0:no pending 1:pending + SBIT(T4CH1IF, 0xD8, 5); // Timer 4 channel 1 interrupt flag 0:no pending 1:pending + SBIT(OVFIM, 0xD8, 6); // Timer 1 overflow interrupt mask +SFR(RFD, 0xD9); // RF Data +SFR(T1CC0L, 0xDA); // Timer 1 Channel 0 Capture/Compare Value Low +SFR(T1CC0H, 0xDB); // Timer 1 Channel 0 Capture/Compare Value High +SFR(T1CC1L, 0xDC); // Timer 1 Channel 1 Capture/Compare Value Low +SFR(T1CC1H, 0xDD); // Timer 1 Channel 1 Capture/Compare Value High +SFR(T1CC2L, 0xDE); // Timer 1 Channel 2 Capture/Compare Value Low +SFR(T1CC2H, 0xDF); // Timer 1 Channel 2 Capture/Compare Value High +SFR(ACC, 0xE0); // Accumulator + SBIT(ACC_0, 0xE0, 0); // Accumulator bit 0 + SBIT(ACC_1, 0xE0, 1); // Accumulator bit 1 + SBIT(ACC_2, 0xE0, 2); // Accumulator bit 2 + SBIT(ACC_3, 0xE0, 3); // Accumulator bit 3 + SBIT(ACC_4, 0xE0, 4); // Accumulator bit 4 + SBIT(ACC_5, 0xE0, 5); // Accumulator bit 5 + SBIT(ACC_6, 0xE0, 6); // Accumulator bit 6 + SBIT(ACC_7, 0xE0, 7); // Accumulator bit 7 +SFR(RFST, 0xE1); // RF CSMA-CA / Strobe Processor +SFR(T1CNTL, 0xE2); // Timer 1 Counter Low +SFR(T1CNTH, 0xE3); // Timer 1 Counter High +SFR(T1CTL, 0xE4); // Timer 1 Control and Status +SFR(T1CCTL0, 0xE5); // Timer 1 Channel 0 Capture/Compare Control +SFR(T1CCTL1, 0xE6); // Timer 1 Channel 1 Capture/Compare Control +SFR(T1CCTL2, 0xE7); // Timer 1 Channel 2 Capture/Compare Control +SFR(IRCON2, 0xE8); // Interrupt Flags 5 + SBIT(P2IF, 0xE8, 0); // Port 2 Interrupt Flag + SBIT(UTX0IF, 0xE8, 1); // USART0 TX Interrupt Flag + SBIT(UTX1IF, 0xE8, 2); // USART1 TX Interrupt Flag + SBIT(P1IF, 0xE8, 3); // Port 1 Interrupt Flag + SBIT(WDTIF, 0xE8, 4); // Watchdog Timer Interrupt Flag +SFR(RFIF, 0xE9); // RF Interrupt Flags +SFR(T4CNT, 0xEA); // Timer 4 Counter +SFR(T4CTL, 0xEB); // Timer 4 Control +SFR(T4CCTL0, 0xEC); // Timer 4 Channel 0 Capture/Compare Control +SFR(T4CC0, 0xED); // Timer 4 Channel 0 Capture/Compare Value +SFR(T4CCTL1, 0xEE); // Timer 4 Channel 1 Capture/Compare Control +SFR(T4CC1, 0xEF); // Timer 4 Channel 1 Capture/Compare Value +SFR(B, 0xF0); // B Register + SBIT(B_0, 0xF0, 0); // Register B bit 0 + SBIT(B_1, 0xF0, 1); // Register B bit 1 + SBIT(B_2, 0xF0, 2); // Register B bit 2 + SBIT(B_3, 0xF0, 3); // Register B bit 3 + SBIT(B_4, 0xF0, 4); // Register B bit 4 + SBIT(B_5, 0xF0, 5); // Register B bit 5 + SBIT(B_6, 0xF0, 6); // Register B bit 6 + SBIT(B_7, 0xF0, 7); // Register B bit 7 +SFR(PERCFG, 0xF1); // Peripheral Control +SFR(ADCCFG, 0xF2); // ADC Input Configuration +SFR(P0SEL, 0xF3); // Port 0 Function Select +SFR(P1SEL, 0xF4); // Port 1 Function Select +SFR(P2SEL, 0xF5); // Port 2 Function Select +SFR(P1INP, 0xF6); // Port 1 Input Mode +SFR(P2INP, 0xF7); // Port 2 Input Mode +SFR(U1CSR, 0xF8); // USART 1 Control and Status + SBIT(ACTIVE, 0xF8, 0); // USART transmit/receive active status 0:idle 1:busy + SBIT(TX_BYTE, 0xF8, 1); // Transmit byte status 0:Byte not transmitted 1:Last byte transmitted + SBIT(RX_BYTE, 0xF8, 2); // Receive byte status 0:No byte received 1:Received byte ready + SBIT(ERR, 0xF8, 3); // UART parity error status 0:No error 1:parity error + SBIT(FE, 0xF8, 4); // UART framing error status 0:No error 1:incorrect stop bit level + SBIT(SLAVE, 0xF8, 5); // SPI master or slave mode select 0:master 1:slave + SBIT(RE, 0xF8, 6); // UART receiver enable 0:disabled 1:enabled + SBIT(MODE, 0xF8, 7); // USART mode select 0:SPI 1:UART +SFR(U1DBUF, 0xF9); // USART 1 Receive/Transmit Data Buffer +SFR(U1BAUD, 0xFA); // USART 1 Baud Rate Control +SFR(U1UCR, 0xFB); // USART 1 UART Control +SFR(U1GCR, 0xFC); // USART 1 Generic Control +SFR(P0DIR, 0xFD); // Port 0 Direction +SFR(P1DIR, 0xFE); // Port 1 Direction +SFR(P2DIR, 0xFF); // Port 2 Direction + +// From Table 45 : Overview of RF registers + +SFRX(MDMCTRL0H, 0xDF02); // Modem Control 0, high +SFRX(MDMCTRL0L, 0xDF03); // Modem Control 0, low +SFRX(MDMCTRL1H, 0xDF04); // Modem Control 1, high +SFRX(MDMCTRL1L, 0xDF05); // Modem Control 1, low +SFRX(RSSIH, 0xDF06); // RSSI and CCA Status and Control, high +SFRX(RSSIL, 0xDF07); // RSSI and CCA Status and Control, low +SFRX(SYNCWORDH, 0xDF08); // Synchronisation Word Control, high +SFRX(SYNCWORDL, 0xDF09); // Synchronisation Word Control, low +SFRX(TXCTRLH, 0xDF0A); // Transmit Control, high +SFRX(TXCTRLL, 0xDF0B); // Transmit Control, low +SFRX(RXCTRL0H, 0xDF0C); // Receive Control 0, high +SFRX(RXCTRL0L, 0xDF0D); // Receive Control 0, low +SFRX(RXCTRL1H, 0xDF0E); // Receive Control 1, high +SFRX(RXCTRL1L, 0xDF0F); // Receive Control 1, low +SFRX(FSCTRLH, 0xDF10); // Frequency Synthesizer Control and Status, high +SFRX(FSCTRLL, 0xDF11); // Frequency Synthesizer Control and Status, low +SFRX(CSPX, 0xDF12); // CSP X Data +SFRX(CSPY, 0xDF13); // CSP Y Data +SFRX(CSPZ, 0xDF14); // CSP Z Data +SFRX(CSPCTRL, 0xDF15); // CSP Control +SFRX(CSPT, 0xDF16); // CSP T Data +SFRX(RFPWR, 0xDF17); // RF Power Control +SFRX(FSMTCH, 0xDF20); // Finite State Machine Time Constants, high +SFRX(FSMTCL, 0xDF21); // Finite State Machine Time Constants, low +SFRX(MANANDH, 0xDF22); // Manual AND Override, high +SFRX(MANANDL, 0xDF23); // Manual AND Override, low +SFRX(MANORH, 0xDF24); // Manual OR Override, high +SFRX(MANORL, 0xDF25); // Manual OR Override, low +SFRX(AGCCTRLH, 0xDF26); // AGC Control, high +SFRX(AGCCTRLL, 0xDF27); // AGC Control, low +SFRX(FSMSTATE, 0xDF39); // Finite State Machine State Status +SFRX(ADCTSTH, 0xDF3A); // ADC Test, high +SFRX(ADCTSTL, 0xDF3B); // ADC Test, low +SFRX(DACTSTH, 0xDF3C); // DAC Test, high +SFRX(DACTSTL, 0xDF3D); // DAC Test, low +SFRX(IEEE_ADDR0, 0xDF43); // IEEE Address 0 +SFRX(IEEE_ADDR1, 0xDF44); // IEEE Address 1 +SFRX(IEEE_ADDR2, 0xDF45); // IEEE Address 2 +SFRX(IEEE_ADDR3, 0xDF46); // IEEE Address 3 +SFRX(IEEE_ADDR4, 0xDF47); // IEEE Address 4 +SFRX(IEEE_ADDR5, 0xDF48); // IEEE Address 5 +SFRX(IEEE_ADDR6, 0xDF49); // IEEE Address 6 +SFRX(IEEE_ADDR7, 0xDF4A); // IEEE Address 7 +SFRX(PANIDH, 0xDF4B); // PAN Identifier, high +SFRX(PANIDL, 0xDF4C); // PAN Identifier, low +SFRX(SHORTADDRH, 0xDF4D); // Short Address, high +SFRX(SHORTADDRL, 0xDF4E); // Short Address, low +SFRX(IOCFG0, 0xDF4F); // I/O Configuration 0 +SFRX(IOCFG1, 0xDF50); // I/O Configuration 1 +SFRX(IOCFG2, 0xDF51); // I/O Configuration 2 +SFRX(IOCFG3, 0xDF52); // I/O Configuration 3 +SFRX(RXFIFOCNT, 0xDF53); // RX FIFO Count +SFRX(FSMTC1, 0xDF54); // Finite State Machine Control +SFRX(CHVER, 0xDF60); // Chip Version +SFRX(CHIPID, 0xDF61); // Chip Identification +SFRX(RFSTATUS, 0xDF62); // RF Status + +// SFRs also accesible through XDATA space + +SFRX(X_U0CSR, 0xDF86); // USART 0 Control and Status +SFRX(X_P0IFG, 0xDF89); // Port 0 Interrupt Status Flag +SFRX(X_P1IFG, 0xDF8A); // Port 1 Interrupt Status Flag +SFRX(X_P2IFG, 0xDF8B); // Port 2 Interrupt Status Flag +SFRX(X_PICTL, 0xDF8C); // Port Interrupt Control +SFRX(X_P1IEN, 0xDF8D); // Port 1 Interrupt Mask +SFRX(X_P0INP, 0xDF8F); // Port 0 Input Mode +SFRX(X_RFIM, 0xDF91); // RF Interrupt Mask +SFRX(X_MPAGE, 0xDF93); // Memory Page Select +SFRX(X_T2CMP, 0xDF94); // Timer 2 Compare Value +SFRX(X_ST0, 0xDF95); // Sleep Timer 0 +SFRX(X_ST1, 0xDF96); // Sleep Timer 1 +SFRX(X_ST2, 0xDF97); // Sleep Timer 2 +SFRX(X_T2PEROF0, 0xDF9C); // Timer 2 Overflow Capture/Compare 0 +SFRX(X_T2PEROF1, 0xDF9D); // Timer 2 Overflow Capture/Compare 1 +SFRX(X_T2PEROF2, 0xDF9E); // Timer 2 Overflow Capture/Compare 2 +SFRX(X_T2OF0, 0xDFA1); // Timer 2 Overflow Count 0 +SFRX(X_T2OF1, 0xDFA2); // Timer 2 Overflow Count 1 +SFRX(X_T2OF2, 0xDFA3); // Timer 2 Overflow Count 2 +SFRX(X_T2CAPLPL, 0xDFA4); // Timer 2 Period Low Byte +SFRX(X_T2CAPHPH, 0xDFA5); // Timer 2 Period High Byte +SFRX(X_T2TLD, 0xDFA6); // Timer 2 Timer Value Low Byte +SFRX(X_T2THD, 0xDFA7); // Timer 2 Timer Value High Byte +SFRX(X_FWT, 0xDFAB); // Flash Write Timing +SFRX(X_FADDRL, 0xDFAC); // Flash Address Low Byte +SFRX(X_FADDRH, 0xDFAD); // Flash Address High Byte +SFRX(X_FCTL, 0xDFAE); // Flash Control +SFRX(X_FWDATA, 0xDFAF); // Flash Write Data +SFRX(X_ENCDI, 0xDFB1); // Encryption Input Data +SFRX(X_ENCDO, 0xDFB2); // Encryption Output Data +SFRX(X_ENCCS, 0xDFB3); // Encryption Control and Status +SFRX(X_ADCCON1, 0xDFB4); // ADC Control 1 +SFRX(X_ADCCON2, 0xDFB5); // ADC Control 2 +SFRX(X_ADCCON3, 0xDFB6); // ADC Control 3 +SFRX(X_ADCL, 0xDFBA); // ADC Data Low +SFRX(X_ADCH, 0xDFBB); // ADC Data High +SFRX(X_RNDL, 0xDFBC); // Random Number Generator Data Low Byte +SFRX(X_RNDH, 0xDFBD); // Random Number Generator Data High Byte +SFRX(X_SLEEP, 0xDFBE); // Sleep Mode Control +SFRX(X_U0DBUF, 0xDFC1); // USART 0 Receive/Transmit Data Buffer +SFRX(X_U0BAUD, 0xDFC2); // USART 0 Baud Rate Control +SFRX(X_T2CNF, 0xDFC3); // Timer 2 Configuration +SFRX(X_U0UCR, 0xDFC4); // USART 0 UART Control +SFRX(X_U0GCR, 0xDFC5); // USART 0 Generic Control +SFRX(X_CLKCON, 0xDFC6); // Clock Control +SFRX(X_MEMCTR, 0xDFC7); // Memory Arbiter Control +SFRX(X_WDCTL, 0xDFC9); // Watchdog Timer Control +SFRX(X_T3CNT, 0xDFCA); // Timer 3 Counter +SFRX(X_T3CTL, 0xDFCB); // Timer 3 Control +SFRX(X_T3CCTL0, 0xDFCC); // Timer 3 Channel 0 Capture/Compare Control +SFRX(X_T3CC0, 0xDFCD); // Timer 3 Channel 0 Capture/Compare Value +SFRX(X_T3CCTL1, 0xDFCE); // Timer 3 Channel 1 Capture/Compare Control +SFRX(X_T3CC1, 0xDFCF); // Timer 3 Channel 1 Capture/Compare Value +SFRX(X_DMAIRQ, 0xDFD1); // DMA Interrupt Flag +SFRX(X_DMA1CFGL, 0xDFD2); // DMA Channel 1-4 Configuration Address Low Byte +SFRX(X_DMA1CFGH, 0xDFD3); // DMA Channel 1-4 Configuration Address High Byte +SFRX(X_DMA0CFGL, 0xDFD4); // DMA Channel 0 Configuration Address Low Byte +SFRX(X_DMA0CFGH, 0xDFD5); // DMA Channel 0 Configuration Address High Byte +SFRX(X_DMAARM, 0xDFD6); // DMA Channel Arm +SFRX(X_DMAREQ, 0xDFD7); // DMA Channel Start Request and Status +SFRX(X_TIMIF, 0xDFD8); // Timers 1/3/4 Interrupt Mask/Flag +SFRX(X_RFD, 0xDFD9); // RF Data +SFRX(X_T1CC0L, 0xDFDA); // Timer 1 Channel 0 Capture/Compare Value Low +SFRX(X_T1CC0H, 0xDFDB); // Timer 1 Channel 0 Capture/Compare Value High +SFRX(X_T1CC1L, 0xDFDC); // Timer 1 Channel 1 Capture/Compare Value Low +SFRX(X_T1CC1H, 0xDFDD); // Timer 1 Channel 1 Capture/Compare Value High +SFRX(X_T1CC2L, 0xDFDE); // Timer 1 Channel 2 Capture/Compare Value Low +SFRX(X_T1CC2H, 0xDFDF); // Timer 1 Channel 2 Capture/Compare Value High +SFRX(X_RFST, 0xDFE1); // RF CSMA-CA / Strobe Processor +SFRX(X_T1CNTL, 0xDFE2); // Timer 1 Counter Low +SFRX(X_T1CNTH, 0xDFE3); // Timer 1 Counter High +SFRX(X_T1CTL, 0xDFE4); // Timer 1 Control and Status +SFRX(X_T1CCTL0, 0xDFE5); // Timer 1 Channel 0 Capture/Compare Control +SFRX(X_T1CCTL1, 0xDFE6); // Timer 1 Channel 1 Capture/Compare Control +SFRX(X_T1CCTL2, 0xDFE7); // Timer 1 Channel 2 Capture/Compare Control +SFRX(X_RFIF, 0xDFE9); // RF Interrupt Flags +SFRX(X_T4CNT, 0xDFEA); // Timer 4 Counter +SFRX(X_T4CTL, 0xDFEB); // Timer 4 Control +SFRX(X_T4CCTL0, 0xDFEC); // Timer 4 Channel 0 Capture/Compare Control +SFRX(X_T4CC0, 0xDFED); // Timer 4 Channel 0 Capture/Compare Value +SFRX(X_T4CCTL1, 0xDFEE); // Timer 4 Channel 1 Capture/Compare Control +SFRX(X_T4CC1, 0xDFEF); // Timer 4 Channel 1 Capture/Compare Value +SFRX(X_PERCFG, 0xDFF1); // Peripheral Control +SFRX(X_ADCCFG, 0xDFF2); // ADC Input Configuration +SFRX(X_P0SEL, 0xDFF3); // Port 0 Function Select +SFRX(X_P1SEL, 0xDFF4); // Port 1 Function Select +SFRX(X_P2SEL, 0xDFF5); // Port 2 Function Select +SFRX(X_P1INP, 0xDFF6); // Port 1 Input Mode +SFRX(X_P2INP, 0xDFF7); // Port 2 Input Mode +SFRX(X_U1CSR, 0xDFF8); // USART 1 Control and Status +SFRX(X_U1DBUF, 0xDFF9); // USART 1 Receive/Transmit Data Buffer +SFRX(X_U1BAUD, 0xDFFA); // USART 1 Baud Rate Control +SFRX(X_U1UCR, 0xDFFB); // USART 1 UART Control +SFRX(X_U1GCR, 0xDFFC); // USART 1 Generic Control +SFRX(X_P0DIR, 0xDFFD); // Port 0 Direction +SFRX(X_P1DIR, 0xDFFE); // Port 1 Direction +SFRX(X_P2DIR, 0xDFFF); // Port 2 Direction + +#endif //REG_CC2430_H diff --git a/device/include/mcs51/cc2510fx.h b/device/include/mcs51/cc2510fx.h new file mode 100644 index 0000000..6b95247 --- /dev/null +++ b/device/include/mcs51/cc2510fx.h @@ -0,0 +1,473 @@ +/*------------------------------------------------------------------------- + Register Declarations for Chipcon CC2510Fx/CC2511Fx + + Written By - Jesus Calvino-Fraga / jesusc at ece.ubc.ca (August 2006) + (Based on CC2510Fx/CC2511Fx PRELIMINARY Data Sheet (Rev. 1.2) SWRS055A) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef REG_CC2510FX_H +#define REG_CC2510FX_H + +#include + +// Interrupt Vectors +#define RFTXRX_VECTOR 0 // RF TX done / RX ready +#define ADC_VECTOR 1 // ADC end of conversion +#define URX0_VECTOR 2 // USART0 RX complete +#define URX1_VECTOR 3 // USART1 RX complete (I2S RX complete) +#define ENC_VECTOR 4 // AES encryption/decryption complete +#define ST_VECTOR 5 // Sleep Timer compare +#define P2INT_VECTOR 6 // Port 2 inputs (Also used for USB on CC2511Fx) +#define UTX0_VECTOR 7 // USART0 TX complete +#define DMA_VECTOR 8 // DMA transfer complete +#define T1_VECTOR 9 // Timer 1 (16-bit) capture/Compare/overflow +#define T2_VECTOR 10 // Timer 2 (MAC Timer) overflow +#define T3_VECTOR 11 // Timer 3 (8-bit) capture/compare/overflow +#define T4_VECTOR 12 // Timer 4 (8-bit) capture/compare/overflow +#define P0INT_VECTOR 13 // Port 0 inputs (Note: USB Resume from suspend interrupt on P0_7 on CC2511Fx ) +#define UTX1_VECTOR 14 // USART1 TX complete (I2S TX complete) +#define P1INT_VECTOR 15 // Port 1 inputs +#define RF_VECTOR 16 // RF general interrupts +#define WDT_VECTOR 17 // Watchdog overflow in timer mode + +//Shared Interrupt Vectors (I2S and USB) +#define I2SRX_VECTOR 3 //I2S RX complete +#define I2STX_VECTOR 14 //I2S TX complete +#define USB_VECTOR 6 //USB Interrupt pending ( CC2511Fx ) + +// SFR Registers and BITs + +SFR(P0, 0x80); // Port 0 + SBIT(P0_0, 0x80, 0); // Port 0 bit 0 + SBIT(P0_1, 0x80, 1); // Port 0 bit 1 + SBIT(P0_2, 0x80, 2); // Port 0 bit 2 + SBIT(P0_3, 0x80, 3); // Port 0 bit 3 + SBIT(P0_4, 0x80, 4); // Port 0 bit 4 + SBIT(P0_5, 0x80, 5); // Port 0 bit 5 + SBIT(P0_6, 0x80, 6); // Port 0 bit 6 + SBIT(P0_7, 0x80, 7); // Port 0 bit 7 +SFR(SP, 0x81); // Stack Pointer +SFR(DPL0, 0x82); // Data Pointer 0 Low Byte +SFR(DPH0, 0x83); // Data Pointer 0 High Byte +SFR(DPL1, 0x84); // Data Pointer 1 Low Byte +SFR(DPH1, 0x85); // Data Pointer 1 High Byte +SFR(U0CSR, 0x86); // USART 0 Control and Status +SFR(PCON, 0x87); // Power Mode Control +SFR(TCON, 0x88); // Interrupt Flag + SBIT(IT0, 0x88, 0); // reserved (must always be set to 1) + SBIT(RFTXRXIF, 0x88, 1); // RF TX/RX FIFO Interrupt Flag + SBIT(IT1, 0x88, 2); // reserved (must always be set to 1) + SBIT(URX0IF, 0x88, 3); // USART0 RX Interrupt Flag + SBIT(ADCIF, 0x88, 5); // ADC Interrupt Flag + SBIT(URX1IF, 0x88, 7); // USART1 RX Interrupt Flag + SBIT(I2SRXIF, 0x88, 7); // I2S RX interrupt flag (same loc as URX1IF) +SFR(P0IFG, 0x89); // Port 0 Interrupt Status Flag +SFR(P1IFG, 0x8A); // Port 1 Interrupt Status Flag +SFR(P2IFG, 0x8B); // Port 2 Interrupt Status Flag +SFR(PICTL, 0x8C); // Port Interrupt Control +SFR(P1IEN, 0x8D); // Port 1 Interrupt Mask +SFR(P0INP, 0x8F); // Port 0 Input Mode +SFR(P1, 0x90); // Port 1 + SBIT(P1_0, 0x90, 0); // Port 1 bit 0 + SBIT(P1_1, 0x90, 1); // Port 1 bit 1 + SBIT(P1_2, 0x90, 2); // Port 1 bit 2 + SBIT(P1_3, 0x90, 3); // Port 1 bit 3 + SBIT(P1_4, 0x90, 4); // Port 1 bit 4 + SBIT(P1_5, 0x90, 5); // Port 1 bit 5 + SBIT(P1_6, 0x90, 6); // Port 1 bit 6 + SBIT(P1_7, 0x90, 7); // Port 1 bit 7 +SFR(RFIM, 0x91); // RF Interrupt Mask +SFR(DPS, 0x92); // Data Pointer Select +SFR(MPAGE, 0x93); // Memory Page Select +SFR(_XPAGE, 0x93); // Memory Page Select under the name SDCC needs it +SFR(ENDIAN, 0x95); // USB Endianess Control (CC2511Fx) +SFR(S0CON, 0x98); // Interrupt Flag 2 + SBIT(ENCIF_0, 0x98, 0); // AES Interrupt Flag 0 + SBIT(ENCIF_1, 0x98, 1); // AES Interrupt Flag 1 +SFR(IEN2, 0x9A); // Interrupt Enable 2 Register +SFR(S1CON, 0x9B); // Interrupt Flag 3 +SFR(T2CT, 0x9C); // Timer 2 Count +SFR(T2PR, 0x9D); // Timer 2 Prescaler +SFR(T2CTL, 0x9E); // Timer 2 Control +SFR(P2, 0xA0); // Port 2 + SBIT(P2_0, 0xA0, 0); // Port 2 bit 0 + SBIT(P2_1, 0xA0, 1); // Port 2 bit 1 + SBIT(P2_2, 0xA0, 2); // Port 2 bit 2 + SBIT(P2_3, 0xA0, 3); // Port 2 bit 3 + SBIT(P2_4, 0xA0, 4); // Port 2 bit 4 + SBIT(P2_5, 0xA0, 5); // Port 2 bit 5 + SBIT(P2_6, 0xA0, 6); // Port 2 bit 6 + SBIT(P2_7, 0xA0, 7); // Port 2 bit 7 +SFR(WORIRQ, 0xA1); // Sleep Timer Interrupt Control +SFR(WORCTL, 0xA2); // Sleep Timer Control +SFR(WORCTRL, 0xA2); // Sleep Timer Control (typo in datasheet?) +SFR(WOREVT0, 0xA3); // Sleep Timer Event0 Timeout Low +SFR(WOREVT1, 0xA4); // Sleep Timer Event0 Timeout High +SFR(WORTIME0, 0xA5); // Sleep Timer Low Byte +SFR(WORTIME1, 0xA6); // Sleep Timer High Byte +SFR(IEN0, 0xA8); // Interrupt Enable 0 Register + SBIT(RFTXRXIE, 0xA8, 0); // RF TX/RX done interrupt enable + SBIT(ADCIE, 0xA8, 1); // ADC Interrupt Enable + SBIT(URX0IE, 0xA8, 2); // USART0 RX Interrupt Enable + SBIT(URX1IE, 0xA8, 3); // USART1 RX Interrupt Enable + SBIT(I2SRXIE, 0xA8, 3); // I2S RX interrupt enable (Same loc as URX1IE) + SBIT(ENCIE, 0xA8, 4); // AES Encryption/Decryption Interrupt Enable + SBIT(STIE, 0xA8, 5); // Sleep Timer Interrupt Enable + SBIT(EA, 0xA8, 7); // Global Interrupt Enable +SFR(IP0, 0xA9); // Interrupt Priority 0 +SFR(FWT, 0xAB); // Flash Write Timing +SFR(FADDRL, 0xAC); // Flash Address Low Byte +SFR(FADDRH, 0xAD); // Flash Address High Byte +SFR(FCTL, 0xAE); // Flash Control +SFR(FWDATA, 0xAF); // Flash Write Data +SFR(ENCDI, 0xB1); // Encryption Input Data +SFR(ENCDO, 0xB2); // Encryption Output Data +SFR(ENCCS, 0xB3); // Encryption Control and Status +SFR(ADCCON1, 0xB4); // ADC Control 1 +SFR(ADCCON2, 0xB5); // ADC Control 2 +SFR(ADCCON3, 0xB6); // ADC Control 3 +SFR(IEN1, 0xB8); // Interrupt Enable 1 Register + SBIT(DMAIE, 0xB8, 0); // DMA Transfer Interrupt Enable + SBIT(T1IE, 0xB8, 1); // Timer 1 Interrupt Enable + SBIT(T2IE, 0xB8, 2); // Timer 2 Interrupt Enable + SBIT(T3IE, 0xB8, 3); // Timer 3 Interrupt Enable + SBIT(T4IE, 0xB8, 4); // Timer 4 Interrupt Enable + SBIT(P0IE, 0xB8, 5); // Port 0 Interrupt Enable +SFR(IP1, 0xB9); // Interrupt Priority 1 +SFR(ADCL, 0xBA); // ADC Data Low +SFR(ADCH, 0xBB); // ADC Data High +SFR(RNDL, 0xBC); // Random Number Generator Data Low Byte +SFR(RNDH, 0xBD); // Random Number Generator Data High Byte +SFR(SLEEP, 0xBE); // Sleep Mode Control +SFR(IRCON, 0xC0); // Interrupt Flag 4 + SBIT(DMAIF, 0xC0, 0); // DMA Complete Interrupt Flag + SBIT(T1IF, 0xC0, 1); // Timer 1 Interrupt Flag + SBIT(T2IF, 0xC0, 2); // Timer 2 Interrupt Flag + SBIT(T3IF, 0xC0, 3); // Timer 3 Interrupt Flag + SBIT(T4IF, 0xC0, 4); // Timer 4 Interrupt Flag + SBIT(P0IF, 0xC0, 5); // Port 0 Interrupt Flag + SBIT(STIF, 0xC0, 7); // Sleep Timer Interrupt Flag +SFR(U0DBUF, 0xC1); // USART 0 Receive/Transmit Data Buffer +SFR(U0BAUD, 0xC2); // USART 0 Baud Rate Control +SFR(U0UCR, 0xC4); // USART 0 UART Control +SFR(U0GCR, 0xC5); // USART 0 Generic Control +SFR(CLKCON, 0xC6); // Clock Control +SFR(MEMCTR, 0xC7); // Memory Arbiter Control +SFR(WDCTL, 0xC9); // Watchdog Timer Control +SFR(T3CNT, 0xCA); // Timer 3 Counter +SFR(T3CTL, 0xCB); // Timer 3 Control +SFR(T3CCTL0, 0xCC); // Timer 3 Channel 0 Capture/Compare Control +SFR(T3CC0, 0xCD); // Timer 3 Channel 0 Capture/Compare Value +SFR(T3CCTL1, 0xCE); // Timer 3 Channel 1 Capture/Compare Control +SFR(T3CC1, 0xCF); // Timer 3 Channel 1 Capture/Compare Value +SFR(PSW, 0xD0); // Program Status Word + SBIT(P, 0xD0, 0); // Parity Flag + SBIT(F1, 0xD0, 1); // User-Defined Flag + SBIT(OV, 0xD0, 2); // Overflow Flag + SBIT(RS0, 0xD0, 3); // Register Bank Select 0 + SBIT(RS1, 0xD0, 4); // Register Bank Select 1 + SBIT(F0, 0xD0, 5); // User-Defined Flag + SBIT(AC, 0xD0, 6); // Auxiliary Carry Flag + SBIT(CY, 0xD0, 7); // Carry Flag +SFR(DMAIRQ, 0xD1); // DMA Interrupt Flag +SFR(DMA1CFGL, 0xD2); // DMA Channel 1-4 Configuration Address Low Byte +SFR(DMA1CFGH, 0xD3); // DMA Channel 1-4 Configuration Address High Byte +SFR(DMA0CFGL, 0xD4); // DMA Channel 0 Configuration Address Low Byte +SFR(DMA0CFGH, 0xD5); // DMA Channel 0 Configuration Address High Byte +SFR(DMAARM, 0xD6); // DMA Channel Arm +SFR(DMAREQ, 0xD7); // DMA Channel Start Request and Status +SFR(TIMIF, 0xD8); // Timers 1/3/4 Interrupt Mask/Flag + SBIT(T3OVFIF, 0xD8, 0); // Timer 3 overflow interrupt flag 0:no pending 1:pending + SBIT(T3CH0IF, 0xD8, 1); // Timer 3 channel 0 interrupt flag 0:no pending 1:pending + SBIT(T3CH1IF, 0xD8, 2); // Timer 3 channel 1 interrupt flag 0:no pending 1:pending + SBIT(T4OVFIF, 0xD8, 3); // Timer 4 overflow interrupt flag 0:no pending 1:pending + SBIT(T4CH0IF, 0xD8, 4); // Timer 4 channel 0 interrupt flag 0:no pending 1:pending + SBIT(T4CH1IF, 0xD8, 5); // Timer 4 channel 1 interrupt flag 0:no pending 1:pending + SBIT(OVFIM, 0xD8, 6); // Timer 1 overflow interrupt mask +SFR(RFD, 0xD9); // RF Data +SFR(T1CC0L, 0xDA); // Timer 1 Channel 0 Capture/Compare Value Low +SFR(T1CC0H, 0xDB); // Timer 1 Channel 0 Capture/Compare Value High +SFR(T1CC1L, 0xDC); // Timer 1 Channel 1 Capture/Compare Value Low +SFR(T1CC1H, 0xDD); // Timer 1 Channel 1 Capture/Compare Value High +SFR(T1CC2L, 0xDE); // Timer 1 Channel 2 Capture/Compare Value Low +SFR(T1CC2H, 0xDF); // Timer 1 Channel 2 Capture/Compare Value High +SFR(ACC, 0xE0); // Accumulator + SBIT(ACC_0, 0xE0, 0); // Accumulator bit 0 + SBIT(ACC_1, 0xE0, 1); // Accumulator bit 1 + SBIT(ACC_2, 0xE0, 2); // Accumulator bit 2 + SBIT(ACC_3, 0xE0, 3); // Accumulator bit 3 + SBIT(ACC_4, 0xE0, 4); // Accumulator bit 4 + SBIT(ACC_5, 0xE0, 5); // Accumulator bit 5 + SBIT(ACC_6, 0xE0, 6); // Accumulator bit 6 + SBIT(ACC_7, 0xE0, 7); // Accumulator bit 7 +SFR(RFST, 0xE1); // RF Strobe Commands +SFR(T1CNTL, 0xE2); // Timer 1 Counter Low +SFR(T1CNTH, 0xE3); // Timer 1 Counter High +SFR(T1CTL, 0xE4); // Timer 1 Control and Status +SFR(T1CCTL0, 0xE5); // Timer 1 Channel 0 Capture/Compare Control +SFR(T1CCTL1, 0xE6); // Timer 1 Channel 1 Capture/Compare Control +SFR(T1CCTL2, 0xE7); // Timer 1 Channel 2 Capture/Compare Control +SFR(IRCON2, 0xE8); // Interrupt Flag 5 + SBIT(P2IF, 0xE8, 0); // Port 2 Interrupt Flag + SBIT(USBIF, 0xE8, 0); // USB Interrupt Flag (same bit as P2IF) + SBIT(UTX0IF, 0xE8, 1); // USART0 TX Interrupt Flag + SBIT(UTX1IF, 0xE8, 2); // USART1 TX Interrupt Flag + SBIT(I2STXIF, 0xE8, 2); // I2S TX Interrupt Flag (same bit as UTX1FIF) + SBIT(P1IF, 0xE8, 3); // Port 1 Interrupt Flag + SBIT(WDTIF, 0xE8, 4); // Watchdog Timer Interrupt Flag +SFR(RFIF, 0xE9); // RF Interrupt Flags +SFR(T4CNT, 0xEA); // Timer 4 Counter +SFR(T4CTL, 0xEB); // Timer 4 Control +SFR(T4CCTL0, 0xEC); // Timer 4 Channel 0 Capture/Compare Control +SFR(T4CC0, 0xED); // Timer 4 Channel 0 Capture/Compare Value +SFR(T4CCTL1, 0xEE); // Timer 4 Channel 1 Capture/Compare Control +SFR(T4CC1, 0xEF); // Timer 4 Channel 1 Capture/Compare Value +SFR(B, 0xF0); // B Register + SBIT(B_0, 0xF0, 0); // Register B bit 0 + SBIT(B_1, 0xF0, 1); // Register B bit 1 + SBIT(B_2, 0xF0, 2); // Register B bit 2 + SBIT(B_3, 0xF0, 3); // Register B bit 3 + SBIT(B_4, 0xF0, 4); // Register B bit 4 + SBIT(B_5, 0xF0, 5); // Register B bit 5 + SBIT(B_6, 0xF0, 6); // Register B bit 6 + SBIT(B_7, 0xF0, 7); // Register B bit 7 +SFR(PERCFG, 0xF1); // Peripheral Control +SFR(ADCCFG, 0xF2); // ADC Input Configuration +SFR(P0SEL, 0xF3); // Port 0 Function Select +SFR(P1SEL, 0xF4); // Port 1 Function Select +SFR(P2SEL, 0xF5); // Port 2 Function Select +SFR(P1INP, 0xF6); // Port 1 Input Mode +SFR(P2INP, 0xF7); // Port 2 Input Mode +SFR(U1CSR, 0xF8); // USART 1 Control and Status + SBIT(ACTIVE, 0xF8, 0); // USART transmit/receive active status 0:idle 1:busy + SBIT(TX_BYTE, 0xF8, 1); // Transmit byte status 0:Byte not transmitted 1:Last byte transmitted + SBIT(RX_BYTE, 0xF8, 2); // Receive byte status 0:No byte received 1:Received byte ready + SBIT(ERR, 0xF8, 3); // UART parity error status 0:No error 1:parity error + SBIT(FE, 0xF8, 4); // UART framing error status 0:No error 1:incorrect stop bit level + SBIT(SLAVE, 0xF8, 5); // SPI master or slave mode select 0:master 1:slave + SBIT(RE, 0xF8, 6); // UART receiver enable 0:disabled 1:enabled + SBIT(MODE, 0xF8, 7); // USART mode select 0:SPI 1:UART +SFR(U1DBUF, 0xF9); // USART 1 Receive/Transmit Data Buffer +SFR(U1BAUD, 0xFA); // USART 1 Baud Rate Control +SFR(U1UCR, 0xFB); // USART 1 UART Control +SFR(U1GCR, 0xFC); // USART 1 Generic Control +SFR(P0DIR, 0xFD); // Port 0 Direction +SFR(P1DIR, 0xFE); // Port 1 Direction +SFR(P2DIR, 0xFF); // Port 2 Direction + +// From table 68: xdata RF registers + +SFRX(SYNC1, 0xDF00); // Sync word, high byte +SFRX(SYNC0, 0xDF01); // Sync word, low byte +SFRX(PKTLEN, 0xDF02); // Packet length +SFRX(PKTCTRL1, 0xDF03); // Packet automation control +SFRX(PKTCTRL0, 0xDF04); // Packet automation control +SFRX(ADDR, 0xDF05); // Device address +SFRX(CHANNR, 0xDF06); // Channel number +SFRX(FSCTRL1, 0xDF07); // Frequency synthesizer control +SFRX(FSCTRL0, 0xDF08); // Frequency synthesizer control +SFRX(FREQ2, 0xDF09); // Frequency control word, high byte +SFRX(FREQ1, 0xDF0A); // Frequency control word, middle byte +SFRX(FREQ0, 0xDF0B); // Frequency control word, low byte +SFRX(MDMCFG4, 0xDF0C); // Modem configuration +SFRX(MDMCFG3, 0xDF0D); // Modem configuration +SFRX(MDMCFG2, 0xDF0E); // Modem configuration +SFRX(MDMCFG1, 0xDF0F); // Modem configuration +SFRX(MDMCFG0, 0xDF10); // Modem configuration +SFRX(DEVIATN, 0xDF11); // Modem deviation setting +SFRX(MCSM2, 0xDF12); // Main Radio Control State Machine configuration +SFRX(MCSM1, 0xDF13); // Main Radio Control State Machine configuration +SFRX(MCSM0, 0xDF14); // Main Radio Control State Machine configuration +SFRX(FOCCFG, 0xDF15); // Frequency Offset Compensation configuration +SFRX(BSCFG, 0xDF16); // Bit Synchronization configuration +SFRX(AGCCTRL2, 0xDF17); // AGC control +SFRX(AGCCTRL1, 0xDF18); // AGC control +SFRX(AGCCTRL0, 0xDF19); // AGC control +SFRX(FREND1, 0xDF1A); // Front end RX configuration +SFRX(FREND0, 0xDF1B); // Front end TX configuration +SFRX(FSCAL3, 0xDF1C); // Frequency synthesizer calibration +SFRX(FSCAL2, 0xDF1D); // Frequency synthesizer calibration +SFRX(FSCAL1, 0xDF1E); // Frequency synthesizer calibration +SFRX(FSCAL0, 0xDF1F); // Frequency synthesizer calibration +SFRX(PA_TABLE7, 0xDF27); // PA output power setting +SFRX(PA_TABLE6, 0xDF28); // PA output power setting +SFRX(PA_TABLE5, 0xDF29); // PA output power setting +SFRX(PA_TABLE4, 0xDF2A); // PA output power setting +SFRX(PA_TABLE3, 0xDF2B); // PA output power setting +SFRX(PA_TABLE2, 0xDF2C); // PA output power setting +SFRX(PA_TABLE1, 0xDF2D); // PA output power setting +SFRX(PA_TABLE0, 0xDF2E); // PA output power setting +SFRX(IOCFG2, 0xDF2F); // GDO2 output pin configuration +SFRX(IOCFG1, 0xDF30); // GDO1 output pin configuration +SFRX(IOCFG0, 0xDF31); // GDO0 output pin configuration +SFRX(PARTNUM, 0xDF36); // Chip Identifier +SFRX(VERSION, 0xDF37); // Configuration +SFRX(FREQEST, 0xDF38); // Frequency Offset Estimate +SFRX(LQI, 0xDF39); // Link Quality Indicator +SFRX(RSSI, 0xDF3A); // Received Signal Strength Indication +SFRX(MARCSTATE, 0xDF3B); // Main Radio Control State +SFRX(PKTSTATUS, 0xDF3C); // Packet status +SFRX(VCO_VC_DAC, 0xDF3D); // PLL calibration current + +// I2S Registers + +SFRX(I2SCFG0, 0xDF40); // I2S Configuration Register 0 +SFRX(I2SCFG1, 0xDF41); // I2S Configuration Register 1 +SFRX(I2SDATL, 0xDF42); // I2S Data Low Byte +SFRX(I2SDATH, 0xDF43); // I2S Data High Byte +SFRX(I2SWCNT, 0xDF44); // I2S Word Count Register +SFRX(I2SSTAT, 0xDF45); // I2S Status Register +SFRX(I2SCLKF0, 0xDF46); // I2S Clock Configuration Register 0 +SFRX(I2SCLKF1, 0xDF47); // I2S Clock Configuration Register 1 +SFRX(I2SCLKF2, 0xDF48); // I2S Clock Configuration Register 2 + +// Common USB Registers + +SFRX(USBADDR, 0xDE00); // Function Address +SFRX(USBPOW, 0xDE01); // Power/Control Register +SFRX(USBIIF, 0xDE02); // IN Endpoints and EP0 Interrupt Flags +SFRX(USBOIF, 0xDE04); // OUT Endpoints Interrupt Flags +SFRX(USBCIF, 0xDE06); // Common USB Interrupt Flags +SFRX(USBIIE, 0xDE07); // IN Endpoints and EP0 Interrupt Enable Mask +SFRX(USBOIE, 0xDE09); // Out Endpoints Interrupt Enable Mask +SFRX(USBCIE, 0xDE0B); // Common USB Interrupt Enable Mask +SFRX(USBFRML, 0xDE0C); // Current Frame Number (Low byte) +SFRX(USBFRMH, 0xDE0D); // Current Frame Number (High byte) +SFRX(USBINDEX, 0xDE0E); // Selects current endpoint. + +// Indexed Endpoint Registers + +SFRX(USBMAXI, 0xDE10); // Max. packet size for IN endpoint +SFRX(USBCS0, 0xDE11); // EP0 Control and Status (USBINDEX = 0) +SFRX(USBCSIL, 0xDE11); // IN EP{1-5} Control and Status Low +SFRX(USBCSIH, 0xDE12); // IN EP{1-5} Control and Status High +SFRX(USBMAXO, 0xDE13); // Max. packet size for OUT endpoint +SFRX(USBCSOL, 0xDE14); // OUT EP{1-5} Control and Status Low +SFRX(USBCSOH, 0xDE15); // OUT EP{1-5} Control and Status High +SFRX(USBCNT0, 0xDE16); // Number of received bytes in EP0 FIFO (USBINDEX = 0) +SFRX(USBCNTL, 0xDE16); // Number of bytes in OUT FIFO Low +SFRX(USBCNTH, 0xDE17); // Number of bytes in OUT FIFO High + +// Endpoint FIFO Registers + +SFRX(USBF0, 0xDE20); // Endpoint 0 FIFO +SFRX(USBF1, 0xDE22); // Endpoint 1 FIFO +SFRX(USBF2, 0xDE24); // Endpoint 2 FIFO +SFRX(USBF3, 0xDE26); // Endpoint 3 FIFO +SFRX(USBF4, 0xDE28); // Endpoint 4 FIFO +SFRX(USBF5, 0xDE2A); // Endpoint 5 FIFO + +// SFRs also accesible through XDATA space + +SFRX(X_U0CSR, 0xDF86); // USART 0 Control and Status +SFRX(X_P0IFG, 0xDF89); // Port 0 Interrupt Status Flag +SFRX(X_P1IFG, 0xDF8A); // Port 1 Interrupt Status Flag +SFRX(X_P2IFG, 0xDF8B); // Port 2 Interrupt Status Flag +SFRX(X_PICTL, 0xDF8C); // Port Pins Interrupt Mask and Edge +SFRX(X_P1IEN, 0xDF8D); // Port 1 Interrupt Mask +SFRX(X_P0INP, 0xDF8F); // Port 0 Input Mode +SFRX(X_RFIM, 0xDF91); // RF Interrupt Mask +SFRX(X_MPAGE, 0xDF93); // Memory Page Select +SFRX(X_T2CT, 0xDF9C); // Timer 2 Control +SFRX(X_T2PR, 0xDF9D); // Timer 2 Prescaler +SFRX(X_T2CTL, 0xDF9E); // Timer 2 Control +SFRX(X_WORIRQ, 0xDFA1); // Timer Sleep Timer Interrupts +SFRX(X_WORCTL, 0xDFA2); // Sleep Timer Control +SFRX(X_WOREVT0, 0xDFA3); // Timer Sleep Timer Event 0 Timeout Low Byte +SFRX(X_WOREVT1, 0xDFA4); // Timer Sleep Timer Event 0 Timeout High Byte +SFRX(X_WORTIME0, 0xDFA5); // Sleep Timer Value 0 +SFRX(X_WORTIME1, 0xDFA6); // Sleep Timer Value 1 +SFRX(X_FWT, 0xDFAB); // Flash Write Timing +SFRX(X_FADDRL, 0xDFAC); // Flash Address Low +SFRX(X_FADDRH, 0xDFAD); // Flash Address High +SFRX(X_FCTL, 0xDFAE); // Flash Control +SFRX(X_FWDATA, 0xDFAF); // Flash Write Data +SFRX(X_ENCDI, 0xDFB1); // Encryption/Decryption Input Data +SFRX(X_ENCDO, 0xDFB2); // Encryption/Decryption Output Data +SFRX(X_ENCCS, 0xDFB3); // Encryption/Decryption Control and Status +SFRX(X_ADCCON1, 0xDFB4); // ADC Control 1 +SFRX(X_ADCCON2, 0xDFB5); // ADC Control 2 +SFRX(X_ADCCON3, 0xDFB6); // ADC Control 3 +SFRX(X_ADCL, 0xDFBA); // ADC Data Low +SFRX(X_ADCH, 0xDFBB); // ADC Data High +SFRX(X_RNDL, 0xDFBC); // Random Number Generator Data Low +SFRX(X_RNDH, 0xDFBD); // Random Number Generator Data High +SFRX(X_SLEEP, 0xDFBE); // Flash Write Timing +SFRX(X_U0DBUF, 0xDFC1); // USART 0 Receive/Transmit Data Buffer +SFRX(X_U0BAUD, 0xDFC2); // USART 0 Baud Rate Control +SFRX(X_U0UCR, 0xDFC4); // USART 0 UART Control +SFRX(X_U0GCR, 0xDFC5); // USART 0 Generic Control +SFRX(X_CLKCON, 0xDFC6); // Clock Control +SFRX(X_MEMCTR, 0xDFC7); // Memory System Control +SFRX(X_WDCTL, 0xDFC9); // Watchdog Timer Control +SFRX(X_T3CNT, 0xDFCA); // Timer 3 Counter +SFRX(X_T3CTL, 0xDFCB); // Timer 3 Control +SFRX(X_T3CCTL0, 0xDFCC); // Timer 3 Channel 0 Capture/Compare Control +SFRX(X_T3CC0, 0xDFCD); // Timer 3 Channel 0 Capture/Compare Value +SFRX(X_T3CCTL1, 0xDFCE); // Timer 3 Channel 1 Capture/Compare Control +SFRX(X_T3CC1, 0xDFCF); // Timer 3 Channel 1 Capture/Compare Value +SFRX(X_DMAIRQ, 0xDFD1); // DMA Interrupt Flag +SFRX(X_DMA1CFGL, 0xDFD2); // DMA Channel 1-4 Configuration Address Low Byte +SFRX(X_DMA1CFGH, 0xDFD3); // DMA Channel 1-4 Configuration Address High Byte +SFRX(X_DMA0CFGL, 0xDFD4); // DMA Channel 0 Configuration Address Low Byte +SFRX(X_DMA0CFGH, 0xDFD5); // DMA Channel 0 Configuration Address High Byte +SFRX(X_DMAARM, 0xDFD6); // DMA Channel Arm +SFRX(X_DMAREQ, 0xDFD7); // DMA Channel Start Request and Status +SFRX(X_TIMIF, 0xDFD8); // Timers 1/3/4 Joint Interrupt Mask/Flags +SFRX(X_RFD, 0xDFD9); // RF Data +SFRX(X_T1CC0L, 0xDFDA); // Timer 1 Channel 0 Capture/Compare Value Low +SFRX(X_T1CC0H, 0xDFDB); // Timer 1 Channel 0 Capture/Compare Value High +SFRX(X_T1CC1L, 0xDFDC); // Timer 1 Channel 1 Capture/Compare Value Low +SFRX(X_T1CC1H, 0xDFDD); // Timer 1 Channel 1 Capture/Compare Value High +SFRX(X_T1CC2L, 0xDFDE); // Timer 1 Channel 2 Capture/Compare Value Low +SFRX(X_T1CC2H, 0xDFDF); // Timer 1 Channel 2 Capture/Compare Value High +SFRX(X_RFST, 0xDFE1); // RF Strobe Commands +SFRX(X_T1CNTL, 0xDFE2); // Timer 1 Counter Low +SFRX(X_T1CNTH, 0xDFE3); // Timer 1 Counter High +SFRX(X_T1CTL, 0xDFE4); // Timer 1 Control and Status +SFRX(X_T1CCTL0, 0xDFE5); // Timer 1 Channel 0 Capture/Compare Control +SFRX(X_T1CCTL1, 0xDFE6); // Timer 1 Channel 1 Capture/Compare Control +SFRX(X_T1CCTL2, 0xDFE7); // Timer 1 Channel 2 Capture/Compare Control +SFRX(X_RFIF, 0xDFE9); // RF Interrupt flags +SFRX(X_T4CNT, 0xDFEA); // Timer 4 Counter +SFRX(X_T4CTL, 0xDFEB); // Timer 4 Control +SFRX(X_T4CCTL0, 0xDFEC); // Timer 4 Channel 0 Capture/Compare Control +SFRX(X_T4CC0, 0xDFED); // Timer 4 Channel 0 Capture/Compare Value +SFRX(X_T4CCTL1, 0xDFEE); // Timer 4 Channel 1 Capture/Compare Control +SFRX(X_T4CC1, 0xDFEF); // Timer 4 Channel 1 Capture/Compare Value +SFRX(X_PERCFG, 0xDFF1); // Peripheral I/O Control +SFRX(X_ADCCFG, 0xDFF2); // ADC Input Configuration +SFRX(X_P0SEL, 0xDFF3); // Port 0 Function Select +SFRX(X_P1SEL, 0xDFF4); // Port 1 Function Select +SFRX(X_P2SEL, 0xDFF5); // Port 2 Function Select +SFRX(X_P1INP, 0xDFF6); // Port 1 Input Mode +SFRX(X_P2INP, 0xDFF7); // Port 2 Input Mode +SFRX(X_U1CSR, 0xDFF8); // USART 1 Control and Status +SFRX(X_U1DBUF, 0xDFF9); // USART 1 Receive/Transmit Data Buffer +SFRX(X_U1BAUD, 0xDFFA); // USART 1 Baud Rate Control +SFRX(X_U1UCR, 0xDFFB); // USART 1 UART Control +SFRX(X_U1GCR, 0xDFFC); // USART 1 Generic Control +SFRX(X_P0DIR, 0xDFFD); // Port 0 Direction +SFRX(X_P1DIR, 0xDFFE); // Port 1 Direction +SFRX(X_P2DIR, 0xDFFF); // Port 2 Direction + +#endif //REG_CC2510FX_H + diff --git a/device/include/mcs51/compiler.h b/device/include/mcs51/compiler.h new file mode 100644 index 0000000..660d69f --- /dev/null +++ b/device/include/mcs51/compiler.h @@ -0,0 +1,177 @@ +/** \file compiler.h + * \author Maarten Brock + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * In other words, you are welcome to use, share and improve this program. + * You are forbidden to forbid anyone else to use, share and improve + * what you give them. Help stamp out software-hoarding! + * + * Header file to overcome 8051 compiler differences for specifying + * special function registers. The following compilers are supported: + * SDCC, Keil, Raisonance, IAR, Hi-Tech, Tasking, Crossware, Wickenhaeuser. + * Unfortunately not for use with Dunfield. The compilers are identified by + * their unique predefined macros. See also: + * http://predef.sourceforge.net/precomp.html + * + * SBIT and SFR define special bit and special function registers at the given + * address. SFR16 and SFR32 define sfr combinations at adjacent addresses in + * little-endian format. SFR16E and SFR32E define sfr combinations without + * prerequisite byte order or adjacency. None of these multi-byte sfr + * combinations will guarantee the order in which they are accessed when read + * or written. + * SFR16X and SFR32X for 16 bit and 32 bit xdata registers are not defined + * to avoid portability issues because of compiler endianness. + * This file is to be included in every microcontroller specific header file. + * Example: + * + * // my_mcu.h: sfr definitions for my mcu + * #include + * + * SBIT (P0_1, 0x80, 1); // Port 0 pin 1 + * + * SFR (P0, 0x80); // Port 0 + * + * SFRX (CPUCS, 0xE600); // Cypress FX2 Control and Status register in xdata memory at 0xE600 + * + * SFR16 (TMR2, 0xCC); // Timer 2, lsb at 0xCC, msb at 0xCD + * + * SFR16E(TMR0, 0x8C8A); // Timer 0, lsb at 0x8A, msb at 0x8C + * + * SFR32 (MAC0ACC, 0x93); // SiLabs C8051F120 32 bits MAC0 Accumulator, lsb at 0x93, msb at 0x96 + * + * SFR32E(SUMR, 0xE5E4E3E2); // TI MSC1210 SUMR 32 bits Summation register, lsb at 0xE2, msb at 0xE5 + * + */ + +#ifndef COMPILER_H +#define COMPILER_H + +/** SDCC - Small Device C Compiler + * http://sdcc.sf.net + */ +#if defined SDCC +# define SBIT(name, addr, bit) __sbit __at(addr+bit) name +# define SFR(name, addr) __sfr __at(addr) name +# define SFRX(name, addr) __xdata volatile unsigned char __at(addr) name +# define SFR16(name, addr) __sfr16 __at(((addr+1U)<<8) | addr) name +# define SFR16E(name, fulladdr) __sfr16 __at(fulladdr) name +# define SFR32(name, addr) __sfr32 __at(((addr+3UL)<<24) | ((addr+2UL)<<16) | ((addr+1UL)<<8) | addr) name +# define SFR32E(name, fulladdr) __sfr32 __at(fulladdr) name + +/** Keil C51 + * http://www.keil.com + */ +#elif defined __CX51__ +# define SBIT(name, addr, bit) sbit name = addr^bit +# define SFR(name, addr) sfr name = addr +# define SFRX(name, addr) volatile unsigned char xdata name _at_ addr +# define SFR16(name, addr) sfr16 name = addr +# define SFR16E(name, fulladdr) /* not supported */ +# define SFR32(name, fulladdr) /* not supported */ +# define SFR32E(name, fulladdr) /* not supported */ + +/** Raisonance + * http://www.raisonance.com + */ +#elif defined __RC51__ +# define SBIT(name, addr, bit) at (addr+bit) sbit name +# define SFR(name, addr) sfr at addr name +# define SFRX(name, addr) xdata at addr volatile unsigned char name +# define SFR16(name, addr) sfr16 at addr name +# define SFR16E(name, fulladdr) /* not supported */ +# define SFR32(name, fulladdr) /* not supported */ +# define SFR32E(name, fulladdr) /* not supported */ + +/** IAR 8051 + * http://www.iar.com + */ +#elif defined __ICC8051__ +# define SBIT(name, addr, bit) __bit __no_init volatile bool name @ (addr+bit) +# define SFR(name, addr) __sfr __no_init volatile unsigned char name @ addr +# define SFRX(name, addr) __xdata __no_init volatile unsigned char name @ addr +# define SFR16(name, addr) __sfr __no_init volatile unsigned int name @ addr +# define SFR16E(name, fulladdr) /* not supported */ +# define SFR32(name, fulladdr) __sfr __no_init volatile unsigned long name @ addr +# define SFR32E(name, fulladdr) /* not supported */ + +/** Tasking / Altium + * http://www.altium.com/tasking + */ +#elif defined _CC51 +# define SBIT(name, addr, bit) _sfrbit name _at(addr+bit) +# define SFR(name, addr) _sfrbyte name _at(addr) +# define SFRX(name, addr) _xdat volatile unsigned char name _at(addr) +#if _CC51 > 71 +# define SFR16(name, addr) _sfrword _little name _at(addr) +#else +# define SFR16(name, addr) /* not supported */ +#endif +# define SFR16E(name, fulladdr) /* not supported */ +# define SFR32(name, fulladdr) /* not supported */ +# define SFR32E(name, fulladdr) /* not supported */ + +/** Hi-Tech 8051 + * http://www.htsoft.com + */ +#elif defined HI_TECH_C +# define SBIT(name, addr, bit) volatile bit name @ (addr+bit) +# define SFR(name, addr) volatile unsigned char name @ addr +# define SFRX(name, addr) volatile far unsigned char name @ addr +# define SFR16(name, addr) /* not supported */ +# define SFR16E(name, fulladdr) /* not supported */ +# define SFR32(name, fulladdr) /* not supported */ +# define SFR32E(name, fulladdr) /* not supported */ + +/** Crossware + * http://www.crossware.com + */ +#elif defined _XC51_VER +# define SBIT(name, addr, bit) _sfrbit name = (addr+bit) +# define SFR(name, addr) _sfr name = addr +# define SFRX(name, addr) volatile unsigned char _xdata name _at addr +# define SFR16(name, addr) _sfrword name = addr +# define SFR16E(name, fulladdr) /* not supported */ +# define SFR32(name, fulladdr) /* not supported */ +# define SFR32E(name, fulladdr) /* not supported */ + +/** Wickenhaeuser + * http://www.wickenhaeuser.de + */ +#elif defined __UC__ +# define SBIT(name, addr, bit) unsigned char bit name @ (addr+bit) +# define SFR(name, addr) near unsigned char name @ addr +# define SFRX(name, addr) xdata volatile unsigned char name @ addr +# define SFR16(name, addr) /* not supported */ +# define SFR16E(name, fulladdr) /* not supported */ +# define SFR32(name, fulladdr) /* not supported */ +# define SFR32E(name, fulladdr) /* not supported */ + +/** default + * unrecognized compiler + */ +#else +# warning unrecognized compiler +# define SBIT(name, addr, bit) volatile bool name +# define SFR(name, addr) volatile unsigned char name +# define SFRX(name, addr) volatile unsigned char name +# define SFR16(name, addr) volatile unsigned short name +# define SFR16E(name, fulladdr) volatile unsigned short name +# define SFR32(name, fulladdr) volatile unsigned long name +# define SFR32E(name, fulladdr) volatile unsigned long name + +#endif + +#endif //COMPILER_H diff --git a/device/include/mcs51/lint.h b/device/include/mcs51/lint.h new file mode 100644 index 0000000..c2aa59c --- /dev/null +++ b/device/include/mcs51/lint.h @@ -0,0 +1,85 @@ +/*----------------------------------------------------------------------------- + + Include file to allow parsing mcs51 specific code with syntax checking tools + + Copyright (c) 2005, Dr. Frieder Ferlemann + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA + +-----------------------------------------------------------------------------*/ + +#ifndef _LINT_H +#define _LINT_H + + #if !defined(SDCC_mcs51) + + #define __data + #define __near + #define __idata + #define __xdata + #define __far + #define __pdata + #define __code + #define __bit bool + #define __sfr volatile unsigned char + #define __sbit volatile bool + #define __critical + #define __at(x) /* use "__at (0xab)" instead of "__at 0xab" */ + #define __using(x) + #define __interrupt(x) + #define __naked + + #define data + #define near + #define idata + #define xdata + #define far + #define pdata + #define code + #define bit bool + #define sfr volatile unsigned char + #define sbit volatile bool + #define critical + #define at(x) + #define using(x) + #define interrupt(x) + #define naked + + /* The tool Splint is available at http://www.splint.org + Other tools might also be used for statically checking c-sources. + Traditionally they could have "lint" in their name. + */ + #if defined(S_SPLINT_S) + + /* Behaviour of splint can be modified by special comments. + Some examples are shown below. + + Note 1: most probably you'll want to copy this complete file into + your source directory, adapt the settings to your needs and use + #include "lint.h" as the first include in your source file(s). + You should then be able to either directly compile your file + or to run a check with splint over it without other changes. + + Note 2: you need brackets around arguments for special + keywords, so f.e. it's "interrupt (1)" instead of "interrupt 1". + */ + + /*@ +charindex @*/ + + #endif + + #endif + +#endif diff --git a/device/include/mcs51/mcs51reg.h b/device/include/mcs51/mcs51reg.h new file mode 100644 index 0000000..4d2e63f --- /dev/null +++ b/device/include/mcs51/mcs51reg.h @@ -0,0 +1,4601 @@ +/*------------------------------------------------------------------------- + Register Declarations for the mcs51 compatible microcontrollers + + Written By - Bela Torok / bela.torok@kssg.ch (November 2000) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + + History: + -------- + Version 1.0 Nov 2, 2000 - B. Torok / bela.torok@kssg.ch + Initial release, supported microcontrollers: + 8051, 8052, Atmel AT89C1051, AT89C2051, AT89C4051, + Infineon / Siemens SAB80515, SAB80535, SAB80515A + + Version 1.0.1 (Nov 3, 2000) + SAB80515A definitions revised by Michael Schmitt / michael.schmitt@t-online.de + + Version 1.0.2 (Nov 6, 2000) + T2CON bug corrected 8052 and SABX microcontrollers have different T2CONs + Support for the Atmel AT89C52, AT80LV52, AT89C55, AT80LV55 + Support for the Dallas DS80C320 and DS80C323 + B. Torok / bela.torok@kssg.ch + + Version 1.0.3 (Nov 7, 2000) + SAB80517 definitions added by Michael Schmitt / michael.schmitt@t-online.de + Dallas AT89S53 definitions added by B. Torok / bela.torok@kssg.ch + Dallas DS87C520 and DS83C520 definitions added by B. Torok / bela.torok@kssg.ch + + Version 1.0.4 (Nov 9, 2000) + To simplify the identication of registers, a large number of definitios + were renamed. Long register names now (hopefully) clearly define the + function of the registers. + Dallas DS89C420 definitions added by B. Torok / bela.torok@kssg.ch + + Version 1.0.5 (Dec 15, 2000) + Definitions added: #ifdef MCS51REG_EXTERNAL_ROM + #ifdef MCS51REG_EXTERNAL_RAM + #ifndef MCS51REG_DISABLE_WARNINGS + + + Version 1.0.6 (March 10, 2001) + Support for the Dallas DS5000 & DS2250 + Support for the Dallas DS5001 & DS2251 + Support for the Dallas DS80C390 + microcontrollers - B. Torok / bela.torok@kssg.ch + + Version 1.0.7 (June 7, 2001) + #ifndef MCS51REG_DISABLE_WARNINGS removed + #ifdef MCS51REG_DISABLE_WARNINGS added - B. Torok / bela.torok@kssg.ch + Support for the Philips P80C552 added - Bernhard Held / Bernhard.Held@otelo-online.de + + Version 1.0.8 (Feb 28, 2002) + Dallas DS89C420 definitions corrected by B. Torok / bela.torok@kssg.ch + Revised by lanius@ewetel.net + + Version 1.0.9 (Sept 9, 2002) + Register declarations for the Atmel T89C51RD2 added by Johannes Hoelzl / johannes.hoelzl@gmx.de + + Version 1.0.10 (Sept 19, 2002) + Register declarations for the Philips P89C668 added by Eric Limpens / Eric@limpens.net + + Version 1.0.11 (Sept 19, 2004) + Dallas DS5000 MCON Register declarations corrected by Radek Zadera / a2i@swipnet.se + + Version 1.0.12 (March 2, 2005) + Infineon SAB80C509 Register declarations added Thomas Boje / thomas@boje.name + + Adding support for additional microcontrollers: + ----------------------------------------------- + + 1. Don't modify this file!!! + + 2. Insert your code in a separate file e.g.: mcs51reg_update.h and include + this after the #define HEADER_MCS51REG statement in this file + + 3. The mcs51reg_update.h file should contain following definitions: + + a. An entry with the inventory of the register set of the + microcontroller in the "Describe microcontrollers" section. + + b. If necessary add entry(s) for registers not defined in this file + + c. Define interrupt vectors + + 4. Compile a program for the microcontroller using the Preprocessor only, e.g.:, + sdcc -E test.c > t.txt + and check definitions for validity in the t.txt file. + + 5. If everithing seems to be OK send me the mcs51reg_update.h file. --> bela.torok@kssg.ch + I'm going to resolve conflicts & verify/merge new definitions to this file. + + + Microcontroller support: + + Use one of the following options: + + 1. use #include in your program & define MICROCONTROLLER_XXXX in your makefile. + + 2. use following definitions prior the + #include line in your program: + e.g.: + #define MICROCONTROLLER_8052 -> 8052 type microcontroller + or + #define MICROCONTROLLER_AT89CX051 -> Atmel AT89C1051, AT89C2051 and AT89C4051 microcontrollers + + + Use only one of the following definitions!!! + + Supported Microcontrollers: + + No definition 8051 + MICROCONTROLLER_8051 8051 + MICROCONTROLLER_8052 8052 + MICROCONTROLLER_AT89CX051 Atmel AT89C1051, AT89C2051 and AT89C4051 + MICROCONTROLLER_AT89S53 Atmel AT89S53 microcontroller + MICROCONTROLLER_AT89X52 Atmel AT89C52 and AT80LV52 microcontrollers + MICROCONTROLLER_AT89X55 Atmel AT89C55 and AT80LV55 microcontrollers + MICROCONTROLLER_DS5000 Dallas DS5000 & DS2250 microcontroller + MICROCONTROLLER_DS5001 Dallas DS5001 & DS2251 microcontroller + MICROCONTROLLER_DS80C32X Dallas DS80C320 and DS80C323 microcontrollers + MICROCONTROLLER_DS80C390 Dallas DS80C390 microcontroller + MICROCONTROLLER_DS89C420 Dallas DS89C420 microcontroller + MICROCONTROLLER_DS8XC520 Dallas DS87C520 and DS83C520 microcontrollers + MICROCONTROLLER_P80C552 Philips P80C552 + MICROCONTROLLER_P89C668 Philips P89C668 + MICROCONTROLLER_SAB80C509 Infineon / Siemens SAB80C509 + MICROCONTROLLER_SAB80515 Infineon / Siemens SAB80515 & SAB80535 + MICROCONTROLLER_SAB80515A Infineon / Siemens SAB80515A + MICROCONTROLLER_SAB80517 Infineon / Siemens SAB80517 + MICROCONTROLLER_T89C51RD2 Atmel T89C51RD2 + + Additional definitions (use them prior the #include mcs51reg.h statement): + + Ports P0 & P2 are not available if external ROM used. + Use statement "#define MCS51REG_EXTERNAL_ROM" to undefine P0 & P2. + + Ports P0, P2, P3_6, WR, P3_7 & RD are not available if external RAM is used. + Use statement "#define MCS51REG_EXTERNAL_RAM" to undefine P0, P2, + P3_6, WR, P3_7 & RD. + + #define MCS51REG_ENABLE_WARNINGS -> enable warnings + +-----------------------------------------------------------------------*/ + + +#ifndef HEADER_MCS51REG +#define HEADER_MCS51REG + +/////////////////////////////////////////////////////// +/// Insert header here (for developers only) /// +/// remove "//" from the begining of the next line /// +//#include "mcs51reg_update.h" /// +/////////////////////////////////////////////////////// + +////////////////////////////////// +/// Describe microcontrollers /// +/// (inventory of registers) /// +////////////////////////////////// + +// definitions for the 8051 +#ifdef MICROCONTROLLER_8051 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: 8051 +#endif +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__x__x__x__GF1__GF0__PD__IDL +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SBUF +#define P2 +#define IE__EA__x__x__ES__ET1__EX1__ET0__EX0 +#define P3 +#define IP__x__x__x__PS__PT1__PX1__PT0__PX0 +#define PSW +#define ACC +#define B +#endif +// end of definitions for the 8051 + + +// definitions for the 8052 microcontroller +#ifdef MICROCONTROLLER_8052 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: 8052 +#endif +// 8051 register set +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__x__x__x__GF1__GF0__PD__IDL +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SBUF +#define P2 +#define IE__EA__x__ET2__ES__ET1__EX1__ET0__EX0 +#define P3 +#define IP__x__x__PT2__PS__PT1__PX1__PT0__PX0 +#define PSW +#define ACC +#define B +// 8052 specific registers +#define T2CON__TF2__EXF2__RCLK__TCLK__EXEN2__TR2__C_T2__CP_RL2 +#define RCAP2L +#define RCAP2H +#define TL2 +#define TH2 +#endif +// end of definitions for the 8052 microcontroller + + +// definitionsons for the Atmel +// AT89C1051, AT89C2051 and AT89C4051 microcontrollers +#ifdef MICROCONTROLLER_AT89CX051 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: Atmel AT89Cx051 +#endif +// 8051 register set without P0 & P2 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__x__x__x__GF1__GF0__PD__IDL +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SBUF +#define IE__EA__x__x__ES__ET1__EX1__ET0__EX0 +#define P3 +#define IP__x__x__x__PS__PT1__PX1__PT0__PX0 +#define PSW +#define ACC +#define B +#endif +// end of definitionsons for the Atmel +// AT89C1051, AT89C2051 and AT89C4051 microcontrollers + + +// definitions for the Atmel AT89S53 +#ifdef MICROCONTROLLER_AT89S53 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: AT89S53 +#endif +// 8051 register set +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__x__x__x__GF1__GF0__PD__IDL +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SBUF +#define P2 +#define IE__EA__x__ET2__ES__ET1__EX1__ET0__EX0 +#define P3 +#define IP__x__x__PT2__PS__PT1__PX1__PT0__PX0 +#define PSW +#define ACC +#define B +// 8052 specific registers +#define T2CON__TF2__EXF2__RCLK__TCLK__EXEN2__TR2__C_T2__CP_RL2 +#define RCAP2L +#define RCAP2H +#define TL2 +#define TH2 +// AT89S53 specific register +#define T2MOD__x__x__x__x__x__x__T2OE__DCEN +#define P1_EXT__x__x__x__x__x__x__T2EX__T2 +#define SPCR +#define SPDR +#define SPSR +#define WCOM +#define DPL1 +#define DPH1 +#endif +// end of definitions for the Atmel AT89S53 microcontroller + + +// definitions for the Atmel AT89C52 and AT89LV52 microcontrollers +#ifdef MICROCONTROLLER_AT89X52 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: AT89C52 or AT89LV52 +#endif +// 8051 register set +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__x__x__x__GF1__GF0__PD__IDL +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SBUF +#define P2 +#define IE__EA__x__ET2__ES__ET1__EX1__ET0__EX0 +#define P3 +#define IP__x__x__PT2__PS__PT1__PX1__PT0__PX0 +#define PSW +#define ACC +#define B +// 8052 specific registers +#define T2CON__TF2__EXF2__RCLK__TCLK__EXEN2__TR2__C_T2__CP_RL2 +#define RCAP2L +#define RCAP2H +#define TL2 +#define TH2 +// AT89X55 specific register +#define T2MOD__x__x__x__x__x__x__T2OE__DCEN +#define P1_EXT__x__x__x__x__x__x__T2EX__T2 +#endif +// end of definitions for the Atmel AT89C52 and AT89LV52 microcontrollers + + +// definitions for the Atmel AT89C55 and AT89LV55 microcontrollers +#ifdef MICROCONTROLLER_AT89X55 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: AT89C55 or AT89LV55 +#endif +// 8051 register set +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__x__x__x__GF1__GF0__PD__IDL +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SBUF +#define P2 +#define IE__EA__x__ET2__ES__ET1__EX1__ET0__EX0 +#define P3 +#define IP__x__x__PT2__PS__PT1__PX1__PT0__PX0 +#define PSW +#define ACC +#define B +// 8052 specific registers +#define T2CON__TF2__EXF2__RCLK__TCLK__EXEN2__TR2__C_T2__CP_RL2 +#define RCAP2L +#define RCAP2H +#define TL2 +#define TH2 +// AT89X55 specific register +#define T2MOD__x__x__x__x__x__x__T2OE__DCEN +#define P1_EXT__x__x__x__x__x__x__T2EX__T2 +#endif +// end of definitions for the Atmel AT89C55 and AT89LV55 microcontrollers + + +// definitions for the Dallas DS5000 +#ifdef MICROCONTROLLER_DS5000 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: DS5000 +#endif +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__POR__PFW__WTR__EPFW__EWT__STOP__IDL +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SBUF +#define P2 +#define IE__EA__x__x__ES__ET1__EX1__ET0__EX0 +#define P3 +#define IP__RWT__x__x__PS__PT1__PX1__PT0__PX0 +#define MCON__PA3__PA2__PA1__PA0__RA32_8__ECE2__PAA__SL +#define TA +#define PSW +#define ACC +#define B +#endif +// end of definitions for the Dallas DS5000 + + +// definitions for the Dallas DS5001 +#ifdef MICROCONTROLLER_DS5001 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: DS5001 +#endif +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__POR__PFW__WTR__EPFW__EWT__STOP__IDL +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SBUF +#define P2 +#define IE__EA__x__x__ES__ET1__EX1__ET0__EX0 +#define P3 +#define IP__RWT__x__x__PS__PT1__PX1__PT0__PX0 +#define CRC +#define CRCLOW +#define CRCHIGH +#define MCON__PA3__PA2__PA1__PA0__RG1__PES__PM__SL +#define TA +#define RNR +#define PSW +#define RPCTL +#define STATUS__ST7__ST6__ST5__ST4__IA0__F0__IBF__OBF +#define ACC +#define B +#endif +// end of definitions for the Dallas DS5001 + + +// definitions for the Dallas DS80C320 and DS80C323 microcontrollers +#ifdef MICROCONTROLLER_DS80C32X +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: Dallas DS80C320 or DS80C323 +#endif +// 8051 register set +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__SMOD0__x__x__GF1__GF0__STOP__IDLE +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SCON0 +#define SBUF +#define P2 +#define IE__EA__ES1__ET2__ES__ET1__EX1__ET0__EX0 +#define P3 +#define IP__x__PS1__PT2__PS__PT1_PX1__PT0__PX0 +#define PSW +#define ACC +#define B +// 8052 specific registers +#define T2CON__TF2__EXF2__RCLK__TCLK__EXEN2__TR2__C_T2__CP_RL2 +#define RCAP2L +#define RCAP2H +#define TL2 +#define TH2 +// DS80C320 specific register +#define DPL1 +#define DPH1 +#define DPS__x__x__x__x__x__x__x__SEL +#define CKCON__WD1__WD0__T2M__T1M__TOM__MD2__MD1__MD0 +#define EXIF__IE5__IE4__IE3__IE2__x__RGMD__RGSL__BGS +#define SADDR0 +#define SADDR1 +#define SADEN0 +#define SADEN1 +#define SCON1 +#define SBUF1 +#define STATUS__PIP__HIP__LIP__x__x__x__x__x +#define TA +#define T2MOD__x__x__x__x__x__x__T2OE__DCEN +#define P1_EXT__INT5__INT4__INT3__INT2__TXD1__RXD1__T2EX__T2 +#define WDCON +#define EIE__x__x__x__EWDI__EX5__EX4__EX3__EX2 +#define EIP__x__x__x__PWDI__PX5__PX4__PX3__PX2 +#endif +// end of definitions for the Dallas DS80C320 and DS80C323 microcontrollers + + +// definitions for the Dallas DS80C390 +#ifdef MICROCONTROLLER_DS80C390 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: Dallas DS80C390 +#endif +// 8051 register set +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__SMOD0__OFDF__OFDE__GF1__GF0__STOP__IDLE +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SCON0 +#define SBUF +#define P2 +#define IE__EA__ES1__ET2__ES__ET1__EX1__ET0__EX0 +#define P3 +#define IP__x__PS1__PT2__PS__PT1_PX1__PT0__PX0 +#define PSW +#define ACC +#define B +// 8052 specific registers +#define T2CON__TF2__EXF2__RCLK__TCLK__EXEN2__TR2__C_T2__CP_RL2 +#define RCAP2L +#define RCAP2H +#define TL2 +#define TH2 +// DS80C390 specific register +#define P4_AT_0X80 +#define DPL1 +#define DPH1 +#define DPS__ID1__ID0__TSL__x__x__x__x__SEL +#define CKCON__WD1__WD0__T2M__T1M__TOM__MD2__MD1__MD0 +#define EXIF__IE5__IE4__IE3__IE2__CKRY__RGMD__RGSL__BGS +#define P4CNT +#define DPX +#define DPX1 +#define C0RMS0 +#define C0RMS1 +#define ESP +#define AP +#define ACON__x__x__x__x__x__SA__AM1__AM0 +#define C0TMA0 +#define C0TMA1 +#define P5_AT_0XA1 +#define P5CNT +#define C0C +#define C0S +#define C0IR +#define C0TE +#define C0RE +#define SADDR0 +#define SADDR1 +#define C0M1C +#define C0M2C +#define C0M3C +#define C0M4C +#define C0M5C +#define C0M6C +#define C0M7C +#define C0M8C +#define C0M9C +#define C0M10C +#define SADEN0 +#define SADEN1 +#define C0M11C +#define C0M12C +#define C0M13C +#define C0M14C +#define C0M15C +#define SCON1 +#define SBUF1 +#define PMR__CD1__CD0__SWB__CTM__4X_2X__ALEOFF__x__x +#define STATUS__PIP__HIP__LIP__x__SPTA1__SPRA1__SPTA0__SPRA0 +#define MCON__IDM1__IDM0__CMA__x__PDCE3__PDCE2__PDCE1__PDCE0 +#define TA +#define T2MOD__x__x__x__D13T1__D13T2__x__T2OE__DCEN +#define COR +#define MCNT0 +#define MCNT1 +#define MA +#define MB +#define MC +#define C1RSM0 +#define C1RSM1 +#define WDCON +#define C1TMA0 +#define C1TMA1 +#define C1C +#define C1S +#define C1IR +#define C1TE +#define C1RE +#define EIE__CANBIE__C0IE__C1IE__EWDI__EX5__EX4__EX3__EX2 +#define MXMAX +#define C1M1C +#define C1M2C +#define C1M3C +#define C1M4C +#define C1M5C +#define C1M6C +#define C1M7C +#define C1M8C +#define C1M9C +#define EIP__CANBIP__C0IP__C1IP__PWDI__PX5__PX4__PX3__PX2__PX1__PX0 +#define C1M10C +#define C1M11C +#define C1M12C +#define C1M13C +#define C1M14C +#define C1M15C +#define P1_EXT__INT5__INT4__INT3__INT2__TXD1__RXD1__T2EX__T2 +#endif +// end of definitions for the Dallas DS80C390 + +// definitions for the Dallas DS89C420 microcontroller +#ifdef MICROCONTROLLER_DS89C420 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: Dallas DS89C420 +#endif +// 8051 register set +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__SMOD0__OFDF__OFDE__GF1__GF0__STOP__IDLE +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SCON0 +#define SBUF +#define P2 +#define IE__EA__ES1__ET2__ES__ET1__EX1__ET0__EX0 +#define P3 +#define IP__x__PS1__PT2__PS__PT1_PX1__PT0__PX0 +#define PSW +#define ACC +#define B +// 8052 specific registers +#define T2CON__TF2__EXF2__RCLK__TCLK__EXEN2__TR2__C_T2__CP_RL2 +#define RCAP2L +#define RCAP2H +#define TL2 +#define TH2 +// DS8XC420 specific registers +#define ACON__PAGEE__PAGES1__PAGES0__x__x__x__x__x +#define DPL1 +#define DPH1 +#define DPS__ID1__ID0__TSL__AID__x__x__x__SEL +#define CKCON__WD1__WD0__T2M__T1M__TOM__MD2__MD1__MD0 +#define CKMOD +#define IP0__x__LPS1__LPT2__LPS0__LPT1__LPX1__LPT0__LPX0 +#define IP1__x__MPS1__MPT2__MPS0__MPT1__MPX1__MPT0__MPX0 +#define EXIF__IE5__IE4__IE3__IE2__CKRY__RGMD__RGSL__BGS +#define PMR__CD1__CD0__SWB__CTM__4X_2X__ALEON__DME1__DME0 +#define SADDR0 +#define SADDR1 +#define SADEN0 +#define SADEN1 +#define SCON1 +#define SBUF1 +#define STATUS__PIS2__PIS1__PIS0__x__SPTA1__SPRA1__SPTA0__SPRA0 +#define TA +#define T2MOD__x__x__x__x__x__x__T2OE__DCEN +#define P1_EXT__INT5__INT4__INT3__INT2__TXD1__RXD1__T2EX__T2 +#define ROMSIZE__x__x__x__x__PRAME__RMS2__RMS1__RMS0 +#define WDCON +#define EIE__x__x__x__EWDI__EX5__EX4__EX3__EX2 +#define EIP0__x__x__x__LPWDI__LPX5__LPX4__LPX3__LPX2 +#define EIP1__x__x__x__MPWDI__MPX5__MPX4__MPX3__MPX2 +#define FCNTL__FBUSY__FERR__x__x__FC3__FC2__FC1__FC0 +#endif +// end of definitions for the Dallas DS89C420 microcontroller + +// definitions for the Dallas DS87C520 and DS83C520 microcontrollers +#ifdef MICROCONTROLLER_DS8XC520 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: Dallas DS87C520 or DS85C520 +#endif +// 8051 register set +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__SMOD0__x__x__GF1__GF0__STOP__IDLE +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SCON0 +#define SBUF +#define P2 +#define IE__EA__ES1__ET2__ES__ET1__EX1__ET0__EX0 +#define P3 +#define IP__x__PS1__PT2__PS__PT1_PX1__PT0__PX0 +#define PSW +#define ACC +#define B +// 8052 specific registers +#define T2CON__TF2__EXF2__RCLK__TCLK__EXEN2__TR2__C_T2__CP_RL2 +#define RCAP2L +#define RCAP2H +#define TL2 +#define TH2 +// DS8XC520 specific registers +#define DPL1 +#define DPH1 +#define DPS__x__x__x__x__x__x__x__SEL +#define CKCON__WD1__WD0__T2M__T1M__TOM__MD2__MD1__MD0 +#define EXIF__IE5__IE4__IE3__IE2__XT_RG__RGMD__RGSL__BGS +#define PMR__CD1__CD0__SWB__x__XTOFF__ALEOFF__DME1__DME0 +#define SADDR0 +#define SADDR1 +#define SADEN0 +#define SADEN1 +#define SCON1 +#define SBUF1 +#define STATUS__PIP__HIP__LIP__XTUP__SPTA2__SPTA1__SPTA0__SPRA0 +#define TA +#define T2MOD__x__x__x__x__x__x__T2OE__DCEN +#define P1_EXT__INT5__INT4__INT3__INT2__TXD1__RXD1__T2EX__T2 +#define WDCON +#define ROMSIZE__x__x__x__x__x__RMS2__RMS1__RMS0 +#define BP2 +#define WDCON +#define EIE__x__x__x__EWDI__EX5__EX4__EX3__EX2 +#define EIP__x__x__x__PWDI__PX5__PX4__PX3__PX2 +#endif +// end of definitions for the Dallas DS87C520 and DS83C520 microcontrollers + + +// definitions for the Philips P80C552 microcontroller +#ifdef MICROCONTROLLER_P80C552 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: Philips P80C552 +#endif +// 8051 register set +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__x__x__WLE__GF1__GF0__PD__IDL +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SBUF +#define P2 +#define IE__EA__EAD__ES1__ES0__ET1__EX1__ET0__EX0 +#define P3 +#define IP__x__PAD__PS1__PS0__PT1__PX1__PT0__PX0 +#define PSW +#define ACC +#define B +// P80C552 specific register-names +#define S0BUF // same as SBUF, set in mcs51reg.h +#define S0CON__SM0__SM1__SM2__REN__TB8__RB8__TI__RI +// P80C552 specific registers +#define ADCH_AT_0XC6 +#define ADCON__ADC_1__ADC_0__ADEX__ADCI__ADCS__AADR2__AADR1__AADR0 +#define CTCON__CTN3__CTP3__CTN2__CTP2__CTN1__CTP1__CTN0__CTP0 +#define CTH0_AT_0XCC +#define CTH1_AT_0XCD +#define CTH2_AT_0XCE +#define CTH3_AT_0XCF +#define CMH0_AT_0XC9 +#define CMH1_AT_0XCA +#define CMH2_AT_0XCB +#define CTL0_AT_0XAC +#define CTL1_AT_0XAD +#define CTL2_AT_0XAE +#define CTL3_AT_0XAF +#define CML0_AT_0XA9 +#define CML1_AT_0XAA +#define CML2_AT_0XAB +#define IEN1__ET2__ECM2__ECM1__ECM0__ECT3__ECT2__ECT1__ECT0 +#define IP1__PT2__PCM2__PCM1__PCM0__PCT3__PCT2__PCT1__PCT0 +#define PWM0_AT_0XFC +#define PWM1_AT_0XFD +#define PWMP_AT_0XFE +#define P1_EXT__SDA__SCL__RT2__T2__CT3I__CT2I__CT1I__CT0I +#define P4_AT_0XC0__CMT0__CMT1__CMSR5__CMSR4__CMSR3__CMSR2__CMSR1__CMSR0 +#define P5_AT_0XC4 +#define RTE__TP47__TP46__RP45__RP44__RP43__RP42__RP41__RP40 +#define S1ADR__x__x__x__x__x__x__x__GC +#define S1DAT_AT_0XDA +#define S1STA__SC4__SC3__SC2__SC1__SC0__x__x__x +#define S1CON__CR2__ENS1__STA__ST0__SI__AA__CR1__CR0 +#define STE__TG47__TG46__SP45__SP44__SP43__SP42__SP41__SP40 +#define TMH2_AT_0XED +#define TML2_AT_0XEC +#define TM2CON__T2IS1__T2IS0__T2ER__T2B0__T2P1__T2P0__T2MS1__T2MS0 +#define TM2IR__T20V__CMI2__CMI1__CMI0__CTI3__CTI2__CTI1__CTI0 +#define T3_AT_0XFF +#endif +// end of definitions for the Philips P80C552 microcontroller + + +// definitions for the Philips P89C668 +#ifdef MICROCONTROLLER_P89C668 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: P89C668 +#endif +#define P0 +#define P0_EXT__AD7__AD6__AD5__AD4__AD3__AD2__AD1__AD0 +#define P1 +#define P1_EXT__SDA__SCL__CEX2__CEX1__CEX0__ECI__T2EX__T2 +#define P2 +#define P2_EXT__AD15__AD14__AD13__AD12__AD11__AD10__AD9__AD8 +#define P3 +#define P3_EXT__x__x__CEX4__CEX3__x__x__x__x +#define SP +#define DPL +#define DPH +#define TCON +#define TMOD +#define PCON__SMOD1__SMOD0__x__POF__GF1__GF0__PD__IDL +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define SCON +#define S0CON__SM0__SM1__SM2__REN__TB8__RB8__TI__RI +#define S1CON__CR2__ENS1__STA__ST0__SI__AA__CR1__CR0 +#define SBUF +#define S0BUF SBUF +#define PSW +#define ACC +#define B +#define SADR_AT_0XA9 +#define SADEN_AT_0XB9 +#define S1IST_AT_0XDC +#define S1STA__SC4__SC3__SC2__SC1__SC0__x__x__x +#define S1DAT_AT_0XDA +#define S1ADR__x__x__x__x__x__x__x__GC +#define SBUF +#define T2CON__TF2__EXF2__RCLK__TCLK__EXEN2__TR2__C_T2__CP_RL2 +#define T2MOD__x__x__x__x__x__x__T2OE__DCEN +#define RCAP2L +#define RCAP2H +#define TL2 +#define TH2 +#define IEN0__EA__EC__ES1__ES0__ET1__EX1__ET0__EX0 +#define IEN1__x__x__x__x__x__x__x__ET2 +#define IP__PT2__PPC__PS1__PS0__PT1__PX1__PT0__PX0 +#define IPH__PT2H__PPCH__PS1H__PS0H__PT1H__PX1H__PT0H__PX0H +#define CCON__CF__CR__x__CCF4__CCF3__CCF2__CCF1__CCF0 +#define CMOD__CIDL__WDTE__x__x__x__CPS1__CPS0__ECF +#define AUXR__x__x__x__x__x__x__EXTRAM__A0 +#define AUXR1__x__x__ENBOOT__x__GF2__0__x__DPS +#define WDTRST_AT_0XA6 +#define CCAPM0_AT_0XC2 +#define CCAPM1_AT_0XC3 +#define CCAPM2_AT_0XC4 +#define CCAPM3_AT_0XC5 +#define CCAPM4_AT_0XC6 +#define CCAP0L_AT_0XEA +#define CCAP1L_AT_0XEB +#define CCAP2L_AT_0XEC +#define CCAP3L_AT_0XED +#define CCAP4L_AT_0XEE +#define CH_AT_0XF9 +#define CL_AT_0XE9 +#define CCAP0H_AT_0XFA +#define CCAP1H_AT_0XFB +#define CCAP2H_AT_0XFC +#define CCAP3H_AT_0XFD +#define CCAP4H_AT_0XFE +#endif +// end of definitions for the Philips P89C668 + + +// definitions for the Infineon / Siemens SAB80509 +#ifdef MICROCONTROLLER_SAB80509 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: Infineon / Siemens SAB80509 +#endif +// 8051 register set without IP +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__PDS__IDLS__x__x__x__PD__IDL +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define WDTREL +#define P1 +#define XPAGE +#define S0CON__SM0__SM1__SM20__REN0__TB80__RB80__TI0__RI0 +#define IEN2__SAB80517 + +#define P2 +#define IE__EA_WDT_ET2_ES_ET1_EX1_ET0_EX0 +#define IP0__x__WDTS__IP0_5__IP0_4__IP0_3__IP0_2__IP0_1__IP0_0 + +#define P3 +#define SYSCON +#define IEN1__EXEN2__SWDT__EX6__EX5__EX4__EX3__EX2__EADC +#define IP1__x__x__IP1_5__IP1_4__IP1_3__IP1_2__IP1_1__IP1_0 + +#define IRCON +#define CCEN +#define CCL1 +#define CCH1 +#define CCL2 +#define CCH2 +#define CCL3 +#define CCH3 +#define CCL4 +#define CCH4 +#define CC4EN +#define S0RELH +#define S0RELL +#define S1BUF +#define S1CON_AT_0X9B +#define S1RELH +#define S1RELL +#define T2CON__T2PS__I3FR__I2FR__T2R1__T2R0__T2CM__T2I1__T2I0 + +#define PSW +#define CMEN +#define CMH0 +#define CML0 +#define CMH1 +#define CML1 +#define CMH2 +#define CML2 +#define CMH3 +#define CML3 +#define CMH4 +#define CML4 +#define CMH5 +#define CML5 +#define CMH6 +#define CML6 +#define CMH7 +#define CML7 +#define CMSEL +#define CRCL +#define CRCH +#define CTCOM_AT_0XE1 +#define CTRELH +#define CTRELL +#define TL2 +#define TH2 +#define ADCON0 +#define ADCON1 +#define ADDATH +#define ADDATL + +#define P4_AT_0XE8 +#define DPSEL +#define ARCON +#define MD0 +#define MD1 +#define MD2 +#define MD3 +#define MD4 +#define MD5 +#define S0BUF + +#define ACC + +#define B + +#define P5_AT_0XF8 +#define P6_AT_0XFA +#define P7 +#define P8 + +#define COMSETL +#define COMSETH +#define COMCLRL +#define COMCLRH +#define SETMSK +#define CLRMSK +#define SYSCON1 +#define FMODE +#define PRSC +#define CT1COM +#define IEN3 +#define IRCON2 +#define EICC1 +#define CC1 +#define CC2 +#define CC3 +#define CC4 +#define CCR +#define T2 +#define P9_AT_0XF9 +#endif +// end of definitions for the Infineon / Siemens SAB80509 + + +// definitions for the Infineon / Siemens SAB80515 & SAB80535 +#ifdef MICROCONTROLLER_SAB80515 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: Infineon / Siemens SAB80515 & SAB80535 +#endif +// 8051 register set without IP +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__x__x__x__x__x__x__x +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SBUF +#define P2 +#define IE__EA_WDT_ET2_ES_ET1_EX1_ET0_EX0 +#define P3 +#define PSW +#define ACC +#define B +// SAB80515 specific registers +#define P1_EXT__T2__CLKOUT__T2EX__INT2__INT6_CC3__INT5_CC2__INT4_CC1__INT3_CC0 +#define IP0__x__WDTS__IP0_5__IP0_4__IP0_3__IP0_2__IP0_1__IP0_0 +#define IEN1__EXEN2__SWDT__EX6__EX5__EX4__EX3__EX2__EADC +#define IRCON +#define CCEN +#define CCL1 +#define CCH1 +#define CCL2 +#define CCH2 +#define CCL3 +#define CCH3 +#define T2CON__T2PS__I3FR__I2FR__T2R1__T2R0__T2CM__T2I1__T2I0 +#define CRCL +#define CRCH +#define TL2 +#define TH2 +#define ADCON +#define ADDAT +#define DAPR__SAB80515 +#define P4_AT_0XE8 +#define P5_AT_0XF8 +#define P6_AT_0XDB +#endif +// end of definitions for the Infineon / Siemens SAB80515 + + +// definitions for the Infineon / Siemens SAB80515A +#ifdef MICROCONTROLLER_SAB80515A +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: Infineon / Siemens SAB80515A +#endif +// 8051 register set without IP +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__PDS__IDLS__x__x__x__PD__IDL +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SBUF +#define P2 +#define IE__EA_WDT_ET2_ES_ET1_EX1_ET0_EX0 +#define P3 +#define PSW +#define ACC +#define B +// SAB80515A specific registers +#define P1_EXT__T2__CLKOUT__T2EX__INT2__INT6_CC3__INT5_CC2__INT4_CC1__INT3_CC0 +#define IP0__x__WDTS__IP0_5__IP0_4__IP0_3__IP0_2__IP0_1__IP0_0 +#define IP1__x__x__IP1_5__IP1_4__IP1_3__IP1_2__IP1_1__IP1_0 +#define IEN1__EXEN2__SWDT__EX6__EX5__EX4__EX3__EX2__EADC +#define IRCON +#define CCEN +#define CCL1 +#define CCH1 +#define CCL2 +#define CCH2 +#define CCL3 +#define CCH3 +#define T2CON__T2PS__I3FR__I2FR__T2R1__T2R0__T2CM__T2I1__T2I0 +#define CRCL +#define CRCH +#define TL2 +#define TH2 +#define ADCON0 +#define ADDATH +#define ADDATL +#define ADCON1 +#define SRELL +#define SYSCON +#define SRELH +#define P4_AT_0XE8 +#define P5_AT_0XF8 +#define P6_AT_0XDB +#define XPAGE +#endif +// end of definitions for the Infineon / Siemens SAB80515A + + +// definitions for the Infineon / Siemens SAB80517 +#ifdef MICROCONTROLLER_SAB80517 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: Infineon / Siemens SAB80517 +#endif +// 8051 register set without IP, SCON & SBUF +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__PDS__IDLS__x__x__x__PD__IDL +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +// #define SCON +// #define SBUF +#define P2 +#define IE__EA_WDT_ET2_ES_ET1_EX1_ET0_EX0 +#define P3 +#define PSW +#define ACC +#define B +// SAB80517 specific registers +#define P1_EXT__T2__CLKOUT__T2EX__INT2__INT6_CC3__INT5_CC2__INT4_CC1__INT3_CC0 +#define IP0__x__WDTS__IP0_5__IP0_4__IP0_3__IP0_2__IP0_1__IP0_0 +#define IP1__x__x__IP1_5__IP1_4__IP1_3__IP1_2__IP1_1__IP1_0 +#define IEN1__EXEN2__SWDT__EX6__EX5__EX4__EX3__EX2__EADC +#define IEN2__SAB80517 +#define IRCON +#define CCEN +#define CCL1 +#define CCH1 +#define CCL2 +#define CCH2 +#define CCL3 +#define CCH3 +#define CCL4 +#define CCH4 +#define CC4EN +#define CMEN +#define CMH0 +#define CML0 +#define CMH1 +#define CML1 +#define CMH2 +#define CML2 +#define CMH3 +#define CML3 +#define CMH4 +#define CML4 +#define CMH5 +#define CML5 +#define CMH6 +#define CML6 +#define CMH7 +#define CML7 +#define CMSEL +#define T2CON__T2PS__I3FR__I2FR__T2R1__T2R0__T2CM__T2I1__T2I0 +#define CRCL +#define CRCH +#define CTCOM_AT_0XE1 +#define CTRELH +#define CTRELL +#define TL2 +#define TH2 +#define ADCON0 +#define ADCON1 +#define ADDAT +#define DAPR__SAB80517 +#define P4_AT_0XE8 +#define P5_AT_0XF8 +#define P6_AT_0XFA +#define P7_AT_0XDB +#define P8_AT_0XDD +#define DPSEL +#define ARCON +#define MD0 +#define MD1 +#define MD2 +#define MD3 +#define MD4 +#define MD5 +#define S0BUF +#define S0CON__SM0__SM1__SM20__REN0__TB80__RB80__TI0__RI0 +#define S0RELH +#define S0RELL +#define S1BUF +#define S1CON_AT_0X9B +#define S1RELH +#define S1RELL +#define WDTH +#define WDTL +#define WDTREL +#endif +// end of definitions for the Infineon / Siemens SAB80517 + + +// definitions for the Atmel T89C51RD2 +#ifdef MICROCONTROLLER_T89C51RD2 +#ifdef MICROCONTROLLER_DEFINED +#define MCS51REG_ERROR +#endif +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#endif +#ifdef MCS51REG_ENABLE_WARNINGS +#warning Selected HW: T89C51RD2 +#endif + +// 8051 register set +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD1__SMOD0__x__POF__GF1__GF0__PD__IDL +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SBUF +#define P2 +#define IE__EA__EC__ET2__ES__ET1__EX1__ET0__EX0 +#define SADDR +#define P3 +#define IP__x__PPC__PT2__PS__PT1__PX1__PT0__PX0 +#define PSW +#define ACC +#define B + +// 8052 register set +#define T2CON__TF2__EXF2__RCLK__TCLK__EXEN2__TR2__C_T2__CP_RL2 +#define RCAP2L +#define RCAP2H +#define TL2 +#define TH2 + +// T89C51RD2 register set +#define P4_AT_0XC0__P4_7__P4_6__P4_5__P4_3__P4_2__P4_1__P4_0 +#define P5_AT_0XE8 +#define SADEN0 + +#define AUXR1__x__x__x__x__GF3__x__x__DPS +#define WDTRST_AT_0XA6 +#define WDTPRG_AT_0XA7 +#define AUXR__x__x__M0__x__XRS1__XRS0__EXTRAM__A0 +#define IPH__x__PPCH__PT2H__PSH__PT1H__PX1H__PT0H__PX0H +#define FCON +#define EECON +#define EETIM +#define CKCON__X2__T0X2__T1X2__T2X2__SiX2__PcaX2__WdX2__x +#define CCON__0xD8__CF__CR__x__CCF4__CCF3__CCF2__CCF1__CCF0 +#define CMOD__0xD9__CIDL__WDTE__x__x__x__CPS1__CPS0__ECF +#define CCAPM0_AT_0XDA +#define CCAPM1_AT_0XDB +#define CCAPM2_AT_0XDC +#define CCAPM3_AT_0XDD +#define CCAPM4_AT_0XDE +#define CL_AT_0XE9 +#define CCAP0L_AT_0XEA +#define CCAP1L_AT_0XEB +#define CCAP2L_AT_0XEC +#define CCAP3L_AT_0XED +#define CCAP4L_AT_0XEE +#define CH_AT_0XF9 +#define CCAP0H_AT_0XFA +#define CCAP1H_AT_0XFB +#define CCAP2H_AT_0XFC +#define CCAP3H_AT_0XFD +#define CCAP4H_AT_0XFE +#endif /* MICROCONTROLLER_T89C51RD2 */ +/* end of definition for the Atmel T89C51RD2 */ + + +///////////////////////////////////////////////////////// +/// don't specify microcontrollers below this line! /// +///////////////////////////////////////////////////////// + + +// default microcontroller -> 8051 +// use default if no microcontroller specified +#ifndef MICROCONTROLLER_DEFINED +#define MICROCONTROLLER_DEFINED +#ifdef MCS51REG_ENABLE_WARNINGS +#warning No microcontroller defined! +#warning Code generated for the 8051 +#endif +// 8051 register set +#define P0 +#define SP +#define DPL +#define DPH +#define PCON__SMOD__x__x__x__GF1__GF0__PD__IDL +#define TCON +#define TMOD +#define TL0 +#define TL1 +#define TH0 +#define TH1 +#define P1 +#define SCON +#define SBUF +#define P2 +#define IE__EA__x__x__ES__ET1__EX1__ET0__EX0 +#define P3 +#define IP__x__x__x__PS__PT1__PX1__PT0__PX0 +#define PSW +#define ACC +#define B +#endif +// end of definitions for the default microcontroller + + +#ifdef MCS51REG_ERROR +#error Two or more microcontrollers defined! +#endif + +#ifdef MCS51REG_EXTERNAL_ROM +#ifndef MCS51REG_UNDEFINE_P0 +#define MCS51REG_UNDEFINE_P0 +#endif +#ifndef MCS51REG_UNDEFINE_P2 +#define MCS51REG_UNDEFINE_P2 +#endif +#endif + +#ifdef MCS51REG_EXTERNAL_RAM +#ifndef MCS51REG_UNDEFINE_P0 +#define MCS51REG_UNDEFINE_P0 +#endif +#ifndef MCS51REG_UNDEFINE_P2 +#define MCS51REG_UNDEFINE_P2 +#endif +#endif + +#ifdef MCS51REG_UNDEFINE_P0 +#undef P0 +#endif + +#ifdef MCS51REG_UNDEFINE_P2 +#undef P2 +#endif + +//////////////////////////////// +/// Register definitions /// +/// (In alphabetical order) /// +//////////////////////////////// + +#ifdef ACC +#undef ACC +sfr at 0xE0 ACC ; +#endif + +#ifdef ACON__PAGEE__PAGES1__PAGES0__x__x__x__x__x +#undef ACON__PAGEE__PAGES1__PAGES0__x__x__x__x__x +sfr at 0x9D ACON ; // DS89C420 specific +// Not directly accessible bits +#define PAGES0 0x20 +#define PAGES1 0x40 +#define PAGEE 0x80 +#endif + +#ifdef ACON__x__x__x__x__x__SA__AM1__AM0 +#undef ACON__x__x__x__x__x__SA__AM1__AM0 +sfr at 0x9D ACON ; // DS89C390 specific +// Not directly accessible bits +#define AM0 0x01 +#define AM1 0x02 +#define SA 0x04 +#endif + +#ifdef ADCH_AT_0XC6 +#undef ADCH_AT_0XC6 +sfr at 0xC6 ADCH ; // A/D converter high +#endif + +#ifdef ADCON +#undef ADCON +sfr at 0xD8 ADCON ; // A/D-converter control register SAB80515 specific +// Bit registers +sbit at 0xD8 MX0 ; +sbit at 0xD9 MX1 ; +sbit at 0xDA MX2 ; +sbit at 0xDB ADM ; +sbit at 0xDC BSY ; +sbit at 0xDE CLK ; +sbit at 0xDF BD ; +#endif + +// ADCON0 ... Infineon / Siemens also called this register ADCON in the User Manual +#ifdef ADCON0 +#undef ADCON0 +sfr at 0xD8 ADCON0 ; // A/D-converter control register 0 SAB80515A & +// Bit registers // SAB80517 specific +sbit at 0xD8 MX0 ; +sbit at 0xD9 MX1 ; +sbit at 0xDA MX2 ; +sbit at 0xDB ADM ; +sbit at 0xDC BSY ; +sbit at 0xDD ADEX ; +sbit at 0xDE CLK ; +sbit at 0xDF BD ; +// Not directly accessible ADCON0 +#define ADCON0_MX0 0x01 +#define ADCON0_MX1 0x02 +#define ADCON0_MX2 0x04 +#define ADCON0_ADM 0x08 +#define ADCON0_BSY 0x10 +#define ADCON0_ADEX 0x20 +#define ADCON0_CLK 0x40 +#define ADCON0_BD 0x80 +#endif + +#ifdef ADCON1 +#undef ADCON1 +sfr at 0xDC ADCON1 ; // A/D-converter control register 1 SAB80515A & SAB80517 specific +// Not directly accessible ADCON1 +#define ADCON1_MX0 0x01 +#define ADCON1_MX1 0x02 +#define ADCON1_MX2 0x04 +#define ADCON1_ADCL 0x80 +#endif + +#ifdef ADCON__ADC_1__ADC_0__ADEX__ADCI__ADCS__AADR2__AADR1__AADR0 +#undef ADCON__ADC_1__ADC_0__ADEX__ADCI__ADCS__AADR2__AADR1__AADR0 +sfr at 0xC5 ADCON ; // A/D control, P80C552 specific +// Not directly accessible Bits. +#define AADR0 0x01 +#define AADR1 0x02 +#define AADR2 0x04 +#define ADCS 0x08 +#define ADCI 0x10 +#define ADEX 0x20 +#define ADC_0 0x40 // different name as ADC0 in P5 +#define ADC_1 0x80 // different name as ADC1 in P5 +#endif + +#ifdef ADDAT +#undef ADDAT +sfr at 0xD9 ADDAT ; // A/D-converter data register SAB80515 specific +#endif + +#ifdef ADDATH +#undef ADDATH +sfr at 0xD9 ADDATH ; // A/D data high byte SAB80515A specific +#endif + +#ifdef ADDATL +#undef ADDATL +sfr at 0xDA ADDATL ; // A/D data low byte SAB80515A specific +#endif + +#ifdef ARCON +#undef ARCON +sfr at 0xEF ARCON ; // arithmetic control register SAB80517 +#endif + +#ifdef AP +#undef AP +sfr at 0x9C AP ; // DS80C390 +#endif + +#ifdef AUXR__x__x__x__x__x__x__EXTRAM__A0 +#undef AUXR__x__x__x__x__x__x__EXTRAM__A0 +// P89C668 specific, Auxilary +sfr at 0x8E AUXR ; +// not bit addressable: +#define EXTRAM 0x02 +#define A0 0x01 +#endif + +#ifdef AUXR__x__x__M0__x__XRS1__XRS0__EXTRAM__A0 +#undef AUXR__x__x__M0__x__XRS1__XRS0__EXTRAM__A0 +sfr at 0x8E AUXR ; +#define AO 0x01 +#define EXTRAM 0x02 +#define XRS0 0x04 +#define XRS1 0x08 +#define M0 0x20 +#endif +#ifdef B +#undef B +sfr at 0xF0 B ; +// Bit registers +sbit at 0xF0 BREG_F0 ; +sbit at 0xF1 BREG_F1 ; +sbit at 0xF2 BREG_F2 ; +sbit at 0xF3 BREG_F3 ; +sbit at 0xF4 BREG_F4 ; +sbit at 0xF5 BREG_F5 ; +sbit at 0xF6 BREG_F6 ; +sbit at 0xF7 BREG_F7 ; +#endif + +#ifdef AUXR1__x__x__x__x__GF3__x__x__DPS +#undef AUXR1__x__x__x__x__GF3__x__x__DPS +sfr at 0xA2 AUXR1 ; +#define DPS 0x01 +#define GF3 0x08 +#endif + +#ifdef AUXR1__x__x__ENBOOT__x__GF2__0__x__DPS +#undef AUXR1__x__x__ENBOOT__x__GF2__0__x__DPS +// P89C668 specific, Auxilary 1 +sfr at 0xA2 AUXR1 ; +#define ENBOOT 0x20 +#define GF2 0x08 +#define ALWAYS_ZERO 0x04 +#define DPS 0x01 +#endif + +#ifdef BP2 +#undef BP2 +sfr at 0xC3 BP2 ; +// Not directly accessible bits +#define MS0 0x01 +#define MS1 0x02 +#define MS2 0x04 +#define LB1 0x08 +#define LB2 0x10 +#define LB3 0x20 +#endif + +#ifdef C0C +#undef C0C +sfr at 0xA3 C0C ; // DS80C390 specific +// Not directly accessible bits +#define SWINT 0x01 +#define ERCS 0x02 +#define AUTOB 0x04 +#define CRST 0x08 +#define SIESTA 0x10 +#define PDE 0x20 +#define STIE 0x40 +#define ERIE 0x80 +#endif + +#ifdef C0IR +#undef C0IR +sfr at 0xA5 C0IR ; // DS80C390 specific +// Not directly accessible bits +#define INTIN0 0x01 +#define INTIN1 0x02 +#define INTIN2 0x04 +#define INTIN3 0x08 +#define INTIN4 0x10 +#define INTIN5 0x20 +#define INTIN6 0x40 +#define INTIN7 0x80 +#endif + +#ifdef C0M1C +#undef C0M1C +sfr at 0xAB C0M1C ; // DS80C390 specific +// Not directly accessible bits +#define DTUP 0x01 +#define ROW_TIH 0x02 +#define MTRQ 0x04 +#define EXTRQ 0x08 +#define INTRQ 0x10 +#define ERI 0x20 +#define ETI 0x40 +#define MSRDY 0x80 +#endif + +#ifdef C0M2C +#undef C0M2C +sfr at 0xAC C0M2C ; // DS80C390 specific +#endif + +#ifdef C0M3C +#undef C0M3C +sfr at 0xAD C0M3C ; // DS80C390 specific +#endif + +#ifdef C0M4C +#undef C0M4C +sfr at 0xAE C0M4C ; // DS80C390 specific +#endif + +#ifdef C0M5C +#undef C0M5C +sfr at 0xAF C0M5C ; // DS80C390 specific +#endif + +#ifdef C0M6C +#undef C0M6C +sfr at 0xB3 C0M6C ; // DS80C390 specific +#endif + +#ifdef C0M7C +#undef C0M7C +sfr at 0xB4 C0M7C ; // DS80C390 specific +#endif + +#ifdef C0M8C +#undef C0M8C +sfr at 0xB5 C0M8C ; // DS80C390 specific +#endif + +#ifdef C0M9C +#undef C0M9C +sfr at 0xB6 C0M9C ; // DS80C390 specific +#endif + +#ifdef C0M10C +#undef C0M10C +sfr at 0xB7 C0M10C ; // DS80C390 specific +#endif + +#ifdef C0M11C +#undef C0M11C +sfr at 0xBB C0M11C ; // DS80C390 specific +#endif + +#ifdef C0M12C +#undef C0M12C +sfr at 0xBC C0M12C ; // DS80C390 specific +#endif + +#ifdef C0M13C +#undef C0M13C +sfr at 0xBD C0M13C ; // DS80C390 specific +#endif + +#ifdef C0M14C +#undef C0M14C +sfr at 0xBE C0M14C ; // DS80C390 specific +#endif + +#ifdef C0M15C +#undef C0M15C +sfr at 0xBF C0M15C ; // DS80C390 specific +#endif + +#ifdef C0RE +#undef C0RE +sfr at 0xA7 C0RE ; // DS80C390 specific +#endif + +#ifdef C0RMS0 +#undef C0RMS0 +sfr at 0x96 C0RMS0 ; // DS80C390 specific +#endif + +#ifdef C0RMS1 +#undef C0RMS1 +sfr at 0x97 C0RMS1 ; // DS80C390 specific +#endif + +#ifdef C0S +#undef C0S +sfr at 0xA4 C0S ; // DS80C390 specific +// Not directly accessible bits +#define ER0 0x01 +#define ER1 0x02 +#define ER2 0x04 +#define TXS 0x08 +#define RXS 0x10 +#define WKS 0x20 +#define EC96_128 0x40 +#define BSS 0x80 +#endif + +#ifdef C0TE +#undef C0TE +sfr at 0xA6 C0TE ; // DS80C390 specific +#endif + +#ifdef C0TMA0 +#undef C0TMA0 +sfr at 0x9E C0TMA0 ; // DS80C390 specific +#endif + +#ifdef C0TMA1 +#undef C0TMA1 +sfr at 0x9F C0TMA1 ; // DS80C390 specific +#endif + +#ifdef C1C +#undef C1C +sfr at 0xE3 C1C ; // DS80C390 specific +// Not directly accessible bits +#define SWINT 0x01 +#define ERCS 0x02 +#define AUTOB 0x04 +#define CRST 0x08 +#define SIESTA 0x10 +#define PDE 0x20 +#define STIE 0x40 +#define ERIE 0x80 +#endif + +#ifdef C1IR +#undef C1IR +sfr at 0xE5 C1IR ; // DS80C390 specific +// Not directly accessible bits +#define INTIN0 0x01 +#define INTIN1 0x02 +#define INTIN2 0x04 +#define INTIN3 0x08 +#define INTIN4 0x10 +#define INTIN5 0x20 +#define INTIN6 0x40 +#define INTIN7 0x80 +#endif + +#ifdef C1IRE +#undef C1IRE +sfr at 0xE7 C1RE ; // DS80C390 specific +#endif + +#ifdef C1M1C +#undef C1M1C +sfr at 0xEB C1M1C ; // DS80C390 specific +#endif + +#ifdef C1M2C +#undef C1M2C +sfr at 0xEC C1M2C ; // DS80C390 specific +#endif + +#ifdef C1M3C +#undef C1M3C +sfr at 0xED C1M3C ; // DS80C390 specific +#endif + +#ifdef C1M4C +#undef C1M4C +sfr at 0xEE C1M4C ; // DS80C390 specific +#endif + +#ifdef C1M5C +#undef C1M5C +sfr at 0xEF C1M5C ; // DS80C390 specific +#endif + +#ifdef C1M6C +#undef C1M6C +sfr at 0xF3 C1M6C ; // DS80C390 specific +#endif + +#ifdef C1M7C +#undef C1M7C +sfr at 0xF4 C1M7C ; // DS80C390 specific +#endif + +#ifdef C1M8C +#undef C1M8C +sfr at 0xF5 C1M8C ; // DS80C390 specific +#endif + +#ifdef C1M9C +#undef C1M9C +sfr at 0xF6 C1M9C ; // DS80C390 specific +#endif + +#ifdef C1M10C +#undef C1M10C +sfr at 0xF7 C1M10C ; // DS80C390 specific +#endif + +#ifdef C1M11C +#undef C1M11C +sfr at 0xFB C1M11C ; // DS80C390 specific +#endif + +#ifdef C1M12C +#undef C1M12C +sfr at 0xFC C1M12C ; // DS80C390 specific +#endif + +#ifdef C1M13C +#undef C1M13C +sfr at 0xFD C1M13C ; // DS80C390 specific +#endif + +#ifdef C1M14C +#undef C1M14C +sfr at 0xFE C1M14C ; // DS80C390 specific +#endif + +#ifdef C1M15C +#undef C1M15C +sfr at 0xFF C1M15C ; // DS80C390 specific +#endif + +#ifdef C1S +#undef C1S +sfr at 0xE4 C1S ; // DS80C390 specific +// Not directly accessible bits +#define ER0 0x01 +#define ER1 0x02 +#define ER2 0x04 +#define TXS 0x08 +#define RXS 0x10 +#define WKS 0x20 +#define CECE 0x40 +#define BSS 0x80 +#endif + +#ifdef C1ITE +#undef C1ITE +sfr at 0xE6 C1TE ; // DS80C390 specific +#endif + +#ifdef C1RSM0 +#undef C1RSM0 +sfr at 0xD6 C1RSM0 ; // DS80C390 specific +#endif + +#ifdef C1RSM1 +#undef C1RSM1 +sfr at 0xD7 C1RSM1 ; // DS80C390 specific +#endif + +#ifdef C1TMA0 +#undef C1TMA0 +sfr at 0xDE C1TMA0 ; // DS80C390 specific +#endif + +#ifdef C1TMA1 +#undef C1TMA1 +sfr at 0xDF C1TMA1 ; // DS80C390 specific +#endif + +#ifdef CC1 +#undef CC1 +sfr at 0xC2 CC1; +#endif + +#ifdef CC2 +#undef CC2 +sfr at 0xC4 CC2; +#endif + +#ifdef CC3 +#undef CC3 +sfr at 0xC6 CC3; +#endif + +#ifdef CC4 +#undef CC4 +sfr at 0xCE CC4; +#endif + +#ifdef CC4EN +#undef CC4EN +sfr at 0xC9 CC4EN ; // compare/capture 4 enable register SAB80517 specific +#endif + +#ifdef CCAP0H_AT_0XFA +#undef CCAP0H_AT_0XFA +sfr at 0xFA CCAP0H ; +#endif + +#ifdef CCAP1H_AT_0XFB +#undef CCAP1H_AT_0XFB +sfr at 0xFB CCAP1H ; +#endif + +#ifdef CCAP2H_AT_0XFC +#undef CCAP2H_AT_0XFC +sfr at 0xFC CCAP2H ; +#endif + +#ifdef CCAP3H_AT_0XFD +#undef CCAP3H_AT_0XFD +sfr at 0xFD CCAP3H ; +#endif + +#ifdef CCAP4H_AT_0XFE +#undef CCAP4H_AT_0XFE +sfr at 0xFE CCAP4H ; +#endif + +#ifdef CCAP0L_AT_0XEA +#undef CCAP0L_AT_0XEA +sfr at 0xEA CCAP0L ; +#endif + +#ifdef CCAP1L_AT_0XEB +#undef CCAP1L_AT_0XEB +sfr at 0xEB CCAP1L ; +#endif + +#ifdef CCAP2L_AT_0XEC +#undef CCAP2L_AT_0XEC +sfr at 0xEC CCAP2L ; +#endif + +#ifdef CCAP3L_AT_0XED +#undef CCAP3L_AT_0XED +sfr at 0xED CCAP3L ; +#endif + +#ifdef CCAP4L_AT_0XEE +#undef CCAP4L_AT_0XEE +sfr at 0xEE CCAP4L ; +#endif + +#ifdef CCAPM0_AT_0XC2 +#undef CCAPM0_AT_0XC2 +// P89C668 specific, Capture module: +sfr at 0xC2 CCAPM0 ; +#endif + +#ifdef CCAPM0_AT_0XDA +#undef CCAPM0_AT_0XDA +sfr at 0xDA CCAPM0 ; +#define ECCF 0x01 +#define PWM 0x02 +#define TOG 0x04 +#define MAT 0x08 +#define CAPN 0x10 +#define CAPP 0x20 +#define ECOM 0x40 +#endif + +#ifdef CCAPM1_AT_0XC3 +#undef CCAPM1_AT_0XC3 +sfr at 0xC3 CCAPM1 ; +#endif + +#ifdef CCAPM1_AT_0XDB +#undef CCAPM1_AT_0XDB +sfr at 0xDB CCAPM1 ; +#endif + +#ifdef CCAPM2_AT_0XC4 +#undef CCAPM2_AT_0XC4 +sfr at 0xC4 CCAPM2 ; +#endif + +#ifdef CCAPM2_AT_0XDC +#undef CCAPM2_AT_0XDC +sfr at 0x0DC CCAPM2 ; +#endif + +#ifdef CCAPM3_AT_0XC5 +#undef CCAPM3_AT_0XC5 +sfr at 0xC5 CCAPM3 ; +#endif + +#ifdef CCAPM3_AT_0XDD +#undef CCAPM3_AT_0XDD +sfr at 0x0DD CCAPM3 ; +#endif + +#ifdef CCAPM4_AT_0XDE +#undef CCAPM4_AT_0XDE +sfr at 0x0DE CCAPM4 ; +#endif + +#ifdef CCAPM4_AT_0XC6 +#undef CCAPM4_AT_0XC6 +sfr at 0xC6 CCAPM4 ; +#endif + +#ifdef CCEN +#undef CCEN +sfr at 0xC1 CCEN ; // compare/capture enable register SAB80515 specific +#endif + +#ifdef CCH1 +#undef CCH1 +sfr at 0xC3 CCH1 ; // compare/capture register 1, high byte SAB80515 specific +#endif + +#ifdef CCH2 +#undef CCH2 +sfr at 0xC5 CCH2 ; // compare/capture register 2, high byte SAB80515 specific +#endif + +#ifdef CCH3 +#undef CCH3 +sfr at 0xC7 CCH3 ; // compare/capture register 3, high byte SAB80515 specific +#endif + +#ifdef CCH4 +#undef CCH4 +sfr at 0xCF CCH4 ; // compare/capture register 4, high byte SAB80515 specific +#endif + +#ifdef CCL1 +#undef CCL1 +sfr at 0xC2 CCL1 ; // compare/capture register 1, low byte SAB80515 specific +#endif + +#ifdef CCL2 +#undef CCL2 +sfr at 0xC4 CCL2 ; // compare/capture register 2, low byte SAB80515 specific +#endif + +#ifdef CCL3 +#undef CCL3 +sfr at 0xC6 CCL3 ; // compare/capture register 3, low byte SAB80515 specific +#endif + +#ifdef CCL4 +#undef CCL4 +sfr at 0xCE CCL4 ; // compare/capture register 4, low byte SAB80515 specific +#endif + +#ifdef CCON__0xD8__CF__CR__x__CCF4__CCF3__CCF2__CCF1__CCF0 +#undef CCON__0xD8__CF__CR__x__CCF4__CCF3__CCF2__CCF1__CCF0 +sfr at 0xD8 CCON ; // T89C51RD2 specific register +// Bit registers +sbit at 0xD8 CCF0 ; +sbit at 0xD9 CCF1 ; +sbit at 0xDA CCF2 ; +sbit at 0xDB CCF3 ; +sbit at 0xDC CCF4 ; +sbit at 0xDE CR ; +sbit at 0xDF CF ; +#endif + +#ifdef CCON__CF__CR__x__CCF4__CCF3__CCF2__CCF1__CCF0 +#undef CCON__CF__CR__x__CCF4__CCF3__CCF2__CCF1__CCF0 +// P89C668 specific, PCA Counter control: +sfr at 0xC0 CCON ; +// Bit registers +sbit at 0xC0 CCF0 ; +sbit at 0xC1 CCF1 ; +sbit at 0xC2 CCF2 ; +sbit at 0xC3 CCF3 ; +sbit at 0xC4 CCF4 ; +//sbit at 0xC5 - +sbit at 0xC6 CR ; +sbit at 0xC7 CF ; +#endif + +#ifdef CCR +#undef CCR +sfr at 0xCA CCR; +#endif + +#ifdef CH_AT_0XF9 +#undef CH_AT_0XF9 +sfr at 0xF9 CH ; +#endif + +#ifdef CMOD__CIDL__WDTE__x__x__x__CPS1__CPS0__ECF +#undef CMOD__CIDL__WDTE__x__x__x__CPS1__CPS0__ECF +// P89C668 specific, PCA Counter mode: +sfr at 0xC1 CMOD ; +// not bit addressable: +#define CIDL 0x80 +#define WDTE 0x40 +#define CPS1 0x04 +#define CPS0 0x02 +#define ECF 0x01 +#endif + +#ifdef CKCON__WD1__WD0__T2M__T1M__TOM__MD2__MD1__MD0 +#undef CKCON__WD1__WD0__T2M__T1M__TOM__MD2__MD1__MD0 +sfr at 0x8E CKCON ; // DS80C320 & DS80C390 specific +// Not directly accessible Bits. +#define MD0 0x01 +#define MD1 0x02 +#define MD2 0x04 +#define T0M 0x08 +#define T1M 0x10 +#define T2M 0x20 +#define WD0 0x40 +#define WD1 0x80 +#endif + +#ifdef CKCON__X2__T0X2__T1X2__T2X2__SiX2__PcaX2__WdX2__x +#undef CKCON__X2__T0X2__T1X2__T2X2__SiX2__PcaX2__WdX2__x +sfr at 0x8F CKCON ; +#define X2 0x01 +#define T0X2 0x02 +#define T1X2 0x04 +#define T2X2 0x08 +#define SiX2 0x10 +#define PcaX2 0x20 +#define WdX2 0x40 +#endif + +#ifdef CKMOD +#undef CKMOD +sfr at 0x96 CKMOD ; // DS89C420 specific +// Not directly accessible Bits. +#define T0MH 0x08 +#define T1MH 0x10 +#define T2MH 0x20 +#endif + +#ifdef CL_AT_0XE9 +#undef CL_AT_0XE9 +sfr at 0xE9 CL ; +#endif + +#ifdef CLRMSK +#undef CLRMSK +sfr at 0xA6 CLRMSK; +#endif + +#ifdef CMEN +#undef CMEN +sfr at 0xF6 CMEN ; // compare enable register SAB80517 specific +#endif + +#ifdef CMH0 +#undef CMH0 +sfr at 0xD3 CMH0 ; // compare register 0 high byte SAB80517 specific +#endif + +#ifdef CMH1 +#undef CMH1 +sfr at 0xD5 CMH1 ; // compare register 1 high byte SAB80517 specific +#endif + +#ifdef CMH2 +#undef CMH2 +sfr at 0xD7 CMH2 ; // compare register 2 high byte SAB80517 specific +#endif + +#ifdef CMH3 +#undef CMH3 +sfr at 0xE3 CMH3 ; // compare register 3 high byte SAB80517 specific +#endif + +#ifdef CMH4 +#undef CMH4 +sfr at 0xE5 CMH4 ; // compare register 4 high byte SAB80517 specific +#endif + +#ifdef CMH5 +#undef CMH5 +sfr at 0xE7 CMH5 ; // compare register 5 high byte SAB80517 specific +#endif + +#ifdef CMH6 +#undef CMH6 +sfr at 0xF3 CMH6 ; // compare register 6 high byte SAB80517 specific +#endif + +#ifdef CMH7 +#undef CMH7 +sfr at 0xF5 CMH7 ; // compare register 7 high byte SAB80517 specific +#endif + +#ifdef CMH0_AT_0XC9 +#undef CMH0_AT_0XC9 +sfr at 0xC9 CMH0 ; // Compare high 0, P80C552 specific +#endif + +#ifdef CMH1_AT_0XCA +#undef CMH1_AT_0XCA +sfr at 0xCA CMH1 ; // Compare high 1, P80C552 specific +#endif + +#ifdef CMH2_AT_0XCB +#undef CMH2_AT_0XCB +sfr at 0xCB CMH2 ; // Compare high 2, P80C552 specific +#endif + +#ifdef CML0 +#undef CML0 +sfr at 0xD2 CML0 ; // compare register 0 low byte SAB80517 specific +#endif + +#ifdef CML1 +#undef CML1 +sfr at 0xD4 CML1 ; // compare register 1 low byte SAB80517 specific +#endif + +#ifdef CML2 +#undef CML2 +sfr at 0xD6 CML2 ; // compare register 2 low byte SAB80517 specific +#endif + +#ifdef CML3 +#undef CML3 +sfr at 0xE2 CML3 ; // compare register 3 low byte SAB80517 specific +#endif + +#ifdef CML4 +#undef CML4 +sfr at 0xE4 CML4 ; // compare register 4 low byte SAB80517 specific +#endif + +#ifdef CML5 +#undef CML5 +sfr at 0xE6 CML5 ; // compare register 5 low byte SAB80517 specific +#endif + +#ifdef CML6 +#undef CML6 +sfr at 0xF2 CML6 ; // compare register 6 low byte SAB80517 specific +#endif + +#ifdef CML7 +#undef CML7 +sfr at 0xF4 CML7 ; // compare register 7 low byte SAB80517 specific +#endif + +#ifdef CML0_AT_0XA9 +#undef CML0_AT_0XA9 +sfr at 0xA9 CML0 ; // Compare low 0, P80C552 specific +#endif + +#ifdef CML1_AT_0XAA +#undef CML1_AT_0XAA +sfr at 0xAA CML1 ; // Compare low 1, P80C552 specific +#endif + +#ifdef CML2_AT_0XAB +#undef CML2_AT_0XAB +sfr at 0xAB CML2 ; // Compare low 2, P80C552 specific +#endif + +#ifdef CMOD__0xD9__CIDL__WDTE__x__x__x__CPS1__CPS0__ECF +#undef CMOD__0xD9__CIDL__WDTE__x__x__x__CPS1__CPS0__ECF +sfr at 0xD9 CMOD ; +#define ECF 0x01 +#define CPS0 0x02 +#define CPS1 0x04 +#define WDTE 0x40 +#define CIDL 0x80 +#endif + +#ifdef CMSEL +#undef CMSEL +sfr at 0xF7 CMSEL ; // compare input select SAB80517 +#endif + +#ifdef COMCLRH +#undef COMCLRH +sfr at 0xA4 COMCLRH; +#endif + +#ifdef COMCLRL +#undef COMCLRL +sfr at 0xA3 COMCLRL; +#endif + +#ifdef COMSETH +#undef COMSETH +sfr at 0xA2 COMSETH; +#endif + +#ifdef COMSETL +#undef COMSETL +sfr at 0xA1 COMSETL; +#endif + +#ifdef COR +#undef COR +sfr at 0xCE COR ; // Dallas DS80C390 specific +#define CLKOE 0x01 +#define COD0 0x02 +#define COD1 0x04 +#define C0BPR6 0x08 +#define C0BPR7 0x10 +#define C1BPR6 0x20 +#define C1BPR7 0x40 +#define IRDACK 0x80 +#endif + +#ifdef CRC +#undef CRC +sfr at 0xC1 CRC ; // Dallas DS5001 specific +#define CRC_ 0x01 +#define MDM 0x02 +#define RNGE0 0x10 +#define RNGE1 0x20 +#define RNGE2 0x40 +#define RNGE3 0x80 +#endif + +#ifdef CRCH +#undef CRCH +sfr at 0xCB CRCH ; // compare/reload/capture register, high byte SAB80515 specific +#endif + +#ifdef CRCHIGH +#undef CRCHIGH +sfr at 0xC3 CRCHIGH ; // DS5001 specific +#endif + +#ifdef CRCL +#undef CRCL +sfr at 0xCA CRCL ; // compare/reload/capture register, low byte SAB80515 specific +#endif + +#ifdef CRCLOW +#undef CRCLOW +sfr at 0xC2 CRCLOW ; // DS5001 specific +#endif + +#ifdef CT1COM +#undef CT1COM +sfr at 0xBC CT1COM; +#endif + +#ifdef CTCOM_AT_0XE1 +#undef CTCOM_AT_0XE1 +sfr at 0xE1 CTCON ; // com.timer control register SAB80517 +#endif + +#ifdef CTCON__CTN3__CTP3__CTN2__CTP2__CTN1__CTP1__CTN0__CTP0 +#undef CTCON__CTN3__CTP3__CTN2__CTP2__CTN1__CTP1__CTN0__CTP0 +sfr at 0xEB CTCON ; // Capture control, P80C552 specific +// Not directly accessible Bits. +#define CTP0 0x01 +#define CTN0 0x02 +#define CTP1 0x04 +#define CTN1 0x08 +#define CTP2 0x10 +#define CTN2 0x20 +#define CTP3 0x40 +#define CTN3 0x80 +#endif + +#ifdef CTH0_AT_0XCC +#undef CTH0_AT_0XCC +sfr at 0xCC CTH0 ; // Capture high 0, P80C552 specific +#endif + +#ifdef CTH1_AT_0XCD +#undef CTH1_AT_0XCD +sfr at 0xCD CTH1 ; // Capture high 1, P80C552 specific +#endif + +#ifdef CTH2_AT_0XCE +#undef CTH2_AT_0XCE +sfr at 0xCE CTH2 ; // Capture high 2, P80C552 specific +#endif + +#ifdef CTH3_AT_0XCF +#undef CTH3_AT_0XCF +sfr at 0xCF CTH3 ; // Capture high 3, P80C552 specific +#endif + +#ifdef CTL0_AT_0XAC +#undef CTL0_AT_0XAC +sfr at 0xAC CTL0 ; // Capture low 0, P80C552 specific +#endif + +#ifdef CTL1_AT_0XAD +#undef CTL1_AT_0XAD +sfr at 0xAD CTL1 ; // Capture low 1, P80C552 specific +#endif + +#ifdef CTL2_AT_0XAE +#undef CTL2_AT_0XAE +sfr at 0xAE CTL2 ; // Capture low 2, P80C552 specific +#endif + +#ifdef CTL3_AT_0XAF +#undef CTL3_AT_0XAF +sfr at 0xAF CTL3 ; // Capture low 3, P80C552 specific +#endif + +#ifdef CTRELH +#undef CTRELH +sfr at 0xDF CTRELH ; // com.timer rel register high byte SAB80517 +#endif + +#ifdef CTRELL +#undef CTRELL +sfr at 0xDE CTRELL ; // com.timer rel register low byte SAB80517 +#endif + +#ifdef DAPR__SAB80515 +#undef DAPR__SAB80515 +sfr at 0xDA DAPR ; // D/A-converter program register SAB80515 specific +#endif + +#ifdef DAPR__SAB80517 +#undef DAPR__SAB80517 +sfr at 0xDA DAPR ; // D/A-converter program register SAB80517 specific +#endif + +#ifdef DPH +#undef DPH +sfr at 0x83 DPH ; +sfr at 0x83 DP0H ; // Alternate name for AT89S53 +#endif + +#ifdef DPH1 +#undef DPH1 +sfr at 0x85 DPH1 ; // DS80C320 specific +sfr at 0x85 DP1H ; // Alternate name for AT89S53 +#endif + +#ifdef DPL +#undef DPL +sfr at 0x82 DPL ; // Alternate name for AT89S53 +sfr at 0x82 DP0L ; +#endif + +#ifdef DPL1 +#undef DPL1 +sfr at 0x84 DPL1 ; // DS80C320 specific +sfr at 0x84 DP1L ; // Alternate name for AT89S53 +#endif + +#ifdef DPS__x__x__x__x__x__x__x__SEL +#undef DPS__x__x__x__x__x__x__x__SEL +sfr at 0x86 DPS ; +// Not directly accessible DPS Bit. DS80C320 & DPS8XC520 specific +#define SEL 0x01 +#endif + +#ifdef DPS__ID1__ID0__TSL__x__x__x__x__SEL +#undef DPS__ID1__ID0__TSL__x__x__x__x__SEL +sfr at 0x86 DPS ; +// Not directly accessible DPS Bit. DS89C390 specific +#define SEL 0x01 +#define TSL 0x20 +#define ID0 0x40 +#define ID1 0x80 +#endif + +#ifdef DPS__ID1__ID0__TSL__AID__x__x__x__SEL +#undef DPS__ID1__ID0__TSL__AID__x__x__x__SEL +sfr at 0x86 DPS ; +// Not directly accessible DPS Bit. DS89C420 specific +#define SEL 0x01 +#define AID 0x10 +#define TSL 0x20 +#define ID0 0x40 +#define ID1 0x80 +#endif + +#ifdef DPSEL +#undef DPSEL +sfr at 0x92 DPSEL ; // data pointer select register SAB80517 +#endif + +#ifdef DPX +#undef DPX +sfr at 0x93 DPX1 ; // DS80C390 specific +#endif + +#ifdef DPX1 +#undef DPX1 +sfr at 0x95 DPX1 ; // DS80C390 specific +#endif + +#ifdef EECON +#undef EECON +sfr at 0xD2 EECON ; +#define EEBUSY 0x01 +#define EEE 0x02 +#define EEPL0 0x10 +#define EEPL1 0x20 +#define EEPL2 0x40 +#define EEPL3 0x80 +#define EEPL 0xF0 +#endif + +#ifdef EETIM +#undef EETIM +sfr at 0xD3 EETIM ; +#endif + +#ifdef EICC1 +#undef EICC1 +sfr at 0xBF EICC1; +#endif + +#ifdef EIE__x__x__x__EWDI__EX5__EX4__EX3__EX2 +#undef EIE__x__x__x__EWDI__EX5__EX4__EX3__EX2 +sfr at 0xE8 EIE ; +// Bit registers DS80C320 specific +sbit at 0xE8 EX2 ; +sbit at 0xE9 EX3 ; +sbit at 0xEA EX4 ; +sbit at 0xEB EX5 ; +sbit at 0xEC EWDI ; +#endif + +#ifdef EIE__CANBIE__C0IE__C1IE__EWDI__EX5__EX4__EX3__EX2 +#undef EIE__CANBIE__C0IE__C1IE__EWDI__EX5__EX4__EX3__EX2 +sfr at 0xE8 EIE ; +// Bit registers DS80C390 specific +sbit at 0xE8 EX2 ; +sbit at 0xE9 EX3 ; +sbit at 0xEA EX4 ; +sbit at 0xEB EX5 ; +sbit at 0xEC EWDI ; +sbit at 0xED C1IE ; +sbit at 0xEE C0IE ; +sbit at 0xEF CANBIE ; +#endif + +#ifdef EIP__x__x__x__PWDI__PX5__PX4__PX3__PX2 +#undef EIP__x__x__x__PWDI__PX5__PX4__PX3__PX2 +sfr at 0xF8 EIP ; +// Bit registers DS80C320 specific +sbit at 0xF8 PX2 ; +sbit at 0xF9 PX3 ; +sbit at 0xFA PX4 ; +sbit at 0xFB PX5 ; +sbit at 0xFC PWDI ; +#endif + +#ifdef EIP__CANBIP__C0IP__C1IP__PWDI__PX5__PX4__PX3__PX2__PX1__PX0 +#undef EIP__CANBIP__C0IP__C1IP__PWDI__PX5__PX4__PX3__PX2__PX1__PX0 +sfr at 0xF8 EIP ; +// Bit registers DS80C320 specific +sbit at 0xF8 PX2 ; +sbit at 0xF9 PX3 ; +sbit at 0xFA PX4 ; +sbit at 0xFB PX5 ; +sbit at 0xFC PWDI ; +sbit at 0xFD C1IP ; +sbit at 0xFE C0IP ; +sbit at 0xFF CANBIP ; +#endif + +#ifdef EIP0__x__x__x__LPWDI__LPX5__LPX4__LPX3__LPX2 +#undef EIP0__x__x__x__LPWDI__LPX5__LPX4__LPX3__LPX2 +sfr at 0xF8 EIP0 ; +// Bit registers DS89C420 specific +sbit at 0xF8 LPX2 ; +sbit at 0xF9 LPX3 ; +sbit at 0xFA LPX4 ; +sbit at 0xFB LPX5 ; +sbit at 0xFC LPWDI ; +#endif + +#ifdef EIP1__x__x__x__MPWDI__MPX5__MPX4__MPX3__MPX2 +#undef EIP1__x__x__x__MPWDI__MPX5__MPX4__MPX3__MPX2 +sfr at 0xF1 EIP1 ; +// Not directly accessible Bits DS89C420 specific +#define MPX2 0x01 +#define MPX3 0x02 +#define MPX4 0x04 +#define MPX5 0x08 +#define MPWDI 0x10 +#endif + +#ifdef ESP +#undef ESP +sfr at 0x9B ESP ; +// Not directly accessible Bits DS80C390 specific +#define ESP_0 0x01 +#define ESP_1 0x02 +#endif + +#ifdef EXIF__IE5__IE4__IE3__IE2__x__RGMD__RGSL__BGS +#undef EXIF__IE5__IE4__IE3__IE2__x__RGMD__RGSL__BGS +sfr at 0x91 EXIF ; +// Not directly accessible EXIF Bits DS80C320 specific +#define BGS 0x01 +#define RGSL 0x02 +#define RGMD 0x04 +#define IE2 0x10 +#define IE3 0x20 +#define IE4 0x40 +#define IE5 0x80 +#endif + +#ifdef EXIF__IE5__IE4__IE3__IE2__XT_RG__RGMD__RGSL__BGS +#undef EXIF__IE5__IE4__IE3__IE2__XT_RG__RGMD__RGSL__BGS +sfr at 0x91 EXIF ; +// Not directly accessible EXIF Bits DS87C520 specific +#define BGS 0x01 +#define RGSL 0x02 +#define RGMD 0x04 +#define XT_RG 0x08 +#define IE2 0x10 +#define IE3 0x20 +#define IE4 0x40 +#define IE5 0x80 +#endif + +#ifdef EXIF__IE5__IE4__IE3__IE2__CKRY__RGMD__RGSL__BGS +#undef EXIF__IE5__IE4__IE3__IE2__CKRY__RGMD__RGSL__BGS +sfr at 0x91 EXIF ; +// Not directly accessible EXIF Bits DS80C390 & DS89C420 specific +#define BGS 0x01 +#define RGSL 0x02 +#define RGMD 0x04 +#define CKRY 0x08 +#define IE2 0x10 +#define IE3 0x20 +#define IE4 0x40 +#define IE5 0x80 +#endif + +#ifdef FCNTL__FBUSY__FERR__x__x__FC3__FC2__FC1__FC0 +#undef FCNTL__FBUSY__FERR__x__x__FC3__FC2__FC1__FC0 +sfr at 0xD5 FCNTL ; +// Not directly accessible DS89C420 specific +#define FC0 0x01 +#define FC1 0x02 +#define FC2 0x04 +#define FC3 0x08 +#define FERR 0x40 +#define FBUSY 0x80 +#endif + +#ifdef FCON +#undef FCON +sfr at 0xD1 FCON ; +#define FBUSY 0x01 +#define FMOD0 0x02 +#define FMOD1 0x04 +#define FPS 0x08 +#define FPL0 0x10 +#define FPL1 0x20 +#define FPL2 0x40 +#define FPL3 0x80 +#define FPL 0xF0 +#endif + +#ifdef FDATA +#undef FDATA +sfr at 0xD6 FDATA ; +#endif + +#ifdef FMODE +#undef FMODE +sfr at 0xB3 FMODE; +#endif + +#ifdef IE__EA__x__x__ES__ET1__EX1__ET0__EX0 +#undef IE__EA__x__x__ES__ET1__EX1__ET0__EX0 +sfr at 0xA8 IE ; +// Bit registers +sbit at 0xA8 EX0 ; +sbit at 0xA9 ET0 ; +sbit at 0xAA EX1 ; +sbit at 0xAB ET1 ; +sbit at 0xAC ES ; +sbit at 0xAF EA ; +#endif + +#ifdef IE__EA__x__ET2__ES__ET1__EX1__ET0__EX0 +#undef IE__EA__x__ET2__ES__ET1__EX1__ET0__EX0 +sfr at 0xA8 IE ; +// Bit registers +sbit at 0xA8 EX0 ; +sbit at 0xA9 ET0 ; +sbit at 0xAA EX1 ; +sbit at 0xAB ET1 ; +sbit at 0xAC ES ; +sbit at 0xAD ET2 ; // Enable timer2 interrupt +sbit at 0xAF EA ; +#endif // IE + +#ifdef IE__EA__EAD__ES1__ES0__ET1__EX1__ET0__EX0 +#undef IE__EA__EAD__ES1__ES0__ET1__EX1__ET0__EX0 +sfr at 0xA8 IE ; // same as IEN0 - Interrupt enable 0, P80C552 specific +sfr at 0xA8 IEN0 ; // alternate name +// Bit registers +sbit at 0xA8 EX0 ; +sbit at 0xA9 ET0 ; +sbit at 0xAA EX1 ; +sbit at 0xAB ET1 ; +sbit at 0xAC ES0 ; +sbit at 0xAD ES1 ; +sbit at 0xAE EAD ; +sbit at 0xAF EEA ; +#endif + +#ifdef IE__EA__EC__ET2__ES__ET1__EX1__ET0__EX0 +#undef IE__EA__EC__ET2__ES__ET1__EX1__ET0__EX0 +sfr at 0xA8 IE ; +sbit at 0xA8 EX0 ; +sbit at 0xA9 ET0 ; +sbit at 0xAA EX1 ; +sbit at 0xAB ET1 ; +sbit at 0xAC ES ; +sbit at 0xAD ET2 ; +sbit at 0xAE EC ; +sbit at 0xAF EA ; +#endif + +#ifdef IE__EA__ES1__ET2__ES__ET1__EX1__ET0__EX0 +#undef IE__EA__ES1__ET2__ES__ET1__EX1__ET0__EX0 +sfr at 0xA8 IE ; +// Bit registers +sbit at 0xA8 EX0 ; +sbit at 0xA9 ET0 ; +sbit at 0xAA EX1 ; +sbit at 0xAB ET1 ; +sbit at 0xAC ES ; +sbit at 0xAC ES0 ; // Alternate name +sbit at 0xAD ET2 ; // Enable timer2 interrupt +sbit at 0xAE ES1 ; +sbit at 0xAF EA ; +#endif // IE + +#ifdef IE__EA_WDT_ET2_ES_ET1_EX1_ET0_EX0 +#undef IE__EA_WDT_ET2_ES_ET1_EX1_ET0_EX0 +sfr at 0xA8 IE ; +sfr at 0xA8 IEN0 ; // Alternate name +// Bit registers for the SAB80515 and compatible IE +sbit at 0xA8 EX0 ; +sbit at 0xA9 ET0 ; +sbit at 0xAA EX1 ; +sbit at 0xAB ET1 ; +sbit at 0xAC ES ; +sbit at 0xAC ES0 ; +sbit at 0xAD ET2 ; // Enable timer 2 overflow SAB80515 specific +sbit at 0xAE WDT ; // watchdog timer reset - SAB80515 specific +sbit at 0xAF EA ; +sbit at 0xAF EAL ; // EA as called by Infineon / Siemens +#endif + +#ifdef IEN0__EA__EC__ES1__ES0__ET1__EX1__ET0__EX0 +#undef IEN0__EA__EC__ES1__ES0__ET1__EX1__ET0__EX0 +// P89C668 specific +sfr at 0xA8 IEN0 ; +// Bit registers +sbit at 0xA8 EX0 ; +sbit at 0xA9 ET0 ; +sbit at 0xAA EX1 ; +sbit at 0xAB ET1 ; +sbit at 0xAC ES0 ; +sbit at 0xAD ES1 ; +sbit at 0xAE EC ; +sbit at 0xAF EA ; +#endif + +#ifdef IEN1__x__x__x__x__x__x__x__ET2 +#undef IEN1__x__x__x__x__x__x__x__ET2 +// P89C668 specific bit registers +sfr at 0xE8 IEN1 ; +// Bit registers +sbit at 0xE8 ET2 ; +#endif + +#ifdef IEN1__ET2__ECM2__ECM1__ECM0__ECT3__ECT2__ECT1__ECT0 +#undef IEN1__ET2__ECM2__ECM1__ECM0__ECT3__ECT2__ECT1__ECT0 +sfr at 0xE8 IEN1 ; // Interrupt enable 1, P80C552 specific +// Bit registers +sbit at 0xE8 ECT0 ; +sbit at 0xE9 ECT1 ; +sbit at 0xEA ECT2 ; +sbit at 0xEB ECT3 ; +sbit at 0xEC ECM0 ; +sbit at 0xED ECM1 ; +sbit at 0xEE ECM2 ; +sbit at 0xEF ET2 ; +#endif + +#ifdef IEN1__EXEN2__SWDT__EX6__EX5__EX4__EX3__EX2__EADC +#undef IEN1__EXEN2__SWDT__EX6__EX5__EX4__EX3__EX2__EADC +sfr at 0xB8 IEN1 ; // interrupt enable register - SAB80515 specific +// Bit registers +sbit at 0xB8 EADC ; // A/D converter interrupt enable +sbit at 0xB9 EX2 ; +sbit at 0xBA EX3 ; +sbit at 0xBB EX4 ; +sbit at 0xBC EX5 ; +sbit at 0xBD EX6 ; +sbit at 0xBE SWDT ; // watchdog timer start/reset +sbit at 0xBF EXEN2 ; // timer2 external reload interrupt enable +#endif + +#ifdef IEN2__SAB80517 +#undef IEN2__SAB80517 +sfr at 0x9A IEN2 ; // interrupt enable register 2 SAB80517 +#endif + +#ifdef IEN3 +#undef IEN3 +sfr at 0xBE IEN3; +#endif + +#ifdef IP__x__x__x__PS__PT1__PX1__PT0__PX0 +#undef IP__x__x__x__PS__PT1__PX1__PT0__PX0 +sfr at 0xB8 IP ; +// Bit registers +sbit at 0xB8 PX0 ; +sbit at 0xB9 PT0 ; +sbit at 0xBA PX1 ; +sbit at 0xBB PT1 ; +sbit at 0xBC PS ; +#endif + +#ifdef IP__x__x__PT2__PS__PT1__PX1__PT0__PX0 +#undef IP__x__x__PT2__PS__PT1__PX1__PT0__PX0 +sfr at 0xB8 IP ; +// Bit registers +sbit at 0xB8 PX0 ; +sbit at 0xB9 PT0 ; +sbit at 0xBA PX1 ; +sbit at 0xBB PT1 ; +sbit at 0xBC PS ; +sbit at 0xBC PS0 ; // alternate name +sbit at 0xBD PT2 ; +#endif + +#ifdef IP__x__PAD__PS1__PS0__PT1__PX1__PT0__PX0 +#undef IP__x__PAD__PS1__PS0__PT1__PX1__PT0__PX0 +sfr at 0xB8 IP ; // Interrupt priority 0, P80C552 specific +sfr at 0xB8 IP0 ; // alternate name +// Bit registers +sbit at 0xB8 PX0 ; +sbit at 0xB9 PT0 ; +sbit at 0xBA PX1 ; +sbit at 0xBB PT1 ; +sbit at 0xBC PS0 ; +sbit at 0xBD PS1 ; +sbit at 0xBE PAD ; +#endif + +#ifdef IP__x__PPC__PT2__PS__PT1__PX1__PT0__PX0 +#undef IP__x__PPC__PT2__PS__PT1__PX1__PT0__PX0 +sfr at 0xB8 IP ; +// Bit registers +sbit at 0xB8 PX0 ; +sbit at 0xB9 PT0 ; +sbit at 0xBA PX1 ; +sbit at 0xBB PT1 ; +sbit at 0xBC PS ; +sbit at 0xBD PT2 ; +sbit at 0xBE PPC ; +#endif + +#ifdef IP__x__PS1__PT2__PS__PT1_PX1__PT0__PX0 +#undef IP__x__PS1__PT2__PS__PT1_PX1__PT0__PX0 +sfr at 0xB8 IP ; +// Bit registers +sbit at 0xB8 PX0 ; +sbit at 0xB9 PT0 ; +sbit at 0xBA PX1 ; +sbit at 0xBB PT1 ; +sbit at 0xBC PS ; +sbit at 0xBD PT2 ; +sbit at 0xBE PS1 ; +#endif + +#ifdef IP__PT2__PPC__PS1__PS0__PT1__PX1__PT0__PX0 +#undef IP__PT2__PPC__PS1__PS0__PT1__PX1__PT0__PX0 +// P89C668 specific: +sfr at 0xB8 IP ; +// Bit registers +sbit at 0xB8 PX0 ; +sbit at 0xB9 PT0 ; +sbit at 0xBA PX1 ; +sbit at 0xBB PT1 ; +sbit at 0xBC PS0 ; +sbit at 0xBD PS1 ; +sbit at 0xBE PPC ; +sbit at 0xBF PT2 ; +#endif + +#ifdef IP__RWT__x__x__PS__PT1__PX1__PT0__PX0 +#undef IP__RWT__x__x__PS__PT1__PX1__PT0__PX0 +sfr at 0xB8 IP ; +// Bit registers +sbit at 0xB8 PX0 ; +sbit at 0xB9 PT0 ; +sbit at 0xBA PX1 ; +sbit at 0xBB PT1 ; +sbit at 0xBC PS ; +sbit at 0xBF RWT ; +#endif + +#ifdef IP0__x__WDTS__IP0_5__IP0_4__IP0_3__IP0_2__IP0_1__IP0_0 +#undef IP0__x__WDTS__IP0_5__IP0_4__IP0_3__IP0_2__IP0_1__IP0_0 +sfr at 0xA9 IP0 ; // interrupt priority register SAB80515 specific +// Not directly accessible IP0 bits +#define IP0_0 0x01 +#define IP0_1 0x02 +#define IP0_2 0x04 +#define IP0_3 0x08 +#define IP0_4 0x10 +#define IP0_5 0x20 +#define WDTS 0x40 +#endif + +#ifdef IP0__x__LPS1__LPT2__LPS0__LPT1__LPX1__LPT0__LPX0 +#undef IP0__x__LPS1__LPT2__LPS0__LPT1__LPX1__LPT0__LPX0 +sfr at 0xB8 IP0 ; // interrupt priority register DS89C420 specific +// Bit registers +sbit at 0xB8 LPX0 ; +sbit at 0xB9 LPT0 ; +sbit at 0xBA LPX1 ; +sbit at 0xBB LPT1 ; +sbit at 0xBC LPS0 ; +sbit at 0xBD LPT2 ; +sbit at 0xBE LPS1 ; +#endif + +#ifdef IP1__x__x__IP1_5__IP1_4__IP1_3__IP1_2__IP1_1__IP1_0 +#undef IP1__x__x__IP1_5__IP1_4__IP1_3__IP1_2__IP1_1__IP1_0 +sfr at 0xB9 IP1 ; // interrupt priority register SAB80515 specific +// Not directly accessible IP1 bits +#define IP1_0 0x01 +#define IP1_1 0x02 +#define IP1_2 0x04 +#define IP1_3 0x08 +#define IP1_4 0x10 +#define IP1_5 0x20 +#endif + +#ifdef IP1__x__MPS1__MPT2__MPS0__MPT1__MPX1__MPT0__MPX0 +#undef IP1__x__MPS1__MPT2__MPS0__MPT1__MPX1__MPT0__MPX0 +sfr at 0xB1 IP1 ; // interrupt priority register DS89C420 specific +// Not directly accessible IP1 bits +#define MPX0 0x01 +#define MPT0 0x02 +#define MPX1 0x04 +#define MPT1 0x08 +#define MPS0 0x10 +#define MPT2 0x20 +#define MPS1 0x40 +#endif + +#ifdef IP1__PT2__PCM2__PCM1__PCM0__PCT3__PCT2__PCT1__PCT0 +#undef IP1__PT2__PCM2__PCM1__PCM0__PCT3__PCT2__PCT1__PCT0 +sfr at 0xF8 IP1 ; // Interrupt priority 1, P80C552 specific +// Bit registers +sbit at 0xF8 PCT0 ; +sbit at 0xF9 PCT1 ; +sbit at 0xFA PCT2 ; +sbit at 0xFB PCT3 ; +sbit at 0xFC PCM0 ; +sbit at 0xFD PCM1 ; +sbit at 0xFE PCM2 ; +sbit at 0xFF PT2 ; +#endif + +#ifdef IPH__x__PPCH__PT2H__PSH__PT1H__PX1H__PT0H__PX0H +#undef IPH__x__PPCH__PT2H__PSH__PT1H__PX1H__PT0H__PX0H +sfr at 0xB7 IPH ; +#define PX0H 0x01 +#define PT0H 0x02 +#define PX1H 0x04 +#define PT1H 0x08 +#define PSH 0x10 +#define PT2H 0x20 +#define PPCH 0x40 +#endif + +#ifdef IPH__PT2H__PPCH__PS1H__PS0H__PT1H__PX1H__PT0H__PX0H +#undef IPH__PT2H__PPCH__PS1H__PS0H__PT1H__PX1H__PT0H__PX0H +// P89C668 specific: +sfr at 0xB7 IPH ; +// not bit addressable: +#define PX0H 0x01 +#define PT0H 0x02 +#define PX1H 0x04 +#define PT1H 0x08 +#define PS0H 0x10 +#define PS1H 0x20 +#define PPCH 0x40 +#define PT2H 0x80 +#endif + +#ifdef IRCON +#undef IRCON +sfr at 0xC0 IRCON ; // interrupt control register - SAB80515 specific +// Bit registers +sbit at 0xC0 IADC ; // A/D converter irq flag +sbit at 0xC1 IEX2 ; // external interrupt edge detect flag +sbit at 0xC2 IEX3 ; +sbit at 0xC3 IEX4 ; +sbit at 0xC4 IEX5 ; +sbit at 0xC5 IEX6 ; +sbit at 0xC6 TF2 ; // timer 2 owerflow flag +sbit at 0xC7 EXF2 ; // timer2 reload flag +#endif + +#ifdef IRCON0 +#undef IRCON0 +sfr at 0xC0 IRCON0 ; // interrupt control register - SAB80515 specific +// Bit registers +sbit at 0xC0 IADC ; // A/D converter irq flag +sbit at 0xC1 IEX2 ; // external interrupt edge detect flag +sbit at 0xC2 IEX3 ; +sbit at 0xC3 IEX4 ; +sbit at 0xC4 IEX5 ; +sbit at 0xC5 IEX6 ; +sbit at 0xC6 TF2 ; // timer 2 owerflow flag +sbit at 0xC7 EXF2 ; // timer2 reload flag +#endif + +#ifdef IRCON1 +#undef IRCON1 +sfr at 0xD1 IRCON1 ; // interrupt control register - SAB80515 specific +#endif + +#ifdef IRCON2 +#undef IRCON2 +sfr at 0xBF IRCON2; +#endif + +#ifdef MA +#undef MA +sfr at 0xD3 MA ; // DS80C390 +#endif + +#ifdef MB +#undef MB +sfr at 0xD4 MB ; // DS80C390 +#endif + +#ifdef MC +#undef MC +sfr at 0xD5 MC ; // DS80C390 +#endif + +#ifdef MCNT0 +#undef MCNT0 +sfr at 0xD1 MCNT0 ; // DS80C390 +#define MAS0 0x01 +#define MAS1 0x02 +#define MAS2 0x04 +#define MAS3 0x08 +#define MAS4 0x10 +#define SCB 0x20 +#define CSE 0x40 +#define LSHIFT 0x80 +#endif + +#ifdef MCNT1 +#undef MCNT1 +sfr at 0xD2 MCNT1 ; // DS80C390 +#define CLM 0x10 +#define MOF 0x40 +#define MST 0x80 +#endif + +#ifdef MCON__IDM1__IDM0__CMA__x__PDCE3__PDCE2__PDCE1__PDCE0 +#undef MCON__IDM1__IDM0__CMA__x__PDCE3__PDCE2__PDCE1__PDCE0 +sfr at 0xC6 MCON ; // DS80C390 +#define PDCE0 0x01 +#define PDCE1 0x02 +#define PDCE2 0x04 +#define PDCE3 0x08 +#define CMA 0x20 +#define IDM0 0x40 +#define IDM1 0x80 +#endif + +#ifdef MCON__PA3__PA2__PA1__PA0__RA32_8__ECE2__PAA__SL +#undef MCON__PA3__PA2__PA1__PA0__RA32_8__ECE2__PAA__SL +sfr at 0xC6 MCON ; // DS5000 +#define SL 0x01 +#define PAA 0x02 +#define ECE2 0x04 +#define RA32_8 0x08 +#define PA0 0x10 +#define PA1 0x20 +#define PA2 0x40 +#define PA3 0x80 +#endif + +#ifdef MCON__PA3__PA2__PA1__PA0__RG1__PES__PM__SL +#undef MCON__PA3__PA2__PA1__PA0__RG1__PES__PM__SL +sfr at 0xC6 MCON ; // DS5001 +#define SL 0x01 +#define PM 0x02 +#define PES 0x04 +#define RG1 0x08 +#define PA0 0x10 +#define PA1 0x20 +#define PA2 0x40 +#define PA3 0x80 +#endif + +#ifdef MD0 +#undef MD0 +sfr at 0xE9 MD0 ; // MUL / DIV register 0 SAB80517 +#endif + +#ifdef MD1 +#undef MD1 +sfr at 0xEA MD1 ; // MUL / DIV register 1 SAB80517 +#endif + +#ifdef MD2 +#undef MD2 +sfr at 0xEB MD2 ; // MUL / DIV register 2 SAB80517 +#endif + +#ifdef MD3 +#undef MD3 +sfr at 0xEC MD3 ; // MUL / DIV register 3 SAB80517 +#endif + +#ifdef MD4 +#undef MD4 +sfr at 0xED MD4 ; // MUL / DIV register 4 SAB80517 +#endif + +#ifdef MD5 +#undef MD5 +sfr at 0xEE MD5 ; // MUL / DIV register 5 SAB80517 +#endif + +#ifdef MXAX +#undef MXAX +sfr at 0xEA MXAX ; // Dallas DS80C390 +#endif + +#ifdef P0 +#undef P0 +sfr at 0x80 P0 ; +// Bit Registers +sbit at 0x80 P0_0 ; +sbit at 0x81 P0_1 ; +sbit at 0x82 P0_2 ; +sbit at 0x83 P0_3 ; +sbit at 0x84 P0_4 ; +sbit at 0x85 P0_5 ; +sbit at 0x86 P0_6 ; +sbit at 0x87 P0_7 ; +#endif + +#ifdef P0_EXT__AD7__AD6__AD5__AD4__AD3__AD2__AD1__AD0 +#undef P0_EXT__AD7__AD6__AD5__AD4__AD3__AD2__AD1__AD0 +// P89C668 alternate names for bits in P0 +sbit at 0x80 AD0 ; +sbit at 0x81 AD1 ; +sbit at 0x82 AD2 ; +sbit at 0x83 AD3 ; +sbit at 0x84 AD4 ; +sbit at 0x85 AD5 ; +sbit at 0x86 AD6 ; +sbit at 0x87 AD7 ; +#endif + +#ifdef P1 +#undef P1 +sfr at 0x90 P1 ; +// Bit registers +sbit at 0x90 P1_0 ; +sbit at 0x91 P1_1 ; +sbit at 0x92 P1_2 ; +sbit at 0x93 P1_3 ; +sbit at 0x94 P1_4 ; +sbit at 0x95 P1_5 ; +sbit at 0x96 P1_6 ; +sbit at 0x97 P1_7 ; +#endif + +#ifdef P1_EXT__INT5__INT4__INT3__INT2__TXD1__RXD1__T2EX__T2 +#undef P1_EXT__INT5__INT4__INT3__INT2__TXD1__RXD1__T2EX__T2 +// P1 alternate functions +sbit at 0x90 T2 ; +sbit at 0x91 T2EX ; +sbit at 0x92 RXD1 ; +sbit at 0x93 TXD1 ; +sbit at 0x94 INT2 ; +sbit at 0x95 INT3 ; +sbit at 0x96 INT4 ; +sbit at 0x97 INT5 ; +#endif + +#ifdef P1_EXT__SDA__SCL__CEX2__CEX1__CEX0__ECI__T2EX__T2 +#undef P1_EXT__SDA__SCL__CEX2__CEX1__CEX0__ECI__T2EX__T2 +// P89C669 alternate names for bits at P1 +// P1_EXT__SDA__SCL__CEX2__CEX1__CEX0__ECI__T2EX__T2 +sbit at 0x90 T2 ; +sbit at 0x91 T2EX ; +sbit at 0x92 ECI ; +sbit at 0x93 CEX0 ; +sbit at 0x94 CEX1 ; +sbit at 0x95 CEX2 ; +sbit at 0x96 SCL ; +sbit at 0x97 SDA ; +#endif + +#ifdef P1_EXT__T2__CLKOUT__T2EX__INT2__INT6_CC3__INT5_CC2__INT4_CC1__INT3_CC0 +sbit at 0x90 INT3_CC0 ; // P1 alternate functions - SAB80515 specific +sbit at 0x91 INT4_CC1 ; +sbit at 0x92 INT5_CC2 ; +sbit at 0x93 INT6_CC3 ; +sbit at 0x94 INT2 ; +sbit at 0x95 T2EX ; +sbit at 0x96 CLKOUT ; +sbit at 0x97 T2 ; +#endif + +#ifdef P1_EXT__CT0I__CT1I__CT2I__CT3I__T2__RT2__SCL__SDA +#undef P1_EXT__CT0I__CT1I__CT2I__CT3I__T2__RT2__SCL__SDA +// Bit registers +sbit at 0x90 CT0I ; // Port 1 alternate functions, P80C552 specific +sbit at 0x91 CT1I ; +sbit at 0x92 CT2I ; +sbit at 0x93 CT3I ; +sbit at 0x94 T2 ; +sbit at 0x95 RT2 ; +sbit at 0x96 SCL ; +sbit at 0x97 SDA ; +#endif + +#ifdef P1_EXT__x__x__x__x__x__x__T2EX__T2 +#undef P1_EXT__x__x__x__x__x__x__T2EX__T2 +// P1 alternate functions +sbit at 0x90 T2 ; +sbit at 0x91 T2EX ; +#endif + +#ifdef P2 +#undef P2 +sfr at 0xA0 P2 ; +// Bit registers +sbit at 0xA0 P2_0 ; +sbit at 0xA1 P2_1 ; +sbit at 0xA2 P2_2 ; +sbit at 0xA3 P2_3 ; +sbit at 0xA4 P2_4 ; +sbit at 0xA5 P2_5 ; +sbit at 0xA6 P2_6 ; +sbit at 0xA7 P2_7 ; +#endif + +#ifdef P2_EXT__AD15__AD14__AD13__AD12__AD11__AD10__AD9__AD8 +#undef P2_EXT__AD15__AD14__AD13__AD12__AD11__AD10__AD9__AD8 +// P89C668 specific bit registers at P2: +sbit at 0xA0 AD8 ; +sbit at 0xA1 AD9 ; +sbit at 0xA2 AD10 ; +sbit at 0xA3 AD11 ; +sbit at 0xA4 AD12 ; +sbit at 0xA5 AD13 ; +sbit at 0xA6 AD14 ; +sbit at 0xA7 AD15 ; +#endif + +#ifdef P3 +#undef P3 +sfr at 0xB0 P3 ; +// Bit registers +sbit at 0xB0 P3_0 ; +sbit at 0xB1 P3_1 ; +sbit at 0xB2 P3_2 ; +sbit at 0xB3 P3_3 ; +sbit at 0xB4 P3_4 ; +sbit at 0xB5 P3_5 ; +#ifndef MCS51REG_EXTERNAL_RAM +sbit at 0xB6 P3_6 ; +sbit at 0xB7 P3_7 ; +#endif +// alternate names +sbit at 0xB0 RXD ; +sbit at 0xB0 RXD0 ; +sbit at 0xB1 TXD ; +sbit at 0xB1 TXD0 ; +sbit at 0xB2 INT0 ; +sbit at 0xB3 INT1 ; +sbit at 0xB4 T0 ; +sbit at 0xB5 T1 ; +#ifndef MCS51REG_EXTERNAL_RAM +sbit at 0xB6 WR ; +sbit at 0xB7 RD ; +#endif +#endif + +#ifdef P3_EXT__x__x__CEX4__CEX3__x__x__x__x +#undef P3_EXT__x__x__CEX4__CEX3__x__x__x__x +// P89C668 specific bit registers at P3 (alternate names) +sbit at 0xB5 CEX4 ; +sbit at 0xB4 CEX3 ; +#endif + +#ifdef P4_AT_0X80 +#undef P4_AT_0X80 +sfr at 0x80 P4 ; // Port 4 - DS80C390 +// Bit registers +sbit at 0x80 P4_0 ; +sbit at 0x81 P4_1 ; +sbit at 0x82 P4_2 ; +sbit at 0x83 P4_3 ; +sbit at 0x84 P4_4 ; +sbit at 0x85 P4_5 ; +sbit at 0x86 P4_6 ; +sbit at 0x87 P4_7 ; +#endif + +#ifdef P4_AT_0XC0__CMT0__CMT1__CMSR5__CMSR4__CMSR3__CMSR2__CMSR1__CMSR0 +#undef P4_AT_0XC0__CMT0__CMT1__CMSR5__CMSR4__CMSR3__CMSR2__CMSR1__CMSR0 +sfr at 0xC0 P4 ; // Port 4, P80C552 specific +// Bit registers +sbit at 0xC0 CMSR0 ; +sbit at 0xC1 CMSR1 ; +sbit at 0xC2 CMSR2 ; +sbit at 0xC3 CMSR3 ; +sbit at 0xC4 CMSR4 ; +sbit at 0xC5 CMSR5 ; +sbit at 0xC6 CMT0 ; +sbit at 0xC7 CMT1 ; +#endif + +#ifdef P4_AT_0XC0__P4_7__P4_6__P4_5__P4_3__P4_2__P4_1__P4_0 +#undef P4_AT_0XC0__P4_7__P4_6__P4_5__P4_3__P4_2__P4_1__P4_0 +sfr at 0xC0 P4 ; // Port 4, T89C51 specific +// Bit registers +sbit at 0xC0 P4_0 ; +sbit at 0xC1 P4_1 ; +sbit at 0xC2 P4_2 ; +sbit at 0xC3 P4_3 ; +sbit at 0xC4 P4_4 ; +sbit at 0xC5 P4_5 ; +sbit at 0xC6 P4_6 ; +sbit at 0xC7 P4_7 ; +#endif + +#ifdef P4_AT_0XE8 +#undef P4_AT_0XE8 +sfr at 0xE8 P4 ; // Port 4 - SAB80515 & compatible microcontrollers +// Bit registers +sbit at 0xE8 P4_0 ; +sbit at 0xE9 P4_1 ; +sbit at 0xEA P4_2 ; +sbit at 0xEB P4_3 ; +sbit at 0xEC P4_4 ; +sbit at 0xED P4_5 ; +sbit at 0xEE P4_6 ; +sbit at 0xEF P4_7 ; +#endif + +#ifdef P4CNT +#undef P4CNT +sfr at 0x92 P4CNT ; // DS80C390 +// Not directly accessible bits +#define P4CNT_0 0x01 +#define P4CNT_1 0x02 +#define P4CNT_2 0x04 +#define P4CNT_3 0x08 +#define P4CNT_4 0x10 +#define P4CNT_5 0x20 +#define SBCAN 0x40 +#endif + +#ifdef P5_AT_0XA1 +#undef P5_AT_0XA1 +sfr at 0xA1 P5 ; // Port 5 - DS80C390 +#endif + +#ifdef P5_AT_0XE8 +#undef P5_AT_0XE8 +sfr at 0xE8 P5 ; // Port 5 - T89C51RD2 +// Bit registers +sbit at 0xE8 P5_0 ; +sbit at 0xE9 P5_1 ; +sbit at 0xEA P5_2 ; +sbit at 0xEB P5_3 ; +sbit at 0xEC P5_4 ; +sbit at 0xED P5_5 ; +sbit at 0xEE P5_6 ; +sbit at 0xEF P5_7 ; +#endif + +#ifdef P5CNT +#undef P5CNT +sfr at 0xA2 P5CNT ; // DS80C390 +// Not directly accessible bits +#define P5CNT_0 0x01 +#define P5CNT_1 0x02 +#define P5CNT_2 0x04 +#define C0_I_O 0x08 +#define C1_I_O 0x10 +#define SP1EC 0x20 +#define SBCAN0BA 0x40 +#define SBCAN1BA 0x80 +#endif + +#ifdef P5_AT_0XC4 +#undef P5_AT_0XC4 +sfr at 0xC4 P5 ; // Port 5, P80C552 specific +// Not directly accessible Bits. +#define ADC0 0x01 +#define ADC1 0x02 +#define ADC2 0x04 +#define ADC3 0x08 +#define ADC4 0x10 +#define ADC5 0x20 +#define ADC6 0x40 +#define ADC7 0x80 +#endif + +#ifdef P5_AT_0XF8 +#undef P5_AT_0XF8 +sfr at 0xF8 P5 ; // Port 5 - SAB80515 & compatible microcontrollers +// Bit registers +sbit at 0xF8 P5_0 ; +sbit at 0xF9 P5_1 ; +sbit at 0xFA P5_2 ; +sbit at 0xFB P5_3 ; +sbit at 0xFC P5_4 ; +sbit at 0xFD P5_5 ; +sbit at 0xFE P5_6 ; +sbit at 0xFF P5_7 ; +#endif + +#ifdef P6_AT_0XDB +#undef P6_AT_0XDB +sfr at 0xDB P6 ; // Port 6 - SAB80515 & compatible microcontrollers +#endif + +#ifdef P6_AT_0XFA +#undef P6_AT_0XFA +sfr at 0xFA P6 ; // Port 6 - SAB80517 specific +#endif + +#ifdef P7_AT_0XDB +#undef P7_AT_0XDB +sfr at 0xDB P7 ; // Port 7 - SAB80517 specific +#endif + +#ifdef P8_AT_0XDD +#undef P8_AT_0XDD +sfr at 0xDD P8 ; // Port 6 - SAB80517 specific +#endif + +#ifdef P9_AT_0XF9 +#undef P9_AT_0XF9 +sfr at 0xF9 P9; +#endif + +#ifdef PCON__SMOD__x__x__x__x__x__x__x +#undef PCON__SMOD__x__x__x__x__x__x__x +sfr at 0x87 PCON ; +// Not directly accessible PCON bits +#define SMOD 0x80 +#endif + +#ifdef PCON__SMOD__x__x__x__GF1__GF0__PD__IDL +#undef PCON__SMOD__x__x__x__GF1__GF0__PD__IDL +sfr at 0x87 PCON ; +// Not directly accessible PCON bits +#define IDL 0x01 +#define PD 0x02 +#define GF0 0x04 +#define GF1 0x08 +#define SMOD 0x80 +#endif + +#ifdef PCON__SMOD__x__x__WLE__GF1__GF0__PD__IDL +#undef PCON__SMOD__x__x__WLE__GF1__GF0__PD__IDL +sfr at 0x87 PCON ; // PCON, P80C552 specific +// Not directly accessible Bits. +#define IDL 0x01 +#define IDLE 0x01 /* same as IDL */ +#define PD 0x02 +#define GF0 0x04 +#define GF1 0x08 +#define WLE 0x10 +#define SMOD 0x80 +#endif + +#ifdef PCON__SMOD__PDS__IDLS__x__x__x__PD__IDL +#undef PCON__SMOD__PDS__IDLS__x__x__x__PD__IDL +sfr at 0x87 PCON ; +// Not directly accessible PCON bits +#define IDL 0x01 +#define IDLE 0x01 /* same as IDL */ +#define PD 0x02 +#define PDE 0x02 /* same as PD */ +#define IDLS 0x20 +#define PDS 0x40 +#define SMOD 0x80 +// alternate names +#define PCON_IDLE 0x01 +#define PCON_PDE 0x02 +#define PCON_GF0 0x04 +#define PCON_GF1 0x08 +#define PCON_IDLS 0x20 +#define PCON_PDS 0x40 +#define PCON_SMOD 0x80 +#endif + +#ifdef PCON__SMOD__POR__PFW__WTR__EPFW__EWT__STOP__IDL +#undef PCON__SMOD__POR__PFW__WTR__EPFW__EWT__STOP__IDL +sfr at 0x87 PCON ; +// Not directly accessible PCON bits +#define IDL 0x01 +#define IDLE 0x01 /* same as IDL */ +#define STOP 0x02 +#define EWT 0x04 +#define EPFW 0x08 +#define WTR 0x10 +#define PFW 0x20 +#define POR 0x40 +#define SMOD 0x80 +#endif + +#ifdef PCON__SMOD__SMOD0__x__x__GF1__GF0__STOP__IDLE +#undef PCON__SMOD__SMOD0__x__x__GF1__GF0__STOP__IDLE +sfr at 0x87 PCON ; +// Not directly accessible PCON bits +#define IDL 0x01 +#define IDLE 0x01 /* same as IDL */ +#define STOP 0x02 +#define GF0 0x04 +#define GF1 0x08 +#define SMOD0 0x40 +#define SMOD 0x80 +#endif + +#ifdef PCON__SMOD__SMOD0__OFDF__OFDE__GF1__GF0__STOP__IDLE +#undef PCON__SMOD__SMOD0__OFDF__OFDE__GF1__GF0__STOP__IDLE +sfr at 0x87 PCON ; +// Not directly accessible PCON bits +#define IDL 0x01 +#define IDLE 0x01 /* same as IDL */ +#define STOP 0x02 +#define GF0 0x04 +#define GF1 0x08 +#define OFDE 0x10 +#define OFDF 0x20 +#define SMOD0 0x40 +#define SMOD 0x80 +#define SMOD_0 0x80 /* same as SMOD */ +#endif + +#ifdef PCON__SMOD1__SMOD0__x__POF__GF1__GF0__PD__IDL +#undef PCON__SMOD1__SMOD0__x__POF__GF1__GF0__PD__IDL +sfr at 0x87 PCON ; +#define IDL 0x01 +#define PD 0x02 +#define GF0 0x04 +#define GF1 0x08 +#define POF 0x10 +#define SMOD0 0x40 +#define SMOD1 0x80 +#endif + +#ifdef PMR__CD1__CD0__SWB__x__XTOFF__ALEOFF__DME1__DME0 +#undef PMR__CD1__CD0__SWB__x__XTOFF__ALEOFF__DME1__DME0 +sfr at 0xC4 PMR ; // DS87C520, DS83C520 +// Not directly accessible bits +#define DME0 0x01 +#define DME1 0x02 +#define ALEOFF 0x04 +#define XTOFF 0x08 +#define SWB 0x20 +#define CD0 0x40 +#define CD1 0x80 +#endif + +#ifdef PMR__CD1__CD0__SWB__CTM__4X_2X__ALEOFF__x__x +#undef PMR__CD1__CD0__SWB__CTM__4X_2X__ALEOFF__x__x +sfr at 0xC4 PMR ; // DS80C390 +// Not directly accessible bits +#define ALEOFF 0x04 +#define XTOFF 0x08 +#define _4X_2X 0x10 +#define SWB 0x20 +#define CD0 0x40 +#define CD1 0x80 +#endif + +#ifdef PMR__CD1__CD0__SWB__CTM__4X_2X__ALEON__DME1__DME0 +#undef PMR__CD1__CD0__SWB__CTM__4X_2X__ALEON__DME1__DME0 +sfr at 0xC4 PMR ; // DS89C420 +// Not directly accessible bits +#define DME0 0x01 +#define DME1 0x02 +#define ALEON 0x04 +#define _4X_2X 0x08 +#define CTM 0x10 +#define SWB 0x20 +#define CD0 0x40 +#define CD1 0x80 +#endif + +#ifdef PRSC +#undef PRSC +sfr at 0xB4 PRSC; +#endif + +#ifdef PSW +#undef PSW +sfr at 0xD0 PSW ; +// Bit registers +sbit at 0xD0 P ; +sbit at 0xD1 F1 ; +sbit at 0xD2 OV ; +sbit at 0xD3 RS0 ; +sbit at 0xD4 RS1 ; +sbit at 0xD5 F0 ; +sbit at 0xD6 AC ; +sbit at 0xD7 CY ; +#endif + +#ifdef PWM0_AT_0XFC +#undef PWM0_AT_0XFC +sfr at 0xFC PWM0 ; // PWM register 0, P80C552 specific +#endif + +#ifdef PWM1_AT_0XFD +#undef PWM1_AT_0XFD +sfr at 0xFD PWM1 ; // PWM register 1, P80C552 specific +#endif + +#ifdef PWMP_AT_0XFE +#undef PWMP_AT_0XFE +sfr at 0xFE PWMP ; // PWM prescaler, P80C552 specific +#endif + +#ifdef RCAP2H +#undef RCAP2H +sfr at 0xCB RCAP2H ; +#endif + +#ifdef RCAP2L +#undef RCAP2L +sfr at 0xCA RCAP2L ; +#endif + +#ifdef RNR +#undef RNR +sfr at 0xCF RNR ; +#endif + +#ifdef ROMSIZE__x__x__x__x__x__RMS2__RMS1__RMS0 +#undef ROMSIZE__x__x__x__x__x__RMS2__RMS1__RMS0 +sfr at 0xC2 ROMSIZE ; // DS87C520, DS83C520 +// Not directly accessible bits +#define RSM0 0x01 +#define RSM1 0x02 +#define RSM2 0x04 +#endif + +#ifdef ROMSIZE__x__x__x__x__PRAME__RMS2__RMS1__RMS0 +#undef ROMSIZE__x__x__x__x__PRAME__RMS2__RMS1__RMS0 +sfr at 0xC2 ROMSIZE ; // DS89C420 +// Not directly accessible bits +#define RSM0 0x01 +#define RSM1 0x02 +#define RSM2 0x04 +#define PRAME 0x08 +#endif + +#ifdef ROMSIZE__HBPF__BPF__TE__MOVCX__PRAME__RMS2__RMS1__RMS0 +#undef ROMSIZE__HBPF__BPF__TE__MOVCX__PRAME__RMS2__RMS1__RMS0 +sfr at 0xC2 ROMSIZE ; // DS87C520, DS83C520 +// Not directly accessible bits +#define RSM0 0x01 +#define RSM1 0x02 +#define RSM2 0x04 +#define PRAME 0x08 +#define MOVCX 0x10 +#define TE 0x20 +#define BPF 0x40 +#define HBPF 0x80 +#endif + +#ifdef RPCTL +#undef RPCTL +sfr at 0xD8 RPCTL ; // Dallas DS5001 specific +sbit at 0xD8 RG0 ; +sbit at 0xD9 RPCON ; +sbit at 0xDA DMA ; +sbit at 0xDB IBI ; +sbit at 0xDC AE ; +sbit at 0xDD EXBS ; +sbit at 0xDF RNR_FLAG ; +#endif + +#ifdef RTE__TP47__TP46__RP45__RP44__RP43__RP42__RP41__RP40 +#undef RTE__TP47__TP46__RP45__RP44__RP43__RP42__RP41__RP40 +sfr at 0xEF RTE ; // Reset/toggle enable, P80C552 specific +// Not directly accessible Bits. +#define RP40 0x01 +#define RP41 0x02 +#define RP42 0x04 +#define RP43 0x08 +#define RP44 0x10 +#define RP45 0x20 +#define TP46 0x40 +#define TP47 0x80 +#endif + +#ifdef S0BUF +#undef S0BUF +sfr at 0x99 S0BUF ; // serial channel 0 buffer register SAB80517 specific +#endif + +#ifdef S0CON__SM0__SM1__SM2__REN__TB8__RB8__TI__RI +#undef S0CON__SM0__SM1__SM2__REN__TB8__RB8__TI__RI +sfr at 0x98 S0CON ; // serial channel 0 control register P80C552 specific +// Bit registers +// Already defined in SCON +//sbit at 0x98 RI0 ; +//sbit at 0x99 TI0 ; +//sbit at 0x9A RB8 ; +//sbit at 0x9B TB8 ; +//sbit at 0x9C REN ; +//sbit at 0x9D SM2 ; +//sbit at 0x9E SM1 ; +//sbit at 0x9F SM0 ; +#endif + +#ifdef S0CON__SM0__SM1__SM20__REN0__TB80__RB80__TI0__RI0 +#undef S0CON__SM0__SM1__SM20__REN0__TB80__RB80__TI0__RI0 +// serial channel 0 buffer register SAB80517 specific(same as stock SCON) +sfr at 0x98 S0CON ; +sbit at 0x98 RI0 ; +sbit at 0x99 TI0 ; +sbit at 0x9A RB80 ; +sbit at 0x9B TB80 ; +sbit at 0x9C REN0 ; +sbit at 0x9D SM20 ; +sbit at 0x9E SM1 ; +sbit at 0x9F SM0 ; +#endif + +#ifdef S0RELL +#undef S0RELL +sfr at 0xAA S0RELL ; // serial channel 0 reload register low byte SAB80517 specific +#endif + +#ifdef S0RELH +#undef S0RELH +sfr at 0xBA S0RELH ; // serial channel 0 reload register high byte SAB80517 specific +#endif + +#ifdef S1ADR__x__x__x__x__x__x__x__GC +#undef S1ADR__x__x__x__x__x__x__x__GC +sfr at 0xDB S1ADR ; // Serial 1 address, P80C552 specific +// Not directly accessible Bits. +#define GC 0x01 +#endif + +#ifdef S1BUF +#undef S1BUF +sfr at 0x9C S1BUF ; // serial channel 1 buffer register SAB80517 specific +#endif + +#ifdef S1CON_AT_0X9B +#undef S1CON_AT_0X9B +sfr at 0x9B S1CON ; // serial channel 1 control register SAB80517 specific +#endif + +#ifdef S1CON__CR2__ENS1__STA__ST0__SI__AA__CR1__CR0 +#undef S1CON__CR2__ENS1__STA__ST0__SI__AA__CR1__CR0 +sfr at 0xD8 S1CON ; // Serial 1 control, P80C552 specific +sfr at 0xD8 SICON ; // sometimes called SICON +// Bit register +sbit at 0xD8 CR0 ; +sbit at 0xD9 CR1 ; +sbit at 0xDA AA ; +sbit at 0xDB SI ; +sbit at 0xDC ST0 ; +sbit at 0xDD STA ; +sbit at 0xDE ENS1 ; +sbit at 0xDF CR2 ; +#endif + +#ifdef S1DAT_AT_0XDA +#undef S1DAT_AT_0XDA +sfr at 0xDA S1DAT ; // Serial 1 data, P80C552 specific +sfr at 0xDA SIDAT ; // sometimes called SIDAT +#endif + +#ifdef S1IST_AT_0XDC +#undef S1IST_AT_0XDC +// P89C668 specific +sfr at 0xDC S1IST ; +#endif + +#ifdef S1RELL +#undef S1RELL +sfr at 0x9D S1RELL ; // serial channel 1 reload register low byte SAB80517 specific +#endif + +#ifdef S1RELH +#undef S1RELH +sfr at 0xBB S1RELH ; // serial channel 1 reload register high byte SAB80517 specific +#endif + +#ifdef S1STA__SC4__SC3__SC2__SC1__SC0__x__x__x +#undef S1STA__SC4__SC3__SC2__SC1__SC0__x__x__x +sfr at 0xD9 S1STA ; // Serial 1 status, P80C552 specific +// Not directly accessible Bits. +#define SC0 0x08 +#define SC1 0x10 +#define SC2 0x20 +#define SC3 0x40 +#define SC4 0x80 +#endif + +#ifdef SADR_AT_0XA9 +#undef SADR_AT_0XA9 +sfr at 0xA9 SADDR ; +#endif + +#ifdef SADDR0 +#undef SADDR0 +// DS80C320 specific +sfr at 0xA9 SADDR0 ; +#endif + +#ifdef SADDR1 +#undef SADDR1 +// DS80C320 specific +sfr at 0xAA SADDR1 ; +#endif + +#ifdef SADEN_AT_0XB9 +#undef SADEN_AT_0XB9 +sfr at 0xB9 SADEN ; +#endif + +#ifdef SADEN0 +#undef SADEN0 +// DS80C320 & DS80C390 specific +sfr at 0xB9 SADEN0 ; +#endif + +#ifdef SADEN1 +#undef SADEN1 +// DS80C320 & DS80C390 specific +sfr at 0xBA SADEN1 ; +#endif + +#ifdef SBUF +#undef SBUF +sfr at 0x99 SBUF ; +sfr at 0x99 SBUF0 ; +#endif + +#ifdef SBUF1 +#undef SBUF1 +// DS80C320 & DS80C390 specific +sfr at 0xC1 SBUF1 ; +#endif + +#ifdef SCON +#undef SCON +sfr at 0x98 SCON ; +// Bit registers +sbit at 0x98 RI ; +sbit at 0x99 TI ; +sbit at 0x9A RB8 ; +sbit at 0x9B TB8 ; +sbit at 0x9C REN ; +sbit at 0x9D SM2 ; +sbit at 0x9E SM1 ; +sbit at 0x9F SM0 ; +#endif + +#ifdef SCON0 +#undef SCON0 +sfr at 0x98 SCON0 ; +// Bit registers +sbit at 0x98 RI_0 ; +sbit at 0x99 TI_0 ; +sbit at 0x9A RB8_0 ; +sbit at 0x9B TB8_0 ; +sbit at 0x9C REN_0 ; +sbit at 0x9D SM2_0 ; +sbit at 0x9E SM1_0 ; +sbit at 0x9F SM0_0 ; +sbit at 0x9F FE_0 ; +sbit at 0x9F SM0_FE_0 ; +#endif + +#ifdef SCON1 +#undef SCON1 +// DS80C320 - 80C390 specific +sfr at 0xC0 SCON1 ; +// Bit registers +sbit at 0xC0 RI_1 ; +sbit at 0xC1 TI_1 ; +sbit at 0xC2 RB8_1 ; +sbit at 0xC3 TB8_1 ; +sbit at 0xC4 REN_1 ; +sbit at 0xC5 SM2_1 ; +sbit at 0xC6 SM1_1 ; +sbit at 0xC7 SM0_1 ; +sbit at 0xC7 FE_1 ; +sbit at 0xC7 SM0_FE_1 ; +#endif + +#ifdef SETMSK +#undef SETMSK +sfr at 0xA5 SETMSK; +#endif + +#ifdef SP +#undef SP +sfr at 0x81 SP ; +#endif + +#ifdef SPCR +#undef SPCR +sfr at 0xD5 SPCR ; // AT89S53 specific +// Not directly accesible bits +#define SPR0 0x01 +#define SPR1 0x02 +#define CPHA 0x04 +#define CPOL 0x08 +#define MSTR 0x10 +#define DORD 0x20 +#define SPE 0x40 +#define SPIE 0x80 +#endif + +#ifdef SPDR +#undef SPDR +sfr at 0x86 SPDR ; // AT89S53 specific +// Not directly accesible bits +#define SPD_0 0x01 +#define SPD_1 0x02 +#define SPD_2 0x04 +#define SPD_3 0x08 +#define SPD_4 0x10 +#define SPD_5 0x20 +#define SPD_6 0x40 +#define SPD_7 0x80 +#endif + +#ifdef SPSR +#undef SPSR +sfr at 0xAA SPSR ; // AT89S53 specific +// Not directly accesible bits +#define SPIF 0x40 +#define WCOL 0x80 +#endif + +#ifdef SRELH +#undef SRELH +sfr at 0xBA SRELH ; // Baudrate generator reload high +#endif + +#ifdef SRELL +#undef SRELL +sfr at 0xAA SRELL ; // Baudrate generator reload low +#endif + +#ifdef STATUS__PIP__HIP__LIP__x__x__x__x__x +#undef STATUS__PIP__HIP__LIP__x__x__x__x__x +// DS80C320 specific +sfr at 0xC5 STATUS ; +// Not directly accessible Bits. DS80C320 specific +#define LIP 0x20 +#define HIP 0x40 +#define PIP 0x80 +#endif + +#ifdef STATUS__PIP__HIP__LIP__x__SPTA1__SPRA1__SPTA0__SPRA0 +#undef STATUS__PIP__HIP__LIP__x__SPTA1__SPRA1__SPTA0__SPRA0 +sfr at 0xC5 STATUS ; // DS80C390 specific +// Not directly accessible Bits. +#define SPRA0 0x01 +#define SPTA0 0x02 +#define SPRA1 0x04 +#define SPTA1 0x08 +#define LIP 0x20 +#define HIP 0x40 +#define PIP 0x80 +#endif + +#ifdef STATUS__PIS2__PIS1__PIS0__x__SPTA1__SPRA1__SPTA0__SPRA0 +#undef STATUS__PIS2__PIS1__PIS0__x__SPTA1__SPRA1__SPTA0__SPRA0 +sfr at 0xC5 STATUS ; // DS89C420 specific +// Not directly accessible Bits. +#define SPRA0 0x01 +#define SPTA0 0x02 +#define SPRA1 0x04 +#define SPTA1 0x08 +#define PIS0 0x20 +#define PIS1 0x40 +#define PIS2 0x80 +#endif + +#ifdef STATUS__PIP__HIP__LIP__x__SPTA1__SPRA1__SPTA0__SPRA0 +#undef STATUS__PIP__HIP__LIP__x__SPTA1__SPRA1__SPTA0__SPRA0 +sfr at 0xC5 STATUS ; // DS80C390 specific +// Not directly accessible Bits. +#define SPRA0 0x01 +#define SPTA0 0x02 +#define SPRA1 0x04 +#define SPTA1 0x08 +#define LIP 0x20 +#define HIP 0x40 +#define PIP 0x80 +#endif + +#ifdef STATUS__PIP__HIP__LIP__XTUP__SPTA2__SPTA1__SPTA0__SPRA0 +#undef STATUS__PIP__HIP__LIP__XTUP__SPTA2__SPTA1__SPTA0__SPRA0 +sfr at 0xC5 STATUS ; // DS87C520 & DS83520specific +// Not directly accessible Bits. +#define SPRA0 0x01 +#define SPTA0 0x02 +#define SPTA1 0x04 +#define SPTA2 0x08 +#define XTUP 0x10 +#define LIP 0x20 +#define HIP 0x40 +#define PIP 0x80 +#endif + +#ifdef STATUS__ST7__ST6__ST5__ST4__IA0__F0__IBF__OBF +#undef STATUS__ST7__ST6__ST5__ST4__IA0__F0__IBF__OBF +sfr at 0xDA STATUS ; // DS5001specific +// Not directly accessible Bits. +#define OBF 0x01 +#define IBF 0x02 +#define F0 0x04 +#define IA0 0x08 +#define ST4 0x10 +#define ST5 0x20 +#define ST6 0x40 +#define ST7 0x80 +#endif + +#ifdef STE__TG47__TG46__SP45__SP44__SP43__SP42__SP41__SP40 +#undef STE__TG47__TG46__SP45__SP44__SP43__SP42__SP41__SP40 +sfr at 0xEE STE ; // Set enable, P80C552 specific +// Not directly accessible Bits. +#define SP40 0x01 +#define SP41 0x02 +#define SP42 0x04 +#define SP43 0x08 +#define SP44 0x10 +#define SP45 0x20 +#define TG46 0x40 +#define TG47 0x80 +#endif + +#ifdef SYSCON +#undef SYSCON +sfr at 0xB1 SYSCON ; // XRAM Controller Access Control +// SYSCON bits +#define SYSCON_XMAP0 0x01 +#define SYSCON_XMAP1 0x02 +#define SYSCON_RMAP 0x10 +#define SYSCON_EALE 0x20 +#endif + +#ifdef SYSCON1 +#undef SYSCON1 +sfr at 0xB2 SYSCON1; +#endif + +#ifdef T2 +#undef T2 +sfr at 0xCC T2; +#endif + +#ifdef T2CON__TF2__EXF2__RCLK__TCLK__EXEN2__TR2__C_T2__CP_RL2 +#undef T2CON__TF2__EXF2__RCLK__TCLK__EXEN2__TR2__C_T2__CP_RL2 +sfr at 0xC8 T2CON ; +// Definitions for the 8052 compatible microcontrollers. +// Bit registers +sbit at 0xC8 CP_RL2 ; +sbit at 0xC9 C_T2 ; +sbit at 0xCA TR2 ; +sbit at 0xCB EXEN2 ; +sbit at 0xCC TCLK ; +sbit at 0xCD RCLK ; +sbit at 0xCE EXF2 ; +sbit at 0xCF TF2 ; +// alternate names +sbit at 0xC8 T2CON_0 ; +sbit at 0xC9 T2CON_1 ; +sbit at 0xCA T2CON_2 ; +sbit at 0xCB T2CON_3 ; +sbit at 0xCC T2CON_4 ; +sbit at 0xCD T2CON_5 ; +sbit at 0xCE T2CON_6 ; +sbit at 0xCF T2CON_7 ; +#endif + +#ifdef T2CON__T2PS__I3FR__I2FR__T2R1__T2R0__T2CM__T2I1__T2I0 +#undef T2CON__T2PS__I3FR__I2FR__T2R1__T2R0__T2CM__T2I1__T2I0 +sfr at 0xC8 T2CON ; +// Definitions for the Infineon / Siemens SAB80515, SAB80515A, SAB80517 +// Bit registers +sbit at 0xC8 T2I0 ; +sbit at 0xC9 T2I1 ; +sbit at 0xCA T2CM ; +sbit at 0xCB T2R0 ; +sbit at 0xCC T2R1 ; +sbit at 0xCD I2FR ; +sbit at 0xCE I3FR ; +sbit at 0xCF T2PS ; +// alternate names +sbit at 0xC8 T2CON_0 ; +sbit at 0xC9 T2CON_1 ; +sbit at 0xCA T2CON_2 ; +sbit at 0xCB T2CON_3 ; +sbit at 0xCC T2CON_4 ; +sbit at 0xCD T2CON_5 ; +sbit at 0xCE T2CON_6 ; +sbit at 0xCF T2CON_7 ; +#endif + +#ifdef T2MOD__x__x__x__D13T1__D13T2__x__T2OE__DCEN +#undef T2MOD__x__x__x__D13T1__D13T2__x__T2OE__DCEN +// Definitions for the timer/counter 2 of the Atmel & Dallas microcontrollers +sfr at 0xC9 T2MOD ; +// Not not directly accessible T2MOD bits +#define DCEN 0x01 +#define T2OE 0x02 +#define D13T2 0x08 +#define D13T1 0x10 +#endif + +#ifdef T2MOD__x__x__x__x__x__x__T2OE__DCEN +#undef T2MOD__x__x__x__x__x__x__T2OE__DCEN +// Definitions for the timer/counter 2 of the Atmel 89x52 microcontroller +sfr at 0xC9 T2MOD ; +// Not not directly accessible T2MOD bits +#define DCEN 0x01 +#define T2OE 0x02 +// Alternate names +#define DCEN_ 0x01 +#define T2OE_ 0x02 +#endif + +#ifdef T3_AT_0XFF +#undef T3_AT_0XFF +sfr at 0xFF T3 ; // Timer 3, P80C552 specific +#endif + +#ifdef TA +#undef TA +// DS500x, DS80C320 & DS80C390 specific +sfr at 0xC7 TA ; +#endif + +#ifdef TCON +#undef TCON +sfr at 0x88 TCON ; +// Bit registers +sbit at 0x88 IT0 ; +sbit at 0x89 IE0 ; +sbit at 0x8A IT1 ; +sbit at 0x8B IE1 ; +sbit at 0x8C TR0 ; +sbit at 0x8D TF0 ; +sbit at 0x8E TR1 ; +sbit at 0x8F TF1 ; +#endif + +#ifdef TH0 +#undef TH0 +sfr at 0x8C TH0 ; +#endif + +#ifdef TH1 +#undef TH1 +sfr at 0x8D TH1 ; +#endif + +#ifdef TH2 +#undef TH2 +sfr at 0xCD TH2 ; +#endif + +#ifdef TL0 +#undef TL0 +sfr at 0x8A TL0 ; +#endif + +#ifdef TL1 +#undef TL1 +sfr at 0x8B TL1 ; +#endif + +#ifdef TL2 +#undef TL2 +sfr at 0xCC TL2 ; +#endif + +#ifdef TMOD +#undef TMOD +sfr at 0x89 TMOD ; +// Not directly accessible TMOD bits +#define T0_M0 0x01 +#define T0_M1 0x02 +#define T0_CT 0x04 +#define T0_GATE 0x08 +#define T1_M0 0x10 +#define T1_M1 0x20 +#define T1_CT 0x40 +#define T1_GATE 0x80 + +#define T0_MASK 0x0F +#define T1_MASK 0xF0 +#endif + +#ifdef TM2CON__T2IS1__T2IS0__T2ER__T2B0__T2P1__T2P0__T2MS1__T2MS0 +#undef TM2CON__T2IS1__T2IS0__T2ER__T2B0__T2P1__T2P0__T2MS1__T2MS0 +sfr at 0xEA TM2CON ; // Timer 2 control, P80C552 specific +// Not directly accessible Bits. +#define T2MS0 0x01 +#define T2MS1 0x02 +#define T2P0 0x04 +#define T2P1 0x08 +#define T2B0 0x10 +#define T2ER 0x20 +#define T2IS0 0x40 +#define T2IS1 0x80 +#endif + +#ifdef TM2IR__T20V__CMI2__CMI1__CMI0__CTI3__CTI2__CTI1__CTI0 +#undef TM2IR__T20V__CMI2__CMI1__CMI0__CTI3__CTI2__CTI1__CTI0 +sfr at 0xC8 TM2IR ; // Timer 2 int flag reg, P80C552 specific +// Bit register +sbit at 0xC8 CTI0 ; +sbit at 0xC9 CTI1 ; +sbit at 0xCA CTI2 ; +sbit at 0xCB CTI3 ; +sbit at 0xCC CMI0 ; +sbit at 0xCD CMI1 ; +sbit at 0xCE CMI2 ; +sbit at 0xCF T20V ; +#endif + +#ifdef TMH2_AT_0XED +#undef TMH2_AT_0XED +sfr at 0xED TMH2 ; // Timer high 2, P80C552 specific +#endif + +#ifdef TML2_AT_0XEC +#undef TML2_AT_0XEC +sfr at 0xEC TML2 ; // Timer low 2, P80C552 specific +#endif + +#ifdef WCON +#undef WCON +sfr at 0x96 WCON ; // AT89S53 specific +// Not directly accesible bits +#define WDTEN 0x01 +#define WDTRST 0x02 +#define DPS 0x04 +#define PS0 0x20 +#define PS1 0x40 +#define PS2 0x80 +#endif + +#ifdef WDCON +#undef WDCON +// DS80C320 - 390, DS89C420, etc. specific +sfr at 0xD8 WDCON ; +// Bit registers +sbit at 0xD8 RWT ; +sbit at 0xD9 EWT ; +sbit at 0xDA WTRF ; +sbit at 0xDB WDIF ; +sbit at 0xDC PFI ; +sbit at 0xDD EPFI ; +sbit at 0xDE POR ; +sbit at 0xDF SMOD_1 ; +#endif + +#ifdef WDTPRG_AT_0XA7 +#undef WDTPRG_AT_0XA7 +sfr at 0xA7 WDTPRG ; +#define WDTRPRG_S0 0x01 +#define WDTRPRG_S1 0x02 +#define WDTRPRG_S2 0x04 +#endif + +#ifdef WDTREL +#undef WDTREL +sfr at 0x86 WDTREL ; // Watchdof Timer reload register +#endif + +#ifdef WDTRST_AT_0XA6 +#undef WDTRST_AT_0XA6 +sfr at 0xA6 WDTRST ; +#endif + +#ifdef XPAGE +#undef XPAGE +sfr at 0x91 XPAGE ; // Page Address Register for Extended On-Chip Ram - Infineon / Siemens SAB80515A specific +#endif + +///////////////////////// +/// Interrupt vectors /// +///////////////////////// + +// Interrupt numbers: address = (number * 8) + 3 +#define IE0_VECTOR 0 // 0x03 external interrupt 0 +#define TF0_VECTOR 1 // 0x0b timer 0 +#define IE1_VECTOR 2 // 0x13 external interrupt 1 +#define TF1_VECTOR 3 // 0x1b timer 1 +#define SI0_VECTOR 4 // 0x23 serial port 0 + +#ifdef MICROCONTROLLER_AT89S53 +#define TF2_VECTOR 5 /* 0x2B timer 2 */ +#define EX2_VECTOR 5 /* 0x2B external interrupt 2 */ +#endif + +#ifdef MICROCONTROLLER_AT89X52 +#define TF2_VECTOR 5 /* 0x2B timer 2 */ +#define EX2_VECTOR 5 /* 0x2B external interrupt 2 */ +#endif + +#ifdef MICROCONTROLLER_AT89X55 +#define TF2_VECTOR 5 /* 0x2B timer 2 */ +#define EX2_VECTOR 5 /* 0x2B external interrupt 2 */ +#endif + +#ifdef MICROCONTROLLER_DS5000 +#define PFW_VECTOR 5 /* 0x2B */ +#endif + +#ifdef MICROCONTROLLER_DS5001 +#define PFW_VECTOR 5 /* 0x2B */ +#endif + +#ifdef MICROCONTROLLER_DS80C32X +#define TF2_VECTOR 5 /* 0x2B */ +#define PFI_VECTOR 6 /* 0x33 */ +#define SIO1_VECTOR 7 /* 0x3B */ +#define IE2_VECTOR 8 /* 0x43 */ +#define IE3_VECTOR 9 /* 0x4B */ +#define IE4_VECTOR 10 /* 0x53 */ +#define IE5_VECTOR 11 /* 0x5B */ +#define WDI_VECTOR 12 /* 0x63 */ +#endif + +#ifdef MICROCONTROLLER_DS89C420 +#define TF2_VECTOR 5 /* 0x2B */ +#define PFI_VECTOR 6 /* 0x33 */ +#define SIO1_VECTOR 7 /* 0x3B */ +#define IE2_VECTOR 8 /* 0x43 */ +#define IE3_VECTOR 9 /* 0x4B */ +#define IE4_VECTOR 10 /* 0x53 */ +#define IE5_VECTOR 11 /* 0x5B */ +#define WDI_VECTOR 12 /* 0x63 */ +#endif + +#ifdef MICROCONTROLLER_DS8XC520 +#define TF2_VECTOR 5 /* 0x2B */ +#define PFI_VECTOR 6 /* 0x33 */ +#define SIO1_VECTOR 7 /* 0x3B */ +#define IE2_VECTOR 8 /* 0x43 */ +#define IE3_VECTOR 9 /* 0x4B */ +#define IE4_VECTOR 10 /* 0x53 */ +#define IE5_VECTOR 11 /* 0x5B */ +#define WDI_VECTOR 12 /* 0x63 */ +#endif + +#ifdef MICROCONTROLLER_P80C552 +#define SIO1_VECTOR 5 // 0x2B SIO1 (I2C) +#define CT0_VECTOR 6 // 0x33 T2 capture 0 +#define CT1_VECTOR 7 // 0x3B T2 capture 1 +#define CT2_VECTOR 8 // 0x43 T2 capture 2 +#define CT3_VECTOR 9 // 0x4B T2 capture 3 +#define ADC_VECTOR 10 // 0x53 ADC completion +#define CM0_VECTOR 11 // 0x5B T2 compare 0 +#define CM1_VECTOR 12 // 0x63 T2 compare 1 +#define CM2_VECTOR 13 // 0x6B T2 compare 2 +#define TF2_VECTOR 14 // 0x73 T2 overflow +#endif + +#ifdef MICROCONTROLLER_P89C668 +#define SIO1_VECTOR 5 // 0x2b SIO1 (i2c) +#define PCA_VECTOR 6 // 0x33 (Programmable Counter Array) +#define TF2_VECTOR 7 // 0x3B (Timer 2) +#endif + +#ifdef MICROCONTROLLER_SAB80509 +#define RI0_VECTOR 4 // 0x23 serial port 0 +#define TI0_VECTOR 4 // 0x23 serial port 0 +#define TF2_VECTOR 5 // 0x2B timer 2 +#define EX2_VECTOR 5 // 0x2B external interrupt 2 + // 0x33 + // 0x3B +#define IADC_VECTOR 8 // 0x43 A/D converter interrupt +#define IEX2_VECTOR 9 // 0x4B external interrupt 2 +#define IEX3_VECTOR 10 // 0x53 external interrupt 3 +#define IEX4_VECTOR 11 // 0x5B external interrupt 4 +#define IEX5_VECTOR 12 // 0x63 external interrupt 5 +#define IEX6_VECTOR 13 // 0x6B external interrupt 6 + // 0x73 not used + // 0x7B not used +#define SI1_VECTOR 16 // 0x83 serial port 1 +#define RI1_VECTOR 16 // 0x83 serial port 1 +#define TI1_VECTOR 16 // 0x83 serial port 1 + // 0x8B not used +#define ICM_VECTOR 18 // 0x93 compare registers CM0-CM7 +#define CTF_VECTOR 19 // 0x9B compare time overflow +#define ICS_VECTOR 20 // 0xA3 compare register COMSET +#define ICR_VECTOR 21 // 0xAB compare register COMCLR +#define ICC_VECTOR 26 // 0xD3 compare event interrupt ICC10-ICC17 +#define CT1_VECTOR 27 // 0xDB compare timer 1 oveflow +#endif + +#ifdef MICROCONTROLLER_SAB80515 +#define TF2_VECTOR 5 // 0x2B timer 2 +#define EX2_VECTOR 5 // 0x2B external interrupt 2 +#define IADC_VECTOR 8 // 0x43 A/D converter interrupt +#define IEX2_VECTOR 9 // 0x4B external interrupt 2 +#define IEX3_VECTOR 10 // 0x53 external interrupt 3 +#define IEX4_VECTOR 11 // 0x5B external interrupt 4 +#define IEX5_VECTOR 12 // 0x63 external interrupt 5 +#define IEX6_VECTOR 13 // 0x6B external interrupt 6 +#endif + +#ifdef MICROCONTROLLER_SAB80515A +#define TF2_VECTOR 5 // 0x2B timer 2 +#define EX2_VECTOR 5 // 0x2B external interrupt 2 +#define IADC_VECTOR 8 // 0x43 A/D converter interrupt +#define IEX2_VECTOR 9 // 0x4B external interrupt 2 +#define IEX3_VECTOR 10 // 0x53 external interrupt 3 +#define IEX4_VECTOR 11 // 0x5B external interrupt 4 +#define IEX5_VECTOR 12 // 0x63 external interrupt 5 +#define IEX6_VECTOR 13 // 0x6B external interrupt 6 +#endif + +#ifdef MICROCONTROLLER_SAB80517 +#define TF2_VECTOR 5 // 0x2B timer 2 +#define EX2_VECTOR 5 // 0x2B external interrupt 2 +#define IADC_VECTOR 8 // 0x43 A/D converter interrupt +#define IEX2_VECTOR 9 // 0x4B external interrupt 2 +#define IEX3_VECTOR 10 // 0x53 external interrupt 3 +#define IEX4_VECTOR 11 // 0x5B external interrupt 4 +#define IEX5_VECTOR 12 // 0x63 external interrupt 5 +#define IEX6_VECTOR 13 // 0x6B external interrupt 6 + // 0x73 not used + // 0x7B not used +#define SI1_VECTOR 16 // 0x83 serial port 1 + // 0x8B not used + // 0x93 not used +#define COMPARE_VECTOR 19 // 0x9B compare +#endif + +#ifdef MICROCONTORLLER_T89C51RD2 +#define TF2_VECTOR 5 /* 0x2B timer 2 */ +#define PCA_VECTOR 6 /* 0x33 Programmable Counter Array interrupt */ +#endif /* MICROCONTORLLER_T89C51RD2 */ + +#endif // End of the header -> #ifndef MCS51REG_H diff --git a/device/include/mcs51/msc1210.h b/device/include/mcs51/msc1210.h new file mode 100644 index 0000000..4dcd7ca --- /dev/null +++ b/device/include/mcs51/msc1210.h @@ -0,0 +1,316 @@ +/*-------------------------------------------------------------------------- + * Register Declarations for Texas Intruments MSC12xx MCU family + * + * Written By - Philippe Latu / philippe.latu(at)linux-france.org + * $Id: msc1210.h 4776 2007-04-29 13:15:51Z borutr $ + * + * Copyright (C) 2006 Philippe Latu + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + * + *---------------------------------------------------------------------------*/ + +#ifndef __MSC1210_H__ +#define __MSC1210_H__ + +/* BYTE Registers with bit definitions */ + +__sfr __at (0x80) P0; /* Port 0 */ +__sfr __at (0x81) SP; /* Stack Pointer */ +__sfr __at (0x82) DPL; /* Data Pointer 0: low byte */ +__sfr __at (0x82) DPL0; /* Data Pointer 0: low byte */ +__sfr __at (0x83) DPH; /* Data Pointer 0: high byte */ +__sfr __at (0x83) DPH0; /* Data Pointer 0: high byte */ +__sfr __at (0x84) DPL1; /* Data Pointer 1: low byte */ +__sfr __at (0x85) DPH1; /* Data Pointer 1: high byte */ +__sfr __at (0x86) DPS; /* Data Pointer Select */ +__sfr __at (0x87) PCON; /* Power Control */ +__sfr __at (0x88) TCON; /* Timer Control */ + /* _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_ */ + /* |TF1|TR1|TF0|TR0|IE1|IT1|IE0|IT0| */ + __sbit __at (0x88) IT0; /* External Interrupt 0 Type */ + __sbit __at (0x89) IE0; /* External Interrupt 0 Edge Flag */ + __sbit __at (0x8a) IT1; /* External Interrupt 1 Type */ + __sbit __at (0x8b) IE1; /* External Interrupt 1 Edge Flag */ + __sbit __at (0x8c) TR0; /* Timer 0 On/Off Control */ + __sbit __at (0x8d) TF0; /* Timer 0 Overflow Flag */ + __sbit __at (0x8e) TR1; /* Timer 1 On/Off Control */ + __sbit __at (0x8f) TF1; /* Timer 1 Overflow Flag */ +__sfr __at (0x89) TMOD; /* Timer Mode */ +__sfr __at (0x8a) TL0; /* Timer 0: low byte */ +__sfr __at (0x8b) TL1; /* Timer 1: low byte */ +__sfr __at (0x8c) TH0; /* Timer 0: high byte */ +__sfr __at (0x8d) TH1; /* Timer 1: high byte */ +__sfr __at (0x8e) CKCON; /* Clock Control */ +__sfr __at (0x8f) MWS; /* Memory Write Select */ +__sfr __at (0x90) P1; /* Port 1 */ + /* _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_ */ + /* | | | | | | |T2EX|T2 | */ + __sbit __at (0x90) T2; /* Timer 2 External Input */ + __sbit __at (0x91) T2EX; /* Timer 2 Capture/Reload */ +__sfr __at (0x91) EXIF; /* External Interrupt Flag */ +__sfr __at (0x92) MPAGE; /* Memory Page */ +__sfr __at (0x92) _XPAGE; /* XDATA/PDATA PAGE */ +__sfr __at (0x93) CADDR; /* Configuration Address Register */ +__sfr __at (0x94) CDATA; /* Configuration Data Register */ +__sfr __at (0x95) MCON; /* Memory Configuration */ +__sfr __at (0x98) SCON; /* Serial Control 0 */ +__sfr __at (0x98) SCON0; /* Serial Control 0 */ + /* _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_ */ + /* |SM0|SM1|SM2|REN|TB8|RB8|TI |RI | */ + __sbit __at (0x98) RI; /* Receive Interrupt Flag */ + __sbit __at (0x98) RI0; /* Receive Interrupt Flag */ + __sbit __at (0x98) RI_0; /* Receive Interrupt Flag */ + __sbit __at (0x99) TI; /* Transmit Interrupt Flag */ + __sbit __at (0x99) TI0; /* Transmit Interrupt Flag */ + __sbit __at (0x99) TI_0; /* Transmit Interrupt Flag */ + __sbit __at (0x9a) RB8; /* Receive Bit 8 */ + __sbit __at (0x9a) RB8_0; /* Receive Bit 8 */ + __sbit __at (0x9b) TB8; /* Transmit Bit 8 */ + __sbit __at (0x9b) TB8_0; /* Transmit Bit 8 */ + __sbit __at (0x9c) REN; /* Receive Enable */ + __sbit __at (0x9c) REN_0; /* Receive Enable */ + __sbit __at (0x9d) SM2; /* Multiprocessor Communication Enable*/ + __sbit __at (0x9d) SM2_0; /* Multiprocessor Communication Enable*/ + __sbit __at (0x9e) SM1; /* Serial Port Select Mode 1 */ + __sbit __at (0x9e) SM1_0; /* Serial Port Select Mode 1 */ + __sbit __at (0x9f) SM0; /* Serial Port Select Mode 0 */ + __sbit __at (0x9f) SM0_0; /* Serial Port Select Mode 0 */ +__sfr __at (0x99) SBUF; /* Serial Buffer 0 */ +__sfr __at (0x99) SBUF0; /* Serial Buffer 0 */ +__sfr __at (0x9a) SPICON; /* SPI Control */ +__sfr __at (0x9a) I2CCON; /* I2C Control */ + /* _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_ */ + /* |SCLK2|SCLK1|SCLK0|FIFO|ORDER|MSTR|CPHA|CPOL| */ + __sbit __at (0x9a) CPOL; /* Serial Clock Polarity */ + __sbit __at (0x9b) CPHA; /* Serial Clock Phase Control */ + __sbit __at (0x9c) MSTR; /* Set Master Mode */ + __sbit __at (0x9d) ORDER; /* Set Bit Order Transmit/Receive */ + __sbit __at (0x9e) FIFO; /* Enable Fifo Buffer */ + __sbit __at (0x9f) SCLK0; /* Clock Divider Select 0 */ + __sbit __at (0xa0) SCLK1; /* Clock Divider Select 1 */ + __sbit __at (0xa1) SCLK2; /* Clock Divider Select 2 */ +__sfr __at (0x9b) SPIDATA; /* SPI Data */ +__sfr __at (0x9b) I2CDATA; /* I2C Data */ +__sfr __at (0x9c) SPIRCON; /* SPI Receive Control */ +__sfr __at (0x9c) I2CGM; /* I2C GM Register */ +__sfr __at (0x9d) SPITCON; /* SPI Transmit Control */ +__sfr __at (0x9d) I2CSTAT; /* I2C Status */ +__sfr __at (0x9e) SPISTART; /* SPI Buffer Start Address */ +__sfr __at (0x9e) I2CSTART; /* I2C Start */ +__sfr __at (0x9f) SPIEND; /* SPI Buffer End Address */ +__sfr __at (0xa0) P2; /* Port 2 */ +__sfr __at (0xa1) PWMCON; /* PWM Control */ + /* _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_ */ + /* | | |PPOL|PWMSEL|SPDSEL|TPCNTL2|TPCNTL1|TPCNTL0| */ + __sbit __at (0xa1) TPCNTL0; /* Generator Control */ + __sbit __at (0xa2) TPCNTL1; /* Generator Control */ + __sbit __at (0xa3) TPCNTL2; /* Generator Control */ + __sbit __at (0xa4) SPDSEL; /* Speed Selection */ + __sbit __at (0xa5) PWMSEL; /* PWM Register Select */ + __sbit __at (0xa6) PPOL; /* Period Polarity */ +__sfr __at (0xa2) PWMLOW; /* PWM low byte */ +__sfr __at (0xa2) TONELOW; /* Tone low byte */ +__sfr __at (0xa3) PWMHI; /* PWM high byte */ +__sfr __at (0xa3) TONEHI; /* Tone high byte */ +__sfr __at (0xa4) AIPOL; /* Auxiliary Interrupt Poll */ +__sfr __at (0xa5) PAI; /* Pending Auxiliary Interrupt */ +__sfr __at (0xa6) AIE; /* Auxiliary Interrupt Enable */ +__sfr __at (0xa7) AISTAT; /* Auxiliary Interrupt Status */ +__sfr __at (0xa8) IE; /* Interrupt Enable */ + /* _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_ */ + /* |EA |ES1|ET2|ES0|ET1|EX1|ET0|EX0| */ + __sbit __at (0xa8) EX0; /* Enable External Interrupt 0 */ + __sbit __at (0xa9) ET0; /* Enable Timer 0 Interrupt */ + __sbit __at (0xaa) EX1; /* Enable External Interrupt 1 */ + __sbit __at (0xab) ET1; /* Enable Timer 1 Interrupt */ + __sbit __at (0xac) ES0; /* Enable Serial Port 0 Interrupt */ + __sbit __at (0xad) ET2; /* Enable Timer 2 Interrupt */ + __sbit __at (0xae) ES1; /* Enable Serial Port 1 Interrupt */ + __sbit __at (0xaf) EA; /* Global Interrupt Enable */ +__sfr __at (0xa9) BPCON; /* Breakpoint Control */ +__sfr __at (0xaa) BPL; /* Breakpoint Address Low */ +__sfr __at (0xab) BPH; /* Breakpoint Address High */ +__sfr __at (0xac) P0DDRL; /* Port 0 Data Direction Low */ +__sfr __at (0xad) P0DDRH; /* Port 0 Data Direction High */ +__sfr __at (0xae) P1DDRL; /* Port 1 Data Direction Low */ +__sfr __at (0xaf) P1DDRH; /* Port 1 Data Direction High */ +__sfr __at (0xb0) P3; /* Port 3 */ + /* _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_ */ + /* |RD |WR |T1 |T0 |INT1|INT0|TXD|RXD| */ + __sbit __at (0xb0) RXD; /* Serial Port 0 Receive */ + __sbit __at (0xb0) RXD0; /* Serial Port 0 Receive */ + __sbit __at (0xb1) TXD; /* Serial Port 0 Transmit */ + __sbit __at (0xb1) TXD0; /* Serial Port 0 Transmit */ + __sbit __at (0xb2) INT0; /* External Interrupt 0 */ + __sbit __at (0xb3) INT1; /* External Interrupt 1 */ + __sbit __at (0xb4) T0; /* Timer 0 External Input */ + __sbit __at (0xb5) T1; /* Timer 1 External Input */ + __sbit __at (0xb6) WR; /* External Memory Write Strobe */ + __sbit __at (0xb7) RD; /* External Memory Read Strobe */ +__sfr __at (0xb1) P2DDRL; /* Port 2 Data Direction Low */ +__sfr __at (0xb2) P2DDRH; /* Port 2 Data Direction High */ +__sfr __at (0xb3) P3DDRL; /* Port 3 Data Direction Low */ +__sfr __at (0xb4) P3DDRH; /* Port 3 Data Direction High */ +__sfr __at (0xb5) DACL; /* Digital-to-Analog Converter Low */ +__sfr __at (0xb6) DACH; /* Digital-to-Analog Converter High */ +__sfr __at (0xb7) DACSEL; /* Digital-to-Analog Converter Select */ +__sfr __at (0xb8) IP; /* Interrupt Priority */ + /* _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_ */ + /* | | |PT2|PS |PT1|PX1|PT0|PX0| */ + __sbit __at (0xb8) PX0; /* External Interrupt 0 */ + __sbit __at (0xb9) PT0; /* Timer 0 */ + __sbit __at (0xba) PX1; /* External Interrupt 1 */ + __sbit __at (0xbb) PT1; /* Timer 1 */ + __sbit __at (0xbc) PS; /* Serial Port */ + __sbit __at (0xbd) PT2; /* Timer 2 */ +__sfr __at (0xc0) SCON1; /* Serial Control 1 */ + /* _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_ */ + /* |SM0|SM1|SM2|REN|TB8|RB8|TI |RI | */ + __sbit __at (0xc0) RI1; /* Receive Interrupt Flag */ + __sbit __at (0xc0) RI_1; /* Receive Interrupt Flag */ + __sbit __at (0xc1) TI1; /* Transmit Interrupt Flag */ + __sbit __at (0xc1) TI_1; /* Transmit Interrupt Flag */ + __sbit __at (0xc2) RB8_1; /* Receive Bit 8 */ + __sbit __at (0xc3) TB8_1; /* Transmit Bit 8 */ + __sbit __at (0xc4) REN_1; /* Receive Enable */ + __sbit __at (0xc5) SM2_1; /* Multiprocessor Communication Enable*/ + __sbit __at (0xc6) SM1_1; /* Serial Port Select Mode 1 */ + __sbit __at (0xc7) SM0_1; /* Serial Port Select Mode 0 */ +__sfr __at (0xc1) SBUF1; /* Serial Buffer 1 */ +__sfr __at (0xc6) EWU; /* Enable Wake Up */ + /* _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_ */ + /* | | | | | |EWUEX1|EWUEX0|EWUWDT| */ + __sbit __at (0xc6) EWUWDT; /* Enable Watchdog Interrupt */ + __sbit __at (0xc7) EWUEX0; /* Enable External Interrupt 0 */ + __sbit __at (0xc8) EWUEX1; /* Enable External Interrupt 1 */ +__sfr __at (0xc7) SYSCLK; /* System Clock Divider */ +__sfr __at (0xc8) T2CON; /* Timer 2 Control */ + /* _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_ */ + /* |TF2|EXF2|RCLK|TCLK|EXEN2|TR2|C_T2|CP_RL2 | */ + __sbit __at (0xc8) CP_RL2; /* Capture/Reload Flag */ + __sbit __at (0xc9) C_T2; /* Overflow Flag */ + __sbit __at (0xca) TR2; /* Timer Run */ + __sbit __at (0xcb) EXEN2; /* Timer External Enable */ + __sbit __at (0xcc) TCLK; /* Transmit Clock Flag */ + __sbit __at (0xcd) RCLK; /* Receive Clock Flag */ + __sbit __at (0xce) EXF2; /* External Flag */ + __sbit __at (0xcf) TF2; /* Overflow Flag */ +__sfr __at (0xca) RCAP2L; /* Timer 2 Capture Low */ +__sfr __at (0xcb) RCAP2H; /* Timer 2 Capture High */ +__sfr __at (0xcc) TL2; /* Timer 2 Low byte */ +__sfr __at (0xcd) TH2; /* Timer 2 High byte */ +__sfr __at (0xd0) PSW; /* Program Status Word */ + /* _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_ */ + /* |CY |AC |F0 |RS1|RS0|OV |F1 |P | */ + __sbit __at (0xd0) P; /* Parity Flag */ + __sbit __at (0xd1) F1; /* General Purpose User Flag 1 */ + __sbit __at (0xd2) OV; /* Overflow Flag */ + __sbit __at (0xd3) RS0; /* Register Bank Select 0 Flag */ + __sbit __at (0xd4) RS1; /* Register Bank Select 1 Flag */ + __sbit __at (0xd5) F0; /* General Purpose User Flag 0 */ + __sbit __at (0xd6) AC; /* Auxiliary Carry Flag */ + __sbit __at (0xd7) CY; /* Carry Flag */ +__sfr __at (0xd1) OCL; /* (ADC) Offset Calibration Low byte */ +__sfr __at (0xd2) OCM; /* (ADC) Offset Calibration Middle byte */ +__sfr __at (0xd3) OCH; /* (ADC) Offset Calibration High byte */ +__sfr __at (0xd4) GCL; /* (ADC) Gain Low byte */ +__sfr __at (0xd5) GCM; /* (ADC) Gain Middle byte */ +__sfr __at (0xd6) GCH; /* (ADC) Gain High byte */ +__sfr __at (0xd7) ADMUX; /* ADC Multiplexer Register */ +__sfr __at (0xd8) EICON; /* Enable Interrupt Control */ + /* _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_ */ + /* |SMOD1| |EAI|AI |WDTI| | | | */ + __sbit __at (0xdb) WDTI; /* Watchdog Timer Interrupt Flag */ + __sbit __at (0xdc) AI; /* Auxiliary Interrupt Flag */ + __sbit __at (0xdd) EAI; /* Enable Auxiliary Interrupt */ + __sbit __at (0xdf) SMOD1; /* Serial Port 1 Mode */ +__sfr __at (0xd9) ADRESL; /* ADC Conversion Result Low byte */ +__sfr __at (0xda) ADRESM; /* ADC Conversion Result Middle byte */ +__sfr __at (0xdb) ADRESH; /* ADC Conversion Result High byte */ +__sfr __at (0xdc) ADCON0; /* ADC Control 0 */ +__sfr __at (0xdd) ADCON1; /* ADC Control 1 */ +__sfr __at (0xde) ADCON2; /* ADC Control 2 */ +__sfr __at (0xdf) ADCON3; /* ADC Control 3 */ +__sfr __at (0xe0) ACC; /* Accumulator */ +__sfr __at (0xe1) SSCON; /* Summation and Shift Control */ +__sfr __at (0xe2) SUMR0; /* Summation Register 0 (LSB) */ +__sfr __at (0xe3) SUMR1; /* Summation Register 1 */ +__sfr __at (0xe4) SUMR2; /* Summation Register 2 */ +__sfr __at (0xe5) SUMR3; /* Summation Register 3 (MSB) */ +__sfr __at (0xe6) ODAC; /* (ADC) Offset DAC Register */ +__sfr __at (0xe7) LVDCON; /* Low Voltage Detection Control */ +__sfr __at (0xe8) EIE; /* Extended Interrupt Enable */ + /* _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_ */ + /* | | | |EWDI|EX5|EX4|EX3|EX2| */ + __sbit __at (0xe8) EX2; /* Enable External Interrupt 2 */ + __sbit __at (0xe9) EX3; /* Enable External Interrupt 3 */ + __sbit __at (0xea) EX4; /* Enable External Interrupt 4 */ + __sbit __at (0xeb) EX5; /* Enable External Interrupt 5 */ + __sbit __at (0xec) EWDI; /* Enable Watchdog Interrupt */ +__sfr __at (0xe9) HWPC0; /* Hardware Product Code 0 */ +__sfr __at (0xea) HWPC1; /* Hardware Product Code 1 */ +__sfr __at (0xeb) HWVER; /* Hardware Version number */ +__sfr __at (0xee) FMCON; /* Flash Memory Control */ +__sfr __at (0xef) FTCON; /* Flash Memory Timing Control */ +__sfr __at (0xf0) B; /* B Register */ +__sfr __at (0xf1) PDCON; /* Power Down Control */ + /* _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_ */ + /* | | | |PDPWM|PDAD|PDWDT|PDST|PDSPI| */ + __sbit __at (0xf1) PDSPI; /* SPI System Control */ + __sbit __at (0xf2) PDST; /* System Timer Control */ + __sbit __at (0xf3) PDWDT; /* Watchdog Timer Control */ + __sbit __at (0xf4) PDAD; /* A/D Control */ + __sbit __at (0xf5) PDPWM; /* PWM Control */ +__sfr __at (0xf2) PASEL; /* /PSEN|ALE Select */ +__sfr __at (0xf6) ACLK; /* Analog Clock */ +__sfr __at (0xf7) SRST; /* System Reset Register */ +__sfr __at (0xf8) EIP; /* Extended Interrupt Priority */ + /* _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_ */ + /* | | | |PWDI|PX5|PX4|PX3|PX2| */ + __sbit __at (0xf8) PX2; /* External Interrupt 2 Priority */ + __sbit __at (0xf9) PX3; /* External Interrupt 3 Priority */ + __sbit __at (0xfa) PX4; /* External Interrupt 4 Priority */ + __sbit __at (0xfb) PX5; /* External Interrupt 5 Priority */ + __sbit __at (0xfc) PWDI; /* Watchdog Interrupt Priority */ +__sfr __at (0xf9) SECINT; /* Seconds Timer Interrupt */ +__sfr __at (0xfa) MSINT; /* Milliseconds Interrupt */ +__sfr __at (0xfb) USEC; /* Microsecond Register */ +__sfr __at (0xfc) MSECL; /* Millisecond Low byte */ +__sfr __at (0xfd) MSECH; /* Millisecond High byte */ +__sfr __at (0xfe) HMSEC; /* Hundred Millisecond Clock */ +__sfr __at (0xff) WDTCON; /* Watchdog Control */ + +/* Word Registers */ +__sfr16 __at (0x8c8a) TMR0; +__sfr16 __at (0x8d8b) TMR1; +__sfr16 __at (0xa3a2) PWM; +__sfr16 __at (0xa3a2) TONE; +__sfr16 __at (0xabaa) BP; +__sfr16 __at (0xabaa) BREAKPT; +__sfr16 __at (0xadac) P0DDR; +__sfr16 __at (0xafae) P1DDR; +__sfr16 __at (0xb2b1) P2DDR; +__sfr16 __at (0xb4b3) P3DDR; +__sfr16 __at (0xcbca) RCAP2; +__sfr16 __at (0xcdcc) TMR2; +__sfr16 __at (0xdfde) DECIMATION; +__sfr16 __at (0xfdfc) ONEMS; +__sfr16 __at (0xfdfc) MSEC; + +/* Double Word Registers */ +__sfr32 __at (0xe5e4e3e2) SUMR; + +#endif diff --git a/device/include/mcs51/msm8xc154s.h b/device/include/mcs51/msm8xc154s.h new file mode 100644 index 0000000..04ba1f2 --- /dev/null +++ b/device/include/mcs51/msm8xc154s.h @@ -0,0 +1,53 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Oki MSM80C154S and MSM83C154S + + Written By - Matthias Arndt / marndt@asmsoftware.de (July 2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef MSM8xC154S_H +#define MSM8xC154S_H + +#include <8052.h> /* load definitions for the 8052 core */ + +#ifdef REG8052_H +#undef REG8052_H +#endif + +/* byte SFRs */ +__sfr __at (0xf8) IOCON; /* IOCON register */ + +/* bit locations */ +__sbit __at (0xf8) ALF; /* floating status on power down control */ +__sbit __at (0xf9) P1HZ; /* P1 high impedance input control */ +__sbit __at (0xfa) P2HZ; /* P2 high impedance input control */ +__sbit __at (0xfb) P3HZ; /* P3 high impedance input control */ +__sbit __at (0xfc) IZC; /* 10kO pull-up resistor control */ +__sbit __at (0xfd) SERR; /* Serial port reception flag */ +__sbit __at (0xfe) T32; /* interconnect T0 and T1 to 32bit timer/counter */ + +/* Bits in IP (0xb8) */ +__sbit __at (0xbf) PCT; /* Priority interrupt circuit control bit */ + +/* Bits in PCON (0x87) */ +#define RPD 0x20 /* Bit used to specify cancellation of CPU power down mode */ +#define HPD 0x40 /* The hard power down setting mode is enabled when this bit is set to "1". */ + +#endif diff --git a/device/include/mcs51/p89c66x.h b/device/include/mcs51/p89c66x.h new file mode 100644 index 0000000..bcce93f --- /dev/null +++ b/device/include/mcs51/p89c66x.h @@ -0,0 +1,285 @@ +/*-------------------------------------------------------------------------- +P89c66x.H + +This header allows to use the microcontroler Philips P89c66x +with the compiler SDCC. + +Copyright (c) 2007 Gudjon I. Gudjonsson + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA02111-1307 USA + + The registered are ordered in the same way as in the NXP data sheet + P89C660_662_664_3.PDF, see http://www.nxp.com + +--------------------------------------------------------------------------*/ + +#ifndef __P89c66x_H__ +#define __P89c66x_H__ +#include + +/*BYTE Registers*/ +SFR(ACC, 0xE0); // Accumulator + SBIT(ACC_7, 0xE0, 7); + SBIT(ACC_6, 0xE0, 6); + SBIT(ACC_5, 0xE0, 5); + SBIT(ACC_4, 0xE0, 4); + SBIT(ACC_3, 0xE0, 3); + SBIT(ACC_2, 0xE0, 2); + SBIT(ACC_1, 0xE0, 1); + SBIT(ACC_0, 0xE0, 0); +SFR(AUXR, 0x8E); // Auxiliary + #define EXTRAM 0x02 + #define AO 0x01 +SFR(AUXR1, 0xA2); // Auxiliary 1 + #define ENBOOT 0x20 + #define GF2 0x08 + // Bit 2 must be 0 + #define DPS 0x01 +SFR(B, 0xF0); // B register + SBIT(B7, 0xF0, 7); + SBIT(B6, 0xF0, 6); + SBIT(B5, 0xF0, 5); + SBIT(B4, 0xF0, 4); + SBIT(B3, 0xF0, 3); + SBIT(B2, 0xF0, 2); + SBIT(B1, 0xF0, 1); + SBIT(B0, 0xF0, 0); +SFR(CCAP0H, 0xFA); // Module 0 Capture High +SFR(CCAP1H, 0xFB); // Module 1 Capture High +SFR(CCAP2H, 0xFC); // Module 2 Capture High +SFR(CCAP3H, 0xFD); // Module 3 Capture High +SFR(CCAP4H, 0xFE); // Module 4 Capture High +SFR(CCAP0L, 0xEA); // Module 0 Capture Low +SFR(CCAP1L, 0xEB); // Module 1 Capture Low +SFR(CCAP2L, 0xEC); // Module 2 Capture Low +SFR(CCAP3L, 0xED); // Module 3 Capture Low +SFR(CCAP4L, 0xEE); // Module 4 Capture Low +SFR(CCAPM0, 0xC2); // Module 0 Mode +SFR(CCAPM1, 0xC3); // Module 1 Mode +SFR(CCAPM2, 0xC4); // Module 2 Mode +SFR(CCAPM3, 0xC5); // Module 3 Mode +SFR(CCAPM4, 0xC6); // Module 4 Mode + #define ECOM 0x40 + #define CAPP 0x20 + #define CAPN 0x10 + #define MAT 0x08 + #define TOG 0x04 + #define PWM 0x02 + #define ECCF 0x01 +SFR(CCON, 0xC0); // PCA Counter Control + SBIT(CF, 0xC0, 7); + SBIT(CR, 0xC0, 6); + SBIT(CCF4, 0xC0, 4); + SBIT(CCF3, 0xC0, 3); + SBIT(CCF2, 0xC0, 2); + SBIT(CCF1, 0xC0, 1); + SBIT(CCF0, 0xC0, 0); +SFR(CH, 0xF9); // PCA Counter High +SFR(CL, 0xE9); // PCA Counter Low +SFR(CMOD, 0xC1); // PCA Counter Mode + #define CIDL 0x80 + #define WDTE 0x40 + #define CPS1 0x04 + #define CPS0 0x02 + #define ECF 0x01 +SFR(DPH, 0x83); // Data Pointer High +SFR(DPL, 0x82); // Data Pointer Low +SFR(IEN0, 0xA8); // Interrupt Enable 0 + SBIT(EA, 0xA8, 7); + SBIT(EC, 0xA8, 6); + SBIT(ES1, 0xA8, 5); + SBIT(ES0, 0xA8, 4); + SBIT(ET1, 0xA8, 3); + SBIT(EX1, 0xA8, 2); + SBIT(ET0, 0xA8, 1); + SBIT(EX0, 0xA8, 0); +SFR(IEN1, 0xE8); // Interrupt Enable 1 + SBIT(ET2, 0xE8, 0); +SFR(IP, 0xB8); // Interrupt Priority + SBIT(PT2, 0xB8, 7); + SBIT(PPC, 0xB8, 6); + SBIT(PS1, 0xB8, 5); + SBIT(PS0, 0xB8, 4); + SBIT(PT1, 0xB8, 3); + SBIT(PX1, 0xB8, 2); + SBIT(PT0, 0xB8, 1); + SBIT(PX0, 0xB8, 0); +SFR(IPH, 0xB7); // Interrupt Priority High + #define PT2H 0x80 + #define PPCH 0x40 + #define PS1H 0x20 + #define PS0H 0x10 + #define PT1H 0x08 + #define PX1H 0x04 + #define PT0H 0x02 + #define PX0H 0x01 +SFR(P0, 0x80); // Port 0 + SBIT(AD7, 0x80, 7); + SBIT(P0_7, 0x80, 7); + SBIT(AD6, 0x80, 6); + SBIT(P0_6, 0x80, 6); + SBIT(AD5, 0x80, 5); + SBIT(P0_5, 0x80, 5); + SBIT(AD4, 0x80, 4); + SBIT(P0_4, 0x80, 4); + SBIT(AD3, 0x80, 3); + SBIT(P0_3, 0x80, 3); + SBIT(AD2, 0x80, 2); + SBIT(P0_2, 0x80, 2); + SBIT(AD1, 0x80, 1); + SBIT(P0_1, 0x80, 1); + SBIT(AD0, 0x80, 0); + SBIT(P0_0, 0x80, 0); +SFR(P1, 0x90); // Port 1 + SBIT(T1_CEX4, 0x90, 7); + SBIT(P1_7, 0x90, 7); + SBIT(T0_CEX3, 0x90, 6); + SBIT(P1_6, 0x90, 6); + SBIT(CEX2, 0x90, 5); + SBIT(P1_5, 0x90, 5); + SBIT(CEX1, 0x90, 4); + SBIT(P1_4, 0x90, 4); + SBIT(CEX0, 0x90, 3); + SBIT(P1_3, 0x90, 3); + SBIT(ECI, 0x90, 2); + SBIT(P1_2, 0x90, 2); + SBIT(T2EX, 0x90, 1); + SBIT(P1_1, 0x90, 1); + SBIT(T2, 0x90, 0); + SBIT(P1_0, 0x90, 0); +SFR(P2, 0xA0); // Port 2 + SBIT(AD15, 0xA0, 7); + SBIT(P2_7, 0xA0, 7); + SBIT(AD14, 0xA0, 6); + SBIT(P2_6, 0xA0, 6); + SBIT(AD13, 0xA0, 5); + SBIT(P2_5, 0xA0, 5); + SBIT(AD12, 0xA0, 4); + SBIT(P2_4, 0xA0, 4); + SBIT(AD11, 0xA0, 3); + SBIT(P2_3, 0xA0, 3); + SBIT(AD10, 0xA0, 2); + SBIT(P2_2, 0xA0, 2); + SBIT(AD9, 0xA0, 1); + SBIT(P2_1, 0xA0, 1); + SBIT(AD8, 0xA0, 0); + SBIT(P2_0, 0xA0, 0); +SFR(P3, 0xB0); // Port 3 + SBIT(RD, 0xB0, 7); + SBIT(P3_7, 0xB0, 7); + SBIT(WR, 0xB0, 6); + SBIT(P3_6, 0xB0, 6); + SBIT(T1, 0xB0, 5); + SBIT(P3_5, 0xB0, 5); + SBIT(T0, 0xB0, 4); + SBIT(P3_4, 0xB0, 4); + SBIT(INT1, 0xB0, 3); + SBIT(P3_3, 0xB0, 3); + SBIT(INT0, 0xB0, 2); + SBIT(P3_2, 0xB0, 2); + SBIT(TXD, 0xB0, 1); + SBIT(P3_1, 0xB0, 1); + SBIT(RXD, 0xB0, 0); + SBIT(P3_0, 0xB0, 0); +SFR(PCON, 0x87); // Power Control + #define SMOD1 0x80 + #define SMOD0 0x40 + #define POF 0x10 + #define GF1 0x80 + #define GF0 0x40 + #define PD 0x20 + #define IDL 0x10 +SFR(PSW, 0xD0); // Program Status Word + SBIT(CY, 0xD0, 7); + SBIT(AC, 0xD0, 6); + SBIT(F0, 0xD0, 5); + SBIT(RS1, 0xD0, 4); + SBIT(RS0, 0xD0, 3); + SBIT(OV, 0xD0, 2); + SBIT(F1, 0xD0, 1); + SBIT(P, 0xD0, 0); +SFR(RCAP2H, 0xCB); // Timer 2 Capture High +SFR(RCAP2L, 0xCA); // Timer 2 Capture Low +SFR(SADDR, 0xA9); // I2C Slave Address +SFR(SADEN, 0xB9); // I2C Slave Address Mask +SFR(S0BUF, 0x99); // Serial Data Buffer +SFR(S0CON, 0x98); // Serial Control + SBIT(SM0_FE, 0x98, 7); + SBIT(SM1, 0x98, 6); + SBIT(SM2, 0x98, 5); + SBIT(REN, 0x98, 4); + SBIT(TB8, 0x98, 3); + SBIT(RB8, 0x98, 2); + SBIT(TI, 0x98, 1); + SBIT(RI, 0x98, 0); +SFR(SP, 0x81); // Stack Pointer +SFR(S1DAT, 0xDA); // I2C Serial 1 Data +SFR(S1IST, 0xDC); // I2C Serial 1 Internal Status +SFR(S1ADR, 0xDB); // I2C Serial 1 Address + #define GC 0x01 +SFR(S1STA, 0xD9); // I2C Serial 1 Status + #define SC4 0x80 + #define SC3 0x40 + #define SC2 0x20 + #define SC1 0x10 + #define SC0 0x08 +SFR(S1CON, 0xD8); // I2C Serial 1 Control + SBIT(CR2, 0xD8, 7); + SBIT(ENS1, 0xD8, 6); + SBIT(STA, 0xD8, 5); + SBIT(STO, 0xD8, 4); + SBIT(SI, 0xD8, 3); + SBIT(AA, 0xD8, 2); + SBIT(CR1, 0xD8, 1); + SBIT(CR0, 0xD8, 0); +SFR(TCON, 0x88); // Timer Control + SBIT(TF1, 0x88, 7); + SBIT(TR1, 0x88, 6); + SBIT(TF0, 0x88, 5); + SBIT(TR0, 0x88, 4); + SBIT(IE1, 0x88, 3); + SBIT(IT1, 0x88, 2); + SBIT(IE0, 0x88, 1); + SBIT(IT0, 0x88, 0); +SFR(T2CON, 0xC8); // Timer 2 Control + SBIT(TF2, 0xC8, 7); + SBIT(EXF2, 0xC8, 6); + SBIT(RCLK, 0xC8, 5); + SBIT(TCLK, 0xC8, 4); + SBIT(EXEN2, 0xC8, 3); + SBIT(TR2, 0xC8, 2); + SBIT(C_T2, 0xC8, 1); + SBIT(CP_RL2, 0xC8, 0); +SFR(T2MOD, 0xC9); // Timer 2 Mode Control + #define T2OE 0x02 + #define DCEN 0x01 +SFR(TH0 , 0x8C); // Timer High 0 +SFR(TH1, 0x8D); // Timer High 1 +SFR(TH2, 0xCD); // Timer High 2 +SFR(TL0, 0x8A); // Timer Low 0 +SFR(TL1, 0x8B); // Timer Low 1 +SFR(TL2, 0xCC); // Timer Low 2 +SFR(TMOD, 0x89); // Timer Mode + #define GATE_1 0x80 + #define C_T_1 0x40 + #define M1_1 0x20 + #define M0_1 0x10 + #define GATE_0 0x08 + #define C_T_0 0x04 + #define M1_0 0x02 + #define M0_0 0x01 +SFR(WDTRST, 0xA6); // Watchdog Timer Reset + +#endif diff --git a/device/include/mcs51/p89lpc933_4.h b/device/include/mcs51/p89lpc933_4.h new file mode 100644 index 0000000..4ce1659 --- /dev/null +++ b/device/include/mcs51/p89lpc933_4.h @@ -0,0 +1,463 @@ +/*-------------------------------------------------------------------------- +p89lpc933_4.h + +This header allows to use the microcontrolers NXP (formerly Philips) +p89lpc933, 934. + +Copyright (c) 2008 Gudjon I. Gudjonsson + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA02111-1307 USA + + The registered are ordered in the same way as in the NXP data sheet: + http://www.standardics.nxp.com/products/lpc900/datasheet/p89lpc933.p89lpc934.p89lpc935.p89lpc936.pdf + + +--------------------------------------------------------------------------*/ +#ifndef __P89LPC933_4_H__ +#define __P89LPC933_4_H__ +#include + +/*BYTE Registers*/ +SFR(ACC, 0xE0); // Accumulator + SBIT(ACC_7, 0xE0, 7); + SBIT(ACC_6, 0xE0, 6); + SBIT(ACC_5, 0xE0, 5); + SBIT(ACC_4, 0xE0, 4); + SBIT(ACC_3, 0xE0, 3); + SBIT(ACC_2, 0xE0, 2); + SBIT(ACC_1, 0xE0, 1); + SBIT(ACC_0, 0xE0, 0); +SFR(ADCON0, 0x8E); // A/D control register 0 + #define ENADC0 0x04 +SFR(ADCON1, 0x97); // A/D control register 1 + #define ENBI1 0x80 + #define ENADCI1 0x40 + #define TMM1 0x20 + #define EDGE1 0x10 + #define ADCI1 0x08 + #define ENADC1 0x04 + #define ADCS11 0x02 + #define ADCS10 0x01 +SFR(ADINS, 0xA3); // A/D input select + #define ADI13 0x80 + #define ADI12 0x40 + #define ADI11 0x20 + #define ADI10 0x10 +SFR(ADMODA, 0xC0); // A/D mode register A + SBIT(BNDI1, 0xC0, 7); + SBIT(BURST1, 0xC0, 6); + SBIT(SCC1, 0xC0, 5); + SBIT(SCAN1, 0xC0, 4); +SFR(ADMODB, 0xA1); // A/D mode register B + #define CLK2 0x80 + #define CLK1 0x40 + #define CLK0 0x20 + #define ENDAC1 0x08 + #define ENDAC0 0x04 + #define BSA1 0x02 +SFR(AD0DAT3, 0xF4); // A/D_0 data register 3 +SFR(AD1BH, 0xC4); // A/D_1 boundary high register +SFR(AD1BL, 0xBC); // A/D_1 boundary low register +SFR(AD1DAT0, 0xD5); // A/D_1 data register 0 +SFR(AD1DAT1, 0xD6); // A/D_1 data register 1 +SFR(AD1DAT2, 0xD7); // A/D_1 data register 2 +SFR(AD1DAT3, 0xF5); // A/D_1 data register 3 +SFR(AUXR1, 0xA2); // Auxilary function register + #define CLKLP 0x80 + #define EBRR 0x40 + #define ENT1 0x20 + #define ENT0 0x10 + #define SRST 0x08 // Bit 2 is always 0 + #define DPS 0x01 +SFR(B, 0xF0); // B register + SBIT(B7, 0xF0, 7); + SBIT(B6, 0xF0, 6); + SBIT(B5, 0xF0, 5); + SBIT(B4, 0xF0, 4); + SBIT(B3, 0xF0, 3); + SBIT(B2, 0xF0, 2); + SBIT(B1, 0xF0, 1); + SBIT(B0, 0xF0, 0); +SFR(BRGR0, 0xBE); // Baud rate generator rate low +SFR(BRGR1, 0xBF); // Baud rate generator rate high +SFR(BRGCON, 0xBD); // Baud rate generator control + #define SBRGS 0x02 + #define BRGEN 0x01 +SFR(CMP1, 0xAC); // Comparator 1 control register + #define CE1 0x20 + #define CP1 0x10 + #define CN1 0x08 + #define OE1 0x04 + #define CO1 0x02 + #define CMF1 0x01 +SFR(CMP2, 0xAD); // Comparator 2 control register + #define CE2 0x20 + #define CP2 0x10 + #define CN2 0x08 + #define OE2 0x04 + #define CO2 0x02 + #define CMF2 0x01 +SFR(DIVM, 0x95); // CPU clock divide-by-M control +SFR(DPH, 0x83); // Data Pointer High +SFR(DPL, 0x82); // Data Pointer Low +SFR(FMADRH, 0xE7); // Program flash address high +SFR(FMADRL, 0xE6); // Program flash address low +SFR(FMCON, 0xE4); + // Program flash control (Read) + #define BUSY 0x80 + #define HVA 0x08 + #define HVE 0x04 + #define SV 0x02 + #define OI 0x01 + // Program flash control (Write) + #define FMCMD_7 0x80 + #define FMCMD_6 0x40 + #define FMCMD_5 0x20 + #define FMCMD_4 0x10 + #define FMCMD_3 0x08 + #define FMCMD_2 0x04 + #define FMCMD_1 0x02 + #define FMCMD_0 0x01 +SFR(FMDATA, 0xE5); // Program flash data +SFR(I2ADR, 0xDB); // I2C slave address register + #define I2ADR_6 0x80 + #define I2ADR_5 0x40 + #define I2ADR_4 0x20 + #define I2ADR_3 0x10 + #define I2ADR_2 0x08 + #define I2ADR_1 0x04 + #define I2ADR_0 0x02 + #define GC 0x01 +SFR(I2CON, 0xD8); // I2C control register + SBIT(I2EN, 0xD8, 6); + SBIT(STA, 0xD8, 5); + SBIT(STO, 0xD8, 4); + SBIT(SI, 0xD8, 3); + SBIT(AA, 0xD8, 2); + SBIT(CRSEL, 0xD8, 0); +SFR(I2DAT, 0xDA); // I2C data register +SFR(I2SCLH, 0xDD); // I2C serial clock generator/SCL duty cycle register high +SFR(I2SCLL, 0xDC); // I2C serial clock generator/SCL duty cycle register low +SFR(I2STAT, 0xD9); // I2C status register + #define STA_4 0x80 + #define STA_3 0x40 + #define STA_2 0x20 + #define STA_1 0x10 + #define STA_0 0x08 // Only write 0 to the lowest three bits +SFR(ICRAH, 0xAB); // Input capture A register high +SFR(ICRAL, 0xAA); // Input capture A register low +SFR(ICRBH, 0xAF); // Input capture B register high +SFR(ICRBL, 0xAE); // Input capture B register low +SFR(IEN0, 0xA8); // Interrupt Enable 0 + SBIT(EA, 0xA8, 7); + SBIT(EWDRT, 0xA8, 6); + SBIT(EBO, 0xA8, 5); + SBIT(ES_ESR, 0xA8, 4); + SBIT(ET1, 0xA8, 3); + SBIT(EX1, 0xA8, 2); + SBIT(ET0, 0xA8, 1); + SBIT(EX0, 0xA8, 0); +SFR(IEN1, 0xE8); // Interrupt Enable 1 + SBIT(EAD, 0xE8, 7); + SBIT(EST, 0xE8, 6); + SBIT(ESPI, 0xE8, 3); + SBIT(EC, 0xE8, 2); + SBIT(EKBI, 0xE8, 1); + SBIT(EI2C, 0xE8, 0); +SFR(IP0, 0xB8); // Interrupt Priority 0 + SBIT(PWDRT, 0xB8, 6); + SBIT(PBO, 0xB8, 5); + SBIT(PS_PSR, 0xB8, 4); + SBIT(PT1, 0xB8, 3); + SBIT(PX1, 0xB8, 2); + SBIT(PT0, 0xB8, 1); + SBIT(PX0, 0xB8, 0); +SFR(IP0H, 0xB7); // Interrupt Priority 0 high + #define PWDRTH 0x40 + #define PBOH 0x20 + #define PSH_PSRH 0x10 + #define PT1H 0x08 + #define PX1H 0x04 + #define PT0H 0x02 + #define PX0H 0x01 +SFR(IP1, 0xF8); // Interrupt Priority 1 + SBIT(PAD, 0xF8, 7); + SBIT(PST, 0xF8, 6); + SBIT(PSPI, 0xF8, 3); + SBIT(PC, 0xF8, 2); + SBIT(PKBI, 0xF8, 1); + SBIT(PI2C, 0xF8, 0); +SFR(IP1H, 0xF7); // Interrupt Priority 1 High + #define PADH 0x80 + #define PSTH 0x40 + #define PSPIH 0x08 + #define PCH 0x04 + #define PKBIH 0x02 + #define PI2CH 0x01 +SFR(KBCON, 0x94); // Keypad control register + #define PATN_SEL 0x02 + #define KBIF 0x01 +SFR(KBMASK, 0x86); // Keypad interrupt mask register +SFR(KBPATN, 0x93); // Keypad pattern register +SFR(P0, 0x80); // Port 0 + SBIT(P0_7, 0x80, 7); + SBIT(T1, 0x80, 7); + SBIT(KB7, 0x80, 7); + SBIT(P0_6, 0x80, 6); + SBIT(CMP_1, 0x80, 6); // Renamed, not to conflict with the CMP1 register + SBIT(KB6, 0x80, 6); + SBIT(P0_5, 0x80, 5); + SBIT(CMPREF,0x80, 5); + SBIT(KB5, 0x80, 5); + SBIT(P0_4, 0x80, 4); + SBIT(CIN1A, 0x80, 4); + SBIT(KB4, 0x80, 4); + SBIT(P0_3, 0x80, 3); + SBIT(CIN1B, 0x80, 3); + SBIT(KB3, 0x80, 3); + SBIT(P0_2, 0x80, 2); + SBIT(CIN2A, 0x80, 2); + SBIT(KB2, 0x80, 2); + SBIT(P0_1, 0x80, 1); + SBIT(CIN2B, 0x80, 1); + SBIT(KB1, 0x80, 1); + SBIT(P0_0, 0x80, 0); + SBIT(CMP_2, 0x80, 0); // Renamed, not to conflict with the CMP2 register + SBIT(KB0, 0x80, 0); +SFR(P1, 0x90); // Port 1 + SBIT(P1_7, 0x90, 7); + SBIT(P1_6, 0x90, 6); + SBIT(P1_5, 0x90, 5); + SBIT(RST, 0x90, 5); + SBIT(P1_4, 0x90, 4); + SBIT(INT1, 0x90, 4); + SBIT(P1_3, 0x90, 3); + SBIT(INT0, 0x90, 3); + SBIT(SDA, 0x90, 3); + SBIT(P1_2, 0x90, 2); + SBIT(T0, 0x90, 2); + SBIT(SCL, 0x90, 2); + SBIT(P1_1, 0x90, 1); + SBIT(RXD, 0x90, 1); + SBIT(P1_0, 0x90, 0); + SBIT(TXD, 0x90, 0); +SFR(P2, 0xA0); // Port 2 + SBIT(P2_7, 0xA0, 7); + SBIT(P2_6, 0xA0, 6); + SBIT(P2_5, 0xA0, 5); + SBIT(SPICLK, 0xA0, 5); + SBIT(P2_4, 0xA0, 4); + SBIT(SS, 0xA0, 4); + SBIT(P2_3, 0xA0, 3); + SBIT(MISO, 0xA0, 3); + SBIT(P2_2, 0xA0, 2); + SBIT(MOSI, 0xA0, 2); + SBIT(P2_1, 0xA0, 1); + SBIT(P2_0, 0xA0, 0); +SFR(P3, 0xB0); // Port 3 + SBIT(P3_7, 0xB0, 7); + SBIT(P3_6, 0xB0, 6); + SBIT(P3_5, 0xB0, 5); + SBIT(P3_4, 0xB0, 4); + SBIT(P3_3, 0xB0, 3); + SBIT(P3_2, 0xB0, 2); + SBIT(P3_1, 0xB0, 1); + SBIT(XTAL1,0xB0, 1); + SBIT(P3_0, 0xB0, 0); + SBIT(XTAL2,0xB0, 0); +SFR(P0M1, 0x84); // Port 0 output mode 1 + #define P0M1_7 0x80 + #define P0M1_6 0x40 + #define P0M1_5 0x20 + #define P0M1_4 0x10 + #define P0M1_3 0x08 + #define P0M1_2 0x04 + #define P0M1_1 0x02 + #define P0M1_0 0x01 +SFR(P0M2, 0x85); // Port 0 output mode 2 + #define P0M2_7 0x80 + #define P0M2_6 0x40 + #define P0M2_5 0x20 + #define P0M2_4 0x10 + #define P0M2_3 0x08 + #define P0M2_2 0x04 + #define P0M2_1 0x02 + #define P0M2_0 0x01 +SFR(P1M1, 0x91); // Port 1 output mode 1 + #define P1M1_7 0x80 + #define P1M1_6 0x40 + #define P1M1_4 0x10 + #define P1M1_3 0x08 + #define P1M1_2 0x04 + #define P1M1_1 0x02 + #define P1M1_0 0x01 +SFR(P1M2, 0x92); // Port 1 output mode 2 + #define P1M2_7 0x80 + #define P1M2_6 0x40 + #define P1M2_4 0x10 + #define P1M2_3 0x08 + #define P1M2_2 0x04 + #define P1M2_1 0x02 + #define P1M2_0 0x01 +SFR(P2M1, 0xA4); // Port 2 output mode 1 + #define P2M1_7 0x80 + #define P2M1_6 0x40 + #define P2M1_5 0x20 + #define P2M1_4 0x10 + #define P2M1_3 0x08 + #define P2M1_2 0x04 + #define P2M1_1 0x02 + #define P2M1_0 0x01 +SFR(P2M2, 0xA5); // Port 2 output mode 2 + #define P2M2_7 0x80 + #define P2M2_6 0x40 + #define P2M2_5 0x20 + #define P2M2_4 0x10 + #define P2M2_3 0x08 + #define P2M2_2 0x04 + #define P2M2_1 0x02 + #define P2M2_0 0x01 +SFR(P3M1, 0xB1); // Port 3 output mode 1 + #define P3M1_1 0x02 + #define P3M1_0 0x01 +SFR(P3M2, 0xB2); // Port 3 output mode 2 + #define P3M2_1 0x02 + #define P3M2_0 0x01 +SFR(PCON, 0x87); // Power control register + #define SMOD1 0x80 + #define SMOD0 0x40 + #define BOPD 0x20 + #define BOI 0x10 + #define GF1 0x08 + #define GF0 0x04 + #define PMOD1 0x02 + #define PMOD0 0x01 +SFR(PCONA, 0xB5); // Power control register A + #define RTCPD 0x80 + #define VCPD 0x20 + #define ADPD 0x10 + #define I2PD 0x08 + #define SPPD 0x04 + #define SPD 0x02 +SFR(PSW, 0xD0); // Program Status Word + SBIT(CY, 0xD0, 7); + SBIT(AC, 0xD0, 6); + SBIT(F0, 0xD0, 5); + SBIT(RS1, 0xD0, 4); + SBIT(RS0, 0xD0, 3); + SBIT(OV, 0xD0, 2); + SBIT(F1, 0xD0, 1); + SBIT(P, 0xD0, 0); +SFR(PT0AD, 0xF6); // Port 0 digital input disable + #define PT0AD_5 0x20 + #define PT0AD_4 0x10 + #define PT0AD_3 0x08 + #define PT0AD_2 0x04 + #define PT0AD_1 0x02 +SFR(RSTSRC, 0xDF); // Reset source register + #define BOF 0x20 + #define POF 0x10 + #define R_BK 0x08 + #define R_WD 0x04 + #define R_SF 0x02 + #define R_EX 0x01 +SFR(RTCCON, 0xD1); // Real-time clock control + #define RTCF 0x80 + #define RTCS1 0x40 + #define RTCS0 0x20 + #define ERTC 0x02 + #define RTCEN 0x01 +SFR(RTCH, 0xD2); // Real-time clock register high +SFR(RTCL, 0xD3); // Real-time clock register low +SFR(SADDR, 0xA9); // Serial port address register +SFR(SADEN, 0xB9); // Serial port address enable +SFR(SBUF, 0x99); // Serial port data buffer register +SFR(SCON, 0x98); // Serial port control + SBIT(SM0_FE, 0x98, 7); + SBIT(SM1, 0x98, 6); + SBIT(SM2, 0x98, 5); + SBIT(REN, 0x98, 4); + SBIT(TB8, 0x98, 3); + SBIT(RB8, 0x98, 2); + SBIT(TI, 0x98, 1); + SBIT(RI, 0x98, 0); +SFR(SSTAT, 0xBA); // Serial port extended status register + #define DBMOD 0x80 + #define INTLO 0x40 + #define CIDIS 0x20 + #define DBISEL 0x10 + #define FE 0x08 + #define BR 0x04 + #define OE 0x02 + #define STINT 0x01 +SFR(SP, 0x81); // Stack Pointer +SFR(SPCTL, 0xE2); // SPI control register + #define SSIG 0x80 + #define SPEN 0x40 + #define DORD 0x20 + #define MSTR 0x10 + #define CPOL 0x08 + #define CPHA 0x04 + #define SPR1 0x02 + #define SPR0 0x01 +SFR(SPSTAT, 0xE1); // SPI status register + #define SPIF 0x80 + #define WCOL 0x40 +SFR(SPDAT, 0xE3); // SPI data register +SFR(TAMOD, 0x8F); // Timer 0 and 1 auxiliary mode + #define T1M2 0x10 + #define T0M2 0x01 +SFR(TCON, 0x88); // Timer 0 and 1 control + SBIT(TF1, 0x88, 7); + SBIT(TR1, 0x88, 6); + SBIT(TF0, 0x88, 5); + SBIT(TR0, 0x88, 4); + SBIT(IE1, 0x88, 3); + SBIT(IT1, 0x88, 2); + SBIT(IE0, 0x88, 1); + SBIT(IT0, 0x88, 0); +SFR(TH0, 0x8C); // Timer 0 high +SFR(TH1, 0x8D); // Timer 1 high +SFR(TL0, 0x8A); // Timer 0 low +SFR(TL1, 0x8B); // Timer 1 low +SFR(TMOD, 0x89); // Timer 0 and 1 mode + #define T1GATE 0x80 + #define T1C_T 0x40 + #define T1M1 0x20 + #define T1M0 0x10 + #define T0GATE 0x08 + #define T0C_T 0x04 + #define T0M1 0x02 + #define T0M0 0x01 +SFR(TRIM, 0x96); // Internal oscillator trim register + #define RCCLK 0x80 + #define ENCLK 0x40 + #define TRIM_5 0x20 + #define TRIM_4 0x10 + #define TRIM_3 0x08 + #define TRIM_2 0x04 + #define TRIM_1 0x02 + #define TRIM_0 0x01 +SFR(WDCON, 0xA7); // Watchdog control register + #define PRE2 0x80 + #define PRE1 0x40 + #define PRE0 0x20 + #define WDRUN 0x04 + #define WDTOF 0x02 + #define WDCLK 0x01 +SFR(WDL, 0xC1); // Watchdog load +SFR(WFEED1, 0xC2); // Watchdog feed 1 +SFR(WFEED2, 0xC3); // Watchdog feed 2 +#endif // __P89LPC933_4_H__ \ No newline at end of file diff --git a/device/include/mcs51/p89lpc935_6.h b/device/include/mcs51/p89lpc935_6.h new file mode 100644 index 0000000..c13f5de --- /dev/null +++ b/device/include/mcs51/p89lpc935_6.h @@ -0,0 +1,588 @@ +/*-------------------------------------------------------------------------- +p89lpc935_6.h + +This header allows to use the microcontrolers NXP (formerly Philips) +p89lpc935, 936. + +Copyright (c) 2008 Gudjon I. Gudjonsson + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA02111-1307 USA + + The registered are ordered in the same way as in the NXP data sheet: + http://www.standardics.nxp.com/products/lpc900/datasheet/p89lpc933.p89lpc934.p89lpc935.p89lpc936.pdf + + +--------------------------------------------------------------------------*/ +#ifndef __P89LPC935_6_H__ +#define __P89LPC935_6_H__ +#include + +/*BYTE Registers*/ +SFR(ACC, 0xE0); // Accumulator + SBIT(ACC_7, 0xE0, 7); + SBIT(ACC_6, 0xE0, 6); + SBIT(ACC_5, 0xE0, 5); + SBIT(ACC_4, 0xE0, 4); + SBIT(ACC_3, 0xE0, 3); + SBIT(ACC_2, 0xE0, 2); + SBIT(ACC_1, 0xE0, 1); + SBIT(ACC_0, 0xE0, 0); +SFR(ADCON0, 0x8E); // A/D control register 0 + #define ENBI0 0x80 + #define ENADCI0 0x40 + #define TMM0 0x20 + #define EDGE0 0x10 + #define ADCI0 0x08 + #define ENADC0 0x04 + #define ADCS01 0x02 + #define ADCS00 0x01 +SFR(ADCON1, 0x97); // A/D control register 1 + #define ENBI1 0x80 + #define ENADCI1 0x40 + #define TMM1 0x20 + #define EDGE1 0x10 + #define ADCI1 0x08 + #define ENADC1 0x04 + #define ADCS11 0x02 + #define ADCS10 0x01 +SFR(ADINS, 0xA3); // A/D input select + #define ADI13 0x80 + #define ADI12 0x40 + #define ADI11 0x20 + #define ADI10 0x10 + #define ADI03 0x08 + #define ADI02 0x04 + #define ADI01 0x02 + #define ADI00 0x01 +SFR(ADMODA, 0xC0); // A/D mode register A + SBIT(BNDI1, 0xC0, 7); + SBIT(BURST1, 0xC0, 6); + SBIT(SCC1, 0xC0, 5); + SBIT(SCAN1, 0xC0, 4); + SBIT(BNDI0, 0xC0, 3); + SBIT(BURST0, 0xC0, 2); + SBIT(SCC0, 0xC0, 1); + SBIT(SCAN0, 0xC0, 0); +SFR(ADMODB, 0xA1); // A/D mode register B + #define CLK2 0x80 + #define CLK1 0x40 + #define CLK0 0x20 + #define ENDAC1 0x08 + #define ENDAC0 0x04 + #define BSA1 0x02 + #define BSA0 0x01 +SFR(AD0BH, 0xBB); // A/D_0 boundary high register +SFR(AD0BL, 0xA6); // A/D_0 boundary low register +SFR(AD0DAT0, 0xC5); // A/D_0 data register 0 +SFR(AD0DAT1, 0xC6); // A/D_0 data register 1 +SFR(AD0DAT2, 0xC7); // A/D_0 data register 2 +SFR(AD0DAT3, 0xF4); // A/D_0 data register 3 +SFR(AD1BH, 0xC4); // A/D_1 boundary high register +SFR(AD1BL, 0xBC); // A/D_1 boundary low register +SFR(AD1DAT0, 0xD5); // A/D_1 data register 0 +SFR(AD1DAT1, 0xD6); // A/D_1 data register 1 +SFR(AD1DAT2, 0xD7); // A/D_1 data register 2 +SFR(AD1DAT3, 0xF5); // A/D_1 data register 3 +SFR(AUXR1, 0xA2); // Auxilary function register + #define CLKLP 0x80 + #define EBRR 0x40 + #define ENT1 0x20 + #define ENT0 0x10 + #define SRST 0x08 + #define DPS 0x01 // Bit 2 is always 0 +SFR(B, 0xF0); // B register + SBIT(B7, 0xF0, 7); + SBIT(B6, 0xF0, 6); + SBIT(B5, 0xF0, 5); + SBIT(B4, 0xF0, 4); + SBIT(B3, 0xF0, 3); + SBIT(B2, 0xF0, 2); + SBIT(B1, 0xF0, 1); + SBIT(B0, 0xF0, 0); +SFR(BRGR0, 0xBE); // Baud rate generator rate low +SFR(BRGR1, 0xBF); // Baud rate generator rate high +SFR(BRGCON, 0xBD); // Baud rate generator control + #define SBRGS 0x02 + #define BRGEN 0x01 +SFR(CCCRA, 0xEA); // Capture compare A control register + #define ICECA2 0x80 + #define ICECA1 0x40 + #define ICECA0 0x20 + #define ICESA 0x10 + #define ICNFA 0x08 + #define FCOA 0x04 + #define OCMA1 0x02 + #define OCMA0 0x01 +SFR(CCCRB, 0xEB); // Capture compare B control register + #define ICECB2 0x80 + #define ICECB1 0x40 + #define ICECB0 0x20 + #define ICESB 0x10 + #define ICNFB 0x08 + #define FCOB 0x04 + #define OCMB1 0x02 + #define OCMB0 0x01 +SFR(CCCRC, 0xEC); // Capture compare C control register + #define FCOC 0x04 + #define OCMC1 0x02 + #define OCMC0 0x01 +SFR(CCCRD, 0xED); // Capture compare D control register + #define FCOD 0x04 + #define OCMD1 0x02 + #define OCMD0 0x01 +SFR(CMP1, 0xAC); // Comparator 1 control register + #define CE1 0x20 + #define CP1 0x10 + #define CN1 0x08 + #define OE1 0x04 + #define CO1 0x02 + #define CMF1 0x01 +SFR(CMP2, 0xAD); // Comparator 2 control register + #define CE2 0x20 + #define CP2 0x10 + #define CN2 0x08 + #define OE2 0x04 + #define CO2 0x02 + #define CMF2 0x01 +SFR(DEECON, 0xF1); // Data EEPROM control register + #define EEIF 0x80 + #define HVERR 0x40 + #define ECTL1 0x20 + #define ECTL0 0x10 + #define EADR8 0x01 +SFR(DEEDAT, 0xF2); // Data EEPROM data register +SFR(DEEADR, 0xF3); // Data EEPROM address register +SFR(DIVM, 0x95); // CPU clock divide-by-M control +SFR(DPH, 0x83); // Data Pointer High +SFR(DPL, 0x82); // Data Pointer Low +SFR(FMADRH, 0xE7); // Program flash address high +SFR(FMADRL, 0xE6); // Program flash address low +SFR(FMCON, 0xE4); + // Program flash control (Read) + #define BUSY 0x80 + #define HVA 0x08 + #define HVE 0x04 + #define SV 0x02 + #define OI 0x01 + // Program flash control (Write) + #define FMCMD_7 0x80 + #define FMCMD_6 0x40 + #define FMCMD_5 0x20 + #define FMCMD_4 0x10 + #define FMCMD_3 0x08 + #define FMCMD_2 0x04 + #define FMCMD_1 0x02 + #define FMCMD_0 0x01 +SFR(FMDATA, 0xE5); // Program flash data +SFR(I2ADR, 0xDB); // I2C slave address register + #define I2ADR_6 0x80 + #define I2ADR_5 0x40 + #define I2ADR_4 0x20 + #define I2ADR_3 0x10 + #define I2ADR_2 0x08 + #define I2ADR_1 0x04 + #define I2ADR_0 0x02 + #define GC 0x01 +SFR(I2CON, 0xD8); // I2C control register + SBIT(I2EN, 0xD8, 6); + SBIT(STA, 0xD8, 5); + SBIT(STO, 0xD8, 4); + SBIT(SI, 0xD8, 3); + SBIT(AA, 0xD8, 2); + SBIT(CRSEL, 0xD8, 0); +SFR(I2DAT, 0xDA); // I2C data register +SFR(I2SCLH, 0xDD); // I2C serial clock generator/SCL duty cycle register high +SFR(I2SCLL, 0xDC); // I2C serial clock generator/SCL duty cycle register low +SFR(I2STAT, 0xD9); // I2C status register + #define STA_4 0x80 + #define STA_3 0x40 + #define STA_2 0x20 + #define STA_1 0x10 + #define STA_0 0x08 // Only write 0 to the lowest three bits +SFR(ICRAH, 0xAB); // Input capture A register high +SFR(ICRAL, 0xAA); // Input capture A register low +SFR(ICRBH, 0xAF); // Input capture B register high +SFR(ICRBL, 0xAE); // Input capture B register low +SFR(IEN0, 0xA8); // Interrupt Enable 0 + SBIT(EA, 0xA8, 7); + SBIT(EWDRT, 0xA8, 6); + SBIT(EBO, 0xA8, 5); + SBIT(ES_ESR, 0xA8, 4); + SBIT(ET1, 0xA8, 3); + SBIT(EX1, 0xA8, 2); + SBIT(ET0, 0xA8, 1); + SBIT(EX0, 0xA8, 0); +SFR(IEN1, 0xE8); // Interrupt Enable 1 + SBIT(EADEE, 0xE8, 7); + SBIT(EST, 0xE8, 6); + SBIT(ECCU, 0xE8, 4); + SBIT(ESPI, 0xE8, 3); + SBIT(EC, 0xE8, 2); + SBIT(EKBI, 0xE8, 1); + SBIT(EI2C, 0xE8, 0); +SFR(IP0, 0xB8); // Interrupt Priority 0 + SBIT(PWDRT, 0xB8, 6); + SBIT(PBO, 0xB8, 5); + SBIT(PS_PSR, 0xB8, 4); + SBIT(PT1, 0xB8, 3); + SBIT(PX1, 0xB8, 2); + SBIT(PT0, 0xB8, 1); + SBIT(PX0, 0xB8, 0); +SFR(IP0H, 0xB7); // Interrupt Priority 0 high + #define PWDRTH 0x40 + #define PBOH 0x20 + #define PSH_PSRH 0x10 + #define PT1H 0x08 + #define PX1H 0x04 + #define PT0H 0x02 + #define PX0H 0x01 +SFR(IP1, 0xF8); // Interrupt Priority 1 + SBIT(PADEE, 0xF8, 7); + SBIT(PST, 0xF8, 6); + SBIT(PCCU, 0xF8, 4); + SBIT(PSPI, 0xF8, 3); + SBIT(PC, 0xF8, 2); + SBIT(PKBI, 0xF8, 1); + SBIT(PI2C, 0xF8, 0); +SFR(IP1H, 0xF7); // Interrupt Priority 1 High + #define PAEEH 0x80 + #define PSTH 0x40 + #define PCCUH 0x10 + #define PSPIH 0x08 + #define PCH 0x04 + #define PKBIH 0x02 + #define PI2CH 0x01 +SFR(KBCON, 0x94); // Keypad control register + #define PATN_SEL 0x02 + #define KBIF 0x01 +SFR(KBMASK, 0x86); // Keypad interrupt mask register +SFR(KBPATN, 0x93); // Keypad pattern register +SFR(OCRAH, 0xEF); // Output compare A register high +SFR(OCRAL, 0xEE); // Output compare A register low +SFR(OCRBH, 0xFB); // Output compare B register high +SFR(OCRBL, 0xFA); // Output compare B register low +SFR(OCRCH, 0xFD); // Output compare C register high +SFR(OCRCL, 0xFC); // Output compare C register low +SFR(OCRDH, 0xFF); // Output compare D register high +SFR(OCRDL, 0xFE); // Output compare D register low +SFR(P0, 0x80); // Port 0 + SBIT(P0_7, 0x80, 7); + SBIT(T1, 0x80, 7); + SBIT(KB7, 0x80, 7); + SBIT(P0_6, 0x80, 6); + SBIT(CMP_1, 0x80, 6); // Renamed, not to conflict with the CMP1 register + SBIT(KB6, 0x80, 6); + SBIT(P0_5, 0x80, 5); + SBIT(CMPREF, 0x80, 5); + SBIT(KB5, 0x80, 5); + SBIT(P0_4, 0x80, 4); + SBIT(CIN1A, 0x80, 4); + SBIT(KB4, 0x80, 4); + SBIT(P0_3, 0x80, 3); + SBIT(CIN1B, 0x80, 3); + SBIT(KB3, 0x80, 3); + SBIT(P0_2, 0x80, 2); + SBIT(CIN2A, 0x80, 2); + SBIT(KB2, 0x80, 2); + SBIT(P0_1, 0x80, 1); + SBIT(CIN2B, 0x80, 1); + SBIT(KB1, 0x80, 1); + SBIT(P0_0, 0x80, 0); + SBIT(CMP_2, 0x80, 0); // Renamed, not to conflict with the CMP2 register + SBIT(KB0, 0x80, 0); +SFR(P1, 0x90); // Port 1 + SBIT(P1_7, 0x90, 7); + SBIT(OCC, 0x90, 7); + SBIT(P1_6, 0x90, 6); + SBIT(OCB, 0x90, 6); + SBIT(P1_5, 0x90, 5); + SBIT(RST, 0x90, 5); + SBIT(P1_4, 0x90, 4); + SBIT(INT1, 0x90, 4); + SBIT(P1_3, 0x90, 3); + SBIT(INT0, 0x90, 3); + SBIT(SDA, 0x90, 3); + SBIT(P1_2, 0x90, 2); + SBIT(T0, 0x90, 2); + SBIT(SCL, 0x90, 2); + SBIT(P1_1, 0x90, 1); + SBIT(RXD, 0x90, 1); + SBIT(P1_0, 0x90, 0); + SBIT(TXD, 0x90, 0); +SFR(P2, 0xA0); // Port 2 + SBIT(P2_7, 0xA0, 7); + SBIT(ICA, 0xA0, 7); + SBIT(P2_6, 0xA0, 6); + SBIT(OCA, 0xA0, 6); + SBIT(P2_5, 0xA0, 5); + SBIT(SPICLK, 0xA0, 5); + SBIT(P2_4, 0xA0, 4); + SBIT(SS, 0xA0, 4); + SBIT(P2_3, 0xA0, 3); + SBIT(MISO, 0xA0, 3); + SBIT(P2_2, 0xA0, 2); + SBIT(MOSI, 0xA0, 2); + SBIT(P2_1, 0xA0, 1); + SBIT(OCD, 0xA0, 1); + SBIT(P2_0, 0xA0, 0); + SBIT(ICB, 0xA0, 0); +SFR(P3, 0xB0); // Port 3 + SBIT(P3_7, 0xB0, 7); + SBIT(P3_6, 0xB0, 6); + SBIT(P3_5, 0xB0, 5); + SBIT(P3_4, 0xB0, 4); + SBIT(P3_3, 0xB0, 3); + SBIT(P3_2, 0xB0, 2); + SBIT(P3_1, 0xB0, 1); + SBIT(XTAL1,0xB0, 1); + SBIT(P3_0, 0xB0, 0); + SBIT(XTAL2,0xB0, 0); +SFR(P0M1, 0x84); // Port 0 output mode 1 + #define P0M1_7 0x80 + #define P0M1_6 0x40 + #define P0M1_5 0x20 + #define P0M1_4 0x10 + #define P0M1_3 0x08 + #define P0M1_2 0x04 + #define P0M1_1 0x02 + #define P0M1_0 0x01 +SFR(P0M2, 0x85); // Port 0 output mode 2 + #define P0M2_7 0x80 + #define P0M2_6 0x40 + #define P0M2_5 0x20 + #define P0M2_4 0x10 + #define P0M2_3 0x08 + #define P0M2_2 0x04 + #define P0M2_1 0x02 + #define P0M2_0 0x01 +SFR(P1M1, 0x91); // Port 1 output mode 1 + #define P1M1_7 0x80 + #define P1M1_6 0x40 + #define P1M1_4 0x10 + #define P1M1_3 0x08 + #define P1M1_2 0x04 + #define P1M1_1 0x02 + #define P1M1_0 0x01 +SFR(P1M2, 0x92); // Port 1 output mode 2 + #define P1M2_7 0x80 + #define P1M2_6 0x40 + #define P1M2_4 0x10 + #define P1M2_3 0x08 + #define P1M2_2 0x04 + #define P1M2_1 0x02 + #define P1M2_0 0x01 +SFR(P2M1, 0xA4); // Port 2 output mode 1 + #define P2M1_7 0x80 + #define P2M1_6 0x40 + #define P2M1_5 0x20 + #define P2M1_4 0x10 + #define P2M1_3 0x08 + #define P2M1_2 0x04 + #define P2M1_1 0x02 + #define P2M1_0 0x01 +SFR(P2M2, 0xA5); // Port 2 output mode 2 + #define P2M2_7 0x80 + #define P2M2_6 0x40 + #define P2M2_5 0x20 + #define P2M2_4 0x10 + #define P2M2_3 0x08 + #define P2M2_2 0x04 + #define P2M2_1 0x02 + #define P2M2_0 0x01 +SFR(P3M1, 0xB1); // Port 3 output mode 1 + #define P3M1_1 0x02 + #define P3M1_0 0x01 +SFR(P3M2, 0xB2); // Port 3 output mode 2 + #define P3M2_1 0x02 + #define P3M2_0 0x01 +SFR(PCON, 0x87); // Power control register + #define SMOD1 0x80 + #define SMOD0 0x40 + #define BOPD 0x20 + #define BOI 0x10 + #define GF1 0x08 + #define GF0 0x04 + #define PMOD1 0x02 + #define PMOD0 0x01 +SFR(PCONA, 0xB5); // Power control register A + #define RTCPD 0x80 + #define DEEPD 0x40 + #define VCPD 0x20 + #define ADPD 0x10 + #define I2PD 0x08 + #define SPPD 0x04 + #define SPD 0x02 + #define CCUPR 0x01 +SFR(PSW, 0xD0); // Program Status Word + SBIT(CY, 0xD0, 7); + SBIT(AC, 0xD0, 6); + SBIT(F0, 0xD0, 5); + SBIT(RS1, 0xD0, 4); + SBIT(RS0, 0xD0, 3); + SBIT(OV, 0xD0, 2); + SBIT(F1, 0xD0, 1); + SBIT(P, 0xD0, 0); +SFR(PT0AD, 0xF6); // Port 0 digital input disable + #define PT0AD_5 0x20 + #define PT0AD_4 0x10 + #define PT0AD_3 0x08 + #define PT0AD_2 0x04 + #define PT0AD_1 0x02 +SFR(RSTSRC, 0xDF); // Reset source register + #define BOF 0x20 + #define POF 0x10 + #define R_BK 0x08 + #define R_WD 0x04 + #define R_SF 0x02 + #define R_EX 0x01 +SFR(RTCCON, 0xD1); // Real-time clock control + #define RTCF 0x80 + #define RTCS1 0x40 + #define RTCS0 0x20 + #define ERTC 0x02 + #define RTCEN 0x01 +SFR(RTCH, 0xD2); // Real-time clock register high +SFR(RTCL, 0xD3); // Real-time clock register low +SFR(SADDR, 0xA9); // Serial port address register +SFR(SADEN, 0xB9); // Serial port address enable +SFR(SBUF, 0x99); // Serial port data buffer register +SFR(SCON, 0x98); // Serial port control + SBIT(SM0_FE, 0x98, 7); + SBIT(SM1, 0x98, 6); + SBIT(SM2, 0x98, 5); + SBIT(REN, 0x98, 4); + SBIT(TB8, 0x98, 3); + SBIT(RB8, 0x98, 2); + SBIT(TI, 0x98, 1); + SBIT(RI, 0x98, 0); +SFR(SSTAT, 0xBA); // Serial port extended status register + #define DBMOD 0x80 + #define INTLO 0x40 + #define CIDIS 0x20 + #define DBISEL 0x10 + #define FE 0x08 + #define BR 0x04 + #define OE 0x02 + #define STINT 0x01 +SFR(SP, 0x81); // Stack Pointer +SFR(SPCTL, 0xE2); // SPI control register + #define SSIG 0x80 + #define SPEN 0x40 + #define DORD 0x20 + #define MSTR 0x10 + #define CPOL 0x08 + #define CPHA 0x04 + #define SPR1 0x02 + #define SPR0 0x01 +SFR(SPSTAT, 0xE1); // SPI status register + #define SPIF 0x80 + #define WCOL 0x40 +SFR(SPDAT, 0xE3); // SPI data register +SFR(TAMOD, 0x8F); // Timer 0 and 1 auxiliary mode + #define T1M2 0x10 + #define T0M2 0x01 +SFR(TCON, 0x88); // Timer 0 and 1 control + SBIT(TF1, 0x88, 7); + SBIT(TR1, 0x88, 6); + SBIT(TF0, 0x88, 5); + SBIT(TR0, 0x88, 4); + SBIT(IE1, 0x88, 3); + SBIT(IT1, 0x88, 2); + SBIT(IE0, 0x88, 1); + SBIT(IT0, 0x88, 0); +SFR(TCR20, 0xC8); // CCU control register 0 + SBIT(PLEEN, 0xC8, 7); + SBIT(HLTRN, 0xC8, 6); + SBIT(HLTEN, 0xC8, 5); + SBIT(ALTCD, 0xC8, 4); + SBIT(ALTAB, 0xC8, 3); + SBIT(TDIR2, 0xC8, 2); + SBIT(TMOD21, 0xC8, 1); + SBIT(TMOD20, 0xC8, 0); +SFR(TCR21, 0xF9); // CCU control register 1 + #define TCOU2 0x80 + #define PLLDV_3 0x08 + #define PLLDV_2 0x04 + #define PLLDV_1 0x02 + #define PLLDV_0 0x01 +SFR(TH0, 0x8C); // Timer 0 high +SFR(TH1, 0x8D); // Timer 1 high +SFR(TH2, 0xCD); // CCU timer high +SFR(TICR2,0xC9); // CCU interrupt control register + #define TOIE2 0x80 + #define TOCIE2D 0x40 + #define TOCIE2C 0x20 + #define TOCIE2B 0x10 + #define TOCIE2A 0x08 + #define TICIE2B 0x02 + #define TICIE2A 0x01 +SFR(TIFR2,0xE9); // CCU interrupt flag register + #define TOIF2 0x80 + #define TOCF2D 0x40 + #define TOCF2C 0x20 + #define TOCF2B 0x10 + #define TOCF2A 0x08 + #define TICF2B 0x02 + #define TICF2A 0x01 +SFR(TISE2,0xDE); // CCU interrupt status encode register + #define ENCINT2 0x04 + #define ENCINT1 0x02 + #define ENCINT0 0x01 +SFR(TL0, 0x8A); // Timer 0 low +SFR(TL1, 0x8B); // Timer 1 low +SFR(TL2, 0xCC); // CCU timer low +SFR(TMOD, 0x89); // Timer 0 and 1 mode + #define T1GATE 0x80 + #define T1C_T 0x40 + #define T1M1 0x20 + #define T1M0 0x10 + #define T0GATE 0x08 + #define T0C_T 0x04 + #define T0M1 0x02 + #define T0M0 0x01 +SFR(TOR2H, 0xCF); // CCU reload register high +SFR(TOR2L, 0xCE); // CCU reload register low +SFR(TPCR2H,0xCB); // Prescaler control register high + #define TPCR2H_1 0x02 + #define TPCR2H_0 0x01 +SFR(TPCR2L,0xCA); // Prescaler control register low + #define TPCR2L_7 0x80 + #define TPCR2L_6 0x40 + #define TPCR2L_5 0x20 + #define TPCR2L_4 0x10 + #define TPCR2L_3 0x08 + #define TPCR2L_2 0x04 + #define TPCR2L_1 0x02 + #define TPCR2L_0 0x01 +SFR(TRIM, 0x96); // Internal oscillator trim register + #define RCCLK 0x80 + #define ENCLK 0x40 + #define TRIM_5 0x20 + #define TRIM_4 0x10 + #define TRIM_3 0x08 + #define TRIM_2 0x04 + #define TRIM_1 0x02 + #define TRIM_0 0x01 +SFR(WDCON, 0xA7); // Watchdog control register + #define PRE2 0x80 + #define PRE1 0x40 + #define PRE0 0x20 + #define WDRUN 0x04 + #define WDTOF 0x02 + #define WDCLK 0x01 +SFR(WDL, 0xC1); // Watchdog load +SFR(WFEED1, 0xC2); // Watchdog feed 1 +SFR(WFEED2, 0xC3); // Watchdog feed 2 +#endif // __P89LPC935_6_H__ \ No newline at end of file diff --git a/device/include/mcs51/p89lpc938.h b/device/include/mcs51/p89lpc938.h new file mode 100644 index 0000000..d4bdced --- /dev/null +++ b/device/include/mcs51/p89lpc938.h @@ -0,0 +1,448 @@ +/* p89lpc938.h + * This header defines register addresses for the Philips P89LPC938 + * microcontroller for use with the SDCC compiler. + * + * Copyright © 2007 Kyle Guinn + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 3 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this program. If not, see + * . */ + +#ifndef P89LPC938_H +#define P89LPC938_H + +/* SFR byte addresses */ +__sfr __at (0x80) P0; /* Port 0 */ +__sfr __at (0x81) SP; /* Stack pointer */ +__sfr __at (0x82) DPL; /* Data pointer low */ +__sfr __at (0x83) DPH; /* Data pointer high */ +__sfr __at (0x84) P0M1; /* Port 0 output mode 1 */ +__sfr __at (0x85) P0M2; /* Port 0 output mode 2 */ +__sfr __at (0x86) KBMASK; /* Keypad interrupt mask register */ +__sfr __at (0x87) PCON; /* Power control register */ +__sfr __at (0x88) TCON; /* Timer 0 and 1 control */ +__sfr __at (0x89) TMOD; /* Timer 0 and 1 mode */ +__sfr __at (0x8A) TL0; /* Timer 0 low */ +__sfr __at (0x8B) TL1; /* Timer 1 low */ +__sfr __at (0x8C) TH0; /* Timer 0 high */ +__sfr __at (0x8D) TH1; /* Timer 1 high */ +__sfr __at (0x8F) TAMOD; /* Timer 0 and 1 auxiliary mode */ +__sfr __at (0x90) P1; /* Port 1 */ +__sfr __at (0x91) P1M1; /* Port 1 output mode 1 */ +__sfr __at (0x92) P1M2; /* Port 1 output mode 2 */ +__sfr __at (0x93) KBPATN; /* Keypad pattern register */ +__sfr __at (0x94) KBCON; /* Keypad control register */ +__sfr __at (0x95) DIVM; /* CPU clock divide-by-M control */ +__sfr __at (0x96) TRIM; /* Internal oscillator trim register */ +__sfr __at (0x97) AD0CON; /* ADC0 control register */ +__sfr __at (0x98) SCON; /* Serial port control */ +__sfr __at (0x99) SBUF; /* Serial port data buffer register */ +__sfr __at (0xA0) P2; /* Port 2 */ +__sfr __at (0xA1) AD0MODB; /* ADC0 mode register B */ +__sfr __at (0xA2) AUXR1; /* Auxiliary function register */ +__sfr __at (0xA3) AD0INS; /* ADC0 input select */ +__sfr __at (0xA4) P2M1; /* Port 2 output mode 1 */ +__sfr __at (0xA5) P2M2; /* Port 2 output mode 2 */ +__sfr __at (0xA7) WDCON; /* Watchdog control register */ +__sfr __at (0xA8) IEN0; /* Interrupt enable 0 */ +__sfr __at (0xA9) SADDR; /* Serial port address register */ +__sfr __at (0xAA) ICRAL; /* Input capture A register low */ +__sfr __at (0xAB) ICRAH; /* Input capture A register high */ +__sfr __at (0xAC) CMP1; /* Comparator 1 control register */ +__sfr __at (0xAD) CMP2; /* Comparator 2 control register */ +__sfr __at (0xAE) ICRBL; /* Input capture B register low */ +__sfr __at (0xAF) ICRBH; /* Input capture B register high */ +__sfr __at (0xB0) P3; /* Port 3 */ +__sfr __at (0xB1) P3M1; /* Port 3 output mode 1 */ +__sfr __at (0xB2) P3M2; /* Port 3 output mode 2 */ +__sfr __at (0xB5) PCONA; /* Power control register A */ +__sfr __at (0xB7) IP0H; /* Interrupt priority 0 high */ +__sfr __at (0xB8) IP0; /* Interrupt priority 0 */ +__sfr __at (0xB9) SADEN; /* Serial port address enable */ +__sfr __at (0xBA) SSTAT; /* Serial port extended status register */ +__sfr __at (0xBD) BRGCON; /* Baud rate generator control */ +__sfr __at (0xBE) BRGR0; /* Baud rate generator rate low */ +__sfr __at (0xBF) BRGR1; /* Baud rate generator rate high */ +__sfr __at (0xC0) AD0MODA; /* ADC0 mode register A */ +__sfr __at (0xC1) WDL; /* Watchdog load */ +__sfr __at (0xC2) WFEED1; /* Watchdog feed 1 */ +__sfr __at (0xC3) WFEED2; /* Watchdog feed 2 */ +__sfr __at (0xC8) TCR20; /* CCU control register 0 */ +__sfr __at (0xC9) TICR2; /* CCU interrupt control register */ +__sfr __at (0xCA) TPCR2L; /* Prescaler control register low */ +__sfr __at (0xCB) TPCR2H; /* Prescaler control register high */ +__sfr __at (0xCC) TL2; /* CCU timer low */ +__sfr __at (0xCD) TH2; /* CCU timer high */ +__sfr __at (0xCE) TOR2L; /* CCU reload register low */ +__sfr __at (0xCF) TOR2H; /* CCU reload register high */ +__sfr __at (0xD0) PSW; /* Program status word */ +__sfr __at (0xD1) RTCCON; /* RTC control */ +__sfr __at (0xD2) RTCH; /* RTC register high */ +__sfr __at (0xD3) RTCL; /* RTC register low */ +__sfr __at (0xD5) IEN2; /* Interrupt enable 2 */ +__sfr __at (0xD6) IP2; /* Interrupt priority 2 */ +__sfr __at (0xD7) IP2H; /* Interrupt priority 2 high */ +__sfr __at (0xD8) I2CON; /* I²C control register */ +__sfr __at (0xD9) I2STAT; /* I²C status register */ +__sfr __at (0xDA) I2DAT; /* I²C data register */ +__sfr __at (0xDB) I2ADR; /* I²C slave address register */ +__sfr __at (0xDC) I2SCLL; /* Serial clock generator low/ + * SCL duty cycle register low */ +__sfr __at (0xDD) I2SCLH; /* Serial clock generator high/ + * SCL duty cycle register high */ +__sfr __at (0xDE) TISE2; /* CCU interrupt status encode register */ +__sfr __at (0xDF) RSTSRC; /* Reset source register */ +__sfr __at (0xE0) ACC; /* Accumulator */ +__sfr __at (0xE1) SPSTAT; /* SPI status register */ +__sfr __at (0xE2) SPCTL; /* SPI control register */ +__sfr __at (0xE3) SPDAT; /* SPI data register */ +__sfr __at (0xE4) FMCON; /* Program Flash control (Read)/ + * Program Flash control (Write) */ +__sfr __at (0xE5) FMDATA; /* Program Flash data */ +__sfr __at (0xE6) FMADRL; /* Program Flash address low */ +__sfr __at (0xE7) FMADRH; /* Program Flash address high */ +__sfr __at (0xE8) IEN1; /* Interrupt enable 1 */ +__sfr __at (0xE9) TIFR2; /* CCU interrupt flag register */ +__sfr __at (0xEA) CCCRA; /* Capture compare A control register */ +__sfr __at (0xEB) CCCRB; /* Capture compare B control register */ +__sfr __at (0xEC) CCCRC; /* Capture compare C control register */ +__sfr __at (0xED) CCCRD; /* Capture compare D control register */ +__sfr __at (0xEE) OCRAL; /* Output compare A register low */ +__sfr __at (0xEF) OCRAH; /* Output compare A register high */ +__sfr __at (0xF0) B; /* B register */ +__sfr __at (0xF1) DEECON; /* Data EEPROM control register */ +__sfr __at (0xF2) DEEDAT; /* Data EEPROM data register */ +__sfr __at (0xF3) DEEADR; /* Data EEPROM address register */ +__sfr __at (0xF6) PT0AD; /* Port 0 digital input disable */ +__sfr __at (0xF7) IP1H; /* Interrupt priority 1 high */ +__sfr __at (0xF8) IP1; /* Interrupt priority 1 */ +__sfr __at (0xF9) TCR21; /* CCU control register 1 */ +__sfr __at (0xFA) OCRBL; /* Output compare B register low */ +__sfr __at (0xFB) OCRBH; /* Output compare B register high */ +__sfr __at (0xFC) OCRCL; /* Output compare C register low */ +__sfr __at (0xFD) OCRCH; /* Output compare C register high */ +__sfr __at (0xFE) OCRDL; /* Output compare D register low */ +__sfr __at (0xFF) OCRDH; /* Output compare D register high */ + +/* 16-bit SFRs (duplicates of above) */ +__sfr16 __at (0x8382) DPTR; /* Data pointer */ +__sfr16 __at (0x8C8A) TMR0; /* Timer 0 count */ +__sfr16 __at (0x8D8B) TMR1; /* Timer 1 count */ +__sfr16 __at (0xABAA) ICRA; /* Input capture A register */ +__sfr16 __at (0xAFAE) ICRB; /* Input capture B register */ +__sfr16 __at (0xBFBE) BRGR; /* Baud rate generator */ +__sfr16 __at (0xCBCA) TPCR2; /* Prescaler control register */ +__sfr16 __at (0xCDCC) TMR2; /* Timer 2 count */ +__sfr16 __at (0xCFCE) TOR2; /* CCU reload register */ +__sfr16 __at (0xD2D3) RTC; /* RTC register */ +__sfr16 __at (0xDDDC) I2SCL; /* Serial clock generator/ + * SCL duty cycle register */ +__sfr16 __at (0xE7E6) FMADR; /* Program Flash address */ +__sfr16 __at (0xEFEE) OCRA; /* Output compare A register */ +__sfr16 __at (0xFBFA) OCRB; /* Output compare B register */ +__sfr16 __at (0xFDFC) OCRC; /* Output compare C register */ +__sfr16 __at (0xFFFE) OCRD; /* Output compare D register */ + +/* "Extended SFRs" (logically in __xdata memory space) */ +#define BNDSTA0 (*(__xdata volatile unsigned char*)0xFFED) /* ADC0 boundary status register */ +#define ADC0LBND (*(__xdata volatile unsigned char*)0xFFEE) /* ADC0 low_boundary register (MSB) */ +#define ADC0HBND (*(__xdata volatile unsigned char*)0xFFEF) /* ADC0 high_boundary register, left (MSB) */ +#define AD0DAT7R (*(__xdata volatile unsigned char*)0xFFF0) /* ADC0 data register 7, right (LSB) */ +#define AD0DAT7L (*(__xdata volatile unsigned char*)0xFFF1) /* ADC0 data register 7, left (MSB) */ +#define AD0DAT6R (*(__xdata volatile unsigned char*)0xFFF2) /* ADC0 data register 6, right (LSB) */ +#define AD0DAT6L (*(__xdata volatile unsigned char*)0xFFF3) /* ADC0 data register 6, left (MSB) */ +#define AD0DAT5R (*(__xdata volatile unsigned char*)0xFFF4) /* ADC0 data register 5, right (LSB) */ +#define AD0DAT5L (*(__xdata volatile unsigned char*)0xFFF5) /* ADC0 data register 5, left (MSB) */ +#define AD0DAT4R (*(__xdata volatile unsigned char*)0xFFF6) /* ADC0 data register 4, right (LSB) */ +#define AD0DAT4L (*(__xdata volatile unsigned char*)0xFFF7) /* ADC0 data register 4, left (MSB) */ +#define AD0DAT3R (*(__xdata volatile unsigned char*)0xFFF8) /* ADC0 data register 3, right (LSB) */ +#define AD0DAT3L (*(__xdata volatile unsigned char*)0xFFF9) /* ADC0 data register 3, left (MSB) */ +#define AD0DAT2R (*(__xdata volatile unsigned char*)0xFFFA) /* ADC0 data register 2, right (LSB) */ +#define AD0DAT2L (*(__xdata volatile unsigned char*)0xFFFB) /* ADC0 data register 2, left (MSB) */ +#define AD0DAT1R (*(__xdata volatile unsigned char*)0xFFFC) /* ADC0 data register 1, right (LSB) */ +#define AD0DAT1L (*(__xdata volatile unsigned char*)0xFFFD) /* ADC0 data register 1, left (MSB) */ +#define AD0DAT0R (*(__xdata volatile unsigned char*)0xFFFE) /* ADC0 data register 0, right (LSB) */ +#define AD0DAT0L (*(__xdata volatile unsigned char*)0xFFFF) /* ADC0 data register 0, left (MSB) */ + +/* Special Function Bits */ +/* P0 (0x80) */ +__sbit __at (0x80) P0_0; +__sbit __at (0x81) P0_1; +__sbit __at (0x82) P0_2; +__sbit __at (0x83) P0_3; +__sbit __at (0x84) P0_4; +__sbit __at (0x85) P0_5; +__sbit __at (0x86) P0_6; +__sbit __at (0x87) P0_7; +/*#define CMP2 P0_0*/ /* Removed: Name conflicts with SFR 0xAD */ +#define KB0 P0_0 +#define CIN2B P0_1 +#define KB1 P0_1 +#define CIN2A P0_2 +#define KB2 P0_2 +#define CIN1B P0_3 +#define KB3 P0_3 +#define CIN1A P0_4 +#define KB4 P0_4 +#define CMPREF P0_5 +#define KB5 P0_5 +/*#define CMP1 P0_6*/ /* Removed: Name conflicts with SFR 0xAC */ +#define KB6 P0_6 +#define T1 P0_7 +#define KB7 P0_7 + +/* TCON (0x88) */ +__sbit __at (0x88) TCON_0; +__sbit __at (0x89) TCON_1; +__sbit __at (0x8A) TCON_2; +__sbit __at (0x8B) TCON_3; +__sbit __at (0x8C) TCON_4; +__sbit __at (0x8D) TCON_5; +__sbit __at (0x8E) TCON_6; +__sbit __at (0x8F) TCON_7; +#define IT0 TCON_0 +#define IE0 TCON_1 +#define IT1 TCON_2 +#define IE1 TCON_3 +#define TR0 TCON_4 +#define TF0 TCON_5 +#define TR1 TCON_6 +#define TF1 TCON_7 + +/* P1 (0x90) */ +__sbit __at (0x90) P1_0; +__sbit __at (0x91) P1_1; +__sbit __at (0x92) P1_2; +__sbit __at (0x93) P1_3; +__sbit __at (0x94) P1_4; +__sbit __at (0x95) P1_5; +__sbit __at (0x96) P1_6; +__sbit __at (0x97) P1_7; +#define TXD P1_0 +#define RXD P1_1 +#define T0 P1_2 +#define SCL P1_2 +#define INT0 P1_3 +#define SDA P1_3 +#define INT1 P1_4 +#define RST P1_5 +#define OCB P1_6 +#define OCC P1_7 + +/* SCON (0x98) */ +__sbit __at (0x98) SCON_0; +__sbit __at (0x99) SCON_1; +__sbit __at (0x9A) SCON_2; +__sbit __at (0x9B) SCON_3; +__sbit __at (0x9C) SCON_4; +__sbit __at (0x9D) SCON_5; +__sbit __at (0x9E) SCON_6; +__sbit __at (0x9F) SCON_7; +#define RI SCON_0 +#define TI SCON_1 +#define RB8 SCON_2 +#define TB8 SCON_3 +#define REN SCON_4 +#define SM2 SCON_5 +#define SM1 SCON_6 +#define SM0 SCON_7 +#define FE SCON_7 + +/* P2 (0xA0) */ +__sbit __at (0xA0) P2_0; +__sbit __at (0xA1) P2_1; +__sbit __at (0xA2) P2_2; +__sbit __at (0xA3) P2_3; +__sbit __at (0xA4) P2_4; +__sbit __at (0xA5) P2_5; +__sbit __at (0xA6) P2_6; +__sbit __at (0xA7) P2_7; +#define ICB P2_0 +#define OCD P2_1 +#define MOSI P2_2 +#define MISO P2_3 +#define SS P2_4 +#define SPICLK P2_5 +#define OCA P2_6 +#define ICA P2_7 + +/* IEN0 (0xA8) */ +__sbit __at (0xA8) IEN0_0; +__sbit __at (0xA9) IEN0_1; +__sbit __at (0xAA) IEN0_2; +__sbit __at (0xAB) IEN0_3; +__sbit __at (0xAC) IEN0_4; +__sbit __at (0xAD) IEN0_5; +__sbit __at (0xAE) IEN0_6; +__sbit __at (0xAF) IEN0_7; +#define EX0 IEN0_0 +#define ET0 IEN0_1 +#define EX1 IEN0_2 +#define ET1 IEN0_3 +#define ES IEN0_4 +#define ESR IEN0_4 +#define EBO IEN0_5 +#define EWDRT IEN0_6 +#define EA IEN0_7 + +/* P3 (0xB0) */ +__sbit __at (0xB0) P3_0; +__sbit __at (0xB1) P3_1; +__sbit __at (0xB2) P3_2; +__sbit __at (0xB3) P3_3; +__sbit __at (0xB4) P3_4; +__sbit __at (0xB5) P3_5; +__sbit __at (0xB6) P3_6; +__sbit __at (0xB7) P3_7; +#define XTAL2 P3_0 +#define XTAL1 P3_1 + +/* IP0 (0xB8) */ +__sbit __at (0xB8) IP0_0; +__sbit __at (0xB9) IP0_1; +__sbit __at (0xBA) IP0_2; +__sbit __at (0xBB) IP0_3; +__sbit __at (0xBC) IP0_4; +__sbit __at (0xBD) IP0_5; +__sbit __at (0xBE) IP0_6; +__sbit __at (0xBF) IP0_7; +#define PX0 IP0_0 +#define PT0 IP0_1 +#define PX1 IP0_2 +#define PT1 IP0_3 +#define PS IP0_4 +#define PSR IP0_4 +#define PBO IP0_5 +#define PWDRT IP0_6 + +/* AD0MODA (0xC0) */ +__sbit __at (0xC0) AD0MODA_0; +__sbit __at (0xC1) AD0MODA_1; +__sbit __at (0xC2) AD0MODA_2; +__sbit __at (0xC3) AD0MODA_3; +__sbit __at (0xC4) AD0MODA_4; +__sbit __at (0xC5) AD0MODA_5; +__sbit __at (0xC6) AD0MODA_6; +__sbit __at (0xC7) AD0MODA_7; +#define SCAN0 AD0MODA_4 +#define SCC0 AD0MODA_5 +#define BURST0 AD0MODA_6 +#define BNDI0 AD0MODA_7 + +/* TCR20 (0xC8) */ +__sbit __at (0xC8) TCR20_0; +__sbit __at (0xC9) TCR20_1; +__sbit __at (0xCA) TCR20_2; +__sbit __at (0xCB) TCR20_3; +__sbit __at (0xCC) TCR20_4; +__sbit __at (0xCD) TCR20_5; +__sbit __at (0xCE) TCR20_6; +__sbit __at (0xCF) TCR20_7; +#define TMOD20 TCR20_0 +#define TMOD21 TCR20_1 +#define TDIR2 TCR20_2 +#define ALTAB TCR20_3 +#define ALTCD TCR20_4 +#define HLTEN TCR20_5 +#define HLTRN TCR20_6 +#define PLEEN TCR20_7 + +/* PSW (0xD0) */ +__sbit __at (0xD0) PSW_0; +__sbit __at (0xD1) PSW_1; +__sbit __at (0xD2) PSW_2; +__sbit __at (0xD3) PSW_3; +__sbit __at (0xD4) PSW_4; +__sbit __at (0xD5) PSW_5; +__sbit __at (0xD6) PSW_6; +__sbit __at (0xD7) PSW_7; +#define P PSW_0 +#define F1 PSW_1 +#define OV PSW_2 +#define RS0 PSW_3 +#define RS1 PSW_4 +#define F0 PSW_5 +#define AC PSW_6 +#define CY PSW_7 + +/* I2CON (0xD8) */ +__sbit __at (0xD8) I2CON_0; +__sbit __at (0xD9) I2CON_1; +__sbit __at (0xDA) I2CON_2; +__sbit __at (0xDB) I2CON_3; +__sbit __at (0xDC) I2CON_4; +__sbit __at (0xDD) I2CON_5; +__sbit __at (0xDE) I2CON_6; +__sbit __at (0xDF) I2CON_7; +#define CRSEL I2CON_0 +#define AA I2CON_2 +#define SI I2CON_3 +#define STO I2CON_4 +#define STA I2CON_5 +#define I2EN I2CON_6 + +/* ACC (0xE0) */ +__sbit __at (0xE0) ACC_0; +__sbit __at (0xE1) ACC_1; +__sbit __at (0xE2) ACC_2; +__sbit __at (0xE3) ACC_3; +__sbit __at (0xE4) ACC_4; +__sbit __at (0xE5) ACC_5; +__sbit __at (0xE6) ACC_6; +__sbit __at (0xE7) ACC_7; + +/* IEN1 (0xE8) */ +__sbit __at (0xE8) IEN1_0; +__sbit __at (0xE9) IEN1_1; +__sbit __at (0xEA) IEN1_2; +__sbit __at (0xEB) IEN1_3; +__sbit __at (0xEC) IEN1_4; +__sbit __at (0xED) IEN1_5; +__sbit __at (0xEE) IEN1_6; +__sbit __at (0xEF) IEN1_7; +#define EI2C IEN1_0 +#define EKBI IEN1_1 +#define EC IEN1_2 +#define ESPI IEN1_3 +#define ECCU IEN1_4 +#define EST IEN1_6 +#define EIEE IEN1_7 + +/* B (0xF0) */ +__sbit __at (0xF0) B_0; +__sbit __at (0xF1) B_1; +__sbit __at (0xF2) B_2; +__sbit __at (0xF3) B_3; +__sbit __at (0xF4) B_4; +__sbit __at (0xF5) B_5; +__sbit __at (0xF6) B_6; +__sbit __at (0xF7) B_7; + +/* IP1 (0xF8) */ +__sbit __at (0xF8) IP1_0; +__sbit __at (0xF9) IP1_1; +__sbit __at (0xFA) IP1_2; +__sbit __at (0xFB) IP1_3; +__sbit __at (0xFC) IP1_4; +__sbit __at (0xFD) IP1_5; +__sbit __at (0xFE) IP1_6; +__sbit __at (0xFF) IP1_7; +#define PI2C IP1_0 +#define PKBI IP1_1 +#define PC IP1_2 +#define PSPI IP1_3 +#define PCCU IP1_4 +#define PST IP1_6 +#define PADEE IP1_7 + +#endif /* P89LPC938_H */ diff --git a/device/include/mcs51/p89v51rd2.h b/device/include/mcs51/p89v51rd2.h new file mode 100644 index 0000000..c5672db --- /dev/null +++ b/device/include/mcs51/p89v51rd2.h @@ -0,0 +1,167 @@ +/*------------------------------------------------------------------------- + Register Declarations for the Philips P89V51RD2 Processor + + Written By - Jesus Calvino-Fraga / jesusc at ece.ubc.ca (June 2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef REG_P89V51RD2_H +#define REG_P89V51RD2_H + +#include <8052.h> // Load definitions for the 8052 + +#ifdef REG8052_H +#undef REG8052_H +#endif + +// Define P89V51RD2 specific registers only + +__sfr __at (0x8E) AUXR; //Auxiliary function register (Reset value 0x00). + #define EXTRAM 0x02 //'0'=uses internal XRAM. + #define AO 0x01 //'1'=Disables ALE generation. + +__sfr __at (0xA2) AUXR1; //Auxiliary function register 1 (Reset value 0x00). + #define GF2 0x08 //General purpose user-defined flag. + #define DPS 0x01 //Data pointer select. + +__sfr __at (0xFA) CCAP0H; //Module 0 Capture HIGH. +__sfr __at (0xFB) CCAP1H; //Module 1 Capture HIGH. +__sfr __at (0xFC) CCAP2H; //Module 2 Capture HIGH. +__sfr __at (0xFD) CCAP3H; //Module 3 Capture HIGH. +__sfr __at (0xFE) CCAP4H; //Module 4 Capture HIGH. +__sfr __at (0xEA) CCAP0L; //Module 0 Capture LOW. +__sfr __at (0xEB) CCAP1L; //Module 1 Capture LOW. +__sfr __at (0xEC) CCAP2L; //Module 2 Capture LOW. +__sfr __at (0xED) CCAP3L; //Module 3 Capture LOW. +__sfr __at (0xEE) CCAP4L; //Module 4 Capture LOW. + +__sfr __at (0xDA) CCAPM0; //Module 0 Mode. +__sfr __at (0xDB) CCAPM1; //Module 1 Mode. +__sfr __at (0xDC) CCAPM2; //Module 2 Mode. +__sfr __at (0xDD) CCAPM3; //Module 3 Mode. +__sfr __at (0xDE) CCAPM4; //Module 4 Mode. +//The preceding five registers have the following bits: + #define ECOM 0x40 //Enable Comparator. + #define CAPP 0x20 //1=enables positive edge capture. + #define CAPN 0x10 //1=enables negative edge capture. + #define MAT 0x08 //When counter matches sets CCF_n bit causing and interrupt. + #define TOG 0x04 //Toggle output on match. + #define PWM 0x02 //Pulse width modulation mode. + #define ECCF 0x01 //Enable CCF interrupt. + +__sfr __at (0xD8) CCON; //PCA Counter Control (Reset value 0x00) + __sbit __at (0xDF) CF; //PCA Counter overflow flag. + __sbit __at (0xDE) CR ; //PCA Counter Run Control Bit. 1=counter on. 0=counter off. + __sbit __at (0xDC) CCF4;//PCA Module 4 Interrupt Flag. + __sbit __at (0xDB) CCF3;//PCA Module 3 Interrupt Flag. + __sbit __at (0xDA) CCF2;//PCA Module 2 Interrupt Flag. + __sbit __at (0xD9) CCF1;//PCA Module 1 Interrupt Flag. + __sbit __at (0xD8) CCF0;//PCA Module 0 Interrupt Flag. + +__sfr __at (0xF9) CH; //PCA Counter HIGH. +__sfr __at (0xE9) CL; //PCA Counter LOW. + +__sfr __at (0xD9) CMOD; //PCA Counter Mode. + #define CIDL 0x80 //CIDL=0 program the PCA counter to work during idle mode. + #define WDTE 0x40 //Watchdog Timer Enable. + #define CPS1 0x04 //PCA Count Pulse Select bit 1. + #define CPS0 0x02 //PCA Count Pulse Select bit 0. + //00=Internal clock, Fosc/6 + //01=Internal clock, Fosc/6 + //10=Timer 0 overflow + //11=External clock at ECI/P1.2 pin (max rate=Fosc/4) + #define ECF 0x01 //PCA Enable Counter Overflow Interrupt. + +__sfr __at (0xB6) FST; //Flash Status Register. + #define SB 0x40 + #define EDC 0x08 + +__sfr __at (0xB1) FCF; //Flash program memory bank selection. + #define SWR 0x02 + #define BSEL 0x01 + +//Attention IEN0 is the same as register IE found in <8051.h> only bit EC added here. +__sfr __at (0xA8) IEN0; //Interrupt Enable 1. + __sbit __at (0xAE) EC; //PCA Interrupt Enable bit. + +__sfr __at (0xE8) IEN1; //Interrupt Enable 1 + __sbit __at (0xEB) EBO; //Brown-out Interrupt Enable. (Vector is 0x00b4). + +//Attention IP0 is the same as register IP found in <8051.h> only bit PPC added here. +__sfr __at (0xB8) IP0; //Interrupt Priority 0 HIGH. + __sbit __at (0xBE) PPC; //PCA Interrupt Priority low bit. + +__sfr __at (0xB7) IP0H; //Interrupt Priority 0 HIGH + #define PPCH 0x40 //PCA Interrupt Priority High Bit. + #define PT2H 0x20 //Timer 2 Interrupt Interrupt Priority High Bit. + #define PSH 0x10 //Serial Port Interrupt Priority High Bit. + #define PT1H 0x08 //Timer 1 Interrupt Priority High Bit. + #define PX1H 0x04 //External Interrupt 1 Priority High Bit. + #define PT0H 0x02 //Timer 0 Interrupt Priority High Bit. + #define PX0H 0x01 //External Interrupt 0 Priority High Bit. + +__sfr __at (0xF8) IP1; //Interrupt Priority 1. + __sbit __at (0xFB) PBO; //Brown-out Interrupt Priority Bit. + +__sfr __at (0xF7) IP1H; //Interrupt Priority 1 HIGH. + #define PBOH 0x08 //Brown-out Interrupt Priority High Bit. + +__sfr __at (0xA9) SADDR; //Serial Port Address Register. +__sfr __at (0xB9) SADEN; //Serial Port Address Enable. + +__sfr __at (0xD5) SPCR; //SPI Control Register (Reset value 00000000B). +__sfr __at (0xD5) SPCTL; //SPI Control Register (This name appears also in the datasheet). + #define SPIE 0x80 //If both SPIE and ES are set to one, SPI interrupts are enabled. + #define SPEN 0x40 //SPI enable bit. When set enables SPI. + #define SPE 0x40 //Same as above. This name appears also in the manual :-( + #define DORD 0x20 //Data trans. order. 0=MSB first; 1=LSB first. + #define MSTR 0x10 //1=master mode. 0=slave mode. + #define CPOL 0x08 //1=SCK is high when idle (active low), 0=SCK is low when idle (active high). + #define CPHA 0x04 //1=shift triggered on the trailing edge of SCK. 0=shift trig. on leading edge. + #define SPR1 0x02 //SPI Clork Rate select bit 1. + #define SPR0 0x01 //SPI Clork Rate select bit 0. + //00 = Fosc/4 + //01 = Fosc/16 + //10 = Fosc/64 + //11 = Fosc/128 + +__sfr __at (0xAA) SPSR; //SPI Configuration Register (Reset value 00000000B). +__sfr __at (0xAA) SPCFG; //SPI Configuration Register (This name appears also in the datasheet). + #define SPIF 0x80 //SPI interrupt flag. + #define SPWCOL 0x40 //Write collision Flag. + +__sfr __at (0x86) SPDR; //SPI Data +__sfr __at (0x86) SPDAT; //SPI Data (This name appears also in the datasheet). + +__sfr __at (0xC0) WDTC; //Watchdog Timer Control (Reset value 0x00). + #define WDOUT 0x10 //Watchdog output enable. + #define WDRE 0x08 //Watchdog timer reset enable. + #define WDTS 0x04 //Watchdog timer reset flag. + #define WDT 0x02 //Watchdog timer refresh. + #define SWDT 0x01 //Start watchdog timer. + +__sfr __at (0x85) WDTD; //Watchdog Timer Data/Reload. + +__sfr __at (0xC9) T2MOD; //Timer 2 mode control + #define DCEN 0x01 //Down count enable bit + #define T2OE 0x02 //Timer 2 Output Enable bit. + #define ENT2 0x20 //No description??? + +#endif /*REG_P89V51RD2_H*/ diff --git a/device/include/mcs51/p89v66x.h b/device/include/mcs51/p89v66x.h new file mode 100644 index 0000000..968cd3a --- /dev/null +++ b/device/include/mcs51/p89v66x.h @@ -0,0 +1,391 @@ +/*-------------------------------------------------------------------------- +p89v66x.h + +This header allows to use the microcontroler NXP (formerly Philips) p89v66x +where x stands for 0,2,4. + +Copyright (c) 2008 Gudjon I. Gudjonsson + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA02111-1307 USA + + The registered are ordered in the same way as in the NXP data sheet: + http://www.standardics.nxp.com/products/80c51/datasheet/p89v660.p89v662.p89v664.pdf + +--------------------------------------------------------------------------*/ +#ifndef __P89V66X_H__ +#define __P89V66X_H__ +#include + +/*BYTE Registers*/ +SFR(ACC, 0xE0); // Accumulator + SBIT(ACC_7, 0xE0, 7); + SBIT(ACC_6, 0xE0, 6); + SBIT(ACC_5, 0xE0, 5); + SBIT(ACC_4, 0xE0, 4); + SBIT(ACC_3, 0xE0, 3); + SBIT(ACC_2, 0xE0, 2); + SBIT(ACC_1, 0xE0, 1); + SBIT(ACC_0, 0xE0, 0); +SFR(AUXR, 0x8E); // Auxiliary + #define EXTRAM 0x02 + #define AO 0x01 +SFR(AUXR1, 0xA2); // Auxiliary 1 + #define ENBOOT 0x20 + #define GF2 0x08 + // Bit 2 must be zero + #define DPS 0x01 +SFR(B, 0xF0); // B register + SBIT(B7, 0xF0, 7); + SBIT(B6, 0xF0, 6); + SBIT(B5, 0xF0, 5); + SBIT(B4, 0xF0, 4); + SBIT(B3, 0xF0, 3); + SBIT(B2, 0xF0, 2); + SBIT(B1, 0xF0, 1); + SBIT(B0, 0xF0, 0); +SFR(CCAP0H, 0xFA); // Module 0 Capture High +SFR(CCAP1H, 0xFB); // Module 1 Capture High +SFR(CCAP2H, 0xFC); // Module 2 Capture High +SFR(CCAP3H, 0xFD); // Module 3 Capture High +SFR(CCAP4H, 0xFE); // Module 4 Capture High +SFR(CCAP0L, 0xEA); // Module 0 Capture Low +SFR(CCAP1L, 0xEB); // Module 1 Capture Low +SFR(CCAP2L, 0xEC); // Module 2 Capture Low +SFR(CCAP3L, 0xED); // Module 3 Capture Low +SFR(CCAP4L, 0xEE); // Module 4 Capture Low +SFR(CCAPM0, 0xC2); // Module 0 Mode + #define ECOM_0 0x40 + #define CAPP_0 0x20 + #define CAPN_0 0x10 + #define MAT_0 0x08 + #define TOG_0 0x04 + #define PWM_0 0x02 + #define ECCF_0 0x01 +SFR(CCAPM1, 0xC3); // Module 1 Mode + #define ECOM_1 0x40 + #define CAPP_1 0x20 + #define CAPN_1 0x10 + #define MAT_1 0x08 + #define TOG_1 0x04 + #define PWM_1 0x02 + #define ECCF_1 0x01 +SFR(CCAPM2, 0xC4); // Module 2 Mode + #define ECOM_2 0x40 + #define CAPP_2 0x20 + #define CAPN_2 0x10 + #define MAT_2 0x08 + #define TOG_2 0x04 + #define PWM_2 0x02 + #define ECCF_2 0x01 +SFR(CCAPM3, 0xC5); // Module 3 Mode + #define ECOM_3 0x40 + #define CAPP_3 0x20 + #define CAPN_3 0x10 + #define MAT_3 0x08 + #define TOG_3 0x04 + #define PWM_3 0x02 + #define ECCF_3 0x01 +SFR(CCAPM4, 0xC6); // Module 4 Mode + #define ECOM_4 0x40 + #define CAPP_4 0x20 + #define CAPN_4 0x10 + #define MAT_4 0x08 + #define TOG_4 0x04 + #define PWM_4 0x02 + #define ECCF_4 0x01 + #define ECOM 0x40 + #define CAPP 0x20 + #define CAPN 0x10 + #define MAT 0x08 + #define TOG 0x04 + #define PWM 0x02 + #define ECCF 0x01 +SFR(CCON, 0xC0); // PCA Counter Control + SBIT(CF, 0xC0, 7); + SBIT(CR, 0xC0, 6); + SBIT(CCF4, 0xC0, 4); + SBIT(CCF3, 0xC0, 3); + SBIT(CCF2, 0xC0, 2); + SBIT(CCF1, 0xC0, 1); + SBIT(CCF0, 0xC0, 0); +SFR(CH, 0xF9); // PCA Counter High +SFR(CL, 0xE9); // PCA Counter Low +SFR(CMOD, 0xC1); // PCA Counter Mode + #define CIDL 0x80 + #define WDTE 0x40 + #define CPS1 0x04 + #define CPS0 0x02 + #define ECF 0x01 +SFR(DPH, 0x83); // Data Pointer High +SFR(DPL, 0x82); // Data Pointer Low +SFR(IEN0, 0xA8); // Interrupt Enable 0 + SBIT(EA, 0xA8, 7); + SBIT(EC, 0xA8, 6); + SBIT(ES1, 0xA8, 5); + SBIT(ES0, 0xA8, 4); + SBIT(ET1, 0xA8, 3); + SBIT(EX1, 0xA8, 2); + SBIT(ET0, 0xA8, 1); + SBIT(EX0, 0xA8, 0); +SFR(IEN1, 0xE8); // Interrupt Enable 1 + SBIT(ES3, 0xE8, 2); + SBIT(ES2, 0xE8, 1); + SBIT(ET2, 0xE8, 0); +SFR(IP0, 0xB8); // Interrupt Priority 0 + SBIT(PT2, 0xB8, 7); + SBIT(PPC, 0xB8, 6); + SBIT(PS1, 0xB8, 5); + SBIT(PS0, 0xB8, 4); + SBIT(PT1, 0xB8, 3); + SBIT(PX1, 0xB8, 2); + SBIT(PT0, 0xB8, 1); + SBIT(PX0, 0xB8, 0); +SFR(IP0H, 0xB7); // Interrupt Priority 0 High + #define PT2H 0x80 + #define PPCH 0x40 + #define PS1H 0x20 + #define PS0H 0x10 + #define PT1H 0x08 + #define PX1H 0x04 + #define PT0H 0x02 + #define PX0H 0x01 +SFR(IP1, 0x91); // Interrupt Priority 1 + #define PS3 0x02 + #define PS2 0x01 +SFR(IP1H, 0x92); // Interrupt Priority 1 High + #define PS3H 0x02 + #define PS2H 0x01 +SFR(P0, 0x80); // Port 0 + SBIT(AD7, 0x80, 7); + SBIT(P0_7, 0x80, 7); + SBIT(AD6, 0x80, 6); + SBIT(P0_6, 0x80, 6); + SBIT(AD5, 0x80, 5); + SBIT(P0_5, 0x80, 5); + SBIT(AD4, 0x80, 4); + SBIT(P0_4, 0x80, 4); + SBIT(AD3, 0x80, 3); + SBIT(P0_3, 0x80, 3); + SBIT(AD2, 0x80, 2); + SBIT(P0_2, 0x80, 2); + SBIT(AD1, 0x80, 1); + SBIT(P0_1, 0x80, 1); + SBIT(AD0, 0x80, 0); + SBIT(P0_0, 0x80, 0); +SFR(P1, 0x90); // Port 1 + SBIT(T1_CEX4, 0x90, 7); + SBIT(P1_7, 0x90, 7); + SBIT(T0_CEX3, 0x90, 6); + SBIT(P1_6, 0x90, 6); + SBIT(CEX2, 0x90, 5); + SBIT(P1_5, 0x90, 5); + SBIT(CEX1, 0x90, 4); + SBIT(P1_4, 0x90, 4); + SBIT(CEX0, 0x90, 3); + SBIT(P1_3, 0x90, 3); + SBIT(ECI, 0x90, 2); + SBIT(P1_2, 0x90, 2); + SBIT(T2EX, 0x90, 1); + SBIT(P1_1, 0x90, 1); + SBIT(T2, 0x90, 0); + SBIT(P1_0, 0x90, 0); +SFR(P2, 0xA0); // Port 2 + SBIT(AD15, 0xA0, 7); + SBIT(P2_7, 0xA0, 7); + SBIT(AD14, 0xA0, 6); + SBIT(P2_6, 0xA0, 6); + SBIT(AD13, 0xA0, 5); + SBIT(P2_5, 0xA0, 5); + SBIT(AD12, 0xA0, 4); + SBIT(P2_4, 0xA0, 4); + SBIT(AD11, 0xA0, 3); + SBIT(P2_3, 0xA0, 3); + SBIT(AD10, 0xA0, 2); + SBIT(P2_2, 0xA0, 2); + SBIT(AD9, 0xA0, 1); + SBIT(P2_1, 0xA0, 1); + SBIT(AD8, 0xA0, 0); + SBIT(P2_0, 0xA0, 0); +SFR(P3, 0xB0); // Port 3 + SBIT(RD, 0xB0, 7); + SBIT(P3_7, 0xB0, 7); + SBIT(WR, 0xB0, 6); + SBIT(P3_6, 0xB0, 6); + SBIT(T1, 0xB0, 5); + SBIT(P3_5, 0xB0, 5); + SBIT(T0, 0xB0, 4); + SBIT(P3_4, 0xB0, 4); + SBIT(INT1, 0xB0, 3); + SBIT(P3_3, 0xB0, 3); + SBIT(INT0, 0xB0, 2); + SBIT(P3_2, 0xB0, 2); + SBIT(TXD, 0xB0, 1); + SBIT(P3_1, 0xB0, 1); + SBIT(RXD, 0xB0, 0); + SBIT(P3_0, 0xB0, 0); +SFR(P4, 0xA1); // Port 3 + #define SS 0x08 + #define P4_3 0x08 + #define MOSI 0x04 + #define P4_2 0x04 + #define MISO 0x02 + #define SDA_1 0x02 + #define P4_1 0x02 + #define SCK 0x01 + #define SCL_1 0x01 + #define P4_0 0x01 +SFR(PCON, 0x87); // Power Control + #define SMOD1 0x80 + #define SMOD0 0x40 + #define POF 0x10 + #define GF1 0x08 + #define GF0 0x04 + #define PD 0x02 + #define IDL 0x01 +SFR(PSW, 0xD0); // Program Status Word + SBIT(CY, 0xD0, 7); + SBIT(AC, 0xD0, 6); + SBIT(F0, 0xD0, 5); + SBIT(RS1, 0xD0, 4); + SBIT(RS0, 0xD0, 3); + SBIT(OV, 0xD0, 2); + SBIT(F1, 0xD0, 1); + SBIT(P, 0xD0, 0); +SFR(RCAP2H, 0xCB); // Timer 2 Capture High +SFR(RCAP2L, 0xCA); // Timer 2 Capture Low +SFR(S0CON, 0x98); // Serial Control + SBIT(SM0_FE,0x98, 7); + SBIT(SM1, 0x98, 6); + SBIT(SM2, 0x98, 5); + SBIT(REN, 0x98, 4); + SBIT(TB8, 0x98, 3); + SBIT(RB8, 0x98, 2); + SBIT(TI, 0x98, 1); + SBIT(RI, 0x98, 0); +SFR(S0BUF, 0x99); // Serial Data Buffer +SFR(SADDR, 0xA9); // I2C Slave Address +SFR(SADEN, 0xB9); // I2C Slave Address Mask +SFR(SPCR, 0xD5); // SPI Control Register + #define SPIE 0x80 + #define SPEN 0x40 + #define DORD 0x20 + #define MSTR 0x10 + #define CPOL 0x08 + #define CPHA 0x04 + #define SPR1 0x02 + #define SPR0 0x01 +/* SBIT(SPIE, 0x80, 7); // SPCR is not bit addressable, not yet at least, according to the manual. + SBIT(SPEN, 0x80, 6); + SBIT(DORD, 0x80, 5); + SBIT(MSTR, 0x80, 4); + SBIT(CPOL, 0x80, 3); + SBIT(CPHA, 0x80, 2); + SBIT(SPR1, 0x80, 1); + SBIT(SPR0, 0x80, 0);*/ +SFR(SPSR, 0xAA); // SPI Configuration Register + #define SPIF 0x80 + #define WCOL 0x40 +SFR(SPDAT, 0x86); // SPI Data +SFR(SP, 0x81); // Stack Pointer +SFR(S1DAT, 0xDA); // I2C Serial 1 Data +SFR(S1ADR, 0xDB); // I2C Serial 1 Address + #define S1ADR_6 0x80 + #define S1ADR_5 0x40 + #define S1ADR_4 0x20 + #define S1ADR_3 0x10 + #define S1ADR_2 0x08 + #define S1ADR_1 0x04 + #define S1ADR_0 0x02 + #define S1GC 0x01 +SFR(S1STA, 0xD9); // I2C Serial 1 Status + #define SC4 0x80 + #define SC3 0x40 + #define SC2 0x20 + #define SC1 0x10 + #define SC0 0x08 // Only write 0 to the lowest three bits +SFR(S1CON, 0xD8); // I2C Serial 1 Control + SBIT(CR2, 0xD8, 7); + SBIT(ENS1, 0xD8, 6); + SBIT(STA, 0xD8, 5); + SBIT(STO, 0xD8, 4); + SBIT(SI, 0xD8, 3); + SBIT(AA, 0xD8, 2); + SBIT(CR1, 0xD8, 1); + SBIT(CR0, 0xD8, 0); +SFR(S2DAT, 0xE2); // I2C Serial 1 Data +SFR(S2ADR, 0xE3); // I2C Serial 1 Address + #define S2ADR_6 0x80 + #define S2ADR_5 0x40 + #define S2ADR_4 0x20 + #define S2ADR_3 0x10 + #define S2ADR_2 0x08 + #define S2ADR_1 0x04 + #define S2ADR_0 0x02 + #define S2GC 0x01 +SFR(S2STA, 0xE1); // I2C Serial 1 Status + #define SC24 0x80 + #define SC23 0x40 + #define SC22 0x20 + #define SC21 0x10 + #define SC20 0x08 // Only write 0 to the lowest three bits +SFR(S2CON, 0xF8); // I2C Serial 1 Control + SBIT(CR22, 0xF8, 7); + SBIT(ENS21, 0xF8, 6); + SBIT(STA2, 0xF8, 5); + SBIT(STO2, 0xF8, 4); + SBIT(SI2, 0xF8, 3); + SBIT(AA2, 0xF8, 2); + SBIT(CR21, 0xF8, 1); + SBIT(CR20, 0xF8, 0); +SFR(TCON, 0x88); // Timer Control + SBIT(TF1, 0x88, 7); + SBIT(TR1, 0x88, 6); + SBIT(TF0, 0x88, 5); + SBIT(TR0, 0x88, 4); + SBIT(IE1, 0x88, 3); + SBIT(IT1, 0x88, 2); + SBIT(IE0, 0x88, 1); + SBIT(IT0, 0x88, 0); +SFR(T2CON, 0xC8); // Timer 2 Control + SBIT(TF2, 0xC8, 7); + SBIT(EXF2, 0xC8, 6); + SBIT(RCLK, 0xC8, 5); + SBIT(TCLK, 0xC8, 4); + SBIT(EXEN2, 0xC8, 3); + SBIT(TR2, 0xC8, 2); + SBIT(C_T2, 0xC8, 1); + SBIT(CP_RL2, 0xC8, 0); +SFR(T2MOD, 0xC9); // Timer 2 Mode Control + #define ENT2 0x20 + #define T2OE 0x02 + #define DCEN 0x01 +SFR(TH0, 0x8C); // Timer High 0 +SFR(TH1, 0x8D); // Timer High 1 +SFR(TH2, 0xCD); // Timer High 2 +SFR(TL0, 0x8A); // Timer Low 0 +SFR(TL1, 0x8B); // Timer Low 1 +SFR(TL2, 0xCC); // Timer Low 2 +SFR(TMOD, 0x89); // Timer Mode + #define GATE_1 0x80 + #define C_T_1 0x40 + #define M1_1 0x20 + #define M0_1 0x10 + #define GATE_0 0x08 + #define C_T_0 0x04 + #define M1_0 0x02 + #define M0_0 0x01 +SFR(WDTRST, 0xA6); // Watchdog Timer Reset + +#endif //__P89V66X_H__ diff --git a/device/include/mcs51/reg51.h b/device/include/mcs51/reg51.h new file mode 100644 index 0000000..b32aab1 --- /dev/null +++ b/device/include/mcs51/reg51.h @@ -0,0 +1,158 @@ +/*------------------------------------------------------------------------- + Register Declarations for 8051 Processor + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef REG51_H +#define REG51_H + +#warning This file (reg51.h) is obsolete, depending on your harware +#warning use include <8051.h>, or include <8052.h>! + +/* BYTE Register */ +sfr at 0x80 P0 ; +sfr at 0x90 P1 ; +sfr at 0xA0 P2 ; +sfr at 0xB0 P3 ; +sfr at 0xD0 PSW ; +sfr at 0xE0 ACC ; +sfr at 0xF0 B ; +sfr at 0x81 SP ; +sfr at 0x82 DPL ; +sfr at 0x83 DPH ; +sfr at 0x87 PCON ; +sfr at 0x88 TCON ; +sfr at 0x89 TMOD ; +sfr at 0x8A TL0 ; +sfr at 0x8B TL1 ; +sfr at 0x8C TH0 ; +sfr at 0x8D TH1 ; +sfr at 0x8E AUXR ; +sfr at 0xA8 IE ; +sfr at 0xB8 IP ; +sfr at 0x98 SCON ; +sfr at 0x99 SBUF ; + + +/* BIT Register */ +/* PSW */ +sbit at 0xD7 CY ; +sbit at 0xD6 AC ; +sbit at 0xD5 F0 ; +sbit at 0xD4 RS1 ; +sbit at 0xD3 RS0 ; +sbit at 0xD2 OV ; +sbit at 0xD0 P ; + +/* TCON */ +sbit at 0x8F TF1 ; +sbit at 0x8E TR1 ; +sbit at 0x8D TF0 ; +sbit at 0x8C TR0 ; +sbit at 0x8B IE1 ; +sbit at 0x8A IT1 ; +sbit at 0x89 IE0 ; +sbit at 0x88 IT0 ; + +/* IE */ +sbit at 0xAF EA ; +sbit at 0xAC ES ; +sbit at 0xAB ET1 ; +sbit at 0xAA EX1 ; +sbit at 0xA9 ET0 ; +sbit at 0xA8 EX0 ; + +/* IP */ +sbit at 0xBC PS ; +sbit at 0xBB PT1 ; +sbit at 0xBA PX1 ; +sbit at 0xB9 PT0 ; +sbit at 0xB8 PX0 ; + +/* P3 */ +sbit at 0xB7 RD ; +sbit at 0xB6 WR ; +sbit at 0xB5 T1 ; +sbit at 0xB4 T0 ; +sbit at 0xB3 INT1 ; +sbit at 0xB2 INT0 ; +sbit at 0xB1 TXD ; +sbit at 0xB0 RXD ; + +/* P1 */ +sbit at 0x90 P1_0 ; +sbit at 0x91 P1_1 ; +sbit at 0x92 P1_2 ; +sbit at 0x93 P1_3 ; +sbit at 0x94 P1_4 ; +sbit at 0x95 P1_5 ; +sbit at 0x96 P1_6 ; +sbit at 0x97 P1_7 ; + +/* SCON */ +sbit at 0x9F SM0 ; +sbit at 0x9E SM1 ; +sbit at 0x9D SM2 ; +sbit at 0x9C REN ; +sbit at 0x9B TB8 ; +sbit at 0x9A RB8 ; +sbit at 0x99 TI ; +sbit at 0x98 RI ; + +/* TMOD bits */ +#define GATE1 (1<<7) +#define C_T1 (1<<6) +#define M1_1 (1<<5) +#define M0_1 (1<<4) +#define GATE0 (1<<3) +#define C_T0 (1<<2) +#define M1_0 (1<<1) +#define M0_0 (1<<0) + +/* T2CON */ +sfr at 0xC8 T2CON ; + +/* T2CON bits */ +sbit at 0xC8 T2CON_0 ; +sbit at 0xC9 T2CON_1 ; +sbit at 0xCA T2CON_2 ; +sbit at 0xCB T2CON_3 ; +sbit at 0xCC T2CON_4 ; +sbit at 0xCD T2CON_5 ; +sbit at 0xCE T2CON_6 ; +sbit at 0xCF T2CON_7 ; + +/* RCAP2 L & H */ +sfr at 0xCB RCAP2H; +sfr at 0xCA RCAP2L; + +#endif + + + + + + + + + + diff --git a/device/include/mcs51/reg764.h b/device/include/mcs51/reg764.h new file mode 100644 index 0000000..6cc84d4 --- /dev/null +++ b/device/include/mcs51/reg764.h @@ -0,0 +1,301 @@ +/*------------------------------------------------------------------------- + Register Declarations for 87C764 + Written By - Robert Lacoste, robert_lacoste@yahoo.fr + based upon reg51.h written by Sandeep Dutta + Registers are taken from the Phillips Semiconductor + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef REGC764_H +#define REGC764_H + +/* Special Function Registers */ + +__sfr __at 0x80 P0 ; // Port 0 +__sfr __at 0x81 SP ; // Stack Pointer +__sfr __at 0x82 DPL ; // Data Pointer Low +__sfr __at 0x83 DPH ; // Data Pointer High +__sfr __at 0x84 P0M1 ; // Port 0 output mode 1 +__sfr __at 0x85 P0M2 ; // Port 0 output mode 2 +__sfr __at 0x86 KBI ; // Keyboard interrupt +__sfr __at 0x87 PCON ; // Power Control +__sfr __at 0x88 TCON ; // Timer Control +__sfr __at 0x89 TMOD ; // Timer Mode +__sfr __at 0x8A TL0 ; // Timer Low 0 +__sfr __at 0x8B TL1 ; // Timer Low 1 +__sfr __at 0x8C TH0 ; // Timer High 0 +__sfr __at 0x8D TH1 ; // Timer High 1 + +__sfr __at 0x90 P1 ; // Port 1 +__sfr __at 0x91 P1M1 ; // Port 1 output mode 1 +__sfr __at 0x92 P1M2 ; // Port 1 output mode 2 +__sfr __at 0x95 DIVM ; // CPU clock divide by N control +__sfr __at 0x98 SCON ; // Serial Control +__sfr __at 0x99 SBUF ; // Serial Data Buffer + +__sfr __at 0xA0 P2 ; // Port 2 +__sfr __at 0xA2 AUXR1 ; // Auxilliary 1 (not available on 80C51FA/87C51Fx) +__sfr __at 0xA4 P2M1 ; // Port 2 output mode 1 +__sfr __at 0xA5 P2M2 ; // Port 2 output mode 2 +__sfr __at 0xA6 WDRST ; // Watchdog reset register +__sfr __at 0xA7 WDCON ; // Watchdog control register +__sfr __at 0xA8 IEN0 ; // Interrupt Enable 0 +__sfr __at 0xA9 SADDR ; // Serial slave Address +__sfr __at 0xAC CMP1 ; // Comparator 1 control register +__sfr __at 0xAD CMP2 ; // Comparator 2 control register + +__sfr __at 0xB7 IP0H ; // Interrupt Priority 0 High +__sfr __at 0xB8 IP0 ; // Interrupt Priority 0 +__sfr __at 0xB9 SADEN ; // Serial slave Address Mask + +__sfr __at 0xC8 I2CFG ; // I2C configuration register + +__sfr __at 0xD0 PSW ; // Program Status Word +__sfr __at 0xD8 I2CON ; // I2C control register +__sfr __at 0xD9 I2DAT ; // I2C data register + +__sfr __at 0xE0 ACC ; // Accumulator +__sfr __at 0xE8 IEN1 ; // Interrupt enable 1 + +__sfr __at 0xF0 B ; // B Register +__sfr __at 0xF6 PT0AD ; // Port 0 digital input disable +__sfr __at 0xF7 IP1H ; // Interrupt Priority 1 High +__sfr __at 0xF8 IP1 ; // Interrupt Priority 1 + + +/* Bit Addressable Registers */ + +/* P0 */ +__sbit __at 0x80 P0_0 ; // Also CMP2 +__sbit __at 0x81 P0_1 ; // Also CIN2B +__sbit __at 0x82 P0_2 ; // Also CIN2A +__sbit __at 0x83 P0_3 ; // Also CIN1B +__sbit __at 0x84 P0_4 ; // Also CIN1A +__sbit __at 0x85 P0_5 ; // Also CMPREF +__sbit __at 0x86 P0_6 ; // Also CMP1 +__sbit __at 0x87 P0_7 ; // Also T1 + +/* TCON */ +__sbit __at 0x88 IT0 ; // External Interrupt 0 Type +__sbit __at 0x89 IE0 ; // External Interrupt 0 Edge Flag +__sbit __at 0x8A IT1 ; // External Interrupt 1 Type +__sbit __at 0x8B IE1 ; // External Interrupt 1 Edge Flag +__sbit __at 0x8C TR0 ; // Timer 0 Run Control +__sbit __at 0x8D TF0 ; // Timer 0 Overflow Flag +__sbit __at 0x8E TR1 ; // Timer 1 Run Control +__sbit __at 0x8F TF1 ; // Timer 1 Overflow Flag + +/* P1 */ +__sbit __at 0x90 P1_0 ; // Also TxD +__sbit __at 0x91 P1_1 ; // Also RxD +__sbit __at 0x92 P1_2 ; // Also T0 +__sbit __at 0x93 P1_3 ; // Also INT0 +__sbit __at 0x94 P1_4 ; // Also INT1 +__sbit __at 0x95 P1_5 ; // Also RST +__sbit __at 0x96 P1_6 ; +__sbit __at 0x97 P1_7 ; + +/* SCON */ +__sbit __at 0x98 RI ; // Receive Interrupt Flag +__sbit __at 0x99 TI ; // Transmit Interrupt Flag +__sbit __at 0x9A RB8 ; // Receive Bit 8 +__sbit __at 0x9B TB8 ; // Transmit Bit 8 +__sbit __at 0x9C REN ; // Receiver Enable +__sbit __at 0x9D SM2 ; // Serial Mode Control Bit 2 +__sbit __at 0x9E SM1 ; // Serial Mode Control Bit 1 +__sbit __at 0x9F SM0 ; // Serial Mode Control Bit 0 + +/* P2 */ +__sbit __at 0xA0 P2_0 ; // Also X2 +__sbit __at 0xA1 P2_1 ; // Also X1 + +/* IEN0 */ +__sbit __at 0xA8 EX0 ; // External Interrupt 0 Enable +__sbit __at 0xA9 ET0 ; // Timer 0 Interrupt Enable +__sbit __at 0xAA EX1 ; // External Interrupt 1 Enable +__sbit __at 0xAB ET1 ; // Timer 1 Interrupt Enable +__sbit __at 0xAC ES ; // Serial Port Interrupt Enable +__sbit __at 0xAD EBO ; // Brownout Interrupt Enable +__sbit __at 0xAE EWD ; // Watchdog Interrupt Enable +__sbit __at 0xAF EA ; // Global Interrupt Enable + +/* IP0 */ +__sbit __at 0xB8 PX0 ; // External Interrupt 0 Priority +__sbit __at 0xB9 PT0 ; // Timer 0 Interrupt Priority +__sbit __at 0xBA PX1 ; // External Interrupt 1 Priority +__sbit __at 0xBB PT1 ; // Timer 1 Interrupt Priority +__sbit __at 0xBC PS ; // Serial Port Interrupt Priority +__sbit __at 0xBD PBO ; // Brownout Interrupt Priority +__sbit __at 0xBE PWD ; // Watchdog Interrupt Priority + +/* I2CFG */ +__sbit __at 0xC8 CT0 ; // Clock Time Select 0 +__sbit __at 0xC9 CT1 ; // Clock Time Select 1 +__sbit __at 0xCC TIRUN ; // Timer I Run Enable +__sbit __at 0xCD CLRTI ; // Clear Timer I +__sbit __at 0xCE MASTRQ; // Master Request +__sbit __at 0xCF SLAVEN; // Slave Enable + +/* PSW */ +__sbit __at 0xD0 P ; // Accumulator Parity Flag +__sbit __at 0xD1 F1 ; // Flag 1 +__sbit __at 0xD2 OV ; // Overflow Flag +__sbit __at 0xD3 RS0 ; // Register Bank Select 0 +__sbit __at 0xD4 RS1 ; // Register Bank Select 1 +__sbit __at 0xD5 F0 ; // Flag 0 +__sbit __at 0xD6 AC ; // Auxiliary Carry Flag +__sbit __at 0xD7 CY ; // Carry Flag + +/* I2CON */ +__sbit __at 0xD8 XSTP ; +__sbit __at 0xD9 MASTER;// Master Status +__sbit __at 0xDA STP ; // Stop Detect Flag +__sbit __at 0xDB STR ; // Start Detect Flag +__sbit __at 0xDC ARL ; // Arbitration Loss Flag +__sbit __at 0xDD DRDY ; // Data Ready Flag +__sbit __at 0xDE ATN ; // Attention: I2C Interrupt Flag +__sbit __at 0xDF RDAT ; // I2C Read Data + +/* ACC */ +__sbit __at 0xE0 ACC_0; +__sbit __at 0xE1 ACC_1; +__sbit __at 0xE2 ACC_2; +__sbit __at 0xE3 ACC_3; +__sbit __at 0xE4 ACC_4; +__sbit __at 0xE5 ACC_5; +__sbit __at 0xE6 ACC_6; +__sbit __at 0xE7 ACC_7; + +/* IEN1 */ +__sbit __at 0xE8 EI2 ; // I2C Interrupt Enable +__sbit __at 0xE9 EKB ; // Keyboard Interrupt Enable +__sbit __at 0xEA EC2 ; // Comparator 2 Interrupt Enable +__sbit __at 0xED EC1 ; // Comparator 1 Interrupt Enable +__sbit __at 0xEF ETI ; // Timer I Interrupt Enable + +/* B */ +__sbit __at 0xF0 B_0; +__sbit __at 0xF1 B_1; +__sbit __at 0xF2 B_2; +__sbit __at 0xF3 B_3; +__sbit __at 0xF4 B_4; +__sbit __at 0xF5 B_5; +__sbit __at 0xF6 B_6; +__sbit __at 0xF7 B_7; + +/* IP1 */ +__sbit __at 0xF8 PI2; // I2C Interrupt Priority +__sbit __at 0xF9 PKB; // Keyboard Interrupt Priority +__sbit __at 0xFA PC2; // Comparator 2 Interrupt Priority +__sbit __at 0xFD PC1; // Comparator 1 Interrupt Priority +__sbit __at 0xFF PTI; // Timer I Interrupt Priority + +/* Bitmasks for SFRs */ + +/* AUXR1 bits */ +#define DPS 0x01 +#define SRST 0x08 +#define LPEP 0x10 +#define BOI 0x20 +#define BOD 0x40 +#define KBF 0x80 + +/* CMP1 bits */ +#define CMF1 0x01 +#define CO1 0x02 +#define OE1 0x04 +#define CN1 0x08 +#define CP1 0x10 +#define CE1 0x20 + +/* CMP2 bits */ +#define CMF2 0x01 +#define CO2 0x02 +#define OE2 0x04 +#define CN2 0x08 +#define CP2 0x10 +#define CE2 0x20 + +/* I2DAT bits */ +#define RDAT 0x80 +#define XDAT 0x80 + +/* IP1H bits */ +#define PI2H 0x01 +#define PKBH 0x02 +#define PC2H 0x04 +#define PC1H 0x20 +#define PTIH 0x80 + +/* PCON bits */ +#define IDL 0x01 +#define PD 0x02 +#define GF0 0x04 +#define GF1 0x08 +#define POF 0x10 +#define BOF 0x20 +#define SMOD0 0x40 +#define SMOD1 0x80 + +/* P2M1 bits */ +#define ENT0 0x04 +#define ENT1 0x08 +#define ENTCLK 0x10 +#define P0S 0x20 +#define P1S 0x40 +#define P2S 0x80 + +/* TMOD bits */ +#define M0_0 0x01 +#define M1_0 0x02 +#define C_T0 0x04 +#define GATE0 0x08 +#define M0_1 0x10 +#define M1_1 0x20 +#define C_T1 0x40 +#define GATE1 0x80 + +/* WDCON bits */ +#define WDS0 0x01 +#define WDS1 0x02 +#define WDS2 0x04 +#define WDCLK 0x08 +#define WDRUN 0x10 +#define WDOVF 0x20 + + +/* Masks for I2CFG bits */ +#define BTIR 0x10 // Mask for TIRUN bit. +#define BMRQ 0x40 // Mask for MASTRQ bit. +#define BSLV 0x80 // Mask for SLAVEN bit. + + +/* Masks for I2CON bits */ +#define BCXA 0x80 // Mask for CXA bit. +#define BIDLE 0x40 // Mask for IDLE bit. +#define BCDR 0x20 // Mask for CDR bit. +#define BCARL 0x10 // Mask for CARL bit. +#define BCSTR 0x08 // Mask for CSTR bit. +#define BCSTP 0x04 // Mask for CSTP bit. +#define BXSTR 0x02 // Mask for XSTR bit. +#define BXSTP 0x01 // Mask for XSTP bit. + + +#endif diff --git a/device/include/mcs51/regc515c.h b/device/include/mcs51/regc515c.h new file mode 100644 index 0000000..644bc0f --- /dev/null +++ b/device/include/mcs51/regc515c.h @@ -0,0 +1,449 @@ +/*--------------------------------------------------------------------------- + MODULE: regc515c.h + + This file contains definitions for the builtin CAN-Bus Controller of + the Siemens c515c controller + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +---------------------------------------------------------------------------*/ + +#ifndef _REGC515C_H +#define _REGC515C_H + +/* define CPU_CLK_10MHZ or CPU_CLK_8MHZ to select the right values for */ +/* the bit timing registers */ + +#define CPU_CLK_10MHZ + +/* address of can controller in xmem */ +#define CAN_CTRL 0xf700 + +/* size of message buffer including 1 dummy byte at end */ +#define CAN_MSG_SZ 0x10 + +/* register offset definitions */ +#define CR 0 +#define SR 1 +#define IR 2 + +#define BT_0 4 +#define BT_1 5 +#define GMS_0 6 +#define GMS_1 7 +#define GME_0 8 +#define GME_1 9 +#define GME_2 0xa +#define GME_3 0xb +#define MSG15MSK_0 0xc +#define MSG15MSK_1 0xd +#define MSG15MSK_2 0xe +#define MSG15MSK_3 0xf + +/* register offsets in message buffer */ +#define MCR_0 0 +#define MCR_1 1 +#define ARB_0 2 +#define ARB_1 3 +#define ARB_2 4 +#define ARB_3 5 +#define MCFG 6 +/* beginning of message data */ +#define DATA 7 + +/* bits in cntr_x registers */ +#define MSGVAL 0x80 +#define TXIE 0x20 +#define RXIE 0x8 +#define INTPND 0x2 +#define RMTPND 0x80 +#define TXRQST 0x20 +#define MSGLST 0x8 +#define CPUUPD 0x8 +#define NEWDAT 0x2 + +/* macros for setting and resetting above bits, see Siemens documentation */ +#define MCR_BIT_SET(p,x) ((p) = (0xff & ~((x) >> 1))) +#define MCR_BIT_RES(p,x) ((p) = (0xff & ~(x))) + +/* direction = transmit in mcfg */ +#define DIR_TRANSMIT 0x8 + +/* constants for bit timing registers */ +/* 8 MHZ */ +#ifdef CPU_CLK_8MHZ +#define BT_0_125K 0x3 +#define BT_1_125K 0x1c +#define BT_0_250K 0x1 +#define BT_1_250K 0x1c +#define BT_0_500K 0x0 +#define BT_1_500K 0x1c +#define BT_0_1M 0x0 +#define BT_1_1M 0x14 +#endif +/* dito, 10 MHZ */ +#ifdef CPU_CLK_10MHZ +#define BT_0_125K 0x3 +#define BT_1_125K 0x1c +#define BT_0_250K 0x1 +#define BT_1_250K 0x1c +#define BT_0_500K 0x0 +#define BT_1_500K 0x2f +#define BT_0_1M 0x0 +#define BT_1_1M 0x25 +#endif + +/* Control register bits */ + +#define CINIT 0x1 +#define IE 0x2 +#define SIE 0x4 +#define EIE 0x8 + +#define CCE 0x40 + +/* status register bits */ +#define LEC0 0x1 +#define LEC1 0x2 +#define LEC2 0x4 +#define TXOK 0x8 +#define RXOK 0x10 +#define WAKE 0x20 +#define WARN 0x40 +#define BOFF 0x80 + + +typedef struct can_msg +{ + unsigned char mcr_0; + unsigned char mcr_1; + unsigned char arb_0; + unsigned char arb_1; + unsigned char arb_2; + unsigned char arb_3; + unsigned char mcfg; + unsigned char data_bytes[8]; + unsigned char dummy; +} *can_msgp; + +__xdata __at CAN_CTRL struct +{ + unsigned char cr; + unsigned char sr; + unsigned char ir; + unsigned char res0; + unsigned char bt_0; + unsigned char bt_1; + unsigned char gms_0; + unsigned char gms_1; + unsigned char gme_0; + unsigned char gme_1; + unsigned char gme_2; + unsigned char gme_3; + unsigned char msg15msk_0; + unsigned char msg15msk_1; + unsigned char msg15msk_2; + unsigned char msg15msk_3; + struct can_msg msgbufs[15]; +} can_ctrl; + +/* Byte registers in numerical order */ + +__sfr __at 0x80 P0; +__sfr __at 0x81 SP; +__sfr __at 0x82 DPL; +__sfr __at 0x83 DPH; +__sfr __at 0x86 WDTREL; +__sfr __at 0x87 PCON; +__sfr __at 0x88 TCON; +__sfr __at 0x88 PCON1; +__sfr __at 0x89 TMOD; +__sfr __at 0x8A TL0; +__sfr __at 0x8B TL1; +__sfr __at 0x8C TH0; +__sfr __at 0x8D TH1; +__sfr __at 0x90 P1; +__sfr __at 0x91 XPAGE; +__sfr __at 0x92 DPSEL; +__sfr __at 0x93 SSCCON; +__sfr __at 0x94 STB; +__sfr __at 0x95 SRB; +__sfr __at 0x96 SSCMOD; +__sfr __at 0x98 SCON; +__sfr __at 0x99 SBUF; +__sfr __at 0x9A IEN2; +__sfr __at 0xA0 P2; +__sfr __at 0xA8 IEN0; +__sfr __at 0xA9 IP0; +__sfr __at 0xAA SRELL; +__sfr __at 0xAB SCF; +__sfr __at 0xAC SCIEN; +__sfr __at 0xB0 P3; +__sfr __at 0xB1 SYSCON; +__sfr __at 0xB8 IEN1; +__sfr __at 0xB9 IP1; +__sfr __at 0xBA SRELH; +__sfr __at 0xC0 IRCON; +__sfr __at 0xC1 CCEN; +__sfr __at 0xC2 CCL1; +__sfr __at 0xC3 CCH1; +__sfr __at 0xC4 CCL2; +__sfr __at 0xC5 CCH2; +__sfr __at 0xC6 CCL3; +__sfr __at 0xC7 CCH3; +__sfr __at 0xC8 T2CON; +__sfr __at 0xCA CRCL; +__sfr __at 0xCB CRCH; +__sfr __at 0xCC TL2; +__sfr __at 0xCD TH2; +__sfr __at 0xD0 PSW; +__sfr __at 0xD8 ADCON0; +__sfr __at 0xD9 ADDATH; +__sfr __at 0xDA ADDATL; +__sfr __at 0xDB P6; +__sfr __at 0xDC ADCON1; +__sfr __at 0xE0 ACC; +__sfr __at 0xE8 P4; +__sfr __at 0xF0 B; +__sfr __at 0xF8 P5; +__sfr __at 0xF8 DIR5; +__sfr __at 0xFA P7; + + +/* defining bits in SFR P0 */ +__sbit __at 0x80 P0_0; +__sbit __at 0x81 P0_1; +__sbit __at 0x82 P0_2; +__sbit __at 0x83 P0_3; +__sbit __at 0x84 P0_4; +__sbit __at 0x85 P0_5; +__sbit __at 0x86 P0_6; +__sbit __at 0x87 P0_7; + + + +/* defining bits in SFR PCON1 */ +__sbit __at 0x88 IT0; +__sbit __at 0x89 IE0; +__sbit __at 0x8a IT1; +__sbit __at 0x8b IE1; +__sbit __at 0x8c TR0; +__sbit __at 0x8d TF0; +__sbit __at 0x8e TR1; +__sbit __at 0x8f TF1; +__sbit __at 0x8f EWPD; + + + +/* defining bits in SFR P1 */ +__sbit __at 0x90 P1_0; +__sbit __at 0x90 INT3; +__sbit __at 0x91 P1_1; +__sbit __at 0x91 INT4; +__sbit __at 0x92 P1_2; +__sbit __at 0x92 INT5; +__sbit __at 0x93 P1_3; +__sbit __at 0x93 INT6; +__sbit __at 0x94 P1_4; +__sbit __at 0x94 INT2; +__sbit __at 0x95 P1_5; +__sbit __at 0x95 T2EX; +__sbit __at 0x96 P1_6; +__sbit __at 0x96 CLKOUT; +__sbit __at 0x97 P1_7; +__sbit __at 0x97 T2; + + + +/* defining bits in SFR SCON */ +__sbit __at 0x98 RI; +__sbit __at 0x99 TI; +__sbit __at 0x9a RB8; +__sbit __at 0x9b TB8; +__sbit __at 0x9c REN; +__sbit __at 0x9d SM2; +__sbit __at 0x9e SM1; +__sbit __at 0x9f SM0; + + + +/* defining bits in SFR P2 */ +__sbit __at 0xa0 P2_0; +__sbit __at 0xa1 P2_1; +__sbit __at 0xa2 P2_2; +__sbit __at 0xa3 P2_3; +__sbit __at 0xa4 P2_4; +__sbit __at 0xa5 P2_5; +__sbit __at 0xa6 P2_6; +__sbit __at 0xa7 P2_7; + + + +/* defining bits in SFR IEN0 */ +__sbit __at 0xa8 EX0; +__sbit __at 0xa9 ET0; +__sbit __at 0xaa EX1; +__sbit __at 0xab ET1; +__sbit __at 0xac ES; +__sbit __at 0xad ET2; +__sbit __at 0xae WDT; +__sbit __at 0xaf EA; + + + +/* defining bits in SFR P3 */ +__sbit __at 0xb0 P3_0; +__sbit __at 0xb0 RXD; +__sbit __at 0xb1 P3_1; +__sbit __at 0xb1 TXD; +__sbit __at 0xb2 P3_2; +__sbit __at 0xb2 INT0; +__sbit __at 0xb3 P3_3; +__sbit __at 0xb3 INT1; +__sbit __at 0xb4 P3_4; +__sbit __at 0xb4 T0; +__sbit __at 0xb5 P3_5; +__sbit __at 0xb5 T1; +__sbit __at 0xb6 P3_6; +__sbit __at 0xb6 WR; +__sbit __at 0xb7 P3_7; +__sbit __at 0xb7 RD; + + + +/* defining bits in SFR IEN1 */ +__sbit __at 0xb8 EADC; +__sbit __at 0xb9 EX2; +__sbit __at 0xba EX3; +__sbit __at 0xbb EX4; +__sbit __at 0xbc EX5; +__sbit __at 0xbd EX6; +__sbit __at 0xbe SWDT; +__sbit __at 0xbf EXEN2; + + + +/* defining bits in SFR IRCON */ +__sbit __at 0xc0 IADC; +__sbit __at 0xc1 IEX2; +__sbit __at 0xc2 IEX3; +__sbit __at 0xc3 IEX4; +__sbit __at 0xc4 IEX5; +__sbit __at 0xc5 IEX6; +__sbit __at 0xc6 TF2; +__sbit __at 0xc7 EXF2; + + + +/* defining bits in SFR T2CON */ +__sbit __at 0xc8 T2I0; +__sbit __at 0xc9 T2I1; +__sbit __at 0xca T2CM; +__sbit __at 0xcb T2R0; +__sbit __at 0xcc T2R1; +__sbit __at 0xcd I2FR; +__sbit __at 0xce I3FR; +__sbit __at 0xcf T2PS; + + + +/* defining bits in SFR PSW */ +__sbit __at 0xd0 P; +__sbit __at 0xd1 F1; +__sbit __at 0xd2 OV; +__sbit __at 0xd3 RS0; +__sbit __at 0xd4 RS1; +__sbit __at 0xd5 F0; +__sbit __at 0xd6 AC; +__sbit __at 0xd7 CY; + + + +/* defining bits in SFR ADCON0 */ +__sbit __at 0xd8 MX0; +__sbit __at 0xd9 MX1; +__sbit __at 0xda MX2; +__sbit __at 0xdb ADM; +__sbit __at 0xdc BSY; +__sbit __at 0xdd ADEX; +__sbit __at 0xde CLK; +__sbit __at 0xdf BD; + + + +/* defining bits in SFR ACC */ +__sbit __at 0xe0 ACC_0; +__sbit __at 0xe1 ACC_1; +__sbit __at 0xe2 ACC_2; +__sbit __at 0xe3 ACC_3; +__sbit __at 0xe4 ACC_4; +__sbit __at 0xe5 ACC_5; +__sbit __at 0xe6 ACC_6; +__sbit __at 0xe7 ACC_7; + + + +/* defining bits in SFR P4 */ +__sbit __at 0xe8 P4_0; +__sbit __at 0xe8 ADST; +__sbit __at 0xe9 P4_1; +__sbit __at 0xe9 SCLK; +__sbit __at 0xea P4_2; +__sbit __at 0xea SRI; +__sbit __at 0xeb P4_3; +__sbit __at 0xeb STO; +__sbit __at 0xec P4_4; +__sbit __at 0xec SLS; +__sbit __at 0xed P4_5; +__sbit __at 0xed INT8; +__sbit __at 0xee P4_6; +__sbit __at 0xee TXDC; +__sbit __at 0xef P4_7; +__sbit __at 0xef RXDC; + + + +/* defining bits in SFR B */ +__sbit __at 0xf0 B_0; +__sbit __at 0xf1 B_1; +__sbit __at 0xf2 B_2; +__sbit __at 0xf3 B_3; +__sbit __at 0xf4 B_4; +__sbit __at 0xf5 B_5; +__sbit __at 0xf6 B_6; +__sbit __at 0xf7 B_7; + + + +/* defining bits in SFR DIR5 */ +__sbit __at 0xf8 P5_0; +__sbit __at 0xf9 P5_1; +__sbit __at 0xfa P5_2; +__sbit __at 0xfb P5_3; +__sbit __at 0xfc P5_4; +__sbit __at 0xfd P5_5; +__sbit __at 0xfe P5_6; +__sbit __at 0xff P5_7; +__sbit __at 0xf8 DIR5_0; +__sbit __at 0xf9 DIR5_1; +__sbit __at 0xfa DIR5_2; +__sbit __at 0xfb DIR5_3; +__sbit __at 0xfc DIR5_4; +__sbit __at 0xfd DIR5_5; +__sbit __at 0xfe DIR5_6; +__sbit __at 0xff DIR5_7; + +#endif /* _REGC515C_H */ + + diff --git a/device/include/mcs51/sab80515.h b/device/include/mcs51/sab80515.h new file mode 100644 index 0000000..fc773f5 --- /dev/null +++ b/device/include/mcs51/sab80515.h @@ -0,0 +1,386 @@ +/*------------------------------------------------------------------------- + Register Declarations for SIEMENS/INFINEON SAB 80515 Processor + + Written By - Bela Torok + Bela.Torokt@kssg.ch + based on reg51.h by Sandeep Dutta sandeep.dutta@usa.net + KEIL C compatible definitions are included + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SAB80515_H +#define SAB80515_H + +/* BYTE addressable registers */ +__sfr __at 0x80 P0 ; +__sfr __at 0x81 SP ; +__sfr __at 0x82 DPL ; +__sfr __at 0x83 DPH ; +__sfr __at 0x87 PCON ; +__sfr __at 0x88 TCON ; +__sfr __at 0x89 TMOD ; +__sfr __at 0x8A TL0 ; +__sfr __at 0x8B TL1 ; +__sfr __at 0x8C TH0 ; +__sfr __at 0x8D TH1 ; +__sfr __at 0x90 P1 ; +__sfr __at 0x98 SCON ; +__sfr __at 0x99 SBUF ; +__sfr __at 0xA0 P2 ; +__sfr __at 0xA8 IE ; +__sfr __at 0xA8 IEN0 ; /* as called by Siemens */ +__sfr __at 0xA9 IP0 ; /* interrupt priority register - SAB80515 specific */ +__sfr __at 0xB0 P3 ; +__sfr __at 0xB8 IEN1 ; /* interrupt enable register - SAB80515 specific */ +__sfr __at 0xB9 IP1 ; /* interrupt priority register as called by Siemens */ +__sfr __at 0xC0 IRCON ; /* interrupt control register - SAB80515 specific */ +__sfr __at 0xC1 CCEN ; /* compare/capture enable register */ +__sfr __at 0xC2 CCL1 ; /* compare/capture register 1, low byte */ +__sfr __at 0xC3 CCH1 ; /* compare/capture register 1, high byte */ +__sfr __at 0xC4 CCL2 ; /* compare/capture register 2, low byte */ +__sfr __at 0xC5 CCH2 ; /* compare/capture register 2, high byte */ +__sfr __at 0xC6 CCL3 ; /* compare/capture register 3, low byte */ +__sfr __at 0xC7 CCH3 ; /* compare/capture register 3, high byte */ +__sfr __at 0xC8 T2CON ; +__sfr __at 0xCA CRCL ; /* compare/reload/capture register, low byte */ +__sfr __at 0xCB CRCH ; /* compare/reload/capture register, high byte */ +__sfr __at 0xCC TL2 ; +__sfr __at 0xCD TH2 ; +__sfr __at 0xD0 PSW ; +__sfr __at 0xD8 ADCON ; /* A/D-converter control register */ +__sfr __at 0xD9 ADDAT ; /* A/D-converter data register */ +__sfr __at 0xDA DAPR ; /* D/A-converter program register */ +__sfr __at 0xDB P6 ; /* Port 6 - SAB80515 specific */ +__sfr __at 0xE0 ACC ; +__sfr __at 0xE0 A ; +__sfr __at 0xE8 P4 ; /* Port 4 - SAB80515 specific */ +__sfr __at 0xF0 B ; +__sfr __at 0xF8 P5 ; /* Port 5 - SAB80515 specific */ + + +/* BIT addressable registers */ +/* P0 */ +__sbit __at 0x80 P0_0 ; +__sbit __at 0x81 P0_1 ; +__sbit __at 0x82 P0_2 ; +__sbit __at 0x83 P0_3 ; +__sbit __at 0x84 P0_4 ; +__sbit __at 0x85 P0_5 ; +__sbit __at 0x86 P0_6 ; +__sbit __at 0x87 P0_7 ; + +/* TCON */ +__sbit __at 0x88 IT0 ; +__sbit __at 0x89 IE0 ; +__sbit __at 0x8A IT1 ; +__sbit __at 0x8B IE1 ; +__sbit __at 0x8C TR0 ; +__sbit __at 0x8D TF0 ; +__sbit __at 0x8E TR1 ; +__sbit __at 0x8F TF1 ; + +/* P1 */ +__sbit __at 0x90 P1_0 ; +__sbit __at 0x91 P1_1 ; +__sbit __at 0x92 P1_2 ; +__sbit __at 0x93 P1_3 ; +__sbit __at 0x94 P1_4 ; +__sbit __at 0x95 P1_5 ; +__sbit __at 0x96 P1_6 ; +__sbit __at 0x97 P1_7 ; + +__sbit __at 0x90 INT3_CC0 ; /* P1 alternate functions - SAB80515 specific */ +__sbit __at 0x91 INT4_CC1 ; +__sbit __at 0x92 INT5_CC2 ; +__sbit __at 0x93 INT6_CC3 ; +__sbit __at 0x94 INT2 ; +__sbit __at 0x95 T2EX ; +__sbit __at 0x96 CLKOUT ; +__sbit __at 0x97 T2 ; + +/* SCON */ +__sbit __at 0x98 RI ; +__sbit __at 0x99 TI ; +__sbit __at 0x9A RB8 ; +__sbit __at 0x9B TB8 ; +__sbit __at 0x9C REN ; +__sbit __at 0x9D SM2 ; +__sbit __at 0x9E SM1 ; +__sbit __at 0x9F SM0 ; + +/* P2 */ +__sbit __at 0xA0 P2_0 ; +__sbit __at 0xA1 P2_1 ; +__sbit __at 0xA2 P2_2 ; +__sbit __at 0xA3 P2_3 ; +__sbit __at 0xA4 P2_4 ; +__sbit __at 0xA5 P2_5 ; +__sbit __at 0xA6 P2_6 ; +__sbit __at 0xA7 P2_7 ; + +/* IEN0 */ +__sbit __at 0xA8 EX0 ; +__sbit __at 0xA9 ET0 ; +__sbit __at 0xAA EX1 ; +__sbit __at 0xAB ET1 ; +__sbit __at 0xAC ES ; +__sbit __at 0xAD ET2 ; +__sbit __at 0xAE WDT ; /* watchdog timer reset - SAB80515 specific */ +__sbit __at 0xAF EA ; + +__sbit __at 0xAF EAL ; /* EA as called by Siemens */ + +/* P3 */ +__sbit __at 0xB0 P3_0 ; +__sbit __at 0xB1 P3_1 ; +__sbit __at 0xB2 P3_2 ; +__sbit __at 0xB3 P3_3 ; +__sbit __at 0xB4 P3_4 ; +__sbit __at 0xB5 P3_5 ; +__sbit __at 0xB6 P3_6 ; +__sbit __at 0xB7 P3_7 ; + +__sbit __at 0xB0 RXD ; +__sbit __at 0xB1 TXD ; +__sbit __at 0xB2 INT0 ; +__sbit __at 0xB3 INT1 ; +__sbit __at 0xB4 T0 ; +__sbit __at 0xB5 T1 ; +__sbit __at 0xB6 WR ; +__sbit __at 0xB7 RD ; + +/* IEN1 */ +__sbit __at 0xB8 EADC ; /* A/D converter interrupt enable */ +__sbit __at 0xB9 EX2 ; +__sbit __at 0xBA EX3 ; +__sbit __at 0xBB EX4 ; +__sbit __at 0xBC EX5 ; +__sbit __at 0xBD EX6 ; +__sbit __at 0xBE SWDT ; /* watchdog timer start/reset */ +__sbit __at 0xBF EXEN2 ; /* timer2 external reload interrupt enable */ + +/* IRCON */ +__sbit __at 0xC0 IADC ; /* A/D converter irq flag */ +__sbit __at 0xC1 IEX2 ; /* external interrupt edge detect flag */ +__sbit __at 0xC2 IEX3 ; +__sbit __at 0xC3 IEX4 ; +__sbit __at 0xC4 IEX5 ; +__sbit __at 0xC5 IEX6 ; +__sbit __at 0xC6 TF2 ; /* timer 2 owerflow flag */ +__sbit __at 0xC7 EXF2 ; /* timer2 reload flag */ + +/* T2CON */ +__sbit __at 0xC8 T2CON_0 ; +__sbit __at 0xC9 T2CON_1 ; +__sbit __at 0xCA T2CON_2 ; +__sbit __at 0xCB T2CON_3 ; +__sbit __at 0xCC T2CON_4 ; +__sbit __at 0xCD T2CON_5 ; +__sbit __at 0xCE T2CON_6 ; +__sbit __at 0xCF T2CON_7 ; + +__sbit __at 0xC8 T2I0 ; +__sbit __at 0xC9 T2I1 ; +__sbit __at 0xCA T2CM ; +__sbit __at 0xCB T2R0 ; +__sbit __at 0xCC T2R1 ; +__sbit __at 0xCD I2FR ; +__sbit __at 0xCE I3FR ; +__sbit __at 0xCF T2PS ; + + +/* PSW */ +__sbit __at 0xD0 P ; +__sbit __at 0xD1 FL ; +__sbit __at 0xD2 OV ; +__sbit __at 0xD3 RS0 ; +__sbit __at 0xD4 RS1 ; +__sbit __at 0xD5 F0 ; +__sbit __at 0xD6 AC ; +__sbit __at 0xD7 CY ; + +__sbit __at 0xD1 F1 ; + +/* ADCON */ +__sbit __at 0xD8 MX0 ; +__sbit __at 0xD9 MX1 ; +__sbit __at 0xDA MX2 ; +__sbit __at 0xDB ADM ; +__sbit __at 0xDC BSY ; + +__sbit __at 0xDE CLK ; +__sbit __at 0xDF BD ; + +/* A */ +__sbit __at 0xA0 AREG_F0 ; +__sbit __at 0xA1 AREG_F1 ; +__sbit __at 0xA2 AREG_F2 ; +__sbit __at 0xA3 AREG_F3 ; +__sbit __at 0xA4 AREG_F4 ; +__sbit __at 0xA5 AREG_F5 ; +__sbit __at 0xA6 AREG_F6 ; +__sbit __at 0xA7 AREG_F7 ; + +/* P4 */ +__sbit __at 0xE8 P4_0 ; +__sbit __at 0xE9 P4_1 ; +__sbit __at 0xEA P4_2 ; +__sbit __at 0xEB P4_3 ; +__sbit __at 0xEC P4_4 ; +__sbit __at 0xED P4_5 ; +__sbit __at 0xEE P4_6 ; +__sbit __at 0xEF P4_7 ; + +/* B */ +__sbit __at 0xF0 BREG_F0 ; +__sbit __at 0xF1 BREG_F1 ; +__sbit __at 0xF2 BREG_F2 ; +__sbit __at 0xF3 BREG_F3 ; +__sbit __at 0xF4 BREG_F4 ; +__sbit __at 0xF5 BREG_F5 ; +__sbit __at 0xF6 BREG_F6 ; +__sbit __at 0xF7 BREG_F7 ; + +/* P5 */ +__sbit __at 0xF8 P5_0 ; +__sbit __at 0xF9 P5_1 ; +__sbit __at 0xFA P5_2 ; +__sbit __at 0xFB P5_3 ; +__sbit __at 0xFC P5_4 ; +__sbit __at 0xFD P5_5 ; +__sbit __at 0xFE P5_6 ; +__sbit __at 0xFF P5_7 ; + +/* BIT definitions for bits that are not directly accessible */ +/* PCON bits */ +#define IDL 0x01 +#define PD 0x02 +#define GF0 0x04 +#define GF1 0x08 +#define SMOD 0x80 + +#define IDL_ 0x01 +#define PD_ 0x02 +#define GF0_ 0x04 +#define GF1_ 0x08 +#define SMOD_ 0x80 + +/* TMOD bits */ +#define M0_0 0x01 +#define M1_0 0x02 +#define C_T0 0x04 +#define GATE0 0x08 +#define M0_1 0x10 +#define M1_1 0x20 +#define C_T1 0x40 +#define GATE1 0x80 + +#define M0_0_ 0x01 +#define M1_0_ 0x02 +#define C_T0_ 0x04 +#define GATE0_ 0x08 +#define M0_1_ 0x10 +#define M1_1_ 0x20 +#define C_T1_ 0x40 +#define GATE1_ 0x80 + +#define T0_M0 0x01 +#define T0_M1 0x02 +#define T0_CT 0x04 +#define T0_GATE 0x08 +#define T1_M0 0x10 +#define T1_M1 0x20 +#define T1_CT 0x40 +#define T1_GATE 0x80 + +#define T0_M0_ 0x01 +#define T0_M1_ 0x02 +#define T0_CT_ 0x04 +#define T0_GATE_ 0x08 +#define T1_M0_ 0x10 +#define T1_M1_ 0x20 +#define T1_CT_ 0x40 +#define T1_GATE_ 0x80 + +#define T0_MASK 0x0F +#define T1_MASK 0xF0 + +#define T0_MASK_ 0x0F +#define T1_MASK_ 0xF0 + +/* T2MOD bits */ +#define DCEN 0x01 +#define T2OE 0x02 + +#define DCEN_ 0x01 +#define T2OE_ 0x02 + +/* WMCON bits */ +#define WMCON_WDTEN 0x01 +#define WMCON_WDTRST 0x02 +#define WMCON_DPS 0x04 +#define WMCON_EEMEN 0x08 +#define WMCON_EEMWE 0x10 +#define WMCON_PS0 0x20 +#define WMCON_PS1 0x40 +#define WMCON_PS2 0x80 + +/* SPCR-SPI bits */ +#define SPCR_SPR0 0x01 +#define SPCR_SPR1 0x02 +#define SPCR_CPHA 0x04 +#define SPCR_CPOL 0x08 +#define SPCR_MSTR 0x10 +#define SPCR_DORD 0x20 +#define SPCR_SPE 0x40 +#define SPCR_SPIE 0x80 + +/* SPSR-SPI bits */ +#define SPSR_WCOL 0x40 +#define SPSR_SPIF 0x80 + +/* SPDR-SPI bits */ +#define SPDR_SPD0 0x10 +#define SPDR_SPD1 0x20 +#define SPDR_SPD2 0x40 +#define SPDR_SPD3 0x80 +#define SPDR_SPD4 0x10 +#define SPDR_SPD5 0x20 +#define SPDR_SPD6 0x40 +#define SPDR_SPD7 0x80 + +/* Interrupt numbers: address = (number * 8) + 3 */ +#define IE0_VECTOR 0 /* 0x03 external interrupt 0 */ +#define TF0_VECTOR 1 /* 0x0b timer 0 */ +#define IE1_VECTOR 2 /* 0x13 external interrupt 1 */ +#define TF1_VECTOR 3 /* 0x1b timer 1 */ +#define SI0_VECTOR 4 /* 0x23 serial port 0 */ +#define TF2_VECTOR 5 /* 0x2B timer 2 */ +#define EX2_VECTOR 5 /* 0x2B external interrupt 2 */ + +#define IADC_VECTOR 8 /* 0x43 A/D converter interrupt */ +#define IEX2_VECTOR 9 /* 0x4B external interrupt 2 */ +#define IEX3_VECTOR 10 /* 0x53 external interrupt 3 */ +#define IEX4_VECTOR 11 /* 0x5B external interrupt 4 */ +#define IEX5_VECTOR 12 /* 0x63 external interrupt 5 */ +#define IEX6_VECTOR 13 /* 0x6B external interrupt 6 */ + +#endif + diff --git a/device/include/mcs51/serial_IO.h b/device/include/mcs51/serial_IO.h new file mode 100644 index 0000000..d6d536a --- /dev/null +++ b/device/include/mcs51/serial_IO.h @@ -0,0 +1,76 @@ +/* Default putchar() and getchar() to the serial port + + Written By - Jesus Calvino-Fraga (October/2006) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#ifndef SERIAL_IO_H +#define SERIAL_IO_H + +__sfr __at (0x87) SIO_PCON; +__sfr __at (0x89) SIO_TMOD; +__sfr __at (0x8D) SIO_TH1; +__sfr __at (0x8B) SIO_TL1; +__sfr __at (0x98) SIO_SCON; +__sfr __at (0x99) SIO_SBUF; +__sbit __at (0x8E) SIO_TR1; + +/*SCON bits*/ +__sbit __at (0x98) SIO_RI; +__sbit __at (0x99) SIO_TI; +__sbit __at (0x9A) SIO_RB8; +__sbit __at (0x9B) SIO_TB8; +__sbit __at (0x9C) SIO_REN; +__sbit __at (0x9D) SIO_SM2; +__sbit __at (0x9E) SIO_SM1; +__sbit __at (0x9F) SIO_SM0; + +void inituart (unsigned char t1_reload) +{ + SIO_TR1=0; + SIO_TMOD=(SIO_TMOD&0x0f)|0x20; + SIO_PCON|=0x80; + SIO_TH1=SIO_TL1=t1_reload; + SIO_TR1=1; + SIO_SCON=0x52; +} + +void putchar (char c) +{ + if((!SIO_SM0)&&(!SIO_SM1)) inituart(0xff); + if (c=='\n') + { + while (!SIO_TI); + SIO_TI=0; + SIO_SBUF='\r'; + } + while (!SIO_TI); + SIO_TI=0; + SIO_SBUF=c; +} + +char getchar (void) +{ + char c; + + if((!SIO_SM0)&&(!SIO_SM1)) inituart(0xff); + + while (!SIO_RI); + SIO_RI=0; + c=SIO_SBUF; + return c; +} +#endif diff --git a/device/include/mcs51/uPSD33xx.h b/device/include/mcs51/uPSD33xx.h new file mode 100644 index 0000000..edcbc85 --- /dev/null +++ b/device/include/mcs51/uPSD33xx.h @@ -0,0 +1,589 @@ +/*------------------------------------------------------------------------- + Register Declarations for ST's uPSD33xx "Fast 8032 MCU with Programmable Logic" + (Based on preliminary datasheet from Jan/2005 ) + + Written By - Jesus Calvino-Fraga / jesusc at ece.ubc.ca (May 2007) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option); any later version + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#ifndef REG_UPSD33XX_H +#define REG_UPSD33XX_H + +#include + +//Interrupt vector numbers (see table 16 on datasheet) +#define EXT0_INTERRUPT ((0x03-3)/8) +#define TIMER0_INTERRUPT ((0x0B-3)/8) +#define EXT1_INTERRUPT ((0x13-3)/8) +#define TIMER1_INTERRUPT ((0x1B-3)/8) +#define UART0_INTERRUPT ((0x23-3)/8) +#define TIMER2_INTERRUPT ((0x2B-3)/8) +#define TX2_INTERRUPT ((0x2B-3)/8) +#define SPI_INTERRUPT ((0x53-3)/8) +#define I2C_INTERRUPT ((0x43-3)/8) +#define ADC_INTERRUPT ((0x3B-3)/8) +#define PCA_INTERRUPT ((0x5B-3)/8) +#define UART1_INTERRUPT ((0x4B-3)/8) + +SFR(SP, 0x81); // Stack Pointer. +SFR(DPL, 0x82); // Data Pointer Low. +SFR(DPH, 0x83); // Data Pointer High. + +SFR(DPTC, 0x85); // Data Pointer Control Register. +SFR(DPS, 0x85); // Data Pointer Control Register alias for SDCC + #define AT 0x40 //0:Manually Select Data Pointer / 1:Auto Toggle between DPTR0 and DPTR1 + #define DPSE0 0x01 // 0:DPTR0 Selected for use as DPTR / 1:DPTR1 Selected for use as DPTR + +SFR(DPTM, 0x86); // Data Pointer Mode Register. + #define DP1_1 0x08 // DPTR1 Mode Bit 1. + #define DP1_0 0x04 // DPTR1 Mode Bit 0. + #define DP0_1 0x02 // DPTR0 Mode Bit 1. + #define DP0_0 0x01 // DPTR0 Mode Bit 0. + // DPx_1 DPx_0 + // 0 0 : DPTRx No Change + // 0 1 : Reserved + // 1 0 : DPTRx Auto Increment + // 1 1 : DPTRx Auto Decrement + +SFR(PCON, 0x87); // Power Control. + #define SMOD0 0x80 //Baud Rate Double Bit (UART0) + #define SMOD1 0x40 //Baud Rate Double Bit (UART1) + #define POR 0x10 //Only a power-on reset sets this bit (cold reset). + #define RCLK1 0x08 //Receive Clock Flag (UART1) + #define TCLK1 0x04 //Transmit Clock Flag (UART1) + #define PD 0x02 //Power-Down Mode Enable. + #define IDL 0x01 //Idle Mode Enable. + +SFR(TCON, 0x88); // Timer/Counter Control. + SBIT(TF1, 0x88, 7); // Timer 1 overflow flag. + SBIT(TR1, 0x88, 6); // Timer 1 run control flag. + SBIT(TF0, 0x88, 5); // Timer 0 overflow flag. + SBIT(TR0, 0x88, 4); // Timer 0 run control flag. + SBIT(IE1, 0x88, 3); // Interrupt 1 flag. + SBIT(IT1, 0x88, 2); // Interrupt 1 type control bit. + SBIT(IE0, 0x88, 1); // Interrupt 0 flag. + SBIT(IT0, 0x88, 0); // Interrupt 0 type control bit. + +SFR(TMOD, 0x89); // Timer/Counter Mode Control. + #define GATE1 0x80 // External enable for timer 1. + #define C_T1 0x40 // Timer or counter select for timer 1. + #define M1_1 0x20 // Operation mode bit 1 for timer 1. + #define M0_1 0x10 // Operation mode bit 0 for timer 1. + #define GATE0 0x08 // External enable for timer 0. + #define C_T0 0x04 // Timer or counter select for timer 0. + #define M1_0 0x02 // Operation mode bit 1 for timer 0. + #define M0_0 0x01 // Operation mode bit 0 for timer 0. + +SFR(TL0, 0x8A); // Timer 0 LSB. +SFR(TL1, 0x8B); // Timer 1 LSB. +SFR(TH0, 0x8C); // Timer 0 MSB. +SFR(TH1, 0x8D); // Timer 1 MSB. + +//For P1SFS0 and P1SFS1 SFRs details check datasheet Table 31. +SFR(P1SFS0, 0x8E); //Port 1 Special Function Select 0 Register. + #define P1SF07 0x80 + #define P1SF06 0x40 + #define P1SF05 0x20 + #define P1SF04 0x10 + #define P1SF03 0x08 + #define P1SF02 0x04 + #define P1SF01 0x02 + #define P1SF00 0x01 +SFR(P1SFS1, 0x8F); //Port 1 Special Function Select 1 Register. + #define P1SF17 0x80 + #define P1SF16 0x40 + #define P1SF15 0x20 + #define P1SF14 0x10 + #define P1SF13 0x08 + #define P1SF12 0x04 + #define P1SF11 0x02 + #define P1SF10 0x01 + +SFR(P1, 0x90); // Port 1 + SBIT(P1_0, 0x90, 0); // Port 1 bit 0. + SBIT(P1_1, 0x90, 1); // Port 1 bit 1. + SBIT(P1_2, 0x90, 2); // Port 1 bit 2. + SBIT(P1_3, 0x90, 3); // Port 1 bit 3. + SBIT(P1_4, 0x90, 4); // Port 1 bit 4. + SBIT(P1_5, 0x90, 5); // Port 1 bit 5. + SBIT(P1_6, 0x90, 6); // Port 1 bit 6. + SBIT(P1_7, 0x90, 7); // Port 1 bit 7. + //Alternate names (from figure 3) + SBIT(T2, 0x90, 0); //Input to Timer/Counter 2. + SBIT(T2X, 0x90, 1); //Capture/reload trigger for Counter 2. + SBIT(RXD1, 0x90, 2); + SBIT(TXD1, 0x90, 3); + SBIT(SPICLK, 0x90, 4); + SBIT(SPIRXD, 0x90, 5); + SBIT(SPITXD, 0x90, 6); + SBIT(SPISEL, 0x90, 7); + +SFR(P3SFS, 0x91); // Port 3 Special Function Select Register + #define P3SF7 0x80 + #define P3SF6 0x40 + #define P3SF5 0x20 + #define P3SF4 0x10 + #define P3SF3 0x08 + #define P3SF2 0x04 + #define P3SF1 0x02 + #define P3SF0 0x01 + +//For P4SFS0 and P4SFS1 SFRs details check datasheet Table 34. +SFR(P4SFS0, 0x92); //Port 4 Special Function Select 0 Register. + #define P4SF07 0x80 + #define P4SF06 0x40 + #define P4SF05 0x20 + #define P4SF04 0x10 + #define P4SF03 0x08 + #define P4SF02 0x04 + #define P4SF01 0x02 + #define P4SF00 0x01 +SFR(P4SFS1, 0x93); //Port 4 Special Function Select 1 Register. + #define P4SF17 0x80 + #define P4SF16 0x40 + #define P4SF15 0x20 + #define P4SF14 0x10 + #define P4SF13 0x08 + #define P4SF12 0x04 + #define P4SF11 0x02 + #define P4SF10 0x01 + +SFR(ADCPS, 0x94); // ADC pre-scaller? + #define ADCCE 0x08 // ADC Conversion Reference Clock Enable. + //ADC Reference Clock PreScaler. Only three Prescaler values are allowed: + #define ADCPS2 0x02 // Resulting ADC clock is fOSC. + #define ADCPS1 0x01 // Resulting ADC clock is fOSC/2. + #define ADCPS0 0x00 // Resulting ADC clock is fOSC/4. + +SFR(ADAT0, 0x95); // A/D result register (bits 0 to 7). +SFR(ADAT1, 0x96); // A/D result register (bits 8 and 9). +SFR(ACON, 0x97); // A/D control register. + #define AINTF 0x80 // ADC Interrupt flag. This bit must be cleared with software. + #define AINTEN 0x40 // ADC Interrupt Enable. + #define ADEN 0x20 // ADC Enable Bit. + #define ADS2 0x10 // Analog channel Select bit 3. + #define ADS1 0x08 // Analog channel Select bit 2. + #define ADS0 0x04 // Analog channel Select bit 1. + #define ADST 0x02 // ADC Start Bit. + #define ADSF 0x01 // ADC Status Bit. + +SFR(SCON, 0x98); // For compatibity with legacy code +SFR(SCON0, 0x98); // Serial Port UART0 Control Register + SBIT(SM0, 0x98, 7); // Serial Port Mode Bit 0. + SBIT(SM1, 0x98, 6); // Serial Port Mode Bit 1. + SBIT(SM2, 0x98, 5); // Serial Port Mode Bit 2. + SBIT(REN, 0x98, 4); // Enables serial reception. + SBIT(TB8, 0x98, 3); // The 9th data bit that will be transmitted in Modes 2 and 3. + SBIT(RB8, 0x98, 2); // In Modes 2 and 3, the 9th data bit that was received. + SBIT(TI, 0x98, 1); // Transmit interrupt flag. + SBIT(RI, 0x98, 0); // Receive interrupt flag. + +SFR(SBUF, 0x99); // For compatibity with legacy code. +SFR(SBUF0, 0x99); // Serial Port UART0 Data Buffer. + +SFR(BUSCON, 0x9D); // Bus Control Register. + #define EPFQ 0x80 // Enable Pre-Fetch Queue. + #define EBC 0x40 // Enable Branch Cache. + #define WRW1 0x20 // WR Wait bit 2. + #define WRW0 0x10 // WR Wait bit 1. + #define RDW1 0x08 // RD Wait bit 2. + #define RDW0 0x04 // RD Wait bit 1. + #define CW1 0x02 // PSEN Wait bit 2. + #define CW0 0x01 // PSEN Wait bit 1. + +SFR(PCACL0, 0xA2); // The low 8 bits of PCA 0 16-bit counter. +SFR(PCACH0, 0xA3); // The high 8 bits of PCA 0 16-bit counter. +SFR(PCACON0, 0xA4); // PCA 0 Control Register. +SFR(PCASTA, 0xA5); // PCA 0 and PCA 1 Status Register. +SFR(PCACL1, 0xBA); // The low 8 bits of PCA 1 16-bit counter. +SFR(PCACH1, 0xBB); // The high 8 bits of PCA 1 16-bit counter. +SFR(PCACON1, 0xBC); // PCA 1 Control Register. + +SFR(IEA, 0xA7); // Interrupt Enable Addition Register. + #define EADC 0x80 // Enable ADC Interrupt. + #define ESPI 0x40 // Enable SPI Interrupt. + #define EPCA 0x20 // Enable Programmable Counter Array Interrupt. + #define ES1 0x10 // Enable UART1 Interrupt. + #define EI2C 0x02 // Enable I2C Interrupt. + +SFR(IE, 0xA8); // Interrupt Enable Register. + SBIT(EA, 0xA8, 7); // Global disable bit. + SBIT(ET2, 0xA8, 5); // Enable Timer 2 Interrupt. + SBIT(ES0, 0xA8, 4); // Enable UART0 Interrupt. + SBIT(ET1, 0xA8, 3); // Enable Timer 1 Interrupt. + SBIT(EX1, 0xA8, 2); // Enable External Interrupt INT1. + SBIT(ET0, 0xA8, 1); // Enable Timer 0 Interrupt. + SBIT(EX0, 0xA8, 0); // Enable External Interrupt INT0. + +SFR(TCMMODE0, 0xA9); // TCM 0 Mode. +SFR(TCMMODE1, 0xAA); // TCM 1 Mode. +SFR(TCMMODE2, 0xAB); // TCM 2 Mode. +SFR(TCMMODE3, 0xBD); // TCM 3 Mode. +SFR(TCMMODE4, 0xBE); // TCM 4 Mode. +SFR(TCMMODE5, 0xBF); // TCM 5 Mode. +//These are the bits for the six SFRs above: + #define EINTF 0x80 // Enable the interrupt flags (INTF) in the Status Register to generate an interrupt. + #define E_COMP 0x40 // Enable the comparator when set. + #define CAP_PE 0x20 // Enable Capture Mode, a positive edge on the CEXn pin. + #define CAP_NE 0x20 // Enable Capture Mode, a negative edge on the CEXn pin. + #define MATCH 0x08 // A match from the comparator sets the INTF bits in the Status Register. + #define TOGGLE 0x04 // A match on the comparator results in a toggling output on CEXn pin. + #define PWM1 0x02 // PWM mode bit 2. + #define PWM0 0x01 // PWM mode bit 1. + +SFR(CAPCOML0, 0xAC); // Capture/Compare register low of TCM 0. +SFR(CAPCOMH0, 0xAD); // Capture/Compare register High of TCM 0. +SFR(CAPCOML1, 0xAF); // Capture/Compare register low of TCM 1. +SFR(CAPCOMH1, 0xB1); // Capture/Compare register High of TCM 1. +SFR(CAPCOML2, 0xB2); // Capture/Compare register low of TCM 2. +SFR(CAPCOMH2, 0xB3); // Capture/Compare register High of TCM 2. +SFR(CAPCOML3, 0xC1); // Capture/Compare register low of TCM 3. +SFR(CAPCOMH3, 0xC2); // Capture/Compare register High of TCM 3. +SFR(CAPCOML4, 0xC3); // Capture/Compare register low of TCM 4. +SFR(CAPCOMH4, 0xC4); // Capture/Compare register High of TCM 4. +SFR(CAPCOML5, 0xC5); // Capture/Compare register low of TCM 5. +SFR(CAPCOMH5, 0xC6); // Capture/Compare register High of TCM 5. + +SFR(IPA, 0xB7); // Interrupt Priority Addition register. + #define PADC 0x80 // ADC Interrupt priority level. + #define PSPI 0x40 // SPI Interrupt priority level. + #define PPCA 0x20 // PCA Interrupt level. + #define PS1 0x10 // UART1 Interrupt priority. + #define PI2C 0x02 // I2C Interrupt priority level. + +SFR(IP, 0xB8); // Interrupt Priority Register. + SBIT(PT2, 0xB8, 5); // Timer 2 Interrupt priority level. + SBIT(PS0, 0xB8, 4); // UART0 Interrupt priority level. + SBIT(PT1, 0xB8, 3); // Timer 1 Interrupt priority level. + SBIT(PX1, 0xB8, 2); // External Interrupt INT1 priority level. + SBIT(PT0, 0xB8, 1); // Timer 0 Interrupt priority level. + SBIT(PX0, 0xB8, 0); // External Interrupt INT0 priority level. + +SFR(WDTRST, 0xA6); // Watchdog Timer Reset Counter Register. +SFR(WDTKEY, 0xAE); //Watchdog Timer Key Register. + +SFR(P3, 0xB0); // I/O Port 3 Register + SBIT(P3_0, 0xB0, 0); // Port 3 bit 0. + SBIT(P3_1, 0xB0, 1); // Port 3 bit 1. + SBIT(P3_2, 0xB0, 2); // Port 3 bit 2. + SBIT(P3_3, 0xB0, 3); // Port 3 bit 3. + SBIT(P3_4, 0xB0, 4); // Port 3 bit 4. + SBIT(P3_5, 0xB0, 5); // Port 3 bit 5. + SBIT(P3_6, 0xB0, 6); // Port 3 bit 6. + SBIT(P3_7, 0xB0, 7); // Port 3 bit 7. + +SFR(P4, 0xC0); // I/O Port 4 Register + SBIT(P4_0, 0xC0, 0); // Port 4 bit 0. + SBIT(P4_1, 0xC0, 1); // Port 4 bit 1. + SBIT(P4_2, 0xC0, 2); // Port 4 bit 2. + SBIT(P4_3, 0xC0, 3); // Port 4 bit 3. + SBIT(P4_4, 0xC0, 4); // Port 4 bit 4. + SBIT(P4_5, 0xC0, 5); // Port 4 bit 5. + SBIT(P4_6, 0xC0, 6); // Port 4 bit 6. + SBIT(P4_7, 0xC0, 7); // Port 4 bit 7. + +SFR(PWMF0, 0xB4); // PWM frequency register 0. +SFR(PWMF1, 0xC7); // PWM frequency register 1. + +SFR(T2CON, 0xC8); // Timer / Counter 2 Control. + SBIT(TF2, 0xC8, 7); // Timer 2 overflow flag. + SBIT(EXF2, 0xC8, 6); // Timer 2 external flag. + SBIT(RCLK, 0xC8, 5); // Receive clock flag. + SBIT(TCLK, 0xC8, 4); // Transmit clock flag. + SBIT(EXEN2, 0xC8, 3); // Timer 2 external enable flag. + SBIT(TR2, 0xC8, 2); // Start/stop control for timer 2. + SBIT(CNT2, 0xC8, 1); // Timer or coutner select. + SBIT(CAP2, 0xC8, 0); // Capture/reload flag. + +SFR(RCAP2L, 0xCA); // Timer 2 Capture LSB. +SFR(RCAP2H, 0xCB); // Timer 2 Capture MSB. +SFR(TL2, 0xCC); // Timer 2 LSB. +SFR(TH2, 0xCD); // Timer 2 MSB. + +SFR(IRDACON, 0xCE); //IrDA control register + #define IRDAEN 0x40 // IrDA Enable bit + #define PULSE 0x20 // IrDA Pulse Modulation Select. 0: 1.627us, 1: 3/16 bit time pulses. + #define CDIV4 0x10 //Specify Clock Divider bit 5. + #define CDIV3 0x08 //Specify Clock Divider bit 4. + #define CDIV2 0x04 //Specify Clock Divider bit 3. + #define CDIV1 0x02 //Specify Clock Divider bit 2. + #define CDIV0 0x01 //Specify Clock Divider bit 1. + +SFR(CCON0, 0xF9); // Clock Control Register. + #define DBGCE 0x10 // Debug Unit Breakpoint Comparator Enable. + #define CPUAR 0x08 // Automatic MCU Clock Recovery. + #define CPUPS2 0x04 // MCUCLK Pre-Scaler bit 3. + #define CPUPS1 0x02 // MCUCLK Pre-Scaler bit 2. + #define CPUPS0 0x01 // MCUCLK Pre-Scaler bit 1. + +SFR(CCON2, 0xFB); // Pre-scaler value for PCA0. + #define PCA0CE 0x10 // PCA0 Clock Enable. + #define PCA0PS3 0x08 // PCA0 Pre-Scaler bit 4. + #define PCA0PS2 0x04 // PCA0 Pre-Scaler bit 3. + #define PCA0PS1 0x02 // PCA0 Pre-Scaler bit 2. + #define PCA0PS0 0x01 // PCA0 Pre-Scaler bit 1. + +SFR(CCON3, 0xFC); // Pre-scaler value for PCA1. + #define PCA1CE 0x10 // PCA1 Clock Enable. + #define PCA1PS3 0x08 // PCA1 Pre-Scaler bit 4. + #define PCA1PS2 0x04 // PCA1 Pre-Scaler bit 3. + #define PCA1PS1 0x02 // PCA1 Pre-Scaler bit 2. + #define PCA1PS0 0x01 // PCA1 Pre-Scaler bit 1. + +SFR(SPICLKD, 0xD2); // SPI Prescaler (Clock Divider) Register. + #define DIV128 0x80 + #define DIV64 0x40 + #define DIV32 0x20 + #define DIV16 0x10 + #define DIV8 0x08 + #define DIV4 0x04 + +SFR(SPISTAT, 0xD3); // SPI Interface Status Register. + #define BUSY 0x10 // SPI Busy. + #define TEISF 0x08 // Transmission End Interrupt Source flag. + #define RORISF 0x04 // Receive Overrun Interrupt Source flag. + #define TISF 0x02 // Transfer Interrupt Source flag. + #define RISF 0x01 // Receive Interrupt Source flag. + +SFR(SPITDR, 0xD4); // SPI transmit data register. +SFR(SPIRDR, 0xD5); // SPI receive data register. + +SFR(SPICON0, 0xD6); // SPI Control Register 0. + #define TE 0x40 // Transmitter Enable. + #define RE 0x20 // Receiver Enable. + #define SPIEN 0x10 // SPI Enable. + #define SSEL 0x08 // Slave Selection. + #define FLSB 0x04 // First LSB. + #define SPO 0x02 // Sampling Polarity. + +SFR(SPICON1, 0xD7); // SPI Interface Control Register 1. + #define TEIE 0x08 // Transmission End Interrupt Enable. + #define RORIE 0x04 // Receive Overrun Interrupt Enable. + #define TIE 0x02 // Transmission Interrupt Enable. + #define RIE 0x01 // Reception Interrupt Enable. + +SFR(SCON1, 0x98); // Serial Port Control. + SBIT(SM0, 0x98, 7); // Serial Port Mode Bit 0. + SBIT(SM1, 0x98, 6); // Serial Port Mode Bit 1. + SBIT(SM2, 0x98, 5); // Serial Port Mode Bit 2. + SBIT(REN, 0x98, 4); // Enables serial reception. + SBIT(TB8, 0x98, 3); // The 9th data bit that will be transmitted in Modes 2 and 3. + SBIT(RB8, 0x98, 2); // In Modes 2 and 3, the 9th data bit that was received. + SBIT(TI, 0x98, 1); // Transmit interrupt flag. + SBIT(RI, 0x98, 0); // Receive interrupt flag. + +SFR(SBUF1, 0xD9); // Data buffer for UART1. +SFR(S1SETUP, 0xDB); // I2C START Condition Sample Setup register. + #define EN_SS 0x80 // Enable Sample Setup. + #define SMPL_SET6 0x40 // Sample Setting bit 7. + #define SMPL_SET5 0x20 // Sample Setting bit 6. + #define SMPL_SET4 0x10 // Sample Setting bit 5. + #define SMPL_SET3 0x08 // Sample Setting bit 4. + #define SMPL_SET2 0x04 // Sample Setting bit 3. + #define SMPL_SET1 0x02 // Sample Setting bit 2. + #define SMPL_SET0 0x01 // Sample Setting bit 1. + +SFR(S1CON, 0xDC); // I2C Interface Control Register. + #define CR2 0x80 // SCL clock frequency select bit 3. + #define ENI1 0x40 // I2C Interface Enable. + #define STA 0x20 // START flag. + #define STO 0x10 // STOP flag. + #define ADDR 0x08 // Slave mode address. + #define AA 0x04 // Assert Acknowledge enable. + #define CR1 0x02 // SCL clock frequency select bit 2. + #define CR0 0x01 // SCL clock frequency select bit 1. + +SFR(S1STA, 0xDD); // I2C Interface Status Register. + #define GC 0x80 // General Call flag. + #define STOP 0x40 // STOP flag. + #define INTR 0x20 // Interrupt flag. + #define TX_MODE 0x10 // Transmission Mode flag. + #define BBUSY 0x08 // Bus Busy flag. + #define BLOST 0x04 // Bus Lost flag. + #define ACK_RESP 0x02 // Not Acknowledge Response flag. + #define SLV 0x01 // Slave Mode flag. + +SFR(S1DAT, 0xDE); // I2C Data Shift Register. +SFR(S1ADR, 0xDF); // I2C Address Register (bit 0 not used). + +SFR(PSW, 0xD0); // Program Status Word. + SBIT(CY, 0xD0, 7); // Carry Flag. + SBIT(AC, 0xD0, 6); // Auxiliary Carry Flag. + SBIT(F0, 0xD0, 5); // User-Defined Flag. + SBIT(RS1, 0xD0, 4); // Register Bank Select 1. + SBIT(RS0, 0xD0, 3); // Register Bank Select 0. + SBIT(OV, 0xD0, 2); // Overflow Flag. + SBIT(P, 0xD0, 0); // Parity Flag. + +SFR(A, 0xE0); +SFR(ACC, 0xE0); // Accumulator + SBIT(ACC_0, 0xE0, 0); // Accumulator bit 0. + SBIT(ACC_1, 0xE0, 1); // Accumulator bit 1. + SBIT(ACC_2, 0xE0, 2); // Accumulator bit 2. + SBIT(ACC_3, 0xE0, 3); // Accumulator bit 3. + SBIT(ACC_4, 0xE0, 4); // Accumulator bit 4. + SBIT(ACC_5, 0xE0, 5); // Accumulator bit 5. + SBIT(ACC_6, 0xE0, 6); // Accumulator bit 6. + SBIT(ACC_7, 0xE0, 7); // Accumulator bit 7. + +SFR(B, 0xF0); // B Register + SBIT(B_0, 0xF0, 0); // Register B bit 0. + SBIT(B_1, 0xF0, 1); // Register B bit 1. + SBIT(B_2, 0xF0, 2); // Register B bit 2. + SBIT(B_3, 0xF0, 3); // Register B bit 3. + SBIT(B_4, 0xF0, 4); // Register B bit 4. + SBIT(B_5, 0xF0, 5); // Register B bit 5. + SBIT(B_6, 0xF0, 6); // Register B bit 6. + SBIT(B_7, 0xF0, 7); // Register B bit 7. + +// PSD registers definition - by Jan Waclawek - wek at efton dot sk - May 2007 +// all defines here are with PSD_ prefix to identify them as PSD-related +// +// Based on uPSD33xx datasheet (preliminary) - Jan 2005, Table 79 at pages 145/146 +// and subsequent text + +// requires to have PSD_CSIOP defined to the base address of the PSD IO area, +// as defined in PSDSoftExpress or CUPS +#ifndef PSD_CSIOP +#error PSD_CSIOP has to be #define-d (before #include-ing this file) to the base address of the PSD registers area, according to csiop setting in CUPS/PSDSoftExpress +#else + // -- Port A not available on 52-pin uPSD33xx devices +SFRX(PSD_DATAIN_A, PSD_CSIOP+0x00); // MCU I/O Mode Port A Data In Register + // reads 0 if pin is log.0, 1 if pin is log. 1 + // READ only +SFRX(PSD_DATAOUT_A, PSD_CSIOP+0x04); // MCU I/O Mode Port A Data Out Register + // write 0 to set pin to log. 0, 1 to set pin to log. 1 + // read back written value + // reset default = 00 +SFRX(PSD_DIRECTION_A, PSD_CSIOP+0x06); // MCU I/O Mode Port A Direction Register + // write 1 to set pin as output, 0 to set pin as input + // read back written value + // reset default = 00 +SFRX(PSD_DRIVE_A, PSD_CSIOP+0x08); // Select Open Drain or High Slew Rate for port A + // PA0-PA3: write 0 to select standard push-pull CMOS output, 1 to select High Slew Rate push-pull CMOS output + // PA4-PA7: write 0 to select standard push-pull CMOS output, 1 to select Open Drain output + // reset default = 00 +SFRX(PSD_CONTROL_A, PSD_CSIOP+0x02); // Selects MCU I/O or Latched Address Out mode for port A + // write 0 to select standard I/O pin, 1 to drive demultiplexed address signal on pin + // read back written value + // reset default = 00 +SFRX(PSD_OUTENABLE_A, PSD_CSIOP+0x0C); // Read state of Output Enable Logic on each I/O port driver of Port A + // 1 - driver output is enabled, 0 - driver is off (high impedance) + // READ only + + // -- for comment on individual registers, see above Port A +SFRX(PSD_DATAIN_B, PSD_CSIOP+0x01); // MCU I/O Mode Port B Data In Register +SFRX(PSD_DATAOUT_B, PSD_CSIOP+0x05); // MCU I/O Mode Port B Data Out Register +SFRX(PSD_DIRECTION_B, PSD_CSIOP+0x07); // MCU I/O Mode Port B Direction Register +SFRX(PSD_DRIVE_B, PSD_CSIOP+0x09); // Select Open Drain or High Slew Rate for port B + // PB0-PB3: standard/High Slew Rate, PB4-PB7: standard/Open Drain +SFRX(PSD_CONTROL_B, PSD_CSIOP+0x03); // Selects MCU I/O or Latched Address Out mode for port B +SFRX(PSD_OUTENABLE_B, PSD_CSIOP+0x0D); // Read state of Output Enable Logic on each I/O port driver of Port B + + // -- for comment on individual registers, see above Port A + // only pins PC2, PC3, PC4, PC7 available; other bits in registers are undefined +SFRX(PSD_DATAIN_C, PSD_CSIOP+0x10); // MCU I/O Mode Port C Data In Register +SFRX(PSD_DATAOUT_C, PSD_CSIOP+0x12); // MCU I/O Mode Port C Data Out Register +SFRX(PSD_DIRECTION_C, PSD_CSIOP+0x14); // MCU I/O Mode Port C Direction Register +SFRX(PSD_DRIVE_C, PSD_CSIOP+0x16); // Select Open Drain for port C +SFRX(PSD_OUTENABLE_C, PSD_CSIOP+0x1A); // Read state of Output Enable Logic on each I/O port driver of Port C + + // -- for comment on individual registers, see above Port A + // only pins PD1, PD2 available (PD2 not available on 52-pin package); other bits in registers are undefined +SFRX(PSD_DATAIN_D, PSD_CSIOP+0x11); // MCU I/O Mode Port D Data In Register +SFRX(PSD_DATAOUT_D, PSD_CSIOP+0x13); // MCU I/O Mode Port D Data Out Register +SFRX(PSD_DIRECTION_D, PSD_CSIOP+0x15); // MCU I/O Mode Port D Direction Register +SFRX(PSD_DRIVE_D, PSD_CSIOP+0x17); // Select High Slew Rate for port D +SFRX(PSD_OUTENABLE_D, PSD_CSIOP+0x1B); // Read state of Output Enable Logic on each I/O port driver of Port D + +SFRX(PSD_IMC_A, PSD_CSIOP+0x0A); // Read to obtain logic state of Input Macrocells connected to Port A + // READ only +SFRX(PSD_IMC_B, PSD_CSIOP+0x0B); // Read to obtain logic state of Input Macrocells connected to Port B +SFRX(PSD_IMC_C, PSD_CSIOP+0x18); // Read to obtain logic state of Input Macrocells connected to Port C + // only pins PC2, PC3, PC4, PC7 available; other bits in register are undefined +SFRX(PSD_OMC_AB, PSD_CSIOP+0x20); // Read logic state of macrocells AB. Write to load macrocell AB flip-flops. +SFRX(PSD_OMC_BC, PSD_CSIOP+0x21); // Read logic state of macrocells BC. Write to load macrocell BC flip-flops. +SFRX(PSD_OMCMASK_AB, PSD_CSIOP+0x22); // Write to set mask for macrocell AB. + // 1 blocks READs/WRITEs of OMF, 0 will pass OMF value + // Read back written value. +SFRX(PSD_OMCMASK_BC, PSD_CSIOP+0x23); // Write to set mask for macrocell BC. + +// -- all three Power Management Register are set to 00 after PowerUp, but unchanged during reset (/RST) +SFRX(PSD_PMMR0, PSD_CSIOP+0xB0); // -- Power Management Register 0 - write/read +// bit 0 unused and should be set to 0 +#define PSD_APD_ENA 0x02 // 0 - Automatic Power Down (APD) counter is disabled, 1 - APD enabled +// bit 2 unused and should be set to 0 +#define PSD_TURBO_DISA 0x08 // 0 - PSD Turbo mode enabled, 1 - Turbo mode off, saving power +#define PSD_BLOCK_CLKIN_PLD 0x10 // 0 - CLKIN to PLD not blocked, 1 - no CLKIN to PLD Input Bus, saving power +#define PSD_BLOCK_CLKIN_OMC 0x20 // 0 - CLKIN to Output Macrocells not blocked, 1 - blocked, saving power +// bits 6 and 7 unused and should be set to 0 + +SFRX(PSD_PMMR2, PSD_CSIOP+0xB4); // -- Power Management Register 2 - write/read +// bits 0 and 1 unused and should be set to 0 +#define PSD_BLOCK_WR_PLD 0x04 // 0 - /WR from 8032 to PLD Input Bus not blocked, 1 - blocked, saving power +#define PSD_BLOCK_RD_PLD 0x08 // 0 - /RD from 8032 to PLD Input Bus not blocked, 1 - blocked, saving power +#define PSD_BLOCK_PSEN_PLD 0x10 // 0 - /PSEN from 8032 to PLD Input Bus not blocked, 1 - blocked, saving power +#define PSD_BLOCK_ALE_PLD 0x20 // 0 - ALE from 8032 to PLD Input Bus not blocked, 1 - blocked, saving power +#define PSD_BLOCK_PC7_PDL 0x40 // 0 - input from Port C pin 7 to PLD Input Bus not blocked, 1 - blocked, saving power +// bit 7 unused and should be set to 0 + +SFRX(PSD_PMMR3, PSD_CSIOP+0xC7); // -- Power Management Register 3 - write/read +// bit 0 unused and should be set to 0 +#define PSD_FORCE_PD 0x02 // 0 - APD counter, if enabled, will cause powerdown, 1 - powerdown will be entered immediately + // - once set, cleared only by reset condition +// bit 2 not defined by datasheet +// bits 3 to 7 unused and should be set to 0 + +SFRX(PSD_MAINPROTECT, PSD_CSIOP+0xC0); // -- Main Flash Memory Protection Definition + // bit 0 to bit 7 - sector 0 to sector 7 protection status + // - 1 - flash sector write protected, 0 - not write protected + // READ only +SFRX(PSD_ALTPROTECT, PSD_CSIOP+0xC2); // -- Secondary Flash Memory Protection Definition + // bit 0 to bit 3 - sector 0 to sector 3 protection status + // - 1 - flash sector write protected, 0 - not write protected + // bit 7 - Security Bit + // - 1 - device is secured against external reading and writing, 0 - not secured + // READ only + +SFRX(PSD_PAGE, PSD_CSIOP+0xE0); // -- Memory Page Register + +SFRX(PSD_VM, PSD_CSIOP+0xE2); // -- Memory Mapping Register + // Places PSD Module memories into 8032 Program Address Space + // and/or 8032 XDATA Address Space + // Default value of bits 0 to 4 is loaded from Non-Volatile + // setting as specified from PSDsoft Express upon any reset + // or power-up condition. The default value of these bits + // can be overridden by 8032 at run-time. +#define PSD_VM_SRAM_CODE 0x01 // 0 - SRAM not accessible as CODE (/PSEN) memory, 1 - SRAM accessible as CODE memory +#define PSD_VM_ALT_CODE 0x02 // 0 - secondary FLASH not accessible as CODE (/PSEN) memory, 1 - secondary FLASH accessible as CODE memory +#define PSD_VM_MAIN_CODE 0x04 // 0 - primary FLASH not accessible as CODE (/PSEN) memory, 1 - primary FLASH accessible as CODE memory +#define PSD_VM_ALT_XDATA 0x08 // 0 - secondary FLASH not accessible as XDATA (/RD/WR) memory, 1 - secondary FLASH accessible as XDATA memory +#define PSD_VM_MAIN_XDATA 0x10 // 0 - primary FLASH not accessible as XDATA (/RD/WR) memory, 1 - primary FLASH accessible as XDATA memory +// bits 5 and 6 unused +#define PSD_VM_PIO_EN 0x80 // 0 - disable, 1- enable peripheral I/O mode on Port A + +// another terminology for FLASH - MAIN/ALTERNATIVE -> PRIMARY/SECONDARY +#define PSD_VM_PRI_CODE PSD_VM_MAIN_CODE +#define PSD_VM_SEC_CODE PSD_VM_ALT_CODE +#define PSD_VM_PRI_XDATA PSD_VM_MAIN_XDATA +#define PSD_VM_SEC_XDATA PSD_VM_ALT_XDATA + +#endif + +#endif //REG_UPSD33XX_H diff --git a/device/include/pic/errno.h b/device/include/pic/errno.h new file mode 100644 index 0000000..cacad50 --- /dev/null +++ b/device/include/pic/errno.h @@ -0,0 +1,37 @@ +/*------------------------------------------------------------------------- + errno.h: Error codes used in the math functions + + Ported to PIC16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Copyright (C) 2001 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +/* +** $Id: errno.h 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#ifndef _PIC14_ERRNO_H +#define _PIC14_ERRNO_H + +extern int errno; + +/* Error Codes: */ + +#define EDOM 33 /* Math argument out of domain of functions */ +#define ERANGE 34 /* Math result not representable */ + +#endif /* _PIC14_ERRNO_H */ diff --git a/device/include/pic/float.h b/device/include/pic/float.h new file mode 100644 index 0000000..03d358b --- /dev/null +++ b/device/include/pic/float.h @@ -0,0 +1,85 @@ +/*------------------------------------------------------------------------- + float.h - ANSI functions forward declarations + + Adopted for pic16 port library by Vangelis Rokas + [vrokas at otenet.gr] (2004) + + Adopted for pic14 port library by Raphael Neider + [rneider at web.de] (2006) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef __PIC14_FLOAT_H +#define __PIC14_FLOAT_H 1 + +#include +#include + +#define FLT_RADIX 2 +#define FLT_MANT_DIG 24 +#define FLT_EPSILON 1.192092896E-07F +#define FLT_DIG 6 +#define FLT_MIN_EXP (-125) +#define FLT_MIN 1.175494351E-38F +#define FLT_MIN_10_EXP (-37) +#define FLT_MAX_EXP (+128) +#define FLT_MAX 3.402823466E+38F +#define FLT_MAX_10_EXP (+38) + +/* the following deal with IEEE single-precision numbers */ +#define EXCESS 126 +#define SIGNBIT ((unsigned long)0x80000000) +#define HIDDEN (unsigned long)(1ul << 23) +#define SIGN(fp) (((unsigned long)(fp) >> (8*sizeof(fp)-1)) & 1) +#define EXP(fp) (((unsigned long)(fp) >> 23) & (unsigned int) 0x00FF) +#define MANT(fp) (((fp) & (unsigned long)0x007FFFFF) | HIDDEN) +#define NORM 0xff000000 +#define PACK(s,e,m) ((s) | ((unsigned long)(e) << 23) | (m)) + +/* Workaround for unhandled local variables. */ +#define FS_STATIC /*static*/ + + +float __uchar2fs (unsigned char) _FS_REENTRANT; +float __schar2fs (signed char) _FS_REENTRANT; +float __uint2fs (unsigned int) _FS_REENTRANT; +float __sint2fs (signed int) _FS_REENTRANT; +float __ulong2fs (unsigned long) _FS_REENTRANT; +float __slong2fs (signed long) _FS_REENTRANT; +unsigned char __fs2uchar (float) _FS_REENTRANT; +signed char __fs2schar (float) _FS_REENTRANT; +unsigned int __fs2uint (float) _FS_REENTRANT; +signed int __fs2sint (float) _FS_REENTRANT; +unsigned long __fs2ulong (float) _FS_REENTRANT; +signed long __fs2slong (float) _FS_REENTRANT; + +float __fsadd (float, float) _FS_REENTRANT; +float __fssub (float, float) _FS_REENTRANT; +float __fsmul (float, float) _FS_REENTRANT; +float __fsdiv (float, float) _FS_REENTRANT; + +char __fslt (float, float) _FS_REENTRANT; +char __fseq (float, float) _FS_REENTRANT; +char __fsneq (float, float) _FS_REENTRANT; +char __fsgt (float, float) _FS_REENTRANT; + +#endif /* __PIC14_FLOAT_H */ diff --git a/device/include/pic/limits.h b/device/include/pic/limits.h new file mode 100644 index 0000000..c928ff4 --- /dev/null +++ b/device/include/pic/limits.h @@ -0,0 +1,51 @@ +/*------------------------------------------------------------------------- + limits.h - ANSI defines constants for sizes of integral types + + Adopted for the pic16 port by Vangelis Rokas + [ vrokas at otenet.gr ] 2004 + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef __LIMITS_H +#define __LIMITS_H 1 + +#define CHAR_BIT 8 /* bits in a char */ +#define CHAR_MAX 127 +#define CHAR_MIN -128 +#define SCHAR_MAX CHAR_MAX +#define SCHAR_MIN CHAR_MIN +#define UCHAR_MAX 0xff +#define UCHAR_MIN 0 +#define INT_MIN -32768 +#define INT_MAX 32767 +#define SHRT_MAX INT_MAX +#define SHRT_MIN INT_MIN +#define UINT_MAX 0xffff +#define UINT_MIN 0 +#define USHRT_MAX UINT_MAX +#define USHRT_MIN UINT_MIN +#define LONG_MIN -2147483648 +#define LONG_MAX 2147483647 +#define ULONG_MAX 0xffffffff +#define ULONG_MIN 0 + +#endif diff --git a/device/include/pic/math.h b/device/include/pic/math.h new file mode 100644 index 0000000..d985fe8 --- /dev/null +++ b/device/include/pic/math.h @@ -0,0 +1,89 @@ +/*------------------------------------------------------------------------- + math.h: Floating point math function declarations + + Ported to PIC16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + Adopted for the PIC14 port 2006 by Raphael Neider + + Copyright (C) 2001 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +/* +** $Id: math.h 4776 2007-04-29 13:15:51Z borutr $ +*/ + + +#ifndef __PIC14_MATH_H +#define __PIC14_MATH_H 1 + +#include + +#define PI 3.1415926536 +#define TWO_PI 6.2831853071 +#define HALF_PI 1.5707963268 +#define QUART_PI 0.7853981634 +#define iPI 0.3183098862 +#define iTWO_PI 0.1591549431 +#define TWO_O_PI 0.6366197724 + +// EPS=B**(-t/2), where B is the radix of the floating-point representation +// and there are t base-B digits in the significand. Therefore, for floats +// EPS=2**(-12). Also define EPS2=EPS*EPS. +#define EPS 244.14062E-6 +#define EPS2 59.6046E-9 +#define XMAX 3.402823466E+38 + +union float_long +{ + float f; + long l; +}; + +/********************************************** + * Prototypes for float ANSI C math functions * + **********************************************/ + +/* Trigonometric functions */ +float sinf(const float x) _MATH_REENTRANT; +float cosf(const float x) _MATH_REENTRANT; +float tanf(const float x) _MATH_REENTRANT; +float cotf(const float x) _MATH_REENTRANT; +float asinf(const float x) _MATH_REENTRANT; +float acosf(const float x) _MATH_REENTRANT; +float atanf(const float x) _MATH_REENTRANT; +float atan2f(const float x, const float y); + +/* Hyperbolic functions */ +float sinhf(const float x) _MATH_REENTRANT; +float coshf(const float x) _MATH_REENTRANT; +float tanhf(const float x) _MATH_REENTRANT; + +/* Exponential, logarithmic and power functions */ +float expf(const float x); +float logf(const float x) _MATH_REENTRANT; +float log10f(const float x) _MATH_REENTRANT; +float powf(const float x, const float y); +float sqrtf(const float a) _MATH_REENTRANT; + +/* Nearest integer, absolute value, and remainder functions */ +float fabsf(const float x) _MATH_REENTRANT; +float frexpf(const float x, int *pw2); +float ldexpf(const float x, const int pw2); +float ceilf(float x) _MATH_REENTRANT; +float floorf(float x) _MATH_REENTRANT; +float modff(float x, float * y); + +#endif /* __PIC14_MATH_H */ diff --git a/device/include/pic/p16f_common.inc b/device/include/pic/p16f_common.inc new file mode 100644 index 0000000..513bae7 --- /dev/null +++ b/device/include/pic/p16f_common.inc @@ -0,0 +1,18 @@ +; ----------------------------------------------- +; p16f_common.inc - definitions common to all 14 bit PIC devices +; +; Copyright (C) 2005 by Raphael Neider +; +; This file is part of the SDCC/pic14 library. +; This file is licensed under the terms of the LGPL, see LGPL +; for details. +; +; $Id: p16f_common.inc 4086 2006-04-06 19:56:14Z tecodev $ + + extern STK00 + extern STK01 + extern STK02 + extern STK03 + extern STK04 + extern STK05 + diff --git a/device/include/pic/pic12f629.h b/device/include/pic/pic12f629.h new file mode 100644 index 0000000..14cec5e --- /dev/null +++ b/device/include/pic/pic12f629.h @@ -0,0 +1,5 @@ +/* + * Register Declarations for Microchip 12F629 Processor + */ +#include "pic12f675.h" + diff --git a/device/include/pic/pic12f635.h b/device/include/pic/pic12f635.h new file mode 100644 index 0000000..62e13bc --- /dev/null +++ b/device/include/pic/pic12f635.h @@ -0,0 +1,781 @@ +// +// Register Declarations for Microchip 12F635 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P12F635_H +#define P12F635_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define GPIO_ADDR 0x0005 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define WDTCON_ADDR 0x0018 +#define CMCON0_ADDR 0x0019 +#define CMCON1_ADDR 0x001A +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISIO_ADDR 0x0085 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define LVDCON_ADDR 0x0094 +#define WPUDA_ADDR 0x0095 +#define IOCA_ADDR 0x0096 +#define WDA_ADDR 0x0097 +#define VRCON_ADDR 0x0099 +#define EEDAT_ADDR 0x009A +#define EEDATA_ADDR 0x009A +#define EEADR_ADDR 0x009B +#define EECON1_ADDR 0x009C +#define EECON2_ADDR 0x009D +#define CRCON_ADDR 0x0110 +#define CRDAT0_ADDR 0x0111 +#define CRDAT1_ADDR 0x0112 +#define CRDAT2_ADDR 0x0113 +#define CRDAT3_ADDR 0x0114 + +// +// Memory organization. +// + + + +// LIST +// P12F635.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC12F635 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC12F635 +// 2. LIST directive in the source file +// LIST P=PIC12F635 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== +//1.00 12/07/03 Original +//1.10 04/19/04 Release to match first revision datasheet --kjd +//1.20 06/07/04 Update and correct badram definitions --kjd +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __12F635 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ +//Bank 0 +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (GPIO_ADDR) GPIO; + +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; + +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; + +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (CMCON0_ADDR) CMCON0; +extern __sfr __at (CMCON1_ADDR) CMCON1; + +//Bank 1 +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; + +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISIO_ADDR) TRISIO; + +extern __sfr __at (PIE1_ADDR) PIE1; + +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; + +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (WPUDA_ADDR) WPUDA; +extern __sfr __at (IOCA_ADDR) IOCA; +extern __sfr __at (WDA_ADDR) WDA; + +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (EEDAT_ADDR) EEDAT; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//Bank 2 +extern __sfr __at (CRCON_ADDR) CRCON; +extern __sfr __at (CRDAT0_ADDR) CRDAT0; +extern __sfr __at (CRDAT1_ADDR) CRDAT1; +extern __sfr __at (CRDAT2_ADDR) CRDAT2; +extern __sfr __at (CRDAT3_ADDR) CRDAT3; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- CMCON0 Bits ------------------------------------------------------- + + +//----- CMCON1 Bits ------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits -------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + +//----- IOCA -------------------------------------------------------------- + + +//----- EECON1 ------------------------------------------------------------- + + +//----- VRCON --------------------------------------------------------- + + + +//----- CRCON ------------------------------------------------------------- + + +//----- LVDCON ------------------------------------------------------------- + + +//----- WDA ------------------------------------------------------------- + + +//----- WPUDA ------------------------------------------------------------- + + +//----- PORTA ------------------------------------------------------------- + + +//----- GPIO ------------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'06'-H'09', H'0D', H'11'-H'17', H'1B'-H'1F', H'20'-H'3F' +// __BADRAM H'86'-H'89', H'8D', H'91'-H'93', H'98', H'9E'-H'9F', H'A0'-H'EF' +// __BADRAM H'10C'-H'10F', H'115'-H'16F', H'106'-H'109', H'186'-H'189' +// __BADRAM H'18C'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== +#define _WUREN_ON 0x2FFF +#define _WUREN_OFF 0x3FFF +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOD_ON 0x3FFF +#define _BOD_NSLEEP 0x3EFF +#define _BOD_SBODEN 0x3DFF +#define _BOD_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF + +// LIST + +// ----- CMCON0 bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char :1; + unsigned char C1OUT:1; + unsigned char :1; + }; +} __CMCON0_bits_t; +extern volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON0_bits.CM0 +#define CM1 CMCON0_bits.CM1 +#define CM2 CMCON0_bits.CM2 +#define CIS CMCON0_bits.CIS +#define C1INV CMCON0_bits.C1INV +#define C1OUT CMCON0_bits.C1OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON1 bits -------------------- +typedef union { + struct { + unsigned char C1SYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __CMCON1_bits_t; +extern volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define C1SYNC CMCON1_bits.C1SYNC +#define T1GSS CMCON1_bits.T1GSS +#endif /* NO_BIT_DEFINES */ + +// ----- CRCON bits -------------------- +typedef union { + struct { + unsigned char CRREG0:1; + unsigned char CRREG1:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ENC_DEC:1; + unsigned char GO:1; + }; +} __CRCON_bits_t; +extern volatile __CRCON_bits_t __at(CRCON_ADDR) CRCON_bits; + +#ifndef NO_BIT_DEFINES +#define CRREG0 CRCON_bits.CRREG0 +#define CRREG1 CRCON_bits.CRREG1 +#define ENC_DEC CRCON_bits.ENC_DEC +#define GO CRCON_bits.GO +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#endif /* NO_BIT_DEFINES */ + +// ----- GPIO bits -------------------- +typedef union { + struct { + unsigned char GP0:1; + unsigned char GP1:1; + unsigned char GP2:1; + unsigned char GP3:1; + unsigned char GP4:1; + unsigned char GP5:1; + unsigned char :1; + unsigned char :1; + }; +} __GPIO_bits_t; +extern volatile __GPIO_bits_t __at(GPIO_ADDR) GPIO_bits; + +#ifndef NO_BIT_DEFINES +#define GP0 GPIO_bits.GP0 +#define GP1 GPIO_bits.GP1 +#define GP2 GPIO_bits.GP2 +#define GP3 GPIO_bits.GP3 +#define GP4 GPIO_bits.GP4 +#define GP5 GPIO_bits.GP5 +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RAIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RAIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RAIF INTCON_bits.RAIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RAIE INTCON_bits.RAIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOCA bits -------------------- +typedef union { + struct { + unsigned char IOCA0:1; + unsigned char IOCA1:1; + unsigned char IOCA2:1; + unsigned char IOCA3:1; + unsigned char IOCA4:1; + unsigned char IOCA5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOCA_bits_t; +extern volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; + +#ifndef NO_BIT_DEFINES +#define IOCA0 IOCA_bits.IOCA0 +#define IOCA1 IOCA_bits.IOCA1 +#define IOCA2 IOCA_bits.IOCA2 +#define IOCA3 IOCA_bits.IOCA3 +#define IOCA4 IOCA_bits.IOCA4 +#define IOCA5 IOCA_bits.IOCA5 +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LVDL0:1; + unsigned char LVDL1:1; + unsigned char LVDL2:1; + unsigned char :1; + unsigned char PLVDEN:1; + unsigned char IRVST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LVDL0 LVDCON_bits.LVDL0 +#define LVDL1 LVDCON_bits.LVDL1 +#define LVDL2 LVDCON_bits.LVDL2 +#define PLVDEN LVDCON_bits.PLVDEN +#define IRVST LVDCON_bits.IRVST +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RAPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RAPU OPTION_REG_bits.NOT_RAPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BOD:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char NOT_WUR:1; + unsigned char SBODEN:1; + unsigned char ULPWUE:1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_POR PCON_bits.NOT_POR +#define NOT_WUR PCON_bits.NOT_WUR +#define SBODEN PCON_bits.SBODEN +#define ULPWUE PCON_bits.ULPWUE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char :1; + unsigned char OSFIE:1; + unsigned char C1IE:1; + unsigned char :1; + unsigned char CRIE:1; + unsigned char LVDIE:1; + unsigned char EEIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define OSFIE PIE1_bits.OSFIE +#define C1IE PIE1_bits.C1IE +#define CRIE PIE1_bits.CRIE +#define LVDIE PIE1_bits.LVDIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char :1; + unsigned char OSFIF:1; + unsigned char C1IF:1; + unsigned char :1; + unsigned char CRIF:1; + unsigned char LVDIF:1; + unsigned char EEIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define OSFIF PIR1_bits.OSFIF +#define C1IF PIR1_bits.C1IF +#define CRIF PIR1_bits.CRIF +#define LVDIF PIR1_bits.LVDIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char T1GINV:1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char :1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +// ----- WDA bits -------------------- +typedef union { + struct { + unsigned char WDA0:1; + unsigned char WDA1:1; + unsigned char WDA2:1; + unsigned char :1; + unsigned char WDA4:1; + unsigned char WDA5:1; + unsigned char :1; + unsigned char :1; + }; +} __WDA_bits_t; +extern volatile __WDA_bits_t __at(WDA_ADDR) WDA_bits; + +#ifndef NO_BIT_DEFINES +#define WDA0 WDA_bits.WDA0 +#define WDA1 WDA_bits.WDA1 +#define WDA2 WDA_bits.WDA2 +#define WDA4 WDA_bits.WDA4 +#define WDA5 WDA_bits.WDA5 +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUDA bits -------------------- +typedef union { + struct { + unsigned char WPUDA0:1; + unsigned char WPUDA1:1; + unsigned char WPUDA2:1; + unsigned char :1; + unsigned char WPUDA4:1; + unsigned char WPUDA5:1; + unsigned char :1; + unsigned char :1; + }; +} __WPUDA_bits_t; +extern volatile __WPUDA_bits_t __at(WPUDA_ADDR) WPUDA_bits; + +#ifndef NO_BIT_DEFINES +#define WPUDA0 WPUDA_bits.WPUDA0 +#define WPUDA1 WPUDA_bits.WPUDA1 +#define WPUDA2 WPUDA_bits.WPUDA2 +#define WPUDA4 WPUDA_bits.WPUDA4 +#define WPUDA5 WPUDA_bits.WPUDA5 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic12f675.h b/device/include/pic/pic12f675.h new file mode 100644 index 0000000..c326e69 --- /dev/null +++ b/device/include/pic/pic12f675.h @@ -0,0 +1,713 @@ +// +// Register Declarations for Microchip 12F675 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P12F675_H +#define P12F675_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define GPIO_ADDR 0x0005 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define CMCON_ADDR 0x0019 +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISIO_ADDR 0x0085 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define OSCCAL_ADDR 0x0090 +#define WPU_ADDR 0x0095 +#define IOC_ADDR 0x0096 +#define IOCB_ADDR 0x0096 +#define VRCON_ADDR 0x0099 +#define EEDATA_ADDR 0x009A +#define EEDAT_ADDR 0x009A +#define EEADR_ADDR 0x009B +#define EECON1_ADDR 0x009C +#define EECON2_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ANSEL_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P12F675.INC Standard Header File, Version 1.04 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC12F675 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC12F675 +// 2. LIST directive in the source file +// LIST P=PIC12F675 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== +//1.04 07/01/02 Updated configuration bit names +//1.03 05/10/02 Corrected ADCON0 register, added IOC register +//1.02 02/28/02 Updated per datasheet +//1.01 01/31/02 Updated per datasheet +//1.00 08/24/01 Original + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __12F675 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (GPIO_ADDR) GPIO; + +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; + +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; + +extern __sfr __at (CMCON_ADDR) CMCON; + +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; + +extern __sfr __at (TRISIO_ADDR) TRISIO; + +extern __sfr __at (PIE1_ADDR) PIE1; + +extern __sfr __at (PCON_ADDR) PCON; + +extern __sfr __at (OSCCAL_ADDR) OSCCAL; + +extern __sfr __at (WPU_ADDR) WPU; +extern __sfr __at (IOC_ADDR) IOC; +extern __sfr __at (IOCB_ADDR) IOCB; + +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEDAT_ADDR) EEDAT; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ANSEL_ADDR) ANSEL; + + +//----- STATUS Bits -------------------------------------------------------- + + +//----- GPIO Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- COMCON Bits -------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCAL Bits -------------------------------------------------------- + + +//----- IOCB Bits -------------------------------------------------------- + + +//----- IOC Bits -------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//----- EECON1 ------------------------------------------------------------- + + +//----- ANSEL -------------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'FF' +// __BADRAM H'06'-H'09', H'0D', H'11'-H'18', H'1A'-H'1D', H'60'-H'7F' +// __BADRAM H'86'-H'89', H'8D', H'8F', H'91'-H'94', H'97'-H'98', H'E0'-H'FF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CPD_ON 0x3EFF +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3F7F +#define _CP_OFF 0x3FFF +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char :1; + unsigned char :1; + unsigned char VCFG:1; + unsigned char ADFM:1; + }; + struct { + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define VCFG ADCON0_bits.VCFG +#define ADFM ADCON0_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ANSEL bits -------------------- +typedef union { + struct { + unsigned char ANS0:1; + unsigned char ANS1:1; + unsigned char ANS2:1; + unsigned char ANS3:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + unsigned char ADCS2:1; + unsigned char :1; + }; +} __ANSEL_bits_t; +extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; + +#ifndef NO_BIT_DEFINES +#define ANS0 ANSEL_bits.ANS0 +#define ANS1 ANSEL_bits.ANS1 +#define ANS2 ANSEL_bits.ANS2 +#define ANS3 ANSEL_bits.ANS3 +#define ADCS0 ANSEL_bits.ADCS0 +#define ADCS1 ANSEL_bits.ADCS1 +#define ADCS2 ANSEL_bits.ADCS2 +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char CINV:1; + unsigned char :1; + unsigned char COUT:1; + unsigned char :1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define CINV CMCON_bits.CINV +#define COUT CMCON_bits.COUT +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#endif /* NO_BIT_DEFINES */ + +// ----- GPIO bits -------------------- +typedef union { + struct { + unsigned char GP0:1; + unsigned char GP1:1; + unsigned char GP2:1; + unsigned char GP3:1; + unsigned char GP4:1; + unsigned char GP5:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char GPIO0:1; + unsigned char GPIO1:1; + unsigned char GPIO2:1; + unsigned char GPIO3:1; + unsigned char GPIO4:1; + unsigned char GPIO5:1; + unsigned char :1; + unsigned char :1; + }; +} __GPIO_bits_t; +extern volatile __GPIO_bits_t __at(GPIO_ADDR) GPIO_bits; + +#ifndef NO_BIT_DEFINES +#define GP0 GPIO_bits.GP0 +#define GPIO0 GPIO_bits.GPIO0 +#define GP1 GPIO_bits.GP1 +#define GPIO1 GPIO_bits.GPIO1 +#define GP2 GPIO_bits.GP2 +#define GPIO2 GPIO_bits.GPIO2 +#define GP3 GPIO_bits.GP3 +#define GPIO3 GPIO_bits.GPIO3 +#define GP4 GPIO_bits.GP4 +#define GPIO4 GPIO_bits.GPIO4 +#define GP5 GPIO_bits.GP5 +#define GPIO5 GPIO_bits.GPIO5 +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char GPIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char GPIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define GPIF INTCON_bits.GPIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define GPIE INTCON_bits.GPIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOC bits -------------------- +typedef union { + struct { + unsigned char IOC0:1; + unsigned char IOC1:1; + unsigned char IOC2:1; + unsigned char IOC3:1; + unsigned char IOC4:1; + unsigned char IOC5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOC_bits_t; +extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; + +#ifndef NO_BIT_DEFINES +#define IOC0 IOC_bits.IOC0 +#define IOC1 IOC_bits.IOC1 +#define IOC2 IOC_bits.IOC2 +#define IOC3 IOC_bits.IOC3 +#define IOC4 IOC_bits.IOC4 +#define IOC5 IOC_bits.IOC5 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCB bits -------------------- +typedef union { + struct { + unsigned char IOCB0:1; + unsigned char IOCB1:1; + unsigned char IOCB2:1; + unsigned char IOCB3:1; + unsigned char IOCB4:1; + unsigned char IOCB5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOCB_bits_t; +extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; + +#ifndef NO_BIT_DEFINES +#define IOCB0 IOCB_bits.IOCB0 +#define IOCB1 IOCB_bits.IOCB1 +#define IOCB2 IOCB_bits.IOCB2 +#define IOCB3 IOCB_bits.IOCB3 +#define IOCB4 IOCB_bits.IOCB4 +#define IOCB5 IOCB_bits.IOCB5 +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_GPPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_GPPU OPTION_REG_bits.NOT_GPPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCAL bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char CAL0:1; + unsigned char CAL1:1; + unsigned char CAL2:1; + unsigned char CAL3:1; + unsigned char CAL4:1; + unsigned char CAL5:1; + }; +} __OSCCAL_bits_t; +extern volatile __OSCCAL_bits_t __at(OSCCAL_ADDR) OSCCAL_bits; + +#ifndef NO_BIT_DEFINES +#define CAL0 OSCCAL_bits.CAL0 +#define CAL1 OSCCAL_bits.CAL1 +#define CAL2 OSCCAL_bits.CAL2 +#define CAL3 OSCCAL_bits.CAL3 +#define CAL4 OSCCAL_bits.CAL4 +#define CAL5 OSCCAL_bits.CAL5 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BOD:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char T1IE:1; + unsigned char :1; + unsigned char :1; + unsigned char CMIE:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char EEIE:1; + }; + struct { + unsigned char TMR1IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IE PIE1_bits.T1IE +#define TMR1IE PIE1_bits.TMR1IE +#define CMIE PIE1_bits.CMIE +#define ADIE PIE1_bits.ADIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char T1IF:1; + unsigned char :1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char EEIF:1; + }; + struct { + unsigned char TMR1IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IF PIR1_bits.T1IF +#define TMR1IF PIR1_bits.TMR1IF +#define CMIF PIR1_bits.CMIF +#define ADIF PIR1_bits.ADIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#endif /* NO_BIT_DEFINES */ + +// ----- TRISIO bits ------------------- +typedef union { + struct { + unsigned char TRISIO0:1; + unsigned char TRISIO1:1; + unsigned char TRISIO2:1; + unsigned char TRISIO3:1; + unsigned char TRISIO4:1; + unsigned char TRISIO5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISIO_bits_t; +extern volatile __TRISIO_bits_t __at(TRISIO_ADDR) TRISIO_bits; + +#ifndef NO_BIT_DEFINES +#define TRISIO0 TRISIO_bits.TRISIO0 +#define TRISIO1 TRISIO_bits.TRISIO1 +#define TRISIO2 TRISIO_bits.TRISIO2 +#define TRISIO3 TRISIO_bits.TRISIO3 +#define TRISIO4 TRISIO_bits.TRISIO4 +#define TRISIO5 TRISIO_bits.TRISIO5 +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char :1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic12f683.h b/device/include/pic/pic12f683.h new file mode 100644 index 0000000..4e34828 --- /dev/null +++ b/device/include/pic/pic12f683.h @@ -0,0 +1,857 @@ +// +// Register Declarations for Microchip 12F683 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P12F683_H +#define P12F683_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define GPIO_ADDR 0x0005 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define CCPR1L_ADDR 0x0013 +#define CCPR1H_ADDR 0x0014 +#define CCP1CON_ADDR 0x0015 +#define WDTCON_ADDR 0x0018 +#define CMCON0_ADDR 0x0019 +#define CMCON1_ADDR 0x001A +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISIO_ADDR 0x0085 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define PR2_ADDR 0x0092 +#define WPU_ADDR 0x0095 +#define WPUA_ADDR 0x0095 +#define IOC_ADDR 0x0096 +#define IOCA_ADDR 0x0096 +#define VRCON_ADDR 0x0099 +#define EEDATA_ADDR 0x009A +#define EEDAT_ADDR 0x009A +#define EEADR_ADDR 0x009B +#define EECON1_ADDR 0x009C +#define EECON2_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ANSEL_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P12F683.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC12F683 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F684 +// 2. LIST directive in the source file +// LIST P=PIC12F683 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== +//1.01 01/05/07 GPIO Bits +//1.00 12/09/03 Original + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __12F683 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (GPIO_ADDR) GPIO; + +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; + +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; + +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (CMCON0_ADDR) CMCON0; +extern __sfr __at (CMCON1_ADDR) CMCON1; + +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; + +extern __sfr __at (TRISIO_ADDR) TRISIO; + +extern __sfr __at (PIE1_ADDR) PIE1; + +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; + +extern __sfr __at (PR2_ADDR) PR2; + +extern __sfr __at (WPU_ADDR) WPU; +extern __sfr __at (WPUA_ADDR) WPUA; +extern __sfr __at (IOC_ADDR) IOC; +extern __sfr __at (IOCA_ADDR) IOCA; + +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEDAT_ADDR) EEDAT; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ANSEL_ADDR) ANSEL; + + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- COMCON0 Bits ------------------------------------------------------- + + +//----- COMCON1 Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits -------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + + +//----- IOC -------------------------------------------------------------- + + +//----- IOCA -------------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//----- EECON1 ------------------------------------------------------------- + + +//----- ANSEL -------------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'FF' +// __BADRAM H'06', H'08'-H'09', H'0D', H'1B'-H'1D' +// __BADRAM H'86', H'88'-H'89', H'8D', H'93'-H'94', H'97'-H'98', H'C0'-H'EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOD_ON 0x3FFF +#define _BOD_NSLEEP 0x3EFF +#define _BOD_SBODEN 0x3DFF +#define _BOD_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTOSCIO 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _INTOSC 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRCIO 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF +#define _EXTRC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char :1; + unsigned char VCFG:1; + unsigned char ADFM:1; + }; + struct { + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define VCFG ADCON0_bits.VCFG +#define ADFM ADCON0_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ANSEL bits -------------------- +typedef union { + struct { + unsigned char ANS0:1; + unsigned char ANS1:1; + unsigned char ANS2:1; + unsigned char ANS3:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + unsigned char ADCS2:1; + unsigned char :1; + }; +} __ANSEL_bits_t; +extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; + +#ifndef NO_BIT_DEFINES +#define ANS0 ANSEL_bits.ANS0 +#define ANS1 ANSEL_bits.ANS1 +#define ANS2 ANSEL_bits.ANS2 +#define ANS3 ANSEL_bits.ANS3 +#define ADCS0 ANSEL_bits.ADCS0 +#define ADCS1 ANSEL_bits.ADCS1 +#define ADCS2 ANSEL_bits.ADCS2 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char DC1B0:1; + unsigned char DC1B1:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define DC1B0 CCP1CON_bits.DC1B0 +#define DC1B1 CCP1CON_bits.DC1B1 +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON0 bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char CINV:1; + unsigned char :1; + unsigned char COUT:1; + unsigned char :1; + }; +} __CMCON0_bits_t; +extern volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON0_bits.CM0 +#define CM1 CMCON0_bits.CM1 +#define CM2 CMCON0_bits.CM2 +#define CIS CMCON0_bits.CIS +#define CINV CMCON0_bits.CINV +#define COUT CMCON0_bits.COUT +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON1 bits -------------------- +typedef union { + struct { + unsigned char CMSYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __CMCON1_bits_t; +extern volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define CMSYNC CMCON1_bits.CMSYNC +#define T1GSS CMCON1_bits.T1GSS +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#endif /* NO_BIT_DEFINES */ + +// ----- GPIO bits -------------------- +typedef union { + struct { + unsigned char GP0:1; + unsigned char GP1:1; + unsigned char GP2:1; + unsigned char GP3:1; + unsigned char GP4:1; + unsigned char GP5:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char GPIO0:1; + unsigned char GPIO1:1; + unsigned char GPIO2:1; + unsigned char GPIO3:1; + unsigned char GPIO4:1; + unsigned char GPIO5:1; + unsigned char :1; + unsigned char :1; + }; +} __GPIO_bits_t; +extern volatile __GPIO_bits_t __at(GPIO_ADDR) GPIO_bits; + +#ifndef NO_BIT_DEFINES +#define GP0 GPIO_bits.GP0 +#define GPIO0 GPIO_bits.GPIO0 +#define GP1 GPIO_bits.GP1 +#define GPIO1 GPIO_bits.GPIO1 +#define GP2 GPIO_bits.GP2 +#define GPIO2 GPIO_bits.GPIO2 +#define GP3 GPIO_bits.GP3 +#define GPIO3 GPIO_bits.GPIO3 +#define GP4 GPIO_bits.GP4 +#define GPIO4 GPIO_bits.GPIO4 +#define GP5 GPIO_bits.GP5 +#define GPIO5 GPIO_bits.GPIO5 +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char GPIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char GPIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define GPIF INTCON_bits.GPIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define GPIE INTCON_bits.GPIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOC bits -------------------- +typedef union { + struct { + unsigned char IOC0:1; + unsigned char IOC1:1; + unsigned char IOC2:1; + unsigned char IOC3:1; + unsigned char IOC4:1; + unsigned char IOC5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOC_bits_t; +extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; + +#ifndef NO_BIT_DEFINES +#define IOC0 IOC_bits.IOC0 +#define IOC1 IOC_bits.IOC1 +#define IOC2 IOC_bits.IOC2 +#define IOC3 IOC_bits.IOC3 +#define IOC4 IOC_bits.IOC4 +#define IOC5 IOC_bits.IOC5 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCA bits -------------------- +typedef union { + struct { + unsigned char IOCA0:1; + unsigned char IOCA1:1; + unsigned char IOCA2:1; + unsigned char IOCA3:1; + unsigned char IOCA4:1; + unsigned char IOCA5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOCA_bits_t; +extern volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; + +#ifndef NO_BIT_DEFINES +#define IOCA0 IOCA_bits.IOCA0 +#define IOCA1 IOCA_bits.IOCA1 +#define IOCA2 IOCA_bits.IOCA2 +#define IOCA3 IOCA_bits.IOCA3 +#define IOCA4 IOCA_bits.IOCA4 +#define IOCA5 IOCA_bits.IOCA5 +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_GPPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_GPPU OPTION_REG_bits.NOT_GPPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BOD:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char SBODEN:1; + unsigned char ULPWUE:1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_POR PCON_bits.NOT_POR +#define SBODEN PCON_bits.SBODEN +#define ULPWUE PCON_bits.ULPWUE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char T1IE:1; + unsigned char T2IE:1; + unsigned char OSFIE:1; + unsigned char CMIE:1; + unsigned char :1; + unsigned char CCP1IE:1; + unsigned char ADIE:1; + unsigned char EEIE:1; + }; + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IE PIE1_bits.T1IE +#define TMR1IE PIE1_bits.TMR1IE +#define T2IE PIE1_bits.T2IE +#define TMR2IE PIE1_bits.TMR2IE +#define OSFIE PIE1_bits.OSFIE +#define CMIE PIE1_bits.CMIE +#define CCP1IE PIE1_bits.CCP1IE +#define ADIE PIE1_bits.ADIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char T1IF:1; + unsigned char T2IF:1; + unsigned char OSFIF:1; + unsigned char CMIF:1; + unsigned char :1; + unsigned char CCP1IF:1; + unsigned char ADIF:1; + unsigned char EEIF:1; + }; + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IF PIR1_bits.T1IF +#define TMR1IF PIR1_bits.TMR1IF +#define T2IF PIR1_bits.T2IF +#define TMR2IF PIR1_bits.TMR2IF +#define OSFIF PIR1_bits.OSFIF +#define CMIF PIR1_bits.CMIF +#define CCP1IF PIR1_bits.CCP1IF +#define ADIF PIR1_bits.ADIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char T1GE:1; + unsigned char T1GINV:1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define T1GE T1CON_bits.T1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char :1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic14devices.txt b/device/include/pic/pic14devices.txt new file mode 100644 index 0000000..ee4ee12 --- /dev/null +++ b/device/include/pic/pic14devices.txt @@ -0,0 +1,1034 @@ +# +# PIC14: 14 bit 16Fxxx / 16Cxxx / 12Fxxx series device file for SDCC +# +# by Zik Saleeba 2006-03-04 +# + +# +# dev = device name +# program = program memory in 14 bit words +# data = data memory in bytes +# eeprom = eeprom storage +# io = io lines +# maxram = maximum memmap address for unique general purpose registers +# bankmsk = mask for memmap bank selecting. 0x80 for two banks usable, +# 0x180 for four. +# confsiz = 1: config at 0x2007, 2: has an extra config register at 0x2008 +# regmap = registers duplicated in multiple banks. First value is a bank bitmask, +# following values are register addresses +# memmap +# - mirrored in all banks set in +# is a bitmask of bank bits (0x80, 0x100, 0x180) +# +# + +# +# 16F series +# +processor 16f72 + program 2K + data 128 + eeprom 0 + io 22 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x06 0x0a 0x0b + regmap 0x100 0x01 0x81 + memmap 0x0020 0x003f 0x100 + memmap 0x0040 0x007f 0x180 + memmap 0x00a0 0x00bf 0x100 + +processor 16f73 + program 4K + data 192 + eeprom 0 + io 22 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x007f 0x100 + memmap 0x00a0 0x00ff 0x100 + +processor 16f74 + program 4K + data 192 + eeprom 0 + io 33 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x007f 0x100 + memmap 0x00a0 0x00ff 0x100 + +processor 16f76 + program 8K + data 368 + eeprom 0 + io 22 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + memmap 0x01a0 0x01ef 0x000 + +processor 16f77 + program 8K + data 368 + eeprom 0 + io 33 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + memmap 0x01a0 0x01ef 0x000 + +processor 16f84, 16f84a + program 1K + data 68 + eeprom 64 + io 13 + maxram 0xcf + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x000C 0x004f 0x080 + +processor 16f87, 16f88 + program 4K + data 368 + eeprom 256 + io 16 + maxram 0x1ff + bankmsk 0x180 + confsiz 2 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x0110 0x016f 0x000 + memmap 0x0190 0x01ef 0x000 + +processor 16f616, 16hv616 + program 2K + data 128 + eeprom 0 + io 11 + maxram 0xff + bankmsk 0x80 + confsiz 1 + regmap 0x080 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x080 + memmap 0x00a0 0x00bf 0x000 + +processor 16f627, 16f627a + program 1K + data 224 + eeprom 128 + io 16 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x014f 0x000 + +processor 16f628, 16f628a + program 2K + data 224 + eeprom 128 + io 16 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x014f 0x000 + +processor 16f648, 16f648a + program 4K + data 256 + eeprom 256 + io 16 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + +processor 16f630, 16f676 + program 1K + data 64 + eeprom 128 + io 12 + maxram 0xff + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x005f 0x080 + +processor 16f636, 16f639 + program 2K + data 128 + eeprom 256 + io 12 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x05 0x85 0x07 0x87 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00bf 0x000 + +processor 16f684 + program 2K + data 128 + eeprom 256 + io 12 + maxram 0xff + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x080 + memmap 0x00a0 0x00bf 0x000 + +processor 16f685, 16f689, 16f690 + program 4K + data 256 + eeprom 256 + io 18 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x05 0x85 0x06 0x86 0x07 0x87 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + +processor 16f687 + program 2K + data 128 + eeprom 256 + io 18 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x05 0x85 0x06 0x86 0x07 0x87 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00bf 0x000 + +processor 16f688 + program 4K + data 256 + eeprom 256 + io 12 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x05 0x85 0x07 0x87 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + +processor 16f716 + program 2K + data 128 + eeprom 0 + io 13 + maxram 0xff + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x080 + memmap 0x00a0 0x00bf 0x000 + +processor 16f737 + program 4K + data 368 + eeprom 0 + io 25 + maxram 0x1ff + bankmsk 0x180 + confsiz 2 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0110 0x016f 0x000 + memmap 0x0190 0x01ef 0x000 + +processor 16f747 + program 4K + data 368 + eeprom 0 + io 36 + maxram 0x1ff + bankmsk 0x180 + confsiz 2 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0110 0x016f 0x000 + memmap 0x0190 0x01ef 0x000 + +processor 16f767 + program 8K + data 368 + eeprom 0 + io 25 + maxram 0x1ff + bankmsk 0x180 + confsiz 2 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0110 0x016f 0x000 + memmap 0x0190 0x01ef 0x000 + +processor 16f777 + program 8K + data 368 + eeprom 0 + io 36 + maxram 0x1ff + bankmsk 0x180 + confsiz 2 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0110 0x016f 0x000 + memmap 0x0190 0x01ef 0x000 + +processor 16f785, 16hv785 + program 2K + data 128 + eeprom 256 + io 18 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x05 0x85 0x06 0x86 0x07 0x87 0x8c + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00bf 0x000 + +processor 16f870, 16f872 + program 2K + data 128 + eeprom 64 + io 22 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x100 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00bf 0x100 + +processor 16f871 + program 2K + data 128 + eeprom 64 + io 33 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x100 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00bf 0x100 + +processor 16f873, 16f873a + program 4K + data 192 + eeprom 128 + io 22 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x007f 0x100 + memmap 0x00a0 0x00ff 0x100 + +processor 16f874, 16f874a + program 4K + data 192 + eeprom 128 + io 33 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x007f 0x100 + memmap 0x00a0 0x00ff 0x100 + +processor 16f876, 16f876a + program 8K + data 368 + eeprom 256 + io 22 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0110 0x016f 0x000 + memmap 0x0190 0x01ef 0x000 + +processor 16f877, 16f877a + program 8K + data 368 + eeprom 256 + io 22 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0110 0x016f 0x000 + memmap 0x0190 0x01ef 0x000 + +processor 16f886 + program 8K + data 368 + eeprom 256 + io 24 + maxram 0x1ff + bankmsk 0x180 + confsiz 2 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0110 0x016f 0x000 + memmap 0x0190 0x01ef 0x000 + +processor 16f887 + program 8K + data 368 + eeprom 256 + io 35 + maxram 0x1ff + bankmsk 0x180 + confsiz 2 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0110 0x016f 0x000 + memmap 0x0190 0x01ef 0x000 + +processor 16f818 + program 1K + data 128 + eeprom 128 + io 16 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x003f 0x100 + memmap 0x0040 0x007f 0x180 + memmap 0x00a0 0x00bf 0x000 + +processor 16f819 + program 2K + data 256 + eeprom 256 + io 16 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + +processor 16f913 + program 4K + data 256 + eeprom 256 + io 24 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + +processor 16f914 + program 4K + data 256 + eeprom 256 + io 35 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + +processor 16f916 + program 8K + data 352 + eeprom 256 + io 24 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + memmap 0x0190 0x01ef 0x000 + +processor 16f917 + program 8K + data 352 + eeprom 256 + io 35 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + memmap 0x0190 0x01ef 0x000 + +processor 16f946 + program 8K + data 336 + eeprom 256 + io 53 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + memmap 0x01a0 0x01ef 0x000 + + +# +# 16c series +# +processor 16c62, 16c72 + program 2K + data 128 + eeprom 0 + io 22 + maxram 0xbf + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x007f 0x000 + memmap 0x00a0 0x00bf 0x000 + +processor 16c63a, 16c73b + program 4K + data 192 + eeprom 0 + io 22 + maxram 0xff + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x007f 0x000 + memmap 0x00a0 0x00ff 0x000 + +processor 16c65b, 16c74b + program 4K + data 192 + eeprom 0 + io 33 + maxram 0xff + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x007f 0x000 + memmap 0x00a0 0x00ff 0x000 + +processor 16cr73 + program 4K + data 192 + eeprom 0 + io 22 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 + memmap 0x0020 0x007f 0x000 + memmap 0x00a0 0x00ff 0x000 + +processor 16cr74 + program 4K + data 192 + eeprom 0 + io 33 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 + memmap 0x0020 0x007f 0x000 + memmap 0x00a0 0x00ff 0x000 + +processor 16cr76 + program 8K + data 368 + eeprom 0 + io 22 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x180 0x01 0x81 + memmap 0x0020 0x006f 0x000 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0110 0x016f 0x000 + memmap 0x0190 0x01ef 0x000 + memmap 0x0070 0x007f 0x180 + +processor 16cr77 + program 8K + data 368 + eeprom 0 + io 33 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x180 0x01 0x81 + memmap 0x0020 0x006f 0x000 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0110 0x016f 0x000 + memmap 0x0190 0x01ef 0x000 + memmap 0x0070 0x007f 0x180 + +processor 16c432 + program 2K + data 128 + eeprom 0 + io 12 + maxram 0xff + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x080 + memmap 0x00a0 0x00bf 0x000 + +processor 16c433 + program 2K + data 128 + eeprom 0 + io 6 + maxram 0xff + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x080 + memmap 0x00a0 0x00bf 0x000 + +processor 16c554 + program 512 + data 80 + eeprom 0 + io 21 + maxram 0x6f + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x006f 0x000 + +processor 16c557, 16c558 + program 2K + data 128 + eeprom 0 + io 21 + maxram 0xbf + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x007f 0x000 + memmap 0x00a0 0x00bf 0x000 + +processor 16c620 + program 512 + data 80 + eeprom 0 + io 13 + maxram 0x9f + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x006f 0x000 + +processor 16c620a, 16cr620a + program 512 + data 96 + eeprom 0 + io 13 + maxram 0xff + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x080 + +processor 16c621 + program 1K + data 80 + eeprom 0 + io 13 + maxram 0x9f + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x006f 0x000 + +processor 16c621a + program 1K + data 96 + eeprom 0 + io 13 + maxram 0xff + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x080 + +processor 16c622 + program 2K + data 128 + eeprom 0 + io 13 + maxram 0xbf + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x007f 0x000 + memmap 0x00a0 0x00bf 0x000 + +processor 16c622a + program 2K + data 128 + eeprom 0 + io 13 + maxram 0xff + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x080 + memmap 0x00a0 0x00bf 0x000 + + +processor 16c710 + program 512 + data 36 + eeprom 0 + io 13 + maxram 0xaf + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x09 0x0a 0x0b + memmap 0x000c 0x002f 0x080 + +processor 16c71 + program 1K + data 36 + eeprom 0 + io 13 + maxram 0xaf + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x09 0x0a 0x0b + memmap 0x000c 0x002f 0x080 + +processor 16c711 + program 1K + data 68 + eeprom 0 + io 13 + maxram 0xcf + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x09 0x0a 0x0b + memmap 0x000c 0x004f 0x080 + +processor 16c715 + program 2K + data 128 + eeprom 0 + io 13 + maxram 0xff + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x007f 0x000 + memmap 0x00a0 0x00bf 0x000 + +processor 16c717, 16c770 + program 2K + data 256 + eeprom 0 + io 16 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + +processor 16c771 + program 4K + data 256 + eeprom 0 + io 16 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + +processor 16c745 + program 8K + data 320 + eeprom 0 + io 22 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + memmap 0x01a0 0x01df 0x000 + +processor 16c765 + program 8K + data 320 + eeprom 0 + io 33 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + memmap 0x01a0 0x01df 0x000 + +processor 16c773 + program 4K + data 256 + eeprom 0 + io 21 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + +processor 16c774 + program 4K + data 256 + eeprom 0 + io 32 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00ef 0x000 + memmap 0x0120 0x016f 0x000 + +processor 16c781 + program 1K + data 128 + eeprom 0 + io 16 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00bf 0x000 + +processor 16c782 + program 2K + data 128 + eeprom 0 + io 16 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00bf 0x000 + +processor 16c925 + program 4K + data 176 + eeprom 0 + io 52 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00bf 0x000 + +processor 16c926 + program 8K + data 336 + eeprom 0 + io 52 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x06 0x86 + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + memmap 0x00a0 0x00bf 0x000 + memmap 0x0120 0x016f 0x000 + memmap 0x01a0 0x01bf 0x000 + +# +# 12F series devices with 14 bit core +# +processor 12f629, 12f675 + program 1K + data 64 + eeprom 128 + io 6 + maxram 0xff + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x005f 0x080 + +processor 12f635 + program 1K + data 64 + eeprom 128 + io 6 + maxram 0x1ff + bankmsk 0x180 + confsiz 1 + regmap 0x180 0x00 0x02 0x03 0x04 0x0a 0x0b + regmap 0x100 0x01 0x81 0x05 0x85 + memmap 0x0040 0x006f 0x000 + memmap 0x0070 0x007f 0x180 + +processor 12f683 + program 2K + data 128 + eeprom 256 + io 6 + maxram 0xff + bankmsk 0x80 + confsiz 1 + regmap 0x80 0x00 0x02 0x03 0x04 0x0a 0x0b + memmap 0x0020 0x006f 0x000 + memmap 0x0070 0x007f 0x080 + memmap 0x00a0 0x00bf 0x000 diff --git a/device/include/pic/pic14regs.h b/device/include/pic/pic14regs.h new file mode 100644 index 0000000..9cee5b2 --- /dev/null +++ b/device/include/pic/pic14regs.h @@ -0,0 +1,22 @@ +#ifndef __DEVICE_INCLUDE_PIC14REGS_H__ +#define __DEVICE_INCLUDE_PIC14REGS_H__ 1 + +#if defined(SDCC_PROCESSOR) + #ifndef _CONCAT + #undef _CONCAT2 + #define _CONCAT(a,b) _CONCAT2(a,b) + #define _CONCAT2(a,b) a ## b + #endif + + /* May not paste proc ## .h as pic16f877.h is no valid + * preprocessor token. So this is a bit fragile... */ + #define INC_PIC(proc) <_CONCAT(pic,proc).h> + + #include INC_PIC(SDCC_PROCESSOR) +#else + /* SDCC_PROCESSOR undefined */ + #warning SDCC_PROCESSOR undefined, no processor-specific header included. +#endif + +#endif /* __DEVICE_INCLUDE_PIC14REGS_H__ */ + diff --git a/device/include/pic/pic16c432.h b/device/include/pic/pic16c432.h new file mode 100644 index 0000000..d22a57f --- /dev/null +++ b/device/include/pic/pic16c432.h @@ -0,0 +1,472 @@ +// +// Register Declarations for Microchip 16C432 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C432_H +#define P16C432_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define CMCON_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define LINPRT_ADDR 0x0090 +#define VRCON_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16C432.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C432 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C432 +// 2. LIST directive in the source file +// LIST P=PIC16C432 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 31 Aug 2000 Initial Release +//1.10 28 Mar 2001 Corrected definition of LINTX + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C432 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (CMCON_ADDR) CMCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (LINPRT_ADDR) LINPRT; +extern __sfr __at (VRCON_ADDR) VRCON; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PORTA Bits -------------------------------------------------------- + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- CMCON Bits --------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//----- LINPRT Bits ---------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'0FF' +// __BADRAM H'07'-H'09', H'0D'-H'1E' +// __BADRAM H'87'-H'89', H'8D', H'8F', H'91'-H'9E' +// __BADRAM H'C0'-H'EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x00CF +#define _CP_75 0x15DF +#define _CP_50 0x2AEF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char :1; + unsigned char :1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- LINPRT bits -------------------- +typedef union { + struct { + unsigned char LINVDD:1; + unsigned char :1; + unsigned char LINTX:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __LINPRT_bits_t; +extern volatile __LINPRT_bits_t __at(LINPRT_ADDR) LINPRT_bits; + +#ifndef NO_BIT_DEFINES +#define LINVDD LINPRT_bits.LINVDD +#define LINTX LINPRT_bits.LINTX +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CMIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define CMIE PIE1_bits.CMIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define CMIF PIR1_bits.CMIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char LINRX:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define LINRX PORTA_bits.LINRX +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char VROE:1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VROE VRCON_bits.VROE +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c433.h b/device/include/pic/pic16c433.h new file mode 100644 index 0000000..ff535d2 --- /dev/null +++ b/device/include/pic/pic16c433.h @@ -0,0 +1,424 @@ +// +// Register Declarations for Microchip 16C433 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C433_H +#define P16C433_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define GPIO_ADDR 0x0005 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define ADRES_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISIO_ADDR 0x0085 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define OSCCAL_ADDR 0x008F +#define ADCON1_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16C433.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C433 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C433 +// 2. LIST directive in the source file +// LIST P=PIC16C433 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 31 Aug 2000 Original Release +//1.10 28 Mar 2001 Corrected definitions of LINTX and LINRX. +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C433 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (GPIO_ADDR) GPIO; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISIO_ADDR) TRISIO; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCAL_ADDR) OSCCAL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- LIN Port bits (within GPIO) ---------------------------------------- + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCAL Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'FF' +// __BADRAM H'06'-H'09', H'0D'-H'1D' +// __BADRAM H'86'-H'89', H'8D', H'90'-H'9E', H'C0'-H'EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3F7F +#define _CP_ALL 0x009F +#define _CP_75 0x15BF +#define _CP_50 0x2ADF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _INTRC_OSC 0x3FFC +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC 0x3FFE +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char :1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char GPIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char GPIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define GPIF INTCON_bits.GPIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define GPIE INTCON_bits.GPIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_GPPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_GPPU OPTION_REG_bits.NOT_GPPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCAL bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char CALSLW:1; + unsigned char CALFST:1; + unsigned char CAL0:1; + unsigned char CAL1:1; + unsigned char CAL2:1; + unsigned char CAL3:1; + }; +} __OSCCAL_bits_t; +extern volatile __OSCCAL_bits_t __at(OSCCAL_ADDR) OSCCAL_bits; + +#ifndef NO_BIT_DEFINES +#define CALSLW OSCCAL_bits.CALSLW +#define CALFST OSCCAL_bits.CALFST +#define CAL0 OSCCAL_bits.CAL0 +#define CAL1 OSCCAL_bits.CAL1 +#define CAL2 OSCCAL_bits.CAL2 +#define CAL3 OSCCAL_bits.CAL3 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char LINRX:1; + unsigned char LINTX:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define LINRX STATUS_bits.LINRX +#define IRP STATUS_bits.IRP +#define LINTX STATUS_bits.LINTX +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c554.h b/device/include/pic/pic16c554.h new file mode 100644 index 0000000..9ccc4f6 --- /dev/null +++ b/device/include/pic/pic16c554.h @@ -0,0 +1,348 @@ +// +// Register Declarations for Microchip 16C554 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C554_H +#define P16C554_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PCON_ADDR 0x008E + +// +// Memory organization. +// + + + +// LIST +// P16C554.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C554 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C554 +// 2. LIST directive in the source file +// LIST P=PIC16C554 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 04/22/96 Initial Creation + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C554 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PCON_ADDR) PCON; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'09F' +// __BADRAM H'07'-H'09', H'0C'-H'1F', H'70'-H'7F' +// __BADRAM H'87'-H'89', H'8C'-H'8D', H'8F'-H'9F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ON 0x00CF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char :1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c557.h b/device/include/pic/pic16c557.h new file mode 100644 index 0000000..033e36f --- /dev/null +++ b/device/include/pic/pic16c557.h @@ -0,0 +1,406 @@ +// +// Register Declarations for Microchip 16C557 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C557_H +#define P16C557_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PCON_ADDR 0x008E + +// +// Memory organization. +// + + + +// LIST +// P16C557.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C557 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /p=16C557 +// 2. LIST directive in the source file +// LIST P=16C557 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 08/29/01 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C557 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (PCON_ADDR) PCON; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'FF' +// __BADRAM H'08'-H'09', H'0C'-H'1F' +// __BADRAM H'88'-H'89', H'8C'-H'8D', H'8F'-H'9F', H'C0'-H'EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x00CF +#define _CP_75 0x15DF +#define _CP_50 0x2AEF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char :1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c558.h b/device/include/pic/pic16c558.h new file mode 100644 index 0000000..a9849a1 --- /dev/null +++ b/device/include/pic/pic16c558.h @@ -0,0 +1,350 @@ +// +// Register Declarations for Microchip 16C558 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C558_H +#define P16C558_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PCON_ADDR 0x008E + +// +// Memory organization. +// + + + +// LIST +// P16C558.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C558 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C558 +// 2. LIST directive in the source file +// LIST P=PIC16C558 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 04/22/96 Initial Creation + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C558 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PCON_ADDR) PCON; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'BF' +// __BADRAM H'07'-H'09', H'0C'-H'1F' +// __BADRAM H'87'-H'89', H'8C'-H'8D', H'8F'-H'9F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x00CF +#define _CP_75 0x15DF +#define _CP_50 0x2AEF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char :1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c62.h b/device/include/pic/pic16c62.h new file mode 100644 index 0000000..c259303 --- /dev/null +++ b/device/include/pic/pic16c62.h @@ -0,0 +1,698 @@ +// +// Register Declarations for Microchip 16C62 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C62_H +#define P16C62_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 + +// +// Memory organization. +// + + + +// LIST +// P16C62.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C62 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C62 +// 2. LIST directive in the source file +// LIST P=PIC16C62 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 10/31/95 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C62 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'BF' +// __BADRAM H'08'-H'09', H'0D', H'18'-H'1F' +// __BADRAM H'88'-H'89', H'8D', H'8F'-H'91',H'95'-H'9F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x3F8F +#define _CP_75 0x3F9F +#define _CP_50 0x3FAF +#define _CP_OFF 0x3FBF +#define _PWRTE_ON 0x3FBF +#define _PWRTE_OFF 0x3FB7 +#define _WDT_ON 0x3FBF +#define _WDT_OFF 0x3FBB +#define _LP_OSC 0x3FBC +#define _XT_OSC 0x3FBD +#define _HS_OSC 0x3FBE +#define _RC_OSC 0x3FBF + +// LIST + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c620.h b/device/include/pic/pic16c620.h new file mode 100644 index 0000000..da50ea5 --- /dev/null +++ b/device/include/pic/pic16c620.h @@ -0,0 +1,471 @@ +// +// Register Declarations for Microchip 16C620 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C620_H +#define P16C620_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define CMCON_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define VRCON_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16C620.INC Standard Header File, Version 1.01 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C620 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C620 +// 2. LIST directive in the source file +// LIST P=PIC16C620 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.01 11/28/95 Added NOT_BOR to match revised datasheet +//1.00 10/31/95 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C620 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (CMCON_ADDR) CMCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (VRCON_ADDR) VRCON; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- CMCON Bits --------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'09F' +// __BADRAM H'07'-H'09', H'0D'-H'1E', H'70'-H'7F' +// __BADRAM H'87'-H'89', H'8D', H'8F'-H'9E' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ON 0x00CF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char :1; + unsigned char :1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CMIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define CMIE PIE1_bits.CMIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define CMIF PIR1_bits.CMIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char VROE:1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VROE VRCON_bits.VROE +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c620a.h b/device/include/pic/pic16c620a.h new file mode 100644 index 0000000..551fca2 --- /dev/null +++ b/device/include/pic/pic16c620a.h @@ -0,0 +1,477 @@ +// +// Register Declarations for Microchip 16CR620A Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16CR620A_H +#define P16CR620A_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define CMCON_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define VRCON_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16C620A.INC Standard Header File, Version 1.10 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C620A and PIC16CR620A microcontrollers. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C620A or +// C:\ MPASM MYFILE.ASM /PIC16CR620A +// 2. LIST directive in the source file +// LIST P=PIC16C620A or +// LIST P=PIC16CR620A +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 05/28/97 Initial Release +//1.10 16/08/99 Added unbanked RAM at 70-7F +//1.20 06/12/02 Verification now includes the PIC16CR620A (pas) + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C620A +// IFNDEF __16CR620A +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (CMCON_ADDR) CMCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (VRCON_ADDR) VRCON; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- CMCON Bits --------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'0FF' +// __BADRAM H'07'-H'09', H'0D'-H'1E' +// __BADRAM H'87'-H'89', H'8D', H'8F'-H'9E' +// __BADRAM H'A0'-H'EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ON 0x00CF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char :1; + unsigned char :1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CMIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define CMIE PIE1_bits.CMIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define CMIF PIR1_bits.CMIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char VROE:1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VROE VRCON_bits.VROE +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c621.h b/device/include/pic/pic16c621.h new file mode 100644 index 0000000..f36a1c5 --- /dev/null +++ b/device/include/pic/pic16c621.h @@ -0,0 +1,472 @@ +// +// Register Declarations for Microchip 16C621 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C621_H +#define P16C621_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define CMCON_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define VRCON_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16C621.INC Standard Header File, Version 1.01 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C621 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C621 +// 2. LIST directive in the source file +// LIST P=PIC16C621 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.01 11/28/95 Added NOT_BOR to match revised datasheet +//1.00 10/31/95 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C621 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (CMCON_ADDR) CMCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (VRCON_ADDR) VRCON; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- CMCON Bits --------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'9F' +// __BADRAM H'07'-H'09', H'0D'-H'01E', H'70'-H'7F' +// __BADRAM H'87'-H'89', H'8D', H'8F'-H'9E' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x00CF +#define _CP_50 0x15DF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char :1; + unsigned char :1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CMIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define CMIE PIE1_bits.CMIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define CMIF PIR1_bits.CMIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char VROE:1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VROE VRCON_bits.VROE +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c621a.h b/device/include/pic/pic16c621a.h new file mode 100644 index 0000000..853b2bf --- /dev/null +++ b/device/include/pic/pic16c621a.h @@ -0,0 +1,473 @@ +// +// Register Declarations for Microchip 16C621A Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C621A_H +#define P16C621A_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define CMCON_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define VRCON_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16C621A.INC Standard Header File, Version 1.10 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C621A microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C621A +// 2. LIST directive in the source file +// LIST P=PIC16C621A +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 05/28/97 Initial Release +//1.10 16/08/99 Added unbanked RAM at 70-7F + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C621A +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (CMCON_ADDR) CMCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (VRCON_ADDR) VRCON; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- CMCON Bits --------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'0FF' +// __BADRAM H'07'-H'09', H'0D'-H'1E' +// __BADRAM H'87'-H'89', H'8D', H'8F'-H'9E' +// __BADRAM H'A0'-H'EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x00CF +#define _CP_50 0x15DF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char :1; + unsigned char :1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CMIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define CMIE PIE1_bits.CMIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define CMIF PIR1_bits.CMIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char VROE:1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VROE VRCON_bits.VROE +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c622.h b/device/include/pic/pic16c622.h new file mode 100644 index 0000000..784ed27 --- /dev/null +++ b/device/include/pic/pic16c622.h @@ -0,0 +1,472 @@ +// +// Register Declarations for Microchip 16C622 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C622_H +#define P16C622_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define CMCON_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define VRCON_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16C622.INC Standard Header File, Version 1.01 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C622 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C622 +// 2. LIST directive in the source file +// LIST P=PIC16C622 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.01 11/28/95 Added NOT_BOR to match revised datasheet +//1.00 10/31/95 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C622 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (CMCON_ADDR) CMCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (VRCON_ADDR) VRCON; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- CMCON Bits --------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'BF' +// __BADRAM H'07'-H'09', H'0D'-H'1E', H'87'-H'89', H'8D', H'8F'-H'9E' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x00CF +#define _CP_75 0x15DF +#define _CP_50 0x2AEF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char :1; + unsigned char :1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CMIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define CMIE PIE1_bits.CMIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define CMIF PIR1_bits.CMIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char VROE:1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VROE VRCON_bits.VROE +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c622a.h b/device/include/pic/pic16c622a.h new file mode 100644 index 0000000..695c5dc --- /dev/null +++ b/device/include/pic/pic16c622a.h @@ -0,0 +1,473 @@ +// +// Register Declarations for Microchip 16C622A Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C622A_H +#define P16C622A_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define CMCON_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define VRCON_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16C622A.INC Standard Header File, Version 1.10 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C622A microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C622A +// 2. LIST directive in the source file +// LIST P=PIC16C622A +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 05/28/97 Initial Release +//1.10 16/08/99 Added unbanked RAM at 70-7F + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C622A +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (CMCON_ADDR) CMCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (VRCON_ADDR) VRCON; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- CMCON Bits --------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'FF' +// __BADRAM H'07'-H'09', H'0D'-H'1E', H'87'-H'89', H'8D', H'8F'-H'9E' +// __BADRAM H'C0'-H'EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x00CF +#define _CP_75 0x15DF +#define _CP_50 0x2AEF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char :1; + unsigned char :1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CMIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define CMIE PIE1_bits.CMIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define CMIF PIR1_bits.CMIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char VROE:1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VROE VRCON_bits.VROE +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c63a.h b/device/include/pic/pic16c63a.h new file mode 100644 index 0000000..f196fe9 --- /dev/null +++ b/device/include/pic/pic16c63a.h @@ -0,0 +1,922 @@ +// +// Register Declarations for Microchip 16C63A Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C63A_H +#define P16C63A_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 + +// +// Memory organization. +// + + + +// LIST +// P16C63A.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C63A microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C63A +// 2. LIST directive in the source file +// LIST P=PIC16C63A +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 12/17/97 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C63A +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'FF' +// __BADRAM H'08'-H'09', H'1E'-H'1F' +// __BADRAM H'88'-H'89', H'8F'-H'91', H'95'-H'97', H'9A'-H'9F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x00CF +#define _CP_75 0x15DF +#define _CP_50 0x2AEF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char :1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char :1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char :1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c65b.h b/device/include/pic/pic16c65b.h new file mode 100644 index 0000000..e53899d --- /dev/null +++ b/device/include/pic/pic16c65b.h @@ -0,0 +1,1032 @@ +// +// Register Declarations for Microchip 16C65B Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C65B_H +#define P16C65B_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 + +// +// Memory organization. +// + + + +// LIST +// P16C65B.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C65B microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C65B +// 2. LIST directive in the source file +// LIST P=PIC16C65B +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 12/17/97 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C65B +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- TRISE Bits --------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'FF' +// __BADRAM H'1E'-H'1F',H'8F'-H'91', H'95'-H'97', H'9A'-H'9F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x00CF +#define _CP_75 0x15DF +#define _CP_50 0x2AEF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char :1; + unsigned char PSPIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define PSPIE PIE1_bits.PSPIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char :1; + unsigned char PSPIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define PSPIF PIR1_bits.PSPIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char :1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char PSPMODE:1; + unsigned char IBOV:1; + unsigned char OBF:1; + unsigned char IBF:1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#define PSPMODE TRISE_bits.PSPMODE +#define IBOV TRISE_bits.IBOV +#define OBF TRISE_bits.OBF +#define IBF TRISE_bits.IBF +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c71.h b/device/include/pic/pic16c71.h new file mode 100644 index 0000000..9786e12 --- /dev/null +++ b/device/include/pic/pic16c71.h @@ -0,0 +1,403 @@ +// +// Register Declarations for Microchip 16C71 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C71_H +#define P16C71_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define ADCON0_ADDR 0x0008 +#define ADRES_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define ADCON1_ADDR 0x0088 + +// +// Memory organization. +// + + + +// LIST +// P16C71.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C71 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C71 +// 2. LIST directive in the source file +// LIST P=PIC16C71 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 10/31/95 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C71 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (ADCON0_ADDR) ADCON0; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'AF' +// __BADRAM H'07', H'30'-H'7F', H'87' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ON 0x3FEF +#define _CP_OFF 0x3FFF +#define _PWRTE_ON 0x3FFF +#define _PWRTE_OFF 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char ADIF:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char :1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define ADIF ADCON0_bits.ADIF +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char ADIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define ADIE INTCON_bits.ADIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c710.h b/device/include/pic/pic16c710.h new file mode 100644 index 0000000..2d6bc35 --- /dev/null +++ b/device/include/pic/pic16c710.h @@ -0,0 +1,441 @@ +// +// Register Declarations for Microchip 16C710 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C710_H +#define P16C710_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define ADCON0_ADDR 0x0008 +#define ADRES_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PCON_ADDR 0x0087 +#define ADCON1_ADDR 0x0088 + +// +// Memory organization. +// + + + +// LIST +// P16C710.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C710 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C710 +// 2. LIST directive in the source file +// LIST P=PIC16C710 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 04/10/96 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C710 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (ADCON0_ADDR) ADCON0; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'AF' +// __BADRAM H'07', H'30'-H'7F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ON 0x004F +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char ADIF:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char :1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define ADIF ADCON0_bits.ADIF +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char ADIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define ADIE INTCON_bits.ADIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c711.h b/device/include/pic/pic16c711.h new file mode 100644 index 0000000..bb8783d --- /dev/null +++ b/device/include/pic/pic16c711.h @@ -0,0 +1,441 @@ +// +// Register Declarations for Microchip 16C711 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C711_H +#define P16C711_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define ADCON0_ADDR 0x0008 +#define ADRES_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PCON_ADDR 0x0087 +#define ADCON1_ADDR 0x0088 + +// +// Memory organization. +// + + + +// LIST +// P16C711.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C711 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C711 +// 2. LIST directive in the source file +// LIST P=PIC16C711 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 04/10/96 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C711 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (ADCON0_ADDR) ADCON0; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'CF' +// __BADRAM H'07', H'50'-H'7F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ON 0x004F +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char ADIF:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char :1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define ADIF ADCON0_bits.ADIF +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char ADIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define ADIE INTCON_bits.ADIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c715.h b/device/include/pic/pic16c715.h new file mode 100644 index 0000000..ec5bee5 --- /dev/null +++ b/device/include/pic/pic16c715.h @@ -0,0 +1,495 @@ +// +// Register Declarations for Microchip 16C715 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C715_H +#define P16C715_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define ADRES_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define ADCON1_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16C715.INC Standard Header File, Version 1.01 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C715 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C715 +// 2. LIST directive in the source file +// LIST P=PIC16C715 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.01 05/12/97 Added values for Parity Enable configuration bits +//1.00 04/11/96 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C715 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'FF' +// __BADRAM H'07'-H'09', H'0D'-H'1D' +// __BADRAM H'87'-H'89', H'8D', H'8F'-H'9E', H'C0'-H'EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _MPEEN_ON 0x3FFF +#define _MPEEN_OFF 0x3F7F +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x00CF +#define _CP_50 0x15DF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char NOT_MPE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define NOT_MPE PCON_bits.NOT_MPE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c717.h b/device/include/pic/pic16c717.h new file mode 100644 index 0000000..f28527f --- /dev/null +++ b/device/include/pic/pic16c717.h @@ -0,0 +1,938 @@ +// +// Register Declarations for Microchip 16C717 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C717_H +#define P16C717_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define WPUB_ADDR 0x0095 +#define IOCB_ADDR 0x0096 +#define P1DEL_ADDR 0x0097 +#define REFCON_ADDR 0x009B +#define LVDCON_ADDR 0x009C +#define ANSEL_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define PMDATL_ADDR 0x010C +#define PMADRL_ADDR 0x010D +#define PMDATH_ADDR 0x010E +#define PMADRH_ADDR 0x010F +#define PMCON1_ADDR 0x018C + +// +// Memory organization. +// + + + +// LIST +// P16C717.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C717 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C717 +// 2. LIST directive in the source file +// LIST P=PIC16C717 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 14Sep1999 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C717 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (WPUB_ADDR) WPUB; +extern __sfr __at (IOCB_ADDR) IOCB; +extern __sfr __at (P1DEL_ADDR) P1DEL; +extern __sfr __at (REFCON_ADDR) REFCON; +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (PMDATL_ADDR) PMDATL; +extern __sfr __at (PMADRL_ADDR) PMADRL; +extern __sfr __at (PMDATH_ADDR) PMDATH; +extern __sfr __at (PMADRH_ADDR) PMADRH; + +extern __sfr __at (PMCON1_ADDR) PMCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ---------------------------------------------------- + + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- REFCON Bits -------------------------------------------------------- + + +//----- LVDCON Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- PMCON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'07'-H'09', H'18'-H'1D' +// __BADRAM H'87'-H'89' +// __BADRAM H'8F'-H'90', H'98'-H'9A' +// __BADRAM H'105', H'107'-H'109', H'110'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18D'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x0CFF +#define _CP_OFF 0x3FFF +#define _VBOR_25 0x3FFF +#define _VBOR_27 0x3BFF +#define _VBOR_42 0x37FF +#define _VBOR_45 0x33FF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _MCLRE_OFF 0x3FDF +#define _MCLRE_ON 0x3FFF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _ER_OSC_CLKOUT 0x3FFF +#define _ER_OSC_NOCLKOUT 0x3FFE +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _EXTCLK_OSC 0x3FFB +#define _HS_OSC 0x3FFA +#define _XT_OSC 0x3FF9 +#define _LP_OSC 0x3FF8 + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char CHS3:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define CHS3 ADCON0_bits.CHS3 +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char VCFG2:1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define VCFG0 ADCON1_bits.VCFG0 +#define VCFG1 ADCON1_bits.VCFG1 +#define VCFG2 ADCON1_bits.VCFG2 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char DC1B0:1; + unsigned char DC1B1:1; + unsigned char PWM1M0:1; + unsigned char PWM1M1:1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define DC1B0 CCP1CON_bits.DC1B0 +#define DC1B1 CCP1CON_bits.DC1B1 +#define PWM1M0 CCP1CON_bits.PWM1M0 +#define PWM1M1 CCP1CON_bits.PWM1M1 +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LV0:1; + unsigned char LV1:1; + unsigned char LV2:1; + unsigned char LV3:1; + unsigned char LVDEN:1; + unsigned char BGST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LV0 LVDCON_bits.LV0 +#define LV1 LVDCON_bits.LV1 +#define LV2 LVDCON_bits.LV2 +#define LV3 LVDCON_bits.LV3 +#define LVDEN LVDCON_bits.LVDEN +#define BGST LVDCON_bits.BGST +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char OSCF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define OSCF PCON_bits.OSCF +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char LVDIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define BCLIE PIE2_bits.BCLIE +#define LVDIE PIE2_bits.LVDIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char LVDIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define BCLIF PIR2_bits.BCLIF +#define LVDIF PIR2_bits.LVDIF +#endif /* NO_BIT_DEFINES */ + +// ----- PMCON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PMCON1_bits_t; +extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD PMCON1_bits.RD +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- REFCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char VRLOEN:1; + unsigned char VRHOEN:1; + unsigned char VRLEN:1; + unsigned char VRHEN:1; + }; +} __REFCON_bits_t; +extern volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits; + +#ifndef NO_BIT_DEFINES +#define VRLOEN REFCON_bits.VRLOEN +#define VRHOEN REFCON_bits.VRHOEN +#define VRLEN REFCON_bits.VRLEN +#define VRHEN REFCON_bits.VRHEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c72.h b/device/include/pic/pic16c72.h new file mode 100644 index 0000000..45ac544 --- /dev/null +++ b/device/include/pic/pic16c72.h @@ -0,0 +1,795 @@ +// +// Register Declarations for Microchip 16C72 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C72_H +#define P16C72_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define ADRES_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define ADCON1_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16C72.INC Standard Header File, Version 1.01 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C72 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C72 +// 2. LIST directive in the source file +// LIST P=PIC16C72 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.01 11/28/95 Added NOT_BOR to match revised datasheet +//1.00 10/31/95 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C72 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'BF' +// __BADRAM H'08'-H'09', H'0D', H'18'-H'1D' +// __BADRAM H'88'-H'89', H'8D', H'8F'-H'91', H'95'-H'9E' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x00CF +#define _CP_75 0x15DF +#define _CP_50 0x2AEF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c73b.h b/device/include/pic/pic16c73b.h new file mode 100644 index 0000000..54ef389 --- /dev/null +++ b/device/include/pic/pic16c73b.h @@ -0,0 +1,1004 @@ +// +// Register Declarations for Microchip 16C73B Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C73B_H +#define P16C73B_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRES_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADCON1_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16C73B.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C73B microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C73B +// 2. LIST directive in the source file +// LIST P=PIC16C73B +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 17/12/97 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C73B +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'FF' +// __BADRAM H'08'-H'09' +// __BADRAM H'88'-H'89', H'8F'-H'91', H'95'-H'97', H'9A'-H'9E' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x00CF +#define _CP_75 0x15DF +#define _CP_50 0x2AEF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char :1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c745.h b/device/include/pic/pic16c745.h new file mode 100644 index 0000000..4c07dca --- /dev/null +++ b/device/include/pic/pic16c745.h @@ -0,0 +1,1100 @@ +// +// Register Declarations for Microchip 16C745 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C745_H +#define P16C745_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRES_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADCON1_ADDR 0x009F +#define UIR_ADDR 0x0190 +#define UIE_ADDR 0x0191 +#define UEIR_ADDR 0x0192 +#define UEIE_ADDR 0x0193 +#define USTAT_ADDR 0x0194 +#define UCTRL_ADDR 0x0195 +#define UADDR_ADDR 0x0196 +#define USWSTAT_ADDR 0x0197 +#define UEP0_ADDR 0x0198 +#define UEP1_ADDR 0x0199 +#define UEP2_ADDR 0x019A +#define BD0OST_ADDR 0x01A0 +#define BD0OBC_ADDR 0x01A1 +#define BD0OAL_ADDR 0x01A2 +#define BD0IST_ADDR 0x01A4 +#define BD0IBC_ADDR 0x01A5 +#define BD0IAL_ADDR 0x01A6 +#define BD1OST_ADDR 0x01A8 +#define BD1OBC_ADDR 0x01A9 +#define BD1OAL_ADDR 0x01AA +#define BD1IST_ADDR 0x01AC +#define BD1IBC_ADDR 0x01AD +#define BD1IAL_ADDR 0x01AE +#define BD2OST_ADDR 0x01B0 +#define BD2OBC_ADDR 0x01B1 +#define BD2OAL_ADDR 0x01B2 +#define BD2IST_ADDR 0x01B4 +#define BD2IBC_ADDR 0x01B5 +#define BD2IAL_ADDR 0x01B6 + +// +// Memory organization. +// + + + +// LIST +// P16C745.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C745 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C745 +// 2. LIST directive in the source file +// LIST P=PIC16C745 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 28 Sep 99 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C745 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADCON1_ADDR) ADCON1; +extern __sfr __at (UIR_ADDR) UIR; +extern __sfr __at (UIE_ADDR) UIE; +extern __sfr __at (UEIR_ADDR) UEIR; +extern __sfr __at (UEIE_ADDR) UEIE; +extern __sfr __at (USTAT_ADDR) USTAT; +extern __sfr __at (UCTRL_ADDR) UCTRL; +extern __sfr __at (UADDR_ADDR) UADDR; +extern __sfr __at (USWSTAT_ADDR) USWSTAT; +extern __sfr __at (UEP0_ADDR) UEP0; +extern __sfr __at (UEP1_ADDR) UEP1; +extern __sfr __at (UEP2_ADDR) UEP2; + +extern __sfr __at (BD0OST_ADDR) BD0OST; +extern __sfr __at (BD0OBC_ADDR) BD0OBC; +extern __sfr __at (BD0OAL_ADDR) BD0OAL; +extern __sfr __at (BD0IST_ADDR) BD0IST; +extern __sfr __at (BD0IBC_ADDR) BD0IBC; +extern __sfr __at (BD0IAL_ADDR) BD0IAL; + +extern __sfr __at (BD1OST_ADDR) BD1OST; +extern __sfr __at (BD1OBC_ADDR) BD1OBC; +extern __sfr __at (BD1OAL_ADDR) BD1OAL; +extern __sfr __at (BD1IST_ADDR) BD1IST; +extern __sfr __at (BD1IBC_ADDR) BD1IBC; +extern __sfr __at (BD1IAL_ADDR) BD1IAL; + +extern __sfr __at (BD2OST_ADDR) BD2OST; +extern __sfr __at (BD2OBC_ADDR) BD2OBC; +extern __sfr __at (BD2OAL_ADDR) BD2OAL; +extern __sfr __at (BD2IST_ADDR) BD2IST; +extern __sfr __at (BD2IBC_ADDR) BD2IBC; +extern __sfr __at (BD2IAL_ADDR) BD2IAL; + + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- UIR/UIE Bits ----------------------------------------------------- + + +//----- UEIR/UEIE Bits ----------------------------------------------------- + + +//----- USTAT Bits --------------------------------------------------------- + + +//----- UCTRL Bits --------------------------------------------------------- + +//----- UEPn Bits --------------------------------------------------------- + + +//----- Buffer descriptor Bits --------------------------------------------- + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'01FF' +// __BADRAM H'8', H'9', H'13', H'14', H'88', H'89', H'8F'-H'91' +// __BADRAM H'93'-H'97', H'9A'-H'9E' +// __BADRAM H'105', H'107'-H'109', H'10C'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18C'-H'18F', H'19B'-H'19F' +// __BADRAM H'1E0'-H'1EF' +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x00CF +#define _CP_75 0x15DF +#define _CP_50 0x2AEF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _HS_OSC 0x3FFC +#define _EC_OSC 0x3FFD +#define _H4_OSC 0x3FFE +#define _E4_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char DC1B0:1; + unsigned char DC1B1:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define DC1B0 CCP1CON_bits.DC1B0 +#define DC1B1 CCP1CON_bits.DC1B1 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char DC2B0:1; + unsigned char DC2B1:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define DC2B0 CCP2CON_bits.DC2B0 +#define DC2B1 CCP2CON_bits.DC2B1 +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char USBIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define USBIE PIE1_bits.USBIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char USBIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define USBIF PIR1_bits.USBIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char :1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- UCTRL bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char SUSPND:1; + unsigned char RESUME:1; + unsigned char DEV_ATT:1; + unsigned char PKT_DIS:1; + unsigned char SE0:1; + unsigned char :1; + unsigned char :1; + }; +} __UCTRL_bits_t; +extern volatile __UCTRL_bits_t __at(UCTRL_ADDR) UCTRL_bits; + +#ifndef NO_BIT_DEFINES +#define SUSPND UCTRL_bits.SUSPND +#define RESUME UCTRL_bits.RESUME +#define DEV_ATT UCTRL_bits.DEV_ATT +#define PKT_DIS UCTRL_bits.PKT_DIS +#define SE0 UCTRL_bits.SE0 +#endif /* NO_BIT_DEFINES */ + +// ----- UEIE bits -------------------- +typedef union { + struct { + unsigned char PID_ERR:1; + unsigned char CRC5:1; + unsigned char CRC16:1; + unsigned char DFN8:1; + unsigned char BTO_ERR:1; + unsigned char WRT_ERR:1; + unsigned char OWN_ERR:1; + unsigned char BTS_ERR:1; + }; +} __UEIE_bits_t; +extern volatile __UEIE_bits_t __at(UEIE_ADDR) UEIE_bits; + +#ifndef NO_BIT_DEFINES +#define PID_ERR UEIE_bits.PID_ERR +#define CRC5 UEIE_bits.CRC5 +#define CRC16 UEIE_bits.CRC16 +#define DFN8 UEIE_bits.DFN8 +#define BTO_ERR UEIE_bits.BTO_ERR +#define WRT_ERR UEIE_bits.WRT_ERR +#define OWN_ERR UEIE_bits.OWN_ERR +#define BTS_ERR UEIE_bits.BTS_ERR +#endif /* NO_BIT_DEFINES */ + +// ----- UEP0 bits -------------------- +typedef union { + struct { + unsigned char EP_STALL:1; + unsigned char EP_IN_EN:1; + unsigned char EP_OUT_EN:1; + unsigned char EP_CTL_DIS:1; + unsigned char PID2:1; + unsigned char PID3:1; + unsigned char DATA01:1; + unsigned char UOWN:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char BSTALL:1; + unsigned char DTS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char OWN:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char PID0:1; + unsigned char PID1:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __UEP0_bits_t; +extern volatile __UEP0_bits_t __at(UEP0_ADDR) UEP0_bits; + +#ifndef NO_BIT_DEFINES +#define EP_STALL UEP0_bits.EP_STALL +#define EP_IN_EN UEP0_bits.EP_IN_EN +#define EP_OUT_EN UEP0_bits.EP_OUT_EN +#define BSTALL UEP0_bits.BSTALL +#define PID0 UEP0_bits.PID0 +#define EP_CTL_DIS UEP0_bits.EP_CTL_DIS +#define DTS UEP0_bits.DTS +#define PID1 UEP0_bits.PID1 +#define PID2 UEP0_bits.PID2 +#define PID3 UEP0_bits.PID3 +#define DATA01 UEP0_bits.DATA01 +#define UOWN UEP0_bits.UOWN +#define OWN UEP0_bits.OWN +#endif /* NO_BIT_DEFINES */ + +// ----- UIE bits -------------------- +typedef union { + struct { + unsigned char USB_RST:1; + unsigned char UERR:1; + unsigned char ACTIVITY:1; + unsigned char TOK_DNE:1; + unsigned char UIDLE:1; + unsigned char STALL:1; + unsigned char :1; + unsigned char :1; + }; +} __UIE_bits_t; +extern volatile __UIE_bits_t __at(UIE_ADDR) UIE_bits; + +#ifndef NO_BIT_DEFINES +#define USB_RST UIE_bits.USB_RST +#define UERR UIE_bits.UERR +#define ACTIVITY UIE_bits.ACTIVITY +#define TOK_DNE UIE_bits.TOK_DNE +#define UIDLE UIE_bits.UIDLE +#define STALL UIE_bits.STALL +#endif /* NO_BIT_DEFINES */ + +// ----- USTAT bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char IN:1; + unsigned char ENDP0:1; + unsigned char ENDP1:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __USTAT_bits_t; +extern volatile __USTAT_bits_t __at(USTAT_ADDR) USTAT_bits; + +#ifndef NO_BIT_DEFINES +#define IN USTAT_bits.IN +#define ENDP0 USTAT_bits.ENDP0 +#define ENDP1 USTAT_bits.ENDP1 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c74b.h b/device/include/pic/pic16c74b.h new file mode 100644 index 0000000..161e70a --- /dev/null +++ b/device/include/pic/pic16c74b.h @@ -0,0 +1,1114 @@ +// +// Register Declarations for Microchip 16C74B Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C74B_H +#define P16C74B_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRES_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADCON1_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16C74B.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C74B microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C74B +// 2. LIST directive in the source file +// LIST P=PIC16C74B +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 12/17/97 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C74B +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- TRISE Bits --------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'FF' +// __BADRAM H'8F'-H'91', H'95'-H'97', H'9A'-H'9E' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x00CF +#define _CP_75 0x15DF +#define _CP_50 0x2AEF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char PSPIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define PSPIE PIE1_bits.PSPIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char PSPIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define PSPIF PIR1_bits.PSPIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char :1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char PSPMODE:1; + unsigned char IBOV:1; + unsigned char OBF:1; + unsigned char IBF:1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#define PSPMODE TRISE_bits.PSPMODE +#define IBOV TRISE_bits.IBOV +#define OBF TRISE_bits.OBF +#define IBF TRISE_bits.IBF +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c765.h b/device/include/pic/pic16c765.h new file mode 100644 index 0000000..c33d076 --- /dev/null +++ b/device/include/pic/pic16c765.h @@ -0,0 +1,1210 @@ +// +// Register Declarations for Microchip 16C765 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C765_H +#define P16C765_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRES_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADCON1_ADDR 0x009F +#define UIR_ADDR 0x0190 +#define UIE_ADDR 0x0191 +#define UEIR_ADDR 0x0192 +#define UEIE_ADDR 0x0193 +#define USTAT_ADDR 0x0194 +#define UCTRL_ADDR 0x0195 +#define UADDR_ADDR 0x0196 +#define USWSTAT_ADDR 0x0197 +#define UEP0_ADDR 0x0198 +#define UEP1_ADDR 0x0199 +#define UEP2_ADDR 0x019A +#define BD0OST_ADDR 0x01A0 +#define BD0OBC_ADDR 0x01A1 +#define BD0OAL_ADDR 0x01A2 +#define BD0IST_ADDR 0x01A4 +#define BD0IBC_ADDR 0x01A5 +#define BD0IAL_ADDR 0x01A6 +#define BD1OST_ADDR 0x01A8 +#define BD1OBC_ADDR 0x01A9 +#define BD1OAL_ADDR 0x01AA +#define BD1IST_ADDR 0x01AC +#define BD1IBC_ADDR 0x01AD +#define BD1IAL_ADDR 0x01AE +#define BD2OST_ADDR 0x01B0 +#define BD2OBC_ADDR 0x01B1 +#define BD2OAL_ADDR 0x01B2 +#define BD2IST_ADDR 0x01B4 +#define BD2IBC_ADDR 0x01B5 +#define BD2IAL_ADDR 0x01B6 + +// +// Memory organization. +// + + + +// LIST +// P16C765.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C765 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C765 +// 2. LIST directive in the source file +// LIST P=PIC16C765 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 28 Sep 99 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C765 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADCON1_ADDR) ADCON1; +extern __sfr __at (UIR_ADDR) UIR; +extern __sfr __at (UIE_ADDR) UIE; +extern __sfr __at (UEIR_ADDR) UEIR; +extern __sfr __at (UEIE_ADDR) UEIE; +extern __sfr __at (USTAT_ADDR) USTAT; +extern __sfr __at (UCTRL_ADDR) UCTRL; +extern __sfr __at (UADDR_ADDR) UADDR; +extern __sfr __at (USWSTAT_ADDR) USWSTAT; +extern __sfr __at (UEP0_ADDR) UEP0; +extern __sfr __at (UEP1_ADDR) UEP1; +extern __sfr __at (UEP2_ADDR) UEP2; + +extern __sfr __at (BD0OST_ADDR) BD0OST; +extern __sfr __at (BD0OBC_ADDR) BD0OBC; +extern __sfr __at (BD0OAL_ADDR) BD0OAL; +extern __sfr __at (BD0IST_ADDR) BD0IST; +extern __sfr __at (BD0IBC_ADDR) BD0IBC; +extern __sfr __at (BD0IAL_ADDR) BD0IAL; + +extern __sfr __at (BD1OST_ADDR) BD1OST; +extern __sfr __at (BD1OBC_ADDR) BD1OBC; +extern __sfr __at (BD1OAL_ADDR) BD1OAL; +extern __sfr __at (BD1IST_ADDR) BD1IST; +extern __sfr __at (BD1IBC_ADDR) BD1IBC; +extern __sfr __at (BD1IAL_ADDR) BD1IAL; + +extern __sfr __at (BD2OST_ADDR) BD2OST; +extern __sfr __at (BD2OBC_ADDR) BD2OBC; +extern __sfr __at (BD2OAL_ADDR) BD2OAL; +extern __sfr __at (BD2IST_ADDR) BD2IST; +extern __sfr __at (BD2IBC_ADDR) BD2IBC; +extern __sfr __at (BD2IAL_ADDR) BD2IAL; + + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- TRISE Bits --------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- UIR/UIE Bits ----------------------------------------------------- + + +//----- UEIR/UEIE Bits ----------------------------------------------------- + + +//----- USTAT Bits --------------------------------------------------------- + + +//----- UCTRL Bits --------------------------------------------------------- + +//----- UEPn Bits --------------------------------------------------------- + + +//----- Buffer descriptor Bits --------------------------------------------- + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'01FF' +// __BADRAM H'13', H'14', H'8F'-H'91' +// __BADRAM H'93'-H'97', H'9A'-H'9E' +// __BADRAM H'105', H'107'-H'109', H'10C'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18C'-H'18F', H'19B'-H'19F' +// __BADRAM H'1E0'-H'1EF' +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x00CF +#define _CP_75 0x15DF +#define _CP_50 0x2AEF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _HS_OSC 0x3FFC +#define _EC_OSC 0x3FFD +#define _H4_OSC 0x3FFE +#define _E4_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char DC1B0:1; + unsigned char DC1B1:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define DC1B0 CCP1CON_bits.DC1B0 +#define DC1B1 CCP1CON_bits.DC1B1 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char DC2B0:1; + unsigned char DC2B1:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define DC2B0 CCP2CON_bits.DC2B0 +#define DC2B1 CCP2CON_bits.DC2B1 +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char USBIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char PSPIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define USBIE PIE1_bits.USBIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define PSPIE PIE1_bits.PSPIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char USBIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char PSPIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define USBIF PIR1_bits.USBIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define PSPIF PIR1_bits.PSPIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char :1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char PSPMODE:1; + unsigned char IBOV:1; + unsigned char OBF:1; + unsigned char IBF:1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#define PSPMODE TRISE_bits.PSPMODE +#define IBOV TRISE_bits.IBOV +#define OBF TRISE_bits.OBF +#define IBF TRISE_bits.IBF +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- UCTRL bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char SUSPND:1; + unsigned char RESUME:1; + unsigned char DEV_ATT:1; + unsigned char PKT_DIS:1; + unsigned char SE0:1; + unsigned char :1; + unsigned char :1; + }; +} __UCTRL_bits_t; +extern volatile __UCTRL_bits_t __at(UCTRL_ADDR) UCTRL_bits; + +#ifndef NO_BIT_DEFINES +#define SUSPND UCTRL_bits.SUSPND +#define RESUME UCTRL_bits.RESUME +#define DEV_ATT UCTRL_bits.DEV_ATT +#define PKT_DIS UCTRL_bits.PKT_DIS +#define SE0 UCTRL_bits.SE0 +#endif /* NO_BIT_DEFINES */ + +// ----- UEIE bits -------------------- +typedef union { + struct { + unsigned char PID_ERR:1; + unsigned char CRC5:1; + unsigned char CRC16:1; + unsigned char DFN8:1; + unsigned char BTO_ERR:1; + unsigned char WRT_ERR:1; + unsigned char OWN_ERR:1; + unsigned char BTS_ERR:1; + }; +} __UEIE_bits_t; +extern volatile __UEIE_bits_t __at(UEIE_ADDR) UEIE_bits; + +#ifndef NO_BIT_DEFINES +#define PID_ERR UEIE_bits.PID_ERR +#define CRC5 UEIE_bits.CRC5 +#define CRC16 UEIE_bits.CRC16 +#define DFN8 UEIE_bits.DFN8 +#define BTO_ERR UEIE_bits.BTO_ERR +#define WRT_ERR UEIE_bits.WRT_ERR +#define OWN_ERR UEIE_bits.OWN_ERR +#define BTS_ERR UEIE_bits.BTS_ERR +#endif /* NO_BIT_DEFINES */ + +// ----- UEP0 bits -------------------- +typedef union { + struct { + unsigned char EP_STALL:1; + unsigned char EP_IN_EN:1; + unsigned char EP_OUT_EN:1; + unsigned char EP_CTL_DIS:1; + unsigned char PID2:1; + unsigned char PID3:1; + unsigned char DATA01:1; + unsigned char UOWN:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char BSTALL:1; + unsigned char DTS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char OWN:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char PID0:1; + unsigned char PID1:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __UEP0_bits_t; +extern volatile __UEP0_bits_t __at(UEP0_ADDR) UEP0_bits; + +#ifndef NO_BIT_DEFINES +#define EP_STALL UEP0_bits.EP_STALL +#define EP_IN_EN UEP0_bits.EP_IN_EN +#define EP_OUT_EN UEP0_bits.EP_OUT_EN +#define BSTALL UEP0_bits.BSTALL +#define PID0 UEP0_bits.PID0 +#define EP_CTL_DIS UEP0_bits.EP_CTL_DIS +#define DTS UEP0_bits.DTS +#define PID1 UEP0_bits.PID1 +#define PID2 UEP0_bits.PID2 +#define PID3 UEP0_bits.PID3 +#define DATA01 UEP0_bits.DATA01 +#define UOWN UEP0_bits.UOWN +#define OWN UEP0_bits.OWN +#endif /* NO_BIT_DEFINES */ + +// ----- UIE bits -------------------- +typedef union { + struct { + unsigned char USB_RST:1; + unsigned char UERR:1; + unsigned char ACTIVITY:1; + unsigned char TOK_DNE:1; + unsigned char UIDLE:1; + unsigned char STALL:1; + unsigned char :1; + unsigned char :1; + }; +} __UIE_bits_t; +extern volatile __UIE_bits_t __at(UIE_ADDR) UIE_bits; + +#ifndef NO_BIT_DEFINES +#define USB_RST UIE_bits.USB_RST +#define UERR UIE_bits.UERR +#define ACTIVITY UIE_bits.ACTIVITY +#define TOK_DNE UIE_bits.TOK_DNE +#define UIDLE UIE_bits.UIDLE +#define STALL UIE_bits.STALL +#endif /* NO_BIT_DEFINES */ + +// ----- USTAT bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char IN:1; + unsigned char ENDP0:1; + unsigned char ENDP1:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __USTAT_bits_t; +extern volatile __USTAT_bits_t __at(USTAT_ADDR) USTAT_bits; + +#ifndef NO_BIT_DEFINES +#define IN USTAT_bits.IN +#define ENDP0 USTAT_bits.ENDP0 +#define ENDP1 USTAT_bits.ENDP1 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c770.h b/device/include/pic/pic16c770.h new file mode 100644 index 0000000..cf295a6 --- /dev/null +++ b/device/include/pic/pic16c770.h @@ -0,0 +1,938 @@ +// +// Register Declarations for Microchip 16C770 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C770_H +#define P16C770_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define WPUB_ADDR 0x0095 +#define IOCB_ADDR 0x0096 +#define P1DEL_ADDR 0x0097 +#define REFCON_ADDR 0x009B +#define LVDCON_ADDR 0x009C +#define ANSEL_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define PMDATL_ADDR 0x010C +#define PMADRL_ADDR 0x010D +#define PMDATH_ADDR 0x010E +#define PMADRH_ADDR 0x010F +#define PMCON1_ADDR 0x018C + +// +// Memory organization. +// + + + +// LIST +// P16C770.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C770 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C770 +// 2. LIST directive in the source file +// LIST P=PIC16C770 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 14Sep1999 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C770 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (WPUB_ADDR) WPUB; +extern __sfr __at (IOCB_ADDR) IOCB; +extern __sfr __at (P1DEL_ADDR) P1DEL; +extern __sfr __at (REFCON_ADDR) REFCON; +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (PMDATL_ADDR) PMDATL; +extern __sfr __at (PMADRL_ADDR) PMADRL; +extern __sfr __at (PMDATH_ADDR) PMDATH; +extern __sfr __at (PMADRH_ADDR) PMADRH; + +extern __sfr __at (PMCON1_ADDR) PMCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ---------------------------------------------------- + + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- REFCON Bits -------------------------------------------------------- + + +//----- LVDCON Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- PMCON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'07'-H'09', H'18'-H'1D' +// __BADRAM H'87'-H'89' +// __BADRAM H'8F'-H'90', H'98'-H'9A' +// __BADRAM H'105', H'107'-H'109', H'110'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18D'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x0CFF +#define _CP_OFF 0x3FFF +#define _VBOR_25 0x3FFF +#define _VBOR_27 0x3BFF +#define _VBOR_42 0x37FF +#define _VBOR_45 0x33FF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _MCLRE_OFF 0x3FDF +#define _MCLRE_ON 0x3FFF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _ER_OSC_CLKOUT 0x3FFF +#define _ER_OSC_NOCLKOUT 0x3FFE +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _EXTCLK_OSC 0x3FFB +#define _HS_OSC 0x3FFA +#define _XT_OSC 0x3FF9 +#define _LP_OSC 0x3FF8 + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char CHS3:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define CHS3 ADCON0_bits.CHS3 +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char VCFG2:1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define VCFG0 ADCON1_bits.VCFG0 +#define VCFG1 ADCON1_bits.VCFG1 +#define VCFG2 ADCON1_bits.VCFG2 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char DC1B0:1; + unsigned char DC1B1:1; + unsigned char PWM1M0:1; + unsigned char PWM1M1:1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define DC1B0 CCP1CON_bits.DC1B0 +#define DC1B1 CCP1CON_bits.DC1B1 +#define PWM1M0 CCP1CON_bits.PWM1M0 +#define PWM1M1 CCP1CON_bits.PWM1M1 +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LV0:1; + unsigned char LV1:1; + unsigned char LV2:1; + unsigned char LV3:1; + unsigned char LVDEN:1; + unsigned char BGST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LV0 LVDCON_bits.LV0 +#define LV1 LVDCON_bits.LV1 +#define LV2 LVDCON_bits.LV2 +#define LV3 LVDCON_bits.LV3 +#define LVDEN LVDCON_bits.LVDEN +#define BGST LVDCON_bits.BGST +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char OSCF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define OSCF PCON_bits.OSCF +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char LVDIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define BCLIE PIE2_bits.BCLIE +#define LVDIE PIE2_bits.LVDIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char LVDIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define BCLIF PIR2_bits.BCLIF +#define LVDIF PIR2_bits.LVDIF +#endif /* NO_BIT_DEFINES */ + +// ----- PMCON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PMCON1_bits_t; +extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD PMCON1_bits.RD +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- REFCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char VRLOEN:1; + unsigned char VRHOEN:1; + unsigned char VRLEN:1; + unsigned char VRHEN:1; + }; +} __REFCON_bits_t; +extern volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits; + +#ifndef NO_BIT_DEFINES +#define VRLOEN REFCON_bits.VRLOEN +#define VRHOEN REFCON_bits.VRHOEN +#define VRLEN REFCON_bits.VRLEN +#define VRHEN REFCON_bits.VRHEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c771.h b/device/include/pic/pic16c771.h new file mode 100644 index 0000000..759e9e3 --- /dev/null +++ b/device/include/pic/pic16c771.h @@ -0,0 +1,938 @@ +// +// Register Declarations for Microchip 16C771 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C771_H +#define P16C771_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define WPUB_ADDR 0x0095 +#define IOCB_ADDR 0x0096 +#define P1DEL_ADDR 0x0097 +#define REFCON_ADDR 0x009B +#define LVDCON_ADDR 0x009C +#define ANSEL_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define PMDATL_ADDR 0x010C +#define PMADRL_ADDR 0x010D +#define PMDATH_ADDR 0x010E +#define PMADRH_ADDR 0x010F +#define PMCON1_ADDR 0x018C + +// +// Memory organization. +// + + + +// LIST +// P16C771.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C771 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C771 +// 2. LIST directive in the source file +// LIST P=PIC16C771 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 14Sep1999 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C771 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (WPUB_ADDR) WPUB; +extern __sfr __at (IOCB_ADDR) IOCB; +extern __sfr __at (P1DEL_ADDR) P1DEL; +extern __sfr __at (REFCON_ADDR) REFCON; +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (PMDATL_ADDR) PMDATL; +extern __sfr __at (PMADRL_ADDR) PMADRL; +extern __sfr __at (PMDATH_ADDR) PMDATH; +extern __sfr __at (PMADRH_ADDR) PMADRH; + +extern __sfr __at (PMCON1_ADDR) PMCON1; +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ---------------------------------------------------- + + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- REFCON Bits -------------------------------------------------------- + + +//----- LVDCON Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- PMCON1 Bits -------------------------------------------------------- + + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'07'-H'09', H'18'-H'1D' +// __BADRAM H'87'-H'89' +// __BADRAM H'8F'-H'90', H'98'-H'9A' +// __BADRAM H'105', H'107'-H'109', H'110'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18D'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x0CFF +#define _CP_OFF 0x3FFF +#define _VBOR_25 0x3FFF +#define _VBOR_27 0x3BFF +#define _VBOR_42 0x37FF +#define _VBOR_45 0x33FF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _MCLRE_OFF 0x3FDF +#define _MCLRE_ON 0x3FFF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _ER_OSC_CLKOUT 0x3FFF +#define _ER_OSC_NOCLKOUT 0x3FFE +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _EXTCLK_OSC 0x3FFB +#define _HS_OSC 0x3FFA +#define _XT_OSC 0x3FF9 +#define _LP_OSC 0x3FF8 + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char CHS3:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define CHS3 ADCON0_bits.CHS3 +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char VCFG2:1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define VCFG0 ADCON1_bits.VCFG0 +#define VCFG1 ADCON1_bits.VCFG1 +#define VCFG2 ADCON1_bits.VCFG2 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char DC1B0:1; + unsigned char DC1B1:1; + unsigned char PWM1M0:1; + unsigned char PWM1M1:1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define DC1B0 CCP1CON_bits.DC1B0 +#define DC1B1 CCP1CON_bits.DC1B1 +#define PWM1M0 CCP1CON_bits.PWM1M0 +#define PWM1M1 CCP1CON_bits.PWM1M1 +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LV0:1; + unsigned char LV1:1; + unsigned char LV2:1; + unsigned char LV3:1; + unsigned char LVDEN:1; + unsigned char BGST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LV0 LVDCON_bits.LV0 +#define LV1 LVDCON_bits.LV1 +#define LV2 LVDCON_bits.LV2 +#define LV3 LVDCON_bits.LV3 +#define LVDEN LVDCON_bits.LVDEN +#define BGST LVDCON_bits.BGST +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char OSCF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define OSCF PCON_bits.OSCF +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char LVDIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define BCLIE PIE2_bits.BCLIE +#define LVDIE PIE2_bits.LVDIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char LVDIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define BCLIF PIR2_bits.BCLIF +#define LVDIF PIR2_bits.LVDIF +#endif /* NO_BIT_DEFINES */ + +// ----- PMCON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PMCON1_bits_t; +extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD PMCON1_bits.RD +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- REFCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char VRLOEN:1; + unsigned char VRHOEN:1; + unsigned char VRLEN:1; + unsigned char VRHEN:1; + }; +} __REFCON_bits_t; +extern volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits; + +#ifndef NO_BIT_DEFINES +#define VRLOEN REFCON_bits.VRLOEN +#define VRHOEN REFCON_bits.VRHOEN +#define VRLEN REFCON_bits.VRLEN +#define VRHEN REFCON_bits.VRHEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c773.h b/device/include/pic/pic16c773.h new file mode 100644 index 0000000..4ccef98 --- /dev/null +++ b/device/include/pic/pic16c773.h @@ -0,0 +1,1122 @@ +// +// Register Declarations for Microchip 16C773 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C773_H +#define P16C773_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define REFCON_ADDR 0x009B +#define LVDCON_ADDR 0x009C +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16C773.INC Standard Header File, Version 1.01 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C773 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C773 +// 2. LIST directive in the source file +// LIST P=PIC16C773 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 08/07/98 Initial Release +//1.01 25Jan99 Fixed LVVx bits + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C773 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (REFCON_ADDR) REFCON; +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ---------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- REFCON Bits -------------------------------------------------------- + + +//----- LVDCON Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'08'-H'09' +// __BADRAM H'88'-H'89', H'8F'-H'90', H'95'-H'97', H'9A', H'9D' +// __BADRAM H'105', H'107'-H'109', H'10C'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18C'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x0CCF +#define _CP_75 0x1DDF +#define _CP_50 0x2EEF +#define _CP_OFF 0x3FFF +#define _VBOR_25 0x3FFF +#define _VBOR_27 0x3BFF +#define _VBOR_42 0x37FF +#define _VBOR_45 0x33FF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char CHS3:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define CHS3 ADCON0_bits.CHS3 +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char VCFG2:1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define VCFG0 ADCON1_bits.VCFG0 +#define VCFG1 ADCON1_bits.VCFG1 +#define VCFG2 ADCON1_bits.VCFG2 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LV0:1; + unsigned char LV1:1; + unsigned char LV2:1; + unsigned char LV3:1; + unsigned char LVDEN:1; + unsigned char BGST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LV0 LVDCON_bits.LV0 +#define LV1 LVDCON_bits.LV1 +#define LV2 LVDCON_bits.LV2 +#define LV3 LVDCON_bits.LV3 +#define LVDEN LVDCON_bits.LVDEN +#define BGST LVDCON_bits.BGST +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char LVDIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define BCLIE PIE2_bits.BCLIE +#define LVDIE PIE2_bits.LVDIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char LVDIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define BCLIF PIR2_bits.BCLIF +#define LVDIF PIR2_bits.LVDIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- REFCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char VRLOEN:1; + unsigned char VRHOEN:1; + unsigned char VRLEN:1; + unsigned char VRHEN:1; + }; +} __REFCON_bits_t; +extern volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits; + +#ifndef NO_BIT_DEFINES +#define VRLOEN REFCON_bits.VRLOEN +#define VRHOEN REFCON_bits.VRHOEN +#define VRLEN REFCON_bits.VRLEN +#define VRHEN REFCON_bits.VRHEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c774.h b/device/include/pic/pic16c774.h new file mode 100644 index 0000000..59630df --- /dev/null +++ b/device/include/pic/pic16c774.h @@ -0,0 +1,1230 @@ +// +// Register Declarations for Microchip 16C774 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C774_H +#define P16C774_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define REFCON_ADDR 0x009B +#define LVDCON_ADDR 0x009C +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16C774.INC Standard Header File, Version 1.01 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C774 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C774 +// 2. LIST directive in the source file +// LIST P=PIC16C774 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 08/07/98 Initial Release +//1.01 25Jan99 Fixed LVVx bits + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C774 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (REFCON_ADDR) REFCON; +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ---------------------------------------------------- + + +//----- TRISE Bits --------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- REFCON Bits -------------------------------------------------------- + + +//----- LVDCON Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'8F'-H'90', H'95'-H'97', H'9A', H'9D' +// __BADRAM H'105', H'107'-H'109', H'10C'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18C'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x0CCF +#define _CP_75 0x1DDF +#define _CP_50 0x2EEF +#define _CP_OFF 0x3FFF +#define _VBOR_25 0x3FFF +#define _VBOR_27 0x3BFF +#define _VBOR_42 0x37FF +#define _VBOR_45 0x33FF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char CHS3:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define CHS3 ADCON0_bits.CHS3 +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char VCFG2:1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define VCFG0 ADCON1_bits.VCFG0 +#define VCFG1 ADCON1_bits.VCFG1 +#define VCFG2 ADCON1_bits.VCFG2 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LV0:1; + unsigned char LV1:1; + unsigned char LV2:1; + unsigned char LV3:1; + unsigned char LVDEN:1; + unsigned char BGST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LV0 LVDCON_bits.LV0 +#define LV1 LVDCON_bits.LV1 +#define LV2 LVDCON_bits.LV2 +#define LV3 LVDCON_bits.LV3 +#define LVDEN LVDCON_bits.LVDEN +#define BGST LVDCON_bits.BGST +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char LVDIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define BCLIE PIE2_bits.BCLIE +#define LVDIE PIE2_bits.LVDIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char LVDIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define BCLIF PIR2_bits.BCLIF +#define LVDIF PIR2_bits.LVDIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- REFCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char VRLOEN:1; + unsigned char VRHOEN:1; + unsigned char VRLEN:1; + unsigned char VRHEN:1; + }; +} __REFCON_bits_t; +extern volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits; + +#ifndef NO_BIT_DEFINES +#define VRLOEN REFCON_bits.VRLOEN +#define VRHOEN REFCON_bits.VRHOEN +#define VRLEN REFCON_bits.VRLEN +#define VRHEN REFCON_bits.VRHEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char PSPMODE:1; + unsigned char IBOV:1; + unsigned char OBF:1; + unsigned char IBF:1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#define PSPMODE TRISE_bits.PSPMODE +#define IBOV TRISE_bits.IBOV +#define OBF TRISE_bits.OBF +#define IBF TRISE_bits.IBF +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c781.h b/device/include/pic/pic16c781.h new file mode 100644 index 0000000..6717596 --- /dev/null +++ b/device/include/pic/pic16c781.h @@ -0,0 +1,906 @@ +// +// Register Declarations for Microchip 16C781 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C781_H +#define P16C781_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define ADRES_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define WPUB_ADDR 0x0095 +#define IOCB_ADDR 0x0096 +#define REFCON_ADDR 0x009B +#define LVDCON_ADDR 0x009C +#define ANSEL_ADDR 0x009D +#define ADCON1_ADDR 0x009F +#define PMDATL_ADDR 0x010C +#define PMADRL_ADDR 0x010D +#define PMDATH_ADDR 0x010E +#define PMADRH_ADDR 0x010F +#define CALCON_ADDR 0x0110 +#define PSMCCON0_ADDR 0x0111 +#define PSMCCON1_ADDR 0x0112 +#define CM1CON0_ADDR 0x0119 +#define CM2CON0_ADDR 0x011A +#define CM2CON1_ADDR 0x011B +#define OPACON_ADDR 0x011C +#define DAC_ADDR 0x011E +#define DACON0_ADDR 0x011F +#define PMCON1_ADDR 0x018C + +// +// Memory organization. +// + + + +// LIST +// P16C782.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C782 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C782 +// 2. LIST directive in the source file +// LIST P=PIC16C782 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 16May2001 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C781 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (WPUB_ADDR) WPUB; +extern __sfr __at (IOCB_ADDR) IOCB; +extern __sfr __at (REFCON_ADDR) REFCON; +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (PMDATL_ADDR) PMDATL; +extern __sfr __at (PMADRL_ADDR) PMADRL; +extern __sfr __at (PMDATH_ADDR) PMDATH; +extern __sfr __at (PMADRH_ADDR) PMADRH; +extern __sfr __at (CALCON_ADDR) CALCON; +extern __sfr __at (PSMCCON0_ADDR) PSMCCON0; +extern __sfr __at (PSMCCON1_ADDR) PSMCCON1; +extern __sfr __at (CM1CON0_ADDR) CM1CON0; +extern __sfr __at (CM2CON0_ADDR) CM2CON0; +extern __sfr __at (CM2CON1_ADDR) CM2CON1; +extern __sfr __at (OPACON_ADDR) OPACON; +extern __sfr __at (DAC_ADDR) DAC; +extern __sfr __at (DACON0_ADDR) DACON0; + +extern __sfr __at (PMCON1_ADDR) PMCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ---------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- REFCON Bits -------------------------------------------------------- + + +//----- LVDCON Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- CALCON Bits -------------------------------------------------------- + + +//----- PSMCCON0 Bits ------------------------------------------------------ + + +//----- PSMCCON1 Bits ------------------------------------------------------ + + +//----- CM1CON0 Bits ------------------------------------------------------ + + +//----- CM2CON0 Bits ------------------------------------------------------ + + +//----- CM2CON1 Bits ------------------------------------------------------ + + +//----- OPACON Bits ------------------------------------------------------- + + +//----- DACON Bits -------------------------------------------------------- + + +//----- PMCON1 Bits ------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'07'-H'09', H'0D', H'11'-H'1D' +// __BADRAM H'87'-H'89', H'8D' +// __BADRAM H'8F'-H'94', H'97'-H'9A', H'9E', H'C0'-H'EF' +// __BADRAM H'105', H'107'-H'109', H'113'-H'118' +// __BADRAM H'11D', H'120'-H'16F' +// __BADRAM H'185', H'187'-H'189', H'18D'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x0CFF +#define _CP_OFF 0x3FFF +#define _VBOR_25 0x3FFF +#define _VBOR_27 0x3BFF +#define _VBOR_42 0x37FF +#define _VBOR_45 0x33FF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _MCLRE_OFF 0x3FDF +#define _MCLRE_ON 0x3FFF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _ER_OSC_CLKOUT 0x3FFF +#define _ER_OSC_NOCLKOUT 0x3FFE +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _EXTCLK_OSC 0x3FFB +#define _HS_OSC 0x3FFA +#define _XT_OSC 0x3FF9 +#define _LP_OSC 0x3FF8 + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char CHS3:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define CHS3 ADCON0_bits.CHS3 +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define VCFG0 ADCON1_bits.VCFG0 +#define VCFG1 ADCON1_bits.VCFG1 +#endif /* NO_BIT_DEFINES */ + +// ----- CALCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CALREF:1; + unsigned char CALERR:1; + unsigned char CAL:1; + }; +} __CALCON_bits_t; +extern volatile __CALCON_bits_t __at(CALCON_ADDR) CALCON_bits; + +#ifndef NO_BIT_DEFINES +#define CALREF CALCON_bits.CALREF +#define CALERR CALCON_bits.CALERR +#define CAL CALCON_bits.CAL +#endif /* NO_BIT_DEFINES */ + +// ----- CM1CON0 bits -------------------- +typedef union { + struct { + unsigned char C1CH0:1; + unsigned char C1CH1:1; + unsigned char C1R:1; + unsigned char C1SP:1; + unsigned char C1POL:1; + unsigned char C1OE:1; + unsigned char C1OUT:1; + unsigned char C1ON:1; + }; +} __CM1CON0_bits_t; +extern volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C1CH0 CM1CON0_bits.C1CH0 +#define C1CH1 CM1CON0_bits.C1CH1 +#define C1R CM1CON0_bits.C1R +#define C1SP CM1CON0_bits.C1SP +#define C1POL CM1CON0_bits.C1POL +#define C1OE CM1CON0_bits.C1OE +#define C1OUT CM1CON0_bits.C1OUT +#define C1ON CM1CON0_bits.C1ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON0 bits -------------------- +typedef union { + struct { + unsigned char C2CH0:1; + unsigned char C2CH1:1; + unsigned char C2R:1; + unsigned char C2SP:1; + unsigned char C2POL:1; + unsigned char C2OE:1; + unsigned char C2OUT:1; + unsigned char C2ON:1; + }; +} __CM2CON0_bits_t; +extern volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C2CH0 CM2CON0_bits.C2CH0 +#define C2CH1 CM2CON0_bits.C2CH1 +#define C2R CM2CON0_bits.C2R +#define C2SP CM2CON0_bits.C2SP +#define C2POL CM2CON0_bits.C2POL +#define C2OE CM2CON0_bits.C2OE +#define C2OUT CM2CON0_bits.C2OUT +#define C2ON CM2CON0_bits.C2ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char MC2OUT:1; + unsigned char MC1OUT:1; + }; +} __CM2CON1_bits_t; +extern volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CM2CON1_bits.C2SYNC +#define MC2OUT CM2CON1_bits.MC2OUT +#define MC1OUT CM2CON1_bits.MC1OUT +#endif /* NO_BIT_DEFINES */ + +// ----- DACON0 bits -------------------- +typedef union { + struct { + unsigned char DARS0:1; + unsigned char DARS1:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char DAOE:1; + unsigned char DAON:1; + }; +} __DACON0_bits_t; +extern volatile __DACON0_bits_t __at(DACON0_ADDR) DACON0_bits; + +#ifndef NO_BIT_DEFINES +#define DARS0 DACON0_bits.DARS0 +#define DARS1 DACON0_bits.DARS1 +#define DAOE DACON0_bits.DAOE +#define DAON DACON0_bits.DAON +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LV0:1; + unsigned char LV1:1; + unsigned char LV2:1; + unsigned char LV3:1; + unsigned char LVDEN:1; + unsigned char BGST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LV0 LVDCON_bits.LV0 +#define LV1 LVDCON_bits.LV1 +#define LV2 LVDCON_bits.LV2 +#define LV3 LVDCON_bits.LV3 +#define LVDEN LVDCON_bits.LVDEN +#define BGST LVDCON_bits.BGST +#endif /* NO_BIT_DEFINES */ + +// ----- OPACON bits -------------------- +typedef union { + struct { + unsigned char GBWP:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CMPEN:1; + unsigned char OPAON:1; + }; +} __OPACON_bits_t; +extern volatile __OPACON_bits_t __at(OPACON_ADDR) OPACON_bits; + +#ifndef NO_BIT_DEFINES +#define GBWP OPACON_bits.GBWP +#define CMPEN OPACON_bits.CMPEN +#define OPAON OPACON_bits.OPAON +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char OSCF:1; + unsigned char WDTON:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define OSCF PCON_bits.OSCF +#define WDTON PCON_bits.WDTON +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char ADIE:1; + unsigned char LVDIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define C1IE PIE1_bits.C1IE +#define C2IE PIE1_bits.C2IE +#define ADIE PIE1_bits.ADIE +#define LVDIE PIE1_bits.LVDIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char ADIF:1; + unsigned char LVDIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define C1IF PIR1_bits.C1IF +#define C2IF PIR1_bits.C2IF +#define ADIF PIR1_bits.ADIF +#define LVDIF PIR1_bits.LVDIF +#endif /* NO_BIT_DEFINES */ + +// ----- PMCON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PMCON1_bits_t; +extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD PMCON1_bits.RD +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PSMCCON0 bits -------------------- +typedef union { + struct { + unsigned char DC0:1; + unsigned char DC1:1; + unsigned char MAXDC0:1; + unsigned char MAXDC1:1; + unsigned char MINDC0:1; + unsigned char MINDC1:1; + unsigned char SMCCL0:1; + unsigned char SMCCL1:1; + }; +} __PSMCCON0_bits_t; +extern volatile __PSMCCON0_bits_t __at(PSMCCON0_ADDR) PSMCCON0_bits; + +#ifndef NO_BIT_DEFINES +#define DC0 PSMCCON0_bits.DC0 +#define DC1 PSMCCON0_bits.DC1 +#define MAXDC0 PSMCCON0_bits.MAXDC0 +#define MAXDC1 PSMCCON0_bits.MAXDC1 +#define MINDC0 PSMCCON0_bits.MINDC0 +#define MINDC1 PSMCCON0_bits.MINDC1 +#define SMCCL0 PSMCCON0_bits.SMCCL0 +#define SMCCL1 PSMCCON0_bits.SMCCL1 +#endif /* NO_BIT_DEFINES */ + +// ----- PSMCCON1 bits -------------------- +typedef union { + struct { + unsigned char SMCCS:1; + unsigned char PWM:1; + unsigned char SMCOM:1; + unsigned char SCEN:1; + unsigned char :1; + unsigned char S1BPOL:1; + unsigned char S1APOL:1; + unsigned char SMCON:1; + }; + struct { + unsigned char :1; + unsigned char PSM:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char NOT_PSM:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PSMCCON1_bits_t; +extern volatile __PSMCCON1_bits_t __at(PSMCCON1_ADDR) PSMCCON1_bits; + +#ifndef NO_BIT_DEFINES +#define SMCCS PSMCCON1_bits.SMCCS +#define PWM PSMCCON1_bits.PWM +#define PSM PSMCCON1_bits.PSM +#define NOT_PSM PSMCCON1_bits.NOT_PSM +#define SMCOM PSMCCON1_bits.SMCOM +#define SCEN PSMCCON1_bits.SCEN +#define S1BPOL PSMCCON1_bits.S1BPOL +#define S1APOL PSMCCON1_bits.S1APOL +#define SMCON PSMCCON1_bits.SMCON +#endif /* NO_BIT_DEFINES */ + +// ----- REFCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char VREFOE:1; + unsigned char VREFEN:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __REFCON_bits_t; +extern volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits; + +#ifndef NO_BIT_DEFINES +#define VREFOE REFCON_bits.VREFOE +#define VREFEN REFCON_bits.VREFEN +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c782.h b/device/include/pic/pic16c782.h new file mode 100644 index 0000000..df85dec --- /dev/null +++ b/device/include/pic/pic16c782.h @@ -0,0 +1,906 @@ +// +// Register Declarations for Microchip 16C782 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C782_H +#define P16C782_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define ADRES_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define WPUB_ADDR 0x0095 +#define IOCB_ADDR 0x0096 +#define REFCON_ADDR 0x009B +#define LVDCON_ADDR 0x009C +#define ANSEL_ADDR 0x009D +#define ADCON1_ADDR 0x009F +#define PMDATL_ADDR 0x010C +#define PMADRL_ADDR 0x010D +#define PMDATH_ADDR 0x010E +#define PMADRH_ADDR 0x010F +#define CALCON_ADDR 0x0110 +#define PSMCCON0_ADDR 0x0111 +#define PSMCCON1_ADDR 0x0112 +#define CM1CON0_ADDR 0x0119 +#define CM2CON0_ADDR 0x011A +#define CM2CON1_ADDR 0x011B +#define OPACON_ADDR 0x011C +#define DAC_ADDR 0x011E +#define DACON0_ADDR 0x011F +#define PMCON1_ADDR 0x018C + +// +// Memory organization. +// + + + +// LIST +// P16C782.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C782 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C782 +// 2. LIST directive in the source file +// LIST P=PIC16C782 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 16May2001 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C782 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (WPUB_ADDR) WPUB; +extern __sfr __at (IOCB_ADDR) IOCB; +extern __sfr __at (REFCON_ADDR) REFCON; +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (PMDATL_ADDR) PMDATL; +extern __sfr __at (PMADRL_ADDR) PMADRL; +extern __sfr __at (PMDATH_ADDR) PMDATH; +extern __sfr __at (PMADRH_ADDR) PMADRH; +extern __sfr __at (CALCON_ADDR) CALCON; +extern __sfr __at (PSMCCON0_ADDR) PSMCCON0; +extern __sfr __at (PSMCCON1_ADDR) PSMCCON1; +extern __sfr __at (CM1CON0_ADDR) CM1CON0; +extern __sfr __at (CM2CON0_ADDR) CM2CON0; +extern __sfr __at (CM2CON1_ADDR) CM2CON1; +extern __sfr __at (OPACON_ADDR) OPACON; +extern __sfr __at (DAC_ADDR) DAC; +extern __sfr __at (DACON0_ADDR) DACON0; + +extern __sfr __at (PMCON1_ADDR) PMCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ---------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- REFCON Bits -------------------------------------------------------- + + +//----- LVDCON Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- CALCON Bits -------------------------------------------------------- + + +//----- PSMCCON0 Bits ------------------------------------------------------ + + +//----- PSMCCON1 Bits ------------------------------------------------------ + + +//----- CM1CON0 Bits ------------------------------------------------------ + + +//----- CM2CON0 Bits ------------------------------------------------------ + + +//----- CM2CON1 Bits ------------------------------------------------------ + + +//----- OPACON Bits ------------------------------------------------------- + + +//----- DACON Bits -------------------------------------------------------- + + +//----- PMCON1 Bits ------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'07'-H'09', H'0D', H'11'-H'1D' +// __BADRAM H'87'-H'89', H'8D' +// __BADRAM H'8F'-H'94', H'97'-H'9A', H'9E', H'C0'-H'EF' +// __BADRAM H'105', H'107'-H'109', H'113'-H'118' +// __BADRAM H'11D', H'120'-H'16F' +// __BADRAM H'185', H'187'-H'189', H'18D'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x0CFF +#define _CP_OFF 0x3FFF +#define _VBOR_25 0x3FFF +#define _VBOR_27 0x3BFF +#define _VBOR_42 0x37FF +#define _VBOR_45 0x33FF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _MCLRE_OFF 0x3FDF +#define _MCLRE_ON 0x3FFF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _ER_OSC_CLKOUT 0x3FFF +#define _ER_OSC_NOCLKOUT 0x3FFE +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _EXTCLK_OSC 0x3FFB +#define _HS_OSC 0x3FFA +#define _XT_OSC 0x3FF9 +#define _LP_OSC 0x3FF8 + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char CHS3:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define CHS3 ADCON0_bits.CHS3 +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define VCFG0 ADCON1_bits.VCFG0 +#define VCFG1 ADCON1_bits.VCFG1 +#endif /* NO_BIT_DEFINES */ + +// ----- CALCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CALREF:1; + unsigned char CALERR:1; + unsigned char CAL:1; + }; +} __CALCON_bits_t; +extern volatile __CALCON_bits_t __at(CALCON_ADDR) CALCON_bits; + +#ifndef NO_BIT_DEFINES +#define CALREF CALCON_bits.CALREF +#define CALERR CALCON_bits.CALERR +#define CAL CALCON_bits.CAL +#endif /* NO_BIT_DEFINES */ + +// ----- CM1CON0 bits -------------------- +typedef union { + struct { + unsigned char C1CH0:1; + unsigned char C1CH1:1; + unsigned char C1R:1; + unsigned char C1SP:1; + unsigned char C1POL:1; + unsigned char C1OE:1; + unsigned char C1OUT:1; + unsigned char C1ON:1; + }; +} __CM1CON0_bits_t; +extern volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C1CH0 CM1CON0_bits.C1CH0 +#define C1CH1 CM1CON0_bits.C1CH1 +#define C1R CM1CON0_bits.C1R +#define C1SP CM1CON0_bits.C1SP +#define C1POL CM1CON0_bits.C1POL +#define C1OE CM1CON0_bits.C1OE +#define C1OUT CM1CON0_bits.C1OUT +#define C1ON CM1CON0_bits.C1ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON0 bits -------------------- +typedef union { + struct { + unsigned char C2CH0:1; + unsigned char C2CH1:1; + unsigned char C2R:1; + unsigned char C2SP:1; + unsigned char C2POL:1; + unsigned char C2OE:1; + unsigned char C2OUT:1; + unsigned char C2ON:1; + }; +} __CM2CON0_bits_t; +extern volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C2CH0 CM2CON0_bits.C2CH0 +#define C2CH1 CM2CON0_bits.C2CH1 +#define C2R CM2CON0_bits.C2R +#define C2SP CM2CON0_bits.C2SP +#define C2POL CM2CON0_bits.C2POL +#define C2OE CM2CON0_bits.C2OE +#define C2OUT CM2CON0_bits.C2OUT +#define C2ON CM2CON0_bits.C2ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char MC2OUT:1; + unsigned char MC1OUT:1; + }; +} __CM2CON1_bits_t; +extern volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CM2CON1_bits.C2SYNC +#define MC2OUT CM2CON1_bits.MC2OUT +#define MC1OUT CM2CON1_bits.MC1OUT +#endif /* NO_BIT_DEFINES */ + +// ----- DACON0 bits -------------------- +typedef union { + struct { + unsigned char DARS0:1; + unsigned char DARS1:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char DAOE:1; + unsigned char DAON:1; + }; +} __DACON0_bits_t; +extern volatile __DACON0_bits_t __at(DACON0_ADDR) DACON0_bits; + +#ifndef NO_BIT_DEFINES +#define DARS0 DACON0_bits.DARS0 +#define DARS1 DACON0_bits.DARS1 +#define DAOE DACON0_bits.DAOE +#define DAON DACON0_bits.DAON +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LV0:1; + unsigned char LV1:1; + unsigned char LV2:1; + unsigned char LV3:1; + unsigned char LVDEN:1; + unsigned char BGST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LV0 LVDCON_bits.LV0 +#define LV1 LVDCON_bits.LV1 +#define LV2 LVDCON_bits.LV2 +#define LV3 LVDCON_bits.LV3 +#define LVDEN LVDCON_bits.LVDEN +#define BGST LVDCON_bits.BGST +#endif /* NO_BIT_DEFINES */ + +// ----- OPACON bits -------------------- +typedef union { + struct { + unsigned char GBWP:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CMPEN:1; + unsigned char OPAON:1; + }; +} __OPACON_bits_t; +extern volatile __OPACON_bits_t __at(OPACON_ADDR) OPACON_bits; + +#ifndef NO_BIT_DEFINES +#define GBWP OPACON_bits.GBWP +#define CMPEN OPACON_bits.CMPEN +#define OPAON OPACON_bits.OPAON +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char OSCF:1; + unsigned char WDTON:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define OSCF PCON_bits.OSCF +#define WDTON PCON_bits.WDTON +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char ADIE:1; + unsigned char LVDIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define C1IE PIE1_bits.C1IE +#define C2IE PIE1_bits.C2IE +#define ADIE PIE1_bits.ADIE +#define LVDIE PIE1_bits.LVDIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char ADIF:1; + unsigned char LVDIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define C1IF PIR1_bits.C1IF +#define C2IF PIR1_bits.C2IF +#define ADIF PIR1_bits.ADIF +#define LVDIF PIR1_bits.LVDIF +#endif /* NO_BIT_DEFINES */ + +// ----- PMCON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PMCON1_bits_t; +extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD PMCON1_bits.RD +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PSMCCON0 bits -------------------- +typedef union { + struct { + unsigned char DC0:1; + unsigned char DC1:1; + unsigned char MAXDC0:1; + unsigned char MAXDC1:1; + unsigned char MINDC0:1; + unsigned char MINDC1:1; + unsigned char SMCCL0:1; + unsigned char SMCCL1:1; + }; +} __PSMCCON0_bits_t; +extern volatile __PSMCCON0_bits_t __at(PSMCCON0_ADDR) PSMCCON0_bits; + +#ifndef NO_BIT_DEFINES +#define DC0 PSMCCON0_bits.DC0 +#define DC1 PSMCCON0_bits.DC1 +#define MAXDC0 PSMCCON0_bits.MAXDC0 +#define MAXDC1 PSMCCON0_bits.MAXDC1 +#define MINDC0 PSMCCON0_bits.MINDC0 +#define MINDC1 PSMCCON0_bits.MINDC1 +#define SMCCL0 PSMCCON0_bits.SMCCL0 +#define SMCCL1 PSMCCON0_bits.SMCCL1 +#endif /* NO_BIT_DEFINES */ + +// ----- PSMCCON1 bits -------------------- +typedef union { + struct { + unsigned char SMCCS:1; + unsigned char PWM:1; + unsigned char SMCOM:1; + unsigned char SCEN:1; + unsigned char :1; + unsigned char S1BPOL:1; + unsigned char S1APOL:1; + unsigned char SMCON:1; + }; + struct { + unsigned char :1; + unsigned char PSM:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char NOT_PSM:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PSMCCON1_bits_t; +extern volatile __PSMCCON1_bits_t __at(PSMCCON1_ADDR) PSMCCON1_bits; + +#ifndef NO_BIT_DEFINES +#define SMCCS PSMCCON1_bits.SMCCS +#define PWM PSMCCON1_bits.PWM +#define PSM PSMCCON1_bits.PSM +#define NOT_PSM PSMCCON1_bits.NOT_PSM +#define SMCOM PSMCCON1_bits.SMCOM +#define SCEN PSMCCON1_bits.SCEN +#define S1BPOL PSMCCON1_bits.S1BPOL +#define S1APOL PSMCCON1_bits.S1APOL +#define SMCON PSMCCON1_bits.SMCON +#endif /* NO_BIT_DEFINES */ + +// ----- REFCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char VREFOE:1; + unsigned char VREFEN:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __REFCON_bits_t; +extern volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits; + +#ifndef NO_BIT_DEFINES +#define VREFOE REFCON_bits.VREFOE +#define VREFEN REFCON_bits.VREFEN +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c925.h b/device/include/pic/pic16c925.h new file mode 100644 index 0000000..4c88c0e --- /dev/null +++ b/device/include/pic/pic16c925.h @@ -0,0 +1,1077 @@ +// +// Register Declarations for Microchip 16C925 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C925_H +#define P16C925_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define PORTF_ADDR 0x0107 +#define PORTG_ADDR 0x0108 +#define PMCON1_ADDR 0x010C +#define LCDSE_ADDR 0x010D +#define LCDPS_ADDR 0x010E +#define LCDCON_ADDR 0x010F +#define LCDD00_ADDR 0x0110 +#define LCDD01_ADDR 0x0111 +#define LCDD02_ADDR 0x0112 +#define LCDD03_ADDR 0x0113 +#define LCDD04_ADDR 0x0114 +#define LCDD05_ADDR 0x0115 +#define LCDD06_ADDR 0x0116 +#define LCDD07_ADDR 0x0117 +#define LCDD08_ADDR 0x0118 +#define LCDD09_ADDR 0x0119 +#define LCDD10_ADDR 0x011A +#define LCDD11_ADDR 0x011B +#define LCDD12_ADDR 0x011C +#define LCDD13_ADDR 0x011D +#define LCDD14_ADDR 0x011E +#define LCDD15_ADDR 0x011F +#define TRISF_ADDR 0x0187 +#define TRISG_ADDR 0x0188 +#define PMDATA_ADDR 0x018C +#define PMDATH_ADDR 0x018D +#define PMADR_ADDR 0x018E +#define PMADRH_ADDR 0x018F + +// +// Memory organization. +// + + + +// LIST +// P16C925.INC Standard Header File, Version 1.02 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C925 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C925 +// 2. LIST directive in the source file +// LIST P=PIC16C925 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 11/21/00 Initial Release +//1.01 02/27/01 Changes to reflect design changes to data memory map: +// 1.) Locations of PMDATA and PMCON1 swapped. +// 2.) Locations of PMDATH and PMADR swapped. +//1.02 03/02/01 PORTF, PORTG, TRISF, and TRISG addresses corrected. +//1.03 03/06/01 RD bit in PMCON1 defined. +//1.04 03/12/01 Locations of PMDATH and PMADR restored to before v1.01. +//1.05 10/19/01 Locations of PMDATH and PMADR restored to before v1.04. +//1.06 06/03/01 Values for _CP_ALL, _CP_75, _CP_50, and _BODEN_OFF corrected. + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C925 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (PORTF_ADDR) PORTF; +extern __sfr __at (PORTG_ADDR) PORTG; +extern __sfr __at (PMCON1_ADDR) PMCON1; +extern __sfr __at (LCDSE_ADDR) LCDSE; +extern __sfr __at (LCDPS_ADDR) LCDPS; +extern __sfr __at (LCDCON_ADDR) LCDCON; +extern __sfr __at (LCDD00_ADDR) LCDD00; +extern __sfr __at (LCDD01_ADDR) LCDD01; +extern __sfr __at (LCDD02_ADDR) LCDD02; +extern __sfr __at (LCDD03_ADDR) LCDD03; +extern __sfr __at (LCDD04_ADDR) LCDD04; +extern __sfr __at (LCDD05_ADDR) LCDD05; +extern __sfr __at (LCDD06_ADDR) LCDD06; +extern __sfr __at (LCDD07_ADDR) LCDD07; +extern __sfr __at (LCDD08_ADDR) LCDD08; +extern __sfr __at (LCDD09_ADDR) LCDD09; +extern __sfr __at (LCDD10_ADDR) LCDD10; +extern __sfr __at (LCDD11_ADDR) LCDD11; +extern __sfr __at (LCDD12_ADDR) LCDD12; +extern __sfr __at (LCDD13_ADDR) LCDD13; +extern __sfr __at (LCDD14_ADDR) LCDD14; +extern __sfr __at (LCDD15_ADDR) LCDD15; + +extern __sfr __at (TRISF_ADDR) TRISF; +extern __sfr __at (TRISG_ADDR) TRISG; +extern __sfr __at (PMDATA_ADDR) PMDATA; +extern __sfr __at (PMDATH_ADDR) PMDATH; +extern __sfr __at (PMADR_ADDR) PMADR; +extern __sfr __at (PMADRH_ADDR) PMADRH; + + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- TRISE Bits --------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- LCDSE Bits --------------------------------------------------------- + + +//----- LCDPS Bits --------------------------------------------------------- + + +//----- LCDCON Bits -------------------------------------------------------- + + +//----- PMCON1 Bits -------------------------------------------------------- + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'0D', H'18'-H'1D' +// __BADRAM H'8D', H'8F'-H'91', H'95'-H'9D' +// __BADRAM H'105', H'109', H'120'-H'16F' +// __BADRAM H'185', H'189', H'190'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x3FCF +#define _CP_75 0x3FDF +#define _CP_50 0x3FEF +#define _CP_OFF 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _BODEN_ON 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- LCDCON bits -------------------- +typedef union { + struct { + unsigned char LMUX0:1; + unsigned char LMUX1:1; + unsigned char CS0:1; + unsigned char CS1:1; + unsigned char BIAS:1; + unsigned char WERR:1; + unsigned char SLPEN:1; + unsigned char LCDEN:1; + }; +} __LCDCON_bits_t; +extern volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LMUX0 LCDCON_bits.LMUX0 +#define LMUX1 LCDCON_bits.LMUX1 +#define CS0 LCDCON_bits.CS0 +#define CS1 LCDCON_bits.CS1 +#define BIAS LCDCON_bits.BIAS +#define WERR LCDCON_bits.WERR +#define SLPEN LCDCON_bits.SLPEN +#define LCDEN LCDCON_bits.LCDEN +#endif /* NO_BIT_DEFINES */ + +// ----- LCDPS bits -------------------- +typedef union { + struct { + unsigned char LP0:1; + unsigned char LP1:1; + unsigned char LP2:1; + unsigned char LP3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __LCDPS_bits_t; +extern volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits; + +#ifndef NO_BIT_DEFINES +#define LP0 LCDPS_bits.LP0 +#define LP1 LCDPS_bits.LP1 +#define LP2 LCDPS_bits.LP2 +#define LP3 LCDPS_bits.LP3 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDSE bits -------------------- +typedef union { + struct { + unsigned char SE0:1; + unsigned char SE5:1; + unsigned char SE9:1; + unsigned char SE12:1; + unsigned char SE16:1; + unsigned char SE20:1; + unsigned char SE27:1; + unsigned char SE29:1; + }; +} __LCDSE_bits_t; +extern volatile __LCDSE_bits_t __at(LCDSE_ADDR) LCDSE_bits; + +#ifndef NO_BIT_DEFINES +#define SE0 LCDSE_bits.SE0 +#define SE5 LCDSE_bits.SE5 +#define SE9 LCDSE_bits.SE9 +#define SE12 LCDSE_bits.SE12 +#define SE16 LCDSE_bits.SE16 +#define SE20 LCDSE_bits.SE20 +#define SE27 LCDSE_bits.SE27 +#define SE29 LCDSE_bits.SE29 +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BOR:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char LCDIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define ADIE PIE1_bits.ADIE +#define LCDIE PIE1_bits.LCDIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char LCDIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define ADIF PIR1_bits.ADIF +#define LCDIF PIR1_bits.LCDIF +#endif /* NO_BIT_DEFINES */ + +// ----- PMCON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PMCON1_bits_t; +extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD PMCON1_bits.RD +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char PSPMODE:1; + unsigned char IBOV:1; + unsigned char OBF:1; + unsigned char IBF:1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#define PSPMODE TRISE_bits.PSPMODE +#define IBOV TRISE_bits.IBOV +#define OBF TRISE_bits.OBF +#define IBF TRISE_bits.IBF +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16c926.h b/device/include/pic/pic16c926.h new file mode 100644 index 0000000..70ff730 --- /dev/null +++ b/device/include/pic/pic16c926.h @@ -0,0 +1,1077 @@ +// +// Register Declarations for Microchip 16C926 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16C926_H +#define P16C926_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define PORTF_ADDR 0x0107 +#define PORTG_ADDR 0x0108 +#define PMCON1_ADDR 0x010C +#define LCDSE_ADDR 0x010D +#define LCDPS_ADDR 0x010E +#define LCDCON_ADDR 0x010F +#define LCDD00_ADDR 0x0110 +#define LCDD01_ADDR 0x0111 +#define LCDD02_ADDR 0x0112 +#define LCDD03_ADDR 0x0113 +#define LCDD04_ADDR 0x0114 +#define LCDD05_ADDR 0x0115 +#define LCDD06_ADDR 0x0116 +#define LCDD07_ADDR 0x0117 +#define LCDD08_ADDR 0x0118 +#define LCDD09_ADDR 0x0119 +#define LCDD10_ADDR 0x011A +#define LCDD11_ADDR 0x011B +#define LCDD12_ADDR 0x011C +#define LCDD13_ADDR 0x011D +#define LCDD14_ADDR 0x011E +#define LCDD15_ADDR 0x011F +#define TRISF_ADDR 0x0187 +#define TRISG_ADDR 0x0188 +#define PMDATA_ADDR 0x018C +#define PMDATH_ADDR 0x018D +#define PMADR_ADDR 0x018E +#define PMADRH_ADDR 0x018F + +// +// Memory organization. +// + + + +// LIST +// P16C926.INC Standard Header File, Version 1.02 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16C926 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16C926 +// 2. LIST directive in the source file +// LIST P=PIC16C926 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 10/11/00 Initial Release +//1.01 02/27/01 Changes to reflect design changes to data memory map: +// 1.) Locations of PMDATA and PMCON1 swapped. +// 2.) Locations of PMDATH and PMADR swapped. +//1.02 03/02/01 PORTF, PORTG, TRISF, and TRISG addresses corrected. +//1.03 03/06/01 RD bit in PMCON1 defined. +//1.04 03/12/01 Locations of PMDATH and PMADR restored to before v1.01. +//1.05 10/19/01 Locations of PMDATH and PMADR restored to before v1.04. +//1.06 06/03/01 Values for _CP_ALL, _CP_75, _CP_50, and _BODEN_OFF corrected. + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16C926 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (PORTF_ADDR) PORTF; +extern __sfr __at (PORTG_ADDR) PORTG; +extern __sfr __at (PMCON1_ADDR) PMCON1; +extern __sfr __at (LCDSE_ADDR) LCDSE; +extern __sfr __at (LCDPS_ADDR) LCDPS; +extern __sfr __at (LCDCON_ADDR) LCDCON; +extern __sfr __at (LCDD00_ADDR) LCDD00; +extern __sfr __at (LCDD01_ADDR) LCDD01; +extern __sfr __at (LCDD02_ADDR) LCDD02; +extern __sfr __at (LCDD03_ADDR) LCDD03; +extern __sfr __at (LCDD04_ADDR) LCDD04; +extern __sfr __at (LCDD05_ADDR) LCDD05; +extern __sfr __at (LCDD06_ADDR) LCDD06; +extern __sfr __at (LCDD07_ADDR) LCDD07; +extern __sfr __at (LCDD08_ADDR) LCDD08; +extern __sfr __at (LCDD09_ADDR) LCDD09; +extern __sfr __at (LCDD10_ADDR) LCDD10; +extern __sfr __at (LCDD11_ADDR) LCDD11; +extern __sfr __at (LCDD12_ADDR) LCDD12; +extern __sfr __at (LCDD13_ADDR) LCDD13; +extern __sfr __at (LCDD14_ADDR) LCDD14; +extern __sfr __at (LCDD15_ADDR) LCDD15; + +extern __sfr __at (TRISF_ADDR) TRISF; +extern __sfr __at (TRISG_ADDR) TRISG; +extern __sfr __at (PMDATA_ADDR) PMDATA; +extern __sfr __at (PMDATH_ADDR) PMDATH; +extern __sfr __at (PMADR_ADDR) PMADR; +extern __sfr __at (PMADRH_ADDR) PMADRH; + + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- TRISE Bits --------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- LCDSE Bits --------------------------------------------------------- + + +//----- LCDPS Bits --------------------------------------------------------- + + +//----- LCDCON Bits -------------------------------------------------------- + + +//----- PMCON1 Bits -------------------------------------------------------- + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'0D', H'18'-H'1D' +// __BADRAM H'8D', H'8F'-H'91', H'95'-H'9D' +// __BADRAM H'105', H'109' +// __BADRAM H'185', H'189', H'190'-H'19F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x3FCF +#define _CP_75 0x3FDF +#define _CP_50 0x3FEF +#define _CP_OFF 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _BODEN_ON 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- LCDCON bits -------------------- +typedef union { + struct { + unsigned char LMUX0:1; + unsigned char LMUX1:1; + unsigned char CS0:1; + unsigned char CS1:1; + unsigned char BIAS:1; + unsigned char WERR:1; + unsigned char SLPEN:1; + unsigned char LCDEN:1; + }; +} __LCDCON_bits_t; +extern volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LMUX0 LCDCON_bits.LMUX0 +#define LMUX1 LCDCON_bits.LMUX1 +#define CS0 LCDCON_bits.CS0 +#define CS1 LCDCON_bits.CS1 +#define BIAS LCDCON_bits.BIAS +#define WERR LCDCON_bits.WERR +#define SLPEN LCDCON_bits.SLPEN +#define LCDEN LCDCON_bits.LCDEN +#endif /* NO_BIT_DEFINES */ + +// ----- LCDPS bits -------------------- +typedef union { + struct { + unsigned char LP0:1; + unsigned char LP1:1; + unsigned char LP2:1; + unsigned char LP3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __LCDPS_bits_t; +extern volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits; + +#ifndef NO_BIT_DEFINES +#define LP0 LCDPS_bits.LP0 +#define LP1 LCDPS_bits.LP1 +#define LP2 LCDPS_bits.LP2 +#define LP3 LCDPS_bits.LP3 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDSE bits -------------------- +typedef union { + struct { + unsigned char SE0:1; + unsigned char SE5:1; + unsigned char SE9:1; + unsigned char SE12:1; + unsigned char SE16:1; + unsigned char SE20:1; + unsigned char SE27:1; + unsigned char SE29:1; + }; +} __LCDSE_bits_t; +extern volatile __LCDSE_bits_t __at(LCDSE_ADDR) LCDSE_bits; + +#ifndef NO_BIT_DEFINES +#define SE0 LCDSE_bits.SE0 +#define SE5 LCDSE_bits.SE5 +#define SE9 LCDSE_bits.SE9 +#define SE12 LCDSE_bits.SE12 +#define SE16 LCDSE_bits.SE16 +#define SE20 LCDSE_bits.SE20 +#define SE27 LCDSE_bits.SE27 +#define SE29 LCDSE_bits.SE29 +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BOR:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char LCDIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define ADIE PIE1_bits.ADIE +#define LCDIE PIE1_bits.LCDIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char LCDIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define ADIF PIR1_bits.ADIF +#define LCDIF PIR1_bits.LCDIF +#endif /* NO_BIT_DEFINES */ + +// ----- PMCON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PMCON1_bits_t; +extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD PMCON1_bits.RD +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char PSPMODE:1; + unsigned char IBOV:1; + unsigned char OBF:1; + unsigned char IBF:1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#define PSPMODE TRISE_bits.PSPMODE +#define IBOV TRISE_bits.IBOV +#define OBF TRISE_bits.OBF +#define IBF TRISE_bits.IBF +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f627.h b/device/include/pic/pic16f627.h new file mode 100644 index 0000000..5be8e15 --- /dev/null +++ b/device/include/pic/pic16f627.h @@ -0,0 +1,704 @@ +// +// Register Declarations for Microchip 16F627 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F627_H +#define P16F627_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CMCON_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define EEDATA_ADDR 0x009A +#define EEADR_ADDR 0x009B +#define EECON1_ADDR 0x009C +#define EECON2_ADDR 0x009D +#define VRCON_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16F627.INC Standard Header File, Version 1.01 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F627 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F627 +// 2. LIST directive in the source file +// LIST P=PIC16F627 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: +//1.01 13 Sept 2001 Added _DATA_CP_ON and _DATA_CP_OFF +//1.00 10 Feb 1999 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F627 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CMCON_ADDR) CMCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; +extern __sfr __at (VRCON_ADDR) VRCON; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + +//----- T2CON Bits --------------------------------------------------------- + +//----- CCP1CON Bits --------------------------------------------------------- + +//----- RCSTA Bits --------------------------------------------------------- + +//----- CMCON Bits --------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- TXSTA Bits ---------------------------------------------------------- + +//----- EECON1 Bits --------------------------------------------------------- + +//----- VRCON Bits --------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'01FF' +// __BADRAM H'07'-H'09', H'0D', H'13'-H'14', H'1B'-H'1E' +// __BADRAM H'87'-H'89', H'8D', H'8F'-H'91', H'93'-H'97', H'9E' +// __BADRAM H'105', H'107'-H'109', H'10C'-H'11F', H'150'-H'16F' +// __BADRAM H'185', H'187'-H'189', H'18C'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x03FF +#define _CP_75 0x17FF +#define _CP_50 0x2BFF +#define _CP_OFF 0x3FFF +#define _DATA_CP_ON 0x3EFF +#define _DATA_CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _ER_OSC_CLKOUT 0x3FFF +#define _ER_OSC_NOCLKOUT 0x3FFE +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _EXTCLK_OSC 0x3FEF +#define _LP_OSC 0x3FEC +#define _XT_OSC 0x3FED +#define _HS_OSC 0x3FEE + +// LIST + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1INV CMCON_bits.C1INV +#define C2INV CMCON_bits.C2INV +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char OSCF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_POR PCON_bits.NOT_POR +#define OSCF PCON_bits.OSCF +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char :1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char CMIE:1; + unsigned char EEIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define CMIE PIE1_bits.CMIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char :1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char CMIF:1; + unsigned char EEIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define CMIF PIR1_bits.CMIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADEN RCSTA_bits.ADEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char VROE:1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VROE VRCON_bits.VROE +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f627a.h b/device/include/pic/pic16f627a.h new file mode 100644 index 0000000..f08b6e7 --- /dev/null +++ b/device/include/pic/pic16f627a.h @@ -0,0 +1,676 @@ +// +// Register Declarations for Microchip 16F627A Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F627A_H +#define P16F627A_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CMCON_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define EEDATA_ADDR 0x009A +#define EEADR_ADDR 0x009B +#define EECON1_ADDR 0x009C +#define EECON2_ADDR 0x009D +#define VRCON_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16F627A.INC Standard Header File, Version 1.10 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F627A microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F627A +// 2. LIST directive in the source file +// LIST P=PIC16F627A +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: +//1.01 14 Nov 2002 Updated to reflect BOD terminology changed to BOR +//1.00 22 Aug 2002 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F627A +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CMCON_ADDR) CMCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; +extern __sfr __at (VRCON_ADDR) VRCON; + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'01FF' +// __BADRAM H'07'-H'09', H'0D', H'13'-H'14', H'1B'-H'1E' +// __BADRAM H'87'-H'89', H'8D', H'8F'-H'91', H'93'-H'97', H'9E' +// __BADRAM H'105', H'107'-H'109', H'10C'-H'11F', H'150'-H'16F' +// __BADRAM H'185', H'187'-H'189', H'18C'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF //Backwards compatability to 16F62X +#define _BODEN_OFF 0x3FBF //Backwards compatability to 16F62X +#define _BOREN_ON 0x3FFF +#define _BOREN_OFF 0x3FBF +#define _CP_ON 0x1FFF +#define _CP_OFF 0x3FFF +#define _DATA_CP_ON 0x3EFF +#define _DATA_CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _RC_OSC_CLKOUT 0x3FFF +#define _RC_OSC_NOCLKOUT 0x3FFE +#define _ER_OSC_CLKOUT 0x3FFF //Backwards compatability to 16F62X +#define _ER_OSC_NOCLKOUT 0x3FFE //Backwards compatability to 16F62X +#define _INTOSC_OSC_CLKOUT 0x3FFD +#define _INTOSC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD //Backwards compatability to 16F62X +#define _INTRC_OSC_NOCLKOUT 0x3FFC //Backwards compatability to 16F62X +#define _EXTCLK_OSC 0x3FEF +#define _HS_OSC 0x3FEE +#define _XT_OSC 0x3FED +#define _LP_OSC 0x3FEC + +// LIST + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1INV CMCON_bits.C1INV +#define C2INV CMCON_bits.C2INV +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char OSCF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_POR PCON_bits.NOT_POR +#define OSCF PCON_bits.OSCF +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char :1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char CMIE:1; + unsigned char EEIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define CMIE PIE1_bits.CMIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char :1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char CMIF:1; + unsigned char EEIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define CMIF PIR1_bits.CMIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char RA6:1; + unsigned char RA7:1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#define RA6 PORTA_bits.RA6 +#define RA7 PORTA_bits.RA7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADEN RCSTA_bits.ADEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char TRISA6:1; + unsigned char TRISA7:1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#define TRISA6 TRISA_bits.TRISA6 +#define TRISA7 TRISA_bits.TRISA7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char VROE:1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VROE VRCON_bits.VROE +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f628.h b/device/include/pic/pic16f628.h new file mode 100644 index 0000000..a3238e5 --- /dev/null +++ b/device/include/pic/pic16f628.h @@ -0,0 +1,704 @@ +// +// Register Declarations for Microchip 16F628 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F628_H +#define P16F628_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CMCON_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define EEDATA_ADDR 0x009A +#define EEADR_ADDR 0x009B +#define EECON1_ADDR 0x009C +#define EECON2_ADDR 0x009D +#define VRCON_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16F628.INC Standard Header File, Version 1.01 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F628 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F628 +// 2. LIST directive in the source file +// LIST P=PIC16F628 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: +//1.01 13 Sept 2001 Added _DATA_CP_ON and _DATA_CP_OFF +//1.00 10 Feb 1999 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F628 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CMCON_ADDR) CMCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; +extern __sfr __at (VRCON_ADDR) VRCON; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + +//----- T2CON Bits --------------------------------------------------------- + +//----- CCP1CON Bits --------------------------------------------------------- + +//----- RCSTA Bits --------------------------------------------------------- + +//----- CMCON Bits --------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- TXSTA Bits ---------------------------------------------------------- + +//----- EECON1 Bits --------------------------------------------------------- + +//----- VRCON Bits --------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'01FF' +// __BADRAM H'07'-H'09', H'0D', H'13'-H'14', H'1B'-H'1E' +// __BADRAM H'87'-H'89', H'8D', H'8F'-H'91', H'93'-H'97', H'9E' +// __BADRAM H'105', H'107'-H'109', H'10C'-H'11F', H'150'-H'16F' +// __BADRAM H'185', H'187'-H'189', H'18C'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x03FF +#define _CP_75 0x17FF +#define _CP_50 0x2BFF +#define _CP_OFF 0x3FFF +#define _DATA_CP_ON 0x3EFF +#define _DATA_CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _ER_OSC_CLKOUT 0x3FFF +#define _ER_OSC_NOCLKOUT 0x3FFE +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _EXTCLK_OSC 0x3FEF +#define _LP_OSC 0x3FEC +#define _XT_OSC 0x3FED +#define _HS_OSC 0x3FEE + +// LIST + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1INV CMCON_bits.C1INV +#define C2INV CMCON_bits.C2INV +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char OSCF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_POR PCON_bits.NOT_POR +#define OSCF PCON_bits.OSCF +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char :1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char CMIE:1; + unsigned char EEIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define CMIE PIE1_bits.CMIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char :1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char CMIF:1; + unsigned char EEIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define CMIF PIR1_bits.CMIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADEN RCSTA_bits.ADEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char VROE:1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VROE VRCON_bits.VROE +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f628a.h b/device/include/pic/pic16f628a.h new file mode 100644 index 0000000..b3503f0 --- /dev/null +++ b/device/include/pic/pic16f628a.h @@ -0,0 +1,677 @@ +// +// Register Declarations for Microchip 16F628A Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F628A_H +#define P16F628A_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CMCON_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define EEDATA_ADDR 0x009A +#define EEADR_ADDR 0x009B +#define EECON1_ADDR 0x009C +#define EECON2_ADDR 0x009D +#define VRCON_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16F628A.INC Standard Header File, Version 1.10 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F628A microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F628A +// 2. LIST directive in the source file +// LIST P=PIC16F628A +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: +//1.01 14 Nov 2002 Updated to reflect BOD terminology changed to BOR +//1.00 22 Aug 2002 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F628A +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CMCON_ADDR) CMCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; +extern __sfr __at (VRCON_ADDR) VRCON; + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'01FF' +// __BADRAM H'07'-H'09', H'0D', H'13'-H'14', H'1B'-H'1E' +// __BADRAM H'87'-H'89', H'8D', H'8F'-H'91', H'93'-H'97', H'9E' +// __BADRAM H'105', H'107'-H'109', H'10C'-H'11F', H'150'-H'16F' +// __BADRAM H'185', H'187'-H'189', H'18C'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF //Backwards compatability to 16F62X +#define _BODEN_OFF 0x3FBF //Backwards compatability to 16F62X +#define _BOREN_ON 0x3FFF +#define _BOREN_OFF 0x3FBF +#define _CP_ON 0x1FFF +#define _CP_OFF 0x3FFF +#define _DATA_CP_ON 0x3EFF +#define _DATA_CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _RC_OSC_CLKOUT 0x3FFF +#define _RC_OSC_NOCLKOUT 0x3FFE +#define _ER_OSC_CLKOUT 0x3FFF //Backwards compatability to 16F62X +#define _ER_OSC_NOCLKOUT 0x3FFE //Backwards compatability to 16F62X +#define _INTOSC_OSC_CLKOUT 0x3FFD +#define _INTOSC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD //Backwards compatability to 16F62X +#define _INTRC_OSC_NOCLKOUT 0x3FFC //Backwards compatability to 16F62X +#define _EXTCLK_OSC 0x3FEF +#define _HS_OSC 0x3FEE +#define _XT_OSC 0x3FED +#define _LP_OSC 0x3FEC + +// LIST + + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1INV CMCON_bits.C1INV +#define C2INV CMCON_bits.C2INV +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char OSCF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_POR PCON_bits.NOT_POR +#define OSCF PCON_bits.OSCF +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char :1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char CMIE:1; + unsigned char EEIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define CMIE PIE1_bits.CMIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char :1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char CMIF:1; + unsigned char EEIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define CMIF PIR1_bits.CMIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char RA6:1; + unsigned char RA7:1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#define RA6 PORTA_bits.RA6 +#define RA7 PORTA_bits.RA7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADEN RCSTA_bits.ADEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char TRISA6:1; + unsigned char TRISA7:1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#define TRISA6 TRISA_bits.TRISA6 +#define TRISA7 TRISA_bits.TRISA7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char VROE:1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VROE VRCON_bits.VROE +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f630.h b/device/include/pic/pic16f630.h new file mode 100644 index 0000000..edd4e4d --- /dev/null +++ b/device/include/pic/pic16f630.h @@ -0,0 +1,617 @@ +// +// Register Declarations for Microchip 16F630 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F630_H +#define P16F630_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define CMCON_ADDR 0x0019 +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define OSCCAL_ADDR 0x0090 +#define WPUA_ADDR 0x0095 +#define WPU_ADDR 0x0095 +#define IOCA_ADDR 0x0096 +#define IOC_ADDR 0x0096 +#define VRCON_ADDR 0x0099 +#define EEDATA_ADDR 0x009A +#define EEDAT_ADDR 0x009A +#define EEADR_ADDR 0x009B +#define EECON1_ADDR 0x009C +#define EECON2_ADDR 0x009D + +// +// Memory organization. +// + + + +// LIST +// P16F630.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F630 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F630 +// 2. LIST directive in the source file +// LIST P=PIC16F630 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== +//1.00 05/13/02 Original + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F630 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTC_ADDR) PORTC; + +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; + +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; + +extern __sfr __at (CMCON_ADDR) CMCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; + +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISC_ADDR) TRISC; + +extern __sfr __at (PIE1_ADDR) PIE1; + +extern __sfr __at (PCON_ADDR) PCON; + +extern __sfr __at (OSCCAL_ADDR) OSCCAL; + +extern __sfr __at (WPUA_ADDR) WPUA; +extern __sfr __at (WPU_ADDR) WPU; +extern __sfr __at (IOCA_ADDR) IOCA; +extern __sfr __at (IOC_ADDR) IOC; + +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEDAT_ADDR) EEDAT; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- COMCON Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCAL Bits -------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//----- EECON1 ------------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'FF' +// __BADRAM H'06', H'08'-H'09', H'0D', H'11'-H'18', H'1A'-H'1F', H'60'-H'7F' +// __BADRAM H'86', H'88'-H'89', H'8D', H'8F', H'91'-H'94', H'97'-H'98', H'9E'-H'9F', H'E0'-H'FF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CPD 0x3EFF +#define _CPD_OFF 0x3FFF +#define _CP 0x3F7F +#define _CP_OFF 0x3FFF +#define _BODEN 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF + +// LIST + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char CINV:1; + unsigned char :1; + unsigned char COUT:1; + unsigned char :1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define CINV CMCON_bits.CINV +#define COUT CMCON_bits.COUT +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RAIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RAIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RAIF INTCON_bits.RAIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RAIE INTCON_bits.RAIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_GPPU:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RAPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_GPPU OPTION_REG_bits.NOT_GPPU +#define NOT_RAPU OPTION_REG_bits.NOT_RAPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCAL bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char CAL0:1; + unsigned char CAL1:1; + unsigned char CAL2:1; + unsigned char CAL3:1; + unsigned char CAL4:1; + unsigned char CAL5:1; + }; +} __OSCCAL_bits_t; +extern volatile __OSCCAL_bits_t __at(OSCCAL_ADDR) OSCCAL_bits; + +#ifndef NO_BIT_DEFINES +#define CAL0 OSCCAL_bits.CAL0 +#define CAL1 OSCCAL_bits.CAL1 +#define CAL2 OSCCAL_bits.CAL2 +#define CAL3 OSCCAL_bits.CAL3 +#define CAL4 OSCCAL_bits.CAL4 +#define CAL5 OSCCAL_bits.CAL5 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BOD:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char T1IE:1; + unsigned char :1; + unsigned char :1; + unsigned char CMIE:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char EEIE:1; + }; + struct { + unsigned char TMR1IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IE PIE1_bits.T1IE +#define TMR1IE PIE1_bits.TMR1IE +#define CMIE PIE1_bits.CMIE +#define ADIE PIE1_bits.ADIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char T1IF:1; + unsigned char :1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char EEIF:1; + }; + struct { + unsigned char TMR1IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IF PIR1_bits.T1IF +#define TMR1IF PIR1_bits.TMR1IF +#define CMIF PIR1_bits.CMIF +#define ADIF PIR1_bits.ADIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char :1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f636.h b/device/include/pic/pic16f636.h new file mode 100644 index 0000000..d49c1c6 --- /dev/null +++ b/device/include/pic/pic16f636.h @@ -0,0 +1,833 @@ +// +// Register Declarations for Microchip 16F636 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F636_H +#define P16F636_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define WDTCON_ADDR 0x0018 +#define CMCON0_ADDR 0x0019 +#define CMCON1_ADDR 0x001A +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define LVDCON_ADDR 0x0094 +#define WPUDA_ADDR 0x0095 +#define IOCA_ADDR 0x0096 +#define WDA_ADDR 0x0097 +#define VRCON_ADDR 0x0099 +#define EEDAT_ADDR 0x009A +#define EEDATA_ADDR 0x009A +#define EEADR_ADDR 0x009B +#define EECON1_ADDR 0x009C +#define EECON2_ADDR 0x009D +#define CRCON_ADDR 0x0110 +#define CRDAT0_ADDR 0x0111 +#define CRDAT1_ADDR 0x0112 +#define CRDAT2_ADDR 0x0113 +#define CRDAT3_ADDR 0x0114 + +// +// Memory organization. +// + + + +// LIST +// P16F636.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F636 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F636 +// 2. LIST directive in the source file +// LIST P=PIC16F636 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== +//1.00 12/07/03 Original +//1.10 04/19/04 Update to match first release datasheet --kjd +//1.20 06/07/04 Update and correct badram definitions --kjd +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F636 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ +//Bank 0 +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; + +extern __sfr __at (PORTC_ADDR) PORTC; + +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; + +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; + +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (CMCON0_ADDR) CMCON0; +extern __sfr __at (CMCON1_ADDR) CMCON1; + +//Bank 1 +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; + +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISC_ADDR) TRISC; + +extern __sfr __at (PIE1_ADDR) PIE1; + +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; + +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (WPUDA_ADDR) WPUDA; +extern __sfr __at (IOCA_ADDR) IOCA; +extern __sfr __at (WDA_ADDR) WDA; + +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (EEDAT_ADDR) EEDAT; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//Bank 2 +extern __sfr __at (CRCON_ADDR) CRCON; +extern __sfr __at (CRDAT0_ADDR) CRDAT0; +extern __sfr __at (CRDAT1_ADDR) CRDAT1; +extern __sfr __at (CRDAT2_ADDR) CRDAT2; +extern __sfr __at (CRDAT3_ADDR) CRDAT3; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- CMCON0 Bits ------------------------------------------------------- + + +//----- CMCON1 Bits ------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits -------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + +//----- IOCA -------------------------------------------------------------- + + +//----- EECON1 ------------------------------------------------------------- + + +//----- VRCON --------------------------------------------------------- + + + +//----- CRCON ------------------------------------------------------------- + + +//----- LVDCON ------------------------------------------------------------- + + +//----- WDA ------------------------------------------------------------- + + +//----- WPUDA ------------------------------------------------------------- + + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'06', H'08'-H'09', H'0D', H'11'-H'17', H'1B'-H'1F' +// __BADRAM H'86', H'88'-H'89', H'8D', H'91'-H'93', H'98', H'9E'-H'9F', H'C0'-H'EF' +// __BADRAM H'10C'-H'10F', H'115'-H'16F', H'106', H'108'-H'109', H'186' +// __BADRAM H'188'-H'189', H'18C'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== +#define _WUREN_ON 0x2FFF +#define _WUREN_OFF 0x3FFF +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOD_ON 0x3FFF +#define _BOD_NSLEEP 0x3EFF +#define _BOD_SBODEN 0x3DFF +#define _BOD_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF + +// LIST + +// ----- CMCON0 bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON0_bits_t; +extern volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON0_bits.CM0 +#define CM1 CMCON0_bits.CM1 +#define CM2 CMCON0_bits.CM2 +#define CIS CMCON0_bits.CIS +#define C1INV CMCON0_bits.C1INV +#define C2INV CMCON0_bits.C2INV +#define C1OUT CMCON0_bits.C1OUT +#define C2OUT CMCON0_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __CMCON1_bits_t; +extern volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CMCON1_bits.C2SYNC +#define T1GSS CMCON1_bits.T1GSS +#endif /* NO_BIT_DEFINES */ + +// ----- CRCON bits -------------------- +typedef union { + struct { + unsigned char CRREG0:1; + unsigned char CRREG1:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ENC_DEC:1; + unsigned char GO:1; + }; +} __CRCON_bits_t; +extern volatile __CRCON_bits_t __at(CRCON_ADDR) CRCON_bits; + +#ifndef NO_BIT_DEFINES +#define CRREG0 CRCON_bits.CRREG0 +#define CRREG1 CRCON_bits.CRREG1 +#define ENC_DEC CRCON_bits.ENC_DEC +#define GO CRCON_bits.GO +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RAIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RAIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RAIF INTCON_bits.RAIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RAIE INTCON_bits.RAIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOCA bits -------------------- +typedef union { + struct { + unsigned char IOCA0:1; + unsigned char IOCA1:1; + unsigned char IOCA2:1; + unsigned char IOCA3:1; + unsigned char IOCA4:1; + unsigned char IOCA5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOCA_bits_t; +extern volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; + +#ifndef NO_BIT_DEFINES +#define IOCA0 IOCA_bits.IOCA0 +#define IOCA1 IOCA_bits.IOCA1 +#define IOCA2 IOCA_bits.IOCA2 +#define IOCA3 IOCA_bits.IOCA3 +#define IOCA4 IOCA_bits.IOCA4 +#define IOCA5 IOCA_bits.IOCA5 +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LVDL0:1; + unsigned char LVDL1:1; + unsigned char LVDL2:1; + unsigned char :1; + unsigned char LVDEN:1; + unsigned char IRVST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LVDL0 LVDCON_bits.LVDL0 +#define LVDL1 LVDCON_bits.LVDL1 +#define LVDL2 LVDCON_bits.LVDL2 +#define LVDEN LVDCON_bits.LVDEN +#define IRVST LVDCON_bits.IRVST +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RAPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RAPU OPTION_REG_bits.NOT_RAPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BOD:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char NOT_WUR:1; + unsigned char SBODEN:1; + unsigned char ULPWUE:1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_POR PCON_bits.NOT_POR +#define NOT_WUR PCON_bits.NOT_WUR +#define SBODEN PCON_bits.SBODEN +#define ULPWUE PCON_bits.ULPWUE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char :1; + unsigned char OSFIE:1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char CRIE:1; + unsigned char LVDIE:1; + unsigned char EEIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define OSFIE PIE1_bits.OSFIE +#define C1IE PIE1_bits.C1IE +#define C2IE PIE1_bits.C2IE +#define CRIE PIE1_bits.CRIE +#define LVDIE PIE1_bits.LVDIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char :1; + unsigned char OSFIF:1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char CRIF:1; + unsigned char LVDIF:1; + unsigned char EEIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define OSFIF PIR1_bits.OSFIF +#define C1IF PIR1_bits.C1IF +#define C2IF PIR1_bits.C2IF +#define CRIF PIR1_bits.CRIF +#define LVDIF PIR1_bits.LVDIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char T1GINV:1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char :1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +// ----- WDA bits -------------------- +typedef union { + struct { + unsigned char WDA0:1; + unsigned char WDA1:1; + unsigned char WDA2:1; + unsigned char :1; + unsigned char WDA4:1; + unsigned char WDA5:1; + unsigned char :1; + unsigned char :1; + }; +} __WDA_bits_t; +extern volatile __WDA_bits_t __at(WDA_ADDR) WDA_bits; + +#ifndef NO_BIT_DEFINES +#define WDA0 WDA_bits.WDA0 +#define WDA1 WDA_bits.WDA1 +#define WDA2 WDA_bits.WDA2 +#define WDA4 WDA_bits.WDA4 +#define WDA5 WDA_bits.WDA5 +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUDA bits -------------------- +typedef union { + struct { + unsigned char WPUDA0:1; + unsigned char WPUDA1:1; + unsigned char WPUDA2:1; + unsigned char :1; + unsigned char WPUDA4:1; + unsigned char WPUDA5:1; + unsigned char :1; + unsigned char :1; + }; +} __WPUDA_bits_t; +extern volatile __WPUDA_bits_t __at(WPUDA_ADDR) WPUDA_bits; + +#ifndef NO_BIT_DEFINES +#define WPUDA0 WPUDA_bits.WPUDA0 +#define WPUDA1 WPUDA_bits.WPUDA1 +#define WPUDA2 WPUDA_bits.WPUDA2 +#define WPUDA4 WPUDA_bits.WPUDA4 +#define WPUDA5 WPUDA_bits.WPUDA5 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f639.h b/device/include/pic/pic16f639.h new file mode 100644 index 0000000..edfb30b --- /dev/null +++ b/device/include/pic/pic16f639.h @@ -0,0 +1,831 @@ +// +// Register Declarations for Microchip 16F639 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F639_H +#define P16F639_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define WDTCON_ADDR 0x0018 +#define CMCON0_ADDR 0x0019 +#define CMCON1_ADDR 0x001A +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define LVDCON_ADDR 0x0094 +#define WPUDA_ADDR 0x0095 +#define IOCA_ADDR 0x0096 +#define WDA_ADDR 0x0097 +#define VRCON_ADDR 0x0099 +#define EEDAT_ADDR 0x009A +#define EEDATA_ADDR 0x009A +#define EEADR_ADDR 0x009B +#define EECON1_ADDR 0x009C +#define EECON2_ADDR 0x009D +#define CRCON_ADDR 0x0110 +#define CRDAT0_ADDR 0x0111 +#define CRDAT1_ADDR 0x0112 +#define CRDAT2_ADDR 0x0113 +#define CRDAT3_ADDR 0x0114 + +// +// Memory organization. +// + + + +// LIST +// P16F639.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F639 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F639 +// 2. LIST directive in the source file +// LIST P=PIC16F639 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== +//1.00 10/28/04 Original based on P16F636.INC +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F639 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ +//Bank 0 +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; + +extern __sfr __at (PORTC_ADDR) PORTC; + +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; + +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; + +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (CMCON0_ADDR) CMCON0; +extern __sfr __at (CMCON1_ADDR) CMCON1; + +//Bank 1 +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; + +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISC_ADDR) TRISC; + +extern __sfr __at (PIE1_ADDR) PIE1; + +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; + +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (WPUDA_ADDR) WPUDA; +extern __sfr __at (IOCA_ADDR) IOCA; +extern __sfr __at (WDA_ADDR) WDA; + +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (EEDAT_ADDR) EEDAT; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//Bank 2 +extern __sfr __at (CRCON_ADDR) CRCON; +extern __sfr __at (CRDAT0_ADDR) CRDAT0; +extern __sfr __at (CRDAT1_ADDR) CRDAT1; +extern __sfr __at (CRDAT2_ADDR) CRDAT2; +extern __sfr __at (CRDAT3_ADDR) CRDAT3; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- CMCON0 Bits ------------------------------------------------------- + + +//----- CMCON1 Bits ------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits -------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + +//----- IOCA -------------------------------------------------------------- + + +//----- EECON1 ------------------------------------------------------------- + + +//----- VRCON --------------------------------------------------------- + + + +//----- CRCON ------------------------------------------------------------- + + +//----- LVDCON ------------------------------------------------------------- + + +//----- WDA ------------------------------------------------------------- + + +//----- WPUDA ------------------------------------------------------------- + + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'06', H'08'-H'09', H'0D', H'11'-H'17', H'1B'-H'1F' +// __BADRAM H'86', H'88'-H'89', H'8D', H'91'-H'93', H'98', H'9E'-H'9F', H'C0'-H'EF' +// __BADRAM H'10C'-H'10F', H'115'-H'16F', H'106', H'108'-H'109', H'186' +// __BADRAM H'188'-H'189', H'18C'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== +#define _WUREN_ON 0x2FFF +#define _WUREN_OFF 0x3FFF +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOD_ON 0x3FFF +#define _BOD_NSLEEP 0x3EFF +#define _BOD_SBODEN 0x3DFF +#define _BOD_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF + +// LIST + +// ----- CMCON0 bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON0_bits_t; +extern volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON0_bits.CM0 +#define CM1 CMCON0_bits.CM1 +#define CM2 CMCON0_bits.CM2 +#define CIS CMCON0_bits.CIS +#define C1INV CMCON0_bits.C1INV +#define C2INV CMCON0_bits.C2INV +#define C1OUT CMCON0_bits.C1OUT +#define C2OUT CMCON0_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __CMCON1_bits_t; +extern volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CMCON1_bits.C2SYNC +#define T1GSS CMCON1_bits.T1GSS +#endif /* NO_BIT_DEFINES */ + +// ----- CRCON bits -------------------- +typedef union { + struct { + unsigned char CRREG0:1; + unsigned char CRREG1:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ENC_DEC:1; + unsigned char GO:1; + }; +} __CRCON_bits_t; +extern volatile __CRCON_bits_t __at(CRCON_ADDR) CRCON_bits; + +#ifndef NO_BIT_DEFINES +#define CRREG0 CRCON_bits.CRREG0 +#define CRREG1 CRCON_bits.CRREG1 +#define ENC_DEC CRCON_bits.ENC_DEC +#define GO CRCON_bits.GO +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RAIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RAIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RAIF INTCON_bits.RAIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RAIE INTCON_bits.RAIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOCA bits -------------------- +typedef union { + struct { + unsigned char IOCA0:1; + unsigned char IOCA1:1; + unsigned char IOCA2:1; + unsigned char IOCA3:1; + unsigned char IOCA4:1; + unsigned char IOCA5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOCA_bits_t; +extern volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; + +#ifndef NO_BIT_DEFINES +#define IOCA0 IOCA_bits.IOCA0 +#define IOCA1 IOCA_bits.IOCA1 +#define IOCA2 IOCA_bits.IOCA2 +#define IOCA3 IOCA_bits.IOCA3 +#define IOCA4 IOCA_bits.IOCA4 +#define IOCA5 IOCA_bits.IOCA5 +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LVDL0:1; + unsigned char LVDL1:1; + unsigned char LVDL2:1; + unsigned char :1; + unsigned char LVDEN:1; + unsigned char IRVST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LVDL0 LVDCON_bits.LVDL0 +#define LVDL1 LVDCON_bits.LVDL1 +#define LVDL2 LVDCON_bits.LVDL2 +#define LVDEN LVDCON_bits.LVDEN +#define IRVST LVDCON_bits.IRVST +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RAPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RAPU OPTION_REG_bits.NOT_RAPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BOD:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char NOT_WUR:1; + unsigned char SBODEN:1; + unsigned char ULPWUE:1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_POR PCON_bits.NOT_POR +#define NOT_WUR PCON_bits.NOT_WUR +#define SBODEN PCON_bits.SBODEN +#define ULPWUE PCON_bits.ULPWUE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char :1; + unsigned char OSFIE:1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char CRIE:1; + unsigned char LVDIE:1; + unsigned char EEIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define OSFIE PIE1_bits.OSFIE +#define C1IE PIE1_bits.C1IE +#define C2IE PIE1_bits.C2IE +#define CRIE PIE1_bits.CRIE +#define LVDIE PIE1_bits.LVDIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char :1; + unsigned char OSFIF:1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char CRIF:1; + unsigned char LVDIF:1; + unsigned char EEIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define OSFIF PIR1_bits.OSFIF +#define C1IF PIR1_bits.C1IF +#define C2IF PIR1_bits.C2IF +#define CRIF PIR1_bits.CRIF +#define LVDIF PIR1_bits.LVDIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char T1GINV:1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char :1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +// ----- WDA bits -------------------- +typedef union { + struct { + unsigned char WDA0:1; + unsigned char WDA1:1; + unsigned char WDA2:1; + unsigned char :1; + unsigned char WDA4:1; + unsigned char WDA5:1; + unsigned char :1; + unsigned char :1; + }; +} __WDA_bits_t; +extern volatile __WDA_bits_t __at(WDA_ADDR) WDA_bits; + +#ifndef NO_BIT_DEFINES +#define WDA0 WDA_bits.WDA0 +#define WDA1 WDA_bits.WDA1 +#define WDA2 WDA_bits.WDA2 +#define WDA4 WDA_bits.WDA4 +#define WDA5 WDA_bits.WDA5 +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUDA bits -------------------- +typedef union { + struct { + unsigned char WPUDA0:1; + unsigned char WPUDA1:1; + unsigned char WPUDA2:1; + unsigned char :1; + unsigned char WPUDA4:1; + unsigned char WPUDA5:1; + unsigned char :1; + unsigned char :1; + }; +} __WPUDA_bits_t; +extern volatile __WPUDA_bits_t __at(WPUDA_ADDR) WPUDA_bits; + +#ifndef NO_BIT_DEFINES +#define WPUDA0 WPUDA_bits.WPUDA0 +#define WPUDA1 WPUDA_bits.WPUDA1 +#define WPUDA2 WPUDA_bits.WPUDA2 +#define WPUDA4 WPUDA_bits.WPUDA4 +#define WPUDA5 WPUDA_bits.WPUDA5 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f648a.h b/device/include/pic/pic16f648a.h new file mode 100644 index 0000000..77fea73 --- /dev/null +++ b/device/include/pic/pic16f648a.h @@ -0,0 +1,675 @@ +// +// Register Declarations for Microchip 16F648A Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F648A_H +#define P16F648A_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CMCON_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define EEDATA_ADDR 0x009A +#define EEADR_ADDR 0x009B +#define EECON1_ADDR 0x009C +#define EECON2_ADDR 0x009D +#define VRCON_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16F648A.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F648A microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F648A +// 2. LIST directive in the source file +// LIST P=PIC16F648A +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: +//1.00 14 Nov 2002 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F648A +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CMCON_ADDR) CMCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; +extern __sfr __at (VRCON_ADDR) VRCON; + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'01FF' +// __BADRAM H'07'-H'09', H'0D', H'13'-H'14', H'1B'-H'1E' +// __BADRAM H'87'-H'89', H'8D', H'8F'-H'91', H'93'-H'97', H'9E' +// __BADRAM H'105', H'107'-H'109', H'10C'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18C'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF //Backwards compatability to 16F62X +#define _BODEN_OFF 0x3FBF //Backwards compatability to 16F62X +#define _BOREN_ON 0x3FFF +#define _BOREN_OFF 0x3FBF +#define _CP_ON 0x1FFF +#define _CP_OFF 0x3FFF +#define _DATA_CP_ON 0x3EFF +#define _DATA_CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _RC_OSC_CLKOUT 0x3FFF +#define _RC_OSC_NOCLKOUT 0x3FFE +#define _ER_OSC_CLKOUT 0x3FFF //Backwards compatability to 16F62X +#define _ER_OSC_NOCLKOUT 0x3FFE //Backwards compatability to 16F62X +#define _INTOSC_OSC_CLKOUT 0x3FFD +#define _INTOSC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD //Backwards compatability to 16F62X +#define _INTRC_OSC_NOCLKOUT 0x3FFC //Backwards compatability to 16F62X +#define _EXTCLK_OSC 0x3FEF +#define _HS_OSC 0x3FEE +#define _XT_OSC 0x3FED +#define _LP_OSC 0x3FEC + +// LIST + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1INV CMCON_bits.C1INV +#define C2INV CMCON_bits.C2INV +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char OSCF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_POR PCON_bits.NOT_POR +#define OSCF PCON_bits.OSCF +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char :1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char CMIE:1; + unsigned char EEIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define CMIE PIE1_bits.CMIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char :1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char CMIF:1; + unsigned char EEIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define CMIF PIR1_bits.CMIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char RA6:1; + unsigned char RA7:1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#define RA6 PORTA_bits.RA6 +#define RA7 PORTA_bits.RA7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADEN RCSTA_bits.ADEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char TRISA6:1; + unsigned char TRISA7:1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#define TRISA6 TRISA_bits.TRISA6 +#define TRISA7 TRISA_bits.TRISA7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char VROE:1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VROE VRCON_bits.VROE +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f676.h b/device/include/pic/pic16f676.h new file mode 100644 index 0000000..7a5f39b --- /dev/null +++ b/device/include/pic/pic16f676.h @@ -0,0 +1,734 @@ +// +// Register Declarations for Microchip 16F676 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F676_H +#define P16F676_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define CMCON_ADDR 0x0019 +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define OSCCAL_ADDR 0x0090 +#define ANSEL_ADDR 0x0091 +#define WPU_ADDR 0x0095 +#define WPUA_ADDR 0x0095 +#define IOC_ADDR 0x0096 +#define IOCA_ADDR 0x0096 +#define VRCON_ADDR 0x0099 +#define EEDATA_ADDR 0x009A +#define EEDAT_ADDR 0x009A +#define EEADR_ADDR 0x009B +#define EECON1_ADDR 0x009C +#define EECON2_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16F676.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F676 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F676 +// 2. LIST directive in the source file +// LIST P=PIC16F676 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== +//1.00 05/13/02 Original + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F676 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; + +extern __sfr __at (PORTC_ADDR) PORTC; + +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; + +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; + +extern __sfr __at (CMCON_ADDR) CMCON; + +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; + +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISC_ADDR) TRISC; + +extern __sfr __at (PIE1_ADDR) PIE1; + +extern __sfr __at (PCON_ADDR) PCON; + +extern __sfr __at (OSCCAL_ADDR) OSCCAL; +extern __sfr __at (ANSEL_ADDR) ANSEL; + +extern __sfr __at (WPU_ADDR) WPU; +extern __sfr __at (WPUA_ADDR) WPUA; +extern __sfr __at (IOC_ADDR) IOC; +extern __sfr __at (IOCA_ADDR) IOCA; + +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEDAT_ADDR) EEDAT; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- COMCON Bits -------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCAL Bits -------------------------------------------------------- + + +//----- ANSEL -------------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//----- EECON1 ------------------------------------------------------------- + + +//----- ADCON1 ------------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'FF' +// __BADRAM H'06', H'08'-H'09', H'0D', H'11'-H'18', H'1A'-H'1D', H'60'-H'7F' +// __BADRAM H'86', H'88'-H'89', H'8D', H'8F', H'92'-H'94', H'97'-H'98', H'E0'-H'FF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CPD 0x3EFF +#define _CPD_OFF 0x3FFF +#define _CP 0x3F7F +#define _CP_OFF 0x3FFF +#define _BODEN 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char :1; + unsigned char VCFG:1; + unsigned char ADFM:1; + }; + struct { + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define VCFG ADCON0_bits.VCFG +#define ADFM ADCON0_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + unsigned char ADCS2:1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define ADCS0 ADCON1_bits.ADCS0 +#define ADCS1 ADCON1_bits.ADCS1 +#define ADCS2 ADCON1_bits.ADCS2 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSEL bits -------------------- +typedef union { + struct { + unsigned char ANS0:1; + unsigned char ANS1:1; + unsigned char ANS2:1; + unsigned char ANS3:1; + unsigned char ANS4:1; + unsigned char ANS5:1; + unsigned char ANS6:1; + unsigned char ANS7:1; + }; +} __ANSEL_bits_t; +extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; + +#ifndef NO_BIT_DEFINES +#define ANS0 ANSEL_bits.ANS0 +#define ANS1 ANSEL_bits.ANS1 +#define ANS2 ANSEL_bits.ANS2 +#define ANS3 ANSEL_bits.ANS3 +#define ANS4 ANSEL_bits.ANS4 +#define ANS5 ANSEL_bits.ANS5 +#define ANS6 ANSEL_bits.ANS6 +#define ANS7 ANSEL_bits.ANS7 +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char CINV:1; + unsigned char :1; + unsigned char COUT:1; + unsigned char :1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define CINV CMCON_bits.CINV +#define COUT CMCON_bits.COUT +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RAIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RAIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RAIF INTCON_bits.RAIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RAIE INTCON_bits.RAIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_GPPU:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RAPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_GPPU OPTION_REG_bits.NOT_GPPU +#define NOT_RAPU OPTION_REG_bits.NOT_RAPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCAL bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char CAL0:1; + unsigned char CAL1:1; + unsigned char CAL2:1; + unsigned char CAL3:1; + unsigned char CAL4:1; + unsigned char CAL5:1; + }; +} __OSCCAL_bits_t; +extern volatile __OSCCAL_bits_t __at(OSCCAL_ADDR) OSCCAL_bits; + +#ifndef NO_BIT_DEFINES +#define CAL0 OSCCAL_bits.CAL0 +#define CAL1 OSCCAL_bits.CAL1 +#define CAL2 OSCCAL_bits.CAL2 +#define CAL3 OSCCAL_bits.CAL3 +#define CAL4 OSCCAL_bits.CAL4 +#define CAL5 OSCCAL_bits.CAL5 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BOD:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char T1IE:1; + unsigned char :1; + unsigned char :1; + unsigned char CMIE:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char EEIE:1; + }; + struct { + unsigned char TMR1IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IE PIE1_bits.T1IE +#define TMR1IE PIE1_bits.TMR1IE +#define CMIE PIE1_bits.CMIE +#define ADIE PIE1_bits.ADIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char T1IF:1; + unsigned char :1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char EEIF:1; + }; + struct { + unsigned char TMR1IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IF PIR1_bits.T1IF +#define TMR1IF PIR1_bits.TMR1IF +#define CMIF PIR1_bits.CMIF +#define ADIF PIR1_bits.ADIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char :1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f684.h b/device/include/pic/pic16f684.h new file mode 100644 index 0000000..9893b06 --- /dev/null +++ b/device/include/pic/pic16f684.h @@ -0,0 +1,1015 @@ +// +// Register Declarations for Microchip 16F684 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F684_H +#define P16F684_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define CCPR1L_ADDR 0x0013 +#define CCPR1H_ADDR 0x0014 +#define CCP1CON_ADDR 0x0015 +#define PWM1CON_ADDR 0x0016 +#define ECCPAS_ADDR 0x0017 +#define WDTCON_ADDR 0x0018 +#define CMCON0_ADDR 0x0019 +#define CMCON1_ADDR 0x001A +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define ANSEL_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define WPU_ADDR 0x0095 +#define WPUA_ADDR 0x0095 +#define IOC_ADDR 0x0096 +#define IOCA_ADDR 0x0096 +#define VRCON_ADDR 0x0099 +#define EEDAT_ADDR 0x009A +#define EEDATA_ADDR 0x009A +#define EEADR_ADDR 0x009B +#define EECON1_ADDR 0x009C +#define EECON2_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16F684.INC Standard Header File, Version 1.03 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F684 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F684 +// 2. LIST directive in the source file +// LIST P=PIC16F684 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== +//1.00 03/20/03 Original +//1.01 08/04/03 Updated CMCON1 address +//1.02 08/05/03 Updated names to match datasheet +//1.03 08/11/03 Updated ULPWUE bit name to match datasheet +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F684 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; + +extern __sfr __at (PORTC_ADDR) PORTC; + +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; + +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (PWM1CON_ADDR) PWM1CON; +extern __sfr __at (ECCPAS_ADDR) ECCPAS; +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (CMCON0_ADDR) CMCON0; +extern __sfr __at (CMCON1_ADDR) CMCON1; + +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; + +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISC_ADDR) TRISC; + +extern __sfr __at (PIE1_ADDR) PIE1; + +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (PR2_ADDR) PR2; + +extern __sfr __at (WPU_ADDR) WPU; +extern __sfr __at (WPUA_ADDR) WPUA; +extern __sfr __at (IOC_ADDR) IOC; +extern __sfr __at (IOCA_ADDR) IOCA; + +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (EEDAT_ADDR) EEDAT; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- PWM1CON Bits ------------------------------------------------------- + + +//----- ECCPAS Bits -------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- COMCON0 Bits ------------------------------------------------------- + + +//----- COMCON1 Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits -------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + +//----- ANSEL -------------------------------------------------------------- + + +//----- IOC -------------------------------------------------------------- + + +//----- IOCA -------------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//----- EECON1 ------------------------------------------------------------- + + +//----- ADCON1 ------------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'FF' +// __BADRAM H'06', H'08'-H'09', H'0D', H'1B'-H'1D' +// __BADRAM H'86', H'88'-H'89', H'8D', H'93'-H'94', H'97'-H'98', H'C0'-H'EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOD_ON 0x3FFF +#define _BOD_NSLEEP 0x3EFF +#define _BOD_SBODEN 0x3DFF +#define _BOD_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF +#define _INTOSCIO 0x3FFC +#define _INTOSC 0x3FFD +#define _EXTRCIO 0x3FFE +#define _EXTRC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char :1; + unsigned char VCFG:1; + unsigned char ADFM:1; + }; + struct { + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define VCFG ADCON0_bits.VCFG +#define ADFM ADCON0_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + unsigned char ADCS2:1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define ADCS0 ADCON1_bits.ADCS0 +#define ADCS1 ADCON1_bits.ADCS1 +#define ADCS2 ADCON1_bits.ADCS2 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSEL bits -------------------- +typedef union { + struct { + unsigned char ANS0:1; + unsigned char ANS1:1; + unsigned char ANS2:1; + unsigned char ANS3:1; + unsigned char ANS4:1; + unsigned char ANS5:1; + unsigned char ANS6:1; + unsigned char ANS7:1; + }; +} __ANSEL_bits_t; +extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; + +#ifndef NO_BIT_DEFINES +#define ANS0 ANSEL_bits.ANS0 +#define ANS1 ANSEL_bits.ANS1 +#define ANS2 ANSEL_bits.ANS2 +#define ANS3 ANSEL_bits.ANS3 +#define ANS4 ANSEL_bits.ANS4 +#define ANS5 ANSEL_bits.ANS5 +#define ANS6 ANSEL_bits.ANS6 +#define ANS7 ANSEL_bits.ANS7 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char DC1B0:1; + unsigned char DC1B1:1; + unsigned char P1M0:1; + unsigned char P1M1:1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define DC1B0 CCP1CON_bits.DC1B0 +#define DC1B1 CCP1CON_bits.DC1B1 +#define P1M0 CCP1CON_bits.P1M0 +#define P1M1 CCP1CON_bits.P1M1 +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON0 bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON0_bits_t; +extern volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON0_bits.CM0 +#define CM1 CMCON0_bits.CM1 +#define CM2 CMCON0_bits.CM2 +#define CIS CMCON0_bits.CIS +#define C1INV CMCON0_bits.C1INV +#define C2INV CMCON0_bits.C2INV +#define C1OUT CMCON0_bits.C1OUT +#define C2OUT CMCON0_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __CMCON1_bits_t; +extern volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CMCON1_bits.C2SYNC +#define T1GSS CMCON1_bits.T1GSS +#endif /* NO_BIT_DEFINES */ + +// ----- ECCPAS bits -------------------- +typedef union { + struct { + unsigned char PSSBD0:1; + unsigned char PSSBD1:1; + unsigned char PSSAC0:1; + unsigned char PSSAC1:1; + unsigned char ECCPAS0:1; + unsigned char ECCPAS1:1; + unsigned char ECCPAS2:1; + unsigned char ECCPASE:1; + }; +} __ECCPAS_bits_t; +extern volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits; + +#ifndef NO_BIT_DEFINES +#define PSSBD0 ECCPAS_bits.PSSBD0 +#define PSSBD1 ECCPAS_bits.PSSBD1 +#define PSSAC0 ECCPAS_bits.PSSAC0 +#define PSSAC1 ECCPAS_bits.PSSAC1 +#define ECCPAS0 ECCPAS_bits.ECCPAS0 +#define ECCPAS1 ECCPAS_bits.ECCPAS1 +#define ECCPAS2 ECCPAS_bits.ECCPAS2 +#define ECCPASE ECCPAS_bits.ECCPASE +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RAIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RAIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RAIF INTCON_bits.RAIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RAIE INTCON_bits.RAIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOC bits -------------------- +typedef union { + struct { + unsigned char IOC0:1; + unsigned char IOC1:1; + unsigned char IOC2:1; + unsigned char IOC3:1; + unsigned char IOC4:1; + unsigned char IOC5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOC_bits_t; +extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; + +#ifndef NO_BIT_DEFINES +#define IOC0 IOC_bits.IOC0 +#define IOC1 IOC_bits.IOC1 +#define IOC2 IOC_bits.IOC2 +#define IOC3 IOC_bits.IOC3 +#define IOC4 IOC_bits.IOC4 +#define IOC5 IOC_bits.IOC5 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCA bits -------------------- +typedef union { + struct { + unsigned char IOCA0:1; + unsigned char IOCA1:1; + unsigned char IOCA2:1; + unsigned char IOCA3:1; + unsigned char IOCA4:1; + unsigned char IOCA5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOCA_bits_t; +extern volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; + +#ifndef NO_BIT_DEFINES +#define IOCA0 IOCA_bits.IOCA0 +#define IOCA1 IOCA_bits.IOCA1 +#define IOCA2 IOCA_bits.IOCA2 +#define IOCA3 IOCA_bits.IOCA3 +#define IOCA4 IOCA_bits.IOCA4 +#define IOCA5 IOCA_bits.IOCA5 +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RAPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RAPU OPTION_REG_bits.NOT_RAPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BOD:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char SBODEN:1; + unsigned char ULPWUE:1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_POR PCON_bits.NOT_POR +#define SBODEN PCON_bits.SBODEN +#define ULPWUE PCON_bits.ULPWUE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char T1IE:1; + unsigned char T2IE:1; + unsigned char OSFIE:1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char CCP1IE:1; + unsigned char ADIE:1; + unsigned char EEIE:1; + }; + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IE PIE1_bits.T1IE +#define TMR1IE PIE1_bits.TMR1IE +#define T2IE PIE1_bits.T2IE +#define TMR2IE PIE1_bits.TMR2IE +#define OSFIE PIE1_bits.OSFIE +#define C1IE PIE1_bits.C1IE +#define C2IE PIE1_bits.C2IE +#define CCP1IE PIE1_bits.CCP1IE +#define ADIE PIE1_bits.ADIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char T1IF:1; + unsigned char T2IF:1; + unsigned char OSFIF:1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char CCP1IF:1; + unsigned char ADIF:1; + unsigned char EEIF:1; + }; + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IF PIR1_bits.T1IF +#define TMR1IF PIR1_bits.TMR1IF +#define T2IF PIR1_bits.T2IF +#define TMR2IF PIR1_bits.TMR2IF +#define OSFIF PIR1_bits.OSFIF +#define C1IF PIR1_bits.C1IF +#define C2IF PIR1_bits.C2IF +#define CCP1IF PIR1_bits.CCP1IF +#define ADIF PIR1_bits.ADIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PWM1CON bits -------------------- +typedef union { + struct { + unsigned char PDC0:1; + unsigned char PDC1:1; + unsigned char PDC2:1; + unsigned char PDC3:1; + unsigned char PDC4:1; + unsigned char PDC5:1; + unsigned char PDC6:1; + unsigned char PRSEN:1; + }; +} __PWM1CON_bits_t; +extern volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits; + +#ifndef NO_BIT_DEFINES +#define PDC0 PWM1CON_bits.PDC0 +#define PDC1 PWM1CON_bits.PDC1 +#define PDC2 PWM1CON_bits.PDC2 +#define PDC3 PWM1CON_bits.PDC3 +#define PDC4 PWM1CON_bits.PDC4 +#define PDC5 PWM1CON_bits.PDC5 +#define PDC6 PWM1CON_bits.PDC6 +#define PRSEN PWM1CON_bits.PRSEN +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char T1GINV:1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char :1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f685.h b/device/include/pic/pic16f685.h new file mode 100644 index 0000000..144565d --- /dev/null +++ b/device/include/pic/pic16f685.h @@ -0,0 +1,1362 @@ +// +// Register Declarations for Microchip 16F685 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F685_H +#define P16F685_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define PWM1CON_ADDR 0x001C +#define ECCPAS_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define PR2_ADDR 0x0092 +#define WPU_ADDR 0x0095 +#define WPUA_ADDR 0x0095 +#define IOC_ADDR 0x0096 +#define IOCA_ADDR 0x0096 +#define WDTCON_ADDR 0x0097 +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDAT_ADDR 0x010C +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define WPUB_ADDR 0x0115 +#define IOCB_ADDR 0x0116 +#define VRCON_ADDR 0x0118 +#define CM1CON0_ADDR 0x0119 +#define CM2CON0_ADDR 0x011A +#define CM2CON1_ADDR 0x011B +#define ANSEL_ADDR 0x011E +#define ANSELH_ADDR 0x011F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D +#define PSTRCON_ADDR 0x019D +#define SRCON_ADDR 0x019E + +// +// Memory organization. +// + + + +// LIST +// P16F685.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F685 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F685 +// 2. LIST directive in the source file +// LIST P=PIC16F685 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== +//1.00 10/12/04 Original +//2.00 04/21/05 Modified file to match released datasheet +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F685 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; + +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; + + +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; + + +extern __sfr __at (PWM1CON_ADDR) PWM1CON; +extern __sfr __at (ECCPAS_ADDR) ECCPAS; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; + +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; + +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; + +extern __sfr __at (PR2_ADDR) PR2; + + +extern __sfr __at (WPU_ADDR) WPU; +extern __sfr __at (WPUA_ADDR) WPUA; +extern __sfr __at (IOC_ADDR) IOC; +extern __sfr __at (IOCA_ADDR) IOCA; +extern __sfr __at (WDTCON_ADDR) WDTCON; + + + +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + + +extern __sfr __at (EEDAT_ADDR) EEDAT; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + + +extern __sfr __at (WPUB_ADDR) WPUB; +extern __sfr __at (IOCB_ADDR) IOCB; + +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (CM1CON0_ADDR) CM1CON0; +extern __sfr __at (CM2CON0_ADDR) CM2CON0; +extern __sfr __at (CM2CON1_ADDR) CM2CON1; + +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (ANSELH_ADDR) ANSELH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + + +extern __sfr __at (PSTRCON_ADDR) PSTRCON; +extern __sfr __at (SRCON_ADDR) SRCON; + + + +//----- BANK 0 REGISTER DEFINITIONS ---------------------------------------- +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- PWM1CON Bits ------------------------------------------------------- + + +//----- ECCPAS Bits -------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- BANK 1 REGISTER DEFINITIONS ---------------------------------------- +//----- OPTION Bits -------------------------------------------------------- + + +//----- TRISA Bits -------------------------------------------------------- + + +//----- TRISB Bits -------------------------------------------------------- + + +//----- TRISC Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits -------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + +//----- WPUA -------------------------------------------------------------- + + + +//----- IOC -------------------------------------------------------------- + + +//----- IOCA -------------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- ADCON1 ------------------------------------------------------------- + + +//----- BANK 2 REGISTER DEFINITIONS ---------------------------------------- +//----- WPUB Bits ---------------------------------------------------------- + + +//----- IOCB -------------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//----- CM1CON0 Bits ------------------------------------------------------- + + + +//----- CM2CON0 Bits ------------------------------------------------------- + + + +//----- CM2CON1 Bits ------------------------------------------------------- + + +//----- ANSELH -------------------------------------------------------------- + + +//----- ANSEL -------------------------------------------------------------- + + +//----- BANK 3 REGISTER DEFINITIONS ---------------------------------------- +//----- EECON1 ------------------------------------------------------------- + + +//----- PSTRCON ------------------------------------------------------------- + + +//----- SRCON --------------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'08'-H'09', H'13'-H'14', H'18'-H'1B' +// __BADRAM H'88'-H'89', H'91', H'93'-H'94', H'98'-H'9D' +// __BADRAM H'108'-H'109', H'110'-H'114', H'117', H'11C'-H'11D' +// __BADRAM H'188'-H'189', H'18E'-H'19C', H'19F'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOR_ON 0x3FFF +#define _BOR_NSLEEP 0x3EFF +#define _BOR_SBODEN 0x3DFF +#define _BOR_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF +#define _INTOSCIO 0x3FFC +#define _INTOSC 0x3FFD +#define _EXTRCIO 0x3FFE +#define _EXTRC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char CHS3:1; + unsigned char VCFG:1; + unsigned char ADFM:1; + }; + struct { + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define CHS3 ADCON0_bits.CHS3 +#define VCFG ADCON0_bits.VCFG +#define ADFM ADCON0_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + unsigned char ADCS2:1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define ADCS0 ADCON1_bits.ADCS0 +#define ADCS1 ADCON1_bits.ADCS1 +#define ADCS2 ADCON1_bits.ADCS2 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSEL bits -------------------- +typedef union { + struct { + unsigned char ANS0:1; + unsigned char ANS1:1; + unsigned char ANS2:1; + unsigned char ANS3:1; + unsigned char ANS4:1; + unsigned char ANS5:1; + unsigned char ANS6:1; + unsigned char ANS7:1; + }; +} __ANSEL_bits_t; +extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; + +#ifndef NO_BIT_DEFINES +#define ANS0 ANSEL_bits.ANS0 +#define ANS1 ANSEL_bits.ANS1 +#define ANS2 ANSEL_bits.ANS2 +#define ANS3 ANSEL_bits.ANS3 +#define ANS4 ANSEL_bits.ANS4 +#define ANS5 ANSEL_bits.ANS5 +#define ANS6 ANSEL_bits.ANS6 +#define ANS7 ANSEL_bits.ANS7 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSELH bits -------------------- +typedef union { + struct { + unsigned char ANS8:1; + unsigned char ANS9:1; + unsigned char ANS10:1; + unsigned char ANS11:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ANSELH_bits_t; +extern volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits; + +#ifndef NO_BIT_DEFINES +#define ANS8 ANSELH_bits.ANS8 +#define ANS9 ANSELH_bits.ANS9 +#define ANS10 ANSELH_bits.ANS10 +#define ANS11 ANSELH_bits.ANS11 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char DC1B0:1; + unsigned char DC1B1:1; + unsigned char P1M0:1; + unsigned char P1M1:1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define DC1B0 CCP1CON_bits.DC1B0 +#define DC1B1 CCP1CON_bits.DC1B1 +#define P1M0 CCP1CON_bits.P1M0 +#define P1M1 CCP1CON_bits.P1M1 +#endif /* NO_BIT_DEFINES */ + +// ----- CM1CON0 bits -------------------- +typedef union { + struct { + unsigned char C1CH0:1; + unsigned char C1CH1:1; + unsigned char C1R:1; + unsigned char :1; + unsigned char C1POL:1; + unsigned char C1OE:1; + unsigned char C1OUT:1; + unsigned char C1ON:1; + }; +} __CM1CON0_bits_t; +extern volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C1CH0 CM1CON0_bits.C1CH0 +#define C1CH1 CM1CON0_bits.C1CH1 +#define C1R CM1CON0_bits.C1R +#define C1POL CM1CON0_bits.C1POL +#define C1OE CM1CON0_bits.C1OE +#define C1OUT CM1CON0_bits.C1OUT +#define C1ON CM1CON0_bits.C1ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON0 bits -------------------- +typedef union { + struct { + unsigned char C2CH0:1; + unsigned char C2CH1:1; + unsigned char C2R:1; + unsigned char :1; + unsigned char C2POL:1; + unsigned char C2OE:1; + unsigned char C2OUT:1; + unsigned char C2ON:1; + }; +} __CM2CON0_bits_t; +extern volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C2CH0 CM2CON0_bits.C2CH0 +#define C2CH1 CM2CON0_bits.C2CH1 +#define C2R CM2CON0_bits.C2R +#define C2POL CM2CON0_bits.C2POL +#define C2OE CM2CON0_bits.C2OE +#define C2OUT CM2CON0_bits.C2OUT +#define C2ON CM2CON0_bits.C2ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char MC2OUT:1; + unsigned char MC1OUT:1; + }; +} __CM2CON1_bits_t; +extern volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CM2CON1_bits.C2SYNC +#define T1GSS CM2CON1_bits.T1GSS +#define MC2OUT CM2CON1_bits.MC2OUT +#define MC1OUT CM2CON1_bits.MC1OUT +#endif /* NO_BIT_DEFINES */ + +// ----- ECCPAS bits -------------------- +typedef union { + struct { + unsigned char PSSBD0:1; + unsigned char PSSBD1:1; + unsigned char PSSAC0:1; + unsigned char PSSAC1:1; + unsigned char ECCPAS0:1; + unsigned char ECCPAS1:1; + unsigned char ECCPAS2:1; + unsigned char ECCPASE:1; + }; +} __ECCPAS_bits_t; +extern volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits; + +#ifndef NO_BIT_DEFINES +#define PSSBD0 ECCPAS_bits.PSSBD0 +#define PSSBD1 ECCPAS_bits.PSSBD1 +#define PSSAC0 ECCPAS_bits.PSSAC0 +#define PSSAC1 ECCPAS_bits.PSSAC1 +#define ECCPAS0 ECCPAS_bits.ECCPAS0 +#define ECCPAS1 ECCPAS_bits.ECCPAS1 +#define ECCPAS2 ECCPAS_bits.ECCPAS2 +#define ECCPASE ECCPAS_bits.ECCPASE +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RABIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RABIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RABIF INTCON_bits.RABIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RABIE INTCON_bits.RABIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOC bits -------------------- +typedef union { + struct { + unsigned char IOC0:1; + unsigned char IOC1:1; + unsigned char IOC2:1; + unsigned char IOC3:1; + unsigned char IOC4:1; + unsigned char IOC5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOC_bits_t; +extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; + +#ifndef NO_BIT_DEFINES +#define IOC0 IOC_bits.IOC0 +#define IOC1 IOC_bits.IOC1 +#define IOC2 IOC_bits.IOC2 +#define IOC3 IOC_bits.IOC3 +#define IOC4 IOC_bits.IOC4 +#define IOC5 IOC_bits.IOC5 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCA bits -------------------- +typedef union { + struct { + unsigned char IOCA0:1; + unsigned char IOCA1:1; + unsigned char IOCA2:1; + unsigned char IOCA3:1; + unsigned char IOCA4:1; + unsigned char IOCA5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOCA_bits_t; +extern volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; + +#ifndef NO_BIT_DEFINES +#define IOCA0 IOCA_bits.IOCA0 +#define IOCA1 IOCA_bits.IOCA1 +#define IOCA2 IOCA_bits.IOCA2 +#define IOCA3 IOCA_bits.IOCA3 +#define IOCA4 IOCA_bits.IOCA4 +#define IOCA5 IOCA_bits.IOCA5 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char IOCB4:1; + unsigned char IOCB5:1; + unsigned char IOCB6:1; + unsigned char IOCB7:1; + }; +} __IOCB_bits_t; +extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; + +#ifndef NO_BIT_DEFINES +#define IOCB4 IOCB_bits.IOCB4 +#define IOCB5 IOCB_bits.IOCB5 +#define IOCB6 IOCB_bits.IOCB6 +#define IOCB7 IOCB_bits.IOCB7 +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RABPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RABPU OPTION_REG_bits.NOT_RABPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BOD:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char SBOREN:1; + unsigned char ULPWUE:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define SBOREN PCON_bits.SBOREN +#define ULPWUE PCON_bits.ULPWUE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char T1IE:1; + unsigned char T2IE:1; + unsigned char CCP1IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char :1; + }; + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IE PIE1_bits.T1IE +#define TMR1IE PIE1_bits.TMR1IE +#define T2IE PIE1_bits.T2IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIE:1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char OSFIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIE PIE2_bits.EEIE +#define C1IE PIE2_bits.C1IE +#define C2IE PIE2_bits.C2IE +#define OSFIE PIE2_bits.OSFIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char T1IF:1; + unsigned char T2IF:1; + unsigned char CCP1IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char :1; + }; + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IF PIR1_bits.T1IF +#define TMR1IF PIR1_bits.TMR1IF +#define T2IF PIR1_bits.T2IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIF:1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char OSFIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIF PIR2_bits.EEIF +#define C1IF PIR2_bits.C1IF +#define C2IF PIR2_bits.C2IF +#define OSFIF PIR2_bits.OSFIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PSTRCON bits -------------------- +typedef union { + struct { + unsigned char STRA:1; + unsigned char STRB:1; + unsigned char STRC:1; + unsigned char STRD:1; + unsigned char STRSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PSTRCON_bits_t; +extern volatile __PSTRCON_bits_t __at(PSTRCON_ADDR) PSTRCON_bits; + +#ifndef NO_BIT_DEFINES +#define STRA PSTRCON_bits.STRA +#define STRB PSTRCON_bits.STRB +#define STRC PSTRCON_bits.STRC +#define STRD PSTRCON_bits.STRD +#define STRSYNC PSTRCON_bits.STRSYNC +#endif /* NO_BIT_DEFINES */ + +// ----- PWM1CON bits -------------------- +typedef union { + struct { + unsigned char PDC0:1; + unsigned char PDC1:1; + unsigned char PDC2:1; + unsigned char PDC3:1; + unsigned char PDC4:1; + unsigned char PDC5:1; + unsigned char PDC6:1; + unsigned char PRSEN:1; + }; +} __PWM1CON_bits_t; +extern volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits; + +#ifndef NO_BIT_DEFINES +#define PDC0 PWM1CON_bits.PDC0 +#define PDC1 PWM1CON_bits.PDC1 +#define PDC2 PWM1CON_bits.PDC2 +#define PDC3 PWM1CON_bits.PDC3 +#define PDC4 PWM1CON_bits.PDC4 +#define PDC5 PWM1CON_bits.PDC5 +#define PDC6 PWM1CON_bits.PDC6 +#define PRSEN PWM1CON_bits.PRSEN +#endif /* NO_BIT_DEFINES */ + +// ----- SRCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char PULSR:1; + unsigned char PULSS:1; + unsigned char C2REN:1; + unsigned char C1SEN:1; + unsigned char SR0:1; + unsigned char SR1:1; + }; +} __SRCON_bits_t; +extern volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits; + +#ifndef NO_BIT_DEFINES +#define PULSR SRCON_bits.PULSR +#define PULSS SRCON_bits.PULSS +#define C2REN SRCON_bits.C2REN +#define C1SEN SRCON_bits.C1SEN +#define SR0 SRCON_bits.SR0 +#define SR1 SRCON_bits.SR1 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char T1GINV:1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char VP6EN:1; + unsigned char VRR:1; + unsigned char C2VREN:1; + unsigned char C1VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VP6EN VRCON_bits.VP6EN +#define VRR VRCON_bits.VRR +#define C2VREN VRCON_bits.C2VREN +#define C1VREN VRCON_bits.C1VREN +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUA bits -------------------- +typedef union { + struct { + unsigned char WPUA0:1; + unsigned char WPUA1:1; + unsigned char WPUA2:1; + unsigned char :1; + unsigned char WPUA4:1; + unsigned char WPUA5:1; + unsigned char :1; + unsigned char :1; + }; +} __WPUA_bits_t; +extern volatile __WPUA_bits_t __at(WPUA_ADDR) WPUA_bits; + +#ifndef NO_BIT_DEFINES +#define WPUA0 WPUA_bits.WPUA0 +#define WPUA1 WPUA_bits.WPUA1 +#define WPUA2 WPUA_bits.WPUA2 +#define WPUA4 WPUA_bits.WPUA4 +#define WPUA5 WPUA_bits.WPUA5 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char WPUB4:1; + unsigned char WPUB5:1; + unsigned char WPUB6:1; + unsigned char WPUB7:1; + }; +} __WPUB_bits_t; +extern volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + +#ifndef NO_BIT_DEFINES +#define WPUB4 WPUB_bits.WPUB4 +#define WPUB5 WPUB_bits.WPUB5 +#define WPUB6 WPUB_bits.WPUB6 +#define WPUB7 WPUB_bits.WPUB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f687.h b/device/include/pic/pic16f687.h new file mode 100644 index 0000000..65674c2 --- /dev/null +++ b/device/include/pic/pic16f687.h @@ -0,0 +1,1483 @@ +// +// Register Declarations for Microchip 16F687 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F687_H +#define P16F687_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define SSPADD_ADDR 0x0093 +#define MSK_ADDR 0x0093 +#define SSPMSK_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define WPU_ADDR 0x0095 +#define WPUA_ADDR 0x0095 +#define IOC_ADDR 0x0096 +#define IOCA_ADDR 0x0096 +#define WDTCON_ADDR 0x0097 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define SPBRGH_ADDR 0x009A +#define BAUDCTL_ADDR 0x009B +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDAT_ADDR 0x010C +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define WPUB_ADDR 0x0115 +#define IOCB_ADDR 0x0116 +#define VRCON_ADDR 0x0118 +#define CM1CON0_ADDR 0x0119 +#define CM2CON0_ADDR 0x011A +#define CM2CON1_ADDR 0x011B +#define ANSEL_ADDR 0x011E +#define ANSELH_ADDR 0x011F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D +#define SRCON_ADDR 0x019E + +// +// Memory organization. +// + + + +// LIST +// P16F687.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F687 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F687 +// 2. LIST directive in the source file +// LIST P=PIC16F687 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== +//1.00 10/12/04 Original +//2.00 04/21/05 Modified to match released datasheet +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F687 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; + +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; + + +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; + + +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; + +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; + +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; + +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; + +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (MSK_ADDR) MSK; +extern __sfr __at (SSPMSK_ADDR) SSPMSK; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (WPU_ADDR) WPU; +extern __sfr __at (WPUA_ADDR) WPUA; +extern __sfr __at (IOC_ADDR) IOC; +extern __sfr __at (IOCA_ADDR) IOCA; +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (SPBRGH_ADDR) SPBRGH; +extern __sfr __at (BAUDCTL_ADDR) BAUDCTL; + + +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + + +extern __sfr __at (EEDAT_ADDR) EEDAT; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + + +extern __sfr __at (WPUB_ADDR) WPUB; +extern __sfr __at (IOCB_ADDR) IOCB; + +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (CM1CON0_ADDR) CM1CON0; +extern __sfr __at (CM2CON0_ADDR) CM2CON0; +extern __sfr __at (CM2CON1_ADDR) CM2CON1; + +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (ANSELH_ADDR) ANSELH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + + +extern __sfr __at (SRCON_ADDR) SRCON; + + + +//----- BANK 0 REGISTER DEFINITIONS ---------------------------------------- +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + + +//----- SSPCON Bits -------------------------------------------------------- + + + +//----- RCSTA Bits --------------------------------------------------------- + + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- BANK 1 REGISTER DEFINITIONS ---------------------------------------- +//----- OPTION Bits -------------------------------------------------------- + + +//----- TRISA Bits -------------------------------------------------------- + + +//----- TRISB Bits -------------------------------------------------------- + + +//----- TRISC Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits -------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + +//----- SSPSTAT Bits -------------------------------------------------------- + + +//----- WPUA -------------------------------------------------------------- + + + +//----- IOC -------------------------------------------------------------- + + +//----- IOCA -------------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- TXSTA Bits ------------------------------------------------------- + + +//----- SPBRG Bits ------------------------------------------------------- + + +//----- SPBRGH Bits ------------------------------------------------------- + + +//----- BAUDCTL Bits ------------------------------------------------------- + + + + +//----- ADCON1 ------------------------------------------------------------- + + +//----- BANK 2 REGISTER DEFINITIONS ---------------------------------------- +//----- WPUB Bits ---------------------------------------------------------- + + +//----- IOCB -------------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//----- CM1CON0 Bits ------------------------------------------------------- + + + +//----- CM2CON0 Bits ------------------------------------------------------- + + + +//----- CM2CON1 Bits ------------------------------------------------------- + + +//----- ANSELH ------------------------------------------------------------- + + +//----- ANSEL -------------------------------------------------------------- + + +//----- BANK 3 REGISTER DEFINITIONS ---------------------------------------- +//----- EECON1 ------------------------------------------------------------- + + +//----- SRCON --------------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'08'-H'09', H'11'-H'12', H'15'-H'17', H'1B'- H'1D' +// __BADRAM H'88'-H'89', H'91'-H'92', H'9C'-H'9D', H'C0'-H'EF' +// __BADRAM H'108'-H'109', H'10E'-H'114', H'117', H'11C'-H'11D', H'120'-H'16F' +// __BADRAM H'188'-H'189', H'18E'-H'19D', H'19F'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOR_ON 0x3FFF +#define _BOR_NSLEEP 0x3EFF +#define _BOR_SBODEN 0x3DFF +#define _BOR_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF +#define _INTOSCIO 0x3FFC +#define _INTOSC 0x3FFD +#define _EXTRCIO 0x3FFE +#define _EXTRC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char CHS3:1; + unsigned char VCFG:1; + unsigned char ADFM:1; + }; + struct { + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define CHS3 ADCON0_bits.CHS3 +#define VCFG ADCON0_bits.VCFG +#define ADFM ADCON0_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + unsigned char ADCS2:1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define ADCS0 ADCON1_bits.ADCS0 +#define ADCS1 ADCON1_bits.ADCS1 +#define ADCS2 ADCON1_bits.ADCS2 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSEL bits -------------------- +typedef union { + struct { + unsigned char ANS0:1; + unsigned char ANS1:1; + unsigned char ANS2:1; + unsigned char ANS3:1; + unsigned char ANS4:1; + unsigned char ANS5:1; + unsigned char ANS6:1; + unsigned char ANS7:1; + }; +} __ANSEL_bits_t; +extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; + +#ifndef NO_BIT_DEFINES +#define ANS0 ANSEL_bits.ANS0 +#define ANS1 ANSEL_bits.ANS1 +#define ANS2 ANSEL_bits.ANS2 +#define ANS3 ANSEL_bits.ANS3 +#define ANS4 ANSEL_bits.ANS4 +#define ANS5 ANSEL_bits.ANS5 +#define ANS6 ANSEL_bits.ANS6 +#define ANS7 ANSEL_bits.ANS7 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSELH bits -------------------- +typedef union { + struct { + unsigned char ANS8:1; + unsigned char ANS9:1; + unsigned char ANS10:1; + unsigned char ANS11:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ANSELH_bits_t; +extern volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits; + +#ifndef NO_BIT_DEFINES +#define ANS8 ANSELH_bits.ANS8 +#define ANS9 ANSELH_bits.ANS9 +#define ANS10 ANSELH_bits.ANS10 +#define ANS11 ANSELH_bits.ANS11 +#endif /* NO_BIT_DEFINES */ + +// ----- BAUDCTL bits -------------------- +typedef union { + struct { + unsigned char ABDEN:1; + unsigned char WUE:1; + unsigned char :1; + unsigned char BRG16:1; + unsigned char SCKP:1; + unsigned char :1; + unsigned char RCIDL:1; + unsigned char ABDOVF:1; + }; +} __BAUDCTL_bits_t; +extern volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits; + +#ifndef NO_BIT_DEFINES +#define ABDEN BAUDCTL_bits.ABDEN +#define WUE BAUDCTL_bits.WUE +#define BRG16 BAUDCTL_bits.BRG16 +#define SCKP BAUDCTL_bits.SCKP +#define RCIDL BAUDCTL_bits.RCIDL +#define ABDOVF BAUDCTL_bits.ABDOVF +#endif /* NO_BIT_DEFINES */ + +// ----- CM1CON0 bits -------------------- +typedef union { + struct { + unsigned char C1CH0:1; + unsigned char C1CH1:1; + unsigned char C1R:1; + unsigned char :1; + unsigned char C1POL:1; + unsigned char C1OE:1; + unsigned char C1OUT:1; + unsigned char C1ON:1; + }; +} __CM1CON0_bits_t; +extern volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C1CH0 CM1CON0_bits.C1CH0 +#define C1CH1 CM1CON0_bits.C1CH1 +#define C1R CM1CON0_bits.C1R +#define C1POL CM1CON0_bits.C1POL +#define C1OE CM1CON0_bits.C1OE +#define C1OUT CM1CON0_bits.C1OUT +#define C1ON CM1CON0_bits.C1ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON0 bits -------------------- +typedef union { + struct { + unsigned char C2CH0:1; + unsigned char C2CH1:1; + unsigned char C2R:1; + unsigned char :1; + unsigned char C2POL:1; + unsigned char C2OE:1; + unsigned char C2OUT:1; + unsigned char C2ON:1; + }; +} __CM2CON0_bits_t; +extern volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C2CH0 CM2CON0_bits.C2CH0 +#define C2CH1 CM2CON0_bits.C2CH1 +#define C2R CM2CON0_bits.C2R +#define C2POL CM2CON0_bits.C2POL +#define C2OE CM2CON0_bits.C2OE +#define C2OUT CM2CON0_bits.C2OUT +#define C2ON CM2CON0_bits.C2ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char MC2OUT:1; + unsigned char MC1OUT:1; + }; +} __CM2CON1_bits_t; +extern volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CM2CON1_bits.C2SYNC +#define T1GSS CM2CON1_bits.T1GSS +#define MC2OUT CM2CON1_bits.MC2OUT +#define MC1OUT CM2CON1_bits.MC1OUT +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RABIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RABIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RABIF INTCON_bits.RABIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RABIE INTCON_bits.RABIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOC bits -------------------- +typedef union { + struct { + unsigned char IOC0:1; + unsigned char IOC1:1; + unsigned char IOC2:1; + unsigned char IOC3:1; + unsigned char IOC4:1; + unsigned char IOC5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOC_bits_t; +extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; + +#ifndef NO_BIT_DEFINES +#define IOC0 IOC_bits.IOC0 +#define IOC1 IOC_bits.IOC1 +#define IOC2 IOC_bits.IOC2 +#define IOC3 IOC_bits.IOC3 +#define IOC4 IOC_bits.IOC4 +#define IOC5 IOC_bits.IOC5 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCA bits -------------------- +typedef union { + struct { + unsigned char IOCA0:1; + unsigned char IOCA1:1; + unsigned char IOCA2:1; + unsigned char IOCA3:1; + unsigned char IOCA4:1; + unsigned char IOCA5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOCA_bits_t; +extern volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; + +#ifndef NO_BIT_DEFINES +#define IOCA0 IOCA_bits.IOCA0 +#define IOCA1 IOCA_bits.IOCA1 +#define IOCA2 IOCA_bits.IOCA2 +#define IOCA3 IOCA_bits.IOCA3 +#define IOCA4 IOCA_bits.IOCA4 +#define IOCA5 IOCA_bits.IOCA5 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char IOCB4:1; + unsigned char IOCB5:1; + unsigned char IOCB6:1; + unsigned char IOCB7:1; + }; +} __IOCB_bits_t; +extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; + +#ifndef NO_BIT_DEFINES +#define IOCB4 IOCB_bits.IOCB4 +#define IOCB5 IOCB_bits.IOCB5 +#define IOCB6 IOCB_bits.IOCB6 +#define IOCB7 IOCB_bits.IOCB7 +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RABPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RABPU OPTION_REG_bits.NOT_RABPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BOR:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char SBOREN:1; + unsigned char ULPWUE:1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define SBOREN PCON_bits.SBOREN +#define ULPWUE PCON_bits.ULPWUE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char T1IE:1; + unsigned char :1; + unsigned char :1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; + struct { + unsigned char TMR1IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IE PIE1_bits.T1IE +#define TMR1IE PIE1_bits.TMR1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIE:1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char OSFIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIE PIE2_bits.EEIE +#define C1IE PIE2_bits.C1IE +#define C2IE PIE2_bits.C2IE +#define OSFIE PIE2_bits.OSFIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char T1IF:1; + unsigned char :1; + unsigned char :1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; + struct { + unsigned char TMR1IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IF PIR1_bits.T1IF +#define TMR1IF PIR1_bits.TMR1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIF:1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char OSFIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIF PIR2_bits.EEIF +#define C1IF PIR2_bits.C1IF +#define C2IF PIR2_bits.C2IF +#define OSFIF PIR2_bits.OSFIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SPBRG bits -------------------- +typedef union { + struct { + unsigned char BRG0:1; + unsigned char BRG1:1; + unsigned char BRG2:1; + unsigned char BRG3:1; + unsigned char BRG4:1; + unsigned char BRG5:1; + unsigned char BRG6:1; + unsigned char BRG7:1; + }; +} __SPBRG_bits_t; +extern volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits; + +#ifndef NO_BIT_DEFINES +#define BRG0 SPBRG_bits.BRG0 +#define BRG1 SPBRG_bits.BRG1 +#define BRG2 SPBRG_bits.BRG2 +#define BRG3 SPBRG_bits.BRG3 +#define BRG4 SPBRG_bits.BRG4 +#define BRG5 SPBRG_bits.BRG5 +#define BRG6 SPBRG_bits.BRG6 +#define BRG7 SPBRG_bits.BRG7 +#endif /* NO_BIT_DEFINES */ + +// ----- SPBRGH bits -------------------- +typedef union { + struct { + unsigned char BRG8:1; + unsigned char BRG9:1; + unsigned char BRG10:1; + unsigned char BRG11:1; + unsigned char BRG12:1; + unsigned char BRG13:1; + unsigned char BRG14:1; + unsigned char BRG15:1; + }; +} __SPBRGH_bits_t; +extern volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits; + +#ifndef NO_BIT_DEFINES +#define BRG8 SPBRGH_bits.BRG8 +#define BRG9 SPBRGH_bits.BRG9 +#define BRG10 SPBRGH_bits.BRG10 +#define BRG11 SPBRGH_bits.BRG11 +#define BRG12 SPBRGH_bits.BRG12 +#define BRG13 SPBRGH_bits.BRG13 +#define BRG14 SPBRGH_bits.BRG14 +#define BRG15 SPBRGH_bits.BRG15 +#endif /* NO_BIT_DEFINES */ + +// ----- SRCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char PULSR:1; + unsigned char PULSS:1; + unsigned char C2REN:1; + unsigned char C1SEN:1; + unsigned char SR0:1; + unsigned char SR1:1; + }; +} __SRCON_bits_t; +extern volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits; + +#ifndef NO_BIT_DEFINES +#define PULSR SRCON_bits.PULSR +#define PULSS SRCON_bits.PULSS +#define C2REN SRCON_bits.C2REN +#define C1SEN SRCON_bits.C1SEN +#define SR0 SRCON_bits.SR0 +#define SR1 SRCON_bits.SR1 +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char T1GINV:1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char SENB:1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SENB TXSTA_bits.SENB +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char VP6EN:1; + unsigned char VRR:1; + unsigned char C2VREN:1; + unsigned char C1VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VP6EN VRCON_bits.VP6EN +#define VRR VRCON_bits.VRR +#define C2VREN VRCON_bits.C2VREN +#define C1VREN VRCON_bits.C1VREN +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUA bits -------------------- +typedef union { + struct { + unsigned char WPUA0:1; + unsigned char WPUA1:1; + unsigned char WPUA2:1; + unsigned char :1; + unsigned char WPUA4:1; + unsigned char WPUA5:1; + unsigned char :1; + unsigned char :1; + }; +} __WPUA_bits_t; +extern volatile __WPUA_bits_t __at(WPUA_ADDR) WPUA_bits; + +#ifndef NO_BIT_DEFINES +#define WPUA0 WPUA_bits.WPUA0 +#define WPUA1 WPUA_bits.WPUA1 +#define WPUA2 WPUA_bits.WPUA2 +#define WPUA4 WPUA_bits.WPUA4 +#define WPUA5 WPUA_bits.WPUA5 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char WPUB4:1; + unsigned char WPUB5:1; + unsigned char WPUB6:1; + unsigned char WPUB7:1; + }; +} __WPUB_bits_t; +extern volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + +#ifndef NO_BIT_DEFINES +#define WPUB4 WPUB_bits.WPUB4 +#define WPUB5 WPUB_bits.WPUB5 +#define WPUB6 WPUB_bits.WPUB6 +#define WPUB7 WPUB_bits.WPUB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f688.h b/device/include/pic/pic16f688.h new file mode 100644 index 0000000..0c59904 --- /dev/null +++ b/device/include/pic/pic16f688.h @@ -0,0 +1,977 @@ +// +// Register Declarations for Microchip 16F688 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F688_H +#define P16F688_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define BAUDCTL_ADDR 0x0011 +#define SPBRGH_ADDR 0x0012 +#define SPBRG_ADDR 0x0013 +#define RCREG_ADDR 0x0014 +#define TXREG_ADDR 0x0015 +#define TXSTA_ADDR 0x0016 +#define RCSTA_ADDR 0x0017 +#define WDTCON_ADDR 0x0018 +#define CMCON0_ADDR 0x0019 +#define CMCON1_ADDR 0x001A +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define ANSEL_ADDR 0x0091 +#define WPU_ADDR 0x0095 +#define WPUA_ADDR 0x0095 +#define IOC_ADDR 0x0096 +#define IOCA_ADDR 0x0096 +#define EEDATH_ADDR 0x0097 +#define EEADRH_ADDR 0x0098 +#define VRCON_ADDR 0x0099 +#define EEDAT_ADDR 0x009A +#define EEDATA_ADDR 0x009A +#define EEADR_ADDR 0x009B +#define EECON1_ADDR 0x009C +#define EECON2_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16F688.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F688 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F688 +// 2. LIST directive in the source file +// LIST P=PIC16F688 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== +//1.00 07/28/03 Original +//1.01 09/02/03 Modified to match datasheet +//1.02 09/19/03 Changed CMCON1 from 0x20 to 0x1A (pas) +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F688 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; + +extern __sfr __at (PORTC_ADDR) PORTC; + +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; + +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (BAUDCTL_ADDR) BAUDCTL; +extern __sfr __at (SPBRGH_ADDR) SPBRGH; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (CMCON0_ADDR) CMCON0; +extern __sfr __at (CMCON1_ADDR) CMCON1; + +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; + +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISC_ADDR) TRISC; + +extern __sfr __at (PIE1_ADDR) PIE1; + +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; +extern __sfr __at (ANSEL_ADDR) ANSEL; + +extern __sfr __at (WPU_ADDR) WPU; +extern __sfr __at (WPUA_ADDR) WPUA; +extern __sfr __at (IOC_ADDR) IOC; +extern __sfr __at (IOCA_ADDR) IOCA; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (EEDAT_ADDR) EEDAT; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- BAUDCTL Bits -------------------------------------------------------- + + +//----- TXSTA Bits -------------------------------------------------------- + + +//----- RCSTA Bits -------------------------------------------------------- + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- COMCON0 Bits ------------------------------------------------------- + + +//----- COMCON1 Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits -------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + +//----- ANSEL -------------------------------------------------------------- + + +//----- IOC -------------------------------------------------------------- + + +//----- IOCA -------------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//----- EECON1 ------------------------------------------------------------- + + +//----- ADCON1 ------------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'06', H'08'-H'09', H'0D', H'1B'-H'1D' +// __BADRAM H'86', H'88'-H'89', H'8D', H'92'-H'94' +// __BADRAM H'106', H'108'-H'109', H'10C'-H'11F' +// __BADRAM H'186', H'188'-H'189', H'18C'-H'18D', H'190'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOD_ON 0x3FFF +#define _BOD_NSLEEP 0x3EFF +#define _BOD_SBODEN 0x3DFF +#define _BOD_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF +#define _INTOSCIO 0x3FFC +#define _INTOSC 0x3FFD +#define _EXTRCIO 0x3FFE +#define _EXTRC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char :1; + unsigned char VCFG:1; + unsigned char ADFM:1; + }; + struct { + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define VCFG ADCON0_bits.VCFG +#define ADFM ADCON0_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + unsigned char ADCS2:1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define ADCS0 ADCON1_bits.ADCS0 +#define ADCS1 ADCON1_bits.ADCS1 +#define ADCS2 ADCON1_bits.ADCS2 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSEL bits -------------------- +typedef union { + struct { + unsigned char ANS0:1; + unsigned char ANS1:1; + unsigned char ANS2:1; + unsigned char ANS3:1; + unsigned char ANS4:1; + unsigned char ANS5:1; + unsigned char ANS6:1; + unsigned char ANS7:1; + }; +} __ANSEL_bits_t; +extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; + +#ifndef NO_BIT_DEFINES +#define ANS0 ANSEL_bits.ANS0 +#define ANS1 ANSEL_bits.ANS1 +#define ANS2 ANSEL_bits.ANS2 +#define ANS3 ANSEL_bits.ANS3 +#define ANS4 ANSEL_bits.ANS4 +#define ANS5 ANSEL_bits.ANS5 +#define ANS6 ANSEL_bits.ANS6 +#define ANS7 ANSEL_bits.ANS7 +#endif /* NO_BIT_DEFINES */ + +// ----- BAUDCTL bits -------------------- +typedef union { + struct { + unsigned char ABDEN:1; + unsigned char WUE:1; + unsigned char :1; + unsigned char BRG16:1; + unsigned char SCKP:1; + unsigned char :1; + unsigned char RCIDL:1; + unsigned char ABDOVF:1; + }; +} __BAUDCTL_bits_t; +extern volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits; + +#ifndef NO_BIT_DEFINES +#define ABDEN BAUDCTL_bits.ABDEN +#define WUE BAUDCTL_bits.WUE +#define BRG16 BAUDCTL_bits.BRG16 +#define SCKP BAUDCTL_bits.SCKP +#define RCIDL BAUDCTL_bits.RCIDL +#define ABDOVF BAUDCTL_bits.ABDOVF +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON0 bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON0_bits_t; +extern volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON0_bits.CM0 +#define CM1 CMCON0_bits.CM1 +#define CM2 CMCON0_bits.CM2 +#define CIS CMCON0_bits.CIS +#define C1INV CMCON0_bits.C1INV +#define C2INV CMCON0_bits.C2INV +#define C1OUT CMCON0_bits.C1OUT +#define C2OUT CMCON0_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __CMCON1_bits_t; +extern volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CMCON1_bits.C2SYNC +#define T1GSS CMCON1_bits.T1GSS +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RAIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RAIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RAIF INTCON_bits.RAIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RAIE INTCON_bits.RAIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOC bits -------------------- +typedef union { + struct { + unsigned char IOC0:1; + unsigned char IOC1:1; + unsigned char IOC2:1; + unsigned char IOC3:1; + unsigned char IOC4:1; + unsigned char IOC5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOC_bits_t; +extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; + +#ifndef NO_BIT_DEFINES +#define IOC0 IOC_bits.IOC0 +#define IOC1 IOC_bits.IOC1 +#define IOC2 IOC_bits.IOC2 +#define IOC3 IOC_bits.IOC3 +#define IOC4 IOC_bits.IOC4 +#define IOC5 IOC_bits.IOC5 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCA bits -------------------- +typedef union { + struct { + unsigned char IOCA0:1; + unsigned char IOCA1:1; + unsigned char IOCA2:1; + unsigned char IOCA3:1; + unsigned char IOCA4:1; + unsigned char IOCA5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOCA_bits_t; +extern volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; + +#ifndef NO_BIT_DEFINES +#define IOCA0 IOCA_bits.IOCA0 +#define IOCA1 IOCA_bits.IOCA1 +#define IOCA2 IOCA_bits.IOCA2 +#define IOCA3 IOCA_bits.IOCA3 +#define IOCA4 IOCA_bits.IOCA4 +#define IOCA5 IOCA_bits.IOCA5 +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RAPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RAPU OPTION_REG_bits.NOT_RAPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BOD:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char SBODEN:1; + unsigned char ULPWUE:1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_POR PCON_bits.NOT_POR +#define SBODEN PCON_bits.SBODEN +#define ULPWUE PCON_bits.ULPWUE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char T1IE:1; + unsigned char TXIE:1; + unsigned char OSFIE:1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char EEIE:1; + }; + struct { + unsigned char TMR1IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IE PIE1_bits.T1IE +#define TMR1IE PIE1_bits.TMR1IE +#define TXIE PIE1_bits.TXIE +#define OSFIE PIE1_bits.OSFIE +#define C1IE PIE1_bits.C1IE +#define C2IE PIE1_bits.C2IE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char T1IF:1; + unsigned char TXIF:1; + unsigned char OSFIF:1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char EEIF:1; + }; + struct { + unsigned char TMR1IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IF PIR1_bits.T1IF +#define TMR1IF PIR1_bits.TMR1IF +#define TXIF PIR1_bits.TXIF +#define OSFIF PIR1_bits.OSFIF +#define C1IF PIR1_bits.C1IF +#define C2IF PIR1_bits.C2IF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define SWDTEN RCSTA_bits.SWDTEN +#define OERR RCSTA_bits.OERR +#define WDTPS0 RCSTA_bits.WDTPS0 +#define FERR RCSTA_bits.FERR +#define WDTPS1 RCSTA_bits.WDTPS1 +#define ADDEN RCSTA_bits.ADDEN +#define WDTPS2 RCSTA_bits.WDTPS2 +#define CREN RCSTA_bits.CREN +#define WDTPS3 RCSTA_bits.WDTPS3 +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char T1GINV:1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char SENDB:1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SENDB TXSTA_bits.SENDB +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char :1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f689.h b/device/include/pic/pic16f689.h new file mode 100644 index 0000000..5485551 --- /dev/null +++ b/device/include/pic/pic16f689.h @@ -0,0 +1,1483 @@ +// +// Register Declarations for Microchip 16F689 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F689_H +#define P16F689_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define SSPADD_ADDR 0x0093 +#define MSK_ADDR 0x0093 +#define SSPMSK_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define WPU_ADDR 0x0095 +#define WPUA_ADDR 0x0095 +#define IOC_ADDR 0x0096 +#define IOCA_ADDR 0x0096 +#define WDTCON_ADDR 0x0097 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define SPBRGH_ADDR 0x009A +#define BAUDCTL_ADDR 0x009B +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDAT_ADDR 0x010C +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define WPUB_ADDR 0x0115 +#define IOCB_ADDR 0x0116 +#define VRCON_ADDR 0x0118 +#define CM1CON0_ADDR 0x0119 +#define CM2CON0_ADDR 0x011A +#define CM2CON1_ADDR 0x011B +#define ANSEL_ADDR 0x011E +#define ANSELH_ADDR 0x011F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D +#define SRCON_ADDR 0x019E + +// +// Memory organization. +// + + + +// LIST +// P16F689.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F689 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F689 +// 2. LIST directive in the source file +// LIST P=PIC16F689 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== +//1.00 10/12/04 Original +//2.00 04/21/05 Modified names to match released datasheet +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F689 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; + +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; + + +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; + + +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; + +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; + +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; + +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; + +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (MSK_ADDR) MSK; +extern __sfr __at (SSPMSK_ADDR) SSPMSK; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (WPU_ADDR) WPU; +extern __sfr __at (WPUA_ADDR) WPUA; +extern __sfr __at (IOC_ADDR) IOC; +extern __sfr __at (IOCA_ADDR) IOCA; +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (SPBRGH_ADDR) SPBRGH; +extern __sfr __at (BAUDCTL_ADDR) BAUDCTL; + + +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + + +extern __sfr __at (EEDAT_ADDR) EEDAT; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + + +extern __sfr __at (WPUB_ADDR) WPUB; +extern __sfr __at (IOCB_ADDR) IOCB; + +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (CM1CON0_ADDR) CM1CON0; +extern __sfr __at (CM2CON0_ADDR) CM2CON0; +extern __sfr __at (CM2CON1_ADDR) CM2CON1; + +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (ANSELH_ADDR) ANSELH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + + +extern __sfr __at (SRCON_ADDR) SRCON; + + + +//----- BANK 0 REGISTER DEFINITIONS ---------------------------------------- +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + + +//----- SSPCON Bits ------------------------------------------------------- + + + +//----- RCSTA Bits --------------------------------------------------------- + + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- BANK 1 REGISTER DEFINITIONS ---------------------------------------- +//----- OPTION Bits -------------------------------------------------------- + + +//----- TRISA Bits -------------------------------------------------------- + + +//----- TRISB Bits -------------------------------------------------------- + + +//----- TRISC Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits -------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + +//----- SSPSTAT Bits -------------------------------------------------------- + + +//----- WPUA -------------------------------------------------------------- + + + +//----- IOC -------------------------------------------------------------- + + +//----- IOCA -------------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- TXSTA Bits ------------------------------------------------------- + + +//----- SPBRG Bits ------------------------------------------------------- + + +//----- SPBRGH Bits ------------------------------------------------------- + + +//----- BAUDCTL Bits ------------------------------------------------------- + + + + +//----- ADCON1 ------------------------------------------------------------- + + +//----- BANK 2 REGISTER DEFINITIONS ---------------------------------------- +//----- WPUB Bits ---------------------------------------------------------- + + +//----- IOCB -------------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//----- CM1CON0 Bits ------------------------------------------------------- + + + +//----- CM2CON0 Bits ------------------------------------------------------- + + + +//----- CM2CON1 Bits ------------------------------------------------------- + + +//----- ANSELH ------------------------------------------------------------- + + +//----- ANSEL -------------------------------------------------------------- + + +//----- BANK 3 REGISTER DEFINITIONS ---------------------------------------- +//----- EECON1 ------------------------------------------------------------- + + +//----- SRCON --------------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'08'-H'09', H'11'-H'12', H'15'-H'17', H'1B'-H'1D' +// __BADRAM H'88'-H'89', H'91'-H'92', H'9C'-H'9D' +// __BADRAM H'108'-H'109', H'110'-H'114', H'117', H'11C'-H'11D' +// __BADRAM H'188'-H'189', H'18E'-H'19D', H'19F'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOR_ON 0x3FFF +#define _BOR_NSLEEP 0x3EFF +#define _BOR_SBODEN 0x3DFF +#define _BOR_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF +#define _INTOSCIO 0x3FFC +#define _INTOSC 0x3FFD +#define _EXTRCIO 0x3FFE +#define _EXTRC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char CHS3:1; + unsigned char VCFG:1; + unsigned char ADFM:1; + }; + struct { + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define CHS3 ADCON0_bits.CHS3 +#define VCFG ADCON0_bits.VCFG +#define ADFM ADCON0_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + unsigned char ADCS2:1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define ADCS0 ADCON1_bits.ADCS0 +#define ADCS1 ADCON1_bits.ADCS1 +#define ADCS2 ADCON1_bits.ADCS2 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSEL bits -------------------- +typedef union { + struct { + unsigned char ANS0:1; + unsigned char ANS1:1; + unsigned char ANS2:1; + unsigned char ANS3:1; + unsigned char ANS4:1; + unsigned char ANS5:1; + unsigned char ANS6:1; + unsigned char ANS7:1; + }; +} __ANSEL_bits_t; +extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; + +#ifndef NO_BIT_DEFINES +#define ANS0 ANSEL_bits.ANS0 +#define ANS1 ANSEL_bits.ANS1 +#define ANS2 ANSEL_bits.ANS2 +#define ANS3 ANSEL_bits.ANS3 +#define ANS4 ANSEL_bits.ANS4 +#define ANS5 ANSEL_bits.ANS5 +#define ANS6 ANSEL_bits.ANS6 +#define ANS7 ANSEL_bits.ANS7 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSELH bits -------------------- +typedef union { + struct { + unsigned char ANS8:1; + unsigned char ANS9:1; + unsigned char ANS10:1; + unsigned char ANS11:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ANSELH_bits_t; +extern volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits; + +#ifndef NO_BIT_DEFINES +#define ANS8 ANSELH_bits.ANS8 +#define ANS9 ANSELH_bits.ANS9 +#define ANS10 ANSELH_bits.ANS10 +#define ANS11 ANSELH_bits.ANS11 +#endif /* NO_BIT_DEFINES */ + +// ----- BAUDCTL bits -------------------- +typedef union { + struct { + unsigned char ABDEN:1; + unsigned char WUE:1; + unsigned char :1; + unsigned char BRG16:1; + unsigned char SCKP:1; + unsigned char :1; + unsigned char RCIDL:1; + unsigned char ABDOVF:1; + }; +} __BAUDCTL_bits_t; +extern volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits; + +#ifndef NO_BIT_DEFINES +#define ABDEN BAUDCTL_bits.ABDEN +#define WUE BAUDCTL_bits.WUE +#define BRG16 BAUDCTL_bits.BRG16 +#define SCKP BAUDCTL_bits.SCKP +#define RCIDL BAUDCTL_bits.RCIDL +#define ABDOVF BAUDCTL_bits.ABDOVF +#endif /* NO_BIT_DEFINES */ + +// ----- CM1CON0 bits -------------------- +typedef union { + struct { + unsigned char C1CH0:1; + unsigned char C1CH1:1; + unsigned char C1R:1; + unsigned char :1; + unsigned char C1POL:1; + unsigned char C1OE:1; + unsigned char C1OUT:1; + unsigned char C1ON:1; + }; +} __CM1CON0_bits_t; +extern volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C1CH0 CM1CON0_bits.C1CH0 +#define C1CH1 CM1CON0_bits.C1CH1 +#define C1R CM1CON0_bits.C1R +#define C1POL CM1CON0_bits.C1POL +#define C1OE CM1CON0_bits.C1OE +#define C1OUT CM1CON0_bits.C1OUT +#define C1ON CM1CON0_bits.C1ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON0 bits -------------------- +typedef union { + struct { + unsigned char C2CH0:1; + unsigned char C2CH1:1; + unsigned char C2R:1; + unsigned char :1; + unsigned char C2POL:1; + unsigned char C2OE:1; + unsigned char C2OUT:1; + unsigned char C2ON:1; + }; +} __CM2CON0_bits_t; +extern volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C2CH0 CM2CON0_bits.C2CH0 +#define C2CH1 CM2CON0_bits.C2CH1 +#define C2R CM2CON0_bits.C2R +#define C2POL CM2CON0_bits.C2POL +#define C2OE CM2CON0_bits.C2OE +#define C2OUT CM2CON0_bits.C2OUT +#define C2ON CM2CON0_bits.C2ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char MC2OUT:1; + unsigned char MC1OUT:1; + }; +} __CM2CON1_bits_t; +extern volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CM2CON1_bits.C2SYNC +#define T1GSS CM2CON1_bits.T1GSS +#define MC2OUT CM2CON1_bits.MC2OUT +#define MC1OUT CM2CON1_bits.MC1OUT +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RABIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RABIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RABIF INTCON_bits.RABIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RABIE INTCON_bits.RABIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOC bits -------------------- +typedef union { + struct { + unsigned char IOC0:1; + unsigned char IOC1:1; + unsigned char IOC2:1; + unsigned char IOC3:1; + unsigned char IOC4:1; + unsigned char IOC5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOC_bits_t; +extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; + +#ifndef NO_BIT_DEFINES +#define IOC0 IOC_bits.IOC0 +#define IOC1 IOC_bits.IOC1 +#define IOC2 IOC_bits.IOC2 +#define IOC3 IOC_bits.IOC3 +#define IOC4 IOC_bits.IOC4 +#define IOC5 IOC_bits.IOC5 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCA bits -------------------- +typedef union { + struct { + unsigned char IOCA0:1; + unsigned char IOCA1:1; + unsigned char IOCA2:1; + unsigned char IOCA3:1; + unsigned char IOCA4:1; + unsigned char IOCA5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOCA_bits_t; +extern volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; + +#ifndef NO_BIT_DEFINES +#define IOCA0 IOCA_bits.IOCA0 +#define IOCA1 IOCA_bits.IOCA1 +#define IOCA2 IOCA_bits.IOCA2 +#define IOCA3 IOCA_bits.IOCA3 +#define IOCA4 IOCA_bits.IOCA4 +#define IOCA5 IOCA_bits.IOCA5 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char IOCB4:1; + unsigned char IOCB5:1; + unsigned char IOCB6:1; + unsigned char IOCB7:1; + }; +} __IOCB_bits_t; +extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; + +#ifndef NO_BIT_DEFINES +#define IOCB4 IOCB_bits.IOCB4 +#define IOCB5 IOCB_bits.IOCB5 +#define IOCB6 IOCB_bits.IOCB6 +#define IOCB7 IOCB_bits.IOCB7 +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RABPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RABPU OPTION_REG_bits.NOT_RABPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BOR:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char SBOREN:1; + unsigned char ULPWUE:1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define SBOREN PCON_bits.SBOREN +#define ULPWUE PCON_bits.ULPWUE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char T1IE:1; + unsigned char :1; + unsigned char :1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; + struct { + unsigned char TMR1IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IE PIE1_bits.T1IE +#define TMR1IE PIE1_bits.TMR1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIE:1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char OSFIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIE PIE2_bits.EEIE +#define C1IE PIE2_bits.C1IE +#define C2IE PIE2_bits.C2IE +#define OSFIE PIE2_bits.OSFIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char T1IF:1; + unsigned char :1; + unsigned char :1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; + struct { + unsigned char TMR1IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IF PIR1_bits.T1IF +#define TMR1IF PIR1_bits.TMR1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIF:1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char OSFIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIF PIR2_bits.EEIF +#define C1IF PIR2_bits.C1IF +#define C2IF PIR2_bits.C2IF +#define OSFIF PIR2_bits.OSFIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SPBRG bits -------------------- +typedef union { + struct { + unsigned char BRG0:1; + unsigned char BRG1:1; + unsigned char BRG2:1; + unsigned char BRG3:1; + unsigned char BRG4:1; + unsigned char BRG5:1; + unsigned char BRG6:1; + unsigned char BRG7:1; + }; +} __SPBRG_bits_t; +extern volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits; + +#ifndef NO_BIT_DEFINES +#define BRG0 SPBRG_bits.BRG0 +#define BRG1 SPBRG_bits.BRG1 +#define BRG2 SPBRG_bits.BRG2 +#define BRG3 SPBRG_bits.BRG3 +#define BRG4 SPBRG_bits.BRG4 +#define BRG5 SPBRG_bits.BRG5 +#define BRG6 SPBRG_bits.BRG6 +#define BRG7 SPBRG_bits.BRG7 +#endif /* NO_BIT_DEFINES */ + +// ----- SPBRGH bits -------------------- +typedef union { + struct { + unsigned char BRG8:1; + unsigned char BRG9:1; + unsigned char BRG10:1; + unsigned char BRG11:1; + unsigned char BRG12:1; + unsigned char BRG13:1; + unsigned char BRG14:1; + unsigned char BRG15:1; + }; +} __SPBRGH_bits_t; +extern volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits; + +#ifndef NO_BIT_DEFINES +#define BRG8 SPBRGH_bits.BRG8 +#define BRG9 SPBRGH_bits.BRG9 +#define BRG10 SPBRGH_bits.BRG10 +#define BRG11 SPBRGH_bits.BRG11 +#define BRG12 SPBRGH_bits.BRG12 +#define BRG13 SPBRGH_bits.BRG13 +#define BRG14 SPBRGH_bits.BRG14 +#define BRG15 SPBRGH_bits.BRG15 +#endif /* NO_BIT_DEFINES */ + +// ----- SRCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char PULSR:1; + unsigned char PULSS:1; + unsigned char C2REN:1; + unsigned char C1SEN:1; + unsigned char SR0:1; + unsigned char SR1:1; + }; +} __SRCON_bits_t; +extern volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits; + +#ifndef NO_BIT_DEFINES +#define PULSR SRCON_bits.PULSR +#define PULSS SRCON_bits.PULSS +#define C2REN SRCON_bits.C2REN +#define C1SEN SRCON_bits.C1SEN +#define SR0 SRCON_bits.SR0 +#define SR1 SRCON_bits.SR1 +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char T1GINV:1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char SENB:1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SENB TXSTA_bits.SENB +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char VP6EN:1; + unsigned char VRR:1; + unsigned char C2VREN:1; + unsigned char C1VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VP6EN VRCON_bits.VP6EN +#define VRR VRCON_bits.VRR +#define C2VREN VRCON_bits.C2VREN +#define C1VREN VRCON_bits.C1VREN +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUA bits -------------------- +typedef union { + struct { + unsigned char WPUA0:1; + unsigned char WPUA1:1; + unsigned char WPUA2:1; + unsigned char :1; + unsigned char WPUA4:1; + unsigned char WPUA5:1; + unsigned char :1; + unsigned char :1; + }; +} __WPUA_bits_t; +extern volatile __WPUA_bits_t __at(WPUA_ADDR) WPUA_bits; + +#ifndef NO_BIT_DEFINES +#define WPUA0 WPUA_bits.WPUA0 +#define WPUA1 WPUA_bits.WPUA1 +#define WPUA2 WPUA_bits.WPUA2 +#define WPUA4 WPUA_bits.WPUA4 +#define WPUA5 WPUA_bits.WPUA5 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char WPUB4:1; + unsigned char WPUB5:1; + unsigned char WPUB6:1; + unsigned char WPUB7:1; + }; +} __WPUB_bits_t; +extern volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + +#ifndef NO_BIT_DEFINES +#define WPUB4 WPUB_bits.WPUB4 +#define WPUB5 WPUB_bits.WPUB5 +#define WPUB6 WPUB_bits.WPUB6 +#define WPUB7 WPUB_bits.WPUB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f690.h b/device/include/pic/pic16f690.h new file mode 100644 index 0000000..96d6400 --- /dev/null +++ b/device/include/pic/pic16f690.h @@ -0,0 +1,1636 @@ +// +// Register Declarations for Microchip 16F690 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F690_H +#define P16F690_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define PWM1CON_ADDR 0x001C +#define ECCPAS_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define MSK_ADDR 0x0093 +#define SSPMSK_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define WPU_ADDR 0x0095 +#define WPUA_ADDR 0x0095 +#define IOC_ADDR 0x0096 +#define IOCA_ADDR 0x0096 +#define WDTCON_ADDR 0x0097 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define SPBRGH_ADDR 0x009A +#define BAUDCTL_ADDR 0x009B +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDAT_ADDR 0x010C +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define WPUB_ADDR 0x0115 +#define IOCB_ADDR 0x0116 +#define VRCON_ADDR 0x0118 +#define CM1CON0_ADDR 0x0119 +#define CM2CON0_ADDR 0x011A +#define CM2CON1_ADDR 0x011B +#define ANSEL_ADDR 0x011E +#define ANSELH_ADDR 0x011F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D +#define PSTRCON_ADDR 0x019D +#define SRCON_ADDR 0x019E + +// +// Memory organization. +// + + + +// LIST +// P16F690.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F690 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F690 +// 2. LIST directive in the source file +// LIST P=PIC16F690 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== +//1.00 10/12/04 Original +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F690 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; + +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; + +extern __sfr __at (PWM1CON_ADDR) PWM1CON; +extern __sfr __at (ECCPAS_ADDR) ECCPAS; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; + +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; + +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; + +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (MSK_ADDR) MSK; +extern __sfr __at (SSPMSK_ADDR) SSPMSK; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (WPU_ADDR) WPU; +extern __sfr __at (WPUA_ADDR) WPUA; +extern __sfr __at (IOC_ADDR) IOC; +extern __sfr __at (IOCA_ADDR) IOCA; +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (SPBRGH_ADDR) SPBRGH; +extern __sfr __at (BAUDCTL_ADDR) BAUDCTL; + + +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + + +extern __sfr __at (EEDAT_ADDR) EEDAT; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + + +extern __sfr __at (WPUB_ADDR) WPUB; +extern __sfr __at (IOCB_ADDR) IOCB; + +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (CM1CON0_ADDR) CM1CON0; +extern __sfr __at (CM2CON0_ADDR) CM2CON0; +extern __sfr __at (CM2CON1_ADDR) CM2CON1; + +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (ANSELH_ADDR) ANSELH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + + +extern __sfr __at (PSTRCON_ADDR) PSTRCON; +extern __sfr __at (SRCON_ADDR) SRCON; + + + +//----- BANK 0 REGISTER DEFINITIONS ---------------------------------------- +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits ------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- PWM1CON Bits ------------------------------------------------------- + + +//----- ECCPAS Bits -------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- BANK 1 REGISTER DEFINITIONS ---------------------------------------- +//----- OPTION Bits -------------------------------------------------------- + + +//----- TRISA Bits -------------------------------------------------------- + + +//----- TRISB Bits -------------------------------------------------------- + + +//----- TRISC Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits -------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + +//----- SSPSTAT Bits -------------------------------------------------------- + + +//----- WPUA -------------------------------------------------------------- + + + +//----- IOC -------------------------------------------------------------- + + +//----- IOCA -------------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- TXSTA Bits ------------------------------------------------------- + + +//----- SPBRG Bits ------------------------------------------------------- + + +//----- SPBRGH Bits ------------------------------------------------------- + + +//----- BAUDCTL Bits ------------------------------------------------------- + + + + +//----- ADCON1 ------------------------------------------------------------- + + +//----- BANK 2 REGISTER DEFINITIONS ---------------------------------------- +//----- WPUB Bits ---------------------------------------------------------- + + +//----- IOCB -------------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//----- CM1CON0 Bits ------------------------------------------------------- + + + +//----- CM2CON0 Bits ------------------------------------------------------- + + + +//----- CM2CON1 Bits ------------------------------------------------------- + + +//----- ANSELH ------------------------------------------------------------- + + +//----- ANSEL -------------------------------------------------------------- + + +//----- BANK 3 REGISTER DEFINITIONS ---------------------------------------- +//----- EECON1 ------------------------------------------------------------- + + +//----- PSTRCON ------------------------------------------------------------- + + +//----- SRCON --------------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'08'-H'09', H'1B' +// __BADRAM H'88'-H'89', H'91', H'9C'-H'9D' +// __BADRAM H'108'-H'109', H'110'-H'114', H'117', H'11C'-H'11D' +// __BADRAM H'188'-H'189', H'18E'-H'19C', H'19F'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOR_ON 0x3FFF +#define _BOR_NSLEEP 0x3EFF +#define _BOR_SBODEN 0x3DFF +#define _BOR_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF +#define _INTOSCIO 0x3FFC +#define _INTOSC 0x3FFD +#define _EXTRCIO 0x3FFE +#define _EXTRC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char CHS3:1; + unsigned char VCFG:1; + unsigned char ADFM:1; + }; + struct { + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define CHS3 ADCON0_bits.CHS3 +#define VCFG ADCON0_bits.VCFG +#define ADFM ADCON0_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + unsigned char ADCS2:1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define ADCS0 ADCON1_bits.ADCS0 +#define ADCS1 ADCON1_bits.ADCS1 +#define ADCS2 ADCON1_bits.ADCS2 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSEL bits -------------------- +typedef union { + struct { + unsigned char ANS0:1; + unsigned char ANS1:1; + unsigned char ANS2:1; + unsigned char ANS3:1; + unsigned char ANS4:1; + unsigned char ANS5:1; + unsigned char ANS6:1; + unsigned char ANS7:1; + }; +} __ANSEL_bits_t; +extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; + +#ifndef NO_BIT_DEFINES +#define ANS0 ANSEL_bits.ANS0 +#define ANS1 ANSEL_bits.ANS1 +#define ANS2 ANSEL_bits.ANS2 +#define ANS3 ANSEL_bits.ANS3 +#define ANS4 ANSEL_bits.ANS4 +#define ANS5 ANSEL_bits.ANS5 +#define ANS6 ANSEL_bits.ANS6 +#define ANS7 ANSEL_bits.ANS7 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSELH bits -------------------- +typedef union { + struct { + unsigned char ANS8:1; + unsigned char ANS9:1; + unsigned char ANS10:1; + unsigned char ANS11:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ANSELH_bits_t; +extern volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits; + +#ifndef NO_BIT_DEFINES +#define ANS8 ANSELH_bits.ANS8 +#define ANS9 ANSELH_bits.ANS9 +#define ANS10 ANSELH_bits.ANS10 +#define ANS11 ANSELH_bits.ANS11 +#endif /* NO_BIT_DEFINES */ + +// ----- BAUDCTL bits -------------------- +typedef union { + struct { + unsigned char ABDEN:1; + unsigned char WUE:1; + unsigned char :1; + unsigned char BRG16:1; + unsigned char SCKP:1; + unsigned char :1; + unsigned char RCIDL:1; + unsigned char ABDOVF:1; + }; +} __BAUDCTL_bits_t; +extern volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits; + +#ifndef NO_BIT_DEFINES +#define ABDEN BAUDCTL_bits.ABDEN +#define WUE BAUDCTL_bits.WUE +#define BRG16 BAUDCTL_bits.BRG16 +#define SCKP BAUDCTL_bits.SCKP +#define RCIDL BAUDCTL_bits.RCIDL +#define ABDOVF BAUDCTL_bits.ABDOVF +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char DC1B0:1; + unsigned char DC1B1:1; + unsigned char P1M0:1; + unsigned char P1M1:1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define DC1B0 CCP1CON_bits.DC1B0 +#define DC1B1 CCP1CON_bits.DC1B1 +#define P1M0 CCP1CON_bits.P1M0 +#define P1M1 CCP1CON_bits.P1M1 +#endif /* NO_BIT_DEFINES */ + +// ----- CM1CON0 bits -------------------- +typedef union { + struct { + unsigned char C1CH0:1; + unsigned char C1CH1:1; + unsigned char C1R:1; + unsigned char :1; + unsigned char C1POL:1; + unsigned char C1OE:1; + unsigned char C1OUT:1; + unsigned char C1ON:1; + }; +} __CM1CON0_bits_t; +extern volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C1CH0 CM1CON0_bits.C1CH0 +#define C1CH1 CM1CON0_bits.C1CH1 +#define C1R CM1CON0_bits.C1R +#define C1POL CM1CON0_bits.C1POL +#define C1OE CM1CON0_bits.C1OE +#define C1OUT CM1CON0_bits.C1OUT +#define C1ON CM1CON0_bits.C1ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON0 bits -------------------- +typedef union { + struct { + unsigned char C2CH0:1; + unsigned char C2CH1:1; + unsigned char C2R:1; + unsigned char :1; + unsigned char C2POL:1; + unsigned char C2OE:1; + unsigned char C2OUT:1; + unsigned char C2ON:1; + }; +} __CM2CON0_bits_t; +extern volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C2CH0 CM2CON0_bits.C2CH0 +#define C2CH1 CM2CON0_bits.C2CH1 +#define C2R CM2CON0_bits.C2R +#define C2POL CM2CON0_bits.C2POL +#define C2OE CM2CON0_bits.C2OE +#define C2OUT CM2CON0_bits.C2OUT +#define C2ON CM2CON0_bits.C2ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char MC2OUT:1; + unsigned char MC1OUT:1; + }; +} __CM2CON1_bits_t; +extern volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CM2CON1_bits.C2SYNC +#define T1GSS CM2CON1_bits.T1GSS +#define MC2OUT CM2CON1_bits.MC2OUT +#define MC1OUT CM2CON1_bits.MC1OUT +#endif /* NO_BIT_DEFINES */ + +// ----- ECCPAS bits -------------------- +typedef union { + struct { + unsigned char PSSBD0:1; + unsigned char PSSBD1:1; + unsigned char PSSAC0:1; + unsigned char PSSAC1:1; + unsigned char ECCPAS0:1; + unsigned char ECCPAS1:1; + unsigned char ECCPAS2:1; + unsigned char ECCPASE:1; + }; +} __ECCPAS_bits_t; +extern volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits; + +#ifndef NO_BIT_DEFINES +#define PSSBD0 ECCPAS_bits.PSSBD0 +#define PSSBD1 ECCPAS_bits.PSSBD1 +#define PSSAC0 ECCPAS_bits.PSSAC0 +#define PSSAC1 ECCPAS_bits.PSSAC1 +#define ECCPAS0 ECCPAS_bits.ECCPAS0 +#define ECCPAS1 ECCPAS_bits.ECCPAS1 +#define ECCPAS2 ECCPAS_bits.ECCPAS2 +#define ECCPASE ECCPAS_bits.ECCPASE +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RABIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RABIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RABIF INTCON_bits.RABIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RABIE INTCON_bits.RABIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOC bits -------------------- +typedef union { + struct { + unsigned char IOC0:1; + unsigned char IOC1:1; + unsigned char IOC2:1; + unsigned char IOC3:1; + unsigned char IOC4:1; + unsigned char IOC5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOC_bits_t; +extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; + +#ifndef NO_BIT_DEFINES +#define IOC0 IOC_bits.IOC0 +#define IOC1 IOC_bits.IOC1 +#define IOC2 IOC_bits.IOC2 +#define IOC3 IOC_bits.IOC3 +#define IOC4 IOC_bits.IOC4 +#define IOC5 IOC_bits.IOC5 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCA bits -------------------- +typedef union { + struct { + unsigned char IOCA0:1; + unsigned char IOCA1:1; + unsigned char IOCA2:1; + unsigned char IOCA3:1; + unsigned char IOCA4:1; + unsigned char IOCA5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOCA_bits_t; +extern volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; + +#ifndef NO_BIT_DEFINES +#define IOCA0 IOCA_bits.IOCA0 +#define IOCA1 IOCA_bits.IOCA1 +#define IOCA2 IOCA_bits.IOCA2 +#define IOCA3 IOCA_bits.IOCA3 +#define IOCA4 IOCA_bits.IOCA4 +#define IOCA5 IOCA_bits.IOCA5 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char IOCB4:1; + unsigned char IOCB5:1; + unsigned char IOCB6:1; + unsigned char IOCB7:1; + }; +} __IOCB_bits_t; +extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; + +#ifndef NO_BIT_DEFINES +#define IOCB4 IOCB_bits.IOCB4 +#define IOCB5 IOCB_bits.IOCB5 +#define IOCB6 IOCB_bits.IOCB6 +#define IOCB7 IOCB_bits.IOCB7 +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RABPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RABPU OPTION_REG_bits.NOT_RABPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BOR:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char SBOREN:1; + unsigned char ULPWUE:1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define SBOREN PCON_bits.SBOREN +#define ULPWUE PCON_bits.ULPWUE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char T1IE:1; + unsigned char T2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IE PIE1_bits.T1IE +#define TMR1IE PIE1_bits.TMR1IE +#define T2IE PIE1_bits.T2IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIE:1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char OSFIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIE PIE2_bits.EEIE +#define C1IE PIE2_bits.C1IE +#define C2IE PIE2_bits.C2IE +#define OSFIE PIE2_bits.OSFIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char T1IF:1; + unsigned char T2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IF PIR1_bits.T1IF +#define TMR1IF PIR1_bits.TMR1IF +#define T2IF PIR1_bits.T2IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIF:1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char OSFIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIF PIR2_bits.EEIF +#define C1IF PIR2_bits.C1IF +#define C2IF PIR2_bits.C2IF +#define OSFIF PIR2_bits.OSFIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PSTRCON bits -------------------- +typedef union { + struct { + unsigned char STRA:1; + unsigned char STRB:1; + unsigned char STRC:1; + unsigned char STRD:1; + unsigned char STRSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PSTRCON_bits_t; +extern volatile __PSTRCON_bits_t __at(PSTRCON_ADDR) PSTRCON_bits; + +#ifndef NO_BIT_DEFINES +#define STRA PSTRCON_bits.STRA +#define STRB PSTRCON_bits.STRB +#define STRC PSTRCON_bits.STRC +#define STRD PSTRCON_bits.STRD +#define STRSYNC PSTRCON_bits.STRSYNC +#endif /* NO_BIT_DEFINES */ + +// ----- PWM1CON bits -------------------- +typedef union { + struct { + unsigned char PDC0:1; + unsigned char PDC1:1; + unsigned char PDC2:1; + unsigned char PDC3:1; + unsigned char PDC4:1; + unsigned char PDC5:1; + unsigned char PDC6:1; + unsigned char PRSEN:1; + }; +} __PWM1CON_bits_t; +extern volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits; + +#ifndef NO_BIT_DEFINES +#define PDC0 PWM1CON_bits.PDC0 +#define PDC1 PWM1CON_bits.PDC1 +#define PDC2 PWM1CON_bits.PDC2 +#define PDC3 PWM1CON_bits.PDC3 +#define PDC4 PWM1CON_bits.PDC4 +#define PDC5 PWM1CON_bits.PDC5 +#define PDC6 PWM1CON_bits.PDC6 +#define PRSEN PWM1CON_bits.PRSEN +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SPBRG bits -------------------- +typedef union { + struct { + unsigned char BRG0:1; + unsigned char BRG1:1; + unsigned char BRG2:1; + unsigned char BRG3:1; + unsigned char BRG4:1; + unsigned char BRG5:1; + unsigned char BRG6:1; + unsigned char BRG7:1; + }; +} __SPBRG_bits_t; +extern volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits; + +#ifndef NO_BIT_DEFINES +#define BRG0 SPBRG_bits.BRG0 +#define BRG1 SPBRG_bits.BRG1 +#define BRG2 SPBRG_bits.BRG2 +#define BRG3 SPBRG_bits.BRG3 +#define BRG4 SPBRG_bits.BRG4 +#define BRG5 SPBRG_bits.BRG5 +#define BRG6 SPBRG_bits.BRG6 +#define BRG7 SPBRG_bits.BRG7 +#endif /* NO_BIT_DEFINES */ + +// ----- SPBRGH bits -------------------- +typedef union { + struct { + unsigned char BRG8:1; + unsigned char BRG9:1; + unsigned char BRG10:1; + unsigned char BRG11:1; + unsigned char BRG12:1; + unsigned char BRG13:1; + unsigned char BRG14:1; + unsigned char BRG15:1; + }; +} __SPBRGH_bits_t; +extern volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits; + +#ifndef NO_BIT_DEFINES +#define BRG8 SPBRGH_bits.BRG8 +#define BRG9 SPBRGH_bits.BRG9 +#define BRG10 SPBRGH_bits.BRG10 +#define BRG11 SPBRGH_bits.BRG11 +#define BRG12 SPBRGH_bits.BRG12 +#define BRG13 SPBRGH_bits.BRG13 +#define BRG14 SPBRGH_bits.BRG14 +#define BRG15 SPBRGH_bits.BRG15 +#endif /* NO_BIT_DEFINES */ + +// ----- SRCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char PULSR:1; + unsigned char PULSS:1; + unsigned char C2REN:1; + unsigned char C1SEN:1; + unsigned char SR0:1; + unsigned char SR1:1; + }; +} __SRCON_bits_t; +extern volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits; + +#ifndef NO_BIT_DEFINES +#define PULSR SRCON_bits.PULSR +#define PULSS SRCON_bits.PULSS +#define C2REN SRCON_bits.C2REN +#define C1SEN SRCON_bits.C1SEN +#define SR0 SRCON_bits.SR0 +#define SR1 SRCON_bits.SR1 +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char T1GINV:1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char SENB:1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SENB TXSTA_bits.SENB +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char VP6EN:1; + unsigned char VRR:1; + unsigned char C2VREN:1; + unsigned char C1VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VP6EN VRCON_bits.VP6EN +#define VRR VRCON_bits.VRR +#define C2VREN VRCON_bits.C2VREN +#define C1VREN VRCON_bits.C1VREN +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUA bits -------------------- +typedef union { + struct { + unsigned char WPUA0:1; + unsigned char WPUA1:1; + unsigned char WPUA2:1; + unsigned char :1; + unsigned char WPUA4:1; + unsigned char WPUA5:1; + unsigned char :1; + unsigned char :1; + }; +} __WPUA_bits_t; +extern volatile __WPUA_bits_t __at(WPUA_ADDR) WPUA_bits; + +#ifndef NO_BIT_DEFINES +#define WPUA0 WPUA_bits.WPUA0 +#define WPUA1 WPUA_bits.WPUA1 +#define WPUA2 WPUA_bits.WPUA2 +#define WPUA4 WPUA_bits.WPUA4 +#define WPUA5 WPUA_bits.WPUA5 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char WPUB4:1; + unsigned char WPUB5:1; + unsigned char WPUB6:1; + unsigned char WPUB7:1; + }; +} __WPUB_bits_t; +extern volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + +#ifndef NO_BIT_DEFINES +#define WPUB4 WPUB_bits.WPUB4 +#define WPUB5 WPUB_bits.WPUB5 +#define WPUB6 WPUB_bits.WPUB6 +#define WPUB7 WPUB_bits.WPUB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f716.h b/device/include/pic/pic16f716.h new file mode 100644 index 0000000..c1267c4 --- /dev/null +++ b/device/include/pic/pic16f716.h @@ -0,0 +1,692 @@ +// +// Register Declarations for Microchip 16F716 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F716_H +#define P16F716_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define DATACCP_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define PWM1CON_ADDR 0x0018 +#define ECCPAS_ADDR 0x0019 +#define ADRES_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISCP_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define ADCON1_ADDR 0x009F + +// +// Memory organization. +// + + + +// LIST +// P16F716.INC Standard Header File, Version 1.01 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F716 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F716 +// 2. LIST directive in the source file +// LIST P=PIC16F716 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 16 Apr 2003 Initial Release +//1.01 30 Apr 2003 Added references for backward compatibility to PIC16C716 + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F716 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (DATACCP_ADDR) DATACCP; // C712/C716 compatibility + +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (PWM1CON_ADDR) PWM1CON; +extern __sfr __at (ECCPAS_ADDR) ECCPAS; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISCP_ADDR) TRISCP; // C712/C716 compatibility + +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- PORTB Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- PWM1CON Bits ------------------------------------------------------- + + +//----- ECCPAS Bits -------------------------------------------------------- + + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- TRISB Bits -------------------------------------------------------- + + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'BF' +// __BADRAM H'07'-H'09', H'0D', H'13'-H'14', H'1A'-H'1D' +// __BADRAM H'87'-H'89', H'8D', H'8F'-H'91', H'93'-H'9E' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF // C712/C716 compatibility +#define _BODEN_OFF 0x3FBF // C712/C716 compatibility +#define _BOREN_ON 0x3FFF +#define _BOREN_OFF 0x3FBF +#define _VBOR_25 0x3F7F +#define _VBOR_40 0x3FFF +#define _CP_ON 0x1FFF +#define _CP_ALL 0x1FFF // C712/C716 compatibility +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char DC1B0:1; + unsigned char DC1B1:1; + unsigned char P1M0:1; + unsigned char P1M1:1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define DC1B0 CCP1CON_bits.DC1B0 +#define DC1B1 CCP1CON_bits.DC1B1 +#define P1M0 CCP1CON_bits.P1M0 +#define P1M1 CCP1CON_bits.P1M1 +#endif /* NO_BIT_DEFINES */ + +// ----- ECCPAS bits -------------------- +typedef union { + struct { + unsigned char PSSBD0:1; + unsigned char PSSBD1:1; + unsigned char PSSAC0:1; + unsigned char PSSAC1:1; + unsigned char ECCPAS0:1; + unsigned char ECCPAS1:1; + unsigned char :1; + unsigned char ECCPASE:1; + }; +} __ECCPAS_bits_t; +extern volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits; + +#ifndef NO_BIT_DEFINES +#define PSSBD0 ECCPAS_bits.PSSBD0 +#define PSSBD1 ECCPAS_bits.PSSBD1 +#define PSSAC0 ECCPAS_bits.PSSAC0 +#define PSSAC1 ECCPAS_bits.PSSAC1 +#define ECCPAS0 ECCPAS_bits.ECCPAS0 +#define ECCPAS1 ECCPAS_bits.ECCPAS1 +#define ECCPASE ECCPAS_bits.ECCPASE +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char DT1CK:1; + unsigned char :1; + unsigned char DCCP:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define DT1CK PORTB_bits.DT1CK +#define DCCP PORTB_bits.DCCP +#endif /* NO_BIT_DEFINES */ + +// ----- PWM1CON bits -------------------- +typedef union { + struct { + unsigned char PDC0:1; + unsigned char PDC1:1; + unsigned char PDC2:1; + unsigned char PDC3:1; + unsigned char PDC4:1; + unsigned char PDC5:1; + unsigned char PDC6:1; + unsigned char PRSEN:1; + }; +} __PWM1CON_bits_t; +extern volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits; + +#ifndef NO_BIT_DEFINES +#define PDC0 PWM1CON_bits.PDC0 +#define PDC1 PWM1CON_bits.PDC1 +#define PDC2 PWM1CON_bits.PDC2 +#define PDC3 PWM1CON_bits.PDC3 +#define PDC4 PWM1CON_bits.PDC4 +#define PDC5 PWM1CON_bits.PDC5 +#define PDC6 PWM1CON_bits.PDC6 +#define PRSEN PWM1CON_bits.PRSEN +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define T1SYNC T1CON_bits.T1SYNC +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char TT1CK:1; + unsigned char :1; + unsigned char TCCP:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TT1CK TRISB_bits.TT1CK +#define TCCP TRISB_bits.TCCP +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f72.h b/device/include/pic/pic16f72.h new file mode 100644 index 0000000..8f98619 --- /dev/null +++ b/device/include/pic/pic16f72.h @@ -0,0 +1,847 @@ +// +// Register Declarations for Microchip 16F72 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F72_H +#define P16F72_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define ADRES_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define ADCON1_ADDR 0x009F +#define PMDATL_ADDR 0x010C +#define PMADRL_ADDR 0x010D +#define PMDATH_ADDR 0x010E +#define PMADRH_ADDR 0x010F +#define PMCON1_ADDR 0x018C + +// +// Memory organization. +// + + + +// LIST +// P16F72.INC Standard Header File, Version 1.01 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F72 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F72 +// 2. LIST directive in the source file +// LIST P=PIC16F72 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 03/22/02 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F72 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (ADCON0_ADDR) ADCON0; +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (PMDATL_ADDR) PMDATL; +extern __sfr __at (PMADRL_ADDR) PMADRL; +extern __sfr __at (PMDATH_ADDR) PMDATH; +extern __sfr __at (PMADRH_ADDR) PMADRH; + +extern __sfr __at (PMCON1_ADDR) PMCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- PMCON1 Bits -------------------------------------------------------- + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'08'-H'09', H'0D', H'18'-H'1D' +// __BADRAM H'88'-H'89', H'8D', H'8F'-H'91', H'95'-H'9E' +// __BADRAM H'105', H'107'-H'109', H'110'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18D'-H'19F' + + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BOREN_ON 0x3FFF +#define _BODEN_ON 0x3FFF // Backward compatibility only +#define _BOREN_OFF 0x3FBF +#define _BODEN_OFF 0x3FBF // Backward compatibility only +#define _CP_ALL 0x3FEF +#define _CP_OFF 0x3FFF +#define _PWRTEN_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF // Backward compatibility only +#define _PWRTEN_ON 0x3FF7 +#define _PWRTE_ON 0x3FF7 // Backward compatibility only +#define _WDTEN_ON 0x3FFF +#define _WDTEN_OFF 0x3FFB +#define _WDT_ON 0x3FFF // Backward compatibility only +#define _WDT_OFF 0x3FFB // Backward compatibility only +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char TMR0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char TMR0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T0IF:1; + unsigned char :1; + unsigned char :1; + unsigned char T0IE:1; + unsigned char :1; + unsigned char :1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define TMR0IF INTCON_bits.TMR0IF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define TMR0IE INTCON_bits.TMR0IE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PMCON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PMCON1_bits_t; +extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD PMCON1_bits.RD +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f73.h b/device/include/pic/pic16f73.h new file mode 100644 index 0000000..cab5bc0 --- /dev/null +++ b/device/include/pic/pic16f73.h @@ -0,0 +1,1038 @@ +// +// Register Declarations for Microchip 16F73 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F73_H +#define P16F73_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRES_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADCON1_ADDR 0x009F +#define PMDATA_ADDR 0x010C +#define PMADR_ADDR 0x010D +#define PMDATH_ADDR 0x010E +#define PMADRH_ADDR 0x010F +#define PMCON1_ADDR 0x018C + +// +// Memory organization. +// + + + +// LIST +// P16F73.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F73 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F73 +// 2. LIST directive in the source file +// LIST P=PIC16F73 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 00/00/00 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F73 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (PMDATA_ADDR) PMDATA; +extern __sfr __at (PMADR_ADDR) PMADR; +extern __sfr __at (PMDATH_ADDR) PMDATH; +extern __sfr __at (PMADRH_ADDR) PMADRH; + +extern __sfr __at (PMCON1_ADDR) PMCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- PMCON1 Bits -------------------------------------------------------- + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'08'-H'09' +// __BADRAM H'88'-H'89', H'8F'-H'91', H'95'-H'97', H'9A'-H'9E' +// __BADRAM H'105', H'107'-H'109', H'110'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18D'-H'19F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x3FEF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#endif /* NO_BIT_DEFINES */ + +// ----- PMCON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PMCON1_bits_t; +extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD PMCON1_bits.RD +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char :1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f737.h b/device/include/pic/pic16f737.h new file mode 100644 index 0000000..bf37da6 --- /dev/null +++ b/device/include/pic/pic16f737.h @@ -0,0 +1,1521 @@ +// +// Register Declarations for Microchip 16F737 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F737_H +#define P16F737_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define CCPR3L_ADDR 0x0095 +#define CCPR3H_ADDR 0x0096 +#define CCP3CON_ADDR 0x0097 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADCON2_ADDR 0x009B +#define CMCON_ADDR 0x009C +#define CVRCON_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define WDTCON_ADDR 0x0105 +#define LVDCON_ADDR 0x0109 +#define PMDATA_ADDR 0x010C +#define PMADR_ADDR 0x010D +#define PMDATH_ADDR 0x010E +#define PMADRH_ADDR 0x010F +#define PMCON1_ADDR 0x018C + +// +// Memory organization. +// + + + +// LIST +// P16F737.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F737 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F737 +// 2. LIST directive in the source file +// LIST P=PIC16F737 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: +//1.00 05/05/03 Initial Release +//1.01 10/21/03 Made changes to Program Memory register names. +//1.02 04/07/04 Added INT0IE & INT0IF bit names. + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F737 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (CCPR3L_ADDR) CCPR3L; +extern __sfr __at (CCPR3H_ADDR) CCPR3H; +extern __sfr __at (CCP3CON_ADDR) CCP3CON; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADCON2_ADDR) ADCON2; +extern __sfr __at (CMCON_ADDR) CMCON; +extern __sfr __at (CVRCON_ADDR) CVRCON; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (PMDATA_ADDR) PMDATA; +extern __sfr __at (PMADR_ADDR) PMADR; +extern __sfr __at (PMDATH_ADDR) PMDATH; +extern __sfr __at (PMADRH_ADDR) PMADRH; + +extern __sfr __at (PMCON1_ADDR) PMCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- TRISE Bits --------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits ------------------------------------------------------- + +//----- OSCTUNE Bits ------------------------------------------------------- + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- CCP3CON Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- ADCON2 Bits --------------------------------------------------------- + + +//----- CMCON Bits --------------------------------------------------------- + + +//----- CVRCON Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- LVDCON Bits -------------------------------------------------------- + + +//----- PMCON1 Bits -------------------------------------------------------- + + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'08' +// __BADRAM H'88', H'9A' +// __BADRAM H'107'-H'108' +// __BADRAM H'185', H'187'-H'189', H'18D'-H'18F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CONFIG1 0x2007 +#define _CONFIG2 0x2008 + +//Configuration Byte 1 Options +#define _CP_ALL 0x1FFF +#define _CP_OFF 0x3FFF +#define _CCP2_RC1 0x3FFF +#define _CCP2_RB3 0x2FFF +#define _DEBUG_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _VBOR_2_0 0x3FFF +#define _VBOR_2_7 0x3F7F +#define _VBOR_4_2 0x3EFF +#define _VBOR_4_5 0x3E7F +#define _BOREN_1 0x3FFF //MUST BE CONFIGURED IN CONJUCTION W/ BORSEN (CONFIG2) +#define _BOREN_0 0x3FBF //MUST BE CONFIGURED IN CONJUCTION W/ BORSEN (CONFIG2) +#define _MCLR_ON 0x3FFF +#define _MCLR_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _EXTRC_CLKOUT 0x3FFF +#define _EXTRC_IO 0x3FFE +#define _INTRC_CLKOUT 0x3FFD +#define _INTRC_IO 0x3FFC +#define _EXTCLK 0x3FEF +#define _HS_OSC 0x3FEE +#define _XT_OSC 0x3FED +#define _LP_OSC 0x3FEC + +//Configuration Byte 2 Options +#define _BORSEN_1 0x3FFF //MUST BE CONFIGURED IN CONJUCTION W/ BOREN (CONFIG1) +#define _BORSEN_0 0x3FBF //MUST BE CONFIGURED IN CONJUCTION W/ BOREN (CONFIG1) +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3FFD +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x3FFE + + +//**** Brown-out Reset configurations **** (Refer to the 16F7x7 Data Sheet for more details) +//BOREN_1 & BORSEN_1 = BOR enabled and always on +//BOREN_1 & BORSEN_0 = BOR enabled during operation and disabled during sleep by hardware +//BOREN_0 & BORSEN_1 = BOR controlled by software bit SBOREN (PCON,2) +//BOREN_0 & BORSEN_0 = BOR disabled + + +// To use the Configuration Bits, place the following lines in your source code +// in the following format, and change the configuration value to the desired +// setting (such as CP_OFF to CP_ALL). These are currently commented out here +// and each __CONFIG line should have the preceding semicolon removed when +// pasted into your source code. + +//Program Configuration Register 1 +// __CONFIG _CONFIG1, _CP_OFF & _CCP2_RC1 & _DEBUG_OFF & _VBOR_2_0 & BOREN_1 & _MCLR_OFF & _PWRTE_OFF & _WDT_OFF & _HS_OSC + +//Program Configuration Register 2 +// __CONFIG _CONFIG2, _BORSEN_1 & _IESO_OFF & _FCMEN_OFF + + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char CHS3:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define CHS3 ADCON0_bits.CHS3 +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char ADCS2:1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define VCFG0 ADCON1_bits.VCFG0 +#define VCFG1 ADCON1_bits.VCFG1 +#define ADCS2 ADCON1_bits.ADCS2 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ACQT0:1; + unsigned char ACQT1:1; + unsigned char ACQT2:1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON2_bits_t; +extern volatile __ADCON2_bits_t __at(ADCON2_ADDR) ADCON2_bits; + +#ifndef NO_BIT_DEFINES +#define ACQT0 ADCON2_bits.ACQT0 +#define ACQT1 ADCON2_bits.ACQT1 +#define ACQT2 ADCON2_bits.ACQT2 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP3CON bits -------------------- +typedef union { + struct { + unsigned char CCP3M0:1; + unsigned char CCP3M1:1; + unsigned char CCP3M2:1; + unsigned char CCP3M3:1; + unsigned char CCP3Y:1; + unsigned char CCP3X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP3CON_bits_t; +extern volatile __CCP3CON_bits_t __at(CCP3CON_ADDR) CCP3CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP3M0 CCP3CON_bits.CCP3M0 +#define CCP3M1 CCP3CON_bits.CCP3M1 +#define CCP3M2 CCP3CON_bits.CCP3M2 +#define CCP3M3 CCP3CON_bits.CCP3M3 +#define CCP3Y CCP3CON_bits.CCP3Y +#define CCP3X CCP3CON_bits.CCP3X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1INV CMCON_bits.C1INV +#define C2INV CMCON_bits.C2INV +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CVRCON bits -------------------- +typedef union { + struct { + unsigned char CVR0:1; + unsigned char CVR1:1; + unsigned char CVR2:1; + unsigned char CVR3:1; + unsigned char :1; + unsigned char CVRR:1; + unsigned char CVROE:1; + unsigned char CVREN:1; + }; +} __CVRCON_bits_t; +extern volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; + +#ifndef NO_BIT_DEFINES +#define CVR0 CVRCON_bits.CVR0 +#define CVR1 CVRCON_bits.CVR1 +#define CVR2 CVRCON_bits.CVR2 +#define CVR3 CVRCON_bits.CVR3 +#define CVRR CVRCON_bits.CVRR +#define CVROE CVRCON_bits.CVROE +#define CVREN CVRCON_bits.CVREN +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; + struct { + unsigned char :1; + unsigned char INT0IF:1; + unsigned char TMR0IF:1; + unsigned char :1; + unsigned char INT0IE:1; + unsigned char TMR0IE:1; + unsigned char :1; + unsigned char :1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define INT0IF INTCON_bits.INT0IF +#define T0IF INTCON_bits.T0IF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define INT0IE INTCON_bits.INT0IE +#define T0IE INTCON_bits.T0IE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LVDL0:1; + unsigned char LVDL1:1; + unsigned char LVDL2:1; + unsigned char LVDL3:1; + unsigned char LVDEN:1; + unsigned char IRVST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LVDL0 LVDCON_bits.LVDL0 +#define LVDL1 LVDCON_bits.LVDL1 +#define LVDL2 LVDCON_bits.LVDL2 +#define LVDL3 LVDCON_bits.LVDL3 +#define LVDEN LVDCON_bits.LVDEN +#define IRVST LVDCON_bits.IRVST +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS0:1; + unsigned char SCS1:1; + unsigned char IOFS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS0 OSCCON_bits.SCS0 +#define SCS1 OSCCON_bits.SCS1 +#define IOFS OSCCON_bits.IOFS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char TUN5:1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#define TUN5 OSCTUNE_bits.TUN5 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char SBOREN:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define SBOREN PCON_bits.SBOREN +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char PSPIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define PSPIE PIE1_bits.PSPIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char CCP3IE:1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char :1; + unsigned char LVDIE:1; + unsigned char CMIE:1; + unsigned char OSFIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define CCP3IE PIE2_bits.CCP3IE +#define BCLIE PIE2_bits.BCLIE +#define LVDIE PIE2_bits.LVDIE +#define CMIE PIE2_bits.CMIE +#define OSFIE PIE2_bits.OSFIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char PSPIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define PSPIF PIR1_bits.PSPIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char CCP3IF:1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char :1; + unsigned char LVDIF:1; + unsigned char CMIF:1; + unsigned char OSFIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define CCP3IF PIR2_bits.CCP3IF +#define BCLIF PIR2_bits.BCLIF +#define LVDIF PIR2_bits.LVDIF +#define CMIF PIR2_bits.CMIF +#define OSFIF PIR2_bits.OSFIF +#endif /* NO_BIT_DEFINES */ + +// ----- PMCON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PMCON1_bits_t; +extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD PMCON1_bits.RD +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char T1RUN:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define T1RUN T1CON_bits.T1RUN +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char TRISE3:1; + unsigned char PSPMODE:1; + unsigned char IBOV:1; + unsigned char OBF:1; + unsigned char IBF:1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#define TRISE3 TRISE_bits.TRISE3 +#define PSPMODE TRISE_bits.PSPMODE +#define IBOV TRISE_bits.IBOV +#define OBF TRISE_bits.OBF +#define IBF TRISE_bits.IBF +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char SWDTE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define SWDTE WDTCON_bits.SWDTE +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f74.h b/device/include/pic/pic16f74.h new file mode 100644 index 0000000..7974f18 --- /dev/null +++ b/device/include/pic/pic16f74.h @@ -0,0 +1,1147 @@ +// +// Register Declarations for Microchip 16F74 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F74_H +#define P16F74_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRES_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADCON1_ADDR 0x009F +#define PMDATA_ADDR 0x010C +#define PMADR_ADDR 0x010D +#define PMDATH_ADDR 0x010E +#define PMADRH_ADDR 0x010F +#define PMCON1_ADDR 0x018C + +// +// Memory organization. +// + + + +// LIST +// P16F74.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F74 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F74 +// 2. LIST directive in the source file +// LIST P=PIC16F74 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 00/00/00 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F74 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (PMDATA_ADDR) PMDATA; +extern __sfr __at (PMADR_ADDR) PMADR; +extern __sfr __at (PMDATH_ADDR) PMDATH; +extern __sfr __at (PMADRH_ADDR) PMADRH; + +extern __sfr __at (PMCON1_ADDR) PMCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- TRISE Bits --------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- PMCON1 Bits -------------------------------------------------------- + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'8F'-H'91', H'95'-H'97', H'9A'-H'9E' +// __BADRAM H'105', H'107'-H'109', H'110'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18D'-H'19F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x3FEF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char PSPIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define PSPIE PIE1_bits.PSPIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char PSPIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define PSPIF PIR1_bits.PSPIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#endif /* NO_BIT_DEFINES */ + +// ----- PMCON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PMCON1_bits_t; +extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD PMCON1_bits.RD +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char :1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char PSPMODE:1; + unsigned char IBOV:1; + unsigned char OBF:1; + unsigned char IBF:1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#define PSPMODE TRISE_bits.PSPMODE +#define IBOV TRISE_bits.IBOV +#define OBF TRISE_bits.OBF +#define IBF TRISE_bits.IBF +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f76.h b/device/include/pic/pic16f76.h new file mode 100644 index 0000000..ce30e3a --- /dev/null +++ b/device/include/pic/pic16f76.h @@ -0,0 +1,1037 @@ +// +// Register Declarations for Microchip 16F76 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F76_H +#define P16F76_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRES_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADCON1_ADDR 0x009F +#define PMDATA_ADDR 0x010C +#define PMADR_ADDR 0x010D +#define PMDATH_ADDR 0x010E +#define PMADRH_ADDR 0x010F +#define PMCON1_ADDR 0x018C + +// +// Memory organization. +// + + + +// LIST +// P16F76.INC Standard Header File, Version 1.01 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F76 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F76 +// 2. LIST directive in the source file +// LIST P=PIC16F76 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 00/00/00 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F76 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (PMDATA_ADDR) PMDATA; +extern __sfr __at (PMADR_ADDR) PMADR; +extern __sfr __at (PMDATH_ADDR) PMDATH; +extern __sfr __at (PMADRH_ADDR) PMADRH; + +extern __sfr __at (PMCON1_ADDR) PMCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- PMCON1 Bits -------------------------------------------------------- + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'08'-H'09', H'88'-H'89' +// __BADRAM H'8F'-H'91', H'95'-H'97', H'9A'-H'9E' +// __BADRAM H'105', H'107'-H'109' +// __BADRAM H'185', H'187'-H'189', H'18D'-H'18F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x3FEF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#endif /* NO_BIT_DEFINES */ + +// ----- PMCON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PMCON1_bits_t; +extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD PMCON1_bits.RD +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char :1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f767.h b/device/include/pic/pic16f767.h new file mode 100644 index 0000000..7720888 --- /dev/null +++ b/device/include/pic/pic16f767.h @@ -0,0 +1,1465 @@ +// +// Register Declarations for Microchip 16F767 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F767_H +#define P16F767_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define CCPR3L_ADDR 0x0095 +#define CCPR3H_ADDR 0x0096 +#define CCP3CON_ADDR 0x0097 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADCON2_ADDR 0x009B +#define CMCON_ADDR 0x009C +#define CVRCON_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define WDTCON_ADDR 0x0105 +#define LVDCON_ADDR 0x0109 +#define PMDATA_ADDR 0x010C +#define PMADR_ADDR 0x010D +#define PMDATH_ADDR 0x010E +#define PMADRH_ADDR 0x010F +#define PMCON1_ADDR 0x018C + +// +// Memory organization. +// + + + +// LIST +// P16F767.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F767 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F767 +// 2. LIST directive in the source file +// LIST P=PIC16F767 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: +//1.00 05/05/03 Initial Release +//1.01 10/21/03 Made changes to Program Memory register names. +//1.02 04/07/04 Added INT0IE & INT0IF bit names. + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F767 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (CCPR3L_ADDR) CCPR3L; +extern __sfr __at (CCPR3H_ADDR) CCPR3H; +extern __sfr __at (CCP3CON_ADDR) CCP3CON; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADCON2_ADDR) ADCON2; +extern __sfr __at (CMCON_ADDR) CMCON; +extern __sfr __at (CVRCON_ADDR) CVRCON; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (PMDATA_ADDR) PMDATA; +extern __sfr __at (PMADR_ADDR) PMADR; +extern __sfr __at (PMDATH_ADDR) PMDATH; +extern __sfr __at (PMADRH_ADDR) PMADRH; + +extern __sfr __at (PMCON1_ADDR) PMCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- TRISE Bits --------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits ------------------------------------------------------- + +//----- OSCTUNE Bits ------------------------------------------------------- + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- CCP3CON Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- ADCON2 Bits --------------------------------------------------------- + + +//----- CMCON Bits --------------------------------------------------------- + + +//----- CVRCON Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- LVDCON Bits -------------------------------------------------------- + + +//----- PMCON1 Bits -------------------------------------------------------- + + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'08' +// __BADRAM H'88', H'9A' +// __BADRAM H'107'-H'108' +// __BADRAM H'185', H'187'-H'189', H'18D'-H'18F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CONFIG1 0x2007 +#define _CONFIG2 0x2008 + +//Configuration Byte 1 Options +#define _CP_ALL 0x1FFF +#define _CP_OFF 0x3FFF +#define _CCP2_RC1 0x3FFF +#define _CCP2_RB3 0x2FFF +#define _DEBUG_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _VBOR_2_0 0x3FFF +#define _VBOR_2_7 0x3F7F +#define _VBOR_4_2 0x3EFF +#define _VBOR_4_5 0x3E7F +#define _BOREN_1 0x3FFF //MUST BE CONFIGURED IN CONJUCTION W/ BORSEN (CONFIG2) +#define _BOREN_0 0x3FBF //MUST BE CONFIGURED IN CONJUCTION W/ BORSEN (CONFIG2) +#define _MCLR_ON 0x3FFF +#define _MCLR_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _EXTRC_CLKOUT 0x3FFF +#define _EXTRC_IO 0x3FFE +#define _INTRC_CLKOUT 0x3FFD +#define _INTRC_IO 0x3FFC +#define _EXTCLK 0x3FEF +#define _HS_OSC 0x3FEE +#define _XT_OSC 0x3FED +#define _LP_OSC 0x3FEC + +//Configuration Byte 2 Options +#define _BORSEN_1 0x3FFF //MUST BE CONFIGURED IN CONJUCTION W/ BOREN (CONFIG1) +#define _BORSEN_0 0x3FBF //MUST BE CONFIGURED IN CONJUCTION W/ BOREN (CONFIG1) +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3FFD +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x3FFE + + +//**** Brown-out Reset configurations **** (Refer to the 16F7x7 Data Sheet for more details) +//BOREN_1 & BORSEN_1 = BOR enabled and always on +//BOREN_1 & BORSEN_0 = BOR enabled during operation and disabled during sleep by hardware +//BOREN_0 & BORSEN_1 = BOR controlled by software bit SBOREN (PCON,2) +//BOREN_0 & BORSEN_0 = BOR disabled + + +// To use the Configuration Bits, place the following lines in your source code +// in the following format, and change the configuration value to the desired +// setting (such as CP_OFF to CP_ALL). These are currently commented out here +// and each __CONFIG line should have the preceding semicolon removed when +// pasted into your source code. + +//Program Configuration Register 1 +// __CONFIG _CONFIG1, _CP_OFF & _CCP2_RC1 & _DEBUG_OFF & _VBOR_2_0 & BOREN_1 & _MCLR_OFF & _PWRTE_OFF & _WDT_OFF & _HS_OSC + +//Program Configuration Register 2 +// __CONFIG _CONFIG2, _BORSEN_1 & _IESO_OFF & _FCMEN_OFF + + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char CHS3:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define CHS3 ADCON0_bits.CHS3 +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char ADCS2:1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define VCFG0 ADCON1_bits.VCFG0 +#define VCFG1 ADCON1_bits.VCFG1 +#define ADCS2 ADCON1_bits.ADCS2 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ACQT0:1; + unsigned char ACQT1:1; + unsigned char ACQT2:1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON2_bits_t; +extern volatile __ADCON2_bits_t __at(ADCON2_ADDR) ADCON2_bits; + +#ifndef NO_BIT_DEFINES +#define ACQT0 ADCON2_bits.ACQT0 +#define ACQT1 ADCON2_bits.ACQT1 +#define ACQT2 ADCON2_bits.ACQT2 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP3CON bits -------------------- +typedef union { + struct { + unsigned char CCP3M0:1; + unsigned char CCP3M1:1; + unsigned char CCP3M2:1; + unsigned char CCP3M3:1; + unsigned char CCP3Y:1; + unsigned char CCP3X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP3CON_bits_t; +extern volatile __CCP3CON_bits_t __at(CCP3CON_ADDR) CCP3CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP3M0 CCP3CON_bits.CCP3M0 +#define CCP3M1 CCP3CON_bits.CCP3M1 +#define CCP3M2 CCP3CON_bits.CCP3M2 +#define CCP3M3 CCP3CON_bits.CCP3M3 +#define CCP3Y CCP3CON_bits.CCP3Y +#define CCP3X CCP3CON_bits.CCP3X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1INV CMCON_bits.C1INV +#define C2INV CMCON_bits.C2INV +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CVRCON bits -------------------- +typedef union { + struct { + unsigned char CVR0:1; + unsigned char CVR1:1; + unsigned char CVR2:1; + unsigned char CVR3:1; + unsigned char :1; + unsigned char CVRR:1; + unsigned char CVROE:1; + unsigned char CVREN:1; + }; +} __CVRCON_bits_t; +extern volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; + +#ifndef NO_BIT_DEFINES +#define CVR0 CVRCON_bits.CVR0 +#define CVR1 CVRCON_bits.CVR1 +#define CVR2 CVRCON_bits.CVR2 +#define CVR3 CVRCON_bits.CVR3 +#define CVRR CVRCON_bits.CVRR +#define CVROE CVRCON_bits.CVROE +#define CVREN CVRCON_bits.CVREN +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; + struct { + unsigned char :1; + unsigned char INT0IF:1; + unsigned char TMR0IF:1; + unsigned char :1; + unsigned char INT0IE:1; + unsigned char TMR0IE:1; + unsigned char :1; + unsigned char :1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define INT0IF INTCON_bits.INT0IF +#define T0IF INTCON_bits.T0IF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define INT0IE INTCON_bits.INT0IE +#define T0IE INTCON_bits.T0IE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LVDL0:1; + unsigned char LVDL1:1; + unsigned char LVDL2:1; + unsigned char LVDL3:1; + unsigned char LVDEN:1; + unsigned char IRVST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LVDL0 LVDCON_bits.LVDL0 +#define LVDL1 LVDCON_bits.LVDL1 +#define LVDL2 LVDCON_bits.LVDL2 +#define LVDL3 LVDCON_bits.LVDL3 +#define LVDEN LVDCON_bits.LVDEN +#define IRVST LVDCON_bits.IRVST +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS0:1; + unsigned char SCS1:1; + unsigned char IOFS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS0 OSCCON_bits.SCS0 +#define SCS1 OSCCON_bits.SCS1 +#define IOFS OSCCON_bits.IOFS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char TUN5:1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#define TUN5 OSCTUNE_bits.TUN5 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char SBOREN:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define SBOREN PCON_bits.SBOREN +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char PSPIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define PSPIE PIE1_bits.PSPIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char CCP3IE:1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char :1; + unsigned char LVDIE:1; + unsigned char CMIE:1; + unsigned char OSFIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define CCP3IE PIE2_bits.CCP3IE +#define BCLIE PIE2_bits.BCLIE +#define LVDIE PIE2_bits.LVDIE +#define CMIE PIE2_bits.CMIE +#define OSFIE PIE2_bits.OSFIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char PSPIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define PSPIF PIR1_bits.PSPIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char CCP3IF:1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char :1; + unsigned char LVDIF:1; + unsigned char CMIF:1; + unsigned char OSFIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define CCP3IF PIR2_bits.CCP3IF +#define BCLIF PIR2_bits.BCLIF +#define LVDIF PIR2_bits.LVDIF +#define CMIF PIR2_bits.CMIF +#define OSFIF PIR2_bits.OSFIF +#endif /* NO_BIT_DEFINES */ + +// ----- PMCON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PMCON1_bits_t; +extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD PMCON1_bits.RD +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char T1RUN:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define T1RUN T1CON_bits.T1RUN +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char TRISE3:1; + unsigned char PSPMODE:1; + unsigned char IBOV:1; + unsigned char OBF:1; + unsigned char IBF:1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#define TRISE3 TRISE_bits.TRISE3 +#define PSPMODE TRISE_bits.PSPMODE +#define IBOV TRISE_bits.IBOV +#define OBF TRISE_bits.OBF +#define IBF TRISE_bits.IBF +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char SWDTE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define SWDTE WDTCON_bits.SWDTE +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f77.h b/device/include/pic/pic16f77.h new file mode 100644 index 0000000..46622f2 --- /dev/null +++ b/device/include/pic/pic16f77.h @@ -0,0 +1,1147 @@ +// +// Register Declarations for Microchip 16F77 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F77_H +#define P16F77_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRES_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADCON1_ADDR 0x009F +#define PMDATA_ADDR 0x010C +#define PMADR_ADDR 0x010D +#define PMDATH_ADDR 0x010E +#define PMADRH_ADDR 0x010F +#define PMCON1_ADDR 0x018C + +// +// Memory organization. +// + + + +// LIST +// P16F77.INC Standard Header File, Version 1.01 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F77 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F77 +// 2. LIST directive in the source file +// LIST P=PIC16F77 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 00/00/00 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F77 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRES_ADDR) ADRES; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (PMDATA_ADDR) PMDATA; +extern __sfr __at (PMADR_ADDR) PMADR; +extern __sfr __at (PMDATH_ADDR) PMDATH; +extern __sfr __at (PMADRH_ADDR) PMADRH; + +extern __sfr __at (PMCON1_ADDR) PMCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- TRISE Bits --------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- PMCON1 Bits -------------------------------------------------------- + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'8F'-H'91', H'95'-H'97', H'9A'-H'9E' +// __BADRAM H'105', H'107'-H'109' +// __BADRAM H'185', H'187'-H'189', H'18D'-H'18F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _CP_ALL 0x3FEF +#define _CP_OFF 0x3FFF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char PSPIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define PSPIE PIE1_bits.PSPIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char PSPIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define PSPIF PIR1_bits.PSPIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#endif /* NO_BIT_DEFINES */ + +// ----- PMCON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PMCON1_bits_t; +extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD PMCON1_bits.RD +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char :1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char PSPMODE:1; + unsigned char IBOV:1; + unsigned char OBF:1; + unsigned char IBF:1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#define PSPMODE TRISE_bits.PSPMODE +#define IBOV TRISE_bits.IBOV +#define OBF TRISE_bits.OBF +#define IBF TRISE_bits.IBF +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f777.h b/device/include/pic/pic16f777.h new file mode 100644 index 0000000..dac5d55 --- /dev/null +++ b/device/include/pic/pic16f777.h @@ -0,0 +1,1520 @@ +// +// Register Declarations for Microchip 16F777 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F777_H +#define P16F777_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define CCPR3L_ADDR 0x0095 +#define CCPR3H_ADDR 0x0096 +#define CCP3CON_ADDR 0x0097 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADCON2_ADDR 0x009B +#define CMCON_ADDR 0x009C +#define CVRCON_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define WDTCON_ADDR 0x0105 +#define LVDCON_ADDR 0x0109 +#define PMDATA_ADDR 0x010C +#define PMADR_ADDR 0x010D +#define PMDATH_ADDR 0x010E +#define PMADRH_ADDR 0x010F +#define PMCON1_ADDR 0x018C + +// +// Memory organization. +// + + + +// LIST +// P16F777.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F777 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F777 +// 2. LIST directive in the source file +// LIST P=PIC16F777 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: +//1.00 05/05/03 Initial Release +//1.01 10/21/03 Made changes to Program Memory register names. +//1.02 04/07/04 Added INT0IE & INT0IF bit names. + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F777 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (CCPR3L_ADDR) CCPR3L; +extern __sfr __at (CCPR3H_ADDR) CCPR3H; +extern __sfr __at (CCP3CON_ADDR) CCP3CON; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADCON2_ADDR) ADCON2; +extern __sfr __at (CMCON_ADDR) CMCON; +extern __sfr __at (CVRCON_ADDR) CVRCON; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (PMDATA_ADDR) PMDATA; +extern __sfr __at (PMADR_ADDR) PMADR; +extern __sfr __at (PMDATH_ADDR) PMDATH; +extern __sfr __at (PMADRH_ADDR) PMADRH; + +extern __sfr __at (PMCON1_ADDR) PMCON1; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- TRISE Bits --------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits ------------------------------------------------------- + +//----- OSCTUNE Bits ------------------------------------------------------- + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- CCP3CON Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- ADCON2 Bits --------------------------------------------------------- + + +//----- CMCON Bits --------------------------------------------------------- + + +//----- CVRCON Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- LVDCON Bits -------------------------------------------------------- + + +//----- PMCON1 Bits -------------------------------------------------------- + + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'9A' +// __BADRAM H'107'-H'108' +// __BADRAM H'185', H'187'-H'189', H'18D'-H'18F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CONFIG1 0x2007 +#define _CONFIG2 0x2008 + +//Configuration Byte 1 Options +#define _CP_ALL 0x1FFF +#define _CP_OFF 0x3FFF +#define _CCP2_RC1 0x3FFF +#define _CCP2_RB3 0x2FFF +#define _DEBUG_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _VBOR_2_0 0x3FFF +#define _VBOR_2_7 0x3F7F +#define _VBOR_4_2 0x3EFF +#define _VBOR_4_5 0x3E7F +#define _BOREN_1 0x3FFF //MUST BE CONFIGURED IN CONJUCTION W/ BORSEN (CONFIG2) +#define _BOREN_0 0x3FBF //MUST BE CONFIGURED IN CONJUCTION W/ BORSEN (CONFIG2) +#define _MCLR_ON 0x3FFF +#define _MCLR_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _EXTRC_CLKOUT 0x3FFF +#define _EXTRC_IO 0x3FFE +#define _INTRC_CLKOUT 0x3FFD +#define _INTRC_IO 0x3FFC +#define _EXTCLK 0x3FEF +#define _HS_OSC 0x3FEE +#define _XT_OSC 0x3FED +#define _LP_OSC 0x3FEC + +//Configuration Byte 2 Options +#define _BORSEN_1 0x3FFF //MUST BE CONFIGURED IN CONJUCTION W/ BOREN (CONFIG1) +#define _BORSEN_0 0x3FBF //MUST BE CONFIGURED IN CONJUCTION W/ BOREN (CONFIG1) +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3FFD +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x3FFE + + +//**** Brown-out Reset configurations **** (Refer to the 16F7x7 Data Sheet for more details) +//BOREN_1 & BORSEN_1 = BOR enabled and always on +//BOREN_1 & BORSEN_0 = BOR enabled during operation and disabled during sleep by hardware +//BOREN_0 & BORSEN_1 = BOR controlled by software bit SBOREN (PCON,2) +//BOREN_0 & BORSEN_0 = BOR disabled + + +// To use the Configuration Bits, place the following lines in your source code +// in the following format, and change the configuration value to the desired +// setting (such as CP_OFF to CP_ALL). These are currently commented out here +// and each __CONFIG line should have the preceding semicolon removed when +// pasted into your source code. + +//Program Configuration Register 1 +// __CONFIG _CONFIG1, _CP_OFF & _CCP2_RC1 & _DEBUG_OFF & _VBOR_2_0 & BOREN_1 & _MCLR_OFF & _PWRTE_OFF & _WDT_OFF & _HS_OSC + +//Program Configuration Register 2 +// __CONFIG _CONFIG2, _BORSEN_1 & _IESO_OFF & _FCMEN_OFF + + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char CHS3:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define CHS3 ADCON0_bits.CHS3 +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char ADCS2:1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define VCFG0 ADCON1_bits.VCFG0 +#define VCFG1 ADCON1_bits.VCFG1 +#define ADCS2 ADCON1_bits.ADCS2 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ACQT0:1; + unsigned char ACQT1:1; + unsigned char ACQT2:1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON2_bits_t; +extern volatile __ADCON2_bits_t __at(ADCON2_ADDR) ADCON2_bits; + +#ifndef NO_BIT_DEFINES +#define ACQT0 ADCON2_bits.ACQT0 +#define ACQT1 ADCON2_bits.ACQT1 +#define ACQT2 ADCON2_bits.ACQT2 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP3CON bits -------------------- +typedef union { + struct { + unsigned char CCP3M0:1; + unsigned char CCP3M1:1; + unsigned char CCP3M2:1; + unsigned char CCP3M3:1; + unsigned char CCP3Y:1; + unsigned char CCP3X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP3CON_bits_t; +extern volatile __CCP3CON_bits_t __at(CCP3CON_ADDR) CCP3CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP3M0 CCP3CON_bits.CCP3M0 +#define CCP3M1 CCP3CON_bits.CCP3M1 +#define CCP3M2 CCP3CON_bits.CCP3M2 +#define CCP3M3 CCP3CON_bits.CCP3M3 +#define CCP3Y CCP3CON_bits.CCP3Y +#define CCP3X CCP3CON_bits.CCP3X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1INV CMCON_bits.C1INV +#define C2INV CMCON_bits.C2INV +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CVRCON bits -------------------- +typedef union { + struct { + unsigned char CVR0:1; + unsigned char CVR1:1; + unsigned char CVR2:1; + unsigned char CVR3:1; + unsigned char :1; + unsigned char CVRR:1; + unsigned char CVROE:1; + unsigned char CVREN:1; + }; +} __CVRCON_bits_t; +extern volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; + +#ifndef NO_BIT_DEFINES +#define CVR0 CVRCON_bits.CVR0 +#define CVR1 CVRCON_bits.CVR1 +#define CVR2 CVRCON_bits.CVR2 +#define CVR3 CVRCON_bits.CVR3 +#define CVRR CVRCON_bits.CVRR +#define CVROE CVRCON_bits.CVROE +#define CVREN CVRCON_bits.CVREN +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; + struct { + unsigned char :1; + unsigned char INT0IF:1; + unsigned char TMR0IF:1; + unsigned char :1; + unsigned char INT0IE:1; + unsigned char TMR0IE:1; + unsigned char :1; + unsigned char :1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define INT0IF INTCON_bits.INT0IF +#define T0IF INTCON_bits.T0IF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define INT0IE INTCON_bits.INT0IE +#define T0IE INTCON_bits.T0IE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LVDL0:1; + unsigned char LVDL1:1; + unsigned char LVDL2:1; + unsigned char LVDL3:1; + unsigned char LVDEN:1; + unsigned char IRVST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LVDL0 LVDCON_bits.LVDL0 +#define LVDL1 LVDCON_bits.LVDL1 +#define LVDL2 LVDCON_bits.LVDL2 +#define LVDL3 LVDCON_bits.LVDL3 +#define LVDEN LVDCON_bits.LVDEN +#define IRVST LVDCON_bits.IRVST +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS0:1; + unsigned char SCS1:1; + unsigned char IOFS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS0 OSCCON_bits.SCS0 +#define SCS1 OSCCON_bits.SCS1 +#define IOFS OSCCON_bits.IOFS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char TUN5:1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#define TUN5 OSCTUNE_bits.TUN5 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char SBOREN:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define SBOREN PCON_bits.SBOREN +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char PSPIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define PSPIE PIE1_bits.PSPIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char CCP3IE:1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char :1; + unsigned char LVDIE:1; + unsigned char CMIE:1; + unsigned char OSFIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define CCP3IE PIE2_bits.CCP3IE +#define BCLIE PIE2_bits.BCLIE +#define LVDIE PIE2_bits.LVDIE +#define CMIE PIE2_bits.CMIE +#define OSFIE PIE2_bits.OSFIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char PSPIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define PSPIF PIR1_bits.PSPIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char CCP3IF:1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char :1; + unsigned char LVDIF:1; + unsigned char CMIF:1; + unsigned char OSFIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define CCP3IF PIR2_bits.CCP3IF +#define BCLIF PIR2_bits.BCLIF +#define LVDIF PIR2_bits.LVDIF +#define CMIF PIR2_bits.CMIF +#define OSFIF PIR2_bits.OSFIF +#endif /* NO_BIT_DEFINES */ + +// ----- PMCON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PMCON1_bits_t; +extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD PMCON1_bits.RD +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char T1RUN:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define T1RUN T1CON_bits.T1RUN +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char TRISE3:1; + unsigned char PSPMODE:1; + unsigned char IBOV:1; + unsigned char OBF:1; + unsigned char IBF:1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#define TRISE3 TRISE_bits.TRISE3 +#define PSPMODE TRISE_bits.PSPMODE +#define IBOV TRISE_bits.IBOV +#define OBF TRISE_bits.OBF +#define IBF TRISE_bits.IBF +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char SWDTE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define SWDTE WDTCON_bits.SWDTE +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f785.h b/device/include/pic/pic16f785.h new file mode 100644 index 0000000..28beb83 --- /dev/null +++ b/device/include/pic/pic16f785.h @@ -0,0 +1,1285 @@ +// +// Register Declarations for Microchip 16F785 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F785_H +#define P16F785_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define CCPR1L_ADDR 0x0013 +#define CCPR1H_ADDR 0x0014 +#define CCP1CON_ADDR 0x0015 +#define WDTCON_ADDR 0x0018 +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define ANSEL_ADDR 0x0091 +#define ANSEL0_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define ANSEL1_ADDR 0x0093 +#define WPU_ADDR 0x0095 +#define WPUA_ADDR 0x0095 +#define IOC_ADDR 0x0096 +#define IOCA_ADDR 0x0096 +#define REFCON_ADDR 0x0098 +#define VRCON_ADDR 0x0099 +#define EEDAT_ADDR 0x009A +#define EEDATA_ADDR 0x009A +#define EEADR_ADDR 0x009B +#define EECON1_ADDR 0x009C +#define EECON2_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define PWMCON1_ADDR 0x0110 +#define PWMCON0_ADDR 0x0111 +#define PWMCLK_ADDR 0x0112 +#define PWMPH1_ADDR 0x0113 +#define PWMPH2_ADDR 0x0114 +#define CM1CON0_ADDR 0x0119 +#define CM2CON0_ADDR 0x011A +#define CM2CON1_ADDR 0x011B +#define OPA1CON_ADDR 0x011C +#define OPA2CON_ADDR 0x011D + +// +// Memory organization. +// + + + +// LIST +// P16F785.INC Standard Header File, Version 1.10 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F785 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F785 +// 2. LIST directive in the source file +// LIST P=PIC16F785 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== +//1.00 03/26/04 Original +//1.10 07/12/04 Updated for changes to REFCON and VRCON +//1.20 08/26/04 Updated for changes from BOD to BOR +//1.30 09/23/04 Corrected addresses for OPA1CON and OPA2CON +//1.40 10/25/04 Added WPUA3 bit to WPUA register +// Deleted OVRLP bit from PWMCON1 register +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F785 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; + +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; + +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; + +extern __sfr __at (WDTCON_ADDR) WDTCON; + +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; + +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; + +extern __sfr __at (PIE1_ADDR) PIE1; + +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (ANSEL0_ADDR) ANSEL0; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (ANSEL1_ADDR) ANSEL1; + +extern __sfr __at (WPU_ADDR) WPU; +extern __sfr __at (WPUA_ADDR) WPUA; +extern __sfr __at (IOC_ADDR) IOC; +extern __sfr __at (IOCA_ADDR) IOCA; + +extern __sfr __at (REFCON_ADDR) REFCON; +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (EEDAT_ADDR) EEDAT; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + + +extern __sfr __at (PWMCON1_ADDR) PWMCON1; +extern __sfr __at (PWMCON0_ADDR) PWMCON0; +extern __sfr __at (PWMCLK_ADDR) PWMCLK; +extern __sfr __at (PWMPH1_ADDR) PWMPH1; +extern __sfr __at (PWMPH2_ADDR) PWMPH2; + +extern __sfr __at (CM1CON0_ADDR) CM1CON0; +extern __sfr __at (CM2CON0_ADDR) CM2CON0; +extern __sfr __at (CM2CON1_ADDR) CM2CON1; +extern __sfr __at (OPA1CON_ADDR) OPA1CON; +extern __sfr __at (OPA2CON_ADDR) OPA2CON; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits -------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + +//----- ANSEL or ANSEL0 ---------------------------------------------------- + + +//----- ANSEL1 ------------------------------------------------------------- + + +//----- WPUA -------------------------------------------------------------- + + +//----- IOC -------------------------------------------------------------- + + +//----- IOCA -------------------------------------------------------------- + + +//----- REFCON ------------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//----- EECON1 ------------------------------------------------------------- + + +//----- ADCON1 ------------------------------------------------------------- + + +//----- PWMCON1 ------------------------------------------------------------- + + +//----- PWMCON0 ------------------------------------------------------------- + + +//----- PWMCLK ------------------------------------------------------------- + + +//----- PWMPH1 & PWMPH2 ---------------------------------------------------- + + +//----- CM1CON0 ------------------------------------------------------------- + + +//----- CM2CON0 ------------------------------------------------------------- + + +//----- CM2CON1 ------------------------------------------------------------- + + +//----- OPA1CON & OPA2CON --------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'08'-H'09', H'0D', H'16'-H'17', H'19'-H'1D' +// __BADRAM H'88'-H'89', H'8D', H'94', H'97', H'C0'-H'EF' +// __BADRAM H'108'-H'109', H'10C'-H'10F', H'115'-H'118', H'11E'-H'16F' +// __BADRAM H'188'-H'189', H'18C'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOD_ON 0x3FFF +#define _BOD_NSLEEP 0x3EFF +#define _BOD_SBODEN 0x3DFF +#define _BOD_OFF 0x3CFF +#define _BOR_ON 0x3FFF +#define _BOR_NSLEEP 0x3EFF +#define _BOR_SBOREN 0x3DFF +#define _BOR_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FEF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF +#define _INTOSCIO 0x3FFC +#define _INTOSC 0x3FFD +#define _EXTRCIO 0x3FFE +#define _EXTRC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char CHS3:1; + unsigned char VCFG:1; + unsigned char ADFM:1; + }; + struct { + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define CHS3 ADCON0_bits.CHS3 +#define VCFG ADCON0_bits.VCFG +#define ADFM ADCON0_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + unsigned char ADCS2:1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define ADCS0 ADCON1_bits.ADCS0 +#define ADCS1 ADCON1_bits.ADCS1 +#define ADCS2 ADCON1_bits.ADCS2 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSEL1 bits -------------------- +typedef union { + struct { + unsigned char ANS8:1; + unsigned char ANS9:1; + unsigned char ANS10:1; + unsigned char ANS11:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ANSEL1_bits_t; +extern volatile __ANSEL1_bits_t __at(ANSEL1_ADDR) ANSEL1_bits; + +#ifndef NO_BIT_DEFINES +#define ANS8 ANSEL1_bits.ANS8 +#define ANS9 ANSEL1_bits.ANS9 +#define ANS10 ANSEL1_bits.ANS10 +#define ANS11 ANSEL1_bits.ANS11 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char DC1B0:1; + unsigned char DC1B1:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define DC1B0 CCP1CON_bits.DC1B0 +#define DC1B1 CCP1CON_bits.DC1B1 +#endif /* NO_BIT_DEFINES */ + +// ----- CM1CON0 bits -------------------- +typedef union { + struct { + unsigned char C1CH0:1; + unsigned char C1CH1:1; + unsigned char C1R:1; + unsigned char C1SP:1; + unsigned char C1POL:1; + unsigned char C1OE:1; + unsigned char C1OUT:1; + unsigned char C1ON:1; + }; +} __CM1CON0_bits_t; +extern volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C1CH0 CM1CON0_bits.C1CH0 +#define C1CH1 CM1CON0_bits.C1CH1 +#define C1R CM1CON0_bits.C1R +#define C1SP CM1CON0_bits.C1SP +#define C1POL CM1CON0_bits.C1POL +#define C1OE CM1CON0_bits.C1OE +#define C1OUT CM1CON0_bits.C1OUT +#define C1ON CM1CON0_bits.C1ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON0 bits -------------------- +typedef union { + struct { + unsigned char C2CH0:1; + unsigned char C2CH1:1; + unsigned char C2R:1; + unsigned char C2SP:1; + unsigned char C2POL:1; + unsigned char C2OE:1; + unsigned char C2OUT:1; + unsigned char C2ON:1; + }; +} __CM2CON0_bits_t; +extern volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C2CH0 CM2CON0_bits.C2CH0 +#define C2CH1 CM2CON0_bits.C2CH1 +#define C2R CM2CON0_bits.C2R +#define C2SP CM2CON0_bits.C2SP +#define C2POL CM2CON0_bits.C2POL +#define C2OE CM2CON0_bits.C2OE +#define C2OUT CM2CON0_bits.C2OUT +#define C2ON CM2CON0_bits.C2ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char MC2OUT:1; + unsigned char MC1OUT:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char OPAON:1; + }; +} __CM2CON1_bits_t; +extern volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CM2CON1_bits.C2SYNC +#define T1GSS CM2CON1_bits.T1GSS +#define MC2OUT CM2CON1_bits.MC2OUT +#define MC1OUT CM2CON1_bits.MC1OUT +#define OPAON CM2CON1_bits.OPAON +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RAIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RAIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RAIF INTCON_bits.RAIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RAIE INTCON_bits.RAIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOC bits -------------------- +typedef union { + struct { + unsigned char IOC0:1; + unsigned char IOC1:1; + unsigned char IOC2:1; + unsigned char IOC3:1; + unsigned char IOC4:1; + unsigned char IOC5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOC_bits_t; +extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; + +#ifndef NO_BIT_DEFINES +#define IOC0 IOC_bits.IOC0 +#define IOC1 IOC_bits.IOC1 +#define IOC2 IOC_bits.IOC2 +#define IOC3 IOC_bits.IOC3 +#define IOC4 IOC_bits.IOC4 +#define IOC5 IOC_bits.IOC5 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCA bits -------------------- +typedef union { + struct { + unsigned char IOCA0:1; + unsigned char IOCA1:1; + unsigned char IOCA2:1; + unsigned char IOCA3:1; + unsigned char IOCA4:1; + unsigned char IOCA5:1; + unsigned char :1; + unsigned char :1; + }; +} __IOCA_bits_t; +extern volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; + +#ifndef NO_BIT_DEFINES +#define IOCA0 IOCA_bits.IOCA0 +#define IOCA1 IOCA_bits.IOCA1 +#define IOCA2 IOCA_bits.IOCA2 +#define IOCA3 IOCA_bits.IOCA3 +#define IOCA4 IOCA_bits.IOCA4 +#define IOCA5 IOCA_bits.IOCA5 +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RAPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RAPU OPTION_REG_bits.NOT_RAPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char ANS5:1; + unsigned char ANS6:1; + unsigned char ANS7:1; + }; + struct { + unsigned char ANS0:1; + unsigned char ANS1:1; + unsigned char ANS2:1; + unsigned char ANS3:1; + unsigned char ANS4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define ANS0 OSCTUNE_bits.ANS0 +#define TUN1 OSCTUNE_bits.TUN1 +#define ANS1 OSCTUNE_bits.ANS1 +#define TUN2 OSCTUNE_bits.TUN2 +#define ANS2 OSCTUNE_bits.ANS2 +#define TUN3 OSCTUNE_bits.TUN3 +#define ANS3 OSCTUNE_bits.ANS3 +#define TUN4 OSCTUNE_bits.TUN4 +#define ANS4 OSCTUNE_bits.ANS4 +#define ANS5 OSCTUNE_bits.ANS5 +#define ANS6 OSCTUNE_bits.ANS6 +#define ANS7 OSCTUNE_bits.ANS7 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BOD:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char SBODEN:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char SBOREN:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BOD PCON_bits.NOT_BOD +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define SBODEN PCON_bits.SBODEN +#define SBOREN PCON_bits.SBOREN +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char T1IE:1; + unsigned char T2IE:1; + unsigned char OSFIE:1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char CCP1IE:1; + unsigned char ADIE:1; + unsigned char EEIE:1; + }; + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IE PIE1_bits.T1IE +#define TMR1IE PIE1_bits.TMR1IE +#define T2IE PIE1_bits.T2IE +#define TMR2IE PIE1_bits.TMR2IE +#define OSFIE PIE1_bits.OSFIE +#define C1IE PIE1_bits.C1IE +#define C2IE PIE1_bits.C2IE +#define CCP1IE PIE1_bits.CCP1IE +#define ADIE PIE1_bits.ADIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char T1IF:1; + unsigned char T2IF:1; + unsigned char OSFIF:1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char CCP1IF:1; + unsigned char ADIF:1; + unsigned char EEIF:1; + }; + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define T1IF PIR1_bits.T1IF +#define TMR1IF PIR1_bits.TMR1IF +#define T2IF PIR1_bits.T2IF +#define TMR2IF PIR1_bits.TMR2IF +#define OSFIF PIR1_bits.OSFIF +#define C1IF PIR1_bits.C1IF +#define C2IF PIR1_bits.C2IF +#define CCP1IF PIR1_bits.CCP1IF +#define ADIF PIR1_bits.ADIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PWMCLK bits -------------------- +typedef union { + struct { + unsigned char PER0:1; + unsigned char PER1:1; + unsigned char PER2:1; + unsigned char PER3:1; + unsigned char PER4:1; + unsigned char PWMP0:1; + unsigned char PWMP1:1; + unsigned char PWMASE:1; + }; + struct { + unsigned char PH0:1; + unsigned char PH1:1; + unsigned char PH2:1; + unsigned char PH3:1; + unsigned char PH4:1; + unsigned char C1EN:1; + unsigned char C2EN:1; + unsigned char POL:1; + }; +} __PWMCLK_bits_t; +extern volatile __PWMCLK_bits_t __at(PWMCLK_ADDR) PWMCLK_bits; + +#ifndef NO_BIT_DEFINES +#define PER0 PWMCLK_bits.PER0 +#define PH0 PWMCLK_bits.PH0 +#define PER1 PWMCLK_bits.PER1 +#define PH1 PWMCLK_bits.PH1 +#define PER2 PWMCLK_bits.PER2 +#define PH2 PWMCLK_bits.PH2 +#define PER3 PWMCLK_bits.PER3 +#define PH3 PWMCLK_bits.PH3 +#define PER4 PWMCLK_bits.PER4 +#define PH4 PWMCLK_bits.PH4 +#define PWMP0 PWMCLK_bits.PWMP0 +#define C1EN PWMCLK_bits.C1EN +#define PWMP1 PWMCLK_bits.PWMP1 +#define C2EN PWMCLK_bits.C2EN +#define PWMASE PWMCLK_bits.PWMASE +#define POL PWMCLK_bits.POL +#endif /* NO_BIT_DEFINES */ + +// ----- PWMCON0 bits -------------------- +typedef union { + struct { + unsigned char PH1EN:1; + unsigned char PH2EN:1; + unsigned char SYNC0:1; + unsigned char SYNC1:1; + unsigned char BLANK1:1; + unsigned char BLANK2:1; + unsigned char PASEN:1; + unsigned char PRSEN:1; + }; +} __PWMCON0_bits_t; +extern volatile __PWMCON0_bits_t __at(PWMCON0_ADDR) PWMCON0_bits; + +#ifndef NO_BIT_DEFINES +#define PH1EN PWMCON0_bits.PH1EN +#define PH2EN PWMCON0_bits.PH2EN +#define SYNC0 PWMCON0_bits.SYNC0 +#define SYNC1 PWMCON0_bits.SYNC1 +#define BLANK1 PWMCON0_bits.BLANK1 +#define BLANK2 PWMCON0_bits.BLANK2 +#define PASEN PWMCON0_bits.PASEN +#define PRSEN PWMCON0_bits.PRSEN +#endif /* NO_BIT_DEFINES */ + +// ----- PWMCON1 bits -------------------- +typedef union { + struct { + unsigned char CMDLY0:1; + unsigned char CMDLY1:1; + unsigned char CMDLY2:1; + unsigned char CMDLY3:1; + unsigned char CMDLY4:1; + unsigned char COMOD0:1; + unsigned char COMOD1:1; + unsigned char :1; + }; +} __PWMCON1_bits_t; +extern volatile __PWMCON1_bits_t __at(PWMCON1_ADDR) PWMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define CMDLY0 PWMCON1_bits.CMDLY0 +#define CMDLY1 PWMCON1_bits.CMDLY1 +#define CMDLY2 PWMCON1_bits.CMDLY2 +#define CMDLY3 PWMCON1_bits.CMDLY3 +#define CMDLY4 PWMCON1_bits.CMDLY4 +#define COMOD0 PWMCON1_bits.COMOD0 +#define COMOD1 PWMCON1_bits.COMOD1 +#endif /* NO_BIT_DEFINES */ + +// ----- REFCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char CVROE:1; + unsigned char VROE:1; + unsigned char VREN:1; + unsigned char VRBB:1; + unsigned char BGST:1; + unsigned char :1; + unsigned char :1; + }; +} __REFCON_bits_t; +extern volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits; + +#ifndef NO_BIT_DEFINES +#define CVROE REFCON_bits.CVROE +#define VROE REFCON_bits.VROE +#define VREN REFCON_bits.VREN +#define VRBB REFCON_bits.VRBB +#define BGST REFCON_bits.BGST +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char T1GINV:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char T1GE:1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#define T1GE T1CON_bits.T1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char C2VREN:1; + unsigned char C1VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define C2VREN VRCON_bits.C2VREN +#define C1VREN VRCON_bits.C1VREN +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUA bits -------------------- +typedef union { + struct { + unsigned char WPUA0:1; + unsigned char WPUA1:1; + unsigned char WPUA2:1; + unsigned char WPUA3:1; + unsigned char WPUA4:1; + unsigned char WPUA5:1; + unsigned char :1; + unsigned char :1; + }; +} __WPUA_bits_t; +extern volatile __WPUA_bits_t __at(WPUA_ADDR) WPUA_bits; + +#ifndef NO_BIT_DEFINES +#define WPUA0 WPUA_bits.WPUA0 +#define WPUA1 WPUA_bits.WPUA1 +#define WPUA2 WPUA_bits.WPUA2 +#define WPUA3 WPUA_bits.WPUA3 +#define WPUA4 WPUA_bits.WPUA4 +#define WPUA5 WPUA_bits.WPUA5 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f818.h b/device/include/pic/pic16f818.h new file mode 100644 index 0000000..808c958 --- /dev/null +++ b/device/include/pic/pic16f818.h @@ -0,0 +1,908 @@ +// +// Register Declarations for Microchip 16F818 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F818_H +#define P16F818_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F818.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F818 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F818 +// 2. LIST directive in the source file +// LIST P=PIC16F818 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 06/15/02 Initial Release +//1.01 09/18/02 Changed name of bit-2 in the OSCCON register to IOFS + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F818 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits ------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'07'-H'09', H'18'-H'1D' +// __BADRAM H'87'-H'89', H'91', H'95'-H'9D' +// __BADRAM H'105', H'107'-H'109', H'110'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'19F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x1FFF +#define _CP_OFF 0x3FFF +#define _CCP1_RB2 0x3FFF +#define _CCP1_RB3 0x2FFF +#define _DEBUG_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _WRT_ENABLE_OFF 0x3FFF +#define _WRT_ENABLE_512 0x3DFF +#define _WRT_ENABLE_1024 0x3BFF +#define _CPD_ON 0x3EFF +#define _CPD_OFF 0x3FFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _MCLR_ON 0x3FFF +#define _MCLR_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _EXTRC_CLKOUT 0x3FFF +#define _EXTRC_IO 0x3FFE +#define _INTRC_CLKOUT 0x3FFD +#define _INTRC_IO 0x3FFC +#define _EXTCLK 0x3FEF +#define _HS_OSC 0x3FEE +#define _XT_OSC 0x3FED +#define _LP_OSC 0x3FEC + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS2:1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define ADCS2 ADCON1_bits.ADCS2 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char FREE:1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define FREE EECON1_bits.FREE +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char TMR0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char TMR0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char IOFS:1; + unsigned char :1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define IOFS OSCCON_bits.IOFS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char TUN5:1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#define TUN5 OSCTUNE_bits.TUN5 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIE PIE2_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIF PIR2_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f819.h b/device/include/pic/pic16f819.h new file mode 100644 index 0000000..071d8dd --- /dev/null +++ b/device/include/pic/pic16f819.h @@ -0,0 +1,909 @@ +// +// Register Declarations for Microchip 16F819 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F819_H +#define P16F819_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F819.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F819 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F819 +// 2. LIST directive in the source file +// LIST P=PIC16F819 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 06/15/02 Initial Release +//1.01 09/18/02 Changed name of bit-2 in the OSCCON register to IOFS + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F819 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits ------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'07'-H'09', H'18'-H'1D' +// __BADRAM H'87'-H'89', H'91', H'95'-H'9D' +// __BADRAM H'105', H'107'-H'109', H'110'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'19F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x1FFF +#define _CP_OFF 0x3FFF +#define _CCP1_RB2 0x3FFF +#define _CCP1_RB3 0x2FFF +#define _DEBUG_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _WRT_ENABLE_OFF 0x3FFF +#define _WRT_ENABLE_512 0x3DFF +#define _WRT_ENABLE_1024 0x3BFF +#define _WRT_ENABLE_1536 0x39FF +#define _CPD_ON 0x3EFF +#define _CPD_OFF 0x3FFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _MCLR_ON 0x3FFF +#define _MCLR_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _EXTRC_CLKOUT 0x3FFF +#define _EXTRC_IO 0x3FFE +#define _INTRC_CLKOUT 0x3FFD +#define _INTRC_IO 0x3FFC +#define _EXTCLK 0x3FEF +#define _HS_OSC 0x3FEE +#define _XT_OSC 0x3FED +#define _LP_OSC 0x3FEC + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS2:1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define ADCS2 ADCON1_bits.ADCS2 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char FREE:1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define FREE EECON1_bits.FREE +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char TMR0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char TMR0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char IOFS:1; + unsigned char :1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define IOFS OSCCON_bits.IOFS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char TUN5:1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#define TUN5 OSCTUNE_bits.TUN5 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIE PIE2_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIF PIR2_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f84.h b/device/include/pic/pic16f84.h new file mode 100644 index 0000000..984096c --- /dev/null +++ b/device/include/pic/pic16f84.h @@ -0,0 +1,360 @@ +// +// Register Declarations for Microchip 16F84 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F84_H +#define P16F84_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define EEDATA_ADDR 0x0008 +#define EEADR_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define EECON1_ADDR 0x0088 +#define EECON2_ADDR 0x0089 + +// +// Memory organization. +// + + + +// LIST +// P16F84.INC Standard Header File, Version 2.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F84 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F84 +// 2. LIST directive in the source file +// LIST P=PIC16F84 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//2.00 07/24/96 Renamed to reflect the name change to PIC16F84. +//1.01 05/17/96 Corrected BADRAM map +//1.00 10/31/95 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F84 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- OPTION Bits -------------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'CF' +// __BADRAM H'07', H'50'-H'7F', H'87' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ON 0x000F +#define _CP_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _PWRTE_OFF 0x3FFF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEIF EECON1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char EEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define EEIE INTCON_bits.EEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f84a.h b/device/include/pic/pic16f84a.h new file mode 100644 index 0000000..3ddb87e --- /dev/null +++ b/device/include/pic/pic16f84a.h @@ -0,0 +1,358 @@ +// +// Register Declarations for Microchip 16F84A Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F84A_H +#define P16F84A_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define EEDATA_ADDR 0x0008 +#define EEADR_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define EECON1_ADDR 0x0088 +#define EECON2_ADDR 0x0089 + +// +// Memory organization. +// + + + +// LIST +// P16F84A.INC Standard Header File, Version 2.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F84 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F84A +// 2. LIST directive in the source file +// LIST P=PIC16F84A +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 2/15/99 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F84A +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ---------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'CF' +// __BADRAM H'07', H'50'-H'7F', H'87' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ON 0x000F +#define _CP_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _PWRTE_OFF 0x3FFF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEIF EECON1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char EEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define EEIE INTCON_bits.EEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f87.h b/device/include/pic/pic16f87.h new file mode 100644 index 0000000..002305f --- /dev/null +++ b/device/include/pic/pic16f87.h @@ -0,0 +1,1070 @@ +// +// Register Declarations for Microchip 16F87 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F87_H +#define P16F87_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define CMCON_ADDR 0x009C +#define CVRCON_ADDR 0x009D +#define WDTCON_ADDR 0x0105 +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F87.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F87 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F87 +// 2. LIST directive in the source file +// LIST P=PIC16F87 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 07/29/02 Initial Release +//1.01 09/18/02 Changed name of bit-2 in the OSCCON register to IOFS +//1.02 01/10/03 Added bit names for TXSTA & RCSTA registers. +//1.03 01/24/03 Changed Config bit CCP1_RB2 to CCP1_RB0 +//1.04 12/02/03 Modified the WRT1:WRT0 bit definition in Config Word 1. +//1.05 02/08/04 Changed bit in _CONFIG1 example from CCP1_RB2 to CCP1_RB0. + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F87 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (CMCON_ADDR) CMCON; +extern __sfr __at (CVRCON_ADDR) CVRCON; + +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + +//----- INTCON Bits -------------------------------------------------------- + +//----- PIR1 Bits ---------------------------------------------------------- + +//----- PIR2 Bits ---------------------------------------------------------- + +//----- T1CON Bits --------------------------------------------------------- + +//----- T2CON Bits --------------------------------------------------------- + +//----- SSPCON Bits -------------------------------------------------------- + +//----- CCP1CON Bits ------------------------------------------------------- + +//----- RCSTA Bits --------------------------------------------------------- + +//----- OPTION_REG Bits ----------------------------------------------------- + +//----- PIE1 Bits ---------------------------------------------------------- + +//----- PIE2 Bits ---------------------------------------------------------- + +//----- PCON Bits ---------------------------------------------------------- + +//----- OSCCON Bits ------------------------------------------------------- + +//----- OSCTUNE Bits ------------------------------------------------------- + +//----- SSPSTAT Bits ------------------------------------------------------- + +//----- TXSTA Bits --------------------------------------------------------- + +//----- WDTCON Bits -------------------------------------------------------- + +//----- CMCON Bits --------------------------------------------------------- + +//----- CVRCON Bits -------------------------------------------------------- + +//----- EECON1 Bits -------------------------------------------------------- + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'07'-H'09', H'1B'-H'1F' +// __BADRAM H'87'-H'89', H'91', H'95'-H'97', H'9A', H'9E'-H'9F' +// __BADRAM H'107'-H'109' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'18F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CONFIG1 0x2007 +#define _CONFIG2 0x2008 + +//Configuration Byte 1 Options +#define _CP_ALL 0x1FFF +#define _CP_OFF 0x3FFF +#define _CCP1_RB0 0x3FFF +#define _CCP1_RB3 0x2FFF +#define _DEBUG_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _WRT_PROTECT_OFF 0x3FFF //No program memory write protection +#define _WRT_PROTECT_256 0x3DFF //First 256 program memory protected +#define _WRT_PROTECT_2048 0x3BFF //First 2048 program memory protected +#define _WRT_PROTECT_ALL 0x39FF //All of program memory protected +#define _CPD_ON 0x3EFF +#define _CPD_OFF 0x3FFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _MCLR_ON 0x3FFF +#define _MCLR_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _EXTRC_CLKOUT 0x3FFF +#define _EXTRC_IO 0x3FFE +#define _INTRC_CLKOUT 0x3FFD +#define _INTRC_IO 0x3FFC +#define _EXTCLK 0x3FEF +#define _HS_OSC 0x3FEE +#define _XT_OSC 0x3FED +#define _LP_OSC 0x3FEC + +//Configuration Byte 2 Options +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3FFD +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x3FFE + + + +// To use the Configuration Bits, place the following lines in your source code +// in the following format, and change the configuration value to the desired +// setting (such as CP_OFF to CP_ALL). These are currently commented out here +// and each __CONFIG line should have the preceding semicolon removed when +// pasted into your source code. + +//Program Configuration Register 1 +// __CONFIG _CONFIG1, _CP_OFF & _CCP1_RB0 & _DEBUG_OFF & _WRT_PROTECT_OFF & _CPD_OFF & _LVP_OFF & _BODEN_OFF & _MCLR_OFF & _PWRTE_OFF & _WDT_OFF & _HS_OSC + +//Program Configuration Register 2 +// __CONFIG _CONFIG2, _IESO_OFF & _FCMEN_OFF + + + + + + +// LIST + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1INV CMCON_bits.C1INV +#define C2INV CMCON_bits.C2INV +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CVRCON bits -------------------- +typedef union { + struct { + unsigned char CVR0:1; + unsigned char CVR1:1; + unsigned char CVR2:1; + unsigned char CVR3:1; + unsigned char :1; + unsigned char CVRR:1; + unsigned char CVROE:1; + unsigned char CVREN:1; + }; +} __CVRCON_bits_t; +extern volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; + +#ifndef NO_BIT_DEFINES +#define CVR0 CVRCON_bits.CVR0 +#define CVR1 CVRCON_bits.CVR1 +#define CVR2 CVRCON_bits.CVR2 +#define CVR3 CVRCON_bits.CVR3 +#define CVRR CVRCON_bits.CVRR +#define CVROE CVRCON_bits.CVROE +#define CVREN CVRCON_bits.CVREN +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char FREE:1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define FREE EECON1_bits.FREE +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char TMR0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char TMR0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS0:1; + unsigned char SCS1:1; + unsigned char IOFS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS0 OSCCON_bits.SCS0 +#define SCS1 OSCCON_bits.SCS1 +#define IOFS OSCCON_bits.IOFS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char TUN5:1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#define TUN5 OSCTUNE_bits.TUN5 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char :1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIE:1; + unsigned char :1; + unsigned char CMIE:1; + unsigned char OSFIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIE PIE2_bits.EEIE +#define CMIE PIE2_bits.CMIE +#define OSFIE PIE2_bits.OSFIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char :1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char OSFIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIF PIR2_bits.EEIF +#define CMIF PIR2_bits.CMIF +#define OSFIF PIR2_bits.OSFIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char T1RUN:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define T1RUN T1CON_bits.T1RUN +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char SWDTE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define SWDTE WDTCON_bits.SWDTE +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f870.h b/device/include/pic/pic16f870.h new file mode 100644 index 0000000..e58ef98 --- /dev/null +++ b/device/include/pic/pic16f870.h @@ -0,0 +1,909 @@ +// +// Register Declarations for Microchip 16F870 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F870_H +#define P16F870_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F870.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F870 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F870 +// 2. LIST directive in the source file +// LIST P=PIC16F870 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 08/07/98 Initial Release - cloned from 16F873 + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F870 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; + +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ---------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + + +//----- TXSTA Bits --------------------------------------------------------- + + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'08'-H'09', H'13'-H'14', H'1B'-H'1D' +// __BADRAM H'88'-H'89',H'8F'-H'91', H'93'-H'97', H'9A'-H'9D', H'C0'-H'EF' +// __BADRAM H'105', H'107'-H'109', H'110'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'19F', H'1C0'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x0FCF +#define _CP_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _DEBUG_OFF 0x3FFF +#define _WRT_ENABLE_ON 0x3FFF +#define _WRT_ENABLE_OFF 0x3DFF +#define _CPD_ON 0x3EFF +#define _CPD_OFF 0x3FFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char :1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIE PIE2_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char :1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIF PIR2_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f871.h b/device/include/pic/pic16f871.h new file mode 100644 index 0000000..454cbdb --- /dev/null +++ b/device/include/pic/pic16f871.h @@ -0,0 +1,1020 @@ +// +// Register Declarations for Microchip 16F871 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F871_H +#define P16F871_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define PR2_ADDR 0x0092 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F871.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F871 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F871 +// 2. LIST directive in the source file +// LIST P=PIC16F871 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 08/07/98 Initial Release - cloned from 16F873 + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F871 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ---------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + + +//----- PCON Bits ---------------------------------------------------------- + + + +//----- TRISE Bits --------------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + + +//----- TXSTA Bits --------------------------------------------------------- + + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'13'-H'14', H'1B'-H'1D' +// __BADRAM H'8F'-H'91', H'93'-H'97', H'9A'-H'9D', H'C0'-H'EF' +// __BADRAM H'105', H'107'-H'109', H'110'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'19F', H'1C0'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x0FCF +#define _CP_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _DEBUG_OFF 0x3FFF +#define _WRT_ENABLE_ON 0x3FFF +#define _WRT_ENABLE_OFF 0x3DFF +#define _CPD_ON 0x3EFF +#define _CPD_OFF 0x3FFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char :1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char PSPIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define PSPIE PIE1_bits.PSPIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIE PIE2_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char :1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char PSPIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define PSPIF PIR1_bits.PSPIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIF PIR2_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char PSPMODE:1; + unsigned char IBOV:1; + unsigned char OBF:1; + unsigned char IBF:1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#define PSPMODE TRISE_bits.PSPMODE +#define IBOV TRISE_bits.IBOV +#define OBF TRISE_bits.OBF +#define IBF TRISE_bits.IBF +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f872.h b/device/include/pic/pic16f872.h new file mode 100644 index 0000000..6b5a227 --- /dev/null +++ b/device/include/pic/pic16f872.h @@ -0,0 +1,960 @@ +// +// Register Declarations for Microchip 16F872 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F872_H +#define P16F872_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F872.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F872 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F872 +// 2. LIST directive in the source file +// LIST P=PIC16F872 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.01 11/17/05 Added the INTCON bits TMR0IE and TMR0IF +//1.00 01/25/98 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F872 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'008'-H'009', H'018'-H'01D', H'088'-H'089' +// __BADRAM H'08F'-H'090', H'095'-H'09D', H'0C0'-H'0EF' +// __BADRAM H'105', H'107'-H'109' +// __BADRAM H'110'-H'11F', H'185' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'19F',H'1C0'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +// Code protection for the PIC16C872 is different than for other PIC16C87X devices. +// The CP_ALL and CP_OFF switches operate as expected. +// CP_HALF protects the lower half of program memory. The upper half is open. +// CP_UPPER_256 protects everything EXCEPT the top 256 words. +//========================================================================== + +#define _CP_ALL 0x0FCF +#define _CP_HALF 0x1FDF +#define _CP_UPPER_256 0x2FEF +#define _CP_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _DEBUG_OFF 0x3FFF +#define _WRT_ENABLE_ON 0x3FFF +#define _WRT_ENABLE_OFF 0x3DFF +#define _CPD_ON 0x3EFF +#define _CPD_OFF 0x3FFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char TMR0IF:1; + unsigned char :1; + unsigned char :1; + unsigned char TMR0IE:1; + unsigned char :1; + unsigned char :1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char EEIE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define BCLIE PIE2_bits.BCLIE +#define EEIE PIE2_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char :1; + unsigned char :1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define BCLIF PIR2_bits.BCLIF +#define EEIF PIR2_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f873.h b/device/include/pic/pic16f873.h new file mode 100644 index 0000000..ef69e4b --- /dev/null +++ b/device/include/pic/pic16f873.h @@ -0,0 +1,1107 @@ +// +// Register Declarations for Microchip 16F873 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F873_H +#define P16F873_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F873.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F873 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F873 +// 2. LIST directive in the source file +// LIST P=PIC16F873 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.12 01/12/00 Changed some bit names, a register name, configuration bits +// to match datasheet (DS30292B) +//1.11 10/18/98 Changes to file registers to match updated DOS +//1.10 08/17/98 Fixed typo in processor name, RCSTA and ADCON1 +//1.00 08/07/98 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F873 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ---------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'8F'-H'90', H'95'-H'97', H'9A'-H'9D' +// __BADRAM H'105', H'107'-H'109', H'110'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'19F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x0FCF +#define _CP_HALF 0x1FDF +#define _CP_UPPER_256 0x2FEF +#define _CP_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _DEBUG_OFF 0x3FFF +#define _WRT_ENABLE_ON 0x3FFF +#define _WRT_ENABLE_OFF 0x3DFF +#define _CPD_ON 0x3EFF +#define _CPD_OFF 0x3FFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char EEIE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define BCLIE PIE2_bits.BCLIE +#define EEIE PIE2_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define BCLIF PIR2_bits.BCLIF +#define EEIF PIR2_bits.EEIF +#define CMIF PIR2_bits.CMIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f873a.h b/device/include/pic/pic16f873a.h new file mode 100644 index 0000000..db386a4 --- /dev/null +++ b/device/include/pic/pic16f873a.h @@ -0,0 +1,1181 @@ +// +// Register Declarations for Microchip 16F873A Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F873A_H +#define P16F873A_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define CMCON_ADDR 0x009C +#define CVRCON_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F873A.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F877A microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F873A +// 2. LIST directive in the source file +// LIST P=PIC16F873A +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: +//1.03 11/17/05 Added the INTCON bits TMR0IE and TMR0IF and the ADCON1 bit ADCS2. +//1.02 05/28/02 Corrected values for _CP_ALL and _CP_OFF in Configuration Bits section. +//1.01 10/03/01 Added the PIR2 bit CMIF and the PIE2 bit CMIE +//1.00 04/19/01 Initial Release (BD - generated from PIC16F877a.inc) + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F873A +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (CMCON_ADDR) CMCON; +extern __sfr __at (CVRCON_ADDR) CVRCON; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + + +//----- CMCON Bits --------------------------------------------------------- + +//----- CVRCON Bits -------------------------------------------------------- + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'8F'-H'90', H'95'-H'97', H'9A'-H'9B' +// __BADRAM H'105', H'107'-H'109', H'110'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'19F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x1FFF +#define _CP_OFF 0x3FFF +#define _DEBUG_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _WRT_OFF 0x3FFF // No prog memmory write protection +#define _WRT_256 0x3DFF // First 256 prog memmory write protected +#define _WRT_1FOURTH 0x3BFF // First quarter prog memmory write protected +#define _WRT_HALF 0x39FF // First half memmory write protected +#define _CPD_OFF 0x3FFF +#define _CPD_ON 0x3EFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _RC_OSC 0x3FFF +#define _HS_OSC 0x3FFE +#define _XT_OSC 0x3FFD +#define _LP_OSC 0x3FFC + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS2:1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define ADCS2 ADCON1_bits.ADCS2 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1INV CMCON_bits.C1INV +#define C2INV CMCON_bits.C2INV +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CVRCON bits -------------------- +typedef union { + struct { + unsigned char CVR0:1; + unsigned char CVR1:1; + unsigned char CVR2:1; + unsigned char CVR3:1; + unsigned char :1; + unsigned char CVRR:1; + unsigned char CVROE:1; + unsigned char CVREN:1; + }; +} __CVRCON_bits_t; +extern volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; + +#ifndef NO_BIT_DEFINES +#define CVR0 CVRCON_bits.CVR0 +#define CVR1 CVRCON_bits.CVR1 +#define CVR2 CVRCON_bits.CVR2 +#define CVR3 CVRCON_bits.CVR3 +#define CVRR CVRCON_bits.CVRR +#define CVROE CVRCON_bits.CVROE +#define CVREN CVRCON_bits.CVREN +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char TMR0IF:1; + unsigned char :1; + unsigned char :1; + unsigned char TMR0IE:1; + unsigned char :1; + unsigned char :1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char EEIE:1; + unsigned char :1; + unsigned char CMIE:1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define BCLIE PIE2_bits.BCLIE +#define EEIE PIE2_bits.EEIE +#define CMIE PIE2_bits.CMIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define BCLIF PIR2_bits.BCLIF +#define EEIF PIR2_bits.EEIF +#define CMIF PIR2_bits.CMIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f874.h b/device/include/pic/pic16f874.h new file mode 100644 index 0000000..4463a81 --- /dev/null +++ b/device/include/pic/pic16f874.h @@ -0,0 +1,1218 @@ +// +// Register Declarations for Microchip 16F874 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F874_H +#define P16F874_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F874.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F874 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F874 +// 2. LIST directive in the source file +// LIST P=PIC16F874 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.12 01/12/00 Changed some bit names, a register name, configuration bits +// to match datasheet (DS30292B) +//1.11 10/18/98 Changes to file registers to match updated DOS +//1.10 08/17/98 Fixed typo in processor name, RCSTA and ADCON1 +//1.00 08/07/98 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F874 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits -------------------------------------------------------- + + +//----- TRISE Bits --------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'8F'-H'90', H'95'-H'97', H'9A'-H'9D' +// __BADRAM H'105', H'107'-H'109', H'110'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'19F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x0FCF +#define _CP_HALF 0x1FDF +#define _CP_UPPER_256 0x2FEF +#define _CP_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _DEBUG_OFF 0x3FFF +#define _WRT_ENABLE_ON 0x3FFF +#define _WRT_ENABLE_OFF 0x3DFF +#define _CPD_ON 0x3EFF +#define _CPD_OFF 0x3FFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char PSPIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define PSPIE PIE1_bits.PSPIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char EEIE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define BCLIE PIE2_bits.BCLIE +#define EEIE PIE2_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char PSPIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define PSPIF PIR1_bits.PSPIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define BCLIF PIR2_bits.BCLIF +#define EEIF PIR2_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char PSPMODE:1; + unsigned char IBOV:1; + unsigned char OBF:1; + unsigned char IBF:1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#define PSPMODE TRISE_bits.PSPMODE +#define IBOV TRISE_bits.IBOV +#define OBF TRISE_bits.OBF +#define IBF TRISE_bits.IBF +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f874a.h b/device/include/pic/pic16f874a.h new file mode 100644 index 0000000..794aef2 --- /dev/null +++ b/device/include/pic/pic16f874a.h @@ -0,0 +1,1292 @@ +// +// Register Declarations for Microchip 16F874A Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F874A_H +#define P16F874A_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define CMCON_ADDR 0x009C +#define CVRCON_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F874A.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F877A microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F874A +// 2. LIST directive in the source file +// LIST P=PIC16F874A +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: +//1.03 11/17/05 Added the INTCON bits TMR0IE and TMR0IF and the ADCON1 bit ADCS2. +//1.02 05/28/02 Corrected values for _CP_ALL and _CP_OFF in Configuration Bits section. +//1.01 10/03/01 Added the PIR2 bit CMIF and the PIE2 bit CMIE +//1.00 04/19/01 Initial Release (BD - generated from PIC16F877A.inc) + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F874A +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (CMCON_ADDR) CMCON; +extern __sfr __at (CVRCON_ADDR) CVRCON; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- TRISE Bits --------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + + +//----- CMCON Bits --------------------------------------------------------- + +//----- CVRCON Bits -------------------------------------------------------- + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'8F'-H'90', H'95'-H'97', H'9A'-H'9B' +// __BADRAM H'105', H'107'-H'109', H'110'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'19F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x1FFF +#define _CP_OFF 0x3FFF +#define _DEBUG_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _WRT_OFF 0x3FFF // No prog memmory write protection +#define _WRT_256 0x3DFF // First 256 prog memmory write protected +#define _WRT_1FOURTH 0x3BFF // First quarter prog memmory write protected +#define _WRT_HALF 0x39FF // First half memmory write protected +#define _CPD_OFF 0x3FFF +#define _CPD_ON 0x3EFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _RC_OSC 0x3FFF +#define _HS_OSC 0x3FFE +#define _XT_OSC 0x3FFD +#define _LP_OSC 0x3FFC + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS2:1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define ADCS2 ADCON1_bits.ADCS2 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1INV CMCON_bits.C1INV +#define C2INV CMCON_bits.C2INV +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CVRCON bits -------------------- +typedef union { + struct { + unsigned char CVR0:1; + unsigned char CVR1:1; + unsigned char CVR2:1; + unsigned char CVR3:1; + unsigned char :1; + unsigned char CVRR:1; + unsigned char CVROE:1; + unsigned char CVREN:1; + }; +} __CVRCON_bits_t; +extern volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; + +#ifndef NO_BIT_DEFINES +#define CVR0 CVRCON_bits.CVR0 +#define CVR1 CVRCON_bits.CVR1 +#define CVR2 CVRCON_bits.CVR2 +#define CVR3 CVRCON_bits.CVR3 +#define CVRR CVRCON_bits.CVRR +#define CVROE CVRCON_bits.CVROE +#define CVREN CVRCON_bits.CVREN +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char TMR0IF:1; + unsigned char :1; + unsigned char :1; + unsigned char TMR0IE:1; + unsigned char :1; + unsigned char :1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char PSPIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define PSPIE PIE1_bits.PSPIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char EEIE:1; + unsigned char :1; + unsigned char CMIE:1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define BCLIE PIE2_bits.BCLIE +#define EEIE PIE2_bits.EEIE +#define CMIE PIE2_bits.CMIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char PSPIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define PSPIF PIR1_bits.PSPIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define BCLIF PIR2_bits.BCLIF +#define EEIF PIR2_bits.EEIF +#define CMIF PIR2_bits.CMIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char PSPMODE:1; + unsigned char IBOV:1; + unsigned char OBF:1; + unsigned char IBF:1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#define PSPMODE TRISE_bits.PSPMODE +#define IBOV TRISE_bits.IBOV +#define OBF TRISE_bits.OBF +#define IBF TRISE_bits.IBF +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f876.h b/device/include/pic/pic16f876.h new file mode 100644 index 0000000..b52a3a1 --- /dev/null +++ b/device/include/pic/pic16f876.h @@ -0,0 +1,1108 @@ +// +// Register Declarations for Microchip 16F876 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F876_H +#define P16F876_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F876.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F876 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F876 +// 2. LIST directive in the source file +// LIST P=PIC16F876 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.12 01/12/00 Changed some bit names, a register name, configuration bits +// to match datasheet (DS30292B) +//1.00 08/07/98 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F876 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; + +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ---------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'08'-H'09' +// __BADRAM H'88'-H'89', H'8F'-H'90', H'95'-H'97', H'9A'-H'9D' +// __BADRAM H'105', H'107'-H'109' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'18F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x0FCF +#define _CP_HALF 0x1FDF +#define _CP_UPPER_256 0x2FEF +#define _CP_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _DEBUG_OFF 0x3FFF +#define _WRT_ENABLE_ON 0x3FFF +#define _WRT_ENABLE_OFF 0x3DFF +#define _CPD_ON 0x3EFF +#define _CPD_OFF 0x3FFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char EEIE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define BCLIE PIE2_bits.BCLIE +#define EEIE PIE2_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define BCLIF PIR2_bits.BCLIF +#define EEIF PIR2_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f876a.h b/device/include/pic/pic16f876a.h new file mode 100644 index 0000000..5b8c0a3 --- /dev/null +++ b/device/include/pic/pic16f876a.h @@ -0,0 +1,1181 @@ +// +// Register Declarations for Microchip 16F876A Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F876A_H +#define P16F876A_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define CMCON_ADDR 0x009C +#define CVRCON_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F876A.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F877A microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F876A +// 2. LIST directive in the source file +// LIST P=PIC16F876A +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: +//1.03 11/17/05 Added the INTCON bits TMR0IE and TMR0IF and the ADCON1 bit ADCS2. +//1.02 05/28/02 Corrected values for _CP_ALL and _CP_OFF in Configuration Bits section. +//1.01 10/03/01 Added the PIR2 bit CMIF and the PIE2 bit CMIE +//1.00 04/19/01 Initial Release (BD - generated from PIC16F877.inc) + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F876A +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (CMCON_ADDR) CMCON; +extern __sfr __at (CVRCON_ADDR) CVRCON; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + + +//----- CMCON Bits --------------------------------------------------------- + +//----- CVRCON Bits -------------------------------------------------------- + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'8F'-H'90', H'95'-H'97', H'9A'-H'9B' +// __BADRAM H'105', H'107'-H'109' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'18F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x1FFF +#define _CP_OFF 0x3FFF +#define _DEBUG_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _WRT_OFF 0x3FFF // No prog memmory write protection +#define _WRT_256 0x3DFF // First 256 prog memmory write protected +#define _WRT_1FOURTH 0x3BFF // First quarter prog memmory write protected +#define _WRT_HALF 0x39FF // First half memmory write protected +#define _CPD_OFF 0x3FFF +#define _CPD_ON 0x3EFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _RC_OSC 0x3FFF +#define _HS_OSC 0x3FFE +#define _XT_OSC 0x3FFD +#define _LP_OSC 0x3FFC + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS2:1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define ADCS2 ADCON1_bits.ADCS2 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1INV CMCON_bits.C1INV +#define C2INV CMCON_bits.C2INV +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CVRCON bits -------------------- +typedef union { + struct { + unsigned char CVR0:1; + unsigned char CVR1:1; + unsigned char CVR2:1; + unsigned char CVR3:1; + unsigned char :1; + unsigned char CVRR:1; + unsigned char CVROE:1; + unsigned char CVREN:1; + }; +} __CVRCON_bits_t; +extern volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; + +#ifndef NO_BIT_DEFINES +#define CVR0 CVRCON_bits.CVR0 +#define CVR1 CVRCON_bits.CVR1 +#define CVR2 CVRCON_bits.CVR2 +#define CVR3 CVRCON_bits.CVR3 +#define CVRR CVRCON_bits.CVRR +#define CVROE CVRCON_bits.CVROE +#define CVREN CVRCON_bits.CVREN +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char TMR0IF:1; + unsigned char :1; + unsigned char :1; + unsigned char TMR0IE:1; + unsigned char :1; + unsigned char :1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char EEIE:1; + unsigned char :1; + unsigned char CMIE:1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define BCLIE PIE2_bits.BCLIE +#define EEIE PIE2_bits.EEIE +#define CMIE PIE2_bits.CMIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define BCLIF PIR2_bits.BCLIF +#define EEIF PIR2_bits.EEIF +#define CMIF PIR2_bits.CMIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f877.h b/device/include/pic/pic16f877.h new file mode 100644 index 0000000..5c487e6 --- /dev/null +++ b/device/include/pic/pic16f877.h @@ -0,0 +1,1217 @@ +// +// Register Declarations for Microchip 16F877 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F877_H +#define P16F877_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F877.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F877 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F877 +// 2. LIST directive in the source file +// LIST P=PIC16F877 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.12 01/12/00 Changed some bit names, a register name, configuration bits +// to match datasheet (DS30292B) +//1.00 08/07/98 Initial Release + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F877 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- TRISE Bits --------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'8F'-H'90', H'95'-H'97', H'9A'-H'9D' +// __BADRAM H'105', H'107'-H'109' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'18F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x0FCF +#define _CP_HALF 0x1FDF +#define _CP_UPPER_256 0x2FEF +#define _CP_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _DEBUG_OFF 0x3FFF +#define _WRT_ENABLE_ON 0x3FFF +#define _WRT_ENABLE_OFF 0x3DFF +#define _CPD_ON 0x3EFF +#define _CPD_OFF 0x3FFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _LP_OSC 0x3FFC +#define _XT_OSC 0x3FFD +#define _HS_OSC 0x3FFE +#define _RC_OSC 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char PSPIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define PSPIE PIE1_bits.PSPIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char EEIE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define BCLIE PIE2_bits.BCLIE +#define EEIE PIE2_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char PSPIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define PSPIF PIR1_bits.PSPIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define BCLIF PIR2_bits.BCLIF +#define EEIF PIR2_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char PSPMODE:1; + unsigned char IBOV:1; + unsigned char OBF:1; + unsigned char IBF:1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#define PSPMODE TRISE_bits.PSPMODE +#define IBOV TRISE_bits.IBOV +#define OBF TRISE_bits.OBF +#define IBF TRISE_bits.IBF +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f877a.h b/device/include/pic/pic16f877a.h new file mode 100644 index 0000000..d462c59 --- /dev/null +++ b/device/include/pic/pic16f877a.h @@ -0,0 +1,1292 @@ +// +// Register Declarations for Microchip 16F877A Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F877A_H +#define P16F877A_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define CMCON_ADDR 0x009C +#define CVRCON_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F877A.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F877A microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F877A +// 2. LIST directive in the source file +// LIST P=PIC16F877A +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: +//1.03 11/17/05 Added the ADCON1 bit ADCS2. +//1.02 05/28/02 Corrected values for _CP_ALL and _CP_OFF in Configuration Bits section. +//1.01 09/13/01 Added the PIR2 bit CMIF and the PIE2 bit CMIE +//1.00 04/19/01 Initial Release (BD - generated from PIC16F877.inc) + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F877A +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (CMCON_ADDR) CMCON; +extern __sfr __at (CVRCON_ADDR) CVRCON; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- TRISE Bits --------------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + + +//----- CMCON Bits --------------------------------------------------------- + +//----- CVRCON Bits -------------------------------------------------------- + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'8F'-H'90', H'95'-H'97', H'9A'-H'9B' +// __BADRAM H'105', H'107'-H'109' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'18F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CP_ALL 0x1FFF +#define _CP_OFF 0x3FFF +#define _DEBUG_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _WRT_OFF 0x3FFF // No prog memmory write protection +#define _WRT_256 0x3DFF // First 256 prog memmory write protected +#define _WRT_1FOURTH 0x3BFF // First quarter prog memmory write protected +#define _WRT_HALF 0x39FF // First half memmory write protected +#define _CPD_OFF 0x3FFF +#define _CPD_ON 0x3EFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _RC_OSC 0x3FFF +#define _HS_OSC 0x3FFE +#define _XT_OSC 0x3FFD +#define _LP_OSC 0x3FFC + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char PCFG0:1; + unsigned char PCFG1:1; + unsigned char PCFG2:1; + unsigned char PCFG3:1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS2:1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define PCFG0 ADCON1_bits.PCFG0 +#define PCFG1 ADCON1_bits.PCFG1 +#define PCFG2 ADCON1_bits.PCFG2 +#define PCFG3 ADCON1_bits.PCFG3 +#define ADCS2 ADCON1_bits.ADCS2 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1INV CMCON_bits.C1INV +#define C2INV CMCON_bits.C2INV +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CVRCON bits -------------------- +typedef union { + struct { + unsigned char CVR0:1; + unsigned char CVR1:1; + unsigned char CVR2:1; + unsigned char CVR3:1; + unsigned char :1; + unsigned char CVRR:1; + unsigned char CVROE:1; + unsigned char CVREN:1; + }; +} __CVRCON_bits_t; +extern volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; + +#ifndef NO_BIT_DEFINES +#define CVR0 CVRCON_bits.CVR0 +#define CVR1 CVRCON_bits.CVR1 +#define CVR2 CVRCON_bits.CVR2 +#define CVR3 CVRCON_bits.CVR3 +#define CVRR CVRCON_bits.CVRR +#define CVROE CVRCON_bits.CVROE +#define CVREN CVRCON_bits.CVREN +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char TMR0IF:1; + unsigned char :1; + unsigned char :1; + unsigned char TMR0IE:1; + unsigned char :1; + unsigned char :1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char PSPIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define PSPIE PIE1_bits.PSPIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIE:1; + unsigned char EEIE:1; + unsigned char :1; + unsigned char CMIE:1; + unsigned char :1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define BCLIE PIE2_bits.BCLIE +#define EEIE PIE2_bits.EEIE +#define CMIE PIE2_bits.CMIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char PSPIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define PSPIF PIR1_bits.PSPIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char :1; + unsigned char BCLIF:1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char :1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define BCLIF PIR2_bits.BCLIF +#define EEIF PIR2_bits.EEIF +#define CMIF PIR2_bits.CMIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char PSPMODE:1; + unsigned char IBOV:1; + unsigned char OBF:1; + unsigned char IBF:1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#define PSPMODE TRISE_bits.PSPMODE +#define IBOV TRISE_bits.IBOV +#define OBF TRISE_bits.OBF +#define IBF TRISE_bits.IBF +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f88.h b/device/include/pic/pic16f88.h new file mode 100644 index 0000000..cae8dff --- /dev/null +++ b/device/include/pic/pic16f88.h @@ -0,0 +1,1156 @@ +// +// Register Declarations for Microchip 16F88 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F88_H +#define P16F88_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define ANSEL_ADDR 0x009B +#define CMCON_ADDR 0x009C +#define CVRCON_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define WDTCON_ADDR 0x0105 +#define EEDATA_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F88.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F88 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F88 +// 2. LIST directive in the source file +// LIST P=PIC16F88 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: + +//1.00 07/29/02 Initial Release +//1.01 09/18/02 Changed name of bit-2 in the OSCCON register to IOFS +//1.02 01/10/03 Added bit names for TXSTA & RCSTA registers. +//1.03 01/24/03 Changed Config bit CCP1_RB2 to CCP1_RB0 +//1.04 12/02/03 Modified the WRT1:WRT0 bit definition in Config Word 1. +//1.05 02/08/04 Changed bit in _CONFIG1 example from CCP1_RB2 to CCP1_RB0. + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F88 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (CMCON_ADDR) CMCON; +extern __sfr __at (CVRCON_ADDR) CVRCON; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + +//----- INTCON Bits -------------------------------------------------------- + +//----- PIR1 Bits ---------------------------------------------------------- + +//----- PIR2 Bits ---------------------------------------------------------- + +//----- T1CON Bits --------------------------------------------------------- + +//----- T2CON Bits --------------------------------------------------------- + +//----- SSPCON Bits -------------------------------------------------------- + +//----- CCP1CON Bits ------------------------------------------------------- + +//----- RCSTA Bits --------------------------------------------------------- + +//----- ADCON0 Bits -------------------------------------------------------- + +//----- OPTION_REG Bits ----------------------------------------------------- + +//----- PIE1 Bits ---------------------------------------------------------- + +//----- PIE2 Bits ---------------------------------------------------------- + +//----- PCON Bits ---------------------------------------------------------- + +//----- OSCCON Bits ------------------------------------------------------- + +//----- OSCTUNE Bits ------------------------------------------------------- + +//----- SSPSTAT Bits ------------------------------------------------------- + +//----- TXSTA Bits --------------------------------------------------------- + +//----- ADCON1 Bits -------------------------------------------------------- + +//----- WDTCON Bits -------------------------------------------------------- + +//----- CMCON Bits --------------------------------------------------------- + +//----- CVRCON Bits -------------------------------------------------------- + +//----- EECON1 Bits -------------------------------------------------------- + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'07'-H'09', H'1B'-H'1D' +// __BADRAM H'87'-H'89', H'91', H'95'-H'97', H'9A' +// __BADRAM H'107'-H'109' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'18F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CONFIG1 0x2007 +#define _CONFIG2 0x2008 + +//Configuration Byte 1 Options +#define _CP_ALL 0x1FFF +#define _CP_OFF 0x3FFF +#define _CCP1_RB0 0x3FFF +#define _CCP1_RB3 0x2FFF +#define _DEBUG_OFF 0x3FFF +#define _DEBUG_ON 0x37FF +#define _WRT_PROTECT_OFF 0x3FFF //No program memory write protection +#define _WRT_PROTECT_256 0x3DFF //First 256 program memory protected +#define _WRT_PROTECT_2048 0x3BFF //First 2048 program memory protected +#define _WRT_PROTECT_ALL 0x39FF //All of program memory protected +#define _CPD_ON 0x3EFF +#define _CPD_OFF 0x3FFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x3F7F +#define _BODEN_ON 0x3FFF +#define _BODEN_OFF 0x3FBF +#define _MCLR_ON 0x3FFF +#define _MCLR_OFF 0x3FDF +#define _PWRTE_OFF 0x3FFF +#define _PWRTE_ON 0x3FF7 +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FFB +#define _EXTRC_CLKOUT 0x3FFF +#define _EXTRC_IO 0x3FFE +#define _INTRC_CLKOUT 0x3FFD +#define _INTRC_IO 0x3FFC +#define _EXTCLK 0x3FEF +#define _HS_OSC 0x3FEE +#define _XT_OSC 0x3FED +#define _LP_OSC 0x3FEC + +//Configuration Byte 2 Options +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3FFD +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x3FFE + + + +// To use the Configuration Bits, place the following lines in your source code +// in the following format, and change the configuration value to the desired +// setting (such as CP_OFF to CP_ALL). These are currently commented out here +// and each __CONFIG line should have the preceding semicolon removed when +// pasted into your source code. + +//Program Configuration Register 1 +// __CONFIG _CONFIG1, _CP_OFF & _CCP1_RB0 & _DEBUG_OFF & _WRT_PROTECT_OFF & _CPD_OFF & _LVP_OFF & _BODEN_OFF & _MCLR_OFF & _PWRTE_OFF & _WDT_OFF & _HS_OSC + +//Program Configuration Register 2 +// __CONFIG _CONFIG2, _IESO_OFF & _FCMEN_OFF + + + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char :1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char ADCS2:1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define VCFG0 ADCON1_bits.VCFG0 +#define VCFG1 ADCON1_bits.VCFG1 +#define ADCS2 ADCON1_bits.ADCS2 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON_bits_t; +extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON_bits.CM0 +#define CM1 CMCON_bits.CM1 +#define CM2 CMCON_bits.CM2 +#define CIS CMCON_bits.CIS +#define C1INV CMCON_bits.C1INV +#define C2INV CMCON_bits.C2INV +#define C1OUT CMCON_bits.C1OUT +#define C2OUT CMCON_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CVRCON bits -------------------- +typedef union { + struct { + unsigned char CVR0:1; + unsigned char CVR1:1; + unsigned char CVR2:1; + unsigned char CVR3:1; + unsigned char :1; + unsigned char CVRR:1; + unsigned char CVROE:1; + unsigned char CVREN:1; + }; +} __CVRCON_bits_t; +extern volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; + +#ifndef NO_BIT_DEFINES +#define CVR0 CVRCON_bits.CVR0 +#define CVR1 CVRCON_bits.CVR1 +#define CVR2 CVRCON_bits.CVR2 +#define CVR3 CVRCON_bits.CVR3 +#define CVRR CVRCON_bits.CVRR +#define CVROE CVRCON_bits.CVROE +#define CVREN CVRCON_bits.CVREN +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char FREE:1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define FREE EECON1_bits.FREE +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char TMR0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char TMR0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS0:1; + unsigned char SCS1:1; + unsigned char IOFS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS0 OSCCON_bits.SCS0 +#define SCS1 OSCCON_bits.SCS1 +#define IOFS OSCCON_bits.IOFS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char TUN5:1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#define TUN5 OSCTUNE_bits.TUN5 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIE:1; + unsigned char :1; + unsigned char CMIE:1; + unsigned char OSFIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIE PIE2_bits.EEIE +#define CMIE PIE2_bits.CMIE +#define OSFIE PIE2_bits.OSFIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEIF:1; + unsigned char :1; + unsigned char CMIF:1; + unsigned char OSFIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define EEIF PIR2_bits.EEIF +#define CMIF PIR2_bits.CMIF +#define OSFIF PIR2_bits.OSFIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char RA6:1; + unsigned char RA7:1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#define RA6 PORTA_bits.RA6 +#define RA7 PORTA_bits.RA7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char T1RUN:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define T1RUN T1CON_bits.T1RUN +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char TRISA6:1; + unsigned char TRISA7:1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#define TRISA6 TRISA_bits.TRISA6 +#define TRISA7 TRISA_bits.TRISA7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char SWDTE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define SWDTE WDTCON_bits.SWDTE +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f886.h b/device/include/pic/pic16f886.h new file mode 100644 index 0000000..1dfba5b --- /dev/null +++ b/device/include/pic/pic16f886.h @@ -0,0 +1,1785 @@ +// +// Register Declarations for Microchip 16F886 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F886_H +#define P16F886_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPMSK_ADDR 0x0093 +#define MSK_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define WPUB_ADDR 0x0095 +#define IOCB_ADDR 0x0096 +#define VRCON_ADDR 0x0097 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define SPBRGH_ADDR 0x009A +#define PWM1CON_ADDR 0x009B +#define ECCPAS_ADDR 0x009C +#define PSTRCON_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define WDTCON_ADDR 0x0105 +#define CM1CON0_ADDR 0x0107 +#define CM2CON0_ADDR 0x0108 +#define CM2CON1_ADDR 0x0109 +#define EEDATA_ADDR 0x010C +#define EEDAT_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define SRCON_ADDR 0x0185 +#define BAUDCTL_ADDR 0x0187 +#define ANSEL_ADDR 0x0188 +#define ANSELH_ADDR 0x0189 +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F886.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F886 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F886 +// 2. LIST directive in the source file +// LIST P=PIC16F886 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== +// +//1.00 11/18/05 Original +// +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F886 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; + +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; + +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; + +extern __sfr __at (TRISE_ADDR) TRISE; + +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPMSK_ADDR) SSPMSK; +extern __sfr __at (MSK_ADDR) MSK; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (WPUB_ADDR) WPUB; +extern __sfr __at (IOCB_ADDR) IOCB; +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (SPBRGH_ADDR) SPBRGH; +extern __sfr __at (PWM1CON_ADDR) PWM1CON; +extern __sfr __at (ECCPAS_ADDR) ECCPAS; +extern __sfr __at (PSTRCON_ADDR) PSTRCON; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (WDTCON_ADDR) WDTCON; + +extern __sfr __at (CM1CON0_ADDR) CM1CON0; +extern __sfr __at (CM2CON0_ADDR) CM2CON0; +extern __sfr __at (CM2CON1_ADDR) CM2CON1; + +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEDAT_ADDR) EEDAT; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (SRCON_ADDR) SRCON; + +extern __sfr __at (BAUDCTL_ADDR) BAUDCTL; +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (ANSELH_ADDR) ANSELH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- BANK 0 REGISTER DEFINITIONS ---------------------------------------- +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- BANK 1 REGISTER DEFINITIONS ---------------------------------------- +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits -------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- WPUB Bits ---------------------------------------------------------- + + +//----- IOCB Bits ---------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- SPBRG Bits ------------------------------------------------------- + + +//----- SPBRGH Bits ------------------------------------------------------- + + +//----- PWM1CON Bits ------------------------------------------------------- + + +//----- ECCPAS Bits -------------------------------------------------------- + + +//----- PSTRCON ------------------------------------------------------------- + + +//----- ADCON1 ------------------------------------------------------------- + + +//----- BANK 2 REGISTER DEFINITIONS ---------------------------------------- +//----- WDTCON Bits -------------------------------------------------------- + + +//----- CM1CON0 Bits ------------------------------------------------------- + + + +//----- CM2CON0 Bits ------------------------------------------------------- + + + +//----- CM2CON1 Bits ------------------------------------------------------- + + + +//----- BANK 3 REGISTER DEFINITIONS ---------------------------------------- +//----- SRCON --------------------------------------------------------------- + + + +//----- BAUDCTL Bits ------------------------------------------------------- + + + + +//----- ANSEL -------------------------------------------------------------- + + +//----- ANSELH ------------------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'18E'-H'18F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== +#define _CONFIG1 0x2007 +#define _CONFIG2 0x2008 + +//----- Configuration Word1 ------------------------------------------------ + +#define _DEBUG_ON 0x1FFF +#define _DEBUG_OFF 0x3FFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x2FFF +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOR_ON 0x3FFF +#define _BOR_NSLEEP 0x3EFF +#define _BOR_SBODEN 0x3DFF +#define _BOR_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_ON 0x3FEF +#define _PWRTE_OFF 0x3FFF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF +#define _INTOSCIO 0x3FFC +#define _INTOSC 0x3FFD +#define _EXTRCIO 0x3FFE +#define _EXTRC 0x3FFF + +//----- Configuration Word2 ------------------------------------------------ + +#define _WRT_OFF 0x3FFF // No prog memmory write protection +#define _WRT_256 0x3DFF // First 256 prog memmory write protected +#define _WRT_1FOURTH 0x3BFF // First quarter prog memmory write protected +#define _WRT_HALF 0x39FF // First half memmory write protected + +#define _BOR21V 0x3EFF +#define _BOR40V 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char CHS3:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define CHS3 ADCON0_bits.CHS3 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char :1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define VCFG0 ADCON1_bits.VCFG0 +#define VCFG1 ADCON1_bits.VCFG1 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ANSEL bits -------------------- +typedef union { + struct { + unsigned char ANS0:1; + unsigned char ANS1:1; + unsigned char ANS2:1; + unsigned char ANS3:1; + unsigned char ANS4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ANSEL_bits_t; +extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; + +#ifndef NO_BIT_DEFINES +#define ANS0 ANSEL_bits.ANS0 +#define ANS1 ANSEL_bits.ANS1 +#define ANS2 ANSEL_bits.ANS2 +#define ANS3 ANSEL_bits.ANS3 +#define ANS4 ANSEL_bits.ANS4 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSELH bits -------------------- +typedef union { + struct { + unsigned char ANS8:1; + unsigned char ANS9:1; + unsigned char ANS10:1; + unsigned char ANS11:1; + unsigned char ANS12:1; + unsigned char ANS13:1; + unsigned char :1; + unsigned char :1; + }; +} __ANSELH_bits_t; +extern volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits; + +#ifndef NO_BIT_DEFINES +#define ANS8 ANSELH_bits.ANS8 +#define ANS9 ANSELH_bits.ANS9 +#define ANS10 ANSELH_bits.ANS10 +#define ANS11 ANSELH_bits.ANS11 +#define ANS12 ANSELH_bits.ANS12 +#define ANS13 ANSELH_bits.ANS13 +#endif /* NO_BIT_DEFINES */ + +// ----- BAUDCTL bits -------------------- +typedef union { + struct { + unsigned char ABDEN:1; + unsigned char WUE:1; + unsigned char :1; + unsigned char BRG16:1; + unsigned char SCKP:1; + unsigned char :1; + unsigned char RCIDL:1; + unsigned char ABDOVF:1; + }; +} __BAUDCTL_bits_t; +extern volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits; + +#ifndef NO_BIT_DEFINES +#define ABDEN BAUDCTL_bits.ABDEN +#define WUE BAUDCTL_bits.WUE +#define BRG16 BAUDCTL_bits.BRG16 +#define SCKP BAUDCTL_bits.SCKP +#define RCIDL BAUDCTL_bits.RCIDL +#define ABDOVF BAUDCTL_bits.ABDOVF +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char DC1B0:1; + unsigned char DC1B1:1; + unsigned char P1M0:1; + unsigned char P1M1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define DC1B0 CCP1CON_bits.DC1B0 +#define CCP1Y CCP1CON_bits.CCP1Y +#define DC1B1 CCP1CON_bits.DC1B1 +#define CCP1X CCP1CON_bits.CCP1X +#define P1M0 CCP1CON_bits.P1M0 +#define P1M1 CCP1CON_bits.P1M1 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char DC2B0:1; + unsigned char DC2B1:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define DC2B0 CCP2CON_bits.DC2B0 +#define CCP2X CCP2CON_bits.CCP2X +#define DC2B1 CCP2CON_bits.DC2B1 +#endif /* NO_BIT_DEFINES */ + +// ----- CM1CON0 bits -------------------- +typedef union { + struct { + unsigned char C1CH0:1; + unsigned char C1CH1:1; + unsigned char C1R:1; + unsigned char :1; + unsigned char C1POL:1; + unsigned char C1OE:1; + unsigned char C1OUT:1; + unsigned char C1ON:1; + }; +} __CM1CON0_bits_t; +extern volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C1CH0 CM1CON0_bits.C1CH0 +#define C1CH1 CM1CON0_bits.C1CH1 +#define C1R CM1CON0_bits.C1R +#define C1POL CM1CON0_bits.C1POL +#define C1OE CM1CON0_bits.C1OE +#define C1OUT CM1CON0_bits.C1OUT +#define C1ON CM1CON0_bits.C1ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON0 bits -------------------- +typedef union { + struct { + unsigned char C2CH0:1; + unsigned char C2CH1:1; + unsigned char C2R:1; + unsigned char :1; + unsigned char C2POL:1; + unsigned char C2OE:1; + unsigned char C2OUT:1; + unsigned char C2ON:1; + }; +} __CM2CON0_bits_t; +extern volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C2CH0 CM2CON0_bits.C2CH0 +#define C2CH1 CM2CON0_bits.C2CH1 +#define C2R CM2CON0_bits.C2R +#define C2POL CM2CON0_bits.C2POL +#define C2OE CM2CON0_bits.C2OE +#define C2OUT CM2CON0_bits.C2OUT +#define C2ON CM2CON0_bits.C2ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char C2RSEL:1; + unsigned char C1RSEL:1; + unsigned char MC2OUT:1; + unsigned char MC1OUT:1; + }; +} __CM2CON1_bits_t; +extern volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CM2CON1_bits.C2SYNC +#define T1GSS CM2CON1_bits.T1GSS +#define C2RSEL CM2CON1_bits.C2RSEL +#define C1RSEL CM2CON1_bits.C1RSEL +#define MC2OUT CM2CON1_bits.MC2OUT +#define MC1OUT CM2CON1_bits.MC1OUT +#endif /* NO_BIT_DEFINES */ + +// ----- ECCPAS bits -------------------- +typedef union { + struct { + unsigned char PSSBD0:1; + unsigned char PSSBD1:1; + unsigned char PSSAC0:1; + unsigned char PSSAC1:1; + unsigned char ECCPAS0:1; + unsigned char ECCPAS1:1; + unsigned char ECCPAS2:1; + unsigned char ECCPASE:1; + }; +} __ECCPAS_bits_t; +extern volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits; + +#ifndef NO_BIT_DEFINES +#define PSSBD0 ECCPAS_bits.PSSBD0 +#define PSSBD1 ECCPAS_bits.PSSBD1 +#define PSSAC0 ECCPAS_bits.PSSAC0 +#define PSSAC1 ECCPAS_bits.PSSAC1 +#define ECCPAS0 ECCPAS_bits.ECCPAS0 +#define ECCPAS1 ECCPAS_bits.ECCPAS1 +#define ECCPAS2 ECCPAS_bits.ECCPAS2 +#define ECCPASE ECCPAS_bits.ECCPASE +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char TMR0IF:1; + unsigned char :1; + unsigned char :1; + unsigned char TMR0IE:1; + unsigned char :1; + unsigned char :1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOCB bits -------------------- +typedef union { + struct { + unsigned char IOCB0:1; + unsigned char IOCB1:1; + unsigned char IOCB2:1; + unsigned char IOCB3:1; + unsigned char IOCB4:1; + unsigned char IOCB5:1; + unsigned char IOCB6:1; + unsigned char IOCB7:1; + }; +} __IOCB_bits_t; +extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; + +#ifndef NO_BIT_DEFINES +#define IOCB0 IOCB_bits.IOCB0 +#define IOCB1 IOCB_bits.IOCB1 +#define IOCB2 IOCB_bits.IOCB2 +#define IOCB3 IOCB_bits.IOCB3 +#define IOCB4 IOCB_bits.IOCB4 +#define IOCB5 IOCB_bits.IOCB5 +#define IOCB6 IOCB_bits.IOCB6 +#define IOCB7 IOCB_bits.IOCB7 +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char SBOREN:1; + unsigned char ULPWUE:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define SBOREN PCON_bits.SBOREN +#define ULPWUE PCON_bits.ULPWUE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char ULPWUIE:1; + unsigned char BCLIE:1; + unsigned char EEIE:1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char OSFIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define ULPWUIE PIE2_bits.ULPWUIE +#define BCLIE PIE2_bits.BCLIE +#define EEIE PIE2_bits.EEIE +#define C1IE PIE2_bits.C1IE +#define C2IE PIE2_bits.C2IE +#define OSFIE PIE2_bits.OSFIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char ULPWUIF:1; + unsigned char BCLIF:1; + unsigned char EEIF:1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char OSFIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define ULPWUIF PIR2_bits.ULPWUIF +#define BCLIF PIR2_bits.BCLIF +#define EEIF PIR2_bits.EEIF +#define C1IF PIR2_bits.C1IF +#define C2IF PIR2_bits.C2IF +#define OSFIF PIR2_bits.OSFIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char RA6:1; + unsigned char RA7:1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#define RA6 PORTA_bits.RA6 +#define RA7 PORTA_bits.RA7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- PSTRCON bits -------------------- +typedef union { + struct { + unsigned char STRA:1; + unsigned char STRB:1; + unsigned char STRC:1; + unsigned char STRD:1; + unsigned char STRSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PSTRCON_bits_t; +extern volatile __PSTRCON_bits_t __at(PSTRCON_ADDR) PSTRCON_bits; + +#ifndef NO_BIT_DEFINES +#define STRA PSTRCON_bits.STRA +#define STRB PSTRCON_bits.STRB +#define STRC PSTRCON_bits.STRC +#define STRD PSTRCON_bits.STRD +#define STRSYNC PSTRCON_bits.STRSYNC +#endif /* NO_BIT_DEFINES */ + +// ----- PWM1CON bits -------------------- +typedef union { + struct { + unsigned char PDC0:1; + unsigned char PDC1:1; + unsigned char PDC2:1; + unsigned char PDC3:1; + unsigned char PDC4:1; + unsigned char PDC5:1; + unsigned char PDC6:1; + unsigned char PRSEN:1; + }; +} __PWM1CON_bits_t; +extern volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits; + +#ifndef NO_BIT_DEFINES +#define PDC0 PWM1CON_bits.PDC0 +#define PDC1 PWM1CON_bits.PDC1 +#define PDC2 PWM1CON_bits.PDC2 +#define PDC3 PWM1CON_bits.PDC3 +#define PDC4 PWM1CON_bits.PDC4 +#define PDC5 PWM1CON_bits.PDC5 +#define PDC6 PWM1CON_bits.PDC6 +#define PRSEN PWM1CON_bits.PRSEN +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SPBRG bits -------------------- +typedef union { + struct { + unsigned char BRG0:1; + unsigned char BRG1:1; + unsigned char BRG2:1; + unsigned char BRG3:1; + unsigned char BRG4:1; + unsigned char BRG5:1; + unsigned char BRG6:1; + unsigned char BRG7:1; + }; +} __SPBRG_bits_t; +extern volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits; + +#ifndef NO_BIT_DEFINES +#define BRG0 SPBRG_bits.BRG0 +#define BRG1 SPBRG_bits.BRG1 +#define BRG2 SPBRG_bits.BRG2 +#define BRG3 SPBRG_bits.BRG3 +#define BRG4 SPBRG_bits.BRG4 +#define BRG5 SPBRG_bits.BRG5 +#define BRG6 SPBRG_bits.BRG6 +#define BRG7 SPBRG_bits.BRG7 +#endif /* NO_BIT_DEFINES */ + +// ----- SPBRGH bits -------------------- +typedef union { + struct { + unsigned char BRG8:1; + unsigned char BRG9:1; + unsigned char BRG10:1; + unsigned char BRG11:1; + unsigned char BRG12:1; + unsigned char BRG13:1; + unsigned char BRG14:1; + unsigned char BRG15:1; + }; +} __SPBRGH_bits_t; +extern volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits; + +#ifndef NO_BIT_DEFINES +#define BRG8 SPBRGH_bits.BRG8 +#define BRG9 SPBRGH_bits.BRG9 +#define BRG10 SPBRGH_bits.BRG10 +#define BRG11 SPBRGH_bits.BRG11 +#define BRG12 SPBRGH_bits.BRG12 +#define BRG13 SPBRGH_bits.BRG13 +#define BRG14 SPBRGH_bits.BRG14 +#define BRG15 SPBRGH_bits.BRG15 +#endif /* NO_BIT_DEFINES */ + +// ----- SRCON bits -------------------- +typedef union { + struct { + unsigned char FVREN:1; + unsigned char :1; + unsigned char PULSR:1; + unsigned char PULSS:1; + unsigned char C2REN:1; + unsigned char C1SEN:1; + unsigned char SR0:1; + unsigned char SR1:1; + }; +} __SRCON_bits_t; +extern volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits; + +#ifndef NO_BIT_DEFINES +#define FVREN SRCON_bits.FVREN +#define PULSR SRCON_bits.PULSR +#define PULSS SRCON_bits.PULSS +#define C2REN SRCON_bits.C2REN +#define C1SEN SRCON_bits.C1SEN +#define SR0 SRCON_bits.SR0 +#define SR1 SRCON_bits.SR1 +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char T1GINV:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char TRISA6:1; + unsigned char TRISA7:1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#define TRISA6 TRISA_bits.TRISA6 +#define TRISA7 TRISA_bits.TRISA7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char SENDB:1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SENDB TXSTA_bits.SENDB +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char VRSS:1; + unsigned char VRR:1; + unsigned char VROE:1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRSS VRCON_bits.VRSS +#define VRR VRCON_bits.VRR +#define VROE VRCON_bits.VROE +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUB bits -------------------- +typedef union { + struct { + unsigned char WPUB0:1; + unsigned char WPUB1:1; + unsigned char WPUB2:1; + unsigned char WPUB3:1; + unsigned char WPUB4:1; + unsigned char WPUB5:1; + unsigned char WPUB6:1; + unsigned char WPUB7:1; + }; +} __WPUB_bits_t; +extern volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + +#ifndef NO_BIT_DEFINES +#define WPUB0 WPUB_bits.WPUB0 +#define WPUB1 WPUB_bits.WPUB1 +#define WPUB2 WPUB_bits.WPUB2 +#define WPUB3 WPUB_bits.WPUB3 +#define WPUB4 WPUB_bits.WPUB4 +#define WPUB5 WPUB_bits.WPUB5 +#define WPUB6 WPUB_bits.WPUB6 +#define WPUB7 WPUB_bits.WPUB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f887.h b/device/include/pic/pic16f887.h new file mode 100644 index 0000000..fce46ee --- /dev/null +++ b/device/include/pic/pic16f887.h @@ -0,0 +1,1842 @@ +// +// Register Declarations for Microchip 16F887 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F887_H +#define P16F887_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define SSPCON2_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPMSK_ADDR 0x0093 +#define MSK_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define WPUB_ADDR 0x0095 +#define IOCB_ADDR 0x0096 +#define VRCON_ADDR 0x0097 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define SPBRGH_ADDR 0x009A +#define PWM1CON_ADDR 0x009B +#define ECCPAS_ADDR 0x009C +#define PSTRCON_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define WDTCON_ADDR 0x0105 +#define CM1CON0_ADDR 0x0107 +#define CM2CON0_ADDR 0x0108 +#define CM2CON1_ADDR 0x0109 +#define EEDATA_ADDR 0x010C +#define EEDAT_ADDR 0x010C +#define EEADR_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define SRCON_ADDR 0x0185 +#define BAUDCTL_ADDR 0x0187 +#define ANSEL_ADDR 0x0188 +#define ANSELH_ADDR 0x0189 +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F887.INC Standard Header File, Version 1.00 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F887 microcontroller. These names are taken to match +// the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F887 +// 2. LIST directive in the source file +// LIST P=PIC16F887 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== +// +//1.00 11/18/05 Original +// +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F887 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; + +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; + +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; +extern __sfr __at (SSPCON2_ADDR) SSPCON2; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPMSK_ADDR) SSPMSK; +extern __sfr __at (MSK_ADDR) MSK; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (WPUB_ADDR) WPUB; +extern __sfr __at (IOCB_ADDR) IOCB; +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (SPBRGH_ADDR) SPBRGH; +extern __sfr __at (PWM1CON_ADDR) PWM1CON; +extern __sfr __at (ECCPAS_ADDR) ECCPAS; +extern __sfr __at (PSTRCON_ADDR) PSTRCON; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (WDTCON_ADDR) WDTCON; + +extern __sfr __at (CM1CON0_ADDR) CM1CON0; +extern __sfr __at (CM2CON0_ADDR) CM2CON0; +extern __sfr __at (CM2CON1_ADDR) CM2CON1; + +extern __sfr __at (EEDATA_ADDR) EEDATA; +extern __sfr __at (EEDAT_ADDR) EEDAT; +extern __sfr __at (EEADR_ADDR) EEADR; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; + +extern __sfr __at (SRCON_ADDR) SRCON; + +extern __sfr __at (BAUDCTL_ADDR) BAUDCTL; +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (ANSELH_ADDR) ANSELH; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- BANK 0 REGISTER DEFINITIONS ---------------------------------------- +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- BANK 1 REGISTER DEFINITIONS ---------------------------------------- +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits -------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + +//----- SSPCON2 Bits -------------------------------------------------------- + + +//----- SSPSTAT Bits ------------------------------------------------------- + + +//----- WPUB Bits ---------------------------------------------------------- + + +//----- IOCB Bits ---------------------------------------------------------- + + +//----- VRCON Bits --------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + +//----- SPBRG Bits ------------------------------------------------------- + + +//----- SPBRGH Bits ------------------------------------------------------- + + +//----- PWM1CON Bits ------------------------------------------------------- + + +//----- ECCPAS Bits -------------------------------------------------------- + + +//----- PSTRCON ------------------------------------------------------------- + + +//----- ADCON1 ------------------------------------------------------------- + + +//----- BANK 2 REGISTER DEFINITIONS ---------------------------------------- +//----- WDTCON Bits -------------------------------------------------------- + + +//----- CM1CON0 Bits ------------------------------------------------------- + + + +//----- CM2CON0 Bits ------------------------------------------------------- + + + +//----- CM2CON1 Bits ------------------------------------------------------- + + + +//----- BANK 3 REGISTER DEFINITIONS ---------------------------------------- +//----- SRCON --------------------------------------------------------------- + + + +//----- BAUDCTL Bits ------------------------------------------------------- + + + + +//----- ANSEL -------------------------------------------------------------- + + +//----- ANSELH ------------------------------------------------------------- + + +//----- EECON1 Bits -------------------------------------------------------- + + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'18E'-H'18F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== +#define _CONFIG1 0x2007 +#define _CONFIG2 0x2008 + +//----- Configuration Word1 ------------------------------------------------ + +#define _DEBUG_ON 0x1FFF +#define _DEBUG_OFF 0x3FFF +#define _LVP_ON 0x3FFF +#define _LVP_OFF 0x2FFF +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOR_ON 0x3FFF +#define _BOR_NSLEEP 0x3EFF +#define _BOR_SBODEN 0x3DFF +#define _BOR_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_ON 0x3FEF +#define _PWRTE_OFF 0x3FFF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF +#define _INTOSCIO 0x3FFC +#define _INTOSC 0x3FFD +#define _EXTRCIO 0x3FFE +#define _EXTRC 0x3FFF + +//----- Configuration Word2 ------------------------------------------------ + +#define _WRT_OFF 0x3FFF // No prog memmory write protection +#define _WRT_256 0x3DFF // First 256 prog memmory write protected +#define _WRT_1FOURTH 0x3BFF // First quarter prog memmory write protected +#define _WRT_HALF 0x39FF // First half memmory write protected + +#define _BOR21V 0x3EFF +#define _BOR40V 0x3FFF + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char GO:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char CHS3:1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + }; + struct { + unsigned char :1; + unsigned char NOT_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define GO ADCON0_bits.GO +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define CHS3 ADCON0_bits.CHS3 +#define ADCS0 ADCON0_bits.ADCS0 +#define ADCS1 ADCON0_bits.ADCS1 +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char :1; + unsigned char ADFM:1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define VCFG0 ADCON1_bits.VCFG0 +#define VCFG1 ADCON1_bits.VCFG1 +#define ADFM ADCON1_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ANSEL bits -------------------- +typedef union { + struct { + unsigned char ANS0:1; + unsigned char ANS1:1; + unsigned char ANS2:1; + unsigned char ANS3:1; + unsigned char ANS4:1; + unsigned char ANS5:1; + unsigned char ANS6:1; + unsigned char ANS7:1; + }; +} __ANSEL_bits_t; +extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; + +#ifndef NO_BIT_DEFINES +#define ANS0 ANSEL_bits.ANS0 +#define ANS1 ANSEL_bits.ANS1 +#define ANS2 ANSEL_bits.ANS2 +#define ANS3 ANSEL_bits.ANS3 +#define ANS4 ANSEL_bits.ANS4 +#define ANS5 ANSEL_bits.ANS5 +#define ANS6 ANSEL_bits.ANS6 +#define ANS7 ANSEL_bits.ANS7 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSELH bits -------------------- +typedef union { + struct { + unsigned char ANS8:1; + unsigned char ANS9:1; + unsigned char ANS10:1; + unsigned char ANS11:1; + unsigned char ANS12:1; + unsigned char ANS13:1; + unsigned char :1; + unsigned char :1; + }; +} __ANSELH_bits_t; +extern volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits; + +#ifndef NO_BIT_DEFINES +#define ANS8 ANSELH_bits.ANS8 +#define ANS9 ANSELH_bits.ANS9 +#define ANS10 ANSELH_bits.ANS10 +#define ANS11 ANSELH_bits.ANS11 +#define ANS12 ANSELH_bits.ANS12 +#define ANS13 ANSELH_bits.ANS13 +#endif /* NO_BIT_DEFINES */ + +// ----- BAUDCTL bits -------------------- +typedef union { + struct { + unsigned char ABDEN:1; + unsigned char WUE:1; + unsigned char :1; + unsigned char BRG16:1; + unsigned char SCKP:1; + unsigned char :1; + unsigned char RCIDL:1; + unsigned char ABDOVF:1; + }; +} __BAUDCTL_bits_t; +extern volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits; + +#ifndef NO_BIT_DEFINES +#define ABDEN BAUDCTL_bits.ABDEN +#define WUE BAUDCTL_bits.WUE +#define BRG16 BAUDCTL_bits.BRG16 +#define SCKP BAUDCTL_bits.SCKP +#define RCIDL BAUDCTL_bits.RCIDL +#define ABDOVF BAUDCTL_bits.ABDOVF +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char DC1B0:1; + unsigned char DC1B1:1; + unsigned char P1M0:1; + unsigned char P1M1:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define DC1B0 CCP1CON_bits.DC1B0 +#define CCP1Y CCP1CON_bits.CCP1Y +#define DC1B1 CCP1CON_bits.DC1B1 +#define CCP1X CCP1CON_bits.CCP1X +#define P1M0 CCP1CON_bits.P1M0 +#define P1M1 CCP1CON_bits.P1M1 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char DC2B0:1; + unsigned char DC2B1:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define DC2B0 CCP2CON_bits.DC2B0 +#define CCP2X CCP2CON_bits.CCP2X +#define DC2B1 CCP2CON_bits.DC2B1 +#endif /* NO_BIT_DEFINES */ + +// ----- CM1CON0 bits -------------------- +typedef union { + struct { + unsigned char C1CH0:1; + unsigned char C1CH1:1; + unsigned char C1R:1; + unsigned char :1; + unsigned char C1POL:1; + unsigned char C1OE:1; + unsigned char C1OUT:1; + unsigned char C1ON:1; + }; +} __CM1CON0_bits_t; +extern volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C1CH0 CM1CON0_bits.C1CH0 +#define C1CH1 CM1CON0_bits.C1CH1 +#define C1R CM1CON0_bits.C1R +#define C1POL CM1CON0_bits.C1POL +#define C1OE CM1CON0_bits.C1OE +#define C1OUT CM1CON0_bits.C1OUT +#define C1ON CM1CON0_bits.C1ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON0 bits -------------------- +typedef union { + struct { + unsigned char C2CH0:1; + unsigned char C2CH1:1; + unsigned char C2R:1; + unsigned char :1; + unsigned char C2POL:1; + unsigned char C2OE:1; + unsigned char C2OUT:1; + unsigned char C2ON:1; + }; +} __CM2CON0_bits_t; +extern volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; + +#ifndef NO_BIT_DEFINES +#define C2CH0 CM2CON0_bits.C2CH0 +#define C2CH1 CM2CON0_bits.C2CH1 +#define C2R CM2CON0_bits.C2R +#define C2POL CM2CON0_bits.C2POL +#define C2OE CM2CON0_bits.C2OE +#define C2OUT CM2CON0_bits.C2OUT +#define C2ON CM2CON0_bits.C2ON +#endif /* NO_BIT_DEFINES */ + +// ----- CM2CON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char C2RSEL:1; + unsigned char C1RSEL:1; + unsigned char MC2OUT:1; + unsigned char MC1OUT:1; + }; +} __CM2CON1_bits_t; +extern volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CM2CON1_bits.C2SYNC +#define T1GSS CM2CON1_bits.T1GSS +#define C2RSEL CM2CON1_bits.C2RSEL +#define C1RSEL CM2CON1_bits.C1RSEL +#define MC2OUT CM2CON1_bits.MC2OUT +#define MC1OUT CM2CON1_bits.MC1OUT +#endif /* NO_BIT_DEFINES */ + +// ----- ECCPAS bits -------------------- +typedef union { + struct { + unsigned char PSSBD0:1; + unsigned char PSSBD1:1; + unsigned char PSSAC0:1; + unsigned char PSSAC1:1; + unsigned char ECCPAS0:1; + unsigned char ECCPAS1:1; + unsigned char ECCPAS2:1; + unsigned char ECCPASE:1; + }; +} __ECCPAS_bits_t; +extern volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits; + +#ifndef NO_BIT_DEFINES +#define PSSBD0 ECCPAS_bits.PSSBD0 +#define PSSBD1 ECCPAS_bits.PSSBD1 +#define PSSAC0 ECCPAS_bits.PSSAC0 +#define PSSAC1 ECCPAS_bits.PSSAC1 +#define ECCPAS0 ECCPAS_bits.ECCPAS0 +#define ECCPAS1 ECCPAS_bits.ECCPAS1 +#define ECCPAS2 ECCPAS_bits.ECCPAS2 +#define ECCPASE ECCPAS_bits.ECCPASE +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define WR EECON1_bits.WR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char TMR0IF:1; + unsigned char :1; + unsigned char :1; + unsigned char TMR0IE:1; + unsigned char :1; + unsigned char :1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOCB bits -------------------- +typedef union { + struct { + unsigned char IOCB0:1; + unsigned char IOCB1:1; + unsigned char IOCB2:1; + unsigned char IOCB3:1; + unsigned char IOCB4:1; + unsigned char IOCB5:1; + unsigned char IOCB6:1; + unsigned char IOCB7:1; + }; +} __IOCB_bits_t; +extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; + +#ifndef NO_BIT_DEFINES +#define IOCB0 IOCB_bits.IOCB0 +#define IOCB1 IOCB_bits.IOCB1 +#define IOCB2 IOCB_bits.IOCB2 +#define IOCB3 IOCB_bits.IOCB3 +#define IOCB4 IOCB_bits.IOCB4 +#define IOCB5 IOCB_bits.IOCB5 +#define IOCB6 IOCB_bits.IOCB6 +#define IOCB7 IOCB_bits.IOCB7 +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char SBOREN:1; + unsigned char ULPWUE:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define SBOREN PCON_bits.SBOREN +#define ULPWUE PCON_bits.ULPWUE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char :1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char ULPWUIE:1; + unsigned char BCLIE:1; + unsigned char EEIE:1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char OSFIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define ULPWUIE PIE2_bits.ULPWUIE +#define BCLIE PIE2_bits.BCLIE +#define EEIE PIE2_bits.EEIE +#define C1IE PIE2_bits.C1IE +#define C2IE PIE2_bits.C2IE +#define OSFIE PIE2_bits.OSFIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char :1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char ULPWUIF:1; + unsigned char BCLIF:1; + unsigned char EEIF:1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char OSFIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define ULPWUIF PIR2_bits.ULPWUIF +#define BCLIF PIR2_bits.BCLIF +#define EEIF PIR2_bits.EEIF +#define C1IF PIR2_bits.C1IF +#define C2IF PIR2_bits.C2IF +#define OSFIF PIR2_bits.OSFIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char RA6:1; + unsigned char RA7:1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#define RA6 PORTA_bits.RA6 +#define RA7 PORTA_bits.RA7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- PSTRCON bits -------------------- +typedef union { + struct { + unsigned char STRA:1; + unsigned char STRB:1; + unsigned char STRC:1; + unsigned char STRD:1; + unsigned char STRSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PSTRCON_bits_t; +extern volatile __PSTRCON_bits_t __at(PSTRCON_ADDR) PSTRCON_bits; + +#ifndef NO_BIT_DEFINES +#define STRA PSTRCON_bits.STRA +#define STRB PSTRCON_bits.STRB +#define STRC PSTRCON_bits.STRC +#define STRD PSTRCON_bits.STRD +#define STRSYNC PSTRCON_bits.STRSYNC +#endif /* NO_BIT_DEFINES */ + +// ----- PWM1CON bits -------------------- +typedef union { + struct { + unsigned char PDC0:1; + unsigned char PDC1:1; + unsigned char PDC2:1; + unsigned char PDC3:1; + unsigned char PDC4:1; + unsigned char PDC5:1; + unsigned char PDC6:1; + unsigned char PRSEN:1; + }; +} __PWM1CON_bits_t; +extern volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits; + +#ifndef NO_BIT_DEFINES +#define PDC0 PWM1CON_bits.PDC0 +#define PDC1 PWM1CON_bits.PDC1 +#define PDC2 PWM1CON_bits.PDC2 +#define PDC3 PWM1CON_bits.PDC3 +#define PDC4 PWM1CON_bits.PDC4 +#define PDC5 PWM1CON_bits.PDC5 +#define PDC6 PWM1CON_bits.PDC6 +#define PRSEN PWM1CON_bits.PRSEN +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SPBRG bits -------------------- +typedef union { + struct { + unsigned char BRG0:1; + unsigned char BRG1:1; + unsigned char BRG2:1; + unsigned char BRG3:1; + unsigned char BRG4:1; + unsigned char BRG5:1; + unsigned char BRG6:1; + unsigned char BRG7:1; + }; +} __SPBRG_bits_t; +extern volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits; + +#ifndef NO_BIT_DEFINES +#define BRG0 SPBRG_bits.BRG0 +#define BRG1 SPBRG_bits.BRG1 +#define BRG2 SPBRG_bits.BRG2 +#define BRG3 SPBRG_bits.BRG3 +#define BRG4 SPBRG_bits.BRG4 +#define BRG5 SPBRG_bits.BRG5 +#define BRG6 SPBRG_bits.BRG6 +#define BRG7 SPBRG_bits.BRG7 +#endif /* NO_BIT_DEFINES */ + +// ----- SPBRGH bits -------------------- +typedef union { + struct { + unsigned char BRG8:1; + unsigned char BRG9:1; + unsigned char BRG10:1; + unsigned char BRG11:1; + unsigned char BRG12:1; + unsigned char BRG13:1; + unsigned char BRG14:1; + unsigned char BRG15:1; + }; +} __SPBRGH_bits_t; +extern volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits; + +#ifndef NO_BIT_DEFINES +#define BRG8 SPBRGH_bits.BRG8 +#define BRG9 SPBRGH_bits.BRG9 +#define BRG10 SPBRGH_bits.BRG10 +#define BRG11 SPBRGH_bits.BRG11 +#define BRG12 SPBRGH_bits.BRG12 +#define BRG13 SPBRGH_bits.BRG13 +#define BRG14 SPBRGH_bits.BRG14 +#define BRG15 SPBRGH_bits.BRG15 +#endif /* NO_BIT_DEFINES */ + +// ----- SRCON bits -------------------- +typedef union { + struct { + unsigned char FVREN:1; + unsigned char :1; + unsigned char PULSR:1; + unsigned char PULSS:1; + unsigned char C2REN:1; + unsigned char C1SEN:1; + unsigned char SR0:1; + unsigned char SR1:1; + }; +} __SRCON_bits_t; +extern volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits; + +#ifndef NO_BIT_DEFINES +#define FVREN SRCON_bits.FVREN +#define PULSR SRCON_bits.PULSR +#define PULSS SRCON_bits.PULSS +#define C2REN SRCON_bits.C2REN +#define C1SEN SRCON_bits.C1SEN +#define SR0 SRCON_bits.SR0 +#define SR1 SRCON_bits.SR1 +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON2 bits -------------------- +typedef union { + struct { + unsigned char SEN:1; + unsigned char RSEN:1; + unsigned char PEN:1; + unsigned char RCEN:1; + unsigned char ACKEN:1; + unsigned char ACKDT:1; + unsigned char ACKSTAT:1; + unsigned char GCEN:1; + }; +} __SSPCON2_bits_t; +extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; + +#ifndef NO_BIT_DEFINES +#define SEN SSPCON2_bits.SEN +#define RSEN SSPCON2_bits.RSEN +#define PEN SSPCON2_bits.PEN +#define RCEN SSPCON2_bits.RCEN +#define ACKEN SSPCON2_bits.ACKEN +#define ACKDT SSPCON2_bits.ACKDT +#define ACKSTAT SSPCON2_bits.ACKSTAT +#define GCEN SSPCON2_bits.GCEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char TMR1GE:1; + unsigned char T1GINV:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define TMR1GE T1CON_bits.TMR1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char TRISA6:1; + unsigned char TRISA7:1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#define TRISA6 TRISA_bits.TRISA6 +#define TRISA7 TRISA_bits.TRISA7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char SENDB:1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SENDB TXSTA_bits.SENDB +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char VRSS:1; + unsigned char VRR:1; + unsigned char VROE:1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRSS VRCON_bits.VRSS +#define VRR VRCON_bits.VRR +#define VROE VRCON_bits.VROE +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUB bits -------------------- +typedef union { + struct { + unsigned char WPUB0:1; + unsigned char WPUB1:1; + unsigned char WPUB2:1; + unsigned char WPUB3:1; + unsigned char WPUB4:1; + unsigned char WPUB5:1; + unsigned char WPUB6:1; + unsigned char WPUB7:1; + }; +} __WPUB_bits_t; +extern volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + +#ifndef NO_BIT_DEFINES +#define WPUB0 WPUB_bits.WPUB0 +#define WPUB1 WPUB_bits.WPUB1 +#define WPUB2 WPUB_bits.WPUB2 +#define WPUB3 WPUB_bits.WPUB3 +#define WPUB4 WPUB_bits.WPUB4 +#define WPUB5 WPUB_bits.WPUB5 +#define WPUB6 WPUB_bits.WPUB6 +#define WPUB7 WPUB_bits.WPUB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f913.h b/device/include/pic/pic16f913.h new file mode 100644 index 0000000..5d4e923 --- /dev/null +++ b/device/include/pic/pic16f913.h @@ -0,0 +1,2127 @@ +// +// Register Declarations for Microchip 16F913 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F913_H +#define P16F913_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define ANSEL_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define WPUB_ADDR 0x0095 +#define WPU_ADDR 0x0095 +#define IOCB_ADDR 0x0096 +#define IOC_ADDR 0x0096 +#define CMCON1_ADDR 0x0097 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define CMCON0_ADDR 0x009C +#define VRCON_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define WDTCON_ADDR 0x0105 +#define LCDCON_ADDR 0x0107 +#define LCDPS_ADDR 0x0108 +#define LVDCON_ADDR 0x0109 +#define EEDATL_ADDR 0x010C +#define EEADRL_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define LCDDATA0_ADDR 0x0110 +#define LCDDATA1_ADDR 0x0111 +#define LCDDATA3_ADDR 0x0113 +#define LCDDATA4_ADDR 0x0114 +#define LCDDATA6_ADDR 0x0116 +#define LCDDATA7_ADDR 0x0117 +#define LCDDATA9_ADDR 0x0119 +#define LCDDATA10_ADDR 0x011A +#define LCDSE0_ADDR 0x011C +#define LCDSE1_ADDR 0x011D +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F913.INC Standard Header File, Version 1.04 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F913 microcontroller. +// These names are taken to match the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F913 +// 2. LIST directive in the source file +// LIST P=PIC16F913 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: +//1.00 06/11/04 Initial Release +//1.01 06/18/04 Corrected typo in 'bad ram' section +//1.02 08/16/04 Added EECON2 +//1.03 05/20/05 Removed EECON2 from badram +//1.04 10/05/05 Correct names of bits in ANSEL, Add EEADRH and EEADRL bit +// definitions + + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F913 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (WPUB_ADDR) WPUB; +extern __sfr __at (WPU_ADDR) WPU; +extern __sfr __at (IOCB_ADDR) IOCB; +extern __sfr __at (IOC_ADDR) IOC; +extern __sfr __at (CMCON1_ADDR) CMCON1; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (CMCON0_ADDR) CMCON0; +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (LCDCON_ADDR) LCDCON; +extern __sfr __at (LCDPS_ADDR) LCDPS; +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (EEDATL_ADDR) EEDATL; +extern __sfr __at (EEADRL_ADDR) EEADRL; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; +extern __sfr __at (LCDDATA0_ADDR) LCDDATA0; +extern __sfr __at (LCDDATA1_ADDR) LCDDATA1; +extern __sfr __at (LCDDATA3_ADDR) LCDDATA3; +extern __sfr __at (LCDDATA4_ADDR) LCDDATA4; +extern __sfr __at (LCDDATA6_ADDR) LCDDATA6; +extern __sfr __at (LCDDATA7_ADDR) LCDDATA7; +extern __sfr __at (LCDDATA9_ADDR) LCDDATA9; +extern __sfr __at (LCDDATA10_ADDR) LCDDATA10; +extern __sfr __at (LCDSE0_ADDR) LCDSE0; +extern __sfr __at (LCDSE1_ADDR) LCDSE1; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits ------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + + +//----- ANSEL Bits --------------------------------------------------------- + + + +//----- SSPSTAT Bits ------------------------------------------------------- + + + +//----- WPUB Bits ------------------------------------------------------- + + +//----- WPU Bits ------------------------------------------------------- + + + +//----- IOCB Bits ------------------------------------------------------- + + + +//----- IOC Bits ------------------------------------------------------- + + + +//----- CMCON1 Bits -------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + + +//----- CMCON0 Bits --------------------------------------------------------- + + +//----- VRCON Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- LCDCON Bits -------------------------------------------------------- + + +//----- LCDPS Bits --------------------------------------------------------- + + +//----- LVDCON Bits -------------------------------------------------------- + + +//----- LCDDATA0 Bits ------------------------------------------------------- + + + +//----- LCDDATA1 Bits ------------------------------------------------------- + + + + +//----- LCDDATA3 Bits ------------------------------------------------------- + + + +//----- LCDDATA4 Bits ------------------------------------------------------- + + + + +//----- LCDDATA6 Bits ------------------------------------------------------- + + + +//----- LCDDATA7 Bits ------------------------------------------------------- + + + + +//----- LCDDATA9 Bits ------------------------------------------------------- + + + +//----- LCDDATA10 Bits ------------------------------------------------------- + + + + +//----- LCDSE0 Bits -------------------------------------------------------- + + + +//----- LCDSE1 Bits -------------------------------------------------------- + + + + +//----- EECON1 Bits -------------------------------------------------------- + + +//----- EEADRH Bits -------------------------------------------------------- + + +//----- EEADRL Bits -------------------------------------------------------- + + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'08', H'1B'-H'1D' +// __BADRAM H'88', H'9A'-H'9B' +// __BADRAM H'112', H'115', H'118', H'11B',H'11E'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CONFIG 0x2007 + +//Configuration Byte 1 Options +#define _DEBUG_ON 0x2FFF +#define _DEBUG_OFF 0x3FFF +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOD_ON 0x3FFF +#define _BOD_NSLEEP 0x3EFF +#define _BOD_SBODEN 0x3DFF +#define _BOD_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_ON 0x3FEF +#define _PWRTE_OFF 0x3FFF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF +#define _INTOSCIO 0x3FFC +#define _INTOSC 0x3FFD +#define _EXTRCIO 0x3FFE +#define _EXTRC 0x3FFF + + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char NOT_DONE:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char ADFM:1; + }; + struct { + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define VCFG0 ADCON0_bits.VCFG0 +#define VCFG1 ADCON0_bits.VCFG1 +#define ADFM ADCON0_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + unsigned char ADCS2:1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define ADCS0 ADCON1_bits.ADCS0 +#define ADCS1 ADCON1_bits.ADCS1 +#define ADCS2 ADCON1_bits.ADCS2 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSEL bits -------------------- +typedef union { + struct { + unsigned char ANS0:1; + unsigned char ANS1:1; + unsigned char ANS2:1; + unsigned char ANS3:1; + unsigned char ANS4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char AN0:1; + unsigned char AN1:1; + unsigned char AN2:1; + unsigned char AN3:1; + unsigned char AN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ANSEL_bits_t; +extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; + +#ifndef NO_BIT_DEFINES +#define ANS0 ANSEL_bits.ANS0 +#define AN0 ANSEL_bits.AN0 +#define ANS1 ANSEL_bits.ANS1 +#define AN1 ANSEL_bits.AN1 +#define ANS2 ANSEL_bits.ANS2 +#define AN2 ANSEL_bits.AN2 +#define ANS3 ANSEL_bits.ANS3 +#define AN3 ANSEL_bits.AN3 +#define ANS4 ANSEL_bits.ANS4 +#define AN4 ANSEL_bits.AN4 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON0 bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON0_bits_t; +extern volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON0_bits.CM0 +#define CM1 CMCON0_bits.CM1 +#define CM2 CMCON0_bits.CM2 +#define CIS CMCON0_bits.CIS +#define C1INV CMCON0_bits.C1INV +#define C2INV CMCON0_bits.C2INV +#define C1OUT CMCON0_bits.C1OUT +#define C2OUT CMCON0_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __CMCON1_bits_t; +extern volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CMCON1_bits.C2SYNC +#define T1GSS CMCON1_bits.T1GSS +#endif /* NO_BIT_DEFINES */ + +// ----- EEADRH bits -------------------- +typedef union { + struct { + unsigned char EEADRH0:1; + unsigned char EEADRH1:1; + unsigned char EEADRH2:1; + unsigned char EEADRH3:1; + unsigned char EEADRH4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EEADRH_bits_t; +extern volatile __EEADRH_bits_t __at(EEADRH_ADDR) EEADRH_bits; + +#ifndef NO_BIT_DEFINES +#define EEADRH0 EEADRH_bits.EEADRH0 +#define EEADRH1 EEADRH_bits.EEADRH1 +#define EEADRH2 EEADRH_bits.EEADRH2 +#define EEADRH3 EEADRH_bits.EEADRH3 +#define EEADRH4 EEADRH_bits.EEADRH4 +#endif /* NO_BIT_DEFINES */ + +// ----- EEADRL bits -------------------- +typedef union { + struct { + unsigned char EEADRL0:1; + unsigned char EEADRL1:1; + unsigned char EEADRL2:1; + unsigned char EEADRL3:1; + unsigned char EEADRL4:1; + unsigned char EEADRL5:1; + unsigned char EEADRL6:1; + unsigned char EEADRL7:1; + }; +} __EEADRL_bits_t; +extern volatile __EEADRL_bits_t __at(EEADRL_ADDR) EEADRL_bits; + +#ifndef NO_BIT_DEFINES +#define EEADRL0 EEADRL_bits.EEADRL0 +#define EEADRL1 EEADRL_bits.EEADRL1 +#define EEADRL2 EEADRL_bits.EEADRL2 +#define EEADRL3 EEADRL_bits.EEADRL3 +#define EEADRL4 EEADRL_bits.EEADRL4 +#define EEADRL5 EEADRL_bits.EEADRL5 +#define EEADRL6 EEADRL_bits.EEADRL6 +#define EEADRL7 EEADRL_bits.EEADRL7 +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; + struct { + unsigned char EERD:1; + unsigned char EEWR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define EERD EECON1_bits.EERD +#define WR EECON1_bits.WR +#define EEWR EECON1_bits.EEWR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char TMR0IF:1; + unsigned char :1; + unsigned char :1; + unsigned char TMR0IE:1; + unsigned char :1; + unsigned char :1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOC bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char IOC4:1; + unsigned char IOC5:1; + unsigned char IOC6:1; + unsigned char IOC7:1; + }; +} __IOC_bits_t; +extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; + +#ifndef NO_BIT_DEFINES +#define IOC4 IOC_bits.IOC4 +#define IOC5 IOC_bits.IOC5 +#define IOC6 IOC_bits.IOC6 +#define IOC7 IOC_bits.IOC7 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char IOCB4:1; + unsigned char IOCB5:1; + unsigned char IOCB6:1; + unsigned char IOCB7:1; + }; +} __IOCB_bits_t; +extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; + +#ifndef NO_BIT_DEFINES +#define IOCB4 IOCB_bits.IOCB4 +#define IOCB5 IOCB_bits.IOCB5 +#define IOCB6 IOCB_bits.IOCB6 +#define IOCB7 IOCB_bits.IOCB7 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDCON bits -------------------- +typedef union { + struct { + unsigned char LMUX0:1; + unsigned char LMUX1:1; + unsigned char CS0:1; + unsigned char CS1:1; + unsigned char VLCDEN:1; + unsigned char WERR:1; + unsigned char SLPEN:1; + unsigned char LCDEN:1; + }; +} __LCDCON_bits_t; +extern volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LMUX0 LCDCON_bits.LMUX0 +#define LMUX1 LCDCON_bits.LMUX1 +#define CS0 LCDCON_bits.CS0 +#define CS1 LCDCON_bits.CS1 +#define VLCDEN LCDCON_bits.VLCDEN +#define WERR LCDCON_bits.WERR +#define SLPEN LCDCON_bits.SLPEN +#define LCDEN LCDCON_bits.LCDEN +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA0 bits -------------------- +typedef union { + struct { + unsigned char SEG0COM0:1; + unsigned char SEG1COM0:1; + unsigned char SEG2COM0:1; + unsigned char SEG3COM0:1; + unsigned char SEG4COM0:1; + unsigned char SEG5COM0:1; + unsigned char SEG6COM0:1; + unsigned char SEG7COM0:1; + }; + struct { + unsigned char S0C0:1; + unsigned char S1C0:1; + unsigned char S2C0:1; + unsigned char S3C0:1; + unsigned char S4C0:1; + unsigned char S5C0:1; + unsigned char S6C0:1; + unsigned char S7C0:1; + }; +} __LCDDATA0_bits_t; +extern volatile __LCDDATA0_bits_t __at(LCDDATA0_ADDR) LCDDATA0_bits; + +#ifndef NO_BIT_DEFINES +#define SEG0COM0 LCDDATA0_bits.SEG0COM0 +#define S0C0 LCDDATA0_bits.S0C0 +#define SEG1COM0 LCDDATA0_bits.SEG1COM0 +#define S1C0 LCDDATA0_bits.S1C0 +#define SEG2COM0 LCDDATA0_bits.SEG2COM0 +#define S2C0 LCDDATA0_bits.S2C0 +#define SEG3COM0 LCDDATA0_bits.SEG3COM0 +#define S3C0 LCDDATA0_bits.S3C0 +#define SEG4COM0 LCDDATA0_bits.SEG4COM0 +#define S4C0 LCDDATA0_bits.S4C0 +#define SEG5COM0 LCDDATA0_bits.SEG5COM0 +#define S5C0 LCDDATA0_bits.S5C0 +#define SEG6COM0 LCDDATA0_bits.SEG6COM0 +#define S6C0 LCDDATA0_bits.S6C0 +#define SEG7COM0 LCDDATA0_bits.SEG7COM0 +#define S7C0 LCDDATA0_bits.S7C0 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA1 bits -------------------- +typedef union { + struct { + unsigned char SEG8COM0:1; + unsigned char SEG9COM0:1; + unsigned char SEG10COM0:1; + unsigned char SEG11COM0:1; + unsigned char SEG12COM0:1; + unsigned char SEG13COM0:1; + unsigned char SEG14COM0:1; + unsigned char SEG15COM0:1; + }; + struct { + unsigned char S8C0:1; + unsigned char S9C0:1; + unsigned char S10C0:1; + unsigned char S11C0:1; + unsigned char S12C0:1; + unsigned char S13C0:1; + unsigned char S14C0:1; + unsigned char S15C0:1; + }; +} __LCDDATA1_bits_t; +extern volatile __LCDDATA1_bits_t __at(LCDDATA1_ADDR) LCDDATA1_bits; + +#ifndef NO_BIT_DEFINES +#define SEG8COM0 LCDDATA1_bits.SEG8COM0 +#define S8C0 LCDDATA1_bits.S8C0 +#define SEG9COM0 LCDDATA1_bits.SEG9COM0 +#define S9C0 LCDDATA1_bits.S9C0 +#define SEG10COM0 LCDDATA1_bits.SEG10COM0 +#define S10C0 LCDDATA1_bits.S10C0 +#define SEG11COM0 LCDDATA1_bits.SEG11COM0 +#define S11C0 LCDDATA1_bits.S11C0 +#define SEG12COM0 LCDDATA1_bits.SEG12COM0 +#define S12C0 LCDDATA1_bits.S12C0 +#define SEG13COM0 LCDDATA1_bits.SEG13COM0 +#define S13C0 LCDDATA1_bits.S13C0 +#define SEG14COM0 LCDDATA1_bits.SEG14COM0 +#define S14C0 LCDDATA1_bits.S14C0 +#define SEG15COM0 LCDDATA1_bits.SEG15COM0 +#define S15C0 LCDDATA1_bits.S15C0 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA10 bits -------------------- +typedef union { + struct { + unsigned char SEG8COM3:1; + unsigned char SEG9COM3:1; + unsigned char SEG10COM3:1; + unsigned char SEG11COM3:1; + unsigned char SEG12COM3:1; + unsigned char SEG13COM3:1; + unsigned char SEG14COM3:1; + unsigned char SEG15COM3:1; + }; + struct { + unsigned char S8C3:1; + unsigned char S9C3:1; + unsigned char S10C3:1; + unsigned char S11C3:1; + unsigned char S12C3:1; + unsigned char S13C3:1; + unsigned char S14C3:1; + unsigned char S15C3:1; + }; +} __LCDDATA10_bits_t; +extern volatile __LCDDATA10_bits_t __at(LCDDATA10_ADDR) LCDDATA10_bits; + +#ifndef NO_BIT_DEFINES +#define SEG8COM3 LCDDATA10_bits.SEG8COM3 +#define S8C3 LCDDATA10_bits.S8C3 +#define SEG9COM3 LCDDATA10_bits.SEG9COM3 +#define S9C3 LCDDATA10_bits.S9C3 +#define SEG10COM3 LCDDATA10_bits.SEG10COM3 +#define S10C3 LCDDATA10_bits.S10C3 +#define SEG11COM3 LCDDATA10_bits.SEG11COM3 +#define S11C3 LCDDATA10_bits.S11C3 +#define SEG12COM3 LCDDATA10_bits.SEG12COM3 +#define S12C3 LCDDATA10_bits.S12C3 +#define SEG13COM3 LCDDATA10_bits.SEG13COM3 +#define S13C3 LCDDATA10_bits.S13C3 +#define SEG14COM3 LCDDATA10_bits.SEG14COM3 +#define S14C3 LCDDATA10_bits.S14C3 +#define SEG15COM3 LCDDATA10_bits.SEG15COM3 +#define S15C3 LCDDATA10_bits.S15C3 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA3 bits -------------------- +typedef union { + struct { + unsigned char SEG0COM1:1; + unsigned char SEG1COM1:1; + unsigned char SEG2COM1:1; + unsigned char SEG3COM1:1; + unsigned char SEG4COM1:1; + unsigned char SEG5COM1:1; + unsigned char SEG6COM1:1; + unsigned char SEG7COM1:1; + }; + struct { + unsigned char S0C1:1; + unsigned char S1C1:1; + unsigned char S2C1:1; + unsigned char S3C1:1; + unsigned char S4C1:1; + unsigned char S5C1:1; + unsigned char S6C1:1; + unsigned char S7C1:1; + }; +} __LCDDATA3_bits_t; +extern volatile __LCDDATA3_bits_t __at(LCDDATA3_ADDR) LCDDATA3_bits; + +#ifndef NO_BIT_DEFINES +#define SEG0COM1 LCDDATA3_bits.SEG0COM1 +#define S0C1 LCDDATA3_bits.S0C1 +#define SEG1COM1 LCDDATA3_bits.SEG1COM1 +#define S1C1 LCDDATA3_bits.S1C1 +#define SEG2COM1 LCDDATA3_bits.SEG2COM1 +#define S2C1 LCDDATA3_bits.S2C1 +#define SEG3COM1 LCDDATA3_bits.SEG3COM1 +#define S3C1 LCDDATA3_bits.S3C1 +#define SEG4COM1 LCDDATA3_bits.SEG4COM1 +#define S4C1 LCDDATA3_bits.S4C1 +#define SEG5COM1 LCDDATA3_bits.SEG5COM1 +#define S5C1 LCDDATA3_bits.S5C1 +#define SEG6COM1 LCDDATA3_bits.SEG6COM1 +#define S6C1 LCDDATA3_bits.S6C1 +#define SEG7COM1 LCDDATA3_bits.SEG7COM1 +#define S7C1 LCDDATA3_bits.S7C1 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA4 bits -------------------- +typedef union { + struct { + unsigned char SEG8COM1:1; + unsigned char SEG9COM1:1; + unsigned char SEG10COM1:1; + unsigned char SEG11COM1:1; + unsigned char SEG12COM1:1; + unsigned char SEG13COM1:1; + unsigned char SEG14COM1:1; + unsigned char SEG15COM1:1; + }; + struct { + unsigned char S8C1:1; + unsigned char S9C1:1; + unsigned char S10C1:1; + unsigned char S11C1:1; + unsigned char S12C1:1; + unsigned char S13C1:1; + unsigned char S14C1:1; + unsigned char S15C1:1; + }; +} __LCDDATA4_bits_t; +extern volatile __LCDDATA4_bits_t __at(LCDDATA4_ADDR) LCDDATA4_bits; + +#ifndef NO_BIT_DEFINES +#define SEG8COM1 LCDDATA4_bits.SEG8COM1 +#define S8C1 LCDDATA4_bits.S8C1 +#define SEG9COM1 LCDDATA4_bits.SEG9COM1 +#define S9C1 LCDDATA4_bits.S9C1 +#define SEG10COM1 LCDDATA4_bits.SEG10COM1 +#define S10C1 LCDDATA4_bits.S10C1 +#define SEG11COM1 LCDDATA4_bits.SEG11COM1 +#define S11C1 LCDDATA4_bits.S11C1 +#define SEG12COM1 LCDDATA4_bits.SEG12COM1 +#define S12C1 LCDDATA4_bits.S12C1 +#define SEG13COM1 LCDDATA4_bits.SEG13COM1 +#define S13C1 LCDDATA4_bits.S13C1 +#define SEG14COM1 LCDDATA4_bits.SEG14COM1 +#define S14C1 LCDDATA4_bits.S14C1 +#define SEG15COM1 LCDDATA4_bits.SEG15COM1 +#define S15C1 LCDDATA4_bits.S15C1 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA6 bits -------------------- +typedef union { + struct { + unsigned char SEG0COM2:1; + unsigned char SEG1COM2:1; + unsigned char SEG2COM2:1; + unsigned char SEG3COM2:1; + unsigned char SEG4COM2:1; + unsigned char SEG5COM2:1; + unsigned char SEG6COM2:1; + unsigned char SEG7COM2:1; + }; + struct { + unsigned char S0C2:1; + unsigned char S1C2:1; + unsigned char S2C2:1; + unsigned char S3C2:1; + unsigned char S4C2:1; + unsigned char S5C2:1; + unsigned char S6C2:1; + unsigned char S7C2:1; + }; +} __LCDDATA6_bits_t; +extern volatile __LCDDATA6_bits_t __at(LCDDATA6_ADDR) LCDDATA6_bits; + +#ifndef NO_BIT_DEFINES +#define SEG0COM2 LCDDATA6_bits.SEG0COM2 +#define S0C2 LCDDATA6_bits.S0C2 +#define SEG1COM2 LCDDATA6_bits.SEG1COM2 +#define S1C2 LCDDATA6_bits.S1C2 +#define SEG2COM2 LCDDATA6_bits.SEG2COM2 +#define S2C2 LCDDATA6_bits.S2C2 +#define SEG3COM2 LCDDATA6_bits.SEG3COM2 +#define S3C2 LCDDATA6_bits.S3C2 +#define SEG4COM2 LCDDATA6_bits.SEG4COM2 +#define S4C2 LCDDATA6_bits.S4C2 +#define SEG5COM2 LCDDATA6_bits.SEG5COM2 +#define S5C2 LCDDATA6_bits.S5C2 +#define SEG6COM2 LCDDATA6_bits.SEG6COM2 +#define S6C2 LCDDATA6_bits.S6C2 +#define SEG7COM2 LCDDATA6_bits.SEG7COM2 +#define S7C2 LCDDATA6_bits.S7C2 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA7 bits -------------------- +typedef union { + struct { + unsigned char SEG8COM2:1; + unsigned char SEG9COM2:1; + unsigned char SEG10COM2:1; + unsigned char SEG11COM2:1; + unsigned char SEG12COM2:1; + unsigned char SEG13COM2:1; + unsigned char SEG14COM2:1; + unsigned char SEG15COM2:1; + }; + struct { + unsigned char S8C2:1; + unsigned char S9C2:1; + unsigned char S10C2:1; + unsigned char S11C2:1; + unsigned char S12C2:1; + unsigned char S13C2:1; + unsigned char S14C2:1; + unsigned char S15C2:1; + }; +} __LCDDATA7_bits_t; +extern volatile __LCDDATA7_bits_t __at(LCDDATA7_ADDR) LCDDATA7_bits; + +#ifndef NO_BIT_DEFINES +#define SEG8COM2 LCDDATA7_bits.SEG8COM2 +#define S8C2 LCDDATA7_bits.S8C2 +#define SEG9COM2 LCDDATA7_bits.SEG9COM2 +#define S9C2 LCDDATA7_bits.S9C2 +#define SEG10COM2 LCDDATA7_bits.SEG10COM2 +#define S10C2 LCDDATA7_bits.S10C2 +#define SEG11COM2 LCDDATA7_bits.SEG11COM2 +#define S11C2 LCDDATA7_bits.S11C2 +#define SEG12COM2 LCDDATA7_bits.SEG12COM2 +#define S12C2 LCDDATA7_bits.S12C2 +#define SEG13COM2 LCDDATA7_bits.SEG13COM2 +#define S13C2 LCDDATA7_bits.S13C2 +#define SEG14COM2 LCDDATA7_bits.SEG14COM2 +#define S14C2 LCDDATA7_bits.S14C2 +#define SEG15COM2 LCDDATA7_bits.SEG15COM2 +#define S15C2 LCDDATA7_bits.S15C2 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA9 bits -------------------- +typedef union { + struct { + unsigned char SEG0COM3:1; + unsigned char SEG1COM3:1; + unsigned char SEG2COM3:1; + unsigned char SEG3COM3:1; + unsigned char SEG4COM3:1; + unsigned char SEG5COM3:1; + unsigned char SEG6COM3:1; + unsigned char SEG7COM3:1; + }; + struct { + unsigned char S0C3:1; + unsigned char S1C3:1; + unsigned char S2C3:1; + unsigned char S3C3:1; + unsigned char S4C3:1; + unsigned char S5C3:1; + unsigned char S6C3:1; + unsigned char S7C3:1; + }; +} __LCDDATA9_bits_t; +extern volatile __LCDDATA9_bits_t __at(LCDDATA9_ADDR) LCDDATA9_bits; + +#ifndef NO_BIT_DEFINES +#define SEG0COM3 LCDDATA9_bits.SEG0COM3 +#define S0C3 LCDDATA9_bits.S0C3 +#define SEG1COM3 LCDDATA9_bits.SEG1COM3 +#define S1C3 LCDDATA9_bits.S1C3 +#define SEG2COM3 LCDDATA9_bits.SEG2COM3 +#define S2C3 LCDDATA9_bits.S2C3 +#define SEG3COM3 LCDDATA9_bits.SEG3COM3 +#define S3C3 LCDDATA9_bits.S3C3 +#define SEG4COM3 LCDDATA9_bits.SEG4COM3 +#define S4C3 LCDDATA9_bits.S4C3 +#define SEG5COM3 LCDDATA9_bits.SEG5COM3 +#define S5C3 LCDDATA9_bits.S5C3 +#define SEG6COM3 LCDDATA9_bits.SEG6COM3 +#define S6C3 LCDDATA9_bits.S6C3 +#define SEG7COM3 LCDDATA9_bits.SEG7COM3 +#define S7C3 LCDDATA9_bits.S7C3 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDPS bits -------------------- +typedef union { + struct { + unsigned char LP0:1; + unsigned char LP1:1; + unsigned char LP2:1; + unsigned char LP3:1; + unsigned char WA:1; + unsigned char LCDA:1; + unsigned char BIASMD:1; + unsigned char WFT:1; + }; +} __LCDPS_bits_t; +extern volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits; + +#ifndef NO_BIT_DEFINES +#define LP0 LCDPS_bits.LP0 +#define LP1 LCDPS_bits.LP1 +#define LP2 LCDPS_bits.LP2 +#define LP3 LCDPS_bits.LP3 +#define WA LCDPS_bits.WA +#define LCDA LCDPS_bits.LCDA +#define BIASMD LCDPS_bits.BIASMD +#define WFT LCDPS_bits.WFT +#endif /* NO_BIT_DEFINES */ + +// ----- LCDSE0 bits -------------------- +typedef union { + struct { + unsigned char SE0:1; + unsigned char SE1:1; + unsigned char SE2:1; + unsigned char SE3:1; + unsigned char SE4:1; + unsigned char SE5:1; + unsigned char SE6:1; + unsigned char SE7:1; + }; + struct { + unsigned char SEGEN0:1; + unsigned char SEGEN1:1; + unsigned char SEGEN2:1; + unsigned char SEGEN3:1; + unsigned char SEGEN4:1; + unsigned char SEGEN5:1; + unsigned char SEGEN6:1; + unsigned char SEGEN7:1; + }; +} __LCDSE0_bits_t; +extern volatile __LCDSE0_bits_t __at(LCDSE0_ADDR) LCDSE0_bits; + +#ifndef NO_BIT_DEFINES +#define SE0 LCDSE0_bits.SE0 +#define SEGEN0 LCDSE0_bits.SEGEN0 +#define SE1 LCDSE0_bits.SE1 +#define SEGEN1 LCDSE0_bits.SEGEN1 +#define SE2 LCDSE0_bits.SE2 +#define SEGEN2 LCDSE0_bits.SEGEN2 +#define SE3 LCDSE0_bits.SE3 +#define SEGEN3 LCDSE0_bits.SEGEN3 +#define SE4 LCDSE0_bits.SE4 +#define SEGEN4 LCDSE0_bits.SEGEN4 +#define SE5 LCDSE0_bits.SE5 +#define SEGEN5 LCDSE0_bits.SEGEN5 +#define SE6 LCDSE0_bits.SE6 +#define SEGEN6 LCDSE0_bits.SEGEN6 +#define SE7 LCDSE0_bits.SE7 +#define SEGEN7 LCDSE0_bits.SEGEN7 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDSE1 bits -------------------- +typedef union { + struct { + unsigned char SE8:1; + unsigned char SE9:1; + unsigned char SE10:1; + unsigned char SE11:1; + unsigned char SE12:1; + unsigned char SE13:1; + unsigned char SE14:1; + unsigned char SE15:1; + }; + struct { + unsigned char SEGEN8:1; + unsigned char SEGEN9:1; + unsigned char SEGEN10:1; + unsigned char SEGEN11:1; + unsigned char SEGEN12:1; + unsigned char SEGEN13:1; + unsigned char SEGEN14:1; + unsigned char SEGEN15:1; + }; +} __LCDSE1_bits_t; +extern volatile __LCDSE1_bits_t __at(LCDSE1_ADDR) LCDSE1_bits; + +#ifndef NO_BIT_DEFINES +#define SE8 LCDSE1_bits.SE8 +#define SEGEN8 LCDSE1_bits.SEGEN8 +#define SE9 LCDSE1_bits.SE9 +#define SEGEN9 LCDSE1_bits.SEGEN9 +#define SE10 LCDSE1_bits.SE10 +#define SEGEN10 LCDSE1_bits.SEGEN10 +#define SE11 LCDSE1_bits.SE11 +#define SEGEN11 LCDSE1_bits.SEGEN11 +#define SE12 LCDSE1_bits.SE12 +#define SEGEN12 LCDSE1_bits.SEGEN12 +#define SE13 LCDSE1_bits.SE13 +#define SEGEN13 LCDSE1_bits.SEGEN13 +#define SE14 LCDSE1_bits.SE14 +#define SEGEN14 LCDSE1_bits.SEGEN14 +#define SE15 LCDSE1_bits.SE15 +#define SEGEN15 LCDSE1_bits.SEGEN15 +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LVDL0:1; + unsigned char LVDL1:1; + unsigned char LVDL2:1; + unsigned char :1; + unsigned char LVDEN:1; + unsigned char IRVST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LVDL0 LVDCON_bits.LVDL0 +#define LVDL1 LVDCON_bits.LVDL1 +#define LVDL2 LVDCON_bits.LVDL2 +#define LVDEN LVDCON_bits.LVDEN +#define IRVST LVDCON_bits.IRVST +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char SBOREN:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define SBOREN PCON_bits.SBOREN +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char EEIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char LVDIE:1; + unsigned char :1; + unsigned char LCDIE:1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char OSFIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define LVDIE PIE2_bits.LVDIE +#define LCDIE PIE2_bits.LCDIE +#define C1IE PIE2_bits.C1IE +#define C2IE PIE2_bits.C2IE +#define OSFIE PIE2_bits.OSFIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char EEIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char LVDIF:1; + unsigned char :1; + unsigned char LCDIF:1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char OSFIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define LVDIF PIR2_bits.LVDIF +#define LCDIF PIR2_bits.LCDIF +#define C1IF PIR2_bits.C1IF +#define C2IF PIR2_bits.C2IF +#define OSFIF PIR2_bits.OSFIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char T1GE:1; + unsigned char T1GINV:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define T1GE T1CON_bits.T1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char :1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char SWDTE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define SWDTE WDTCON_bits.SWDTE +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- WPU bits -------------------- +typedef union { + struct { + unsigned char WPU0:1; + unsigned char WPU1:1; + unsigned char WPU2:1; + unsigned char WPU3:1; + unsigned char WPU4:1; + unsigned char WPU5:1; + unsigned char WPU6:1; + unsigned char WPU7:1; + }; +} __WPU_bits_t; +extern volatile __WPU_bits_t __at(WPU_ADDR) WPU_bits; + +#ifndef NO_BIT_DEFINES +#define WPU0 WPU_bits.WPU0 +#define WPU1 WPU_bits.WPU1 +#define WPU2 WPU_bits.WPU2 +#define WPU3 WPU_bits.WPU3 +#define WPU4 WPU_bits.WPU4 +#define WPU5 WPU_bits.WPU5 +#define WPU6 WPU_bits.WPU6 +#define WPU7 WPU_bits.WPU7 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUB bits -------------------- +typedef union { + struct { + unsigned char WPUB0:1; + unsigned char WPUB1:1; + unsigned char WPUB2:1; + unsigned char WPUB3:1; + unsigned char WPUB4:1; + unsigned char WPUB5:1; + unsigned char WPUB6:1; + unsigned char WPUB7:1; + }; +} __WPUB_bits_t; +extern volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + +#ifndef NO_BIT_DEFINES +#define WPUB0 WPUB_bits.WPUB0 +#define WPUB1 WPUB_bits.WPUB1 +#define WPUB2 WPUB_bits.WPUB2 +#define WPUB3 WPUB_bits.WPUB3 +#define WPUB4 WPUB_bits.WPUB4 +#define WPUB5 WPUB_bits.WPUB5 +#define WPUB6 WPUB_bits.WPUB6 +#define WPUB7 WPUB_bits.WPUB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f914.h b/device/include/pic/pic16f914.h new file mode 100644 index 0000000..cf401b5 --- /dev/null +++ b/device/include/pic/pic16f914.h @@ -0,0 +1,2467 @@ +// +// Register Declarations for Microchip 16F914 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F914_H +#define P16F914_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define ANSEL_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define WPUB_ADDR 0x0095 +#define WPU_ADDR 0x0095 +#define IOCB_ADDR 0x0096 +#define IOC_ADDR 0x0096 +#define CMCON1_ADDR 0x0097 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define CMCON0_ADDR 0x009C +#define VRCON_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define WDTCON_ADDR 0x0105 +#define LCDCON_ADDR 0x0107 +#define LCDPS_ADDR 0x0108 +#define LVDCON_ADDR 0x0109 +#define EEDATL_ADDR 0x010C +#define EEADRL_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define LCDDATA0_ADDR 0x0110 +#define LCDDATA1_ADDR 0x0111 +#define LCDDATA2_ADDR 0x0112 +#define LCDDATA3_ADDR 0x0113 +#define LCDDATA4_ADDR 0x0114 +#define LCDDATA5_ADDR 0x0115 +#define LCDDATA6_ADDR 0x0116 +#define LCDDATA7_ADDR 0x0117 +#define LCDDATA8_ADDR 0x0118 +#define LCDDATA9_ADDR 0x0119 +#define LCDDATA10_ADDR 0x011A +#define LCDDATA11_ADDR 0x011B +#define LCDSE0_ADDR 0x011C +#define LCDSE1_ADDR 0x011D +#define LCDSE2_ADDR 0x011E +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F914.INC Standard Header File, Version 1.03 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F914 microcontroller. +// These names are taken to match the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F914 +// 2. LIST directive in the source file +// LIST P=PIC16F914 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: +//1.00 06/11/04 Initial Release +//1.01 08/16/04 Added EECON2 +//1.02 05/20/05 Removed EECON2 from badram +//1.03 10/05/05 Correct names of bits in ANSEL, Add EEADRH and EEADRL bit +// definitions + + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F914 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (WPUB_ADDR) WPUB; +extern __sfr __at (WPU_ADDR) WPU; +extern __sfr __at (IOCB_ADDR) IOCB; +extern __sfr __at (IOC_ADDR) IOC; +extern __sfr __at (CMCON1_ADDR) CMCON1; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (CMCON0_ADDR) CMCON0; +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (LCDCON_ADDR) LCDCON; +extern __sfr __at (LCDPS_ADDR) LCDPS; +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (EEDATL_ADDR) EEDATL; +extern __sfr __at (EEADRL_ADDR) EEADRL; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; +extern __sfr __at (LCDDATA0_ADDR) LCDDATA0; +extern __sfr __at (LCDDATA1_ADDR) LCDDATA1; +extern __sfr __at (LCDDATA2_ADDR) LCDDATA2; +extern __sfr __at (LCDDATA3_ADDR) LCDDATA3; +extern __sfr __at (LCDDATA4_ADDR) LCDDATA4; +extern __sfr __at (LCDDATA5_ADDR) LCDDATA5; +extern __sfr __at (LCDDATA6_ADDR) LCDDATA6; +extern __sfr __at (LCDDATA7_ADDR) LCDDATA7; +extern __sfr __at (LCDDATA8_ADDR) LCDDATA8; +extern __sfr __at (LCDDATA9_ADDR) LCDDATA9; +extern __sfr __at (LCDDATA10_ADDR) LCDDATA10; +extern __sfr __at (LCDDATA11_ADDR) LCDDATA11; +extern __sfr __at (LCDSE0_ADDR) LCDSE0; +extern __sfr __at (LCDSE1_ADDR) LCDSE1; +extern __sfr __at (LCDSE2_ADDR) LCDSE2; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits ------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + + +//----- ANSEL Bits --------------------------------------------------------- + + + +//----- SSPSTAT Bits ------------------------------------------------------- + + + +//----- WPUB Bits ------------------------------------------------------- + + +//----- WPU Bits ------------------------------------------------------- + + + +//----- IOCB Bits ------------------------------------------------------- + + + +//----- IOC Bits ------------------------------------------------------- + + + +//----- CMCON1 Bits -------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + + +//----- CMCON0 Bits --------------------------------------------------------- + + +//----- VRCON Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- LCDCON Bits -------------------------------------------------------- + + +//----- LCDPS Bits --------------------------------------------------------- + + +//----- LVDCON Bits -------------------------------------------------------- + + +//----- LCDDATA0 Bits ------------------------------------------------------- + + + +//----- LCDDATA1 Bits ------------------------------------------------------- + + + +//----- LCDDATA2 Bits ------------------------------------------------------- + + + +//----- LCDDATA3 Bits ------------------------------------------------------- + + + +//----- LCDDATA4 Bits ------------------------------------------------------- + + + +//----- LCDDATA5 Bits ------------------------------------------------------- + + + +//----- LCDDATA6 Bits ------------------------------------------------------- + + + +//----- LCDDATA7 Bits ------------------------------------------------------- + + + +//----- LCDDATA8 Bits ------------------------------------------------------- + + + +//----- LCDDATA9 Bits ------------------------------------------------------- + + + +//----- LCDDATA10 Bits ------------------------------------------------------- + + + +//----- LCDDATA11 Bits ------------------------------------------------------- + + + +//----- LCDSE0 Bits -------------------------------------------------------- + + + +//----- LCDSE1 Bits -------------------------------------------------------- + + + +//----- LCDSE2 Bits -------------------------------------------------------- + + + +//----- EECON1 Bits -------------------------------------------------------- + + +//----- EEADRH Bits -------------------------------------------------------- + + +//----- EEADRL Bits -------------------------------------------------------- + + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'9A'-H'9B' +// __BADRAM H'11F' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'1EF' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CONFIG 0x2007 + +//Configuration Byte 1 Options +#define _DEBUG_ON 0x2FFF +#define _DEBUG_OFF 0x3FFF +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOD_ON 0x3FFF +#define _BOD_NSLEEP 0x3EFF +#define _BOD_SBODEN 0x3DFF +#define _BOD_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_ON 0x3FEF +#define _PWRTE_OFF 0x3FFF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF +#define _INTOSCIO 0x3FFC +#define _INTOSC 0x3FFD +#define _EXTRCIO 0x3FFE +#define _EXTRC 0x3FFF + + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char NOT_DONE:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char ADFM:1; + }; + struct { + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define VCFG0 ADCON0_bits.VCFG0 +#define VCFG1 ADCON0_bits.VCFG1 +#define ADFM ADCON0_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + unsigned char ADCS2:1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define ADCS0 ADCON1_bits.ADCS0 +#define ADCS1 ADCON1_bits.ADCS1 +#define ADCS2 ADCON1_bits.ADCS2 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSEL bits -------------------- +typedef union { + struct { + unsigned char ANS0:1; + unsigned char ANS1:1; + unsigned char ANS2:1; + unsigned char ANS3:1; + unsigned char ANS4:1; + unsigned char ANS5:1; + unsigned char ANS6:1; + unsigned char ANS7:1; + }; + struct { + unsigned char AN0:1; + unsigned char AN1:1; + unsigned char AN2:1; + unsigned char AN3:1; + unsigned char AN4:1; + unsigned char AN5:1; + unsigned char AN6:1; + unsigned char AN7:1; + }; +} __ANSEL_bits_t; +extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; + +#ifndef NO_BIT_DEFINES +#define ANS0 ANSEL_bits.ANS0 +#define AN0 ANSEL_bits.AN0 +#define ANS1 ANSEL_bits.ANS1 +#define AN1 ANSEL_bits.AN1 +#define ANS2 ANSEL_bits.ANS2 +#define AN2 ANSEL_bits.AN2 +#define ANS3 ANSEL_bits.ANS3 +#define AN3 ANSEL_bits.AN3 +#define ANS4 ANSEL_bits.ANS4 +#define AN4 ANSEL_bits.AN4 +#define ANS5 ANSEL_bits.ANS5 +#define AN5 ANSEL_bits.AN5 +#define ANS6 ANSEL_bits.ANS6 +#define AN6 ANSEL_bits.AN6 +#define ANS7 ANSEL_bits.ANS7 +#define AN7 ANSEL_bits.AN7 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON0 bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON0_bits_t; +extern volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON0_bits.CM0 +#define CM1 CMCON0_bits.CM1 +#define CM2 CMCON0_bits.CM2 +#define CIS CMCON0_bits.CIS +#define C1INV CMCON0_bits.C1INV +#define C2INV CMCON0_bits.C2INV +#define C1OUT CMCON0_bits.C1OUT +#define C2OUT CMCON0_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __CMCON1_bits_t; +extern volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CMCON1_bits.C2SYNC +#define T1GSS CMCON1_bits.T1GSS +#endif /* NO_BIT_DEFINES */ + +// ----- EEADRH bits -------------------- +typedef union { + struct { + unsigned char EEADRH0:1; + unsigned char EEADRH1:1; + unsigned char EEADRH2:1; + unsigned char EEADRH3:1; + unsigned char EEADRH4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EEADRH_bits_t; +extern volatile __EEADRH_bits_t __at(EEADRH_ADDR) EEADRH_bits; + +#ifndef NO_BIT_DEFINES +#define EEADRH0 EEADRH_bits.EEADRH0 +#define EEADRH1 EEADRH_bits.EEADRH1 +#define EEADRH2 EEADRH_bits.EEADRH2 +#define EEADRH3 EEADRH_bits.EEADRH3 +#define EEADRH4 EEADRH_bits.EEADRH4 +#endif /* NO_BIT_DEFINES */ + +// ----- EEADRL bits -------------------- +typedef union { + struct { + unsigned char EEADRL0:1; + unsigned char EEADRL1:1; + unsigned char EEADRL2:1; + unsigned char EEADRL3:1; + unsigned char EEADRL4:1; + unsigned char EEADRL5:1; + unsigned char EEADRL6:1; + unsigned char EEADRL7:1; + }; +} __EEADRL_bits_t; +extern volatile __EEADRL_bits_t __at(EEADRL_ADDR) EEADRL_bits; + +#ifndef NO_BIT_DEFINES +#define EEADRL0 EEADRL_bits.EEADRL0 +#define EEADRL1 EEADRL_bits.EEADRL1 +#define EEADRL2 EEADRL_bits.EEADRL2 +#define EEADRL3 EEADRL_bits.EEADRL3 +#define EEADRL4 EEADRL_bits.EEADRL4 +#define EEADRL5 EEADRL_bits.EEADRL5 +#define EEADRL6 EEADRL_bits.EEADRL6 +#define EEADRL7 EEADRL_bits.EEADRL7 +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; + struct { + unsigned char EERD:1; + unsigned char EEWR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define EERD EECON1_bits.EERD +#define WR EECON1_bits.WR +#define EEWR EECON1_bits.EEWR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char TMR0IF:1; + unsigned char :1; + unsigned char :1; + unsigned char TMR0IE:1; + unsigned char :1; + unsigned char :1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOC bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char IOC4:1; + unsigned char IOC5:1; + unsigned char IOC6:1; + unsigned char IOC7:1; + }; +} __IOC_bits_t; +extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; + +#ifndef NO_BIT_DEFINES +#define IOC4 IOC_bits.IOC4 +#define IOC5 IOC_bits.IOC5 +#define IOC6 IOC_bits.IOC6 +#define IOC7 IOC_bits.IOC7 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char IOCB4:1; + unsigned char IOCB5:1; + unsigned char IOCB6:1; + unsigned char IOCB7:1; + }; +} __IOCB_bits_t; +extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; + +#ifndef NO_BIT_DEFINES +#define IOCB4 IOCB_bits.IOCB4 +#define IOCB5 IOCB_bits.IOCB5 +#define IOCB6 IOCB_bits.IOCB6 +#define IOCB7 IOCB_bits.IOCB7 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDCON bits -------------------- +typedef union { + struct { + unsigned char LMUX0:1; + unsigned char LMUX1:1; + unsigned char CS0:1; + unsigned char CS1:1; + unsigned char VLCDEN:1; + unsigned char WERR:1; + unsigned char SLPEN:1; + unsigned char LCDEN:1; + }; +} __LCDCON_bits_t; +extern volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LMUX0 LCDCON_bits.LMUX0 +#define LMUX1 LCDCON_bits.LMUX1 +#define CS0 LCDCON_bits.CS0 +#define CS1 LCDCON_bits.CS1 +#define VLCDEN LCDCON_bits.VLCDEN +#define WERR LCDCON_bits.WERR +#define SLPEN LCDCON_bits.SLPEN +#define LCDEN LCDCON_bits.LCDEN +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA0 bits -------------------- +typedef union { + struct { + unsigned char SEG0COM0:1; + unsigned char SEG1COM0:1; + unsigned char SEG2COM0:1; + unsigned char SEG3COM0:1; + unsigned char SEG4COM0:1; + unsigned char SEG5COM0:1; + unsigned char SEG6COM0:1; + unsigned char SEG7COM0:1; + }; + struct { + unsigned char S0C0:1; + unsigned char S1C0:1; + unsigned char S2C0:1; + unsigned char S3C0:1; + unsigned char S4C0:1; + unsigned char S5C0:1; + unsigned char S6C0:1; + unsigned char S7C0:1; + }; +} __LCDDATA0_bits_t; +extern volatile __LCDDATA0_bits_t __at(LCDDATA0_ADDR) LCDDATA0_bits; + +#ifndef NO_BIT_DEFINES +#define SEG0COM0 LCDDATA0_bits.SEG0COM0 +#define S0C0 LCDDATA0_bits.S0C0 +#define SEG1COM0 LCDDATA0_bits.SEG1COM0 +#define S1C0 LCDDATA0_bits.S1C0 +#define SEG2COM0 LCDDATA0_bits.SEG2COM0 +#define S2C0 LCDDATA0_bits.S2C0 +#define SEG3COM0 LCDDATA0_bits.SEG3COM0 +#define S3C0 LCDDATA0_bits.S3C0 +#define SEG4COM0 LCDDATA0_bits.SEG4COM0 +#define S4C0 LCDDATA0_bits.S4C0 +#define SEG5COM0 LCDDATA0_bits.SEG5COM0 +#define S5C0 LCDDATA0_bits.S5C0 +#define SEG6COM0 LCDDATA0_bits.SEG6COM0 +#define S6C0 LCDDATA0_bits.S6C0 +#define SEG7COM0 LCDDATA0_bits.SEG7COM0 +#define S7C0 LCDDATA0_bits.S7C0 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA1 bits -------------------- +typedef union { + struct { + unsigned char SEG8COM0:1; + unsigned char SEG9COM0:1; + unsigned char SEG10COM0:1; + unsigned char SEG11COM0:1; + unsigned char SEG12COM0:1; + unsigned char SEG13COM0:1; + unsigned char SEG14COM0:1; + unsigned char SEG15COM0:1; + }; + struct { + unsigned char S8C0:1; + unsigned char S9C0:1; + unsigned char S10C0:1; + unsigned char S11C0:1; + unsigned char S12C0:1; + unsigned char S13C0:1; + unsigned char S14C0:1; + unsigned char S15C0:1; + }; +} __LCDDATA1_bits_t; +extern volatile __LCDDATA1_bits_t __at(LCDDATA1_ADDR) LCDDATA1_bits; + +#ifndef NO_BIT_DEFINES +#define SEG8COM0 LCDDATA1_bits.SEG8COM0 +#define S8C0 LCDDATA1_bits.S8C0 +#define SEG9COM0 LCDDATA1_bits.SEG9COM0 +#define S9C0 LCDDATA1_bits.S9C0 +#define SEG10COM0 LCDDATA1_bits.SEG10COM0 +#define S10C0 LCDDATA1_bits.S10C0 +#define SEG11COM0 LCDDATA1_bits.SEG11COM0 +#define S11C0 LCDDATA1_bits.S11C0 +#define SEG12COM0 LCDDATA1_bits.SEG12COM0 +#define S12C0 LCDDATA1_bits.S12C0 +#define SEG13COM0 LCDDATA1_bits.SEG13COM0 +#define S13C0 LCDDATA1_bits.S13C0 +#define SEG14COM0 LCDDATA1_bits.SEG14COM0 +#define S14C0 LCDDATA1_bits.S14C0 +#define SEG15COM0 LCDDATA1_bits.SEG15COM0 +#define S15C0 LCDDATA1_bits.S15C0 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA10 bits -------------------- +typedef union { + struct { + unsigned char SEG8COM3:1; + unsigned char SEG9COM3:1; + unsigned char SEG10COM3:1; + unsigned char SEG11COM3:1; + unsigned char SEG12COM3:1; + unsigned char SEG13COM3:1; + unsigned char SEG14COM3:1; + unsigned char SEG15COM3:1; + }; + struct { + unsigned char S8C3:1; + unsigned char S9C3:1; + unsigned char S10C3:1; + unsigned char S11C3:1; + unsigned char S12C3:1; + unsigned char S13C3:1; + unsigned char S14C3:1; + unsigned char S15C3:1; + }; +} __LCDDATA10_bits_t; +extern volatile __LCDDATA10_bits_t __at(LCDDATA10_ADDR) LCDDATA10_bits; + +#ifndef NO_BIT_DEFINES +#define SEG8COM3 LCDDATA10_bits.SEG8COM3 +#define S8C3 LCDDATA10_bits.S8C3 +#define SEG9COM3 LCDDATA10_bits.SEG9COM3 +#define S9C3 LCDDATA10_bits.S9C3 +#define SEG10COM3 LCDDATA10_bits.SEG10COM3 +#define S10C3 LCDDATA10_bits.S10C3 +#define SEG11COM3 LCDDATA10_bits.SEG11COM3 +#define S11C3 LCDDATA10_bits.S11C3 +#define SEG12COM3 LCDDATA10_bits.SEG12COM3 +#define S12C3 LCDDATA10_bits.S12C3 +#define SEG13COM3 LCDDATA10_bits.SEG13COM3 +#define S13C3 LCDDATA10_bits.S13C3 +#define SEG14COM3 LCDDATA10_bits.SEG14COM3 +#define S14C3 LCDDATA10_bits.S14C3 +#define SEG15COM3 LCDDATA10_bits.SEG15COM3 +#define S15C3 LCDDATA10_bits.S15C3 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA11 bits -------------------- +typedef union { + struct { + unsigned char SEG16COM3:1; + unsigned char SEG17COM3:1; + unsigned char SEG18COM3:1; + unsigned char SEG19COM3:1; + unsigned char SEG20COM3:1; + unsigned char SEG21COM3:1; + unsigned char SEG22COM3:1; + unsigned char SEG23COM3:1; + }; + struct { + unsigned char S16C3:1; + unsigned char S17C3:1; + unsigned char S18C3:1; + unsigned char S19C3:1; + unsigned char S20C3:1; + unsigned char S21C3:1; + unsigned char S22C3:1; + unsigned char S23C3:1; + }; +} __LCDDATA11_bits_t; +extern volatile __LCDDATA11_bits_t __at(LCDDATA11_ADDR) LCDDATA11_bits; + +#ifndef NO_BIT_DEFINES +#define SEG16COM3 LCDDATA11_bits.SEG16COM3 +#define S16C3 LCDDATA11_bits.S16C3 +#define SEG17COM3 LCDDATA11_bits.SEG17COM3 +#define S17C3 LCDDATA11_bits.S17C3 +#define SEG18COM3 LCDDATA11_bits.SEG18COM3 +#define S18C3 LCDDATA11_bits.S18C3 +#define SEG19COM3 LCDDATA11_bits.SEG19COM3 +#define S19C3 LCDDATA11_bits.S19C3 +#define SEG20COM3 LCDDATA11_bits.SEG20COM3 +#define S20C3 LCDDATA11_bits.S20C3 +#define SEG21COM3 LCDDATA11_bits.SEG21COM3 +#define S21C3 LCDDATA11_bits.S21C3 +#define SEG22COM3 LCDDATA11_bits.SEG22COM3 +#define S22C3 LCDDATA11_bits.S22C3 +#define SEG23COM3 LCDDATA11_bits.SEG23COM3 +#define S23C3 LCDDATA11_bits.S23C3 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA2 bits -------------------- +typedef union { + struct { + unsigned char SEG16COM0:1; + unsigned char SEG17COM0:1; + unsigned char SEG18COM0:1; + unsigned char SEG19COM0:1; + unsigned char SEG20COM0:1; + unsigned char SEG21COM0:1; + unsigned char SEG22COM0:1; + unsigned char SEG23COM0:1; + }; + struct { + unsigned char S16C0:1; + unsigned char S17C0:1; + unsigned char S18C0:1; + unsigned char S19C0:1; + unsigned char S20C0:1; + unsigned char S21C0:1; + unsigned char S22C0:1; + unsigned char S23C0:1; + }; +} __LCDDATA2_bits_t; +extern volatile __LCDDATA2_bits_t __at(LCDDATA2_ADDR) LCDDATA2_bits; + +#ifndef NO_BIT_DEFINES +#define SEG16COM0 LCDDATA2_bits.SEG16COM0 +#define S16C0 LCDDATA2_bits.S16C0 +#define SEG17COM0 LCDDATA2_bits.SEG17COM0 +#define S17C0 LCDDATA2_bits.S17C0 +#define SEG18COM0 LCDDATA2_bits.SEG18COM0 +#define S18C0 LCDDATA2_bits.S18C0 +#define SEG19COM0 LCDDATA2_bits.SEG19COM0 +#define S19C0 LCDDATA2_bits.S19C0 +#define SEG20COM0 LCDDATA2_bits.SEG20COM0 +#define S20C0 LCDDATA2_bits.S20C0 +#define SEG21COM0 LCDDATA2_bits.SEG21COM0 +#define S21C0 LCDDATA2_bits.S21C0 +#define SEG22COM0 LCDDATA2_bits.SEG22COM0 +#define S22C0 LCDDATA2_bits.S22C0 +#define SEG23COM0 LCDDATA2_bits.SEG23COM0 +#define S23C0 LCDDATA2_bits.S23C0 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA3 bits -------------------- +typedef union { + struct { + unsigned char SEG0COM1:1; + unsigned char SEG1COM1:1; + unsigned char SEG2COM1:1; + unsigned char SEG3COM1:1; + unsigned char SEG4COM1:1; + unsigned char SEG5COM1:1; + unsigned char SEG6COM1:1; + unsigned char SEG7COM1:1; + }; + struct { + unsigned char S0C1:1; + unsigned char S1C1:1; + unsigned char S2C1:1; + unsigned char S3C1:1; + unsigned char S4C1:1; + unsigned char S5C1:1; + unsigned char S6C1:1; + unsigned char S7C1:1; + }; +} __LCDDATA3_bits_t; +extern volatile __LCDDATA3_bits_t __at(LCDDATA3_ADDR) LCDDATA3_bits; + +#ifndef NO_BIT_DEFINES +#define SEG0COM1 LCDDATA3_bits.SEG0COM1 +#define S0C1 LCDDATA3_bits.S0C1 +#define SEG1COM1 LCDDATA3_bits.SEG1COM1 +#define S1C1 LCDDATA3_bits.S1C1 +#define SEG2COM1 LCDDATA3_bits.SEG2COM1 +#define S2C1 LCDDATA3_bits.S2C1 +#define SEG3COM1 LCDDATA3_bits.SEG3COM1 +#define S3C1 LCDDATA3_bits.S3C1 +#define SEG4COM1 LCDDATA3_bits.SEG4COM1 +#define S4C1 LCDDATA3_bits.S4C1 +#define SEG5COM1 LCDDATA3_bits.SEG5COM1 +#define S5C1 LCDDATA3_bits.S5C1 +#define SEG6COM1 LCDDATA3_bits.SEG6COM1 +#define S6C1 LCDDATA3_bits.S6C1 +#define SEG7COM1 LCDDATA3_bits.SEG7COM1 +#define S7C1 LCDDATA3_bits.S7C1 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA4 bits -------------------- +typedef union { + struct { + unsigned char SEG8COM1:1; + unsigned char SEG9COM1:1; + unsigned char SEG10COM1:1; + unsigned char SEG11COM1:1; + unsigned char SEG12COM1:1; + unsigned char SEG13COM1:1; + unsigned char SEG14COM1:1; + unsigned char SEG15COM1:1; + }; + struct { + unsigned char S8C1:1; + unsigned char S9C1:1; + unsigned char S10C1:1; + unsigned char S11C1:1; + unsigned char S12C1:1; + unsigned char S13C1:1; + unsigned char S14C1:1; + unsigned char S15C1:1; + }; +} __LCDDATA4_bits_t; +extern volatile __LCDDATA4_bits_t __at(LCDDATA4_ADDR) LCDDATA4_bits; + +#ifndef NO_BIT_DEFINES +#define SEG8COM1 LCDDATA4_bits.SEG8COM1 +#define S8C1 LCDDATA4_bits.S8C1 +#define SEG9COM1 LCDDATA4_bits.SEG9COM1 +#define S9C1 LCDDATA4_bits.S9C1 +#define SEG10COM1 LCDDATA4_bits.SEG10COM1 +#define S10C1 LCDDATA4_bits.S10C1 +#define SEG11COM1 LCDDATA4_bits.SEG11COM1 +#define S11C1 LCDDATA4_bits.S11C1 +#define SEG12COM1 LCDDATA4_bits.SEG12COM1 +#define S12C1 LCDDATA4_bits.S12C1 +#define SEG13COM1 LCDDATA4_bits.SEG13COM1 +#define S13C1 LCDDATA4_bits.S13C1 +#define SEG14COM1 LCDDATA4_bits.SEG14COM1 +#define S14C1 LCDDATA4_bits.S14C1 +#define SEG15COM1 LCDDATA4_bits.SEG15COM1 +#define S15C1 LCDDATA4_bits.S15C1 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA5 bits -------------------- +typedef union { + struct { + unsigned char SEG16COM1:1; + unsigned char SEG17COM1:1; + unsigned char SEG18COM1:1; + unsigned char SEG19COM1:1; + unsigned char SEG20COM1:1; + unsigned char SEG21COM1:1; + unsigned char SEG22COM1:1; + unsigned char SEG23COM1:1; + }; + struct { + unsigned char S16C1:1; + unsigned char S17C1:1; + unsigned char S18C1:1; + unsigned char S19C1:1; + unsigned char S20C1:1; + unsigned char S21C1:1; + unsigned char S22C1:1; + unsigned char S23C1:1; + }; +} __LCDDATA5_bits_t; +extern volatile __LCDDATA5_bits_t __at(LCDDATA5_ADDR) LCDDATA5_bits; + +#ifndef NO_BIT_DEFINES +#define SEG16COM1 LCDDATA5_bits.SEG16COM1 +#define S16C1 LCDDATA5_bits.S16C1 +#define SEG17COM1 LCDDATA5_bits.SEG17COM1 +#define S17C1 LCDDATA5_bits.S17C1 +#define SEG18COM1 LCDDATA5_bits.SEG18COM1 +#define S18C1 LCDDATA5_bits.S18C1 +#define SEG19COM1 LCDDATA5_bits.SEG19COM1 +#define S19C1 LCDDATA5_bits.S19C1 +#define SEG20COM1 LCDDATA5_bits.SEG20COM1 +#define S20C1 LCDDATA5_bits.S20C1 +#define SEG21COM1 LCDDATA5_bits.SEG21COM1 +#define S21C1 LCDDATA5_bits.S21C1 +#define SEG22COM1 LCDDATA5_bits.SEG22COM1 +#define S22C1 LCDDATA5_bits.S22C1 +#define SEG23COM1 LCDDATA5_bits.SEG23COM1 +#define S23C1 LCDDATA5_bits.S23C1 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA6 bits -------------------- +typedef union { + struct { + unsigned char SEG0COM2:1; + unsigned char SEG1COM2:1; + unsigned char SEG2COM2:1; + unsigned char SEG3COM2:1; + unsigned char SEG4COM2:1; + unsigned char SEG5COM2:1; + unsigned char SEG6COM2:1; + unsigned char SEG7COM2:1; + }; + struct { + unsigned char S0C2:1; + unsigned char S1C2:1; + unsigned char S2C2:1; + unsigned char S3C2:1; + unsigned char S4C2:1; + unsigned char S5C2:1; + unsigned char S6C2:1; + unsigned char S7C2:1; + }; +} __LCDDATA6_bits_t; +extern volatile __LCDDATA6_bits_t __at(LCDDATA6_ADDR) LCDDATA6_bits; + +#ifndef NO_BIT_DEFINES +#define SEG0COM2 LCDDATA6_bits.SEG0COM2 +#define S0C2 LCDDATA6_bits.S0C2 +#define SEG1COM2 LCDDATA6_bits.SEG1COM2 +#define S1C2 LCDDATA6_bits.S1C2 +#define SEG2COM2 LCDDATA6_bits.SEG2COM2 +#define S2C2 LCDDATA6_bits.S2C2 +#define SEG3COM2 LCDDATA6_bits.SEG3COM2 +#define S3C2 LCDDATA6_bits.S3C2 +#define SEG4COM2 LCDDATA6_bits.SEG4COM2 +#define S4C2 LCDDATA6_bits.S4C2 +#define SEG5COM2 LCDDATA6_bits.SEG5COM2 +#define S5C2 LCDDATA6_bits.S5C2 +#define SEG6COM2 LCDDATA6_bits.SEG6COM2 +#define S6C2 LCDDATA6_bits.S6C2 +#define SEG7COM2 LCDDATA6_bits.SEG7COM2 +#define S7C2 LCDDATA6_bits.S7C2 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA7 bits -------------------- +typedef union { + struct { + unsigned char SEG8COM2:1; + unsigned char SEG9COM2:1; + unsigned char SEG10COM2:1; + unsigned char SEG11COM2:1; + unsigned char SEG12COM2:1; + unsigned char SEG13COM2:1; + unsigned char SEG14COM2:1; + unsigned char SEG15COM2:1; + }; + struct { + unsigned char S8C2:1; + unsigned char S9C2:1; + unsigned char S10C2:1; + unsigned char S11C2:1; + unsigned char S12C2:1; + unsigned char S13C2:1; + unsigned char S14C2:1; + unsigned char S15C2:1; + }; +} __LCDDATA7_bits_t; +extern volatile __LCDDATA7_bits_t __at(LCDDATA7_ADDR) LCDDATA7_bits; + +#ifndef NO_BIT_DEFINES +#define SEG8COM2 LCDDATA7_bits.SEG8COM2 +#define S8C2 LCDDATA7_bits.S8C2 +#define SEG9COM2 LCDDATA7_bits.SEG9COM2 +#define S9C2 LCDDATA7_bits.S9C2 +#define SEG10COM2 LCDDATA7_bits.SEG10COM2 +#define S10C2 LCDDATA7_bits.S10C2 +#define SEG11COM2 LCDDATA7_bits.SEG11COM2 +#define S11C2 LCDDATA7_bits.S11C2 +#define SEG12COM2 LCDDATA7_bits.SEG12COM2 +#define S12C2 LCDDATA7_bits.S12C2 +#define SEG13COM2 LCDDATA7_bits.SEG13COM2 +#define S13C2 LCDDATA7_bits.S13C2 +#define SEG14COM2 LCDDATA7_bits.SEG14COM2 +#define S14C2 LCDDATA7_bits.S14C2 +#define SEG15COM2 LCDDATA7_bits.SEG15COM2 +#define S15C2 LCDDATA7_bits.S15C2 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA8 bits -------------------- +typedef union { + struct { + unsigned char SEG16COM2:1; + unsigned char SEG17COM2:1; + unsigned char SEG18COM2:1; + unsigned char SEG19COM2:1; + unsigned char SEG20COM2:1; + unsigned char SEG21COM2:1; + unsigned char SEG22COM2:1; + unsigned char SEG23COM2:1; + }; + struct { + unsigned char S16C2:1; + unsigned char S17C2:1; + unsigned char S18C2:1; + unsigned char S19C2:1; + unsigned char S20C2:1; + unsigned char S21C2:1; + unsigned char S22C2:1; + unsigned char S23C2:1; + }; +} __LCDDATA8_bits_t; +extern volatile __LCDDATA8_bits_t __at(LCDDATA8_ADDR) LCDDATA8_bits; + +#ifndef NO_BIT_DEFINES +#define SEG16COM2 LCDDATA8_bits.SEG16COM2 +#define S16C2 LCDDATA8_bits.S16C2 +#define SEG17COM2 LCDDATA8_bits.SEG17COM2 +#define S17C2 LCDDATA8_bits.S17C2 +#define SEG18COM2 LCDDATA8_bits.SEG18COM2 +#define S18C2 LCDDATA8_bits.S18C2 +#define SEG19COM2 LCDDATA8_bits.SEG19COM2 +#define S19C2 LCDDATA8_bits.S19C2 +#define SEG20COM2 LCDDATA8_bits.SEG20COM2 +#define S20C2 LCDDATA8_bits.S20C2 +#define SEG21COM2 LCDDATA8_bits.SEG21COM2 +#define S21C2 LCDDATA8_bits.S21C2 +#define SEG22COM2 LCDDATA8_bits.SEG22COM2 +#define S22C2 LCDDATA8_bits.S22C2 +#define SEG23COM2 LCDDATA8_bits.SEG23COM2 +#define S23C2 LCDDATA8_bits.S23C2 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA9 bits -------------------- +typedef union { + struct { + unsigned char SEG0COM3:1; + unsigned char SEG1COM3:1; + unsigned char SEG2COM3:1; + unsigned char SEG3COM3:1; + unsigned char SEG4COM3:1; + unsigned char SEG5COM3:1; + unsigned char SEG6COM3:1; + unsigned char SEG7COM3:1; + }; + struct { + unsigned char S0C3:1; + unsigned char S1C3:1; + unsigned char S2C3:1; + unsigned char S3C3:1; + unsigned char S4C3:1; + unsigned char S5C3:1; + unsigned char S6C3:1; + unsigned char S7C3:1; + }; +} __LCDDATA9_bits_t; +extern volatile __LCDDATA9_bits_t __at(LCDDATA9_ADDR) LCDDATA9_bits; + +#ifndef NO_BIT_DEFINES +#define SEG0COM3 LCDDATA9_bits.SEG0COM3 +#define S0C3 LCDDATA9_bits.S0C3 +#define SEG1COM3 LCDDATA9_bits.SEG1COM3 +#define S1C3 LCDDATA9_bits.S1C3 +#define SEG2COM3 LCDDATA9_bits.SEG2COM3 +#define S2C3 LCDDATA9_bits.S2C3 +#define SEG3COM3 LCDDATA9_bits.SEG3COM3 +#define S3C3 LCDDATA9_bits.S3C3 +#define SEG4COM3 LCDDATA9_bits.SEG4COM3 +#define S4C3 LCDDATA9_bits.S4C3 +#define SEG5COM3 LCDDATA9_bits.SEG5COM3 +#define S5C3 LCDDATA9_bits.S5C3 +#define SEG6COM3 LCDDATA9_bits.SEG6COM3 +#define S6C3 LCDDATA9_bits.S6C3 +#define SEG7COM3 LCDDATA9_bits.SEG7COM3 +#define S7C3 LCDDATA9_bits.S7C3 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDPS bits -------------------- +typedef union { + struct { + unsigned char LP0:1; + unsigned char LP1:1; + unsigned char LP2:1; + unsigned char LP3:1; + unsigned char WA:1; + unsigned char LCDA:1; + unsigned char BIASMD:1; + unsigned char WFT:1; + }; +} __LCDPS_bits_t; +extern volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits; + +#ifndef NO_BIT_DEFINES +#define LP0 LCDPS_bits.LP0 +#define LP1 LCDPS_bits.LP1 +#define LP2 LCDPS_bits.LP2 +#define LP3 LCDPS_bits.LP3 +#define WA LCDPS_bits.WA +#define LCDA LCDPS_bits.LCDA +#define BIASMD LCDPS_bits.BIASMD +#define WFT LCDPS_bits.WFT +#endif /* NO_BIT_DEFINES */ + +// ----- LCDSE0 bits -------------------- +typedef union { + struct { + unsigned char SE0:1; + unsigned char SE1:1; + unsigned char SE2:1; + unsigned char SE3:1; + unsigned char SE4:1; + unsigned char SE5:1; + unsigned char SE6:1; + unsigned char SE7:1; + }; + struct { + unsigned char SEGEN0:1; + unsigned char SEGEN1:1; + unsigned char SEGEN2:1; + unsigned char SEGEN3:1; + unsigned char SEGEN4:1; + unsigned char SEGEN5:1; + unsigned char SEGEN6:1; + unsigned char SEGEN7:1; + }; +} __LCDSE0_bits_t; +extern volatile __LCDSE0_bits_t __at(LCDSE0_ADDR) LCDSE0_bits; + +#ifndef NO_BIT_DEFINES +#define SE0 LCDSE0_bits.SE0 +#define SEGEN0 LCDSE0_bits.SEGEN0 +#define SE1 LCDSE0_bits.SE1 +#define SEGEN1 LCDSE0_bits.SEGEN1 +#define SE2 LCDSE0_bits.SE2 +#define SEGEN2 LCDSE0_bits.SEGEN2 +#define SE3 LCDSE0_bits.SE3 +#define SEGEN3 LCDSE0_bits.SEGEN3 +#define SE4 LCDSE0_bits.SE4 +#define SEGEN4 LCDSE0_bits.SEGEN4 +#define SE5 LCDSE0_bits.SE5 +#define SEGEN5 LCDSE0_bits.SEGEN5 +#define SE6 LCDSE0_bits.SE6 +#define SEGEN6 LCDSE0_bits.SEGEN6 +#define SE7 LCDSE0_bits.SE7 +#define SEGEN7 LCDSE0_bits.SEGEN7 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDSE1 bits -------------------- +typedef union { + struct { + unsigned char SE8:1; + unsigned char SE9:1; + unsigned char SE10:1; + unsigned char SE11:1; + unsigned char SE12:1; + unsigned char SE13:1; + unsigned char SE14:1; + unsigned char SE15:1; + }; + struct { + unsigned char SEGEN8:1; + unsigned char SEGEN9:1; + unsigned char SEGEN10:1; + unsigned char SEGEN11:1; + unsigned char SEGEN12:1; + unsigned char SEGEN13:1; + unsigned char SEGEN14:1; + unsigned char SEGEN15:1; + }; +} __LCDSE1_bits_t; +extern volatile __LCDSE1_bits_t __at(LCDSE1_ADDR) LCDSE1_bits; + +#ifndef NO_BIT_DEFINES +#define SE8 LCDSE1_bits.SE8 +#define SEGEN8 LCDSE1_bits.SEGEN8 +#define SE9 LCDSE1_bits.SE9 +#define SEGEN9 LCDSE1_bits.SEGEN9 +#define SE10 LCDSE1_bits.SE10 +#define SEGEN10 LCDSE1_bits.SEGEN10 +#define SE11 LCDSE1_bits.SE11 +#define SEGEN11 LCDSE1_bits.SEGEN11 +#define SE12 LCDSE1_bits.SE12 +#define SEGEN12 LCDSE1_bits.SEGEN12 +#define SE13 LCDSE1_bits.SE13 +#define SEGEN13 LCDSE1_bits.SEGEN13 +#define SE14 LCDSE1_bits.SE14 +#define SEGEN14 LCDSE1_bits.SEGEN14 +#define SE15 LCDSE1_bits.SE15 +#define SEGEN15 LCDSE1_bits.SEGEN15 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDSE2 bits -------------------- +typedef union { + struct { + unsigned char SE16:1; + unsigned char SE17:1; + unsigned char SE18:1; + unsigned char SE19:1; + unsigned char SE20:1; + unsigned char SE21:1; + unsigned char SE22:1; + unsigned char SE23:1; + }; + struct { + unsigned char SEGEN16:1; + unsigned char SEGEN17:1; + unsigned char SEGEN18:1; + unsigned char SEGEN19:1; + unsigned char SEGEN20:1; + unsigned char SEGEN21:1; + unsigned char SEGEN22:1; + unsigned char SEGEN23:1; + }; +} __LCDSE2_bits_t; +extern volatile __LCDSE2_bits_t __at(LCDSE2_ADDR) LCDSE2_bits; + +#ifndef NO_BIT_DEFINES +#define SE16 LCDSE2_bits.SE16 +#define SEGEN16 LCDSE2_bits.SEGEN16 +#define SE17 LCDSE2_bits.SE17 +#define SEGEN17 LCDSE2_bits.SEGEN17 +#define SE18 LCDSE2_bits.SE18 +#define SEGEN18 LCDSE2_bits.SEGEN18 +#define SE19 LCDSE2_bits.SE19 +#define SEGEN19 LCDSE2_bits.SEGEN19 +#define SE20 LCDSE2_bits.SE20 +#define SEGEN20 LCDSE2_bits.SEGEN20 +#define SE21 LCDSE2_bits.SE21 +#define SEGEN21 LCDSE2_bits.SEGEN21 +#define SE22 LCDSE2_bits.SE22 +#define SEGEN22 LCDSE2_bits.SEGEN22 +#define SE23 LCDSE2_bits.SE23 +#define SEGEN23 LCDSE2_bits.SEGEN23 +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LVDL0:1; + unsigned char LVDL1:1; + unsigned char LVDL2:1; + unsigned char :1; + unsigned char LVDEN:1; + unsigned char IRVST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LVDL0 LVDCON_bits.LVDL0 +#define LVDL1 LVDCON_bits.LVDL1 +#define LVDL2 LVDCON_bits.LVDL2 +#define LVDEN LVDCON_bits.LVDEN +#define IRVST LVDCON_bits.IRVST +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char SBOREN:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define SBOREN PCON_bits.SBOREN +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char EEIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char LVDIE:1; + unsigned char :1; + unsigned char LCDIE:1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char OSFIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define LVDIE PIE2_bits.LVDIE +#define LCDIE PIE2_bits.LCDIE +#define C1IE PIE2_bits.C1IE +#define C2IE PIE2_bits.C2IE +#define OSFIE PIE2_bits.OSFIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char EEIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char LVDIF:1; + unsigned char :1; + unsigned char LCDIF:1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char OSFIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define LVDIF PIR2_bits.LVDIF +#define LCDIF PIR2_bits.LCDIF +#define C1IF PIR2_bits.C1IF +#define C2IF PIR2_bits.C2IF +#define OSFIF PIR2_bits.OSFIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char T1GE:1; + unsigned char T1GINV:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define T1GE T1CON_bits.T1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char :1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char SWDTE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define SWDTE WDTCON_bits.SWDTE +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- WPU bits -------------------- +typedef union { + struct { + unsigned char WPU0:1; + unsigned char WPU1:1; + unsigned char WPU2:1; + unsigned char WPU3:1; + unsigned char WPU4:1; + unsigned char WPU5:1; + unsigned char WPU6:1; + unsigned char WPU7:1; + }; +} __WPU_bits_t; +extern volatile __WPU_bits_t __at(WPU_ADDR) WPU_bits; + +#ifndef NO_BIT_DEFINES +#define WPU0 WPU_bits.WPU0 +#define WPU1 WPU_bits.WPU1 +#define WPU2 WPU_bits.WPU2 +#define WPU3 WPU_bits.WPU3 +#define WPU4 WPU_bits.WPU4 +#define WPU5 WPU_bits.WPU5 +#define WPU6 WPU_bits.WPU6 +#define WPU7 WPU_bits.WPU7 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUB bits -------------------- +typedef union { + struct { + unsigned char WPUB0:1; + unsigned char WPUB1:1; + unsigned char WPUB2:1; + unsigned char WPUB3:1; + unsigned char WPUB4:1; + unsigned char WPUB5:1; + unsigned char WPUB6:1; + unsigned char WPUB7:1; + }; +} __WPUB_bits_t; +extern volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + +#ifndef NO_BIT_DEFINES +#define WPUB0 WPUB_bits.WPUB0 +#define WPUB1 WPUB_bits.WPUB1 +#define WPUB2 WPUB_bits.WPUB2 +#define WPUB3 WPUB_bits.WPUB3 +#define WPUB4 WPUB_bits.WPUB4 +#define WPUB5 WPUB_bits.WPUB5 +#define WPUB6 WPUB_bits.WPUB6 +#define WPUB7 WPUB_bits.WPUB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f916.h b/device/include/pic/pic16f916.h new file mode 100644 index 0000000..bf41e59 --- /dev/null +++ b/device/include/pic/pic16f916.h @@ -0,0 +1,2128 @@ +// +// Register Declarations for Microchip 16F916 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F916_H +#define P16F916_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define ANSEL_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define WPUB_ADDR 0x0095 +#define WPU_ADDR 0x0095 +#define IOCB_ADDR 0x0096 +#define IOC_ADDR 0x0096 +#define CMCON1_ADDR 0x0097 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define CMCON0_ADDR 0x009C +#define VRCON_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define WDTCON_ADDR 0x0105 +#define LCDCON_ADDR 0x0107 +#define LCDPS_ADDR 0x0108 +#define LVDCON_ADDR 0x0109 +#define EEDATL_ADDR 0x010C +#define EEADRL_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define LCDDATA0_ADDR 0x0110 +#define LCDDATA1_ADDR 0x0111 +#define LCDDATA3_ADDR 0x0113 +#define LCDDATA4_ADDR 0x0114 +#define LCDDATA6_ADDR 0x0116 +#define LCDDATA7_ADDR 0x0117 +#define LCDDATA9_ADDR 0x0119 +#define LCDDATA10_ADDR 0x011A +#define LCDSE0_ADDR 0x011C +#define LCDSE1_ADDR 0x011D +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F916.INC Standard Header File, Version 1.04 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F916 microcontroller. +// These names are taken to match the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F916 +// 2. LIST directive in the source file +// LIST P=PIC16F916 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: +//1.00 06/11/04 Initial Release +//1.01 06/18/04 Corrected typo in 'bad ram' section +//1.02 08/16/04 Added EECON2 +//1.03 05/20/05 Removed EECON2 from badram +//1.04 10/05/05 Correct names of bits in ANSEL, Add EEADRH and EEADRL bit +// definitions + + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F916 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (WPUB_ADDR) WPUB; +extern __sfr __at (WPU_ADDR) WPU; +extern __sfr __at (IOCB_ADDR) IOCB; +extern __sfr __at (IOC_ADDR) IOC; +extern __sfr __at (CMCON1_ADDR) CMCON1; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (CMCON0_ADDR) CMCON0; +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (LCDCON_ADDR) LCDCON; +extern __sfr __at (LCDPS_ADDR) LCDPS; +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (EEDATL_ADDR) EEDATL; +extern __sfr __at (EEADRL_ADDR) EEADRL; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; +extern __sfr __at (LCDDATA0_ADDR) LCDDATA0; +extern __sfr __at (LCDDATA1_ADDR) LCDDATA1; +extern __sfr __at (LCDDATA3_ADDR) LCDDATA3; +extern __sfr __at (LCDDATA4_ADDR) LCDDATA4; +extern __sfr __at (LCDDATA6_ADDR) LCDDATA6; +extern __sfr __at (LCDDATA7_ADDR) LCDDATA7; +extern __sfr __at (LCDDATA9_ADDR) LCDDATA9; +extern __sfr __at (LCDDATA10_ADDR) LCDDATA10; +extern __sfr __at (LCDSE0_ADDR) LCDSE0; +extern __sfr __at (LCDSE1_ADDR) LCDSE1; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits ------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + + +//----- ANSEL Bits --------------------------------------------------------- + + + +//----- SSPSTAT Bits ------------------------------------------------------- + + + +//----- WPUB Bits ------------------------------------------------------- + + +//----- WPU Bits ------------------------------------------------------- + + + +//----- IOCB Bits ------------------------------------------------------- + + + +//----- IOC Bits ------------------------------------------------------- + + + +//----- CMCON1 Bits -------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + + +//----- CMCON0 Bits --------------------------------------------------------- + + +//----- VRCON Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- LCDCON Bits -------------------------------------------------------- + + +//----- LCDPS Bits --------------------------------------------------------- + + +//----- LVDCON Bits -------------------------------------------------------- + + +//----- LCDDATA0 Bits ------------------------------------------------------- + + + +//----- LCDDATA1 Bits ------------------------------------------------------- + + + + +//----- LCDDATA3 Bits ------------------------------------------------------- + + + +//----- LCDDATA4 Bits ------------------------------------------------------- + + + + +//----- LCDDATA6 Bits ------------------------------------------------------- + + + +//----- LCDDATA7 Bits ------------------------------------------------------- + + + + +//----- LCDDATA9 Bits ------------------------------------------------------- + + + +//----- LCDDATA10 Bits ------------------------------------------------------- + + + + +//----- LCDSE0 Bits -------------------------------------------------------- + + + +//----- LCDSE1 Bits -------------------------------------------------------- + + + + +//----- EECON1 Bits -------------------------------------------------------- + + +//----- EEADRH Bits -------------------------------------------------------- + + +//----- EEADRL Bits -------------------------------------------------------- + + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'08', H'1B'-H'1D' +// __BADRAM H'88', H'9A'-H'9B' +// __BADRAM H'112', H'115', H'118', H'11B',H'11E'-H'11F' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'18F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CONFIG 0x2007 + +//Configuration Byte 1 Options +#define _DEBUG_ON 0x2FFF +#define _DEBUG_OFF 0x3FFF +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOD_ON 0x3FFF +#define _BOD_NSLEEP 0x3EFF +#define _BOD_SBODEN 0x3DFF +#define _BOD_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_ON 0x3FEF +#define _PWRTE_OFF 0x3FFF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF +#define _INTOSCIO 0x3FFC +#define _INTOSC 0x3FFD +#define _EXTRCIO 0x3FFE +#define _EXTRC 0x3FFF + + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char NOT_DONE:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char ADFM:1; + }; + struct { + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define VCFG0 ADCON0_bits.VCFG0 +#define VCFG1 ADCON0_bits.VCFG1 +#define ADFM ADCON0_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + unsigned char ADCS2:1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define ADCS0 ADCON1_bits.ADCS0 +#define ADCS1 ADCON1_bits.ADCS1 +#define ADCS2 ADCON1_bits.ADCS2 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSEL bits -------------------- +typedef union { + struct { + unsigned char ANS0:1; + unsigned char ANS1:1; + unsigned char ANS2:1; + unsigned char ANS3:1; + unsigned char ANS4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char AN0:1; + unsigned char AN1:1; + unsigned char AN2:1; + unsigned char AN3:1; + unsigned char AN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ANSEL_bits_t; +extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; + +#ifndef NO_BIT_DEFINES +#define ANS0 ANSEL_bits.ANS0 +#define AN0 ANSEL_bits.AN0 +#define ANS1 ANSEL_bits.ANS1 +#define AN1 ANSEL_bits.AN1 +#define ANS2 ANSEL_bits.ANS2 +#define AN2 ANSEL_bits.AN2 +#define ANS3 ANSEL_bits.ANS3 +#define AN3 ANSEL_bits.AN3 +#define ANS4 ANSEL_bits.ANS4 +#define AN4 ANSEL_bits.AN4 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON0 bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON0_bits_t; +extern volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON0_bits.CM0 +#define CM1 CMCON0_bits.CM1 +#define CM2 CMCON0_bits.CM2 +#define CIS CMCON0_bits.CIS +#define C1INV CMCON0_bits.C1INV +#define C2INV CMCON0_bits.C2INV +#define C1OUT CMCON0_bits.C1OUT +#define C2OUT CMCON0_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __CMCON1_bits_t; +extern volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CMCON1_bits.C2SYNC +#define T1GSS CMCON1_bits.T1GSS +#endif /* NO_BIT_DEFINES */ + +// ----- EEADRH bits -------------------- +typedef union { + struct { + unsigned char EEADRH0:1; + unsigned char EEADRH1:1; + unsigned char EEADRH2:1; + unsigned char EEADRH3:1; + unsigned char EEADRH4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EEADRH_bits_t; +extern volatile __EEADRH_bits_t __at(EEADRH_ADDR) EEADRH_bits; + +#ifndef NO_BIT_DEFINES +#define EEADRH0 EEADRH_bits.EEADRH0 +#define EEADRH1 EEADRH_bits.EEADRH1 +#define EEADRH2 EEADRH_bits.EEADRH2 +#define EEADRH3 EEADRH_bits.EEADRH3 +#define EEADRH4 EEADRH_bits.EEADRH4 +#endif /* NO_BIT_DEFINES */ + +// ----- EEADRL bits -------------------- +typedef union { + struct { + unsigned char EEADRL0:1; + unsigned char EEADRL1:1; + unsigned char EEADRL2:1; + unsigned char EEADRL3:1; + unsigned char EEADRL4:1; + unsigned char EEADRL5:1; + unsigned char EEADRL6:1; + unsigned char EEADRL7:1; + }; +} __EEADRL_bits_t; +extern volatile __EEADRL_bits_t __at(EEADRL_ADDR) EEADRL_bits; + +#ifndef NO_BIT_DEFINES +#define EEADRL0 EEADRL_bits.EEADRL0 +#define EEADRL1 EEADRL_bits.EEADRL1 +#define EEADRL2 EEADRL_bits.EEADRL2 +#define EEADRL3 EEADRL_bits.EEADRL3 +#define EEADRL4 EEADRL_bits.EEADRL4 +#define EEADRL5 EEADRL_bits.EEADRL5 +#define EEADRL6 EEADRL_bits.EEADRL6 +#define EEADRL7 EEADRL_bits.EEADRL7 +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; + struct { + unsigned char EERD:1; + unsigned char EEWR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define EERD EECON1_bits.EERD +#define WR EECON1_bits.WR +#define EEWR EECON1_bits.EEWR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char TMR0IF:1; + unsigned char :1; + unsigned char :1; + unsigned char TMR0IE:1; + unsigned char :1; + unsigned char :1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOC bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char IOC4:1; + unsigned char IOC5:1; + unsigned char IOC6:1; + unsigned char IOC7:1; + }; +} __IOC_bits_t; +extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; + +#ifndef NO_BIT_DEFINES +#define IOC4 IOC_bits.IOC4 +#define IOC5 IOC_bits.IOC5 +#define IOC6 IOC_bits.IOC6 +#define IOC7 IOC_bits.IOC7 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char IOCB4:1; + unsigned char IOCB5:1; + unsigned char IOCB6:1; + unsigned char IOCB7:1; + }; +} __IOCB_bits_t; +extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; + +#ifndef NO_BIT_DEFINES +#define IOCB4 IOCB_bits.IOCB4 +#define IOCB5 IOCB_bits.IOCB5 +#define IOCB6 IOCB_bits.IOCB6 +#define IOCB7 IOCB_bits.IOCB7 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDCON bits -------------------- +typedef union { + struct { + unsigned char LMUX0:1; + unsigned char LMUX1:1; + unsigned char CS0:1; + unsigned char CS1:1; + unsigned char VLCDEN:1; + unsigned char WERR:1; + unsigned char SLPEN:1; + unsigned char LCDEN:1; + }; +} __LCDCON_bits_t; +extern volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LMUX0 LCDCON_bits.LMUX0 +#define LMUX1 LCDCON_bits.LMUX1 +#define CS0 LCDCON_bits.CS0 +#define CS1 LCDCON_bits.CS1 +#define VLCDEN LCDCON_bits.VLCDEN +#define WERR LCDCON_bits.WERR +#define SLPEN LCDCON_bits.SLPEN +#define LCDEN LCDCON_bits.LCDEN +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA0 bits -------------------- +typedef union { + struct { + unsigned char SEG0COM0:1; + unsigned char SEG1COM0:1; + unsigned char SEG2COM0:1; + unsigned char SEG3COM0:1; + unsigned char SEG4COM0:1; + unsigned char SEG5COM0:1; + unsigned char SEG6COM0:1; + unsigned char SEG7COM0:1; + }; + struct { + unsigned char S0C0:1; + unsigned char S1C0:1; + unsigned char S2C0:1; + unsigned char S3C0:1; + unsigned char S4C0:1; + unsigned char S5C0:1; + unsigned char S6C0:1; + unsigned char S7C0:1; + }; +} __LCDDATA0_bits_t; +extern volatile __LCDDATA0_bits_t __at(LCDDATA0_ADDR) LCDDATA0_bits; + +#ifndef NO_BIT_DEFINES +#define SEG0COM0 LCDDATA0_bits.SEG0COM0 +#define S0C0 LCDDATA0_bits.S0C0 +#define SEG1COM0 LCDDATA0_bits.SEG1COM0 +#define S1C0 LCDDATA0_bits.S1C0 +#define SEG2COM0 LCDDATA0_bits.SEG2COM0 +#define S2C0 LCDDATA0_bits.S2C0 +#define SEG3COM0 LCDDATA0_bits.SEG3COM0 +#define S3C0 LCDDATA0_bits.S3C0 +#define SEG4COM0 LCDDATA0_bits.SEG4COM0 +#define S4C0 LCDDATA0_bits.S4C0 +#define SEG5COM0 LCDDATA0_bits.SEG5COM0 +#define S5C0 LCDDATA0_bits.S5C0 +#define SEG6COM0 LCDDATA0_bits.SEG6COM0 +#define S6C0 LCDDATA0_bits.S6C0 +#define SEG7COM0 LCDDATA0_bits.SEG7COM0 +#define S7C0 LCDDATA0_bits.S7C0 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA1 bits -------------------- +typedef union { + struct { + unsigned char SEG8COM0:1; + unsigned char SEG9COM0:1; + unsigned char SEG10COM0:1; + unsigned char SEG11COM0:1; + unsigned char SEG12COM0:1; + unsigned char SEG13COM0:1; + unsigned char SEG14COM0:1; + unsigned char SEG15COM0:1; + }; + struct { + unsigned char S8C0:1; + unsigned char S9C0:1; + unsigned char S10C0:1; + unsigned char S11C0:1; + unsigned char S12C0:1; + unsigned char S13C0:1; + unsigned char S14C0:1; + unsigned char S15C0:1; + }; +} __LCDDATA1_bits_t; +extern volatile __LCDDATA1_bits_t __at(LCDDATA1_ADDR) LCDDATA1_bits; + +#ifndef NO_BIT_DEFINES +#define SEG8COM0 LCDDATA1_bits.SEG8COM0 +#define S8C0 LCDDATA1_bits.S8C0 +#define SEG9COM0 LCDDATA1_bits.SEG9COM0 +#define S9C0 LCDDATA1_bits.S9C0 +#define SEG10COM0 LCDDATA1_bits.SEG10COM0 +#define S10C0 LCDDATA1_bits.S10C0 +#define SEG11COM0 LCDDATA1_bits.SEG11COM0 +#define S11C0 LCDDATA1_bits.S11C0 +#define SEG12COM0 LCDDATA1_bits.SEG12COM0 +#define S12C0 LCDDATA1_bits.S12C0 +#define SEG13COM0 LCDDATA1_bits.SEG13COM0 +#define S13C0 LCDDATA1_bits.S13C0 +#define SEG14COM0 LCDDATA1_bits.SEG14COM0 +#define S14C0 LCDDATA1_bits.S14C0 +#define SEG15COM0 LCDDATA1_bits.SEG15COM0 +#define S15C0 LCDDATA1_bits.S15C0 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA10 bits -------------------- +typedef union { + struct { + unsigned char SEG8COM3:1; + unsigned char SEG9COM3:1; + unsigned char SEG10COM3:1; + unsigned char SEG11COM3:1; + unsigned char SEG12COM3:1; + unsigned char SEG13COM3:1; + unsigned char SEG14COM3:1; + unsigned char SEG15COM3:1; + }; + struct { + unsigned char S8C3:1; + unsigned char S9C3:1; + unsigned char S10C3:1; + unsigned char S11C3:1; + unsigned char S12C3:1; + unsigned char S13C3:1; + unsigned char S14C3:1; + unsigned char S15C3:1; + }; +} __LCDDATA10_bits_t; +extern volatile __LCDDATA10_bits_t __at(LCDDATA10_ADDR) LCDDATA10_bits; + +#ifndef NO_BIT_DEFINES +#define SEG8COM3 LCDDATA10_bits.SEG8COM3 +#define S8C3 LCDDATA10_bits.S8C3 +#define SEG9COM3 LCDDATA10_bits.SEG9COM3 +#define S9C3 LCDDATA10_bits.S9C3 +#define SEG10COM3 LCDDATA10_bits.SEG10COM3 +#define S10C3 LCDDATA10_bits.S10C3 +#define SEG11COM3 LCDDATA10_bits.SEG11COM3 +#define S11C3 LCDDATA10_bits.S11C3 +#define SEG12COM3 LCDDATA10_bits.SEG12COM3 +#define S12C3 LCDDATA10_bits.S12C3 +#define SEG13COM3 LCDDATA10_bits.SEG13COM3 +#define S13C3 LCDDATA10_bits.S13C3 +#define SEG14COM3 LCDDATA10_bits.SEG14COM3 +#define S14C3 LCDDATA10_bits.S14C3 +#define SEG15COM3 LCDDATA10_bits.SEG15COM3 +#define S15C3 LCDDATA10_bits.S15C3 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA3 bits -------------------- +typedef union { + struct { + unsigned char SEG0COM1:1; + unsigned char SEG1COM1:1; + unsigned char SEG2COM1:1; + unsigned char SEG3COM1:1; + unsigned char SEG4COM1:1; + unsigned char SEG5COM1:1; + unsigned char SEG6COM1:1; + unsigned char SEG7COM1:1; + }; + struct { + unsigned char S0C1:1; + unsigned char S1C1:1; + unsigned char S2C1:1; + unsigned char S3C1:1; + unsigned char S4C1:1; + unsigned char S5C1:1; + unsigned char S6C1:1; + unsigned char S7C1:1; + }; +} __LCDDATA3_bits_t; +extern volatile __LCDDATA3_bits_t __at(LCDDATA3_ADDR) LCDDATA3_bits; + +#ifndef NO_BIT_DEFINES +#define SEG0COM1 LCDDATA3_bits.SEG0COM1 +#define S0C1 LCDDATA3_bits.S0C1 +#define SEG1COM1 LCDDATA3_bits.SEG1COM1 +#define S1C1 LCDDATA3_bits.S1C1 +#define SEG2COM1 LCDDATA3_bits.SEG2COM1 +#define S2C1 LCDDATA3_bits.S2C1 +#define SEG3COM1 LCDDATA3_bits.SEG3COM1 +#define S3C1 LCDDATA3_bits.S3C1 +#define SEG4COM1 LCDDATA3_bits.SEG4COM1 +#define S4C1 LCDDATA3_bits.S4C1 +#define SEG5COM1 LCDDATA3_bits.SEG5COM1 +#define S5C1 LCDDATA3_bits.S5C1 +#define SEG6COM1 LCDDATA3_bits.SEG6COM1 +#define S6C1 LCDDATA3_bits.S6C1 +#define SEG7COM1 LCDDATA3_bits.SEG7COM1 +#define S7C1 LCDDATA3_bits.S7C1 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA4 bits -------------------- +typedef union { + struct { + unsigned char SEG8COM1:1; + unsigned char SEG9COM1:1; + unsigned char SEG10COM1:1; + unsigned char SEG11COM1:1; + unsigned char SEG12COM1:1; + unsigned char SEG13COM1:1; + unsigned char SEG14COM1:1; + unsigned char SEG15COM1:1; + }; + struct { + unsigned char S8C1:1; + unsigned char S9C1:1; + unsigned char S10C1:1; + unsigned char S11C1:1; + unsigned char S12C1:1; + unsigned char S13C1:1; + unsigned char S14C1:1; + unsigned char S15C1:1; + }; +} __LCDDATA4_bits_t; +extern volatile __LCDDATA4_bits_t __at(LCDDATA4_ADDR) LCDDATA4_bits; + +#ifndef NO_BIT_DEFINES +#define SEG8COM1 LCDDATA4_bits.SEG8COM1 +#define S8C1 LCDDATA4_bits.S8C1 +#define SEG9COM1 LCDDATA4_bits.SEG9COM1 +#define S9C1 LCDDATA4_bits.S9C1 +#define SEG10COM1 LCDDATA4_bits.SEG10COM1 +#define S10C1 LCDDATA4_bits.S10C1 +#define SEG11COM1 LCDDATA4_bits.SEG11COM1 +#define S11C1 LCDDATA4_bits.S11C1 +#define SEG12COM1 LCDDATA4_bits.SEG12COM1 +#define S12C1 LCDDATA4_bits.S12C1 +#define SEG13COM1 LCDDATA4_bits.SEG13COM1 +#define S13C1 LCDDATA4_bits.S13C1 +#define SEG14COM1 LCDDATA4_bits.SEG14COM1 +#define S14C1 LCDDATA4_bits.S14C1 +#define SEG15COM1 LCDDATA4_bits.SEG15COM1 +#define S15C1 LCDDATA4_bits.S15C1 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA6 bits -------------------- +typedef union { + struct { + unsigned char SEG0COM2:1; + unsigned char SEG1COM2:1; + unsigned char SEG2COM2:1; + unsigned char SEG3COM2:1; + unsigned char SEG4COM2:1; + unsigned char SEG5COM2:1; + unsigned char SEG6COM2:1; + unsigned char SEG7COM2:1; + }; + struct { + unsigned char S0C2:1; + unsigned char S1C2:1; + unsigned char S2C2:1; + unsigned char S3C2:1; + unsigned char S4C2:1; + unsigned char S5C2:1; + unsigned char S6C2:1; + unsigned char S7C2:1; + }; +} __LCDDATA6_bits_t; +extern volatile __LCDDATA6_bits_t __at(LCDDATA6_ADDR) LCDDATA6_bits; + +#ifndef NO_BIT_DEFINES +#define SEG0COM2 LCDDATA6_bits.SEG0COM2 +#define S0C2 LCDDATA6_bits.S0C2 +#define SEG1COM2 LCDDATA6_bits.SEG1COM2 +#define S1C2 LCDDATA6_bits.S1C2 +#define SEG2COM2 LCDDATA6_bits.SEG2COM2 +#define S2C2 LCDDATA6_bits.S2C2 +#define SEG3COM2 LCDDATA6_bits.SEG3COM2 +#define S3C2 LCDDATA6_bits.S3C2 +#define SEG4COM2 LCDDATA6_bits.SEG4COM2 +#define S4C2 LCDDATA6_bits.S4C2 +#define SEG5COM2 LCDDATA6_bits.SEG5COM2 +#define S5C2 LCDDATA6_bits.S5C2 +#define SEG6COM2 LCDDATA6_bits.SEG6COM2 +#define S6C2 LCDDATA6_bits.S6C2 +#define SEG7COM2 LCDDATA6_bits.SEG7COM2 +#define S7C2 LCDDATA6_bits.S7C2 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA7 bits -------------------- +typedef union { + struct { + unsigned char SEG8COM2:1; + unsigned char SEG9COM2:1; + unsigned char SEG10COM2:1; + unsigned char SEG11COM2:1; + unsigned char SEG12COM2:1; + unsigned char SEG13COM2:1; + unsigned char SEG14COM2:1; + unsigned char SEG15COM2:1; + }; + struct { + unsigned char S8C2:1; + unsigned char S9C2:1; + unsigned char S10C2:1; + unsigned char S11C2:1; + unsigned char S12C2:1; + unsigned char S13C2:1; + unsigned char S14C2:1; + unsigned char S15C2:1; + }; +} __LCDDATA7_bits_t; +extern volatile __LCDDATA7_bits_t __at(LCDDATA7_ADDR) LCDDATA7_bits; + +#ifndef NO_BIT_DEFINES +#define SEG8COM2 LCDDATA7_bits.SEG8COM2 +#define S8C2 LCDDATA7_bits.S8C2 +#define SEG9COM2 LCDDATA7_bits.SEG9COM2 +#define S9C2 LCDDATA7_bits.S9C2 +#define SEG10COM2 LCDDATA7_bits.SEG10COM2 +#define S10C2 LCDDATA7_bits.S10C2 +#define SEG11COM2 LCDDATA7_bits.SEG11COM2 +#define S11C2 LCDDATA7_bits.S11C2 +#define SEG12COM2 LCDDATA7_bits.SEG12COM2 +#define S12C2 LCDDATA7_bits.S12C2 +#define SEG13COM2 LCDDATA7_bits.SEG13COM2 +#define S13C2 LCDDATA7_bits.S13C2 +#define SEG14COM2 LCDDATA7_bits.SEG14COM2 +#define S14C2 LCDDATA7_bits.S14C2 +#define SEG15COM2 LCDDATA7_bits.SEG15COM2 +#define S15C2 LCDDATA7_bits.S15C2 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA9 bits -------------------- +typedef union { + struct { + unsigned char SEG0COM3:1; + unsigned char SEG1COM3:1; + unsigned char SEG2COM3:1; + unsigned char SEG3COM3:1; + unsigned char SEG4COM3:1; + unsigned char SEG5COM3:1; + unsigned char SEG6COM3:1; + unsigned char SEG7COM3:1; + }; + struct { + unsigned char S0C3:1; + unsigned char S1C3:1; + unsigned char S2C3:1; + unsigned char S3C3:1; + unsigned char S4C3:1; + unsigned char S5C3:1; + unsigned char S6C3:1; + unsigned char S7C3:1; + }; +} __LCDDATA9_bits_t; +extern volatile __LCDDATA9_bits_t __at(LCDDATA9_ADDR) LCDDATA9_bits; + +#ifndef NO_BIT_DEFINES +#define SEG0COM3 LCDDATA9_bits.SEG0COM3 +#define S0C3 LCDDATA9_bits.S0C3 +#define SEG1COM3 LCDDATA9_bits.SEG1COM3 +#define S1C3 LCDDATA9_bits.S1C3 +#define SEG2COM3 LCDDATA9_bits.SEG2COM3 +#define S2C3 LCDDATA9_bits.S2C3 +#define SEG3COM3 LCDDATA9_bits.SEG3COM3 +#define S3C3 LCDDATA9_bits.S3C3 +#define SEG4COM3 LCDDATA9_bits.SEG4COM3 +#define S4C3 LCDDATA9_bits.S4C3 +#define SEG5COM3 LCDDATA9_bits.SEG5COM3 +#define S5C3 LCDDATA9_bits.S5C3 +#define SEG6COM3 LCDDATA9_bits.SEG6COM3 +#define S6C3 LCDDATA9_bits.S6C3 +#define SEG7COM3 LCDDATA9_bits.SEG7COM3 +#define S7C3 LCDDATA9_bits.S7C3 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDPS bits -------------------- +typedef union { + struct { + unsigned char LP0:1; + unsigned char LP1:1; + unsigned char LP2:1; + unsigned char LP3:1; + unsigned char WA:1; + unsigned char LCDA:1; + unsigned char BIASMD:1; + unsigned char WFT:1; + }; +} __LCDPS_bits_t; +extern volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits; + +#ifndef NO_BIT_DEFINES +#define LP0 LCDPS_bits.LP0 +#define LP1 LCDPS_bits.LP1 +#define LP2 LCDPS_bits.LP2 +#define LP3 LCDPS_bits.LP3 +#define WA LCDPS_bits.WA +#define LCDA LCDPS_bits.LCDA +#define BIASMD LCDPS_bits.BIASMD +#define WFT LCDPS_bits.WFT +#endif /* NO_BIT_DEFINES */ + +// ----- LCDSE0 bits -------------------- +typedef union { + struct { + unsigned char SE0:1; + unsigned char SE1:1; + unsigned char SE2:1; + unsigned char SE3:1; + unsigned char SE4:1; + unsigned char SE5:1; + unsigned char SE6:1; + unsigned char SE7:1; + }; + struct { + unsigned char SEGEN0:1; + unsigned char SEGEN1:1; + unsigned char SEGEN2:1; + unsigned char SEGEN3:1; + unsigned char SEGEN4:1; + unsigned char SEGEN5:1; + unsigned char SEGEN6:1; + unsigned char SEGEN7:1; + }; +} __LCDSE0_bits_t; +extern volatile __LCDSE0_bits_t __at(LCDSE0_ADDR) LCDSE0_bits; + +#ifndef NO_BIT_DEFINES +#define SE0 LCDSE0_bits.SE0 +#define SEGEN0 LCDSE0_bits.SEGEN0 +#define SE1 LCDSE0_bits.SE1 +#define SEGEN1 LCDSE0_bits.SEGEN1 +#define SE2 LCDSE0_bits.SE2 +#define SEGEN2 LCDSE0_bits.SEGEN2 +#define SE3 LCDSE0_bits.SE3 +#define SEGEN3 LCDSE0_bits.SEGEN3 +#define SE4 LCDSE0_bits.SE4 +#define SEGEN4 LCDSE0_bits.SEGEN4 +#define SE5 LCDSE0_bits.SE5 +#define SEGEN5 LCDSE0_bits.SEGEN5 +#define SE6 LCDSE0_bits.SE6 +#define SEGEN6 LCDSE0_bits.SEGEN6 +#define SE7 LCDSE0_bits.SE7 +#define SEGEN7 LCDSE0_bits.SEGEN7 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDSE1 bits -------------------- +typedef union { + struct { + unsigned char SE8:1; + unsigned char SE9:1; + unsigned char SE10:1; + unsigned char SE11:1; + unsigned char SE12:1; + unsigned char SE13:1; + unsigned char SE14:1; + unsigned char SE15:1; + }; + struct { + unsigned char SEGEN8:1; + unsigned char SEGEN9:1; + unsigned char SEGEN10:1; + unsigned char SEGEN11:1; + unsigned char SEGEN12:1; + unsigned char SEGEN13:1; + unsigned char SEGEN14:1; + unsigned char SEGEN15:1; + }; +} __LCDSE1_bits_t; +extern volatile __LCDSE1_bits_t __at(LCDSE1_ADDR) LCDSE1_bits; + +#ifndef NO_BIT_DEFINES +#define SE8 LCDSE1_bits.SE8 +#define SEGEN8 LCDSE1_bits.SEGEN8 +#define SE9 LCDSE1_bits.SE9 +#define SEGEN9 LCDSE1_bits.SEGEN9 +#define SE10 LCDSE1_bits.SE10 +#define SEGEN10 LCDSE1_bits.SEGEN10 +#define SE11 LCDSE1_bits.SE11 +#define SEGEN11 LCDSE1_bits.SEGEN11 +#define SE12 LCDSE1_bits.SE12 +#define SEGEN12 LCDSE1_bits.SEGEN12 +#define SE13 LCDSE1_bits.SE13 +#define SEGEN13 LCDSE1_bits.SEGEN13 +#define SE14 LCDSE1_bits.SE14 +#define SEGEN14 LCDSE1_bits.SEGEN14 +#define SE15 LCDSE1_bits.SE15 +#define SEGEN15 LCDSE1_bits.SEGEN15 +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LVDL0:1; + unsigned char LVDL1:1; + unsigned char LVDL2:1; + unsigned char :1; + unsigned char LVDEN:1; + unsigned char IRVST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LVDL0 LVDCON_bits.LVDL0 +#define LVDL1 LVDCON_bits.LVDL1 +#define LVDL2 LVDCON_bits.LVDL2 +#define LVDEN LVDCON_bits.LVDEN +#define IRVST LVDCON_bits.IRVST +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char SBOREN:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define SBOREN PCON_bits.SBOREN +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char EEIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char LVDIE:1; + unsigned char :1; + unsigned char LCDIE:1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char OSFIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define LVDIE PIE2_bits.LVDIE +#define LCDIE PIE2_bits.LCDIE +#define C1IE PIE2_bits.C1IE +#define C2IE PIE2_bits.C2IE +#define OSFIE PIE2_bits.OSFIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char EEIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char LVDIF:1; + unsigned char :1; + unsigned char LCDIF:1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char OSFIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define LVDIF PIR2_bits.LVDIF +#define LCDIF PIR2_bits.LCDIF +#define C1IF PIR2_bits.C1IF +#define C2IF PIR2_bits.C2IF +#define OSFIF PIR2_bits.OSFIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char T1GE:1; + unsigned char T1GINV:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define T1GE T1CON_bits.T1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char :1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char SWDTE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define SWDTE WDTCON_bits.SWDTE +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- WPU bits -------------------- +typedef union { + struct { + unsigned char WPU0:1; + unsigned char WPU1:1; + unsigned char WPU2:1; + unsigned char WPU3:1; + unsigned char WPU4:1; + unsigned char WPU5:1; + unsigned char WPU6:1; + unsigned char WPU7:1; + }; +} __WPU_bits_t; +extern volatile __WPU_bits_t __at(WPU_ADDR) WPU_bits; + +#ifndef NO_BIT_DEFINES +#define WPU0 WPU_bits.WPU0 +#define WPU1 WPU_bits.WPU1 +#define WPU2 WPU_bits.WPU2 +#define WPU3 WPU_bits.WPU3 +#define WPU4 WPU_bits.WPU4 +#define WPU5 WPU_bits.WPU5 +#define WPU6 WPU_bits.WPU6 +#define WPU7 WPU_bits.WPU7 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUB bits -------------------- +typedef union { + struct { + unsigned char WPUB0:1; + unsigned char WPUB1:1; + unsigned char WPUB2:1; + unsigned char WPUB3:1; + unsigned char WPUB4:1; + unsigned char WPUB5:1; + unsigned char WPUB6:1; + unsigned char WPUB7:1; + }; +} __WPUB_bits_t; +extern volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + +#ifndef NO_BIT_DEFINES +#define WPUB0 WPUB_bits.WPUB0 +#define WPUB1 WPUB_bits.WPUB1 +#define WPUB2 WPUB_bits.WPUB2 +#define WPUB3 WPUB_bits.WPUB3 +#define WPUB4 WPUB_bits.WPUB4 +#define WPUB5 WPUB_bits.WPUB5 +#define WPUB6 WPUB_bits.WPUB6 +#define WPUB7 WPUB_bits.WPUB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/pic16f917.h b/device/include/pic/pic16f917.h new file mode 100644 index 0000000..417b693 --- /dev/null +++ b/device/include/pic/pic16f917.h @@ -0,0 +1,2467 @@ +// +// Register Declarations for Microchip 16F917 Processor +// +// +// This header file was automatically generated by: +// +// inc2h.pl V4783 +// +// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved +// +// SDCC is licensed under the GNU Public license (GPL) v2. Note that +// this license covers the code to the compiler and other executables, +// but explicitly does not cover any code or objects generated by sdcc. +// We have not yet decided on a license for the run time libraries, but +// it will not put any requirements on code linked against it. See: +// +// http://www.gnu.org/copyleft/gpl/html +// +// See http://sdcc.sourceforge.net/ for the latest information on sdcc. +// +// +#ifndef P16F917_H +#define P16F917_H + +// +// Register addresses. +// +#define INDF_ADDR 0x0000 +#define TMR0_ADDR 0x0001 +#define PCL_ADDR 0x0002 +#define STATUS_ADDR 0x0003 +#define FSR_ADDR 0x0004 +#define PORTA_ADDR 0x0005 +#define PORTB_ADDR 0x0006 +#define PORTC_ADDR 0x0007 +#define PORTD_ADDR 0x0008 +#define PORTE_ADDR 0x0009 +#define PCLATH_ADDR 0x000A +#define INTCON_ADDR 0x000B +#define PIR1_ADDR 0x000C +#define PIR2_ADDR 0x000D +#define TMR1L_ADDR 0x000E +#define TMR1H_ADDR 0x000F +#define T1CON_ADDR 0x0010 +#define TMR2_ADDR 0x0011 +#define T2CON_ADDR 0x0012 +#define SSPBUF_ADDR 0x0013 +#define SSPCON_ADDR 0x0014 +#define CCPR1L_ADDR 0x0015 +#define CCPR1H_ADDR 0x0016 +#define CCP1CON_ADDR 0x0017 +#define RCSTA_ADDR 0x0018 +#define TXREG_ADDR 0x0019 +#define RCREG_ADDR 0x001A +#define CCPR2L_ADDR 0x001B +#define CCPR2H_ADDR 0x001C +#define CCP2CON_ADDR 0x001D +#define ADRESH_ADDR 0x001E +#define ADCON0_ADDR 0x001F +#define OPTION_REG_ADDR 0x0081 +#define TRISA_ADDR 0x0085 +#define TRISB_ADDR 0x0086 +#define TRISC_ADDR 0x0087 +#define TRISD_ADDR 0x0088 +#define TRISE_ADDR 0x0089 +#define PIE1_ADDR 0x008C +#define PIE2_ADDR 0x008D +#define PCON_ADDR 0x008E +#define OSCCON_ADDR 0x008F +#define OSCTUNE_ADDR 0x0090 +#define ANSEL_ADDR 0x0091 +#define PR2_ADDR 0x0092 +#define SSPADD_ADDR 0x0093 +#define SSPSTAT_ADDR 0x0094 +#define WPUB_ADDR 0x0095 +#define WPU_ADDR 0x0095 +#define IOCB_ADDR 0x0096 +#define IOC_ADDR 0x0096 +#define CMCON1_ADDR 0x0097 +#define TXSTA_ADDR 0x0098 +#define SPBRG_ADDR 0x0099 +#define CMCON0_ADDR 0x009C +#define VRCON_ADDR 0x009D +#define ADRESL_ADDR 0x009E +#define ADCON1_ADDR 0x009F +#define WDTCON_ADDR 0x0105 +#define LCDCON_ADDR 0x0107 +#define LCDPS_ADDR 0x0108 +#define LVDCON_ADDR 0x0109 +#define EEDATL_ADDR 0x010C +#define EEADRL_ADDR 0x010D +#define EEDATH_ADDR 0x010E +#define EEADRH_ADDR 0x010F +#define LCDDATA0_ADDR 0x0110 +#define LCDDATA1_ADDR 0x0111 +#define LCDDATA2_ADDR 0x0112 +#define LCDDATA3_ADDR 0x0113 +#define LCDDATA4_ADDR 0x0114 +#define LCDDATA5_ADDR 0x0115 +#define LCDDATA6_ADDR 0x0116 +#define LCDDATA7_ADDR 0x0117 +#define LCDDATA8_ADDR 0x0118 +#define LCDDATA9_ADDR 0x0119 +#define LCDDATA10_ADDR 0x011A +#define LCDDATA11_ADDR 0x011B +#define LCDSE0_ADDR 0x011C +#define LCDSE1_ADDR 0x011D +#define LCDSE2_ADDR 0x011E +#define EECON1_ADDR 0x018C +#define EECON2_ADDR 0x018D + +// +// Memory organization. +// + + + +// LIST +// P16F917.INC Standard Header File, Version 1.03 Microchip Technology, Inc. +// NOLIST + +// This header file defines configurations, registers, and other useful bits of +// information for the PIC16F917 microcontroller. +// These names are taken to match the data sheets as closely as possible. + +// Note that the processor must be selected before this file is +// included. The processor may be selected the following ways: + +// 1. Command line switch: +// C:\ MPASM MYFILE.ASM /PIC16F917 +// 2. LIST directive in the source file +// LIST P=PIC16F917 +// 3. Processor Type entry in the MPASM full-screen interface + +//========================================================================== +// +// Revision History +// +//========================================================================== + +//Rev: Date: Reason: +//1.00 06/11/04 Initial Release +//1.01 08/16/04 Added EECON2 +//1.02 05/20/05 Removed EECON2 from badram +//1.03 10/05/05 Correct names of bits in ANSEL, Add EEADRH and EEADRL bit +// definitions + + +//========================================================================== +// +// Verify Processor +// +//========================================================================== + +// IFNDEF __16F917 +// MESSG "Processor-header file mismatch. Verify selected processor." +// ENDIF + +//========================================================================== +// +// Register Definitions +// +//========================================================================== + +#define W 0x0000 +#define F 0x0001 + +//----- Register Files------------------------------------------------------ + +extern __sfr __at (INDF_ADDR) INDF; +extern __sfr __at (TMR0_ADDR) TMR0; +extern __sfr __at (PCL_ADDR) PCL; +extern __sfr __at (STATUS_ADDR) STATUS; +extern __sfr __at (FSR_ADDR) FSR; +extern __sfr __at (PORTA_ADDR) PORTA; +extern __sfr __at (PORTB_ADDR) PORTB; +extern __sfr __at (PORTC_ADDR) PORTC; +extern __sfr __at (PORTD_ADDR) PORTD; +extern __sfr __at (PORTE_ADDR) PORTE; +extern __sfr __at (PCLATH_ADDR) PCLATH; +extern __sfr __at (INTCON_ADDR) INTCON; +extern __sfr __at (PIR1_ADDR) PIR1; +extern __sfr __at (PIR2_ADDR) PIR2; +extern __sfr __at (TMR1L_ADDR) TMR1L; +extern __sfr __at (TMR1H_ADDR) TMR1H; +extern __sfr __at (T1CON_ADDR) T1CON; +extern __sfr __at (TMR2_ADDR) TMR2; +extern __sfr __at (T2CON_ADDR) T2CON; +extern __sfr __at (SSPBUF_ADDR) SSPBUF; +extern __sfr __at (SSPCON_ADDR) SSPCON; +extern __sfr __at (CCPR1L_ADDR) CCPR1L; +extern __sfr __at (CCPR1H_ADDR) CCPR1H; +extern __sfr __at (CCP1CON_ADDR) CCP1CON; +extern __sfr __at (RCSTA_ADDR) RCSTA; +extern __sfr __at (TXREG_ADDR) TXREG; +extern __sfr __at (RCREG_ADDR) RCREG; +extern __sfr __at (CCPR2L_ADDR) CCPR2L; +extern __sfr __at (CCPR2H_ADDR) CCPR2H; +extern __sfr __at (CCP2CON_ADDR) CCP2CON; +extern __sfr __at (ADRESH_ADDR) ADRESH; +extern __sfr __at (ADCON0_ADDR) ADCON0; + +extern __sfr __at (OPTION_REG_ADDR) OPTION_REG; +extern __sfr __at (TRISA_ADDR) TRISA; +extern __sfr __at (TRISB_ADDR) TRISB; +extern __sfr __at (TRISC_ADDR) TRISC; +extern __sfr __at (TRISD_ADDR) TRISD; +extern __sfr __at (TRISE_ADDR) TRISE; +extern __sfr __at (PIE1_ADDR) PIE1; +extern __sfr __at (PIE2_ADDR) PIE2; +extern __sfr __at (PCON_ADDR) PCON; +extern __sfr __at (OSCCON_ADDR) OSCCON; +extern __sfr __at (OSCTUNE_ADDR) OSCTUNE; +extern __sfr __at (ANSEL_ADDR) ANSEL; +extern __sfr __at (PR2_ADDR) PR2; +extern __sfr __at (SSPADD_ADDR) SSPADD; +extern __sfr __at (SSPSTAT_ADDR) SSPSTAT; +extern __sfr __at (WPUB_ADDR) WPUB; +extern __sfr __at (WPU_ADDR) WPU; +extern __sfr __at (IOCB_ADDR) IOCB; +extern __sfr __at (IOC_ADDR) IOC; +extern __sfr __at (CMCON1_ADDR) CMCON1; +extern __sfr __at (TXSTA_ADDR) TXSTA; +extern __sfr __at (SPBRG_ADDR) SPBRG; +extern __sfr __at (CMCON0_ADDR) CMCON0; +extern __sfr __at (VRCON_ADDR) VRCON; +extern __sfr __at (ADRESL_ADDR) ADRESL; +extern __sfr __at (ADCON1_ADDR) ADCON1; + +extern __sfr __at (WDTCON_ADDR) WDTCON; +extern __sfr __at (LCDCON_ADDR) LCDCON; +extern __sfr __at (LCDPS_ADDR) LCDPS; +extern __sfr __at (LVDCON_ADDR) LVDCON; +extern __sfr __at (EEDATL_ADDR) EEDATL; +extern __sfr __at (EEADRL_ADDR) EEADRL; +extern __sfr __at (EEDATH_ADDR) EEDATH; +extern __sfr __at (EEADRH_ADDR) EEADRH; +extern __sfr __at (LCDDATA0_ADDR) LCDDATA0; +extern __sfr __at (LCDDATA1_ADDR) LCDDATA1; +extern __sfr __at (LCDDATA2_ADDR) LCDDATA2; +extern __sfr __at (LCDDATA3_ADDR) LCDDATA3; +extern __sfr __at (LCDDATA4_ADDR) LCDDATA4; +extern __sfr __at (LCDDATA5_ADDR) LCDDATA5; +extern __sfr __at (LCDDATA6_ADDR) LCDDATA6; +extern __sfr __at (LCDDATA7_ADDR) LCDDATA7; +extern __sfr __at (LCDDATA8_ADDR) LCDDATA8; +extern __sfr __at (LCDDATA9_ADDR) LCDDATA9; +extern __sfr __at (LCDDATA10_ADDR) LCDDATA10; +extern __sfr __at (LCDDATA11_ADDR) LCDDATA11; +extern __sfr __at (LCDSE0_ADDR) LCDSE0; +extern __sfr __at (LCDSE1_ADDR) LCDSE1; +extern __sfr __at (LCDSE2_ADDR) LCDSE2; + +extern __sfr __at (EECON1_ADDR) EECON1; +extern __sfr __at (EECON2_ADDR) EECON2; + + +//----- STATUS Bits -------------------------------------------------------- + + +//----- INTCON Bits -------------------------------------------------------- + + +//----- PIR1 Bits ---------------------------------------------------------- + + +//----- PIR2 Bits ---------------------------------------------------------- + + +//----- T1CON Bits --------------------------------------------------------- + + +//----- T2CON Bits --------------------------------------------------------- + + +//----- SSPCON Bits -------------------------------------------------------- + + +//----- CCP1CON Bits ------------------------------------------------------- + + +//----- RCSTA Bits --------------------------------------------------------- + + +//----- CCP2CON Bits ------------------------------------------------------- + + +//----- ADCON0 Bits -------------------------------------------------------- + + +//----- OPTION_REG Bits ----------------------------------------------------- + + +//----- PIE1 Bits ---------------------------------------------------------- + + +//----- PIE2 Bits ---------------------------------------------------------- + + +//----- PCON Bits ---------------------------------------------------------- + + +//----- OSCCON Bits ------------------------------------------------------- + + +//----- OSCTUNE Bits ------------------------------------------------------- + + + +//----- ANSEL Bits --------------------------------------------------------- + + + +//----- SSPSTAT Bits ------------------------------------------------------- + + + +//----- WPUB Bits ------------------------------------------------------- + + +//----- WPU Bits ------------------------------------------------------- + + + +//----- IOCB Bits ------------------------------------------------------- + + + +//----- IOC Bits ------------------------------------------------------- + + + +//----- CMCON1 Bits -------------------------------------------------------- + + +//----- TXSTA Bits --------------------------------------------------------- + + + +//----- CMCON0 Bits --------------------------------------------------------- + + +//----- VRCON Bits -------------------------------------------------------- + + +//----- ADCON1 Bits -------------------------------------------------------- + + +//----- WDTCON Bits -------------------------------------------------------- + + +//----- LCDCON Bits -------------------------------------------------------- + + +//----- LCDPS Bits --------------------------------------------------------- + + +//----- LVDCON Bits -------------------------------------------------------- + + +//----- LCDDATA0 Bits ------------------------------------------------------- + + + +//----- LCDDATA1 Bits ------------------------------------------------------- + + + +//----- LCDDATA2 Bits ------------------------------------------------------- + + + +//----- LCDDATA3 Bits ------------------------------------------------------- + + + +//----- LCDDATA4 Bits ------------------------------------------------------- + + + +//----- LCDDATA5 Bits ------------------------------------------------------- + + + +//----- LCDDATA6 Bits ------------------------------------------------------- + + + +//----- LCDDATA7 Bits ------------------------------------------------------- + + + +//----- LCDDATA8 Bits ------------------------------------------------------- + + + +//----- LCDDATA9 Bits ------------------------------------------------------- + + + +//----- LCDDATA10 Bits ------------------------------------------------------- + + + +//----- LCDDATA11 Bits ------------------------------------------------------- + + + +//----- LCDSE0 Bits -------------------------------------------------------- + + + +//----- LCDSE1 Bits -------------------------------------------------------- + + + +//----- LCDSE2 Bits -------------------------------------------------------- + + + +//----- EECON1 Bits -------------------------------------------------------- + + +//----- EEADRH Bits -------------------------------------------------------- + + +//----- EEADRL Bits -------------------------------------------------------- + + + +//========================================================================== +// +// RAM Definition +// +//========================================================================== + +// __MAXRAM H'1FF' +// __BADRAM H'9A'-H'9B' +// __BADRAM H'11F' +// __BADRAM H'185', H'187'-H'189', H'18E'-H'18F' + +//========================================================================== +// +// Configuration Bits +// +//========================================================================== + +#define _CONFIG 0x2007 + +//Configuration Byte 1 Options +#define _DEBUG_ON 0x2FFF +#define _DEBUG_OFF 0x3FFF +#define _FCMEN_ON 0x3FFF +#define _FCMEN_OFF 0x37FF +#define _IESO_ON 0x3FFF +#define _IESO_OFF 0x3BFF +#define _BOD_ON 0x3FFF +#define _BOD_NSLEEP 0x3EFF +#define _BOD_SBODEN 0x3DFF +#define _BOD_OFF 0x3CFF +#define _CPD_ON 0x3F7F +#define _CPD_OFF 0x3FFF +#define _CP_ON 0x3FBF +#define _CP_OFF 0x3FFF +#define _MCLRE_ON 0x3FFF +#define _MCLRE_OFF 0x3FDF +#define _PWRTE_ON 0x3FEF +#define _PWRTE_OFF 0x3FFF +#define _WDT_ON 0x3FFF +#define _WDT_OFF 0x3FF7 +#define _LP_OSC 0x3FF8 +#define _XT_OSC 0x3FF9 +#define _HS_OSC 0x3FFA +#define _EC_OSC 0x3FFB +#define _INTRC_OSC_NOCLKOUT 0x3FFC +#define _INTRC_OSC_CLKOUT 0x3FFD +#define _EXTRC_OSC_NOCLKOUT 0x3FFE +#define _EXTRC_OSC_CLKOUT 0x3FFF +#define _INTOSCIO 0x3FFC +#define _INTOSC 0x3FFD +#define _EXTRCIO 0x3FFE +#define _EXTRC 0x3FFF + + +// LIST + +// ----- ADCON0 bits -------------------- +typedef union { + struct { + unsigned char ADON:1; + unsigned char NOT_DONE:1; + unsigned char CHS0:1; + unsigned char CHS1:1; + unsigned char CHS2:1; + unsigned char VCFG0:1; + unsigned char VCFG1:1; + unsigned char ADFM:1; + }; + struct { + unsigned char :1; + unsigned char GO_DONE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __ADCON0_bits_t; +extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; + +#ifndef NO_BIT_DEFINES +#define ADON ADCON0_bits.ADON +#define NOT_DONE ADCON0_bits.NOT_DONE +#define GO_DONE ADCON0_bits.GO_DONE +#define CHS0 ADCON0_bits.CHS0 +#define CHS1 ADCON0_bits.CHS1 +#define CHS2 ADCON0_bits.CHS2 +#define VCFG0 ADCON0_bits.VCFG0 +#define VCFG1 ADCON0_bits.VCFG1 +#define ADFM ADCON0_bits.ADFM +#endif /* NO_BIT_DEFINES */ + +// ----- ADCON1 bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char ADCS0:1; + unsigned char ADCS1:1; + unsigned char ADCS2:1; + unsigned char :1; + }; +} __ADCON1_bits_t; +extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; + +#ifndef NO_BIT_DEFINES +#define ADCS0 ADCON1_bits.ADCS0 +#define ADCS1 ADCON1_bits.ADCS1 +#define ADCS2 ADCON1_bits.ADCS2 +#endif /* NO_BIT_DEFINES */ + +// ----- ANSEL bits -------------------- +typedef union { + struct { + unsigned char ANS0:1; + unsigned char ANS1:1; + unsigned char ANS2:1; + unsigned char ANS3:1; + unsigned char ANS4:1; + unsigned char ANS5:1; + unsigned char ANS6:1; + unsigned char ANS7:1; + }; + struct { + unsigned char AN0:1; + unsigned char AN1:1; + unsigned char AN2:1; + unsigned char AN3:1; + unsigned char AN4:1; + unsigned char AN5:1; + unsigned char AN6:1; + unsigned char AN7:1; + }; +} __ANSEL_bits_t; +extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; + +#ifndef NO_BIT_DEFINES +#define ANS0 ANSEL_bits.ANS0 +#define AN0 ANSEL_bits.AN0 +#define ANS1 ANSEL_bits.ANS1 +#define AN1 ANSEL_bits.AN1 +#define ANS2 ANSEL_bits.ANS2 +#define AN2 ANSEL_bits.AN2 +#define ANS3 ANSEL_bits.ANS3 +#define AN3 ANSEL_bits.AN3 +#define ANS4 ANSEL_bits.ANS4 +#define AN4 ANSEL_bits.AN4 +#define ANS5 ANSEL_bits.ANS5 +#define AN5 ANSEL_bits.AN5 +#define ANS6 ANSEL_bits.ANS6 +#define AN6 ANSEL_bits.AN6 +#define ANS7 ANSEL_bits.ANS7 +#define AN7 ANSEL_bits.AN7 +#endif /* NO_BIT_DEFINES */ + +// ----- CCP1CON bits -------------------- +typedef union { + struct { + unsigned char CCP1M0:1; + unsigned char CCP1M1:1; + unsigned char CCP1M2:1; + unsigned char CCP1M3:1; + unsigned char CCP1Y:1; + unsigned char CCP1X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP1CON_bits_t; +extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP1M0 CCP1CON_bits.CCP1M0 +#define CCP1M1 CCP1CON_bits.CCP1M1 +#define CCP1M2 CCP1CON_bits.CCP1M2 +#define CCP1M3 CCP1CON_bits.CCP1M3 +#define CCP1Y CCP1CON_bits.CCP1Y +#define CCP1X CCP1CON_bits.CCP1X +#endif /* NO_BIT_DEFINES */ + +// ----- CCP2CON bits -------------------- +typedef union { + struct { + unsigned char CCP2M0:1; + unsigned char CCP2M1:1; + unsigned char CCP2M2:1; + unsigned char CCP2M3:1; + unsigned char CCP2Y:1; + unsigned char CCP2X:1; + unsigned char :1; + unsigned char :1; + }; +} __CCP2CON_bits_t; +extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2M0 CCP2CON_bits.CCP2M0 +#define CCP2M1 CCP2CON_bits.CCP2M1 +#define CCP2M2 CCP2CON_bits.CCP2M2 +#define CCP2M3 CCP2CON_bits.CCP2M3 +#define CCP2Y CCP2CON_bits.CCP2Y +#define CCP2X CCP2CON_bits.CCP2X +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON0 bits -------------------- +typedef union { + struct { + unsigned char CM0:1; + unsigned char CM1:1; + unsigned char CM2:1; + unsigned char CIS:1; + unsigned char C1INV:1; + unsigned char C2INV:1; + unsigned char C1OUT:1; + unsigned char C2OUT:1; + }; +} __CMCON0_bits_t; +extern volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; + +#ifndef NO_BIT_DEFINES +#define CM0 CMCON0_bits.CM0 +#define CM1 CMCON0_bits.CM1 +#define CM2 CMCON0_bits.CM2 +#define CIS CMCON0_bits.CIS +#define C1INV CMCON0_bits.C1INV +#define C2INV CMCON0_bits.C2INV +#define C1OUT CMCON0_bits.C1OUT +#define C2OUT CMCON0_bits.C2OUT +#endif /* NO_BIT_DEFINES */ + +// ----- CMCON1 bits -------------------- +typedef union { + struct { + unsigned char C2SYNC:1; + unsigned char T1GSS:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __CMCON1_bits_t; +extern volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; + +#ifndef NO_BIT_DEFINES +#define C2SYNC CMCON1_bits.C2SYNC +#define T1GSS CMCON1_bits.T1GSS +#endif /* NO_BIT_DEFINES */ + +// ----- EEADRH bits -------------------- +typedef union { + struct { + unsigned char EEADRH0:1; + unsigned char EEADRH1:1; + unsigned char EEADRH2:1; + unsigned char EEADRH3:1; + unsigned char EEADRH4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EEADRH_bits_t; +extern volatile __EEADRH_bits_t __at(EEADRH_ADDR) EEADRH_bits; + +#ifndef NO_BIT_DEFINES +#define EEADRH0 EEADRH_bits.EEADRH0 +#define EEADRH1 EEADRH_bits.EEADRH1 +#define EEADRH2 EEADRH_bits.EEADRH2 +#define EEADRH3 EEADRH_bits.EEADRH3 +#define EEADRH4 EEADRH_bits.EEADRH4 +#endif /* NO_BIT_DEFINES */ + +// ----- EEADRL bits -------------------- +typedef union { + struct { + unsigned char EEADRL0:1; + unsigned char EEADRL1:1; + unsigned char EEADRL2:1; + unsigned char EEADRL3:1; + unsigned char EEADRL4:1; + unsigned char EEADRL5:1; + unsigned char EEADRL6:1; + unsigned char EEADRL7:1; + }; +} __EEADRL_bits_t; +extern volatile __EEADRL_bits_t __at(EEADRL_ADDR) EEADRL_bits; + +#ifndef NO_BIT_DEFINES +#define EEADRL0 EEADRL_bits.EEADRL0 +#define EEADRL1 EEADRL_bits.EEADRL1 +#define EEADRL2 EEADRL_bits.EEADRL2 +#define EEADRL3 EEADRL_bits.EEADRL3 +#define EEADRL4 EEADRL_bits.EEADRL4 +#define EEADRL5 EEADRL_bits.EEADRL5 +#define EEADRL6 EEADRL_bits.EEADRL6 +#define EEADRL7 EEADRL_bits.EEADRL7 +#endif /* NO_BIT_DEFINES */ + +// ----- EECON1 bits -------------------- +typedef union { + struct { + unsigned char RD:1; + unsigned char WR:1; + unsigned char WREN:1; + unsigned char WRERR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char EEPGD:1; + }; + struct { + unsigned char EERD:1; + unsigned char EEWR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __EECON1_bits_t; +extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; + +#ifndef NO_BIT_DEFINES +#define RD EECON1_bits.RD +#define EERD EECON1_bits.EERD +#define WR EECON1_bits.WR +#define EEWR EECON1_bits.EEWR +#define WREN EECON1_bits.WREN +#define WRERR EECON1_bits.WRERR +#define EEPGD EECON1_bits.EEPGD +#endif /* NO_BIT_DEFINES */ + +// ----- INTCON bits -------------------- +typedef union { + struct { + unsigned char RBIF:1; + unsigned char INTF:1; + unsigned char T0IF:1; + unsigned char RBIE:1; + unsigned char INTE:1; + unsigned char T0IE:1; + unsigned char PEIE:1; + unsigned char GIE:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char TMR0IF:1; + unsigned char :1; + unsigned char :1; + unsigned char TMR0IE:1; + unsigned char :1; + unsigned char :1; + }; +} __INTCON_bits_t; +extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; + +#ifndef NO_BIT_DEFINES +#define RBIF INTCON_bits.RBIF +#define INTF INTCON_bits.INTF +#define T0IF INTCON_bits.T0IF +#define TMR0IF INTCON_bits.TMR0IF +#define RBIE INTCON_bits.RBIE +#define INTE INTCON_bits.INTE +#define T0IE INTCON_bits.T0IE +#define TMR0IE INTCON_bits.TMR0IE +#define PEIE INTCON_bits.PEIE +#define GIE INTCON_bits.GIE +#endif /* NO_BIT_DEFINES */ + +// ----- IOC bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char IOC4:1; + unsigned char IOC5:1; + unsigned char IOC6:1; + unsigned char IOC7:1; + }; +} __IOC_bits_t; +extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; + +#ifndef NO_BIT_DEFINES +#define IOC4 IOC_bits.IOC4 +#define IOC5 IOC_bits.IOC5 +#define IOC6 IOC_bits.IOC6 +#define IOC7 IOC_bits.IOC7 +#endif /* NO_BIT_DEFINES */ + +// ----- IOCB bits -------------------- +typedef union { + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char IOCB4:1; + unsigned char IOCB5:1; + unsigned char IOCB6:1; + unsigned char IOCB7:1; + }; +} __IOCB_bits_t; +extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; + +#ifndef NO_BIT_DEFINES +#define IOCB4 IOCB_bits.IOCB4 +#define IOCB5 IOCB_bits.IOCB5 +#define IOCB6 IOCB_bits.IOCB6 +#define IOCB7 IOCB_bits.IOCB7 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDCON bits -------------------- +typedef union { + struct { + unsigned char LMUX0:1; + unsigned char LMUX1:1; + unsigned char CS0:1; + unsigned char CS1:1; + unsigned char VLCDEN:1; + unsigned char WERR:1; + unsigned char SLPEN:1; + unsigned char LCDEN:1; + }; +} __LCDCON_bits_t; +extern volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LMUX0 LCDCON_bits.LMUX0 +#define LMUX1 LCDCON_bits.LMUX1 +#define CS0 LCDCON_bits.CS0 +#define CS1 LCDCON_bits.CS1 +#define VLCDEN LCDCON_bits.VLCDEN +#define WERR LCDCON_bits.WERR +#define SLPEN LCDCON_bits.SLPEN +#define LCDEN LCDCON_bits.LCDEN +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA0 bits -------------------- +typedef union { + struct { + unsigned char SEG0COM0:1; + unsigned char SEG1COM0:1; + unsigned char SEG2COM0:1; + unsigned char SEG3COM0:1; + unsigned char SEG4COM0:1; + unsigned char SEG5COM0:1; + unsigned char SEG6COM0:1; + unsigned char SEG7COM0:1; + }; + struct { + unsigned char S0C0:1; + unsigned char S1C0:1; + unsigned char S2C0:1; + unsigned char S3C0:1; + unsigned char S4C0:1; + unsigned char S5C0:1; + unsigned char S6C0:1; + unsigned char S7C0:1; + }; +} __LCDDATA0_bits_t; +extern volatile __LCDDATA0_bits_t __at(LCDDATA0_ADDR) LCDDATA0_bits; + +#ifndef NO_BIT_DEFINES +#define SEG0COM0 LCDDATA0_bits.SEG0COM0 +#define S0C0 LCDDATA0_bits.S0C0 +#define SEG1COM0 LCDDATA0_bits.SEG1COM0 +#define S1C0 LCDDATA0_bits.S1C0 +#define SEG2COM0 LCDDATA0_bits.SEG2COM0 +#define S2C0 LCDDATA0_bits.S2C0 +#define SEG3COM0 LCDDATA0_bits.SEG3COM0 +#define S3C0 LCDDATA0_bits.S3C0 +#define SEG4COM0 LCDDATA0_bits.SEG4COM0 +#define S4C0 LCDDATA0_bits.S4C0 +#define SEG5COM0 LCDDATA0_bits.SEG5COM0 +#define S5C0 LCDDATA0_bits.S5C0 +#define SEG6COM0 LCDDATA0_bits.SEG6COM0 +#define S6C0 LCDDATA0_bits.S6C0 +#define SEG7COM0 LCDDATA0_bits.SEG7COM0 +#define S7C0 LCDDATA0_bits.S7C0 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA1 bits -------------------- +typedef union { + struct { + unsigned char SEG8COM0:1; + unsigned char SEG9COM0:1; + unsigned char SEG10COM0:1; + unsigned char SEG11COM0:1; + unsigned char SEG12COM0:1; + unsigned char SEG13COM0:1; + unsigned char SEG14COM0:1; + unsigned char SEG15COM0:1; + }; + struct { + unsigned char S8C0:1; + unsigned char S9C0:1; + unsigned char S10C0:1; + unsigned char S11C0:1; + unsigned char S12C0:1; + unsigned char S13C0:1; + unsigned char S14C0:1; + unsigned char S15C0:1; + }; +} __LCDDATA1_bits_t; +extern volatile __LCDDATA1_bits_t __at(LCDDATA1_ADDR) LCDDATA1_bits; + +#ifndef NO_BIT_DEFINES +#define SEG8COM0 LCDDATA1_bits.SEG8COM0 +#define S8C0 LCDDATA1_bits.S8C0 +#define SEG9COM0 LCDDATA1_bits.SEG9COM0 +#define S9C0 LCDDATA1_bits.S9C0 +#define SEG10COM0 LCDDATA1_bits.SEG10COM0 +#define S10C0 LCDDATA1_bits.S10C0 +#define SEG11COM0 LCDDATA1_bits.SEG11COM0 +#define S11C0 LCDDATA1_bits.S11C0 +#define SEG12COM0 LCDDATA1_bits.SEG12COM0 +#define S12C0 LCDDATA1_bits.S12C0 +#define SEG13COM0 LCDDATA1_bits.SEG13COM0 +#define S13C0 LCDDATA1_bits.S13C0 +#define SEG14COM0 LCDDATA1_bits.SEG14COM0 +#define S14C0 LCDDATA1_bits.S14C0 +#define SEG15COM0 LCDDATA1_bits.SEG15COM0 +#define S15C0 LCDDATA1_bits.S15C0 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA10 bits -------------------- +typedef union { + struct { + unsigned char SEG8COM3:1; + unsigned char SEG9COM3:1; + unsigned char SEG10COM3:1; + unsigned char SEG11COM3:1; + unsigned char SEG12COM3:1; + unsigned char SEG13COM3:1; + unsigned char SEG14COM3:1; + unsigned char SEG15COM3:1; + }; + struct { + unsigned char S8C3:1; + unsigned char S9C3:1; + unsigned char S10C3:1; + unsigned char S11C3:1; + unsigned char S12C3:1; + unsigned char S13C3:1; + unsigned char S14C3:1; + unsigned char S15C3:1; + }; +} __LCDDATA10_bits_t; +extern volatile __LCDDATA10_bits_t __at(LCDDATA10_ADDR) LCDDATA10_bits; + +#ifndef NO_BIT_DEFINES +#define SEG8COM3 LCDDATA10_bits.SEG8COM3 +#define S8C3 LCDDATA10_bits.S8C3 +#define SEG9COM3 LCDDATA10_bits.SEG9COM3 +#define S9C3 LCDDATA10_bits.S9C3 +#define SEG10COM3 LCDDATA10_bits.SEG10COM3 +#define S10C3 LCDDATA10_bits.S10C3 +#define SEG11COM3 LCDDATA10_bits.SEG11COM3 +#define S11C3 LCDDATA10_bits.S11C3 +#define SEG12COM3 LCDDATA10_bits.SEG12COM3 +#define S12C3 LCDDATA10_bits.S12C3 +#define SEG13COM3 LCDDATA10_bits.SEG13COM3 +#define S13C3 LCDDATA10_bits.S13C3 +#define SEG14COM3 LCDDATA10_bits.SEG14COM3 +#define S14C3 LCDDATA10_bits.S14C3 +#define SEG15COM3 LCDDATA10_bits.SEG15COM3 +#define S15C3 LCDDATA10_bits.S15C3 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA11 bits -------------------- +typedef union { + struct { + unsigned char SEG16COM3:1; + unsigned char SEG17COM3:1; + unsigned char SEG18COM3:1; + unsigned char SEG19COM3:1; + unsigned char SEG20COM3:1; + unsigned char SEG21COM3:1; + unsigned char SEG22COM3:1; + unsigned char SEG23COM3:1; + }; + struct { + unsigned char S16C3:1; + unsigned char S17C3:1; + unsigned char S18C3:1; + unsigned char S19C3:1; + unsigned char S20C3:1; + unsigned char S21C3:1; + unsigned char S22C3:1; + unsigned char S23C3:1; + }; +} __LCDDATA11_bits_t; +extern volatile __LCDDATA11_bits_t __at(LCDDATA11_ADDR) LCDDATA11_bits; + +#ifndef NO_BIT_DEFINES +#define SEG16COM3 LCDDATA11_bits.SEG16COM3 +#define S16C3 LCDDATA11_bits.S16C3 +#define SEG17COM3 LCDDATA11_bits.SEG17COM3 +#define S17C3 LCDDATA11_bits.S17C3 +#define SEG18COM3 LCDDATA11_bits.SEG18COM3 +#define S18C3 LCDDATA11_bits.S18C3 +#define SEG19COM3 LCDDATA11_bits.SEG19COM3 +#define S19C3 LCDDATA11_bits.S19C3 +#define SEG20COM3 LCDDATA11_bits.SEG20COM3 +#define S20C3 LCDDATA11_bits.S20C3 +#define SEG21COM3 LCDDATA11_bits.SEG21COM3 +#define S21C3 LCDDATA11_bits.S21C3 +#define SEG22COM3 LCDDATA11_bits.SEG22COM3 +#define S22C3 LCDDATA11_bits.S22C3 +#define SEG23COM3 LCDDATA11_bits.SEG23COM3 +#define S23C3 LCDDATA11_bits.S23C3 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA2 bits -------------------- +typedef union { + struct { + unsigned char SEG16COM0:1; + unsigned char SEG17COM0:1; + unsigned char SEG18COM0:1; + unsigned char SEG19COM0:1; + unsigned char SEG20COM0:1; + unsigned char SEG21COM0:1; + unsigned char SEG22COM0:1; + unsigned char SEG23COM0:1; + }; + struct { + unsigned char S16C0:1; + unsigned char S17C0:1; + unsigned char S18C0:1; + unsigned char S19C0:1; + unsigned char S20C0:1; + unsigned char S21C0:1; + unsigned char S22C0:1; + unsigned char S23C0:1; + }; +} __LCDDATA2_bits_t; +extern volatile __LCDDATA2_bits_t __at(LCDDATA2_ADDR) LCDDATA2_bits; + +#ifndef NO_BIT_DEFINES +#define SEG16COM0 LCDDATA2_bits.SEG16COM0 +#define S16C0 LCDDATA2_bits.S16C0 +#define SEG17COM0 LCDDATA2_bits.SEG17COM0 +#define S17C0 LCDDATA2_bits.S17C0 +#define SEG18COM0 LCDDATA2_bits.SEG18COM0 +#define S18C0 LCDDATA2_bits.S18C0 +#define SEG19COM0 LCDDATA2_bits.SEG19COM0 +#define S19C0 LCDDATA2_bits.S19C0 +#define SEG20COM0 LCDDATA2_bits.SEG20COM0 +#define S20C0 LCDDATA2_bits.S20C0 +#define SEG21COM0 LCDDATA2_bits.SEG21COM0 +#define S21C0 LCDDATA2_bits.S21C0 +#define SEG22COM0 LCDDATA2_bits.SEG22COM0 +#define S22C0 LCDDATA2_bits.S22C0 +#define SEG23COM0 LCDDATA2_bits.SEG23COM0 +#define S23C0 LCDDATA2_bits.S23C0 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA3 bits -------------------- +typedef union { + struct { + unsigned char SEG0COM1:1; + unsigned char SEG1COM1:1; + unsigned char SEG2COM1:1; + unsigned char SEG3COM1:1; + unsigned char SEG4COM1:1; + unsigned char SEG5COM1:1; + unsigned char SEG6COM1:1; + unsigned char SEG7COM1:1; + }; + struct { + unsigned char S0C1:1; + unsigned char S1C1:1; + unsigned char S2C1:1; + unsigned char S3C1:1; + unsigned char S4C1:1; + unsigned char S5C1:1; + unsigned char S6C1:1; + unsigned char S7C1:1; + }; +} __LCDDATA3_bits_t; +extern volatile __LCDDATA3_bits_t __at(LCDDATA3_ADDR) LCDDATA3_bits; + +#ifndef NO_BIT_DEFINES +#define SEG0COM1 LCDDATA3_bits.SEG0COM1 +#define S0C1 LCDDATA3_bits.S0C1 +#define SEG1COM1 LCDDATA3_bits.SEG1COM1 +#define S1C1 LCDDATA3_bits.S1C1 +#define SEG2COM1 LCDDATA3_bits.SEG2COM1 +#define S2C1 LCDDATA3_bits.S2C1 +#define SEG3COM1 LCDDATA3_bits.SEG3COM1 +#define S3C1 LCDDATA3_bits.S3C1 +#define SEG4COM1 LCDDATA3_bits.SEG4COM1 +#define S4C1 LCDDATA3_bits.S4C1 +#define SEG5COM1 LCDDATA3_bits.SEG5COM1 +#define S5C1 LCDDATA3_bits.S5C1 +#define SEG6COM1 LCDDATA3_bits.SEG6COM1 +#define S6C1 LCDDATA3_bits.S6C1 +#define SEG7COM1 LCDDATA3_bits.SEG7COM1 +#define S7C1 LCDDATA3_bits.S7C1 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA4 bits -------------------- +typedef union { + struct { + unsigned char SEG8COM1:1; + unsigned char SEG9COM1:1; + unsigned char SEG10COM1:1; + unsigned char SEG11COM1:1; + unsigned char SEG12COM1:1; + unsigned char SEG13COM1:1; + unsigned char SEG14COM1:1; + unsigned char SEG15COM1:1; + }; + struct { + unsigned char S8C1:1; + unsigned char S9C1:1; + unsigned char S10C1:1; + unsigned char S11C1:1; + unsigned char S12C1:1; + unsigned char S13C1:1; + unsigned char S14C1:1; + unsigned char S15C1:1; + }; +} __LCDDATA4_bits_t; +extern volatile __LCDDATA4_bits_t __at(LCDDATA4_ADDR) LCDDATA4_bits; + +#ifndef NO_BIT_DEFINES +#define SEG8COM1 LCDDATA4_bits.SEG8COM1 +#define S8C1 LCDDATA4_bits.S8C1 +#define SEG9COM1 LCDDATA4_bits.SEG9COM1 +#define S9C1 LCDDATA4_bits.S9C1 +#define SEG10COM1 LCDDATA4_bits.SEG10COM1 +#define S10C1 LCDDATA4_bits.S10C1 +#define SEG11COM1 LCDDATA4_bits.SEG11COM1 +#define S11C1 LCDDATA4_bits.S11C1 +#define SEG12COM1 LCDDATA4_bits.SEG12COM1 +#define S12C1 LCDDATA4_bits.S12C1 +#define SEG13COM1 LCDDATA4_bits.SEG13COM1 +#define S13C1 LCDDATA4_bits.S13C1 +#define SEG14COM1 LCDDATA4_bits.SEG14COM1 +#define S14C1 LCDDATA4_bits.S14C1 +#define SEG15COM1 LCDDATA4_bits.SEG15COM1 +#define S15C1 LCDDATA4_bits.S15C1 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA5 bits -------------------- +typedef union { + struct { + unsigned char SEG16COM1:1; + unsigned char SEG17COM1:1; + unsigned char SEG18COM1:1; + unsigned char SEG19COM1:1; + unsigned char SEG20COM1:1; + unsigned char SEG21COM1:1; + unsigned char SEG22COM1:1; + unsigned char SEG23COM1:1; + }; + struct { + unsigned char S16C1:1; + unsigned char S17C1:1; + unsigned char S18C1:1; + unsigned char S19C1:1; + unsigned char S20C1:1; + unsigned char S21C1:1; + unsigned char S22C1:1; + unsigned char S23C1:1; + }; +} __LCDDATA5_bits_t; +extern volatile __LCDDATA5_bits_t __at(LCDDATA5_ADDR) LCDDATA5_bits; + +#ifndef NO_BIT_DEFINES +#define SEG16COM1 LCDDATA5_bits.SEG16COM1 +#define S16C1 LCDDATA5_bits.S16C1 +#define SEG17COM1 LCDDATA5_bits.SEG17COM1 +#define S17C1 LCDDATA5_bits.S17C1 +#define SEG18COM1 LCDDATA5_bits.SEG18COM1 +#define S18C1 LCDDATA5_bits.S18C1 +#define SEG19COM1 LCDDATA5_bits.SEG19COM1 +#define S19C1 LCDDATA5_bits.S19C1 +#define SEG20COM1 LCDDATA5_bits.SEG20COM1 +#define S20C1 LCDDATA5_bits.S20C1 +#define SEG21COM1 LCDDATA5_bits.SEG21COM1 +#define S21C1 LCDDATA5_bits.S21C1 +#define SEG22COM1 LCDDATA5_bits.SEG22COM1 +#define S22C1 LCDDATA5_bits.S22C1 +#define SEG23COM1 LCDDATA5_bits.SEG23COM1 +#define S23C1 LCDDATA5_bits.S23C1 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA6 bits -------------------- +typedef union { + struct { + unsigned char SEG0COM2:1; + unsigned char SEG1COM2:1; + unsigned char SEG2COM2:1; + unsigned char SEG3COM2:1; + unsigned char SEG4COM2:1; + unsigned char SEG5COM2:1; + unsigned char SEG6COM2:1; + unsigned char SEG7COM2:1; + }; + struct { + unsigned char S0C2:1; + unsigned char S1C2:1; + unsigned char S2C2:1; + unsigned char S3C2:1; + unsigned char S4C2:1; + unsigned char S5C2:1; + unsigned char S6C2:1; + unsigned char S7C2:1; + }; +} __LCDDATA6_bits_t; +extern volatile __LCDDATA6_bits_t __at(LCDDATA6_ADDR) LCDDATA6_bits; + +#ifndef NO_BIT_DEFINES +#define SEG0COM2 LCDDATA6_bits.SEG0COM2 +#define S0C2 LCDDATA6_bits.S0C2 +#define SEG1COM2 LCDDATA6_bits.SEG1COM2 +#define S1C2 LCDDATA6_bits.S1C2 +#define SEG2COM2 LCDDATA6_bits.SEG2COM2 +#define S2C2 LCDDATA6_bits.S2C2 +#define SEG3COM2 LCDDATA6_bits.SEG3COM2 +#define S3C2 LCDDATA6_bits.S3C2 +#define SEG4COM2 LCDDATA6_bits.SEG4COM2 +#define S4C2 LCDDATA6_bits.S4C2 +#define SEG5COM2 LCDDATA6_bits.SEG5COM2 +#define S5C2 LCDDATA6_bits.S5C2 +#define SEG6COM2 LCDDATA6_bits.SEG6COM2 +#define S6C2 LCDDATA6_bits.S6C2 +#define SEG7COM2 LCDDATA6_bits.SEG7COM2 +#define S7C2 LCDDATA6_bits.S7C2 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA7 bits -------------------- +typedef union { + struct { + unsigned char SEG8COM2:1; + unsigned char SEG9COM2:1; + unsigned char SEG10COM2:1; + unsigned char SEG11COM2:1; + unsigned char SEG12COM2:1; + unsigned char SEG13COM2:1; + unsigned char SEG14COM2:1; + unsigned char SEG15COM2:1; + }; + struct { + unsigned char S8C2:1; + unsigned char S9C2:1; + unsigned char S10C2:1; + unsigned char S11C2:1; + unsigned char S12C2:1; + unsigned char S13C2:1; + unsigned char S14C2:1; + unsigned char S15C2:1; + }; +} __LCDDATA7_bits_t; +extern volatile __LCDDATA7_bits_t __at(LCDDATA7_ADDR) LCDDATA7_bits; + +#ifndef NO_BIT_DEFINES +#define SEG8COM2 LCDDATA7_bits.SEG8COM2 +#define S8C2 LCDDATA7_bits.S8C2 +#define SEG9COM2 LCDDATA7_bits.SEG9COM2 +#define S9C2 LCDDATA7_bits.S9C2 +#define SEG10COM2 LCDDATA7_bits.SEG10COM2 +#define S10C2 LCDDATA7_bits.S10C2 +#define SEG11COM2 LCDDATA7_bits.SEG11COM2 +#define S11C2 LCDDATA7_bits.S11C2 +#define SEG12COM2 LCDDATA7_bits.SEG12COM2 +#define S12C2 LCDDATA7_bits.S12C2 +#define SEG13COM2 LCDDATA7_bits.SEG13COM2 +#define S13C2 LCDDATA7_bits.S13C2 +#define SEG14COM2 LCDDATA7_bits.SEG14COM2 +#define S14C2 LCDDATA7_bits.S14C2 +#define SEG15COM2 LCDDATA7_bits.SEG15COM2 +#define S15C2 LCDDATA7_bits.S15C2 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA8 bits -------------------- +typedef union { + struct { + unsigned char SEG16COM2:1; + unsigned char SEG17COM2:1; + unsigned char SEG18COM2:1; + unsigned char SEG19COM2:1; + unsigned char SEG20COM2:1; + unsigned char SEG21COM2:1; + unsigned char SEG22COM2:1; + unsigned char SEG23COM2:1; + }; + struct { + unsigned char S16C2:1; + unsigned char S17C2:1; + unsigned char S18C2:1; + unsigned char S19C2:1; + unsigned char S20C2:1; + unsigned char S21C2:1; + unsigned char S22C2:1; + unsigned char S23C2:1; + }; +} __LCDDATA8_bits_t; +extern volatile __LCDDATA8_bits_t __at(LCDDATA8_ADDR) LCDDATA8_bits; + +#ifndef NO_BIT_DEFINES +#define SEG16COM2 LCDDATA8_bits.SEG16COM2 +#define S16C2 LCDDATA8_bits.S16C2 +#define SEG17COM2 LCDDATA8_bits.SEG17COM2 +#define S17C2 LCDDATA8_bits.S17C2 +#define SEG18COM2 LCDDATA8_bits.SEG18COM2 +#define S18C2 LCDDATA8_bits.S18C2 +#define SEG19COM2 LCDDATA8_bits.SEG19COM2 +#define S19C2 LCDDATA8_bits.S19C2 +#define SEG20COM2 LCDDATA8_bits.SEG20COM2 +#define S20C2 LCDDATA8_bits.S20C2 +#define SEG21COM2 LCDDATA8_bits.SEG21COM2 +#define S21C2 LCDDATA8_bits.S21C2 +#define SEG22COM2 LCDDATA8_bits.SEG22COM2 +#define S22C2 LCDDATA8_bits.S22C2 +#define SEG23COM2 LCDDATA8_bits.SEG23COM2 +#define S23C2 LCDDATA8_bits.S23C2 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDDATA9 bits -------------------- +typedef union { + struct { + unsigned char SEG0COM3:1; + unsigned char SEG1COM3:1; + unsigned char SEG2COM3:1; + unsigned char SEG3COM3:1; + unsigned char SEG4COM3:1; + unsigned char SEG5COM3:1; + unsigned char SEG6COM3:1; + unsigned char SEG7COM3:1; + }; + struct { + unsigned char S0C3:1; + unsigned char S1C3:1; + unsigned char S2C3:1; + unsigned char S3C3:1; + unsigned char S4C3:1; + unsigned char S5C3:1; + unsigned char S6C3:1; + unsigned char S7C3:1; + }; +} __LCDDATA9_bits_t; +extern volatile __LCDDATA9_bits_t __at(LCDDATA9_ADDR) LCDDATA9_bits; + +#ifndef NO_BIT_DEFINES +#define SEG0COM3 LCDDATA9_bits.SEG0COM3 +#define S0C3 LCDDATA9_bits.S0C3 +#define SEG1COM3 LCDDATA9_bits.SEG1COM3 +#define S1C3 LCDDATA9_bits.S1C3 +#define SEG2COM3 LCDDATA9_bits.SEG2COM3 +#define S2C3 LCDDATA9_bits.S2C3 +#define SEG3COM3 LCDDATA9_bits.SEG3COM3 +#define S3C3 LCDDATA9_bits.S3C3 +#define SEG4COM3 LCDDATA9_bits.SEG4COM3 +#define S4C3 LCDDATA9_bits.S4C3 +#define SEG5COM3 LCDDATA9_bits.SEG5COM3 +#define S5C3 LCDDATA9_bits.S5C3 +#define SEG6COM3 LCDDATA9_bits.SEG6COM3 +#define S6C3 LCDDATA9_bits.S6C3 +#define SEG7COM3 LCDDATA9_bits.SEG7COM3 +#define S7C3 LCDDATA9_bits.S7C3 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDPS bits -------------------- +typedef union { + struct { + unsigned char LP0:1; + unsigned char LP1:1; + unsigned char LP2:1; + unsigned char LP3:1; + unsigned char WA:1; + unsigned char LCDA:1; + unsigned char BIASMD:1; + unsigned char WFT:1; + }; +} __LCDPS_bits_t; +extern volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits; + +#ifndef NO_BIT_DEFINES +#define LP0 LCDPS_bits.LP0 +#define LP1 LCDPS_bits.LP1 +#define LP2 LCDPS_bits.LP2 +#define LP3 LCDPS_bits.LP3 +#define WA LCDPS_bits.WA +#define LCDA LCDPS_bits.LCDA +#define BIASMD LCDPS_bits.BIASMD +#define WFT LCDPS_bits.WFT +#endif /* NO_BIT_DEFINES */ + +// ----- LCDSE0 bits -------------------- +typedef union { + struct { + unsigned char SE0:1; + unsigned char SE1:1; + unsigned char SE2:1; + unsigned char SE3:1; + unsigned char SE4:1; + unsigned char SE5:1; + unsigned char SE6:1; + unsigned char SE7:1; + }; + struct { + unsigned char SEGEN0:1; + unsigned char SEGEN1:1; + unsigned char SEGEN2:1; + unsigned char SEGEN3:1; + unsigned char SEGEN4:1; + unsigned char SEGEN5:1; + unsigned char SEGEN6:1; + unsigned char SEGEN7:1; + }; +} __LCDSE0_bits_t; +extern volatile __LCDSE0_bits_t __at(LCDSE0_ADDR) LCDSE0_bits; + +#ifndef NO_BIT_DEFINES +#define SE0 LCDSE0_bits.SE0 +#define SEGEN0 LCDSE0_bits.SEGEN0 +#define SE1 LCDSE0_bits.SE1 +#define SEGEN1 LCDSE0_bits.SEGEN1 +#define SE2 LCDSE0_bits.SE2 +#define SEGEN2 LCDSE0_bits.SEGEN2 +#define SE3 LCDSE0_bits.SE3 +#define SEGEN3 LCDSE0_bits.SEGEN3 +#define SE4 LCDSE0_bits.SE4 +#define SEGEN4 LCDSE0_bits.SEGEN4 +#define SE5 LCDSE0_bits.SE5 +#define SEGEN5 LCDSE0_bits.SEGEN5 +#define SE6 LCDSE0_bits.SE6 +#define SEGEN6 LCDSE0_bits.SEGEN6 +#define SE7 LCDSE0_bits.SE7 +#define SEGEN7 LCDSE0_bits.SEGEN7 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDSE1 bits -------------------- +typedef union { + struct { + unsigned char SE8:1; + unsigned char SE9:1; + unsigned char SE10:1; + unsigned char SE11:1; + unsigned char SE12:1; + unsigned char SE13:1; + unsigned char SE14:1; + unsigned char SE15:1; + }; + struct { + unsigned char SEGEN8:1; + unsigned char SEGEN9:1; + unsigned char SEGEN10:1; + unsigned char SEGEN11:1; + unsigned char SEGEN12:1; + unsigned char SEGEN13:1; + unsigned char SEGEN14:1; + unsigned char SEGEN15:1; + }; +} __LCDSE1_bits_t; +extern volatile __LCDSE1_bits_t __at(LCDSE1_ADDR) LCDSE1_bits; + +#ifndef NO_BIT_DEFINES +#define SE8 LCDSE1_bits.SE8 +#define SEGEN8 LCDSE1_bits.SEGEN8 +#define SE9 LCDSE1_bits.SE9 +#define SEGEN9 LCDSE1_bits.SEGEN9 +#define SE10 LCDSE1_bits.SE10 +#define SEGEN10 LCDSE1_bits.SEGEN10 +#define SE11 LCDSE1_bits.SE11 +#define SEGEN11 LCDSE1_bits.SEGEN11 +#define SE12 LCDSE1_bits.SE12 +#define SEGEN12 LCDSE1_bits.SEGEN12 +#define SE13 LCDSE1_bits.SE13 +#define SEGEN13 LCDSE1_bits.SEGEN13 +#define SE14 LCDSE1_bits.SE14 +#define SEGEN14 LCDSE1_bits.SEGEN14 +#define SE15 LCDSE1_bits.SE15 +#define SEGEN15 LCDSE1_bits.SEGEN15 +#endif /* NO_BIT_DEFINES */ + +// ----- LCDSE2 bits -------------------- +typedef union { + struct { + unsigned char SE16:1; + unsigned char SE17:1; + unsigned char SE18:1; + unsigned char SE19:1; + unsigned char SE20:1; + unsigned char SE21:1; + unsigned char SE22:1; + unsigned char SE23:1; + }; + struct { + unsigned char SEGEN16:1; + unsigned char SEGEN17:1; + unsigned char SEGEN18:1; + unsigned char SEGEN19:1; + unsigned char SEGEN20:1; + unsigned char SEGEN21:1; + unsigned char SEGEN22:1; + unsigned char SEGEN23:1; + }; +} __LCDSE2_bits_t; +extern volatile __LCDSE2_bits_t __at(LCDSE2_ADDR) LCDSE2_bits; + +#ifndef NO_BIT_DEFINES +#define SE16 LCDSE2_bits.SE16 +#define SEGEN16 LCDSE2_bits.SEGEN16 +#define SE17 LCDSE2_bits.SE17 +#define SEGEN17 LCDSE2_bits.SEGEN17 +#define SE18 LCDSE2_bits.SE18 +#define SEGEN18 LCDSE2_bits.SEGEN18 +#define SE19 LCDSE2_bits.SE19 +#define SEGEN19 LCDSE2_bits.SEGEN19 +#define SE20 LCDSE2_bits.SE20 +#define SEGEN20 LCDSE2_bits.SEGEN20 +#define SE21 LCDSE2_bits.SE21 +#define SEGEN21 LCDSE2_bits.SEGEN21 +#define SE22 LCDSE2_bits.SE22 +#define SEGEN22 LCDSE2_bits.SEGEN22 +#define SE23 LCDSE2_bits.SE23 +#define SEGEN23 LCDSE2_bits.SEGEN23 +#endif /* NO_BIT_DEFINES */ + +// ----- LVDCON bits -------------------- +typedef union { + struct { + unsigned char LVDL0:1; + unsigned char LVDL1:1; + unsigned char LVDL2:1; + unsigned char :1; + unsigned char LVDEN:1; + unsigned char IRVST:1; + unsigned char :1; + unsigned char :1; + }; +} __LVDCON_bits_t; +extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; + +#ifndef NO_BIT_DEFINES +#define LVDL0 LVDCON_bits.LVDL0 +#define LVDL1 LVDCON_bits.LVDL1 +#define LVDL2 LVDCON_bits.LVDL2 +#define LVDEN LVDCON_bits.LVDEN +#define IRVST LVDCON_bits.IRVST +#endif /* NO_BIT_DEFINES */ + +// ----- OPTION_REG bits -------------------- +typedef union { + struct { + unsigned char PS0:1; + unsigned char PS1:1; + unsigned char PS2:1; + unsigned char PSA:1; + unsigned char T0SE:1; + unsigned char T0CS:1; + unsigned char INTEDG:1; + unsigned char NOT_RBPU:1; + }; +} __OPTION_REG_bits_t; +extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; + +#ifndef NO_BIT_DEFINES +#define PS0 OPTION_REG_bits.PS0 +#define PS1 OPTION_REG_bits.PS1 +#define PS2 OPTION_REG_bits.PS2 +#define PSA OPTION_REG_bits.PSA +#define T0SE OPTION_REG_bits.T0SE +#define T0CS OPTION_REG_bits.T0CS +#define INTEDG OPTION_REG_bits.INTEDG +#define NOT_RBPU OPTION_REG_bits.NOT_RBPU +#endif /* NO_BIT_DEFINES */ + +// ----- OSCCON bits -------------------- +typedef union { + struct { + unsigned char SCS:1; + unsigned char LTS:1; + unsigned char HTS:1; + unsigned char OSTS:1; + unsigned char IRCF0:1; + unsigned char IRCF1:1; + unsigned char IRCF2:1; + unsigned char :1; + }; +} __OSCCON_bits_t; +extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; + +#ifndef NO_BIT_DEFINES +#define SCS OSCCON_bits.SCS +#define LTS OSCCON_bits.LTS +#define HTS OSCCON_bits.HTS +#define OSTS OSCCON_bits.OSTS +#define IRCF0 OSCCON_bits.IRCF0 +#define IRCF1 OSCCON_bits.IRCF1 +#define IRCF2 OSCCON_bits.IRCF2 +#endif /* NO_BIT_DEFINES */ + +// ----- OSCTUNE bits -------------------- +typedef union { + struct { + unsigned char TUN0:1; + unsigned char TUN1:1; + unsigned char TUN2:1; + unsigned char TUN3:1; + unsigned char TUN4:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __OSCTUNE_bits_t; +extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; + +#ifndef NO_BIT_DEFINES +#define TUN0 OSCTUNE_bits.TUN0 +#define TUN1 OSCTUNE_bits.TUN1 +#define TUN2 OSCTUNE_bits.TUN2 +#define TUN3 OSCTUNE_bits.TUN3 +#define TUN4 OSCTUNE_bits.TUN4 +#endif /* NO_BIT_DEFINES */ + +// ----- PCON bits -------------------- +typedef union { + struct { + unsigned char NOT_BO:1; + unsigned char NOT_POR:1; + unsigned char :1; + unsigned char :1; + unsigned char SBOREN:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char NOT_BOR:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PCON_bits_t; +extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; + +#ifndef NO_BIT_DEFINES +#define NOT_BO PCON_bits.NOT_BO +#define NOT_BOR PCON_bits.NOT_BOR +#define NOT_POR PCON_bits.NOT_POR +#define SBOREN PCON_bits.SBOREN +#endif /* NO_BIT_DEFINES */ + +// ----- PIE1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IE:1; + unsigned char TMR2IE:1; + unsigned char CCP1IE:1; + unsigned char SSPIE:1; + unsigned char TXIE:1; + unsigned char RCIE:1; + unsigned char ADIE:1; + unsigned char EEIE:1; + }; +} __PIE1_bits_t; +extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IE PIE1_bits.TMR1IE +#define TMR2IE PIE1_bits.TMR2IE +#define CCP1IE PIE1_bits.CCP1IE +#define SSPIE PIE1_bits.SSPIE +#define TXIE PIE1_bits.TXIE +#define RCIE PIE1_bits.RCIE +#define ADIE PIE1_bits.ADIE +#define EEIE PIE1_bits.EEIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIE2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IE:1; + unsigned char :1; + unsigned char LVDIE:1; + unsigned char :1; + unsigned char LCDIE:1; + unsigned char C1IE:1; + unsigned char C2IE:1; + unsigned char OSFIE:1; + }; +} __PIE2_bits_t; +extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IE PIE2_bits.CCP2IE +#define LVDIE PIE2_bits.LVDIE +#define LCDIE PIE2_bits.LCDIE +#define C1IE PIE2_bits.C1IE +#define C2IE PIE2_bits.C2IE +#define OSFIE PIE2_bits.OSFIE +#endif /* NO_BIT_DEFINES */ + +// ----- PIR1 bits -------------------- +typedef union { + struct { + unsigned char TMR1IF:1; + unsigned char TMR2IF:1; + unsigned char CCP1IF:1; + unsigned char SSPIF:1; + unsigned char TXIF:1; + unsigned char RCIF:1; + unsigned char ADIF:1; + unsigned char EEIF:1; + }; +} __PIR1_bits_t; +extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1IF PIR1_bits.TMR1IF +#define TMR2IF PIR1_bits.TMR2IF +#define CCP1IF PIR1_bits.CCP1IF +#define SSPIF PIR1_bits.SSPIF +#define TXIF PIR1_bits.TXIF +#define RCIF PIR1_bits.RCIF +#define ADIF PIR1_bits.ADIF +#define EEIF PIR1_bits.EEIF +#endif /* NO_BIT_DEFINES */ + +// ----- PIR2 bits -------------------- +typedef union { + struct { + unsigned char CCP2IF:1; + unsigned char :1; + unsigned char LVDIF:1; + unsigned char :1; + unsigned char LCDIF:1; + unsigned char C1IF:1; + unsigned char C2IF:1; + unsigned char OSFIF:1; + }; +} __PIR2_bits_t; +extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; + +#ifndef NO_BIT_DEFINES +#define CCP2IF PIR2_bits.CCP2IF +#define LVDIF PIR2_bits.LVDIF +#define LCDIF PIR2_bits.LCDIF +#define C1IF PIR2_bits.C1IF +#define C2IF PIR2_bits.C2IF +#define OSFIF PIR2_bits.OSFIF +#endif /* NO_BIT_DEFINES */ + +// ----- PORTA bits -------------------- +typedef union { + struct { + unsigned char RA0:1; + unsigned char RA1:1; + unsigned char RA2:1; + unsigned char RA3:1; + unsigned char RA4:1; + unsigned char RA5:1; + unsigned char :1; + unsigned char :1; + }; +} __PORTA_bits_t; +extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; + +#ifndef NO_BIT_DEFINES +#define RA0 PORTA_bits.RA0 +#define RA1 PORTA_bits.RA1 +#define RA2 PORTA_bits.RA2 +#define RA3 PORTA_bits.RA3 +#define RA4 PORTA_bits.RA4 +#define RA5 PORTA_bits.RA5 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTB bits -------------------- +typedef union { + struct { + unsigned char RB0:1; + unsigned char RB1:1; + unsigned char RB2:1; + unsigned char RB3:1; + unsigned char RB4:1; + unsigned char RB5:1; + unsigned char RB6:1; + unsigned char RB7:1; + }; +} __PORTB_bits_t; +extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; + +#ifndef NO_BIT_DEFINES +#define RB0 PORTB_bits.RB0 +#define RB1 PORTB_bits.RB1 +#define RB2 PORTB_bits.RB2 +#define RB3 PORTB_bits.RB3 +#define RB4 PORTB_bits.RB4 +#define RB5 PORTB_bits.RB5 +#define RB6 PORTB_bits.RB6 +#define RB7 PORTB_bits.RB7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTC bits -------------------- +typedef union { + struct { + unsigned char RC0:1; + unsigned char RC1:1; + unsigned char RC2:1; + unsigned char RC3:1; + unsigned char RC4:1; + unsigned char RC5:1; + unsigned char RC6:1; + unsigned char RC7:1; + }; +} __PORTC_bits_t; +extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; + +#ifndef NO_BIT_DEFINES +#define RC0 PORTC_bits.RC0 +#define RC1 PORTC_bits.RC1 +#define RC2 PORTC_bits.RC2 +#define RC3 PORTC_bits.RC3 +#define RC4 PORTC_bits.RC4 +#define RC5 PORTC_bits.RC5 +#define RC6 PORTC_bits.RC6 +#define RC7 PORTC_bits.RC7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTD bits -------------------- +typedef union { + struct { + unsigned char RD0:1; + unsigned char RD1:1; + unsigned char RD2:1; + unsigned char RD3:1; + unsigned char RD4:1; + unsigned char RD5:1; + unsigned char RD6:1; + unsigned char RD7:1; + }; +} __PORTD_bits_t; +extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; + +#ifndef NO_BIT_DEFINES +#define RD0 PORTD_bits.RD0 +#define RD1 PORTD_bits.RD1 +#define RD2 PORTD_bits.RD2 +#define RD3 PORTD_bits.RD3 +#define RD4 PORTD_bits.RD4 +#define RD5 PORTD_bits.RD5 +#define RD6 PORTD_bits.RD6 +#define RD7 PORTD_bits.RD7 +#endif /* NO_BIT_DEFINES */ + +// ----- PORTE bits -------------------- +typedef union { + struct { + unsigned char RE0:1; + unsigned char RE1:1; + unsigned char RE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __PORTE_bits_t; +extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; + +#ifndef NO_BIT_DEFINES +#define RE0 PORTE_bits.RE0 +#define RE1 PORTE_bits.RE1 +#define RE2 PORTE_bits.RE2 +#endif /* NO_BIT_DEFINES */ + +// ----- RCSTA bits -------------------- +typedef union { + struct { + unsigned char RX9D:1; + unsigned char OERR:1; + unsigned char FERR:1; + unsigned char ADDEN:1; + unsigned char CREN:1; + unsigned char SREN:1; + unsigned char RX9:1; + unsigned char SPEN:1; + }; + struct { + unsigned char RCD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC9:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_RC8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char RC8_9:1; + unsigned char :1; + }; +} __RCSTA_bits_t; +extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; + +#ifndef NO_BIT_DEFINES +#define RX9D RCSTA_bits.RX9D +#define RCD8 RCSTA_bits.RCD8 +#define OERR RCSTA_bits.OERR +#define FERR RCSTA_bits.FERR +#define ADDEN RCSTA_bits.ADDEN +#define CREN RCSTA_bits.CREN +#define SREN RCSTA_bits.SREN +#define RX9 RCSTA_bits.RX9 +#define RC9 RCSTA_bits.RC9 +#define NOT_RC8 RCSTA_bits.NOT_RC8 +#define RC8_9 RCSTA_bits.RC8_9 +#define SPEN RCSTA_bits.SPEN +#endif /* NO_BIT_DEFINES */ + +// ----- SSPCON bits -------------------- +typedef union { + struct { + unsigned char SSPM0:1; + unsigned char SSPM1:1; + unsigned char SSPM2:1; + unsigned char SSPM3:1; + unsigned char CKP:1; + unsigned char SSPEN:1; + unsigned char SSPOV:1; + unsigned char WCOL:1; + }; +} __SSPCON_bits_t; +extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; + +#ifndef NO_BIT_DEFINES +#define SSPM0 SSPCON_bits.SSPM0 +#define SSPM1 SSPCON_bits.SSPM1 +#define SSPM2 SSPCON_bits.SSPM2 +#define SSPM3 SSPCON_bits.SSPM3 +#define CKP SSPCON_bits.CKP +#define SSPEN SSPCON_bits.SSPEN +#define SSPOV SSPCON_bits.SSPOV +#define WCOL SSPCON_bits.WCOL +#endif /* NO_BIT_DEFINES */ + +// ----- SSPSTAT bits -------------------- +typedef union { + struct { + unsigned char BF:1; + unsigned char UA:1; + unsigned char R:1; + unsigned char S:1; + unsigned char P:1; + unsigned char D:1; + unsigned char CKE:1; + unsigned char SMP:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char I2C_READ:1; + unsigned char I2C_START:1; + unsigned char I2C_STOP:1; + unsigned char I2C_DATA:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_W:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char NOT_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char R_W:1; + unsigned char :1; + unsigned char :1; + unsigned char D_A:1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char READ_WRITE:1; + unsigned char :1; + unsigned char :1; + unsigned char DATA_ADDRESS:1; + unsigned char :1; + unsigned char :1; + }; +} __SSPSTAT_bits_t; +extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; + +#ifndef NO_BIT_DEFINES +#define BF SSPSTAT_bits.BF +#define UA SSPSTAT_bits.UA +#define R SSPSTAT_bits.R +#define I2C_READ SSPSTAT_bits.I2C_READ +#define NOT_W SSPSTAT_bits.NOT_W +#define NOT_WRITE SSPSTAT_bits.NOT_WRITE +#define R_W SSPSTAT_bits.R_W +#define READ_WRITE SSPSTAT_bits.READ_WRITE +#define S SSPSTAT_bits.S +#define I2C_START SSPSTAT_bits.I2C_START +#define P SSPSTAT_bits.P +#define I2C_STOP SSPSTAT_bits.I2C_STOP +#define D SSPSTAT_bits.D +#define I2C_DATA SSPSTAT_bits.I2C_DATA +#define NOT_A SSPSTAT_bits.NOT_A +#define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS +#define D_A SSPSTAT_bits.D_A +#define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS +#define CKE SSPSTAT_bits.CKE +#define SMP SSPSTAT_bits.SMP +#endif /* NO_BIT_DEFINES */ + +// ----- STATUS bits -------------------- +typedef union { + struct { + unsigned char C:1; + unsigned char DC:1; + unsigned char Z:1; + unsigned char NOT_PD:1; + unsigned char NOT_TO:1; + unsigned char RP0:1; + unsigned char RP1:1; + unsigned char IRP:1; + }; +} __STATUS_bits_t; +extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + +#ifndef NO_BIT_DEFINES +#define C STATUS_bits.C +#define DC STATUS_bits.DC +#define Z STATUS_bits.Z +#define NOT_PD STATUS_bits.NOT_PD +#define NOT_TO STATUS_bits.NOT_TO +#define RP0 STATUS_bits.RP0 +#define RP1 STATUS_bits.RP1 +#define IRP STATUS_bits.IRP +#endif /* NO_BIT_DEFINES */ + +// ----- T1CON bits -------------------- +typedef union { + struct { + unsigned char TMR1ON:1; + unsigned char TMR1CS:1; + unsigned char NOT_T1SYNC:1; + unsigned char T1OSCEN:1; + unsigned char T1CKPS0:1; + unsigned char T1CKPS1:1; + unsigned char T1GE:1; + unsigned char T1GINV:1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1INSYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char T1SYNC:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __T1CON_bits_t; +extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; + +#ifndef NO_BIT_DEFINES +#define TMR1ON T1CON_bits.TMR1ON +#define TMR1CS T1CON_bits.TMR1CS +#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC +#define T1INSYNC T1CON_bits.T1INSYNC +#define T1SYNC T1CON_bits.T1SYNC +#define T1OSCEN T1CON_bits.T1OSCEN +#define T1CKPS0 T1CON_bits.T1CKPS0 +#define T1CKPS1 T1CON_bits.T1CKPS1 +#define T1GE T1CON_bits.T1GE +#define T1GINV T1CON_bits.T1GINV +#endif /* NO_BIT_DEFINES */ + +// ----- T2CON bits -------------------- +typedef union { + struct { + unsigned char T2CKPS0:1; + unsigned char T2CKPS1:1; + unsigned char TMR2ON:1; + unsigned char TOUTPS0:1; + unsigned char TOUTPS1:1; + unsigned char TOUTPS2:1; + unsigned char TOUTPS3:1; + unsigned char :1; + }; +} __T2CON_bits_t; +extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; + +#ifndef NO_BIT_DEFINES +#define T2CKPS0 T2CON_bits.T2CKPS0 +#define T2CKPS1 T2CON_bits.T2CKPS1 +#define TMR2ON T2CON_bits.TMR2ON +#define TOUTPS0 T2CON_bits.TOUTPS0 +#define TOUTPS1 T2CON_bits.TOUTPS1 +#define TOUTPS2 T2CON_bits.TOUTPS2 +#define TOUTPS3 T2CON_bits.TOUTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISA bits -------------------- +typedef union { + struct { + unsigned char TRISA0:1; + unsigned char TRISA1:1; + unsigned char TRISA2:1; + unsigned char TRISA3:1; + unsigned char TRISA4:1; + unsigned char TRISA5:1; + unsigned char :1; + unsigned char :1; + }; +} __TRISA_bits_t; +extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; + +#ifndef NO_BIT_DEFINES +#define TRISA0 TRISA_bits.TRISA0 +#define TRISA1 TRISA_bits.TRISA1 +#define TRISA2 TRISA_bits.TRISA2 +#define TRISA3 TRISA_bits.TRISA3 +#define TRISA4 TRISA_bits.TRISA4 +#define TRISA5 TRISA_bits.TRISA5 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISB bits -------------------- +typedef union { + struct { + unsigned char TRISB0:1; + unsigned char TRISB1:1; + unsigned char TRISB2:1; + unsigned char TRISB3:1; + unsigned char TRISB4:1; + unsigned char TRISB5:1; + unsigned char TRISB6:1; + unsigned char TRISB7:1; + }; +} __TRISB_bits_t; +extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + +#ifndef NO_BIT_DEFINES +#define TRISB0 TRISB_bits.TRISB0 +#define TRISB1 TRISB_bits.TRISB1 +#define TRISB2 TRISB_bits.TRISB2 +#define TRISB3 TRISB_bits.TRISB3 +#define TRISB4 TRISB_bits.TRISB4 +#define TRISB5 TRISB_bits.TRISB5 +#define TRISB6 TRISB_bits.TRISB6 +#define TRISB7 TRISB_bits.TRISB7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISC bits -------------------- +typedef union { + struct { + unsigned char TRISC0:1; + unsigned char TRISC1:1; + unsigned char TRISC2:1; + unsigned char TRISC3:1; + unsigned char TRISC4:1; + unsigned char TRISC5:1; + unsigned char TRISC6:1; + unsigned char TRISC7:1; + }; +} __TRISC_bits_t; +extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + +#ifndef NO_BIT_DEFINES +#define TRISC0 TRISC_bits.TRISC0 +#define TRISC1 TRISC_bits.TRISC1 +#define TRISC2 TRISC_bits.TRISC2 +#define TRISC3 TRISC_bits.TRISC3 +#define TRISC4 TRISC_bits.TRISC4 +#define TRISC5 TRISC_bits.TRISC5 +#define TRISC6 TRISC_bits.TRISC6 +#define TRISC7 TRISC_bits.TRISC7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISD bits -------------------- +typedef union { + struct { + unsigned char TRISD0:1; + unsigned char TRISD1:1; + unsigned char TRISD2:1; + unsigned char TRISD3:1; + unsigned char TRISD4:1; + unsigned char TRISD5:1; + unsigned char TRISD6:1; + unsigned char TRISD7:1; + }; +} __TRISD_bits_t; +extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; + +#ifndef NO_BIT_DEFINES +#define TRISD0 TRISD_bits.TRISD0 +#define TRISD1 TRISD_bits.TRISD1 +#define TRISD2 TRISD_bits.TRISD2 +#define TRISD3 TRISD_bits.TRISD3 +#define TRISD4 TRISD_bits.TRISD4 +#define TRISD5 TRISD_bits.TRISD5 +#define TRISD6 TRISD_bits.TRISD6 +#define TRISD7 TRISD_bits.TRISD7 +#endif /* NO_BIT_DEFINES */ + +// ----- TRISE bits -------------------- +typedef union { + struct { + unsigned char TRISE0:1; + unsigned char TRISE1:1; + unsigned char TRISE2:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __TRISE_bits_t; +extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + +#ifndef NO_BIT_DEFINES +#define TRISE0 TRISE_bits.TRISE0 +#define TRISE1 TRISE_bits.TRISE1 +#define TRISE2 TRISE_bits.TRISE2 +#endif /* NO_BIT_DEFINES */ + +// ----- TXSTA bits -------------------- +typedef union { + struct { + unsigned char TX9D:1; + unsigned char TRMT:1; + unsigned char BRGH:1; + unsigned char :1; + unsigned char SYNC:1; + unsigned char TXEN:1; + unsigned char TX9:1; + unsigned char CSRC:1; + }; + struct { + unsigned char TXD8:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char NOT_TX8:1; + unsigned char :1; + }; + struct { + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char TX8_9:1; + unsigned char :1; + }; +} __TXSTA_bits_t; +extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + +#ifndef NO_BIT_DEFINES +#define TX9D TXSTA_bits.TX9D +#define TXD8 TXSTA_bits.TXD8 +#define TRMT TXSTA_bits.TRMT +#define BRGH TXSTA_bits.BRGH +#define SYNC TXSTA_bits.SYNC +#define TXEN TXSTA_bits.TXEN +#define TX9 TXSTA_bits.TX9 +#define NOT_TX8 TXSTA_bits.NOT_TX8 +#define TX8_9 TXSTA_bits.TX8_9 +#define CSRC TXSTA_bits.CSRC +#endif /* NO_BIT_DEFINES */ + +// ----- VRCON bits -------------------- +typedef union { + struct { + unsigned char VR0:1; + unsigned char VR1:1; + unsigned char VR2:1; + unsigned char VR3:1; + unsigned char :1; + unsigned char VRR:1; + unsigned char :1; + unsigned char VREN:1; + }; +} __VRCON_bits_t; +extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + +#ifndef NO_BIT_DEFINES +#define VR0 VRCON_bits.VR0 +#define VR1 VRCON_bits.VR1 +#define VR2 VRCON_bits.VR2 +#define VR3 VRCON_bits.VR3 +#define VRR VRCON_bits.VRR +#define VREN VRCON_bits.VREN +#endif /* NO_BIT_DEFINES */ + +// ----- WDTCON bits -------------------- +typedef union { + struct { + unsigned char SWDTEN:1; + unsigned char WDTPS0:1; + unsigned char WDTPS1:1; + unsigned char WDTPS2:1; + unsigned char WDTPS3:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; + struct { + unsigned char SWDTE:1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + unsigned char :1; + }; +} __WDTCON_bits_t; +extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + +#ifndef NO_BIT_DEFINES +#define SWDTEN WDTCON_bits.SWDTEN +#define SWDTE WDTCON_bits.SWDTE +#define WDTPS0 WDTCON_bits.WDTPS0 +#define WDTPS1 WDTCON_bits.WDTPS1 +#define WDTPS2 WDTCON_bits.WDTPS2 +#define WDTPS3 WDTCON_bits.WDTPS3 +#endif /* NO_BIT_DEFINES */ + +// ----- WPU bits -------------------- +typedef union { + struct { + unsigned char WPU0:1; + unsigned char WPU1:1; + unsigned char WPU2:1; + unsigned char WPU3:1; + unsigned char WPU4:1; + unsigned char WPU5:1; + unsigned char WPU6:1; + unsigned char WPU7:1; + }; +} __WPU_bits_t; +extern volatile __WPU_bits_t __at(WPU_ADDR) WPU_bits; + +#ifndef NO_BIT_DEFINES +#define WPU0 WPU_bits.WPU0 +#define WPU1 WPU_bits.WPU1 +#define WPU2 WPU_bits.WPU2 +#define WPU3 WPU_bits.WPU3 +#define WPU4 WPU_bits.WPU4 +#define WPU5 WPU_bits.WPU5 +#define WPU6 WPU_bits.WPU6 +#define WPU7 WPU_bits.WPU7 +#endif /* NO_BIT_DEFINES */ + +// ----- WPUB bits -------------------- +typedef union { + struct { + unsigned char WPUB0:1; + unsigned char WPUB1:1; + unsigned char WPUB2:1; + unsigned char WPUB3:1; + unsigned char WPUB4:1; + unsigned char WPUB5:1; + unsigned char WPUB6:1; + unsigned char WPUB7:1; + }; +} __WPUB_bits_t; +extern volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + +#ifndef NO_BIT_DEFINES +#define WPUB0 WPUB_bits.WPUB0 +#define WPUB1 WPUB_bits.WPUB1 +#define WPUB2 WPUB_bits.WPUB2 +#define WPUB3 WPUB_bits.WPUB3 +#define WPUB4 WPUB_bits.WPUB4 +#define WPUB5 WPUB_bits.WPUB5 +#define WPUB6 WPUB_bits.WPUB6 +#define WPUB7 WPUB_bits.WPUB7 +#endif /* NO_BIT_DEFINES */ + +#endif diff --git a/device/include/pic/recreate.sh b/device/include/pic/recreate.sh new file mode 100755 index 0000000..b28bb38 --- /dev/null +++ b/device/include/pic/recreate.sh @@ -0,0 +1,20 @@ +#!/bin/sh + +# This script can be used to recreate the device library files from +# gputils' .inc files. +# Usage: +# mkdir temp && cd temp && ../recreate.sh +# +# You will need to adjust the paths to SDCC and gputils before running! + +GPUTILS=$HOME/svn/gputils +SDCC=$HOME/svn/plain + +for i in ../pic*.h; do + if [ ! "$i" = "../pic14regs.h" ]; then + DEV=`echo "$i" | sed -e "s:../pic::;s/\.h//"`; + echo "Creating ${DEV}..."; + "${SDCC}/support/scripts/inc2h.pl" "${DEV}" "${GPUTILS}"; + fi +done + diff --git a/device/include/pic/sdcc-lib.h b/device/include/pic/sdcc-lib.h new file mode 100644 index 0000000..d14d05d --- /dev/null +++ b/device/include/pic/sdcc-lib.h @@ -0,0 +1,26 @@ + +/* + * sdcc-lib.h - SDCC Library Main Header + * + * This file is part of the GNU PIC Library. + * + * June, 2600: adopted for pic14 + * Raphael Neider + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: sdcc-lib.h 4776 2007-04-29 13:15:51Z borutr $ + * + */ + +/** Top level header file for the sdcc libraries that enables target + specific features. +*/ +#ifndef __PIC14_SDCC_LIB_H +#define __PIC14_SDCC_LIB_H 1 + +#include <../asm/pic/features.h> + +#endif /* __PIC14_SDCC_LIB_H */ diff --git a/device/include/pic16/adc.h b/device/include/pic16/adc.h new file mode 100644 index 0000000..0a9b640 --- /dev/null +++ b/device/include/pic16/adc.h @@ -0,0 +1,359 @@ + +/* + * A/D conversion module library header + * + * written by Vangelis Rokas, 2004 + * + * Devices implemented: + * PIC18F[24][45][28] + * PIC18F2455-style + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * $Id: adc.h 5391 2009-02-27 13:03:40Z tecodev $ + */ + +#ifndef __ADC_H__ +#define __ADC_H__ + +/* link I/O libarary */ +#pragma library io + +/* interrupt on/off flag */ +#define ADC_INT_OFF 0x00 +#define ADC_INT_ON 0x01 + + +/* output format */ +#define ADC_FRM_RJUST 0x80 +#define ADC_FRM_LJUST 0x00 + + +/* reference voltage configuration (not for 18f242-style ADC) */ +#define ADC_VCFG_VDD_VSS 0x00 +#define ADC_VCFG_AN3_VSS 0x10 +#define ADC_VCFG_VDD_AN2 0x20 +#define ADC_VCFG_AN3_AN2 0x30 + +/* oscillator frequency */ +#define ADC_FOSC_2 0x00 +#define ADC_FOSC_4 0x04 +#define ADC_FOSC_8 0x01 +#define ADC_FOSC_16 0x05 +#define ADC_FOSC_32 0x02 +#define ADC_FOSC_64 0x06 +#define ADC_FOSC_RC 0x07 + +/* + * acquisition time (65j50-style only) + * -- to be ORed with ADC_FOSC + */ +#define ADC_ACQT_0 (0x00 << 3) +#define ADC_ACQT_2 (0x01 << 3) +#define ADC_ACQT_4 (0x02 << 3) +#define ADC_ACQT_6 (0x03 << 3) +#define ADC_ACQT_8 (0x04 << 3) +#define ADC_ACQT_12 (0x05 << 3) +#define ADC_ACQT_16 (0x06 << 3) +#define ADC_ACQT_20 (0x07 << 3) + +/* + * calibration enable (65j50-style only) + * -- to be ORed with ADC_FOSC + */ +#define ADC_CAL 0x40 + +/* + * Distinguishing between ADC-styles: + * + * ADCON0: + * bit 18f242 18f1220 18f2220 18f65j50 + * 0 ADON ADON ADON ADON + * 1 - GO GO GO + * 2 GO CHS0 CHS0 CHS0 + * 3 CHS0 CHS1 CHS1 CHS1 + * 4 CHS1 CHS2 CHS2 CHS2 + * 5 CHS2 - CHS3 CHS3 + * 6 ADCS0 VCFG0 - VCFG0 + * 7 ADCS1 VCFG1 (ADCAL) VCFG1 + * + * ADCON1: + * bit 18f242 18f1220 18f2220 18f65j50 + * 0 PCFG0 PCFG0 PCFG0 ADCS0 + * 1 PCFG1 PCFG1 PCFG1 ADCS1 + * 2 PCFG2 PCFG2 PCFG2 ADCS2 + * 3 PCFG3 PCFG3 PCFG3 ACQT0 + * 4 - PCFG4 VCFG0 ACQT1 + * 5 - PCFG5 VCFG1 ACQT2 + * 6 ADCS2 PCFG6 - ADCAL + * 7 ADFM - - ADFM + */ + +/* 18f242-style */ +#if defined(pic18f242) || defined(pic18f252) || defined(pic18f442) || defined(pic18f452) \ + || defined(pic18f248) || defined(pic18f258) || defined(pic18f448) || defined(pic18f458) + +#define __SDCC_ADC_STYLE242 1 + +/* 18f1220-style */ +#elif defined(pic18f1220) || defined(pic18f1320) + +#define __SDCC_ADC_STYLE1220 1 + +/* 18f2220-style, ordered by device family */ +#elif defined(pic18f2220) || defined(pic18f2320) || defined(pic18f4220) || defined(pic18f4320) \ + || defined(pic18f2221) || defined(pic18f2321) || defined(pic18f4221) || defined(pic18f4321) \ + || defined(pic18f23k20) || defined(pic18f24k20) || defined(pic18f25k20) || defined(pic18f26k20) \ + || defined(pic18f2410) || defined(pic18f2510) || defined(pic18f4410) || defined(pic18f4510) \ + || defined(pic18f2420) || defined(pic18f2520) || defined(pic18f4420) || defined(pic18f4520) \ + || defined(pic18f2423) || defined(pic18f2523) || defined(pic18f4423) || defined(pic18f4523) \ + || defined(pic18f2450) || defined(pic18f4450) \ + || defined(pic18f2455) || defined(pic18f2550) || defined(pic18f4455) || defined(pic18f4550) \ + || defined(pic18f2480) || defined(pic18f2580) || defined(pic18f4480) || defined(pic18f4580) \ + || defined(pic18f24j10) || defined(pic18f25j10) || defined(pic18f44j10) || defined(pic18f45j10) \ + || defined(pic18f2515) || defined(pic18f2610) || defined(pic18f4515) || defined(pic18f4610) \ + || defined(pic18f2525) || defined(pic18f2620) || defined(pic18f4525) || defined(pic18f4620) \ + || defined(pic18f2585) || defined(pic18f2680) || defined(pic18f4585) || defined(pic18f4680) \ + || defined(pic18f2682) || defined(pic18f2685) || defined(pic18f4682) || defined(pic18f4685) \ + || defined(pic18f43k20) || defined(pic18f44k20) || defined(pic18f45k20) || defined(pic18f46k20) \ + || defined(pic18f6520) || defined(pic18f6620) || defined(pic18f6720) \ + || defined(pic18f6585) || defined(pic18f6680) || defined(pic18f8585) || defined(pic18f8680) \ + || defined(pic18f66j60) || defined(pic18f66j65) || defined(pic18f67j60) \ + || defined(pic18f8520) || defined(pic18f8620) || defined(pic18f8720) \ + || defined(pic18f86j60) || defined(pic18f86j65) || defined(pic18f87j60) \ + || defined(pic18f96j60) || defined(pic18f96j65) || defined(pic18f97j60) \ + +#define __SDCC_ADC_STYLE2220 1 + +#elif defined(pic18f65j50) || defined(pic18f66j50) || defined(pic18f66j55) || defined(pic18f67j50) \ + || defined(pic18f85j50) || defined(pic18f86j50) || defined(pic18f86j55) || defined(pic18f87j50) \ + +#define __SDCC_ADC_STYLE65J50 + +#else /* unknown device */ + +#error Device ADC style is unknown, please update your adc.h manually and/or inform the maintainer! + +#endif + + +/* channel selection (CHS field in ADCON0) */ +#define ADC_CHN_0 0x00 +#define ADC_CHN_1 0x01 +#define ADC_CHN_2 0x02 +#define ADC_CHN_3 0x03 +#define ADC_CHN_4 0x04 +#define ADC_CHN_5 0x05 +#define ADC_CHN_6 0x06 +#define ADC_CHN_7 0x07 +#define ADC_CHN_8 0x08 +#define ADC_CHN_9 0x09 +#define ADC_CHN_10 0x0a +#define ADC_CHN_11 0x0b +#define ADC_CHN_12 0x0c +#define ADC_CHN_13 0x0d +#define ADC_CHN_14 0x0e +#define ADC_CHN_15 0x0f + + +/* Port configuration (PCFG (and VCFG) field(s) in ADCON1) */ +#if defined(__SDCC_ADC_STYLE242) + +#define ADC_CFG_8A_0R 0x00 +#define ADC_CFG_7A_1R 0x01 +#define ADC_CFG_5A_0R 0x02 +#define ADC_CFG_4A_1R 0x03 +#define ADC_CFG_3A_0R 0x04 +#define ADC_CFG_2A_1R 0x05 +#define ADC_CFG_0A_0R 0x06 +#define ADC_CFG_6A_2R 0x08 +#define ADC_CFG_6A_0R 0x09 +#define ADC_CFG_5A_1R 0x0a +#define ADC_CFG_4A_2R 0x0b +#define ADC_CFG_3A_2R 0x0c +#define ADC_CFG_2A_2R 0x0d +#define ADC_CFG_1A_0R 0x0e +#define ADC_CFG_1A_2R 0x0f + +#elif defined(__SDCC_ADC_STYLE1220) + +/* + * These devices use a bitmask in ADCON1 to configure AN0..AN6 + * as digital ports (bit set) or analog input (bit clear). + * + * These settings are selected based on their similarity with + * the 2220-style settings; 1220-style is more flexible, though. + * + * Reference voltages are configured via adc_open's config parameter + * using ADC_VCFG_*. + */ + +#define ADC_CFG_6A 0x00 +#define ADC_CFG_5A 0x20 +#define ADC_CFG_4A 0x30 +#define ADC_CFG_3A 0x38 +#define ADC_CFG_2A 0x3c +#define ADC_CFG_1A 0x3e +#define ADC_CFG_0A 0x3f + +#elif defined(__SDCC_ADC_STYLE2220) + +/* + * The reference voltage configuration should be factored out into + * the config argument (ADC_VCFG_*) to adc_open to facilitate a + * merger with the 1220-style ADC. + */ + +#define ADC_CFG_16A 0x00 +/* 15 analog ports cannot be configured! */ +#define ADC_CFG_14A 0x01 +#define ADC_CFG_13A 0x02 +#define ADC_CFG_12A 0x03 +#define ADC_CFG_11A 0x04 +#define ADC_CFG_10A 0x05 +#define ADC_CFG_9A 0x06 +#define ADC_CFG_8A 0x07 +#define ADC_CFG_7A 0x08 +#define ADC_CFG_6A 0x09 +#define ADC_CFG_5A 0x0a +#define ADC_CFG_4A 0x0b +#define ADC_CFG_3A 0x0c +#define ADC_CFG_2A 0x0d +#define ADC_CFG_1A 0x0e +#define ADC_CFG_0A 0x0f + +/* + * For compatibility only: Combined port and reference voltage selection. + * Consider using ADC_CFG_nA and a separate ADC_VCFG_* instead! + */ + +#define ADC_CFG_16A_0R 0x00 +#define ADC_CFG_16A_1R 0x10 +#define ADC_CFG_16A_2R 0x30 + +/* Can only select 14 or 16 analog ports ... */ +#define ADC_CFG_15A_0R 0x00 +#define ADC_CFG_15A_1R 0x10 +#define ADC_CFG_15A_2R 0x30 + +#define ADC_CFG_14A_0R 0x01 +#define ADC_CFG_14A_1R 0x11 +#define ADC_CFG_14A_2R 0x31 +#define ADC_CFG_13A_0R 0x02 +#define ADC_CFG_13A_1R 0x12 +#define ADC_CFG_13A_2R 0x32 +#define ADC_CFG_12A_0R 0x03 +#define ADC_CFG_12A_1R 0x13 +#define ADC_CFG_12A_2R 0x33 +#define ADC_CFG_11A_0R 0x04 +#define ADC_CFG_11A_1R 0x14 +#define ADC_CFG_11A_2R 0x34 +#define ADC_CFG_10A_0R 0x05 +#define ADC_CFG_10A_1R 0x15 +#define ADC_CFG_10A_2R 0x35 +#define ADC_CFG_09A_0R 0x06 +#define ADC_CFG_09A_1R 0x16 +#define ADC_CFG_09A_2R 0x36 +#define ADC_CFG_08A_0R 0x07 +#define ADC_CFG_08A_1R 0x17 +#define ADC_CFG_08A_2R 0x37 +#define ADC_CFG_07A_0R 0x08 +#define ADC_CFG_07A_1R 0x18 +#define ADC_CFG_07A_2R 0x38 +#define ADC_CFG_06A_0R 0x09 +#define ADC_CFG_06A_1R 0x19 +#define ADC_CFG_06A_2R 0x39 +#define ADC_CFG_05A_0R 0x0a +#define ADC_CFG_05A_1R 0x1a +#define ADC_CFG_05A_2R 0x3a +#define ADC_CFG_04A_0R 0x0b +#define ADC_CFG_04A_1R 0x1b +#define ADC_CFG_04A_2R 0x3b +#define ADC_CFG_03A_0R 0x0c +#define ADC_CFG_03A_1R 0x1c +#define ADC_CFG_03A_2R 0x3c +#define ADC_CFG_02A_0R 0x0d +#define ADC_CFG_02A_1R 0x1d +#define ADC_CFG_02A_2R 0x3d +#define ADC_CFG_01A_0R 0x0e +#define ADC_CFG_01A_1R 0x1e +#define ADC_CFG_01A_2R 0x3e +#define ADC_CFG_00A_0R 0x0f + +#elif defined(__SDCC_ADC_STYLE65J50) + +/* + * These devices use a bitmask in ANCON0/1 to configure + * AN7..0/AN15..8 as digital ports (bit set) or analog + * inputs (bit clear). + * + * These settings are selected based on their similarity with + * the 2220-style settings; 65j50-style is more flexible, though. + * + * Reference voltages are configured via adc_open's config parameter + * using ADC_VCFG_*. + */ + +#define ADC_CFG_16A 0x0000 +#define ADC_CFG_15A 0x8000 +#define ADC_CFG_14A 0xC000 +#define ADC_CFG_13A 0xE000 +#define ADC_CFG_12A 0xF000 +#define ADC_CFG_11A 0xF800 +#define ADC_CFG_10A 0xFC00 +#define ADC_CFG_9A 0xFE00 +#define ADC_CFG_8A 0xFF00 +#define ADC_CFG_7A 0xFF80 +#define ADC_CFG_6A 0xFFC0 +#define ADC_CFG_5A 0xFFE0 +#define ADC_CFG_4A 0xFFF0 +#define ADC_CFG_3A 0xFFF8 +#define ADC_CFG_2A 0xFFFC +#define ADC_CFG_1A 0xFFFE +#define ADC_CFG_0A 0xFFFF + +#else /* unhandled ADC style */ + +#error No supported ADC style selected. + +#endif /* ADC_STYLE */ + + + +/* initialize AD module */ +#if defined(__SDCC_ADC_STYLE65J50) +void adc_open(unsigned char channel, unsigned char fosc, unsigned int pcfg, unsigned char config); +#else +void adc_open(unsigned char channel, unsigned char fosc, unsigned char pcfg, unsigned char config); +#endif + +/* shutdown AD module */ +void adc_close(void); + +/* begin a conversion */ +void adc_conv(void); + +/* return 1 if AD is performing a conversion, 0 if done */ +char adc_busy(void) __naked; + +/* get value of conversion */ +int adc_read(void) __naked; + +/* setup conversion channel */ +void adc_setchannel(unsigned char channel); + +#endif + diff --git a/device/include/pic16/ctype.h b/device/include/pic16/ctype.h new file mode 100644 index 0000000..33e3969 --- /dev/null +++ b/device/include/pic16/ctype.h @@ -0,0 +1,74 @@ +/*------------------------------------------------------------------------- + ctype.h - ANSI functions forward declarations + + Modified for pic16 port by Vangelis Rokas, 2004, vrokas@otenet.gr + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + Revisions: + 1.0 - June.1.2000 1.0 - Bela Torok / bela.torok@kssg.ch + order: function definitions -> macros + corretced macro: isalpha(c) + added macros: _tolower(c), _toupper(c), tolower(c), toupper(c) toascii(c) + + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* +** $Id: ctype.h 3648 2005-01-22 18:02:16Z vrokas $ +*/ + + +#ifndef __CTYPE_H +#define __CTYPE_H 1 + +/* link the C libarary */ +#pragma library c + +#include + +extern char iscntrl (unsigned char ) ; +extern char isdigit (unsigned char ) ; +extern char isgraph (unsigned char ) ; +extern char islower (unsigned char ) ; +extern char isupper (unsigned char ) ; +extern char isprint (unsigned char ) ; +extern char ispunct (unsigned char ) ; +extern char isspace (unsigned char ) ; +extern char isxdigit (unsigned char ) ; + +#define isalnum(c) (isalpha(c) || isdigit(c)) +#define isalpha(c) (isupper(c) || islower(c)) + +/* ANSI versions of _tolower & _toupper +#define _tolower(c) ((c) - ('a' - 'A')) +#define _toupper(c) ((c) + ('a' - 'A')) +*/ + +// The _tolower & _toupper functions below can applied to any +// alpha characters regardless of the case (upper or lower) +#define _tolower(c) ((c) | ('a' - 'A')) +#define _toupper(c) ((c) & ~('a' - 'A')) + +#define tolower(c) ((isupper(c)) ? _tolower(c) : (c)) +#define toupper(c) ((islower(c)) ? _toupper(c) : (c)) +#define toascii(c) ((c) & 0x7F) + +#endif diff --git a/device/include/pic16/delay.h b/device/include/pic16/delay.h new file mode 100644 index 0000000..1d06fff --- /dev/null +++ b/device/include/pic16/delay.h @@ -0,0 +1,50 @@ + +/* + * delay.h - delay functions header file + * + * adopted for SDCC and pic16 port by Vangelis Rokas, 2005 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +/* +** $Id: delay.h 3714 2005-04-02 13:13:53Z vrokas $ +*/ + + +#ifndef __DELAY_H__ +#define __DELAY_H__ + +#pragma library c + +/* + * the delayNNtcy family of functions performs a + * delay of NN cycles. Possible values for NN are: + * 10 10*n cycles delay + * 100 100*n cycles delay + * 1k 1000*n cycles delay + * 10k 10000*n cycles delay + * 100k 100000*n cycles delay + * 1m 1000000*n cycles delay + */ + +void delay10tcy(unsigned char) __wparam; +void delay100tcy(unsigned char) __wparam; +void delay1ktcy(unsigned char) __wparam; +void delay10ktcy(unsigned char) __wparam; +void delay100ktcy(unsigned char) __wparam; +void delay1mtcy(unsigned char) __wparam; + +#endif diff --git a/device/include/pic16/errno.h b/device/include/pic16/errno.h new file mode 100644 index 0000000..1347bd4 --- /dev/null +++ b/device/include/pic16/errno.h @@ -0,0 +1,40 @@ +/*------------------------------------------------------------------------- + errno.h: Error codes used in the math functions + + Ported to PIC16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Copyright (C) 2001 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +/* +** $Id: errno.h 3912 2005-10-26 11:08:11Z tecodev $ +*/ + +#ifndef _PIC16_ERRNO_H +#define _PIC16_ERRNO_H + +/* link with C library */ +#pragma library c + +extern int errno; + +/* Error Codes: */ + +#define EDOM 33 /* Math argument out of domain of functions */ +#define ERANGE 34 /* Math result not representable */ + +#endif /* _PIC16_ERRNO_H */ diff --git a/device/include/pic16/float.h b/device/include/pic16/float.h new file mode 100644 index 0000000..01f345b --- /dev/null +++ b/device/include/pic16/float.h @@ -0,0 +1,84 @@ +/*------------------------------------------------------------------------- + float.h - ANSI functions forward declarations + + Adopted for pic16 port library by Vangelis Rokas + [vrokas at otenet.gr] (2004) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef __FLOAT_H +#define __FLOAT_H 1 + +#include +#include + +#define FLT_RADIX 2 +#define FLT_MANT_DIG 24 +#define FLT_EPSILON 1.192092896E-07F +#define FLT_DIG 6 +#define FLT_MIN_EXP (-125) +#define FLT_MIN 1.175494351E-38F +#define FLT_MIN_10_EXP (-37) +#define FLT_MAX_EXP (+128) +#define FLT_MAX 3.402823466E+38F +#define FLT_MAX_10_EXP (+38) + +/* the following deal with IEEE single-precision numbers */ +#define EXCESS 126 +#define SIGNBIT ((unsigned long)0x80000000) +#define HIDDEN (unsigned long)(1ul << 23) +#define SIGN(fp) (((unsigned long)(fp) >> (8*sizeof(fp)-1)) & 1) +#define EXP(fp) (((unsigned long)(fp) >> 23) & (unsigned int) 0x00FF) +#define MANT(fp) (((fp) & (unsigned long)0x007FFFFF) | HIDDEN) +#define NORM 0xff000000 +#define PACK(s,e,m) ((s) | ((unsigned long)(e) << 23) | (m)) + + +float __uchar2fs (unsigned char) _FS_REENTRANT; +float __schar2fs (signed char) _FS_REENTRANT; +float __uint2fs (unsigned int) _FS_REENTRANT; +float __sint2fs (signed int) _FS_REENTRANT; +float __ulong2fs (unsigned long) _FS_REENTRANT; +float __slong2fs (signed long) _FS_REENTRANT; +unsigned char __fs2uchar (float) _FS_REENTRANT; +signed char __fs2schar (float) _FS_REENTRANT; +unsigned int __fs2uint (float) _FS_REENTRANT; +signed int __fs2sint (float) _FS_REENTRANT; +unsigned long __fs2ulong (float) _FS_REENTRANT; +signed long __fs2slong (float) _FS_REENTRANT; + +float __fsadd (float, float) _FS_REENTRANT; +float __fssub (float, float) _FS_REENTRANT; +float __fsmul (float, float) _FS_REENTRANT; +float __fsdiv (float, float) _FS_REENTRANT; + +char __fslt (float, float) _FS_REENTRANT; +char __fseq (float, float) _FS_REENTRANT; +char __fsneq (float, float) _FS_REENTRANT; +char __fsgt (float, float) _FS_REENTRANT; + +#endif + + + + + diff --git a/device/include/pic16/gstack.h b/device/include/pic16/gstack.h new file mode 100644 index 0000000..550d008 --- /dev/null +++ b/device/include/pic16/gstack.h @@ -0,0 +1,37 @@ +/*------------------------------------------------------------------------- + + gstack.h :- debug stack tracing header + + Written for pic16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +/* +** $Id: gstack.h 3648 2005-01-22 18:02:16Z vrokas $ +*/ + +#ifndef __PIC16_GSTACK_H__ +#define __PIC16_GSTACK_H__ + +/* link the debug library */ +#pragma library debug + +extern void (* _gstack_overflow_handler)(void); + +#endif /* __PIC16_GSTACK_H__ */ diff --git a/device/include/pic16/i2c.h b/device/include/pic16/i2c.h new file mode 100644 index 0000000..a961fa2 --- /dev/null +++ b/device/include/pic16/i2c.h @@ -0,0 +1,121 @@ + +/* + * I2C communications module library header + * + * written by Vangelis Rokas, 2005 + * + * Devices implemented: + * PIC18F[24][45][28] + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +/* +** $Id: i2c.h 3714 2005-04-02 13:13:53Z vrokas $ +*/ + + +#ifndef __I2C_H__ +#define __I2C_H__ + +/* link the I/O library */ +#pragma library io + +#include + + +#define _I2CPARAM_SPEC __data + + +/* I2C modes of operation */ +#define I2C_SLAVE10B_INT 0x0f +#define I2C_SLAVE7B_INT 0x0e +#define I2C_SLAVE_IDLE 0x0b +#define I2C_MASTER 0x08 +#define I2C_SLAVE10B 0x07 +#define I2C_SLAVE7B 0x06 + + +/* slew rate control */ +#define I2C_SLEW_OFF 0xc0 +#define I2C_SLEW_ON 0x00 + +/* macros to generate hardware conditions on I2C module */ + +/* generate stop condition */ +#define I2C_STOP() SSPCON2bits.PEN=1 + +/* generate start condition */ +#define I2C_START() SSPCON2bits.SEN=1 + +/* generate restart condition */ +#define I2C_RESTART() SSPCON2bits.RSEN=1 + +/* generate not acknoledge condition */ +#define I2C_NACK() SSPCON2bits.ACKDT=1; SSPCON2bits.ACKEN=1 + +/* generate acknoledge condition */ +#define I2C_ACK() SSPCON2bits.ACKDT=0; SSPCON2bits.ACKEN=1 + +/* wait until I2C is idle */ +#define I2C_IDLE() while((SSPCON2 & 0x1f) | (SSPSTATbits.R_W)); + +/* is data ready from I2C module ?? */ +#define I2C_DRDY() (SSPSTATbits.BF) + + +/* function equivalent to macros for generating hardware conditions */ + +/* stop */ +void i2c_stop(void); + +/* start */ +void i2c_start(void); + +/* restart */ +void i2c_restart(void); + +/* not acknoledge */ +void i2c_nack(void); + +/* acknoledge */ +void i2c_ack(void); + +/* wait until I2C goes idle */ +void i2c_idle(void); + +/* is character ready in I2C buffer ?? */ +unsigned char i2c_drdy(void); + +/* read a character from I2C module */ +unsigned char i2c_readchar(void); + +/* read a string from I2C module */ +char i2c_readstr(_I2CPARAM_SPEC unsigned char *ptr, unsigned char len); + +/* write a character to I2C module */ +char i2c_writechar(unsigned char dat); + +/* write a string to I2C module */ +char i2c_writestr(unsigned char *ptr); + +/* configure I2C port for operation */ +void i2c_open(unsigned char mode, unsigned char slew, unsigned char addr_brd); + +void i2c_close(void); + + +#endif /* __I2C_H__ */ diff --git a/device/include/pic16/limits.h b/device/include/pic16/limits.h new file mode 100644 index 0000000..c928ff4 --- /dev/null +++ b/device/include/pic16/limits.h @@ -0,0 +1,51 @@ +/*------------------------------------------------------------------------- + limits.h - ANSI defines constants for sizes of integral types + + Adopted for the pic16 port by Vangelis Rokas + [ vrokas at otenet.gr ] 2004 + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef __LIMITS_H +#define __LIMITS_H 1 + +#define CHAR_BIT 8 /* bits in a char */ +#define CHAR_MAX 127 +#define CHAR_MIN -128 +#define SCHAR_MAX CHAR_MAX +#define SCHAR_MIN CHAR_MIN +#define UCHAR_MAX 0xff +#define UCHAR_MIN 0 +#define INT_MIN -32768 +#define INT_MAX 32767 +#define SHRT_MAX INT_MAX +#define SHRT_MIN INT_MIN +#define UINT_MAX 0xffff +#define UINT_MIN 0 +#define USHRT_MAX UINT_MAX +#define USHRT_MIN UINT_MIN +#define LONG_MIN -2147483648 +#define LONG_MAX 2147483647 +#define ULONG_MAX 0xffffffff +#define ULONG_MIN 0 + +#endif diff --git a/device/include/pic16/malloc.h b/device/include/pic16/malloc.h new file mode 100644 index 0000000..49cd27c --- /dev/null +++ b/device/include/pic16/malloc.h @@ -0,0 +1,129 @@ +/* + * malloc.h - dynamic memory allocation header + * + * written by Vangelis Rokas, 2004 (vrokas@otenet.gr) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2, or (at your option) any + * later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * In other words, you are welcome to use, share and improve this program. + * You are forbidden to forbid anyone else to use, share and improve + * what you give them. Help stamp out software-hoarding! + * + * $Id: malloc.h 3714 2005-04-02 13:13:53Z vrokas $ + */ + + +/* + * Structure of memory block header: + * bit 7 (MSB): allocated flag + * bits 0-6: pointer to next block (max length: 126) + * + */ + + +#ifndef __MALLOC_H__ +#define __MALLOC_H__ + + +/* set EMULATION to 1 to enable native Linux malloc emulation layer. This is + * for debugging purposes only */ + +#ifndef EMULATION +#define EMULATION 0 +#endif + +#if EMULATION +//#define malloc pic16_malloc +//#define free pic16_free +//#define realloc pic16_realloc +//#define calloc pic16_calloc + +//#define lmalloc pic16_lmalloc +//#define lfree pic16_lfree +//#define lrealloc pic16_lrealloc +//#define lcalloc pic16_lcalloc +#define _MALLOC_SPEC + +#else + +#pragma library c + +#define _MALLOC_SPEC __data + +#endif + +/* when MALLOC_MAX_FIRST is 1, the memory allocator tries to find a block + * that fits the requested size without merging (initially), if this block + * is not found, then tries to merge adjacent blocks. If MALLOC_MAX_FIRST is + * set 0, then the allocator tries to merge adjacent blocks in the first + * place. Both behaviours may give better results when used in certain + * circumstancs. I.e. if realloc is to be used, leaving some space after the + * block, will allow realloc to allocate it, otherwise it may result in much + * more memory fragmentation. An algorithm can be implemented to allow small + * fragments to be allocated but this is much too complicated for the PIC18F's + * architecture */ +#define MALLOC_MAX_FIRST 0 + +#define MAX_BLOCK_SIZE 0x7f /* 127 bytes */ +#define MAX_HEAP_SIZE 0x200 /* 512 bytes */ +#define _MAX_HEAP_SIZE (MAX_HEAP_SIZE-1) + +#define ALLOC_FLAG 0x80 +#define HEADER_SIZE 1 + +/* memory block header, max size 127 bytes, 126 usable */ +typedef union { + unsigned char datum; + struct { + unsigned count: 7; + unsigned alloc: 1; + } bits; +} _malloc_rec; + + +/* initialize heap, should be called before any call to malloc/realloc/calloc */ +void _initHeap(unsigned char _MALLOC_SPEC *dHeap, unsigned int heapsize); + + +/* start searching for a block of size at least bSize, merge adjacent blocks + * if necessery */ +_malloc_rec _MALLOC_SPEC *_mergeHeapBlock(_malloc_rec _MALLOC_SPEC *sBlock, unsigned char bSize); + + +/* allocate a memory block */ +unsigned char _MALLOC_SPEC *malloc(unsigned char len); + + +/* same as malloc, but clear memory */ +unsigned char _MALLOC_SPEC *calloc(unsigned char len); + + +/* expand or reduce a memory block, if mblock is NULL, then same as malloc */ +unsigned char _MALLOC_SPEC *realloc(unsigned char _MALLOC_SPEC *mblock, unsigned char len); + + +/* free a memory block */ +void free(unsigned char _MALLOC_SPEC *); + + +/* returns the size of all the unallocated memory */ +unsigned int memfree(void); + + +/* return the size of the maximum unallocated memory block */ +unsigned int memfreemax(void); + + +#endif /* __MALLOC_H__ */ diff --git a/device/include/pic16/math.h b/device/include/pic16/math.h new file mode 100644 index 0000000..d65c957 --- /dev/null +++ b/device/include/pic16/math.h @@ -0,0 +1,90 @@ +/*------------------------------------------------------------------------- + math.h: Floating point math function declarations + + Ported to PIC16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Copyright (C) 2001 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +/* +** $Id: math.h 3648 2005-01-22 18:02:16Z vrokas $ +*/ + + +#ifndef __PIC16_MATH_H +#define __PIC16_MATH_H 1 + +#pragma library math + +#include + +#define PI 3.1415926536 +#define TWO_PI 6.2831853071 +#define HALF_PI 1.5707963268 +#define QUART_PI 0.7853981634 +#define iPI 0.3183098862 +#define iTWO_PI 0.1591549431 +#define TWO_O_PI 0.6366197724 + +// EPS=B**(-t/2), where B is the radix of the floating-point representation +// and there are t base-B digits in the significand. Therefore, for floats +// EPS=2**(-12). Also define EPS2=EPS*EPS. +#define EPS 244.14062E-6 +#define EPS2 59.6046E-9 +#define XMAX 3.402823466E+38 + +union float_long +{ + float f; + long l; +}; + +/********************************************** + * Prototypes for float ANSI C math functions * + **********************************************/ + +/* Trigonometric functions */ +float sinf(const float x) _MATH_REENTRANT; +float cosf(const float x) _MATH_REENTRANT; +float tanf(const float x) _MATH_REENTRANT; +float cotf(const float x) _MATH_REENTRANT; +float asinf(const float x) _MATH_REENTRANT; +float acosf(const float x) _MATH_REENTRANT; +float atanf(const float x) _MATH_REENTRANT; +float atan2f(const float x, const float y); + +/* Hyperbolic functions */ +float sinhf(const float x) _MATH_REENTRANT; +float coshf(const float x) _MATH_REENTRANT; +float tanhf(const float x) _MATH_REENTRANT; + +/* Exponential, logarithmic and power functions */ +float expf(const float x); +float logf(const float x) _MATH_REENTRANT; +float log10f(const float x) _MATH_REENTRANT; +float powf(const float x, const float y); +float sqrtf(const float a) _MATH_REENTRANT; + +/* Nearest integer, absolute value, and remainder functions */ +float fabsf(const float x) _MATH_REENTRANT; +float frexpf(const float x, int *pw2); +float ldexpf(const float x, const int pw2); +float ceilf(float x) _MATH_REENTRANT; +float floorf(float x) _MATH_REENTRANT; +float modff(float x, float * y); + +#endif /* _PIC16_MATH_H */ diff --git a/device/include/pic16/p18fxxx.inc b/device/include/pic16/p18fxxx.inc new file mode 100644 index 0000000..71615a3 --- /dev/null +++ b/device/include/pic16/p18fxxx.inc @@ -0,0 +1,86 @@ +#ifndef __P18FXXX__ +#define __P18FXXX__ 1 + + + list r=dec, n=96, st=off, mm=off + + nolist + +; This header file defines configurations, registers, and other useful bits of +; information common to all PIC18Fxxx microcontrollers. + +FSR0 equ 0 +FSR1 equ 1 +FSR2 equ 2 + +FAST equ 1 + +W equ 0 +A equ 0 +ACCESS equ 0 +BANKED equ 1 + +; Register Files + +TOSU equ 0x0FFF +TOSH equ 0x0FFE +TOSL equ 0x0FFD + +STKPTR equ 0x0FFC + +PCLATU equ 0x0FFB +PCLATH equ 0x0FFA +PCL equ 0x0FF9 + +TBLPTRU equ 0x0FF8 +TBLPTRH equ 0x0FF7 +TBLPTRL equ 0x0FF6 +TABLAT equ 0x0FF5 + +PRODH equ 0x0FF4 +PRODL equ 0x0FF3 + +INDF0 equ 0x0FEF +POSTINC0 equ 0x0FEE +POSTDEC0 equ 0x0FED +PREINC0 equ 0x0FEC +PLUSW0 equ 0x0FEB +FSR0H equ 0x0FEA +FSR0L equ 0x0FE9 + +WREG equ 0x0FE8 + +INDF1 equ 0x0FE7 +POSTINC1 equ 0x0FE6 +POSTDEC1 equ 0x0FE5 +PREINC1 equ 0x0FE4 +PLUSW1 equ 0x0FE3 +FSR1H equ 0x0FE2 +FSR1L equ 0x0FE1 + +BSR equ 0x0FE0 + +INDF2 equ 0x0FDF +POSTINC2 equ 0x0FDE +POSTDEC2 equ 0x0FDD +PREINC2 equ 0x0FDC +PLUSW2 equ 0x0FDB +FSR2H equ 0x0FDA +FSR2L equ 0x0FD9 + +STATUS equ 0x0FD8 + +PORTC equ 0x0F82 +PORTB equ 0x0F81 +PORTA equ 0x0F80 + +; Status Register Bit Definitions + +C equ 0 +DC equ 1 +Z equ 2 +OV equ 3 +N equ 4 + + list +#endif diff --git a/device/include/pic16/pic16devices.txt b/device/include/pic16/pic16devices.txt new file mode 100644 index 0000000..a17cab0 --- /dev/null +++ b/device/include/pic16/pic16devices.txt @@ -0,0 +1,778 @@ +# +# Specification of devices supported by the PIC16 target of the +# Small Devices C Compiler (SDCC). +# +# Lines starting with a hash '#' are ignored. +# A new device specification must begin with a 'name' command. +# Numbers can be given in any way acceptable for scanf's %d, +# i.e., octal (0[0-7]*), decimal ([1-9][0-9]*), or hexadecimal +# (0[xX][0-9a-fA-F]+). +# Strings must not be quoted and may not contain whitespace! +# +# Valid commands are: +# name +# Begin specification of device type , e.g. 18f6720. +# Aliases 'p' and 'pic' will be recognized as well. +# using +# Import specification from the named entry, which must be defined +# earlier. Later commands overrule imported ones. +# ramsize +# This device has bytes of RAM. +# split +# Addresses below refer to bank 0, addresses above +# refer to SFRs in bank 15 for references via the access bank. +# configrange +# Configuration registers occupy addresses to (both +# included). +# configword
[] +# The config word at address
only implements the bits +# indicated via (all others will be forced to 0 by the +# compiler). +# Unless overridden in C code, use the given default . +# The optional will be applied to the value just before +# emitting it into the .asm file (used to disable XINST by default). +# idlocrange +# ID locations occupy addresses to (both included). +# idword
+# Unless overridden in C code, use the given default . +# + +name 18f1220 +ramsize 256 +split 0x80 +configrange 0x300001 0x30000d +configword 0x300001 0xcf 0xff +configword 0x300002 0x0f 0xff +configword 0x300003 0x1f 0xff +configword 0x300005 0x80 0xff +configword 0x300006 0x85 0xff +configword 0x300008 0x03 0xff +configword 0x300009 0xc0 0xff +configword 0x30000a 0x03 0xff +configword 0x30000b 0xe0 0xff +configword 0x30000c 0x03 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f1320 +using 18f1220 + + +name 18f2220 +ramsize 512 +split 0x80 +configrange 0x300001 0x30000d +configword 0x300001 0xcf 0xff +configword 0x300002 0x0f 0xff +configword 0x300003 0x1f 0xff +configword 0x300005 0x83 0xff +configword 0x300006 0x85 0xff +configword 0x300008 0x0f 0xff +configword 0x300009 0xc0 0xff +configword 0x30000a 0x0f 0xff +configword 0x30000b 0xe0 0xff +configword 0x30000c 0x0f 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f2221 +ramsize 512 +split 0x80 +configrange 0x300001 0x30000d +configword 0x300001 0xcf 0x37 +configword 0x300002 0x1f 0xff +configword 0x300003 0x1f 0xff +configword 0x300005 0x87 0xfb +configword 0x300006 0xf5 0x8f 0xbf +configword 0x300008 0x03 0xff +configword 0x300009 0xc0 0xff +configword 0x30000a 0x03 0xff +configword 0x30000b 0xe0 0xff +configword 0x30000c 0x03 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f2320 +using 18f2220 + + +name 18f2321 +using 18f2221 + + +name 18f2331 +ramsize 768 +split 0x60 +configrange 0x300001 0x30000d +configword 0x300001 0xcf 0xff +configword 0x300002 0x0f 0xff +configword 0x300003 0x3f 0xff +configword 0x300004 0x3c 0xff +configword 0x300005 0x9d 0xff +configword 0x300006 0x85 0xff +configword 0x300008 0x0f 0xff +configword 0x300009 0xc0 0xff +configword 0x30000a 0x0f 0xff +configword 0x30000b 0xe0 0xff +configword 0x30000c 0x0f 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f23k20 +ramsize 512 +split 0x60 +configrange 0x300001 0x30000d +configword 0x300001 0xcf 0x37 +configword 0x300002 0x1f 0xff +configword 0x300003 0x1f 0xff +configword 0x300005 0x8f 0xfb +configword 0x300006 0xc5 0xbf 0xbf +configword 0x300008 0x0f 0xff +configword 0x300009 0xc0 0xff +configword 0x30000a 0x0f 0xff +configword 0x30000b 0xe0 0xff +configword 0x30000c 0x0f 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f2410 +ramsize 768 +split 0x80 +configrange 0x300001 0x30000d +configword 0x300001 0xcf 0x37 +configword 0x300002 0x1f 0xff +configword 0x300003 0x1f 0xfb +configword 0x300005 0x87 0xfb +configword 0x300006 0xc5 0xbf 0xbf +configword 0x300008 0x0f 0xff +configword 0x300009 0x40 0xff +configword 0x30000a 0x0f 0xff +configword 0x30000b 0x60 0xff +configword 0x30000c 0x0f 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f242 +ramsize 768 +split 0x80 +configrange 0x300001 0x30000d +configword 0x300001 0x27 0xff +configword 0x300002 0x0f 0xff +configword 0x300003 0x0f 0xff +configword 0x300005 0x01 0xff +configword 0x300006 0x85 0xff +configword 0x300008 0x0f 0xff +configword 0x300009 0xc0 0xff +configword 0x30000a 0x0f 0xff +configword 0x30000b 0xe0 0xff +configword 0x30000c 0x0f 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f2420 +ramsize 768 +split 0x80 +configrange 0x300001 0x30000d +configword 0x300001 0xcf 0x07 +configword 0x300002 0x1f 0xff +configword 0x300003 0x1f 0xff +configword 0x300005 0x87 0xfb +configword 0x300006 0xc5 0xbf 0xbf +configword 0x300008 0x0f 0xff +configword 0x300009 0xc0 0xff +configword 0x30000a 0x0f 0xff +configword 0x30000b 0xe0 0xff +configword 0x30000c 0x0f 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f2423 +ramsize 768 +split 0x80 +configrange 0x300001 0x30000d +configword 0x300001 0xcf 0x07 +configword 0x300002 0x1f 0xff +configword 0x300003 0x1f 0xff +configword 0x300005 0x87 0xfb +configword 0x300006 0xc5 0xbf 0xbf +configword 0x300008 0x0f 0xff +configword 0x300009 0xc0 0xff +configword 0x30000a 0x0f 0xff +configword 0x30000b 0xe0 0xff +configword 0x30000c 0x0f 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f2431 +using 18f2331 + + +name 18f2450 +# 0x200..0x3FF is not implemented, but we leave that to the linker ;-) +ramsize 0x500 +split 0x60 +configrange 0x300000 0x30000d +configword 0x300000 0x3f 0xc7 +configword 0x300001 0xcf 0x37 +configword 0x300002 0x3f 0xdf +configword 0x300003 0x1f 0xff +configword 0x300005 0x86 0xfb +configword 0x300006 0xed 0x97 0xbf +configword 0x300008 0x03 0xff +configword 0x300009 0x40 0xff +configword 0x30000a 0x03 0xff +configword 0x30000b 0x60 0xff +configword 0x30000c 0x03 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + +name 18f2455 +ramsize 2048 +split 0x60 +configrange 0x300000 0x30000d +configword 0x300000 0x3f 0xc0 +configword 0x300001 0xcf 0x35 +configword 0x300002 0x3f 0xdf +configword 0x300003 0x1f 0xff +configword 0x300005 0x87 0xfb +configword 0x300006 0xe5 0x9f 0xbf +configword 0x300008 0x0f 0xff +configword 0x300009 0xc0 0xff +configword 0x30000a 0x0f 0xff +configword 0x30000b 0xe0 0xff +configword 0x30000c 0x0f 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f248 +ramsize 768 +split 0x60 +configrange 0x300001 0x30000d +configword 0x300001 0x27 0xff +configword 0x300002 0x0f 0xff +configword 0x300003 0x0f 0xff +configword 0x300006 0x85 0xff +configword 0x300008 0x0f 0xff +configword 0x300009 0xc0 0xff +configword 0x30000a 0x0f 0xff +configword 0x30000b 0xe0 0xff +configword 0x30000c 0x0f 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f2480 +ramsize 768 +split 0x60 +configrange 0x300001 0x30000d +configword 0x300001 0xcf 0x37 +configword 0x300002 0x1f 0xff +configword 0x300003 0x1f 0xff +configword 0x300005 0x86 0xfb +configword 0x300006 0xd5 0xaf 0xbf +configword 0x300008 0x0f 0xff +configword 0x300009 0xc0 0xff +configword 0x30000a 0x0f 0xff +configword 0x30000b 0xe0 0xff +configword 0x30000c 0x0f 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f24j10 +ramsize 1024 +split 0x80 +configrange 0x300000 0x300005 +configword 0x300000 0xe1 0xff +configword 0x300001 0x04 0xf7 +configword 0x300002 0xc7 0xff +configword 0x300003 0x0f 0xff +configword 0x300005 0x01 0xff +idlocrange 0x200000 0x200007 + + +name 18f24k20 +using 18f23k20 +ramsize 768 + + +name 18f2510 +using 18f2410 +ramsize 1536 + + +name 18f2515 +using 18f2410 +ramsize 4096 + + +name 18f252 +using 18f242 +ramsize 1536 + + +name 18f2520 +using 18f2420 +ramsize 1536 + + +name 18f2523 +using 18f2423 +ramsize 1536 + + +name 18f2525 +ramsize 4096 +split 0x80 +configrange 0x300001 0x30000d +configword 0x300001 0xcf 0x37 +configword 0x300002 0x1f 0xff +configword 0x300003 0x1f 0xff +configword 0x300005 0x87 0xfb +configword 0x300006 0xc5 0xbf 0xbf +configword 0x300008 0x0f 0xff +configword 0x300009 0xc0 0xff +configword 0x30000a 0x0f 0xff +configword 0x30000b 0xe0 0xff +configword 0x30000c 0x0f 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f2550 +using 18f2455 + + +name 18f258 +using 18f248 +ramsize 1536 + + +name 18f2580 +using 18f2480 +ramsize 1536 + + +name 18f2585 +ramsize 4096 +split 0x60 +configrange 0x300001 0x30000d +configword 0x300001 0xcf 0x37 +configword 0x300002 0x1f 0xff +configword 0x300003 0x1f 0xff +configword 0x300005 0x86 0xfb +configword 0x300006 0xf5 0x8f 0xbf +configword 0x300008 0x0f 0xff +configword 0x300009 0xc0 0xff +configword 0x30000a 0x0f 0xff +configword 0x30000b 0xe0 0xff +configword 0x30000c 0x0f 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f25j10 +using 18f24j10 + + +name 18f25k20 +using 18f23k20 +ramsize 1536 + + +name 18f2610 +using 18f2410 +ramsize 4096 + + +name 18f2620 +using 18f2525 + + +name 18f2680 +using 18f2585 + + +name 18f2682 +ramsize 4096 +split 0x60 +configrange 0x300001 0x30000d +configword 0x300001 0xcf 0x37 +configword 0x300002 0x1f 0xff +configword 0x300003 0x1f 0xff +configword 0x300005 0x86 0xfb +configword 0x300006 0xf5 0x8f 0xbf +configword 0x300008 0x3f 0xff +configword 0x300009 0xc0 0xff +configword 0x30000a 0x3f 0xff +configword 0x30000b 0xe0 0xff +configword 0x30000c 0x3f 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f2685 +using 18f2682 + + +name 18f26k20 +using 18f23k20 +ramsize 3936 + + +name 18f4220 +using 18f2220 + + +name 18f4221 +using 18f2221 + + +name 18f4320 +using 18f2220 + + +name 18f4321 +using 18f2221 + + +name 18f4331 +using 18f2331 + + +name 18f43k20 +using 18f23k20 + + +name 18f4410 +using 18f2410 +ramsize 768 + + +name 18f442 +using 18f242 + + +name 18f4420 +using 18f2420 + + +name 18f4423 +using 18f2423 + + +name 18f4431 +using 18f2331 + + +name 18f4450 +using 18f2450 + +name 18f4455 +using 18f2455 + + +name 18f448 +using 18f248 + + +name 18f4480 +using 18f2480 + + +name 18f44j10 +using 18f24j10 + + +name 18f44k20 +using 18f23k20 +ramsize 768 + + +name 18f4510 +using 18f2410 +ramsize 1536 + + +name 18f4515 +using 18f2410 +ramsize 4096 + + +name 18f452 +using 18f242 +ramsize 1536 + + +name 18f4520 +using 18f2420 +ramsize 1536 + + +name 18f4523 +using 18f2423 +ramsize 1536 + +name 18f4525 +using 18f2525 + + +name 18f4550 +using 18f2455 + + +name 18f458 +using 18f248 +ramsize 1536 + + +name 18f4580 +using 18f2480 +ramsize 1536 + + +name 18f4585 +using 18f2585 + + +name 18f45j10 +using 18f24j10 + + +name 18f45k20 +using 18f23k20 +ramsize 1536 + + +name 18f4610 +using 18f2410 +ramsize 4096 + + +name 18f4620 +using 18f2525 + + +name 18f4680 +using 18f2585 + + +name 18f4682 +using 18f2682 + + +name 18f4685 +using 18f2682 + + +name 18f46k20 +using 18f23k20 +ramsize 3936 + + +name 18f6520 +ramsize 2048 +split 0x60 +configrange 0x300001 0x30000d +configword 0x300001 0x27 0xff +configword 0x300002 0x0f 0xff +configword 0x300003 0x0f 0xff +configword 0x300004 0x83 0xff +configword 0x300005 0x03 0xff +configword 0x300006 0x85 0xff +configword 0x300008 0xff 0xff +configword 0x300009 0xc0 0xff +configword 0x30000a 0xff 0xff +configword 0x30000b 0xe0 0xff +configword 0x30000c 0xff 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f6585 +ramsize 3328 +split 0x60 +configrange 0x300001 0x30000d +configword 0x300001 0x2f 0xff +configword 0x300002 0x0f 0xff +configword 0x300003 0x1f 0xff +configword 0x300004 0x83 0xff +configword 0x300005 0x83 0xff +configword 0x300006 0x85 0xff +configword 0x300008 0x0f 0xff +configword 0x300009 0xc0 0xff +configword 0x30000a 0x0f 0xff +configword 0x30000b 0xe0 0xff +configword 0x30000c 0x0f 0xff +configword 0x30000d 0x40 0xff +idlocrange 0x200000 0x200007 + + +name 18f65j50 +ramsize 3904 +split 0x60 +configrange 0x7ff8 0x7ffd +configword 0x7ff8 0xef 0xff 0xbf +configword 0x7ff9 0x07 0xff +configword 0x7ffa 0xc7 0xff +configword 0x7ffb 0x0f 0xff +configword 0x7ffc 0xf8 0xff +configword 0x7ffd 0x0f 0xff + + +name 18f6620 +using 18f6520 +ramsize 3840 + + +name 18f6680 +using 18f6585 + +name 18f66j50 +ramsize 3904 +split 0x60 +configrange 0xfff8 0xfffd +configword 0xfff8 0xef 0xff 0xbf +configword 0xfff9 0x07 0xff +configword 0xfffa 0xc7 0xff +configword 0xfffb 0x0f 0xff +configword 0xfffc 0xf8 0xff +configword 0xfffd 0x0f 0xff + + +name 18f66j55 +ramsize 3904 +split 0x60 +configrange 0x17ff8 0x17ffd +configword 0x17ff8 0xef 0xff 0xbf +configword 0x17ff9 0x07 0xff +configword 0x17ffa 0xc7 0xff +configword 0x17ffb 0x0f 0xff +configword 0x17ffc 0xf8 0xff +configword 0x17ffd 0x0f 0xff + + +name 18f6720 +using 18f6520 +ramsize 3840 + + +name 18f67j50 +ramsize 3904 +split 0x60 +configrange 0x1fff8 0x1fffd +configword 0x1fff8 0xef 0xff 0xbf +configword 0x1fff9 0x07 0xff +configword 0x1fffa 0xc7 0xff +configword 0x1fffb 0x0f 0xff +configword 0x1fffc 0xf8 0xff +configword 0x1fffd 0x0f 0xff + + +name 18f8520 +using 18f6520 + + +name 18f8585 +using 18f6585 + + +name 18f8620 +using 18f6520 +ramsize 3840 + + +name 18f8680 +using 18f6585 + + +name 18f8720 +using 18f6520 +ramsize 3840 + + +name 18f66j60 +ramsize 4096 +split 0x60 +configrange 0xfff8 0xfffd +configword 0xfff8 0xc1 0xff +configword 0xfff9 0x04 0xf7 +configword 0xfffa 0xc7 0xff +configword 0xfffb 0x0f 0xff +configword 0xfffc 0xf8 0xff +configword 0xfffd 0x07 0xff + + +name 18f66j65 +ramsize 4096 +split 0x60 +configrange 0x17ff8 0x17ffd +configword 0x17ff8 0xc1 0xff +configword 0x17ff9 0x04 0xf7 +configword 0x17ffa 0xc7 0xff +configword 0x17ffb 0x0f 0xff +configword 0x17ffc 0xf8 0xff +configword 0x17ffd 0x07 0xff + + +name 18f67j60 +ramsize 4096 +split 0x60 +configrange 0x1fff8 0x1fffd +configword 0x1fff8 0xc1 0xff +configword 0x1fff9 0x04 0xf7 +configword 0x1fffa 0xc7 0xff +configword 0x1fffb 0x0f 0xff +configword 0x1fffc 0xf8 0xff +configword 0x1fffd 0x07 0xff + + +name 18f85j50 +using 18f65j50 + + +name 18f86j50 +using 18f66j50 + + +name 18f86j55 +using 18f66j55 + + +name 18f86j60 +using 18f66j60 + + +name 18f86j65 +using 18f66j65 + + +name 18f87j50 +using 18f67j50 + + +name 18f87j60 +using 18f67j60 + + +name 18f96j60 +using 18f66j60 + + +name 18f96j65 +using 18f66j65 + + +name 18f97j60 +using 18f67j60 + diff --git a/device/include/pic16/pic18f1220.h b/device/include/pic16/pic18f1220.h new file mode 100644 index 0000000..7940113 --- /dev/null +++ b/device/include/pic16/pic18f1220.h @@ -0,0 +1,838 @@ + +/* + * pic18f1220.h - PIC18F1220 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f1220.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F1220_H__ +#define __PIC18F1220_H__ + +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned :1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned INT3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned :1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned :1; + unsigned EEIE:1; + unsigned :1; + unsigned :1; + unsigned OSCFIE:1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned :1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned :1; + unsigned EEIF:1; + unsigned :1; + unsigned :1; + unsigned OSCFIF:1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned :1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned :1; + unsigned EEIP:1; + unsigned :1; + unsigned :1; + unsigned OSCFIP:1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfaa) BAUDCTL; +extern __sfr __at (0xfab) RCSTA; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTAbits_t; + +extern volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +extern __sfr __at (0xfac) TXSTA; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTAbits_t; + +extern volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; +extern __sfr __at (0xfb0) SPBRGH; +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfb6) ECCPAS; +typedef union { + struct { + unsigned PSSBD0:1; + unsigned PSSBD1:1; + unsigned PSSAC0:1; + unsigned PSSAC1:1; + unsigned ECCPAS0:1; + unsigned ECCPAS1:1; + unsigned ECCPAS2:1; + unsigned ECCPASE:1; + }; +} __ECCPASbits_t; + +extern volatile __ECCPASbits_t __at (0xfb6) ECCPASbits; + +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DC1B0:1; + unsigned DC1B1:1; + unsigned P1M0:1; + unsigned P1M1:1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc0) ADCON2; +typedef union { + struct { + unsigned ADCS0:1; + unsigned ADCS1:1; + unsigned ADCS2:1; + unsigned ACQT0:1; + unsigned ACQT1:1; + unsigned ACQT2:1; + unsigned :1; + unsigned ADFM:1; + }; +} __ADCON2bits_t; + +extern volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned PCFG4:1; + unsigned PCFG5:1; + unsigned PCFG6:1; + unsigned :1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned CHS3:1; + unsigned :1; + unsigned :1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned INT2F:1; + unsigned :1; + unsigned INT1E:1; + unsigned INT2E:1; + unsigned :1; + unsigned INT1P:1; + unsigned INT2P:1; + }; + + struct { + unsigned INT1IF:1; + unsigned INT2IF:1; + unsigned :1; + unsigned INT1IE:1; + unsigned INT2IE:1; + unsigned :1; + unsigned INT1IP:1; + unsigned INT2IP:1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned :1; + unsigned T0IP:1; + unsigned :1; + unsigned INTEDG2:1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_11XX_1H 0xFC /* 11XX EXT RC-CLKOUT on RA6 */ +#define _OSC_101X_1H 0xFA /* 101X EXT RC-CLKOUT on RA6 */ +#define _OSC_INT_CLKOUT_on_RA6_Port_on_RA7_1H 0xF9 /* INT RC-CLKOUT_on_RA6_Port_on_RA7 */ +#define _OSC_INT_Port_on_RA6_Port_on_RA7_1H 0xF8 /* INT RC-Port_on_RA6_Port_on_RA7 */ +#define _OSC_EXT_Port_on_RA6_1H 0xF7 /* EXT RC-Port_on_RA6 */ +#define _OSC_HS_PLL_1H 0xF6 /* HS-PLL enabled freq=4xFosc1 */ +#define _OSC_EC_PORT_1H 0xF5 /* EC-Port on RA6 */ +#define _OSC_EC_CLKOUT_1H 0xF4 /* EC-CLKOUT on RA6 */ +#define _OSC_EXT_CLKOUT_on_RA6_1H 0xF3 /* EXT RC-CLKOUT_on_RA6 */ +#define _OSC_HS_1H 0xF2 /* HS */ +#define _OSC_XT_1H 0xF1 /* XT */ +#define _OSC_LP_1H 0xF0 /* LP */ + +/* Fail Safe Clock Monitor Enable 1H options */ +#define _FCMEN_OFF_1H 0xBF /* Disabled */ +#define _FCMEN_ON_1H 0xFF /* Enabled */ + +/* Internal External Switch Over 1H options */ +#define _IESO_OFF_1H 0x7F /* Disabled */ +#define _IESO_ON_1H 0xFF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_0V_2L 0xFF /* 2.0V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_DISABLED_CONTROLLED_2H 0xFE /* Disabled-Controlled by SWDTEN bit */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_32768_2H 0xFF /* 1:32768 */ +#define _WDTPS_1_16384_2H 0xFD /* 1:16384 */ +#define _WDTPS_1_8192_2H 0xFB /* 1:8192 */ +#define _WDTPS_1_4096_2H 0xF9 /* 1:4096 */ +#define _WDTPS_1_2048_2H 0xF7 /* 1:2048 */ +#define _WDTPS_1_1024_2H 0xF5 /* 1:1024 */ +#define _WDTPS_1_512_2H 0xF3 /* 1:512 */ +#define _WDTPS_1_256_2H 0xF1 /* 1:256 */ +#define _WDTPS_1_128_2H 0xEF /* 1:128 */ +#define _WDTPS_1_64_2H 0xED /* 1:64 */ +#define _WDTPS_1_32_2H 0xEB /* 1:32 */ +#define _WDTPS_1_16_2H 0xE9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xE7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xE5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xE3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xE1 /* 1:1 */ + +/* MCLR enable 3H options */ +#define _MCLRE_MCLR_enabled_RA5_input_dis_3H 0xFF /* MCLR enabled__RA5_input_disabled */ +#define _MCLRE_MCLR_disabled_RA5_input_en_3H 0x7F /* MCLR disabled__RA5_input_enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Code Protect 000200-0007FF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 000800-000FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00200-007FF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 00800-00FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00200-007FF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 000800-00FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f1320.h b/device/include/pic16/pic18f1320.h new file mode 100644 index 0000000..0444656 --- /dev/null +++ b/device/include/pic16/pic18f1320.h @@ -0,0 +1,6 @@ +/* + * pic18f1320.h - PIC18F1320 Device Library Header + */ + +#include "pic18f1220.h" + diff --git a/device/include/pic16/pic18f2220.h b/device/include/pic16/pic18f2220.h new file mode 100644 index 0000000..dc7b869 --- /dev/null +++ b/device/include/pic16/pic18f2220.h @@ -0,0 +1,1046 @@ + +/* + * pic18f2220.h - PIC18F2220 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f2220.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F2220_H__ +#define __PIC18F2220_H__ + +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned RA7:1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned CCP2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned AN12:1; + unsigned AN10:1; + unsigned AN8:1; + unsigned AN9:1; + unsigned AN11:1; + unsigned KBI1:1; + unsigned KBI2:1; + unsigned KBI3:1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf9b) OSCTUNE; +typedef union { + struct { + unsigned TUN0:1; + unsigned TUN1:1; + unsigned TUN2:1; + unsigned TUN3:1; + unsigned TUN4:1; + unsigned TUN5:1; + unsigned :1; + unsigned :1; + }; +} __OSCTUNEbits_t; + +extern volatile __OSCTUNEbits_t __at (0xf9b) OSCTUNEbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned CMIE:1; + unsigned OSCFIE:1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned CMIF:1; + unsigned OSCFIF:1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned CMIP:1; + unsigned OSCFIP:1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfab) RCSTA; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTAbits_t; + +extern volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +extern __sfr __at (0xfac) TXSTA; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTAbits_t; + +extern volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfb4) CMCON; +typedef union { + struct { + unsigned CM0:1; + unsigned CM1:1; + unsigned CM2:1; + unsigned CIS:1; + unsigned C1INV:1; + unsigned C2INV:1; + unsigned C1OUT:1; + unsigned C2OUT:1; + }; +} __CMCONbits_t; + +extern volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +extern __sfr __at (0xfb5) CVRCON; +typedef union { + struct { + unsigned CVR0:1; + unsigned CVR1:1; + unsigned CVR2:1; + unsigned CVR3:1; + unsigned CVREF:1; + unsigned CVRR:1; + unsigned CVROE:1; + unsigned CVREN:1; + }; +} __CVRCONbits_t; + +extern volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +extern __sfr __at (0xfba) CCP2CON; +typedef union { + struct { + unsigned CCP2M0:1; + unsigned CCP2M1:1; + unsigned CCP2M2:1; + unsigned CCP2M3:1; + unsigned DCCP2Y:1; + unsigned DCCP2X:1; + unsigned :1; + unsigned :1; + }; + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned DC2B0:1; + unsigned DC2B1:1; + unsigned :1; + unsigned :1; + }; +} __CCP2CONbits_t; + +extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +extern __sfr __at (0xfbb) CCPR2L; +extern __sfr __at (0xfbc) CCPR2H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DCCP1Y:1; + unsigned DCCP1X:1; + unsigned :1; + unsigned :1; + }; + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned DC1B0:1; + unsigned DC1B1:1; + unsigned :1; + unsigned :1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc0) ADCON2; +typedef union { + struct { + unsigned ADCS0:1; + unsigned ADCS1:1; + unsigned ADCS2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned ADFM:1; + }; +} __ADCON2bits_t; + +extern volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned VCFG0:1; + unsigned VCFG1:1; + unsigned :1; + unsigned :1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned CHS3:1; + unsigned :1; + unsigned :1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +typedef union { + struct { + unsigned T0PS0:1; + unsigned T0PS1:1; + unsigned T0PS2:1; + unsigned PSA:1; + unsigned T0SE:1; + unsigned T0CS:1; + unsigned T08BIT:1; + unsigned TMR0ON:1; + }; +} __T0CONbits_t; + +extern volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned INT2F:1; + unsigned :1; + unsigned INT1E:1; + unsigned INT2E:1; + unsigned :1; + unsigned INT1P:1; + unsigned INT2P:1; + }; + + struct { + unsigned INT1IF:1; + unsigned INT2IF:1; + unsigned :1; + unsigned INT1IE:1; + unsigned INT2IE:1; + unsigned :1; + unsigned INT1IP:1; + unsigned INT2IP:1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned :1; + unsigned T0IP:1; + unsigned :1; + unsigned INTEDG2:1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_11XX_1H 0xFC /* 11XX EXT RC-CLKOUT on RA6 */ +#define _OSC_101X_1H 0xFA /* 101X EXT RC-CLKOUT on RA6 */ +#define _OSC_INT_CLKOUT_on_RA6_Port_on_RA7_1H 0xF9 /* INT RC-CLKOUT_on_RA6_Port_on_RA7 */ +#define _OSC_INT_Port_on_RA6_Port_on_RA7_1H 0xF8 /* INT RC-Port_on_RA6_Port_on_RA7 */ +#define _OSC_EXT_Port_on_RA6_1H 0xF7 /* EXT RC-Port_on_RA6 */ +#define _OSC_HS_PLL_1H 0xF6 /* HS-PLL enabled freq=4xFosc1 */ +#define _OSC_EC_PORT_1H 0xF5 /* EC-Port on RA6 */ +#define _OSC_EC_CLKOUT_1H 0xF4 /* EC-CLKOUT on RA6 */ +#define _OSC_EXT_CLKOUT_on_RA6_1H 0xF3 /* EXT RC-CLKOUT_on_RA6 */ +#define _OSC_HS_1H 0xF2 /* HS */ +#define _OSC_XT_1H 0xF1 /* XT */ +#define _OSC_LP_1H 0xF0 /* LP */ + +/* Fail Safe Clock Monitor Enable 1H options */ +#define _FCMEN_OFF_1H 0xBF /* Disabled */ +#define _FCMEN_ON_1H 0xFF /* Enabled */ + +/* Internal External Switch Over 1H options */ +#define _IESO_OFF_1H 0x7F /* Disabled */ +#define _IESO_ON_1H 0xFF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_0V_2L 0xFF /* 2.0V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_DISABLED_CONTROLLED_2H 0xFE /* Disabled-Controlled by SWDTEN bit */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_32768_2H 0xFF /* 1:32768 */ +#define _WDTPS_1_16384_2H 0xFD /* 1:16384 */ +#define _WDTPS_1_8192_2H 0xFB /* 1:8192 */ +#define _WDTPS_1_4096_2H 0xF9 /* 1:4096 */ +#define _WDTPS_1_2048_2H 0xF7 /* 1:2048 */ +#define _WDTPS_1_1024_2H 0xF5 /* 1:1024 */ +#define _WDTPS_1_512_2H 0xF3 /* 1:512 */ +#define _WDTPS_1_256_2H 0xF1 /* 1:256 */ +#define _WDTPS_1_128_2H 0xEF /* 1:128 */ +#define _WDTPS_1_64_2H 0xED /* 1:64 */ +#define _WDTPS_1_32_2H 0xEB /* 1:32 */ +#define _WDTPS_1_16_2H 0xE9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xE7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xE5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xE3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xE1 /* 1:1 */ + +/* CCP2 Mux 3H options */ +#define _CCP2MUX_RC1_3H 0xFF /* RC1 */ +#define _CCP2MUX_RB3_3H 0xFE /* RB3 */ + +/* PortB A/D Enable 3H options */ +#define _PBADEN_PORTB_4_0__analog_inputs_on_RSET_3H 0xFF /* PORTB<4:0> configured as analog_inputs_on_RESET */ +#define _PBADEN_PORTB_4_0__digital_I_O_on_REST_3H 0xFD /* PORTB<4:0> configured as digital_I_O_on_RESET */ + +/* MCLR enable 3H options */ +#define _MCLRE_MCLR_Enabled_RE3_Disabled_3H 0xFF /* MCLR Enabled_RE3_Disabled */ +#define _MCLRE_MCLR_Disabled_RE3_Enabled_3H 0x7F /* MCLR Disabled__RE3_Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Code Protect 000200-0007FF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 000800-000FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00200-007FF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 00800-00FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00200-007FF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 00800-00FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f2221.h b/device/include/pic16/pic18f2221.h new file mode 100644 index 0000000..c2d63e2 --- /dev/null +++ b/device/include/pic16/pic18f2221.h @@ -0,0 +1,1377 @@ +/* + * pic18f2221.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F2221_H__ +#define __PIC18F2221_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP Oscillator +#define _OSC_XT_1H 0xF1 // XT Oscillator +#define _OSC_HS_1H 0xF2 // HS Oscillator +#define _OSC_RC_1H 0xF3 // External RC oscillator, CLKO function on RA6 +#define _OSC_EC_1H 0xF4 // EC oscillator, CLKO function on RA6 +#define _OSC_ECIO_1H 0xF5 // EC oscillator, port function on RA6 +#define _OSC_HSPLL_1H 0xF6 // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) +#define _OSC_RCIO_1H 0xF7 // External RC oscillator, port function on RA6 +#define _OSC_INTIO2_1H 0xF8 // Internal oscillator block, port function on RA6 and RA7 +#define _OSC_INTIO1_1H 0xF9 // Internal oscillator block, CLKO function on RA6, port function on RA7 +#define _FCMEN_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled +#define _FCMEN_ON_1H 0xFF // Fail-Safe Clock Monitor enabled +#define _IESO_OFF_1H 0x7F // Oscillator Switchover mode disabled +#define _IESO_ON_1H 0xFF // Oscillator Switchover mode enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // PWRT enabled +#define _PWRT_OFF_2L 0xFF // PWRT disabled +#define _BOR_OFF_2L 0xF9 // Brown-out Reset disabled in hardware and software +#define _BOR_SOFT_2L 0xFB // Brown-out Reset enabled and controlled by software (SBOREN is enabled) +#define _BOR_NOSLP_2L 0xFD // Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) +#define _BOR_ON_2L 0xFF // Brown-out Reset enabled in hardware only (SBOREN is disabled) +#define _BORV_0_2L 0xE7 // Maximum Setting +#define _BORV_1_2L 0xEF // +#define _BORV_2_2L 0xF7 // +#define _BORV_3_2L 0xFF // Minimum Setting + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit) +#define _WDT_ON_2H 0xFF // WDT enabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // RE3 input pin enabled; MCLR disabled +#define _MCLRE_ON_3H 0xFF // MCLR pin enabled; RE3 input pin disabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 configured for higher power operation +#define _LPT1OSC_ON_3H 0xFF // Timer1 configured for low-power operation +#define _PBADEN_DIG_3H 0xFD // PORTB<4:0> pins are configured as digital I/O on Reset +#define _PBADEN_ANA_3H 0xFF // PORTB<4:0> pins are configured as analog input channels on Reset +#define _CCP2MX_RB3_3H 0xFE // CCP2 input/output is multiplexed with RB3 +#define _CCP2MX_RC1_3H 0xFF // CCP2 input/output is multiplexed with RC1 + +// CONFIG4L Options +#define _STVREN_OFF_4L 0xFE // Stack full/underflow will not cause Reset +#define _STVREN_ON_4L 0xFF // Stack full/underflow will cause Reset +#define _LVP_OFF_4L 0xFB // Single-Supply ICSP disabled +#define _LVP_ON_4L 0xFF // Single-Supply ICSP enabled +#define _BBSIZ_BB256_4L 0xCF // 256 Word +#define _BBSIZ_BB512_4L 0xFF // 512 Word +#define _XINST_OFF_4L 0xBF // Instruction set extension and Indexed Addressing mode disabled (Legacy mode) +#define _XINST_ON_4L 0xFF // Instruction set extension and Indexed Addressing mode enabled +#define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug +#define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Block 0 code-protected +#define _CP0_OFF_5L 0xFF // Block 0 not code-protected +#define _CP1_ON_5L 0xFD // Block 1 code-protected +#define _CP1_OFF_5L 0xFF // Block 1 not code-protected + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Boot block code-protected +#define _CPB_OFF_5H 0xFF // Boot block not code-protected +#define _CPD_ON_5H 0x7F // Data EEPROM code-protected +#define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Block 0 write-protected +#define _WRT0_OFF_6L 0xFF // Block 0 not write-protected +#define _WRT1_ON_6L 0xFD // Block 1 write-protected +#define _WRT1_OFF_6L 0xFF // Block 1 not write-protected + +// CONFIG6H Options +#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected +#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected +#define _WRTB_ON_6H 0xBF // Boot block write-protected +#define _WRTB_OFF_6H 0xFF // Boot block not write-protected +#define _WRTD_ON_6H 0x7F // Data EEPROM write-protected +#define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Block 0 protected from table reads executed in other blocks +#define _EBTR0_OFF_7L 0xFF // Block 0 not protected from table reads executed in other blocks +#define _EBTR1_ON_7L 0xFD // Block 1 protected from table reads executed in other blocks +#define _EBTR1_OFF_7L 0xFF // Block 1 not protected from table reads executed in other blocks + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Boot block protected from table reads executed in other blocks +#define _EBTRB_OFF_7H 0xFF // Boot block not protected from table reads executed in other blocks +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned C1OUT_PORTA : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned OSC1 : 1; + }; + struct { + unsigned C1N : 1; + unsigned C2N : 1; + unsigned C2P : 1; + unsigned C1P : 1; + unsigned T0CKI : 1; + unsigned C2OUT_PORTA : 1; + unsigned CLKO : 1; + unsigned CLKI : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned CVREF : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CCP2_PORTB : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN12 : 1; + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned AN9 : 1; + unsigned AN11 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned CCP2_PORTC : 1; + unsigned P1A : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned T1CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT_CMCON : 1; + unsigned C2OUT_CMCON : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) ECCP1DEL; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PRSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +extern __sfr __at (0xFB7) PWM1CON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PRSEN : 1; + }; +} __PWM1CONbits_t; +extern volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFB8) BAUDCTL; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCTLbits_t; +extern volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R_W : 1; + unsigned : 1; + unsigned : 1; + unsigned D_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned TOUTPS0 : 1; + unsigned TOUTPS1 : 1; + unsigned TOUTPS2 : 1; + unsigned TOUTPS3 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned FLTS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T016BIT : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned SP0 : 1; + unsigned SP1 : 1; + unsigned SP2 : 1; + unsigned SP3 : 1; + unsigned SP4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKOVF : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f2320.h b/device/include/pic16/pic18f2320.h new file mode 100644 index 0000000..cee67e1 --- /dev/null +++ b/device/include/pic16/pic18f2320.h @@ -0,0 +1,6 @@ +/* + * pic18f2320.h - PIC18F2320 Device Library Header + */ + +#include "pic18f2220.h" + diff --git a/device/include/pic16/pic18f2321.h b/device/include/pic16/pic18f2321.h new file mode 100644 index 0000000..9d11873 --- /dev/null +++ b/device/include/pic16/pic18f2321.h @@ -0,0 +1,1378 @@ +/* + * pic18f2321.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F2321_H__ +#define __PIC18F2321_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP Oscillator +#define _OSC_XT_1H 0xF1 // XT Oscillator +#define _OSC_HS_1H 0xF2 // HS Oscillator +#define _OSC_RC_1H 0xF3 // External RC oscillator, CLKO function on RA6 +#define _OSC_EC_1H 0xF4 // EC oscillator, CLKO function on RA6 +#define _OSC_ECIO_1H 0xF5 // EC oscillator, port function on RA6 +#define _OSC_HSPLL_1H 0xF6 // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) +#define _OSC_RCIO_1H 0xF7 // External RC oscillator, port function on RA6 +#define _OSC_INTIO2_1H 0xF8 // Internal oscillator block, port function on RA6 and RA7 +#define _OSC_INTIO1_1H 0xF9 // Internal oscillator block, CLKO function on RA6, port function on RA7 +#define _FCMEN_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled +#define _FCMEN_ON_1H 0xFF // Fail-Safe Clock Monitor enabled +#define _IESO_OFF_1H 0x7F // Oscillator Switchover mode disabled +#define _IESO_ON_1H 0xFF // Oscillator Switchover mode enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // PWRT enabled +#define _PWRT_OFF_2L 0xFF // PWRT disabled +#define _BOR_OFF_2L 0xF9 // Brown-out Reset disabled in hardware and software +#define _BOR_SOFT_2L 0xFB // Brown-out Reset enabled and controlled by software (SBOREN is enabled) +#define _BOR_NOSLP_2L 0xFD // Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) +#define _BOR_ON_2L 0xFF // Brown-out Reset enabled in hardware only (SBOREN is disabled) +#define _BORV_0_2L 0xE7 // Maximum Setting +#define _BORV_1_2L 0xEF // +#define _BORV_2_2L 0xF7 // +#define _BORV_3_2L 0xFF // Minimum Setting + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit) +#define _WDT_ON_2H 0xFF // WDT enabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // RE3 input pin enabled; MCLR disabled +#define _MCLRE_ON_3H 0xFF // MCLR pin enabled; RE3 input pin disabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 configured for higher power operation +#define _LPT1OSC_ON_3H 0xFF // Timer1 configured for low-power operation +#define _PBADEN_DIG_3H 0xFD // PORTB<4:0> pins are configured as digital I/O on Reset +#define _PBADEN_ANA_3H 0xFF // PORTB<4:0> pins are configured as analog input channels on Reset +#define _CCP2MX_RB3_3H 0xFE // CCP2 input/output is multiplexed with RB3 +#define _CCP2MX_RC1_3H 0xFF // CCP2 input/output is multiplexed with RC1 + +// CONFIG4L Options +#define _STVREN_OFF_4L 0xFE // Stack full/underflow will not cause Reset +#define _STVREN_ON_4L 0xFF // Stack full/underflow will cause Reset +#define _LVP_OFF_4L 0xFB // Single-Supply ICSP disabled +#define _LVP_ON_4L 0xFF // Single-Supply ICSP enabled +#define _BBSIZ_BB256_4L 0xCF // 256 Word +#define _BBSIZ_BB512_4L 0xDF // 512 Word +#define _BBSIZ_BB1K_4L 0xFF // 1024 Word +#define _XINST_OFF_4L 0xBF // Instruction set extension and Indexed Addressing mode disabled (Legacy mode) +#define _XINST_ON_4L 0xFF // Instruction set extension and Indexed Addressing mode enabled +#define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug +#define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Block 0 code-protected +#define _CP0_OFF_5L 0xFF // Block 0 not code-protected +#define _CP1_ON_5L 0xFD // Block 1 code-protected +#define _CP1_OFF_5L 0xFF // Block 1 not code-protected + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Boot block code-protected +#define _CPB_OFF_5H 0xFF // Boot block not code-protected +#define _CPD_ON_5H 0x7F // Data EEPROM code-protected +#define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Block 0 write-protected +#define _WRT0_OFF_6L 0xFF // Block 0 not write-protected +#define _WRT1_ON_6L 0xFD // Block 1 write-protected +#define _WRT1_OFF_6L 0xFF // Block 1 not write-protected + +// CONFIG6H Options +#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected +#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected +#define _WRTB_ON_6H 0xBF // Boot block write-protected +#define _WRTB_OFF_6H 0xFF // Boot block not write-protected +#define _WRTD_ON_6H 0x7F // Data EEPROM write-protected +#define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Block 0 protected from table reads executed in other blocks +#define _EBTR0_OFF_7L 0xFF // Block 0 not protected from table reads executed in other blocks +#define _EBTR1_ON_7L 0xFD // Block 1 protected from table reads executed in other blocks +#define _EBTR1_OFF_7L 0xFF // Block 1 not protected from table reads executed in other blocks + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Boot block protected from table reads executed in other blocks +#define _EBTRB_OFF_7H 0xFF // Boot block not protected from table reads executed in other blocks +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned C1OUT_PORTA : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned OSC1 : 1; + }; + struct { + unsigned C1N : 1; + unsigned C2N : 1; + unsigned C2P : 1; + unsigned C1P : 1; + unsigned T0CKI : 1; + unsigned C2OUT_PORTA : 1; + unsigned CLKO : 1; + unsigned CLKI : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned CVREF : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CCP2_PORTB : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN12 : 1; + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned AN9 : 1; + unsigned AN11 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned CCP2_PORTC : 1; + unsigned P1A : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned T1CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT_CMCON : 1; + unsigned C2OUT_CMCON : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) ECCP1DEL; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PRSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +extern __sfr __at (0xFB7) PWM1CON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PRSEN : 1; + }; +} __PWM1CONbits_t; +extern volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFB8) BAUDCTL; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCTLbits_t; +extern volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R_W : 1; + unsigned : 1; + unsigned : 1; + unsigned D_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned TOUTPS0 : 1; + unsigned TOUTPS1 : 1; + unsigned TOUTPS2 : 1; + unsigned TOUTPS3 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned FLTS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T016BIT : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned SP0 : 1; + unsigned SP1 : 1; + unsigned SP2 : 1; + unsigned SP3 : 1; + unsigned SP4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKOVF : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f2331.h b/device/include/pic16/pic18f2331.h new file mode 100644 index 0000000..431c3ad --- /dev/null +++ b/device/include/pic16/pic18f2331.h @@ -0,0 +1,6 @@ +/* + * pic18f2331.h - device specific declarations + */ + +#include "pic18f4331.h" + diff --git a/device/include/pic16/pic18f23k20.h b/device/include/pic16/pic18f23k20.h new file mode 100644 index 0000000..2b8f3d2 --- /dev/null +++ b/device/include/pic16/pic18f23k20.h @@ -0,0 +1,6 @@ +/* + * pic18f23k20.h - device specific declarations + */ + +#include "pic18f46k20.h" + diff --git a/device/include/pic16/pic18f2410.h b/device/include/pic16/pic18f2410.h new file mode 100644 index 0000000..3cd07f4 --- /dev/null +++ b/device/include/pic16/pic18f2410.h @@ -0,0 +1,6 @@ +/* + * pic18f2410.h - device specific declarations + */ + +#include "pic18f4610.h" + diff --git a/device/include/pic16/pic18f242.h b/device/include/pic16/pic18f242.h new file mode 100644 index 0000000..d86564f --- /dev/null +++ b/device/include/pic16/pic18f242.h @@ -0,0 +1,927 @@ + +/* + * pic18f242.h - PIC18F242 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f242.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F242_H__ +#define __PIC18F242_H__ + +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned :1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned INT3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfab) RCSTA; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTAbits_t; + +extern volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +extern __sfr __at (0xfac) TXSTA; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTAbits_t; + +extern volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfba) CCP2CON; +typedef union { + struct { + unsigned CCP2M0:1; + unsigned CCP2M1:1; + unsigned CCP2M2:1; + unsigned CCP2M3:1; + unsigned DCCP2Y:1; + unsigned DCCP2X:1; + unsigned :1; + unsigned :1; + }; +} __CCP2CONbits_t; + +extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +extern __sfr __at (0xfbb) CCPR2L; +extern __sfr __at (0xfbc) CCPR2H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DCCP1Y:1; + unsigned DCCP1X:1; + unsigned :1; + unsigned :1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned :1; + unsigned :1; + unsigned ADCS2:1; + unsigned ADFM:1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned :1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned ADCS0:1; + unsigned ADCS1:1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +typedef union { + struct { + unsigned T0PS0:1; + unsigned T0PS1:1; + unsigned T0PS2:1; + unsigned PSA:1; + unsigned T0SE:1; + unsigned T0CS:1; + unsigned T08BIT:1; + unsigned TMR0ON:1; + }; +} __T0CONbits_t; + +extern volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned INT2F:1; + unsigned :1; + unsigned INT1E:1; + unsigned INT2E:1; + unsigned :1; + unsigned INT1P:1; + unsigned INT2P:1; + }; + + struct { + unsigned INT1IF:1; + unsigned INT2IF:1; + unsigned :1; + unsigned INT1IE:1; + unsigned INT2IE:1; + unsigned :1; + unsigned INT1IP:1; + unsigned INT2IP:1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned :1; + unsigned T0IP:1; + unsigned :1; + unsigned INTEDG2:1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */ +#define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */ +#define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */ +#define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */ +#define _OSC_RC_1H 0xFB /* RC */ +#define _OSC_HS_1H 0xFA /* HS */ +#define _OSC_XT_1H 0xF9 /* XT */ +#define _OSC_LP_1H 0xF8 /* LP */ + +/* Osc. Switch Enable 1H options */ +#define _OSCS_OFF_1H 0xFF /* Disabled */ +#define _OSCS_ON_1H 0xDF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_0V_2L 0xFF /* 2.0V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_OFF_2H 0xFE /* Disabled */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_128_2H 0xFF /* 1:128 */ +#define _WDTPS_1_64_2H 0xFD /* 1:64 */ +#define _WDTPS_1_32_2H 0xFB /* 1:32 */ +#define _WDTPS_1_16_2H 0xF9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xF7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xF5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xF3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xF1 /* 1:1 */ + +/* CCP2 Mux 3H options */ +#define _CCP2MUX_RC1_3H 0xFF /* RC1 */ +#define _CCP2MUX_RB3_3H 0xFE /* RB3 */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Code Protect 00200-01FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 02000-03FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00200-01FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 02000-03FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00200-01FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 02000-03FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f2420.h b/device/include/pic16/pic18f2420.h new file mode 100644 index 0000000..a482405 --- /dev/null +++ b/device/include/pic16/pic18f2420.h @@ -0,0 +1,6 @@ +/* + * pic18f2420.h - PIC18F2420 Device Library Header + */ + +#include "pic18f4520.h" + diff --git a/device/include/pic16/pic18f2423.h b/device/include/pic16/pic18f2423.h new file mode 100644 index 0000000..cdda591 --- /dev/null +++ b/device/include/pic16/pic18f2423.h @@ -0,0 +1,6 @@ +/* + * pic18f2423.h - Device Library Header + */ + +#include "pic18f4523.h" + diff --git a/device/include/pic16/pic18f2431.h b/device/include/pic16/pic18f2431.h new file mode 100644 index 0000000..a54b875 --- /dev/null +++ b/device/include/pic16/pic18f2431.h @@ -0,0 +1,6 @@ +/* + * pic18f2431.h - device specific declarations + */ + +#include "pic18f4331.h" + diff --git a/device/include/pic16/pic18f2450.h b/device/include/pic16/pic18f2450.h new file mode 100644 index 0000000..f4ff5ad --- /dev/null +++ b/device/include/pic16/pic18f2450.h @@ -0,0 +1,6 @@ +/* + * pic18f2450.h - device specific declarations + */ + +#include "pic18f4450.h" + diff --git a/device/include/pic16/pic18f2455.h b/device/include/pic16/pic18f2455.h new file mode 100644 index 0000000..f5bd8c9 --- /dev/null +++ b/device/include/pic16/pic18f2455.h @@ -0,0 +1,1705 @@ +/* + * pic18f2455.h - Device Library Header for 18F{2455,2550,4455,4550} + * + * This file is part of the GNU PIC Library. + * + * May, 2005 + * The GNU PIC Library is maintained by + * Raphael Neider + * + * originally designed by + * Vangelis Rokas + * + * $Id: pic18f2455.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F2455_H__ +#define __PIC18F2455_H__ 1 + +extern __sfr __at (0xF62) SPPDATA; +typedef union { + struct { + unsigned DATA : 8; + }; +} __SPPDATA_t; +extern volatile __SPPDATA_t __at (0xF62) SPPDATAbits; + +extern __sfr __at (0xF63) SPPCFG; +typedef union { + struct { + unsigned WS : 4; + unsigned CLK1EN : 1; + unsigned CSEN : 1; + unsigned CLKCFG : 2; + }; +} __SPPCFG_t; +extern volatile __SPPCFG_t __at (0xF63) SPPCFGbits; + +extern __sfr __at (0xF64) SPPEPS; +typedef union { + struct { + unsigned ADDR : 4; + unsigned SPPBUSY : 1; + unsigned : 1; + unsigned WRSPP : 1; + unsigned RDSPP : 1; + }; +} __SPPEPS_t; +extern volatile __SPPEPS_t __at (0xF64) SPPEPSbits; + +extern __sfr __at (0xF65) SPPCON; +typedef union { + struct { + unsigned SPPEN : 1; + unsigned SPPOWN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SPPCON_t; +extern volatile __SPPCON_t __at (0xF65) SPPCONbits; + +extern __sfr __at (0xF66) UFRML; +typedef union { + struct { + unsigned FRM : 8; + }; +} __UFRML_t; +extern volatile __UFRML_t __at (0xF66) UFRMLbits; + +extern __sfr __at (0xF67) UFRMH; +typedef union { + struct { + unsigned FRM : 3; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UFRMH_t; +extern volatile __UFRMH_t __at (0xF67) UFRMHbits; + +extern __sfr __at (0xF68) UIR; +typedef union { + struct { + unsigned URSTIF : 1; + unsigned UERRIF : 1; + unsigned ACTVIF : 1; + unsigned TRNIF : 1; + unsigned IDLEIF : 1; + unsigned STALLIF : 1; + unsigned SOFIF : 1; + unsigned : 1; + }; +} __UIR_t; +extern volatile __UIR_t __at (0xF68) UIRbits; + +extern __sfr __at (0xF69) UIE; +typedef union { + struct { + unsigned URSTIE : 1; + unsigned UERRIE : 1; + unsigned ACTVIE : 1; + unsigned TRNIE : 1; + unsigned IDLEIE : 1; + unsigned STALLIE : 1; + unsigned SOFIE : 1; + unsigned : 1; + }; +} __UIE_t; +extern volatile __UIE_t __at (0xF69) UIEbits; + +extern __sfr __at (0xF6A) UEIR; +typedef union { + struct { + unsigned PIDEF : 1; + unsigned CRC5EF : 1; + unsigned CRC16EF : 1; + unsigned DFN8EF : 1; + unsigned BTOEF : 1; + unsigned : 1; + unsigned : 1; + unsigned BTSEF : 1; + }; +} __UEIR_t; +extern volatile __UEIR_t __at (0xF6A) UEIRbits; + +extern __sfr __at (0xF6B) UEIE; +typedef union { + struct { + unsigned PIDEE : 1; + unsigned CRC5EE : 1; + unsigned CRC16EE : 1; + unsigned DFN8EE : 1; + unsigned BTOEE : 1; + unsigned : 1; + unsigned : 1; + unsigned BTSEE : 1; + }; +} __UEIE_t; +extern volatile __UEIE_t __at (0xF6B) UEIEbits; + +extern __sfr __at (0xF6C) USTAT; +typedef union { + struct { + unsigned : 1; + unsigned PPBI : 1; + unsigned DIR : 1; + unsigned ENDP : 4; + unsigned : 1; + }; +} __USTAT_t; +extern volatile __USTAT_t __at (0xF6C) USTATbits; + +extern __sfr __at (0xF6D) UCON; +typedef union { + struct { + unsigned : 1; + unsigned SUSPND : 1; + unsigned RESUME : 1; + unsigned USBEN : 1; + unsigned PKTDIS : 1; + unsigned SE0 : 1; + unsigned PPBRST : 1; + unsigned : 1; + }; +} __UCON_t; +extern volatile __UCON_t __at (0xF6D) UCONbits; + +extern __sfr __at (0xF6E) UADDR; +typedef union { + struct { + unsigned ADDR : 7; + unsigned : 1; + }; +} __UADDR_t; +extern volatile __UADDR_t __at (0xF6E) UADDRbits; + +extern __sfr __at (0xF6F) UCFG; +typedef union { + struct { + unsigned PPB : 2; + unsigned FSEN : 1; + unsigned UTRDIS : 1; + unsigned UPUEN : 1; + unsigned : 1; + unsigned UOEMON : 1; + unsigned UTEYE : 1; + }; +} __UCFG_t; +extern volatile __UCFG_t __at (0xF6F) UCFGbits; + +extern __sfr __at (0xF70) UEP0; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP0_t; +extern volatile __UEP0_t __at (0xF70) UEP0bits; + +extern __sfr __at (0xF71) UEP1; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP1_t; +extern volatile __UEP1_t __at (0xF71) UEP1bits; + +extern __sfr __at (0xF72) UEP2; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP2_t; +extern volatile __UEP2_t __at (0xF72) UEP2bits; + +extern __sfr __at (0xF73) UEP3; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP3_t; +extern volatile __UEP3_t __at (0xF73) UEP3bits; + +extern __sfr __at (0xF74) UEP4; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP4_t; +extern volatile __UEP4_t __at (0xF74) UEP4bits; + +extern __sfr __at (0xF75) UEP5; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP5_t; +extern volatile __UEP5_t __at (0xF75) UEP5bits; + +extern __sfr __at (0xF76) UEP6; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP6_t; +extern volatile __UEP6_t __at (0xF76) UEP6bits; + +extern __sfr __at (0xF77) UEP7; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP7_t; +extern volatile __UEP7_t __at (0xF77) UEP7bits; + +extern __sfr __at (0xF78) UEP8; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP8_t; +extern volatile __UEP8_t __at (0xF78) UEP8bits; + +extern __sfr __at (0xF79) UEP9; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP9_t; +extern volatile __UEP9_t __at (0xF79) UEP9bits; + +extern __sfr __at (0xF7A) UEP10; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP10_t; +extern volatile __UEP10_t __at (0xF7A) UEP10bits; + +extern __sfr __at (0xF7B) UEP11; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP11_t; +extern volatile __UEP11_t __at (0xF7B) UEP11bits; + +extern __sfr __at (0xF7C) UEP12; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP12_t; +extern volatile __UEP12_t __at (0xF7C) UEP12bits; + +extern __sfr __at (0xF7D) UEP13; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP13_t; +extern volatile __UEP13_t __at (0xF7D) UEP13bits; + +extern __sfr __at (0xF7E) UEP14; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP14_t; +extern volatile __UEP14_t __at (0xF7E) UEP14bits; + +extern __sfr __at (0xF7F) UEP15; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP15_t; +extern volatile __UEP15_t __at (0xF7F) UEP15bits; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned : 1; + }; + struct { + unsigned RA : 7; + unsigned : 1; + }; + /* aliases */ + struct { + unsigned C1INN :1; + unsigned C2INN :1; + unsigned C2INP :1; + unsigned C1INP :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + unsigned OSC2 :1; + unsigned :1; + }; + struct { + unsigned AN0 :1; + unsigned AN1 :1; + unsigned AN2 :1; + unsigned AN3 :1; + unsigned T0CKI :1; + unsigned AN4 :1; + unsigned :1; + unsigned :1; + }; +} __PORTA_t; +extern volatile __PORTA_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned RB : 8; + }; + /* aliases */ + struct { + unsigned :1; + unsigned :1; + unsigned AN8 :1; + unsigned AN9 :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTB_t; +extern volatile __PORTB_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned RC : 8; + }; + /* aliases */ + struct { + unsigned T1CKI :1; + unsigned T1OSCI :1; + unsigned ECCPA :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned U1TX :1; + unsigned U1RX :1; + }; + struct { + unsigned T3CKI :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + struct { + unsigned T1OSCO :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTC_t; +extern volatile __PORTC_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __PORTD_t; +extern volatile __PORTD_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RDPU : 1; + }; + struct { + unsigned RE : 8; + }; + /* aliases */ + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned MCLR :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTE_t; +extern volatile __PORTE_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned : 1; + }; +} __LATA_t; +extern volatile __LATA_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATB_t; +extern volatile __LATB_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATC_t; +extern volatile __LATC_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATD_t; +extern volatile __LATD_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATE_t; +extern volatile __LATE_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned : 1; + }; +} __TRISA_t; +extern volatile __TRISA_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISB_t; +extern volatile __TRISB_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISC_t; +extern volatile __TRISC_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISD_t; +extern volatile __TRISD_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISE_t; +extern volatile __TRISE_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN : 5; + unsigned : 1; + unsigned : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNE_t; +extern volatile __OSCTUNE_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned SPPIE : 1; + }; +} __PIE1_t; +extern volatile __PIE1_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned SPPIF : 1; + }; +} __PIR1_t; +extern volatile __PIR1_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned SPPIP : 1; + }; +} __IPR1_t; +extern volatile __IPR1_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned TMR3IE : 1; + unsigned HLVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned USBIE : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; +} __PIE2_t; +extern volatile __PIE2_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned TMR3IF : 1; + unsigned HLVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned USBIF : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; +} __PIR2_t; +extern volatile __PIR2_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned TMR3IP : 1; + unsigned HLVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned USBIP : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; +} __IPR2_t; +extern volatile __IPR2_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1_t; +extern volatile __EECON1_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; +} __RCSTA_t; +extern volatile __RCSTA_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTA_t; +extern volatile __TXSTA_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned NOT_T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; +} __T3CON_t; +extern volatile __T3CON_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT : 1; + unsigned C2OUT : 1; + }; +} __CMCON_t; +extern volatile __CMCON_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCON_t; +extern volatile __CVRCON_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1AS_t; +extern volatile __ECCP1AS_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) ECCP1DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __ECCP1DEL_t; +extern volatile __ECCP1DEL_t __at (0xFB7) ECCP1DELbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned TXCKP : 1; + unsigned RXDTP : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; +} __BAUDCON_t; +extern volatile __BAUDCON_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CON_t; +extern volatile __CCP2CON_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; +} __CCP1CON_t; +extern volatile __CCP1CON_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2_t; +extern volatile __ADCON2_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1_t; +extern volatile __ADCON1_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0_t; +extern volatile __ADCON0_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2_t; +extern volatile __SSPCON2_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1_t; +extern volatile __SSPCON1_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; +} __SSPSTAT_t; +extern volatile __SSPSTAT_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned TOUTPS0 : 1; + unsigned TOUTPS1 : 1; + unsigned TOUTPS2 : 1; + unsigned TOUTPS3 : 1; + unsigned : 1; + }; +} __T2CON_t; +extern volatile __T2CON_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned NOT_T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; +} __T1CON_t; +extern volatile __T1CON_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; +} __RCON_t; +extern volatile __RCON_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCON_t; +extern volatile __WDTCON_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned HLVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; +} __HLVDCON_t; +extern volatile __HLVDCON_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS : 2; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF : 3; + unsigned IDLEN : 1; + }; +} __OSCCON_t; +extern volatile __OSCCON_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; +} __T0CON_t; +extern volatile __T0CON_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUS_t; +extern volatile __STATUS_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; +typedef union { + struct { + unsigned FSR2H : 4; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __FSR2H_t; +extern volatile __FSR2H_t __at (0xFDA) FSR2Hbits; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; +typedef union { + struct { + unsigned BSR : 4; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __BSR_t; +extern volatile __BSR_t __at (0xFE0) BSRbits; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; +typedef union { + struct { + unsigned FSR1H : 4; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __FSR1H_t; +extern volatile __FSR1H_t __at (0xFE2) FSR1Hbits; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; +typedef union { + struct { + unsigned FSR0H : 4; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __FSR0H_t; +extern volatile __FSR0H_t __at (0xFEA) FSR0Hbits; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; +} __INTCON3_t; +extern volatile __INTCON3_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned RBPU : 1; + }; +} __INTCON2_t; +extern volatile __INTCON2_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCON_t; +extern volatile __INTCON_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; +typedef union { + struct { + unsigned TBLPTRU : 6; + unsigned : 1; + unsigned : 1; + }; +} __TBLPTRU_t; +extern volatile __TBLPTRU_t __at (0xFF8) TBLPTRUbits; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; +typedef union { + struct { + unsigned PCH : 8; + }; +} __PCLATH_t; +extern volatile __PCLATH_t __at (0xFFA) PCLATHbits; + +extern __sfr __at (0xFFB) PCLATU; +typedef union { + struct { + unsigned PCU : 5; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PCLATU_t; +extern volatile __PCLATU_t __at (0xFFB) PCLATUbits; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR : 5; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKFUL : 1; + }; +} __STKPTR_t; +extern volatile __STKPTR_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; +typedef union { + struct { + unsigned TOSU : 5; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TOSU_t; +extern volatile __TOSU_t __at (0xFFF) TOSUbits; + +/* Configuration register locations */ +#define __CONFIG1L 0x300000 +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + +/* Full-Speed USB Clock Source Selection 1L options */ +#define _USBPLL_CLOCK_SRC_FROM_96MHZ_PLL_2_1L 0xFF /* Clock src from 96MHz PLL/2 */ +#define _USBPLL_CLOCK_SRC_FROM_OSC1_OSC2_1L 0xDF /* Clock src from OSC1/OSC2 */ + +/* CPU System Clock Postscaler 1L options */ +#define _CPUDIV__OSC1_OSC2_SRC___4__96MHZ_PLL_SRC___6__1L 0xFF /* [OSC1/OSC2 Src: /4][96MHz PLL Src: /6] */ +#define _CPUDIV__OSC1_OSC2_SRC___3__96MHZ_PLL_SRC___4__1L 0xF7 /* [OSC1/OSC2 Src: /3][96MHz PLL Src: /4] */ +#define _CPUDIV__OSC1_OSC2_SRC___2__96MHZ_PLL_SRC___3__1L 0xEF /* [OSC1/OSC2 Src: /2][96MHz PLL Src: /3] */ +#define _CPUDIV__OSC1_OSC2_SRC___1__96MHZ_PLL_SRC___2__1L 0xE7 /* [OSC1/OSC2 Src: /1][96MHz PLL Src: /2] */ + +/* 96MHz PLL Prescaler 1L options */ +#define _PLLDIV_DIVIDE_BY_12__48MHZ_INPUT__1L 0xFF /* Divide by 12 (48MHz input) */ +#define _PLLDIV_DIVIDE_BY_10__40MHZ_INPUT__1L 0xFE /* Divide by 10 (40MHz input) */ +#define _PLLDIV_DIVIDE_BY_6__24MHZ_INPUT__1L 0xFD /* Divide by 6 (24MHz input) */ +#define _PLLDIV_DIVIDE_BY_5__20MHZ_INPUT__1L 0xFC /* Divide by 5 (20MHz input) */ +#define _PLLDIV_DIVIDE_BY_4__16MHZ_INPUT__1L 0xFB /* Divide by 4 (16MHz input) */ +#define _PLLDIV_DIVIDE_BY_3__12MHZ_INPUT__1L 0xFA /* Divide by 3 (12MHz input) */ +#define _PLLDIV_DIVIDE_BY_2__8MHZ_INPUT__1L 0xF9 /* Divide by 2 (8MHz input) */ +#define _PLLDIV_NO_DIVIDE__4MHZ_INPUT__1L 0xF8 /* No Divide (4MHz input) */ + + +/* Oscillator 1H options */ +#define _OSC_HS__HS_PLL__USB_HS_1H 0xFE /* HS: HS+PLL, USB-HS */ +#define _OSC_HS__USB_HS_1H 0xFC /* HS: USB-HS */ +#define _OSC_INTOSC__USB_HS_1H 0xFB /* INTOSC: USB-HS */ +#define _OSC_INTOSC__USB_XT_1H 0xFA /* INTOSC: USB-XT */ +#define _OSC_INTOSC__INTOSC_CLK0_RA6___USB_EC_1H 0xF9 /* INTOSC: INTOSC+CLK0{RA6}, USB-EC */ +#define _OSC_INTOSC__INTOSC_RA6__USB_EC_1H 0xF8 /* INTOSC: INTOSC+RA6, USB-EC */ +#define _OSC_EC__EC_PLL__EC_PLL_CLKO_RA6___USB_EC_1H 0xF7 /* EC: EC+PLL, EC+PLL+CLKO{RA6}, USB-EC */ +#define _OSC_EC__EC_PLL__EC_PLL_RA6__USB_EC_1H 0xF6 /* EC: EC+PLL, EC+PLL+RA6, USB-EC */ +#define _OSC_EC__EC_CLKO_RA6___USB_EC_1H 0xF5 /* EC: EC+CLKO{RA6}, USB-EC */ +#define _OSC_EC__EC_RA6__USB_EC_1H 0xF4 /* EC: EC+RA6, USB-EC */ +#define _OSC_XT__XT_PLL__USB_XT_1H 0xF2 /* XT: XT+PLL, USB-XT */ +#define _OSC_XT__USB_XT_1H 0xF0 /* XT: USB-XT */ + +/* Fail-Safe Clock Monitor Enable 1H options */ +#define _FCMEN_OFF_1H 0xBF /* Disabled */ +#define _FCMEN_ON_1H 0xFF /* Enabled */ + +/* Internal External Switch Over Mode 1H options */ +#define _IESO_OFF_1H 0x7F /* Disabled */ +#define _IESO_ON_1H 0xFF /* Enabled */ + + +/* USB Voltage Regulator 2L options */ +#define _VREGEN_ON_2L 0xFF /* Enabled */ +#define _VREGEN_OFF_2L 0xDF /* Disabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled in hardware, SBOREN disabled */ +#define _BODEN_ON_WHILE_ACTIVE_2L 0xFD /* Enabled while active,disabled in SLEEP,SBOREN disabled */ +#define _BODEN_CONTROLLED_WITH_SBOREN_BIT_2L 0xFB /* Controlled with SBOREN bit */ +#define _BODEN_OFF_2L 0xF9 /* Disabled in hardware, SBOREN disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_0V_2L 0xFF /* 2.0V */ +#define _BODENV_2_7V_2L 0xF7 /* 2.7V */ +#define _BODENV_4_2V_2L 0xEF /* 4.2V */ +#define _BODENV_4_5V_2L 0xE7 /* 4.5V */ + + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_DISABLED_CONTROLLED_2H 0xFE /* Disabled-Controlled by SWDTEN bit */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_32768_2H 0xFF /* 1:32768 */ +#define _WDTPS_1_16384_2H 0xFD /* 1:16384 */ +#define _WDTPS_1_8192_2H 0xFB /* 1:8192 */ +#define _WDTPS_1_4096_2H 0xF9 /* 1:4096 */ +#define _WDTPS_1_2048_2H 0xF7 /* 1:2048 */ +#define _WDTPS_1_1024_2H 0xF5 /* 1:1024 */ +#define _WDTPS_1_512_2H 0xF3 /* 1:512 */ +#define _WDTPS_1_256_2H 0xF1 /* 1:256 */ +#define _WDTPS_1_128_2H 0xEF /* 1:128 */ +#define _WDTPS_1_64_2H 0xED /* 1:64 */ +#define _WDTPS_1_32_2H 0xEB /* 1:32 */ +#define _WDTPS_1_16_2H 0xE9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xE7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xE5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xE3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xE1 /* 1:1 */ + + +/* CCP2 Mux 3H options */ +#define _CCP2MUX_RC1_3H 0xFF /* RC1 */ +#define _CCP2MUX_RB3_3H 0xFE /* RB3 */ + +/* PortB A/D Enable 3H options */ +#define _PBADEN_PORTB_4_0__CONFIGURED_AS_ANALOG_INPUTS_ON_RESET_3H 0xFF /* PORTB<4:0> configured as analog inputs on RESET */ +#define _PBADEN_PORTB_4_0__CONFIGURED_AS_DIGITAL_I_O_ON_RESET_3H 0xFD /* PORTB<4:0> configured as digital I/O on RESET */ + +/* Low Power Timer1 Osc enable 3H options */ +#define _LPT1OSC_ON_3H 0xFF /* Enabled */ +#define _LPT1OSC_OFF_3H 0xFB /* Disabled */ + +/* Master Clear Enable 3H options */ +#define _MCLRE_MCLR_ON_RE3_OFF_3H 0xFF /* MCLR Enabled,RE3 Disabled */ +#define _MCLRE_MCLR_OFF_RE3_ON_3H 0x7F /* MCLR Disabled,RE3 Enabled */ + + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Dedicated In-Circuit Port {ICD/ICSP} 4L options */ +#define _ENICPORT_OFF_4L 0xDF /* Disabled */ + +/* Extended CPU Enable 4L options */ +#define _ENHCPU_ON_4L 0xFF /* Enabled */ +#define _ENHCPU_OFF_4L 0xBF /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + + +/* Code Protect 00800-01FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 02000-03FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Code Protect 04000-05FFF 5L options */ +#define _CP_2_OFF_5L 0xFF /* Disabled */ +#define _CP_2_ON_5L 0xFB /* Enabled */ + +/* Code Protect 06000-07FFF 5L options */ +#define _CP_3_OFF_5L 0xFF /* Disabled */ +#define _CP_3_ON_5L 0xF7 /* Enabled */ + + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + + +/* Table Write Protect 00800-01FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 02000-03FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Table Write Protect 04000-05FFF 6L options */ +#define _WRT_2_OFF_6L 0xFF /* Disabled */ +#define _WRT_2_ON_6L 0xFB /* Enabled */ + +/* Table Write Protect 06000-07FFF 6L options */ +#define _WRT_3_OFF_6L 0xFF /* Disabled */ +#define _WRT_3_ON_6L 0xF7 /* Enabled */ + + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + + +/* Table Read Protect 00800-01FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 02000-03FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect 04000-05FFF 7L options */ +#define _EBTR_2_OFF_7L 0xFF /* Disabled */ +#define _EBTR_2_ON_7L 0xFB /* Enabled */ + +/* Table Read Protect 06000-07FFF 7L options */ +#define _EBTR_3_OFF_7L 0xFF /* Disabled */ +#define _EBTR_3_ON_7L 0xF7 /* Enabled */ + + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + + +/* Location of User ID words */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + +#endif // __PIC18F2455__ diff --git a/device/include/pic16/pic18f248.h b/device/include/pic16/pic18f248.h new file mode 100644 index 0000000..a29f856 --- /dev/null +++ b/device/include/pic16/pic18f248.h @@ -0,0 +1,2672 @@ + +/* + * pic18f248.h - PIC18F248 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f248.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F248_H__ +#define __PIC18F248_H__ + +extern __sfr __at (0xf00) RXF0SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF0SIDHbits_t; + +extern volatile __RXF0SIDHbits_t __at (0xf00) RXF0SIDHbits; + +extern __sfr __at (0xf01) RXF0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF0SIDLbits_t; + +extern volatile __RXF0SIDLbits_t __at (0xf01) RXF0SIDLbits; + +extern __sfr __at (0xf02) RXF0EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF0EIDHbits_t; + +extern volatile __RXF0EIDHbits_t __at (0xf02) RXF0EIDHbits; + +extern __sfr __at (0xf03) RXF0EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF0EIDLbits_t; + +extern volatile __RXF0EIDLbits_t __at (0xf03) RXF0EIDLbits; + +extern __sfr __at (0xf04) RXF1SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF1SIDHbits_t; + +extern volatile __RXF1SIDHbits_t __at (0xf04) RXF1SIDHbits; + +extern __sfr __at (0xf05) RXF1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF1SIDLbits_t; + +extern volatile __RXF1SIDLbits_t __at (0xf05) RXF1SIDLbits; + +extern __sfr __at (0xf06) RXF1EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF1EIDHbits_t; + +extern volatile __RXF1EIDHbits_t __at (0xf06) RXF1EIDHbits; + +extern __sfr __at (0xf07) RXF1EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF1EIDLbits_t; + +extern volatile __RXF1EIDLbits_t __at (0xf07) RXF1EIDLbits; + +extern __sfr __at (0xf08) RXF2SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF2SIDHbits_t; + +extern volatile __RXF2SIDHbits_t __at (0xf08) RXF2SIDHbits; + +extern __sfr __at (0xf09) RXF2SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF2SIDLbits_t; + +extern volatile __RXF2SIDLbits_t __at (0xf09) RXF2SIDLbits; + +extern __sfr __at (0xf0a) RXF2EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF2EIDHbits_t; + +extern volatile __RXF2EIDHbits_t __at (0xf0a) RXF2EIDHbits; + +extern __sfr __at (0xf0b) RXF2EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF2EIDLbits_t; + +extern volatile __RXF2EIDLbits_t __at (0xf0b) RXF2EIDLbits; + +extern __sfr __at (0xf0c) RXF3SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF3SIDHbits_t; + +extern volatile __RXF3SIDHbits_t __at (0xf0c) RXF3SIDHbits; + +extern __sfr __at (0xf0d) RXF3SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF3SIDLbits_t; + +extern volatile __RXF3SIDLbits_t __at (0xf0d) RXF3SIDLbits; + +extern __sfr __at (0xf0e) RXF3EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF3EIDHbits_t; + +extern volatile __RXF3EIDHbits_t __at (0xf0e) RXF3EIDHbits; + +extern __sfr __at (0xf0f) RXF3EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF3EIDLbits_t; + +extern volatile __RXF3EIDLbits_t __at (0xf0f) RXF3EIDLbits; + +extern __sfr __at (0xf10) RXF4SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF4SIDHbits_t; + +extern volatile __RXF4SIDHbits_t __at (0xf10) RXF4SIDHbits; + +extern __sfr __at (0xf11) RXF4SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF4SIDLbits_t; + +extern volatile __RXF4SIDLbits_t __at (0xf11) RXF4SIDLbits; + +extern __sfr __at (0xf12) RXF4EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF4EIDHbits_t; + +extern volatile __RXF4EIDHbits_t __at (0xf12) RXF4EIDHbits; + +extern __sfr __at (0xf13) RXF4EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF4EIDLbits_t; + +extern volatile __RXF4EIDLbits_t __at (0xf13) RXF4EIDLbits; + +extern __sfr __at (0xf14) RXF5SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF5SIDHbits_t; + +extern volatile __RXF5SIDHbits_t __at (0xf14) RXF5SIDHbits; + +extern __sfr __at (0xf15) RXF5SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF5SIDLbits_t; + +extern volatile __RXF5SIDLbits_t __at (0xf15) RXF5SIDLbits; + +extern __sfr __at (0xf16) RXF5EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF5EIDHbits_t; + +extern volatile __RXF5EIDHbits_t __at (0xf16) RXF5EIDHbits; + +extern __sfr __at (0xf17) RXF5EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF5EIDLbits_t; + +extern volatile __RXF5EIDLbits_t __at (0xf17) RXF5EIDLbits; + +extern __sfr __at (0xf18) RXM0SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXM0SIDHbits_t; + +extern volatile __RXM0SIDHbits_t __at (0xf18) RXM0SIDHbits; + +extern __sfr __at (0xf19) RXM0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXM0SIDLbits_t; + +extern volatile __RXM0SIDLbits_t __at (0xf19) RXM0SIDLbits; + +extern __sfr __at (0xf1a) RXM0EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXM0EIDHbits_t; + +extern volatile __RXM0EIDHbits_t __at (0xf1a) RXM0EIDHbits; + +extern __sfr __at (0xf1b) RXM0EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXM0EIDLbits_t; + +extern volatile __RXM0EIDLbits_t __at (0xf1b) RXM0EIDLbits; + +extern __sfr __at (0xf1c) RXM1SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXM1SIDHbits_t; + +extern volatile __RXM1SIDHbits_t __at (0xf1c) RXM1SIDHbits; + +extern __sfr __at (0xf1d) RXM1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDEN:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXM1SIDLbits_t; + +extern volatile __RXM1SIDLbits_t __at (0xf1d) RXM1SIDLbits; + +extern __sfr __at (0xf1e) RXM1EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXM1EIDHbits_t; + +extern volatile __RXM1EIDHbits_t __at (0xf1e) RXM1EIDHbits; + +extern __sfr __at (0xf1f) RXM1EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXM1EIDLbits_t; + +extern volatile __RXM1EIDLbits_t __at (0xf1f) RXM1EIDLbits; + +extern __sfr __at (0xf20) TXB2CON; +typedef union { + struct { + unsigned TXPRI0:1; + unsigned TXPRI1:1; + unsigned :1; + unsigned TXREQ:1; + unsigned TXERR:1; + unsigned TXLARB:1; + unsigned TXABT:1; + unsigned :1; + }; +} __TXB2CONbits_t; + +extern volatile __TXB2CONbits_t __at (0xf20) TXB2CONbits; + +extern __sfr __at (0xf21) TXB2SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __TXB2SIDHbits_t; + +extern volatile __TXB2SIDHbits_t __at (0xf21) TXB2SIDHbits; + +extern __sfr __at (0xf22) TXB2SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDEN:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __TXB2SIDLbits_t; + +extern volatile __TXB2SIDLbits_t __at (0xf22) TXB2SIDLbits; + +extern __sfr __at (0xf23) TXB2EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __TXB2EIDHbits_t; + +extern volatile __TXB2EIDHbits_t __at (0xf23) TXB2EIDHbits; + +extern __sfr __at (0xf24) TXB2EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __TXB2EIDLbits_t; + +extern volatile __TXB2EIDLbits_t __at (0xf24) TXB2EIDLbits; + +extern __sfr __at (0xf25) TXB2DLC; +typedef union { + struct { + unsigned TXB2DLC0:1; + unsigned TXB2DLC1:1; + unsigned TXB2DLC2:1; + unsigned TXB2DLC3:1; + unsigned :1; + unsigned :1; + unsigned TXB2TXRTR:1; + unsigned :1; + }; +} __TXB2DLCbits_t; + +extern volatile __TXB2DLCbits_t __at (0xf25) TXB2DLCbits; + +extern __sfr __at (0xf26) TXB2D0; +typedef union { + struct { + unsigned TXB2D00:1; + unsigned TXB2D01:1; + unsigned TXB2D02:1; + unsigned TXB2D03:1; + unsigned TXB2D04:1; + unsigned TXB2D05:1; + unsigned TXB2D06:1; + unsigned TXB2D07:1; + }; +} __TXB2D0bits_t; + +extern volatile __TXB2D0bits_t __at (0xf26) TXB2D0bits; + +extern __sfr __at (0xf27) TXB2D1; +typedef union { + struct { + unsigned TXB2D10:1; + unsigned TXB2D11:1; + unsigned TXB2D12:1; + unsigned TXB2D13:1; + unsigned TXB2D14:1; + unsigned TXB2D15:1; + unsigned TXB2D16:1; + unsigned TXB2D17:1; + }; +} __TXB2D1bits_t; + +extern volatile __TXB2D1bits_t __at (0xf27) TXB2D1bits; + +extern __sfr __at (0xf28) TXB2D2; +typedef union { + struct { + unsigned TXB2D20:1; + unsigned TXB2D21:1; + unsigned TXB2D22:1; + unsigned TXB2D23:1; + unsigned TXB2D24:1; + unsigned TXB2D25:1; + unsigned TXB2D26:1; + unsigned TXB2D27:1; + }; +} __TXB2D2bits_t; + +extern volatile __TXB2D2bits_t __at (0xf28) TXB2D2bits; + +extern __sfr __at (0xf29) TXB2D3; +typedef union { + struct { + unsigned TXB2D30:1; + unsigned TXB2D31:1; + unsigned TXB2D32:1; + unsigned TXB2D33:1; + unsigned TXB2D34:1; + unsigned TXB2D35:1; + unsigned TXB2D36:1; + unsigned TXB2D37:1; + }; +} __TXB2D3bits_t; + +extern volatile __TXB2D3bits_t __at (0xf29) TXB2D3bits; + +extern __sfr __at (0xf2a) TXB2D4; +typedef union { + struct { + unsigned TXB2D40:1; + unsigned TXB2D41:1; + unsigned TXB2D42:1; + unsigned TXB2D43:1; + unsigned TXB2D44:1; + unsigned TXB2D45:1; + unsigned TXB2D46:1; + unsigned TXB2D47:1; + }; +} __TXB2D4bits_t; + +extern volatile __TXB2D4bits_t __at (0xf2a) TXB2D4bits; + +extern __sfr __at (0xf2b) TXB2D5; +typedef union { + struct { + unsigned TXB2D50:1; + unsigned TXB2D51:1; + unsigned TXB2D52:1; + unsigned TXB2D53:1; + unsigned TXB2D54:1; + unsigned TXB2D55:1; + unsigned TXB2D56:1; + unsigned TXB2D57:1; + }; +} __TXB2D5bits_t; + +extern volatile __TXB2D5bits_t __at (0xf2b) TXB2D5bits; + +extern __sfr __at (0xf2c) TXB2D6; +typedef union { + struct { + unsigned TXB2D60:1; + unsigned TXB2D61:1; + unsigned TXB2D62:1; + unsigned TXB2D63:1; + unsigned TXB2D64:1; + unsigned TXB2D65:1; + unsigned TXB2D66:1; + unsigned TXB2D67:1; + }; +} __TXB2D6bits_t; + +extern volatile __TXB2D6bits_t __at (0xf2c) TXB2D6bits; + +extern __sfr __at (0xf2d) TXB2D7; +typedef union { + struct { + unsigned TXB2D70:1; + unsigned TXB2D71:1; + unsigned TXB2D72:1; + unsigned TXB2D73:1; + unsigned TXB2D74:1; + unsigned TXB2D75:1; + unsigned TXB2D76:1; + unsigned TXB2D77:1; + }; +} __TXB2D7bits_t; + +extern volatile __TXB2D7bits_t __at (0xf2d) TXB2D7bits; + +extern __sfr __at (0xf2e) CANSTATRO4; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATRO4bits_t; + +extern volatile __CANSTATRO4bits_t __at (0xf2e) CANSTATRO4bits; + +extern __sfr __at (0xf30) TXB1CON; +typedef union { + struct { + unsigned TXPRI0:1; + unsigned TXPRI1:1; + unsigned :1; + unsigned TXREQ:1; + unsigned TXERR:1; + unsigned TXLARB:1; + unsigned TXABT:1; + unsigned :1; + }; +} __TXB1CONbits_t; + +extern volatile __TXB1CONbits_t __at (0xf30) TXB1CONbits; + +extern __sfr __at (0xf31) TXB1SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __TXB1SIDHbits_t; + +extern volatile __TXB1SIDHbits_t __at (0xf31) TXB1SIDHbits; + +extern __sfr __at (0xf32) TXB1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __TXB1SIDLbits_t; + +extern volatile __TXB1SIDLbits_t __at (0xf32) TXB1SIDLbits; + +extern __sfr __at (0xf33) TXB1EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __TXB1EIDHbits_t; + +extern volatile __TXB1EIDHbits_t __at (0xf33) TXB1EIDHbits; + +extern __sfr __at (0xf34) TXB1EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __TXB1EIDLbits_t; + +extern volatile __TXB1EIDLbits_t __at (0xf34) TXB1EIDLbits; + +extern __sfr __at (0xf35) TXB1DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned :1; + unsigned :1; + unsigned TXRTR:1; + unsigned :1; + }; +} __TXB1DLCbits_t; + +extern volatile __TXB1DLCbits_t __at (0xf35) TXB1DLCbits; + +extern __sfr __at (0xf36) TXB1D0; +typedef union { + struct { + unsigned TXB1D00:1; + unsigned TXB1D01:1; + unsigned TXB1D02:1; + unsigned TXB1D03:1; + unsigned TXB1D04:1; + unsigned TXB1D05:1; + unsigned TXB1D06:1; + unsigned TXB1D07:1; + }; +} __TXB1D0bits_t; + +extern volatile __TXB1D0bits_t __at (0xf36) TXB1D0bits; + +extern __sfr __at (0xf37) TXB1D1; +typedef union { + struct { + unsigned TXB1D10:1; + unsigned TXB1D11:1; + unsigned TXB1D12:1; + unsigned TXB1D13:1; + unsigned TXB1D14:1; + unsigned TXB1D15:1; + unsigned TXB1D16:1; + unsigned TXB1D17:1; + }; +} __TXB1D1bits_t; + +extern volatile __TXB1D1bits_t __at (0xf37) TXB1D1bits; + +extern __sfr __at (0xf38) TXB1D2; +typedef union { + struct { + unsigned TXB1D20:1; + unsigned TXB1D21:1; + unsigned TXB1D22:1; + unsigned TXB1D23:1; + unsigned TXB1D24:1; + unsigned TXB1D25:1; + unsigned TXB1D26:1; + unsigned TXB1D27:1; + }; +} __TXB1D2bits_t; + +extern volatile __TXB1D2bits_t __at (0xf38) TXB1D2bits; + +extern __sfr __at (0xf39) TXB1D3; +typedef union { + struct { + unsigned TXB1D30:1; + unsigned TXB1D31:1; + unsigned TXB1D32:1; + unsigned TXB1D33:1; + unsigned TXB1D34:1; + unsigned TXB1D35:1; + unsigned TXB1D36:1; + unsigned TXB1D37:1; + }; +} __TXB1D3bits_t; + +extern volatile __TXB1D3bits_t __at (0xf39) TXB1D3bits; + +extern __sfr __at (0xf3a) TXB1D4; +typedef union { + struct { + unsigned TXB1D40:1; + unsigned TXB1D41:1; + unsigned TXB1D42:1; + unsigned TXB1D43:1; + unsigned TXB1D44:1; + unsigned TXB1D45:1; + unsigned TXB1D46:1; + unsigned TXB1D47:1; + }; +} __TXB1D4bits_t; + +extern volatile __TXB1D4bits_t __at (0xf3a) TXB1D4bits; + +extern __sfr __at (0xf3b) TXB1D5; +typedef union { + struct { + unsigned TXB1D50:1; + unsigned TXB1D51:1; + unsigned TXB1D52:1; + unsigned TXB1D53:1; + unsigned TXB1D54:1; + unsigned TXB1D55:1; + unsigned TXB1D56:1; + unsigned TXB1D57:1; + }; +} __TXB1D5bits_t; + +extern volatile __TXB1D5bits_t __at (0xf3b) TXB1D5bits; + +extern __sfr __at (0xf3c) TXB1D6; +typedef union { + struct { + unsigned TXB1D60:1; + unsigned TXB1D61:1; + unsigned TXB1D62:1; + unsigned TXB1D63:1; + unsigned TXB1D64:1; + unsigned TXB1D65:1; + unsigned TXB1D66:1; + unsigned TXB1D67:1; + }; +} __TXB1D6bits_t; + +extern volatile __TXB1D6bits_t __at (0xf3c) TXB1D6bits; + +extern __sfr __at (0xf3d) TXB1D7; +typedef union { + struct { + unsigned TXB1D70:1; + unsigned TXB1D71:1; + unsigned TXB1D72:1; + unsigned TXB1D73:1; + unsigned TXB1D74:1; + unsigned TXB1D75:1; + unsigned TXB1D76:1; + unsigned TXB1D77:1; + }; +} __TXB1D7bits_t; + +extern volatile __TXB1D7bits_t __at (0xf3d) TXB1D7bits; + +extern __sfr __at (0xf3e) CANSTATRO3; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATRO3bits_t; + +extern volatile __CANSTATRO3bits_t __at (0xf3e) CANSTATRO3bits; + +extern __sfr __at (0xf40) TXB0CON; +typedef union { + struct { + unsigned TXPRI0:1; + unsigned TXPRI1:1; + unsigned :1; + unsigned TXREQ:1; + unsigned TXERR:1; + unsigned TXLARB:1; + unsigned TXABT:1; + unsigned :1; + }; +} __TXB0CONbits_t; + +extern volatile __TXB0CONbits_t __at (0xf40) TXB0CONbits; + +extern __sfr __at (0xf41) TXB0SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __TXB0SIDHbits_t; + +extern volatile __TXB0SIDHbits_t __at (0xf41) TXB0SIDHbits; + +extern __sfr __at (0xf42) TXB0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __TXB0SIDLbits_t; + +extern volatile __TXB0SIDLbits_t __at (0xf42) TXB0SIDLbits; + +extern __sfr __at (0xf43) TXB0EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __TXB0EIDHbits_t; + +extern volatile __TXB0EIDHbits_t __at (0xf43) TXB0EIDHbits; + +extern __sfr __at (0xf44) TXB0EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __TXB0EIDLbits_t; + +extern volatile __TXB0EIDLbits_t __at (0xf44) TXB0EIDLbits; + +extern __sfr __at (0xf45) TXB0DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned :1; + unsigned :1; + unsigned TXRTR:1; + unsigned :1; + }; +} __TXB0DLCbits_t; + +extern volatile __TXB0DLCbits_t __at (0xf45) TXB0DLCbits; + +extern __sfr __at (0xf46) TXB0D0; +typedef union { + struct { + unsigned TXB0D00:1; + unsigned TXB0D01:1; + unsigned TXB0D02:1; + unsigned TXB0D03:1; + unsigned TXB0D04:1; + unsigned TXB0D05:1; + unsigned TXB0D06:1; + unsigned TXB0D07:1; + }; +} __TXB0D0bits_t; + +extern volatile __TXB0D0bits_t __at (0xf46) TXB0D0bits; + +extern __sfr __at (0xf47) TXB0D1; +typedef union { + struct { + unsigned TXB0D10:1; + unsigned TXB0D11:1; + unsigned TXB0D12:1; + unsigned TXB0D13:1; + unsigned TXB0D14:1; + unsigned TXB0D15:1; + unsigned TXB0D16:1; + unsigned TXB0D17:1; + }; +} __TXB0D1bits_t; + +extern volatile __TXB0D1bits_t __at (0xf47) TXB0D1bits; + +extern __sfr __at (0xf48) TXB0D2; +typedef union { + struct { + unsigned TXB0D20:1; + unsigned TXB0D21:1; + unsigned TXB0D22:1; + unsigned TXB0D23:1; + unsigned TXB0D24:1; + unsigned TXB0D25:1; + unsigned TXB0D26:1; + unsigned TXB0D27:1; + }; +} __TXB0D2bits_t; + +extern volatile __TXB0D2bits_t __at (0xf48) TXB0D2bits; + +extern __sfr __at (0xf49) TXB0D3; +typedef union { + struct { + unsigned TXB0D30:1; + unsigned TXB0D31:1; + unsigned TXB0D32:1; + unsigned TXB0D33:1; + unsigned TXB0D34:1; + unsigned TXBD035:1; + unsigned TXBD0D36:1; + unsigned TXB0D37:1; + }; +} __TXB0D3bits_t; + +extern volatile __TXB0D3bits_t __at (0xf49) TXB0D3bits; + +extern __sfr __at (0xf4a) TXB0D4; +typedef union { + struct { + unsigned TXB0D40:1; + unsigned TXB0D41:1; + unsigned TXB0D42:1; + unsigned TXB0D43:1; + unsigned TXB0D44:1; + unsigned TXB0D45:1; + unsigned TXB0D46:1; + unsigned TXB0D47:1; + }; +} __TXB0D4bits_t; + +extern volatile __TXB0D4bits_t __at (0xf4a) TXB0D4bits; + +extern __sfr __at (0xf4b) TXB0D5; +typedef union { + struct { + unsigned TXB0D50:1; + unsigned TXB0D51:1; + unsigned TXB0D52:1; + unsigned TXB0D53:1; + unsigned TXB0D54:1; + unsigned TXB0D55:1; + unsigned TXB0D56:1; + unsigned TXB0D57:1; + }; +} __TXB0D5bits_t; + +extern volatile __TXB0D5bits_t __at (0xf4b) TXB0D5bits; + +extern __sfr __at (0xf4c) TXB0D6; +typedef union { + struct { + unsigned TXB0D60:1; + unsigned TXB0D61:1; + unsigned TXB0D62:1; + unsigned TXB0D63:1; + unsigned TXB0D64:1; + unsigned TXB0D65:1; + unsigned TXB0D66:1; + unsigned TXB0D67:1; + }; +} __TXB0D6bits_t; + +extern volatile __TXB0D6bits_t __at (0xf4c) TXB0D6bits; + +extern __sfr __at (0xf4d) TXB0D7; +typedef union { + struct { + unsigned TXB0D70:1; + unsigned TXB0D71:1; + unsigned TXB0D72:1; + unsigned TXB0D73:1; + unsigned TXB0D74:1; + unsigned TXB0D75:1; + unsigned TXB0D76:1; + unsigned TXB0D77:1; + }; +} __TXB0D7bits_t; + +extern volatile __TXB0D7bits_t __at (0xf4d) TXB0D7bits; + +extern __sfr __at (0xf4e) CANSTATRO2; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATRO2bits_t; + +extern volatile __CANSTATRO2bits_t __at (0xf4e) CANSTATRO2bits; + +extern __sfr __at (0xf50) RXB1CON; +typedef union { + struct { + unsigned FILHIT0:1; + unsigned FILHIT1:1; + unsigned FILHIT2:1; + unsigned RXRTRRO:1; + unsigned :1; + unsigned RXM0:1; + unsigned RXM1:1; + unsigned RXFUL:1; + }; +} __RXB1CONbits_t; + +extern volatile __RXB1CONbits_t __at (0xf50) RXB1CONbits; + +extern __sfr __at (0xf51) RXB1SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXB1SIDHbits_t; + +extern volatile __RXB1SIDHbits_t __at (0xf51) RXB1SIDHbits; + +extern __sfr __at (0xf52) RXB1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned SRR:1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXB1SIDLbits_t; + +extern volatile __RXB1SIDLbits_t __at (0xf52) RXB1SIDLbits; + +extern __sfr __at (0xf53) RXB1EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXB1EIDHbits_t; + +extern volatile __RXB1EIDHbits_t __at (0xf53) RXB1EIDHbits; + +extern __sfr __at (0xf54) RXB1EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXB1EIDLbits_t; + +extern volatile __RXB1EIDLbits_t __at (0xf54) RXB1EIDLbits; + +extern __sfr __at (0xf55) RXB1DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned RESB0:1; + unsigned RESB1:1; + unsigned RXRTR:1; + unsigned :1; + }; +} __RXB1DLCbits_t; + +extern volatile __RXB1DLCbits_t __at (0xf55) RXB1DLCbits; + +extern __sfr __at (0xf56) RXB1D0; +typedef union { + struct { + unsigned RXB1D00:1; + unsigned RXB1D01:1; + unsigned RXB1D02:1; + unsigned RXB1D03:1; + unsigned RXB1D04:1; + unsigned RXB1D05:1; + unsigned RXB1D06:1; + unsigned RXB1D07:1; + }; +} __RXB1D0bits_t; + +extern volatile __RXB1D0bits_t __at (0xf56) RXB1D0bits; + +extern __sfr __at (0xf57) RXB1D1; +typedef union { + struct { + unsigned RXB1D10:1; + unsigned RXB1D11:1; + unsigned RXB1D12:1; + unsigned RXB1D13:1; + unsigned RXB1D14:1; + unsigned RXB1D15:1; + unsigned RXB1D16:1; + unsigned RXB1D17:1; + }; +} __RXB1D1bits_t; + +extern volatile __RXB1D1bits_t __at (0xf57) RXB1D1bits; + +extern __sfr __at (0xf58) RXB1D2; +typedef union { + struct { + unsigned RXB1D20:1; + unsigned RXB1D21:1; + unsigned RXB1D22:1; + unsigned RXB1D23:1; + unsigned RXB1D24:1; + unsigned RXB1D25:1; + unsigned RXB1D26:1; + unsigned RXB1D27:1; + }; +} __RXB1D2bits_t; + +extern volatile __RXB1D2bits_t __at (0xf58) RXB1D2bits; + +extern __sfr __at (0xf59) RXB1D3; +typedef union { + struct { + unsigned RXB1D30:1; + unsigned RXB1D31:1; + unsigned RXB1D32:1; + unsigned RXB1D33:1; + unsigned RXB1D34:1; + unsigned RXB1D35:1; + unsigned RXB1D36:1; + unsigned RXB1D37:1; + }; +} __RXB1D3bits_t; + +extern volatile __RXB1D3bits_t __at (0xf59) RXB1D3bits; + +extern __sfr __at (0xf5a) RXB1D4; +typedef union { + struct { + unsigned RXB1D40:1; + unsigned RXB1D41:1; + unsigned RXB1D42:1; + unsigned RXB1D43:1; + unsigned RXB1D44:1; + unsigned RXB1D45:1; + unsigned RXB1D46:1; + unsigned RXB1D47:1; + }; +} __RXB1D4bits_t; + +extern volatile __RXB1D4bits_t __at (0xf5a) RXB1D4bits; + +extern __sfr __at (0xf5b) RXB1D5; +typedef union { + struct { + unsigned RXB1D50:1; + unsigned RXB1D51:1; + unsigned RXB1D52:1; + unsigned RXB1D53:1; + unsigned RXB1D54:1; + unsigned RXB1D55:1; + unsigned RXB1D56:1; + unsigned RXB1D57:1; + }; +} __RXB1D5bits_t; + +extern volatile __RXB1D5bits_t __at (0xf5b) RXB1D5bits; + +extern __sfr __at (0xf5c) RXB1D6; +typedef union { + struct { + unsigned RXB1D60:1; + unsigned RXB1D61:1; + unsigned RXB1D62:1; + unsigned RXB1D63:1; + unsigned RXB1D64:1; + unsigned RXB1D65:1; + unsigned RXB1D66:1; + unsigned RXB1D67:1; + }; +} __RXB1D6bits_t; + +extern volatile __RXB1D6bits_t __at (0xf5c) RXB1D6bits; + +extern __sfr __at (0xf5d) RXB1D7; +typedef union { + struct { + unsigned RXB1D70:1; + unsigned RXB1D71:1; + unsigned RXB1D72:1; + unsigned RXB1D73:1; + unsigned RXB1D74:1; + unsigned RXB1D75:1; + unsigned RXB1D76:1; + unsigned RXB1D77:1; + }; +} __RXB1D7bits_t; + +extern volatile __RXB1D7bits_t __at (0xf5d) RXB1D7bits; + +extern __sfr __at (0xf5e) CANSTATRO1; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATRO1bits_t; + +extern volatile __CANSTATRO1bits_t __at (0xf5e) CANSTATRO1bits; + +extern __sfr __at (0xf60) RXB0CON; +typedef union { + struct { + unsigned FILHIT0:1; + unsigned RXB0DBEN_R:1; + unsigned RXB0DBEN:1; + unsigned RXRTRR0:1; + unsigned :1; + unsigned RXM0:1; + unsigned RXM1:1; + unsigned RXFUL:1; + }; +} __RXB0CONbits_t; + +extern volatile __RXB0CONbits_t __at (0xf60) RXB0CONbits; + +extern __sfr __at (0xf61) RXB0SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXB0SIDHbits_t; + +extern volatile __RXB0SIDHbits_t __at (0xf61) RXB0SIDHbits; + +extern __sfr __at (0xf62) RXB0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXID:1; + unsigned SRR:1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXB0SIDLbits_t; + +extern volatile __RXB0SIDLbits_t __at (0xf62) RXB0SIDLbits; + +extern __sfr __at (0xf63) RXB0EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EDI9:1; + unsigned EID10:1; + unsigned ED11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXB0EIDHbits_t; + +extern volatile __RXB0EIDHbits_t __at (0xf63) RXB0EIDHbits; + +extern __sfr __at (0xf64) RXB0EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXB0EIDLbits_t; + +extern volatile __RXB0EIDLbits_t __at (0xf64) RXB0EIDLbits; + +extern __sfr __at (0xf65) RXB0DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned RESB0:1; + unsigned RESB1:1; + unsigned RTR:1; + unsigned :1; + }; +} __RXB0DLCbits_t; + +extern volatile __RXB0DLCbits_t __at (0xf65) RXB0DLCbits; + +extern __sfr __at (0xf66) RXB0D0; +extern __sfr __at (0xf67) RXB0D1; +extern __sfr __at (0xf68) RXB0D2; +extern __sfr __at (0xf69) RXB0D3; +extern __sfr __at (0xf6a) RXB0D4; +extern __sfr __at (0xf6b) RXB0D5; +extern __sfr __at (0xf6c) RXB0D6; +extern __sfr __at (0xf6d) RXB0D7; +extern __sfr __at (0xf6e) CANSTAT; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATbits_t; + +extern volatile __CANSTATbits_t __at (0xf6e) CANSTATbits; + +extern __sfr __at (0xf6f) CANCON; +typedef union { + struct { + unsigned WIN0:1; + unsigned WIN1:1; + unsigned WIN2:1; + unsigned WIN3:1; + unsigned ABAT:1; + unsigned REQOP0:1; + unsigned REQOP1:1; + unsigned REQOP2:1; + }; +} __CANCONbits_t; + +extern volatile __CANCONbits_t __at (0xf6f) CANCONbits; + +extern __sfr __at (0xf70) BRGCON1; +typedef union { + struct { + unsigned BRP0:1; + unsigned BRP1:1; + unsigned BRP2:1; + unsigned BRP3:1; + unsigned BRP4:1; + unsigned BRP5:1; + unsigned SJW0:1; + unsigned SJW1:1; + }; +} __BRGCON1bits_t; + +extern volatile __BRGCON1bits_t __at (0xf70) BRGCON1bits; + +extern __sfr __at (0xf71) BRGCON2; +typedef union { + struct { + unsigned PRSEG0:1; + unsigned PRSEG1:1; + unsigned PRSEG2:1; + unsigned SEG1PH0:1; + unsigned SEG1PH1:1; + unsigned SEG1PH2:1; + unsigned SAM:1; + unsigned SEG2PHTS:1; + }; +} __BRGCON2bits_t; + +extern volatile __BRGCON2bits_t __at (0xf71) BRGCON2bits; + +extern __sfr __at (0xf72) BRGCON3; +typedef union { + struct { + unsigned SEG2PH0:1; + unsigned SEG2PH1:1; + unsigned SEG2PH2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned WAKFIL:1; + unsigned :1; + }; +} __BRGCON3bits_t; + +extern volatile __BRGCON3bits_t __at (0xf72) BRGCON3bits; + +extern __sfr __at (0xf73) CIOCON; +typedef union { + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned CANCAP:1; + unsigned ENDRHI:1; + unsigned :1; + unsigned :1; + }; +} __CIOCONbits_t; + +extern volatile __CIOCONbits_t __at (0xf73) CIOCONbits; + +extern __sfr __at (0xf74) COMSTAT; +typedef union { + struct { + unsigned EWARN:1; + unsigned RXWARN:1; + unsigned TXWARN:1; + unsigned RXBP:1; + unsigned TXBP:1; + unsigned TXBO:1; + unsigned RXB1OVFL:1; + unsigned RXB0OVFL:1; + }; +} __COMSTATbits_t; + +extern volatile __COMSTATbits_t __at (0xf74) COMSTATbits; + +extern __sfr __at (0xf75) RXERRCNT; +typedef union { + struct { + unsigned REC0:1; + unsigned REC1:1; + unsigned REC2:1; + unsigned REC3:1; + unsigned REC4:1; + unsigned REC5:1; + unsigned REC6:1; + unsigned REC7:1; + }; +} __RXERRCNTbits_t; + +extern volatile __RXERRCNTbits_t __at (0xf75) RXERRCNTbits; + +extern __sfr __at (0xf76) TXERRCNT; +typedef union { + struct { + unsigned TEC0:1; + unsigned TEC1:1; + unsigned TEC2:1; + unsigned TEC3:1; + unsigned TEC4:1; + unsigned TEC5:1; + unsigned TEC6:1; + unsigned TEC7:1; + }; +} __TXERRCNTbits_t; + +extern volatile __TXERRCNTbits_t __at (0xf76) TXERRCNTbits; + +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned :1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned INT3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned CMIE:1; + unsigned :1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned CMIF:1; + unsigned :1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned CMIP:1; + unsigned :1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa3) PIE3; +typedef union { + struct { + unsigned RX0IE:1; + unsigned RX1IE:1; + unsigned TX0IE:1; + unsigned TX1IE:1; + unsigned TX2IE:1; + unsigned ERRIE:1; + unsigned WAKIE:1; + unsigned IVRE:1; + }; +} __PIE3bits_t; + +extern volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +extern __sfr __at (0xfa4) PIR3; +typedef union { + struct { + unsigned RX0IF:1; + unsigned RX1IF:1; + unsigned TX0IF:1; + unsigned TX1IF:1; + unsigned TX2IF:1; + unsigned ERRIF:1; + unsigned WAKIF:1; + unsigned IVRF:1; + }; +} __PIR3bits_t; + +extern volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +extern __sfr __at (0xfa5) IPR3; +typedef union { + struct { + unsigned RX0IP:1; + unsigned RX1IP:1; + unsigned TX0IP:1; + unsigned TX1IP:1; + unsigned TX2IP:1; + unsigned ERRIP:1; + unsigned WAKIP:1; + unsigned IVRP:1; + }; +} __IPR3bits_t; + +extern volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfab) RCSTA; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTAbits_t; + +extern volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +extern __sfr __at (0xfac) TXSTA; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTAbits_t; + +extern volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DCCP1Y:1; + unsigned DCCP1X:1; + unsigned :1; + unsigned :1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned :1; + unsigned :1; + unsigned ADCS2:1; + unsigned ADFM:1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned :1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned ADCS0:1; + unsigned ADCS1:1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +typedef union { + struct { + unsigned T0PS0:1; + unsigned T0PS1:1; + unsigned T0PS2:1; + unsigned PSA:1; + unsigned T0SE:1; + unsigned T0CS:1; + unsigned T08BIT:1; + unsigned TMR0ON:1; + }; +} __T0CONbits_t; + +extern volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned :1; + unsigned :1; + unsigned INT1E:1; + unsigned :1; + unsigned :1; + unsigned INT1P:1; + unsigned :1; + }; + + struct { + unsigned INT1IF:1; + unsigned :1; + unsigned :1; + unsigned INT2IE:1; + unsigned :1; + unsigned :1; + unsigned INT1IP:1; + unsigned :1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned :1; + unsigned T0IP:1; + unsigned :1; + unsigned :1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */ +#define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */ +#define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */ +#define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */ +#define _OSC_RC_1H 0xFB /* RC */ +#define _OSC_HS_1H 0xFA /* HS */ +#define _OSC_XT_1H 0xF9 /* XT */ +#define _OSC_LP_1H 0xF8 /* LP */ + +/* Osc. Switch Enable 1H options */ +#define _OSCS_OFF_1H 0xFF /* Disabled */ +#define _OSCS_ON_1H 0xDF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_0V_2L 0xFF /* 2.0V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_OFF_2H 0xFE /* Disabled */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_128_2H 0xFF /* 1:128 */ +#define _WDTPS_1_64_2H 0xFD /* 1:64 */ +#define _WDTPS_1_32_2H 0xFB /* 1:32 */ +#define _WDTPS_1_16_2H 0xF9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xF7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xF5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xF3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xF1 /* 1:1 */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Code Protect 00200-01FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 02000-03FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00200-01FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 02000-03FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00200-01FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 02000-03FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f2480.h b/device/include/pic16/pic18f2480.h new file mode 100644 index 0000000..612d994 --- /dev/null +++ b/device/include/pic16/pic18f2480.h @@ -0,0 +1,6 @@ +/* + * pic18f2480.h - Device Library Header + */ + +#include "pic18f4580.h" + diff --git a/device/include/pic16/pic18f24j10.h b/device/include/pic16/pic18f24j10.h new file mode 100644 index 0000000..001daad --- /dev/null +++ b/device/include/pic16/pic18f24j10.h @@ -0,0 +1,1521 @@ +/* + * pic18f24j10.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F24J10_H__ +#define __PIC18F24J10_H__ 1 + +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned : 1; + unsigned RA5 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned : 1; + unsigned AN4 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned SS1 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned CVREF : 1; + unsigned : 1; + unsigned : 1; + unsigned C2OUT_PORTA : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CCP2_PORTB : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN12 : 1; + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned AN9 : 1; + unsigned AN11 : 1; + unsigned T0CKI : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned C1OUT_PORTB : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK1 : 1; + unsigned SDI1 : 1; + unsigned SDO1 : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T1CKI : 1; + unsigned CCP2_PORTC : 1; + unsigned P1A : 1; + unsigned SCL1 : 1; + unsigned SDA1 : 1; + unsigned SDO : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned : 1; + unsigned LATA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned : 1; + unsigned RA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned : 1; + unsigned TRISA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IE : 1; + unsigned TX1IE : 1; + unsigned RC1IE : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IF : 1; + unsigned TX1IF : 1; + unsigned RC1IF : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IP : 1; + unsigned TX1IP : 1; + unsigned RC1IP : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned : 1; + unsigned : 1; + unsigned BCLIE : 1; + unsigned : 1; + unsigned : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned : 1; + unsigned : 1; + unsigned BCLIF : 1; + unsigned : 1; + unsigned : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned : 1; + unsigned : 1; + unsigned BCLIP : 1; + unsigned : 1; + unsigned : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL2IE : 1; + unsigned SSP2IE : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL2IF : 1; + unsigned SSP2IF : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL2IP : 1; + unsigned SSP2IP : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned ADEN : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAB) RCSTA1; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTA1bits_t; +extern volatile __RCSTA1bits_t __at (0xFAB) RCSTA1bits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAC) TXSTA1; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTA1bits_t; +extern volatile __TXSTA1bits_t __at (0xFAC) TXSTA1bits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAD) TXREG1; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAE) RCREG1; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFAF) SPBRG1; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT_CMCON : 1; + unsigned C2OUT_CMCON : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) ECCP1DEL; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PRSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +extern __sfr __at (0xFB7) PWM1CON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PRSEN : 1; + }; +} __PWM1CONbits_t; +extern volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFB8) BAUDCTL; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCTLbits_t; +extern volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned ADCAL : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSP1CON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSP1CON2bits_t; +extern volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSP1CON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSP1CON1bits_t; +extern volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSP1STAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP1STATbits_t; +extern volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSP1ADD; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSP1BUF; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TOUTPS0 : 1; + unsigned TOUTPS1 : 1; + unsigned TOUTPS2 : 1; + unsigned TOUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned : 1; + unsigned OSTS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned T0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned RBIE : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f24k20.h b/device/include/pic16/pic18f24k20.h new file mode 100644 index 0000000..c54718b --- /dev/null +++ b/device/include/pic16/pic18f24k20.h @@ -0,0 +1,6 @@ +/* + * pic18f24k20.h - device specific declarations + */ + +#include "pic18f46k20.h" + diff --git a/device/include/pic16/pic18f2510.h b/device/include/pic16/pic18f2510.h new file mode 100644 index 0000000..6ef00b3 --- /dev/null +++ b/device/include/pic16/pic18f2510.h @@ -0,0 +1,6 @@ +/* + * pic18f2510.h - device specific declarations + */ + +#include "pic18f4610.h" + diff --git a/device/include/pic16/pic18f2515.h b/device/include/pic16/pic18f2515.h new file mode 100644 index 0000000..33d0bb1 --- /dev/null +++ b/device/include/pic16/pic18f2515.h @@ -0,0 +1,6 @@ +/* + * pic18f2515.h - device specific declarations + */ + +#include "pic18f4610.h" + diff --git a/device/include/pic16/pic18f252.h b/device/include/pic16/pic18f252.h new file mode 100644 index 0000000..272a9f4 --- /dev/null +++ b/device/include/pic16/pic18f252.h @@ -0,0 +1,951 @@ + +/* + * pic18f252.h - PIC18F252 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f252.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F252_H__ +#define __PIC18F252_H__ + +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned :1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned INT3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfab) RCSTA; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTAbits_t; + +extern volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +extern __sfr __at (0xfac) TXSTA; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTAbits_t; + +extern volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfba) CCP2CON; +typedef union { + struct { + unsigned CCP2M0:1; + unsigned CCP2M1:1; + unsigned CCP2M2:1; + unsigned CCP2M3:1; + unsigned DCCP2Y:1; + unsigned DCCP2X:1; + unsigned :1; + unsigned :1; + }; +} __CCP2CONbits_t; + +extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +extern __sfr __at (0xfbb) CCPR2L; +extern __sfr __at (0xfbc) CCPR2H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DCCP1Y:1; + unsigned DCCP1X:1; + unsigned :1; + unsigned :1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned :1; + unsigned :1; + unsigned ADCS2:1; + unsigned ADFM:1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned :1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned ADCS0:1; + unsigned ADCS1:1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +typedef union { + struct { + unsigned T0PS0:1; + unsigned T0PS1:1; + unsigned T0PS2:1; + unsigned PSA:1; + unsigned T0SE:1; + unsigned T0CS:1; + unsigned T08BIT:1; + unsigned TMR0ON:1; + }; +} __T0CONbits_t; + +extern volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned INT2F:1; + unsigned :1; + unsigned INT1E:1; + unsigned INT2E:1; + unsigned :1; + unsigned INT1P:1; + unsigned INT2P:1; + }; + + struct { + unsigned INT1IF:1; + unsigned INT2IF:1; + unsigned :1; + unsigned INT1IE:1; + unsigned INT2IE:1; + unsigned :1; + unsigned INT1IP:1; + unsigned INT2IP:1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned :1; + unsigned T0IP:1; + unsigned :1; + unsigned INTEDG2:1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */ +#define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */ +#define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */ +#define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */ +#define _OSC_RC_1H 0xFB /* RC */ +#define _OSC_HS_1H 0xFA /* HS */ +#define _OSC_XT_1H 0xF9 /* XT */ +#define _OSC_LP_1H 0xF8 /* LP */ + +/* Osc. Switch Enable 1H options */ +#define _OSCS_OFF_1H 0xFF /* Disabled */ +#define _OSCS_ON_1H 0xDF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_0V_2L 0xFF /* 2.0V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_OFF_2H 0xFE /* Disabled */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_128_2H 0xFF /* 1:128 */ +#define _WDTPS_1_64_2H 0xFD /* 1:64 */ +#define _WDTPS_1_32_2H 0xFB /* 1:32 */ +#define _WDTPS_1_16_2H 0xF9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xF7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xF5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xF3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xF1 /* 1:1 */ + +/* CCP2 Mux 3H options */ +#define _CCP2MUX_RC1_3H 0xFF /* RC1 */ +#define _CCP2MUX_RB3_3H 0xFE /* RB3 */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Code Protect 00200-01FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 02000-03FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Code Protect 04000-05FFF 5L options */ +#define _CP_2_OFF_5L 0xFF /* Disabled */ +#define _CP_2_ON_5L 0xFB /* Enabled */ + +/* Code Protect 06000-07FFF 5L options */ +#define _CP_3_OFF_5L 0xFF /* Disabled */ +#define _CP_3_ON_5L 0xF7 /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00200-01FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 02000-03FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Table Write Protect 04000-05FFF 6L options */ +#define _WRT_2_OFF_6L 0xFF /* Disabled */ +#define _WRT_2_ON_6L 0xFB /* Enabled */ + +/* Table Write Protect 06000-07FFF 6L options */ +#define _WRT_3_OFF_6L 0xFF /* Disabled */ +#define _WRT_3_ON_6L 0xF7 /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00200-01FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 02000-03FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect 04000-05FFF 7L options */ +#define _EBTR_2_OFF_7L 0xFF /* Disabled */ +#define _EBTR_2_ON_7L 0xFB /* Enabled */ + +/* Table Read Protect 06000-07FFF 7L options */ +#define _EBTR_3_OFF_7L 0xFF /* Disabled */ +#define _EBTR_3_ON_7L 0xF7 /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f2520.h b/device/include/pic16/pic18f2520.h new file mode 100644 index 0000000..a482405 --- /dev/null +++ b/device/include/pic16/pic18f2520.h @@ -0,0 +1,6 @@ +/* + * pic18f2420.h - PIC18F2420 Device Library Header + */ + +#include "pic18f4520.h" + diff --git a/device/include/pic16/pic18f2523.h b/device/include/pic16/pic18f2523.h new file mode 100644 index 0000000..a0cfdbd --- /dev/null +++ b/device/include/pic16/pic18f2523.h @@ -0,0 +1,6 @@ +/* + * pic18f2523.h - device specific declarations + */ + +#include "pic18f4523.h" + diff --git a/device/include/pic16/pic18f2525.h b/device/include/pic16/pic18f2525.h new file mode 100644 index 0000000..6309dd1 --- /dev/null +++ b/device/include/pic16/pic18f2525.h @@ -0,0 +1,6 @@ +/* + * pic18f2525.h - Device Library Header + */ + +#include "pic18f4620.h" + diff --git a/device/include/pic16/pic18f2550.h b/device/include/pic16/pic18f2550.h new file mode 100644 index 0000000..9f1f74d --- /dev/null +++ b/device/include/pic16/pic18f2550.h @@ -0,0 +1,6 @@ +/* + * pic18f2550.h - PIC18F2550 Device Library Header + */ + +#include "pic18f2455.h" + diff --git a/device/include/pic16/pic18f258.h b/device/include/pic16/pic18f258.h new file mode 100644 index 0000000..550819c --- /dev/null +++ b/device/include/pic16/pic18f258.h @@ -0,0 +1,2696 @@ + +/* + * pic18f258.h - PIC18F258 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f258.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F258_H__ +#define __PIC18F258_H__ + +extern __sfr __at (0xf00) RXF0SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF0SIDHbits_t; + +extern volatile __RXF0SIDHbits_t __at (0xf00) RXF0SIDHbits; + +extern __sfr __at (0xf01) RXF0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF0SIDLbits_t; + +extern volatile __RXF0SIDLbits_t __at (0xf01) RXF0SIDLbits; + +extern __sfr __at (0xf02) RXF0EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF0EIDHbits_t; + +extern volatile __RXF0EIDHbits_t __at (0xf02) RXF0EIDHbits; + +extern __sfr __at (0xf03) RXF0EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF0EIDLbits_t; + +extern volatile __RXF0EIDLbits_t __at (0xf03) RXF0EIDLbits; + +extern __sfr __at (0xf04) RXF1SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF1SIDHbits_t; + +extern volatile __RXF1SIDHbits_t __at (0xf04) RXF1SIDHbits; + +extern __sfr __at (0xf05) RXF1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF1SIDLbits_t; + +extern volatile __RXF1SIDLbits_t __at (0xf05) RXF1SIDLbits; + +extern __sfr __at (0xf06) RXF1EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF1EIDHbits_t; + +extern volatile __RXF1EIDHbits_t __at (0xf06) RXF1EIDHbits; + +extern __sfr __at (0xf07) RXF1EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF1EIDLbits_t; + +extern volatile __RXF1EIDLbits_t __at (0xf07) RXF1EIDLbits; + +extern __sfr __at (0xf08) RXF2SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF2SIDHbits_t; + +extern volatile __RXF2SIDHbits_t __at (0xf08) RXF2SIDHbits; + +extern __sfr __at (0xf09) RXF2SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF2SIDLbits_t; + +extern volatile __RXF2SIDLbits_t __at (0xf09) RXF2SIDLbits; + +extern __sfr __at (0xf0a) RXF2EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF2EIDHbits_t; + +extern volatile __RXF2EIDHbits_t __at (0xf0a) RXF2EIDHbits; + +extern __sfr __at (0xf0b) RXF2EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF2EIDLbits_t; + +extern volatile __RXF2EIDLbits_t __at (0xf0b) RXF2EIDLbits; + +extern __sfr __at (0xf0c) RXF3SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF3SIDHbits_t; + +extern volatile __RXF3SIDHbits_t __at (0xf0c) RXF3SIDHbits; + +extern __sfr __at (0xf0d) RXF3SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF3SIDLbits_t; + +extern volatile __RXF3SIDLbits_t __at (0xf0d) RXF3SIDLbits; + +extern __sfr __at (0xf0e) RXF3EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF3EIDHbits_t; + +extern volatile __RXF3EIDHbits_t __at (0xf0e) RXF3EIDHbits; + +extern __sfr __at (0xf0f) RXF3EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF3EIDLbits_t; + +extern volatile __RXF3EIDLbits_t __at (0xf0f) RXF3EIDLbits; + +extern __sfr __at (0xf10) RXF4SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF4SIDHbits_t; + +extern volatile __RXF4SIDHbits_t __at (0xf10) RXF4SIDHbits; + +extern __sfr __at (0xf11) RXF4SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF4SIDLbits_t; + +extern volatile __RXF4SIDLbits_t __at (0xf11) RXF4SIDLbits; + +extern __sfr __at (0xf12) RXF4EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF4EIDHbits_t; + +extern volatile __RXF4EIDHbits_t __at (0xf12) RXF4EIDHbits; + +extern __sfr __at (0xf13) RXF4EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF4EIDLbits_t; + +extern volatile __RXF4EIDLbits_t __at (0xf13) RXF4EIDLbits; + +extern __sfr __at (0xf14) RXF5SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF5SIDHbits_t; + +extern volatile __RXF5SIDHbits_t __at (0xf14) RXF5SIDHbits; + +extern __sfr __at (0xf15) RXF5SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF5SIDLbits_t; + +extern volatile __RXF5SIDLbits_t __at (0xf15) RXF5SIDLbits; + +extern __sfr __at (0xf16) RXF5EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF5EIDHbits_t; + +extern volatile __RXF5EIDHbits_t __at (0xf16) RXF5EIDHbits; + +extern __sfr __at (0xf17) RXF5EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF5EIDLbits_t; + +extern volatile __RXF5EIDLbits_t __at (0xf17) RXF5EIDLbits; + +extern __sfr __at (0xf18) RXM0SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXM0SIDHbits_t; + +extern volatile __RXM0SIDHbits_t __at (0xf18) RXM0SIDHbits; + +extern __sfr __at (0xf19) RXM0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXM0SIDLbits_t; + +extern volatile __RXM0SIDLbits_t __at (0xf19) RXM0SIDLbits; + +extern __sfr __at (0xf1a) RXM0EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXM0EIDHbits_t; + +extern volatile __RXM0EIDHbits_t __at (0xf1a) RXM0EIDHbits; + +extern __sfr __at (0xf1b) RXM0EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXM0EIDLbits_t; + +extern volatile __RXM0EIDLbits_t __at (0xf1b) RXM0EIDLbits; + +extern __sfr __at (0xf1c) RXM1SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXM1SIDHbits_t; + +extern volatile __RXM1SIDHbits_t __at (0xf1c) RXM1SIDHbits; + +extern __sfr __at (0xf1d) RXM1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDEN:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXM1SIDLbits_t; + +extern volatile __RXM1SIDLbits_t __at (0xf1d) RXM1SIDLbits; + +extern __sfr __at (0xf1e) RXM1EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXM1EIDHbits_t; + +extern volatile __RXM1EIDHbits_t __at (0xf1e) RXM1EIDHbits; + +extern __sfr __at (0xf1f) RXM1EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXM1EIDLbits_t; + +extern volatile __RXM1EIDLbits_t __at (0xf1f) RXM1EIDLbits; + +extern __sfr __at (0xf20) TXB2CON; +typedef union { + struct { + unsigned TXPRI0:1; + unsigned TXPRI1:1; + unsigned :1; + unsigned TXREQ:1; + unsigned TXERR:1; + unsigned TXLARB:1; + unsigned TXABT:1; + unsigned :1; + }; +} __TXB2CONbits_t; + +extern volatile __TXB2CONbits_t __at (0xf20) TXB2CONbits; + +extern __sfr __at (0xf21) TXB2SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __TXB2SIDHbits_t; + +extern volatile __TXB2SIDHbits_t __at (0xf21) TXB2SIDHbits; + +extern __sfr __at (0xf22) TXB2SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDEN:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __TXB2SIDLbits_t; + +extern volatile __TXB2SIDLbits_t __at (0xf22) TXB2SIDLbits; + +extern __sfr __at (0xf23) TXB2EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __TXB2EIDHbits_t; + +extern volatile __TXB2EIDHbits_t __at (0xf23) TXB2EIDHbits; + +extern __sfr __at (0xf24) TXB2EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __TXB2EIDLbits_t; + +extern volatile __TXB2EIDLbits_t __at (0xf24) TXB2EIDLbits; + +extern __sfr __at (0xf25) TXB2DLC; +typedef union { + struct { + unsigned TXB2DLC0:1; + unsigned TXB2DLC1:1; + unsigned TXB2DLC2:1; + unsigned TXB2DLC3:1; + unsigned :1; + unsigned :1; + unsigned TXB2TXRTR:1; + unsigned :1; + }; +} __TXB2DLCbits_t; + +extern volatile __TXB2DLCbits_t __at (0xf25) TXB2DLCbits; + +extern __sfr __at (0xf26) TXB2D0; +typedef union { + struct { + unsigned TXB2D00:1; + unsigned TXB2D01:1; + unsigned TXB2D02:1; + unsigned TXB2D03:1; + unsigned TXB2D04:1; + unsigned TXB2D05:1; + unsigned TXB2D06:1; + unsigned TXB2D07:1; + }; +} __TXB2D0bits_t; + +extern volatile __TXB2D0bits_t __at (0xf26) TXB2D0bits; + +extern __sfr __at (0xf27) TXB2D1; +typedef union { + struct { + unsigned TXB2D10:1; + unsigned TXB2D11:1; + unsigned TXB2D12:1; + unsigned TXB2D13:1; + unsigned TXB2D14:1; + unsigned TXB2D15:1; + unsigned TXB2D16:1; + unsigned TXB2D17:1; + }; +} __TXB2D1bits_t; + +extern volatile __TXB2D1bits_t __at (0xf27) TXB2D1bits; + +extern __sfr __at (0xf28) TXB2D2; +typedef union { + struct { + unsigned TXB2D20:1; + unsigned TXB2D21:1; + unsigned TXB2D22:1; + unsigned TXB2D23:1; + unsigned TXB2D24:1; + unsigned TXB2D25:1; + unsigned TXB2D26:1; + unsigned TXB2D27:1; + }; +} __TXB2D2bits_t; + +extern volatile __TXB2D2bits_t __at (0xf28) TXB2D2bits; + +extern __sfr __at (0xf29) TXB2D3; +typedef union { + struct { + unsigned TXB2D30:1; + unsigned TXB2D31:1; + unsigned TXB2D32:1; + unsigned TXB2D33:1; + unsigned TXB2D34:1; + unsigned TXB2D35:1; + unsigned TXB2D36:1; + unsigned TXB2D37:1; + }; +} __TXB2D3bits_t; + +extern volatile __TXB2D3bits_t __at (0xf29) TXB2D3bits; + +extern __sfr __at (0xf2a) TXB2D4; +typedef union { + struct { + unsigned TXB2D40:1; + unsigned TXB2D41:1; + unsigned TXB2D42:1; + unsigned TXB2D43:1; + unsigned TXB2D44:1; + unsigned TXB2D45:1; + unsigned TXB2D46:1; + unsigned TXB2D47:1; + }; +} __TXB2D4bits_t; + +extern volatile __TXB2D4bits_t __at (0xf2a) TXB2D4bits; + +extern __sfr __at (0xf2b) TXB2D5; +typedef union { + struct { + unsigned TXB2D50:1; + unsigned TXB2D51:1; + unsigned TXB2D52:1; + unsigned TXB2D53:1; + unsigned TXB2D54:1; + unsigned TXB2D55:1; + unsigned TXB2D56:1; + unsigned TXB2D57:1; + }; +} __TXB2D5bits_t; + +extern volatile __TXB2D5bits_t __at (0xf2b) TXB2D5bits; + +extern __sfr __at (0xf2c) TXB2D6; +typedef union { + struct { + unsigned TXB2D60:1; + unsigned TXB2D61:1; + unsigned TXB2D62:1; + unsigned TXB2D63:1; + unsigned TXB2D64:1; + unsigned TXB2D65:1; + unsigned TXB2D66:1; + unsigned TXB2D67:1; + }; +} __TXB2D6bits_t; + +extern volatile __TXB2D6bits_t __at (0xf2c) TXB2D6bits; + +extern __sfr __at (0xf2d) TXB2D7; +typedef union { + struct { + unsigned TXB2D70:1; + unsigned TXB2D71:1; + unsigned TXB2D72:1; + unsigned TXB2D73:1; + unsigned TXB2D74:1; + unsigned TXB2D75:1; + unsigned TXB2D76:1; + unsigned TXB2D77:1; + }; +} __TXB2D7bits_t; + +extern volatile __TXB2D7bits_t __at (0xf2d) TXB2D7bits; + +extern __sfr __at (0xf2e) CANSTATRO4; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATRO4bits_t; + +extern volatile __CANSTATRO4bits_t __at (0xf2e) CANSTATRO4bits; + +extern __sfr __at (0xf30) TXB1CON; +typedef union { + struct { + unsigned TXPRI0:1; + unsigned TXPRI1:1; + unsigned :1; + unsigned TXREQ:1; + unsigned TXERR:1; + unsigned TXLARB:1; + unsigned TXABT:1; + unsigned :1; + }; +} __TXB1CONbits_t; + +extern volatile __TXB1CONbits_t __at (0xf30) TXB1CONbits; + +extern __sfr __at (0xf31) TXB1SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __TXB1SIDHbits_t; + +extern volatile __TXB1SIDHbits_t __at (0xf31) TXB1SIDHbits; + +extern __sfr __at (0xf32) TXB1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __TXB1SIDLbits_t; + +extern volatile __TXB1SIDLbits_t __at (0xf32) TXB1SIDLbits; + +extern __sfr __at (0xf33) TXB1EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __TXB1EIDHbits_t; + +extern volatile __TXB1EIDHbits_t __at (0xf33) TXB1EIDHbits; + +extern __sfr __at (0xf34) TXB1EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __TXB1EIDLbits_t; + +extern volatile __TXB1EIDLbits_t __at (0xf34) TXB1EIDLbits; + +extern __sfr __at (0xf35) TXB1DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned :1; + unsigned :1; + unsigned TXRTR:1; + unsigned :1; + }; +} __TXB1DLCbits_t; + +extern volatile __TXB1DLCbits_t __at (0xf35) TXB1DLCbits; + +extern __sfr __at (0xf36) TXB1D0; +typedef union { + struct { + unsigned TXB1D00:1; + unsigned TXB1D01:1; + unsigned TXB1D02:1; + unsigned TXB1D03:1; + unsigned TXB1D04:1; + unsigned TXB1D05:1; + unsigned TXB1D06:1; + unsigned TXB1D07:1; + }; +} __TXB1D0bits_t; + +extern volatile __TXB1D0bits_t __at (0xf36) TXB1D0bits; + +extern __sfr __at (0xf37) TXB1D1; +typedef union { + struct { + unsigned TXB1D10:1; + unsigned TXB1D11:1; + unsigned TXB1D12:1; + unsigned TXB1D13:1; + unsigned TXB1D14:1; + unsigned TXB1D15:1; + unsigned TXB1D16:1; + unsigned TXB1D17:1; + }; +} __TXB1D1bits_t; + +extern volatile __TXB1D1bits_t __at (0xf37) TXB1D1bits; + +extern __sfr __at (0xf38) TXB1D2; +typedef union { + struct { + unsigned TXB1D20:1; + unsigned TXB1D21:1; + unsigned TXB1D22:1; + unsigned TXB1D23:1; + unsigned TXB1D24:1; + unsigned TXB1D25:1; + unsigned TXB1D26:1; + unsigned TXB1D27:1; + }; +} __TXB1D2bits_t; + +extern volatile __TXB1D2bits_t __at (0xf38) TXB1D2bits; + +extern __sfr __at (0xf39) TXB1D3; +typedef union { + struct { + unsigned TXB1D30:1; + unsigned TXB1D31:1; + unsigned TXB1D32:1; + unsigned TXB1D33:1; + unsigned TXB1D34:1; + unsigned TXB1D35:1; + unsigned TXB1D36:1; + unsigned TXB1D37:1; + }; +} __TXB1D3bits_t; + +extern volatile __TXB1D3bits_t __at (0xf39) TXB1D3bits; + +extern __sfr __at (0xf3a) TXB1D4; +typedef union { + struct { + unsigned TXB1D40:1; + unsigned TXB1D41:1; + unsigned TXB1D42:1; + unsigned TXB1D43:1; + unsigned TXB1D44:1; + unsigned TXB1D45:1; + unsigned TXB1D46:1; + unsigned TXB1D47:1; + }; +} __TXB1D4bits_t; + +extern volatile __TXB1D4bits_t __at (0xf3a) TXB1D4bits; + +extern __sfr __at (0xf3b) TXB1D5; +typedef union { + struct { + unsigned TXB1D50:1; + unsigned TXB1D51:1; + unsigned TXB1D52:1; + unsigned TXB1D53:1; + unsigned TXB1D54:1; + unsigned TXB1D55:1; + unsigned TXB1D56:1; + unsigned TXB1D57:1; + }; +} __TXB1D5bits_t; + +extern volatile __TXB1D5bits_t __at (0xf3b) TXB1D5bits; + +extern __sfr __at (0xf3c) TXB1D6; +typedef union { + struct { + unsigned TXB1D60:1; + unsigned TXB1D61:1; + unsigned TXB1D62:1; + unsigned TXB1D63:1; + unsigned TXB1D64:1; + unsigned TXB1D65:1; + unsigned TXB1D66:1; + unsigned TXB1D67:1; + }; +} __TXB1D6bits_t; + +extern volatile __TXB1D6bits_t __at (0xf3c) TXB1D6bits; + +extern __sfr __at (0xf3d) TXB1D7; +typedef union { + struct { + unsigned TXB1D70:1; + unsigned TXB1D71:1; + unsigned TXB1D72:1; + unsigned TXB1D73:1; + unsigned TXB1D74:1; + unsigned TXB1D75:1; + unsigned TXB1D76:1; + unsigned TXB1D77:1; + }; +} __TXB1D7bits_t; + +extern volatile __TXB1D7bits_t __at (0xf3d) TXB1D7bits; + +extern __sfr __at (0xf3e) CANSTATRO3; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATRO3bits_t; + +extern volatile __CANSTATRO3bits_t __at (0xf3e) CANSTATRO3bits; + +extern __sfr __at (0xf40) TXB0CON; +typedef union { + struct { + unsigned TXPRI0:1; + unsigned TXPRI1:1; + unsigned :1; + unsigned TXREQ:1; + unsigned TXERR:1; + unsigned TXLARB:1; + unsigned TXABT:1; + unsigned :1; + }; +} __TXB0CONbits_t; + +extern volatile __TXB0CONbits_t __at (0xf40) TXB0CONbits; + +extern __sfr __at (0xf41) TXB0SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __TXB0SIDHbits_t; + +extern volatile __TXB0SIDHbits_t __at (0xf41) TXB0SIDHbits; + +extern __sfr __at (0xf42) TXB0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __TXB0SIDLbits_t; + +extern volatile __TXB0SIDLbits_t __at (0xf42) TXB0SIDLbits; + +extern __sfr __at (0xf43) TXB0EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __TXB0EIDHbits_t; + +extern volatile __TXB0EIDHbits_t __at (0xf43) TXB0EIDHbits; + +extern __sfr __at (0xf44) TXB0EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __TXB0EIDLbits_t; + +extern volatile __TXB0EIDLbits_t __at (0xf44) TXB0EIDLbits; + +extern __sfr __at (0xf45) TXB0DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned :1; + unsigned :1; + unsigned TXRTR:1; + unsigned :1; + }; +} __TXB0DLCbits_t; + +extern volatile __TXB0DLCbits_t __at (0xf45) TXB0DLCbits; + +extern __sfr __at (0xf46) TXB0D0; +typedef union { + struct { + unsigned TXB0D00:1; + unsigned TXB0D01:1; + unsigned TXB0D02:1; + unsigned TXB0D03:1; + unsigned TXB0D04:1; + unsigned TXB0D05:1; + unsigned TXB0D06:1; + unsigned TXB0D07:1; + }; +} __TXB0D0bits_t; + +extern volatile __TXB0D0bits_t __at (0xf46) TXB0D0bits; + +extern __sfr __at (0xf47) TXB0D1; +typedef union { + struct { + unsigned TXB0D10:1; + unsigned TXB0D11:1; + unsigned TXB0D12:1; + unsigned TXB0D13:1; + unsigned TXB0D14:1; + unsigned TXB0D15:1; + unsigned TXB0D16:1; + unsigned TXB0D17:1; + }; +} __TXB0D1bits_t; + +extern volatile __TXB0D1bits_t __at (0xf47) TXB0D1bits; + +extern __sfr __at (0xf48) TXB0D2; +typedef union { + struct { + unsigned TXB0D20:1; + unsigned TXB0D21:1; + unsigned TXB0D22:1; + unsigned TXB0D23:1; + unsigned TXB0D24:1; + unsigned TXB0D25:1; + unsigned TXB0D26:1; + unsigned TXB0D27:1; + }; +} __TXB0D2bits_t; + +extern volatile __TXB0D2bits_t __at (0xf48) TXB0D2bits; + +extern __sfr __at (0xf49) TXB0D3; +typedef union { + struct { + unsigned TXB0D30:1; + unsigned TXB0D31:1; + unsigned TXB0D32:1; + unsigned TXB0D33:1; + unsigned TXB0D34:1; + unsigned TXBD035:1; + unsigned TXBD0D36:1; + unsigned TXB0D37:1; + }; +} __TXB0D3bits_t; + +extern volatile __TXB0D3bits_t __at (0xf49) TXB0D3bits; + +extern __sfr __at (0xf4a) TXB0D4; +typedef union { + struct { + unsigned TXB0D40:1; + unsigned TXB0D41:1; + unsigned TXB0D42:1; + unsigned TXB0D43:1; + unsigned TXB0D44:1; + unsigned TXB0D45:1; + unsigned TXB0D46:1; + unsigned TXB0D47:1; + }; +} __TXB0D4bits_t; + +extern volatile __TXB0D4bits_t __at (0xf4a) TXB0D4bits; + +extern __sfr __at (0xf4b) TXB0D5; +typedef union { + struct { + unsigned TXB0D50:1; + unsigned TXB0D51:1; + unsigned TXB0D52:1; + unsigned TXB0D53:1; + unsigned TXB0D54:1; + unsigned TXB0D55:1; + unsigned TXB0D56:1; + unsigned TXB0D57:1; + }; +} __TXB0D5bits_t; + +extern volatile __TXB0D5bits_t __at (0xf4b) TXB0D5bits; + +extern __sfr __at (0xf4c) TXB0D6; +typedef union { + struct { + unsigned TXB0D60:1; + unsigned TXB0D61:1; + unsigned TXB0D62:1; + unsigned TXB0D63:1; + unsigned TXB0D64:1; + unsigned TXB0D65:1; + unsigned TXB0D66:1; + unsigned TXB0D67:1; + }; +} __TXB0D6bits_t; + +extern volatile __TXB0D6bits_t __at (0xf4c) TXB0D6bits; + +extern __sfr __at (0xf4d) TXB0D7; +typedef union { + struct { + unsigned TXB0D70:1; + unsigned TXB0D71:1; + unsigned TXB0D72:1; + unsigned TXB0D73:1; + unsigned TXB0D74:1; + unsigned TXB0D75:1; + unsigned TXB0D76:1; + unsigned TXB0D77:1; + }; +} __TXB0D7bits_t; + +extern volatile __TXB0D7bits_t __at (0xf4d) TXB0D7bits; + +extern __sfr __at (0xf4e) CANSTATRO2; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATRO2bits_t; + +extern volatile __CANSTATRO2bits_t __at (0xf4e) CANSTATRO2bits; + +extern __sfr __at (0xf50) RXB1CON; +typedef union { + struct { + unsigned FILHIT0:1; + unsigned FILHIT1:1; + unsigned FILHIT2:1; + unsigned RXRTRRO:1; + unsigned :1; + unsigned RXM0:1; + unsigned RXM1:1; + unsigned RXFUL:1; + }; +} __RXB1CONbits_t; + +extern volatile __RXB1CONbits_t __at (0xf50) RXB1CONbits; + +extern __sfr __at (0xf51) RXB1SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXB1SIDHbits_t; + +extern volatile __RXB1SIDHbits_t __at (0xf51) RXB1SIDHbits; + +extern __sfr __at (0xf52) RXB1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned SRR:1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXB1SIDLbits_t; + +extern volatile __RXB1SIDLbits_t __at (0xf52) RXB1SIDLbits; + +extern __sfr __at (0xf53) RXB1EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXB1EIDHbits_t; + +extern volatile __RXB1EIDHbits_t __at (0xf53) RXB1EIDHbits; + +extern __sfr __at (0xf54) RXB1EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXB1EIDLbits_t; + +extern volatile __RXB1EIDLbits_t __at (0xf54) RXB1EIDLbits; + +extern __sfr __at (0xf55) RXB1DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned RESB0:1; + unsigned RESB1:1; + unsigned RXRTR:1; + unsigned :1; + }; +} __RXB1DLCbits_t; + +extern volatile __RXB1DLCbits_t __at (0xf55) RXB1DLCbits; + +extern __sfr __at (0xf56) RXB1D0; +typedef union { + struct { + unsigned RXB1D00:1; + unsigned RXB1D01:1; + unsigned RXB1D02:1; + unsigned RXB1D03:1; + unsigned RXB1D04:1; + unsigned RXB1D05:1; + unsigned RXB1D06:1; + unsigned RXB1D07:1; + }; +} __RXB1D0bits_t; + +extern volatile __RXB1D0bits_t __at (0xf56) RXB1D0bits; + +extern __sfr __at (0xf57) RXB1D1; +typedef union { + struct { + unsigned RXB1D10:1; + unsigned RXB1D11:1; + unsigned RXB1D12:1; + unsigned RXB1D13:1; + unsigned RXB1D14:1; + unsigned RXB1D15:1; + unsigned RXB1D16:1; + unsigned RXB1D17:1; + }; +} __RXB1D1bits_t; + +extern volatile __RXB1D1bits_t __at (0xf57) RXB1D1bits; + +extern __sfr __at (0xf58) RXB1D2; +typedef union { + struct { + unsigned RXB1D20:1; + unsigned RXB1D21:1; + unsigned RXB1D22:1; + unsigned RXB1D23:1; + unsigned RXB1D24:1; + unsigned RXB1D25:1; + unsigned RXB1D26:1; + unsigned RXB1D27:1; + }; +} __RXB1D2bits_t; + +extern volatile __RXB1D2bits_t __at (0xf58) RXB1D2bits; + +extern __sfr __at (0xf59) RXB1D3; +typedef union { + struct { + unsigned RXB1D30:1; + unsigned RXB1D31:1; + unsigned RXB1D32:1; + unsigned RXB1D33:1; + unsigned RXB1D34:1; + unsigned RXB1D35:1; + unsigned RXB1D36:1; + unsigned RXB1D37:1; + }; +} __RXB1D3bits_t; + +extern volatile __RXB1D3bits_t __at (0xf59) RXB1D3bits; + +extern __sfr __at (0xf5a) RXB1D4; +typedef union { + struct { + unsigned RXB1D40:1; + unsigned RXB1D41:1; + unsigned RXB1D42:1; + unsigned RXB1D43:1; + unsigned RXB1D44:1; + unsigned RXB1D45:1; + unsigned RXB1D46:1; + unsigned RXB1D47:1; + }; +} __RXB1D4bits_t; + +extern volatile __RXB1D4bits_t __at (0xf5a) RXB1D4bits; + +extern __sfr __at (0xf5b) RXB1D5; +typedef union { + struct { + unsigned RXB1D50:1; + unsigned RXB1D51:1; + unsigned RXB1D52:1; + unsigned RXB1D53:1; + unsigned RXB1D54:1; + unsigned RXB1D55:1; + unsigned RXB1D56:1; + unsigned RXB1D57:1; + }; +} __RXB1D5bits_t; + +extern volatile __RXB1D5bits_t __at (0xf5b) RXB1D5bits; + +extern __sfr __at (0xf5c) RXB1D6; +typedef union { + struct { + unsigned RXB1D60:1; + unsigned RXB1D61:1; + unsigned RXB1D62:1; + unsigned RXB1D63:1; + unsigned RXB1D64:1; + unsigned RXB1D65:1; + unsigned RXB1D66:1; + unsigned RXB1D67:1; + }; +} __RXB1D6bits_t; + +extern volatile __RXB1D6bits_t __at (0xf5c) RXB1D6bits; + +extern __sfr __at (0xf5d) RXB1D7; +typedef union { + struct { + unsigned RXB1D70:1; + unsigned RXB1D71:1; + unsigned RXB1D72:1; + unsigned RXB1D73:1; + unsigned RXB1D74:1; + unsigned RXB1D75:1; + unsigned RXB1D76:1; + unsigned RXB1D77:1; + }; +} __RXB1D7bits_t; + +extern volatile __RXB1D7bits_t __at (0xf5d) RXB1D7bits; + +extern __sfr __at (0xf5e) CANSTATRO1; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATRO1bits_t; + +extern volatile __CANSTATRO1bits_t __at (0xf5e) CANSTATRO1bits; + +extern __sfr __at (0xf60) RXB0CON; +typedef union { + struct { + unsigned FILHIT0:1; + unsigned RXB0DBEN_R:1; + unsigned RXB0DBEN:1; + unsigned RXRTRR0:1; + unsigned :1; + unsigned RXM0:1; + unsigned RXM1:1; + unsigned RXFUL:1; + }; +} __RXB0CONbits_t; + +extern volatile __RXB0CONbits_t __at (0xf60) RXB0CONbits; + +extern __sfr __at (0xf61) RXB0SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXB0SIDHbits_t; + +extern volatile __RXB0SIDHbits_t __at (0xf61) RXB0SIDHbits; + +extern __sfr __at (0xf62) RXB0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXID:1; + unsigned SRR:1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXB0SIDLbits_t; + +extern volatile __RXB0SIDLbits_t __at (0xf62) RXB0SIDLbits; + +extern __sfr __at (0xf63) RXB0EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EDI9:1; + unsigned EID10:1; + unsigned ED11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXB0EIDHbits_t; + +extern volatile __RXB0EIDHbits_t __at (0xf63) RXB0EIDHbits; + +extern __sfr __at (0xf64) RXB0EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXB0EIDLbits_t; + +extern volatile __RXB0EIDLbits_t __at (0xf64) RXB0EIDLbits; + +extern __sfr __at (0xf65) RXB0DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned RESB0:1; + unsigned RESB1:1; + unsigned RTR:1; + unsigned :1; + }; +} __RXB0DLCbits_t; + +extern volatile __RXB0DLCbits_t __at (0xf65) RXB0DLCbits; + +extern __sfr __at (0xf66) RXB0D0; +extern __sfr __at (0xf67) RXB0D1; +extern __sfr __at (0xf68) RXB0D2; +extern __sfr __at (0xf69) RXB0D3; +extern __sfr __at (0xf6a) RXB0D4; +extern __sfr __at (0xf6b) RXB0D5; +extern __sfr __at (0xf6c) RXB0D6; +extern __sfr __at (0xf6d) RXB0D7; +extern __sfr __at (0xf6e) CANSTAT; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATbits_t; + +extern volatile __CANSTATbits_t __at (0xf6e) CANSTATbits; + +extern __sfr __at (0xf6f) CANCON; +typedef union { + struct { + unsigned WIN0:1; + unsigned WIN1:1; + unsigned WIN2:1; + unsigned WIN3:1; + unsigned ABAT:1; + unsigned REQOP0:1; + unsigned REQOP1:1; + unsigned REQOP2:1; + }; +} __CANCONbits_t; + +extern volatile __CANCONbits_t __at (0xf6f) CANCONbits; + +extern __sfr __at (0xf70) BRGCON1; +typedef union { + struct { + unsigned BRP0:1; + unsigned BRP1:1; + unsigned BRP2:1; + unsigned BRP3:1; + unsigned BRP4:1; + unsigned BRP5:1; + unsigned SJW0:1; + unsigned SJW1:1; + }; +} __BRGCON1bits_t; + +extern volatile __BRGCON1bits_t __at (0xf70) BRGCON1bits; + +extern __sfr __at (0xf71) BRGCON2; +typedef union { + struct { + unsigned PRSEG0:1; + unsigned PRSEG1:1; + unsigned PRSEG2:1; + unsigned SEG1PH0:1; + unsigned SEG1PH1:1; + unsigned SEG1PH2:1; + unsigned SAM:1; + unsigned SEG2PHTS:1; + }; +} __BRGCON2bits_t; + +extern volatile __BRGCON2bits_t __at (0xf71) BRGCON2bits; + +extern __sfr __at (0xf72) BRGCON3; +typedef union { + struct { + unsigned SEG2PH0:1; + unsigned SEG2PH1:1; + unsigned SEG2PH2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned WAKFIL:1; + unsigned :1; + }; +} __BRGCON3bits_t; + +extern volatile __BRGCON3bits_t __at (0xf72) BRGCON3bits; + +extern __sfr __at (0xf73) CIOCON; +typedef union { + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned CANCAP:1; + unsigned ENDRHI:1; + unsigned :1; + unsigned :1; + }; +} __CIOCONbits_t; + +extern volatile __CIOCONbits_t __at (0xf73) CIOCONbits; + +extern __sfr __at (0xf74) COMSTAT; +typedef union { + struct { + unsigned EWARN:1; + unsigned RXWARN:1; + unsigned TXWARN:1; + unsigned RXBP:1; + unsigned TXBP:1; + unsigned TXBO:1; + unsigned RXB1OVFL:1; + unsigned RXB0OVFL:1; + }; +} __COMSTATbits_t; + +extern volatile __COMSTATbits_t __at (0xf74) COMSTATbits; + +extern __sfr __at (0xf75) RXERRCNT; +typedef union { + struct { + unsigned REC0:1; + unsigned REC1:1; + unsigned REC2:1; + unsigned REC3:1; + unsigned REC4:1; + unsigned REC5:1; + unsigned REC6:1; + unsigned REC7:1; + }; +} __RXERRCNTbits_t; + +extern volatile __RXERRCNTbits_t __at (0xf75) RXERRCNTbits; + +extern __sfr __at (0xf76) TXERRCNT; +typedef union { + struct { + unsigned TEC0:1; + unsigned TEC1:1; + unsigned TEC2:1; + unsigned TEC3:1; + unsigned TEC4:1; + unsigned TEC5:1; + unsigned TEC6:1; + unsigned TEC7:1; + }; +} __TXERRCNTbits_t; + +extern volatile __TXERRCNTbits_t __at (0xf76) TXERRCNTbits; + +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned :1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned INT3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned CMIE:1; + unsigned :1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned CMIF:1; + unsigned :1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned CMIP:1; + unsigned :1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa3) PIE3; +typedef union { + struct { + unsigned RX0IE:1; + unsigned RX1IE:1; + unsigned TX0IE:1; + unsigned TX1IE:1; + unsigned TX2IE:1; + unsigned ERRIE:1; + unsigned WAKIE:1; + unsigned IVRE:1; + }; +} __PIE3bits_t; + +extern volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +extern __sfr __at (0xfa4) PIR3; +typedef union { + struct { + unsigned RX0IF:1; + unsigned RX1IF:1; + unsigned TX0IF:1; + unsigned TX1IF:1; + unsigned TX2IF:1; + unsigned ERRIF:1; + unsigned WAKIF:1; + unsigned IVRF:1; + }; +} __PIR3bits_t; + +extern volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +extern __sfr __at (0xfa5) IPR3; +typedef union { + struct { + unsigned RX0IP:1; + unsigned RX1IP:1; + unsigned TX0IP:1; + unsigned TX1IP:1; + unsigned TX2IP:1; + unsigned ERRIP:1; + unsigned WAKIP:1; + unsigned IVRP:1; + }; +} __IPR3bits_t; + +extern volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfab) RCSTA; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTAbits_t; + +extern volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +extern __sfr __at (0xfac) TXSTA; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTAbits_t; + +extern volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DCCP1Y:1; + unsigned DCCP1X:1; + unsigned :1; + unsigned :1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned :1; + unsigned :1; + unsigned ADCS2:1; + unsigned ADFM:1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned :1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned ADCS0:1; + unsigned ADCS1:1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +typedef union { + struct { + unsigned T0PS0:1; + unsigned T0PS1:1; + unsigned T0PS2:1; + unsigned PSA:1; + unsigned T0SE:1; + unsigned T0CS:1; + unsigned T08BIT:1; + unsigned TMR0ON:1; + }; +} __T0CONbits_t; + +extern volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned :1; + unsigned :1; + unsigned INT1E:1; + unsigned :1; + unsigned :1; + unsigned INT1P:1; + unsigned :1; + }; + + struct { + unsigned INT1IF:1; + unsigned :1; + unsigned :1; + unsigned INT2IE:1; + unsigned :1; + unsigned :1; + unsigned INT1IP:1; + unsigned :1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned :1; + unsigned T0IP:1; + unsigned :1; + unsigned :1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */ +#define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */ +#define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */ +#define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */ +#define _OSC_RC_1H 0xFB /* RC */ +#define _OSC_HS_1H 0xFA /* HS */ +#define _OSC_XT_1H 0xF9 /* XT */ +#define _OSC_LP_1H 0xF8 /* LP */ + +/* Osc. Switch Enable 1H options */ +#define _OSCS_OFF_1H 0xFF /* Disabled */ +#define _OSCS_ON_1H 0xDF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_0V_2L 0xFF /* 2.0V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_OFF_2H 0xFE /* Disabled */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_128_2H 0xFF /* 1:128 */ +#define _WDTPS_1_64_2H 0xFD /* 1:64 */ +#define _WDTPS_1_32_2H 0xFB /* 1:32 */ +#define _WDTPS_1_16_2H 0xF9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xF7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xF5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xF3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xF1 /* 1:1 */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Code Protect 00200-01FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 02000-03FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Code Protect 04000-05FFF 5L options */ +#define _CP_2_OFF_5L 0xFF /* Disabled */ +#define _CP_2_ON_5L 0xFB /* Enabled */ + +/* Code Protect 06000-07FFF 5L options */ +#define _CP_3_OFF_5L 0xFF /* Disabled */ +#define _CP_3_ON_5L 0xF7 /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00200-01FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 02000-03FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Table Write Protect 04000-05FFF 6L options */ +#define _WRT_2_OFF_6L 0xFF /* Disabled */ +#define _WRT_2_ON_6L 0xFB /* Enabled */ + +/* Table Write Protect 06000-07FFF 6L options */ +#define _WRT_3_OFF_6L 0xFF /* Disabled */ +#define _WRT_3_ON_6L 0xF7 /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00200-01FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 02000-03FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect 04000-05FFF 7L options */ +#define _EBTR_2_OFF_7L 0xFF /* Disabled */ +#define _EBTR_2_ON_7L 0xFB /* Enabled */ + +/* Table Read Protect 06000-07FFF 7L options */ +#define _EBTR_3_OFF_7L 0xFF /* Disabled */ +#define _EBTR_3_ON_7L 0xF7 /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f2580.h b/device/include/pic16/pic18f2580.h new file mode 100644 index 0000000..050354a --- /dev/null +++ b/device/include/pic16/pic18f2580.h @@ -0,0 +1,6 @@ +/* + * pic18f2580.h - Device Library Header + */ + +#include "pic18f4580.h" + diff --git a/device/include/pic16/pic18f2585.h b/device/include/pic16/pic18f2585.h new file mode 100644 index 0000000..12d5341 --- /dev/null +++ b/device/include/pic16/pic18f2585.h @@ -0,0 +1,6074 @@ +/* + * pic18f2585.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F2585_H__ +#define __PIC18F2585_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP oscillator +#define _OSC_XT_1H 0xF1 // XT oscillator +#define _OSC_HS_1H 0xF2 // HS oscillator +#define _OSC_RC_1H 0xF3 // External RC oscillator, CLKO function on RA6 +#define _OSC_EC_1H 0xF4 // EC oscillator, CLKO function on RA6 +#define _OSC_ECIO_1H 0xF5 // EC oscillator, port function on RA6 +#define _OSC_HSPLL_1H 0xF6 // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) +#define _OSC_RCIO_1H 0xF7 // External RC oscillator, port function on RA6 +#define _OSC_IRCIO67_1H 0xF8 // Internal oscillator block, port function on RA6 and RA7 +#define _OSC_IRCIO7_1H 0xF9 // Internal oscillator block, CLKO function on RA6, port function on RA7 +#define _FCMEN_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled +#define _FCMEN_ON_1H 0xFF // Fail-Safe Clock Monitor enabled +#define _IESO_OFF_1H 0x7F // Oscillator Switchover mode disabled +#define _IESO_ON_1H 0xFF // Oscillator Switchover mode enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // PWRT enabled +#define _PWRT_OFF_2L 0xFF // PWRT disabled +#define _BOREN_OFF_2L 0xF9 // Brown-out Reset disabled in hardware and software +#define _BOREN_SBORENCTRL_2L 0xFB // Brown-out Reset enabled and controlled by software (SBOREN is enabled) +#define _BOREN_BOACTIVE_2L 0xFD // Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) +#define _BOREN_BOHW_2L 0xFF // Brown-out Reset enabled in hardware only (SBOREN is disabled) +#define _BORV_0_2L 0xE7 // Maximum Setting +#define _BORV_1_2L 0xEF // +#define _BORV_2_2L 0xF7 // +#define _BORV_3_2L 0xFF // Minimum Setting + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // HW Disabled - SW Controlled +#define _WDT_ON_2H 0xFF // HW Enabled - SW Disabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // RE3 input pin enabled; MCLR disabled +#define _MCLRE_ON_3H 0xFF // MCLR pin enabled; RE3 input pin disabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 configured for higher power operation +#define _LPT1OSC_ON_3H 0xFF // Timer1 configured for low-power operation +#define _PBADEN_OFF_3H 0xFD // PORTB<4> and PORTB<1:0> Configured as Digital I/O Pins on Reset +#define _PBADEN_ON_3H 0xFF // PORTB<4> and PORTB<1:0> Configured as Analog Pins on Reset + +// CONFIG4L Options +#define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug +#define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins +#define _XINST_OFF_4L 0xBF // Instruction set extension and Indexed Addressing mode disabled (Legacy mode) +#define _XINST_ON_4L 0xFF // Instruction set extension and Indexed Addressing mode enabled +#define _BBSIZ_1024_4L 0xCF // 1K words (2K bytes) Boot Block +#define _BBSIZ_2048_4L 0xDF // 2K words (4K bytes) Boot Block +#define _BBSIZ_4096_4L 0xEF // 4K words (8K bytes) Boot Block +#define _LVP_OFF_4L 0xFB // Single-Supply ICSP disabled +#define _LVP_ON_4L 0xFF // Single-Supply ICSP enabled +#define _STVREN_OFF_4L 0xFE // Stack full/underflow will not cause Reset +#define _STVREN_ON_4L 0xFF // Stack full/underflow will cause Reset + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Block 0 (000800-003FFFh) code-protected +#define _CP0_OFF_5L 0xFF // Block 0 (000800-003FFFh) not code-protected +#define _CP1_ON_5L 0xFD // Block 1 (004000-007FFFh) code-protected +#define _CP1_OFF_5L 0xFF // Block 1 (004000-007FFFh) not code-protected +#define _CP2_ON_5L 0xFB // Block 2 (008000-00BFFFh) code-protected +#define _CP2_OFF_5L 0xFF // Block 2 (008000-00BFFFh) not code-protected + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Boot block (000000-0007FFh) code-protected +#define _CPB_OFF_5H 0xFF // Boot block (000000-0007FFh) not code-protected +#define _CPD_ON_5H 0x7F // Data EEPROM code-protected +#define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Block 0 (000800-003FFFh) write-protected +#define _WRT0_OFF_6L 0xFF // Block 0 (000800-003FFFh) not write-protected +#define _WRT1_ON_6L 0xFD // Block 1 (004000-007FFFh) write-protected +#define _WRT1_OFF_6L 0xFF // Block 1 (004000-007FFFh) not write-protected +#define _WRT2_ON_6L 0xFB // Block 2 (008000-00BFFFh) write-protected +#define _WRT2_OFF_6L 0xFF // Block 2 (008000-00BFFFh) not write-protected + +// CONFIG6H Options +#define _WRTB_ON_6H 0xBF // Boot block (000000-0007FFh) write-protected +#define _WRTB_OFF_6H 0xFF // Boot block (000000-0007FFh) not write-protected +#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected +#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected +#define _WRTD_ON_6H 0x7F // Data EEPROM write-protected +#define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Block 0 (000800-003FFFh) protected from table reads executed in other blocks +#define _EBTR0_OFF_7L 0xFF // Block 0 (000800-003FFFh) not protected from table reads executed in other blocks +#define _EBTR1_ON_7L 0xFD // Block 1 (004000-007FFFh) protected from table reads executed in other blocks +#define _EBTR1_OFF_7L 0xFF // Block 1 (004000-007FFFh) not protected from table reads executed in other blocks +#define _EBTR2_ON_7L 0xFB // Block 2 (008000-00BFFFh) protected from table reads executed in other blocks +#define _EBTR2_OFF_7L 0xFF // Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Boot block (000000-0007FFh) protected from table reads executed in other blocks +#define _EBTRB_OFF_7H 0xFF // Boot block (000000-0007FFh) not protected from table reads executed in other blocks +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xD60) RXF6SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF6SIDHbits_t; +extern volatile __RXF6SIDHbits_t __at (0xD60) RXF6SIDHbits; + +extern __sfr __at (0xD61) RXF6SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF6SIDLbits_t; +extern volatile __RXF6SIDLbits_t __at (0xD61) RXF6SIDLbits; + +extern __sfr __at (0xD62) RXF6EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF6EIDHbits_t; +extern volatile __RXF6EIDHbits_t __at (0xD62) RXF6EIDHbits; + +extern __sfr __at (0xD63) RXF6EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF6EIDLbits_t; +extern volatile __RXF6EIDLbits_t __at (0xD63) RXF6EIDLbits; + +extern __sfr __at (0xD64) RXF7SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF7SIDHbits_t; +extern volatile __RXF7SIDHbits_t __at (0xD64) RXF7SIDHbits; + +extern __sfr __at (0xD65) RXF7SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF7SIDLbits_t; +extern volatile __RXF7SIDLbits_t __at (0xD65) RXF7SIDLbits; + +extern __sfr __at (0xD66) RXF7EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF7EIDHbits_t; +extern volatile __RXF7EIDHbits_t __at (0xD66) RXF7EIDHbits; + +extern __sfr __at (0xD67) RXF7EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF7EIDLbits_t; +extern volatile __RXF7EIDLbits_t __at (0xD67) RXF7EIDLbits; + +extern __sfr __at (0xD68) RXF8SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF8SIDHbits_t; +extern volatile __RXF8SIDHbits_t __at (0xD68) RXF8SIDHbits; + +extern __sfr __at (0xD69) RXF8SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF8SIDLbits_t; +extern volatile __RXF8SIDLbits_t __at (0xD69) RXF8SIDLbits; + +extern __sfr __at (0xD6A) RXF8EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF8EIDHbits_t; +extern volatile __RXF8EIDHbits_t __at (0xD6A) RXF8EIDHbits; + +extern __sfr __at (0xD6B) RXF8EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF8EIDLbits_t; +extern volatile __RXF8EIDLbits_t __at (0xD6B) RXF8EIDLbits; + +extern __sfr __at (0xD70) RXF9SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF9SIDHbits_t; +extern volatile __RXF9SIDHbits_t __at (0xD70) RXF9SIDHbits; + +extern __sfr __at (0xD71) RXF9SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF9SIDLbits_t; +extern volatile __RXF9SIDLbits_t __at (0xD71) RXF9SIDLbits; + +extern __sfr __at (0xD72) RXF9EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF9EIDHbits_t; +extern volatile __RXF9EIDHbits_t __at (0xD72) RXF9EIDHbits; + +extern __sfr __at (0xD73) RXF9EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF9EIDLbits_t; +extern volatile __RXF9EIDLbits_t __at (0xD73) RXF9EIDLbits; + +extern __sfr __at (0xD74) RXF10SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF10SIDHbits_t; +extern volatile __RXF10SIDHbits_t __at (0xD74) RXF10SIDHbits; + +extern __sfr __at (0xD75) RXF10SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF10SIDLbits_t; +extern volatile __RXF10SIDLbits_t __at (0xD75) RXF10SIDLbits; + +extern __sfr __at (0xD76) RXF10EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF10EIDHbits_t; +extern volatile __RXF10EIDHbits_t __at (0xD76) RXF10EIDHbits; + +extern __sfr __at (0xD77) RXF10EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF10EIDLbits_t; +extern volatile __RXF10EIDLbits_t __at (0xD77) RXF10EIDLbits; + +extern __sfr __at (0xD78) RXF11SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF11SIDHbits_t; +extern volatile __RXF11SIDHbits_t __at (0xD78) RXF11SIDHbits; + +extern __sfr __at (0xD79) RXF11SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF11SIDLbits_t; +extern volatile __RXF11SIDLbits_t __at (0xD79) RXF11SIDLbits; + +extern __sfr __at (0xD7A) RXF11EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF11EIDHbits_t; +extern volatile __RXF11EIDHbits_t __at (0xD7A) RXF11EIDHbits; + +extern __sfr __at (0xD7B) RXF11EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF11EIDLbits_t; +extern volatile __RXF11EIDLbits_t __at (0xD7B) RXF11EIDLbits; + +extern __sfr __at (0xD80) RXF12SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF12SIDHbits_t; +extern volatile __RXF12SIDHbits_t __at (0xD80) RXF12SIDHbits; + +extern __sfr __at (0xD81) RXF12SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF12SIDLbits_t; +extern volatile __RXF12SIDLbits_t __at (0xD81) RXF12SIDLbits; + +extern __sfr __at (0xD82) RXF12EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF12EIDHbits_t; +extern volatile __RXF12EIDHbits_t __at (0xD82) RXF12EIDHbits; + +extern __sfr __at (0xD83) RXF12EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF12EIDLbits_t; +extern volatile __RXF12EIDLbits_t __at (0xD83) RXF12EIDLbits; + +extern __sfr __at (0xD84) RXF13SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF13SIDHbits_t; +extern volatile __RXF13SIDHbits_t __at (0xD84) RXF13SIDHbits; + +extern __sfr __at (0xD85) RXF13SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF13SIDLbits_t; +extern volatile __RXF13SIDLbits_t __at (0xD85) RXF13SIDLbits; + +extern __sfr __at (0xD86) RXF13EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF13EIDHbits_t; +extern volatile __RXF13EIDHbits_t __at (0xD86) RXF13EIDHbits; + +extern __sfr __at (0xD87) RXF13EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF13EIDLbits_t; +extern volatile __RXF13EIDLbits_t __at (0xD87) RXF13EIDLbits; + +extern __sfr __at (0xD88) RXF14SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF14SIDHbits_t; +extern volatile __RXF14SIDHbits_t __at (0xD88) RXF14SIDHbits; + +extern __sfr __at (0xD89) RXF14SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF14SIDLbits_t; +extern volatile __RXF14SIDLbits_t __at (0xD89) RXF14SIDLbits; + +extern __sfr __at (0xD8A) RXF14EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF14EIDHbits_t; +extern volatile __RXF14EIDHbits_t __at (0xD8A) RXF14EIDHbits; + +extern __sfr __at (0xD8B) RXF14EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF14EIDLbits_t; +extern volatile __RXF14EIDLbits_t __at (0xD8B) RXF14EIDLbits; + +extern __sfr __at (0xD90) RXF15SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF15SIDHbits_t; +extern volatile __RXF15SIDHbits_t __at (0xD90) RXF15SIDHbits; + +extern __sfr __at (0xD91) RXF15SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF15SIDLbits_t; +extern volatile __RXF15SIDLbits_t __at (0xD91) RXF15SIDLbits; + +extern __sfr __at (0xD92) RXF15EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF15EIDHbits_t; +extern volatile __RXF15EIDHbits_t __at (0xD92) RXF15EIDHbits; + +extern __sfr __at (0xD93) RXF15EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF15EIDLbits_t; +extern volatile __RXF15EIDLbits_t __at (0xD93) RXF15EIDLbits; + +extern __sfr __at (0xDD4) RXFCON0; +typedef union { + struct { + unsigned RXF0EN : 1; + unsigned RXF1EN : 1; + unsigned RXF2EN : 1; + unsigned RXF3EN : 1; + unsigned RXF4EN : 1; + unsigned RXF5EN : 1; + unsigned RXF6EN : 1; + unsigned RXF7EN : 1; + }; +} __RXFCON0bits_t; +extern volatile __RXFCON0bits_t __at (0xDD4) RXFCON0bits; + +extern __sfr __at (0xDD5) RXFCON1; +typedef union { + struct { + unsigned RXF8EN : 1; + unsigned RXF9EN : 1; + unsigned RXF10EN : 1; + unsigned RXF11EN : 1; + unsigned RXF12EN : 1; + unsigned RXF13EN : 1; + unsigned RXF14EN : 1; + unsigned RXF15EN : 1; + }; +} __RXFCON1bits_t; +extern volatile __RXFCON1bits_t __at (0xDD5) RXFCON1bits; + +extern __sfr __at (0xDD8) SDFLC; +typedef union { + struct { + unsigned DFLC0 : 1; + unsigned DFLC1 : 1; + unsigned DFLC2 : 1; + unsigned DFLC3 : 1; + unsigned DFLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FLC0 : 1; + unsigned FLC1 : 1; + unsigned FLC2 : 1; + unsigned FLC3 : 1; + unsigned FLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SDFLCbits_t; +extern volatile __SDFLCbits_t __at (0xDD8) SDFLCbits; + +extern __sfr __at (0xDE0) RXFBCON0; +typedef union { + struct { + unsigned F0BP_0 : 1; + unsigned F0BP_1 : 1; + unsigned F0BP_2 : 1; + unsigned F0BP_3 : 1; + unsigned F1BP_0 : 1; + unsigned F1BP_1 : 1; + unsigned F1BP_2 : 1; + unsigned F1BP_3 : 1; + }; +} __RXFBCON0bits_t; +extern volatile __RXFBCON0bits_t __at (0xDE0) RXFBCON0bits; + +extern __sfr __at (0xDE1) RXFBCON1; +typedef union { + struct { + unsigned F2BP_0 : 1; + unsigned F2BP_1 : 1; + unsigned F2BP_2 : 1; + unsigned F2BP_3 : 1; + unsigned F3BP_0 : 1; + unsigned F3BP_1 : 1; + unsigned F3BP_2 : 1; + unsigned F3BP_3 : 1; + }; +} __RXFBCON1bits_t; +extern volatile __RXFBCON1bits_t __at (0xDE1) RXFBCON1bits; + +extern __sfr __at (0xDE2) RXFBCON2; +typedef union { + struct { + unsigned F4BP_0 : 1; + unsigned F4BP_1 : 1; + unsigned F4BP_2 : 1; + unsigned F4BP_3 : 1; + unsigned F5BP_0 : 1; + unsigned F5BP_1 : 1; + unsigned F5BP_2 : 1; + unsigned F5BP_3 : 1; + }; +} __RXFBCON2bits_t; +extern volatile __RXFBCON2bits_t __at (0xDE2) RXFBCON2bits; + +extern __sfr __at (0xDE3) RXFBCON3; +typedef union { + struct { + unsigned F6BP_0 : 1; + unsigned F6BP_1 : 1; + unsigned F6BP_2 : 1; + unsigned F6BP_3 : 1; + unsigned F7BP_0 : 1; + unsigned F7BP_1 : 1; + unsigned F7BP_2 : 1; + unsigned F7BP_3 : 1; + }; +} __RXFBCON3bits_t; +extern volatile __RXFBCON3bits_t __at (0xDE3) RXFBCON3bits; + +extern __sfr __at (0xDE4) RXFBCON4; +typedef union { + struct { + unsigned F8BP_0 : 1; + unsigned F8BP_1 : 1; + unsigned F8BP_2 : 1; + unsigned F8BP_3 : 1; + unsigned F9BP_0 : 1; + unsigned F9BP_1 : 1; + unsigned F9BP_2 : 1; + unsigned F9BP_3 : 1; + }; +} __RXFBCON4bits_t; +extern volatile __RXFBCON4bits_t __at (0xDE4) RXFBCON4bits; + +extern __sfr __at (0xDE5) RXFBCON5; +typedef union { + struct { + unsigned F10BP_0 : 1; + unsigned F10BP_1 : 1; + unsigned F10BP_2 : 1; + unsigned F10BP_3 : 1; + unsigned F11BP_0 : 1; + unsigned F11BP_1 : 1; + unsigned F11BP_2 : 1; + unsigned F11BP_3 : 1; + }; +} __RXFBCON5bits_t; +extern volatile __RXFBCON5bits_t __at (0xDE5) RXFBCON5bits; + +extern __sfr __at (0xDE6) RXFBCON6; +typedef union { + struct { + unsigned F12BP_0 : 1; + unsigned F12BP_1 : 1; + unsigned F12BP_2 : 1; + unsigned F12BP_3 : 1; + unsigned F13BP_0 : 1; + unsigned F13BP_1 : 1; + unsigned F13BP_2 : 1; + unsigned F13BP_3 : 1; + }; +} __RXFBCON6bits_t; +extern volatile __RXFBCON6bits_t __at (0xDE6) RXFBCON6bits; + +extern __sfr __at (0xDE7) RXFBCON7; +typedef union { + struct { + unsigned F14BP_0 : 1; + unsigned F14BP_1 : 1; + unsigned F14BP_2 : 1; + unsigned F14BP_3 : 1; + unsigned F15BP_0 : 1; + unsigned F15BP_1 : 1; + unsigned F15BP_2 : 1; + unsigned F15BP_3 : 1; + }; +} __RXFBCON7bits_t; +extern volatile __RXFBCON7bits_t __at (0xDE7) RXFBCON7bits; + +extern __sfr __at (0xDF0) MSEL0; +typedef union { + struct { + unsigned FIL0_0 : 1; + unsigned FIL0_1 : 1; + unsigned FIL1_0 : 1; + unsigned FIL1_1 : 1; + unsigned FIL2_0 : 1; + unsigned FIL2_1 : 1; + unsigned FIL3_0 : 1; + unsigned FIL3_1 : 1; + }; +} __MSEL0bits_t; +extern volatile __MSEL0bits_t __at (0xDF0) MSEL0bits; + +extern __sfr __at (0xDF1) MSEL1; +typedef union { + struct { + unsigned FIL4_0 : 1; + unsigned FIL4_1 : 1; + unsigned FIL5_0 : 1; + unsigned FIL5_1 : 1; + unsigned FIL6_0 : 1; + unsigned FIL6_1 : 1; + unsigned FIL7_0 : 1; + unsigned FIL7_1 : 1; + }; +} __MSEL1bits_t; +extern volatile __MSEL1bits_t __at (0xDF1) MSEL1bits; + +extern __sfr __at (0xDF2) MSEL2; +typedef union { + struct { + unsigned FIL8_0 : 1; + unsigned FIL8_1 : 1; + unsigned FIL9_0 : 1; + unsigned FIL9_1 : 1; + unsigned FIL10_0 : 1; + unsigned FIL10_1 : 1; + unsigned FIL11_0 : 1; + unsigned FIL11_1 : 1; + }; +} __MSEL2bits_t; +extern volatile __MSEL2bits_t __at (0xDF2) MSEL2bits; + +extern __sfr __at (0xDF3) MSEL3; +typedef union { + struct { + unsigned FIL12_0 : 1; + unsigned FIL12_1 : 1; + unsigned FIL13_0 : 1; + unsigned FIL13_1 : 1; + unsigned FIL14_0 : 1; + unsigned FIL14_1 : 1; + unsigned FIL15_0 : 1; + unsigned FIL15_1 : 1; + }; +} __MSEL3bits_t; +extern volatile __MSEL3bits_t __at (0xDF3) MSEL3bits; + +extern __sfr __at (0xDF8) BSEL0; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned B0TXEN : 1; + unsigned B1TXEN : 1; + unsigned B2TXEN : 1; + unsigned B3TXEN : 1; + unsigned B4TXEN : 1; + unsigned B5TXEN : 1; + }; +} __BSEL0bits_t; +extern volatile __BSEL0bits_t __at (0xDF8) BSEL0bits; + +extern __sfr __at (0xDFA) BIE0; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned B0IE : 1; + unsigned B1IE : 1; + unsigned B2IE : 1; + unsigned B3IE : 1; + unsigned B4IE : 1; + unsigned B5IE : 1; + }; +} __BIE0bits_t; +extern volatile __BIE0bits_t __at (0xDFA) BIE0bits; + +extern __sfr __at (0xDFC) TXBIE; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TXBIEbits_t; +extern volatile __TXBIEbits_t __at (0xDFC) TXBIEbits; + +extern __sfr __at (0xE20) B0CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B0CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0CONbits_t; +extern volatile __B0CONbits_t __at (0xE20) B0CONbits; + +extern __sfr __at (0xE21) B0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B0SIDHbits_t; +extern volatile __B0SIDHbits_t __at (0xE21) B0SIDHbits; + +extern __sfr __at (0xE22) B0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0SIDLbits_t; +extern volatile __B0SIDLbits_t __at (0xE22) B0SIDLbits; + +extern __sfr __at (0xE23) B0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B0EIDHbits_t; +extern volatile __B0EIDHbits_t __at (0xE23) B0EIDHbits; + +extern __sfr __at (0xE24) B0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B0EIDLbits_t; +extern volatile __B0EIDLbits_t __at (0xE24) B0EIDLbits; + +extern __sfr __at (0xE25) B0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B0DLC : 1; + unsigned RB1_B0DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B0DLCbits_t; +extern volatile __B0DLCbits_t __at (0xE25) B0DLCbits; + +extern __sfr __at (0xE26) B0D0; +typedef union { + struct { + unsigned B0D00 : 1; + unsigned B0D01 : 1; + unsigned B0D02 : 1; + unsigned B0D03 : 1; + unsigned B0D04 : 1; + unsigned B0D05 : 1; + unsigned B0D06 : 1; + unsigned B0D07 : 1; + }; +} __B0D0bits_t; +extern volatile __B0D0bits_t __at (0xE26) B0D0bits; + +extern __sfr __at (0xE27) B0D1; +typedef union { + struct { + unsigned B0D10 : 1; + unsigned B0D11 : 1; + unsigned B0D12 : 1; + unsigned B0D13 : 1; + unsigned B0D14 : 1; + unsigned B0D15 : 1; + unsigned B0D16 : 1; + unsigned B0D17 : 1; + }; +} __B0D1bits_t; +extern volatile __B0D1bits_t __at (0xE27) B0D1bits; + +extern __sfr __at (0xE28) B0D2; +typedef union { + struct { + unsigned B0D20 : 1; + unsigned B0D21 : 1; + unsigned B0D22 : 1; + unsigned B0D23 : 1; + unsigned B0D24 : 1; + unsigned B0D25 : 1; + unsigned B0D26 : 1; + unsigned B0D27 : 1; + }; +} __B0D2bits_t; +extern volatile __B0D2bits_t __at (0xE28) B0D2bits; + +extern __sfr __at (0xE29) B0D3; +typedef union { + struct { + unsigned B0D30 : 1; + unsigned B0D31 : 1; + unsigned B0D32 : 1; + unsigned B0D33 : 1; + unsigned B0D34 : 1; + unsigned B0D35 : 1; + unsigned B0D36 : 1; + unsigned B0D37 : 1; + }; +} __B0D3bits_t; +extern volatile __B0D3bits_t __at (0xE29) B0D3bits; + +extern __sfr __at (0xE2A) B0D4; +typedef union { + struct { + unsigned B0D40 : 1; + unsigned B0D41 : 1; + unsigned B0D42 : 1; + unsigned B0D43 : 1; + unsigned B0D44 : 1; + unsigned B0D45 : 1; + unsigned B0D46 : 1; + unsigned B0D47 : 1; + }; +} __B0D4bits_t; +extern volatile __B0D4bits_t __at (0xE2A) B0D4bits; + +extern __sfr __at (0xE2B) B0D5; +typedef union { + struct { + unsigned B0D50 : 1; + unsigned B0D51 : 1; + unsigned B0D52 : 1; + unsigned B0D53 : 1; + unsigned B0D54 : 1; + unsigned B0D55 : 1; + unsigned B0D56 : 1; + unsigned B0D57 : 1; + }; +} __B0D5bits_t; +extern volatile __B0D5bits_t __at (0xE2B) B0D5bits; + +extern __sfr __at (0xE2C) B0D6; +typedef union { + struct { + unsigned B0D60 : 1; + unsigned B0D61 : 1; + unsigned B0D62 : 1; + unsigned B0D63 : 1; + unsigned B0D64 : 1; + unsigned B0D65 : 1; + unsigned B0D66 : 1; + unsigned B0D67 : 1; + }; +} __B0D6bits_t; +extern volatile __B0D6bits_t __at (0xE2C) B0D6bits; + +extern __sfr __at (0xE2D) B0D7; +typedef union { + struct { + unsigned B0D70 : 1; + unsigned B0D71 : 1; + unsigned B0D72 : 1; + unsigned B0D73 : 1; + unsigned B0D74 : 1; + unsigned B0D75 : 1; + unsigned B0D76 : 1; + unsigned B0D77 : 1; + }; +} __B0D7bits_t; +extern volatile __B0D7bits_t __at (0xE2D) B0D7bits; + +extern __sfr __at (0xE2E) CANSTAT_RO9; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO9bits_t; +extern volatile __CANSTAT_RO9bits_t __at (0xE2E) CANSTAT_RO9bits; + +extern __sfr __at (0xE2F) CANCON_RO9; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO9bits_t; +extern volatile __CANCON_RO9bits_t __at (0xE2F) CANCON_RO9bits; + +extern __sfr __at (0xE30) B1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B1CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1CONbits_t; +extern volatile __B1CONbits_t __at (0xE30) B1CONbits; + +extern __sfr __at (0xE31) B1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B1SIDHbits_t; +extern volatile __B1SIDHbits_t __at (0xE31) B1SIDHbits; + +extern __sfr __at (0xE32) B1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1SIDLbits_t; +extern volatile __B1SIDLbits_t __at (0xE32) B1SIDLbits; + +extern __sfr __at (0xE33) B1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B1EIDHbits_t; +extern volatile __B1EIDHbits_t __at (0xE33) B1EIDHbits; + +extern __sfr __at (0xE34) B1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B1EIDLbits_t; +extern volatile __B1EIDLbits_t __at (0xE34) B1EIDLbits; + +extern __sfr __at (0xE35) B1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B1DLC : 1; + unsigned RB1_B1DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B1DLCbits_t; +extern volatile __B1DLCbits_t __at (0xE35) B1DLCbits; + +extern __sfr __at (0xE36) B1D0; +typedef union { + struct { + unsigned B1D00 : 1; + unsigned B1D01 : 1; + unsigned B1D02 : 1; + unsigned B1D03 : 1; + unsigned B1D04 : 1; + unsigned B1D05 : 1; + unsigned B1D06 : 1; + unsigned B1D07 : 1; + }; +} __B1D0bits_t; +extern volatile __B1D0bits_t __at (0xE36) B1D0bits; + +extern __sfr __at (0xE37) B1D1; +typedef union { + struct { + unsigned B1D10 : 1; + unsigned B1D11 : 1; + unsigned B1D12 : 1; + unsigned B1D13 : 1; + unsigned B1D14 : 1; + unsigned B1D15 : 1; + unsigned B1D16 : 1; + unsigned B1D17 : 1; + }; +} __B1D1bits_t; +extern volatile __B1D1bits_t __at (0xE37) B1D1bits; + +extern __sfr __at (0xE38) B1D2; +typedef union { + struct { + unsigned B1D20 : 1; + unsigned B1D21 : 1; + unsigned B1D22 : 1; + unsigned B1D23 : 1; + unsigned B1D24 : 1; + unsigned B1D25 : 1; + unsigned B1D26 : 1; + unsigned B1D27 : 1; + }; +} __B1D2bits_t; +extern volatile __B1D2bits_t __at (0xE38) B1D2bits; + +extern __sfr __at (0xE39) B1D3; +typedef union { + struct { + unsigned B1D30 : 1; + unsigned B1D31 : 1; + unsigned B1D32 : 1; + unsigned B1D33 : 1; + unsigned B1D34 : 1; + unsigned B1D35 : 1; + unsigned B1D36 : 1; + unsigned B1D37 : 1; + }; +} __B1D3bits_t; +extern volatile __B1D3bits_t __at (0xE39) B1D3bits; + +extern __sfr __at (0xE3A) B1D4; +typedef union { + struct { + unsigned B1D40 : 1; + unsigned B1D41 : 1; + unsigned B1D42 : 1; + unsigned B1D43 : 1; + unsigned B1D44 : 1; + unsigned B1D45 : 1; + unsigned B1D46 : 1; + unsigned B1D47 : 1; + }; +} __B1D4bits_t; +extern volatile __B1D4bits_t __at (0xE3A) B1D4bits; + +extern __sfr __at (0xE3B) B1D5; +typedef union { + struct { + unsigned B1D50 : 1; + unsigned B1D51 : 1; + unsigned B1D52 : 1; + unsigned B1D53 : 1; + unsigned B1D54 : 1; + unsigned B1D55 : 1; + unsigned B1D56 : 1; + unsigned B1D57 : 1; + }; +} __B1D5bits_t; +extern volatile __B1D5bits_t __at (0xE3B) B1D5bits; + +extern __sfr __at (0xE3C) B1D6; +typedef union { + struct { + unsigned B1D60 : 1; + unsigned B1D61 : 1; + unsigned B1D62 : 1; + unsigned B1D63 : 1; + unsigned B1D64 : 1; + unsigned B1D65 : 1; + unsigned B1D66 : 1; + unsigned B1D67 : 1; + }; +} __B1D6bits_t; +extern volatile __B1D6bits_t __at (0xE3C) B1D6bits; + +extern __sfr __at (0xE3D) B1D7; +typedef union { + struct { + unsigned B1D70 : 1; + unsigned B1D71 : 1; + unsigned B1D72 : 1; + unsigned B1D73 : 1; + unsigned B1D74 : 1; + unsigned B1D75 : 1; + unsigned B1D76 : 1; + unsigned B1D77 : 1; + }; +} __B1D7bits_t; +extern volatile __B1D7bits_t __at (0xE3D) B1D7bits; + +extern __sfr __at (0xE3E) CANSTAT_RO8; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO8bits_t; +extern volatile __CANSTAT_RO8bits_t __at (0xE3E) CANSTAT_RO8bits; + +extern __sfr __at (0xE3F) CANCON_RO8; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO8bits_t; +extern volatile __CANCON_RO8bits_t __at (0xE3F) CANCON_RO8bits; + +extern __sfr __at (0xE40) B2CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B2CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2CONbits_t; +extern volatile __B2CONbits_t __at (0xE40) B2CONbits; + +extern __sfr __at (0xE41) B2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B2SIDHbits_t; +extern volatile __B2SIDHbits_t __at (0xE41) B2SIDHbits; + +extern __sfr __at (0xE42) B2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2SIDLbits_t; +extern volatile __B2SIDLbits_t __at (0xE42) B2SIDLbits; + +extern __sfr __at (0xE43) B2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B2EIDHbits_t; +extern volatile __B2EIDHbits_t __at (0xE43) B2EIDHbits; + +extern __sfr __at (0xE44) B2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B2EIDLbits_t; +extern volatile __B2EIDLbits_t __at (0xE44) B2EIDLbits; + +extern __sfr __at (0xE45) B2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B2DLC : 1; + unsigned RB1_B2DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B2DLCbits_t; +extern volatile __B2DLCbits_t __at (0xE45) B2DLCbits; + +extern __sfr __at (0xE46) B2D0; +typedef union { + struct { + unsigned B2D00 : 1; + unsigned B2D01 : 1; + unsigned B2D02 : 1; + unsigned B2D03 : 1; + unsigned B2D04 : 1; + unsigned B2D05 : 1; + unsigned B2D06 : 1; + unsigned B2D07 : 1; + }; +} __B2D0bits_t; +extern volatile __B2D0bits_t __at (0xE46) B2D0bits; + +extern __sfr __at (0xE47) B2D1; +typedef union { + struct { + unsigned B2D10 : 1; + unsigned B2D11 : 1; + unsigned B2D12 : 1; + unsigned B2D13 : 1; + unsigned B2D14 : 1; + unsigned B2D15 : 1; + unsigned B2D16 : 1; + unsigned B2D17 : 1; + }; +} __B2D1bits_t; +extern volatile __B2D1bits_t __at (0xE47) B2D1bits; + +extern __sfr __at (0xE48) B2D2; +typedef union { + struct { + unsigned B2D20 : 1; + unsigned B2D21 : 1; + unsigned B2D22 : 1; + unsigned B2D23 : 1; + unsigned B2D24 : 1; + unsigned B2D25 : 1; + unsigned B2D26 : 1; + unsigned B2D27 : 1; + }; +} __B2D2bits_t; +extern volatile __B2D2bits_t __at (0xE48) B2D2bits; + +extern __sfr __at (0xE49) B2D3; +typedef union { + struct { + unsigned B2D30 : 1; + unsigned B2D31 : 1; + unsigned B2D32 : 1; + unsigned B2D33 : 1; + unsigned B2D34 : 1; + unsigned B2D35 : 1; + unsigned B2D36 : 1; + unsigned B2D37 : 1; + }; +} __B2D3bits_t; +extern volatile __B2D3bits_t __at (0xE49) B2D3bits; + +extern __sfr __at (0xE4A) B2D4; +typedef union { + struct { + unsigned B2D40 : 1; + unsigned B2D41 : 1; + unsigned B2D42 : 1; + unsigned B2D43 : 1; + unsigned B2D44 : 1; + unsigned B2D45 : 1; + unsigned B2D46 : 1; + unsigned B2D47 : 1; + }; +} __B2D4bits_t; +extern volatile __B2D4bits_t __at (0xE4A) B2D4bits; + +extern __sfr __at (0xE4B) B2D5; +typedef union { + struct { + unsigned B2D50 : 1; + unsigned B2D51 : 1; + unsigned B2D52 : 1; + unsigned B2D53 : 1; + unsigned B2D54 : 1; + unsigned B2D55 : 1; + unsigned B2D56 : 1; + unsigned B2D57 : 1; + }; +} __B2D5bits_t; +extern volatile __B2D5bits_t __at (0xE4B) B2D5bits; + +extern __sfr __at (0xE4C) B2D6; +typedef union { + struct { + unsigned B2D60 : 1; + unsigned B2D61 : 1; + unsigned B2D62 : 1; + unsigned B2D63 : 1; + unsigned B2D64 : 1; + unsigned B2D65 : 1; + unsigned B2D66 : 1; + unsigned B2D67 : 1; + }; +} __B2D6bits_t; +extern volatile __B2D6bits_t __at (0xE4C) B2D6bits; + +extern __sfr __at (0xE4D) B2D7; +typedef union { + struct { + unsigned B2D70 : 1; + unsigned B2D71 : 1; + unsigned B2D72 : 1; + unsigned B2D73 : 1; + unsigned B2D74 : 1; + unsigned B2D75 : 1; + unsigned B2D76 : 1; + unsigned B2D77 : 1; + }; +} __B2D7bits_t; +extern volatile __B2D7bits_t __at (0xE4D) B2D7bits; + +extern __sfr __at (0xE4E) CANSTAT_RO7; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO7bits_t; +extern volatile __CANSTAT_RO7bits_t __at (0xE4E) CANSTAT_RO7bits; + +extern __sfr __at (0xE4F) CANCON_RO7; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO7bits_t; +extern volatile __CANCON_RO7bits_t __at (0xE4F) CANCON_RO7bits; + +extern __sfr __at (0xE50) B3CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B3CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3CONbits_t; +extern volatile __B3CONbits_t __at (0xE50) B3CONbits; + +extern __sfr __at (0xE51) B3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B3SIDHbits_t; +extern volatile __B3SIDHbits_t __at (0xE51) B3SIDHbits; + +extern __sfr __at (0xE52) B3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3SIDLbits_t; +extern volatile __B3SIDLbits_t __at (0xE52) B3SIDLbits; + +extern __sfr __at (0xE53) B3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B3EIDHbits_t; +extern volatile __B3EIDHbits_t __at (0xE53) B3EIDHbits; + +extern __sfr __at (0xE54) B3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B3EIDLbits_t; +extern volatile __B3EIDLbits_t __at (0xE54) B3EIDLbits; + +extern __sfr __at (0xE55) B3DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B3DLC : 1; + unsigned RB1_B3DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B3DLCbits_t; +extern volatile __B3DLCbits_t __at (0xE55) B3DLCbits; + +extern __sfr __at (0xE56) B3D0; +typedef union { + struct { + unsigned B3D00 : 1; + unsigned B3D01 : 1; + unsigned B3D02 : 1; + unsigned B3D03 : 1; + unsigned B3D04 : 1; + unsigned B3D05 : 1; + unsigned B3D06 : 1; + unsigned B3D07 : 1; + }; +} __B3D0bits_t; +extern volatile __B3D0bits_t __at (0xE56) B3D0bits; + +extern __sfr __at (0xE57) B3D1; +typedef union { + struct { + unsigned B3D10 : 1; + unsigned B3D11 : 1; + unsigned B3D12 : 1; + unsigned B3D13 : 1; + unsigned B3D14 : 1; + unsigned B3D15 : 1; + unsigned B3D16 : 1; + unsigned B3D17 : 1; + }; +} __B3D1bits_t; +extern volatile __B3D1bits_t __at (0xE57) B3D1bits; + +extern __sfr __at (0xE58) B3D2; +typedef union { + struct { + unsigned B3D20 : 1; + unsigned B3D21 : 1; + unsigned B3D22 : 1; + unsigned B3D23 : 1; + unsigned B3D24 : 1; + unsigned B3D25 : 1; + unsigned B3D26 : 1; + unsigned B3D27 : 1; + }; +} __B3D2bits_t; +extern volatile __B3D2bits_t __at (0xE58) B3D2bits; + +extern __sfr __at (0xE59) B3D3; +typedef union { + struct { + unsigned B3D30 : 1; + unsigned B3D31 : 1; + unsigned B3D32 : 1; + unsigned B3D33 : 1; + unsigned B3D34 : 1; + unsigned B3D35 : 1; + unsigned B3D36 : 1; + unsigned B3D37 : 1; + }; +} __B3D3bits_t; +extern volatile __B3D3bits_t __at (0xE59) B3D3bits; + +extern __sfr __at (0xE5A) B3D4; +typedef union { + struct { + unsigned B3D40 : 1; + unsigned B3D41 : 1; + unsigned B3D42 : 1; + unsigned B3D43 : 1; + unsigned B3D44 : 1; + unsigned B3D45 : 1; + unsigned B3D46 : 1; + unsigned B3D47 : 1; + }; +} __B3D4bits_t; +extern volatile __B3D4bits_t __at (0xE5A) B3D4bits; + +extern __sfr __at (0xE5B) B3D5; +typedef union { + struct { + unsigned B3D50 : 1; + unsigned B3D51 : 1; + unsigned B3D52 : 1; + unsigned B3D53 : 1; + unsigned B3D54 : 1; + unsigned B3D55 : 1; + unsigned B3D56 : 1; + unsigned B3D57 : 1; + }; +} __B3D5bits_t; +extern volatile __B3D5bits_t __at (0xE5B) B3D5bits; + +extern __sfr __at (0xE5C) B3D6; +typedef union { + struct { + unsigned B3D60 : 1; + unsigned B3D61 : 1; + unsigned B3D62 : 1; + unsigned B3D63 : 1; + unsigned B3D64 : 1; + unsigned B3D65 : 1; + unsigned B3D66 : 1; + unsigned B3D67 : 1; + }; +} __B3D6bits_t; +extern volatile __B3D6bits_t __at (0xE5C) B3D6bits; + +extern __sfr __at (0xE5D) B3D7; +typedef union { + struct { + unsigned B3D70 : 1; + unsigned B3D71 : 1; + unsigned B3D72 : 1; + unsigned B3D73 : 1; + unsigned B3D74 : 1; + unsigned B3D75 : 1; + unsigned B3D76 : 1; + unsigned B3D77 : 1; + }; +} __B3D7bits_t; +extern volatile __B3D7bits_t __at (0xE5D) B3D7bits; + +extern __sfr __at (0xE5E) CANSTAT_RO6; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO6bits_t; +extern volatile __CANSTAT_RO6bits_t __at (0xE5E) CANSTAT_RO6bits; + +extern __sfr __at (0xE5F) CANCON_RO6; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO6bits_t; +extern volatile __CANCON_RO6bits_t __at (0xE5F) CANCON_RO6bits; + +extern __sfr __at (0xE60) B4CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B4CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4CONbits_t; +extern volatile __B4CONbits_t __at (0xE60) B4CONbits; + +extern __sfr __at (0xE61) B4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B4SIDHbits_t; +extern volatile __B4SIDHbits_t __at (0xE61) B4SIDHbits; + +extern __sfr __at (0xE62) B4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4SIDLbits_t; +extern volatile __B4SIDLbits_t __at (0xE62) B4SIDLbits; + +extern __sfr __at (0xE63) B4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B4EIDHbits_t; +extern volatile __B4EIDHbits_t __at (0xE63) B4EIDHbits; + +extern __sfr __at (0xE64) B4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B4EIDLbits_t; +extern volatile __B4EIDLbits_t __at (0xE64) B4EIDLbits; + +extern __sfr __at (0xE65) B4DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B4DLC : 1; + unsigned RB1_B4DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B4DLCbits_t; +extern volatile __B4DLCbits_t __at (0xE65) B4DLCbits; + +extern __sfr __at (0xE66) B4D0; +typedef union { + struct { + unsigned B4D00 : 1; + unsigned B4D01 : 1; + unsigned B4D02 : 1; + unsigned B4D03 : 1; + unsigned B4D04 : 1; + unsigned B4D05 : 1; + unsigned B4D06 : 1; + unsigned B4D07 : 1; + }; +} __B4D0bits_t; +extern volatile __B4D0bits_t __at (0xE66) B4D0bits; + +extern __sfr __at (0xE67) B4D1; +typedef union { + struct { + unsigned B4D10 : 1; + unsigned B4D11 : 1; + unsigned B4D12 : 1; + unsigned B4D13 : 1; + unsigned B4D14 : 1; + unsigned B4D15 : 1; + unsigned B4D16 : 1; + unsigned B4D17 : 1; + }; +} __B4D1bits_t; +extern volatile __B4D1bits_t __at (0xE67) B4D1bits; + +extern __sfr __at (0xE68) B4D2; +typedef union { + struct { + unsigned B4D20 : 1; + unsigned B4D21 : 1; + unsigned B4D22 : 1; + unsigned B4D23 : 1; + unsigned B4D24 : 1; + unsigned B4D25 : 1; + unsigned B4D26 : 1; + unsigned B4D27 : 1; + }; +} __B4D2bits_t; +extern volatile __B4D2bits_t __at (0xE68) B4D2bits; + +extern __sfr __at (0xE69) B4D3; +typedef union { + struct { + unsigned B4D30 : 1; + unsigned B4D31 : 1; + unsigned B4D32 : 1; + unsigned B4D33 : 1; + unsigned B4D34 : 1; + unsigned B4D35 : 1; + unsigned B4D36 : 1; + unsigned B4D37 : 1; + }; +} __B4D3bits_t; +extern volatile __B4D3bits_t __at (0xE69) B4D3bits; + +extern __sfr __at (0xE6A) B4D4; +typedef union { + struct { + unsigned B4D40 : 1; + unsigned B4D41 : 1; + unsigned B4D42 : 1; + unsigned B4D43 : 1; + unsigned B4D44 : 1; + unsigned B4D45 : 1; + unsigned B4D46 : 1; + unsigned B4D47 : 1; + }; +} __B4D4bits_t; +extern volatile __B4D4bits_t __at (0xE6A) B4D4bits; + +extern __sfr __at (0xE6B) B4D5; +typedef union { + struct { + unsigned B4D50 : 1; + unsigned B4D51 : 1; + unsigned B4D52 : 1; + unsigned B4D53 : 1; + unsigned B4D54 : 1; + unsigned B4D55 : 1; + unsigned B4D56 : 1; + unsigned B4D57 : 1; + }; +} __B4D5bits_t; +extern volatile __B4D5bits_t __at (0xE6B) B4D5bits; + +extern __sfr __at (0xE6C) B4D6; +typedef union { + struct { + unsigned B4D60 : 1; + unsigned B4D61 : 1; + unsigned B4D62 : 1; + unsigned B4D63 : 1; + unsigned B4D64 : 1; + unsigned B4D65 : 1; + unsigned B4D66 : 1; + unsigned B4D67 : 1; + }; +} __B4D6bits_t; +extern volatile __B4D6bits_t __at (0xE6C) B4D6bits; + +extern __sfr __at (0xE6D) B4D7; +typedef union { + struct { + unsigned B4D70 : 1; + unsigned B4D71 : 1; + unsigned B4D72 : 1; + unsigned B4D73 : 1; + unsigned B4D74 : 1; + unsigned B4D75 : 1; + unsigned B4D76 : 1; + unsigned B46D77 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B4D77 : 1; + }; +} __B4D7bits_t; +extern volatile __B4D7bits_t __at (0xE6D) B4D7bits; + +extern __sfr __at (0xE6E) CANSTAT_RO5; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO5bits_t; +extern volatile __CANSTAT_RO5bits_t __at (0xE6E) CANSTAT_RO5bits; + +extern __sfr __at (0xE6F) CANCON_RO5; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO5bits_t; +extern volatile __CANCON_RO5bits_t __at (0xE6F) CANCON_RO5bits; + +extern __sfr __at (0xE70) B5CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B5CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5CONbits_t; +extern volatile __B5CONbits_t __at (0xE70) B5CONbits; + +extern __sfr __at (0xE71) B5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B5SIDHbits_t; +extern volatile __B5SIDHbits_t __at (0xE71) B5SIDHbits; + +extern __sfr __at (0xE72) B5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5SIDLbits_t; +extern volatile __B5SIDLbits_t __at (0xE72) B5SIDLbits; + +extern __sfr __at (0xE73) B5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B5EIDHbits_t; +extern volatile __B5EIDHbits_t __at (0xE73) B5EIDHbits; + +extern __sfr __at (0xE74) B5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B5EIDLbits_t; +extern volatile __B5EIDLbits_t __at (0xE74) B5EIDLbits; + +extern __sfr __at (0xE75) B5DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B5DLC : 1; + unsigned RB1_B5DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5DLCbits_t; +extern volatile __B5DLCbits_t __at (0xE75) B5DLCbits; + +extern __sfr __at (0xE76) B5D0; +typedef union { + struct { + unsigned B5D00 : 1; + unsigned B5D01 : 1; + unsigned B5D02 : 1; + unsigned B5D03 : 1; + unsigned B5D04 : 1; + unsigned B5D05 : 1; + unsigned B5D06 : 1; + unsigned B57D07 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D07 : 1; + }; +} __B5D0bits_t; +extern volatile __B5D0bits_t __at (0xE76) B5D0bits; + +extern __sfr __at (0xE77) B5D1; +typedef union { + struct { + unsigned B5D10 : 1; + unsigned B5D11 : 1; + unsigned B5D12 : 1; + unsigned B5D13 : 1; + unsigned B5D14 : 1; + unsigned B5D15 : 1; + unsigned B5D16 : 1; + unsigned B5D17 : 1; + }; +} __B5D1bits_t; +extern volatile __B5D1bits_t __at (0xE77) B5D1bits; + +extern __sfr __at (0xE78) B5D2; +typedef union { + struct { + unsigned B5D20 : 1; + unsigned B5D21 : 1; + unsigned B5D22 : 1; + unsigned B57D23 : 1; + unsigned B5D24 : 1; + unsigned B5D25 : 1; + unsigned B5D26 : 1; + unsigned B5D27 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D23 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5D2bits_t; +extern volatile __B5D2bits_t __at (0xE78) B5D2bits; + +extern __sfr __at (0xE79) B5D3; +typedef union { + struct { + unsigned B5D30 : 1; + unsigned B5D31 : 1; + unsigned B5D32 : 1; + unsigned B5D33 : 1; + unsigned B5D34 : 1; + unsigned B5D35 : 1; + unsigned B5D36 : 1; + unsigned B5D37 : 1; + }; +} __B5D3bits_t; +extern volatile __B5D3bits_t __at (0xE79) B5D3bits; + +extern __sfr __at (0xE7A) B5D4; +typedef union { + struct { + unsigned B5D40 : 1; + unsigned B5D41 : 1; + unsigned B5D42 : 1; + unsigned B5D43 : 1; + unsigned B5D44 : 1; + unsigned B5D45 : 1; + unsigned B5D46 : 1; + unsigned B5D47 : 1; + }; +} __B5D4bits_t; +extern volatile __B5D4bits_t __at (0xE7A) B5D4bits; + +extern __sfr __at (0xE7B) B5D5; +typedef union { + struct { + unsigned B5D50 : 1; + unsigned B5D51 : 1; + unsigned B5D52 : 1; + unsigned B5D53 : 1; + unsigned B5D54 : 1; + unsigned B5D55 : 1; + unsigned B5D56 : 1; + unsigned B5D57 : 1; + }; +} __B5D5bits_t; +extern volatile __B5D5bits_t __at (0xE7B) B5D5bits; + +extern __sfr __at (0xE7C) B5D6; +typedef union { + struct { + unsigned B5D60 : 1; + unsigned B5D61 : 1; + unsigned B5D62 : 1; + unsigned B5D63 : 1; + unsigned B5D64 : 1; + unsigned B5D65 : 1; + unsigned B5D66 : 1; + unsigned B5D67 : 1; + }; +} __B5D6bits_t; +extern volatile __B5D6bits_t __at (0xE7C) B5D6bits; + +extern __sfr __at (0xE7D) B5D7; +typedef union { + struct { + unsigned B5D70 : 1; + unsigned B5D71 : 1; + unsigned B5D72 : 1; + unsigned B5D73 : 1; + unsigned B5D74 : 1; + unsigned B5D75 : 1; + unsigned B5D76 : 1; + unsigned B5D77 : 1; + }; +} __B5D7bits_t; +extern volatile __B5D7bits_t __at (0xE7D) B5D7bits; + +extern __sfr __at (0xE7E) CANSTAT_RO4; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO4bits_t; +extern volatile __CANSTAT_RO4bits_t __at (0xE7E) CANSTAT_RO4bits; + +extern __sfr __at (0xE7F) CANCON_RO4; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO4bits_t; +extern volatile __CANCON_RO4bits_t __at (0xE7F) CANCON_RO4bits; + +extern __sfr __at (0xF00) RXF0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF0SIDHbits_t; +extern volatile __RXF0SIDHbits_t __at (0xF00) RXF0SIDHbits; + +extern __sfr __at (0xF01) RXF0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF0SIDLbits_t; +extern volatile __RXF0SIDLbits_t __at (0xF01) RXF0SIDLbits; + +extern __sfr __at (0xF02) RXF0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF0EIDHbits_t; +extern volatile __RXF0EIDHbits_t __at (0xF02) RXF0EIDHbits; + +extern __sfr __at (0xF03) RXF0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF0EIDLbits_t; +extern volatile __RXF0EIDLbits_t __at (0xF03) RXF0EIDLbits; + +extern __sfr __at (0xF04) RXF1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF1SIDHbits_t; +extern volatile __RXF1SIDHbits_t __at (0xF04) RXF1SIDHbits; + +extern __sfr __at (0xF05) RXF1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF1SIDLbits_t; +extern volatile __RXF1SIDLbits_t __at (0xF05) RXF1SIDLbits; + +extern __sfr __at (0xF06) RXF1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF1EIDHbits_t; +extern volatile __RXF1EIDHbits_t __at (0xF06) RXF1EIDHbits; + +extern __sfr __at (0xF07) RXF1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF1EIDLbits_t; +extern volatile __RXF1EIDLbits_t __at (0xF07) RXF1EIDLbits; + +extern __sfr __at (0xF08) RXF2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF2SIDHbits_t; +extern volatile __RXF2SIDHbits_t __at (0xF08) RXF2SIDHbits; + +extern __sfr __at (0xF09) RXF2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF2SIDLbits_t; +extern volatile __RXF2SIDLbits_t __at (0xF09) RXF2SIDLbits; + +extern __sfr __at (0xF0A) RXF2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF2EIDHbits_t; +extern volatile __RXF2EIDHbits_t __at (0xF0A) RXF2EIDHbits; + +extern __sfr __at (0xF0B) RXF2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF2EIDLbits_t; +extern volatile __RXF2EIDLbits_t __at (0xF0B) RXF2EIDLbits; + +extern __sfr __at (0xF0C) RXF3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF3SIDHbits_t; +extern volatile __RXF3SIDHbits_t __at (0xF0C) RXF3SIDHbits; + +extern __sfr __at (0xF0D) RXF3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF3SIDLbits_t; +extern volatile __RXF3SIDLbits_t __at (0xF0D) RXF3SIDLbits; + +extern __sfr __at (0xF0E) RXF3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF3EIDHbits_t; +extern volatile __RXF3EIDHbits_t __at (0xF0E) RXF3EIDHbits; + +extern __sfr __at (0xF0F) RXF3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF3EIDLbits_t; +extern volatile __RXF3EIDLbits_t __at (0xF0F) RXF3EIDLbits; + +extern __sfr __at (0xF10) RXF4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF4SIDHbits_t; +extern volatile __RXF4SIDHbits_t __at (0xF10) RXF4SIDHbits; + +extern __sfr __at (0xF11) RXF4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF4SIDLbits_t; +extern volatile __RXF4SIDLbits_t __at (0xF11) RXF4SIDLbits; + +extern __sfr __at (0xF12) RXF4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF4EIDHbits_t; +extern volatile __RXF4EIDHbits_t __at (0xF12) RXF4EIDHbits; + +extern __sfr __at (0xF13) RXF4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF4EIDLbits_t; +extern volatile __RXF4EIDLbits_t __at (0xF13) RXF4EIDLbits; + +extern __sfr __at (0xF14) RXF5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF5SIDHbits_t; +extern volatile __RXF5SIDHbits_t __at (0xF14) RXF5SIDHbits; + +extern __sfr __at (0xF15) RXF5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF5SIDLbits_t; +extern volatile __RXF5SIDLbits_t __at (0xF15) RXF5SIDLbits; + +extern __sfr __at (0xF16) RXF5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF5EIDHbits_t; +extern volatile __RXF5EIDHbits_t __at (0xF16) RXF5EIDHbits; + +extern __sfr __at (0xF17) RXF5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF5EIDLbits_t; +extern volatile __RXF5EIDLbits_t __at (0xF17) RXF5EIDLbits; + +extern __sfr __at (0xF18) RXM0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM0SIDHbits_t; +extern volatile __RXM0SIDHbits_t __at (0xF18) RXM0SIDHbits; + +extern __sfr __at (0xF19) RXM0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM0SIDLbits_t; +extern volatile __RXM0SIDLbits_t __at (0xF19) RXM0SIDLbits; + +extern __sfr __at (0xF1A) RXM0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM0EIDHbits_t; +extern volatile __RXM0EIDHbits_t __at (0xF1A) RXM0EIDHbits; + +extern __sfr __at (0xF1B) RXM0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM0EIDLbits_t; +extern volatile __RXM0EIDLbits_t __at (0xF1B) RXM0EIDLbits; + +extern __sfr __at (0xF1C) RXM1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM1SIDHbits_t; +extern volatile __RXM1SIDHbits_t __at (0xF1C) RXM1SIDHbits; + +extern __sfr __at (0xF1D) RXM1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM1SIDLbits_t; +extern volatile __RXM1SIDLbits_t __at (0xF1D) RXM1SIDLbits; + +extern __sfr __at (0xF1E) RXM1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM1EIDHbits_t; +extern volatile __RXM1EIDHbits_t __at (0xF1E) RXM1EIDHbits; + +extern __sfr __at (0xF1F) RXM1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM1EIDLbits_t; +extern volatile __RXM1EIDLbits_t __at (0xF1F) RXM1EIDLbits; + +extern __sfr __at (0xF20) TXB2CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFBXB2CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB2CONbits_t; +extern volatile __TXB2CONbits_t __at (0xF20) TXB2CONbits; + +extern __sfr __at (0xF21) TXB2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB2SIDHbits_t; +extern volatile __TXB2SIDHbits_t __at (0xF21) TXB2SIDHbits; + +extern __sfr __at (0xF22) TXB2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB2SIDLbits_t; +extern volatile __TXB2SIDLbits_t __at (0xF22) TXB2SIDLbits; + +extern __sfr __at (0xF23) TXB2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB2EIDHbits_t; +extern volatile __TXB2EIDHbits_t __at (0xF23) TXB2EIDHbits; + +extern __sfr __at (0xF24) TXB2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB2EIDLbits_t; +extern volatile __TXB2EIDLbits_t __at (0xF24) TXB2EIDLbits; + +extern __sfr __at (0xF25) TXB2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB2DLCbits_t; +extern volatile __TXB2DLCbits_t __at (0xF25) TXB2DLCbits; + +extern __sfr __at (0xF26) TXB2D0; +typedef union { + struct { + unsigned TXB2D00 : 1; + unsigned TXB2D01 : 1; + unsigned TXB2D02 : 1; + unsigned TXB2D03 : 1; + unsigned TXB2D04 : 1; + unsigned TXB2D05 : 1; + unsigned TXB2D06 : 1; + unsigned TXB2D07 : 1; + }; +} __TXB2D0bits_t; +extern volatile __TXB2D0bits_t __at (0xF26) TXB2D0bits; + +extern __sfr __at (0xF27) TXB2D1; +typedef union { + struct { + unsigned TXB2D10 : 1; + unsigned TXB2D11 : 1; + unsigned TXB2D12 : 1; + unsigned TXB2D13 : 1; + unsigned TXB2D14 : 1; + unsigned TXB2D15 : 1; + unsigned TXB2D16 : 1; + unsigned TXB2D17 : 1; + }; +} __TXB2D1bits_t; +extern volatile __TXB2D1bits_t __at (0xF27) TXB2D1bits; + +extern __sfr __at (0xF28) TXB2D2; +typedef union { + struct { + unsigned TXB2D20 : 1; + unsigned TXB2D21 : 1; + unsigned TXB2D22 : 1; + unsigned TXB2D23 : 1; + unsigned TXB2D24 : 1; + unsigned TXB2D25 : 1; + unsigned TXB2D26 : 1; + unsigned TXB2D27 : 1; + }; +} __TXB2D2bits_t; +extern volatile __TXB2D2bits_t __at (0xF28) TXB2D2bits; + +extern __sfr __at (0xF29) TXB2D3; +typedef union { + struct { + unsigned TXB2D30 : 1; + unsigned TXB2D31 : 1; + unsigned TXB2D32 : 1; + unsigned TXB2D33 : 1; + unsigned TXB2D34 : 1; + unsigned TXB2D35 : 1; + unsigned TXB2D36 : 1; + unsigned TXB2D37 : 1; + }; +} __TXB2D3bits_t; +extern volatile __TXB2D3bits_t __at (0xF29) TXB2D3bits; + +extern __sfr __at (0xF2A) TXB2D4; +typedef union { + struct { + unsigned TXB2D40 : 1; + unsigned TXB2D41 : 1; + unsigned TXB2D42 : 1; + unsigned TXB2D43 : 1; + unsigned TXB2D44 : 1; + unsigned TXB2D45 : 1; + unsigned TXB2D46 : 1; + unsigned TXB2D47 : 1; + }; +} __TXB2D4bits_t; +extern volatile __TXB2D4bits_t __at (0xF2A) TXB2D4bits; + +extern __sfr __at (0xF2B) TXB2D5; +typedef union { + struct { + unsigned TXB2D50 : 1; + unsigned TXB2D51 : 1; + unsigned TXB2D52 : 1; + unsigned TXB2D53 : 1; + unsigned TXB2D54 : 1; + unsigned TXB2D55 : 1; + unsigned TXB2D56 : 1; + unsigned TXB2D57 : 1; + }; +} __TXB2D5bits_t; +extern volatile __TXB2D5bits_t __at (0xF2B) TXB2D5bits; + +extern __sfr __at (0xF2C) TXB2D6; +typedef union { + struct { + unsigned TXB2D60 : 1; + unsigned TXB2D61 : 1; + unsigned TXB2D62 : 1; + unsigned TXB2D63 : 1; + unsigned TXB2D64 : 1; + unsigned TXB2D65 : 1; + unsigned TXB2D66 : 1; + unsigned TXB2D67 : 1; + }; +} __TXB2D6bits_t; +extern volatile __TXB2D6bits_t __at (0xF2C) TXB2D6bits; + +extern __sfr __at (0xF2D) TXB2D7; +typedef union { + struct { + unsigned TXB2D70 : 1; + unsigned TXB2D71 : 1; + unsigned TXB2D72 : 1; + unsigned TXB2D73 : 1; + unsigned TXB2D74 : 1; + unsigned TXB2D75 : 1; + unsigned TXB2D76 : 1; + unsigned TXB2D77 : 1; + }; +} __TXB2D7bits_t; +extern volatile __TXB2D7bits_t __at (0xF2D) TXB2D7bits; + +extern __sfr __at (0xF2E) CANSTAT_RO3; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO3bits_t; +extern volatile __CANSTAT_RO3bits_t __at (0xF2E) CANSTAT_RO3bits; + +extern __sfr __at (0xF2F) CANCON_RO3; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO3bits_t; +extern volatile __CANCON_RO3bits_t __at (0xF2F) CANCON_RO3bits; + +extern __sfr __at (0xF30) TXB1CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFTXB1CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB1CONbits_t; +extern volatile __TXB1CONbits_t __at (0xF30) TXB1CONbits; + +extern __sfr __at (0xF31) TXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB1SIDHbits_t; +extern volatile __TXB1SIDHbits_t __at (0xF31) TXB1SIDHbits; + +extern __sfr __at (0xF32) TXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB1SIDLbits_t; +extern volatile __TXB1SIDLbits_t __at (0xF32) TXB1SIDLbits; + +extern __sfr __at (0xF33) TXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB1EIDHbits_t; +extern volatile __TXB1EIDHbits_t __at (0xF33) TXB1EIDHbits; + +extern __sfr __at (0xF34) TXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB1EIDLbits_t; +extern volatile __TXB1EIDLbits_t __at (0xF34) TXB1EIDLbits; + +extern __sfr __at (0xF35) TXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB1DLCbits_t; +extern volatile __TXB1DLCbits_t __at (0xF35) TXB1DLCbits; + +extern __sfr __at (0xF36) TXB1D0; +typedef union { + struct { + unsigned TXB1D00 : 1; + unsigned TXB1D01 : 1; + unsigned TXB1D02 : 1; + unsigned TXB1D03 : 1; + unsigned TXB1D04 : 1; + unsigned TXB1D05 : 1; + unsigned TXB1D06 : 1; + unsigned TXB1D07 : 1; + }; +} __TXB1D0bits_t; +extern volatile __TXB1D0bits_t __at (0xF36) TXB1D0bits; + +extern __sfr __at (0xF37) TXB1D1; +typedef union { + struct { + unsigned TXB1D10 : 1; + unsigned TXB1D11 : 1; + unsigned TXB1D12 : 1; + unsigned TXB1D13 : 1; + unsigned TXB1D14 : 1; + unsigned TXB1D15 : 1; + unsigned TXB1D16 : 1; + unsigned TXB1D17 : 1; + }; +} __TXB1D1bits_t; +extern volatile __TXB1D1bits_t __at (0xF37) TXB1D1bits; + +extern __sfr __at (0xF38) TXB1D2; +typedef union { + struct { + unsigned TXB1D20 : 1; + unsigned TXB1D21 : 1; + unsigned TXB1D22 : 1; + unsigned TXB1D23 : 1; + unsigned TXB1D24 : 1; + unsigned TXB1D25 : 1; + unsigned TXB1D26 : 1; + unsigned TXB1D27 : 1; + }; +} __TXB1D2bits_t; +extern volatile __TXB1D2bits_t __at (0xF38) TXB1D2bits; + +extern __sfr __at (0xF39) TXB1D3; +typedef union { + struct { + unsigned TXB1D30 : 1; + unsigned TXB1D31 : 1; + unsigned TXB1D32 : 1; + unsigned TXB1D33 : 1; + unsigned TXB1D34 : 1; + unsigned TXB1D35 : 1; + unsigned TXB1D36 : 1; + unsigned TXB1D37 : 1; + }; +} __TXB1D3bits_t; +extern volatile __TXB1D3bits_t __at (0xF39) TXB1D3bits; + +extern __sfr __at (0xF3A) TXB1D4; +typedef union { + struct { + unsigned TXB1D40 : 1; + unsigned TXB1D41 : 1; + unsigned TXB1D42 : 1; + unsigned TXB1D43 : 1; + unsigned TXB1D44 : 1; + unsigned TXB1D45 : 1; + unsigned TXB1D46 : 1; + unsigned TXB1D47 : 1; + }; +} __TXB1D4bits_t; +extern volatile __TXB1D4bits_t __at (0xF3A) TXB1D4bits; + +extern __sfr __at (0xF3B) TXB1D5; +typedef union { + struct { + unsigned TXB1D50 : 1; + unsigned TXB1D51 : 1; + unsigned TXB1D52 : 1; + unsigned TXB1D53 : 1; + unsigned TXB1D54 : 1; + unsigned TXB1D55 : 1; + unsigned TXB1D56 : 1; + unsigned TXB1D57 : 1; + }; +} __TXB1D5bits_t; +extern volatile __TXB1D5bits_t __at (0xF3B) TXB1D5bits; + +extern __sfr __at (0xF3C) TXB1D6; +typedef union { + struct { + unsigned TXB1D60 : 1; + unsigned TXB1D61 : 1; + unsigned TXB1D62 : 1; + unsigned TXB1D63 : 1; + unsigned TXB1D64 : 1; + unsigned TXB1D65 : 1; + unsigned TXB1D66 : 1; + unsigned TXB1D67 : 1; + }; +} __TXB1D6bits_t; +extern volatile __TXB1D6bits_t __at (0xF3C) TXB1D6bits; + +extern __sfr __at (0xF3D) TXB1D7; +typedef union { + struct { + unsigned TXB1D70 : 1; + unsigned TXB1D71 : 1; + unsigned TXB1D72 : 1; + unsigned TXB1D73 : 1; + unsigned TXB1D74 : 1; + unsigned TXB1D75 : 1; + unsigned TXB1D76 : 1; + unsigned TXB1D77 : 1; + }; +} __TXB1D7bits_t; +extern volatile __TXB1D7bits_t __at (0xF3D) TXB1D7bits; + +extern __sfr __at (0xF3E) CANSTAT_RO2; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO2bits_t; +extern volatile __CANSTAT_RO2bits_t __at (0xF3E) CANSTAT_RO2bits; + +extern __sfr __at (0xF3F) CANCON_RO2; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO2bits_t; +extern volatile __CANCON_RO2bits_t __at (0xF3F) CANCON_RO2bits; + +extern __sfr __at (0xF40) TXB0CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; +} __TXB0CONbits_t; +extern volatile __TXB0CONbits_t __at (0xF40) TXB0CONbits; + +extern __sfr __at (0xF41) TXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB0SIDHbits_t; +extern volatile __TXB0SIDHbits_t __at (0xF41) TXB0SIDHbits; + +extern __sfr __at (0xF42) TXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB0SIDLbits_t; +extern volatile __TXB0SIDLbits_t __at (0xF42) TXB0SIDLbits; + +extern __sfr __at (0xF43) TXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB0EIDHbits_t; +extern volatile __TXB0EIDHbits_t __at (0xF43) TXB0EIDHbits; + +extern __sfr __at (0xF44) TXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB0EIDLbits_t; +extern volatile __TXB0EIDLbits_t __at (0xF44) TXB0EIDLbits; + +extern __sfr __at (0xF45) TXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB0DLCbits_t; +extern volatile __TXB0DLCbits_t __at (0xF45) TXB0DLCbits; + +extern __sfr __at (0xF46) TXB0D0; +typedef union { + struct { + unsigned TXB0D00 : 1; + unsigned TXB0D01 : 1; + unsigned TXB0D02 : 1; + unsigned TXB0D03 : 1; + unsigned TXB0D04 : 1; + unsigned TXB0D05 : 1; + unsigned TXB0D06 : 1; + unsigned TXB0D07 : 1; + }; +} __TXB0D0bits_t; +extern volatile __TXB0D0bits_t __at (0xF46) TXB0D0bits; + +extern __sfr __at (0xF47) TXB0D1; +typedef union { + struct { + unsigned TXB0D10 : 1; + unsigned TXB0D11 : 1; + unsigned TXB0D12 : 1; + unsigned TXB0D13 : 1; + unsigned TXB0D14 : 1; + unsigned TXB0D15 : 1; + unsigned TXB0D16 : 1; + unsigned TXB0D17 : 1; + }; +} __TXB0D1bits_t; +extern volatile __TXB0D1bits_t __at (0xF47) TXB0D1bits; + +extern __sfr __at (0xF48) TXB0D2; +typedef union { + struct { + unsigned TXB0D20 : 1; + unsigned TXB0D21 : 1; + unsigned TXB0D22 : 1; + unsigned TXB0D23 : 1; + unsigned TXB0D24 : 1; + unsigned TXB0D25 : 1; + unsigned TXB0D26 : 1; + unsigned TXB0D27 : 1; + }; +} __TXB0D2bits_t; +extern volatile __TXB0D2bits_t __at (0xF48) TXB0D2bits; + +extern __sfr __at (0xF49) TXB0D3; +typedef union { + struct { + unsigned TXB0D30 : 1; + unsigned TXB0D31 : 1; + unsigned TXB0D32 : 1; + unsigned TXB0D33 : 1; + unsigned TXB0D34 : 1; + unsigned TXB0D35 : 1; + unsigned TXB0D36 : 1; + unsigned TXB0D37 : 1; + }; +} __TXB0D3bits_t; +extern volatile __TXB0D3bits_t __at (0xF49) TXB0D3bits; + +extern __sfr __at (0xF4A) TXB0D4; +typedef union { + struct { + unsigned TXB0D40 : 1; + unsigned TXB0D41 : 1; + unsigned TXB0D42 : 1; + unsigned TXB0D43 : 1; + unsigned TXB0D44 : 1; + unsigned TXB0D45 : 1; + unsigned TXB0D46 : 1; + unsigned TXB0D47 : 1; + }; +} __TXB0D4bits_t; +extern volatile __TXB0D4bits_t __at (0xF4A) TXB0D4bits; + +extern __sfr __at (0xF4B) TXB0D5; +typedef union { + struct { + unsigned TXB0D50 : 1; + unsigned TXB0D51 : 1; + unsigned TXB0D52 : 1; + unsigned TXB0D53 : 1; + unsigned TXB0D54 : 1; + unsigned TXB0D55 : 1; + unsigned TXB0D56 : 1; + unsigned TXB0D57 : 1; + }; +} __TXB0D5bits_t; +extern volatile __TXB0D5bits_t __at (0xF4B) TXB0D5bits; + +extern __sfr __at (0xF4C) TXB0D6; +typedef union { + struct { + unsigned TXB0D60 : 1; + unsigned TXB0D61 : 1; + unsigned TXB0D62 : 1; + unsigned TXB0D63 : 1; + unsigned TXB0D64 : 1; + unsigned TXB0D65 : 1; + unsigned TXB0D66 : 1; + unsigned TXB0D67 : 1; + }; +} __TXB0D6bits_t; +extern volatile __TXB0D6bits_t __at (0xF4C) TXB0D6bits; + +extern __sfr __at (0xF4D) TXB0D7; +typedef union { + struct { + unsigned TXB0D70 : 1; + unsigned TXB0D71 : 1; + unsigned TXB0D72 : 1; + unsigned TXB0D73 : 1; + unsigned TXB0D74 : 1; + unsigned TXB0D75 : 1; + unsigned TXB0D76 : 1; + unsigned TXB0D77 : 1; + }; +} __TXB0D7bits_t; +extern volatile __TXB0D7bits_t __at (0xF4D) TXB0D7bits; + +extern __sfr __at (0xF4E) CANSTAT_RO1; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO1bits_t; +extern volatile __CANSTAT_RO1bits_t __at (0xF4E) CANSTAT_RO1bits; + +extern __sfr __at (0xF4F) CANCON_RO1; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO1bits_t; +extern volatile __CANCON_RO1bits_t __at (0xF4F) CANCON_RO1bits; + +extern __sfr __at (0xF50) RXB1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned RXRTRRO_RXB1CON : 1; + unsigned FILHIT4 : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned FILHIT3 : 1; + unsigned : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1CONbits_t; +extern volatile __RXB1CONbits_t __at (0xF50) RXB1CONbits; + +extern __sfr __at (0xF51) RXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB1SIDHbits_t; +extern volatile __RXB1SIDHbits_t __at (0xF51) RXB1SIDHbits; + +extern __sfr __at (0xF52) RXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB1SIDLbits_t; +extern volatile __RXB1SIDLbits_t __at (0xF52) RXB1SIDLbits; + +extern __sfr __at (0xF53) RXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB1EIDHbits_t; +extern volatile __RXB1EIDHbits_t __at (0xF53) RXB1EIDHbits; + +extern __sfr __at (0xF54) RXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB1EIDLbits_t; +extern volatile __RXB1EIDLbits_t __at (0xF54) RXB1EIDLbits; + +extern __sfr __at (0xF55) RXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB1DLC : 1; + unsigned RB1_RXB1DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1DLCbits_t; +extern volatile __RXB1DLCbits_t __at (0xF55) RXB1DLCbits; + +extern __sfr __at (0xF56) RXB1D0; +typedef union { + struct { + unsigned RXB1D00 : 1; + unsigned RXB1D01 : 1; + unsigned RXB1D02 : 1; + unsigned RXB1D03 : 1; + unsigned RXB1D04 : 1; + unsigned RXB1D05 : 1; + unsigned RXB1D06 : 1; + unsigned RXB1D07 : 1; + }; +} __RXB1D0bits_t; +extern volatile __RXB1D0bits_t __at (0xF56) RXB1D0bits; + +extern __sfr __at (0xF57) RXB1D1; +typedef union { + struct { + unsigned RXB1D10 : 1; + unsigned RXB1D11 : 1; + unsigned RXB1D12 : 1; + unsigned RXB1D13 : 1; + unsigned RXB1D14 : 1; + unsigned RXB1D15 : 1; + unsigned RXB1D16 : 1; + unsigned RXB1D17 : 1; + }; +} __RXB1D1bits_t; +extern volatile __RXB1D1bits_t __at (0xF57) RXB1D1bits; + +extern __sfr __at (0xF58) RXB1D2; +typedef union { + struct { + unsigned RXB1D20 : 1; + unsigned RXB1D21 : 1; + unsigned RXB1D22 : 1; + unsigned RXB1D23 : 1; + unsigned RXB1D24 : 1; + unsigned RXB1D25 : 1; + unsigned RXB1D26 : 1; + unsigned RXB1D27 : 1; + }; +} __RXB1D2bits_t; +extern volatile __RXB1D2bits_t __at (0xF58) RXB1D2bits; + +extern __sfr __at (0xF59) RXB1D3; +typedef union { + struct { + unsigned RXB1D30 : 1; + unsigned RXB1D31 : 1; + unsigned RXB1D32 : 1; + unsigned RXB1D33 : 1; + unsigned RXB1D34 : 1; + unsigned RXB1D35 : 1; + unsigned RXB1D36 : 1; + unsigned RXB1D37 : 1; + }; +} __RXB1D3bits_t; +extern volatile __RXB1D3bits_t __at (0xF59) RXB1D3bits; + +extern __sfr __at (0xF5A) RXB1D4; +typedef union { + struct { + unsigned RXB1D40 : 1; + unsigned RXB1D41 : 1; + unsigned RXB1D42 : 1; + unsigned RXB1D43 : 1; + unsigned RXB1D44 : 1; + unsigned RXB1D45 : 1; + unsigned RXB1D46 : 1; + unsigned RXB1D47 : 1; + }; +} __RXB1D4bits_t; +extern volatile __RXB1D4bits_t __at (0xF5A) RXB1D4bits; + +extern __sfr __at (0xF5B) RXB1D5; +typedef union { + struct { + unsigned RXB1D50 : 1; + unsigned RXB1D51 : 1; + unsigned RXB1D52 : 1; + unsigned RXB1D53 : 1; + unsigned RXB1D54 : 1; + unsigned RXB1D55 : 1; + unsigned RXB1D56 : 1; + unsigned RXB1D57 : 1; + }; +} __RXB1D5bits_t; +extern volatile __RXB1D5bits_t __at (0xF5B) RXB1D5bits; + +extern __sfr __at (0xF5C) RXB1D6; +typedef union { + struct { + unsigned RXB1D60 : 1; + unsigned RXB1D61 : 1; + unsigned RXB1D62 : 1; + unsigned RXB1D63 : 1; + unsigned RXB1D64 : 1; + unsigned RXB1D65 : 1; + unsigned RXB1D66 : 1; + unsigned RXB1D67 : 1; + }; +} __RXB1D6bits_t; +extern volatile __RXB1D6bits_t __at (0xF5C) RXB1D6bits; + +extern __sfr __at (0xF5D) RXB1D7; +typedef union { + struct { + unsigned RXB1D70 : 1; + unsigned RXB1D71 : 1; + unsigned RXB1D72 : 1; + unsigned RXB1D73 : 1; + unsigned RXB1D74 : 1; + unsigned RXB1D75 : 1; + unsigned RXB1D76 : 1; + unsigned RXB1D77 : 1; + }; +} __RXB1D7bits_t; +extern volatile __RXB1D7bits_t __at (0xF5D) RXB1D7bits; + +extern __sfr __at (0xF5E) CANSTAT_RO0; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO0bits_t; +extern volatile __CANSTAT_RO0bits_t __at (0xF5E) CANSTAT_RO0bits; + +extern __sfr __at (0xF5F) CANCON_RO0; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO0bits_t; +extern volatile __CANCON_RO0bits_t __at (0xF5F) CANCON_RO0bits; + +extern __sfr __at (0xF60) RXB0CON; +typedef union { + struct { + unsigned : 1; + unsigned JTOFF : 1; + unsigned RXB0DBEN : 1; + unsigned RXRTRRO_RXB0CON : 1; + unsigned : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0CONbits_t; +extern volatile __RXB0CONbits_t __at (0xF60) RXB0CONbits; + +extern __sfr __at (0xF61) RXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB0SIDHbits_t; +extern volatile __RXB0SIDHbits_t __at (0xF61) RXB0SIDHbits; + +extern __sfr __at (0xF62) RXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB0SIDLbits_t; +extern volatile __RXB0SIDLbits_t __at (0xF62) RXB0SIDLbits; + +extern __sfr __at (0xF63) RXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB0EIDHbits_t; +extern volatile __RXB0EIDHbits_t __at (0xF63) RXB0EIDHbits; + +extern __sfr __at (0xF64) RXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB0EIDLbits_t; +extern volatile __RXB0EIDLbits_t __at (0xF64) RXB0EIDLbits; + +extern __sfr __at (0xF65) RXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB0DLC : 1; + unsigned RB1_RXB0DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0DLCbits_t; +extern volatile __RXB0DLCbits_t __at (0xF65) RXB0DLCbits; + +extern __sfr __at (0xF66) RXB0D0; +typedef union { + struct { + unsigned RXB0D00 : 1; + unsigned RXB0D01 : 1; + unsigned RXB0D02 : 1; + unsigned RXB0D03 : 1; + unsigned RXB0D04 : 1; + unsigned RXB0D05 : 1; + unsigned RXB0D06 : 1; + unsigned RXB0D07 : 1; + }; +} __RXB0D0bits_t; +extern volatile __RXB0D0bits_t __at (0xF66) RXB0D0bits; + +extern __sfr __at (0xF67) RXB0D1; +typedef union { + struct { + unsigned RXB0D10 : 1; + unsigned RXB0D11 : 1; + unsigned RXB0D12 : 1; + unsigned RXB0D13 : 1; + unsigned RXB0D14 : 1; + unsigned RXB0D15 : 1; + unsigned RXB0D16 : 1; + unsigned RXB0D17 : 1; + }; +} __RXB0D1bits_t; +extern volatile __RXB0D1bits_t __at (0xF67) RXB0D1bits; + +extern __sfr __at (0xF68) RXB0D2; +typedef union { + struct { + unsigned RXB0D20 : 1; + unsigned RXB0D21 : 1; + unsigned RXB0D22 : 1; + unsigned RXB0D23 : 1; + unsigned RXB0D24 : 1; + unsigned RXB0D25 : 1; + unsigned RXB0D26 : 1; + unsigned RXB0D27 : 1; + }; +} __RXB0D2bits_t; +extern volatile __RXB0D2bits_t __at (0xF68) RXB0D2bits; + +extern __sfr __at (0xF69) RXB0D3; +typedef union { + struct { + unsigned RXB0D30 : 1; + unsigned RXB0D31 : 1; + unsigned RXB0D32 : 1; + unsigned RXB0D33 : 1; + unsigned RXB0D34 : 1; + unsigned RXB0D35 : 1; + unsigned RXB0D36 : 1; + unsigned RXB0D37 : 1; + }; +} __RXB0D3bits_t; +extern volatile __RXB0D3bits_t __at (0xF69) RXB0D3bits; + +extern __sfr __at (0xF6A) RXB0D4; +typedef union { + struct { + unsigned RXB0D40 : 1; + unsigned RXB0D41 : 1; + unsigned RXB0D42 : 1; + unsigned RXB0D43 : 1; + unsigned RXB0D44 : 1; + unsigned RXB0D45 : 1; + unsigned RXB0D46 : 1; + unsigned RXB0D47 : 1; + }; +} __RXB0D4bits_t; +extern volatile __RXB0D4bits_t __at (0xF6A) RXB0D4bits; + +extern __sfr __at (0xF6B) RXB0D5; +typedef union { + struct { + unsigned RXB0D50 : 1; + unsigned RXB0D51 : 1; + unsigned RXB0D52 : 1; + unsigned RXB0D53 : 1; + unsigned RXB0D54 : 1; + unsigned RXB0D55 : 1; + unsigned RXB0D56 : 1; + unsigned RXB0D57 : 1; + }; +} __RXB0D5bits_t; +extern volatile __RXB0D5bits_t __at (0xF6B) RXB0D5bits; + +extern __sfr __at (0xF6C) RXB0D6; +typedef union { + struct { + unsigned RXB0D60 : 1; + unsigned RXB0D61 : 1; + unsigned RXB0D62 : 1; + unsigned RXB0D63 : 1; + unsigned RXB0D64 : 1; + unsigned RXB0D65 : 1; + unsigned RXB0D66 : 1; + unsigned RXB0D67 : 1; + }; +} __RXB0D6bits_t; +extern volatile __RXB0D6bits_t __at (0xF6C) RXB0D6bits; + +extern __sfr __at (0xF6D) RXB0D7; +typedef union { + struct { + unsigned RXB0D70 : 1; + unsigned RXB0D71 : 1; + unsigned RXB0D72 : 1; + unsigned RXB0D73 : 1; + unsigned RXB0D74 : 1; + unsigned RXB0D75 : 1; + unsigned RXB0D76 : 1; + unsigned RXB0D77 : 1; + }; +} __RXB0D7bits_t; +extern volatile __RXB0D7bits_t __at (0xF6D) RXB0D7bits; + +extern __sfr __at (0xF6E) CANSTAT; +typedef union { + struct { + unsigned EICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned EICODE4 : 1; + unsigned OPMODE0 : 1; + unsigned OPMODE1 : 1; + unsigned OPMODE2 : 1; + }; + struct { + unsigned : 1; + unsigned EICODE1 : 1; + unsigned EICODE2 : 1; + unsigned EICODE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANSTATbits_t; +extern volatile __CANSTATbits_t __at (0xF6E) CANSTATbits; + +extern __sfr __at (0xF6F) CANCON; +typedef union { + struct { + unsigned FP0 : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; + struct { + unsigned : 1; + unsigned FP1 : 1; + unsigned FP2 : 1; + unsigned FP3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANCONbits_t; +extern volatile __CANCONbits_t __at (0xF6F) CANCONbits; + +extern __sfr __at (0xF70) BRGCON1; +typedef union { + struct { + unsigned BRP0 : 1; + unsigned BRP1 : 1; + unsigned BRP2 : 1; + unsigned BRP3 : 1; + unsigned BRP4 : 1; + unsigned BRP5 : 1; + unsigned SJW0 : 1; + unsigned SJW1 : 1; + }; +} __BRGCON1bits_t; +extern volatile __BRGCON1bits_t __at (0xF70) BRGCON1bits; + +extern __sfr __at (0xF71) BRGCON2; +typedef union { + struct { + unsigned PRSEG0 : 1; + unsigned PRSEG1 : 1; + unsigned PRSEG2 : 1; + unsigned SEG1PH0 : 1; + unsigned SEG1PH1 : 1; + unsigned SEG1PH2 : 1; + unsigned SAM : 1; + unsigned SEG2PHTS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SEG2PHT : 1; + }; +} __BRGCON2bits_t; +extern volatile __BRGCON2bits_t __at (0xF71) BRGCON2bits; + +extern __sfr __at (0xF72) BRGCON3; +typedef union { + struct { + unsigned SEG2PH0 : 1; + unsigned SEG2PH1 : 1; + unsigned SEG2PH2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned WAKFIL : 1; + unsigned WAKDIS : 1; + }; +} __BRGCON3bits_t; +extern volatile __BRGCON3bits_t __at (0xF72) BRGCON3bits; + +extern __sfr __at (0xF73) CIOCON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CANCAP : 1; + unsigned ENDRHI : 1; + unsigned : 1; + unsigned : 1; + }; +} __CIOCONbits_t; +extern volatile __CIOCONbits_t __at (0xF73) CIOCONbits; + +extern __sfr __at (0xF74) COMSTAT; +typedef union { + struct { + unsigned EWARN : 1; + unsigned RXWARN : 1; + unsigned TXWARN : 1; + unsigned RXBP : 1; + unsigned TXBP : 1; + unsigned TXBO : 1; + unsigned RXB1OVFL : 1; + unsigned RXB0OVFL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXBnOVFL : 1; + unsigned FIFOEMPTY : 1; + }; +} __COMSTATbits_t; +extern volatile __COMSTATbits_t __at (0xF74) COMSTATbits; + +extern __sfr __at (0xF75) RXERRCNT; +typedef union { + struct { + unsigned REC0 : 1; + unsigned REC1 : 1; + unsigned REC2 : 1; + unsigned REC3 : 1; + unsigned REC4 : 1; + unsigned REC5 : 1; + unsigned REC6 : 1; + unsigned REC7 : 1; + }; +} __RXERRCNTbits_t; +extern volatile __RXERRCNTbits_t __at (0xF75) RXERRCNTbits; + +extern __sfr __at (0xF76) TXERRCNT; +typedef union { + struct { + unsigned TEC0 : 1; + unsigned TEC1 : 1; + unsigned TEC2 : 1; + unsigned TEC3 : 1; + unsigned TEC4 : 1; + unsigned TEC5 : 1; + unsigned TEC6 : 1; + unsigned TEC7 : 1; + }; +} __TXERRCNTbits_t; +extern volatile __TXERRCNTbits_t __at (0xF76) TXERRCNTbits; + +extern __sfr __at (0xF77) ECANCON; +typedef union { + struct { + unsigned EWIN0 : 1; + unsigned EWIN1 : 1; + unsigned EWIN2 : 1; + unsigned EWIN3 : 1; + unsigned EWIN4 : 1; + unsigned FIFOWM : 1; + unsigned MDSEL0 : 1; + unsigned MDSEL1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned F : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECANCONbits_t; +extern volatile __ECANCONbits_t __at (0xF77) ECANCONbits; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned OSC1 : 1; + }; + struct { + unsigned CVREF : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned LVDIN : 1; + unsigned CLKO : 1; + unsigned CLKI : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0_PORTB : 1; + unsigned RB1_PORTB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CANRX : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned CANTX : 1; + unsigned : 1; + unsigned AN9 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0_DDRB : 1; + unsigned RB1_DDRB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSCR : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXBIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned : 1; + unsigned : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned : 1; + unsigned : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned : 1; + unsigned : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned ERRIE : 1; + unsigned WAKIE : 1; + unsigned IRXIE : 1; + }; + struct { + unsigned FIFOWMIE : 1; + unsigned RXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FIFOMWIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned RXB0IF : 1; + unsigned RXB1IF : 1; + unsigned TXB0IF : 1; + unsigned TXB1IF : 1; + unsigned TXB2IF : 1; + unsigned ERRIF : 1; + unsigned WAKIF : 1; + unsigned IRXIF : 1; + }; + struct { + unsigned FIFOWMIF : 1; + unsigned RXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned RXB0IP : 1; + unsigned RXB1IP : 1; + unsigned TXB0IP : 1; + unsigned TXB1IP : 1; + unsigned TXB2IP : 1; + unsigned ERRIP : 1; + unsigned WAKIP : 1; + unsigned IRXIP : 1; + }; + struct { + unsigned FIFOWMIP : 1; + unsigned RXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAA) EEADRH; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T3NSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T3ECCP1 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO_DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T0PS3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f25j10.h b/device/include/pic16/pic18f25j10.h new file mode 100644 index 0000000..012a509 --- /dev/null +++ b/device/include/pic16/pic18f25j10.h @@ -0,0 +1,6 @@ +/* + * pic18f25j10.h - device specific declarations + */ + +#include "pic18f24j10.h" + diff --git a/device/include/pic16/pic18f25k20.h b/device/include/pic16/pic18f25k20.h new file mode 100644 index 0000000..40f1794 --- /dev/null +++ b/device/include/pic16/pic18f25k20.h @@ -0,0 +1,6 @@ +/* + * pic18f25k20.h - device specific declarations + */ + +#include "pic18f46k20.h" + diff --git a/device/include/pic16/pic18f2610.h b/device/include/pic16/pic18f2610.h new file mode 100644 index 0000000..f843996 --- /dev/null +++ b/device/include/pic16/pic18f2610.h @@ -0,0 +1,6 @@ +/* + * pic18f2610.h - device specific declarations + */ + +#include "pic18f4610.h" + diff --git a/device/include/pic16/pic18f2620.h b/device/include/pic16/pic18f2620.h new file mode 100644 index 0000000..5d208b0 --- /dev/null +++ b/device/include/pic16/pic18f2620.h @@ -0,0 +1,6 @@ +/* + * pic18f2620.h - PIC18F2620 Device Library Header + */ + +#include "pic18f4620.h" + diff --git a/device/include/pic16/pic18f2680.h b/device/include/pic16/pic18f2680.h new file mode 100644 index 0000000..a58fd28 --- /dev/null +++ b/device/include/pic16/pic18f2680.h @@ -0,0 +1,6080 @@ +/* + * pic18f2680.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F2680_H__ +#define __PIC18F2680_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP oscillator +#define _OSC_XT_1H 0xF1 // XT oscillator +#define _OSC_HS_1H 0xF2 // HS oscillator +#define _OSC_RC_1H 0xF3 // External RC oscillator, CLKO function on RA6 +#define _OSC_EC_1H 0xF4 // EC oscillator, CLKO function on RA6 +#define _OSC_ECIO_1H 0xF5 // EC oscillator, port function on RA6 +#define _OSC_HSPLL_1H 0xF6 // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) +#define _OSC_RCIO_1H 0xF7 // External RC oscillator, port function on RA6 +#define _OSC_IRCIO67_1H 0xF8 // Internal oscillator block, port function on RA6 and RA7 +#define _OSC_IRCIO7_1H 0xF9 // Internal oscillator block, CLKO function on RA6, port function on RA7 +#define _FCMEN_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled +#define _FCMEN_ON_1H 0xFF // Fail-Safe Clock Monitor enabled +#define _IESO_OFF_1H 0x7F // Oscillator Switchover mode disabled +#define _IESO_ON_1H 0xFF // Oscillator Switchover mode enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // PWRT enabled +#define _PWRT_OFF_2L 0xFF // PWRT disabled +#define _BOREN_OFF_2L 0xF9 // Brown-out Reset disabled in hardware and software +#define _BOREN_SBORENCTRL_2L 0xFB // Brown-out Reset enabled and controlled by software (SBOREN is enabled) +#define _BOREN_BOACTIVE_2L 0xFD // Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) +#define _BOREN_BOHW_2L 0xFF // Brown-out Reset enabled in hardware only (SBOREN is disabled) +#define _BORV_0_2L 0xE7 // Maximum Setting +#define _BORV_1_2L 0xEF // +#define _BORV_2_2L 0xF7 // +#define _BORV_3_2L 0xFF // Minimum Setting + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // HW Disabled - SW Controlled +#define _WDT_ON_2H 0xFF // HW Enabled - SW Disabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // RE3 input pin enabled; MCLR disabled +#define _MCLRE_ON_3H 0xFF // MCLR pin enabled; RE3 input pin disabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 configured for higher power operation +#define _LPT1OSC_ON_3H 0xFF // Timer1 configured for low-power operation +#define _PBADEN_OFF_3H 0xFD // PORTB<4> and PORTB<1:0> Configured as Digital I/O Pins on Reset +#define _PBADEN_ON_3H 0xFF // PORTB<4> and PORTB<1:0> Configured as Analog Pins on Reset + +// CONFIG4L Options +#define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug +#define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins +#define _XINST_OFF_4L 0xBF // Instruction set extension and Indexed Addressing mode disabled (Legacy mode) +#define _XINST_ON_4L 0xFF // Instruction set extension and Indexed Addressing mode enabled +#define _BBSIZ_1024_4L 0xCF // 1K words (2K bytes) Boot Block +#define _BBSIZ_2048_4L 0xDF // 2K words (4K bytes) Boot Block +#define _BBSIZ_4096_4L 0xEF // 4K words (8K bytes) Boot Block +#define _LVP_OFF_4L 0xFB // Single-Supply ICSP disabled +#define _LVP_ON_4L 0xFF // Single-Supply ICSP enabled +#define _STVREN_OFF_4L 0xFE // Stack full/underflow will not cause Reset +#define _STVREN_ON_4L 0xFF // Stack full/underflow will cause Reset + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Block 0 (000800-003FFFh) code-protected +#define _CP0_OFF_5L 0xFF // Block 0 (000800-003FFFh) not code-protected +#define _CP1_ON_5L 0xFD // Block 1 (004000-007FFFh) code-protected +#define _CP1_OFF_5L 0xFF // Block 1 (004000-007FFFh) not code-protected +#define _CP2_ON_5L 0xFB // Block 2 (008000-00BFFFh) code-protected +#define _CP2_OFF_5L 0xFF // Block 2 (008000-00BFFFh) not code-protected +#define _CP3_ON_5L 0xF7 // Block 3 (00C000-00FFFFh) code-protected +#define _CP3_OFF_5L 0xFF // Block 3 (00C000-00FFFFh) not code-protected + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Boot block (000000-0007FFh) code-protected +#define _CPB_OFF_5H 0xFF // Boot block (000000-0007FFh) not code-protected +#define _CPD_ON_5H 0x7F // Data EEPROM code-protected +#define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Block 0 (000800-003FFFh) write-protected +#define _WRT0_OFF_6L 0xFF // Block 0 (000800-003FFFh) not write-protected +#define _WRT1_ON_6L 0xFD // Block 1 (004000-007FFFh) write-protected +#define _WRT1_OFF_6L 0xFF // Block 1 (004000-007FFFh) not write-protected +#define _WRT2_ON_6L 0xFB // Block 2 (008000-00BFFFh) write-protected +#define _WRT2_OFF_6L 0xFF // Block 2 (008000-00BFFFh) not write-protected +#define _WRT3_ON_6L 0xF7 // Block 3 (00C000-00FFFFh) write-protected +#define _WRT3_OFF_6L 0xFF // Block 3 (00C000-00FFFFh) not write-protected + +// CONFIG6H Options +#define _WRTB_ON_6H 0xBF // Boot block (000000-0007FFh) write-protected +#define _WRTB_OFF_6H 0xFF // Boot block (000000-0007FFh) not write-protected +#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected +#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected +#define _WRTD_ON_6H 0x7F // Data EEPROM write-protected +#define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Block 0 (000800-003FFFh) protected from table reads executed in other blocks +#define _EBTR0_OFF_7L 0xFF // Block 0 (000800-003FFFh) not protected from table reads executed in other blocks +#define _EBTR1_ON_7L 0xFD // Block 1 (004000-007FFFh) protected from table reads executed in other blocks +#define _EBTR1_OFF_7L 0xFF // Block 1 (004000-007FFFh) not protected from table reads executed in other blocks +#define _EBTR2_ON_7L 0xFB // Block 2 (008000-00BFFFh) protected from table reads executed in other blocks +#define _EBTR2_OFF_7L 0xFF // Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks +#define _EBTR3_ON_7L 0xF7 // Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks +#define _EBTR3_OFF_7L 0xFF // Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Boot block (000000-0007FFh) protected from table reads executed in other blocks +#define _EBTRB_OFF_7H 0xFF // Boot block (000000-0007FFh) not protected from table reads executed in other blocks +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xD60) RXF6SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF6SIDHbits_t; +extern volatile __RXF6SIDHbits_t __at (0xD60) RXF6SIDHbits; + +extern __sfr __at (0xD61) RXF6SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF6SIDLbits_t; +extern volatile __RXF6SIDLbits_t __at (0xD61) RXF6SIDLbits; + +extern __sfr __at (0xD62) RXF6EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF6EIDHbits_t; +extern volatile __RXF6EIDHbits_t __at (0xD62) RXF6EIDHbits; + +extern __sfr __at (0xD63) RXF6EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF6EIDLbits_t; +extern volatile __RXF6EIDLbits_t __at (0xD63) RXF6EIDLbits; + +extern __sfr __at (0xD64) RXF7SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF7SIDHbits_t; +extern volatile __RXF7SIDHbits_t __at (0xD64) RXF7SIDHbits; + +extern __sfr __at (0xD65) RXF7SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF7SIDLbits_t; +extern volatile __RXF7SIDLbits_t __at (0xD65) RXF7SIDLbits; + +extern __sfr __at (0xD66) RXF7EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF7EIDHbits_t; +extern volatile __RXF7EIDHbits_t __at (0xD66) RXF7EIDHbits; + +extern __sfr __at (0xD67) RXF7EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF7EIDLbits_t; +extern volatile __RXF7EIDLbits_t __at (0xD67) RXF7EIDLbits; + +extern __sfr __at (0xD68) RXF8SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF8SIDHbits_t; +extern volatile __RXF8SIDHbits_t __at (0xD68) RXF8SIDHbits; + +extern __sfr __at (0xD69) RXF8SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF8SIDLbits_t; +extern volatile __RXF8SIDLbits_t __at (0xD69) RXF8SIDLbits; + +extern __sfr __at (0xD6A) RXF8EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF8EIDHbits_t; +extern volatile __RXF8EIDHbits_t __at (0xD6A) RXF8EIDHbits; + +extern __sfr __at (0xD6B) RXF8EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF8EIDLbits_t; +extern volatile __RXF8EIDLbits_t __at (0xD6B) RXF8EIDLbits; + +extern __sfr __at (0xD70) RXF9SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF9SIDHbits_t; +extern volatile __RXF9SIDHbits_t __at (0xD70) RXF9SIDHbits; + +extern __sfr __at (0xD71) RXF9SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF9SIDLbits_t; +extern volatile __RXF9SIDLbits_t __at (0xD71) RXF9SIDLbits; + +extern __sfr __at (0xD72) RXF9EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF9EIDHbits_t; +extern volatile __RXF9EIDHbits_t __at (0xD72) RXF9EIDHbits; + +extern __sfr __at (0xD73) RXF9EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF9EIDLbits_t; +extern volatile __RXF9EIDLbits_t __at (0xD73) RXF9EIDLbits; + +extern __sfr __at (0xD74) RXF10SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF10SIDHbits_t; +extern volatile __RXF10SIDHbits_t __at (0xD74) RXF10SIDHbits; + +extern __sfr __at (0xD75) RXF10SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF10SIDLbits_t; +extern volatile __RXF10SIDLbits_t __at (0xD75) RXF10SIDLbits; + +extern __sfr __at (0xD76) RXF10EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF10EIDHbits_t; +extern volatile __RXF10EIDHbits_t __at (0xD76) RXF10EIDHbits; + +extern __sfr __at (0xD77) RXF10EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF10EIDLbits_t; +extern volatile __RXF10EIDLbits_t __at (0xD77) RXF10EIDLbits; + +extern __sfr __at (0xD78) RXF11SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF11SIDHbits_t; +extern volatile __RXF11SIDHbits_t __at (0xD78) RXF11SIDHbits; + +extern __sfr __at (0xD79) RXF11SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF11SIDLbits_t; +extern volatile __RXF11SIDLbits_t __at (0xD79) RXF11SIDLbits; + +extern __sfr __at (0xD7A) RXF11EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF11EIDHbits_t; +extern volatile __RXF11EIDHbits_t __at (0xD7A) RXF11EIDHbits; + +extern __sfr __at (0xD7B) RXF11EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF11EIDLbits_t; +extern volatile __RXF11EIDLbits_t __at (0xD7B) RXF11EIDLbits; + +extern __sfr __at (0xD80) RXF12SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF12SIDHbits_t; +extern volatile __RXF12SIDHbits_t __at (0xD80) RXF12SIDHbits; + +extern __sfr __at (0xD81) RXF12SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF12SIDLbits_t; +extern volatile __RXF12SIDLbits_t __at (0xD81) RXF12SIDLbits; + +extern __sfr __at (0xD82) RXF12EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF12EIDHbits_t; +extern volatile __RXF12EIDHbits_t __at (0xD82) RXF12EIDHbits; + +extern __sfr __at (0xD83) RXF12EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF12EIDLbits_t; +extern volatile __RXF12EIDLbits_t __at (0xD83) RXF12EIDLbits; + +extern __sfr __at (0xD84) RXF13SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF13SIDHbits_t; +extern volatile __RXF13SIDHbits_t __at (0xD84) RXF13SIDHbits; + +extern __sfr __at (0xD85) RXF13SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF13SIDLbits_t; +extern volatile __RXF13SIDLbits_t __at (0xD85) RXF13SIDLbits; + +extern __sfr __at (0xD86) RXF13EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF13EIDHbits_t; +extern volatile __RXF13EIDHbits_t __at (0xD86) RXF13EIDHbits; + +extern __sfr __at (0xD87) RXF13EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF13EIDLbits_t; +extern volatile __RXF13EIDLbits_t __at (0xD87) RXF13EIDLbits; + +extern __sfr __at (0xD88) RXF14SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF14SIDHbits_t; +extern volatile __RXF14SIDHbits_t __at (0xD88) RXF14SIDHbits; + +extern __sfr __at (0xD89) RXF14SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF14SIDLbits_t; +extern volatile __RXF14SIDLbits_t __at (0xD89) RXF14SIDLbits; + +extern __sfr __at (0xD8A) RXF14EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF14EIDHbits_t; +extern volatile __RXF14EIDHbits_t __at (0xD8A) RXF14EIDHbits; + +extern __sfr __at (0xD8B) RXF14EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF14EIDLbits_t; +extern volatile __RXF14EIDLbits_t __at (0xD8B) RXF14EIDLbits; + +extern __sfr __at (0xD90) RXF15SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF15SIDHbits_t; +extern volatile __RXF15SIDHbits_t __at (0xD90) RXF15SIDHbits; + +extern __sfr __at (0xD91) RXF15SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF15SIDLbits_t; +extern volatile __RXF15SIDLbits_t __at (0xD91) RXF15SIDLbits; + +extern __sfr __at (0xD92) RXF15EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF15EIDHbits_t; +extern volatile __RXF15EIDHbits_t __at (0xD92) RXF15EIDHbits; + +extern __sfr __at (0xD93) RXF15EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF15EIDLbits_t; +extern volatile __RXF15EIDLbits_t __at (0xD93) RXF15EIDLbits; + +extern __sfr __at (0xDD4) RXFCON0; +typedef union { + struct { + unsigned RXF0EN : 1; + unsigned RXF1EN : 1; + unsigned RXF2EN : 1; + unsigned RXF3EN : 1; + unsigned RXF4EN : 1; + unsigned RXF5EN : 1; + unsigned RXF6EN : 1; + unsigned RXF7EN : 1; + }; +} __RXFCON0bits_t; +extern volatile __RXFCON0bits_t __at (0xDD4) RXFCON0bits; + +extern __sfr __at (0xDD5) RXFCON1; +typedef union { + struct { + unsigned RXF8EN : 1; + unsigned RXF9EN : 1; + unsigned RXF10EN : 1; + unsigned RXF11EN : 1; + unsigned RXF12EN : 1; + unsigned RXF13EN : 1; + unsigned RXF14EN : 1; + unsigned RXF15EN : 1; + }; +} __RXFCON1bits_t; +extern volatile __RXFCON1bits_t __at (0xDD5) RXFCON1bits; + +extern __sfr __at (0xDD8) SDFLC; +typedef union { + struct { + unsigned DFLC0 : 1; + unsigned DFLC1 : 1; + unsigned DFLC2 : 1; + unsigned DFLC3 : 1; + unsigned DFLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FLC0 : 1; + unsigned FLC1 : 1; + unsigned FLC2 : 1; + unsigned FLC3 : 1; + unsigned FLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SDFLCbits_t; +extern volatile __SDFLCbits_t __at (0xDD8) SDFLCbits; + +extern __sfr __at (0xDE0) RXFBCON0; +typedef union { + struct { + unsigned F0BP_0 : 1; + unsigned F0BP_1 : 1; + unsigned F0BP_2 : 1; + unsigned F0BP_3 : 1; + unsigned F1BP_0 : 1; + unsigned F1BP_1 : 1; + unsigned F1BP_2 : 1; + unsigned F1BP_3 : 1; + }; +} __RXFBCON0bits_t; +extern volatile __RXFBCON0bits_t __at (0xDE0) RXFBCON0bits; + +extern __sfr __at (0xDE1) RXFBCON1; +typedef union { + struct { + unsigned F2BP_0 : 1; + unsigned F2BP_1 : 1; + unsigned F2BP_2 : 1; + unsigned F2BP_3 : 1; + unsigned F3BP_0 : 1; + unsigned F3BP_1 : 1; + unsigned F3BP_2 : 1; + unsigned F3BP_3 : 1; + }; +} __RXFBCON1bits_t; +extern volatile __RXFBCON1bits_t __at (0xDE1) RXFBCON1bits; + +extern __sfr __at (0xDE2) RXFBCON2; +typedef union { + struct { + unsigned F4BP_0 : 1; + unsigned F4BP_1 : 1; + unsigned F4BP_2 : 1; + unsigned F4BP_3 : 1; + unsigned F5BP_0 : 1; + unsigned F5BP_1 : 1; + unsigned F5BP_2 : 1; + unsigned F5BP_3 : 1; + }; +} __RXFBCON2bits_t; +extern volatile __RXFBCON2bits_t __at (0xDE2) RXFBCON2bits; + +extern __sfr __at (0xDE3) RXFBCON3; +typedef union { + struct { + unsigned F6BP_0 : 1; + unsigned F6BP_1 : 1; + unsigned F6BP_2 : 1; + unsigned F6BP_3 : 1; + unsigned F7BP_0 : 1; + unsigned F7BP_1 : 1; + unsigned F7BP_2 : 1; + unsigned F7BP_3 : 1; + }; +} __RXFBCON3bits_t; +extern volatile __RXFBCON3bits_t __at (0xDE3) RXFBCON3bits; + +extern __sfr __at (0xDE4) RXFBCON4; +typedef union { + struct { + unsigned F8BP_0 : 1; + unsigned F8BP_1 : 1; + unsigned F8BP_2 : 1; + unsigned F8BP_3 : 1; + unsigned F9BP_0 : 1; + unsigned F9BP_1 : 1; + unsigned F9BP_2 : 1; + unsigned F9BP_3 : 1; + }; +} __RXFBCON4bits_t; +extern volatile __RXFBCON4bits_t __at (0xDE4) RXFBCON4bits; + +extern __sfr __at (0xDE5) RXFBCON5; +typedef union { + struct { + unsigned F10BP_0 : 1; + unsigned F10BP_1 : 1; + unsigned F10BP_2 : 1; + unsigned F10BP_3 : 1; + unsigned F11BP_0 : 1; + unsigned F11BP_1 : 1; + unsigned F11BP_2 : 1; + unsigned F11BP_3 : 1; + }; +} __RXFBCON5bits_t; +extern volatile __RXFBCON5bits_t __at (0xDE5) RXFBCON5bits; + +extern __sfr __at (0xDE6) RXFBCON6; +typedef union { + struct { + unsigned F12BP_0 : 1; + unsigned F12BP_1 : 1; + unsigned F12BP_2 : 1; + unsigned F12BP_3 : 1; + unsigned F13BP_0 : 1; + unsigned F13BP_1 : 1; + unsigned F13BP_2 : 1; + unsigned F13BP_3 : 1; + }; +} __RXFBCON6bits_t; +extern volatile __RXFBCON6bits_t __at (0xDE6) RXFBCON6bits; + +extern __sfr __at (0xDE7) RXFBCON7; +typedef union { + struct { + unsigned F14BP_0 : 1; + unsigned F14BP_1 : 1; + unsigned F14BP_2 : 1; + unsigned F14BP_3 : 1; + unsigned F15BP_0 : 1; + unsigned F15BP_1 : 1; + unsigned F15BP_2 : 1; + unsigned F15BP_3 : 1; + }; +} __RXFBCON7bits_t; +extern volatile __RXFBCON7bits_t __at (0xDE7) RXFBCON7bits; + +extern __sfr __at (0xDF0) MSEL0; +typedef union { + struct { + unsigned FIL0_0 : 1; + unsigned FIL0_1 : 1; + unsigned FIL1_0 : 1; + unsigned FIL1_1 : 1; + unsigned FIL2_0 : 1; + unsigned FIL2_1 : 1; + unsigned FIL3_0 : 1; + unsigned FIL3_1 : 1; + }; +} __MSEL0bits_t; +extern volatile __MSEL0bits_t __at (0xDF0) MSEL0bits; + +extern __sfr __at (0xDF1) MSEL1; +typedef union { + struct { + unsigned FIL4_0 : 1; + unsigned FIL4_1 : 1; + unsigned FIL5_0 : 1; + unsigned FIL5_1 : 1; + unsigned FIL6_0 : 1; + unsigned FIL6_1 : 1; + unsigned FIL7_0 : 1; + unsigned FIL7_1 : 1; + }; +} __MSEL1bits_t; +extern volatile __MSEL1bits_t __at (0xDF1) MSEL1bits; + +extern __sfr __at (0xDF2) MSEL2; +typedef union { + struct { + unsigned FIL8_0 : 1; + unsigned FIL8_1 : 1; + unsigned FIL9_0 : 1; + unsigned FIL9_1 : 1; + unsigned FIL10_0 : 1; + unsigned FIL10_1 : 1; + unsigned FIL11_0 : 1; + unsigned FIL11_1 : 1; + }; +} __MSEL2bits_t; +extern volatile __MSEL2bits_t __at (0xDF2) MSEL2bits; + +extern __sfr __at (0xDF3) MSEL3; +typedef union { + struct { + unsigned FIL12_0 : 1; + unsigned FIL12_1 : 1; + unsigned FIL13_0 : 1; + unsigned FIL13_1 : 1; + unsigned FIL14_0 : 1; + unsigned FIL14_1 : 1; + unsigned FIL15_0 : 1; + unsigned FIL15_1 : 1; + }; +} __MSEL3bits_t; +extern volatile __MSEL3bits_t __at (0xDF3) MSEL3bits; + +extern __sfr __at (0xDF8) BSEL0; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned B0TXEN : 1; + unsigned B1TXEN : 1; + unsigned B2TXEN : 1; + unsigned B3TXEN : 1; + unsigned B4TXEN : 1; + unsigned B5TXEN : 1; + }; +} __BSEL0bits_t; +extern volatile __BSEL0bits_t __at (0xDF8) BSEL0bits; + +extern __sfr __at (0xDFA) BIE0; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned B0IE : 1; + unsigned B1IE : 1; + unsigned B2IE : 1; + unsigned B3IE : 1; + unsigned B4IE : 1; + unsigned B5IE : 1; + }; +} __BIE0bits_t; +extern volatile __BIE0bits_t __at (0xDFA) BIE0bits; + +extern __sfr __at (0xDFC) TXBIE; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TXBIEbits_t; +extern volatile __TXBIEbits_t __at (0xDFC) TXBIEbits; + +extern __sfr __at (0xE20) B0CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B0CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0CONbits_t; +extern volatile __B0CONbits_t __at (0xE20) B0CONbits; + +extern __sfr __at (0xE21) B0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B0SIDHbits_t; +extern volatile __B0SIDHbits_t __at (0xE21) B0SIDHbits; + +extern __sfr __at (0xE22) B0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0SIDLbits_t; +extern volatile __B0SIDLbits_t __at (0xE22) B0SIDLbits; + +extern __sfr __at (0xE23) B0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B0EIDHbits_t; +extern volatile __B0EIDHbits_t __at (0xE23) B0EIDHbits; + +extern __sfr __at (0xE24) B0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B0EIDLbits_t; +extern volatile __B0EIDLbits_t __at (0xE24) B0EIDLbits; + +extern __sfr __at (0xE25) B0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B0DLC : 1; + unsigned RB1_B0DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B0DLCbits_t; +extern volatile __B0DLCbits_t __at (0xE25) B0DLCbits; + +extern __sfr __at (0xE26) B0D0; +typedef union { + struct { + unsigned B0D00 : 1; + unsigned B0D01 : 1; + unsigned B0D02 : 1; + unsigned B0D03 : 1; + unsigned B0D04 : 1; + unsigned B0D05 : 1; + unsigned B0D06 : 1; + unsigned B0D07 : 1; + }; +} __B0D0bits_t; +extern volatile __B0D0bits_t __at (0xE26) B0D0bits; + +extern __sfr __at (0xE27) B0D1; +typedef union { + struct { + unsigned B0D10 : 1; + unsigned B0D11 : 1; + unsigned B0D12 : 1; + unsigned B0D13 : 1; + unsigned B0D14 : 1; + unsigned B0D15 : 1; + unsigned B0D16 : 1; + unsigned B0D17 : 1; + }; +} __B0D1bits_t; +extern volatile __B0D1bits_t __at (0xE27) B0D1bits; + +extern __sfr __at (0xE28) B0D2; +typedef union { + struct { + unsigned B0D20 : 1; + unsigned B0D21 : 1; + unsigned B0D22 : 1; + unsigned B0D23 : 1; + unsigned B0D24 : 1; + unsigned B0D25 : 1; + unsigned B0D26 : 1; + unsigned B0D27 : 1; + }; +} __B0D2bits_t; +extern volatile __B0D2bits_t __at (0xE28) B0D2bits; + +extern __sfr __at (0xE29) B0D3; +typedef union { + struct { + unsigned B0D30 : 1; + unsigned B0D31 : 1; + unsigned B0D32 : 1; + unsigned B0D33 : 1; + unsigned B0D34 : 1; + unsigned B0D35 : 1; + unsigned B0D36 : 1; + unsigned B0D37 : 1; + }; +} __B0D3bits_t; +extern volatile __B0D3bits_t __at (0xE29) B0D3bits; + +extern __sfr __at (0xE2A) B0D4; +typedef union { + struct { + unsigned B0D40 : 1; + unsigned B0D41 : 1; + unsigned B0D42 : 1; + unsigned B0D43 : 1; + unsigned B0D44 : 1; + unsigned B0D45 : 1; + unsigned B0D46 : 1; + unsigned B0D47 : 1; + }; +} __B0D4bits_t; +extern volatile __B0D4bits_t __at (0xE2A) B0D4bits; + +extern __sfr __at (0xE2B) B0D5; +typedef union { + struct { + unsigned B0D50 : 1; + unsigned B0D51 : 1; + unsigned B0D52 : 1; + unsigned B0D53 : 1; + unsigned B0D54 : 1; + unsigned B0D55 : 1; + unsigned B0D56 : 1; + unsigned B0D57 : 1; + }; +} __B0D5bits_t; +extern volatile __B0D5bits_t __at (0xE2B) B0D5bits; + +extern __sfr __at (0xE2C) B0D6; +typedef union { + struct { + unsigned B0D60 : 1; + unsigned B0D61 : 1; + unsigned B0D62 : 1; + unsigned B0D63 : 1; + unsigned B0D64 : 1; + unsigned B0D65 : 1; + unsigned B0D66 : 1; + unsigned B0D67 : 1; + }; +} __B0D6bits_t; +extern volatile __B0D6bits_t __at (0xE2C) B0D6bits; + +extern __sfr __at (0xE2D) B0D7; +typedef union { + struct { + unsigned B0D70 : 1; + unsigned B0D71 : 1; + unsigned B0D72 : 1; + unsigned B0D73 : 1; + unsigned B0D74 : 1; + unsigned B0D75 : 1; + unsigned B0D76 : 1; + unsigned B0D77 : 1; + }; +} __B0D7bits_t; +extern volatile __B0D7bits_t __at (0xE2D) B0D7bits; + +extern __sfr __at (0xE2E) CANSTAT_RO9; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO9bits_t; +extern volatile __CANSTAT_RO9bits_t __at (0xE2E) CANSTAT_RO9bits; + +extern __sfr __at (0xE2F) CANCON_RO9; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO9bits_t; +extern volatile __CANCON_RO9bits_t __at (0xE2F) CANCON_RO9bits; + +extern __sfr __at (0xE30) B1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B1CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1CONbits_t; +extern volatile __B1CONbits_t __at (0xE30) B1CONbits; + +extern __sfr __at (0xE31) B1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B1SIDHbits_t; +extern volatile __B1SIDHbits_t __at (0xE31) B1SIDHbits; + +extern __sfr __at (0xE32) B1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1SIDLbits_t; +extern volatile __B1SIDLbits_t __at (0xE32) B1SIDLbits; + +extern __sfr __at (0xE33) B1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B1EIDHbits_t; +extern volatile __B1EIDHbits_t __at (0xE33) B1EIDHbits; + +extern __sfr __at (0xE34) B1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B1EIDLbits_t; +extern volatile __B1EIDLbits_t __at (0xE34) B1EIDLbits; + +extern __sfr __at (0xE35) B1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B1DLC : 1; + unsigned RB1_B1DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B1DLCbits_t; +extern volatile __B1DLCbits_t __at (0xE35) B1DLCbits; + +extern __sfr __at (0xE36) B1D0; +typedef union { + struct { + unsigned B1D00 : 1; + unsigned B1D01 : 1; + unsigned B1D02 : 1; + unsigned B1D03 : 1; + unsigned B1D04 : 1; + unsigned B1D05 : 1; + unsigned B1D06 : 1; + unsigned B1D07 : 1; + }; +} __B1D0bits_t; +extern volatile __B1D0bits_t __at (0xE36) B1D0bits; + +extern __sfr __at (0xE37) B1D1; +typedef union { + struct { + unsigned B1D10 : 1; + unsigned B1D11 : 1; + unsigned B1D12 : 1; + unsigned B1D13 : 1; + unsigned B1D14 : 1; + unsigned B1D15 : 1; + unsigned B1D16 : 1; + unsigned B1D17 : 1; + }; +} __B1D1bits_t; +extern volatile __B1D1bits_t __at (0xE37) B1D1bits; + +extern __sfr __at (0xE38) B1D2; +typedef union { + struct { + unsigned B1D20 : 1; + unsigned B1D21 : 1; + unsigned B1D22 : 1; + unsigned B1D23 : 1; + unsigned B1D24 : 1; + unsigned B1D25 : 1; + unsigned B1D26 : 1; + unsigned B1D27 : 1; + }; +} __B1D2bits_t; +extern volatile __B1D2bits_t __at (0xE38) B1D2bits; + +extern __sfr __at (0xE39) B1D3; +typedef union { + struct { + unsigned B1D30 : 1; + unsigned B1D31 : 1; + unsigned B1D32 : 1; + unsigned B1D33 : 1; + unsigned B1D34 : 1; + unsigned B1D35 : 1; + unsigned B1D36 : 1; + unsigned B1D37 : 1; + }; +} __B1D3bits_t; +extern volatile __B1D3bits_t __at (0xE39) B1D3bits; + +extern __sfr __at (0xE3A) B1D4; +typedef union { + struct { + unsigned B1D40 : 1; + unsigned B1D41 : 1; + unsigned B1D42 : 1; + unsigned B1D43 : 1; + unsigned B1D44 : 1; + unsigned B1D45 : 1; + unsigned B1D46 : 1; + unsigned B1D47 : 1; + }; +} __B1D4bits_t; +extern volatile __B1D4bits_t __at (0xE3A) B1D4bits; + +extern __sfr __at (0xE3B) B1D5; +typedef union { + struct { + unsigned B1D50 : 1; + unsigned B1D51 : 1; + unsigned B1D52 : 1; + unsigned B1D53 : 1; + unsigned B1D54 : 1; + unsigned B1D55 : 1; + unsigned B1D56 : 1; + unsigned B1D57 : 1; + }; +} __B1D5bits_t; +extern volatile __B1D5bits_t __at (0xE3B) B1D5bits; + +extern __sfr __at (0xE3C) B1D6; +typedef union { + struct { + unsigned B1D60 : 1; + unsigned B1D61 : 1; + unsigned B1D62 : 1; + unsigned B1D63 : 1; + unsigned B1D64 : 1; + unsigned B1D65 : 1; + unsigned B1D66 : 1; + unsigned B1D67 : 1; + }; +} __B1D6bits_t; +extern volatile __B1D6bits_t __at (0xE3C) B1D6bits; + +extern __sfr __at (0xE3D) B1D7; +typedef union { + struct { + unsigned B1D70 : 1; + unsigned B1D71 : 1; + unsigned B1D72 : 1; + unsigned B1D73 : 1; + unsigned B1D74 : 1; + unsigned B1D75 : 1; + unsigned B1D76 : 1; + unsigned B1D77 : 1; + }; +} __B1D7bits_t; +extern volatile __B1D7bits_t __at (0xE3D) B1D7bits; + +extern __sfr __at (0xE3E) CANSTAT_RO8; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO8bits_t; +extern volatile __CANSTAT_RO8bits_t __at (0xE3E) CANSTAT_RO8bits; + +extern __sfr __at (0xE3F) CANCON_RO8; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO8bits_t; +extern volatile __CANCON_RO8bits_t __at (0xE3F) CANCON_RO8bits; + +extern __sfr __at (0xE40) B2CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B2CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2CONbits_t; +extern volatile __B2CONbits_t __at (0xE40) B2CONbits; + +extern __sfr __at (0xE41) B2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B2SIDHbits_t; +extern volatile __B2SIDHbits_t __at (0xE41) B2SIDHbits; + +extern __sfr __at (0xE42) B2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2SIDLbits_t; +extern volatile __B2SIDLbits_t __at (0xE42) B2SIDLbits; + +extern __sfr __at (0xE43) B2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B2EIDHbits_t; +extern volatile __B2EIDHbits_t __at (0xE43) B2EIDHbits; + +extern __sfr __at (0xE44) B2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B2EIDLbits_t; +extern volatile __B2EIDLbits_t __at (0xE44) B2EIDLbits; + +extern __sfr __at (0xE45) B2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B2DLC : 1; + unsigned RB1_B2DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B2DLCbits_t; +extern volatile __B2DLCbits_t __at (0xE45) B2DLCbits; + +extern __sfr __at (0xE46) B2D0; +typedef union { + struct { + unsigned B2D00 : 1; + unsigned B2D01 : 1; + unsigned B2D02 : 1; + unsigned B2D03 : 1; + unsigned B2D04 : 1; + unsigned B2D05 : 1; + unsigned B2D06 : 1; + unsigned B2D07 : 1; + }; +} __B2D0bits_t; +extern volatile __B2D0bits_t __at (0xE46) B2D0bits; + +extern __sfr __at (0xE47) B2D1; +typedef union { + struct { + unsigned B2D10 : 1; + unsigned B2D11 : 1; + unsigned B2D12 : 1; + unsigned B2D13 : 1; + unsigned B2D14 : 1; + unsigned B2D15 : 1; + unsigned B2D16 : 1; + unsigned B2D17 : 1; + }; +} __B2D1bits_t; +extern volatile __B2D1bits_t __at (0xE47) B2D1bits; + +extern __sfr __at (0xE48) B2D2; +typedef union { + struct { + unsigned B2D20 : 1; + unsigned B2D21 : 1; + unsigned B2D22 : 1; + unsigned B2D23 : 1; + unsigned B2D24 : 1; + unsigned B2D25 : 1; + unsigned B2D26 : 1; + unsigned B2D27 : 1; + }; +} __B2D2bits_t; +extern volatile __B2D2bits_t __at (0xE48) B2D2bits; + +extern __sfr __at (0xE49) B2D3; +typedef union { + struct { + unsigned B2D30 : 1; + unsigned B2D31 : 1; + unsigned B2D32 : 1; + unsigned B2D33 : 1; + unsigned B2D34 : 1; + unsigned B2D35 : 1; + unsigned B2D36 : 1; + unsigned B2D37 : 1; + }; +} __B2D3bits_t; +extern volatile __B2D3bits_t __at (0xE49) B2D3bits; + +extern __sfr __at (0xE4A) B2D4; +typedef union { + struct { + unsigned B2D40 : 1; + unsigned B2D41 : 1; + unsigned B2D42 : 1; + unsigned B2D43 : 1; + unsigned B2D44 : 1; + unsigned B2D45 : 1; + unsigned B2D46 : 1; + unsigned B2D47 : 1; + }; +} __B2D4bits_t; +extern volatile __B2D4bits_t __at (0xE4A) B2D4bits; + +extern __sfr __at (0xE4B) B2D5; +typedef union { + struct { + unsigned B2D50 : 1; + unsigned B2D51 : 1; + unsigned B2D52 : 1; + unsigned B2D53 : 1; + unsigned B2D54 : 1; + unsigned B2D55 : 1; + unsigned B2D56 : 1; + unsigned B2D57 : 1; + }; +} __B2D5bits_t; +extern volatile __B2D5bits_t __at (0xE4B) B2D5bits; + +extern __sfr __at (0xE4C) B2D6; +typedef union { + struct { + unsigned B2D60 : 1; + unsigned B2D61 : 1; + unsigned B2D62 : 1; + unsigned B2D63 : 1; + unsigned B2D64 : 1; + unsigned B2D65 : 1; + unsigned B2D66 : 1; + unsigned B2D67 : 1; + }; +} __B2D6bits_t; +extern volatile __B2D6bits_t __at (0xE4C) B2D6bits; + +extern __sfr __at (0xE4D) B2D7; +typedef union { + struct { + unsigned B2D70 : 1; + unsigned B2D71 : 1; + unsigned B2D72 : 1; + unsigned B2D73 : 1; + unsigned B2D74 : 1; + unsigned B2D75 : 1; + unsigned B2D76 : 1; + unsigned B2D77 : 1; + }; +} __B2D7bits_t; +extern volatile __B2D7bits_t __at (0xE4D) B2D7bits; + +extern __sfr __at (0xE4E) CANSTAT_RO7; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO7bits_t; +extern volatile __CANSTAT_RO7bits_t __at (0xE4E) CANSTAT_RO7bits; + +extern __sfr __at (0xE4F) CANCON_RO7; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO7bits_t; +extern volatile __CANCON_RO7bits_t __at (0xE4F) CANCON_RO7bits; + +extern __sfr __at (0xE50) B3CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B3CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3CONbits_t; +extern volatile __B3CONbits_t __at (0xE50) B3CONbits; + +extern __sfr __at (0xE51) B3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B3SIDHbits_t; +extern volatile __B3SIDHbits_t __at (0xE51) B3SIDHbits; + +extern __sfr __at (0xE52) B3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3SIDLbits_t; +extern volatile __B3SIDLbits_t __at (0xE52) B3SIDLbits; + +extern __sfr __at (0xE53) B3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B3EIDHbits_t; +extern volatile __B3EIDHbits_t __at (0xE53) B3EIDHbits; + +extern __sfr __at (0xE54) B3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B3EIDLbits_t; +extern volatile __B3EIDLbits_t __at (0xE54) B3EIDLbits; + +extern __sfr __at (0xE55) B3DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B3DLC : 1; + unsigned RB1_B3DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B3DLCbits_t; +extern volatile __B3DLCbits_t __at (0xE55) B3DLCbits; + +extern __sfr __at (0xE56) B3D0; +typedef union { + struct { + unsigned B3D00 : 1; + unsigned B3D01 : 1; + unsigned B3D02 : 1; + unsigned B3D03 : 1; + unsigned B3D04 : 1; + unsigned B3D05 : 1; + unsigned B3D06 : 1; + unsigned B3D07 : 1; + }; +} __B3D0bits_t; +extern volatile __B3D0bits_t __at (0xE56) B3D0bits; + +extern __sfr __at (0xE57) B3D1; +typedef union { + struct { + unsigned B3D10 : 1; + unsigned B3D11 : 1; + unsigned B3D12 : 1; + unsigned B3D13 : 1; + unsigned B3D14 : 1; + unsigned B3D15 : 1; + unsigned B3D16 : 1; + unsigned B3D17 : 1; + }; +} __B3D1bits_t; +extern volatile __B3D1bits_t __at (0xE57) B3D1bits; + +extern __sfr __at (0xE58) B3D2; +typedef union { + struct { + unsigned B3D20 : 1; + unsigned B3D21 : 1; + unsigned B3D22 : 1; + unsigned B3D23 : 1; + unsigned B3D24 : 1; + unsigned B3D25 : 1; + unsigned B3D26 : 1; + unsigned B3D27 : 1; + }; +} __B3D2bits_t; +extern volatile __B3D2bits_t __at (0xE58) B3D2bits; + +extern __sfr __at (0xE59) B3D3; +typedef union { + struct { + unsigned B3D30 : 1; + unsigned B3D31 : 1; + unsigned B3D32 : 1; + unsigned B3D33 : 1; + unsigned B3D34 : 1; + unsigned B3D35 : 1; + unsigned B3D36 : 1; + unsigned B3D37 : 1; + }; +} __B3D3bits_t; +extern volatile __B3D3bits_t __at (0xE59) B3D3bits; + +extern __sfr __at (0xE5A) B3D4; +typedef union { + struct { + unsigned B3D40 : 1; + unsigned B3D41 : 1; + unsigned B3D42 : 1; + unsigned B3D43 : 1; + unsigned B3D44 : 1; + unsigned B3D45 : 1; + unsigned B3D46 : 1; + unsigned B3D47 : 1; + }; +} __B3D4bits_t; +extern volatile __B3D4bits_t __at (0xE5A) B3D4bits; + +extern __sfr __at (0xE5B) B3D5; +typedef union { + struct { + unsigned B3D50 : 1; + unsigned B3D51 : 1; + unsigned B3D52 : 1; + unsigned B3D53 : 1; + unsigned B3D54 : 1; + unsigned B3D55 : 1; + unsigned B3D56 : 1; + unsigned B3D57 : 1; + }; +} __B3D5bits_t; +extern volatile __B3D5bits_t __at (0xE5B) B3D5bits; + +extern __sfr __at (0xE5C) B3D6; +typedef union { + struct { + unsigned B3D60 : 1; + unsigned B3D61 : 1; + unsigned B3D62 : 1; + unsigned B3D63 : 1; + unsigned B3D64 : 1; + unsigned B3D65 : 1; + unsigned B3D66 : 1; + unsigned B3D67 : 1; + }; +} __B3D6bits_t; +extern volatile __B3D6bits_t __at (0xE5C) B3D6bits; + +extern __sfr __at (0xE5D) B3D7; +typedef union { + struct { + unsigned B3D70 : 1; + unsigned B3D71 : 1; + unsigned B3D72 : 1; + unsigned B3D73 : 1; + unsigned B3D74 : 1; + unsigned B3D75 : 1; + unsigned B3D76 : 1; + unsigned B3D77 : 1; + }; +} __B3D7bits_t; +extern volatile __B3D7bits_t __at (0xE5D) B3D7bits; + +extern __sfr __at (0xE5E) CANSTAT_RO6; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO6bits_t; +extern volatile __CANSTAT_RO6bits_t __at (0xE5E) CANSTAT_RO6bits; + +extern __sfr __at (0xE5F) CANCON_RO6; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO6bits_t; +extern volatile __CANCON_RO6bits_t __at (0xE5F) CANCON_RO6bits; + +extern __sfr __at (0xE60) B4CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B4CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4CONbits_t; +extern volatile __B4CONbits_t __at (0xE60) B4CONbits; + +extern __sfr __at (0xE61) B4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B4SIDHbits_t; +extern volatile __B4SIDHbits_t __at (0xE61) B4SIDHbits; + +extern __sfr __at (0xE62) B4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4SIDLbits_t; +extern volatile __B4SIDLbits_t __at (0xE62) B4SIDLbits; + +extern __sfr __at (0xE63) B4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B4EIDHbits_t; +extern volatile __B4EIDHbits_t __at (0xE63) B4EIDHbits; + +extern __sfr __at (0xE64) B4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B4EIDLbits_t; +extern volatile __B4EIDLbits_t __at (0xE64) B4EIDLbits; + +extern __sfr __at (0xE65) B4DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B4DLC : 1; + unsigned RB1_B4DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B4DLCbits_t; +extern volatile __B4DLCbits_t __at (0xE65) B4DLCbits; + +extern __sfr __at (0xE66) B4D0; +typedef union { + struct { + unsigned B4D00 : 1; + unsigned B4D01 : 1; + unsigned B4D02 : 1; + unsigned B4D03 : 1; + unsigned B4D04 : 1; + unsigned B4D05 : 1; + unsigned B4D06 : 1; + unsigned B4D07 : 1; + }; +} __B4D0bits_t; +extern volatile __B4D0bits_t __at (0xE66) B4D0bits; + +extern __sfr __at (0xE67) B4D1; +typedef union { + struct { + unsigned B4D10 : 1; + unsigned B4D11 : 1; + unsigned B4D12 : 1; + unsigned B4D13 : 1; + unsigned B4D14 : 1; + unsigned B4D15 : 1; + unsigned B4D16 : 1; + unsigned B4D17 : 1; + }; +} __B4D1bits_t; +extern volatile __B4D1bits_t __at (0xE67) B4D1bits; + +extern __sfr __at (0xE68) B4D2; +typedef union { + struct { + unsigned B4D20 : 1; + unsigned B4D21 : 1; + unsigned B4D22 : 1; + unsigned B4D23 : 1; + unsigned B4D24 : 1; + unsigned B4D25 : 1; + unsigned B4D26 : 1; + unsigned B4D27 : 1; + }; +} __B4D2bits_t; +extern volatile __B4D2bits_t __at (0xE68) B4D2bits; + +extern __sfr __at (0xE69) B4D3; +typedef union { + struct { + unsigned B4D30 : 1; + unsigned B4D31 : 1; + unsigned B4D32 : 1; + unsigned B4D33 : 1; + unsigned B4D34 : 1; + unsigned B4D35 : 1; + unsigned B4D36 : 1; + unsigned B4D37 : 1; + }; +} __B4D3bits_t; +extern volatile __B4D3bits_t __at (0xE69) B4D3bits; + +extern __sfr __at (0xE6A) B4D4; +typedef union { + struct { + unsigned B4D40 : 1; + unsigned B4D41 : 1; + unsigned B4D42 : 1; + unsigned B4D43 : 1; + unsigned B4D44 : 1; + unsigned B4D45 : 1; + unsigned B4D46 : 1; + unsigned B4D47 : 1; + }; +} __B4D4bits_t; +extern volatile __B4D4bits_t __at (0xE6A) B4D4bits; + +extern __sfr __at (0xE6B) B4D5; +typedef union { + struct { + unsigned B4D50 : 1; + unsigned B4D51 : 1; + unsigned B4D52 : 1; + unsigned B4D53 : 1; + unsigned B4D54 : 1; + unsigned B4D55 : 1; + unsigned B4D56 : 1; + unsigned B4D57 : 1; + }; +} __B4D5bits_t; +extern volatile __B4D5bits_t __at (0xE6B) B4D5bits; + +extern __sfr __at (0xE6C) B4D6; +typedef union { + struct { + unsigned B4D60 : 1; + unsigned B4D61 : 1; + unsigned B4D62 : 1; + unsigned B4D63 : 1; + unsigned B4D64 : 1; + unsigned B4D65 : 1; + unsigned B4D66 : 1; + unsigned B4D67 : 1; + }; +} __B4D6bits_t; +extern volatile __B4D6bits_t __at (0xE6C) B4D6bits; + +extern __sfr __at (0xE6D) B4D7; +typedef union { + struct { + unsigned B4D70 : 1; + unsigned B4D71 : 1; + unsigned B4D72 : 1; + unsigned B4D73 : 1; + unsigned B4D74 : 1; + unsigned B4D75 : 1; + unsigned B4D76 : 1; + unsigned B46D77 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B4D77 : 1; + }; +} __B4D7bits_t; +extern volatile __B4D7bits_t __at (0xE6D) B4D7bits; + +extern __sfr __at (0xE6E) CANSTAT_RO5; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO5bits_t; +extern volatile __CANSTAT_RO5bits_t __at (0xE6E) CANSTAT_RO5bits; + +extern __sfr __at (0xE6F) CANCON_RO5; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO5bits_t; +extern volatile __CANCON_RO5bits_t __at (0xE6F) CANCON_RO5bits; + +extern __sfr __at (0xE70) B5CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B5CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5CONbits_t; +extern volatile __B5CONbits_t __at (0xE70) B5CONbits; + +extern __sfr __at (0xE71) B5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B5SIDHbits_t; +extern volatile __B5SIDHbits_t __at (0xE71) B5SIDHbits; + +extern __sfr __at (0xE72) B5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5SIDLbits_t; +extern volatile __B5SIDLbits_t __at (0xE72) B5SIDLbits; + +extern __sfr __at (0xE73) B5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B5EIDHbits_t; +extern volatile __B5EIDHbits_t __at (0xE73) B5EIDHbits; + +extern __sfr __at (0xE74) B5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B5EIDLbits_t; +extern volatile __B5EIDLbits_t __at (0xE74) B5EIDLbits; + +extern __sfr __at (0xE75) B5DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B5DLC : 1; + unsigned RB1_B5DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5DLCbits_t; +extern volatile __B5DLCbits_t __at (0xE75) B5DLCbits; + +extern __sfr __at (0xE76) B5D0; +typedef union { + struct { + unsigned B5D00 : 1; + unsigned B5D01 : 1; + unsigned B5D02 : 1; + unsigned B5D03 : 1; + unsigned B5D04 : 1; + unsigned B5D05 : 1; + unsigned B5D06 : 1; + unsigned B57D07 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D07 : 1; + }; +} __B5D0bits_t; +extern volatile __B5D0bits_t __at (0xE76) B5D0bits; + +extern __sfr __at (0xE77) B5D1; +typedef union { + struct { + unsigned B5D10 : 1; + unsigned B5D11 : 1; + unsigned B5D12 : 1; + unsigned B5D13 : 1; + unsigned B5D14 : 1; + unsigned B5D15 : 1; + unsigned B5D16 : 1; + unsigned B5D17 : 1; + }; +} __B5D1bits_t; +extern volatile __B5D1bits_t __at (0xE77) B5D1bits; + +extern __sfr __at (0xE78) B5D2; +typedef union { + struct { + unsigned B5D20 : 1; + unsigned B5D21 : 1; + unsigned B5D22 : 1; + unsigned B57D23 : 1; + unsigned B5D24 : 1; + unsigned B5D25 : 1; + unsigned B5D26 : 1; + unsigned B5D27 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D23 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5D2bits_t; +extern volatile __B5D2bits_t __at (0xE78) B5D2bits; + +extern __sfr __at (0xE79) B5D3; +typedef union { + struct { + unsigned B5D30 : 1; + unsigned B5D31 : 1; + unsigned B5D32 : 1; + unsigned B5D33 : 1; + unsigned B5D34 : 1; + unsigned B5D35 : 1; + unsigned B5D36 : 1; + unsigned B5D37 : 1; + }; +} __B5D3bits_t; +extern volatile __B5D3bits_t __at (0xE79) B5D3bits; + +extern __sfr __at (0xE7A) B5D4; +typedef union { + struct { + unsigned B5D40 : 1; + unsigned B5D41 : 1; + unsigned B5D42 : 1; + unsigned B5D43 : 1; + unsigned B5D44 : 1; + unsigned B5D45 : 1; + unsigned B5D46 : 1; + unsigned B5D47 : 1; + }; +} __B5D4bits_t; +extern volatile __B5D4bits_t __at (0xE7A) B5D4bits; + +extern __sfr __at (0xE7B) B5D5; +typedef union { + struct { + unsigned B5D50 : 1; + unsigned B5D51 : 1; + unsigned B5D52 : 1; + unsigned B5D53 : 1; + unsigned B5D54 : 1; + unsigned B5D55 : 1; + unsigned B5D56 : 1; + unsigned B5D57 : 1; + }; +} __B5D5bits_t; +extern volatile __B5D5bits_t __at (0xE7B) B5D5bits; + +extern __sfr __at (0xE7C) B5D6; +typedef union { + struct { + unsigned B5D60 : 1; + unsigned B5D61 : 1; + unsigned B5D62 : 1; + unsigned B5D63 : 1; + unsigned B5D64 : 1; + unsigned B5D65 : 1; + unsigned B5D66 : 1; + unsigned B5D67 : 1; + }; +} __B5D6bits_t; +extern volatile __B5D6bits_t __at (0xE7C) B5D6bits; + +extern __sfr __at (0xE7D) B5D7; +typedef union { + struct { + unsigned B5D70 : 1; + unsigned B5D71 : 1; + unsigned B5D72 : 1; + unsigned B5D73 : 1; + unsigned B5D74 : 1; + unsigned B5D75 : 1; + unsigned B5D76 : 1; + unsigned B5D77 : 1; + }; +} __B5D7bits_t; +extern volatile __B5D7bits_t __at (0xE7D) B5D7bits; + +extern __sfr __at (0xE7E) CANSTAT_RO4; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO4bits_t; +extern volatile __CANSTAT_RO4bits_t __at (0xE7E) CANSTAT_RO4bits; + +extern __sfr __at (0xE7F) CANCON_RO4; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO4bits_t; +extern volatile __CANCON_RO4bits_t __at (0xE7F) CANCON_RO4bits; + +extern __sfr __at (0xF00) RXF0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF0SIDHbits_t; +extern volatile __RXF0SIDHbits_t __at (0xF00) RXF0SIDHbits; + +extern __sfr __at (0xF01) RXF0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF0SIDLbits_t; +extern volatile __RXF0SIDLbits_t __at (0xF01) RXF0SIDLbits; + +extern __sfr __at (0xF02) RXF0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF0EIDHbits_t; +extern volatile __RXF0EIDHbits_t __at (0xF02) RXF0EIDHbits; + +extern __sfr __at (0xF03) RXF0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF0EIDLbits_t; +extern volatile __RXF0EIDLbits_t __at (0xF03) RXF0EIDLbits; + +extern __sfr __at (0xF04) RXF1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF1SIDHbits_t; +extern volatile __RXF1SIDHbits_t __at (0xF04) RXF1SIDHbits; + +extern __sfr __at (0xF05) RXF1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF1SIDLbits_t; +extern volatile __RXF1SIDLbits_t __at (0xF05) RXF1SIDLbits; + +extern __sfr __at (0xF06) RXF1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF1EIDHbits_t; +extern volatile __RXF1EIDHbits_t __at (0xF06) RXF1EIDHbits; + +extern __sfr __at (0xF07) RXF1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF1EIDLbits_t; +extern volatile __RXF1EIDLbits_t __at (0xF07) RXF1EIDLbits; + +extern __sfr __at (0xF08) RXF2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF2SIDHbits_t; +extern volatile __RXF2SIDHbits_t __at (0xF08) RXF2SIDHbits; + +extern __sfr __at (0xF09) RXF2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF2SIDLbits_t; +extern volatile __RXF2SIDLbits_t __at (0xF09) RXF2SIDLbits; + +extern __sfr __at (0xF0A) RXF2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF2EIDHbits_t; +extern volatile __RXF2EIDHbits_t __at (0xF0A) RXF2EIDHbits; + +extern __sfr __at (0xF0B) RXF2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF2EIDLbits_t; +extern volatile __RXF2EIDLbits_t __at (0xF0B) RXF2EIDLbits; + +extern __sfr __at (0xF0C) RXF3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF3SIDHbits_t; +extern volatile __RXF3SIDHbits_t __at (0xF0C) RXF3SIDHbits; + +extern __sfr __at (0xF0D) RXF3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF3SIDLbits_t; +extern volatile __RXF3SIDLbits_t __at (0xF0D) RXF3SIDLbits; + +extern __sfr __at (0xF0E) RXF3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF3EIDHbits_t; +extern volatile __RXF3EIDHbits_t __at (0xF0E) RXF3EIDHbits; + +extern __sfr __at (0xF0F) RXF3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF3EIDLbits_t; +extern volatile __RXF3EIDLbits_t __at (0xF0F) RXF3EIDLbits; + +extern __sfr __at (0xF10) RXF4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF4SIDHbits_t; +extern volatile __RXF4SIDHbits_t __at (0xF10) RXF4SIDHbits; + +extern __sfr __at (0xF11) RXF4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF4SIDLbits_t; +extern volatile __RXF4SIDLbits_t __at (0xF11) RXF4SIDLbits; + +extern __sfr __at (0xF12) RXF4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF4EIDHbits_t; +extern volatile __RXF4EIDHbits_t __at (0xF12) RXF4EIDHbits; + +extern __sfr __at (0xF13) RXF4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF4EIDLbits_t; +extern volatile __RXF4EIDLbits_t __at (0xF13) RXF4EIDLbits; + +extern __sfr __at (0xF14) RXF5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF5SIDHbits_t; +extern volatile __RXF5SIDHbits_t __at (0xF14) RXF5SIDHbits; + +extern __sfr __at (0xF15) RXF5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF5SIDLbits_t; +extern volatile __RXF5SIDLbits_t __at (0xF15) RXF5SIDLbits; + +extern __sfr __at (0xF16) RXF5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF5EIDHbits_t; +extern volatile __RXF5EIDHbits_t __at (0xF16) RXF5EIDHbits; + +extern __sfr __at (0xF17) RXF5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF5EIDLbits_t; +extern volatile __RXF5EIDLbits_t __at (0xF17) RXF5EIDLbits; + +extern __sfr __at (0xF18) RXM0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM0SIDHbits_t; +extern volatile __RXM0SIDHbits_t __at (0xF18) RXM0SIDHbits; + +extern __sfr __at (0xF19) RXM0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM0SIDLbits_t; +extern volatile __RXM0SIDLbits_t __at (0xF19) RXM0SIDLbits; + +extern __sfr __at (0xF1A) RXM0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM0EIDHbits_t; +extern volatile __RXM0EIDHbits_t __at (0xF1A) RXM0EIDHbits; + +extern __sfr __at (0xF1B) RXM0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM0EIDLbits_t; +extern volatile __RXM0EIDLbits_t __at (0xF1B) RXM0EIDLbits; + +extern __sfr __at (0xF1C) RXM1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM1SIDHbits_t; +extern volatile __RXM1SIDHbits_t __at (0xF1C) RXM1SIDHbits; + +extern __sfr __at (0xF1D) RXM1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM1SIDLbits_t; +extern volatile __RXM1SIDLbits_t __at (0xF1D) RXM1SIDLbits; + +extern __sfr __at (0xF1E) RXM1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM1EIDHbits_t; +extern volatile __RXM1EIDHbits_t __at (0xF1E) RXM1EIDHbits; + +extern __sfr __at (0xF1F) RXM1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM1EIDLbits_t; +extern volatile __RXM1EIDLbits_t __at (0xF1F) RXM1EIDLbits; + +extern __sfr __at (0xF20) TXB2CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFBXB2CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB2CONbits_t; +extern volatile __TXB2CONbits_t __at (0xF20) TXB2CONbits; + +extern __sfr __at (0xF21) TXB2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB2SIDHbits_t; +extern volatile __TXB2SIDHbits_t __at (0xF21) TXB2SIDHbits; + +extern __sfr __at (0xF22) TXB2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB2SIDLbits_t; +extern volatile __TXB2SIDLbits_t __at (0xF22) TXB2SIDLbits; + +extern __sfr __at (0xF23) TXB2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB2EIDHbits_t; +extern volatile __TXB2EIDHbits_t __at (0xF23) TXB2EIDHbits; + +extern __sfr __at (0xF24) TXB2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB2EIDLbits_t; +extern volatile __TXB2EIDLbits_t __at (0xF24) TXB2EIDLbits; + +extern __sfr __at (0xF25) TXB2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB2DLCbits_t; +extern volatile __TXB2DLCbits_t __at (0xF25) TXB2DLCbits; + +extern __sfr __at (0xF26) TXB2D0; +typedef union { + struct { + unsigned TXB2D00 : 1; + unsigned TXB2D01 : 1; + unsigned TXB2D02 : 1; + unsigned TXB2D03 : 1; + unsigned TXB2D04 : 1; + unsigned TXB2D05 : 1; + unsigned TXB2D06 : 1; + unsigned TXB2D07 : 1; + }; +} __TXB2D0bits_t; +extern volatile __TXB2D0bits_t __at (0xF26) TXB2D0bits; + +extern __sfr __at (0xF27) TXB2D1; +typedef union { + struct { + unsigned TXB2D10 : 1; + unsigned TXB2D11 : 1; + unsigned TXB2D12 : 1; + unsigned TXB2D13 : 1; + unsigned TXB2D14 : 1; + unsigned TXB2D15 : 1; + unsigned TXB2D16 : 1; + unsigned TXB2D17 : 1; + }; +} __TXB2D1bits_t; +extern volatile __TXB2D1bits_t __at (0xF27) TXB2D1bits; + +extern __sfr __at (0xF28) TXB2D2; +typedef union { + struct { + unsigned TXB2D20 : 1; + unsigned TXB2D21 : 1; + unsigned TXB2D22 : 1; + unsigned TXB2D23 : 1; + unsigned TXB2D24 : 1; + unsigned TXB2D25 : 1; + unsigned TXB2D26 : 1; + unsigned TXB2D27 : 1; + }; +} __TXB2D2bits_t; +extern volatile __TXB2D2bits_t __at (0xF28) TXB2D2bits; + +extern __sfr __at (0xF29) TXB2D3; +typedef union { + struct { + unsigned TXB2D30 : 1; + unsigned TXB2D31 : 1; + unsigned TXB2D32 : 1; + unsigned TXB2D33 : 1; + unsigned TXB2D34 : 1; + unsigned TXB2D35 : 1; + unsigned TXB2D36 : 1; + unsigned TXB2D37 : 1; + }; +} __TXB2D3bits_t; +extern volatile __TXB2D3bits_t __at (0xF29) TXB2D3bits; + +extern __sfr __at (0xF2A) TXB2D4; +typedef union { + struct { + unsigned TXB2D40 : 1; + unsigned TXB2D41 : 1; + unsigned TXB2D42 : 1; + unsigned TXB2D43 : 1; + unsigned TXB2D44 : 1; + unsigned TXB2D45 : 1; + unsigned TXB2D46 : 1; + unsigned TXB2D47 : 1; + }; +} __TXB2D4bits_t; +extern volatile __TXB2D4bits_t __at (0xF2A) TXB2D4bits; + +extern __sfr __at (0xF2B) TXB2D5; +typedef union { + struct { + unsigned TXB2D50 : 1; + unsigned TXB2D51 : 1; + unsigned TXB2D52 : 1; + unsigned TXB2D53 : 1; + unsigned TXB2D54 : 1; + unsigned TXB2D55 : 1; + unsigned TXB2D56 : 1; + unsigned TXB2D57 : 1; + }; +} __TXB2D5bits_t; +extern volatile __TXB2D5bits_t __at (0xF2B) TXB2D5bits; + +extern __sfr __at (0xF2C) TXB2D6; +typedef union { + struct { + unsigned TXB2D60 : 1; + unsigned TXB2D61 : 1; + unsigned TXB2D62 : 1; + unsigned TXB2D63 : 1; + unsigned TXB2D64 : 1; + unsigned TXB2D65 : 1; + unsigned TXB2D66 : 1; + unsigned TXB2D67 : 1; + }; +} __TXB2D6bits_t; +extern volatile __TXB2D6bits_t __at (0xF2C) TXB2D6bits; + +extern __sfr __at (0xF2D) TXB2D7; +typedef union { + struct { + unsigned TXB2D70 : 1; + unsigned TXB2D71 : 1; + unsigned TXB2D72 : 1; + unsigned TXB2D73 : 1; + unsigned TXB2D74 : 1; + unsigned TXB2D75 : 1; + unsigned TXB2D76 : 1; + unsigned TXB2D77 : 1; + }; +} __TXB2D7bits_t; +extern volatile __TXB2D7bits_t __at (0xF2D) TXB2D7bits; + +extern __sfr __at (0xF2E) CANSTAT_RO3; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO3bits_t; +extern volatile __CANSTAT_RO3bits_t __at (0xF2E) CANSTAT_RO3bits; + +extern __sfr __at (0xF2F) CANCON_RO3; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO3bits_t; +extern volatile __CANCON_RO3bits_t __at (0xF2F) CANCON_RO3bits; + +extern __sfr __at (0xF30) TXB1CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFTXB1CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB1CONbits_t; +extern volatile __TXB1CONbits_t __at (0xF30) TXB1CONbits; + +extern __sfr __at (0xF31) TXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB1SIDHbits_t; +extern volatile __TXB1SIDHbits_t __at (0xF31) TXB1SIDHbits; + +extern __sfr __at (0xF32) TXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB1SIDLbits_t; +extern volatile __TXB1SIDLbits_t __at (0xF32) TXB1SIDLbits; + +extern __sfr __at (0xF33) TXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB1EIDHbits_t; +extern volatile __TXB1EIDHbits_t __at (0xF33) TXB1EIDHbits; + +extern __sfr __at (0xF34) TXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB1EIDLbits_t; +extern volatile __TXB1EIDLbits_t __at (0xF34) TXB1EIDLbits; + +extern __sfr __at (0xF35) TXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB1DLCbits_t; +extern volatile __TXB1DLCbits_t __at (0xF35) TXB1DLCbits; + +extern __sfr __at (0xF36) TXB1D0; +typedef union { + struct { + unsigned TXB1D00 : 1; + unsigned TXB1D01 : 1; + unsigned TXB1D02 : 1; + unsigned TXB1D03 : 1; + unsigned TXB1D04 : 1; + unsigned TXB1D05 : 1; + unsigned TXB1D06 : 1; + unsigned TXB1D07 : 1; + }; +} __TXB1D0bits_t; +extern volatile __TXB1D0bits_t __at (0xF36) TXB1D0bits; + +extern __sfr __at (0xF37) TXB1D1; +typedef union { + struct { + unsigned TXB1D10 : 1; + unsigned TXB1D11 : 1; + unsigned TXB1D12 : 1; + unsigned TXB1D13 : 1; + unsigned TXB1D14 : 1; + unsigned TXB1D15 : 1; + unsigned TXB1D16 : 1; + unsigned TXB1D17 : 1; + }; +} __TXB1D1bits_t; +extern volatile __TXB1D1bits_t __at (0xF37) TXB1D1bits; + +extern __sfr __at (0xF38) TXB1D2; +typedef union { + struct { + unsigned TXB1D20 : 1; + unsigned TXB1D21 : 1; + unsigned TXB1D22 : 1; + unsigned TXB1D23 : 1; + unsigned TXB1D24 : 1; + unsigned TXB1D25 : 1; + unsigned TXB1D26 : 1; + unsigned TXB1D27 : 1; + }; +} __TXB1D2bits_t; +extern volatile __TXB1D2bits_t __at (0xF38) TXB1D2bits; + +extern __sfr __at (0xF39) TXB1D3; +typedef union { + struct { + unsigned TXB1D30 : 1; + unsigned TXB1D31 : 1; + unsigned TXB1D32 : 1; + unsigned TXB1D33 : 1; + unsigned TXB1D34 : 1; + unsigned TXB1D35 : 1; + unsigned TXB1D36 : 1; + unsigned TXB1D37 : 1; + }; +} __TXB1D3bits_t; +extern volatile __TXB1D3bits_t __at (0xF39) TXB1D3bits; + +extern __sfr __at (0xF3A) TXB1D4; +typedef union { + struct { + unsigned TXB1D40 : 1; + unsigned TXB1D41 : 1; + unsigned TXB1D42 : 1; + unsigned TXB1D43 : 1; + unsigned TXB1D44 : 1; + unsigned TXB1D45 : 1; + unsigned TXB1D46 : 1; + unsigned TXB1D47 : 1; + }; +} __TXB1D4bits_t; +extern volatile __TXB1D4bits_t __at (0xF3A) TXB1D4bits; + +extern __sfr __at (0xF3B) TXB1D5; +typedef union { + struct { + unsigned TXB1D50 : 1; + unsigned TXB1D51 : 1; + unsigned TXB1D52 : 1; + unsigned TXB1D53 : 1; + unsigned TXB1D54 : 1; + unsigned TXB1D55 : 1; + unsigned TXB1D56 : 1; + unsigned TXB1D57 : 1; + }; +} __TXB1D5bits_t; +extern volatile __TXB1D5bits_t __at (0xF3B) TXB1D5bits; + +extern __sfr __at (0xF3C) TXB1D6; +typedef union { + struct { + unsigned TXB1D60 : 1; + unsigned TXB1D61 : 1; + unsigned TXB1D62 : 1; + unsigned TXB1D63 : 1; + unsigned TXB1D64 : 1; + unsigned TXB1D65 : 1; + unsigned TXB1D66 : 1; + unsigned TXB1D67 : 1; + }; +} __TXB1D6bits_t; +extern volatile __TXB1D6bits_t __at (0xF3C) TXB1D6bits; + +extern __sfr __at (0xF3D) TXB1D7; +typedef union { + struct { + unsigned TXB1D70 : 1; + unsigned TXB1D71 : 1; + unsigned TXB1D72 : 1; + unsigned TXB1D73 : 1; + unsigned TXB1D74 : 1; + unsigned TXB1D75 : 1; + unsigned TXB1D76 : 1; + unsigned TXB1D77 : 1; + }; +} __TXB1D7bits_t; +extern volatile __TXB1D7bits_t __at (0xF3D) TXB1D7bits; + +extern __sfr __at (0xF3E) CANSTAT_RO2; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO2bits_t; +extern volatile __CANSTAT_RO2bits_t __at (0xF3E) CANSTAT_RO2bits; + +extern __sfr __at (0xF3F) CANCON_RO2; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO2bits_t; +extern volatile __CANCON_RO2bits_t __at (0xF3F) CANCON_RO2bits; + +extern __sfr __at (0xF40) TXB0CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; +} __TXB0CONbits_t; +extern volatile __TXB0CONbits_t __at (0xF40) TXB0CONbits; + +extern __sfr __at (0xF41) TXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB0SIDHbits_t; +extern volatile __TXB0SIDHbits_t __at (0xF41) TXB0SIDHbits; + +extern __sfr __at (0xF42) TXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB0SIDLbits_t; +extern volatile __TXB0SIDLbits_t __at (0xF42) TXB0SIDLbits; + +extern __sfr __at (0xF43) TXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB0EIDHbits_t; +extern volatile __TXB0EIDHbits_t __at (0xF43) TXB0EIDHbits; + +extern __sfr __at (0xF44) TXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB0EIDLbits_t; +extern volatile __TXB0EIDLbits_t __at (0xF44) TXB0EIDLbits; + +extern __sfr __at (0xF45) TXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB0DLCbits_t; +extern volatile __TXB0DLCbits_t __at (0xF45) TXB0DLCbits; + +extern __sfr __at (0xF46) TXB0D0; +typedef union { + struct { + unsigned TXB0D00 : 1; + unsigned TXB0D01 : 1; + unsigned TXB0D02 : 1; + unsigned TXB0D03 : 1; + unsigned TXB0D04 : 1; + unsigned TXB0D05 : 1; + unsigned TXB0D06 : 1; + unsigned TXB0D07 : 1; + }; +} __TXB0D0bits_t; +extern volatile __TXB0D0bits_t __at (0xF46) TXB0D0bits; + +extern __sfr __at (0xF47) TXB0D1; +typedef union { + struct { + unsigned TXB0D10 : 1; + unsigned TXB0D11 : 1; + unsigned TXB0D12 : 1; + unsigned TXB0D13 : 1; + unsigned TXB0D14 : 1; + unsigned TXB0D15 : 1; + unsigned TXB0D16 : 1; + unsigned TXB0D17 : 1; + }; +} __TXB0D1bits_t; +extern volatile __TXB0D1bits_t __at (0xF47) TXB0D1bits; + +extern __sfr __at (0xF48) TXB0D2; +typedef union { + struct { + unsigned TXB0D20 : 1; + unsigned TXB0D21 : 1; + unsigned TXB0D22 : 1; + unsigned TXB0D23 : 1; + unsigned TXB0D24 : 1; + unsigned TXB0D25 : 1; + unsigned TXB0D26 : 1; + unsigned TXB0D27 : 1; + }; +} __TXB0D2bits_t; +extern volatile __TXB0D2bits_t __at (0xF48) TXB0D2bits; + +extern __sfr __at (0xF49) TXB0D3; +typedef union { + struct { + unsigned TXB0D30 : 1; + unsigned TXB0D31 : 1; + unsigned TXB0D32 : 1; + unsigned TXB0D33 : 1; + unsigned TXB0D34 : 1; + unsigned TXB0D35 : 1; + unsigned TXB0D36 : 1; + unsigned TXB0D37 : 1; + }; +} __TXB0D3bits_t; +extern volatile __TXB0D3bits_t __at (0xF49) TXB0D3bits; + +extern __sfr __at (0xF4A) TXB0D4; +typedef union { + struct { + unsigned TXB0D40 : 1; + unsigned TXB0D41 : 1; + unsigned TXB0D42 : 1; + unsigned TXB0D43 : 1; + unsigned TXB0D44 : 1; + unsigned TXB0D45 : 1; + unsigned TXB0D46 : 1; + unsigned TXB0D47 : 1; + }; +} __TXB0D4bits_t; +extern volatile __TXB0D4bits_t __at (0xF4A) TXB0D4bits; + +extern __sfr __at (0xF4B) TXB0D5; +typedef union { + struct { + unsigned TXB0D50 : 1; + unsigned TXB0D51 : 1; + unsigned TXB0D52 : 1; + unsigned TXB0D53 : 1; + unsigned TXB0D54 : 1; + unsigned TXB0D55 : 1; + unsigned TXB0D56 : 1; + unsigned TXB0D57 : 1; + }; +} __TXB0D5bits_t; +extern volatile __TXB0D5bits_t __at (0xF4B) TXB0D5bits; + +extern __sfr __at (0xF4C) TXB0D6; +typedef union { + struct { + unsigned TXB0D60 : 1; + unsigned TXB0D61 : 1; + unsigned TXB0D62 : 1; + unsigned TXB0D63 : 1; + unsigned TXB0D64 : 1; + unsigned TXB0D65 : 1; + unsigned TXB0D66 : 1; + unsigned TXB0D67 : 1; + }; +} __TXB0D6bits_t; +extern volatile __TXB0D6bits_t __at (0xF4C) TXB0D6bits; + +extern __sfr __at (0xF4D) TXB0D7; +typedef union { + struct { + unsigned TXB0D70 : 1; + unsigned TXB0D71 : 1; + unsigned TXB0D72 : 1; + unsigned TXB0D73 : 1; + unsigned TXB0D74 : 1; + unsigned TXB0D75 : 1; + unsigned TXB0D76 : 1; + unsigned TXB0D77 : 1; + }; +} __TXB0D7bits_t; +extern volatile __TXB0D7bits_t __at (0xF4D) TXB0D7bits; + +extern __sfr __at (0xF4E) CANSTAT_RO1; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO1bits_t; +extern volatile __CANSTAT_RO1bits_t __at (0xF4E) CANSTAT_RO1bits; + +extern __sfr __at (0xF4F) CANCON_RO1; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO1bits_t; +extern volatile __CANCON_RO1bits_t __at (0xF4F) CANCON_RO1bits; + +extern __sfr __at (0xF50) RXB1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned RXRTRRO_RXB1CON : 1; + unsigned FILHIT4 : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned FILHIT3 : 1; + unsigned : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1CONbits_t; +extern volatile __RXB1CONbits_t __at (0xF50) RXB1CONbits; + +extern __sfr __at (0xF51) RXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB1SIDHbits_t; +extern volatile __RXB1SIDHbits_t __at (0xF51) RXB1SIDHbits; + +extern __sfr __at (0xF52) RXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB1SIDLbits_t; +extern volatile __RXB1SIDLbits_t __at (0xF52) RXB1SIDLbits; + +extern __sfr __at (0xF53) RXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB1EIDHbits_t; +extern volatile __RXB1EIDHbits_t __at (0xF53) RXB1EIDHbits; + +extern __sfr __at (0xF54) RXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB1EIDLbits_t; +extern volatile __RXB1EIDLbits_t __at (0xF54) RXB1EIDLbits; + +extern __sfr __at (0xF55) RXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB1DLC : 1; + unsigned RB1_RXB1DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1DLCbits_t; +extern volatile __RXB1DLCbits_t __at (0xF55) RXB1DLCbits; + +extern __sfr __at (0xF56) RXB1D0; +typedef union { + struct { + unsigned RXB1D00 : 1; + unsigned RXB1D01 : 1; + unsigned RXB1D02 : 1; + unsigned RXB1D03 : 1; + unsigned RXB1D04 : 1; + unsigned RXB1D05 : 1; + unsigned RXB1D06 : 1; + unsigned RXB1D07 : 1; + }; +} __RXB1D0bits_t; +extern volatile __RXB1D0bits_t __at (0xF56) RXB1D0bits; + +extern __sfr __at (0xF57) RXB1D1; +typedef union { + struct { + unsigned RXB1D10 : 1; + unsigned RXB1D11 : 1; + unsigned RXB1D12 : 1; + unsigned RXB1D13 : 1; + unsigned RXB1D14 : 1; + unsigned RXB1D15 : 1; + unsigned RXB1D16 : 1; + unsigned RXB1D17 : 1; + }; +} __RXB1D1bits_t; +extern volatile __RXB1D1bits_t __at (0xF57) RXB1D1bits; + +extern __sfr __at (0xF58) RXB1D2; +typedef union { + struct { + unsigned RXB1D20 : 1; + unsigned RXB1D21 : 1; + unsigned RXB1D22 : 1; + unsigned RXB1D23 : 1; + unsigned RXB1D24 : 1; + unsigned RXB1D25 : 1; + unsigned RXB1D26 : 1; + unsigned RXB1D27 : 1; + }; +} __RXB1D2bits_t; +extern volatile __RXB1D2bits_t __at (0xF58) RXB1D2bits; + +extern __sfr __at (0xF59) RXB1D3; +typedef union { + struct { + unsigned RXB1D30 : 1; + unsigned RXB1D31 : 1; + unsigned RXB1D32 : 1; + unsigned RXB1D33 : 1; + unsigned RXB1D34 : 1; + unsigned RXB1D35 : 1; + unsigned RXB1D36 : 1; + unsigned RXB1D37 : 1; + }; +} __RXB1D3bits_t; +extern volatile __RXB1D3bits_t __at (0xF59) RXB1D3bits; + +extern __sfr __at (0xF5A) RXB1D4; +typedef union { + struct { + unsigned RXB1D40 : 1; + unsigned RXB1D41 : 1; + unsigned RXB1D42 : 1; + unsigned RXB1D43 : 1; + unsigned RXB1D44 : 1; + unsigned RXB1D45 : 1; + unsigned RXB1D46 : 1; + unsigned RXB1D47 : 1; + }; +} __RXB1D4bits_t; +extern volatile __RXB1D4bits_t __at (0xF5A) RXB1D4bits; + +extern __sfr __at (0xF5B) RXB1D5; +typedef union { + struct { + unsigned RXB1D50 : 1; + unsigned RXB1D51 : 1; + unsigned RXB1D52 : 1; + unsigned RXB1D53 : 1; + unsigned RXB1D54 : 1; + unsigned RXB1D55 : 1; + unsigned RXB1D56 : 1; + unsigned RXB1D57 : 1; + }; +} __RXB1D5bits_t; +extern volatile __RXB1D5bits_t __at (0xF5B) RXB1D5bits; + +extern __sfr __at (0xF5C) RXB1D6; +typedef union { + struct { + unsigned RXB1D60 : 1; + unsigned RXB1D61 : 1; + unsigned RXB1D62 : 1; + unsigned RXB1D63 : 1; + unsigned RXB1D64 : 1; + unsigned RXB1D65 : 1; + unsigned RXB1D66 : 1; + unsigned RXB1D67 : 1; + }; +} __RXB1D6bits_t; +extern volatile __RXB1D6bits_t __at (0xF5C) RXB1D6bits; + +extern __sfr __at (0xF5D) RXB1D7; +typedef union { + struct { + unsigned RXB1D70 : 1; + unsigned RXB1D71 : 1; + unsigned RXB1D72 : 1; + unsigned RXB1D73 : 1; + unsigned RXB1D74 : 1; + unsigned RXB1D75 : 1; + unsigned RXB1D76 : 1; + unsigned RXB1D77 : 1; + }; +} __RXB1D7bits_t; +extern volatile __RXB1D7bits_t __at (0xF5D) RXB1D7bits; + +extern __sfr __at (0xF5E) CANSTAT_RO0; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO0bits_t; +extern volatile __CANSTAT_RO0bits_t __at (0xF5E) CANSTAT_RO0bits; + +extern __sfr __at (0xF5F) CANCON_RO0; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO0bits_t; +extern volatile __CANCON_RO0bits_t __at (0xF5F) CANCON_RO0bits; + +extern __sfr __at (0xF60) RXB0CON; +typedef union { + struct { + unsigned : 1; + unsigned JTOFF : 1; + unsigned RXB0DBEN : 1; + unsigned RXRTRRO_RXB0CON : 1; + unsigned : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0CONbits_t; +extern volatile __RXB0CONbits_t __at (0xF60) RXB0CONbits; + +extern __sfr __at (0xF61) RXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB0SIDHbits_t; +extern volatile __RXB0SIDHbits_t __at (0xF61) RXB0SIDHbits; + +extern __sfr __at (0xF62) RXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB0SIDLbits_t; +extern volatile __RXB0SIDLbits_t __at (0xF62) RXB0SIDLbits; + +extern __sfr __at (0xF63) RXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB0EIDHbits_t; +extern volatile __RXB0EIDHbits_t __at (0xF63) RXB0EIDHbits; + +extern __sfr __at (0xF64) RXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB0EIDLbits_t; +extern volatile __RXB0EIDLbits_t __at (0xF64) RXB0EIDLbits; + +extern __sfr __at (0xF65) RXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB0DLC : 1; + unsigned RB1_RXB0DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0DLCbits_t; +extern volatile __RXB0DLCbits_t __at (0xF65) RXB0DLCbits; + +extern __sfr __at (0xF66) RXB0D0; +typedef union { + struct { + unsigned RXB0D00 : 1; + unsigned RXB0D01 : 1; + unsigned RXB0D02 : 1; + unsigned RXB0D03 : 1; + unsigned RXB0D04 : 1; + unsigned RXB0D05 : 1; + unsigned RXB0D06 : 1; + unsigned RXB0D07 : 1; + }; +} __RXB0D0bits_t; +extern volatile __RXB0D0bits_t __at (0xF66) RXB0D0bits; + +extern __sfr __at (0xF67) RXB0D1; +typedef union { + struct { + unsigned RXB0D10 : 1; + unsigned RXB0D11 : 1; + unsigned RXB0D12 : 1; + unsigned RXB0D13 : 1; + unsigned RXB0D14 : 1; + unsigned RXB0D15 : 1; + unsigned RXB0D16 : 1; + unsigned RXB0D17 : 1; + }; +} __RXB0D1bits_t; +extern volatile __RXB0D1bits_t __at (0xF67) RXB0D1bits; + +extern __sfr __at (0xF68) RXB0D2; +typedef union { + struct { + unsigned RXB0D20 : 1; + unsigned RXB0D21 : 1; + unsigned RXB0D22 : 1; + unsigned RXB0D23 : 1; + unsigned RXB0D24 : 1; + unsigned RXB0D25 : 1; + unsigned RXB0D26 : 1; + unsigned RXB0D27 : 1; + }; +} __RXB0D2bits_t; +extern volatile __RXB0D2bits_t __at (0xF68) RXB0D2bits; + +extern __sfr __at (0xF69) RXB0D3; +typedef union { + struct { + unsigned RXB0D30 : 1; + unsigned RXB0D31 : 1; + unsigned RXB0D32 : 1; + unsigned RXB0D33 : 1; + unsigned RXB0D34 : 1; + unsigned RXB0D35 : 1; + unsigned RXB0D36 : 1; + unsigned RXB0D37 : 1; + }; +} __RXB0D3bits_t; +extern volatile __RXB0D3bits_t __at (0xF69) RXB0D3bits; + +extern __sfr __at (0xF6A) RXB0D4; +typedef union { + struct { + unsigned RXB0D40 : 1; + unsigned RXB0D41 : 1; + unsigned RXB0D42 : 1; + unsigned RXB0D43 : 1; + unsigned RXB0D44 : 1; + unsigned RXB0D45 : 1; + unsigned RXB0D46 : 1; + unsigned RXB0D47 : 1; + }; +} __RXB0D4bits_t; +extern volatile __RXB0D4bits_t __at (0xF6A) RXB0D4bits; + +extern __sfr __at (0xF6B) RXB0D5; +typedef union { + struct { + unsigned RXB0D50 : 1; + unsigned RXB0D51 : 1; + unsigned RXB0D52 : 1; + unsigned RXB0D53 : 1; + unsigned RXB0D54 : 1; + unsigned RXB0D55 : 1; + unsigned RXB0D56 : 1; + unsigned RXB0D57 : 1; + }; +} __RXB0D5bits_t; +extern volatile __RXB0D5bits_t __at (0xF6B) RXB0D5bits; + +extern __sfr __at (0xF6C) RXB0D6; +typedef union { + struct { + unsigned RXB0D60 : 1; + unsigned RXB0D61 : 1; + unsigned RXB0D62 : 1; + unsigned RXB0D63 : 1; + unsigned RXB0D64 : 1; + unsigned RXB0D65 : 1; + unsigned RXB0D66 : 1; + unsigned RXB0D67 : 1; + }; +} __RXB0D6bits_t; +extern volatile __RXB0D6bits_t __at (0xF6C) RXB0D6bits; + +extern __sfr __at (0xF6D) RXB0D7; +typedef union { + struct { + unsigned RXB0D70 : 1; + unsigned RXB0D71 : 1; + unsigned RXB0D72 : 1; + unsigned RXB0D73 : 1; + unsigned RXB0D74 : 1; + unsigned RXB0D75 : 1; + unsigned RXB0D76 : 1; + unsigned RXB0D77 : 1; + }; +} __RXB0D7bits_t; +extern volatile __RXB0D7bits_t __at (0xF6D) RXB0D7bits; + +extern __sfr __at (0xF6E) CANSTAT; +typedef union { + struct { + unsigned EICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned EICODE4 : 1; + unsigned OPMODE0 : 1; + unsigned OPMODE1 : 1; + unsigned OPMODE2 : 1; + }; + struct { + unsigned : 1; + unsigned EICODE1 : 1; + unsigned EICODE2 : 1; + unsigned EICODE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANSTATbits_t; +extern volatile __CANSTATbits_t __at (0xF6E) CANSTATbits; + +extern __sfr __at (0xF6F) CANCON; +typedef union { + struct { + unsigned FP0 : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; + struct { + unsigned : 1; + unsigned FP1 : 1; + unsigned FP2 : 1; + unsigned FP3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANCONbits_t; +extern volatile __CANCONbits_t __at (0xF6F) CANCONbits; + +extern __sfr __at (0xF70) BRGCON1; +typedef union { + struct { + unsigned BRP0 : 1; + unsigned BRP1 : 1; + unsigned BRP2 : 1; + unsigned BRP3 : 1; + unsigned BRP4 : 1; + unsigned BRP5 : 1; + unsigned SJW0 : 1; + unsigned SJW1 : 1; + }; +} __BRGCON1bits_t; +extern volatile __BRGCON1bits_t __at (0xF70) BRGCON1bits; + +extern __sfr __at (0xF71) BRGCON2; +typedef union { + struct { + unsigned PRSEG0 : 1; + unsigned PRSEG1 : 1; + unsigned PRSEG2 : 1; + unsigned SEG1PH0 : 1; + unsigned SEG1PH1 : 1; + unsigned SEG1PH2 : 1; + unsigned SAM : 1; + unsigned SEG2PHTS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SEG2PHT : 1; + }; +} __BRGCON2bits_t; +extern volatile __BRGCON2bits_t __at (0xF71) BRGCON2bits; + +extern __sfr __at (0xF72) BRGCON3; +typedef union { + struct { + unsigned SEG2PH0 : 1; + unsigned SEG2PH1 : 1; + unsigned SEG2PH2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned WAKFIL : 1; + unsigned WAKDIS : 1; + }; +} __BRGCON3bits_t; +extern volatile __BRGCON3bits_t __at (0xF72) BRGCON3bits; + +extern __sfr __at (0xF73) CIOCON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CANCAP : 1; + unsigned ENDRHI : 1; + unsigned : 1; + unsigned : 1; + }; +} __CIOCONbits_t; +extern volatile __CIOCONbits_t __at (0xF73) CIOCONbits; + +extern __sfr __at (0xF74) COMSTAT; +typedef union { + struct { + unsigned EWARN : 1; + unsigned RXWARN : 1; + unsigned TXWARN : 1; + unsigned RXBP : 1; + unsigned TXBP : 1; + unsigned TXBO : 1; + unsigned RXB1OVFL : 1; + unsigned RXB0OVFL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXBnOVFL : 1; + unsigned FIFOEMPTY : 1; + }; +} __COMSTATbits_t; +extern volatile __COMSTATbits_t __at (0xF74) COMSTATbits; + +extern __sfr __at (0xF75) RXERRCNT; +typedef union { + struct { + unsigned REC0 : 1; + unsigned REC1 : 1; + unsigned REC2 : 1; + unsigned REC3 : 1; + unsigned REC4 : 1; + unsigned REC5 : 1; + unsigned REC6 : 1; + unsigned REC7 : 1; + }; +} __RXERRCNTbits_t; +extern volatile __RXERRCNTbits_t __at (0xF75) RXERRCNTbits; + +extern __sfr __at (0xF76) TXERRCNT; +typedef union { + struct { + unsigned TEC0 : 1; + unsigned TEC1 : 1; + unsigned TEC2 : 1; + unsigned TEC3 : 1; + unsigned TEC4 : 1; + unsigned TEC5 : 1; + unsigned TEC6 : 1; + unsigned TEC7 : 1; + }; +} __TXERRCNTbits_t; +extern volatile __TXERRCNTbits_t __at (0xF76) TXERRCNTbits; + +extern __sfr __at (0xF77) ECANCON; +typedef union { + struct { + unsigned EWIN0 : 1; + unsigned EWIN1 : 1; + unsigned EWIN2 : 1; + unsigned EWIN3 : 1; + unsigned EWIN4 : 1; + unsigned FIFOWM : 1; + unsigned MDSEL0 : 1; + unsigned MDSEL1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned F : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECANCONbits_t; +extern volatile __ECANCONbits_t __at (0xF77) ECANCONbits; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned OSC1 : 1; + }; + struct { + unsigned CVREF : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned LVDIN : 1; + unsigned CLKO : 1; + unsigned CLKI : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0_PORTB : 1; + unsigned RB1_PORTB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CANRX : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned CANTX : 1; + unsigned : 1; + unsigned AN9 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0_DDRB : 1; + unsigned RB1_DDRB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSCR : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXBIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned : 1; + unsigned : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned : 1; + unsigned : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned : 1; + unsigned : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned ERRIE : 1; + unsigned WAKIE : 1; + unsigned IRXIE : 1; + }; + struct { + unsigned FIFOWMIE : 1; + unsigned RXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FIFOMWIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned RXB0IF : 1; + unsigned RXB1IF : 1; + unsigned TXB0IF : 1; + unsigned TXB1IF : 1; + unsigned TXB2IF : 1; + unsigned ERRIF : 1; + unsigned WAKIF : 1; + unsigned IRXIF : 1; + }; + struct { + unsigned FIFOWMIF : 1; + unsigned RXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned RXB0IP : 1; + unsigned RXB1IP : 1; + unsigned TXB0IP : 1; + unsigned TXB1IP : 1; + unsigned TXB2IP : 1; + unsigned ERRIP : 1; + unsigned WAKIP : 1; + unsigned IRXIP : 1; + }; + struct { + unsigned FIFOWMIP : 1; + unsigned RXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAA) EEADRH; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T3NSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T3ECCP1 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO_DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T0PS3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f2682.h b/device/include/pic16/pic18f2682.h new file mode 100644 index 0000000..b80fc99 --- /dev/null +++ b/device/include/pic16/pic18f2682.h @@ -0,0 +1,6086 @@ +/* + * pic18f2682.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F2682_H__ +#define __PIC18F2682_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP oscillator +#define _OSC_XT_1H 0xF1 // XT oscillator +#define _OSC_HS_1H 0xF2 // HS oscillator +#define _OSC_RC_1H 0xF3 // External RC oscillator, CLKO function on RA6 +#define _OSC_EC_1H 0xF4 // EC oscillator, CLKO function on RA6 +#define _OSC_ECIO_1H 0xF5 // EC oscillator, port function on RA6 +#define _OSC_HSPLL_1H 0xF6 // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) +#define _OSC_RCIO_1H 0xF7 // External RC oscillator, port function on RA6 +#define _OSC_IRCIO67_1H 0xF8 // Internal oscillator block, port function on RA6 and RA7 +#define _OSC_IRCIO7_1H 0xF9 // Internal oscillator block, CLKO function on RA6, port function on RA7 +#define _FCMEN_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled +#define _FCMEN_ON_1H 0xFF // Fail-Safe Clock Monitor enabled +#define _IESO_OFF_1H 0x7F // Oscillator Switchover mode disabled +#define _IESO_ON_1H 0xFF // Oscillator Switchover mode enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // PWRT enabled +#define _PWRT_OFF_2L 0xFF // PWRT disabled +#define _BOREN_OFF_2L 0xF9 // Brown-out Reset disabled in hardware and software +#define _BOREN_SBORENCTRL_2L 0xFB // Brown-out Reset enabled and controlled by software (SBOREN is enabled) +#define _BOREN_BOACTIVE_2L 0xFD // Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) +#define _BOREN_BOHW_2L 0xFF // Brown-out Reset enabled in hardware only (SBOREN is disabled) +#define _BORV_0_2L 0xE7 // Maximum setting +#define _BORV_1_2L 0xEF // +#define _BORV_2_2L 0xF7 // +#define _BORV_3_2L 0xFF // Minimum setting + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit) +#define _WDT_ON_2H 0xFF // WDT enabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // RE3 input pin enabled; MCLR disabled +#define _MCLRE_ON_3H 0xFF // MCLR pin enabled; RE3 input pin disabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 configured for higher power operation +#define _LPT1OSC_ON_3H 0xFF // Timer1 configured for low-power operation +#define _PBADEN_OFF_3H 0xFD // PORTB<4> and PORTB<1:0> Configured as Digital I/O Pins on Reset +#define _PBADEN_ON_3H 0xFF // PORTB<4> and PORTB<1:0> Configured as Analog Pins on Reset + +// CONFIG4L Options +#define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug +#define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins +#define _XINST_OFF_4L 0xBF // Instruction set extension and Indexed Addressing mode disabled (Legacy mode) +#define _XINST_ON_4L 0xFF // Instruction set extension and Indexed Addressing mode enabled +#define _BBSIZ_1024_4L 0xCF // 1K words (2K bytes) Boot Block +#define _BBSIZ_2048_4L 0xDF // 2K words (4K bytes) Boot Block +#define _BBSIZ_4096_4L 0xEF // 4K words (8K bytes) Boot Block +#define _LVP_OFF_4L 0xFB // Disabled +#define _LVP_ON_4L 0xFF // Enabled +#define _STVREN_OFF_4L 0xFE // Stack full/underflow will not cause Reset +#define _STVREN_ON_4L 0xFF // Stack full/underflow will cause Reset + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Block 0 (000800-003FFFh) code-protected +#define _CP0_OFF_5L 0xFF // Block 0 (000800-003FFFh) not code-protected +#define _CP1_ON_5L 0xFD // Block 1 (004000-007FFFh) code-protected +#define _CP1_OFF_5L 0xFF // Block 1 (004000-007FFFh) not code-protected +#define _CP2_ON_5L 0xFB // Block 2 (008000-00BFFFh) code-protected +#define _CP2_OFF_5L 0xFF // Block 2 (008000-00BFFFh) not code-protected +#define _CP3_ON_5L 0xF7 // Block 3 (00C000-00FFFFh) code-protected +#define _CP3_OFF_5L 0xFF // Block 3 (00C000-00FFFFh) not code-protected +#define _CP4_ON_5L 0xEF // Block 4 (010000-013FFFh) code-protected +#define _CP4_OFF_5L 0xFF // Block 4 (010000-013FFFh) not code-protected + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Boot Block (000000-0007FFh) code-protected +#define _CPB_OFF_5H 0xFF // Boot Block (000000-0007FFh) not code-protected +#define _CPD_ON_5H 0x7F // Data EEPROM code-protected +#define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Block 0 (000800-003FFFh) write-protected +#define _WRT0_OFF_6L 0xFF // Block 0 (000800-003FFFh) not write-protected +#define _WRT1_ON_6L 0xFD // Block 1 (004000-007FFFh) write-protected +#define _WRT1_OFF_6L 0xFF // Block 1 (004000-007FFFh) not write-protected +#define _WRT2_ON_6L 0xFB // Block 2 (008000-00BFFFh) write-protected +#define _WRT2_OFF_6L 0xFF // Block 2 (008000-00BFFFh) not write-protected +#define _WRT3_ON_6L 0xF7 // Block 3 (00C000-00FFFFh) write-protected +#define _WRT3_OFF_6L 0xFF // Block 3 (00C000-00FFFFh) not write-protected +#define _WRT4_ON_6L 0xEF // Block 4 (010000-013FFFh) write-protected +#define _WRT4_OFF_6L 0xFF // Block 4 (010000-013FFFh) not write-protected + +// CONFIG6H Options +#define _WRTB_ON_6H 0xBF // Boot Block (000000-0007FFh) write-protected +#define _WRTB_OFF_6H 0xFF // Boot Block (000000-0007FFh) not write-protected +#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected +#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected +#define _WRTD_ON_6H 0x7F // Data EEPROM write-protected +#define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Block 0 (000800-003FFFh) protected from table reads executed in other blocks +#define _EBTR0_OFF_7L 0xFF // Block 0 (000800-003FFFh) not protected from table reads executed in other blocks +#define _EBTR1_ON_7L 0xFD // Block 1 (004000-007FFFh) protected from table reads executed in other blocks +#define _EBTR1_OFF_7L 0xFF // Block 1 (004000-007FFFh) not protected from table reads executed in other blocks +#define _EBTR2_ON_7L 0xFB // Block 2 (008000-00BFFFh) protected from table reads executed in other blocks +#define _EBTR2_OFF_7L 0xFF // Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks +#define _EBTR3_ON_7L 0xF7 // Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks +#define _EBTR3_OFF_7L 0xFF // Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks +#define _EBTR4_ON_7L 0xEF // Block 4 (010000-013FFFh) protected from table reads executed in other blocks +#define _EBTR4_OFF_7L 0xFF // Block 4 (010000-013FFFh) not protected from table reads executed in other blocks + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Boot Block (000000-0007FFh) protected from table reads executed in other blocks +#define _EBTRB_OFF_7H 0xFF // Boot Block (000000-0007FFh) not protected from table reads executed in other blocks +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xD60) RXF6SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF6SIDHbits_t; +extern volatile __RXF6SIDHbits_t __at (0xD60) RXF6SIDHbits; + +extern __sfr __at (0xD61) RXF6SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF6SIDLbits_t; +extern volatile __RXF6SIDLbits_t __at (0xD61) RXF6SIDLbits; + +extern __sfr __at (0xD62) RXF6EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF6EIDHbits_t; +extern volatile __RXF6EIDHbits_t __at (0xD62) RXF6EIDHbits; + +extern __sfr __at (0xD63) RXF6EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF6EIDLbits_t; +extern volatile __RXF6EIDLbits_t __at (0xD63) RXF6EIDLbits; + +extern __sfr __at (0xD64) RXF7SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF7SIDHbits_t; +extern volatile __RXF7SIDHbits_t __at (0xD64) RXF7SIDHbits; + +extern __sfr __at (0xD65) RXF7SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF7SIDLbits_t; +extern volatile __RXF7SIDLbits_t __at (0xD65) RXF7SIDLbits; + +extern __sfr __at (0xD66) RXF7EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF7EIDHbits_t; +extern volatile __RXF7EIDHbits_t __at (0xD66) RXF7EIDHbits; + +extern __sfr __at (0xD67) RXF7EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF7EIDLbits_t; +extern volatile __RXF7EIDLbits_t __at (0xD67) RXF7EIDLbits; + +extern __sfr __at (0xD68) RXF8SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF8SIDHbits_t; +extern volatile __RXF8SIDHbits_t __at (0xD68) RXF8SIDHbits; + +extern __sfr __at (0xD69) RXF8SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF8SIDLbits_t; +extern volatile __RXF8SIDLbits_t __at (0xD69) RXF8SIDLbits; + +extern __sfr __at (0xD6A) RXF8EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF8EIDHbits_t; +extern volatile __RXF8EIDHbits_t __at (0xD6A) RXF8EIDHbits; + +extern __sfr __at (0xD6B) RXF8EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF8EIDLbits_t; +extern volatile __RXF8EIDLbits_t __at (0xD6B) RXF8EIDLbits; + +extern __sfr __at (0xD70) RXF9SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF9SIDHbits_t; +extern volatile __RXF9SIDHbits_t __at (0xD70) RXF9SIDHbits; + +extern __sfr __at (0xD71) RXF9SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF9SIDLbits_t; +extern volatile __RXF9SIDLbits_t __at (0xD71) RXF9SIDLbits; + +extern __sfr __at (0xD72) RXF9EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF9EIDHbits_t; +extern volatile __RXF9EIDHbits_t __at (0xD72) RXF9EIDHbits; + +extern __sfr __at (0xD73) RXF9EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF9EIDLbits_t; +extern volatile __RXF9EIDLbits_t __at (0xD73) RXF9EIDLbits; + +extern __sfr __at (0xD74) RXF10SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF10SIDHbits_t; +extern volatile __RXF10SIDHbits_t __at (0xD74) RXF10SIDHbits; + +extern __sfr __at (0xD75) RXF10SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF10SIDLbits_t; +extern volatile __RXF10SIDLbits_t __at (0xD75) RXF10SIDLbits; + +extern __sfr __at (0xD76) RXF10EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF10EIDHbits_t; +extern volatile __RXF10EIDHbits_t __at (0xD76) RXF10EIDHbits; + +extern __sfr __at (0xD77) RXF10EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF10EIDLbits_t; +extern volatile __RXF10EIDLbits_t __at (0xD77) RXF10EIDLbits; + +extern __sfr __at (0xD78) RXF11SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF11SIDHbits_t; +extern volatile __RXF11SIDHbits_t __at (0xD78) RXF11SIDHbits; + +extern __sfr __at (0xD79) RXF11SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF11SIDLbits_t; +extern volatile __RXF11SIDLbits_t __at (0xD79) RXF11SIDLbits; + +extern __sfr __at (0xD7A) RXF11EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF11EIDHbits_t; +extern volatile __RXF11EIDHbits_t __at (0xD7A) RXF11EIDHbits; + +extern __sfr __at (0xD7B) RXF11EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF11EIDLbits_t; +extern volatile __RXF11EIDLbits_t __at (0xD7B) RXF11EIDLbits; + +extern __sfr __at (0xD80) RXF12SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF12SIDHbits_t; +extern volatile __RXF12SIDHbits_t __at (0xD80) RXF12SIDHbits; + +extern __sfr __at (0xD81) RXF12SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF12SIDLbits_t; +extern volatile __RXF12SIDLbits_t __at (0xD81) RXF12SIDLbits; + +extern __sfr __at (0xD82) RXF12EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF12EIDHbits_t; +extern volatile __RXF12EIDHbits_t __at (0xD82) RXF12EIDHbits; + +extern __sfr __at (0xD83) RXF12EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF12EIDLbits_t; +extern volatile __RXF12EIDLbits_t __at (0xD83) RXF12EIDLbits; + +extern __sfr __at (0xD84) RXF13SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF13SIDHbits_t; +extern volatile __RXF13SIDHbits_t __at (0xD84) RXF13SIDHbits; + +extern __sfr __at (0xD85) RXF13SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF13SIDLbits_t; +extern volatile __RXF13SIDLbits_t __at (0xD85) RXF13SIDLbits; + +extern __sfr __at (0xD86) RXF13EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF13EIDHbits_t; +extern volatile __RXF13EIDHbits_t __at (0xD86) RXF13EIDHbits; + +extern __sfr __at (0xD87) RXF13EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF13EIDLbits_t; +extern volatile __RXF13EIDLbits_t __at (0xD87) RXF13EIDLbits; + +extern __sfr __at (0xD88) RXF14SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF14SIDHbits_t; +extern volatile __RXF14SIDHbits_t __at (0xD88) RXF14SIDHbits; + +extern __sfr __at (0xD89) RXF14SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF14SIDLbits_t; +extern volatile __RXF14SIDLbits_t __at (0xD89) RXF14SIDLbits; + +extern __sfr __at (0xD8A) RXF14EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF14EIDHbits_t; +extern volatile __RXF14EIDHbits_t __at (0xD8A) RXF14EIDHbits; + +extern __sfr __at (0xD8B) RXF14EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF14EIDLbits_t; +extern volatile __RXF14EIDLbits_t __at (0xD8B) RXF14EIDLbits; + +extern __sfr __at (0xD90) RXF15SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF15SIDHbits_t; +extern volatile __RXF15SIDHbits_t __at (0xD90) RXF15SIDHbits; + +extern __sfr __at (0xD91) RXF15SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF15SIDLbits_t; +extern volatile __RXF15SIDLbits_t __at (0xD91) RXF15SIDLbits; + +extern __sfr __at (0xD92) RXF15EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF15EIDHbits_t; +extern volatile __RXF15EIDHbits_t __at (0xD92) RXF15EIDHbits; + +extern __sfr __at (0xD93) RXF15EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF15EIDLbits_t; +extern volatile __RXF15EIDLbits_t __at (0xD93) RXF15EIDLbits; + +extern __sfr __at (0xDD4) RXFCON0; +typedef union { + struct { + unsigned RXF0EN : 1; + unsigned RXF1EN : 1; + unsigned RXF2EN : 1; + unsigned RXF3EN : 1; + unsigned RXF4EN : 1; + unsigned RXF5EN : 1; + unsigned RXF6EN : 1; + unsigned RXF7EN : 1; + }; +} __RXFCON0bits_t; +extern volatile __RXFCON0bits_t __at (0xDD4) RXFCON0bits; + +extern __sfr __at (0xDD5) RXFCON1; +typedef union { + struct { + unsigned RXF8EN : 1; + unsigned RXF9EN : 1; + unsigned RXF10EN : 1; + unsigned RXF11EN : 1; + unsigned RXF12EN : 1; + unsigned RXF13EN : 1; + unsigned RXF14EN : 1; + unsigned RXF15EN : 1; + }; +} __RXFCON1bits_t; +extern volatile __RXFCON1bits_t __at (0xDD5) RXFCON1bits; + +extern __sfr __at (0xDD8) SDFLC; +typedef union { + struct { + unsigned DFLC0 : 1; + unsigned DFLC1 : 1; + unsigned DFLC2 : 1; + unsigned DFLC3 : 1; + unsigned DFLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FLC0 : 1; + unsigned FLC1 : 1; + unsigned FLC2 : 1; + unsigned FLC3 : 1; + unsigned FLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SDFLCbits_t; +extern volatile __SDFLCbits_t __at (0xDD8) SDFLCbits; + +extern __sfr __at (0xDE0) RXFBCON0; +typedef union { + struct { + unsigned F0BP_0 : 1; + unsigned F0BP_1 : 1; + unsigned F0BP_2 : 1; + unsigned F0BP_3 : 1; + unsigned F1BP_0 : 1; + unsigned F1BP_1 : 1; + unsigned F1BP_2 : 1; + unsigned F1BP_3 : 1; + }; +} __RXFBCON0bits_t; +extern volatile __RXFBCON0bits_t __at (0xDE0) RXFBCON0bits; + +extern __sfr __at (0xDE1) RXFBCON1; +typedef union { + struct { + unsigned F2BP_0 : 1; + unsigned F2BP_1 : 1; + unsigned F2BP_2 : 1; + unsigned F2BP_3 : 1; + unsigned F3BP_0 : 1; + unsigned F3BP_1 : 1; + unsigned F3BP_2 : 1; + unsigned F3BP_3 : 1; + }; +} __RXFBCON1bits_t; +extern volatile __RXFBCON1bits_t __at (0xDE1) RXFBCON1bits; + +extern __sfr __at (0xDE2) RXFBCON2; +typedef union { + struct { + unsigned F4BP_0 : 1; + unsigned F4BP_1 : 1; + unsigned F4BP_2 : 1; + unsigned F4BP_3 : 1; + unsigned F5BP_0 : 1; + unsigned F5BP_1 : 1; + unsigned F5BP_2 : 1; + unsigned F5BP_3 : 1; + }; +} __RXFBCON2bits_t; +extern volatile __RXFBCON2bits_t __at (0xDE2) RXFBCON2bits; + +extern __sfr __at (0xDE3) RXFBCON3; +typedef union { + struct { + unsigned F6BP_0 : 1; + unsigned F6BP_1 : 1; + unsigned F6BP_2 : 1; + unsigned F6BP_3 : 1; + unsigned F7BP_0 : 1; + unsigned F7BP_1 : 1; + unsigned F7BP_2 : 1; + unsigned F7BP_3 : 1; + }; +} __RXFBCON3bits_t; +extern volatile __RXFBCON3bits_t __at (0xDE3) RXFBCON3bits; + +extern __sfr __at (0xDE4) RXFBCON4; +typedef union { + struct { + unsigned F8BP_0 : 1; + unsigned F8BP_1 : 1; + unsigned F8BP_2 : 1; + unsigned F8BP_3 : 1; + unsigned F9BP_0 : 1; + unsigned F9BP_1 : 1; + unsigned F9BP_2 : 1; + unsigned F9BP_3 : 1; + }; +} __RXFBCON4bits_t; +extern volatile __RXFBCON4bits_t __at (0xDE4) RXFBCON4bits; + +extern __sfr __at (0xDE5) RXFBCON5; +typedef union { + struct { + unsigned F10BP_0 : 1; + unsigned F10BP_1 : 1; + unsigned F10BP_2 : 1; + unsigned F10BP_3 : 1; + unsigned F11BP_0 : 1; + unsigned F11BP_1 : 1; + unsigned F11BP_2 : 1; + unsigned F11BP_3 : 1; + }; +} __RXFBCON5bits_t; +extern volatile __RXFBCON5bits_t __at (0xDE5) RXFBCON5bits; + +extern __sfr __at (0xDE6) RXFBCON6; +typedef union { + struct { + unsigned F12BP_0 : 1; + unsigned F12BP_1 : 1; + unsigned F12BP_2 : 1; + unsigned F12BP_3 : 1; + unsigned F13BP_0 : 1; + unsigned F13BP_1 : 1; + unsigned F13BP_2 : 1; + unsigned F13BP_3 : 1; + }; +} __RXFBCON6bits_t; +extern volatile __RXFBCON6bits_t __at (0xDE6) RXFBCON6bits; + +extern __sfr __at (0xDE7) RXFBCON7; +typedef union { + struct { + unsigned F14BP_0 : 1; + unsigned F14BP_1 : 1; + unsigned F14BP_2 : 1; + unsigned F14BP_3 : 1; + unsigned F15BP_0 : 1; + unsigned F15BP_1 : 1; + unsigned F15BP_2 : 1; + unsigned F15BP_3 : 1; + }; +} __RXFBCON7bits_t; +extern volatile __RXFBCON7bits_t __at (0xDE7) RXFBCON7bits; + +extern __sfr __at (0xDF0) MSEL0; +typedef union { + struct { + unsigned FIL0_0 : 1; + unsigned FIL0_1 : 1; + unsigned FIL1_0 : 1; + unsigned FIL1_1 : 1; + unsigned FIL2_0 : 1; + unsigned FIL2_1 : 1; + unsigned FIL3_0 : 1; + unsigned FIL3_1 : 1; + }; +} __MSEL0bits_t; +extern volatile __MSEL0bits_t __at (0xDF0) MSEL0bits; + +extern __sfr __at (0xDF1) MSEL1; +typedef union { + struct { + unsigned FIL4_0 : 1; + unsigned FIL4_1 : 1; + unsigned FIL5_0 : 1; + unsigned FIL5_1 : 1; + unsigned FIL6_0 : 1; + unsigned FIL6_1 : 1; + unsigned FIL7_0 : 1; + unsigned FIL7_1 : 1; + }; +} __MSEL1bits_t; +extern volatile __MSEL1bits_t __at (0xDF1) MSEL1bits; + +extern __sfr __at (0xDF2) MSEL2; +typedef union { + struct { + unsigned FIL8_0 : 1; + unsigned FIL8_1 : 1; + unsigned FIL9_0 : 1; + unsigned FIL9_1 : 1; + unsigned FIL10_0 : 1; + unsigned FIL10_1 : 1; + unsigned FIL11_0 : 1; + unsigned FIL11_1 : 1; + }; +} __MSEL2bits_t; +extern volatile __MSEL2bits_t __at (0xDF2) MSEL2bits; + +extern __sfr __at (0xDF3) MSEL3; +typedef union { + struct { + unsigned FIL12_0 : 1; + unsigned FIL12_1 : 1; + unsigned FIL13_0 : 1; + unsigned FIL13_1 : 1; + unsigned FIL14_0 : 1; + unsigned FIL14_1 : 1; + unsigned FIL15_0 : 1; + unsigned FIL15_1 : 1; + }; +} __MSEL3bits_t; +extern volatile __MSEL3bits_t __at (0xDF3) MSEL3bits; + +extern __sfr __at (0xDF8) BSEL0; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned B0TXEN : 1; + unsigned B1TXEN : 1; + unsigned B2TXEN : 1; + unsigned B3TXEN : 1; + unsigned B4TXEN : 1; + unsigned B5TXEN : 1; + }; +} __BSEL0bits_t; +extern volatile __BSEL0bits_t __at (0xDF8) BSEL0bits; + +extern __sfr __at (0xDFA) BIE0; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned B0IE : 1; + unsigned B1IE : 1; + unsigned B2IE : 1; + unsigned B3IE : 1; + unsigned B4IE : 1; + unsigned B5IE : 1; + }; +} __BIE0bits_t; +extern volatile __BIE0bits_t __at (0xDFA) BIE0bits; + +extern __sfr __at (0xDFC) TXBIE; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TXBIEbits_t; +extern volatile __TXBIEbits_t __at (0xDFC) TXBIEbits; + +extern __sfr __at (0xE20) B0CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B0CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0CONbits_t; +extern volatile __B0CONbits_t __at (0xE20) B0CONbits; + +extern __sfr __at (0xE21) B0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B0SIDHbits_t; +extern volatile __B0SIDHbits_t __at (0xE21) B0SIDHbits; + +extern __sfr __at (0xE22) B0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0SIDLbits_t; +extern volatile __B0SIDLbits_t __at (0xE22) B0SIDLbits; + +extern __sfr __at (0xE23) B0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B0EIDHbits_t; +extern volatile __B0EIDHbits_t __at (0xE23) B0EIDHbits; + +extern __sfr __at (0xE24) B0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B0EIDLbits_t; +extern volatile __B0EIDLbits_t __at (0xE24) B0EIDLbits; + +extern __sfr __at (0xE25) B0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B0DLC : 1; + unsigned RB1_B0DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B0DLCbits_t; +extern volatile __B0DLCbits_t __at (0xE25) B0DLCbits; + +extern __sfr __at (0xE26) B0D0; +typedef union { + struct { + unsigned B0D00 : 1; + unsigned B0D01 : 1; + unsigned B0D02 : 1; + unsigned B0D03 : 1; + unsigned B0D04 : 1; + unsigned B0D05 : 1; + unsigned B0D06 : 1; + unsigned B0D07 : 1; + }; +} __B0D0bits_t; +extern volatile __B0D0bits_t __at (0xE26) B0D0bits; + +extern __sfr __at (0xE27) B0D1; +typedef union { + struct { + unsigned B0D10 : 1; + unsigned B0D11 : 1; + unsigned B0D12 : 1; + unsigned B0D13 : 1; + unsigned B0D14 : 1; + unsigned B0D15 : 1; + unsigned B0D16 : 1; + unsigned B0D17 : 1; + }; +} __B0D1bits_t; +extern volatile __B0D1bits_t __at (0xE27) B0D1bits; + +extern __sfr __at (0xE28) B0D2; +typedef union { + struct { + unsigned B0D20 : 1; + unsigned B0D21 : 1; + unsigned B0D22 : 1; + unsigned B0D23 : 1; + unsigned B0D24 : 1; + unsigned B0D25 : 1; + unsigned B0D26 : 1; + unsigned B0D27 : 1; + }; +} __B0D2bits_t; +extern volatile __B0D2bits_t __at (0xE28) B0D2bits; + +extern __sfr __at (0xE29) B0D3; +typedef union { + struct { + unsigned B0D30 : 1; + unsigned B0D31 : 1; + unsigned B0D32 : 1; + unsigned B0D33 : 1; + unsigned B0D34 : 1; + unsigned B0D35 : 1; + unsigned B0D36 : 1; + unsigned B0D37 : 1; + }; +} __B0D3bits_t; +extern volatile __B0D3bits_t __at (0xE29) B0D3bits; + +extern __sfr __at (0xE2A) B0D4; +typedef union { + struct { + unsigned B0D40 : 1; + unsigned B0D41 : 1; + unsigned B0D42 : 1; + unsigned B0D43 : 1; + unsigned B0D44 : 1; + unsigned B0D45 : 1; + unsigned B0D46 : 1; + unsigned B0D47 : 1; + }; +} __B0D4bits_t; +extern volatile __B0D4bits_t __at (0xE2A) B0D4bits; + +extern __sfr __at (0xE2B) B0D5; +typedef union { + struct { + unsigned B0D50 : 1; + unsigned B0D51 : 1; + unsigned B0D52 : 1; + unsigned B0D53 : 1; + unsigned B0D54 : 1; + unsigned B0D55 : 1; + unsigned B0D56 : 1; + unsigned B0D57 : 1; + }; +} __B0D5bits_t; +extern volatile __B0D5bits_t __at (0xE2B) B0D5bits; + +extern __sfr __at (0xE2C) B0D6; +typedef union { + struct { + unsigned B0D60 : 1; + unsigned B0D61 : 1; + unsigned B0D62 : 1; + unsigned B0D63 : 1; + unsigned B0D64 : 1; + unsigned B0D65 : 1; + unsigned B0D66 : 1; + unsigned B0D67 : 1; + }; +} __B0D6bits_t; +extern volatile __B0D6bits_t __at (0xE2C) B0D6bits; + +extern __sfr __at (0xE2D) B0D7; +typedef union { + struct { + unsigned B0D70 : 1; + unsigned B0D71 : 1; + unsigned B0D72 : 1; + unsigned B0D73 : 1; + unsigned B0D74 : 1; + unsigned B0D75 : 1; + unsigned B0D76 : 1; + unsigned B0D77 : 1; + }; +} __B0D7bits_t; +extern volatile __B0D7bits_t __at (0xE2D) B0D7bits; + +extern __sfr __at (0xE2E) CANSTAT_RO9; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO9bits_t; +extern volatile __CANSTAT_RO9bits_t __at (0xE2E) CANSTAT_RO9bits; + +extern __sfr __at (0xE2F) CANCON_RO9; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO9bits_t; +extern volatile __CANCON_RO9bits_t __at (0xE2F) CANCON_RO9bits; + +extern __sfr __at (0xE30) B1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B1CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1CONbits_t; +extern volatile __B1CONbits_t __at (0xE30) B1CONbits; + +extern __sfr __at (0xE31) B1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B1SIDHbits_t; +extern volatile __B1SIDHbits_t __at (0xE31) B1SIDHbits; + +extern __sfr __at (0xE32) B1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1SIDLbits_t; +extern volatile __B1SIDLbits_t __at (0xE32) B1SIDLbits; + +extern __sfr __at (0xE33) B1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B1EIDHbits_t; +extern volatile __B1EIDHbits_t __at (0xE33) B1EIDHbits; + +extern __sfr __at (0xE34) B1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B1EIDLbits_t; +extern volatile __B1EIDLbits_t __at (0xE34) B1EIDLbits; + +extern __sfr __at (0xE35) B1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B1DLC : 1; + unsigned RB1_B1DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B1DLCbits_t; +extern volatile __B1DLCbits_t __at (0xE35) B1DLCbits; + +extern __sfr __at (0xE36) B1D0; +typedef union { + struct { + unsigned B1D00 : 1; + unsigned B1D01 : 1; + unsigned B1D02 : 1; + unsigned B1D03 : 1; + unsigned B1D04 : 1; + unsigned B1D05 : 1; + unsigned B1D06 : 1; + unsigned B1D07 : 1; + }; +} __B1D0bits_t; +extern volatile __B1D0bits_t __at (0xE36) B1D0bits; + +extern __sfr __at (0xE37) B1D1; +typedef union { + struct { + unsigned B1D10 : 1; + unsigned B1D11 : 1; + unsigned B1D12 : 1; + unsigned B1D13 : 1; + unsigned B1D14 : 1; + unsigned B1D15 : 1; + unsigned B1D16 : 1; + unsigned B1D17 : 1; + }; +} __B1D1bits_t; +extern volatile __B1D1bits_t __at (0xE37) B1D1bits; + +extern __sfr __at (0xE38) B1D2; +typedef union { + struct { + unsigned B1D20 : 1; + unsigned B1D21 : 1; + unsigned B1D22 : 1; + unsigned B1D23 : 1; + unsigned B1D24 : 1; + unsigned B1D25 : 1; + unsigned B1D26 : 1; + unsigned B1D27 : 1; + }; +} __B1D2bits_t; +extern volatile __B1D2bits_t __at (0xE38) B1D2bits; + +extern __sfr __at (0xE39) B1D3; +typedef union { + struct { + unsigned B1D30 : 1; + unsigned B1D31 : 1; + unsigned B1D32 : 1; + unsigned B1D33 : 1; + unsigned B1D34 : 1; + unsigned B1D35 : 1; + unsigned B1D36 : 1; + unsigned B1D37 : 1; + }; +} __B1D3bits_t; +extern volatile __B1D3bits_t __at (0xE39) B1D3bits; + +extern __sfr __at (0xE3A) B1D4; +typedef union { + struct { + unsigned B1D40 : 1; + unsigned B1D41 : 1; + unsigned B1D42 : 1; + unsigned B1D43 : 1; + unsigned B1D44 : 1; + unsigned B1D45 : 1; + unsigned B1D46 : 1; + unsigned B1D47 : 1; + }; +} __B1D4bits_t; +extern volatile __B1D4bits_t __at (0xE3A) B1D4bits; + +extern __sfr __at (0xE3B) B1D5; +typedef union { + struct { + unsigned B1D50 : 1; + unsigned B1D51 : 1; + unsigned B1D52 : 1; + unsigned B1D53 : 1; + unsigned B1D54 : 1; + unsigned B1D55 : 1; + unsigned B1D56 : 1; + unsigned B1D57 : 1; + }; +} __B1D5bits_t; +extern volatile __B1D5bits_t __at (0xE3B) B1D5bits; + +extern __sfr __at (0xE3C) B1D6; +typedef union { + struct { + unsigned B1D60 : 1; + unsigned B1D61 : 1; + unsigned B1D62 : 1; + unsigned B1D63 : 1; + unsigned B1D64 : 1; + unsigned B1D65 : 1; + unsigned B1D66 : 1; + unsigned B1D67 : 1; + }; +} __B1D6bits_t; +extern volatile __B1D6bits_t __at (0xE3C) B1D6bits; + +extern __sfr __at (0xE3D) B1D7; +typedef union { + struct { + unsigned B1D70 : 1; + unsigned B1D71 : 1; + unsigned B1D72 : 1; + unsigned B1D73 : 1; + unsigned B1D74 : 1; + unsigned B1D75 : 1; + unsigned B1D76 : 1; + unsigned B1D77 : 1; + }; +} __B1D7bits_t; +extern volatile __B1D7bits_t __at (0xE3D) B1D7bits; + +extern __sfr __at (0xE3E) CANSTAT_RO8; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO8bits_t; +extern volatile __CANSTAT_RO8bits_t __at (0xE3E) CANSTAT_RO8bits; + +extern __sfr __at (0xE3F) CANCON_RO8; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO8bits_t; +extern volatile __CANCON_RO8bits_t __at (0xE3F) CANCON_RO8bits; + +extern __sfr __at (0xE40) B2CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B2CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2CONbits_t; +extern volatile __B2CONbits_t __at (0xE40) B2CONbits; + +extern __sfr __at (0xE41) B2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B2SIDHbits_t; +extern volatile __B2SIDHbits_t __at (0xE41) B2SIDHbits; + +extern __sfr __at (0xE42) B2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2SIDLbits_t; +extern volatile __B2SIDLbits_t __at (0xE42) B2SIDLbits; + +extern __sfr __at (0xE43) B2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B2EIDHbits_t; +extern volatile __B2EIDHbits_t __at (0xE43) B2EIDHbits; + +extern __sfr __at (0xE44) B2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B2EIDLbits_t; +extern volatile __B2EIDLbits_t __at (0xE44) B2EIDLbits; + +extern __sfr __at (0xE45) B2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B2DLC : 1; + unsigned RB1_B2DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B2DLCbits_t; +extern volatile __B2DLCbits_t __at (0xE45) B2DLCbits; + +extern __sfr __at (0xE46) B2D0; +typedef union { + struct { + unsigned B2D00 : 1; + unsigned B2D01 : 1; + unsigned B2D02 : 1; + unsigned B2D03 : 1; + unsigned B2D04 : 1; + unsigned B2D05 : 1; + unsigned B2D06 : 1; + unsigned B2D07 : 1; + }; +} __B2D0bits_t; +extern volatile __B2D0bits_t __at (0xE46) B2D0bits; + +extern __sfr __at (0xE47) B2D1; +typedef union { + struct { + unsigned B2D10 : 1; + unsigned B2D11 : 1; + unsigned B2D12 : 1; + unsigned B2D13 : 1; + unsigned B2D14 : 1; + unsigned B2D15 : 1; + unsigned B2D16 : 1; + unsigned B2D17 : 1; + }; +} __B2D1bits_t; +extern volatile __B2D1bits_t __at (0xE47) B2D1bits; + +extern __sfr __at (0xE48) B2D2; +typedef union { + struct { + unsigned B2D20 : 1; + unsigned B2D21 : 1; + unsigned B2D22 : 1; + unsigned B2D23 : 1; + unsigned B2D24 : 1; + unsigned B2D25 : 1; + unsigned B2D26 : 1; + unsigned B2D27 : 1; + }; +} __B2D2bits_t; +extern volatile __B2D2bits_t __at (0xE48) B2D2bits; + +extern __sfr __at (0xE49) B2D3; +typedef union { + struct { + unsigned B2D30 : 1; + unsigned B2D31 : 1; + unsigned B2D32 : 1; + unsigned B2D33 : 1; + unsigned B2D34 : 1; + unsigned B2D35 : 1; + unsigned B2D36 : 1; + unsigned B2D37 : 1; + }; +} __B2D3bits_t; +extern volatile __B2D3bits_t __at (0xE49) B2D3bits; + +extern __sfr __at (0xE4A) B2D4; +typedef union { + struct { + unsigned B2D40 : 1; + unsigned B2D41 : 1; + unsigned B2D42 : 1; + unsigned B2D43 : 1; + unsigned B2D44 : 1; + unsigned B2D45 : 1; + unsigned B2D46 : 1; + unsigned B2D47 : 1; + }; +} __B2D4bits_t; +extern volatile __B2D4bits_t __at (0xE4A) B2D4bits; + +extern __sfr __at (0xE4B) B2D5; +typedef union { + struct { + unsigned B2D50 : 1; + unsigned B2D51 : 1; + unsigned B2D52 : 1; + unsigned B2D53 : 1; + unsigned B2D54 : 1; + unsigned B2D55 : 1; + unsigned B2D56 : 1; + unsigned B2D57 : 1; + }; +} __B2D5bits_t; +extern volatile __B2D5bits_t __at (0xE4B) B2D5bits; + +extern __sfr __at (0xE4C) B2D6; +typedef union { + struct { + unsigned B2D60 : 1; + unsigned B2D61 : 1; + unsigned B2D62 : 1; + unsigned B2D63 : 1; + unsigned B2D64 : 1; + unsigned B2D65 : 1; + unsigned B2D66 : 1; + unsigned B2D67 : 1; + }; +} __B2D6bits_t; +extern volatile __B2D6bits_t __at (0xE4C) B2D6bits; + +extern __sfr __at (0xE4D) B2D7; +typedef union { + struct { + unsigned B2D70 : 1; + unsigned B2D71 : 1; + unsigned B2D72 : 1; + unsigned B2D73 : 1; + unsigned B2D74 : 1; + unsigned B2D75 : 1; + unsigned B2D76 : 1; + unsigned B2D77 : 1; + }; +} __B2D7bits_t; +extern volatile __B2D7bits_t __at (0xE4D) B2D7bits; + +extern __sfr __at (0xE4E) CANSTAT_RO7; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO7bits_t; +extern volatile __CANSTAT_RO7bits_t __at (0xE4E) CANSTAT_RO7bits; + +extern __sfr __at (0xE4F) CANCON_RO7; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO7bits_t; +extern volatile __CANCON_RO7bits_t __at (0xE4F) CANCON_RO7bits; + +extern __sfr __at (0xE50) B3CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B3CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3CONbits_t; +extern volatile __B3CONbits_t __at (0xE50) B3CONbits; + +extern __sfr __at (0xE51) B3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B3SIDHbits_t; +extern volatile __B3SIDHbits_t __at (0xE51) B3SIDHbits; + +extern __sfr __at (0xE52) B3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3SIDLbits_t; +extern volatile __B3SIDLbits_t __at (0xE52) B3SIDLbits; + +extern __sfr __at (0xE53) B3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B3EIDHbits_t; +extern volatile __B3EIDHbits_t __at (0xE53) B3EIDHbits; + +extern __sfr __at (0xE54) B3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B3EIDLbits_t; +extern volatile __B3EIDLbits_t __at (0xE54) B3EIDLbits; + +extern __sfr __at (0xE55) B3DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B3DLC : 1; + unsigned RB1_B3DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B3DLCbits_t; +extern volatile __B3DLCbits_t __at (0xE55) B3DLCbits; + +extern __sfr __at (0xE56) B3D0; +typedef union { + struct { + unsigned B3D00 : 1; + unsigned B3D01 : 1; + unsigned B3D02 : 1; + unsigned B3D03 : 1; + unsigned B3D04 : 1; + unsigned B3D05 : 1; + unsigned B3D06 : 1; + unsigned B3D07 : 1; + }; +} __B3D0bits_t; +extern volatile __B3D0bits_t __at (0xE56) B3D0bits; + +extern __sfr __at (0xE57) B3D1; +typedef union { + struct { + unsigned B3D10 : 1; + unsigned B3D11 : 1; + unsigned B3D12 : 1; + unsigned B3D13 : 1; + unsigned B3D14 : 1; + unsigned B3D15 : 1; + unsigned B3D16 : 1; + unsigned B3D17 : 1; + }; +} __B3D1bits_t; +extern volatile __B3D1bits_t __at (0xE57) B3D1bits; + +extern __sfr __at (0xE58) B3D2; +typedef union { + struct { + unsigned B3D20 : 1; + unsigned B3D21 : 1; + unsigned B3D22 : 1; + unsigned B3D23 : 1; + unsigned B3D24 : 1; + unsigned B3D25 : 1; + unsigned B3D26 : 1; + unsigned B3D27 : 1; + }; +} __B3D2bits_t; +extern volatile __B3D2bits_t __at (0xE58) B3D2bits; + +extern __sfr __at (0xE59) B3D3; +typedef union { + struct { + unsigned B3D30 : 1; + unsigned B3D31 : 1; + unsigned B3D32 : 1; + unsigned B3D33 : 1; + unsigned B3D34 : 1; + unsigned B3D35 : 1; + unsigned B3D36 : 1; + unsigned B3D37 : 1; + }; +} __B3D3bits_t; +extern volatile __B3D3bits_t __at (0xE59) B3D3bits; + +extern __sfr __at (0xE5A) B3D4; +typedef union { + struct { + unsigned B3D40 : 1; + unsigned B3D41 : 1; + unsigned B3D42 : 1; + unsigned B3D43 : 1; + unsigned B3D44 : 1; + unsigned B3D45 : 1; + unsigned B3D46 : 1; + unsigned B3D47 : 1; + }; +} __B3D4bits_t; +extern volatile __B3D4bits_t __at (0xE5A) B3D4bits; + +extern __sfr __at (0xE5B) B3D5; +typedef union { + struct { + unsigned B3D50 : 1; + unsigned B3D51 : 1; + unsigned B3D52 : 1; + unsigned B3D53 : 1; + unsigned B3D54 : 1; + unsigned B3D55 : 1; + unsigned B3D56 : 1; + unsigned B3D57 : 1; + }; +} __B3D5bits_t; +extern volatile __B3D5bits_t __at (0xE5B) B3D5bits; + +extern __sfr __at (0xE5C) B3D6; +typedef union { + struct { + unsigned B3D60 : 1; + unsigned B3D61 : 1; + unsigned B3D62 : 1; + unsigned B3D63 : 1; + unsigned B3D64 : 1; + unsigned B3D65 : 1; + unsigned B3D66 : 1; + unsigned B3D67 : 1; + }; +} __B3D6bits_t; +extern volatile __B3D6bits_t __at (0xE5C) B3D6bits; + +extern __sfr __at (0xE5D) B3D7; +typedef union { + struct { + unsigned B3D70 : 1; + unsigned B3D71 : 1; + unsigned B3D72 : 1; + unsigned B3D73 : 1; + unsigned B3D74 : 1; + unsigned B3D75 : 1; + unsigned B3D76 : 1; + unsigned B3D77 : 1; + }; +} __B3D7bits_t; +extern volatile __B3D7bits_t __at (0xE5D) B3D7bits; + +extern __sfr __at (0xE5E) CANSTAT_RO6; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO6bits_t; +extern volatile __CANSTAT_RO6bits_t __at (0xE5E) CANSTAT_RO6bits; + +extern __sfr __at (0xE5F) CANCON_RO6; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO6bits_t; +extern volatile __CANCON_RO6bits_t __at (0xE5F) CANCON_RO6bits; + +extern __sfr __at (0xE60) B4CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B4CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4CONbits_t; +extern volatile __B4CONbits_t __at (0xE60) B4CONbits; + +extern __sfr __at (0xE61) B4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B4SIDHbits_t; +extern volatile __B4SIDHbits_t __at (0xE61) B4SIDHbits; + +extern __sfr __at (0xE62) B4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4SIDLbits_t; +extern volatile __B4SIDLbits_t __at (0xE62) B4SIDLbits; + +extern __sfr __at (0xE63) B4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B4EIDHbits_t; +extern volatile __B4EIDHbits_t __at (0xE63) B4EIDHbits; + +extern __sfr __at (0xE64) B4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B4EIDLbits_t; +extern volatile __B4EIDLbits_t __at (0xE64) B4EIDLbits; + +extern __sfr __at (0xE65) B4DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B4DLC : 1; + unsigned RB1_B4DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B4DLCbits_t; +extern volatile __B4DLCbits_t __at (0xE65) B4DLCbits; + +extern __sfr __at (0xE66) B4D0; +typedef union { + struct { + unsigned B4D00 : 1; + unsigned B4D01 : 1; + unsigned B4D02 : 1; + unsigned B4D03 : 1; + unsigned B4D04 : 1; + unsigned B4D05 : 1; + unsigned B4D06 : 1; + unsigned B4D07 : 1; + }; +} __B4D0bits_t; +extern volatile __B4D0bits_t __at (0xE66) B4D0bits; + +extern __sfr __at (0xE67) B4D1; +typedef union { + struct { + unsigned B4D10 : 1; + unsigned B4D11 : 1; + unsigned B4D12 : 1; + unsigned B4D13 : 1; + unsigned B4D14 : 1; + unsigned B4D15 : 1; + unsigned B4D16 : 1; + unsigned B4D17 : 1; + }; +} __B4D1bits_t; +extern volatile __B4D1bits_t __at (0xE67) B4D1bits; + +extern __sfr __at (0xE68) B4D2; +typedef union { + struct { + unsigned B4D20 : 1; + unsigned B4D21 : 1; + unsigned B4D22 : 1; + unsigned B4D23 : 1; + unsigned B4D24 : 1; + unsigned B4D25 : 1; + unsigned B4D26 : 1; + unsigned B4D27 : 1; + }; +} __B4D2bits_t; +extern volatile __B4D2bits_t __at (0xE68) B4D2bits; + +extern __sfr __at (0xE69) B4D3; +typedef union { + struct { + unsigned B4D30 : 1; + unsigned B4D31 : 1; + unsigned B4D32 : 1; + unsigned B4D33 : 1; + unsigned B4D34 : 1; + unsigned B4D35 : 1; + unsigned B4D36 : 1; + unsigned B4D37 : 1; + }; +} __B4D3bits_t; +extern volatile __B4D3bits_t __at (0xE69) B4D3bits; + +extern __sfr __at (0xE6A) B4D4; +typedef union { + struct { + unsigned B4D40 : 1; + unsigned B4D41 : 1; + unsigned B4D42 : 1; + unsigned B4D43 : 1; + unsigned B4D44 : 1; + unsigned B4D45 : 1; + unsigned B4D46 : 1; + unsigned B4D47 : 1; + }; +} __B4D4bits_t; +extern volatile __B4D4bits_t __at (0xE6A) B4D4bits; + +extern __sfr __at (0xE6B) B4D5; +typedef union { + struct { + unsigned B4D50 : 1; + unsigned B4D51 : 1; + unsigned B4D52 : 1; + unsigned B4D53 : 1; + unsigned B4D54 : 1; + unsigned B4D55 : 1; + unsigned B4D56 : 1; + unsigned B4D57 : 1; + }; +} __B4D5bits_t; +extern volatile __B4D5bits_t __at (0xE6B) B4D5bits; + +extern __sfr __at (0xE6C) B4D6; +typedef union { + struct { + unsigned B4D60 : 1; + unsigned B4D61 : 1; + unsigned B4D62 : 1; + unsigned B4D63 : 1; + unsigned B4D64 : 1; + unsigned B4D65 : 1; + unsigned B4D66 : 1; + unsigned B4D67 : 1; + }; +} __B4D6bits_t; +extern volatile __B4D6bits_t __at (0xE6C) B4D6bits; + +extern __sfr __at (0xE6D) B4D7; +typedef union { + struct { + unsigned B4D70 : 1; + unsigned B4D71 : 1; + unsigned B4D72 : 1; + unsigned B4D73 : 1; + unsigned B4D74 : 1; + unsigned B4D75 : 1; + unsigned B4D76 : 1; + unsigned B46D77 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B4D77 : 1; + }; +} __B4D7bits_t; +extern volatile __B4D7bits_t __at (0xE6D) B4D7bits; + +extern __sfr __at (0xE6E) CANSTAT_RO5; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO5bits_t; +extern volatile __CANSTAT_RO5bits_t __at (0xE6E) CANSTAT_RO5bits; + +extern __sfr __at (0xE6F) CANCON_RO5; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO5bits_t; +extern volatile __CANCON_RO5bits_t __at (0xE6F) CANCON_RO5bits; + +extern __sfr __at (0xE70) B5CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B5CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5CONbits_t; +extern volatile __B5CONbits_t __at (0xE70) B5CONbits; + +extern __sfr __at (0xE71) B5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B5SIDHbits_t; +extern volatile __B5SIDHbits_t __at (0xE71) B5SIDHbits; + +extern __sfr __at (0xE72) B5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5SIDLbits_t; +extern volatile __B5SIDLbits_t __at (0xE72) B5SIDLbits; + +extern __sfr __at (0xE73) B5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B5EIDHbits_t; +extern volatile __B5EIDHbits_t __at (0xE73) B5EIDHbits; + +extern __sfr __at (0xE74) B5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B5EIDLbits_t; +extern volatile __B5EIDLbits_t __at (0xE74) B5EIDLbits; + +extern __sfr __at (0xE75) B5DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B5DLC : 1; + unsigned RB1_B5DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5DLCbits_t; +extern volatile __B5DLCbits_t __at (0xE75) B5DLCbits; + +extern __sfr __at (0xE76) B5D0; +typedef union { + struct { + unsigned B5D00 : 1; + unsigned B5D01 : 1; + unsigned B5D02 : 1; + unsigned B5D03 : 1; + unsigned B5D04 : 1; + unsigned B5D05 : 1; + unsigned B5D06 : 1; + unsigned B57D07 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D07 : 1; + }; +} __B5D0bits_t; +extern volatile __B5D0bits_t __at (0xE76) B5D0bits; + +extern __sfr __at (0xE77) B5D1; +typedef union { + struct { + unsigned B5D10 : 1; + unsigned B5D11 : 1; + unsigned B5D12 : 1; + unsigned B5D13 : 1; + unsigned B5D14 : 1; + unsigned B5D15 : 1; + unsigned B5D16 : 1; + unsigned B5D17 : 1; + }; +} __B5D1bits_t; +extern volatile __B5D1bits_t __at (0xE77) B5D1bits; + +extern __sfr __at (0xE78) B5D2; +typedef union { + struct { + unsigned B5D20 : 1; + unsigned B5D21 : 1; + unsigned B5D22 : 1; + unsigned B57D23 : 1; + unsigned B5D24 : 1; + unsigned B5D25 : 1; + unsigned B5D26 : 1; + unsigned B5D27 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D23 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5D2bits_t; +extern volatile __B5D2bits_t __at (0xE78) B5D2bits; + +extern __sfr __at (0xE79) B5D3; +typedef union { + struct { + unsigned B5D30 : 1; + unsigned B5D31 : 1; + unsigned B5D32 : 1; + unsigned B5D33 : 1; + unsigned B5D34 : 1; + unsigned B5D35 : 1; + unsigned B5D36 : 1; + unsigned B5D37 : 1; + }; +} __B5D3bits_t; +extern volatile __B5D3bits_t __at (0xE79) B5D3bits; + +extern __sfr __at (0xE7A) B5D4; +typedef union { + struct { + unsigned B5D40 : 1; + unsigned B5D41 : 1; + unsigned B5D42 : 1; + unsigned B5D43 : 1; + unsigned B5D44 : 1; + unsigned B5D45 : 1; + unsigned B5D46 : 1; + unsigned B5D47 : 1; + }; +} __B5D4bits_t; +extern volatile __B5D4bits_t __at (0xE7A) B5D4bits; + +extern __sfr __at (0xE7B) B5D5; +typedef union { + struct { + unsigned B5D50 : 1; + unsigned B5D51 : 1; + unsigned B5D52 : 1; + unsigned B5D53 : 1; + unsigned B5D54 : 1; + unsigned B5D55 : 1; + unsigned B5D56 : 1; + unsigned B5D57 : 1; + }; +} __B5D5bits_t; +extern volatile __B5D5bits_t __at (0xE7B) B5D5bits; + +extern __sfr __at (0xE7C) B5D6; +typedef union { + struct { + unsigned B5D60 : 1; + unsigned B5D61 : 1; + unsigned B5D62 : 1; + unsigned B5D63 : 1; + unsigned B5D64 : 1; + unsigned B5D65 : 1; + unsigned B5D66 : 1; + unsigned B5D67 : 1; + }; +} __B5D6bits_t; +extern volatile __B5D6bits_t __at (0xE7C) B5D6bits; + +extern __sfr __at (0xE7D) B5D7; +typedef union { + struct { + unsigned B5D70 : 1; + unsigned B5D71 : 1; + unsigned B5D72 : 1; + unsigned B5D73 : 1; + unsigned B5D74 : 1; + unsigned B5D75 : 1; + unsigned B5D76 : 1; + unsigned B5D77 : 1; + }; +} __B5D7bits_t; +extern volatile __B5D7bits_t __at (0xE7D) B5D7bits; + +extern __sfr __at (0xE7E) CANSTAT_RO4; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO4bits_t; +extern volatile __CANSTAT_RO4bits_t __at (0xE7E) CANSTAT_RO4bits; + +extern __sfr __at (0xE7F) CANCON_RO4; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO4bits_t; +extern volatile __CANCON_RO4bits_t __at (0xE7F) CANCON_RO4bits; + +extern __sfr __at (0xF00) RXF0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF0SIDHbits_t; +extern volatile __RXF0SIDHbits_t __at (0xF00) RXF0SIDHbits; + +extern __sfr __at (0xF01) RXF0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF0SIDLbits_t; +extern volatile __RXF0SIDLbits_t __at (0xF01) RXF0SIDLbits; + +extern __sfr __at (0xF02) RXF0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF0EIDHbits_t; +extern volatile __RXF0EIDHbits_t __at (0xF02) RXF0EIDHbits; + +extern __sfr __at (0xF03) RXF0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF0EIDLbits_t; +extern volatile __RXF0EIDLbits_t __at (0xF03) RXF0EIDLbits; + +extern __sfr __at (0xF04) RXF1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF1SIDHbits_t; +extern volatile __RXF1SIDHbits_t __at (0xF04) RXF1SIDHbits; + +extern __sfr __at (0xF05) RXF1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF1SIDLbits_t; +extern volatile __RXF1SIDLbits_t __at (0xF05) RXF1SIDLbits; + +extern __sfr __at (0xF06) RXF1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF1EIDHbits_t; +extern volatile __RXF1EIDHbits_t __at (0xF06) RXF1EIDHbits; + +extern __sfr __at (0xF07) RXF1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF1EIDLbits_t; +extern volatile __RXF1EIDLbits_t __at (0xF07) RXF1EIDLbits; + +extern __sfr __at (0xF08) RXF2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF2SIDHbits_t; +extern volatile __RXF2SIDHbits_t __at (0xF08) RXF2SIDHbits; + +extern __sfr __at (0xF09) RXF2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF2SIDLbits_t; +extern volatile __RXF2SIDLbits_t __at (0xF09) RXF2SIDLbits; + +extern __sfr __at (0xF0A) RXF2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF2EIDHbits_t; +extern volatile __RXF2EIDHbits_t __at (0xF0A) RXF2EIDHbits; + +extern __sfr __at (0xF0B) RXF2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF2EIDLbits_t; +extern volatile __RXF2EIDLbits_t __at (0xF0B) RXF2EIDLbits; + +extern __sfr __at (0xF0C) RXF3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF3SIDHbits_t; +extern volatile __RXF3SIDHbits_t __at (0xF0C) RXF3SIDHbits; + +extern __sfr __at (0xF0D) RXF3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF3SIDLbits_t; +extern volatile __RXF3SIDLbits_t __at (0xF0D) RXF3SIDLbits; + +extern __sfr __at (0xF0E) RXF3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF3EIDHbits_t; +extern volatile __RXF3EIDHbits_t __at (0xF0E) RXF3EIDHbits; + +extern __sfr __at (0xF0F) RXF3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF3EIDLbits_t; +extern volatile __RXF3EIDLbits_t __at (0xF0F) RXF3EIDLbits; + +extern __sfr __at (0xF10) RXF4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF4SIDHbits_t; +extern volatile __RXF4SIDHbits_t __at (0xF10) RXF4SIDHbits; + +extern __sfr __at (0xF11) RXF4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF4SIDLbits_t; +extern volatile __RXF4SIDLbits_t __at (0xF11) RXF4SIDLbits; + +extern __sfr __at (0xF12) RXF4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF4EIDHbits_t; +extern volatile __RXF4EIDHbits_t __at (0xF12) RXF4EIDHbits; + +extern __sfr __at (0xF13) RXF4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF4EIDLbits_t; +extern volatile __RXF4EIDLbits_t __at (0xF13) RXF4EIDLbits; + +extern __sfr __at (0xF14) RXF5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF5SIDHbits_t; +extern volatile __RXF5SIDHbits_t __at (0xF14) RXF5SIDHbits; + +extern __sfr __at (0xF15) RXF5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF5SIDLbits_t; +extern volatile __RXF5SIDLbits_t __at (0xF15) RXF5SIDLbits; + +extern __sfr __at (0xF16) RXF5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF5EIDHbits_t; +extern volatile __RXF5EIDHbits_t __at (0xF16) RXF5EIDHbits; + +extern __sfr __at (0xF17) RXF5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF5EIDLbits_t; +extern volatile __RXF5EIDLbits_t __at (0xF17) RXF5EIDLbits; + +extern __sfr __at (0xF18) RXM0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM0SIDHbits_t; +extern volatile __RXM0SIDHbits_t __at (0xF18) RXM0SIDHbits; + +extern __sfr __at (0xF19) RXM0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM0SIDLbits_t; +extern volatile __RXM0SIDLbits_t __at (0xF19) RXM0SIDLbits; + +extern __sfr __at (0xF1A) RXM0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM0EIDHbits_t; +extern volatile __RXM0EIDHbits_t __at (0xF1A) RXM0EIDHbits; + +extern __sfr __at (0xF1B) RXM0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM0EIDLbits_t; +extern volatile __RXM0EIDLbits_t __at (0xF1B) RXM0EIDLbits; + +extern __sfr __at (0xF1C) RXM1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM1SIDHbits_t; +extern volatile __RXM1SIDHbits_t __at (0xF1C) RXM1SIDHbits; + +extern __sfr __at (0xF1D) RXM1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM1SIDLbits_t; +extern volatile __RXM1SIDLbits_t __at (0xF1D) RXM1SIDLbits; + +extern __sfr __at (0xF1E) RXM1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM1EIDHbits_t; +extern volatile __RXM1EIDHbits_t __at (0xF1E) RXM1EIDHbits; + +extern __sfr __at (0xF1F) RXM1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM1EIDLbits_t; +extern volatile __RXM1EIDLbits_t __at (0xF1F) RXM1EIDLbits; + +extern __sfr __at (0xF20) TXB2CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFBXB2CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB2CONbits_t; +extern volatile __TXB2CONbits_t __at (0xF20) TXB2CONbits; + +extern __sfr __at (0xF21) TXB2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB2SIDHbits_t; +extern volatile __TXB2SIDHbits_t __at (0xF21) TXB2SIDHbits; + +extern __sfr __at (0xF22) TXB2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB2SIDLbits_t; +extern volatile __TXB2SIDLbits_t __at (0xF22) TXB2SIDLbits; + +extern __sfr __at (0xF23) TXB2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB2EIDHbits_t; +extern volatile __TXB2EIDHbits_t __at (0xF23) TXB2EIDHbits; + +extern __sfr __at (0xF24) TXB2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB2EIDLbits_t; +extern volatile __TXB2EIDLbits_t __at (0xF24) TXB2EIDLbits; + +extern __sfr __at (0xF25) TXB2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB2DLCbits_t; +extern volatile __TXB2DLCbits_t __at (0xF25) TXB2DLCbits; + +extern __sfr __at (0xF26) TXB2D0; +typedef union { + struct { + unsigned TXB2D00 : 1; + unsigned TXB2D01 : 1; + unsigned TXB2D02 : 1; + unsigned TXB2D03 : 1; + unsigned TXB2D04 : 1; + unsigned TXB2D05 : 1; + unsigned TXB2D06 : 1; + unsigned TXB2D07 : 1; + }; +} __TXB2D0bits_t; +extern volatile __TXB2D0bits_t __at (0xF26) TXB2D0bits; + +extern __sfr __at (0xF27) TXB2D1; +typedef union { + struct { + unsigned TXB2D10 : 1; + unsigned TXB2D11 : 1; + unsigned TXB2D12 : 1; + unsigned TXB2D13 : 1; + unsigned TXB2D14 : 1; + unsigned TXB2D15 : 1; + unsigned TXB2D16 : 1; + unsigned TXB2D17 : 1; + }; +} __TXB2D1bits_t; +extern volatile __TXB2D1bits_t __at (0xF27) TXB2D1bits; + +extern __sfr __at (0xF28) TXB2D2; +typedef union { + struct { + unsigned TXB2D20 : 1; + unsigned TXB2D21 : 1; + unsigned TXB2D22 : 1; + unsigned TXB2D23 : 1; + unsigned TXB2D24 : 1; + unsigned TXB2D25 : 1; + unsigned TXB2D26 : 1; + unsigned TXB2D27 : 1; + }; +} __TXB2D2bits_t; +extern volatile __TXB2D2bits_t __at (0xF28) TXB2D2bits; + +extern __sfr __at (0xF29) TXB2D3; +typedef union { + struct { + unsigned TXB2D30 : 1; + unsigned TXB2D31 : 1; + unsigned TXB2D32 : 1; + unsigned TXB2D33 : 1; + unsigned TXB2D34 : 1; + unsigned TXB2D35 : 1; + unsigned TXB2D36 : 1; + unsigned TXB2D37 : 1; + }; +} __TXB2D3bits_t; +extern volatile __TXB2D3bits_t __at (0xF29) TXB2D3bits; + +extern __sfr __at (0xF2A) TXB2D4; +typedef union { + struct { + unsigned TXB2D40 : 1; + unsigned TXB2D41 : 1; + unsigned TXB2D42 : 1; + unsigned TXB2D43 : 1; + unsigned TXB2D44 : 1; + unsigned TXB2D45 : 1; + unsigned TXB2D46 : 1; + unsigned TXB2D47 : 1; + }; +} __TXB2D4bits_t; +extern volatile __TXB2D4bits_t __at (0xF2A) TXB2D4bits; + +extern __sfr __at (0xF2B) TXB2D5; +typedef union { + struct { + unsigned TXB2D50 : 1; + unsigned TXB2D51 : 1; + unsigned TXB2D52 : 1; + unsigned TXB2D53 : 1; + unsigned TXB2D54 : 1; + unsigned TXB2D55 : 1; + unsigned TXB2D56 : 1; + unsigned TXB2D57 : 1; + }; +} __TXB2D5bits_t; +extern volatile __TXB2D5bits_t __at (0xF2B) TXB2D5bits; + +extern __sfr __at (0xF2C) TXB2D6; +typedef union { + struct { + unsigned TXB2D60 : 1; + unsigned TXB2D61 : 1; + unsigned TXB2D62 : 1; + unsigned TXB2D63 : 1; + unsigned TXB2D64 : 1; + unsigned TXB2D65 : 1; + unsigned TXB2D66 : 1; + unsigned TXB2D67 : 1; + }; +} __TXB2D6bits_t; +extern volatile __TXB2D6bits_t __at (0xF2C) TXB2D6bits; + +extern __sfr __at (0xF2D) TXB2D7; +typedef union { + struct { + unsigned TXB2D70 : 1; + unsigned TXB2D71 : 1; + unsigned TXB2D72 : 1; + unsigned TXB2D73 : 1; + unsigned TXB2D74 : 1; + unsigned TXB2D75 : 1; + unsigned TXB2D76 : 1; + unsigned TXB2D77 : 1; + }; +} __TXB2D7bits_t; +extern volatile __TXB2D7bits_t __at (0xF2D) TXB2D7bits; + +extern __sfr __at (0xF2E) CANSTAT_RO3; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO3bits_t; +extern volatile __CANSTAT_RO3bits_t __at (0xF2E) CANSTAT_RO3bits; + +extern __sfr __at (0xF2F) CANCON_RO3; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO3bits_t; +extern volatile __CANCON_RO3bits_t __at (0xF2F) CANCON_RO3bits; + +extern __sfr __at (0xF30) TXB1CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFTXB1CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB1CONbits_t; +extern volatile __TXB1CONbits_t __at (0xF30) TXB1CONbits; + +extern __sfr __at (0xF31) TXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB1SIDHbits_t; +extern volatile __TXB1SIDHbits_t __at (0xF31) TXB1SIDHbits; + +extern __sfr __at (0xF32) TXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB1SIDLbits_t; +extern volatile __TXB1SIDLbits_t __at (0xF32) TXB1SIDLbits; + +extern __sfr __at (0xF33) TXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB1EIDHbits_t; +extern volatile __TXB1EIDHbits_t __at (0xF33) TXB1EIDHbits; + +extern __sfr __at (0xF34) TXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB1EIDLbits_t; +extern volatile __TXB1EIDLbits_t __at (0xF34) TXB1EIDLbits; + +extern __sfr __at (0xF35) TXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB1DLCbits_t; +extern volatile __TXB1DLCbits_t __at (0xF35) TXB1DLCbits; + +extern __sfr __at (0xF36) TXB1D0; +typedef union { + struct { + unsigned TXB1D00 : 1; + unsigned TXB1D01 : 1; + unsigned TXB1D02 : 1; + unsigned TXB1D03 : 1; + unsigned TXB1D04 : 1; + unsigned TXB1D05 : 1; + unsigned TXB1D06 : 1; + unsigned TXB1D07 : 1; + }; +} __TXB1D0bits_t; +extern volatile __TXB1D0bits_t __at (0xF36) TXB1D0bits; + +extern __sfr __at (0xF37) TXB1D1; +typedef union { + struct { + unsigned TXB1D10 : 1; + unsigned TXB1D11 : 1; + unsigned TXB1D12 : 1; + unsigned TXB1D13 : 1; + unsigned TXB1D14 : 1; + unsigned TXB1D15 : 1; + unsigned TXB1D16 : 1; + unsigned TXB1D17 : 1; + }; +} __TXB1D1bits_t; +extern volatile __TXB1D1bits_t __at (0xF37) TXB1D1bits; + +extern __sfr __at (0xF38) TXB1D2; +typedef union { + struct { + unsigned TXB1D20 : 1; + unsigned TXB1D21 : 1; + unsigned TXB1D22 : 1; + unsigned TXB1D23 : 1; + unsigned TXB1D24 : 1; + unsigned TXB1D25 : 1; + unsigned TXB1D26 : 1; + unsigned TXB1D27 : 1; + }; +} __TXB1D2bits_t; +extern volatile __TXB1D2bits_t __at (0xF38) TXB1D2bits; + +extern __sfr __at (0xF39) TXB1D3; +typedef union { + struct { + unsigned TXB1D30 : 1; + unsigned TXB1D31 : 1; + unsigned TXB1D32 : 1; + unsigned TXB1D33 : 1; + unsigned TXB1D34 : 1; + unsigned TXB1D35 : 1; + unsigned TXB1D36 : 1; + unsigned TXB1D37 : 1; + }; +} __TXB1D3bits_t; +extern volatile __TXB1D3bits_t __at (0xF39) TXB1D3bits; + +extern __sfr __at (0xF3A) TXB1D4; +typedef union { + struct { + unsigned TXB1D40 : 1; + unsigned TXB1D41 : 1; + unsigned TXB1D42 : 1; + unsigned TXB1D43 : 1; + unsigned TXB1D44 : 1; + unsigned TXB1D45 : 1; + unsigned TXB1D46 : 1; + unsigned TXB1D47 : 1; + }; +} __TXB1D4bits_t; +extern volatile __TXB1D4bits_t __at (0xF3A) TXB1D4bits; + +extern __sfr __at (0xF3B) TXB1D5; +typedef union { + struct { + unsigned TXB1D50 : 1; + unsigned TXB1D51 : 1; + unsigned TXB1D52 : 1; + unsigned TXB1D53 : 1; + unsigned TXB1D54 : 1; + unsigned TXB1D55 : 1; + unsigned TXB1D56 : 1; + unsigned TXB1D57 : 1; + }; +} __TXB1D5bits_t; +extern volatile __TXB1D5bits_t __at (0xF3B) TXB1D5bits; + +extern __sfr __at (0xF3C) TXB1D6; +typedef union { + struct { + unsigned TXB1D60 : 1; + unsigned TXB1D61 : 1; + unsigned TXB1D62 : 1; + unsigned TXB1D63 : 1; + unsigned TXB1D64 : 1; + unsigned TXB1D65 : 1; + unsigned TXB1D66 : 1; + unsigned TXB1D67 : 1; + }; +} __TXB1D6bits_t; +extern volatile __TXB1D6bits_t __at (0xF3C) TXB1D6bits; + +extern __sfr __at (0xF3D) TXB1D7; +typedef union { + struct { + unsigned TXB1D70 : 1; + unsigned TXB1D71 : 1; + unsigned TXB1D72 : 1; + unsigned TXB1D73 : 1; + unsigned TXB1D74 : 1; + unsigned TXB1D75 : 1; + unsigned TXB1D76 : 1; + unsigned TXB1D77 : 1; + }; +} __TXB1D7bits_t; +extern volatile __TXB1D7bits_t __at (0xF3D) TXB1D7bits; + +extern __sfr __at (0xF3E) CANSTAT_RO2; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO2bits_t; +extern volatile __CANSTAT_RO2bits_t __at (0xF3E) CANSTAT_RO2bits; + +extern __sfr __at (0xF3F) CANCON_RO2; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO2bits_t; +extern volatile __CANCON_RO2bits_t __at (0xF3F) CANCON_RO2bits; + +extern __sfr __at (0xF40) TXB0CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; +} __TXB0CONbits_t; +extern volatile __TXB0CONbits_t __at (0xF40) TXB0CONbits; + +extern __sfr __at (0xF41) TXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB0SIDHbits_t; +extern volatile __TXB0SIDHbits_t __at (0xF41) TXB0SIDHbits; + +extern __sfr __at (0xF42) TXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB0SIDLbits_t; +extern volatile __TXB0SIDLbits_t __at (0xF42) TXB0SIDLbits; + +extern __sfr __at (0xF43) TXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB0EIDHbits_t; +extern volatile __TXB0EIDHbits_t __at (0xF43) TXB0EIDHbits; + +extern __sfr __at (0xF44) TXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB0EIDLbits_t; +extern volatile __TXB0EIDLbits_t __at (0xF44) TXB0EIDLbits; + +extern __sfr __at (0xF45) TXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB0DLCbits_t; +extern volatile __TXB0DLCbits_t __at (0xF45) TXB0DLCbits; + +extern __sfr __at (0xF46) TXB0D0; +typedef union { + struct { + unsigned TXB0D00 : 1; + unsigned TXB0D01 : 1; + unsigned TXB0D02 : 1; + unsigned TXB0D03 : 1; + unsigned TXB0D04 : 1; + unsigned TXB0D05 : 1; + unsigned TXB0D06 : 1; + unsigned TXB0D07 : 1; + }; +} __TXB0D0bits_t; +extern volatile __TXB0D0bits_t __at (0xF46) TXB0D0bits; + +extern __sfr __at (0xF47) TXB0D1; +typedef union { + struct { + unsigned TXB0D10 : 1; + unsigned TXB0D11 : 1; + unsigned TXB0D12 : 1; + unsigned TXB0D13 : 1; + unsigned TXB0D14 : 1; + unsigned TXB0D15 : 1; + unsigned TXB0D16 : 1; + unsigned TXB0D17 : 1; + }; +} __TXB0D1bits_t; +extern volatile __TXB0D1bits_t __at (0xF47) TXB0D1bits; + +extern __sfr __at (0xF48) TXB0D2; +typedef union { + struct { + unsigned TXB0D20 : 1; + unsigned TXB0D21 : 1; + unsigned TXB0D22 : 1; + unsigned TXB0D23 : 1; + unsigned TXB0D24 : 1; + unsigned TXB0D25 : 1; + unsigned TXB0D26 : 1; + unsigned TXB0D27 : 1; + }; +} __TXB0D2bits_t; +extern volatile __TXB0D2bits_t __at (0xF48) TXB0D2bits; + +extern __sfr __at (0xF49) TXB0D3; +typedef union { + struct { + unsigned TXB0D30 : 1; + unsigned TXB0D31 : 1; + unsigned TXB0D32 : 1; + unsigned TXB0D33 : 1; + unsigned TXB0D34 : 1; + unsigned TXB0D35 : 1; + unsigned TXB0D36 : 1; + unsigned TXB0D37 : 1; + }; +} __TXB0D3bits_t; +extern volatile __TXB0D3bits_t __at (0xF49) TXB0D3bits; + +extern __sfr __at (0xF4A) TXB0D4; +typedef union { + struct { + unsigned TXB0D40 : 1; + unsigned TXB0D41 : 1; + unsigned TXB0D42 : 1; + unsigned TXB0D43 : 1; + unsigned TXB0D44 : 1; + unsigned TXB0D45 : 1; + unsigned TXB0D46 : 1; + unsigned TXB0D47 : 1; + }; +} __TXB0D4bits_t; +extern volatile __TXB0D4bits_t __at (0xF4A) TXB0D4bits; + +extern __sfr __at (0xF4B) TXB0D5; +typedef union { + struct { + unsigned TXB0D50 : 1; + unsigned TXB0D51 : 1; + unsigned TXB0D52 : 1; + unsigned TXB0D53 : 1; + unsigned TXB0D54 : 1; + unsigned TXB0D55 : 1; + unsigned TXB0D56 : 1; + unsigned TXB0D57 : 1; + }; +} __TXB0D5bits_t; +extern volatile __TXB0D5bits_t __at (0xF4B) TXB0D5bits; + +extern __sfr __at (0xF4C) TXB0D6; +typedef union { + struct { + unsigned TXB0D60 : 1; + unsigned TXB0D61 : 1; + unsigned TXB0D62 : 1; + unsigned TXB0D63 : 1; + unsigned TXB0D64 : 1; + unsigned TXB0D65 : 1; + unsigned TXB0D66 : 1; + unsigned TXB0D67 : 1; + }; +} __TXB0D6bits_t; +extern volatile __TXB0D6bits_t __at (0xF4C) TXB0D6bits; + +extern __sfr __at (0xF4D) TXB0D7; +typedef union { + struct { + unsigned TXB0D70 : 1; + unsigned TXB0D71 : 1; + unsigned TXB0D72 : 1; + unsigned TXB0D73 : 1; + unsigned TXB0D74 : 1; + unsigned TXB0D75 : 1; + unsigned TXB0D76 : 1; + unsigned TXB0D77 : 1; + }; +} __TXB0D7bits_t; +extern volatile __TXB0D7bits_t __at (0xF4D) TXB0D7bits; + +extern __sfr __at (0xF4E) CANSTAT_RO1; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO1bits_t; +extern volatile __CANSTAT_RO1bits_t __at (0xF4E) CANSTAT_RO1bits; + +extern __sfr __at (0xF4F) CANCON_RO1; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO1bits_t; +extern volatile __CANCON_RO1bits_t __at (0xF4F) CANCON_RO1bits; + +extern __sfr __at (0xF50) RXB1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned RXRTRRO_RXB1CON : 1; + unsigned FILHIT4 : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned FILHIT3 : 1; + unsigned : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1CONbits_t; +extern volatile __RXB1CONbits_t __at (0xF50) RXB1CONbits; + +extern __sfr __at (0xF51) RXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB1SIDHbits_t; +extern volatile __RXB1SIDHbits_t __at (0xF51) RXB1SIDHbits; + +extern __sfr __at (0xF52) RXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB1SIDLbits_t; +extern volatile __RXB1SIDLbits_t __at (0xF52) RXB1SIDLbits; + +extern __sfr __at (0xF53) RXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB1EIDHbits_t; +extern volatile __RXB1EIDHbits_t __at (0xF53) RXB1EIDHbits; + +extern __sfr __at (0xF54) RXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB1EIDLbits_t; +extern volatile __RXB1EIDLbits_t __at (0xF54) RXB1EIDLbits; + +extern __sfr __at (0xF55) RXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB1DLC : 1; + unsigned RB1_RXB1DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1DLCbits_t; +extern volatile __RXB1DLCbits_t __at (0xF55) RXB1DLCbits; + +extern __sfr __at (0xF56) RXB1D0; +typedef union { + struct { + unsigned RXB1D00 : 1; + unsigned RXB1D01 : 1; + unsigned RXB1D02 : 1; + unsigned RXB1D03 : 1; + unsigned RXB1D04 : 1; + unsigned RXB1D05 : 1; + unsigned RXB1D06 : 1; + unsigned RXB1D07 : 1; + }; +} __RXB1D0bits_t; +extern volatile __RXB1D0bits_t __at (0xF56) RXB1D0bits; + +extern __sfr __at (0xF57) RXB1D1; +typedef union { + struct { + unsigned RXB1D10 : 1; + unsigned RXB1D11 : 1; + unsigned RXB1D12 : 1; + unsigned RXB1D13 : 1; + unsigned RXB1D14 : 1; + unsigned RXB1D15 : 1; + unsigned RXB1D16 : 1; + unsigned RXB1D17 : 1; + }; +} __RXB1D1bits_t; +extern volatile __RXB1D1bits_t __at (0xF57) RXB1D1bits; + +extern __sfr __at (0xF58) RXB1D2; +typedef union { + struct { + unsigned RXB1D20 : 1; + unsigned RXB1D21 : 1; + unsigned RXB1D22 : 1; + unsigned RXB1D23 : 1; + unsigned RXB1D24 : 1; + unsigned RXB1D25 : 1; + unsigned RXB1D26 : 1; + unsigned RXB1D27 : 1; + }; +} __RXB1D2bits_t; +extern volatile __RXB1D2bits_t __at (0xF58) RXB1D2bits; + +extern __sfr __at (0xF59) RXB1D3; +typedef union { + struct { + unsigned RXB1D30 : 1; + unsigned RXB1D31 : 1; + unsigned RXB1D32 : 1; + unsigned RXB1D33 : 1; + unsigned RXB1D34 : 1; + unsigned RXB1D35 : 1; + unsigned RXB1D36 : 1; + unsigned RXB1D37 : 1; + }; +} __RXB1D3bits_t; +extern volatile __RXB1D3bits_t __at (0xF59) RXB1D3bits; + +extern __sfr __at (0xF5A) RXB1D4; +typedef union { + struct { + unsigned RXB1D40 : 1; + unsigned RXB1D41 : 1; + unsigned RXB1D42 : 1; + unsigned RXB1D43 : 1; + unsigned RXB1D44 : 1; + unsigned RXB1D45 : 1; + unsigned RXB1D46 : 1; + unsigned RXB1D47 : 1; + }; +} __RXB1D4bits_t; +extern volatile __RXB1D4bits_t __at (0xF5A) RXB1D4bits; + +extern __sfr __at (0xF5B) RXB1D5; +typedef union { + struct { + unsigned RXB1D50 : 1; + unsigned RXB1D51 : 1; + unsigned RXB1D52 : 1; + unsigned RXB1D53 : 1; + unsigned RXB1D54 : 1; + unsigned RXB1D55 : 1; + unsigned RXB1D56 : 1; + unsigned RXB1D57 : 1; + }; +} __RXB1D5bits_t; +extern volatile __RXB1D5bits_t __at (0xF5B) RXB1D5bits; + +extern __sfr __at (0xF5C) RXB1D6; +typedef union { + struct { + unsigned RXB1D60 : 1; + unsigned RXB1D61 : 1; + unsigned RXB1D62 : 1; + unsigned RXB1D63 : 1; + unsigned RXB1D64 : 1; + unsigned RXB1D65 : 1; + unsigned RXB1D66 : 1; + unsigned RXB1D67 : 1; + }; +} __RXB1D6bits_t; +extern volatile __RXB1D6bits_t __at (0xF5C) RXB1D6bits; + +extern __sfr __at (0xF5D) RXB1D7; +typedef union { + struct { + unsigned RXB1D70 : 1; + unsigned RXB1D71 : 1; + unsigned RXB1D72 : 1; + unsigned RXB1D73 : 1; + unsigned RXB1D74 : 1; + unsigned RXB1D75 : 1; + unsigned RXB1D76 : 1; + unsigned RXB1D77 : 1; + }; +} __RXB1D7bits_t; +extern volatile __RXB1D7bits_t __at (0xF5D) RXB1D7bits; + +extern __sfr __at (0xF5E) CANSTAT_RO0; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO0bits_t; +extern volatile __CANSTAT_RO0bits_t __at (0xF5E) CANSTAT_RO0bits; + +extern __sfr __at (0xF5F) CANCON_RO0; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO0bits_t; +extern volatile __CANCON_RO0bits_t __at (0xF5F) CANCON_RO0bits; + +extern __sfr __at (0xF60) RXB0CON; +typedef union { + struct { + unsigned : 1; + unsigned JTOFF : 1; + unsigned RXB0DBEN : 1; + unsigned RXRTRRO_RXB0CON : 1; + unsigned : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0CONbits_t; +extern volatile __RXB0CONbits_t __at (0xF60) RXB0CONbits; + +extern __sfr __at (0xF61) RXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB0SIDHbits_t; +extern volatile __RXB0SIDHbits_t __at (0xF61) RXB0SIDHbits; + +extern __sfr __at (0xF62) RXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB0SIDLbits_t; +extern volatile __RXB0SIDLbits_t __at (0xF62) RXB0SIDLbits; + +extern __sfr __at (0xF63) RXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB0EIDHbits_t; +extern volatile __RXB0EIDHbits_t __at (0xF63) RXB0EIDHbits; + +extern __sfr __at (0xF64) RXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB0EIDLbits_t; +extern volatile __RXB0EIDLbits_t __at (0xF64) RXB0EIDLbits; + +extern __sfr __at (0xF65) RXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB0DLC : 1; + unsigned RB1_RXB0DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0DLCbits_t; +extern volatile __RXB0DLCbits_t __at (0xF65) RXB0DLCbits; + +extern __sfr __at (0xF66) RXB0D0; +typedef union { + struct { + unsigned RXB0D00 : 1; + unsigned RXB0D01 : 1; + unsigned RXB0D02 : 1; + unsigned RXB0D03 : 1; + unsigned RXB0D04 : 1; + unsigned RXB0D05 : 1; + unsigned RXB0D06 : 1; + unsigned RXB0D07 : 1; + }; +} __RXB0D0bits_t; +extern volatile __RXB0D0bits_t __at (0xF66) RXB0D0bits; + +extern __sfr __at (0xF67) RXB0D1; +typedef union { + struct { + unsigned RXB0D10 : 1; + unsigned RXB0D11 : 1; + unsigned RXB0D12 : 1; + unsigned RXB0D13 : 1; + unsigned RXB0D14 : 1; + unsigned RXB0D15 : 1; + unsigned RXB0D16 : 1; + unsigned RXB0D17 : 1; + }; +} __RXB0D1bits_t; +extern volatile __RXB0D1bits_t __at (0xF67) RXB0D1bits; + +extern __sfr __at (0xF68) RXB0D2; +typedef union { + struct { + unsigned RXB0D20 : 1; + unsigned RXB0D21 : 1; + unsigned RXB0D22 : 1; + unsigned RXB0D23 : 1; + unsigned RXB0D24 : 1; + unsigned RXB0D25 : 1; + unsigned RXB0D26 : 1; + unsigned RXB0D27 : 1; + }; +} __RXB0D2bits_t; +extern volatile __RXB0D2bits_t __at (0xF68) RXB0D2bits; + +extern __sfr __at (0xF69) RXB0D3; +typedef union { + struct { + unsigned RXB0D30 : 1; + unsigned RXB0D31 : 1; + unsigned RXB0D32 : 1; + unsigned RXB0D33 : 1; + unsigned RXB0D34 : 1; + unsigned RXB0D35 : 1; + unsigned RXB0D36 : 1; + unsigned RXB0D37 : 1; + }; +} __RXB0D3bits_t; +extern volatile __RXB0D3bits_t __at (0xF69) RXB0D3bits; + +extern __sfr __at (0xF6A) RXB0D4; +typedef union { + struct { + unsigned RXB0D40 : 1; + unsigned RXB0D41 : 1; + unsigned RXB0D42 : 1; + unsigned RXB0D43 : 1; + unsigned RXB0D44 : 1; + unsigned RXB0D45 : 1; + unsigned RXB0D46 : 1; + unsigned RXB0D47 : 1; + }; +} __RXB0D4bits_t; +extern volatile __RXB0D4bits_t __at (0xF6A) RXB0D4bits; + +extern __sfr __at (0xF6B) RXB0D5; +typedef union { + struct { + unsigned RXB0D50 : 1; + unsigned RXB0D51 : 1; + unsigned RXB0D52 : 1; + unsigned RXB0D53 : 1; + unsigned RXB0D54 : 1; + unsigned RXB0D55 : 1; + unsigned RXB0D56 : 1; + unsigned RXB0D57 : 1; + }; +} __RXB0D5bits_t; +extern volatile __RXB0D5bits_t __at (0xF6B) RXB0D5bits; + +extern __sfr __at (0xF6C) RXB0D6; +typedef union { + struct { + unsigned RXB0D60 : 1; + unsigned RXB0D61 : 1; + unsigned RXB0D62 : 1; + unsigned RXB0D63 : 1; + unsigned RXB0D64 : 1; + unsigned RXB0D65 : 1; + unsigned RXB0D66 : 1; + unsigned RXB0D67 : 1; + }; +} __RXB0D6bits_t; +extern volatile __RXB0D6bits_t __at (0xF6C) RXB0D6bits; + +extern __sfr __at (0xF6D) RXB0D7; +typedef union { + struct { + unsigned RXB0D70 : 1; + unsigned RXB0D71 : 1; + unsigned RXB0D72 : 1; + unsigned RXB0D73 : 1; + unsigned RXB0D74 : 1; + unsigned RXB0D75 : 1; + unsigned RXB0D76 : 1; + unsigned RXB0D77 : 1; + }; +} __RXB0D7bits_t; +extern volatile __RXB0D7bits_t __at (0xF6D) RXB0D7bits; + +extern __sfr __at (0xF6E) CANSTAT; +typedef union { + struct { + unsigned EICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned EICODE4 : 1; + unsigned OPMODE0 : 1; + unsigned OPMODE1 : 1; + unsigned OPMODE2 : 1; + }; + struct { + unsigned : 1; + unsigned EICODE1 : 1; + unsigned EICODE2 : 1; + unsigned EICODE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANSTATbits_t; +extern volatile __CANSTATbits_t __at (0xF6E) CANSTATbits; + +extern __sfr __at (0xF6F) CANCON; +typedef union { + struct { + unsigned FP0 : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; + struct { + unsigned : 1; + unsigned FP1 : 1; + unsigned FP2 : 1; + unsigned FP3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANCONbits_t; +extern volatile __CANCONbits_t __at (0xF6F) CANCONbits; + +extern __sfr __at (0xF70) BRGCON1; +typedef union { + struct { + unsigned BRP0 : 1; + unsigned BRP1 : 1; + unsigned BRP2 : 1; + unsigned BRP3 : 1; + unsigned BRP4 : 1; + unsigned BRP5 : 1; + unsigned SJW0 : 1; + unsigned SJW1 : 1; + }; +} __BRGCON1bits_t; +extern volatile __BRGCON1bits_t __at (0xF70) BRGCON1bits; + +extern __sfr __at (0xF71) BRGCON2; +typedef union { + struct { + unsigned PRSEG0 : 1; + unsigned PRSEG1 : 1; + unsigned PRSEG2 : 1; + unsigned SEG1PH0 : 1; + unsigned SEG1PH1 : 1; + unsigned SEG1PH2 : 1; + unsigned SAM : 1; + unsigned SEG2PHTS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SEG2PHT : 1; + }; +} __BRGCON2bits_t; +extern volatile __BRGCON2bits_t __at (0xF71) BRGCON2bits; + +extern __sfr __at (0xF72) BRGCON3; +typedef union { + struct { + unsigned SEG2PH0 : 1; + unsigned SEG2PH1 : 1; + unsigned SEG2PH2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned WAKFIL : 1; + unsigned WAKDIS : 1; + }; +} __BRGCON3bits_t; +extern volatile __BRGCON3bits_t __at (0xF72) BRGCON3bits; + +extern __sfr __at (0xF73) CIOCON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CANCAP : 1; + unsigned ENDRHI : 1; + unsigned : 1; + unsigned : 1; + }; +} __CIOCONbits_t; +extern volatile __CIOCONbits_t __at (0xF73) CIOCONbits; + +extern __sfr __at (0xF74) COMSTAT; +typedef union { + struct { + unsigned EWARN : 1; + unsigned RXWARN : 1; + unsigned TXWARN : 1; + unsigned RXBP : 1; + unsigned TXBP : 1; + unsigned TXBO : 1; + unsigned RXB1OVFL : 1; + unsigned RXB0OVFL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXBnOVFL : 1; + unsigned FIFOEMPTY : 1; + }; +} __COMSTATbits_t; +extern volatile __COMSTATbits_t __at (0xF74) COMSTATbits; + +extern __sfr __at (0xF75) RXERRCNT; +typedef union { + struct { + unsigned REC0 : 1; + unsigned REC1 : 1; + unsigned REC2 : 1; + unsigned REC3 : 1; + unsigned REC4 : 1; + unsigned REC5 : 1; + unsigned REC6 : 1; + unsigned REC7 : 1; + }; +} __RXERRCNTbits_t; +extern volatile __RXERRCNTbits_t __at (0xF75) RXERRCNTbits; + +extern __sfr __at (0xF76) TXERRCNT; +typedef union { + struct { + unsigned TEC0 : 1; + unsigned TEC1 : 1; + unsigned TEC2 : 1; + unsigned TEC3 : 1; + unsigned TEC4 : 1; + unsigned TEC5 : 1; + unsigned TEC6 : 1; + unsigned TEC7 : 1; + }; +} __TXERRCNTbits_t; +extern volatile __TXERRCNTbits_t __at (0xF76) TXERRCNTbits; + +extern __sfr __at (0xF77) ECANCON; +typedef union { + struct { + unsigned EWIN0 : 1; + unsigned EWIN1 : 1; + unsigned EWIN2 : 1; + unsigned EWIN3 : 1; + unsigned EWIN4 : 1; + unsigned FIFOWM : 1; + unsigned MDSEL0 : 1; + unsigned MDSEL1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned F : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECANCONbits_t; +extern volatile __ECANCONbits_t __at (0xF77) ECANCONbits; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned OSC1 : 1; + }; + struct { + unsigned CVREF : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned LVDIN : 1; + unsigned CLKO : 1; + unsigned CLKI : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0_PORTB : 1; + unsigned RB1_PORTB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CANRX : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned CANTX : 1; + unsigned : 1; + unsigned AN9 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0_DDRB : 1; + unsigned RB1_DDRB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSCR : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXBIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned : 1; + unsigned : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned : 1; + unsigned : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned : 1; + unsigned : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned ERRIE : 1; + unsigned WAKIE : 1; + unsigned IRXIE : 1; + }; + struct { + unsigned FIFOWMIE : 1; + unsigned RXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FIFOMWIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned RXB0IF : 1; + unsigned RXB1IF : 1; + unsigned TXB0IF : 1; + unsigned TXB1IF : 1; + unsigned TXB2IF : 1; + unsigned ERRIF : 1; + unsigned WAKIF : 1; + unsigned IRXIF : 1; + }; + struct { + unsigned FIFOWMIF : 1; + unsigned RXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned RXB0IP : 1; + unsigned RXB1IP : 1; + unsigned TXB0IP : 1; + unsigned TXB1IP : 1; + unsigned TXB2IP : 1; + unsigned ERRIP : 1; + unsigned WAKIP : 1; + unsigned IRXIP : 1; + }; + struct { + unsigned FIFOWMIP : 1; + unsigned RXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAA) EEADRH; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T3NSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T3ECCP1 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO_DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T0PS3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned SP0 : 1; + unsigned SP1 : 1; + unsigned SP2 : 1; + unsigned SP3 : 1; + unsigned SP4 : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f2685.h b/device/include/pic16/pic18f2685.h new file mode 100644 index 0000000..a90e2e4 --- /dev/null +++ b/device/include/pic16/pic18f2685.h @@ -0,0 +1,6092 @@ +/* + * pic18f2685.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F2685_H__ +#define __PIC18F2685_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP oscillator +#define _OSC_XT_1H 0xF1 // XT oscillator +#define _OSC_HS_1H 0xF2 // HS oscillator +#define _OSC_RC_1H 0xF3 // External RC oscillator, CLKO function on RA6 +#define _OSC_EC_1H 0xF4 // EC oscillator, CLKO function on RA6 +#define _OSC_ECIO_1H 0xF5 // EC oscillator, port function on RA6 +#define _OSC_HSPLL_1H 0xF6 // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) +#define _OSC_RCIO_1H 0xF7 // External RC oscillator, port function on RA6 +#define _OSC_IRCIO67_1H 0xF8 // Internal oscillator block, port function on RA6 and RA7 +#define _OSC_IRCIO7_1H 0xF9 // Internal oscillator block, CLKO function on RA6, port function on RA7 +#define _FCMEN_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled +#define _FCMEN_ON_1H 0xFF // Fail-Safe Clock Monitor enabled +#define _IESO_OFF_1H 0x7F // Oscillator Switchover mode disabled +#define _IESO_ON_1H 0xFF // Oscillator Switchover mode enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // PWRT enabled +#define _PWRT_OFF_2L 0xFF // PWRT disabled +#define _BOREN_OFF_2L 0xF9 // Brown-out Reset disabled in hardware and software +#define _BOREN_SBORENCTRL_2L 0xFB // Brown-out Reset enabled and controlled by software (SBOREN is enabled) +#define _BOREN_BOACTIVE_2L 0xFD // Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) +#define _BOREN_BOHW_2L 0xFF // Brown-out Reset enabled in hardware only (SBOREN is disabled) +#define _BORV_0_2L 0xE7 // Maximum setting +#define _BORV_1_2L 0xEF // +#define _BORV_2_2L 0xF7 // +#define _BORV_3_2L 0xFF // Minimum setting + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit) +#define _WDT_ON_2H 0xFF // WDT enabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // RE3 input pin enabled; MCLR disabled +#define _MCLRE_ON_3H 0xFF // MCLR pin enabled; RE3 input pin disabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 configured for higher power operation +#define _LPT1OSC_ON_3H 0xFF // Timer1 configured for low-power operation +#define _PBADEN_OFF_3H 0xFD // PORTB<4> and PORTB<1:0> Configured as Digital I/O Pins on Reset +#define _PBADEN_ON_3H 0xFF // PORTB<4> and PORTB<1:0> Configured as Analog Pins on Reset + +// CONFIG4L Options +#define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug +#define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins +#define _XINST_OFF_4L 0xBF // Instruction set extension and Indexed Addressing mode disabled (Legacy mode) +#define _XINST_ON_4L 0xFF // Instruction set extension and Indexed Addressing mode enabled +#define _BBSIZ_1024_4L 0xCF // 1K words (2K bytes) Boot Block +#define _BBSIZ_2048_4L 0xDF // 2K words (4K bytes) Boot Block +#define _BBSIZ_4096_4L 0xEF // 4K words (8K bytes) Boot Block +#define _LVP_OFF_4L 0xFB // Disabled +#define _LVP_ON_4L 0xFF // Enabled +#define _STVREN_OFF_4L 0xFE // Stack full/underflow will not cause Reset +#define _STVREN_ON_4L 0xFF // Stack full/underflow will cause Reset + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Block 0 (000800-003FFFh) code-protected +#define _CP0_OFF_5L 0xFF // Block 0 (000800-003FFFh) not code-protected +#define _CP1_ON_5L 0xFD // Block 1 (004000-007FFFh) code-protected +#define _CP1_OFF_5L 0xFF // Block 1 (004000-007FFFh) not code-protected +#define _CP2_ON_5L 0xFB // Block 2 (008000-00BFFFh) code-protected +#define _CP2_OFF_5L 0xFF // Block 2 (008000-00BFFFh) not code-protected +#define _CP3_ON_5L 0xF7 // Block 3 (00C000-00FFFFh) code-protected +#define _CP3_OFF_5L 0xFF // Block 3 (00C000-00FFFFh) not code-protected +#define _CP4_ON_5L 0xEF // Block 4 (010000-013FFFh) code-protected +#define _CP4_OFF_5L 0xFF // Block 4 (010000-013FFFh) not code-protected +#define _CP5_ON_5L 0xDF // Block 5 (014000-017FFFh) code-protected +#define _CP5_OFF_5L 0xFF // Block 5 (014000-017FFFh) not code-protected + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Boot Block (000000-0007FFh) code-protected +#define _CPB_OFF_5H 0xFF // Boot Block (000000-0007FFh) not code-protected +#define _CPD_ON_5H 0x7F // Data EEPROM code-protected +#define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Block 0 (000800-003FFFh) write-protected +#define _WRT0_OFF_6L 0xFF // Block 0 (000800-003FFFh) not write-protected +#define _WRT1_ON_6L 0xFD // Block 1 (004000-007FFFh) write-protected +#define _WRT1_OFF_6L 0xFF // Block 1 (004000-007FFFh) not write-protected +#define _WRT2_ON_6L 0xFB // Block 2 (008000-00BFFFh) write-protected +#define _WRT2_OFF_6L 0xFF // Block 2 (008000-00BFFFh) not write-protected +#define _WRT3_ON_6L 0xF7 // Block 3 (00C000-00FFFFh) write-protected +#define _WRT3_OFF_6L 0xFF // Block 3 (00C000-00FFFFh) not write-protected +#define _WRT4_ON_6L 0xEF // Block 4 (010000-013FFFh) write-protected +#define _WRT4_OFF_6L 0xFF // Block 4 (010000-013FFFh) not write-protected +#define _WRT5_ON_6L 0xDF // Block 5 (014000-017FFFh) write-protected +#define _WRT5_OFF_6L 0xFF // Block 5 (014000-017FFFh) not write-protected + +// CONFIG6H Options +#define _WRTB_ON_6H 0xBF // Boot Block (000000-0007FFh) write-protected +#define _WRTB_OFF_6H 0xFF // Boot Block (000000-0007FFh) not write-protected +#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected +#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected +#define _WRTD_ON_6H 0x7F // Data EEPROM write-protected +#define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Block 0 (000800-003FFFh) protected from table reads executed in other blocks +#define _EBTR0_OFF_7L 0xFF // Block 0 (000800-003FFFh) not protected from table reads executed in other blocks +#define _EBTR1_ON_7L 0xFD // Block 1 (004000-007FFFh) protected from table reads executed in other blocks +#define _EBTR1_OFF_7L 0xFF // Block 1 (004000-007FFFh) not protected from table reads executed in other blocks +#define _EBTR2_ON_7L 0xFB // Block 2 (008000-00BFFFh) protected from table reads executed in other blocks +#define _EBTR2_OFF_7L 0xFF // Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks +#define _EBTR3_ON_7L 0xF7 // Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks +#define _EBTR3_OFF_7L 0xFF // Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks +#define _EBTR4_ON_7L 0xEF // Block 4 (010000-013FFFh) protected from table reads executed in other blocks +#define _EBTR4_OFF_7L 0xFF // Block 4 (010000-013FFFh) not protected from table reads executed in other blocks +#define _EBTR5_ON_7L 0xDF // Block 5 (014000-017FFFh) protected from table reads executed in other blocks +#define _EBTR5_OFF_7L 0xFF // Block 5 (014000-017FFFh) not protected from table reads executed in other blocks + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Boot Block (000000-0007FFh) protected from table reads executed in other blocks +#define _EBTRB_OFF_7H 0xFF // Boot Block (000000-0007FFh) not protected from table reads executed in other blocks +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xD60) RXF6SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF6SIDHbits_t; +extern volatile __RXF6SIDHbits_t __at (0xD60) RXF6SIDHbits; + +extern __sfr __at (0xD61) RXF6SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF6SIDLbits_t; +extern volatile __RXF6SIDLbits_t __at (0xD61) RXF6SIDLbits; + +extern __sfr __at (0xD62) RXF6EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF6EIDHbits_t; +extern volatile __RXF6EIDHbits_t __at (0xD62) RXF6EIDHbits; + +extern __sfr __at (0xD63) RXF6EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF6EIDLbits_t; +extern volatile __RXF6EIDLbits_t __at (0xD63) RXF6EIDLbits; + +extern __sfr __at (0xD64) RXF7SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF7SIDHbits_t; +extern volatile __RXF7SIDHbits_t __at (0xD64) RXF7SIDHbits; + +extern __sfr __at (0xD65) RXF7SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF7SIDLbits_t; +extern volatile __RXF7SIDLbits_t __at (0xD65) RXF7SIDLbits; + +extern __sfr __at (0xD66) RXF7EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF7EIDHbits_t; +extern volatile __RXF7EIDHbits_t __at (0xD66) RXF7EIDHbits; + +extern __sfr __at (0xD67) RXF7EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF7EIDLbits_t; +extern volatile __RXF7EIDLbits_t __at (0xD67) RXF7EIDLbits; + +extern __sfr __at (0xD68) RXF8SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF8SIDHbits_t; +extern volatile __RXF8SIDHbits_t __at (0xD68) RXF8SIDHbits; + +extern __sfr __at (0xD69) RXF8SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF8SIDLbits_t; +extern volatile __RXF8SIDLbits_t __at (0xD69) RXF8SIDLbits; + +extern __sfr __at (0xD6A) RXF8EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF8EIDHbits_t; +extern volatile __RXF8EIDHbits_t __at (0xD6A) RXF8EIDHbits; + +extern __sfr __at (0xD6B) RXF8EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF8EIDLbits_t; +extern volatile __RXF8EIDLbits_t __at (0xD6B) RXF8EIDLbits; + +extern __sfr __at (0xD70) RXF9SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF9SIDHbits_t; +extern volatile __RXF9SIDHbits_t __at (0xD70) RXF9SIDHbits; + +extern __sfr __at (0xD71) RXF9SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF9SIDLbits_t; +extern volatile __RXF9SIDLbits_t __at (0xD71) RXF9SIDLbits; + +extern __sfr __at (0xD72) RXF9EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF9EIDHbits_t; +extern volatile __RXF9EIDHbits_t __at (0xD72) RXF9EIDHbits; + +extern __sfr __at (0xD73) RXF9EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF9EIDLbits_t; +extern volatile __RXF9EIDLbits_t __at (0xD73) RXF9EIDLbits; + +extern __sfr __at (0xD74) RXF10SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF10SIDHbits_t; +extern volatile __RXF10SIDHbits_t __at (0xD74) RXF10SIDHbits; + +extern __sfr __at (0xD75) RXF10SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF10SIDLbits_t; +extern volatile __RXF10SIDLbits_t __at (0xD75) RXF10SIDLbits; + +extern __sfr __at (0xD76) RXF10EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF10EIDHbits_t; +extern volatile __RXF10EIDHbits_t __at (0xD76) RXF10EIDHbits; + +extern __sfr __at (0xD77) RXF10EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF10EIDLbits_t; +extern volatile __RXF10EIDLbits_t __at (0xD77) RXF10EIDLbits; + +extern __sfr __at (0xD78) RXF11SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF11SIDHbits_t; +extern volatile __RXF11SIDHbits_t __at (0xD78) RXF11SIDHbits; + +extern __sfr __at (0xD79) RXF11SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF11SIDLbits_t; +extern volatile __RXF11SIDLbits_t __at (0xD79) RXF11SIDLbits; + +extern __sfr __at (0xD7A) RXF11EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF11EIDHbits_t; +extern volatile __RXF11EIDHbits_t __at (0xD7A) RXF11EIDHbits; + +extern __sfr __at (0xD7B) RXF11EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF11EIDLbits_t; +extern volatile __RXF11EIDLbits_t __at (0xD7B) RXF11EIDLbits; + +extern __sfr __at (0xD80) RXF12SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF12SIDHbits_t; +extern volatile __RXF12SIDHbits_t __at (0xD80) RXF12SIDHbits; + +extern __sfr __at (0xD81) RXF12SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF12SIDLbits_t; +extern volatile __RXF12SIDLbits_t __at (0xD81) RXF12SIDLbits; + +extern __sfr __at (0xD82) RXF12EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF12EIDHbits_t; +extern volatile __RXF12EIDHbits_t __at (0xD82) RXF12EIDHbits; + +extern __sfr __at (0xD83) RXF12EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF12EIDLbits_t; +extern volatile __RXF12EIDLbits_t __at (0xD83) RXF12EIDLbits; + +extern __sfr __at (0xD84) RXF13SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF13SIDHbits_t; +extern volatile __RXF13SIDHbits_t __at (0xD84) RXF13SIDHbits; + +extern __sfr __at (0xD85) RXF13SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF13SIDLbits_t; +extern volatile __RXF13SIDLbits_t __at (0xD85) RXF13SIDLbits; + +extern __sfr __at (0xD86) RXF13EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF13EIDHbits_t; +extern volatile __RXF13EIDHbits_t __at (0xD86) RXF13EIDHbits; + +extern __sfr __at (0xD87) RXF13EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF13EIDLbits_t; +extern volatile __RXF13EIDLbits_t __at (0xD87) RXF13EIDLbits; + +extern __sfr __at (0xD88) RXF14SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF14SIDHbits_t; +extern volatile __RXF14SIDHbits_t __at (0xD88) RXF14SIDHbits; + +extern __sfr __at (0xD89) RXF14SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF14SIDLbits_t; +extern volatile __RXF14SIDLbits_t __at (0xD89) RXF14SIDLbits; + +extern __sfr __at (0xD8A) RXF14EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF14EIDHbits_t; +extern volatile __RXF14EIDHbits_t __at (0xD8A) RXF14EIDHbits; + +extern __sfr __at (0xD8B) RXF14EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF14EIDLbits_t; +extern volatile __RXF14EIDLbits_t __at (0xD8B) RXF14EIDLbits; + +extern __sfr __at (0xD90) RXF15SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF15SIDHbits_t; +extern volatile __RXF15SIDHbits_t __at (0xD90) RXF15SIDHbits; + +extern __sfr __at (0xD91) RXF15SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF15SIDLbits_t; +extern volatile __RXF15SIDLbits_t __at (0xD91) RXF15SIDLbits; + +extern __sfr __at (0xD92) RXF15EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF15EIDHbits_t; +extern volatile __RXF15EIDHbits_t __at (0xD92) RXF15EIDHbits; + +extern __sfr __at (0xD93) RXF15EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF15EIDLbits_t; +extern volatile __RXF15EIDLbits_t __at (0xD93) RXF15EIDLbits; + +extern __sfr __at (0xDD4) RXFCON0; +typedef union { + struct { + unsigned RXF0EN : 1; + unsigned RXF1EN : 1; + unsigned RXF2EN : 1; + unsigned RXF3EN : 1; + unsigned RXF4EN : 1; + unsigned RXF5EN : 1; + unsigned RXF6EN : 1; + unsigned RXF7EN : 1; + }; +} __RXFCON0bits_t; +extern volatile __RXFCON0bits_t __at (0xDD4) RXFCON0bits; + +extern __sfr __at (0xDD5) RXFCON1; +typedef union { + struct { + unsigned RXF8EN : 1; + unsigned RXF9EN : 1; + unsigned RXF10EN : 1; + unsigned RXF11EN : 1; + unsigned RXF12EN : 1; + unsigned RXF13EN : 1; + unsigned RXF14EN : 1; + unsigned RXF15EN : 1; + }; +} __RXFCON1bits_t; +extern volatile __RXFCON1bits_t __at (0xDD5) RXFCON1bits; + +extern __sfr __at (0xDD8) SDFLC; +typedef union { + struct { + unsigned DFLC0 : 1; + unsigned DFLC1 : 1; + unsigned DFLC2 : 1; + unsigned DFLC3 : 1; + unsigned DFLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FLC0 : 1; + unsigned FLC1 : 1; + unsigned FLC2 : 1; + unsigned FLC3 : 1; + unsigned FLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SDFLCbits_t; +extern volatile __SDFLCbits_t __at (0xDD8) SDFLCbits; + +extern __sfr __at (0xDE0) RXFBCON0; +typedef union { + struct { + unsigned F0BP_0 : 1; + unsigned F0BP_1 : 1; + unsigned F0BP_2 : 1; + unsigned F0BP_3 : 1; + unsigned F1BP_0 : 1; + unsigned F1BP_1 : 1; + unsigned F1BP_2 : 1; + unsigned F1BP_3 : 1; + }; +} __RXFBCON0bits_t; +extern volatile __RXFBCON0bits_t __at (0xDE0) RXFBCON0bits; + +extern __sfr __at (0xDE1) RXFBCON1; +typedef union { + struct { + unsigned F2BP_0 : 1; + unsigned F2BP_1 : 1; + unsigned F2BP_2 : 1; + unsigned F2BP_3 : 1; + unsigned F3BP_0 : 1; + unsigned F3BP_1 : 1; + unsigned F3BP_2 : 1; + unsigned F3BP_3 : 1; + }; +} __RXFBCON1bits_t; +extern volatile __RXFBCON1bits_t __at (0xDE1) RXFBCON1bits; + +extern __sfr __at (0xDE2) RXFBCON2; +typedef union { + struct { + unsigned F4BP_0 : 1; + unsigned F4BP_1 : 1; + unsigned F4BP_2 : 1; + unsigned F4BP_3 : 1; + unsigned F5BP_0 : 1; + unsigned F5BP_1 : 1; + unsigned F5BP_2 : 1; + unsigned F5BP_3 : 1; + }; +} __RXFBCON2bits_t; +extern volatile __RXFBCON2bits_t __at (0xDE2) RXFBCON2bits; + +extern __sfr __at (0xDE3) RXFBCON3; +typedef union { + struct { + unsigned F6BP_0 : 1; + unsigned F6BP_1 : 1; + unsigned F6BP_2 : 1; + unsigned F6BP_3 : 1; + unsigned F7BP_0 : 1; + unsigned F7BP_1 : 1; + unsigned F7BP_2 : 1; + unsigned F7BP_3 : 1; + }; +} __RXFBCON3bits_t; +extern volatile __RXFBCON3bits_t __at (0xDE3) RXFBCON3bits; + +extern __sfr __at (0xDE4) RXFBCON4; +typedef union { + struct { + unsigned F8BP_0 : 1; + unsigned F8BP_1 : 1; + unsigned F8BP_2 : 1; + unsigned F8BP_3 : 1; + unsigned F9BP_0 : 1; + unsigned F9BP_1 : 1; + unsigned F9BP_2 : 1; + unsigned F9BP_3 : 1; + }; +} __RXFBCON4bits_t; +extern volatile __RXFBCON4bits_t __at (0xDE4) RXFBCON4bits; + +extern __sfr __at (0xDE5) RXFBCON5; +typedef union { + struct { + unsigned F10BP_0 : 1; + unsigned F10BP_1 : 1; + unsigned F10BP_2 : 1; + unsigned F10BP_3 : 1; + unsigned F11BP_0 : 1; + unsigned F11BP_1 : 1; + unsigned F11BP_2 : 1; + unsigned F11BP_3 : 1; + }; +} __RXFBCON5bits_t; +extern volatile __RXFBCON5bits_t __at (0xDE5) RXFBCON5bits; + +extern __sfr __at (0xDE6) RXFBCON6; +typedef union { + struct { + unsigned F12BP_0 : 1; + unsigned F12BP_1 : 1; + unsigned F12BP_2 : 1; + unsigned F12BP_3 : 1; + unsigned F13BP_0 : 1; + unsigned F13BP_1 : 1; + unsigned F13BP_2 : 1; + unsigned F13BP_3 : 1; + }; +} __RXFBCON6bits_t; +extern volatile __RXFBCON6bits_t __at (0xDE6) RXFBCON6bits; + +extern __sfr __at (0xDE7) RXFBCON7; +typedef union { + struct { + unsigned F14BP_0 : 1; + unsigned F14BP_1 : 1; + unsigned F14BP_2 : 1; + unsigned F14BP_3 : 1; + unsigned F15BP_0 : 1; + unsigned F15BP_1 : 1; + unsigned F15BP_2 : 1; + unsigned F15BP_3 : 1; + }; +} __RXFBCON7bits_t; +extern volatile __RXFBCON7bits_t __at (0xDE7) RXFBCON7bits; + +extern __sfr __at (0xDF0) MSEL0; +typedef union { + struct { + unsigned FIL0_0 : 1; + unsigned FIL0_1 : 1; + unsigned FIL1_0 : 1; + unsigned FIL1_1 : 1; + unsigned FIL2_0 : 1; + unsigned FIL2_1 : 1; + unsigned FIL3_0 : 1; + unsigned FIL3_1 : 1; + }; +} __MSEL0bits_t; +extern volatile __MSEL0bits_t __at (0xDF0) MSEL0bits; + +extern __sfr __at (0xDF1) MSEL1; +typedef union { + struct { + unsigned FIL4_0 : 1; + unsigned FIL4_1 : 1; + unsigned FIL5_0 : 1; + unsigned FIL5_1 : 1; + unsigned FIL6_0 : 1; + unsigned FIL6_1 : 1; + unsigned FIL7_0 : 1; + unsigned FIL7_1 : 1; + }; +} __MSEL1bits_t; +extern volatile __MSEL1bits_t __at (0xDF1) MSEL1bits; + +extern __sfr __at (0xDF2) MSEL2; +typedef union { + struct { + unsigned FIL8_0 : 1; + unsigned FIL8_1 : 1; + unsigned FIL9_0 : 1; + unsigned FIL9_1 : 1; + unsigned FIL10_0 : 1; + unsigned FIL10_1 : 1; + unsigned FIL11_0 : 1; + unsigned FIL11_1 : 1; + }; +} __MSEL2bits_t; +extern volatile __MSEL2bits_t __at (0xDF2) MSEL2bits; + +extern __sfr __at (0xDF3) MSEL3; +typedef union { + struct { + unsigned FIL12_0 : 1; + unsigned FIL12_1 : 1; + unsigned FIL13_0 : 1; + unsigned FIL13_1 : 1; + unsigned FIL14_0 : 1; + unsigned FIL14_1 : 1; + unsigned FIL15_0 : 1; + unsigned FIL15_1 : 1; + }; +} __MSEL3bits_t; +extern volatile __MSEL3bits_t __at (0xDF3) MSEL3bits; + +extern __sfr __at (0xDF8) BSEL0; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned B0TXEN : 1; + unsigned B1TXEN : 1; + unsigned B2TXEN : 1; + unsigned B3TXEN : 1; + unsigned B4TXEN : 1; + unsigned B5TXEN : 1; + }; +} __BSEL0bits_t; +extern volatile __BSEL0bits_t __at (0xDF8) BSEL0bits; + +extern __sfr __at (0xDFA) BIE0; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned B0IE : 1; + unsigned B1IE : 1; + unsigned B2IE : 1; + unsigned B3IE : 1; + unsigned B4IE : 1; + unsigned B5IE : 1; + }; +} __BIE0bits_t; +extern volatile __BIE0bits_t __at (0xDFA) BIE0bits; + +extern __sfr __at (0xDFC) TXBIE; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TXBIEbits_t; +extern volatile __TXBIEbits_t __at (0xDFC) TXBIEbits; + +extern __sfr __at (0xE20) B0CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B0CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0CONbits_t; +extern volatile __B0CONbits_t __at (0xE20) B0CONbits; + +extern __sfr __at (0xE21) B0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B0SIDHbits_t; +extern volatile __B0SIDHbits_t __at (0xE21) B0SIDHbits; + +extern __sfr __at (0xE22) B0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0SIDLbits_t; +extern volatile __B0SIDLbits_t __at (0xE22) B0SIDLbits; + +extern __sfr __at (0xE23) B0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B0EIDHbits_t; +extern volatile __B0EIDHbits_t __at (0xE23) B0EIDHbits; + +extern __sfr __at (0xE24) B0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B0EIDLbits_t; +extern volatile __B0EIDLbits_t __at (0xE24) B0EIDLbits; + +extern __sfr __at (0xE25) B0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B0DLC : 1; + unsigned RB1_B0DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B0DLCbits_t; +extern volatile __B0DLCbits_t __at (0xE25) B0DLCbits; + +extern __sfr __at (0xE26) B0D0; +typedef union { + struct { + unsigned B0D00 : 1; + unsigned B0D01 : 1; + unsigned B0D02 : 1; + unsigned B0D03 : 1; + unsigned B0D04 : 1; + unsigned B0D05 : 1; + unsigned B0D06 : 1; + unsigned B0D07 : 1; + }; +} __B0D0bits_t; +extern volatile __B0D0bits_t __at (0xE26) B0D0bits; + +extern __sfr __at (0xE27) B0D1; +typedef union { + struct { + unsigned B0D10 : 1; + unsigned B0D11 : 1; + unsigned B0D12 : 1; + unsigned B0D13 : 1; + unsigned B0D14 : 1; + unsigned B0D15 : 1; + unsigned B0D16 : 1; + unsigned B0D17 : 1; + }; +} __B0D1bits_t; +extern volatile __B0D1bits_t __at (0xE27) B0D1bits; + +extern __sfr __at (0xE28) B0D2; +typedef union { + struct { + unsigned B0D20 : 1; + unsigned B0D21 : 1; + unsigned B0D22 : 1; + unsigned B0D23 : 1; + unsigned B0D24 : 1; + unsigned B0D25 : 1; + unsigned B0D26 : 1; + unsigned B0D27 : 1; + }; +} __B0D2bits_t; +extern volatile __B0D2bits_t __at (0xE28) B0D2bits; + +extern __sfr __at (0xE29) B0D3; +typedef union { + struct { + unsigned B0D30 : 1; + unsigned B0D31 : 1; + unsigned B0D32 : 1; + unsigned B0D33 : 1; + unsigned B0D34 : 1; + unsigned B0D35 : 1; + unsigned B0D36 : 1; + unsigned B0D37 : 1; + }; +} __B0D3bits_t; +extern volatile __B0D3bits_t __at (0xE29) B0D3bits; + +extern __sfr __at (0xE2A) B0D4; +typedef union { + struct { + unsigned B0D40 : 1; + unsigned B0D41 : 1; + unsigned B0D42 : 1; + unsigned B0D43 : 1; + unsigned B0D44 : 1; + unsigned B0D45 : 1; + unsigned B0D46 : 1; + unsigned B0D47 : 1; + }; +} __B0D4bits_t; +extern volatile __B0D4bits_t __at (0xE2A) B0D4bits; + +extern __sfr __at (0xE2B) B0D5; +typedef union { + struct { + unsigned B0D50 : 1; + unsigned B0D51 : 1; + unsigned B0D52 : 1; + unsigned B0D53 : 1; + unsigned B0D54 : 1; + unsigned B0D55 : 1; + unsigned B0D56 : 1; + unsigned B0D57 : 1; + }; +} __B0D5bits_t; +extern volatile __B0D5bits_t __at (0xE2B) B0D5bits; + +extern __sfr __at (0xE2C) B0D6; +typedef union { + struct { + unsigned B0D60 : 1; + unsigned B0D61 : 1; + unsigned B0D62 : 1; + unsigned B0D63 : 1; + unsigned B0D64 : 1; + unsigned B0D65 : 1; + unsigned B0D66 : 1; + unsigned B0D67 : 1; + }; +} __B0D6bits_t; +extern volatile __B0D6bits_t __at (0xE2C) B0D6bits; + +extern __sfr __at (0xE2D) B0D7; +typedef union { + struct { + unsigned B0D70 : 1; + unsigned B0D71 : 1; + unsigned B0D72 : 1; + unsigned B0D73 : 1; + unsigned B0D74 : 1; + unsigned B0D75 : 1; + unsigned B0D76 : 1; + unsigned B0D77 : 1; + }; +} __B0D7bits_t; +extern volatile __B0D7bits_t __at (0xE2D) B0D7bits; + +extern __sfr __at (0xE2E) CANSTAT_RO9; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO9bits_t; +extern volatile __CANSTAT_RO9bits_t __at (0xE2E) CANSTAT_RO9bits; + +extern __sfr __at (0xE2F) CANCON_RO9; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO9bits_t; +extern volatile __CANCON_RO9bits_t __at (0xE2F) CANCON_RO9bits; + +extern __sfr __at (0xE30) B1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B1CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1CONbits_t; +extern volatile __B1CONbits_t __at (0xE30) B1CONbits; + +extern __sfr __at (0xE31) B1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B1SIDHbits_t; +extern volatile __B1SIDHbits_t __at (0xE31) B1SIDHbits; + +extern __sfr __at (0xE32) B1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1SIDLbits_t; +extern volatile __B1SIDLbits_t __at (0xE32) B1SIDLbits; + +extern __sfr __at (0xE33) B1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B1EIDHbits_t; +extern volatile __B1EIDHbits_t __at (0xE33) B1EIDHbits; + +extern __sfr __at (0xE34) B1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B1EIDLbits_t; +extern volatile __B1EIDLbits_t __at (0xE34) B1EIDLbits; + +extern __sfr __at (0xE35) B1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B1DLC : 1; + unsigned RB1_B1DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B1DLCbits_t; +extern volatile __B1DLCbits_t __at (0xE35) B1DLCbits; + +extern __sfr __at (0xE36) B1D0; +typedef union { + struct { + unsigned B1D00 : 1; + unsigned B1D01 : 1; + unsigned B1D02 : 1; + unsigned B1D03 : 1; + unsigned B1D04 : 1; + unsigned B1D05 : 1; + unsigned B1D06 : 1; + unsigned B1D07 : 1; + }; +} __B1D0bits_t; +extern volatile __B1D0bits_t __at (0xE36) B1D0bits; + +extern __sfr __at (0xE37) B1D1; +typedef union { + struct { + unsigned B1D10 : 1; + unsigned B1D11 : 1; + unsigned B1D12 : 1; + unsigned B1D13 : 1; + unsigned B1D14 : 1; + unsigned B1D15 : 1; + unsigned B1D16 : 1; + unsigned B1D17 : 1; + }; +} __B1D1bits_t; +extern volatile __B1D1bits_t __at (0xE37) B1D1bits; + +extern __sfr __at (0xE38) B1D2; +typedef union { + struct { + unsigned B1D20 : 1; + unsigned B1D21 : 1; + unsigned B1D22 : 1; + unsigned B1D23 : 1; + unsigned B1D24 : 1; + unsigned B1D25 : 1; + unsigned B1D26 : 1; + unsigned B1D27 : 1; + }; +} __B1D2bits_t; +extern volatile __B1D2bits_t __at (0xE38) B1D2bits; + +extern __sfr __at (0xE39) B1D3; +typedef union { + struct { + unsigned B1D30 : 1; + unsigned B1D31 : 1; + unsigned B1D32 : 1; + unsigned B1D33 : 1; + unsigned B1D34 : 1; + unsigned B1D35 : 1; + unsigned B1D36 : 1; + unsigned B1D37 : 1; + }; +} __B1D3bits_t; +extern volatile __B1D3bits_t __at (0xE39) B1D3bits; + +extern __sfr __at (0xE3A) B1D4; +typedef union { + struct { + unsigned B1D40 : 1; + unsigned B1D41 : 1; + unsigned B1D42 : 1; + unsigned B1D43 : 1; + unsigned B1D44 : 1; + unsigned B1D45 : 1; + unsigned B1D46 : 1; + unsigned B1D47 : 1; + }; +} __B1D4bits_t; +extern volatile __B1D4bits_t __at (0xE3A) B1D4bits; + +extern __sfr __at (0xE3B) B1D5; +typedef union { + struct { + unsigned B1D50 : 1; + unsigned B1D51 : 1; + unsigned B1D52 : 1; + unsigned B1D53 : 1; + unsigned B1D54 : 1; + unsigned B1D55 : 1; + unsigned B1D56 : 1; + unsigned B1D57 : 1; + }; +} __B1D5bits_t; +extern volatile __B1D5bits_t __at (0xE3B) B1D5bits; + +extern __sfr __at (0xE3C) B1D6; +typedef union { + struct { + unsigned B1D60 : 1; + unsigned B1D61 : 1; + unsigned B1D62 : 1; + unsigned B1D63 : 1; + unsigned B1D64 : 1; + unsigned B1D65 : 1; + unsigned B1D66 : 1; + unsigned B1D67 : 1; + }; +} __B1D6bits_t; +extern volatile __B1D6bits_t __at (0xE3C) B1D6bits; + +extern __sfr __at (0xE3D) B1D7; +typedef union { + struct { + unsigned B1D70 : 1; + unsigned B1D71 : 1; + unsigned B1D72 : 1; + unsigned B1D73 : 1; + unsigned B1D74 : 1; + unsigned B1D75 : 1; + unsigned B1D76 : 1; + unsigned B1D77 : 1; + }; +} __B1D7bits_t; +extern volatile __B1D7bits_t __at (0xE3D) B1D7bits; + +extern __sfr __at (0xE3E) CANSTAT_RO8; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO8bits_t; +extern volatile __CANSTAT_RO8bits_t __at (0xE3E) CANSTAT_RO8bits; + +extern __sfr __at (0xE3F) CANCON_RO8; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO8bits_t; +extern volatile __CANCON_RO8bits_t __at (0xE3F) CANCON_RO8bits; + +extern __sfr __at (0xE40) B2CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B2CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2CONbits_t; +extern volatile __B2CONbits_t __at (0xE40) B2CONbits; + +extern __sfr __at (0xE41) B2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B2SIDHbits_t; +extern volatile __B2SIDHbits_t __at (0xE41) B2SIDHbits; + +extern __sfr __at (0xE42) B2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2SIDLbits_t; +extern volatile __B2SIDLbits_t __at (0xE42) B2SIDLbits; + +extern __sfr __at (0xE43) B2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B2EIDHbits_t; +extern volatile __B2EIDHbits_t __at (0xE43) B2EIDHbits; + +extern __sfr __at (0xE44) B2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B2EIDLbits_t; +extern volatile __B2EIDLbits_t __at (0xE44) B2EIDLbits; + +extern __sfr __at (0xE45) B2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B2DLC : 1; + unsigned RB1_B2DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B2DLCbits_t; +extern volatile __B2DLCbits_t __at (0xE45) B2DLCbits; + +extern __sfr __at (0xE46) B2D0; +typedef union { + struct { + unsigned B2D00 : 1; + unsigned B2D01 : 1; + unsigned B2D02 : 1; + unsigned B2D03 : 1; + unsigned B2D04 : 1; + unsigned B2D05 : 1; + unsigned B2D06 : 1; + unsigned B2D07 : 1; + }; +} __B2D0bits_t; +extern volatile __B2D0bits_t __at (0xE46) B2D0bits; + +extern __sfr __at (0xE47) B2D1; +typedef union { + struct { + unsigned B2D10 : 1; + unsigned B2D11 : 1; + unsigned B2D12 : 1; + unsigned B2D13 : 1; + unsigned B2D14 : 1; + unsigned B2D15 : 1; + unsigned B2D16 : 1; + unsigned B2D17 : 1; + }; +} __B2D1bits_t; +extern volatile __B2D1bits_t __at (0xE47) B2D1bits; + +extern __sfr __at (0xE48) B2D2; +typedef union { + struct { + unsigned B2D20 : 1; + unsigned B2D21 : 1; + unsigned B2D22 : 1; + unsigned B2D23 : 1; + unsigned B2D24 : 1; + unsigned B2D25 : 1; + unsigned B2D26 : 1; + unsigned B2D27 : 1; + }; +} __B2D2bits_t; +extern volatile __B2D2bits_t __at (0xE48) B2D2bits; + +extern __sfr __at (0xE49) B2D3; +typedef union { + struct { + unsigned B2D30 : 1; + unsigned B2D31 : 1; + unsigned B2D32 : 1; + unsigned B2D33 : 1; + unsigned B2D34 : 1; + unsigned B2D35 : 1; + unsigned B2D36 : 1; + unsigned B2D37 : 1; + }; +} __B2D3bits_t; +extern volatile __B2D3bits_t __at (0xE49) B2D3bits; + +extern __sfr __at (0xE4A) B2D4; +typedef union { + struct { + unsigned B2D40 : 1; + unsigned B2D41 : 1; + unsigned B2D42 : 1; + unsigned B2D43 : 1; + unsigned B2D44 : 1; + unsigned B2D45 : 1; + unsigned B2D46 : 1; + unsigned B2D47 : 1; + }; +} __B2D4bits_t; +extern volatile __B2D4bits_t __at (0xE4A) B2D4bits; + +extern __sfr __at (0xE4B) B2D5; +typedef union { + struct { + unsigned B2D50 : 1; + unsigned B2D51 : 1; + unsigned B2D52 : 1; + unsigned B2D53 : 1; + unsigned B2D54 : 1; + unsigned B2D55 : 1; + unsigned B2D56 : 1; + unsigned B2D57 : 1; + }; +} __B2D5bits_t; +extern volatile __B2D5bits_t __at (0xE4B) B2D5bits; + +extern __sfr __at (0xE4C) B2D6; +typedef union { + struct { + unsigned B2D60 : 1; + unsigned B2D61 : 1; + unsigned B2D62 : 1; + unsigned B2D63 : 1; + unsigned B2D64 : 1; + unsigned B2D65 : 1; + unsigned B2D66 : 1; + unsigned B2D67 : 1; + }; +} __B2D6bits_t; +extern volatile __B2D6bits_t __at (0xE4C) B2D6bits; + +extern __sfr __at (0xE4D) B2D7; +typedef union { + struct { + unsigned B2D70 : 1; + unsigned B2D71 : 1; + unsigned B2D72 : 1; + unsigned B2D73 : 1; + unsigned B2D74 : 1; + unsigned B2D75 : 1; + unsigned B2D76 : 1; + unsigned B2D77 : 1; + }; +} __B2D7bits_t; +extern volatile __B2D7bits_t __at (0xE4D) B2D7bits; + +extern __sfr __at (0xE4E) CANSTAT_RO7; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO7bits_t; +extern volatile __CANSTAT_RO7bits_t __at (0xE4E) CANSTAT_RO7bits; + +extern __sfr __at (0xE4F) CANCON_RO7; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO7bits_t; +extern volatile __CANCON_RO7bits_t __at (0xE4F) CANCON_RO7bits; + +extern __sfr __at (0xE50) B3CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B3CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3CONbits_t; +extern volatile __B3CONbits_t __at (0xE50) B3CONbits; + +extern __sfr __at (0xE51) B3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B3SIDHbits_t; +extern volatile __B3SIDHbits_t __at (0xE51) B3SIDHbits; + +extern __sfr __at (0xE52) B3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3SIDLbits_t; +extern volatile __B3SIDLbits_t __at (0xE52) B3SIDLbits; + +extern __sfr __at (0xE53) B3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B3EIDHbits_t; +extern volatile __B3EIDHbits_t __at (0xE53) B3EIDHbits; + +extern __sfr __at (0xE54) B3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B3EIDLbits_t; +extern volatile __B3EIDLbits_t __at (0xE54) B3EIDLbits; + +extern __sfr __at (0xE55) B3DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B3DLC : 1; + unsigned RB1_B3DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B3DLCbits_t; +extern volatile __B3DLCbits_t __at (0xE55) B3DLCbits; + +extern __sfr __at (0xE56) B3D0; +typedef union { + struct { + unsigned B3D00 : 1; + unsigned B3D01 : 1; + unsigned B3D02 : 1; + unsigned B3D03 : 1; + unsigned B3D04 : 1; + unsigned B3D05 : 1; + unsigned B3D06 : 1; + unsigned B3D07 : 1; + }; +} __B3D0bits_t; +extern volatile __B3D0bits_t __at (0xE56) B3D0bits; + +extern __sfr __at (0xE57) B3D1; +typedef union { + struct { + unsigned B3D10 : 1; + unsigned B3D11 : 1; + unsigned B3D12 : 1; + unsigned B3D13 : 1; + unsigned B3D14 : 1; + unsigned B3D15 : 1; + unsigned B3D16 : 1; + unsigned B3D17 : 1; + }; +} __B3D1bits_t; +extern volatile __B3D1bits_t __at (0xE57) B3D1bits; + +extern __sfr __at (0xE58) B3D2; +typedef union { + struct { + unsigned B3D20 : 1; + unsigned B3D21 : 1; + unsigned B3D22 : 1; + unsigned B3D23 : 1; + unsigned B3D24 : 1; + unsigned B3D25 : 1; + unsigned B3D26 : 1; + unsigned B3D27 : 1; + }; +} __B3D2bits_t; +extern volatile __B3D2bits_t __at (0xE58) B3D2bits; + +extern __sfr __at (0xE59) B3D3; +typedef union { + struct { + unsigned B3D30 : 1; + unsigned B3D31 : 1; + unsigned B3D32 : 1; + unsigned B3D33 : 1; + unsigned B3D34 : 1; + unsigned B3D35 : 1; + unsigned B3D36 : 1; + unsigned B3D37 : 1; + }; +} __B3D3bits_t; +extern volatile __B3D3bits_t __at (0xE59) B3D3bits; + +extern __sfr __at (0xE5A) B3D4; +typedef union { + struct { + unsigned B3D40 : 1; + unsigned B3D41 : 1; + unsigned B3D42 : 1; + unsigned B3D43 : 1; + unsigned B3D44 : 1; + unsigned B3D45 : 1; + unsigned B3D46 : 1; + unsigned B3D47 : 1; + }; +} __B3D4bits_t; +extern volatile __B3D4bits_t __at (0xE5A) B3D4bits; + +extern __sfr __at (0xE5B) B3D5; +typedef union { + struct { + unsigned B3D50 : 1; + unsigned B3D51 : 1; + unsigned B3D52 : 1; + unsigned B3D53 : 1; + unsigned B3D54 : 1; + unsigned B3D55 : 1; + unsigned B3D56 : 1; + unsigned B3D57 : 1; + }; +} __B3D5bits_t; +extern volatile __B3D5bits_t __at (0xE5B) B3D5bits; + +extern __sfr __at (0xE5C) B3D6; +typedef union { + struct { + unsigned B3D60 : 1; + unsigned B3D61 : 1; + unsigned B3D62 : 1; + unsigned B3D63 : 1; + unsigned B3D64 : 1; + unsigned B3D65 : 1; + unsigned B3D66 : 1; + unsigned B3D67 : 1; + }; +} __B3D6bits_t; +extern volatile __B3D6bits_t __at (0xE5C) B3D6bits; + +extern __sfr __at (0xE5D) B3D7; +typedef union { + struct { + unsigned B3D70 : 1; + unsigned B3D71 : 1; + unsigned B3D72 : 1; + unsigned B3D73 : 1; + unsigned B3D74 : 1; + unsigned B3D75 : 1; + unsigned B3D76 : 1; + unsigned B3D77 : 1; + }; +} __B3D7bits_t; +extern volatile __B3D7bits_t __at (0xE5D) B3D7bits; + +extern __sfr __at (0xE5E) CANSTAT_RO6; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO6bits_t; +extern volatile __CANSTAT_RO6bits_t __at (0xE5E) CANSTAT_RO6bits; + +extern __sfr __at (0xE5F) CANCON_RO6; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO6bits_t; +extern volatile __CANCON_RO6bits_t __at (0xE5F) CANCON_RO6bits; + +extern __sfr __at (0xE60) B4CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B4CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4CONbits_t; +extern volatile __B4CONbits_t __at (0xE60) B4CONbits; + +extern __sfr __at (0xE61) B4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B4SIDHbits_t; +extern volatile __B4SIDHbits_t __at (0xE61) B4SIDHbits; + +extern __sfr __at (0xE62) B4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4SIDLbits_t; +extern volatile __B4SIDLbits_t __at (0xE62) B4SIDLbits; + +extern __sfr __at (0xE63) B4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B4EIDHbits_t; +extern volatile __B4EIDHbits_t __at (0xE63) B4EIDHbits; + +extern __sfr __at (0xE64) B4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B4EIDLbits_t; +extern volatile __B4EIDLbits_t __at (0xE64) B4EIDLbits; + +extern __sfr __at (0xE65) B4DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B4DLC : 1; + unsigned RB1_B4DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B4DLCbits_t; +extern volatile __B4DLCbits_t __at (0xE65) B4DLCbits; + +extern __sfr __at (0xE66) B4D0; +typedef union { + struct { + unsigned B4D00 : 1; + unsigned B4D01 : 1; + unsigned B4D02 : 1; + unsigned B4D03 : 1; + unsigned B4D04 : 1; + unsigned B4D05 : 1; + unsigned B4D06 : 1; + unsigned B4D07 : 1; + }; +} __B4D0bits_t; +extern volatile __B4D0bits_t __at (0xE66) B4D0bits; + +extern __sfr __at (0xE67) B4D1; +typedef union { + struct { + unsigned B4D10 : 1; + unsigned B4D11 : 1; + unsigned B4D12 : 1; + unsigned B4D13 : 1; + unsigned B4D14 : 1; + unsigned B4D15 : 1; + unsigned B4D16 : 1; + unsigned B4D17 : 1; + }; +} __B4D1bits_t; +extern volatile __B4D1bits_t __at (0xE67) B4D1bits; + +extern __sfr __at (0xE68) B4D2; +typedef union { + struct { + unsigned B4D20 : 1; + unsigned B4D21 : 1; + unsigned B4D22 : 1; + unsigned B4D23 : 1; + unsigned B4D24 : 1; + unsigned B4D25 : 1; + unsigned B4D26 : 1; + unsigned B4D27 : 1; + }; +} __B4D2bits_t; +extern volatile __B4D2bits_t __at (0xE68) B4D2bits; + +extern __sfr __at (0xE69) B4D3; +typedef union { + struct { + unsigned B4D30 : 1; + unsigned B4D31 : 1; + unsigned B4D32 : 1; + unsigned B4D33 : 1; + unsigned B4D34 : 1; + unsigned B4D35 : 1; + unsigned B4D36 : 1; + unsigned B4D37 : 1; + }; +} __B4D3bits_t; +extern volatile __B4D3bits_t __at (0xE69) B4D3bits; + +extern __sfr __at (0xE6A) B4D4; +typedef union { + struct { + unsigned B4D40 : 1; + unsigned B4D41 : 1; + unsigned B4D42 : 1; + unsigned B4D43 : 1; + unsigned B4D44 : 1; + unsigned B4D45 : 1; + unsigned B4D46 : 1; + unsigned B4D47 : 1; + }; +} __B4D4bits_t; +extern volatile __B4D4bits_t __at (0xE6A) B4D4bits; + +extern __sfr __at (0xE6B) B4D5; +typedef union { + struct { + unsigned B4D50 : 1; + unsigned B4D51 : 1; + unsigned B4D52 : 1; + unsigned B4D53 : 1; + unsigned B4D54 : 1; + unsigned B4D55 : 1; + unsigned B4D56 : 1; + unsigned B4D57 : 1; + }; +} __B4D5bits_t; +extern volatile __B4D5bits_t __at (0xE6B) B4D5bits; + +extern __sfr __at (0xE6C) B4D6; +typedef union { + struct { + unsigned B4D60 : 1; + unsigned B4D61 : 1; + unsigned B4D62 : 1; + unsigned B4D63 : 1; + unsigned B4D64 : 1; + unsigned B4D65 : 1; + unsigned B4D66 : 1; + unsigned B4D67 : 1; + }; +} __B4D6bits_t; +extern volatile __B4D6bits_t __at (0xE6C) B4D6bits; + +extern __sfr __at (0xE6D) B4D7; +typedef union { + struct { + unsigned B4D70 : 1; + unsigned B4D71 : 1; + unsigned B4D72 : 1; + unsigned B4D73 : 1; + unsigned B4D74 : 1; + unsigned B4D75 : 1; + unsigned B4D76 : 1; + unsigned B46D77 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B4D77 : 1; + }; +} __B4D7bits_t; +extern volatile __B4D7bits_t __at (0xE6D) B4D7bits; + +extern __sfr __at (0xE6E) CANSTAT_RO5; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO5bits_t; +extern volatile __CANSTAT_RO5bits_t __at (0xE6E) CANSTAT_RO5bits; + +extern __sfr __at (0xE6F) CANCON_RO5; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO5bits_t; +extern volatile __CANCON_RO5bits_t __at (0xE6F) CANCON_RO5bits; + +extern __sfr __at (0xE70) B5CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B5CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5CONbits_t; +extern volatile __B5CONbits_t __at (0xE70) B5CONbits; + +extern __sfr __at (0xE71) B5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B5SIDHbits_t; +extern volatile __B5SIDHbits_t __at (0xE71) B5SIDHbits; + +extern __sfr __at (0xE72) B5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5SIDLbits_t; +extern volatile __B5SIDLbits_t __at (0xE72) B5SIDLbits; + +extern __sfr __at (0xE73) B5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B5EIDHbits_t; +extern volatile __B5EIDHbits_t __at (0xE73) B5EIDHbits; + +extern __sfr __at (0xE74) B5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B5EIDLbits_t; +extern volatile __B5EIDLbits_t __at (0xE74) B5EIDLbits; + +extern __sfr __at (0xE75) B5DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B5DLC : 1; + unsigned RB1_B5DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5DLCbits_t; +extern volatile __B5DLCbits_t __at (0xE75) B5DLCbits; + +extern __sfr __at (0xE76) B5D0; +typedef union { + struct { + unsigned B5D00 : 1; + unsigned B5D01 : 1; + unsigned B5D02 : 1; + unsigned B5D03 : 1; + unsigned B5D04 : 1; + unsigned B5D05 : 1; + unsigned B5D06 : 1; + unsigned B57D07 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D07 : 1; + }; +} __B5D0bits_t; +extern volatile __B5D0bits_t __at (0xE76) B5D0bits; + +extern __sfr __at (0xE77) B5D1; +typedef union { + struct { + unsigned B5D10 : 1; + unsigned B5D11 : 1; + unsigned B5D12 : 1; + unsigned B5D13 : 1; + unsigned B5D14 : 1; + unsigned B5D15 : 1; + unsigned B5D16 : 1; + unsigned B5D17 : 1; + }; +} __B5D1bits_t; +extern volatile __B5D1bits_t __at (0xE77) B5D1bits; + +extern __sfr __at (0xE78) B5D2; +typedef union { + struct { + unsigned B5D20 : 1; + unsigned B5D21 : 1; + unsigned B5D22 : 1; + unsigned B57D23 : 1; + unsigned B5D24 : 1; + unsigned B5D25 : 1; + unsigned B5D26 : 1; + unsigned B5D27 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D23 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5D2bits_t; +extern volatile __B5D2bits_t __at (0xE78) B5D2bits; + +extern __sfr __at (0xE79) B5D3; +typedef union { + struct { + unsigned B5D30 : 1; + unsigned B5D31 : 1; + unsigned B5D32 : 1; + unsigned B5D33 : 1; + unsigned B5D34 : 1; + unsigned B5D35 : 1; + unsigned B5D36 : 1; + unsigned B5D37 : 1; + }; +} __B5D3bits_t; +extern volatile __B5D3bits_t __at (0xE79) B5D3bits; + +extern __sfr __at (0xE7A) B5D4; +typedef union { + struct { + unsigned B5D40 : 1; + unsigned B5D41 : 1; + unsigned B5D42 : 1; + unsigned B5D43 : 1; + unsigned B5D44 : 1; + unsigned B5D45 : 1; + unsigned B5D46 : 1; + unsigned B5D47 : 1; + }; +} __B5D4bits_t; +extern volatile __B5D4bits_t __at (0xE7A) B5D4bits; + +extern __sfr __at (0xE7B) B5D5; +typedef union { + struct { + unsigned B5D50 : 1; + unsigned B5D51 : 1; + unsigned B5D52 : 1; + unsigned B5D53 : 1; + unsigned B5D54 : 1; + unsigned B5D55 : 1; + unsigned B5D56 : 1; + unsigned B5D57 : 1; + }; +} __B5D5bits_t; +extern volatile __B5D5bits_t __at (0xE7B) B5D5bits; + +extern __sfr __at (0xE7C) B5D6; +typedef union { + struct { + unsigned B5D60 : 1; + unsigned B5D61 : 1; + unsigned B5D62 : 1; + unsigned B5D63 : 1; + unsigned B5D64 : 1; + unsigned B5D65 : 1; + unsigned B5D66 : 1; + unsigned B5D67 : 1; + }; +} __B5D6bits_t; +extern volatile __B5D6bits_t __at (0xE7C) B5D6bits; + +extern __sfr __at (0xE7D) B5D7; +typedef union { + struct { + unsigned B5D70 : 1; + unsigned B5D71 : 1; + unsigned B5D72 : 1; + unsigned B5D73 : 1; + unsigned B5D74 : 1; + unsigned B5D75 : 1; + unsigned B5D76 : 1; + unsigned B5D77 : 1; + }; +} __B5D7bits_t; +extern volatile __B5D7bits_t __at (0xE7D) B5D7bits; + +extern __sfr __at (0xE7E) CANSTAT_RO4; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO4bits_t; +extern volatile __CANSTAT_RO4bits_t __at (0xE7E) CANSTAT_RO4bits; + +extern __sfr __at (0xE7F) CANCON_RO4; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO4bits_t; +extern volatile __CANCON_RO4bits_t __at (0xE7F) CANCON_RO4bits; + +extern __sfr __at (0xF00) RXF0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF0SIDHbits_t; +extern volatile __RXF0SIDHbits_t __at (0xF00) RXF0SIDHbits; + +extern __sfr __at (0xF01) RXF0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF0SIDLbits_t; +extern volatile __RXF0SIDLbits_t __at (0xF01) RXF0SIDLbits; + +extern __sfr __at (0xF02) RXF0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF0EIDHbits_t; +extern volatile __RXF0EIDHbits_t __at (0xF02) RXF0EIDHbits; + +extern __sfr __at (0xF03) RXF0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF0EIDLbits_t; +extern volatile __RXF0EIDLbits_t __at (0xF03) RXF0EIDLbits; + +extern __sfr __at (0xF04) RXF1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF1SIDHbits_t; +extern volatile __RXF1SIDHbits_t __at (0xF04) RXF1SIDHbits; + +extern __sfr __at (0xF05) RXF1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF1SIDLbits_t; +extern volatile __RXF1SIDLbits_t __at (0xF05) RXF1SIDLbits; + +extern __sfr __at (0xF06) RXF1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF1EIDHbits_t; +extern volatile __RXF1EIDHbits_t __at (0xF06) RXF1EIDHbits; + +extern __sfr __at (0xF07) RXF1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF1EIDLbits_t; +extern volatile __RXF1EIDLbits_t __at (0xF07) RXF1EIDLbits; + +extern __sfr __at (0xF08) RXF2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF2SIDHbits_t; +extern volatile __RXF2SIDHbits_t __at (0xF08) RXF2SIDHbits; + +extern __sfr __at (0xF09) RXF2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF2SIDLbits_t; +extern volatile __RXF2SIDLbits_t __at (0xF09) RXF2SIDLbits; + +extern __sfr __at (0xF0A) RXF2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF2EIDHbits_t; +extern volatile __RXF2EIDHbits_t __at (0xF0A) RXF2EIDHbits; + +extern __sfr __at (0xF0B) RXF2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF2EIDLbits_t; +extern volatile __RXF2EIDLbits_t __at (0xF0B) RXF2EIDLbits; + +extern __sfr __at (0xF0C) RXF3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF3SIDHbits_t; +extern volatile __RXF3SIDHbits_t __at (0xF0C) RXF3SIDHbits; + +extern __sfr __at (0xF0D) RXF3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF3SIDLbits_t; +extern volatile __RXF3SIDLbits_t __at (0xF0D) RXF3SIDLbits; + +extern __sfr __at (0xF0E) RXF3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF3EIDHbits_t; +extern volatile __RXF3EIDHbits_t __at (0xF0E) RXF3EIDHbits; + +extern __sfr __at (0xF0F) RXF3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF3EIDLbits_t; +extern volatile __RXF3EIDLbits_t __at (0xF0F) RXF3EIDLbits; + +extern __sfr __at (0xF10) RXF4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF4SIDHbits_t; +extern volatile __RXF4SIDHbits_t __at (0xF10) RXF4SIDHbits; + +extern __sfr __at (0xF11) RXF4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF4SIDLbits_t; +extern volatile __RXF4SIDLbits_t __at (0xF11) RXF4SIDLbits; + +extern __sfr __at (0xF12) RXF4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF4EIDHbits_t; +extern volatile __RXF4EIDHbits_t __at (0xF12) RXF4EIDHbits; + +extern __sfr __at (0xF13) RXF4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF4EIDLbits_t; +extern volatile __RXF4EIDLbits_t __at (0xF13) RXF4EIDLbits; + +extern __sfr __at (0xF14) RXF5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF5SIDHbits_t; +extern volatile __RXF5SIDHbits_t __at (0xF14) RXF5SIDHbits; + +extern __sfr __at (0xF15) RXF5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF5SIDLbits_t; +extern volatile __RXF5SIDLbits_t __at (0xF15) RXF5SIDLbits; + +extern __sfr __at (0xF16) RXF5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF5EIDHbits_t; +extern volatile __RXF5EIDHbits_t __at (0xF16) RXF5EIDHbits; + +extern __sfr __at (0xF17) RXF5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF5EIDLbits_t; +extern volatile __RXF5EIDLbits_t __at (0xF17) RXF5EIDLbits; + +extern __sfr __at (0xF18) RXM0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM0SIDHbits_t; +extern volatile __RXM0SIDHbits_t __at (0xF18) RXM0SIDHbits; + +extern __sfr __at (0xF19) RXM0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM0SIDLbits_t; +extern volatile __RXM0SIDLbits_t __at (0xF19) RXM0SIDLbits; + +extern __sfr __at (0xF1A) RXM0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM0EIDHbits_t; +extern volatile __RXM0EIDHbits_t __at (0xF1A) RXM0EIDHbits; + +extern __sfr __at (0xF1B) RXM0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM0EIDLbits_t; +extern volatile __RXM0EIDLbits_t __at (0xF1B) RXM0EIDLbits; + +extern __sfr __at (0xF1C) RXM1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM1SIDHbits_t; +extern volatile __RXM1SIDHbits_t __at (0xF1C) RXM1SIDHbits; + +extern __sfr __at (0xF1D) RXM1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM1SIDLbits_t; +extern volatile __RXM1SIDLbits_t __at (0xF1D) RXM1SIDLbits; + +extern __sfr __at (0xF1E) RXM1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM1EIDHbits_t; +extern volatile __RXM1EIDHbits_t __at (0xF1E) RXM1EIDHbits; + +extern __sfr __at (0xF1F) RXM1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM1EIDLbits_t; +extern volatile __RXM1EIDLbits_t __at (0xF1F) RXM1EIDLbits; + +extern __sfr __at (0xF20) TXB2CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFBXB2CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB2CONbits_t; +extern volatile __TXB2CONbits_t __at (0xF20) TXB2CONbits; + +extern __sfr __at (0xF21) TXB2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB2SIDHbits_t; +extern volatile __TXB2SIDHbits_t __at (0xF21) TXB2SIDHbits; + +extern __sfr __at (0xF22) TXB2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB2SIDLbits_t; +extern volatile __TXB2SIDLbits_t __at (0xF22) TXB2SIDLbits; + +extern __sfr __at (0xF23) TXB2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB2EIDHbits_t; +extern volatile __TXB2EIDHbits_t __at (0xF23) TXB2EIDHbits; + +extern __sfr __at (0xF24) TXB2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB2EIDLbits_t; +extern volatile __TXB2EIDLbits_t __at (0xF24) TXB2EIDLbits; + +extern __sfr __at (0xF25) TXB2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB2DLCbits_t; +extern volatile __TXB2DLCbits_t __at (0xF25) TXB2DLCbits; + +extern __sfr __at (0xF26) TXB2D0; +typedef union { + struct { + unsigned TXB2D00 : 1; + unsigned TXB2D01 : 1; + unsigned TXB2D02 : 1; + unsigned TXB2D03 : 1; + unsigned TXB2D04 : 1; + unsigned TXB2D05 : 1; + unsigned TXB2D06 : 1; + unsigned TXB2D07 : 1; + }; +} __TXB2D0bits_t; +extern volatile __TXB2D0bits_t __at (0xF26) TXB2D0bits; + +extern __sfr __at (0xF27) TXB2D1; +typedef union { + struct { + unsigned TXB2D10 : 1; + unsigned TXB2D11 : 1; + unsigned TXB2D12 : 1; + unsigned TXB2D13 : 1; + unsigned TXB2D14 : 1; + unsigned TXB2D15 : 1; + unsigned TXB2D16 : 1; + unsigned TXB2D17 : 1; + }; +} __TXB2D1bits_t; +extern volatile __TXB2D1bits_t __at (0xF27) TXB2D1bits; + +extern __sfr __at (0xF28) TXB2D2; +typedef union { + struct { + unsigned TXB2D20 : 1; + unsigned TXB2D21 : 1; + unsigned TXB2D22 : 1; + unsigned TXB2D23 : 1; + unsigned TXB2D24 : 1; + unsigned TXB2D25 : 1; + unsigned TXB2D26 : 1; + unsigned TXB2D27 : 1; + }; +} __TXB2D2bits_t; +extern volatile __TXB2D2bits_t __at (0xF28) TXB2D2bits; + +extern __sfr __at (0xF29) TXB2D3; +typedef union { + struct { + unsigned TXB2D30 : 1; + unsigned TXB2D31 : 1; + unsigned TXB2D32 : 1; + unsigned TXB2D33 : 1; + unsigned TXB2D34 : 1; + unsigned TXB2D35 : 1; + unsigned TXB2D36 : 1; + unsigned TXB2D37 : 1; + }; +} __TXB2D3bits_t; +extern volatile __TXB2D3bits_t __at (0xF29) TXB2D3bits; + +extern __sfr __at (0xF2A) TXB2D4; +typedef union { + struct { + unsigned TXB2D40 : 1; + unsigned TXB2D41 : 1; + unsigned TXB2D42 : 1; + unsigned TXB2D43 : 1; + unsigned TXB2D44 : 1; + unsigned TXB2D45 : 1; + unsigned TXB2D46 : 1; + unsigned TXB2D47 : 1; + }; +} __TXB2D4bits_t; +extern volatile __TXB2D4bits_t __at (0xF2A) TXB2D4bits; + +extern __sfr __at (0xF2B) TXB2D5; +typedef union { + struct { + unsigned TXB2D50 : 1; + unsigned TXB2D51 : 1; + unsigned TXB2D52 : 1; + unsigned TXB2D53 : 1; + unsigned TXB2D54 : 1; + unsigned TXB2D55 : 1; + unsigned TXB2D56 : 1; + unsigned TXB2D57 : 1; + }; +} __TXB2D5bits_t; +extern volatile __TXB2D5bits_t __at (0xF2B) TXB2D5bits; + +extern __sfr __at (0xF2C) TXB2D6; +typedef union { + struct { + unsigned TXB2D60 : 1; + unsigned TXB2D61 : 1; + unsigned TXB2D62 : 1; + unsigned TXB2D63 : 1; + unsigned TXB2D64 : 1; + unsigned TXB2D65 : 1; + unsigned TXB2D66 : 1; + unsigned TXB2D67 : 1; + }; +} __TXB2D6bits_t; +extern volatile __TXB2D6bits_t __at (0xF2C) TXB2D6bits; + +extern __sfr __at (0xF2D) TXB2D7; +typedef union { + struct { + unsigned TXB2D70 : 1; + unsigned TXB2D71 : 1; + unsigned TXB2D72 : 1; + unsigned TXB2D73 : 1; + unsigned TXB2D74 : 1; + unsigned TXB2D75 : 1; + unsigned TXB2D76 : 1; + unsigned TXB2D77 : 1; + }; +} __TXB2D7bits_t; +extern volatile __TXB2D7bits_t __at (0xF2D) TXB2D7bits; + +extern __sfr __at (0xF2E) CANSTAT_RO3; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO3bits_t; +extern volatile __CANSTAT_RO3bits_t __at (0xF2E) CANSTAT_RO3bits; + +extern __sfr __at (0xF2F) CANCON_RO3; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO3bits_t; +extern volatile __CANCON_RO3bits_t __at (0xF2F) CANCON_RO3bits; + +extern __sfr __at (0xF30) TXB1CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFTXB1CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB1CONbits_t; +extern volatile __TXB1CONbits_t __at (0xF30) TXB1CONbits; + +extern __sfr __at (0xF31) TXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB1SIDHbits_t; +extern volatile __TXB1SIDHbits_t __at (0xF31) TXB1SIDHbits; + +extern __sfr __at (0xF32) TXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB1SIDLbits_t; +extern volatile __TXB1SIDLbits_t __at (0xF32) TXB1SIDLbits; + +extern __sfr __at (0xF33) TXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB1EIDHbits_t; +extern volatile __TXB1EIDHbits_t __at (0xF33) TXB1EIDHbits; + +extern __sfr __at (0xF34) TXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB1EIDLbits_t; +extern volatile __TXB1EIDLbits_t __at (0xF34) TXB1EIDLbits; + +extern __sfr __at (0xF35) TXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB1DLCbits_t; +extern volatile __TXB1DLCbits_t __at (0xF35) TXB1DLCbits; + +extern __sfr __at (0xF36) TXB1D0; +typedef union { + struct { + unsigned TXB1D00 : 1; + unsigned TXB1D01 : 1; + unsigned TXB1D02 : 1; + unsigned TXB1D03 : 1; + unsigned TXB1D04 : 1; + unsigned TXB1D05 : 1; + unsigned TXB1D06 : 1; + unsigned TXB1D07 : 1; + }; +} __TXB1D0bits_t; +extern volatile __TXB1D0bits_t __at (0xF36) TXB1D0bits; + +extern __sfr __at (0xF37) TXB1D1; +typedef union { + struct { + unsigned TXB1D10 : 1; + unsigned TXB1D11 : 1; + unsigned TXB1D12 : 1; + unsigned TXB1D13 : 1; + unsigned TXB1D14 : 1; + unsigned TXB1D15 : 1; + unsigned TXB1D16 : 1; + unsigned TXB1D17 : 1; + }; +} __TXB1D1bits_t; +extern volatile __TXB1D1bits_t __at (0xF37) TXB1D1bits; + +extern __sfr __at (0xF38) TXB1D2; +typedef union { + struct { + unsigned TXB1D20 : 1; + unsigned TXB1D21 : 1; + unsigned TXB1D22 : 1; + unsigned TXB1D23 : 1; + unsigned TXB1D24 : 1; + unsigned TXB1D25 : 1; + unsigned TXB1D26 : 1; + unsigned TXB1D27 : 1; + }; +} __TXB1D2bits_t; +extern volatile __TXB1D2bits_t __at (0xF38) TXB1D2bits; + +extern __sfr __at (0xF39) TXB1D3; +typedef union { + struct { + unsigned TXB1D30 : 1; + unsigned TXB1D31 : 1; + unsigned TXB1D32 : 1; + unsigned TXB1D33 : 1; + unsigned TXB1D34 : 1; + unsigned TXB1D35 : 1; + unsigned TXB1D36 : 1; + unsigned TXB1D37 : 1; + }; +} __TXB1D3bits_t; +extern volatile __TXB1D3bits_t __at (0xF39) TXB1D3bits; + +extern __sfr __at (0xF3A) TXB1D4; +typedef union { + struct { + unsigned TXB1D40 : 1; + unsigned TXB1D41 : 1; + unsigned TXB1D42 : 1; + unsigned TXB1D43 : 1; + unsigned TXB1D44 : 1; + unsigned TXB1D45 : 1; + unsigned TXB1D46 : 1; + unsigned TXB1D47 : 1; + }; +} __TXB1D4bits_t; +extern volatile __TXB1D4bits_t __at (0xF3A) TXB1D4bits; + +extern __sfr __at (0xF3B) TXB1D5; +typedef union { + struct { + unsigned TXB1D50 : 1; + unsigned TXB1D51 : 1; + unsigned TXB1D52 : 1; + unsigned TXB1D53 : 1; + unsigned TXB1D54 : 1; + unsigned TXB1D55 : 1; + unsigned TXB1D56 : 1; + unsigned TXB1D57 : 1; + }; +} __TXB1D5bits_t; +extern volatile __TXB1D5bits_t __at (0xF3B) TXB1D5bits; + +extern __sfr __at (0xF3C) TXB1D6; +typedef union { + struct { + unsigned TXB1D60 : 1; + unsigned TXB1D61 : 1; + unsigned TXB1D62 : 1; + unsigned TXB1D63 : 1; + unsigned TXB1D64 : 1; + unsigned TXB1D65 : 1; + unsigned TXB1D66 : 1; + unsigned TXB1D67 : 1; + }; +} __TXB1D6bits_t; +extern volatile __TXB1D6bits_t __at (0xF3C) TXB1D6bits; + +extern __sfr __at (0xF3D) TXB1D7; +typedef union { + struct { + unsigned TXB1D70 : 1; + unsigned TXB1D71 : 1; + unsigned TXB1D72 : 1; + unsigned TXB1D73 : 1; + unsigned TXB1D74 : 1; + unsigned TXB1D75 : 1; + unsigned TXB1D76 : 1; + unsigned TXB1D77 : 1; + }; +} __TXB1D7bits_t; +extern volatile __TXB1D7bits_t __at (0xF3D) TXB1D7bits; + +extern __sfr __at (0xF3E) CANSTAT_RO2; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO2bits_t; +extern volatile __CANSTAT_RO2bits_t __at (0xF3E) CANSTAT_RO2bits; + +extern __sfr __at (0xF3F) CANCON_RO2; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO2bits_t; +extern volatile __CANCON_RO2bits_t __at (0xF3F) CANCON_RO2bits; + +extern __sfr __at (0xF40) TXB0CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; +} __TXB0CONbits_t; +extern volatile __TXB0CONbits_t __at (0xF40) TXB0CONbits; + +extern __sfr __at (0xF41) TXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB0SIDHbits_t; +extern volatile __TXB0SIDHbits_t __at (0xF41) TXB0SIDHbits; + +extern __sfr __at (0xF42) TXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB0SIDLbits_t; +extern volatile __TXB0SIDLbits_t __at (0xF42) TXB0SIDLbits; + +extern __sfr __at (0xF43) TXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB0EIDHbits_t; +extern volatile __TXB0EIDHbits_t __at (0xF43) TXB0EIDHbits; + +extern __sfr __at (0xF44) TXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB0EIDLbits_t; +extern volatile __TXB0EIDLbits_t __at (0xF44) TXB0EIDLbits; + +extern __sfr __at (0xF45) TXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB0DLCbits_t; +extern volatile __TXB0DLCbits_t __at (0xF45) TXB0DLCbits; + +extern __sfr __at (0xF46) TXB0D0; +typedef union { + struct { + unsigned TXB0D00 : 1; + unsigned TXB0D01 : 1; + unsigned TXB0D02 : 1; + unsigned TXB0D03 : 1; + unsigned TXB0D04 : 1; + unsigned TXB0D05 : 1; + unsigned TXB0D06 : 1; + unsigned TXB0D07 : 1; + }; +} __TXB0D0bits_t; +extern volatile __TXB0D0bits_t __at (0xF46) TXB0D0bits; + +extern __sfr __at (0xF47) TXB0D1; +typedef union { + struct { + unsigned TXB0D10 : 1; + unsigned TXB0D11 : 1; + unsigned TXB0D12 : 1; + unsigned TXB0D13 : 1; + unsigned TXB0D14 : 1; + unsigned TXB0D15 : 1; + unsigned TXB0D16 : 1; + unsigned TXB0D17 : 1; + }; +} __TXB0D1bits_t; +extern volatile __TXB0D1bits_t __at (0xF47) TXB0D1bits; + +extern __sfr __at (0xF48) TXB0D2; +typedef union { + struct { + unsigned TXB0D20 : 1; + unsigned TXB0D21 : 1; + unsigned TXB0D22 : 1; + unsigned TXB0D23 : 1; + unsigned TXB0D24 : 1; + unsigned TXB0D25 : 1; + unsigned TXB0D26 : 1; + unsigned TXB0D27 : 1; + }; +} __TXB0D2bits_t; +extern volatile __TXB0D2bits_t __at (0xF48) TXB0D2bits; + +extern __sfr __at (0xF49) TXB0D3; +typedef union { + struct { + unsigned TXB0D30 : 1; + unsigned TXB0D31 : 1; + unsigned TXB0D32 : 1; + unsigned TXB0D33 : 1; + unsigned TXB0D34 : 1; + unsigned TXB0D35 : 1; + unsigned TXB0D36 : 1; + unsigned TXB0D37 : 1; + }; +} __TXB0D3bits_t; +extern volatile __TXB0D3bits_t __at (0xF49) TXB0D3bits; + +extern __sfr __at (0xF4A) TXB0D4; +typedef union { + struct { + unsigned TXB0D40 : 1; + unsigned TXB0D41 : 1; + unsigned TXB0D42 : 1; + unsigned TXB0D43 : 1; + unsigned TXB0D44 : 1; + unsigned TXB0D45 : 1; + unsigned TXB0D46 : 1; + unsigned TXB0D47 : 1; + }; +} __TXB0D4bits_t; +extern volatile __TXB0D4bits_t __at (0xF4A) TXB0D4bits; + +extern __sfr __at (0xF4B) TXB0D5; +typedef union { + struct { + unsigned TXB0D50 : 1; + unsigned TXB0D51 : 1; + unsigned TXB0D52 : 1; + unsigned TXB0D53 : 1; + unsigned TXB0D54 : 1; + unsigned TXB0D55 : 1; + unsigned TXB0D56 : 1; + unsigned TXB0D57 : 1; + }; +} __TXB0D5bits_t; +extern volatile __TXB0D5bits_t __at (0xF4B) TXB0D5bits; + +extern __sfr __at (0xF4C) TXB0D6; +typedef union { + struct { + unsigned TXB0D60 : 1; + unsigned TXB0D61 : 1; + unsigned TXB0D62 : 1; + unsigned TXB0D63 : 1; + unsigned TXB0D64 : 1; + unsigned TXB0D65 : 1; + unsigned TXB0D66 : 1; + unsigned TXB0D67 : 1; + }; +} __TXB0D6bits_t; +extern volatile __TXB0D6bits_t __at (0xF4C) TXB0D6bits; + +extern __sfr __at (0xF4D) TXB0D7; +typedef union { + struct { + unsigned TXB0D70 : 1; + unsigned TXB0D71 : 1; + unsigned TXB0D72 : 1; + unsigned TXB0D73 : 1; + unsigned TXB0D74 : 1; + unsigned TXB0D75 : 1; + unsigned TXB0D76 : 1; + unsigned TXB0D77 : 1; + }; +} __TXB0D7bits_t; +extern volatile __TXB0D7bits_t __at (0xF4D) TXB0D7bits; + +extern __sfr __at (0xF4E) CANSTAT_RO1; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO1bits_t; +extern volatile __CANSTAT_RO1bits_t __at (0xF4E) CANSTAT_RO1bits; + +extern __sfr __at (0xF4F) CANCON_RO1; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO1bits_t; +extern volatile __CANCON_RO1bits_t __at (0xF4F) CANCON_RO1bits; + +extern __sfr __at (0xF50) RXB1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned RXRTRRO_RXB1CON : 1; + unsigned FILHIT4 : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned FILHIT3 : 1; + unsigned : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1CONbits_t; +extern volatile __RXB1CONbits_t __at (0xF50) RXB1CONbits; + +extern __sfr __at (0xF51) RXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB1SIDHbits_t; +extern volatile __RXB1SIDHbits_t __at (0xF51) RXB1SIDHbits; + +extern __sfr __at (0xF52) RXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB1SIDLbits_t; +extern volatile __RXB1SIDLbits_t __at (0xF52) RXB1SIDLbits; + +extern __sfr __at (0xF53) RXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB1EIDHbits_t; +extern volatile __RXB1EIDHbits_t __at (0xF53) RXB1EIDHbits; + +extern __sfr __at (0xF54) RXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB1EIDLbits_t; +extern volatile __RXB1EIDLbits_t __at (0xF54) RXB1EIDLbits; + +extern __sfr __at (0xF55) RXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB1DLC : 1; + unsigned RB1_RXB1DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1DLCbits_t; +extern volatile __RXB1DLCbits_t __at (0xF55) RXB1DLCbits; + +extern __sfr __at (0xF56) RXB1D0; +typedef union { + struct { + unsigned RXB1D00 : 1; + unsigned RXB1D01 : 1; + unsigned RXB1D02 : 1; + unsigned RXB1D03 : 1; + unsigned RXB1D04 : 1; + unsigned RXB1D05 : 1; + unsigned RXB1D06 : 1; + unsigned RXB1D07 : 1; + }; +} __RXB1D0bits_t; +extern volatile __RXB1D0bits_t __at (0xF56) RXB1D0bits; + +extern __sfr __at (0xF57) RXB1D1; +typedef union { + struct { + unsigned RXB1D10 : 1; + unsigned RXB1D11 : 1; + unsigned RXB1D12 : 1; + unsigned RXB1D13 : 1; + unsigned RXB1D14 : 1; + unsigned RXB1D15 : 1; + unsigned RXB1D16 : 1; + unsigned RXB1D17 : 1; + }; +} __RXB1D1bits_t; +extern volatile __RXB1D1bits_t __at (0xF57) RXB1D1bits; + +extern __sfr __at (0xF58) RXB1D2; +typedef union { + struct { + unsigned RXB1D20 : 1; + unsigned RXB1D21 : 1; + unsigned RXB1D22 : 1; + unsigned RXB1D23 : 1; + unsigned RXB1D24 : 1; + unsigned RXB1D25 : 1; + unsigned RXB1D26 : 1; + unsigned RXB1D27 : 1; + }; +} __RXB1D2bits_t; +extern volatile __RXB1D2bits_t __at (0xF58) RXB1D2bits; + +extern __sfr __at (0xF59) RXB1D3; +typedef union { + struct { + unsigned RXB1D30 : 1; + unsigned RXB1D31 : 1; + unsigned RXB1D32 : 1; + unsigned RXB1D33 : 1; + unsigned RXB1D34 : 1; + unsigned RXB1D35 : 1; + unsigned RXB1D36 : 1; + unsigned RXB1D37 : 1; + }; +} __RXB1D3bits_t; +extern volatile __RXB1D3bits_t __at (0xF59) RXB1D3bits; + +extern __sfr __at (0xF5A) RXB1D4; +typedef union { + struct { + unsigned RXB1D40 : 1; + unsigned RXB1D41 : 1; + unsigned RXB1D42 : 1; + unsigned RXB1D43 : 1; + unsigned RXB1D44 : 1; + unsigned RXB1D45 : 1; + unsigned RXB1D46 : 1; + unsigned RXB1D47 : 1; + }; +} __RXB1D4bits_t; +extern volatile __RXB1D4bits_t __at (0xF5A) RXB1D4bits; + +extern __sfr __at (0xF5B) RXB1D5; +typedef union { + struct { + unsigned RXB1D50 : 1; + unsigned RXB1D51 : 1; + unsigned RXB1D52 : 1; + unsigned RXB1D53 : 1; + unsigned RXB1D54 : 1; + unsigned RXB1D55 : 1; + unsigned RXB1D56 : 1; + unsigned RXB1D57 : 1; + }; +} __RXB1D5bits_t; +extern volatile __RXB1D5bits_t __at (0xF5B) RXB1D5bits; + +extern __sfr __at (0xF5C) RXB1D6; +typedef union { + struct { + unsigned RXB1D60 : 1; + unsigned RXB1D61 : 1; + unsigned RXB1D62 : 1; + unsigned RXB1D63 : 1; + unsigned RXB1D64 : 1; + unsigned RXB1D65 : 1; + unsigned RXB1D66 : 1; + unsigned RXB1D67 : 1; + }; +} __RXB1D6bits_t; +extern volatile __RXB1D6bits_t __at (0xF5C) RXB1D6bits; + +extern __sfr __at (0xF5D) RXB1D7; +typedef union { + struct { + unsigned RXB1D70 : 1; + unsigned RXB1D71 : 1; + unsigned RXB1D72 : 1; + unsigned RXB1D73 : 1; + unsigned RXB1D74 : 1; + unsigned RXB1D75 : 1; + unsigned RXB1D76 : 1; + unsigned RXB1D77 : 1; + }; +} __RXB1D7bits_t; +extern volatile __RXB1D7bits_t __at (0xF5D) RXB1D7bits; + +extern __sfr __at (0xF5E) CANSTAT_RO0; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO0bits_t; +extern volatile __CANSTAT_RO0bits_t __at (0xF5E) CANSTAT_RO0bits; + +extern __sfr __at (0xF5F) CANCON_RO0; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO0bits_t; +extern volatile __CANCON_RO0bits_t __at (0xF5F) CANCON_RO0bits; + +extern __sfr __at (0xF60) RXB0CON; +typedef union { + struct { + unsigned : 1; + unsigned JTOFF : 1; + unsigned RXB0DBEN : 1; + unsigned RXRTRRO_RXB0CON : 1; + unsigned : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0CONbits_t; +extern volatile __RXB0CONbits_t __at (0xF60) RXB0CONbits; + +extern __sfr __at (0xF61) RXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB0SIDHbits_t; +extern volatile __RXB0SIDHbits_t __at (0xF61) RXB0SIDHbits; + +extern __sfr __at (0xF62) RXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB0SIDLbits_t; +extern volatile __RXB0SIDLbits_t __at (0xF62) RXB0SIDLbits; + +extern __sfr __at (0xF63) RXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB0EIDHbits_t; +extern volatile __RXB0EIDHbits_t __at (0xF63) RXB0EIDHbits; + +extern __sfr __at (0xF64) RXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB0EIDLbits_t; +extern volatile __RXB0EIDLbits_t __at (0xF64) RXB0EIDLbits; + +extern __sfr __at (0xF65) RXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB0DLC : 1; + unsigned RB1_RXB0DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0DLCbits_t; +extern volatile __RXB0DLCbits_t __at (0xF65) RXB0DLCbits; + +extern __sfr __at (0xF66) RXB0D0; +typedef union { + struct { + unsigned RXB0D00 : 1; + unsigned RXB0D01 : 1; + unsigned RXB0D02 : 1; + unsigned RXB0D03 : 1; + unsigned RXB0D04 : 1; + unsigned RXB0D05 : 1; + unsigned RXB0D06 : 1; + unsigned RXB0D07 : 1; + }; +} __RXB0D0bits_t; +extern volatile __RXB0D0bits_t __at (0xF66) RXB0D0bits; + +extern __sfr __at (0xF67) RXB0D1; +typedef union { + struct { + unsigned RXB0D10 : 1; + unsigned RXB0D11 : 1; + unsigned RXB0D12 : 1; + unsigned RXB0D13 : 1; + unsigned RXB0D14 : 1; + unsigned RXB0D15 : 1; + unsigned RXB0D16 : 1; + unsigned RXB0D17 : 1; + }; +} __RXB0D1bits_t; +extern volatile __RXB0D1bits_t __at (0xF67) RXB0D1bits; + +extern __sfr __at (0xF68) RXB0D2; +typedef union { + struct { + unsigned RXB0D20 : 1; + unsigned RXB0D21 : 1; + unsigned RXB0D22 : 1; + unsigned RXB0D23 : 1; + unsigned RXB0D24 : 1; + unsigned RXB0D25 : 1; + unsigned RXB0D26 : 1; + unsigned RXB0D27 : 1; + }; +} __RXB0D2bits_t; +extern volatile __RXB0D2bits_t __at (0xF68) RXB0D2bits; + +extern __sfr __at (0xF69) RXB0D3; +typedef union { + struct { + unsigned RXB0D30 : 1; + unsigned RXB0D31 : 1; + unsigned RXB0D32 : 1; + unsigned RXB0D33 : 1; + unsigned RXB0D34 : 1; + unsigned RXB0D35 : 1; + unsigned RXB0D36 : 1; + unsigned RXB0D37 : 1; + }; +} __RXB0D3bits_t; +extern volatile __RXB0D3bits_t __at (0xF69) RXB0D3bits; + +extern __sfr __at (0xF6A) RXB0D4; +typedef union { + struct { + unsigned RXB0D40 : 1; + unsigned RXB0D41 : 1; + unsigned RXB0D42 : 1; + unsigned RXB0D43 : 1; + unsigned RXB0D44 : 1; + unsigned RXB0D45 : 1; + unsigned RXB0D46 : 1; + unsigned RXB0D47 : 1; + }; +} __RXB0D4bits_t; +extern volatile __RXB0D4bits_t __at (0xF6A) RXB0D4bits; + +extern __sfr __at (0xF6B) RXB0D5; +typedef union { + struct { + unsigned RXB0D50 : 1; + unsigned RXB0D51 : 1; + unsigned RXB0D52 : 1; + unsigned RXB0D53 : 1; + unsigned RXB0D54 : 1; + unsigned RXB0D55 : 1; + unsigned RXB0D56 : 1; + unsigned RXB0D57 : 1; + }; +} __RXB0D5bits_t; +extern volatile __RXB0D5bits_t __at (0xF6B) RXB0D5bits; + +extern __sfr __at (0xF6C) RXB0D6; +typedef union { + struct { + unsigned RXB0D60 : 1; + unsigned RXB0D61 : 1; + unsigned RXB0D62 : 1; + unsigned RXB0D63 : 1; + unsigned RXB0D64 : 1; + unsigned RXB0D65 : 1; + unsigned RXB0D66 : 1; + unsigned RXB0D67 : 1; + }; +} __RXB0D6bits_t; +extern volatile __RXB0D6bits_t __at (0xF6C) RXB0D6bits; + +extern __sfr __at (0xF6D) RXB0D7; +typedef union { + struct { + unsigned RXB0D70 : 1; + unsigned RXB0D71 : 1; + unsigned RXB0D72 : 1; + unsigned RXB0D73 : 1; + unsigned RXB0D74 : 1; + unsigned RXB0D75 : 1; + unsigned RXB0D76 : 1; + unsigned RXB0D77 : 1; + }; +} __RXB0D7bits_t; +extern volatile __RXB0D7bits_t __at (0xF6D) RXB0D7bits; + +extern __sfr __at (0xF6E) CANSTAT; +typedef union { + struct { + unsigned EICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned EICODE4 : 1; + unsigned OPMODE0 : 1; + unsigned OPMODE1 : 1; + unsigned OPMODE2 : 1; + }; + struct { + unsigned : 1; + unsigned EICODE1 : 1; + unsigned EICODE2 : 1; + unsigned EICODE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANSTATbits_t; +extern volatile __CANSTATbits_t __at (0xF6E) CANSTATbits; + +extern __sfr __at (0xF6F) CANCON; +typedef union { + struct { + unsigned FP0 : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; + struct { + unsigned : 1; + unsigned FP1 : 1; + unsigned FP2 : 1; + unsigned FP3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANCONbits_t; +extern volatile __CANCONbits_t __at (0xF6F) CANCONbits; + +extern __sfr __at (0xF70) BRGCON1; +typedef union { + struct { + unsigned BRP0 : 1; + unsigned BRP1 : 1; + unsigned BRP2 : 1; + unsigned BRP3 : 1; + unsigned BRP4 : 1; + unsigned BRP5 : 1; + unsigned SJW0 : 1; + unsigned SJW1 : 1; + }; +} __BRGCON1bits_t; +extern volatile __BRGCON1bits_t __at (0xF70) BRGCON1bits; + +extern __sfr __at (0xF71) BRGCON2; +typedef union { + struct { + unsigned PRSEG0 : 1; + unsigned PRSEG1 : 1; + unsigned PRSEG2 : 1; + unsigned SEG1PH0 : 1; + unsigned SEG1PH1 : 1; + unsigned SEG1PH2 : 1; + unsigned SAM : 1; + unsigned SEG2PHTS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SEG2PHT : 1; + }; +} __BRGCON2bits_t; +extern volatile __BRGCON2bits_t __at (0xF71) BRGCON2bits; + +extern __sfr __at (0xF72) BRGCON3; +typedef union { + struct { + unsigned SEG2PH0 : 1; + unsigned SEG2PH1 : 1; + unsigned SEG2PH2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned WAKFIL : 1; + unsigned WAKDIS : 1; + }; +} __BRGCON3bits_t; +extern volatile __BRGCON3bits_t __at (0xF72) BRGCON3bits; + +extern __sfr __at (0xF73) CIOCON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CANCAP : 1; + unsigned ENDRHI : 1; + unsigned : 1; + unsigned : 1; + }; +} __CIOCONbits_t; +extern volatile __CIOCONbits_t __at (0xF73) CIOCONbits; + +extern __sfr __at (0xF74) COMSTAT; +typedef union { + struct { + unsigned EWARN : 1; + unsigned RXWARN : 1; + unsigned TXWARN : 1; + unsigned RXBP : 1; + unsigned TXBP : 1; + unsigned TXBO : 1; + unsigned RXB1OVFL : 1; + unsigned RXB0OVFL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXBnOVFL : 1; + unsigned FIFOEMPTY : 1; + }; +} __COMSTATbits_t; +extern volatile __COMSTATbits_t __at (0xF74) COMSTATbits; + +extern __sfr __at (0xF75) RXERRCNT; +typedef union { + struct { + unsigned REC0 : 1; + unsigned REC1 : 1; + unsigned REC2 : 1; + unsigned REC3 : 1; + unsigned REC4 : 1; + unsigned REC5 : 1; + unsigned REC6 : 1; + unsigned REC7 : 1; + }; +} __RXERRCNTbits_t; +extern volatile __RXERRCNTbits_t __at (0xF75) RXERRCNTbits; + +extern __sfr __at (0xF76) TXERRCNT; +typedef union { + struct { + unsigned TEC0 : 1; + unsigned TEC1 : 1; + unsigned TEC2 : 1; + unsigned TEC3 : 1; + unsigned TEC4 : 1; + unsigned TEC5 : 1; + unsigned TEC6 : 1; + unsigned TEC7 : 1; + }; +} __TXERRCNTbits_t; +extern volatile __TXERRCNTbits_t __at (0xF76) TXERRCNTbits; + +extern __sfr __at (0xF77) ECANCON; +typedef union { + struct { + unsigned EWIN0 : 1; + unsigned EWIN1 : 1; + unsigned EWIN2 : 1; + unsigned EWIN3 : 1; + unsigned EWIN4 : 1; + unsigned FIFOWM : 1; + unsigned MDSEL0 : 1; + unsigned MDSEL1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned F : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECANCONbits_t; +extern volatile __ECANCONbits_t __at (0xF77) ECANCONbits; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned OSC1 : 1; + }; + struct { + unsigned CVREF : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned LVDIN : 1; + unsigned CLKO : 1; + unsigned CLKI : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0_PORTB : 1; + unsigned RB1_PORTB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CANRX : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned CANTX : 1; + unsigned : 1; + unsigned AN9 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0_DDRB : 1; + unsigned RB1_DDRB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSCR : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXBIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned : 1; + unsigned : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned : 1; + unsigned : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned : 1; + unsigned : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned ERRIE : 1; + unsigned WAKIE : 1; + unsigned IRXIE : 1; + }; + struct { + unsigned FIFOWMIE : 1; + unsigned RXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FIFOMWIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned RXB0IF : 1; + unsigned RXB1IF : 1; + unsigned TXB0IF : 1; + unsigned TXB1IF : 1; + unsigned TXB2IF : 1; + unsigned ERRIF : 1; + unsigned WAKIF : 1; + unsigned IRXIF : 1; + }; + struct { + unsigned FIFOWMIF : 1; + unsigned RXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned RXB0IP : 1; + unsigned RXB1IP : 1; + unsigned TXB0IP : 1; + unsigned TXB1IP : 1; + unsigned TXB2IP : 1; + unsigned ERRIP : 1; + unsigned WAKIP : 1; + unsigned IRXIP : 1; + }; + struct { + unsigned FIFOWMIP : 1; + unsigned RXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAA) EEADRH; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T3NSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T3ECCP1 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO_DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T0PS3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned SP0 : 1; + unsigned SP1 : 1; + unsigned SP2 : 1; + unsigned SP3 : 1; + unsigned SP4 : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f26k20.h b/device/include/pic16/pic18f26k20.h new file mode 100644 index 0000000..3b4b796 --- /dev/null +++ b/device/include/pic16/pic18f26k20.h @@ -0,0 +1,6 @@ +/* + * pic18f26k20.h - device specific declarations + */ + +#include "pic18f46k20.h" + diff --git a/device/include/pic16/pic18f4220.h b/device/include/pic16/pic18f4220.h new file mode 100644 index 0000000..4a6054a --- /dev/null +++ b/device/include/pic16/pic18f4220.h @@ -0,0 +1,1200 @@ + +/* + * pic18f4220.h - PIC18F4220 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f4220.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F4220_H__ +#define __PIC18F4220_H__ + +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned RA7:1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned CCP2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned AN12:1; + unsigned AN10:1; + unsigned AN8:1; + unsigned AN9:1; + unsigned AN11:1; + unsigned KBI1:1; + unsigned KBI2:1; + unsigned KBI3:1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf83) PORTD; +typedef union { + struct { + unsigned RD0:1; + unsigned RD1:1; + unsigned RD2:1; + unsigned RD3:1; + unsigned RD4:1; + unsigned RD5:1; + unsigned RD6:1; + unsigned RD7:1; + }; + + struct { + unsigned PSP0:1; + unsigned PSP1:1; + unsigned PSP2:1; + unsigned PSP3:1; + unsigned PSP4:1; + unsigned PSP5:1; + unsigned PSP6:1; + unsigned PSP7:1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned P1B:1; + unsigned P1C:1; + unsigned P1D:1; + }; + +} __PORTDbits_t; + +extern volatile __PORTDbits_t __at (0xf83) PORTDbits; + +extern __sfr __at (0xf84) PORTE; +typedef union { + struct { + unsigned RE0:1; + unsigned RE1:1; + unsigned RE2:1; + unsigned RE3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned AN5:1; + unsigned AN6:1; + unsigned AN7:1; + unsigned MCLR:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned RD:1; + unsigned WR:1; + unsigned CS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + +} __PORTEbits_t; + +extern volatile __PORTEbits_t __at (0xf84) PORTEbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf8c) LATD; +typedef union { + struct { + unsigned LATD0:1; + unsigned LATD1:1; + unsigned LATD2:1; + unsigned LATD3:1; + unsigned LATD4:1; + unsigned LATD5:1; + unsigned LATD6:1; + unsigned LATD7:1; + }; +} __LATDbits_t; + +extern volatile __LATDbits_t __at (0xf8c) LATDbits; + +extern __sfr __at (0xf8d) LATE; +typedef union { + struct { + unsigned LATE0:1; + unsigned LATE1:1; + unsigned LATE2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __LATEbits_t; + +extern volatile __LATEbits_t __at (0xf8d) LATEbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf95) TRISD; +typedef union { + struct { + unsigned TRISD0:1; + unsigned TRISD1:1; + unsigned TRISD2:1; + unsigned TRISD3:1; + unsigned TRISD4:1; + unsigned TRISD5:1; + unsigned TRISD6:1; + unsigned TRISD7:1; + }; +} __TRISDbits_t; + +extern volatile __TRISDbits_t __at (0xf95) TRISDbits; + +extern __sfr __at (0xf96) TRISE; +typedef union { + struct { + unsigned TRISE0:1; + unsigned TRISE1:1; + unsigned TRISE2:1; + unsigned :1; + unsigned PSPMODE:1; + unsigned IBOV:1; + unsigned OBF:1; + unsigned IBF:1; + }; +} __TRISEbits_t; + +extern volatile __TRISEbits_t __at (0xf96) TRISEbits; + +extern __sfr __at (0xf9b) OSCTUNE; +typedef union { + struct { + unsigned TUN0:1; + unsigned TUN1:1; + unsigned TUN2:1; + unsigned TUN3:1; + unsigned TUN4:1; + unsigned TUN5:1; + unsigned :1; + unsigned :1; + }; +} __OSCTUNEbits_t; + +extern volatile __OSCTUNEbits_t __at (0xf9b) OSCTUNEbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned CMIE:1; + unsigned OSCFIE:1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned CMIF:1; + unsigned OSCFIF:1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned CMIP:1; + unsigned OSCFIP:1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfab) RCSTA; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTAbits_t; + +extern volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +extern __sfr __at (0xfac) TXSTA; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTAbits_t; + +extern volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfb4) CMCON; +typedef union { + struct { + unsigned CM0:1; + unsigned CM1:1; + unsigned CM2:1; + unsigned CIS:1; + unsigned C1INV:1; + unsigned C2INV:1; + unsigned C1OUT:1; + unsigned C2OUT:1; + }; +} __CMCONbits_t; + +extern volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +extern __sfr __at (0xfb5) CVRCON; +typedef union { + struct { + unsigned CVR0:1; + unsigned CVR1:1; + unsigned CVR2:1; + unsigned CVR3:1; + unsigned CVREF:1; + unsigned CVRR:1; + unsigned CVROE:1; + unsigned CVREN:1; + }; +} __CVRCONbits_t; + +extern volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +extern __sfr __at (0xfba) CCP2CON; +typedef union { + struct { + unsigned CCP2M0:1; + unsigned CCP2M1:1; + unsigned CCP2M2:1; + unsigned CCP2M3:1; + unsigned DCCP2Y:1; + unsigned DCCP2X:1; + unsigned :1; + unsigned :1; + }; +} __CCP2CONbits_t; + +extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +extern __sfr __at (0xfbb) CCPR2L; +extern __sfr __at (0xfbc) CCPR2H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DC1B0:1; + unsigned DC1B1:1; + unsigned P1M0:1; + unsigned P1M1:1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfb7) PWM1CON; +typedef union { + struct { + unsigned PDC0:1; + unsigned PDC1:1; + unsigned PDC2:1; + unsigned PDC3:1; + unsigned PDC4:1; + unsigned PDC5:1; + unsigned PDC6:1; + unsigned PRSEN:1; + }; +} __PWM1CONbits_t; + +extern volatile __PWM1CONbits_t __at (0xfb7) PWM1CONbits; + +extern __sfr __at (0xfb6) ECCPAS; +typedef union { + struct { + unsigned PSSBD0:1; + unsigned PSSBD1:1; + unsigned PSSAC0:1; + unsigned PSSAC1:1; + unsigned ECCPAS0:1; + unsigned ECCPAS1:1; + unsigned ECCPAS2:1; + unsigned ECCPASE:1; + }; +} __ECCPASbits_t; + +extern volatile __ECCPASbits_t __at (0xfb6) ECCPASbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc0) ADCON2; +typedef union { + struct { + unsigned ADCS0:1; + unsigned ADCS1:1; + unsigned ADCS2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned ADFM:1; + }; +} __ADCON2bits_t; + +extern volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned VCFG0:1; + unsigned VCFG1:1; + unsigned :1; + unsigned :1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned CHS3:1; + unsigned :1; + unsigned :1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +typedef union { + struct { + unsigned T0PS0:1; + unsigned T0PS1:1; + unsigned T0PS2:1; + unsigned PSA:1; + unsigned T0SE:1; + unsigned T0CS:1; + unsigned T08BIT:1; + unsigned TMR0ON:1; + }; +} __T0CONbits_t; + +extern volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned INT2F:1; + unsigned :1; + unsigned INT1E:1; + unsigned INT2E:1; + unsigned :1; + unsigned INT1P:1; + unsigned INT2P:1; + }; + + struct { + unsigned INT1IF:1; + unsigned INT2IF:1; + unsigned :1; + unsigned INT1IE:1; + unsigned INT2IE:1; + unsigned :1; + unsigned INT1IP:1; + unsigned INT2IP:1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned :1; + unsigned T0IP:1; + unsigned :1; + unsigned INTEDG2:1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_11XX_1H 0xFC /* 11XX EXT RC-CLKOUT on RA6 */ +#define _OSC_101X_1H 0xFA /* 101X EXT RC-CLKOUT on RA6 */ +#define _OSC_INT_CLKOUT_on_RA6_Port_on_RA7_1H 0xF9 /* INT RC-CLKOUT_on_RA6_Port_on_RA7 */ +#define _OSC_INT_Port_on_RA6_Port_on_RA7_1H 0xF8 /* INT RC-Port_on_RA6_Port_on_RA7 */ +#define _OSC_EXT_Port_on_RA6_1H 0xF7 /* EXT RC-Port_on_RA6 */ +#define _OSC_HS_PLL_1H 0xF6 /* HS-PLL enabled freq=4xFosc1 */ +#define _OSC_EC_PORT_1H 0xF5 /* EC-Port on RA6 */ +#define _OSC_EC_CLKOUT_1H 0xF4 /* EC-CLKOUT on RA6 */ +#define _OSC_EXT_CLKOUT_on_RA6_1H 0xF3 /* EXT RC-CLKOUT_on_RA6 */ +#define _OSC_HS_1H 0xF2 /* HS */ +#define _OSC_XT_1H 0xF1 /* XT */ +#define _OSC_LP_1H 0xF0 /* LP */ + +/* Fail Safe Clock Monitor Enable 1H options */ +#define _FCMEN_OFF_1H 0xBF /* Disabled */ +#define _FCMEN_ON_1H 0xFF /* Enabled */ + +/* Internal External Switch Over 1H options */ +#define _IESO_OFF_1H 0x7F /* Disabled */ +#define _IESO_ON_1H 0xFF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_0V_2L 0xFF /* 2.0V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_DISABLED_CONTROLLED_2H 0xFE /* Disabled-Controlled by SWDTEN bit */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_32768_2H 0xFF /* 1:32768 */ +#define _WDTPS_1_16384_2H 0xFD /* 1:16384 */ +#define _WDTPS_1_8192_2H 0xFB /* 1:8192 */ +#define _WDTPS_1_4096_2H 0xF9 /* 1:4096 */ +#define _WDTPS_1_2048_2H 0xF7 /* 1:2048 */ +#define _WDTPS_1_1024_2H 0xF5 /* 1:1024 */ +#define _WDTPS_1_512_2H 0xF3 /* 1:512 */ +#define _WDTPS_1_256_2H 0xF1 /* 1:256 */ +#define _WDTPS_1_128_2H 0xEF /* 1:128 */ +#define _WDTPS_1_64_2H 0xED /* 1:64 */ +#define _WDTPS_1_32_2H 0xEB /* 1:32 */ +#define _WDTPS_1_16_2H 0xE9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xE7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xE5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xE3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xE1 /* 1:1 */ + +/* CCP2 Mux 3H options */ +#define _CCP2MUX_RC1_3H 0xFF /* RC1 */ +#define _CCP2MUX_RB3_3H 0xFE /* RB3 */ + +/* PortB A/D Enable 3H options */ +#define _PBADEN_PORTB_4_0__analog_inputs_on_RSET_3H 0xFF /* PORTB<4:0> configured as analog_inputs_on_RESET */ +#define _PBADEN_PORTB_4_0__digital_I_O_on_REST_3H 0xFD /* PORTB<4:0> configured as digital_I_O_on_RESET */ + +/* MCLR enable 3H options */ +#define _MCLRE_MCLR_Enabled_RE3_Disabled_3H 0xFF /* MCLR Enabled_RE3_Disabled */ +#define _MCLRE_MCLR_Disabled_RE3_Enabled_3H 0x7F /* MCLR Disabled__RE3_Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Code Protect 000200-0007FF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 000800-000FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00200-007FF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 00800-00FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00200-007FF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 00800-00FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f4221.h b/device/include/pic16/pic18f4221.h new file mode 100644 index 0000000..c5d1d45 --- /dev/null +++ b/device/include/pic16/pic18f4221.h @@ -0,0 +1,1544 @@ +/* + * pic18f4221.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F4221_H__ +#define __PIC18F4221_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP Oscillator +#define _OSC_XT_1H 0xF1 // XT Oscillator +#define _OSC_HS_1H 0xF2 // HS Oscillator +#define _OSC_RC_1H 0xF3 // External RC oscillator, CLKO function on RA6 +#define _OSC_EC_1H 0xF4 // EC oscillator, CLKO function on RA6 +#define _OSC_ECIO_1H 0xF5 // EC oscillator, port function on RA6 +#define _OSC_HSPLL_1H 0xF6 // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) +#define _OSC_RCIO_1H 0xF7 // External RC oscillator, port function on RA6 +#define _OSC_INTIO2_1H 0xF8 // Internal oscillator block, port function on RA6 and RA7 +#define _OSC_INTIO1_1H 0xF9 // Internal oscillator block, CLKO function on RA6, port function on RA7 +#define _FCMEN_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled +#define _FCMEN_ON_1H 0xFF // Fail-Safe Clock Monitor enabled +#define _IESO_OFF_1H 0x7F // Oscillator Switchover mode disabled +#define _IESO_ON_1H 0xFF // Oscillator Switchover mode enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // PWRT enabled +#define _PWRT_OFF_2L 0xFF // PWRT disabled +#define _BOR_OFF_2L 0xF9 // Brown-out Reset disabled in hardware and software +#define _BOR_SOFT_2L 0xFB // Brown-out Reset enabled and controlled by software (SBOREN is enabled) +#define _BOR_NOSLP_2L 0xFD // Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) +#define _BOR_ON_2L 0xFF // Brown-out Reset enabled in hardware only (SBOREN is disabled) +#define _BORV_0_2L 0xE7 // Maximum Setting +#define _BORV_1_2L 0xEF // +#define _BORV_2_2L 0xF7 // +#define _BORV_3_2L 0xFF // Minimum Setting + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit) +#define _WDT_ON_2H 0xFF // WDT enabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // RE3 input pin enabled; MCLR disabled +#define _MCLRE_ON_3H 0xFF // MCLR pin enabled; RE3 input pin disabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 configured for higher power operation +#define _LPT1OSC_ON_3H 0xFF // Timer1 configured for low-power operation +#define _PBADEN_DIG_3H 0xFD // PORTB<4:0> pins are configured as digital I/O on Reset +#define _PBADEN_ANA_3H 0xFF // PORTB<4:0> pins are configured as analog input channels on Reset +#define _CCP2MX_RB3_3H 0xFE // CCP2 input/output is multiplexed with RB3 +#define _CCP2MX_RC1_3H 0xFF // CCP2 input/output is multiplexed with RC1 + +// CONFIG4L Options +#define _STVREN_OFF_4L 0xFE // Stack full/underflow will not cause Reset +#define _STVREN_ON_4L 0xFF // Stack full/underflow will cause Reset +#define _LVP_OFF_4L 0xFB // Single-Supply ICSP disabled +#define _LVP_ON_4L 0xFF // Single-Supply ICSP enabled +#define _ICPORT_OFF_4L 0xF7 // ICPORT disabled +#define _ICPORT_ON_4L 0xFF // ICPORT enabled +#define _BBSIZ_BB256_4L 0xCF // 256 Word +#define _BBSIZ_BB512_4L 0xFF // 512 Word +#define _XINST_OFF_4L 0xBF // Instruction set extension and Indexed Addressing mode disabled (Legacy mode) +#define _XINST_ON_4L 0xFF // Instruction set extension and Indexed Addressing mode enabled +#define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug +#define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Block 0 code-protected +#define _CP0_OFF_5L 0xFF // Block 0 not code-protected +#define _CP1_ON_5L 0xFD // Block 1 code-protected +#define _CP1_OFF_5L 0xFF // Block 1 not code-protected + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Boot block code-protected +#define _CPB_OFF_5H 0xFF // Boot block not code-protected +#define _CPD_ON_5H 0x7F // Data EEPROM code-protected +#define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Block 0 write-protected +#define _WRT0_OFF_6L 0xFF // Block 0 not write-protected +#define _WRT1_ON_6L 0xFD // Block 1 write-protected +#define _WRT1_OFF_6L 0xFF // Block 1 not write-protected + +// CONFIG6H Options +#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected +#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected +#define _WRTB_ON_6H 0xBF // Boot block write-protected +#define _WRTB_OFF_6H 0xFF // Boot block not write-protected +#define _WRTD_ON_6H 0x7F // Data EEPROM write-protected +#define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Block 0 protected from table reads executed in other blocks +#define _EBTR0_OFF_7L 0xFF // Block 0 not protected from table reads executed in other blocks +#define _EBTR1_ON_7L 0xFD // Block 1 protected from table reads executed in other blocks +#define _EBTR1_OFF_7L 0xFF // Block 1 not protected from table reads executed in other blocks + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Boot block protected from table reads executed in other blocks +#define _EBTRB_OFF_7H 0xFF // Boot block not protected from table reads executed in other blocks +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned C1OUT_PORTA : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned OSC1 : 1; + }; + struct { + unsigned C1N : 1; + unsigned C2N : 1; + unsigned C2P : 1; + unsigned C1P : 1; + unsigned T0CKI : 1; + unsigned C2OUT_PORTA : 1; + unsigned CLKO : 1; + unsigned CLKI : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned CVREF : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CCP2_PORTB : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN12 : 1; + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned AN9 : 1; + unsigned AN11 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned CCP2_PORTC : 1; + unsigned P1A : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned T1CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned PSP0 : 1; + unsigned PSP1 : 1; + unsigned PSP2 : 1; + unsigned PSP3 : 1; + unsigned PSP4 : 1; + unsigned PSP5 : 1; + unsigned PSP6 : 1; + unsigned PSP7 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned P1B : 1; + unsigned P1C : 1; + unsigned P1D : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned CS : 1; + unsigned MCLR : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned NOT_RD : 1; + unsigned NOT_WR : 1; + unsigned NOT_CS : 1; + unsigned NOT_MCLR : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AN5 : 1; + unsigned AN6 : 1; + unsigned AN7 : 1; + unsigned VPP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PSPIE : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PSPIF : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PSPIP : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT_CMCON : 1; + unsigned C2OUT_CMCON : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) ECCP1DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +extern __sfr __at (0xFB7) PWM1CON; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __PWM1CONbits_t; +extern volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFB8) BAUDCTL; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCTLbits_t; +extern volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBD) ECCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP1CONbits_t; +extern volatile __ECCP1CONbits_t __at (0xFBD) ECCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R_W : 1; + unsigned : 1; + unsigned : 1; + unsigned D_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned TOUTPS0 : 1; + unsigned TOUTPS1 : 1; + unsigned TOUTPS2 : 1; + unsigned TOUTPS3 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned FLTS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T016BIT : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned SP0 : 1; + unsigned SP1 : 1; + unsigned SP2 : 1; + unsigned SP3 : 1; + unsigned SP4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKOVF : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f4320.h b/device/include/pic16/pic18f4320.h new file mode 100644 index 0000000..bfa75f2 --- /dev/null +++ b/device/include/pic16/pic18f4320.h @@ -0,0 +1,6 @@ +/* + * pic18f4320.h - PIC18F4320 Device Library Header + */ + +#include "pic18f4220.h" + diff --git a/device/include/pic16/pic18f4321.h b/device/include/pic16/pic18f4321.h new file mode 100644 index 0000000..931878e --- /dev/null +++ b/device/include/pic16/pic18f4321.h @@ -0,0 +1,1545 @@ +/* + * pic18f4321.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F4321_H__ +#define __PIC18F4321_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP Oscillator +#define _OSC_XT_1H 0xF1 // XT Oscillator +#define _OSC_HS_1H 0xF2 // HS Oscillator +#define _OSC_RC_1H 0xF3 // External RC oscillator, CLKO function on RA6 +#define _OSC_EC_1H 0xF4 // EC oscillator, CLKO function on RA6 +#define _OSC_ECIO_1H 0xF5 // EC oscillator, port function on RA6 +#define _OSC_HSPLL_1H 0xF6 // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) +#define _OSC_RCIO_1H 0xF7 // External RC oscillator, port function on RA6 +#define _OSC_INTIO2_1H 0xF8 // Internal oscillator block, port function on RA6 and RA7 +#define _OSC_INTIO1_1H 0xF9 // Internal oscillator block, CLKO function on RA6, port function on RA7 +#define _FCMEN_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled +#define _FCMEN_ON_1H 0xFF // Fail-Safe Clock Monitor enabled +#define _IESO_OFF_1H 0x7F // Oscillator Switchover mode disabled +#define _IESO_ON_1H 0xFF // Oscillator Switchover mode enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // PWRT enabled +#define _PWRT_OFF_2L 0xFF // PWRT disabled +#define _BOR_OFF_2L 0xF9 // Brown-out Reset disabled in hardware and software +#define _BOR_SOFT_2L 0xFB // Brown-out Reset enabled and controlled by software (SBOREN is enabled) +#define _BOR_NOSLP_2L 0xFD // Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) +#define _BOR_ON_2L 0xFF // Brown-out Reset enabled in hardware only (SBOREN is disabled) +#define _BORV_0_2L 0xE7 // Maximum Setting +#define _BORV_1_2L 0xEF // +#define _BORV_2_2L 0xF7 // +#define _BORV_3_2L 0xFF // Minimum Setting + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit) +#define _WDT_ON_2H 0xFF // WDT enabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // RE3 input pin enabled; MCLR disabled +#define _MCLRE_ON_3H 0xFF // MCLR pin enabled; RE3 input pin disabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 configured for higher power operation +#define _LPT1OSC_ON_3H 0xFF // Timer1 configured for low-power operation +#define _PBADEN_DIG_3H 0xFD // PORTB<4:0> pins are configured as digital I/O on Reset +#define _PBADEN_ANA_3H 0xFF // PORTB<4:0> pins are configured as analog input channels on Reset +#define _CCP2MX_RB3_3H 0xFE // CCP2 input/output is multiplexed with RB3 +#define _CCP2MX_RC1_3H 0xFF // CCP2 input/output is multiplexed with RC1 + +// CONFIG4L Options +#define _STVREN_OFF_4L 0xFE // Stack full/underflow will not cause Reset +#define _STVREN_ON_4L 0xFF // Stack full/underflow will cause Reset +#define _LVP_OFF_4L 0xFB // Single-Supply ICSP disabled +#define _LVP_ON_4L 0xFF // Single-Supply ICSP enabled +#define _ICPORT_OFF_4L 0xF7 // ICPORT disabled +#define _ICPORT_ON_4L 0xFF // ICPORT enabled +#define _BBSIZ_BB256_4L 0xCF // 256 Word +#define _BBSIZ_BB512_4L 0xDF // 512 Word +#define _BBSIZ_BB1K_4L 0xFF // 1024 Word +#define _XINST_OFF_4L 0xBF // Instruction set extension and Indexed Addressing mode disabled (Legacy mode) +#define _XINST_ON_4L 0xFF // Instruction set extension and Indexed Addressing mode enabled +#define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug +#define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Block 0 code-protected +#define _CP0_OFF_5L 0xFF // Block 0 not code-protected +#define _CP1_ON_5L 0xFD // Block 1 code-protected +#define _CP1_OFF_5L 0xFF // Block 1 not code-protected + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Boot block code-protected +#define _CPB_OFF_5H 0xFF // Boot block not code-protected +#define _CPD_ON_5H 0x7F // Data EEPROM code-protected +#define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Block 0 write-protected +#define _WRT0_OFF_6L 0xFF // Block 0 not write-protected +#define _WRT1_ON_6L 0xFD // Block 1 write-protected +#define _WRT1_OFF_6L 0xFF // Block 1 not write-protected + +// CONFIG6H Options +#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected +#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected +#define _WRTB_ON_6H 0xBF // Boot block write-protected +#define _WRTB_OFF_6H 0xFF // Boot block not write-protected +#define _WRTD_ON_6H 0x7F // Data EEPROM write-protected +#define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Block 0 protected from table reads executed in other blocks +#define _EBTR0_OFF_7L 0xFF // Block 0 not protected from table reads executed in other blocks +#define _EBTR1_ON_7L 0xFD // Block 1 protected from table reads executed in other blocks +#define _EBTR1_OFF_7L 0xFF // Block 1 not protected from table reads executed in other blocks + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Boot block protected from table reads executed in other blocks +#define _EBTRB_OFF_7H 0xFF // Boot block not protected from table reads executed in other blocks +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned C1OUT_PORTA : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned OSC1 : 1; + }; + struct { + unsigned C1N : 1; + unsigned C2N : 1; + unsigned C2P : 1; + unsigned C1P : 1; + unsigned T0CKI : 1; + unsigned C2OUT_PORTA : 1; + unsigned CLKO : 1; + unsigned CLKI : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned CVREF : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CCP2_PORTB : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN12 : 1; + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned AN9 : 1; + unsigned AN11 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned CCP2_PORTC : 1; + unsigned P1A : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned T1CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned PSP0 : 1; + unsigned PSP1 : 1; + unsigned PSP2 : 1; + unsigned PSP3 : 1; + unsigned PSP4 : 1; + unsigned PSP5 : 1; + unsigned PSP6 : 1; + unsigned PSP7 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned P1B : 1; + unsigned P1C : 1; + unsigned P1D : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned CS : 1; + unsigned MCLR : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned NOT_RD : 1; + unsigned NOT_WR : 1; + unsigned NOT_CS : 1; + unsigned NOT_MCLR : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AN5 : 1; + unsigned AN6 : 1; + unsigned AN7 : 1; + unsigned VPP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PSPIE : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PSPIF : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PSPIP : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT_CMCON : 1; + unsigned C2OUT_CMCON : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) ECCP1DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +extern __sfr __at (0xFB7) PWM1CON; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __PWM1CONbits_t; +extern volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFB8) BAUDCTL; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCTLbits_t; +extern volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBD) ECCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP1CONbits_t; +extern volatile __ECCP1CONbits_t __at (0xFBD) ECCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R_W : 1; + unsigned : 1; + unsigned : 1; + unsigned D_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned TOUTPS0 : 1; + unsigned TOUTPS1 : 1; + unsigned TOUTPS2 : 1; + unsigned TOUTPS3 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned FLTS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T016BIT : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned SP0 : 1; + unsigned SP1 : 1; + unsigned SP2 : 1; + unsigned SP3 : 1; + unsigned SP4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKOVF : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f4331.h b/device/include/pic16/pic18f4331.h new file mode 100644 index 0000000..d7abf36 --- /dev/null +++ b/device/include/pic16/pic18f4331.h @@ -0,0 +1,1816 @@ +/* + * pic18f4331.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F4331_H__ +#define __PIC18F4331_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3L 0x300004 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP +#define _OSC_XT_1H 0xF1 // XT +#define _OSC_HS_1H 0xF2 // HS +#define _OSC_RC2_1H 0xF3 // External RC, RA6 is CLKOUT +#define _OSC_EC_1H 0xF4 // EC, RA6 is CLKOUT +#define _OSC_ECIO_1H 0xF5 // EC, RA6 is I/O +#define _OSC_HSPLL_1H 0xF6 // HS-PLL Enabled +#define _OSC_RCIO_1H 0xF7 // External RC, RA6 is I/O +#define _OSC_IRCIO_1H 0xF8 // Internal RC, RA6 & RA7 are I/O +#define _OSC_IRC_1H 0xF9 // Internal RC, RA6 is CLKOUT, RA7 is I/O +#define _OSC_RC1_1H 0xFB // External RC, RA6 is CLKOUT +#define _OSC_RC_1H 0xFF // External RC, RA6 is CLKOUT +#define _FCMEN_OFF_1H 0xBF // Disabled +#define _FCMEN_ON_1H 0xFF // Enabled +#define _IESO_OFF_1H 0x7F // Disabled +#define _IESO_ON_1H 0xFF // Enabled + +// CONFIG2L Options +#define _PWRTEN_ON_2L 0xFE // Enabled +#define _PWRTEN_OFF_2L 0xFF // Disabled +#define _BOREN_OFF_2L 0xFD // Disabled +#define _BOREN_ON_2L 0xFF // Enabled +#define _BORV_45_2L 0xF3 // 4.5V +#define _BORV_42_2L 0xF7 // 4.2V +#define _BORV_27_2L 0xFB // 2.7V +#define _BORV_20_2L 0xFF // 2.0V + +// CONFIG2H Options +#define _WDTEN_OFF_2H 0xFE // Disabled +#define _WDTEN_ON_2H 0xFF // Enabled +#define _WINEN_ON_2H 0xDF // Enabled +#define _WINEN_OFF_2H 0xFF // Disabled +#define _WDPS_1_2H 0xE1 // 1:1 +#define _WDPS_2_2H 0xE3 // 1:2 +#define _WDPS_4_2H 0xE5 // 1:4 +#define _WDPS_8_2H 0xE7 // 1:8 +#define _WDPS_16_2H 0xE9 // 1:16 +#define _WDPS_32_2H 0xEB // 1:32 +#define _WDPS_64_2H 0xED // 1:64 +#define _WDPS_128_2H 0xEF // 1:128 +#define _WDPS_256_2H 0xF1 // 1:256 +#define _WDPS_512_2H 0xF3 // 1:512 +#define _WDPS_1024_2H 0xF5 // 1:1024 +#define _WDPS_2048_2H 0xF7 // 1:2048 +#define _WDPS_4096_2H 0xF9 // 1:4096 +#define _WDPS_8192_2H 0xFB // 1:8192 +#define _WDPS_16384_2H 0xFD // 1:16384 +#define _WDPS_32768_2H 0xFF // 1:32768 + +// CONFIG3L Options +#define _T1OSCMX_OFF_3L 0xDF // Active +#define _T1OSCMX_ON_3L 0xFF // Inactive +#define _HPOL_LOW_3L 0xEF // Active low +#define _HPOL_HIGH_3L 0xFF // Active high +#define _LPOL_LOW_3L 0xF7 // Active low +#define _LPOL_HIGH_3L 0xFF // Active high +#define _PWMPIN_ON_3L 0xFB // Enabled +#define _PWMPIN_OFF_3L 0xFF // Disabled + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // Disabled +#define _MCLRE_ON_3H 0xFF // Enabled +#define _EXCLKMX_RD0_3H 0xEF // Multiplexed with RD0 +#define _EXCLKMX_RC3_3H 0xFF // Multiplexed with RC3 +#define _PWM4MX_RD5_3H 0xF7 // Multiplexed with RD5 +#define _PWM4MX_RB5_3H 0xFF // Multiplexed with RB5 +#define _SSPMX_RD1_3H 0xFB // SDO output is multiplexed with RD1 +#define _SSPMX_RC7_3H 0xFF // SD0 output is multiplexed with RC7 +#define _FLTAMX_RD4_3H 0xFE // Multiplexed with RD4 +#define _FLTAMX_RC1_3H 0xFF // Multiplexed with RC1 + +// CONFIG4L Options +#define _STVREN_OFF_4L 0xFE // Disabled +#define _STVREN_ON_4L 0xFF // Enabled +#define _LVP_OFF_4L 0xFB // Disabled +#define _LVP_ON_4L 0xFF // Enabled +#define _DEBUG_ON_4L 0x7F // Enabled +#define _DEBUG_OFF_4L 0xFF // Disabled + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Enabled +#define _CP0_OFF_5L 0xFF // Disabled +#define _CP1_ON_5L 0xFD // Enabled +#define _CP1_OFF_5L 0xFF // Disabled +#define _CP2_ON_5L 0xFB // Enabled +#define _CP2_OFF_5L 0xFF // Disabled +#define _CP3_ON_5L 0xF7 // Enabled +#define _CP3_OFF_5L 0xFF // Disabled + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Enabled +#define _CPB_OFF_5H 0xFF // Disabled +#define _CPD_ON_5H 0x7F // Enabled +#define _CPD_OFF_5H 0xFF // Disabled + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Enabled +#define _WRT0_OFF_6L 0xFF // Disabled +#define _WRT1_ON_6L 0xFD // Enabled +#define _WRT1_OFF_6L 0xFF // Disabled +#define _WRT2_ON_6L 0xFB // Enabled +#define _WRT2_OFF_6L 0xFF // Disabled +#define _WRT3_ON_6L 0xF7 // Enabled +#define _WRT3_OFF_6L 0xFF // Disabled + +// CONFIG6H Options +#define _WRTB_ON_6H 0xBF // Enabled +#define _WRTB_OFF_6H 0xFF // Disabled +#define _WRTC_ON_6H 0xDF // Enabled +#define _WRTC_OFF_6H 0xFF // Disabled +#define _WRTD_ON_6H 0x7F // Enabled +#define _WRTD_OFF_6H 0xFF // Disabled + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Enabled +#define _EBTR0_OFF_7L 0xFF // Disabled +#define _EBTR1_ON_7L 0xFD // Enabled +#define _EBTR1_OFF_7L 0xFF // Disabled +#define _EBTR2_ON_7L 0xFB // Enabled +#define _EBTR2_OFF_7L 0xFF // Disabled +#define _EBTR3_ON_7L 0xF7 // Enabled +#define _EBTR3_OFF_7L 0xFF // Disabled + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Enabled +#define _EBTRB_OFF_7H 0xFF // Disabled +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xF60) DFLTCON; +typedef union { + struct { + unsigned FLTCK0 : 1; + unsigned FLTCK1 : 1; + unsigned FLTCK2 : 1; + unsigned FLT1EN : 1; + unsigned FLT2EN : 1; + unsigned FLT3EN : 1; + unsigned FLT4EN : 1; + unsigned : 1; + }; +} __DFLTCONbits_t; +extern volatile __DFLTCONbits_t __at (0xF60) DFLTCONbits; + +extern __sfr __at (0xF61) CAP3CON; +typedef union { + struct { + unsigned CAP3M0 : 1; + unsigned CAP3M1 : 1; + unsigned CAP3M2 : 1; + unsigned CAP3M3 : 1; + unsigned : 1; + unsigned CAP3TMR : 1; + unsigned CAP3REN : 1; + unsigned : 1; + }; +} __CAP3CONbits_t; +extern volatile __CAP3CONbits_t __at (0xF61) CAP3CONbits; + +extern __sfr __at (0xF62) CAP2CON; +typedef union { + struct { + unsigned CAP2M0 : 1; + unsigned CAP2M1 : 1; + unsigned CAP2M2 : 1; + unsigned CAP2M3 : 1; + unsigned : 1; + unsigned CAP2TMR : 1; + unsigned CAP2REN : 1; + unsigned : 1; + }; +} __CAP2CONbits_t; +extern volatile __CAP2CONbits_t __at (0xF62) CAP2CONbits; + +extern __sfr __at (0xF63) CAP1CON; +typedef union { + struct { + unsigned CAP1M0 : 1; + unsigned CAP1M1 : 1; + unsigned CAP1M2 : 1; + unsigned CAP1M3 : 1; + unsigned : 1; + unsigned CAP1TMR : 1; + unsigned CAP1REN : 1; + unsigned : 1; + }; +} __CAP1CONbits_t; +extern volatile __CAP1CONbits_t __at (0xF63) CAP1CONbits; + +extern __sfr __at (0xF64) CAP3BUFL; + +extern __sfr __at (0xF64) MAXCNTL; + +extern __sfr __at (0xF65) CAP3BUFH; + +extern __sfr __at (0xF65) MAXCNTH; + +extern __sfr __at (0xF66) CAP2BUFL; + +extern __sfr __at (0xF66) POSCNTL; + +extern __sfr __at (0xF67) CAP2BUFH; + +extern __sfr __at (0xF67) POSCNTH; + +extern __sfr __at (0xF68) CAP1BUFL; + +extern __sfr __at (0xF68) VELRL; + +extern __sfr __at (0xF69) CAP1BUFH; + +extern __sfr __at (0xF69) VELRH; + +extern __sfr __at (0xF6A) OVDCONS; +typedef union { + struct { + unsigned POUT0 : 1; + unsigned POUT1 : 1; + unsigned POUT2 : 1; + unsigned POUT3 : 1; + unsigned POUT4 : 1; + unsigned POUT5 : 1; + unsigned POUT6 : 1; + unsigned POUT7 : 1; + }; +} __OVDCONSbits_t; +extern volatile __OVDCONSbits_t __at (0xF6A) OVDCONSbits; + +extern __sfr __at (0xF6B) OVDCOND; +typedef union { + struct { + unsigned POVD0 : 1; + unsigned POVD1 : 1; + unsigned POVD2 : 1; + unsigned POVD3 : 1; + unsigned POVD4 : 1; + unsigned POVD5 : 1; + unsigned POVD6 : 1; + unsigned POVD7 : 1; + }; +} __OVDCONDbits_t; +extern volatile __OVDCONDbits_t __at (0xF6B) OVDCONDbits; + +extern __sfr __at (0xF6C) FLTCONFIG; +typedef union { + struct { + unsigned FLTAEN : 1; + unsigned FLTAMOD : 1; + unsigned FLTAS : 1; + unsigned FLTCON : 1; + unsigned FLTBEN : 1; + unsigned FLTBMOD : 1; + unsigned FLTBS : 1; + unsigned : 1; + }; +} __FLTCONFIGbits_t; +extern volatile __FLTCONFIGbits_t __at (0xF6C) FLTCONFIGbits; + +extern __sfr __at (0xF6D) DTCON; +typedef union { + struct { + unsigned DT0 : 1; + unsigned DT1 : 1; + unsigned DT2 : 1; + unsigned DT3 : 1; + unsigned DT4 : 1; + unsigned DT5 : 1; + unsigned DTPS0 : 1; + unsigned DTPS1 : 1; + }; + struct { + unsigned DTA0 : 1; + unsigned DTA1 : 1; + unsigned DTA2 : 1; + unsigned DTA3 : 1; + unsigned DTA4 : 1; + unsigned DTA5 : 1; + unsigned DTAPS0 : 1; + unsigned DTAPS1 : 1; + }; +} __DTCONbits_t; +extern volatile __DTCONbits_t __at (0xF6D) DTCONbits; + +extern __sfr __at (0xF6E) PWMCON1; +typedef union { + struct { + unsigned OSYNC : 1; + unsigned UDIS : 1; + unsigned : 1; + unsigned SEVTDIR : 1; + unsigned SEVOPS0 : 1; + unsigned SEVOPS1 : 1; + unsigned SEVOPS2 : 1; + unsigned SEVOPS3 : 1; + }; +} __PWMCON1bits_t; +extern volatile __PWMCON1bits_t __at (0xF6E) PWMCON1bits; + +extern __sfr __at (0xF6F) PWMCON0; +typedef union { + struct { + unsigned PMOD0 : 1; + unsigned PMOD1 : 1; + unsigned PMOD2 : 1; + unsigned PMOD3 : 1; + unsigned PWMEN0 : 1; + unsigned PWMEN1 : 1; + unsigned PWMEN2 : 1; + unsigned : 1; + }; +} __PWMCON0bits_t; +extern volatile __PWMCON0bits_t __at (0xF6F) PWMCON0bits; + +extern __sfr __at (0xF70) SEVTCMPH; + +extern __sfr __at (0xF71) SEVTCMPL; + +extern __sfr __at (0xF72) PDC3H; + +extern __sfr __at (0xF73) PDC3L; + +extern __sfr __at (0xF74) PDC2H; + +extern __sfr __at (0xF75) PDC2L; + +extern __sfr __at (0xF76) PDC1H; + +extern __sfr __at (0xF77) PDC1L; + +extern __sfr __at (0xF78) PDC0H; + +extern __sfr __at (0xF79) PDC0L; + +extern __sfr __at (0xF7A) PTPERH; + +extern __sfr __at (0xF7B) PTPERL; + +extern __sfr __at (0xF7C) PTMRH; + +extern __sfr __at (0xF7D) PTMRL; + +extern __sfr __at (0xF7E) PTCON1; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PTDIR : 1; + unsigned PTEN : 1; + }; +} __PTCON1bits_t; +extern volatile __PTCON1bits_t __at (0xF7E) PTCON1bits; + +extern __sfr __at (0xF7F) PTCON0; +typedef union { + struct { + unsigned PTMOD0 : 1; + unsigned PTMOD1 : 1; + unsigned PTCKPS0 : 1; + unsigned PTCKPS1 : 1; + unsigned PTOPS0 : 1; + unsigned PTOPS1 : 1; + unsigned PTOPS2 : 1; + unsigned PTOPS3 : 1; + }; +} __PTCON0bits_t; +extern volatile __PTCON0bits_t __at (0xF7F) PTCON0bits; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned AN4 : 1; + unsigned AN5 : 1; + unsigned OSC2 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned LVDIN : 1; + unsigned CLKO : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned CCP2 : 1; + unsigned NOT_FLTB : 1; + unsigned T0CKI : 1; + unsigned SDA : 1; + unsigned SCK : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned : 1; + unsigned NOT_FLTA : 1; + unsigned FLTB : 1; + unsigned T5CKI : 1; + unsigned SDI : 1; + unsigned SCL : 1; + unsigned NOT_SS : 1; + unsigned SDO : 1; + }; + struct { + unsigned : 1; + unsigned FLTA : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SS : 1; + unsigned : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned RE4 : 1; + unsigned RE5 : 1; + unsigned RE6 : 1; + unsigned RE7 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_MCLR : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned MCLR : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF87) TMR5L; + +extern __sfr __at (0xF88) TMR5H; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned LATE3 : 1; + unsigned LATE4 : 1; + unsigned LATE5 : 1; + unsigned LATE6 : 1; + unsigned LATE7 : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF90) PR5L; + +extern __sfr __at (0xF91) PR5H; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned RE4 : 1; + unsigned RE5 : 1; + unsigned RE6 : 1; + unsigned RE7 : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned TRISE3 : 1; + unsigned TRISE4 : 1; + unsigned TRISE5 : 1; + unsigned TRISE6 : 1; + unsigned TRISE7 : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF99) ADCHS; +typedef union { + struct { + unsigned GASEL0 : 1; + unsigned GASEL1 : 1; + unsigned GCSEL0 : 1; + unsigned GCSEL1 : 1; + unsigned GBSEL0 : 1; + unsigned GBSEL1 : 1; + unsigned GDSEL0 : 1; + unsigned GDSEL1 : 1; + }; + struct { + unsigned SASEL0 : 1; + unsigned SASEL1 : 1; + unsigned SCSEL0 : 1; + unsigned SCSEL1 : 1; + unsigned SBSEL0 : 1; + unsigned SBSEL1 : 1; + unsigned SDSEL0 : 1; + unsigned SDSEL1 : 1; + }; +} __ADCHSbits_t; +extern volatile __ADCHSbits_t __at (0xF99) ADCHSbits; + +extern __sfr __at (0xF9A) ADCON3; +typedef union { + struct { + unsigned SSRC0 : 1; + unsigned SSRC1 : 1; + unsigned SSRC2 : 1; + unsigned SSRC3 : 1; + unsigned SSRC4 : 1; + unsigned : 1; + unsigned ADRS0 : 1; + unsigned ADRS1 : 1; + }; +} __ADCON3bits_t; +extern volatile __ADCON3bits_t __at (0xF9A) ADCON3bits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned TUN5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TBIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TBIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TBIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned : 1; + unsigned LVDIE : 1; + unsigned : 1; + unsigned EEIE : 1; + unsigned : 1; + unsigned : 1; + unsigned OSFIE : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned : 1; + unsigned LVDIF : 1; + unsigned : 1; + unsigned EEIF : 1; + unsigned : 1; + unsigned : 1; + unsigned OSFIF : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned : 1; + unsigned LVDIP : 1; + unsigned : 1; + unsigned EEIP : 1; + unsigned : 1; + unsigned : 1; + unsigned OSFIP : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned TMR5IE : 1; + unsigned IC1IE : 1; + unsigned IC2QEIE : 1; + unsigned IC3DRIE : 1; + unsigned PTIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned TMR5IF : 1; + unsigned IC1IF : 1; + unsigned IC2QEIF : 1; + unsigned IC3DRIF : 1; + unsigned PTIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned TMR5IP : 1; + unsigned IC1IP : 1; + unsigned IC2QEIP : 1; + unsigned IC3DRIP : 1; + unsigned PTIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAA) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFAA) BAUDCONbits; + +extern __sfr __at (0xFAA) BAUDCTL; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCTLbits_t; +extern volatile __BAUDCTLbits_t __at (0xFAA) BAUDCTLbits; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB6) QEICON; +typedef union { + struct { + unsigned PDEC0 : 1; + unsigned PDEC1 : 1; + unsigned QEIM0 : 1; + unsigned QEIM1 : 1; + unsigned QEIM2 : 1; + unsigned UP_DOWN : 1; + unsigned ERROR : 1; + unsigned VELM : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned UP : 1; + unsigned : 1; + unsigned NOT_VELM : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DOWN : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_DOWN : 1; + unsigned : 1; + unsigned : 1; + }; +} __QEICONbits_t; +extern volatile __QEICONbits_t __at (0xFB6) QEICONbits; + +extern __sfr __at (0xFB7) T5CON; +typedef union { + struct { + unsigned TMR5ON : 1; + unsigned TMR5CS : 1; + unsigned T5SYNC : 1; + unsigned T5PS0 : 1; + unsigned T5PS1 : 1; + unsigned T5MOD : 1; + unsigned RESEN : 1; + unsigned T5SEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T5SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RESEN : 1; + unsigned : 1; + }; +} __T5CONbits_t; +extern volatile __T5CONbits_t __at (0xFB7) T5CONbits; + +extern __sfr __at (0xFB8) ANSEL0; +typedef union { + struct { + unsigned ANS0 : 1; + unsigned ANS1 : 1; + unsigned ANS2 : 1; + unsigned ANS3 : 1; + unsigned ANS4 : 1; + unsigned ANS5 : 1; + unsigned ANS6 : 1; + unsigned ANS7 : 1; + }; +} __ANSEL0bits_t; +extern volatile __ANSEL0bits_t __at (0xFB8) ANSEL0bits; + +extern __sfr __at (0xFB9) ANSEL1; +typedef union { + struct { + unsigned ANS8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ANSEL1bits_t; +extern volatile __ANSEL1bits_t __at (0xFB9) ANSEL1bits; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned ACQT3 : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned ADPNT0 : 1; + unsigned ADPNT1 : 1; + unsigned BFOVFL : 1; + unsigned BFEMT : 1; + unsigned FIFOEN : 1; + unsigned : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned FFOVFL : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO_DONE : 1; + unsigned ACMOD0 : 1; + unsigned ACMOD1 : 1; + unsigned ACSCH : 1; + unsigned ACONV : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC6) SSPCON; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCONbits_t; +extern volatile __SSPCONbits_t __at (0xFC6) SSPCONbits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned IPEN : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned WDT0 : 1; + unsigned WDT1 : 1; + unsigned WDT2 : 1; + unsigned WDT3 : 1; + unsigned WDT4 : 1; + unsigned WDT5 : 1; + unsigned WDT6 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned WDTW : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned FLTS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned IOFS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T016BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T0PS3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f43k20.h b/device/include/pic16/pic18f43k20.h new file mode 100644 index 0000000..006f241 --- /dev/null +++ b/device/include/pic16/pic18f43k20.h @@ -0,0 +1,6 @@ +/* + * pic18f43k20.h - device specific declarations + */ + +#include "pic18f46k20.h" + diff --git a/device/include/pic16/pic18f4410.h b/device/include/pic16/pic18f4410.h new file mode 100644 index 0000000..6147775 --- /dev/null +++ b/device/include/pic16/pic18f4410.h @@ -0,0 +1,6 @@ +/* + * pic18f4410.h - device specific declarations + */ + +#include "pic18f4610.h" + diff --git a/device/include/pic16/pic18f442.h b/device/include/pic16/pic18f442.h new file mode 100644 index 0000000..71ba50c --- /dev/null +++ b/device/include/pic16/pic18f442.h @@ -0,0 +1,1056 @@ + +/* + * pic18f442.h - PIC18F442 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f442.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F442_H__ +#define __PIC18F442_H__ + +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned :1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned INT3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf83) PORTD; +typedef union { + struct { + unsigned RD0:1; + unsigned RD1:1; + unsigned RD2:1; + unsigned RD3:1; + unsigned RD4:1; + unsigned RD5:1; + unsigned RD6:1; + unsigned RD7:1; + }; + + struct { + unsigned AD0:1; + unsigned AD1:1; + unsigned AD2:1; + unsigned AD3:1; + unsigned AD4:1; + unsigned AD5:1; + unsigned AD6:1; + unsigned AD7:1; + }; +} __PORTDbits_t; + +extern volatile __PORTDbits_t __at (0xf83) PORTDbits; + +extern __sfr __at (0xf84) PORTE; +typedef union { + struct { + unsigned RE0:1; + unsigned RE1:1; + unsigned RE2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned ALE:1; + unsigned OE:1; + unsigned WRL:1; + unsigned WRH:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned CCP2:1; + }; + + struct { + unsigned AN5:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTEbits_t; + +extern volatile __PORTEbits_t __at (0xf84) PORTEbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf8c) LATD; +typedef union { + struct { + unsigned LATD0:1; + unsigned LATD1:1; + unsigned LATD2:1; + unsigned LATD3:1; + unsigned LATD4:1; + unsigned LATD5:1; + unsigned LATD6:1; + unsigned LATD7:1; + }; +} __LATDbits_t; + +extern volatile __LATDbits_t __at (0xf8c) LATDbits; + +extern __sfr __at (0xf8d) LATE; +typedef union { + struct { + unsigned LATE0:1; + unsigned LATE1:1; + unsigned LATE2:1; + unsigned LATE3:1; + unsigned LATE4:1; + unsigned LATE5:1; + unsigned LATE6:1; + unsigned LATE7:1; + }; +} __LATEbits_t; + +extern volatile __LATEbits_t __at (0xf8d) LATEbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf95) TRISD; +typedef union { + struct { + unsigned TRISD0:1; + unsigned TRISD1:1; + unsigned TRISD2:1; + unsigned TRISD3:1; + unsigned TRISD4:1; + unsigned TRISD5:1; + unsigned TRISD6:1; + unsigned TRISD7:1; + }; +} __TRISDbits_t; + +extern volatile __TRISDbits_t __at (0xf95) TRISDbits; + +extern __sfr __at (0xf96) TRISE; +typedef union { + struct { + unsigned TRISE0:1; + unsigned TRISE1:1; + unsigned TRISE2:1; + unsigned :1; + unsigned PSPMODE:1; + unsigned IBOV:1; + unsigned OBF:1; + unsigned IBF:1; + }; +} __TRISEbits_t; + +extern volatile __TRISEbits_t __at (0xf96) TRISEbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfab) RCSTA; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTAbits_t; + +extern volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +extern __sfr __at (0xfac) TXSTA; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTAbits_t; + +extern volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfba) CCP2CON; +typedef union { + struct { + unsigned CCP2M0:1; + unsigned CCP2M1:1; + unsigned CCP2M2:1; + unsigned CCP2M3:1; + unsigned DCCP2Y:1; + unsigned DCCP2X:1; + unsigned :1; + unsigned :1; + }; +} __CCP2CONbits_t; + +extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +extern __sfr __at (0xfbb) CCPR2L; +extern __sfr __at (0xfbc) CCPR2H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DCCP1Y:1; + unsigned DCCP1X:1; + unsigned :1; + unsigned :1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned :1; + unsigned :1; + unsigned ADCS2:1; + unsigned ADFM:1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned :1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned ADCS0:1; + unsigned ADCS1:1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +typedef union { + struct { + unsigned T0PS0:1; + unsigned T0PS1:1; + unsigned T0PS2:1; + unsigned PSA:1; + unsigned T0SE:1; + unsigned T0CS:1; + unsigned T08BIT:1; + unsigned TMR0ON:1; + }; +} __T0CONbits_t; + +extern volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned INT2F:1; + unsigned :1; + unsigned INT1E:1; + unsigned INT2E:1; + unsigned :1; + unsigned INT1P:1; + unsigned INT2P:1; + }; + + struct { + unsigned INT1IF:1; + unsigned INT2IF:1; + unsigned :1; + unsigned INT1IE:1; + unsigned INT2IE:1; + unsigned :1; + unsigned INT1IP:1; + unsigned INT2IP:1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned :1; + unsigned T0IP:1; + unsigned :1; + unsigned INTEDG2:1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */ +#define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */ +#define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */ +#define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */ +#define _OSC_RC_1H 0xFB /* RC */ +#define _OSC_HS_1H 0xFA /* HS */ +#define _OSC_XT_1H 0xF9 /* XT */ +#define _OSC_LP_1H 0xF8 /* LP */ + +/* Osc. Switch Enable 1H options */ +#define _OSCS_OFF_1H 0xFF /* Disabled */ +#define _OSCS_ON_1H 0xDF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_0V_2L 0xFF /* 2.0V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_OFF_2H 0xFE /* Disabled */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_128_2H 0xFF /* 1:128 */ +#define _WDTPS_1_64_2H 0xFD /* 1:64 */ +#define _WDTPS_1_32_2H 0xFB /* 1:32 */ +#define _WDTPS_1_16_2H 0xF9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xF7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xF5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xF3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xF1 /* 1:1 */ + +/* CCP2 Mux 3H options */ +#define _CCP2MUX_RC1_3H 0xFF /* RC1 */ +#define _CCP2MUX_RB3_3H 0xFE /* RB3 */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Code Protect 00200-01FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 02000-03FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00200-01FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 02000-03FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00200-01FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 02000-03FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f4420.h b/device/include/pic16/pic18f4420.h new file mode 100644 index 0000000..a482405 --- /dev/null +++ b/device/include/pic16/pic18f4420.h @@ -0,0 +1,6 @@ +/* + * pic18f2420.h - PIC18F2420 Device Library Header + */ + +#include "pic18f4520.h" + diff --git a/device/include/pic16/pic18f4423.h b/device/include/pic16/pic18f4423.h new file mode 100644 index 0000000..7cee654 --- /dev/null +++ b/device/include/pic16/pic18f4423.h @@ -0,0 +1,6 @@ +/* + * pic18f4423.h - Device Library Header + */ + +#include "pic18f4523.h" + diff --git a/device/include/pic16/pic18f4431.h b/device/include/pic16/pic18f4431.h new file mode 100644 index 0000000..d759f53 --- /dev/null +++ b/device/include/pic16/pic18f4431.h @@ -0,0 +1,6 @@ +/* + * pic18f4431.h - device specific declarations + */ + +#include "pic18f4331.h" + diff --git a/device/include/pic16/pic18f4450.h b/device/include/pic16/pic18f4450.h new file mode 100644 index 0000000..bd60854 --- /dev/null +++ b/device/include/pic16/pic18f4450.h @@ -0,0 +1,1637 @@ +/* + * pic18f4450.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F4450_H__ +#define __PIC18F4450_H__ 1 + + + +// Configuration Bits +#define __CONFIG1L 0x300000 +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1L Options +#define _PLLDIV_1_1L 0xF8 // No divide (4 MHz input) +#define _PLLDIV_2_1L 0xF9 // Divide by 2 (8 MHz input) +#define _PLLDIV_3_1L 0xFA // Divide by 3 (12 MHz input) +#define _PLLDIV_4_1L 0xFB // Divide by 4 (16 MHz input) +#define _PLLDIV_5_1L 0xFC // Divide by 5 (20 MHz input) +#define _PLLDIV_6_1L 0xFD // Divide by 6 (24 MHz input) +#define _PLLDIV_10_1L 0xFE // Divide by 10 (40 MHz input) +#define _PLLDIV_12_1L 0xFF // Divide by 12 (48 MHz input) +#define _CPUDIV_OSC1_PLL2_1L 0xE7 // [OSC1/OSC2 Src: /1][96 MHz PLL Src: /2] +#define _CPUDIV_OSC2_PLL3_1L 0xEF // [OSC1/OSC2 Src: /2][96 MHz PLL Src: /3] +#define _CPUDIV_OSC3_PLL4_1L 0xF7 // [OSC1/OSC2 Src: /3][96 MHz PLL Src: /4] +#define _CPUDIV_OSC4_PLL6_1L 0xFF // [OSC1/OSC2 Src: /4][96 MHz PLL Src: /6] +#define _USBDIV_1_1L 0xDF // Clock source from OSC1/OSC2 +#define _USBDIV_2_1L 0xFF // Clock source from 96 MHz PLL/2 + +// CONFIG1H Options +#define _FOSC_XT_XT_1H 0xF0 // XT oscillator, XT used by USB +#define _FOSC_XTPLL_XT_1H 0xF2 // XT oscillator, PLL enabled, XT used by USB +#define _FOSC_ECIO_EC_1H 0xF4 // External clock, port function on RA6, EC used by USB +#define _FOSC_EC_EC_1H 0xF5 // External clock, CLKOUT on RA6, EC used by USB +#define _FOSC_ECPLLIO_EC_1H 0xF6 // External clock, PLL enabled, port function on RA6, EC used by USB +#define _FOSC_ECPLL_EC_1H 0xF7 // External clock, PLL enabled, CLKOUT on RA6, EC used by USB +#define _FOSC_INTOSCIO_EC_1H 0xF8 // Internal oscillator, port function on RA6, EC used by USB +#define _FOSC_INTOSC_EC_1H 0xF9 // Internal oscillator, CLKOUT on RA6, EC used by USB +#define _FOSC_INTOSC_XT_1H 0xFA // Internal oscillator, XT used by USB +#define _FOSC_INTOSC_HS_1H 0xFB // Internal oscillator, HS used by USB +#define _FOSC_HS_1H 0xFC // HS oscillator, HS used by USB +#define _FOSC_HSPLL_HS_1H 0xFE // HS oscillator, PLL enabled, HS used by USB +#define _FCMEM_OFF_1H 0xBF // Disabled +#define _FCMEM_ON_1H 0xFF // Enabled +#define _IESO_OFF_1H 0x7F // Disabled +#define _IESO_ON_1H 0xFF // Enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // Enabled +#define _PWRT_OFF_2L 0xFF // Disabled +#define _BOR_OFF_2L 0xF9 // Disabled +#define _BOR_SOFT_2L 0xFB // Controlled by SBOREN +#define _BOR_ON_ACTIVE_2L 0xFD // Enabled when the device is not in Sleep, SBOREN bit is disabled +#define _BOR_ON_2L 0xFF // Enabled, SBOREN bit is disabled +#define _BORV_46_2L 0xE7 // 4.6V +#define _BORV_43_2L 0xEF // 4.3V +#define _BORV_28_2L 0xF7 // 2.8V +#define _BORV_21_2L 0xFF // 2.1V +#define _VREGEN_OFF_2L 0xDF // Disabled +#define _VREGEN_ON_2L 0xFF // Enabled + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // HW Disabled - SW Controlled +#define _WDT_ON_2H 0xFF // HW Enabled - SW Disabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // Disabled +#define _MCLRE_ON_3H 0xFF // Enabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 oscillator configured for high power +#define _LPT1OSC_ON_3H 0xFF // Timer1 oscillator configured for low power +#define _PBADEN_OFF_3H 0xFD // PORTB<4:0> pins are configured as digital I/O on Reset +#define _PBADEN_ON_3H 0xFF // PORTB<4:0> pins are configured as analog input on Reset + +// CONFIG4L Options +#define _STVREN_OFF_4L 0xFE // Disabled +#define _STVREN_ON_4L 0xFF // Enabled +#define _LVP_OFF_4L 0xFB // Disabled +#define _LVP_ON_4L 0xFF // Enabled +#define _BBSIZ_BB2K_4L 0xF7 // 2KW Boot Block Size +#define _BBSIZ_BB1K_4L 0xFF // 1KW Boot Block Size +#define _ICPRT_OFF_4L 0xDF // Disabled +#define _ICPRT_ON_4L 0xFF // Enabled +#define _XINST_OFF_4L 0xBF // Disabled +#define _XINST_ON_4L 0xFF // Enabled +#define _DEBUG_ON_4L 0x7F // Enabled +#define _DEBUG_OFF_4L 0xFF // Disabled + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Enabled +#define _CP0_OFF_5L 0xFF // Disabled +#define _CP1_ON_5L 0xFD // Enabled +#define _CP1_OFF_5L 0xFF // Disabled + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Enabled +#define _CPB_OFF_5H 0xFF // Disabled + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Enabled +#define _WRT0_OFF_6L 0xFF // Disabled +#define _WRT1_ON_6L 0xFD // Enabled +#define _WRT1_OFF_6L 0xFF // Disabled + +// CONFIG6H Options +#define _WRTB_ON_6H 0xBF // Enabled +#define _WRTB_OFF_6H 0xFF // Disabled +#define _WRTC_ON_6H 0xDF // Enabled +#define _WRTC_OFF_6H 0xFF // Disabled + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Enabled +#define _EBTR0_OFF_7L 0xFF // Disabled +#define _EBTR1_ON_7L 0xFD // Enabled +#define _EBTR1_OFF_7L 0xFF // Disabled + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Enabled +#define _EBTRB_OFF_7H 0xFF // Disabled +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xF66) UFRM; + +extern __sfr __at (0xF66) UFRML; + +extern __sfr __at (0xF67) UFRMH; + +extern __sfr __at (0xF68) UIR; +typedef union { + struct { + unsigned URSTIF : 1; + unsigned UERRIF : 1; + unsigned ACTVIF : 1; + unsigned TRNIF : 1; + unsigned IDLEIF : 1; + unsigned STALLIF : 1; + unsigned SOFIF : 1; + unsigned : 1; + }; +} __UIRbits_t; +extern volatile __UIRbits_t __at (0xF68) UIRbits; + +extern __sfr __at (0xF69) UIE; +typedef union { + struct { + unsigned URSTIE : 1; + unsigned UERRIE : 1; + unsigned ACTVIE : 1; + unsigned TRNIE : 1; + unsigned IDLEIE : 1; + unsigned STALLIE : 1; + unsigned SOFIE : 1; + unsigned : 1; + }; +} __UIEbits_t; +extern volatile __UIEbits_t __at (0xF69) UIEbits; + +extern __sfr __at (0xF6A) UEIR; +typedef union { + struct { + unsigned PIDEF : 1; + unsigned CRC5EF : 1; + unsigned CRC16EF : 1; + unsigned DFN8EF : 1; + unsigned BTOEF : 1; + unsigned : 1; + unsigned : 1; + unsigned BTSEF : 1; + }; +} __UEIRbits_t; +extern volatile __UEIRbits_t __at (0xF6A) UEIRbits; + +extern __sfr __at (0xF6B) UEIE; +typedef union { + struct { + unsigned PIDEE : 1; + unsigned CRC5EE : 1; + unsigned CRC16EE : 1; + unsigned DFN8EE : 1; + unsigned BTOEE : 1; + unsigned : 1; + unsigned : 1; + unsigned BTSEE : 1; + }; +} __UEIEbits_t; +extern volatile __UEIEbits_t __at (0xF6B) UEIEbits; + +extern __sfr __at (0xF6C) USTAT; +typedef union { + struct { + unsigned : 1; + unsigned PPBI : 1; + unsigned DIR : 1; + unsigned ENDP0 : 1; + unsigned ENDP1 : 1; + unsigned ENDP2 : 1; + unsigned ENDP3 : 1; + unsigned : 1; + }; +} __USTATbits_t; +extern volatile __USTATbits_t __at (0xF6C) USTATbits; + +extern __sfr __at (0xF6D) UCON; +typedef union { + struct { + unsigned : 1; + unsigned SUSPND : 1; + unsigned RESUME : 1; + unsigned USBEN : 1; + unsigned PKTDIS : 1; + unsigned SE0 : 1; + unsigned PPBRST : 1; + unsigned : 1; + }; +} __UCONbits_t; +extern volatile __UCONbits_t __at (0xF6D) UCONbits; + +extern __sfr __at (0xF6E) UADDR; +typedef union { + struct { + unsigned ADDR0 : 1; + unsigned ADDR1 : 1; + unsigned ADDR2 : 1; + unsigned ADDR3 : 1; + unsigned ADDR4 : 1; + unsigned ADDR5 : 1; + unsigned ADDR6 : 1; + unsigned : 1; + }; +} __UADDRbits_t; +extern volatile __UADDRbits_t __at (0xF6E) UADDRbits; + +extern __sfr __at (0xF6F) UCFG; +typedef union { + struct { + unsigned PPB0 : 1; + unsigned PPB1 : 1; + unsigned FSEN : 1; + unsigned UTRDIS : 1; + unsigned UPUEN : 1; + unsigned : 1; + unsigned UOEMON : 1; + unsigned UTEYE : 1; + }; +} __UCFGbits_t; +extern volatile __UCFGbits_t __at (0xF6F) UCFGbits; + +extern __sfr __at (0xF70) UEP0; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP0bits_t; +extern volatile __UEP0bits_t __at (0xF70) UEP0bits; + +extern __sfr __at (0xF71) UEP1; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP1bits_t; +extern volatile __UEP1bits_t __at (0xF71) UEP1bits; + +extern __sfr __at (0xF72) UEP2; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP2bits_t; +extern volatile __UEP2bits_t __at (0xF72) UEP2bits; + +extern __sfr __at (0xF73) UEP3; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP3bits_t; +extern volatile __UEP3bits_t __at (0xF73) UEP3bits; + +extern __sfr __at (0xF74) UEP4; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP4bits_t; +extern volatile __UEP4bits_t __at (0xF74) UEP4bits; + +extern __sfr __at (0xF75) UEP5; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP5bits_t; +extern volatile __UEP5bits_t __at (0xF75) UEP5bits; + +extern __sfr __at (0xF76) UEP6; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP6bits_t; +extern volatile __UEP6bits_t __at (0xF76) UEP6bits; + +extern __sfr __at (0xF77) UEP7; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP7bits_t; +extern volatile __UEP7bits_t __at (0xF77) UEP7bits; + +extern __sfr __at (0xF78) UEP8; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP8bits_t; +extern volatile __UEP8bits_t __at (0xF78) UEP8bits; + +extern __sfr __at (0xF79) UEP9; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP9bits_t; +extern volatile __UEP9bits_t __at (0xF79) UEP9bits; + +extern __sfr __at (0xF7A) UEP10; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP10bits_t; +extern volatile __UEP10bits_t __at (0xF7A) UEP10bits; + +extern __sfr __at (0xF7B) UEP11; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP11bits_t; +extern volatile __UEP11bits_t __at (0xF7B) UEP11bits; + +extern __sfr __at (0xF7C) UEP12; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP12bits_t; +extern volatile __UEP12bits_t __at (0xF7C) UEP12bits; + +extern __sfr __at (0xF7D) UEP13; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP13bits_t; +extern volatile __UEP13bits_t __at (0xF7D) UEP13bits; + +extern __sfr __at (0xF7E) UEP14; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP14bits_t; +extern volatile __UEP14bits_t __at (0xF7E) UEP14bits; + +extern __sfr __at (0xF7F) UEP15; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP15bits_t; +extern volatile __UEP15bits_t __at (0xF7F) UEP15bits; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned RCV : 1; + unsigned LVDIN : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned AN9 : 1; + unsigned AN11 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned AN12 : 1; + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned VPO : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned VMO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T1CKI : 1; + unsigned NOT_UOE : 1; + unsigned P1A : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned : 1; + unsigned UOE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AN5 : 1; + unsigned AN6 : 1; + unsigned AN7 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned LVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned USBIE : 1; + unsigned : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned LVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned USBIF : 1; + unsigned : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned LVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned USBIP : 1; + unsigned : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO_DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned NOT_IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned IPEN : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned : 1; + unsigned OSTS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKOVF : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f4455.h b/device/include/pic16/pic18f4455.h new file mode 100644 index 0000000..81c3438 --- /dev/null +++ b/device/include/pic16/pic18f4455.h @@ -0,0 +1,6 @@ +/* + * pic18f4455.h - PIC18F4455 Device Library Header + */ + +#include "pic18f2455.h" + diff --git a/device/include/pic16/pic18f448.h b/device/include/pic16/pic18f448.h new file mode 100644 index 0000000..3d4e279 --- /dev/null +++ b/device/include/pic16/pic18f448.h @@ -0,0 +1,2899 @@ + +/* + * pic18f448.h - PIC18F448 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f448.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F448_H__ +#define __PIC18F448_H__ + +extern __sfr __at (0xf00) RXF0SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF0SIDHbits_t; + +extern volatile __RXF0SIDHbits_t __at (0xf00) RXF0SIDHbits; + +extern __sfr __at (0xf01) RXF0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF0SIDLbits_t; + +extern volatile __RXF0SIDLbits_t __at (0xf01) RXF0SIDLbits; + +extern __sfr __at (0xf02) RXF0EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF0EIDHbits_t; + +extern volatile __RXF0EIDHbits_t __at (0xf02) RXF0EIDHbits; + +extern __sfr __at (0xf03) RXF0EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF0EIDLbits_t; + +extern volatile __RXF0EIDLbits_t __at (0xf03) RXF0EIDLbits; + +extern __sfr __at (0xf04) RXF1SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF1SIDHbits_t; + +extern volatile __RXF1SIDHbits_t __at (0xf04) RXF1SIDHbits; + +extern __sfr __at (0xf05) RXF1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF1SIDLbits_t; + +extern volatile __RXF1SIDLbits_t __at (0xf05) RXF1SIDLbits; + +extern __sfr __at (0xf06) RXF1EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF1EIDHbits_t; + +extern volatile __RXF1EIDHbits_t __at (0xf06) RXF1EIDHbits; + +extern __sfr __at (0xf07) RXF1EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF1EIDLbits_t; + +extern volatile __RXF1EIDLbits_t __at (0xf07) RXF1EIDLbits; + +extern __sfr __at (0xf08) RXF2SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF2SIDHbits_t; + +extern volatile __RXF2SIDHbits_t __at (0xf08) RXF2SIDHbits; + +extern __sfr __at (0xf09) RXF2SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF2SIDLbits_t; + +extern volatile __RXF2SIDLbits_t __at (0xf09) RXF2SIDLbits; + +extern __sfr __at (0xf0a) RXF2EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF2EIDHbits_t; + +extern volatile __RXF2EIDHbits_t __at (0xf0a) RXF2EIDHbits; + +extern __sfr __at (0xf0b) RXF2EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF2EIDLbits_t; + +extern volatile __RXF2EIDLbits_t __at (0xf0b) RXF2EIDLbits; + +extern __sfr __at (0xf0c) RXF3SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF3SIDHbits_t; + +extern volatile __RXF3SIDHbits_t __at (0xf0c) RXF3SIDHbits; + +extern __sfr __at (0xf0d) RXF3SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF3SIDLbits_t; + +extern volatile __RXF3SIDLbits_t __at (0xf0d) RXF3SIDLbits; + +extern __sfr __at (0xf0e) RXF3EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF3EIDHbits_t; + +extern volatile __RXF3EIDHbits_t __at (0xf0e) RXF3EIDHbits; + +extern __sfr __at (0xf0f) RXF3EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF3EIDLbits_t; + +extern volatile __RXF3EIDLbits_t __at (0xf0f) RXF3EIDLbits; + +extern __sfr __at (0xf10) RXF4SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF4SIDHbits_t; + +extern volatile __RXF4SIDHbits_t __at (0xf10) RXF4SIDHbits; + +extern __sfr __at (0xf11) RXF4SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF4SIDLbits_t; + +extern volatile __RXF4SIDLbits_t __at (0xf11) RXF4SIDLbits; + +extern __sfr __at (0xf12) RXF4EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF4EIDHbits_t; + +extern volatile __RXF4EIDHbits_t __at (0xf12) RXF4EIDHbits; + +extern __sfr __at (0xf13) RXF4EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF4EIDLbits_t; + +extern volatile __RXF4EIDLbits_t __at (0xf13) RXF4EIDLbits; + +extern __sfr __at (0xf14) RXF5SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF5SIDHbits_t; + +extern volatile __RXF5SIDHbits_t __at (0xf14) RXF5SIDHbits; + +extern __sfr __at (0xf15) RXF5SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF5SIDLbits_t; + +extern volatile __RXF5SIDLbits_t __at (0xf15) RXF5SIDLbits; + +extern __sfr __at (0xf16) RXF5EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF5EIDHbits_t; + +extern volatile __RXF5EIDHbits_t __at (0xf16) RXF5EIDHbits; + +extern __sfr __at (0xf17) RXF5EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF5EIDLbits_t; + +extern volatile __RXF5EIDLbits_t __at (0xf17) RXF5EIDLbits; + +extern __sfr __at (0xf18) RXM0SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXM0SIDHbits_t; + +extern volatile __RXM0SIDHbits_t __at (0xf18) RXM0SIDHbits; + +extern __sfr __at (0xf19) RXM0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXM0SIDLbits_t; + +extern volatile __RXM0SIDLbits_t __at (0xf19) RXM0SIDLbits; + +extern __sfr __at (0xf1a) RXM0EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXM0EIDHbits_t; + +extern volatile __RXM0EIDHbits_t __at (0xf1a) RXM0EIDHbits; + +extern __sfr __at (0xf1b) RXM0EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXM0EIDLbits_t; + +extern volatile __RXM0EIDLbits_t __at (0xf1b) RXM0EIDLbits; + +extern __sfr __at (0xf1c) RXM1SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXM1SIDHbits_t; + +extern volatile __RXM1SIDHbits_t __at (0xf1c) RXM1SIDHbits; + +extern __sfr __at (0xf1d) RXM1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDEN:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXM1SIDLbits_t; + +extern volatile __RXM1SIDLbits_t __at (0xf1d) RXM1SIDLbits; + +extern __sfr __at (0xf1e) RXM1EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXM1EIDHbits_t; + +extern volatile __RXM1EIDHbits_t __at (0xf1e) RXM1EIDHbits; + +extern __sfr __at (0xf1f) RXM1EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXM1EIDLbits_t; + +extern volatile __RXM1EIDLbits_t __at (0xf1f) RXM1EIDLbits; + +extern __sfr __at (0xf20) TXB2CON; +typedef union { + struct { + unsigned TXPRI0:1; + unsigned TXPRI1:1; + unsigned :1; + unsigned TXREQ:1; + unsigned TXERR:1; + unsigned TXLARB:1; + unsigned TXABT:1; + unsigned :1; + }; +} __TXB2CONbits_t; + +extern volatile __TXB2CONbits_t __at (0xf20) TXB2CONbits; + +extern __sfr __at (0xf21) TXB2SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __TXB2SIDHbits_t; + +extern volatile __TXB2SIDHbits_t __at (0xf21) TXB2SIDHbits; + +extern __sfr __at (0xf22) TXB2SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDEN:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __TXB2SIDLbits_t; + +extern volatile __TXB2SIDLbits_t __at (0xf22) TXB2SIDLbits; + +extern __sfr __at (0xf23) TXB2EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __TXB2EIDHbits_t; + +extern volatile __TXB2EIDHbits_t __at (0xf23) TXB2EIDHbits; + +extern __sfr __at (0xf24) TXB2EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __TXB2EIDLbits_t; + +extern volatile __TXB2EIDLbits_t __at (0xf24) TXB2EIDLbits; + +extern __sfr __at (0xf25) TXB2DLC; +typedef union { + struct { + unsigned TXB2DLC0:1; + unsigned TXB2DLC1:1; + unsigned TXB2DLC2:1; + unsigned TXB2DLC3:1; + unsigned :1; + unsigned :1; + unsigned TXB2TXRTR:1; + unsigned :1; + }; +} __TXB2DLCbits_t; + +extern volatile __TXB2DLCbits_t __at (0xf25) TXB2DLCbits; + +extern __sfr __at (0xf26) TXB2D0; +typedef union { + struct { + unsigned TXB2D00:1; + unsigned TXB2D01:1; + unsigned TXB2D02:1; + unsigned TXB2D03:1; + unsigned TXB2D04:1; + unsigned TXB2D05:1; + unsigned TXB2D06:1; + unsigned TXB2D07:1; + }; +} __TXB2D0bits_t; + +extern volatile __TXB2D0bits_t __at (0xf26) TXB2D0bits; + +extern __sfr __at (0xf27) TXB2D1; +typedef union { + struct { + unsigned TXB2D10:1; + unsigned TXB2D11:1; + unsigned TXB2D12:1; + unsigned TXB2D13:1; + unsigned TXB2D14:1; + unsigned TXB2D15:1; + unsigned TXB2D16:1; + unsigned TXB2D17:1; + }; +} __TXB2D1bits_t; + +extern volatile __TXB2D1bits_t __at (0xf27) TXB2D1bits; + +extern __sfr __at (0xf28) TXB2D2; +typedef union { + struct { + unsigned TXB2D20:1; + unsigned TXB2D21:1; + unsigned TXB2D22:1; + unsigned TXB2D23:1; + unsigned TXB2D24:1; + unsigned TXB2D25:1; + unsigned TXB2D26:1; + unsigned TXB2D27:1; + }; +} __TXB2D2bits_t; + +extern volatile __TXB2D2bits_t __at (0xf28) TXB2D2bits; + +extern __sfr __at (0xf29) TXB2D3; +typedef union { + struct { + unsigned TXB2D30:1; + unsigned TXB2D31:1; + unsigned TXB2D32:1; + unsigned TXB2D33:1; + unsigned TXB2D34:1; + unsigned TXB2D35:1; + unsigned TXB2D36:1; + unsigned TXB2D37:1; + }; +} __TXB2D3bits_t; + +extern volatile __TXB2D3bits_t __at (0xf29) TXB2D3bits; + +extern __sfr __at (0xf2a) TXB2D4; +typedef union { + struct { + unsigned TXB2D40:1; + unsigned TXB2D41:1; + unsigned TXB2D42:1; + unsigned TXB2D43:1; + unsigned TXB2D44:1; + unsigned TXB2D45:1; + unsigned TXB2D46:1; + unsigned TXB2D47:1; + }; +} __TXB2D4bits_t; + +extern volatile __TXB2D4bits_t __at (0xf2a) TXB2D4bits; + +extern __sfr __at (0xf2b) TXB2D5; +typedef union { + struct { + unsigned TXB2D50:1; + unsigned TXB2D51:1; + unsigned TXB2D52:1; + unsigned TXB2D53:1; + unsigned TXB2D54:1; + unsigned TXB2D55:1; + unsigned TXB2D56:1; + unsigned TXB2D57:1; + }; +} __TXB2D5bits_t; + +extern volatile __TXB2D5bits_t __at (0xf2b) TXB2D5bits; + +extern __sfr __at (0xf2c) TXB2D6; +typedef union { + struct { + unsigned TXB2D60:1; + unsigned TXB2D61:1; + unsigned TXB2D62:1; + unsigned TXB2D63:1; + unsigned TXB2D64:1; + unsigned TXB2D65:1; + unsigned TXB2D66:1; + unsigned TXB2D67:1; + }; +} __TXB2D6bits_t; + +extern volatile __TXB2D6bits_t __at (0xf2c) TXB2D6bits; + +extern __sfr __at (0xf2d) TXB2D7; +typedef union { + struct { + unsigned TXB2D70:1; + unsigned TXB2D71:1; + unsigned TXB2D72:1; + unsigned TXB2D73:1; + unsigned TXB2D74:1; + unsigned TXB2D75:1; + unsigned TXB2D76:1; + unsigned TXB2D77:1; + }; +} __TXB2D7bits_t; + +extern volatile __TXB2D7bits_t __at (0xf2d) TXB2D7bits; + +extern __sfr __at (0xf2e) CANSTATRO4; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATRO4bits_t; + +extern volatile __CANSTATRO4bits_t __at (0xf2e) CANSTATRO4bits; + +extern __sfr __at (0xf30) TXB1CON; +typedef union { + struct { + unsigned TXPRI0:1; + unsigned TXPRI1:1; + unsigned :1; + unsigned TXREQ:1; + unsigned TXERR:1; + unsigned TXLARB:1; + unsigned TXABT:1; + unsigned :1; + }; +} __TXB1CONbits_t; + +extern volatile __TXB1CONbits_t __at (0xf30) TXB1CONbits; + +extern __sfr __at (0xf31) TXB1SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __TXB1SIDHbits_t; + +extern volatile __TXB1SIDHbits_t __at (0xf31) TXB1SIDHbits; + +extern __sfr __at (0xf32) TXB1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __TXB1SIDLbits_t; + +extern volatile __TXB1SIDLbits_t __at (0xf32) TXB1SIDLbits; + +extern __sfr __at (0xf33) TXB1EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __TXB1EIDHbits_t; + +extern volatile __TXB1EIDHbits_t __at (0xf33) TXB1EIDHbits; + +extern __sfr __at (0xf34) TXB1EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __TXB1EIDLbits_t; + +extern volatile __TXB1EIDLbits_t __at (0xf34) TXB1EIDLbits; + +extern __sfr __at (0xf35) TXB1DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned :1; + unsigned :1; + unsigned TXRTR:1; + unsigned :1; + }; +} __TXB1DLCbits_t; + +extern volatile __TXB1DLCbits_t __at (0xf35) TXB1DLCbits; + +extern __sfr __at (0xf36) TXB1D0; +typedef union { + struct { + unsigned TXB1D00:1; + unsigned TXB1D01:1; + unsigned TXB1D02:1; + unsigned TXB1D03:1; + unsigned TXB1D04:1; + unsigned TXB1D05:1; + unsigned TXB1D06:1; + unsigned TXB1D07:1; + }; +} __TXB1D0bits_t; + +extern volatile __TXB1D0bits_t __at (0xf36) TXB1D0bits; + +extern __sfr __at (0xf37) TXB1D1; +typedef union { + struct { + unsigned TXB1D10:1; + unsigned TXB1D11:1; + unsigned TXB1D12:1; + unsigned TXB1D13:1; + unsigned TXB1D14:1; + unsigned TXB1D15:1; + unsigned TXB1D16:1; + unsigned TXB1D17:1; + }; +} __TXB1D1bits_t; + +extern volatile __TXB1D1bits_t __at (0xf37) TXB1D1bits; + +extern __sfr __at (0xf38) TXB1D2; +typedef union { + struct { + unsigned TXB1D20:1; + unsigned TXB1D21:1; + unsigned TXB1D22:1; + unsigned TXB1D23:1; + unsigned TXB1D24:1; + unsigned TXB1D25:1; + unsigned TXB1D26:1; + unsigned TXB1D27:1; + }; +} __TXB1D2bits_t; + +extern volatile __TXB1D2bits_t __at (0xf38) TXB1D2bits; + +extern __sfr __at (0xf39) TXB1D3; +typedef union { + struct { + unsigned TXB1D30:1; + unsigned TXB1D31:1; + unsigned TXB1D32:1; + unsigned TXB1D33:1; + unsigned TXB1D34:1; + unsigned TXB1D35:1; + unsigned TXB1D36:1; + unsigned TXB1D37:1; + }; +} __TXB1D3bits_t; + +extern volatile __TXB1D3bits_t __at (0xf39) TXB1D3bits; + +extern __sfr __at (0xf3a) TXB1D4; +typedef union { + struct { + unsigned TXB1D40:1; + unsigned TXB1D41:1; + unsigned TXB1D42:1; + unsigned TXB1D43:1; + unsigned TXB1D44:1; + unsigned TXB1D45:1; + unsigned TXB1D46:1; + unsigned TXB1D47:1; + }; +} __TXB1D4bits_t; + +extern volatile __TXB1D4bits_t __at (0xf3a) TXB1D4bits; + +extern __sfr __at (0xf3b) TXB1D5; +typedef union { + struct { + unsigned TXB1D50:1; + unsigned TXB1D51:1; + unsigned TXB1D52:1; + unsigned TXB1D53:1; + unsigned TXB1D54:1; + unsigned TXB1D55:1; + unsigned TXB1D56:1; + unsigned TXB1D57:1; + }; +} __TXB1D5bits_t; + +extern volatile __TXB1D5bits_t __at (0xf3b) TXB1D5bits; + +extern __sfr __at (0xf3c) TXB1D6; +typedef union { + struct { + unsigned TXB1D60:1; + unsigned TXB1D61:1; + unsigned TXB1D62:1; + unsigned TXB1D63:1; + unsigned TXB1D64:1; + unsigned TXB1D65:1; + unsigned TXB1D66:1; + unsigned TXB1D67:1; + }; +} __TXB1D6bits_t; + +extern volatile __TXB1D6bits_t __at (0xf3c) TXB1D6bits; + +extern __sfr __at (0xf3d) TXB1D7; +typedef union { + struct { + unsigned TXB1D70:1; + unsigned TXB1D71:1; + unsigned TXB1D72:1; + unsigned TXB1D73:1; + unsigned TXB1D74:1; + unsigned TXB1D75:1; + unsigned TXB1D76:1; + unsigned TXB1D77:1; + }; +} __TXB1D7bits_t; + +extern volatile __TXB1D7bits_t __at (0xf3d) TXB1D7bits; + +extern __sfr __at (0xf3e) CANSTATRO3; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATRO3bits_t; + +extern volatile __CANSTATRO3bits_t __at (0xf3e) CANSTATRO3bits; + +extern __sfr __at (0xf40) TXB0CON; +typedef union { + struct { + unsigned TXPRI0:1; + unsigned TXPRI1:1; + unsigned :1; + unsigned TXREQ:1; + unsigned TXERR:1; + unsigned TXLARB:1; + unsigned TXABT:1; + unsigned :1; + }; +} __TXB0CONbits_t; + +extern volatile __TXB0CONbits_t __at (0xf40) TXB0CONbits; + +extern __sfr __at (0xf41) TXB0SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __TXB0SIDHbits_t; + +extern volatile __TXB0SIDHbits_t __at (0xf41) TXB0SIDHbits; + +extern __sfr __at (0xf42) TXB0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __TXB0SIDLbits_t; + +extern volatile __TXB0SIDLbits_t __at (0xf42) TXB0SIDLbits; + +extern __sfr __at (0xf43) TXB0EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __TXB0EIDHbits_t; + +extern volatile __TXB0EIDHbits_t __at (0xf43) TXB0EIDHbits; + +extern __sfr __at (0xf44) TXB0EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __TXB0EIDLbits_t; + +extern volatile __TXB0EIDLbits_t __at (0xf44) TXB0EIDLbits; + +extern __sfr __at (0xf45) TXB0DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned :1; + unsigned :1; + unsigned TXRTR:1; + unsigned :1; + }; +} __TXB0DLCbits_t; + +extern volatile __TXB0DLCbits_t __at (0xf45) TXB0DLCbits; + +extern __sfr __at (0xf46) TXB0D0; +typedef union { + struct { + unsigned TXB0D00:1; + unsigned TXB0D01:1; + unsigned TXB0D02:1; + unsigned TXB0D03:1; + unsigned TXB0D04:1; + unsigned TXB0D05:1; + unsigned TXB0D06:1; + unsigned TXB0D07:1; + }; +} __TXB0D0bits_t; + +extern volatile __TXB0D0bits_t __at (0xf46) TXB0D0bits; + +extern __sfr __at (0xf47) TXB0D1; +typedef union { + struct { + unsigned TXB0D10:1; + unsigned TXB0D11:1; + unsigned TXB0D12:1; + unsigned TXB0D13:1; + unsigned TXB0D14:1; + unsigned TXB0D15:1; + unsigned TXB0D16:1; + unsigned TXB0D17:1; + }; +} __TXB0D1bits_t; + +extern volatile __TXB0D1bits_t __at (0xf47) TXB0D1bits; + +extern __sfr __at (0xf48) TXB0D2; +typedef union { + struct { + unsigned TXB0D20:1; + unsigned TXB0D21:1; + unsigned TXB0D22:1; + unsigned TXB0D23:1; + unsigned TXB0D24:1; + unsigned TXB0D25:1; + unsigned TXB0D26:1; + unsigned TXB0D27:1; + }; +} __TXB0D2bits_t; + +extern volatile __TXB0D2bits_t __at (0xf48) TXB0D2bits; + +extern __sfr __at (0xf49) TXB0D3; +typedef union { + struct { + unsigned TXB0D30:1; + unsigned TXB0D31:1; + unsigned TXB0D32:1; + unsigned TXB0D33:1; + unsigned TXB0D34:1; + unsigned TXBD035:1; + unsigned TXBD0D36:1; + unsigned TXB0D37:1; + }; +} __TXB0D3bits_t; + +extern volatile __TXB0D3bits_t __at (0xf49) TXB0D3bits; + +extern __sfr __at (0xf4a) TXB0D4; +typedef union { + struct { + unsigned TXB0D40:1; + unsigned TXB0D41:1; + unsigned TXB0D42:1; + unsigned TXB0D43:1; + unsigned TXB0D44:1; + unsigned TXB0D45:1; + unsigned TXB0D46:1; + unsigned TXB0D47:1; + }; +} __TXB0D4bits_t; + +extern volatile __TXB0D4bits_t __at (0xf4a) TXB0D4bits; + +extern __sfr __at (0xf4b) TXB0D5; +typedef union { + struct { + unsigned TXB0D50:1; + unsigned TXB0D51:1; + unsigned TXB0D52:1; + unsigned TXB0D53:1; + unsigned TXB0D54:1; + unsigned TXB0D55:1; + unsigned TXB0D56:1; + unsigned TXB0D57:1; + }; +} __TXB0D5bits_t; + +extern volatile __TXB0D5bits_t __at (0xf4b) TXB0D5bits; + +extern __sfr __at (0xf4c) TXB0D6; +typedef union { + struct { + unsigned TXB0D60:1; + unsigned TXB0D61:1; + unsigned TXB0D62:1; + unsigned TXB0D63:1; + unsigned TXB0D64:1; + unsigned TXB0D65:1; + unsigned TXB0D66:1; + unsigned TXB0D67:1; + }; +} __TXB0D6bits_t; + +extern volatile __TXB0D6bits_t __at (0xf4c) TXB0D6bits; + +extern __sfr __at (0xf4d) TXB0D7; +typedef union { + struct { + unsigned TXB0D70:1; + unsigned TXB0D71:1; + unsigned TXB0D72:1; + unsigned TXB0D73:1; + unsigned TXB0D74:1; + unsigned TXB0D75:1; + unsigned TXB0D76:1; + unsigned TXB0D77:1; + }; +} __TXB0D7bits_t; + +extern volatile __TXB0D7bits_t __at (0xf4d) TXB0D7bits; + +extern __sfr __at (0xf4e) CANSTATRO2; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATRO2bits_t; + +extern volatile __CANSTATRO2bits_t __at (0xf4e) CANSTATRO2bits; + +extern __sfr __at (0xf50) RXB1CON; +typedef union { + struct { + unsigned FILHIT0:1; + unsigned FILHIT1:1; + unsigned FILHIT2:1; + unsigned RXRTRRO:1; + unsigned :1; + unsigned RXM0:1; + unsigned RXM1:1; + unsigned RXFUL:1; + }; +} __RXB1CONbits_t; + +extern volatile __RXB1CONbits_t __at (0xf50) RXB1CONbits; + +extern __sfr __at (0xf51) RXB1SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXB1SIDHbits_t; + +extern volatile __RXB1SIDHbits_t __at (0xf51) RXB1SIDHbits; + +extern __sfr __at (0xf52) RXB1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned SRR:1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXB1SIDLbits_t; + +extern volatile __RXB1SIDLbits_t __at (0xf52) RXB1SIDLbits; + +extern __sfr __at (0xf53) RXB1EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXB1EIDHbits_t; + +extern volatile __RXB1EIDHbits_t __at (0xf53) RXB1EIDHbits; + +extern __sfr __at (0xf54) RXB1EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXB1EIDLbits_t; + +extern volatile __RXB1EIDLbits_t __at (0xf54) RXB1EIDLbits; + +extern __sfr __at (0xf55) RXB1DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned RESB0:1; + unsigned RESB1:1; + unsigned RXRTR:1; + unsigned :1; + }; +} __RXB1DLCbits_t; + +extern volatile __RXB1DLCbits_t __at (0xf55) RXB1DLCbits; + +extern __sfr __at (0xf56) RXB1D0; +typedef union { + struct { + unsigned RXB1D00:1; + unsigned RXB1D01:1; + unsigned RXB1D02:1; + unsigned RXB1D03:1; + unsigned RXB1D04:1; + unsigned RXB1D05:1; + unsigned RXB1D06:1; + unsigned RXB1D07:1; + }; +} __RXB1D0bits_t; + +extern volatile __RXB1D0bits_t __at (0xf56) RXB1D0bits; + +extern __sfr __at (0xf57) RXB1D1; +typedef union { + struct { + unsigned RXB1D10:1; + unsigned RXB1D11:1; + unsigned RXB1D12:1; + unsigned RXB1D13:1; + unsigned RXB1D14:1; + unsigned RXB1D15:1; + unsigned RXB1D16:1; + unsigned RXB1D17:1; + }; +} __RXB1D1bits_t; + +extern volatile __RXB1D1bits_t __at (0xf57) RXB1D1bits; + +extern __sfr __at (0xf58) RXB1D2; +typedef union { + struct { + unsigned RXB1D20:1; + unsigned RXB1D21:1; + unsigned RXB1D22:1; + unsigned RXB1D23:1; + unsigned RXB1D24:1; + unsigned RXB1D25:1; + unsigned RXB1D26:1; + unsigned RXB1D27:1; + }; +} __RXB1D2bits_t; + +extern volatile __RXB1D2bits_t __at (0xf58) RXB1D2bits; + +extern __sfr __at (0xf59) RXB1D3; +typedef union { + struct { + unsigned RXB1D30:1; + unsigned RXB1D31:1; + unsigned RXB1D32:1; + unsigned RXB1D33:1; + unsigned RXB1D34:1; + unsigned RXB1D35:1; + unsigned RXB1D36:1; + unsigned RXB1D37:1; + }; +} __RXB1D3bits_t; + +extern volatile __RXB1D3bits_t __at (0xf59) RXB1D3bits; + +extern __sfr __at (0xf5a) RXB1D4; +typedef union { + struct { + unsigned RXB1D40:1; + unsigned RXB1D41:1; + unsigned RXB1D42:1; + unsigned RXB1D43:1; + unsigned RXB1D44:1; + unsigned RXB1D45:1; + unsigned RXB1D46:1; + unsigned RXB1D47:1; + }; +} __RXB1D4bits_t; + +extern volatile __RXB1D4bits_t __at (0xf5a) RXB1D4bits; + +extern __sfr __at (0xf5b) RXB1D5; +typedef union { + struct { + unsigned RXB1D50:1; + unsigned RXB1D51:1; + unsigned RXB1D52:1; + unsigned RXB1D53:1; + unsigned RXB1D54:1; + unsigned RXB1D55:1; + unsigned RXB1D56:1; + unsigned RXB1D57:1; + }; +} __RXB1D5bits_t; + +extern volatile __RXB1D5bits_t __at (0xf5b) RXB1D5bits; + +extern __sfr __at (0xf5c) RXB1D6; +typedef union { + struct { + unsigned RXB1D60:1; + unsigned RXB1D61:1; + unsigned RXB1D62:1; + unsigned RXB1D63:1; + unsigned RXB1D64:1; + unsigned RXB1D65:1; + unsigned RXB1D66:1; + unsigned RXB1D67:1; + }; +} __RXB1D6bits_t; + +extern volatile __RXB1D6bits_t __at (0xf5c) RXB1D6bits; + +extern __sfr __at (0xf5d) RXB1D7; +typedef union { + struct { + unsigned RXB1D70:1; + unsigned RXB1D71:1; + unsigned RXB1D72:1; + unsigned RXB1D73:1; + unsigned RXB1D74:1; + unsigned RXB1D75:1; + unsigned RXB1D76:1; + unsigned RXB1D77:1; + }; +} __RXB1D7bits_t; + +extern volatile __RXB1D7bits_t __at (0xf5d) RXB1D7bits; + +extern __sfr __at (0xf5e) CANSTATRO1; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATRO1bits_t; + +extern volatile __CANSTATRO1bits_t __at (0xf5e) CANSTATRO1bits; + +extern __sfr __at (0xf60) RXB0CON; +typedef union { + struct { + unsigned FILHIT0:1; + unsigned RXB0DBEN_R:1; + unsigned RXB0DBEN:1; + unsigned RXRTRR0:1; + unsigned :1; + unsigned RXM0:1; + unsigned RXM1:1; + unsigned RXFUL:1; + }; +} __RXB0CONbits_t; + +extern volatile __RXB0CONbits_t __at (0xf60) RXB0CONbits; + +extern __sfr __at (0xf61) RXB0SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXB0SIDHbits_t; + +extern volatile __RXB0SIDHbits_t __at (0xf61) RXB0SIDHbits; + +extern __sfr __at (0xf62) RXB0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXID:1; + unsigned SRR:1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXB0SIDLbits_t; + +extern volatile __RXB0SIDLbits_t __at (0xf62) RXB0SIDLbits; + +extern __sfr __at (0xf63) RXB0EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EDI9:1; + unsigned EID10:1; + unsigned ED11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXB0EIDHbits_t; + +extern volatile __RXB0EIDHbits_t __at (0xf63) RXB0EIDHbits; + +extern __sfr __at (0xf64) RXB0EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXB0EIDLbits_t; + +extern volatile __RXB0EIDLbits_t __at (0xf64) RXB0EIDLbits; + +extern __sfr __at (0xf65) RXB0DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned RESB0:1; + unsigned RESB1:1; + unsigned RTR:1; + unsigned :1; + }; +} __RXB0DLCbits_t; + +extern volatile __RXB0DLCbits_t __at (0xf65) RXB0DLCbits; + +extern __sfr __at (0xf66) RXB0D0; +extern __sfr __at (0xf67) RXB0D1; +extern __sfr __at (0xf68) RXB0D2; +extern __sfr __at (0xf69) RXB0D3; +extern __sfr __at (0xf6a) RXB0D4; +extern __sfr __at (0xf6b) RXB0D5; +extern __sfr __at (0xf6c) RXB0D6; +extern __sfr __at (0xf6d) RXB0D7; +extern __sfr __at (0xf6e) CANSTAT; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATbits_t; + +extern volatile __CANSTATbits_t __at (0xf6e) CANSTATbits; + +extern __sfr __at (0xf6f) CANCON; +typedef union { + struct { + unsigned WIN0:1; + unsigned WIN1:1; + unsigned WIN2:1; + unsigned WIN3:1; + unsigned ABAT:1; + unsigned REQOP0:1; + unsigned REQOP1:1; + unsigned REQOP2:1; + }; +} __CANCONbits_t; + +extern volatile __CANCONbits_t __at (0xf6f) CANCONbits; + +extern __sfr __at (0xf70) BRGCON1; +typedef union { + struct { + unsigned BRP0:1; + unsigned BRP1:1; + unsigned BRP2:1; + unsigned BRP3:1; + unsigned BRP4:1; + unsigned BRP5:1; + unsigned SJW0:1; + unsigned SJW1:1; + }; +} __BRGCON1bits_t; + +extern volatile __BRGCON1bits_t __at (0xf70) BRGCON1bits; + +extern __sfr __at (0xf71) BRGCON2; +typedef union { + struct { + unsigned PRSEG0:1; + unsigned PRSEG1:1; + unsigned PRSEG2:1; + unsigned SEG1PH0:1; + unsigned SEG1PH1:1; + unsigned SEG1PH2:1; + unsigned SAM:1; + unsigned SEG2PHTS:1; + }; +} __BRGCON2bits_t; + +extern volatile __BRGCON2bits_t __at (0xf71) BRGCON2bits; + +extern __sfr __at (0xf72) BRGCON3; +typedef union { + struct { + unsigned SEG2PH0:1; + unsigned SEG2PH1:1; + unsigned SEG2PH2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned WAKFIL:1; + unsigned :1; + }; +} __BRGCON3bits_t; + +extern volatile __BRGCON3bits_t __at (0xf72) BRGCON3bits; + +extern __sfr __at (0xf73) CIOCON; +typedef union { + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned CANCAP:1; + unsigned ENDRHI:1; + unsigned :1; + unsigned :1; + }; +} __CIOCONbits_t; + +extern volatile __CIOCONbits_t __at (0xf73) CIOCONbits; + +extern __sfr __at (0xf74) COMSTAT; +typedef union { + struct { + unsigned EWARN:1; + unsigned RXWARN:1; + unsigned TXWARN:1; + unsigned RXBP:1; + unsigned TXBP:1; + unsigned TXBO:1; + unsigned RXB1OVFL:1; + unsigned RXB0OVFL:1; + }; +} __COMSTATbits_t; + +extern volatile __COMSTATbits_t __at (0xf74) COMSTATbits; + +extern __sfr __at (0xf75) RXERRCNT; +typedef union { + struct { + unsigned REC0:1; + unsigned REC1:1; + unsigned REC2:1; + unsigned REC3:1; + unsigned REC4:1; + unsigned REC5:1; + unsigned REC6:1; + unsigned REC7:1; + }; +} __RXERRCNTbits_t; + +extern volatile __RXERRCNTbits_t __at (0xf75) RXERRCNTbits; + +extern __sfr __at (0xf76) TXERRCNT; +typedef union { + struct { + unsigned TEC0:1; + unsigned TEC1:1; + unsigned TEC2:1; + unsigned TEC3:1; + unsigned TEC4:1; + unsigned TEC5:1; + unsigned TEC6:1; + unsigned TEC7:1; + }; +} __TXERRCNTbits_t; + +extern volatile __TXERRCNTbits_t __at (0xf76) TXERRCNTbits; + +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned :1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned INT3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf83) PORTD; +typedef union { + struct { + unsigned RD0:1; + unsigned RD1:1; + unsigned RD2:1; + unsigned RD3:1; + unsigned RD4:1; + unsigned RD5:1; + unsigned RD6:1; + unsigned RD7:1; + }; + + struct { + unsigned AD0:1; + unsigned AD1:1; + unsigned AD2:1; + unsigned AD3:1; + unsigned AD4:1; + unsigned AD5:1; + unsigned AD6:1; + unsigned AD7:1; + }; +} __PORTDbits_t; + +extern volatile __PORTDbits_t __at (0xf83) PORTDbits; + +extern __sfr __at (0xf84) PORTE; +typedef union { + struct { + unsigned RE0:1; + unsigned RE1:1; + unsigned RE2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned ALE:1; + unsigned OE:1; + unsigned WRL:1; + unsigned WRH:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned CCP2:1; + }; + + struct { + unsigned AN5:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTEbits_t; + +extern volatile __PORTEbits_t __at (0xf84) PORTEbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf8c) LATD; +typedef union { + struct { + unsigned LATD0:1; + unsigned LATD1:1; + unsigned LATD2:1; + unsigned LATD3:1; + unsigned LATD4:1; + unsigned LATD5:1; + unsigned LATD6:1; + unsigned LATD7:1; + }; +} __LATDbits_t; + +extern volatile __LATDbits_t __at (0xf8c) LATDbits; + +extern __sfr __at (0xf8d) LATE; +typedef union { + struct { + unsigned LATE0:1; + unsigned LATE1:1; + unsigned LATE2:1; + unsigned LATE3:1; + unsigned LATE4:1; + unsigned LATE5:1; + unsigned LATE6:1; + unsigned LATE7:1; + }; +} __LATEbits_t; + +extern volatile __LATEbits_t __at (0xf8d) LATEbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf95) TRISD; +typedef union { + struct { + unsigned TRISD0:1; + unsigned TRISD1:1; + unsigned TRISD2:1; + unsigned TRISD3:1; + unsigned TRISD4:1; + unsigned TRISD5:1; + unsigned TRISD6:1; + unsigned TRISD7:1; + }; +} __TRISDbits_t; + +extern volatile __TRISDbits_t __at (0xf95) TRISDbits; + +extern __sfr __at (0xf96) TRISE; +typedef union { + struct { + unsigned TRISE0:1; + unsigned TRISE1:1; + unsigned TRISE2:1; + unsigned :1; + unsigned PSPMODE:1; + unsigned IBOV:1; + unsigned OBF:1; + unsigned IBF:1; + }; +} __TRISEbits_t; + +extern volatile __TRISEbits_t __at (0xf96) TRISEbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned CMIE:1; + unsigned :1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned CMIF:1; + unsigned :1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned CMIP:1; + unsigned :1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa3) PIE3; +typedef union { + struct { + unsigned RX0IE:1; + unsigned RX1IE:1; + unsigned TX0IE:1; + unsigned TX1IE:1; + unsigned TX2IE:1; + unsigned ERRIE:1; + unsigned WAKIE:1; + unsigned IVRE:1; + }; +} __PIE3bits_t; + +extern volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +extern __sfr __at (0xfa4) PIR3; +typedef union { + struct { + unsigned RX0IF:1; + unsigned RX1IF:1; + unsigned TX0IF:1; + unsigned TX1IF:1; + unsigned TX2IF:1; + unsigned ERRIF:1; + unsigned WAKIF:1; + unsigned IVRF:1; + }; +} __PIR3bits_t; + +extern volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +extern __sfr __at (0xfa5) IPR3; +typedef union { + struct { + unsigned RX0IP:1; + unsigned RX1IP:1; + unsigned TX0IP:1; + unsigned TX1IP:1; + unsigned TX2IP:1; + unsigned ERRIP:1; + unsigned WAKIP:1; + unsigned IVRP:1; + }; +} __IPR3bits_t; + +extern volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfab) RCSTA; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTAbits_t; + +extern volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +extern __sfr __at (0xfac) TXSTA; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTAbits_t; + +extern volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; +extern __sfr __at (0xfb0) PSPCON; +typedef union { + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned PSPMODE:1; + unsigned IBOV:1; + unsigned OBF:1; + unsigned IBF:1; + }; +} __PSPCONbits_t; + +extern volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfb4) CMCON; +typedef union { + struct { + unsigned CM0:1; + unsigned CM1:1; + unsigned CM2:1; + unsigned CIS:1; + unsigned C1INV:1; + unsigned C2INV:1; + unsigned C1OUT:1; + unsigned C2OUT:1; + }; +} __CMCONbits_t; + +extern volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +extern __sfr __at (0xfb5) CVRCON; +typedef union { + struct { + unsigned CVR0:1; + unsigned CVR1:1; + unsigned CVR2:1; + unsigned CVR3:1; + unsigned CVREF:1; + unsigned CVRR:1; + unsigned CVROE:1; + unsigned CVREN:1; + }; +} __CVRCONbits_t; + +extern volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +extern __sfr __at (0xfb6) ECCPAS; +typedef union { + struct { + unsigned PSSBD0:1; + unsigned PSSBD1:1; + unsigned PSSAC0:1; + unsigned PSSAC1:1; + unsigned ECCPAS0:1; + unsigned ECCPAS1:1; + unsigned ECCPAS2:1; + unsigned ECCPASE:1; + }; +} __ECCPASbits_t; + +extern volatile __ECCPASbits_t __at (0xfb6) ECCPASbits; + +extern __sfr __at (0xfb7) ECCP1DEL; +typedef union { + struct { + unsigned EPDC0:1; + unsigned EPDC1:1; + unsigned EPDC2:1; + unsigned EPDC3:1; + unsigned EPDC4:1; + unsigned EPDC5:1; + unsigned EPDC6:1; + unsigned EPDC7:1; + }; +} __ECCP1DELbits_t; + +extern volatile __ECCP1DELbits_t __at (0xfb7) ECCP1DELbits; + +extern __sfr __at (0xfba) ECCP1CON; +typedef union { + struct { + unsigned ECCP1M0:1; + unsigned ECCP1M1:1; + unsigned ECCP1M2:1; + unsigned ECCP1M3:1; + unsigned EDC1B0:1; + unsigned EDC1B1:1; + unsigned EPWM1M0:1; + unsigned EPWM1M1:1; + }; +} __ECCP1CONbits_t; + +extern volatile __ECCP1CONbits_t __at (0xfba) ECCP1CONbits; + +extern __sfr __at (0xfbb) ECCPR1L; +extern __sfr __at (0xfbc) ECCPR1H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DCCP1Y:1; + unsigned DCCP1X:1; + unsigned :1; + unsigned :1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned :1; + unsigned :1; + unsigned ADCS2:1; + unsigned ADFM:1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned :1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned ADCS0:1; + unsigned ADCS1:1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +typedef union { + struct { + unsigned T0PS0:1; + unsigned T0PS1:1; + unsigned T0PS2:1; + unsigned PSA:1; + unsigned T0SE:1; + unsigned T0CS:1; + unsigned T08BIT:1; + unsigned TMR0ON:1; + }; +} __T0CONbits_t; + +extern volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned :1; + unsigned :1; + unsigned INT1E:1; + unsigned :1; + unsigned :1; + unsigned INT1P:1; + unsigned :1; + }; + + struct { + unsigned INT1IF:1; + unsigned :1; + unsigned :1; + unsigned INT2IE:1; + unsigned :1; + unsigned :1; + unsigned INT1IP:1; + unsigned :1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned :1; + unsigned T0IP:1; + unsigned :1; + unsigned :1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */ +#define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */ +#define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */ +#define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */ +#define _OSC_RC_1H 0xFB /* RC */ +#define _OSC_HS_1H 0xFA /* HS */ +#define _OSC_XT_1H 0xF9 /* XT */ +#define _OSC_LP_1H 0xF8 /* LP */ + +/* Osc. Switch Enable 1H options */ +#define _OSCS_OFF_1H 0xFF /* Disabled */ +#define _OSCS_ON_1H 0xDF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_0V_2L 0xFF /* 2.0V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_OFF_2H 0xFE /* Disabled */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_128_2H 0xFF /* 1:128 */ +#define _WDTPS_1_64_2H 0xFD /* 1:64 */ +#define _WDTPS_1_32_2H 0xFB /* 1:32 */ +#define _WDTPS_1_16_2H 0xF9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xF7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xF5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xF3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xF1 /* 1:1 */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Code Protect 00200-01FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 02000-03FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00200-01FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 02000-03FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00200-01FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 02000-03FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f4480.h b/device/include/pic16/pic18f4480.h new file mode 100644 index 0000000..6d8952c --- /dev/null +++ b/device/include/pic16/pic18f4480.h @@ -0,0 +1,6 @@ +/* + * pic18f4480.h - Device Library Header + */ + +#include "pic18f4580.h" + diff --git a/device/include/pic16/pic18f44j10.h b/device/include/pic16/pic18f44j10.h new file mode 100644 index 0000000..556f647 --- /dev/null +++ b/device/include/pic16/pic18f44j10.h @@ -0,0 +1,1825 @@ +/* + * pic18f44j10.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F44J10_H__ +#define __PIC18F44J10_H__ 1 + +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned : 1; + unsigned RA5 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned : 1; + unsigned AN4 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned SS1 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned CVREF : 1; + unsigned : 1; + unsigned : 1; + unsigned C2OUT_PORTA : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CCP2_PORTB : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN12 : 1; + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned AN9 : 1; + unsigned AN11 : 1; + unsigned T0CKI : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned C1OUT_PORTB : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK1 : 1; + unsigned SDI1 : 1; + unsigned SDO1 : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T1CKI : 1; + unsigned CCP2_PORTC : 1; + unsigned P1A : 1; + unsigned SCL1 : 1; + unsigned SDA1 : 1; + unsigned SDO : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned PSP0 : 1; + unsigned PSP1 : 1; + unsigned PSP2 : 1; + unsigned PSP3 : 1; + unsigned PSP4 : 1; + unsigned PSP5 : 1; + unsigned PSP6 : 1; + unsigned PSP7 : 1; + }; + struct { + unsigned SCL2 : 1; + unsigned SDA2 : 1; + unsigned SDO2 : 1; + unsigned SS2 : 1; + unsigned : 1; + unsigned P1B : 1; + unsigned P1C : 1; + unsigned P1D : 1; + }; + struct { + unsigned SCK2 : 1; + unsigned SDI2 : 1; + unsigned : 1; + unsigned NOT_SS2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned CS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AN5 : 1; + unsigned AN6 : 1; + unsigned AN7 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned NOT_RD : 1; + unsigned NOT_WR : 1; + unsigned NOT_CS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF85) SSP2CON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSP2CON2bits_t; +extern volatile __SSP2CON2bits_t __at (0xF85) SSP2CON2bits; + +extern __sfr __at (0xF86) SSP2CON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSP2CON1bits_t; +extern volatile __SSP2CON1bits_t __at (0xF86) SSP2CON1bits; + +extern __sfr __at (0xF87) SSP2STAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP2STATbits_t; +extern volatile __SSP2STATbits_t __at (0xF87) SSP2STATbits; + +extern __sfr __at (0xF88) SSP2ADD; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned : 1; + unsigned LATA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF8E) SSP2BUF; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned : 1; + unsigned RA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned : 1; + unsigned TRISA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PSPIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IE : 1; + unsigned TX1IE : 1; + unsigned RC1IE : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PSPIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IF : 1; + unsigned TX1IF : 1; + unsigned RC1IF : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PSPIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IP : 1; + unsigned TX1IP : 1; + unsigned RC1IP : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned : 1; + unsigned : 1; + unsigned BCLIE : 1; + unsigned : 1; + unsigned : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned : 1; + unsigned : 1; + unsigned BCLIF : 1; + unsigned : 1; + unsigned : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned : 1; + unsigned : 1; + unsigned BCLIP : 1; + unsigned : 1; + unsigned : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL2IE : 1; + unsigned SSP2IE : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL2IF : 1; + unsigned SSP2IF : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL2IP : 1; + unsigned SSP2IP : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned ADEN : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAB) RCSTA1; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTA1bits_t; +extern volatile __RCSTA1bits_t __at (0xFAB) RCSTA1bits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAC) TXSTA1; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTA1bits_t; +extern volatile __TXSTA1bits_t __at (0xFAC) TXSTA1bits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAD) TXREG1; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAE) RCREG1; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFAF) SPBRG1; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT_CMCON : 1; + unsigned C2OUT_CMCON : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) ECCP1DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +extern __sfr __at (0xFB7) PWM1CON; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __PWM1CONbits_t; +extern volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFB8) BAUDCTL; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCTLbits_t; +extern volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBD) ECCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP1CONbits_t; +extern volatile __ECCP1CONbits_t __at (0xFBD) ECCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned ADCAL : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSP1CON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSP1CON2bits_t; +extern volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSP1CON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSP1CON1bits_t; +extern volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSP1STAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP1STATbits_t; +extern volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSP1ADD; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSP1BUF; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TOUTPS0 : 1; + unsigned TOUTPS1 : 1; + unsigned TOUTPS2 : 1; + unsigned TOUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned : 1; + unsigned OSTS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned T0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned RBIE : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f44k20.h b/device/include/pic16/pic18f44k20.h new file mode 100644 index 0000000..c9f2345 --- /dev/null +++ b/device/include/pic16/pic18f44k20.h @@ -0,0 +1,6 @@ +/* + * pic18f44k20.h - device specific declarations + */ + +#include "pic18f46k20.h" + diff --git a/device/include/pic16/pic18f4510.h b/device/include/pic16/pic18f4510.h new file mode 100644 index 0000000..5fe177e --- /dev/null +++ b/device/include/pic16/pic18f4510.h @@ -0,0 +1,6 @@ +/* + * pic18f4510.h - device specific declarations + */ + +#include "pic18f4610.h" + diff --git a/device/include/pic16/pic18f4515.h b/device/include/pic16/pic18f4515.h new file mode 100644 index 0000000..e07c9c7 --- /dev/null +++ b/device/include/pic16/pic18f4515.h @@ -0,0 +1,6 @@ +/* + * pic18f4515.h - device specific declarations + */ + +#include "pic18f4610.h" + diff --git a/device/include/pic16/pic18f452.h b/device/include/pic16/pic18f452.h new file mode 100644 index 0000000..a719bd4 --- /dev/null +++ b/device/include/pic16/pic18f452.h @@ -0,0 +1,1080 @@ + +/* + * pic18f452.h - PIC18F452 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f452.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F452_H__ +#define __PIC18F452_H__ + +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned :1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned INT3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf83) PORTD; +typedef union { + struct { + unsigned RD0:1; + unsigned RD1:1; + unsigned RD2:1; + unsigned RD3:1; + unsigned RD4:1; + unsigned RD5:1; + unsigned RD6:1; + unsigned RD7:1; + }; + + struct { + unsigned AD0:1; + unsigned AD1:1; + unsigned AD2:1; + unsigned AD3:1; + unsigned AD4:1; + unsigned AD5:1; + unsigned AD6:1; + unsigned AD7:1; + }; +} __PORTDbits_t; + +extern volatile __PORTDbits_t __at (0xf83) PORTDbits; + +extern __sfr __at (0xf84) PORTE; +typedef union { + struct { + unsigned RE0:1; + unsigned RE1:1; + unsigned RE2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned ALE:1; + unsigned OE:1; + unsigned WRL:1; + unsigned WRH:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned CCP2:1; + }; + + struct { + unsigned AN5:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTEbits_t; + +extern volatile __PORTEbits_t __at (0xf84) PORTEbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf8c) LATD; +typedef union { + struct { + unsigned LATD0:1; + unsigned LATD1:1; + unsigned LATD2:1; + unsigned LATD3:1; + unsigned LATD4:1; + unsigned LATD5:1; + unsigned LATD6:1; + unsigned LATD7:1; + }; +} __LATDbits_t; + +extern volatile __LATDbits_t __at (0xf8c) LATDbits; + +extern __sfr __at (0xf8d) LATE; +typedef union { + struct { + unsigned LATE0:1; + unsigned LATE1:1; + unsigned LATE2:1; + unsigned LATE3:1; + unsigned LATE4:1; + unsigned LATE5:1; + unsigned LATE6:1; + unsigned LATE7:1; + }; +} __LATEbits_t; + +extern volatile __LATEbits_t __at (0xf8d) LATEbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf95) TRISD; +typedef union { + struct { + unsigned TRISD0:1; + unsigned TRISD1:1; + unsigned TRISD2:1; + unsigned TRISD3:1; + unsigned TRISD4:1; + unsigned TRISD5:1; + unsigned TRISD6:1; + unsigned TRISD7:1; + }; +} __TRISDbits_t; + +extern volatile __TRISDbits_t __at (0xf95) TRISDbits; + +extern __sfr __at (0xf96) TRISE; +typedef union { + struct { + unsigned TRISE0:1; + unsigned TRISE1:1; + unsigned TRISE2:1; + unsigned :1; + unsigned PSPMODE:1; + unsigned IBOV:1; + unsigned OBF:1; + unsigned IBF:1; + }; +} __TRISEbits_t; + +extern volatile __TRISEbits_t __at (0xf96) TRISEbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfab) RCSTA; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTAbits_t; + +extern volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +extern __sfr __at (0xfac) TXSTA; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTAbits_t; + +extern volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfba) CCP2CON; +typedef union { + struct { + unsigned CCP2M0:1; + unsigned CCP2M1:1; + unsigned CCP2M2:1; + unsigned CCP2M3:1; + unsigned DCCP2Y:1; + unsigned DCCP2X:1; + unsigned :1; + unsigned :1; + }; +} __CCP2CONbits_t; + +extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +extern __sfr __at (0xfbb) CCPR2L; +extern __sfr __at (0xfbc) CCPR2H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DCCP1Y:1; + unsigned DCCP1X:1; + unsigned :1; + unsigned :1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned :1; + unsigned :1; + unsigned ADCS2:1; + unsigned ADFM:1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned :1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned ADCS0:1; + unsigned ADCS1:1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +typedef union { + struct { + unsigned T0PS0:1; + unsigned T0PS1:1; + unsigned T0PS2:1; + unsigned PSA:1; + unsigned T0SE:1; + unsigned T0CS:1; + unsigned T08BIT:1; + unsigned TMR0ON:1; + }; +} __T0CONbits_t; + +extern volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned INT2F:1; + unsigned :1; + unsigned INT1E:1; + unsigned INT2E:1; + unsigned :1; + unsigned INT1P:1; + unsigned INT2P:1; + }; + + struct { + unsigned INT1IF:1; + unsigned INT2IF:1; + unsigned :1; + unsigned INT1IE:1; + unsigned INT2IE:1; + unsigned :1; + unsigned INT1IP:1; + unsigned INT2IP:1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned :1; + unsigned T0IP:1; + unsigned :1; + unsigned INTEDG2:1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */ +#define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */ +#define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */ +#define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */ +#define _OSC_RC_1H 0xFB /* RC */ +#define _OSC_HS_1H 0xFA /* HS */ +#define _OSC_XT_1H 0xF9 /* XT */ +#define _OSC_LP_1H 0xF8 /* LP */ + +/* Osc. Switch Enable 1H options */ +#define _OSCS_OFF_1H 0xFF /* Disabled */ +#define _OSCS_ON_1H 0xDF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_0V_2L 0xFF /* 2.0V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_OFF_2H 0xFE /* Disabled */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_128_2H 0xFF /* 1:128 */ +#define _WDTPS_1_64_2H 0xFD /* 1:64 */ +#define _WDTPS_1_32_2H 0xFB /* 1:32 */ +#define _WDTPS_1_16_2H 0xF9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xF7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xF5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xF3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xF1 /* 1:1 */ + +/* CCP2 Mux 3H options */ +#define _CCP2MUX_RC1_3H 0xFF /* RC1 */ +#define _CCP2MUX_RB3_3H 0xFE /* RB3 */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Code Protect 00200-01FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 02000-03FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Code Protect 04000-05FFF 5L options */ +#define _CP_2_OFF_5L 0xFF /* Disabled */ +#define _CP_2_ON_5L 0xFB /* Enabled */ + +/* Code Protect 06000-07FFF 5L options */ +#define _CP_3_OFF_5L 0xFF /* Disabled */ +#define _CP_3_ON_5L 0xF7 /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00200-01FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 02000-03FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Table Write Protect 04000-05FFF 6L options */ +#define _WRT_2_OFF_6L 0xFF /* Disabled */ +#define _WRT_2_ON_6L 0xFB /* Enabled */ + +/* Table Write Protect 06000-07FFF 6L options */ +#define _WRT_3_OFF_6L 0xFF /* Disabled */ +#define _WRT_3_ON_6L 0xF7 /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00200-01FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 02000-03FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect 04000-05FFF 7L options */ +#define _EBTR_2_OFF_7L 0xFF /* Disabled */ +#define _EBTR_2_ON_7L 0xFB /* Enabled */ + +/* Table Read Protect 06000-07FFF 7L options */ +#define _EBTR_3_OFF_7L 0xFF /* Disabled */ +#define _EBTR_3_ON_7L 0xF7 /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f4520.h b/device/include/pic16/pic18f4520.h new file mode 100644 index 0000000..4e14e4d --- /dev/null +++ b/device/include/pic16/pic18f4520.h @@ -0,0 +1,1577 @@ +/* + * pic18f4520.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F4520_H__ +#define __PIC18F4520_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP oscillator +#define _OSC_XT_1H 0xF1 // XT oscillator +#define _OSC_HS_1H 0xF2 // HS oscillator +#define _OSC_RC_1H 0xF3 // External RC oscillator, CLKO function on RA6 +#define _OSC_EC_1H 0xF4 // EC oscillator, CLKO function on RA6 +#define _OSC_ECIO6_1H 0xF5 // EC oscillator, port function on RA6 +#define _OSC_HSPLL_1H 0xF6 // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) +#define _OSC_RCIO6_1H 0xF7 // External RC oscillator, port function on RA6 +#define _OSC_INTIO67_1H 0xF8 // Internal oscillator block, port function on RA6 and RA7 +#define _OSC_INTIO7_1H 0xF9 // Internal oscillator block, CLKO function on RA6, port function on RA7 +#define _FCMEN_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled +#define _FCMEN_ON_1H 0xFF // Fail-Safe Clock Monitor enabled +#define _IESO_OFF_1H 0x7F // Oscillator Switchover mode disabled +#define _IESO_ON_1H 0xFF // Oscillator Switchover mode enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // PWRT enabled +#define _PWRT_OFF_2L 0xFF // PWRT disabled +#define _BOREN_OFF_2L 0xF9 // Brown-out Reset disabled in hardware and software +#define _BOREN_ON_2L 0xFB // Brown-out Reset enabled and controlled by software (SBOREN is enabled) +#define _BOREN_NOSLP_2L 0xFD // Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) +#define _BOREN_SBORDIS_2L 0xFF // Brown-out Reset enabled in hardware only (SBOREN is disabled) +#define _BORV_0_2L 0xE7 // Maximum setting +#define _BORV_1_2L 0xEF // +#define _BORV_2_2L 0xF7 // +#define _BORV_3_2L 0xFF // Minimum setting + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit) +#define _WDT_ON_2H 0xFF // WDT enabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // RE3 input pin enabled; MCLR disabled +#define _MCLRE_ON_3H 0xFF // MCLR pin enabled; RE3 input pin disabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 configured for higher power operation +#define _LPT1OSC_ON_3H 0xFF // Timer1 configured for low-power operation +#define _PBADEN_OFF_3H 0xFD // PORTB<4:0> pins are configured as digital I/O on Reset +#define _PBADEN_ON_3H 0xFF // PORTB<4:0> pins are configured as analog input channels on Reset +#define _CCP2MX_PORTBE_3H 0xFE // CCP2 input/output is multiplexed with RB3 +#define _CCP2MX_PORTC_3H 0xFF // CCP2 input/output is multiplexed with RC1 + +// CONFIG4L Options +#define _STVREN_OFF_4L 0xFE // Stack full/underflow will not cause Reset +#define _STVREN_ON_4L 0xFF // Stack full/underflow will cause Reset +#define _LVP_OFF_4L 0xFB // Single-Supply ICSP disabled +#define _LVP_ON_4L 0xFF // Single-Supply ICSP enabled +#define _XINST_OFF_4L 0xBF // Instruction set extension and Indexed Addressing mode disabled (Legacy mode) +#define _XINST_ON_4L 0xFF // Instruction set extension and Indexed Addressing mode enabled +#define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug +#define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Block 0 (000800-001FFFh) code-protected +#define _CP0_OFF_5L 0xFF // Block 0 (000800-001FFFh) not code-protected +#define _CP1_ON_5L 0xFD // Block 1 (002000-003FFFh) code-protected +#define _CP1_OFF_5L 0xFF // Block 1 (002000-003FFFh) not code-protected +#define _CP2_ON_5L 0xFB // Block 2 (004000-005FFFh) code-protected +#define _CP2_OFF_5L 0xFF // Block 2 (004000-005FFFh) not code-protected +#define _CP3_ON_5L 0xF7 // Block 3 (006000-007FFFh) code-protected +#define _CP3_OFF_5L 0xFF // Block 3 (006000-007FFFh) not code-protected + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Boot block (000000-0007FFh) code-protected +#define _CPB_OFF_5H 0xFF // Boot block (000000-0007FFh) not code-protected +#define _CPD_ON_5H 0x7F // Data EEPROM code-protected +#define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Block 0 (000800-001FFFh) write-protected +#define _WRT0_OFF_6L 0xFF // Block 0 (000800-001FFFh) not write-protected +#define _WRT1_ON_6L 0xFD // Block 1 (002000-003FFFh) write-protected +#define _WRT1_OFF_6L 0xFF // Block 1 (002000-003FFFh) not write-protected +#define _WRT2_ON_6L 0xFB // Block 2 (004000-005FFFh) write-protected +#define _WRT2_OFF_6L 0xFF // Block 2 (004000-005FFFh) not write-protected +#define _WRT3_ON_6L 0xF7 // Block 3 (006000-007FFFh) write-protected +#define _WRT3_OFF_6L 0xFF // Block 3 (006000-007FFFh) not write-protected + +// CONFIG6H Options +#define _WRTB_ON_6H 0xBF // Boot block (000000-0007FFh) write-protected +#define _WRTB_OFF_6H 0xFF // Boot block (000000-0007FFh) not write-protected +#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected +#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected +#define _WRTD_ON_6H 0x7F // Data EEPROM write-protected +#define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Block 0 (000800-001FFFh) protected from table reads executed in other blocks +#define _EBTR0_OFF_7L 0xFF // Block 0 (000800-001FFFh) not protected from table reads executed in other blocks +#define _EBTR1_ON_7L 0xFD // Block 1 (002000-003FFFh) protected from table reads executed in other blocks +#define _EBTR1_OFF_7L 0xFF // Block 1 (002000-003FFFh) not protected from table reads executed in other blocks +#define _EBTR2_ON_7L 0xFB // Block 2 (004000-005FFFh) protected from table reads executed in other blocks +#define _EBTR2_OFF_7L 0xFF // Block 2 (004000-005FFFh) not protected from table reads executed in other blocks +#define _EBTR3_ON_7L 0xF7 // Block 3 (006000-007FFFh) protected from table reads executed in other blocks +#define _EBTR3_OFF_7L 0xFF // Block 3 (006000-007FFFh) not protected from table reads executed in other blocks + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Boot block (000000-0007FFh) protected from table reads executed in other blocks +#define _EBTRB_OFF_7H 0xFF // Boot block (000000-0007FFh) not protected from table reads executed in other blocks +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned OSC1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned VREFN : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned SS : 1; + unsigned CLKO : 1; + unsigned CLKI : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned CVREF : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned C1OUT : 1; + unsigned C2OUT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned LVDIN : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CCP2_PORTB : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN12 : 1; + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned AN9 : 1; + unsigned AN11 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned CCP2_PORTC : 1; + unsigned P1A : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned T1CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned PSP0 : 1; + unsigned PSP1 : 1; + unsigned PSP2 : 1; + unsigned PSP3 : 1; + unsigned PSP4 : 1; + unsigned PSP5 : 1; + unsigned PSP6 : 1; + unsigned PSP7 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned P1B : 1; + unsigned P1C : 1; + unsigned P1D : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned CS : 1; + unsigned MCLR : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned NOT_RD : 1; + unsigned NOT_WR : 1; + unsigned NOT_CS : 1; + unsigned NOT_MCLR : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AN5 : 1; + unsigned AN6 : 1; + unsigned AN7 : 1; + unsigned VPP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PSPIE : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PSPIF : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PSPIP : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned TMR3IE : 1; + unsigned HLVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned LVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned TMR3IF : 1; + unsigned HLVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned LVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned TMR3IP : 1; + unsigned HLVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned LVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT : 1; + unsigned C2OUT : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) PWM1CON; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __PWM1CONbits_t; +extern volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFB8) BAUDCTL; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCTLbits_t; +extern volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R_W : 1; + unsigned : 1; + unsigned : 1; + unsigned D_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned FLTS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0F : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0E : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0IF : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0IE : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned SP0 : 1; + unsigned SP1 : 1; + unsigned SP2 : 1; + unsigned SP3 : 1; + unsigned SP4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKOVF : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f4523.h b/device/include/pic16/pic18f4523.h new file mode 100644 index 0000000..8bb1927 --- /dev/null +++ b/device/include/pic16/pic18f4523.h @@ -0,0 +1,1607 @@ +/* + * pic18f4523.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F4523_H__ +#define __PIC18F4523_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP oscillator +#define _OSC_XT_1H 0xF1 // XT oscillator +#define _OSC_HS_1H 0xF2 // HS oscillator +#define _OSC_RC_1H 0xF3 // External RC oscillator, CLKO function on RA6 +#define _OSC_EC_1H 0xF4 // EC oscillator, CLKO function on RA6 +#define _OSC_ECIO6_1H 0xF5 // EC oscillator, port function on RA6 +#define _OSC_HSPLL_1H 0xF6 // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) +#define _OSC_RCIO6_1H 0xF7 // External RC oscillator, port function on RA6 +#define _OSC_INTIO67_1H 0xF8 // Internal oscillator block, port function on RA6 and RA7 +#define _OSC_INTIO7_1H 0xF9 // Internal oscillator block, CLKO function on RA6, port function on RA7 +#define _FCMEN_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled +#define _FCMEN_ON_1H 0xFF // Fail-Safe Clock Monitor enabled +#define _IESO_OFF_1H 0x7F // Oscillator Switchover mode disabled +#define _IESO_ON_1H 0xFF // Oscillator Switchover mode enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // PWRT enabled +#define _PWRT_OFF_2L 0xFF // PWRT disabled +#define _BOREN_OFF_2L 0xF9 // Brown-out Reset disabled in hardware and software +#define _BOREN_ON_2L 0xFB // Brown-out Reset enabled and controlled by software (SBOREN is enabled) +#define _BOREN_NOSLP_2L 0xFD // Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) +#define _BOREN_SBORDIS_2L 0xFF // Brown-out Reset enabled in hardware only (SBOREN is disabled) +#define _BORV_0_2L 0xE7 // Maximum setting +#define _BORV_1_2L 0xEF // +#define _BORV_2_2L 0xF7 // +#define _BORV_3_2L 0xFF // Minimum setting + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit) +#define _WDT_ON_2H 0xFF // WDT enabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // RE3 input pin enabled; MCLR disabled +#define _MCLRE_ON_3H 0xFF // MCLR pin enabled; RE3 input pin disabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 configured for higher power operation +#define _LPT1OSC_ON_3H 0xFF // Timer1 configured for low-power operation +#define _PBADEN_OFF_3H 0xFD // PORTB<4:0> pins are configured as digital I/O on Reset +#define _PBADEN_ON_3H 0xFF // PORTB<4:0> pins are configured as analog input channels on Reset +#define _CCP2MX_PORTB_3H 0xFE // CCP2 input/output is multiplexed with RB3 +#define _CCP2MX_PORTC_3H 0xFF // CCP2 input/output is multiplexed with RC1 + +// CONFIG4L Options +#define _STVREN_OFF_4L 0xFE // Stack full/underflow will not cause Reset +#define _STVREN_ON_4L 0xFF // Stack full/underflow will cause Reset +#define _LVP_OFF_4L 0xFB // Disabled +#define _LVP_ON_4L 0xFF // Enabled +#define _XINST_OFF_4L 0xBF // Instruction set extension and Indexed Addressing mode disabled (Legacy mode) +#define _XINST_ON_4L 0xFF // Instruction set extension and Indexed Addressing mode enabled +#define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug +#define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Block 0 (000800-001FFFh) code-protected +#define _CP0_OFF_5L 0xFF // Block 0 (000800-001FFFh) not code-protected +#define _CP1_ON_5L 0xFD // Block 1 (002000-003FFFh) code-protected +#define _CP1_OFF_5L 0xFF // Block 1 (002000-003FFFh) not code-protected +#define _CP2_ON_5L 0xFB // Block 2 (004000-005FFFh) code-protected +#define _CP2_OFF_5L 0xFF // Block 2 (004000-005FFFh) not code-protected +#define _CP3_ON_5L 0xF7 // Block 3 (006000-007FFFh) code-protected +#define _CP3_OFF_5L 0xFF // Block 3 (006000-007FFFh) not code-protected + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Boot block (000000-0007FFh) code-protected +#define _CPB_OFF_5H 0xFF // Boot block (000000-0007FFh) not code-protected +#define _CPD_ON_5H 0x7F // Data EEPROM code-protected +#define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Block 0 (000800-001FFFh) write-protected +#define _WRT0_OFF_6L 0xFF // Block 0 (000800-001FFFh) not write-protected +#define _WRT1_ON_6L 0xFD // Block 1 (002000-003FFFh) write-protected +#define _WRT1_OFF_6L 0xFF // Block 1 (002000-003FFFh) not write-protected +#define _WRT2_ON_6L 0xFB // Block 2 (004000-005FFFh) write-protected +#define _WRT2_OFF_6L 0xFF // Block 2 (004000-005FFFh) not write-protected +#define _WRT3_ON_6L 0xF7 // Block 3 (006000-007FFFh) write-protected +#define _WRT3_OFF_6L 0xFF // Block 3 (006000-007FFFh) not write-protected + +// CONFIG6H Options +#define _WRTB_ON_6H 0xBF // Boot block (000000-0007FFh) write-protected +#define _WRTB_OFF_6H 0xFF // Boot block (000000-0007FFh) not write-protected +#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected +#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected +#define _WRTD_ON_6H 0x7F // Data EEPROM write-protected +#define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Block 0 (000800-001FFFh) protected from table reads executed in other blocks +#define _EBTR0_OFF_7L 0xFF // Block 0 (000800-001FFFh) not protected from table reads executed in other blocks +#define _EBTR1_ON_7L 0xFD // Block 1 (002000-003FFFh) protected from table reads executed in other blocks +#define _EBTR1_OFF_7L 0xFF // Block 1 (002000-003FFFh) not protected from table reads executed in other blocks +#define _EBTR2_ON_7L 0xFB // Block 2 (004000-005FFFh) protected from table reads executed in other blocks +#define _EBTR2_OFF_7L 0xFF // Block 2 (004000-005FFFh) not protected from table reads executed in other blocks +#define _EBTR3_ON_7L 0xF7 // Block 3 (006000-007FFFh) protected from table reads executed in other blocks +#define _EBTR3_OFF_7L 0xFF // Block 3 (006000-007FFFh) not protected from table reads executed in other blocks + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Boot block (000000-0007FFh) protected from table reads executed in other blocks +#define _EBTRB_OFF_7H 0xFF // Boot block (000000-0007FFh) not protected from table reads executed in other blocks +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned OSC1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned VREFN : 1; + unsigned VREFP : 1; + unsigned C1OUT_PORTA : 1; + unsigned SS : 1; + unsigned CLKO : 1; + unsigned CLKI : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned CVREF : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned LVDIN : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned C2OUT_PORTA : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CCP2_PORTB : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN12 : 1; + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned AN9 : 1; + unsigned AN11 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned CCP2_PORTC : 1; + unsigned P1A : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned T1CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned PSP0 : 1; + unsigned PSP1 : 1; + unsigned PSP2 : 1; + unsigned PSP3 : 1; + unsigned PSP4 : 1; + unsigned PSP5 : 1; + unsigned PSP6 : 1; + unsigned PSP7 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned P1B : 1; + unsigned P1C : 1; + unsigned P1D : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned CS : 1; + unsigned MCLR : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned NOT_RD : 1; + unsigned NOT_WR : 1; + unsigned NOT_CS : 1; + unsigned NOT_MCLR : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AN5 : 1; + unsigned AN6 : 1; + unsigned AN7 : 1; + unsigned VPP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PSPIE : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PSPIF : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PSPIP : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned TMR3IE : 1; + unsigned HLVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned LVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned TMR3IF : 1; + unsigned HLVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned LVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned TMR3IP : 1; + unsigned HLVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned LVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT_CMCON : 1; + unsigned C2OUT_CMCON : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) PWM1CON; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __PWM1CONbits_t; +extern volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFB8) BAUDCTL; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCTLbits_t; +extern volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R_W : 1; + unsigned : 1; + unsigned : 1; + unsigned D_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned FLTS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0F : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0E : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0IF : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0IE : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned SP0 : 1; + unsigned SP1 : 1; + unsigned SP2 : 1; + unsigned SP3 : 1; + unsigned SP4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKOVF : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f4525.h b/device/include/pic16/pic18f4525.h new file mode 100644 index 0000000..b856792 --- /dev/null +++ b/device/include/pic16/pic18f4525.h @@ -0,0 +1,6 @@ +/* + * pic18f4525.h - PIC18F4525 Device Library Header + */ + +#include "pic18f4620.h" + diff --git a/device/include/pic16/pic18f4550.h b/device/include/pic16/pic18f4550.h new file mode 100644 index 0000000..028f65e --- /dev/null +++ b/device/include/pic16/pic18f4550.h @@ -0,0 +1,6 @@ +/* + * pic18f4550.h - PIC18F4550 Device Library Header + */ + +#include "pic18f2455.h" + diff --git a/device/include/pic16/pic18f458.h b/device/include/pic16/pic18f458.h new file mode 100644 index 0000000..937ed33 --- /dev/null +++ b/device/include/pic16/pic18f458.h @@ -0,0 +1,2923 @@ + +/* + * pic18f458.h - PIC18F458 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f458.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F458_H__ +#define __PIC18F458_H__ + +extern __sfr __at (0xf00) RXF0SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF0SIDHbits_t; + +extern volatile __RXF0SIDHbits_t __at (0xf00) RXF0SIDHbits; + +extern __sfr __at (0xf01) RXF0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF0SIDLbits_t; + +extern volatile __RXF0SIDLbits_t __at (0xf01) RXF0SIDLbits; + +extern __sfr __at (0xf02) RXF0EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF0EIDHbits_t; + +extern volatile __RXF0EIDHbits_t __at (0xf02) RXF0EIDHbits; + +extern __sfr __at (0xf03) RXF0EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF0EIDLbits_t; + +extern volatile __RXF0EIDLbits_t __at (0xf03) RXF0EIDLbits; + +extern __sfr __at (0xf04) RXF1SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF1SIDHbits_t; + +extern volatile __RXF1SIDHbits_t __at (0xf04) RXF1SIDHbits; + +extern __sfr __at (0xf05) RXF1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF1SIDLbits_t; + +extern volatile __RXF1SIDLbits_t __at (0xf05) RXF1SIDLbits; + +extern __sfr __at (0xf06) RXF1EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF1EIDHbits_t; + +extern volatile __RXF1EIDHbits_t __at (0xf06) RXF1EIDHbits; + +extern __sfr __at (0xf07) RXF1EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF1EIDLbits_t; + +extern volatile __RXF1EIDLbits_t __at (0xf07) RXF1EIDLbits; + +extern __sfr __at (0xf08) RXF2SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF2SIDHbits_t; + +extern volatile __RXF2SIDHbits_t __at (0xf08) RXF2SIDHbits; + +extern __sfr __at (0xf09) RXF2SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF2SIDLbits_t; + +extern volatile __RXF2SIDLbits_t __at (0xf09) RXF2SIDLbits; + +extern __sfr __at (0xf0a) RXF2EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF2EIDHbits_t; + +extern volatile __RXF2EIDHbits_t __at (0xf0a) RXF2EIDHbits; + +extern __sfr __at (0xf0b) RXF2EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF2EIDLbits_t; + +extern volatile __RXF2EIDLbits_t __at (0xf0b) RXF2EIDLbits; + +extern __sfr __at (0xf0c) RXF3SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF3SIDHbits_t; + +extern volatile __RXF3SIDHbits_t __at (0xf0c) RXF3SIDHbits; + +extern __sfr __at (0xf0d) RXF3SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF3SIDLbits_t; + +extern volatile __RXF3SIDLbits_t __at (0xf0d) RXF3SIDLbits; + +extern __sfr __at (0xf0e) RXF3EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF3EIDHbits_t; + +extern volatile __RXF3EIDHbits_t __at (0xf0e) RXF3EIDHbits; + +extern __sfr __at (0xf0f) RXF3EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF3EIDLbits_t; + +extern volatile __RXF3EIDLbits_t __at (0xf0f) RXF3EIDLbits; + +extern __sfr __at (0xf10) RXF4SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF4SIDHbits_t; + +extern volatile __RXF4SIDHbits_t __at (0xf10) RXF4SIDHbits; + +extern __sfr __at (0xf11) RXF4SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF4SIDLbits_t; + +extern volatile __RXF4SIDLbits_t __at (0xf11) RXF4SIDLbits; + +extern __sfr __at (0xf12) RXF4EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF4EIDHbits_t; + +extern volatile __RXF4EIDHbits_t __at (0xf12) RXF4EIDHbits; + +extern __sfr __at (0xf13) RXF4EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF4EIDLbits_t; + +extern volatile __RXF4EIDLbits_t __at (0xf13) RXF4EIDLbits; + +extern __sfr __at (0xf14) RXF5SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXF5SIDHbits_t; + +extern volatile __RXF5SIDHbits_t __at (0xf14) RXF5SIDHbits; + +extern __sfr __at (0xf15) RXF5SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF5SIDLbits_t; + +extern volatile __RXF5SIDLbits_t __at (0xf15) RXF5SIDLbits; + +extern __sfr __at (0xf16) RXF5EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXF5EIDHbits_t; + +extern volatile __RXF5EIDHbits_t __at (0xf16) RXF5EIDHbits; + +extern __sfr __at (0xf17) RXF5EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXF5EIDLbits_t; + +extern volatile __RXF5EIDLbits_t __at (0xf17) RXF5EIDLbits; + +extern __sfr __at (0xf18) RXM0SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXM0SIDHbits_t; + +extern volatile __RXM0SIDHbits_t __at (0xf18) RXM0SIDHbits; + +extern __sfr __at (0xf19) RXM0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXM0SIDLbits_t; + +extern volatile __RXM0SIDLbits_t __at (0xf19) RXM0SIDLbits; + +extern __sfr __at (0xf1a) RXM0EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXM0EIDHbits_t; + +extern volatile __RXM0EIDHbits_t __at (0xf1a) RXM0EIDHbits; + +extern __sfr __at (0xf1b) RXM0EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXM0EIDLbits_t; + +extern volatile __RXM0EIDLbits_t __at (0xf1b) RXM0EIDLbits; + +extern __sfr __at (0xf1c) RXM1SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXM1SIDHbits_t; + +extern volatile __RXM1SIDHbits_t __at (0xf1c) RXM1SIDHbits; + +extern __sfr __at (0xf1d) RXM1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDEN:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXM1SIDLbits_t; + +extern volatile __RXM1SIDLbits_t __at (0xf1d) RXM1SIDLbits; + +extern __sfr __at (0xf1e) RXM1EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXM1EIDHbits_t; + +extern volatile __RXM1EIDHbits_t __at (0xf1e) RXM1EIDHbits; + +extern __sfr __at (0xf1f) RXM1EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXM1EIDLbits_t; + +extern volatile __RXM1EIDLbits_t __at (0xf1f) RXM1EIDLbits; + +extern __sfr __at (0xf20) TXB2CON; +typedef union { + struct { + unsigned TXPRI0:1; + unsigned TXPRI1:1; + unsigned :1; + unsigned TXREQ:1; + unsigned TXERR:1; + unsigned TXLARB:1; + unsigned TXABT:1; + unsigned :1; + }; +} __TXB2CONbits_t; + +extern volatile __TXB2CONbits_t __at (0xf20) TXB2CONbits; + +extern __sfr __at (0xf21) TXB2SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __TXB2SIDHbits_t; + +extern volatile __TXB2SIDHbits_t __at (0xf21) TXB2SIDHbits; + +extern __sfr __at (0xf22) TXB2SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDEN:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __TXB2SIDLbits_t; + +extern volatile __TXB2SIDLbits_t __at (0xf22) TXB2SIDLbits; + +extern __sfr __at (0xf23) TXB2EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __TXB2EIDHbits_t; + +extern volatile __TXB2EIDHbits_t __at (0xf23) TXB2EIDHbits; + +extern __sfr __at (0xf24) TXB2EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __TXB2EIDLbits_t; + +extern volatile __TXB2EIDLbits_t __at (0xf24) TXB2EIDLbits; + +extern __sfr __at (0xf25) TXB2DLC; +typedef union { + struct { + unsigned TXB2DLC0:1; + unsigned TXB2DLC1:1; + unsigned TXB2DLC2:1; + unsigned TXB2DLC3:1; + unsigned :1; + unsigned :1; + unsigned TXB2TXRTR:1; + unsigned :1; + }; +} __TXB2DLCbits_t; + +extern volatile __TXB2DLCbits_t __at (0xf25) TXB2DLCbits; + +extern __sfr __at (0xf26) TXB2D0; +typedef union { + struct { + unsigned TXB2D00:1; + unsigned TXB2D01:1; + unsigned TXB2D02:1; + unsigned TXB2D03:1; + unsigned TXB2D04:1; + unsigned TXB2D05:1; + unsigned TXB2D06:1; + unsigned TXB2D07:1; + }; +} __TXB2D0bits_t; + +extern volatile __TXB2D0bits_t __at (0xf26) TXB2D0bits; + +extern __sfr __at (0xf27) TXB2D1; +typedef union { + struct { + unsigned TXB2D10:1; + unsigned TXB2D11:1; + unsigned TXB2D12:1; + unsigned TXB2D13:1; + unsigned TXB2D14:1; + unsigned TXB2D15:1; + unsigned TXB2D16:1; + unsigned TXB2D17:1; + }; +} __TXB2D1bits_t; + +extern volatile __TXB2D1bits_t __at (0xf27) TXB2D1bits; + +extern __sfr __at (0xf28) TXB2D2; +typedef union { + struct { + unsigned TXB2D20:1; + unsigned TXB2D21:1; + unsigned TXB2D22:1; + unsigned TXB2D23:1; + unsigned TXB2D24:1; + unsigned TXB2D25:1; + unsigned TXB2D26:1; + unsigned TXB2D27:1; + }; +} __TXB2D2bits_t; + +extern volatile __TXB2D2bits_t __at (0xf28) TXB2D2bits; + +extern __sfr __at (0xf29) TXB2D3; +typedef union { + struct { + unsigned TXB2D30:1; + unsigned TXB2D31:1; + unsigned TXB2D32:1; + unsigned TXB2D33:1; + unsigned TXB2D34:1; + unsigned TXB2D35:1; + unsigned TXB2D36:1; + unsigned TXB2D37:1; + }; +} __TXB2D3bits_t; + +extern volatile __TXB2D3bits_t __at (0xf29) TXB2D3bits; + +extern __sfr __at (0xf2a) TXB2D4; +typedef union { + struct { + unsigned TXB2D40:1; + unsigned TXB2D41:1; + unsigned TXB2D42:1; + unsigned TXB2D43:1; + unsigned TXB2D44:1; + unsigned TXB2D45:1; + unsigned TXB2D46:1; + unsigned TXB2D47:1; + }; +} __TXB2D4bits_t; + +extern volatile __TXB2D4bits_t __at (0xf2a) TXB2D4bits; + +extern __sfr __at (0xf2b) TXB2D5; +typedef union { + struct { + unsigned TXB2D50:1; + unsigned TXB2D51:1; + unsigned TXB2D52:1; + unsigned TXB2D53:1; + unsigned TXB2D54:1; + unsigned TXB2D55:1; + unsigned TXB2D56:1; + unsigned TXB2D57:1; + }; +} __TXB2D5bits_t; + +extern volatile __TXB2D5bits_t __at (0xf2b) TXB2D5bits; + +extern __sfr __at (0xf2c) TXB2D6; +typedef union { + struct { + unsigned TXB2D60:1; + unsigned TXB2D61:1; + unsigned TXB2D62:1; + unsigned TXB2D63:1; + unsigned TXB2D64:1; + unsigned TXB2D65:1; + unsigned TXB2D66:1; + unsigned TXB2D67:1; + }; +} __TXB2D6bits_t; + +extern volatile __TXB2D6bits_t __at (0xf2c) TXB2D6bits; + +extern __sfr __at (0xf2d) TXB2D7; +typedef union { + struct { + unsigned TXB2D70:1; + unsigned TXB2D71:1; + unsigned TXB2D72:1; + unsigned TXB2D73:1; + unsigned TXB2D74:1; + unsigned TXB2D75:1; + unsigned TXB2D76:1; + unsigned TXB2D77:1; + }; +} __TXB2D7bits_t; + +extern volatile __TXB2D7bits_t __at (0xf2d) TXB2D7bits; + +extern __sfr __at (0xf2e) CANSTATRO4; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATRO4bits_t; + +extern volatile __CANSTATRO4bits_t __at (0xf2e) CANSTATRO4bits; + +extern __sfr __at (0xf30) TXB1CON; +typedef union { + struct { + unsigned TXPRI0:1; + unsigned TXPRI1:1; + unsigned :1; + unsigned TXREQ:1; + unsigned TXERR:1; + unsigned TXLARB:1; + unsigned TXABT:1; + unsigned :1; + }; +} __TXB1CONbits_t; + +extern volatile __TXB1CONbits_t __at (0xf30) TXB1CONbits; + +extern __sfr __at (0xf31) TXB1SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __TXB1SIDHbits_t; + +extern volatile __TXB1SIDHbits_t __at (0xf31) TXB1SIDHbits; + +extern __sfr __at (0xf32) TXB1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __TXB1SIDLbits_t; + +extern volatile __TXB1SIDLbits_t __at (0xf32) TXB1SIDLbits; + +extern __sfr __at (0xf33) TXB1EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __TXB1EIDHbits_t; + +extern volatile __TXB1EIDHbits_t __at (0xf33) TXB1EIDHbits; + +extern __sfr __at (0xf34) TXB1EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __TXB1EIDLbits_t; + +extern volatile __TXB1EIDLbits_t __at (0xf34) TXB1EIDLbits; + +extern __sfr __at (0xf35) TXB1DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned :1; + unsigned :1; + unsigned TXRTR:1; + unsigned :1; + }; +} __TXB1DLCbits_t; + +extern volatile __TXB1DLCbits_t __at (0xf35) TXB1DLCbits; + +extern __sfr __at (0xf36) TXB1D0; +typedef union { + struct { + unsigned TXB1D00:1; + unsigned TXB1D01:1; + unsigned TXB1D02:1; + unsigned TXB1D03:1; + unsigned TXB1D04:1; + unsigned TXB1D05:1; + unsigned TXB1D06:1; + unsigned TXB1D07:1; + }; +} __TXB1D0bits_t; + +extern volatile __TXB1D0bits_t __at (0xf36) TXB1D0bits; + +extern __sfr __at (0xf37) TXB1D1; +typedef union { + struct { + unsigned TXB1D10:1; + unsigned TXB1D11:1; + unsigned TXB1D12:1; + unsigned TXB1D13:1; + unsigned TXB1D14:1; + unsigned TXB1D15:1; + unsigned TXB1D16:1; + unsigned TXB1D17:1; + }; +} __TXB1D1bits_t; + +extern volatile __TXB1D1bits_t __at (0xf37) TXB1D1bits; + +extern __sfr __at (0xf38) TXB1D2; +typedef union { + struct { + unsigned TXB1D20:1; + unsigned TXB1D21:1; + unsigned TXB1D22:1; + unsigned TXB1D23:1; + unsigned TXB1D24:1; + unsigned TXB1D25:1; + unsigned TXB1D26:1; + unsigned TXB1D27:1; + }; +} __TXB1D2bits_t; + +extern volatile __TXB1D2bits_t __at (0xf38) TXB1D2bits; + +extern __sfr __at (0xf39) TXB1D3; +typedef union { + struct { + unsigned TXB1D30:1; + unsigned TXB1D31:1; + unsigned TXB1D32:1; + unsigned TXB1D33:1; + unsigned TXB1D34:1; + unsigned TXB1D35:1; + unsigned TXB1D36:1; + unsigned TXB1D37:1; + }; +} __TXB1D3bits_t; + +extern volatile __TXB1D3bits_t __at (0xf39) TXB1D3bits; + +extern __sfr __at (0xf3a) TXB1D4; +typedef union { + struct { + unsigned TXB1D40:1; + unsigned TXB1D41:1; + unsigned TXB1D42:1; + unsigned TXB1D43:1; + unsigned TXB1D44:1; + unsigned TXB1D45:1; + unsigned TXB1D46:1; + unsigned TXB1D47:1; + }; +} __TXB1D4bits_t; + +extern volatile __TXB1D4bits_t __at (0xf3a) TXB1D4bits; + +extern __sfr __at (0xf3b) TXB1D5; +typedef union { + struct { + unsigned TXB1D50:1; + unsigned TXB1D51:1; + unsigned TXB1D52:1; + unsigned TXB1D53:1; + unsigned TXB1D54:1; + unsigned TXB1D55:1; + unsigned TXB1D56:1; + unsigned TXB1D57:1; + }; +} __TXB1D5bits_t; + +extern volatile __TXB1D5bits_t __at (0xf3b) TXB1D5bits; + +extern __sfr __at (0xf3c) TXB1D6; +typedef union { + struct { + unsigned TXB1D60:1; + unsigned TXB1D61:1; + unsigned TXB1D62:1; + unsigned TXB1D63:1; + unsigned TXB1D64:1; + unsigned TXB1D65:1; + unsigned TXB1D66:1; + unsigned TXB1D67:1; + }; +} __TXB1D6bits_t; + +extern volatile __TXB1D6bits_t __at (0xf3c) TXB1D6bits; + +extern __sfr __at (0xf3d) TXB1D7; +typedef union { + struct { + unsigned TXB1D70:1; + unsigned TXB1D71:1; + unsigned TXB1D72:1; + unsigned TXB1D73:1; + unsigned TXB1D74:1; + unsigned TXB1D75:1; + unsigned TXB1D76:1; + unsigned TXB1D77:1; + }; +} __TXB1D7bits_t; + +extern volatile __TXB1D7bits_t __at (0xf3d) TXB1D7bits; + +extern __sfr __at (0xf3e) CANSTATRO3; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATRO3bits_t; + +extern volatile __CANSTATRO3bits_t __at (0xf3e) CANSTATRO3bits; + +extern __sfr __at (0xf40) TXB0CON; +typedef union { + struct { + unsigned TXPRI0:1; + unsigned TXPRI1:1; + unsigned :1; + unsigned TXREQ:1; + unsigned TXERR:1; + unsigned TXLARB:1; + unsigned TXABT:1; + unsigned :1; + }; +} __TXB0CONbits_t; + +extern volatile __TXB0CONbits_t __at (0xf40) TXB0CONbits; + +extern __sfr __at (0xf41) TXB0SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __TXB0SIDHbits_t; + +extern volatile __TXB0SIDHbits_t __at (0xf41) TXB0SIDHbits; + +extern __sfr __at (0xf42) TXB0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __TXB0SIDLbits_t; + +extern volatile __TXB0SIDLbits_t __at (0xf42) TXB0SIDLbits; + +extern __sfr __at (0xf43) TXB0EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __TXB0EIDHbits_t; + +extern volatile __TXB0EIDHbits_t __at (0xf43) TXB0EIDHbits; + +extern __sfr __at (0xf44) TXB0EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __TXB0EIDLbits_t; + +extern volatile __TXB0EIDLbits_t __at (0xf44) TXB0EIDLbits; + +extern __sfr __at (0xf45) TXB0DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned :1; + unsigned :1; + unsigned TXRTR:1; + unsigned :1; + }; +} __TXB0DLCbits_t; + +extern volatile __TXB0DLCbits_t __at (0xf45) TXB0DLCbits; + +extern __sfr __at (0xf46) TXB0D0; +typedef union { + struct { + unsigned TXB0D00:1; + unsigned TXB0D01:1; + unsigned TXB0D02:1; + unsigned TXB0D03:1; + unsigned TXB0D04:1; + unsigned TXB0D05:1; + unsigned TXB0D06:1; + unsigned TXB0D07:1; + }; +} __TXB0D0bits_t; + +extern volatile __TXB0D0bits_t __at (0xf46) TXB0D0bits; + +extern __sfr __at (0xf47) TXB0D1; +typedef union { + struct { + unsigned TXB0D10:1; + unsigned TXB0D11:1; + unsigned TXB0D12:1; + unsigned TXB0D13:1; + unsigned TXB0D14:1; + unsigned TXB0D15:1; + unsigned TXB0D16:1; + unsigned TXB0D17:1; + }; +} __TXB0D1bits_t; + +extern volatile __TXB0D1bits_t __at (0xf47) TXB0D1bits; + +extern __sfr __at (0xf48) TXB0D2; +typedef union { + struct { + unsigned TXB0D20:1; + unsigned TXB0D21:1; + unsigned TXB0D22:1; + unsigned TXB0D23:1; + unsigned TXB0D24:1; + unsigned TXB0D25:1; + unsigned TXB0D26:1; + unsigned TXB0D27:1; + }; +} __TXB0D2bits_t; + +extern volatile __TXB0D2bits_t __at (0xf48) TXB0D2bits; + +extern __sfr __at (0xf49) TXB0D3; +typedef union { + struct { + unsigned TXB0D30:1; + unsigned TXB0D31:1; + unsigned TXB0D32:1; + unsigned TXB0D33:1; + unsigned TXB0D34:1; + unsigned TXBD035:1; + unsigned TXBD0D36:1; + unsigned TXB0D37:1; + }; +} __TXB0D3bits_t; + +extern volatile __TXB0D3bits_t __at (0xf49) TXB0D3bits; + +extern __sfr __at (0xf4a) TXB0D4; +typedef union { + struct { + unsigned TXB0D40:1; + unsigned TXB0D41:1; + unsigned TXB0D42:1; + unsigned TXB0D43:1; + unsigned TXB0D44:1; + unsigned TXB0D45:1; + unsigned TXB0D46:1; + unsigned TXB0D47:1; + }; +} __TXB0D4bits_t; + +extern volatile __TXB0D4bits_t __at (0xf4a) TXB0D4bits; + +extern __sfr __at (0xf4b) TXB0D5; +typedef union { + struct { + unsigned TXB0D50:1; + unsigned TXB0D51:1; + unsigned TXB0D52:1; + unsigned TXB0D53:1; + unsigned TXB0D54:1; + unsigned TXB0D55:1; + unsigned TXB0D56:1; + unsigned TXB0D57:1; + }; +} __TXB0D5bits_t; + +extern volatile __TXB0D5bits_t __at (0xf4b) TXB0D5bits; + +extern __sfr __at (0xf4c) TXB0D6; +typedef union { + struct { + unsigned TXB0D60:1; + unsigned TXB0D61:1; + unsigned TXB0D62:1; + unsigned TXB0D63:1; + unsigned TXB0D64:1; + unsigned TXB0D65:1; + unsigned TXB0D66:1; + unsigned TXB0D67:1; + }; +} __TXB0D6bits_t; + +extern volatile __TXB0D6bits_t __at (0xf4c) TXB0D6bits; + +extern __sfr __at (0xf4d) TXB0D7; +typedef union { + struct { + unsigned TXB0D70:1; + unsigned TXB0D71:1; + unsigned TXB0D72:1; + unsigned TXB0D73:1; + unsigned TXB0D74:1; + unsigned TXB0D75:1; + unsigned TXB0D76:1; + unsigned TXB0D77:1; + }; +} __TXB0D7bits_t; + +extern volatile __TXB0D7bits_t __at (0xf4d) TXB0D7bits; + +extern __sfr __at (0xf4e) CANSTATRO2; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATRO2bits_t; + +extern volatile __CANSTATRO2bits_t __at (0xf4e) CANSTATRO2bits; + +extern __sfr __at (0xf50) RXB1CON; +typedef union { + struct { + unsigned FILHIT0:1; + unsigned FILHIT1:1; + unsigned FILHIT2:1; + unsigned RXRTRRO:1; + unsigned :1; + unsigned RXM0:1; + unsigned RXM1:1; + unsigned RXFUL:1; + }; +} __RXB1CONbits_t; + +extern volatile __RXB1CONbits_t __at (0xf50) RXB1CONbits; + +extern __sfr __at (0xf51) RXB1SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXB1SIDHbits_t; + +extern volatile __RXB1SIDHbits_t __at (0xf51) RXB1SIDHbits; + +extern __sfr __at (0xf52) RXB1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned SRR:1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXB1SIDLbits_t; + +extern volatile __RXB1SIDLbits_t __at (0xf52) RXB1SIDLbits; + +extern __sfr __at (0xf53) RXB1EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EID9:1; + unsigned EID10:1; + unsigned EID11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXB1EIDHbits_t; + +extern volatile __RXB1EIDHbits_t __at (0xf53) RXB1EIDHbits; + +extern __sfr __at (0xf54) RXB1EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXB1EIDLbits_t; + +extern volatile __RXB1EIDLbits_t __at (0xf54) RXB1EIDLbits; + +extern __sfr __at (0xf55) RXB1DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned RESB0:1; + unsigned RESB1:1; + unsigned RXRTR:1; + unsigned :1; + }; +} __RXB1DLCbits_t; + +extern volatile __RXB1DLCbits_t __at (0xf55) RXB1DLCbits; + +extern __sfr __at (0xf56) RXB1D0; +typedef union { + struct { + unsigned RXB1D00:1; + unsigned RXB1D01:1; + unsigned RXB1D02:1; + unsigned RXB1D03:1; + unsigned RXB1D04:1; + unsigned RXB1D05:1; + unsigned RXB1D06:1; + unsigned RXB1D07:1; + }; +} __RXB1D0bits_t; + +extern volatile __RXB1D0bits_t __at (0xf56) RXB1D0bits; + +extern __sfr __at (0xf57) RXB1D1; +typedef union { + struct { + unsigned RXB1D10:1; + unsigned RXB1D11:1; + unsigned RXB1D12:1; + unsigned RXB1D13:1; + unsigned RXB1D14:1; + unsigned RXB1D15:1; + unsigned RXB1D16:1; + unsigned RXB1D17:1; + }; +} __RXB1D1bits_t; + +extern volatile __RXB1D1bits_t __at (0xf57) RXB1D1bits; + +extern __sfr __at (0xf58) RXB1D2; +typedef union { + struct { + unsigned RXB1D20:1; + unsigned RXB1D21:1; + unsigned RXB1D22:1; + unsigned RXB1D23:1; + unsigned RXB1D24:1; + unsigned RXB1D25:1; + unsigned RXB1D26:1; + unsigned RXB1D27:1; + }; +} __RXB1D2bits_t; + +extern volatile __RXB1D2bits_t __at (0xf58) RXB1D2bits; + +extern __sfr __at (0xf59) RXB1D3; +typedef union { + struct { + unsigned RXB1D30:1; + unsigned RXB1D31:1; + unsigned RXB1D32:1; + unsigned RXB1D33:1; + unsigned RXB1D34:1; + unsigned RXB1D35:1; + unsigned RXB1D36:1; + unsigned RXB1D37:1; + }; +} __RXB1D3bits_t; + +extern volatile __RXB1D3bits_t __at (0xf59) RXB1D3bits; + +extern __sfr __at (0xf5a) RXB1D4; +typedef union { + struct { + unsigned RXB1D40:1; + unsigned RXB1D41:1; + unsigned RXB1D42:1; + unsigned RXB1D43:1; + unsigned RXB1D44:1; + unsigned RXB1D45:1; + unsigned RXB1D46:1; + unsigned RXB1D47:1; + }; +} __RXB1D4bits_t; + +extern volatile __RXB1D4bits_t __at (0xf5a) RXB1D4bits; + +extern __sfr __at (0xf5b) RXB1D5; +typedef union { + struct { + unsigned RXB1D50:1; + unsigned RXB1D51:1; + unsigned RXB1D52:1; + unsigned RXB1D53:1; + unsigned RXB1D54:1; + unsigned RXB1D55:1; + unsigned RXB1D56:1; + unsigned RXB1D57:1; + }; +} __RXB1D5bits_t; + +extern volatile __RXB1D5bits_t __at (0xf5b) RXB1D5bits; + +extern __sfr __at (0xf5c) RXB1D6; +typedef union { + struct { + unsigned RXB1D60:1; + unsigned RXB1D61:1; + unsigned RXB1D62:1; + unsigned RXB1D63:1; + unsigned RXB1D64:1; + unsigned RXB1D65:1; + unsigned RXB1D66:1; + unsigned RXB1D67:1; + }; +} __RXB1D6bits_t; + +extern volatile __RXB1D6bits_t __at (0xf5c) RXB1D6bits; + +extern __sfr __at (0xf5d) RXB1D7; +typedef union { + struct { + unsigned RXB1D70:1; + unsigned RXB1D71:1; + unsigned RXB1D72:1; + unsigned RXB1D73:1; + unsigned RXB1D74:1; + unsigned RXB1D75:1; + unsigned RXB1D76:1; + unsigned RXB1D77:1; + }; +} __RXB1D7bits_t; + +extern volatile __RXB1D7bits_t __at (0xf5d) RXB1D7bits; + +extern __sfr __at (0xf5e) CANSTATRO1; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATRO1bits_t; + +extern volatile __CANSTATRO1bits_t __at (0xf5e) CANSTATRO1bits; + +extern __sfr __at (0xf60) RXB0CON; +typedef union { + struct { + unsigned FILHIT0:1; + unsigned RXB0DBEN_R:1; + unsigned RXB0DBEN:1; + unsigned RXRTRR0:1; + unsigned :1; + unsigned RXM0:1; + unsigned RXM1:1; + unsigned RXFUL:1; + }; +} __RXB0CONbits_t; + +extern volatile __RXB0CONbits_t __at (0xf60) RXB0CONbits; + +extern __sfr __at (0xf61) RXB0SIDH; +typedef union { + struct { + unsigned SID3:1; + unsigned SID4:1; + unsigned SID5:1; + unsigned SID6:1; + unsigned SID7:1; + unsigned SID8:1; + unsigned SID9:1; + unsigned SID10:1; + }; +} __RXB0SIDHbits_t; + +extern volatile __RXB0SIDHbits_t __at (0xf61) RXB0SIDHbits; + +extern __sfr __at (0xf62) RXB0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXID:1; + unsigned SRR:1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXB0SIDLbits_t; + +extern volatile __RXB0SIDLbits_t __at (0xf62) RXB0SIDLbits; + +extern __sfr __at (0xf63) RXB0EIDH; +typedef union { + struct { + unsigned EID8:1; + unsigned EDI9:1; + unsigned EID10:1; + unsigned ED11:1; + unsigned EID12:1; + unsigned EID13:1; + unsigned EID14:1; + unsigned EID15:1; + }; +} __RXB0EIDHbits_t; + +extern volatile __RXB0EIDHbits_t __at (0xf63) RXB0EIDHbits; + +extern __sfr __at (0xf64) RXB0EIDL; +typedef union { + struct { + unsigned EID0:1; + unsigned EID1:1; + unsigned EID2:1; + unsigned EID3:1; + unsigned EID4:1; + unsigned EID5:1; + unsigned EID6:1; + unsigned EID7:1; + }; +} __RXB0EIDLbits_t; + +extern volatile __RXB0EIDLbits_t __at (0xf64) RXB0EIDLbits; + +extern __sfr __at (0xf65) RXB0DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned RESB0:1; + unsigned RESB1:1; + unsigned RTR:1; + unsigned :1; + }; +} __RXB0DLCbits_t; + +extern volatile __RXB0DLCbits_t __at (0xf65) RXB0DLCbits; + +extern __sfr __at (0xf66) RXB0D0; +extern __sfr __at (0xf67) RXB0D1; +extern __sfr __at (0xf68) RXB0D2; +extern __sfr __at (0xf69) RXB0D3; +extern __sfr __at (0xf6a) RXB0D4; +extern __sfr __at (0xf6b) RXB0D5; +extern __sfr __at (0xf6c) RXB0D6; +extern __sfr __at (0xf6d) RXB0D7; +extern __sfr __at (0xf6e) CANSTAT; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATbits_t; + +extern volatile __CANSTATbits_t __at (0xf6e) CANSTATbits; + +extern __sfr __at (0xf6f) CANCON; +typedef union { + struct { + unsigned WIN0:1; + unsigned WIN1:1; + unsigned WIN2:1; + unsigned WIN3:1; + unsigned ABAT:1; + unsigned REQOP0:1; + unsigned REQOP1:1; + unsigned REQOP2:1; + }; +} __CANCONbits_t; + +extern volatile __CANCONbits_t __at (0xf6f) CANCONbits; + +extern __sfr __at (0xf70) BRGCON1; +typedef union { + struct { + unsigned BRP0:1; + unsigned BRP1:1; + unsigned BRP2:1; + unsigned BRP3:1; + unsigned BRP4:1; + unsigned BRP5:1; + unsigned SJW0:1; + unsigned SJW1:1; + }; +} __BRGCON1bits_t; + +extern volatile __BRGCON1bits_t __at (0xf70) BRGCON1bits; + +extern __sfr __at (0xf71) BRGCON2; +typedef union { + struct { + unsigned PRSEG0:1; + unsigned PRSEG1:1; + unsigned PRSEG2:1; + unsigned SEG1PH0:1; + unsigned SEG1PH1:1; + unsigned SEG1PH2:1; + unsigned SAM:1; + unsigned SEG2PHTS:1; + }; +} __BRGCON2bits_t; + +extern volatile __BRGCON2bits_t __at (0xf71) BRGCON2bits; + +extern __sfr __at (0xf72) BRGCON3; +typedef union { + struct { + unsigned SEG2PH0:1; + unsigned SEG2PH1:1; + unsigned SEG2PH2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned WAKFIL:1; + unsigned :1; + }; +} __BRGCON3bits_t; + +extern volatile __BRGCON3bits_t __at (0xf72) BRGCON3bits; + +extern __sfr __at (0xf73) CIOCON; +typedef union { + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned CANCAP:1; + unsigned ENDRHI:1; + unsigned :1; + unsigned :1; + }; +} __CIOCONbits_t; + +extern volatile __CIOCONbits_t __at (0xf73) CIOCONbits; + +extern __sfr __at (0xf74) COMSTAT; +typedef union { + struct { + unsigned EWARN:1; + unsigned RXWARN:1; + unsigned TXWARN:1; + unsigned RXBP:1; + unsigned TXBP:1; + unsigned TXBO:1; + unsigned RXB1OVFL:1; + unsigned RXB0OVFL:1; + }; +} __COMSTATbits_t; + +extern volatile __COMSTATbits_t __at (0xf74) COMSTATbits; + +extern __sfr __at (0xf75) RXERRCNT; +typedef union { + struct { + unsigned REC0:1; + unsigned REC1:1; + unsigned REC2:1; + unsigned REC3:1; + unsigned REC4:1; + unsigned REC5:1; + unsigned REC6:1; + unsigned REC7:1; + }; +} __RXERRCNTbits_t; + +extern volatile __RXERRCNTbits_t __at (0xf75) RXERRCNTbits; + +extern __sfr __at (0xf76) TXERRCNT; +typedef union { + struct { + unsigned TEC0:1; + unsigned TEC1:1; + unsigned TEC2:1; + unsigned TEC3:1; + unsigned TEC4:1; + unsigned TEC5:1; + unsigned TEC6:1; + unsigned TEC7:1; + }; +} __TXERRCNTbits_t; + +extern volatile __TXERRCNTbits_t __at (0xf76) TXERRCNTbits; + +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned :1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned INT3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf83) PORTD; +typedef union { + struct { + unsigned RD0:1; + unsigned RD1:1; + unsigned RD2:1; + unsigned RD3:1; + unsigned RD4:1; + unsigned RD5:1; + unsigned RD6:1; + unsigned RD7:1; + }; + + struct { + unsigned AD0:1; + unsigned AD1:1; + unsigned AD2:1; + unsigned AD3:1; + unsigned AD4:1; + unsigned AD5:1; + unsigned AD6:1; + unsigned AD7:1; + }; +} __PORTDbits_t; + +extern volatile __PORTDbits_t __at (0xf83) PORTDbits; + +extern __sfr __at (0xf84) PORTE; +typedef union { + struct { + unsigned RE0:1; + unsigned RE1:1; + unsigned RE2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned ALE:1; + unsigned OE:1; + unsigned WRL:1; + unsigned WRH:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned CCP2:1; + }; + + struct { + unsigned AN5:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTEbits_t; + +extern volatile __PORTEbits_t __at (0xf84) PORTEbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf8c) LATD; +typedef union { + struct { + unsigned LATD0:1; + unsigned LATD1:1; + unsigned LATD2:1; + unsigned LATD3:1; + unsigned LATD4:1; + unsigned LATD5:1; + unsigned LATD6:1; + unsigned LATD7:1; + }; +} __LATDbits_t; + +extern volatile __LATDbits_t __at (0xf8c) LATDbits; + +extern __sfr __at (0xf8d) LATE; +typedef union { + struct { + unsigned LATE0:1; + unsigned LATE1:1; + unsigned LATE2:1; + unsigned LATE3:1; + unsigned LATE4:1; + unsigned LATE5:1; + unsigned LATE6:1; + unsigned LATE7:1; + }; +} __LATEbits_t; + +extern volatile __LATEbits_t __at (0xf8d) LATEbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf95) TRISD; +typedef union { + struct { + unsigned TRISD0:1; + unsigned TRISD1:1; + unsigned TRISD2:1; + unsigned TRISD3:1; + unsigned TRISD4:1; + unsigned TRISD5:1; + unsigned TRISD6:1; + unsigned TRISD7:1; + }; +} __TRISDbits_t; + +extern volatile __TRISDbits_t __at (0xf95) TRISDbits; + +extern __sfr __at (0xf96) TRISE; +typedef union { + struct { + unsigned TRISE0:1; + unsigned TRISE1:1; + unsigned TRISE2:1; + unsigned :1; + unsigned PSPMODE:1; + unsigned IBOV:1; + unsigned OBF:1; + unsigned IBF:1; + }; +} __TRISEbits_t; + +extern volatile __TRISEbits_t __at (0xf96) TRISEbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned CMIE:1; + unsigned :1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned CMIF:1; + unsigned :1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned CMIP:1; + unsigned :1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa3) PIE3; +typedef union { + struct { + unsigned RX0IE:1; + unsigned RX1IE:1; + unsigned TX0IE:1; + unsigned TX1IE:1; + unsigned TX2IE:1; + unsigned ERRIE:1; + unsigned WAKIE:1; + unsigned IVRE:1; + }; +} __PIE3bits_t; + +extern volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +extern __sfr __at (0xfa4) PIR3; +typedef union { + struct { + unsigned RX0IF:1; + unsigned RX1IF:1; + unsigned TX0IF:1; + unsigned TX1IF:1; + unsigned TX2IF:1; + unsigned ERRIF:1; + unsigned WAKIF:1; + unsigned IVRF:1; + }; +} __PIR3bits_t; + +extern volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +extern __sfr __at (0xfa5) IPR3; +typedef union { + struct { + unsigned RX0IP:1; + unsigned RX1IP:1; + unsigned TX0IP:1; + unsigned TX1IP:1; + unsigned TX2IP:1; + unsigned ERRIP:1; + unsigned WAKIP:1; + unsigned IVRP:1; + }; +} __IPR3bits_t; + +extern volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfab) RCSTA; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTAbits_t; + +extern volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +extern __sfr __at (0xfac) TXSTA; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTAbits_t; + +extern volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; +extern __sfr __at (0xfb0) PSPCON; +typedef union { + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned PSPMODE:1; + unsigned IBOV:1; + unsigned OBF:1; + unsigned IBF:1; + }; +} __PSPCONbits_t; + +extern volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfb4) CMCON; +typedef union { + struct { + unsigned CM0:1; + unsigned CM1:1; + unsigned CM2:1; + unsigned CIS:1; + unsigned C1INV:1; + unsigned C2INV:1; + unsigned C1OUT:1; + unsigned C2OUT:1; + }; +} __CMCONbits_t; + +extern volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +extern __sfr __at (0xfb5) CVRCON; +typedef union { + struct { + unsigned CVR0:1; + unsigned CVR1:1; + unsigned CVR2:1; + unsigned CVR3:1; + unsigned CVREF:1; + unsigned CVRR:1; + unsigned CVROE:1; + unsigned CVREN:1; + }; +} __CVRCONbits_t; + +extern volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +extern __sfr __at (0xfb6) ECCPAS; +typedef union { + struct { + unsigned PSSBD0:1; + unsigned PSSBD1:1; + unsigned PSSAC0:1; + unsigned PSSAC1:1; + unsigned ECCPAS0:1; + unsigned ECCPAS1:1; + unsigned ECCPAS2:1; + unsigned ECCPASE:1; + }; +} __ECCPASbits_t; + +extern volatile __ECCPASbits_t __at (0xfb6) ECCPASbits; + +extern __sfr __at (0xfb7) ECCP1DEL; +typedef union { + struct { + unsigned EPDC0:1; + unsigned EPDC1:1; + unsigned EPDC2:1; + unsigned EPDC3:1; + unsigned EPDC4:1; + unsigned EPDC5:1; + unsigned EPDC6:1; + unsigned EPDC7:1; + }; +} __ECCP1DELbits_t; + +extern volatile __ECCP1DELbits_t __at (0xfb7) ECCP1DELbits; + +extern __sfr __at (0xfba) ECCP1CON; +typedef union { + struct { + unsigned ECCP1M0:1; + unsigned ECCP1M1:1; + unsigned ECCP1M2:1; + unsigned ECCP1M3:1; + unsigned EDC1B0:1; + unsigned EDC1B1:1; + unsigned EPWM1M0:1; + unsigned EPWM1M1:1; + }; +} __ECCP1CONbits_t; + +extern volatile __ECCP1CONbits_t __at (0xfba) ECCP1CONbits; + +extern __sfr __at (0xfbb) ECCPR1L; +extern __sfr __at (0xfbc) ECCPR1H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DCCP1Y:1; + unsigned DCCP1X:1; + unsigned :1; + unsigned :1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned :1; + unsigned :1; + unsigned ADCS2:1; + unsigned ADFM:1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned :1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned ADCS0:1; + unsigned ADCS1:1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +typedef union { + struct { + unsigned T0PS0:1; + unsigned T0PS1:1; + unsigned T0PS2:1; + unsigned PSA:1; + unsigned T0SE:1; + unsigned T0CS:1; + unsigned T08BIT:1; + unsigned TMR0ON:1; + }; +} __T0CONbits_t; + +extern volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned :1; + unsigned :1; + unsigned INT1E:1; + unsigned :1; + unsigned :1; + unsigned INT1P:1; + unsigned :1; + }; + + struct { + unsigned INT1IF:1; + unsigned :1; + unsigned :1; + unsigned INT2IE:1; + unsigned :1; + unsigned :1; + unsigned INT1IP:1; + unsigned :1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned :1; + unsigned T0IP:1; + unsigned :1; + unsigned :1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */ +#define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */ +#define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */ +#define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */ +#define _OSC_RC_1H 0xFB /* RC */ +#define _OSC_HS_1H 0xFA /* HS */ +#define _OSC_XT_1H 0xF9 /* XT */ +#define _OSC_LP_1H 0xF8 /* LP */ + +/* Osc. Switch Enable 1H options */ +#define _OSCS_OFF_1H 0xFF /* Disabled */ +#define _OSCS_ON_1H 0xDF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_0V_2L 0xFF /* 2.0V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_OFF_2H 0xFE /* Disabled */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_128_2H 0xFF /* 1:128 */ +#define _WDTPS_1_64_2H 0xFD /* 1:64 */ +#define _WDTPS_1_32_2H 0xFB /* 1:32 */ +#define _WDTPS_1_16_2H 0xF9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xF7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xF5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xF3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xF1 /* 1:1 */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Code Protect 00200-01FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 02000-03FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Code Protect 04000-05FFF 5L options */ +#define _CP_2_OFF_5L 0xFF /* Disabled */ +#define _CP_2_ON_5L 0xFB /* Enabled */ + +/* Code Protect 06000-07FFF 5L options */ +#define _CP_3_OFF_5L 0xFF /* Disabled */ +#define _CP_3_ON_5L 0xF7 /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00200-01FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 02000-03FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Table Write Protect 04000-05FFF 6L options */ +#define _WRT_2_OFF_6L 0xFF /* Disabled */ +#define _WRT_2_ON_6L 0xFB /* Enabled */ + +/* Table Write Protect 06000-07FFF 6L options */ +#define _WRT_3_OFF_6L 0xFF /* Disabled */ +#define _WRT_3_ON_6L 0xF7 /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00200-01FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 02000-03FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect 04000-05FFF 7L options */ +#define _EBTR_2_OFF_7L 0xFF /* Disabled */ +#define _EBTR_2_ON_7L 0xFB /* Enabled */ + +/* Table Read Protect 06000-07FFF 7L options */ +#define _EBTR_3_OFF_7L 0xFF /* Disabled */ +#define _EBTR_3_ON_7L 0xF7 /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f4580.h b/device/include/pic16/pic18f4580.h new file mode 100644 index 0000000..78a4631 --- /dev/null +++ b/device/include/pic16/pic18f4580.h @@ -0,0 +1,6327 @@ +/* + * pic18f4580.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F4580_H__ +#define __PIC18F4580_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP oscillator +#define _OSC_XT_1H 0xF1 // XT oscillator +#define _OSC_HS_1H 0xF2 // HS oscillator +#define _OSC_RC_1H 0xF3 // External RC oscillator, CLKO function on RA6 +#define _OSC_EC_1H 0xF4 // EC oscillator, CLKO function on RA6 +#define _OSC_ECIO_1H 0xF5 // EC oscillator, port function on RA6 +#define _OSC_HSPLL_1H 0xF6 // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) +#define _OSC_RCIO_1H 0xF7 // External RC oscillator, port function on RA6 +#define _OSC_IRCIO67_1H 0xF8 // Internal oscillator block, port function on RA6 and RA7 +#define _OSC_IRCIO7_1H 0xF9 // Internal oscillator block, CLKO function on RA6, port function on RA7 +#define _FCMEN_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled +#define _FCMEN_ON_1H 0xFF // Fail-Safe Clock Monitor enabled +#define _IESO_OFF_1H 0x7F // Oscillator Switchover mode disabled +#define _IESO_ON_1H 0xFF // Oscillator Switchover mode enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // PWRT enabled +#define _PWRT_OFF_2L 0xFF // PWRT disabled +#define _BOREN_OFF_2L 0xF9 // Brown-out Reset disabled in hardware and software +#define _BOREN_SBORENCTRL_2L 0xFB // Brown-out Reset enabled and controlled by software (SBOREN is enabled) +#define _BOREN_BOACTIVE_2L 0xFD // Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) +#define _BOREN_BOHW_2L 0xFF // Brown-out Reset enabled in hardware only (SBOREN is disabled) +#define _BORV_0_2L 0xE7 // Maximum Setting +#define _BORV_1_2L 0xEF // +#define _BORV_2_2L 0xF7 // +#define _BORV_3_2L 0xFF // Minimum Setting + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit) +#define _WDT_ON_2H 0xFF // WDT enabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // RE3 input pin enabled; MCLR disabled +#define _MCLRE_ON_3H 0xFF // MCLR pin enabled; RE3 input pin disabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 configured for higher power operation +#define _LPT1OSC_ON_3H 0xFF // Timer1 configured for low-power operation +#define _PBADEN_OFF_3H 0xFD // PORTB<4> and PORTB<1:0> Configured as Digital I/O Pins on Reset +#define _PBADEN_ON_3H 0xFF // PORTB<4> and PORTB<1:0> Configured as Analog Pins on Reset + +// CONFIG4L Options +#define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug +#define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins +#define _XINST_OFF_4L 0xBF // Instruction set extension and Indexed Addressing mode disabled (Legacy mode) +#define _XINST_ON_4L 0xFF // Instruction set extension and Indexed Addressing mode enabled +#define _BBSIZ_1024_4L 0xEF // 1K words (2K bytes) Boot Block +#define _BBSIZ_2048_4L 0xFF // 2K words (4K bytes) Boot Block +#define _LVP_OFF_4L 0xFB // Single-Supply ICSP disabled +#define _LVP_ON_4L 0xFF // Single-Supply ICSP enabled +#define _STVREN_OFF_4L 0xFE // Stack full/underflow will not cause Reset +#define _STVREN_ON_4L 0xFF // Stack full/underflow will cause Reset + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Block 0 (000800-001FFFh) code-protected +#define _CP0_OFF_5L 0xFF // Block 0 (000800-001FFFh) not code-protected +#define _CP1_ON_5L 0xFD // Block 1 (002000-003FFFh) code-protected +#define _CP1_OFF_5L 0xFF // Block 1 (002000-003FFFh) not code-protected +#define _CP2_ON_5L 0xFB // Block 2 (004000-005FFFh) code-protected +#define _CP2_OFF_5L 0xFF // Block 2 (004000-005FFFh) not code-protected +#define _CP3_ON_5L 0xF7 // Block 3 (006000-007FFFh) code-protected +#define _CP3_OFF_5L 0xFF // Block 3 (006000-007FFFh) not code-protected + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Boot block (000000-0007FFh) code-protected +#define _CPB_OFF_5H 0xFF // Boot block (000000-0007FFh) not code-protected +#define _CPD_ON_5H 0x7F // Data EEPROM code-protected +#define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Block 0 (000800-001FFFh) write-protected +#define _WRT0_OFF_6L 0xFF // Block 0 (000800-001FFFh) not write-protected +#define _WRT1_ON_6L 0xFD // Block 1 (002000-003FFFh) write-protected +#define _WRT1_OFF_6L 0xFF // Block 1 (002000-003FFFh) not write-protected +#define _WRT2_ON_6L 0xFB // Block 2 (004000-005FFFh) write-protected +#define _WRT2_OFF_6L 0xFF // Block 2 (004000-005FFFh) not write-protected +#define _WRT3_ON_6L 0xF7 // Block 3 (006000-007FFFh) write-protected +#define _WRT3_OFF_6L 0xFF // Block 3 (006000-007FFFh) not write-protected + +// CONFIG6H Options +#define _WRTB_ON_6H 0xBF // Boot block (000000-0007FFh) write-protected +#define _WRTB_OFF_6H 0xFF // Boot block (000000-0007FFh) not write-protected +#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected +#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected +#define _WRTD_ON_6H 0x7F // Data EEPROM write-protected +#define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Block 0 (000800-001FFFh) protected from table reads executed in other blocks +#define _EBTR0_OFF_7L 0xFF // Block 0 (000800-001FFFh) not protected from table reads executed in other blocks +#define _EBTR1_ON_7L 0xFD // Block 1 (002000-003FFFh) protected from table reads executed in other blocks +#define _EBTR1_OFF_7L 0xFF // Block 1 (002000-003FFFh) not protected from table reads executed in other blocks +#define _EBTR2_ON_7L 0xFB // Block 2 (004000-005FFFh) protected from table reads executed in other blocks +#define _EBTR2_OFF_7L 0xFF // Block 2 (004000-005FFFh) not protected from table reads executed in other blocks +#define _EBTR3_ON_7L 0xF7 // Block 3 (006000-007FFFh) protected from table reads executed in other blocks +#define _EBTR3_OFF_7L 0xFF // Block 3 (006000-007FFFh) not protected from table reads executed in other blocks + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Boot block (000000-0007FFh) protected from table reads executed in other blocks +#define _EBTRB_OFF_7H 0xFF // Boot block (000000-0007FFh) not protected from table reads executed in other blocks +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xD60) RXF6SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF6SIDHbits_t; +extern volatile __RXF6SIDHbits_t __at (0xD60) RXF6SIDHbits; + +extern __sfr __at (0xD61) RXF6SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF6SIDLbits_t; +extern volatile __RXF6SIDLbits_t __at (0xD61) RXF6SIDLbits; + +extern __sfr __at (0xD62) RXF6EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF6EIDHbits_t; +extern volatile __RXF6EIDHbits_t __at (0xD62) RXF6EIDHbits; + +extern __sfr __at (0xD63) RXF6EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF6EIDLbits_t; +extern volatile __RXF6EIDLbits_t __at (0xD63) RXF6EIDLbits; + +extern __sfr __at (0xD64) RXF7SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF7SIDHbits_t; +extern volatile __RXF7SIDHbits_t __at (0xD64) RXF7SIDHbits; + +extern __sfr __at (0xD65) RXF7SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF7SIDLbits_t; +extern volatile __RXF7SIDLbits_t __at (0xD65) RXF7SIDLbits; + +extern __sfr __at (0xD66) RXF7EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF7EIDHbits_t; +extern volatile __RXF7EIDHbits_t __at (0xD66) RXF7EIDHbits; + +extern __sfr __at (0xD67) RXF7EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF7EIDLbits_t; +extern volatile __RXF7EIDLbits_t __at (0xD67) RXF7EIDLbits; + +extern __sfr __at (0xD68) RXF8SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF8SIDHbits_t; +extern volatile __RXF8SIDHbits_t __at (0xD68) RXF8SIDHbits; + +extern __sfr __at (0xD69) RXF8SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF8SIDLbits_t; +extern volatile __RXF8SIDLbits_t __at (0xD69) RXF8SIDLbits; + +extern __sfr __at (0xD6A) RXF8EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF8EIDHbits_t; +extern volatile __RXF8EIDHbits_t __at (0xD6A) RXF8EIDHbits; + +extern __sfr __at (0xD6B) RXF8EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF8EIDLbits_t; +extern volatile __RXF8EIDLbits_t __at (0xD6B) RXF8EIDLbits; + +extern __sfr __at (0xD70) RXF9SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF9SIDHbits_t; +extern volatile __RXF9SIDHbits_t __at (0xD70) RXF9SIDHbits; + +extern __sfr __at (0xD71) RXF9SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF9SIDLbits_t; +extern volatile __RXF9SIDLbits_t __at (0xD71) RXF9SIDLbits; + +extern __sfr __at (0xD72) RXF9EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF9EIDHbits_t; +extern volatile __RXF9EIDHbits_t __at (0xD72) RXF9EIDHbits; + +extern __sfr __at (0xD73) RXF9EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF9EIDLbits_t; +extern volatile __RXF9EIDLbits_t __at (0xD73) RXF9EIDLbits; + +extern __sfr __at (0xD74) RXF10SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF10SIDHbits_t; +extern volatile __RXF10SIDHbits_t __at (0xD74) RXF10SIDHbits; + +extern __sfr __at (0xD75) RXF10SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF10SIDLbits_t; +extern volatile __RXF10SIDLbits_t __at (0xD75) RXF10SIDLbits; + +extern __sfr __at (0xD76) RXF10EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF10EIDHbits_t; +extern volatile __RXF10EIDHbits_t __at (0xD76) RXF10EIDHbits; + +extern __sfr __at (0xD77) RXF10EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF10EIDLbits_t; +extern volatile __RXF10EIDLbits_t __at (0xD77) RXF10EIDLbits; + +extern __sfr __at (0xD78) RXF11SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF11SIDHbits_t; +extern volatile __RXF11SIDHbits_t __at (0xD78) RXF11SIDHbits; + +extern __sfr __at (0xD79) RXF11SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF11SIDLbits_t; +extern volatile __RXF11SIDLbits_t __at (0xD79) RXF11SIDLbits; + +extern __sfr __at (0xD7A) RXF11EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF11EIDHbits_t; +extern volatile __RXF11EIDHbits_t __at (0xD7A) RXF11EIDHbits; + +extern __sfr __at (0xD7B) RXF11EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF11EIDLbits_t; +extern volatile __RXF11EIDLbits_t __at (0xD7B) RXF11EIDLbits; + +extern __sfr __at (0xD80) RXF12SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF12SIDHbits_t; +extern volatile __RXF12SIDHbits_t __at (0xD80) RXF12SIDHbits; + +extern __sfr __at (0xD81) RXF12SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF12SIDLbits_t; +extern volatile __RXF12SIDLbits_t __at (0xD81) RXF12SIDLbits; + +extern __sfr __at (0xD82) RXF12EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF12EIDHbits_t; +extern volatile __RXF12EIDHbits_t __at (0xD82) RXF12EIDHbits; + +extern __sfr __at (0xD83) RXF12EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF12EIDLbits_t; +extern volatile __RXF12EIDLbits_t __at (0xD83) RXF12EIDLbits; + +extern __sfr __at (0xD84) RXF13SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF13SIDHbits_t; +extern volatile __RXF13SIDHbits_t __at (0xD84) RXF13SIDHbits; + +extern __sfr __at (0xD85) RXF13SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF13SIDLbits_t; +extern volatile __RXF13SIDLbits_t __at (0xD85) RXF13SIDLbits; + +extern __sfr __at (0xD86) RXF13EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF13EIDHbits_t; +extern volatile __RXF13EIDHbits_t __at (0xD86) RXF13EIDHbits; + +extern __sfr __at (0xD87) RXF13EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF13EIDLbits_t; +extern volatile __RXF13EIDLbits_t __at (0xD87) RXF13EIDLbits; + +extern __sfr __at (0xD88) RXF14SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF14SIDHbits_t; +extern volatile __RXF14SIDHbits_t __at (0xD88) RXF14SIDHbits; + +extern __sfr __at (0xD89) RXF14SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF14SIDLbits_t; +extern volatile __RXF14SIDLbits_t __at (0xD89) RXF14SIDLbits; + +extern __sfr __at (0xD8A) RXF14EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF14EIDHbits_t; +extern volatile __RXF14EIDHbits_t __at (0xD8A) RXF14EIDHbits; + +extern __sfr __at (0xD8B) RXF14EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF14EIDLbits_t; +extern volatile __RXF14EIDLbits_t __at (0xD8B) RXF14EIDLbits; + +extern __sfr __at (0xD90) RXF15SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF15SIDHbits_t; +extern volatile __RXF15SIDHbits_t __at (0xD90) RXF15SIDHbits; + +extern __sfr __at (0xD91) RXF15SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF15SIDLbits_t; +extern volatile __RXF15SIDLbits_t __at (0xD91) RXF15SIDLbits; + +extern __sfr __at (0xD92) RXF15EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF15EIDHbits_t; +extern volatile __RXF15EIDHbits_t __at (0xD92) RXF15EIDHbits; + +extern __sfr __at (0xD93) RXF15EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF15EIDLbits_t; +extern volatile __RXF15EIDLbits_t __at (0xD93) RXF15EIDLbits; + +extern __sfr __at (0xDD4) RXFCON0; +typedef union { + struct { + unsigned RXF0EN : 1; + unsigned RXF1EN : 1; + unsigned RXF2EN : 1; + unsigned RXF3EN : 1; + unsigned RXF4EN : 1; + unsigned RXF5EN : 1; + unsigned RXF6EN : 1; + unsigned RXF7EN : 1; + }; +} __RXFCON0bits_t; +extern volatile __RXFCON0bits_t __at (0xDD4) RXFCON0bits; + +extern __sfr __at (0xDD5) RXFCON1; +typedef union { + struct { + unsigned RXF8EN : 1; + unsigned RXF9EN : 1; + unsigned RXF10EN : 1; + unsigned RXF11EN : 1; + unsigned RXF12EN : 1; + unsigned RXF13EN : 1; + unsigned RXF14EN : 1; + unsigned RXF15EN : 1; + }; +} __RXFCON1bits_t; +extern volatile __RXFCON1bits_t __at (0xDD5) RXFCON1bits; + +extern __sfr __at (0xDD8) SDFLC; +typedef union { + struct { + unsigned DFLC0 : 1; + unsigned DFLC1 : 1; + unsigned DFLC2 : 1; + unsigned DFLC3 : 1; + unsigned DFLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FLC0 : 1; + unsigned FLC1 : 1; + unsigned FLC2 : 1; + unsigned FLC3 : 1; + unsigned FLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SDFLCbits_t; +extern volatile __SDFLCbits_t __at (0xDD8) SDFLCbits; + +extern __sfr __at (0xDE0) RXFBCON0; +typedef union { + struct { + unsigned F0BP_0 : 1; + unsigned F0BP_1 : 1; + unsigned F0BP_2 : 1; + unsigned F0BP_3 : 1; + unsigned F1BP_0 : 1; + unsigned F1BP_1 : 1; + unsigned F1BP_2 : 1; + unsigned F1BP_3 : 1; + }; +} __RXFBCON0bits_t; +extern volatile __RXFBCON0bits_t __at (0xDE0) RXFBCON0bits; + +extern __sfr __at (0xDE1) RXFBCON1; +typedef union { + struct { + unsigned F2BP_0 : 1; + unsigned F2BP_1 : 1; + unsigned F2BP_2 : 1; + unsigned F2BP_3 : 1; + unsigned F3BP_0 : 1; + unsigned F3BP_1 : 1; + unsigned F3BP_2 : 1; + unsigned F3BP_3 : 1; + }; +} __RXFBCON1bits_t; +extern volatile __RXFBCON1bits_t __at (0xDE1) RXFBCON1bits; + +extern __sfr __at (0xDE2) RXFBCON2; +typedef union { + struct { + unsigned F4BP_0 : 1; + unsigned F4BP_1 : 1; + unsigned F4BP_2 : 1; + unsigned F4BP_3 : 1; + unsigned F5BP_0 : 1; + unsigned F5BP_1 : 1; + unsigned F5BP_2 : 1; + unsigned F5BP_3 : 1; + }; +} __RXFBCON2bits_t; +extern volatile __RXFBCON2bits_t __at (0xDE2) RXFBCON2bits; + +extern __sfr __at (0xDE3) RXFBCON3; +typedef union { + struct { + unsigned F6BP_0 : 1; + unsigned F6BP_1 : 1; + unsigned F6BP_2 : 1; + unsigned F6BP_3 : 1; + unsigned F7BP_0 : 1; + unsigned F7BP_1 : 1; + unsigned F7BP_2 : 1; + unsigned F7BP_3 : 1; + }; +} __RXFBCON3bits_t; +extern volatile __RXFBCON3bits_t __at (0xDE3) RXFBCON3bits; + +extern __sfr __at (0xDE4) RXFBCON4; +typedef union { + struct { + unsigned F8BP_0 : 1; + unsigned F8BP_1 : 1; + unsigned F8BP_2 : 1; + unsigned F8BP_3 : 1; + unsigned F9BP_0 : 1; + unsigned F9BP_1 : 1; + unsigned F9BP_2 : 1; + unsigned F9BP_3 : 1; + }; +} __RXFBCON4bits_t; +extern volatile __RXFBCON4bits_t __at (0xDE4) RXFBCON4bits; + +extern __sfr __at (0xDE5) RXFBCON5; +typedef union { + struct { + unsigned F10BP_0 : 1; + unsigned F10BP_1 : 1; + unsigned F10BP_2 : 1; + unsigned F10BP_3 : 1; + unsigned F11BP_0 : 1; + unsigned F11BP_1 : 1; + unsigned F11BP_2 : 1; + unsigned F11BP_3 : 1; + }; +} __RXFBCON5bits_t; +extern volatile __RXFBCON5bits_t __at (0xDE5) RXFBCON5bits; + +extern __sfr __at (0xDE6) RXFBCON6; +typedef union { + struct { + unsigned F12BP_0 : 1; + unsigned F12BP_1 : 1; + unsigned F12BP_2 : 1; + unsigned F12BP_3 : 1; + unsigned F13BP_0 : 1; + unsigned F13BP_1 : 1; + unsigned F13BP_2 : 1; + unsigned F13BP_3 : 1; + }; +} __RXFBCON6bits_t; +extern volatile __RXFBCON6bits_t __at (0xDE6) RXFBCON6bits; + +extern __sfr __at (0xDE7) RXFBCON7; +typedef union { + struct { + unsigned F14BP_0 : 1; + unsigned F14BP_1 : 1; + unsigned F14BP_2 : 1; + unsigned F14BP_3 : 1; + unsigned F15BP_0 : 1; + unsigned F15BP_1 : 1; + unsigned F15BP_2 : 1; + unsigned F15BP_3 : 1; + }; +} __RXFBCON7bits_t; +extern volatile __RXFBCON7bits_t __at (0xDE7) RXFBCON7bits; + +extern __sfr __at (0xDF0) MSEL0; +typedef union { + struct { + unsigned FIL0_0 : 1; + unsigned FIL0_1 : 1; + unsigned FIL1_0 : 1; + unsigned FIL1_1 : 1; + unsigned FIL2_0 : 1; + unsigned FIL2_1 : 1; + unsigned FIL3_0 : 1; + unsigned FIL3_1 : 1; + }; +} __MSEL0bits_t; +extern volatile __MSEL0bits_t __at (0xDF0) MSEL0bits; + +extern __sfr __at (0xDF1) MSEL1; +typedef union { + struct { + unsigned FIL4_0 : 1; + unsigned FIL4_1 : 1; + unsigned FIL5_0 : 1; + unsigned FIL5_1 : 1; + unsigned FIL6_0 : 1; + unsigned FIL6_1 : 1; + unsigned FIL7_0 : 1; + unsigned FIL7_1 : 1; + }; +} __MSEL1bits_t; +extern volatile __MSEL1bits_t __at (0xDF1) MSEL1bits; + +extern __sfr __at (0xDF2) MSEL2; +typedef union { + struct { + unsigned FIL8_0 : 1; + unsigned FIL8_1 : 1; + unsigned FIL9_0 : 1; + unsigned FIL9_1 : 1; + unsigned FIL10_0 : 1; + unsigned FIL10_1 : 1; + unsigned FIL11_0 : 1; + unsigned FIL11_1 : 1; + }; +} __MSEL2bits_t; +extern volatile __MSEL2bits_t __at (0xDF2) MSEL2bits; + +extern __sfr __at (0xDF3) MSEL3; +typedef union { + struct { + unsigned FIL12_0 : 1; + unsigned FIL12_1 : 1; + unsigned FIL13_0 : 1; + unsigned FIL13_1 : 1; + unsigned FIL14_0 : 1; + unsigned FIL14_1 : 1; + unsigned FIL15_0 : 1; + unsigned FIL15_1 : 1; + }; +} __MSEL3bits_t; +extern volatile __MSEL3bits_t __at (0xDF3) MSEL3bits; + +extern __sfr __at (0xDF8) BSEL0; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned B0TXEN : 1; + unsigned B1TXEN : 1; + unsigned B2TXEN : 1; + unsigned B3TXEN : 1; + unsigned B4TXEN : 1; + unsigned B5TXEN : 1; + }; +} __BSEL0bits_t; +extern volatile __BSEL0bits_t __at (0xDF8) BSEL0bits; + +extern __sfr __at (0xDFA) BIE0; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned B0IE : 1; + unsigned B1IE : 1; + unsigned B2IE : 1; + unsigned B3IE : 1; + unsigned B4IE : 1; + unsigned B5IE : 1; + }; +} __BIE0bits_t; +extern volatile __BIE0bits_t __at (0xDFA) BIE0bits; + +extern __sfr __at (0xDFC) TXBIE; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TXBIEbits_t; +extern volatile __TXBIEbits_t __at (0xDFC) TXBIEbits; + +extern __sfr __at (0xE20) B0CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B0CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0CONbits_t; +extern volatile __B0CONbits_t __at (0xE20) B0CONbits; + +extern __sfr __at (0xE21) B0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B0SIDHbits_t; +extern volatile __B0SIDHbits_t __at (0xE21) B0SIDHbits; + +extern __sfr __at (0xE22) B0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0SIDLbits_t; +extern volatile __B0SIDLbits_t __at (0xE22) B0SIDLbits; + +extern __sfr __at (0xE23) B0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B0EIDHbits_t; +extern volatile __B0EIDHbits_t __at (0xE23) B0EIDHbits; + +extern __sfr __at (0xE24) B0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B0EIDLbits_t; +extern volatile __B0EIDLbits_t __at (0xE24) B0EIDLbits; + +extern __sfr __at (0xE25) B0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B0DLC : 1; + unsigned RB1_B0DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B0DLCbits_t; +extern volatile __B0DLCbits_t __at (0xE25) B0DLCbits; + +extern __sfr __at (0xE26) B0D0; +typedef union { + struct { + unsigned B0D00 : 1; + unsigned B0D01 : 1; + unsigned B0D02 : 1; + unsigned B0D03 : 1; + unsigned B0D04 : 1; + unsigned B0D05 : 1; + unsigned B0D06 : 1; + unsigned B0D07 : 1; + }; +} __B0D0bits_t; +extern volatile __B0D0bits_t __at (0xE26) B0D0bits; + +extern __sfr __at (0xE27) B0D1; +typedef union { + struct { + unsigned B0D10 : 1; + unsigned B0D11 : 1; + unsigned B0D12 : 1; + unsigned B0D13 : 1; + unsigned B0D14 : 1; + unsigned B0D15 : 1; + unsigned B0D16 : 1; + unsigned B0D17 : 1; + }; +} __B0D1bits_t; +extern volatile __B0D1bits_t __at (0xE27) B0D1bits; + +extern __sfr __at (0xE28) B0D2; +typedef union { + struct { + unsigned B0D20 : 1; + unsigned B0D21 : 1; + unsigned B0D22 : 1; + unsigned B0D23 : 1; + unsigned B0D24 : 1; + unsigned B0D25 : 1; + unsigned B0D26 : 1; + unsigned B0D27 : 1; + }; +} __B0D2bits_t; +extern volatile __B0D2bits_t __at (0xE28) B0D2bits; + +extern __sfr __at (0xE29) B0D3; +typedef union { + struct { + unsigned B0D30 : 1; + unsigned B0D31 : 1; + unsigned B0D32 : 1; + unsigned B0D33 : 1; + unsigned B0D34 : 1; + unsigned B0D35 : 1; + unsigned B0D36 : 1; + unsigned B0D37 : 1; + }; +} __B0D3bits_t; +extern volatile __B0D3bits_t __at (0xE29) B0D3bits; + +extern __sfr __at (0xE2A) B0D4; +typedef union { + struct { + unsigned B0D40 : 1; + unsigned B0D41 : 1; + unsigned B0D42 : 1; + unsigned B0D43 : 1; + unsigned B0D44 : 1; + unsigned B0D45 : 1; + unsigned B0D46 : 1; + unsigned B0D47 : 1; + }; +} __B0D4bits_t; +extern volatile __B0D4bits_t __at (0xE2A) B0D4bits; + +extern __sfr __at (0xE2B) B0D5; +typedef union { + struct { + unsigned B0D50 : 1; + unsigned B0D51 : 1; + unsigned B0D52 : 1; + unsigned B0D53 : 1; + unsigned B0D54 : 1; + unsigned B0D55 : 1; + unsigned B0D56 : 1; + unsigned B0D57 : 1; + }; +} __B0D5bits_t; +extern volatile __B0D5bits_t __at (0xE2B) B0D5bits; + +extern __sfr __at (0xE2C) B0D6; +typedef union { + struct { + unsigned B0D60 : 1; + unsigned B0D61 : 1; + unsigned B0D62 : 1; + unsigned B0D63 : 1; + unsigned B0D64 : 1; + unsigned B0D65 : 1; + unsigned B0D66 : 1; + unsigned B0D67 : 1; + }; +} __B0D6bits_t; +extern volatile __B0D6bits_t __at (0xE2C) B0D6bits; + +extern __sfr __at (0xE2D) B0D7; +typedef union { + struct { + unsigned B0D70 : 1; + unsigned B0D71 : 1; + unsigned B0D72 : 1; + unsigned B0D73 : 1; + unsigned B0D74 : 1; + unsigned B0D75 : 1; + unsigned B0D76 : 1; + unsigned B0D77 : 1; + }; +} __B0D7bits_t; +extern volatile __B0D7bits_t __at (0xE2D) B0D7bits; + +extern __sfr __at (0xE2E) CANSTAT_RO9; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO9bits_t; +extern volatile __CANSTAT_RO9bits_t __at (0xE2E) CANSTAT_RO9bits; + +extern __sfr __at (0xE2F) CANCON_RO9; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO9bits_t; +extern volatile __CANCON_RO9bits_t __at (0xE2F) CANCON_RO9bits; + +extern __sfr __at (0xE30) B1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B1CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1CONbits_t; +extern volatile __B1CONbits_t __at (0xE30) B1CONbits; + +extern __sfr __at (0xE31) B1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B1SIDHbits_t; +extern volatile __B1SIDHbits_t __at (0xE31) B1SIDHbits; + +extern __sfr __at (0xE32) B1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1SIDLbits_t; +extern volatile __B1SIDLbits_t __at (0xE32) B1SIDLbits; + +extern __sfr __at (0xE33) B1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B1EIDHbits_t; +extern volatile __B1EIDHbits_t __at (0xE33) B1EIDHbits; + +extern __sfr __at (0xE34) B1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B1EIDLbits_t; +extern volatile __B1EIDLbits_t __at (0xE34) B1EIDLbits; + +extern __sfr __at (0xE35) B1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B1DLC : 1; + unsigned RB1_B1DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B1DLCbits_t; +extern volatile __B1DLCbits_t __at (0xE35) B1DLCbits; + +extern __sfr __at (0xE36) B1D0; +typedef union { + struct { + unsigned B1D00 : 1; + unsigned B1D01 : 1; + unsigned B1D02 : 1; + unsigned B1D03 : 1; + unsigned B1D04 : 1; + unsigned B1D05 : 1; + unsigned B1D06 : 1; + unsigned B1D07 : 1; + }; +} __B1D0bits_t; +extern volatile __B1D0bits_t __at (0xE36) B1D0bits; + +extern __sfr __at (0xE37) B1D1; +typedef union { + struct { + unsigned B1D10 : 1; + unsigned B1D11 : 1; + unsigned B1D12 : 1; + unsigned B1D13 : 1; + unsigned B1D14 : 1; + unsigned B1D15 : 1; + unsigned B1D16 : 1; + unsigned B1D17 : 1; + }; +} __B1D1bits_t; +extern volatile __B1D1bits_t __at (0xE37) B1D1bits; + +extern __sfr __at (0xE38) B1D2; +typedef union { + struct { + unsigned B1D20 : 1; + unsigned B1D21 : 1; + unsigned B1D22 : 1; + unsigned B1D23 : 1; + unsigned B1D24 : 1; + unsigned B1D25 : 1; + unsigned B1D26 : 1; + unsigned B1D27 : 1; + }; +} __B1D2bits_t; +extern volatile __B1D2bits_t __at (0xE38) B1D2bits; + +extern __sfr __at (0xE39) B1D3; +typedef union { + struct { + unsigned B1D30 : 1; + unsigned B1D31 : 1; + unsigned B1D32 : 1; + unsigned B1D33 : 1; + unsigned B1D34 : 1; + unsigned B1D35 : 1; + unsigned B1D36 : 1; + unsigned B1D37 : 1; + }; +} __B1D3bits_t; +extern volatile __B1D3bits_t __at (0xE39) B1D3bits; + +extern __sfr __at (0xE3A) B1D4; +typedef union { + struct { + unsigned B1D40 : 1; + unsigned B1D41 : 1; + unsigned B1D42 : 1; + unsigned B1D43 : 1; + unsigned B1D44 : 1; + unsigned B1D45 : 1; + unsigned B1D46 : 1; + unsigned B1D47 : 1; + }; +} __B1D4bits_t; +extern volatile __B1D4bits_t __at (0xE3A) B1D4bits; + +extern __sfr __at (0xE3B) B1D5; +typedef union { + struct { + unsigned B1D50 : 1; + unsigned B1D51 : 1; + unsigned B1D52 : 1; + unsigned B1D53 : 1; + unsigned B1D54 : 1; + unsigned B1D55 : 1; + unsigned B1D56 : 1; + unsigned B1D57 : 1; + }; +} __B1D5bits_t; +extern volatile __B1D5bits_t __at (0xE3B) B1D5bits; + +extern __sfr __at (0xE3C) B1D6; +typedef union { + struct { + unsigned B1D60 : 1; + unsigned B1D61 : 1; + unsigned B1D62 : 1; + unsigned B1D63 : 1; + unsigned B1D64 : 1; + unsigned B1D65 : 1; + unsigned B1D66 : 1; + unsigned B1D67 : 1; + }; +} __B1D6bits_t; +extern volatile __B1D6bits_t __at (0xE3C) B1D6bits; + +extern __sfr __at (0xE3D) B1D7; +typedef union { + struct { + unsigned B1D70 : 1; + unsigned B1D71 : 1; + unsigned B1D72 : 1; + unsigned B1D73 : 1; + unsigned B1D74 : 1; + unsigned B1D75 : 1; + unsigned B1D76 : 1; + unsigned B1D77 : 1; + }; +} __B1D7bits_t; +extern volatile __B1D7bits_t __at (0xE3D) B1D7bits; + +extern __sfr __at (0xE3E) CANSTAT_RO8; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO8bits_t; +extern volatile __CANSTAT_RO8bits_t __at (0xE3E) CANSTAT_RO8bits; + +extern __sfr __at (0xE3F) CANCON_RO8; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO8bits_t; +extern volatile __CANCON_RO8bits_t __at (0xE3F) CANCON_RO8bits; + +extern __sfr __at (0xE40) B2CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B2CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2CONbits_t; +extern volatile __B2CONbits_t __at (0xE40) B2CONbits; + +extern __sfr __at (0xE41) B2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B2SIDHbits_t; +extern volatile __B2SIDHbits_t __at (0xE41) B2SIDHbits; + +extern __sfr __at (0xE42) B2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2SIDLbits_t; +extern volatile __B2SIDLbits_t __at (0xE42) B2SIDLbits; + +extern __sfr __at (0xE43) B2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B2EIDHbits_t; +extern volatile __B2EIDHbits_t __at (0xE43) B2EIDHbits; + +extern __sfr __at (0xE44) B2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B2EIDLbits_t; +extern volatile __B2EIDLbits_t __at (0xE44) B2EIDLbits; + +extern __sfr __at (0xE45) B2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B2DLC : 1; + unsigned RB1_B2DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B2DLCbits_t; +extern volatile __B2DLCbits_t __at (0xE45) B2DLCbits; + +extern __sfr __at (0xE46) B2D0; +typedef union { + struct { + unsigned B2D00 : 1; + unsigned B2D01 : 1; + unsigned B2D02 : 1; + unsigned B2D03 : 1; + unsigned B2D04 : 1; + unsigned B2D05 : 1; + unsigned B2D06 : 1; + unsigned B2D07 : 1; + }; +} __B2D0bits_t; +extern volatile __B2D0bits_t __at (0xE46) B2D0bits; + +extern __sfr __at (0xE47) B2D1; +typedef union { + struct { + unsigned B2D10 : 1; + unsigned B2D11 : 1; + unsigned B2D12 : 1; + unsigned B2D13 : 1; + unsigned B2D14 : 1; + unsigned B2D15 : 1; + unsigned B2D16 : 1; + unsigned B2D17 : 1; + }; +} __B2D1bits_t; +extern volatile __B2D1bits_t __at (0xE47) B2D1bits; + +extern __sfr __at (0xE48) B2D2; +typedef union { + struct { + unsigned B2D20 : 1; + unsigned B2D21 : 1; + unsigned B2D22 : 1; + unsigned B2D23 : 1; + unsigned B2D24 : 1; + unsigned B2D25 : 1; + unsigned B2D26 : 1; + unsigned B2D27 : 1; + }; +} __B2D2bits_t; +extern volatile __B2D2bits_t __at (0xE48) B2D2bits; + +extern __sfr __at (0xE49) B2D3; +typedef union { + struct { + unsigned B2D30 : 1; + unsigned B2D31 : 1; + unsigned B2D32 : 1; + unsigned B2D33 : 1; + unsigned B2D34 : 1; + unsigned B2D35 : 1; + unsigned B2D36 : 1; + unsigned B2D37 : 1; + }; +} __B2D3bits_t; +extern volatile __B2D3bits_t __at (0xE49) B2D3bits; + +extern __sfr __at (0xE4A) B2D4; +typedef union { + struct { + unsigned B2D40 : 1; + unsigned B2D41 : 1; + unsigned B2D42 : 1; + unsigned B2D43 : 1; + unsigned B2D44 : 1; + unsigned B2D45 : 1; + unsigned B2D46 : 1; + unsigned B2D47 : 1; + }; +} __B2D4bits_t; +extern volatile __B2D4bits_t __at (0xE4A) B2D4bits; + +extern __sfr __at (0xE4B) B2D5; +typedef union { + struct { + unsigned B2D50 : 1; + unsigned B2D51 : 1; + unsigned B2D52 : 1; + unsigned B2D53 : 1; + unsigned B2D54 : 1; + unsigned B2D55 : 1; + unsigned B2D56 : 1; + unsigned B2D57 : 1; + }; +} __B2D5bits_t; +extern volatile __B2D5bits_t __at (0xE4B) B2D5bits; + +extern __sfr __at (0xE4C) B2D6; +typedef union { + struct { + unsigned B2D60 : 1; + unsigned B2D61 : 1; + unsigned B2D62 : 1; + unsigned B2D63 : 1; + unsigned B2D64 : 1; + unsigned B2D65 : 1; + unsigned B2D66 : 1; + unsigned B2D67 : 1; + }; +} __B2D6bits_t; +extern volatile __B2D6bits_t __at (0xE4C) B2D6bits; + +extern __sfr __at (0xE4D) B2D7; +typedef union { + struct { + unsigned B2D70 : 1; + unsigned B2D71 : 1; + unsigned B2D72 : 1; + unsigned B2D73 : 1; + unsigned B2D74 : 1; + unsigned B2D75 : 1; + unsigned B2D76 : 1; + unsigned B2D77 : 1; + }; +} __B2D7bits_t; +extern volatile __B2D7bits_t __at (0xE4D) B2D7bits; + +extern __sfr __at (0xE4E) CANSTAT_RO7; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO7bits_t; +extern volatile __CANSTAT_RO7bits_t __at (0xE4E) CANSTAT_RO7bits; + +extern __sfr __at (0xE4F) CANCON_RO7; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO7bits_t; +extern volatile __CANCON_RO7bits_t __at (0xE4F) CANCON_RO7bits; + +extern __sfr __at (0xE50) B3CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B3CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3CONbits_t; +extern volatile __B3CONbits_t __at (0xE50) B3CONbits; + +extern __sfr __at (0xE51) B3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B3SIDHbits_t; +extern volatile __B3SIDHbits_t __at (0xE51) B3SIDHbits; + +extern __sfr __at (0xE52) B3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3SIDLbits_t; +extern volatile __B3SIDLbits_t __at (0xE52) B3SIDLbits; + +extern __sfr __at (0xE53) B3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B3EIDHbits_t; +extern volatile __B3EIDHbits_t __at (0xE53) B3EIDHbits; + +extern __sfr __at (0xE54) B3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B3EIDLbits_t; +extern volatile __B3EIDLbits_t __at (0xE54) B3EIDLbits; + +extern __sfr __at (0xE55) B3DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B3DLC : 1; + unsigned RB1_B3DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B3DLCbits_t; +extern volatile __B3DLCbits_t __at (0xE55) B3DLCbits; + +extern __sfr __at (0xE56) B3D0; +typedef union { + struct { + unsigned B3D00 : 1; + unsigned B3D01 : 1; + unsigned B3D02 : 1; + unsigned B3D03 : 1; + unsigned B3D04 : 1; + unsigned B3D05 : 1; + unsigned B3D06 : 1; + unsigned B3D07 : 1; + }; +} __B3D0bits_t; +extern volatile __B3D0bits_t __at (0xE56) B3D0bits; + +extern __sfr __at (0xE57) B3D1; +typedef union { + struct { + unsigned B3D10 : 1; + unsigned B3D11 : 1; + unsigned B3D12 : 1; + unsigned B3D13 : 1; + unsigned B3D14 : 1; + unsigned B3D15 : 1; + unsigned B3D16 : 1; + unsigned B3D17 : 1; + }; +} __B3D1bits_t; +extern volatile __B3D1bits_t __at (0xE57) B3D1bits; + +extern __sfr __at (0xE58) B3D2; +typedef union { + struct { + unsigned B3D20 : 1; + unsigned B3D21 : 1; + unsigned B3D22 : 1; + unsigned B3D23 : 1; + unsigned B3D24 : 1; + unsigned B3D25 : 1; + unsigned B3D26 : 1; + unsigned B3D27 : 1; + }; +} __B3D2bits_t; +extern volatile __B3D2bits_t __at (0xE58) B3D2bits; + +extern __sfr __at (0xE59) B3D3; +typedef union { + struct { + unsigned B3D30 : 1; + unsigned B3D31 : 1; + unsigned B3D32 : 1; + unsigned B3D33 : 1; + unsigned B3D34 : 1; + unsigned B3D35 : 1; + unsigned B3D36 : 1; + unsigned B3D37 : 1; + }; +} __B3D3bits_t; +extern volatile __B3D3bits_t __at (0xE59) B3D3bits; + +extern __sfr __at (0xE5A) B3D4; +typedef union { + struct { + unsigned B3D40 : 1; + unsigned B3D41 : 1; + unsigned B3D42 : 1; + unsigned B3D43 : 1; + unsigned B3D44 : 1; + unsigned B3D45 : 1; + unsigned B3D46 : 1; + unsigned B3D47 : 1; + }; +} __B3D4bits_t; +extern volatile __B3D4bits_t __at (0xE5A) B3D4bits; + +extern __sfr __at (0xE5B) B3D5; +typedef union { + struct { + unsigned B3D50 : 1; + unsigned B3D51 : 1; + unsigned B3D52 : 1; + unsigned B3D53 : 1; + unsigned B3D54 : 1; + unsigned B3D55 : 1; + unsigned B3D56 : 1; + unsigned B3D57 : 1; + }; +} __B3D5bits_t; +extern volatile __B3D5bits_t __at (0xE5B) B3D5bits; + +extern __sfr __at (0xE5C) B3D6; +typedef union { + struct { + unsigned B3D60 : 1; + unsigned B3D61 : 1; + unsigned B3D62 : 1; + unsigned B3D63 : 1; + unsigned B3D64 : 1; + unsigned B3D65 : 1; + unsigned B3D66 : 1; + unsigned B3D67 : 1; + }; +} __B3D6bits_t; +extern volatile __B3D6bits_t __at (0xE5C) B3D6bits; + +extern __sfr __at (0xE5D) B3D7; +typedef union { + struct { + unsigned B3D70 : 1; + unsigned B3D71 : 1; + unsigned B3D72 : 1; + unsigned B3D73 : 1; + unsigned B3D74 : 1; + unsigned B3D75 : 1; + unsigned B3D76 : 1; + unsigned B3D77 : 1; + }; +} __B3D7bits_t; +extern volatile __B3D7bits_t __at (0xE5D) B3D7bits; + +extern __sfr __at (0xE5E) CANSTAT_RO6; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO6bits_t; +extern volatile __CANSTAT_RO6bits_t __at (0xE5E) CANSTAT_RO6bits; + +extern __sfr __at (0xE5F) CANCON_RO6; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO6bits_t; +extern volatile __CANCON_RO6bits_t __at (0xE5F) CANCON_RO6bits; + +extern __sfr __at (0xE60) B4CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B4CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4CONbits_t; +extern volatile __B4CONbits_t __at (0xE60) B4CONbits; + +extern __sfr __at (0xE61) B4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B4SIDHbits_t; +extern volatile __B4SIDHbits_t __at (0xE61) B4SIDHbits; + +extern __sfr __at (0xE62) B4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4SIDLbits_t; +extern volatile __B4SIDLbits_t __at (0xE62) B4SIDLbits; + +extern __sfr __at (0xE63) B4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B4EIDHbits_t; +extern volatile __B4EIDHbits_t __at (0xE63) B4EIDHbits; + +extern __sfr __at (0xE64) B4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B4EIDLbits_t; +extern volatile __B4EIDLbits_t __at (0xE64) B4EIDLbits; + +extern __sfr __at (0xE65) B4DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B4DLC : 1; + unsigned RB1_B4DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B4DLCbits_t; +extern volatile __B4DLCbits_t __at (0xE65) B4DLCbits; + +extern __sfr __at (0xE66) B4D0; +typedef union { + struct { + unsigned B4D00 : 1; + unsigned B4D01 : 1; + unsigned B4D02 : 1; + unsigned B4D03 : 1; + unsigned B4D04 : 1; + unsigned B4D05 : 1; + unsigned B4D06 : 1; + unsigned B4D07 : 1; + }; +} __B4D0bits_t; +extern volatile __B4D0bits_t __at (0xE66) B4D0bits; + +extern __sfr __at (0xE67) B4D1; +typedef union { + struct { + unsigned B4D10 : 1; + unsigned B4D11 : 1; + unsigned B4D12 : 1; + unsigned B4D13 : 1; + unsigned B4D14 : 1; + unsigned B4D15 : 1; + unsigned B4D16 : 1; + unsigned B4D17 : 1; + }; +} __B4D1bits_t; +extern volatile __B4D1bits_t __at (0xE67) B4D1bits; + +extern __sfr __at (0xE68) B4D2; +typedef union { + struct { + unsigned B4D20 : 1; + unsigned B4D21 : 1; + unsigned B4D22 : 1; + unsigned B4D23 : 1; + unsigned B4D24 : 1; + unsigned B4D25 : 1; + unsigned B4D26 : 1; + unsigned B4D27 : 1; + }; +} __B4D2bits_t; +extern volatile __B4D2bits_t __at (0xE68) B4D2bits; + +extern __sfr __at (0xE69) B4D3; +typedef union { + struct { + unsigned B4D30 : 1; + unsigned B4D31 : 1; + unsigned B4D32 : 1; + unsigned B4D33 : 1; + unsigned B4D34 : 1; + unsigned B4D35 : 1; + unsigned B4D36 : 1; + unsigned B4D37 : 1; + }; +} __B4D3bits_t; +extern volatile __B4D3bits_t __at (0xE69) B4D3bits; + +extern __sfr __at (0xE6A) B4D4; +typedef union { + struct { + unsigned B4D40 : 1; + unsigned B4D41 : 1; + unsigned B4D42 : 1; + unsigned B4D43 : 1; + unsigned B4D44 : 1; + unsigned B4D45 : 1; + unsigned B4D46 : 1; + unsigned B4D47 : 1; + }; +} __B4D4bits_t; +extern volatile __B4D4bits_t __at (0xE6A) B4D4bits; + +extern __sfr __at (0xE6B) B4D5; +typedef union { + struct { + unsigned B4D50 : 1; + unsigned B4D51 : 1; + unsigned B4D52 : 1; + unsigned B4D53 : 1; + unsigned B4D54 : 1; + unsigned B4D55 : 1; + unsigned B4D56 : 1; + unsigned B4D57 : 1; + }; +} __B4D5bits_t; +extern volatile __B4D5bits_t __at (0xE6B) B4D5bits; + +extern __sfr __at (0xE6C) B4D6; +typedef union { + struct { + unsigned B4D60 : 1; + unsigned B4D61 : 1; + unsigned B4D62 : 1; + unsigned B4D63 : 1; + unsigned B4D64 : 1; + unsigned B4D65 : 1; + unsigned B4D66 : 1; + unsigned B4D67 : 1; + }; +} __B4D6bits_t; +extern volatile __B4D6bits_t __at (0xE6C) B4D6bits; + +extern __sfr __at (0xE6D) B4D7; +typedef union { + struct { + unsigned B4D70 : 1; + unsigned B4D71 : 1; + unsigned B4D72 : 1; + unsigned B4D73 : 1; + unsigned B4D74 : 1; + unsigned B4D75 : 1; + unsigned B4D76 : 1; + unsigned B46D77 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B4D77 : 1; + }; +} __B4D7bits_t; +extern volatile __B4D7bits_t __at (0xE6D) B4D7bits; + +extern __sfr __at (0xE6E) CANSTAT_RO5; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO5bits_t; +extern volatile __CANSTAT_RO5bits_t __at (0xE6E) CANSTAT_RO5bits; + +extern __sfr __at (0xE6F) CANCON_RO5; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO5bits_t; +extern volatile __CANCON_RO5bits_t __at (0xE6F) CANCON_RO5bits; + +extern __sfr __at (0xE70) B5CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B5CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5CONbits_t; +extern volatile __B5CONbits_t __at (0xE70) B5CONbits; + +extern __sfr __at (0xE71) B5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B5SIDHbits_t; +extern volatile __B5SIDHbits_t __at (0xE71) B5SIDHbits; + +extern __sfr __at (0xE72) B5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5SIDLbits_t; +extern volatile __B5SIDLbits_t __at (0xE72) B5SIDLbits; + +extern __sfr __at (0xE73) B5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B5EIDHbits_t; +extern volatile __B5EIDHbits_t __at (0xE73) B5EIDHbits; + +extern __sfr __at (0xE74) B5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B5EIDLbits_t; +extern volatile __B5EIDLbits_t __at (0xE74) B5EIDLbits; + +extern __sfr __at (0xE75) B5DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B5DLC : 1; + unsigned RB1_B5DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5DLCbits_t; +extern volatile __B5DLCbits_t __at (0xE75) B5DLCbits; + +extern __sfr __at (0xE76) B5D0; +typedef union { + struct { + unsigned B5D00 : 1; + unsigned B5D01 : 1; + unsigned B5D02 : 1; + unsigned B5D03 : 1; + unsigned B5D04 : 1; + unsigned B5D05 : 1; + unsigned B5D06 : 1; + unsigned B57D07 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D07 : 1; + }; +} __B5D0bits_t; +extern volatile __B5D0bits_t __at (0xE76) B5D0bits; + +extern __sfr __at (0xE77) B5D1; +typedef union { + struct { + unsigned B5D10 : 1; + unsigned B5D11 : 1; + unsigned B5D12 : 1; + unsigned B5D13 : 1; + unsigned B5D14 : 1; + unsigned B5D15 : 1; + unsigned B5D16 : 1; + unsigned B5D17 : 1; + }; +} __B5D1bits_t; +extern volatile __B5D1bits_t __at (0xE77) B5D1bits; + +extern __sfr __at (0xE78) B5D2; +typedef union { + struct { + unsigned B5D20 : 1; + unsigned B5D21 : 1; + unsigned B5D22 : 1; + unsigned B57D23 : 1; + unsigned B5D24 : 1; + unsigned B5D25 : 1; + unsigned B5D26 : 1; + unsigned B5D27 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D23 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5D2bits_t; +extern volatile __B5D2bits_t __at (0xE78) B5D2bits; + +extern __sfr __at (0xE79) B5D3; +typedef union { + struct { + unsigned B5D30 : 1; + unsigned B5D31 : 1; + unsigned B5D32 : 1; + unsigned B5D33 : 1; + unsigned B5D34 : 1; + unsigned B5D35 : 1; + unsigned B5D36 : 1; + unsigned B5D37 : 1; + }; +} __B5D3bits_t; +extern volatile __B5D3bits_t __at (0xE79) B5D3bits; + +extern __sfr __at (0xE7A) B5D4; +typedef union { + struct { + unsigned B5D40 : 1; + unsigned B5D41 : 1; + unsigned B5D42 : 1; + unsigned B5D43 : 1; + unsigned B5D44 : 1; + unsigned B5D45 : 1; + unsigned B5D46 : 1; + unsigned B5D47 : 1; + }; +} __B5D4bits_t; +extern volatile __B5D4bits_t __at (0xE7A) B5D4bits; + +extern __sfr __at (0xE7B) B5D5; +typedef union { + struct { + unsigned B5D50 : 1; + unsigned B5D51 : 1; + unsigned B5D52 : 1; + unsigned B5D53 : 1; + unsigned B5D54 : 1; + unsigned B5D55 : 1; + unsigned B5D56 : 1; + unsigned B5D57 : 1; + }; +} __B5D5bits_t; +extern volatile __B5D5bits_t __at (0xE7B) B5D5bits; + +extern __sfr __at (0xE7C) B5D6; +typedef union { + struct { + unsigned B5D60 : 1; + unsigned B5D61 : 1; + unsigned B5D62 : 1; + unsigned B5D63 : 1; + unsigned B5D64 : 1; + unsigned B5D65 : 1; + unsigned B5D66 : 1; + unsigned B5D67 : 1; + }; +} __B5D6bits_t; +extern volatile __B5D6bits_t __at (0xE7C) B5D6bits; + +extern __sfr __at (0xE7D) B5D7; +typedef union { + struct { + unsigned B5D70 : 1; + unsigned B5D71 : 1; + unsigned B5D72 : 1; + unsigned B5D73 : 1; + unsigned B5D74 : 1; + unsigned B5D75 : 1; + unsigned B5D76 : 1; + unsigned B5D77 : 1; + }; +} __B5D7bits_t; +extern volatile __B5D7bits_t __at (0xE7D) B5D7bits; + +extern __sfr __at (0xE7E) CANSTAT_RO4; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO4bits_t; +extern volatile __CANSTAT_RO4bits_t __at (0xE7E) CANSTAT_RO4bits; + +extern __sfr __at (0xE7F) CANCON_RO4; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO4bits_t; +extern volatile __CANCON_RO4bits_t __at (0xE7F) CANCON_RO4bits; + +extern __sfr __at (0xF00) RXF0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF0SIDHbits_t; +extern volatile __RXF0SIDHbits_t __at (0xF00) RXF0SIDHbits; + +extern __sfr __at (0xF01) RXF0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF0SIDLbits_t; +extern volatile __RXF0SIDLbits_t __at (0xF01) RXF0SIDLbits; + +extern __sfr __at (0xF02) RXF0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF0EIDHbits_t; +extern volatile __RXF0EIDHbits_t __at (0xF02) RXF0EIDHbits; + +extern __sfr __at (0xF03) RXF0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF0EIDLbits_t; +extern volatile __RXF0EIDLbits_t __at (0xF03) RXF0EIDLbits; + +extern __sfr __at (0xF04) RXF1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF1SIDHbits_t; +extern volatile __RXF1SIDHbits_t __at (0xF04) RXF1SIDHbits; + +extern __sfr __at (0xF05) RXF1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF1SIDLbits_t; +extern volatile __RXF1SIDLbits_t __at (0xF05) RXF1SIDLbits; + +extern __sfr __at (0xF06) RXF1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF1EIDHbits_t; +extern volatile __RXF1EIDHbits_t __at (0xF06) RXF1EIDHbits; + +extern __sfr __at (0xF07) RXF1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF1EIDLbits_t; +extern volatile __RXF1EIDLbits_t __at (0xF07) RXF1EIDLbits; + +extern __sfr __at (0xF08) RXF2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF2SIDHbits_t; +extern volatile __RXF2SIDHbits_t __at (0xF08) RXF2SIDHbits; + +extern __sfr __at (0xF09) RXF2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF2SIDLbits_t; +extern volatile __RXF2SIDLbits_t __at (0xF09) RXF2SIDLbits; + +extern __sfr __at (0xF0A) RXF2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF2EIDHbits_t; +extern volatile __RXF2EIDHbits_t __at (0xF0A) RXF2EIDHbits; + +extern __sfr __at (0xF0B) RXF2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF2EIDLbits_t; +extern volatile __RXF2EIDLbits_t __at (0xF0B) RXF2EIDLbits; + +extern __sfr __at (0xF0C) RXF3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF3SIDHbits_t; +extern volatile __RXF3SIDHbits_t __at (0xF0C) RXF3SIDHbits; + +extern __sfr __at (0xF0D) RXF3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF3SIDLbits_t; +extern volatile __RXF3SIDLbits_t __at (0xF0D) RXF3SIDLbits; + +extern __sfr __at (0xF0E) RXF3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF3EIDHbits_t; +extern volatile __RXF3EIDHbits_t __at (0xF0E) RXF3EIDHbits; + +extern __sfr __at (0xF0F) RXF3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF3EIDLbits_t; +extern volatile __RXF3EIDLbits_t __at (0xF0F) RXF3EIDLbits; + +extern __sfr __at (0xF10) RXF4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF4SIDHbits_t; +extern volatile __RXF4SIDHbits_t __at (0xF10) RXF4SIDHbits; + +extern __sfr __at (0xF11) RXF4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF4SIDLbits_t; +extern volatile __RXF4SIDLbits_t __at (0xF11) RXF4SIDLbits; + +extern __sfr __at (0xF12) RXF4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF4EIDHbits_t; +extern volatile __RXF4EIDHbits_t __at (0xF12) RXF4EIDHbits; + +extern __sfr __at (0xF13) RXF4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF4EIDLbits_t; +extern volatile __RXF4EIDLbits_t __at (0xF13) RXF4EIDLbits; + +extern __sfr __at (0xF14) RXF5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF5SIDHbits_t; +extern volatile __RXF5SIDHbits_t __at (0xF14) RXF5SIDHbits; + +extern __sfr __at (0xF15) RXF5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF5SIDLbits_t; +extern volatile __RXF5SIDLbits_t __at (0xF15) RXF5SIDLbits; + +extern __sfr __at (0xF16) RXF5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF5EIDHbits_t; +extern volatile __RXF5EIDHbits_t __at (0xF16) RXF5EIDHbits; + +extern __sfr __at (0xF17) RXF5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF5EIDLbits_t; +extern volatile __RXF5EIDLbits_t __at (0xF17) RXF5EIDLbits; + +extern __sfr __at (0xF18) RXM0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM0SIDHbits_t; +extern volatile __RXM0SIDHbits_t __at (0xF18) RXM0SIDHbits; + +extern __sfr __at (0xF19) RXM0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM0SIDLbits_t; +extern volatile __RXM0SIDLbits_t __at (0xF19) RXM0SIDLbits; + +extern __sfr __at (0xF1A) RXM0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM0EIDHbits_t; +extern volatile __RXM0EIDHbits_t __at (0xF1A) RXM0EIDHbits; + +extern __sfr __at (0xF1B) RXM0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM0EIDLbits_t; +extern volatile __RXM0EIDLbits_t __at (0xF1B) RXM0EIDLbits; + +extern __sfr __at (0xF1C) RXM1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM1SIDHbits_t; +extern volatile __RXM1SIDHbits_t __at (0xF1C) RXM1SIDHbits; + +extern __sfr __at (0xF1D) RXM1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM1SIDLbits_t; +extern volatile __RXM1SIDLbits_t __at (0xF1D) RXM1SIDLbits; + +extern __sfr __at (0xF1E) RXM1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM1EIDHbits_t; +extern volatile __RXM1EIDHbits_t __at (0xF1E) RXM1EIDHbits; + +extern __sfr __at (0xF1F) RXM1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM1EIDLbits_t; +extern volatile __RXM1EIDLbits_t __at (0xF1F) RXM1EIDLbits; + +extern __sfr __at (0xF20) TXB2CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFBXB2CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB2CONbits_t; +extern volatile __TXB2CONbits_t __at (0xF20) TXB2CONbits; + +extern __sfr __at (0xF21) TXB2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB2SIDHbits_t; +extern volatile __TXB2SIDHbits_t __at (0xF21) TXB2SIDHbits; + +extern __sfr __at (0xF22) TXB2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB2SIDLbits_t; +extern volatile __TXB2SIDLbits_t __at (0xF22) TXB2SIDLbits; + +extern __sfr __at (0xF23) TXB2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB2EIDHbits_t; +extern volatile __TXB2EIDHbits_t __at (0xF23) TXB2EIDHbits; + +extern __sfr __at (0xF24) TXB2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB2EIDLbits_t; +extern volatile __TXB2EIDLbits_t __at (0xF24) TXB2EIDLbits; + +extern __sfr __at (0xF25) TXB2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB2DLCbits_t; +extern volatile __TXB2DLCbits_t __at (0xF25) TXB2DLCbits; + +extern __sfr __at (0xF26) TXB2D0; +typedef union { + struct { + unsigned TXB2D00 : 1; + unsigned TXB2D01 : 1; + unsigned TXB2D02 : 1; + unsigned TXB2D03 : 1; + unsigned TXB2D04 : 1; + unsigned TXB2D05 : 1; + unsigned TXB2D06 : 1; + unsigned TXB2D07 : 1; + }; +} __TXB2D0bits_t; +extern volatile __TXB2D0bits_t __at (0xF26) TXB2D0bits; + +extern __sfr __at (0xF27) TXB2D1; +typedef union { + struct { + unsigned TXB2D10 : 1; + unsigned TXB2D11 : 1; + unsigned TXB2D12 : 1; + unsigned TXB2D13 : 1; + unsigned TXB2D14 : 1; + unsigned TXB2D15 : 1; + unsigned TXB2D16 : 1; + unsigned TXB2D17 : 1; + }; +} __TXB2D1bits_t; +extern volatile __TXB2D1bits_t __at (0xF27) TXB2D1bits; + +extern __sfr __at (0xF28) TXB2D2; +typedef union { + struct { + unsigned TXB2D20 : 1; + unsigned TXB2D21 : 1; + unsigned TXB2D22 : 1; + unsigned TXB2D23 : 1; + unsigned TXB2D24 : 1; + unsigned TXB2D25 : 1; + unsigned TXB2D26 : 1; + unsigned TXB2D27 : 1; + }; +} __TXB2D2bits_t; +extern volatile __TXB2D2bits_t __at (0xF28) TXB2D2bits; + +extern __sfr __at (0xF29) TXB2D3; +typedef union { + struct { + unsigned TXB2D30 : 1; + unsigned TXB2D31 : 1; + unsigned TXB2D32 : 1; + unsigned TXB2D33 : 1; + unsigned TXB2D34 : 1; + unsigned TXB2D35 : 1; + unsigned TXB2D36 : 1; + unsigned TXB2D37 : 1; + }; +} __TXB2D3bits_t; +extern volatile __TXB2D3bits_t __at (0xF29) TXB2D3bits; + +extern __sfr __at (0xF2A) TXB2D4; +typedef union { + struct { + unsigned TXB2D40 : 1; + unsigned TXB2D41 : 1; + unsigned TXB2D42 : 1; + unsigned TXB2D43 : 1; + unsigned TXB2D44 : 1; + unsigned TXB2D45 : 1; + unsigned TXB2D46 : 1; + unsigned TXB2D47 : 1; + }; +} __TXB2D4bits_t; +extern volatile __TXB2D4bits_t __at (0xF2A) TXB2D4bits; + +extern __sfr __at (0xF2B) TXB2D5; +typedef union { + struct { + unsigned TXB2D50 : 1; + unsigned TXB2D51 : 1; + unsigned TXB2D52 : 1; + unsigned TXB2D53 : 1; + unsigned TXB2D54 : 1; + unsigned TXB2D55 : 1; + unsigned TXB2D56 : 1; + unsigned TXB2D57 : 1; + }; +} __TXB2D5bits_t; +extern volatile __TXB2D5bits_t __at (0xF2B) TXB2D5bits; + +extern __sfr __at (0xF2C) TXB2D6; +typedef union { + struct { + unsigned TXB2D60 : 1; + unsigned TXB2D61 : 1; + unsigned TXB2D62 : 1; + unsigned TXB2D63 : 1; + unsigned TXB2D64 : 1; + unsigned TXB2D65 : 1; + unsigned TXB2D66 : 1; + unsigned TXB2D67 : 1; + }; +} __TXB2D6bits_t; +extern volatile __TXB2D6bits_t __at (0xF2C) TXB2D6bits; + +extern __sfr __at (0xF2D) TXB2D7; +typedef union { + struct { + unsigned TXB2D70 : 1; + unsigned TXB2D71 : 1; + unsigned TXB2D72 : 1; + unsigned TXB2D73 : 1; + unsigned TXB2D74 : 1; + unsigned TXB2D75 : 1; + unsigned TXB2D76 : 1; + unsigned TXB2D77 : 1; + }; +} __TXB2D7bits_t; +extern volatile __TXB2D7bits_t __at (0xF2D) TXB2D7bits; + +extern __sfr __at (0xF2E) CANSTAT_RO3; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO3bits_t; +extern volatile __CANSTAT_RO3bits_t __at (0xF2E) CANSTAT_RO3bits; + +extern __sfr __at (0xF2F) CANCON_RO3; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO3bits_t; +extern volatile __CANCON_RO3bits_t __at (0xF2F) CANCON_RO3bits; + +extern __sfr __at (0xF30) TXB1CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFTXB1CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB1CONbits_t; +extern volatile __TXB1CONbits_t __at (0xF30) TXB1CONbits; + +extern __sfr __at (0xF31) TXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB1SIDHbits_t; +extern volatile __TXB1SIDHbits_t __at (0xF31) TXB1SIDHbits; + +extern __sfr __at (0xF32) TXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB1SIDLbits_t; +extern volatile __TXB1SIDLbits_t __at (0xF32) TXB1SIDLbits; + +extern __sfr __at (0xF33) TXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB1EIDHbits_t; +extern volatile __TXB1EIDHbits_t __at (0xF33) TXB1EIDHbits; + +extern __sfr __at (0xF34) TXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB1EIDLbits_t; +extern volatile __TXB1EIDLbits_t __at (0xF34) TXB1EIDLbits; + +extern __sfr __at (0xF35) TXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB1DLCbits_t; +extern volatile __TXB1DLCbits_t __at (0xF35) TXB1DLCbits; + +extern __sfr __at (0xF36) TXB1D0; +typedef union { + struct { + unsigned TXB1D00 : 1; + unsigned TXB1D01 : 1; + unsigned TXB1D02 : 1; + unsigned TXB1D03 : 1; + unsigned TXB1D04 : 1; + unsigned TXB1D05 : 1; + unsigned TXB1D06 : 1; + unsigned TXB1D07 : 1; + }; +} __TXB1D0bits_t; +extern volatile __TXB1D0bits_t __at (0xF36) TXB1D0bits; + +extern __sfr __at (0xF37) TXB1D1; +typedef union { + struct { + unsigned TXB1D10 : 1; + unsigned TXB1D11 : 1; + unsigned TXB1D12 : 1; + unsigned TXB1D13 : 1; + unsigned TXB1D14 : 1; + unsigned TXB1D15 : 1; + unsigned TXB1D16 : 1; + unsigned TXB1D17 : 1; + }; +} __TXB1D1bits_t; +extern volatile __TXB1D1bits_t __at (0xF37) TXB1D1bits; + +extern __sfr __at (0xF38) TXB1D2; +typedef union { + struct { + unsigned TXB1D20 : 1; + unsigned TXB1D21 : 1; + unsigned TXB1D22 : 1; + unsigned TXB1D23 : 1; + unsigned TXB1D24 : 1; + unsigned TXB1D25 : 1; + unsigned TXB1D26 : 1; + unsigned TXB1D27 : 1; + }; +} __TXB1D2bits_t; +extern volatile __TXB1D2bits_t __at (0xF38) TXB1D2bits; + +extern __sfr __at (0xF39) TXB1D3; +typedef union { + struct { + unsigned TXB1D30 : 1; + unsigned TXB1D31 : 1; + unsigned TXB1D32 : 1; + unsigned TXB1D33 : 1; + unsigned TXB1D34 : 1; + unsigned TXB1D35 : 1; + unsigned TXB1D36 : 1; + unsigned TXB1D37 : 1; + }; +} __TXB1D3bits_t; +extern volatile __TXB1D3bits_t __at (0xF39) TXB1D3bits; + +extern __sfr __at (0xF3A) TXB1D4; +typedef union { + struct { + unsigned TXB1D40 : 1; + unsigned TXB1D41 : 1; + unsigned TXB1D42 : 1; + unsigned TXB1D43 : 1; + unsigned TXB1D44 : 1; + unsigned TXB1D45 : 1; + unsigned TXB1D46 : 1; + unsigned TXB1D47 : 1; + }; +} __TXB1D4bits_t; +extern volatile __TXB1D4bits_t __at (0xF3A) TXB1D4bits; + +extern __sfr __at (0xF3B) TXB1D5; +typedef union { + struct { + unsigned TXB1D50 : 1; + unsigned TXB1D51 : 1; + unsigned TXB1D52 : 1; + unsigned TXB1D53 : 1; + unsigned TXB1D54 : 1; + unsigned TXB1D55 : 1; + unsigned TXB1D56 : 1; + unsigned TXB1D57 : 1; + }; +} __TXB1D5bits_t; +extern volatile __TXB1D5bits_t __at (0xF3B) TXB1D5bits; + +extern __sfr __at (0xF3C) TXB1D6; +typedef union { + struct { + unsigned TXB1D60 : 1; + unsigned TXB1D61 : 1; + unsigned TXB1D62 : 1; + unsigned TXB1D63 : 1; + unsigned TXB1D64 : 1; + unsigned TXB1D65 : 1; + unsigned TXB1D66 : 1; + unsigned TXB1D67 : 1; + }; +} __TXB1D6bits_t; +extern volatile __TXB1D6bits_t __at (0xF3C) TXB1D6bits; + +extern __sfr __at (0xF3D) TXB1D7; +typedef union { + struct { + unsigned TXB1D70 : 1; + unsigned TXB1D71 : 1; + unsigned TXB1D72 : 1; + unsigned TXB1D73 : 1; + unsigned TXB1D74 : 1; + unsigned TXB1D75 : 1; + unsigned TXB1D76 : 1; + unsigned TXB1D77 : 1; + }; +} __TXB1D7bits_t; +extern volatile __TXB1D7bits_t __at (0xF3D) TXB1D7bits; + +extern __sfr __at (0xF3E) CANSTAT_RO2; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO2bits_t; +extern volatile __CANSTAT_RO2bits_t __at (0xF3E) CANSTAT_RO2bits; + +extern __sfr __at (0xF3F) CANCON_RO2; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO2bits_t; +extern volatile __CANCON_RO2bits_t __at (0xF3F) CANCON_RO2bits; + +extern __sfr __at (0xF40) TXB0CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; +} __TXB0CONbits_t; +extern volatile __TXB0CONbits_t __at (0xF40) TXB0CONbits; + +extern __sfr __at (0xF41) TXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB0SIDHbits_t; +extern volatile __TXB0SIDHbits_t __at (0xF41) TXB0SIDHbits; + +extern __sfr __at (0xF42) TXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB0SIDLbits_t; +extern volatile __TXB0SIDLbits_t __at (0xF42) TXB0SIDLbits; + +extern __sfr __at (0xF43) TXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB0EIDHbits_t; +extern volatile __TXB0EIDHbits_t __at (0xF43) TXB0EIDHbits; + +extern __sfr __at (0xF44) TXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB0EIDLbits_t; +extern volatile __TXB0EIDLbits_t __at (0xF44) TXB0EIDLbits; + +extern __sfr __at (0xF45) TXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB0DLCbits_t; +extern volatile __TXB0DLCbits_t __at (0xF45) TXB0DLCbits; + +extern __sfr __at (0xF46) TXB0D0; +typedef union { + struct { + unsigned TXB0D00 : 1; + unsigned TXB0D01 : 1; + unsigned TXB0D02 : 1; + unsigned TXB0D03 : 1; + unsigned TXB0D04 : 1; + unsigned TXB0D05 : 1; + unsigned TXB0D06 : 1; + unsigned TXB0D07 : 1; + }; +} __TXB0D0bits_t; +extern volatile __TXB0D0bits_t __at (0xF46) TXB0D0bits; + +extern __sfr __at (0xF47) TXB0D1; +typedef union { + struct { + unsigned TXB0D10 : 1; + unsigned TXB0D11 : 1; + unsigned TXB0D12 : 1; + unsigned TXB0D13 : 1; + unsigned TXB0D14 : 1; + unsigned TXB0D15 : 1; + unsigned TXB0D16 : 1; + unsigned TXB0D17 : 1; + }; +} __TXB0D1bits_t; +extern volatile __TXB0D1bits_t __at (0xF47) TXB0D1bits; + +extern __sfr __at (0xF48) TXB0D2; +typedef union { + struct { + unsigned TXB0D20 : 1; + unsigned TXB0D21 : 1; + unsigned TXB0D22 : 1; + unsigned TXB0D23 : 1; + unsigned TXB0D24 : 1; + unsigned TXB0D25 : 1; + unsigned TXB0D26 : 1; + unsigned TXB0D27 : 1; + }; +} __TXB0D2bits_t; +extern volatile __TXB0D2bits_t __at (0xF48) TXB0D2bits; + +extern __sfr __at (0xF49) TXB0D3; +typedef union { + struct { + unsigned TXB0D30 : 1; + unsigned TXB0D31 : 1; + unsigned TXB0D32 : 1; + unsigned TXB0D33 : 1; + unsigned TXB0D34 : 1; + unsigned TXB0D35 : 1; + unsigned TXB0D36 : 1; + unsigned TXB0D37 : 1; + }; +} __TXB0D3bits_t; +extern volatile __TXB0D3bits_t __at (0xF49) TXB0D3bits; + +extern __sfr __at (0xF4A) TXB0D4; +typedef union { + struct { + unsigned TXB0D40 : 1; + unsigned TXB0D41 : 1; + unsigned TXB0D42 : 1; + unsigned TXB0D43 : 1; + unsigned TXB0D44 : 1; + unsigned TXB0D45 : 1; + unsigned TXB0D46 : 1; + unsigned TXB0D47 : 1; + }; +} __TXB0D4bits_t; +extern volatile __TXB0D4bits_t __at (0xF4A) TXB0D4bits; + +extern __sfr __at (0xF4B) TXB0D5; +typedef union { + struct { + unsigned TXB0D50 : 1; + unsigned TXB0D51 : 1; + unsigned TXB0D52 : 1; + unsigned TXB0D53 : 1; + unsigned TXB0D54 : 1; + unsigned TXB0D55 : 1; + unsigned TXB0D56 : 1; + unsigned TXB0D57 : 1; + }; +} __TXB0D5bits_t; +extern volatile __TXB0D5bits_t __at (0xF4B) TXB0D5bits; + +extern __sfr __at (0xF4C) TXB0D6; +typedef union { + struct { + unsigned TXB0D60 : 1; + unsigned TXB0D61 : 1; + unsigned TXB0D62 : 1; + unsigned TXB0D63 : 1; + unsigned TXB0D64 : 1; + unsigned TXB0D65 : 1; + unsigned TXB0D66 : 1; + unsigned TXB0D67 : 1; + }; +} __TXB0D6bits_t; +extern volatile __TXB0D6bits_t __at (0xF4C) TXB0D6bits; + +extern __sfr __at (0xF4D) TXB0D7; +typedef union { + struct { + unsigned TXB0D70 : 1; + unsigned TXB0D71 : 1; + unsigned TXB0D72 : 1; + unsigned TXB0D73 : 1; + unsigned TXB0D74 : 1; + unsigned TXB0D75 : 1; + unsigned TXB0D76 : 1; + unsigned TXB0D77 : 1; + }; +} __TXB0D7bits_t; +extern volatile __TXB0D7bits_t __at (0xF4D) TXB0D7bits; + +extern __sfr __at (0xF4E) CANSTAT_RO1; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO1bits_t; +extern volatile __CANSTAT_RO1bits_t __at (0xF4E) CANSTAT_RO1bits; + +extern __sfr __at (0xF4F) CANCON_RO1; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO1bits_t; +extern volatile __CANCON_RO1bits_t __at (0xF4F) CANCON_RO1bits; + +extern __sfr __at (0xF50) RXB1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned RXRTRRO_RXB1CON : 1; + unsigned FILHIT4 : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned FILHIT3 : 1; + unsigned : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1CONbits_t; +extern volatile __RXB1CONbits_t __at (0xF50) RXB1CONbits; + +extern __sfr __at (0xF51) RXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB1SIDHbits_t; +extern volatile __RXB1SIDHbits_t __at (0xF51) RXB1SIDHbits; + +extern __sfr __at (0xF52) RXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB1SIDLbits_t; +extern volatile __RXB1SIDLbits_t __at (0xF52) RXB1SIDLbits; + +extern __sfr __at (0xF53) RXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB1EIDHbits_t; +extern volatile __RXB1EIDHbits_t __at (0xF53) RXB1EIDHbits; + +extern __sfr __at (0xF54) RXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB1EIDLbits_t; +extern volatile __RXB1EIDLbits_t __at (0xF54) RXB1EIDLbits; + +extern __sfr __at (0xF55) RXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB1DLC : 1; + unsigned RB1_RXB1DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1DLCbits_t; +extern volatile __RXB1DLCbits_t __at (0xF55) RXB1DLCbits; + +extern __sfr __at (0xF56) RXB1D0; +typedef union { + struct { + unsigned RXB1D00 : 1; + unsigned RXB1D01 : 1; + unsigned RXB1D02 : 1; + unsigned RXB1D03 : 1; + unsigned RXB1D04 : 1; + unsigned RXB1D05 : 1; + unsigned RXB1D06 : 1; + unsigned RXB1D07 : 1; + }; +} __RXB1D0bits_t; +extern volatile __RXB1D0bits_t __at (0xF56) RXB1D0bits; + +extern __sfr __at (0xF57) RXB1D1; +typedef union { + struct { + unsigned RXB1D10 : 1; + unsigned RXB1D11 : 1; + unsigned RXB1D12 : 1; + unsigned RXB1D13 : 1; + unsigned RXB1D14 : 1; + unsigned RXB1D15 : 1; + unsigned RXB1D16 : 1; + unsigned RXB1D17 : 1; + }; +} __RXB1D1bits_t; +extern volatile __RXB1D1bits_t __at (0xF57) RXB1D1bits; + +extern __sfr __at (0xF58) RXB1D2; +typedef union { + struct { + unsigned RXB1D20 : 1; + unsigned RXB1D21 : 1; + unsigned RXB1D22 : 1; + unsigned RXB1D23 : 1; + unsigned RXB1D24 : 1; + unsigned RXB1D25 : 1; + unsigned RXB1D26 : 1; + unsigned RXB1D27 : 1; + }; +} __RXB1D2bits_t; +extern volatile __RXB1D2bits_t __at (0xF58) RXB1D2bits; + +extern __sfr __at (0xF59) RXB1D3; +typedef union { + struct { + unsigned RXB1D30 : 1; + unsigned RXB1D31 : 1; + unsigned RXB1D32 : 1; + unsigned RXB1D33 : 1; + unsigned RXB1D34 : 1; + unsigned RXB1D35 : 1; + unsigned RXB1D36 : 1; + unsigned RXB1D37 : 1; + }; +} __RXB1D3bits_t; +extern volatile __RXB1D3bits_t __at (0xF59) RXB1D3bits; + +extern __sfr __at (0xF5A) RXB1D4; +typedef union { + struct { + unsigned RXB1D40 : 1; + unsigned RXB1D41 : 1; + unsigned RXB1D42 : 1; + unsigned RXB1D43 : 1; + unsigned RXB1D44 : 1; + unsigned RXB1D45 : 1; + unsigned RXB1D46 : 1; + unsigned RXB1D47 : 1; + }; +} __RXB1D4bits_t; +extern volatile __RXB1D4bits_t __at (0xF5A) RXB1D4bits; + +extern __sfr __at (0xF5B) RXB1D5; +typedef union { + struct { + unsigned RXB1D50 : 1; + unsigned RXB1D51 : 1; + unsigned RXB1D52 : 1; + unsigned RXB1D53 : 1; + unsigned RXB1D54 : 1; + unsigned RXB1D55 : 1; + unsigned RXB1D56 : 1; + unsigned RXB1D57 : 1; + }; +} __RXB1D5bits_t; +extern volatile __RXB1D5bits_t __at (0xF5B) RXB1D5bits; + +extern __sfr __at (0xF5C) RXB1D6; +typedef union { + struct { + unsigned RXB1D60 : 1; + unsigned RXB1D61 : 1; + unsigned RXB1D62 : 1; + unsigned RXB1D63 : 1; + unsigned RXB1D64 : 1; + unsigned RXB1D65 : 1; + unsigned RXB1D66 : 1; + unsigned RXB1D67 : 1; + }; +} __RXB1D6bits_t; +extern volatile __RXB1D6bits_t __at (0xF5C) RXB1D6bits; + +extern __sfr __at (0xF5D) RXB1D7; +typedef union { + struct { + unsigned RXB1D70 : 1; + unsigned RXB1D71 : 1; + unsigned RXB1D72 : 1; + unsigned RXB1D73 : 1; + unsigned RXB1D74 : 1; + unsigned RXB1D75 : 1; + unsigned RXB1D76 : 1; + unsigned RXB1D77 : 1; + }; +} __RXB1D7bits_t; +extern volatile __RXB1D7bits_t __at (0xF5D) RXB1D7bits; + +extern __sfr __at (0xF5E) CANSTAT_RO0; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO0bits_t; +extern volatile __CANSTAT_RO0bits_t __at (0xF5E) CANSTAT_RO0bits; + +extern __sfr __at (0xF5F) CANCON_RO0; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO0bits_t; +extern volatile __CANCON_RO0bits_t __at (0xF5F) CANCON_RO0bits; + +extern __sfr __at (0xF60) RXB0CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned JTOFF : 1; + unsigned RXB0DBEN : 1; + unsigned RXRTRRO_RXB0CON : 1; + unsigned FILHIT4 : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned RXBODBEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0CONbits_t; +extern volatile __RXB0CONbits_t __at (0xF60) RXB0CONbits; + +extern __sfr __at (0xF61) RXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB0SIDHbits_t; +extern volatile __RXB0SIDHbits_t __at (0xF61) RXB0SIDHbits; + +extern __sfr __at (0xF62) RXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB0SIDLbits_t; +extern volatile __RXB0SIDLbits_t __at (0xF62) RXB0SIDLbits; + +extern __sfr __at (0xF63) RXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB0EIDHbits_t; +extern volatile __RXB0EIDHbits_t __at (0xF63) RXB0EIDHbits; + +extern __sfr __at (0xF64) RXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB0EIDLbits_t; +extern volatile __RXB0EIDLbits_t __at (0xF64) RXB0EIDLbits; + +extern __sfr __at (0xF65) RXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB0DLC : 1; + unsigned RB1_RXB0DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0DLCbits_t; +extern volatile __RXB0DLCbits_t __at (0xF65) RXB0DLCbits; + +extern __sfr __at (0xF66) RXB0D0; +typedef union { + struct { + unsigned RXB0D00 : 1; + unsigned RXB0D01 : 1; + unsigned RXB0D02 : 1; + unsigned RXB0D03 : 1; + unsigned RXB0D04 : 1; + unsigned RXB0D05 : 1; + unsigned RXB0D06 : 1; + unsigned RXB0D07 : 1; + }; +} __RXB0D0bits_t; +extern volatile __RXB0D0bits_t __at (0xF66) RXB0D0bits; + +extern __sfr __at (0xF67) RXB0D1; +typedef union { + struct { + unsigned RXB0D10 : 1; + unsigned RXB0D11 : 1; + unsigned RXB0D12 : 1; + unsigned RXB0D13 : 1; + unsigned RXB0D14 : 1; + unsigned RXB0D15 : 1; + unsigned RXB0D16 : 1; + unsigned RXB0D17 : 1; + }; +} __RXB0D1bits_t; +extern volatile __RXB0D1bits_t __at (0xF67) RXB0D1bits; + +extern __sfr __at (0xF68) RXB0D2; +typedef union { + struct { + unsigned RXB0D20 : 1; + unsigned RXB0D21 : 1; + unsigned RXB0D22 : 1; + unsigned RXB0D23 : 1; + unsigned RXB0D24 : 1; + unsigned RXB0D25 : 1; + unsigned RXB0D26 : 1; + unsigned RXB0D27 : 1; + }; +} __RXB0D2bits_t; +extern volatile __RXB0D2bits_t __at (0xF68) RXB0D2bits; + +extern __sfr __at (0xF69) RXB0D3; +typedef union { + struct { + unsigned RXB0D30 : 1; + unsigned RXB0D31 : 1; + unsigned RXB0D32 : 1; + unsigned RXB0D33 : 1; + unsigned RXB0D34 : 1; + unsigned RXB0D35 : 1; + unsigned RXB0D36 : 1; + unsigned RXB0D37 : 1; + }; +} __RXB0D3bits_t; +extern volatile __RXB0D3bits_t __at (0xF69) RXB0D3bits; + +extern __sfr __at (0xF6A) RXB0D4; +typedef union { + struct { + unsigned RXB0D40 : 1; + unsigned RXB0D41 : 1; + unsigned RXB0D42 : 1; + unsigned RXB0D43 : 1; + unsigned RXB0D44 : 1; + unsigned RXB0D45 : 1; + unsigned RXB0D46 : 1; + unsigned RXB0D47 : 1; + }; +} __RXB0D4bits_t; +extern volatile __RXB0D4bits_t __at (0xF6A) RXB0D4bits; + +extern __sfr __at (0xF6B) RXB0D5; +typedef union { + struct { + unsigned RXB0D50 : 1; + unsigned RXB0D51 : 1; + unsigned RXB0D52 : 1; + unsigned RXB0D53 : 1; + unsigned RXB0D54 : 1; + unsigned RXB0D55 : 1; + unsigned RXB0D56 : 1; + unsigned RXB0D57 : 1; + }; +} __RXB0D5bits_t; +extern volatile __RXB0D5bits_t __at (0xF6B) RXB0D5bits; + +extern __sfr __at (0xF6C) RXB0D6; +typedef union { + struct { + unsigned RXB0D60 : 1; + unsigned RXB0D61 : 1; + unsigned RXB0D62 : 1; + unsigned RXB0D63 : 1; + unsigned RXB0D64 : 1; + unsigned RXB0D65 : 1; + unsigned RXB0D66 : 1; + unsigned RXB0D67 : 1; + }; +} __RXB0D6bits_t; +extern volatile __RXB0D6bits_t __at (0xF6C) RXB0D6bits; + +extern __sfr __at (0xF6D) RXB0D7; +typedef union { + struct { + unsigned RXB0D70 : 1; + unsigned RXB0D71 : 1; + unsigned RXB0D72 : 1; + unsigned RXB0D73 : 1; + unsigned RXB0D74 : 1; + unsigned RXB0D75 : 1; + unsigned RXB0D76 : 1; + unsigned RXB0D77 : 1; + }; +} __RXB0D7bits_t; +extern volatile __RXB0D7bits_t __at (0xF6D) RXB0D7bits; + +extern __sfr __at (0xF6E) CANSTAT; +typedef union { + struct { + unsigned EICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned EICODE4 : 1; + unsigned OPMODE0 : 1; + unsigned OPMODE1 : 1; + unsigned OPMODE2 : 1; + }; + struct { + unsigned : 1; + unsigned EICODE1 : 1; + unsigned EICODE2 : 1; + unsigned EICODE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANSTATbits_t; +extern volatile __CANSTATbits_t __at (0xF6E) CANSTATbits; + +extern __sfr __at (0xF6F) CANCON; +typedef union { + struct { + unsigned FP0 : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; + struct { + unsigned : 1; + unsigned FP1 : 1; + unsigned FP2 : 1; + unsigned FP3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANCONbits_t; +extern volatile __CANCONbits_t __at (0xF6F) CANCONbits; + +extern __sfr __at (0xF70) BRGCON1; +typedef union { + struct { + unsigned BRP0 : 1; + unsigned BRP1 : 1; + unsigned BRP2 : 1; + unsigned BRP3 : 1; + unsigned BRP4 : 1; + unsigned BRP5 : 1; + unsigned SJW0 : 1; + unsigned SJW1 : 1; + }; +} __BRGCON1bits_t; +extern volatile __BRGCON1bits_t __at (0xF70) BRGCON1bits; + +extern __sfr __at (0xF71) BRGCON2; +typedef union { + struct { + unsigned PRSEG0 : 1; + unsigned PRSEG1 : 1; + unsigned PRSEG2 : 1; + unsigned SEG1PH0 : 1; + unsigned SEG1PH1 : 1; + unsigned SEG1PH2 : 1; + unsigned SAM : 1; + unsigned SEG2PHTS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SEG2PHT : 1; + }; +} __BRGCON2bits_t; +extern volatile __BRGCON2bits_t __at (0xF71) BRGCON2bits; + +extern __sfr __at (0xF72) BRGCON3; +typedef union { + struct { + unsigned SEG2PH0 : 1; + unsigned SEG2PH1 : 1; + unsigned SEG2PH2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned WAKFIL : 1; + unsigned WAKDIS : 1; + }; +} __BRGCON3bits_t; +extern volatile __BRGCON3bits_t __at (0xF72) BRGCON3bits; + +extern __sfr __at (0xF73) CIOCON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CANCAP : 1; + unsigned ENDRHI : 1; + unsigned : 1; + unsigned : 1; + }; +} __CIOCONbits_t; +extern volatile __CIOCONbits_t __at (0xF73) CIOCONbits; + +extern __sfr __at (0xF74) COMSTAT; +typedef union { + struct { + unsigned EWARN : 1; + unsigned RXWARN : 1; + unsigned TXWARN : 1; + unsigned RXBP : 1; + unsigned TXBP : 1; + unsigned TXBO : 1; + unsigned RXB1OVFL : 1; + unsigned RXB0OVFL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXBnOVFL : 1; + unsigned FIFOEMPTY : 1; + }; +} __COMSTATbits_t; +extern volatile __COMSTATbits_t __at (0xF74) COMSTATbits; + +extern __sfr __at (0xF75) RXERRCNT; +typedef union { + struct { + unsigned REC0 : 1; + unsigned REC1 : 1; + unsigned REC2 : 1; + unsigned REC3 : 1; + unsigned REC4 : 1; + unsigned REC5 : 1; + unsigned REC6 : 1; + unsigned REC7 : 1; + }; +} __RXERRCNTbits_t; +extern volatile __RXERRCNTbits_t __at (0xF75) RXERRCNTbits; + +extern __sfr __at (0xF76) TXERRCNT; +typedef union { + struct { + unsigned TEC0 : 1; + unsigned TEC1 : 1; + unsigned TEC2 : 1; + unsigned TEC3 : 1; + unsigned TEC4 : 1; + unsigned TEC5 : 1; + unsigned TEC6 : 1; + unsigned TEC7 : 1; + }; +} __TXERRCNTbits_t; +extern volatile __TXERRCNTbits_t __at (0xF76) TXERRCNTbits; + +extern __sfr __at (0xF77) ECANCON; +typedef union { + struct { + unsigned EWIN0 : 1; + unsigned EWIN1 : 1; + unsigned EWIN2 : 1; + unsigned EWIN3 : 1; + unsigned EWIN4 : 1; + unsigned FIFOWM : 1; + unsigned MDSEL0 : 1; + unsigned MDSEL1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned F : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECANCONbits_t; +extern volatile __ECANCONbits_t __at (0xF77) ECANCONbits; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned OSC1 : 1; + }; + struct { + unsigned CVREFA : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned LVDIN : 1; + unsigned CLKO : 1; + unsigned CLKI : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0_PORTB : 1; + unsigned RB1_PORTB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CANRX : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned CANTX : 1; + unsigned : 1; + unsigned AN9 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned PSP0 : 1; + unsigned PSP1 : 1; + unsigned PSP2 : 1; + unsigned PSP3 : 1; + unsigned PSP4 : 1; + unsigned PSP5 : 1; + unsigned PSP6 : 1; + unsigned PSP7 : 1; + }; + struct { + unsigned C1INB : 1; + unsigned C1INA : 1; + unsigned C2INB : 1; + unsigned C2INA : 1; + unsigned P1A : 1; + unsigned P1B : 1; + unsigned P1C : 1; + unsigned P1D : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ECCP1 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0_DDRB : 1; + unsigned RB1_DDRB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSCR : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PSPIE : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PSPIF : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXBIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PSPIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned ECCP1IE : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned ECCP1IF : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned ECCP1IP : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned ERRIE : 1; + unsigned WAKIE : 1; + unsigned IRXIE : 1; + }; + struct { + unsigned FIFOWMIE : 1; + unsigned RXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FIFOMWIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned RXB0IF : 1; + unsigned RXB1IF : 1; + unsigned TXB0IF : 1; + unsigned TXB1IF : 1; + unsigned TXB2IF : 1; + unsigned ERRIF : 1; + unsigned WAKIF : 1; + unsigned IRXIF : 1; + }; + struct { + unsigned FIFOWMIF : 1; + unsigned RXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned RXB0IP : 1; + unsigned RXB1IP : 1; + unsigned TXB0IP : 1; + unsigned TXB1IP : 1; + unsigned TXB2IP : 1; + unsigned ERRIP : 1; + unsigned WAKIP : 1; + unsigned IRXIP : 1; + }; + struct { + unsigned FIFOWMIP : 1; + unsigned RXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T3NSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T3ECCP1 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT : 1; + unsigned C2OUT : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVREF : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CVRSS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) ECCP1DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFBA) ECCP1CON; +typedef union { + struct { + unsigned ECCP1M0 : 1; + unsigned ECCP1M1 : 1; + unsigned ECCP1M2 : 1; + unsigned ECCP1M3 : 1; + unsigned EDC1B0 : 1; + unsigned EDC1B1 : 1; + unsigned EPWM1M0 : 1; + unsigned EPWM1M1 : 1; + }; +} __ECCP1CONbits_t; +extern volatile __ECCP1CONbits_t __at (0xFBA) ECCP1CONbits; + +extern __sfr __at (0xFBB) ECCPR1; + +extern __sfr __at (0xFBB) ECCPR1L; + +extern __sfr __at (0xFBC) ECCPR1H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO_DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T0PS3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f4585.h b/device/include/pic16/pic18f4585.h new file mode 100644 index 0000000..ab4c355 --- /dev/null +++ b/device/include/pic16/pic18f4585.h @@ -0,0 +1,6314 @@ +/* + * pic18f4585.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F4585_H__ +#define __PIC18F4585_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP oscillator +#define _OSC_XT_1H 0xF1 // XT oscillator +#define _OSC_HS_1H 0xF2 // HS oscillator +#define _OSC_RC_1H 0xF3 // External RC oscillator, CLKO function on RA6 +#define _OSC_EC_1H 0xF4 // EC oscillator, CLKO function on RA6 +#define _OSC_ECIO_1H 0xF5 // EC oscillator, port function on RA6 +#define _OSC_HSPLL_1H 0xF6 // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) +#define _OSC_RCIO_1H 0xF7 // External RC oscillator, port function on RA6 +#define _OSC_IRCIO67_1H 0xF8 // Internal oscillator block, port function on RA6 and RA7 +#define _OSC_IRCIO7_1H 0xF9 // Internal oscillator block, CLKO function on RA6, port function on RA7 +#define _FCMEN_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled +#define _FCMEN_ON_1H 0xFF // Fail-Safe Clock Monitor enabled +#define _IESO_OFF_1H 0x7F // Oscillator Switchover mode disabled +#define _IESO_ON_1H 0xFF // Oscillator Switchover mode enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // PWRT enabled +#define _PWRT_OFF_2L 0xFF // PWRT disabled +#define _BOREN_OFF_2L 0xF9 // Brown-out Reset disabled in hardware and software +#define _BOREN_SBORENCTRL_2L 0xFB // Brown-out Reset enabled and controlled by software (SBOREN is enabled) +#define _BOREN_BOACTIVE_2L 0xFD // Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) +#define _BOREN_BOHW_2L 0xFF // Brown-out Reset enabled in hardware only (SBOREN is disabled) +#define _BORV_0_2L 0xE7 // Maximum Setting +#define _BORV_1_2L 0xEF // +#define _BORV_2_2L 0xF7 // +#define _BORV_3_2L 0xFF // Minimum Setting + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // HW Disabled - SW Controlled +#define _WDT_ON_2H 0xFF // HW Enabled - SW Disabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // RE3 input pin enabled; MCLR disabled +#define _MCLRE_ON_3H 0xFF // MCLR pin enabled; RE3 input pin disabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 configured for higher power operation +#define _LPT1OSC_ON_3H 0xFF // Timer1 configured for low-power operation +#define _PBADEN_OFF_3H 0xFD // PORTB<4> and PORTB<1:0> Configured as Digital I/O Pins on Reset +#define _PBADEN_ON_3H 0xFF // PORTB<4> and PORTB<1:0> Configured as Analog Pins on Reset + +// CONFIG4L Options +#define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug +#define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins +#define _XINST_OFF_4L 0xBF // Instruction set extension and Indexed Addressing mode disabled (Legacy mode) +#define _XINST_ON_4L 0xFF // Instruction set extension and Indexed Addressing mode enabled +#define _BBSIZ_1024_4L 0xCF // 1K words (2K bytes) Boot Block +#define _BBSIZ_2048_4L 0xDF // 2K words (4K bytes) Boot Block +#define _BBSIZ_4096_4L 0xEF // 4K words (8K bytes) Boot Block +#define _LVP_OFF_4L 0xFB // Single-Supply ICSP disabled +#define _LVP_ON_4L 0xFF // Single-Supply ICSP enabled +#define _STVREN_OFF_4L 0xFE // Stack full/underflow will not cause Reset +#define _STVREN_ON_4L 0xFF // Stack full/underflow will cause Reset + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Block 0 (000800-003FFFh) code-protected +#define _CP0_OFF_5L 0xFF // Block 0 (000800-003FFFh) not code-protected +#define _CP1_ON_5L 0xFD // Block 1 (004000-007FFFh) code-protected +#define _CP1_OFF_5L 0xFF // Block 1 (004000-007FFFh) not code-protected +#define _CP2_ON_5L 0xFB // Block 2 (008000-00BFFFh) code-protected +#define _CP2_OFF_5L 0xFF // Block 2 (008000-00BFFFh) not code-protected + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Boot block (000000-0007FFh) code-protected +#define _CPB_OFF_5H 0xFF // Boot block (000000-0007FFh) not code-protected +#define _CPD_ON_5H 0x7F // Data EEPROM code-protected +#define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Block 0 (000800-003FFFh) write-protected +#define _WRT0_OFF_6L 0xFF // Block 0 (000800-003FFFh) not write-protected +#define _WRT1_ON_6L 0xFD // Block 1 (004000-007FFFh) write-protected +#define _WRT1_OFF_6L 0xFF // Block 1 (004000-007FFFh) not write-protected +#define _WRT2_ON_6L 0xFB // Block 2 (008000-00BFFFh) write-protected +#define _WRT2_OFF_6L 0xFF // Block 2 (008000-00BFFFh) not write-protected + +// CONFIG6H Options +#define _WRTB_ON_6H 0xBF // Boot block (000000-0007FFh) write-protected +#define _WRTB_OFF_6H 0xFF // Boot block (000000-0007FFh) not write-protected +#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected +#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected +#define _WRTD_ON_6H 0x7F // Data EEPROM write-protected +#define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Block 0 (000800-003FFFh) protected from table reads executed in other blocks +#define _EBTR0_OFF_7L 0xFF // Block 0 (000800-003FFFh) not protected from table reads executed in other blocks +#define _EBTR1_ON_7L 0xFD // Block 1 (004000-007FFFh) protected from table reads executed in other blocks +#define _EBTR1_OFF_7L 0xFF // Block 1 (004000-007FFFh) not protected from table reads executed in other blocks +#define _EBTR2_ON_7L 0xFB // Block 2 (008000-00BFFFh) protected from table reads executed in other blocks +#define _EBTR2_OFF_7L 0xFF // Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Boot block (000000-0007FFh) protected from table reads executed in other blocks +#define _EBTRB_OFF_7H 0xFF // Boot block (000000-0007FFh) not protected from table reads executed in other blocks +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xD60) RXF6SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF6SIDHbits_t; +extern volatile __RXF6SIDHbits_t __at (0xD60) RXF6SIDHbits; + +extern __sfr __at (0xD61) RXF6SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF6SIDLbits_t; +extern volatile __RXF6SIDLbits_t __at (0xD61) RXF6SIDLbits; + +extern __sfr __at (0xD62) RXF6EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF6EIDHbits_t; +extern volatile __RXF6EIDHbits_t __at (0xD62) RXF6EIDHbits; + +extern __sfr __at (0xD63) RXF6EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF6EIDLbits_t; +extern volatile __RXF6EIDLbits_t __at (0xD63) RXF6EIDLbits; + +extern __sfr __at (0xD64) RXF7SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF7SIDHbits_t; +extern volatile __RXF7SIDHbits_t __at (0xD64) RXF7SIDHbits; + +extern __sfr __at (0xD65) RXF7SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF7SIDLbits_t; +extern volatile __RXF7SIDLbits_t __at (0xD65) RXF7SIDLbits; + +extern __sfr __at (0xD66) RXF7EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF7EIDHbits_t; +extern volatile __RXF7EIDHbits_t __at (0xD66) RXF7EIDHbits; + +extern __sfr __at (0xD67) RXF7EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF7EIDLbits_t; +extern volatile __RXF7EIDLbits_t __at (0xD67) RXF7EIDLbits; + +extern __sfr __at (0xD68) RXF8SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF8SIDHbits_t; +extern volatile __RXF8SIDHbits_t __at (0xD68) RXF8SIDHbits; + +extern __sfr __at (0xD69) RXF8SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF8SIDLbits_t; +extern volatile __RXF8SIDLbits_t __at (0xD69) RXF8SIDLbits; + +extern __sfr __at (0xD6A) RXF8EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF8EIDHbits_t; +extern volatile __RXF8EIDHbits_t __at (0xD6A) RXF8EIDHbits; + +extern __sfr __at (0xD6B) RXF8EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF8EIDLbits_t; +extern volatile __RXF8EIDLbits_t __at (0xD6B) RXF8EIDLbits; + +extern __sfr __at (0xD70) RXF9SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF9SIDHbits_t; +extern volatile __RXF9SIDHbits_t __at (0xD70) RXF9SIDHbits; + +extern __sfr __at (0xD71) RXF9SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF9SIDLbits_t; +extern volatile __RXF9SIDLbits_t __at (0xD71) RXF9SIDLbits; + +extern __sfr __at (0xD72) RXF9EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF9EIDHbits_t; +extern volatile __RXF9EIDHbits_t __at (0xD72) RXF9EIDHbits; + +extern __sfr __at (0xD73) RXF9EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF9EIDLbits_t; +extern volatile __RXF9EIDLbits_t __at (0xD73) RXF9EIDLbits; + +extern __sfr __at (0xD74) RXF10SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF10SIDHbits_t; +extern volatile __RXF10SIDHbits_t __at (0xD74) RXF10SIDHbits; + +extern __sfr __at (0xD75) RXF10SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF10SIDLbits_t; +extern volatile __RXF10SIDLbits_t __at (0xD75) RXF10SIDLbits; + +extern __sfr __at (0xD76) RXF10EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF10EIDHbits_t; +extern volatile __RXF10EIDHbits_t __at (0xD76) RXF10EIDHbits; + +extern __sfr __at (0xD77) RXF10EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF10EIDLbits_t; +extern volatile __RXF10EIDLbits_t __at (0xD77) RXF10EIDLbits; + +extern __sfr __at (0xD78) RXF11SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF11SIDHbits_t; +extern volatile __RXF11SIDHbits_t __at (0xD78) RXF11SIDHbits; + +extern __sfr __at (0xD79) RXF11SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF11SIDLbits_t; +extern volatile __RXF11SIDLbits_t __at (0xD79) RXF11SIDLbits; + +extern __sfr __at (0xD7A) RXF11EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF11EIDHbits_t; +extern volatile __RXF11EIDHbits_t __at (0xD7A) RXF11EIDHbits; + +extern __sfr __at (0xD7B) RXF11EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF11EIDLbits_t; +extern volatile __RXF11EIDLbits_t __at (0xD7B) RXF11EIDLbits; + +extern __sfr __at (0xD80) RXF12SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF12SIDHbits_t; +extern volatile __RXF12SIDHbits_t __at (0xD80) RXF12SIDHbits; + +extern __sfr __at (0xD81) RXF12SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF12SIDLbits_t; +extern volatile __RXF12SIDLbits_t __at (0xD81) RXF12SIDLbits; + +extern __sfr __at (0xD82) RXF12EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF12EIDHbits_t; +extern volatile __RXF12EIDHbits_t __at (0xD82) RXF12EIDHbits; + +extern __sfr __at (0xD83) RXF12EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF12EIDLbits_t; +extern volatile __RXF12EIDLbits_t __at (0xD83) RXF12EIDLbits; + +extern __sfr __at (0xD84) RXF13SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF13SIDHbits_t; +extern volatile __RXF13SIDHbits_t __at (0xD84) RXF13SIDHbits; + +extern __sfr __at (0xD85) RXF13SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF13SIDLbits_t; +extern volatile __RXF13SIDLbits_t __at (0xD85) RXF13SIDLbits; + +extern __sfr __at (0xD86) RXF13EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF13EIDHbits_t; +extern volatile __RXF13EIDHbits_t __at (0xD86) RXF13EIDHbits; + +extern __sfr __at (0xD87) RXF13EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF13EIDLbits_t; +extern volatile __RXF13EIDLbits_t __at (0xD87) RXF13EIDLbits; + +extern __sfr __at (0xD88) RXF14SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF14SIDHbits_t; +extern volatile __RXF14SIDHbits_t __at (0xD88) RXF14SIDHbits; + +extern __sfr __at (0xD89) RXF14SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF14SIDLbits_t; +extern volatile __RXF14SIDLbits_t __at (0xD89) RXF14SIDLbits; + +extern __sfr __at (0xD8A) RXF14EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF14EIDHbits_t; +extern volatile __RXF14EIDHbits_t __at (0xD8A) RXF14EIDHbits; + +extern __sfr __at (0xD8B) RXF14EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF14EIDLbits_t; +extern volatile __RXF14EIDLbits_t __at (0xD8B) RXF14EIDLbits; + +extern __sfr __at (0xD90) RXF15SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF15SIDHbits_t; +extern volatile __RXF15SIDHbits_t __at (0xD90) RXF15SIDHbits; + +extern __sfr __at (0xD91) RXF15SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF15SIDLbits_t; +extern volatile __RXF15SIDLbits_t __at (0xD91) RXF15SIDLbits; + +extern __sfr __at (0xD92) RXF15EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF15EIDHbits_t; +extern volatile __RXF15EIDHbits_t __at (0xD92) RXF15EIDHbits; + +extern __sfr __at (0xD93) RXF15EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF15EIDLbits_t; +extern volatile __RXF15EIDLbits_t __at (0xD93) RXF15EIDLbits; + +extern __sfr __at (0xDD4) RXFCON0; +typedef union { + struct { + unsigned RXF0EN : 1; + unsigned RXF1EN : 1; + unsigned RXF2EN : 1; + unsigned RXF3EN : 1; + unsigned RXF4EN : 1; + unsigned RXF5EN : 1; + unsigned RXF6EN : 1; + unsigned RXF7EN : 1; + }; +} __RXFCON0bits_t; +extern volatile __RXFCON0bits_t __at (0xDD4) RXFCON0bits; + +extern __sfr __at (0xDD5) RXFCON1; +typedef union { + struct { + unsigned RXF8EN : 1; + unsigned RXF9EN : 1; + unsigned RXF10EN : 1; + unsigned RXF11EN : 1; + unsigned RXF12EN : 1; + unsigned RXF13EN : 1; + unsigned RXF14EN : 1; + unsigned RXF15EN : 1; + }; +} __RXFCON1bits_t; +extern volatile __RXFCON1bits_t __at (0xDD5) RXFCON1bits; + +extern __sfr __at (0xDD8) SDFLC; +typedef union { + struct { + unsigned DFLC0 : 1; + unsigned DFLC1 : 1; + unsigned DFLC2 : 1; + unsigned DFLC3 : 1; + unsigned DFLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FLC0 : 1; + unsigned FLC1 : 1; + unsigned FLC2 : 1; + unsigned FLC3 : 1; + unsigned FLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SDFLCbits_t; +extern volatile __SDFLCbits_t __at (0xDD8) SDFLCbits; + +extern __sfr __at (0xDE0) RXFBCON0; +typedef union { + struct { + unsigned F0BP_0 : 1; + unsigned F0BP_1 : 1; + unsigned F0BP_2 : 1; + unsigned F0BP_3 : 1; + unsigned F1BP_0 : 1; + unsigned F1BP_1 : 1; + unsigned F1BP_2 : 1; + unsigned F1BP_3 : 1; + }; +} __RXFBCON0bits_t; +extern volatile __RXFBCON0bits_t __at (0xDE0) RXFBCON0bits; + +extern __sfr __at (0xDE1) RXFBCON1; +typedef union { + struct { + unsigned F2BP_0 : 1; + unsigned F2BP_1 : 1; + unsigned F2BP_2 : 1; + unsigned F2BP_3 : 1; + unsigned F3BP_0 : 1; + unsigned F3BP_1 : 1; + unsigned F3BP_2 : 1; + unsigned F3BP_3 : 1; + }; +} __RXFBCON1bits_t; +extern volatile __RXFBCON1bits_t __at (0xDE1) RXFBCON1bits; + +extern __sfr __at (0xDE2) RXFBCON2; +typedef union { + struct { + unsigned F4BP_0 : 1; + unsigned F4BP_1 : 1; + unsigned F4BP_2 : 1; + unsigned F4BP_3 : 1; + unsigned F5BP_0 : 1; + unsigned F5BP_1 : 1; + unsigned F5BP_2 : 1; + unsigned F5BP_3 : 1; + }; +} __RXFBCON2bits_t; +extern volatile __RXFBCON2bits_t __at (0xDE2) RXFBCON2bits; + +extern __sfr __at (0xDE3) RXFBCON3; +typedef union { + struct { + unsigned F6BP_0 : 1; + unsigned F6BP_1 : 1; + unsigned F6BP_2 : 1; + unsigned F6BP_3 : 1; + unsigned F7BP_0 : 1; + unsigned F7BP_1 : 1; + unsigned F7BP_2 : 1; + unsigned F7BP_3 : 1; + }; +} __RXFBCON3bits_t; +extern volatile __RXFBCON3bits_t __at (0xDE3) RXFBCON3bits; + +extern __sfr __at (0xDE4) RXFBCON4; +typedef union { + struct { + unsigned F8BP_0 : 1; + unsigned F8BP_1 : 1; + unsigned F8BP_2 : 1; + unsigned F8BP_3 : 1; + unsigned F9BP_0 : 1; + unsigned F9BP_1 : 1; + unsigned F9BP_2 : 1; + unsigned F9BP_3 : 1; + }; +} __RXFBCON4bits_t; +extern volatile __RXFBCON4bits_t __at (0xDE4) RXFBCON4bits; + +extern __sfr __at (0xDE5) RXFBCON5; +typedef union { + struct { + unsigned F10BP_0 : 1; + unsigned F10BP_1 : 1; + unsigned F10BP_2 : 1; + unsigned F10BP_3 : 1; + unsigned F11BP_0 : 1; + unsigned F11BP_1 : 1; + unsigned F11BP_2 : 1; + unsigned F11BP_3 : 1; + }; +} __RXFBCON5bits_t; +extern volatile __RXFBCON5bits_t __at (0xDE5) RXFBCON5bits; + +extern __sfr __at (0xDE6) RXFBCON6; +typedef union { + struct { + unsigned F12BP_0 : 1; + unsigned F12BP_1 : 1; + unsigned F12BP_2 : 1; + unsigned F12BP_3 : 1; + unsigned F13BP_0 : 1; + unsigned F13BP_1 : 1; + unsigned F13BP_2 : 1; + unsigned F13BP_3 : 1; + }; +} __RXFBCON6bits_t; +extern volatile __RXFBCON6bits_t __at (0xDE6) RXFBCON6bits; + +extern __sfr __at (0xDE7) RXFBCON7; +typedef union { + struct { + unsigned F14BP_0 : 1; + unsigned F14BP_1 : 1; + unsigned F14BP_2 : 1; + unsigned F14BP_3 : 1; + unsigned F15BP_0 : 1; + unsigned F15BP_1 : 1; + unsigned F15BP_2 : 1; + unsigned F15BP_3 : 1; + }; +} __RXFBCON7bits_t; +extern volatile __RXFBCON7bits_t __at (0xDE7) RXFBCON7bits; + +extern __sfr __at (0xDF0) MSEL0; +typedef union { + struct { + unsigned FIL0_0 : 1; + unsigned FIL0_1 : 1; + unsigned FIL1_0 : 1; + unsigned FIL1_1 : 1; + unsigned FIL2_0 : 1; + unsigned FIL2_1 : 1; + unsigned FIL3_0 : 1; + unsigned FIL3_1 : 1; + }; +} __MSEL0bits_t; +extern volatile __MSEL0bits_t __at (0xDF0) MSEL0bits; + +extern __sfr __at (0xDF1) MSEL1; +typedef union { + struct { + unsigned FIL4_0 : 1; + unsigned FIL4_1 : 1; + unsigned FIL5_0 : 1; + unsigned FIL5_1 : 1; + unsigned FIL6_0 : 1; + unsigned FIL6_1 : 1; + unsigned FIL7_0 : 1; + unsigned FIL7_1 : 1; + }; +} __MSEL1bits_t; +extern volatile __MSEL1bits_t __at (0xDF1) MSEL1bits; + +extern __sfr __at (0xDF2) MSEL2; +typedef union { + struct { + unsigned FIL8_0 : 1; + unsigned FIL8_1 : 1; + unsigned FIL9_0 : 1; + unsigned FIL9_1 : 1; + unsigned FIL10_0 : 1; + unsigned FIL10_1 : 1; + unsigned FIL11_0 : 1; + unsigned FIL11_1 : 1; + }; +} __MSEL2bits_t; +extern volatile __MSEL2bits_t __at (0xDF2) MSEL2bits; + +extern __sfr __at (0xDF3) MSEL3; +typedef union { + struct { + unsigned FIL12_0 : 1; + unsigned FIL12_1 : 1; + unsigned FIL13_0 : 1; + unsigned FIL13_1 : 1; + unsigned FIL14_0 : 1; + unsigned FIL14_1 : 1; + unsigned FIL15_0 : 1; + unsigned FIL15_1 : 1; + }; +} __MSEL3bits_t; +extern volatile __MSEL3bits_t __at (0xDF3) MSEL3bits; + +extern __sfr __at (0xDF8) BSEL0; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned B0TXEN : 1; + unsigned B1TXEN : 1; + unsigned B2TXEN : 1; + unsigned B3TXEN : 1; + unsigned B4TXEN : 1; + unsigned B5TXEN : 1; + }; +} __BSEL0bits_t; +extern volatile __BSEL0bits_t __at (0xDF8) BSEL0bits; + +extern __sfr __at (0xDFA) BIE0; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned B0IE : 1; + unsigned B1IE : 1; + unsigned B2IE : 1; + unsigned B3IE : 1; + unsigned B4IE : 1; + unsigned B5IE : 1; + }; +} __BIE0bits_t; +extern volatile __BIE0bits_t __at (0xDFA) BIE0bits; + +extern __sfr __at (0xDFC) TXBIE; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TXBIEbits_t; +extern volatile __TXBIEbits_t __at (0xDFC) TXBIEbits; + +extern __sfr __at (0xE20) B0CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B0CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0CONbits_t; +extern volatile __B0CONbits_t __at (0xE20) B0CONbits; + +extern __sfr __at (0xE21) B0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B0SIDHbits_t; +extern volatile __B0SIDHbits_t __at (0xE21) B0SIDHbits; + +extern __sfr __at (0xE22) B0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0SIDLbits_t; +extern volatile __B0SIDLbits_t __at (0xE22) B0SIDLbits; + +extern __sfr __at (0xE23) B0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B0EIDHbits_t; +extern volatile __B0EIDHbits_t __at (0xE23) B0EIDHbits; + +extern __sfr __at (0xE24) B0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B0EIDLbits_t; +extern volatile __B0EIDLbits_t __at (0xE24) B0EIDLbits; + +extern __sfr __at (0xE25) B0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B0DLC : 1; + unsigned RB1_B0DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B0DLCbits_t; +extern volatile __B0DLCbits_t __at (0xE25) B0DLCbits; + +extern __sfr __at (0xE26) B0D0; +typedef union { + struct { + unsigned B0D00 : 1; + unsigned B0D01 : 1; + unsigned B0D02 : 1; + unsigned B0D03 : 1; + unsigned B0D04 : 1; + unsigned B0D05 : 1; + unsigned B0D06 : 1; + unsigned B0D07 : 1; + }; +} __B0D0bits_t; +extern volatile __B0D0bits_t __at (0xE26) B0D0bits; + +extern __sfr __at (0xE27) B0D1; +typedef union { + struct { + unsigned B0D10 : 1; + unsigned B0D11 : 1; + unsigned B0D12 : 1; + unsigned B0D13 : 1; + unsigned B0D14 : 1; + unsigned B0D15 : 1; + unsigned B0D16 : 1; + unsigned B0D17 : 1; + }; +} __B0D1bits_t; +extern volatile __B0D1bits_t __at (0xE27) B0D1bits; + +extern __sfr __at (0xE28) B0D2; +typedef union { + struct { + unsigned B0D20 : 1; + unsigned B0D21 : 1; + unsigned B0D22 : 1; + unsigned B0D23 : 1; + unsigned B0D24 : 1; + unsigned B0D25 : 1; + unsigned B0D26 : 1; + unsigned B0D27 : 1; + }; +} __B0D2bits_t; +extern volatile __B0D2bits_t __at (0xE28) B0D2bits; + +extern __sfr __at (0xE29) B0D3; +typedef union { + struct { + unsigned B0D30 : 1; + unsigned B0D31 : 1; + unsigned B0D32 : 1; + unsigned B0D33 : 1; + unsigned B0D34 : 1; + unsigned B0D35 : 1; + unsigned B0D36 : 1; + unsigned B0D37 : 1; + }; +} __B0D3bits_t; +extern volatile __B0D3bits_t __at (0xE29) B0D3bits; + +extern __sfr __at (0xE2A) B0D4; +typedef union { + struct { + unsigned B0D40 : 1; + unsigned B0D41 : 1; + unsigned B0D42 : 1; + unsigned B0D43 : 1; + unsigned B0D44 : 1; + unsigned B0D45 : 1; + unsigned B0D46 : 1; + unsigned B0D47 : 1; + }; +} __B0D4bits_t; +extern volatile __B0D4bits_t __at (0xE2A) B0D4bits; + +extern __sfr __at (0xE2B) B0D5; +typedef union { + struct { + unsigned B0D50 : 1; + unsigned B0D51 : 1; + unsigned B0D52 : 1; + unsigned B0D53 : 1; + unsigned B0D54 : 1; + unsigned B0D55 : 1; + unsigned B0D56 : 1; + unsigned B0D57 : 1; + }; +} __B0D5bits_t; +extern volatile __B0D5bits_t __at (0xE2B) B0D5bits; + +extern __sfr __at (0xE2C) B0D6; +typedef union { + struct { + unsigned B0D60 : 1; + unsigned B0D61 : 1; + unsigned B0D62 : 1; + unsigned B0D63 : 1; + unsigned B0D64 : 1; + unsigned B0D65 : 1; + unsigned B0D66 : 1; + unsigned B0D67 : 1; + }; +} __B0D6bits_t; +extern volatile __B0D6bits_t __at (0xE2C) B0D6bits; + +extern __sfr __at (0xE2D) B0D7; +typedef union { + struct { + unsigned B0D70 : 1; + unsigned B0D71 : 1; + unsigned B0D72 : 1; + unsigned B0D73 : 1; + unsigned B0D74 : 1; + unsigned B0D75 : 1; + unsigned B0D76 : 1; + unsigned B0D77 : 1; + }; +} __B0D7bits_t; +extern volatile __B0D7bits_t __at (0xE2D) B0D7bits; + +extern __sfr __at (0xE2E) CANSTAT_RO9; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO9bits_t; +extern volatile __CANSTAT_RO9bits_t __at (0xE2E) CANSTAT_RO9bits; + +extern __sfr __at (0xE2F) CANCON_RO9; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO9bits_t; +extern volatile __CANCON_RO9bits_t __at (0xE2F) CANCON_RO9bits; + +extern __sfr __at (0xE30) B1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B1CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1CONbits_t; +extern volatile __B1CONbits_t __at (0xE30) B1CONbits; + +extern __sfr __at (0xE31) B1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B1SIDHbits_t; +extern volatile __B1SIDHbits_t __at (0xE31) B1SIDHbits; + +extern __sfr __at (0xE32) B1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1SIDLbits_t; +extern volatile __B1SIDLbits_t __at (0xE32) B1SIDLbits; + +extern __sfr __at (0xE33) B1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B1EIDHbits_t; +extern volatile __B1EIDHbits_t __at (0xE33) B1EIDHbits; + +extern __sfr __at (0xE34) B1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B1EIDLbits_t; +extern volatile __B1EIDLbits_t __at (0xE34) B1EIDLbits; + +extern __sfr __at (0xE35) B1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B1DLC : 1; + unsigned RB1_B1DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B1DLCbits_t; +extern volatile __B1DLCbits_t __at (0xE35) B1DLCbits; + +extern __sfr __at (0xE36) B1D0; +typedef union { + struct { + unsigned B1D00 : 1; + unsigned B1D01 : 1; + unsigned B1D02 : 1; + unsigned B1D03 : 1; + unsigned B1D04 : 1; + unsigned B1D05 : 1; + unsigned B1D06 : 1; + unsigned B1D07 : 1; + }; +} __B1D0bits_t; +extern volatile __B1D0bits_t __at (0xE36) B1D0bits; + +extern __sfr __at (0xE37) B1D1; +typedef union { + struct { + unsigned B1D10 : 1; + unsigned B1D11 : 1; + unsigned B1D12 : 1; + unsigned B1D13 : 1; + unsigned B1D14 : 1; + unsigned B1D15 : 1; + unsigned B1D16 : 1; + unsigned B1D17 : 1; + }; +} __B1D1bits_t; +extern volatile __B1D1bits_t __at (0xE37) B1D1bits; + +extern __sfr __at (0xE38) B1D2; +typedef union { + struct { + unsigned B1D20 : 1; + unsigned B1D21 : 1; + unsigned B1D22 : 1; + unsigned B1D23 : 1; + unsigned B1D24 : 1; + unsigned B1D25 : 1; + unsigned B1D26 : 1; + unsigned B1D27 : 1; + }; +} __B1D2bits_t; +extern volatile __B1D2bits_t __at (0xE38) B1D2bits; + +extern __sfr __at (0xE39) B1D3; +typedef union { + struct { + unsigned B1D30 : 1; + unsigned B1D31 : 1; + unsigned B1D32 : 1; + unsigned B1D33 : 1; + unsigned B1D34 : 1; + unsigned B1D35 : 1; + unsigned B1D36 : 1; + unsigned B1D37 : 1; + }; +} __B1D3bits_t; +extern volatile __B1D3bits_t __at (0xE39) B1D3bits; + +extern __sfr __at (0xE3A) B1D4; +typedef union { + struct { + unsigned B1D40 : 1; + unsigned B1D41 : 1; + unsigned B1D42 : 1; + unsigned B1D43 : 1; + unsigned B1D44 : 1; + unsigned B1D45 : 1; + unsigned B1D46 : 1; + unsigned B1D47 : 1; + }; +} __B1D4bits_t; +extern volatile __B1D4bits_t __at (0xE3A) B1D4bits; + +extern __sfr __at (0xE3B) B1D5; +typedef union { + struct { + unsigned B1D50 : 1; + unsigned B1D51 : 1; + unsigned B1D52 : 1; + unsigned B1D53 : 1; + unsigned B1D54 : 1; + unsigned B1D55 : 1; + unsigned B1D56 : 1; + unsigned B1D57 : 1; + }; +} __B1D5bits_t; +extern volatile __B1D5bits_t __at (0xE3B) B1D5bits; + +extern __sfr __at (0xE3C) B1D6; +typedef union { + struct { + unsigned B1D60 : 1; + unsigned B1D61 : 1; + unsigned B1D62 : 1; + unsigned B1D63 : 1; + unsigned B1D64 : 1; + unsigned B1D65 : 1; + unsigned B1D66 : 1; + unsigned B1D67 : 1; + }; +} __B1D6bits_t; +extern volatile __B1D6bits_t __at (0xE3C) B1D6bits; + +extern __sfr __at (0xE3D) B1D7; +typedef union { + struct { + unsigned B1D70 : 1; + unsigned B1D71 : 1; + unsigned B1D72 : 1; + unsigned B1D73 : 1; + unsigned B1D74 : 1; + unsigned B1D75 : 1; + unsigned B1D76 : 1; + unsigned B1D77 : 1; + }; +} __B1D7bits_t; +extern volatile __B1D7bits_t __at (0xE3D) B1D7bits; + +extern __sfr __at (0xE3E) CANSTAT_RO8; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO8bits_t; +extern volatile __CANSTAT_RO8bits_t __at (0xE3E) CANSTAT_RO8bits; + +extern __sfr __at (0xE3F) CANCON_RO8; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO8bits_t; +extern volatile __CANCON_RO8bits_t __at (0xE3F) CANCON_RO8bits; + +extern __sfr __at (0xE40) B2CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B2CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2CONbits_t; +extern volatile __B2CONbits_t __at (0xE40) B2CONbits; + +extern __sfr __at (0xE41) B2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B2SIDHbits_t; +extern volatile __B2SIDHbits_t __at (0xE41) B2SIDHbits; + +extern __sfr __at (0xE42) B2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2SIDLbits_t; +extern volatile __B2SIDLbits_t __at (0xE42) B2SIDLbits; + +extern __sfr __at (0xE43) B2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B2EIDHbits_t; +extern volatile __B2EIDHbits_t __at (0xE43) B2EIDHbits; + +extern __sfr __at (0xE44) B2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B2EIDLbits_t; +extern volatile __B2EIDLbits_t __at (0xE44) B2EIDLbits; + +extern __sfr __at (0xE45) B2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B2DLC : 1; + unsigned RB1_B2DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B2DLCbits_t; +extern volatile __B2DLCbits_t __at (0xE45) B2DLCbits; + +extern __sfr __at (0xE46) B2D0; +typedef union { + struct { + unsigned B2D00 : 1; + unsigned B2D01 : 1; + unsigned B2D02 : 1; + unsigned B2D03 : 1; + unsigned B2D04 : 1; + unsigned B2D05 : 1; + unsigned B2D06 : 1; + unsigned B2D07 : 1; + }; +} __B2D0bits_t; +extern volatile __B2D0bits_t __at (0xE46) B2D0bits; + +extern __sfr __at (0xE47) B2D1; +typedef union { + struct { + unsigned B2D10 : 1; + unsigned B2D11 : 1; + unsigned B2D12 : 1; + unsigned B2D13 : 1; + unsigned B2D14 : 1; + unsigned B2D15 : 1; + unsigned B2D16 : 1; + unsigned B2D17 : 1; + }; +} __B2D1bits_t; +extern volatile __B2D1bits_t __at (0xE47) B2D1bits; + +extern __sfr __at (0xE48) B2D2; +typedef union { + struct { + unsigned B2D20 : 1; + unsigned B2D21 : 1; + unsigned B2D22 : 1; + unsigned B2D23 : 1; + unsigned B2D24 : 1; + unsigned B2D25 : 1; + unsigned B2D26 : 1; + unsigned B2D27 : 1; + }; +} __B2D2bits_t; +extern volatile __B2D2bits_t __at (0xE48) B2D2bits; + +extern __sfr __at (0xE49) B2D3; +typedef union { + struct { + unsigned B2D30 : 1; + unsigned B2D31 : 1; + unsigned B2D32 : 1; + unsigned B2D33 : 1; + unsigned B2D34 : 1; + unsigned B2D35 : 1; + unsigned B2D36 : 1; + unsigned B2D37 : 1; + }; +} __B2D3bits_t; +extern volatile __B2D3bits_t __at (0xE49) B2D3bits; + +extern __sfr __at (0xE4A) B2D4; +typedef union { + struct { + unsigned B2D40 : 1; + unsigned B2D41 : 1; + unsigned B2D42 : 1; + unsigned B2D43 : 1; + unsigned B2D44 : 1; + unsigned B2D45 : 1; + unsigned B2D46 : 1; + unsigned B2D47 : 1; + }; +} __B2D4bits_t; +extern volatile __B2D4bits_t __at (0xE4A) B2D4bits; + +extern __sfr __at (0xE4B) B2D5; +typedef union { + struct { + unsigned B2D50 : 1; + unsigned B2D51 : 1; + unsigned B2D52 : 1; + unsigned B2D53 : 1; + unsigned B2D54 : 1; + unsigned B2D55 : 1; + unsigned B2D56 : 1; + unsigned B2D57 : 1; + }; +} __B2D5bits_t; +extern volatile __B2D5bits_t __at (0xE4B) B2D5bits; + +extern __sfr __at (0xE4C) B2D6; +typedef union { + struct { + unsigned B2D60 : 1; + unsigned B2D61 : 1; + unsigned B2D62 : 1; + unsigned B2D63 : 1; + unsigned B2D64 : 1; + unsigned B2D65 : 1; + unsigned B2D66 : 1; + unsigned B2D67 : 1; + }; +} __B2D6bits_t; +extern volatile __B2D6bits_t __at (0xE4C) B2D6bits; + +extern __sfr __at (0xE4D) B2D7; +typedef union { + struct { + unsigned B2D70 : 1; + unsigned B2D71 : 1; + unsigned B2D72 : 1; + unsigned B2D73 : 1; + unsigned B2D74 : 1; + unsigned B2D75 : 1; + unsigned B2D76 : 1; + unsigned B2D77 : 1; + }; +} __B2D7bits_t; +extern volatile __B2D7bits_t __at (0xE4D) B2D7bits; + +extern __sfr __at (0xE4E) CANSTAT_RO7; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO7bits_t; +extern volatile __CANSTAT_RO7bits_t __at (0xE4E) CANSTAT_RO7bits; + +extern __sfr __at (0xE4F) CANCON_RO7; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO7bits_t; +extern volatile __CANCON_RO7bits_t __at (0xE4F) CANCON_RO7bits; + +extern __sfr __at (0xE50) B3CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B3CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3CONbits_t; +extern volatile __B3CONbits_t __at (0xE50) B3CONbits; + +extern __sfr __at (0xE51) B3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B3SIDHbits_t; +extern volatile __B3SIDHbits_t __at (0xE51) B3SIDHbits; + +extern __sfr __at (0xE52) B3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3SIDLbits_t; +extern volatile __B3SIDLbits_t __at (0xE52) B3SIDLbits; + +extern __sfr __at (0xE53) B3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B3EIDHbits_t; +extern volatile __B3EIDHbits_t __at (0xE53) B3EIDHbits; + +extern __sfr __at (0xE54) B3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B3EIDLbits_t; +extern volatile __B3EIDLbits_t __at (0xE54) B3EIDLbits; + +extern __sfr __at (0xE55) B3DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B3DLC : 1; + unsigned RB1_B3DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B3DLCbits_t; +extern volatile __B3DLCbits_t __at (0xE55) B3DLCbits; + +extern __sfr __at (0xE56) B3D0; +typedef union { + struct { + unsigned B3D00 : 1; + unsigned B3D01 : 1; + unsigned B3D02 : 1; + unsigned B3D03 : 1; + unsigned B3D04 : 1; + unsigned B3D05 : 1; + unsigned B3D06 : 1; + unsigned B3D07 : 1; + }; +} __B3D0bits_t; +extern volatile __B3D0bits_t __at (0xE56) B3D0bits; + +extern __sfr __at (0xE57) B3D1; +typedef union { + struct { + unsigned B3D10 : 1; + unsigned B3D11 : 1; + unsigned B3D12 : 1; + unsigned B3D13 : 1; + unsigned B3D14 : 1; + unsigned B3D15 : 1; + unsigned B3D16 : 1; + unsigned B3D17 : 1; + }; +} __B3D1bits_t; +extern volatile __B3D1bits_t __at (0xE57) B3D1bits; + +extern __sfr __at (0xE58) B3D2; +typedef union { + struct { + unsigned B3D20 : 1; + unsigned B3D21 : 1; + unsigned B3D22 : 1; + unsigned B3D23 : 1; + unsigned B3D24 : 1; + unsigned B3D25 : 1; + unsigned B3D26 : 1; + unsigned B3D27 : 1; + }; +} __B3D2bits_t; +extern volatile __B3D2bits_t __at (0xE58) B3D2bits; + +extern __sfr __at (0xE59) B3D3; +typedef union { + struct { + unsigned B3D30 : 1; + unsigned B3D31 : 1; + unsigned B3D32 : 1; + unsigned B3D33 : 1; + unsigned B3D34 : 1; + unsigned B3D35 : 1; + unsigned B3D36 : 1; + unsigned B3D37 : 1; + }; +} __B3D3bits_t; +extern volatile __B3D3bits_t __at (0xE59) B3D3bits; + +extern __sfr __at (0xE5A) B3D4; +typedef union { + struct { + unsigned B3D40 : 1; + unsigned B3D41 : 1; + unsigned B3D42 : 1; + unsigned B3D43 : 1; + unsigned B3D44 : 1; + unsigned B3D45 : 1; + unsigned B3D46 : 1; + unsigned B3D47 : 1; + }; +} __B3D4bits_t; +extern volatile __B3D4bits_t __at (0xE5A) B3D4bits; + +extern __sfr __at (0xE5B) B3D5; +typedef union { + struct { + unsigned B3D50 : 1; + unsigned B3D51 : 1; + unsigned B3D52 : 1; + unsigned B3D53 : 1; + unsigned B3D54 : 1; + unsigned B3D55 : 1; + unsigned B3D56 : 1; + unsigned B3D57 : 1; + }; +} __B3D5bits_t; +extern volatile __B3D5bits_t __at (0xE5B) B3D5bits; + +extern __sfr __at (0xE5C) B3D6; +typedef union { + struct { + unsigned B3D60 : 1; + unsigned B3D61 : 1; + unsigned B3D62 : 1; + unsigned B3D63 : 1; + unsigned B3D64 : 1; + unsigned B3D65 : 1; + unsigned B3D66 : 1; + unsigned B3D67 : 1; + }; +} __B3D6bits_t; +extern volatile __B3D6bits_t __at (0xE5C) B3D6bits; + +extern __sfr __at (0xE5D) B3D7; +typedef union { + struct { + unsigned B3D70 : 1; + unsigned B3D71 : 1; + unsigned B3D72 : 1; + unsigned B3D73 : 1; + unsigned B3D74 : 1; + unsigned B3D75 : 1; + unsigned B3D76 : 1; + unsigned B3D77 : 1; + }; +} __B3D7bits_t; +extern volatile __B3D7bits_t __at (0xE5D) B3D7bits; + +extern __sfr __at (0xE5E) CANSTAT_RO6; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO6bits_t; +extern volatile __CANSTAT_RO6bits_t __at (0xE5E) CANSTAT_RO6bits; + +extern __sfr __at (0xE5F) CANCON_RO6; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO6bits_t; +extern volatile __CANCON_RO6bits_t __at (0xE5F) CANCON_RO6bits; + +extern __sfr __at (0xE60) B4CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B4CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4CONbits_t; +extern volatile __B4CONbits_t __at (0xE60) B4CONbits; + +extern __sfr __at (0xE61) B4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B4SIDHbits_t; +extern volatile __B4SIDHbits_t __at (0xE61) B4SIDHbits; + +extern __sfr __at (0xE62) B4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4SIDLbits_t; +extern volatile __B4SIDLbits_t __at (0xE62) B4SIDLbits; + +extern __sfr __at (0xE63) B4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B4EIDHbits_t; +extern volatile __B4EIDHbits_t __at (0xE63) B4EIDHbits; + +extern __sfr __at (0xE64) B4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B4EIDLbits_t; +extern volatile __B4EIDLbits_t __at (0xE64) B4EIDLbits; + +extern __sfr __at (0xE65) B4DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B4DLC : 1; + unsigned RB1_B4DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B4DLCbits_t; +extern volatile __B4DLCbits_t __at (0xE65) B4DLCbits; + +extern __sfr __at (0xE66) B4D0; +typedef union { + struct { + unsigned B4D00 : 1; + unsigned B4D01 : 1; + unsigned B4D02 : 1; + unsigned B4D03 : 1; + unsigned B4D04 : 1; + unsigned B4D05 : 1; + unsigned B4D06 : 1; + unsigned B4D07 : 1; + }; +} __B4D0bits_t; +extern volatile __B4D0bits_t __at (0xE66) B4D0bits; + +extern __sfr __at (0xE67) B4D1; +typedef union { + struct { + unsigned B4D10 : 1; + unsigned B4D11 : 1; + unsigned B4D12 : 1; + unsigned B4D13 : 1; + unsigned B4D14 : 1; + unsigned B4D15 : 1; + unsigned B4D16 : 1; + unsigned B4D17 : 1; + }; +} __B4D1bits_t; +extern volatile __B4D1bits_t __at (0xE67) B4D1bits; + +extern __sfr __at (0xE68) B4D2; +typedef union { + struct { + unsigned B4D20 : 1; + unsigned B4D21 : 1; + unsigned B4D22 : 1; + unsigned B4D23 : 1; + unsigned B4D24 : 1; + unsigned B4D25 : 1; + unsigned B4D26 : 1; + unsigned B4D27 : 1; + }; +} __B4D2bits_t; +extern volatile __B4D2bits_t __at (0xE68) B4D2bits; + +extern __sfr __at (0xE69) B4D3; +typedef union { + struct { + unsigned B4D30 : 1; + unsigned B4D31 : 1; + unsigned B4D32 : 1; + unsigned B4D33 : 1; + unsigned B4D34 : 1; + unsigned B4D35 : 1; + unsigned B4D36 : 1; + unsigned B4D37 : 1; + }; +} __B4D3bits_t; +extern volatile __B4D3bits_t __at (0xE69) B4D3bits; + +extern __sfr __at (0xE6A) B4D4; +typedef union { + struct { + unsigned B4D40 : 1; + unsigned B4D41 : 1; + unsigned B4D42 : 1; + unsigned B4D43 : 1; + unsigned B4D44 : 1; + unsigned B4D45 : 1; + unsigned B4D46 : 1; + unsigned B4D47 : 1; + }; +} __B4D4bits_t; +extern volatile __B4D4bits_t __at (0xE6A) B4D4bits; + +extern __sfr __at (0xE6B) B4D5; +typedef union { + struct { + unsigned B4D50 : 1; + unsigned B4D51 : 1; + unsigned B4D52 : 1; + unsigned B4D53 : 1; + unsigned B4D54 : 1; + unsigned B4D55 : 1; + unsigned B4D56 : 1; + unsigned B4D57 : 1; + }; +} __B4D5bits_t; +extern volatile __B4D5bits_t __at (0xE6B) B4D5bits; + +extern __sfr __at (0xE6C) B4D6; +typedef union { + struct { + unsigned B4D60 : 1; + unsigned B4D61 : 1; + unsigned B4D62 : 1; + unsigned B4D63 : 1; + unsigned B4D64 : 1; + unsigned B4D65 : 1; + unsigned B4D66 : 1; + unsigned B4D67 : 1; + }; +} __B4D6bits_t; +extern volatile __B4D6bits_t __at (0xE6C) B4D6bits; + +extern __sfr __at (0xE6D) B4D7; +typedef union { + struct { + unsigned B4D70 : 1; + unsigned B4D71 : 1; + unsigned B4D72 : 1; + unsigned B4D73 : 1; + unsigned B4D74 : 1; + unsigned B4D75 : 1; + unsigned B4D76 : 1; + unsigned B46D77 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B4D77 : 1; + }; +} __B4D7bits_t; +extern volatile __B4D7bits_t __at (0xE6D) B4D7bits; + +extern __sfr __at (0xE6E) CANSTAT_RO5; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO5bits_t; +extern volatile __CANSTAT_RO5bits_t __at (0xE6E) CANSTAT_RO5bits; + +extern __sfr __at (0xE6F) CANCON_RO5; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO5bits_t; +extern volatile __CANCON_RO5bits_t __at (0xE6F) CANCON_RO5bits; + +extern __sfr __at (0xE70) B5CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B5CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5CONbits_t; +extern volatile __B5CONbits_t __at (0xE70) B5CONbits; + +extern __sfr __at (0xE71) B5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B5SIDHbits_t; +extern volatile __B5SIDHbits_t __at (0xE71) B5SIDHbits; + +extern __sfr __at (0xE72) B5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5SIDLbits_t; +extern volatile __B5SIDLbits_t __at (0xE72) B5SIDLbits; + +extern __sfr __at (0xE73) B5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B5EIDHbits_t; +extern volatile __B5EIDHbits_t __at (0xE73) B5EIDHbits; + +extern __sfr __at (0xE74) B5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B5EIDLbits_t; +extern volatile __B5EIDLbits_t __at (0xE74) B5EIDLbits; + +extern __sfr __at (0xE75) B5DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B5DLC : 1; + unsigned RB1_B5DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5DLCbits_t; +extern volatile __B5DLCbits_t __at (0xE75) B5DLCbits; + +extern __sfr __at (0xE76) B5D0; +typedef union { + struct { + unsigned B5D00 : 1; + unsigned B5D01 : 1; + unsigned B5D02 : 1; + unsigned B5D03 : 1; + unsigned B5D04 : 1; + unsigned B5D05 : 1; + unsigned B5D06 : 1; + unsigned B57D07 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D07 : 1; + }; +} __B5D0bits_t; +extern volatile __B5D0bits_t __at (0xE76) B5D0bits; + +extern __sfr __at (0xE77) B5D1; +typedef union { + struct { + unsigned B5D10 : 1; + unsigned B5D11 : 1; + unsigned B5D12 : 1; + unsigned B5D13 : 1; + unsigned B5D14 : 1; + unsigned B5D15 : 1; + unsigned B5D16 : 1; + unsigned B5D17 : 1; + }; +} __B5D1bits_t; +extern volatile __B5D1bits_t __at (0xE77) B5D1bits; + +extern __sfr __at (0xE78) B5D2; +typedef union { + struct { + unsigned B5D20 : 1; + unsigned B5D21 : 1; + unsigned B5D22 : 1; + unsigned B57D23 : 1; + unsigned B5D24 : 1; + unsigned B5D25 : 1; + unsigned B5D26 : 1; + unsigned B5D27 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D23 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5D2bits_t; +extern volatile __B5D2bits_t __at (0xE78) B5D2bits; + +extern __sfr __at (0xE79) B5D3; +typedef union { + struct { + unsigned B5D30 : 1; + unsigned B5D31 : 1; + unsigned B5D32 : 1; + unsigned B5D33 : 1; + unsigned B5D34 : 1; + unsigned B5D35 : 1; + unsigned B5D36 : 1; + unsigned B5D37 : 1; + }; +} __B5D3bits_t; +extern volatile __B5D3bits_t __at (0xE79) B5D3bits; + +extern __sfr __at (0xE7A) B5D4; +typedef union { + struct { + unsigned B5D40 : 1; + unsigned B5D41 : 1; + unsigned B5D42 : 1; + unsigned B5D43 : 1; + unsigned B5D44 : 1; + unsigned B5D45 : 1; + unsigned B5D46 : 1; + unsigned B5D47 : 1; + }; +} __B5D4bits_t; +extern volatile __B5D4bits_t __at (0xE7A) B5D4bits; + +extern __sfr __at (0xE7B) B5D5; +typedef union { + struct { + unsigned B5D50 : 1; + unsigned B5D51 : 1; + unsigned B5D52 : 1; + unsigned B5D53 : 1; + unsigned B5D54 : 1; + unsigned B5D55 : 1; + unsigned B5D56 : 1; + unsigned B5D57 : 1; + }; +} __B5D5bits_t; +extern volatile __B5D5bits_t __at (0xE7B) B5D5bits; + +extern __sfr __at (0xE7C) B5D6; +typedef union { + struct { + unsigned B5D60 : 1; + unsigned B5D61 : 1; + unsigned B5D62 : 1; + unsigned B5D63 : 1; + unsigned B5D64 : 1; + unsigned B5D65 : 1; + unsigned B5D66 : 1; + unsigned B5D67 : 1; + }; +} __B5D6bits_t; +extern volatile __B5D6bits_t __at (0xE7C) B5D6bits; + +extern __sfr __at (0xE7D) B5D7; +typedef union { + struct { + unsigned B5D70 : 1; + unsigned B5D71 : 1; + unsigned B5D72 : 1; + unsigned B5D73 : 1; + unsigned B5D74 : 1; + unsigned B5D75 : 1; + unsigned B5D76 : 1; + unsigned B5D77 : 1; + }; +} __B5D7bits_t; +extern volatile __B5D7bits_t __at (0xE7D) B5D7bits; + +extern __sfr __at (0xE7E) CANSTAT_RO4; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO4bits_t; +extern volatile __CANSTAT_RO4bits_t __at (0xE7E) CANSTAT_RO4bits; + +extern __sfr __at (0xE7F) CANCON_RO4; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO4bits_t; +extern volatile __CANCON_RO4bits_t __at (0xE7F) CANCON_RO4bits; + +extern __sfr __at (0xF00) RXF0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF0SIDHbits_t; +extern volatile __RXF0SIDHbits_t __at (0xF00) RXF0SIDHbits; + +extern __sfr __at (0xF01) RXF0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF0SIDLbits_t; +extern volatile __RXF0SIDLbits_t __at (0xF01) RXF0SIDLbits; + +extern __sfr __at (0xF02) RXF0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF0EIDHbits_t; +extern volatile __RXF0EIDHbits_t __at (0xF02) RXF0EIDHbits; + +extern __sfr __at (0xF03) RXF0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF0EIDLbits_t; +extern volatile __RXF0EIDLbits_t __at (0xF03) RXF0EIDLbits; + +extern __sfr __at (0xF04) RXF1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF1SIDHbits_t; +extern volatile __RXF1SIDHbits_t __at (0xF04) RXF1SIDHbits; + +extern __sfr __at (0xF05) RXF1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF1SIDLbits_t; +extern volatile __RXF1SIDLbits_t __at (0xF05) RXF1SIDLbits; + +extern __sfr __at (0xF06) RXF1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF1EIDHbits_t; +extern volatile __RXF1EIDHbits_t __at (0xF06) RXF1EIDHbits; + +extern __sfr __at (0xF07) RXF1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF1EIDLbits_t; +extern volatile __RXF1EIDLbits_t __at (0xF07) RXF1EIDLbits; + +extern __sfr __at (0xF08) RXF2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF2SIDHbits_t; +extern volatile __RXF2SIDHbits_t __at (0xF08) RXF2SIDHbits; + +extern __sfr __at (0xF09) RXF2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF2SIDLbits_t; +extern volatile __RXF2SIDLbits_t __at (0xF09) RXF2SIDLbits; + +extern __sfr __at (0xF0A) RXF2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF2EIDHbits_t; +extern volatile __RXF2EIDHbits_t __at (0xF0A) RXF2EIDHbits; + +extern __sfr __at (0xF0B) RXF2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF2EIDLbits_t; +extern volatile __RXF2EIDLbits_t __at (0xF0B) RXF2EIDLbits; + +extern __sfr __at (0xF0C) RXF3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF3SIDHbits_t; +extern volatile __RXF3SIDHbits_t __at (0xF0C) RXF3SIDHbits; + +extern __sfr __at (0xF0D) RXF3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF3SIDLbits_t; +extern volatile __RXF3SIDLbits_t __at (0xF0D) RXF3SIDLbits; + +extern __sfr __at (0xF0E) RXF3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF3EIDHbits_t; +extern volatile __RXF3EIDHbits_t __at (0xF0E) RXF3EIDHbits; + +extern __sfr __at (0xF0F) RXF3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF3EIDLbits_t; +extern volatile __RXF3EIDLbits_t __at (0xF0F) RXF3EIDLbits; + +extern __sfr __at (0xF10) RXF4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF4SIDHbits_t; +extern volatile __RXF4SIDHbits_t __at (0xF10) RXF4SIDHbits; + +extern __sfr __at (0xF11) RXF4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF4SIDLbits_t; +extern volatile __RXF4SIDLbits_t __at (0xF11) RXF4SIDLbits; + +extern __sfr __at (0xF12) RXF4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF4EIDHbits_t; +extern volatile __RXF4EIDHbits_t __at (0xF12) RXF4EIDHbits; + +extern __sfr __at (0xF13) RXF4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF4EIDLbits_t; +extern volatile __RXF4EIDLbits_t __at (0xF13) RXF4EIDLbits; + +extern __sfr __at (0xF14) RXF5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF5SIDHbits_t; +extern volatile __RXF5SIDHbits_t __at (0xF14) RXF5SIDHbits; + +extern __sfr __at (0xF15) RXF5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF5SIDLbits_t; +extern volatile __RXF5SIDLbits_t __at (0xF15) RXF5SIDLbits; + +extern __sfr __at (0xF16) RXF5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF5EIDHbits_t; +extern volatile __RXF5EIDHbits_t __at (0xF16) RXF5EIDHbits; + +extern __sfr __at (0xF17) RXF5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF5EIDLbits_t; +extern volatile __RXF5EIDLbits_t __at (0xF17) RXF5EIDLbits; + +extern __sfr __at (0xF18) RXM0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM0SIDHbits_t; +extern volatile __RXM0SIDHbits_t __at (0xF18) RXM0SIDHbits; + +extern __sfr __at (0xF19) RXM0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM0SIDLbits_t; +extern volatile __RXM0SIDLbits_t __at (0xF19) RXM0SIDLbits; + +extern __sfr __at (0xF1A) RXM0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM0EIDHbits_t; +extern volatile __RXM0EIDHbits_t __at (0xF1A) RXM0EIDHbits; + +extern __sfr __at (0xF1B) RXM0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM0EIDLbits_t; +extern volatile __RXM0EIDLbits_t __at (0xF1B) RXM0EIDLbits; + +extern __sfr __at (0xF1C) RXM1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM1SIDHbits_t; +extern volatile __RXM1SIDHbits_t __at (0xF1C) RXM1SIDHbits; + +extern __sfr __at (0xF1D) RXM1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM1SIDLbits_t; +extern volatile __RXM1SIDLbits_t __at (0xF1D) RXM1SIDLbits; + +extern __sfr __at (0xF1E) RXM1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM1EIDHbits_t; +extern volatile __RXM1EIDHbits_t __at (0xF1E) RXM1EIDHbits; + +extern __sfr __at (0xF1F) RXM1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM1EIDLbits_t; +extern volatile __RXM1EIDLbits_t __at (0xF1F) RXM1EIDLbits; + +extern __sfr __at (0xF20) TXB2CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFBXB2CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB2CONbits_t; +extern volatile __TXB2CONbits_t __at (0xF20) TXB2CONbits; + +extern __sfr __at (0xF21) TXB2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB2SIDHbits_t; +extern volatile __TXB2SIDHbits_t __at (0xF21) TXB2SIDHbits; + +extern __sfr __at (0xF22) TXB2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB2SIDLbits_t; +extern volatile __TXB2SIDLbits_t __at (0xF22) TXB2SIDLbits; + +extern __sfr __at (0xF23) TXB2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB2EIDHbits_t; +extern volatile __TXB2EIDHbits_t __at (0xF23) TXB2EIDHbits; + +extern __sfr __at (0xF24) TXB2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB2EIDLbits_t; +extern volatile __TXB2EIDLbits_t __at (0xF24) TXB2EIDLbits; + +extern __sfr __at (0xF25) TXB2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB2DLCbits_t; +extern volatile __TXB2DLCbits_t __at (0xF25) TXB2DLCbits; + +extern __sfr __at (0xF26) TXB2D0; +typedef union { + struct { + unsigned TXB2D00 : 1; + unsigned TXB2D01 : 1; + unsigned TXB2D02 : 1; + unsigned TXB2D03 : 1; + unsigned TXB2D04 : 1; + unsigned TXB2D05 : 1; + unsigned TXB2D06 : 1; + unsigned TXB2D07 : 1; + }; +} __TXB2D0bits_t; +extern volatile __TXB2D0bits_t __at (0xF26) TXB2D0bits; + +extern __sfr __at (0xF27) TXB2D1; +typedef union { + struct { + unsigned TXB2D10 : 1; + unsigned TXB2D11 : 1; + unsigned TXB2D12 : 1; + unsigned TXB2D13 : 1; + unsigned TXB2D14 : 1; + unsigned TXB2D15 : 1; + unsigned TXB2D16 : 1; + unsigned TXB2D17 : 1; + }; +} __TXB2D1bits_t; +extern volatile __TXB2D1bits_t __at (0xF27) TXB2D1bits; + +extern __sfr __at (0xF28) TXB2D2; +typedef union { + struct { + unsigned TXB2D20 : 1; + unsigned TXB2D21 : 1; + unsigned TXB2D22 : 1; + unsigned TXB2D23 : 1; + unsigned TXB2D24 : 1; + unsigned TXB2D25 : 1; + unsigned TXB2D26 : 1; + unsigned TXB2D27 : 1; + }; +} __TXB2D2bits_t; +extern volatile __TXB2D2bits_t __at (0xF28) TXB2D2bits; + +extern __sfr __at (0xF29) TXB2D3; +typedef union { + struct { + unsigned TXB2D30 : 1; + unsigned TXB2D31 : 1; + unsigned TXB2D32 : 1; + unsigned TXB2D33 : 1; + unsigned TXB2D34 : 1; + unsigned TXB2D35 : 1; + unsigned TXB2D36 : 1; + unsigned TXB2D37 : 1; + }; +} __TXB2D3bits_t; +extern volatile __TXB2D3bits_t __at (0xF29) TXB2D3bits; + +extern __sfr __at (0xF2A) TXB2D4; +typedef union { + struct { + unsigned TXB2D40 : 1; + unsigned TXB2D41 : 1; + unsigned TXB2D42 : 1; + unsigned TXB2D43 : 1; + unsigned TXB2D44 : 1; + unsigned TXB2D45 : 1; + unsigned TXB2D46 : 1; + unsigned TXB2D47 : 1; + }; +} __TXB2D4bits_t; +extern volatile __TXB2D4bits_t __at (0xF2A) TXB2D4bits; + +extern __sfr __at (0xF2B) TXB2D5; +typedef union { + struct { + unsigned TXB2D50 : 1; + unsigned TXB2D51 : 1; + unsigned TXB2D52 : 1; + unsigned TXB2D53 : 1; + unsigned TXB2D54 : 1; + unsigned TXB2D55 : 1; + unsigned TXB2D56 : 1; + unsigned TXB2D57 : 1; + }; +} __TXB2D5bits_t; +extern volatile __TXB2D5bits_t __at (0xF2B) TXB2D5bits; + +extern __sfr __at (0xF2C) TXB2D6; +typedef union { + struct { + unsigned TXB2D60 : 1; + unsigned TXB2D61 : 1; + unsigned TXB2D62 : 1; + unsigned TXB2D63 : 1; + unsigned TXB2D64 : 1; + unsigned TXB2D65 : 1; + unsigned TXB2D66 : 1; + unsigned TXB2D67 : 1; + }; +} __TXB2D6bits_t; +extern volatile __TXB2D6bits_t __at (0xF2C) TXB2D6bits; + +extern __sfr __at (0xF2D) TXB2D7; +typedef union { + struct { + unsigned TXB2D70 : 1; + unsigned TXB2D71 : 1; + unsigned TXB2D72 : 1; + unsigned TXB2D73 : 1; + unsigned TXB2D74 : 1; + unsigned TXB2D75 : 1; + unsigned TXB2D76 : 1; + unsigned TXB2D77 : 1; + }; +} __TXB2D7bits_t; +extern volatile __TXB2D7bits_t __at (0xF2D) TXB2D7bits; + +extern __sfr __at (0xF2E) CANSTAT_RO3; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO3bits_t; +extern volatile __CANSTAT_RO3bits_t __at (0xF2E) CANSTAT_RO3bits; + +extern __sfr __at (0xF2F) CANCON_RO3; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO3bits_t; +extern volatile __CANCON_RO3bits_t __at (0xF2F) CANCON_RO3bits; + +extern __sfr __at (0xF30) TXB1CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFTXB1CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB1CONbits_t; +extern volatile __TXB1CONbits_t __at (0xF30) TXB1CONbits; + +extern __sfr __at (0xF31) TXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB1SIDHbits_t; +extern volatile __TXB1SIDHbits_t __at (0xF31) TXB1SIDHbits; + +extern __sfr __at (0xF32) TXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB1SIDLbits_t; +extern volatile __TXB1SIDLbits_t __at (0xF32) TXB1SIDLbits; + +extern __sfr __at (0xF33) TXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB1EIDHbits_t; +extern volatile __TXB1EIDHbits_t __at (0xF33) TXB1EIDHbits; + +extern __sfr __at (0xF34) TXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB1EIDLbits_t; +extern volatile __TXB1EIDLbits_t __at (0xF34) TXB1EIDLbits; + +extern __sfr __at (0xF35) TXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB1DLCbits_t; +extern volatile __TXB1DLCbits_t __at (0xF35) TXB1DLCbits; + +extern __sfr __at (0xF36) TXB1D0; +typedef union { + struct { + unsigned TXB1D00 : 1; + unsigned TXB1D01 : 1; + unsigned TXB1D02 : 1; + unsigned TXB1D03 : 1; + unsigned TXB1D04 : 1; + unsigned TXB1D05 : 1; + unsigned TXB1D06 : 1; + unsigned TXB1D07 : 1; + }; +} __TXB1D0bits_t; +extern volatile __TXB1D0bits_t __at (0xF36) TXB1D0bits; + +extern __sfr __at (0xF37) TXB1D1; +typedef union { + struct { + unsigned TXB1D10 : 1; + unsigned TXB1D11 : 1; + unsigned TXB1D12 : 1; + unsigned TXB1D13 : 1; + unsigned TXB1D14 : 1; + unsigned TXB1D15 : 1; + unsigned TXB1D16 : 1; + unsigned TXB1D17 : 1; + }; +} __TXB1D1bits_t; +extern volatile __TXB1D1bits_t __at (0xF37) TXB1D1bits; + +extern __sfr __at (0xF38) TXB1D2; +typedef union { + struct { + unsigned TXB1D20 : 1; + unsigned TXB1D21 : 1; + unsigned TXB1D22 : 1; + unsigned TXB1D23 : 1; + unsigned TXB1D24 : 1; + unsigned TXB1D25 : 1; + unsigned TXB1D26 : 1; + unsigned TXB1D27 : 1; + }; +} __TXB1D2bits_t; +extern volatile __TXB1D2bits_t __at (0xF38) TXB1D2bits; + +extern __sfr __at (0xF39) TXB1D3; +typedef union { + struct { + unsigned TXB1D30 : 1; + unsigned TXB1D31 : 1; + unsigned TXB1D32 : 1; + unsigned TXB1D33 : 1; + unsigned TXB1D34 : 1; + unsigned TXB1D35 : 1; + unsigned TXB1D36 : 1; + unsigned TXB1D37 : 1; + }; +} __TXB1D3bits_t; +extern volatile __TXB1D3bits_t __at (0xF39) TXB1D3bits; + +extern __sfr __at (0xF3A) TXB1D4; +typedef union { + struct { + unsigned TXB1D40 : 1; + unsigned TXB1D41 : 1; + unsigned TXB1D42 : 1; + unsigned TXB1D43 : 1; + unsigned TXB1D44 : 1; + unsigned TXB1D45 : 1; + unsigned TXB1D46 : 1; + unsigned TXB1D47 : 1; + }; +} __TXB1D4bits_t; +extern volatile __TXB1D4bits_t __at (0xF3A) TXB1D4bits; + +extern __sfr __at (0xF3B) TXB1D5; +typedef union { + struct { + unsigned TXB1D50 : 1; + unsigned TXB1D51 : 1; + unsigned TXB1D52 : 1; + unsigned TXB1D53 : 1; + unsigned TXB1D54 : 1; + unsigned TXB1D55 : 1; + unsigned TXB1D56 : 1; + unsigned TXB1D57 : 1; + }; +} __TXB1D5bits_t; +extern volatile __TXB1D5bits_t __at (0xF3B) TXB1D5bits; + +extern __sfr __at (0xF3C) TXB1D6; +typedef union { + struct { + unsigned TXB1D60 : 1; + unsigned TXB1D61 : 1; + unsigned TXB1D62 : 1; + unsigned TXB1D63 : 1; + unsigned TXB1D64 : 1; + unsigned TXB1D65 : 1; + unsigned TXB1D66 : 1; + unsigned TXB1D67 : 1; + }; +} __TXB1D6bits_t; +extern volatile __TXB1D6bits_t __at (0xF3C) TXB1D6bits; + +extern __sfr __at (0xF3D) TXB1D7; +typedef union { + struct { + unsigned TXB1D70 : 1; + unsigned TXB1D71 : 1; + unsigned TXB1D72 : 1; + unsigned TXB1D73 : 1; + unsigned TXB1D74 : 1; + unsigned TXB1D75 : 1; + unsigned TXB1D76 : 1; + unsigned TXB1D77 : 1; + }; +} __TXB1D7bits_t; +extern volatile __TXB1D7bits_t __at (0xF3D) TXB1D7bits; + +extern __sfr __at (0xF3E) CANSTAT_RO2; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO2bits_t; +extern volatile __CANSTAT_RO2bits_t __at (0xF3E) CANSTAT_RO2bits; + +extern __sfr __at (0xF3F) CANCON_RO2; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO2bits_t; +extern volatile __CANCON_RO2bits_t __at (0xF3F) CANCON_RO2bits; + +extern __sfr __at (0xF40) TXB0CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; +} __TXB0CONbits_t; +extern volatile __TXB0CONbits_t __at (0xF40) TXB0CONbits; + +extern __sfr __at (0xF41) TXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB0SIDHbits_t; +extern volatile __TXB0SIDHbits_t __at (0xF41) TXB0SIDHbits; + +extern __sfr __at (0xF42) TXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB0SIDLbits_t; +extern volatile __TXB0SIDLbits_t __at (0xF42) TXB0SIDLbits; + +extern __sfr __at (0xF43) TXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB0EIDHbits_t; +extern volatile __TXB0EIDHbits_t __at (0xF43) TXB0EIDHbits; + +extern __sfr __at (0xF44) TXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB0EIDLbits_t; +extern volatile __TXB0EIDLbits_t __at (0xF44) TXB0EIDLbits; + +extern __sfr __at (0xF45) TXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB0DLCbits_t; +extern volatile __TXB0DLCbits_t __at (0xF45) TXB0DLCbits; + +extern __sfr __at (0xF46) TXB0D0; +typedef union { + struct { + unsigned TXB0D00 : 1; + unsigned TXB0D01 : 1; + unsigned TXB0D02 : 1; + unsigned TXB0D03 : 1; + unsigned TXB0D04 : 1; + unsigned TXB0D05 : 1; + unsigned TXB0D06 : 1; + unsigned TXB0D07 : 1; + }; +} __TXB0D0bits_t; +extern volatile __TXB0D0bits_t __at (0xF46) TXB0D0bits; + +extern __sfr __at (0xF47) TXB0D1; +typedef union { + struct { + unsigned TXB0D10 : 1; + unsigned TXB0D11 : 1; + unsigned TXB0D12 : 1; + unsigned TXB0D13 : 1; + unsigned TXB0D14 : 1; + unsigned TXB0D15 : 1; + unsigned TXB0D16 : 1; + unsigned TXB0D17 : 1; + }; +} __TXB0D1bits_t; +extern volatile __TXB0D1bits_t __at (0xF47) TXB0D1bits; + +extern __sfr __at (0xF48) TXB0D2; +typedef union { + struct { + unsigned TXB0D20 : 1; + unsigned TXB0D21 : 1; + unsigned TXB0D22 : 1; + unsigned TXB0D23 : 1; + unsigned TXB0D24 : 1; + unsigned TXB0D25 : 1; + unsigned TXB0D26 : 1; + unsigned TXB0D27 : 1; + }; +} __TXB0D2bits_t; +extern volatile __TXB0D2bits_t __at (0xF48) TXB0D2bits; + +extern __sfr __at (0xF49) TXB0D3; +typedef union { + struct { + unsigned TXB0D30 : 1; + unsigned TXB0D31 : 1; + unsigned TXB0D32 : 1; + unsigned TXB0D33 : 1; + unsigned TXB0D34 : 1; + unsigned TXB0D35 : 1; + unsigned TXB0D36 : 1; + unsigned TXB0D37 : 1; + }; +} __TXB0D3bits_t; +extern volatile __TXB0D3bits_t __at (0xF49) TXB0D3bits; + +extern __sfr __at (0xF4A) TXB0D4; +typedef union { + struct { + unsigned TXB0D40 : 1; + unsigned TXB0D41 : 1; + unsigned TXB0D42 : 1; + unsigned TXB0D43 : 1; + unsigned TXB0D44 : 1; + unsigned TXB0D45 : 1; + unsigned TXB0D46 : 1; + unsigned TXB0D47 : 1; + }; +} __TXB0D4bits_t; +extern volatile __TXB0D4bits_t __at (0xF4A) TXB0D4bits; + +extern __sfr __at (0xF4B) TXB0D5; +typedef union { + struct { + unsigned TXB0D50 : 1; + unsigned TXB0D51 : 1; + unsigned TXB0D52 : 1; + unsigned TXB0D53 : 1; + unsigned TXB0D54 : 1; + unsigned TXB0D55 : 1; + unsigned TXB0D56 : 1; + unsigned TXB0D57 : 1; + }; +} __TXB0D5bits_t; +extern volatile __TXB0D5bits_t __at (0xF4B) TXB0D5bits; + +extern __sfr __at (0xF4C) TXB0D6; +typedef union { + struct { + unsigned TXB0D60 : 1; + unsigned TXB0D61 : 1; + unsigned TXB0D62 : 1; + unsigned TXB0D63 : 1; + unsigned TXB0D64 : 1; + unsigned TXB0D65 : 1; + unsigned TXB0D66 : 1; + unsigned TXB0D67 : 1; + }; +} __TXB0D6bits_t; +extern volatile __TXB0D6bits_t __at (0xF4C) TXB0D6bits; + +extern __sfr __at (0xF4D) TXB0D7; +typedef union { + struct { + unsigned TXB0D70 : 1; + unsigned TXB0D71 : 1; + unsigned TXB0D72 : 1; + unsigned TXB0D73 : 1; + unsigned TXB0D74 : 1; + unsigned TXB0D75 : 1; + unsigned TXB0D76 : 1; + unsigned TXB0D77 : 1; + }; +} __TXB0D7bits_t; +extern volatile __TXB0D7bits_t __at (0xF4D) TXB0D7bits; + +extern __sfr __at (0xF4E) CANSTAT_RO1; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO1bits_t; +extern volatile __CANSTAT_RO1bits_t __at (0xF4E) CANSTAT_RO1bits; + +extern __sfr __at (0xF4F) CANCON_RO1; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO1bits_t; +extern volatile __CANCON_RO1bits_t __at (0xF4F) CANCON_RO1bits; + +extern __sfr __at (0xF50) RXB1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned RXRTRRO_RXB1CON : 1; + unsigned FILHIT4 : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned FILHIT3 : 1; + unsigned : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1CONbits_t; +extern volatile __RXB1CONbits_t __at (0xF50) RXB1CONbits; + +extern __sfr __at (0xF51) RXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB1SIDHbits_t; +extern volatile __RXB1SIDHbits_t __at (0xF51) RXB1SIDHbits; + +extern __sfr __at (0xF52) RXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB1SIDLbits_t; +extern volatile __RXB1SIDLbits_t __at (0xF52) RXB1SIDLbits; + +extern __sfr __at (0xF53) RXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB1EIDHbits_t; +extern volatile __RXB1EIDHbits_t __at (0xF53) RXB1EIDHbits; + +extern __sfr __at (0xF54) RXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB1EIDLbits_t; +extern volatile __RXB1EIDLbits_t __at (0xF54) RXB1EIDLbits; + +extern __sfr __at (0xF55) RXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB1DLC : 1; + unsigned RB1_RXB1DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1DLCbits_t; +extern volatile __RXB1DLCbits_t __at (0xF55) RXB1DLCbits; + +extern __sfr __at (0xF56) RXB1D0; +typedef union { + struct { + unsigned RXB1D00 : 1; + unsigned RXB1D01 : 1; + unsigned RXB1D02 : 1; + unsigned RXB1D03 : 1; + unsigned RXB1D04 : 1; + unsigned RXB1D05 : 1; + unsigned RXB1D06 : 1; + unsigned RXB1D07 : 1; + }; +} __RXB1D0bits_t; +extern volatile __RXB1D0bits_t __at (0xF56) RXB1D0bits; + +extern __sfr __at (0xF57) RXB1D1; +typedef union { + struct { + unsigned RXB1D10 : 1; + unsigned RXB1D11 : 1; + unsigned RXB1D12 : 1; + unsigned RXB1D13 : 1; + unsigned RXB1D14 : 1; + unsigned RXB1D15 : 1; + unsigned RXB1D16 : 1; + unsigned RXB1D17 : 1; + }; +} __RXB1D1bits_t; +extern volatile __RXB1D1bits_t __at (0xF57) RXB1D1bits; + +extern __sfr __at (0xF58) RXB1D2; +typedef union { + struct { + unsigned RXB1D20 : 1; + unsigned RXB1D21 : 1; + unsigned RXB1D22 : 1; + unsigned RXB1D23 : 1; + unsigned RXB1D24 : 1; + unsigned RXB1D25 : 1; + unsigned RXB1D26 : 1; + unsigned RXB1D27 : 1; + }; +} __RXB1D2bits_t; +extern volatile __RXB1D2bits_t __at (0xF58) RXB1D2bits; + +extern __sfr __at (0xF59) RXB1D3; +typedef union { + struct { + unsigned RXB1D30 : 1; + unsigned RXB1D31 : 1; + unsigned RXB1D32 : 1; + unsigned RXB1D33 : 1; + unsigned RXB1D34 : 1; + unsigned RXB1D35 : 1; + unsigned RXB1D36 : 1; + unsigned RXB1D37 : 1; + }; +} __RXB1D3bits_t; +extern volatile __RXB1D3bits_t __at (0xF59) RXB1D3bits; + +extern __sfr __at (0xF5A) RXB1D4; +typedef union { + struct { + unsigned RXB1D40 : 1; + unsigned RXB1D41 : 1; + unsigned RXB1D42 : 1; + unsigned RXB1D43 : 1; + unsigned RXB1D44 : 1; + unsigned RXB1D45 : 1; + unsigned RXB1D46 : 1; + unsigned RXB1D47 : 1; + }; +} __RXB1D4bits_t; +extern volatile __RXB1D4bits_t __at (0xF5A) RXB1D4bits; + +extern __sfr __at (0xF5B) RXB1D5; +typedef union { + struct { + unsigned RXB1D50 : 1; + unsigned RXB1D51 : 1; + unsigned RXB1D52 : 1; + unsigned RXB1D53 : 1; + unsigned RXB1D54 : 1; + unsigned RXB1D55 : 1; + unsigned RXB1D56 : 1; + unsigned RXB1D57 : 1; + }; +} __RXB1D5bits_t; +extern volatile __RXB1D5bits_t __at (0xF5B) RXB1D5bits; + +extern __sfr __at (0xF5C) RXB1D6; +typedef union { + struct { + unsigned RXB1D60 : 1; + unsigned RXB1D61 : 1; + unsigned RXB1D62 : 1; + unsigned RXB1D63 : 1; + unsigned RXB1D64 : 1; + unsigned RXB1D65 : 1; + unsigned RXB1D66 : 1; + unsigned RXB1D67 : 1; + }; +} __RXB1D6bits_t; +extern volatile __RXB1D6bits_t __at (0xF5C) RXB1D6bits; + +extern __sfr __at (0xF5D) RXB1D7; +typedef union { + struct { + unsigned RXB1D70 : 1; + unsigned RXB1D71 : 1; + unsigned RXB1D72 : 1; + unsigned RXB1D73 : 1; + unsigned RXB1D74 : 1; + unsigned RXB1D75 : 1; + unsigned RXB1D76 : 1; + unsigned RXB1D77 : 1; + }; +} __RXB1D7bits_t; +extern volatile __RXB1D7bits_t __at (0xF5D) RXB1D7bits; + +extern __sfr __at (0xF5E) CANSTAT_RO0; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO0bits_t; +extern volatile __CANSTAT_RO0bits_t __at (0xF5E) CANSTAT_RO0bits; + +extern __sfr __at (0xF5F) CANCON_RO0; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO0bits_t; +extern volatile __CANCON_RO0bits_t __at (0xF5F) CANCON_RO0bits; + +extern __sfr __at (0xF60) RXB0CON; +typedef union { + struct { + unsigned : 1; + unsigned JTOFF : 1; + unsigned RXB0DBEN : 1; + unsigned RXRTRRO_RXB0CON : 1; + unsigned : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0CONbits_t; +extern volatile __RXB0CONbits_t __at (0xF60) RXB0CONbits; + +extern __sfr __at (0xF61) RXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB0SIDHbits_t; +extern volatile __RXB0SIDHbits_t __at (0xF61) RXB0SIDHbits; + +extern __sfr __at (0xF62) RXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB0SIDLbits_t; +extern volatile __RXB0SIDLbits_t __at (0xF62) RXB0SIDLbits; + +extern __sfr __at (0xF63) RXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB0EIDHbits_t; +extern volatile __RXB0EIDHbits_t __at (0xF63) RXB0EIDHbits; + +extern __sfr __at (0xF64) RXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB0EIDLbits_t; +extern volatile __RXB0EIDLbits_t __at (0xF64) RXB0EIDLbits; + +extern __sfr __at (0xF65) RXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB0DLC : 1; + unsigned RB1_RXB0DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0DLCbits_t; +extern volatile __RXB0DLCbits_t __at (0xF65) RXB0DLCbits; + +extern __sfr __at (0xF66) RXB0D0; +typedef union { + struct { + unsigned RXB0D00 : 1; + unsigned RXB0D01 : 1; + unsigned RXB0D02 : 1; + unsigned RXB0D03 : 1; + unsigned RXB0D04 : 1; + unsigned RXB0D05 : 1; + unsigned RXB0D06 : 1; + unsigned RXB0D07 : 1; + }; +} __RXB0D0bits_t; +extern volatile __RXB0D0bits_t __at (0xF66) RXB0D0bits; + +extern __sfr __at (0xF67) RXB0D1; +typedef union { + struct { + unsigned RXB0D10 : 1; + unsigned RXB0D11 : 1; + unsigned RXB0D12 : 1; + unsigned RXB0D13 : 1; + unsigned RXB0D14 : 1; + unsigned RXB0D15 : 1; + unsigned RXB0D16 : 1; + unsigned RXB0D17 : 1; + }; +} __RXB0D1bits_t; +extern volatile __RXB0D1bits_t __at (0xF67) RXB0D1bits; + +extern __sfr __at (0xF68) RXB0D2; +typedef union { + struct { + unsigned RXB0D20 : 1; + unsigned RXB0D21 : 1; + unsigned RXB0D22 : 1; + unsigned RXB0D23 : 1; + unsigned RXB0D24 : 1; + unsigned RXB0D25 : 1; + unsigned RXB0D26 : 1; + unsigned RXB0D27 : 1; + }; +} __RXB0D2bits_t; +extern volatile __RXB0D2bits_t __at (0xF68) RXB0D2bits; + +extern __sfr __at (0xF69) RXB0D3; +typedef union { + struct { + unsigned RXB0D30 : 1; + unsigned RXB0D31 : 1; + unsigned RXB0D32 : 1; + unsigned RXB0D33 : 1; + unsigned RXB0D34 : 1; + unsigned RXB0D35 : 1; + unsigned RXB0D36 : 1; + unsigned RXB0D37 : 1; + }; +} __RXB0D3bits_t; +extern volatile __RXB0D3bits_t __at (0xF69) RXB0D3bits; + +extern __sfr __at (0xF6A) RXB0D4; +typedef union { + struct { + unsigned RXB0D40 : 1; + unsigned RXB0D41 : 1; + unsigned RXB0D42 : 1; + unsigned RXB0D43 : 1; + unsigned RXB0D44 : 1; + unsigned RXB0D45 : 1; + unsigned RXB0D46 : 1; + unsigned RXB0D47 : 1; + }; +} __RXB0D4bits_t; +extern volatile __RXB0D4bits_t __at (0xF6A) RXB0D4bits; + +extern __sfr __at (0xF6B) RXB0D5; +typedef union { + struct { + unsigned RXB0D50 : 1; + unsigned RXB0D51 : 1; + unsigned RXB0D52 : 1; + unsigned RXB0D53 : 1; + unsigned RXB0D54 : 1; + unsigned RXB0D55 : 1; + unsigned RXB0D56 : 1; + unsigned RXB0D57 : 1; + }; +} __RXB0D5bits_t; +extern volatile __RXB0D5bits_t __at (0xF6B) RXB0D5bits; + +extern __sfr __at (0xF6C) RXB0D6; +typedef union { + struct { + unsigned RXB0D60 : 1; + unsigned RXB0D61 : 1; + unsigned RXB0D62 : 1; + unsigned RXB0D63 : 1; + unsigned RXB0D64 : 1; + unsigned RXB0D65 : 1; + unsigned RXB0D66 : 1; + unsigned RXB0D67 : 1; + }; +} __RXB0D6bits_t; +extern volatile __RXB0D6bits_t __at (0xF6C) RXB0D6bits; + +extern __sfr __at (0xF6D) RXB0D7; +typedef union { + struct { + unsigned RXB0D70 : 1; + unsigned RXB0D71 : 1; + unsigned RXB0D72 : 1; + unsigned RXB0D73 : 1; + unsigned RXB0D74 : 1; + unsigned RXB0D75 : 1; + unsigned RXB0D76 : 1; + unsigned RXB0D77 : 1; + }; +} __RXB0D7bits_t; +extern volatile __RXB0D7bits_t __at (0xF6D) RXB0D7bits; + +extern __sfr __at (0xF6E) CANSTAT; +typedef union { + struct { + unsigned EICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned EICODE4 : 1; + unsigned OPMODE0 : 1; + unsigned OPMODE1 : 1; + unsigned OPMODE2 : 1; + }; + struct { + unsigned : 1; + unsigned EICODE1 : 1; + unsigned EICODE2 : 1; + unsigned EICODE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANSTATbits_t; +extern volatile __CANSTATbits_t __at (0xF6E) CANSTATbits; + +extern __sfr __at (0xF6F) CANCON; +typedef union { + struct { + unsigned FP0 : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; + struct { + unsigned : 1; + unsigned FP1 : 1; + unsigned FP2 : 1; + unsigned FP3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANCONbits_t; +extern volatile __CANCONbits_t __at (0xF6F) CANCONbits; + +extern __sfr __at (0xF70) BRGCON1; +typedef union { + struct { + unsigned BRP0 : 1; + unsigned BRP1 : 1; + unsigned BRP2 : 1; + unsigned BRP3 : 1; + unsigned BRP4 : 1; + unsigned BRP5 : 1; + unsigned SJW0 : 1; + unsigned SJW1 : 1; + }; +} __BRGCON1bits_t; +extern volatile __BRGCON1bits_t __at (0xF70) BRGCON1bits; + +extern __sfr __at (0xF71) BRGCON2; +typedef union { + struct { + unsigned PRSEG0 : 1; + unsigned PRSEG1 : 1; + unsigned PRSEG2 : 1; + unsigned SEG1PH0 : 1; + unsigned SEG1PH1 : 1; + unsigned SEG1PH2 : 1; + unsigned SAM : 1; + unsigned SEG2PHTS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SEG2PHT : 1; + }; +} __BRGCON2bits_t; +extern volatile __BRGCON2bits_t __at (0xF71) BRGCON2bits; + +extern __sfr __at (0xF72) BRGCON3; +typedef union { + struct { + unsigned SEG2PH0 : 1; + unsigned SEG2PH1 : 1; + unsigned SEG2PH2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned WAKFIL : 1; + unsigned WAKDIS : 1; + }; +} __BRGCON3bits_t; +extern volatile __BRGCON3bits_t __at (0xF72) BRGCON3bits; + +extern __sfr __at (0xF73) CIOCON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CANCAP : 1; + unsigned ENDRHI : 1; + unsigned : 1; + unsigned : 1; + }; +} __CIOCONbits_t; +extern volatile __CIOCONbits_t __at (0xF73) CIOCONbits; + +extern __sfr __at (0xF74) COMSTAT; +typedef union { + struct { + unsigned EWARN : 1; + unsigned RXWARN : 1; + unsigned TXWARN : 1; + unsigned RXBP : 1; + unsigned TXBP : 1; + unsigned TXBO : 1; + unsigned RXB1OVFL : 1; + unsigned RXB0OVFL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXBnOVFL : 1; + unsigned FIFOEMPTY : 1; + }; +} __COMSTATbits_t; +extern volatile __COMSTATbits_t __at (0xF74) COMSTATbits; + +extern __sfr __at (0xF75) RXERRCNT; +typedef union { + struct { + unsigned REC0 : 1; + unsigned REC1 : 1; + unsigned REC2 : 1; + unsigned REC3 : 1; + unsigned REC4 : 1; + unsigned REC5 : 1; + unsigned REC6 : 1; + unsigned REC7 : 1; + }; +} __RXERRCNTbits_t; +extern volatile __RXERRCNTbits_t __at (0xF75) RXERRCNTbits; + +extern __sfr __at (0xF76) TXERRCNT; +typedef union { + struct { + unsigned TEC0 : 1; + unsigned TEC1 : 1; + unsigned TEC2 : 1; + unsigned TEC3 : 1; + unsigned TEC4 : 1; + unsigned TEC5 : 1; + unsigned TEC6 : 1; + unsigned TEC7 : 1; + }; +} __TXERRCNTbits_t; +extern volatile __TXERRCNTbits_t __at (0xF76) TXERRCNTbits; + +extern __sfr __at (0xF77) ECANCON; +typedef union { + struct { + unsigned EWIN0 : 1; + unsigned EWIN1 : 1; + unsigned EWIN2 : 1; + unsigned EWIN3 : 1; + unsigned EWIN4 : 1; + unsigned FIFOWM : 1; + unsigned MDSEL0 : 1; + unsigned MDSEL1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned F : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECANCONbits_t; +extern volatile __ECANCONbits_t __at (0xF77) ECANCONbits; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned OSC1 : 1; + }; + struct { + unsigned CVREF_PORTA : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned LVDIN : 1; + unsigned CLKO : 1; + unsigned CLKI : 1; + }; + struct { + unsigned CVREF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0_PORTB : 1; + unsigned RB1_PORTB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CANRX : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned CANTX : 1; + unsigned : 1; + unsigned AN9 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned PSP0 : 1; + unsigned PSP1 : 1; + unsigned PSP2 : 1; + unsigned PSP3 : 1; + unsigned PSP4 : 1; + unsigned PSP5 : 1; + unsigned PSP6 : 1; + unsigned PSP7 : 1; + }; + struct { + unsigned C1INB : 1; + unsigned C1INA : 1; + unsigned C2INB : 1; + unsigned C2INA : 1; + unsigned P1A : 1; + unsigned P1B : 1; + unsigned P1C : 1; + unsigned P1D : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ECCP1 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0_DDRB : 1; + unsigned RB1_DDRB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSCR : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PSPIE : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PSPIF : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXBIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PSPIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned ECCP1IE : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned ECCP1IF : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned ECCP1IP : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned ERRIE : 1; + unsigned WAKIE : 1; + unsigned IRXIE : 1; + }; + struct { + unsigned FIFOWMIE : 1; + unsigned RXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FIFOMWIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned RXB0IF : 1; + unsigned RXB1IF : 1; + unsigned TXB0IF : 1; + unsigned TXB1IF : 1; + unsigned TXB2IF : 1; + unsigned ERRIF : 1; + unsigned WAKIF : 1; + unsigned IRXIF : 1; + }; + struct { + unsigned FIFOWMIF : 1; + unsigned RXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned RXB0IP : 1; + unsigned RXB1IP : 1; + unsigned TXB0IP : 1; + unsigned TXB1IP : 1; + unsigned TXB2IP : 1; + unsigned ERRIP : 1; + unsigned WAKIP : 1; + unsigned IRXIP : 1; + }; + struct { + unsigned FIFOWMIP : 1; + unsigned RXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAA) EEADRH; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T3NSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T3ECCP1 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT : 1; + unsigned C2OUT : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVREF_CVRCON : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CVRSS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) ECCP1DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFBA) ECCP1CON; +typedef union { + struct { + unsigned ECCP1M0 : 1; + unsigned ECCP1M1 : 1; + unsigned ECCP1M2 : 1; + unsigned ECCP1M3 : 1; + unsigned EDC1B0 : 1; + unsigned EDC1B1 : 1; + unsigned EPWM1M0 : 1; + unsigned EPWM1M1 : 1; + }; +} __ECCP1CONbits_t; +extern volatile __ECCP1CONbits_t __at (0xFBA) ECCP1CONbits; + +extern __sfr __at (0xFBB) ECCPR1; + +extern __sfr __at (0xFBB) ECCPR1L; + +extern __sfr __at (0xFBC) ECCPR1H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO_DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T0PS3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f45j10.h b/device/include/pic16/pic18f45j10.h new file mode 100644 index 0000000..f511e0e --- /dev/null +++ b/device/include/pic16/pic18f45j10.h @@ -0,0 +1,6 @@ +/* + * pic18f45j10.h - device specific declarations + */ + +#include "pic18f44j10.h" + diff --git a/device/include/pic16/pic18f45k20.h b/device/include/pic16/pic18f45k20.h new file mode 100644 index 0000000..5e5b485 --- /dev/null +++ b/device/include/pic16/pic18f45k20.h @@ -0,0 +1,6 @@ +/* + * pic18f45k20.h - device specific declarations + */ + +#include "pic18f46k20.h" + diff --git a/device/include/pic16/pic18f4610.h b/device/include/pic16/pic18f4610.h new file mode 100644 index 0000000..a9a0ed5 --- /dev/null +++ b/device/include/pic16/pic18f4610.h @@ -0,0 +1,1607 @@ +/* + * pic18f4610.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F4610_H__ +#define __PIC18F4610_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP oscillator +#define _OSC_XT_1H 0xF1 // XT oscillator +#define _OSC_HS_1H 0xF2 // HS oscillator +#define _OSC_RC_1H 0xF3 // External RC oscillator, CLKO function on RA6 +#define _OSC_EC_1H 0xF4 // EC oscillator, CLKO function on RA6 +#define _OSC_ECIO6_1H 0xF5 // EC oscillator, port function on RA6 +#define _OSC_HSPLL_1H 0xF6 // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) +#define _OSC_RCIO6_1H 0xF7 // External RC oscillator, port function on RA6 +#define _OSC_INTIO67_1H 0xF8 // Internal oscillator block, port function on RA6 and RA7 +#define _OSC_INTIO7_1H 0xF9 // Internal oscillator block, CLKO function on RA6, port function on RA7 +#define _FCMEN_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled +#define _FCMEN_ON_1H 0xFF // Fail-Safe Clock Monitor enabled +#define _IESO_OFF_1H 0x7F // Oscillator Switchover mode disabled +#define _IESO_ON_1H 0xFF // Oscillator Switchover mode enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // PWRT enabled +#define _PWRT_OFF_2L 0xFF // PWRT disabled +#define _BOREN_OFF_2L 0xF9 // Brown-out Reset disabled in hardware and software +#define _BOREN_ON_2L 0xFB // Brown-out Reset enabled and controlled by software (SBOREN is enabled) +#define _BOREN_NOSLP_2L 0xFD // Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) +#define _BOREN_SBORDIS_2L 0xFF // Brown-out Reset enabled in hardware only (SBOREN is disabled) +#define _BORV_0_2L 0xE7 // Maximum setting +#define _BORV_1_2L 0xEF // +#define _BORV_2_2L 0xF7 // +#define _BORV_3_2L 0xFF // Minimum setting + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit) +#define _WDT_ON_2H 0xFF // WDT enabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // MCLR pin enabled; RE3 input pin disabled +#define _MCLRE_ON_3H 0xFF // RE3 input pin enabled; MCLR disabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 configured for higher power operation +#define _LPT1OSC_ON_3H 0xFF // Timer1 configured for low-power operation +#define _PBADEN_OFF_3H 0xFD // PORTB<4:0> pins are configured as digital I/O on Reset +#define _PBADEN_ON_3H 0xFF // PORTB<4:0> pins are configured as analog input channels on Reset +#define _CCP2MX_PORTBE_3H 0xFE // CCP2 input/output is multiplexed with RB3 +#define _CCP2MX_PORTC_3H 0xFF // CCP2 input/output is multiplexed with RC1 + +// CONFIG4L Options +#define _STVREN_OFF_4L 0xFE // Stack full/underflow will not cause Reset +#define _STVREN_ON_4L 0xFF // Stack full/underflow will cause Reset +#define _LVP_OFF_4L 0xFB // Single-Supply ICSP disabled +#define _LVP_ON_4L 0xFF // Single-Supply ICSP enabled +#define _XINST_OFF_4L 0xBF // Instruction set extension and Indexed Addressing mode disabled (Legacy mode) +#define _XINST_ON_4L 0xFF // Instruction set extension and Indexed Addressing mode enabled +#define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug +#define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Block 0 code-protected +#define _CP0_OFF_5L 0xFF // Block 0 not code-protected +#define _CP1_ON_5L 0xFD // Block 1 code-protected +#define _CP1_OFF_5L 0xFF // Block 1 not code-protected +#define _CP2_ON_5L 0xFB // Block 2 code-protected +#define _CP2_OFF_5L 0xFF // Block 2 not code-protected +#define _CP3_ON_5L 0xF7 // Block 3 code-protected +#define _CP3_OFF_5L 0xFF // Block 3 not code-protected + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Boot block code-protected +#define _CPB_OFF_5H 0xFF // Boot block not code-protected + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Block 0 write-protected +#define _WRT0_OFF_6L 0xFF // Block 0 not write-protected +#define _WRT1_ON_6L 0xFD // Block 1 write-protected +#define _WRT1_OFF_6L 0xFF // Block 1 not write-protected +#define _WRT2_ON_6L 0xFB // Block 2 write-protected +#define _WRT2_OFF_6L 0xFF // Block 2 not write-protected +#define _WRT3_ON_6L 0xF7 // Block 3 write-protected +#define _WRT3_OFF_6L 0xFF // Block 3 not write-protected + +// CONFIG6H Options +#define _WRTB_ON_6H 0xBF // Boot block write-protected +#define _WRTB_OFF_6H 0xFF // Boot block not write-protected +#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected +#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Block 0 protected from table reads executed in other blocks +#define _EBTR0_OFF_7L 0xFF // Block 0 not protected from table reads executed in other blocks +#define _EBTR1_ON_7L 0xFD // Block 1 protected from table reads executed in other blocks +#define _EBTR1_OFF_7L 0xFF // Block 1 not protected from table reads executed in other blocks +#define _EBTR2_ON_7L 0xFB // Block 2 protected from table reads executed in other blocks +#define _EBTR2_OFF_7L 0xFF // Block 2 not protected from table reads executed in other blocks +#define _EBTR3_ON_7L 0xF7 // Block 3 protected from table reads executed in other blocks +#define _EBTR3_OFF_7L 0xFF // Block 3 not protected from table reads executed in other blocks + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Boot block protected from table reads executed in other blocks +#define _EBTRB_OFF_7H 0xFF // Boot block not protected from table reads executed in other blocks +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned OSC1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned VREFN : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned SS : 1; + unsigned CLKO : 1; + unsigned CLKI : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned CVREF : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned LVDIN : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CCP2_PORTB : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN12 : 1; + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned AN9 : 1; + unsigned AN11 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DAD5 : 1; + unsigned DAD6 : 1; + unsigned DAD7 : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned CCP2_PORTC : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned T1CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned PSP0 : 1; + unsigned PSP1 : 1; + unsigned PSP2 : 1; + unsigned PSP3 : 1; + unsigned PSP4 : 1; + unsigned PSP5 : 1; + unsigned PSP6 : 1; + unsigned PSP7 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned P1B : 1; + unsigned P1C : 1; + unsigned P1D : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned CS : 1; + unsigned MCLR : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned NOT_RD : 1; + unsigned NOT_WR : 1; + unsigned NOT_CS : 1; + unsigned NOT_MCLR : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AN5 : 1; + unsigned AN6 : 1; + unsigned AN7 : 1; + unsigned VPP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned : 1; + unsigned TRISE4 : 1; + unsigned TRISE5 : 1; + unsigned TRISE6 : 1; + unsigned TRISE7 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PSPIE : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PSPIF : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PSPIP : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned : 1; + unsigned : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned : 1; + unsigned : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned : 1; + unsigned : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT : 1; + unsigned C2OUT : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB6) ECCPAS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCPASbits_t; +extern volatile __ECCPASbits_t __at (0xFB6) ECCPASbits; + +extern __sfr __at (0xFB7) PWM1CON; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __PWM1CONbits_t; +extern volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFB8) BAUDCTL; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCTLbits_t; +extern volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R_W : 1; + unsigned : 1; + unsigned : 1; + unsigned D_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TOUTPS0 : 1; + unsigned TOUTPS1 : 1; + unsigned TOUTPS2 : 1; + unsigned TOUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned FLTS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned IOFS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned T0PS3 : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T016BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PSA : 1; + unsigned : 1; + unsigned : 1; + unsigned T08BIT : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0F : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0E : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0IF : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0IE : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned SP0 : 1; + unsigned SP1 : 1; + unsigned SP2 : 1; + unsigned SP3 : 1; + unsigned SP4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKOVF : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f4620.h b/device/include/pic16/pic18f4620.h new file mode 100644 index 0000000..121cb6e --- /dev/null +++ b/device/include/pic16/pic18f4620.h @@ -0,0 +1,1350 @@ +/* + * pic18f4620.h - PIC18F4620 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * September, 2006 + * Added modifications by + * Gary Plumbridge + * + * August, 2006 + * Copied from 18f2550 and modified for 18f2620 by + * Anton Strobl + * + * May, 2005 + * The GNU PIC Library is maintained by + * Raphael Neider + * + * originally designed by + * Vangelis Rokas + * + * $Id: pic18f4620.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F4620_H__ +#define __PIC18F4620_H__ 1 + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned RA : 8; + }; + /* aliases */ + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + unsigned OSC2 :1; + unsigned OSC1 :1; + }; + struct { + unsigned AN0 :1; + unsigned AN1 :1; + unsigned AN2 :1; + unsigned AN3 :1; + unsigned T0CKI :1; + unsigned AN4 :1; + unsigned CLKO :1; + unsigned CLKI :1; + }; + struct { + unsigned :1; + unsigned :1; + unsigned VREF_N :1; + unsigned VREF_P :1; + unsigned :1; + unsigned NOT_SS :1; + unsigned :1; + unsigned :1; + }; + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned SS :1; + unsigned :1; + unsigned :1; + }; + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned HLVDIN :1; + unsigned :1; + unsigned :1; + }; +} __PORTA_t; +extern volatile __PORTA_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned RB : 8; + }; + /* aliases */ + struct { + unsigned INT0 :1; + unsigned INT1 :1; + unsigned INT2 :1; + unsigned CCP2 :1; + unsigned KBI0 :1; + unsigned KBI1 :1; + unsigned KBI2 :1; + unsigned KBI3 :1; + }; + struct { + unsigned AN12 :1; + unsigned AN10 :1; + unsigned AN8 :1; + unsigned AN9 :1; + unsigned AN11 :1; + unsigned PGM :1; + unsigned PGC :1; + unsigned PGD :1; + }; + struct { + unsigned FLT0 :1; + unsigned :7; + }; +} __PORTB_t; +extern volatile __PORTB_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned RC : 8; + }; + /* aliases */ + struct { + unsigned T1OSO :1; + unsigned T1OSI :1; + unsigned CCP1 :1; + unsigned SCK :1; + unsigned SDI :1; + unsigned SDO :1; + unsigned TX :1; + unsigned RX :1; + }; + struct { + unsigned T3CKI :1; + unsigned CCP2 :1; + unsigned P1A :1; + unsigned SCL :1; + unsigned SDA :1; + unsigned :1; + unsigned CK :1; + unsigned DTC :1; /* DT might be a reserved word in ASM */ + }; + struct { + unsigned T1CKI :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + struct { + unsigned T13CKI :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTC_t; +extern volatile __PORTC_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned RD : 8; + }; + /* aliases */ + struct { + unsigned PSP0 :1; + unsigned PSP1 :1; + unsigned PSP2 :1; + unsigned PSP3 :1; + unsigned PSP4 :1; + unsigned PSP5 :1; + unsigned PSP6 :1; + unsigned PSP7 :1; + }; + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned P1B :1; + unsigned P1C :1; + unsigned P1D :1; + }; +} __PORTD_t; +extern volatile __PORTD_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned RE : 8; + }; + /* aliases */ + struct { + unsigned AN5 :1; + unsigned AN6 :1; + unsigned AN7 :1; + unsigned VPP :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + struct { + unsigned RD :1; + unsigned WR :1; + unsigned CS :1; + unsigned MCLR :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTE_t; +extern volatile __PORTE_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATA_t; +extern volatile __LATA_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATB_t; +extern volatile __LATB_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATC_t; +extern volatile __LATC_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATD_t; +extern volatile __LATD_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned LATE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATE_t; +extern volatile __LATE_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISA_t; +extern volatile __TRISA_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISB_t; +extern volatile __TRISB_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISC_t; +extern volatile __TRISC_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISD_t; +extern volatile __TRISD_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned TRISE3 : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __TRISE_t; +extern volatile __TRISE_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN : 5; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNE_t; +extern volatile __OSCTUNE_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PSPIE : 1; + }; +} __PIE1_t; +extern volatile __PIE1_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PSPIF : 1; + }; +} __PIR1_t; +extern volatile __PIR1_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PSPIP : 1; + }; +} __IPR1_t; +extern volatile __IPR1_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned TMR3IE : 1; + unsigned HLVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned USBIE : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; +} __PIE2_t; +extern volatile __PIE2_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned TMR3IF : 1; + unsigned HLVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned USBIF : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; +} __PIR2_t; +extern volatile __PIR2_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned TMR3IP : 1; + unsigned HLVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned USBIP : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; +} __IPR2_t; +extern volatile __IPR2_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1_t; +extern volatile __EECON1_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAA) EEADRH; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; +} __RCSTA_t; +extern volatile __RCSTA_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTA_t; +extern volatile __TXSTA_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned NOT_T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; +} __T3CON_t; +extern volatile __T3CON_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT : 1; + unsigned C2OUT : 1; + }; +} __CMCON_t; +extern volatile __CMCON_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCON_t; +extern volatile __CVRCON_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1AS_t; +extern volatile __ECCP1AS_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) PWM1CON; +typedef union { + struct { + unsigned PDC : 7; + unsigned PRSEN : 1; + }; +} __PWM1CON_t; +extern volatile __PWM1CON_t __at (0xFB7) PWM1CONbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned TXCKP : 1; + unsigned RXDTP : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; +} __BAUDCON_t; +extern volatile __BAUDCON_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CON_t; +extern volatile __CCP2CON_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; +} __CCP1CON_t; +extern volatile __CCP1CON_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2_t; +extern volatile __ADCON2_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1_t; +extern volatile __ADCON1_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0_t; +extern volatile __ADCON0_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2_t; +extern volatile __SSPCON2_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1_t; +extern volatile __SSPCON1_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; +} __SSPSTAT_t; +extern volatile __SSPSTAT_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned TOUTPS0 : 1; + unsigned TOUTPS1 : 1; + unsigned TOUTPS2 : 1; + unsigned TOUTPS3 : 1; + unsigned : 1; + }; +} __T2CON_t; +extern volatile __T2CON_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned NOT_T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; +} __T1CON_t; +extern volatile __T1CON_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; +} __RCON_t; +extern volatile __RCON_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCON_t; +extern volatile __WDTCON_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned HLVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; +} __HLVDCON_t; +extern volatile __HLVDCON_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS : 2; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF : 3; + unsigned IDLEN : 1; + }; +} __OSCCON_t; +extern volatile __OSCCON_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; +} __T0CON_t; +extern volatile __T0CON_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUS_t; +extern volatile __STATUS_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; +typedef union { + struct { + unsigned FSR2H : 4; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __FSR2H_t; +extern volatile __FSR2H_t __at (0xFDA) FSR2Hbits; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; +typedef union { + struct { + unsigned BSR : 4; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __BSR_t; +extern volatile __BSR_t __at (0xFE0) BSRbits; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; +typedef union { + struct { + unsigned FSR1H : 4; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __FSR1H_t; +extern volatile __FSR1H_t __at (0xFE2) FSR1Hbits; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; +typedef union { + struct { + unsigned FSR0H : 4; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __FSR0H_t; +extern volatile __FSR0H_t __at (0xFEA) FSR0Hbits; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; +} __INTCON3_t; +extern volatile __INTCON3_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned RBPU : 1; + }; +} __INTCON2_t; +extern volatile __INTCON2_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCON_t; +extern volatile __INTCON_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; +typedef union { + struct { + unsigned TBLPTRU : 5; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TBLPTRU_t; +extern volatile __TBLPTRU_t __at (0xFF8) TBLPTRUbits; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; +typedef union { + struct { + unsigned PCH : 8; + }; +} __PCLATH_t; +extern volatile __PCLATH_t __at (0xFFA) PCLATHbits; + +extern __sfr __at (0xFFB) PCLATU; +typedef union { + struct { + unsigned PCU : 5; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PCLATU_t; +extern volatile __PCLATU_t __at (0xFFB) PCLATUbits; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR : 5; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKFUL : 1; + }; +} __STKPTR_t; +extern volatile __STKPTR_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; +typedef union { + struct { + unsigned TOSU : 5; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TOSU_t; +extern volatile __TOSU_t __at (0xFFF) TOSUbits; + +/* Configuration register locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + +/* Oscillator 1H options */ +#define _OSC_INTIO7_1H 0xF9 /* INTRC-OSC2 as Clock Out, OSC1 as RA7 */ +#define _OSC_INTIO67_1H 0xF8 /* INTRC-OSC2 as RA6, OSC1 as RA7 */ +#define _OSC_RCIO6_1H 0xF7 /* RC-OSC2 as RA6 */ +#define _OSC_HSPLL_1H 0xF6 /* HS-PLL Enabled */ +#define _OSC_ECIO6_1H 0xF5 /* EC-OSC2 as RA6 */ +#define _OSC_EC_1H 0xF4 /* EC-OSC2 as Clock Out */ +#define _OSC_RC_1H 0xF3 /* RC */ +#define _OSC_HS_1H 0xF2 /* HS */ +#define _OSC_XT_1H 0xF1 /* XT */ +#define _OSC_LP_1H 0xF0 /* LP */ + +/* Fail-Safe Clock Monitor Enable 1H options */ +#define _FCMEN_OFF_1H 0xBF /* Disabled */ +#define _FCMEN_ON_1H 0xFF /* Enabled */ + +/* Internal External Switch Over Mode 1H options */ +#define _IESO_OFF_1H 0x7F /* Disabled */ +#define _IESO_ON_1H 0xFF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PWRT_OFF_2L 0xFF /* Disabled */ +#define _PWRT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BOREN_OFF_2L 0xF9 /* Disabled */ +#define _BOREN_ON_2L 0xFB /* SBOREN Enabled */ +#define _BOREN_NOSLP_2L 0xFD /* Enabled except SLEEP, SBOREN Disabled */ +#define _BOREN_SBORDIS_2L 0xFF /* Enabled, SBOREN Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BORV_46_2L 0xE7 /* 4.6V */ +#define _BORV_43_2L 0xEF /* 4.3V */ +#define _BORV_28_2L 0xF7 /* 2.8V */ +#define _BORV_21_2L 0xFF /* 2.1V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_DISABLED_CONTROLLED_2H 0xFE /* Disabled-Controlled by SWDTEN bit */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_32768_2H 0xFF /* 1:32768 */ +#define _WDTPS_1_16384_2H 0xFD /* 1:16384 */ +#define _WDTPS_1_8192_2H 0xFB /* 1:8192 */ +#define _WDTPS_1_4096_2H 0xF9 /* 1:4096 */ +#define _WDTPS_1_2048_2H 0xF7 /* 1:2048 */ +#define _WDTPS_1_1024_2H 0xF5 /* 1:1024 */ +#define _WDTPS_1_512_2H 0xF3 /* 1:512 */ +#define _WDTPS_1_256_2H 0xF1 /* 1:256 */ +#define _WDTPS_1_128_2H 0xEF /* 1:128 */ +#define _WDTPS_1_64_2H 0xED /* 1:64 */ +#define _WDTPS_1_32_2H 0xEB /* 1:32 */ +#define _WDTPS_1_16_2H 0xE9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xE7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xE5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xE3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xE1 /* 1:1 */ + + +/* CCP2 Mux 3H options */ +#define _CCP2MUX_RC1_3H 0xFF /* RC1 */ +#define _CCP2MUX_RB3_3H 0xFE /* RB3 */ + +/* PortB A/D Enable 3H options */ +#define _PBADEN_PORTB_4_0__CONFIGURED_AS_ANALOG_INPUTS_ON_RESET_3H 0xFF /* PORTB<4:0> configured as analog inputs on RESET */ +#define _PBADEN_PORTB_4_0__CONFIGURED_AS_DIGITAL_I_O_ON_RESET_3H 0xFD /* PORTB<4:0> configured as digital I/O on RESET */ + +/* Low Power Timer1 Osc enable 3H options */ +#define _LPT1OSC_ON_3H 0xFF /* Enabled */ +#define _LPT1OSC_OFF_3H 0xFB /* Disabled */ + +/* Master Clear Enable 3H options */ +#define _MCLRE_MCLR_ON_RE3_OFF_3H 0xFF /* MCLR Enabled,RE3 Disabled */ +#define _MCLRE_MCLR_OFF_RE3_ON_3H 0x7F /* MCLR Disabled,RE3 Enabled */ + + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Extended CPU Enable 4L options */ +#define _XINST_OFF_4L 0xBF /* Disabled */ +#define _XINST_ON_4L 0xFF /* Enabled */ + +/* Background Debug 4L options */ +#define _DEBUG_ON_4L 0x7F /* Enabled */ +#define _DEBUG_OFF_4L 0xFF /* Disabled */ + +/* Code Protect 00800-01FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 02000-03FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Code Protect 04000-05FFF 5L options */ +#define _CP_2_OFF_5L 0xFF /* Disabled */ +#define _CP_2_ON_5L 0xFB /* Enabled */ + +/* Code Protect 06000-07FFF 5L options */ +#define _CP_3_OFF_5L 0xFF /* Disabled */ +#define _CP_3_ON_5L 0xF7 /* Enabled */ + + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + + +/* Table Write Protect 00800-01FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 02000-03FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Table Write Protect 04000-05FFF 6L options */ +#define _WRT_2_OFF_6L 0xFF /* Disabled */ +#define _WRT_2_ON_6L 0xFB /* Enabled */ + +/* Table Write Protect 06000-07FFF 6L options */ +#define _WRT_3_OFF_6L 0xFF /* Disabled */ +#define _WRT_3_ON_6L 0xF7 /* Enabled */ + + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + + +/* Table Read Protect 00800-01FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 02000-03FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect 04000-05FFF 7L options */ +#define _EBTR_2_OFF_7L 0xFF /* Disabled */ +#define _EBTR_2_ON_7L 0xFB /* Enabled */ + +/* Table Read Protect 06000-07FFF 7L options */ +#define _EBTR_3_OFF_7L 0xFF /* Disabled */ +#define _EBTR_3_ON_7L 0xF7 /* Enabled */ + + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID bytes */ +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF + + +/* Location of User ID words */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + +#endif // __PIC18F4620__ diff --git a/device/include/pic16/pic18f4680.h b/device/include/pic16/pic18f4680.h new file mode 100644 index 0000000..d577ed7 --- /dev/null +++ b/device/include/pic16/pic18f4680.h @@ -0,0 +1,6320 @@ +/* + * pic18f4680.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F4680_H__ +#define __PIC18F4680_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP oscillator +#define _OSC_XT_1H 0xF1 // XT oscillator +#define _OSC_HS_1H 0xF2 // HS oscillator +#define _OSC_RC_1H 0xF3 // External RC oscillator, CLKO function on RA6 +#define _OSC_EC_1H 0xF4 // EC oscillator, CLKO function on RA6 +#define _OSC_ECIO_1H 0xF5 // EC oscillator, port function on RA6 +#define _OSC_HSPLL_1H 0xF6 // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) +#define _OSC_RCIO_1H 0xF7 // External RC oscillator, port function on RA6 +#define _OSC_IRCIO67_1H 0xF8 // Internal oscillator block, port function on RA6 and RA7 +#define _OSC_IRCIO7_1H 0xF9 // Internal oscillator block, CLKO function on RA6, port function on RA7 +#define _FCMEN_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled +#define _FCMEN_ON_1H 0xFF // Fail-Safe Clock Monitor enabled +#define _IESO_OFF_1H 0x7F // Oscillator Switchover mode disabled +#define _IESO_ON_1H 0xFF // Oscillator Switchover mode enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // PWRT enabled +#define _PWRT_OFF_2L 0xFF // PWRT disabled +#define _BOREN_OFF_2L 0xF9 // Brown-out Reset disabled in hardware and software +#define _BOREN_SBORENCTRL_2L 0xFB // Brown-out Reset enabled and controlled by software (SBOREN is enabled) +#define _BOREN_BOACTIVE_2L 0xFD // Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) +#define _BOREN_BOHW_2L 0xFF // Brown-out Reset enabled in hardware only (SBOREN is disabled) +#define _BORV_0_2L 0xE7 // Maximum Setting +#define _BORV_1_2L 0xEF // +#define _BORV_2_2L 0xF7 // +#define _BORV_3_2L 0xFF // Minimum Setting + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // HW Disabled - SW Controlled +#define _WDT_ON_2H 0xFF // HW Enabled - SW Disabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // RE3 input pin enabled; MCLR disabled +#define _MCLRE_ON_3H 0xFF // MCLR pin enabled; RE3 input pin disabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 configured for higher power operation +#define _LPT1OSC_ON_3H 0xFF // Timer1 configured for low-power operation +#define _PBADEN_OFF_3H 0xFD // PORTB<4> and PORTB<1:0> Configured as Digital I/O Pins on Reset +#define _PBADEN_ON_3H 0xFF // PORTB<4> and PORTB<1:0> Configured as Analog Pins on Reset + +// CONFIG4L Options +#define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug +#define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins +#define _XINST_OFF_4L 0xBF // Instruction set extension and Indexed Addressing mode disabled (Legacy mode) +#define _XINST_ON_4L 0xFF // Instruction set extension and Indexed Addressing mode enabled +#define _BBSIZ_1024_4L 0xCF // 1K words (2K bytes) Boot Block +#define _BBSIZ_2048_4L 0xDF // 2K words (4K bytes) Boot Block +#define _BBSIZ_4096_4L 0xEF // 4K words (8K bytes) Boot Block +#define _LVP_OFF_4L 0xFB // Single-Supply ICSP disabled +#define _LVP_ON_4L 0xFF // Single-Supply ICSP enabled +#define _STVREN_OFF_4L 0xFE // Stack full/underflow will not cause Reset +#define _STVREN_ON_4L 0xFF // Stack full/underflow will cause Reset + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Block 0 (000800-003FFFh) code-protected +#define _CP0_OFF_5L 0xFF // Block 0 (000800-003FFFh) not code-protected +#define _CP1_ON_5L 0xFD // Block 1 (004000-007FFFh) code-protected +#define _CP1_OFF_5L 0xFF // Block 1 (004000-007FFFh) not code-protected +#define _CP2_ON_5L 0xFB // Block 2 (008000-00BFFFh) code-protected +#define _CP2_OFF_5L 0xFF // Block 2 (008000-00BFFFh) not code-protected +#define _CP3_ON_5L 0xF7 // Block 3 (00C000-00FFFFh) code-protected +#define _CP3_OFF_5L 0xFF // Block 3 (00C000-00FFFFh) not code-protected + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Boot block (000000-0007FFh) code-protected +#define _CPB_OFF_5H 0xFF // Boot block (000000-0007FFh) not code-protected +#define _CPD_ON_5H 0x7F // Data EEPROM code-protected +#define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Block 0 (000800-003FFFh) write-protected +#define _WRT0_OFF_6L 0xFF // Block 0 (000800-003FFFh) not write-protected +#define _WRT1_ON_6L 0xFD // Block 1 (004000-007FFFh) write-protected +#define _WRT1_OFF_6L 0xFF // Block 1 (004000-007FFFh) not write-protected +#define _WRT2_ON_6L 0xFB // Block 2 (008000-00BFFFh) write-protected +#define _WRT2_OFF_6L 0xFF // Block 2 (008000-00BFFFh) not write-protected +#define _WRT3_ON_6L 0xF7 // Block 3 (00C000-00FFFFh) write-protected +#define _WRT3_OFF_6L 0xFF // Block 3 (00C000-00FFFFh) not write-protected + +// CONFIG6H Options +#define _WRTB_ON_6H 0xBF // Boot block (000000-0007FFh) write-protected +#define _WRTB_OFF_6H 0xFF // Boot block (000000-0007FFh) not write-protected +#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected +#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected +#define _WRTD_ON_6H 0x7F // Data EEPROM write-protected +#define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Block 0 (000800-003FFFh) protected from table reads executed in other blocks +#define _EBTR0_OFF_7L 0xFF // Block 0 (000800-003FFFh) not protected from table reads executed in other blocks +#define _EBTR1_ON_7L 0xFD // Block 1 (004000-007FFFh) protected from table reads executed in other blocks +#define _EBTR1_OFF_7L 0xFF // Block 1 (004000-007FFFh) not protected from table reads executed in other blocks +#define _EBTR2_ON_7L 0xFB // Block 2 (008000-00BFFFh) protected from table reads executed in other blocks +#define _EBTR2_OFF_7L 0xFF // Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks +#define _EBTR3_ON_7L 0xF7 // Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks +#define _EBTR3_OFF_7L 0xFF // Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Boot block (000000-0007FFh) protected from table reads executed in other blocks +#define _EBTRB_OFF_7H 0xFF // Boot block (000000-0007FFh) not protected from table reads executed in other blocks +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xD60) RXF6SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF6SIDHbits_t; +extern volatile __RXF6SIDHbits_t __at (0xD60) RXF6SIDHbits; + +extern __sfr __at (0xD61) RXF6SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF6SIDLbits_t; +extern volatile __RXF6SIDLbits_t __at (0xD61) RXF6SIDLbits; + +extern __sfr __at (0xD62) RXF6EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF6EIDHbits_t; +extern volatile __RXF6EIDHbits_t __at (0xD62) RXF6EIDHbits; + +extern __sfr __at (0xD63) RXF6EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF6EIDLbits_t; +extern volatile __RXF6EIDLbits_t __at (0xD63) RXF6EIDLbits; + +extern __sfr __at (0xD64) RXF7SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF7SIDHbits_t; +extern volatile __RXF7SIDHbits_t __at (0xD64) RXF7SIDHbits; + +extern __sfr __at (0xD65) RXF7SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF7SIDLbits_t; +extern volatile __RXF7SIDLbits_t __at (0xD65) RXF7SIDLbits; + +extern __sfr __at (0xD66) RXF7EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF7EIDHbits_t; +extern volatile __RXF7EIDHbits_t __at (0xD66) RXF7EIDHbits; + +extern __sfr __at (0xD67) RXF7EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF7EIDLbits_t; +extern volatile __RXF7EIDLbits_t __at (0xD67) RXF7EIDLbits; + +extern __sfr __at (0xD68) RXF8SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF8SIDHbits_t; +extern volatile __RXF8SIDHbits_t __at (0xD68) RXF8SIDHbits; + +extern __sfr __at (0xD69) RXF8SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF8SIDLbits_t; +extern volatile __RXF8SIDLbits_t __at (0xD69) RXF8SIDLbits; + +extern __sfr __at (0xD6A) RXF8EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF8EIDHbits_t; +extern volatile __RXF8EIDHbits_t __at (0xD6A) RXF8EIDHbits; + +extern __sfr __at (0xD6B) RXF8EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF8EIDLbits_t; +extern volatile __RXF8EIDLbits_t __at (0xD6B) RXF8EIDLbits; + +extern __sfr __at (0xD70) RXF9SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF9SIDHbits_t; +extern volatile __RXF9SIDHbits_t __at (0xD70) RXF9SIDHbits; + +extern __sfr __at (0xD71) RXF9SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF9SIDLbits_t; +extern volatile __RXF9SIDLbits_t __at (0xD71) RXF9SIDLbits; + +extern __sfr __at (0xD72) RXF9EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF9EIDHbits_t; +extern volatile __RXF9EIDHbits_t __at (0xD72) RXF9EIDHbits; + +extern __sfr __at (0xD73) RXF9EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF9EIDLbits_t; +extern volatile __RXF9EIDLbits_t __at (0xD73) RXF9EIDLbits; + +extern __sfr __at (0xD74) RXF10SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF10SIDHbits_t; +extern volatile __RXF10SIDHbits_t __at (0xD74) RXF10SIDHbits; + +extern __sfr __at (0xD75) RXF10SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF10SIDLbits_t; +extern volatile __RXF10SIDLbits_t __at (0xD75) RXF10SIDLbits; + +extern __sfr __at (0xD76) RXF10EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF10EIDHbits_t; +extern volatile __RXF10EIDHbits_t __at (0xD76) RXF10EIDHbits; + +extern __sfr __at (0xD77) RXF10EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF10EIDLbits_t; +extern volatile __RXF10EIDLbits_t __at (0xD77) RXF10EIDLbits; + +extern __sfr __at (0xD78) RXF11SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF11SIDHbits_t; +extern volatile __RXF11SIDHbits_t __at (0xD78) RXF11SIDHbits; + +extern __sfr __at (0xD79) RXF11SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF11SIDLbits_t; +extern volatile __RXF11SIDLbits_t __at (0xD79) RXF11SIDLbits; + +extern __sfr __at (0xD7A) RXF11EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF11EIDHbits_t; +extern volatile __RXF11EIDHbits_t __at (0xD7A) RXF11EIDHbits; + +extern __sfr __at (0xD7B) RXF11EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF11EIDLbits_t; +extern volatile __RXF11EIDLbits_t __at (0xD7B) RXF11EIDLbits; + +extern __sfr __at (0xD80) RXF12SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF12SIDHbits_t; +extern volatile __RXF12SIDHbits_t __at (0xD80) RXF12SIDHbits; + +extern __sfr __at (0xD81) RXF12SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF12SIDLbits_t; +extern volatile __RXF12SIDLbits_t __at (0xD81) RXF12SIDLbits; + +extern __sfr __at (0xD82) RXF12EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF12EIDHbits_t; +extern volatile __RXF12EIDHbits_t __at (0xD82) RXF12EIDHbits; + +extern __sfr __at (0xD83) RXF12EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF12EIDLbits_t; +extern volatile __RXF12EIDLbits_t __at (0xD83) RXF12EIDLbits; + +extern __sfr __at (0xD84) RXF13SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF13SIDHbits_t; +extern volatile __RXF13SIDHbits_t __at (0xD84) RXF13SIDHbits; + +extern __sfr __at (0xD85) RXF13SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF13SIDLbits_t; +extern volatile __RXF13SIDLbits_t __at (0xD85) RXF13SIDLbits; + +extern __sfr __at (0xD86) RXF13EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF13EIDHbits_t; +extern volatile __RXF13EIDHbits_t __at (0xD86) RXF13EIDHbits; + +extern __sfr __at (0xD87) RXF13EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF13EIDLbits_t; +extern volatile __RXF13EIDLbits_t __at (0xD87) RXF13EIDLbits; + +extern __sfr __at (0xD88) RXF14SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF14SIDHbits_t; +extern volatile __RXF14SIDHbits_t __at (0xD88) RXF14SIDHbits; + +extern __sfr __at (0xD89) RXF14SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF14SIDLbits_t; +extern volatile __RXF14SIDLbits_t __at (0xD89) RXF14SIDLbits; + +extern __sfr __at (0xD8A) RXF14EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF14EIDHbits_t; +extern volatile __RXF14EIDHbits_t __at (0xD8A) RXF14EIDHbits; + +extern __sfr __at (0xD8B) RXF14EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF14EIDLbits_t; +extern volatile __RXF14EIDLbits_t __at (0xD8B) RXF14EIDLbits; + +extern __sfr __at (0xD90) RXF15SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF15SIDHbits_t; +extern volatile __RXF15SIDHbits_t __at (0xD90) RXF15SIDHbits; + +extern __sfr __at (0xD91) RXF15SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF15SIDLbits_t; +extern volatile __RXF15SIDLbits_t __at (0xD91) RXF15SIDLbits; + +extern __sfr __at (0xD92) RXF15EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF15EIDHbits_t; +extern volatile __RXF15EIDHbits_t __at (0xD92) RXF15EIDHbits; + +extern __sfr __at (0xD93) RXF15EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF15EIDLbits_t; +extern volatile __RXF15EIDLbits_t __at (0xD93) RXF15EIDLbits; + +extern __sfr __at (0xDD4) RXFCON0; +typedef union { + struct { + unsigned RXF0EN : 1; + unsigned RXF1EN : 1; + unsigned RXF2EN : 1; + unsigned RXF3EN : 1; + unsigned RXF4EN : 1; + unsigned RXF5EN : 1; + unsigned RXF6EN : 1; + unsigned RXF7EN : 1; + }; +} __RXFCON0bits_t; +extern volatile __RXFCON0bits_t __at (0xDD4) RXFCON0bits; + +extern __sfr __at (0xDD5) RXFCON1; +typedef union { + struct { + unsigned RXF8EN : 1; + unsigned RXF9EN : 1; + unsigned RXF10EN : 1; + unsigned RXF11EN : 1; + unsigned RXF12EN : 1; + unsigned RXF13EN : 1; + unsigned RXF14EN : 1; + unsigned RXF15EN : 1; + }; +} __RXFCON1bits_t; +extern volatile __RXFCON1bits_t __at (0xDD5) RXFCON1bits; + +extern __sfr __at (0xDD8) SDFLC; +typedef union { + struct { + unsigned DFLC0 : 1; + unsigned DFLC1 : 1; + unsigned DFLC2 : 1; + unsigned DFLC3 : 1; + unsigned DFLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FLC0 : 1; + unsigned FLC1 : 1; + unsigned FLC2 : 1; + unsigned FLC3 : 1; + unsigned FLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SDFLCbits_t; +extern volatile __SDFLCbits_t __at (0xDD8) SDFLCbits; + +extern __sfr __at (0xDE0) RXFBCON0; +typedef union { + struct { + unsigned F0BP_0 : 1; + unsigned F0BP_1 : 1; + unsigned F0BP_2 : 1; + unsigned F0BP_3 : 1; + unsigned F1BP_0 : 1; + unsigned F1BP_1 : 1; + unsigned F1BP_2 : 1; + unsigned F1BP_3 : 1; + }; +} __RXFBCON0bits_t; +extern volatile __RXFBCON0bits_t __at (0xDE0) RXFBCON0bits; + +extern __sfr __at (0xDE1) RXFBCON1; +typedef union { + struct { + unsigned F2BP_0 : 1; + unsigned F2BP_1 : 1; + unsigned F2BP_2 : 1; + unsigned F2BP_3 : 1; + unsigned F3BP_0 : 1; + unsigned F3BP_1 : 1; + unsigned F3BP_2 : 1; + unsigned F3BP_3 : 1; + }; +} __RXFBCON1bits_t; +extern volatile __RXFBCON1bits_t __at (0xDE1) RXFBCON1bits; + +extern __sfr __at (0xDE2) RXFBCON2; +typedef union { + struct { + unsigned F4BP_0 : 1; + unsigned F4BP_1 : 1; + unsigned F4BP_2 : 1; + unsigned F4BP_3 : 1; + unsigned F5BP_0 : 1; + unsigned F5BP_1 : 1; + unsigned F5BP_2 : 1; + unsigned F5BP_3 : 1; + }; +} __RXFBCON2bits_t; +extern volatile __RXFBCON2bits_t __at (0xDE2) RXFBCON2bits; + +extern __sfr __at (0xDE3) RXFBCON3; +typedef union { + struct { + unsigned F6BP_0 : 1; + unsigned F6BP_1 : 1; + unsigned F6BP_2 : 1; + unsigned F6BP_3 : 1; + unsigned F7BP_0 : 1; + unsigned F7BP_1 : 1; + unsigned F7BP_2 : 1; + unsigned F7BP_3 : 1; + }; +} __RXFBCON3bits_t; +extern volatile __RXFBCON3bits_t __at (0xDE3) RXFBCON3bits; + +extern __sfr __at (0xDE4) RXFBCON4; +typedef union { + struct { + unsigned F8BP_0 : 1; + unsigned F8BP_1 : 1; + unsigned F8BP_2 : 1; + unsigned F8BP_3 : 1; + unsigned F9BP_0 : 1; + unsigned F9BP_1 : 1; + unsigned F9BP_2 : 1; + unsigned F9BP_3 : 1; + }; +} __RXFBCON4bits_t; +extern volatile __RXFBCON4bits_t __at (0xDE4) RXFBCON4bits; + +extern __sfr __at (0xDE5) RXFBCON5; +typedef union { + struct { + unsigned F10BP_0 : 1; + unsigned F10BP_1 : 1; + unsigned F10BP_2 : 1; + unsigned F10BP_3 : 1; + unsigned F11BP_0 : 1; + unsigned F11BP_1 : 1; + unsigned F11BP_2 : 1; + unsigned F11BP_3 : 1; + }; +} __RXFBCON5bits_t; +extern volatile __RXFBCON5bits_t __at (0xDE5) RXFBCON5bits; + +extern __sfr __at (0xDE6) RXFBCON6; +typedef union { + struct { + unsigned F12BP_0 : 1; + unsigned F12BP_1 : 1; + unsigned F12BP_2 : 1; + unsigned F12BP_3 : 1; + unsigned F13BP_0 : 1; + unsigned F13BP_1 : 1; + unsigned F13BP_2 : 1; + unsigned F13BP_3 : 1; + }; +} __RXFBCON6bits_t; +extern volatile __RXFBCON6bits_t __at (0xDE6) RXFBCON6bits; + +extern __sfr __at (0xDE7) RXFBCON7; +typedef union { + struct { + unsigned F14BP_0 : 1; + unsigned F14BP_1 : 1; + unsigned F14BP_2 : 1; + unsigned F14BP_3 : 1; + unsigned F15BP_0 : 1; + unsigned F15BP_1 : 1; + unsigned F15BP_2 : 1; + unsigned F15BP_3 : 1; + }; +} __RXFBCON7bits_t; +extern volatile __RXFBCON7bits_t __at (0xDE7) RXFBCON7bits; + +extern __sfr __at (0xDF0) MSEL0; +typedef union { + struct { + unsigned FIL0_0 : 1; + unsigned FIL0_1 : 1; + unsigned FIL1_0 : 1; + unsigned FIL1_1 : 1; + unsigned FIL2_0 : 1; + unsigned FIL2_1 : 1; + unsigned FIL3_0 : 1; + unsigned FIL3_1 : 1; + }; +} __MSEL0bits_t; +extern volatile __MSEL0bits_t __at (0xDF0) MSEL0bits; + +extern __sfr __at (0xDF1) MSEL1; +typedef union { + struct { + unsigned FIL4_0 : 1; + unsigned FIL4_1 : 1; + unsigned FIL5_0 : 1; + unsigned FIL5_1 : 1; + unsigned FIL6_0 : 1; + unsigned FIL6_1 : 1; + unsigned FIL7_0 : 1; + unsigned FIL7_1 : 1; + }; +} __MSEL1bits_t; +extern volatile __MSEL1bits_t __at (0xDF1) MSEL1bits; + +extern __sfr __at (0xDF2) MSEL2; +typedef union { + struct { + unsigned FIL8_0 : 1; + unsigned FIL8_1 : 1; + unsigned FIL9_0 : 1; + unsigned FIL9_1 : 1; + unsigned FIL10_0 : 1; + unsigned FIL10_1 : 1; + unsigned FIL11_0 : 1; + unsigned FIL11_1 : 1; + }; +} __MSEL2bits_t; +extern volatile __MSEL2bits_t __at (0xDF2) MSEL2bits; + +extern __sfr __at (0xDF3) MSEL3; +typedef union { + struct { + unsigned FIL12_0 : 1; + unsigned FIL12_1 : 1; + unsigned FIL13_0 : 1; + unsigned FIL13_1 : 1; + unsigned FIL14_0 : 1; + unsigned FIL14_1 : 1; + unsigned FIL15_0 : 1; + unsigned FIL15_1 : 1; + }; +} __MSEL3bits_t; +extern volatile __MSEL3bits_t __at (0xDF3) MSEL3bits; + +extern __sfr __at (0xDF8) BSEL0; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned B0TXEN : 1; + unsigned B1TXEN : 1; + unsigned B2TXEN : 1; + unsigned B3TXEN : 1; + unsigned B4TXEN : 1; + unsigned B5TXEN : 1; + }; +} __BSEL0bits_t; +extern volatile __BSEL0bits_t __at (0xDF8) BSEL0bits; + +extern __sfr __at (0xDFA) BIE0; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned B0IE : 1; + unsigned B1IE : 1; + unsigned B2IE : 1; + unsigned B3IE : 1; + unsigned B4IE : 1; + unsigned B5IE : 1; + }; +} __BIE0bits_t; +extern volatile __BIE0bits_t __at (0xDFA) BIE0bits; + +extern __sfr __at (0xDFC) TXBIE; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TXBIEbits_t; +extern volatile __TXBIEbits_t __at (0xDFC) TXBIEbits; + +extern __sfr __at (0xE20) B0CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B0CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0CONbits_t; +extern volatile __B0CONbits_t __at (0xE20) B0CONbits; + +extern __sfr __at (0xE21) B0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B0SIDHbits_t; +extern volatile __B0SIDHbits_t __at (0xE21) B0SIDHbits; + +extern __sfr __at (0xE22) B0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0SIDLbits_t; +extern volatile __B0SIDLbits_t __at (0xE22) B0SIDLbits; + +extern __sfr __at (0xE23) B0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B0EIDHbits_t; +extern volatile __B0EIDHbits_t __at (0xE23) B0EIDHbits; + +extern __sfr __at (0xE24) B0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B0EIDLbits_t; +extern volatile __B0EIDLbits_t __at (0xE24) B0EIDLbits; + +extern __sfr __at (0xE25) B0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B0DLC : 1; + unsigned RB1_B0DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B0DLCbits_t; +extern volatile __B0DLCbits_t __at (0xE25) B0DLCbits; + +extern __sfr __at (0xE26) B0D0; +typedef union { + struct { + unsigned B0D00 : 1; + unsigned B0D01 : 1; + unsigned B0D02 : 1; + unsigned B0D03 : 1; + unsigned B0D04 : 1; + unsigned B0D05 : 1; + unsigned B0D06 : 1; + unsigned B0D07 : 1; + }; +} __B0D0bits_t; +extern volatile __B0D0bits_t __at (0xE26) B0D0bits; + +extern __sfr __at (0xE27) B0D1; +typedef union { + struct { + unsigned B0D10 : 1; + unsigned B0D11 : 1; + unsigned B0D12 : 1; + unsigned B0D13 : 1; + unsigned B0D14 : 1; + unsigned B0D15 : 1; + unsigned B0D16 : 1; + unsigned B0D17 : 1; + }; +} __B0D1bits_t; +extern volatile __B0D1bits_t __at (0xE27) B0D1bits; + +extern __sfr __at (0xE28) B0D2; +typedef union { + struct { + unsigned B0D20 : 1; + unsigned B0D21 : 1; + unsigned B0D22 : 1; + unsigned B0D23 : 1; + unsigned B0D24 : 1; + unsigned B0D25 : 1; + unsigned B0D26 : 1; + unsigned B0D27 : 1; + }; +} __B0D2bits_t; +extern volatile __B0D2bits_t __at (0xE28) B0D2bits; + +extern __sfr __at (0xE29) B0D3; +typedef union { + struct { + unsigned B0D30 : 1; + unsigned B0D31 : 1; + unsigned B0D32 : 1; + unsigned B0D33 : 1; + unsigned B0D34 : 1; + unsigned B0D35 : 1; + unsigned B0D36 : 1; + unsigned B0D37 : 1; + }; +} __B0D3bits_t; +extern volatile __B0D3bits_t __at (0xE29) B0D3bits; + +extern __sfr __at (0xE2A) B0D4; +typedef union { + struct { + unsigned B0D40 : 1; + unsigned B0D41 : 1; + unsigned B0D42 : 1; + unsigned B0D43 : 1; + unsigned B0D44 : 1; + unsigned B0D45 : 1; + unsigned B0D46 : 1; + unsigned B0D47 : 1; + }; +} __B0D4bits_t; +extern volatile __B0D4bits_t __at (0xE2A) B0D4bits; + +extern __sfr __at (0xE2B) B0D5; +typedef union { + struct { + unsigned B0D50 : 1; + unsigned B0D51 : 1; + unsigned B0D52 : 1; + unsigned B0D53 : 1; + unsigned B0D54 : 1; + unsigned B0D55 : 1; + unsigned B0D56 : 1; + unsigned B0D57 : 1; + }; +} __B0D5bits_t; +extern volatile __B0D5bits_t __at (0xE2B) B0D5bits; + +extern __sfr __at (0xE2C) B0D6; +typedef union { + struct { + unsigned B0D60 : 1; + unsigned B0D61 : 1; + unsigned B0D62 : 1; + unsigned B0D63 : 1; + unsigned B0D64 : 1; + unsigned B0D65 : 1; + unsigned B0D66 : 1; + unsigned B0D67 : 1; + }; +} __B0D6bits_t; +extern volatile __B0D6bits_t __at (0xE2C) B0D6bits; + +extern __sfr __at (0xE2D) B0D7; +typedef union { + struct { + unsigned B0D70 : 1; + unsigned B0D71 : 1; + unsigned B0D72 : 1; + unsigned B0D73 : 1; + unsigned B0D74 : 1; + unsigned B0D75 : 1; + unsigned B0D76 : 1; + unsigned B0D77 : 1; + }; +} __B0D7bits_t; +extern volatile __B0D7bits_t __at (0xE2D) B0D7bits; + +extern __sfr __at (0xE2E) CANSTAT_RO9; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO9bits_t; +extern volatile __CANSTAT_RO9bits_t __at (0xE2E) CANSTAT_RO9bits; + +extern __sfr __at (0xE2F) CANCON_RO9; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO9bits_t; +extern volatile __CANCON_RO9bits_t __at (0xE2F) CANCON_RO9bits; + +extern __sfr __at (0xE30) B1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B1CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1CONbits_t; +extern volatile __B1CONbits_t __at (0xE30) B1CONbits; + +extern __sfr __at (0xE31) B1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B1SIDHbits_t; +extern volatile __B1SIDHbits_t __at (0xE31) B1SIDHbits; + +extern __sfr __at (0xE32) B1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1SIDLbits_t; +extern volatile __B1SIDLbits_t __at (0xE32) B1SIDLbits; + +extern __sfr __at (0xE33) B1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B1EIDHbits_t; +extern volatile __B1EIDHbits_t __at (0xE33) B1EIDHbits; + +extern __sfr __at (0xE34) B1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B1EIDLbits_t; +extern volatile __B1EIDLbits_t __at (0xE34) B1EIDLbits; + +extern __sfr __at (0xE35) B1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B1DLC : 1; + unsigned RB1_B1DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B1DLCbits_t; +extern volatile __B1DLCbits_t __at (0xE35) B1DLCbits; + +extern __sfr __at (0xE36) B1D0; +typedef union { + struct { + unsigned B1D00 : 1; + unsigned B1D01 : 1; + unsigned B1D02 : 1; + unsigned B1D03 : 1; + unsigned B1D04 : 1; + unsigned B1D05 : 1; + unsigned B1D06 : 1; + unsigned B1D07 : 1; + }; +} __B1D0bits_t; +extern volatile __B1D0bits_t __at (0xE36) B1D0bits; + +extern __sfr __at (0xE37) B1D1; +typedef union { + struct { + unsigned B1D10 : 1; + unsigned B1D11 : 1; + unsigned B1D12 : 1; + unsigned B1D13 : 1; + unsigned B1D14 : 1; + unsigned B1D15 : 1; + unsigned B1D16 : 1; + unsigned B1D17 : 1; + }; +} __B1D1bits_t; +extern volatile __B1D1bits_t __at (0xE37) B1D1bits; + +extern __sfr __at (0xE38) B1D2; +typedef union { + struct { + unsigned B1D20 : 1; + unsigned B1D21 : 1; + unsigned B1D22 : 1; + unsigned B1D23 : 1; + unsigned B1D24 : 1; + unsigned B1D25 : 1; + unsigned B1D26 : 1; + unsigned B1D27 : 1; + }; +} __B1D2bits_t; +extern volatile __B1D2bits_t __at (0xE38) B1D2bits; + +extern __sfr __at (0xE39) B1D3; +typedef union { + struct { + unsigned B1D30 : 1; + unsigned B1D31 : 1; + unsigned B1D32 : 1; + unsigned B1D33 : 1; + unsigned B1D34 : 1; + unsigned B1D35 : 1; + unsigned B1D36 : 1; + unsigned B1D37 : 1; + }; +} __B1D3bits_t; +extern volatile __B1D3bits_t __at (0xE39) B1D3bits; + +extern __sfr __at (0xE3A) B1D4; +typedef union { + struct { + unsigned B1D40 : 1; + unsigned B1D41 : 1; + unsigned B1D42 : 1; + unsigned B1D43 : 1; + unsigned B1D44 : 1; + unsigned B1D45 : 1; + unsigned B1D46 : 1; + unsigned B1D47 : 1; + }; +} __B1D4bits_t; +extern volatile __B1D4bits_t __at (0xE3A) B1D4bits; + +extern __sfr __at (0xE3B) B1D5; +typedef union { + struct { + unsigned B1D50 : 1; + unsigned B1D51 : 1; + unsigned B1D52 : 1; + unsigned B1D53 : 1; + unsigned B1D54 : 1; + unsigned B1D55 : 1; + unsigned B1D56 : 1; + unsigned B1D57 : 1; + }; +} __B1D5bits_t; +extern volatile __B1D5bits_t __at (0xE3B) B1D5bits; + +extern __sfr __at (0xE3C) B1D6; +typedef union { + struct { + unsigned B1D60 : 1; + unsigned B1D61 : 1; + unsigned B1D62 : 1; + unsigned B1D63 : 1; + unsigned B1D64 : 1; + unsigned B1D65 : 1; + unsigned B1D66 : 1; + unsigned B1D67 : 1; + }; +} __B1D6bits_t; +extern volatile __B1D6bits_t __at (0xE3C) B1D6bits; + +extern __sfr __at (0xE3D) B1D7; +typedef union { + struct { + unsigned B1D70 : 1; + unsigned B1D71 : 1; + unsigned B1D72 : 1; + unsigned B1D73 : 1; + unsigned B1D74 : 1; + unsigned B1D75 : 1; + unsigned B1D76 : 1; + unsigned B1D77 : 1; + }; +} __B1D7bits_t; +extern volatile __B1D7bits_t __at (0xE3D) B1D7bits; + +extern __sfr __at (0xE3E) CANSTAT_RO8; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO8bits_t; +extern volatile __CANSTAT_RO8bits_t __at (0xE3E) CANSTAT_RO8bits; + +extern __sfr __at (0xE3F) CANCON_RO8; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO8bits_t; +extern volatile __CANCON_RO8bits_t __at (0xE3F) CANCON_RO8bits; + +extern __sfr __at (0xE40) B2CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B2CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2CONbits_t; +extern volatile __B2CONbits_t __at (0xE40) B2CONbits; + +extern __sfr __at (0xE41) B2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B2SIDHbits_t; +extern volatile __B2SIDHbits_t __at (0xE41) B2SIDHbits; + +extern __sfr __at (0xE42) B2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2SIDLbits_t; +extern volatile __B2SIDLbits_t __at (0xE42) B2SIDLbits; + +extern __sfr __at (0xE43) B2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B2EIDHbits_t; +extern volatile __B2EIDHbits_t __at (0xE43) B2EIDHbits; + +extern __sfr __at (0xE44) B2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B2EIDLbits_t; +extern volatile __B2EIDLbits_t __at (0xE44) B2EIDLbits; + +extern __sfr __at (0xE45) B2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B2DLC : 1; + unsigned RB1_B2DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B2DLCbits_t; +extern volatile __B2DLCbits_t __at (0xE45) B2DLCbits; + +extern __sfr __at (0xE46) B2D0; +typedef union { + struct { + unsigned B2D00 : 1; + unsigned B2D01 : 1; + unsigned B2D02 : 1; + unsigned B2D03 : 1; + unsigned B2D04 : 1; + unsigned B2D05 : 1; + unsigned B2D06 : 1; + unsigned B2D07 : 1; + }; +} __B2D0bits_t; +extern volatile __B2D0bits_t __at (0xE46) B2D0bits; + +extern __sfr __at (0xE47) B2D1; +typedef union { + struct { + unsigned B2D10 : 1; + unsigned B2D11 : 1; + unsigned B2D12 : 1; + unsigned B2D13 : 1; + unsigned B2D14 : 1; + unsigned B2D15 : 1; + unsigned B2D16 : 1; + unsigned B2D17 : 1; + }; +} __B2D1bits_t; +extern volatile __B2D1bits_t __at (0xE47) B2D1bits; + +extern __sfr __at (0xE48) B2D2; +typedef union { + struct { + unsigned B2D20 : 1; + unsigned B2D21 : 1; + unsigned B2D22 : 1; + unsigned B2D23 : 1; + unsigned B2D24 : 1; + unsigned B2D25 : 1; + unsigned B2D26 : 1; + unsigned B2D27 : 1; + }; +} __B2D2bits_t; +extern volatile __B2D2bits_t __at (0xE48) B2D2bits; + +extern __sfr __at (0xE49) B2D3; +typedef union { + struct { + unsigned B2D30 : 1; + unsigned B2D31 : 1; + unsigned B2D32 : 1; + unsigned B2D33 : 1; + unsigned B2D34 : 1; + unsigned B2D35 : 1; + unsigned B2D36 : 1; + unsigned B2D37 : 1; + }; +} __B2D3bits_t; +extern volatile __B2D3bits_t __at (0xE49) B2D3bits; + +extern __sfr __at (0xE4A) B2D4; +typedef union { + struct { + unsigned B2D40 : 1; + unsigned B2D41 : 1; + unsigned B2D42 : 1; + unsigned B2D43 : 1; + unsigned B2D44 : 1; + unsigned B2D45 : 1; + unsigned B2D46 : 1; + unsigned B2D47 : 1; + }; +} __B2D4bits_t; +extern volatile __B2D4bits_t __at (0xE4A) B2D4bits; + +extern __sfr __at (0xE4B) B2D5; +typedef union { + struct { + unsigned B2D50 : 1; + unsigned B2D51 : 1; + unsigned B2D52 : 1; + unsigned B2D53 : 1; + unsigned B2D54 : 1; + unsigned B2D55 : 1; + unsigned B2D56 : 1; + unsigned B2D57 : 1; + }; +} __B2D5bits_t; +extern volatile __B2D5bits_t __at (0xE4B) B2D5bits; + +extern __sfr __at (0xE4C) B2D6; +typedef union { + struct { + unsigned B2D60 : 1; + unsigned B2D61 : 1; + unsigned B2D62 : 1; + unsigned B2D63 : 1; + unsigned B2D64 : 1; + unsigned B2D65 : 1; + unsigned B2D66 : 1; + unsigned B2D67 : 1; + }; +} __B2D6bits_t; +extern volatile __B2D6bits_t __at (0xE4C) B2D6bits; + +extern __sfr __at (0xE4D) B2D7; +typedef union { + struct { + unsigned B2D70 : 1; + unsigned B2D71 : 1; + unsigned B2D72 : 1; + unsigned B2D73 : 1; + unsigned B2D74 : 1; + unsigned B2D75 : 1; + unsigned B2D76 : 1; + unsigned B2D77 : 1; + }; +} __B2D7bits_t; +extern volatile __B2D7bits_t __at (0xE4D) B2D7bits; + +extern __sfr __at (0xE4E) CANSTAT_RO7; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO7bits_t; +extern volatile __CANSTAT_RO7bits_t __at (0xE4E) CANSTAT_RO7bits; + +extern __sfr __at (0xE4F) CANCON_RO7; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO7bits_t; +extern volatile __CANCON_RO7bits_t __at (0xE4F) CANCON_RO7bits; + +extern __sfr __at (0xE50) B3CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B3CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3CONbits_t; +extern volatile __B3CONbits_t __at (0xE50) B3CONbits; + +extern __sfr __at (0xE51) B3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B3SIDHbits_t; +extern volatile __B3SIDHbits_t __at (0xE51) B3SIDHbits; + +extern __sfr __at (0xE52) B3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3SIDLbits_t; +extern volatile __B3SIDLbits_t __at (0xE52) B3SIDLbits; + +extern __sfr __at (0xE53) B3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B3EIDHbits_t; +extern volatile __B3EIDHbits_t __at (0xE53) B3EIDHbits; + +extern __sfr __at (0xE54) B3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B3EIDLbits_t; +extern volatile __B3EIDLbits_t __at (0xE54) B3EIDLbits; + +extern __sfr __at (0xE55) B3DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B3DLC : 1; + unsigned RB1_B3DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B3DLCbits_t; +extern volatile __B3DLCbits_t __at (0xE55) B3DLCbits; + +extern __sfr __at (0xE56) B3D0; +typedef union { + struct { + unsigned B3D00 : 1; + unsigned B3D01 : 1; + unsigned B3D02 : 1; + unsigned B3D03 : 1; + unsigned B3D04 : 1; + unsigned B3D05 : 1; + unsigned B3D06 : 1; + unsigned B3D07 : 1; + }; +} __B3D0bits_t; +extern volatile __B3D0bits_t __at (0xE56) B3D0bits; + +extern __sfr __at (0xE57) B3D1; +typedef union { + struct { + unsigned B3D10 : 1; + unsigned B3D11 : 1; + unsigned B3D12 : 1; + unsigned B3D13 : 1; + unsigned B3D14 : 1; + unsigned B3D15 : 1; + unsigned B3D16 : 1; + unsigned B3D17 : 1; + }; +} __B3D1bits_t; +extern volatile __B3D1bits_t __at (0xE57) B3D1bits; + +extern __sfr __at (0xE58) B3D2; +typedef union { + struct { + unsigned B3D20 : 1; + unsigned B3D21 : 1; + unsigned B3D22 : 1; + unsigned B3D23 : 1; + unsigned B3D24 : 1; + unsigned B3D25 : 1; + unsigned B3D26 : 1; + unsigned B3D27 : 1; + }; +} __B3D2bits_t; +extern volatile __B3D2bits_t __at (0xE58) B3D2bits; + +extern __sfr __at (0xE59) B3D3; +typedef union { + struct { + unsigned B3D30 : 1; + unsigned B3D31 : 1; + unsigned B3D32 : 1; + unsigned B3D33 : 1; + unsigned B3D34 : 1; + unsigned B3D35 : 1; + unsigned B3D36 : 1; + unsigned B3D37 : 1; + }; +} __B3D3bits_t; +extern volatile __B3D3bits_t __at (0xE59) B3D3bits; + +extern __sfr __at (0xE5A) B3D4; +typedef union { + struct { + unsigned B3D40 : 1; + unsigned B3D41 : 1; + unsigned B3D42 : 1; + unsigned B3D43 : 1; + unsigned B3D44 : 1; + unsigned B3D45 : 1; + unsigned B3D46 : 1; + unsigned B3D47 : 1; + }; +} __B3D4bits_t; +extern volatile __B3D4bits_t __at (0xE5A) B3D4bits; + +extern __sfr __at (0xE5B) B3D5; +typedef union { + struct { + unsigned B3D50 : 1; + unsigned B3D51 : 1; + unsigned B3D52 : 1; + unsigned B3D53 : 1; + unsigned B3D54 : 1; + unsigned B3D55 : 1; + unsigned B3D56 : 1; + unsigned B3D57 : 1; + }; +} __B3D5bits_t; +extern volatile __B3D5bits_t __at (0xE5B) B3D5bits; + +extern __sfr __at (0xE5C) B3D6; +typedef union { + struct { + unsigned B3D60 : 1; + unsigned B3D61 : 1; + unsigned B3D62 : 1; + unsigned B3D63 : 1; + unsigned B3D64 : 1; + unsigned B3D65 : 1; + unsigned B3D66 : 1; + unsigned B3D67 : 1; + }; +} __B3D6bits_t; +extern volatile __B3D6bits_t __at (0xE5C) B3D6bits; + +extern __sfr __at (0xE5D) B3D7; +typedef union { + struct { + unsigned B3D70 : 1; + unsigned B3D71 : 1; + unsigned B3D72 : 1; + unsigned B3D73 : 1; + unsigned B3D74 : 1; + unsigned B3D75 : 1; + unsigned B3D76 : 1; + unsigned B3D77 : 1; + }; +} __B3D7bits_t; +extern volatile __B3D7bits_t __at (0xE5D) B3D7bits; + +extern __sfr __at (0xE5E) CANSTAT_RO6; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO6bits_t; +extern volatile __CANSTAT_RO6bits_t __at (0xE5E) CANSTAT_RO6bits; + +extern __sfr __at (0xE5F) CANCON_RO6; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO6bits_t; +extern volatile __CANCON_RO6bits_t __at (0xE5F) CANCON_RO6bits; + +extern __sfr __at (0xE60) B4CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B4CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4CONbits_t; +extern volatile __B4CONbits_t __at (0xE60) B4CONbits; + +extern __sfr __at (0xE61) B4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B4SIDHbits_t; +extern volatile __B4SIDHbits_t __at (0xE61) B4SIDHbits; + +extern __sfr __at (0xE62) B4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4SIDLbits_t; +extern volatile __B4SIDLbits_t __at (0xE62) B4SIDLbits; + +extern __sfr __at (0xE63) B4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B4EIDHbits_t; +extern volatile __B4EIDHbits_t __at (0xE63) B4EIDHbits; + +extern __sfr __at (0xE64) B4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B4EIDLbits_t; +extern volatile __B4EIDLbits_t __at (0xE64) B4EIDLbits; + +extern __sfr __at (0xE65) B4DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B4DLC : 1; + unsigned RB1_B4DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B4DLCbits_t; +extern volatile __B4DLCbits_t __at (0xE65) B4DLCbits; + +extern __sfr __at (0xE66) B4D0; +typedef union { + struct { + unsigned B4D00 : 1; + unsigned B4D01 : 1; + unsigned B4D02 : 1; + unsigned B4D03 : 1; + unsigned B4D04 : 1; + unsigned B4D05 : 1; + unsigned B4D06 : 1; + unsigned B4D07 : 1; + }; +} __B4D0bits_t; +extern volatile __B4D0bits_t __at (0xE66) B4D0bits; + +extern __sfr __at (0xE67) B4D1; +typedef union { + struct { + unsigned B4D10 : 1; + unsigned B4D11 : 1; + unsigned B4D12 : 1; + unsigned B4D13 : 1; + unsigned B4D14 : 1; + unsigned B4D15 : 1; + unsigned B4D16 : 1; + unsigned B4D17 : 1; + }; +} __B4D1bits_t; +extern volatile __B4D1bits_t __at (0xE67) B4D1bits; + +extern __sfr __at (0xE68) B4D2; +typedef union { + struct { + unsigned B4D20 : 1; + unsigned B4D21 : 1; + unsigned B4D22 : 1; + unsigned B4D23 : 1; + unsigned B4D24 : 1; + unsigned B4D25 : 1; + unsigned B4D26 : 1; + unsigned B4D27 : 1; + }; +} __B4D2bits_t; +extern volatile __B4D2bits_t __at (0xE68) B4D2bits; + +extern __sfr __at (0xE69) B4D3; +typedef union { + struct { + unsigned B4D30 : 1; + unsigned B4D31 : 1; + unsigned B4D32 : 1; + unsigned B4D33 : 1; + unsigned B4D34 : 1; + unsigned B4D35 : 1; + unsigned B4D36 : 1; + unsigned B4D37 : 1; + }; +} __B4D3bits_t; +extern volatile __B4D3bits_t __at (0xE69) B4D3bits; + +extern __sfr __at (0xE6A) B4D4; +typedef union { + struct { + unsigned B4D40 : 1; + unsigned B4D41 : 1; + unsigned B4D42 : 1; + unsigned B4D43 : 1; + unsigned B4D44 : 1; + unsigned B4D45 : 1; + unsigned B4D46 : 1; + unsigned B4D47 : 1; + }; +} __B4D4bits_t; +extern volatile __B4D4bits_t __at (0xE6A) B4D4bits; + +extern __sfr __at (0xE6B) B4D5; +typedef union { + struct { + unsigned B4D50 : 1; + unsigned B4D51 : 1; + unsigned B4D52 : 1; + unsigned B4D53 : 1; + unsigned B4D54 : 1; + unsigned B4D55 : 1; + unsigned B4D56 : 1; + unsigned B4D57 : 1; + }; +} __B4D5bits_t; +extern volatile __B4D5bits_t __at (0xE6B) B4D5bits; + +extern __sfr __at (0xE6C) B4D6; +typedef union { + struct { + unsigned B4D60 : 1; + unsigned B4D61 : 1; + unsigned B4D62 : 1; + unsigned B4D63 : 1; + unsigned B4D64 : 1; + unsigned B4D65 : 1; + unsigned B4D66 : 1; + unsigned B4D67 : 1; + }; +} __B4D6bits_t; +extern volatile __B4D6bits_t __at (0xE6C) B4D6bits; + +extern __sfr __at (0xE6D) B4D7; +typedef union { + struct { + unsigned B4D70 : 1; + unsigned B4D71 : 1; + unsigned B4D72 : 1; + unsigned B4D73 : 1; + unsigned B4D74 : 1; + unsigned B4D75 : 1; + unsigned B4D76 : 1; + unsigned B46D77 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B4D77 : 1; + }; +} __B4D7bits_t; +extern volatile __B4D7bits_t __at (0xE6D) B4D7bits; + +extern __sfr __at (0xE6E) CANSTAT_RO5; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO5bits_t; +extern volatile __CANSTAT_RO5bits_t __at (0xE6E) CANSTAT_RO5bits; + +extern __sfr __at (0xE6F) CANCON_RO5; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO5bits_t; +extern volatile __CANCON_RO5bits_t __at (0xE6F) CANCON_RO5bits; + +extern __sfr __at (0xE70) B5CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B5CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5CONbits_t; +extern volatile __B5CONbits_t __at (0xE70) B5CONbits; + +extern __sfr __at (0xE71) B5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B5SIDHbits_t; +extern volatile __B5SIDHbits_t __at (0xE71) B5SIDHbits; + +extern __sfr __at (0xE72) B5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5SIDLbits_t; +extern volatile __B5SIDLbits_t __at (0xE72) B5SIDLbits; + +extern __sfr __at (0xE73) B5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B5EIDHbits_t; +extern volatile __B5EIDHbits_t __at (0xE73) B5EIDHbits; + +extern __sfr __at (0xE74) B5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B5EIDLbits_t; +extern volatile __B5EIDLbits_t __at (0xE74) B5EIDLbits; + +extern __sfr __at (0xE75) B5DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B5DLC : 1; + unsigned RB1_B5DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5DLCbits_t; +extern volatile __B5DLCbits_t __at (0xE75) B5DLCbits; + +extern __sfr __at (0xE76) B5D0; +typedef union { + struct { + unsigned B5D00 : 1; + unsigned B5D01 : 1; + unsigned B5D02 : 1; + unsigned B5D03 : 1; + unsigned B5D04 : 1; + unsigned B5D05 : 1; + unsigned B5D06 : 1; + unsigned B57D07 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D07 : 1; + }; +} __B5D0bits_t; +extern volatile __B5D0bits_t __at (0xE76) B5D0bits; + +extern __sfr __at (0xE77) B5D1; +typedef union { + struct { + unsigned B5D10 : 1; + unsigned B5D11 : 1; + unsigned B5D12 : 1; + unsigned B5D13 : 1; + unsigned B5D14 : 1; + unsigned B5D15 : 1; + unsigned B5D16 : 1; + unsigned B5D17 : 1; + }; +} __B5D1bits_t; +extern volatile __B5D1bits_t __at (0xE77) B5D1bits; + +extern __sfr __at (0xE78) B5D2; +typedef union { + struct { + unsigned B5D20 : 1; + unsigned B5D21 : 1; + unsigned B5D22 : 1; + unsigned B57D23 : 1; + unsigned B5D24 : 1; + unsigned B5D25 : 1; + unsigned B5D26 : 1; + unsigned B5D27 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D23 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5D2bits_t; +extern volatile __B5D2bits_t __at (0xE78) B5D2bits; + +extern __sfr __at (0xE79) B5D3; +typedef union { + struct { + unsigned B5D30 : 1; + unsigned B5D31 : 1; + unsigned B5D32 : 1; + unsigned B5D33 : 1; + unsigned B5D34 : 1; + unsigned B5D35 : 1; + unsigned B5D36 : 1; + unsigned B5D37 : 1; + }; +} __B5D3bits_t; +extern volatile __B5D3bits_t __at (0xE79) B5D3bits; + +extern __sfr __at (0xE7A) B5D4; +typedef union { + struct { + unsigned B5D40 : 1; + unsigned B5D41 : 1; + unsigned B5D42 : 1; + unsigned B5D43 : 1; + unsigned B5D44 : 1; + unsigned B5D45 : 1; + unsigned B5D46 : 1; + unsigned B5D47 : 1; + }; +} __B5D4bits_t; +extern volatile __B5D4bits_t __at (0xE7A) B5D4bits; + +extern __sfr __at (0xE7B) B5D5; +typedef union { + struct { + unsigned B5D50 : 1; + unsigned B5D51 : 1; + unsigned B5D52 : 1; + unsigned B5D53 : 1; + unsigned B5D54 : 1; + unsigned B5D55 : 1; + unsigned B5D56 : 1; + unsigned B5D57 : 1; + }; +} __B5D5bits_t; +extern volatile __B5D5bits_t __at (0xE7B) B5D5bits; + +extern __sfr __at (0xE7C) B5D6; +typedef union { + struct { + unsigned B5D60 : 1; + unsigned B5D61 : 1; + unsigned B5D62 : 1; + unsigned B5D63 : 1; + unsigned B5D64 : 1; + unsigned B5D65 : 1; + unsigned B5D66 : 1; + unsigned B5D67 : 1; + }; +} __B5D6bits_t; +extern volatile __B5D6bits_t __at (0xE7C) B5D6bits; + +extern __sfr __at (0xE7D) B5D7; +typedef union { + struct { + unsigned B5D70 : 1; + unsigned B5D71 : 1; + unsigned B5D72 : 1; + unsigned B5D73 : 1; + unsigned B5D74 : 1; + unsigned B5D75 : 1; + unsigned B5D76 : 1; + unsigned B5D77 : 1; + }; +} __B5D7bits_t; +extern volatile __B5D7bits_t __at (0xE7D) B5D7bits; + +extern __sfr __at (0xE7E) CANSTAT_RO4; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO4bits_t; +extern volatile __CANSTAT_RO4bits_t __at (0xE7E) CANSTAT_RO4bits; + +extern __sfr __at (0xE7F) CANCON_RO4; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO4bits_t; +extern volatile __CANCON_RO4bits_t __at (0xE7F) CANCON_RO4bits; + +extern __sfr __at (0xF00) RXF0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF0SIDHbits_t; +extern volatile __RXF0SIDHbits_t __at (0xF00) RXF0SIDHbits; + +extern __sfr __at (0xF01) RXF0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF0SIDLbits_t; +extern volatile __RXF0SIDLbits_t __at (0xF01) RXF0SIDLbits; + +extern __sfr __at (0xF02) RXF0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF0EIDHbits_t; +extern volatile __RXF0EIDHbits_t __at (0xF02) RXF0EIDHbits; + +extern __sfr __at (0xF03) RXF0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF0EIDLbits_t; +extern volatile __RXF0EIDLbits_t __at (0xF03) RXF0EIDLbits; + +extern __sfr __at (0xF04) RXF1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF1SIDHbits_t; +extern volatile __RXF1SIDHbits_t __at (0xF04) RXF1SIDHbits; + +extern __sfr __at (0xF05) RXF1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF1SIDLbits_t; +extern volatile __RXF1SIDLbits_t __at (0xF05) RXF1SIDLbits; + +extern __sfr __at (0xF06) RXF1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF1EIDHbits_t; +extern volatile __RXF1EIDHbits_t __at (0xF06) RXF1EIDHbits; + +extern __sfr __at (0xF07) RXF1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF1EIDLbits_t; +extern volatile __RXF1EIDLbits_t __at (0xF07) RXF1EIDLbits; + +extern __sfr __at (0xF08) RXF2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF2SIDHbits_t; +extern volatile __RXF2SIDHbits_t __at (0xF08) RXF2SIDHbits; + +extern __sfr __at (0xF09) RXF2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF2SIDLbits_t; +extern volatile __RXF2SIDLbits_t __at (0xF09) RXF2SIDLbits; + +extern __sfr __at (0xF0A) RXF2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF2EIDHbits_t; +extern volatile __RXF2EIDHbits_t __at (0xF0A) RXF2EIDHbits; + +extern __sfr __at (0xF0B) RXF2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF2EIDLbits_t; +extern volatile __RXF2EIDLbits_t __at (0xF0B) RXF2EIDLbits; + +extern __sfr __at (0xF0C) RXF3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF3SIDHbits_t; +extern volatile __RXF3SIDHbits_t __at (0xF0C) RXF3SIDHbits; + +extern __sfr __at (0xF0D) RXF3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF3SIDLbits_t; +extern volatile __RXF3SIDLbits_t __at (0xF0D) RXF3SIDLbits; + +extern __sfr __at (0xF0E) RXF3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF3EIDHbits_t; +extern volatile __RXF3EIDHbits_t __at (0xF0E) RXF3EIDHbits; + +extern __sfr __at (0xF0F) RXF3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF3EIDLbits_t; +extern volatile __RXF3EIDLbits_t __at (0xF0F) RXF3EIDLbits; + +extern __sfr __at (0xF10) RXF4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF4SIDHbits_t; +extern volatile __RXF4SIDHbits_t __at (0xF10) RXF4SIDHbits; + +extern __sfr __at (0xF11) RXF4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF4SIDLbits_t; +extern volatile __RXF4SIDLbits_t __at (0xF11) RXF4SIDLbits; + +extern __sfr __at (0xF12) RXF4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF4EIDHbits_t; +extern volatile __RXF4EIDHbits_t __at (0xF12) RXF4EIDHbits; + +extern __sfr __at (0xF13) RXF4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF4EIDLbits_t; +extern volatile __RXF4EIDLbits_t __at (0xF13) RXF4EIDLbits; + +extern __sfr __at (0xF14) RXF5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF5SIDHbits_t; +extern volatile __RXF5SIDHbits_t __at (0xF14) RXF5SIDHbits; + +extern __sfr __at (0xF15) RXF5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF5SIDLbits_t; +extern volatile __RXF5SIDLbits_t __at (0xF15) RXF5SIDLbits; + +extern __sfr __at (0xF16) RXF5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF5EIDHbits_t; +extern volatile __RXF5EIDHbits_t __at (0xF16) RXF5EIDHbits; + +extern __sfr __at (0xF17) RXF5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF5EIDLbits_t; +extern volatile __RXF5EIDLbits_t __at (0xF17) RXF5EIDLbits; + +extern __sfr __at (0xF18) RXM0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM0SIDHbits_t; +extern volatile __RXM0SIDHbits_t __at (0xF18) RXM0SIDHbits; + +extern __sfr __at (0xF19) RXM0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM0SIDLbits_t; +extern volatile __RXM0SIDLbits_t __at (0xF19) RXM0SIDLbits; + +extern __sfr __at (0xF1A) RXM0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM0EIDHbits_t; +extern volatile __RXM0EIDHbits_t __at (0xF1A) RXM0EIDHbits; + +extern __sfr __at (0xF1B) RXM0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM0EIDLbits_t; +extern volatile __RXM0EIDLbits_t __at (0xF1B) RXM0EIDLbits; + +extern __sfr __at (0xF1C) RXM1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM1SIDHbits_t; +extern volatile __RXM1SIDHbits_t __at (0xF1C) RXM1SIDHbits; + +extern __sfr __at (0xF1D) RXM1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM1SIDLbits_t; +extern volatile __RXM1SIDLbits_t __at (0xF1D) RXM1SIDLbits; + +extern __sfr __at (0xF1E) RXM1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM1EIDHbits_t; +extern volatile __RXM1EIDHbits_t __at (0xF1E) RXM1EIDHbits; + +extern __sfr __at (0xF1F) RXM1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM1EIDLbits_t; +extern volatile __RXM1EIDLbits_t __at (0xF1F) RXM1EIDLbits; + +extern __sfr __at (0xF20) TXB2CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFBXB2CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB2CONbits_t; +extern volatile __TXB2CONbits_t __at (0xF20) TXB2CONbits; + +extern __sfr __at (0xF21) TXB2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB2SIDHbits_t; +extern volatile __TXB2SIDHbits_t __at (0xF21) TXB2SIDHbits; + +extern __sfr __at (0xF22) TXB2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB2SIDLbits_t; +extern volatile __TXB2SIDLbits_t __at (0xF22) TXB2SIDLbits; + +extern __sfr __at (0xF23) TXB2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB2EIDHbits_t; +extern volatile __TXB2EIDHbits_t __at (0xF23) TXB2EIDHbits; + +extern __sfr __at (0xF24) TXB2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB2EIDLbits_t; +extern volatile __TXB2EIDLbits_t __at (0xF24) TXB2EIDLbits; + +extern __sfr __at (0xF25) TXB2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB2DLCbits_t; +extern volatile __TXB2DLCbits_t __at (0xF25) TXB2DLCbits; + +extern __sfr __at (0xF26) TXB2D0; +typedef union { + struct { + unsigned TXB2D00 : 1; + unsigned TXB2D01 : 1; + unsigned TXB2D02 : 1; + unsigned TXB2D03 : 1; + unsigned TXB2D04 : 1; + unsigned TXB2D05 : 1; + unsigned TXB2D06 : 1; + unsigned TXB2D07 : 1; + }; +} __TXB2D0bits_t; +extern volatile __TXB2D0bits_t __at (0xF26) TXB2D0bits; + +extern __sfr __at (0xF27) TXB2D1; +typedef union { + struct { + unsigned TXB2D10 : 1; + unsigned TXB2D11 : 1; + unsigned TXB2D12 : 1; + unsigned TXB2D13 : 1; + unsigned TXB2D14 : 1; + unsigned TXB2D15 : 1; + unsigned TXB2D16 : 1; + unsigned TXB2D17 : 1; + }; +} __TXB2D1bits_t; +extern volatile __TXB2D1bits_t __at (0xF27) TXB2D1bits; + +extern __sfr __at (0xF28) TXB2D2; +typedef union { + struct { + unsigned TXB2D20 : 1; + unsigned TXB2D21 : 1; + unsigned TXB2D22 : 1; + unsigned TXB2D23 : 1; + unsigned TXB2D24 : 1; + unsigned TXB2D25 : 1; + unsigned TXB2D26 : 1; + unsigned TXB2D27 : 1; + }; +} __TXB2D2bits_t; +extern volatile __TXB2D2bits_t __at (0xF28) TXB2D2bits; + +extern __sfr __at (0xF29) TXB2D3; +typedef union { + struct { + unsigned TXB2D30 : 1; + unsigned TXB2D31 : 1; + unsigned TXB2D32 : 1; + unsigned TXB2D33 : 1; + unsigned TXB2D34 : 1; + unsigned TXB2D35 : 1; + unsigned TXB2D36 : 1; + unsigned TXB2D37 : 1; + }; +} __TXB2D3bits_t; +extern volatile __TXB2D3bits_t __at (0xF29) TXB2D3bits; + +extern __sfr __at (0xF2A) TXB2D4; +typedef union { + struct { + unsigned TXB2D40 : 1; + unsigned TXB2D41 : 1; + unsigned TXB2D42 : 1; + unsigned TXB2D43 : 1; + unsigned TXB2D44 : 1; + unsigned TXB2D45 : 1; + unsigned TXB2D46 : 1; + unsigned TXB2D47 : 1; + }; +} __TXB2D4bits_t; +extern volatile __TXB2D4bits_t __at (0xF2A) TXB2D4bits; + +extern __sfr __at (0xF2B) TXB2D5; +typedef union { + struct { + unsigned TXB2D50 : 1; + unsigned TXB2D51 : 1; + unsigned TXB2D52 : 1; + unsigned TXB2D53 : 1; + unsigned TXB2D54 : 1; + unsigned TXB2D55 : 1; + unsigned TXB2D56 : 1; + unsigned TXB2D57 : 1; + }; +} __TXB2D5bits_t; +extern volatile __TXB2D5bits_t __at (0xF2B) TXB2D5bits; + +extern __sfr __at (0xF2C) TXB2D6; +typedef union { + struct { + unsigned TXB2D60 : 1; + unsigned TXB2D61 : 1; + unsigned TXB2D62 : 1; + unsigned TXB2D63 : 1; + unsigned TXB2D64 : 1; + unsigned TXB2D65 : 1; + unsigned TXB2D66 : 1; + unsigned TXB2D67 : 1; + }; +} __TXB2D6bits_t; +extern volatile __TXB2D6bits_t __at (0xF2C) TXB2D6bits; + +extern __sfr __at (0xF2D) TXB2D7; +typedef union { + struct { + unsigned TXB2D70 : 1; + unsigned TXB2D71 : 1; + unsigned TXB2D72 : 1; + unsigned TXB2D73 : 1; + unsigned TXB2D74 : 1; + unsigned TXB2D75 : 1; + unsigned TXB2D76 : 1; + unsigned TXB2D77 : 1; + }; +} __TXB2D7bits_t; +extern volatile __TXB2D7bits_t __at (0xF2D) TXB2D7bits; + +extern __sfr __at (0xF2E) CANSTAT_RO3; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO3bits_t; +extern volatile __CANSTAT_RO3bits_t __at (0xF2E) CANSTAT_RO3bits; + +extern __sfr __at (0xF2F) CANCON_RO3; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO3bits_t; +extern volatile __CANCON_RO3bits_t __at (0xF2F) CANCON_RO3bits; + +extern __sfr __at (0xF30) TXB1CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFTXB1CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB1CONbits_t; +extern volatile __TXB1CONbits_t __at (0xF30) TXB1CONbits; + +extern __sfr __at (0xF31) TXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB1SIDHbits_t; +extern volatile __TXB1SIDHbits_t __at (0xF31) TXB1SIDHbits; + +extern __sfr __at (0xF32) TXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB1SIDLbits_t; +extern volatile __TXB1SIDLbits_t __at (0xF32) TXB1SIDLbits; + +extern __sfr __at (0xF33) TXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB1EIDHbits_t; +extern volatile __TXB1EIDHbits_t __at (0xF33) TXB1EIDHbits; + +extern __sfr __at (0xF34) TXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB1EIDLbits_t; +extern volatile __TXB1EIDLbits_t __at (0xF34) TXB1EIDLbits; + +extern __sfr __at (0xF35) TXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB1DLCbits_t; +extern volatile __TXB1DLCbits_t __at (0xF35) TXB1DLCbits; + +extern __sfr __at (0xF36) TXB1D0; +typedef union { + struct { + unsigned TXB1D00 : 1; + unsigned TXB1D01 : 1; + unsigned TXB1D02 : 1; + unsigned TXB1D03 : 1; + unsigned TXB1D04 : 1; + unsigned TXB1D05 : 1; + unsigned TXB1D06 : 1; + unsigned TXB1D07 : 1; + }; +} __TXB1D0bits_t; +extern volatile __TXB1D0bits_t __at (0xF36) TXB1D0bits; + +extern __sfr __at (0xF37) TXB1D1; +typedef union { + struct { + unsigned TXB1D10 : 1; + unsigned TXB1D11 : 1; + unsigned TXB1D12 : 1; + unsigned TXB1D13 : 1; + unsigned TXB1D14 : 1; + unsigned TXB1D15 : 1; + unsigned TXB1D16 : 1; + unsigned TXB1D17 : 1; + }; +} __TXB1D1bits_t; +extern volatile __TXB1D1bits_t __at (0xF37) TXB1D1bits; + +extern __sfr __at (0xF38) TXB1D2; +typedef union { + struct { + unsigned TXB1D20 : 1; + unsigned TXB1D21 : 1; + unsigned TXB1D22 : 1; + unsigned TXB1D23 : 1; + unsigned TXB1D24 : 1; + unsigned TXB1D25 : 1; + unsigned TXB1D26 : 1; + unsigned TXB1D27 : 1; + }; +} __TXB1D2bits_t; +extern volatile __TXB1D2bits_t __at (0xF38) TXB1D2bits; + +extern __sfr __at (0xF39) TXB1D3; +typedef union { + struct { + unsigned TXB1D30 : 1; + unsigned TXB1D31 : 1; + unsigned TXB1D32 : 1; + unsigned TXB1D33 : 1; + unsigned TXB1D34 : 1; + unsigned TXB1D35 : 1; + unsigned TXB1D36 : 1; + unsigned TXB1D37 : 1; + }; +} __TXB1D3bits_t; +extern volatile __TXB1D3bits_t __at (0xF39) TXB1D3bits; + +extern __sfr __at (0xF3A) TXB1D4; +typedef union { + struct { + unsigned TXB1D40 : 1; + unsigned TXB1D41 : 1; + unsigned TXB1D42 : 1; + unsigned TXB1D43 : 1; + unsigned TXB1D44 : 1; + unsigned TXB1D45 : 1; + unsigned TXB1D46 : 1; + unsigned TXB1D47 : 1; + }; +} __TXB1D4bits_t; +extern volatile __TXB1D4bits_t __at (0xF3A) TXB1D4bits; + +extern __sfr __at (0xF3B) TXB1D5; +typedef union { + struct { + unsigned TXB1D50 : 1; + unsigned TXB1D51 : 1; + unsigned TXB1D52 : 1; + unsigned TXB1D53 : 1; + unsigned TXB1D54 : 1; + unsigned TXB1D55 : 1; + unsigned TXB1D56 : 1; + unsigned TXB1D57 : 1; + }; +} __TXB1D5bits_t; +extern volatile __TXB1D5bits_t __at (0xF3B) TXB1D5bits; + +extern __sfr __at (0xF3C) TXB1D6; +typedef union { + struct { + unsigned TXB1D60 : 1; + unsigned TXB1D61 : 1; + unsigned TXB1D62 : 1; + unsigned TXB1D63 : 1; + unsigned TXB1D64 : 1; + unsigned TXB1D65 : 1; + unsigned TXB1D66 : 1; + unsigned TXB1D67 : 1; + }; +} __TXB1D6bits_t; +extern volatile __TXB1D6bits_t __at (0xF3C) TXB1D6bits; + +extern __sfr __at (0xF3D) TXB1D7; +typedef union { + struct { + unsigned TXB1D70 : 1; + unsigned TXB1D71 : 1; + unsigned TXB1D72 : 1; + unsigned TXB1D73 : 1; + unsigned TXB1D74 : 1; + unsigned TXB1D75 : 1; + unsigned TXB1D76 : 1; + unsigned TXB1D77 : 1; + }; +} __TXB1D7bits_t; +extern volatile __TXB1D7bits_t __at (0xF3D) TXB1D7bits; + +extern __sfr __at (0xF3E) CANSTAT_RO2; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO2bits_t; +extern volatile __CANSTAT_RO2bits_t __at (0xF3E) CANSTAT_RO2bits; + +extern __sfr __at (0xF3F) CANCON_RO2; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO2bits_t; +extern volatile __CANCON_RO2bits_t __at (0xF3F) CANCON_RO2bits; + +extern __sfr __at (0xF40) TXB0CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; +} __TXB0CONbits_t; +extern volatile __TXB0CONbits_t __at (0xF40) TXB0CONbits; + +extern __sfr __at (0xF41) TXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB0SIDHbits_t; +extern volatile __TXB0SIDHbits_t __at (0xF41) TXB0SIDHbits; + +extern __sfr __at (0xF42) TXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB0SIDLbits_t; +extern volatile __TXB0SIDLbits_t __at (0xF42) TXB0SIDLbits; + +extern __sfr __at (0xF43) TXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB0EIDHbits_t; +extern volatile __TXB0EIDHbits_t __at (0xF43) TXB0EIDHbits; + +extern __sfr __at (0xF44) TXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB0EIDLbits_t; +extern volatile __TXB0EIDLbits_t __at (0xF44) TXB0EIDLbits; + +extern __sfr __at (0xF45) TXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB0DLCbits_t; +extern volatile __TXB0DLCbits_t __at (0xF45) TXB0DLCbits; + +extern __sfr __at (0xF46) TXB0D0; +typedef union { + struct { + unsigned TXB0D00 : 1; + unsigned TXB0D01 : 1; + unsigned TXB0D02 : 1; + unsigned TXB0D03 : 1; + unsigned TXB0D04 : 1; + unsigned TXB0D05 : 1; + unsigned TXB0D06 : 1; + unsigned TXB0D07 : 1; + }; +} __TXB0D0bits_t; +extern volatile __TXB0D0bits_t __at (0xF46) TXB0D0bits; + +extern __sfr __at (0xF47) TXB0D1; +typedef union { + struct { + unsigned TXB0D10 : 1; + unsigned TXB0D11 : 1; + unsigned TXB0D12 : 1; + unsigned TXB0D13 : 1; + unsigned TXB0D14 : 1; + unsigned TXB0D15 : 1; + unsigned TXB0D16 : 1; + unsigned TXB0D17 : 1; + }; +} __TXB0D1bits_t; +extern volatile __TXB0D1bits_t __at (0xF47) TXB0D1bits; + +extern __sfr __at (0xF48) TXB0D2; +typedef union { + struct { + unsigned TXB0D20 : 1; + unsigned TXB0D21 : 1; + unsigned TXB0D22 : 1; + unsigned TXB0D23 : 1; + unsigned TXB0D24 : 1; + unsigned TXB0D25 : 1; + unsigned TXB0D26 : 1; + unsigned TXB0D27 : 1; + }; +} __TXB0D2bits_t; +extern volatile __TXB0D2bits_t __at (0xF48) TXB0D2bits; + +extern __sfr __at (0xF49) TXB0D3; +typedef union { + struct { + unsigned TXB0D30 : 1; + unsigned TXB0D31 : 1; + unsigned TXB0D32 : 1; + unsigned TXB0D33 : 1; + unsigned TXB0D34 : 1; + unsigned TXB0D35 : 1; + unsigned TXB0D36 : 1; + unsigned TXB0D37 : 1; + }; +} __TXB0D3bits_t; +extern volatile __TXB0D3bits_t __at (0xF49) TXB0D3bits; + +extern __sfr __at (0xF4A) TXB0D4; +typedef union { + struct { + unsigned TXB0D40 : 1; + unsigned TXB0D41 : 1; + unsigned TXB0D42 : 1; + unsigned TXB0D43 : 1; + unsigned TXB0D44 : 1; + unsigned TXB0D45 : 1; + unsigned TXB0D46 : 1; + unsigned TXB0D47 : 1; + }; +} __TXB0D4bits_t; +extern volatile __TXB0D4bits_t __at (0xF4A) TXB0D4bits; + +extern __sfr __at (0xF4B) TXB0D5; +typedef union { + struct { + unsigned TXB0D50 : 1; + unsigned TXB0D51 : 1; + unsigned TXB0D52 : 1; + unsigned TXB0D53 : 1; + unsigned TXB0D54 : 1; + unsigned TXB0D55 : 1; + unsigned TXB0D56 : 1; + unsigned TXB0D57 : 1; + }; +} __TXB0D5bits_t; +extern volatile __TXB0D5bits_t __at (0xF4B) TXB0D5bits; + +extern __sfr __at (0xF4C) TXB0D6; +typedef union { + struct { + unsigned TXB0D60 : 1; + unsigned TXB0D61 : 1; + unsigned TXB0D62 : 1; + unsigned TXB0D63 : 1; + unsigned TXB0D64 : 1; + unsigned TXB0D65 : 1; + unsigned TXB0D66 : 1; + unsigned TXB0D67 : 1; + }; +} __TXB0D6bits_t; +extern volatile __TXB0D6bits_t __at (0xF4C) TXB0D6bits; + +extern __sfr __at (0xF4D) TXB0D7; +typedef union { + struct { + unsigned TXB0D70 : 1; + unsigned TXB0D71 : 1; + unsigned TXB0D72 : 1; + unsigned TXB0D73 : 1; + unsigned TXB0D74 : 1; + unsigned TXB0D75 : 1; + unsigned TXB0D76 : 1; + unsigned TXB0D77 : 1; + }; +} __TXB0D7bits_t; +extern volatile __TXB0D7bits_t __at (0xF4D) TXB0D7bits; + +extern __sfr __at (0xF4E) CANSTAT_RO1; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO1bits_t; +extern volatile __CANSTAT_RO1bits_t __at (0xF4E) CANSTAT_RO1bits; + +extern __sfr __at (0xF4F) CANCON_RO1; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO1bits_t; +extern volatile __CANCON_RO1bits_t __at (0xF4F) CANCON_RO1bits; + +extern __sfr __at (0xF50) RXB1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned RXRTRRO_RXB1CON : 1; + unsigned FILHIT4 : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned FILHIT3 : 1; + unsigned : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1CONbits_t; +extern volatile __RXB1CONbits_t __at (0xF50) RXB1CONbits; + +extern __sfr __at (0xF51) RXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB1SIDHbits_t; +extern volatile __RXB1SIDHbits_t __at (0xF51) RXB1SIDHbits; + +extern __sfr __at (0xF52) RXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB1SIDLbits_t; +extern volatile __RXB1SIDLbits_t __at (0xF52) RXB1SIDLbits; + +extern __sfr __at (0xF53) RXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB1EIDHbits_t; +extern volatile __RXB1EIDHbits_t __at (0xF53) RXB1EIDHbits; + +extern __sfr __at (0xF54) RXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB1EIDLbits_t; +extern volatile __RXB1EIDLbits_t __at (0xF54) RXB1EIDLbits; + +extern __sfr __at (0xF55) RXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB1DLC : 1; + unsigned RB1_RXB1DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1DLCbits_t; +extern volatile __RXB1DLCbits_t __at (0xF55) RXB1DLCbits; + +extern __sfr __at (0xF56) RXB1D0; +typedef union { + struct { + unsigned RXB1D00 : 1; + unsigned RXB1D01 : 1; + unsigned RXB1D02 : 1; + unsigned RXB1D03 : 1; + unsigned RXB1D04 : 1; + unsigned RXB1D05 : 1; + unsigned RXB1D06 : 1; + unsigned RXB1D07 : 1; + }; +} __RXB1D0bits_t; +extern volatile __RXB1D0bits_t __at (0xF56) RXB1D0bits; + +extern __sfr __at (0xF57) RXB1D1; +typedef union { + struct { + unsigned RXB1D10 : 1; + unsigned RXB1D11 : 1; + unsigned RXB1D12 : 1; + unsigned RXB1D13 : 1; + unsigned RXB1D14 : 1; + unsigned RXB1D15 : 1; + unsigned RXB1D16 : 1; + unsigned RXB1D17 : 1; + }; +} __RXB1D1bits_t; +extern volatile __RXB1D1bits_t __at (0xF57) RXB1D1bits; + +extern __sfr __at (0xF58) RXB1D2; +typedef union { + struct { + unsigned RXB1D20 : 1; + unsigned RXB1D21 : 1; + unsigned RXB1D22 : 1; + unsigned RXB1D23 : 1; + unsigned RXB1D24 : 1; + unsigned RXB1D25 : 1; + unsigned RXB1D26 : 1; + unsigned RXB1D27 : 1; + }; +} __RXB1D2bits_t; +extern volatile __RXB1D2bits_t __at (0xF58) RXB1D2bits; + +extern __sfr __at (0xF59) RXB1D3; +typedef union { + struct { + unsigned RXB1D30 : 1; + unsigned RXB1D31 : 1; + unsigned RXB1D32 : 1; + unsigned RXB1D33 : 1; + unsigned RXB1D34 : 1; + unsigned RXB1D35 : 1; + unsigned RXB1D36 : 1; + unsigned RXB1D37 : 1; + }; +} __RXB1D3bits_t; +extern volatile __RXB1D3bits_t __at (0xF59) RXB1D3bits; + +extern __sfr __at (0xF5A) RXB1D4; +typedef union { + struct { + unsigned RXB1D40 : 1; + unsigned RXB1D41 : 1; + unsigned RXB1D42 : 1; + unsigned RXB1D43 : 1; + unsigned RXB1D44 : 1; + unsigned RXB1D45 : 1; + unsigned RXB1D46 : 1; + unsigned RXB1D47 : 1; + }; +} __RXB1D4bits_t; +extern volatile __RXB1D4bits_t __at (0xF5A) RXB1D4bits; + +extern __sfr __at (0xF5B) RXB1D5; +typedef union { + struct { + unsigned RXB1D50 : 1; + unsigned RXB1D51 : 1; + unsigned RXB1D52 : 1; + unsigned RXB1D53 : 1; + unsigned RXB1D54 : 1; + unsigned RXB1D55 : 1; + unsigned RXB1D56 : 1; + unsigned RXB1D57 : 1; + }; +} __RXB1D5bits_t; +extern volatile __RXB1D5bits_t __at (0xF5B) RXB1D5bits; + +extern __sfr __at (0xF5C) RXB1D6; +typedef union { + struct { + unsigned RXB1D60 : 1; + unsigned RXB1D61 : 1; + unsigned RXB1D62 : 1; + unsigned RXB1D63 : 1; + unsigned RXB1D64 : 1; + unsigned RXB1D65 : 1; + unsigned RXB1D66 : 1; + unsigned RXB1D67 : 1; + }; +} __RXB1D6bits_t; +extern volatile __RXB1D6bits_t __at (0xF5C) RXB1D6bits; + +extern __sfr __at (0xF5D) RXB1D7; +typedef union { + struct { + unsigned RXB1D70 : 1; + unsigned RXB1D71 : 1; + unsigned RXB1D72 : 1; + unsigned RXB1D73 : 1; + unsigned RXB1D74 : 1; + unsigned RXB1D75 : 1; + unsigned RXB1D76 : 1; + unsigned RXB1D77 : 1; + }; +} __RXB1D7bits_t; +extern volatile __RXB1D7bits_t __at (0xF5D) RXB1D7bits; + +extern __sfr __at (0xF5E) CANSTAT_RO0; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO0bits_t; +extern volatile __CANSTAT_RO0bits_t __at (0xF5E) CANSTAT_RO0bits; + +extern __sfr __at (0xF5F) CANCON_RO0; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO0bits_t; +extern volatile __CANCON_RO0bits_t __at (0xF5F) CANCON_RO0bits; + +extern __sfr __at (0xF60) RXB0CON; +typedef union { + struct { + unsigned : 1; + unsigned JTOFF : 1; + unsigned RXB0DBEN : 1; + unsigned RXRTRRO_RXB0CON : 1; + unsigned : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0CONbits_t; +extern volatile __RXB0CONbits_t __at (0xF60) RXB0CONbits; + +extern __sfr __at (0xF61) RXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB0SIDHbits_t; +extern volatile __RXB0SIDHbits_t __at (0xF61) RXB0SIDHbits; + +extern __sfr __at (0xF62) RXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB0SIDLbits_t; +extern volatile __RXB0SIDLbits_t __at (0xF62) RXB0SIDLbits; + +extern __sfr __at (0xF63) RXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB0EIDHbits_t; +extern volatile __RXB0EIDHbits_t __at (0xF63) RXB0EIDHbits; + +extern __sfr __at (0xF64) RXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB0EIDLbits_t; +extern volatile __RXB0EIDLbits_t __at (0xF64) RXB0EIDLbits; + +extern __sfr __at (0xF65) RXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB0DLC : 1; + unsigned RB1_RXB0DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0DLCbits_t; +extern volatile __RXB0DLCbits_t __at (0xF65) RXB0DLCbits; + +extern __sfr __at (0xF66) RXB0D0; +typedef union { + struct { + unsigned RXB0D00 : 1; + unsigned RXB0D01 : 1; + unsigned RXB0D02 : 1; + unsigned RXB0D03 : 1; + unsigned RXB0D04 : 1; + unsigned RXB0D05 : 1; + unsigned RXB0D06 : 1; + unsigned RXB0D07 : 1; + }; +} __RXB0D0bits_t; +extern volatile __RXB0D0bits_t __at (0xF66) RXB0D0bits; + +extern __sfr __at (0xF67) RXB0D1; +typedef union { + struct { + unsigned RXB0D10 : 1; + unsigned RXB0D11 : 1; + unsigned RXB0D12 : 1; + unsigned RXB0D13 : 1; + unsigned RXB0D14 : 1; + unsigned RXB0D15 : 1; + unsigned RXB0D16 : 1; + unsigned RXB0D17 : 1; + }; +} __RXB0D1bits_t; +extern volatile __RXB0D1bits_t __at (0xF67) RXB0D1bits; + +extern __sfr __at (0xF68) RXB0D2; +typedef union { + struct { + unsigned RXB0D20 : 1; + unsigned RXB0D21 : 1; + unsigned RXB0D22 : 1; + unsigned RXB0D23 : 1; + unsigned RXB0D24 : 1; + unsigned RXB0D25 : 1; + unsigned RXB0D26 : 1; + unsigned RXB0D27 : 1; + }; +} __RXB0D2bits_t; +extern volatile __RXB0D2bits_t __at (0xF68) RXB0D2bits; + +extern __sfr __at (0xF69) RXB0D3; +typedef union { + struct { + unsigned RXB0D30 : 1; + unsigned RXB0D31 : 1; + unsigned RXB0D32 : 1; + unsigned RXB0D33 : 1; + unsigned RXB0D34 : 1; + unsigned RXB0D35 : 1; + unsigned RXB0D36 : 1; + unsigned RXB0D37 : 1; + }; +} __RXB0D3bits_t; +extern volatile __RXB0D3bits_t __at (0xF69) RXB0D3bits; + +extern __sfr __at (0xF6A) RXB0D4; +typedef union { + struct { + unsigned RXB0D40 : 1; + unsigned RXB0D41 : 1; + unsigned RXB0D42 : 1; + unsigned RXB0D43 : 1; + unsigned RXB0D44 : 1; + unsigned RXB0D45 : 1; + unsigned RXB0D46 : 1; + unsigned RXB0D47 : 1; + }; +} __RXB0D4bits_t; +extern volatile __RXB0D4bits_t __at (0xF6A) RXB0D4bits; + +extern __sfr __at (0xF6B) RXB0D5; +typedef union { + struct { + unsigned RXB0D50 : 1; + unsigned RXB0D51 : 1; + unsigned RXB0D52 : 1; + unsigned RXB0D53 : 1; + unsigned RXB0D54 : 1; + unsigned RXB0D55 : 1; + unsigned RXB0D56 : 1; + unsigned RXB0D57 : 1; + }; +} __RXB0D5bits_t; +extern volatile __RXB0D5bits_t __at (0xF6B) RXB0D5bits; + +extern __sfr __at (0xF6C) RXB0D6; +typedef union { + struct { + unsigned RXB0D60 : 1; + unsigned RXB0D61 : 1; + unsigned RXB0D62 : 1; + unsigned RXB0D63 : 1; + unsigned RXB0D64 : 1; + unsigned RXB0D65 : 1; + unsigned RXB0D66 : 1; + unsigned RXB0D67 : 1; + }; +} __RXB0D6bits_t; +extern volatile __RXB0D6bits_t __at (0xF6C) RXB0D6bits; + +extern __sfr __at (0xF6D) RXB0D7; +typedef union { + struct { + unsigned RXB0D70 : 1; + unsigned RXB0D71 : 1; + unsigned RXB0D72 : 1; + unsigned RXB0D73 : 1; + unsigned RXB0D74 : 1; + unsigned RXB0D75 : 1; + unsigned RXB0D76 : 1; + unsigned RXB0D77 : 1; + }; +} __RXB0D7bits_t; +extern volatile __RXB0D7bits_t __at (0xF6D) RXB0D7bits; + +extern __sfr __at (0xF6E) CANSTAT; +typedef union { + struct { + unsigned EICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned EICODE4 : 1; + unsigned OPMODE0 : 1; + unsigned OPMODE1 : 1; + unsigned OPMODE2 : 1; + }; + struct { + unsigned : 1; + unsigned EICODE1 : 1; + unsigned EICODE2 : 1; + unsigned EICODE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANSTATbits_t; +extern volatile __CANSTATbits_t __at (0xF6E) CANSTATbits; + +extern __sfr __at (0xF6F) CANCON; +typedef union { + struct { + unsigned FP0 : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; + struct { + unsigned : 1; + unsigned FP1 : 1; + unsigned FP2 : 1; + unsigned FP3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANCONbits_t; +extern volatile __CANCONbits_t __at (0xF6F) CANCONbits; + +extern __sfr __at (0xF70) BRGCON1; +typedef union { + struct { + unsigned BRP0 : 1; + unsigned BRP1 : 1; + unsigned BRP2 : 1; + unsigned BRP3 : 1; + unsigned BRP4 : 1; + unsigned BRP5 : 1; + unsigned SJW0 : 1; + unsigned SJW1 : 1; + }; +} __BRGCON1bits_t; +extern volatile __BRGCON1bits_t __at (0xF70) BRGCON1bits; + +extern __sfr __at (0xF71) BRGCON2; +typedef union { + struct { + unsigned PRSEG0 : 1; + unsigned PRSEG1 : 1; + unsigned PRSEG2 : 1; + unsigned SEG1PH0 : 1; + unsigned SEG1PH1 : 1; + unsigned SEG1PH2 : 1; + unsigned SAM : 1; + unsigned SEG2PHTS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SEG2PHT : 1; + }; +} __BRGCON2bits_t; +extern volatile __BRGCON2bits_t __at (0xF71) BRGCON2bits; + +extern __sfr __at (0xF72) BRGCON3; +typedef union { + struct { + unsigned SEG2PH0 : 1; + unsigned SEG2PH1 : 1; + unsigned SEG2PH2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned WAKFIL : 1; + unsigned WAKDIS : 1; + }; +} __BRGCON3bits_t; +extern volatile __BRGCON3bits_t __at (0xF72) BRGCON3bits; + +extern __sfr __at (0xF73) CIOCON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CANCAP : 1; + unsigned ENDRHI : 1; + unsigned : 1; + unsigned : 1; + }; +} __CIOCONbits_t; +extern volatile __CIOCONbits_t __at (0xF73) CIOCONbits; + +extern __sfr __at (0xF74) COMSTAT; +typedef union { + struct { + unsigned EWARN : 1; + unsigned RXWARN : 1; + unsigned TXWARN : 1; + unsigned RXBP : 1; + unsigned TXBP : 1; + unsigned TXBO : 1; + unsigned RXB1OVFL : 1; + unsigned RXB0OVFL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXBnOVFL : 1; + unsigned FIFOEMPTY : 1; + }; +} __COMSTATbits_t; +extern volatile __COMSTATbits_t __at (0xF74) COMSTATbits; + +extern __sfr __at (0xF75) RXERRCNT; +typedef union { + struct { + unsigned REC0 : 1; + unsigned REC1 : 1; + unsigned REC2 : 1; + unsigned REC3 : 1; + unsigned REC4 : 1; + unsigned REC5 : 1; + unsigned REC6 : 1; + unsigned REC7 : 1; + }; +} __RXERRCNTbits_t; +extern volatile __RXERRCNTbits_t __at (0xF75) RXERRCNTbits; + +extern __sfr __at (0xF76) TXERRCNT; +typedef union { + struct { + unsigned TEC0 : 1; + unsigned TEC1 : 1; + unsigned TEC2 : 1; + unsigned TEC3 : 1; + unsigned TEC4 : 1; + unsigned TEC5 : 1; + unsigned TEC6 : 1; + unsigned TEC7 : 1; + }; +} __TXERRCNTbits_t; +extern volatile __TXERRCNTbits_t __at (0xF76) TXERRCNTbits; + +extern __sfr __at (0xF77) ECANCON; +typedef union { + struct { + unsigned EWIN0 : 1; + unsigned EWIN1 : 1; + unsigned EWIN2 : 1; + unsigned EWIN3 : 1; + unsigned EWIN4 : 1; + unsigned FIFOWM : 1; + unsigned MDSEL0 : 1; + unsigned MDSEL1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned F : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECANCONbits_t; +extern volatile __ECANCONbits_t __at (0xF77) ECANCONbits; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned OSC1 : 1; + }; + struct { + unsigned CVREF_PORTA : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned LVDIN : 1; + unsigned CLKO : 1; + unsigned CLKI : 1; + }; + struct { + unsigned CVREF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0_PORTB : 1; + unsigned RB1_PORTB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CANRX : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned CANTX : 1; + unsigned : 1; + unsigned AN9 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned PSP0 : 1; + unsigned PSP1 : 1; + unsigned PSP2 : 1; + unsigned PSP3 : 1; + unsigned PSP4 : 1; + unsigned PSP5 : 1; + unsigned PSP6 : 1; + unsigned PSP7 : 1; + }; + struct { + unsigned C1INB : 1; + unsigned C1INA : 1; + unsigned C2INB : 1; + unsigned C2INA : 1; + unsigned P1A : 1; + unsigned P1B : 1; + unsigned P1C : 1; + unsigned P1D : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ECCP1 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0_DDRB : 1; + unsigned RB1_DDRB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSCR : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PSPIE : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PSPIF : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXBIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PSPIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned ECCP1IE : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned ECCP1IF : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned ECCP1IP : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned ERRIE : 1; + unsigned WAKIE : 1; + unsigned IRXIE : 1; + }; + struct { + unsigned FIFOWMIE : 1; + unsigned RXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FIFOMWIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned RXB0IF : 1; + unsigned RXB1IF : 1; + unsigned TXB0IF : 1; + unsigned TXB1IF : 1; + unsigned TXB2IF : 1; + unsigned ERRIF : 1; + unsigned WAKIF : 1; + unsigned IRXIF : 1; + }; + struct { + unsigned FIFOWMIF : 1; + unsigned RXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned RXB0IP : 1; + unsigned RXB1IP : 1; + unsigned TXB0IP : 1; + unsigned TXB1IP : 1; + unsigned TXB2IP : 1; + unsigned ERRIP : 1; + unsigned WAKIP : 1; + unsigned IRXIP : 1; + }; + struct { + unsigned FIFOWMIP : 1; + unsigned RXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAA) EEADRH; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T3NSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T3ECCP1 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT : 1; + unsigned C2OUT : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVREF_CVRCON : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CVRSS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) ECCP1DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFBA) ECCP1CON; +typedef union { + struct { + unsigned ECCP1M0 : 1; + unsigned ECCP1M1 : 1; + unsigned ECCP1M2 : 1; + unsigned ECCP1M3 : 1; + unsigned EDC1B0 : 1; + unsigned EDC1B1 : 1; + unsigned EPWM1M0 : 1; + unsigned EPWM1M1 : 1; + }; +} __ECCP1CONbits_t; +extern volatile __ECCP1CONbits_t __at (0xFBA) ECCP1CONbits; + +extern __sfr __at (0xFBB) ECCPR1; + +extern __sfr __at (0xFBB) ECCPR1L; + +extern __sfr __at (0xFBC) ECCPR1H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO_DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T0PS3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f4682.h b/device/include/pic16/pic18f4682.h new file mode 100644 index 0000000..c50ac0c --- /dev/null +++ b/device/include/pic16/pic18f4682.h @@ -0,0 +1,6356 @@ +/* + * pic18f4682.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F4682_H__ +#define __PIC18F4682_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP oscillator +#define _OSC_XT_1H 0xF1 // XT oscillator +#define _OSC_HS_1H 0xF2 // HS oscillator +#define _OSC_RC_1H 0xF3 // External RC oscillator, CLKO function on RA6 +#define _OSC_EC_1H 0xF4 // EC oscillator, CLKO function on RA6 +#define _OSC_ECIO_1H 0xF5 // EC oscillator, port function on RA6 +#define _OSC_HSPLL_1H 0xF6 // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) +#define _OSC_RCIO_1H 0xF7 // External RC oscillator, port function on RA6 +#define _OSC_IRCIO67_1H 0xF8 // Internal oscillator block, port function on RA6 and RA7 +#define _OSC_IRCIO7_1H 0xF9 // Internal oscillator block, CLKO function on RA6, port function on RA7 +#define _FCMEN_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled +#define _FCMEN_ON_1H 0xFF // Fail-Safe Clock Monitor enabled +#define _IESO_OFF_1H 0x7F // Oscillator Switchover mode disabled +#define _IESO_ON_1H 0xFF // Oscillator Switchover mode enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // PWRT enabled +#define _PWRT_OFF_2L 0xFF // PWRT disabled +#define _BOREN_OFF_2L 0xF9 // Brown-out Reset disabled in hardware and software +#define _BOREN_SBORENCTRL_2L 0xFB // Brown-out Reset enabled and controlled by software (SBOREN is enabled) +#define _BOREN_BOACTIVE_2L 0xFD // Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) +#define _BOREN_BOHW_2L 0xFF // Brown-out Reset enabled in hardware only (SBOREN is disabled) +#define _BORV_0_2L 0xE7 // Maximum setting +#define _BORV_1_2L 0xEF // +#define _BORV_2_2L 0xF7 // +#define _BORV_3_2L 0xFF // Minimum setting + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit) +#define _WDT_ON_2H 0xFF // WDT enabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // RE3 input pin enabled; MCLR disabled +#define _MCLRE_ON_3H 0xFF // MCLR pin enabled; RE3 input pin disabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 configured for higher power operation +#define _LPT1OSC_ON_3H 0xFF // Timer1 configured for low-power operation +#define _PBADEN_OFF_3H 0xFD // PORTB<4> and PORTB<1:0> Configured as Digital I/O Pins on Reset +#define _PBADEN_ON_3H 0xFF // PORTB<4> and PORTB<1:0> Configured as Analog Pins on Reset + +// CONFIG4L Options +#define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug +#define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins +#define _XINST_OFF_4L 0xBF // Instruction set extension and Indexed Addressing mode disabled (Legacy mode) +#define _XINST_ON_4L 0xFF // Instruction set extension and Indexed Addressing mode enabled +#define _BBSIZ_1024_4L 0xCF // 1K words (2K bytes) Boot Block +#define _BBSIZ_2048_4L 0xDF // 2K words (4K bytes) Boot Block +#define _BBSIZ_4096_4L 0xEF // 4K words (8K bytes) Boot Block +#define _LVP_OFF_4L 0xFB // Disabled +#define _LVP_ON_4L 0xFF // Enabled +#define _STVREN_OFF_4L 0xFE // Stack full/underflow will not cause Reset +#define _STVREN_ON_4L 0xFF // Stack full/underflow will cause Reset + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Block 0 (000800-003FFFh) code-protected +#define _CP0_OFF_5L 0xFF // Block 0 (000800-003FFFh) not code-protected +#define _CP1_ON_5L 0xFD // Block 1 (004000-007FFFh) code-protected +#define _CP1_OFF_5L 0xFF // Block 1 (004000-007FFFh) not code-protected +#define _CP2_ON_5L 0xFB // Block 2 (008000-00BFFFh) code-protected +#define _CP2_OFF_5L 0xFF // Block 2 (008000-00BFFFh) not code-protected +#define _CP3_ON_5L 0xF7 // Block 3 (00C000-00FFFFh) code-protected +#define _CP3_OFF_5L 0xFF // Block 3 (00C000-00FFFFh) not code-protected +#define _CP4_ON_5L 0xEF // Block 4 (010000-013FFFh) code-protected +#define _CP4_OFF_5L 0xFF // Block 4 (010000-013FFFh) not code-protected + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Boot Block (000000-0007FFh) code-protected +#define _CPB_OFF_5H 0xFF // Boot Block (000000-0007FFh) not code-protected +#define _CPD_ON_5H 0x7F // Data EEPROM code-protected +#define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Block 0 (000800-003FFFh) write-protected +#define _WRT0_OFF_6L 0xFF // Block 0 (000800-003FFFh) not write-protected +#define _WRT1_ON_6L 0xFD // Block 1 (004000-007FFFh) write-protected +#define _WRT1_OFF_6L 0xFF // Block 1 (004000-007FFFh) not write-protected +#define _WRT2_ON_6L 0xFB // Block 2 (008000-00BFFFh) write-protected +#define _WRT2_OFF_6L 0xFF // Block 2 (008000-00BFFFh) not write-protected +#define _WRT3_ON_6L 0xF7 // Block 3 (00C000-00FFFFh) write-protected +#define _WRT3_OFF_6L 0xFF // Block 3 (00C000-00FFFFh) not write-protected +#define _WRT4_ON_6L 0xEF // Block 4 (010000-013FFFh) write-protected +#define _WRT4_OFF_6L 0xFF // Block 4 (010000-013FFFh) not write-protected + +// CONFIG6H Options +#define _WRTB_ON_6H 0xBF // Boot Block (000000-0007FFh) write-protected +#define _WRTB_OFF_6H 0xFF // Boot Block (000000-0007FFh) not write-protected +#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected +#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected +#define _WRTD_ON_6H 0x7F // Data EEPROM write-protected +#define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Block 0 (000800-003FFFh) protected from table reads executed in other blocks +#define _EBTR0_OFF_7L 0xFF // Block 0 (000800-003FFFh) not protected from table reads executed in other blocks +#define _EBTR1_ON_7L 0xFD // Block 1 (004000-007FFFh) protected from table reads executed in other blocks +#define _EBTR1_OFF_7L 0xFF // Block 1 (004000-007FFFh) not protected from table reads executed in other blocks +#define _EBTR2_ON_7L 0xFB // Block 2 (008000-00BFFFh) protected from table reads executed in other blocks +#define _EBTR2_OFF_7L 0xFF // Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks +#define _EBTR3_ON_7L 0xF7 // Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks +#define _EBTR3_OFF_7L 0xFF // Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks +#define _EBTR4_ON_7L 0xEF // Block 4 (010000-013FFFh) protected from table reads executed in other blocks +#define _EBTR4_OFF_7L 0xFF // Block 4 (010000-013FFFh) not protected from table reads executed in other blocks + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Boot Block (000000-0007FFh) protected from table reads executed in other blocks +#define _EBTRB_OFF_7H 0xFF // Boot Block (000000-0007FFh) not protected from table reads executed in other blocks +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xD60) RXF6SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF6SIDHbits_t; +extern volatile __RXF6SIDHbits_t __at (0xD60) RXF6SIDHbits; + +extern __sfr __at (0xD61) RXF6SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF6SIDLbits_t; +extern volatile __RXF6SIDLbits_t __at (0xD61) RXF6SIDLbits; + +extern __sfr __at (0xD62) RXF6EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF6EIDHbits_t; +extern volatile __RXF6EIDHbits_t __at (0xD62) RXF6EIDHbits; + +extern __sfr __at (0xD63) RXF6EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF6EIDLbits_t; +extern volatile __RXF6EIDLbits_t __at (0xD63) RXF6EIDLbits; + +extern __sfr __at (0xD64) RXF7SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF7SIDHbits_t; +extern volatile __RXF7SIDHbits_t __at (0xD64) RXF7SIDHbits; + +extern __sfr __at (0xD65) RXF7SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF7SIDLbits_t; +extern volatile __RXF7SIDLbits_t __at (0xD65) RXF7SIDLbits; + +extern __sfr __at (0xD66) RXF7EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF7EIDHbits_t; +extern volatile __RXF7EIDHbits_t __at (0xD66) RXF7EIDHbits; + +extern __sfr __at (0xD67) RXF7EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF7EIDLbits_t; +extern volatile __RXF7EIDLbits_t __at (0xD67) RXF7EIDLbits; + +extern __sfr __at (0xD68) RXF8SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF8SIDHbits_t; +extern volatile __RXF8SIDHbits_t __at (0xD68) RXF8SIDHbits; + +extern __sfr __at (0xD69) RXF8SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF8SIDLbits_t; +extern volatile __RXF8SIDLbits_t __at (0xD69) RXF8SIDLbits; + +extern __sfr __at (0xD6A) RXF8EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF8EIDHbits_t; +extern volatile __RXF8EIDHbits_t __at (0xD6A) RXF8EIDHbits; + +extern __sfr __at (0xD6B) RXF8EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF8EIDLbits_t; +extern volatile __RXF8EIDLbits_t __at (0xD6B) RXF8EIDLbits; + +extern __sfr __at (0xD70) RXF9SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF9SIDHbits_t; +extern volatile __RXF9SIDHbits_t __at (0xD70) RXF9SIDHbits; + +extern __sfr __at (0xD71) RXF9SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF9SIDLbits_t; +extern volatile __RXF9SIDLbits_t __at (0xD71) RXF9SIDLbits; + +extern __sfr __at (0xD72) RXF9EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF9EIDHbits_t; +extern volatile __RXF9EIDHbits_t __at (0xD72) RXF9EIDHbits; + +extern __sfr __at (0xD73) RXF9EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF9EIDLbits_t; +extern volatile __RXF9EIDLbits_t __at (0xD73) RXF9EIDLbits; + +extern __sfr __at (0xD74) RXF10SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF10SIDHbits_t; +extern volatile __RXF10SIDHbits_t __at (0xD74) RXF10SIDHbits; + +extern __sfr __at (0xD75) RXF10SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF10SIDLbits_t; +extern volatile __RXF10SIDLbits_t __at (0xD75) RXF10SIDLbits; + +extern __sfr __at (0xD76) RXF10EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF10EIDHbits_t; +extern volatile __RXF10EIDHbits_t __at (0xD76) RXF10EIDHbits; + +extern __sfr __at (0xD77) RXF10EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF10EIDLbits_t; +extern volatile __RXF10EIDLbits_t __at (0xD77) RXF10EIDLbits; + +extern __sfr __at (0xD78) RXF11SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF11SIDHbits_t; +extern volatile __RXF11SIDHbits_t __at (0xD78) RXF11SIDHbits; + +extern __sfr __at (0xD79) RXF11SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF11SIDLbits_t; +extern volatile __RXF11SIDLbits_t __at (0xD79) RXF11SIDLbits; + +extern __sfr __at (0xD7A) RXF11EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF11EIDHbits_t; +extern volatile __RXF11EIDHbits_t __at (0xD7A) RXF11EIDHbits; + +extern __sfr __at (0xD7B) RXF11EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF11EIDLbits_t; +extern volatile __RXF11EIDLbits_t __at (0xD7B) RXF11EIDLbits; + +extern __sfr __at (0xD80) RXF12SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF12SIDHbits_t; +extern volatile __RXF12SIDHbits_t __at (0xD80) RXF12SIDHbits; + +extern __sfr __at (0xD81) RXF12SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF12SIDLbits_t; +extern volatile __RXF12SIDLbits_t __at (0xD81) RXF12SIDLbits; + +extern __sfr __at (0xD82) RXF12EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF12EIDHbits_t; +extern volatile __RXF12EIDHbits_t __at (0xD82) RXF12EIDHbits; + +extern __sfr __at (0xD83) RXF12EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF12EIDLbits_t; +extern volatile __RXF12EIDLbits_t __at (0xD83) RXF12EIDLbits; + +extern __sfr __at (0xD84) RXF13SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF13SIDHbits_t; +extern volatile __RXF13SIDHbits_t __at (0xD84) RXF13SIDHbits; + +extern __sfr __at (0xD85) RXF13SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF13SIDLbits_t; +extern volatile __RXF13SIDLbits_t __at (0xD85) RXF13SIDLbits; + +extern __sfr __at (0xD86) RXF13EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF13EIDHbits_t; +extern volatile __RXF13EIDHbits_t __at (0xD86) RXF13EIDHbits; + +extern __sfr __at (0xD87) RXF13EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF13EIDLbits_t; +extern volatile __RXF13EIDLbits_t __at (0xD87) RXF13EIDLbits; + +extern __sfr __at (0xD88) RXF14SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF14SIDHbits_t; +extern volatile __RXF14SIDHbits_t __at (0xD88) RXF14SIDHbits; + +extern __sfr __at (0xD89) RXF14SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF14SIDLbits_t; +extern volatile __RXF14SIDLbits_t __at (0xD89) RXF14SIDLbits; + +extern __sfr __at (0xD8A) RXF14EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF14EIDHbits_t; +extern volatile __RXF14EIDHbits_t __at (0xD8A) RXF14EIDHbits; + +extern __sfr __at (0xD8B) RXF14EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF14EIDLbits_t; +extern volatile __RXF14EIDLbits_t __at (0xD8B) RXF14EIDLbits; + +extern __sfr __at (0xD90) RXF15SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF15SIDHbits_t; +extern volatile __RXF15SIDHbits_t __at (0xD90) RXF15SIDHbits; + +extern __sfr __at (0xD91) RXF15SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF15SIDLbits_t; +extern volatile __RXF15SIDLbits_t __at (0xD91) RXF15SIDLbits; + +extern __sfr __at (0xD92) RXF15EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF15EIDHbits_t; +extern volatile __RXF15EIDHbits_t __at (0xD92) RXF15EIDHbits; + +extern __sfr __at (0xD93) RXF15EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF15EIDLbits_t; +extern volatile __RXF15EIDLbits_t __at (0xD93) RXF15EIDLbits; + +extern __sfr __at (0xDD4) RXFCON0; +typedef union { + struct { + unsigned RXF0EN : 1; + unsigned RXF1EN : 1; + unsigned RXF2EN : 1; + unsigned RXF3EN : 1; + unsigned RXF4EN : 1; + unsigned RXF5EN : 1; + unsigned RXF6EN : 1; + unsigned RXF7EN : 1; + }; +} __RXFCON0bits_t; +extern volatile __RXFCON0bits_t __at (0xDD4) RXFCON0bits; + +extern __sfr __at (0xDD5) RXFCON1; +typedef union { + struct { + unsigned RXF8EN : 1; + unsigned RXF9EN : 1; + unsigned RXF10EN : 1; + unsigned RXF11EN : 1; + unsigned RXF12EN : 1; + unsigned RXF13EN : 1; + unsigned RXF14EN : 1; + unsigned RXF15EN : 1; + }; +} __RXFCON1bits_t; +extern volatile __RXFCON1bits_t __at (0xDD5) RXFCON1bits; + +extern __sfr __at (0xDD8) SDFLC; +typedef union { + struct { + unsigned DFLC0 : 1; + unsigned DFLC1 : 1; + unsigned DFLC2 : 1; + unsigned DFLC3 : 1; + unsigned DFLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FLC0 : 1; + unsigned FLC1 : 1; + unsigned FLC2 : 1; + unsigned FLC3 : 1; + unsigned FLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SDFLCbits_t; +extern volatile __SDFLCbits_t __at (0xDD8) SDFLCbits; + +extern __sfr __at (0xDE0) RXFBCON0; +typedef union { + struct { + unsigned F0BP_0 : 1; + unsigned F0BP_1 : 1; + unsigned F0BP_2 : 1; + unsigned F0BP_3 : 1; + unsigned F1BP_0 : 1; + unsigned F1BP_1 : 1; + unsigned F1BP_2 : 1; + unsigned F1BP_3 : 1; + }; +} __RXFBCON0bits_t; +extern volatile __RXFBCON0bits_t __at (0xDE0) RXFBCON0bits; + +extern __sfr __at (0xDE1) RXFBCON1; +typedef union { + struct { + unsigned F2BP_0 : 1; + unsigned F2BP_1 : 1; + unsigned F2BP_2 : 1; + unsigned F2BP_3 : 1; + unsigned F3BP_0 : 1; + unsigned F3BP_1 : 1; + unsigned F3BP_2 : 1; + unsigned F3BP_3 : 1; + }; +} __RXFBCON1bits_t; +extern volatile __RXFBCON1bits_t __at (0xDE1) RXFBCON1bits; + +extern __sfr __at (0xDE2) RXFBCON2; +typedef union { + struct { + unsigned F4BP_0 : 1; + unsigned F4BP_1 : 1; + unsigned F4BP_2 : 1; + unsigned F4BP_3 : 1; + unsigned F5BP_0 : 1; + unsigned F5BP_1 : 1; + unsigned F5BP_2 : 1; + unsigned F5BP_3 : 1; + }; +} __RXFBCON2bits_t; +extern volatile __RXFBCON2bits_t __at (0xDE2) RXFBCON2bits; + +extern __sfr __at (0xDE3) RXFBCON3; +typedef union { + struct { + unsigned F6BP_0 : 1; + unsigned F6BP_1 : 1; + unsigned F6BP_2 : 1; + unsigned F6BP_3 : 1; + unsigned F7BP_0 : 1; + unsigned F7BP_1 : 1; + unsigned F7BP_2 : 1; + unsigned F7BP_3 : 1; + }; +} __RXFBCON3bits_t; +extern volatile __RXFBCON3bits_t __at (0xDE3) RXFBCON3bits; + +extern __sfr __at (0xDE4) RXFBCON4; +typedef union { + struct { + unsigned F8BP_0 : 1; + unsigned F8BP_1 : 1; + unsigned F8BP_2 : 1; + unsigned F8BP_3 : 1; + unsigned F9BP_0 : 1; + unsigned F9BP_1 : 1; + unsigned F9BP_2 : 1; + unsigned F9BP_3 : 1; + }; +} __RXFBCON4bits_t; +extern volatile __RXFBCON4bits_t __at (0xDE4) RXFBCON4bits; + +extern __sfr __at (0xDE5) RXFBCON5; +typedef union { + struct { + unsigned F10BP_0 : 1; + unsigned F10BP_1 : 1; + unsigned F10BP_2 : 1; + unsigned F10BP_3 : 1; + unsigned F11BP_0 : 1; + unsigned F11BP_1 : 1; + unsigned F11BP_2 : 1; + unsigned F11BP_3 : 1; + }; +} __RXFBCON5bits_t; +extern volatile __RXFBCON5bits_t __at (0xDE5) RXFBCON5bits; + +extern __sfr __at (0xDE6) RXFBCON6; +typedef union { + struct { + unsigned F12BP_0 : 1; + unsigned F12BP_1 : 1; + unsigned F12BP_2 : 1; + unsigned F12BP_3 : 1; + unsigned F13BP_0 : 1; + unsigned F13BP_1 : 1; + unsigned F13BP_2 : 1; + unsigned F13BP_3 : 1; + }; +} __RXFBCON6bits_t; +extern volatile __RXFBCON6bits_t __at (0xDE6) RXFBCON6bits; + +extern __sfr __at (0xDE7) RXFBCON7; +typedef union { + struct { + unsigned F14BP_0 : 1; + unsigned F14BP_1 : 1; + unsigned F14BP_2 : 1; + unsigned F14BP_3 : 1; + unsigned F15BP_0 : 1; + unsigned F15BP_1 : 1; + unsigned F15BP_2 : 1; + unsigned F15BP_3 : 1; + }; +} __RXFBCON7bits_t; +extern volatile __RXFBCON7bits_t __at (0xDE7) RXFBCON7bits; + +extern __sfr __at (0xDF0) MSEL0; +typedef union { + struct { + unsigned FIL0_0 : 1; + unsigned FIL0_1 : 1; + unsigned FIL1_0 : 1; + unsigned FIL1_1 : 1; + unsigned FIL2_0 : 1; + unsigned FIL2_1 : 1; + unsigned FIL3_0 : 1; + unsigned FIL3_1 : 1; + }; +} __MSEL0bits_t; +extern volatile __MSEL0bits_t __at (0xDF0) MSEL0bits; + +extern __sfr __at (0xDF1) MSEL1; +typedef union { + struct { + unsigned FIL4_0 : 1; + unsigned FIL4_1 : 1; + unsigned FIL5_0 : 1; + unsigned FIL5_1 : 1; + unsigned FIL6_0 : 1; + unsigned FIL6_1 : 1; + unsigned FIL7_0 : 1; + unsigned FIL7_1 : 1; + }; +} __MSEL1bits_t; +extern volatile __MSEL1bits_t __at (0xDF1) MSEL1bits; + +extern __sfr __at (0xDF2) MSEL2; +typedef union { + struct { + unsigned FIL8_0 : 1; + unsigned FIL8_1 : 1; + unsigned FIL9_0 : 1; + unsigned FIL9_1 : 1; + unsigned FIL10_0 : 1; + unsigned FIL10_1 : 1; + unsigned FIL11_0 : 1; + unsigned FIL11_1 : 1; + }; +} __MSEL2bits_t; +extern volatile __MSEL2bits_t __at (0xDF2) MSEL2bits; + +extern __sfr __at (0xDF3) MSEL3; +typedef union { + struct { + unsigned FIL12_0 : 1; + unsigned FIL12_1 : 1; + unsigned FIL13_0 : 1; + unsigned FIL13_1 : 1; + unsigned FIL14_0 : 1; + unsigned FIL14_1 : 1; + unsigned FIL15_0 : 1; + unsigned FIL15_1 : 1; + }; +} __MSEL3bits_t; +extern volatile __MSEL3bits_t __at (0xDF3) MSEL3bits; + +extern __sfr __at (0xDF8) BSEL0; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned B0TXEN : 1; + unsigned B1TXEN : 1; + unsigned B2TXEN : 1; + unsigned B3TXEN : 1; + unsigned B4TXEN : 1; + unsigned B5TXEN : 1; + }; +} __BSEL0bits_t; +extern volatile __BSEL0bits_t __at (0xDF8) BSEL0bits; + +extern __sfr __at (0xDFA) BIE0; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned B0IE : 1; + unsigned B1IE : 1; + unsigned B2IE : 1; + unsigned B3IE : 1; + unsigned B4IE : 1; + unsigned B5IE : 1; + }; +} __BIE0bits_t; +extern volatile __BIE0bits_t __at (0xDFA) BIE0bits; + +extern __sfr __at (0xDFC) TXBIE; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TXBIEbits_t; +extern volatile __TXBIEbits_t __at (0xDFC) TXBIEbits; + +extern __sfr __at (0xE20) B0CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B0CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0CONbits_t; +extern volatile __B0CONbits_t __at (0xE20) B0CONbits; + +extern __sfr __at (0xE21) B0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B0SIDHbits_t; +extern volatile __B0SIDHbits_t __at (0xE21) B0SIDHbits; + +extern __sfr __at (0xE22) B0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0SIDLbits_t; +extern volatile __B0SIDLbits_t __at (0xE22) B0SIDLbits; + +extern __sfr __at (0xE23) B0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B0EIDHbits_t; +extern volatile __B0EIDHbits_t __at (0xE23) B0EIDHbits; + +extern __sfr __at (0xE24) B0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B0EIDLbits_t; +extern volatile __B0EIDLbits_t __at (0xE24) B0EIDLbits; + +extern __sfr __at (0xE25) B0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B0DLC : 1; + unsigned RB1_B0DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B0DLCbits_t; +extern volatile __B0DLCbits_t __at (0xE25) B0DLCbits; + +extern __sfr __at (0xE26) B0D0; +typedef union { + struct { + unsigned B0D00 : 1; + unsigned B0D01 : 1; + unsigned B0D02 : 1; + unsigned B0D03 : 1; + unsigned B0D04 : 1; + unsigned B0D05 : 1; + unsigned B0D06 : 1; + unsigned B0D07 : 1; + }; +} __B0D0bits_t; +extern volatile __B0D0bits_t __at (0xE26) B0D0bits; + +extern __sfr __at (0xE27) B0D1; +typedef union { + struct { + unsigned B0D10 : 1; + unsigned B0D11 : 1; + unsigned B0D12 : 1; + unsigned B0D13 : 1; + unsigned B0D14 : 1; + unsigned B0D15 : 1; + unsigned B0D16 : 1; + unsigned B0D17 : 1; + }; +} __B0D1bits_t; +extern volatile __B0D1bits_t __at (0xE27) B0D1bits; + +extern __sfr __at (0xE28) B0D2; +typedef union { + struct { + unsigned B0D20 : 1; + unsigned B0D21 : 1; + unsigned B0D22 : 1; + unsigned B0D23 : 1; + unsigned B0D24 : 1; + unsigned B0D25 : 1; + unsigned B0D26 : 1; + unsigned B0D27 : 1; + }; +} __B0D2bits_t; +extern volatile __B0D2bits_t __at (0xE28) B0D2bits; + +extern __sfr __at (0xE29) B0D3; +typedef union { + struct { + unsigned B0D30 : 1; + unsigned B0D31 : 1; + unsigned B0D32 : 1; + unsigned B0D33 : 1; + unsigned B0D34 : 1; + unsigned B0D35 : 1; + unsigned B0D36 : 1; + unsigned B0D37 : 1; + }; +} __B0D3bits_t; +extern volatile __B0D3bits_t __at (0xE29) B0D3bits; + +extern __sfr __at (0xE2A) B0D4; +typedef union { + struct { + unsigned B0D40 : 1; + unsigned B0D41 : 1; + unsigned B0D42 : 1; + unsigned B0D43 : 1; + unsigned B0D44 : 1; + unsigned B0D45 : 1; + unsigned B0D46 : 1; + unsigned B0D47 : 1; + }; +} __B0D4bits_t; +extern volatile __B0D4bits_t __at (0xE2A) B0D4bits; + +extern __sfr __at (0xE2B) B0D5; +typedef union { + struct { + unsigned B0D50 : 1; + unsigned B0D51 : 1; + unsigned B0D52 : 1; + unsigned B0D53 : 1; + unsigned B0D54 : 1; + unsigned B0D55 : 1; + unsigned B0D56 : 1; + unsigned B0D57 : 1; + }; +} __B0D5bits_t; +extern volatile __B0D5bits_t __at (0xE2B) B0D5bits; + +extern __sfr __at (0xE2C) B0D6; +typedef union { + struct { + unsigned B0D60 : 1; + unsigned B0D61 : 1; + unsigned B0D62 : 1; + unsigned B0D63 : 1; + unsigned B0D64 : 1; + unsigned B0D65 : 1; + unsigned B0D66 : 1; + unsigned B0D67 : 1; + }; +} __B0D6bits_t; +extern volatile __B0D6bits_t __at (0xE2C) B0D6bits; + +extern __sfr __at (0xE2D) B0D7; +typedef union { + struct { + unsigned B0D70 : 1; + unsigned B0D71 : 1; + unsigned B0D72 : 1; + unsigned B0D73 : 1; + unsigned B0D74 : 1; + unsigned B0D75 : 1; + unsigned B0D76 : 1; + unsigned B0D77 : 1; + }; +} __B0D7bits_t; +extern volatile __B0D7bits_t __at (0xE2D) B0D7bits; + +extern __sfr __at (0xE2E) CANSTAT_RO9; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO9bits_t; +extern volatile __CANSTAT_RO9bits_t __at (0xE2E) CANSTAT_RO9bits; + +extern __sfr __at (0xE2F) CANCON_RO9; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO9bits_t; +extern volatile __CANCON_RO9bits_t __at (0xE2F) CANCON_RO9bits; + +extern __sfr __at (0xE30) B1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B1CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1CONbits_t; +extern volatile __B1CONbits_t __at (0xE30) B1CONbits; + +extern __sfr __at (0xE31) B1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B1SIDHbits_t; +extern volatile __B1SIDHbits_t __at (0xE31) B1SIDHbits; + +extern __sfr __at (0xE32) B1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1SIDLbits_t; +extern volatile __B1SIDLbits_t __at (0xE32) B1SIDLbits; + +extern __sfr __at (0xE33) B1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B1EIDHbits_t; +extern volatile __B1EIDHbits_t __at (0xE33) B1EIDHbits; + +extern __sfr __at (0xE34) B1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B1EIDLbits_t; +extern volatile __B1EIDLbits_t __at (0xE34) B1EIDLbits; + +extern __sfr __at (0xE35) B1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B1DLC : 1; + unsigned RB1_B1DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B1DLCbits_t; +extern volatile __B1DLCbits_t __at (0xE35) B1DLCbits; + +extern __sfr __at (0xE36) B1D0; +typedef union { + struct { + unsigned B1D00 : 1; + unsigned B1D01 : 1; + unsigned B1D02 : 1; + unsigned B1D03 : 1; + unsigned B1D04 : 1; + unsigned B1D05 : 1; + unsigned B1D06 : 1; + unsigned B1D07 : 1; + }; +} __B1D0bits_t; +extern volatile __B1D0bits_t __at (0xE36) B1D0bits; + +extern __sfr __at (0xE37) B1D1; +typedef union { + struct { + unsigned B1D10 : 1; + unsigned B1D11 : 1; + unsigned B1D12 : 1; + unsigned B1D13 : 1; + unsigned B1D14 : 1; + unsigned B1D15 : 1; + unsigned B1D16 : 1; + unsigned B1D17 : 1; + }; +} __B1D1bits_t; +extern volatile __B1D1bits_t __at (0xE37) B1D1bits; + +extern __sfr __at (0xE38) B1D2; +typedef union { + struct { + unsigned B1D20 : 1; + unsigned B1D21 : 1; + unsigned B1D22 : 1; + unsigned B1D23 : 1; + unsigned B1D24 : 1; + unsigned B1D25 : 1; + unsigned B1D26 : 1; + unsigned B1D27 : 1; + }; +} __B1D2bits_t; +extern volatile __B1D2bits_t __at (0xE38) B1D2bits; + +extern __sfr __at (0xE39) B1D3; +typedef union { + struct { + unsigned B1D30 : 1; + unsigned B1D31 : 1; + unsigned B1D32 : 1; + unsigned B1D33 : 1; + unsigned B1D34 : 1; + unsigned B1D35 : 1; + unsigned B1D36 : 1; + unsigned B1D37 : 1; + }; +} __B1D3bits_t; +extern volatile __B1D3bits_t __at (0xE39) B1D3bits; + +extern __sfr __at (0xE3A) B1D4; +typedef union { + struct { + unsigned B1D40 : 1; + unsigned B1D41 : 1; + unsigned B1D42 : 1; + unsigned B1D43 : 1; + unsigned B1D44 : 1; + unsigned B1D45 : 1; + unsigned B1D46 : 1; + unsigned B1D47 : 1; + }; +} __B1D4bits_t; +extern volatile __B1D4bits_t __at (0xE3A) B1D4bits; + +extern __sfr __at (0xE3B) B1D5; +typedef union { + struct { + unsigned B1D50 : 1; + unsigned B1D51 : 1; + unsigned B1D52 : 1; + unsigned B1D53 : 1; + unsigned B1D54 : 1; + unsigned B1D55 : 1; + unsigned B1D56 : 1; + unsigned B1D57 : 1; + }; +} __B1D5bits_t; +extern volatile __B1D5bits_t __at (0xE3B) B1D5bits; + +extern __sfr __at (0xE3C) B1D6; +typedef union { + struct { + unsigned B1D60 : 1; + unsigned B1D61 : 1; + unsigned B1D62 : 1; + unsigned B1D63 : 1; + unsigned B1D64 : 1; + unsigned B1D65 : 1; + unsigned B1D66 : 1; + unsigned B1D67 : 1; + }; +} __B1D6bits_t; +extern volatile __B1D6bits_t __at (0xE3C) B1D6bits; + +extern __sfr __at (0xE3D) B1D7; +typedef union { + struct { + unsigned B1D70 : 1; + unsigned B1D71 : 1; + unsigned B1D72 : 1; + unsigned B1D73 : 1; + unsigned B1D74 : 1; + unsigned B1D75 : 1; + unsigned B1D76 : 1; + unsigned B1D77 : 1; + }; +} __B1D7bits_t; +extern volatile __B1D7bits_t __at (0xE3D) B1D7bits; + +extern __sfr __at (0xE3E) CANSTAT_RO8; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO8bits_t; +extern volatile __CANSTAT_RO8bits_t __at (0xE3E) CANSTAT_RO8bits; + +extern __sfr __at (0xE3F) CANCON_RO8; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO8bits_t; +extern volatile __CANCON_RO8bits_t __at (0xE3F) CANCON_RO8bits; + +extern __sfr __at (0xE40) B2CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B2CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2CONbits_t; +extern volatile __B2CONbits_t __at (0xE40) B2CONbits; + +extern __sfr __at (0xE41) B2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B2SIDHbits_t; +extern volatile __B2SIDHbits_t __at (0xE41) B2SIDHbits; + +extern __sfr __at (0xE42) B2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2SIDLbits_t; +extern volatile __B2SIDLbits_t __at (0xE42) B2SIDLbits; + +extern __sfr __at (0xE43) B2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B2EIDHbits_t; +extern volatile __B2EIDHbits_t __at (0xE43) B2EIDHbits; + +extern __sfr __at (0xE44) B2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B2EIDLbits_t; +extern volatile __B2EIDLbits_t __at (0xE44) B2EIDLbits; + +extern __sfr __at (0xE45) B2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B2DLC : 1; + unsigned RB1_B2DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B2DLCbits_t; +extern volatile __B2DLCbits_t __at (0xE45) B2DLCbits; + +extern __sfr __at (0xE46) B2D0; +typedef union { + struct { + unsigned B2D00 : 1; + unsigned B2D01 : 1; + unsigned B2D02 : 1; + unsigned B2D03 : 1; + unsigned B2D04 : 1; + unsigned B2D05 : 1; + unsigned B2D06 : 1; + unsigned B2D07 : 1; + }; +} __B2D0bits_t; +extern volatile __B2D0bits_t __at (0xE46) B2D0bits; + +extern __sfr __at (0xE47) B2D1; +typedef union { + struct { + unsigned B2D10 : 1; + unsigned B2D11 : 1; + unsigned B2D12 : 1; + unsigned B2D13 : 1; + unsigned B2D14 : 1; + unsigned B2D15 : 1; + unsigned B2D16 : 1; + unsigned B2D17 : 1; + }; +} __B2D1bits_t; +extern volatile __B2D1bits_t __at (0xE47) B2D1bits; + +extern __sfr __at (0xE48) B2D2; +typedef union { + struct { + unsigned B2D20 : 1; + unsigned B2D21 : 1; + unsigned B2D22 : 1; + unsigned B2D23 : 1; + unsigned B2D24 : 1; + unsigned B2D25 : 1; + unsigned B2D26 : 1; + unsigned B2D27 : 1; + }; +} __B2D2bits_t; +extern volatile __B2D2bits_t __at (0xE48) B2D2bits; + +extern __sfr __at (0xE49) B2D3; +typedef union { + struct { + unsigned B2D30 : 1; + unsigned B2D31 : 1; + unsigned B2D32 : 1; + unsigned B2D33 : 1; + unsigned B2D34 : 1; + unsigned B2D35 : 1; + unsigned B2D36 : 1; + unsigned B2D37 : 1; + }; +} __B2D3bits_t; +extern volatile __B2D3bits_t __at (0xE49) B2D3bits; + +extern __sfr __at (0xE4A) B2D4; +typedef union { + struct { + unsigned B2D40 : 1; + unsigned B2D41 : 1; + unsigned B2D42 : 1; + unsigned B2D43 : 1; + unsigned B2D44 : 1; + unsigned B2D45 : 1; + unsigned B2D46 : 1; + unsigned B2D47 : 1; + }; +} __B2D4bits_t; +extern volatile __B2D4bits_t __at (0xE4A) B2D4bits; + +extern __sfr __at (0xE4B) B2D5; +typedef union { + struct { + unsigned B2D50 : 1; + unsigned B2D51 : 1; + unsigned B2D52 : 1; + unsigned B2D53 : 1; + unsigned B2D54 : 1; + unsigned B2D55 : 1; + unsigned B2D56 : 1; + unsigned B2D57 : 1; + }; +} __B2D5bits_t; +extern volatile __B2D5bits_t __at (0xE4B) B2D5bits; + +extern __sfr __at (0xE4C) B2D6; +typedef union { + struct { + unsigned B2D60 : 1; + unsigned B2D61 : 1; + unsigned B2D62 : 1; + unsigned B2D63 : 1; + unsigned B2D64 : 1; + unsigned B2D65 : 1; + unsigned B2D66 : 1; + unsigned B2D67 : 1; + }; +} __B2D6bits_t; +extern volatile __B2D6bits_t __at (0xE4C) B2D6bits; + +extern __sfr __at (0xE4D) B2D7; +typedef union { + struct { + unsigned B2D70 : 1; + unsigned B2D71 : 1; + unsigned B2D72 : 1; + unsigned B2D73 : 1; + unsigned B2D74 : 1; + unsigned B2D75 : 1; + unsigned B2D76 : 1; + unsigned B2D77 : 1; + }; +} __B2D7bits_t; +extern volatile __B2D7bits_t __at (0xE4D) B2D7bits; + +extern __sfr __at (0xE4E) CANSTAT_RO7; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO7bits_t; +extern volatile __CANSTAT_RO7bits_t __at (0xE4E) CANSTAT_RO7bits; + +extern __sfr __at (0xE4F) CANCON_RO7; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO7bits_t; +extern volatile __CANCON_RO7bits_t __at (0xE4F) CANCON_RO7bits; + +extern __sfr __at (0xE50) B3CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B3CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3CONbits_t; +extern volatile __B3CONbits_t __at (0xE50) B3CONbits; + +extern __sfr __at (0xE51) B3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B3SIDHbits_t; +extern volatile __B3SIDHbits_t __at (0xE51) B3SIDHbits; + +extern __sfr __at (0xE52) B3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3SIDLbits_t; +extern volatile __B3SIDLbits_t __at (0xE52) B3SIDLbits; + +extern __sfr __at (0xE53) B3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B3EIDHbits_t; +extern volatile __B3EIDHbits_t __at (0xE53) B3EIDHbits; + +extern __sfr __at (0xE54) B3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B3EIDLbits_t; +extern volatile __B3EIDLbits_t __at (0xE54) B3EIDLbits; + +extern __sfr __at (0xE55) B3DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B3DLC : 1; + unsigned RB1_B3DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B3DLCbits_t; +extern volatile __B3DLCbits_t __at (0xE55) B3DLCbits; + +extern __sfr __at (0xE56) B3D0; +typedef union { + struct { + unsigned B3D00 : 1; + unsigned B3D01 : 1; + unsigned B3D02 : 1; + unsigned B3D03 : 1; + unsigned B3D04 : 1; + unsigned B3D05 : 1; + unsigned B3D06 : 1; + unsigned B3D07 : 1; + }; +} __B3D0bits_t; +extern volatile __B3D0bits_t __at (0xE56) B3D0bits; + +extern __sfr __at (0xE57) B3D1; +typedef union { + struct { + unsigned B3D10 : 1; + unsigned B3D11 : 1; + unsigned B3D12 : 1; + unsigned B3D13 : 1; + unsigned B3D14 : 1; + unsigned B3D15 : 1; + unsigned B3D16 : 1; + unsigned B3D17 : 1; + }; +} __B3D1bits_t; +extern volatile __B3D1bits_t __at (0xE57) B3D1bits; + +extern __sfr __at (0xE58) B3D2; +typedef union { + struct { + unsigned B3D20 : 1; + unsigned B3D21 : 1; + unsigned B3D22 : 1; + unsigned B3D23 : 1; + unsigned B3D24 : 1; + unsigned B3D25 : 1; + unsigned B3D26 : 1; + unsigned B3D27 : 1; + }; +} __B3D2bits_t; +extern volatile __B3D2bits_t __at (0xE58) B3D2bits; + +extern __sfr __at (0xE59) B3D3; +typedef union { + struct { + unsigned B3D30 : 1; + unsigned B3D31 : 1; + unsigned B3D32 : 1; + unsigned B3D33 : 1; + unsigned B3D34 : 1; + unsigned B3D35 : 1; + unsigned B3D36 : 1; + unsigned B3D37 : 1; + }; +} __B3D3bits_t; +extern volatile __B3D3bits_t __at (0xE59) B3D3bits; + +extern __sfr __at (0xE5A) B3D4; +typedef union { + struct { + unsigned B3D40 : 1; + unsigned B3D41 : 1; + unsigned B3D42 : 1; + unsigned B3D43 : 1; + unsigned B3D44 : 1; + unsigned B3D45 : 1; + unsigned B3D46 : 1; + unsigned B3D47 : 1; + }; +} __B3D4bits_t; +extern volatile __B3D4bits_t __at (0xE5A) B3D4bits; + +extern __sfr __at (0xE5B) B3D5; +typedef union { + struct { + unsigned B3D50 : 1; + unsigned B3D51 : 1; + unsigned B3D52 : 1; + unsigned B3D53 : 1; + unsigned B3D54 : 1; + unsigned B3D55 : 1; + unsigned B3D56 : 1; + unsigned B3D57 : 1; + }; +} __B3D5bits_t; +extern volatile __B3D5bits_t __at (0xE5B) B3D5bits; + +extern __sfr __at (0xE5C) B3D6; +typedef union { + struct { + unsigned B3D60 : 1; + unsigned B3D61 : 1; + unsigned B3D62 : 1; + unsigned B3D63 : 1; + unsigned B3D64 : 1; + unsigned B3D65 : 1; + unsigned B3D66 : 1; + unsigned B3D67 : 1; + }; +} __B3D6bits_t; +extern volatile __B3D6bits_t __at (0xE5C) B3D6bits; + +extern __sfr __at (0xE5D) B3D7; +typedef union { + struct { + unsigned B3D70 : 1; + unsigned B3D71 : 1; + unsigned B3D72 : 1; + unsigned B3D73 : 1; + unsigned B3D74 : 1; + unsigned B3D75 : 1; + unsigned B3D76 : 1; + unsigned B3D77 : 1; + }; +} __B3D7bits_t; +extern volatile __B3D7bits_t __at (0xE5D) B3D7bits; + +extern __sfr __at (0xE5E) CANSTAT_RO6; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO6bits_t; +extern volatile __CANSTAT_RO6bits_t __at (0xE5E) CANSTAT_RO6bits; + +extern __sfr __at (0xE5F) CANCON_RO6; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO6bits_t; +extern volatile __CANCON_RO6bits_t __at (0xE5F) CANCON_RO6bits; + +extern __sfr __at (0xE60) B4CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B4CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4CONbits_t; +extern volatile __B4CONbits_t __at (0xE60) B4CONbits; + +extern __sfr __at (0xE61) B4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B4SIDHbits_t; +extern volatile __B4SIDHbits_t __at (0xE61) B4SIDHbits; + +extern __sfr __at (0xE62) B4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4SIDLbits_t; +extern volatile __B4SIDLbits_t __at (0xE62) B4SIDLbits; + +extern __sfr __at (0xE63) B4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B4EIDHbits_t; +extern volatile __B4EIDHbits_t __at (0xE63) B4EIDHbits; + +extern __sfr __at (0xE64) B4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B4EIDLbits_t; +extern volatile __B4EIDLbits_t __at (0xE64) B4EIDLbits; + +extern __sfr __at (0xE65) B4DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B4DLC : 1; + unsigned RB1_B4DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B4DLCbits_t; +extern volatile __B4DLCbits_t __at (0xE65) B4DLCbits; + +extern __sfr __at (0xE66) B4D0; +typedef union { + struct { + unsigned B4D00 : 1; + unsigned B4D01 : 1; + unsigned B4D02 : 1; + unsigned B4D03 : 1; + unsigned B4D04 : 1; + unsigned B4D05 : 1; + unsigned B4D06 : 1; + unsigned B4D07 : 1; + }; +} __B4D0bits_t; +extern volatile __B4D0bits_t __at (0xE66) B4D0bits; + +extern __sfr __at (0xE67) B4D1; +typedef union { + struct { + unsigned B4D10 : 1; + unsigned B4D11 : 1; + unsigned B4D12 : 1; + unsigned B4D13 : 1; + unsigned B4D14 : 1; + unsigned B4D15 : 1; + unsigned B4D16 : 1; + unsigned B4D17 : 1; + }; +} __B4D1bits_t; +extern volatile __B4D1bits_t __at (0xE67) B4D1bits; + +extern __sfr __at (0xE68) B4D2; +typedef union { + struct { + unsigned B4D20 : 1; + unsigned B4D21 : 1; + unsigned B4D22 : 1; + unsigned B4D23 : 1; + unsigned B4D24 : 1; + unsigned B4D25 : 1; + unsigned B4D26 : 1; + unsigned B4D27 : 1; + }; +} __B4D2bits_t; +extern volatile __B4D2bits_t __at (0xE68) B4D2bits; + +extern __sfr __at (0xE69) B4D3; +typedef union { + struct { + unsigned B4D30 : 1; + unsigned B4D31 : 1; + unsigned B4D32 : 1; + unsigned B4D33 : 1; + unsigned B4D34 : 1; + unsigned B4D35 : 1; + unsigned B4D36 : 1; + unsigned B4D37 : 1; + }; +} __B4D3bits_t; +extern volatile __B4D3bits_t __at (0xE69) B4D3bits; + +extern __sfr __at (0xE6A) B4D4; +typedef union { + struct { + unsigned B4D40 : 1; + unsigned B4D41 : 1; + unsigned B4D42 : 1; + unsigned B4D43 : 1; + unsigned B4D44 : 1; + unsigned B4D45 : 1; + unsigned B4D46 : 1; + unsigned B4D47 : 1; + }; +} __B4D4bits_t; +extern volatile __B4D4bits_t __at (0xE6A) B4D4bits; + +extern __sfr __at (0xE6B) B4D5; +typedef union { + struct { + unsigned B4D50 : 1; + unsigned B4D51 : 1; + unsigned B4D52 : 1; + unsigned B4D53 : 1; + unsigned B4D54 : 1; + unsigned B4D55 : 1; + unsigned B4D56 : 1; + unsigned B4D57 : 1; + }; +} __B4D5bits_t; +extern volatile __B4D5bits_t __at (0xE6B) B4D5bits; + +extern __sfr __at (0xE6C) B4D6; +typedef union { + struct { + unsigned B4D60 : 1; + unsigned B4D61 : 1; + unsigned B4D62 : 1; + unsigned B4D63 : 1; + unsigned B4D64 : 1; + unsigned B4D65 : 1; + unsigned B4D66 : 1; + unsigned B4D67 : 1; + }; +} __B4D6bits_t; +extern volatile __B4D6bits_t __at (0xE6C) B4D6bits; + +extern __sfr __at (0xE6D) B4D7; +typedef union { + struct { + unsigned B4D70 : 1; + unsigned B4D71 : 1; + unsigned B4D72 : 1; + unsigned B4D73 : 1; + unsigned B4D74 : 1; + unsigned B4D75 : 1; + unsigned B4D76 : 1; + unsigned B46D77 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B4D77 : 1; + }; +} __B4D7bits_t; +extern volatile __B4D7bits_t __at (0xE6D) B4D7bits; + +extern __sfr __at (0xE6E) CANSTAT_RO5; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO5bits_t; +extern volatile __CANSTAT_RO5bits_t __at (0xE6E) CANSTAT_RO5bits; + +extern __sfr __at (0xE6F) CANCON_RO5; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO5bits_t; +extern volatile __CANCON_RO5bits_t __at (0xE6F) CANCON_RO5bits; + +extern __sfr __at (0xE70) B5CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B5CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5CONbits_t; +extern volatile __B5CONbits_t __at (0xE70) B5CONbits; + +extern __sfr __at (0xE71) B5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B5SIDHbits_t; +extern volatile __B5SIDHbits_t __at (0xE71) B5SIDHbits; + +extern __sfr __at (0xE72) B5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5SIDLbits_t; +extern volatile __B5SIDLbits_t __at (0xE72) B5SIDLbits; + +extern __sfr __at (0xE73) B5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B5EIDHbits_t; +extern volatile __B5EIDHbits_t __at (0xE73) B5EIDHbits; + +extern __sfr __at (0xE74) B5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B5EIDLbits_t; +extern volatile __B5EIDLbits_t __at (0xE74) B5EIDLbits; + +extern __sfr __at (0xE75) B5DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B5DLC : 1; + unsigned RB1_B5DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5DLCbits_t; +extern volatile __B5DLCbits_t __at (0xE75) B5DLCbits; + +extern __sfr __at (0xE76) B5D0; +typedef union { + struct { + unsigned B5D00 : 1; + unsigned B5D01 : 1; + unsigned B5D02 : 1; + unsigned B5D03 : 1; + unsigned B5D04 : 1; + unsigned B5D05 : 1; + unsigned B5D06 : 1; + unsigned B57D07 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D07 : 1; + }; +} __B5D0bits_t; +extern volatile __B5D0bits_t __at (0xE76) B5D0bits; + +extern __sfr __at (0xE77) B5D1; +typedef union { + struct { + unsigned B5D10 : 1; + unsigned B5D11 : 1; + unsigned B5D12 : 1; + unsigned B5D13 : 1; + unsigned B5D14 : 1; + unsigned B5D15 : 1; + unsigned B5D16 : 1; + unsigned B5D17 : 1; + }; +} __B5D1bits_t; +extern volatile __B5D1bits_t __at (0xE77) B5D1bits; + +extern __sfr __at (0xE78) B5D2; +typedef union { + struct { + unsigned B5D20 : 1; + unsigned B5D21 : 1; + unsigned B5D22 : 1; + unsigned B57D23 : 1; + unsigned B5D24 : 1; + unsigned B5D25 : 1; + unsigned B5D26 : 1; + unsigned B5D27 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D23 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5D2bits_t; +extern volatile __B5D2bits_t __at (0xE78) B5D2bits; + +extern __sfr __at (0xE79) B5D3; +typedef union { + struct { + unsigned B5D30 : 1; + unsigned B5D31 : 1; + unsigned B5D32 : 1; + unsigned B5D33 : 1; + unsigned B5D34 : 1; + unsigned B5D35 : 1; + unsigned B5D36 : 1; + unsigned B5D37 : 1; + }; +} __B5D3bits_t; +extern volatile __B5D3bits_t __at (0xE79) B5D3bits; + +extern __sfr __at (0xE7A) B5D4; +typedef union { + struct { + unsigned B5D40 : 1; + unsigned B5D41 : 1; + unsigned B5D42 : 1; + unsigned B5D43 : 1; + unsigned B5D44 : 1; + unsigned B5D45 : 1; + unsigned B5D46 : 1; + unsigned B5D47 : 1; + }; +} __B5D4bits_t; +extern volatile __B5D4bits_t __at (0xE7A) B5D4bits; + +extern __sfr __at (0xE7B) B5D5; +typedef union { + struct { + unsigned B5D50 : 1; + unsigned B5D51 : 1; + unsigned B5D52 : 1; + unsigned B5D53 : 1; + unsigned B5D54 : 1; + unsigned B5D55 : 1; + unsigned B5D56 : 1; + unsigned B5D57 : 1; + }; +} __B5D5bits_t; +extern volatile __B5D5bits_t __at (0xE7B) B5D5bits; + +extern __sfr __at (0xE7C) B5D6; +typedef union { + struct { + unsigned B5D60 : 1; + unsigned B5D61 : 1; + unsigned B5D62 : 1; + unsigned B5D63 : 1; + unsigned B5D64 : 1; + unsigned B5D65 : 1; + unsigned B5D66 : 1; + unsigned B5D67 : 1; + }; +} __B5D6bits_t; +extern volatile __B5D6bits_t __at (0xE7C) B5D6bits; + +extern __sfr __at (0xE7D) B5D7; +typedef union { + struct { + unsigned B5D70 : 1; + unsigned B5D71 : 1; + unsigned B5D72 : 1; + unsigned B5D73 : 1; + unsigned B5D74 : 1; + unsigned B5D75 : 1; + unsigned B5D76 : 1; + unsigned B5D77 : 1; + }; +} __B5D7bits_t; +extern volatile __B5D7bits_t __at (0xE7D) B5D7bits; + +extern __sfr __at (0xE7E) CANSTAT_RO4; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO4bits_t; +extern volatile __CANSTAT_RO4bits_t __at (0xE7E) CANSTAT_RO4bits; + +extern __sfr __at (0xE7F) CANCON_RO4; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO4bits_t; +extern volatile __CANCON_RO4bits_t __at (0xE7F) CANCON_RO4bits; + +extern __sfr __at (0xF00) RXF0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF0SIDHbits_t; +extern volatile __RXF0SIDHbits_t __at (0xF00) RXF0SIDHbits; + +extern __sfr __at (0xF01) RXF0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF0SIDLbits_t; +extern volatile __RXF0SIDLbits_t __at (0xF01) RXF0SIDLbits; + +extern __sfr __at (0xF02) RXF0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF0EIDHbits_t; +extern volatile __RXF0EIDHbits_t __at (0xF02) RXF0EIDHbits; + +extern __sfr __at (0xF03) RXF0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF0EIDLbits_t; +extern volatile __RXF0EIDLbits_t __at (0xF03) RXF0EIDLbits; + +extern __sfr __at (0xF04) RXF1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF1SIDHbits_t; +extern volatile __RXF1SIDHbits_t __at (0xF04) RXF1SIDHbits; + +extern __sfr __at (0xF05) RXF1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF1SIDLbits_t; +extern volatile __RXF1SIDLbits_t __at (0xF05) RXF1SIDLbits; + +extern __sfr __at (0xF06) RXF1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF1EIDHbits_t; +extern volatile __RXF1EIDHbits_t __at (0xF06) RXF1EIDHbits; + +extern __sfr __at (0xF07) RXF1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF1EIDLbits_t; +extern volatile __RXF1EIDLbits_t __at (0xF07) RXF1EIDLbits; + +extern __sfr __at (0xF08) RXF2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF2SIDHbits_t; +extern volatile __RXF2SIDHbits_t __at (0xF08) RXF2SIDHbits; + +extern __sfr __at (0xF09) RXF2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF2SIDLbits_t; +extern volatile __RXF2SIDLbits_t __at (0xF09) RXF2SIDLbits; + +extern __sfr __at (0xF0A) RXF2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF2EIDHbits_t; +extern volatile __RXF2EIDHbits_t __at (0xF0A) RXF2EIDHbits; + +extern __sfr __at (0xF0B) RXF2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF2EIDLbits_t; +extern volatile __RXF2EIDLbits_t __at (0xF0B) RXF2EIDLbits; + +extern __sfr __at (0xF0C) RXF3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF3SIDHbits_t; +extern volatile __RXF3SIDHbits_t __at (0xF0C) RXF3SIDHbits; + +extern __sfr __at (0xF0D) RXF3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF3SIDLbits_t; +extern volatile __RXF3SIDLbits_t __at (0xF0D) RXF3SIDLbits; + +extern __sfr __at (0xF0E) RXF3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF3EIDHbits_t; +extern volatile __RXF3EIDHbits_t __at (0xF0E) RXF3EIDHbits; + +extern __sfr __at (0xF0F) RXF3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF3EIDLbits_t; +extern volatile __RXF3EIDLbits_t __at (0xF0F) RXF3EIDLbits; + +extern __sfr __at (0xF10) RXF4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF4SIDHbits_t; +extern volatile __RXF4SIDHbits_t __at (0xF10) RXF4SIDHbits; + +extern __sfr __at (0xF11) RXF4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF4SIDLbits_t; +extern volatile __RXF4SIDLbits_t __at (0xF11) RXF4SIDLbits; + +extern __sfr __at (0xF12) RXF4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF4EIDHbits_t; +extern volatile __RXF4EIDHbits_t __at (0xF12) RXF4EIDHbits; + +extern __sfr __at (0xF13) RXF4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF4EIDLbits_t; +extern volatile __RXF4EIDLbits_t __at (0xF13) RXF4EIDLbits; + +extern __sfr __at (0xF14) RXF5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF5SIDHbits_t; +extern volatile __RXF5SIDHbits_t __at (0xF14) RXF5SIDHbits; + +extern __sfr __at (0xF15) RXF5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF5SIDLbits_t; +extern volatile __RXF5SIDLbits_t __at (0xF15) RXF5SIDLbits; + +extern __sfr __at (0xF16) RXF5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF5EIDHbits_t; +extern volatile __RXF5EIDHbits_t __at (0xF16) RXF5EIDHbits; + +extern __sfr __at (0xF17) RXF5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF5EIDLbits_t; +extern volatile __RXF5EIDLbits_t __at (0xF17) RXF5EIDLbits; + +extern __sfr __at (0xF18) RXM0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM0SIDHbits_t; +extern volatile __RXM0SIDHbits_t __at (0xF18) RXM0SIDHbits; + +extern __sfr __at (0xF19) RXM0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM0SIDLbits_t; +extern volatile __RXM0SIDLbits_t __at (0xF19) RXM0SIDLbits; + +extern __sfr __at (0xF1A) RXM0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM0EIDHbits_t; +extern volatile __RXM0EIDHbits_t __at (0xF1A) RXM0EIDHbits; + +extern __sfr __at (0xF1B) RXM0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM0EIDLbits_t; +extern volatile __RXM0EIDLbits_t __at (0xF1B) RXM0EIDLbits; + +extern __sfr __at (0xF1C) RXM1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM1SIDHbits_t; +extern volatile __RXM1SIDHbits_t __at (0xF1C) RXM1SIDHbits; + +extern __sfr __at (0xF1D) RXM1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM1SIDLbits_t; +extern volatile __RXM1SIDLbits_t __at (0xF1D) RXM1SIDLbits; + +extern __sfr __at (0xF1E) RXM1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM1EIDHbits_t; +extern volatile __RXM1EIDHbits_t __at (0xF1E) RXM1EIDHbits; + +extern __sfr __at (0xF1F) RXM1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM1EIDLbits_t; +extern volatile __RXM1EIDLbits_t __at (0xF1F) RXM1EIDLbits; + +extern __sfr __at (0xF20) TXB2CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFBXB2CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB2CONbits_t; +extern volatile __TXB2CONbits_t __at (0xF20) TXB2CONbits; + +extern __sfr __at (0xF21) TXB2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB2SIDHbits_t; +extern volatile __TXB2SIDHbits_t __at (0xF21) TXB2SIDHbits; + +extern __sfr __at (0xF22) TXB2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB2SIDLbits_t; +extern volatile __TXB2SIDLbits_t __at (0xF22) TXB2SIDLbits; + +extern __sfr __at (0xF23) TXB2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB2EIDHbits_t; +extern volatile __TXB2EIDHbits_t __at (0xF23) TXB2EIDHbits; + +extern __sfr __at (0xF24) TXB2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB2EIDLbits_t; +extern volatile __TXB2EIDLbits_t __at (0xF24) TXB2EIDLbits; + +extern __sfr __at (0xF25) TXB2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB2DLCbits_t; +extern volatile __TXB2DLCbits_t __at (0xF25) TXB2DLCbits; + +extern __sfr __at (0xF26) TXB2D0; +typedef union { + struct { + unsigned TXB2D00 : 1; + unsigned TXB2D01 : 1; + unsigned TXB2D02 : 1; + unsigned TXB2D03 : 1; + unsigned TXB2D04 : 1; + unsigned TXB2D05 : 1; + unsigned TXB2D06 : 1; + unsigned TXB2D07 : 1; + }; +} __TXB2D0bits_t; +extern volatile __TXB2D0bits_t __at (0xF26) TXB2D0bits; + +extern __sfr __at (0xF27) TXB2D1; +typedef union { + struct { + unsigned TXB2D10 : 1; + unsigned TXB2D11 : 1; + unsigned TXB2D12 : 1; + unsigned TXB2D13 : 1; + unsigned TXB2D14 : 1; + unsigned TXB2D15 : 1; + unsigned TXB2D16 : 1; + unsigned TXB2D17 : 1; + }; +} __TXB2D1bits_t; +extern volatile __TXB2D1bits_t __at (0xF27) TXB2D1bits; + +extern __sfr __at (0xF28) TXB2D2; +typedef union { + struct { + unsigned TXB2D20 : 1; + unsigned TXB2D21 : 1; + unsigned TXB2D22 : 1; + unsigned TXB2D23 : 1; + unsigned TXB2D24 : 1; + unsigned TXB2D25 : 1; + unsigned TXB2D26 : 1; + unsigned TXB2D27 : 1; + }; +} __TXB2D2bits_t; +extern volatile __TXB2D2bits_t __at (0xF28) TXB2D2bits; + +extern __sfr __at (0xF29) TXB2D3; +typedef union { + struct { + unsigned TXB2D30 : 1; + unsigned TXB2D31 : 1; + unsigned TXB2D32 : 1; + unsigned TXB2D33 : 1; + unsigned TXB2D34 : 1; + unsigned TXB2D35 : 1; + unsigned TXB2D36 : 1; + unsigned TXB2D37 : 1; + }; +} __TXB2D3bits_t; +extern volatile __TXB2D3bits_t __at (0xF29) TXB2D3bits; + +extern __sfr __at (0xF2A) TXB2D4; +typedef union { + struct { + unsigned TXB2D40 : 1; + unsigned TXB2D41 : 1; + unsigned TXB2D42 : 1; + unsigned TXB2D43 : 1; + unsigned TXB2D44 : 1; + unsigned TXB2D45 : 1; + unsigned TXB2D46 : 1; + unsigned TXB2D47 : 1; + }; +} __TXB2D4bits_t; +extern volatile __TXB2D4bits_t __at (0xF2A) TXB2D4bits; + +extern __sfr __at (0xF2B) TXB2D5; +typedef union { + struct { + unsigned TXB2D50 : 1; + unsigned TXB2D51 : 1; + unsigned TXB2D52 : 1; + unsigned TXB2D53 : 1; + unsigned TXB2D54 : 1; + unsigned TXB2D55 : 1; + unsigned TXB2D56 : 1; + unsigned TXB2D57 : 1; + }; +} __TXB2D5bits_t; +extern volatile __TXB2D5bits_t __at (0xF2B) TXB2D5bits; + +extern __sfr __at (0xF2C) TXB2D6; +typedef union { + struct { + unsigned TXB2D60 : 1; + unsigned TXB2D61 : 1; + unsigned TXB2D62 : 1; + unsigned TXB2D63 : 1; + unsigned TXB2D64 : 1; + unsigned TXB2D65 : 1; + unsigned TXB2D66 : 1; + unsigned TXB2D67 : 1; + }; +} __TXB2D6bits_t; +extern volatile __TXB2D6bits_t __at (0xF2C) TXB2D6bits; + +extern __sfr __at (0xF2D) TXB2D7; +typedef union { + struct { + unsigned TXB2D70 : 1; + unsigned TXB2D71 : 1; + unsigned TXB2D72 : 1; + unsigned TXB2D73 : 1; + unsigned TXB2D74 : 1; + unsigned TXB2D75 : 1; + unsigned TXB2D76 : 1; + unsigned TXB2D77 : 1; + }; +} __TXB2D7bits_t; +extern volatile __TXB2D7bits_t __at (0xF2D) TXB2D7bits; + +extern __sfr __at (0xF2E) CANSTAT_RO3; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO3bits_t; +extern volatile __CANSTAT_RO3bits_t __at (0xF2E) CANSTAT_RO3bits; + +extern __sfr __at (0xF2F) CANCON_RO3; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO3bits_t; +extern volatile __CANCON_RO3bits_t __at (0xF2F) CANCON_RO3bits; + +extern __sfr __at (0xF30) TXB1CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFTXB1CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB1CONbits_t; +extern volatile __TXB1CONbits_t __at (0xF30) TXB1CONbits; + +extern __sfr __at (0xF31) TXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB1SIDHbits_t; +extern volatile __TXB1SIDHbits_t __at (0xF31) TXB1SIDHbits; + +extern __sfr __at (0xF32) TXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB1SIDLbits_t; +extern volatile __TXB1SIDLbits_t __at (0xF32) TXB1SIDLbits; + +extern __sfr __at (0xF33) TXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB1EIDHbits_t; +extern volatile __TXB1EIDHbits_t __at (0xF33) TXB1EIDHbits; + +extern __sfr __at (0xF34) TXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB1EIDLbits_t; +extern volatile __TXB1EIDLbits_t __at (0xF34) TXB1EIDLbits; + +extern __sfr __at (0xF35) TXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB1DLCbits_t; +extern volatile __TXB1DLCbits_t __at (0xF35) TXB1DLCbits; + +extern __sfr __at (0xF36) TXB1D0; +typedef union { + struct { + unsigned TXB1D00 : 1; + unsigned TXB1D01 : 1; + unsigned TXB1D02 : 1; + unsigned TXB1D03 : 1; + unsigned TXB1D04 : 1; + unsigned TXB1D05 : 1; + unsigned TXB1D06 : 1; + unsigned TXB1D07 : 1; + }; +} __TXB1D0bits_t; +extern volatile __TXB1D0bits_t __at (0xF36) TXB1D0bits; + +extern __sfr __at (0xF37) TXB1D1; +typedef union { + struct { + unsigned TXB1D10 : 1; + unsigned TXB1D11 : 1; + unsigned TXB1D12 : 1; + unsigned TXB1D13 : 1; + unsigned TXB1D14 : 1; + unsigned TXB1D15 : 1; + unsigned TXB1D16 : 1; + unsigned TXB1D17 : 1; + }; +} __TXB1D1bits_t; +extern volatile __TXB1D1bits_t __at (0xF37) TXB1D1bits; + +extern __sfr __at (0xF38) TXB1D2; +typedef union { + struct { + unsigned TXB1D20 : 1; + unsigned TXB1D21 : 1; + unsigned TXB1D22 : 1; + unsigned TXB1D23 : 1; + unsigned TXB1D24 : 1; + unsigned TXB1D25 : 1; + unsigned TXB1D26 : 1; + unsigned TXB1D27 : 1; + }; +} __TXB1D2bits_t; +extern volatile __TXB1D2bits_t __at (0xF38) TXB1D2bits; + +extern __sfr __at (0xF39) TXB1D3; +typedef union { + struct { + unsigned TXB1D30 : 1; + unsigned TXB1D31 : 1; + unsigned TXB1D32 : 1; + unsigned TXB1D33 : 1; + unsigned TXB1D34 : 1; + unsigned TXB1D35 : 1; + unsigned TXB1D36 : 1; + unsigned TXB1D37 : 1; + }; +} __TXB1D3bits_t; +extern volatile __TXB1D3bits_t __at (0xF39) TXB1D3bits; + +extern __sfr __at (0xF3A) TXB1D4; +typedef union { + struct { + unsigned TXB1D40 : 1; + unsigned TXB1D41 : 1; + unsigned TXB1D42 : 1; + unsigned TXB1D43 : 1; + unsigned TXB1D44 : 1; + unsigned TXB1D45 : 1; + unsigned TXB1D46 : 1; + unsigned TXB1D47 : 1; + }; +} __TXB1D4bits_t; +extern volatile __TXB1D4bits_t __at (0xF3A) TXB1D4bits; + +extern __sfr __at (0xF3B) TXB1D5; +typedef union { + struct { + unsigned TXB1D50 : 1; + unsigned TXB1D51 : 1; + unsigned TXB1D52 : 1; + unsigned TXB1D53 : 1; + unsigned TXB1D54 : 1; + unsigned TXB1D55 : 1; + unsigned TXB1D56 : 1; + unsigned TXB1D57 : 1; + }; +} __TXB1D5bits_t; +extern volatile __TXB1D5bits_t __at (0xF3B) TXB1D5bits; + +extern __sfr __at (0xF3C) TXB1D6; +typedef union { + struct { + unsigned TXB1D60 : 1; + unsigned TXB1D61 : 1; + unsigned TXB1D62 : 1; + unsigned TXB1D63 : 1; + unsigned TXB1D64 : 1; + unsigned TXB1D65 : 1; + unsigned TXB1D66 : 1; + unsigned TXB1D67 : 1; + }; +} __TXB1D6bits_t; +extern volatile __TXB1D6bits_t __at (0xF3C) TXB1D6bits; + +extern __sfr __at (0xF3D) TXB1D7; +typedef union { + struct { + unsigned TXB1D70 : 1; + unsigned TXB1D71 : 1; + unsigned TXB1D72 : 1; + unsigned TXB1D73 : 1; + unsigned TXB1D74 : 1; + unsigned TXB1D75 : 1; + unsigned TXB1D76 : 1; + unsigned TXB1D77 : 1; + }; +} __TXB1D7bits_t; +extern volatile __TXB1D7bits_t __at (0xF3D) TXB1D7bits; + +extern __sfr __at (0xF3E) CANSTAT_RO2; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO2bits_t; +extern volatile __CANSTAT_RO2bits_t __at (0xF3E) CANSTAT_RO2bits; + +extern __sfr __at (0xF3F) CANCON_RO2; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO2bits_t; +extern volatile __CANCON_RO2bits_t __at (0xF3F) CANCON_RO2bits; + +extern __sfr __at (0xF40) TXB0CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; +} __TXB0CONbits_t; +extern volatile __TXB0CONbits_t __at (0xF40) TXB0CONbits; + +extern __sfr __at (0xF41) TXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB0SIDHbits_t; +extern volatile __TXB0SIDHbits_t __at (0xF41) TXB0SIDHbits; + +extern __sfr __at (0xF42) TXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB0SIDLbits_t; +extern volatile __TXB0SIDLbits_t __at (0xF42) TXB0SIDLbits; + +extern __sfr __at (0xF43) TXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB0EIDHbits_t; +extern volatile __TXB0EIDHbits_t __at (0xF43) TXB0EIDHbits; + +extern __sfr __at (0xF44) TXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB0EIDLbits_t; +extern volatile __TXB0EIDLbits_t __at (0xF44) TXB0EIDLbits; + +extern __sfr __at (0xF45) TXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB0DLCbits_t; +extern volatile __TXB0DLCbits_t __at (0xF45) TXB0DLCbits; + +extern __sfr __at (0xF46) TXB0D0; +typedef union { + struct { + unsigned TXB0D00 : 1; + unsigned TXB0D01 : 1; + unsigned TXB0D02 : 1; + unsigned TXB0D03 : 1; + unsigned TXB0D04 : 1; + unsigned TXB0D05 : 1; + unsigned TXB0D06 : 1; + unsigned TXB0D07 : 1; + }; +} __TXB0D0bits_t; +extern volatile __TXB0D0bits_t __at (0xF46) TXB0D0bits; + +extern __sfr __at (0xF47) TXB0D1; +typedef union { + struct { + unsigned TXB0D10 : 1; + unsigned TXB0D11 : 1; + unsigned TXB0D12 : 1; + unsigned TXB0D13 : 1; + unsigned TXB0D14 : 1; + unsigned TXB0D15 : 1; + unsigned TXB0D16 : 1; + unsigned TXB0D17 : 1; + }; +} __TXB0D1bits_t; +extern volatile __TXB0D1bits_t __at (0xF47) TXB0D1bits; + +extern __sfr __at (0xF48) TXB0D2; +typedef union { + struct { + unsigned TXB0D20 : 1; + unsigned TXB0D21 : 1; + unsigned TXB0D22 : 1; + unsigned TXB0D23 : 1; + unsigned TXB0D24 : 1; + unsigned TXB0D25 : 1; + unsigned TXB0D26 : 1; + unsigned TXB0D27 : 1; + }; +} __TXB0D2bits_t; +extern volatile __TXB0D2bits_t __at (0xF48) TXB0D2bits; + +extern __sfr __at (0xF49) TXB0D3; +typedef union { + struct { + unsigned TXB0D30 : 1; + unsigned TXB0D31 : 1; + unsigned TXB0D32 : 1; + unsigned TXB0D33 : 1; + unsigned TXB0D34 : 1; + unsigned TXB0D35 : 1; + unsigned TXB0D36 : 1; + unsigned TXB0D37 : 1; + }; +} __TXB0D3bits_t; +extern volatile __TXB0D3bits_t __at (0xF49) TXB0D3bits; + +extern __sfr __at (0xF4A) TXB0D4; +typedef union { + struct { + unsigned TXB0D40 : 1; + unsigned TXB0D41 : 1; + unsigned TXB0D42 : 1; + unsigned TXB0D43 : 1; + unsigned TXB0D44 : 1; + unsigned TXB0D45 : 1; + unsigned TXB0D46 : 1; + unsigned TXB0D47 : 1; + }; +} __TXB0D4bits_t; +extern volatile __TXB0D4bits_t __at (0xF4A) TXB0D4bits; + +extern __sfr __at (0xF4B) TXB0D5; +typedef union { + struct { + unsigned TXB0D50 : 1; + unsigned TXB0D51 : 1; + unsigned TXB0D52 : 1; + unsigned TXB0D53 : 1; + unsigned TXB0D54 : 1; + unsigned TXB0D55 : 1; + unsigned TXB0D56 : 1; + unsigned TXB0D57 : 1; + }; +} __TXB0D5bits_t; +extern volatile __TXB0D5bits_t __at (0xF4B) TXB0D5bits; + +extern __sfr __at (0xF4C) TXB0D6; +typedef union { + struct { + unsigned TXB0D60 : 1; + unsigned TXB0D61 : 1; + unsigned TXB0D62 : 1; + unsigned TXB0D63 : 1; + unsigned TXB0D64 : 1; + unsigned TXB0D65 : 1; + unsigned TXB0D66 : 1; + unsigned TXB0D67 : 1; + }; +} __TXB0D6bits_t; +extern volatile __TXB0D6bits_t __at (0xF4C) TXB0D6bits; + +extern __sfr __at (0xF4D) TXB0D7; +typedef union { + struct { + unsigned TXB0D70 : 1; + unsigned TXB0D71 : 1; + unsigned TXB0D72 : 1; + unsigned TXB0D73 : 1; + unsigned TXB0D74 : 1; + unsigned TXB0D75 : 1; + unsigned TXB0D76 : 1; + unsigned TXB0D77 : 1; + }; +} __TXB0D7bits_t; +extern volatile __TXB0D7bits_t __at (0xF4D) TXB0D7bits; + +extern __sfr __at (0xF4E) CANSTAT_RO1; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO1bits_t; +extern volatile __CANSTAT_RO1bits_t __at (0xF4E) CANSTAT_RO1bits; + +extern __sfr __at (0xF4F) CANCON_RO1; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO1bits_t; +extern volatile __CANCON_RO1bits_t __at (0xF4F) CANCON_RO1bits; + +extern __sfr __at (0xF50) RXB1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned RXRTRRO_RXB1CON : 1; + unsigned FILHIT4 : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned FILHIT3 : 1; + unsigned : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1CONbits_t; +extern volatile __RXB1CONbits_t __at (0xF50) RXB1CONbits; + +extern __sfr __at (0xF51) RXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB1SIDHbits_t; +extern volatile __RXB1SIDHbits_t __at (0xF51) RXB1SIDHbits; + +extern __sfr __at (0xF52) RXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB1SIDLbits_t; +extern volatile __RXB1SIDLbits_t __at (0xF52) RXB1SIDLbits; + +extern __sfr __at (0xF53) RXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB1EIDHbits_t; +extern volatile __RXB1EIDHbits_t __at (0xF53) RXB1EIDHbits; + +extern __sfr __at (0xF54) RXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB1EIDLbits_t; +extern volatile __RXB1EIDLbits_t __at (0xF54) RXB1EIDLbits; + +extern __sfr __at (0xF55) RXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB1DLC : 1; + unsigned RB1_RXB1DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1DLCbits_t; +extern volatile __RXB1DLCbits_t __at (0xF55) RXB1DLCbits; + +extern __sfr __at (0xF56) RXB1D0; +typedef union { + struct { + unsigned RXB1D00 : 1; + unsigned RXB1D01 : 1; + unsigned RXB1D02 : 1; + unsigned RXB1D03 : 1; + unsigned RXB1D04 : 1; + unsigned RXB1D05 : 1; + unsigned RXB1D06 : 1; + unsigned RXB1D07 : 1; + }; +} __RXB1D0bits_t; +extern volatile __RXB1D0bits_t __at (0xF56) RXB1D0bits; + +extern __sfr __at (0xF57) RXB1D1; +typedef union { + struct { + unsigned RXB1D10 : 1; + unsigned RXB1D11 : 1; + unsigned RXB1D12 : 1; + unsigned RXB1D13 : 1; + unsigned RXB1D14 : 1; + unsigned RXB1D15 : 1; + unsigned RXB1D16 : 1; + unsigned RXB1D17 : 1; + }; +} __RXB1D1bits_t; +extern volatile __RXB1D1bits_t __at (0xF57) RXB1D1bits; + +extern __sfr __at (0xF58) RXB1D2; +typedef union { + struct { + unsigned RXB1D20 : 1; + unsigned RXB1D21 : 1; + unsigned RXB1D22 : 1; + unsigned RXB1D23 : 1; + unsigned RXB1D24 : 1; + unsigned RXB1D25 : 1; + unsigned RXB1D26 : 1; + unsigned RXB1D27 : 1; + }; +} __RXB1D2bits_t; +extern volatile __RXB1D2bits_t __at (0xF58) RXB1D2bits; + +extern __sfr __at (0xF59) RXB1D3; +typedef union { + struct { + unsigned RXB1D30 : 1; + unsigned RXB1D31 : 1; + unsigned RXB1D32 : 1; + unsigned RXB1D33 : 1; + unsigned RXB1D34 : 1; + unsigned RXB1D35 : 1; + unsigned RXB1D36 : 1; + unsigned RXB1D37 : 1; + }; +} __RXB1D3bits_t; +extern volatile __RXB1D3bits_t __at (0xF59) RXB1D3bits; + +extern __sfr __at (0xF5A) RXB1D4; +typedef union { + struct { + unsigned RXB1D40 : 1; + unsigned RXB1D41 : 1; + unsigned RXB1D42 : 1; + unsigned RXB1D43 : 1; + unsigned RXB1D44 : 1; + unsigned RXB1D45 : 1; + unsigned RXB1D46 : 1; + unsigned RXB1D47 : 1; + }; +} __RXB1D4bits_t; +extern volatile __RXB1D4bits_t __at (0xF5A) RXB1D4bits; + +extern __sfr __at (0xF5B) RXB1D5; +typedef union { + struct { + unsigned RXB1D50 : 1; + unsigned RXB1D51 : 1; + unsigned RXB1D52 : 1; + unsigned RXB1D53 : 1; + unsigned RXB1D54 : 1; + unsigned RXB1D55 : 1; + unsigned RXB1D56 : 1; + unsigned RXB1D57 : 1; + }; +} __RXB1D5bits_t; +extern volatile __RXB1D5bits_t __at (0xF5B) RXB1D5bits; + +extern __sfr __at (0xF5C) RXB1D6; +typedef union { + struct { + unsigned RXB1D60 : 1; + unsigned RXB1D61 : 1; + unsigned RXB1D62 : 1; + unsigned RXB1D63 : 1; + unsigned RXB1D64 : 1; + unsigned RXB1D65 : 1; + unsigned RXB1D66 : 1; + unsigned RXB1D67 : 1; + }; +} __RXB1D6bits_t; +extern volatile __RXB1D6bits_t __at (0xF5C) RXB1D6bits; + +extern __sfr __at (0xF5D) RXB1D7; +typedef union { + struct { + unsigned RXB1D70 : 1; + unsigned RXB1D71 : 1; + unsigned RXB1D72 : 1; + unsigned RXB1D73 : 1; + unsigned RXB1D74 : 1; + unsigned RXB1D75 : 1; + unsigned RXB1D76 : 1; + unsigned RXB1D77 : 1; + }; +} __RXB1D7bits_t; +extern volatile __RXB1D7bits_t __at (0xF5D) RXB1D7bits; + +extern __sfr __at (0xF5E) CANSTAT_RO0; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO0bits_t; +extern volatile __CANSTAT_RO0bits_t __at (0xF5E) CANSTAT_RO0bits; + +extern __sfr __at (0xF5F) CANCON_RO0; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO0bits_t; +extern volatile __CANCON_RO0bits_t __at (0xF5F) CANCON_RO0bits; + +extern __sfr __at (0xF60) RXB0CON; +typedef union { + struct { + unsigned : 1; + unsigned JTOFF : 1; + unsigned RXB0DBEN : 1; + unsigned RXRTRRO_RXB0CON : 1; + unsigned : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0CONbits_t; +extern volatile __RXB0CONbits_t __at (0xF60) RXB0CONbits; + +extern __sfr __at (0xF61) RXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB0SIDHbits_t; +extern volatile __RXB0SIDHbits_t __at (0xF61) RXB0SIDHbits; + +extern __sfr __at (0xF62) RXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB0SIDLbits_t; +extern volatile __RXB0SIDLbits_t __at (0xF62) RXB0SIDLbits; + +extern __sfr __at (0xF63) RXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB0EIDHbits_t; +extern volatile __RXB0EIDHbits_t __at (0xF63) RXB0EIDHbits; + +extern __sfr __at (0xF64) RXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB0EIDLbits_t; +extern volatile __RXB0EIDLbits_t __at (0xF64) RXB0EIDLbits; + +extern __sfr __at (0xF65) RXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB0DLC : 1; + unsigned RB1_RXB0DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0DLCbits_t; +extern volatile __RXB0DLCbits_t __at (0xF65) RXB0DLCbits; + +extern __sfr __at (0xF66) RXB0D0; +typedef union { + struct { + unsigned RXB0D00 : 1; + unsigned RXB0D01 : 1; + unsigned RXB0D02 : 1; + unsigned RXB0D03 : 1; + unsigned RXB0D04 : 1; + unsigned RXB0D05 : 1; + unsigned RXB0D06 : 1; + unsigned RXB0D07 : 1; + }; +} __RXB0D0bits_t; +extern volatile __RXB0D0bits_t __at (0xF66) RXB0D0bits; + +extern __sfr __at (0xF67) RXB0D1; +typedef union { + struct { + unsigned RXB0D10 : 1; + unsigned RXB0D11 : 1; + unsigned RXB0D12 : 1; + unsigned RXB0D13 : 1; + unsigned RXB0D14 : 1; + unsigned RXB0D15 : 1; + unsigned RXB0D16 : 1; + unsigned RXB0D17 : 1; + }; +} __RXB0D1bits_t; +extern volatile __RXB0D1bits_t __at (0xF67) RXB0D1bits; + +extern __sfr __at (0xF68) RXB0D2; +typedef union { + struct { + unsigned RXB0D20 : 1; + unsigned RXB0D21 : 1; + unsigned RXB0D22 : 1; + unsigned RXB0D23 : 1; + unsigned RXB0D24 : 1; + unsigned RXB0D25 : 1; + unsigned RXB0D26 : 1; + unsigned RXB0D27 : 1; + }; +} __RXB0D2bits_t; +extern volatile __RXB0D2bits_t __at (0xF68) RXB0D2bits; + +extern __sfr __at (0xF69) RXB0D3; +typedef union { + struct { + unsigned RXB0D30 : 1; + unsigned RXB0D31 : 1; + unsigned RXB0D32 : 1; + unsigned RXB0D33 : 1; + unsigned RXB0D34 : 1; + unsigned RXB0D35 : 1; + unsigned RXB0D36 : 1; + unsigned RXB0D37 : 1; + }; +} __RXB0D3bits_t; +extern volatile __RXB0D3bits_t __at (0xF69) RXB0D3bits; + +extern __sfr __at (0xF6A) RXB0D4; +typedef union { + struct { + unsigned RXB0D40 : 1; + unsigned RXB0D41 : 1; + unsigned RXB0D42 : 1; + unsigned RXB0D43 : 1; + unsigned RXB0D44 : 1; + unsigned RXB0D45 : 1; + unsigned RXB0D46 : 1; + unsigned RXB0D47 : 1; + }; +} __RXB0D4bits_t; +extern volatile __RXB0D4bits_t __at (0xF6A) RXB0D4bits; + +extern __sfr __at (0xF6B) RXB0D5; +typedef union { + struct { + unsigned RXB0D50 : 1; + unsigned RXB0D51 : 1; + unsigned RXB0D52 : 1; + unsigned RXB0D53 : 1; + unsigned RXB0D54 : 1; + unsigned RXB0D55 : 1; + unsigned RXB0D56 : 1; + unsigned RXB0D57 : 1; + }; +} __RXB0D5bits_t; +extern volatile __RXB0D5bits_t __at (0xF6B) RXB0D5bits; + +extern __sfr __at (0xF6C) RXB0D6; +typedef union { + struct { + unsigned RXB0D60 : 1; + unsigned RXB0D61 : 1; + unsigned RXB0D62 : 1; + unsigned RXB0D63 : 1; + unsigned RXB0D64 : 1; + unsigned RXB0D65 : 1; + unsigned RXB0D66 : 1; + unsigned RXB0D67 : 1; + }; +} __RXB0D6bits_t; +extern volatile __RXB0D6bits_t __at (0xF6C) RXB0D6bits; + +extern __sfr __at (0xF6D) RXB0D7; +typedef union { + struct { + unsigned RXB0D70 : 1; + unsigned RXB0D71 : 1; + unsigned RXB0D72 : 1; + unsigned RXB0D73 : 1; + unsigned RXB0D74 : 1; + unsigned RXB0D75 : 1; + unsigned RXB0D76 : 1; + unsigned RXB0D77 : 1; + }; +} __RXB0D7bits_t; +extern volatile __RXB0D7bits_t __at (0xF6D) RXB0D7bits; + +extern __sfr __at (0xF6E) CANSTAT; +typedef union { + struct { + unsigned EICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned EICODE4 : 1; + unsigned OPMODE0 : 1; + unsigned OPMODE1 : 1; + unsigned OPMODE2 : 1; + }; + struct { + unsigned : 1; + unsigned EICODE1 : 1; + unsigned EICODE2 : 1; + unsigned EICODE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANSTATbits_t; +extern volatile __CANSTATbits_t __at (0xF6E) CANSTATbits; + +extern __sfr __at (0xF6F) CANCON; +typedef union { + struct { + unsigned FP0 : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; + struct { + unsigned : 1; + unsigned FP1 : 1; + unsigned FP2 : 1; + unsigned FP3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANCONbits_t; +extern volatile __CANCONbits_t __at (0xF6F) CANCONbits; + +extern __sfr __at (0xF70) BRGCON1; +typedef union { + struct { + unsigned BRP0 : 1; + unsigned BRP1 : 1; + unsigned BRP2 : 1; + unsigned BRP3 : 1; + unsigned BRP4 : 1; + unsigned BRP5 : 1; + unsigned SJW0 : 1; + unsigned SJW1 : 1; + }; +} __BRGCON1bits_t; +extern volatile __BRGCON1bits_t __at (0xF70) BRGCON1bits; + +extern __sfr __at (0xF71) BRGCON2; +typedef union { + struct { + unsigned PRSEG0 : 1; + unsigned PRSEG1 : 1; + unsigned PRSEG2 : 1; + unsigned SEG1PH0 : 1; + unsigned SEG1PH1 : 1; + unsigned SEG1PH2 : 1; + unsigned SAM : 1; + unsigned SEG2PHTS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SEG2PHT : 1; + }; +} __BRGCON2bits_t; +extern volatile __BRGCON2bits_t __at (0xF71) BRGCON2bits; + +extern __sfr __at (0xF72) BRGCON3; +typedef union { + struct { + unsigned SEG2PH0 : 1; + unsigned SEG2PH1 : 1; + unsigned SEG2PH2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned WAKFIL : 1; + unsigned WAKDIS : 1; + }; +} __BRGCON3bits_t; +extern volatile __BRGCON3bits_t __at (0xF72) BRGCON3bits; + +extern __sfr __at (0xF73) CIOCON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CANCAP : 1; + unsigned ENDRHI : 1; + unsigned : 1; + unsigned : 1; + }; +} __CIOCONbits_t; +extern volatile __CIOCONbits_t __at (0xF73) CIOCONbits; + +extern __sfr __at (0xF74) COMSTAT; +typedef union { + struct { + unsigned EWARN : 1; + unsigned RXWARN : 1; + unsigned TXWARN : 1; + unsigned RXBP : 1; + unsigned TXBP : 1; + unsigned TXBO : 1; + unsigned RXB1OVFL : 1; + unsigned RXB0OVFL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXBnOVFL : 1; + unsigned FIFOEMPTY : 1; + }; +} __COMSTATbits_t; +extern volatile __COMSTATbits_t __at (0xF74) COMSTATbits; + +extern __sfr __at (0xF75) RXERRCNT; +typedef union { + struct { + unsigned REC0 : 1; + unsigned REC1 : 1; + unsigned REC2 : 1; + unsigned REC3 : 1; + unsigned REC4 : 1; + unsigned REC5 : 1; + unsigned REC6 : 1; + unsigned REC7 : 1; + }; +} __RXERRCNTbits_t; +extern volatile __RXERRCNTbits_t __at (0xF75) RXERRCNTbits; + +extern __sfr __at (0xF76) TXERRCNT; +typedef union { + struct { + unsigned TEC0 : 1; + unsigned TEC1 : 1; + unsigned TEC2 : 1; + unsigned TEC3 : 1; + unsigned TEC4 : 1; + unsigned TEC5 : 1; + unsigned TEC6 : 1; + unsigned TEC7 : 1; + }; +} __TXERRCNTbits_t; +extern volatile __TXERRCNTbits_t __at (0xF76) TXERRCNTbits; + +extern __sfr __at (0xF77) ECANCON; +typedef union { + struct { + unsigned EWIN0 : 1; + unsigned EWIN1 : 1; + unsigned EWIN2 : 1; + unsigned EWIN3 : 1; + unsigned EWIN4 : 1; + unsigned FIFOWM : 1; + unsigned MDSEL0 : 1; + unsigned MDSEL1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned F : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECANCONbits_t; +extern volatile __ECANCONbits_t __at (0xF77) ECANCONbits; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned OSC1 : 1; + }; + struct { + unsigned CVREF_PORTA : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned LVDIN : 1; + unsigned CLKO : 1; + unsigned CLKI : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0_PORTB : 1; + unsigned RB1_PORTB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CANRX : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned CANTX : 1; + unsigned : 1; + unsigned AN9 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned PSP0 : 1; + unsigned PSP1 : 1; + unsigned PSP2 : 1; + unsigned PSP3 : 1; + unsigned PSP4 : 1; + unsigned PSP5 : 1; + unsigned PSP6 : 1; + unsigned PSP7 : 1; + }; + struct { + unsigned C1INB : 1; + unsigned C1INA : 1; + unsigned C2INB : 1; + unsigned C2INA : 1; + unsigned P1A : 1; + unsigned P1B : 1; + unsigned P1C : 1; + unsigned P1D : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ECCP1 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AN5 : 1; + unsigned AN6 : 1; + unsigned AN7 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned NOT_RD : 1; + unsigned NOT_WR : 1; + unsigned NOT_CS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned CS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0_DDRB : 1; + unsigned RB1_DDRB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSCR : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PSPIE : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PSPIF : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXBIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PSPIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned ECCP1IE : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned ECCP1IF : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned ECCP1IP : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned ERRIE : 1; + unsigned WAKIE : 1; + unsigned IRXIE : 1; + }; + struct { + unsigned FIFOWMIE : 1; + unsigned RXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FIFOMWIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned RXB0IF : 1; + unsigned RXB1IF : 1; + unsigned TXB0IF : 1; + unsigned TXB1IF : 1; + unsigned TXB2IF : 1; + unsigned ERRIF : 1; + unsigned WAKIF : 1; + unsigned IRXIF : 1; + }; + struct { + unsigned FIFOWMIF : 1; + unsigned RXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned RXB0IP : 1; + unsigned RXB1IP : 1; + unsigned TXB0IP : 1; + unsigned TXB1IP : 1; + unsigned TXB2IP : 1; + unsigned ERRIP : 1; + unsigned WAKIP : 1; + unsigned IRXIP : 1; + }; + struct { + unsigned FIFOWMIP : 1; + unsigned RXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAA) EEADRH; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T3NSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T3ECCP1 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT : 1; + unsigned C2OUT : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVREF_CVRCON : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CVRSS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) ECCP1DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFBA) ECCP1CON; +typedef union { + struct { + unsigned ECCP1M0 : 1; + unsigned ECCP1M1 : 1; + unsigned ECCP1M2 : 1; + unsigned ECCP1M3 : 1; + unsigned EDC1B0 : 1; + unsigned EDC1B1 : 1; + unsigned EPWM1M0 : 1; + unsigned EPWM1M1 : 1; + }; +} __ECCP1CONbits_t; +extern volatile __ECCP1CONbits_t __at (0xFBA) ECCP1CONbits; + +extern __sfr __at (0xFBB) ECCPR1; + +extern __sfr __at (0xFBB) ECCPR1L; + +extern __sfr __at (0xFBC) ECCPR1H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO_DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T0PS3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned SP0 : 1; + unsigned SP1 : 1; + unsigned SP2 : 1; + unsigned SP3 : 1; + unsigned SP4 : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f4685.h b/device/include/pic16/pic18f4685.h new file mode 100644 index 0000000..398bcd4 --- /dev/null +++ b/device/include/pic16/pic18f4685.h @@ -0,0 +1,6362 @@ +/* + * pic18f4685.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F4685_H__ +#define __PIC18F4685_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP oscillator +#define _OSC_XT_1H 0xF1 // XT oscillator +#define _OSC_HS_1H 0xF2 // HS oscillator +#define _OSC_RC_1H 0xF3 // External RC oscillator, CLKO function on RA6 +#define _OSC_EC_1H 0xF4 // EC oscillator, CLKO function on RA6 +#define _OSC_ECIO_1H 0xF5 // EC oscillator, port function on RA6 +#define _OSC_HSPLL_1H 0xF6 // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) +#define _OSC_RCIO_1H 0xF7 // External RC oscillator, port function on RA6 +#define _OSC_IRCIO67_1H 0xF8 // Internal oscillator block, port function on RA6 and RA7 +#define _OSC_IRCIO7_1H 0xF9 // Internal oscillator block, CLKO function on RA6, port function on RA7 +#define _FCMEN_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled +#define _FCMEN_ON_1H 0xFF // Fail-Safe Clock Monitor enabled +#define _IESO_OFF_1H 0x7F // Oscillator Switchover mode disabled +#define _IESO_ON_1H 0xFF // Oscillator Switchover mode enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // PWRT enabled +#define _PWRT_OFF_2L 0xFF // PWRT disabled +#define _BOREN_OFF_2L 0xF9 // Brown-out Reset disabled in hardware and software +#define _BOREN_SBORENCTRL_2L 0xFB // Brown-out Reset enabled and controlled by software (SBOREN is enabled) +#define _BOREN_BOACTIVE_2L 0xFD // Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) +#define _BOREN_BOHW_2L 0xFF // Brown-out Reset enabled in hardware only (SBOREN is disabled) +#define _BORV_0_2L 0xE7 // Maximum setting +#define _BORV_1_2L 0xEF // +#define _BORV_2_2L 0xF7 // +#define _BORV_3_2L 0xFF // Minimum setting + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit) +#define _WDT_ON_2H 0xFF // WDT enabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // RE3 input pin enabled; MCLR disabled +#define _MCLRE_ON_3H 0xFF // MCLR pin enabled; RE3 input pin disabled +#define _LPT1OSC_OFF_3H 0xFB // Timer1 configured for higher power operation +#define _LPT1OSC_ON_3H 0xFF // Timer1 configured for low-power operation +#define _PBADEN_OFF_3H 0xFD // PORTB<4> and PORTB<1:0> Configured as Digital I/O Pins on Reset +#define _PBADEN_ON_3H 0xFF // PORTB<4> and PORTB<1:0> Configured as Analog Pins on Reset + +// CONFIG4L Options +#define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug +#define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins +#define _XINST_OFF_4L 0xBF // Instruction set extension and Indexed Addressing mode disabled (Legacy mode) +#define _XINST_ON_4L 0xFF // Instruction set extension and Indexed Addressing mode enabled +#define _BBSIZ_1024_4L 0xCF // 1K words (2K bytes) Boot Block +#define _BBSIZ_2048_4L 0xDF // 2K words (4K bytes) Boot Block +#define _BBSIZ_4096_4L 0xEF // 4K words (8K bytes) Boot Block +#define _LVP_OFF_4L 0xFB // Disabled +#define _LVP_ON_4L 0xFF // Enabled +#define _STVREN_OFF_4L 0xFE // Stack full/underflow will not cause Reset +#define _STVREN_ON_4L 0xFF // Stack full/underflow will cause Reset + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Block 0 (000800-003FFFh) code-protected +#define _CP0_OFF_5L 0xFF // Block 0 (000800-003FFFh) not code-protected +#define _CP1_ON_5L 0xFD // Block 1 (004000-007FFFh) code-protected +#define _CP1_OFF_5L 0xFF // Block 1 (004000-007FFFh) not code-protected +#define _CP2_ON_5L 0xFB // Block 2 (008000-00BFFFh) code-protected +#define _CP2_OFF_5L 0xFF // Block 2 (008000-00BFFFh) not code-protected +#define _CP3_ON_5L 0xF7 // Block 3 (00C000-00FFFFh) code-protected +#define _CP3_OFF_5L 0xFF // Block 3 (00C000-00FFFFh) not code-protected +#define _CP4_ON_5L 0xEF // Block 4 (010000-013FFFh) code-protected +#define _CP4_OFF_5L 0xFF // Block 4 (010000-013FFFh) not code-protected +#define _CP5_ON_5L 0xDF // Block 5 (014000-017FFFh) code-protected +#define _CP5_OFF_5L 0xFF // Block 5 (014000-017FFFh) not code-protected + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Boot Block (000000-0007FFh) code-protected +#define _CPB_OFF_5H 0xFF // Boot Block (000000-0007FFh) not code-protected +#define _CPD_ON_5H 0x7F // Data EEPROM code-protected +#define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Block 0 (000800-003FFFh) write-protected +#define _WRT0_OFF_6L 0xFF // Block 0 (000800-003FFFh) not write-protected +#define _WRT1_ON_6L 0xFD // Block 1 (004000-007FFFh) write-protected +#define _WRT1_OFF_6L 0xFF // Block 1 (004000-007FFFh) not write-protected +#define _WRT2_ON_6L 0xFB // Block 2 (008000-00BFFFh) write-protected +#define _WRT2_OFF_6L 0xFF // Block 2 (008000-00BFFFh) not write-protected +#define _WRT3_ON_6L 0xF7 // Block 3 (00C000-00FFFFh) write-protected +#define _WRT3_OFF_6L 0xFF // Block 3 (00C000-00FFFFh) not write-protected +#define _WRT4_ON_6L 0xEF // Block 4 (010000-013FFFh) write-protected +#define _WRT4_OFF_6L 0xFF // Block 4 (010000-013FFFh) not write-protected +#define _WRT5_ON_6L 0xDF // Block 5 (014000-017FFFh) write-protected +#define _WRT5_OFF_6L 0xFF // Block 5 (014000-017FFFh) not write-protected + +// CONFIG6H Options +#define _WRTB_ON_6H 0xBF // Boot Block (000000-0007FFh) write-protected +#define _WRTB_OFF_6H 0xFF // Boot Block (000000-0007FFh) not write-protected +#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected +#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected +#define _WRTD_ON_6H 0x7F // Data EEPROM write-protected +#define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Block 0 (000800-003FFFh) protected from table reads executed in other blocks +#define _EBTR0_OFF_7L 0xFF // Block 0 (000800-003FFFh) not protected from table reads executed in other blocks +#define _EBTR1_ON_7L 0xFD // Block 1 (004000-007FFFh) protected from table reads executed in other blocks +#define _EBTR1_OFF_7L 0xFF // Block 1 (004000-007FFFh) not protected from table reads executed in other blocks +#define _EBTR2_ON_7L 0xFB // Block 2 (008000-00BFFFh) protected from table reads executed in other blocks +#define _EBTR2_OFF_7L 0xFF // Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks +#define _EBTR3_ON_7L 0xF7 // Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks +#define _EBTR3_OFF_7L 0xFF // Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks +#define _EBTR4_ON_7L 0xEF // Block 4 (010000-013FFFh) protected from table reads executed in other blocks +#define _EBTR4_OFF_7L 0xFF // Block 4 (010000-013FFFh) not protected from table reads executed in other blocks +#define _EBTR5_ON_7L 0xDF // Block 5 (014000-017FFFh) protected from table reads executed in other blocks +#define _EBTR5_OFF_7L 0xFF // Block 5 (014000-017FFFh) not protected from table reads executed in other blocks + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Boot Block (000000-0007FFh) protected from table reads executed in other blocks +#define _EBTRB_OFF_7H 0xFF // Boot Block (000000-0007FFh) not protected from table reads executed in other blocks +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xD60) RXF6SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF6SIDHbits_t; +extern volatile __RXF6SIDHbits_t __at (0xD60) RXF6SIDHbits; + +extern __sfr __at (0xD61) RXF6SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF6SIDLbits_t; +extern volatile __RXF6SIDLbits_t __at (0xD61) RXF6SIDLbits; + +extern __sfr __at (0xD62) RXF6EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF6EIDHbits_t; +extern volatile __RXF6EIDHbits_t __at (0xD62) RXF6EIDHbits; + +extern __sfr __at (0xD63) RXF6EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF6EIDLbits_t; +extern volatile __RXF6EIDLbits_t __at (0xD63) RXF6EIDLbits; + +extern __sfr __at (0xD64) RXF7SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF7SIDHbits_t; +extern volatile __RXF7SIDHbits_t __at (0xD64) RXF7SIDHbits; + +extern __sfr __at (0xD65) RXF7SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF7SIDLbits_t; +extern volatile __RXF7SIDLbits_t __at (0xD65) RXF7SIDLbits; + +extern __sfr __at (0xD66) RXF7EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF7EIDHbits_t; +extern volatile __RXF7EIDHbits_t __at (0xD66) RXF7EIDHbits; + +extern __sfr __at (0xD67) RXF7EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF7EIDLbits_t; +extern volatile __RXF7EIDLbits_t __at (0xD67) RXF7EIDLbits; + +extern __sfr __at (0xD68) RXF8SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF8SIDHbits_t; +extern volatile __RXF8SIDHbits_t __at (0xD68) RXF8SIDHbits; + +extern __sfr __at (0xD69) RXF8SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF8SIDLbits_t; +extern volatile __RXF8SIDLbits_t __at (0xD69) RXF8SIDLbits; + +extern __sfr __at (0xD6A) RXF8EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF8EIDHbits_t; +extern volatile __RXF8EIDHbits_t __at (0xD6A) RXF8EIDHbits; + +extern __sfr __at (0xD6B) RXF8EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF8EIDLbits_t; +extern volatile __RXF8EIDLbits_t __at (0xD6B) RXF8EIDLbits; + +extern __sfr __at (0xD70) RXF9SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF9SIDHbits_t; +extern volatile __RXF9SIDHbits_t __at (0xD70) RXF9SIDHbits; + +extern __sfr __at (0xD71) RXF9SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF9SIDLbits_t; +extern volatile __RXF9SIDLbits_t __at (0xD71) RXF9SIDLbits; + +extern __sfr __at (0xD72) RXF9EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF9EIDHbits_t; +extern volatile __RXF9EIDHbits_t __at (0xD72) RXF9EIDHbits; + +extern __sfr __at (0xD73) RXF9EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF9EIDLbits_t; +extern volatile __RXF9EIDLbits_t __at (0xD73) RXF9EIDLbits; + +extern __sfr __at (0xD74) RXF10SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF10SIDHbits_t; +extern volatile __RXF10SIDHbits_t __at (0xD74) RXF10SIDHbits; + +extern __sfr __at (0xD75) RXF10SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF10SIDLbits_t; +extern volatile __RXF10SIDLbits_t __at (0xD75) RXF10SIDLbits; + +extern __sfr __at (0xD76) RXF10EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF10EIDHbits_t; +extern volatile __RXF10EIDHbits_t __at (0xD76) RXF10EIDHbits; + +extern __sfr __at (0xD77) RXF10EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF10EIDLbits_t; +extern volatile __RXF10EIDLbits_t __at (0xD77) RXF10EIDLbits; + +extern __sfr __at (0xD78) RXF11SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF11SIDHbits_t; +extern volatile __RXF11SIDHbits_t __at (0xD78) RXF11SIDHbits; + +extern __sfr __at (0xD79) RXF11SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF11SIDLbits_t; +extern volatile __RXF11SIDLbits_t __at (0xD79) RXF11SIDLbits; + +extern __sfr __at (0xD7A) RXF11EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF11EIDHbits_t; +extern volatile __RXF11EIDHbits_t __at (0xD7A) RXF11EIDHbits; + +extern __sfr __at (0xD7B) RXF11EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF11EIDLbits_t; +extern volatile __RXF11EIDLbits_t __at (0xD7B) RXF11EIDLbits; + +extern __sfr __at (0xD80) RXF12SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF12SIDHbits_t; +extern volatile __RXF12SIDHbits_t __at (0xD80) RXF12SIDHbits; + +extern __sfr __at (0xD81) RXF12SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF12SIDLbits_t; +extern volatile __RXF12SIDLbits_t __at (0xD81) RXF12SIDLbits; + +extern __sfr __at (0xD82) RXF12EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF12EIDHbits_t; +extern volatile __RXF12EIDHbits_t __at (0xD82) RXF12EIDHbits; + +extern __sfr __at (0xD83) RXF12EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF12EIDLbits_t; +extern volatile __RXF12EIDLbits_t __at (0xD83) RXF12EIDLbits; + +extern __sfr __at (0xD84) RXF13SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF13SIDHbits_t; +extern volatile __RXF13SIDHbits_t __at (0xD84) RXF13SIDHbits; + +extern __sfr __at (0xD85) RXF13SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF13SIDLbits_t; +extern volatile __RXF13SIDLbits_t __at (0xD85) RXF13SIDLbits; + +extern __sfr __at (0xD86) RXF13EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF13EIDHbits_t; +extern volatile __RXF13EIDHbits_t __at (0xD86) RXF13EIDHbits; + +extern __sfr __at (0xD87) RXF13EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF13EIDLbits_t; +extern volatile __RXF13EIDLbits_t __at (0xD87) RXF13EIDLbits; + +extern __sfr __at (0xD88) RXF14SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF14SIDHbits_t; +extern volatile __RXF14SIDHbits_t __at (0xD88) RXF14SIDHbits; + +extern __sfr __at (0xD89) RXF14SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF14SIDLbits_t; +extern volatile __RXF14SIDLbits_t __at (0xD89) RXF14SIDLbits; + +extern __sfr __at (0xD8A) RXF14EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF14EIDHbits_t; +extern volatile __RXF14EIDHbits_t __at (0xD8A) RXF14EIDHbits; + +extern __sfr __at (0xD8B) RXF14EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF14EIDLbits_t; +extern volatile __RXF14EIDLbits_t __at (0xD8B) RXF14EIDLbits; + +extern __sfr __at (0xD90) RXF15SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF15SIDHbits_t; +extern volatile __RXF15SIDHbits_t __at (0xD90) RXF15SIDHbits; + +extern __sfr __at (0xD91) RXF15SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF15SIDLbits_t; +extern volatile __RXF15SIDLbits_t __at (0xD91) RXF15SIDLbits; + +extern __sfr __at (0xD92) RXF15EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF15EIDHbits_t; +extern volatile __RXF15EIDHbits_t __at (0xD92) RXF15EIDHbits; + +extern __sfr __at (0xD93) RXF15EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF15EIDLbits_t; +extern volatile __RXF15EIDLbits_t __at (0xD93) RXF15EIDLbits; + +extern __sfr __at (0xDD4) RXFCON0; +typedef union { + struct { + unsigned RXF0EN : 1; + unsigned RXF1EN : 1; + unsigned RXF2EN : 1; + unsigned RXF3EN : 1; + unsigned RXF4EN : 1; + unsigned RXF5EN : 1; + unsigned RXF6EN : 1; + unsigned RXF7EN : 1; + }; +} __RXFCON0bits_t; +extern volatile __RXFCON0bits_t __at (0xDD4) RXFCON0bits; + +extern __sfr __at (0xDD5) RXFCON1; +typedef union { + struct { + unsigned RXF8EN : 1; + unsigned RXF9EN : 1; + unsigned RXF10EN : 1; + unsigned RXF11EN : 1; + unsigned RXF12EN : 1; + unsigned RXF13EN : 1; + unsigned RXF14EN : 1; + unsigned RXF15EN : 1; + }; +} __RXFCON1bits_t; +extern volatile __RXFCON1bits_t __at (0xDD5) RXFCON1bits; + +extern __sfr __at (0xDD8) SDFLC; +typedef union { + struct { + unsigned DFLC0 : 1; + unsigned DFLC1 : 1; + unsigned DFLC2 : 1; + unsigned DFLC3 : 1; + unsigned DFLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FLC0 : 1; + unsigned FLC1 : 1; + unsigned FLC2 : 1; + unsigned FLC3 : 1; + unsigned FLC4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SDFLCbits_t; +extern volatile __SDFLCbits_t __at (0xDD8) SDFLCbits; + +extern __sfr __at (0xDE0) RXFBCON0; +typedef union { + struct { + unsigned F0BP_0 : 1; + unsigned F0BP_1 : 1; + unsigned F0BP_2 : 1; + unsigned F0BP_3 : 1; + unsigned F1BP_0 : 1; + unsigned F1BP_1 : 1; + unsigned F1BP_2 : 1; + unsigned F1BP_3 : 1; + }; +} __RXFBCON0bits_t; +extern volatile __RXFBCON0bits_t __at (0xDE0) RXFBCON0bits; + +extern __sfr __at (0xDE1) RXFBCON1; +typedef union { + struct { + unsigned F2BP_0 : 1; + unsigned F2BP_1 : 1; + unsigned F2BP_2 : 1; + unsigned F2BP_3 : 1; + unsigned F3BP_0 : 1; + unsigned F3BP_1 : 1; + unsigned F3BP_2 : 1; + unsigned F3BP_3 : 1; + }; +} __RXFBCON1bits_t; +extern volatile __RXFBCON1bits_t __at (0xDE1) RXFBCON1bits; + +extern __sfr __at (0xDE2) RXFBCON2; +typedef union { + struct { + unsigned F4BP_0 : 1; + unsigned F4BP_1 : 1; + unsigned F4BP_2 : 1; + unsigned F4BP_3 : 1; + unsigned F5BP_0 : 1; + unsigned F5BP_1 : 1; + unsigned F5BP_2 : 1; + unsigned F5BP_3 : 1; + }; +} __RXFBCON2bits_t; +extern volatile __RXFBCON2bits_t __at (0xDE2) RXFBCON2bits; + +extern __sfr __at (0xDE3) RXFBCON3; +typedef union { + struct { + unsigned F6BP_0 : 1; + unsigned F6BP_1 : 1; + unsigned F6BP_2 : 1; + unsigned F6BP_3 : 1; + unsigned F7BP_0 : 1; + unsigned F7BP_1 : 1; + unsigned F7BP_2 : 1; + unsigned F7BP_3 : 1; + }; +} __RXFBCON3bits_t; +extern volatile __RXFBCON3bits_t __at (0xDE3) RXFBCON3bits; + +extern __sfr __at (0xDE4) RXFBCON4; +typedef union { + struct { + unsigned F8BP_0 : 1; + unsigned F8BP_1 : 1; + unsigned F8BP_2 : 1; + unsigned F8BP_3 : 1; + unsigned F9BP_0 : 1; + unsigned F9BP_1 : 1; + unsigned F9BP_2 : 1; + unsigned F9BP_3 : 1; + }; +} __RXFBCON4bits_t; +extern volatile __RXFBCON4bits_t __at (0xDE4) RXFBCON4bits; + +extern __sfr __at (0xDE5) RXFBCON5; +typedef union { + struct { + unsigned F10BP_0 : 1; + unsigned F10BP_1 : 1; + unsigned F10BP_2 : 1; + unsigned F10BP_3 : 1; + unsigned F11BP_0 : 1; + unsigned F11BP_1 : 1; + unsigned F11BP_2 : 1; + unsigned F11BP_3 : 1; + }; +} __RXFBCON5bits_t; +extern volatile __RXFBCON5bits_t __at (0xDE5) RXFBCON5bits; + +extern __sfr __at (0xDE6) RXFBCON6; +typedef union { + struct { + unsigned F12BP_0 : 1; + unsigned F12BP_1 : 1; + unsigned F12BP_2 : 1; + unsigned F12BP_3 : 1; + unsigned F13BP_0 : 1; + unsigned F13BP_1 : 1; + unsigned F13BP_2 : 1; + unsigned F13BP_3 : 1; + }; +} __RXFBCON6bits_t; +extern volatile __RXFBCON6bits_t __at (0xDE6) RXFBCON6bits; + +extern __sfr __at (0xDE7) RXFBCON7; +typedef union { + struct { + unsigned F14BP_0 : 1; + unsigned F14BP_1 : 1; + unsigned F14BP_2 : 1; + unsigned F14BP_3 : 1; + unsigned F15BP_0 : 1; + unsigned F15BP_1 : 1; + unsigned F15BP_2 : 1; + unsigned F15BP_3 : 1; + }; +} __RXFBCON7bits_t; +extern volatile __RXFBCON7bits_t __at (0xDE7) RXFBCON7bits; + +extern __sfr __at (0xDF0) MSEL0; +typedef union { + struct { + unsigned FIL0_0 : 1; + unsigned FIL0_1 : 1; + unsigned FIL1_0 : 1; + unsigned FIL1_1 : 1; + unsigned FIL2_0 : 1; + unsigned FIL2_1 : 1; + unsigned FIL3_0 : 1; + unsigned FIL3_1 : 1; + }; +} __MSEL0bits_t; +extern volatile __MSEL0bits_t __at (0xDF0) MSEL0bits; + +extern __sfr __at (0xDF1) MSEL1; +typedef union { + struct { + unsigned FIL4_0 : 1; + unsigned FIL4_1 : 1; + unsigned FIL5_0 : 1; + unsigned FIL5_1 : 1; + unsigned FIL6_0 : 1; + unsigned FIL6_1 : 1; + unsigned FIL7_0 : 1; + unsigned FIL7_1 : 1; + }; +} __MSEL1bits_t; +extern volatile __MSEL1bits_t __at (0xDF1) MSEL1bits; + +extern __sfr __at (0xDF2) MSEL2; +typedef union { + struct { + unsigned FIL8_0 : 1; + unsigned FIL8_1 : 1; + unsigned FIL9_0 : 1; + unsigned FIL9_1 : 1; + unsigned FIL10_0 : 1; + unsigned FIL10_1 : 1; + unsigned FIL11_0 : 1; + unsigned FIL11_1 : 1; + }; +} __MSEL2bits_t; +extern volatile __MSEL2bits_t __at (0xDF2) MSEL2bits; + +extern __sfr __at (0xDF3) MSEL3; +typedef union { + struct { + unsigned FIL12_0 : 1; + unsigned FIL12_1 : 1; + unsigned FIL13_0 : 1; + unsigned FIL13_1 : 1; + unsigned FIL14_0 : 1; + unsigned FIL14_1 : 1; + unsigned FIL15_0 : 1; + unsigned FIL15_1 : 1; + }; +} __MSEL3bits_t; +extern volatile __MSEL3bits_t __at (0xDF3) MSEL3bits; + +extern __sfr __at (0xDF8) BSEL0; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned B0TXEN : 1; + unsigned B1TXEN : 1; + unsigned B2TXEN : 1; + unsigned B3TXEN : 1; + unsigned B4TXEN : 1; + unsigned B5TXEN : 1; + }; +} __BSEL0bits_t; +extern volatile __BSEL0bits_t __at (0xDF8) BSEL0bits; + +extern __sfr __at (0xDFA) BIE0; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned B0IE : 1; + unsigned B1IE : 1; + unsigned B2IE : 1; + unsigned B3IE : 1; + unsigned B4IE : 1; + unsigned B5IE : 1; + }; +} __BIE0bits_t; +extern volatile __BIE0bits_t __at (0xDFA) BIE0bits; + +extern __sfr __at (0xDFC) TXBIE; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TXBIEbits_t; +extern volatile __TXBIEbits_t __at (0xDFC) TXBIEbits; + +extern __sfr __at (0xE20) B0CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B0CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0CONbits_t; +extern volatile __B0CONbits_t __at (0xE20) B0CONbits; + +extern __sfr __at (0xE21) B0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B0SIDHbits_t; +extern volatile __B0SIDHbits_t __at (0xE21) B0SIDHbits; + +extern __sfr __at (0xE22) B0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B0SIDLbits_t; +extern volatile __B0SIDLbits_t __at (0xE22) B0SIDLbits; + +extern __sfr __at (0xE23) B0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B0EIDHbits_t; +extern volatile __B0EIDHbits_t __at (0xE23) B0EIDHbits; + +extern __sfr __at (0xE24) B0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B0EIDLbits_t; +extern volatile __B0EIDLbits_t __at (0xE24) B0EIDLbits; + +extern __sfr __at (0xE25) B0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B0DLC : 1; + unsigned RB1_B0DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B0DLCbits_t; +extern volatile __B0DLCbits_t __at (0xE25) B0DLCbits; + +extern __sfr __at (0xE26) B0D0; +typedef union { + struct { + unsigned B0D00 : 1; + unsigned B0D01 : 1; + unsigned B0D02 : 1; + unsigned B0D03 : 1; + unsigned B0D04 : 1; + unsigned B0D05 : 1; + unsigned B0D06 : 1; + unsigned B0D07 : 1; + }; +} __B0D0bits_t; +extern volatile __B0D0bits_t __at (0xE26) B0D0bits; + +extern __sfr __at (0xE27) B0D1; +typedef union { + struct { + unsigned B0D10 : 1; + unsigned B0D11 : 1; + unsigned B0D12 : 1; + unsigned B0D13 : 1; + unsigned B0D14 : 1; + unsigned B0D15 : 1; + unsigned B0D16 : 1; + unsigned B0D17 : 1; + }; +} __B0D1bits_t; +extern volatile __B0D1bits_t __at (0xE27) B0D1bits; + +extern __sfr __at (0xE28) B0D2; +typedef union { + struct { + unsigned B0D20 : 1; + unsigned B0D21 : 1; + unsigned B0D22 : 1; + unsigned B0D23 : 1; + unsigned B0D24 : 1; + unsigned B0D25 : 1; + unsigned B0D26 : 1; + unsigned B0D27 : 1; + }; +} __B0D2bits_t; +extern volatile __B0D2bits_t __at (0xE28) B0D2bits; + +extern __sfr __at (0xE29) B0D3; +typedef union { + struct { + unsigned B0D30 : 1; + unsigned B0D31 : 1; + unsigned B0D32 : 1; + unsigned B0D33 : 1; + unsigned B0D34 : 1; + unsigned B0D35 : 1; + unsigned B0D36 : 1; + unsigned B0D37 : 1; + }; +} __B0D3bits_t; +extern volatile __B0D3bits_t __at (0xE29) B0D3bits; + +extern __sfr __at (0xE2A) B0D4; +typedef union { + struct { + unsigned B0D40 : 1; + unsigned B0D41 : 1; + unsigned B0D42 : 1; + unsigned B0D43 : 1; + unsigned B0D44 : 1; + unsigned B0D45 : 1; + unsigned B0D46 : 1; + unsigned B0D47 : 1; + }; +} __B0D4bits_t; +extern volatile __B0D4bits_t __at (0xE2A) B0D4bits; + +extern __sfr __at (0xE2B) B0D5; +typedef union { + struct { + unsigned B0D50 : 1; + unsigned B0D51 : 1; + unsigned B0D52 : 1; + unsigned B0D53 : 1; + unsigned B0D54 : 1; + unsigned B0D55 : 1; + unsigned B0D56 : 1; + unsigned B0D57 : 1; + }; +} __B0D5bits_t; +extern volatile __B0D5bits_t __at (0xE2B) B0D5bits; + +extern __sfr __at (0xE2C) B0D6; +typedef union { + struct { + unsigned B0D60 : 1; + unsigned B0D61 : 1; + unsigned B0D62 : 1; + unsigned B0D63 : 1; + unsigned B0D64 : 1; + unsigned B0D65 : 1; + unsigned B0D66 : 1; + unsigned B0D67 : 1; + }; +} __B0D6bits_t; +extern volatile __B0D6bits_t __at (0xE2C) B0D6bits; + +extern __sfr __at (0xE2D) B0D7; +typedef union { + struct { + unsigned B0D70 : 1; + unsigned B0D71 : 1; + unsigned B0D72 : 1; + unsigned B0D73 : 1; + unsigned B0D74 : 1; + unsigned B0D75 : 1; + unsigned B0D76 : 1; + unsigned B0D77 : 1; + }; +} __B0D7bits_t; +extern volatile __B0D7bits_t __at (0xE2D) B0D7bits; + +extern __sfr __at (0xE2E) CANSTAT_RO9; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO9bits_t; +extern volatile __CANSTAT_RO9bits_t __at (0xE2E) CANSTAT_RO9bits; + +extern __sfr __at (0xE2F) CANCON_RO9; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO9bits_t; +extern volatile __CANCON_RO9bits_t __at (0xE2F) CANCON_RO9bits; + +extern __sfr __at (0xE30) B1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B1CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1CONbits_t; +extern volatile __B1CONbits_t __at (0xE30) B1CONbits; + +extern __sfr __at (0xE31) B1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B1SIDHbits_t; +extern volatile __B1SIDHbits_t __at (0xE31) B1SIDHbits; + +extern __sfr __at (0xE32) B1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B1SIDLbits_t; +extern volatile __B1SIDLbits_t __at (0xE32) B1SIDLbits; + +extern __sfr __at (0xE33) B1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B1EIDHbits_t; +extern volatile __B1EIDHbits_t __at (0xE33) B1EIDHbits; + +extern __sfr __at (0xE34) B1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B1EIDLbits_t; +extern volatile __B1EIDLbits_t __at (0xE34) B1EIDLbits; + +extern __sfr __at (0xE35) B1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B1DLC : 1; + unsigned RB1_B1DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B1DLCbits_t; +extern volatile __B1DLCbits_t __at (0xE35) B1DLCbits; + +extern __sfr __at (0xE36) B1D0; +typedef union { + struct { + unsigned B1D00 : 1; + unsigned B1D01 : 1; + unsigned B1D02 : 1; + unsigned B1D03 : 1; + unsigned B1D04 : 1; + unsigned B1D05 : 1; + unsigned B1D06 : 1; + unsigned B1D07 : 1; + }; +} __B1D0bits_t; +extern volatile __B1D0bits_t __at (0xE36) B1D0bits; + +extern __sfr __at (0xE37) B1D1; +typedef union { + struct { + unsigned B1D10 : 1; + unsigned B1D11 : 1; + unsigned B1D12 : 1; + unsigned B1D13 : 1; + unsigned B1D14 : 1; + unsigned B1D15 : 1; + unsigned B1D16 : 1; + unsigned B1D17 : 1; + }; +} __B1D1bits_t; +extern volatile __B1D1bits_t __at (0xE37) B1D1bits; + +extern __sfr __at (0xE38) B1D2; +typedef union { + struct { + unsigned B1D20 : 1; + unsigned B1D21 : 1; + unsigned B1D22 : 1; + unsigned B1D23 : 1; + unsigned B1D24 : 1; + unsigned B1D25 : 1; + unsigned B1D26 : 1; + unsigned B1D27 : 1; + }; +} __B1D2bits_t; +extern volatile __B1D2bits_t __at (0xE38) B1D2bits; + +extern __sfr __at (0xE39) B1D3; +typedef union { + struct { + unsigned B1D30 : 1; + unsigned B1D31 : 1; + unsigned B1D32 : 1; + unsigned B1D33 : 1; + unsigned B1D34 : 1; + unsigned B1D35 : 1; + unsigned B1D36 : 1; + unsigned B1D37 : 1; + }; +} __B1D3bits_t; +extern volatile __B1D3bits_t __at (0xE39) B1D3bits; + +extern __sfr __at (0xE3A) B1D4; +typedef union { + struct { + unsigned B1D40 : 1; + unsigned B1D41 : 1; + unsigned B1D42 : 1; + unsigned B1D43 : 1; + unsigned B1D44 : 1; + unsigned B1D45 : 1; + unsigned B1D46 : 1; + unsigned B1D47 : 1; + }; +} __B1D4bits_t; +extern volatile __B1D4bits_t __at (0xE3A) B1D4bits; + +extern __sfr __at (0xE3B) B1D5; +typedef union { + struct { + unsigned B1D50 : 1; + unsigned B1D51 : 1; + unsigned B1D52 : 1; + unsigned B1D53 : 1; + unsigned B1D54 : 1; + unsigned B1D55 : 1; + unsigned B1D56 : 1; + unsigned B1D57 : 1; + }; +} __B1D5bits_t; +extern volatile __B1D5bits_t __at (0xE3B) B1D5bits; + +extern __sfr __at (0xE3C) B1D6; +typedef union { + struct { + unsigned B1D60 : 1; + unsigned B1D61 : 1; + unsigned B1D62 : 1; + unsigned B1D63 : 1; + unsigned B1D64 : 1; + unsigned B1D65 : 1; + unsigned B1D66 : 1; + unsigned B1D67 : 1; + }; +} __B1D6bits_t; +extern volatile __B1D6bits_t __at (0xE3C) B1D6bits; + +extern __sfr __at (0xE3D) B1D7; +typedef union { + struct { + unsigned B1D70 : 1; + unsigned B1D71 : 1; + unsigned B1D72 : 1; + unsigned B1D73 : 1; + unsigned B1D74 : 1; + unsigned B1D75 : 1; + unsigned B1D76 : 1; + unsigned B1D77 : 1; + }; +} __B1D7bits_t; +extern volatile __B1D7bits_t __at (0xE3D) B1D7bits; + +extern __sfr __at (0xE3E) CANSTAT_RO8; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO8bits_t; +extern volatile __CANSTAT_RO8bits_t __at (0xE3E) CANSTAT_RO8bits; + +extern __sfr __at (0xE3F) CANCON_RO8; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO8bits_t; +extern volatile __CANCON_RO8bits_t __at (0xE3F) CANCON_RO8bits; + +extern __sfr __at (0xE40) B2CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B2CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2CONbits_t; +extern volatile __B2CONbits_t __at (0xE40) B2CONbits; + +extern __sfr __at (0xE41) B2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B2SIDHbits_t; +extern volatile __B2SIDHbits_t __at (0xE41) B2SIDHbits; + +extern __sfr __at (0xE42) B2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B2SIDLbits_t; +extern volatile __B2SIDLbits_t __at (0xE42) B2SIDLbits; + +extern __sfr __at (0xE43) B2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B2EIDHbits_t; +extern volatile __B2EIDHbits_t __at (0xE43) B2EIDHbits; + +extern __sfr __at (0xE44) B2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B2EIDLbits_t; +extern volatile __B2EIDLbits_t __at (0xE44) B2EIDLbits; + +extern __sfr __at (0xE45) B2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B2DLC : 1; + unsigned RB1_B2DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B2DLCbits_t; +extern volatile __B2DLCbits_t __at (0xE45) B2DLCbits; + +extern __sfr __at (0xE46) B2D0; +typedef union { + struct { + unsigned B2D00 : 1; + unsigned B2D01 : 1; + unsigned B2D02 : 1; + unsigned B2D03 : 1; + unsigned B2D04 : 1; + unsigned B2D05 : 1; + unsigned B2D06 : 1; + unsigned B2D07 : 1; + }; +} __B2D0bits_t; +extern volatile __B2D0bits_t __at (0xE46) B2D0bits; + +extern __sfr __at (0xE47) B2D1; +typedef union { + struct { + unsigned B2D10 : 1; + unsigned B2D11 : 1; + unsigned B2D12 : 1; + unsigned B2D13 : 1; + unsigned B2D14 : 1; + unsigned B2D15 : 1; + unsigned B2D16 : 1; + unsigned B2D17 : 1; + }; +} __B2D1bits_t; +extern volatile __B2D1bits_t __at (0xE47) B2D1bits; + +extern __sfr __at (0xE48) B2D2; +typedef union { + struct { + unsigned B2D20 : 1; + unsigned B2D21 : 1; + unsigned B2D22 : 1; + unsigned B2D23 : 1; + unsigned B2D24 : 1; + unsigned B2D25 : 1; + unsigned B2D26 : 1; + unsigned B2D27 : 1; + }; +} __B2D2bits_t; +extern volatile __B2D2bits_t __at (0xE48) B2D2bits; + +extern __sfr __at (0xE49) B2D3; +typedef union { + struct { + unsigned B2D30 : 1; + unsigned B2D31 : 1; + unsigned B2D32 : 1; + unsigned B2D33 : 1; + unsigned B2D34 : 1; + unsigned B2D35 : 1; + unsigned B2D36 : 1; + unsigned B2D37 : 1; + }; +} __B2D3bits_t; +extern volatile __B2D3bits_t __at (0xE49) B2D3bits; + +extern __sfr __at (0xE4A) B2D4; +typedef union { + struct { + unsigned B2D40 : 1; + unsigned B2D41 : 1; + unsigned B2D42 : 1; + unsigned B2D43 : 1; + unsigned B2D44 : 1; + unsigned B2D45 : 1; + unsigned B2D46 : 1; + unsigned B2D47 : 1; + }; +} __B2D4bits_t; +extern volatile __B2D4bits_t __at (0xE4A) B2D4bits; + +extern __sfr __at (0xE4B) B2D5; +typedef union { + struct { + unsigned B2D50 : 1; + unsigned B2D51 : 1; + unsigned B2D52 : 1; + unsigned B2D53 : 1; + unsigned B2D54 : 1; + unsigned B2D55 : 1; + unsigned B2D56 : 1; + unsigned B2D57 : 1; + }; +} __B2D5bits_t; +extern volatile __B2D5bits_t __at (0xE4B) B2D5bits; + +extern __sfr __at (0xE4C) B2D6; +typedef union { + struct { + unsigned B2D60 : 1; + unsigned B2D61 : 1; + unsigned B2D62 : 1; + unsigned B2D63 : 1; + unsigned B2D64 : 1; + unsigned B2D65 : 1; + unsigned B2D66 : 1; + unsigned B2D67 : 1; + }; +} __B2D6bits_t; +extern volatile __B2D6bits_t __at (0xE4C) B2D6bits; + +extern __sfr __at (0xE4D) B2D7; +typedef union { + struct { + unsigned B2D70 : 1; + unsigned B2D71 : 1; + unsigned B2D72 : 1; + unsigned B2D73 : 1; + unsigned B2D74 : 1; + unsigned B2D75 : 1; + unsigned B2D76 : 1; + unsigned B2D77 : 1; + }; +} __B2D7bits_t; +extern volatile __B2D7bits_t __at (0xE4D) B2D7bits; + +extern __sfr __at (0xE4E) CANSTAT_RO7; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO7bits_t; +extern volatile __CANSTAT_RO7bits_t __at (0xE4E) CANSTAT_RO7bits; + +extern __sfr __at (0xE4F) CANCON_RO7; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO7bits_t; +extern volatile __CANCON_RO7bits_t __at (0xE4F) CANCON_RO7bits; + +extern __sfr __at (0xE50) B3CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B3CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3CONbits_t; +extern volatile __B3CONbits_t __at (0xE50) B3CONbits; + +extern __sfr __at (0xE51) B3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B3SIDHbits_t; +extern volatile __B3SIDHbits_t __at (0xE51) B3SIDHbits; + +extern __sfr __at (0xE52) B3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B3SIDLbits_t; +extern volatile __B3SIDLbits_t __at (0xE52) B3SIDLbits; + +extern __sfr __at (0xE53) B3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B3EIDHbits_t; +extern volatile __B3EIDHbits_t __at (0xE53) B3EIDHbits; + +extern __sfr __at (0xE54) B3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B3EIDLbits_t; +extern volatile __B3EIDLbits_t __at (0xE54) B3EIDLbits; + +extern __sfr __at (0xE55) B3DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B3DLC : 1; + unsigned RB1_B3DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B3DLCbits_t; +extern volatile __B3DLCbits_t __at (0xE55) B3DLCbits; + +extern __sfr __at (0xE56) B3D0; +typedef union { + struct { + unsigned B3D00 : 1; + unsigned B3D01 : 1; + unsigned B3D02 : 1; + unsigned B3D03 : 1; + unsigned B3D04 : 1; + unsigned B3D05 : 1; + unsigned B3D06 : 1; + unsigned B3D07 : 1; + }; +} __B3D0bits_t; +extern volatile __B3D0bits_t __at (0xE56) B3D0bits; + +extern __sfr __at (0xE57) B3D1; +typedef union { + struct { + unsigned B3D10 : 1; + unsigned B3D11 : 1; + unsigned B3D12 : 1; + unsigned B3D13 : 1; + unsigned B3D14 : 1; + unsigned B3D15 : 1; + unsigned B3D16 : 1; + unsigned B3D17 : 1; + }; +} __B3D1bits_t; +extern volatile __B3D1bits_t __at (0xE57) B3D1bits; + +extern __sfr __at (0xE58) B3D2; +typedef union { + struct { + unsigned B3D20 : 1; + unsigned B3D21 : 1; + unsigned B3D22 : 1; + unsigned B3D23 : 1; + unsigned B3D24 : 1; + unsigned B3D25 : 1; + unsigned B3D26 : 1; + unsigned B3D27 : 1; + }; +} __B3D2bits_t; +extern volatile __B3D2bits_t __at (0xE58) B3D2bits; + +extern __sfr __at (0xE59) B3D3; +typedef union { + struct { + unsigned B3D30 : 1; + unsigned B3D31 : 1; + unsigned B3D32 : 1; + unsigned B3D33 : 1; + unsigned B3D34 : 1; + unsigned B3D35 : 1; + unsigned B3D36 : 1; + unsigned B3D37 : 1; + }; +} __B3D3bits_t; +extern volatile __B3D3bits_t __at (0xE59) B3D3bits; + +extern __sfr __at (0xE5A) B3D4; +typedef union { + struct { + unsigned B3D40 : 1; + unsigned B3D41 : 1; + unsigned B3D42 : 1; + unsigned B3D43 : 1; + unsigned B3D44 : 1; + unsigned B3D45 : 1; + unsigned B3D46 : 1; + unsigned B3D47 : 1; + }; +} __B3D4bits_t; +extern volatile __B3D4bits_t __at (0xE5A) B3D4bits; + +extern __sfr __at (0xE5B) B3D5; +typedef union { + struct { + unsigned B3D50 : 1; + unsigned B3D51 : 1; + unsigned B3D52 : 1; + unsigned B3D53 : 1; + unsigned B3D54 : 1; + unsigned B3D55 : 1; + unsigned B3D56 : 1; + unsigned B3D57 : 1; + }; +} __B3D5bits_t; +extern volatile __B3D5bits_t __at (0xE5B) B3D5bits; + +extern __sfr __at (0xE5C) B3D6; +typedef union { + struct { + unsigned B3D60 : 1; + unsigned B3D61 : 1; + unsigned B3D62 : 1; + unsigned B3D63 : 1; + unsigned B3D64 : 1; + unsigned B3D65 : 1; + unsigned B3D66 : 1; + unsigned B3D67 : 1; + }; +} __B3D6bits_t; +extern volatile __B3D6bits_t __at (0xE5C) B3D6bits; + +extern __sfr __at (0xE5D) B3D7; +typedef union { + struct { + unsigned B3D70 : 1; + unsigned B3D71 : 1; + unsigned B3D72 : 1; + unsigned B3D73 : 1; + unsigned B3D74 : 1; + unsigned B3D75 : 1; + unsigned B3D76 : 1; + unsigned B3D77 : 1; + }; +} __B3D7bits_t; +extern volatile __B3D7bits_t __at (0xE5D) B3D7bits; + +extern __sfr __at (0xE5E) CANSTAT_RO6; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO6bits_t; +extern volatile __CANSTAT_RO6bits_t __at (0xE5E) CANSTAT_RO6bits; + +extern __sfr __at (0xE5F) CANCON_RO6; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO6bits_t; +extern volatile __CANCON_RO6bits_t __at (0xE5F) CANCON_RO6bits; + +extern __sfr __at (0xE60) B4CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B4CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4CONbits_t; +extern volatile __B4CONbits_t __at (0xE60) B4CONbits; + +extern __sfr __at (0xE61) B4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B4SIDHbits_t; +extern volatile __B4SIDHbits_t __at (0xE61) B4SIDHbits; + +extern __sfr __at (0xE62) B4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B4SIDLbits_t; +extern volatile __B4SIDLbits_t __at (0xE62) B4SIDLbits; + +extern __sfr __at (0xE63) B4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B4EIDHbits_t; +extern volatile __B4EIDHbits_t __at (0xE63) B4EIDHbits; + +extern __sfr __at (0xE64) B4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B4EIDLbits_t; +extern volatile __B4EIDLbits_t __at (0xE64) B4EIDLbits; + +extern __sfr __at (0xE65) B4DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B4DLC : 1; + unsigned RB1_B4DLC : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __B4DLCbits_t; +extern volatile __B4DLCbits_t __at (0xE65) B4DLCbits; + +extern __sfr __at (0xE66) B4D0; +typedef union { + struct { + unsigned B4D00 : 1; + unsigned B4D01 : 1; + unsigned B4D02 : 1; + unsigned B4D03 : 1; + unsigned B4D04 : 1; + unsigned B4D05 : 1; + unsigned B4D06 : 1; + unsigned B4D07 : 1; + }; +} __B4D0bits_t; +extern volatile __B4D0bits_t __at (0xE66) B4D0bits; + +extern __sfr __at (0xE67) B4D1; +typedef union { + struct { + unsigned B4D10 : 1; + unsigned B4D11 : 1; + unsigned B4D12 : 1; + unsigned B4D13 : 1; + unsigned B4D14 : 1; + unsigned B4D15 : 1; + unsigned B4D16 : 1; + unsigned B4D17 : 1; + }; +} __B4D1bits_t; +extern volatile __B4D1bits_t __at (0xE67) B4D1bits; + +extern __sfr __at (0xE68) B4D2; +typedef union { + struct { + unsigned B4D20 : 1; + unsigned B4D21 : 1; + unsigned B4D22 : 1; + unsigned B4D23 : 1; + unsigned B4D24 : 1; + unsigned B4D25 : 1; + unsigned B4D26 : 1; + unsigned B4D27 : 1; + }; +} __B4D2bits_t; +extern volatile __B4D2bits_t __at (0xE68) B4D2bits; + +extern __sfr __at (0xE69) B4D3; +typedef union { + struct { + unsigned B4D30 : 1; + unsigned B4D31 : 1; + unsigned B4D32 : 1; + unsigned B4D33 : 1; + unsigned B4D34 : 1; + unsigned B4D35 : 1; + unsigned B4D36 : 1; + unsigned B4D37 : 1; + }; +} __B4D3bits_t; +extern volatile __B4D3bits_t __at (0xE69) B4D3bits; + +extern __sfr __at (0xE6A) B4D4; +typedef union { + struct { + unsigned B4D40 : 1; + unsigned B4D41 : 1; + unsigned B4D42 : 1; + unsigned B4D43 : 1; + unsigned B4D44 : 1; + unsigned B4D45 : 1; + unsigned B4D46 : 1; + unsigned B4D47 : 1; + }; +} __B4D4bits_t; +extern volatile __B4D4bits_t __at (0xE6A) B4D4bits; + +extern __sfr __at (0xE6B) B4D5; +typedef union { + struct { + unsigned B4D50 : 1; + unsigned B4D51 : 1; + unsigned B4D52 : 1; + unsigned B4D53 : 1; + unsigned B4D54 : 1; + unsigned B4D55 : 1; + unsigned B4D56 : 1; + unsigned B4D57 : 1; + }; +} __B4D5bits_t; +extern volatile __B4D5bits_t __at (0xE6B) B4D5bits; + +extern __sfr __at (0xE6C) B4D6; +typedef union { + struct { + unsigned B4D60 : 1; + unsigned B4D61 : 1; + unsigned B4D62 : 1; + unsigned B4D63 : 1; + unsigned B4D64 : 1; + unsigned B4D65 : 1; + unsigned B4D66 : 1; + unsigned B4D67 : 1; + }; +} __B4D6bits_t; +extern volatile __B4D6bits_t __at (0xE6C) B4D6bits; + +extern __sfr __at (0xE6D) B4D7; +typedef union { + struct { + unsigned B4D70 : 1; + unsigned B4D71 : 1; + unsigned B4D72 : 1; + unsigned B4D73 : 1; + unsigned B4D74 : 1; + unsigned B4D75 : 1; + unsigned B4D76 : 1; + unsigned B46D77 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B4D77 : 1; + }; +} __B4D7bits_t; +extern volatile __B4D7bits_t __at (0xE6D) B4D7bits; + +extern __sfr __at (0xE6E) CANSTAT_RO5; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO5bits_t; +extern volatile __CANSTAT_RO5bits_t __at (0xE6E) CANSTAT_RO5bits; + +extern __sfr __at (0xE6F) CANCON_RO5; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO5bits_t; +extern volatile __CANCON_RO5bits_t __at (0xE6F) CANCON_RO5bits; + +extern __sfr __at (0xE70) B5CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned RTREN : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXRTRRO_B5CON : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5CONbits_t; +extern volatile __B5CONbits_t __at (0xE70) B5CONbits; + +extern __sfr __at (0xE71) B5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __B5SIDHbits_t; +extern volatile __B5SIDHbits_t __at (0xE71) B5SIDHbits; + +extern __sfr __at (0xE72) B5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5SIDLbits_t; +extern volatile __B5SIDLbits_t __at (0xE72) B5SIDLbits; + +extern __sfr __at (0xE73) B5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __B5EIDHbits_t; +extern volatile __B5EIDHbits_t __at (0xE73) B5EIDHbits; + +extern __sfr __at (0xE74) B5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __B5EIDLbits_t; +extern volatile __B5EIDLbits_t __at (0xE74) B5EIDLbits; + +extern __sfr __at (0xE75) B5DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_B5DLC : 1; + unsigned RB1_B5DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5DLCbits_t; +extern volatile __B5DLCbits_t __at (0xE75) B5DLCbits; + +extern __sfr __at (0xE76) B5D0; +typedef union { + struct { + unsigned B5D00 : 1; + unsigned B5D01 : 1; + unsigned B5D02 : 1; + unsigned B5D03 : 1; + unsigned B5D04 : 1; + unsigned B5D05 : 1; + unsigned B5D06 : 1; + unsigned B57D07 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D07 : 1; + }; +} __B5D0bits_t; +extern volatile __B5D0bits_t __at (0xE76) B5D0bits; + +extern __sfr __at (0xE77) B5D1; +typedef union { + struct { + unsigned B5D10 : 1; + unsigned B5D11 : 1; + unsigned B5D12 : 1; + unsigned B5D13 : 1; + unsigned B5D14 : 1; + unsigned B5D15 : 1; + unsigned B5D16 : 1; + unsigned B5D17 : 1; + }; +} __B5D1bits_t; +extern volatile __B5D1bits_t __at (0xE77) B5D1bits; + +extern __sfr __at (0xE78) B5D2; +typedef union { + struct { + unsigned B5D20 : 1; + unsigned B5D21 : 1; + unsigned B5D22 : 1; + unsigned B57D23 : 1; + unsigned B5D24 : 1; + unsigned B5D25 : 1; + unsigned B5D26 : 1; + unsigned B5D27 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned B5D23 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __B5D2bits_t; +extern volatile __B5D2bits_t __at (0xE78) B5D2bits; + +extern __sfr __at (0xE79) B5D3; +typedef union { + struct { + unsigned B5D30 : 1; + unsigned B5D31 : 1; + unsigned B5D32 : 1; + unsigned B5D33 : 1; + unsigned B5D34 : 1; + unsigned B5D35 : 1; + unsigned B5D36 : 1; + unsigned B5D37 : 1; + }; +} __B5D3bits_t; +extern volatile __B5D3bits_t __at (0xE79) B5D3bits; + +extern __sfr __at (0xE7A) B5D4; +typedef union { + struct { + unsigned B5D40 : 1; + unsigned B5D41 : 1; + unsigned B5D42 : 1; + unsigned B5D43 : 1; + unsigned B5D44 : 1; + unsigned B5D45 : 1; + unsigned B5D46 : 1; + unsigned B5D47 : 1; + }; +} __B5D4bits_t; +extern volatile __B5D4bits_t __at (0xE7A) B5D4bits; + +extern __sfr __at (0xE7B) B5D5; +typedef union { + struct { + unsigned B5D50 : 1; + unsigned B5D51 : 1; + unsigned B5D52 : 1; + unsigned B5D53 : 1; + unsigned B5D54 : 1; + unsigned B5D55 : 1; + unsigned B5D56 : 1; + unsigned B5D57 : 1; + }; +} __B5D5bits_t; +extern volatile __B5D5bits_t __at (0xE7B) B5D5bits; + +extern __sfr __at (0xE7C) B5D6; +typedef union { + struct { + unsigned B5D60 : 1; + unsigned B5D61 : 1; + unsigned B5D62 : 1; + unsigned B5D63 : 1; + unsigned B5D64 : 1; + unsigned B5D65 : 1; + unsigned B5D66 : 1; + unsigned B5D67 : 1; + }; +} __B5D6bits_t; +extern volatile __B5D6bits_t __at (0xE7C) B5D6bits; + +extern __sfr __at (0xE7D) B5D7; +typedef union { + struct { + unsigned B5D70 : 1; + unsigned B5D71 : 1; + unsigned B5D72 : 1; + unsigned B5D73 : 1; + unsigned B5D74 : 1; + unsigned B5D75 : 1; + unsigned B5D76 : 1; + unsigned B5D77 : 1; + }; +} __B5D7bits_t; +extern volatile __B5D7bits_t __at (0xE7D) B5D7bits; + +extern __sfr __at (0xE7E) CANSTAT_RO4; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO4bits_t; +extern volatile __CANSTAT_RO4bits_t __at (0xE7E) CANSTAT_RO4bits; + +extern __sfr __at (0xE7F) CANCON_RO4; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO4bits_t; +extern volatile __CANCON_RO4bits_t __at (0xE7F) CANCON_RO4bits; + +extern __sfr __at (0xF00) RXF0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF0SIDHbits_t; +extern volatile __RXF0SIDHbits_t __at (0xF00) RXF0SIDHbits; + +extern __sfr __at (0xF01) RXF0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF0SIDLbits_t; +extern volatile __RXF0SIDLbits_t __at (0xF01) RXF0SIDLbits; + +extern __sfr __at (0xF02) RXF0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF0EIDHbits_t; +extern volatile __RXF0EIDHbits_t __at (0xF02) RXF0EIDHbits; + +extern __sfr __at (0xF03) RXF0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF0EIDLbits_t; +extern volatile __RXF0EIDLbits_t __at (0xF03) RXF0EIDLbits; + +extern __sfr __at (0xF04) RXF1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF1SIDHbits_t; +extern volatile __RXF1SIDHbits_t __at (0xF04) RXF1SIDHbits; + +extern __sfr __at (0xF05) RXF1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF1SIDLbits_t; +extern volatile __RXF1SIDLbits_t __at (0xF05) RXF1SIDLbits; + +extern __sfr __at (0xF06) RXF1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF1EIDHbits_t; +extern volatile __RXF1EIDHbits_t __at (0xF06) RXF1EIDHbits; + +extern __sfr __at (0xF07) RXF1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF1EIDLbits_t; +extern volatile __RXF1EIDLbits_t __at (0xF07) RXF1EIDLbits; + +extern __sfr __at (0xF08) RXF2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF2SIDHbits_t; +extern volatile __RXF2SIDHbits_t __at (0xF08) RXF2SIDHbits; + +extern __sfr __at (0xF09) RXF2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF2SIDLbits_t; +extern volatile __RXF2SIDLbits_t __at (0xF09) RXF2SIDLbits; + +extern __sfr __at (0xF0A) RXF2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF2EIDHbits_t; +extern volatile __RXF2EIDHbits_t __at (0xF0A) RXF2EIDHbits; + +extern __sfr __at (0xF0B) RXF2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF2EIDLbits_t; +extern volatile __RXF2EIDLbits_t __at (0xF0B) RXF2EIDLbits; + +extern __sfr __at (0xF0C) RXF3SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF3SIDHbits_t; +extern volatile __RXF3SIDHbits_t __at (0xF0C) RXF3SIDHbits; + +extern __sfr __at (0xF0D) RXF3SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF3SIDLbits_t; +extern volatile __RXF3SIDLbits_t __at (0xF0D) RXF3SIDLbits; + +extern __sfr __at (0xF0E) RXF3EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF3EIDHbits_t; +extern volatile __RXF3EIDHbits_t __at (0xF0E) RXF3EIDHbits; + +extern __sfr __at (0xF0F) RXF3EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF3EIDLbits_t; +extern volatile __RXF3EIDLbits_t __at (0xF0F) RXF3EIDLbits; + +extern __sfr __at (0xF10) RXF4SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF4SIDHbits_t; +extern volatile __RXF4SIDHbits_t __at (0xF10) RXF4SIDHbits; + +extern __sfr __at (0xF11) RXF4SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF4SIDLbits_t; +extern volatile __RXF4SIDLbits_t __at (0xF11) RXF4SIDLbits; + +extern __sfr __at (0xF12) RXF4EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF4EIDHbits_t; +extern volatile __RXF4EIDHbits_t __at (0xF12) RXF4EIDHbits; + +extern __sfr __at (0xF13) RXF4EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF4EIDLbits_t; +extern volatile __RXF4EIDLbits_t __at (0xF13) RXF4EIDLbits; + +extern __sfr __at (0xF14) RXF5SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXF5SIDHbits_t; +extern volatile __RXF5SIDHbits_t __at (0xF14) RXF5SIDHbits; + +extern __sfr __at (0xF15) RXF5SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXF5SIDLbits_t; +extern volatile __RXF5SIDLbits_t __at (0xF15) RXF5SIDLbits; + +extern __sfr __at (0xF16) RXF5EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXF5EIDHbits_t; +extern volatile __RXF5EIDHbits_t __at (0xF16) RXF5EIDHbits; + +extern __sfr __at (0xF17) RXF5EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXF5EIDLbits_t; +extern volatile __RXF5EIDLbits_t __at (0xF17) RXF5EIDLbits; + +extern __sfr __at (0xF18) RXM0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM0SIDHbits_t; +extern volatile __RXM0SIDHbits_t __at (0xF18) RXM0SIDHbits; + +extern __sfr __at (0xF19) RXM0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM0SIDLbits_t; +extern volatile __RXM0SIDLbits_t __at (0xF19) RXM0SIDLbits; + +extern __sfr __at (0xF1A) RXM0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM0EIDHbits_t; +extern volatile __RXM0EIDHbits_t __at (0xF1A) RXM0EIDHbits; + +extern __sfr __at (0xF1B) RXM0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM0EIDLbits_t; +extern volatile __RXM0EIDLbits_t __at (0xF1B) RXM0EIDLbits; + +extern __sfr __at (0xF1C) RXM1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXM1SIDHbits_t; +extern volatile __RXM1SIDHbits_t __at (0xF1C) RXM1SIDHbits; + +extern __sfr __at (0xF1D) RXM1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDEN : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXM1SIDLbits_t; +extern volatile __RXM1SIDLbits_t __at (0xF1D) RXM1SIDLbits; + +extern __sfr __at (0xF1E) RXM1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXM1EIDHbits_t; +extern volatile __RXM1EIDHbits_t __at (0xF1E) RXM1EIDHbits; + +extern __sfr __at (0xF1F) RXM1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXM1EIDLbits_t; +extern volatile __RXM1EIDLbits_t __at (0xF1F) RXM1EIDLbits; + +extern __sfr __at (0xF20) TXB2CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFBXB2CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB2CONbits_t; +extern volatile __TXB2CONbits_t __at (0xF20) TXB2CONbits; + +extern __sfr __at (0xF21) TXB2SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB2SIDHbits_t; +extern volatile __TXB2SIDHbits_t __at (0xF21) TXB2SIDHbits; + +extern __sfr __at (0xF22) TXB2SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB2SIDLbits_t; +extern volatile __TXB2SIDLbits_t __at (0xF22) TXB2SIDLbits; + +extern __sfr __at (0xF23) TXB2EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB2EIDHbits_t; +extern volatile __TXB2EIDHbits_t __at (0xF23) TXB2EIDHbits; + +extern __sfr __at (0xF24) TXB2EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB2EIDLbits_t; +extern volatile __TXB2EIDLbits_t __at (0xF24) TXB2EIDLbits; + +extern __sfr __at (0xF25) TXB2DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB2DLCbits_t; +extern volatile __TXB2DLCbits_t __at (0xF25) TXB2DLCbits; + +extern __sfr __at (0xF26) TXB2D0; +typedef union { + struct { + unsigned TXB2D00 : 1; + unsigned TXB2D01 : 1; + unsigned TXB2D02 : 1; + unsigned TXB2D03 : 1; + unsigned TXB2D04 : 1; + unsigned TXB2D05 : 1; + unsigned TXB2D06 : 1; + unsigned TXB2D07 : 1; + }; +} __TXB2D0bits_t; +extern volatile __TXB2D0bits_t __at (0xF26) TXB2D0bits; + +extern __sfr __at (0xF27) TXB2D1; +typedef union { + struct { + unsigned TXB2D10 : 1; + unsigned TXB2D11 : 1; + unsigned TXB2D12 : 1; + unsigned TXB2D13 : 1; + unsigned TXB2D14 : 1; + unsigned TXB2D15 : 1; + unsigned TXB2D16 : 1; + unsigned TXB2D17 : 1; + }; +} __TXB2D1bits_t; +extern volatile __TXB2D1bits_t __at (0xF27) TXB2D1bits; + +extern __sfr __at (0xF28) TXB2D2; +typedef union { + struct { + unsigned TXB2D20 : 1; + unsigned TXB2D21 : 1; + unsigned TXB2D22 : 1; + unsigned TXB2D23 : 1; + unsigned TXB2D24 : 1; + unsigned TXB2D25 : 1; + unsigned TXB2D26 : 1; + unsigned TXB2D27 : 1; + }; +} __TXB2D2bits_t; +extern volatile __TXB2D2bits_t __at (0xF28) TXB2D2bits; + +extern __sfr __at (0xF29) TXB2D3; +typedef union { + struct { + unsigned TXB2D30 : 1; + unsigned TXB2D31 : 1; + unsigned TXB2D32 : 1; + unsigned TXB2D33 : 1; + unsigned TXB2D34 : 1; + unsigned TXB2D35 : 1; + unsigned TXB2D36 : 1; + unsigned TXB2D37 : 1; + }; +} __TXB2D3bits_t; +extern volatile __TXB2D3bits_t __at (0xF29) TXB2D3bits; + +extern __sfr __at (0xF2A) TXB2D4; +typedef union { + struct { + unsigned TXB2D40 : 1; + unsigned TXB2D41 : 1; + unsigned TXB2D42 : 1; + unsigned TXB2D43 : 1; + unsigned TXB2D44 : 1; + unsigned TXB2D45 : 1; + unsigned TXB2D46 : 1; + unsigned TXB2D47 : 1; + }; +} __TXB2D4bits_t; +extern volatile __TXB2D4bits_t __at (0xF2A) TXB2D4bits; + +extern __sfr __at (0xF2B) TXB2D5; +typedef union { + struct { + unsigned TXB2D50 : 1; + unsigned TXB2D51 : 1; + unsigned TXB2D52 : 1; + unsigned TXB2D53 : 1; + unsigned TXB2D54 : 1; + unsigned TXB2D55 : 1; + unsigned TXB2D56 : 1; + unsigned TXB2D57 : 1; + }; +} __TXB2D5bits_t; +extern volatile __TXB2D5bits_t __at (0xF2B) TXB2D5bits; + +extern __sfr __at (0xF2C) TXB2D6; +typedef union { + struct { + unsigned TXB2D60 : 1; + unsigned TXB2D61 : 1; + unsigned TXB2D62 : 1; + unsigned TXB2D63 : 1; + unsigned TXB2D64 : 1; + unsigned TXB2D65 : 1; + unsigned TXB2D66 : 1; + unsigned TXB2D67 : 1; + }; +} __TXB2D6bits_t; +extern volatile __TXB2D6bits_t __at (0xF2C) TXB2D6bits; + +extern __sfr __at (0xF2D) TXB2D7; +typedef union { + struct { + unsigned TXB2D70 : 1; + unsigned TXB2D71 : 1; + unsigned TXB2D72 : 1; + unsigned TXB2D73 : 1; + unsigned TXB2D74 : 1; + unsigned TXB2D75 : 1; + unsigned TXB2D76 : 1; + unsigned TXB2D77 : 1; + }; +} __TXB2D7bits_t; +extern volatile __TXB2D7bits_t __at (0xF2D) TXB2D7bits; + +extern __sfr __at (0xF2E) CANSTAT_RO3; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO3bits_t; +extern volatile __CANSTAT_RO3bits_t __at (0xF2E) CANSTAT_RO3bits; + +extern __sfr __at (0xF2F) CANCON_RO3; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO3bits_t; +extern volatile __CANCON_RO3bits_t __at (0xF2F) CANCON_RO3bits; + +extern __sfr __at (0xF30) TXB1CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIFTXB1CON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBIF : 1; + }; +} __TXB1CONbits_t; +extern volatile __TXB1CONbits_t __at (0xF30) TXB1CONbits; + +extern __sfr __at (0xF31) TXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB1SIDHbits_t; +extern volatile __TXB1SIDHbits_t __at (0xF31) TXB1SIDHbits; + +extern __sfr __at (0xF32) TXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB1SIDLbits_t; +extern volatile __TXB1SIDLbits_t __at (0xF32) TXB1SIDLbits; + +extern __sfr __at (0xF33) TXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB1EIDHbits_t; +extern volatile __TXB1EIDHbits_t __at (0xF33) TXB1EIDHbits; + +extern __sfr __at (0xF34) TXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB1EIDLbits_t; +extern volatile __TXB1EIDLbits_t __at (0xF34) TXB1EIDLbits; + +extern __sfr __at (0xF35) TXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB1DLCbits_t; +extern volatile __TXB1DLCbits_t __at (0xF35) TXB1DLCbits; + +extern __sfr __at (0xF36) TXB1D0; +typedef union { + struct { + unsigned TXB1D00 : 1; + unsigned TXB1D01 : 1; + unsigned TXB1D02 : 1; + unsigned TXB1D03 : 1; + unsigned TXB1D04 : 1; + unsigned TXB1D05 : 1; + unsigned TXB1D06 : 1; + unsigned TXB1D07 : 1; + }; +} __TXB1D0bits_t; +extern volatile __TXB1D0bits_t __at (0xF36) TXB1D0bits; + +extern __sfr __at (0xF37) TXB1D1; +typedef union { + struct { + unsigned TXB1D10 : 1; + unsigned TXB1D11 : 1; + unsigned TXB1D12 : 1; + unsigned TXB1D13 : 1; + unsigned TXB1D14 : 1; + unsigned TXB1D15 : 1; + unsigned TXB1D16 : 1; + unsigned TXB1D17 : 1; + }; +} __TXB1D1bits_t; +extern volatile __TXB1D1bits_t __at (0xF37) TXB1D1bits; + +extern __sfr __at (0xF38) TXB1D2; +typedef union { + struct { + unsigned TXB1D20 : 1; + unsigned TXB1D21 : 1; + unsigned TXB1D22 : 1; + unsigned TXB1D23 : 1; + unsigned TXB1D24 : 1; + unsigned TXB1D25 : 1; + unsigned TXB1D26 : 1; + unsigned TXB1D27 : 1; + }; +} __TXB1D2bits_t; +extern volatile __TXB1D2bits_t __at (0xF38) TXB1D2bits; + +extern __sfr __at (0xF39) TXB1D3; +typedef union { + struct { + unsigned TXB1D30 : 1; + unsigned TXB1D31 : 1; + unsigned TXB1D32 : 1; + unsigned TXB1D33 : 1; + unsigned TXB1D34 : 1; + unsigned TXB1D35 : 1; + unsigned TXB1D36 : 1; + unsigned TXB1D37 : 1; + }; +} __TXB1D3bits_t; +extern volatile __TXB1D3bits_t __at (0xF39) TXB1D3bits; + +extern __sfr __at (0xF3A) TXB1D4; +typedef union { + struct { + unsigned TXB1D40 : 1; + unsigned TXB1D41 : 1; + unsigned TXB1D42 : 1; + unsigned TXB1D43 : 1; + unsigned TXB1D44 : 1; + unsigned TXB1D45 : 1; + unsigned TXB1D46 : 1; + unsigned TXB1D47 : 1; + }; +} __TXB1D4bits_t; +extern volatile __TXB1D4bits_t __at (0xF3A) TXB1D4bits; + +extern __sfr __at (0xF3B) TXB1D5; +typedef union { + struct { + unsigned TXB1D50 : 1; + unsigned TXB1D51 : 1; + unsigned TXB1D52 : 1; + unsigned TXB1D53 : 1; + unsigned TXB1D54 : 1; + unsigned TXB1D55 : 1; + unsigned TXB1D56 : 1; + unsigned TXB1D57 : 1; + }; +} __TXB1D5bits_t; +extern volatile __TXB1D5bits_t __at (0xF3B) TXB1D5bits; + +extern __sfr __at (0xF3C) TXB1D6; +typedef union { + struct { + unsigned TXB1D60 : 1; + unsigned TXB1D61 : 1; + unsigned TXB1D62 : 1; + unsigned TXB1D63 : 1; + unsigned TXB1D64 : 1; + unsigned TXB1D65 : 1; + unsigned TXB1D66 : 1; + unsigned TXB1D67 : 1; + }; +} __TXB1D6bits_t; +extern volatile __TXB1D6bits_t __at (0xF3C) TXB1D6bits; + +extern __sfr __at (0xF3D) TXB1D7; +typedef union { + struct { + unsigned TXB1D70 : 1; + unsigned TXB1D71 : 1; + unsigned TXB1D72 : 1; + unsigned TXB1D73 : 1; + unsigned TXB1D74 : 1; + unsigned TXB1D75 : 1; + unsigned TXB1D76 : 1; + unsigned TXB1D77 : 1; + }; +} __TXB1D7bits_t; +extern volatile __TXB1D7bits_t __at (0xF3D) TXB1D7bits; + +extern __sfr __at (0xF3E) CANSTAT_RO2; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO2bits_t; +extern volatile __CANSTAT_RO2bits_t __at (0xF3E) CANSTAT_RO2bits; + +extern __sfr __at (0xF3F) CANCON_RO2; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO2bits_t; +extern volatile __CANCON_RO2bits_t __at (0xF3F) CANCON_RO2bits; + +extern __sfr __at (0xF40) TXB0CON; +typedef union { + struct { + unsigned TXPRI0 : 1; + unsigned TXPRI1 : 1; + unsigned : 1; + unsigned TXREQ : 1; + unsigned TXERR : 1; + unsigned TXLARB : 1; + unsigned TXABT : 1; + unsigned TXBIF : 1; + }; +} __TXB0CONbits_t; +extern volatile __TXB0CONbits_t __at (0xF40) TXB0CONbits; + +extern __sfr __at (0xF41) TXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __TXB0SIDHbits_t; +extern volatile __TXB0SIDHbits_t __at (0xF41) TXB0SIDHbits; + +extern __sfr __at (0xF42) TXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXIDE : 1; + unsigned : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __TXB0SIDLbits_t; +extern volatile __TXB0SIDLbits_t __at (0xF42) TXB0SIDLbits; + +extern __sfr __at (0xF43) TXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __TXB0EIDHbits_t; +extern volatile __TXB0EIDHbits_t __at (0xF43) TXB0EIDHbits; + +extern __sfr __at (0xF44) TXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __TXB0EIDLbits_t; +extern volatile __TXB0EIDLbits_t __at (0xF44) TXB0EIDLbits; + +extern __sfr __at (0xF45) TXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned : 1; + unsigned : 1; + unsigned TXRTR : 1; + unsigned : 1; + }; +} __TXB0DLCbits_t; +extern volatile __TXB0DLCbits_t __at (0xF45) TXB0DLCbits; + +extern __sfr __at (0xF46) TXB0D0; +typedef union { + struct { + unsigned TXB0D00 : 1; + unsigned TXB0D01 : 1; + unsigned TXB0D02 : 1; + unsigned TXB0D03 : 1; + unsigned TXB0D04 : 1; + unsigned TXB0D05 : 1; + unsigned TXB0D06 : 1; + unsigned TXB0D07 : 1; + }; +} __TXB0D0bits_t; +extern volatile __TXB0D0bits_t __at (0xF46) TXB0D0bits; + +extern __sfr __at (0xF47) TXB0D1; +typedef union { + struct { + unsigned TXB0D10 : 1; + unsigned TXB0D11 : 1; + unsigned TXB0D12 : 1; + unsigned TXB0D13 : 1; + unsigned TXB0D14 : 1; + unsigned TXB0D15 : 1; + unsigned TXB0D16 : 1; + unsigned TXB0D17 : 1; + }; +} __TXB0D1bits_t; +extern volatile __TXB0D1bits_t __at (0xF47) TXB0D1bits; + +extern __sfr __at (0xF48) TXB0D2; +typedef union { + struct { + unsigned TXB0D20 : 1; + unsigned TXB0D21 : 1; + unsigned TXB0D22 : 1; + unsigned TXB0D23 : 1; + unsigned TXB0D24 : 1; + unsigned TXB0D25 : 1; + unsigned TXB0D26 : 1; + unsigned TXB0D27 : 1; + }; +} __TXB0D2bits_t; +extern volatile __TXB0D2bits_t __at (0xF48) TXB0D2bits; + +extern __sfr __at (0xF49) TXB0D3; +typedef union { + struct { + unsigned TXB0D30 : 1; + unsigned TXB0D31 : 1; + unsigned TXB0D32 : 1; + unsigned TXB0D33 : 1; + unsigned TXB0D34 : 1; + unsigned TXB0D35 : 1; + unsigned TXB0D36 : 1; + unsigned TXB0D37 : 1; + }; +} __TXB0D3bits_t; +extern volatile __TXB0D3bits_t __at (0xF49) TXB0D3bits; + +extern __sfr __at (0xF4A) TXB0D4; +typedef union { + struct { + unsigned TXB0D40 : 1; + unsigned TXB0D41 : 1; + unsigned TXB0D42 : 1; + unsigned TXB0D43 : 1; + unsigned TXB0D44 : 1; + unsigned TXB0D45 : 1; + unsigned TXB0D46 : 1; + unsigned TXB0D47 : 1; + }; +} __TXB0D4bits_t; +extern volatile __TXB0D4bits_t __at (0xF4A) TXB0D4bits; + +extern __sfr __at (0xF4B) TXB0D5; +typedef union { + struct { + unsigned TXB0D50 : 1; + unsigned TXB0D51 : 1; + unsigned TXB0D52 : 1; + unsigned TXB0D53 : 1; + unsigned TXB0D54 : 1; + unsigned TXB0D55 : 1; + unsigned TXB0D56 : 1; + unsigned TXB0D57 : 1; + }; +} __TXB0D5bits_t; +extern volatile __TXB0D5bits_t __at (0xF4B) TXB0D5bits; + +extern __sfr __at (0xF4C) TXB0D6; +typedef union { + struct { + unsigned TXB0D60 : 1; + unsigned TXB0D61 : 1; + unsigned TXB0D62 : 1; + unsigned TXB0D63 : 1; + unsigned TXB0D64 : 1; + unsigned TXB0D65 : 1; + unsigned TXB0D66 : 1; + unsigned TXB0D67 : 1; + }; +} __TXB0D6bits_t; +extern volatile __TXB0D6bits_t __at (0xF4C) TXB0D6bits; + +extern __sfr __at (0xF4D) TXB0D7; +typedef union { + struct { + unsigned TXB0D70 : 1; + unsigned TXB0D71 : 1; + unsigned TXB0D72 : 1; + unsigned TXB0D73 : 1; + unsigned TXB0D74 : 1; + unsigned TXB0D75 : 1; + unsigned TXB0D76 : 1; + unsigned TXB0D77 : 1; + }; +} __TXB0D7bits_t; +extern volatile __TXB0D7bits_t __at (0xF4D) TXB0D7bits; + +extern __sfr __at (0xF4E) CANSTAT_RO1; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO1bits_t; +extern volatile __CANSTAT_RO1bits_t __at (0xF4E) CANSTAT_RO1bits; + +extern __sfr __at (0xF4F) CANCON_RO1; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO1bits_t; +extern volatile __CANCON_RO1bits_t __at (0xF4F) CANCON_RO1bits; + +extern __sfr __at (0xF50) RXB1CON; +typedef union { + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned RXRTRRO_RXB1CON : 1; + unsigned FILHIT4 : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned FILHIT3 : 1; + unsigned : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1CONbits_t; +extern volatile __RXB1CONbits_t __at (0xF50) RXB1CONbits; + +extern __sfr __at (0xF51) RXB1SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB1SIDHbits_t; +extern volatile __RXB1SIDHbits_t __at (0xF51) RXB1SIDHbits; + +extern __sfr __at (0xF52) RXB1SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB1SIDLbits_t; +extern volatile __RXB1SIDLbits_t __at (0xF52) RXB1SIDLbits; + +extern __sfr __at (0xF53) RXB1EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB1EIDHbits_t; +extern volatile __RXB1EIDHbits_t __at (0xF53) RXB1EIDHbits; + +extern __sfr __at (0xF54) RXB1EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB1EIDLbits_t; +extern volatile __RXB1EIDLbits_t __at (0xF54) RXB1EIDLbits; + +extern __sfr __at (0xF55) RXB1DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB1DLC : 1; + unsigned RB1_RXB1DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB1DLCbits_t; +extern volatile __RXB1DLCbits_t __at (0xF55) RXB1DLCbits; + +extern __sfr __at (0xF56) RXB1D0; +typedef union { + struct { + unsigned RXB1D00 : 1; + unsigned RXB1D01 : 1; + unsigned RXB1D02 : 1; + unsigned RXB1D03 : 1; + unsigned RXB1D04 : 1; + unsigned RXB1D05 : 1; + unsigned RXB1D06 : 1; + unsigned RXB1D07 : 1; + }; +} __RXB1D0bits_t; +extern volatile __RXB1D0bits_t __at (0xF56) RXB1D0bits; + +extern __sfr __at (0xF57) RXB1D1; +typedef union { + struct { + unsigned RXB1D10 : 1; + unsigned RXB1D11 : 1; + unsigned RXB1D12 : 1; + unsigned RXB1D13 : 1; + unsigned RXB1D14 : 1; + unsigned RXB1D15 : 1; + unsigned RXB1D16 : 1; + unsigned RXB1D17 : 1; + }; +} __RXB1D1bits_t; +extern volatile __RXB1D1bits_t __at (0xF57) RXB1D1bits; + +extern __sfr __at (0xF58) RXB1D2; +typedef union { + struct { + unsigned RXB1D20 : 1; + unsigned RXB1D21 : 1; + unsigned RXB1D22 : 1; + unsigned RXB1D23 : 1; + unsigned RXB1D24 : 1; + unsigned RXB1D25 : 1; + unsigned RXB1D26 : 1; + unsigned RXB1D27 : 1; + }; +} __RXB1D2bits_t; +extern volatile __RXB1D2bits_t __at (0xF58) RXB1D2bits; + +extern __sfr __at (0xF59) RXB1D3; +typedef union { + struct { + unsigned RXB1D30 : 1; + unsigned RXB1D31 : 1; + unsigned RXB1D32 : 1; + unsigned RXB1D33 : 1; + unsigned RXB1D34 : 1; + unsigned RXB1D35 : 1; + unsigned RXB1D36 : 1; + unsigned RXB1D37 : 1; + }; +} __RXB1D3bits_t; +extern volatile __RXB1D3bits_t __at (0xF59) RXB1D3bits; + +extern __sfr __at (0xF5A) RXB1D4; +typedef union { + struct { + unsigned RXB1D40 : 1; + unsigned RXB1D41 : 1; + unsigned RXB1D42 : 1; + unsigned RXB1D43 : 1; + unsigned RXB1D44 : 1; + unsigned RXB1D45 : 1; + unsigned RXB1D46 : 1; + unsigned RXB1D47 : 1; + }; +} __RXB1D4bits_t; +extern volatile __RXB1D4bits_t __at (0xF5A) RXB1D4bits; + +extern __sfr __at (0xF5B) RXB1D5; +typedef union { + struct { + unsigned RXB1D50 : 1; + unsigned RXB1D51 : 1; + unsigned RXB1D52 : 1; + unsigned RXB1D53 : 1; + unsigned RXB1D54 : 1; + unsigned RXB1D55 : 1; + unsigned RXB1D56 : 1; + unsigned RXB1D57 : 1; + }; +} __RXB1D5bits_t; +extern volatile __RXB1D5bits_t __at (0xF5B) RXB1D5bits; + +extern __sfr __at (0xF5C) RXB1D6; +typedef union { + struct { + unsigned RXB1D60 : 1; + unsigned RXB1D61 : 1; + unsigned RXB1D62 : 1; + unsigned RXB1D63 : 1; + unsigned RXB1D64 : 1; + unsigned RXB1D65 : 1; + unsigned RXB1D66 : 1; + unsigned RXB1D67 : 1; + }; +} __RXB1D6bits_t; +extern volatile __RXB1D6bits_t __at (0xF5C) RXB1D6bits; + +extern __sfr __at (0xF5D) RXB1D7; +typedef union { + struct { + unsigned RXB1D70 : 1; + unsigned RXB1D71 : 1; + unsigned RXB1D72 : 1; + unsigned RXB1D73 : 1; + unsigned RXB1D74 : 1; + unsigned RXB1D75 : 1; + unsigned RXB1D76 : 1; + unsigned RXB1D77 : 1; + }; +} __RXB1D7bits_t; +extern volatile __RXB1D7bits_t __at (0xF5D) RXB1D7bits; + +extern __sfr __at (0xF5E) CANSTAT_RO0; +typedef union { + struct { + unsigned ICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned ICODE4 : 1; + unsigned OPMODE : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANSTAT_RO0bits_t; +extern volatile __CANSTAT_RO0bits_t __at (0xF5E) CANSTAT_RO0bits; + +extern __sfr __at (0xF5F) CANCON_RO0; +typedef union { + struct { + unsigned : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; +} __CANCON_RO0bits_t; +extern volatile __CANCON_RO0bits_t __at (0xF5F) CANCON_RO0bits; + +extern __sfr __at (0xF60) RXB0CON; +typedef union { + struct { + unsigned : 1; + unsigned JTOFF : 1; + unsigned RXB0DBEN : 1; + unsigned RXRTRRO_RXB0CON : 1; + unsigned : 1; + unsigned RXM0 : 1; + unsigned RXM1 : 1; + unsigned RXFUL : 1; + }; + struct { + unsigned FILHIT0 : 1; + unsigned FILHIT1 : 1; + unsigned FILHIT2 : 1; + unsigned FILHIT3 : 1; + unsigned FILHIT4 : 1; + unsigned RTRRO : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0CONbits_t; +extern volatile __RXB0CONbits_t __at (0xF60) RXB0CONbits; + +extern __sfr __at (0xF61) RXB0SIDH; +typedef union { + struct { + unsigned SID3 : 1; + unsigned SID4 : 1; + unsigned SID5 : 1; + unsigned SID6 : 1; + unsigned SID7 : 1; + unsigned SID8 : 1; + unsigned SID9 : 1; + unsigned SID10 : 1; + }; +} __RXB0SIDHbits_t; +extern volatile __RXB0SIDHbits_t __at (0xF61) RXB0SIDHbits; + +extern __sfr __at (0xF62) RXB0SIDL; +typedef union { + struct { + unsigned EID16 : 1; + unsigned EID17 : 1; + unsigned : 1; + unsigned EXID : 1; + unsigned SRR : 1; + unsigned SID0 : 1; + unsigned SID1 : 1; + unsigned SID2 : 1; + }; +} __RXB0SIDLbits_t; +extern volatile __RXB0SIDLbits_t __at (0xF62) RXB0SIDLbits; + +extern __sfr __at (0xF63) RXB0EIDH; +typedef union { + struct { + unsigned EID8 : 1; + unsigned EID9 : 1; + unsigned EID10 : 1; + unsigned EID11 : 1; + unsigned EID12 : 1; + unsigned EID13 : 1; + unsigned EID14 : 1; + unsigned EID15 : 1; + }; +} __RXB0EIDHbits_t; +extern volatile __RXB0EIDHbits_t __at (0xF63) RXB0EIDHbits; + +extern __sfr __at (0xF64) RXB0EIDL; +typedef union { + struct { + unsigned EID0 : 1; + unsigned EID1 : 1; + unsigned EID2 : 1; + unsigned EID3 : 1; + unsigned EID4 : 1; + unsigned EID5 : 1; + unsigned EID6 : 1; + unsigned EID7 : 1; + }; +} __RXB0EIDLbits_t; +extern volatile __RXB0EIDLbits_t __at (0xF64) RXB0EIDLbits; + +extern __sfr __at (0xF65) RXB0DLC; +typedef union { + struct { + unsigned DLC0 : 1; + unsigned DLC1 : 1; + unsigned DLC2 : 1; + unsigned DLC3 : 1; + unsigned RESRB0 : 1; + unsigned RESRB1 : 1; + unsigned RXRTR : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RB0_RXB0DLC : 1; + unsigned RB1_RXB0DLC : 1; + unsigned : 1; + unsigned : 1; + }; +} __RXB0DLCbits_t; +extern volatile __RXB0DLCbits_t __at (0xF65) RXB0DLCbits; + +extern __sfr __at (0xF66) RXB0D0; +typedef union { + struct { + unsigned RXB0D00 : 1; + unsigned RXB0D01 : 1; + unsigned RXB0D02 : 1; + unsigned RXB0D03 : 1; + unsigned RXB0D04 : 1; + unsigned RXB0D05 : 1; + unsigned RXB0D06 : 1; + unsigned RXB0D07 : 1; + }; +} __RXB0D0bits_t; +extern volatile __RXB0D0bits_t __at (0xF66) RXB0D0bits; + +extern __sfr __at (0xF67) RXB0D1; +typedef union { + struct { + unsigned RXB0D10 : 1; + unsigned RXB0D11 : 1; + unsigned RXB0D12 : 1; + unsigned RXB0D13 : 1; + unsigned RXB0D14 : 1; + unsigned RXB0D15 : 1; + unsigned RXB0D16 : 1; + unsigned RXB0D17 : 1; + }; +} __RXB0D1bits_t; +extern volatile __RXB0D1bits_t __at (0xF67) RXB0D1bits; + +extern __sfr __at (0xF68) RXB0D2; +typedef union { + struct { + unsigned RXB0D20 : 1; + unsigned RXB0D21 : 1; + unsigned RXB0D22 : 1; + unsigned RXB0D23 : 1; + unsigned RXB0D24 : 1; + unsigned RXB0D25 : 1; + unsigned RXB0D26 : 1; + unsigned RXB0D27 : 1; + }; +} __RXB0D2bits_t; +extern volatile __RXB0D2bits_t __at (0xF68) RXB0D2bits; + +extern __sfr __at (0xF69) RXB0D3; +typedef union { + struct { + unsigned RXB0D30 : 1; + unsigned RXB0D31 : 1; + unsigned RXB0D32 : 1; + unsigned RXB0D33 : 1; + unsigned RXB0D34 : 1; + unsigned RXB0D35 : 1; + unsigned RXB0D36 : 1; + unsigned RXB0D37 : 1; + }; +} __RXB0D3bits_t; +extern volatile __RXB0D3bits_t __at (0xF69) RXB0D3bits; + +extern __sfr __at (0xF6A) RXB0D4; +typedef union { + struct { + unsigned RXB0D40 : 1; + unsigned RXB0D41 : 1; + unsigned RXB0D42 : 1; + unsigned RXB0D43 : 1; + unsigned RXB0D44 : 1; + unsigned RXB0D45 : 1; + unsigned RXB0D46 : 1; + unsigned RXB0D47 : 1; + }; +} __RXB0D4bits_t; +extern volatile __RXB0D4bits_t __at (0xF6A) RXB0D4bits; + +extern __sfr __at (0xF6B) RXB0D5; +typedef union { + struct { + unsigned RXB0D50 : 1; + unsigned RXB0D51 : 1; + unsigned RXB0D52 : 1; + unsigned RXB0D53 : 1; + unsigned RXB0D54 : 1; + unsigned RXB0D55 : 1; + unsigned RXB0D56 : 1; + unsigned RXB0D57 : 1; + }; +} __RXB0D5bits_t; +extern volatile __RXB0D5bits_t __at (0xF6B) RXB0D5bits; + +extern __sfr __at (0xF6C) RXB0D6; +typedef union { + struct { + unsigned RXB0D60 : 1; + unsigned RXB0D61 : 1; + unsigned RXB0D62 : 1; + unsigned RXB0D63 : 1; + unsigned RXB0D64 : 1; + unsigned RXB0D65 : 1; + unsigned RXB0D66 : 1; + unsigned RXB0D67 : 1; + }; +} __RXB0D6bits_t; +extern volatile __RXB0D6bits_t __at (0xF6C) RXB0D6bits; + +extern __sfr __at (0xF6D) RXB0D7; +typedef union { + struct { + unsigned RXB0D70 : 1; + unsigned RXB0D71 : 1; + unsigned RXB0D72 : 1; + unsigned RXB0D73 : 1; + unsigned RXB0D74 : 1; + unsigned RXB0D75 : 1; + unsigned RXB0D76 : 1; + unsigned RXB0D77 : 1; + }; +} __RXB0D7bits_t; +extern volatile __RXB0D7bits_t __at (0xF6D) RXB0D7bits; + +extern __sfr __at (0xF6E) CANSTAT; +typedef union { + struct { + unsigned EICODE0 : 1; + unsigned ICODE1 : 1; + unsigned ICODE2 : 1; + unsigned ICODE3 : 1; + unsigned EICODE4 : 1; + unsigned OPMODE0 : 1; + unsigned OPMODE1 : 1; + unsigned OPMODE2 : 1; + }; + struct { + unsigned : 1; + unsigned EICODE1 : 1; + unsigned EICODE2 : 1; + unsigned EICODE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANSTATbits_t; +extern volatile __CANSTATbits_t __at (0xF6E) CANSTATbits; + +extern __sfr __at (0xF6F) CANCON; +typedef union { + struct { + unsigned FP0 : 1; + unsigned WIN0 : 1; + unsigned WIN1 : 1; + unsigned WIN2 : 1; + unsigned ABAT : 1; + unsigned REQOP0 : 1; + unsigned REQOP1 : 1; + unsigned REQOP2 : 1; + }; + struct { + unsigned : 1; + unsigned FP1 : 1; + unsigned FP2 : 1; + unsigned FP3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CANCONbits_t; +extern volatile __CANCONbits_t __at (0xF6F) CANCONbits; + +extern __sfr __at (0xF70) BRGCON1; +typedef union { + struct { + unsigned BRP0 : 1; + unsigned BRP1 : 1; + unsigned BRP2 : 1; + unsigned BRP3 : 1; + unsigned BRP4 : 1; + unsigned BRP5 : 1; + unsigned SJW0 : 1; + unsigned SJW1 : 1; + }; +} __BRGCON1bits_t; +extern volatile __BRGCON1bits_t __at (0xF70) BRGCON1bits; + +extern __sfr __at (0xF71) BRGCON2; +typedef union { + struct { + unsigned PRSEG0 : 1; + unsigned PRSEG1 : 1; + unsigned PRSEG2 : 1; + unsigned SEG1PH0 : 1; + unsigned SEG1PH1 : 1; + unsigned SEG1PH2 : 1; + unsigned SAM : 1; + unsigned SEG2PHTS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SEG2PHT : 1; + }; +} __BRGCON2bits_t; +extern volatile __BRGCON2bits_t __at (0xF71) BRGCON2bits; + +extern __sfr __at (0xF72) BRGCON3; +typedef union { + struct { + unsigned SEG2PH0 : 1; + unsigned SEG2PH1 : 1; + unsigned SEG2PH2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned WAKFIL : 1; + unsigned WAKDIS : 1; + }; +} __BRGCON3bits_t; +extern volatile __BRGCON3bits_t __at (0xF72) BRGCON3bits; + +extern __sfr __at (0xF73) CIOCON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CANCAP : 1; + unsigned ENDRHI : 1; + unsigned : 1; + unsigned : 1; + }; +} __CIOCONbits_t; +extern volatile __CIOCONbits_t __at (0xF73) CIOCONbits; + +extern __sfr __at (0xF74) COMSTAT; +typedef union { + struct { + unsigned EWARN : 1; + unsigned RXWARN : 1; + unsigned TXWARN : 1; + unsigned RXBP : 1; + unsigned TXBP : 1; + unsigned TXBO : 1; + unsigned RXB1OVFL : 1; + unsigned RXB0OVFL : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RXBnOVFL : 1; + unsigned FIFOEMPTY : 1; + }; +} __COMSTATbits_t; +extern volatile __COMSTATbits_t __at (0xF74) COMSTATbits; + +extern __sfr __at (0xF75) RXERRCNT; +typedef union { + struct { + unsigned REC0 : 1; + unsigned REC1 : 1; + unsigned REC2 : 1; + unsigned REC3 : 1; + unsigned REC4 : 1; + unsigned REC5 : 1; + unsigned REC6 : 1; + unsigned REC7 : 1; + }; +} __RXERRCNTbits_t; +extern volatile __RXERRCNTbits_t __at (0xF75) RXERRCNTbits; + +extern __sfr __at (0xF76) TXERRCNT; +typedef union { + struct { + unsigned TEC0 : 1; + unsigned TEC1 : 1; + unsigned TEC2 : 1; + unsigned TEC3 : 1; + unsigned TEC4 : 1; + unsigned TEC5 : 1; + unsigned TEC6 : 1; + unsigned TEC7 : 1; + }; +} __TXERRCNTbits_t; +extern volatile __TXERRCNTbits_t __at (0xF76) TXERRCNTbits; + +extern __sfr __at (0xF77) ECANCON; +typedef union { + struct { + unsigned EWIN0 : 1; + unsigned EWIN1 : 1; + unsigned EWIN2 : 1; + unsigned EWIN3 : 1; + unsigned EWIN4 : 1; + unsigned FIFOWM : 1; + unsigned MDSEL0 : 1; + unsigned MDSEL1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned F : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECANCONbits_t; +extern volatile __ECANCONbits_t __at (0xF77) ECANCONbits; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned OSC1 : 1; + }; + struct { + unsigned CVREF_PORTA : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned LVDIN : 1; + unsigned CLKO : 1; + unsigned CLKI : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0_PORTB : 1; + unsigned RB1_PORTB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CANRX : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned CANTX : 1; + unsigned : 1; + unsigned AN9 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned PSP0 : 1; + unsigned PSP1 : 1; + unsigned PSP2 : 1; + unsigned PSP3 : 1; + unsigned PSP4 : 1; + unsigned PSP5 : 1; + unsigned PSP6 : 1; + unsigned PSP7 : 1; + }; + struct { + unsigned C1INB : 1; + unsigned C1INA : 1; + unsigned C2INB : 1; + unsigned C2INA : 1; + unsigned P1A : 1; + unsigned P1B : 1; + unsigned P1C : 1; + unsigned P1D : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ECCP1 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AN5 : 1; + unsigned AN6 : 1; + unsigned AN7 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned NOT_RD : 1; + unsigned NOT_WR : 1; + unsigned NOT_CS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned CS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0_DDRB : 1; + unsigned RB1_DDRB : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned INTSCR : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PSPIE : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PSPIF : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXBIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PSPIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned ECCP1IE : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned ECCP1IF : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned ECCP1IP : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned RXB0IE : 1; + unsigned RXB1IE : 1; + unsigned TXB0IE : 1; + unsigned TXB1IE : 1; + unsigned TXB2IE : 1; + unsigned ERRIE : 1; + unsigned WAKIE : 1; + unsigned IRXIE : 1; + }; + struct { + unsigned FIFOWMIE : 1; + unsigned RXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned FIFOMWIE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned RXB0IF : 1; + unsigned RXB1IF : 1; + unsigned TXB0IF : 1; + unsigned TXB1IF : 1; + unsigned TXB2IF : 1; + unsigned ERRIF : 1; + unsigned WAKIF : 1; + unsigned IRXIF : 1; + }; + struct { + unsigned FIFOWMIF : 1; + unsigned RXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned RXB0IP : 1; + unsigned RXB1IP : 1; + unsigned TXB0IP : 1; + unsigned TXB1IP : 1; + unsigned TXB2IP : 1; + unsigned ERRIP : 1; + unsigned WAKIP : 1; + unsigned IRXIP : 1; + }; + struct { + unsigned FIFOWMIP : 1; + unsigned RXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned TXBnIP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAA) EEADRH; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T3NSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T3ECCP1 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT : 1; + unsigned C2OUT : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVREF_CVRCON : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CVRSS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) ECCP1DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFBA) ECCP1CON; +typedef union { + struct { + unsigned ECCP1M0 : 1; + unsigned ECCP1M1 : 1; + unsigned ECCP1M2 : 1; + unsigned ECCP1M3 : 1; + unsigned EDC1B0 : 1; + unsigned EDC1B1 : 1; + unsigned EPWM1M0 : 1; + unsigned EPWM1M1 : 1; + }; +} __ECCP1CONbits_t; +extern volatile __ECCP1CONbits_t __at (0xFBA) ECCP1CONbits; + +extern __sfr __at (0xFBB) ECCPR1; + +extern __sfr __at (0xFBB) ECCPR1L; + +extern __sfr __at (0xFBC) ECCPR1H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO_DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T0PS3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned SP0 : 1; + unsigned SP1 : 1; + unsigned SP2 : 1; + unsigned SP3 : 1; + unsigned SP4 : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f46k20.h b/device/include/pic16/pic18f46k20.h new file mode 100644 index 0000000..c88163e --- /dev/null +++ b/device/include/pic16/pic18f46k20.h @@ -0,0 +1,1706 @@ +/* + * pic18f46k20.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F46K20_H__ +#define __PIC18F46K20_H__ 1 + + + +// Configuration Bits +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + +// CONFIG1H Options +#define _OSC_LP_1H 0xF0 // LP +#define _OSC_XT_1H 0xF1 // XT +#define _OSC_HS_1H 0xF2 // HS +#define _OSC_RC_1H 0xF3 // RC +#define _OSC_EC_1H 0xF4 // EC-OSC2 as Clock Out +#define _OSC_ECIO6_1H 0xF5 // EC-OSC2 as RA6 +#define _OSC_HSPLL_1H 0xF6 // HS-PLL Enabled +#define _OSC_RCIO6_1H 0xF7 // RC-OSC2 as RA6 +#define _OSC_INTIO67_1H 0xF8 // INTRC-OSC2 as RA6, OSC1 as RA7 +#define _OSC_INTIO7_1H 0xF9 // INTRC-OSC2 as Clock Out, OSC1 as RA7 +#define _FCMEN_OFF_1H 0xBF // Disabled +#define _FCMEN_ON_1H 0xFF // Enabled +#define _IESO_OFF_1H 0x7F // Disabled +#define _IESO_ON_1H 0xFF // Enabled + +// CONFIG2L Options +#define _PWRT_ON_2L 0xFE // Enabled +#define _PWRT_OFF_2L 0xFF // Disabled +#define _BOREN_OFF_2L 0xF9 // Disabled +#define _BOREN_ON_2L 0xFB // SBOREN Enabled +#define _BOREN_NOSLP_2L 0xFD // Enabled except SLEEP, SBOREN Disabled +#define _BOREN_SBORDIS_2L 0xFF // Enabled, SBOREN Disabled +#define _BORV_46_2L 0xE7 // 3.0V +#define _BORV_43_2L 0xEF // 2.7V +#define _BORV_28_2L 0xF7 // 2.2V +#define _BORV_21_2L 0xFF // 1.8 + +// CONFIG2H Options +#define _WDT_OFF_2H 0xFE // Disabled +#define _WDT_ON_2H 0xFF // Enabled +#define _WDTPS_1_2H 0xE1 // 1:1 +#define _WDTPS_2_2H 0xE3 // 1:2 +#define _WDTPS_4_2H 0xE5 // 1:4 +#define _WDTPS_8_2H 0xE7 // 1:8 +#define _WDTPS_16_2H 0xE9 // 1:16 +#define _WDTPS_32_2H 0xEB // 1:32 +#define _WDTPS_64_2H 0xED // 1:64 +#define _WDTPS_128_2H 0xEF // 1:128 +#define _WDTPS_256_2H 0xF1 // 1:256 +#define _WDTPS_512_2H 0xF3 // 1:512 +#define _WDTPS_1024_2H 0xF5 // 1:1024 +#define _WDTPS_2048_2H 0xF7 // 1:2048 +#define _WDTPS_4096_2H 0xF9 // 1:4096 +#define _WDTPS_8192_2H 0xFB // 1:8192 +#define _WDTPS_16384_2H 0xFD // 1:16384 +#define _WDTPS_32768_2H 0xFF // 1:32768 + +// CONFIG3H Options +#define _MCLRE_OFF_3H 0x7F // Disabled +#define _MCLRE_ON_3H 0xFF // Enabled +#define _LPT1OSC_OFF_3H 0xFB // Disabled +#define _LPT1OSC_ON_3H 0xFF // Enabled +#define _PBADEN_OFF_3H 0xFD // Port B<4:0> digital on RESET +#define _PBADEN_ON_3H 0xFF // Port B<4:0> analog on RESET +#define _CCP2MX_PORTBE_3H 0xFE // Muxed with RB3 +#define _CCP2MX_PORTC_3H 0xFF // Muxed with RC1 + +// CONFIG4L Options +#define _STVREN_OFF_4L 0xFE // Disabled +#define _STVREN_ON_4L 0xFF // Enabled +#define _LVP_OFF_4L 0xFB // Disabled +#define _LVP_ON_4L 0xFF // Enabled +#define _XINST_OFF_4L 0xBF // Disabled +#define _XINST_ON_4L 0xFF // Enabled +#define _DEBUG_ON_4L 0x7F // Enabled +#define _DEBUG_OFF_4L 0xFF // Disabled + +// CONFIG5L Options +#define _CP0_ON_5L 0xFE // Enabled +#define _CP0_OFF_5L 0xFF // Disabled +#define _CP1_ON_5L 0xFD // Enabled +#define _CP1_OFF_5L 0xFF // Disabled +#define _CP2_ON_5L 0xFB // Enabled +#define _CP2_OFF_5L 0xFF // Disabled +#define _CP3_ON_5L 0xF7 // Enabled +#define _CP3_OFF_5L 0xFF // Disabled + +// CONFIG5H Options +#define _CPB_ON_5H 0xBF // Enabled +#define _CPB_OFF_5H 0xFF // Disabled +#define _CPD_ON_5H 0x7F // Enabled +#define _CPD_OFF_5H 0xFF // Disabled + +// CONFIG6L Options +#define _WRT0_ON_6L 0xFE // Enabled +#define _WRT0_OFF_6L 0xFF // Disabled +#define _WRT1_ON_6L 0xFD // Enabled +#define _WRT1_OFF_6L 0xFF // Disabled +#define _WRT2_ON_6L 0xFB // Enabled +#define _WRT2_OFF_6L 0xFF // Disabled +#define _WRT3_ON_6L 0xF7 // Enabled +#define _WRT3_OFF_6L 0xFF // Disabled + +// CONFIG6H Options +#define _WRTB_ON_6H 0xBF // Enabled +#define _WRTB_OFF_6H 0xFF // Disabled +#define _WRTC_ON_6H 0xDF // Enabled +#define _WRTC_OFF_6H 0xFF // Disabled +#define _WRTD_ON_6H 0x7F // Enabled +#define _WRTD_OFF_6H 0xFF // Disabled + +// CONFIG7L Options +#define _EBTR0_ON_7L 0xFE // Enabled +#define _EBTR0_OFF_7L 0xFF // Disabled +#define _EBTR1_ON_7L 0xFD // Enabled +#define _EBTR1_OFF_7L 0xFF // Disabled +#define _EBTR2_ON_7L 0xFB // Enabled +#define _EBTR2_OFF_7L 0xFF // Disabled +#define _EBTR3_ON_7L 0xF7 // Enabled +#define _EBTR3_OFF_7L 0xFF // Disabled + +// CONFIG7H Options +#define _EBTRB_ON_7H 0xBF // Enabled +#define _EBTRB_OFF_7H 0xFF // Disabled +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF +#define _IDLOC0 0x200000 +#define _IDLOC1 0x200001 +#define _IDLOC2 0x200002 +#define _IDLOC3 0x200003 +#define _IDLOC4 0x200004 +#define _IDLOC5 0x200005 +#define _IDLOC6 0x200006 +#define _IDLOC7 0x200007 + +extern __sfr __at (0xF77) SSPMSK; + +extern __sfr __at (0xF78) SLRCON; +typedef union { + struct { + unsigned SLRA : 1; + unsigned SLRB : 1; + unsigned SLRC : 1; + unsigned SLRD : 1; + unsigned SLRE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SLRCONbits_t; +extern volatile __SLRCONbits_t __at (0xF78) SLRCONbits; + +extern __sfr __at (0xF79) CM12CON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned C2RSEL : 1; + unsigned C1RSEL : 1; + unsigned MC2OUT : 1; + unsigned MC1OUT : 1; + }; +} __CM12CONbits_t; +extern volatile __CM12CONbits_t __at (0xF79) CM12CONbits; + +extern __sfr __at (0xF7A) CM2CON; +typedef union { + struct { + unsigned C2CH0 : 1; + unsigned C2CH1 : 1; + unsigned C2R : 1; + unsigned C2SP : 1; + unsigned C2POL : 1; + unsigned C2OE : 1; + unsigned C2OUT : 1; + unsigned C2ON : 1; + }; +} __CM2CONbits_t; +extern volatile __CM2CONbits_t __at (0xF7A) CM2CONbits; + +extern __sfr __at (0xF7B) CM1CON; +typedef union { + struct { + unsigned C1CH0 : 1; + unsigned C1CH1 : 1; + unsigned C1R : 1; + unsigned C1SP : 1; + unsigned C1POL : 1; + unsigned C1OE : 1; + unsigned C1OUT : 1; + unsigned C1ON : 1; + }; +} __CM1CONbits_t; +extern volatile __CM1CONbits_t __at (0xF7B) CM1CONbits; + +extern __sfr __at (0xF7C) WPUB; +typedef union { + struct { + unsigned WPUB0 : 1; + unsigned WPUB1 : 1; + unsigned WPUB2 : 1; + unsigned WPUB3 : 1; + unsigned WPUB4 : 1; + unsigned WPUB5 : 1; + unsigned WPUB6 : 1; + unsigned WPUB7 : 1; + }; +} __WPUBbits_t; +extern volatile __WPUBbits_t __at (0xF7C) WPUBbits; + +extern __sfr __at (0xF7D) IOCB; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned IOCB4 : 1; + unsigned IOCB5 : 1; + unsigned IOCB6 : 1; + unsigned IOCB7 : 1; + }; +} __IOCBbits_t; +extern volatile __IOCBbits_t __at (0xF7D) IOCBbits; + +extern __sfr __at (0xF7E) ANSEL; +typedef union { + struct { + unsigned ANS0 : 1; + unsigned ANS1 : 1; + unsigned ANS2 : 1; + unsigned ANS3 : 1; + unsigned ANS4 : 1; + unsigned ANS5 : 1; + unsigned ANS6 : 1; + unsigned ANS7 : 1; + }; +} __ANSELbits_t; +extern volatile __ANSELbits_t __at (0xF7E) ANSELbits; + +extern __sfr __at (0xF7F) ANSELH; +typedef union { + struct { + unsigned ANS8 : 1; + unsigned ANS9 : 1; + unsigned ANS10 : 1; + unsigned ANS11 : 1; + unsigned ANS12 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ANSELHbits_t; +extern volatile __ANSELHbits_t __at (0xF7F) ANSELHbits; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned C1OUT : 1; + unsigned AN4 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned C12IN0M : 1; + unsigned C12IN1M : 1; + unsigned C2INP : 1; + unsigned C1INP : 1; + unsigned T0CKI : 1; + unsigned C2OUT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned C12IN0N : 1; + unsigned C12IN1N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned LVDIN : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned HLVDIN : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CCP2_PORTB : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN12 : 1; + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned AN9 : 1; + unsigned AN11 : 1; + unsigned PGM : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned : 1; + unsigned C12IN2M : 1; + unsigned : 1; + unsigned C12IN3M : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned C12IN2N : 1; + unsigned : 1; + unsigned C12IN3N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned CCP2_PORTC : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned T1CKI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned PSP0 : 1; + unsigned PSP1 : 1; + unsigned PSP2 : 1; + unsigned PSP3 : 1; + unsigned PSP4 : 1; + unsigned PSP5 : 1; + unsigned PSP6 : 1; + unsigned PSP7 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned P1B : 1; + unsigned P1C : 1; + unsigned P1D : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned CS : 1; + unsigned MCLR : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned NOT_RD : 1; + unsigned NOT_WR : 1; + unsigned NOT_CS : 1; + unsigned NOT_MCLR : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AN5 : 1; + unsigned AN6 : 1; + unsigned AN7 : 1; + unsigned VPP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned LATA6 : 1; + unsigned LATA7 : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned TRISA6 : 1; + unsigned TRISA7 : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned TUN5 : 1; + unsigned PLLEN : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PSPIE : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PSPIF : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PSPIP : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned EEIE : 1; + unsigned CM2IE : 1; + unsigned CM1IE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIE : 1; + unsigned : 1; + unsigned : 1; + unsigned C2IE : 1; + unsigned C1IE : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned EEIF : 1; + unsigned CM2IF : 1; + unsigned CM1IF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIF : 1; + unsigned : 1; + unsigned : 1; + unsigned C2IF : 1; + unsigned C1IF : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned EEIP : 1; + unsigned CM2IP : 1; + unsigned CM1IP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned HLVDIP : 1; + unsigned : 1; + unsigned : 1; + unsigned C2IP : 1; + unsigned C1IP : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned CFGS : 1; + unsigned EEPGD : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) EEDATA; + +extern __sfr __at (0xFA9) EEADR; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADDEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CVRCON2; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned FVRST : 1; + unsigned FVREN : 1; + }; +} __CVRCON2bits_t; +extern volatile __CVRCON2bits_t __at (0xFB4) CVRCON2bits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) PWM1CON; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __PWM1CONbits_t; +extern volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CKTXP : 1; + unsigned DTRXP : 1; + unsigned : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFB8) BAUDCTL; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CKTXP : 1; + unsigned DTRXP : 1; + unsigned : 1; + unsigned : 1; + }; +} __BAUDCTLbits_t; +extern volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +extern __sfr __at (0xFB9) PSTRCON; +typedef union { + struct { + unsigned STRA : 1; + unsigned STRB : 1; + unsigned STRC : 1; + unsigned STRD : 1; + unsigned STRSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PSTRCONbits_t; +extern volatile __PSTRCONbits_t __at (0xFB9) PSTRCONbits; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned GO : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R_W : 1; + unsigned : 1; + unsigned : 1; + unsigned D_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned SBOREN : 1; + unsigned IPEN : 1; + }; + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) HLVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __HLVDCONbits_t; +extern volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +extern __sfr __at (0xFD2) LVDCON; +typedef union { + struct { + unsigned LVDL0 : 1; + unsigned LVDL1 : 1; + unsigned LVDL2 : 1; + unsigned LVDL3 : 1; + unsigned LVDEN : 1; + unsigned IRVST : 1; + unsigned : 1; + unsigned VDIRMAG : 1; + }; + struct { + unsigned LVV0 : 1; + unsigned LVV1 : 1; + unsigned LVV2 : 1; + unsigned LVV3 : 1; + unsigned HLVDEN : 1; + unsigned BGST : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned HLVDL0 : 1; + unsigned HLVDL1 : 1; + unsigned HLVDL2 : 1; + unsigned HLVDL3 : 1; + unsigned : 1; + unsigned IVRST : 1; + unsigned : 1; + unsigned : 1; + }; +} __LVDCONbits_t; +extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD4) DEBUG; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0F : 1; + unsigned TMR0IF : 1; + unsigned RBIE : 1; + unsigned INT0E : 1; + unsigned TMR0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0IF : 1; + unsigned T0IF : 1; + unsigned : 1; + unsigned INT0IE : 1; + unsigned T0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f6520.h b/device/include/pic16/pic18f6520.h new file mode 100644 index 0000000..366a60f --- /dev/null +++ b/device/include/pic16/pic18f6520.h @@ -0,0 +1,1407 @@ + +/* + * pic18f6520.h - PIC18F6520 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f6520.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F6520_H__ +#define __PIC18F6520_H__ + +extern __sfr __at (0xf6b) RCSTA2; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTA2bits_t; + +extern volatile __RCSTA2bits_t __at (0xf6b) RCSTA2bits; + +extern __sfr __at (0xf6c) TXSTA2; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTA2bits_t; + +extern volatile __TXSTA2bits_t __at (0xf6c) TXSTA2bits; + +extern __sfr __at (0xf6d) TXREG2; +extern __sfr __at (0xf6e) RCREG2; +extern __sfr __at (0xf6f) SPBRG2; +extern __sfr __at (0xf70) CCP5CON; +typedef union { + struct { + unsigned CCP5M0:1; + unsigned CCP5M1:1; + unsigned CCP5M2:1; + unsigned CCP5M3:1; + unsigned DCCP5Y:1; + unsigned DCCP5X:1; + unsigned :1; + unsigned :1; + }; +} __CCP5CONbits_t; + +extern volatile __CCP5CONbits_t __at (0xf70) CCP5CONbits; + +extern __sfr __at (0xf71) CCPR5L; +extern __sfr __at (0xf72) CCPR5H; +extern __sfr __at (0xf73) CCP4CON; +typedef union { + struct { + unsigned CCP4M0:1; + unsigned CCP4M1:1; + unsigned CCP4M2:1; + unsigned CCP4M3:1; + unsigned DCCP4Y:1; + unsigned DCCP4X:1; + unsigned :1; + unsigned :1; + }; +} __CCP4CONbits_t; + +extern volatile __CCP4CONbits_t __at (0xf73) CCP4CONbits; + +extern __sfr __at (0xf74) CCPR4L; +extern __sfr __at (0xf75) CCPR4H; +extern __sfr __at (0xf76) T4CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T4CONbits_t; + +extern volatile __T4CONbits_t __at (0xf76) T4CONbits; + +extern __sfr __at (0xf77) PR4; +extern __sfr __at (0xf78) TMR4; +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned :1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned INT3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf83) PORTD; +typedef union { + struct { + unsigned RD0:1; + unsigned RD1:1; + unsigned RD2:1; + unsigned RD3:1; + unsigned RD4:1; + unsigned RD5:1; + unsigned RD6:1; + unsigned RD7:1; + }; + + struct { + unsigned AD0:1; + unsigned AD1:1; + unsigned AD2:1; + unsigned AD3:1; + unsigned AD4:1; + unsigned AD5:1; + unsigned AD6:1; + unsigned AD7:1; + }; +} __PORTDbits_t; + +extern volatile __PORTDbits_t __at (0xf83) PORTDbits; + +extern __sfr __at (0xf84) PORTE; +typedef union { + struct { + unsigned RE0:1; + unsigned RE1:1; + unsigned RE2:1; + unsigned RE3:1; + unsigned RE4:1; + unsigned RE5:1; + unsigned RE6:1; + unsigned RE7:1; + }; + + struct { + unsigned ALE:1; + unsigned OE:1; + unsigned WRL:1; + unsigned WRH:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned CCP2:1; + }; + + struct { + unsigned AN5:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTEbits_t; + +extern volatile __PORTEbits_t __at (0xf84) PORTEbits; + +extern __sfr __at (0xf85) PORTF; +typedef union { + struct { + unsigned RF0:1; + unsigned RF1:1; + unsigned RF2:1; + unsigned RF3:1; + unsigned RF4:1; + unsigned RF5:1; + unsigned RF6:1; + unsigned RF7:1; + }; +} __PORTFbits_t; + +extern volatile __PORTFbits_t __at (0xf85) PORTFbits; + +extern __sfr __at (0xf86) PORTG; +typedef union { + struct { + unsigned RG0:1; + unsigned RG1:1; + unsigned RG2:1; + unsigned RG3:1; + unsigned RG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTGbits_t; + +extern volatile __PORTGbits_t __at (0xf86) PORTGbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf8c) LATD; +typedef union { + struct { + unsigned LATD0:1; + unsigned LATD1:1; + unsigned LATD2:1; + unsigned LATD3:1; + unsigned LATD4:1; + unsigned LATD5:1; + unsigned LATD6:1; + unsigned LATD7:1; + }; +} __LATDbits_t; + +extern volatile __LATDbits_t __at (0xf8c) LATDbits; + +extern __sfr __at (0xf8d) LATE; +typedef union { + struct { + unsigned LATE0:1; + unsigned LATE1:1; + unsigned LATE2:1; + unsigned LATE3:1; + unsigned LATE4:1; + unsigned LATE5:1; + unsigned LATE6:1; + unsigned LATE7:1; + }; +} __LATEbits_t; + +extern volatile __LATEbits_t __at (0xf8d) LATEbits; + +extern __sfr __at (0xf8e) LATF; +typedef union { + struct { + unsigned LATF0:1; + unsigned LATF1:1; + unsigned LATF2:1; + unsigned LATF3:1; + unsigned LATF4:1; + unsigned LATF5:1; + unsigned LATF6:1; + unsigned LATF7:1; + }; +} __LATFbits_t; + +extern volatile __LATFbits_t __at (0xf8e) LATFbits; + +extern __sfr __at (0xf8f) LATG; +typedef union { + struct { + unsigned LATG0:1; + unsigned LATG1:1; + unsigned LATG2:1; + unsigned LATG3:1; + unsigned LATG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __LATGbits_t; + +extern volatile __LATGbits_t __at (0xf8f) LATGbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf95) TRISD; +typedef union { + struct { + unsigned TRISD0:1; + unsigned TRISD1:1; + unsigned TRISD2:1; + unsigned TRISD3:1; + unsigned TRISD4:1; + unsigned TRISD5:1; + unsigned TRISD6:1; + unsigned TRISD7:1; + }; +} __TRISDbits_t; + +extern volatile __TRISDbits_t __at (0xf95) TRISDbits; + +extern __sfr __at (0xf96) TRISE; +typedef union { + struct { + unsigned TRISE0:1; + unsigned TRISE1:1; + unsigned TRISE2:1; + unsigned TRISE3:1; + unsigned TRISE4:1; + unsigned TRISE5:1; + unsigned TRISE6:1; + unsigned TRISE7:1; + }; +} __TRISEbits_t; + +extern volatile __TRISEbits_t __at (0xf96) TRISEbits; + +extern __sfr __at (0xf97) TRISF; +typedef union { + struct { + unsigned TRISF0:1; + unsigned TRISF1:1; + unsigned TRISF2:1; + unsigned TRISF3:1; + unsigned TRISF4:1; + unsigned TRISF5:1; + unsigned TRISF6:1; + unsigned TRISF7:1; + }; +} __TRISFbits_t; + +extern volatile __TRISFbits_t __at (0xf97) TRISFbits; + +extern __sfr __at (0xf98) TRISG; +typedef union { + struct { + unsigned TRISG0:1; + unsigned TRISG1:1; + unsigned TRISG2:1; + unsigned TRISG3:1; + unsigned TRISG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __TRISGbits_t; + +extern volatile __TRISGbits_t __at (0xf98) TRISGbits; + +extern __sfr __at (0xf9c) MEMCON; +typedef union { + struct { + unsigned WM0:1; + unsigned WM1:1; + unsigned :1; + unsigned :1; + unsigned WAIT0:1; + unsigned WAIT1:1; + unsigned :1; + unsigned EBDIS:1; + }; +} __MEMCONbits_t; + +extern volatile __MEMCONbits_t __at (0xf9c) MEMCONbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned CMIE:1; + unsigned :1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned CMIF:1; + unsigned :1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned CMIP:1; + unsigned :1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa3) PIE3; +typedef union { + struct { + unsigned CCP3IE:1; + unsigned CCP4IE:1; + unsigned CCP5IE:1; + unsigned TMR4IE:1; + unsigned TX2IE:1; + unsigned RC2IE:1; + unsigned :1; + unsigned :1; + }; +} __PIE3bits_t; + +extern volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +extern __sfr __at (0xfa4) PIR3; +typedef union { + struct { + unsigned CCP3IF:1; + unsigned CCP4IF:1; + unsigned CCP5IF:1; + unsigned TMR4IF:1; + unsigned TX2IF:1; + unsigned RC2IF:1; + unsigned :1; + unsigned :1; + }; +} __PIR3bits_t; + +extern volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +extern __sfr __at (0xfa5) IPR3; +typedef union { + struct { + unsigned CCP3IP:1; + unsigned CCP4IP:1; + unsigned CCP5IP:1; + unsigned TMR4IP:1; + unsigned TX2IP:1; + unsigned RC2IP:1; + unsigned :1; + unsigned :1; + }; +} __IPR3bits_t; + +extern volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfaa) EEADRH; +extern __sfr __at (0xfab) RCSTA1; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTA1bits_t; + +extern volatile __RCSTA1bits_t __at (0xfab) RCSTA1bits; + +extern __sfr __at (0xfac) TXSTA1; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTA1bits_t; + +extern volatile __TXSTA1bits_t __at (0xfac) TXSTA1bits; + +extern __sfr __at (0xfad) TXREG1; +extern __sfr __at (0xfae) RCREG1; +extern __sfr __at (0xfaf) SPBRG1; + +/* for compatibility reasons */ +extern __sfr __at (0xfab) RCSTA; +extern volatile __RCSTA1bits_t __at (0xfab) RCSTAbits; +extern __sfr __at (0xfac) TXSTA; +extern volatile __TXSTA1bits_t __at (0xfac) TXSTAbits; +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; + +extern __sfr __at (0xfb0) PSPCON; +typedef union { + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned PSPMODE:1; + unsigned IBOV:1; + unsigned OBF:1; + unsigned IBF:1; + }; +} __PSPCONbits_t; + +extern volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfb4) CMCON; +typedef union { + struct { + unsigned CM0:1; + unsigned CM1:1; + unsigned CM2:1; + unsigned CIS:1; + unsigned C1INV:1; + unsigned C2INV:1; + unsigned C1OUT:1; + unsigned C2OUT:1; + }; +} __CMCONbits_t; + +extern volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +extern __sfr __at (0xfb5) CVRCON; +typedef union { + struct { + unsigned CVR0:1; + unsigned CVR1:1; + unsigned CVR2:1; + unsigned CVR3:1; + unsigned CVREF:1; + unsigned CVRR:1; + unsigned CVROE:1; + unsigned CVREN:1; + }; +} __CVRCONbits_t; + +extern volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +extern __sfr __at (0xfb7) CCP3CON; +typedef union { + struct { + unsigned CCP3M0:1; + unsigned CCP3M1:1; + unsigned CCP3M2:1; + unsigned CCP3M3:1; + unsigned DCCP3Y:1; + unsigned DCCP3X:1; + unsigned :1; + unsigned :1; + }; +} __CCP3CONbits_t; + +extern volatile __CCP3CONbits_t __at (0xfb7) CCP3CONbits; + +extern __sfr __at (0xfb8) CCPR3L; +extern __sfr __at (0xfb9) CCPR3H; +extern __sfr __at (0xfba) CCP2CON; +typedef union { + struct { + unsigned CCP2M0:1; + unsigned CCP2M1:1; + unsigned CCP2M2:1; + unsigned CCP2M3:1; + unsigned DCCP2Y:1; + unsigned DCCP2X:1; + unsigned :1; + unsigned :1; + }; +} __CCP2CONbits_t; + +extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +extern __sfr __at (0xfbb) CCPR2L; +extern __sfr __at (0xfbc) CCPR2H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DCCP1Y:1; + unsigned DCCP1X:1; + unsigned :1; + unsigned :1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc0) ADCON2; +typedef union { + struct { + unsigned ADCS0:1; + unsigned ADCS1:1; + unsigned ADCS2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned ADFM:1; + }; +} __ADCON2bits_t; + +extern volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned VCFG0:1; + unsigned VCFG1:1; + unsigned :1; + unsigned :1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned CHS3:1; + unsigned :1; + unsigned :1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned INT2F:1; + unsigned INT3F:1; + unsigned INT1E:1; + unsigned INT2E:1; + unsigned INT3E:1; + unsigned INT1P:1; + unsigned INT2P:1; + }; + + struct { + unsigned INT1IF:1; + unsigned INT2IF:1; + unsigned INT3IF:1; + unsigned INT1IE:1; + unsigned INT2IE:1; + unsigned INT3IE:1; + unsigned INT1IP:1; + unsigned INT2IP:1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned INT3P:1; + unsigned T0IP:1; + unsigned INTEDG3:1; + unsigned INTEDG2:1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */ +#define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */ +#define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */ +#define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */ +#define _OSC_RC_1H 0xFB /* RC */ +#define _OSC_HS_1H 0xFA /* HS */ +#define _OSC_XT_1H 0xF9 /* XT */ +#define _OSC_LP_1H 0xF8 /* LP */ + +/* Osc. Switch Enable 1H options */ +#define _OSCS_OFF_1H 0xFF /* Disabled */ +#define _OSCS_ON_1H 0xDF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_5V_2L 0xFF /* 2.5V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_OFF_2H 0xFE /* Disabled */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_128_2H 0xFF /* 1:128 */ +#define _WDTPS_1_64_2H 0xFD /* 1:64 */ +#define _WDTPS_1_32_2H 0xFB /* 1:32 */ +#define _WDTPS_1_16_2H 0xF9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xF7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xF5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xF3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xF1 /* 1:1 */ + +/* CCP2 Mux 3H options */ +#define _CCP2MUX_RC1_3H 0xFF /* RC1 */ +#define _CCP2MUX_RE7_3H 0xFE /* RE7 */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Code Protect 00800-01FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 02000-03FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Code Protect 04000-05FFF 5L options */ +#define _CP_2_OFF_5L 0xFF /* Disabled */ +#define _CP_2_ON_5L 0xFB /* Enabled */ + +/* Code Protect 06000-07FFF 5L options */ +#define _CP_3_OFF_5L 0xFF /* Disabled */ +#define _CP_3_ON_5L 0xF7 /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00800-01FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 02000-03FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Table Write Protect 04000-05FFF 6L options */ +#define _WRT_2_OFF_6L 0xFF /* Disabled */ +#define _WRT_2_ON_6L 0xFB /* Enabled */ + +/* Table Write Protect 06000-07FFF 6L options */ +#define _WRT_3_OFF_6L 0xFF /* Disabled */ +#define _WRT_3_ON_6L 0xF7 /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00800-01FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 02000-03FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect 04000-05FFF 7L options */ +#define _EBTR_2_OFF_7L 0xFF /* Disabled */ +#define _EBTR_2_ON_7L 0xFB /* Enabled */ + +/* Table Read Protect 06000-07FFF 7L options */ +#define _EBTR_3_OFF_7L 0xFF /* Disabled */ +#define _EBTR_3_ON_7L 0xF7 /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f6585.h b/device/include/pic16/pic18f6585.h new file mode 100644 index 0000000..8cf91c4 --- /dev/null +++ b/device/include/pic16/pic18f6585.h @@ -0,0 +1,6 @@ +/* + * pic18f6585.h - Device Library Header + */ + +#include "pic18f8680.h" + diff --git a/device/include/pic16/pic18f65j50.h b/device/include/pic16/pic18f65j50.h new file mode 100644 index 0000000..8d37791 --- /dev/null +++ b/device/include/pic16/pic18f65j50.h @@ -0,0 +1,26 @@ +/* + * pic18f65j50.h - device specific declarations + */ + +#ifndef __PIC18F65J50_H__ +#define __PIC18F65J50_H__ 1 + +#include "pic18f67j50.h" + +// Configuration Bits +#undef __CONFIG1L +#undef __CONFIG1H +#undef __CONFIG2L +#undef __CONFIG2H +#undef __CONFIG3L +#undef __CONFIG3H + +#define __CONFIG1L 0x7FF8 +#define __CONFIG1H 0x7FF9 +#define __CONFIG2L 0x7FFA +#define __CONFIG2H 0x7FFB +#define __CONFIG3L 0x7FFC +#define __CONFIG3H 0x7FFD + +#endif + diff --git a/device/include/pic16/pic18f6620.h b/device/include/pic16/pic18f6620.h new file mode 100644 index 0000000..df0f73e --- /dev/null +++ b/device/include/pic16/pic18f6620.h @@ -0,0 +1,1391 @@ + +/* + * pic18f6620.h - PIC18F6620 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f6620.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F6620_H__ +#define __PIC18F6620_H__ + +extern __sfr __at (0xf6b) RCSTA2; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTA2bits_t; + +extern volatile __RCSTA2bits_t __at (0xf6b) RCSTA2bits; + +extern __sfr __at (0xf6c) TXSTA2; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTA2bits_t; + +extern volatile __TXSTA2bits_t __at (0xf6c) TXSTA2bits; + +extern __sfr __at (0xf6d) TXREG2; +extern __sfr __at (0xf6e) RCREG2; +extern __sfr __at (0xf6f) SPBRG2; +extern __sfr __at (0xf70) CCP5CON; +typedef union { + struct { + unsigned CCP5M0:1; + unsigned CCP5M1:1; + unsigned CCP5M2:1; + unsigned CCP5M3:1; + unsigned DCCP5Y:1; + unsigned DCCP5X:1; + unsigned :1; + unsigned :1; + }; +} __CCP5CONbits_t; + +extern volatile __CCP5CONbits_t __at (0xf70) CCP5CONbits; + +extern __sfr __at (0xf71) CCPR5L; +extern __sfr __at (0xf72) CCPR5H; +extern __sfr __at (0xf73) CCP4CON; +typedef union { + struct { + unsigned CCP4M0:1; + unsigned CCP4M1:1; + unsigned CCP4M2:1; + unsigned CCP4M3:1; + unsigned DCCP4Y:1; + unsigned DCCP4X:1; + unsigned :1; + unsigned :1; + }; +} __CCP4CONbits_t; + +extern volatile __CCP4CONbits_t __at (0xf73) CCP4CONbits; + +extern __sfr __at (0xf74) CCPR4L; +extern __sfr __at (0xf75) CCPR4H; +extern __sfr __at (0xf76) T4CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T4CONbits_t; + +extern volatile __T4CONbits_t __at (0xf76) T4CONbits; + +extern __sfr __at (0xf77) PR4; +extern __sfr __at (0xf78) TMR4; +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned :1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned INT3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf83) PORTD; +typedef union { + struct { + unsigned RD0:1; + unsigned RD1:1; + unsigned RD2:1; + unsigned RD3:1; + unsigned RD4:1; + unsigned RD5:1; + unsigned RD6:1; + unsigned RD7:1; + }; + + struct { + unsigned AD0:1; + unsigned AD1:1; + unsigned AD2:1; + unsigned AD3:1; + unsigned AD4:1; + unsigned AD5:1; + unsigned AD6:1; + unsigned AD7:1; + }; +} __PORTDbits_t; + +extern volatile __PORTDbits_t __at (0xf83) PORTDbits; + +extern __sfr __at (0xf84) PORTE; +typedef union { + struct { + unsigned RE0:1; + unsigned RE1:1; + unsigned RE2:1; + unsigned RE3:1; + unsigned RE4:1; + unsigned RE5:1; + unsigned RE6:1; + unsigned RE7:1; + }; + + struct { + unsigned ALE:1; + unsigned OE:1; + unsigned WRL:1; + unsigned WRH:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned CCP2:1; + }; + + struct { + unsigned AN5:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTEbits_t; + +extern volatile __PORTEbits_t __at (0xf84) PORTEbits; + +extern __sfr __at (0xf85) PORTF; +typedef union { + struct { + unsigned RF0:1; + unsigned RF1:1; + unsigned RF2:1; + unsigned RF3:1; + unsigned RF4:1; + unsigned RF5:1; + unsigned RF6:1; + unsigned RF7:1; + }; +} __PORTFbits_t; + +extern volatile __PORTFbits_t __at (0xf85) PORTFbits; + +extern __sfr __at (0xf86) PORTG; +typedef union { + struct { + unsigned RG0:1; + unsigned RG1:1; + unsigned RG2:1; + unsigned RG3:1; + unsigned RG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTGbits_t; + +extern volatile __PORTGbits_t __at (0xf86) PORTGbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf8c) LATD; +typedef union { + struct { + unsigned LATD0:1; + unsigned LATD1:1; + unsigned LATD2:1; + unsigned LATD3:1; + unsigned LATD4:1; + unsigned LATD5:1; + unsigned LATD6:1; + unsigned LATD7:1; + }; +} __LATDbits_t; + +extern volatile __LATDbits_t __at (0xf8c) LATDbits; + +extern __sfr __at (0xf8d) LATE; +typedef union { + struct { + unsigned LATE0:1; + unsigned LATE1:1; + unsigned LATE2:1; + unsigned LATE3:1; + unsigned LATE4:1; + unsigned LATE5:1; + unsigned LATE6:1; + unsigned LATE7:1; + }; +} __LATEbits_t; + +extern volatile __LATEbits_t __at (0xf8d) LATEbits; + +extern __sfr __at (0xf8e) LATF; +typedef union { + struct { + unsigned LATF0:1; + unsigned LATF1:1; + unsigned LATF2:1; + unsigned LATF3:1; + unsigned LATF4:1; + unsigned LATF5:1; + unsigned LATF6:1; + unsigned LATF7:1; + }; +} __LATFbits_t; + +extern volatile __LATFbits_t __at (0xf8e) LATFbits; + +extern __sfr __at (0xf8f) LATG; +typedef union { + struct { + unsigned LATG0:1; + unsigned LATG1:1; + unsigned LATG2:1; + unsigned LATG3:1; + unsigned LATG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __LATGbits_t; + +extern volatile __LATGbits_t __at (0xf8f) LATGbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf95) TRISD; +typedef union { + struct { + unsigned TRISD0:1; + unsigned TRISD1:1; + unsigned TRISD2:1; + unsigned TRISD3:1; + unsigned TRISD4:1; + unsigned TRISD5:1; + unsigned TRISD6:1; + unsigned TRISD7:1; + }; +} __TRISDbits_t; + +extern volatile __TRISDbits_t __at (0xf95) TRISDbits; + +extern __sfr __at (0xf96) TRISE; +typedef union { + struct { + unsigned TRISE0:1; + unsigned TRISE1:1; + unsigned TRISE2:1; + unsigned TRISE3:1; + unsigned TRISE4:1; + unsigned TRISE5:1; + unsigned TRISE6:1; + unsigned TRISE7:1; + }; +} __TRISEbits_t; + +extern volatile __TRISEbits_t __at (0xf96) TRISEbits; + +extern __sfr __at (0xf97) TRISF; +typedef union { + struct { + unsigned TRISF0:1; + unsigned TRISF1:1; + unsigned TRISF2:1; + unsigned TRISF3:1; + unsigned TRISF4:1; + unsigned TRISF5:1; + unsigned TRISF6:1; + unsigned TRISF7:1; + }; +} __TRISFbits_t; + +extern volatile __TRISFbits_t __at (0xf97) TRISFbits; + +extern __sfr __at (0xf98) TRISG; +typedef union { + struct { + unsigned TRISG0:1; + unsigned TRISG1:1; + unsigned TRISG2:1; + unsigned TRISG3:1; + unsigned TRISG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __TRISGbits_t; + +extern volatile __TRISGbits_t __at (0xf98) TRISGbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned CMIE:1; + unsigned :1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned CMIF:1; + unsigned :1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned CMIP:1; + unsigned :1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa3) PIE3; +typedef union { + struct { + unsigned CCP3IE:1; + unsigned CCP4IE:1; + unsigned CCP5IE:1; + unsigned TMR4IE:1; + unsigned TX2IE:1; + unsigned RC2IE:1; + unsigned :1; + unsigned :1; + }; +} __PIE3bits_t; + +extern volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +extern __sfr __at (0xfa4) PIR3; +typedef union { + struct { + unsigned CCP3IF:1; + unsigned CCP4IF:1; + unsigned CCP5IF:1; + unsigned TMR4IF:1; + unsigned TX2IF:1; + unsigned RC2IF:1; + unsigned :1; + unsigned :1; + }; +} __PIR3bits_t; + +extern volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +extern __sfr __at (0xfa5) IPR3; +typedef union { + struct { + unsigned CCP3IP:1; + unsigned CCP4IP:1; + unsigned CCP5IP:1; + unsigned TMR4IP:1; + unsigned TX2IP:1; + unsigned RC2IP:1; + unsigned :1; + unsigned :1; + }; +} __IPR3bits_t; + +extern volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfaa) EEADRH; +extern __sfr __at (0xfab) RCSTA1; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTA1bits_t; + +extern volatile __RCSTA1bits_t __at (0xfab) RCSTA1bits; + +extern __sfr __at (0xfac) TXSTA1; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTA1bits_t; + +extern volatile __TXSTA1bits_t __at (0xfac) TXSTA1bits; + +extern __sfr __at (0xfad) TXREG1; +extern __sfr __at (0xfae) RCREG1; +extern __sfr __at (0xfaf) SPBRG1; + +/* for compatibility reasons */ +extern __sfr __at (0xfab) RCSTA; +extern volatile __RCSTA1bits_t __at (0xfab) RCSTAbits; +extern __sfr __at (0xfac) TXSTA; +extern volatile __TXSTA1bits_t __at (0xfac) TXSTAbits; +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; + +extern __sfr __at (0xfb0) PSPCON; +typedef union { + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned PSPMODE:1; + unsigned IBOV:1; + unsigned OBF:1; + unsigned IBF:1; + }; +} __PSPCONbits_t; + +extern volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfb4) CMCON; +typedef union { + struct { + unsigned CM0:1; + unsigned CM1:1; + unsigned CM2:1; + unsigned CIS:1; + unsigned C1INV:1; + unsigned C2INV:1; + unsigned C1OUT:1; + unsigned C2OUT:1; + }; +} __CMCONbits_t; + +extern volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +extern __sfr __at (0xfb5) CVRCON; +typedef union { + struct { + unsigned CVR0:1; + unsigned CVR1:1; + unsigned CVR2:1; + unsigned CVR3:1; + unsigned CVREF:1; + unsigned CVRR:1; + unsigned CVROE:1; + unsigned CVREN:1; + }; +} __CVRCONbits_t; + +extern volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +extern __sfr __at (0xfb7) CCP3CON; +typedef union { + struct { + unsigned CCP3M0:1; + unsigned CCP3M1:1; + unsigned CCP3M2:1; + unsigned CCP3M3:1; + unsigned DCCP3Y:1; + unsigned DCCP3X:1; + unsigned :1; + unsigned :1; + }; +} __CCP3CONbits_t; + +extern volatile __CCP3CONbits_t __at (0xfb7) CCP3CONbits; + +extern __sfr __at (0xfb8) CCPR3L; +extern __sfr __at (0xfb9) CCPR3H; +extern __sfr __at (0xfba) CCP2CON; +typedef union { + struct { + unsigned CCP2M0:1; + unsigned CCP2M1:1; + unsigned CCP2M2:1; + unsigned CCP2M3:1; + unsigned DCCP2Y:1; + unsigned DCCP2X:1; + unsigned :1; + unsigned :1; + }; +} __CCP2CONbits_t; + +extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +extern __sfr __at (0xfbb) CCPR2L; +extern __sfr __at (0xfbc) CCPR2H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DCCP1Y:1; + unsigned DCCP1X:1; + unsigned :1; + unsigned :1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc0) ADCON2; +typedef union { + struct { + unsigned ADCS0:1; + unsigned ADCS1:1; + unsigned ADCS2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned ADFM:1; + }; +} __ADCON2bits_t; + +extern volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned VCFG0:1; + unsigned VCFG1:1; + unsigned :1; + unsigned :1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned CHS3:1; + unsigned :1; + unsigned :1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned INT2F:1; + unsigned INT3F:1; + unsigned INT1E:1; + unsigned INT2E:1; + unsigned INT3E:1; + unsigned INT1P:1; + unsigned INT2P:1; + }; + + struct { + unsigned INT1IF:1; + unsigned INT2IF:1; + unsigned INT3IF:1; + unsigned INT1IE:1; + unsigned INT2IE:1; + unsigned INT3IE:1; + unsigned INT1IP:1; + unsigned INT2IP:1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned INT3P:1; + unsigned T0IP:1; + unsigned INTEDG3:1; + unsigned INTEDG2:1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */ +#define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */ +#define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */ +#define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */ +#define _OSC_RC_1H 0xFB /* RC */ +#define _OSC_HS_1H 0xFA /* HS */ +#define _OSC_XT_1H 0xF9 /* XT */ +#define _OSC_LP_1H 0xF8 /* LP */ + +/* Osc. Switch Enable 1H options */ +#define _OSCS_OFF_1H 0xFF /* Disabled */ +#define _OSCS_ON_1H 0xDF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_5V_2L 0xFF /* 2.5V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_OFF_2H 0xFE /* Disabled */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_128_2H 0xFF /* 1:128 */ +#define _WDTPS_1_64_2H 0xFD /* 1:64 */ +#define _WDTPS_1_32_2H 0xFB /* 1:32 */ +#define _WDTPS_1_16_2H 0xF9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xF7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xF5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xF3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xF1 /* 1:1 */ + +/* CCP2 Mux 3H options */ +#define _CCP2MUX_RC1_3H 0xFF /* RC1 */ +#define _CCP2MUX_RE7_3H 0xFE /* RE7 */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Code Protect 00200-03FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 04000-07FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Code Protect 08000-0BFFF 5L options */ +#define _CP_2_OFF_5L 0xFF /* Disabled */ +#define _CP_2_ON_5L 0xFB /* Enabled */ + +/* Code Protect 0C000-0FFFF 5L options */ +#define _CP_3_OFF_5L 0xFF /* Disabled */ +#define _CP_3_ON_5L 0xF7 /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00200-03FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 04000-07FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Table Write Protect 08000-0BFFF 6L options */ +#define _WRT_2_OFF_6L 0xFF /* Disabled */ +#define _WRT_2_ON_6L 0xFB /* Enabled */ + +/* Table Write Protect 0C000-0FFFF 6L options */ +#define _WRT_3_OFF_6L 0xFF /* Disabled */ +#define _WRT_3_ON_6L 0xF7 /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00200-03FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 04000-07FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect 08000-0BFFF 7L options */ +#define _EBTR_2_OFF_7L 0xFF /* Disabled */ +#define _EBTR_2_ON_7L 0xFB /* Enabled */ + +/* Table Read Protect 0C000-0FFFF 7L options */ +#define _EBTR_3_OFF_7L 0xFF /* Disabled */ +#define _EBTR_3_ON_7L 0xF7 /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f6680.h b/device/include/pic16/pic18f6680.h new file mode 100644 index 0000000..0848b1a --- /dev/null +++ b/device/include/pic16/pic18f6680.h @@ -0,0 +1,6 @@ +/* + * pic18f6680.h - Device Library Header + */ + +#include "pic18f8680.h" + diff --git a/device/include/pic16/pic18f66j50.h b/device/include/pic16/pic18f66j50.h new file mode 100644 index 0000000..43b71d2 --- /dev/null +++ b/device/include/pic16/pic18f66j50.h @@ -0,0 +1,26 @@ +/* + * pic18f66j50.h - device specific declarations + */ + +#ifndef __PIC18F66J50_H__ +#define __PIC18F66J50_H__ 1 + +#include "pic18f67j50.h" + +#undef __CONFIG1L +#undef __CONFIG1H +#undef __CONFIG2L +#undef __CONFIG2H +#undef __CONFIG3L +#undef __CONFIG3H + +// Configuration Bits +#define __CONFIG1L 0xFFF8 +#define __CONFIG1H 0xFFF9 +#define __CONFIG2L 0xFFFA +#define __CONFIG2H 0xFFFB +#define __CONFIG3L 0xFFFC +#define __CONFIG3H 0xFFFD + +#endif + diff --git a/device/include/pic16/pic18f66j55.h b/device/include/pic16/pic18f66j55.h new file mode 100644 index 0000000..feab09a --- /dev/null +++ b/device/include/pic16/pic18f66j55.h @@ -0,0 +1,26 @@ +/* + * pic18f66j55.h - device specific declarations + */ + +#ifndef __PIC18F66J55_H__ +#define __PIC18F66J55_H__ 1 + +#include "pic18f67j50.h" + +#undef __CONFIG1L +#undef __CONFIG1H +#undef __CONFIG2L +#undef __CONFIG2H +#undef __CONFIG3L +#undef __CONFIG3H + +// Configuration Bits +#define __CONFIG1L 0x17FF8 +#define __CONFIG1H 0x17FF9 +#define __CONFIG2L 0x17FFA +#define __CONFIG2H 0x17FFB +#define __CONFIG3L 0x17FFC +#define __CONFIG3H 0x17FFD + +#endif + diff --git a/device/include/pic16/pic18f66j60.h b/device/include/pic16/pic18f66j60.h new file mode 100644 index 0000000..c265252 --- /dev/null +++ b/device/include/pic16/pic18f66j60.h @@ -0,0 +1,2696 @@ +/* + * pic18f66j60.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F66J60_H__ +#define __PIC18F66J60_H__ 1 + +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF + +extern __sfr __at (0xE80) MAADR5; + +extern __sfr __at (0xE81) MAADR6; + +extern __sfr __at (0xE82) MAADR3; + +extern __sfr __at (0xE83) MAADR4; + +extern __sfr __at (0xE84) MAADR1; + +extern __sfr __at (0xE85) MAADR2; + +extern __sfr __at (0xE86) EBSTSD; + +extern __sfr __at (0xE87) EBSTCON; +typedef union { + struct { + unsigned BISTST : 1; + unsigned TME : 1; + unsigned TMSEL0 : 1; + unsigned TMSEL1 : 1; + unsigned : 1; + unsigned PSV0 : 1; + unsigned PSV1 : 1; + unsigned PSV2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned TMSEL : 1; + unsigned : 1; + unsigned : 1; + unsigned PSV : 1; + unsigned : 1; + unsigned : 1; + }; +} __EBSTCONbits_t; +extern volatile __EBSTCONbits_t __at (0xE87) EBSTCONbits; + +extern __sfr __at (0xE88) EBSTCS; + +extern __sfr __at (0xE88) EBSTCSL; + +extern __sfr __at (0xE89) EBSTCSH; + +extern __sfr __at (0xE8A) MISTAT; +typedef union { + struct { + unsigned BUSY : 1; + unsigned SCAN : 1; + unsigned NVALID : 1; + unsigned LINKFL : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __MISTATbits_t; +extern volatile __MISTATbits_t __at (0xE8A) MISTATbits; + +extern __sfr __at (0xE97) EFLOCON; +typedef union { + struct { + unsigned FCEN0 : 1; + unsigned FCEN1 : 1; + unsigned FULDPXS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __EFLOCONbits_t; +extern volatile __EFLOCONbits_t __at (0xE97) EFLOCONbits; + +extern __sfr __at (0xE98) EPAUS; + +extern __sfr __at (0xE98) EPAUSL; + +extern __sfr __at (0xE99) EPAUSH; + +extern __sfr __at (0xEA0) MACON1; +typedef union { + struct { + unsigned MARXEN : 1; + unsigned PASSALL : 1; + unsigned RXPAUS : 1; + unsigned TXPAUS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __MACON1bits_t; +extern volatile __MACON1bits_t __at (0xEA0) MACON1bits; + +extern __sfr __at (0xEA1) MACON2; +typedef union { + struct { + unsigned TFUNRST : 1; + unsigned MATXRST : 1; + unsigned RFUNRST : 1; + unsigned MARXRST : 1; + unsigned : 1; + unsigned : 1; + unsigned RNDRST : 1; + unsigned MARST : 1; + }; +} __MACON2bits_t; +extern volatile __MACON2bits_t __at (0xEA1) MACON2bits; + +extern __sfr __at (0xEA2) MACON3; +typedef union { + struct { + unsigned FULDPX : 1; + unsigned FRMLNEN : 1; + unsigned HFRMEN : 1; + unsigned PHDRLEN : 1; + unsigned TXCRCEN : 1; + unsigned PADCFG0 : 1; + unsigned PADCFG1 : 1; + unsigned PADCFG2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PADCFG : 1; + unsigned : 1; + unsigned : 1; + }; +} __MACON3bits_t; +extern volatile __MACON3bits_t __at (0xEA2) MACON3bits; + +extern __sfr __at (0xEA3) MACON4; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOBKOFF : 1; + unsigned BPEN : 1; + unsigned DEFER : 1; + unsigned : 1; + }; +} __MACON4bits_t; +extern volatile __MACON4bits_t __at (0xEA3) MACON4bits; + +extern __sfr __at (0xEA4) MABBIPG; + +extern __sfr __at (0xEA6) MAIPG; + +extern __sfr __at (0xEA6) MAIPGL; + +extern __sfr __at (0xEA7) MAIPGH; + +extern __sfr __at (0xEA8) MACLCON1; +typedef union { + struct { + unsigned RETMAX : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __MACLCON1bits_t; +extern volatile __MACLCON1bits_t __at (0xEA8) MACLCON1bits; + +extern __sfr __at (0xEA9) MACLCON2; +typedef union { + struct { + unsigned COLWIN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __MACLCON2bits_t; +extern volatile __MACLCON2bits_t __at (0xEA9) MACLCON2bits; + +extern __sfr __at (0xEAA) MAMXFL; + +extern __sfr __at (0xEAA) MAMXFLL; + +extern __sfr __at (0xEAB) MAMXFLH; + +extern __sfr __at (0xEB1) MICON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RSTMII : 1; + }; +} __MICONbits_t; +extern volatile __MICONbits_t __at (0xEB1) MICONbits; + +extern __sfr __at (0xEB2) MICMD; +typedef union { + struct { + unsigned MIIRD : 1; + unsigned MIISCAN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __MICMDbits_t; +extern volatile __MICMDbits_t __at (0xEB2) MICMDbits; + +extern __sfr __at (0xEB4) MIREGADR; + +extern __sfr __at (0xEB6) MIWR; + +extern __sfr __at (0xEB6) MIWRL; + +extern __sfr __at (0xEB7) MIWRH; + +extern __sfr __at (0xEB8) MIRD; + +extern __sfr __at (0xEB8) MIRDL; + +extern __sfr __at (0xEB9) MIRDH; + +extern __sfr __at (0xEC0) EHT0; + +extern __sfr __at (0xEC1) EHT1; + +extern __sfr __at (0xEC2) EHT2; + +extern __sfr __at (0xEC3) EHT3; + +extern __sfr __at (0xEC4) EHT4; + +extern __sfr __at (0xEC5) EHT5; + +extern __sfr __at (0xEC6) EHT6; + +extern __sfr __at (0xEC7) EHT7; + +extern __sfr __at (0xEC8) EPMM0; + +extern __sfr __at (0xEC9) EPMM1; + +extern __sfr __at (0xECA) EPMM2; + +extern __sfr __at (0xECB) EPMM3; + +extern __sfr __at (0xECC) EPMM4; + +extern __sfr __at (0xECD) EPMM5; + +extern __sfr __at (0xECE) EPMM6; + +extern __sfr __at (0xECF) EPMM7; + +extern __sfr __at (0xED0) EPMCS; + +extern __sfr __at (0xED0) EPMCSL; + +extern __sfr __at (0xED1) EPMCSH; + +extern __sfr __at (0xED4) EPMO; + +extern __sfr __at (0xED4) EPMOL; + +extern __sfr __at (0xED5) EPMOH; + +extern __sfr __at (0xED6) EWOLIE; +typedef union { + struct { + unsigned BCWOLIE : 1; + unsigned MCWOLIE : 1; + unsigned HTWOLIE : 1; + unsigned MPWOLIE : 1; + unsigned PMWOLIE : 1; + unsigned : 1; + unsigned AWOLIE : 1; + unsigned UCWOLIE : 1; + }; +} __EWOLIEbits_t; +extern volatile __EWOLIEbits_t __at (0xED6) EWOLIEbits; + +extern __sfr __at (0xED7) EWOLIR; +typedef union { + struct { + unsigned BCWOLIF : 1; + unsigned MCWOLIF : 1; + unsigned HTWOLIF : 1; + unsigned MPWOLIF : 1; + unsigned PMWOLIF : 1; + unsigned : 1; + unsigned AWOLIF : 1; + unsigned UCWOLIF : 1; + }; +} __EWOLIRbits_t; +extern volatile __EWOLIRbits_t __at (0xED7) EWOLIRbits; + +extern __sfr __at (0xED8) ERXFCON; +typedef union { + struct { + unsigned BCEN : 1; + unsigned MCEN : 1; + unsigned HTEN : 1; + unsigned MPEN : 1; + unsigned PMEN : 1; + unsigned CRCEN : 1; + unsigned ANDOR : 1; + unsigned UCEN : 1; + }; +} __ERXFCONbits_t; +extern volatile __ERXFCONbits_t __at (0xED8) ERXFCONbits; + +extern __sfr __at (0xED9) EPKTCNT; + +extern __sfr __at (0xEE2) EWRPT; + +extern __sfr __at (0xEE2) EWRPTL; + +extern __sfr __at (0xEE3) EWRPTH; + +extern __sfr __at (0xEE4) ETXST; + +extern __sfr __at (0xEE4) ETXSTL; + +extern __sfr __at (0xEE5) ETXSTH; + +extern __sfr __at (0xEE6) ETXND; + +extern __sfr __at (0xEE6) ETXNDL; + +extern __sfr __at (0xEE7) ETXNDH; + +extern __sfr __at (0xEE8) ERXST; + +extern __sfr __at (0xEE8) ERXSTL; + +extern __sfr __at (0xEE9) ERXSTH; + +extern __sfr __at (0xEEA) ERXND; + +extern __sfr __at (0xEEA) ERXNDL; + +extern __sfr __at (0xEEB) ERXNDH; + +extern __sfr __at (0xEEC) ERXRDPT; + +extern __sfr __at (0xEEC) ERXRDPTL; + +extern __sfr __at (0xEED) ERXRDPTH; + +extern __sfr __at (0xEEE) ERXWRPT; + +extern __sfr __at (0xEEE) ERXWRPTL; + +extern __sfr __at (0xEEF) ERXWRPTH; + +extern __sfr __at (0xEF0) EDMAST; + +extern __sfr __at (0xEF0) EDMASTL; + +extern __sfr __at (0xEF1) EDMASTH; + +extern __sfr __at (0xEF2) EDMAND; + +extern __sfr __at (0xEF2) EDMANDL; + +extern __sfr __at (0xEF3) EDMANDH; + +extern __sfr __at (0xEF4) EDMADST; + +extern __sfr __at (0xEF4) EDMADSTL; + +extern __sfr __at (0xEF5) EDMADSTH; + +extern __sfr __at (0xEF6) EDMACS; + +extern __sfr __at (0xEF6) EDMACSL; + +extern __sfr __at (0xEF7) EDMACSH; + +extern __sfr __at (0xEFB) EIE; +typedef union { + struct { + unsigned RXERIE : 1; + unsigned TXERIE : 1; + unsigned : 1; + unsigned TXIE_EIE : 1; + unsigned LINKIE : 1; + unsigned DMAIE : 1; + unsigned PKTIE : 1; + unsigned : 1; + }; +} __EIEbits_t; +extern volatile __EIEbits_t __at (0xEFB) EIEbits; + +extern __sfr __at (0xEFD) ESTAT; +typedef union { + struct { + unsigned PHYRDY : 1; + unsigned TXABRT : 1; + unsigned RXBUSY : 1; + unsigned : 1; + unsigned LATECOL : 1; + unsigned : 1; + unsigned BUFER : 1; + unsigned : 1; + }; +} __ESTATbits_t; +extern volatile __ESTATbits_t __at (0xEFD) ESTATbits; + +extern __sfr __at (0xEFE) ECON2; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ETHEN : 1; + unsigned PKTDEC : 1; + unsigned AUTOINC : 1; + }; +} __ECON2bits_t; +extern volatile __ECON2bits_t __at (0xEFE) ECON2bits; + +extern __sfr __at (0xF60) EIR; +typedef union { + struct { + unsigned RXERIF : 1; + unsigned TXERIF : 1; + unsigned : 1; + unsigned TXIF_EIR : 1; + unsigned LINKIF : 1; + unsigned DMAIF : 1; + unsigned PKTIF : 1; + unsigned : 1; + }; +} __EIRbits_t; +extern volatile __EIRbits_t __at (0xF60) EIRbits; + +extern __sfr __at (0xF61) EDATA; +typedef union { + struct { + unsigned EDATA0 : 1; + unsigned EDATA1 : 1; + unsigned EDATA2 : 1; + unsigned EDATA3 : 1; + unsigned EDATA4 : 1; + unsigned EDATA5 : 1; + unsigned EDATA6 : 1; + unsigned EDATA7 : 1; + }; +} __EDATAbits_t; +extern volatile __EDATAbits_t __at (0xF61) EDATAbits; + +extern __sfr __at (0xF67) ECCP2DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; + struct { + unsigned P2DC0 : 1; + unsigned P2DC1 : 1; + unsigned P2DC2 : 1; + unsigned P2DC3 : 1; + unsigned P2DC4 : 1; + unsigned P2DC5 : 1; + unsigned P2DC6 : 1; + unsigned P2RSEN : 1; + }; +} __ECCP2DELbits_t; +extern volatile __ECCP2DELbits_t __at (0xF67) ECCP2DELbits; + +extern __sfr __at (0xF68) ECCP2AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; + struct { + unsigned PSS2BD0 : 1; + unsigned PSS2BD1 : 1; + unsigned PSS2AC0 : 1; + unsigned PSS2AC1 : 1; + unsigned ECCP2AS0 : 1; + unsigned ECCP2AS1 : 1; + unsigned ECCP2AS2 : 1; + unsigned ECCP2ASE : 1; + }; +} __ECCP2ASbits_t; +extern volatile __ECCP2ASbits_t __at (0xF68) ECCP2ASbits; + +extern __sfr __at (0xF69) ECCP3DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; + struct { + unsigned P3DC0 : 1; + unsigned P3DC1 : 1; + unsigned P3DC2 : 1; + unsigned P3DC3 : 1; + unsigned P3DC4 : 1; + unsigned P3DC5 : 1; + unsigned P3DC6 : 1; + unsigned P3RSEN : 1; + }; +} __ECCP3DELbits_t; +extern volatile __ECCP3DELbits_t __at (0xF69) ECCP3DELbits; + +extern __sfr __at (0xF6A) ECCP3AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; + struct { + unsigned PSS3BD0 : 1; + unsigned PSS3BD1 : 1; + unsigned PSS3AC0 : 1; + unsigned PSS3AC1 : 1; + unsigned ECCP3AS0 : 1; + unsigned ECCP3AS1 : 1; + unsigned ECCP3AS2 : 1; + unsigned ECCP3ASE : 1; + }; +} __ECCP3ASbits_t; +extern volatile __ECCP3ASbits_t __at (0xF6A) ECCP3ASbits; + +extern __sfr __at (0xF70) CCP5CON; +typedef union { + struct { + unsigned CCP5M0 : 1; + unsigned CCP5M1 : 1; + unsigned CCP5M2 : 1; + unsigned CCP5M3 : 1; + unsigned CCP5Y : 1; + unsigned CCP5X : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DC5B0 : 1; + unsigned DC5B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP5CONbits_t; +extern volatile __CCP5CONbits_t __at (0xF70) CCP5CONbits; + +extern __sfr __at (0xF71) CCPR5; + +extern __sfr __at (0xF71) CCPR5L; + +extern __sfr __at (0xF72) CCPR5H; + +extern __sfr __at (0xF73) CCP4CON; +typedef union { + struct { + unsigned CCP4M0 : 1; + unsigned CCP4M1 : 1; + unsigned CCP4M2 : 1; + unsigned CCP4M3 : 1; + unsigned CCP4Y : 1; + unsigned CCP4X : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DC4B0 : 1; + unsigned DC4B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP4CONbits_t; +extern volatile __CCP4CONbits_t __at (0xF73) CCP4CONbits; + +extern __sfr __at (0xF74) CCPR4; + +extern __sfr __at (0xF74) CCPR4L; + +extern __sfr __at (0xF75) CCPR4H; + +extern __sfr __at (0xF76) T4CON; +typedef union { + struct { + unsigned T4CKPS0 : 1; + unsigned T4CKPS1 : 1; + unsigned TMR4ON : 1; + unsigned T4OUTPS0 : 1; + unsigned T4OUTPS1 : 1; + unsigned T4OUTPS2 : 1; + unsigned T4OUTPS3 : 1; + unsigned : 1; + }; +} __T4CONbits_t; +extern volatile __T4CONbits_t __at (0xF76) T4CONbits; + +extern __sfr __at (0xF77) PR4; + +extern __sfr __at (0xF78) TMR4; + +extern __sfr __at (0xF79) ECCP1DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; + struct { + unsigned P1DC0 : 1; + unsigned P1DC1 : 1; + unsigned P1DC2 : 1; + unsigned P1DC3 : 1; + unsigned P1DC4 : 1; + unsigned P1DC5 : 1; + unsigned P1DC6 : 1; + unsigned P1RSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xF79) ECCP1DELbits; + +extern __sfr __at (0xF7A) ERDPT; + +extern __sfr __at (0xF7A) ERDPTL; + +extern __sfr __at (0xF7B) ERDPTH; + +extern __sfr __at (0xF7E) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xF7E) BAUDCONbits; + +extern __sfr __at (0xF7E) BAUDCON1; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCON1bits_t; +extern volatile __BAUDCON1bits_t __at (0xF7E) BAUDCON1bits; + +extern __sfr __at (0xF7E) BAUDCTL; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCTLbits_t; +extern volatile __BAUDCTLbits_t __at (0xF7E) BAUDCTLbits; + +extern __sfr __at (0xF7E) BAUDCTL1; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCTL1bits_t; +extern volatile __BAUDCTL1bits_t __at (0xF7E) BAUDCTL1bits; + +extern __sfr __at (0xF7F) SPBRGH; + +extern __sfr __at (0xF7F) SPBRGH1; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned LEDA : 1; + unsigned LEDB : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned INT3 : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned CCP2 : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned SDO1 : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SCK1 : 1; + unsigned SDI1 : 1; + unsigned : 1; + unsigned TX1 : 1; + unsigned RX1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SCL1 : 1; + unsigned SDA1 : 1; + unsigned : 1; + unsigned CK1 : 1; + unsigned DT1 : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned CCP3 : 1; + unsigned CCP4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned RE4 : 1; + unsigned RE5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF85) PORTF; +typedef union { + struct { + unsigned : 1; + unsigned RF1 : 1; + unsigned RF2 : 1; + unsigned RF3 : 1; + unsigned RF4 : 1; + unsigned RF5 : 1; + unsigned RF6 : 1; + unsigned RF7 : 1; + }; + struct { + unsigned : 1; + unsigned AN6 : 1; + unsigned AN7 : 1; + unsigned AN8 : 1; + unsigned AN9 : 1; + unsigned AN10 : 1; + unsigned AN11 : 1; + unsigned SS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CVREF : 1; + unsigned : 1; + unsigned NOT_SS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SS1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS1 : 1; + }; +} __PORTFbits_t; +extern volatile __PORTFbits_t __at (0xF85) PORTFbits; + +extern __sfr __at (0xF86) PORTG; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RG4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP5 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTGbits_t; +extern volatile __PORTGbits_t __at (0xF86) PORTGbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned REPU : 1; + unsigned RDPU : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned LATE3 : 1; + unsigned LATE4 : 1; + unsigned LATE5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF8E) LATF; +typedef union { + struct { + unsigned : 1; + unsigned LATF1 : 1; + unsigned LATF2 : 1; + unsigned LATF3 : 1; + unsigned LATF4 : 1; + unsigned LATF5 : 1; + unsigned LATF6 : 1; + unsigned LATF7 : 1; + }; +} __LATFbits_t; +extern volatile __LATFbits_t __at (0xF8E) LATFbits; + +extern __sfr __at (0xF8F) LATG; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned LATG4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATGbits_t; +extern volatile __LATGbits_t __at (0xF8F) LATGbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned RE4 : 1; + unsigned RE5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned TRISE3 : 1; + unsigned TRISE4 : 1; + unsigned TRISE5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF97) DDRF; +typedef union { + struct { + unsigned : 1; + unsigned RF1 : 1; + unsigned RF2 : 1; + unsigned RF3 : 1; + unsigned RF4 : 1; + unsigned RF5 : 1; + unsigned RF6 : 1; + unsigned RF7 : 1; + }; +} __DDRFbits_t; +extern volatile __DDRFbits_t __at (0xF97) DDRFbits; + +extern __sfr __at (0xF97) TRISF; +typedef union { + struct { + unsigned : 1; + unsigned TRISF1 : 1; + unsigned TRISF2 : 1; + unsigned TRISF3 : 1; + unsigned TRISF4 : 1; + unsigned TRISF5 : 1; + unsigned TRISF6 : 1; + unsigned TRISF7 : 1; + }; +} __TRISFbits_t; +extern volatile __TRISFbits_t __at (0xF97) TRISFbits; + +extern __sfr __at (0xF98) DDRG; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RG4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDRGbits_t; +extern volatile __DDRGbits_t __at (0xF98) DDRGbits; + +extern __sfr __at (0xF98) TRISG; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TRISG4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISGbits_t; +extern volatile __TRISGbits_t __at (0xF98) TRISGbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PPRE : 1; + unsigned PPST0 : 1; + unsigned PLLEN : 1; + unsigned PPST1 : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE_PIE1 : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IE : 1; + unsigned TX1IE : 1; + unsigned RC1IE : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF_PIR1 : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IF : 1; + unsigned TX1IF : 1; + unsigned RC1IF : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IP : 1; + unsigned TX1IP : 1; + unsigned RC1IP : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned TMR3IE : 1; + unsigned : 1; + unsigned BCLIE : 1; + unsigned ETHWIE : 1; + unsigned ETHIE : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned TMR3IF : 1; + unsigned : 1; + unsigned BCLIF : 1; + unsigned ETHWIF : 1; + unsigned ETHIF : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned TMR3IP : 1; + unsigned : 1; + unsigned BCLIP : 1; + unsigned ETHWIP : 1; + unsigned ETHIP : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned CCP3IE : 1; + unsigned CCP4IE : 1; + unsigned CCP5IE : 1; + unsigned TMR4IE : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL2IE : 1; + unsigned : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned CCP3IF : 1; + unsigned CCP4IF : 1; + unsigned CCP5IF : 1; + unsigned TMR4IF : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL2IF : 1; + unsigned : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned CCP3IP : 1; + unsigned CCP4IP : 1; + unsigned CCP5IP : 1; + unsigned TMR4IP : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL2IP : 1; + unsigned : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAB) RCSTA1; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTA1bits_t; +extern volatile __RCSTA1bits_t __at (0xFAB) RCSTA1bits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAC) TXSTA1; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTA1bits_t; +extern volatile __TXSTA1bits_t __at (0xFAC) TXSTA1bits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAD) TXREG1; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAE) RCREG1; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFAF) SPBRG1; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T3INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT : 1; + unsigned C2OUT : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; + struct { + unsigned PSS1BD0 : 1; + unsigned PSS1BD1 : 1; + unsigned PSS1AC0 : 1; + unsigned PSS1AC1 : 1; + unsigned ECCP1AS0 : 1; + unsigned ECCP1AS1 : 1; + unsigned ECCP1AS2 : 1; + unsigned ECCP1ASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) CCP3CON; +typedef union { + struct { + unsigned CCP3M0 : 1; + unsigned CCP3M1 : 1; + unsigned CCP3M2 : 1; + unsigned CCP3M3 : 1; + unsigned DC3B0 : 1; + unsigned DC3B1 : 1; + unsigned P3M0 : 1; + unsigned P3M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP3Y : 1; + unsigned CCP3X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP3CONbits_t; +extern volatile __CCP3CONbits_t __at (0xFB7) CCP3CONbits; + +extern __sfr __at (0xFB7) ECCP3CON; +typedef union { + struct { + unsigned CCP3M0 : 1; + unsigned CCP3M1 : 1; + unsigned CCP3M2 : 1; + unsigned CCP3M3 : 1; + unsigned DC3B0 : 1; + unsigned DC3B1 : 1; + unsigned P3M0 : 1; + unsigned P3M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP3Y : 1; + unsigned CCP3X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP3CONbits_t; +extern volatile __ECCP3CONbits_t __at (0xFB7) ECCP3CONbits; + +extern __sfr __at (0xFB8) CCPR3; + +extern __sfr __at (0xFB8) CCPR3L; + +extern __sfr __at (0xFB9) CCPR3H; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned P2M0 : 1; + unsigned P2M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBA) ECCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned P2M0 : 1; + unsigned P2M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP2CONbits_t; +extern volatile __ECCP2CONbits_t __at (0xFBA) ECCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBD) ECCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP1CONbits_t; +extern volatile __ECCP1CONbits_t __at (0xFBD) ECCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned ADCAL : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSP1CON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP1CON2bits_t; +extern volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSP1CON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSP1CON1bits_t; +extern volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSP1STAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP1STATbits_t; +extern volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSP1ADD; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSP1BUF; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) ECON1; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned RXEN : 1; + unsigned TXRTS : 1; + unsigned CSUMEN : 1; + unsigned DMAST : 1; + unsigned RXRST : 1; + unsigned TXRST : 1; + }; +} __ECON1bits_t; +extern volatile __ECON1bits_t __at (0xFD2) ECON1bits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned : 1; + unsigned OSTS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned INT3F : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned INT3E : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned INT3IF : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned INT3IE : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned INT3IP : 1; + unsigned T0IP : 1; + unsigned INTEDG3 : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned RBIE : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f66j65.h b/device/include/pic16/pic18f66j65.h new file mode 100644 index 0000000..a33a12a --- /dev/null +++ b/device/include/pic16/pic18f66j65.h @@ -0,0 +1,6 @@ +/* + * pic18f66j65.h - PIC18F66J65 Device Library Header + */ + +#include "pic18f66j60.h" + diff --git a/device/include/pic16/pic18f6720.h b/device/include/pic16/pic18f6720.h new file mode 100644 index 0000000..d0fa4e3 --- /dev/null +++ b/device/include/pic16/pic18f6720.h @@ -0,0 +1,1439 @@ + +/* + * pic18f6720.h - PIC18F6720 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f6720.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F6720_H__ +#define __PIC18F6720_H__ + +extern __sfr __at (0xf6b) RCSTA2; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTA2bits_t; + +extern volatile __RCSTA2bits_t __at (0xf6b) RCSTA2bits; + +extern __sfr __at (0xf6c) TXSTA2; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTA2bits_t; + +extern volatile __TXSTA2bits_t __at (0xf6c) TXSTA2bits; + +extern __sfr __at (0xf6d) TXREG2; +extern __sfr __at (0xf6e) RCREG2; +extern __sfr __at (0xf6f) SPBRG2; +extern __sfr __at (0xf70) CCP5CON; +typedef union { + struct { + unsigned CCP5M0:1; + unsigned CCP5M1:1; + unsigned CCP5M2:1; + unsigned CCP5M3:1; + unsigned DCCP5Y:1; + unsigned DCCP5X:1; + unsigned :1; + unsigned :1; + }; +} __CCP5CONbits_t; + +extern volatile __CCP5CONbits_t __at (0xf70) CCP5CONbits; + +extern __sfr __at (0xf71) CCPR5L; +extern __sfr __at (0xf72) CCPR5H; +extern __sfr __at (0xf73) CCP4CON; +typedef union { + struct { + unsigned CCP4M0:1; + unsigned CCP4M1:1; + unsigned CCP4M2:1; + unsigned CCP4M3:1; + unsigned DCCP4Y:1; + unsigned DCCP4X:1; + unsigned :1; + unsigned :1; + }; +} __CCP4CONbits_t; + +extern volatile __CCP4CONbits_t __at (0xf73) CCP4CONbits; + +extern __sfr __at (0xf74) CCPR4L; +extern __sfr __at (0xf75) CCPR4H; +extern __sfr __at (0xf76) T4CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T4CONbits_t; + +extern volatile __T4CONbits_t __at (0xf76) T4CONbits; + +extern __sfr __at (0xf77) PR4; +extern __sfr __at (0xf78) TMR4; +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned :1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned INT3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf83) PORTD; +typedef union { + struct { + unsigned RD0:1; + unsigned RD1:1; + unsigned RD2:1; + unsigned RD3:1; + unsigned RD4:1; + unsigned RD5:1; + unsigned RD6:1; + unsigned RD7:1; + }; + + struct { + unsigned AD0:1; + unsigned AD1:1; + unsigned AD2:1; + unsigned AD3:1; + unsigned AD4:1; + unsigned AD5:1; + unsigned AD6:1; + unsigned AD7:1; + }; +} __PORTDbits_t; + +extern volatile __PORTDbits_t __at (0xf83) PORTDbits; + +extern __sfr __at (0xf84) PORTE; +typedef union { + struct { + unsigned RE0:1; + unsigned RE1:1; + unsigned RE2:1; + unsigned RE3:1; + unsigned RE4:1; + unsigned RE5:1; + unsigned RE6:1; + unsigned RE7:1; + }; + + struct { + unsigned ALE:1; + unsigned OE:1; + unsigned WRL:1; + unsigned WRH:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned CCP2:1; + }; + + struct { + unsigned AN5:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTEbits_t; + +extern volatile __PORTEbits_t __at (0xf84) PORTEbits; + +extern __sfr __at (0xf85) PORTF; +typedef union { + struct { + unsigned RF0:1; + unsigned RF1:1; + unsigned RF2:1; + unsigned RF3:1; + unsigned RF4:1; + unsigned RF5:1; + unsigned RF6:1; + unsigned RF7:1; + }; +} __PORTFbits_t; + +extern volatile __PORTFbits_t __at (0xf85) PORTFbits; + +extern __sfr __at (0xf86) PORTG; +typedef union { + struct { + unsigned RG0:1; + unsigned RG1:1; + unsigned RG2:1; + unsigned RG3:1; + unsigned RG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTGbits_t; + +extern volatile __PORTGbits_t __at (0xf86) PORTGbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf8c) LATD; +typedef union { + struct { + unsigned LATD0:1; + unsigned LATD1:1; + unsigned LATD2:1; + unsigned LATD3:1; + unsigned LATD4:1; + unsigned LATD5:1; + unsigned LATD6:1; + unsigned LATD7:1; + }; +} __LATDbits_t; + +extern volatile __LATDbits_t __at (0xf8c) LATDbits; + +extern __sfr __at (0xf8d) LATE; +typedef union { + struct { + unsigned LATE0:1; + unsigned LATE1:1; + unsigned LATE2:1; + unsigned LATE3:1; + unsigned LATE4:1; + unsigned LATE5:1; + unsigned LATE6:1; + unsigned LATE7:1; + }; +} __LATEbits_t; + +extern volatile __LATEbits_t __at (0xf8d) LATEbits; + +extern __sfr __at (0xf8e) LATF; +typedef union { + struct { + unsigned LATF0:1; + unsigned LATF1:1; + unsigned LATF2:1; + unsigned LATF3:1; + unsigned LATF4:1; + unsigned LATF5:1; + unsigned LATF6:1; + unsigned LATF7:1; + }; +} __LATFbits_t; + +extern volatile __LATFbits_t __at (0xf8e) LATFbits; + +extern __sfr __at (0xf8f) LATG; +typedef union { + struct { + unsigned LATG0:1; + unsigned LATG1:1; + unsigned LATG2:1; + unsigned LATG3:1; + unsigned LATG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __LATGbits_t; + +extern volatile __LATGbits_t __at (0xf8f) LATGbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf95) TRISD; +typedef union { + struct { + unsigned TRISD0:1; + unsigned TRISD1:1; + unsigned TRISD2:1; + unsigned TRISD3:1; + unsigned TRISD4:1; + unsigned TRISD5:1; + unsigned TRISD6:1; + unsigned TRISD7:1; + }; +} __TRISDbits_t; + +extern volatile __TRISDbits_t __at (0xf95) TRISDbits; + +extern __sfr __at (0xf96) TRISE; +typedef union { + struct { + unsigned TRISE0:1; + unsigned TRISE1:1; + unsigned TRISE2:1; + unsigned TRISE3:1; + unsigned TRISE4:1; + unsigned TRISE5:1; + unsigned TRISE6:1; + unsigned TRISE7:1; + }; +} __TRISEbits_t; + +extern volatile __TRISEbits_t __at (0xf96) TRISEbits; + +extern __sfr __at (0xf97) TRISF; +typedef union { + struct { + unsigned TRISF0:1; + unsigned TRISF1:1; + unsigned TRISF2:1; + unsigned TRISF3:1; + unsigned TRISF4:1; + unsigned TRISF5:1; + unsigned TRISF6:1; + unsigned TRISF7:1; + }; +} __TRISFbits_t; + +extern volatile __TRISFbits_t __at (0xf97) TRISFbits; + +extern __sfr __at (0xf98) TRISG; +typedef union { + struct { + unsigned TRISG0:1; + unsigned TRISG1:1; + unsigned TRISG2:1; + unsigned TRISG3:1; + unsigned TRISG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __TRISGbits_t; + +extern volatile __TRISGbits_t __at (0xf98) TRISGbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned CMIE:1; + unsigned :1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned CMIF:1; + unsigned :1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned CMIP:1; + unsigned :1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa3) PIE3; +typedef union { + struct { + unsigned CCP3IE:1; + unsigned CCP4IE:1; + unsigned CCP5IE:1; + unsigned TMR4IE:1; + unsigned TX2IE:1; + unsigned RC2IE:1; + unsigned :1; + unsigned :1; + }; +} __PIE3bits_t; + +extern volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +extern __sfr __at (0xfa4) PIR3; +typedef union { + struct { + unsigned CCP3IF:1; + unsigned CCP4IF:1; + unsigned CCP5IF:1; + unsigned TMR4IF:1; + unsigned TX2IF:1; + unsigned RC2IF:1; + unsigned :1; + unsigned :1; + }; +} __PIR3bits_t; + +extern volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +extern __sfr __at (0xfa5) IPR3; +typedef union { + struct { + unsigned CCP3IP:1; + unsigned CCP4IP:1; + unsigned CCP5IP:1; + unsigned TMR4IP:1; + unsigned TX2IP:1; + unsigned RC2IP:1; + unsigned :1; + unsigned :1; + }; +} __IPR3bits_t; + +extern volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfaa) EEADRH; +extern __sfr __at (0xfab) RCSTA1; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTA1bits_t; + +extern volatile __RCSTA1bits_t __at (0xfab) RCSTA1bits; + +extern __sfr __at (0xfac) TXSTA1; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTA1bits_t; + +extern volatile __TXSTA1bits_t __at (0xfac) TXSTA1bits; + +extern __sfr __at (0xfad) TXREG1; +extern __sfr __at (0xfae) RCREG1; +extern __sfr __at (0xfaf) SPBRG1; + +/* for compatibility reasons */ +extern __sfr __at (0xfab) RCSTA; +extern volatile __RCSTA1bits_t __at (0xfab) RCSTAbits; +extern __sfr __at (0xfac) TXSTA; +extern volatile __TXSTA1bits_t __at (0xfac) TXSTAbits; +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; + +extern __sfr __at (0xfb0) PSPCON; +typedef union { + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned PSPMODE:1; + unsigned IBOV:1; + unsigned OBF:1; + unsigned IBF:1; + }; +} __PSPCONbits_t; + +extern volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfb4) CMCON; +typedef union { + struct { + unsigned CM0:1; + unsigned CM1:1; + unsigned CM2:1; + unsigned CIS:1; + unsigned C1INV:1; + unsigned C2INV:1; + unsigned C1OUT:1; + unsigned C2OUT:1; + }; +} __CMCONbits_t; + +extern volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +extern __sfr __at (0xfb5) CVRCON; +typedef union { + struct { + unsigned CVR0:1; + unsigned CVR1:1; + unsigned CVR2:1; + unsigned CVR3:1; + unsigned CVREF:1; + unsigned CVRR:1; + unsigned CVROE:1; + unsigned CVREN:1; + }; +} __CVRCONbits_t; + +extern volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +extern __sfr __at (0xfb7) CCP3CON; +typedef union { + struct { + unsigned CCP3M0:1; + unsigned CCP3M1:1; + unsigned CCP3M2:1; + unsigned CCP3M3:1; + unsigned DCCP3Y:1; + unsigned DCCP3X:1; + unsigned :1; + unsigned :1; + }; +} __CCP3CONbits_t; + +extern volatile __CCP3CONbits_t __at (0xfb7) CCP3CONbits; + +extern __sfr __at (0xfb8) CCPR3L; +extern __sfr __at (0xfb9) CCPR3H; +extern __sfr __at (0xfba) CCP2CON; +typedef union { + struct { + unsigned CCP2M0:1; + unsigned CCP2M1:1; + unsigned CCP2M2:1; + unsigned CCP2M3:1; + unsigned DCCP2Y:1; + unsigned DCCP2X:1; + unsigned :1; + unsigned :1; + }; +} __CCP2CONbits_t; + +extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +extern __sfr __at (0xfbb) CCPR2L; +extern __sfr __at (0xfbc) CCPR2H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DCCP1Y:1; + unsigned DCCP1X:1; + unsigned :1; + unsigned :1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc0) ADCON2; +typedef union { + struct { + unsigned ADCS0:1; + unsigned ADCS1:1; + unsigned ADCS2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned ADFM:1; + }; +} __ADCON2bits_t; + +extern volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned VCFG0:1; + unsigned VCFG1:1; + unsigned :1; + unsigned :1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned CHS3:1; + unsigned :1; + unsigned :1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned INT2F:1; + unsigned INT3F:1; + unsigned INT1E:1; + unsigned INT2E:1; + unsigned INT3E:1; + unsigned INT1P:1; + unsigned INT2P:1; + }; + + struct { + unsigned INT1IF:1; + unsigned INT2IF:1; + unsigned INT3IF:1; + unsigned INT1IE:1; + unsigned INT2IE:1; + unsigned INT3IE:1; + unsigned INT1IP:1; + unsigned INT2IP:1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned INT3P:1; + unsigned T0IP:1; + unsigned INTEDG3:1; + unsigned INTEDG2:1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */ +#define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */ +#define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */ +#define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */ +#define _OSC_RC_1H 0xFB /* RC */ +#define _OSC_HS_1H 0xFA /* HS */ +#define _OSC_XT_1H 0xF9 /* XT */ +#define _OSC_LP_1H 0xF8 /* LP */ + +/* Osc. Switch Enable 1H options */ +#define _OSCS_OFF_1H 0xFF /* Disabled */ +#define _OSCS_ON_1H 0xDF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_5V_2L 0xFF /* 2.5V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_OFF_2H 0xFE /* Disabled */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_128_2H 0xFF /* 1:128 */ +#define _WDTPS_1_64_2H 0xFD /* 1:64 */ +#define _WDTPS_1_32_2H 0xFB /* 1:32 */ +#define _WDTPS_1_16_2H 0xF9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xF7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xF5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xF3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xF1 /* 1:1 */ + +/* CCP2 Mux 3H options */ +#define _CCP2MUX_RC1_3H 0xFF /* RC1 */ +#define _CCP2MUX_RE7_3H 0xFE /* RE7 */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Code Protect 00200-03FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 04000-07FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Code Protect 08000-0BFFF 5L options */ +#define _CP_2_OFF_5L 0xFF /* Disabled */ +#define _CP_2_ON_5L 0xFB /* Enabled */ + +/* Code Protect 0C000-0FFFF 5L options */ +#define _CP_3_OFF_5L 0xFF /* Disabled */ +#define _CP_3_ON_5L 0xF7 /* Enabled */ + +/* Code Protect 10000-13FFF 5L options */ +#define _CP_4_OFF_5L 0xFF /* Disabled */ +#define _CP_4_ON_5L 0xEF /* Enabled */ + +/* Code Protect 14000-17FFF 5L options */ +#define _CP_5_OFF_5L 0xFF /* Disabled */ +#define _CP_5_ON_5L 0xDF /* Enabled */ + +/* Code Protect 18000-1BFFF 5L options */ +#define _CP_6_OFF_5L 0xFF /* Disabled */ +#define _CP_6_ON_5L 0xBF /* Enabled */ + +/* Code Protect 1C000-1FFFF 5L options */ +#define _CP_7_OFF_5L 0xFF /* Disabled */ +#define _CP_7_ON_5L 0x7F /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00200-03FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 04000-07FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Table Write Protect 08000-0BFFF 6L options */ +#define _WRT_2_OFF_6L 0xFF /* Disabled */ +#define _WRT_2_ON_6L 0xFB /* Enabled */ + +/* Table Write Protect 0C000-0FFFF 6L options */ +#define _WRT_3_OFF_6L 0xFF /* Disabled */ +#define _WRT_3_ON_6L 0xF7 /* Enabled */ + +/* Table Write Protect 10000-13FFF 6L options */ +#define _WRT_4_OFF_6L 0xFF /* Disabled */ +#define _WRT_4_ON_6L 0xEF /* Enabled */ + +/* Table Write Protect 14000-17FFF 6L options */ +#define _WRT_5_OFF_6L 0xFF /* Disabled */ +#define _WRT_5_ON_6L 0xDF /* Enabled */ + +/* Table Write Protect 18000-1BFFF 6L options */ +#define _WRT_6_OFF_6L 0xFF /* Disabled */ +#define _WRT_6_ON_6L 0xBF /* Enabled */ + +/* Table Write Protect 1C000-1FFFF 6L options */ +#define _WRT_7_OFF_6L 0xFF /* Disabled */ +#define _WRT_7_ON_6L 0x7F /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00200-03FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 04000-07FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect 08000-0BFFF 7L options */ +#define _EBTR_2_OFF_7L 0xFF /* Disabled */ +#define _EBTR_2_ON_7L 0xFB /* Enabled */ + +/* Table Read Protect 0C000-0FFFF 7L options */ +#define _EBTR_3_OFF_7L 0xFF /* Disabled */ +#define _EBTR_3_ON_7L 0xF7 /* Enabled */ + +/* Table Read Protect 10000-13FFF 7L options */ +#define _EBTR_4_OFF_7L 0xFF /* Disabled */ +#define _EBTR_4_ON_7L 0xEF /* Enabled */ + +/* Table Read Protect 14000-17FFF 7L options */ +#define _EBTR_5_OFF_7L 0xFF /* Disabled */ +#define _EBTR_5_ON_7L 0xDF /* Enabled */ + +/* Table Read Protect 18000-1BFFF 7L options */ +#define _EBTR_6_OFF_7L 0xFF /* Disabled */ +#define _EBTR_6_ON_7L 0xBF /* Enabled */ + +/* Table Read Protect 1C000-1FFFF 7L options */ +#define _EBTR_7_OFF_7L 0xFF /* Disabled */ +#define _EBTR_7_ON_7L 0x7F /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f67j50.h b/device/include/pic16/pic18f67j50.h new file mode 100644 index 0000000..10f279f --- /dev/null +++ b/device/include/pic16/pic18f67j50.h @@ -0,0 +1,3210 @@ +/* + * pic18f67j50.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F67J50_H__ +#define __PIC18F67J50_H__ 1 + + + +// Configuration Bits +#define __CONFIG1L 0x1FFF8 +#define __CONFIG1H 0x1FFF9 +#define __CONFIG2L 0x1FFFA +#define __CONFIG2H 0x1FFFB +#define __CONFIG3L 0x1FFFC +#define __CONFIG3H 0x1FFFD +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF + +extern __sfr __at (0xF40) PMSTAT; + +extern __sfr __at (0xF40) PMSTATL; +typedef union { + struct { + unsigned OB0E : 1; + unsigned OB1E : 1; + unsigned OB2E : 1; + unsigned OB3E : 1; + unsigned : 1; + unsigned : 1; + unsigned OBUF : 1; + unsigned OBE : 1; + }; +} __PMSTATLbits_t; +extern volatile __PMSTATLbits_t __at (0xF40) PMSTATLbits; + +extern __sfr __at (0xF41) PMSTATH; +typedef union { + struct { + unsigned IB0F : 1; + unsigned IB1F : 1; + unsigned IB2F : 1; + unsigned IB3F : 1; + unsigned : 1; + unsigned : 1; + unsigned IBOV : 1; + unsigned IBF : 1; + }; +} __PMSTATHbits_t; +extern volatile __PMSTATHbits_t __at (0xF41) PMSTATHbits; + +extern __sfr __at (0xF42) PMEL; +typedef union { + struct { + unsigned PTEN0 : 1; + unsigned PTEN1 : 1; + unsigned PTEN2 : 1; + unsigned PTEN3 : 1; + unsigned PTEN4 : 1; + unsigned PTEN5 : 1; + unsigned PTEN6 : 1; + unsigned PTEN7 : 1; + }; +} __PMELbits_t; +extern volatile __PMELbits_t __at (0xF42) PMELbits; + +extern __sfr __at (0xF42) PMEN; + +extern __sfr __at (0xF43) PMEH; +typedef union { + struct { + unsigned PTEN8 : 1; + unsigned PTEN9 : 1; + unsigned PTEN10 : 1; + unsigned PTEN11 : 1; + unsigned PTEN12 : 1; + unsigned PTEN13 : 1; + unsigned PTEN14 : 1; + unsigned PTEN15 : 1; + }; +} __PMEHbits_t; +extern volatile __PMEHbits_t __at (0xF43) PMEHbits; + +extern __sfr __at (0xF44) PMDIN2; + +extern __sfr __at (0xF44) PMDIN2L; + +extern __sfr __at (0xF45) PMDIN2H; + +extern __sfr __at (0xF46) PMDOUT2; + +extern __sfr __at (0xF46) PMDOUT2L; + +extern __sfr __at (0xF47) PMDOUT2H; + +extern __sfr __at (0xF48) PMMODE; + +extern __sfr __at (0xF48) PMMODEL; +typedef union { + struct { + unsigned WAITE0 : 1; + unsigned WAITE1 : 1; + unsigned WAITM0 : 1; + unsigned WAITM1 : 1; + unsigned WAITM2 : 1; + unsigned WAITM3 : 1; + unsigned WAITB0 : 1; + unsigned WAITB1 : 1; + }; +} __PMMODELbits_t; +extern volatile __PMMODELbits_t __at (0xF48) PMMODELbits; + +extern __sfr __at (0xF49) PMMODEH; +typedef union { + struct { + unsigned MODE0 : 1; + unsigned MODE1 : 1; + unsigned MODE16 : 1; + unsigned INCM0 : 1; + unsigned INCM1 : 1; + unsigned IRQM0 : 1; + unsigned IRQM1 : 1; + unsigned BUSY : 1; + }; +} __PMMODEHbits_t; +extern volatile __PMMODEHbits_t __at (0xF49) PMMODEHbits; + +extern __sfr __at (0xF4A) PMCON; + +extern __sfr __at (0xF4A) PMCONL; +typedef union { + struct { + unsigned RDSP : 1; + unsigned WRSP : 1; + unsigned BEP : 1; + unsigned CS1P : 1; + unsigned CS2P : 1; + unsigned ALP : 1; + unsigned CSF0 : 1; + unsigned CSF1 : 1; + }; +} __PMCONLbits_t; +extern volatile __PMCONLbits_t __at (0xF4A) PMCONLbits; + +extern __sfr __at (0xF4B) PMCONH; +typedef union { + struct { + unsigned PTRDEN : 1; + unsigned PTWREN : 1; + unsigned PTBEEN : 1; + unsigned ADRMUX0 : 1; + unsigned ADRMUX1 : 1; + unsigned PSIDL : 1; + unsigned : 1; + unsigned PMPEN : 1; + }; +} __PMCONHbits_t; +extern volatile __PMCONHbits_t __at (0xF4B) PMCONHbits; + +extern __sfr __at (0xF4C) UEP0; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP0bits_t; +extern volatile __UEP0bits_t __at (0xF4C) UEP0bits; + +extern __sfr __at (0xF4D) UEP1; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP1bits_t; +extern volatile __UEP1bits_t __at (0xF4D) UEP1bits; + +extern __sfr __at (0xF4E) UEP2; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP2bits_t; +extern volatile __UEP2bits_t __at (0xF4E) UEP2bits; + +extern __sfr __at (0xF4F) UEP3; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP3bits_t; +extern volatile __UEP3bits_t __at (0xF4F) UEP3bits; + +extern __sfr __at (0xF50) UEP4; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP4bits_t; +extern volatile __UEP4bits_t __at (0xF50) UEP4bits; + +extern __sfr __at (0xF51) UEP5; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP5bits_t; +extern volatile __UEP5bits_t __at (0xF51) UEP5bits; + +extern __sfr __at (0xF52) UEP6; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP6bits_t; +extern volatile __UEP6bits_t __at (0xF52) UEP6bits; + +extern __sfr __at (0xF53) UEP7; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP7bits_t; +extern volatile __UEP7bits_t __at (0xF53) UEP7bits; + +extern __sfr __at (0xF54) UEP8; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP8bits_t; +extern volatile __UEP8bits_t __at (0xF54) UEP8bits; + +extern __sfr __at (0xF55) UEP9; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP9bits_t; +extern volatile __UEP9bits_t __at (0xF55) UEP9bits; + +extern __sfr __at (0xF56) UEP10; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP10bits_t; +extern volatile __UEP10bits_t __at (0xF56) UEP10bits; + +extern __sfr __at (0xF57) UEP11; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP11bits_t; +extern volatile __UEP11bits_t __at (0xF57) UEP11bits; + +extern __sfr __at (0xF58) UEP12; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP12bits_t; +extern volatile __UEP12bits_t __at (0xF58) UEP12bits; + +extern __sfr __at (0xF59) UEP13; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP13bits_t; +extern volatile __UEP13bits_t __at (0xF59) UEP13bits; + +extern __sfr __at (0xF5A) UEP14; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP14bits_t; +extern volatile __UEP14bits_t __at (0xF5A) UEP14bits; + +extern __sfr __at (0xF5B) UEP15; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP15bits_t; +extern volatile __UEP15bits_t __at (0xF5B) UEP15bits; + +extern __sfr __at (0xF5C) UIE; +typedef union { + struct { + unsigned URSTIE : 1; + unsigned UERRIE : 1; + unsigned ACTVIE : 1; + unsigned TRNIE : 1; + unsigned IDLEIE : 1; + unsigned STALLIE : 1; + unsigned SOFIE : 1; + unsigned : 1; + }; +} __UIEbits_t; +extern volatile __UIEbits_t __at (0xF5C) UIEbits; + +extern __sfr __at (0xF5D) UEIE; +typedef union { + struct { + unsigned PIDEE : 1; + unsigned CRC5EE : 1; + unsigned CRC16EE : 1; + unsigned DFN8EE : 1; + unsigned BTOEE : 1; + unsigned : 1; + unsigned : 1; + unsigned BTSEE : 1; + }; +} __UEIEbits_t; +extern volatile __UEIEbits_t __at (0xF5D) UEIEbits; + +extern __sfr __at (0xF5E) UADDR; +typedef union { + struct { + unsigned ADDR0 : 1; + unsigned ADDR1 : 1; + unsigned ADDR2 : 1; + unsigned ADDR3 : 1; + unsigned ADDR4 : 1; + unsigned ADDR5 : 1; + unsigned ADDR6 : 1; + unsigned : 1; + }; +} __UADDRbits_t; +extern volatile __UADDRbits_t __at (0xF5E) UADDRbits; + +extern __sfr __at (0xF5F) UCFG; +typedef union { + struct { + unsigned PPB0 : 1; + unsigned PPB1 : 1; + unsigned FSEN : 1; + unsigned UTRDIS : 1; + unsigned UPUEN : 1; + unsigned : 1; + unsigned UOEMON : 1; + unsigned UTEYE : 1; + }; +} __UCFGbits_t; +extern volatile __UCFGbits_t __at (0xF5F) UCFGbits; + +extern __sfr __at (0xF60) UFRM; + +extern __sfr __at (0xF60) UFRML; +typedef union { + struct { + unsigned FRM0 : 1; + unsigned FRM1 : 1; + unsigned FRM2 : 1; + unsigned FRM3 : 1; + unsigned FRM4 : 1; + unsigned FRM5 : 1; + unsigned FRM6 : 1; + unsigned FRM7 : 1; + }; +} __UFRMLbits_t; +extern volatile __UFRMLbits_t __at (0xF60) UFRMLbits; + +extern __sfr __at (0xF61) UFRMH; +typedef union { + struct { + unsigned FRM8 : 1; + unsigned FRM9 : 1; + unsigned FRM10 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UFRMHbits_t; +extern volatile __UFRMHbits_t __at (0xF61) UFRMHbits; + +extern __sfr __at (0xF62) UIR; +typedef union { + struct { + unsigned URSTIF : 1; + unsigned UERRIF : 1; + unsigned ACTVIF : 1; + unsigned TRNIF : 1; + unsigned IDLEIF : 1; + unsigned STALLIF : 1; + unsigned SOFIF : 1; + unsigned : 1; + }; +} __UIRbits_t; +extern volatile __UIRbits_t __at (0xF62) UIRbits; + +extern __sfr __at (0xF63) UEIR; +typedef union { + struct { + unsigned PIDEF : 1; + unsigned CRC5EF : 1; + unsigned CRC16EF : 1; + unsigned DFN8EF : 1; + unsigned BTOEF : 1; + unsigned : 1; + unsigned : 1; + unsigned BTSEF : 1; + }; +} __UEIRbits_t; +extern volatile __UEIRbits_t __at (0xF63) UEIRbits; + +extern __sfr __at (0xF64) USTAT; +typedef union { + struct { + unsigned : 1; + unsigned PPBI : 1; + unsigned DIR : 1; + unsigned ENDP0 : 1; + unsigned ENDP1 : 1; + unsigned ENDP2 : 1; + unsigned ENDP3 : 1; + unsigned : 1; + }; +} __USTATbits_t; +extern volatile __USTATbits_t __at (0xF64) USTATbits; + +extern __sfr __at (0xF65) UCON; +typedef union { + struct { + unsigned : 1; + unsigned SUSPND : 1; + unsigned RESUME : 1; + unsigned USBEN : 1; + unsigned PKTDIS : 1; + unsigned SE0 : 1; + unsigned PPBRST : 1; + unsigned : 1; + }; +} __UCONbits_t; +extern volatile __UCONbits_t __at (0xF65) UCONbits; + +extern __sfr __at (0xF66) PMDIN1; + +extern __sfr __at (0xF66) PMDIN1L; + +extern __sfr __at (0xF67) PMDIN1H; + +extern __sfr __at (0xF68) PMADDR; + +extern __sfr __at (0xF68) PMADDRL; + +extern __sfr __at (0xF68) PMDOUT1; + +extern __sfr __at (0xF68) PMDOUT1L; + +extern __sfr __at (0xF69) PMADDRH; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CS1 : 1; + unsigned CS2 : 1; + }; +} __PMADDRHbits_t; +extern volatile __PMADDRHbits_t __at (0xF69) PMADDRHbits; + +extern __sfr __at (0xF69) PMDOUT1H; + +extern __sfr __at (0xF6A) CMSTAT; +typedef union { + struct { + unsigned COUT1 : 1; + unsigned COUT2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CMSTATbits_t; +extern volatile __CMSTATbits_t __at (0xF6A) CMSTATbits; + +extern __sfr __at (0xF6A) CMSTATUS; +typedef union { + struct { + unsigned COUT1 : 1; + unsigned COUT2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CMSTATUSbits_t; +extern volatile __CMSTATUSbits_t __at (0xF6A) CMSTATUSbits; + +extern __sfr __at (0xF6B) SSP2CON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP2CON2bits_t; +extern volatile __SSP2CON2bits_t __at (0xF6B) SSP2CON2bits; + +extern __sfr __at (0xF6C) SSP2CON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSP2CON1bits_t; +extern volatile __SSP2CON1bits_t __at (0xF6C) SSP2CON1bits; + +extern __sfr __at (0xF6D) SSP2STAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP2STATbits_t; +extern volatile __SSP2STATbits_t __at (0xF6D) SSP2STATbits; + +extern __sfr __at (0xF6E) SSP2ADD; + +extern __sfr __at (0xF6E) SSP2MSK; +typedef union { + struct { + unsigned MSK0 : 1; + unsigned MSK1 : 1; + unsigned MSK2 : 1; + unsigned MSK3 : 1; + unsigned MSK4 : 1; + unsigned MSK5 : 1; + unsigned MSK6 : 1; + unsigned MSK7 : 1; + }; +} __SSP2MSKbits_t; +extern volatile __SSP2MSKbits_t __at (0xF6E) SSP2MSKbits; + +extern __sfr __at (0xF6F) SSP2BUF; + +extern __sfr __at (0xF70) CCP5CON; +typedef union { + struct { + unsigned CCP5M0 : 1; + unsigned CCP5M1 : 1; + unsigned CCP5M2 : 1; + unsigned CCP5M3 : 1; + unsigned DCCP5Y : 1; + unsigned DCCP5X : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DC5B0 : 1; + unsigned DC5B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP5CONbits_t; +extern volatile __CCP5CONbits_t __at (0xF70) CCP5CONbits; + +extern __sfr __at (0xF71) CCPR5; + +extern __sfr __at (0xF71) CCPR5L; + +extern __sfr __at (0xF72) CCPR5H; + +extern __sfr __at (0xF73) CCP4CON; +typedef union { + struct { + unsigned CCP4M0 : 1; + unsigned CCP4M1 : 1; + unsigned CCP4M2 : 1; + unsigned CCP4M3 : 1; + unsigned DCCP4Y : 1; + unsigned DCCP4X : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DC4B0 : 1; + unsigned DC4B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP4CONbits_t; +extern volatile __CCP4CONbits_t __at (0xF73) CCP4CONbits; + +extern __sfr __at (0xF74) CCPR4; + +extern __sfr __at (0xF74) CCPR4L; + +extern __sfr __at (0xF75) CCPR4H; + +extern __sfr __at (0xF76) T4CON; +typedef union { + struct { + unsigned T4CKPS0 : 1; + unsigned T4CKPS1 : 1; + unsigned TMR4ON : 1; + unsigned T4OUTPS0 : 1; + unsigned T4OUTPS1 : 1; + unsigned T4OUTPS2 : 1; + unsigned T4OUTPS3 : 1; + unsigned : 1; + }; +} __T4CONbits_t; +extern volatile __T4CONbits_t __at (0xF76) T4CONbits; + +extern __sfr __at (0xF77) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xF77) CVRCONbits; + +extern __sfr __at (0xF77) PR4; + +extern __sfr __at (0xF78) TMR4; + +extern __sfr __at (0xF79) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T3INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xF79) T3CONbits; + +extern __sfr __at (0xF7A) TMR3L; + +extern __sfr __at (0xF7B) TMR3H; + +extern __sfr __at (0xF7C) BAUDCON2; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned DTRXP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned RXDTP : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCON2bits_t; +extern volatile __BAUDCON2bits_t __at (0xF7C) BAUDCON2bits; + +extern __sfr __at (0xF7D) SPBRGH2; + +extern __sfr __at (0xF7E) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned DTRXP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned RXDTP : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xF7E) BAUDCONbits; + +extern __sfr __at (0xF7E) BAUDCON1; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned DTRXP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned RXDTP : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCON1bits_t; +extern volatile __BAUDCON1bits_t __at (0xF7E) BAUDCON1bits; + +extern __sfr __at (0xF7F) SPBRGH; + +extern __sfr __at (0xF7F) SPBRGH1; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned C2INA : 1; + unsigned CLKO : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned INT3 : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned PMA4 : 1; + unsigned PMA3 : 1; + unsigned PMA2 : 1; + unsigned PMA1 : 1; + unsigned PMA0 : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned CCP2_PORTC : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned C2OUT : 1; + unsigned CK : 1; + unsigned DT : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned PMD0 : 1; + unsigned PMD1 : 1; + unsigned PMD2 : 1; + unsigned PMD3 : 1; + unsigned PMD4 : 1; + unsigned PMD5 : 1; + unsigned PMD6 : 1; + unsigned PMD7 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SDO2 : 1; + unsigned SDA2 : 1; + unsigned SCL2 : 1; + unsigned SS2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SDI2 : 1; + unsigned SCK2 : 1; + unsigned : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned RE4 : 1; + unsigned RE5 : 1; + unsigned RE6 : 1; + unsigned RE7 : 1; + }; + struct { + unsigned PMRD : 1; + unsigned PMWR : 1; + unsigned PMBE : 1; + unsigned PMA13 : 1; + unsigned PMA12 : 1; + unsigned PMA11 : 1; + unsigned PMA10 : 1; + unsigned PMA9 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned REFO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2_PORTE : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF85) PORTF; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned RF2 : 1; + unsigned RF3 : 1; + unsigned RF4 : 1; + unsigned RF5 : 1; + unsigned RF6 : 1; + unsigned RF7 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned AN7 : 1; + unsigned : 1; + unsigned : 1; + unsigned AN10 : 1; + unsigned AN11 : 1; + unsigned SS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned C2INB : 1; + unsigned : 1; + unsigned : 1; + unsigned CVREF : 1; + unsigned C1INA : 1; + unsigned C1OUT : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned PMA5 : 1; + unsigned : 1; + unsigned : 1; + unsigned C1INB : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTFbits_t; +extern volatile __PORTFbits_t __at (0xF85) PORTFbits; + +extern __sfr __at (0xF86) PORTG; +typedef union { + struct { + unsigned RG0 : 1; + unsigned RG1 : 1; + unsigned RG2 : 1; + unsigned RG3 : 1; + unsigned RG4 : 1; + unsigned : 1; + unsigned REPU : 1; + unsigned RDPU : 1; + }; + struct { + unsigned CCP3 : 1; + unsigned TX2 : 1; + unsigned RX2 : 1; + unsigned CCP4 : 1; + unsigned CCP5 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned PMA8 : 1; + unsigned CK2 : 1; + unsigned DT2 : 1; + unsigned PMCS1 : 1; + unsigned PMCS2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned PMA7 : 1; + unsigned PMA6 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTGbits_t; +extern volatile __PORTGbits_t __at (0xF86) PORTGbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned LATE3 : 1; + unsigned LATE4 : 1; + unsigned LATE5 : 1; + unsigned LATE6 : 1; + unsigned LATE7 : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF8E) LATF; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned LATF2 : 1; + unsigned LATF3 : 1; + unsigned LATF4 : 1; + unsigned LATF5 : 1; + unsigned LATF6 : 1; + unsigned LATF7 : 1; + }; +} __LATFbits_t; +extern volatile __LATFbits_t __at (0xF8E) LATFbits; + +extern __sfr __at (0xF8F) LATG; +typedef union { + struct { + unsigned LATG0 : 1; + unsigned LATG1 : 1; + unsigned LATG2 : 1; + unsigned LATG3 : 1; + unsigned LATG4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATGbits_t; +extern volatile __LATGbits_t __at (0xF8F) LATGbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned RE4 : 1; + unsigned RE5 : 1; + unsigned RE6 : 1; + unsigned RE7 : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned TRISE3 : 1; + unsigned TRISE4 : 1; + unsigned TRISE5 : 1; + unsigned TRISE6 : 1; + unsigned TRISE7 : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF97) DDRF; +typedef union { + struct { + unsigned : 1; + unsigned RF1 : 1; + unsigned RF2 : 1; + unsigned RF3 : 1; + unsigned RF4 : 1; + unsigned RF5 : 1; + unsigned RF6 : 1; + unsigned RF7 : 1; + }; +} __DDRFbits_t; +extern volatile __DDRFbits_t __at (0xF97) DDRFbits; + +extern __sfr __at (0xF97) TRISF; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned TRISF2 : 1; + unsigned TRISF3 : 1; + unsigned TRISF4 : 1; + unsigned TRISF5 : 1; + unsigned TRISF6 : 1; + unsigned TRISF7 : 1; + }; +} __TRISFbits_t; +extern volatile __TRISFbits_t __at (0xF97) TRISFbits; + +extern __sfr __at (0xF98) DDRG; +typedef union { + struct { + unsigned RG0 : 1; + unsigned RG1 : 1; + unsigned RG2 : 1; + unsigned RG3 : 1; + unsigned RG4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDRGbits_t; +extern volatile __DDRGbits_t __at (0xF98) DDRGbits; + +extern __sfr __at (0xF98) TRISG; +typedef union { + struct { + unsigned TRISG0 : 1; + unsigned TRISG1 : 1; + unsigned TRISG2 : 1; + unsigned TRISG3 : 1; + unsigned TRISG4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISGbits_t; +extern volatile __TRISGbits_t __at (0xF98) TRISGbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned TUN5 : 1; + unsigned PLLEN : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9C) RCSTA2; +typedef union { + struct { + unsigned RCD8 : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RC9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RX9D : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RX9 : 1; + unsigned : 1; + }; +} __RCSTA2bits_t; +extern volatile __RCSTA2bits_t __at (0xF9C) RCSTA2bits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PMPIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IE : 1; + unsigned TX1IE : 1; + unsigned RC1IE : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PMPIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IF : 1; + unsigned TX1IF : 1; + unsigned RC1IF : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PMPIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IP : 1; + unsigned TX1IP : 1; + unsigned RC1IP : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned USBIE : 1; + unsigned CM1IE : 1; + unsigned CM2IE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned USBIF : 1; + unsigned CM1IF : 1; + unsigned CM2IF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned USBIP : 1; + unsigned CM1IP : 1; + unsigned CM2IP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned CCP3IE : 1; + unsigned CCP4IE : 1; + unsigned CCP5IE : 1; + unsigned TMR4IE : 1; + unsigned TX2IE : 1; + unsigned RC2IE : 1; + unsigned BCL2IE : 1; + unsigned SSP2IE : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned CCP3IF : 1; + unsigned CCP4IF : 1; + unsigned CCP5IF : 1; + unsigned TMR4IF : 1; + unsigned TX2IF : 1; + unsigned RC2IF : 1; + unsigned BCL2IF : 1; + unsigned SSP2IF : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned CCP3IP : 1; + unsigned CCP4IP : 1; + unsigned CCP5IP : 1; + unsigned TMR4IP : 1; + unsigned TX2IP : 1; + unsigned RC2IP : 1; + unsigned BCL2IP : 1; + unsigned SSP2IP : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned WPROG : 1; + unsigned : 1; + unsigned : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) TXSTA2; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTA2bits_t; +extern volatile __TXSTA2bits_t __at (0xFA8) TXSTA2bits; + +extern __sfr __at (0xFA9) TXREG2; + +extern __sfr __at (0xFAA) RCREG2; + +extern __sfr __at (0xFAB) SPBRG2; + +extern __sfr __at (0xFAC) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAC) RCSTAbits; + +extern __sfr __at (0xFAC) RCSTA1; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTA1bits_t; +extern volatile __RCSTA1bits_t __at (0xFAC) RCSTA1bits; + +extern __sfr __at (0xFAD) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAD) TXSTAbits; + +extern __sfr __at (0xFAD) TXSTA1; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTA1bits_t; +extern volatile __TXSTA1bits_t __at (0xFAD) TXSTA1bits; + +extern __sfr __at (0xFAE) TXREG; + +extern __sfr __at (0xFAE) TXREG1; + +extern __sfr __at (0xFAF) RCREG; + +extern __sfr __at (0xFAF) RCREG1; + +extern __sfr __at (0xFB0) SPBRG; + +extern __sfr __at (0xFB0) SPBRG1; + +extern __sfr __at (0xFB1) CCP3CON; +typedef union { + struct { + unsigned CCP3M0 : 1; + unsigned CCP3M1 : 1; + unsigned CCP3M2 : 1; + unsigned CCP3M3 : 1; + unsigned DC3B0 : 1; + unsigned DC3B1 : 1; + unsigned P3M0 : 1; + unsigned P3M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP3Y : 1; + unsigned CCP3X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP3CONbits_t; +extern volatile __CCP3CONbits_t __at (0xFB1) CCP3CONbits; + +extern __sfr __at (0xFB1) ECCP3CON; +typedef union { + struct { + unsigned CCP3M0 : 1; + unsigned CCP3M1 : 1; + unsigned CCP3M2 : 1; + unsigned CCP3M3 : 1; + unsigned DC3B0 : 1; + unsigned DC3B1 : 1; + unsigned P3M0 : 1; + unsigned P3M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP3Y : 1; + unsigned CCP3X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP3CONbits_t; +extern volatile __ECCP3CONbits_t __at (0xFB1) ECCP3CONbits; + +extern __sfr __at (0xFB2) CCPR3; + +extern __sfr __at (0xFB2) CCPR3L; + +extern __sfr __at (0xFB3) CCPR3H; + +extern __sfr __at (0xFB4) ECCP3DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; + struct { + unsigned P3DC0 : 1; + unsigned P3DC1 : 1; + unsigned P3DC2 : 1; + unsigned P3DC3 : 1; + unsigned P3DC4 : 1; + unsigned P3DC5 : 1; + unsigned P3DC6 : 1; + unsigned P3RSEN : 1; + }; +} __ECCP3DELbits_t; +extern volatile __ECCP3DELbits_t __at (0xFB4) ECCP3DELbits; + +extern __sfr __at (0xFB5) ECCP3AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; + struct { + unsigned PSS3BD0 : 1; + unsigned PSS3BD1 : 1; + unsigned PSS3AC0 : 1; + unsigned PSS3AC1 : 1; + unsigned ECCP3AS0 : 1; + unsigned ECCP3AS1 : 1; + unsigned ECCP3AS2 : 1; + unsigned ECCP3ASE : 1; + }; +} __ECCP3ASbits_t; +extern volatile __ECCP3ASbits_t __at (0xFB5) ECCP3ASbits; + +extern __sfr __at (0xFB6) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned P2M0 : 1; + unsigned P2M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFB6) CCP2CONbits; + +extern __sfr __at (0xFB6) ECCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned P2M0 : 1; + unsigned P2M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP2CONbits_t; +extern volatile __ECCP2CONbits_t __at (0xFB6) ECCP2CONbits; + +extern __sfr __at (0xFB7) CCPR2; + +extern __sfr __at (0xFB7) CCPR2L; + +extern __sfr __at (0xFB8) CCPR2H; + +extern __sfr __at (0xFB9) ECCP2DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; + struct { + unsigned P2DC0 : 1; + unsigned P2DC1 : 1; + unsigned P2DC2 : 1; + unsigned P2DC3 : 1; + unsigned P2DC4 : 1; + unsigned P2DC5 : 1; + unsigned P2DC6 : 1; + unsigned P2RSEN : 1; + }; +} __ECCP2DELbits_t; +extern volatile __ECCP2DELbits_t __at (0xFB9) ECCP2DELbits; + +extern __sfr __at (0xFBA) ECCP2AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; + struct { + unsigned PSS2BD0 : 1; + unsigned PSS2BD1 : 1; + unsigned PSS2AC0 : 1; + unsigned PSS2AC1 : 1; + unsigned ECCP2AS0 : 1; + unsigned ECCP2AS1 : 1; + unsigned ECCP2AS2 : 1; + unsigned ECCP2ASE : 1; + }; +} __ECCP2ASbits_t; +extern volatile __ECCP2ASbits_t __at (0xFBA) ECCP2ASbits; + +extern __sfr __at (0xFBB) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBB) CCP1CONbits; + +extern __sfr __at (0xFBB) ECCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP1CONbits_t; +extern volatile __ECCP1CONbits_t __at (0xFBB) ECCP1CONbits; + +extern __sfr __at (0xFBC) CCPR1; + +extern __sfr __at (0xFBC) CCPR1L; + +extern __sfr __at (0xFBD) CCPR1H; + +extern __sfr __at (0xFBE) ECCP1DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; + struct { + unsigned P1DC0 : 1; + unsigned P1DC1 : 1; + unsigned P1DC2 : 1; + unsigned P1DC3 : 1; + unsigned P1DC4 : 1; + unsigned P1DC5 : 1; + unsigned P1DC6 : 1; + unsigned P1RSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xFBE) ECCP1DELbits; + +extern __sfr __at (0xFBF) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; + struct { + unsigned PSS1BD0 : 1; + unsigned PSS1BD1 : 1; + unsigned PSS1AC0 : 1; + unsigned PSS1AC1 : 1; + unsigned ECCP1AS0 : 1; + unsigned ECCP1AS1 : 1; + unsigned ECCP1AS2 : 1; + unsigned ECCP1ASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFBF) ECCP1ASbits; + +extern __sfr __at (0xFC0) WDTCON; +typedef union { + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DEVCFG : 1; + unsigned : 1; + unsigned LVDSTAT : 1; + unsigned REGSLP : 1; + }; + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADSHR : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFC0) WDTCONbits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned ADCAL : 1; + unsigned ADFM : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC1) ANCON0; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned PCFG4 : 1; + unsigned PCFG5 : 1; + unsigned PCFG6 : 1; + unsigned PCFG7 : 1; + }; +} __ANCON0bits_t; +extern volatile __ANCON0bits_t __at (0xFC1) ANCON0bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC2) ANCON1; +typedef union { + struct { + unsigned PCFG8 : 1; + unsigned PCFG9 : 1; + unsigned PCFG10 : 1; + unsigned PCFG11 : 1; + unsigned PCFG12 : 1; + unsigned PCFG13 : 1; + unsigned PCFG14 : 1; + unsigned PCFG15 : 1; + }; +} __ANCON1bits_t; +extern volatile __ANCON1bits_t __at (0xFC2) ANCON1bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSP1CON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP1CON2bits_t; +extern volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSP1CON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSP1CON1bits_t; +extern volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSP1STAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP1STATbits_t; +extern volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSP1ADD; + +extern __sfr __at (0xFC8) SSP1MSK; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSP1BUF; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) PADCFG1; +typedef union { + struct { + unsigned PMPTTL : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PADCFG1bits_t; +extern volatile __PADCFG1bits_t __at (0xFCC) PADCFG1bits; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) ODCON3; +typedef union { + struct { + unsigned SPI1OD : 1; + unsigned SPI2OD : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ODCON3bits_t; +extern volatile __ODCON3bits_t __at (0xFCD) ODCON3bits; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) ODCON2; +typedef union { + struct { + unsigned USART1OD : 1; + unsigned USART2OD : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned U1OD : 1; + unsigned U2OD : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ODCON2bits_t; +extern volatile __ODCON2bits_t __at (0xFCE) ODCON2bits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) ODCON1; +typedef union { + struct { + unsigned ECCP1OD : 1; + unsigned ECCP2OD : 1; + unsigned ECCP3OD : 1; + unsigned CCP4OD : 1; + unsigned CCP5OD : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ODCON1bits_t; +extern volatile __ODCON1bits_t __at (0xFCF) ODCON1bits; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned NOT_CM : 1; + unsigned : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned CM : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) CM2CON; +typedef union { + struct { + unsigned C1CH0 : 1; + unsigned C1CH1 : 1; + unsigned CREF : 1; + unsigned EVPOL0 : 1; + unsigned EVPOL1 : 1; + unsigned CPOL : 1; + unsigned COE : 1; + unsigned CON : 1; + }; + struct { + unsigned CCH0 : 1; + unsigned CCH1 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CM2CONbits_t; +extern volatile __CM2CONbits_t __at (0xFD1) CM2CONbits; + +extern __sfr __at (0xFD1) CM2CON1; +typedef union { + struct { + unsigned C1CH0 : 1; + unsigned C1CH1 : 1; + unsigned CREF : 1; + unsigned EVPOL0 : 1; + unsigned EVPOL1 : 1; + unsigned CPOL : 1; + unsigned COE : 1; + unsigned CON : 1; + }; + struct { + unsigned CCH0 : 1; + unsigned CCH1 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CM2CON1bits_t; +extern volatile __CM2CON1bits_t __at (0xFD1) CM2CON1bits; + +extern __sfr __at (0xFD2) CM1CON; +typedef union { + struct { + unsigned C1CH0 : 1; + unsigned C1CH1 : 1; + unsigned CREF : 1; + unsigned EVPOL0 : 1; + unsigned EVPOL1 : 1; + unsigned CPOL : 1; + unsigned COE : 1; + unsigned CON : 1; + }; + struct { + unsigned CCH0 : 1; + unsigned CCH1 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CM1CONbits_t; +extern volatile __CM1CONbits_t __at (0xFD2) CM1CONbits; + +extern __sfr __at (0xFD2) CM1CON1; +typedef union { + struct { + unsigned C1CH0 : 1; + unsigned C1CH1 : 1; + unsigned CREF : 1; + unsigned EVPOL0 : 1; + unsigned EVPOL1 : 1; + unsigned CPOL : 1; + unsigned COE : 1; + unsigned CON : 1; + }; + struct { + unsigned CCH0 : 1; + unsigned CCH1 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CM1CON1bits_t; +extern volatile __CM1CON1bits_t __at (0xFD2) CM1CON1bits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned FLTS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD3) REFOCON; +typedef union { + struct { + unsigned RODIV0 : 1; + unsigned RODIV1 : 1; + unsigned RODIV2 : 1; + unsigned RODIV3 : 1; + unsigned ROSEL : 1; + unsigned ROSSLP : 1; + unsigned : 1; + unsigned ROON : 1; + }; +} __REFOCONbits_t; +extern volatile __REFOCONbits_t __at (0xFD3) REFOCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T0PS3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned INT3F : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned INT3E : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned INT3IF : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned INT3IE : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned INT3P : 1; + unsigned T0IP : 1; + unsigned INTEDG3 : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned INT3IP : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned RBIE : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned SP0 : 1; + unsigned SP1 : 1; + unsigned SP2 : 1; + unsigned SP3 : 1; + unsigned SP4 : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f67j60.h b/device/include/pic16/pic18f67j60.h new file mode 100644 index 0000000..fbc9a05 --- /dev/null +++ b/device/include/pic16/pic18f67j60.h @@ -0,0 +1,6 @@ +/* + * pic18f67j60.h - PIC18F67J60 Device Library Header + */ + +#include "pic18f66j60.h" + diff --git a/device/include/pic16/pic18f8520.h b/device/include/pic16/pic18f8520.h new file mode 100644 index 0000000..65c9616 --- /dev/null +++ b/device/include/pic16/pic18f8520.h @@ -0,0 +1,1516 @@ + +/* + * pic18f8520.h - PIC18F8520 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f8520.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F8520_H__ +#define __PIC18F8520_H__ + +extern __sfr __at (0xf6b) RCSTA2; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTA2bits_t; + +extern volatile __RCSTA2bits_t __at (0xf6b) RCSTA2bits; + +extern __sfr __at (0xf6c) TXSTA2; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTA2bits_t; + +extern volatile __TXSTA2bits_t __at (0xf6c) TXSTA2bits; + +extern __sfr __at (0xf6d) TXREG2; +extern __sfr __at (0xf6e) RCREG2; +extern __sfr __at (0xf6f) SPBRG2; +extern __sfr __at (0xf70) CCP5CON; +typedef union { + struct { + unsigned CCP5M0:1; + unsigned CCP5M1:1; + unsigned CCP5M2:1; + unsigned CCP5M3:1; + unsigned DCCP5Y:1; + unsigned DCCP5X:1; + unsigned :1; + unsigned :1; + }; +} __CCP5CONbits_t; + +extern volatile __CCP5CONbits_t __at (0xf70) CCP5CONbits; + +extern __sfr __at (0xf71) CCPR5L; +extern __sfr __at (0xf72) CCPR5H; +extern __sfr __at (0xf73) CCP4CON; +typedef union { + struct { + unsigned CCP4M0:1; + unsigned CCP4M1:1; + unsigned CCP4M2:1; + unsigned CCP4M3:1; + unsigned DCCP4Y:1; + unsigned DCCP4X:1; + unsigned :1; + unsigned :1; + }; +} __CCP4CONbits_t; + +extern volatile __CCP4CONbits_t __at (0xf73) CCP4CONbits; + +extern __sfr __at (0xf74) CCPR4L; +extern __sfr __at (0xf75) CCPR4H; +extern __sfr __at (0xf76) T4CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T4CONbits_t; + +extern volatile __T4CONbits_t __at (0xf76) T4CONbits; + +extern __sfr __at (0xf77) PR4; +extern __sfr __at (0xf78) TMR4; +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned :1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned INT3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf83) PORTD; +typedef union { + struct { + unsigned RD0:1; + unsigned RD1:1; + unsigned RD2:1; + unsigned RD3:1; + unsigned RD4:1; + unsigned RD5:1; + unsigned RD6:1; + unsigned RD7:1; + }; + + struct { + unsigned AD0:1; + unsigned AD1:1; + unsigned AD2:1; + unsigned AD3:1; + unsigned AD4:1; + unsigned AD5:1; + unsigned AD6:1; + unsigned AD7:1; + }; +} __PORTDbits_t; + +extern volatile __PORTDbits_t __at (0xf83) PORTDbits; + +extern __sfr __at (0xf84) PORTE; +typedef union { + struct { + unsigned RE0:1; + unsigned RE1:1; + unsigned RE2:1; + unsigned RE3:1; + unsigned RE4:1; + unsigned RE5:1; + unsigned RE6:1; + unsigned RE7:1; + }; + + struct { + unsigned ALE:1; + unsigned OE:1; + unsigned WRL:1; + unsigned WRH:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned CCP2:1; + }; + + struct { + unsigned AN5:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTEbits_t; + +extern volatile __PORTEbits_t __at (0xf84) PORTEbits; + +extern __sfr __at (0xf85) PORTF; +typedef union { + struct { + unsigned RF0:1; + unsigned RF1:1; + unsigned RF2:1; + unsigned RF3:1; + unsigned RF4:1; + unsigned RF5:1; + unsigned RF6:1; + unsigned RF7:1; + }; +} __PORTFbits_t; + +extern volatile __PORTFbits_t __at (0xf85) PORTFbits; + +extern __sfr __at (0xf86) PORTG; +typedef union { + struct { + unsigned RG0:1; + unsigned RG1:1; + unsigned RG2:1; + unsigned RG3:1; + unsigned RG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTGbits_t; + +extern volatile __PORTGbits_t __at (0xf86) PORTGbits; + +extern __sfr __at (0xf87) PORTH; +typedef union { + struct { + unsigned RH0:1; + unsigned RH1:1; + unsigned RH2:1; + unsigned RH3:1; + unsigned RH4:1; + unsigned RH5:1; + unsigned RH6:1; + unsigned RH7:1; + }; +} __PORTHbits_t; + +extern volatile __PORTHbits_t __at (0xf87) PORTHbits; + +extern __sfr __at (0xf88) PORTJ; +typedef union { + struct { + unsigned RJ0:1; + unsigned RJ1:1; + unsigned RJ2:1; + unsigned RJ3:1; + unsigned RJ4:1; + unsigned RJ5:1; + unsigned RJ6:1; + unsigned RJ7:1; + }; +} __PORTJbits_t; + +extern volatile __PORTJbits_t __at (0xf88) PORTJbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf8c) LATD; +typedef union { + struct { + unsigned LATD0:1; + unsigned LATD1:1; + unsigned LATD2:1; + unsigned LATD3:1; + unsigned LATD4:1; + unsigned LATD5:1; + unsigned LATD6:1; + unsigned LATD7:1; + }; +} __LATDbits_t; + +extern volatile __LATDbits_t __at (0xf8c) LATDbits; + +extern __sfr __at (0xf8d) LATE; +typedef union { + struct { + unsigned LATE0:1; + unsigned LATE1:1; + unsigned LATE2:1; + unsigned LATE3:1; + unsigned LATE4:1; + unsigned LATE5:1; + unsigned LATE6:1; + unsigned LATE7:1; + }; +} __LATEbits_t; + +extern volatile __LATEbits_t __at (0xf8d) LATEbits; + +extern __sfr __at (0xf8e) LATF; +typedef union { + struct { + unsigned LATF0:1; + unsigned LATF1:1; + unsigned LATF2:1; + unsigned LATF3:1; + unsigned LATF4:1; + unsigned LATF5:1; + unsigned LATF6:1; + unsigned LATF7:1; + }; +} __LATFbits_t; + +extern volatile __LATFbits_t __at (0xf8e) LATFbits; + +extern __sfr __at (0xf8f) LATG; +typedef union { + struct { + unsigned LATG0:1; + unsigned LATG1:1; + unsigned LATG2:1; + unsigned LATG3:1; + unsigned LATG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __LATGbits_t; + +extern volatile __LATGbits_t __at (0xf8f) LATGbits; + +extern __sfr __at (0xf90) LATH; +typedef union { + struct { + unsigned LATH0:1; + unsigned LATH1:1; + unsigned LATH2:1; + unsigned LATH3:1; + unsigned LATH4:1; + unsigned LATH5:1; + unsigned LATH6:1; + unsigned LATH7:1; + }; +} __LATHbits_t; + +extern volatile __LATHbits_t __at (0xf90) LATHbits; + +extern __sfr __at (0xf91) LATJ; +typedef union { + struct { + unsigned LATJ0:1; + unsigned LATJ1:1; + unsigned LATJ2:1; + unsigned LATJ3:1; + unsigned LATJ4:1; + unsigned LATJ5:1; + unsigned LATJ6:1; + unsigned LATJ7:1; + }; +} __LATJbits_t; + +extern volatile __LATJbits_t __at (0xf91) LATJbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf95) TRISD; +typedef union { + struct { + unsigned TRISD0:1; + unsigned TRISD1:1; + unsigned TRISD2:1; + unsigned TRISD3:1; + unsigned TRISD4:1; + unsigned TRISD5:1; + unsigned TRISD6:1; + unsigned TRISD7:1; + }; +} __TRISDbits_t; + +extern volatile __TRISDbits_t __at (0xf95) TRISDbits; + +extern __sfr __at (0xf96) TRISE; +typedef union { + struct { + unsigned TRISE0:1; + unsigned TRISE1:1; + unsigned TRISE2:1; + unsigned TRISE3:1; + unsigned TRISE4:1; + unsigned TRISE5:1; + unsigned TRISE6:1; + unsigned TRISE7:1; + }; +} __TRISEbits_t; + +extern volatile __TRISEbits_t __at (0xf96) TRISEbits; + +extern __sfr __at (0xf97) TRISF; +typedef union { + struct { + unsigned TRISF0:1; + unsigned TRISF1:1; + unsigned TRISF2:1; + unsigned TRISF3:1; + unsigned TRISF4:1; + unsigned TRISF5:1; + unsigned TRISF6:1; + unsigned TRISF7:1; + }; +} __TRISFbits_t; + +extern volatile __TRISFbits_t __at (0xf97) TRISFbits; + +extern __sfr __at (0xf98) TRISG; +typedef union { + struct { + unsigned TRISG0:1; + unsigned TRISG1:1; + unsigned TRISG2:1; + unsigned TRISG3:1; + unsigned TRISG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __TRISGbits_t; + +extern volatile __TRISGbits_t __at (0xf98) TRISGbits; + +extern __sfr __at (0xf99) TRISH; +typedef union { + struct { + unsigned TRISH0:1; + unsigned TRISH1:1; + unsigned TRISH2:1; + unsigned TRISH3:1; + unsigned TRISH4:1; + unsigned TRISH5:1; + unsigned TRISH6:1; + unsigned TRISH7:1; + }; +} __TRISHbits_t; + +extern volatile __TRISHbits_t __at (0xf99) TRISHbits; + +extern __sfr __at (0xf9a) TRISJ; +typedef union { + struct { + unsigned TRISJ0:1; + unsigned TRISJ1:1; + unsigned TRISJ2:1; + unsigned TRISJ3:1; + unsigned TRISJ4:1; + unsigned TRISJ5:1; + unsigned TRISJ6:1; + unsigned TRISJ7:1; + }; +} __TRISJbits_t; + +extern volatile __TRISJbits_t __at (0xf9a) TRISJbits; + +extern __sfr __at (0xf9c) MEMCON; +typedef union { + struct { + unsigned WM0:1; + unsigned WM1:1; + unsigned :1; + unsigned :1; + unsigned WAIT0:1; + unsigned WAIT1:1; + unsigned :1; + unsigned EBDIS:1; + }; +} __MEMCONbits_t; + +extern volatile __MEMCONbits_t __at (0xf9c) MEMCONbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned CMIE:1; + unsigned :1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned CMIF:1; + unsigned :1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned CMIP:1; + unsigned :1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa3) PIE3; +typedef union { + struct { + unsigned CCP3IE:1; + unsigned CCP4IE:1; + unsigned CCP5IE:1; + unsigned TMR4IE:1; + unsigned TX2IE:1; + unsigned RC2IE:1; + unsigned :1; + unsigned :1; + }; +} __PIE3bits_t; + +extern volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +extern __sfr __at (0xfa4) PIR3; +typedef union { + struct { + unsigned CCP3IF:1; + unsigned CCP4IF:1; + unsigned CCP5IF:1; + unsigned TMR4IF:1; + unsigned TX2IF:1; + unsigned RC2IF:1; + unsigned :1; + unsigned :1; + }; +} __PIR3bits_t; + +extern volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +extern __sfr __at (0xfa5) IPR3; +typedef union { + struct { + unsigned CCP3IP:1; + unsigned CCP4IP:1; + unsigned CCP5IP:1; + unsigned TMR4IP:1; + unsigned TX2IP:1; + unsigned RC2IP:1; + unsigned :1; + unsigned :1; + }; +} __IPR3bits_t; + +extern volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfaa) EEADRH; +extern __sfr __at (0xfab) RCSTA1; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTA1bits_t; + +extern volatile __RCSTA1bits_t __at (0xfab) RCSTA1bits; + +extern __sfr __at (0xfac) TXSTA1; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTA1bits_t; + +extern volatile __TXSTA1bits_t __at (0xfac) TXSTA1bits; + +extern __sfr __at (0xfad) TXREG1; +extern __sfr __at (0xfae) RCREG1; +extern __sfr __at (0xfaf) SPBRG1; + +/* for compatibility reasons */ +extern __sfr __at (0xfab) RCSTA; +extern volatile __RCSTA1bits_t __at (0xfab) RCSTAbits; +extern __sfr __at (0xfac) TXSTA; +extern volatile __TXSTA1bits_t __at (0xfac) TXSTAbits; +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; + +extern __sfr __at (0xfb0) PSPCON; +typedef union { + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned PSPMODE:1; + unsigned IBOV:1; + unsigned OBF:1; + unsigned IBF:1; + }; +} __PSPCONbits_t; + +extern volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfb4) CMCON; +typedef union { + struct { + unsigned CM0:1; + unsigned CM1:1; + unsigned CM2:1; + unsigned CIS:1; + unsigned C1INV:1; + unsigned C2INV:1; + unsigned C1OUT:1; + unsigned C2OUT:1; + }; +} __CMCONbits_t; + +extern volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +extern __sfr __at (0xfb5) CVRCON; +typedef union { + struct { + unsigned CVR0:1; + unsigned CVR1:1; + unsigned CVR2:1; + unsigned CVR3:1; + unsigned CVREF:1; + unsigned CVRR:1; + unsigned CVROE:1; + unsigned CVREN:1; + }; +} __CVRCONbits_t; + +extern volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +extern __sfr __at (0xfb7) CCP3CON; +typedef union { + struct { + unsigned CCP3M0:1; + unsigned CCP3M1:1; + unsigned CCP3M2:1; + unsigned CCP3M3:1; + unsigned DCCP3Y:1; + unsigned DCCP3X:1; + unsigned :1; + unsigned :1; + }; +} __CCP3CONbits_t; + +extern volatile __CCP3CONbits_t __at (0xfb7) CCP3CONbits; + +extern __sfr __at (0xfb8) CCPR3L; +extern __sfr __at (0xfb9) CCPR3H; +extern __sfr __at (0xfba) CCP2CON; +typedef union { + struct { + unsigned CCP2M0:1; + unsigned CCP2M1:1; + unsigned CCP2M2:1; + unsigned CCP2M3:1; + unsigned DCCP2Y:1; + unsigned DCCP2X:1; + unsigned :1; + unsigned :1; + }; +} __CCP2CONbits_t; + +extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +extern __sfr __at (0xfbb) CCPR2L; +extern __sfr __at (0xfbc) CCPR2H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DCCP1Y:1; + unsigned DCCP1X:1; + unsigned :1; + unsigned :1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc0) ADCON2; +typedef union { + struct { + unsigned ADCS0:1; + unsigned ADCS1:1; + unsigned ADCS2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned ADFM:1; + }; +} __ADCON2bits_t; + +extern volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned VCFG0:1; + unsigned VCFG1:1; + unsigned :1; + unsigned :1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned CHS3:1; + unsigned :1; + unsigned :1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned INT2F:1; + unsigned INT3F:1; + unsigned INT1E:1; + unsigned INT2E:1; + unsigned INT3E:1; + unsigned INT1P:1; + unsigned INT2P:1; + }; + + struct { + unsigned INT1IF:1; + unsigned INT2IF:1; + unsigned INT3IF:1; + unsigned INT1IE:1; + unsigned INT2IE:1; + unsigned INT3IE:1; + unsigned INT1IP:1; + unsigned INT2IP:1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned INT3P:1; + unsigned T0IP:1; + unsigned INTEDG3:1; + unsigned INTEDG2:1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3L 0x300004 +#define __CONFIG3H 0x300005 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */ +#define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */ +#define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */ +#define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */ +#define _OSC_RC_1H 0xFB /* RC */ +#define _OSC_HS_1H 0xFA /* HS */ +#define _OSC_XT_1H 0xF9 /* XT */ +#define _OSC_LP_1H 0xF8 /* LP */ + +/* Osc. Switch Enable 1H options */ +#define _OSCS_OFF_1H 0xFF /* Disabled */ +#define _OSCS_ON_1H 0xDF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_5V_2L 0xFF /* 2.5V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_OFF_2H 0xFE /* Disabled */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_128_2H 0xFF /* 1:128 */ +#define _WDTPS_1_64_2H 0xFD /* 1:64 */ +#define _WDTPS_1_32_2H 0xFB /* 1:32 */ +#define _WDTPS_1_16_2H 0xF9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xF7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xF5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xF3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xF1 /* 1:1 */ + +/* Processor Mode 3L options */ +#define _PMODE_MICROCONTROLLER_3L 0xFF /* Microcontroller */ +#define _PMODE_MICROPROCESSOR__3L 0xFE /* Microprocessor */ +#define _PMODE_MICROPROCESSOR_w_Boot_3L 0xFD /* Microprocessor w_Boot */ +#define _PMODE_EXT_3L 0xFC /* Ext Microcontroller */ + +/* External Bus Wait 3L options */ +#define _WAIT_OFF_3L 0xFF /* Disabled */ +#define _WAIT_ON_3L 0x7F /* Enabled */ + +/* CCP2 Mux 3H options */ +#define _CCP2MUX_RC1_3H 0xFF /* RC1 */ +#define _CCP2MUX_RE7_MICROCONTROLLER__RB3_3H 0xFE /* RE7(Microcontroller)/RB3 */ + +/* Timer1 OSC 3H options */ +#define _T1OSCMX_LOW_3H 0xFD /* Low Power */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Code Protect 00800-01FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 02000-03FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Code Protect 04000-05FFF 5L options */ +#define _CP_2_OFF_5L 0xFF /* Disabled */ +#define _CP_2_ON_5L 0xFB /* Enabled */ + +/* Code Protect 06000-07FFF 5L options */ +#define _CP_3_OFF_5L 0xFF /* Disabled */ +#define _CP_3_ON_5L 0xF7 /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00800-01FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 02000-03FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Table Write Protect 04000-05FFF 6L options */ +#define _WRT_2_OFF_6L 0xFF /* Disabled */ +#define _WRT_2_ON_6L 0xFB /* Enabled */ + +/* Table Write Protect 06000-07FFF 6L options */ +#define _WRT_3_OFF_6L 0xFF /* Disabled */ +#define _WRT_3_ON_6L 0xF7 /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00800-01FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 02000-03FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect 04000-05FFF 7L options */ +#define _EBTR_2_OFF_7L 0xFF /* Disabled */ +#define _EBTR_2_ON_7L 0xFB /* Enabled */ + +/* Table Read Protect 06000-07FFF 7L options */ +#define _EBTR_3_OFF_7L 0xFF /* Disabled */ +#define _EBTR_3_ON_7L 0xF7 /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f8585.h b/device/include/pic16/pic18f8585.h new file mode 100644 index 0000000..4734b7d --- /dev/null +++ b/device/include/pic16/pic18f8585.h @@ -0,0 +1,6 @@ +/* + * pic18f8585.h - Device Library Header + */ + +#include "pic18f8680.h" + diff --git a/device/include/pic16/pic18f85j50.h b/device/include/pic16/pic18f85j50.h new file mode 100644 index 0000000..a3ff791 --- /dev/null +++ b/device/include/pic16/pic18f85j50.h @@ -0,0 +1,26 @@ +/* + * pic18f85j50.h - device specific declarations + */ + +#ifndef __PIC18F85J50_H__ +#define __PIC18F85J50_H__ 1 + +#include "pic18f87j50.h" + +#undef __CONFIG1L +#undef __CONFIG1H +#undef __CONFIG2L +#undef __CONFIG2H +#undef __CONFIG3L +#undef __CONFIG3H + +// Configuration Bits +#define __CONFIG1L 0x7FF8 +#define __CONFIG1H 0x7FF9 +#define __CONFIG2L 0x7FFA +#define __CONFIG2H 0x7FFB +#define __CONFIG3L 0x7FFC +#define __CONFIG3H 0x7FFD + +#endif + diff --git a/device/include/pic16/pic18f8620.h b/device/include/pic16/pic18f8620.h new file mode 100644 index 0000000..c37a8fa --- /dev/null +++ b/device/include/pic16/pic18f8620.h @@ -0,0 +1,1514 @@ + +/* + * pic18f8620.h - PIC18F8620 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f8620.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F8620_H__ +#define __PIC18F8620_H__ + +extern __sfr __at (0xf6b) RCSTA2; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTA2bits_t; + +extern volatile __RCSTA2bits_t __at (0xf6b) RCSTA2bits; + +extern __sfr __at (0xf6c) TXSTA2; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTA2bits_t; + +extern volatile __TXSTA2bits_t __at (0xf6c) TXSTA2bits; + +extern __sfr __at (0xf6d) TXREG2; +extern __sfr __at (0xf6e) RCREG2; +extern __sfr __at (0xf6f) SPBRG2; +extern __sfr __at (0xf70) CCP5CON; +typedef union { + struct { + unsigned CCP5M0:1; + unsigned CCP5M1:1; + unsigned CCP5M2:1; + unsigned CCP5M3:1; + unsigned DCCP5Y:1; + unsigned DCCP5X:1; + unsigned :1; + unsigned :1; + }; +} __CCP5CONbits_t; + +extern volatile __CCP5CONbits_t __at (0xf70) CCP5CONbits; + +extern __sfr __at (0xf71) CCPR5L; +extern __sfr __at (0xf72) CCPR5H; +extern __sfr __at (0xf73) CCP4CON; +typedef union { + struct { + unsigned CCP4M0:1; + unsigned CCP4M1:1; + unsigned CCP4M2:1; + unsigned CCP4M3:1; + unsigned DCCP4Y:1; + unsigned DCCP4X:1; + unsigned :1; + unsigned :1; + }; +} __CCP4CONbits_t; + +extern volatile __CCP4CONbits_t __at (0xf73) CCP4CONbits; + +extern __sfr __at (0xf74) CCPR4L; +extern __sfr __at (0xf75) CCPR4H; +extern __sfr __at (0xf76) T4CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T4CONbits_t; + +extern volatile __T4CONbits_t __at (0xf76) T4CONbits; + +extern __sfr __at (0xf77) PR4; +extern __sfr __at (0xf78) TMR4; +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned :1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned INT3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf83) PORTD; +typedef union { + struct { + unsigned RD0:1; + unsigned RD1:1; + unsigned RD2:1; + unsigned RD3:1; + unsigned RD4:1; + unsigned RD5:1; + unsigned RD6:1; + unsigned RD7:1; + }; + + struct { + unsigned AD0:1; + unsigned AD1:1; + unsigned AD2:1; + unsigned AD3:1; + unsigned AD4:1; + unsigned AD5:1; + unsigned AD6:1; + unsigned AD7:1; + }; +} __PORTDbits_t; + +extern volatile __PORTDbits_t __at (0xf83) PORTDbits; + +extern __sfr __at (0xf84) PORTE; +typedef union { + struct { + unsigned RE0:1; + unsigned RE1:1; + unsigned RE2:1; + unsigned RE3:1; + unsigned RE4:1; + unsigned RE5:1; + unsigned RE6:1; + unsigned RE7:1; + }; + + struct { + unsigned ALE:1; + unsigned OE:1; + unsigned WRL:1; + unsigned WRH:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned CCP2:1; + }; + + struct { + unsigned AN5:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTEbits_t; + +extern volatile __PORTEbits_t __at (0xf84) PORTEbits; + +extern __sfr __at (0xf85) PORTF; +typedef union { + struct { + unsigned RF0:1; + unsigned RF1:1; + unsigned RF2:1; + unsigned RF3:1; + unsigned RF4:1; + unsigned RF5:1; + unsigned RF6:1; + unsigned RF7:1; + }; +} __PORTFbits_t; + +extern volatile __PORTFbits_t __at (0xf85) PORTFbits; + +extern __sfr __at (0xf86) PORTG; +typedef union { + struct { + unsigned RG0:1; + unsigned RG1:1; + unsigned RG2:1; + unsigned RG3:1; + unsigned RG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTGbits_t; + +extern volatile __PORTGbits_t __at (0xf86) PORTGbits; + +extern __sfr __at (0xf87) PORTH; +typedef union { + struct { + unsigned RH0:1; + unsigned RH1:1; + unsigned RH2:1; + unsigned RH3:1; + unsigned RH4:1; + unsigned RH5:1; + unsigned RH6:1; + unsigned RH7:1; + }; +} __PORTHbits_t; + +extern volatile __PORTHbits_t __at (0xf87) PORTHbits; + +extern __sfr __at (0xf88) PORTJ; +typedef union { + struct { + unsigned RJ0:1; + unsigned RJ1:1; + unsigned RJ2:1; + unsigned RJ3:1; + unsigned RJ4:1; + unsigned RJ5:1; + unsigned RJ6:1; + unsigned RJ7:1; + }; +} __PORTJbits_t; + +extern volatile __PORTJbits_t __at (0xf88) PORTJbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf8c) LATD; +typedef union { + struct { + unsigned LATD0:1; + unsigned LATD1:1; + unsigned LATD2:1; + unsigned LATD3:1; + unsigned LATD4:1; + unsigned LATD5:1; + unsigned LATD6:1; + unsigned LATD7:1; + }; +} __LATDbits_t; + +extern volatile __LATDbits_t __at (0xf8c) LATDbits; + +extern __sfr __at (0xf8d) LATE; +typedef union { + struct { + unsigned LATE0:1; + unsigned LATE1:1; + unsigned LATE2:1; + unsigned LATE3:1; + unsigned LATE4:1; + unsigned LATE5:1; + unsigned LATE6:1; + unsigned LATE7:1; + }; +} __LATEbits_t; + +extern volatile __LATEbits_t __at (0xf8d) LATEbits; + +extern __sfr __at (0xf8e) LATF; +typedef union { + struct { + unsigned LATF0:1; + unsigned LATF1:1; + unsigned LATF2:1; + unsigned LATF3:1; + unsigned LATF4:1; + unsigned LATF5:1; + unsigned LATF6:1; + unsigned LATF7:1; + }; +} __LATFbits_t; + +extern volatile __LATFbits_t __at (0xf8e) LATFbits; + +extern __sfr __at (0xf8f) LATG; +typedef union { + struct { + unsigned LATG0:1; + unsigned LATG1:1; + unsigned LATG2:1; + unsigned LATG3:1; + unsigned LATG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __LATGbits_t; + +extern volatile __LATGbits_t __at (0xf8f) LATGbits; + +extern __sfr __at (0xf90) LATH; +typedef union { + struct { + unsigned LATH0:1; + unsigned LATH1:1; + unsigned LATH2:1; + unsigned LATH3:1; + unsigned LATH4:1; + unsigned LATH5:1; + unsigned LATH6:1; + unsigned LATH7:1; + }; +} __LATHbits_t; + +extern volatile __LATHbits_t __at (0xf90) LATHbits; + +extern __sfr __at (0xf91) LATJ; +typedef union { + struct { + unsigned LATJ0:1; + unsigned LATJ1:1; + unsigned LATJ2:1; + unsigned LATJ3:1; + unsigned LATJ4:1; + unsigned LATJ5:1; + unsigned LATJ6:1; + unsigned LATJ7:1; + }; +} __LATJbits_t; + +extern volatile __LATJbits_t __at (0xf91) LATJbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf95) TRISD; +typedef union { + struct { + unsigned TRISD0:1; + unsigned TRISD1:1; + unsigned TRISD2:1; + unsigned TRISD3:1; + unsigned TRISD4:1; + unsigned TRISD5:1; + unsigned TRISD6:1; + unsigned TRISD7:1; + }; +} __TRISDbits_t; + +extern volatile __TRISDbits_t __at (0xf95) TRISDbits; + +extern __sfr __at (0xf96) TRISE; +typedef union { + struct { + unsigned TRISE0:1; + unsigned TRISE1:1; + unsigned TRISE2:1; + unsigned TRISE3:1; + unsigned TRISE4:1; + unsigned TRISE5:1; + unsigned TRISE6:1; + unsigned TRISE7:1; + }; +} __TRISEbits_t; + +extern volatile __TRISEbits_t __at (0xf96) TRISEbits; + +extern __sfr __at (0xf97) TRISF; +typedef union { + struct { + unsigned TRISF0:1; + unsigned TRISF1:1; + unsigned TRISF2:1; + unsigned TRISF3:1; + unsigned TRISF4:1; + unsigned TRISF5:1; + unsigned TRISF6:1; + unsigned TRISF7:1; + }; +} __TRISFbits_t; + +extern volatile __TRISFbits_t __at (0xf97) TRISFbits; + +extern __sfr __at (0xf98) TRISG; +typedef union { + struct { + unsigned TRISG0:1; + unsigned TRISG1:1; + unsigned TRISG2:1; + unsigned TRISG3:1; + unsigned TRISG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __TRISGbits_t; + +extern volatile __TRISGbits_t __at (0xf98) TRISGbits; + +extern __sfr __at (0xf99) TRISH; +typedef union { + struct { + unsigned TRISH0:1; + unsigned TRISH1:1; + unsigned TRISH2:1; + unsigned TRISH3:1; + unsigned TRISH4:1; + unsigned TRISH5:1; + unsigned TRISH6:1; + unsigned TRISH7:1; + }; +} __TRISHbits_t; + +extern volatile __TRISHbits_t __at (0xf99) TRISHbits; + +extern __sfr __at (0xf9a) TRISJ; +typedef union { + struct { + unsigned TRISJ0:1; + unsigned TRISJ1:1; + unsigned TRISJ2:1; + unsigned TRISJ3:1; + unsigned TRISJ4:1; + unsigned TRISJ5:1; + unsigned TRISJ6:1; + unsigned TRISJ7:1; + }; +} __TRISJbits_t; + +extern volatile __TRISJbits_t __at (0xf9a) TRISJbits; + +extern __sfr __at (0xf9c) MEMCON; +typedef union { + struct { + unsigned WM0:1; + unsigned WM1:1; + unsigned :1; + unsigned :1; + unsigned WAIT0:1; + unsigned WAIT1:1; + unsigned :1; + unsigned EBDIS:1; + }; +} __MEMCONbits_t; + +extern volatile __MEMCONbits_t __at (0xf9c) MEMCONbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned CMIE:1; + unsigned :1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned CMIF:1; + unsigned :1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned CMIP:1; + unsigned :1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa3) PIE3; +typedef union { + struct { + unsigned CCP3IE:1; + unsigned CCP4IE:1; + unsigned CCP5IE:1; + unsigned TMR4IE:1; + unsigned TX2IE:1; + unsigned RC2IE:1; + unsigned :1; + unsigned :1; + }; +} __PIE3bits_t; + +extern volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +extern __sfr __at (0xfa4) PIR3; +typedef union { + struct { + unsigned CCP3IF:1; + unsigned CCP4IF:1; + unsigned CCP5IF:1; + unsigned TMR4IF:1; + unsigned TX2IF:1; + unsigned RC2IF:1; + unsigned :1; + unsigned :1; + }; +} __PIR3bits_t; + +extern volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +extern __sfr __at (0xfa5) IPR3; +typedef union { + struct { + unsigned CCP3IP:1; + unsigned CCP4IP:1; + unsigned CCP5IP:1; + unsigned TMR4IP:1; + unsigned TX2IP:1; + unsigned RC2IP:1; + unsigned :1; + unsigned :1; + }; +} __IPR3bits_t; + +extern volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfaa) EEADRH; +extern __sfr __at (0xfab) RCSTA1; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTA1bits_t; + +extern volatile __RCSTA1bits_t __at (0xfab) RCSTA1bits; + +extern __sfr __at (0xfac) TXSTA1; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTA1bits_t; + +extern volatile __TXSTA1bits_t __at (0xfac) TXSTA1bits; + +extern __sfr __at (0xfad) TXREG1; +extern __sfr __at (0xfae) RCREG1; +extern __sfr __at (0xfaf) SPBRG1; + +/* for compatibility reasons */ +extern __sfr __at (0xfab) RCSTA; +extern volatile __RCSTA1bits_t __at (0xfab) RCSTAbits; +extern __sfr __at (0xfac) TXSTA; +extern volatile __TXSTA1bits_t __at (0xfac) TXSTAbits; +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; + +extern __sfr __at (0xfb0) PSPCON; +typedef union { + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned PSPMODE:1; + unsigned IBOV:1; + unsigned OBF:1; + unsigned IBF:1; + }; +} __PSPCONbits_t; + +extern volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfb4) CMCON; +typedef union { + struct { + unsigned CM0:1; + unsigned CM1:1; + unsigned CM2:1; + unsigned CIS:1; + unsigned C1INV:1; + unsigned C2INV:1; + unsigned C1OUT:1; + unsigned C2OUT:1; + }; +} __CMCONbits_t; + +extern volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +extern __sfr __at (0xfb5) CVRCON; +typedef union { + struct { + unsigned CVR0:1; + unsigned CVR1:1; + unsigned CVR2:1; + unsigned CVR3:1; + unsigned CVREF:1; + unsigned CVRR:1; + unsigned CVROE:1; + unsigned CVREN:1; + }; +} __CVRCONbits_t; + +extern volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +extern __sfr __at (0xfb7) CCP3CON; +typedef union { + struct { + unsigned CCP3M0:1; + unsigned CCP3M1:1; + unsigned CCP3M2:1; + unsigned CCP3M3:1; + unsigned DCCP3Y:1; + unsigned DCCP3X:1; + unsigned :1; + unsigned :1; + }; +} __CCP3CONbits_t; + +extern volatile __CCP3CONbits_t __at (0xfb7) CCP3CONbits; + +extern __sfr __at (0xfb8) CCPR3L; +extern __sfr __at (0xfb9) CCPR3H; +extern __sfr __at (0xfba) CCP2CON; +typedef union { + struct { + unsigned CCP2M0:1; + unsigned CCP2M1:1; + unsigned CCP2M2:1; + unsigned CCP2M3:1; + unsigned DCCP2Y:1; + unsigned DCCP2X:1; + unsigned :1; + unsigned :1; + }; +} __CCP2CONbits_t; + +extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +extern __sfr __at (0xfbb) CCPR2L; +extern __sfr __at (0xfbc) CCPR2H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DCCP1Y:1; + unsigned DCCP1X:1; + unsigned :1; + unsigned :1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc0) ADCON2; +typedef union { + struct { + unsigned ADCS0:1; + unsigned ADCS1:1; + unsigned ADCS2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned ADFM:1; + }; +} __ADCON2bits_t; + +extern volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned VCFG0:1; + unsigned VCFG1:1; + unsigned :1; + unsigned :1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned CHS3:1; + unsigned :1; + unsigned :1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned INT2F:1; + unsigned INT3F:1; + unsigned INT1E:1; + unsigned INT2E:1; + unsigned INT3E:1; + unsigned INT1P:1; + unsigned INT2P:1; + }; + + struct { + unsigned INT1IF:1; + unsigned INT2IF:1; + unsigned INT3IF:1; + unsigned INT1IE:1; + unsigned INT2IE:1; + unsigned INT3IE:1; + unsigned INT1IP:1; + unsigned INT2IP:1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned INT3P:1; + unsigned T0IP:1; + unsigned INTEDG3:1; + unsigned INTEDG2:1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3L 0x300004 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */ +#define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */ +#define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */ +#define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */ +#define _OSC_RC_1H 0xFB /* RC */ +#define _OSC_HS_1H 0xFA /* HS */ +#define _OSC_XT_1H 0xF9 /* XT */ +#define _OSC_LP_1H 0xF8 /* LP */ + +/* Osc. Switch Enable 1H options */ +#define _OSCS_OFF_1H 0xFF /* Disabled */ +#define _OSCS_ON_1H 0xDF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_5V_2L 0xFF /* 2.5V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_OFF_2H 0xFE /* Disabled */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_128_2H 0xFF /* 1:128 */ +#define _WDTPS_1_64_2H 0xFD /* 1:64 */ +#define _WDTPS_1_32_2H 0xFB /* 1:32 */ +#define _WDTPS_1_16_2H 0xF9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xF7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xF5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xF3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xF1 /* 1:1 */ + +/* Processor Mode 3L options */ +#define _PMODE_MICROCONTROLLER_3L 0xFF /* Microcontroller */ +#define _PMODE_MICROPROCESSOR__3L 0xFE /* Microprocessor */ +#define _PMODE_MICROPROCESSOR_w_Boot_3L 0xFD /* Microprocessor w_Boot */ +#define _PMODE_EXT_3L 0xFC /* Ext Microcontroller */ + +/* External Bus Wait 3L options */ +#define _WAIT_OFF_3L 0xFF /* Disabled */ +#define _WAIT_ON_3L 0x7F /* Enabled */ + +/* CCP2 Mux 3H options */ +#define _CCP2MUX_RC1_3H 0xFF /* RC1 */ +#define _CCP2MUX_RE7_MICROCONTROLLER__RB3_3H 0xFE /* RE7(Microcontroller)/RB3 */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Code Protect 00200-03FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 04000-07FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Code Protect 08000-0BFFF 5L options */ +#define _CP_2_OFF_5L 0xFF /* Disabled */ +#define _CP_2_ON_5L 0xFB /* Enabled */ + +/* Code Protect 0C000-0FFFF 5L options */ +#define _CP_3_OFF_5L 0xFF /* Disabled */ +#define _CP_3_ON_5L 0xF7 /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00200-03FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 04000-07FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Table Write Protect 08000-0BFFF 6L options */ +#define _WRT_2_OFF_6L 0xFF /* Disabled */ +#define _WRT_2_ON_6L 0xFB /* Enabled */ + +/* Table Write Protect 0C000-0FFFF 6L options */ +#define _WRT_3_OFF_6L 0xFF /* Disabled */ +#define _WRT_3_ON_6L 0xF7 /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00200-03FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 04000-07FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect 08000-0BFFF 7L options */ +#define _EBTR_2_OFF_7L 0xFF /* Disabled */ +#define _EBTR_2_ON_7L 0xFB /* Enabled */ + +/* Table Read Protect 0C000-0FFFF 7L options */ +#define _EBTR_3_OFF_7L 0xFF /* Disabled */ +#define _EBTR_3_ON_7L 0xF7 /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f8680.h b/device/include/pic16/pic18f8680.h new file mode 100644 index 0000000..083539a --- /dev/null +++ b/device/include/pic16/pic18f8680.h @@ -0,0 +1,2014 @@ + +/* + * pic18f8680.h - PIC18F8680 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f8680.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F8680_H__ +#define __PIC18F8680_H__ + +extern __sfr __at (0xf00) RXF0SIDH; +extern __sfr __at (0xf01) RXF0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF0SIDLbits_t; + +extern volatile __RXF0SIDLbits_t __at (0xf01) RXF0SIDLbits; + +extern __sfr __at (0xf02) RXF0EIDH; +extern __sfr __at (0xf03) RXF0EIDL; +extern __sfr __at (0xf04) RXF1SIDH; +extern __sfr __at (0xf05) RXF1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF1SIDLbits_t; + +extern volatile __RXF1SIDLbits_t __at (0xf05) RXF1SIDLbits; + +extern __sfr __at (0xf06) RXF1EIDH; +extern __sfr __at (0xf07) RXF1EIDL; +extern __sfr __at (0xf08) RXF2SIDH; +extern __sfr __at (0xf09) RXF2SIDL; +extern __sfr __at (0xf0a) RXF2EIDH; +extern __sfr __at (0xf0b) RXF2EIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF2EIDLbits_t; + +extern volatile __RXF2EIDLbits_t __at (0xf0b) RXF2EIDLbits; + +extern __sfr __at (0xf0c) RXF3SIDH; +extern __sfr __at (0xf0d) RXF3SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF3SIDLbits_t; + +extern volatile __RXF3SIDLbits_t __at (0xf0d) RXF3SIDLbits; + +extern __sfr __at (0xf0e) RXF3EIDH; +extern __sfr __at (0xf0f) RXF3EIDL; +extern __sfr __at (0xf10) RXF4SIDH; +extern __sfr __at (0xf11) RXF4SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF4SIDLbits_t; + +extern volatile __RXF4SIDLbits_t __at (0xf11) RXF4SIDLbits; + +extern __sfr __at (0xf12) RXF4EIDH; +extern __sfr __at (0xf13) RXF4EIDL; +extern __sfr __at (0xf14) RXF5SIDH; +extern __sfr __at (0xf15) RXF5SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXIDE:1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXF5SIDLbits_t; + +extern volatile __RXF5SIDLbits_t __at (0xf15) RXF5SIDLbits; + +extern __sfr __at (0xf16) RXF5EIDH; +extern __sfr __at (0xf17) RXF5EIDL; +extern __sfr __at (0xf18) RXM0SIDH; +extern __sfr __at (0xf19) RXM0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXM0SIDLbits_t; + +extern volatile __RXM0SIDLbits_t __at (0xf19) RXM0SIDLbits; + +extern __sfr __at (0xf1a) RXM0EIDH; +extern __sfr __at (0xf1b) RXM0EIDL; +extern __sfr __at (0xf1c) RXM1SIDH; +extern __sfr __at (0xf1d) RXM1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXM1SIDLbits_t; + +extern volatile __RXM1SIDLbits_t __at (0xf1d) RXM1SIDLbits; + +extern __sfr __at (0xf1e) RXM1EIDH; +extern __sfr __at (0xf1f) RXM1EIDL; +extern __sfr __at (0xf20) TXB2CON; +typedef union { + struct { + unsigned TXPRI0:1; + unsigned TXPRI1:1; + unsigned :1; + unsigned TXREQ:1; + unsigned TXERR:1; + unsigned TXLARB:1; + unsigned TXABT:1; + unsigned :1; + }; +} __TXB2CONbits_t; + +extern volatile __TXB2CONbits_t __at (0xf20) TXB2CONbits; + +extern __sfr __at (0xf21) TXB2SIDH; +extern __sfr __at (0xf22) TXB2SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXID:1; + unsigned SRR:1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __TXB2SIDLbits_t; + +extern volatile __TXB2SIDLbits_t __at (0xf22) TXB2SIDLbits; + +extern __sfr __at (0xf23) TXB2EIDH; +extern __sfr __at (0xf24) TXB2EIDL; +extern __sfr __at (0xf25) TXB2DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned :1; + unsigned :1; + unsigned RTR:1; + unsigned :1; + }; +} __TXB2DLCbits_t; + +extern volatile __TXB2DLCbits_t __at (0xf25) TXB2DLCbits; + +extern __sfr __at (0xf26) TXB2D0; +extern __sfr __at (0xf27) TXB2D1; +extern __sfr __at (0xf28) TXB2D2; +extern __sfr __at (0xf29) TXB2D3; +extern __sfr __at (0xf2a) TXB2D4; +extern __sfr __at (0xf2b) TXB2D5; +extern __sfr __at (0xf2c) TXB2D6; +extern __sfr __at (0xf2d) TXB2D7; +extern __sfr __at (0xf2e) CANSTATRO3; +extern __sfr __at (0xf30) TXB1CON; +typedef union { + struct { + unsigned TXPRI0:1; + unsigned TXPRI1:1; + unsigned :1; + unsigned TXREQ:1; + unsigned TXERR:1; + unsigned TXLARB:1; + unsigned TXABT:1; + unsigned :1; + }; +} __TXB1CONbits_t; + +extern volatile __TXB1CONbits_t __at (0xf30) TXB1CONbits; + +extern __sfr __at (0xf31) TXB1SIDH; +extern __sfr __at (0xf32) TXB1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXID:1; + unsigned SRR:1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __TXB1SIDLbits_t; + +extern volatile __TXB1SIDLbits_t __at (0xf32) TXB1SIDLbits; + +extern __sfr __at (0xf33) TXB1EIDH; +extern __sfr __at (0xf34) TXB1EIDL; +extern __sfr __at (0xf35) TXB1DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned :1; + unsigned :1; + unsigned RTR:1; + unsigned :1; + }; +} __TXB1DLCbits_t; + +extern volatile __TXB1DLCbits_t __at (0xf35) TXB1DLCbits; + +extern __sfr __at (0xf36) TXB1D0; +extern __sfr __at (0xf37) TXB1D1; +extern __sfr __at (0xf38) TXB1D2; +extern __sfr __at (0xf39) TXB1D3; +extern __sfr __at (0xf3a) TXB1D4; +extern __sfr __at (0xf3b) TXB1D5; +extern __sfr __at (0xf3c) TXB1D6; +extern __sfr __at (0xf3d) TXB1D7; +extern __sfr __at (0xf3e) CANSTATRO2; +extern __sfr __at (0xf40) TXB0CON; +typedef union { + struct { + unsigned TXPRI0:1; + unsigned TXPRI1:1; + unsigned :1; + unsigned TXREQ:1; + unsigned TXERR:1; + unsigned TXLARB:1; + unsigned TXABT:1; + unsigned :1; + }; +} __TXB0CONbits_t; + +extern volatile __TXB0CONbits_t __at (0xf40) TXB0CONbits; + +extern __sfr __at (0xf41) TXB0SIDH; +extern __sfr __at (0xf42) TXB0SIDL; +extern __sfr __at (0xf43) TXB0EIDH; +extern __sfr __at (0xf44) TXB0EIDL; +extern __sfr __at (0xf45) TXB0DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned :1; + unsigned :1; + unsigned RTR:1; + unsigned :1; + }; +} __TXB0DLCbits_t; + +extern volatile __TXB0DLCbits_t __at (0xf45) TXB0DLCbits; + +extern __sfr __at (0xf46) TXB0D0; +extern __sfr __at (0xf47) TXB0D1; +extern __sfr __at (0xf48) TXB0D2; +extern __sfr __at (0xf49) TXB0D3; +extern __sfr __at (0xf4a) TXB0D4; +extern __sfr __at (0xf4b) TXB0D5; +extern __sfr __at (0xf4c) TXB0D6; +extern __sfr __at (0xf4d) TXB0D7; +extern __sfr __at (0xf4e) CANSTATRO1; +extern __sfr __at (0xf50) RXB1CON; +typedef union { + struct { + unsigned :1; + unsigned FILHIT1:1; + unsigned FILHIT2:1; + unsigned RXRTRRO:1; + unsigned :1; + unsigned RXM0:1; + unsigned RXM1:1; + unsigned RXFUL:1; + }; +} __RXB1CONbits_t; + +extern volatile __RXB1CONbits_t __at (0xf50) RXB1CONbits; + +extern __sfr __at (0xf51) RXB1SIDH; +extern __sfr __at (0xf52) RXB1SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXID:1; + unsigned SRR:1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXB1SIDLbits_t; + +extern volatile __RXB1SIDLbits_t __at (0xf52) RXB1SIDLbits; + +extern __sfr __at (0xf53) RXB1EIDH; +extern __sfr __at (0xf54) RXB1EIDL; +extern __sfr __at (0xf55) RXB1DLC; +typedef union { + struct { + unsigned DLC0:1; + unsigned DLC1:1; + unsigned DLC2:1; + unsigned DLC3:1; + unsigned RESB0:1; + unsigned RESB1:1; + unsigned RTR:1; + unsigned :1; + }; +} __RXB1DLCbits_t; + +extern volatile __RXB1DLCbits_t __at (0xf55) RXB1DLCbits; + +extern __sfr __at (0xf56) RXB1D0; +extern __sfr __at (0xf57) RXB1D1; +extern __sfr __at (0xf58) RXB1D2; +extern __sfr __at (0xf59) RXB1D3; +extern __sfr __at (0xf5a) RXB1D4; +extern __sfr __at (0xf5b) RXB1D5; +extern __sfr __at (0xf5c) RXB1D6; +extern __sfr __at (0xf5d) RXB1D7; +extern __sfr __at (0xf5e) CANSTATRO0; +extern __sfr __at (0xf60) RXB0CON; +typedef union { + struct { + unsigned FILHIT0:1; + unsigned JTOFF:1; + unsigned RX0DBEN:1; + unsigned RXRTRRO:1; + unsigned :1; + unsigned RXM0:1; + unsigned RXM1:1; + unsigned RXFUL:1; + }; +} __RXB0CONbits_t; + +extern volatile __RXB0CONbits_t __at (0xf60) RXB0CONbits; + +extern __sfr __at (0xf61) RXB0SIDH; +extern __sfr __at (0xf62) RXB0SIDL; +typedef union { + struct { + unsigned EID16:1; + unsigned EID17:1; + unsigned :1; + unsigned EXID:1; + unsigned SRR:1; + unsigned SID0:1; + unsigned SID1:1; + unsigned SID2:1; + }; +} __RXB0SIDLbits_t; + +extern volatile __RXB0SIDLbits_t __at (0xf62) RXB0SIDLbits; + +extern __sfr __at (0xf63) RXB0EIDH; +extern __sfr __at (0xf64) RXB0EIDL; +extern __sfr __at (0xf65) RXB0DLC; +extern __sfr __at (0xf66) RXB0D0; +extern __sfr __at (0xf67) RXB0D1; +extern __sfr __at (0xf68) RXB0D2; +extern __sfr __at (0xf69) RXB0D3; +extern __sfr __at (0xf6a) RXB0D4; +extern __sfr __at (0xf6b) RXB0D5; +extern __sfr __at (0xf6c) RXB0D6; +extern __sfr __at (0xf6d) RXB0D7; +extern __sfr __at (0xf6e) CANSTAT; +typedef union { + struct { + unsigned :1; + unsigned ICODE0:1; + unsigned ICODE1:1; + unsigned ICODE2:1; + unsigned :1; + unsigned OPMODE0:1; + unsigned OPMODE1:1; + unsigned OPMODE2:1; + }; +} __CANSTATbits_t; + +extern volatile __CANSTATbits_t __at (0xf6e) CANSTATbits; + +extern __sfr __at (0xf6f) CANCON; +typedef union { + struct { + unsigned :1; + unsigned WIN0:1; + unsigned WIN1:1; + unsigned WIN2:1; + unsigned ABAT:1; + unsigned REQOP0:1; + unsigned REQOP1:1; + unsigned REQOP2:1; + }; +} __CANCONbits_t; + +extern volatile __CANCONbits_t __at (0xf6f) CANCONbits; + +extern __sfr __at (0xf70) BRGCON1; +typedef union { + struct { + unsigned BRP0:1; + unsigned BRP1:1; + unsigned BRP2:1; + unsigned BRP3:1; + unsigned BRP4:1; + unsigned BRP5:1; + unsigned SJW0:1; + unsigned SJW1:1; + }; +} __BRGCON1bits_t; + +extern volatile __BRGCON1bits_t __at (0xf70) BRGCON1bits; + +extern __sfr __at (0xf71) BRGCON2; +typedef union { + struct { + unsigned PRSEG0:1; + unsigned PRSEG1:1; + unsigned PRSEG2:1; + unsigned SEG1PH0:1; + unsigned SEG1PH1:1; + unsigned SEG1PH2:1; + unsigned SAM:1; + unsigned SEG2PHTS:1; + }; +} __BRGCON2bits_t; + +extern volatile __BRGCON2bits_t __at (0xf71) BRGCON2bits; + +extern __sfr __at (0xf72) BRGCON3; +typedef union { + struct { + unsigned SEG2PH0:1; + unsigned SEG2PH1:1; + unsigned SEG2PH2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned WAKFIL:1; + unsigned :1; + }; +} __BRGCON3bits_t; + +extern volatile __BRGCON3bits_t __at (0xf72) BRGCON3bits; + +extern __sfr __at (0xf73) CIOCON; +typedef union { + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned CANCAP:1; + unsigned ENDRHI:1; + unsigned TX1EN:1; + unsigned TX1SRC:1; + }; +} __CIOCONbits_t; + +extern volatile __CIOCONbits_t __at (0xf73) CIOCONbits; + +extern __sfr __at (0xf74) COMSTAT; +typedef union { + struct { + unsigned EWARN:1; + unsigned RXWARN:1; + unsigned TXWARN:1; + unsigned RXBP:1; + unsigned TXBP:1; + unsigned TXBO:1; + unsigned RX1OVFL:1; + unsigned RX0OVFL:1; + }; +} __COMSTATbits_t; + +extern volatile __COMSTATbits_t __at (0xf74) COMSTATbits; + +extern __sfr __at (0xf75) RXERRCNT; +typedef union { + struct { + unsigned REC0:1; + unsigned REC1:1; + unsigned REC2:1; + unsigned REC3:1; + unsigned REC4:1; + unsigned REC5:1; + unsigned REC6:1; + unsigned REC7:1; + }; +} __RXERRCNTbits_t; + +extern volatile __RXERRCNTbits_t __at (0xf75) RXERRCNTbits; + +extern __sfr __at (0xf76) TXERRCNT; +typedef union { + struct { + unsigned TEC0:1; + unsigned TEC1:1; + unsigned TEC2:1; + unsigned TEC3:1; + unsigned TEC4:1; + unsigned TEC5:1; + unsigned TEC6:1; + unsigned TEC7:1; + }; +} __TXERRCNTbits_t; + +extern volatile __TXERRCNTbits_t __at (0xf76) TXERRCNTbits; + +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned :1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned INT3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf83) PORTD; +typedef union { + struct { + unsigned RD0:1; + unsigned RD1:1; + unsigned RD2:1; + unsigned RD3:1; + unsigned RD4:1; + unsigned RD5:1; + unsigned RD6:1; + unsigned RD7:1; + }; + + struct { + unsigned AD0:1; + unsigned AD1:1; + unsigned AD2:1; + unsigned AD3:1; + unsigned AD4:1; + unsigned AD5:1; + unsigned AD6:1; + unsigned AD7:1; + }; +} __PORTDbits_t; + +extern volatile __PORTDbits_t __at (0xf83) PORTDbits; + +extern __sfr __at (0xf84) PORTE; +typedef union { + struct { + unsigned RE0:1; + unsigned RE1:1; + unsigned RE2:1; + unsigned RE3:1; + unsigned RE4:1; + unsigned RE5:1; + unsigned RE6:1; + unsigned RE7:1; + }; + + struct { + unsigned ALE:1; + unsigned OE:1; + unsigned WRL:1; + unsigned WRH:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned CCP2:1; + }; + + struct { + unsigned AN5:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTEbits_t; + +extern volatile __PORTEbits_t __at (0xf84) PORTEbits; + +extern __sfr __at (0xf85) PORTF; +typedef union { + struct { + unsigned RF0:1; + unsigned RF1:1; + unsigned RF2:1; + unsigned RF3:1; + unsigned RF4:1; + unsigned RF5:1; + unsigned RF6:1; + unsigned RF7:1; + }; +} __PORTFbits_t; + +extern volatile __PORTFbits_t __at (0xf85) PORTFbits; + +extern __sfr __at (0xf86) PORTG; +typedef union { + struct { + unsigned RG0:1; + unsigned RG1:1; + unsigned RG2:1; + unsigned RG3:1; + unsigned RG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTGbits_t; + +extern volatile __PORTGbits_t __at (0xf86) PORTGbits; + +extern __sfr __at (0xf87) PORTH; +typedef union { + struct { + unsigned RH0:1; + unsigned RH1:1; + unsigned RH2:1; + unsigned RH3:1; + unsigned RH4:1; + unsigned RH5:1; + unsigned RH6:1; + unsigned RH7:1; + }; +} __PORTHbits_t; + +extern volatile __PORTHbits_t __at (0xf87) PORTHbits; + +extern __sfr __at (0xf88) PORTJ; +typedef union { + struct { + unsigned RJ0:1; + unsigned RJ1:1; + unsigned RJ2:1; + unsigned RJ3:1; + unsigned RJ4:1; + unsigned RJ5:1; + unsigned RJ6:1; + unsigned RJ7:1; + }; +} __PORTJbits_t; + +extern volatile __PORTJbits_t __at (0xf88) PORTJbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf8c) LATD; +typedef union { + struct { + unsigned LATD0:1; + unsigned LATD1:1; + unsigned LATD2:1; + unsigned LATD3:1; + unsigned LATD4:1; + unsigned LATD5:1; + unsigned LATD6:1; + unsigned LATD7:1; + }; +} __LATDbits_t; + +extern volatile __LATDbits_t __at (0xf8c) LATDbits; + +extern __sfr __at (0xf8d) LATE; +typedef union { + struct { + unsigned LATE0:1; + unsigned LATE1:1; + unsigned LATE2:1; + unsigned LATE3:1; + unsigned LATE4:1; + unsigned LATE5:1; + unsigned LATE6:1; + unsigned LATE7:1; + }; +} __LATEbits_t; + +extern volatile __LATEbits_t __at (0xf8d) LATEbits; + +extern __sfr __at (0xf8e) LATF; +typedef union { + struct { + unsigned LATF0:1; + unsigned LATF1:1; + unsigned LATF2:1; + unsigned LATF3:1; + unsigned LATF4:1; + unsigned LATF5:1; + unsigned LATF6:1; + unsigned LATF7:1; + }; +} __LATFbits_t; + +extern volatile __LATFbits_t __at (0xf8e) LATFbits; + +extern __sfr __at (0xf8f) LATG; +typedef union { + struct { + unsigned LATG0:1; + unsigned LATG1:1; + unsigned LATG2:1; + unsigned LATG3:1; + unsigned LATG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __LATGbits_t; + +extern volatile __LATGbits_t __at (0xf8f) LATGbits; + +extern __sfr __at (0xf90) LATH; +typedef union { + struct { + unsigned LATH0:1; + unsigned LATH1:1; + unsigned LATH2:1; + unsigned LATH3:1; + unsigned LATH4:1; + unsigned LATH5:1; + unsigned LATH6:1; + unsigned LATH7:1; + }; +} __LATHbits_t; + +extern volatile __LATHbits_t __at (0xf90) LATHbits; + +extern __sfr __at (0xf91) LATJ; +typedef union { + struct { + unsigned LATJ0:1; + unsigned LATJ1:1; + unsigned LATJ2:1; + unsigned LATJ3:1; + unsigned LATJ4:1; + unsigned LATJ5:1; + unsigned LATJ6:1; + unsigned LATJ7:1; + }; +} __LATJbits_t; + +extern volatile __LATJbits_t __at (0xf91) LATJbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf95) TRISD; +typedef union { + struct { + unsigned TRISD0:1; + unsigned TRISD1:1; + unsigned TRISD2:1; + unsigned TRISD3:1; + unsigned TRISD4:1; + unsigned TRISD5:1; + unsigned TRISD6:1; + unsigned TRISD7:1; + }; +} __TRISDbits_t; + +extern volatile __TRISDbits_t __at (0xf95) TRISDbits; + +extern __sfr __at (0xf96) TRISE; +typedef union { + struct { + unsigned TRISE0:1; + unsigned TRISE1:1; + unsigned TRISE2:1; + unsigned TRISE3:1; + unsigned TRISE4:1; + unsigned TRISE5:1; + unsigned TRISE6:1; + unsigned TRISE7:1; + }; +} __TRISEbits_t; + +extern volatile __TRISEbits_t __at (0xf96) TRISEbits; + +extern __sfr __at (0xf97) TRISF; +typedef union { + struct { + unsigned TRISF0:1; + unsigned TRISF1:1; + unsigned TRISF2:1; + unsigned TRISF3:1; + unsigned TRISF4:1; + unsigned TRISF5:1; + unsigned TRISF6:1; + unsigned TRISF7:1; + }; +} __TRISFbits_t; + +extern volatile __TRISFbits_t __at (0xf97) TRISFbits; + +extern __sfr __at (0xf98) TRISG; +typedef union { + struct { + unsigned TRISG0:1; + unsigned TRISG1:1; + unsigned TRISG2:1; + unsigned TRISG3:1; + unsigned TRISG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __TRISGbits_t; + +extern volatile __TRISGbits_t __at (0xf98) TRISGbits; + +extern __sfr __at (0xf99) TRISH; +typedef union { + struct { + unsigned TRISH0:1; + unsigned TRISH1:1; + unsigned TRISH2:1; + unsigned TRISH3:1; + unsigned TRISH4:1; + unsigned TRISH5:1; + unsigned TRISH6:1; + unsigned TRISH7:1; + }; +} __TRISHbits_t; + +extern volatile __TRISHbits_t __at (0xf99) TRISHbits; + +extern __sfr __at (0xf9a) TRISJ; +typedef union { + struct { + unsigned TRISJ0:1; + unsigned TRISJ1:1; + unsigned TRISJ2:1; + unsigned TRISJ3:1; + unsigned TRISJ4:1; + unsigned TRISJ5:1; + unsigned TRISJ6:1; + unsigned TRISJ7:1; + }; +} __TRISJbits_t; + +extern volatile __TRISJbits_t __at (0xf9a) TRISJbits; + +extern __sfr __at (0xf9c) MEMCON; +typedef union { + struct { + unsigned WM0:1; + unsigned WM1:1; + unsigned :1; + unsigned :1; + unsigned WAIT0:1; + unsigned WAIT1:1; + unsigned :1; + unsigned EBDIS:1; + }; +} __MEMCONbits_t; + +extern volatile __MEMCONbits_t __at (0xf9c) MEMCONbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned CMIE:1; + unsigned :1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned CMIF:1; + unsigned :1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned CMIP:1; + unsigned :1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa3) PIE3; +typedef union { + struct { + unsigned RX0IE:1; + unsigned RX1IE:1; + unsigned TX0IE:1; + unsigned TX1IE:1; + unsigned TX2IE:1; + unsigned ERRIE:1; + unsigned WAKIE:1; + unsigned IVRE:1; + }; +} __PIE3bits_t; + +extern volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +extern __sfr __at (0xfa4) PIR3; +typedef union { + struct { + unsigned RX0IF:1; + unsigned RX1IF:1; + unsigned TX0IF:1; + unsigned TX1IF:1; + unsigned TX2IF:1; + unsigned ERRIF:1; + unsigned WAKIF:1; + unsigned IVRF:1; + }; +} __PIR3bits_t; + +extern volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +extern __sfr __at (0xfa5) IPR3; +typedef union { + struct { + unsigned RX0IP:1; + unsigned RX1IP:1; + unsigned TX0IP:1; + unsigned TX1IP:1; + unsigned TX2IP:1; + unsigned ERRIP:1; + unsigned WAKIP:1; + unsigned IVRP:1; + }; +} __IPR3bits_t; + +extern volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfaa) EEADRH; +extern __sfr __at (0xfab) RCSTA; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTAbits_t; + +extern volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +extern __sfr __at (0xfac) TXSTA; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTAbits_t; + +extern volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; +extern __sfr __at (0xfb0) PSPCON; +typedef union { + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned PSPMODE:1; + unsigned IBOV:1; + unsigned OBF:1; + unsigned IBF:1; + }; +} __PSPCONbits_t; + +extern volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfb4) CMCON; +typedef union { + struct { + unsigned CM0:1; + unsigned CM1:1; + unsigned CM2:1; + unsigned CIS:1; + unsigned C1INV:1; + unsigned C2INV:1; + unsigned C1OUT:1; + unsigned C2OUT:1; + }; +} __CMCONbits_t; + +extern volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +extern __sfr __at (0xfb5) CVRCON; +typedef union { + struct { + unsigned CVR0:1; + unsigned CVR1:1; + unsigned CVR2:1; + unsigned CVR3:1; + unsigned CVREF:1; + unsigned CVRR:1; + unsigned CVROE:1; + unsigned CVREN:1; + }; +} __CVRCONbits_t; + +extern volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +extern __sfr __at (0xfb6) ECCPAS; +typedef union { + struct { + unsigned PSSBD0:1; + unsigned PSSBD1:1; + unsigned PSSAC0:1; + unsigned PSSAC1:1; + unsigned ECCPAS0:1; + unsigned ECCPAS1:1; + unsigned ECCPAS2:1; + unsigned ECCPASE:1; + }; +} __ECCPASbits_t; + +extern volatile __ECCPASbits_t __at (0xfb6) ECCPASbits; + +extern __sfr __at (0xfb7) ECCP1DEL; +typedef union { + struct { + unsigned EPDC0:1; + unsigned EPDC1:1; + unsigned EPDC2:1; + unsigned EPDC3:1; + unsigned EPDC4:1; + unsigned EPDC5:1; + unsigned EPDC6:1; + unsigned EPDC7:1; + }; +} __ECCP1DELbits_t; + +extern volatile __ECCP1DELbits_t __at (0xfb7) ECCP1DELbits; + +extern __sfr __at (0xfba) ECCP1CON; +typedef union { + struct { + unsigned ECCP1M0:1; + unsigned ECCP1M1:1; + unsigned ECCP1M2:1; + unsigned ECCP1M3:1; + unsigned EDC1B0:1; + unsigned EDC1B1:1; + unsigned EPWM1M0:1; + unsigned EPWM1M1:1; + }; +} __ECCP1CONbits_t; + +extern volatile __ECCP1CONbits_t __at (0xfba) ECCP1CONbits; + +extern __sfr __at (0xfba) CCP2CON; +typedef union { + struct { + unsigned CCP2M0:1; + unsigned CCP2M1:1; + unsigned CCP2M2:1; + unsigned CCP2M3:1; + unsigned DCCP2Y:1; + unsigned DCCP2X:1; + unsigned :1; + unsigned :1; + }; +} __CCP2CONbits_t; + +extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +extern __sfr __at (0xfbb) ECCPR1L; +extern __sfr __at (0xfbb) CCPR2L; +extern __sfr __at (0xfbc) ECCPR1H; +extern __sfr __at (0xfbc) CCPR2H; +extern __sfr __at (0xfc0) ADCON2; +typedef union { + struct { + unsigned ADCS0:1; + unsigned ADCS1:1; + unsigned ADCS2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned ADFM:1; + }; +} __ADCON2bits_t; + +extern volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned VCFG0:1; + unsigned VCFG1:1; + unsigned :1; + unsigned :1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned CHS3:1; + unsigned :1; + unsigned :1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned INT2F:1; + unsigned INT3F:1; + unsigned INT1E:1; + unsigned INT2E:1; + unsigned INT3E:1; + unsigned INT1P:1; + unsigned INT2P:1; + }; + + struct { + unsigned INT1IF:1; + unsigned INT2IF:1; + unsigned INT3IF:1; + unsigned INT1IE:1; + unsigned INT2IE:1; + unsigned INT3IE:1; + unsigned INT1IP:1; + unsigned INT2IP:1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned INT3P:1; + unsigned T0IP:1; + unsigned INTEDG3:1; + unsigned INTEDG2:1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3L 0x300004 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_RC_CLKOUT_1H 0xFF /* RC-CLKOUT on RA6 */ +#define _OSC_HS_SOFTWARE_1H 0xFE /* HS-Software enabled PLL */ +#define _OSC_EC_CLKOUT_Software_nabld_PLL_1H 0xFD /* EC-CLKOUT on RA6,Software_enabled_PLL */ +#define _OSC_EC_CLKOUT_PLL_enabld_frq_4xFosc1_1H 0xFC /* EC-CLKOUT on RA6,PLL_enabled_freq_4xFosc1 */ +#define _OSC_EXT_Port_on_RA6_1H 0xF7 /* EXT RC-Port_on_RA6 */ +#define _OSC_HS_PLL_1H 0xF6 /* HS-PLL enabled freq=4xFosc1 */ +#define _OSC_EC_PORT_1H 0xF5 /* EC-Port on RA6 */ +#define _OSC_EC_CLKOUT__1H 0xF4 /* EC-CLKOUT on RA6 */ +#define _OSC_EXT_CLKOUT_on_RA6_1H 0xF3 /* EXT RC-CLKOUT_on_RA6 */ +#define _OSC_HS_1H 0xF2 /* HS */ +#define _OSC_XT_1H 0xF1 /* XT */ +#define _OSC_LP_1H 0xF0 /* LP */ + +/* Low Power System Clock Timer1 Enable 1H options */ +#define _OSCSEN_ON_1H 0xDF /* Enabled */ +#define _OSCSEN_OFF_1H 0xFF /* Disabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_0V_2L 0xFF /* 2.0V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_DISABLED_CONTROLLED_2H 0xFE /* Disabled-Controlled by SWDTEN bit */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_32768_2H 0xFF /* 1:32768 */ +#define _WDTPS_1_16384_2H 0xFD /* 1:16384 */ +#define _WDTPS_1_8192_2H 0xFB /* 1:8192 */ +#define _WDTPS_1_4096_2H 0xF9 /* 1:4096 */ +#define _WDTPS_1_2048_2H 0xF7 /* 1:2048 */ +#define _WDTPS_1_1024_2H 0xF5 /* 1:1024 */ +#define _WDTPS_1_512_2H 0xF3 /* 1:512 */ +#define _WDTPS_1_256_2H 0xF1 /* 1:256 */ +#define _WDTPS_1_128_2H 0xEF /* 1:128 */ +#define _WDTPS_1_64_2H 0xED /* 1:64 */ +#define _WDTPS_1_32_2H 0xEB /* 1:32 */ +#define _WDTPS_1_16_2H 0xE9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xE7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xE5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xE3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xE1 /* 1:1 */ + +/* Processor Mode 3L options */ +#define _PMODE_MICROCONTROLLER_3L 0xFF /* Microcontroller */ +#define _PMODE_MICROPROCESSOR__3L 0xFE /* Microprocessor */ +#define _PMODE_MICROPROCESSOR_w_Boot_3L 0xFD /* Microprocessor w_Boot */ +#define _PMODE_EXT_3L 0xFC /* Ext Microcontroller */ + +/* External Bus Wait 3L options */ +#define _WAIT_OFF_3L 0xFF /* Disabled */ +#define _WAIT_ON_3L 0x7F /* Enabled */ + +/* CCP2 Mux 3H options */ +#define _CCP2MUX_RC1_3H 0xFF /* RC1 */ +#define _CCP2MUX_RB3_3H 0xFE /* RB3 */ + +/* ECCP Mux 3H options */ +#define _ECCPMX_ECCP1_E6E3_3H 0xFF /* ECCP1 and ECCP6 are muxed onto RE6 through RE3 */ +#define _ECCPMX_ECCP1_H7H4_3H 0xFD /* ECCP1 and ECCP6 are muxed onto RH7 through RH4 */ + +/* MCLR enable 3H options */ +#define _MCLRE_MCLR_Enabled_RE3_Disabled_3H 0xFF /* MCLR Enabled_RE3_Disabled */ +#define _MCLRE_MCLR_Disabled_RE3_Enabled_3H 0x7F /* MCLR Disabled__RE3_Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Code Protect 000800-0003FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 0004000-007FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Code Protect 008000-00BFFF 5L options */ +#define _CP_2_OFF_5L 0xFF /* Disabled */ +#define _CP_2_ON_5L 0xFB /* Enabled */ + +/* Code Protect 00C000F-00FFFF 5L options */ +#define _CP_3_OFF_5L 0xFF /* Disabled */ +#define _CP_3_ON_5L 0xF7 /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00800-003FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 004000-007FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Table Write Protect 08000-0BFFF 6L options */ +#define _WRT_2_OFF_6L 0xFF /* Disabled */ +#define _WRT_2_ON_6L 0xFB /* Enabled */ + +/* Table Write Protect 0C000-0FFFF 6L options */ +#define _WRT_3_OFF_6L 0xFF /* Disabled */ +#define _WRT_3_ON_6L 0xF7 /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00800-003FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 004000-07FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect 08000-0BFFF 7L options */ +#define _EBTR_2_OFF_7L 0xFF /* Disabled */ +#define _EBTR_2_ON_7L 0xFB /* Enabled */ + +/* Table Read Protect 0C000-0FFFF 7L options */ +#define _EBTR_3_OFF_7L 0xFF /* Disabled */ +#define _EBTR_3_ON_7L 0xF7 /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f86j50.h b/device/include/pic16/pic18f86j50.h new file mode 100644 index 0000000..55b61a5 --- /dev/null +++ b/device/include/pic16/pic18f86j50.h @@ -0,0 +1,26 @@ +/* + * pic18f86j50.h - device specific declarations + */ + +#ifndef __PIC18F86J50_H__ +#define __PIC18F86J50_H__ 1 + +#include "pic18f87j50.h" + +#undef __CONFIG1L +#undef __CONFIG1H +#undef __CONFIG2L +#undef __CONFIG2H +#undef __CONFIG3L +#undef __CONFIG3H + +// Configuration Bits +#define __CONFIG1L 0xFFF8 +#define __CONFIG1H 0xFFF9 +#define __CONFIG2L 0xFFFA +#define __CONFIG2H 0xFFFB +#define __CONFIG3L 0xFFFC +#define __CONFIG3H 0xFFFD + +#endif + diff --git a/device/include/pic16/pic18f86j55.h b/device/include/pic16/pic18f86j55.h new file mode 100644 index 0000000..33052bf --- /dev/null +++ b/device/include/pic16/pic18f86j55.h @@ -0,0 +1,26 @@ +/* + * pic18f86j55.h - device specific declarations + */ + +#ifndef __PIC18F86J55_H__ +#define __PIC18F86J55_H__ 1 + +#include "pic18f87j50.h" + +#undef __CONFIG1L +#undef __CONFIG1H +#undef __CONFIG2L +#undef __CONFIG2H +#undef __CONFIG3L +#undef __CONFIG3H + +// Configuration Bits +#define __CONFIG1L 0x17FF8 +#define __CONFIG1H 0x17FF9 +#define __CONFIG2L 0x17FFA +#define __CONFIG2H 0x17FFB +#define __CONFIG3L 0x17FFC +#define __CONFIG3H 0x17FFD + +#endif + diff --git a/device/include/pic16/pic18f86j60.h b/device/include/pic16/pic18f86j60.h new file mode 100644 index 0000000..e4c2923 --- /dev/null +++ b/device/include/pic16/pic18f86j60.h @@ -0,0 +1,2964 @@ +/* + * pic18f86j60.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F86J60_H__ +#define __PIC18F86J60_H__ 1 + +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF + +extern __sfr __at (0xE80) MAADR5; + +extern __sfr __at (0xE81) MAADR6; + +extern __sfr __at (0xE82) MAADR3; + +extern __sfr __at (0xE83) MAADR4; + +extern __sfr __at (0xE84) MAADR1; + +extern __sfr __at (0xE85) MAADR2; + +extern __sfr __at (0xE86) EBSTSD; + +extern __sfr __at (0xE87) EBSTCON; +typedef union { + struct { + unsigned BISTST : 1; + unsigned TME : 1; + unsigned TMSEL0 : 1; + unsigned TMSEL1 : 1; + unsigned : 1; + unsigned PSV0 : 1; + unsigned PSV1 : 1; + unsigned PSV2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned TMSEL : 1; + unsigned : 1; + unsigned : 1; + unsigned PSV : 1; + unsigned : 1; + unsigned : 1; + }; +} __EBSTCONbits_t; +extern volatile __EBSTCONbits_t __at (0xE87) EBSTCONbits; + +extern __sfr __at (0xE88) EBSTCS; + +extern __sfr __at (0xE88) EBSTCSL; + +extern __sfr __at (0xE89) EBSTCSH; + +extern __sfr __at (0xE8A) MISTAT; +typedef union { + struct { + unsigned BUSY : 1; + unsigned SCAN : 1; + unsigned NVALID : 1; + unsigned LINKFL : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __MISTATbits_t; +extern volatile __MISTATbits_t __at (0xE8A) MISTATbits; + +extern __sfr __at (0xE97) EFLOCON; +typedef union { + struct { + unsigned FCEN0 : 1; + unsigned FCEN1 : 1; + unsigned FULDPXS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __EFLOCONbits_t; +extern volatile __EFLOCONbits_t __at (0xE97) EFLOCONbits; + +extern __sfr __at (0xE98) EPAUS; + +extern __sfr __at (0xE98) EPAUSL; + +extern __sfr __at (0xE99) EPAUSH; + +extern __sfr __at (0xEA0) MACON1; +typedef union { + struct { + unsigned MARXEN : 1; + unsigned PASSALL : 1; + unsigned RXPAUS : 1; + unsigned TXPAUS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __MACON1bits_t; +extern volatile __MACON1bits_t __at (0xEA0) MACON1bits; + +extern __sfr __at (0xEA1) MACON2; +typedef union { + struct { + unsigned TFUNRST : 1; + unsigned MATXRST : 1; + unsigned RFUNRST : 1; + unsigned MARXRST : 1; + unsigned : 1; + unsigned : 1; + unsigned RNDRST : 1; + unsigned MARST : 1; + }; +} __MACON2bits_t; +extern volatile __MACON2bits_t __at (0xEA1) MACON2bits; + +extern __sfr __at (0xEA2) MACON3; +typedef union { + struct { + unsigned FULDPX : 1; + unsigned FRMLNEN : 1; + unsigned HFRMEN : 1; + unsigned PHDRLEN : 1; + unsigned TXCRCEN : 1; + unsigned PADCFG0 : 1; + unsigned PADCFG1 : 1; + unsigned PADCFG2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PADCFG : 1; + unsigned : 1; + unsigned : 1; + }; +} __MACON3bits_t; +extern volatile __MACON3bits_t __at (0xEA2) MACON3bits; + +extern __sfr __at (0xEA3) MACON4; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOBKOFF : 1; + unsigned BPEN : 1; + unsigned DEFER : 1; + unsigned : 1; + }; +} __MACON4bits_t; +extern volatile __MACON4bits_t __at (0xEA3) MACON4bits; + +extern __sfr __at (0xEA4) MABBIPG; + +extern __sfr __at (0xEA6) MAIPG; + +extern __sfr __at (0xEA6) MAIPGL; + +extern __sfr __at (0xEA7) MAIPGH; + +extern __sfr __at (0xEA8) MACLCON1; +typedef union { + struct { + unsigned RETMAX : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __MACLCON1bits_t; +extern volatile __MACLCON1bits_t __at (0xEA8) MACLCON1bits; + +extern __sfr __at (0xEA9) MACLCON2; +typedef union { + struct { + unsigned COLWIN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __MACLCON2bits_t; +extern volatile __MACLCON2bits_t __at (0xEA9) MACLCON2bits; + +extern __sfr __at (0xEAA) MAMXFL; + +extern __sfr __at (0xEAA) MAMXFLL; + +extern __sfr __at (0xEAB) MAMXFLH; + +extern __sfr __at (0xEB1) MICON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RSTMII : 1; + }; +} __MICONbits_t; +extern volatile __MICONbits_t __at (0xEB1) MICONbits; + +extern __sfr __at (0xEB2) MICMD; +typedef union { + struct { + unsigned MIIRD : 1; + unsigned MIISCAN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __MICMDbits_t; +extern volatile __MICMDbits_t __at (0xEB2) MICMDbits; + +extern __sfr __at (0xEB4) MIREGADR; + +extern __sfr __at (0xEB6) MIWR; + +extern __sfr __at (0xEB6) MIWRL; + +extern __sfr __at (0xEB7) MIWRH; + +extern __sfr __at (0xEB8) MIRD; + +extern __sfr __at (0xEB8) MIRDL; + +extern __sfr __at (0xEB9) MIRDH; + +extern __sfr __at (0xEC0) EHT0; + +extern __sfr __at (0xEC1) EHT1; + +extern __sfr __at (0xEC2) EHT2; + +extern __sfr __at (0xEC3) EHT3; + +extern __sfr __at (0xEC4) EHT4; + +extern __sfr __at (0xEC5) EHT5; + +extern __sfr __at (0xEC6) EHT6; + +extern __sfr __at (0xEC7) EHT7; + +extern __sfr __at (0xEC8) EPMM0; + +extern __sfr __at (0xEC9) EPMM1; + +extern __sfr __at (0xECA) EPMM2; + +extern __sfr __at (0xECB) EPMM3; + +extern __sfr __at (0xECC) EPMM4; + +extern __sfr __at (0xECD) EPMM5; + +extern __sfr __at (0xECE) EPMM6; + +extern __sfr __at (0xECF) EPMM7; + +extern __sfr __at (0xED0) EPMCS; + +extern __sfr __at (0xED0) EPMCSL; + +extern __sfr __at (0xED1) EPMCSH; + +extern __sfr __at (0xED4) EPMO; + +extern __sfr __at (0xED4) EPMOL; + +extern __sfr __at (0xED5) EPMOH; + +extern __sfr __at (0xED6) EWOLIE; +typedef union { + struct { + unsigned BCWOLIE : 1; + unsigned MCWOLIE : 1; + unsigned HTWOLIE : 1; + unsigned MPWOLIE : 1; + unsigned PMWOLIE : 1; + unsigned : 1; + unsigned AWOLIE : 1; + unsigned UCWOLIE : 1; + }; +} __EWOLIEbits_t; +extern volatile __EWOLIEbits_t __at (0xED6) EWOLIEbits; + +extern __sfr __at (0xED7) EWOLIR; +typedef union { + struct { + unsigned BCWOLIF : 1; + unsigned MCWOLIF : 1; + unsigned HTWOLIF : 1; + unsigned MPWOLIF : 1; + unsigned PMWOLIF : 1; + unsigned : 1; + unsigned AWOLIF : 1; + unsigned UCWOLIF : 1; + }; +} __EWOLIRbits_t; +extern volatile __EWOLIRbits_t __at (0xED7) EWOLIRbits; + +extern __sfr __at (0xED8) ERXFCON; +typedef union { + struct { + unsigned BCEN : 1; + unsigned MCEN : 1; + unsigned HTEN : 1; + unsigned MPEN : 1; + unsigned PMEN : 1; + unsigned CRCEN : 1; + unsigned ANDOR : 1; + unsigned UCEN : 1; + }; +} __ERXFCONbits_t; +extern volatile __ERXFCONbits_t __at (0xED8) ERXFCONbits; + +extern __sfr __at (0xED9) EPKTCNT; + +extern __sfr __at (0xEE2) EWRPT; + +extern __sfr __at (0xEE2) EWRPTL; + +extern __sfr __at (0xEE3) EWRPTH; + +extern __sfr __at (0xEE4) ETXST; + +extern __sfr __at (0xEE4) ETXSTL; + +extern __sfr __at (0xEE5) ETXSTH; + +extern __sfr __at (0xEE6) ETXND; + +extern __sfr __at (0xEE6) ETXNDL; + +extern __sfr __at (0xEE7) ETXNDH; + +extern __sfr __at (0xEE8) ERXST; + +extern __sfr __at (0xEE8) ERXSTL; + +extern __sfr __at (0xEE9) ERXSTH; + +extern __sfr __at (0xEEA) ERXND; + +extern __sfr __at (0xEEA) ERXNDL; + +extern __sfr __at (0xEEB) ERXNDH; + +extern __sfr __at (0xEEC) ERXRDPT; + +extern __sfr __at (0xEEC) ERXRDPTL; + +extern __sfr __at (0xEED) ERXRDPTH; + +extern __sfr __at (0xEEE) ERXWRPT; + +extern __sfr __at (0xEEE) ERXWRPTL; + +extern __sfr __at (0xEEF) ERXWRPTH; + +extern __sfr __at (0xEF0) EDMAST; + +extern __sfr __at (0xEF0) EDMASTL; + +extern __sfr __at (0xEF1) EDMASTH; + +extern __sfr __at (0xEF2) EDMAND; + +extern __sfr __at (0xEF2) EDMANDL; + +extern __sfr __at (0xEF3) EDMANDH; + +extern __sfr __at (0xEF4) EDMADST; + +extern __sfr __at (0xEF4) EDMADSTL; + +extern __sfr __at (0xEF5) EDMADSTH; + +extern __sfr __at (0xEF6) EDMACS; + +extern __sfr __at (0xEF6) EDMACSL; + +extern __sfr __at (0xEF7) EDMACSH; + +extern __sfr __at (0xEFB) EIE; +typedef union { + struct { + unsigned RXERIE : 1; + unsigned TXERIE : 1; + unsigned : 1; + unsigned TXIE_EIE : 1; + unsigned LINKIE : 1; + unsigned DMAIE : 1; + unsigned PKTIE : 1; + unsigned : 1; + }; +} __EIEbits_t; +extern volatile __EIEbits_t __at (0xEFB) EIEbits; + +extern __sfr __at (0xEFD) ESTAT; +typedef union { + struct { + unsigned PHYRDY : 1; + unsigned TXABRT : 1; + unsigned RXBUSY : 1; + unsigned : 1; + unsigned LATECOL : 1; + unsigned : 1; + unsigned BUFER : 1; + unsigned : 1; + }; +} __ESTATbits_t; +extern volatile __ESTATbits_t __at (0xEFD) ESTATbits; + +extern __sfr __at (0xEFE) ECON2; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ETHEN : 1; + unsigned PKTDEC : 1; + unsigned AUTOINC : 1; + }; +} __ECON2bits_t; +extern volatile __ECON2bits_t __at (0xEFE) ECON2bits; + +extern __sfr __at (0xF60) EIR; +typedef union { + struct { + unsigned RXERIF : 1; + unsigned TXERIF : 1; + unsigned : 1; + unsigned TXIF_EIR : 1; + unsigned LINKIF : 1; + unsigned DMAIF : 1; + unsigned PKTIF : 1; + unsigned : 1; + }; +} __EIRbits_t; +extern volatile __EIRbits_t __at (0xF60) EIRbits; + +extern __sfr __at (0xF61) EDATA; +typedef union { + struct { + unsigned EDATA0 : 1; + unsigned EDATA1 : 1; + unsigned EDATA2 : 1; + unsigned EDATA3 : 1; + unsigned EDATA4 : 1; + unsigned EDATA5 : 1; + unsigned EDATA6 : 1; + unsigned EDATA7 : 1; + }; +} __EDATAbits_t; +extern volatile __EDATAbits_t __at (0xF61) EDATAbits; + +extern __sfr __at (0xF67) ECCP2DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; + struct { + unsigned P2DC0 : 1; + unsigned P2DC1 : 1; + unsigned P2DC2 : 1; + unsigned P2DC3 : 1; + unsigned P2DC4 : 1; + unsigned P2DC5 : 1; + unsigned P2DC6 : 1; + unsigned P2RSEN : 1; + }; +} __ECCP2DELbits_t; +extern volatile __ECCP2DELbits_t __at (0xF67) ECCP2DELbits; + +extern __sfr __at (0xF68) ECCP2AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; + struct { + unsigned PSS2BD0 : 1; + unsigned PSS2BD1 : 1; + unsigned PSS2AC0 : 1; + unsigned PSS2AC1 : 1; + unsigned ECCP2AS0 : 1; + unsigned ECCP2AS1 : 1; + unsigned ECCP2AS2 : 1; + unsigned ECCP2ASE : 1; + }; +} __ECCP2ASbits_t; +extern volatile __ECCP2ASbits_t __at (0xF68) ECCP2ASbits; + +extern __sfr __at (0xF69) ECCP3DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; + struct { + unsigned P3DC0 : 1; + unsigned P3DC1 : 1; + unsigned P3DC2 : 1; + unsigned P3DC3 : 1; + unsigned P3DC4 : 1; + unsigned P3DC5 : 1; + unsigned P3DC6 : 1; + unsigned P3RSEN : 1; + }; +} __ECCP3DELbits_t; +extern volatile __ECCP3DELbits_t __at (0xF69) ECCP3DELbits; + +extern __sfr __at (0xF6A) ECCP3AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; + struct { + unsigned PSS3BD0 : 1; + unsigned PSS3BD1 : 1; + unsigned PSS3AC0 : 1; + unsigned PSS3AC1 : 1; + unsigned ECCP3AS0 : 1; + unsigned ECCP3AS1 : 1; + unsigned ECCP3AS2 : 1; + unsigned ECCP3ASE : 1; + }; +} __ECCP3ASbits_t; +extern volatile __ECCP3ASbits_t __at (0xF6A) ECCP3ASbits; + +extern __sfr __at (0xF6B) RCSTA2; +typedef union { + struct { + unsigned RCD8 : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RC9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RX9D : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RX9 : 1; + unsigned : 1; + }; +} __RCSTA2bits_t; +extern volatile __RCSTA2bits_t __at (0xF6B) RCSTA2bits; + +extern __sfr __at (0xF6C) TXSTA2; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTA2bits_t; +extern volatile __TXSTA2bits_t __at (0xF6C) TXSTA2bits; + +extern __sfr __at (0xF6D) TXREG2; + +extern __sfr __at (0xF6E) RCREG2; + +extern __sfr __at (0xF6F) SPBRG2; + +extern __sfr __at (0xF70) CCP5CON; +typedef union { + struct { + unsigned CCP5M0 : 1; + unsigned CCP5M1 : 1; + unsigned CCP5M2 : 1; + unsigned CCP5M3 : 1; + unsigned CCP5Y : 1; + unsigned CCP5X : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DC5B0 : 1; + unsigned DC5B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP5CONbits_t; +extern volatile __CCP5CONbits_t __at (0xF70) CCP5CONbits; + +extern __sfr __at (0xF71) CCPR5; + +extern __sfr __at (0xF71) CCPR5L; + +extern __sfr __at (0xF72) CCPR5H; + +extern __sfr __at (0xF73) CCP4CON; +typedef union { + struct { + unsigned CCP4M0 : 1; + unsigned CCP4M1 : 1; + unsigned CCP4M2 : 1; + unsigned CCP4M3 : 1; + unsigned CCP4Y : 1; + unsigned CCP4X : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DC4B0 : 1; + unsigned DC4B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP4CONbits_t; +extern volatile __CCP4CONbits_t __at (0xF73) CCP4CONbits; + +extern __sfr __at (0xF74) CCPR4; + +extern __sfr __at (0xF74) CCPR4L; + +extern __sfr __at (0xF75) CCPR4H; + +extern __sfr __at (0xF76) T4CON; +typedef union { + struct { + unsigned T4CKPS0 : 1; + unsigned T4CKPS1 : 1; + unsigned TMR4ON : 1; + unsigned T4OUTPS0 : 1; + unsigned T4OUTPS1 : 1; + unsigned T4OUTPS2 : 1; + unsigned T4OUTPS3 : 1; + unsigned : 1; + }; +} __T4CONbits_t; +extern volatile __T4CONbits_t __at (0xF76) T4CONbits; + +extern __sfr __at (0xF77) PR4; + +extern __sfr __at (0xF78) TMR4; + +extern __sfr __at (0xF79) ECCP1DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; + struct { + unsigned P1DC0 : 1; + unsigned P1DC1 : 1; + unsigned P1DC2 : 1; + unsigned P1DC3 : 1; + unsigned P1DC4 : 1; + unsigned P1DC5 : 1; + unsigned P1DC6 : 1; + unsigned P1RSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xF79) ECCP1DELbits; + +extern __sfr __at (0xF7A) ERDPT; + +extern __sfr __at (0xF7A) ERDPTL; + +extern __sfr __at (0xF7B) ERDPTH; + +extern __sfr __at (0xF7C) BAUDCON2; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCON2bits_t; +extern volatile __BAUDCON2bits_t __at (0xF7C) BAUDCON2bits; + +extern __sfr __at (0xF7C) BAUDCTL2; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCTL2bits_t; +extern volatile __BAUDCTL2bits_t __at (0xF7C) BAUDCTL2bits; + +extern __sfr __at (0xF7D) SPBRGH2; + +extern __sfr __at (0xF7E) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xF7E) BAUDCONbits; + +extern __sfr __at (0xF7E) BAUDCON1; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCON1bits_t; +extern volatile __BAUDCON1bits_t __at (0xF7E) BAUDCON1bits; + +extern __sfr __at (0xF7E) BAUDCTL; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCTLbits_t; +extern volatile __BAUDCTLbits_t __at (0xF7E) BAUDCTLbits; + +extern __sfr __at (0xF7E) BAUDCTL1; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCTL1bits_t; +extern volatile __BAUDCTL1bits_t __at (0xF7E) BAUDCTL1bits; + +extern __sfr __at (0xF7F) SPBRGH; + +extern __sfr __at (0xF7F) SPBRGH1; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned : 1; + unsigned RJPU : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned LEDA : 1; + unsigned LEDB : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned INT3 : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned CCP2 : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned SDO1 : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SCK1 : 1; + unsigned SDI1 : 1; + unsigned : 1; + unsigned TX1 : 1; + unsigned RX1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SCL1 : 1; + unsigned SDA1 : 1; + unsigned : 1; + unsigned CK1 : 1; + unsigned DT1 : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned RE4 : 1; + unsigned RE5 : 1; + unsigned RE6 : 1; + unsigned RE7 : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF85) PORTF; +typedef union { + struct { + unsigned : 1; + unsigned RF1 : 1; + unsigned RF2 : 1; + unsigned RF3 : 1; + unsigned RF4 : 1; + unsigned RF5 : 1; + unsigned RF6 : 1; + unsigned RF7 : 1; + }; + struct { + unsigned : 1; + unsigned AN6 : 1; + unsigned AN7 : 1; + unsigned AN8 : 1; + unsigned AN9 : 1; + unsigned AN10 : 1; + unsigned AN11 : 1; + unsigned SS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CVREF : 1; + unsigned : 1; + unsigned NOT_SS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SS1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS1 : 1; + }; +} __PORTFbits_t; +extern volatile __PORTFbits_t __at (0xF85) PORTFbits; + +extern __sfr __at (0xF86) PORTG; +typedef union { + struct { + unsigned RG0 : 1; + unsigned RG1 : 1; + unsigned RG2 : 1; + unsigned RG3 : 1; + unsigned RG4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned CCP3 : 1; + unsigned TX2 : 1; + unsigned RX2 : 1; + unsigned CCP4 : 1; + unsigned CCP5 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned CK2 : 1; + unsigned DT2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTGbits_t; +extern volatile __PORTGbits_t __at (0xF86) PORTGbits; + +extern __sfr __at (0xF87) PORTH; +typedef union { + struct { + unsigned RH0 : 1; + unsigned RH1 : 1; + unsigned RH2 : 1; + unsigned RH3 : 1; + unsigned RH4 : 1; + unsigned RH5 : 1; + unsigned RH6 : 1; + unsigned RH7 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned AN12 : 1; + unsigned AN13 : 1; + unsigned AN14 : 1; + unsigned AN15 : 1; + }; +} __PORTHbits_t; +extern volatile __PORTHbits_t __at (0xF87) PORTHbits; + +extern __sfr __at (0xF88) PORTJ; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RJ4 : 1; + unsigned RJ5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTJbits_t; +extern volatile __PORTJbits_t __at (0xF88) PORTJbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned REPU : 1; + unsigned RDPU : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned LATE3 : 1; + unsigned LATE4 : 1; + unsigned LATE5 : 1; + unsigned LATE6 : 1; + unsigned LATE7 : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF8E) LATF; +typedef union { + struct { + unsigned : 1; + unsigned LATF1 : 1; + unsigned LATF2 : 1; + unsigned LATF3 : 1; + unsigned LATF4 : 1; + unsigned LATF5 : 1; + unsigned LATF6 : 1; + unsigned LATF7 : 1; + }; +} __LATFbits_t; +extern volatile __LATFbits_t __at (0xF8E) LATFbits; + +extern __sfr __at (0xF8F) LATG; +typedef union { + struct { + unsigned LATG0 : 1; + unsigned LATG1 : 1; + unsigned LATG2 : 1; + unsigned LATG3 : 1; + unsigned LATG4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATGbits_t; +extern volatile __LATGbits_t __at (0xF8F) LATGbits; + +extern __sfr __at (0xF90) LATH; +typedef union { + struct { + unsigned LATH0 : 1; + unsigned LATH1 : 1; + unsigned LATH2 : 1; + unsigned LATH3 : 1; + unsigned LATH4 : 1; + unsigned LATH5 : 1; + unsigned LATH6 : 1; + unsigned LATH7 : 1; + }; +} __LATHbits_t; +extern volatile __LATHbits_t __at (0xF90) LATHbits; + +extern __sfr __at (0xF91) LATJ; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned LATJ4 : 1; + unsigned LATJ5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATJbits_t; +extern volatile __LATJbits_t __at (0xF91) LATJbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned RE4 : 1; + unsigned RE5 : 1; + unsigned RE6 : 1; + unsigned RE7 : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned TRISE3 : 1; + unsigned TRISE4 : 1; + unsigned TRISE5 : 1; + unsigned TRISE6 : 1; + unsigned TRISE7 : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF97) DDRF; +typedef union { + struct { + unsigned : 1; + unsigned RF1 : 1; + unsigned RF2 : 1; + unsigned RF3 : 1; + unsigned RF4 : 1; + unsigned RF5 : 1; + unsigned RF6 : 1; + unsigned RF7 : 1; + }; +} __DDRFbits_t; +extern volatile __DDRFbits_t __at (0xF97) DDRFbits; + +extern __sfr __at (0xF97) TRISF; +typedef union { + struct { + unsigned : 1; + unsigned TRISF1 : 1; + unsigned TRISF2 : 1; + unsigned TRISF3 : 1; + unsigned TRISF4 : 1; + unsigned TRISF5 : 1; + unsigned TRISF6 : 1; + unsigned TRISF7 : 1; + }; +} __TRISFbits_t; +extern volatile __TRISFbits_t __at (0xF97) TRISFbits; + +extern __sfr __at (0xF98) DDRG; +typedef union { + struct { + unsigned RG0 : 1; + unsigned RG1 : 1; + unsigned RG2 : 1; + unsigned RG3 : 1; + unsigned RG4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDRGbits_t; +extern volatile __DDRGbits_t __at (0xF98) DDRGbits; + +extern __sfr __at (0xF98) TRISG; +typedef union { + struct { + unsigned TRISG0 : 1; + unsigned TRISG1 : 1; + unsigned TRISG2 : 1; + unsigned TRISG3 : 1; + unsigned TRISG4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISGbits_t; +extern volatile __TRISGbits_t __at (0xF98) TRISGbits; + +extern __sfr __at (0xF99) DDRH; +typedef union { + struct { + unsigned RH0 : 1; + unsigned RH1 : 1; + unsigned RH2 : 1; + unsigned RH3 : 1; + unsigned RH4 : 1; + unsigned RH5 : 1; + unsigned RH6 : 1; + unsigned RH7 : 1; + }; +} __DDRHbits_t; +extern volatile __DDRHbits_t __at (0xF99) DDRHbits; + +extern __sfr __at (0xF99) TRISH; +typedef union { + struct { + unsigned TRISH0 : 1; + unsigned TRISH1 : 1; + unsigned TRISH2 : 1; + unsigned TRISH3 : 1; + unsigned TRISH4 : 1; + unsigned TRISH5 : 1; + unsigned TRISH6 : 1; + unsigned TRISH7 : 1; + }; +} __TRISHbits_t; +extern volatile __TRISHbits_t __at (0xF99) TRISHbits; + +extern __sfr __at (0xF9A) DDRJ; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RJ4 : 1; + unsigned RJ5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDRJbits_t; +extern volatile __DDRJbits_t __at (0xF9A) DDRJbits; + +extern __sfr __at (0xF9A) TRISJ; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TRISJ4 : 1; + unsigned TRISJ5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISJbits_t; +extern volatile __TRISJbits_t __at (0xF9A) TRISJbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PPRE : 1; + unsigned PPST0 : 1; + unsigned PLLEN : 1; + unsigned PPST1 : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE_PIE1 : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IE : 1; + unsigned TX1IE : 1; + unsigned RC1IE : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF_PIR1 : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IF : 1; + unsigned TX1IF : 1; + unsigned RC1IF : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IP : 1; + unsigned TX1IP : 1; + unsigned RC1IP : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned TMR3IE : 1; + unsigned : 1; + unsigned BCLIE : 1; + unsigned ETHWIE : 1; + unsigned ETHIE : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned TMR3IF : 1; + unsigned : 1; + unsigned BCLIF : 1; + unsigned ETHWIF : 1; + unsigned ETHIF : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned TMR3IP : 1; + unsigned : 1; + unsigned BCLIP : 1; + unsigned ETHWIP : 1; + unsigned ETHIP : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned CCP3IE : 1; + unsigned CCP4IE : 1; + unsigned CCP5IE : 1; + unsigned TMR4IE : 1; + unsigned TX2IE : 1; + unsigned RC2IE : 1; + unsigned BCL2IE : 1; + unsigned : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned CCP3IF : 1; + unsigned CCP4IF : 1; + unsigned CCP5IF : 1; + unsigned TMR4IF : 1; + unsigned TX2IF : 1; + unsigned RC2IF : 1; + unsigned BCL2IF : 1; + unsigned : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned CCP3IP : 1; + unsigned CCP4IP : 1; + unsigned CCP5IP : 1; + unsigned TMR4IP : 1; + unsigned TX2IP : 1; + unsigned RC2IP : 1; + unsigned BCL2IP : 1; + unsigned : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAB) RCSTA1; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTA1bits_t; +extern volatile __RCSTA1bits_t __at (0xFAB) RCSTA1bits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAC) TXSTA1; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTA1bits_t; +extern volatile __TXSTA1bits_t __at (0xFAC) TXSTA1bits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAD) TXREG1; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAE) RCREG1; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFAF) SPBRG1; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T3INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT : 1; + unsigned C2OUT : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; + struct { + unsigned PSS1BD0 : 1; + unsigned PSS1BD1 : 1; + unsigned PSS1AC0 : 1; + unsigned PSS1AC1 : 1; + unsigned ECCP1AS0 : 1; + unsigned ECCP1AS1 : 1; + unsigned ECCP1AS2 : 1; + unsigned ECCP1ASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) CCP3CON; +typedef union { + struct { + unsigned CCP3M0 : 1; + unsigned CCP3M1 : 1; + unsigned CCP3M2 : 1; + unsigned CCP3M3 : 1; + unsigned DC3B0 : 1; + unsigned DC3B1 : 1; + unsigned P3M0 : 1; + unsigned P3M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP3Y : 1; + unsigned CCP3X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP3CONbits_t; +extern volatile __CCP3CONbits_t __at (0xFB7) CCP3CONbits; + +extern __sfr __at (0xFB7) ECCP3CON; +typedef union { + struct { + unsigned CCP3M0 : 1; + unsigned CCP3M1 : 1; + unsigned CCP3M2 : 1; + unsigned CCP3M3 : 1; + unsigned DC3B0 : 1; + unsigned DC3B1 : 1; + unsigned P3M0 : 1; + unsigned P3M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP3Y : 1; + unsigned CCP3X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP3CONbits_t; +extern volatile __ECCP3CONbits_t __at (0xFB7) ECCP3CONbits; + +extern __sfr __at (0xFB8) CCPR3; + +extern __sfr __at (0xFB8) CCPR3L; + +extern __sfr __at (0xFB9) CCPR3H; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned P2M0 : 1; + unsigned P2M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBA) ECCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned P2M0 : 1; + unsigned P2M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP2CONbits_t; +extern volatile __ECCP2CONbits_t __at (0xFBA) ECCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBD) ECCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP1CONbits_t; +extern volatile __ECCP1CONbits_t __at (0xFBD) ECCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned ADCAL : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSP1CON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP1CON2bits_t; +extern volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSP1CON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSP1CON1bits_t; +extern volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSP1STAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP1STATbits_t; +extern volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSP1ADD; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSP1BUF; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) ECON1; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned RXEN : 1; + unsigned TXRTS : 1; + unsigned CSUMEN : 1; + unsigned DMAST : 1; + unsigned RXRST : 1; + unsigned TXRST : 1; + }; +} __ECON1bits_t; +extern volatile __ECON1bits_t __at (0xFD2) ECON1bits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned : 1; + unsigned OSTS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned INT3F : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned INT3E : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned INT3IF : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned INT3IE : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned INT3IP : 1; + unsigned T0IP : 1; + unsigned INTEDG3 : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned RBIE : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f86j65.h b/device/include/pic16/pic18f86j65.h new file mode 100644 index 0000000..f6e49fa --- /dev/null +++ b/device/include/pic16/pic18f86j65.h @@ -0,0 +1,6 @@ +/* + * pic18f86j65.h - PIC18F86J65 Device Library Header + */ + +#include "pic18f86j60.h" + diff --git a/device/include/pic16/pic18f8720.h b/device/include/pic16/pic18f8720.h new file mode 100644 index 0000000..3f37b22 --- /dev/null +++ b/device/include/pic16/pic18f8720.h @@ -0,0 +1,1562 @@ + +/* + * pic18f8720.h - PIC18F8720 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f8720.h 5369 2009-02-09 23:45:54Z tecodev $ + * + */ + +#ifndef __PIC18F8720_H__ +#define __PIC18F8720_H__ + +extern __sfr __at (0xf6b) RCSTA2; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTA2bits_t; + +extern volatile __RCSTA2bits_t __at (0xf6b) RCSTA2bits; + +extern __sfr __at (0xf6c) TXSTA2; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTA2bits_t; + +extern volatile __TXSTA2bits_t __at (0xf6c) TXSTA2bits; + +extern __sfr __at (0xf6d) TXREG2; +extern __sfr __at (0xf6e) RCREG2; +extern __sfr __at (0xf6f) SPBRG2; +extern __sfr __at (0xf70) CCP5CON; +typedef union { + struct { + unsigned CCP5M0:1; + unsigned CCP5M1:1; + unsigned CCP5M2:1; + unsigned CCP5M3:1; + unsigned DCCP5Y:1; + unsigned DCCP5X:1; + unsigned :1; + unsigned :1; + }; +} __CCP5CONbits_t; + +extern volatile __CCP5CONbits_t __at (0xf70) CCP5CONbits; + +extern __sfr __at (0xf71) CCPR5L; +extern __sfr __at (0xf72) CCPR5H; +extern __sfr __at (0xf73) CCP4CON; +typedef union { + struct { + unsigned CCP4M0:1; + unsigned CCP4M1:1; + unsigned CCP4M2:1; + unsigned CCP4M3:1; + unsigned DCCP4Y:1; + unsigned DCCP4X:1; + unsigned :1; + unsigned :1; + }; +} __CCP4CONbits_t; + +extern volatile __CCP4CONbits_t __at (0xf73) CCP4CONbits; + +extern __sfr __at (0xf74) CCPR4L; +extern __sfr __at (0xf75) CCPR4H; +extern __sfr __at (0xf76) T4CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T4CONbits_t; + +extern volatile __T4CONbits_t __at (0xf76) T4CONbits; + +extern __sfr __at (0xf77) PR4; +extern __sfr __at (0xf78) TMR4; +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned :1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned INT3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf83) PORTD; +typedef union { + struct { + unsigned RD0:1; + unsigned RD1:1; + unsigned RD2:1; + unsigned RD3:1; + unsigned RD4:1; + unsigned RD5:1; + unsigned RD6:1; + unsigned RD7:1; + }; + + struct { + unsigned AD0:1; + unsigned AD1:1; + unsigned AD2:1; + unsigned AD3:1; + unsigned AD4:1; + unsigned AD5:1; + unsigned AD6:1; + unsigned AD7:1; + }; +} __PORTDbits_t; + +extern volatile __PORTDbits_t __at (0xf83) PORTDbits; + +extern __sfr __at (0xf84) PORTE; +typedef union { + struct { + unsigned RE0:1; + unsigned RE1:1; + unsigned RE2:1; + unsigned RE3:1; + unsigned RE4:1; + unsigned RE5:1; + unsigned RE6:1; + unsigned RE7:1; + }; + + struct { + unsigned ALE:1; + unsigned OE:1; + unsigned WRL:1; + unsigned WRH:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned CCP2:1; + }; + + struct { + unsigned AN5:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTEbits_t; + +extern volatile __PORTEbits_t __at (0xf84) PORTEbits; + +extern __sfr __at (0xf85) PORTF; +typedef union { + struct { + unsigned RF0:1; + unsigned RF1:1; + unsigned RF2:1; + unsigned RF3:1; + unsigned RF4:1; + unsigned RF5:1; + unsigned RF6:1; + unsigned RF7:1; + }; +} __PORTFbits_t; + +extern volatile __PORTFbits_t __at (0xf85) PORTFbits; + +extern __sfr __at (0xf86) PORTG; +typedef union { + struct { + unsigned RG0:1; + unsigned RG1:1; + unsigned RG2:1; + unsigned RG3:1; + unsigned RG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __PORTGbits_t; + +extern volatile __PORTGbits_t __at (0xf86) PORTGbits; + +extern __sfr __at (0xf87) PORTH; +typedef union { + struct { + unsigned RH0:1; + unsigned RH1:1; + unsigned RH2:1; + unsigned RH3:1; + unsigned RH4:1; + unsigned RH5:1; + unsigned RH6:1; + unsigned RH7:1; + }; +} __PORTHbits_t; + +extern volatile __PORTHbits_t __at (0xf87) PORTHbits; + +extern __sfr __at (0xf88) PORTJ; +typedef union { + struct { + unsigned RJ0:1; + unsigned RJ1:1; + unsigned RJ2:1; + unsigned RJ3:1; + unsigned RJ4:1; + unsigned RJ5:1; + unsigned RJ6:1; + unsigned RJ7:1; + }; +} __PORTJbits_t; + +extern volatile __PORTJbits_t __at (0xf88) PORTJbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf8c) LATD; +typedef union { + struct { + unsigned LATD0:1; + unsigned LATD1:1; + unsigned LATD2:1; + unsigned LATD3:1; + unsigned LATD4:1; + unsigned LATD5:1; + unsigned LATD6:1; + unsigned LATD7:1; + }; +} __LATDbits_t; + +extern volatile __LATDbits_t __at (0xf8c) LATDbits; + +extern __sfr __at (0xf8d) LATE; +typedef union { + struct { + unsigned LATE0:1; + unsigned LATE1:1; + unsigned LATE2:1; + unsigned LATE3:1; + unsigned LATE4:1; + unsigned LATE5:1; + unsigned LATE6:1; + unsigned LATE7:1; + }; +} __LATEbits_t; + +extern volatile __LATEbits_t __at (0xf8d) LATEbits; + +extern __sfr __at (0xf8e) LATF; +typedef union { + struct { + unsigned LATF0:1; + unsigned LATF1:1; + unsigned LATF2:1; + unsigned LATF3:1; + unsigned LATF4:1; + unsigned LATF5:1; + unsigned LATF6:1; + unsigned LATF7:1; + }; +} __LATFbits_t; + +extern volatile __LATFbits_t __at (0xf8e) LATFbits; + +extern __sfr __at (0xf8f) LATG; +typedef union { + struct { + unsigned LATG0:1; + unsigned LATG1:1; + unsigned LATG2:1; + unsigned LATG3:1; + unsigned LATG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __LATGbits_t; + +extern volatile __LATGbits_t __at (0xf8f) LATGbits; + +extern __sfr __at (0xf90) LATH; +typedef union { + struct { + unsigned LATH0:1; + unsigned LATH1:1; + unsigned LATH2:1; + unsigned LATH3:1; + unsigned LATH4:1; + unsigned LATH5:1; + unsigned LATH6:1; + unsigned LATH7:1; + }; +} __LATHbits_t; + +extern volatile __LATHbits_t __at (0xf90) LATHbits; + +extern __sfr __at (0xf91) LATJ; +typedef union { + struct { + unsigned LATJ0:1; + unsigned LATJ1:1; + unsigned LATJ2:1; + unsigned LATJ3:1; + unsigned LATJ4:1; + unsigned LATJ5:1; + unsigned LATJ6:1; + unsigned LATJ7:1; + }; +} __LATJbits_t; + +extern volatile __LATJbits_t __at (0xf91) LATJbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf95) TRISD; +typedef union { + struct { + unsigned TRISD0:1; + unsigned TRISD1:1; + unsigned TRISD2:1; + unsigned TRISD3:1; + unsigned TRISD4:1; + unsigned TRISD5:1; + unsigned TRISD6:1; + unsigned TRISD7:1; + }; +} __TRISDbits_t; + +extern volatile __TRISDbits_t __at (0xf95) TRISDbits; + +extern __sfr __at (0xf96) TRISE; +typedef union { + struct { + unsigned TRISE0:1; + unsigned TRISE1:1; + unsigned TRISE2:1; + unsigned TRISE3:1; + unsigned TRISE4:1; + unsigned TRISE5:1; + unsigned TRISE6:1; + unsigned TRISE7:1; + }; +} __TRISEbits_t; + +extern volatile __TRISEbits_t __at (0xf96) TRISEbits; + +extern __sfr __at (0xf97) TRISF; +typedef union { + struct { + unsigned TRISF0:1; + unsigned TRISF1:1; + unsigned TRISF2:1; + unsigned TRISF3:1; + unsigned TRISF4:1; + unsigned TRISF5:1; + unsigned TRISF6:1; + unsigned TRISF7:1; + }; +} __TRISFbits_t; + +extern volatile __TRISFbits_t __at (0xf97) TRISFbits; + +extern __sfr __at (0xf98) TRISG; +typedef union { + struct { + unsigned TRISG0:1; + unsigned TRISG1:1; + unsigned TRISG2:1; + unsigned TRISG3:1; + unsigned TRISG4:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __TRISGbits_t; + +extern volatile __TRISGbits_t __at (0xf98) TRISGbits; + +extern __sfr __at (0xf99) TRISH; +typedef union { + struct { + unsigned TRISH0:1; + unsigned TRISH1:1; + unsigned TRISH2:1; + unsigned TRISH3:1; + unsigned TRISH4:1; + unsigned TRISH5:1; + unsigned TRISH6:1; + unsigned TRISH7:1; + }; +} __TRISHbits_t; + +extern volatile __TRISHbits_t __at (0xf99) TRISHbits; + +extern __sfr __at (0xf9a) TRISJ; +typedef union { + struct { + unsigned TRISJ0:1; + unsigned TRISJ1:1; + unsigned TRISJ2:1; + unsigned TRISJ3:1; + unsigned TRISJ4:1; + unsigned TRISJ5:1; + unsigned TRISJ6:1; + unsigned TRISJ7:1; + }; +} __TRISJbits_t; + +extern volatile __TRISJbits_t __at (0xf9a) TRISJbits; + +extern __sfr __at (0xf9c) MEMCON; +typedef union { + struct { + unsigned WM0:1; + unsigned WM1:1; + unsigned :1; + unsigned :1; + unsigned WAIT0:1; + unsigned WAIT1:1; + unsigned :1; + unsigned EBDIS:1; + }; +} __MEMCONbits_t; + +extern volatile __MEMCONbits_t __at (0xf9c) MEMCONbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned CMIE:1; + unsigned :1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned CMIF:1; + unsigned :1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned CMIP:1; + unsigned :1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa3) PIE3; +typedef union { + struct { + unsigned CCP3IE:1; + unsigned CCP4IE:1; + unsigned CCP5IE:1; + unsigned TMR4IE:1; + unsigned TX2IE:1; + unsigned RC2IE:1; + unsigned :1; + unsigned :1; + }; +} __PIE3bits_t; + +extern volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +extern __sfr __at (0xfa4) PIR3; +typedef union { + struct { + unsigned CCP3IF:1; + unsigned CCP4IF:1; + unsigned CCP5IF:1; + unsigned TMR4IF:1; + unsigned TX2IF:1; + unsigned RC2IF:1; + unsigned :1; + unsigned :1; + }; +} __PIR3bits_t; + +extern volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +extern __sfr __at (0xfa5) IPR3; +typedef union { + struct { + unsigned CCP3IP:1; + unsigned CCP4IP:1; + unsigned CCP5IP:1; + unsigned TMR4IP:1; + unsigned TX2IP:1; + unsigned RC2IP:1; + unsigned :1; + unsigned :1; + }; +} __IPR3bits_t; + +extern volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfaa) EEADRH; +extern __sfr __at (0xfab) RCSTA1; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTA1bits_t; + +extern volatile __RCSTA1bits_t __at (0xfab) RCSTA1bits; + +extern __sfr __at (0xfac) TXSTA1; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTA1bits_t; + +extern volatile __TXSTA1bits_t __at (0xfac) TXSTA1bits; + +extern __sfr __at (0xfad) TXREG1; +extern __sfr __at (0xfae) RCREG1; +extern __sfr __at (0xfaf) SPBRG1; + +/* for compatibility reasons */ +extern __sfr __at (0xfab) RCSTA; +extern volatile __RCSTA1bits_t __at (0xfab) RCSTAbits; +extern __sfr __at (0xfac) TXSTA; +extern volatile __TXSTA1bits_t __at (0xfac) TXSTAbits; +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; + +extern __sfr __at (0xfb0) PSPCON; +typedef union { + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned PSPMODE:1; + unsigned IBOV:1; + unsigned OBF:1; + unsigned IBF:1; + }; +} __PSPCONbits_t; + +extern volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfb4) CMCON; +typedef union { + struct { + unsigned CM0:1; + unsigned CM1:1; + unsigned CM2:1; + unsigned CIS:1; + unsigned C1INV:1; + unsigned C2INV:1; + unsigned C1OUT:1; + unsigned C2OUT:1; + }; +} __CMCONbits_t; + +extern volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +extern __sfr __at (0xfb5) CVRCON; +typedef union { + struct { + unsigned CVR0:1; + unsigned CVR1:1; + unsigned CVR2:1; + unsigned CVR3:1; + unsigned CVREF:1; + unsigned CVRR:1; + unsigned CVROE:1; + unsigned CVREN:1; + }; +} __CVRCONbits_t; + +extern volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +extern __sfr __at (0xfb7) CCP3CON; +typedef union { + struct { + unsigned CCP3M0:1; + unsigned CCP3M1:1; + unsigned CCP3M2:1; + unsigned CCP3M3:1; + unsigned DCCP3Y:1; + unsigned DCCP3X:1; + unsigned :1; + unsigned :1; + }; +} __CCP3CONbits_t; + +extern volatile __CCP3CONbits_t __at (0xfb7) CCP3CONbits; + +extern __sfr __at (0xfb8) CCPR3L; +extern __sfr __at (0xfb9) CCPR3H; +extern __sfr __at (0xfba) CCP2CON; +typedef union { + struct { + unsigned CCP2M0:1; + unsigned CCP2M1:1; + unsigned CCP2M2:1; + unsigned CCP2M3:1; + unsigned DCCP2Y:1; + unsigned DCCP2X:1; + unsigned :1; + unsigned :1; + }; +} __CCP2CONbits_t; + +extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +extern __sfr __at (0xfbb) CCPR2L; +extern __sfr __at (0xfbc) CCPR2H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DCCP1Y:1; + unsigned DCCP1X:1; + unsigned :1; + unsigned :1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc0) ADCON2; +typedef union { + struct { + unsigned ADCS0:1; + unsigned ADCS1:1; + unsigned ADCS2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned ADFM:1; + }; +} __ADCON2bits_t; + +extern volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned VCFG0:1; + unsigned VCFG1:1; + unsigned :1; + unsigned :1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned CHS3:1; + unsigned :1; + unsigned :1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned INT2F:1; + unsigned INT3F:1; + unsigned INT1E:1; + unsigned INT2E:1; + unsigned INT3E:1; + unsigned INT1P:1; + unsigned INT2P:1; + }; + + struct { + unsigned INT1IF:1; + unsigned INT2IF:1; + unsigned INT3IF:1; + unsigned INT1IE:1; + unsigned INT2IE:1; + unsigned INT3IE:1; + unsigned INT1IP:1; + unsigned INT2IP:1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned INT3P:1; + unsigned T0IP:1; + unsigned INTEDG3:1; + unsigned INTEDG2:1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; + struct { + unsigned :1; + unsigned INT0IF:1; + unsigned TMR0IF:1; + unsigned :1; + unsigned INT0IE:1; + unsigned TMR0IE:1; + unsigned GIEL:1; + unsigned GIEH:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3L 0x300004 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */ +#define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */ +#define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */ +#define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */ +#define _OSC_RC_1H 0xFB /* RC */ +#define _OSC_HS_1H 0xFA /* HS */ +#define _OSC_XT_1H 0xF9 /* XT */ +#define _OSC_LP_1H 0xF8 /* LP */ + +/* Osc. Switch Enable 1H options */ +#define _OSCS_OFF_1H 0xFF /* Disabled */ +#define _OSCS_ON_1H 0xDF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_5V_2L 0xFF /* 2.5V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_OFF_2H 0xFE /* Disabled */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_128_2H 0xFF /* 1:128 */ +#define _WDTPS_1_64_2H 0xFD /* 1:64 */ +#define _WDTPS_1_32_2H 0xFB /* 1:32 */ +#define _WDTPS_1_16_2H 0xF9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xF7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xF5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xF3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xF1 /* 1:1 */ + +/* Processor Mode 3L options */ +#define _PMODE_MICROCONTROLLER_3L 0xFF /* Microcontroller */ +#define _PMODE_MICROPROCESSOR__3L 0xFE /* Microprocessor */ +#define _PMODE_MICROPROCESSOR_w_Boot_3L 0xFD /* Microprocessor w_Boot */ +#define _PMODE_EXT_3L 0xFC /* Ext Microcontroller */ + +/* External Bus Wait 3L options */ +#define _WAIT_OFF_3L 0xFF /* Disabled */ +#define _WAIT_ON_3L 0x7F /* Enabled */ + +/* CCP2 Mux 3H options */ +#define _CCP2MUX_RC1_3H 0xFF /* RC1 */ +#define _CCP2MUX_RE7_MICROCONTROLLER__RB3_3H 0xFE /* RE7(Microcontroller)/RB3 */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Code Protect 00200-03FFF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 04000-07FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Code Protect 08000-0BFFF 5L options */ +#define _CP_2_OFF_5L 0xFF /* Disabled */ +#define _CP_2_ON_5L 0xFB /* Enabled */ + +/* Code Protect 0C000-0FFFF 5L options */ +#define _CP_3_OFF_5L 0xFF /* Disabled */ +#define _CP_3_ON_5L 0xF7 /* Enabled */ + +/* Code Protect 10000-13FFF 5L options */ +#define _CP_4_OFF_5L 0xFF /* Disabled */ +#define _CP_4_ON_5L 0xEF /* Enabled */ + +/* Code Protect 14000-17FFF 5L options */ +#define _CP_5_OFF_5L 0xFF /* Disabled */ +#define _CP_5_ON_5L 0xDF /* Enabled */ + +/* Code Protect 18000-1BFFF 5L options */ +#define _CP_6_OFF_5L 0xFF /* Disabled */ +#define _CP_6_ON_5L 0xBF /* Enabled */ + +/* Code Protect 1C000-1FFFF 5L options */ +#define _CP_7_OFF_5L 0xFF /* Disabled */ +#define _CP_7_ON_5L 0x7F /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00200-03FFF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 04000-07FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Table Write Protect 08000-0BFFF 6L options */ +#define _WRT_2_OFF_6L 0xFF /* Disabled */ +#define _WRT_2_ON_6L 0xFB /* Enabled */ + +/* Table Write Protect 0C000-0FFFF 6L options */ +#define _WRT_3_OFF_6L 0xFF /* Disabled */ +#define _WRT_3_ON_6L 0xF7 /* Enabled */ + +/* Table Write Protect 10000-13FFF 6L options */ +#define _WRT_4_OFF_6L 0xFF /* Disabled */ +#define _WRT_4_ON_6L 0xEF /* Enabled */ + +/* Table Write Protect 14000-17FFF 6L options */ +#define _WRT_5_OFF_6L 0xFF /* Disabled */ +#define _WRT_5_ON_6L 0xDF /* Enabled */ + +/* Table Write Protect 18000-1BFFF 6L options */ +#define _WRT_6_OFF_6L 0xFF /* Disabled */ +#define _WRT_6_ON_6L 0xBF /* Enabled */ + +/* Table Write Protect 1C000-1FFFF 6L options */ +#define _WRT_7_OFF_6L 0xFF /* Disabled */ +#define _WRT_7_ON_6L 0x7F /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00200-03FFF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 04000-07FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect 08000-0BFFF 7L options */ +#define _EBTR_2_OFF_7L 0xFF /* Disabled */ +#define _EBTR_2_ON_7L 0xFB /* Enabled */ + +/* Table Read Protect 0C000-0FFFF 7L options */ +#define _EBTR_3_OFF_7L 0xFF /* Disabled */ +#define _EBTR_3_ON_7L 0xF7 /* Enabled */ + +/* Table Read Protect 10000-13FFF 7L options */ +#define _EBTR_4_OFF_7L 0xFF /* Disabled */ +#define _EBTR_4_ON_7L 0xEF /* Enabled */ + +/* Table Read Protect 14000-17FFF 7L options */ +#define _EBTR_5_OFF_7L 0xFF /* Disabled */ +#define _EBTR_5_ON_7L 0xDF /* Enabled */ + +/* Table Read Protect 18000-1BFFF 7L options */ +#define _EBTR_6_OFF_7L 0xFF /* Disabled */ +#define _EBTR_6_ON_7L 0xBF /* Enabled */ + +/* Table Read Protect 1C000-1FFFF 7L options */ +#define _EBTR_7_OFF_7L 0xFF /* Disabled */ +#define _EBTR_7_ON_7L 0x7F /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18f87j50.h b/device/include/pic16/pic18f87j50.h new file mode 100644 index 0000000..380cc07 --- /dev/null +++ b/device/include/pic16/pic18f87j50.h @@ -0,0 +1,3435 @@ +/* + * pic18f87j50.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F87J50_H__ +#define __PIC18F87J50_H__ 1 + + + +// Configuration Bits +#define __CONFIG1L 0x1FFF8 +#define __CONFIG1H 0x1FFF9 +#define __CONFIG2L 0x1FFFA +#define __CONFIG2H 0x1FFFB +#define __CONFIG3L 0x1FFFC +#define __CONFIG3H 0x1FFFD +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF + +extern __sfr __at (0xF40) PMSTAT; + +extern __sfr __at (0xF40) PMSTATL; +typedef union { + struct { + unsigned OB0E : 1; + unsigned OB1E : 1; + unsigned OB2E : 1; + unsigned OB3E : 1; + unsigned : 1; + unsigned : 1; + unsigned OBUF : 1; + unsigned OBE : 1; + }; +} __PMSTATLbits_t; +extern volatile __PMSTATLbits_t __at (0xF40) PMSTATLbits; + +extern __sfr __at (0xF41) PMSTATH; +typedef union { + struct { + unsigned IB0F : 1; + unsigned IB1F : 1; + unsigned IB2F : 1; + unsigned IB3F : 1; + unsigned : 1; + unsigned : 1; + unsigned IBOV : 1; + unsigned IBF : 1; + }; +} __PMSTATHbits_t; +extern volatile __PMSTATHbits_t __at (0xF41) PMSTATHbits; + +extern __sfr __at (0xF42) PMEL; +typedef union { + struct { + unsigned PTEN0 : 1; + unsigned PTEN1 : 1; + unsigned PTEN2 : 1; + unsigned PTEN3 : 1; + unsigned PTEN4 : 1; + unsigned PTEN5 : 1; + unsigned PTEN6 : 1; + unsigned PTEN7 : 1; + }; +} __PMELbits_t; +extern volatile __PMELbits_t __at (0xF42) PMELbits; + +extern __sfr __at (0xF42) PMEN; + +extern __sfr __at (0xF43) PMEH; +typedef union { + struct { + unsigned PTEN8 : 1; + unsigned PTEN9 : 1; + unsigned PTEN10 : 1; + unsigned PTEN11 : 1; + unsigned PTEN12 : 1; + unsigned PTEN13 : 1; + unsigned PTEN14 : 1; + unsigned PTEN15 : 1; + }; +} __PMEHbits_t; +extern volatile __PMEHbits_t __at (0xF43) PMEHbits; + +extern __sfr __at (0xF44) PMDIN2; + +extern __sfr __at (0xF44) PMDIN2L; + +extern __sfr __at (0xF45) PMDIN2H; + +extern __sfr __at (0xF46) PMDOUT2; + +extern __sfr __at (0xF46) PMDOUT2L; + +extern __sfr __at (0xF47) PMDOUT2H; + +extern __sfr __at (0xF48) PMMODE; + +extern __sfr __at (0xF48) PMMODEL; +typedef union { + struct { + unsigned WAITE0 : 1; + unsigned WAITE1 : 1; + unsigned WAITM0 : 1; + unsigned WAITM1 : 1; + unsigned WAITM2 : 1; + unsigned WAITM3 : 1; + unsigned WAITB0 : 1; + unsigned WAITB1 : 1; + }; +} __PMMODELbits_t; +extern volatile __PMMODELbits_t __at (0xF48) PMMODELbits; + +extern __sfr __at (0xF49) PMMODEH; +typedef union { + struct { + unsigned MODE0 : 1; + unsigned MODE1 : 1; + unsigned MODE16 : 1; + unsigned INCM0 : 1; + unsigned INCM1 : 1; + unsigned IRQM0 : 1; + unsigned IRQM1 : 1; + unsigned BUSY : 1; + }; +} __PMMODEHbits_t; +extern volatile __PMMODEHbits_t __at (0xF49) PMMODEHbits; + +extern __sfr __at (0xF4A) PMCON; + +extern __sfr __at (0xF4A) PMCONL; +typedef union { + struct { + unsigned RDSP : 1; + unsigned WRSP : 1; + unsigned BEP : 1; + unsigned CS1P : 1; + unsigned CS2P : 1; + unsigned ALP : 1; + unsigned CSF0 : 1; + unsigned CSF1 : 1; + }; +} __PMCONLbits_t; +extern volatile __PMCONLbits_t __at (0xF4A) PMCONLbits; + +extern __sfr __at (0xF4B) PMCONH; +typedef union { + struct { + unsigned PTRDEN : 1; + unsigned PTWREN : 1; + unsigned PTBEEN : 1; + unsigned ADRMUX0 : 1; + unsigned ADRMUX1 : 1; + unsigned PSIDL : 1; + unsigned : 1; + unsigned PMPEN : 1; + }; +} __PMCONHbits_t; +extern volatile __PMCONHbits_t __at (0xF4B) PMCONHbits; + +extern __sfr __at (0xF4C) UEP0; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP0bits_t; +extern volatile __UEP0bits_t __at (0xF4C) UEP0bits; + +extern __sfr __at (0xF4D) UEP1; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP1bits_t; +extern volatile __UEP1bits_t __at (0xF4D) UEP1bits; + +extern __sfr __at (0xF4E) UEP2; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP2bits_t; +extern volatile __UEP2bits_t __at (0xF4E) UEP2bits; + +extern __sfr __at (0xF4F) UEP3; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP3bits_t; +extern volatile __UEP3bits_t __at (0xF4F) UEP3bits; + +extern __sfr __at (0xF50) UEP4; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP4bits_t; +extern volatile __UEP4bits_t __at (0xF50) UEP4bits; + +extern __sfr __at (0xF51) UEP5; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP5bits_t; +extern volatile __UEP5bits_t __at (0xF51) UEP5bits; + +extern __sfr __at (0xF52) UEP6; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP6bits_t; +extern volatile __UEP6bits_t __at (0xF52) UEP6bits; + +extern __sfr __at (0xF53) UEP7; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP7bits_t; +extern volatile __UEP7bits_t __at (0xF53) UEP7bits; + +extern __sfr __at (0xF54) UEP8; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP8bits_t; +extern volatile __UEP8bits_t __at (0xF54) UEP8bits; + +extern __sfr __at (0xF55) UEP9; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP9bits_t; +extern volatile __UEP9bits_t __at (0xF55) UEP9bits; + +extern __sfr __at (0xF56) UEP10; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP10bits_t; +extern volatile __UEP10bits_t __at (0xF56) UEP10bits; + +extern __sfr __at (0xF57) UEP11; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP11bits_t; +extern volatile __UEP11bits_t __at (0xF57) UEP11bits; + +extern __sfr __at (0xF58) UEP12; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP12bits_t; +extern volatile __UEP12bits_t __at (0xF58) UEP12bits; + +extern __sfr __at (0xF59) UEP13; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP13bits_t; +extern volatile __UEP13bits_t __at (0xF59) UEP13bits; + +extern __sfr __at (0xF5A) UEP14; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP14bits_t; +extern volatile __UEP14bits_t __at (0xF5A) UEP14bits; + +extern __sfr __at (0xF5B) UEP15; +typedef union { + struct { + unsigned EPSTALL : 1; + unsigned EPINEN : 1; + unsigned EPOUTEN : 1; + unsigned EPCONDIS : 1; + unsigned EPHSHK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UEP15bits_t; +extern volatile __UEP15bits_t __at (0xF5B) UEP15bits; + +extern __sfr __at (0xF5C) UIE; +typedef union { + struct { + unsigned URSTIE : 1; + unsigned UERRIE : 1; + unsigned ACTVIE : 1; + unsigned TRNIE : 1; + unsigned IDLEIE : 1; + unsigned STALLIE : 1; + unsigned SOFIE : 1; + unsigned : 1; + }; +} __UIEbits_t; +extern volatile __UIEbits_t __at (0xF5C) UIEbits; + +extern __sfr __at (0xF5D) UEIE; +typedef union { + struct { + unsigned PIDEE : 1; + unsigned CRC5EE : 1; + unsigned CRC16EE : 1; + unsigned DFN8EE : 1; + unsigned BTOEE : 1; + unsigned : 1; + unsigned : 1; + unsigned BTSEE : 1; + }; +} __UEIEbits_t; +extern volatile __UEIEbits_t __at (0xF5D) UEIEbits; + +extern __sfr __at (0xF5E) UADDR; +typedef union { + struct { + unsigned ADDR0 : 1; + unsigned ADDR1 : 1; + unsigned ADDR2 : 1; + unsigned ADDR3 : 1; + unsigned ADDR4 : 1; + unsigned ADDR5 : 1; + unsigned ADDR6 : 1; + unsigned : 1; + }; +} __UADDRbits_t; +extern volatile __UADDRbits_t __at (0xF5E) UADDRbits; + +extern __sfr __at (0xF5F) UCFG; +typedef union { + struct { + unsigned PPB0 : 1; + unsigned PPB1 : 1; + unsigned FSEN : 1; + unsigned UTRDIS : 1; + unsigned UPUEN : 1; + unsigned : 1; + unsigned UOEMON : 1; + unsigned UTEYE : 1; + }; +} __UCFGbits_t; +extern volatile __UCFGbits_t __at (0xF5F) UCFGbits; + +extern __sfr __at (0xF60) UFRM; + +extern __sfr __at (0xF60) UFRML; +typedef union { + struct { + unsigned FRM0 : 1; + unsigned FRM1 : 1; + unsigned FRM2 : 1; + unsigned FRM3 : 1; + unsigned FRM4 : 1; + unsigned FRM5 : 1; + unsigned FRM6 : 1; + unsigned FRM7 : 1; + }; +} __UFRMLbits_t; +extern volatile __UFRMLbits_t __at (0xF60) UFRMLbits; + +extern __sfr __at (0xF61) UFRMH; +typedef union { + struct { + unsigned FRM8 : 1; + unsigned FRM9 : 1; + unsigned FRM10 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __UFRMHbits_t; +extern volatile __UFRMHbits_t __at (0xF61) UFRMHbits; + +extern __sfr __at (0xF62) UIR; +typedef union { + struct { + unsigned URSTIF : 1; + unsigned UERRIF : 1; + unsigned ACTVIF : 1; + unsigned TRNIF : 1; + unsigned IDLEIF : 1; + unsigned STALLIF : 1; + unsigned SOFIF : 1; + unsigned : 1; + }; +} __UIRbits_t; +extern volatile __UIRbits_t __at (0xF62) UIRbits; + +extern __sfr __at (0xF63) UEIR; +typedef union { + struct { + unsigned PIDEF : 1; + unsigned CRC5EF : 1; + unsigned CRC16EF : 1; + unsigned DFN8EF : 1; + unsigned BTOEF : 1; + unsigned : 1; + unsigned : 1; + unsigned BTSEF : 1; + }; +} __UEIRbits_t; +extern volatile __UEIRbits_t __at (0xF63) UEIRbits; + +extern __sfr __at (0xF64) USTAT; +typedef union { + struct { + unsigned : 1; + unsigned PPBI : 1; + unsigned DIR : 1; + unsigned ENDP0 : 1; + unsigned ENDP1 : 1; + unsigned ENDP2 : 1; + unsigned ENDP3 : 1; + unsigned : 1; + }; +} __USTATbits_t; +extern volatile __USTATbits_t __at (0xF64) USTATbits; + +extern __sfr __at (0xF65) UCON; +typedef union { + struct { + unsigned : 1; + unsigned SUSPND : 1; + unsigned RESUME : 1; + unsigned USBEN : 1; + unsigned PKTDIS : 1; + unsigned SE0 : 1; + unsigned PPBRST : 1; + unsigned : 1; + }; +} __UCONbits_t; +extern volatile __UCONbits_t __at (0xF65) UCONbits; + +extern __sfr __at (0xF66) PMDIN1; + +extern __sfr __at (0xF66) PMDIN1L; + +extern __sfr __at (0xF67) PMDIN1H; + +extern __sfr __at (0xF68) PMADDR; + +extern __sfr __at (0xF68) PMADDRL; + +extern __sfr __at (0xF68) PMDOUT1; + +extern __sfr __at (0xF68) PMDOUT1L; + +extern __sfr __at (0xF69) PMADDRH; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CS1 : 1; + unsigned CS2 : 1; + }; +} __PMADDRHbits_t; +extern volatile __PMADDRHbits_t __at (0xF69) PMADDRHbits; + +extern __sfr __at (0xF69) PMDOUT1H; + +extern __sfr __at (0xF6A) CMSTAT; +typedef union { + struct { + unsigned COUT1 : 1; + unsigned COUT2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CMSTATbits_t; +extern volatile __CMSTATbits_t __at (0xF6A) CMSTATbits; + +extern __sfr __at (0xF6A) CMSTATUS; +typedef union { + struct { + unsigned COUT1 : 1; + unsigned COUT2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CMSTATUSbits_t; +extern volatile __CMSTATUSbits_t __at (0xF6A) CMSTATUSbits; + +extern __sfr __at (0xF6B) SSP2CON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP2CON2bits_t; +extern volatile __SSP2CON2bits_t __at (0xF6B) SSP2CON2bits; + +extern __sfr __at (0xF6C) SSP2CON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSP2CON1bits_t; +extern volatile __SSP2CON1bits_t __at (0xF6C) SSP2CON1bits; + +extern __sfr __at (0xF6D) SSP2STAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP2STATbits_t; +extern volatile __SSP2STATbits_t __at (0xF6D) SSP2STATbits; + +extern __sfr __at (0xF6E) SSP2ADD; + +extern __sfr __at (0xF6E) SSP2MSK; +typedef union { + struct { + unsigned MSK0 : 1; + unsigned MSK1 : 1; + unsigned MSK2 : 1; + unsigned MSK3 : 1; + unsigned MSK4 : 1; + unsigned MSK5 : 1; + unsigned MSK6 : 1; + unsigned MSK7 : 1; + }; +} __SSP2MSKbits_t; +extern volatile __SSP2MSKbits_t __at (0xF6E) SSP2MSKbits; + +extern __sfr __at (0xF6F) SSP2BUF; + +extern __sfr __at (0xF70) CCP5CON; +typedef union { + struct { + unsigned CCP5M0 : 1; + unsigned CCP5M1 : 1; + unsigned CCP5M2 : 1; + unsigned CCP5M3 : 1; + unsigned DCCP5Y : 1; + unsigned DCCP5X : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DC5B0 : 1; + unsigned DC5B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP5CONbits_t; +extern volatile __CCP5CONbits_t __at (0xF70) CCP5CONbits; + +extern __sfr __at (0xF71) CCPR5; + +extern __sfr __at (0xF71) CCPR5L; + +extern __sfr __at (0xF72) CCPR5H; + +extern __sfr __at (0xF73) CCP4CON; +typedef union { + struct { + unsigned CCP4M0 : 1; + unsigned CCP4M1 : 1; + unsigned CCP4M2 : 1; + unsigned CCP4M3 : 1; + unsigned DCCP4Y : 1; + unsigned DCCP4X : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DC4B0 : 1; + unsigned DC4B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP4CONbits_t; +extern volatile __CCP4CONbits_t __at (0xF73) CCP4CONbits; + +extern __sfr __at (0xF74) CCPR4; + +extern __sfr __at (0xF74) CCPR4L; + +extern __sfr __at (0xF75) CCPR4H; + +extern __sfr __at (0xF76) T4CON; +typedef union { + struct { + unsigned T4CKPS0 : 1; + unsigned T4CKPS1 : 1; + unsigned TMR4ON : 1; + unsigned T4OUTPS0 : 1; + unsigned T4OUTPS1 : 1; + unsigned T4OUTPS2 : 1; + unsigned T4OUTPS3 : 1; + unsigned : 1; + }; +} __T4CONbits_t; +extern volatile __T4CONbits_t __at (0xF76) T4CONbits; + +extern __sfr __at (0xF77) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xF77) CVRCONbits; + +extern __sfr __at (0xF77) PR4; + +extern __sfr __at (0xF78) TMR4; + +extern __sfr __at (0xF79) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T3INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xF79) T3CONbits; + +extern __sfr __at (0xF7A) TMR3L; + +extern __sfr __at (0xF7B) TMR3H; + +extern __sfr __at (0xF7C) BAUDCON2; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned DTRXP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned RXDTP : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCON2bits_t; +extern volatile __BAUDCON2bits_t __at (0xF7C) BAUDCON2bits; + +extern __sfr __at (0xF7D) SPBRGH2; + +extern __sfr __at (0xF7E) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned DTRXP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned RXDTP : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xF7E) BAUDCONbits; + +extern __sfr __at (0xF7E) BAUDCON1; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned DTRXP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned RXDTP : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCON1bits_t; +extern volatile __BAUDCON1bits_t __at (0xF7E) BAUDCON1bits; + +extern __sfr __at (0xF7F) SPBRGH; + +extern __sfr __at (0xF7F) SPBRGH1; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned RA6 : 1; + unsigned RA7 : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned OSC2 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned PMD5_PORTA : 1; + unsigned C2INA : 1; + unsigned CLKO : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PMD4_PORTA : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned INT3 : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned PMA4 : 1; + unsigned PMA3 : 1; + unsigned PMA2 : 1; + unsigned PMA1 : 1; + unsigned PMA0 : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2_PORTB : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned CCP2_PORTC : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned C2OUT : 1; + unsigned CK : 1; + unsigned DT : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned PMD0_PORTD : 1; + unsigned PMD1_PORTD : 1; + unsigned PMD2_PORTD : 1; + unsigned PMD3_PORTD : 1; + unsigned PMD4_PORTD : 1; + unsigned PMD5_PORTD : 1; + unsigned PMD6_PORTD : 1; + unsigned PMD7_PORTD : 1; + }; + struct { + unsigned AD0 : 1; + unsigned AD1 : 1; + unsigned AD2 : 1; + unsigned AD3 : 1; + unsigned AD4 : 1; + unsigned AD5 : 1; + unsigned AD6 : 1; + unsigned AD7 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SDO2 : 1; + unsigned SDA2 : 1; + unsigned SCL2 : 1; + unsigned SS2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SDI2 : 1; + unsigned SCK2 : 1; + unsigned : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned RE4 : 1; + unsigned RE5 : 1; + unsigned RE6 : 1; + unsigned RE7 : 1; + }; + struct { + unsigned AD8 : 1; + unsigned AD9 : 1; + unsigned AD10 : 1; + unsigned AD11 : 1; + unsigned AD12 : 1; + unsigned AD13 : 1; + unsigned AD14 : 1; + unsigned AD15 : 1; + }; + struct { + unsigned PMRD_PORTE : 1; + unsigned PMWR_PORTE : 1; + unsigned PMBE_PORTE : 1; + unsigned PMA13 : 1; + unsigned PMA12 : 1; + unsigned PMA11 : 1; + unsigned PMA10 : 1; + unsigned PMA9 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned REFO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2_PORTE : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF85) PORTF; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned RF2 : 1; + unsigned RF3 : 1; + unsigned RF4 : 1; + unsigned RF5 : 1; + unsigned RF6 : 1; + unsigned RF7 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned AN7 : 1; + unsigned : 1; + unsigned : 1; + unsigned AN10 : 1; + unsigned AN11 : 1; + unsigned SS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned C2INB : 1; + unsigned : 1; + unsigned : 1; + unsigned CVREF : 1; + unsigned C1INA : 1; + unsigned C1OUT : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned PMA5 : 1; + unsigned : 1; + unsigned : 1; + unsigned C1INB : 1; + unsigned PMD1_PORTF : 1; + unsigned PMD0_PORTF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PMD2_PORTF : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTFbits_t; +extern volatile __PORTFbits_t __at (0xF85) PORTFbits; + +extern __sfr __at (0xF86) PORTG; +typedef union { + struct { + unsigned RG0 : 1; + unsigned RG1 : 1; + unsigned RG2 : 1; + unsigned RG3 : 1; + unsigned RG4 : 1; + unsigned RJPU : 1; + unsigned REPU : 1; + unsigned RDPU : 1; + }; + struct { + unsigned CCP3 : 1; + unsigned TX2 : 1; + unsigned RX2 : 1; + unsigned CCP4 : 1; + unsigned CCP5 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned PMA8 : 1; + unsigned CK2 : 1; + unsigned DT2 : 1; + unsigned PMCS1 : 1; + unsigned PMCS2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned PMA7 : 1; + unsigned PMA6 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTGbits_t; +extern volatile __PORTGbits_t __at (0xF86) PORTGbits; + +extern __sfr __at (0xF87) PORTH; +typedef union { + struct { + unsigned RH0 : 1; + unsigned RH1 : 1; + unsigned RH2 : 1; + unsigned RH3 : 1; + unsigned RH4 : 1; + unsigned RH5 : 1; + unsigned RH6 : 1; + unsigned RH7 : 1; + }; + struct { + unsigned A16 : 1; + unsigned A17 : 1; + unsigned A18 : 1; + unsigned A19 : 1; + unsigned AN12 : 1; + unsigned AN13 : 1; + unsigned AN14 : 1; + unsigned AN15 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned PMD7_PORTH : 1; + unsigned PMD6_PORTH : 1; + unsigned PMD3_PORTH : 1; + unsigned PMBE_PORTH : 1; + unsigned PMRD_PORTH : 1; + unsigned PMWR_PORTH : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned C2INC : 1; + unsigned C2IND : 1; + unsigned C1INC : 1; + unsigned P1B : 1; + }; +} __PORTHbits_t; +extern volatile __PORTHbits_t __at (0xF87) PORTHbits; + +extern __sfr __at (0xF88) PORTJ; +typedef union { + struct { + unsigned RJ0 : 1; + unsigned RJ1 : 1; + unsigned RJ2 : 1; + unsigned RJ3 : 1; + unsigned RJ4 : 1; + unsigned RJ5 : 1; + unsigned RJ6 : 1; + unsigned RJ7 : 1; + }; + struct { + unsigned ALE : 1; + unsigned OE : 1; + unsigned WRL : 1; + unsigned WRH : 1; + unsigned BA0 : 1; + unsigned CE : 1; + unsigned LB : 1; + unsigned UB : 1; + }; +} __PORTJbits_t; +extern volatile __PORTJbits_t __at (0xF88) PORTJbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned LATE3 : 1; + unsigned LATE4 : 1; + unsigned LATE5 : 1; + unsigned LATE6 : 1; + unsigned LATE7 : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF8E) LATF; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned LATF2 : 1; + unsigned LATF3 : 1; + unsigned LATF4 : 1; + unsigned LATF5 : 1; + unsigned LATF6 : 1; + unsigned LATF7 : 1; + }; +} __LATFbits_t; +extern volatile __LATFbits_t __at (0xF8E) LATFbits; + +extern __sfr __at (0xF8F) LATG; +typedef union { + struct { + unsigned LATG0 : 1; + unsigned LATG1 : 1; + unsigned LATG2 : 1; + unsigned LATG3 : 1; + unsigned LATG4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATGbits_t; +extern volatile __LATGbits_t __at (0xF8F) LATGbits; + +extern __sfr __at (0xF90) LATH; +typedef union { + struct { + unsigned LATH0 : 1; + unsigned LATH1 : 1; + unsigned LATH2 : 1; + unsigned LATH3 : 1; + unsigned LATH4 : 1; + unsigned LATH5 : 1; + unsigned LATH6 : 1; + unsigned LATH7 : 1; + }; +} __LATHbits_t; +extern volatile __LATHbits_t __at (0xF90) LATHbits; + +extern __sfr __at (0xF91) LATJ; +typedef union { + struct { + unsigned LATJ0 : 1; + unsigned LATJ1 : 1; + unsigned LATJ2 : 1; + unsigned LATJ3 : 1; + unsigned LATJ4 : 1; + unsigned LATJ5 : 1; + unsigned LATJ6 : 1; + unsigned LATJ7 : 1; + }; +} __LATJbits_t; +extern volatile __LATJbits_t __at (0xF91) LATJbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned RE4 : 1; + unsigned RE5 : 1; + unsigned RE6 : 1; + unsigned RE7 : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned TRISE3 : 1; + unsigned TRISE4 : 1; + unsigned TRISE5 : 1; + unsigned TRISE6 : 1; + unsigned TRISE7 : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF97) DDRF; +typedef union { + struct { + unsigned : 1; + unsigned RF1 : 1; + unsigned RF2 : 1; + unsigned RF3 : 1; + unsigned RF4 : 1; + unsigned RF5 : 1; + unsigned RF6 : 1; + unsigned RF7 : 1; + }; +} __DDRFbits_t; +extern volatile __DDRFbits_t __at (0xF97) DDRFbits; + +extern __sfr __at (0xF97) TRISF; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned TRISF2 : 1; + unsigned TRISF3 : 1; + unsigned TRISF4 : 1; + unsigned TRISF5 : 1; + unsigned TRISF6 : 1; + unsigned TRISF7 : 1; + }; +} __TRISFbits_t; +extern volatile __TRISFbits_t __at (0xF97) TRISFbits; + +extern __sfr __at (0xF98) DDRG; +typedef union { + struct { + unsigned RG0 : 1; + unsigned RG1 : 1; + unsigned RG2 : 1; + unsigned RG3 : 1; + unsigned RG4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDRGbits_t; +extern volatile __DDRGbits_t __at (0xF98) DDRGbits; + +extern __sfr __at (0xF98) TRISG; +typedef union { + struct { + unsigned TRISG0 : 1; + unsigned TRISG1 : 1; + unsigned TRISG2 : 1; + unsigned TRISG3 : 1; + unsigned TRISG4 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISGbits_t; +extern volatile __TRISGbits_t __at (0xF98) TRISGbits; + +extern __sfr __at (0xF99) DDRH; +typedef union { + struct { + unsigned RH0 : 1; + unsigned RH1 : 1; + unsigned RH2 : 1; + unsigned RH3 : 1; + unsigned RH4 : 1; + unsigned RH5 : 1; + unsigned RH6 : 1; + unsigned RH7 : 1; + }; +} __DDRHbits_t; +extern volatile __DDRHbits_t __at (0xF99) DDRHbits; + +extern __sfr __at (0xF99) TRISH; +typedef union { + struct { + unsigned TRISH0 : 1; + unsigned TRISH1 : 1; + unsigned TRISH2 : 1; + unsigned TRISH3 : 1; + unsigned TRISH4 : 1; + unsigned TRISH5 : 1; + unsigned TRISH6 : 1; + unsigned TRISH7 : 1; + }; +} __TRISHbits_t; +extern volatile __TRISHbits_t __at (0xF99) TRISHbits; + +extern __sfr __at (0xF9A) DDRJ; +typedef union { + struct { + unsigned RJ0 : 1; + unsigned RJ1 : 1; + unsigned RJ2 : 1; + unsigned RJ3 : 1; + unsigned RJ4 : 1; + unsigned RJ5 : 1; + unsigned RJ6 : 1; + unsigned RJ7 : 1; + }; +} __DDRJbits_t; +extern volatile __DDRJbits_t __at (0xF9A) DDRJbits; + +extern __sfr __at (0xF9A) TRISJ; +typedef union { + struct { + unsigned TRISJ0 : 1; + unsigned TRISJ1 : 1; + unsigned TRISJ2 : 1; + unsigned TRISJ3 : 1; + unsigned TRISJ4 : 1; + unsigned TRISJ5 : 1; + unsigned TRISJ6 : 1; + unsigned TRISJ7 : 1; + }; +} __TRISJbits_t; +extern volatile __TRISJbits_t __at (0xF9A) TRISJbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned TUN0 : 1; + unsigned TUN1 : 1; + unsigned TUN2 : 1; + unsigned TUN3 : 1; + unsigned TUN4 : 1; + unsigned TUN5 : 1; + unsigned PLLEN : 1; + unsigned INTSRC : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9C) RCSTA2; +typedef union { + struct { + unsigned RCD8 : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RC9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RX9D : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RX9 : 1; + unsigned : 1; + }; +} __RCSTA2bits_t; +extern volatile __RCSTA2bits_t __at (0xF9C) RCSTA2bits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PMPIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IE : 1; + unsigned TX1IE : 1; + unsigned RC1IE : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PMPIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IF : 1; + unsigned TX1IF : 1; + unsigned RC1IF : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PMPIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IP : 1; + unsigned TX1IP : 1; + unsigned RC1IP : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned TMR3IE : 1; + unsigned LVDIE : 1; + unsigned BCLIE : 1; + unsigned USBIE : 1; + unsigned CM1IE : 1; + unsigned CM2IE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned TMR3IF : 1; + unsigned LVDIF : 1; + unsigned BCLIF : 1; + unsigned USBIF : 1; + unsigned CM1IF : 1; + unsigned CM2IF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned TMR3IP : 1; + unsigned LVDIP : 1; + unsigned BCLIP : 1; + unsigned USBIP : 1; + unsigned CM1IP : 1; + unsigned CM2IP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned CCP3IE : 1; + unsigned CCP4IE : 1; + unsigned CCP5IE : 1; + unsigned TMR4IE : 1; + unsigned TX2IE : 1; + unsigned RC2IE : 1; + unsigned BCL2IE : 1; + unsigned SSP2IE : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned CCP3IF : 1; + unsigned CCP4IF : 1; + unsigned CCP5IF : 1; + unsigned TMR4IF : 1; + unsigned TX2IF : 1; + unsigned RC2IF : 1; + unsigned BCL2IF : 1; + unsigned SSP2IF : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned CCP3IP : 1; + unsigned CCP4IP : 1; + unsigned CCP5IP : 1; + unsigned TMR4IP : 1; + unsigned TX2IP : 1; + unsigned RC2IP : 1; + unsigned BCL2IP : 1; + unsigned SSP2IP : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned WPROG : 1; + unsigned : 1; + unsigned : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFA8) TXSTA2; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTA2bits_t; +extern volatile __TXSTA2bits_t __at (0xFA8) TXSTA2bits; + +extern __sfr __at (0xFA9) TXREG2; + +extern __sfr __at (0xFAA) RCREG2; + +extern __sfr __at (0xFAB) SPBRG2; + +extern __sfr __at (0xFAC) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAC) RCSTAbits; + +extern __sfr __at (0xFAC) RCSTA1; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTA1bits_t; +extern volatile __RCSTA1bits_t __at (0xFAC) RCSTA1bits; + +extern __sfr __at (0xFAD) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAD) TXSTAbits; + +extern __sfr __at (0xFAD) TXSTA1; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTA1bits_t; +extern volatile __TXSTA1bits_t __at (0xFAD) TXSTA1bits; + +extern __sfr __at (0xFAE) TXREG; + +extern __sfr __at (0xFAE) TXREG1; + +extern __sfr __at (0xFAF) RCREG; + +extern __sfr __at (0xFAF) RCREG1; + +extern __sfr __at (0xFB0) SPBRG; + +extern __sfr __at (0xFB0) SPBRG1; + +extern __sfr __at (0xFB1) CCP3CON; +typedef union { + struct { + unsigned CCP3M0 : 1; + unsigned CCP3M1 : 1; + unsigned CCP3M2 : 1; + unsigned CCP3M3 : 1; + unsigned DC3B0 : 1; + unsigned DC3B1 : 1; + unsigned P3M0 : 1; + unsigned P3M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP3Y : 1; + unsigned CCP3X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP3CONbits_t; +extern volatile __CCP3CONbits_t __at (0xFB1) CCP3CONbits; + +extern __sfr __at (0xFB1) ECCP3CON; +typedef union { + struct { + unsigned CCP3M0 : 1; + unsigned CCP3M1 : 1; + unsigned CCP3M2 : 1; + unsigned CCP3M3 : 1; + unsigned DC3B0 : 1; + unsigned DC3B1 : 1; + unsigned P3M0 : 1; + unsigned P3M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP3Y : 1; + unsigned CCP3X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP3CONbits_t; +extern volatile __ECCP3CONbits_t __at (0xFB1) ECCP3CONbits; + +extern __sfr __at (0xFB2) CCPR3; + +extern __sfr __at (0xFB2) CCPR3L; + +extern __sfr __at (0xFB3) CCPR3H; + +extern __sfr __at (0xFB4) ECCP3DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; + struct { + unsigned P3DC0 : 1; + unsigned P3DC1 : 1; + unsigned P3DC2 : 1; + unsigned P3DC3 : 1; + unsigned P3DC4 : 1; + unsigned P3DC5 : 1; + unsigned P3DC6 : 1; + unsigned P3RSEN : 1; + }; +} __ECCP3DELbits_t; +extern volatile __ECCP3DELbits_t __at (0xFB4) ECCP3DELbits; + +extern __sfr __at (0xFB5) ECCP3AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; + struct { + unsigned PSS3BD0 : 1; + unsigned PSS3BD1 : 1; + unsigned PSS3AC0 : 1; + unsigned PSS3AC1 : 1; + unsigned ECCP3AS0 : 1; + unsigned ECCP3AS1 : 1; + unsigned ECCP3AS2 : 1; + unsigned ECCP3ASE : 1; + }; +} __ECCP3ASbits_t; +extern volatile __ECCP3ASbits_t __at (0xFB5) ECCP3ASbits; + +extern __sfr __at (0xFB6) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned P2M0 : 1; + unsigned P2M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFB6) CCP2CONbits; + +extern __sfr __at (0xFB6) ECCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned P2M0 : 1; + unsigned P2M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP2CONbits_t; +extern volatile __ECCP2CONbits_t __at (0xFB6) ECCP2CONbits; + +extern __sfr __at (0xFB7) CCPR2; + +extern __sfr __at (0xFB7) CCPR2L; + +extern __sfr __at (0xFB8) CCPR2H; + +extern __sfr __at (0xFB9) ECCP2DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; + struct { + unsigned P2DC0 : 1; + unsigned P2DC1 : 1; + unsigned P2DC2 : 1; + unsigned P2DC3 : 1; + unsigned P2DC4 : 1; + unsigned P2DC5 : 1; + unsigned P2DC6 : 1; + unsigned P2RSEN : 1; + }; +} __ECCP2DELbits_t; +extern volatile __ECCP2DELbits_t __at (0xFB9) ECCP2DELbits; + +extern __sfr __at (0xFBA) ECCP2AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; + struct { + unsigned PSS2BD0 : 1; + unsigned PSS2BD1 : 1; + unsigned PSS2AC0 : 1; + unsigned PSS2AC1 : 1; + unsigned ECCP2AS0 : 1; + unsigned ECCP2AS1 : 1; + unsigned ECCP2AS2 : 1; + unsigned ECCP2ASE : 1; + }; +} __ECCP2ASbits_t; +extern volatile __ECCP2ASbits_t __at (0xFBA) ECCP2ASbits; + +extern __sfr __at (0xFBB) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBB) CCP1CONbits; + +extern __sfr __at (0xFBB) ECCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP1CONbits_t; +extern volatile __ECCP1CONbits_t __at (0xFBB) ECCP1CONbits; + +extern __sfr __at (0xFBC) CCPR1; + +extern __sfr __at (0xFBC) CCPR1L; + +extern __sfr __at (0xFBD) CCPR1H; + +extern __sfr __at (0xFBE) ECCP1DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; + struct { + unsigned P1DC0 : 1; + unsigned P1DC1 : 1; + unsigned P1DC2 : 1; + unsigned P1DC3 : 1; + unsigned P1DC4 : 1; + unsigned P1DC5 : 1; + unsigned P1DC6 : 1; + unsigned P1RSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xFBE) ECCP1DELbits; + +extern __sfr __at (0xFBF) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; + struct { + unsigned PSS1BD0 : 1; + unsigned PSS1BD1 : 1; + unsigned PSS1AC0 : 1; + unsigned PSS1AC1 : 1; + unsigned ECCP1AS0 : 1; + unsigned ECCP1AS1 : 1; + unsigned ECCP1AS2 : 1; + unsigned ECCP1ASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFBF) ECCP1ASbits; + +extern __sfr __at (0xFC0) WDTCON; +typedef union { + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DEVCFG : 1; + unsigned : 1; + unsigned LVDSTAT : 1; + unsigned REGSLP : 1; + }; + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ADSHR : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFC0) WDTCONbits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned ADCAL : 1; + unsigned ADFM : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC1) ANCON0; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned PCFG4 : 1; + unsigned PCFG5 : 1; + unsigned PCFG6 : 1; + unsigned PCFG7 : 1; + }; +} __ANCON0bits_t; +extern volatile __ANCON0bits_t __at (0xFC1) ANCON0bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC2) ANCON1; +typedef union { + struct { + unsigned PCFG8 : 1; + unsigned PCFG9 : 1; + unsigned PCFG10 : 1; + unsigned PCFG11 : 1; + unsigned PCFG12 : 1; + unsigned PCFG13 : 1; + unsigned PCFG14 : 1; + unsigned PCFG15 : 1; + }; +} __ANCON1bits_t; +extern volatile __ANCON1bits_t __at (0xFC2) ANCON1bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSP1CON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP1CON2bits_t; +extern volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSP1CON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSP1CON1bits_t; +extern volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSP1STAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP1STATbits_t; +extern volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSP1ADD; + +extern __sfr __at (0xFC8) SSP1MSK; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSP1BUF; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) MEMCON; +typedef union { + struct { + unsigned WM0 : 1; + unsigned WM1 : 1; + unsigned : 1; + unsigned : 1; + unsigned WAIT0 : 1; + unsigned WAIT1 : 1; + unsigned : 1; + unsigned EDBIS : 1; + }; +} __MEMCONbits_t; +extern volatile __MEMCONbits_t __at (0xFCB) MEMCONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) PADCFG1; +typedef union { + struct { + unsigned PMPTTL : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PADCFG1bits_t; +extern volatile __PADCFG1bits_t __at (0xFCC) PADCFG1bits; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) ODCON3; +typedef union { + struct { + unsigned SPI1OD : 1; + unsigned SPI2OD : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ODCON3bits_t; +extern volatile __ODCON3bits_t __at (0xFCD) ODCON3bits; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) ODCON2; +typedef union { + struct { + unsigned USART1OD : 1; + unsigned USART2OD : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned U1OD : 1; + unsigned U2OD : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ODCON2bits_t; +extern volatile __ODCON2bits_t __at (0xFCE) ODCON2bits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) ODCON1; +typedef union { + struct { + unsigned ECCP1OD : 1; + unsigned ECCP2OD : 1; + unsigned ECCP3OD : 1; + unsigned CCP4OD : 1; + unsigned CCP5OD : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ODCON1bits_t; +extern volatile __ODCON1bits_t __at (0xFCF) ODCON1bits; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned NOT_CM : 1; + unsigned : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned CM : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) CM2CON; +typedef union { + struct { + unsigned C1CH0 : 1; + unsigned C1CH1 : 1; + unsigned CREF : 1; + unsigned EVPOL0 : 1; + unsigned EVPOL1 : 1; + unsigned CPOL : 1; + unsigned COE : 1; + unsigned CON : 1; + }; + struct { + unsigned CCH0 : 1; + unsigned CCH1 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CM2CONbits_t; +extern volatile __CM2CONbits_t __at (0xFD1) CM2CONbits; + +extern __sfr __at (0xFD1) CM2CON1; +typedef union { + struct { + unsigned C1CH0 : 1; + unsigned C1CH1 : 1; + unsigned CREF : 1; + unsigned EVPOL0 : 1; + unsigned EVPOL1 : 1; + unsigned CPOL : 1; + unsigned COE : 1; + unsigned CON : 1; + }; + struct { + unsigned CCH0 : 1; + unsigned CCH1 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CM2CON1bits_t; +extern volatile __CM2CON1bits_t __at (0xFD1) CM2CON1bits; + +extern __sfr __at (0xFD2) CM1CON; +typedef union { + struct { + unsigned C1CH0 : 1; + unsigned C1CH1 : 1; + unsigned CREF : 1; + unsigned EVPOL0 : 1; + unsigned EVPOL1 : 1; + unsigned CPOL : 1; + unsigned COE : 1; + unsigned CON : 1; + }; + struct { + unsigned CCH0 : 1; + unsigned CCH1 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CM1CONbits_t; +extern volatile __CM1CONbits_t __at (0xFD2) CM1CONbits; + +extern __sfr __at (0xFD2) CM1CON1; +typedef union { + struct { + unsigned C1CH0 : 1; + unsigned C1CH1 : 1; + unsigned CREF : 1; + unsigned EVPOL0 : 1; + unsigned EVPOL1 : 1; + unsigned CPOL : 1; + unsigned COE : 1; + unsigned CON : 1; + }; + struct { + unsigned CCH0 : 1; + unsigned CCH1 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __CM1CON1bits_t; +extern volatile __CM1CON1bits_t __at (0xFD2) CM1CON1bits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned IOFS : 1; + unsigned OSTS : 1; + unsigned IRCF0 : 1; + unsigned IRCF1 : 1; + unsigned IRCF2 : 1; + unsigned IDLEN : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned FLTS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD3) REFOCON; +typedef union { + struct { + unsigned RODIV0 : 1; + unsigned RODIV1 : 1; + unsigned RODIV2 : 1; + unsigned RODIV3 : 1; + unsigned ROSEL : 1; + unsigned ROSSLP : 1; + unsigned : 1; + unsigned ROON : 1; + }; +} __REFOCONbits_t; +extern volatile __REFOCONbits_t __at (0xFD3) REFOCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned T0PS3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned INT3F : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned INT3E : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned INT3IF : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned INT3IE : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned INT3P : 1; + unsigned T0IP : 1; + unsigned INTEDG3 : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned INT3IP : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned RBIE : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned SP0 : 1; + unsigned SP1 : 1; + unsigned SP2 : 1; + unsigned SP3 : 1; + unsigned SP4 : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f87j60.h b/device/include/pic16/pic18f87j60.h new file mode 100644 index 0000000..78184eb --- /dev/null +++ b/device/include/pic16/pic18f87j60.h @@ -0,0 +1,6 @@ +/* + * pic18f87j60.h - PIC18F87J60 Device Library Header + */ + +#include "pic18f86j60.h" + diff --git a/device/include/pic16/pic18f96j60.h b/device/include/pic16/pic18f96j60.h new file mode 100644 index 0000000..f942dda --- /dev/null +++ b/device/include/pic16/pic18f96j60.h @@ -0,0 +1,3203 @@ +/* + * pic18f96j60.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F96J60_H__ +#define __PIC18F96J60_H__ 1 + +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF + +extern __sfr __at (0xE80) MAADR5; + +extern __sfr __at (0xE81) MAADR6; + +extern __sfr __at (0xE82) MAADR3; + +extern __sfr __at (0xE83) MAADR4; + +extern __sfr __at (0xE84) MAADR1; + +extern __sfr __at (0xE85) MAADR2; + +extern __sfr __at (0xE86) EBSTSD; + +extern __sfr __at (0xE87) EBSTCON; +typedef union { + struct { + unsigned BISTST : 1; + unsigned TME : 1; + unsigned TMSEL0 : 1; + unsigned TMSEL1 : 1; + unsigned : 1; + unsigned PSV0 : 1; + unsigned PSV1 : 1; + unsigned PSV2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned TMSEL : 1; + unsigned : 1; + unsigned : 1; + unsigned PSV : 1; + unsigned : 1; + unsigned : 1; + }; +} __EBSTCONbits_t; +extern volatile __EBSTCONbits_t __at (0xE87) EBSTCONbits; + +extern __sfr __at (0xE88) EBSTCS; + +extern __sfr __at (0xE88) EBSTCSL; + +extern __sfr __at (0xE89) EBSTCSH; + +extern __sfr __at (0xE8A) MISTAT; +typedef union { + struct { + unsigned BUSY : 1; + unsigned SCAN : 1; + unsigned NVALID : 1; + unsigned LINKFL : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __MISTATbits_t; +extern volatile __MISTATbits_t __at (0xE8A) MISTATbits; + +extern __sfr __at (0xE97) EFLOCON; +typedef union { + struct { + unsigned FCEN0 : 1; + unsigned FCEN1 : 1; + unsigned FULDPXS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __EFLOCONbits_t; +extern volatile __EFLOCONbits_t __at (0xE97) EFLOCONbits; + +extern __sfr __at (0xE98) EPAUS; + +extern __sfr __at (0xE98) EPAUSL; + +extern __sfr __at (0xE99) EPAUSH; + +extern __sfr __at (0xEA0) MACON1; +typedef union { + struct { + unsigned MARXEN : 1; + unsigned PASSALL : 1; + unsigned RXPAUS : 1; + unsigned TXPAUS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __MACON1bits_t; +extern volatile __MACON1bits_t __at (0xEA0) MACON1bits; + +extern __sfr __at (0xEA1) MACON2; +typedef union { + struct { + unsigned TFUNRST : 1; + unsigned MATXRST : 1; + unsigned RFUNRST : 1; + unsigned MARXRST : 1; + unsigned : 1; + unsigned : 1; + unsigned RNDRST : 1; + unsigned MARST : 1; + }; +} __MACON2bits_t; +extern volatile __MACON2bits_t __at (0xEA1) MACON2bits; + +extern __sfr __at (0xEA2) MACON3; +typedef union { + struct { + unsigned FULDPX : 1; + unsigned FRMLNEN : 1; + unsigned HFRMEN : 1; + unsigned PHDRLEN : 1; + unsigned TXCRCEN : 1; + unsigned PADCFG0 : 1; + unsigned PADCFG1 : 1; + unsigned PADCFG2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PADCFG : 1; + unsigned : 1; + unsigned : 1; + }; +} __MACON3bits_t; +extern volatile __MACON3bits_t __at (0xEA2) MACON3bits; + +extern __sfr __at (0xEA3) MACON4; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOBKOFF : 1; + unsigned BPEN : 1; + unsigned DEFER : 1; + unsigned : 1; + }; +} __MACON4bits_t; +extern volatile __MACON4bits_t __at (0xEA3) MACON4bits; + +extern __sfr __at (0xEA4) MABBIPG; + +extern __sfr __at (0xEA6) MAIPG; + +extern __sfr __at (0xEA6) MAIPGL; + +extern __sfr __at (0xEA7) MAIPGH; + +extern __sfr __at (0xEA8) MACLCON1; +typedef union { + struct { + unsigned RETMAX : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __MACLCON1bits_t; +extern volatile __MACLCON1bits_t __at (0xEA8) MACLCON1bits; + +extern __sfr __at (0xEA9) MACLCON2; +typedef union { + struct { + unsigned COLWIN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __MACLCON2bits_t; +extern volatile __MACLCON2bits_t __at (0xEA9) MACLCON2bits; + +extern __sfr __at (0xEAA) MAMXFL; + +extern __sfr __at (0xEAA) MAMXFLL; + +extern __sfr __at (0xEAB) MAMXFLH; + +extern __sfr __at (0xEB1) MICON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RSTMII : 1; + }; +} __MICONbits_t; +extern volatile __MICONbits_t __at (0xEB1) MICONbits; + +extern __sfr __at (0xEB2) MICMD; +typedef union { + struct { + unsigned MIIRD : 1; + unsigned MIISCAN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __MICMDbits_t; +extern volatile __MICMDbits_t __at (0xEB2) MICMDbits; + +extern __sfr __at (0xEB4) MIREGADR; + +extern __sfr __at (0xEB6) MIWR; + +extern __sfr __at (0xEB6) MIWRL; + +extern __sfr __at (0xEB7) MIWRH; + +extern __sfr __at (0xEB8) MIRD; + +extern __sfr __at (0xEB8) MIRDL; + +extern __sfr __at (0xEB9) MIRDH; + +extern __sfr __at (0xEC0) EHT0; + +extern __sfr __at (0xEC1) EHT1; + +extern __sfr __at (0xEC2) EHT2; + +extern __sfr __at (0xEC3) EHT3; + +extern __sfr __at (0xEC4) EHT4; + +extern __sfr __at (0xEC5) EHT5; + +extern __sfr __at (0xEC6) EHT6; + +extern __sfr __at (0xEC7) EHT7; + +extern __sfr __at (0xEC8) EPMM0; + +extern __sfr __at (0xEC9) EPMM1; + +extern __sfr __at (0xECA) EPMM2; + +extern __sfr __at (0xECB) EPMM3; + +extern __sfr __at (0xECC) EPMM4; + +extern __sfr __at (0xECD) EPMM5; + +extern __sfr __at (0xECE) EPMM6; + +extern __sfr __at (0xECF) EPMM7; + +extern __sfr __at (0xED0) EPMCS; + +extern __sfr __at (0xED0) EPMCSL; + +extern __sfr __at (0xED1) EPMCSH; + +extern __sfr __at (0xED4) EPMO; + +extern __sfr __at (0xED4) EPMOL; + +extern __sfr __at (0xED5) EPMOH; + +extern __sfr __at (0xED6) EWOLIE; +typedef union { + struct { + unsigned BCWOLIE : 1; + unsigned MCWOLIE : 1; + unsigned HTWOLIE : 1; + unsigned MPWOLIE : 1; + unsigned PMWOLIE : 1; + unsigned : 1; + unsigned AWOLIE : 1; + unsigned UCWOLIE : 1; + }; +} __EWOLIEbits_t; +extern volatile __EWOLIEbits_t __at (0xED6) EWOLIEbits; + +extern __sfr __at (0xED7) EWOLIR; +typedef union { + struct { + unsigned BCWOLIF : 1; + unsigned MCWOLIF : 1; + unsigned HTWOLIF : 1; + unsigned MPWOLIF : 1; + unsigned PMWOLIF : 1; + unsigned : 1; + unsigned AWOLIF : 1; + unsigned UCWOLIF : 1; + }; +} __EWOLIRbits_t; +extern volatile __EWOLIRbits_t __at (0xED7) EWOLIRbits; + +extern __sfr __at (0xED8) ERXFCON; +typedef union { + struct { + unsigned BCEN : 1; + unsigned MCEN : 1; + unsigned HTEN : 1; + unsigned MPEN : 1; + unsigned PMEN : 1; + unsigned CRCEN : 1; + unsigned ANDOR : 1; + unsigned UCEN : 1; + }; +} __ERXFCONbits_t; +extern volatile __ERXFCONbits_t __at (0xED8) ERXFCONbits; + +extern __sfr __at (0xED9) EPKTCNT; + +extern __sfr __at (0xEE2) EWRPT; + +extern __sfr __at (0xEE2) EWRPTL; + +extern __sfr __at (0xEE3) EWRPTH; + +extern __sfr __at (0xEE4) ETXST; + +extern __sfr __at (0xEE4) ETXSTL; + +extern __sfr __at (0xEE5) ETXSTH; + +extern __sfr __at (0xEE6) ETXND; + +extern __sfr __at (0xEE6) ETXNDL; + +extern __sfr __at (0xEE7) ETXNDH; + +extern __sfr __at (0xEE8) ERXST; + +extern __sfr __at (0xEE8) ERXSTL; + +extern __sfr __at (0xEE9) ERXSTH; + +extern __sfr __at (0xEEA) ERXND; + +extern __sfr __at (0xEEA) ERXNDL; + +extern __sfr __at (0xEEB) ERXNDH; + +extern __sfr __at (0xEEC) ERXRDPT; + +extern __sfr __at (0xEEC) ERXRDPTL; + +extern __sfr __at (0xEED) ERXRDPTH; + +extern __sfr __at (0xEEE) ERXWRPT; + +extern __sfr __at (0xEEE) ERXWRPTL; + +extern __sfr __at (0xEEF) ERXWRPTH; + +extern __sfr __at (0xEF0) EDMAST; + +extern __sfr __at (0xEF0) EDMASTL; + +extern __sfr __at (0xEF1) EDMASTH; + +extern __sfr __at (0xEF2) EDMAND; + +extern __sfr __at (0xEF2) EDMANDL; + +extern __sfr __at (0xEF3) EDMANDH; + +extern __sfr __at (0xEF4) EDMADST; + +extern __sfr __at (0xEF4) EDMADSTL; + +extern __sfr __at (0xEF5) EDMADSTH; + +extern __sfr __at (0xEF6) EDMACS; + +extern __sfr __at (0xEF6) EDMACSL; + +extern __sfr __at (0xEF7) EDMACSH; + +extern __sfr __at (0xEFB) EIE; +typedef union { + struct { + unsigned RXERIE : 1; + unsigned TXERIE : 1; + unsigned : 1; + unsigned TXIE_EIE : 1; + unsigned LINKIE : 1; + unsigned DMAIE : 1; + unsigned PKTIE : 1; + unsigned : 1; + }; +} __EIEbits_t; +extern volatile __EIEbits_t __at (0xEFB) EIEbits; + +extern __sfr __at (0xEFD) ESTAT; +typedef union { + struct { + unsigned PHYRDY : 1; + unsigned TXABRT : 1; + unsigned RXBUSY : 1; + unsigned : 1; + unsigned LATECOL : 1; + unsigned : 1; + unsigned BUFER : 1; + unsigned : 1; + }; +} __ESTATbits_t; +extern volatile __ESTATbits_t __at (0xEFD) ESTATbits; + +extern __sfr __at (0xEFE) ECON2; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned ETHEN : 1; + unsigned PKTDEC : 1; + unsigned AUTOINC : 1; + }; +} __ECON2bits_t; +extern volatile __ECON2bits_t __at (0xEFE) ECON2bits; + +extern __sfr __at (0xF60) EIR; +typedef union { + struct { + unsigned RXERIF : 1; + unsigned TXERIF : 1; + unsigned : 1; + unsigned TXIF_EIR : 1; + unsigned LINKIF : 1; + unsigned DMAIF : 1; + unsigned PKTIF : 1; + unsigned : 1; + }; +} __EIRbits_t; +extern volatile __EIRbits_t __at (0xF60) EIRbits; + +extern __sfr __at (0xF61) EDATA; +typedef union { + struct { + unsigned EDATA0 : 1; + unsigned EDATA1 : 1; + unsigned EDATA2 : 1; + unsigned EDATA3 : 1; + unsigned EDATA4 : 1; + unsigned EDATA5 : 1; + unsigned EDATA6 : 1; + unsigned EDATA7 : 1; + }; +} __EDATAbits_t; +extern volatile __EDATAbits_t __at (0xF61) EDATAbits; + +extern __sfr __at (0xF62) SSP2CON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP2CON2bits_t; +extern volatile __SSP2CON2bits_t __at (0xF62) SSP2CON2bits; + +extern __sfr __at (0xF63) SSP2CON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSP2CON1bits_t; +extern volatile __SSP2CON1bits_t __at (0xF63) SSP2CON1bits; + +extern __sfr __at (0xF64) SSP2STAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP2STATbits_t; +extern volatile __SSP2STATbits_t __at (0xF64) SSP2STATbits; + +extern __sfr __at (0xF65) SSP2ADD; + +extern __sfr __at (0xF66) SSP2BUF; + +extern __sfr __at (0xF67) ECCP2DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; + struct { + unsigned P2DC0 : 1; + unsigned P2DC1 : 1; + unsigned P2DC2 : 1; + unsigned P2DC3 : 1; + unsigned P2DC4 : 1; + unsigned P2DC5 : 1; + unsigned P2DC6 : 1; + unsigned P2RSEN : 1; + }; +} __ECCP2DELbits_t; +extern volatile __ECCP2DELbits_t __at (0xF67) ECCP2DELbits; + +extern __sfr __at (0xF68) ECCP2AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; + struct { + unsigned PSS2BD0 : 1; + unsigned PSS2BD1 : 1; + unsigned PSS2AC0 : 1; + unsigned PSS2AC1 : 1; + unsigned ECCP2AS0 : 1; + unsigned ECCP2AS1 : 1; + unsigned ECCP2AS2 : 1; + unsigned ECCP2ASE : 1; + }; +} __ECCP2ASbits_t; +extern volatile __ECCP2ASbits_t __at (0xF68) ECCP2ASbits; + +extern __sfr __at (0xF69) ECCP3DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; + struct { + unsigned P3DC0 : 1; + unsigned P3DC1 : 1; + unsigned P3DC2 : 1; + unsigned P3DC3 : 1; + unsigned P3DC4 : 1; + unsigned P3DC5 : 1; + unsigned P3DC6 : 1; + unsigned P3RSEN : 1; + }; +} __ECCP3DELbits_t; +extern volatile __ECCP3DELbits_t __at (0xF69) ECCP3DELbits; + +extern __sfr __at (0xF6A) ECCP3AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; + struct { + unsigned PSS3BD0 : 1; + unsigned PSS3BD1 : 1; + unsigned PSS3AC0 : 1; + unsigned PSS3AC1 : 1; + unsigned ECCP3AS0 : 1; + unsigned ECCP3AS1 : 1; + unsigned ECCP3AS2 : 1; + unsigned ECCP3ASE : 1; + }; +} __ECCP3ASbits_t; +extern volatile __ECCP3ASbits_t __at (0xF6A) ECCP3ASbits; + +extern __sfr __at (0xF6B) RCSTA2; +typedef union { + struct { + unsigned RCD8 : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RC9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RX9D : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RX9 : 1; + unsigned : 1; + }; +} __RCSTA2bits_t; +extern volatile __RCSTA2bits_t __at (0xF6B) RCSTA2bits; + +extern __sfr __at (0xF6C) TXSTA2; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTA2bits_t; +extern volatile __TXSTA2bits_t __at (0xF6C) TXSTA2bits; + +extern __sfr __at (0xF6D) TXREG2; + +extern __sfr __at (0xF6E) RCREG2; + +extern __sfr __at (0xF6F) SPBRG2; + +extern __sfr __at (0xF70) CCP5CON; +typedef union { + struct { + unsigned CCP5M0 : 1; + unsigned CCP5M1 : 1; + unsigned CCP5M2 : 1; + unsigned CCP5M3 : 1; + unsigned CCP5Y : 1; + unsigned CCP5X : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DC5B0 : 1; + unsigned DC5B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP5CONbits_t; +extern volatile __CCP5CONbits_t __at (0xF70) CCP5CONbits; + +extern __sfr __at (0xF71) CCPR5; + +extern __sfr __at (0xF71) CCPR5L; + +extern __sfr __at (0xF72) CCPR5H; + +extern __sfr __at (0xF73) CCP4CON; +typedef union { + struct { + unsigned CCP4M0 : 1; + unsigned CCP4M1 : 1; + unsigned CCP4M2 : 1; + unsigned CCP4M3 : 1; + unsigned CCP4Y : 1; + unsigned CCP4X : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned DC4B0 : 1; + unsigned DC4B1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP4CONbits_t; +extern volatile __CCP4CONbits_t __at (0xF73) CCP4CONbits; + +extern __sfr __at (0xF74) CCPR4; + +extern __sfr __at (0xF74) CCPR4L; + +extern __sfr __at (0xF75) CCPR4H; + +extern __sfr __at (0xF76) T4CON; +typedef union { + struct { + unsigned T4CKPS0 : 1; + unsigned T4CKPS1 : 1; + unsigned TMR4ON : 1; + unsigned T4OUTPS0 : 1; + unsigned T4OUTPS1 : 1; + unsigned T4OUTPS2 : 1; + unsigned T4OUTPS3 : 1; + unsigned : 1; + }; +} __T4CONbits_t; +extern volatile __T4CONbits_t __at (0xF76) T4CONbits; + +extern __sfr __at (0xF77) PR4; + +extern __sfr __at (0xF78) TMR4; + +extern __sfr __at (0xF79) ECCP1DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; + struct { + unsigned P1DC0 : 1; + unsigned P1DC1 : 1; + unsigned P1DC2 : 1; + unsigned P1DC3 : 1; + unsigned P1DC4 : 1; + unsigned P1DC5 : 1; + unsigned P1DC6 : 1; + unsigned P1RSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xF79) ECCP1DELbits; + +extern __sfr __at (0xF7A) ERDPT; + +extern __sfr __at (0xF7A) ERDPTL; + +extern __sfr __at (0xF7B) ERDPTH; + +extern __sfr __at (0xF7C) BAUDCON2; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCON2bits_t; +extern volatile __BAUDCON2bits_t __at (0xF7C) BAUDCON2bits; + +extern __sfr __at (0xF7C) BAUDCTL2; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCTL2bits_t; +extern volatile __BAUDCTL2bits_t __at (0xF7C) BAUDCTL2bits; + +extern __sfr __at (0xF7D) SPBRGH2; + +extern __sfr __at (0xF7E) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xF7E) BAUDCONbits; + +extern __sfr __at (0xF7E) BAUDCON1; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCON1bits_t; +extern volatile __BAUDCON1bits_t __at (0xF7E) BAUDCON1bits; + +extern __sfr __at (0xF7E) BAUDCTL; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCTLbits_t; +extern volatile __BAUDCTLbits_t __at (0xF7E) BAUDCTLbits; + +extern __sfr __at (0xF7E) BAUDCTL1; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned RXDTP : 1; + unsigned RCMT : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TXCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned : 1; + }; +} __BAUDCTL1bits_t; +extern volatile __BAUDCTL1bits_t __at (0xF7E) BAUDCTL1bits; + +extern __sfr __at (0xF7F) SPBRGH; + +extern __sfr __at (0xF7F) SPBRGH1; + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned : 1; + unsigned RJPU : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned T0CKI : 1; + unsigned AN4 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned LEDA : 1; + unsigned LEDB : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned INT3 : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned SDO : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T13CKI : 1; + unsigned CCP2 : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned SDO1 : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SCK1 : 1; + unsigned SDI1 : 1; + unsigned : 1; + unsigned TX1 : 1; + unsigned RX1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SCL1 : 1; + unsigned SDA1 : 1; + unsigned : 1; + unsigned CK1 : 1; + unsigned DT1 : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned PSP0 : 1; + unsigned PSP1 : 1; + unsigned PSP2 : 1; + unsigned PSP3 : 1; + unsigned PSP4 : 1; + unsigned PSP5 : 1; + unsigned PSP6 : 1; + unsigned PSP7 : 1; + }; + struct { + unsigned AD0 : 1; + unsigned AD1 : 1; + unsigned AD2 : 1; + unsigned AD3 : 1; + unsigned AD4 : 1; + unsigned AD5 : 1; + unsigned AD6 : 1; + unsigned AD7 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SDO2 : 1; + unsigned SDA2 : 1; + unsigned SCL2 : 1; + unsigned SS2 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SDI2 : 1; + unsigned SCK2 : 1; + unsigned NOT_SS2 : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned RE4 : 1; + unsigned RE5 : 1; + unsigned RE6 : 1; + unsigned RE7 : 1; + }; + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned CS : 1; + unsigned AD11 : 1; + unsigned AD12 : 1; + unsigned AD13 : 1; + unsigned AD14 : 1; + unsigned AD15 : 1; + }; + struct { + unsigned NOT_RD : 1; + unsigned NOT_WR : 1; + unsigned NOT_CS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AD8 : 1; + unsigned AD9 : 1; + unsigned AD10 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF85) PORTF; +typedef union { + struct { + unsigned RF0 : 1; + unsigned RF1 : 1; + unsigned RF2 : 1; + unsigned RF3 : 1; + unsigned RF4 : 1; + unsigned RF5 : 1; + unsigned RF6 : 1; + unsigned RF7 : 1; + }; + struct { + unsigned AN5 : 1; + unsigned AN6 : 1; + unsigned AN7 : 1; + unsigned AN8 : 1; + unsigned AN9 : 1; + unsigned AN10 : 1; + unsigned AN11 : 1; + unsigned SS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CVREF : 1; + unsigned : 1; + unsigned NOT_SS : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SS1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS1 : 1; + }; +} __PORTFbits_t; +extern volatile __PORTFbits_t __at (0xF85) PORTFbits; + +extern __sfr __at (0xF86) PORTG; +typedef union { + struct { + unsigned RG0 : 1; + unsigned RG1 : 1; + unsigned RG2 : 1; + unsigned RG3 : 1; + unsigned RG4 : 1; + unsigned RG5 : 1; + unsigned RG6 : 1; + unsigned RG7 : 1; + }; + struct { + unsigned CCP3 : 1; + unsigned TX2 : 1; + unsigned RX2 : 1; + unsigned CCP4 : 1; + unsigned CCP5 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned CK2 : 1; + unsigned DT2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTGbits_t; +extern volatile __PORTGbits_t __at (0xF86) PORTGbits; + +extern __sfr __at (0xF87) PORTH; +typedef union { + struct { + unsigned RH0 : 1; + unsigned RH1 : 1; + unsigned RH2 : 1; + unsigned RH3 : 1; + unsigned RH4 : 1; + unsigned RH5 : 1; + unsigned RH6 : 1; + unsigned RH7 : 1; + }; + struct { + unsigned AD16 : 1; + unsigned AD17 : 1; + unsigned AD18 : 1; + unsigned AD19 : 1; + unsigned AN12 : 1; + unsigned AN13 : 1; + unsigned AN14 : 1; + unsigned AN15 : 1; + }; +} __PORTHbits_t; +extern volatile __PORTHbits_t __at (0xF87) PORTHbits; + +extern __sfr __at (0xF88) PORTJ; +typedef union { + struct { + unsigned RJ0 : 1; + unsigned RJ1 : 1; + unsigned RJ2 : 1; + unsigned RJ3 : 1; + unsigned RJ4 : 1; + unsigned RJ5 : 1; + unsigned RJ6 : 1; + unsigned RJ7 : 1; + }; + struct { + unsigned ALE : 1; + unsigned OE : 1; + unsigned WRL : 1; + unsigned WRH : 1; + unsigned BA0 : 1; + unsigned CE : 1; + unsigned LB : 1; + unsigned UB : 1; + }; + struct { + unsigned : 1; + unsigned NOT_OE : 1; + unsigned NOT_WRL : 1; + unsigned NOT_WRH : 1; + unsigned : 1; + unsigned NOT_CE : 1; + unsigned NOT_LB : 1; + unsigned NOT_UB : 1; + }; +} __PORTJbits_t; +extern volatile __PORTJbits_t __at (0xF88) PORTJbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned LATA4 : 1; + unsigned LATA5 : 1; + unsigned REPU : 1; + unsigned RDPU : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned LATE3 : 1; + unsigned LATE4 : 1; + unsigned LATE5 : 1; + unsigned LATE6 : 1; + unsigned LATE7 : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF8E) LATF; +typedef union { + struct { + unsigned LATF0 : 1; + unsigned LATF1 : 1; + unsigned LATF2 : 1; + unsigned LATF3 : 1; + unsigned LATF4 : 1; + unsigned LATF5 : 1; + unsigned LATF6 : 1; + unsigned LATF7 : 1; + }; +} __LATFbits_t; +extern volatile __LATFbits_t __at (0xF8E) LATFbits; + +extern __sfr __at (0xF8F) LATG; +typedef union { + struct { + unsigned LATG0 : 1; + unsigned LATG1 : 1; + unsigned LATG2 : 1; + unsigned LATG3 : 1; + unsigned LATG4 : 1; + unsigned LATG5 : 1; + unsigned LATG6 : 1; + unsigned LATG7 : 1; + }; +} __LATGbits_t; +extern volatile __LATGbits_t __at (0xF8F) LATGbits; + +extern __sfr __at (0xF90) LATH; +typedef union { + struct { + unsigned LATH0 : 1; + unsigned LATH1 : 1; + unsigned LATH2 : 1; + unsigned LATH3 : 1; + unsigned LATH4 : 1; + unsigned LATH5 : 1; + unsigned LATH6 : 1; + unsigned LATH7 : 1; + }; +} __LATHbits_t; +extern volatile __LATHbits_t __at (0xF90) LATHbits; + +extern __sfr __at (0xF91) LATJ; +typedef union { + struct { + unsigned LATJ0 : 1; + unsigned LATJ1 : 1; + unsigned LATJ2 : 1; + unsigned LATJ3 : 1; + unsigned LATJ4 : 1; + unsigned LATJ5 : 1; + unsigned LATJ6 : 1; + unsigned LATJ7 : 1; + }; +} __LATJbits_t; +extern volatile __LATJbits_t __at (0xF91) LATJbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned RA4 : 1; + unsigned RA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned TRISA4 : 1; + unsigned TRISA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned RE4 : 1; + unsigned RE5 : 1; + unsigned RE6 : 1; + unsigned RE7 : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned TRISE3 : 1; + unsigned TRISE4 : 1; + unsigned TRISE5 : 1; + unsigned TRISE6 : 1; + unsigned TRISE7 : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF97) DDRF; +typedef union { + struct { + unsigned RF0 : 1; + unsigned RF1 : 1; + unsigned RF2 : 1; + unsigned RF3 : 1; + unsigned RF4 : 1; + unsigned RF5 : 1; + unsigned RF6 : 1; + unsigned RF7 : 1; + }; +} __DDRFbits_t; +extern volatile __DDRFbits_t __at (0xF97) DDRFbits; + +extern __sfr __at (0xF97) TRISF; +typedef union { + struct { + unsigned TRISF0 : 1; + unsigned TRISF1 : 1; + unsigned TRISF2 : 1; + unsigned TRISF3 : 1; + unsigned TRISF4 : 1; + unsigned TRISF5 : 1; + unsigned TRISF6 : 1; + unsigned TRISF7 : 1; + }; +} __TRISFbits_t; +extern volatile __TRISFbits_t __at (0xF97) TRISFbits; + +extern __sfr __at (0xF98) DDRG; +typedef union { + struct { + unsigned RG0 : 1; + unsigned RG1 : 1; + unsigned RG2 : 1; + unsigned RG3 : 1; + unsigned RG4 : 1; + unsigned RG5 : 1; + unsigned RG6 : 1; + unsigned RG7 : 1; + }; +} __DDRGbits_t; +extern volatile __DDRGbits_t __at (0xF98) DDRGbits; + +extern __sfr __at (0xF98) TRISG; +typedef union { + struct { + unsigned TRISG0 : 1; + unsigned TRISG1 : 1; + unsigned TRISG2 : 1; + unsigned TRISG3 : 1; + unsigned TRISG4 : 1; + unsigned TRISG5 : 1; + unsigned TRISG6 : 1; + unsigned TRISG7 : 1; + }; +} __TRISGbits_t; +extern volatile __TRISGbits_t __at (0xF98) TRISGbits; + +extern __sfr __at (0xF99) DDRH; +typedef union { + struct { + unsigned RH0 : 1; + unsigned RH1 : 1; + unsigned RH2 : 1; + unsigned RH3 : 1; + unsigned RH4 : 1; + unsigned RH5 : 1; + unsigned RH6 : 1; + unsigned RH7 : 1; + }; +} __DDRHbits_t; +extern volatile __DDRHbits_t __at (0xF99) DDRHbits; + +extern __sfr __at (0xF99) TRISH; +typedef union { + struct { + unsigned TRISH0 : 1; + unsigned TRISH1 : 1; + unsigned TRISH2 : 1; + unsigned TRISH3 : 1; + unsigned TRISH4 : 1; + unsigned TRISH5 : 1; + unsigned TRISH6 : 1; + unsigned TRISH7 : 1; + }; +} __TRISHbits_t; +extern volatile __TRISHbits_t __at (0xF99) TRISHbits; + +extern __sfr __at (0xF9A) DDRJ; +typedef union { + struct { + unsigned RJ0 : 1; + unsigned RJ1 : 1; + unsigned RJ2 : 1; + unsigned RJ3 : 1; + unsigned RJ4 : 1; + unsigned RJ5 : 1; + unsigned RJ6 : 1; + unsigned RJ7 : 1; + }; +} __DDRJbits_t; +extern volatile __DDRJbits_t __at (0xF9A) DDRJbits; + +extern __sfr __at (0xF9A) TRISJ; +typedef union { + struct { + unsigned TRISJ0 : 1; + unsigned TRISJ1 : 1; + unsigned TRISJ2 : 1; + unsigned TRISJ3 : 1; + unsigned TRISJ4 : 1; + unsigned TRISJ5 : 1; + unsigned TRISJ6 : 1; + unsigned TRISJ7 : 1; + }; +} __TRISJbits_t; +extern volatile __TRISJbits_t __at (0xF9A) TRISJbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PPRE : 1; + unsigned PPST0 : 1; + unsigned PLLEN : 1; + unsigned PPST1 : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9C) MEMCON; +typedef union { + struct { + unsigned WM0 : 1; + unsigned WM1 : 1; + unsigned : 1; + unsigned : 1; + unsigned WAIT0 : 1; + unsigned WAIT1 : 1; + unsigned : 1; + unsigned EBDIS : 1; + }; +} __MEMCONbits_t; +extern volatile __MEMCONbits_t __at (0xF9C) MEMCONbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE_PIE1 : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PSPIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IE : 1; + unsigned TX1IE : 1; + unsigned RC1IE : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF_PIR1 : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PSPIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IF : 1; + unsigned TX1IF : 1; + unsigned RC1IF : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PSPIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IP : 1; + unsigned TX1IP : 1; + unsigned RC1IP : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned TMR3IE : 1; + unsigned : 1; + unsigned BCLIE : 1; + unsigned ETHWIE : 1; + unsigned ETHIE : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned TMR3IF : 1; + unsigned : 1; + unsigned BCLIF : 1; + unsigned ETHWIF : 1; + unsigned ETHIF : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned TMR3IP : 1; + unsigned : 1; + unsigned BCLIP : 1; + unsigned ETHWIP : 1; + unsigned ETHIP : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned CCP3IE : 1; + unsigned CCP4IE : 1; + unsigned CCP5IE : 1; + unsigned TMR4IE : 1; + unsigned TX2IE : 1; + unsigned RC2IE : 1; + unsigned BCL2IE : 1; + unsigned SSP2IE : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned CCP3IF : 1; + unsigned CCP4IF : 1; + unsigned CCP5IF : 1; + unsigned TMR4IF : 1; + unsigned TX2IF : 1; + unsigned RC2IF : 1; + unsigned BCL2IF : 1; + unsigned SSP2IF : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned CCP3IP : 1; + unsigned CCP4IP : 1; + unsigned CCP5IP : 1; + unsigned TMR4IP : 1; + unsigned TX2IP : 1; + unsigned RC2IP : 1; + unsigned BCL2IP : 1; + unsigned SSP2IP : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAB) RCSTA1; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTA1bits_t; +extern volatile __RCSTA1bits_t __at (0xFAB) RCSTA1bits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAC) TXSTA1; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTA1bits_t; +extern volatile __TXSTA1bits_t __at (0xFAC) TXSTA1bits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAD) TXREG1; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAE) RCREG1; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFAF) SPBRG1; + +extern __sfr __at (0xFB0) PSPCON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __PSPCONbits_t; +extern volatile __PSPCONbits_t __at (0xFB0) PSPCONbits; + +extern __sfr __at (0xFB1) T3CON; +typedef union { + struct { + unsigned TMR3ON : 1; + unsigned TMR3CS : 1; + unsigned T3SYNC : 1; + unsigned T3CCP1 : 1; + unsigned T3CKPS0 : 1; + unsigned T3CKPS1 : 1; + unsigned T3CCP2 : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T3INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T3SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T3CONbits_t; +extern volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +extern __sfr __at (0xFB2) TMR3L; + +extern __sfr __at (0xFB3) TMR3H; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT : 1; + unsigned C2OUT : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; + struct { + unsigned PSS1BD0 : 1; + unsigned PSS1BD1 : 1; + unsigned PSS1AC0 : 1; + unsigned PSS1AC1 : 1; + unsigned ECCP1AS0 : 1; + unsigned ECCP1AS1 : 1; + unsigned ECCP1AS2 : 1; + unsigned ECCP1ASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) CCP3CON; +typedef union { + struct { + unsigned CCP3M0 : 1; + unsigned CCP3M1 : 1; + unsigned CCP3M2 : 1; + unsigned CCP3M3 : 1; + unsigned DC3B0 : 1; + unsigned DC3B1 : 1; + unsigned P3M0 : 1; + unsigned P3M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP3Y : 1; + unsigned CCP3X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP3CONbits_t; +extern volatile __CCP3CONbits_t __at (0xFB7) CCP3CONbits; + +extern __sfr __at (0xFB7) ECCP3CON; +typedef union { + struct { + unsigned CCP3M0 : 1; + unsigned CCP3M1 : 1; + unsigned CCP3M2 : 1; + unsigned CCP3M3 : 1; + unsigned DC3B0 : 1; + unsigned DC3B1 : 1; + unsigned P3M0 : 1; + unsigned P3M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP3Y : 1; + unsigned CCP3X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP3CONbits_t; +extern volatile __ECCP3CONbits_t __at (0xFB7) ECCP3CONbits; + +extern __sfr __at (0xFB8) CCPR3; + +extern __sfr __at (0xFB8) CCPR3L; + +extern __sfr __at (0xFB9) CCPR3H; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned P2M0 : 1; + unsigned P2M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBA) ECCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned P2M0 : 1; + unsigned P2M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP2CONbits_t; +extern volatile __ECCP2CONbits_t __at (0xFBA) ECCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBD) ECCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP1CONbits_t; +extern volatile __ECCP1CONbits_t __at (0xFBD) ECCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned ADCAL : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSP1CON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP1CON2bits_t; +extern volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK1 : 1; + unsigned ADMSK2 : 1; + unsigned ADMSK3 : 1; + unsigned ADMSK4 : 1; + unsigned ADMSK5 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned ADMSK : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSP1CON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSP1CON1bits_t; +extern volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSP1STAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP1STATbits_t; +extern volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSP1ADD; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSP1BUF; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD2) ECON1; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned RXEN : 1; + unsigned TXRTS : 1; + unsigned CSUMEN : 1; + unsigned DMAST : 1; + unsigned RXRST : 1; + unsigned TXRST : 1; + }; +} __ECON1bits_t; +extern volatile __ECON1bits_t __at (0xFD2) ECON1bits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned : 1; + unsigned OSTS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned INT3F : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned INT3E : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned INT3IF : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned INT3IE : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned INT3IP : 1; + unsigned T0IP : 1; + unsigned INTEDG3 : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned RBIE : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f96j65.h b/device/include/pic16/pic18f96j65.h new file mode 100644 index 0000000..6e6755f --- /dev/null +++ b/device/include/pic16/pic18f96j65.h @@ -0,0 +1,6 @@ +/* + * pic18f96j65.h - PIC18F96J65 Device Library Header + */ + +#include "pic18f96j60.h" + diff --git a/device/include/pic16/pic18f97j60.h b/device/include/pic16/pic18f97j60.h new file mode 100644 index 0000000..c02e6a7 --- /dev/null +++ b/device/include/pic16/pic18f97j60.h @@ -0,0 +1,6 @@ +/* + * pic18f97j60.h - PIC18F97J60 Device Library Header + */ + +#include "pic18f96j60.h" + diff --git a/device/include/pic16/pic18fregs.h b/device/include/pic16/pic18fregs.h new file mode 100644 index 0000000..c57b747 --- /dev/null +++ b/device/include/pic16/pic18fregs.h @@ -0,0 +1,329 @@ + +/* + * pic18fregs.h - 18F Family Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18fregs.h 5391 2009-02-27 13:03:40Z tecodev $ + * + */ + +#ifndef __PIC18FREGS_H__ +#define __PIC18FREGS_H__ + +#if defined(pic18f242) +# include + +#elif defined(pic18f248) +# include + +#elif defined(pic18f252) +# include + +#elif defined(pic18f258) +# include + +#elif defined(pic18f442) +# include + +#elif defined(pic18f448) +# include + +#elif defined(pic18f452) +# include + +#elif defined(pic18f458) +# include + +#elif defined(pic18f1220) +# include + +#elif defined(pic18f1320) +# include + +#elif defined(pic18f2220) +# include + +#elif defined(pic18f2221) +# include + +#elif defined(pic18f2320) +# include + +#elif defined(pic18f2321) +# include + +#elif defined(pic18f2331) +# include + +#elif defined(pic18f23k20) +# include + +#elif defined(pic18f2410) +# include + +#elif defined(pic18f2420) +# include + +#elif defined(pic18f2423) +# include + +#elif defined(pic18f2431) +# include + +#elif defined(pic18f2450) +# include + +#elif defined(pic18f2455) +# include + +#elif defined(pic18f2480) +# include + +#elif defined(pic18f24j10) +# include + +#elif defined(pic18f24k20) +# include + +#elif defined(pic18f2510) +# include + +#elif defined(pic18f2515) +# include + +#elif defined(pic18f2520) +# include + +#elif defined(pic18f2523) +# include + +#elif defined(pic18f2525) +# include + +#elif defined(pic18f2550) +# include + +#elif defined(pic18f2580) +# include + +#elif defined(pic18f2585) +# include + +#elif defined(pic18f25j10) +# include + +#elif defined(pic18f25k20) +# include + +#elif defined(pic18f2610) +# include + +#elif defined(pic18f2620) +# include + +#elif defined(pic18f2680) +# include + +#elif defined(pic18f2682) +# include + +#elif defined(pic18f2685) +# include + +#elif defined(pic18f26k20) +# include + +#elif defined(pic18f4220) +# include + +#elif defined(pic18f4221) +# include + +#elif defined(pic18f4320) +# include + +#elif defined(pic18f4321) +# include + +#elif defined(pic18f4331) +# include + +#elif defined(pic18f43k20) +# include + +#elif defined(pic18f4410) +# include + +#elif defined(pic18f4420) +# include + +#elif defined(pic18f4423) +# include + +#elif defined(pic18f4431) +# include + +#elif defined(pic18f4450) +# include + +#elif defined(pic18f4455) +# include + +#elif defined(pic18f4480) +# include + +#elif defined(pic18f44j10) +# include + +#elif defined(pic18f44k20) +# include + +#elif defined(pic18f4510) +# include + +#elif defined(pic18f4515) +# include + +#elif defined(pic18f4520) +# include + +#elif defined(pic18f4523) +# include + +#elif defined(pic18f4525) +# include + +#elif defined(pic18f4550) +# include + +#elif defined(pic18f4580) +# include + +#elif defined(pic18f4585) +# include + +#elif defined(pic18f45j10) +# include + +#elif defined(pic18f45k20) +# include + +#elif defined(pic18f4610) +# include + +#elif defined(pic18f4620) +# include + +#elif defined(pic18f4680) +# include + +#elif defined(pic18f4682) +# include + +#elif defined(pic18f4685) +# include + +#elif defined(pic18f46k20) +# include + +#elif defined(pic18f6520) +# include + +#elif defined(pic18f6585) +# include + +#elif defined(pic18f65j50) +# include + +#elif defined(pic18f6620) +# include + +#elif defined(pic18f6680) +# include + +#elif defined(pic18f66j50) +# include + +#elif defined(pic18f66j55) +# include + +#elif defined(pic18f66j60) +# include + +#elif defined(pic18f66j65) +# include + +#elif defined(pic18f6720) +# include + +#elif defined(pic18f67j50) +# include + +#elif defined(pic18f67j60) +# include + +#elif defined(pic18f8520) +# include + +#elif defined(pic18f8585) +# include + +#elif defined(pic18f85j50) +# include + +#elif defined(pic18f8620) +# include + +#elif defined(pic18f8680) +# include + +#elif defined(pic18f86j50) +# include + +#elif defined(pic18f86j55) +# include + +#elif defined(pic18f86j60) +# include + +#elif defined(pic18f86j65) +# include + +#elif defined(pic18f8720) +# include + +#elif defined(pic18f87j50) +# include + +#elif defined(pic18f87j60) +# include + +#elif defined(pic18f96j60) +# include + +#elif defined(pic18f96j65) +# include + +#elif defined(pic18f97j60) +# include + + +#else +# error Unsupported processor + +#endif + + +#define Nop() do { __asm nop __endasm; } while(0) +#define ClrWdt() do { __asm clrwdt __endasm; } while(0) +#define Sleep() do { __asm sleep __endasm; } while(0) +#define Reset() do { __asm reset __endasm; } while(0) + + +#endif /* __PIC18FREGS_H__ */ + diff --git a/device/include/pic16/sdcc-lib.h b/device/include/pic16/sdcc-lib.h new file mode 100644 index 0000000..9385892 --- /dev/null +++ b/device/include/pic16/sdcc-lib.h @@ -0,0 +1,23 @@ + +/* + * sdcc-lib.h - SDCC Library Main Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: sdcc-lib.h 3512 2004-10-01 14:32:06Z vrokas $ + * + */ + +/** Top level header file for the sdcc libraries that enables target + specific features. +*/ +#ifndef __PIC16_SDCC_LIB_H +#define __PIC16_SDCC_LIB_H 1 + +#include <../asm/pic16/features.h> + +#endif diff --git a/device/include/pic16/signal.h b/device/include/pic16/signal.h new file mode 100644 index 0000000..0c463e4 --- /dev/null +++ b/device/include/pic16/signal.h @@ -0,0 +1,257 @@ +/* + * Signal handler header + * + * written by Vangelis Rokas, 2005 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * + * $Id: signal.h 5393 2009-02-28 15:23:35Z tecodev $ + */ + +#ifndef __SIGNAL_H__ +#define __SIGNAL_H__ + +/* interrupt testing arguments */ +#define SIG_RB SIG_RBIF +#define SIG_INT0 SIG_INT0IF +#define SIG_INT1 SIG_INT1IF +#define SIG_INT2 SIG_INT2IF +#define SIG_CCP1 SIG_CCP1IF +#define SIG_CCP2 SIG_CCP2IF +#define SIG_TMR0 SIG_TMR0IF +#define SIG_TMR1 SIG_TMR1IF +#define SIG_TMR2 SIG_TMR2IF +#define SIG_TMR3 SIG_TMR3IF +#define SIG_EE SIG_EEIF +#define SIG_BCOL SIG_BCOLIF +#define SIG_LVD SIG_LVDIF +#define SIG_PSP SIG_PSPIF +#define SIG_AD SIG_ADIF +#define SIG_RC SIG_RCIF +#define SIG_TX SIG_TXIF +#define SIG_SSP SIG_SSPIF +#define SIG_MSSP SIG_SSPIF /* just an alias */ +#define SIG_USB SIG_USBIF + +/* define name to be the interrupt handler for interrupt #vecno */ +#define DEF_ABSVECTOR(vecno, name) \ +void __ivt_ ## name(void) __interrupt(vecno) __naked \ +{ \ + __asm goto _ ## name __endasm; \ +} + +/* Define name to be the handler for high priority interrupts, + * use like this: + * DEF_INTHIGH(high_handler) + * DEF_HANDLER(SIG_TMR0, timer0_handler) + * DEF_HANDLER2(SIG_TMR1, SIG_TMR1IE, timer1_handler) + * ... + * END_DEF + * + * SIGHANDLER(timer0_handler) + * { + * // code to handle timer0 interrupts + * } + * SIGHANDLER(timer1_handler) + * { + * // code to handle timer1 interrupts + * } + */ +#define DEF_INTHIGH(name) \ +DEF_ABSVECTOR(1, name) \ +void name(void) __naked __interrupt \ +{ + +/* Define name to be the handler for high priority interrupts, + * use like this: + * DEF_INTLOW(low_handler) + * DEF_HANDLER(SIG_RB, portb_handler) + * DEF_HANDLER2(SIG_LVD, SIG_LVDIE, lowvolt_handler) + * ... + * END_DEF + * + * SIGHANDLER(portb_handler) + * { + * // code to handle PORTB change interrupts + * } + * SIGHANDLER(lowvolt_handler) + * { + * // code to handle low voltage interrupts + * } + */ +#define DEF_INTLOW(name) \ +DEF_ABSVECTOR(2, name) \ +void name(void) __naked __interrupt \ +{ + +/* finish an interrupt handler definition */ +#define END_DEF \ + __asm retfie __endasm; \ +} + +/* Declare handler to be the handler function for the given signal. + * sig should be one of SIG_xxx from above, handler should be a + * function defined using SIGHANDLER(handler) or + * SIGHANDLERNAKED(handler). + * ATTENTION: This macro ignores the signal's enable bit! + * Use DEF_HANDLER2(SIG_xxx, SIGxxxIE, handler) instead! + * To be used together with DEF_INTHIGH and DEF_INTLOW. + */ +#define DEF_HANDLER(sig, handler) \ + __asm btfsc sig __endasm; \ + __asm goto _ ## handler __endasm; + +/* Declare handler to be the handler function for the given signal. + * sig should be one of SIG_xxx from above, + * sig2 should also be a signal (probably SIG_xxxIE from below) and + * handler should be a function defined using SIGHANDLER(handler) + * or SIGHANDLERNAKED(handler). + * To be used together with DEF_INTHIGH and DEF_INTLOW. + */ +#define DEF_HANDLER2(sig1,sig2,handler) \ + __asm btfss sig1 __endasm; \ + __asm bra $+8 __endasm; \ + __asm btfsc sig2 __endasm; \ + __asm goto _ ## handler __endasm; + +/* Declare or define an interrupt handler function. */ +#define SIGHANDLER(handler) void handler (void) __interrupt +#define SIGHANDLERNAKED(handler) void handler (void) __naked __interrupt + + +/* + * inline assembly compatible bit definitions + */ +#define SIG_RBIF _INTCON, 0 +#define SIG_RBIE _INTCON, 3 +#define SIG_RBIP _INTCON2, 0 + +#define SIG_INT0IF _INTCON, 1 +#define SIG_INT0IE _INTCON, 4 +/*#define SIG_INT0IP not selectable, always ? */ + +#define SIG_TMR0IF _INTCON, 2 +#define SIG_TMR0IE _INTCON, 5 +#define SIG_TMR0IP _INTCON2, 2 + +#define SIG_INT1IF _INTCON3, 0 +#define SIG_INT1IE _INTCON3, 3 +#define SIG_INT1IP _INTCON3, 6 + +#define SIG_INT2IF _INTCON3, 1 +#define SIG_INT2IE _INTCON3, 4 +#define SIG_INT2IP _INTCON3, 7 + +/* device dependent -- should be moved to pic18f*.h */ +#define SIG_TMR1IDX 0 +#define SIG_TMR1SUF 1 +#define SIG_TMR2IDX 1 +#define SIG_TMR2SUF 1 +#define SIG_CCP1IDX 2 +#define SIG_CCP1SUF 1 +#define SIG_SSPIDX 3 +#define SIG_SSPSUF 1 +#define SIG_TXIDX 4 +#define SIG_TXSUF 1 +#define SIG_RCIDX 5 +#define SIG_RCSUF 1 +#define SIG_ADIDX 6 +#define SIG_ADSUF 1 +#define SIG_PSPIDX 7 +#define SIG_PSPSUF 1 + +#define SIG_CCP2IDX 0 +#define SIG_CCP2SUF 2 +#define SIG_TMR3IDX 1 +#define SIG_TMR3SUF 2 +#define SIG_LVDIDX 2 +#define SIG_LVDSUF 2 +#define SIG_BCOLIDX 3 +#define SIG_BCOLSUF 2 +#define SIG_EEIDX 4 +#define SIG_EESUF 2 +#define SIG_USBIDX 5 +#define SIG_USBSUF 2 + +/* device independent */ +#define __concat(a,b) __concat2(a,b) +#define __concat2(a,b) a ## b + +#define SIG_PIR(suf) __concat(_PIR,suf) +#define SIG_PIE(suf) __concat(_PIE,suf) +#define SIG_IPR(suf) __concat(_IPR,suf) + +#define SIG_TMR1IF SIG_PIR(SIG_TMR1SUF), SIG_TMR1IDX +#define SIG_TMR1IE SIG_PIE(SIG_TMR1SUF), SIG_TMR1IDX +#define SIG_TMR1IP SIG_IPR(SIG_TMR1SUF), SIG_TMR1IDX + +#define SIG_TMR2IF SIG_PIR(SIG_TMR2SUF), SIG_TMR2IDX +#define SIG_TMR2IE SIG_PIE(SIG_TMR2SUF), SIG_TMR2IDX +#define SIG_TMR2IP SIG_IPR(SIG_TMR2SUF), SIG_TMR2IDX + +#define SIG_CCP1IF SIG_PIR(SIG_CCP1SUF), SIG_CCP1IDX +#define SIG_CCP1IE SIG_PIE(SIG_CCP1SUF), SIG_CCP1IDX +#define SIG_CCP1IP SIG_IPR(SIG_CCP1SUF), SIG_CCP1IDX + +#define SIG_SSPIF SIG_PIR(SIG_SSPSUF), SIG_SSPIDX +#define SIG_SSPIE SIG_PIE(SIG_SSPSUF), SIG_SSPIDX +#define SIG_SSPIP SIG_IPR(SIG_SSPSUF), SIG_SSPIDX +/* aliases: MSSP */ +#define SIG_MSSPIF SIG_SSPIF //SIG_PIR(SIG_SSPSUF), SIG_SSPIDX +#define SIG_MSSPIE SIG_SSPIE //SIG_PIE(SIG_SSPSUF), SIG_SSPIDX +#define SIG_MSSPIP SIG_SSPIP //SIG_IPR(SIG_SSPSUF), SIG_SSPIDX + +#define SIG_TXIF SIG_PIR(SIG_TXSUF), SIG_TXIDX +#define SIG_TXIE SIG_PIE(SIG_TXSUF), SIG_TXIDX +#define SIG_TXIP SIG_IPR(SIG_TXSUF), SIG_TXIDX + +#define SIG_RCIF SIG_PIR(SIG_RCSUF), SIG_RCIDX +#define SIG_RCIE SIG_PIE(SIG_RCSUF), SIG_RCIDX +#define SIG_RCIP SIG_IPR(SIG_RCSUF), SIG_RCIDX + +#define SIG_ADIF SIG_PIR(SIG_ADSUF), SIG_ADIDX +#define SIG_ADIE SIG_PIE(SIG_ADSUF), SIG_ADIDX +#define SIG_ADIP SIG_IPR(SIG_ADSUF), SIG_ADIDX + +#define SIG_PSPIF SIG_PIR(SIG_PSPSUF), SIG_PSPIDX +#define SIG_PSPIE SIG_PIE(SIG_PSPSUF), SIG_PSPIDX +#define SIG_PSPIP SIG_IPR(SIG_PSPSUF), SIG_PSPIDX + +#define SIG_CCP2IF SIG_PIR(SIG_CCP2SUF), SIG_CCP2IDX +#define SIG_CCP2IE SIG_PIE(SIG_CCP2SUF), SIG_CCP2IDX +#define SIG_CCP2IP SIG_IPR(SIG_CCP2SUF), SIG_CCP2IDX + +#define SIG_TMR3IF SIG_PIR(SIG_TMR3SUF), SIG_TMR3IDX +#define SIG_TMR3IE SIG_PIE(SIG_TMR3SUF), SIG_TMR3IDX +#define SIG_TMR3IP SIG_IPR(SIG_TMR3SUF), SIG_TMR3IDX + +#define SIG_LVDIF SIG_PIR(SIG_LVDSUF), SIG_LVDIDX +#define SIG_LVDIE SIG_PIE(SIG_LVDSUF), SIG_LVDIDX +#define SIG_LVDIP SIG_IPR(SIG_LVDSUF), SIG_LVDIDX + +#define SIG_BCOLIF SIG_PIR(SIG_BCOLSUF), SIG_BCOLIDX +#define SIG_BCOLIE SIG_PIE(SIG_BCOLSUF), SIG_BCOLIDX +#define SIG_BCOLIP SIG_IPR(SIG_BCOLSUF), SIG_BCOLIDX + +#define SIG_EEIF SIG_PIR(SIG_EESUF), SIG_EEIDX +#define SIG_EEIE SIG_PIE(SIG_EESUF), SIG_EEIDX +#define SIG_EEIP SIG_IPR(SIG_EESUF), SIG_EEIDX + +#define SIG_USBIF SIG_PIR(SIG_USBSUF), SIG_USBIDX +#define SIG_USBIE SIG_PIE(SIG_USBSUF), SIG_USBIDX +#define SIG_USBIP SIG_IPR(SIG_USBSUF), SIG_USBIDX + +#endif /* __SIGNAL_H__ */ diff --git a/device/include/pic16/stdarg.h b/device/include/pic16/stdarg.h new file mode 100644 index 0000000..bedcf21 --- /dev/null +++ b/device/include/pic16/stdarg.h @@ -0,0 +1,40 @@ +/*------------------------------------------------------------------------- + stdarg.h - ANSI macros for variable parameter list + + Ported to PIC16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* +** $Id: stdarg.h 3522 2004-10-03 12:12:40Z vrokas $ +*/ + + +#ifndef __PIC16_STDARG_H +#define __PIC16_STDARG_H 1 + +typedef unsigned char * va_list; +#define va_start(list, last) list = (unsigned char *)&last + sizeof(last) +#define va_arg(list, type) *((type *)((list += sizeof(type)) - sizeof(type))) +#define va_end(list) list = ((va_list) 0) + +#endif /* __PIC16_STDARG_H */ diff --git a/device/include/pic16/stddef.h b/device/include/pic16/stddef.h new file mode 100644 index 0000000..98b1a16 --- /dev/null +++ b/device/include/pic16/stddef.h @@ -0,0 +1,41 @@ +/*------------------------------------------------------------------------- + stddef.h - ANSI functions forward declarations + + Ported to PIC16 port by Raphael Neider (2005) + + Written By - Maarten Brock / sourceforge.brock@dse.nl (June 2004) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +/* +** $Id: stddef.h 4148 2006-05-01 20:47:12Z tecodev $ +*/ + +#ifndef __PIC16_STDDEF_H +#define __PIC16_STDDEF_H 1 + +#ifndef NULL + #define NULL (void *)0 +#endif + +#ifndef _SIZE_T_DEFINED +#define _SIZE_T_DEFINED + typedef unsigned int size_t; +#endif + +#define offsetof(s,m) (size_t)&(((s *)0)->m) + +#endif /* __PIC16_STDDEF_H */ diff --git a/device/include/pic16/stdint.h b/device/include/pic16/stdint.h new file mode 100644 index 0000000..12b26d5 --- /dev/null +++ b/device/include/pic16/stdint.h @@ -0,0 +1,157 @@ +/*------------------------------------------------------------------------- + stdint.h - ISO C99 7.18 Integer types + + Written By - Maarten Brock, sourceforge.brock@dse.nl (2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef _STDINT_H +#define _STDINT_H 1 + +/* Exact integral types. */ + +/* Signed. */ + +typedef signed char int8_t; +typedef short int int16_t; +typedef long int int32_t; + +/* Unsigned. */ +typedef unsigned char uint8_t; +typedef unsigned short int uint16_t; +typedef unsigned long int uint32_t; + + +/* Small types. */ + +/* Signed. */ +typedef signed char int_least8_t; +typedef short int int_least16_t; +typedef long int int_least32_t; + +/* Unsigned. */ +typedef unsigned char uint_least8_t; +typedef unsigned short int uint_least16_t; +typedef unsigned long int uint_least32_t; + + +/* Fast types. */ + +/* Signed. */ +typedef signed char int_fast8_t; +typedef int int_fast16_t; +typedef long int int_fast32_t; + +/* Unsigned. */ +typedef unsigned char uint_fast8_t; +typedef unsigned int uint_fast16_t; +typedef unsigned long int uint_fast32_t; + + +/* Types for `void *' pointers. */ +typedef long int intptr_t; +typedef unsigned long int uintptr_t; + + +/* Largest integral types. */ +typedef long int intmax_t; +typedef unsigned long int uintmax_t; + + +/* Limits of integral types. */ + +/* Minimum of signed integral types. */ +# define INT8_MIN (-128) +# define INT16_MIN (-32767-1) +# define INT32_MIN (-2147483647L-1) +/* Maximum of signed integral types. */ +# define INT8_MAX (127) +# define INT16_MAX (32767) +# define INT32_MAX (2147483647L) + +/* Maximum of unsigned integral types. */ +# define UINT8_MAX (255) +# define UINT16_MAX (65535) +# define UINT32_MAX (4294967295UL) + +/* Minimum of signed integral types having a minimum size. */ +# define INT_LEAST8_MIN (-128) +# define INT_LEAST16_MIN (-32767-1) +# define INT_LEAST32_MIN (-2147483647L-1) +/* Maximum of signed integral types having a minimum size. */ +# define INT_LEAST8_MAX (127) +# define INT_LEAST16_MAX (32767) +# define INT_LEAST32_MAX (2147483647L) + +/* Maximum of unsigned integral types having a minimum size. */ +# define UINT_LEAST8_MAX (255) +# define UINT_LEAST16_MAX (65535) +# define UINT_LEAST32_MAX (4294967295UL) + +/* Minimum of fast signed integral types having a minimum size. */ +# define INT_FAST8_MIN (-128) +# define INT_FAST16_MIN (-32767-1) +# define INT_FAST32_MIN (-2147483647L-1) + +/* Maximum of fast signed integral types having a minimum size. */ +# define INT_FAST8_MAX (127) +# define INT_FAST16_MAX (32767) +# define INT_FAST32_MAX (2147483647L) + +/* Maximum of fast unsigned integral types having a minimum size. */ +# define UINT_FAST8_MAX (255) +# define UINT_FAST16_MAX (65535) +# define UINT_FAST32_MAX (4294967295UL) + +/* Values to test for integral types holding `void *' pointer. */ +# define INTPTR_MIN (-2147483647L-1) +# define INTPTR_MAX (2147483647L) +# define UINTPTR_MAX (4294967295UL) + +/* Minimum for largest signed integral type. */ +# define INTMAX_MIN (-__INT32_C(-2147483647L)-1) +/* Maximum for largest signed integral type. */ +# define INTMAX_MAX (__INT32_C(2147483647L)) + +/* Maximum for largest unsigned integral type. */ +# define UINTMAX_MAX (__UINT32_C(4294967295UL)) + + +/* Limits of other integer types. */ + +/* Limits of `ptrdiff_t' type. */ +# define PTRDIFF_MIN (-2147483647L-1) +# define PTRDIFF_MAX (2147483647L) + +/* Limit of `size_t' type. */ +# define SIZE_MAX (65535) + +/* Signed. */ +# define INT8_C(c) c +# define INT16_C(c) c +# define INT32_C(c) c ## L + +/* Unsigned. */ +# define UINT8_C(c) c ## U +# define UINT16_C(c) c ## U +# define UINT32_C(c) c ## UL + +/* Maximal type. */ +# define INTMAX_C(c) c ## L +# define UINTMAX_C(c) c ## UL + + +#endif /* stdint.h */ diff --git a/device/include/pic16/stdio.h b/device/include/pic16/stdio.h new file mode 100644 index 0000000..bec27f3 --- /dev/null +++ b/device/include/pic16/stdio.h @@ -0,0 +1,123 @@ +/*------------------------------------------------------------------------- + stdio.h - ANSI functions forward declarations + + Ported to PIC16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + As a special exception, if you link this library with other files, + some of which are compiled with SDCC, to produce an executable, + this library does not by itself cause the resulting executable + to be covered by the GNU General Public License. + This exception does not however invalidate any other reasons why + the executable file might be covered by the GNU General Public License. +-------------------------------------------------------------------------*/ + +#ifndef __STDIO_H +#define __STDIO_H 1 + +/* link the C library */ +#pragma library c + +#include + +#include + +#ifndef NULL + #define NULL (void *)0 +#endif + +#ifndef _SIZE_T_DEFINED +#define _SIZE_T_DEFINED + typedef unsigned int size_t; +#endif + +/* stream descriptor definition */ +typedef char *FILE; + +/* USART and MSSP module stream descriptors */ + +/* since FILE is declared as a generic pointer, + * the upper byte is used to dereference the pointer + * information. For the stream descriptors we + * use the 5th bit and the lower nubble bits. + * Descriptors are denoted by an 1 in bit 5, + * further dereference is made for: + * <3:0> bits + * USART 0 (0x0) + * MSSP 1 (0x1) + * USER 15 (0xf) + * + * There is a special value for GPSIM specific (see below) + * which is: + * GPSIM 14 (0xe) + * + * + * if further stream descriptors need to be added then more + * bits of the upper byte can be used + */ + +#define USART_DEREF 0x0 +#define MSSP_DEREF 0x1 +#define USER_DEREF 0xf + +#define STREAM_USART ((FILE *)(0x00200000UL)) +#define STREAM_MSSP ((FILE *)(0x00210000UL)) +#define STREAM_USER ((FILE *)(0x002f0000UL)) + +/* this is a custom dereference which points to a custom + * port of GPSIM simulator. This port redirects characters + * to /tmp/gpsim.debug.1 file (used for debugging purposes) + * NOTICE: This feature is not part of the official gpsim + * distribution. Contact vrokas AT users.sourceforge.net + * for more info */ +#define GPSIM_DEREF 0xe +#define STREAM_GPSIM ((FILE *)(0x002e0000UL)) + +extern FILE *stdin; +extern FILE *stdout; + +/* printf_small() supports float print */ +void printf_small (const char *fmt, ...); + +/* printf_tiny() does not support float print */ +void printf_tiny (const char *fmt, ...); // __reentrant; + +extern int printf (const char *fmt, ...); +extern int fprintf (FILE *stream, const char *fmt, ...); +extern int sprintf (char *str, const char *fmt, ...); + +extern int vprintf (const char *fmt, va_list ap); +extern int vfprintf (FILE *stream, const char *fmt, va_list ap); +extern int vsprintf (char *str, const char *fmt, va_list ap); + +extern void putchar (char c) __wparam; + +extern void __stream_putchar (FILE *stream, char c); + +extern void __stream_usart_putchar (char c) __wparam __naked; +extern void __stream_mssp_putchar (char c) __wparam __naked; +extern void __stream_gpsim_putchar (char c) __wparam __naked; + +extern char *gets (char *str); +extern char getchar (void); + +#endif /* __STDIO_H */ diff --git a/device/include/pic16/stdlib.h b/device/include/pic16/stdlib.h new file mode 100644 index 0000000..1622f37 --- /dev/null +++ b/device/include/pic16/stdlib.h @@ -0,0 +1,84 @@ +/*------------------------------------------------------------------------- + stdlib.h - ANSI functions forward declarations + + Ported to PIC16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* +** $Id: stdlib.h 5008 2008-02-13 21:59:32Z MaartenBrock $ +*/ + +#ifndef __STDLIB_H__ +#define __STDLIB_H__ 1 + +#pragma library c + +#include + + +#ifndef NULL +# define NULL (void *)0 +#endif + +#define RAND_MAX 0x7fffffff + +/* initialize random seed */ +void srand(unsigned long seed); + +/* return a random number between 0 and RAND_MAX */ +long rand(void); + +/* reentrant version of rand() */ +long rand_r(unsigned long *ctx); + + +/* returns the CRC16 checksum of the data buffer, takes as + * last argument an old value of crc16 checksum */ +uint16_t crc16(uint8_t *, uint32_t, uint16_t); + + +/* convert a ASCII string to float */ +float atof (char *); + +/* convert a ASCII string to integer */ +int atoi (char *); + +/* convert a ASCII string to long */ +long atol (char *); + +/* convert an unsigned/signed integer to ASCII string */ +void uitoa(unsigned int, __data char *, unsigned char); +void itoa(int, __data char*, unsigned char); + +/* convert an unsigned/signed long integer to ASCII string */ +void ultoa(unsigned long, __data char *, unsigned char); +void ltoa(long, __data char*, unsigned char); + +/* helper functions: convert a float to ASCII string */ +extern char x_ftoa(float, __data char *, unsigned char, unsigned char); + +/* George M. Gallant's version of ftoa() */ +extern void g_ftoa(__data char *, float, char); + + +#endif /* __STDLIB_H__ */ diff --git a/device/include/pic16/string.h b/device/include/pic16/string.h new file mode 100644 index 0000000..ed20811 --- /dev/null +++ b/device/include/pic16/string.h @@ -0,0 +1,77 @@ +/*------------------------------------------------------------------------- + string.h - ANSI functions forward declarations + + Modified for pic16 port by Vangelis Rokas, 2004, vrokas@otenet.gr + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +/* +** $Id: string.h 3912 2005-10-26 11:08:11Z tecodev $ +*/ + +#ifndef __STRING_H /* { */ +#define __STRING_H 1 + +#define _STRING_SPEC __data + +#pragma library c + +#ifndef NULL +# define NULL (void *)0 +#endif + +#ifndef _SIZE_T_DEFINED +# define _SIZE_T_DEFINED + typedef unsigned int size_t; +#endif + +char *strcat (char *, char *); +char *strchr (char *, char); +int strcmp (char *, char *); +char *strcpy (char *, char *); +int strcspn(char *, char *); +int strlen (char *); +char *strlwr (char *); +char *strncat(char *, char *, size_t ); +int strncmp(char *, char *, size_t ); +char *strncpy(char *, char *, size_t ); +char *strpbrk(char *, char *); +char *strrchr(char *, char); +int strspn (char *, char *); +char *strstr (char *, char *); +char *strtok (char *, char *); +char *strupr (char *); + +void *memccpy(void *, void *, char, size_t); +void *memchr(void *, char, size_t); +int memcmp (void *, void *, size_t); +void *memcpy (void *, void *, size_t); +void *memmove (void *, void *, size_t); +void *memrchr(void *, char, size_t); +void *memset (_STRING_SPEC void *, unsigned char, size_t ); + +__code void *memchrpgm(__code void *, char, size_t); +__data void *memchrram(__data void *, char, size_t); +__data void *memcpypgm2ram(__data void *, __code void *, size_t); +__data void *memcpyram2ram(__data void *, __data void *, size_t); + + +#endif /* } */ diff --git a/device/include/pic16/usart.h b/device/include/pic16/usart.h new file mode 100644 index 0000000..c54c984 --- /dev/null +++ b/device/include/pic16/usart.h @@ -0,0 +1,78 @@ + +/* + * USART communications module library header + * + * written for SDCC/pic16 port by Vangelis Rokas, 2005 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * + * $Id: usart.h 3785 2005-06-24 14:19:36Z tecodev $ + */ + +#ifndef __USART_H__ +#define __USART_H__ + +#pragma library io + + +#define RAM_SCLS __data + +/* configuration bit masks for open function */ +#define USART_TX_INT_ON 0xff +#define USART_TX_INT_OFF 0x7f +#define USART_RX_INT_ON 0xff +#define USART_RX_INT_OFF 0xbf +#define USART_BRGH_HIGH 0xff +#define USART_BRGH_LOW 0xef +#define USART_CONT_RX 0xff +#define USART_SINGLE_RX 0xf7 +#define USART_SYNC_MASTER 0xff +#define USART_SYNC_SLAVE 0xfb +#define USART_NINE_BIT 0xff +#define USART_EIGHT_BIT 0xfd +#define USART_SYNCH_MODE 0xff +#define USART_ASYNCH_MODE 0xfe + +/* status bits */ +union USART +{ + unsigned char val; + struct + { + unsigned RX_NINE:1; + unsigned TX_NINE:1; + unsigned FRAME_ERROR:1; + unsigned OVERRUN_ERROR:1; + unsigned fill:4; + }; +}; + +void usart_open(unsigned char config, unsigned int spbrg) __wparam; +void usart_close(void); + +unsigned char usart_busy(void) __naked; +unsigned char usart_drdy(void) __naked; + +unsigned char usart_getc(void); +void usart_gets(RAM_SCLS char *buffer, unsigned char len); + +void usart_putc(unsigned char data) __wparam __naked; +void usart_puts(char *data); + + +void usart_baud(unsigned char baudconfig) __wparam; + +#endif diff --git a/device/include/sdcc-lib.h b/device/include/sdcc-lib.h new file mode 100644 index 0000000..00564ec --- /dev/null +++ b/device/include/sdcc-lib.h @@ -0,0 +1,43 @@ +/*------------------------------------------------------------------------- + Top level header file for the sdcc libraries that enables target + specific features. + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef __SDC51_SDCC_LIB_H +#define __SDC51_SDCC_LIB_H 1 + +#if defined(__z80) +#include + +#elif defined(__gbz80) +#include + +#elif defined(__mcs51) +#include + +#elif defined(__ds390) +#include + +#else +/* PENDING */ +#include + +#endif + +#endif diff --git a/device/include/ser.h b/device/include/ser.h new file mode 100644 index 0000000..bafb65e --- /dev/null +++ b/device/include/ser.h @@ -0,0 +1,35 @@ +/*KA****************************************************************** +* PROJECT: PLOne/8052 +********************************************************************** +* FILE: ser.h +********************************************************************** +* CHANGES: +* date author description +* -------------------------------------------------------------------- +* 04/26/99 we update +* 04/27/99 we add comments/header +********************************************************************** +* DESCRIPTION: +* This file is the header to be included by modules which use the +* ser.c module. +********************************************************************** +* FUNCTIONS DECLARED: +* see ser.c +********************************************************************** +* COMPILE TIME OPTIONS: - +* DEBUG OPTIONS: - +******************************************************************KE*/ +/* $Id: ser.h 4498 2006-12-02 11:53:42Z MaartenBrock $ */ + +#ifndef _SER_H_ +#define _SER_H_ + +void ser_init(void); +void ser_interrupt_handler(void) __interrupt 4 __using 1; +void ser_putc(unsigned char); +unsigned char ser_getc(void); +void ser_printString(char *String); +char ser_charAvail(void); + +/*********************End of File************************************/ +#endif diff --git a/device/include/ser_ir.h b/device/include/ser_ir.h new file mode 100644 index 0000000..97b79df --- /dev/null +++ b/device/include/ser_ir.h @@ -0,0 +1,41 @@ +/*------------------------------------------------------------------------- + ser_ir.h - header file for serial routines + + Written By - Josef Wolf (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + +-------------------------------------------------------------------------*/ +/* call this one first on startup */ +void ser_init (void); + +/* the following ones should be obvious */ +void ser_putc (unsigned char c); +void ser_puts (unsigned char *s); +void ser_gets (unsigned char *s, unsigned char len); +unsigned char ser_getc (void); + +/* return the number of chars that can be received/transmitted without +* blocking. +*/ +unsigned char ser_can_rcv (void); +unsigned char ser_can_xmt (void); + +/* needs to be defined somewhere :-() */ +void ser_handler (void) __interrupt 4; diff --git a/device/include/serial.h b/device/include/serial.h new file mode 100644 index 0000000..e0d0699 --- /dev/null +++ b/device/include/serial.h @@ -0,0 +1,15 @@ +/*---------------------------------------------------------------------------- + Written by Dmitry S. Obukhov, 1996 + dso@usa.net + ---------------------------------------------------------------------------- + This module implements serial interrupt handler and IO routinwes using + two 256 byte cyclic buffers. Bit variables can be used as flags for + real-time kernel tasks + Last modified 6 Apr 97 + ----------------------------------------------------------------------------*/ + +void serial_init(void); +void serial_interrupt_handler(void) __interrupt 4 __using 1; +void serial_putc(unsigned char); +unsigned char serial_getc(void); +void autobaud(); diff --git a/device/include/serial390.h b/device/include/serial390.h new file mode 100644 index 0000000..cc4cffa --- /dev/null +++ b/device/include/serial390.h @@ -0,0 +1,7 @@ +#ifndef SERIAL390_H +#define SERIAL390_H + +#warning "Please use instead of " +#include + +#endif SERIAL390_H diff --git a/device/include/setjmp.h b/device/include/setjmp.h new file mode 100644 index 0000000..866e694 --- /dev/null +++ b/device/include/setjmp.h @@ -0,0 +1,57 @@ +/*------------------------------------------------------------------------- + setjmp.h - header file for setjmp & longjmp ANSI routines + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCC_SETJMP_H +#define SDCC_SETJMP_H + +#define SP_SIZE 1 + +#ifdef SDCC_STACK_AUTO +#define BP_SIZE SP_SIZE +#else +#define BP_SIZE 0 +#endif + +#ifdef SDCC_USE_XSTACK +#define SPX_SIZE 1 +#else +#define SPX_SIZE 0 +#endif + +#define BPX_SIZE SPX_SIZE + +#define RET_SIZE 2 + +typedef unsigned char jmp_buf[RET_SIZE + SP_SIZE + BP_SIZE + SPX_SIZE + BPX_SIZE]; + +int setjmp (jmp_buf); +int longjmp(jmp_buf, int); + +#undef RET_SIZE +#undef SP_SIZE +#undef BP_SIZE +#undef SPX_SIZE +#undef BPX_SIZE + +#endif diff --git a/device/include/stdarg.h b/device/include/stdarg.h new file mode 100644 index 0000000..db0b889 --- /dev/null +++ b/device/include/stdarg.h @@ -0,0 +1,36 @@ +/*-----------------------------------------------------------------------------------*/ +/* stdarg.h - ANSI macros for variable parameter list */ +/*-----------------------------------------------------------------------------------*/ + +#ifndef __SDC51_STDARG_H +#define __SDC51_STDARG_H 1 + +#if defined(__z80) || defined(__gbz80) || defined(__hc08) + +typedef unsigned char * va_list; +#define va_start(marker, last) { marker = (va_list)&last + sizeof(last); } +#define va_arg(marker, type) *((type *)((marker += sizeof(type)) - sizeof(type))) + +#elif defined(__ds390) || defined(__ds400) + +typedef unsigned char * va_list; +#define va_start(marker, first) { marker = (va_list)&first; } +#define va_arg(marker, type) *((type *)(marker -= sizeof(type))) + +#elif defined(SDCC_USE_XSTACK) + +typedef unsigned char __pdata * va_list; +#define va_start(marker, first) { marker = (va_list)&first; } +#define va_arg(marker, type) *((type __pdata *)(marker -= sizeof(type))) + +#else + +typedef unsigned char __data * va_list; +#define va_start(marker, first) { marker = (va_list)&first; } +#define va_arg(marker, type) *((type __data * )(marker -= sizeof(type))) + +#endif + +#define va_end(marker) marker = (va_list) 0; + +#endif diff --git a/device/include/stdbool.h b/device/include/stdbool.h new file mode 100644 index 0000000..216eb8b --- /dev/null +++ b/device/include/stdbool.h @@ -0,0 +1,40 @@ +/*------------------------------------------------------------------------- + stdbool.h - ANSI functions forward declarations + + Written By - Maarten Brock, sourceforge.brock@dse.nl (2004) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef __SDC51_STDBOOL_H +#define __SDC51_STDBOOL_H 1 + +#define true 1 +#define false 0 + +/* Only define bool for ports that really support it to the full extend. + For other ports only define BOOL which can be used in most cases, + but can result in unexpected behaviour */ + +#if defined (SDCC_hc08) || defined (SDCC_z80) || defined (SDCC_gbz80) || defined (SDCC_pic14) || defined (SDCC_pic16) + #define BOOL char +#else + #define _Bool __bit + #define BOOL __bit + #define bool _Bool + #define __bool_true_false_are_defined 1 +#endif + +#endif diff --git a/device/include/stddef.h b/device/include/stddef.h new file mode 100644 index 0000000..4ea69d0 --- /dev/null +++ b/device/include/stddef.h @@ -0,0 +1,40 @@ +/*------------------------------------------------------------------------- + stddef.h - ANSI functions forward declarations + + Written By - Maarten Brock / sourceforge.brock@dse.nl (June 2004) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef __SDC51_STDDEF_H +#define __SDC51_STDDEF_H 1 + +#ifndef NULL + #define NULL (void *)0 +#endif + +#ifndef _SIZE_T_DEFINED +#define _SIZE_T_DEFINED + typedef unsigned int size_t; +#endif + +#if defined(SDCC_z80) || defined(SDCC_gbz80) + #define offsetof(s,m) (size_t)&(((s *)0)->m) +#else + /* temporary hack to fix bug 1518273 */ + #define offsetof(s,m) (size_t)&(((s __code *)0)->m) +#endif + +#endif diff --git a/device/include/stdint.h b/device/include/stdint.h new file mode 100644 index 0000000..1451249 --- /dev/null +++ b/device/include/stdint.h @@ -0,0 +1,173 @@ +/*------------------------------------------------------------------------- + stdint.h - ISO C99 7.18 Integer types + + Written By - Maarten Brock, sourceforge.brock@dse.nl (2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#ifndef _STDINT_H +#define _STDINT_H 1 + +/* Exact integral types. */ + +/* Signed. */ + +typedef signed char int8_t; +typedef short int int16_t; +typedef long int int32_t; + +/* Unsigned. */ +typedef unsigned char uint8_t; +typedef unsigned short int uint16_t; +typedef unsigned long int uint32_t; + + +/* Small types. */ + +/* Signed. */ +typedef signed char int_least8_t; +typedef short int int_least16_t; +typedef long int int_least32_t; + +/* Unsigned. */ +typedef unsigned char uint_least8_t; +typedef unsigned short int uint_least16_t; +typedef unsigned long int uint_least32_t; + + +/* Fast types. */ + +/* Signed. */ +typedef signed char int_fast8_t; +typedef int int_fast16_t; +typedef long int int_fast32_t; + +/* Unsigned. */ +typedef unsigned char uint_fast8_t; +typedef unsigned int uint_fast16_t; +typedef unsigned long int uint_fast32_t; + + +/* Types for `void *' pointers. */ +#if defined (SDCC_mcs51) || defined (SDCC_ds390) + typedef long int intptr_t; + typedef unsigned long int uintptr_t; +#else + typedef int intptr_t; + typedef unsigned int uintptr_t; +#endif + + +/* Largest integral types. */ +typedef long int intmax_t; +typedef unsigned long int uintmax_t; + + +/* Limits of integral types. */ + +/* Minimum of signed integral types. */ +# define INT8_MIN (-128) +# define INT16_MIN (-32767-1) +# define INT32_MIN (-2147483647L-1) +/* Maximum of signed integral types. */ +# define INT8_MAX (127) +# define INT16_MAX (32767) +# define INT32_MAX (2147483647L) + +/* Maximum of unsigned integral types. */ +# define UINT8_MAX (255) +# define UINT16_MAX (65535) +# define UINT32_MAX (4294967295UL) + +/* Minimum of signed integral types having a minimum size. */ +# define INT_LEAST8_MIN (-128) +# define INT_LEAST16_MIN (-32767-1) +# define INT_LEAST32_MIN (-2147483647L-1) +/* Maximum of signed integral types having a minimum size. */ +# define INT_LEAST8_MAX (127) +# define INT_LEAST16_MAX (32767) +# define INT_LEAST32_MAX (2147483647L) + +/* Maximum of unsigned integral types having a minimum size. */ +# define UINT_LEAST8_MAX (255) +# define UINT_LEAST16_MAX (65535) +# define UINT_LEAST32_MAX (4294967295UL) + +/* Minimum of fast signed integral types having a minimum size. */ +# define INT_FAST8_MIN (-128) +# define INT_FAST16_MIN (-32767-1) +# define INT_FAST32_MIN (-2147483647L-1) + +/* Maximum of fast signed integral types having a minimum size. */ +# define INT_FAST8_MAX (127) +# define INT_FAST16_MAX (32767) +# define INT_FAST32_MAX (2147483647L) + +/* Maximum of fast unsigned integral types having a minimum size. */ +# define UINT_FAST8_MAX (255) +# define UINT_FAST16_MAX (65535) +# define UINT_FAST32_MAX (4294967295UL) + +/* Values to test for integral types holding `void *' pointer. */ +#if defined (SDCC_mcs51) || defined (SDCC_ds390) +# define INTPTR_MIN (-2147483647L-1) +# define INTPTR_MAX (2147483647L) +# define UINTPTR_MAX (4294967295UL) +#else +# define INTPTR_MIN (-32767-1) +# define INTPTR_MAX (32767) +# define UINTPTR_MAX (65535) +#endif + +/* Minimum for largest signed integral type. */ +# define INTMAX_MIN (-__INT32_C(-2147483647L)-1) +/* Maximum for largest signed integral type. */ +# define INTMAX_MAX (__INT32_C(2147483647L)) + +/* Maximum for largest unsigned integral type. */ +# define UINTMAX_MAX (__UINT32_C(4294967295UL)) + + +/* Limits of other integer types. */ + +/* Limits of `ptrdiff_t' type. */ +#if defined (SDCC_mcs51) || defined (SDCC_ds390) +# define PTRDIFF_MIN (-2147483647L-1) +# define PTRDIFF_MAX (2147483647L) +#else +# define PTRDIFF_MIN (-32767-1) +# define PTRDIFF_MAX (32767) +#endif + +/* Limit of `size_t' type. */ +# define SIZE_MAX (65535) + +/* Signed. */ +# define INT8_C(c) c +# define INT16_C(c) c +# define INT32_C(c) c ## L + +/* Unsigned. */ +# define UINT8_C(c) c ## U +# define UINT16_C(c) c ## U +# define UINT32_C(c) c ## UL + +/* Maximal type. */ +# define INTMAX_C(c) c ## L +# define UINTMAX_C(c) c ## UL + + +#endif /* stdint.h */ diff --git a/device/include/stdio.h b/device/include/stdio.h new file mode 100644 index 0000000..3f24931 --- /dev/null +++ b/device/include/stdio.h @@ -0,0 +1,67 @@ +/*------------------------------------------------------------------------- + stdio.h - ANSI functions forward declarations + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef __SDC51_STDIO_H +#define __SDC51_STDIO_H 1 + +#include + +#ifdef __ds390 +#include +#endif + +#include + +#ifndef NULL + #define NULL (void *)0 +#endif + +#ifndef _SIZE_T_DEFINED +#define _SIZE_T_DEFINED + typedef unsigned int size_t; +#endif + +typedef void (*pfn_outputchar)(char c, void* p) _REENTRANT; + +extern int _print_format (pfn_outputchar pfn, void* pvoid, const char *format, va_list ap); + +/*-----------------------------------------------------------------------*/ + +extern void printf_small (char *,...) _REENTRANT; +extern int printf (const char *,...); +extern int vprintf (const char *, va_list); +extern int sprintf (char *, const char *, ...); +extern int vsprintf (char *, const char *, va_list); +extern int puts(const char *); +extern char *gets(char *); +extern char getchar(void); +extern void putchar(char); + +#if defined(SDCC_mcs51) && !defined(SDCC_USE_XSTACK) +extern void printf_fast(__code char *fmt, ...) _REENTRANT; +extern void printf_fast_f(__code char *fmt, ...) _REENTRANT; +extern void printf_tiny(__code char *fmt, ...) _REENTRANT; +#endif + +#endif /* __SDC51_STDIO_H */ diff --git a/device/include/stdlib.h b/device/include/stdlib.h new file mode 100644 index 0000000..1e3dbeb --- /dev/null +++ b/device/include/stdlib.h @@ -0,0 +1,51 @@ +/*------------------------------------------------------------------------- + stdlib.h - ANSI functions forward declarations + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef __SDC51_STDLIB_H +#define __SDC51_STDLIB_H 1 + +#ifndef NULL +# define NULL (void *)0 +#endif + +#include + +int abs(int j); +long int labs(long int j); + +extern float atof (char *); +extern int atoi (char *); +extern long atol (char *); + +extern void _uitoa(unsigned int, char*, unsigned char); +extern void _itoa(unsigned int, char*, unsigned char); + +extern void _ultoa(unsigned long, char*, unsigned char); +extern void _ltoa(unsigned long, char*, unsigned char); + +#define RAND_MAX 32767 + +int rand(void); +void srand(unsigned int seed); +#endif diff --git a/device/include/string.h b/device/include/string.h new file mode 100644 index 0000000..7b41c64 --- /dev/null +++ b/device/include/string.h @@ -0,0 +1,65 @@ +/*------------------------------------------------------------------------- + string.h - ANSI functions forward declarations + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + + +#ifndef __SDC51_STRING_H +#define __SDC51_STRING_H 1 + +#ifndef NULL +# define NULL (void *)0 +#endif + +#ifndef _SIZE_T_DEFINED +# define _SIZE_T_DEFINED + typedef unsigned int size_t; +#endif + +extern char *strcpy (char *, char *) ; +extern char *strncpy(char *, char *, size_t ) ; +extern char *strcat (char *, char *) ; +extern char *strncat(char *, char *, size_t ) ; +extern int strcmp (char *, char *) ; +extern int strncmp(char *, char *, size_t ) ; +extern char *strchr (char *, char ) ; +extern char *strrchr(char *, char ) ; +extern int strspn (char *, char *) ; +extern int strcspn(char *, char *) ; +extern char *strpbrk(char *, char *) ; +extern char *strstr (char *, char *) ; +extern int strlen (char * ) ; +extern char *strtok (char *, char *) ; +extern void *memcpy (void *, void *, size_t ) ; +extern int memcmp (void *, void *, size_t ) ; +extern void *memset (void *, unsigned char , size_t ) ; +extern void *memmove (void *, void *, size_t ) ; + +#ifdef SDCC_ds390 +extern void __xdata * memcpyx(void __xdata *, void __xdata *, int) __naked; +#endif + +#ifdef SDCC_z80 +#define memcpy(dst, src, n) __builtin_memcpy(dst, src, n) +#endif + +#endif diff --git a/device/include/time.h b/device/include/time.h new file mode 100644 index 0000000..c8e85bf --- /dev/null +++ b/device/include/time.h @@ -0,0 +1,47 @@ +#ifndef TIME_H +#define TIME_H + +#ifndef __TIME_UNSIGNED +#define __TIME_UNSIGNED 1 +#endif + +#if __TIME_UNSIGNED +struct tm +{ + unsigned char tm_sec; /* Seconds. [0-60] */ + unsigned char tm_min; /* Minutes. [0-59] */ + unsigned char tm_hour; /* Hours. [0-23] */ + unsigned char tm_mday; /* Day. [1-31] */ + unsigned char tm_mon; /* Month. [0-11] */ + int tm_year; /* Year since 1900 */ + unsigned char tm_wday; /* Day of week. [0-6] */ + int tm_yday; /* Days in year.[0-365] */ + unsigned char tm_isdst; /* Daylight saving time */ + unsigned char tm_hundredth; /* not standard 1/100th sec */ +}; +#else +struct tm +{ + int tm_sec; /* Seconds. [0-60] */ + int tm_min; /* Minutes. [0-59] */ + int tm_hour; /* Hours. [0-23] */ + int tm_mday; /* Day. [1-31] */ + int tm_mon; /* Month. [0-11] */ + int tm_year; /* Year since 1900 */ + int tm_wday; /* Day of week. [0-6] */ + int tm_yday; /* Days in year.[0-365] */ + int tm_isdst; /* Daylight saving time */ + char *tm_zone; /* Abbreviated timezone */ +}; +#endif + +typedef unsigned long time_t; + +time_t time(time_t *t); +struct tm *gmtime(time_t *timep); +struct tm *localtime(time_t *timep); +time_t mktime(struct tm *timeptr); +char *asctime(struct tm *timeptr); +char *ctime(time_t *timep); + +#endif /* TIME_H */ diff --git a/device/include/tinibios.h b/device/include/tinibios.h new file mode 100644 index 0000000..61da3ac --- /dev/null +++ b/device/include/tinibios.h @@ -0,0 +1,125 @@ +#ifndef TINIBIOS_H + +#define TINIBIOS_H + +#include +#include + +void Serial0Init (unsigned long baud, unsigned char buffered); +char Serial0GetChar(void); +void Serial0PutChar(char); +char Serial0CharArrived(void); +void Serial0Baud(unsigned long baud); +void Serial0SendBreak(void); +void Serial0Flush(void); + +void Serial0SwitchToBuffered(void); /* ds400 only. */ + +void Serial1Init (unsigned long baud, unsigned char buffered); +char Serial1GetChar(void); +void Serial1PutChar(char); +char Serial1CharArrived(void); +void Serial1Baud(unsigned long baud); +void Serial1SendBreak(void); +void Serial1Flush(void); + +unsigned long ClockTicks(); +void ClockMilliSecondsDelay(unsigned long ms); +void ClockMicroSecondsDelay(unsigned int us); + +#define SERIAL_0_BAUD 115200L +#define SERIAL_1_BAUD 9600L + +/* these need to be binary numbers */ +#define SERIAL_0_RECEIVE_BUFFER_SIZE 1024 +#define SERIAL_1_RECEIVE_BUFFER_SIZE 64 + +/* I know someone is fooling with the crystals */ +#if defined(SDCC_ds400) +# define OSCILLATOR 14745600L +#else +# define OSCILLATOR 18432000L +#endif + +/* Set the cpu speed in clocks per machine cycle, valid values are: + 1024: Divide-by-1024 (power management) mode (screws ALL timers and serial) + 4: Standard 8051 divide-by-4 mode + 2: Use 2x xtal multiplier + 1: Use 4x xtal multiplier (Don't do this with a TINI at 18.432MHz) +*/ +#define CPU_SPEED 2 +void CpuSpeed(unsigned int speed); + +/* The MOVX stretch cycles, see datasheet */ +#define CPU_MOVX_STRETCH 0x01 + +/* from rtc390.c */ +#define HAVE_RTC +unsigned char RtcRead(struct tm *rtcDate); +void RtcWrite(struct tm *rtcDate); + +/* from lcd390.c */ +extern void LcdInit(void); +extern void LcdOn(void); +extern void LcdOff(void); +extern void LcdClear(void); +extern void LcdHome(void); +extern void LcdGoto(unsigned int collumnRow); +extern void LcdPutChar(char c); +extern void LcdPutString(char *string); +extern void LcdLPutString(unsigned int collumnRow, char *string); +extern void LcdPrintf(const char *format, ...) __reentrant; +extern void LcdLPrintf(unsigned int collumnRow, const char *format, ...) __reentrant; + +/* from i2c390.c */ +#define I2C_BUFSIZE 128 +extern char I2CReset(void); +extern char I2CStart(void); +extern char I2CStop(void); +extern char I2CSendStop(char addr, char count, + char send_stop); +extern char I2CReceive(char addr, char count); +extern char I2CSendReceive(char addr, char tx_count, + char rx_count); +/*extern char I2CByteOut(char);*/ +/*extern void I2CDumpError(char);*/ + +/* global transfer buffers */ +extern char i2cTransmitBuffer[I2C_BUFSIZE]; +extern char i2cReceiveBuffer[I2C_BUFSIZE]; + +/* Macro for normal send transfer ending with a stop condition */ +#define I2CSend(addr, count) I2CSendStop(addr, count, 1) + + +/* internal functions used by tinibios.c */ +unsigned char _sdcc_external_startup(void); +void Serial0IrqHandler (void) __interrupt 4; +void Serial1IrqHandler (void) __interrupt 7; + +#if !defined(SDCC_ds400) +void ClockInit(); +void ClockIrqHandler (void) __interrupt 1 __naked; +#endif + +#if defined(SDCC_ds400) +/* functions for dealing with the ds400 ROM firmware. */ + +/* A wrapper which calls rom_init allocating all available RAM in CE0 + to the heap, sets the serial port to SERIAL_0_BAUD, sets up the + millisecond timer, and diddles the clock multiplier. */ + +/* Values for the romInit "speed" parameter. */ +#define SPEED_1X 0 /* no clock multiplier, normal speed. */ +#define SPEED_2X 1 /* 2x clock multiplier. */ +#define SPEED_4X 2 /* 4x clock, DOESN'T WORK ON TINIm400! */ + +unsigned char romInit(unsigned char noisy, + char speed); + +/* Install an interrupt handler. */ +void installInterrupt(void (*isrPtr)(void), unsigned char offset); +#endif + + +#endif /* TINIBIOS_H */ diff --git a/device/include/typeof.h b/device/include/typeof.h new file mode 100644 index 0000000..8b0d0c9 --- /dev/null +++ b/device/include/typeof.h @@ -0,0 +1,50 @@ +/*------------------------------------------------------------------------- + typeof.h - Contains enumerations of values returned by __typeof + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (2001) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef __SDC51_TYPEOF_H +#define __SDC51_TYPEOF_H 1 + +#define TYPEOF_INT 1 +#define TYPEOF_SHORT 2 +#define TYPEOF_CHAR 3 +#define TYPEOF_LONG 4 +#define TYPEOF_FLOAT 5 +#define TYPEOF_FIXED16X16 6 +#define TYPEOF_BIT 7 +#define TYPEOF_BITFIELD 8 +#define TYPEOF_SBIT 9 +#define TYPEOF_SFR 10 +#define TYPEOF_VOID 11 +#define TYPEOF_STRUCT 12 +#define TYPEOF_ARRAY 13 +#define TYPEOF_FUNCTION 14 +#define TYPEOF_POINTER 15 +#define TYPEOF_FPOINTER 16 +#define TYPEOF_CPOINTER 17 +#define TYPEOF_GPOINTER 18 +#define TYPEOF_PPOINTER 19 +#define TYPEOF_IPOINTER 20 +#define TYPEOF_EEPPOINTER 21 + +#endif diff --git a/device/include/z180.h b/device/include/z180.h new file mode 100644 index 0000000..0079b43 --- /dev/null +++ b/device/include/z180.h @@ -0,0 +1,106 @@ +#if !defined( __Z180_H__ ) + #define __Z180_H__ +/* + *--------------------------------------------------------------------------- + * + * FILE : Z180.H + * + * PURPOSE: definitions on the built in I/O ports for the Z180/HD64180 + * for use with SDCC + * + * Makes use of the newly included Z80 I/O support in SDCC + * + * AUTHOR : Peter Townson 2003 + * + *--------------------------------------------------------------------------- + */ +#if !defined( Z180_IO_BASE ) + #define Z180_IO_BASE 0 /* zero is the Reset default */ +#endif + +/* will want this to be the case by default (I think) */ +#pragma portmode z180 + +static void _ENABLE_Z180_ASSEMBLER_(void) __naked { __asm .hd64 __endasm; } + +/* + *--------------------------------------------------------------------------- + * Z180/HD64180 internal port addresses + */ +__sfr __at (Z180_IO_BASE+0x00) CNTLA0; /* ASCI control register A channel 0 */ +__sfr __at (Z180_IO_BASE+0x01) CNTLA1; /* ASCI control register A channel 1 */ +__sfr __at (Z180_IO_BASE+0x02) CNTLB0; /* ASCI control register B channel 0 */ +__sfr __at (Z180_IO_BASE+0x03) CNTLB1; /* ASCI control register B channel 0 */ +__sfr __at (Z180_IO_BASE+0x04) STAT0 ; /* ASCI status register channel 0 */ +__sfr __at (Z180_IO_BASE+0x05) STAT1 ; /* ASCI status register channel 1 */ +__sfr __at (Z180_IO_BASE+0x06) TDR0 ; /* ASCI transmit data reg, channel 0 */ +__sfr __at (Z180_IO_BASE+0x07) TDR1 ; /* ASCI transmit data reg, channel 1 */ +__sfr __at (Z180_IO_BASE+0x08) RDR0 ; /* ASCI receive data reg, channel 0 */ +__sfr __at (Z180_IO_BASE+0x09) RDR1 ; /* ASCI receive data reg, channel 0 */ +__sfr __at (Z180_IO_BASE+0x0A) CNTR ; /* CSI/0 control register */ +__sfr __at (Z180_IO_BASE+0x0B) TRDR ; /* CSI/0 transmit/receive data reg */ + +__sfr __at (Z180_IO_BASE+0x0C) TMDR0L; /* Timer data register, channel 0L */ +__sfr __at (Z180_IO_BASE+0x0D) TMDR0H; /* Timer data register, channel 0H */ +__sfr __at (Z180_IO_BASE+0x0E) RLDR0L; /* Timer reload register, channel 0L */ +__sfr __at (Z180_IO_BASE+0x0F) RLDR0H; /* Timer reload register, channel 0H */ +__sfr __at (Z180_IO_BASE+0x10) TCR ; /* Timer control register */ +__sfr __at (Z180_IO_BASE+0x14) TMDR1L; /* Timer data register, channel 1L */ +__sfr __at (Z180_IO_BASE+0x15) TMDR1H; /* Timer data register, channel 1H */ +__sfr __at (Z180_IO_BASE+0x16) RLDR1L; /* Timer reload register, channel 1L */ +__sfr __at (Z180_IO_BASE+0x17) RLDR1H; /* Timer reload register, channel 1H */ +__sfr __at (Z180_IO_BASE+0x18) FRC ; /* Timer Free running counter */ + +__sfr __at (Z180_IO_BASE+0x20) SAR0L ; /* DMA source address reg, channel 0L */ +__sfr __at (Z180_IO_BASE+0x21) SAR0H ; /* DMA source address reg, channel 0H */ +__sfr __at (Z180_IO_BASE+0x22) SAR0B ; /* DMA source address reg, channel 0B */ +__sfr __at (Z180_IO_BASE+0x23) DAR0L ; /* DMA dest address reg, channel 0L */ +__sfr __at (Z180_IO_BASE+0x24) DAR0H ; /* DMA dest address reg, channel 0H */ +__sfr __at (Z180_IO_BASE+0x25) DAR0B ; /* DMA dest address reg, channel 0B */ +__sfr __at (Z180_IO_BASE+0x26) BCR0L ; /* DMA byte count reg, channel 0L */ +__sfr __at (Z180_IO_BASE+0x27) BCR0H ; /* DMA byte count reg, channel 0H */ +__sfr __at (Z180_IO_BASE+0x28) MAR1L ; /* DMA memory address reg, channel 1L */ +__sfr __at (Z180_IO_BASE+0x29) MAR1H ; /* DMA memory address reg, channel 1H */ +__sfr __at (Z180_IO_BASE+0x2A) MAR1B ; /* DMA memory address reg, channel 1B */ +__sfr __at (Z180_IO_BASE+0x2B) IAR1L ; /* DMA I/O address reg, channel 1L */ +__sfr __at (Z180_IO_BASE+0x2C) IAR1H ; /* DMA I/O address reg, channel 1H */ +__sfr __at (Z180_IO_BASE+0x2E) BCR1L ; /* DMA byte count reg, channel 1L */ +__sfr __at (Z180_IO_BASE+0x2F) BCR1H ; /* DMA byte count reg, channel 1H */ +__sfr __at (Z180_IO_BASE+0x30) DSTAT ; /* DMA status register */ +__sfr __at (Z180_IO_BASE+0x31) DMODE ; /* DMA mode register */ +__sfr __at (Z180_IO_BASE+0x32) DCNTL ; /* DMA/WAIT control register */ + +__sfr __at (Z180_IO_BASE+0x33) IL ; /* Interrupt vector low register */ +__sfr __at (Z180_IO_BASE+0x34) ITC ; /* INT/TRAP control register */ + +__sfr __at (Z180_IO_BASE+0x36) RCR ; /* Refresh control register */ + +__sfr __at (Z180_IO_BASE+0x38) CBR ; /* MMU common base register */ +__sfr __at (Z180_IO_BASE+0x39) BBR ; /* MMU bank base register */ +__sfr __at (Z180_IO_BASE+0x3A) CBAR ; /* MMU common/bank area register */ + +__sfr __at (Z180_IO_BASE+0x3E) OMCR ; /* Operation mode control register */ + +__sfr __at 0x3F ICR ; /* I/O base control register - does not move */ + +/* + *--------------------------------------------------------------------------- + * Interrupt vectors (offsets) for Z180/HD64180 internal interrupts + */ +#define INT1_VECTOR 0x00 /* external /INT1 */ +#define INT2_VECTOR 0x02 /* external /INT2 */ +#define PRT0_VECTOR 0x04 /* PRT channel 0 */ +#define PRT1_VECTOR 0x06 /* PRT channel 1 */ +#define DMA0_VECTOR 0x08 /* DMA channel 0 */ /* ???? */ +#define DMA1_VECTOR 0x0A /* DMA Channel 1 */ +#define CSIO_VECTOR 0x0C /* Clocked serial I/O */ +#define ASCI0_VECTOR 0x0E /* Async channel 0 */ +#define ASCI1_VECTOR 0x10 /* Async channel 1 */ +#define INCAP_VECTOR 0x12 /* input capture */ +#define OUTCMP_VECTOR 0x14 /* output compare */ +#define TIMOV_VECTOR 0x16 /* timer overflow */ +/* + *--------------------------------------------------------------------------- + */ +#endif /* __Z180_H__ */ + diff --git a/device/include/z80/README b/device/include/z80/README new file mode 100644 index 0000000..460ed2d --- /dev/null +++ b/device/include/z80/README @@ -0,0 +1,2 @@ +sdcc/device/lib/z80 +--------------------- diff --git a/device/include/z80/types.h b/device/include/z80/types.h new file mode 100644 index 0000000..cf95608 --- /dev/null +++ b/device/include/z80/types.h @@ -0,0 +1,11 @@ +/** Silly types.h + Z80 specific hack +*/ + +#ifndef TYPES_INCLUDE +#define TYPES_INCLUDE + +typedef unsigned char BYTE; +typedef unsigned WORD; + +#endif diff --git a/device/lib/Makefile.in b/device/lib/Makefile.in new file mode 100644 index 0000000..70b3a6d --- /dev/null +++ b/device/lib/Makefile.in @@ -0,0 +1,476 @@ +# +# +# + +VERSION = @VERSION@ +VERSIONHI = @VERSIONHI@ +VERSIONLO = @VERSIONLO@ +VERSIONP = @VERSIONP@ + +SHELL = /bin/sh +CPP = @CPP@ +INSTALL = @INSTALL@ +CP = @CP@ + +LIB_TYPE = @LIB_TYPE@ + +ifeq ($(shell uname -s),Linux) +CP_U = $(CP) -u +else +CP_U = $(CP) +endif + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ +VPATH = @srcdir@ +srcdir = @srcdir@ +INCDIR = $(top_srcdir)/device/include +ifndef PORTINCDIR +PORTINCDIR = $(INCDIR)/mcs51 +endif + +CC = $(top_builddir)/bin/sdcc +CPP = $(top_builddir)/bin/sdcpp + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @infodir@ + +lib_dir_suffix = @lib_dir_suffix@ + +sdcc_libdir = $(DESTDIR)$(datadir)/$(lib_dir_suffix) + +CPPFLAGS = -I$(INCDIR) -I$(PORTINCDIR) +CFLAGS = $(MODELFLAGS) --nostdinc --std-c99 + +BUILDDIR = build +# Default +PORT = z80 +ifndef PORTDIR +PORTDIR = $(abspath $(BUILDDIR)/$(PORT)) +endif + +OPT_DISABLE_AVR = @OPT_DISABLE_AVR@ +OPT_DISABLE_DS390 = @OPT_DISABLE_DS390@ +OPT_DISABLE_DS400 = @OPT_DISABLE_DS400@ +OPT_DISABLE_GBZ80 = @OPT_DISABLE_GBZ80@ +OPT_DISABLE_HC08 = @OPT_DISABLE_HC08@ +OPT_DISABLE_MCS51 = @OPT_DISABLE_MCS51@ +OPT_DISABLE_PIC = @OPT_DISABLE_PIC@ +OPT_DISABLE_PIC16 = @OPT_DISABLE_PIC16@ +OPT_DISABLE_XA51 = @OPT_DISABLE_XA51@ +OPT_DISABLE_Z80 = @OPT_DISABLE_Z80@ + +SOURCES_FLOAT = $(COMMON_FLOAT) \ + _fscmp.c \ + _fsget1arg.c \ + _fsget2args.c \ + _fsnormalize.c \ + _fsreturnval.c \ + _fsrshift.c \ + _fsswapargs.c \ + _logexpf.c + +SOURCES_INT = $(COMMON_INT) \ + _divsint.c \ + _divuint.c \ + _modsint.c \ + _moduint.c \ + _mulint.c + +SOURCES_LONG = $(COMMON_LONG) \ + _divulong.c \ + _mullong.c + +SOURCES_SDCC = $(COMMON_SDCC) \ + _autobaud.c \ + _bp.c \ + _decdptr.c \ + _gptrget.c \ + _gptrgetc.c \ + _gptrput.c \ + _ser.c \ + _setjmp.c \ + serial.c \ + _itoa.c \ + _ltoa.c \ + _spx.c \ + _startup.c \ + _strlen.c \ + _memmove.c \ + _heap.c \ + sprintf.c \ + vprintf.c \ + printf_fast.c \ + printf_fast_f.c \ + printf_tiny.c \ + printfl.c \ + bpx.c + +SOURCES = $(SOURCES_FLOAT) $(SOURCES_INT) $(SOURCES_LONG) $(SOURCES_SDCC) + +OBJECTS_FLOAT = $(SOURCES_FLOAT:%.c=$(PORT)/%.rel) +OBJECTS_INT = $(SOURCES_INT:%.c=$(PORT)/%.rel) +OBJECTS_LONG = $(SOURCES_LONG:%.c=$(PORT)/%.rel) +OBJECTS_SDCC = $(SOURCES_SDCC:%.c=$(PORT)/%.rel) + +OBJECTS = $(OBJECTS_FLOAT) $(OBJECTS_INT) $(OBJECTS_LONG) $(OBJECTS_SDCC) + +XA51_FLOAT = $(COMMON_FLOAT) + +XA51_INT = $(COMMON_INT) \ + _divsint.c \ + _divuint.c \ + _modsint.c \ + _moduint.c \ + _mulint.c + +XA51_LONG = $(COMMON_LONG) \ + _divulong.c \ + _mullong.c + +XA51_SDCC = $(COMMON_SDCC) \ + _memmove.c \ + _strlen.c \ + _heap.c + +XA51SOURCES = $(XA51_FLOAT) $(XA51_INT) $(XA51_LONG) $(XA51_SDCC) +XA51OBJECTS = $(XA51SOURCES:%.c=$(PORT)/%.rel) + +ifeq ($(LIB_TYPE), SDCCLIB) +LIB_FILES = $(PORTDIR)/libfloat.lib $(PORTDIR)/libint.lib $(PORTDIR)/liblong.lib $(PORTDIR)/libsdcc.lib +else ifeq ($(LIB_TYPE), AR) +LIB_FILES = $(PORTDIR)/libfloat.lib $(PORTDIR)/libint.lib $(PORTDIR)/liblong.lib $(PORTDIR)/libsdcc.lib +else ifeq ($(LIB_TYPE), RANLIB) +LIB_FILES = $(PORTDIR)/libfloat.lib $(PORTDIR)/libint.lib $(PORTDIR)/liblong.lib $(PORTDIR)/libsdcc.lib +else +LIB_FILES = $(OBJECTS_FLOAT) $(OBJECTS_INT) $(OBJECTS_LONG) $(OBJECTS_SDCC) $(PORTDIR)/libfloat.lib $(PORTDIR)/libint.lib $(PORTDIR)/liblong.lib $(PORTDIR)/libsdcc.lib +endif + +OEXT = .rel + +include $(srcdir)/incl.mk + +ifeq ($(OPT_DISABLE_DS390), 0) +TARGETS += model-ds390 +endif + +ifeq ($(OPT_DISABLE_DS400), 0) +TARGETS += model-ds400 +endif + +ifeq ($(OPT_DISABLE_HC08), 0) +TARGETS += model-hc08 +endif + +ifeq ($(OPT_DISABLE_MCS51), 0) +TARGETS += models small-mcs51-stack-auto +endif + +ifeq ($(OPT_DISABLE_PIC), 0) +TARGETS += model-pic14 +endif + +ifeq ($(OPT_DISABLE_PIC16), 0) +TARGETS += model-pic16 +endif + +ifeq ($(OPT_DISABLE_Z80), 0) +TARGETS += model-z80 +endif + +ifeq ($(OPT_DISABLE_GBZ80), 0) +TARGETS += model-gbz80 +endif + +# Compiling entire program or any subproject +# ------------------------------------------ +all: + $(MAKE) checkconf + $(MAKE) $(TARGETS) + +objects: + $(MAKE) build-dir + $(MAKE) $(OBJECTS) + $(MAKE) port-specific-objects + $(MAKE) $(LIB_FILES) + $(MAKE) clean_intermediate + +models: + if grep '^mcs51\>' $(top_builddir)/ports.build > /dev/null; then \ + for model in $(MODELS); do \ + $(MAKE) MODELFLAGS="--model-$$model" PORT=$$model PORTINCDIR=$(INCDIR)/mcs51 objects; \ + done \ + fi + +small-mcs51-stack-auto: + if grep '^mcs51\>' $(top_builddir)/ports.build > /dev/null; then \ + mkdir -p small-stack-auto; cp small/Makefile small-stack-auto; \ + $(MAKE) MODELFLAGS="--model-small --stack-auto" PORT=small-stack-auto PORTDIR=$(abspath $(BUILDDIR)/small-stack-auto) PORTINCDIR=$(INCDIR)/mcs51 objects; \ + fi + +model-mcs51-stack-auto: + if grep '^mcs51\>' $(top_builddir)/ports.build > /dev/null; then \ + for model in $(MODELS); do \ + mkdir -p $${model}-stack-auto; cp $${model}/Makefile $${model}-stack-auto; \ + $(MAKE) MODELFLAGS="--model-$$model --stack-auto" PORT=$${model}-stack-auto PORTDIR=$(abspath $(BUILDDIR)/$${model}-stack-auto) PORTINCDIR=$(INCDIR)/mcs51 objects; \ + done \ + fi + +model-mcs51-xstack-auto: + if grep '^mcs51\>' $(top_builddir)/ports.build > /dev/null; then \ + for model in $(MODELS); do \ + mkdir -p $${model}-xstack-auto; cp $${model}/Makefile $${model}-xstack-auto; \ + $(MAKE) MODELFLAGS="--model-$$model --stack-auto --xstack -DUSE_FLOATS=1" PORT=$${model}-xstack-auto PORTDIR=$(abspath $(BUILDDIR)/$${model}-xstack-auto) PORTINCDIR=$(INCDIR)/mcs51 objects; \ + done \ + fi + +model-ds390: + if grep '^ds390\>' $(top_builddir)/ports.build > /dev/null; then \ + $(MAKE) MODELFLAGS="-mds390" PORT=ds390 PORTINCDIR=$(INCDIR)/mcs51 objects; \ + fi + +model-ds400: + if grep '^ds400\>' $(top_builddir)/ports.build > /dev/null; then \ + $(MAKE) MODELFLAGS="-mds400" PORT=ds400 PORTINCDIR=$(INCDIR)/mcs51 objects; \ + fi + +model-xa51: + if grep '^xa51\>' $(top_builddir)/ports.build > /dev/null; then \ + $(MAKE) MODELFLAGS="-mxa51" PORT=xa51 objects-xa51; \ + fi + +objects-xa51: + $(MAKE) build-dir + $(MAKE) $(XA51OBJECTS) + $(MAKE) port-specific-objects + +$(PORTDIR)/lib$(PORT).lib: $(XA51OBJECTS) +ifeq ($(LIB_TYPE), SDCCLIB) + ../../bin/sdcclib -a $(PORTDIR)/lib$(PORT).lib $(XA51OBJECTS) +else ifeq ($(LIB_TYPE), AR) + ar -Sq $(PORTDIR)/lib$(PORT).lib $(XA51OBJECTS) +else ifeq ($(LIB_TYPE), RANLIB) + ar -Sq $(PORTDIR)/lib$(PORT).lib $(XA51OBJECTS) + $(top_builddir)/bin/asranlib $(PORTDIR)/lib$(PORT).lib +else + rm -f $(PORTDIR)/lib$(PORT).lib + for i in $(notdir $(basename $(XA51OBJECTS))); do echo $$i >> $(PORTDIR)/lib$(PORT).lib; done + cp $(XA51OBJECTS) $(PORTDIR) +endif + +model-z80: + if grep '^z80\>' $(top_builddir)/ports.build > /dev/null; then \ + $(MAKE) MODELFLAGS="-mz80" PORT=z80 objects-z80 OEXT=.o; \ + fi + +model-gbz80: + if grep '^z80\>' $(top_builddir)/ports.build > /dev/null; then \ + $(MAKE) MODELFLAGS="-mgbz80" PORT=gbz80 objects-z80 OEXT=.o; \ + fi + +objects-z80: + $(MAKE) build-dir + $(MAKE) port-specific-objects + $(MAKE) clean_intermediate + +model-hc08: + if grep '^hc08\>' $(top_builddir)/ports.build > /dev/null; then \ + $(MAKE) MODELFLAGS="-mhc08" PORT=hc08 objects-hc08; \ + fi + +objects-hc08: + $(MAKE) build-dir + $(MAKE) port-specific-objects + $(MAKE) clean_intermediate + +model-pic16: + if grep '^pic16\>' $(top_builddir)/ports.build > /dev/null; then \ + $(MAKE) PORT=pic16 objects-pic16; \ + fi + +objects-pic16: + $(MAKE) build-dir + $(MAKE) port-specific-objects-pic16 + $(MAKE) clean_intermediate-pic16 + +model-pic14: + if grep '^pic\>' $(top_builddir)/ports.build > /dev/null; then \ + $(MAKE) PORT=pic objects-pic14; \ + fi + +objects-pic14: + $(MAKE) build-dir + $(MAKE) port-specific-objects-pic14 + $(MAKE) clean_intermediate-pic14 + +build-dir: + $(MAKE) $(PORTDIR) + $(MAKE) $(PORT) + +$(PORTDIR): + mkdir -p $(PORTDIR) + +$(PORT): + mkdir -p $(PORT) + +port-specific-objects: +ifneq ($(LIB_TYPE), LIB) + -if [ -f $(PORT)/Makefile ]; then \ + $(MAKE) -C $(PORT) PORT=$(PORT); \ + fi +else + -if [ -f $(PORT)/Makefile ]; then \ + $(MAKE) -C $(PORT) PORT=$(PORT); \ + fi +endif + +port-specific-objects-pic16: + -if [ -f $(PORT)/Makefile ]; then \ + $(MAKE) -C $(PORT); \ + for i in $(PORT)/*/lib*.a; do cp -f $$i $(PORTDIR)/$$(basename $$i .a).lib; done; \ + cp -f $(PORT)/*/crt0*.o $(PORTDIR); \ + fi + +port-specific-objects-pic14: + -if [ -f $(PORT)/Makefile ]; then \ + mkdir -p $(PORT)/bin; \ + $(MAKE) -C $(PORT); \ + cp -f $(PORT)/bin/*.* $(PORTDIR); \ + fi + +$(LIB_FILES): $(OBJECTS_FLOAT) $(OBJECTS_INT) $(OBJECTS_LONG) $(OBJECTS_SDCC) +ifeq ($(LIB_TYPE), SDCCLIB) + ../../bin/sdcclib -a $(PORTDIR)/libfloat.lib $(OBJECTS_FLOAT) + ../../bin/sdcclib -a $(PORTDIR)/libint.lib $(OBJECTS_INT) + ../../bin/sdcclib -a $(PORTDIR)/liblong.lib $(OBJECTS_LONG) + ../../bin/sdcclib -a $(PORTDIR)/libsdcc.lib $(OBJECTS_SDCC) +else ifeq ($(LIB_TYPE), AR) + ar -Scq $(PORTDIR)/libfloat.lib $(OBJECTS_FLOAT) + ar -Scq $(PORTDIR)/libint.lib $(OBJECTS_INT) + ar -Scq $(PORTDIR)/liblong.lib $(OBJECTS_LONG) + ar -Scq $(PORTDIR)/libsdcc.lib $(OBJECTS_SDCC) +else ifeq ($(LIB_TYPE), RANLIB) + ar -Scq $(PORTDIR)/libfloat.lib $(OBJECTS_FLOAT); $(top_builddir)/bin/asranlib $(PORTDIR)/libfloat.lib + ar -Scq $(PORTDIR)/libint.lib $(OBJECTS_INT); $(top_builddir)/bin/asranlib $(PORTDIR)/libint.lib + ar -Scq $(PORTDIR)/liblong.lib $(OBJECTS_LONG); $(top_builddir)/bin/asranlib $(PORTDIR)/liblong.lib + ar -Scq $(PORTDIR)/libsdcc.lib $(OBJECTS_SDCC); $(top_builddir)/bin/asranlib $(PORTDIR)/libsdcc.lib +else + rm -f $(PORTDIR)/libfloat.lib + for i in $(notdir $(basename $(OBJECTS_FLOAT))); do echo $$i >> $(PORTDIR)/libfloat.lib; done + cp $(OBJECTS_FLOAT) $(PORTDIR) + rm -f $(PORTDIR)/libint.lib + for i in $(notdir $(basename $(OBJECTS_INT))); do echo $$i >> $(PORTDIR)/libint.lib; done + cp $(OBJECTS_INT) $(PORTDIR) + rm -f $(PORTDIR)/liblong.lib + for i in $(notdir $(basename $(OBJECTS_LONG))); do echo $$i >> $(PORTDIR)/liblong.lib; done + cp $(OBJECTS_LONG) $(PORTDIR) + rm -f $(PORTDIR)/libsdcc.lib + for i in $(notdir $(basename $(OBJECTS_SDCC))); do echo $$i >> $(PORTDIR)/libsdcc.lib; done + cp $(OBJECTS_SDCC) $(PORTDIR) +endif + +clean_intermediate: + rm -f $(PORTDIR)/*.lst $(PORTDIR)/*.sym + +clean_intermediate-pic16: + $(MAKE) -C $(PORT) clean-intermediate + +clean_intermediate-pic14: + $(MAKE) -C $(PORT) clean-intermediate + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: all installdirs + $(CP_U) -r $(BUILDDIR)/* $(sdcc_libdir) + $(CP_U) -r $(MODELS) $(srcdir)/mcs51 $(srcdir)/ds390 $(srcdir)/ds400 \ + $(srcdir)/gbz80 $(srcdir)/z80 $(srcdir)/hc08 \ + $(srcdir)/pic $(srcdir)/pic16 $(srcdir)/*.c $(sdcc_libdir)/src + $(CP_U) -r $(MODELS) mcs51 ds390 ds400 gbz80 z80 hc08 $(sdcc_libdir)/src + + for src in $(MODELS) ds390 ds400 gbz80 z80 hc08 pic pic16; do \ + find $(sdcc_libdir)/src/$$src -depth \ + \( -name '*.rel' -o -name '*.dump*' -o -name '*.sym' -o -name '*.o' -o -name '*.lib' -o \ + -name '*.lst' -o -name '*.asm' -o -name '.svn' -o -name 'autom4te.cache' -o \ + -name 'build' -o -name 'bin' -o -name 'Makefile*' -o -name 'config*' -o \ + -name 'depcomp' -o -name 'missing' -o -name 'install-sh' -o \ + -name 'bootstrap.sh' \) \ + -exec rm -rf {} + ; \ + done + find $(sdcc_libdir)/src/mcs51 -depth \ + \( -name '*.rel' -o -name '*.dump*' -o -name '*.sym' -o -name '*.o' -o -name '*.lib' -o \ + -name '*.lst' -o -name '.svn' -o -name 'build' -o -name 'bin' -o \ + -name 'Makefile*' \) \ + -exec rm -rf {} + + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -rf $(sdcc_libdir) + +# Performing self-test +# -------------------- +check: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + [ -d $(sdcc_libdir) ] || mkdir -p $(sdcc_libdir) + for model in $(MODELS); do \ + [ -d $(sdcc_libdir)/$$model ] || \ + mkdir -p $(sdcc_libdir)/$$model; \ + done + for libdir in small-stack-auto ds390 ds400 hc08 pic16 pic; do \ + [ -d $(sdcc_libdir)/$$libdir ] || mkdir -p $(sdcc_libdir)/$$libdir; \ + done + mkdir -p $(sdcc_libdir)/src + +# Creating dependencies +# --------------------- +dep: Makefile.dep + +Makefile.dep: $(SOURCES) $(INCDIR)/*.h $(PORTINCDIR)/*.h + rm -f Makefile.dep + for i in $(filter %.c,$^); do \ + $(CPP) -std=c99 -M $(CPPFLAGS) $$i >$${i}.dep; \ + cat $${i}.dep >>Makefile.dep; \ + rm $${i}.dep; \ + done + +ifeq "$(findstring $(MAKECMDGOALS),uninstall check installcheck installdirs checkconf \ + clean distclean mostlyclean realclean)" "" + -include Makefile.dep +endif +include $(srcdir)/clean.mk + +# My rules +# -------- + +.SUFFIXES: .rel .o + +$(PORT)/%$(OEXT): %.c + $(CC) $(CPPFLAGS) $(CFLAGS) -c $< -o $@ + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f $(srcdir)/conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" \ + freshconf;\ + fi + +# End of main_in.mk/main.mk diff --git a/device/lib/_atof.c b/device/lib/_atof.c new file mode 100644 index 0000000..0b897cb --- /dev/null +++ b/device/lib/_atof.c @@ -0,0 +1,85 @@ +/* atof.c: converts an ASCII string to float + + Copyright (C) 2003 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +#include +#include +#include + +float atof(char * s) +{ + float value, fraction; + char iexp; + BOOL sign; + + //Skip leading blanks + while (isspace(*s)) s++; + + //Get the sign + if (*s == '-') + { + sign=1; + s++; + } + else + { + sign=0; + if (*s == '+') s++; + } + + //Get the integer part + for (value=0.0; isdigit(*s); s++) + { + value=10.0*value+(*s-'0'); + } + + //Get the fraction + if (*s == '.') + { + s++; + for (fraction=0.1; isdigit(*s); s++) + { + value+=(*s-'0')*fraction; + fraction*=0.1; + } + } + + //Finally, the exponent (not very efficient, but enough for now*/ + if (toupper(*s)=='E') + { + s++; + iexp=(char)atoi(s); + { + while(iexp!=0) + { + if(iexp<0) + { + value*=0.1; + iexp++; + } + else + { + value*=10.0; + iexp--; + } + } + } + } + + if(sign) value*=-1.0; + return (value); +} diff --git a/device/lib/_atoi.c b/device/lib/_atoi.c new file mode 100644 index 0000000..334cf11 --- /dev/null +++ b/device/lib/_atoi.c @@ -0,0 +1,49 @@ +/*--------------------------------------------------------------------- + atoi - convert a string to an integer and return it + + written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +int atoi(char * s) +{ + register int rv=0; + register char sign = 0; + + /* skip till we find either a digit or '+' or '-' */ + while (*s) { + if (*s <= '9' && *s >= '0') + break; + if (*s == '-' || *s == '+') + break; + s++; + } + + sign = (*s == '-'); + if (*s == '-' || *s == '+') s++; + + while (*s && *s >= '0' && *s <= '9') { + rv = (rv * 10) + (*s - '0'); + s++; + } + + return (sign ? -rv : rv); +} + diff --git a/device/lib/_atol.c b/device/lib/_atol.c new file mode 100644 index 0000000..794f899 --- /dev/null +++ b/device/lib/_atol.c @@ -0,0 +1,49 @@ +/*--------------------------------------------------------------------- + atol - convert a string to long integer and return it + + written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +long atol(char * s) +{ + register long rv=0; + register char sign = 0; + + /* skip till we find either a digit or '+' or '-' */ + while (*s) { + if (*s <= '9' && *s >= '0') + break; + if (*s == '-' || *s == '+') + break; + s++; + } + + sign = (*s == '-'); + if (*s == '-' || *s == '+') s++; + + while (*s && *s >= '0' && *s <= '9') { + rv = (rv * 10) + (*s - '0'); + s++; + } + + return (sign ? -rv : rv); +} + diff --git a/device/lib/_autobaud.c b/device/lib/_autobaud.c new file mode 100644 index 0000000..9bda970 --- /dev/null +++ b/device/lib/_autobaud.c @@ -0,0 +1,97 @@ +/*------------------------------------------------------------------------- + + _autobaud.c - automatic baud rate detection routine. Adapted for + sdcc compiler from Paul Stoffregen's autobaud.asm + the original assembly code can be found at + http://www.ece.orst.edu/~paul/8051-goodies/autobaud.html + + written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + -------------------------------------------------------------------------*/ +#include <8051.h> +/* +; To set the baud rate, use this formula or use autobaud() +; baud_const = 256 - (crystal / (12 * 16 * baud)) */ + +/* +;to do automatic baud rate detection, we assume the user will +;press the carriage return, which will cause this bit pattern +;to appear on port 3 pin 0 (CR = ascii code 13, assume 8N1 format) +; +; 0 1 0 1 1 0 0 0 0 1 +; | | | | +; start bit----+ +--lsb msb--+ +----stop bit +; +;we'll start timer #1 in 16 bit mode at the transition between the +;start bit and the LSB and stop it between the MBS and stop bit. +;That will give approx the number of cpu cycles for 8 bits. Divide +;by 8 for one bit and by 16 since the built-in UART takes 16 timer +;overflows for each bit. We need to be careful about roundoff during +;division and the result has to be inverted since timer #1 counts up. Of +;course, timer #1 gets used in 8-bit auto reload mode for generating the +;built-in UART's baud rate once we know what the reload value should be. +*/ + +void autobaud () +{ + + /* get timer #1 ready for action (16 bit mode) */ + TMOD=0x11; + TCON = 0; + TH1 = TL1 = 0; + + /* wait for start bit */ +autobaud2: + while(RXD) ; + + /* check it a few more times to make + sure we don't trigger on some noise*/ + if (RXD) goto autobaud2; + if (RXD) goto autobaud2; + if (RXD) goto autobaud2; + if (RXD) goto autobaud2; + + /* wait for bit #0 to begin */ + while (!RXD); + TR1 = 1; /* start the timer */ + while (RXD); // wait for bit #1 to begin + while(!RXD); // wait for bit #2 to begin + while(RXD); // wait for bit #4 to begin + while (!RXD); // wait for stop bit to begin + TR1 = 0; // stop timing + + /* ;grab bit 7... it's the lsb we want */ + TH1 = (TH1 << 1) | (TL1 >> 7); + + /* round off if necessary */ + TH1 = (TH1 << 1) | ((TL1 >> 6) & 0x01); + + /* invert since timer #1 will count up */ + TH1 = ~TH1; + + /* now TH1 has the correct reload value (I hope) */ + TH1++ ; + + TL1 = TH1; + TMOD = 0x21 ; // set timer #1 for 8 bit auto-reload + PCON = 0x80 ; // configure built-in uart + SCON = 0x52 ; +} + diff --git a/device/lib/_bp.c b/device/lib/_bp.c new file mode 100644 index 0000000..a57b99b --- /dev/null +++ b/device/lib/_bp.c @@ -0,0 +1,26 @@ +/*------------------------------------------------------------------------- + + _bp.c :- just declares bp as a variable + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +__data unsigned char bp ; diff --git a/device/lib/_calloc.c b/device/lib/_calloc.c new file mode 100644 index 0000000..c30000c --- /dev/null +++ b/device/lib/_calloc.c @@ -0,0 +1,73 @@ +/*------------------------------------------------------------------------- + calloc.c - allocate cleared memory. + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#include +#include +#include + +//-------------------------------------------------------------------- +//calloc function implementation for embedded system +//Non-ANSI keywords are C51 specific. +// __xdata - variable in external memory (just RAM) +//-------------------------------------------------------------------- + +#if _SDCC_MALLOC_TYPE_MLH + +#define __xdata + +typedef struct _MEMHEADER MEMHEADER; + +struct _MEMHEADER +{ + MEMHEADER * next; + MEMHEADER * prev; + unsigned int len; + unsigned char mem; +}; + +#define HEADER_SIZE (sizeof(MEMHEADER)-sizeof(char)) + +#else + +#define MEMHEADER struct MAH// Memory Allocation Header + +MEMHEADER +{ + MEMHEADER __xdata * next; + unsigned int len; + unsigned char mem[]; +}; + +#define HEADER_SIZE sizeof(MEMHEADER) + +#endif + +void __xdata * calloc (size_t nmemb, size_t size) +{ + register void __xdata * ptr; + + ptr = malloc(nmemb * size); + if (ptr) + { + memset(ptr, 0, nmemb * size); + } + return ptr; +} +//END OF MODULE diff --git a/device/lib/_decdptr.c b/device/lib/_decdptr.c new file mode 100644 index 0000000..e08d037 --- /dev/null +++ b/device/lib/_decdptr.c @@ -0,0 +1,48 @@ +/*------------------------------------------------------------------------- + + _decdptr.c :- decrement dptr by 1 + + Ecrit par - Jean-Louis Vern jlvern@writeme.com (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* the return value is already in dph/dpl */ +void +_decdptr (char *gptr) +{ + gptr; /* hush the compiler */ + +#ifdef SDCC_ds390 + __asm + orl dps, #0xc0 + inc dptr + anl dps, #0x3f + __endasm; +#else + __asm + xch a,dpl + jnz 00001$ + dec dph +00001$: + dec a + xch a,dpl + __endasm; +#endif +} diff --git a/device/lib/_divsint.c b/device/lib/_divsint.c new file mode 100644 index 0000000..b35be7e --- /dev/null +++ b/device/lib/_divsint.c @@ -0,0 +1,215 @@ +/*------------------------------------------------------------------------- + _divsint.c :- routine for signed int (16 bit) division. just calls + routine for unsigned division after sign adjustment + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + + +#include + +#if _SDCC_MANGLES_SUPPORT_FUNS +unsigned unsigned _divuint (unsigned x, unsigned y); +#endif + +/* Assembler-functions are provided for: + mcs51 small + mcs51 small stack-auto +*/ + +#if !defined(SDCC_USE_XSTACK) && !defined(_SDCC_NO_ASM_LIB_FUNCS) +# if defined(SDCC_mcs51) +# if defined(SDCC_MODEL_SMALL) +# if defined(SDCC_STACK_AUTO) && !defined(SDCC_PARMS_IN_BANK1) +# define _DIVSINT_ASM_SMALL_AUTO +# else +# define _DIVSINT_ASM_SMALL +# endif +# endif +# endif +#endif + +#if defined _DIVSINT_ASM_SMALL + +static void +_divsint_dummy (void) __naked +{ + __asm + + #define xl dpl + #define xh dph + + .globl __divsint + + // _divsint_PARM_2 shares the same memory with _divuint_PARM_2 + // and is defined in _divuint.c +#if defined(SDCC_PARMS_IN_BANK1) + #define yl (b1_0) + #define yh (b1_1) +#else + #define yl (__divsint_PARM_2) + #define yh (__divsint_PARM_2 + 1) +#endif +__divsint: + ; xh in dph + ; yh in (__divsint_PARM_2 + 1) + + clr F0 ; Flag 0 in PSW + ; available to user for general purpose + mov a,xh + jnb acc.7,a_not_negative + + setb F0 + + clr a + clr c + subb a,xl + mov xl,a + clr a + subb a,xh + mov xh,a + +a_not_negative: + + mov a,yh + jnb acc.7,b_not_negative + + cpl F0 + + clr a + clr c + subb a,yl + mov yl,a + clr a + subb a,yh + mov yh,a + +b_not_negative: + + lcall __divuint + + jnb F0,not_negative + + clr a + clr c + subb a,xl + mov xl,a + clr a + subb a,xh + mov xh,a + +not_negative: + ret + + __endasm; +} + +#elif defined _DIVSINT_ASM_SMALL_AUTO + +static void +_divsint_dummy (void) __naked +{ + __asm + + #define xl dpl + #define xh dph + + .globl __divsint + +__divsint: + + clr F0 ; Flag 0 in PSW + ; available to user for general purpose + mov a,xh + jnb acc.7,a_not_negative + + setb F0 + + clr a + clr c + subb a,xl + mov xl,a + clr a + subb a,xh + mov xh,a + +a_not_negative: + + mov a,sp + add a,#-2 ; 2 bytes return address + mov r0,a ; r0 points to yh + mov a,@r0 ; a = yh + + jnb acc.7,b_not_negative + + cpl F0 + + dec r0 + + clr a + clr c + subb a,@r0 ; yl + mov @r0,a + clr a + inc r0 + subb a,@r0 ; a = yh + +b_not_negative: + + mov r1,a ; yh + dec r0 + mov a,@r0 ; yl + mov r0,a + + lcall __divint + + jnb F0,not_negative + + clr a + clr c + subb a,xl + mov xl,a + clr a + subb a,xh + mov xh,a + +not_negative: + ret + + __endasm; +} + +#else // _DIVSINT_ASM_ + +int +_divsint (int x, int y) +{ + register int r; + + r = _divuint((x < 0 ? -x : x), + (y < 0 ? -y : y)); + if ( (x < 0) ^ (y < 0)) + return -r; + else + return r; +} + +#endif // _DIVSINT_ASM_ diff --git a/device/lib/_divslong.c b/device/lib/_divslong.c new file mode 100644 index 0000000..ac4d9c5 --- /dev/null +++ b/device/lib/_divslong.c @@ -0,0 +1,267 @@ +/*------------------------------------------------------------------------- + _divslong.c - routine for division of 32 bit long + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + + +#include + +#if _SDCC_MANGLES_SUPPORT_FUNS +unsigned long _divulong (unsigned long x, unsigned long y); +#endif + +/* Assembler-functions are provided for: + mcs51 small + mcs51 small stack-auto +*/ + +#if !defined(SDCC_USE_XSTACK) && !defined(_SDCC_NO_ASM_LIB_FUNCS) +# if defined(SDCC_mcs51) +# if defined(SDCC_MODEL_SMALL) +# if defined(SDCC_STACK_AUTO) && !defined(SDCC_PARMS_IN_BANK1) +# define _DIVSLONG_ASM_SMALL_AUTO +# else +# define _DIVSLONG_ASM_SMALL +# endif +# endif +# endif +#endif + +#if defined _DIVSLONG_ASM_SMALL + +static void +_divslong_dummy (void) __naked +{ + __asm + + #define x0 dpl + #define x1 dph + #define x2 b + #define x3 r3 + + .globl __divslong + + // _divslong_PARM_2 shares the same memory with _divulong_PARM_2 + // and is defined in _divulong.c +#if defined(SDCC_PARMS_IN_BANK1) + #define y0 (b1_0) + #define y1 (b1_1) + #define y2 (b1_2) + #define y3 (b1_3) +#else + #define y0 (__divslong_PARM_2) + #define y1 (__divslong_PARM_2 + 1) + #define y2 (__divslong_PARM_2 + 2) + #define y3 (__divslong_PARM_2 + 3) +#endif +__divslong: + ; x3 in acc + ; y3 in (__divslong_PARM_2 + 3) + mov x3,a ; save x3 + + clr F0 ; Flag 0 in PSW + ; available to user for general purpose + jnb acc.7,a_not_negative + + setb F0 + + clr a + clr c + subb a,x0 + mov x0,a + clr a + subb a,x1 + mov x1,a + clr a + subb a,x2 + mov x2,a + clr a + subb a,x3 + mov x3,a + +a_not_negative: + + mov a,y3 + jnb acc.7,b_not_negative + + cpl F0 + + clr a + clr c + subb a,y0 + mov y0,a + clr a + subb a,y1 + mov y1,a + clr a + subb a,y2 + mov y2,a + clr a + subb a,y3 + mov y3,a + +b_not_negative: + + mov a,x3 ; restore x3 in acc + + lcall __divulong + + jnb F0,not_negative + + mov x3,a ; save x3 + + clr a + clr c + subb a,x0 + mov x0,a + clr a + subb a,x1 + mov x1,a + clr a + subb a,x2 + mov x2,a + clr a + subb a,x3 ; x3 ends in acc + +not_negative: + ret + + __endasm; +} + +#elif defined _DIVSLONG_ASM_SMALL_AUTO + +static void +_divslong_dummy (void) __naked +{ + __asm + + #define x0 dpl + #define x1 dph + #define x2 b + #define x3 r3 + + .globl __divslong + +__divslong: + + ; x3 in acc + mov x3,a ; save x3 + + clr F0 ; Flag 0 in PSW + ; available to user for general purpose + jnb acc.7,a_not_negative + + setb F0 + + clr a + clr c + subb a,x0 + mov x0,a + clr a + subb a,x1 + mov x1,a + clr a + subb a,x2 + mov x2,a + clr a + subb a,x3 + mov x3,a + +a_not_negative: + + mov a,sp + add a,#-2 ; 2 bytes return address + mov r0,a ; r0 points to y3 + mov a,@r0 ; y3 + + jnb acc.7,b_not_negative + + cpl F0 + + dec r0 + dec r0 + dec r0 + + clr a + clr c + subb a,@r0 ; y0 + mov @r0,a + clr a + inc r0 + subb a,@r0 ; y1 + mov @r0,a + clr a + inc r0 + subb a,@r0 ; y2 + mov @r0,a + clr a + inc r0 + subb a,@r0 ; y3 + mov @r0,a + +b_not_negative: + dec r0 + dec r0 + dec r0 ; r0 points to y0 + + lcall __divlong + + jnb F0,not_negative + + mov x3,a ; save x3 + + clr a + clr c + subb a,x0 + mov x0,a + clr a + subb a,x1 + mov x1,a + clr a + subb a,x2 + mov x2,a + clr a + subb a,x3 ; x3 ends in acc + +not_negative: + ret + + __endasm; +} + +#else // _DIVSLONG_ASM + +long +_divslong (long x, long y) +{ + long r; + + r = _divulong((x < 0 ? -x : x), + (y < 0 ? -y : y)); + if ( (x < 0) ^ (y < 0)) + return -r; + else + return r; +} + +#endif // _DIVSLONG_ASM diff --git a/device/lib/_divuint.c b/device/lib/_divuint.c new file mode 100644 index 0000000..8d1344f --- /dev/null +++ b/device/lib/_divuint.c @@ -0,0 +1,177 @@ +/*------------------------------------------------------------------------- + _divuint.c :- routine for unsigned int (16 bit) division + + Ecrit par - Jean-Louis Vern . jlvern@writeme.com (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* Assembler-functions are provided for: + mcs51 small + mcs51 small stack-auto +*/ + +#include + +#if !defined(SDCC_USE_XSTACK) && !defined(_SDCC_NO_ASM_LIB_FUNCS) +# if defined(SDCC_mcs51) +# if defined(SDCC_MODEL_SMALL) +# if defined(SDCC_STACK_AUTO) +# define _DIVUINT_ASM_SMALL_AUTO +# else +# define _DIVUINT_ASM_SMALL +# endif +# endif +# endif +#endif + +#if defined _DIVUINT_ASM_SMALL || defined _DIVUINT_ASM_SMALL_AUTO + +static void +_divuint_dummy (void) __naked +{ + __asm + + .globl __divuint + +__divuint: + + #define count r2 + #define reste_l r3 + #define reste_h r4 + #define xl dpl + #define xh dph + +#if defined(SDCC_PARMS_IN_BANK1) + #define yl (b1_0) + #define yh (b1_1) +#else // SDCC_PARMS_IN_BANK1 + #if defined(SDCC_STACK_AUTO) + + .globl __divint + + mov a,sp + add a,#-2 ; 2 bytes return address + mov r0,a ; r0 points to yh + mov a,@r0 ; load yh + mov r1,a + dec r0 + mov a,@r0 ; load yl + mov r0,a + + #define yl r0 + #define yh r1 + +__divint: ; entry point for __divsint + + + #else // SDCC_STACK_AUTO + + #if defined(SDCC_NOOVERLAY) + .area DSEG (DATA) + #else + .area OSEG (OVR,DATA) + #endif + + .globl __divuint_PARM_2 + .globl __divsint_PARM_2 + +__divuint_PARM_2: +__divsint_PARM_2: + .ds 2 + + .area CSEG (CODE) + + #define yl (__divuint_PARM_2) + #define yh (__divuint_PARM_2 + 1) + + #endif // SDCC_STACK_AUTO +#endif // SDCC_PARMS_IN_BANK1 + + mov count,#16 + clr a + mov reste_l,a + mov reste_h,a + +loop: + mov a,xl ; x <<= 1 + add a,acc + mov xl,a + mov a,xh + rlc a + mov xh,a + + mov a,reste_l ; reste <<= 1 + rlc a ; feed in carry + mov reste_l,a + mov a,reste_h + rlc a + mov reste_h,a + + mov a,reste_l ; reste - y + subb a,yl ; here carry is always clear, because + ; reste <<= 1 never overflows + mov b,a + mov a,reste_h + subb a,yh + + jc smaller ; reste >= y? + + mov reste_h,a ; -> yes; reste = reste - y; + mov reste_l,b + orl xl,#1 +smaller: ; -> no + djnz count,loop + ret + + __endasm; +} + +#else // defined _DIVUINT_ASM_SMALL || defined _DIVUINT_ASM_SMALL_AUTO + +#define MSB_SET(x) ((x >> (8*sizeof(x)-1)) & 1) + +unsigned int +_divuint (unsigned int x, unsigned int y) +{ + unsigned int reste = 0; + unsigned char count = 16; + BOOL c; + + do + { + // reste: x <- 0; + c = MSB_SET(x); + x <<= 1; + reste <<= 1; + if (c) + reste |= 1; + + if (reste >= y) + { + reste -= y; + // x <- (result = 1) + x |= 1; + } + } + while (--count); + return x; +} + +#endif // defined _DIVUINT_ASM_SMALL || defined _DIVUINT_ASM_SMALL_AUTO diff --git a/device/lib/_divulong.c b/device/lib/_divulong.c new file mode 100644 index 0000000..4ec6d2d --- /dev/null +++ b/device/lib/_divulong.c @@ -0,0 +1,353 @@ +/*------------------------------------------------------------------------- + _divulong.c - routine for division of 32 bit unsigned long + + Ecrit par - Jean-Louis Vern . jlvern@writeme.com (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* Assembler-functions are provided for: + mcs51 small + mcs51 small stack-auto +*/ + +#include + +#if !defined(SDCC_USE_XSTACK) && !defined(_SDCC_NO_ASM_LIB_FUNCS) +# if defined(SDCC_mcs51) +# if defined(SDCC_MODEL_SMALL) +# if defined(SDCC_STACK_AUTO) && !defined(SDCC_PARMS_IN_BANK1) +# define _DIVULONG_ASM_SMALL_AUTO +# else +# define _DIVULONG_ASM_SMALL +# endif +# endif +# endif +#endif + +#if defined _DIVULONG_ASM_SMALL + +static void +_divlong_dummy (void) __naked +{ + __asm + + .globl __divulong + +__divulong: + + #define count r2 + + #define x0 dpl + #define x1 dph + #define x2 b + #define x3 r3 + + #define reste0 r4 + #define reste1 r5 + #define reste2 r6 + #define reste3 r7 +#if !defined(SDCC_PARMS_IN_BANK1) + +#if defined(SDCC_NOOVERLAY) + .area DSEG (DATA) +#else + .area OSEG (OVR,DATA) +#endif + + .globl __divulong_PARM_2 + .globl __divslong_PARM_2 + +__divulong_PARM_2: +__divslong_PARM_2: + .ds 4 + + .area CSEG (CODE) + + #define y0 (__divulong_PARM_2) + #define y1 (__divulong_PARM_2 + 1) + #define y2 (__divulong_PARM_2 + 2) + #define y3 (__divulong_PARM_2 + 3) +#else + #define y0 (b1_0) + #define y1 (b1_1) + #define y2 (b1_2) + #define y3 (b1_3) +#endif // !SDCC_PARMS_IN_BANK1 + ; parameter x comes in a, b, dph, dpl + mov x3,a ; save parameter x3 + + mov count,#32 + clr a + mov reste0,a + mov reste1,a + mov reste2,a + mov reste3,a + + ; optimization loop in lp0 until the first bit is shifted into rest + +lp0: mov a,x0 ; x <<= 1 + add a,x0 + mov x0,a + mov a,x1 + rlc a + mov x1,a + mov a,x2 + rlc a + mov x2,a + mov a,x3 + rlc a + mov x3,a + + jc in_lp + djnz count,lp0 + + sjmp exit + +loop: mov a,x0 ; x <<= 1 + add a,x0 + mov x0,a + mov a,x1 + rlc a + mov x1,a + mov a,x2 + rlc a + mov x2,a + mov a,x3 + rlc a + mov x3,a + +in_lp: mov a,reste0 ; reste <<= 1 + rlc a ; feed in carry + mov reste0,a + mov a,reste1 + rlc a + mov reste1,a + mov a,reste2 + rlc a + mov reste2,a + mov a,reste3 + rlc a + mov reste3,a + + mov a,reste0 ; reste - y + subb a,y0 ; carry is always clear here, because + ; reste <<= 1 never overflows + mov a,reste1 + subb a,y1 + mov a,reste2 + subb a,y2 + mov a,reste3 + subb a,y3 + + jc minus ; reste >= y? + + ; -> yes; reste -= y; + mov a,reste0 + subb a,y0 ; carry is always clear here (jc) + mov reste0,a + mov a,reste1 + subb a,y1 + mov reste1,a + mov a,reste2 + subb a,y2 + mov reste2,a + mov a,reste3 + subb a,y3 + mov reste3,a + + orl x0,#1 + +minus: djnz count,loop ; -> no + +exit: mov a,x3 ; prepare the return value + ret + + __endasm; +} + +#elif defined _DIVULONG_ASM_SMALL_AUTO + +static void +_divlong_dummy (void) __naked +{ + __asm + + .globl __divulong + +__divulong: + + #define count r2 + + #define x0 dpl + #define x1 dph + #define x2 b + #define x3 r3 + + #define reste0 r4 + #define reste1 r5 + #define reste2 r6 + #define reste3 r7 + + .globl __divlong ; entry point for __divslong + + #define y0 r1 + + ; parameter x comes in a, b, dph, dpl + mov x3,a ; save parameter x3 + + mov a,sp + add a,#-2-3 ; 2 bytes return address, 3 bytes param y + mov r0,a ; r0 points to y0 + +__divlong: ; entry point for __divslong + + mov a,@r0 ; load y0 + mov r1,a + inc r0 ; r0 points to y1 + + mov count,#32 + clr a + mov reste0,a + mov reste1,a + mov reste2,a + mov reste3,a + + ; optimization loop in lp0 until the first bit is shifted into rest + +lp0: mov a,x0 ; x <<= 1 + add a,x0 + mov x0,a + mov a,x1 + rlc a + mov x1,a + mov a,x2 + rlc a + mov x2,a + mov a,x3 + rlc a + mov x3,a + + jc in_lp + djnz count,lp0 + + sjmp exit + +loop: mov a,x0 ; x <<= 1 + add a,x0 + mov x0,a + mov a,x1 + rlc a + mov x1,a + mov a,x2 + rlc a + mov x2,a + mov a,x3 + rlc a + mov x3,a + +in_lp: mov a,reste0 ; reste <<= 1 + rlc a ; feed in carry + mov reste0,a + mov a,reste1 + rlc a + mov reste1,a + mov a,reste2 + rlc a + mov reste2,a + mov a,reste3 + rlc a + mov reste3,a + + mov a,reste0 ; reste - y + subb a,y0 ; carry is always clear here, because + ; reste <<= 1 never overflows + mov a,reste1 + subb a,@r0 ; y1 + mov a,reste2 + inc r0 + subb a,@r0 ; y2 + mov a,reste3 + inc r0 + subb a,@r0 ; y3 + dec r0 + dec r0 + + jc minus ; reste >= y? + + ; -> yes; reste -= y; + mov a,reste0 + subb a,y0 ; carry is always clear here (jc) + mov reste0,a + mov a,reste1 + subb a,@r0 ; y1 + mov reste1,a + mov a,reste2 + inc r0 + subb a,@r0 ; y2 + mov reste2,a + mov a,reste3 + inc r0 + subb a,@r0 ; y3 + mov reste3,a + dec r0 + dec r0 + + orl x0,#1 + +minus: djnz count,loop ; -> no + +exit: mov a,x3 ; prepare the return value + ret + + __endasm; +} + +#else // _DIVULONG_ASM + +#define MSB_SET(x) ((x >> (8*sizeof(x)-1)) & 1) + +unsigned long +_divulong (unsigned long x, unsigned long y) +{ + unsigned long reste = 0L; + unsigned char count = 32; + BOOL c; + + do + { + // reste: x <- 0; + c = MSB_SET(x); + x <<= 1; + reste <<= 1; + if (c) + reste |= 1L; + + if (reste >= y) + { + reste -= y; + // x <- (result = 1) + x |= 1L; + } + } + while (--count); + return x; +} + +#endif // _DIVULONG_ASM diff --git a/device/lib/_free.c b/device/lib/_free.c new file mode 100644 index 0000000..37fd4e8 --- /dev/null +++ b/device/lib/_free.c @@ -0,0 +1,161 @@ +/*------------------------------------------------------------------------- + free.c - release allocated memory. + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#include +#include + +#if defined(SDCC_STACK_AUTO) || defined(SDCC_z80) || defined(SDCC_gbz80) + #define CRITICAL __critical +#else + #define CRITICAL +#endif + +#if _SDCC_MALLOC_TYPE_MLH + +typedef struct _MEMHEADER MEMHEADER; + +struct _MEMHEADER +{ + MEMHEADER * next; + MEMHEADER * prev; + unsigned int len; + unsigned char mem; +}; + +#define HEADER_SIZE (sizeof(MEMHEADER)-sizeof(char)) + +/* These variables are defined through the crt0 functions. */ +/* Base of this variable is the first byte of the heap. */ +extern MEMHEADER _sdcc_heap_start; +/* Address of this variable is the last byte of the heap. */ +extern char _sdcc_heap_end; + +MEMHEADER * _sdcc_prev_memheader; +// apart from finding the header +// this function also finds it's predecessor +MEMHEADER * +_sdcc_find_memheader(void * p) +{ + register MEMHEADER * pthis; + if (!p) + return NULL; + pthis = (MEMHEADER * )((char *) p - HEADER_SIZE); //to start of header + _sdcc_prev_memheader = pthis->prev; + + return (pthis); +} + +void +free (void *p) +{ + MEMHEADER *prev_header, *pthis; + + if ( p ) //For allocated pointers only! + CRITICAL + { + pthis = (MEMHEADER * )((char *) p - HEADER_SIZE); //to start of header + if ( pthis->prev ) // For the regular header + { + prev_header = pthis->prev; + prev_header->next = pthis->next; + if (pthis->next) + { + pthis->next->prev = prev_header; + } + } + else + { + pthis->len = 0; //For the first header + } + } +} + +#else + + //-------------------------------------------------------------------- + //Written by Dmitry S. Obukhov, 1997 + //dso@usa.net + //-------------------------------------------------------------------- + //Modified for SDCC by Sandeep Dutta, 1999 + //sandeep.dutta@usa.net + //-------------------------------------------------------------------- + //malloc and free functions implementation for embedded system + //Non-ANSI keywords are C51 specific. + // __xdata - variable in external memory (just RAM) + //-------------------------------------------------------------------- + + #define MEMHEADER struct MAH// Memory Allocation Header + + MEMHEADER + { + MEMHEADER __xdata * next; + unsigned int len; + unsigned char mem[]; + }; + + #define HEADER_SIZE sizeof(MEMHEADER) + + //Static here means: can be accessed from this module only + extern MEMHEADER __xdata * _sdcc_first_memheader; + + MEMHEADER __xdata * _sdcc_prev_memheader; + // apart from finding the header + // this function also finds it's predecessor + MEMHEADER __xdata * _sdcc_find_memheader(void __xdata * p) + { + register MEMHEADER __xdata * pthis; + register MEMHEADER __xdata * cur_header; + + if (!p) + return NULL; + pthis = (MEMHEADER __xdata *) p; + pthis -= 1; //to start of header + cur_header = _sdcc_first_memheader; + _sdcc_prev_memheader = NULL; + while (cur_header && pthis != cur_header) + { + _sdcc_prev_memheader = cur_header; + cur_header = cur_header->next; + } + return (cur_header); + } + + void free (void * p) + { + register MEMHEADER __xdata * pthis; + + CRITICAL + { + pthis = _sdcc_find_memheader(p); + if (pthis) //For allocated pointers only! + { + if (!_sdcc_prev_memheader) + { + pthis->len = 0; + } + else + { + _sdcc_prev_memheader->next = pthis->next; + } + } + } + } + //END OF MODULE +#endif diff --git a/device/lib/_fs2schar.c b/device/lib/_fs2schar.c new file mode 100644 index 0000000..b9b6ac6 --- /dev/null +++ b/device/lib/_fs2schar.c @@ -0,0 +1,87 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + + +#ifdef FLOAT_ASM_MCS51 + +// char __fs2schar (float x) +static void dummy(void) __naked +{ + __asm + .globl ___fs2schar +___fs2schar: + lcall ___fs2slong + jnz fs2schar_not_zero + mov a, dpl + orl a, dph + orl a, b + jnz fs2schar_clr_a + ret +fs2schar_clr_a: + clr a +fs2schar_not_zero: + jnb sign_a, fs2schar_pos +fs2schar_neg: + cpl a + jnz fs2schar_maxval_neg + mov a, b + cpl a + jnz fs2schar_maxval_neg + mov a, dph + cpl a + jnz fs2schar_maxval_neg + mov a, dpl + jnb acc.7, fs2schar_maxval_neg + ret +fs2schar_maxval_neg: + mov dpl, #0x80 + ret +fs2schar_pos: + jnz fs2schar_maxval_pos + mov a, b + jnz fs2schar_maxval_pos + mov a, dph + jnz fs2schar_maxval_pos + mov a, dpl + jb acc.7, fs2schar_maxval_pos + ret +fs2schar_maxval_pos: + mov dpl, #0x7F + ret + __endasm; +} + +#else + +/* convert float to signed char */ +signed char __fs2schar (float f) +{ + signed long sl=__fs2slong(f); + if (sl>=CHAR_MAX) + return CHAR_MAX; + if (sl<=CHAR_MIN) + return -CHAR_MIN; + return sl; +} + +#endif diff --git a/device/lib/_fs2sint.c b/device/lib/_fs2sint.c new file mode 100644 index 0000000..53f2e2d --- /dev/null +++ b/device/lib/_fs2sint.c @@ -0,0 +1,81 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// int __fs2sint (float x) +static void dummy(void) __naked +{ + __asm + .globl ___fs2sint +___fs2sint: + lcall ___fs2slong + jnz fs2sint_not_zero + mov a, dpl + orl a, dph + orl a, b + jnz fs2sint_clr_a + ret +fs2sint_clr_a: + clr a +fs2sint_not_zero: + jnb sign_a, fs2sint_pos +fs2sint_neg: + cpl a + jnz fs2sint_maxval_neg + mov a, b + cpl a + jnz fs2sint_maxval_neg + mov a, dph + jnb acc.7, fs2sint_maxval_neg + ret +fs2sint_maxval_neg: + mov dptr, #0x8000 + ret +fs2sint_pos: + jnz fs2sint_maxval_pos + mov a, b + jnz fs2sint_maxval_pos + mov a, dph + jb acc.7, fs2sint_maxval_pos + ret +fs2sint_maxval_pos: + mov dptr, #0x7FFF + ret + __endasm; +} + +#else + +/* convert float to signed int */ +signed int __fs2sint (float f) +{ + signed long sl=__fs2slong(f); + if (sl>=INT_MAX) + return INT_MAX; + if (sl<=INT_MIN) + return -INT_MIN; + return sl; +} + +#endif diff --git a/device/lib/_fs2slong.c b/device/lib/_fs2slong.c new file mode 100644 index 0000000..961bff9 --- /dev/null +++ b/device/lib/_fs2slong.c @@ -0,0 +1,111 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// long __fs2slong (float x) +static void dummy(void) __naked +{ + __asm + .globl ___fs2slong +___fs2slong: + lcall fsgetarg + clr c + mov a, #158 + subb a, exp_a + jc fs2slong_maxval // |x| >= 2^32 +fs2slong_int_ok: + mov r1, #0 + lcall fs_rshift_a + jnb sign_a, fs2slong_pos +fs2slong_neg: + mov a, r1 + cpl a + add a, #1 + mov dpl, a + mov a, r2 + cpl a + addc a, #0 + mov dph, a + mov a, r3 + cpl a + addc a, #0 + mov b, a + mov a, r4 + cpl a + addc a, #0 + //Check for zero + jnz fs2slong_not_zero + mov a, dpl + orl a, dph + orl a, b + jnz fs2slong_clr_a + ret +fs2slong_clr_a: + clr a +fs2slong_not_zero: + jnb acc.7, fs2slong_maxval_neg // x < -0x80000000 + ret +fs2slong_pos: + mov a, r4 + jb acc.7, fs2slong_maxval_pos // x > 0x7FFFFFFF + mov dpl, r1 + mov dph, r2 + mov b, r3 + ret +fs2slong_maxval: + jnb sign_a, fs2slong_maxval_pos +fs2slong_maxval_neg: + clr a + mov dpl, a + mov dph, a + mov b, a + mov a, #0x80 + ret +fs2slong_maxval_pos: + mov a, #0xFF + mov dpl, a + mov dph, a + mov b, a + mov a, #0x7F + ret + __endasm; +} + +#else + +/* convert float to signed long */ +signed long __fs2slong (float f) +{ + + if (!f) + return 0; + + if (f<0) { + return -__fs2ulong(-f); + } else { + return __fs2ulong(f); + } +} + +#endif diff --git a/device/lib/_fs2uchar.c b/device/lib/_fs2uchar.c new file mode 100644 index 0000000..cc3f6b1 --- /dev/null +++ b/device/lib/_fs2uchar.c @@ -0,0 +1,48 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// unsigned char __fs2uchar (float x) +static void dummy(void) __naked +{ + __asm + .globl ___fs2uchar +___fs2uchar: + mov r7, #134 + lcall fs2ulong_begin + mov dpl, a + ret + __endasm; +} + +#else + +/* convert float to unsigned char */ +unsigned char __fs2uchar (float f) +{ + unsigned long ul=__fs2ulong(f); + if (ul>=UCHAR_MAX) return UCHAR_MAX; + return ul; +} + +#endif diff --git a/device/lib/_fs2uint.c b/device/lib/_fs2uint.c new file mode 100644 index 0000000..5c50546 --- /dev/null +++ b/device/lib/_fs2uint.c @@ -0,0 +1,51 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// unsigned int __fs2uint (float x) +static void dummy(void) __naked +{ + __asm + .globl ___fs2uint +___fs2uint: + mov r7, #142 + lcall fs2ulong_begin + mov dph, a + mov dpl, b + ret + __endasm; +} + +#else + +unsigned long __fs2ulong (float a1); + +/* convert float to unsigned int */ +unsigned int __fs2uint (float f) +{ + unsigned long ul=__fs2ulong(f); + if (ul>=UINT_MAX) return UINT_MAX; + return ul; +} + +#endif diff --git a/device/lib/_fs2ulong.c b/device/lib/_fs2ulong.c new file mode 100644 index 0000000..e792fd1 --- /dev/null +++ b/device/lib/_fs2ulong.c @@ -0,0 +1,112 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// unsigned long __fs2ulong (float x) +static void dummy(void) __naked +{ + __asm + .globl ___fs2ulong +___fs2ulong: + mov r7, #158 + .globl fs2ulong_begin +fs2ulong_begin: + lcall fsgetarg + jnb sign_a, fs2ulong_int + ljmp fs_return_zero + +fs2ulong_int: + clr c + mov a, r7 + subb a, exp_a + jnc fs2ulong_int_ok + // if we get here, x >= 2^32 + mov a, #0xFF + mov b, a + mov dph, a + mov dpl, a + ret + +fs2ulong_int_ok: + mov r1, #0 + lcall fs_rshift_a + +fs2ulong_done: + mov dpl, r1 + mov dph, r2 + mov b, r3 + mov a, r4 + ret + __endasm; +} + +#else + +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + + +union float_long +{ + float f; + long l; +}; + +/* convert float to unsigned long */ +unsigned long +__fs2ulong (float a1) +{ + volatile union float_long fl1; + volatile int exp; + volatile long l; + + fl1.f = a1; + + if (!fl1.l || SIGN(fl1.l)) + return (0); + + exp = EXP (fl1.l) - EXCESS - 24; + l = MANT (fl1.l); + + l >>= -exp; + + return l; +} + +#endif diff --git a/device/lib/_fsadd.c b/device/lib/_fsadd.c new file mode 100644 index 0000000..cb179c5 --- /dev/null +++ b/device/lib/_fsadd.c @@ -0,0 +1,238 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// float __fsadd (float a, float b) __reentrant +static void dummy(void) __naked +{ + __asm + + // extract the two inputs, placing them into: + // sign exponent mantiassa + // ---- -------- --------- + // a: sign_a exp_a r4/r3/r2 + // b: sign_b exp_b r7/r6/r5 + // + // r1: used to extend precision of a's mantissa + // r0: general purpose loop counter + + .globl ___fsadd +___fsadd: + lcall fsgetargs + + .globl fsadd_direct_entry +fsadd_direct_entry: + // we're going to extend mantissa to 32 bits temporarily + mov r1, #0 + + // which exponent is greater? + mov a, exp_b + cjne a, exp_a, 00005$ + sjmp 00011$ +00005$: jnc 00010$ + + // a's exponent was greater, so shift b's mantissa + lcall fs_swap_a_b + +00010$: + // b's exponent was greater, so shift a's mantissa + mov a, exp_b + clr c + subb a, exp_a + lcall fs_rshift_a // acc has # of shifts to do + +00011$: + // decide if we need to add or subtract + // sign_a and sign_b are stored in the flag bits of psw, + // so this little trick checks if the arguements ave the + // same sign. + mov a, psw + swap a + xrl a, psw + jb acc.1, 00022$ + +00020$: + // add the mantissas (both positive or both negative) + mov a, r2 + add a, r5 + mov r2, a + mov a, r3 + addc a, r6 + mov r3, a + mov a, r4 + addc a, r7 + mov r4, a + // check for overflow past 24 bits + jnc 00021$ + mov a, #1 + lcall fs_rshift_a + mov a, r4 + orl a, #0x80 + mov r4, a +00021$: + ljmp fs_round_and_return + + + +00022$: + // subtract the mantissas (one of them is negative) + clr c + mov a, r2 + subb a, r5 + mov r2, a + mov a, r3 + subb a, r6 + mov r3, a + mov a, r4 + subb a, r7 + mov r4, a + jnc 00025$ + // if we get a negative result, turn it positive and + // flip the sign bit + clr c + clr a + subb a, r1 + mov r1, a + clr a + subb a, r2 + mov r2, a + clr a + subb a, r3 + mov r3, a + clr a + subb a, r4 + mov r4, a + cpl sign_a +00025$: + lcall fs_normalize_a + ljmp fs_round_and_return + + __endasm; +} + +#else + + +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +union float_long + { + float f; + unsigned long l; + }; + +/* add two floats */ +float __fsadd (float a1, float a2) +{ + volatile long mant1, mant2; + volatile union float_long fl1, fl2; + volatile int exp1, exp2; + char sign = 0; + + fl1.f = a1; + fl2.f = a2; + + /* check for zero args */ + if (!fl1.l) + return (fl2.f); + if (!fl2.l) + return (fl1.f); + + exp1 = EXP (fl1.l); + exp2 = EXP (fl2.l); + + if (exp1 > exp2 + 25) + return (fl1.f); + if (exp2 > exp1 + 25) + return (fl2.f); + + mant1 = MANT (fl1.l); + mant2 = MANT (fl2.l); + + if (SIGN (fl1.l)) + mant1 = -mant1; + if (SIGN (fl2.l)) + mant2 = -mant2; + + if (exp1 > exp2) + { + mant2 >>= exp1 - exp2; + } + else + { + mant1 >>= exp2 - exp1; + exp1 = exp2; + } + mant1 += mant2; + + if (mant1 < 0) + { + mant1 = -mant1; + sign = 1; + } + else if (!mant1) + return (0); + + /* normalize */ + while (mant1>= 1; + exp1++; + } + + /* turn off hidden bit */ + mant1 &= ~HIDDEN; + + /* pack up and go home */ + if (exp1 >= 0x100) + fl1.l = (sign ? SIGNBIT : 0) | __INFINITY; + else if (exp1 < 0) + fl1.l = 0; + else + fl1.l = PACK (sign ? SIGNBIT : 0 , exp1, mant1); + return (fl1.f); +} + +#endif diff --git a/device/lib/_fscmp.c b/device/lib/_fscmp.c new file mode 100644 index 0000000..e28d0d2 --- /dev/null +++ b/device/lib/_fscmp.c @@ -0,0 +1,92 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +static void dummy(void) __naked +{ + __asm + + .globl fs_compare_uint32 +fs_compare_uint32: + mov r1, #1 + mov r2, dpl + mov a, @r0 + mov dpl, r7 + cjne a, dpl, compare32_done + dec r0 + mov a, @r0 + cjne a, b, compare32_done + dec r0 + mov a, @r0 + cjne a, dph, compare32_done + dec r0 + mov a, @r0 + mov dpl, r2 + cjne a, dpl, compare32_done + mov r1, #0 +compare32_done: + ret + + + .globl fs_check_negative_zeros +fs_check_negative_zeros: +a_check: + cjne a, #0x80, a_not_neg_zero + mov a, b + jnz a_not_neg_zero_cleanup + mov a, dph + jnz a_not_neg_zero_cleanup + mov a, dpl + jnz a_not_neg_zero_cleanup + mov r7, #0 +a_not_neg_zero_cleanup: + mov a, r7 +a_not_neg_zero: + +b_check: + cjne @r0, #0x80, b_not_neg_zero + dec r0 + cjne @r0, #0, b_not_neg_zero_cleanup_1 + dec r0 + cjne @r0, #0, b_not_neg_zero_cleanup_2 + dec r0 + cjne @r0, #0, b_not_neg_zero_cleanup_3 + inc r0 + inc r0 + inc r0 + mov @r0, #0 + ret +b_not_neg_zero_cleanup_3: + inc r0 +b_not_neg_zero_cleanup_2: + inc r0 +b_not_neg_zero_cleanup_1: + inc r0 +b_not_neg_zero: + ret + + __endasm; +} + +#endif diff --git a/device/lib/_fsdiv.c b/device/lib/_fsdiv.c new file mode 100644 index 0000000..7bf1c48 --- /dev/null +++ b/device/lib/_fsdiv.c @@ -0,0 +1,339 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// float __fsdiv (float a, float b) __reentrant +static void dummy(void) __naked +{ + __asm + .globl ___fsdiv +___fsdiv: + // extract the two inputs, placing them into: + // sign exponent mantiassa + // ---- -------- --------- + // a: sign_a exp_a r4/r3/r2 + // b: sign_b exp_b r7/r6/r5 + + lcall fsgetargs + + // compute final sign bit + jnb sign_b, 00001$ + cpl sign_a +00001$: + + // if divisor is zero, ... + cjne r7, #0, 00003$ + // if dividend is also zero, return NaN + cjne r4, #0, 00002$ + ljmp fs_return_nan +00002$: + // but dividend is non-zero, return infinity + ljmp fs_return_inf +00003$: + // if dividend is zero, return zero + cjne r4, #0, 00004$ + ljmp fs_return_zero +00004$: + // if divisor is infinity, ... + mov a, exp_b + cjne a, #0xFF, 00006$ + // and dividend is also infinity, return NaN + mov a, exp_a + cjne a, #0xFF, 00005$ + ljmp fs_return_nan +00005$: + // but dividend is not infinity, return zero + ljmp fs_return_zero +00006$: + // if dividend is infinity, return infinity + mov a, exp_a + cjne a, #0xFF, 00007$ + ljmp fs_return_inf +00007$: + + // subtract exponents + clr c + subb a, exp_b + // if no carry then no underflow + jnc 00008$ + add a, #127 + jc 00009$ + ljmp fs_return_zero + +00008$: + add a, #128 + dec a + jnc 00009$ + ljmp fs_return_inf + +00009$: + mov exp_a, a + + // need extra bits on a's mantissa +#ifdef FLOAT_FULL_ACCURACY + clr c + mov a, r5 + subb a, r2 + mov a, r6 + subb a, r3 + mov a, r7 + subb a, r4 + jc 00010$ + dec exp_a + clr c + mov a, r2 + rlc a + mov r1, a + mov a, r3 + rlc a + mov r2, a + mov a, r4 + rlc a + mov r3, a + clr a + rlc a + mov r4, a + sjmp 00011$ +00010$: +#endif + clr a + xch a, r4 + xch a, r3 + xch a, r2 + mov r1, a +00011$: + + // begin long division + push exp_a +#ifdef FLOAT_FULL_ACCURACY + mov b, #25 +#else + mov b, #24 +#endif +00012$: + // compare + clr c + mov a, r1 + subb a, r5 + mov a, r2 + subb a, r6 + mov a, r3 + subb a, r7 + mov a, r4 + subb a, #0 // carry==0 if mant1 >= mant2 + +#ifdef FLOAT_FULL_ACCURACY + djnz b, 00013$ + sjmp 00015$ +00013$: +#endif + jc 00014$ + // subtract + mov a, r1 + subb a, r5 + mov r1, a + mov a, r2 + subb a, r6 + mov r2, a + mov a, r3 + subb a, r7 + mov r3, a + mov a, r4 + subb a, #0 + mov r4, a + clr c + +00014$: + // shift result + cpl c + mov a, r0 + rlc a + mov r0, a + mov a, dpl + rlc a + mov dpl, a + mov a, dph + rlc a + mov dph, a + + // shift partial remainder + clr c + mov a, r1 + rlc a + mov r1, a + mov a, r2 + rlc a + mov r2, a + mov a, r3 + rlc a + mov r3, a + mov a, r4 + rlc a + mov r4, a + +#ifdef FLOAT_FULL_ACCURACY + sjmp 00012$ +00015$: +#else + djnz b, 00012$ +#endif + + // now we've got a division result, so all we need to do + // is round off properly, normalize and output a float + +#ifdef FLOAT_FULL_ACCURACY + cpl c + clr a + mov r1, a + addc a, r0 + mov r2, a + clr a + addc a, dpl + mov r3, a + clr a + addc a, dph + mov r4, a + pop exp_a + jnc 00016$ + inc exp_a + // incrementing exp_a without checking carry is dangerous + mov r4, #0x80 +00016$: +#else + mov r1, #0 + mov a, r0 + mov r2, a + mov r3, dpl + mov r4, dph + pop exp_a +#endif + + lcall fs_normalize_a + ljmp fs_zerocheck_return + __endasm; +} + +#else + +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +union float_long + { + float f; + long l; + }; + +/* divide two floats */ +float __fsdiv (float a1, float a2) +{ + volatile union float_long fl1, fl2; + volatile long result; + volatile unsigned long mask; + volatile long mant1, mant2; + volatile int exp; + char sign; + + fl1.f = a1; + fl2.f = a2; + + /* subtract exponents */ + exp = EXP (fl1.l) ; + exp -= EXP (fl2.l); + exp += EXCESS; + + /* compute sign */ + sign = SIGN (fl1.l) ^ SIGN (fl2.l); + + /* divide by zero??? */ + if (!fl2.l) + {/* return NaN or -NaN */ + fl2.l = 0x7FC00000; + return (fl2.f); + } + + /* numerator zero??? */ + if (!fl1.l) + return (0); + + /* now get mantissas */ + mant1 = MANT (fl1.l); + mant2 = MANT (fl2.l); + + /* this assures we have 25 bits of precision in the end */ + if (mant1 < mant2) + { + mant1 <<= 1; + exp--; + } + + /* now we perform repeated subtraction of fl2.l from fl1.l */ + mask = 0x1000000; + result = 0; + while (mask) + { + if (mant1 >= mant2) + { + result |= mask; + mant1 -= mant2; + } + mant1 <<= 1; + mask >>= 1; + } + + /* round */ + result += 1; + + /* normalize down */ + exp++; + result >>= 1; + + result &= ~HIDDEN; + + /* pack up and go home */ + if (exp >= 0x100) + fl1.l = (sign ? SIGNBIT : 0) | __INFINITY; + else if (exp < 0) + fl1.l = 0; + else + fl1.l = PACK (sign ? SIGNBIT : 0 , exp, result); + return (fl1.f); +} + +#endif diff --git a/device/lib/_fseq.c b/device/lib/_fseq.c new file mode 100644 index 0000000..b4871ba --- /dev/null +++ b/device/lib/_fseq.c @@ -0,0 +1,87 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// char __fseq (float a, float b) +static void dummy(void) __naked +{ + __asm + .globl ___fseq +___fseq: + mov r7, a + mov r0, sp + dec r0 + dec r0 + lcall fs_check_negative_zeros + lcall fs_compare_uint32 + mov a, r1 + xrl a, #1 + mov dpl, a + ret + __endasm; +} + +#else + +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +union float_long + { + float f; + long l; + }; + +/* compare two floats */ +char +__fseq (float a1, float a2) +{ + volatile union float_long fl1, fl2; + + fl1.f = a1; + fl2.f = a2; + + if (fl1.l == fl2.l) + return (1); + if (((fl1.l | fl2.l) & 0x7FFFFFFF) == 0) + return (1); + return (0); +} + +#endif diff --git a/device/lib/_fsget1arg.c b/device/lib/_fsget1arg.c new file mode 100644 index 0000000..eec67af --- /dev/null +++ b/device/lib/_fsget1arg.c @@ -0,0 +1,51 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +static void dummy(void) __naked +{ + // input passed in a,b,dph,dpl + __asm + .globl fsgetarg +fsgetarg: + // extract the input, placing it into: + // sign exponent mantiassa + // ---- -------- --------- + // a: sign_a exp_a r4/r3/r2 + // + mov r2, dpl + mov r3, dph + mov c, b.7 + rlc a + mov sign_a, c + jz 00001$ + setb b.7 +00001$: + mov exp_a, a + mov r4, b + ret + __endasm; +} + +#endif diff --git a/device/lib/_fsget2args.c b/device/lib/_fsget2args.c new file mode 100644 index 0000000..e46738f --- /dev/null +++ b/device/lib/_fsget2args.c @@ -0,0 +1,75 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +static void dummy(void) __naked +{ + // arg1: passed in a,b,dph,dpl + // arg2: passed on stack + __asm + .globl fsgetargs +fsgetargs: + // extract the two inputs, placing them into: + // sign exponent mantiassa + // ---- -------- --------- + // a: sign_a exp_a r4/r3/r2 + // b: sign_b exp_b r7/r6/r5 + // + mov r2, dpl + mov r3, dph + mov c, b.7 + rlc a + mov sign_a, c + jz 00001$ + setb b.7 +00001$: + mov exp_a, a + mov r4, b + // now extract the 2nd parameter from the stack + mov a, sp + add a, #249 + mov r0, a + mov a, @r0 + mov r5, a + inc r0 + mov a, @r0 + mov r6, a + inc r0 + mov b, @r0 + inc r0 + mov a, @r0 + mov c, b.7 + rlc a + mov sign_b, c + jz 00002$ + setb b.7 +00002$: + mov exp_b, a + mov r7, b + ret + __endasm; +} + +#endif diff --git a/device/lib/_fsgt.c b/device/lib/_fsgt.c new file mode 100644 index 0000000..53df302 --- /dev/null +++ b/device/lib/_fsgt.c @@ -0,0 +1,116 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// char __fsgt (float a, float b) __reentrant +static void dummy(void) __naked +{ + __asm + .globl ___fsgt +___fsgt: + mov r7, a + mov r0, sp + dec r0 + dec r0 + lcall fs_check_negative_zeros + setb sign_a + rlc a + mov a, @r0 + jc a_negative +a_positive: + jnb acc.7, ab_positive + // a is positive and b is negative, so a > b + mov dpl, #1 + ret +a_negative: + jb acc.7, ab_negative + // a is negative and b is positive, so a < b + mov dpl, #0 + ret +ab_positive: + clr sign_a +ab_negative: + lcall fs_compare_uint32 + mov a, r1 + jnz ab_different + // a and b are equal + mov dpl, a + ret +ab_different: + jnb sign_a, skip_invert + cpl c +skip_invert: + clr a + rlc a + mov dpl, a + ret + __endasm; +} + +#else + +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +union float_long + { + float f; + long l; + }; + +/* compare two floats */ +char __fsgt (float a1, float a2) +{ + volatile union float_long fl1, fl2; + + fl1.f = a1; + fl2.f = a2; + + if (fl1.l<0 && fl2.l<0) { + if (fl2.l > fl1.l) + return (1); + return (0); + } + + if (fl1.l > fl2.l) + return (1); + return (0); +} + +#endif diff --git a/device/lib/_fslt.c b/device/lib/_fslt.c new file mode 100644 index 0000000..854d43d --- /dev/null +++ b/device/lib/_fslt.c @@ -0,0 +1,116 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// char __fslt (float a, float b) +static void dummy(void) __naked +{ + __asm + .globl ___fslt +___fslt: + mov r7, a + mov r0, sp + dec r0 + dec r0 + lcall fs_check_negative_zeros + setb sign_a + rlc a + mov a, @r0 + jc a_negative +a_positive: + jnb acc.7, ab_positive + // a is positive and b is negative, so a > b + mov dpl, #0 + ret +a_negative: + jb acc.7, ab_negative + // a is negative and b is positive, so a < b + mov dpl, #1 + ret +ab_positive: + clr sign_a +ab_negative: + lcall fs_compare_uint32 + mov a, r1 + jnz ab_different + // a and b are equal + mov dpl, a + ret +ab_different: + jb sign_a, skip_invert + cpl c +skip_invert: + clr a + rlc a + mov dpl, a + ret + __endasm; +} + +#else + +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +union float_long + { + float f; + long l; + }; + +/* compare two floats */ +char __fslt (float a1, float a2) +{ + volatile union float_long fl1, fl2; + + fl1.f = a1; + fl2.f = a2; + + if (fl1.l<0 && fl2.l<0) { + if (fl2.l < fl1.l) + return (1); + return (0); + } + + if (fl1.l < fl2.l) + return (1); + return (0); +} + +#endif diff --git a/device/lib/_fsmul.c b/device/lib/_fsmul.c new file mode 100644 index 0000000..1f36d60 --- /dev/null +++ b/device/lib/_fsmul.c @@ -0,0 +1,282 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// float __fsmul (float a, float b) __reentrant +static void dummy(void) __naked +{ + __asm + .globl ___fsmul +___fsmul: + // extract the two inputs, placing them into: + // sign exponent mantissa + // ---- -------- -------- + // a: sign_a exp_a r4/r3/r2 + // b: sign_b exp_b r7/r6/r5 + + lcall fsgetargs + + // first check if either input is zero + cjne r4, #0, 00002$ +00001$: + ljmp fs_return_zero + +00002$: + mov a, r7 + jz 00001$ + + // compute final sign bit + jnb sign_b, 00003$ + cpl sign_a +00003$: + + // check if either input is infinity + mov a, exp_b + cjne a, #0xFF, 00004$ + ljmp fs_return_inf +00004$: + mov a, exp_a + cjne a, #0xFF, 00005$ + ljmp fs_return_inf +00005$: + + // add the exponents + add a, exp_b + // if carry then no underflow + jc 00006$ + add a, #130 + jc 00007$ + ljmp fs_return_zero + +00006$: + add a, #131 + dec a + jnc 00007$ + ljmp fs_return_inf + +00007$: + mov exp_a, a + + // now we need to multipy r4/r3/r2 * r7/r6/r5 + // ------------------------------------------ + // r2 * r5 << 0 + // r3 * r5 + r2 * r6 << 8 + // r4 * r5 + r3 * r6 + r2 * r7 << 16 + // r4 * r6 + r3 * r7 << 24 + // r4 * r7 << 32 + // + // This adds quite a bit of code, but it is a LOT faster + // than three calls to __mululong... + + // output goes into r4/r3/r2/r1/r0/xx + + mov a, r2 + mov b, r5 + mul ab // r2 * r5 + // discard lowest 8 bits + mov r0, b + // range 0-FE + + mov a, r2 + mov b, r6 + mul ab // r2 * r6 + add a, r0 + mov r0, a + clr a + addc a, b + mov r1, a + // range 0-FEFF + + mov a, r3 + mov b, r5 + mul ab // r3 * r5 + add a, r0 + // discard lowest 8 bits + mov a, r1 + addc a, b + mov r1, a + clr a + rlc a + xch a, r2 + // range 0-1FD + + mov b, r7 + mul ab // r2 * r7 + add a, r1 + mov r1, a + mov a, r2 + addc a, b + mov r2, a + // range 0-FFFE + + mov a, r3 + mov r0, a + mov b, r6 + mul ab // r3 * r6 + add a, r1 + mov r1, a + mov a, r2 + addc a, b + mov r2, a + clr a + rlc a + mov r3, a + // range 0-1FDFF + + mov a, r4 + mov b, r5 + mul ab // r4 * r5 + add a, r1 + mov r1, a + mov a, r2 + addc a, b + mov r2, a + clr a + addc a, r3 + mov r3, a + // range 0-2FC00 + + mov a, r0 // r3 + mov b, r7 + mul ab // r3 * r7 + add a, r2 + mov r2, a + mov a, r3 + addc a, b + mov r3, a + clr a + rlc a + xch a, r4 + // range 0-100FD00 + + mov r5, a + mov b, r6 + mul ab // r4 * r6 + add a, r2 + mov r2, a + mov a, r3 + addc a, b + mov r3, a + clr a + addc a, r4 + mov r4, a + // range 0-1FEFE00 + + mov a, r5 // r4 + mov b, r7 + mul ab // r4 * r7 + add a, r3 + mov r3, a + mov a, r4 + addc a, b + mov r4, a + // range 40000000-FFFFFE00 + + jb acc.7, 00010$ + lcall fs_normalize_a + +00010$: + ljmp fs_round_and_return + __endasm; +} + +#else + +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +union float_long + { + float f; + unsigned long l; + }; + +/* multiply two floats */ +float __fsmul (float a1, float a2) { + volatile union float_long fl1, fl2; + volatile unsigned long result; + volatile int exp; + char sign; + + fl1.f = a1; + fl2.f = a2; + + if (!fl1.l || !fl2.l) + return (0); + + /* compute sign and exponent */ + sign = SIGN (fl1.l) ^ SIGN (fl2.l); + exp = EXP (fl1.l) - EXCESS; + exp += EXP (fl2.l); + + fl1.l = MANT (fl1.l); + fl2.l = MANT (fl2.l); + + /* the multiply is done as one 16x16 multiply and two 16x8 multiples */ + result = (fl1.l >> 8) * (fl2.l >> 8); + result += ((fl1.l & (unsigned long) 0xFF) * (fl2.l >> 8)) >> 8; + result += ((fl2.l & (unsigned long) 0xFF) * (fl1.l >> 8)) >> 8; + + if (result & SIGNBIT) + { + /* round */ + result += 0x80; + result >>= 8; + } + else + { + /* round */ + result += 0x40; + result >>= 7; + exp--; + } + + result &= ~HIDDEN; + + /* pack up and go home */ + if (exp >= 0x100) + fl1.l = (sign ? SIGNBIT : 0) | __INFINITY; + else if (exp < 0) + fl1.l = 0; + else + fl1.l = PACK (sign ? SIGNBIT : 0 , exp, result); + return (fl1.f); +} + +#endif diff --git a/device/lib/_fsneq.c b/device/lib/_fsneq.c new file mode 100644 index 0000000..4b675d0 --- /dev/null +++ b/device/lib/_fsneq.c @@ -0,0 +1,84 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// char __fsneq (float a, float b) +static void dummy(void) __naked +{ + __asm + .globl ___fsneq +___fsneq: + mov r7, a + mov r0, sp + dec r0 + dec r0 + lcall fs_check_negative_zeros + lcall fs_compare_uint32 + mov dpl, r1 + ret + __endasm; +} + +#else + +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +union float_long + { + float f; + long l; + }; + +/* compare two floats */ +char __fsneq (float a1, float a2) +{ + volatile union float_long fl1, fl2; + + fl1.f = a1; + fl2.f = a2; + + if (fl1.l == fl2.l) + return (0); + if (((fl1.l | fl2.l) & 0x7FFFFFFF) == 0) + return (0); + return (1); +} + +#endif diff --git a/device/lib/_fsnormalize.c b/device/lib/_fsnormalize.c new file mode 100644 index 0000000..b47ebfd --- /dev/null +++ b/device/lib/_fsnormalize.c @@ -0,0 +1,77 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +static void dummy(void) __naked +{ + __asm + .globl fs_normalize_a +fs_normalize_a: +#ifdef FLOAT_SHIFT_SPEEDUP + mov r0, #4 +00001$: + mov a, r4 + jnz 00003$ + xch a, r1 + xch a, r2 + xch a, r3 + mov r4, a + //mov r4, ar3 + //mov r3, ar2 + //mov r2, ar1 + //mov r1, #0 + mov a, exp_a + add a, #248 + mov exp_a, a + djnz r0, 00001$ + ret +#else + mov a, r4 +#endif +00003$: + mov r0, #32 +00005$: + jb acc.7, 00006$ + dec exp_a + clr c + mov a, r1 + rlc a + mov r1, a + mov a, r2 + rlc a + mov r2, a + mov a, r3 + rlc a + mov r3, a + mov a, r4 + rlc a + mov r4, a + djnz r0, 00005$ +00006$: + ret + __endasm; +} + +#endif diff --git a/device/lib/_fsreturnval.c b/device/lib/_fsreturnval.c new file mode 100644 index 0000000..c14894c --- /dev/null +++ b/device/lib/_fsreturnval.c @@ -0,0 +1,105 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +static void dummy(void) __naked +{ + __asm + + .globl fs_round_and_return +fs_round_and_return: +#ifdef FLOAT_FULL_ACCURACY + // discard the extra 8 bits of precision we kept around in r1 + cjne r1, #128, 00001$ + mov a, r2 + rrc a + cpl c +00001$: + jc fs_zerocheck_return + mov a, r2 + add a, #1 + mov r2, a + clr a + addc a, r3 + mov r3, a + clr a + addc a, r4 + mov r4, a + jnc fs_zerocheck_return + mov r4, #0x80 + inc exp_a +#endif + + .globl fs_zerocheck_return +fs_zerocheck_return: + // zero output is a special case + cjne r4, #0, fs_direct_return + cjne r3, #0, fs_direct_return + cjne r2, #0, fs_direct_return + + .globl fs_return_zero +fs_return_zero: + clr a + mov b, a + mov dph, a + mov dpl, a + ret + + .globl fs_direct_return +fs_direct_return: + // collect all pieces and return + mov c, sign_a + mov a, exp_a + rrc a + mov b, r4 + mov b.7, c + mov dph, r3 + mov dpl, r2 + ret + + .globl fs_return_inf +fs_return_inf: + clr a + mov dph, a + mov dpl, a + mov b, #0x80 + cpl a + mov c, sign_a + rrc a + ret + + .globl fs_return_nan +fs_return_nan: + clr a + mov dph, a + mov dpl, a + mov b, #0xC0 + mov a, #0x7F + ret + + __endasm; +} + +#endif diff --git a/device/lib/_fsrshift.c b/device/lib/_fsrshift.c new file mode 100644 index 0000000..e874020 --- /dev/null +++ b/device/lib/_fsrshift.c @@ -0,0 +1,100 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +static void dummy(void) __naked +{ + __asm + .globl fs_rshift_a +fs_rshift_a: + jz 00020$ + mov r0, a + add a, exp_a // adjust exponent + jnc 00001$ + mov a, #255 // don't roll over +00001$: + mov exp_a, a +#ifdef FLOAT_SHIFT_SPEEDUP + mov a, r0 + add a, #248 + jnc 00003$ + xch a, r4 + xch a, r3 + xch a, r2 + mov r1, a + clr a + xch a, r4 + //mov r1, ar2 // avoid dependence on register bank + //mov r2, ar3 + //mov r3, ar4 + //mov r4, #0 + add a, #248 + jnc 00003$ + xch a, r3 + xch a, r2 + mov r1, a + clr a + xch a, r3 + //mov r1, ar2 + //mov r2, ar3 + //mov r3, #0 + add a, #248 + jnc 00003$ + xch a, r2 + mov r1, a + clr a + xch a, r2 + //mov r1, ar2 + //mov r2, #0 + add a, #248 + jnc 00003$ + mov r1, #0 + ret +00003$: + add a, #8 + jz 00020$ + mov r0, a +#endif +00005$: + clr c + mov a, r4 + rrc a + mov r4, a + mov a, r3 + rrc a + mov r3, a + mov a, r2 + rrc a + mov r2, a + mov a, r1 + rrc a + mov r1, a + djnz r0, 00005$ +00020$: + ret + __endasm; +} + +#endif diff --git a/device/lib/_fssub.c b/device/lib/_fssub.c new file mode 100644 index 0000000..114ffc0 --- /dev/null +++ b/device/lib/_fssub.c @@ -0,0 +1,87 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +//float __fssub (float a, float b) __reentrant +static void dummy(void) __naked +{ + __asm + .globl ___fssub +___fssub: + mov r0, sp + dec r0 + dec r0 + xch a, @r0 + cpl acc.7 + xch a, @r0 + ljmp ___fsadd + __endasm; +} + +#else + +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +union float_long + { + float f; + long l; + }; + +/* subtract two floats */ +float __fssub (float a1, float a2) +{ + volatile union float_long fl1, fl2; + + fl1.f = a1; + fl2.f = a2; + + /* check for zero args */ + if (!fl2.l) + return (fl1.f); + if (!fl1.l) + return (-fl2.f); + + /* twiddle sign bit and add */ + fl2.l ^= SIGNBIT; + return fl1.f + fl2.f; +} + +#endif diff --git a/device/lib/_fsswapargs.c b/device/lib/_fsswapargs.c new file mode 100644 index 0000000..219ac0b --- /dev/null +++ b/device/lib/_fsswapargs.c @@ -0,0 +1,59 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +static void dummy(void) __naked +{ + __asm + .globl fs_swap_a_b +fs_swap_a_b: + mov a, exp_a + xch a, exp_b + mov exp_a, a + // is there a faster way to swap these 2 bits??? + // this trick with psw can play havoc with the resiter bank setting + // mov a, psw + // swap a // depends on sign bits in psw.1 & psw.5 + // mov psw, a + mov c, sign_a + rlc a + mov c, sign_b + mov sign_a, c + rrc a + mov sign_b, c + mov a, r4 + xch a, r7 + mov r4, a + mov a, r3 + xch a, r6 + mov r3, a + mov a, r2 + xch a, r5 + mov r2, a + ret + __endasm; +} + +#endif diff --git a/device/lib/_gptrget.c b/device/lib/_gptrget.c new file mode 100644 index 0000000..a3e4ee1 --- /dev/null +++ b/device/lib/_gptrget.c @@ -0,0 +1,285 @@ +/*------------------------------------------------------------------------- + + _gptrget.c :- get value for a generic pointer + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* not all devices use P2 to page pdata memory, therefore __XPAGE was + introduced. On some targets __XPAGE itself is a paged SFR so it is + not safe for all platforms to set this. Furthermore some targets + can be configured to behave differently for movx @dptr vs. movx @Ri + (don't drive high byte of address bus for movx @Ri only) */ +#define USE_PDATA_PAGING_REGISTER 0 + +__sbit __at (0xF7) B_7; +__sbit __at (0xF6) B_6; +__sbit __at (0xF5) B_5; + +/* the return value is expected to be in acc, and not in the standard + * location dpl. Therefore we choose return type void here: */ +#if defined DSDCC_MODEL_HUGE +void +_gptrget (char *gptr) __naked +{ +/* This is the banked version with pointers up to 23 bits. + B cannot be trashed */ + + gptr; /* hush the compiler */ + + __asm + ; + ; depending on the pointer type acc. to SDCCsymt.h + ; + jb _B_7,codeptr$ ; >0x80 code ; 3 + jnb _B_6,xdataptr$ ; <0x40 far ; 3 + + mov dph,r0 ; save r0 independant of regbank ; 2 + mov r0,dpl ; use only low order address ; 2 + + jb _B_5,pdataptr$ ; >0x60 pdata ; 3 + ; + ; Pointer to data space + ; + mov a,@r0 ; 1 + dataptrrestore$: + mov r0,dph ; restore r0 ; 2 + mov dph,#0 ; restore dph ; 2 + ret ; 1 + ; + ; pointer to external stack or pdata + ; + pdataptr$: + movx a,@r0 ; 1 + sjmp dataptrrestore$ ; 2 + ; + ; pointer to code area + ; + codeptr$: + ; implementation for SiLabs C8051F12x + mov a,b ; 2 + anl a,#0x03 ; 2 + swap a ; 1 + push _PSBANK ; 2 + anl _PSBANK,#0x0F ; 3 + orl _PSBANK,a ; 2 + + clr a ; 1 + movc a,@a+dptr ; 1 + pop _PSBANK ; 2 + ret ; 1 + ; + ; pointer to xternal data + ; + xdataptr$: + ; implementation for xram a16-a21 tied to P3 + mov _P3,b ; 3 + + movx a,@dptr ; 1 + ret ; 1 + ;=== + ;44 bytes + __endasm; +} + +#elif defined DSDCC_MODEL_MEDIUM + +void +_gptrget (char *gptr) __naked +{ +/* This is the non-banked version with pointers up to 15 bits. + Assumes B is free to be used */ + + gptr; /* hush the compiler */ + + __asm + ; + ; depending on the pointer type acc. to SDCCsymt.h + ; + mov b,dph ; 3 + jb _B_7,codeptr$ ; >0x80 code ; 3 + jnb _B_6,xdataptr$ ; <0x40 far ; 3 + + mov b,r0 ; save r0 independant of regbank ; 2 + mov r0,dpl ; use only low order address ; 2 + + jb _B_5,pdataptr$ ; >0x60 pdata ; 3 + ; + ; Pointer to data space + ; + mov a,@r0 ; 1 + mov r0,b ; restore r0 ; 2 + ret ; 1 + ; + ; pointer to xternal stack or pdata + ; + pdataptr$: + movx a,@r0 ; 1 + mov r0,b ; restore r0 ; 2 + ret ; 1 + ; + ; pointer to code area, max 15 bits + ; + codeptr$: + ; 0x8000 <= dptr <= 0xFFFF + ; no need to AND dph and restore from B if hardware wraps code memory + anl dph,#0x7F ; 3 + clr a ; 1 + movc a,@a+dptr ; 1 + mov dph,b ; 3 + ret ; 1 + ; + ; pointer to xternal data, max 14 bits + ; + xdataptr$: + ; 0 <= dptr <= 0x3FFF + movx a,@dptr ; 1 + ret ; 1 + ;=== + ;35 bytes + __endasm; +} + +#else + +void +_gptrget (char *gptr) __naked +{ +/* This is the new version with pointers up to 16 bits. + B cannot be trashed */ + + gptr; /* hush the compiler */ + + __asm + ; + ; depending on the pointer type acc. to SDCCsymt.h + ; + jb _B_7,codeptr$ ; >0x80 code ; 3 + jnb _B_6,xdataptr$ ; <0x40 far ; 3 + + mov dph,r0 ; save r0 independant of regbank ; 2 + mov r0,dpl ; use only low order address ; 2 + + jb _B_5,pdataptr$ ; >0x60 pdata ; 3 + ; + ; Pointer to data space + ; + mov a,@r0 ; 1 + dataptrrestore$: + mov r0,dph ; restore r0 ; 2 + mov dph,#0 ; restore dph ; 2 + ret ; 1 + ; + ; pointer to xternal stack or pdata + ; + pdataptr$: + movx a,@r0 ; 1 + sjmp dataptrrestore$ ; 2 + ; + ; pointer to code area, max 16 bits + ; + codeptr$: + clr a ; 1 + movc a,@a+dptr ; 1 + ret ; 1 + ; + ; pointer to xternal data, max 16 bits + ; + xdataptr$: + movx a,@dptr ; 1 + ret ; 1 + ;=== + ;27 bytes + __endasm; +} + +#endif + +#ifdef SDCC_ds390 +/* the return value is expected to be in acc/_ap, and not in the standard + * location dpl/dph. Therefore we choose return type void here: */ + +void +_gptrgetWord (unsigned *gptr) +{ + gptr; /* hush the compiler */ + + __asm + ; + ; depending on the pointer type acc. to SDCCsymt.h + ; + jb _B_7,00003$ ; >0x80 code + jnb _B_6,00002$ ; <0x40 far + + mov dph,r0 ; save r0 independant of regbank + mov r0,dpl ; use only low order address + + jb _B_5,00004$ ; >0x60 pdata + ; + ; Pointer to data space + ; + mov _ap,@r0 + inc r0 + mov a,@r0 + inc dpl + sjmp 00005$ + ; + ; pointer to xternal data + ; + 00002$: + movx a,@dptr + mov _ap,a + inc dptr + movx a,@dptr + sjmp 00006$ +; +; pointer to code area +; + 00003$: + clr a + movc a,@a+dptr + mov _ap,a + clr a + inc dptr + movc a,@a+dptr + sjmp 00006$ +; +; pointer to xternal stack +; + 00004$: + movx a,@r0 + mov _ap,a + inc r0 + movx a,@r0 + inc dpl +; +; restore and return +; + 00005$: + mov r0,dph ; restore r0 + mov dph,#0 ; restore dph + 00006$: + xch a,_ap + __endasm; + +} + +#endif diff --git a/device/lib/_gptrgetc.c b/device/lib/_gptrgetc.c new file mode 100644 index 0000000..400af36 --- /dev/null +++ b/device/lib/_gptrgetc.c @@ -0,0 +1,142 @@ +/*------------------------------------------------------------------------- + + _gptrget.c :- get value for a generic pointer (used with --xram-movc) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + + +/* the return value is expected to be in acc, and not in the standard + * location dpl. Therefore we choose return type void here: */ + +#if 1 + +void +_gptrgetc (char *gptr) __naked +{ +/* This is the new version with pointers up to 16 bits. + B cannot be trashed */ + + gptr; /* hush the compiler */ + + __asm + ; save values passed + ; + ; depending on the pointer type acc. to SDCCsymt.h + ; + jb _B_7,codeptr$ ; >0x80 code ; 3 + jnb _B_6,xdataptr$ ; <0x40 far ; 3 + + mov dph,r0 ; save r0 independant of regbank ; 2 + mov r0,dpl ; use only low order address ; 2 + + jb _B_5,pdataptr$ ; >0x60 pdata ; 3 + ; + ; Pointer to data space + ; + mov a,@r0 ; 1 + mov r0,dph ; restore r0 ; 2 + mov dph,#0 ; restore dph ; 2 + ret ; 1 + ; + ; pointer to external stack or pdata + ; + pdataptr$: + movx a,@r0 ; 1 + mov r0,dph ; restore r0 ; 2 + mov dph,#0 ; restore dph ; 2 + ret ; 1 +; +; pointer to xternal data +; pointer to code area +; + codeptr$: + xdataptr$: + clr a ; 1 + movc a,@a+dptr ; 1 + ret ; 1 + ;=== + ;28 bytes + __endasm; +} + +#else + +void +_gptrgetc (char *gptr) __naked +{ + gptr; /* hush the compiler */ + + __asm + ; save values passed + xch a,r0 + push acc + ; + ; depending on the pointer type acc. to SDCCsymt.h + ; + mov a,b + jz 00001$ ; 0 near + dec a + jz 00003$ ; 1 far + dec a + jz 00003$ ; 2 code + dec a + jz 00004$ ; 3 pdata + dec a ; 4 skip generic pointer + dec a + jz 00001$ ; 5 idata + ; + ; any other value for type + ; return xFF + mov a,#0xff + ret + ; + ; Pointer to data space + ; + 00001$: + mov r0,dpl ; use only low order address + mov a,@r0 + ret +; +; pointer to xternal data +; pointer to code area +; + 00003$: + ; clr a is already 0 + movc a,@a+dptr + ret +; +; pointer to xternal stack +; + 00004$: + mov r0,dpl + movx a,@r0 +; +; restore and return +; + mov r0,a + pop acc + xch a,r0 + ret + __endasm; + +} +#endif diff --git a/device/lib/_gptrput.c b/device/lib/_gptrput.c new file mode 100644 index 0000000..6112353 --- /dev/null +++ b/device/lib/_gptrput.c @@ -0,0 +1,243 @@ +/*------------------------------------------------------------------------- + + _gptrput.c :- put value for a generic pointer + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* not all devices use P2 to page pdata memory, therefore __XPAGE was + introduced. On some targets __XPAGE itself is a paged SFR so it is + not safe for all platforms to set this. Furthermore some targets + can be configured to behave differently for movx @dptr vs. movx @Ri + (don't drive high byte of address bus for movx @Ri only) */ +#define USE_PDATA_PAGING_REGISTER 0 + +__sbit __at (0xF7) B_7; +__sbit __at (0xF6) B_6; +__sbit __at (0xF5) B_5; + +#if defined DSDCC_MODEL_HUGE +void +_gptrput (char *gptr, char c) __naked +{ +/* This is the banked version with pointers up to 22 bits. + B cannot be trashed */ + + gptr; c; /* hush the compiler */ + + __asm + ; + ; depending on the pointer type according to SDCCsymt.h + ; + jb _B_7,codeptr$ ; >0x80 code ; 3 + jnb _B_6,xdataptr$ ; <0x40 far ; 3 + + mov dph,r0 ; save r0 independant of regbank ; 2 + mov r0,dpl ; use only low order address ; 2 + + jb _B_5,pdataptr$ ; >0x60 pdata ; 3 + ; + ; store into near/idata space + ; + mov @r0,a ; 1 + dataptrrestore$: + mov r0,dph ; restore r0 ; 2 + mov dph,#0 ; restore dph ; 2 + + codeptr$: + ret ; 1 + ; + ; store into external stack/pdata space + ; + pdataptr$: + movx @r0,a ; 1 + sjmp dataptrrestore$ ; 2 + ; + ; store into far space + ; + xdataptr$: + mov _P3,b ; 3 + + movx @dptr,a ; 1 + ret ; 1 + + ;=== + ;27 bytes + __endasm; +} + +#elif defined DSDCC_MODEL_MEDIUM + +void +_gptrput (char *gptr, char c) __naked +{ +/* This is the non-banked version with pointers up to 14 bits. + Assumes B is free to be used */ + + gptr; c; /* hush the compiler */ + + __asm + ; + ; depending on the pointer type according to SDCCsymt.h + ; + mov b,dph ; 3 + jb _B_7,codeptr$ ; >0x80 code ; 3 + jnb _B_6,xdataptr$ ; <0x40 far ; 3 + + mov b,r0 ; save r0 independant of regbank ; 2 + mov r0,dpl ; use only low order address ; 2 + + jb _B_5,pdataptr$ ; >0x60 pdata ; 3 + ; + ; store into near/idata space + ; + mov @r0,a ; 1 + dataptrrestore$: + mov r0,b ; restore r0 ; 2 + + codeptr$: + ret ; 1 + ; + ; store into external stack/pdata space + ; + pdataptr$: + movx @r0,a ; 1 + sjmp dataptrrestore$ ; 2 + ; + ; store into far space, max 14 bits + ; + xdataptr$: + ; 0 <= dptr <= 0x3FFF + movx @dptr,a ; 1 + ret ; 1 + ;=== + ;25 bytes + __endasm; +} + +#else + +void +_gptrput (char *gptr, char c) __naked +{ +/* This is the new version with pointers up to 16 bits. + B cannot be trashed */ + + gptr; c; /* hush the compiler */ + + __asm + ; + ; depending on the pointer type according to SDCCsymt.h + ; + jb _B_7,codeptr$ ; >0x80 code ; 3 + jnb _B_6,xdataptr$ ; <0x40 far ; 3 + + mov dph,r0 ; save r0 independant of regbank ; 2 + mov r0,dpl ; use only low order address ; 2 + + jb _B_5,pdataptr$ ; >0x60 pdata ; 3 + ; + ; store into near/idata space + ; + mov @r0,a ; 1 + dataptrrestore$: + mov r0,dph ; restore r0 ; 2 + mov dph,#0 ; restore dph ; 2 + + codeptr$: + ret ; 1 + ; + ; store into external stack/pdata space + ; + pdataptr$: + movx @r0,a ; 1 + sjmp dataptrrestore$ ; 2 + ; + ; store into far space + ; + xdataptr$: + movx @dptr,a ; 1 + ret ; 1 + + ;=== + ;24 bytes + __endasm; +} + +#endif + +#ifdef SDCC_ds390 + +void +_gptrputWord () +{ + __asm + ; + ; depending on the pointer type acc. to SDCCsymt.h + ; + jb _B_7,00013$ ; >0x80 code + jnb _B_6,00012$ ; <0x40 far + + mov dph,r0 ; save r0 independant of regbank + mov r0,dpl ; use only low order address + + jb _B_5,00014$ ; >0x60 pdata +; +; store into near space +; + mov @r0,_ap + inc r0 + mov @r0,a + sjmp 00015$ +; +; store into far space +; + 00012$: + xch a,_ap + movx @dptr,a + inc dptr + xch a,_ap + movx @dptr,a + sjmp 00016$ +; +; store into code space +; + 00013$: + inc dptr ; do nothing + sjmp 00016$ +; +; store into xstack space +; + 00014$: + xch a,_ap + movx @r0,a + inc r0 + xch a,_ap + movx @r0, a + 00015$: + mov dpl,r0 + mov r0,dph ; restore r0 + mov dph,#0 ; restore dph + 00016$: + __endasm; +} + +#endif diff --git a/device/lib/_heap.c b/device/lib/_heap.c new file mode 100644 index 0000000..fc91fa8 --- /dev/null +++ b/device/lib/_heap.c @@ -0,0 +1,36 @@ +/*------------------------------------------------------------------------- + _heap.c - memory heap for malloc and friends + + Copyright (C) 2006 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* + This is the default heap. If you need a different size (make a copy and) + recompile it with -D HEAP_SIZE= where is whatever you need. + Link the resulting object explicitly with your project. +*/ + +#ifndef HEAP_SIZE +#define HEAP_SIZE 1024 +#endif + +__xdata char _sdcc_heap[HEAP_SIZE]; +const unsigned int _sdcc_heap_size = HEAP_SIZE; diff --git a/device/lib/_iscntrl.c b/device/lib/_iscntrl.c new file mode 100644 index 0000000..3e8d982 --- /dev/null +++ b/device/lib/_iscntrl.c @@ -0,0 +1,33 @@ +/*------------------------------------------------------------------------- + _iscntrl.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#define REG_UCHAR register unsigned char + +char iscntrl(unsigned char c) +{ + + if ( c <= '\x1F' || c == '\x7f') + return 1; + return 0; +} diff --git a/device/lib/_isdigit.c b/device/lib/_isdigit.c new file mode 100644 index 0000000..831832b --- /dev/null +++ b/device/lib/_isdigit.c @@ -0,0 +1,32 @@ +/*------------------------------------------------------------------------- + _isdigit.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + + +char isdigit( unsigned char c) +{ + + if ( c >= '0' && c <= '9' ) + return 1; + return 0; +} diff --git a/device/lib/_isgraph.c b/device/lib/_isgraph.c new file mode 100644 index 0000000..82108a4 --- /dev/null +++ b/device/lib/_isgraph.c @@ -0,0 +1,31 @@ +/*------------------------------------------------------------------------- + _isgraph.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +char isgraph( unsigned char c) +{ + + if ( c >= '\x21' && c <= '\x7e' ) + return 1; + return 0; +} diff --git a/device/lib/_islower.c b/device/lib/_islower.c new file mode 100644 index 0000000..2dc4519 --- /dev/null +++ b/device/lib/_islower.c @@ -0,0 +1,31 @@ +/*------------------------------------------------------------------------- + _islower.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +char islower(unsigned char c) +{ + + if ( c >= 'a' && c <= 'z' ) + return 1; + return 0; +} diff --git a/device/lib/_isprint.c b/device/lib/_isprint.c new file mode 100644 index 0000000..be04ae2 --- /dev/null +++ b/device/lib/_isprint.c @@ -0,0 +1,30 @@ +/*------------------------------------------------------------------------- + _isprint.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +char isprint (unsigned char c) +{ + + if ( c >= '\x20' && c <= '\x7e') + return 1; + return 0; +} diff --git a/device/lib/_ispunct.c b/device/lib/_ispunct.c new file mode 100644 index 0000000..3c5fb7e --- /dev/null +++ b/device/lib/_ispunct.c @@ -0,0 +1,35 @@ +/*------------------------------------------------------------------------- + _ispunct.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "ctype.h" +char ispunct (unsigned char c) +{ + + if (isprint (c) && + !islower(c) && + !isupper(c) && + c != ' ' && + !isdigit(c)) + return 1; + return 0; +} diff --git a/device/lib/_isspace.c b/device/lib/_isspace.c new file mode 100644 index 0000000..07fb2f6 --- /dev/null +++ b/device/lib/_isspace.c @@ -0,0 +1,35 @@ +/*------------------------------------------------------------------------- + _isppace.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +char isspace (unsigned char c) +{ + + if ( c == ' ' || + c == '\f' || + c == '\n' || + c == '\r' || + c == '\t' || + c == '\v' ) + return 1; + return 0; +} diff --git a/device/lib/_isupper.c b/device/lib/_isupper.c new file mode 100644 index 0000000..519389d --- /dev/null +++ b/device/lib/_isupper.c @@ -0,0 +1,30 @@ +/*------------------------------------------------------------------------- + _isupper.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + char isupper (unsigned char c) +{ + + if ( c >= 'A' && c <= 'Z') + return 1; + return 0; +} diff --git a/device/lib/_isxdigit.c b/device/lib/_isxdigit.c new file mode 100644 index 0000000..44a02fa --- /dev/null +++ b/device/lib/_isxdigit.c @@ -0,0 +1,34 @@ +/*------------------------------------------------------------------------- + _isxdigit.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +char isxdigit (unsigned char c) +{ + + if (( c >= '0' && c <= '9') || + ( c >= 'a' && c <= 'f') || + ( c >= 'A' && c <= 'F')) + return 1; + return 0; + +} + diff --git a/device/lib/_itoa.c b/device/lib/_itoa.c new file mode 100644 index 0000000..40b28a1 --- /dev/null +++ b/device/lib/_itoa.c @@ -0,0 +1,49 @@ +/*------------------------------------------------------------------------- + integer to string conversion + + Written by: Bela Torok, 1999 + bela.torok@kssg.ch + usage: + + _uitoa(unsigned int value, char* string, int radix) + _itoa(int value, char* string, int radix) + + value -> Number to be converted + string -> Result + radix -> Base of value (e.g.: 2 for binary, 10 for decimal, 16 for hex) +---------------------------------------------------------------------------*/ + +void _uitoa(unsigned int value, char* string, unsigned char radix) +{ + signed char index = 0, i = 0; + + /* generate the number in reverse order */ + do { + string[index] = '0' + (value % radix); + if (string[index] > '9') + string[index] += 'A' - '9' - 1; + value /= radix; + ++index; + } while (value != 0); + + /* null terminate the string */ + string[index--] = '\0'; + + /* reverse the order of digits */ + while (index > i) { + char tmp = string[i]; + string[i] = string[index]; + string[index] = tmp; + ++i; + --index; + } +} + +void _itoa(int value, char* string, unsigned char radix) +{ + if (value < 0 && radix == 10) { + *string++ = '-'; + value = -value; + } + _uitoa(value, string, radix); +} diff --git a/device/lib/_logexpf.c b/device/lib/_logexpf.c new file mode 100644 index 0000000..5890fc2 --- /dev/null +++ b/device/lib/_logexpf.c @@ -0,0 +1,92 @@ +#define SDCC_MATH_LIB +#include + + +#ifdef MATH_ASM_MCS51 + +// This code is shared by both logf() and expf(), so it goes in this +// separate file to allow the linker to include it when either +// function is needed, but only 1 copy when both are used. + +void _fs_cordic_rshift_r765_unsigned(void) +{ + __asm + add a, #248 + jnc 00003$ + mov b, r5 + mov r5, ar6 + mov r6, ar7 + mov r7, #0 + add a, #248 + jnc 00003$ + mov b, r5 + mov r5, ar6 + mov r6, #0 + add a, #248 + jnc 00003$ + mov b, r5 + mov r5, #0 + add a, #248 + jnc 00003$ + mov b, #0 + ret +00003$: + add a, #8 + jz 00030$ + push ar0 + mov r0, a +00010$: + clr c + mov a, r7 + rrc a + mov r7, a + mov a, r6 + rrc a + mov r6, a + mov a, r5 + rrc a + mov r5, a + mov a, b + rrc a + mov b, a + djnz r0, 00010$ + pop ar0 +00030$: + __endasm; +} + +__code unsigned char _fs_natural_log_table[] = { +0xFF, 0x42, 0x2E, 0x16, // 0.693147180560 +0xF6, 0x91, 0xF9, 0x0C, // 0.405465108108 +0xF2, 0xFD, 0x23, 0x07, // 0.223143551314 +0xEE, 0xE0, 0xC4, 0x03, // 0.117783035656 +0x0C, 0xA3, 0xF0, 0x01, // 0.060624621816 +0xD8, 0x14, 0xFC, 0x00, // 0.030771658667 +0xA3, 0x02, 0x7F, 0x00, // 0.015504186536 +0x55, 0xC0, 0x3F, 0x00, // 0.007782140442 +0x0B, 0xF0, 0x1F, 0x00, // 0.003898640416 +0x01, 0xFC, 0x0F, 0x00, // 0.001951220131 +0x00, 0xFF, 0x07, 0x00, // 0.000976085973 +0xC0, 0xFF, 0x03, 0x00, // 0.000488162080 +0xF0, 0xFF, 0x01, 0x00, // 0.000244110828 +0xFC, 0xFF, 0x00, 0x00, // 0.000122062863 +0xFF, 0x7F, 0x00, 0x00, // 0.000061033294 +0x00, 0x40, 0x00, 0x00, // 0.000030517112 +0x00, 0x20, 0x00, 0x00, // 0.000015258673 +0x00, 0x10, 0x00, 0x00, // 0.000007629365 +0x00, 0x08, 0x00, 0x00, // 0.000003814690 +0x00, 0x04, 0x00, 0x00, // 0.000001907347 +0x00, 0x02, 0x00, 0x00, // 0.000000953674 +0x00, 0x01, 0x00, 0x00, // 0.000000476837 +0x80, 0x00, 0x00, 0x00, // 0.000000238419 +0x40, 0x00, 0x00, 0x00, // 0.000000119209 +0x20, 0x00, 0x00, 0x00, // 0.000000059605 +0x10, 0x00, 0x00, 0x00, // 0.000000029802 +0x08, 0x00, 0x00, 0x00, // 0.000000014901 +0x04, 0x00, 0x00, 0x00, // 0.000000007451 +0x02, 0x00, 0x00, 0x00, // 0.000000003725 +0x01, 0x00, 0x00, 0x00 // 0.000000001863 +}; + +#endif + diff --git a/device/lib/_ltoa.c b/device/lib/_ltoa.c new file mode 100644 index 0000000..82dd693 --- /dev/null +++ b/device/lib/_ltoa.c @@ -0,0 +1,59 @@ +/*------------------------------------------------------------------------- + integer to string conversion + + Written by: Bela Torok, 1999 + bela.torok@kssg.ch + usage: + + _ultoa(unsigned long value, char* string, int radix) + _ltoa(long value, char* string, int radix) + + value -> Number to be converted + string -> Result + radix -> Base of value (e.g.: 2 for binary, 10 for decimal, 16 for hex) +---------------------------------------------------------------------------*/ + +/* "11110000111100001111000011110000" base 2 */ +/* "37777777777" base 8 */ +/* "4294967295" base 10 */ +#define NUMBER_OF_DIGITS 32 /* eventually adapt if base 2 not needed */ + +#if NUMBER_OF_DIGITS < 32 +# warning _ltoa() and _ultoa() are not save for radix 2 +#endif + +#if defined (SDCC_mcs51) && defined (SDCC_MODEL_SMALL) && !defined (SDCC_STACK_AUTO) +# define MEMSPACE_BUFFER __idata /* eventually __pdata or __xdata */ +# pragma nogcse +#else +# define MEMSPACE_BUFFER +#endif + +void _ultoa(unsigned long value, char* string, unsigned char radix) +{ + char MEMSPACE_BUFFER buffer[NUMBER_OF_DIGITS]; /* no space for '\0' */ + unsigned char index = NUMBER_OF_DIGITS; + + do { + unsigned char c = '0' + (value % radix); + if (c > '9') + c += 'A' - '9' - 1; + buffer[--index] = c; + value /= radix; + } while (value); + + do { + *string++ = buffer[index]; + } while ( ++index != NUMBER_OF_DIGITS ); + + *string = 0; /* string terminator */ +} + +void _ltoa(long value, char* string, unsigned char radix) +{ + if (value < 0 && radix == 10) { + *string++ = '-'; + value = -value; + } + _ultoa(value, string, radix); +} diff --git a/device/lib/_malloc.c b/device/lib/_malloc.c new file mode 100644 index 0000000..e52fa7f --- /dev/null +++ b/device/lib/_malloc.c @@ -0,0 +1,235 @@ +/*------------------------------------------------------------------------- + malloc.c - allocate memory. + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#include +#include + +#if defined(SDCC_STACK_AUTO) || defined(SDCC_z80) || defined(SDCC_gbz80) + #define CRITICAL __critical +#else + #define CRITICAL +#endif + +#if _SDCC_MALLOC_TYPE_MLH + +typedef struct _MEMHEADER MEMHEADER; + +struct _MEMHEADER +{ + MEMHEADER * next; + MEMHEADER * prev; + unsigned int len; + unsigned char mem; +}; + +#define HEADER_SIZE (sizeof(MEMHEADER)-sizeof(char)) + +/* These variables are defined through the crt0 functions. */ +/* Base of this variable is the first byte of the heap. */ +extern MEMHEADER _sdcc_heap_start; +/* Address of this variable is the last byte of the heap. */ +extern char _sdcc_heap_end; + +void +_sdcc_heap_init(void) +{ + MEMHEADER *pbase = &_sdcc_heap_start; + unsigned int size = &_sdcc_heap_end - (char *)pbase; + + pbase->next = (MEMHEADER *)((char *)pbase + size - HEADER_SIZE); + pbase->next->next = NULL; //And mark it as last + pbase->prev = NULL; //and mark first as first + pbase->len = 0; //Empty and ready. +} + +void * +malloc (unsigned int size) +{ + register MEMHEADER * current_header; + register MEMHEADER * new_header; + register void * ret; + + if (size>(0xFFFF-HEADER_SIZE)) + { + return NULL; //To prevent overflow in next line + } + + size += HEADER_SIZE; //We need a memory for header too + current_header = &_sdcc_heap_start; + + CRITICAL + { + while (1) + { + // current + // | len next + // v v v + //....*****.........******.... + // ^^^^^^^^^ + // spare + + if ((((unsigned int)current_header->next) - + ((unsigned int)current_header) - + current_header->len) >= size) + { //if spare is more than needed + ret = ¤t_header->mem; + break; + } + current_header = current_header->next; //else try next + if (!current_header->next) + { //if end_of_list reached + ret = NULL; + break; + } + } + + if (ret) + { + if (!current_header->len) + { //This code works only for first_header in the list and only + current_header->len = size; //for first allocation + } + else + { + //else create new header at the begin of spare + new_header = (MEMHEADER * )((char *)current_header + current_header->len); + new_header->next = current_header->next; //and plug it into the chain + new_header->prev = current_header; + current_header->next = new_header; + if (new_header->next) + { + new_header->next->prev = new_header; + } + new_header->len = size; //mark as used + ret = &new_header->mem; + } + } + } + return ret; +} + +#else + + //-------------------------------------------------------------------- + //Written by Dmitry S. Obukhov, 1997 + //dso@usa.net + //-------------------------------------------------------------------- + //Modified for SDCC by Sandeep Dutta, 1999 + //sandeep.dutta@usa.net + //-------------------------------------------------------------------- + //malloc and free functions implementation for embedded system + //Non-ANSI keywords are C51 specific. + // __xdata - variable in external memory (just RAM) + //-------------------------------------------------------------------- + + #define MEMHEADER struct MAH// Memory Allocation Header + + MEMHEADER + { + MEMHEADER __xdata * next; + unsigned int len; + unsigned char mem[]; + }; + + #define HEADER_SIZE sizeof(MEMHEADER) + + MEMHEADER __xdata * _sdcc_first_memheader = NULL; + + extern __xdata char _sdcc_heap[]; + extern const unsigned int _sdcc_heap_size; + + static void init_dynamic_memory(void) + { + char __xdata * heap = (char __xdata *)_sdcc_heap; + unsigned int size = _sdcc_heap_size; + + if ( !heap ) //Reserved memory starts at 0x0000 but that's NULL... + { //So, we lost one byte! + heap++; + size--; + } + _sdcc_first_memheader = (MEMHEADER __xdata * ) heap; + //Reserve a mem for last header + _sdcc_first_memheader->next = (MEMHEADER __xdata * )(heap + size - sizeof(MEMHEADER __xdata *)); + _sdcc_first_memheader->next->next = (MEMHEADER __xdata * ) NULL; //And mark it as last + _sdcc_first_memheader->len = 0; //Empty and ready. + } + + void __xdata * malloc (unsigned int size) + { + register MEMHEADER __xdata * current_header; + register MEMHEADER __xdata * new_header; + register void __xdata * ret; + + if (size>(0xFFFF-HEADER_SIZE)) + return (void __xdata *) NULL; //To prevent overflow in next line + size += HEADER_SIZE; //We need a memory for header too + + if (!_sdcc_first_memheader) + init_dynamic_memory(); + + current_header = _sdcc_first_memheader; + CRITICAL + { + while (1) + { + + // current + // | len next + // v v v + //....*****.........******.... + // ^^^^^^^^^ + // spare + + if ((((unsigned int)current_header->next) - + ((unsigned int)current_header) - + current_header->len) >= size) + { //if spare is more than needed + ret = current_header->mem; + break; + } + current_header = current_header->next; //else try next + if (!current_header->next) + { //if end_of_list reached + ret = (void __xdata *) NULL; + break; + } + } + if (ret) + { + if (!current_header->len) + { //This code works only for first_header in the list and only + current_header->len = size; //for first allocation + } + else + { //else create new header at the begin of spare + new_header = (MEMHEADER __xdata * )((char __xdata *)current_header + current_header->len); + new_header->next = current_header->next; //and plug it into the chain + current_header->next = new_header; + new_header->len = size; //mark as used + ret = new_header->mem; + } + } + } + return ret; + } + + //END OF MODULE +#endif diff --git a/device/lib/_memcmp.c b/device/lib/_memcmp.c new file mode 100644 index 0000000..08b0634 --- /dev/null +++ b/device/lib/_memcmp.c @@ -0,0 +1,41 @@ +/*------------------------------------------------------------------------- + _memcmp.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "string.h" + +int memcmp ( + void * buf1, + void * buf2, + size_t count + ) +{ + if (!count) + return(0); + + while ( --count && *((char *)buf1) == *((char *)buf2) ) { + buf1 = (char *)buf1 + 1; + buf2 = (char *)buf2 + 1; + } + + return( *((unsigned char *)buf1) - *((unsigned char *)buf2) ); +} diff --git a/device/lib/_memcpy.c b/device/lib/_memcpy.c new file mode 100644 index 0000000..540c2cf --- /dev/null +++ b/device/lib/_memcpy.c @@ -0,0 +1,77 @@ +/*------------------------------------------------------------------------- + _memcpy.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "string.h" +#include + +#if !_SDCC_PORT_PROVIDES_MEMCPY + +#undef memcpy /* Avoid conflict with builtin memcpy() in Z80 port */ + +void * memcpy ( + void * dst, + void * src, + size_t acount + ) +{ +#if _SDCC_Z80_STYLE_LIB_OPT + +#pragma noinduction + + char * d = dst; + char * s = src; + /* PENDING: Divide first to get around sign problems */ + int count = -(acount >> 2); + + while (count) { + *d++ = *s++; + *d++ = *s++; + *d++ = *s++; + *d++ = *s++; + count++; + } + + if (acount & 2) { + *d++ = *s++; + *d++ = *s++; + } + if (acount & 1) { + *d++ = *s++; + } + return dst; +#else + void * ret = dst; + char * d = dst; + char * s = src; + + /* + * copy from lower addresses to higher addresses + */ + while (acount--) { + *d++ = *s++; + } + + return(ret); +#endif +} +#endif diff --git a/device/lib/_memmove.c b/device/lib/_memmove.c new file mode 100644 index 0000000..8d643e3 --- /dev/null +++ b/device/lib/_memmove.c @@ -0,0 +1,124 @@ +/*------------------------------------------------------------------------- + _memmove.c - part of string library functions + + Adapted By - Erik Petrich . epetrich@users.sourceforge.net + from _memcpy.c which was originally + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "string.h" +#include + +#ifndef _SDCC_PORT_PROVIDES_MEMMOVE +#define _SDCC_PORT_PROVIDES_MEMMOVE 0 +#endif + +#if !_SDCC_PORT_PROVIDES_MEMMOVE + +void * memmove ( + void * dst, + void * src, + size_t acount + ) +{ +#if _SDCC_Z80_STYLE_LIB_OPT + +#pragma noinduction + + char * d; + char * s; + /* PENDING: Divide first to get around sign problems */ + int count = -(acount >> 2); + + if (((int)src < (int)dst) && ((((int)src)+acount) > (int)dst)) { + /* + * copy from higher addresses to lower addresses + */ + d = ((char *)dst)+acount-1; + s = ((char *)src)+acount-1; + while (count) { + *d-- = *s--; + *d-- = *s--; + *d-- = *s--; + *d-- = *s--; + count++; + } + + if (acount & 2) { + *d-- = *s--; + *d-- = *s--; + } + if (acount & 1) { + *d-- = *s--; + } + } + else { + /* + * copy from lower addresses to higher addresses + */ + d = dst; + s = src; + while (count) { + *d++ = *s++; + *d++ = *s++; + *d++ = *s++; + *d++ = *s++; + count++; + } + + if (acount & 2) { + *d++ = *s++; + *d++ = *s++; + } + if (acount & 1) { + *d++ = *s++; + } + } + return dst; +#else + void * ret = dst; + char * d; + char * s; + + if (((int)src < (int)dst) && ((((int)src)+acount) > (int)dst)) { + /* + * copy from higher addresses to lower addresses + */ + d = ((char *)dst)+acount-1; + s = ((char *)src)+acount-1; + while (acount--) { + *d-- = *s--; + } + } + else { + /* + * copy from lower addresses to higher addresses + */ + d = dst; + s = src; + while (acount--) { + *d++ = *s++; + } + } + + return(ret); +#endif +} +#endif diff --git a/device/lib/_memset.c b/device/lib/_memset.c new file mode 100644 index 0000000..5b9202e --- /dev/null +++ b/device/lib/_memset.c @@ -0,0 +1,174 @@ +/*------------------------------------------------------------------------- + _memset.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + mcs51 assembler by Frieder Ferlemann (2007) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "string.h" + +#if defined (_SDCC_NO_ASM_LIB_FUNCS) || !defined (SDCC_mcs51) || \ + (!defined (SDCC_MODEL_SMALL) && !defined (SDCC_MODEL_LARGE)) || \ + (defined (SDCC_STACK_AUTO) || defined (SDCC_PARMS_IN_BANK1) ) + + void * memset ( + void * buf, + unsigned char ch , + size_t count) + { + register unsigned char * ret = buf; + + while (count--) { + *(unsigned char *) ret = ch; + ret = ((unsigned char *) ret) + 1; + } + + return buf ; + } + +#else + + /* assembler implementation for mcs51 */ + static void dummy(void) __naked + { + __asm + + /* assigning function parameters to registers. + SDCC_PARMS_IN_BANK1 or SDCC_STACK_AUTO not yet implemented. */ + #if defined (SDCC_MODEL_SMALL) + + #if defined(SDCC_NOOVERLAY) + .area DSEG (DATA) + #else + .area OSEG (OVR,DATA) + #endif + _memset_PARM_2:: + .ds 1 + _memset_PARM_3:: + .ds 2 + + .area CSEG (CODE) + + _memset:: + + ; Assign buf (b holds memspace, no need to touch) + mov r4,dpl + mov r5,dph + ; + ; Assign count + mov r6,_memset_PARM_3 + mov r7,(_memset_PARM_3 + 1) + ; + ; if (!count) return buf; + ; check for count != 0 intermangled with gymnastic + ; preparing djnz instructions + cjne r6,#0x00,COUNT_LSB_NOT_ZERO + mov a,r7 + jz MEMSET_END + dec r7 + COUNT_LSB_NOT_ZERO: + inc r7 + ; + ; This was 8 byte overhead for preparing + ; the count argument for an integer loop with two + ; djnz instructions - it might make sense to + ; let SDCC automatically generate this when + ; it encounters a loop like: + ; for(i=0;i + +#if _SDCC_MANGLES_SUPPORT_FUNS +unsigned unsigned _moduint (unsigned a, unsigned b); +#endif + +/* Assembler-functions are provided for: + mcs51 small + mcs51 small stack-auto +*/ + +#if !defined(SDCC_USE_XSTACK) && !defined(_SDCC_NO_ASM_LIB_FUNCS) +# if defined(SDCC_mcs51) +# if defined(SDCC_MODEL_SMALL) +# if defined(SDCC_STACK_AUTO) && !defined(SDCC_PARMS_IN_BANK1) +# define _MODSINT_ASM_SMALL_AUTO +# else +# define _MODSINT_ASM_SMALL +# endif +# endif +# endif +#endif + +#if defined _MODSINT_ASM_SMALL + +static void +_modsint_dummy (void) __naked +{ + __asm + + #define a0 dpl + #define a1 dph + + .globl __modsint +#if defined(SDCC_PARMS_IN_BANK1) + #define b0 (b1_0) + #define b1 (b1_1) +#else + // _modsint_PARM_2 shares the same memory with _moduint_PARM_2 + // and is defined in _moduint.c + #define b0 (__modsint_PARM_2) + #define b1 (__modsint_PARM_2 + 1) +#endif +__modsint: + ; a1 in dph + ; b1 in (__modsint_PARM_2 + 1) + + clr F0 ; Flag 0 in PSW + ; available to user for general purpose + mov a,a1 + jnb acc.7,a_not_negative + + setb F0 + + clr a + clr c + subb a,a0 + mov a0,a + clr a + subb a,a1 + mov a1,a + +a_not_negative: + + mov a,b1 + jnb acc.7,b_not_negative + + clr a + clr c + subb a,b0 + mov b0,a + clr a + subb a,b1 + mov b1,a + +b_not_negative: + + lcall __moduint + + jnb F0,not_negative + + clr a + clr c + subb a,a0 + mov a0,a + clr a + subb a,a1 + mov a1,a + +not_negative: + ret + + __endasm; +} + +#elif defined _MODSINT_ASM_SMALL_AUTO + +static void +_modsint_dummy (void) __naked +{ + __asm + + #define a0 dpl + #define a1 dph + + ar0 = 0 ; BUG register set is not considered + ar1 = 1 + + .globl __modsint + +__modsint: + + clr F0 ; Flag 0 in PSW + ; available to user for general purpose + mov a,a1 + jnb acc.7,a_not_negative + + setb F0 + + clr a + clr c + subb a,a0 + mov a0,a + clr a + subb a,a1 + mov a1,a + +a_not_negative: + + mov a,sp + add a,#-2 ; 2 bytes return address + mov r0,a ; r0 points to b1 + mov a,@r0 ; b1 + + jnb acc.7,b_not_negative + + dec r0 + + clr a + clr c + subb a,@r0 ; b0 + mov @r0,a + clr a + inc r0 + subb a,@r0 ; b1 + mov @r0,a + +b_not_negative: + + mov ar1,@r0 ; b1 + dec r0 + mov ar0,@r0 ; b0 + + lcall __modint + + jnb F0,not_negative + + clr a + clr c + subb a,a0 + mov a0,a + clr a + subb a,a1 + mov a1,a + +not_negative: + ret + + __endasm; +} + +#else // _MODSINT_ASM_ + +int _modsint (int a, int b) +{ + register int r; + + r = _moduint((a < 0 ? -a : a), + (b < 0 ? -b : b)); + + if (a < 0) + return -r; + else + return r; +} + +#endif // _MODSINT_ASM_ diff --git a/device/lib/_modslong.c b/device/lib/_modslong.c new file mode 100644 index 0000000..1ad4e1e --- /dev/null +++ b/device/lib/_modslong.c @@ -0,0 +1,267 @@ +/*------------------------------------------------------------------------- + _modslong.c - routine for modulus of 32 bit signed long + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +#if _SDCC_MANGLES_SUPPORT_FUNS +unsigned long _modulong (unsigned long a, unsigned long b); +#endif + +/* Assembler-functions are provided for: + mcs51 small + mcs51 small stack-auto +*/ + +#if !defined(SDCC_USE_XSTACK) && !defined(_SDCC_NO_ASM_LIB_FUNCS) +# if defined(SDCC_mcs51) +# if defined(SDCC_MODEL_SMALL) +# if defined(SDCC_STACK_AUTO) && !defined(SDCC_PARMS_IN_BANK1) +# define _MODSLONG_ASM_SMALL_AUTO +# else +# define _MODSLONG_ASM_SMALL +# endif +# endif +# endif +#endif + +#if defined _MODSLONG_ASM_SMALL + +static void +_modslong_dummy (void) __naked +{ + __asm + + #define a0 dpl + #define a1 dph + #define a2 b + #define a3 r1 + + .globl __modslong +#if defined(SDCC_PARMS_IN_BANK1) + #define b0 (b1_0) + #define b1 (b1_1) + #define b2 (b1_2) + #define b3 (b1_3) +#else + // _modslong_PARM_2 shares the same memory with _modulong_PARM_2 + // and is defined in _modulong.c + #define b0 (__modslong_PARM_2) + #define b1 (__modslong_PARM_2 + 1) + #define b2 (__modslong_PARM_2 + 2) + #define b3 (__modslong_PARM_2 + 3) +#endif +__modslong: + ; a3 in acc + ; b3 in (__modslong_PARM_2 + 3) + mov a3,a ; save a3 + + clr F0 ; Flag 0 in PSW + ; available to user for general purpose + jnb acc.7,a_not_negative + + setb F0 + + clr a ; a = -a; + clr c + subb a,a0 + mov a0,a + clr a + subb a,a1 + mov a1,a + clr a + subb a,a2 + mov a2,a + clr a + subb a,a3 + mov a3,a + +a_not_negative: + + mov a,b3 + jnb acc.7,b_not_negative + + clr a ; b = -b; + clr c + subb a,b0 + mov b0,a + clr a + subb a,b1 + mov b1,a + clr a + subb a,b2 + mov b2,a + clr a + subb a,b3 + mov b3,a + +b_not_negative: + + mov a,a3 ; restore a3 in acc + + lcall __modulong + + jnb F0,not_negative + + ; result in (a == r1), b, dph, dpl + clr a + clr c + subb a,a0 + mov a0,a + clr a + subb a,a1 + mov a1,a + clr a + subb a,a2 + mov a2,a + clr a + subb a,a3 + ; result in a, b, dph, dpl +not_negative: + ret + + __endasm; +} + +#elif defined _MODSLONG_ASM_SMALL_AUTO + +static void +_modslong_dummy (void) __naked +{ + __asm + + #define a0 dpl + #define a1 dph + #define a2 b + #define a3 r1 + + #define b0 r2 + #define b1 r3 + #define b2 r4 + #define b3 r5 + + ar2 = 2 ; BUG register set is not considered + ar3 = 3 + ar4 = 4 + ar5 = 5 + + .globl __modslong + +__modslong: + + ; a3 in acc + mov a3,a ; save a3 + + clr F0 ; F0 (Flag 0) + ; available to user for general purpose + jnb acc.7,a_not_negative + + setb F0 + + clr a ; a = -a; + clr c + subb a,a0 + mov a0,a + clr a + subb a,a1 + mov a1,a + clr a + subb a,a2 + mov a2,a + clr a + subb a,a3 + mov a3,a + +a_not_negative: + + mov a,sp + add a,#-2-3 ; 2 bytes return address, 3 bytes param b + mov r0,a ; r1 points to b0 + + mov ar2,@r0 ; load b0 + inc r0 ; r0 points to b1 + mov ar3,@r0 ; b1 + inc r0 + mov ar4,@r0 ; b2 + inc r0 + mov a,@r0 ; b3 + mov b3,a + + jnb acc.7,b_not_negative + + clr a ; b = -b; + clr c + subb a,b0 + mov b0,a + clr a + subb a,b1 + mov b1,a + clr a + subb a,b2 + mov b2,a + clr a + subb a,b3 + mov b3,a + +b_not_negative: + + lcall __modlong + + jnb F0,not_negative + + ; result in (a == r1), b, dph, dpl + clr a + clr c + subb a,a0 + mov a0,a + clr a + subb a,a1 + mov a1,a + clr a + subb a,a2 + mov a2,a + clr a + subb a,a3 ; result in a, b, dph, dpl + +not_negative: + ret + + __endasm; +} + +#else // _MODSLONG_ASM + +long +_modslong (long a, long b) +{ + long r; + + r = _modulong((a < 0 ? -a : a), + (b < 0 ? -b : b)); + if (a < 0) + return -r; + else + return r; +} + +#endif // _MODSLONG_ASM diff --git a/device/lib/_moduint.c b/device/lib/_moduint.c new file mode 100644 index 0000000..dc6a7ec --- /dev/null +++ b/device/lib/_moduint.c @@ -0,0 +1,195 @@ +/*------------------------------------------------------------------------- + _moduint.c :- routine for unsigned int (16 bit) modulus + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + Bug fixes by Martijn van Balen, aed@iae.nl + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* Assembler-functions are provided for: + mcs51 small + mcs51 small stack-auto +*/ + +#if !defined(SDCC_USE_XSTACK) && !defined(_SDCC_NO_ASM_LIB_FUNCS) +# if defined(SDCC_mcs51) +# if defined(SDCC_MODEL_SMALL) +# if defined(SDCC_STACK_AUTO) +# define _MODUINT_ASM_SMALL_AUTO +# else +# define _MODUINT_ASM_SMALL +# endif +# endif +# endif +#endif + +#if defined _MODUINT_ASM_SMALL || defined _MODUINT_ASM_SMALL_AUTO + +static void +_moduint_dummy (void) __naked +{ + __asm + + .globl __moduint + +__moduint: + + #define count r2 + #define al dpl + #define ah dph + +#if defined(SDCC_STACK_AUTO) && !defined(SDCC_PARMS_IN_BANK1) + + ar0 = 0 ; BUG register set is not considered + ar1 = 1 + + .globl __modint + + mov a,sp + add a,#-2 ; 2 bytes return address + mov r0,a ; r0 points to bh + mov ar1,@r0 ; load bh + dec r0 + mov ar0,@r0 ; load bl + + #define bl r0 + #define bh r1 + +__modint: ; entry point for __modsint + + +#else // SDCC_STACK_AUTO + +#if !defined(SDCC_PARMS_IN_BANK1) +#if defined(SDCC_NOOVERLAY) + .area DSEG (DATA) +#else + .area OSEG (OVR,DATA) +#endif + + .globl __moduint_PARM_2 + .globl __modsint_PARM_2 + +__moduint_PARM_2: +__modsint_PARM_2: + .ds 2 + + .area CSEG (CODE) + + #define bl (__moduint_PARM_2) + #define bh (__moduint_PARM_2 + 1) +#else + #define bl (b1_0) + #define bh (b1_1) +#endif +#endif // SDCC_STACK_AUTO + + mov a,bl ; avoid endless loop + orl a,bh + jz div_by_0 + + mov count,#1 + +loop1: mov a,bl ; b <<= 1 + add a,acc + mov bl,a + mov a,bh + rlc a + jc msbset + mov bh,a + + mov a,al ; a - b + subb a,bl ; here carry is always clear + mov a,ah + subb a,bh + + jc start + + inc count + sjmp loop1 + +start: clr c + mov a,bh ; b >>= 1; +msbset: rrc a + mov bh,a + mov a,bl + rrc a + mov bl,a + +loop2: clr c + mov a,al ; a - b + subb a,bl + + mov b,a + mov a,ah + subb a,bh + + jc smaller ; a >= b? + + mov ah,a ; -> yes; a = a - b; + mov al,b +smaller: ; -> no + clr c + mov a,bh ; b >>= 1; + rrc a + mov bh,a + mov a,bl + rrc a + mov bl,a + + djnz count,loop2 +div_by_0: + ret + + __endasm; +} + +#else // defined _MODUINT_ASM_SMALL || defined _MODUINT_ASM_SMALL_AUTO + +#define MSB_SET(x) ((x >> (8*sizeof(x)-1)) & 1) + +unsigned int +_moduint (unsigned int a, unsigned int b) +{ + unsigned char count = 0; + + + while (!MSB_SET(b)) + { + b <<= 1; + if (b > a) + { + b >>=1; + break; + } + count++; + } + do + { + if (a >= b) + a -= b; + b >>= 1; + } + while (count--); + return a; +} + +#endif // defined _MODUINT_ASM_SMALL || defined _MODUINT_ASM_SMALL_AUTO diff --git a/device/lib/_modulong.c b/device/lib/_modulong.c new file mode 100644 index 0000000..97274c4 --- /dev/null +++ b/device/lib/_modulong.c @@ -0,0 +1,362 @@ +/*------------------------------------------------------------------------- + _modulong.c - routine for modulus of 32 bit unsigned long + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + Bug fixes by Martijn van Balen, aed@iae.nl + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* Assembler-functions are provided for: + mcs51 small + mcs51 small stack-auto +*/ + +#if !defined(SDCC_USE_XSTACK) && !defined(_SDCC_NO_ASM_LIB_FUNCS) +# if defined(SDCC_mcs51) +# if defined(SDCC_MODEL_SMALL) +# if defined(SDCC_STACK_AUTO) && !defined (SDCC_PARMS_IN_BANK1) +# define _MODULONG_ASM_SMALL_AUTO +# else +# define _MODULONG_ASM_SMALL +# endif +# endif +# endif +#endif + +#if defined _MODULONG_ASM_SMALL + +static void +_modlong_dummy (void) __naked +{ + __asm + + .globl __modulong + + #define a0 dpl + #define a1 dph + #define a2 b + #define a3 r1 + #define count r0 + +__modulong: +#if defined(SDCC_PARMS_IN_BANK1) + #define b0 (b1_0) + #define b1 (b1_1) + #define b2 (b1_2) + #define b3 (b1_3) +#else +#if defined(SDCC_NOOVERLAY) + .area DSEG (DATA) +#else + .area OSEG (OVR,DATA) +#endif + + .globl __modulong_PARM_2 + .globl __modslong_PARM_2 + +__modulong_PARM_2: +__modslong_PARM_2: + .ds 4 + + .area CSEG (CODE) + + #define b0 (__modulong_PARM_2) + #define b1 (__modulong_PARM_2 + 1) + #define b2 (__modulong_PARM_2 + 2) + #define b3 (__modulong_PARM_2 + 3) +#endif + ; parameter a comes in a, b, dph, dpl + mov a3,a ; save parameter a3 + + mov a,b0 ; b == 0? avoid endless loop + orl a,b1 + orl a,b2 + orl a,b3 + jz div_by_0 + + mov count,#0 + clr c ; when loop1 jumps immediately to loop2 + +loop1: inc count + + mov a,b3 ; if (!MSB_SET(b)) + jb acc.7,loop2 + + mov a,b0 ; b <<= 1 + add a,acc + mov b0,a + mov a,b1 + rlc a + mov b1,a + mov a,b2 + rlc a + mov b2,a + mov a,b3 + rlc a + mov b3,a + + mov a,a0 ; a - b + subb a,b0 ; here carry is always clear + mov a,a1 + subb a,b1 + mov a,a2 + subb a,b2 + mov a,a3 + subb a,b3 + + jnc loop1 + + + clr c + mov a,b3 ; b >>= 1; + rrc a + mov b3,a + mov a,b2 + rrc a + mov b2,a + mov a,b1 + rrc a + mov b1,a + mov a,b0 + rrc a + mov b0,a + +loop2: ; clr c never set + mov a,a0 ; a - b + subb a,b0 + mov r4,a + mov a,a1 + subb a,b1 + mov r5,a + mov a,a2 + subb a,b2 + mov r6,a + mov a,a3 + subb a,b3 + + jc smaller ; a >= b? + + mov a3,a ; -> yes; a = a - b; + mov a2,r6 + mov a1,r5 + mov a0,r4 +smaller: ; -> no + clr c + mov a,b3 ; b >>= 1; + rrc a + mov b3,a + mov a,b2 + rrc a + mov b2,a + mov a,b1 + rrc a + mov b1,a + mov a,b0 + rrc a + mov b0,a + + djnz count,loop2 + + mov a,a3 ; prepare the return value +div_by_0: + ret + + __endasm; +} + +#elif defined _MODULONG_ASM_SMALL_AUTO + +static void +_modlong_dummy (void) __naked +{ + __asm + + .globl __modulong + +__modulong: + + #define count r0 + + #define a0 dpl + #define a1 dph + #define a2 b + #define a3 r1 + + #define b0 r2 + #define b1 r3 + #define b2 r4 + #define b3 r5 + + ar2 = 2 ; BUG register set is not considered + ar3 = 3 + ar4 = 4 + ar5 = 5 + + .globl __modlong ; entry point for __modslong + + ; parameter a comes in a, b, dph, dpl + mov a3,a ; save parameter a3 + + mov a,sp + add a,#-2-3 ; 2 bytes return address, 3 bytes param b + mov r0,a ; r1 points to b0 + + mov ar2,@r0 ; load b0 + inc r0 ; r0 points to b1 + mov ar3,@r0 ; b1 + inc r0 + mov ar4,@r0 ; b2 + inc r0 + mov ar5,@r0 ; b3 + +__modlong: ; entry point for __modslong + ; a in r1, b, dph, dpl + ; b in r5, r4, r3, r2 + + mov count,#0 + + mov a,b0 ; b == 0? avoid endless loop + orl a,b1 + orl a,b2 + orl a,b3 + jz div_by_0 + + mov count,#0 + clr c ; when loop1 jumps immediately to loop2 + +loop1: inc count + + mov a,b3 ; if (!MSB_SET(b)) + jb acc.7,loop2 + + mov a,b0 ; b <<= 1 + add a,acc + mov b0,a + mov a,b1 + rlc a + mov b1,a + mov a,b2 + rlc a + mov b2,a + mov a,b3 + rlc a + mov b3,a + + mov a,a0 ; a - b + subb a,b0 ; here carry is always clear + mov a,a1 + subb a,b1 + mov a,a2 + subb a,b2 + mov a,a3 + subb a,b3 + + jnc loop1 + + clr c + mov a,b3 ; b >>= 1; + rrc a + mov b3,a + mov a,b2 + rrc a + mov b2,a + mov a,b1 + rrc a + mov b1,a + mov a,b0 + rrc a + mov b0,a + +loop2: ; clr c never set + mov a,a0 ; a - b + subb a,b0 + mov a,a1 + subb a,b1 + mov r6,a ; d1 + mov a,a2 + subb a,b2 + mov r7,a ; d2 + mov a,a3 + subb a,b3 + + jc smaller ; a >= b? + + mov a3,a ; -> yes; a = a - b; + mov a2,r7 + mov a1,r6 + mov a,a0 + subb a,b0 + mov a0,a +smaller: ; -> no + clr c + mov a,b3 ; b >>= 1; + rrc a + mov b3,a + mov a,b2 + rrc a + mov b2,a + mov a,b1 + rrc a + mov b1,a + mov a,b0 + rrc a + mov b0,a + + djnz count,loop2 + + mov a,a3 ; prepare the return value +div_by_0: + ret + + __endasm; +} + +#else // _MODULONG_ASM + +#define MSB_SET(x) ((x >> (8*sizeof(x)-1)) & 1) + +unsigned long +_modulong (unsigned long a, unsigned long b) +{ + unsigned char count = 0; + + while (!MSB_SET(b)) + { + b <<= 1; + if (b > a) + { + b >>=1; + break; + } + count++; + } + do + { + if (a >= b) + a -= b; + b >>= 1; + } + while (count--); + + return a; +} + +#endif // _MODULONG_ASM diff --git a/device/lib/_mulint.c b/device/lib/_mulint.c new file mode 100644 index 0000000..16ad56f --- /dev/null +++ b/device/lib/_mulint.c @@ -0,0 +1,237 @@ +/*------------------------------------------------------------------------- + _mulint.c :- routine for (unsigned) int (16 bit) multiplication + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* Signed and unsigned multiplication are the same - as long as the output + has the same precision as the input. + + Assembler-functions are provided for: + ds390 + mcs51 small + mcs51 small stack-auto + mcs51 large +*/ + +#if !defined(SDCC_USE_XSTACK) && !defined(_SDCC_NO_ASM_LIB_FUNCS) +# if defined(SDCC_ds390) +# if !defined(SDCC_STACK_AUTO) +# define _MULINT_ASM_LARGE +# endif +# elif defined(SDCC_mcs51) +# if defined(SDCC_MODEL_SMALL) +# if defined(SDCC_STACK_AUTO) && !defined(SDCC_PARMS_IN_BANK1) +# define _MULINT_ASM_SMALL_AUTO +# else +# define _MULINT_ASM_SMALL +# endif +# else // must be SDCC_MODEL_LARGE +# if !defined(SDCC_STACK_AUTO) +# define _MULINT_ASM_LARGE +# endif +# endif +# endif +#endif + +#if defined(_MULINT_ASM_LARGE) + +#pragma save +#pragma less_pedantic +int +_mulint (int a, int b) +{ + a*b; // hush the compiler + + /* mulint= + (int)(lsb_a*lsb_b) + + (char)(msb_a*lsb_b)<<8 + + (char)(lsb_a*msb_b)<<8 + */ + + __asm + mov r2,dph ; msb_a + mov r3,dpl ; lsb_a + + mov b,r3 ; lsb_a +#if defined(SDCC_PARMS_IN_BANK1) + mov a,b1_0 +#else + mov dptr,#__mulint_PARM_2 + movx a,@dptr ; lsb_b +#endif + mul ab ; lsb_a*lsb_b + mov r0,a + mov r1,b + + mov b,r2 ; msb_a +#if defined(SDCC_PARMS_IN_BANK1) + mov a,b1_0 +#else + movx a,@dptr ; lsb_b +#endif + mul ab ; msb_a*lsb_b + add a,r1 + mov r1,a + + mov b,r3 ; lsb_a +#if defined(SDCC_PARMS_IN_BANK1) + mov a,b1_1 +#else + inc dptr + movx a,@dptr ; msb_b +#endif + mul ab ; lsb_a*msb_b + add a,r1 + + mov dph,a + mov dpl,r0 + ret + __endasm; +} +#pragma restore + +#elif defined(_MULINT_ASM_SMALL) || defined(_MULINT_ASM_SMALL_AUTO) + +#pragma save +#pragma less_pedantic +int +_mulint_dummy (void) __naked +{ + __asm + +__mulint: + + .globl __mulint + +#if !defined(SDCC_STACK_AUTO) || defined(SDCC_PARMS_IN_BANK1) + +#if defined(SDCC_NOOVERLAY) + .area DSEG (DATA) +#else + .area OSEG (OVR,DATA) +#endif +#if defined(SDCC_PARMS_IN_BANK1) + #define bl (b1_0) + #define bh (b1_1) +#else + #define bl (__mulint_PARM_2) + #define bh (__mulint_PARM_2 + 1) +__mulint_PARM_2: + + .globl __mulint_PARM_2 + + .ds 2 +#endif + + .area CSEG (CODE) + + ; globbered registers none + + mov a,dpl ; 1 al + mov b,bl ; 2 bl + mul ab ; 4 al * bl + xch a,dpl ; 1 store low-byte of return value, fetch al + push b ; 2 + + mov b,bh ; 2 bh + mul ab ; 4 al * bh + pop b ; 2 + add a,b ; 1 + xch a,dph ; 1 ah -> acc + + mov b,bl ; 2 bl + mul ab ; 4 ah * bl + add a,dph ; 1 + mov dph,a ; 1 + ret ; 2 + ; 30 + +#else // SDCC_STACK_AUTO + + ; globbered registers r0 + + mov a,#-2 ; 1 return address 2 bytes + add a,sp ; 1 + mov r0,a ; 1 r0 points to bh + + mov a,@r0 ; 1 bh + mov b,dpl ; 2 al + mul ab ; 4 al * bh + push acc ; 2 + + mov b,dpl ; 2 al + dec r0 ; 1 + mov a,@r0 ; 1 bl + mul ab ; 4 al * bl + + mov dpl,a ; 1 low-byte of return-value + + pop acc ; 2 + add a,b ; 1 + xch a,dph ; 1 ah -> acc + + mov b,@r0 ; 2 bl + mul ab ; 4 ah * bl + add a,dph ; 1 + mov dph,a ; 1 + + ret + +#endif // SDCC_STACK_AUTO + + __endasm; +} +#pragma restore + +#else + +union uu { + struct { unsigned char lo,hi ;} s; + unsigned int t; +} ; + +int +_mulint (int a, int b) +{ +#if !defined(SDCC_STACK_AUTO) && (defined(SDCC_MODEL_LARGE) || defined(SDCC_ds390)) // still needed for large + union uu __xdata *x; + union uu __xdata *y; + union uu t; + x = (union uu __xdata *)&a; + y = (union uu __xdata *)&b; +#else + register union uu *x; + register union uu *y; + union uu t; + x = (union uu *)&a; + y = (union uu *)&b; +#endif + + t.t = x->s.lo * y->s.lo; + t.s.hi += (x->s.lo * y->s.hi) + (x->s.hi * y->s.lo); + + return t.t; +} + +#endif + +#undef _MULINT_ASM diff --git a/device/lib/_mullong.c b/device/lib/_mullong.c new file mode 100644 index 0000000..92ec722 --- /dev/null +++ b/device/lib/_mullong.c @@ -0,0 +1,729 @@ +/*------------------------------------------------------------------------- + _mullong.c - routine for multiplication of 32 bit (unsigned) long + + Written By - Jean Louis VERN jlvern@writeme.com (1999) + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* Signed and unsigned multiplication are the same - as long as the output + has the same precision as the input. + + Assembler-functions are provided for: + mcs51 small + mcs51 small stack-auto +*/ + +#if !defined(SDCC_USE_XSTACK) && !defined(_SDCC_NO_ASM_LIB_FUNCS) +# if defined(SDCC_mcs51) +# if defined(SDCC_MODEL_SMALL) +# if defined(SDCC_STACK_AUTO) && !defined(SDCC_PARMS_IN_BANK1) +# define _MULLONG_ASM_SMALL_AUTO +# else +# define _MULLONG_ASM_SMALL +# endif +# elif defined(SDCC_MODEL_LARGE) +# if !defined(SDCC_STACK_AUTO) +# define _MULLONG_ASM_LARGE +# endif +# endif +# endif +#endif + +#if defined(_MULLONG_ASM_SMALL) || defined(_MULLONG_ASM_SMALL_AUTO) + +void +_mullong_dummy (void) __naked +{ + __asm + +__mullong: + + .globl __mullong + + ; the result c will be stored in r4...r7 + #define c0 r4 + #define c1 r5 + #define c2 r6 + #define c3 r7 + + #define a0 dpl + #define a1 dph + #define a2 r2 + #define a3 r3 + + ; c0 a0 * b0 + ; c1 a1 * b0 + a0 * b1 + ; c2 a2 * b0 + a1 * b1 + a0 * b2 + ; c3 a3 * b0 + a2 * b1 + a1 * b2 + a0 * b3 + +#if !defined(SDCC_STACK_AUTO) || defined(SDCC_PARMS_IN_BANK1) +#if defined(SDCC_PARMS_IN_BANK1) + #define b0 (b1_0) + #define b1 (b1_1) + #define b2 (b1_2) + #define b3 (b1_3) +#else +#if defined(SDCC_NOOVERLAY) + .area DSEG (DATA) +#else + .area OSEG (OVR,DATA) +#endif + +__mullong_PARM_2: + + .globl __mullong_PARM_2 + + .ds 4 + + b0 = __mullong_PARM_2 + b1 = (__mullong_PARM_2+1) + b2 = (__mullong_PARM_2+2) + b3 = (__mullong_PARM_2+3) + +#endif + .area CSEG (CODE) + + ; parameter a comes in a, b, dph, dpl + mov r2,b ; save parameter a + mov r3,a + + ; Byte 0 + mov a,a0 + mov b,b0 + mul ab ; a0 * b0 + mov c0,a + mov c1,b + + ; Byte 1 + mov a,a1 + mov b,b0 + mul ab ; a1 * b0 + add a,c1 + mov c1,a + clr a + addc a,b + mov c2,a + + mov a,a0 + mov b,b1 + mul ab ; a0 * b1 + add a,c1 + mov c1,a + mov a,b + addc a,c2 + mov c2,a + clr a + rlc a + mov c3,a + + ; Byte 2 + mov a,a2 + mov b,b0 + mul ab ; a2 * b0 + add a,c2 + mov c2,a + mov a,b + addc a,c3 + mov c3,a + + mov a,a1 + mov b,b1 + mul ab ; a1 * b1 + add a,c2 + mov c2,a + mov a,b + addc a,c3 + mov c3,a + + mov a,a0 + mov b,b2 + mul ab ; a0 * b2 + add a,c2 + mov c2,a + mov a,b + addc a,c3 + mov c3,a + + ; Byte 3 + mov a,a3 + mov b,b0 + mul ab ; a3 * b0 + add a,c3 + mov c3,a + + mov a,a2 + mov b,b1 + mul ab ; a2 * b1 + add a,c3 + mov c3,a + + mov a,a1 + mov b,b2 + mul ab ; a1 * b2 + add a,c3 + mov c3,a + + mov a,a0 + mov b,b3 + mul ab ; a0 * b3 + add a,c3 + + mov b,c2 + mov dph,c1 + mov dpl,c0 + ret + +#else // SDCC_STACK_AUTO + + ; parameter a comes in a, b, dph, dpl + mov r2,b ; save parameter a + mov r3,a + + #define a0 dpl + #define a1 dph + #define a2 r2 + #define a3 r3 + + #define b0 r1 + + mov a,#-2-3 ; 1 return address 2 bytes, b 4 bytes + add a,sp ; 1 + mov r0,a ; 1 r0 points to b0 + + ; Byte 0 + mov a,a0 + mov b,@r0 ; b0 + mov b0,b ; we need b0 several times + inc r0 ; r0 points to b1 + mul ab ; a0 * b0 + mov c0,a + mov c1,b + + ; Byte 1 + mov a,a1 + mov b,b0 + mul ab ; a1 * b0 + add a,c1 + mov c1,a + clr a + addc a,b + mov c2,a + + mov a,a0 + mov b,@r0 ; b1 + mul ab ; a0 * b1 + add a,c1 + mov c1,a + mov a,b + addc a,c2 + mov c2,a + clr a + rlc a + mov c3,a + + ; Byte 2 + mov a,a2 + mov b,b0 + mul ab ; a2 * b0 + add a,c2 + mov c2,a + mov a,b + addc a,c3 + mov c3,a + + mov a,a1 + mov b,@r0 ; b1 + mul ab ; a1 * b1 + add a,c2 + mov c2,a + mov a,b + addc a,c3 + mov c3,a + + mov a,a0 + inc r0 + mov b,@r0 ; b2 + mul ab ; a0 * b2 + add a,c2 + mov c2,a + mov a,b + addc a,c3 + mov c3,a + + ; Byte 3 + mov a,a3 + mov b,b0 + mul ab ; a3 * b0 + add a,c3 + mov c3,a + + mov a,a1 + mov b,@r0 ; b2 + mul ab ; a1 * b2 + add a,c3 + mov c3,a + + mov a,a2 + dec r0 + mov b,@r0 ; b1 + mul ab ; a2 * b1 + add a,c3 + mov c3,a + + mov a,a0 + inc r0 + inc r0 + mov b,@r0 ; b3 + mul ab ; a0 * b3 + add a,c3 + + mov b,c2 + mov dph,c1 + mov dpl,c0 + + ret + +#endif // SDCC_STACK_AUTO + + __endasm; +} + +#elif defined(_MULLONG_ASM_LARGE) + +void +_mullong_dummy (void) __naked +{ + __asm + +__mullong: + + .globl __mullong + + ; the result c will be stored in r4...r7 + #define c0 r4 + #define c1 r5 + #define c2 r6 + #define c3 r7 + + ; c0 a0 * b0 + ; c1 a1 * b0 + a0 * b1 + ; c2 a2 * b0 + a1 * b1 + a0 * b2 + ; c3 a3 * b0 + a2 * b1 + a1 * b2 + a0 * b3 + +#if !defined(SDCC_PARMS_IN_BANK1) + .area XSEG (XDATA) + +__mullong_PARM_2: + + .globl __mullong_PARM_2 + + .ds 4 +#endif + .area CSEG (CODE) + + ; parameter a comes in a, b, dph, dpl + mov r0,dpl ; save parameter a + mov r1,dph + mov r2,b + mov r3,a + + #define a0 r0 + #define a1 r1 + #define a2 r2 + #define a3 r3 + + ; Byte 0 + mov b,a0 +#if defined(SDCC_PARMS_IN_BANK1) + mov a,b1_0 ; b0 +#else + mov dptr,#__mullong_PARM_2 + movx a,@dptr ; b0 +#endif + mul ab ; a0 * b0 + mov c0,a + mov c1,b + + ; Byte 1 + mov b,a1 +#if defined(SDCC_PARMS_IN_BANK1) + mov a,b1_0 ; b0 +#else + movx a,@dptr ; b0 +#endif + mul ab ; a1 * b0 + add a,c1 + mov c1,a + clr a + addc a,b + mov c2,a + + mov b,a0 +#if defined(SDCC_PARMS_IN_BANK1) + mov a,b1_1 ; b1 +#else + inc dptr ; b1 + movx a,@dptr +#endif + mul ab ; a0 * b1 + add a,c1 + mov c1,a + mov a,b + addc a,c2 + mov c2,a + clr a + rlc a + mov c3,a + + ; Byte 2 + mov b,a1 +#if defined(SDCC_PARMS_IN_BANK1) + mov a,b1_1 ; b1 +#else + movx a,@dptr ; b1 +#endif + mul ab ; a1 * b1 + add a,c2 + mov c2,a + mov a,b + addc a,c3 + mov c3,a + + mov b,a0 +#if defined(SDCC_PARMS_IN_BANK1) + mov a,b1_2 ; b2 +#else + inc dptr ; b2 + movx a,@dptr +#endif + mul ab ; a0 * b2 + add a,c2 + mov c2,a + mov a,b + addc a,c3 + mov c3,a + + mov b,a2 +#if defined(SDCC_PARMS_IN_BANK1) + mov a,b1_0 ; b0 +#else + mov dptr,#__mullong_PARM_2 + movx a,@dptr ; b0 +#endif + mul ab ; a2 * b0 + add a,c2 + mov c2,a + mov a,b + addc a,c3 + mov c3,a + + ; Byte 3 + mov b,a3 +#if defined(SDCC_PARMS_IN_BANK1) + mov a,b1_0 ; b0 +#else + movx a,@dptr ; b0 +#endif + mul ab ; a3 * b0 + add a,c3 + mov c3,a + + mov b,a2 +#if defined(SDCC_PARMS_IN_BANK1) + mov a,b1_1 ; b1 +#else + inc dptr ; b1 + movx a,@dptr +#endif + mul ab ; a2 * b1 + add a,c3 + mov c3,a + + mov b,a1 +#if defined(SDCC_PARMS_IN_BANK1) + mov a,b1_2 ; b2 +#else + inc dptr ; b2 + movx a,@dptr +#endif + mul ab ; a1 * b2 + add a,c3 + mov c3,a + + mov b,a0 +#if defined(SDCC_PARMS_IN_BANK1) + mov a,b1_3 ; b3 +#else + inc dptr ; b3 + movx a,@dptr +#endif + mul ab ; a0 * b3 + add a,c3 + + mov b,c2 + mov dph,c1 + mov dpl,c0 + ret + + __endasm; +} + +#elif defined(SDCC_USE_XSTACK) && defined(SDCC_STACK_AUTO) + +void +_mullong_dummy (void) __naked +{ + __asm + +__mullong: + + .globl __mullong + + ; the result c will be stored in r4...r7 + #define c0 r4 + #define c1 r5 + #define c2 r6 + #define c3 r7 + + #define a0 dpl + #define a1 dph + #define a2 r2 + #define a3 r3 + + #define b0 r1 + + ; c0 a0 * b0 + ; c1 a1 * b0 + a0 * b1 + ; c2 a2 * b0 + a1 * b1 + a0 * b2 + ; c3 a3 * b0 + a2 * b1 + a1 * b2 + a0 * b3 + + ; parameter a comes in a, b, dph, dpl + mov r2,b ; save parameter a + mov r3,a + + mov a,#-4 ; 1 b 4 bytes + add a,_spx ; 1 + mov r0,a ; 1 r0 points to b0 + + ; Byte 0 + movx a,@r0 ; b0 + mov b0,a ; we need b0 several times + inc r0 ; r0 points to b1 + mov b,a0 + mul ab ; a0 * b0 + mov c0,a + mov c1,b + + ; Byte 1 + mov a,a1 + mov b,b0 + mul ab ; a1 * b0 + add a,c1 + mov c1,a + clr a + addc a,b + mov c2,a + + mov b,a0 + movx a,@r0 ; b1 + mul ab ; a0 * b1 + add a,c1 + mov c1,a + mov a,b + addc a,c2 + mov c2,a + clr a + rlc a + mov c3,a + + ; Byte 2 + mov a,a2 + mov b,b0 + mul ab ; a2 * b0 + add a,c2 + mov c2,a + mov a,b + addc a,c3 + mov c3,a + + mov b,a1 + movx a,@r0 ; b1 + mul ab ; a1 * b1 + add a,c2 + mov c2,a + mov a,b + addc a,c3 + mov c3,a + + mov b,a0 + inc r0 + movx a,@r0 ; b2 + mul ab ; a0 * b2 + add a,c2 + mov c2,a + mov a,b + addc a,c3 + mov c3,a + + ; Byte 3 + mov a,a3 + mov b,b0 + mul ab ; a3 * b0 + add a,c3 + mov c3,a + + mov b,a1 + movx a,@r0 ; b2 + mul ab ; a1 * b2 + add a,c3 + mov c3,a + + mov b,a2 + dec r0 + movx a,@r0 ; b1 + mul ab ; a2 * b1 + add a,c3 + mov c3,a + + mov b,a0 + inc r0 + inc r0 + movx a,@r0 ; b3 + mul ab ; a0 * b3 + add a,c3 + + mov b,c2 + mov dph,c1 + mov dpl,c0 + + ret + + __endasm; +} + +#else // _MULLONG_ASM + +struct some_struct { + short a ; + char b; + long c ;}; +#if defined(SDCC_hc08) +/* big endian order */ +union bil { + struct {unsigned char b3,b2,b1,b0 ;} b; + struct {unsigned short hi,lo ;} i; + unsigned long l; + struct { unsigned char b3; unsigned short i12; unsigned char b0;} bi; +} ; +#else +/* little endian order */ +union bil { + struct {unsigned char b0,b1,b2,b3 ;} b; + struct {unsigned short lo,hi ;} i; + unsigned long l; + struct { unsigned char b0; unsigned short i12; unsigned char b3;} bi; +} ; +#endif + +#if defined(SDCC_USE_XSTACK) || defined(SDCC_MODEL_MEDIUM) +# define bcast(x) ((union bil __pdata *)&(x)) +#elif (defined(SDCC_MODEL_LARGE) || defined (SDCC_ds390) || defined (SDCC_ds400)) && !defined(SDCC_STACK_AUTO) +# define bcast(x) ((union bil __xdata *)&(x)) +#elif defined(__z80) || defined(__gbz80) +# define bcast(x) ((union bil *)&(x)) +#else +# define bcast(x) ((union bil __near *)&(x)) +#endif + +/* + 3 2 1 0 + X 3 2 1 0 + ---------------------------- + 0.3 0.2 0.1 0.0 + 1.3 1.2 1.1 1.0 + 2.3 2.2 2.1 2.0 + 3.3 3.2 3.1 3.0 + ---------------------------- + |3.3|1.3|0.2|0.0| A + |2.3|0.3|0.1| B + |3.2|1.2|1.0| C + |2.2|1.1| D + |3.1|2.0| E + |2.1| F + |3.0| G + |-------> only this side 32 x 32 -> 32 +*/ +#if defined(SDCC_USE_XSTACK) +// currently the original code without u fails with --xstack +// it runs out of pointer registers +long +_mullong (long a, long b) +{ + union bil t, u; + + t.i.hi = bcast(a)->b.b0 * bcast(b)->b.b2; // A + t.i.lo = bcast(a)->b.b0 * bcast(b)->b.b0; // A + u.bi.b3 = bcast(a)->b.b0 * bcast(b)->b.b3; // B + u.bi.i12 = bcast(a)->b.b0 * bcast(b)->b.b1; // B + u.bi.b0 = 0; // B + t.l += u.l; + + t.b.b3 += bcast(a)->b.b3 * bcast(b)->b.b0; // G + t.b.b3 += bcast(a)->b.b2 * bcast(b)->b.b1; // F + t.i.hi += bcast(a)->b.b2 * bcast(b)->b.b0; // E + t.i.hi += bcast(a)->b.b1 * bcast(b)->b.b1; // D + + u.bi.b3 = bcast(a)->b.b1 * bcast(b)->b.b2; // C + u.bi.i12 = bcast(a)->b.b1 * bcast(b)->b.b0; // C + u.bi.b0 = 0; // C + t.l += u.l; + + return t.l; +} +#else +long +_mullong (long a, long b) +{ + union bil t; + + t.i.hi = bcast(a)->b.b0 * bcast(b)->b.b2; // A + t.i.lo = bcast(a)->b.b0 * bcast(b)->b.b0; // A + t.b.b3 += bcast(a)->b.b3 * bcast(b)->b.b0; // G + t.b.b3 += bcast(a)->b.b2 * bcast(b)->b.b1; // F + t.i.hi += bcast(a)->b.b2 * bcast(b)->b.b0; // E <- b lost in .lst + // bcast(a)->i.hi is free ! + t.i.hi += bcast(a)->b.b1 * bcast(b)->b.b1; // D <- b lost in .lst + + bcast(a)->bi.b3 = bcast(a)->b.b1 * bcast(b)->b.b2; // C + bcast(a)->bi.i12 = bcast(a)->b.b1 * bcast(b)->b.b0; // C + + bcast(b)->bi.b3 = bcast(a)->b.b0 * bcast(b)->b.b3; // B + bcast(b)->bi.i12 = bcast(a)->b.b0 * bcast(b)->b.b1; // B + + bcast(b)->bi.b0 = 0; // B + bcast(a)->bi.b0 = 0; // C + t.l += a; + + return t.l + b; +} +#endif + +#endif // _MULLONG_ASM diff --git a/device/lib/_realloc.c b/device/lib/_realloc.c new file mode 100644 index 0000000..357063b --- /dev/null +++ b/device/lib/_realloc.c @@ -0,0 +1,137 @@ +/*------------------------------------------------------------------------- + realloc.c - reallocate allocated memory. + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#include +#include +#include + +#if defined(SDCC_STACK_AUTO) || defined(SDCC_z80) || defined(SDCC_gbz80) + #define CRITICAL __critical +#else + #define CRITICAL +#endif + +//-------------------------------------------------------------------- +//realloc function implementation for embedded system +//Non-ANSI keywords are C51 specific. +// __xdata - variable in external memory (just RAM) +//-------------------------------------------------------------------- + +#if _SDCC_MALLOC_TYPE_MLH + +#define __xdata + +typedef struct _MEMHEADER MEMHEADER; + +struct _MEMHEADER +{ + MEMHEADER * next; + MEMHEADER * prev; + unsigned int len; + unsigned char mem; +}; + +#define HEADER_SIZE (sizeof(MEMHEADER)-sizeof(char)) +#define MEM(x) (&x->mem) + +#else + +#define MEMHEADER struct MAH// Memory Allocation Header + +MEMHEADER +{ + MEMHEADER __xdata * next; + unsigned int len; + unsigned char mem[]; +}; + +#define HEADER_SIZE sizeof(MEMHEADER) +#define MEM(x) (x->mem) + +#endif + +extern MEMHEADER __xdata * _sdcc_prev_memheader; + +// apart from finding the header +// this function also finds it's predecessor +extern MEMHEADER __xdata * _sdcc_find_memheader(void __xdata * p); + +void __xdata * realloc (void * p, size_t size) +{ + register MEMHEADER __xdata * pthis; + register MEMHEADER __xdata * pnew; + register void __xdata * ret; + + CRITICAL + { + pthis = _sdcc_find_memheader(p); + if (pthis) + { + if (size > (0xFFFF-HEADER_SIZE)) + { + ret = (void __xdata *) NULL; //To prevent overflow in next line + } + else + { + size += HEADER_SIZE; //We need a memory for header too + + if ((((unsigned int)pthis->next) - ((unsigned int)pthis)) >= size) + {//if spare is more than needed + pthis->len = size; + ret = p; + } + else + { + if ((_sdcc_prev_memheader) && + ((((unsigned int)pthis->next) - + ((unsigned int)_sdcc_prev_memheader) - + _sdcc_prev_memheader->len) >= size)) + { + pnew = (MEMHEADER __xdata * )((char __xdata *)_sdcc_prev_memheader + _sdcc_prev_memheader->len); + _sdcc_prev_memheader->next = pnew; + +#if _SDCC_MALLOC_TYPE_MLH + pthis->next->prev = pnew; +#endif + + memmove(pnew, pthis, pthis->len); + pnew->len = size; + ret = MEM(pnew); + } + else + { + ret = malloc(size - HEADER_SIZE); + if (ret) + { + memcpy(ret, MEM(pthis), pthis->len - HEADER_SIZE); + free(p); + } + } + } + } + } + else + { + ret = malloc(size); + } + } + return ret; +} +//END OF MODULE diff --git a/device/lib/_schar2fs.c b/device/lib/_schar2fs.c new file mode 100644 index 0000000..ec1d71d --- /dev/null +++ b/device/lib/_schar2fs.c @@ -0,0 +1,49 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// float __schar2fs (char c) +static void dummy(void) __naked +{ + __asm + .globl ___schar2fs +___schar2fs: + mov r4, dpl + clr a + mov r3, a + mov r2, a + mov r1, a + mov a, #134 + ljmp slong2fs_doit + __endasm; +} + +#else + +/* convert signed char to float */ +float __schar2fs (signed char sc) { + return __slong2fs(sc); +} + +#endif diff --git a/device/lib/_ser.c b/device/lib/_ser.c new file mode 100644 index 0000000..78f9bcb --- /dev/null +++ b/device/lib/_ser.c @@ -0,0 +1,157 @@ +/*KA****************************************************************** +* PROJECT: PL-One/8052 +********************************************************************** +* FILE: ser.c +********************************************************************** +* CHANGES: +* date author description +* -------------------------------------------------------------------- +* 04/26/99 we final +* 04/27/99 we comments +********************************************************************** +* DESCRIPTION: +* This file contains a simple interrupt driven serial driver with +* buffer (no check for overflow!!!). +********************************************************************** +* FUNCTIONS DECLARED: +* ser_init Initialization; must be called first +* ser_putc output one char on the serial line +* ser_getc return a char if one has been received, else 0 +* ser_printString print a 0-terminated string +* ser_charAvail return 1 if a char arrived on serial line +********************************************************************** +* NOTE: +* Remember to enable all interrupts (EA=1) outside of this module!! +********************************************************************** +* COMPILE TIME OPTIONS: - +* DEBUG OPTIONS: - +******************************************************************KE*/ +/* $Id: _ser.c 4735 2007-04-08 13:05:45Z MaartenBrock $ */ + + +#include <8052.h> + +#include "ser.h" + +#define NON_BLOCKING + +unsigned char __xdata ser_txIndexIn; +unsigned char __xdata ser_txIndexOut; +unsigned char __xdata ser_rxIndexIn; +unsigned char __xdata ser_rxIndexOut; + +unsigned char __xdata ser_txBuffer[0x100]; +unsigned char __xdata ser_rxBuffer[0x100]; + +static __bit ser_txBusy; + +void +ser_init(void) +{ + ES = 0; + + ser_txBusy = 0; + + ser_txIndexIn = 0; + ser_txIndexOut = 0; + ser_rxIndexIn = 0; + ser_rxIndexOut = 0; + + T2CON = 0x30; + + /* Baudrate = 19200, oscillator frq. of my processor is 21.4772 MHz */ + RCAP2H = 0xFF; + RCAP2L = 0xDD; + + /* enable counter */ + T2CON = 0x34; + + SCON = 0x50; + + if (TI) { + TI = 0; + } + if (RI) { + RI = 0; + } + + ES=1; +} + +void +ser_interrupt_handler(void) __interrupt 4 __using 1 +{ + ES=0; + + if (RI) { + RI = 0; + ser_rxBuffer[ser_rxIndexIn++] = SBUF; + } + + if (TI) { + TI = 0; + if (ser_txIndexIn == ser_txIndexOut) { + ser_txBusy = 0; + } + else { + SBUF = ser_txBuffer[ser_txIndexOut++]; + } + } + + ES=1; +} + +void +ser_putc(unsigned char c) +{ + ES=0; + + if (ser_txBusy) { + ser_txBuffer[ser_txIndexIn++] = c; + } + else { + ser_txBusy = 1; + SBUF = c; + } + + ES=1; +} + +unsigned char +ser_getc(void) +{ + char tmp; + +#ifdef NON_BLOCKING + if (ser_rxIndexIn != ser_rxIndexOut) { + tmp = ser_rxBuffer[ser_rxIndexOut++]; + } + else { + tmp = 0; + } +#endif + + return(tmp); +} + +void +ser_printString(char *String) +{ + while (*String) { + ser_putc(*String++); + } +} + +char +ser_charAvail(void) +{ + char ret = 0; + + if (ser_rxIndexIn != ser_rxIndexOut) { + ret = 1; + } + + return(ret); +} + +/*********************End of File************************************/ diff --git a/device/lib/_setjmp.c b/device/lib/_setjmp.c new file mode 100644 index 0000000..ee31b47 --- /dev/null +++ b/device/lib/_setjmp.c @@ -0,0 +1,348 @@ +/*------------------------------------------------------------------------- + setjmp.c - source file for ANSI routines setjmp & longjmp + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include <8051.h> +#include + +#if defined(SDCC_USE_XSTACK) + +static void dummy (void) __naked +{ + __asm + +;------------------------------------------------------------ +;Allocation info for local variables in function 'setjmp' +;------------------------------------------------------------ +;buf Allocated to registers dptr b +;------------------------------------------------------------ +;../../device/lib/_setjmp.c:180:int setjmp (jmp_buf buf) +; ----------------------------------------- +; function setjmp +; ----------------------------------------- + .globl _setjmp +_setjmp: + ar2 = 0x02 + ar3 = 0x03 + ar4 = 0x04 + ar5 = 0x05 + ar6 = 0x06 + ar7 = 0x07 + ar0 = 0x00 + ar1 = 0x01 +;../../device/lib/_setjmp.c:183:*buf++ = bpx; +; genPointerSet +; genGenPointerSet + mov a,_bpx + lcall __gptrput + inc dptr +;../../device/lib/_setjmp.c:184:*buf++ = spx; +; genPointerSet +; genGenPointerSet + mov a,_spx + lcall __gptrput + inc dptr +;../../device/lib/_setjmp.c:185:*buf++ = bp; +; genPointerSet +; genGenPointerSet + mov a,_bp + lcall __gptrput + inc dptr +;../../device/lib/_setjmp.c:186:*buf++ = SP; +; genPointerSet +; genGenPointerSet + mov a,sp + lcall __gptrput + inc dptr +;../../device/lib/_setjmp.c:187:*buf++ = *((unsigned char __data *) SP ); +; genCast +; genPointerGet +; genNearPointerGet +; genPointerSet +; genGenPointerSet + mov r0,sp + mov a,@r0 + lcall __gptrput + inc dptr +;../../device/lib/_setjmp.c:188:*buf = *((unsigned char __data *)SP - 1); +; genCast +; genMinus +; genMinusDec +; peephole 177.g optimized mov sequence + dec r0 +; genPointerGet +; genNearPointerGet + mov a,@r0 +; genPointerSet +; genGenPointerSet + lcall __gptrput +;../../device/lib/_setjmp.c:189:return 0; +; genRet + mov dptr,#0x0000 + ret + +;------------------------------------------------------------ +;Allocation info for local variables in function 'longjmp' +;------------------------------------------------------------ +;rv Allocated to stack - offset -2 +;buf Allocated to registers dptr b +;lsp Allocated to registers r5 +;------------------------------------------------------------ +;../../device/lib/_setjmp.c:192:int longjmp (jmp_buf buf, int rv) +; ----------------------------------------- +; function longjmp +; ----------------------------------------- + .globl _longjmp +_longjmp: +; genReceive + mov r0,_spx + dec r0 + movx a,@r0 + mov r2,a + dec r0 + movx a,@r0 + mov r3,a +;../../device/lib/_setjmp.c:193:bpx = *buf++; +; genPointerGet +; genGenPointerGet + lcall __gptrget + mov _bpx,a + inc dptr +;../../device/lib/_setjmp.c:194:spx = *buf++; +; genPointerGet +; genGenPointerGet + lcall __gptrget + mov _spx,a + inc dptr +;../../device/lib/_setjmp.c:195:bp = *buf++; +; genPointerGet +; genGenPointerGet + lcall __gptrget + mov _bp,a + inc dptr +;../../device/lib/_setjmp.c:196:lsp = *buf++; +; genPointerGet +; genGenPointerGet + lcall __gptrget + inc dptr +; genAssign + mov r5,a +;../../device/lib/_setjmp.c:197:*((unsigned char __data *) lsp) = *buf++; +; genCast + mov r0,a +; genPointerGet +; genGenPointerGet + lcall __gptrget + inc dptr +; genPointerSet +; genNearPointerSet + mov @r0,a +;../../device/lib/_setjmp.c:198:*((unsigned char __data *) lsp - 1) = *buf; +; genMinus +; genMinusDec + dec r0 +; genPointerGet +; genGenPointerGet + lcall __gptrget +; genPointerSet +; genNearPointerSet + mov @r0,a +;../../device/lib/_setjmp.c:199:SP = lsp; +; genAssign + mov sp,r5 +;../../device/lib/_setjmp.c:200:return rv; +; genAssign + mov dph,r2 + mov dpl,r3 +; genRet + ret + + __endasm; +} + +#elif defined(SDCC_STACK_AUTO) + +static void dummy (void) __naked +{ + __asm + +;------------------------------------------------------------ +;Allocation info for local variables in function 'setjmp' +;------------------------------------------------------------ +;buf Allocated to registers dptr b +;------------------------------------------------------------ +;../../device/lib/_setjmp.c:122:int setjmp (unsigned char *buf) +; ----------------------------------------- +; function setjmp +; ----------------------------------------- + .globl _setjmp +_setjmp: + ar2 = 0x02 + ar3 = 0x03 + ar4 = 0x04 + ar5 = 0x05 + ar6 = 0x06 + ar7 = 0x07 + ar0 = 0x00 + ar1 = 0x01 +; genReceive +;../../device/lib/_setjmp.c:125:*buf = BP; +; genPointerSet +; genGenPointerSet + mov a,_bp + lcall __gptrput + inc dptr +;../../device/lib/_setjmp.c:126:*buf = SP; +; genPointerSet +; genGenPointerSet + mov a,sp + lcall __gptrput + inc dptr +;../../device/lib/_setjmp.c:127:*buf++ = *((unsigned char __data *) SP ); +; genCast + mov r0,sp +; genPointerGet +; genNearPointerGet + mov a,@r0 +; genPointerSet +; genGenPointerSet + lcall __gptrput + inc dptr +;../../device/lib/_setjmp.c:128:*buf++ = *((unsigned char __data *)SP - 1); +; genCast +; genMinus +; genMinusDec + dec r0 +; genPointerGet +; genNearPointerGet + mov a,@r0 +; genPointerSet +; genGenPointerSet + lcall __gptrput +;../../device/lib/_setjmp.c:129:return 0; +; genRet + mov dptr,#0x0000 + ret + +;------------------------------------------------------------ +;Allocation info for local variables in function 'longjmp' +;------------------------------------------------------------ +;rv Allocated to stack - offset -3 +;buf Allocated to registers dptr b +;lsp Allocated to registers r5 +;------------------------------------------------------------ +;../../device/lib/_setjmp.c:28:int longjmp (jmp_buf buf, int rv) +; ----------------------------------------- +; function longjmp +; ----------------------------------------- + .globl _longjmp +_longjmp: + ar2 = 0x02 + ar3 = 0x03 + ar4 = 0x04 + ar5 = 0x05 + ar6 = 0x06 + ar7 = 0x07 + ar0 = 0x00 + ar1 = 0x01 +; genReceive + mov r0,sp + dec r0 + dec r0 + mov ar2,@r0 + dec r0 + mov ar3,@r0 +;../../device/lib/_setjmp.c:30:bp = *buf++; +; genPointerGet +; genGenPointerGet + lcall __gptrget + inc dptr +; genAssign + mov _bp,a +;../../device/lib/_setjmp.c:31:lsp = *buf++; +; genPointerGet +; genGenPointerGet + lcall __gptrget + inc dptr +; genAssign + mov r5,a +;../../device/lib/_setjmp.c:32:*((unsigned char __data *) lsp) = *buf++; +; genCast + mov r0,a +; genPointerGet +; genGenPointerGet + lcall __gptrget + inc dptr +; genPointerSet +; genNearPointerSet + mov @r0,a +;../../device/lib/_setjmp.c:33:*((unsigned char __data *) lsp - 1) = *buf; +; genCast +; genMinus +; genMinusDec + dec r0 +; genPointerGet +; genGenPointerGet + lcall __gptrget +; genPointerSet +; genNearPointerSet + mov @r0,a +;../../device/lib/_setjmp.c:34:SP = lsp; +; genAssign + mov sp,r5 +;../../device/lib/_setjmp.c:35:return rv; +; genRet + mov dph,r2 + mov dpl,r3 + ret + + __endasm; +} + +#else + +//extern unsigned char __data bp; + +int setjmp (jmp_buf buf) +{ + /* registers would have been saved on the + stack anyway so we need to save SP + and the return address */ +// *buf++ = bp; + *buf++ = SP; + *buf++ = *((unsigned char __data *) SP ); + *buf = *((unsigned char __data *)SP - 1); + return 0; +} + +int longjmp (jmp_buf buf, int rv) +{ + unsigned char lsp; +// bp = *buf++; + lsp = *buf++; + *((unsigned char __data *) lsp) = *buf++; + *((unsigned char __data *) lsp - 1) = *buf; + SP = lsp; + return rv; +} + +#endif diff --git a/device/lib/_sint2fs.c b/device/lib/_sint2fs.c new file mode 100644 index 0000000..7458bb0 --- /dev/null +++ b/device/lib/_sint2fs.c @@ -0,0 +1,48 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// float long __sint2fs (float x) +static void dummy(void) __naked +{ + __asm + .globl ___sint2fs +___sint2fs: + mov r4, dph + mov r3, dpl + mov r2, #0 + mov r1, #0 + mov a, #142 + ljmp slong2fs_doit + __endasm; +} + +#else + +/* convert signed int to float */ +float __sint2fs (signed int si) { + return __slong2fs(si); +} + +#endif diff --git a/device/lib/_slong2fs.c b/device/lib/_slong2fs.c new file mode 100644 index 0000000..b19c59c --- /dev/null +++ b/device/lib/_slong2fs.c @@ -0,0 +1,76 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +//float __slong2fs (long x) +static void dummy(void) __naked +{ + __asm + .globl ___slong2fs +___slong2fs: + mov r4, a + mov r3, b + mov r2, dph + mov r1, dpl + mov a, #158 + .globl slong2fs_doit +slong2fs_doit: + mov exp_a, a + clr sign_a + mov a, r4 + jnb acc.7, slong2fs_positive + setb sign_a + mov a, r1 + cpl a + add a, #1 + mov r1, a + mov a, r2 + cpl a + addc a, #0 + mov r2, a + mov a, r3 + cpl a + addc a, #0 + mov r3, a + mov a, r4 + cpl a + addc a, #0 + mov r4, a +slong2fs_positive: + lcall fs_normalize_a + ljmp fs_round_and_return + __endasm; +} + +#else + +/* convert signed long to float */ +float __slong2fs (signed long sl) { + if (sl<0) + return -__ulong2fs(-sl); + else + return __ulong2fs(sl); +} + +#endif diff --git a/device/lib/_spx.c b/device/lib/_spx.c new file mode 100644 index 0000000..86d94d8 --- /dev/null +++ b/device/lib/_spx.c @@ -0,0 +1,27 @@ +/*------------------------------------------------------------------------- + + _spx.c :- just declares bp as a variable + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +__data unsigned char spx ; +__data unsigned char _page_no__; diff --git a/device/lib/_startup.c b/device/lib/_startup.c new file mode 100644 index 0000000..0f9995d --- /dev/null +++ b/device/lib/_startup.c @@ -0,0 +1,42 @@ +/*------------------------------------------------------------------------- + _startup.c - startup routine for sdcc + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* External startup code can be written in C + here .. Special usage if this routine + returns a non-zero value then global & + static variable initialisation will be skipped */ + +#if !defined(SDCC_ds390) && !defined(SDCC_ds400) + +unsigned char _sdcc_external_startup () +{ + return 0; +} + +#else + +/* Disable "ISO C forbids an empty source file" wraning message */ +#pragma disable_warning 190 + +#endif diff --git a/device/lib/_strcat.c b/device/lib/_strcat.c new file mode 100644 index 0000000..f1c4b0e --- /dev/null +++ b/device/lib/_strcat.c @@ -0,0 +1,40 @@ +/*------------------------------------------------------------------------- + _strncat.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "string.h" + +char * strcat ( + char * dst, + char * src + ) +{ + char * cp = dst; + + while( *cp ) + cp++; /* find end of dst */ + + while( *cp++ = *src++ ) ; /* Copy src to end of dst */ + + return( dst ); /* return dst */ + +} diff --git a/device/lib/_strchr.c b/device/lib/_strchr.c new file mode 100644 index 0000000..8f4e4cb --- /dev/null +++ b/device/lib/_strchr.c @@ -0,0 +1,37 @@ +/*------------------------------------------------------------------------- + _strchr.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "string.h" + +char * strchr ( + char * string, + char ch + ) +{ + while (*string && *string != ch) + string++; + + if (*string == ch) + return(string); + return ( NULL ); +} diff --git a/device/lib/_strcmp.c b/device/lib/_strcmp.c new file mode 100644 index 0000000..1e06058 --- /dev/null +++ b/device/lib/_strcmp.c @@ -0,0 +1,56 @@ +/*------------------------------------------------------------------------- + _strcmp.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "string.h" +#include + +#if !_SDCC_PORT_PROVIDES_STRCMP + +int strcmp ( + char * asrc, + char * adst + ) +{ +#if _SDCC_Z80_STYLE_LIB_OPT +#pragma noinduction + + char ret = 0 ; + char * src = asrc; + char * dst = adst; + + while( ! (*src - *dst) && *dst) + ++src, ++dst; + + return *src - *dst; +#else + register int ret = 0 ; + + while( ! (ret = *(unsigned char *)asrc - *(unsigned char *)adst) && *adst) + ++asrc, ++adst; + + return( ret ); +#endif +} + +#endif + diff --git a/device/lib/_strcpy.c b/device/lib/_strcpy.c new file mode 100644 index 0000000..1ee5052 --- /dev/null +++ b/device/lib/_strcpy.c @@ -0,0 +1,49 @@ +/*------------------------------------------------------------------------- + _strcpy.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "string.h" +#include + +#if !_SDCC_PORT_PROVIDES_STRCPY + +char * strcpy ( + char * d, + char * s) +{ +#if _SDCC_Z80_STYLE_LIB_OPT + register char * to = d; + register char * from = s; + + while (*to++ = *from++) ; + + return d; +#else + register char * d1 = d; + + while (*d1++ = *s++) ; + + return d; +#endif +} + +#endif diff --git a/device/lib/_strcspn.c b/device/lib/_strcspn.c new file mode 100644 index 0000000..cb05646 --- /dev/null +++ b/device/lib/_strcspn.c @@ -0,0 +1,43 @@ +/*------------------------------------------------------------------------- + _strcspn.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "string.h" + +int strcspn ( + char * string , + char * control + ) +{ + register int count = 0 ; + register char ch ; + + while (ch = *string) { + if (strchr(control,ch)) + break; + else + count++ ; + string++ ; + } + + return count ; +} diff --git a/device/lib/_strlen.c b/device/lib/_strlen.c new file mode 100644 index 0000000..e2cbf42 --- /dev/null +++ b/device/lib/_strlen.c @@ -0,0 +1,79 @@ +/*------------------------------------------------------------------------- + _strlen.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + mcs51 assembler by Frieder Ferlemann (2007) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#if (!defined (SDCC_mcs51)) + + /* Generic routine first */ + int strlen ( char * str ) + { + register int i = 0 ; + + while (*str++) + i++ ; + + return i; + } + +#else + + /* Assembler version for mcs51 */ + int strlen ( char * str ) __naked + { + str; /* hush the compiler */ + + __asm + ; dptr holds pointer + ; b holds pointer memspace + ; + + ; char *ptr = str: + mov r2,dpl + mov r3,dph + ; + + ; while ( *ptr ) ptr++; + L00101$: + lcall __gptrget + jz L00102$ + inc dptr + sjmp L00101$ + ; + + L00102$: + ; return ptr - str; + clr c + mov a,dpl + subb a,r2 + mov dpl,a + ; + mov a,dph + subb a,r3 + mov dph,a + ; + ret + __endasm; + } + +#endif diff --git a/device/lib/_strncat.c b/device/lib/_strncat.c new file mode 100644 index 0000000..8268588 --- /dev/null +++ b/device/lib/_strncat.c @@ -0,0 +1,44 @@ +/*------------------------------------------------------------------------- + _strncat.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "string.h" + +char * strncat ( + char * front, + char * back, + size_t count + ) +{ + char *start = front; + + while (*front++); + + front--; + + while (count--) + if (!(*front++ = *back++)) + return(start); + + *front = '\0'; + return(start); +} diff --git a/device/lib/_strncmp.c b/device/lib/_strncmp.c new file mode 100644 index 0000000..f22ed3b --- /dev/null +++ b/device/lib/_strncmp.c @@ -0,0 +1,41 @@ +/*------------------------------------------------------------------------- + _strncmp.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "string.h" + +int strncmp ( + char * first, + char * last, + size_t count + ) +{ + if (!count) + return(0); + + while (--count && *first && *first == *last) { + first++; + last++; + } + + return( *first - *last ); +} diff --git a/device/lib/_strncpy.c b/device/lib/_strncpy.c new file mode 100644 index 0000000..505379e --- /dev/null +++ b/device/lib/_strncpy.c @@ -0,0 +1,43 @@ +/*------------------------------------------------------------------------- + _strncpy.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "string.h" + +char *strncpy ( + char * d, + char * s, + size_t n ) +{ + register char * d1 = d; + + while ( n && *s ) + { + n-- ; + *d++ = *s++ ; + } + while ( n-- ) + { + *d++ = '\0' ; + } + return d1; +} diff --git a/device/lib/_strpbrk.c b/device/lib/_strpbrk.c new file mode 100644 index 0000000..cddd369 --- /dev/null +++ b/device/lib/_strpbrk.c @@ -0,0 +1,39 @@ +/*------------------------------------------------------------------------- + _strpbrk.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +char * strpbrk ( + char * string , + char * control + ) +{ + register char ch ; + + while ( ch = *string ) { + if (strchr (control, ch )) + return string ; + } + + return (NULL); +} diff --git a/device/lib/_strrchr.c b/device/lib/_strrchr.c new file mode 100644 index 0000000..5d6a6de --- /dev/null +++ b/device/lib/_strrchr.c @@ -0,0 +1,43 @@ +/*------------------------------------------------------------------------- + _strrchr.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "string.h" + +char * strrchr ( + char * string, + char ch + ) +{ + char * start = string; + + while (*string++) /* find end of string */ + ; + /* search towards front */ + while (--string != start && *string != ch) + ; + + if (*string == ch) /* char found ? */ + return( (char *)string ); + + return (NULL) ; +} diff --git a/device/lib/_strspn.c b/device/lib/_strspn.c new file mode 100644 index 0000000..fae51a6 --- /dev/null +++ b/device/lib/_strspn.c @@ -0,0 +1,43 @@ +/*------------------------------------------------------------------------- + _strspn.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "string.h" + +int strspn ( + char * string, + char * control + ) +{ + register int count = 0; + register char ch ; + + while (ch = *string) { + if ( strchr(control,ch) ) + count++ ; + else + break ; + string++ ; + } + + return count ; +} diff --git a/device/lib/_strstr.c b/device/lib/_strstr.c new file mode 100644 index 0000000..272ad16 --- /dev/null +++ b/device/lib/_strstr.c @@ -0,0 +1,53 @@ +/*------------------------------------------------------------------------- + _strstr.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "string.h" + +char * strstr ( + char * str1, + char * str2 + ) +{ + char * cp = str1; + char * s1; + char * s2; + + if ( !*str2 ) + return str1; + + while (*cp) + { + s1 = cp; + s2 = str2; + + while ( *s1 && *s2 && !(*s1-*s2) ) + s1++, s2++; + + if (!*s2) + return(cp); + + cp++; + } + + return (NULL) ; +} diff --git a/device/lib/_strtok.c b/device/lib/_strtok.c new file mode 100644 index 0000000..ac4f68c --- /dev/null +++ b/device/lib/_strtok.c @@ -0,0 +1,67 @@ +/*------------------------------------------------------------------------- + _strtok.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "string.h" + +#if defined(SDCC_MODEL_LARGE) || defined (SDCC_MODEL_FLAT24) +#pragma noinduction +#pragma noinvariant +#endif + +char * strtok ( + char * str, + char * control ) +{ + static char * s; + register char * s1; + + if ( str ) + s = str ; + if ( !s ) + return NULL; + + while (*s) { + if (strchr(control,*s)) + s++; + else + break; + } + + s1 = s ; + + while (*s) { + if (strchr(control,*s)) { + *s++ = '\0'; + return s1 ; + } + s++ ; + } + + s = NULL; + + if (*s1) + return s1; + else + return NULL; +} + diff --git a/device/lib/_uchar2fs.c b/device/lib/_uchar2fs.c new file mode 100644 index 0000000..67caf15 --- /dev/null +++ b/device/lib/_uchar2fs.c @@ -0,0 +1,49 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// float long __uchar2fs (float x) +static void dummy(void) __naked +{ + __asm + .globl ___uchar2fs +___uchar2fs: + clr a + mov r4, dpl + mov r3, a + mov r2, a + mov r1, a + mov a, #134 + ljmp ulong2fs_doit + __endasm; +} + +#else + +/* convert unsigned char to float */ +float __uchar2fs (unsigned char uc) { + return __ulong2fs(uc); +} + +#endif diff --git a/device/lib/_uint2fs.c b/device/lib/_uint2fs.c new file mode 100644 index 0000000..75a04eb --- /dev/null +++ b/device/lib/_uint2fs.c @@ -0,0 +1,48 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// float long __uint2fs (float x) +static void dummy(void) __naked +{ + __asm + .globl ___uint2fs +___uint2fs: + clr a + mov r4, dph + mov r3, dpl + mov r2, a + mov r1, a + mov a, #142 + ljmp ulong2fs_doit + __endasm; +} + +#else + +/* convert unsigned int to float */ +float __uint2fs (unsigned int ui) { + return __ulong2fs(ui); +} + +#endif diff --git a/device/lib/_ulong2fs.c b/device/lib/_ulong2fs.c new file mode 100644 index 0000000..32a8192 --- /dev/null +++ b/device/lib/_ulong2fs.c @@ -0,0 +1,110 @@ +/* Floating point library in optimized assembly for 8051 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + + +#define SDCC_FLOAT_LIB +#include + + +#ifdef FLOAT_ASM_MCS51 + +// float long __ulong2fs (float x) +static void dummy(void) __naked +{ + __asm + .globl ___ulong2fs +___ulong2fs: + mov r4, a + mov r3, b + mov r2, dph + mov r1, dpl + mov a, #158 + .globl ulong2fs_doit +ulong2fs_doit: + clr sign_a +long2fs_doit: + mov exp_a, a + lcall fs_normalize_a + ljmp fs_round_and_return + __endasm; +} + +#else + +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +union float_long + { + float f; + long l; + }; + +float __ulong2fs (unsigned long a ) +{ + int exp = 24 + EXCESS; + volatile union float_long fl; + + if (!a) + { + return 0.0; + } + + while (a & NORM) + { + // we lose accuracy here + a >>= 1; + exp++; + } + + while (a < HIDDEN) + { + a <<= 1; + exp--; + } + +#if 1 + if ((a&0x7fffff)==0x7fffff) { + a=0; + exp++; + } +#endif + + a &= ~HIDDEN ; + /* pack up and go home */ + fl.l = PACK(0,(unsigned long)exp, a); + + return (fl.f); +} + +#endif diff --git a/device/lib/abs.c b/device/lib/abs.c new file mode 100644 index 0000000..a19a9b0 --- /dev/null +++ b/device/lib/abs.c @@ -0,0 +1,27 @@ +/*------------------------------------------------------------------------- + abs.c: computes absolute value of an integer. + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#include + +int abs(int j) +{ + return (j >= 0) ? j : -j; +} +//END OF MODULE diff --git a/device/lib/acosf.c b/device/lib/acosf.c new file mode 100644 index 0000000..fa86e13 --- /dev/null +++ b/device/lib/acosf.c @@ -0,0 +1,31 @@ +/* acosf.c: Computes arc cosine of a 32-bit float + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +#include + +float asincosf(const float x, const int isacos); + +float acosf(const float x) _FLOAT_FUNC_REENTRANT +{ + if(x== 1.0) return 0.0; + else if(x==-1.0) return PI; + else if(x== 0.0) return HALF_PI; + return asincosf(x,1); +} diff --git a/device/lib/asincosf.c b/device/lib/asincosf.c new file mode 100644 index 0000000..4e4c60a --- /dev/null +++ b/device/lib/asincosf.c @@ -0,0 +1,87 @@ +/* asincosf.c: Computes asin or acos of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +#include +#include + +#define P1 0.933935835E+0 +#define P2 -0.504400557E+0 +#define Q0 0.560363004E+1 +#define Q1 -0.554846723E+1 +#define Q2 0.100000000E+1 + +#define P(g) (P2*g+P1) +#define Q(g) ((Q2*g+Q1)*g+Q0) + +#ifdef SDCC_mcs51 + #define myconst __code +#else + #define myconst const +#endif + +float asincosf(const float x, const int isacos) +{ + float y, g, r; + int i; + + static myconst float a[2]={ 0.0, QUART_PI }; + static myconst float b[2]={ HALF_PI, QUART_PI }; + + y=fabsf(x); + i=isacos; + if (y < EPS) r=y; + else + { + if (y > 0.5) + { + i=1-i; + if (y > 1.0) + { + errno=EDOM; + return 0.0; + } + g=(0.5-y)+0.5; + g=ldexpf(g,-1); + y=sqrtf(g); + y=-(y+y); + } + else + { + g=y*y; + } + r=y+y*((P(g)*g)/Q(g)); + } + if (isacos) + { + if (x < 0.0) + r=(b[i]+r)+b[i]; + else + r=(a[i]-r)+a[i]; + } + else + { + r=(a[i]+r)+a[i]; + if (x<0.0) r=-r; + } + return r; +} diff --git a/device/lib/asinf.c b/device/lib/asinf.c new file mode 100644 index 0000000..0d5b152 --- /dev/null +++ b/device/lib/asinf.c @@ -0,0 +1,32 @@ +/* asinf.c: Computes asin(x) + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +#include + +float asincosf(const float x, const int isacos); + +float asinf(const float x) _FLOAT_FUNC_REENTRANT +{ + if(x== 1.0) return HALF_PI; + else if(x==-1.0) return -HALF_PI; + else if(x== 0.0) return 0.0; + else return asincosf(x,0); +} + diff --git a/device/lib/assert.c b/device/lib/assert.c new file mode 100644 index 0000000..229ede9 --- /dev/null +++ b/device/lib/assert.c @@ -0,0 +1,9 @@ +#include +#include + +void _assert(char *expr, const char *filename, unsigned int linenumber) +{ + printf("Assert(%s) failed at line %u in file %s.\n", + expr, linenumber, filename); + while(1); +} diff --git a/device/lib/atan2f.c b/device/lib/atan2f.c new file mode 100644 index 0000000..09d6ff9 --- /dev/null +++ b/device/lib/atan2f.c @@ -0,0 +1,45 @@ +/* atan2f.c: Computes atan2(x) where x is a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +#include +#include + +float atan2f(const float x, const float y) +{ + float r; + + if ((x==0.0) && (y==0.0)) + { + errno=EDOM; + return 0.0; + } + + if(fabsf(y)>=fabsf(x)) + { + r=atanf(x/y); + if(y<0.0) r+=(x>=0?PI:-PI); + } + else + { + r=-atanf(y/x); + r+=(x<0.0?-HALF_PI:HALF_PI); + } + return r; +} diff --git a/device/lib/atanf.c b/device/lib/atanf.c new file mode 100644 index 0000000..f254ae2 --- /dev/null +++ b/device/lib/atanf.c @@ -0,0 +1,75 @@ +/* atanf.c: Computes arctan of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +#include +#include + +#define P0 -0.4708325141E+0 +#define P1 -0.5090958253E-1 +#define Q0 0.1412500740E+1 +#define Q1 0.1000000000E+1 + +#define P(g,f) ((P1*g+P0)*g*f) +#define Q(g) (Q1*g+Q0) + +#define K1 0.2679491924 /* 2-sqrt(3) */ +#define K2 0.7320508076 /* sqrt(3)-1 */ +#define K3 1.7320508076 /* sqrt(3) */ + +#ifdef SDCC_mcs51 + #define myconst __code +#else + #define myconst const +#endif + +float atanf(const float x) _FLOAT_FUNC_REENTRANT +{ + float f, r, g; + int n=0; + static myconst float a[]={ 0.0, 0.5235987756, 1.5707963268, 1.0471975512 }; + + f=fabsf(x); + if(f>1.0) + { + f=1.0/f; + n=2; + } + if(f>K1) + { + f=((K2*f-1.0)+f)/(K3+f); + // What it is actually wanted is this more accurate formula, + // but SDCC optimizes it and then it does not work: + // f=(((K2*f-0.5)-0.5)+f)/(K3+f); + n++; + } + if(fabsf(f)1) r=-r; + r+=a[n]; + if(x<0.0) r=-r; + return r; +} diff --git a/device/lib/bpx.c b/device/lib/bpx.c new file mode 100644 index 0000000..d77829e --- /dev/null +++ b/device/lib/bpx.c @@ -0,0 +1,29 @@ +/*------------------------------------------------------------------------- + + bpx.c :- just declares bpx as a variable + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#if defined(SDCC_mcs51) + __data unsigned char bpx ; +#else + __data unsigned int bpx ; +#endif diff --git a/device/lib/ceilf.c b/device/lib/ceilf.c new file mode 100644 index 0000000..54b7c0f --- /dev/null +++ b/device/lib/ceilf.c @@ -0,0 +1,31 @@ +/* ceilf.c: Returns the integer larger or equal than x + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +#include + +float ceilf(float x) _FLOAT_FUNC_REENTRANT +{ + long r; + r=x; + if (r<0) + return r; + else + return (r+((r + +float sincosf(const float x, const int iscos); + +float cosf(const float x) _FLOAT_FUNC_REENTRANT +{ + if (x==0.0) return 1.0; + return sincosf(x, 1); +} diff --git a/device/lib/coshf.c b/device/lib/coshf.c new file mode 100644 index 0000000..3e8257e --- /dev/null +++ b/device/lib/coshf.c @@ -0,0 +1,28 @@ +/* coshf.c: Computes cosh(x) where x is a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +#include + +float sincoshf(const float x, const int iscosh); + +float coshf(const float x) _FLOAT_FUNC_REENTRANT +{ + return sincoshf(x, 1); +} diff --git a/device/lib/cotf.c b/device/lib/cotf.c new file mode 100644 index 0000000..9c5a996 --- /dev/null +++ b/device/lib/cotf.c @@ -0,0 +1,41 @@ +/* cotf.c: Computes cot(x) where x is a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +#include +#include + +float tancotf(const float x, const int iscot); + +float cotf(const float x) _FLOAT_FUNC_REENTRANT +{ + float y; + + y=fabsf(x); + if (y<1.0E-30) //This one requires more thinking... + { + errno = ERANGE; + if (x<0.0) + return -HUGE_VALF; + else + return +HUGE_VALF; + } + return tancotf(x, 1); +} + diff --git a/device/lib/ds390/Makefile.in b/device/lib/ds390/Makefile.in new file mode 100644 index 0000000..135dce7 --- /dev/null +++ b/device/lib/ds390/Makefile.in @@ -0,0 +1,61 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ + +LIB_TYPE = @LIB_TYPE@ + +CC = ../../../bin/sdcc + +PORTDIR = ../build/ds390 + +#VERBOSE = --verbose + +OBJECTS = tinibios.rel memcpyx.rel lcd390.rel i2c390.rel rtc390.rel putchar.rel + +SOURCES = $(patsubst %.rel,%.c,$(OBJECTS)) + +CPPFLAGS = -I$(srcdir)/../../include +CFLAGS = -mds390 $(CPPFLAGS) $(VERBOSE) --std-c99 + +all: $(OBJECTS) $(PORTDIR)/libds390.lib + +clean: + rm -f *.lst *.rel *.sym *.cdb *.asm \#* *~ *.rst *.hex + rm -f *.ihx temp.lnk *.map *.lib + +distclean: clean + rm -f Makefile Makefile.dep + +$(PORTDIR)/libds390.lib: $(OBJECTS) +ifeq ($(LIB_TYPE), SDCCLIB) + rm -f $@; \ + ../../../bin/sdcclib -a $@ $(OBJECTS) +else ifeq ($(LIB_TYPE), AR) + ar -Scq $@ $(OBJECTS) +else ifeq ($(LIB_TYPE), RANLIB) + ar -Scq $@ $(OBJECTS) + $(top_builddir)/bin/asranlib $@ +else + rm -f $@; + for libfile in $(basename $(OBJECTS)); do echo $$libfile >>$@; done + cp $(OBJECTS) $(PORTDIR) +endif + +%.rel: %.c + $(CC) -c $(CFLAGS) $< + +# Creating dependencies +# --------------------- +depend: Makefile.dep + +Makefile.dep: $(SOURCES) + rm -f Makefile.dep + for i in $^; do \ + $(CC) -M $(CPPFLAGS) $$i >$${i}.dep; \ + cat $${i}.dep >>Makefile.dep; \ + rm $${i}.dep; \ + done + +ifeq "$(findstring $(MAKECMDGOALS),clean distclean)" "" + -include Makefile.dep +endif diff --git a/device/lib/ds390/examples/MOVED b/device/lib/ds390/examples/MOVED new file mode 100644 index 0000000..a1e8808 --- /dev/null +++ b/device/lib/ds390/examples/MOVED @@ -0,0 +1 @@ +Moved and unpacked to sdcc/device/examples/ds390 diff --git a/device/lib/ds390/i2c390.c b/device/lib/ds390/i2c390.c new file mode 100644 index 0000000..02766a0 --- /dev/null +++ b/device/lib/ds390/i2c390.c @@ -0,0 +1,344 @@ +/* This implemenation is based on an example I once grabbed from + the Philips bbs. + Don't know who wrote it, but is has been hacked so heavily, he/she wouldn't + recogize it anyway */ + +//#define DEBUG_I2C ==> DON'T DO THIS, THIS IS A LIBRARY <== + +#ifdef DEBUG_I2C +#include +#else +#include +#endif + +// we are (ab)using the CAN CTX and CRX for serial data and serial clock +#define SCL_HIGH (P5 |= 1) +#define SCL_LOW (P5 &= ~1) +#define SDA_HIGH (P5 |= 2) +#define SDA_LOW (P5 &= ~2) + +#define SDA_OUT(b) (b ? SDA_HIGH : SDA_LOW) +#define SDA_IN ((P5>>1)&1) +#define SCL_IN (P5&1) + +/* + * I2C error values + */ + +#define I2CERR_OK 0 /* No error */ +#define I2CERR_NAK 1 /* No ACK from slave */ +#define I2CERR_LOST 2 /* Arbitration lost */ +#define I2CERR_BUS 3 /* Bus is stuck (not used yet) */ +#define I2CERR_TIMEOUT 4 /* Timeout on bus */ + +char i2cTransmitBuffer[I2C_BUFSIZE]; /* Global transfer buffers */ +char i2cReceiveBuffer[I2C_BUFSIZE]; + +static char i2cError = 0; /* Last error */ + +#define I2CDELAY 1 + +void I2CDelay(volatile long delay) { + while (delay--) + ; +} + +void I2CDumpError(char error); + +/* + * Makes sure that the bus is in a known condition. Returns 1 on success, + * 0 if some other device is pulling on the bus. + */ + +char I2CReset(void) +{ + SDA_LOW; + SCL_LOW; + SCL_HIGH; + SDA_HIGH; + i2cError = 0; + return (SCL_IN && SDA_IN); +} + + +/* + * Generates a start condition on the bus. Returns 0 on success, 1 if some + * other device is holding the bus. + */ + +char I2CStart(void) +{ + SDA_HIGH; + SCL_HIGH; + I2CDelay(I2CDELAY); + SDA_LOW; /* Pull SDA down... */ + I2CDelay(I2CDELAY); + SCL_LOW; /* ...and then SCL -> start condition. */ + I2CDelay(I2CDELAY); + return 0; +} + + +/* + * Generates a stop condition on the bus. Returns 0 on success, 1 if some + * other device is holding the bus. + */ + +char I2CStop(void) +{ + SDA_LOW; + SCL_HIGH; /* Let SCL go up */ + I2CDelay(I2CDELAY); + SDA_HIGH; /* ...and then SDA up -> stop condition. */ + I2CDelay(I2CDELAY); + + return (SCL_IN && SDA_IN); /* Both will be up, if everything is fine */ +} + + +/* + * Clock out one bit. + * Returns 0 on success, 1 if we lose arbitration. + */ + +char BitOutI2C(unsigned char bout) +{ + SDA_OUT(bout); /* Put data out on SDA */ + I2CDelay(I2CDELAY); + SCL_HIGH; /* Let SCL go up */ + while(!SCL_IN) /* Wait until all other devices are ready */ + { + // should do a timeout here + } + + if (SDA_IN != bout) /* Arbitration lost, release bus and return */ + { + SDA_HIGH; /* Should be up anyway, but make sure */ + i2cError = I2CERR_LOST; + I2CDumpError(i2cError); + return 1; + } + I2CDelay(I2CDELAY); + SCL_LOW; /* Pull SCL back down */ + I2CDelay(I2CDELAY); + return 0; /* OK */ +} + + +/* + * Clock in one bit. + */ + +char BitInI2C(void) +{ + char bin; + + // SDA is opencollector, so: + SDA_HIGH; + + SCL_HIGH; /* Let SCL go up */ + while(!SCL_IN) /* Wait for other devices */ + { + // should do a timeout here + } + bin = SDA_IN; /* Read in data */ + I2CDelay(I2CDELAY); + SCL_LOW; /* Pull SCL back up */ + I2CDelay(I2CDELAY); + return bin; /* Return the sampled bit */ +} + + +/* + * Send one byte on the bus. No start or stop conditions are generated here, + * but i2cError will be set according to the result. + * Returns 0 on success, 1 if we lose arbitration or if the slave doesn't + * acknowledge the byte. Check i2cError for the actual result on error. + */ + +char ByteOutI2C(char dat) +{ + char bit_count; + + bit_count = 8; + while(bit_count) { + if (dat & 0x80) { + if (BitOutI2C(1)) { + I2CDumpError(i2cError); + return 1; + } + } else { + if (BitOutI2C(0)) { + I2CDumpError(i2cError); + return 1; + } + } + dat <<= 1; + bit_count--; + } + + if (BitInI2C()) { + i2cError = I2CERR_NAK; + I2CDumpError(i2cError); + return 1; + } + return 0; +} + + +/* + * Reads one byte in from the slave. Ack must be 1 if this is the last byte + * to be read during this transfer, 0 otherwise (as per I2C bus specification, + * the receiving master must acknowledge all but the last byte during a + * transfer). + */ + +char I2CByteIn(char ack) +{ + char bit_count, byte_in; + + bit_count = 8; + byte_in = 0; + + while(bit_count) + { + byte_in <<= 1; + if (BitInI2C()) byte_in |= 0x01; + bit_count--; + } + + BitOutI2C(ack); + SDA_HIGH; /* Added 18-Jul-95 - thanks to Ray Bellis */ + return byte_in; +} + + +/* + * Send 'count' bytes to slave 'addr'. + * Returns 0 on success. Stop condition is sent only when send_stop is true. + */ + +char I2CSendStop(char addr, char count, char send_stop) +{ + char byteptr, byte_out; + + if (I2CStart()) return 1; + i2cError = 0; + + byte_out = addr & 0xfe; /* Ensure that it's a write address */ + count++; /* Include slave address to byte count */ + byteptr = 0; + while(count) + { + if (ByteOutI2C(byte_out)) + { + if (i2cError == I2CERR_NAK && send_stop) I2CStop(); + return i2cError; + } + byte_out = i2cTransmitBuffer[byteptr]; + byteptr++; + count--; + } + + if (send_stop) I2CStop(); + return 0; +} + + +/* + * Read in 'count' bytes from slave 'addr'. + * Returns 0 on success. + */ + +char i2c_recv(char addr, char count) +{ + char byteptr, byte_in; + + if (I2CStart()) return 1; + i2cError = 0; + byteptr = 0; + + byte_in = addr | 0x01; + + if (ByteOutI2C(byte_in)) + { + if (i2cError == I2CERR_NAK) I2CStop(); + return i2cError; + } + + while(count) + { + count-=1; + if (count) { + byte_in = I2CByteIn(0); + } else { + byte_in = I2CByteIn(1); /* No ACK during last byte */ + } + i2cReceiveBuffer[byteptr] = byte_in; + byteptr++; + } + + I2CStop(); + + return (i2cError ? 1 : 0); +} + + +/* + * Write 'tx_count' bytes to slave 'addr', then use a repeated start condition + * to read 'rx_count' bytes from the same slave during the same transfer. + * Returns 0 on success, 1 otherwise. On error, check i2cError for the actual + * error value. + */ + +char I2CSendReceive(char addr, char tx_count, char rx_count) +{ + if (I2CSendStop(addr, tx_count, 0)) + { + /* If send fails, abort but don't send a stop condition if we lost + arbitration */ + + if (i2cError != I2CERR_LOST) I2CStop(); + return 1; + } + + SDA_HIGH; /* One of these may be low now, in which case the next */ + SCL_HIGH; /* start condition wouldn't be detected so make */ + I2CDelay(I2CDELAY); /* sure that they're up and wait for one delay slot */ + + if (i2c_recv((char)(addr|0x01), rx_count)) return 1; + return (i2cError ? 1 : 0); +} + +/* + * Dump an error message. + */ + +void I2CDumpError(char error) +{ +#ifdef DEBUG_I2C + switch(error) + { + case 0: + puts("I2C: OK."); + break; + case I2CERR_NAK: + puts("I2C: Slave didn't acknowledge"); + break; + case I2CERR_LOST: + puts("I2C: Lost arbitration with another master"); + break; + case I2CERR_TIMEOUT: + puts("I2C: Timeout on bus"); + break; + case I2CERR_BUS: + puts("I2C: The bus is stuck"); + break; + default: + puts("I2C: Unknown error"); + break; + } +#else + error; // hush the compiler +#endif +} diff --git a/device/lib/ds390/lcd390.c b/device/lib/ds390/lcd390.c new file mode 100644 index 0000000..6b0feda --- /dev/null +++ b/device/lib/ds390/lcd390.c @@ -0,0 +1,174 @@ +/*------------------------------------------------------------------------- + lcd.c - lcd routines for the DS80C390 (tested on TINI) + + Written By - Johan Knol, johan.knol@iduna.nl + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include +#include +#include + +#define LCD_COLLUMNS 20 +#define LCD_ROWS 4 + +/* set the dd ram addresses for the rows + this one is for a 20x4 LCD +*/ +static unsigned char lcdLinesStart[LCD_ROWS]={0, 0x40, 0x14, 0x54}; + +/* Commercial TINI stick connector boards don't support rw + control for the lcd-display. + My own board does, and it makes it much faster. +*/ + +//#define LCD_RW + +__xdata __at (0x380002) static unsigned char lcdIwr; +__xdata __at (0x38000a) static unsigned char lcdDwr; + +#ifdef LCD_RW + +__xdata __at (0x380003) static unsigned char lcdIrd; +__xdata __at (0x38000b) static unsigned char lcdDrd; + +#define LcdWait { while (lcdIrd&0x80) ; } + +#else // ifdef LCD_RW + +// wait for 100us +#define LcdWait { ClockMicroSecondsDelay(100) ; } + +#endif // ifdef LCD_RW + +void LcdInit() { + + ClockMilliSecondsDelay(16); // >15 ms + + lcdIwr=0x38 ; + ClockMilliSecondsDelay(5); // >4.1 ms + + lcdIwr=0x38; + ClockMicroSecondsDelay(101); // >100 us + + lcdIwr=0x38; + ClockMicroSecondsDelay(101); // >100 us + + lcdIwr=0x38; // interface 8 bit + ClockMicroSecondsDelay(41); // >40 us + + lcdIwr=0x0c; // display on + ClockMicroSecondsDelay(41); // >40 us + + LcdClear(); +} + +void LcdOn() { + lcdIwr=0x0c; // display on + LcdWait; +} + +void LcdOff() { + lcdIwr=0x08; // display off + LcdWait; +} + +void LcdCursorOn() { + // TODO +} + +void LcdCursorOff() { + // TODO +} + +void LcdScrollOn() { + // TODO +} + +void LcdScrollOff() { + // TODO +} + +void LcdCharDefine() { + // TODO +} + +void LcdClear() { + lcdIwr=0x01; // display clear + ClockMilliSecondsDelay(6); // > 5ms +} + +void LcdHome() { + lcdIwr=0x80; // set dd ram address 0 + LcdWait; +} + +void LcdGoto(unsigned int collumnRow) { // msb=collumn, lsb=row + lcdIwr=0x80 + \ + lcdLinesStart[collumnRow&0xff] + (collumnRow>>8); + LcdWait; +} + +void LcdPutChar(char c) { + lcdDwr=c; + LcdWait; +} + +void LcdPutString (char *string) { + char c; + while (c=*string++) { + LcdPutChar (c); + } +} + +void LcdLPutString (unsigned int collumnRow, char *string) { + LcdGoto(collumnRow); + LcdPutString(string); +} + +// let's hope that no one ever printf's more than the display width, +// however they will :), so to be sure +static char lcdPrintfBuffer[LCD_COLLUMNS*4]; + +void LcdPrintf (const char *format, ...) __reentrant { + va_list arg; + + va_start (arg, format); + vsprintf (lcdPrintfBuffer, format, arg); + puts (lcdPrintfBuffer); + LcdPutString(lcdPrintfBuffer); + + va_end (arg); +} + +void LcdLPrintf (unsigned int collumnRow, const char *format, ...) __reentrant { + va_list arg; + + LcdGoto(collumnRow); + + // we can not just call LcdPrintf since we have no idea what is on the stack, + // so we have to do it all over again + va_start (arg, format); + vsprintf (lcdPrintfBuffer, format, arg); + + LcdPutString(lcdPrintfBuffer); + + va_end (arg); +} diff --git a/device/lib/ds390/memcpyx.c b/device/lib/ds390/memcpyx.c new file mode 100644 index 0000000..efab450 --- /dev/null +++ b/device/lib/ds390/memcpyx.c @@ -0,0 +1,93 @@ +#include + +void __xdata * memcpyx ( + void __xdata * dst, + void __xdata * src, + int count + ) __naked +{ + /* Shut compiler up about unused parameters. */ + dst; src; count; + +/* AUTO_TOGGLE uses the '390 DPTS toggle bit. */ +#define AUTO_TOGGLE +__asm + ; Destination is in DPTR. Save it on stack so we can return it at end. + + push dpx + push dph + push dpl + + mov dps, #0x1 ; Alternate DPTR. + + ; count is in _memcpyx_PARM_3 + mov dptr, #_memcpyx_PARM_3 + movx a, @dptr + inc dptr + mov r2, a + movx a, @dptr + mov r3, a + + ; src is in _memcpyx_PARM_2 + mov dptr, #_memcpyx_PARM_2 + movx a, @dptr + inc dptr + push acc + movx a, @dptr + inc dptr + push acc + movx a, @dptr + mov dpx1, a + pop dph1 + pop dpl1 + +#ifdef AUTO_TOGGLE + mov dps, #0x21 ; Current DPTR is alt DPTR, toggle after each op. +#else + mov dps, #0x0 ; Current DPTR is normal DPTR, no toggle. +#endif + + ; src is in alt DPTR, dst is in normal DPTR, count is in r2/r3. + + ; If we have zero bytes to copy, quick out. + mov a, r2 + orl a, r3 + jz _memcpy_done + + ; increment r3 if r2 != 0 (makes djnz end-of-loop sequence possible). + inc r3 + cjne r2, #0x0, _memcpyx_loopTop + dec r3 + +_memcpyx_loopTop: + +#ifdef AUTO_TOGGLE + movx a, @dptr + movx @dptr, a + inc dptr + inc dptr +#else + inc dps + movx a, @dptr + inc dptr + dec dps + movx @dptr, a + inc dptr +#endif + + djnz r2, _memcpyx_loopTop + djnz r3, _memcpyx_loopTop + +_memcpy_done: + +#ifdef AUTO_TOGGLE + mov dps, #0x0 +#endif + + pop dpl + pop dph + pop dpx + ret +__endasm; + +} diff --git a/device/lib/ds390/putchar.c b/device/lib/ds390/putchar.c new file mode 100644 index 0000000..8a90f60 --- /dev/null +++ b/device/lib/ds390/putchar.c @@ -0,0 +1,36 @@ +/*------------------------------------------------------------------------- + putchar.c - putchar implementation for DS80C390 + + Written By - Maarten Brock, sourceforge.brock@dse.nl + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include +#include + +void putchar (char c) +{ + Serial0PutChar(c); +} + +extern char getchar(void) +{ + return Serial0GetChar(); +} diff --git a/device/lib/ds390/rtc390.c b/device/lib/ds390/rtc390.c new file mode 100644 index 0000000..ec07e98 --- /dev/null +++ b/device/lib/ds390/rtc390.c @@ -0,0 +1,107 @@ +/*------------------------------------------------------------------------- + rtc390.c - rtc routines for the DS1315 (tested on TINI) + + Written By - Johan Knol, johan.knol@iduna.nl + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include +#include +#include +#include + +/* this is the address of the ds1315 phantom time chip, although + it doesn't really matter as long as it's in the 300000-3fffff + range since the chip only uses CE3* +*/ + +__xdata __at (0x310000) static volatile unsigned char rtc; + +// this is the 64bit pattern that has to be recognized by the ds1315 +__code unsigned char rtcMagic[8]={0xc5,0x3a,0xa3,0x5c,0xc5,0x3a,0xa3,0x5c}; + +#define BCDtoINT(x) (((x)&0x0f)+((x)>>4)*10) +#define INTtoBCD(x) (((x)%10)+(((x)/10)<<4)) + +static void RtcSync(void) { + unsigned char dummy, byte,bitMask; + + // reset rtc chip + dummy=rtc; + + // say the magic word + for (byte=0; byte<8; byte++) { + for (bitMask=0x01; bitMask; bitMask<<=1) { + rtc = (rtcMagic[byte]&bitMask) ? 0xff : 0x00; + } + } +} + +unsigned char RtcRead(struct tm *rtcDate) { + unsigned char rtcBytes[8]; + unsigned char byte,bitMask; + + RtcSync(); + + for (byte=0; byte<8; byte++) { + rtcBytes[byte]=0; + for (bitMask=0x01; bitMask; bitMask<<=1) { + if (rtc&1) { + rtcBytes[byte]|=bitMask; + } + } + } + rtcDate->tm_year=BCDtoINT(rtcBytes[7])+100; // year since 1900 + rtcDate->tm_mon=BCDtoINT(rtcBytes[6])-1; // jan=0 + rtcDate->tm_mday=BCDtoINT(rtcBytes[5]); + rtcDate->tm_wday=(rtcBytes[4]&0x07)-1; // monday=0? + rtcDate->tm_hour=BCDtoINT(rtcBytes[3]); + rtcDate->tm_min=BCDtoINT(rtcBytes[2]); + rtcDate->tm_sec=BCDtoINT(rtcBytes[1]); + rtcDate->tm_hundredth=BCDtoINT(rtcBytes[0]); + if ((rtcBytes[4]&0x30) || (rtcBytes[3]&0x80)) { + //oscillator not running, reset not active or in 12h mode + return 0; + } + return 1; +} + +void RtcWrite(struct tm *rtcDate) { + unsigned char rtcBytes[8]; + unsigned char byte,bitMask; + + rtcBytes[7]=INTtoBCD(rtcDate->tm_year%100); + rtcBytes[6]=INTtoBCD(rtcDate->tm_mon)+1; + rtcBytes[5]=INTtoBCD(rtcDate->tm_mday); + rtcBytes[4]=(INTtoBCD(rtcDate->tm_wday)+1)&0x07; //set 24h mode + rtcBytes[3]=INTtoBCD(rtcDate->tm_hour)&0x3f; // oscilator on, reset on + rtcBytes[2]=INTtoBCD(rtcDate->tm_min); + rtcBytes[1]=INTtoBCD(rtcDate->tm_sec); + //rtcBytes[0]=INTtoBCD(rtcDate->hundredth); + rtcBytes[0]=0; + + RtcSync(); + + for (byte=0; byte<8; byte++) { + for (bitMask=0x01; bitMask; bitMask<<=1) { + rtc = (rtcBytes[byte]&bitMask) ? 0xff : 0x00; + } + } +} diff --git a/device/lib/ds390/tinibios.c b/device/lib/ds390/tinibios.c new file mode 100644 index 0000000..1f6363d --- /dev/null +++ b/device/lib/ds390/tinibios.c @@ -0,0 +1,587 @@ +/*------------------------------------------------------------------------- + tinibios.c - startup and serial routines for the DS80C390 (tested on TINI) + + Written By - Johan Knol, johan.knol@iduna.nl + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include +#include + +#define TIMED_ACCESS(sfr,value) { TA=0xaa; TA=0x55; sfr=value; } + +unsigned char _sdcc_external_startup(void) +{ + IE=0; // disable ALL interrupts + + // use A19..16 and !CE3..0, no CAN + TIMED_ACCESS(P4CNT,0x3f); + + // use !PCE3..0, serial 1 at P5.2/3 + TIMED_ACCESS(P5CNT,0x27); + + // disable watchdog + EWT=0; + + // watchdog set to 9.1 seconds + // CKCON|=0xc0; + + // default stretch cycles for MOVX + //CKCON = (CKCON&0xf8)|(CPU_MOVX_STRETCH&0x07); + CKCON=0xf9; + + // use internal 4k RAM as data(stack) memory at 0x400000 and + // move CANx memory access to 0x401000 and upwards + // use !CE* for program and/or data memory access + TIMED_ACCESS(MCON,0xaf); + + // select default cpu speed + CpuSpeed(CPU_SPEED); + + __asm + ; save the 24-bit return address + pop ar2; msb + pop ar1 + pop ar0; lsb + + + mov _TA,#0xaa; timed access + mov _TA,#0x55 + mov _ACON,#0x06; 24 bit addresses, 10 bit stack at 0x400000 + + mov _ESP,#0x00; reinitialize the stack + mov _SP,#0x00 + + ; restore the 24-bit return address + push ar0; lsb + push ar1 + push ar2; msb + __endasm; + + // Copy the Interrupt Vector Table (128 bytes) from 0x10000 to 0x100000 + // This isn't needed for older bootloaders than the 0515, but it won't harm + __asm + push dpx + push dph + push dpl + push dps + push b + push acc + mov dps,#0x00 ; make sure no autoincrement in progress + mov dptr,#0x10000 ; from + inc dps ; switch to alternate dptr + mov dptr,#0x100000 ; to + mov b,#0x80 ; count + +_Startup390CopyIVT: + inc dps + movx a,@dptr + inc dptr + inc dps + movx @dptr,a + inc dptr + djnz b,_Startup390CopyIVT + + pop acc + pop b + pop dps + pop dpl + pop dph + pop dpx + __endasm; + + // global interrupt enable, all masks cleared + // let the Gods be with us :) + IE = 0x80; + + Serial0Init(SERIAL_0_BAUD,1); + //Serial1Init(SERIAL_1_BAUD,1); + ClockInit(); + //RtcInit(); + //WatchDogInit(); + + // signal _sdcc_gsinit_startup to initialize data (call _sdcc_init_data) + return 0; +} + +/* Set the cpu speed in clocks per machine cycle, valid values are: + 1024: Power management mode + 4: Divide-by-4 mode + 2: Use frequency multiplier (2x) + 1: Use frequency multiplier (4x) (Don't do this on a TINI at 18.432MHz) + + TODO: TINI seems to support only 2 and 4: write only bits in PMR ? +*/ + +unsigned int cpuSpeed; + +void CpuSpeed(unsigned int speed) +{ +#if 0 + while (0 && (EXIF&0x04)) + ; // cpu operates from ring buffer +#endif + PMR = 0x80; // div4, CTM off, multiplier 2x + switch (speed) + { + case 1: + PMR=0x88; // div4, CTM off, multiplier 4x + PMR=0x98; // div4, CTM on, multiplier 4x + while ((EXIF&0x08)==0) { + ; // wait for the multiplier to be ready + } + PMR = 0x18; // use multiplier + cpuSpeed=speed; + break; + case 2: + PMR=0x90; // div4, CTM on, multilier 2x + while ((EXIF&0x08)==0) { + ; // wait for the multiplier to be ready + } + PMR = 0x10; // use multiplier + cpuSpeed=speed; + break; + case 4: + // nothing to do + cpuSpeed=speed; + break; + case 1024: + PMR = 0xc0; // div1024, CTM off + cpuSpeed=speed; + break; + } +} + +// now the serial0 stuff + +// just to make the code more readable +#define S0RBS SERIAL_0_RECEIVE_BUFFER_SIZE + +// this is a ring buffer and can overflow at anytime! +static volatile unsigned char receive0Buffer[S0RBS]; +static volatile int receive0BufferHead=0; +static volatile int receive0BufferTail=0; +// no buffering for transmit +static volatile char transmit0IsBusy=0; + +static __data unsigned char serial0Buffered; + +/* Initialize serial0. + + Available baudrates are from 110 upto 115200 (using 16-bit timer 2) + If baud==0, the port is disabled. + + If buffered!=0, characters received are buffered using an interrupt +*/ + +void Serial0Init (unsigned long baud, unsigned char buffered) +{ + if (baud==0) { + ES0=0; // disable interrupts + SCON0 &= 0xef; // disable receiver + return; + } + + ES0 = 0; // disable serial channel 0 interrupt + TR2 = 0; // stop timer 2 + + // set 8 bit uart with variable baud from timer 1/2 + // enable receiver and clear RI and TI + SCON0 = 0x50; + + PCON |= 0x80; // clock is 16x bitrate + CKCON|=0x20; // timer uses xtal/4 + + T2MOD=0; // no fancy functions + T2CON=0x34; // start timer as a baudrate generator for serial0 + + // set the baud rate + Serial0Baud(baud); + + serial0Buffered=buffered; + + if (buffered) { + RI_0=TI_0=0; // clear "pending" interrupts + ES0 = 1; // enable serial channel 0 interrupt + } else { + RI_0=0; // receive buffer empty + TI_0=1; // transmit buffer empty + } +} + +void Serial0Baud(unsigned long baud) +{ + TR2=0; // stop timer + baud=-((long)OSCILLATOR/(32*baud)); + TL2=RCAP2L= baud; + TH2=RCAP2H= baud>>8; + TF2=0; // clear overflow flag + TR2=1; // start timer +} + +void Serial0IrqHandler (void) __interrupt 4 +{ + if (RI_0) { + receive0Buffer[receive0BufferHead]=SBUF0; + receive0BufferHead=(receive0BufferHead+1)&(S0RBS-1); + if (receive0BufferHead==receive0BufferTail) { + /* buffer overrun, sorry :) */ + receive0BufferTail=(receive0BufferTail+1)&(S0RBS-1); + } + RI_0=0; + } + if (TI_0) { + TI_0=0; + transmit0IsBusy=0; + } +} + +char Serial0CharArrived(void) +{ + if (serial0Buffered) { + if (receive0BufferHead!=receive0BufferTail) + return receive0Buffer[receive0BufferTail]; + } else { + if (RI_0) + return SBUF0; + } + return 0; +} + +void Serial0PutChar (char c) +{ + if (serial0Buffered) { + while (transmit0IsBusy) + ; + transmit0IsBusy=1; + SBUF0=c; + } else { + while (!TI_0) + ; + SBUF0=c; + TI_0=0; + } +} + +char Serial0GetChar (void) +{ + char c; + if (serial0Buffered) { + while (receive0BufferHead==receive0BufferTail) + ; + c=receive0Buffer[receive0BufferTail]; + ES0=0; // disable serial interrupts + receive0BufferTail=(receive0BufferTail+1)&(S0RBS-1); + ES0=1; // enable serial interrupts + } else { + while (!RI_0) + ; + c=SBUF0; + RI_0=0; + } + return c; +} + +void Serial0SendBreak() +{ + P3 &= ~0x02; + ClockMilliSecondsDelay(2); + P3 |= 0x02; +} + +void Serial0Flush() +{ + ES0=0; // disable interrupts + receive0BufferHead=receive0BufferTail=0; + RI_0=0; + if (serial0Buffered) { + TI_0=0; + ES0=1; // enable interrupts + } else { + TI_0=1; + } +} + +/* now let's go for the serial1 stuff, basically it's a replicate of + serial0 except it uses timer 1 +*/ + +// just to make the code more readable +#define S1RBS SERIAL_1_RECEIVE_BUFFER_SIZE + +// this is a ring buffer and can overflow at anytime! +static volatile unsigned char receive1Buffer[S1RBS]; +static volatile int receive1BufferHead=0; +static volatile int receive1BufferTail=0; +// no buffering for transmit +static volatile char transmit1IsBusy=0; + +static __data unsigned char serial1Buffered; + +/* Initialize serial1. + + Available baudrates are from 4800 upto 115200 (using 8-bit timer 1) + If baud==0, the port is disabled. + + If buffered!=0, characters received are buffered using an interrupt +*/ + +void Serial1Init (unsigned long baud, unsigned char buffered) +{ + if (baud==0) { + ES1=0; // disable interrupt + SCON1 &= 0xef; // disable receiver + return; // and don't touch it + } + + ES1 = 0; // disable channel 1 interrupt + TR1 = 0; // stop timer 1 + + // set 8 bit uart with variable baud from timer 1 + // enable receiver and clear RI and TI + SCON1 = 0x50; + + WDCON |= 0x80; // clock is 16x bitrate + CKCON|=0x10; // timer uses xtal/4 + + TMOD = (TMOD&0x0f) | 0x20; // timer 1 is an 8bit auto-reload counter + + // set the baud rate + Serial1Baud(baud); + + serial1Buffered=buffered; + + if (buffered) { + RI_1=TI_1=0; // clear "pending" interrupts + ES1 = 1; // enable serial channel 1 interrupt + } else { + RI_1=0; // receive buffer empty + TI_1=1; // transmit buffer empty + } +} + +void Serial1Baud(unsigned long baud) +{ + TR1=0; // stop timer + baud=-((long)OSCILLATOR/(32*baud)); + TL1=TH1 = baud; + TF1=0; // clear overflow flag + TR1=1; // start timer +} + +void Serial1IrqHandler (void) __interrupt 7 +{ + if (RI_1) { + receive1Buffer[receive1BufferHead]=SBUF1; + receive1BufferHead=(receive1BufferHead+1)&(S1RBS-1); + if (receive1BufferHead==receive1BufferTail) /* buffer overrun, sorry :) */ + receive1BufferTail=(receive1BufferTail+1)&(S1RBS-1); + RI_1=0; + } + if (TI_1) { + TI_1=0; + transmit1IsBusy=0; + } +} + +char Serial1CharArrived(void) +{ + if (serial1Buffered) { + if (receive1BufferHead!=receive1BufferTail) + return receive1Buffer[receive1BufferTail]; + } else { + if (RI_1) + return SBUF1; + } + return 0; +} + +void Serial1PutChar (char c) +{ + if (serial1Buffered) { + while (transmit1IsBusy) + ; + transmit1IsBusy=1; + SBUF1=c; + } else { + while (!TI_1) + ; + SBUF1=c; + TI_1=0; + } +} + +char Serial1GetChar (void) +{ + char c; + if (serial1Buffered) { + while (receive1BufferHead==receive1BufferTail) + ; + c=receive1Buffer[receive1BufferTail]; + ES1=0; // disable serial interrupts + receive1BufferTail=(receive1BufferTail+1)&(S1RBS-1); + ES1=1; // enable serial interrupts + } else { + while (!RI_1) + ; + c=SBUF1; + RI_1=0; + } + return c; +} + +void Serial1SendBreak() +{ + P5 &= ~0x08; + ClockMilliSecondsDelay(2); + P5 |= 0x08; +} + +void Serial1Flush() +{ + ES1=0; // disable interrupts + receive1BufferHead=receive1BufferTail=0; + RI_1=0; + if (serial1Buffered) { + TI_1=0; + ES1=1; // enable interrupts + } else { + TI_1=1; + } +} + +// now let's go for the clock stuff + +// these REALLY need to be in data space for the irq routine! +static __data unsigned long milliSeconds=0; +static __data unsigned int timer0ReloadValue; + +void ClockInit() +{ + unsigned long timerReloadValue=OSCILLATOR/1000; + + switch (cpuSpeed) { + case 4: timerReloadValue/=4; break; + case 1: // not tested yet + case 2: // not tested yet + default: timerReloadValue/=2; break; + } + timer0ReloadValue=~timerReloadValue; + // initialise timer 0 + ET0=0; // disable timer interrupts initially + TCON = (TCON&0xcc)|0x00; // stop timer, clear overflow + TMOD = (TMOD&0xf0)|0x01; // 16 bit counter + CKCON|=0x08; // timer uses xtal/4 + + TL0=timer0ReloadValue&0xff; + TH0=timer0ReloadValue>>8; + + ET0=1; // enable timer interrupts + TR0=1; // start timer +} + +// This needs to be SUPER fast. What we really want is: + +#if 0 +void junk_ClockIrqHandler (void) __interrupt 10 +{ + TL0=timer0ReloadValue&0xff; + TH0=timer0ReloadValue>>8; + milliSeconds++; +} +#else +// but look at the code, and the pushes and pops, so: +void ClockIrqHandler (void) __interrupt 1 __naked +{ + __asm + push acc + push psw + mov _TL0,_timer0ReloadValue + mov _TH0,_timer0ReloadValue+1 + clr a + inc _milliSeconds+0 + cjne a,_milliSeconds+0,_ClockIrqHandlerDone + inc _milliSeconds+1 + cjne a,_milliSeconds+1,_ClockIrqHandlerDone + inc _milliSeconds+2 + cjne a,_milliSeconds+2,_ClockIrqHandlerDone + inc _milliSeconds+3 + _ClockIrqHandlerDone: + pop psw + pop acc + reti + __endasm; +} +#endif + +// we can't just use milliSeconds +unsigned long ClockTicks(void) +{ + unsigned long ms; + ET0=0; + ms=milliSeconds; + ET0=1; + return ms; +} + +void ClockMilliSecondsDelay(unsigned long delay) +{ + long ms=ClockTicks()+delay; + + while (ms>ClockTicks()) + ; +} + +// stolen from Kevin Vigor, works only for TINI at default speed +void ClockMicroSecondsDelay(unsigned int delay) +{ + delay; /* shut compiler up. */ + + __asm + + ; delay is in dpl/dph + mov r0, dpl + mov r1, dph + + mov a, r0 + orl a, r1 ; quick out for zero case. + jz _usDelayDone + + inc r1 + cjne r0, #0, _usDelayLoop + dec r1 + + _usDelayLoop: + nop + nop + nop + nop + nop + nop + nop ; 7 nops + djnz r0, _usDelayLoop ; 3 cycles x 1 = 3 cycles + ; 10 cycles per iter + ; we want 9.216, but more is better + ; than less. + djnz r1, _usDelayLoop + _usDelayDone: + + __endasm; +} diff --git a/device/lib/ds400/Makefile.in b/device/lib/ds400/Makefile.in new file mode 100644 index 0000000..f29c914 --- /dev/null +++ b/device/lib/ds400/Makefile.in @@ -0,0 +1,61 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ + +LIB_TYPE = @LIB_TYPE@ + +CC = ../../../bin/sdcc + +PORTDIR = ../build/ds400 + +#VERBOSE = --verbose + +OBJECTS = tinibios.rel memcpyx.rel ds400rom.rel + +SOURCES = $(patsubst %.rel,%.c,$(OBJECTS)) + +CPPFLAGS = -I$(srcdir)/../../include +CFLAGS = -mds400 $(CPPFLAGS) $(VERBOSE) --std-c99 + +all: $(OBJECTS) $(PORTDIR)/libds400.lib + +clean: + rm -f *.lst *.rel *.sym *.cdb *.asm \#* *~ *.rst *.hex + rm -f *.ihx temp.lnk *.map *.lib + +distclean: clean + rm -f Makefile Makefile.dep + +$(PORTDIR)/libds400.lib: $(OBJECTS) +ifeq ($(LIB_TYPE), SDCCLIB) + rm -f $@; \ + ../../../bin/sdcclib -a $@ $(OBJECTS) +else ifeq ($(LIB_TYPE), AR) + ar -Scq $@ $(OBJECTS) +else ifeq ($(LIB_TYPE), RANLIB) + ar -Scq $@ $(OBJECTS) + $(top_builddir)/bin/asranlib $@ +else + rm -f $@; + for libfile in $(basename $(OBJECTS)); do echo $$libfile >>$@; done + cp $(OBJECTS) $(PORTDIR) +endif + +%.rel: %.c + $(CC) -c $(CFLAGS) $< + +# Creating dependencies +# --------------------- +depend: Makefile.dep + +Makefile.dep: $(SOURCES) + rm -f Makefile.dep + for i in $^; do \ + $(CC) -M $(CPPFLAGS) $$i >$${i}.dep; \ + cat $${i}.dep >>Makefile.dep; \ + rm $${i}.dep; \ + done + +ifeq "$(findstring $(MAKECMDGOALS),clean distclean)" "" + -include Makefile.dep +endif diff --git a/device/lib/ds400/ds400rom.c b/device/lib/ds400/ds400rom.c new file mode 100644 index 0000000..b3b9cf5 --- /dev/null +++ b/device/lib/ds400/ds400rom.c @@ -0,0 +1,409 @@ +// Interface to the DS80C400 ROM functions. Largely based on code released +// by Dallas, hence the following copyright. + +// --------------------------------------------------------------------------- +// Copyright (C) 2003 Dallas Semiconductor Corporation, All Rights Reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included +// in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +// IN NO EVENT SHALL DALLAS SEMICONDUCTOR BE LIABLE FOR ANY CLAIM, DAMAGES +// OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// +// Except as contained in this notice, the name of Dallas Semiconductor +// shall not be used except as stated in the Dallas Semiconductor +// Branding Policy. +// --------------------------------------------------------------------------- + +#include +#include + +// ROM globals, taken from startup400.a51 +__data unsigned char __at (0x68) DSS_wos_crit_count; +__data unsigned int __at (0x6b) DSS_timerReload; +__data unsigned char __at (0x6d) DSS_curr_pc[3]; +__data unsigned char __at (0x72) DSS_sched[3]; +__data unsigned char __at (0x74) DSS_ms_count[5]; +__data unsigned char __at (0x7b) DSS_hb_chandle[5]; + +// Register bank 3 equates. +#define R0_B3 0x18 +#define R1_B3 0x19 +#define R2_B3 0x1A +#define R3_B3 0x1B +#define R4_B3 0x1C +#define R5_B3 0x1D +#define R6_B3 0x1E +#define R7_B3 0x1F + + +// The top of the redirect function table in RAM. +#define CALL_TABLE_TOP 256 + +// The bank the ROM is stored in. Should be 0FFh for production +// 400's. Change this value when running with a debug ROM. + +#define ROM_BANK 0xFF + +// The address of the ROM export table is stored +// at (ROM_BANK << 16) | ROM_EXPORTTABLE_OFFS + +#define ROM_EXPORTTABLE_OFFS 2 + +// +// Each entry in the ROM export table is 3 bytes. +// +#define ROMXT_ENTRYSIZE 3 + +// +// The number of functions in the ROM export table is stored +// first in the export table. +// +#define ROMXT_NUMFUNCTIONS (0 * ROMXT_ENTRYSIZE) + +// +// ROM EXPORT TABLE FUNCTIONS (denoted with ROMXT) +// + +// UTILITY functions +#define ROMXT_CRC16 (1 * ROMXT_ENTRYSIZE) // +#define ROMXT_MEM_CLEAR_16 (2 * ROMXT_ENTRYSIZE) // +#define ROMXT_MEM_COPY_16 (3 * ROMXT_ENTRYSIZE) // +#define ROMXT_MEM_COMPARE (4 * ROMXT_ENTRYSIZE) // +#define ROMXT_ADD_DPTR1_16 (5 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_ADD_DPTR2_16 (6 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_SUB_DPTR1_16 (7 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_SUB_DPTR2_16 (8 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_GETPSEUDORANDOM (9 * ROMXT_ENTRYSIZE) // + +// MEMORY MGR +#define ROMXT_KERNELMALLOC (10 * ROMXT_ENTRYSIZE) // not exposed +#define ROMXT_KERNELFREE (11 * ROMXT_ENTRYSIZE) // not exposed +#define ROMXT_MM_MALLOC (12 * ROMXT_ENTRYSIZE) // exposed as redirected function +#define ROMXT_MM_MALLOC_DIRTY (13 * ROMXT_ENTRYSIZE) // exposed as redirected function +#define ROMXT_MM_FREE (14 * ROMXT_ENTRYSIZE) // exposed as redirected function +#define ROMXT_MM_DEREF (15 * ROMXT_ENTRYSIZE) // exposed as redirected function +#define ROMXT_GETFREERAM (16 * ROMXT_ENTRYSIZE) // exposed as redirected function + +// SOCKET functions +#define ROMXT_ROM_SOCKET (17 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_CLOSESOCKET (18 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_SENDTO (19 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_RECVFROM (20 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_CONNECT (21 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_BIND (22 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_LISTEN (23 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_ACCEPT (24 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_RECV (25 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_SEND (26 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_GETSOCKOPT (27 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_SETSOCKOPT (28 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_GETSOCKNAME (29 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_GETPEERNAME (30 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_CLEANUP (31 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_AVAIL (32 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_JOIN (33 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_LEAVE (34 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_PING (35 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_GETNETWORKPARAMS (36 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_SETNETWORKPARAMS (37 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_GETIPV6PARAMS (38 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_GETETHERNETSTATUS (39 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_GETTFTPSERVER (40 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_SETTFTPSERVER (41 * ROMXT_ENTRYSIZE) // +#define ROMXT_ETH_PROCESSINTERRUPT (42 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_ARP_GENERATEREQUEST (43 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_NET_ETH0_MAC_ID (44 * ROMXT_ENTRYSIZE) // + +// DHCP functions +#define ROMXT_DHCP_INIT (45 * ROMXT_ENTRYSIZE) // +#define ROMXT_DHCP_SETUP (46 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_DHCP_STARTUP (47 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_DHCP_RUN (48 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_DHCP_STATUS (49 * ROMXT_ENTRYSIZE) // +#define ROMXT_DHCP_STOP (50 * ROMXT_ENTRYSIZE) // +#define ROMXT_DHCPNOTIFY (51 * ROMXT_ENTRYSIZE) // empty redirect stub, not implemented + +// TFTP functions +#define ROMXT_TFTP_INIT (52 * ROMXT_ENTRYSIZE) // +#define ROMXT_TFTP_FIRST (53 * ROMXT_ENTRYSIZE) // +#define ROMXT_TFTP_NEXT (54 * ROMXT_ENTRYSIZE) // +#define ROMXT_TFTP_MSG (55 * ROMXT_ENTRYSIZE) // + +// SCHEDULER functions +#define ROMXT_TASK_GENESIS (56 * ROMXT_ENTRYSIZE) // +#define ROMXT_TASK_GETCURRENT (57 * ROMXT_ENTRYSIZE) // +#define ROMXT_TASK_GETPRIORITY (58 * ROMXT_ENTRYSIZE) // +#define ROMXT_TASK_SETPRIORITY (59 * ROMXT_ENTRYSIZE) // +#define ROMXT_TASK_FORK (60 * ROMXT_ENTRYSIZE) // +#define ROMXT_TASK_KILL (61 * ROMXT_ENTRYSIZE) // +#define ROMXT_TASK_SUSPEND (62 * ROMXT_ENTRYSIZE) // +#define ROMXT_TASK_SLEEP (63 * ROMXT_ENTRYSIZE) // +#define ROMXT_TASK_SIGNAL (64 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_TASK_SWITCH_IN (65 * ROMXT_ENTRYSIZE) // empty redirect stub, not implemented +#define ROMXT_ROM_TASK_SWITCH_OUT (66 * ROMXT_ENTRYSIZE) // empty redirect stub, not implemented +#define ROMXT_ENTERCRITSECTION (67 * ROMXT_ENTRYSIZE) // +#define ROMXT_LEAVECRITSECTION (68 * ROMXT_ENTRYSIZE) // + +// INIT functions +#define ROMXT_ROM_INIT (69 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_COPYIVT (70 * ROMXT_ENTRYSIZE) // +#define ROMXT_ROM_REDIRECT_INIT (71 * ROMXT_ENTRYSIZE) // +#define ROMXT_MM_INIT (72 * ROMXT_ENTRYSIZE) // +#define ROMXT_KM_INIT (73 * ROMXT_ENTRYSIZE) // +#define ROMXT_OW_INIT (74 * ROMXT_ENTRYSIZE) // +#define ROMXT_NETWORK_INIT (75 * ROMXT_ENTRYSIZE) // +#define ROMXT_ETH_INIT (76 * ROMXT_ENTRYSIZE) // +#define ROMXT_INIT_SOCKETS (77 * ROMXT_ENTRYSIZE) // +#define ROMXT_TICK_INIT (78 * ROMXT_ENTRYSIZE) // + +// Timer Interrupt vectors +#define ROMXT_WOS_TICK (79 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_BLOB (80 * ROMXT_ENTRYSIZE) // not implemented for C compiler + +// Maintenance functions +#define ROMXT_WOS_IOPOLL (81 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_IP_PROCESSRECEIVEQUEUES (82 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_IP_PROCESSOUTPUT (83 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_TCP_RETRYTOP (84 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_ETH_PROCESSOUTPUT (85 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_IGMP_GROUPMAINTAINENCE (86 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_IP6_PROCESSRECEIVEQUEUES (87 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_IP6_PROCESSOUTPUT (88 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_PARAMBUFFER (89 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_RAM_TOP (90 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_BOOT_MEMBEGIN (91 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_BOOT_MEMEND (92 * ROMXT_ENTRYSIZE) // not implemented for C compiler + +// 1-Wire +#define ROMXT_OWM_FIRST (93 * ROMXT_ENTRYSIZE) // +#define ROMXT_OWM_NEXT (94 * ROMXT_ENTRYSIZE) // +#define ROMXT_OWM_RESET (95 * ROMXT_ENTRYSIZE) // +#define ROMXT_OWM_BYTE (96 * ROMXT_ENTRYSIZE) // +#define ROMXT_OWM_SEARCH (97 * ROMXT_ENTRYSIZE) // not implemented for C compiler +#define ROMXT_OW_ROMID (98 * ROMXT_ENTRYSIZE) // + +// Misc, extras, late additions +#define ROMXT_AUTOBAUD (99 * ROMXT_ENTRYSIZE) +#define ROMXT_TFTP_CLOSE (100 * ROMXT_ENTRYSIZE) + + +#define ROMRT_ENTRYSIZE 3 + +// +// ROM REDIRECT TABLE FUNCTIONS (denoted with ROMRT) +// +#define ROMRT_KERNELMALLOC ( 1 * ROMRT_ENTRYSIZE) +#define ROMRT_KERNELFREE ( 2 * ROMRT_ENTRYSIZE) +#define ROMRT_MALLOC ( 3 * ROMRT_ENTRYSIZE) +#define ROMRT_FREE ( 4 * ROMRT_ENTRYSIZE) +#define ROMRT_MALLOCDIRTY ( 5 * ROMRT_ENTRYSIZE) +#define ROMRT_DEREF ( 6 * ROMRT_ENTRYSIZE) +#define ROMRT_GETFREERAM ( 7 * ROMRT_ENTRYSIZE) +#define ROMRT_GETTIMEMILLIS ( 8 * ROMRT_ENTRYSIZE) +#define ROMRT_GETTHREADID ( 9 * ROMRT_ENTRYSIZE) +#define ROMRT_THREADRESUME (10 * ROMRT_ENTRYSIZE) +#define ROMRT_THREADIOSLEEP (11 * ROMRT_ENTRYSIZE) +#define ROMRT_THREADIOSLEEPNC (12 * ROMRT_ENTRYSIZE) +#define ROMRT_THREADSAVE (13 * ROMRT_ENTRYSIZE) +#define ROMRT_THREADRESTORE (14 * ROMRT_ENTRYSIZE) +#define ROMRT_SLEEP (15 * ROMRT_ENTRYSIZE) +#define ROMRT_GETTASKID (16 * ROMRT_ENTRYSIZE) +#define ROMRT_INFOSENDCHAR (17 * ROMRT_ENTRYSIZE) +#define ROMRT_IP_COMPUTECHECKSUM_SOFTWARE (18 * ROMRT_ENTRYSIZE) +#define ROMRT_0 (19 * ROMRT_ENTRYSIZE) // undefined +#define ROMRT_DHCPNOTIFY (20 * ROMRT_ENTRYSIZE) +#define ROMRT_ROM_TASK_CREATE (21 * ROMRT_ENTRYSIZE) +#define ROMRT_ROM_TASK_DUPLICATE (22 * ROMRT_ENTRYSIZE) +#define ROMRT_ROM_TASK_DESTROY (23 * ROMRT_ENTRYSIZE) +#define ROMRT_ROM_TASK_SWITCH_IN (24 * ROMRT_ENTRYSIZE) +#define ROMRT_ROM_TASK_SWITCH_OUT (25 * ROMRT_ENTRYSIZE) +#define ROMRT_OWIP_READCONFIG (26 * ROMRT_ENTRYSIZE) +#define ROMRT_SETMACID (27 * ROMRT_ENTRYSIZE) +#define ROMRT_UNDEREF (28 * ROMRT_ENTRYSIZE) + + +#define GETC \ + clr a \ + movc a, @a+dptr + + +// expects function number in R6_B3 (low byte) & R7_B3 (high byte) +void _romcall(void) __naked +{ +__asm + push dpx ; dptr0 preserved here + push dph + push dpl + + ; point to the address of the table + mov dptr, #(ROM_BANK << 16 | ROM_EXPORTTABLE_OFFS) + + push acc ; acc preserved here + push b ; b preserved here + inc dptr + GETC ; get the address of the table + push acc + inc dptr + GETC + add a, R6_B3 ; add function offset to the table + mov dpl, a + pop acc + addc a, R7_B3 + mov dph, a + + ; + ; dpx is the same, all in the same bank + ; + inc dptr ; get the target address of the function we want + GETC + mov b, a + inc dptr + GETC + mov R3_B3, a + mov R4_B3, b + mov R5_B3, dpx ; high byte does not change + pop b ; b restored here + pop acc ; acc restored here + pop dpl ; dptr0 preserved here + pop dph + pop dpx + push R3_B3 ; push the target address + push R4_B3 + push R5_B3 + ret ; this is not a ret, it is a call! + + ; the called function ends with a ret which will return to our original caller. +__endasm ; +} + +// expects function number in R6_B3 (low byte) & R7_B3 (high byte) +void _romredirect(void) __naked +{ +__asm + push dpx + push dph + push dpl + push acc + ; dptr = CALL_TABLE_TOP + function offset. + mov a, #(CALL_TABLE_TOP & 0xff) + add a, R6_B3 ; add function offset to the table + mov dpl, a + mov a, #((CALL_TABLE_TOP >> 8) & 0xff) + addc a, R7_B3 + mov dph, a + mov dpx, #((CALL_TABLE_TOP >> 16) & 0xff) + movx a, @dptr ; read high byte + mov R5_B3, a + inc dptr + movx a, @dptr ; read mid byte + mov R4_B3, a + inc dptr + movx a, @dptr ; read low byte + mov R3_B3, a + pop acc ; restore acc and dptr + pop dpl + pop dph + pop dpx + push R3_B3 ; push low byte of target address + push R4_B3 + push R5_B3 ; push high byte of target address + ret ; this is not a ret, it is a call! + + ; the called function ends with a ret which will return to our original caller. +__endasm; +} + + +// This macro is invalid for the standard C preprocessor, since it +// includes a hash character in the expansion, hence the SDCC specific +// pragma. +#pragma sdcc_hash + +#define ROMCALL(x) \ + mov R6_B3, #(x & 0xff) \ + mov R7_B3, #((x >> 8) & 0xff) \ + lcall __romcall + +#define ROMREDIRECT(x) \ + mov R6_B3, #(x & 0xff) \ + mov R7_B3, #((x >> 8) & 0xff) \ + lcall __romredirect + + +// init_rom: the ds400 ROM_INIT ROM function. +unsigned char init_rom(void __xdata *loMem, + void __xdata *hiMem) __naked +{ + // shut compiler up about unused parameters. + loMem; + hiMem; + +__asm + ; load params. + ; loMem is already in DPTR. + mov r2, dpx + mov r1, dph + mov r0, dpl + ; hiMem is in _init_rom_PARM_2 + mov dptr, #_init_rom_PARM_2 + mov r5, dpx + mov r4, dph + mov r3, dpl + + ROMCALL(ROMXT_ROM_INIT) + + ; result is in acc, move to dpl for C convention. + mov dpl, a + ret +__endasm ; +} + +// DSS_gettimemillis: note that the ROM actually returns 5 bytes of time, +// we're discarding the high byte here. +unsigned long task_gettimemillis_long(void) __naked +{ +__asm + ; no parameters to load. + ROMREDIRECT(ROMRT_GETTIMEMILLIS) + ; results in r4 - r0, return in DPTR/B + mov dpl, r0 + mov dph, r1 + mov dpx, r2 + mov b, r3 + ret +__endasm; +} + +unsigned char task_getthreadID(void) __naked +{ +__asm + ; no parameters to load. + ROMREDIRECT(ROMRT_GETTHREADID) + ; results in acc, return in dpl + mov dpl, a + ret +__endasm; +} + +unsigned int task_gettickreload(void) +{ + return DSS_timerReload; +} + +void task_settickreload(unsigned int rl) +{ + DSS_timerReload = rl; +} + diff --git a/device/lib/ds400/memcpyx.c b/device/lib/ds400/memcpyx.c new file mode 100644 index 0000000..7f9d813 --- /dev/null +++ b/device/lib/ds400/memcpyx.c @@ -0,0 +1,78 @@ +#include + +// FIXME: can optimize even further on '400 with auto-increment/auto-toggle. + +void __xdata * memcpyx ( + void __xdata * dst, + void __xdata * src, + int count + ) __naked +{ + /* Shut compiler up about unused parameters. */ + dst; src; count; + +__asm + ; Destination is in DPTR. Save it on stack so we can return it at end. + + push dpx + push dph + push dpl + + mov dps, #0x1 ; Alternate DPTR. + + ; count is in _memcpyx_PARM_3 + mov dptr, #_memcpyx_PARM_3 + movx a, @dptr + inc dptr + mov r2, a + movx a, @dptr + mov r3, a + + ; src is in _memcpyx_PARM_2 + mov dptr, #_memcpyx_PARM_2 + movx a, @dptr + inc dptr + push acc + movx a, @dptr + inc dptr + push acc + movx a, @dptr + mov dpx1, a + pop dph1 + pop dpl1 + + mov dps, #0x21 ; Current DPTR is alt DPTR, toggle after each op. + + ; src is in alt DPTR, dst is in normal DPTR, count is in r2/r3. + + ; If we have zero bytes to copy, quick out. + mov a, r2 + orl a, r3 + jz _memcpy_done + + ; increment r3 if r2 != 0 (makes djnz end-of-loop sequence possible). + inc r3 + cjne r2, #0x0, _memcpyx_loopTop + dec r3 + +_memcpyx_loopTop: + + movx a, @dptr + movx @dptr, a + inc dptr + inc dptr + + djnz r2, _memcpyx_loopTop + djnz r3, _memcpyx_loopTop + +_memcpy_done: + + mov dps, #0x0 + + pop dpl + pop dph + pop dpx + ret +__endasm; + +} diff --git a/device/lib/ds400/tinibios.c b/device/lib/ds400/tinibios.c new file mode 100644 index 0000000..3a8e0f3 --- /dev/null +++ b/device/lib/ds400/tinibios.c @@ -0,0 +1,350 @@ +/*------------------------------------------------------------------------- + tinibios.c - startup and serial routines for the DS80C400 (tested on TINIM400) + + Written By - Johan Knol, johan.knol@iduna.nl + + Further hacked by Kevin Vigor with invaluable assistance from Bob Heise. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include +#include + +#include + +#define TIMED_ACCESS(sfr,value) { TA=0xaa; TA=0x55; sfr=value; } + +unsigned char _sdcc_external_startup(void) +{ + IE = 0; // Disable all interrupts. + + PSW = 0; + + __asm + ; save the 24-bit return address + pop ar2; msb + pop ar1 + pop ar0; lsb + + + mov _ESP,#0x00; reinitialize the stack + mov _SP,#0x00 + + ; restore the 24-bit return address + push ar0; lsb + push ar1 + push ar2; msb + __endasm; + + // Stub: call rom_init here, then fixup IVT. + // + + Serial0Init(1, 0); // baud argument ignored. + + IE = 0x80; // Enable interrupts. + + return 0; +} + +// now the serial0 stuff + +// just to make the code more readable +#define S0RBS SERIAL_0_RECEIVE_BUFFER_SIZE + +// this is a ring buffer and can overflow at anytime! +static volatile unsigned char receive0Buffer[S0RBS]; +static volatile int receive0BufferHead=0; +static volatile int receive0BufferTail=0; +// no buffering for transmit +static volatile char transmit0IsBusy=0; + +static __data unsigned char serial0Buffered; + +/* Initialize serial0. + + Available baudrates are from 110 upto 115200 (using 16-bit timer 2) + If baud==0, the port is disabled. + + If buffered!=0, characters received are buffered using an interrupt +*/ + + +#define TIMER_RELOAD (65536 - ((OSCILLATOR) / (32 * SERIAL_0_BAUD))) + +void Serial0Init (unsigned long baud, unsigned char buffered) +{ + ES0 = 0; // disable serial channel 0 interrupt + +#if 0 + // Need no port setup, done by boot rom. + baud; +#else + SCON0 = 0x5A; // 10 bit serial 0, use timer baud rate, enable recieving + RCAP2H = (TIMER_RELOAD >> 8) & 0xff; + RCAP2L = TIMER_RELOAD & 0xff; + T2CON = 0x30; // Enable timer 2 for serial port + TR2 = 1; // Set timer 2 to run + + baud; +#endif + + serial0Buffered=buffered; + + if (buffered) { + installInterrupt(Serial0IrqHandler, 0x23); + RI_0=TI_0=0; // clear "pending" interrupts + ES0 = 1; // enable serial channel 0 interrupt + } else { + RI_0=0; // receive buffer empty + TI_0=1; // transmit buffer empty + } +} + +void Serial0SwitchToBuffered(void) +{ + IE &= ~0x80; + + serial0Buffered = 1; + installInterrupt(Serial0IrqHandler, 0x23); + RI_0=TI_0=0; // clear "pending" interrupts + ES0 = 1; // enable serial channel 0 interrupt + + IE |= 0x80; +} + +void Serial0IrqHandler (void) __interrupt 4 +{ + if (RI_0) { + receive0Buffer[receive0BufferHead]=SBUF0; + receive0BufferHead=(receive0BufferHead+1)&(S0RBS-1); + if (receive0BufferHead==receive0BufferTail) { + /* buffer overrun, sorry :) */ + receive0BufferTail=(receive0BufferTail+1)&(S0RBS-1); + } + RI_0=0; + } + if (TI_0) { + TI_0=0; + transmit0IsBusy=0; + } +} + +char Serial0CharArrived(void) +{ + if (serial0Buffered) { + if (receive0BufferHead!=receive0BufferTail) + return receive0Buffer[receive0BufferTail]; + } else { + if (RI_0) + return SBUF0; + } + return 0; +} + +void Serial0PutChar (char c) +{ + if (serial0Buffered) { + while (transmit0IsBusy) + ; + transmit0IsBusy=1; + SBUF0=c; + } else { + while (!TI_0) + ; + TI_0 = 0; + SBUF0=c; + } +} + +char Serial0GetChar (void) +{ + char c; + if (serial0Buffered) { + while (receive0BufferHead==receive0BufferTail) + ; + c=receive0Buffer[receive0BufferTail]; + ES0=0; // disable serial interrupts + receive0BufferTail=(receive0BufferTail+1)&(S0RBS-1); + ES0=1; // enable serial interrupts + } else { + while (!RI_0) + ; + c=SBUF0; + RI_0=0; + } + return c; +} + +void Serial0SendBreak() +{ + P3 &= ~0x02; + ClockMilliSecondsDelay(2); + P3 |= 0x02; +} + +void Serial0Flush() +{ + ES0=0; // disable interrupts + receive0BufferHead=receive0BufferTail=0; + RI_0=0; + if (serial0Buffered) { + TI_0=0; + ES0=1; // enable interrupts + } else { + TI_0=1; + } +} + +// now let's go for the clock stuff - on the DS400, we can just +// use the ROM's millisecond timer, running off timer 0. +// +// for now, this timer runs too fast by about 20%. We need an implementation of +// task_settickreload to fix this. + +void ClockInit() +{ + // nada, all done by DSS_rom_init +} + +// we can't just use milliSeconds +unsigned long ClockTicks(void) +{ + return task_gettimemillis_long(); +} + +void ClockMilliSecondsDelay(unsigned long delay) +{ + unsigned long ms = task_gettimemillis_long() + delay; + + while (ms > task_gettimemillis_long()) + ; +} + +// Return the start of the XI_SEG. Really just a workaround for the +// fact that the linker defined symbol (s_XISEG) isn't directly accessible +// from C due to the lack of a leading underscore, and I'm too lazy to hack +// the linker. +static void __xdata *_xisegStart(void) __naked +{ + __asm + mov dptr, #(s_XISEG) + ret + __endasm; +} + +// Return the length of the XI_SEG. Really just a workaround for the +// fact that the linker defined symbol (l_XISEG) isn't directly accessible +// from C due to the lack of a leading underscore, and I'm too lazy to hack +// the linker. +static unsigned _xisegLen(void) __naked +{ + __asm + mov dptr, #(l_XISEG) + ret + __endasm; +} + +// Returns the address of the first byte available for heap memory, +// i.e. the first byte following the XI_SEG. +static void __xdata *_firstHeapByte(void) +{ + unsigned char __xdata *start; + + start = (unsigned char __xdata *) _xisegStart(); + start += _xisegLen(); + + return (void __xdata *)start; +} + +// TINIm400 specific startup. + +// The last addressible byte of the CE0 area. +#define CE0_END 0xfffff + +unsigned char romInit(unsigned char noisy, char speed) +{ + void __xdata *heapStart; + void __xdata *heapEnd; + unsigned long heapLen; + unsigned char rc; + + if (speed == SPEED_2X) + { + PMR = 0x82; + PMR = 0x92; + + while (!(EXIF & 8)) + ; + + PMR = 0x12; + } + else if (speed == SPEED_4X) + { + // Hangs on TINIm400! + PMR = 0x82; + PMR = 0x8a; + PMR = 0x9a; + + while (!(EXIF & 8)) + ; + + PMR = 0x1a; + } + + heapStart = _firstHeapByte(); + heapEnd = (void __xdata *)CE0_END; + + rc = init_rom(heapStart, heapEnd); + + if (noisy) + { + if (rc) + { + printf("error: rom_init returns %d\n", (int)rc); + return rc; + } + else + { + heapLen = CE0_END - (unsigned long)heapStart; + printf("Heap starts at %p, length %luK\n", heapStart, heapLen / 1024); + } + } + + task_settickreload(RELOAD_14_746); + + // Switch to interrupt driven serial I/O now that the rom is initialized. + Serial0SwitchToBuffered(); + + P5 &= ~4; // LED on. + + return 0; +} + +// Install an interrupt handler. +void installInterrupt(void (*isrPtr)(void), unsigned char offset) +{ + unsigned char __xdata * vectPtr = (unsigned char __xdata *) offset; + unsigned long isr = (unsigned long)isrPtr; + + *vectPtr++ = 0x02; + *vectPtr++ = (unsigned char)(isr >> 16); + *vectPtr++ = (unsigned char)(isr >> 8); + *vectPtr = (unsigned char)isr; +} diff --git a/device/lib/errno.c b/device/lib/errno.c new file mode 100644 index 0000000..8379ddf --- /dev/null +++ b/device/lib/errno.c @@ -0,0 +1,21 @@ +/*------------------------------------------------------------------------- + + errno.c :- just declares errno as a variable + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +-------------------------------------------------------------------------*/ + +int errno; diff --git a/device/lib/expf.c b/device/lib/expf.c new file mode 100644 index 0000000..a1355e8 --- /dev/null +++ b/device/lib/expf.c @@ -0,0 +1,366 @@ +/* expf.c: Computes e**x of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +#define SDCC_MATH_LIB +#include +#include +#include + + +#ifdef MATH_ASM_MCS51 + +#define SDCC_FLOAT_LIB +#include + +// TODO: share with other temps +static __bit sign_bit; +static __data unsigned char expf_y[4]; +static __data unsigned char n; + + +float expf(float x) +{ + x; + __asm + mov c, acc.7 + mov _sign_bit, c // remember sign + clr acc.7 // and make input positive + mov r0, a + mov c, b.7 + rlc a // extract exponent + add a, #153 + jc expf_not_zero + // input is a very small number, so e^x is 1.000000 + mov dptr, #0 + mov b, #0x80 + mov a, #0x3F + ret +expf_not_zero: + // TODO: check exponent for very small values, and return zero + mov _n, #0 + mov a, dpl + add a, #0xE8 // is x >= 0.69314718 + mov a, dph + addc a, #0x8D + mov a, b + addc a, #0xCE + mov a, r0 + addc a, #0xC0 + mov a, r0 + jnc expf_no_range_reduction +expf_range_reduction: + mov (_expf_y + 0), dpl // keep copy of x in "exp_y" + mov (_expf_y + 1), dph + mov (_expf_y + 2), b + mov (_expf_y + 3), a + mov r0, #0x3B + push ar0 + mov r0, #0xAA + push ar0 + mov r0, #0xB8 + push ar0 + mov r0, #0x3F + push ar0 + lcall ___fsmul // x * 1.442695041 = x / ln(2) + dec sp + dec sp + dec sp + dec sp + lcall ___fs2uchar // n = int(x * 1.442695041) + mov a, dpl + mov _n, a + add a, #128 + jnc expf_range_ok + ljmp fs_return_inf // exponent overflow +expf_range_ok: + mov r0,#0x00 + mov r1,#0x80 + mov r2,#0x31 + mov r3,#0xBF + lcall expf_scale_and_add + mov (_expf_y + 0), dpl + mov (_expf_y + 1), dph + mov (_expf_y + 2), b + mov (_expf_y + 3), a + mov r0,#0x83 + mov r1,#0x80 + mov r2,#0x5E + mov r3,#0x39 + lcall expf_scale_and_add +expf_no_range_reduction: + + +// Compute e^x using the cordic algorithm. This works over an +// input range of 0 to 0.69314712. Can be extended to work from +// 0 to 1.0 if the results are normalized, but over the range +// we use, the result is always from 1.0 to 1.99999988 (fixed +// exponent of 127) + +expf_cordic_begin: + mov c, b.7 + rlc a // extract exponent to acc + setb b.7 + mov r1, dpl // mantissa to r4/r3/r2/r1 + mov r2, dph + mov r3, b + mov r4, #0 + + // first, align the input into a 32 bit long + cjne a, #121, exp_lshift + sjmp exp_noshift +exp_lshift: + jc exp_rshift + // exp_a is greater than 121, so left shift + add a, #135 + lcall fs_lshift_a + sjmp exp_noshift +exp_rshift: + // exp_a is less than 121, so right shift + cpl a + add a, #122 + lcall fs_rshift_a +exp_noshift: // r4/r3/r2/r1 = x + clr a + mov (_expf_y + 0), a // y = 1.0; + mov (_expf_y + 1), a + mov (_expf_y + 2), a + mov (_expf_y + 3), #0x20 + mov dptr, #__fs_natural_log_table + mov r0, a // r0 = i +exp_cordic_loop: + clr a + movc a, @a+dptr + mov b, a + inc dptr + clr a + movc a, @a+dptr // r7/r6/r5/b = table[i] + mov r5, a + inc dptr + clr a + movc a, @a+dptr + mov r6, a + inc dptr + clr a + movc a, @a+dptr + mov r7, a + inc dptr + clr c + mov a, r1 + subb a, b // compare x to table[i] + mov a, r2 + subb a, r5 + mov a, r3 + subb a, r6 + mov a, r4 + subb a, r7 + jc exp_cordic_skip // if table[i] < x + clr c + mov a, r1 + subb a, b + mov r1, a // x -= table[i] + mov a, r2 + subb a, r5 + mov r2, a + mov a, r3 + subb a, r6 + mov r3, a + mov a, r4 + subb a, r7 + mov r4, a + mov b, (_expf_y + 0) + mov r5, (_expf_y + 1) // r7/r6/r5/b = y >> i + mov r6, (_expf_y + 2) + mov r7, (_expf_y + 3) + mov a, r0 + lcall __fs_cordic_rshift_r765_unsigned + mov a, (_expf_y + 0) + add a, b + mov (_expf_y + 0), a + mov a, (_expf_y + 1) + addc a, r5 + mov (_expf_y + 1), a // y += (y >> i) + mov a, (_expf_y + 2) + addc a, r6 + mov (_expf_y + 2), a + mov a, (_expf_y + 3) + addc a, r7 + mov (_expf_y + 3), a +exp_cordic_skip: + inc r0 + cjne r0, #27, exp_cordic_loop + mov r4, (_expf_y + 3) + mov r3, (_expf_y + 2) + mov r2, (_expf_y + 1) + mov r1, (_expf_y + 0) + lcall fs_normalize_a // end of cordic + + mov a, #127 + add a, _n // ldexpf(x, n) + mov exp_a, a + lcall fs_round_and_return + + jnb _sign_bit, expf_done + push dpl + push dph + push b + push acc + mov dptr, #0 + mov b, #0x80 + mov a, #0x3F + lcall ___fsdiv // 1.0 / x + dec sp + dec sp + dec sp + dec sp +expf_done: + clr acc.7 // Result is always positive! + __endasm; +#pragma less_pedantic +} + +static void dummy1(void) __naked +{ + __asm + .globl fs_lshift_a +expf_scale_and_add: + push ar0 + push ar1 + push ar2 + push ar3 + mov dpl, _n + lcall ___uchar2fs // turn n into float + lcall ___fsmul // n * scale_factor + dec sp + dec sp + dec sp + dec sp + push dpl + push dph + push b + push acc + mov dpl, (_expf_y + 0) + mov dph, (_expf_y + 1) + mov b, (_expf_y + 2) + mov a, (_expf_y + 3) + lcall ___fsadd // x += (n * scale_factor) + dec sp + dec sp + dec sp + dec sp + ret + __endasm; +} + +static void dummy(void) __naked +{ + __asm + .globl fs_lshift_a +fs_lshift_a: + jz fs_lshift_done + push ar0 + mov r0, a +fs_lshift_loop: + clr c + mov a, r1 + rlc a + mov r1, a + mov a, r2 + rlc a + mov r2, a + mov a, r3 + rlc a + mov r3, a + mov a, r4 + rlc a + mov r4, a + djnz r0, fs_lshift_loop + pop ar0 +fs_lshift_done: + ret + __endasm; +} + +#else // not MATH_ASM_MCS51 + +#define P0 0.2499999995E+0 +#define P1 0.4160288626E-2 +#define Q0 0.5000000000E+0 +#define Q1 0.4998717877E-1 + +#define P(z) ((P1*z)+P0) +#define Q(z) ((Q1*z)+Q0) + +#define C1 0.693359375 +#define C2 -2.1219444005469058277e-4 + +#define BIGX 88.72283911 /* ln(HUGE_VALF) */ +#define EXPEPS 1.0E-7 /* exp(1.0E-7)=0.0000001 */ +#define K1 1.4426950409 /* 1/ln(2) */ + +float expf(const float x) +{ + int n; + float xn, g, r, z, y; + BOOL sign; + + if(x>=0.0) + { y=x; sign=0; } + else + { y=-x; sign=1; } + + if(yBIGX) + { + if(sign) + { + errno=ERANGE; + return HUGE_VALF + ; + } + else + { + return 0.0; + } + } + + z=y*K1; + n=z; + + if(n<0) --n; + if(z-n>=0.5) ++n; + xn=n; + g=((y-xn*C1))-xn*C2; + z=g*g; + r=P(z)*g; + r=0.5+(r/(Q(z)-r)); + + n++; + z=ldexpf(r, n); + if(sign) + return 1.0/z; + else + return z; +} + +#endif diff --git a/device/lib/fabsf.c b/device/lib/fabsf.c new file mode 100644 index 0000000..4a061d1 --- /dev/null +++ b/device/lib/fabsf.c @@ -0,0 +1,31 @@ +/* fabsf.c: Returns the absolute value of a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +#include +#include + +float fabsf(const float x) _FLOAT_FUNC_REENTRANT +{ + union float_long fl; + + fl.f = x; + fl.l &= 0x7fffffff; + return fl.f; +} diff --git a/device/lib/floorf.c b/device/lib/floorf.c new file mode 100644 index 0000000..f12adae --- /dev/null +++ b/device/lib/floorf.c @@ -0,0 +1,31 @@ +/* floorf.c: Returns the integer smaller or equal than x + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +#include + +float floorf (float x) _FLOAT_FUNC_REENTRANT +{ + long r; + r=x; + if (r<=0) + return (r+((r>x)?-1:0)); + else + return r; +} diff --git a/device/lib/frexpf.c b/device/lib/frexpf.c new file mode 100644 index 0000000..df2e381 --- /dev/null +++ b/device/lib/frexpf.c @@ -0,0 +1,37 @@ +/* frexpf.c: Returns the exponent and mantisa of a 32 bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +#include +#include + +float frexpf(const float x, int *pw2) +{ + union float_long fl; + long int i; + + fl.f=x; + /* Find the exponent (power of 2) */ + i = ( fl.l >> 23) & 0x000000ff; + i -= 0x7e; + *pw2 = i; + fl.l &= 0x807fffff; /* strip all exponent bits */ + fl.l |= 0x3f000000; /* mantissa between 0.5 and 1 */ + return(fl.f); +} diff --git a/device/lib/gbz80/Makefile.in b/device/lib/gbz80/Makefile.in new file mode 100644 index 0000000..78d95d4 --- /dev/null +++ b/device/lib/gbz80/Makefile.in @@ -0,0 +1,70 @@ +# libc/z80 Makefile + +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ + +LIB_TYPE = @LIB_TYPE@ + +TOPDIR = ../../.. + +SCC = $(TOPDIR)/bin/sdcc -mgbz80 +SAS = $(TOPDIR)/bin/as-gbz80 + +PORTDIR = ../build/gbz80 + +include $(srcdir)/../incl.mk + +Z80_FLOAT = $(COMMON_FLOAT) + +Z80_INT = $(COMMON_INT) + +Z80_LONG = $(COMMON_LONG) \ + _divulong.c \ + _mullong.c + +Z80_SDCC = $(COMMON_SDCC) \ + _itoa.c \ + _ltoa.c \ + _startup.c \ + sprintf.c \ + vprintf.c + +Z80SOURCES = $(addprefix ../,$(Z80_FLOAT) $(Z80_INT) $(Z80_LONG) $(Z80_SDCC)) +Z8OBJECTS = $(patsubst %.c,%.o,$(Z80_FLOAT) $(Z80_INT) $(Z80_LONG) $(Z80_SDCC)) + +OBJ = div.o mul.o putchar.o printf.o shift.o stubs.o crt0_rle.o heap.o fstubs.o + +LIB = gbz80.lib +CC = $(SCC) +AS = $(SAS) +CFLAGS = -I$(srcdir)/../../include -I. --std-c99 + +all: $(PORTDIR)/$(LIB) crt0.o + +$(PORTDIR)/$(LIB): $(OBJ) $(Z8OBJECTS) Makefile +ifeq ($(LIB_TYPE), SDCCLIB) + rm -f $@; \ + ../../../bin/sdcclib -a $@ $(OBJ) $(Z8OBJECTS) +else ifeq ($(LIB_TYPE), AR) + ar -Scq $@ $(OBJ) +else ifeq ($(LIB_TYPE), RANLIB) + ar -Scq $@ $(OBJ) $(Z8OBJECTS) + $(top_builddir)/bin/asranlib $@ +else + rm -f $@ + for i in $(basename $(OBJ) $(Z8OBJECTS)); do echo $$i >>$@; done + cp $(OBJ) $(Z8OBJECTS) $(PORTDIR) +endif + +%.o: %.c + $(CC) $(CFLAGS) -c $< + +%.o: ../%.c + $(CC) $(CFLAGS) -c $< + +clean: + rm -f *.o *.sym *.lst *~ $(CLEANSPEC) *.dump* *.asm *.lib + +distclean: clean + rm -f Makefile diff --git a/device/lib/gbz80/README b/device/lib/gbz80/README new file mode 100644 index 0000000..a34ea45 --- /dev/null +++ b/device/lib/gbz80/README @@ -0,0 +1,4 @@ +sdcc/device/lib/z80 +------------------- + +Z80 specific routines. diff --git a/device/lib/gbz80/asm_strings.s b/device/lib/gbz80/asm_strings.s new file mode 100644 index 0000000..6fceac2 --- /dev/null +++ b/device/lib/gbz80/asm_strings.s @@ -0,0 +1,95 @@ + ;; Implementation of some string functions in + ;; assembler. + + ;; Why - because I want a better dhrystone score :) + +; char *strcpy(char *dest, const char *source) +_strcpy:: + lda hl,2(sp) + ld e,(hl) + inc hl + ld d,(hl) + inc hl + ld a,(hl+) + ld h,(hl) + ld l,a + + push de +1$: + ld a,(hl+) + ld (de),a + inc de + or a,a + jr NZ,1$ + + pop de + ret + +; void *memcpy(void *dest, const void *source, int count) +_memcpy:: + push bc + lda hl,6(sp) + ld e,(hl) + inc hl + ld d,(hl) + inc hl + ld c,(hl) + inc hl + ld b,(hl) + lda hl,4(sp) + ld a,(hl+) + ld h,(hl) + ld l,a + + inc b + inc c + push hl + + jr 2$ +1$: + ld a,(de) + ld (hl+),a + inc de +2$: + dec c + jr NZ,1$ + dec b + jr NZ,1$ + + pop de + pop bc + ret + +; int strcmp(const char *s1, const char *s2) +_strcmp:: + lda hl,2(sp) + ld e,(hl) + inc hl + ld d,(hl) + inc hl + ld a,(hl+) + ld h,(hl) + ld l,a + + jr 1$ +2$: + ld a,(de) + sub (hl) + jr NZ,4$ + ;; A == 0 + cp (hl) + jr Z,3$ +1$: + inc de + inc hl + jr 2$ + +3$: + ld de,#0 + jr 5$ +4$: + ld de,#1 + jr nc,5$ + ld de,#-1 +5$: + ret diff --git a/device/lib/gbz80/crt0.s b/device/lib/gbz80/crt0.s new file mode 100644 index 0000000..814b43e --- /dev/null +++ b/device/lib/gbz80/crt0.s @@ -0,0 +1,68 @@ + ;; Generic crt0.s for a GBZ80 + .globl _main + + .area _HEADER (ABS) + ;; Reset vector + .org 0 + jp init + + .org 0x08 + reti + .org 0x10 + reti + .org 0x18 + reti + .org 0x20 + reti + .org 0x28 + reti + .org 0x30 + reti + .org 0x38 + reti + + .org 0x100 + jp 0x150 + + .org 0x150 +init: + di + ;; Stack at the top of memory. + ld sp,#0xdfff + + ;; Setup global data + call gsinit + + ;; Use _main instead of main to bypass sdcc's intelligence + call _main + jp _exit + + ;; Ordering of segments for the linker. + .area _HOME + .area _CODE + .area _GSINIT + .area _GSFINAL + + .area _DATA + .area _BSS + .area _HEAP + + .area _CODE +__clock:: + ld a,#2 + rst 0x08 + ret + +_exit:: + ;; Exit - special code to the emulator + ld a,#0 + rst 0x08 +1$: + halt + jr 1$ + + .area _GSINIT +gsinit:: + + .area _GSFINAL + ret diff --git a/device/lib/gbz80/crt0_rle.s b/device/lib/gbz80/crt0_rle.s new file mode 100644 index 0000000..859a6ae --- /dev/null +++ b/device/lib/gbz80/crt0_rle.s @@ -0,0 +1,44 @@ + .area _CODE + + ;; Special RLE decoder used for initing global data +__initrleblock:: + ;; Pull the destination address out + ld c,l + ld b,h + + ;; Pop the return address + pop hl +1$: + ;; Fetch the run + ld e,(hl) + inc hl + ;; Negative means a run + bit 7,e + jp Z,2$ + ;; Code for expanding a run + ld a,(hl) + inc hl +3$: + ld (bc),a + inc bc + inc e + jp NZ,3$ + jp 1$ +2$: + ;; Zero means end of a block + xor a + or e + jp Z,4$ + ;; Code for expanding a block +5$: + ld a,(hl) + inc hl + ld (bc),a + inc bc + dec e + jp NZ,5$ + jp 1$ +4$: + ;; Push the return address back onto the stack + push hl + ret diff --git a/device/lib/gbz80/div.s b/device/lib/gbz80/div.s new file mode 100644 index 0000000..defe187 --- /dev/null +++ b/device/lib/gbz80/div.s @@ -0,0 +1,333 @@ + ;; Originally from GBDK by Pascal Felber. + .area _CODE + +__divschar_rrx_s:: + ld hl,#2+1 + add hl,sp + + ld e,(hl) + dec hl + ld l,(hl) + + ;; Fall through +__divschar_rrx_hds:: + ld c,l + + call .div8 + + ld e,c + ld d,b + + ret + +__modschar_rrx_s:: + ld hl,#2+1 + add hl,sp + + ld e,(hl) + dec hl + ld l,(hl) + + ;; Fall through +__modschar_rrx_hds:: + ld c,l + + call .div8 + + ;; Already in DE + + ret + +__divsint_rrx_s:: + ld hl,#2+3 + add hl,sp + + ld d,(hl) + dec hl + ld e,(hl) + dec hl + ld a,(hl) + dec hl + ld l,(hl) + ld h,a + + ;; Fall through +__divsint_rrx_hds:: + ld b,h + ld c,l + + call .div16 + + ld e,c + ld d,b + + ret + +__modsint_rrx_s:: + ld hl,#2+3 + add hl,sp + + ld d,(hl) + dec hl + ld e,(hl) + dec hl + ld a,(hl) + dec hl + ld l,(hl) + ld h,a + + ;; Fall through +__modsint_rrx_hds:: + ld b,h + ld c,l + + call .div16 + + ;; Already in DE + + ret + + ;; Unsigned +__divuchar_rrx_s:: + ld hl,#2+1 + add hl,sp + + ld e,(hl) + dec hl + ld l,(hl) + + ;; Fall through +__divuchar_rrx_hds:: + ld c,l + call .divu8 + + ld e,c + ld d,b + + ret + +__moduchar_rrx_s:: + ld hl,#2+1 + add hl,sp + + ld e,(hl) + dec hl + ld l,(hl) + + ;; Fall through +__moduchar_rrx_hds:: + ld c,l + call .divu8 + + ;; Already in DE + + ret + +__divuint_rrx_s:: + ld hl,#2+3 + add hl,sp + + ld d,(hl) + dec hl + ld e,(hl) + dec hl + ld a,(hl) + dec hl + ld l,(hl) + ld h,a + + ;; Fall through +__divuint_rrx_hds:: + ld b,h + ld c,l + call .divu16 + + ld e,c + ld d,b + + ret + +__moduint_rrx_s:: + ld hl,#2+3 + add hl,sp + + ld d,(hl) + dec hl + ld e,(hl) + dec hl + ld a,(hl) + dec hl + ld l,(hl) + ld h,a + ;; Fall through + +__moduint_rrx_hds:: + ld b,h + ld c,l + + call .divu16 + + ;; Already in DE + + ret + +.div8:: +.mod8:: + ld a,c ; Sign extend + rlca + sbc a + ld b,a + ld a,e ; Sign extend + rlca + sbc a + ld d,a + + ; Fall through to .div16 + + ;; 16-bit division + ;; + ;; Entry conditions + ;; BC = dividend + ;; DE = divisor + ;; + ;; Exit conditions + ;; BC = quotient + ;; DE = remainder + ;; If divisor is non-zero, carry=0 + ;; If divisor is 0, carry=1 and both quotient and remainder are 0 + ;; + ;; Register used: AF,BC,DE,HL +.div16:: +.mod16:: + ;; Determine sign of quotient by xor-ing high bytes of dividend + ;; and divisor. Quotient is positive if signs are the same, negative + ;; if signs are different + ;; Remainder has same sign as dividend + ld a,b ; Get high byte of dividend + push af ; Save as sign of remainder + xor d ; Xor with high byte of divisor + push af ; Save sign of quotient + + ;; Take absolute value of divisor + bit 7,d + jr Z,.chkde ; Jump if divisor is positive + sub a ; Substract divisor from 0 + sub e + ld e,a + sbc a ; Propagate borrow (A=0xFF if borrow) + sub d + ld d,a + ;; Take absolute value of dividend +.chkde: + bit 7,b + jr Z,.dodiv ; Jump if dividend is positive + sub a ; Substract dividend from 0 + sub c + ld c,a + sbc a ; Propagate borrow (A=0xFF if borrow) + sub b + ld b,a + ;; Divide absolute values +.dodiv: + call .divu16 + jr C,.exit ; Exit if divide by zero + ;; Negate quotient if it is negative + pop af ; recover sign of quotient + and #0x80 + jr Z,.dorem ; Jump if quotient is positive + sub a ; Substract quotient from 0 + sub c + ld c,a + sbc a ; Propagate borrow (A=0xFF if borrow) + sub b + ld b,a +.dorem: + ;; Negate remainder if it is negative + pop af ; recover sign of remainder + and #0x80 + ret Z ; Return if remainder is positive + sub a ; Substract remainder from 0 + sub e + ld e,a + sbc a ; Propagate remainder (A=0xFF if borrow) + sub d + ld d,a + ret +.exit: + pop af + pop af + ret + +.divu8:: +.modu8:: + ld b,#0x00 + ld d,b + ; Fall through to divu16 + +.divu16:: +.modu16:: + ;; Check for division by zero + ld a,e + or d + jr NZ,.divide ; Branch if divisor is non-zero + ld bc,#0x00 ; Divide by zero error + ld d,b + ld e,c + scf ; Set carry, invalid result + ret +.divide: + ld l,c ; L = low byte of dividend/quotient + ld h,b ; H = high byte of dividend/quotient + ld bc,#0x00 ; BC = remainder + or a ; Clear carry to start + ld a,#16 ; 16 bits in dividend +.dvloop: + ;; Shift next bit of quotient into bit 0 of dividend + ;; Shift next MSB of dividend into LSB of remainder + ;; BC holds both dividend and quotient. While we shift a bit from + ;; MSB of dividend, we shift next bit of quotient in from carry + ;; HL holds remainder + ;; Do a 32-bit left shift, shifting carry to L, L to H, + ;; H to C, C to B + push af ; save number of bits remaining + rl l ; Carry (next bit of quotient) to bit 0 + rl h ; Shift remaining bytes + rl c + rl b ; Clears carry since BC was 0 + ;; If remainder is >= divisor, next bit of quotient is 1. This + ;; bit goes to carry + push bc ; Save current remainder + ld a,c ; Substract divisor from remainder + sbc e + ld c,a + ld a,b + sbc d + ld b,a + ccf ; Complement borrow so 1 indicates a + ; successful substraction (this is the + ; next bit of quotient) + jr C,.drop ; Jump if remainder is >= dividend + pop bc ; Otherwise, restore remainder + pop af ; recover # bits remaining, carry flag destroyed + dec a + or a ; restore (clear) the carry flag + jr NZ,.dvloop + jr .nodrop +.drop: + inc sp + inc sp + pop af ; recover # bits remaining, carry flag destroyed + dec a + scf ; restore (set) the carry flag + jr NZ,.dvloop + jr .nodrop +.nodrop: + ;; Shift last carry bit into quotient + ld d,b ; DE = remainder + ld e,c + rl l ; Carry to L + ld c,l ; C = low byte of quotient + rl h + ld b,h ; B = high byte of quotient + or a ; Clear carry, valid result + ret diff --git a/device/lib/gbz80/fstubs.s b/device/lib/gbz80/fstubs.s new file mode 100644 index 0000000..a1804e7 --- /dev/null +++ b/device/lib/gbz80/fstubs.s @@ -0,0 +1,6 @@ + ;; Stubs to match between function names + .area _CODE + .globl ___slong2fs + +___slong2fs_rrx_s:: + jp ___slong2fs diff --git a/device/lib/gbz80/heap.s b/device/lib/gbz80/heap.s new file mode 100644 index 0000000..06b452f --- /dev/null +++ b/device/lib/gbz80/heap.s @@ -0,0 +1,14 @@ + ;; Stubs that hook the heap in + .globl __sdcc_heap_init + + .area _GSINIT + call __sdcc_heap_init + + .area _HEAP +__sdcc_heap_start:: + ;; For now just allocate 1k of heap. + .ds 1023 + + .area _HEAP_END +__sdcc_heap_end:: + .ds 1 diff --git a/device/lib/gbz80/mul.s b/device/lib/gbz80/mul.s new file mode 100644 index 0000000..5e34c76 --- /dev/null +++ b/device/lib/gbz80/mul.s @@ -0,0 +1,107 @@ + ;; Originally from GBDK by Pascal Felber. + + .area _CODE + +__mulschar_rrx_s:: + ld hl,#2 + add hl,sp + + ld e,(hl) + inc hl + ld l,(hl) + + ;; Fall through +__mulschar_rrx_hds:: + ;; Need to sign extend before going in. + ld c,l + + ld a,l + rla + sbc a,a + ld b,a + + ld a,e + rla + sbc a,a + ld d,a + + jp .mul16 + +__muluchar_rrx_s:: + ld hl,#2 + add hl,sp + + ld e,(hl) + + inc hl + ld c,(hl) + + ;; Clear the top + xor a + ld d,a + ld b,a + + jp .mul16 + +__mulint_rrx_s:: + ld hl,#2 + add hl,sp + + ld e,(hl) + inc hl + ld d,(hl) + inc hl + ld a,(hl) + inc hl + ld h,(hl) + ld l,a + + ;; Fall through + +__muluchar_rrx_hds:: +__mulint_rrx_hds:: + ;; Parameters: + ;; HL, DE (left, right irrelivent) + ld b,h + ld c,l + + ;; 16-bit multiplication + ;; + ;; Entry conditions + ;; BC = multiplicand + ;; DE = multiplier + ;; + ;; Exit conditions + ;; DE = less significant word of product + ;; + ;; Register used: AF,BC,DE,HL +.mul16: + ld hl,#0 + ld a,b + ; ld c,c + ld b,#16 + + ;; Optimise for the case when this side has 8 bits of data or + ;; less. This is often the case with support address calls. + or a + jp NZ,1$ + + ld b,#8 + ld a,c +1$: + ;; Taken from z88dk, which originally borrowed from the + ;; Spectrum rom. + add hl,hl + rl c + rla ;DLE 27/11/98 + jr NZ,2$ + add hl,de +2$: + dec b + jr NZ,1$ + + ;; Return in DE + ld e,l + ld d,h + + ret diff --git a/device/lib/gbz80/printf.c b/device/lib/gbz80/printf.c new file mode 100644 index 0000000..ddfb020 --- /dev/null +++ b/device/lib/gbz80/printf.c @@ -0,0 +1,103 @@ +/** Simple printf implementation + Again a stub - will use the std one later... +*/ + +#include +#include + +#define STATIC + +static void _printn(unsigned u, unsigned base, char issigned, void (*emitter)(char, void *), void *pData) +{ + const char *_hex = "0123456789ABCDEF"; + if (issigned && ((int)u < 0)) { + (*emitter)('-', pData); + u = (unsigned)-((int)u); + } + if (u >= base) + _printn(u/base, base, 0, emitter, pData); + (*emitter)(_hex[u%base], pData); +} + +STATIC void _printf(const char *format, void (*emitter)(char, void *), void *pData, va_list va) +{ + while (*format) { + if (*format == '%') { + switch (*++format) { + case 'c': { + char c = (char)va_arg(va, int); + (*emitter)(c, pData); + break; + } + case 'u': + { + unsigned u = va_arg(va, unsigned); + _printn(u, 10, 0, emitter, pData); + break; + } + case 'd': + { + unsigned u = va_arg(va, unsigned); + _printn(u, 10, 1, emitter, pData); + break; + } + case 'x': + { + unsigned u = va_arg(va, unsigned); + _printn(u, 16, 0, emitter, pData); + break; + } + case 's': + { + char *s = va_arg(va, char *); + while (*s) { + (*emitter)(*s, pData); + s++; + } + } + } + } + else { + (*emitter)(*format, pData); + } + format++; + } +} + +void putchar(char c); + +STATIC void _char_emitter(char c, void *pData) +{ + /* PENDING: Make the compiler happy. */ + pData = 0; + + putchar(c); +} + +int printf(const char *format, ...) +{ + va_list va; + va_start(va, format); + + _printf(format, _char_emitter, NULL, va); + + /* PENDING: What to return? */ + return 0; +} + +STATIC void _buf_emitter(char c, void *pData) +{ + *((*((char **)pData)))++ = c; +} + +int sprintf(char *pInto, const char *format, ...) +{ + va_list va; + va_start(va, format); + + _printf(format, _buf_emitter, &pInto, va); + *pInto++ = '\0'; + + /* PENDING: What to return? */ + return 0; +} diff --git a/device/lib/gbz80/putchar.s b/device/lib/gbz80/putchar.s new file mode 100644 index 0000000..54596af --- /dev/null +++ b/device/lib/gbz80/putchar.s @@ -0,0 +1,18 @@ + .area _CODE +_putchar:: +_putchar_rr_s:: + ld hl,#2 + add hl,sp + + ld l,(hl) + ld a,#1 + rst 0x08 + + ret + +_putchar_rr_dbs:: + ld l,e + ld a,#1 + rst 0x08 + + ret diff --git a/device/lib/gbz80/shift.s b/device/lib/gbz80/shift.s new file mode 100644 index 0000000..ab11108 --- /dev/null +++ b/device/lib/gbz80/shift.s @@ -0,0 +1,85 @@ + ;; +__rrulong_rrx_s:: + ld hl,#2 + add hl,sp + + ld e,(hl) + inc hl + ld d,(hl) + inc hl + ld c,(hl) + inc hl + ld b,(hl) + inc hl + ld a,(hl) + + ld l,c + ld h,b +1$: + or a,a + ret Z + + rr h + rr l + rr d + rr e + + dec a + jp 1$ + +__rrslong_rrx_s:: + ld hl,#2 + add hl,sp + + ld e,(hl) + inc hl + ld d,(hl) + inc hl + ld c,(hl) + inc hl + ld b,(hl) + inc hl + ld a,(hl) + + ld l,c + ld h,b +1$: + or a,a + ret Z + + sra h + rr l + rr d + rr e + + dec a + jp 1$ + +__rlslong_rrx_s:: +__rlulong_rrx_s:: + ld hl,#2 + add hl,sp + + ld e,(hl) + inc hl + ld d,(hl) + inc hl + ld c,(hl) + inc hl + ld b,(hl) + inc hl + ld a,(hl) + + ld l,c + ld h,b +1$: + or a,a + ret Z + + rl e + rl d + rl l + rl h + + dec a + jp 1$ diff --git a/device/lib/gbz80/string.c b/device/lib/gbz80/string.c new file mode 100644 index 0000000..e20cb2b --- /dev/null +++ b/device/lib/gbz80/string.c @@ -0,0 +1,39 @@ +/* Dumb strings stub. + Wanted a quick hack for now - will use the libc version later. +*/ +char *_strcpy(char *dest, const char *source) +{ + char *d = dest; + const char *s = source; + while (*d = *s) + d++, s++; + + return dest; +} + +void *_memcpy(void *dest, const void *source, int count) +{ + char *d = dest; + const char *s = source; + while (count--) { + *d = *s; + d++; + s++; + } + + return dest; +} + +int _strcmp(const char *s1, const char *s2) +{ + char ret = 0; + + while (!(ret = *s1 - *s2) && *s2) + ++s1, ++s2; + + if (ret < 0) + return -1; + else if (ret > 0) + return 1; + return 0; +} diff --git a/device/lib/gbz80/stubs.s b/device/lib/gbz80/stubs.s new file mode 100644 index 0000000..695588d --- /dev/null +++ b/device/lib/gbz80/stubs.s @@ -0,0 +1,118 @@ + ;; Stubs to match between function names + .area _CODE + + .globl __mullong + .globl __modslong + .globl __modulong + .globl __divslong + .globl __divulong + .globl __divschar_rrx_s + .globl __divsint_rrx_s + .globl __divuchar_rrx_s + .globl __divuint_rrx_s + .globl __mulschar_rrx_s + .globl __muluchar_rrx_s + .globl __mulint_rrx_s + .globl __moduchar_rrx_s + .globl __modschar_rrx_s + .globl __moduint_rrx_s + .globl __modsint_rrx_s + .globl __rrulong_rrx_s + .globl __rrslong_rrx_s + .globl __rlulong_rrx_s + .globl __rlslong_rrx_s + +__mullong_rrx_s:: +__mullong_rrf_s:: + jp __mullong + +__modslong_rrx_s:: +__modslong_rrf_s:: + jp __modslong + +__modulong_rrx_s:: +__modulong_rrf_s:: + jp __modulong + +__divslong_rrx_s:: +__divslong_rrf_s:: + jp __divslong + +__divulong_rrx_s:: +__divulong_rrf_s:: + jp __divulong + +__mulint_rrf_s:: + ld a,#5 + rst 0x08 + jp __mulint_rrx_s + +__divsint_rrf_s:: + ld a,#5 + rst 0x08 + jp __divsint_rrx_s + +__divuint_rrf_s:: + ld a,#5 + rst 0x08 + jp __divuint_rrx_s + +__mulschar_rrf_s:: + ld a,#5 + rst 0x08 + jp __mulschar_rrx_s + +__divschar_rrf_s:: + ld a,#5 + rst 0x08 + jp __divschar_rrx_s + +__muluchar_rrf_s:: + ld a,#5 + rst 0x08 + jp __muluchar_rrx_s + +__divuchar_rrf_s:: + ld a,#5 + rst 0x08 + jp __divuchar_rrx_s + +__modschar_rrf_s:: + ld a,#5 + rst 0x08 + jp __modschar_rrx_s + +__moduchar_rrf_s:: + ld a,#5 + rst 0x08 + jp __moduchar_rrx_s + +__modsint_rrf_s:: + ld a,#5 + rst 0x08 + jp __modsint_rrx_s + +__moduint_rrf_s:: + ld a,#5 + rst 0x08 + jp __moduint_rrx_s + +__rrulong_rrf_s:: + ld a,#5 + rst 0x08 + jp __rrulong_rrx_s + +__rrslong_rrf_s:: + ld a,#5 + rst 0x08 + jp __rrslong_rrx_s + +__rlulong_rrf_s:: + ld a,#5 + rst 0x08 + jp __rlulong_rrx_s + +__rlslong_rrf_s:: + ld a,#5 + rst 0x08 + jp __rlslong_rrx_s diff --git a/device/lib/gets.c b/device/lib/gets.c new file mode 100644 index 0000000..be5ee73 --- /dev/null +++ b/device/lib/gets.c @@ -0,0 +1,32 @@ +#include + +char * gets(char *s) { + char c; + unsigned int count=0; + + while (1) { + c=getchar(); + switch(c) { + case '\b': // backspace + if (count) { + putchar ('\b'); + putchar (' '); + putchar ('\b'); + s--; + count--; + } + break; + case '\n': + case '\r': // CR or LF + putchar('\r'); + putchar('\n'); + *s=0; + return s; + default: + *s++=c; + count++; + putchar(c); + break; + } + } +} diff --git a/device/lib/hc08/Makefile.in b/device/lib/hc08/Makefile.in new file mode 100644 index 0000000..e2be970 --- /dev/null +++ b/device/lib/hc08/Makefile.in @@ -0,0 +1,77 @@ +# libc/hc08 Makefile + +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ + +LIB_TYPE = @LIB_TYPE@ + +TOPDIR = ../../.. + +SCC = $(TOPDIR)/bin/sdcc -mhc08 +SAS = $(TOPDIR)/bin/as6808 + +PORTDIR = ../build/hc08 + +include $(srcdir)/../incl.mk + +HC08_FLOAT = $(COMMON_FLOAT) + +HC08_INT = $(COMMON_INT) \ + _divsint.c \ + _modsint.c \ + _moduint.c + +HC08_LONG = $(COMMON_LONG) + +HC08_SDCC = $(COMMON_SDCC) \ + _itoa.c \ + _ltoa.c \ + _spx.c \ + _startup.c \ + _strlen.c \ + _memmove.c \ + _heap.c \ + sprintf.c \ + vprintf.c + +HC08SOURCES = $(addprefix ../,$(HC08_FLOAT) $(HC08_INT) $(HC08_LONG) $(HC08_SDCC)) +HC08OBJECTS = $(patsubst %.c,%.rel,$(HC08_FLOAT) $(HC08_INT) $(HC08_LONG) $(HC08_SDCC)) + +OBJ = _ret.rel _divuint.rel _divulong.rel _mulint.rel _mullong.rel + +LIB = hc08.lib +CC = $(SCC) +AS = $(SAS) +ASFLAGS = -plosgff + +CFLAGS = -I$(srcdir)/../../include -I. --std-c99 + +all: $(PORTDIR)/$(LIB) + +$(PORTDIR)/$(LIB): $(OBJ) $(HC08OBJECTS) Makefile +ifeq ($(LIB_TYPE), SDCCLIB) + rm -f $@; \ + ../../../bin/sdcclib -a $@ $(OBJ) $(HC08OBJECTS) +else ifeq ($(LIB_TYPE), AR) + ar -Scq $@ $(OBJ) $(HC08OBJECTS) +else ifeq ($(LIB_TYPE), RANLIB) + ar -Scq $@ $(OBJ) $(HC08OBJECTS) + $(top_builddir)/bin/asranlib $@ +else + rm -f $@ + for i in $(basename $(OBJ) $(HC08OBJECTS)); do echo $$i >>$@; done + cp $(OBJ) $(HC08OBJECTS) $(PORTDIR) +endif + +%.rel: %.c + $(CC) $(CFLAGS) -c $< + +%.rel: ../%.c + $(CC) $(CFLAGS) -c $< + +clean: + rm -f *.rel *.sym *.lst *~ $(CLEANSPEC) *.dump* *.asm *.lib + +distclean: clean + rm -f Makefile diff --git a/device/lib/hc08/_divuint.c b/device/lib/hc08/_divuint.c new file mode 100644 index 0000000..c8a8add --- /dev/null +++ b/device/lib/hc08/_divuint.c @@ -0,0 +1,175 @@ +/*------------------------------------------------------------------------- + _divuint.c :- routine for unsigned int (16 bit) division + + Ecrit par - Jean-Louis Vern . jlvern@writeme.com (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* Assembler-functions are provided for: + mcs51 small + mcs51 small stack-auto +*/ + +#if !defined(SDCC_USE_XSTACK) && !defined(_SDCC_NO_ASM_LIB_FUNCS) +# if defined(SDCC_mcs51) +# if defined(SDCC_MODEL_SMALL) +# if defined(SDCC_STACK_AUTO) +# define _DIVUINT_ASM_SMALL_AUTO +# else +# define _DIVUINT_ASM_SMALL +# endif +# endif +# endif +#endif + +#if defined _DIVUINT_ASM_SMALL || defined _DIVUINT_ASM_SMALL_AUTO + +static void +_divuint_dummy (void) _naked +{ + __asm + + .globl __divuint + + __divuint: + + #define count r2 + #define reste_l r3 + #define reste_h r4 + #define al dpl + #define ah dph + +#if defined(SDCC_STACK_AUTO) && !defined(SDCC_PARMS_IN_BANK1) + + ar0 = 0 ; BUG register set is not considered + ar1 = 1 + + .globl __divint + + mov a,sp + add a,#-2 ; 2 bytes return address + mov r0,a ; r0 points to bh + mov ar1,@r0 ; load bh + dec r0 + mov ar0,@r0 ; load bl + + #define bl r0 + #define bh r1 + + __divint: ; entry point for __divsint + + +#else // SDCC_STACK_AUTO + +#if !defined(SDCC_PARMS_IN_BANK1) +#if defined(SDCC_NOOVERLAY) + .area DSEG (DATA) +#else + .area OSEG (OVR,DATA) +#endif + + .globl __divuint_PARM_2 + .globl __divsint_PARM_2 + + __divuint_PARM_2: + __divsint_PARM_2: + .ds 2 + + .area CSEG (CODE) +#endif // !SDCC_PARMS_IN_BANK1 +#if defined(SDCC_PARMS_IN_BANK1) + #define bl (b1_0) + #define bh (b1_1) +#else + #define bl (__divuint_PARM_2) + #define bh (__divuint_PARM_2 + 1) +#endif // SDCC_PARMS_IN_BANK1 +#endif // SDCC_STACK_AUTO + + mov count,#16 + clr a + mov reste_l,a + mov reste_h,a + + loop: mov a,al ; a <<= 1 + add a,acc + mov al,a + mov a,ah + rlc a + mov ah,a + + mov a,reste_l ; reste <<= 1 + rlc a ; feed in carry + mov reste_l,a + mov a,reste_h + rlc a + mov reste_h,a + + mov a,reste_l ; reste - b + subb a,bl ; here carry is always clear, because + ; reste <<= 1 never overflows + mov b,a + mov a,reste_h + subb a,bh + + jc smaller ; reste >= b? + + mov reste_h,a ; -> yes; reste = reste - b; + mov reste_l,b + orl al,#1 + smaller: ; -> no + djnz count,loop + ret + + __endasm ; +} + +#else // defined _DIVUINT_ASM_SMALL || defined _DIVUINT_ASM_SMALL_AUTO + +#define MSB_SET(x) ((x >> (8*sizeof(x)-1)) & 1) + +unsigned int +_divuint (unsigned int a, unsigned int b) +{ + unsigned int reste = 0; + unsigned char count = 16; + char c; + + do + { + // reste: a <- 0; + c = MSB_SET(a); + a <<= 1; + reste <<= 1; + if (c) + reste |= 1; + + if (reste >= b) + { + reste -= b; + // a <- (result = 1) + a |= 1; + } + } + while (--count); + return a; +} + +#endif // defined _DIVUINT_ASM_SMALL || defined _DIVUINT_ASM_SMALL_AUTO diff --git a/device/lib/hc08/_divulong.c b/device/lib/hc08/_divulong.c new file mode 100644 index 0000000..5f518f8 --- /dev/null +++ b/device/lib/hc08/_divulong.c @@ -0,0 +1,353 @@ +/*------------------------------------------------------------------------- + _divulong.c - routine for division of 32 bit unsigned long + + Ecrit par - Jean-Louis Vern . jlvern@writeme.com (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* Assembler-functions are provided for: + mcs51 small + mcs51 small stack-auto +*/ + +#if !defined(SDCC_USE_XSTACK) && !defined(_SDCC_NO_ASM_LIB_FUNCS) +# if defined(SDCC_mcs51) +# if defined(SDCC_MODEL_SMALL) +# if defined(SDCC_STACK_AUTO) && !defined(SDCC_PARMS_IN_BANK1) +# define _DIVULONG_ASM_SMALL_AUTO +# else +# define _DIVULONG_ASM_SMALL +# endif +# endif +# endif +#endif + +#if defined _DIVULONG_ASM_SMALL + +static void +_divlong_dummy (void) _naked +{ + __asm + + .globl __divulong + + __divulong: + + #define count r2 + + #define a0 dpl + #define a1 dph + #define a2 b + #define a3 r3 + + #define reste0 r4 + #define reste1 r5 + #define reste2 r6 + #define reste3 r7 +#if !defined(SDCC_PARMS_IN_BANK1) + +#if defined(SDCC_NOOVERLAY) + .area DSEG (DATA) +#else + .area OSEG (OVR,DATA) +#endif + + .globl __divulong_PARM_2 + .globl __divslong_PARM_2 + + __divulong_PARM_2: + __divslong_PARM_2: + .ds 4 + + .area CSEG (CODE) + + #define b0 (__divulong_PARM_2) + #define b1 (__divulong_PARM_2 + 1) + #define b2 (__divulong_PARM_2 + 2) + #define b3 (__divulong_PARM_2 + 3) +#else + #define b0 (b1_0) + #define b1 (b1_1) + #define b2 (b1_2) + #define b3 (b1_3) +#endif // !SDCC_PARMS_IN_BANK1 + ; parameter a comes in a, b, dph, dpl + mov a3,a ; save parameter a3 + + mov count,#32 + clr a + mov reste0,a + mov reste1,a + mov reste2,a + mov reste3,a + + ; optimization loop in lp0 until the first bit is shifted into rest + + lp0: mov a,a0 ; a <<= 1 + add a,a0 + mov a0,a + mov a,a1 + rlc a + mov a1,a + mov a,a2 + rlc a + mov a2,a + mov a,a3 + rlc a + mov a3,a + + jc in_lp + djnz count,lp0 + + sjmp exit + + loop: mov a,a0 ; a <<= 1 + add a,a0 + mov a0,a + mov a,a1 + rlc a + mov a1,a + mov a,a2 + rlc a + mov a2,a + mov a,a3 + rlc a + mov a3,a + + in_lp: mov a,reste0 ; reste <<= 1 + rlc a ; feed in carry + mov reste0,a + mov a,reste1 + rlc a + mov reste1,a + mov a,reste2 + rlc a + mov reste2,a + mov a,reste3 + rlc a + mov reste3,a + + mov a,reste0 ; reste - b + subb a,b0 ; carry is always clear here, because + ; reste <<= 1 never overflows + mov a,reste1 + subb a,b1 + mov a,reste2 + subb a,b2 + mov a,reste3 + subb a,b3 + + jc minus ; reste >= b? + + ; -> yes; reste -= b; + mov a,reste0 + subb a,b0 ; carry is always clear here (jc) + mov reste0,a + mov a,reste1 + subb a,b1 + mov reste1,a + mov a,reste2 + subb a,b2 + mov reste2,a + mov a,reste3 + subb a,b3 + mov reste3,a + + orl a0,#1 + + minus: djnz count,loop ; -> no + + exit: mov a,a3 ; prepare the return value + ret + + __endasm ; +} + +#elif defined _DIVULONG_ASM_SMALL_AUTO + +static void +_divlong_dummy (void) _naked +{ + __asm + + .globl __divulong + + __divulong: + + #define count r2 + + #define a0 dpl + #define a1 dph + #define a2 b + #define a3 r3 + + #define reste0 r4 + #define reste1 r5 + #define reste2 r6 + #define reste3 r7 + + .globl __divlong ; entry point for __divslong + + #define b0 r1 + + ar0 = 0 ; BUG register set is not considered + ar1 = 1 + + ; parameter a comes in a, b, dph, dpl + mov a3,a ; save parameter a3 + + mov a,sp + add a,#-2-3 ; 2 bytes return address, 3 bytes param b + mov r0,a ; r0 points to b0 + + __divlong: ; entry point for __divslong + + mov ar1,@r0 ; load b0 + inc r0 ; r0 points to b1 + + mov count,#32 + clr a + mov reste0,a + mov reste1,a + mov reste2,a + mov reste3,a + + ; optimization loop in lp0 until the first bit is shifted into rest + + lp0: mov a,a0 ; a <<= 1 + add a,a0 + mov a0,a + mov a,a1 + rlc a + mov a1,a + mov a,a2 + rlc a + mov a2,a + mov a,a3 + rlc a + mov a3,a + + jc in_lp + djnz count,lp0 + + sjmp exit + + loop: mov a,a0 ; a <<= 1 + add a,a0 + mov a0,a + mov a,a1 + rlc a + mov a1,a + mov a,a2 + rlc a + mov a2,a + mov a,a3 + rlc a + mov a3,a + + in_lp: mov a,reste0 ; reste <<= 1 + rlc a ; feed in carry + mov reste0,a + mov a,reste1 + rlc a + mov reste1,a + mov a,reste2 + rlc a + mov reste2,a + mov a,reste3 + rlc a + mov reste3,a + + mov a,reste0 ; reste - b + subb a,b0 ; carry is always clear here, because + ; reste <<= 1 never overflows + mov a,reste1 + subb a,@r0 ; b1 + mov a,reste2 + inc r0 + subb a,@r0 ; b2 + mov a,reste3 + inc r0 + subb a,@r0 ; b3 + dec r0 + dec r0 + + jc minus ; reste >= b? + + ; -> yes; reste -= b; + mov a,reste0 + subb a,b0 ; carry is always clear here (jc) + mov reste0,a + mov a,reste1 + subb a,@r0 ; b1 + mov reste1,a + mov a,reste2 + inc r0 + subb a,@r0 ; b2 + mov reste2,a + mov a,reste3 + inc r0 + subb a,@r0 ; b3 + mov reste3,a + dec r0 + dec r0 + + orl a0,#1 + + minus: djnz count,loop ; -> no + + exit: mov a,a3 ; prepare the return value + ret + + __endasm ; +} + +#else // _DIVULONG_ASM + +#define MSB_SET(x) ((x >> (8*sizeof(x)-1)) & 1) + +unsigned long +_divulong (unsigned long a, unsigned long b) +{ + unsigned long reste = 0L; + unsigned char count = 32; + char c; + + do + { + // reste: a <- 0; + c = MSB_SET(a); + a <<= 1; + reste <<= 1; + if (c) + reste |= 1L; + + if (reste >= b) + { + reste -= b; + // a <- (result = 1) + a |= 1L; + } + } + while (--count); + return a; +} + +#endif // _DIVULONG_ASM diff --git a/device/lib/hc08/_mulint.c b/device/lib/hc08/_mulint.c new file mode 100644 index 0000000..c2011ff --- /dev/null +++ b/device/lib/hc08/_mulint.c @@ -0,0 +1,133 @@ +/*------------------------------------------------------------------------- + _mulint.c :- routine for (unsigned) int (16 bit) multiplication + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* Signed and unsigned multiplication are the same - as long as the output + has the same precision as the input. + + Assembler-functions are provided for: + hc08 + hc08 stack-auto +*/ + + +#if !defined(_SDCC_NO_ASM_LIB_FUNCS) + +#pragma save +#pragma less_pedantic +int +_mulint (int a, int b) +{ + a,b; /* reference to make compiler happy */ + +#if !defined(SDCC_STACK_AUTO) + __asm + ais #-2 + psha + pshx + + ldx __mulint_PARM_2+1 + mul + sta 4,s + stx 3,s + + lda 1,s + ldx __mulint_PARM_2+1 + mul + add 3,s + sta 3,s + + lda 2,s + ldx __mulint_PARM_2 + mul + add 3,s + sta 3,s + + ais #2 + pulx + pula + __endasm; +#else + __asm + ais #-2 + psha + pshx + + ldx 8,s + mul + sta 4,s + stx 3,s + + lda 1,s + ldx 8,s + mul + add 3,s + sta 3,s + + lda 2,s + ldx 7,s + mul + add 3,s + sta 3,s + + ais #2 + pulx + pula + __endasm; +#endif +} +#pragma restore + +#else + +union uu { + struct { unsigned char hi,lo ;} s; + unsigned int t; +} ; + +int +_mulint (int a, int b) +{ +#if !defined(SDCC_STACK_AUTO) && (defined(SDCC_MODEL_LARGE) || defined(SDCC_ds390)) // still needed for large + union uu __xdata *x; + union uu __xdata *y; + union uu t; + x = (union uu __xdata *)&a; + y = (union uu __xdata *)&b; +#else + register union uu *x; + register union uu *y; + union uu t; + x = (union uu *)&a; + y = (union uu *)&b; +#endif + + t.t = x->s.lo * y->s.lo; + t.s.hi += (x->s.lo * y->s.hi) + (x->s.hi * y->s.lo); + + return t.t; +} +#endif + + +#undef _MULINT_ASM diff --git a/device/lib/hc08/_mullong.c b/device/lib/hc08/_mullong.c new file mode 100644 index 0000000..dbb13d6 --- /dev/null +++ b/device/lib/hc08/_mullong.c @@ -0,0 +1,96 @@ +/*------------------------------------------------------------------------- + _mullong.c - routine for multiplication of 32 bit (unsigned) long + + Written By - Jean Louis VERN jlvern@writeme.com (1999) + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* Signed and unsigned multiplication are the same - as long as the output + has the same precision as the input. + + Assembler-functions are provided for: + mcs51 small + mcs51 small stack-auto +*/ + + +struct some_struct { + short a ; + char b; + long c ;}; +union bil { + struct {unsigned char b3,b2,b1,b0 ;} b; + struct {unsigned short hi,lo ;} i; + unsigned long l; + struct { unsigned char b3; unsigned short i12; unsigned char b0;} bi; +} ; + +# define bcast(x) ((union bil *)&(x)) + +/* + 3 2 1 0 + X 3 2 1 0 + ---------------------------- + 0.3 0.2 0.1 0.0 + 1.3 1.2 1.1 1.0 + 2.3 2.2 2.1 2.0 + 3.3 3.2 3.1 3.0 + ---------------------------- + |3.3|1.3|0.2|0.0| A + |2.3|0.3|0.1| B + |3.2|1.2|1.0| C + |2.2|1.1| D + |3.1|2.0| E + |2.1| F + |3.0| G + |-------> only this side 32 x 32 -> 32 +*/ +long +_mullong (long a, long b) +{ + union bil t; + + t.i.hi = bcast(a)->b.b0 * bcast(b)->b.b2; // A + t.i.lo = bcast(a)->b.b0 * bcast(b)->b.b0; // A + t.b.b3 += bcast(a)->b.b3 * + bcast(b)->b.b0; // G + t.b.b3 += bcast(a)->b.b2 * + bcast(b)->b.b1; // F + t.i.hi += bcast(a)->b.b2 * bcast(b)->b.b0; // E <- b lost in .lst + // bcast(a)->i.hi is free ! + t.i.hi += bcast(a)->b.b1 * bcast(b)->b.b1; // D <- b lost in .lst + + bcast(a)->bi.b3 = bcast(a)->b.b1 * + bcast(b)->b.b2; + bcast(a)->bi.i12 = bcast(a)->b.b1 * + bcast(b)->b.b0; // C + + bcast(b)->bi.b3 = bcast(a)->b.b0 * + bcast(b)->b.b3; + bcast(b)->bi.i12 = bcast(a)->b.b0 * + bcast(b)->b.b1; // B + bcast(b)->bi.b0 = 0; // B + bcast(a)->bi.b0 = 0; // C + t.l += a; + + return t.l + b; +} + diff --git a/device/lib/hc08/_ret.c b/device/lib/hc08/_ret.c new file mode 100644 index 0000000..c522c6c --- /dev/null +++ b/device/lib/hc08/_ret.c @@ -0,0 +1,3 @@ + +__data unsigned char _ret2; +__data unsigned char _ret3; diff --git a/device/lib/incl.mk b/device/lib/incl.mk new file mode 100644 index 0000000..7ab6038 --- /dev/null +++ b/device/lib/incl.mk @@ -0,0 +1,97 @@ +COMMON_FLOAT = \ + _atof.c \ + _schar2fs.c \ + _sint2fs.c \ + _slong2fs.c \ + _uchar2fs.c \ + _uint2fs.c \ + _ulong2fs.c \ + _fs2schar.c \ + _fs2sint.c \ + _fs2slong.c \ + _fs2uchar.c \ + _fs2uint.c \ + _fs2ulong.c \ + _fsadd.c \ + _fsdiv.c \ + _fsmul.c \ + _fssub.c \ + _fseq.c \ + _fsgt.c \ + _fslt.c \ + _fsneq.c \ + fabsf.c \ + frexpf.c \ + ldexpf.c \ + expf.c \ + powf.c \ + sincosf.c \ + sinf.c \ + cosf.c \ + logf.c \ + log10f.c \ + sqrtf.c \ + tancotf.c \ + tanf.c \ + cotf.c \ + asincosf.c \ + asinf.c \ + acosf.c \ + atanf.c \ + atan2f.c \ + sincoshf.c \ + sinhf.c \ + coshf.c \ + tanhf.c \ + floorf.c \ + ceilf.c \ + modff.c \ + errno.c + +COMMON_LONG = \ + _divslong.c \ + _modslong.c \ + _modulong.c + +COMMON_SDCC = \ + _atoi.c \ + _atol.c \ + abs.c \ + labs.c \ + rand.c \ + _iscntrl.c \ + _isdigit.c \ + _isgraph.c \ + _isprint.c \ + _ispunct.c \ + _isspace.c \ + _islower.c \ + _isupper.c \ + _isxdigit.c \ + _strcat.c \ + _strchr.c \ + _strcmp.c \ + _strcpy.c \ + _strcspn.c \ + _strncat.c \ + _strncmp.c \ + _strncpy.c \ + _strpbrk.c \ + _strrchr.c \ + _strspn.c \ + _strstr.c \ + _strtok.c \ + _memcmp.c \ + _memcpy.c \ + _memset.c \ + _calloc.c \ + _malloc.c \ + _realloc.c \ + _free.c \ + printf_large.c \ + puts.c \ + gets.c \ + assert.c \ + time.c + +MODELS = small medium large diff --git a/device/lib/labs.c b/device/lib/labs.c new file mode 100644 index 0000000..3b64c07 --- /dev/null +++ b/device/lib/labs.c @@ -0,0 +1,27 @@ +/*------------------------------------------------------------------------- + abs.c: computes absolute value of an integer. + + Copyright (C) 2004 - Maarten Brock, sourceforge.brock@dse.nl + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-------------------------------------------------------------------------*/ + +#include + +long int labs(long int j) +{ + return (j >= 0) ? j : -j; +} +//END OF MODULE diff --git a/device/lib/large/Makefile.in b/device/lib/large/Makefile.in new file mode 100644 index 0000000..472b701 --- /dev/null +++ b/device/lib/large/Makefile.in @@ -0,0 +1,10 @@ +all: + $(MAKE) -C ../mcs51 all + cp ../mcs51/*.rel . + touch dummy.rel + +clean: + rm -f *.rel + +distclean: clean + rm -f Makefile \ No newline at end of file diff --git a/device/lib/ldexpf.c b/device/lib/ldexpf.c new file mode 100644 index 0000000..549fff6 --- /dev/null +++ b/device/lib/ldexpf.c @@ -0,0 +1,36 @@ +/* ldexpf.c: Build a float from a mantisa and exponent. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +#include +#include + +float ldexpf(const float x, const int pw2) +{ + union float_long fl; + long e; + + fl.f = x; + + e=(fl.l >> 23) & 0x000000ff; + e+=pw2; + fl.l= ((e & 0xff) << 23) | (fl.l & 0x807fffff); + + return(fl.f); +} diff --git a/device/lib/log10f.c b/device/lib/log10f.c new file mode 100644 index 0000000..8a564bb --- /dev/null +++ b/device/lib/log10f.c @@ -0,0 +1,27 @@ +/* log10f.c: Computes the base 10 log of a 32 bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +#include +#include + +float log10f(const float x) _FLOAT_FUNC_REENTRANT +{ + return logf(x)*0.4342944819; +} diff --git a/device/lib/logf.c b/device/lib/logf.c new file mode 100644 index 0000000..d499f8c --- /dev/null +++ b/device/lib/logf.c @@ -0,0 +1,237 @@ +/* logf.c: Computes the natural log of a 32 bit float as outlined in [1]. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +#define SDCC_MATH_LIB +#include +#include + + +#ifdef MATH_ASM_MCS51 + +#define SDCC_FLOAT_LIB +#include + +// TODO: share with other temps +static __data unsigned char logf_tmp[4]; + +float logf(float x) +{ + x; + __asm + + // extract the two input, placing it into: + // sign exponent mantiassa + // ---- -------- --------- + // x: sign_a exp_a r4/r3/r2 + + lcall fsgetarg +logf_neg_check: + jnb sign_a, logf_zero_check + // TODO: set errno to EDOM (negative numbers not allowed) + ljmp fs_return_nan + +logf_zero_check: + cjne r4, #0, logf_ok + // TODO: set errno to ERANGE (zero not allowed) + setb sign_a + ljmp fs_return_inf + +logf_ok: + push exp_a + mov a, #3 + mov r1, #0 + lcall fs_rshift_a + + clr a + mov (_logf_tmp + 0), a // y = 0 + mov (_logf_tmp + 1), a + mov (_logf_tmp + 2), a + mov (_logf_tmp + 3), a + mov dptr, #__fs_natural_log_table + mov r0, a +logf_cordic_loop: + mov ar7, r4 // r7/r6/r5 = x >> i + mov ar6, r3 + mov ar5, r2 + mov b, r1 + mov a, r0 + lcall __fs_cordic_rshift_r765_unsigned + mov a, r1 // check if x + (x >> i) > 1.0 + add a, b + mov a, r2 + addc a, r5 + mov a, r3 + addc a, r6 + mov a, r4 + addc a, r7 + anl a, #0xE0 + jnz logf_cordic_skip + mov a, r1 // x = x + (x >> i) + add a, b + mov r1, a + mov a, r2 + addc a, r5 + mov r2, a + mov a, r3 + addc a, r6 + mov r3, a + mov a, r4 + addc a, r7 + mov r4, a + clr a // y = y + log_table[i] + movc a, @a+dptr + add a, (_logf_tmp + 0) + mov (_logf_tmp + 0), a + mov a, #1 + movc a, @a+dptr + addc a, (_logf_tmp + 1) + mov (_logf_tmp + 1), a + mov a, #2 + movc a, @a+dptr + addc a, (_logf_tmp + 2) + mov (_logf_tmp + 2), a + mov a, #3 + movc a, @a+dptr + addc a, (_logf_tmp + 3) + mov (_logf_tmp + 3), a +logf_cordic_skip: + inc dptr + inc dptr + inc dptr + inc dptr + inc r0 + cjne r0, #30, logf_cordic_loop + // at this point, _logf_tmp has the natural log of the positive + // normalized fractional part (0.5 to 1.0 -> 0.693 to 0.0) + mov r4, (_logf_tmp + 3) + mov r3, (_logf_tmp + 2) + mov r2, (_logf_tmp + 1) + mov r1, (_logf_tmp + 0) + mov exp_a, #129 + setb sign_a + lcall fs_normalize_a + pop acc + cjne a, #126, logf_exponent + // if the input exponent was 126, then we don't need to add + // anything and we can just return the with we have already + + // TODO: which of these gives best accuracy??? + ljmp fs_zerocheck_return + //ljmp fs_round_and_return +logf_exponent: + jc logf_exp_neg + // the input exponent was greater than 126 +logf_exp_pos: + add a, #130 + clr sign_b + sjmp logf_exp_scale +logf_exp_neg: + // the input exponent was less than 126 + cpl a + add a, #127 + setb sign_b +logf_exp_scale: + // r0 has abs(exp - 126) + mov r0, a + // put the log of faction into b, so we can use a to compute + // the offset to be added to it or subtracted from it + lcall fs_swap_a_b + // multiply r0 by log(2), or r0 * 0xB17218 + mov a, #0x18 + mov b, r0 + mul ab + mov r1, a + mov r2, b + mov a, #0xB1 + mov b, r0 + mul ab + mov r3, a + mov r4, b + mov a, #0x72 + mov b, r0 + mul ab + add a, r2 + mov r2, a + mov a, b + addc a, r3 + mov r3, a + clr a + addc a, r4 + mov r4, a + // turn r0 * log(2) into a proper float + mov exp_a, #134 + lcall fs_normalize_a + // now just add log(fractional) +/- log(2) * abs(exp - 126) + ljmp fsadd_direct_entry + __endasm; +#pragma less_pedantic +} + +#else // not MATH_ASM_MCS51 + +/*Constants for 24 bits or less (8 decimal digits)*/ +#define A0 -0.5527074855E+0 +#define B0 -0.6632718214E+1 +#define A(w) (A0) +#define B(w) (w+B0) + +#define C0 0.70710678118654752440 +#define C1 0.693359375 /*355.0/512.0*/ +#define C2 -2.121944400546905827679E-4 + +float logf(const float x) _FLOAT_FUNC_REENTRANT +{ +#if defined(SDCC_mcs51) && defined(SDCC_MODEL_SMALL) \ + && !defined(SDCC_NOOVERLAY) + volatile +#endif + float Rz; + float f, z, w, znum, zden, xn; + int n; + + if (x<=0.0) + { + errno=EDOM; + return 0.0; + } + f=frexpf(x, &n); + znum=f-0.5; + if (f>C0) + { + znum-=0.5; + zden=(f*0.5)+0.5; + } + else + { + n--; + zden=znum*0.5+0.5; + } + z=znum/zden; + w=z*z; + + Rz=z+z*(w*A(w)/B(w)); + xn=n; + return ((xn*C2+Rz)+xn*C1); +} + +#endif diff --git a/device/lib/make51lib.bat b/device/lib/make51lib.bat new file mode 100644 index 0000000..ec1773f --- /dev/null +++ b/device/lib/make51lib.bat @@ -0,0 +1,37 @@ +del small\*.lib +set SDCCLIB_CC=sdcc --use-stdout --model-small -c +sdcclib -l small\libfloat.lib libfloat.lib +sdcclib -l small\libint.lib libint.lib +sdcclib -l small\liblong.lib liblong.lib +sdcclib -l small\libsdcc.lib libsdcc.lib +cd mcs51 +@for %%I in (*.asm) do asx8051 -plosgff %%I +@for %%I in (*.rel) do sdcclib ..\small\mcs51.lib %%I +cd.. +del *.rel *.sym *.asm *.lst *.adb + +del medium\*.lib +set SDCCLIB_CC=sdcc --use-stdout --model-medium -c +sdcclib -l medium\libfloat.lib libfloat.lib +sdcclib -l medium\libint.lib libint.lib +sdcclib -l medium\liblong.lib liblong.lib +sdcclib -l medium\libsdcc.lib libsdcc.lib +cd mcs51 +@for %%I in (*.asm) do asx8051 -plosgff %%I +@for %%I in (*.rel) do sdcclib ..\medium\mcs51.lib %%I +cd.. +del *.rel *.sym *.asm *.lst *.adb + +del large\*.lib +set SDCCLIB_CC=sdcc --use-stdout --model-large -DUSE_FLOATS -c +sdcclib -l large\libfloat.lib libfloat.lib +sdcclib -l large\libint.lib libint.lib +sdcclib -l large\liblong.lib liblong.lib +sdcclib -l large\libsdcc.lib libsdcc.lib +cd mcs51 +@for %%I in (*.asm) do asx8051 -plosgff %%I +@for %%I in (*.rel) do sdcclib ..\large\mcs51.lib %%I +cd.. +del *.rel *.sym *.asm *.lst *.adb + +set SDCCLIB_CC= \ No newline at end of file diff --git a/device/lib/mcs51/Makefile.in b/device/lib/mcs51/Makefile.in new file mode 100644 index 0000000..16a2dea --- /dev/null +++ b/device/lib/mcs51/Makefile.in @@ -0,0 +1,54 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ + +top_srcdir = @top_srcdir@ +top_builddir = @top_builddir@ + +LIB_TYPE = @LIB_TYPE@ +SAS = $(top_builddir)/bin/asx8051 +SCC = $(top_builddir)/bin/sdcc + +PORTDIR = ../build/$(PORT) + +OBJ = crtstart.rel crtxinit.rel crtxclear.rel crtclear.rel crtxstack.rel \ + crtpagesfr.rel crtbank.rel crtcall.rel + +LIB = mcs51.lib + +CC = $(SCC) +AS = $(SAS) +ASFLAGS = -plosgff + +CFLAGS = -I$(top_srcdir)/include --std-c89 + +all: $(PORTDIR)/$(LIB) + +$(PORTDIR)/$(LIB): $(OBJ) Makefile +ifeq ($(LIB_TYPE), SDCCLIB) + rm -f $@; \ + ../../../bin/sdcclib -a $@ $(OBJ) +else ifeq ($(LIB_TYPE), AR) + ar -Scq $@ $(OBJ) +else ifeq ($(LIB_TYPE), RANLIB) + ar -Scq $@ $(OBJ) + $(top_builddir)/bin/asranlib $@ +else + rm -f $@ + for i in $(basename $(OBJ)); do echo $$i >>$@; done + cp $(OBJ) $(PORTDIR) +endif + +%.rel: %.c + $(CC) $(CFLAGS) -c $< + +%.rel: %.asm + @# TODO: asx8051 should place it's output in the current dir + test $(srcdir) = . || cp $< . + -$(AS) $(ASFLAGS) $(notdir $<) + test $(srcdir) = . || rm $(notdir $<) + +clean: + rm -f *.rel *.sym *.lst *~ $(CLEANSPEC) *.dump* *.lib + +distclean: clean + rm -r Makefile diff --git a/device/lib/mcs51/README b/device/lib/mcs51/README new file mode 100644 index 0000000..84adfe2 --- /dev/null +++ b/device/lib/mcs51/README @@ -0,0 +1,4 @@ +sdcc/device/lib/mcs51 +------------------- + +mcs51 specific routines. diff --git a/device/lib/mcs51/crtbank.asm b/device/lib/mcs51/crtbank.asm new file mode 100644 index 0000000..60ef6fd --- /dev/null +++ b/device/lib/mcs51/crtbank.asm @@ -0,0 +1,69 @@ +; /*------------------------------------------------------------------------- +; +; crtbank.asm :- C run-time: bank switching +; +; This library is free software; you can redistribute it and/or modify it +; under the terms of the GNU Library General Public License as published by the +; Free Software Foundation; either version 2, or (at your option) any +; later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public License +; along with this program; if not, write to the Free Software +; Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; -------------------------------------------------------------------------*/ + + .area HOME (CODE) + .area GSINIT0 (CODE) + .area GSINIT1 (CODE) + .area GSINIT2 (CODE) + .area GSINIT3 (CODE) + .area GSINIT4 (CODE) + .area GSINIT5 (CODE) + .area GSINIT (CODE) + .area GSFINAL (CODE) + .area CSEG (CODE) + +; /*------------------------------------------------------------------------- +; Example for SiLabs C8051F12x / C8051F13x with 128kB code memory +; divided into 4 banks of 32kB +; These devices have an sfr called PSBANK containing two parts: +; COBANK (bit 5:4): Constant Operations Bank +; IFBANK (bit 1:0): Instruction Fetch Bank +; From 0x0000 to 0x7FFF bank 0 is always accessed +; From 0x8000 to 0xFFFF bank COBANK is accessed for reading with movc +; From 0x8000 to 0xFFFF bank IFBANK is accessed for executing instructions +; +; Make your own copy of this file, +; adapt it to your situation, +; and compile/link it in your project +; -------------------------------------------------------------------------*/ + + .globl _PSBANK + + .area HOME (CODE) + +__sdcc_banked_call:: + push _PSBANK ;save return bank + xch a,r0 ;save Acc in r0, do not assume any register bank + push acc ;push LSB address + mov a,r1 + push acc ;push MSB address + mov a,r2 ;get new bank + anl a,#0x0F ;remove storage class indicator + anl _PSBANK,#0xF0 + orl _PSBANK,a ;select bank + xch a,r0 ;restore Acc + ret ;make the call + +__sdcc_banked_ret:: + pop _PSBANK ;restore bank + ret ;return to caller diff --git a/device/lib/mcs51/crtcall.asm b/device/lib/mcs51/crtcall.asm new file mode 100644 index 0000000..c2e47ab --- /dev/null +++ b/device/lib/mcs51/crtcall.asm @@ -0,0 +1,39 @@ +; /*------------------------------------------------------------------------- +; +; crtcall.asm :- C run-time: indirect function call +; +; This library is free software; you can redistribute it and/or modify it +; under the terms of the GNU Library General Public License as published by the +; Free Software Foundation; either version 2, or (at your option) any +; later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public License +; along with this program; if not, write to the Free Software +; Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; -------------------------------------------------------------------------*/ + + .area HOME (CODE) + .area GSINIT0 (CODE) + .area GSINIT1 (CODE) + .area GSINIT2 (CODE) + .area GSINIT3 (CODE) + .area GSINIT4 (CODE) + .area GSINIT5 (CODE) + .area GSINIT (CODE) + .area GSFINAL (CODE) + .area CSEG (CODE) + + .area HOME (CODE) + +__sdcc_call_dptr:: + clr a + jmp @a+dptr diff --git a/device/lib/mcs51/crtclear.asm b/device/lib/mcs51/crtclear.asm new file mode 100644 index 0000000..a9c979d --- /dev/null +++ b/device/lib/mcs51/crtclear.asm @@ -0,0 +1,41 @@ +; /*------------------------------------------------------------------------- +; +; crtclear.asm :- C run-time: clear DATA/IDATA +; +; This library is free software; you can redistribute it and/or modify it +; under the terms of the GNU Library General Public License as published by the +; Free Software Foundation; either version 2, or (at your option) any +; later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public License +; along with this program; if not, write to the Free Software +; Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; -------------------------------------------------------------------------*/ + + .area CSEG (CODE) + .area GSINIT0 (CODE) + .area GSINIT1 (CODE) + .area GSINIT2 (CODE) + .area GSINIT3 (CODE) + .area GSINIT4 (CODE) + .area GSINIT5 (CODE) + .area GSINIT (CODE) + .area GSFINAL (CODE) + + .area GSINIT4 (CODE) + +__mcs51_genRAMCLEAR:: + clr a + mov r0,#(l_IRAM-1) ; mov r0,a will do for most devices +00004$: mov @r0,a + djnz r0,00004$ +; _mcs51_genRAMCLEAR() end diff --git a/device/lib/mcs51/crtpagesfr.asm b/device/lib/mcs51/crtpagesfr.asm new file mode 100644 index 0000000..dd3ba08 --- /dev/null +++ b/device/lib/mcs51/crtpagesfr.asm @@ -0,0 +1,24 @@ +; /*------------------------------------------------------------------------- +; +; crtpagesfr.asm :- C run-time: define page sfr for movx @r0/r1 instructions +; +; This library is free software; you can redistribute it and/or modify it +; under the terms of the GNU Library General Public License as published by the +; Free Software Foundation; either version 2, or (at your option) any +; later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public License +; along with this program; if not, write to the Free Software +; Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; -------------------------------------------------------------------------*/ + +__XPAGE == 0xa0 ; 0xa0 is P2 on the original 8051 diff --git a/device/lib/mcs51/crtstart.asm b/device/lib/mcs51/crtstart.asm new file mode 100644 index 0000000..37978ed --- /dev/null +++ b/device/lib/mcs51/crtstart.asm @@ -0,0 +1,47 @@ +; /*------------------------------------------------------------------------- +; +; crtstart.asm :- C run-time: startup +; +; This library is free software; you can redistribute it and/or modify it +; under the terms of the GNU Library General Public License as published by the +; Free Software Foundation; either version 2, or (at your option) any +; later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public License +; along with this program; if not, write to the Free Software +; Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; -------------------------------------------------------------------------*/ + + .area CSEG (CODE) + .area GSINIT0 (CODE) + .area GSINIT1 (CODE) + .area GSINIT2 (CODE) + .area GSINIT3 (CODE) + .area GSINIT4 (CODE) + .area GSINIT5 (CODE) + .area GSINIT (CODE) + .area GSFINAL (CODE) + + .globl __start__stack + + .area GSINIT0 (CODE) + +__sdcc_gsinit_startup:: + mov sp,#__start__stack - 1 + + .area GSINIT2 (CODE) + + lcall __sdcc_external_startup + mov a,dpl + jz __sdcc_init_data + ljmp __sdcc_program_startup +__sdcc_init_data: diff --git a/device/lib/mcs51/crtxclear.asm b/device/lib/mcs51/crtxclear.asm new file mode 100644 index 0000000..644ae4e --- /dev/null +++ b/device/lib/mcs51/crtxclear.asm @@ -0,0 +1,61 @@ +; /*------------------------------------------------------------------------- +; +; crtxclear.asm :- C run-time: clear XSEG +; +; This library is free software; you can redistribute it and/or modify it +; under the terms of the GNU Library General Public License as published by the +; Free Software Foundation; either version 2, or (at your option) any +; later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public License +; along with this program; if not, write to the Free Software +; Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; -------------------------------------------------------------------------*/ + + .area CSEG (CODE) + .area GSINIT0 (CODE) + .area GSINIT1 (CODE) + .area GSINIT2 (CODE) + .area GSINIT3 (CODE) + .area GSINIT4 (CODE) + .area GSINIT5 (CODE) + .area GSINIT (CODE) + .area GSFINAL (CODE) + + .area GSINIT4 (CODE) + +__mcs51_genXRAMCLEAR:: + mov r0,#l_PSEG + mov a,r0 + orl a,#(l_PSEG >> 8) + jz 00006$ + mov r1,#s_PSEG + mov __XPAGE,#(s_PSEG >> 8) + clr a +00005$: movx @r1,a + inc r1 + djnz r0,00005$ + +00006$: + mov r0,#l_XSEG + mov a,r0 + orl a,#(l_XSEG >> 8) + jz 00008$ + mov r1,#((l_XSEG + 255) >> 8) + mov dptr,#s_XSEG + clr a +00007$: movx @dptr,a + inc dptr + djnz r0,00007$ + djnz r1,00007$ +00008$: + diff --git a/device/lib/mcs51/crtxinit.asm b/device/lib/mcs51/crtxinit.asm new file mode 100644 index 0000000..87021c6 --- /dev/null +++ b/device/lib/mcs51/crtxinit.asm @@ -0,0 +1,92 @@ +; /*------------------------------------------------------------------------- +; +; crtxinit.asm :- C run-time: copy XINIT to XISEG +; +; This library is free software; you can redistribute it and/or modify it +; under the terms of the GNU Library General Public License as published by the +; Free Software Foundation; either version 2, or (at your option) any +; later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public License +; along with this program; if not, write to the Free Software +; Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; -------------------------------------------------------------------------*/ + +; Set DUAL_DPTR to 1 and reassemble if your derivative has dual data pointers +; Especially useful if movx @Ri cannot go beyond the first 256 bytes of xdata +; due to lack of P2 or _XPAGE +; If the derivative has auto-toggle or auto-increment it can be further optimized + DUAL_DPTR = 0 + + .area CSEG (CODE) + .area GSINIT0 (CODE) + .area GSINIT1 (CODE) + .area GSINIT2 (CODE) + .area GSINIT3 (CODE) + .area GSINIT4 (CODE) + .area GSINIT5 (CODE) + .area GSINIT (CODE) + .area GSFINAL (CODE) + + .area GSINIT3 (CODE) + + .if DUAL_DPTR + + .globl _DPS ; assume DPSEL is in DPS bit0 + +__mcs51_genXINIT:: + mov r1,#l_XINIT + mov a,r1 + orl a,#(l_XINIT >> 8) + jz 00003$ + mov r2,#((l_XINIT+255) >> 8) + orl _DPS,#0x01 ; set DPSEL, select DPTR1 + mov dptr,#s_XINIT ; DPTR1 for code + dec _DPS ; clear DPSEL, select DPTR0 + mov dptr,#s_XISEG ; DPTR0 for xdata +00001$: clr a + inc _DPS ; set DPSEL, select DPTR1 + movc a,@a+dptr + inc dptr + dec _DPS ; clear DPSEL, select DPTR0 + movx @dptr,a + inc dptr + djnz r1,00001$ + djnz r2,00001$ +00003$: + + .else + + .globl __XPAGE + +__mcs51_genXINIT:: + mov r1,#l_XINIT + mov a,r1 + orl a,#(l_XINIT >> 8) + jz 00003$ + mov r2,#((l_XINIT+255) >> 8) + mov dptr,#s_XINIT + mov r0,#s_XISEG + mov __XPAGE,#(s_XISEG >> 8) +00001$: clr a + movc a,@a+dptr + movx @r0,a + inc dptr + inc r0 + cjne r0,#0,00002$ + inc __XPAGE +00002$: djnz r1,00001$ + djnz r2,00001$ + mov __XPAGE,#0xFF +00003$: + + .endif diff --git a/device/lib/mcs51/crtxstack.asm b/device/lib/mcs51/crtxstack.asm new file mode 100644 index 0000000..9fbf66d --- /dev/null +++ b/device/lib/mcs51/crtxstack.asm @@ -0,0 +1,53 @@ +; /*------------------------------------------------------------------------- +; +; crtxstack.asm :- C run-time: setup xstack +; +; This library is free software; you can redistribute it and/or modify it +; under the terms of the GNU Library General Public License as published by the +; Free Software Foundation; either version 2, or (at your option) any +; later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public License +; along with this program; if not, write to the Free Software +; Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; -------------------------------------------------------------------------*/ + + .area CSEG (CODE) + .area GSINIT0 (CODE) + .area GSINIT1 (CODE) + .area GSINIT2 (CODE) + .area GSINIT3 (CODE) + .area GSINIT4 (CODE) + .area GSINIT5 (CODE) + .area GSINIT (CODE) + .area GSFINAL (CODE) + + .globl __start__xstack + .globl __XPAGE + + .area GSINIT1 (CODE) + +__sdcc_init_xstack:: + +; Need to initialize in GSINIT1 in case the user's __sdcc_external_startup +; uses the xstack. + + mov __XPAGE,#(__start__xstack >> 8) + mov _spx,#__start__xstack + + .area GSINIT5 (CODE) + +; Need to initialize in GSINIT5 because __mcs51_genXINIT modifies __XPAGE +; and __mcs51_genRAMCLEAR modifies _spx. + + mov __XPAGE,#(__start__xstack >> 8) + mov _spx,#__start__xstack diff --git a/device/lib/medium/Makefile.in b/device/lib/medium/Makefile.in new file mode 100644 index 0000000..472b701 --- /dev/null +++ b/device/lib/medium/Makefile.in @@ -0,0 +1,10 @@ +all: + $(MAKE) -C ../mcs51 all + cp ../mcs51/*.rel . + touch dummy.rel + +clean: + rm -f *.rel + +distclean: clean + rm -f Makefile \ No newline at end of file diff --git a/device/lib/modff.c b/device/lib/modff.c new file mode 100644 index 0000000..4682876 --- /dev/null +++ b/device/lib/modff.c @@ -0,0 +1,27 @@ +/* modff.c: Returns both the integer and fraction of a float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 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See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307 USA. + +Also add information on how to contact you by electronic and paper mail. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the library, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the + library `Frob' (a library for tweaking knobs) written by James Random Hacker. + + , 1 April 1990 + Ty Coon, President of Vice + +That's all there is to it! diff --git a/device/lib/pic/Makefile.common.in b/device/lib/pic/Makefile.common.in new file mode 100644 index 0000000..d20e7df --- /dev/null +++ b/device/lib/pic/Makefile.common.in @@ -0,0 +1,85 @@ +########################################################### +### Makefile.common.in for the SDCC/PIC14 Library +### +### Copyright (C) 2005 by Raphael Neider +### +### The library is currently maintained by +### Raphael Neider +### +### This file may be distributed under the terms of the the +### GNU General Public License (GPL). See GPL for details. +### +### $Id: Makefile.common.in 4785 2007-05-05 07:41:17Z borutr $ +### + +################################################# +### verboseness +#Q ?= # be verbose +Q ?= @ # be quiet +# be really quiet (suppress "Entering/Leaving directory...") +#MAKEFLAGS := $(filter-out -s,$(MAKEFLAGS)) -s + +################################################# +### compiler switches +# ARCH might be overwritten in libio +ARCH ?= 877 + +CFLAGS ?= +CFLAGS += -mpic14 -p16f$(ARCH) +CFLAGS += --std-c99 +CFLAGS += -I. -I$(top_srcdir)/../../include/pic + +################################################# +### optimization flags + +################################################# +### debugging PIC14 port +#CFLAGS += --debug-ralloc +#CFLAGS += --debug-xtra +#CFLAGS += --pcode-verbose +CFLAGS += --i-code-in-asm + +################################################# +### debugging SDCC's optimizations +#CFLAGS += --nooverlay +#CFLAGS += --nogcse +#CFLAGS += --nolabelopt +#CFLAGS += --noinvariant +#CFLAGS += --noinduction +#CFLAGS += --nojtbound +#CFLAGS += --noloopreverse + +################################################# +### assembler switches +ASFLAGS ?= +ASFLAGS += -pp16f$(ARCH) +ASFLAGS += -I$(top_srcdir)/../../include/pic +ASFLAGS += -I. -I$(srcdir) + +################################################# +### linker switches +LDFLAGS ?= +LDFLAGS += -m -l -w + +################################################# +### librarian switches +LIBFLAGS ?= +LIBFLAGS += -c + +################################################# +### programs to use +CPP = $(top_builddir)/../../../bin/sdcpp +CC = $(top_builddir)/../../../bin/sdcc +AS = @GPASM@ +LD = @GPLINK@ +LIB = @GPLIB@ + +SED ?= @SED@ +GREP ?= @EGREP@ + +MKDIR ?= @MKDIR@ +RMDIR ?= @RMDIR@ +CP ?= @CP@ +MV ?= @MV@ +RM ?= @RM@ + diff --git a/device/lib/pic/Makefile.in b/device/lib/pic/Makefile.in new file mode 100644 index 0000000..1acb6e7 --- /dev/null +++ b/device/lib/pic/Makefile.in @@ -0,0 +1,58 @@ +########################################################### +### Makefile for the SDCC/PIC14 Library +### +### Copyright (C) 2005 by Raphael Neider +### +### The library is currently maintained by +### Raphael Neider +### +### This file may be distributed under the terms of the the +### GNU General Public License (GPL). See GPL for details. +### +### $Id: Makefile.in 4555 2007-01-03 21:19:58Z bernhardheld $ +### + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +VPATH = @srcdir@ +srcdir = @srcdir@ + +include $(top_builddir)/Makefile.common + +ifeq (:,$(findstring :,$(LD) $(AS) $(LIB))) + +.PHONY : all + +all % : + @echo "gputils not found -- PIC14 library not built!" + +else + +SUBDIRS = libsdcc libdev libm +builddir = build +installdir = bin +export installdir + +C_SRC = $(notdir $(wildcard $(srcdir)/*.c)) +S_SRC = $(notdir $(wildcard $(srcdir)/*.S)) +OBJS = $(C_SRC:.c=.o) $(S_SRC:.S=.o) + +.PHONY : all clean clean-intermediate install + +all : install + +install : recurse + +clean : recurse + $(Q)-$(RMDIR) "$(top_builddir)/$(builddir)" + +distclean: clean + $(Q)-$(RM) config.cache config.log config.status Makefile Makefile.common + $(Q)-$(RMDIR) bin + +clean-intermediate : recurse + +include $(top_srcdir)/Makefile.rules + +endif diff --git a/device/lib/pic/Makefile.rules b/device/lib/pic/Makefile.rules new file mode 100644 index 0000000..25cb047 --- /dev/null +++ b/device/lib/pic/Makefile.rules @@ -0,0 +1,70 @@ +########################################################### +### Makefile.rules for the SDCC/PIC14 Library +### +### Copyright (C) 2005 by Raphael Neider +### +### The library is currently maintained by +### Raphael Neider +### +### This file may be distributed under the terms of the the +### GNU General Public License (GPL). See GPL for details. +### +### $Id: Makefile.rules 5205 2008-08-07 21:44:41Z borutr $ +### + +# update dependencies +$(top_builddir)/$(builddir)/%.d : %.c +ifndef SILENT + @echo "[ CPP ] ==> $(patsubst $(top_builddir)/%,%,$@)" +endif + $(Q)$(CPP) $(CPPFLAGS) -o "$@" "$<" + +# assemble +$(top_builddir)/$(builddir)/%.o : %.S +ifndef SILENT + @echo "[ AS ] ==> $(patsubst $(top_builddir)/%,%,$@)" +endif + $(Q)$(CPP) $(CPPFLAGS) -P -o "$*.Spp" "$<" + $(Q)$(AS) $(ASFLAGS) -o "$@" -c "$*.Spp" + $(Q)$(RM) "$*.Spp" + +# compile +$(top_builddir)/$(builddir)/%.o : %.c +ifndef SILENT + @echo "[ CC ] ==> $(patsubst $(top_builddir)/%,%,$@)" +endif + $(Q)$(CC) $(CFLAGS) -o "$@" -c "$<" + +# create library +ifneq (,$(strip $(LIB_O))) +%.lib : $(LIB_O) +ifndef SILENT + @echo "[ LIB ] $(patsubst $(top_builddir)/%,%,$@) <== $(patsubst $(top_builddir)/$(builddir)/%,%,$^)" +endif + $(Q)$(RM) "$@"; $(LIB) $(LIBFLAGS) "$@" $^ +else +%.lib : recurse +ifndef SILENT + @echo "[ LIB ] $(patsubst $(top_builddir)/%,%,$@) <== **/*.o" +endif + $(Q)$(RM) "$@"; LIB_O=`find "$(top_builddir)/$(builddir)" -name "*.o"`; [ "x$${LIB_O}" = "x" ] || $(LIB) $(LIBFLAGS) "$@" $${LIB_O} +endif + +.PHONY : recurse force + +# build sub-directories +ifneq (,$(strip $(SUBDIRS))) +recurse : force + $(Q)+for DIR in $(SUBDIRS) ; do \ + [ -f "$(srcdir)/$${DIR}.ignore" ] && $(GREP) "^$${ARCH}$$" "$${DIR}.ignore" > /dev/null 2>&1 || ( \ + $(MKDIR) "$(top_builddir)/$(builddir)/$${DIR}"; \ + CFLAGS="$(CFLAGS)" $(MAKE) -C "$${DIR}" builddir="$(builddir)/$${DIR}" $(MAKECMDGOALS); \ + ) || exit 1; \ + done +else +recurse : + @# nothing to do +endif + +# target to force remaking of (seemingly) independent targets +force : diff --git a/device/lib/pic/Makefile.subdir b/device/lib/pic/Makefile.subdir new file mode 100644 index 0000000..9a65b33 --- /dev/null +++ b/device/lib/pic/Makefile.subdir @@ -0,0 +1,71 @@ +########################################################### +### Makefile.subdir for the SDCC/PIC14 Library +### +### Copyright (C) 2005 by Raphael Neider +### +### The library is currently maintained by +### Raphael Neider +### +### This file may be distributed under the terms of the the +### GNU General Public License (GPL). See GPL for details. +### +### $Id: Makefile.subdir 4555 2007-01-03 21:19:58Z bernhardheld $ +### + +include $(top_builddir)/Makefile.common + +SUBDIRS ?= +MKLIB ?= + +# fallback: if builddir is not specified via the command line... +builddir ?= build/$(patsubst $(shell cd $(top_srcdir); pwd)/%,%,$(CURDIR)) + +C_SRC ?= $(notdir $(wildcard $(srcdir)/*.c)) +S_SRC ?= $(notdir $(wildcard $(srcdir)/*.S)) +OBJS ?= $(addprefix $(top_builddir)/$(builddir)/,$(C_SRC:%.c=%.o) $(S_SRC:%.S=%.o)) + +LIB_O ?= $(OBJS) + +ifneq (,$(strip $(MKLIB))) +LIB_LIB = $(top_builddir)/$(builddir)/$(MKLIB) +TARGETS ?= $(LIB_LIB) +else +LIB_LIB = +#TARGETS ?= $(OBJS) +endif + +.PHONY : all install clean clean-intermediate + +all : install + +ifneq (,$(strip $(TARGETS))) +# usually install $(LIB_LIB) or $(OBJS), race condition in "[ -d x ] || mkdir x" +install : recurse $(OBJS) $(LIB_LIB) + -@$(MKDIR) "$(top_builddir)/$(installdir)" +ifndef SILENT + @echo "[INSTALL] $(patsubst $(top_builddir)/$(builddir)/%,%,$(TARGETS))" +endif + $(Q)$(CP) $(TARGETS) "$(top_builddir)/$(installdir)" +else +# used in subdirs like libc/ctype whose files +# are contained in a parent's library +install : recurse $(OBJS) $(LIB_LIB) +endif + +clean : recurse + @-echo "dummy" > .dummy + $(Q)-$(RM) .dummy $(foreach suf,asm d p lst hex cod sym,$(OBJS:.o=.$(suf))) + @-echo "dummy" > .dummy + $(Q)-$(RM) .dummy $(OBJS) $(LIB_LIB) + $(Q)-$(RM) $(TARGETS) + $(Q)-$(RM) $(addprefix $(top_builddir)/$(installdir)/,$(notdir $(TARGETS))) + $(Q)-[ ! -d "$(top_builddir)/$(builddir)" ] || $(RMDIR) "$(top_builddir)/$(builddir)" + +distclean : clean + $(Q)-$(RM) Makefile + +clean-intermediate : recurse + @-echo "dummy" > .dummy + $(Q)-$(RM) .dummy $(foreach suf,p lst hex cod sym,$(OBJS:.o=.$(suf))) + +include $(top_srcdir)/Makefile.rules diff --git a/device/lib/pic/NEWS b/device/lib/pic/NEWS new file mode 100644 index 0000000..d213d3c --- /dev/null +++ b/device/lib/pic/NEWS @@ -0,0 +1,52 @@ +--- 2006-03-21 Raphael Neider + +Added device specific SFR definitions in libdev/. +From now on all projects should be linked not only with +libsdcc.lib but also with pic$(ARCH).lib where ARCH is +something like p16f877. + +--- 2005-10-27 Raphael Neider + +Generic pointer support routines and additional arithmetic halpers +have been added to the library. + +Although the compiled library should be portable across (all?) +pic14 devices, I recommend selecting the desired target chip +by setting the ARCH variable to the desired target chip in + - Makefile.common (AFTER having run ./configure) OR + - Makefile.common.in (BEFORE running ./configure) +in order to maximize performance (smaller devices ignore +BANKSEL directives, i.e. updates to the IRP bit). + +--- 2005-09-23 Raphael Neider + +The pic14 library is split into several parts: + +* common part + The common part reuses the (hardware independant) sources found + under device/lib/ (currently not used). +* pic14 specific part + The pic14 specific library routines are found in subdirectories of + device/lib/pic/ and provide specialized implementations better + suited for the pic14 architecture and additional functions not + found in (or not reused from) the common sources. +* device specific part + This part is planned to support specific I/O sub-devices not + common to all pic14 chips. This part is currently absent... + +The SDCC/pic14 library has been created by + Raphael Neider (2005) + +It is currently maintained by + Raphael Neider + +The pic14 and the device specific parts (whose sources are found +in device/lib/pic/) are to be licensed nuder the terms of the +GNU Lesser General Public License (LGPL). See COPYING for details. +The sources from the common part are licensed as indicated in each +file. + +Requests for enhancements, additions or modifications should be posted +at the SDCC user's or developer's mailing list or directly be sent to +the current maintainer of the library as indicated above. + diff --git a/device/lib/pic/README b/device/lib/pic/README new file mode 100644 index 0000000..28179c2 --- /dev/null +++ b/device/lib/pic/README @@ -0,0 +1,20 @@ +README for the SDCC/pic14 library + +Building the library +==================== +1. Edit ./Makefile.in and update the ARCH variable to match your + device. It should be safe to keep the default setting (p18f877), + but performance improvements might be possible in specifying the + actual target chip there. + +2. Run './configure' + +3. Run 'make clean' + +4. Run 'make all' + +Prerequisites +============= +* a recently new GNU Make (tested with 3.80) +* current gputils (tested with 0.13.2) +* SDCC with enabled 14 bit PIC backend (tested with 2.5.4) diff --git a/device/lib/pic/TEMPLATE.S b/device/lib/pic/TEMPLATE.S new file mode 100644 index 0000000..1f95a33 --- /dev/null +++ b/device/lib/pic/TEMPLATE.S @@ -0,0 +1,27 @@ +; ------------------------------------------------------------------------- +; TEMPLATE.S : template for creating library assembler sources +; +; Written By Raphael Neider (2005) +; +; This library is free software; you can redistribute it and/or +; modify it under the terms of the GNU Library General Public +; License as published by the Free Software Foundation; either +; version 2 of the License, or (at your option) any later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public +; License along with this library; if not, write to the +; Free Software Foundation, Inc., 59 Temple Place - Suite 330, +; Boston, MA 02111-1307 USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; +; $Id: TEMPLATE.S 4148 2006-05-01 20:47:12Z tecodev $ +; ------------------------------------------------------------------------ + diff --git a/device/lib/pic/TEMPLATE.c b/device/lib/pic/TEMPLATE.c new file mode 100644 index 0000000..42eb892 --- /dev/null +++ b/device/lib/pic/TEMPLATE.c @@ -0,0 +1,27 @@ +/* --------------------------------------------------------------------------- + TEMPLATE.c : template for creating library sources + + Written By Raphael Neider (2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307 USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: TEMPLATE.c 4148 2006-05-01 20:47:12Z tecodev $ + ------------------------------------------------------------------------ */ + diff --git a/device/lib/pic/configure b/device/lib/pic/configure new file mode 100755 index 0000000..20a7352 --- /dev/null +++ b/device/lib/pic/configure @@ -0,0 +1,3193 @@ +#! /bin/sh +# Guess values for system-dependent variables and create Makefiles. +# Generated by GNU Autoconf 2.60. +# +# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, +# 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +# This configure script is free software; the Free Software Foundation +# gives unlimited permission to copy, distribute and modify it. +## --------------------- ## +## M4sh Initialization. ## +## --------------------- ## + +# Be Bourne compatible +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac +fi +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh + + +# PATH needs CR +# Avoid depending upon Character Ranges. +as_cr_letters='abcdefghijklmnopqrstuvwxyz' +as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +as_cr_Letters=$as_cr_letters$as_cr_LETTERS +as_cr_digits='0123456789' +as_cr_alnum=$as_cr_Letters$as_cr_digits + +# The user is always right. +if test "${PATH_SEPARATOR+set}" != set; then + echo "#! /bin/sh" >conf$$.sh + echo "exit 0" >>conf$$.sh + chmod +x conf$$.sh + if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then + PATH_SEPARATOR=';' + else + PATH_SEPARATOR=: + fi + rm -f conf$$.sh +fi + +# Support unset when possible. +if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then + as_unset=unset +else + as_unset=false +fi + + +# IFS +# We need space, tab and new line, in precisely that order. Quoting is +# there to prevent editors from complaining about space-tab. +# (If _AS_PATH_WALK were called with IFS unset, it would disable word +# splitting by setting IFS to empty value.) +as_nl=' +' +IFS=" "" $as_nl" + +# Find who we are. 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See below for descriptions of some of the useful variables. + +Defaults for the options are specified in brackets. + +Configuration: + -h, --help display this help and exit + --help=short display options specific to this package + --help=recursive display the short help of all the included packages + -V, --version display version information and exit + -q, --quiet, --silent do not print \`checking...' messages + --cache-file=FILE cache test results in FILE [disabled] + -C, --config-cache alias for \`--cache-file=config.cache' + -n, --no-create do not create output files + --srcdir=DIR find the sources in DIR [configure dir or \`..'] + +Installation directories: + --prefix=PREFIX install architecture-independent files in PREFIX + [$ac_default_prefix] + --exec-prefix=EPREFIX install architecture-dependent files in EPREFIX + [PREFIX] + +By default, \`make install' will install all the files in +\`$ac_default_prefix/bin', \`$ac_default_prefix/lib' etc. You can specify +an installation prefix other than \`$ac_default_prefix' using \`--prefix', +for instance \`--prefix=\$HOME'. + +For better control, use the options below. + +Fine tuning of the installation directories: + --bindir=DIR user executables [EPREFIX/bin] + --sbindir=DIR system admin executables [EPREFIX/sbin] + --libexecdir=DIR program executables [EPREFIX/libexec] + --sysconfdir=DIR read-only single-machine data [PREFIX/etc] + --sharedstatedir=DIR modifiable architecture-independent data [PREFIX/com] + --localstatedir=DIR modifiable single-machine data [PREFIX/var] + --libdir=DIR object code libraries [EPREFIX/lib] + --includedir=DIR C header files [PREFIX/include] + --oldincludedir=DIR C header files for non-gcc [/usr/include] + --datarootdir=DIR read-only arch.-independent data root [PREFIX/share] + --datadir=DIR read-only architecture-independent data [DATAROOTDIR] + --infodir=DIR info documentation [DATAROOTDIR/info] + --localedir=DIR locale-dependent data [DATAROOTDIR/locale] + --mandir=DIR man documentation [DATAROOTDIR/man] + --docdir=DIR documentation root [DATAROOTDIR/doc/PACKAGE] + --htmldir=DIR html documentation [DOCDIR] + --dvidir=DIR dvi documentation [DOCDIR] + --pdfdir=DIR pdf documentation [DOCDIR] + --psdir=DIR ps documentation [DOCDIR] +_ACEOF + + cat <<\_ACEOF +_ACEOF +fi + +if test -n "$ac_init_help"; then + + cat <<\_ACEOF + +_ACEOF +ac_status=$? +fi + +if test "$ac_init_help" = "recursive"; then + # If there are subdirs, report their specific --help. + for ac_dir in : $ac_subdirs_all; do test "x$ac_dir" = x: && continue + test -d "$ac_dir" || continue + ac_builddir=. + +case "$ac_dir" in +.) ac_dir_suffix= ac_top_builddir_sub=. ac_top_build_prefix= ;; +*) + ac_dir_suffix=/`echo "$ac_dir" | sed 's,^\.[\\/],,'` + # A ".." for each directory in $ac_dir_suffix. + ac_top_builddir_sub=`echo "$ac_dir_suffix" | sed 's,/[^\\/]*,/..,g;s,/,,'` + case $ac_top_builddir_sub in + "") ac_top_builddir_sub=. ac_top_build_prefix= ;; + *) ac_top_build_prefix=$ac_top_builddir_sub/ ;; + esac ;; +esac +ac_abs_top_builddir=$ac_pwd +ac_abs_builddir=$ac_pwd$ac_dir_suffix +# for backward compatibility: +ac_top_builddir=$ac_top_build_prefix + +case $srcdir in + .) # We are building in place. + ac_srcdir=. + ac_top_srcdir=$ac_top_builddir_sub + ac_abs_top_srcdir=$ac_pwd ;; + [\\/]* | ?:[\\/]* ) # Absolute name. + ac_srcdir=$srcdir$ac_dir_suffix; + ac_top_srcdir=$srcdir + ac_abs_top_srcdir=$srcdir ;; + *) # Relative name. + ac_srcdir=$ac_top_build_prefix$srcdir$ac_dir_suffix + ac_top_srcdir=$ac_top_build_prefix$srcdir + ac_abs_top_srcdir=$ac_pwd/$srcdir ;; +esac +ac_abs_srcdir=$ac_abs_top_srcdir$ac_dir_suffix + + cd "$ac_dir" || { ac_status=$?; continue; } + # Check for guested configure. + if test -f "$ac_srcdir/configure.gnu"; then + echo && + $SHELL "$ac_srcdir/configure.gnu" --help=recursive + elif test -f "$ac_srcdir/configure"; then + echo && + $SHELL "$ac_srcdir/configure" --help=recursive + else + echo "$as_me: WARNING: no configuration information is in $ac_dir" >&2 + fi || ac_status=$? + cd "$ac_pwd" || { ac_status=$?; break; } + done +fi + +test -n "$ac_init_help" && exit $ac_status +if $ac_init_version; then + cat <<\_ACEOF +configure +generated by GNU Autoconf 2.60 + +Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, +2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +This configure script is free software; the Free Software Foundation +gives unlimited permission to copy, distribute and modify it. +_ACEOF + exit +fi +cat >config.log <<_ACEOF +This file contains any messages produced by compilers while +running configure, to aid debugging if configure makes a mistake. + +It was created by $as_me, which was +generated by GNU Autoconf 2.60. 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We remove comments because anyway the quotes in there +# would cause problems or look ugly. +# WARNING: Use '\'' to represent an apostrophe within the trap. +# WARNING: Do not start the trap code with a newline, due to a FreeBSD 4.0 bug. +trap 'exit_status=$? + # Save into config.log some information that might help in debugging. + { + echo + + cat <<\_ASBOX +## ---------------- ## +## Cache variables. ## +## ---------------- ## +_ASBOX + echo + # The following way of writing the cache mishandles newlines in values, +( + for ac_var in `(set) 2>&1 | sed -n '\''s/^\([a-zA-Z_][a-zA-Z0-9_]*\)=.*/\1/p'\''`; do + eval ac_val=\$$ac_var + case $ac_val in #( + *${as_nl}*) + case $ac_var in #( + *_cv_*) { echo "$as_me:$LINENO: WARNING: Cache variable $ac_var contains a newline." >&5 +echo "$as_me: WARNING: Cache variable $ac_var contains a newline." >&2;} ;; + esac + case $ac_var in #( + _ | IFS | as_nl) ;; #( + *) $as_unset $ac_var ;; + esac ;; + esac + done + (set) 2>&1 | + case $as_nl`(ac_space='\'' '\''; set) 2>&1` in #( + *${as_nl}ac_space=\ *) + sed -n \ + "s/'\''/'\''\\\\'\'''\''/g; + s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='\''\\2'\''/p" + ;; #( + *) + sed -n "/^[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*=/p" + ;; + esac | + sort +) + echo + + cat <<\_ASBOX +## ----------------- ## +## Output variables. ## +## ----------------- ## +_ASBOX + echo + for ac_var in $ac_subst_vars + do + eval ac_val=\$$ac_var + case $ac_val in + *\'\''*) ac_val=`echo "$ac_val" | sed "s/'\''/'\''\\\\\\\\'\'''\''/g"`;; + esac + echo "$ac_var='\''$ac_val'\''" + done | sort + echo + + if test -n "$ac_subst_files"; then + cat <<\_ASBOX +## ------------------- ## +## File substitutions. ## +## ------------------- ## +_ASBOX + echo + for ac_var in $ac_subst_files + do + eval ac_val=\$$ac_var + case $ac_val in + *\'\''*) ac_val=`echo "$ac_val" | sed "s/'\''/'\''\\\\\\\\'\'''\''/g"`;; + esac + echo "$ac_var='\''$ac_val'\''" + done | sort + echo + fi + + if test -s confdefs.h; then + cat <<\_ASBOX +## ----------- ## +## confdefs.h. ## +## ----------- ## +_ASBOX + echo + cat confdefs.h + echo + fi + test "$ac_signal" != 0 && + echo "$as_me: caught signal $ac_signal" + echo "$as_me: exit $exit_status" + } >&5 + rm -f core *.core core.conftest.* && + rm -f -r conftest* confdefs* conf$$* $ac_clean_files && + exit $exit_status +' 0 +for ac_signal in 1 2 13 15; do + trap 'ac_signal='$ac_signal'; { (exit 1); exit 1; }' $ac_signal +done +ac_signal=0 + +# confdefs.h avoids OS command line length limits that DEFS can exceed. +rm -f -r conftest* confdefs.h + +# Predefined preprocessor variables. + +cat >>confdefs.h <<_ACEOF +#define PACKAGE_NAME "$PACKAGE_NAME" +_ACEOF + + +cat >>confdefs.h <<_ACEOF +#define PACKAGE_TARNAME "$PACKAGE_TARNAME" +_ACEOF + + +cat >>confdefs.h <<_ACEOF +#define PACKAGE_VERSION "$PACKAGE_VERSION" +_ACEOF + + +cat >>confdefs.h <<_ACEOF +#define PACKAGE_STRING "$PACKAGE_STRING" +_ACEOF + + +cat >>confdefs.h <<_ACEOF +#define PACKAGE_BUGREPORT "$PACKAGE_BUGREPORT" +_ACEOF + + +# Let the site file select an alternate cache file if it wants to. +# Prefer explicitly selected file to automatically selected ones. +if test -n "$CONFIG_SITE"; then + set x "$CONFIG_SITE" +elif test "x$prefix" != xNONE; then + set x "$prefix/share/config.site" "$prefix/etc/config.site" +else + set x "$ac_default_prefix/share/config.site" \ + "$ac_default_prefix/etc/config.site" +fi +shift +for ac_site_file +do + if test -r "$ac_site_file"; then + { echo "$as_me:$LINENO: loading site script $ac_site_file" >&5 +echo "$as_me: loading site script $ac_site_file" >&6;} + sed 's/^/| /' "$ac_site_file" >&5 + . "$ac_site_file" + fi +done + +if test -r "$cache_file"; then + # Some versions of bash will fail to source /dev/null (special + # files actually), so we avoid doing that. + if test -f "$cache_file"; then + { echo "$as_me:$LINENO: loading cache $cache_file" >&5 +echo "$as_me: loading cache $cache_file" >&6;} + case $cache_file in + [\\/]* | ?:[\\/]* ) . "$cache_file";; + *) . "./$cache_file";; + esac + fi +else + { echo "$as_me:$LINENO: creating cache $cache_file" >&5 +echo "$as_me: creating cache $cache_file" >&6;} + >$cache_file +fi + +# Check that the precious variables saved in the cache have kept the same +# value. +ac_cache_corrupted=false +for ac_var in $ac_precious_vars; do + eval ac_old_set=\$ac_cv_env_${ac_var}_set + eval ac_new_set=\$ac_env_${ac_var}_set + eval ac_old_val=\$ac_cv_env_${ac_var}_value + eval ac_new_val=\$ac_env_${ac_var}_value + case $ac_old_set,$ac_new_set in + set,) + { echo "$as_me:$LINENO: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&5 +echo "$as_me: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&2;} + ac_cache_corrupted=: ;; + ,set) + { echo "$as_me:$LINENO: error: \`$ac_var' was not set in the previous run" >&5 +echo "$as_me: error: \`$ac_var' was not set in the previous run" >&2;} + ac_cache_corrupted=: ;; + ,);; + *) + if test "x$ac_old_val" != "x$ac_new_val"; then + { echo "$as_me:$LINENO: error: \`$ac_var' has changed since the previous run:" >&5 +echo "$as_me: error: \`$ac_var' has changed since the previous run:" >&2;} + { echo "$as_me:$LINENO: former value: $ac_old_val" >&5 +echo "$as_me: former value: $ac_old_val" >&2;} + { echo "$as_me:$LINENO: current value: $ac_new_val" >&5 +echo "$as_me: current value: $ac_new_val" >&2;} + ac_cache_corrupted=: + fi;; + esac + # Pass precious variables to config.status. + if test "$ac_new_set" = set; then + case $ac_new_val in + *\'*) ac_arg=$ac_var=`echo "$ac_new_val" | sed "s/'/'\\\\\\\\''/g"` ;; + *) ac_arg=$ac_var=$ac_new_val ;; + esac + case " $ac_configure_args " in + *" '$ac_arg' "*) ;; # Avoid dups. Use of quotes ensures accuracy. + *) ac_configure_args="$ac_configure_args '$ac_arg'" ;; + esac + fi +done +if $ac_cache_corrupted; then + { echo "$as_me:$LINENO: error: changes in the environment can compromise the build" >&5 +echo "$as_me: error: changes in the environment can compromise the build" >&2;} + { { echo "$as_me:$LINENO: error: run \`make distclean' and/or \`rm $cache_file' and start over" >&5 +echo "$as_me: error: run \`make distclean' and/or \`rm $cache_file' and start over" >&2;} + { (exit 1); exit 1; }; } +fi + + + + + + + + + + + + + + + + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + + + +#AC_DEFUN(AC_CONFIG_FILES) + +# Checks for programs. +# Extract the first word of "gpasm", so it can be a program name with args. +set dummy gpasm; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_GPASM+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$GPASM"; then + ac_cv_prog_GPASM="$GPASM" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_GPASM="gpasm" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_GPASM" && ac_cv_prog_GPASM=":" +fi +fi +GPASM=$ac_cv_prog_GPASM +if test -n "$GPASM"; then + { echo "$as_me:$LINENO: result: $GPASM" >&5 +echo "${ECHO_T}$GPASM" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +# Extract the first word of "gplink", so it can be a program name with args. +set dummy gplink; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_GPLINK+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$GPLINK"; then + ac_cv_prog_GPLINK="$GPLINK" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_GPLINK="gplink" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_GPLINK" && ac_cv_prog_GPLINK=":" +fi +fi +GPLINK=$ac_cv_prog_GPLINK +if test -n "$GPLINK"; then + { echo "$as_me:$LINENO: result: $GPLINK" >&5 +echo "${ECHO_T}$GPLINK" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +# Extract the first word of "gplib", so it can be a program name with args. +set dummy gplib; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_GPLIB+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$GPLIB"; then + ac_cv_prog_GPLIB="$GPLIB" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_GPLIB="gplib" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_GPLIB" && ac_cv_prog_GPLIB=":" +fi +fi +GPLIB=$ac_cv_prog_GPLIB +if test -n "$GPLIB"; then + { echo "$as_me:$LINENO: result: $GPLIB" >&5 +echo "${ECHO_T}$GPLIB" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + +# Extract the first word of "rm", so it can be a program name with args. +set dummy rm; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_RM+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$RM"; then + ac_cv_prog_RM="$RM" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_RM="rm -f" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_RM" && ac_cv_prog_RM=":" +fi +fi +RM=$ac_cv_prog_RM +if test -n "$RM"; then + { echo "$as_me:$LINENO: result: $RM" >&5 +echo "${ECHO_T}$RM" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +# Extract the first word of "cp", so it can be a program name with args. +set dummy cp; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CP"; then + ac_cv_prog_CP="$CP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CP="cp" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_CP" && ac_cv_prog_CP=":" +fi +fi +CP=$ac_cv_prog_CP +if test -n "$CP"; then + { echo "$as_me:$LINENO: result: $CP" >&5 +echo "${ECHO_T}$CP" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +# Extract the first word of "mv", so it can be a program name with args. +set dummy mv; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_MV+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$MV"; then + ac_cv_prog_MV="$MV" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_MV="mv" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_MV" && ac_cv_prog_MV=":" +fi +fi +MV=$ac_cv_prog_MV +if test -n "$MV"; then + { echo "$as_me:$LINENO: result: $MV" >&5 +echo "${ECHO_T}$MV" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +# Extract the first word of "ls", so it can be a program name with args. +set dummy ls; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_LS+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$LS"; then + ac_cv_prog_LS="$LS" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_LS="ls" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_LS" && ac_cv_prog_LS=":" +fi +fi +LS=$ac_cv_prog_LS +if test -n "$LS"; then + { echo "$as_me:$LINENO: result: $LS" >&5 +echo "${ECHO_T}$LS" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +# Extract the first word of "sed", so it can be a program name with args. +set dummy sed; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_SED+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$SED"; then + ac_cv_prog_SED="$SED" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_SED="sed" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_SED" && ac_cv_prog_SED=":" +fi +fi +SED=$ac_cv_prog_SED +if test -n "$SED"; then + { echo "$as_me:$LINENO: result: $SED" >&5 +echo "${ECHO_T}$SED" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +{ echo "$as_me:$LINENO: checking for grep that handles long lines and -e" >&5 +echo $ECHO_N "checking for grep that handles long lines and -e... $ECHO_C" >&6; } +if test "${ac_cv_path_GREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + # Extract the first word of "grep ggrep" to use in msg output +if test -z "$GREP"; then +set dummy grep ggrep; ac_prog_name=$2 +if test "${ac_cv_path_GREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_path_GREP_found=false +# Loop through the user's path and test for each of PROGNAME-LIST +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in grep ggrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_GREP="$as_dir/$ac_prog$ac_exec_ext" + { test -f "$ac_path_GREP" && $as_executable_p "$ac_path_GREP"; } || continue + # Check for GNU ac_path_GREP and select it if it is found. + # Check for GNU $ac_path_GREP +case `"$ac_path_GREP" --version 2>&1` in +*GNU*) + ac_cv_path_GREP="$ac_path_GREP" ac_path_GREP_found=:;; +*) + ac_count=0 + echo $ECHO_N "0123456789$ECHO_C" >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + echo 'GREP' >> "conftest.nl" + "$ac_path_GREP" -e 'GREP$' -e '-(cannot match)-' < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + ac_count=`expr $ac_count + 1` + if test $ac_count -gt ${ac_path_GREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_GREP="$ac_path_GREP" + ac_path_GREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + + $ac_path_GREP_found && break 3 + done +done + +done +IFS=$as_save_IFS + + +fi + +GREP="$ac_cv_path_GREP" +if test -z "$GREP"; then + { { echo "$as_me:$LINENO: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&5 +echo "$as_me: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&2;} + { (exit 1); exit 1; }; } +fi + +else + ac_cv_path_GREP=$GREP +fi + + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_path_GREP" >&5 +echo "${ECHO_T}$ac_cv_path_GREP" >&6; } + GREP="$ac_cv_path_GREP" + + +{ echo "$as_me:$LINENO: checking for egrep" >&5 +echo $ECHO_N "checking for egrep... $ECHO_C" >&6; } +if test "${ac_cv_path_EGREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if echo a | $GREP -E '(a|b)' >/dev/null 2>&1 + then ac_cv_path_EGREP="$GREP -E" + else + # Extract the first word of "egrep" to use in msg output +if test -z "$EGREP"; then +set dummy egrep; ac_prog_name=$2 +if test "${ac_cv_path_EGREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_path_EGREP_found=false +# Loop through the user's path and test for each of PROGNAME-LIST +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in egrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_EGREP="$as_dir/$ac_prog$ac_exec_ext" + { test -f "$ac_path_EGREP" && $as_executable_p "$ac_path_EGREP"; } || continue + # Check for GNU ac_path_EGREP and select it if it is found. + # Check for GNU $ac_path_EGREP +case `"$ac_path_EGREP" --version 2>&1` in +*GNU*) + ac_cv_path_EGREP="$ac_path_EGREP" ac_path_EGREP_found=:;; +*) + ac_count=0 + echo $ECHO_N "0123456789$ECHO_C" >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + echo 'EGREP' >> "conftest.nl" + "$ac_path_EGREP" 'EGREP$' < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + ac_count=`expr $ac_count + 1` + if test $ac_count -gt ${ac_path_EGREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_EGREP="$ac_path_EGREP" + ac_path_EGREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + + $ac_path_EGREP_found && break 3 + done +done + +done +IFS=$as_save_IFS + + +fi + +EGREP="$ac_cv_path_EGREP" +if test -z "$EGREP"; then + { { echo "$as_me:$LINENO: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&5 +echo "$as_me: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&2;} + { (exit 1); exit 1; }; } +fi + +else + ac_cv_path_EGREP=$EGREP +fi + + + fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_path_EGREP" >&5 +echo "${ECHO_T}$ac_cv_path_EGREP" >&6; } + EGREP="$ac_cv_path_EGREP" + + +# Extract the first word of "mkdir", so it can be a program name with args. +set dummy mkdir; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_MKDIR+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$MKDIR"; then + ac_cv_prog_MKDIR="$MKDIR" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_MKDIR="mkdir -p" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_MKDIR" && ac_cv_prog_MKDIR=":" +fi +fi +MKDIR=$ac_cv_prog_MKDIR +if test -n "$MKDIR"; then + { echo "$as_me:$LINENO: result: $MKDIR" >&5 +echo "${ECHO_T}$MKDIR" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +# Extract the first word of "rmdir", so it can be a program name with args. +set dummy rmdir; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_RMDIR+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$RMDIR"; then + ac_cv_prog_RMDIR="$RMDIR" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_RMDIR="rmdir" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_RMDIR" && ac_cv_prog_RMDIR=":" +fi +fi +RMDIR=$ac_cv_prog_RMDIR +if test -n "$RMDIR"; then + { echo "$as_me:$LINENO: result: $RMDIR" >&5 +echo "${ECHO_T}$RMDIR" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + +{ echo "$as_me:$LINENO: checking whether ${MAKE-make} sets \$(MAKE)" >&5 +echo $ECHO_N "checking whether ${MAKE-make} sets \$(MAKE)... $ECHO_C" >&6; } +set x ${MAKE-make}; ac_make=`echo "$2" | sed 's/+/p/g; s/[^a-zA-Z0-9_]/_/g'` +if { as_var=ac_cv_prog_make_${ac_make}_set; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.make <<\_ACEOF +SHELL = /bin/sh +all: + @echo '@@@%%%=$(MAKE)=@@@%%%' +_ACEOF +# GNU make sometimes prints "make[1]: Entering...", which would confuse us. +case `${MAKE-make} -f conftest.make 2>/dev/null` in + *@@@%%%=?*=@@@%%%*) + eval ac_cv_prog_make_${ac_make}_set=yes;; + *) + eval ac_cv_prog_make_${ac_make}_set=no;; +esac +rm -f conftest.make +fi +if eval test \$ac_cv_prog_make_${ac_make}_set = yes; then + { echo "$as_me:$LINENO: result: yes" >&5 +echo "${ECHO_T}yes" >&6; } + SET_MAKE= +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } + SET_MAKE="MAKE=${MAKE-make}" +fi + + +# Checks for libraries. + +# Checks for header files. + +# Checks for typedefs, structures, and compiler characteristics. + +# Checks for library functions. + +ac_config_files="$ac_config_files Makefile Makefile.common libdev/Makefile libsdcc/Makefile libm/Makefile" + +cat >confcache <<\_ACEOF +# This file is a shell script that caches the results of configure +# tests run on this system so they can be shared between configure +# scripts and configure runs, see configure's option --config-cache. +# It is not useful on other systems. If it contains results you don't +# want to keep, you may remove or edit it. +# +# config.status only pays attention to the cache file if you give it +# the --recheck option to rerun configure. +# +# `ac_cv_env_foo' variables (set or unset) will be overridden when +# loading this file, other *unset* `ac_cv_foo' will be assigned the +# following values. + +_ACEOF + +# The following way of writing the cache mishandles newlines in values, +# but we know of no workaround that is simple, portable, and efficient. +# So, we kill variables containing newlines. +# Ultrix sh set writes to stderr and can't be redirected directly, +# and sets the high bit in the cache file unless we assign to the vars. +( + for ac_var in `(set) 2>&1 | sed -n 's/^\([a-zA-Z_][a-zA-Z0-9_]*\)=.*/\1/p'`; do + eval ac_val=\$$ac_var + case $ac_val in #( + *${as_nl}*) + case $ac_var in #( + *_cv_*) { echo "$as_me:$LINENO: WARNING: Cache variable $ac_var contains a newline." >&5 +echo "$as_me: WARNING: Cache variable $ac_var contains a newline." >&2;} ;; + esac + case $ac_var in #( + _ | IFS | as_nl) ;; #( + *) $as_unset $ac_var ;; + esac ;; + esac + done + + (set) 2>&1 | + case $as_nl`(ac_space=' '; set) 2>&1` in #( + *${as_nl}ac_space=\ *) + # `set' does not quote correctly, so add quotes (double-quote + # substitution turns \\\\ into \\, and sed turns \\ into \). + sed -n \ + "s/'/'\\\\''/g; + s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='\\2'/p" + ;; #( + *) + # `set' quotes correctly as required by POSIX, so do not add quotes. + sed -n "/^[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*=/p" + ;; + esac | + sort +) | + sed ' + /^ac_cv_env_/b end + t clear + :clear + s/^\([^=]*\)=\(.*[{}].*\)$/test "${\1+set}" = set || &/ + t end + s/^\([^=]*\)=\(.*\)$/\1=${\1=\2}/ + :end' >>confcache +if diff "$cache_file" confcache >/dev/null 2>&1; then :; else + if test -w "$cache_file"; then + test "x$cache_file" != "x/dev/null" && + { echo "$as_me:$LINENO: updating cache $cache_file" >&5 +echo "$as_me: updating cache $cache_file" >&6;} + cat confcache >$cache_file + else + { echo "$as_me:$LINENO: not updating unwritable cache $cache_file" >&5 +echo "$as_me: not updating unwritable cache $cache_file" >&6;} + fi +fi +rm -f confcache + +test "x$prefix" = xNONE && prefix=$ac_default_prefix +# Let make expand exec_prefix. +test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + +# Transform confdefs.h into DEFS. +# Protect against shell expansion while executing Makefile rules. +# Protect against Makefile macro expansion. +# +# If the first sed substitution is executed (which looks for macros that +# take arguments), then branch to the quote section. Otherwise, +# look for a macro that doesn't take arguments. +ac_script=' +t clear +:clear +s/^[ ]*#[ ]*define[ ][ ]*\([^ (][^ (]*([^)]*)\)[ ]*\(.*\)/-D\1=\2/g +t quote +s/^[ ]*#[ ]*define[ ][ ]*\([^ ][^ ]*\)[ ]*\(.*\)/-D\1=\2/g +t quote +b any +:quote +s/[ `~#$^&*(){}\\|;'\''"<>?]/\\&/g +s/\[/\\&/g +s/\]/\\&/g +s/\$/$$/g +H +:any +${ + g + s/^\n// + s/\n/ /g + p +} +' +DEFS=`sed -n "$ac_script" confdefs.h` + + +ac_libobjs= +ac_ltlibobjs= +for ac_i in : $LIBOBJS; do test "x$ac_i" = x: && continue + # 1. Remove the extension, and $U if already installed. + ac_script='s/\$U\././;s/\.o$//;s/\.obj$//' + ac_i=`echo "$ac_i" | sed "$ac_script"` + # 2. Prepend LIBOBJDIR. When used with automake>=1.10 LIBOBJDIR + # will be set to the directory where LIBOBJS objects are built. + ac_libobjs="$ac_libobjs \${LIBOBJDIR}$ac_i\$U.$ac_objext" + ac_ltlibobjs="$ac_ltlibobjs \${LIBOBJDIR}$ac_i"'$U.lo' +done +LIBOBJS=$ac_libobjs + +LTLIBOBJS=$ac_ltlibobjs + + + +: ${CONFIG_STATUS=./config.status} +ac_clean_files_save=$ac_clean_files +ac_clean_files="$ac_clean_files $CONFIG_STATUS" +{ echo "$as_me:$LINENO: creating $CONFIG_STATUS" >&5 +echo "$as_me: creating $CONFIG_STATUS" >&6;} +cat >$CONFIG_STATUS <<_ACEOF +#! $SHELL +# Generated by $as_me. +# Run this file to recreate the current configuration. +# Compiler output produced by configure, useful for debugging +# configure, is in config.log if it exists. + +debug=false +ac_cs_recheck=false +ac_cs_silent=false +SHELL=\${CONFIG_SHELL-$SHELL} +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF +## --------------------- ## +## M4sh Initialization. ## +## --------------------- ## + +# Be Bourne compatible +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac +fi +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh + + +# PATH needs CR +# Avoid depending upon Character Ranges. +as_cr_letters='abcdefghijklmnopqrstuvwxyz' +as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +as_cr_Letters=$as_cr_letters$as_cr_LETTERS +as_cr_digits='0123456789' +as_cr_alnum=$as_cr_Letters$as_cr_digits + +# The user is always right. +if test "${PATH_SEPARATOR+set}" != set; then + echo "#! /bin/sh" >conf$$.sh + echo "exit 0" >>conf$$.sh + chmod +x conf$$.sh + if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then + PATH_SEPARATOR=';' + else + PATH_SEPARATOR=: + fi + rm -f conf$$.sh +fi + +# Support unset when possible. +if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then + as_unset=unset +else + as_unset=false +fi + + +# IFS +# We need space, tab and new line, in precisely that order. Quoting is +# there to prevent editors from complaining about space-tab. +# (If _AS_PATH_WALK were called with IFS unset, it would disable word +# splitting by setting IFS to empty value.) +as_nl=' +' +IFS=" "" $as_nl" + +# Find who we are. Look in the path if we contain no directory separator. +case $0 in + *[\\/]* ) as_myself=$0 ;; + *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break +done +IFS=$as_save_IFS + + ;; +esac +# We did not find ourselves, most probably we were run as `sh COMMAND' +# in which case we are not to be found in the path. +if test "x$as_myself" = x; then + as_myself=$0 +fi +if test ! -f "$as_myself"; then + echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2 + { (exit 1); exit 1; } +fi + +# Work around bugs in pre-3.0 UWIN ksh. +for as_var in ENV MAIL MAILPATH +do ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var +done +PS1='$ ' +PS2='> ' +PS4='+ ' + +# NLS nuisances. +for as_var in \ + LANG LANGUAGE LC_ADDRESS LC_ALL LC_COLLATE LC_CTYPE LC_IDENTIFICATION \ + LC_MEASUREMENT LC_MESSAGES LC_MONETARY LC_NAME LC_NUMERIC LC_PAPER \ + LC_TELEPHONE LC_TIME +do + if (set +x; test -z "`(eval $as_var=C; export $as_var) 2>&1`"); then + eval $as_var=C; export $as_var + else + ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var + fi +done + +# Required to use basename. +if expr a : '\(a\)' >/dev/null 2>&1 && + test "X`expr 00001 : '.*\(...\)'`" = X001; then + as_expr=expr +else + as_expr=false +fi + +if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then + as_basename=basename +else + as_basename=false +fi + + +# Name of the executable. +as_me=`$as_basename -- "$0" || +$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \ + X"$0" : 'X\(//\)$' \| \ + X"$0" : 'X\(/\)' \| . 2>/dev/null || +echo X/"$0" | + sed '/^.*\/\([^/][^/]*\)\/*$/{ + s//\1/ + q + } + /^X\/\(\/\/\)$/{ + s//\1/ + q + } + /^X\/\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + +# CDPATH. +$as_unset CDPATH + + + + as_lineno_1=$LINENO + as_lineno_2=$LINENO + test "x$as_lineno_1" != "x$as_lineno_2" && + test "x`expr $as_lineno_1 + 1`" = "x$as_lineno_2" || { + + # Create $as_me.lineno as a copy of $as_myself, but with $LINENO + # uniformly replaced by the line number. The first 'sed' inserts a + # line-number line after each line using $LINENO; the second 'sed' + # does the real work. The second script uses 'N' to pair each + # line-number line with the line containing $LINENO, and appends + # trailing '-' during substitution so that $LINENO is not a special + # case at line end. + # (Raja R Harinath suggested sed '=', and Paul Eggert wrote the + # scripts with optimization help from Paolo Bonzini. Blame Lee + # E. McMahon (1931-1989) for sed's syntax. :-) + sed -n ' + p + /[$]LINENO/= + ' <$as_myself | + sed ' + s/[$]LINENO.*/&-/ + t lineno + b + :lineno + N + :loop + s/[$]LINENO\([^'$as_cr_alnum'_].*\n\)\(.*\)/\2\1\2/ + t loop + s/-\n.*// + ' >$as_me.lineno && + chmod +x "$as_me.lineno" || + { echo "$as_me: error: cannot create $as_me.lineno; rerun with a POSIX shell" >&2 + { (exit 1); exit 1; }; } + + # Don't try to exec as it changes $[0], causing all sort of problems + # (the dirname of $[0] is not the place where we might find the + # original and so on. Autoconf is especially sensitive to this). + . "./$as_me.lineno" + # Exit status is that of the last command. + exit +} + + +if (as_dir=`dirname -- /` && test "X$as_dir" = X/) >/dev/null 2>&1; then + as_dirname=dirname +else + as_dirname=false +fi + +ECHO_C= ECHO_N= ECHO_T= +case `echo -n x` in +-n*) + case `echo 'x\c'` in + *c*) ECHO_T=' ';; # ECHO_T is single tab character. + *) ECHO_C='\c';; + esac;; +*) + ECHO_N='-n';; +esac + +if expr a : '\(a\)' >/dev/null 2>&1 && + test "X`expr 00001 : '.*\(...\)'`" = X001; then + as_expr=expr +else + as_expr=false +fi + +rm -f conf$$ conf$$.exe conf$$.file +if test -d conf$$.dir; then + rm -f conf$$.dir/conf$$.file +else + rm -f conf$$.dir + mkdir conf$$.dir +fi +echo >conf$$.file +if ln -s conf$$.file conf$$ 2>/dev/null; then + as_ln_s='ln -s' + # ... but there are two gotchas: + # 1) On MSYS, both `ln -s file dir' and `ln file dir' fail. + # 2) DJGPP < 2.04 has no symlinks; `ln -s' creates a wrapper executable. + # In both cases, we have to default to `cp -p'. + ln -s conf$$.file conf$$.dir 2>/dev/null && test ! -f conf$$.exe || + as_ln_s='cp -p' +elif ln conf$$.file conf$$ 2>/dev/null; then + as_ln_s=ln +else + as_ln_s='cp -p' +fi +rm -f conf$$ conf$$.exe conf$$.dir/conf$$.file conf$$.file +rmdir conf$$.dir 2>/dev/null + +if mkdir -p . 2>/dev/null; then + as_mkdir_p=: +else + test -d ./-p && rmdir ./-p + as_mkdir_p=false +fi + +# Find out whether ``test -x'' works. Don't use a zero-byte file, as +# systems may use methods other than mode bits to determine executability. +cat >conf$$.file <<_ASEOF +#! /bin/sh +exit 0 +_ASEOF +chmod +x conf$$.file +if test -x conf$$.file >/dev/null 2>&1; then + as_executable_p="test -x" +else + as_executable_p=: +fi +rm -f conf$$.file + +# Sed expression to map a string onto a valid CPP name. +as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'" + +# Sed expression to map a string onto a valid variable name. +as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'" + + +exec 6>&1 + +# Save the log message, to keep $[0] and so on meaningful, and to +# report actual input values of CONFIG_FILES etc. instead of their +# values after options handling. +ac_log=" +This file was extended by $as_me, which was +generated by GNU Autoconf 2.60. Invocation command line was + + CONFIG_FILES = $CONFIG_FILES + CONFIG_HEADERS = $CONFIG_HEADERS + CONFIG_LINKS = $CONFIG_LINKS + CONFIG_COMMANDS = $CONFIG_COMMANDS + $ $0 $@ + +on `(hostname || uname -n) 2>/dev/null | sed 1q` +" + +_ACEOF + +cat >>$CONFIG_STATUS <<_ACEOF +# Files that config.status was made for. +config_files="$ac_config_files" + +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF +ac_cs_usage="\ +\`$as_me' instantiates files from templates according to the +current configuration. + +Usage: $0 [OPTIONS] [FILE]... + + -h, --help print this help, then exit + -V, --version print version number, then exit + -q, --quiet do not print progress messages + -d, --debug don't remove temporary files + --recheck update $as_me by reconfiguring in the same conditions + --file=FILE[:TEMPLATE] + instantiate the configuration file FILE + +Configuration files: +$config_files + +Report bugs to ." + +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF +ac_cs_version="\\ +config.status +configured by $0, generated by GNU Autoconf 2.60, + with options \\"`echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" + +Copyright (C) 2006 Free Software Foundation, Inc. +This config.status script is free software; the Free Software Foundation +gives unlimited permission to copy, distribute and modify it." + +ac_pwd='$ac_pwd' +srcdir='$srcdir' +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF +# If no file are specified by the user, then we need to provide default +# value. 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Set only those that are not. +# We use the long form for the default assignment because of an extremely +# bizarre bug on SunOS 4.1.3. +if $ac_need_defaults; then + test "${CONFIG_FILES+set}" = set || CONFIG_FILES=$config_files +fi + +# Have a temporary directory for convenience. Make it in the build tree +# simply because there is no reason against having it here, and in addition, +# creating and moving files from /tmp can sometimes cause problems. +# Hook for its removal unless debugging. +# Note that there is a small window in which the directory will not be cleaned: +# after its creation but before its name has been assigned to `$tmp'. +$debug || +{ + tmp= + trap 'exit_status=$? + { test -z "$tmp" || test ! -d "$tmp" || rm -fr "$tmp"; } && exit $exit_status +' 0 + trap '{ (exit 1); exit 1; }' 1 2 13 15 +} +# Create a (secure) tmp directory for tmp files. + +{ + tmp=`(umask 077 && mktemp -d "./confXXXXXX") 2>/dev/null` && + test -n "$tmp" && test -d "$tmp" +} || +{ + tmp=./conf$$-$RANDOM + (umask 077 && mkdir "$tmp") +} || +{ + echo "$me: cannot create a temporary directory in ." >&2 + { (exit 1); exit 1; } +} + +# +# Set up the sed scripts for CONFIG_FILES section. +# + +# No need to generate the scripts if there are no CONFIG_FILES. +# This happens for instance when ./config.status config.h +if test -n "$CONFIG_FILES"; then + +_ACEOF + + + +ac_delim='%!_!# ' +for ac_last_try in false false false false false :; do + cat >conf$$subs.sed <<_ACEOF +SHELL!$SHELL$ac_delim +PATH_SEPARATOR!$PATH_SEPARATOR$ac_delim +PACKAGE_NAME!$PACKAGE_NAME$ac_delim +PACKAGE_TARNAME!$PACKAGE_TARNAME$ac_delim +PACKAGE_VERSION!$PACKAGE_VERSION$ac_delim +PACKAGE_STRING!$PACKAGE_STRING$ac_delim +PACKAGE_BUGREPORT!$PACKAGE_BUGREPORT$ac_delim +exec_prefix!$exec_prefix$ac_delim +prefix!$prefix$ac_delim +program_transform_name!$program_transform_name$ac_delim +bindir!$bindir$ac_delim +sbindir!$sbindir$ac_delim +libexecdir!$libexecdir$ac_delim +datarootdir!$datarootdir$ac_delim +datadir!$datadir$ac_delim +sysconfdir!$sysconfdir$ac_delim +sharedstatedir!$sharedstatedir$ac_delim +localstatedir!$localstatedir$ac_delim +includedir!$includedir$ac_delim +oldincludedir!$oldincludedir$ac_delim +docdir!$docdir$ac_delim +infodir!$infodir$ac_delim +htmldir!$htmldir$ac_delim +dvidir!$dvidir$ac_delim +pdfdir!$pdfdir$ac_delim +psdir!$psdir$ac_delim +libdir!$libdir$ac_delim +localedir!$localedir$ac_delim +mandir!$mandir$ac_delim +DEFS!$DEFS$ac_delim +ECHO_C!$ECHO_C$ac_delim +ECHO_N!$ECHO_N$ac_delim +ECHO_T!$ECHO_T$ac_delim +LIBS!$LIBS$ac_delim +build_alias!$build_alias$ac_delim +host_alias!$host_alias$ac_delim +target_alias!$target_alias$ac_delim +GPASM!$GPASM$ac_delim +GPLINK!$GPLINK$ac_delim +GPLIB!$GPLIB$ac_delim +RM!$RM$ac_delim +CP!$CP$ac_delim +MV!$MV$ac_delim +LS!$LS$ac_delim +SED!$SED$ac_delim +GREP!$GREP$ac_delim +EGREP!$EGREP$ac_delim +MKDIR!$MKDIR$ac_delim +RMDIR!$RMDIR$ac_delim +SET_MAKE!$SET_MAKE$ac_delim +LIBOBJS!$LIBOBJS$ac_delim +LTLIBOBJS!$LTLIBOBJS$ac_delim +_ACEOF + + if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 52; then + break + elif $ac_last_try; then + { { echo "$as_me:$LINENO: error: could not make $CONFIG_STATUS" >&5 +echo "$as_me: error: could not make $CONFIG_STATUS" >&2;} + { (exit 1); exit 1; }; } + else + ac_delim="$ac_delim!$ac_delim _$ac_delim!! " + fi +done + +ac_eof=`sed -n '/^CEOF[0-9]*$/s/CEOF/0/p' conf$$subs.sed` +if test -n "$ac_eof"; then + ac_eof=`echo "$ac_eof" | sort -nru | sed 1q` + ac_eof=`expr $ac_eof + 1` +fi + +cat >>$CONFIG_STATUS <<_ACEOF +cat >"\$tmp/subs-1.sed" <<\CEOF$ac_eof +/@[a-zA-Z_][a-zA-Z_0-9]*@/!b end +_ACEOF +sed ' +s/[,\\&]/\\&/g; s/@/@|#_!!_#|/g +s/^/s,@/; s/!/@,|#_!!_#|/ +:n +t n +s/'"$ac_delim"'$/,g/; t +s/$/\\/; p +N; s/^.*\n//; s/[,\\&]/\\&/g; s/@/@|#_!!_#|/g; b n +' >>$CONFIG_STATUS >$CONFIG_STATUS <<_ACEOF +:end +s/|#_!!_#|//g +CEOF$ac_eof +_ACEOF + + +# VPATH may cause trouble with some makes, so we remove $(srcdir), +# ${srcdir} and @srcdir@ from VPATH if srcdir is ".", strip leading and +# trailing colons and then remove the whole line if VPATH becomes empty +# (actually we leave an empty line to preserve line numbers). +if test "x$srcdir" = x.; then + ac_vpsub='/^[ ]*VPATH[ ]*=/{ +s/:*\$(srcdir):*/:/ +s/:*\${srcdir}:*/:/ +s/:*@srcdir@:*/:/ +s/^\([^=]*=[ ]*\):*/\1/ +s/:*$// +s/^[^=]*=[ ]*$// +}' +fi + +cat >>$CONFIG_STATUS <<\_ACEOF +fi # test -n "$CONFIG_FILES" + + +for ac_tag in :F $CONFIG_FILES +do + case $ac_tag in + :[FHLC]) ac_mode=$ac_tag; continue;; + esac + case $ac_mode$ac_tag in + :[FHL]*:*);; + :L* | :C*:*) { { echo "$as_me:$LINENO: error: Invalid tag $ac_tag." >&5 +echo "$as_me: error: Invalid tag $ac_tag." >&2;} + { (exit 1); exit 1; }; };; + :[FH]-) ac_tag=-:-;; + :[FH]*) ac_tag=$ac_tag:$ac_tag.in;; + esac + ac_save_IFS=$IFS + IFS=: + set x $ac_tag + IFS=$ac_save_IFS + shift + ac_file=$1 + shift + + case $ac_mode in + :L) ac_source=$1;; + :[FH]) + ac_file_inputs= + for ac_f + do + case $ac_f in + -) ac_f="$tmp/stdin";; + *) # Look for the file first in the build tree, then in the source tree + # (if the path is not absolute). The absolute path cannot be DOS-style, + # because $ac_f cannot contain `:'. + test -f "$ac_f" || + case $ac_f in + [\\/$]*) false;; + *) test -f "$srcdir/$ac_f" && ac_f="$srcdir/$ac_f";; + esac || + { { echo "$as_me:$LINENO: error: cannot find input file: $ac_f" >&5 +echo "$as_me: error: cannot find input file: $ac_f" >&2;} + { (exit 1); exit 1; }; };; + esac + ac_file_inputs="$ac_file_inputs $ac_f" + done + + # Let's still pretend it is `configure' which instantiates (i.e., don't + # use $as_me), people would be surprised to read: + # /* config.h. Generated by config.status. */ + configure_input="Generated from "`IFS=: + echo $* | sed 's|^[^:]*/||;s|:[^:]*/|, |g'`" by configure." + if test x"$ac_file" != x-; then + configure_input="$ac_file. $configure_input" + { echo "$as_me:$LINENO: creating $ac_file" >&5 +echo "$as_me: creating $ac_file" >&6;} + fi + + case $ac_tag in + *:-:* | *:-) cat >"$tmp/stdin";; + esac + ;; + esac + + ac_dir=`$as_dirname -- "$ac_file" || +$as_expr X"$ac_file" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ + X"$ac_file" : 'X\(//\)[^/]' \| \ + X"$ac_file" : 'X\(//\)$' \| \ + X"$ac_file" : 'X\(/\)' \| . 2>/dev/null || +echo X"$ac_file" | + sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ + s//\1/ + q + } + /^X\(\/\/\)[^/].*/{ + s//\1/ + q + } + /^X\(\/\/\)$/{ + s//\1/ + q + } + /^X\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + { as_dir="$ac_dir" + case $as_dir in #( + -*) as_dir=./$as_dir;; + esac + test -d "$as_dir" || { $as_mkdir_p && mkdir -p "$as_dir"; } || { + as_dirs= + while :; do + case $as_dir in #( + *\'*) as_qdir=`echo "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #( + *) as_qdir=$as_dir;; + esac + as_dirs="'$as_qdir' $as_dirs" + as_dir=`$as_dirname -- "$as_dir" || +$as_expr X"$as_dir" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ + X"$as_dir" : 'X\(//\)[^/]' \| \ + X"$as_dir" : 'X\(//\)$' \| \ + X"$as_dir" : 'X\(/\)' \| . 2>/dev/null || +echo X"$as_dir" | + sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ + s//\1/ + q + } + /^X\(\/\/\)[^/].*/{ + s//\1/ + q + } + /^X\(\/\/\)$/{ + s//\1/ + q + } + /^X\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + test -d "$as_dir" && break + done + test -z "$as_dirs" || eval "mkdir $as_dirs" + } || test -d "$as_dir" || { { echo "$as_me:$LINENO: error: cannot create directory $as_dir" >&5 +echo "$as_me: error: cannot create directory $as_dir" >&2;} + { (exit 1); exit 1; }; }; } + ac_builddir=. + +case "$ac_dir" in +.) ac_dir_suffix= ac_top_builddir_sub=. ac_top_build_prefix= ;; +*) + ac_dir_suffix=/`echo "$ac_dir" | sed 's,^\.[\\/],,'` + # A ".." for each directory in $ac_dir_suffix. + ac_top_builddir_sub=`echo "$ac_dir_suffix" | sed 's,/[^\\/]*,/..,g;s,/,,'` + case $ac_top_builddir_sub in + "") ac_top_builddir_sub=. ac_top_build_prefix= ;; + *) ac_top_build_prefix=$ac_top_builddir_sub/ ;; + esac ;; +esac +ac_abs_top_builddir=$ac_pwd +ac_abs_builddir=$ac_pwd$ac_dir_suffix +# for backward compatibility: +ac_top_builddir=$ac_top_build_prefix + +case $srcdir in + .) # We are building in place. + ac_srcdir=. + ac_top_srcdir=$ac_top_builddir_sub + ac_abs_top_srcdir=$ac_pwd ;; + [\\/]* | ?:[\\/]* ) # Absolute name. + ac_srcdir=$srcdir$ac_dir_suffix; + ac_top_srcdir=$srcdir + ac_abs_top_srcdir=$srcdir ;; + *) # Relative name. + ac_srcdir=$ac_top_build_prefix$srcdir$ac_dir_suffix + ac_top_srcdir=$ac_top_build_prefix$srcdir + ac_abs_top_srcdir=$ac_pwd/$srcdir ;; +esac +ac_abs_srcdir=$ac_abs_top_srcdir$ac_dir_suffix + + + case $ac_mode in + :F) + # + # CONFIG_FILE + # + +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF +# If the template does not know about datarootdir, expand it. +# FIXME: This hack should be removed a few years after 2.60. +ac_datarootdir_hack=; ac_datarootdir_seen= + +case `sed -n '/datarootdir/ { + p + q +} +/@datadir@/p +/@docdir@/p +/@infodir@/p +/@localedir@/p +/@mandir@/p +' $ac_file_inputs` in +*datarootdir*) ac_datarootdir_seen=yes;; +*@datadir@*|*@docdir@*|*@infodir@*|*@localedir@*|*@mandir@*) + { echo "$as_me:$LINENO: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&5 +echo "$as_me: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&2;} +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF + ac_datarootdir_hack=' + s&@datadir@&$datadir&g + s&@docdir@&$docdir&g + s&@infodir@&$infodir&g + s&@localedir@&$localedir&g + s&@mandir@&$mandir&g + s&\\\${datarootdir}&$datarootdir&g' ;; +esac +_ACEOF + +# Neutralize VPATH when `$srcdir' = `.'. +# Shell code in configure.ac might set extrasub. +# FIXME: do we really want to maintain this feature? +cat >>$CONFIG_STATUS <<_ACEOF + sed "$ac_vpsub +$extrasub +_ACEOF +cat >>$CONFIG_STATUS <<\_ACEOF +:t +/@[a-zA-Z_][a-zA-Z_0-9]*@/!b +s&@configure_input@&$configure_input&;t t +s&@top_builddir@&$ac_top_builddir_sub&;t t +s&@srcdir@&$ac_srcdir&;t t +s&@abs_srcdir@&$ac_abs_srcdir&;t t +s&@top_srcdir@&$ac_top_srcdir&;t t +s&@abs_top_srcdir@&$ac_abs_top_srcdir&;t t +s&@builddir@&$ac_builddir&;t t +s&@abs_builddir@&$ac_abs_builddir&;t t +s&@abs_top_builddir@&$ac_abs_top_builddir&;t t +$ac_datarootdir_hack +" $ac_file_inputs | sed -f "$tmp/subs-1.sed" >$tmp/out + +test -z "$ac_datarootdir_hack$ac_datarootdir_seen" && + { ac_out=`sed -n '/\${datarootdir}/p' "$tmp/out"`; test -n "$ac_out"; } && + { ac_out=`sed -n '/^[ ]*datarootdir[ ]*:*=/p' "$tmp/out"`; test -z "$ac_out"; } && + { echo "$as_me:$LINENO: WARNING: $ac_file contains a reference to the variable \`datarootdir' +which seems to be undefined. Please make sure it is defined." >&5 +echo "$as_me: WARNING: $ac_file contains a reference to the variable \`datarootdir' +which seems to be undefined. Please make sure it is defined." >&2;} + + rm -f "$tmp/stdin" + case $ac_file in + -) cat "$tmp/out"; rm -f "$tmp/out";; + *) rm -f "$ac_file"; mv "$tmp/out" $ac_file;; + esac + ;; + + + + esac + +done # for ac_tag + + +{ (exit 0); exit 0; } +_ACEOF +chmod +x $CONFIG_STATUS +ac_clean_files=$ac_clean_files_save + + +# configure is writing to config.log, and then calls config.status. +# config.status does its own redirection, appending to config.log. +# Unfortunately, on DOS this fails, as config.log is still kept open +# by configure, so config.status won't be able to write to it; its +# output is simply discarded. So we exec the FD to /dev/null, +# effectively closing config.log, so it can be properly (re)opened and +# appended to by config.status. When coming back to configure, we +# need to make the FD available again. +if test "$no_create" != yes; then + ac_cs_success=: + ac_config_status_args= + test "$silent" = yes && + ac_config_status_args="$ac_config_status_args --quiet" + exec 5>/dev/null + $SHELL $CONFIG_STATUS $ac_config_status_args || ac_cs_success=false + exec 5>>config.log + # Use ||, not &&, to avoid exiting from the if with $? = 1, which + # would make configure fail if this is the last instruction. + $ac_cs_success || { (exit 1); exit 1; } +fi + diff --git a/device/lib/pic/configure.in b/device/lib/pic/configure.in new file mode 100644 index 0000000..d02ed59 --- /dev/null +++ b/device/lib/pic/configure.in @@ -0,0 +1,52 @@ +# +# configure.in - input script to autoconf to +# configure directory +# +# This file is part of the GNU PIC Library. +# +# Originally written by +# Vangelis Rokas +# +# Adopted for the SDCC/pic14 library by +# Raphael Neider +# +# $Id: configure.in 4555 2007-01-03 21:19:58Z bernhardheld $ +# + +# Process this file with autoconf to produce a configure script. +AC_PREREQ(2.60) +AC_INIT + +AC_DEFUN(AC_CONFIG_SRCDIR) +#AC_DEFUN(AC_CONFIG_FILES) + +# Checks for programs. +AC_CHECK_PROG(GPASM, gpasm, gpasm, :) +AC_CHECK_PROG(GPLINK, gplink, gplink, :) +AC_CHECK_PROG(GPLIB, gplib, gplib, :) + +AC_CHECK_PROG(RM, rm, [rm -f], :) +AC_CHECK_PROG(CP, cp, cp, :) +AC_CHECK_PROG(MV, mv, mv, :) +AC_CHECK_PROG(LS, ls, ls, :) +AC_CHECK_PROG(SED, sed, sed, :) +AC_PROG_EGREP +AC_CHECK_PROG(MKDIR, mkdir, [mkdir -p], :) +AC_CHECK_PROG(RMDIR, rmdir, rmdir, :) + +AC_PROG_MAKE_SET + +# Checks for libraries. + +# Checks for header files. + +# Checks for typedefs, structures, and compiler characteristics. + +# Checks for library functions. + +AC_CONFIG_FILES([Makefile + Makefile.common + libdev/Makefile + libsdcc/Makefile + libm/Makefile]) +AC_OUTPUT diff --git a/device/lib/pic/libdev/Makefile.in b/device/lib/pic/libdev/Makefile.in new file mode 100644 index 0000000..dfb2d27 --- /dev/null +++ b/device/lib/pic/libdev/Makefile.in @@ -0,0 +1,50 @@ +SDCC_BASE = ../../../.. +INSTALL_DIR = ../bin + +VPATH = @srcdir@ +srcdir = @srcdir@ + +CC = $(SDCC_BASE)/bin/sdcc +LIB = @GPLIB@ +CP = @CP@ +RM = @RM@ +RMDIR = @RMDIR@ + +CPPFLAGS = -I$(srcdir)/../../../include/pic + +C_SRC = $(notdir $(wildcard $(srcdir)/pic1*.c)) +OBJS = $(C_SRC:.c=.o) +LIBS = $(addprefix $(INSTALL_DIR)/,$(OBJS:.o=.lib)) + +all : $(LIBS) + +ifeq (0,1) +# useful while fixing .inc files +GPUTILS = /opt/modules/gputils-0.13.3/share/gputils +pic%.c : $(GPUTILS)/header/p%.inc + -$(SDCC_BASE)/support/scripts/inc2h.pl $* $(GPUTILS); + -mv pic$*.h $(SDCC_BASE)/device/include/pic/pic$*.h; +endif + +pic%.o : pic%.c +ifndef SILENT + @echo "[ CC ] ==> $(patsubst $(top_builddir)/%,%,$@)" +endif + @-$(CC) -mpic14 -p$* $(CPPFLAGS) $(CFLAGS) -o "$@" -c "$<" + +$(INSTALL_DIR)/%.lib : %.o + @-$(LIB) -c "$@" "$<"; + +install : all + +clean : clean-intermediate + @-$(RM) *.asm + @-$(RM) $(OBJS) $(LIBS) + @-$(RMDIR) ../build/libdev + +distclean: clean + @-$(RM) Makefile + +clean-intermediate : + @-$(RM) *.lst *.d *.adb + diff --git a/device/lib/pic/libdev/devices.txt b/device/lib/pic/libdev/devices.txt new file mode 100644 index 0000000..68894d5 --- /dev/null +++ b/device/lib/pic/libdev/devices.txt @@ -0,0 +1,84 @@ +12f629 +12f635 +12f675 +12f683 +16c432 +16c433 +16c554 +16c557 +16c558 +16c62 +16c620 +16c620a +16c621 +16c621a +16c622 +16c622a +16c63a +16c65b +16c71 +16c710 +16c711 +16c715 +16c717 +16c72 +16c73b +16c745 +16c74b +16c765 +16c770 +16c771 +16c773 +16c774 +16c781 +16c782 +16c925 +16c926 +16f627 +16f627a +16f628 +16f628a +16f630 +16f636 +16f639 +16f648a +16f676 +16f684 +16f685 +16f687 +16f688 +16f689 +16f690 +16f716 +16f72 +16f73 +16f737 +16f74 +16f76 +16f767 +16f77 +16f777 +16f785 +16f818 +16f819 +16f84 +16f84a +16f87 +16f870 +16f871 +16f872 +16f873 +16f873a +16f874 +16f874a +16f876 +16f876a +16f877 +16f877a +16f886 +16f887 +16f88 +16f913 +16f914 +16f916 +16f917 diff --git a/device/lib/pic/libdev/mkall.sh b/device/lib/pic/libdev/mkall.sh new file mode 100755 index 0000000..fff2cad --- /dev/null +++ b/device/lib/pic/libdev/mkall.sh @@ -0,0 +1,27 @@ +#!/bin/sh + +# This script is supposed to recreate all device libraries and their +# accompanying header files from the gputils' header/*.inc files +# using sdcc/support/scripts/inc2h.pl. +# +# The devices to be created are listed in ./devices.txt, the output +# files will be located in ./build/, which is created before use. +# +# (c) 2007 by Raphael Neider +# This file is published under the terms of the GPLv2. + +GPUTILS=$HOME/svn/gputils +SDCC=$HOME/svn/sdcc + +mkdir build; +cd build; +cp $SDCC/device/lib/pic/libdev/pic14ports.txt . + +cat $SDCC/device/lib/pic/libdev/devices.txt | while read PROC; do + echo $PROC; + $SDCC/support/scripts/inc2h.pl $PROC $GPUTILS; +done + +cd ..; +mv build/*.c . +mv build/*.h $SDCC/device/include/pic/ diff --git a/device/lib/pic/libdev/pic12f629.c b/device/lib/pic/libdev/pic12f629.c new file mode 100644 index 0000000..d2bd067 --- /dev/null +++ b/device/lib/pic/libdev/pic12f629.c @@ -0,0 +1,5 @@ +/* + * Register definitions for pic12f629. + */ +#include "pic12f675.c" + diff --git a/device/lib/pic/libdev/pic12f635.c b/device/lib/pic/libdev/pic12f635.c new file mode 100644 index 0000000..82b1f32 --- /dev/null +++ b/device/lib/pic/libdev/pic12f635.c @@ -0,0 +1,71 @@ +/* Register definitions for pic12f635. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (GPIO_ADDR) GPIO; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (CMCON0_ADDR) CMCON0; +__sfr __at (CMCON1_ADDR) CMCON1; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISIO_ADDR) TRISIO; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (WPUDA_ADDR) WPUDA; +__sfr __at (IOCA_ADDR) IOCA; +__sfr __at (WDA_ADDR) WDA; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (EEDAT_ADDR) EEDAT; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (CRCON_ADDR) CRCON; +__sfr __at (CRDAT0_ADDR) CRDAT0; +__sfr __at (CRDAT1_ADDR) CRDAT1; +__sfr __at (CRDAT2_ADDR) CRDAT2; +__sfr __at (CRDAT3_ADDR) CRDAT3; + +// +// bitfield definitions +// +volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; +volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; +volatile __CRCON_bits_t __at(CRCON_ADDR) CRCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __GPIO_bits_t __at(GPIO_ADDR) GPIO_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDA_bits_t __at(WDA_ADDR) WDA_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; +volatile __WPUDA_bits_t __at(WPUDA_ADDR) WPUDA_bits; + diff --git a/device/lib/pic/libdev/pic12f675.c b/device/lib/pic/libdev/pic12f675.c new file mode 100644 index 0000000..5a14150 --- /dev/null +++ b/device/lib/pic/libdev/pic12f675.c @@ -0,0 +1,60 @@ +/* Register definitions for pic12f675. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (GPIO_ADDR) GPIO; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISIO_ADDR) TRISIO; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCAL_ADDR) OSCCAL; +__sfr __at (WPU_ADDR) WPU; +__sfr __at (IOC_ADDR) IOC; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEDAT_ADDR) EEDAT; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ANSEL_ADDR) ANSEL; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __GPIO_bits_t __at(GPIO_ADDR) GPIO_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; +volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCAL_bits_t __at(OSCCAL_ADDR) OSCCAL_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __TRISIO_bits_t __at(TRISIO_ADDR) TRISIO_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + diff --git a/device/lib/pic/libdev/pic12f683.c b/device/lib/pic/libdev/pic12f683.c new file mode 100644 index 0000000..a62112d --- /dev/null +++ b/device/lib/pic/libdev/pic12f683.c @@ -0,0 +1,74 @@ +/* Register definitions for pic12f683. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (GPIO_ADDR) GPIO; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (CMCON0_ADDR) CMCON0; +__sfr __at (CMCON1_ADDR) CMCON1; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISIO_ADDR) TRISIO; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (WPU_ADDR) WPU; +__sfr __at (WPUA_ADDR) WPUA; +__sfr __at (IOC_ADDR) IOC; +__sfr __at (IOCA_ADDR) IOCA; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEDAT_ADDR) EEDAT; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ANSEL_ADDR) ANSEL; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; +volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __GPIO_bits_t __at(GPIO_ADDR) GPIO_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; +volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + diff --git a/device/lib/pic/libdev/pic14ports.txt b/device/lib/pic/libdev/pic14ports.txt new file mode 100644 index 0000000..a906f6a --- /dev/null +++ b/device/lib/pic/libdev/pic14ports.txt @@ -0,0 +1,10 @@ +# Add PORT* and TRIS* bit entries if they're not in the header. +# Note, the PORTx SFR address must be in the header for the bits to be generated + +# defaults for parts not listed + * A0-5,B0-7,C0-7,D0-7,E0-2 + +# specific parts + 16f84 A0-4,B0-7 + 16f84a A0-4,B0-7 + diff --git a/device/lib/pic/libdev/pic16c432.c b/device/lib/pic/libdev/pic16c432.c new file mode 100644 index 0000000..4d569cd --- /dev/null +++ b/device/lib/pic/libdev/pic16c432.c @@ -0,0 +1,42 @@ +/* Register definitions for pic16c432. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (LINPRT_ADDR) LINPRT; +__sfr __at (VRCON_ADDR) VRCON; + +// +// bitfield definitions +// +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __LINPRT_bits_t __at(LINPRT_ADDR) LINPRT_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + diff --git a/device/lib/pic/libdev/pic16c433.c b/device/lib/pic/libdev/pic16c433.c new file mode 100644 index 0000000..41c25a8 --- /dev/null +++ b/device/lib/pic/libdev/pic16c433.c @@ -0,0 +1,38 @@ +/* Register definitions for pic16c433. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (GPIO_ADDR) GPIO; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISIO_ADDR) TRISIO; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCAL_ADDR) OSCCAL; +__sfr __at (ADCON1_ADDR) ADCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCAL_bits_t __at(OSCCAL_ADDR) OSCCAL_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; + diff --git a/device/lib/pic/libdev/pic16c554.c b/device/lib/pic/libdev/pic16c554.c new file mode 100644 index 0000000..793bc6c --- /dev/null +++ b/device/lib/pic/libdev/pic16c554.c @@ -0,0 +1,33 @@ +/* Register definitions for pic16c554. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PCON_ADDR) PCON; + +// +// bitfield definitions +// +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + diff --git a/device/lib/pic/libdev/pic16c557.c b/device/lib/pic/libdev/pic16c557.c new file mode 100644 index 0000000..d68bf3b --- /dev/null +++ b/device/lib/pic/libdev/pic16c557.c @@ -0,0 +1,37 @@ +/* Register definitions for pic16c557. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PCON_ADDR) PCON; + +// +// bitfield definitions +// +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + diff --git a/device/lib/pic/libdev/pic16c558.c b/device/lib/pic/libdev/pic16c558.c new file mode 100644 index 0000000..0297aa0 --- /dev/null +++ b/device/lib/pic/libdev/pic16c558.c @@ -0,0 +1,33 @@ +/* Register definitions for pic16c558. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PCON_ADDR) PCON; + +// +// bitfield definitions +// +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + diff --git a/device/lib/pic/libdev/pic16c62.c b/device/lib/pic/libdev/pic16c62.c new file mode 100644 index 0000000..0347eb6 --- /dev/null +++ b/device/lib/pic/libdev/pic16c62.c @@ -0,0 +1,59 @@ +/* Register definitions for pic16c62. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; + +// +// bitfield definitions +// +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + diff --git a/device/lib/pic/libdev/pic16c620.c b/device/lib/pic/libdev/pic16c620.c new file mode 100644 index 0000000..4b5bd8c --- /dev/null +++ b/device/lib/pic/libdev/pic16c620.c @@ -0,0 +1,41 @@ +/* Register definitions for pic16c620. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (VRCON_ADDR) VRCON; + +// +// bitfield definitions +// +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + diff --git a/device/lib/pic/libdev/pic16c620a.c b/device/lib/pic/libdev/pic16c620a.c new file mode 100644 index 0000000..e4928b7 --- /dev/null +++ b/device/lib/pic/libdev/pic16c620a.c @@ -0,0 +1,41 @@ +/* Register definitions for pic16c620a. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (VRCON_ADDR) VRCON; + +// +// bitfield definitions +// +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + diff --git a/device/lib/pic/libdev/pic16c621.c b/device/lib/pic/libdev/pic16c621.c new file mode 100644 index 0000000..f9001f8 --- /dev/null +++ b/device/lib/pic/libdev/pic16c621.c @@ -0,0 +1,41 @@ +/* Register definitions for pic16c621. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (VRCON_ADDR) VRCON; + +// +// bitfield definitions +// +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + diff --git a/device/lib/pic/libdev/pic16c621a.c b/device/lib/pic/libdev/pic16c621a.c new file mode 100644 index 0000000..786c439 --- /dev/null +++ b/device/lib/pic/libdev/pic16c621a.c @@ -0,0 +1,41 @@ +/* Register definitions for pic16c621a. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (VRCON_ADDR) VRCON; + +// +// bitfield definitions +// +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + diff --git a/device/lib/pic/libdev/pic16c622.c b/device/lib/pic/libdev/pic16c622.c new file mode 100644 index 0000000..74b65fe --- /dev/null +++ b/device/lib/pic/libdev/pic16c622.c @@ -0,0 +1,41 @@ +/* Register definitions for pic16c622. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (VRCON_ADDR) VRCON; + +// +// bitfield definitions +// +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + diff --git a/device/lib/pic/libdev/pic16c622a.c b/device/lib/pic/libdev/pic16c622a.c new file mode 100644 index 0000000..e67f576 --- /dev/null +++ b/device/lib/pic/libdev/pic16c622a.c @@ -0,0 +1,41 @@ +/* Register definitions for pic16c622a. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (VRCON_ADDR) VRCON; + +// +// bitfield definitions +// +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + diff --git a/device/lib/pic/libdev/pic16c63a.c b/device/lib/pic/libdev/pic16c63a.c new file mode 100644 index 0000000..9bd52d7 --- /dev/null +++ b/device/lib/pic/libdev/pic16c63a.c @@ -0,0 +1,74 @@ +/* Register definitions for pic16c63a. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; + +// +// bitfield definitions +// +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16c65b.c b/device/lib/pic/libdev/pic16c65b.c new file mode 100644 index 0000000..0423ea4 --- /dev/null +++ b/device/lib/pic/libdev/pic16c65b.c @@ -0,0 +1,82 @@ +/* Register definitions for pic16c65b. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; + +// +// bitfield definitions +// +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16c71.c b/device/lib/pic/libdev/pic16c71.c new file mode 100644 index 0000000..7997fcf --- /dev/null +++ b/device/lib/pic/libdev/pic16c71.c @@ -0,0 +1,36 @@ +/* Register definitions for pic16c71. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (ADCON1_ADDR) ADCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + diff --git a/device/lib/pic/libdev/pic16c710.c b/device/lib/pic/libdev/pic16c710.c new file mode 100644 index 0000000..438bb3a --- /dev/null +++ b/device/lib/pic/libdev/pic16c710.c @@ -0,0 +1,38 @@ +/* Register definitions for pic16c710. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (ADCON1_ADDR) ADCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + diff --git a/device/lib/pic/libdev/pic16c711.c b/device/lib/pic/libdev/pic16c711.c new file mode 100644 index 0000000..9bee096 --- /dev/null +++ b/device/lib/pic/libdev/pic16c711.c @@ -0,0 +1,38 @@ +/* Register definitions for pic16c711. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (ADCON1_ADDR) ADCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + diff --git a/device/lib/pic/libdev/pic16c715.c b/device/lib/pic/libdev/pic16c715.c new file mode 100644 index 0000000..62eb299 --- /dev/null +++ b/device/lib/pic/libdev/pic16c715.c @@ -0,0 +1,42 @@ +/* Register definitions for pic16c715. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (ADCON1_ADDR) ADCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + diff --git a/device/lib/pic/libdev/pic16c717.c b/device/lib/pic/libdev/pic16c717.c new file mode 100644 index 0000000..5dd7bf2 --- /dev/null +++ b/device/lib/pic/libdev/pic16c717.c @@ -0,0 +1,81 @@ +/* Register definitions for pic16c717. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (P1DEL_ADDR) P1DEL; +__sfr __at (REFCON_ADDR) REFCON; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (PMDATL_ADDR) PMDATL; +__sfr __at (PMADRL_ADDR) PMADRL; +__sfr __at (PMDATH_ADDR) PMDATH; +__sfr __at (PMADRH_ADDR) PMADRH; +__sfr __at (PMCON1_ADDR) PMCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + diff --git a/device/lib/pic/libdev/pic16c72.c b/device/lib/pic/libdev/pic16c72.c new file mode 100644 index 0000000..181c06f --- /dev/null +++ b/device/lib/pic/libdev/pic16c72.c @@ -0,0 +1,64 @@ +/* Register definitions for pic16c72. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (ADCON1_ADDR) ADCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + diff --git a/device/lib/pic/libdev/pic16c73b.c b/device/lib/pic/libdev/pic16c73b.c new file mode 100644 index 0000000..cc59a63 --- /dev/null +++ b/device/lib/pic/libdev/pic16c73b.c @@ -0,0 +1,79 @@ +/* Register definitions for pic16c73b. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADCON1_ADDR) ADCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16c745.c b/device/lib/pic/libdev/pic16c745.c new file mode 100644 index 0000000..4df80b6 --- /dev/null +++ b/device/lib/pic/libdev/pic16c745.c @@ -0,0 +1,107 @@ +/* Register definitions for pic16c745. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (UIR_ADDR) UIR; +__sfr __at (UIE_ADDR) UIE; +__sfr __at (UEIR_ADDR) UEIR; +__sfr __at (UEIE_ADDR) UEIE; +__sfr __at (USTAT_ADDR) USTAT; +__sfr __at (UCTRL_ADDR) UCTRL; +__sfr __at (UADDR_ADDR) UADDR; +__sfr __at (USWSTAT_ADDR) USWSTAT; +__sfr __at (UEP0_ADDR) UEP0; +__sfr __at (UEP1_ADDR) UEP1; +__sfr __at (UEP2_ADDR) UEP2; +__sfr __at (BD0OST_ADDR) BD0OST; +__sfr __at (BD0OBC_ADDR) BD0OBC; +__sfr __at (BD0OAL_ADDR) BD0OAL; +__sfr __at (BD0IST_ADDR) BD0IST; +__sfr __at (BD0IBC_ADDR) BD0IBC; +__sfr __at (BD0IAL_ADDR) BD0IAL; +__sfr __at (BD1OST_ADDR) BD1OST; +__sfr __at (BD1OBC_ADDR) BD1OBC; +__sfr __at (BD1OAL_ADDR) BD1OAL; +__sfr __at (BD1IST_ADDR) BD1IST; +__sfr __at (BD1IBC_ADDR) BD1IBC; +__sfr __at (BD1IAL_ADDR) BD1IAL; +__sfr __at (BD2OST_ADDR) BD2OST; +__sfr __at (BD2OBC_ADDR) BD2OBC; +__sfr __at (BD2OAL_ADDR) BD2OAL; +__sfr __at (BD2IST_ADDR) BD2IST; +__sfr __at (BD2IBC_ADDR) BD2IBC; +__sfr __at (BD2IAL_ADDR) BD2IAL; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __UCTRL_bits_t __at(UCTRL_ADDR) UCTRL_bits; +volatile __UEIE_bits_t __at(UEIE_ADDR) UEIE_bits; +volatile __UEP0_bits_t __at(UEP0_ADDR) UEP0_bits; +volatile __UIE_bits_t __at(UIE_ADDR) UIE_bits; +volatile __USTAT_bits_t __at(USTAT_ADDR) USTAT_bits; + diff --git a/device/lib/pic/libdev/pic16c74b.c b/device/lib/pic/libdev/pic16c74b.c new file mode 100644 index 0000000..c3e5217 --- /dev/null +++ b/device/lib/pic/libdev/pic16c74b.c @@ -0,0 +1,87 @@ +/* Register definitions for pic16c74b. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADCON1_ADDR) ADCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16c765.c b/device/lib/pic/libdev/pic16c765.c new file mode 100644 index 0000000..9263df4 --- /dev/null +++ b/device/lib/pic/libdev/pic16c765.c @@ -0,0 +1,115 @@ +/* Register definitions for pic16c765. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (UIR_ADDR) UIR; +__sfr __at (UIE_ADDR) UIE; +__sfr __at (UEIR_ADDR) UEIR; +__sfr __at (UEIE_ADDR) UEIE; +__sfr __at (USTAT_ADDR) USTAT; +__sfr __at (UCTRL_ADDR) UCTRL; +__sfr __at (UADDR_ADDR) UADDR; +__sfr __at (USWSTAT_ADDR) USWSTAT; +__sfr __at (UEP0_ADDR) UEP0; +__sfr __at (UEP1_ADDR) UEP1; +__sfr __at (UEP2_ADDR) UEP2; +__sfr __at (BD0OST_ADDR) BD0OST; +__sfr __at (BD0OBC_ADDR) BD0OBC; +__sfr __at (BD0OAL_ADDR) BD0OAL; +__sfr __at (BD0IST_ADDR) BD0IST; +__sfr __at (BD0IBC_ADDR) BD0IBC; +__sfr __at (BD0IAL_ADDR) BD0IAL; +__sfr __at (BD1OST_ADDR) BD1OST; +__sfr __at (BD1OBC_ADDR) BD1OBC; +__sfr __at (BD1OAL_ADDR) BD1OAL; +__sfr __at (BD1IST_ADDR) BD1IST; +__sfr __at (BD1IBC_ADDR) BD1IBC; +__sfr __at (BD1IAL_ADDR) BD1IAL; +__sfr __at (BD2OST_ADDR) BD2OST; +__sfr __at (BD2OBC_ADDR) BD2OBC; +__sfr __at (BD2OAL_ADDR) BD2OAL; +__sfr __at (BD2IST_ADDR) BD2IST; +__sfr __at (BD2IBC_ADDR) BD2IBC; +__sfr __at (BD2IAL_ADDR) BD2IAL; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __UCTRL_bits_t __at(UCTRL_ADDR) UCTRL_bits; +volatile __UEIE_bits_t __at(UEIE_ADDR) UEIE_bits; +volatile __UEP0_bits_t __at(UEP0_ADDR) UEP0_bits; +volatile __UIE_bits_t __at(UIE_ADDR) UIE_bits; +volatile __USTAT_bits_t __at(USTAT_ADDR) USTAT_bits; + diff --git a/device/lib/pic/libdev/pic16c770.c b/device/lib/pic/libdev/pic16c770.c new file mode 100644 index 0000000..5dd5838 --- /dev/null +++ b/device/lib/pic/libdev/pic16c770.c @@ -0,0 +1,81 @@ +/* Register definitions for pic16c770. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (P1DEL_ADDR) P1DEL; +__sfr __at (REFCON_ADDR) REFCON; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (PMDATL_ADDR) PMDATL; +__sfr __at (PMADRL_ADDR) PMADRL; +__sfr __at (PMDATH_ADDR) PMDATH; +__sfr __at (PMADRH_ADDR) PMADRH; +__sfr __at (PMCON1_ADDR) PMCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + diff --git a/device/lib/pic/libdev/pic16c771.c b/device/lib/pic/libdev/pic16c771.c new file mode 100644 index 0000000..2b22c4c --- /dev/null +++ b/device/lib/pic/libdev/pic16c771.c @@ -0,0 +1,81 @@ +/* Register definitions for pic16c771. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (P1DEL_ADDR) P1DEL; +__sfr __at (REFCON_ADDR) REFCON; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (PMDATL_ADDR) PMDATL; +__sfr __at (PMADRL_ADDR) PMADRL; +__sfr __at (PMDATH_ADDR) PMDATH; +__sfr __at (PMADRH_ADDR) PMADRH; +__sfr __at (PMCON1_ADDR) PMCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + diff --git a/device/lib/pic/libdev/pic16c773.c b/device/lib/pic/libdev/pic16c773.c new file mode 100644 index 0000000..a749d03 --- /dev/null +++ b/device/lib/pic/libdev/pic16c773.c @@ -0,0 +1,86 @@ +/* Register definitions for pic16c773. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (REFCON_ADDR) REFCON; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16c774.c b/device/lib/pic/libdev/pic16c774.c new file mode 100644 index 0000000..52a9a24 --- /dev/null +++ b/device/lib/pic/libdev/pic16c774.c @@ -0,0 +1,94 @@ +/* Register definitions for pic16c774. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (REFCON_ADDR) REFCON; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16c781.c b/device/lib/pic/libdev/pic16c781.c new file mode 100644 index 0000000..6a3638d --- /dev/null +++ b/device/lib/pic/libdev/pic16c781.c @@ -0,0 +1,76 @@ +/* Register definitions for pic16c781. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (REFCON_ADDR) REFCON; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (PMDATL_ADDR) PMDATL; +__sfr __at (PMADRL_ADDR) PMADRL; +__sfr __at (PMDATH_ADDR) PMDATH; +__sfr __at (PMADRH_ADDR) PMADRH; +__sfr __at (CALCON_ADDR) CALCON; +__sfr __at (PSMCCON0_ADDR) PSMCCON0; +__sfr __at (PSMCCON1_ADDR) PSMCCON1; +__sfr __at (CM1CON0_ADDR) CM1CON0; +__sfr __at (CM2CON0_ADDR) CM2CON0; +__sfr __at (CM2CON1_ADDR) CM2CON1; +__sfr __at (OPACON_ADDR) OPACON; +__sfr __at (DAC_ADDR) DAC; +__sfr __at (DACON0_ADDR) DACON0; +__sfr __at (PMCON1_ADDR) PMCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CALCON_bits_t __at(CALCON_ADDR) CALCON_bits; +volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; +volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; +volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; +volatile __DACON0_bits_t __at(DACON0_ADDR) DACON0_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPACON_bits_t __at(OPACON_ADDR) OPACON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PSMCCON0_bits_t __at(PSMCCON0_ADDR) PSMCCON0_bits; +volatile __PSMCCON1_bits_t __at(PSMCCON1_ADDR) PSMCCON1_bits; +volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + diff --git a/device/lib/pic/libdev/pic16c782.c b/device/lib/pic/libdev/pic16c782.c new file mode 100644 index 0000000..32bbc26 --- /dev/null +++ b/device/lib/pic/libdev/pic16c782.c @@ -0,0 +1,76 @@ +/* Register definitions for pic16c782. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (REFCON_ADDR) REFCON; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (PMDATL_ADDR) PMDATL; +__sfr __at (PMADRL_ADDR) PMADRL; +__sfr __at (PMDATH_ADDR) PMDATH; +__sfr __at (PMADRH_ADDR) PMADRH; +__sfr __at (CALCON_ADDR) CALCON; +__sfr __at (PSMCCON0_ADDR) PSMCCON0; +__sfr __at (PSMCCON1_ADDR) PSMCCON1; +__sfr __at (CM1CON0_ADDR) CM1CON0; +__sfr __at (CM2CON0_ADDR) CM2CON0; +__sfr __at (CM2CON1_ADDR) CM2CON1; +__sfr __at (OPACON_ADDR) OPACON; +__sfr __at (DAC_ADDR) DAC; +__sfr __at (DACON0_ADDR) DACON0; +__sfr __at (PMCON1_ADDR) PMCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CALCON_bits_t __at(CALCON_ADDR) CALCON_bits; +volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; +volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; +volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; +volatile __DACON0_bits_t __at(DACON0_ADDR) DACON0_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPACON_bits_t __at(OPACON_ADDR) OPACON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PSMCCON0_bits_t __at(PSMCCON0_ADDR) PSMCCON0_bits; +volatile __PSMCCON1_bits_t __at(PSMCCON1_ADDR) PSMCCON1_bits; +volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + diff --git a/device/lib/pic/libdev/pic16c925.c b/device/lib/pic/libdev/pic16c925.c new file mode 100644 index 0000000..9fd2021 --- /dev/null +++ b/device/lib/pic/libdev/pic16c925.c @@ -0,0 +1,105 @@ +/* Register definitions for pic16c925. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (PORTF_ADDR) PORTF; +__sfr __at (PORTG_ADDR) PORTG; +__sfr __at (PMCON1_ADDR) PMCON1; +__sfr __at (LCDSE_ADDR) LCDSE; +__sfr __at (LCDPS_ADDR) LCDPS; +__sfr __at (LCDCON_ADDR) LCDCON; +__sfr __at (LCDD00_ADDR) LCDD00; +__sfr __at (LCDD01_ADDR) LCDD01; +__sfr __at (LCDD02_ADDR) LCDD02; +__sfr __at (LCDD03_ADDR) LCDD03; +__sfr __at (LCDD04_ADDR) LCDD04; +__sfr __at (LCDD05_ADDR) LCDD05; +__sfr __at (LCDD06_ADDR) LCDD06; +__sfr __at (LCDD07_ADDR) LCDD07; +__sfr __at (LCDD08_ADDR) LCDD08; +__sfr __at (LCDD09_ADDR) LCDD09; +__sfr __at (LCDD10_ADDR) LCDD10; +__sfr __at (LCDD11_ADDR) LCDD11; +__sfr __at (LCDD12_ADDR) LCDD12; +__sfr __at (LCDD13_ADDR) LCDD13; +__sfr __at (LCDD14_ADDR) LCDD14; +__sfr __at (LCDD15_ADDR) LCDD15; +__sfr __at (TRISF_ADDR) TRISF; +__sfr __at (TRISG_ADDR) TRISG; +__sfr __at (PMDATA_ADDR) PMDATA; +__sfr __at (PMDATH_ADDR) PMDATH; +__sfr __at (PMADR_ADDR) PMADR; +__sfr __at (PMADRH_ADDR) PMADRH; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits; +volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits; +volatile __LCDSE_bits_t __at(LCDSE_ADDR) LCDSE_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + diff --git a/device/lib/pic/libdev/pic16c926.c b/device/lib/pic/libdev/pic16c926.c new file mode 100644 index 0000000..6929422 --- /dev/null +++ b/device/lib/pic/libdev/pic16c926.c @@ -0,0 +1,105 @@ +/* Register definitions for pic16c926. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (PORTF_ADDR) PORTF; +__sfr __at (PORTG_ADDR) PORTG; +__sfr __at (PMCON1_ADDR) PMCON1; +__sfr __at (LCDSE_ADDR) LCDSE; +__sfr __at (LCDPS_ADDR) LCDPS; +__sfr __at (LCDCON_ADDR) LCDCON; +__sfr __at (LCDD00_ADDR) LCDD00; +__sfr __at (LCDD01_ADDR) LCDD01; +__sfr __at (LCDD02_ADDR) LCDD02; +__sfr __at (LCDD03_ADDR) LCDD03; +__sfr __at (LCDD04_ADDR) LCDD04; +__sfr __at (LCDD05_ADDR) LCDD05; +__sfr __at (LCDD06_ADDR) LCDD06; +__sfr __at (LCDD07_ADDR) LCDD07; +__sfr __at (LCDD08_ADDR) LCDD08; +__sfr __at (LCDD09_ADDR) LCDD09; +__sfr __at (LCDD10_ADDR) LCDD10; +__sfr __at (LCDD11_ADDR) LCDD11; +__sfr __at (LCDD12_ADDR) LCDD12; +__sfr __at (LCDD13_ADDR) LCDD13; +__sfr __at (LCDD14_ADDR) LCDD14; +__sfr __at (LCDD15_ADDR) LCDD15; +__sfr __at (TRISF_ADDR) TRISF; +__sfr __at (TRISG_ADDR) TRISG; +__sfr __at (PMDATA_ADDR) PMDATA; +__sfr __at (PMDATH_ADDR) PMDATH; +__sfr __at (PMADR_ADDR) PMADR; +__sfr __at (PMADRH_ADDR) PMADRH; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits; +volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits; +volatile __LCDSE_bits_t __at(LCDSE_ADDR) LCDSE_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; + diff --git a/device/lib/pic/libdev/pic16f627.c b/device/lib/pic/libdev/pic16f627.c new file mode 100644 index 0000000..9c3228b --- /dev/null +++ b/device/lib/pic/libdev/pic16f627.c @@ -0,0 +1,65 @@ +/* Register definitions for pic16f627. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (VRCON_ADDR) VRCON; + +// +// bitfield definitions +// +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + diff --git a/device/lib/pic/libdev/pic16f627a.c b/device/lib/pic/libdev/pic16f627a.c new file mode 100644 index 0000000..15c0815 --- /dev/null +++ b/device/lib/pic/libdev/pic16f627a.c @@ -0,0 +1,65 @@ +/* Register definitions for pic16f627a. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (VRCON_ADDR) VRCON; + +// +// bitfield definitions +// +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + diff --git a/device/lib/pic/libdev/pic16f628.c b/device/lib/pic/libdev/pic16f628.c new file mode 100644 index 0000000..8f9e60e --- /dev/null +++ b/device/lib/pic/libdev/pic16f628.c @@ -0,0 +1,65 @@ +/* Register definitions for pic16f628. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (VRCON_ADDR) VRCON; + +// +// bitfield definitions +// +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + diff --git a/device/lib/pic/libdev/pic16f628a.c b/device/lib/pic/libdev/pic16f628a.c new file mode 100644 index 0000000..f9ed439 --- /dev/null +++ b/device/lib/pic/libdev/pic16f628a.c @@ -0,0 +1,65 @@ +/* Register definitions for pic16f628a. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (VRCON_ADDR) VRCON; + +// +// bitfield definitions +// +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + diff --git a/device/lib/pic/libdev/pic16f630.c b/device/lib/pic/libdev/pic16f630.c new file mode 100644 index 0000000..47b6750 --- /dev/null +++ b/device/lib/pic/libdev/pic16f630.c @@ -0,0 +1,57 @@ +/* Register definitions for pic16f630. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCAL_ADDR) OSCCAL; +__sfr __at (WPUA_ADDR) WPUA; +__sfr __at (WPU_ADDR) WPU; +__sfr __at (IOCA_ADDR) IOCA; +__sfr __at (IOC_ADDR) IOC; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEDAT_ADDR) EEDAT; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCAL_bits_t __at(OSCCAL_ADDR) OSCCAL_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + diff --git a/device/lib/pic/libdev/pic16f636.c b/device/lib/pic/libdev/pic16f636.c new file mode 100644 index 0000000..309552f --- /dev/null +++ b/device/lib/pic/libdev/pic16f636.c @@ -0,0 +1,73 @@ +/* Register definitions for pic16f636. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (CMCON0_ADDR) CMCON0; +__sfr __at (CMCON1_ADDR) CMCON1; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (WPUDA_ADDR) WPUDA; +__sfr __at (IOCA_ADDR) IOCA; +__sfr __at (WDA_ADDR) WDA; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (EEDAT_ADDR) EEDAT; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (CRCON_ADDR) CRCON; +__sfr __at (CRDAT0_ADDR) CRDAT0; +__sfr __at (CRDAT1_ADDR) CRDAT1; +__sfr __at (CRDAT2_ADDR) CRDAT2; +__sfr __at (CRDAT3_ADDR) CRDAT3; + +// +// bitfield definitions +// +volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; +volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; +volatile __CRCON_bits_t __at(CRCON_ADDR) CRCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDA_bits_t __at(WDA_ADDR) WDA_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; +volatile __WPUDA_bits_t __at(WPUDA_ADDR) WPUDA_bits; + diff --git a/device/lib/pic/libdev/pic16f639.c b/device/lib/pic/libdev/pic16f639.c new file mode 100644 index 0000000..9725986 --- /dev/null +++ b/device/lib/pic/libdev/pic16f639.c @@ -0,0 +1,73 @@ +/* Register definitions for pic16f639. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (CMCON0_ADDR) CMCON0; +__sfr __at (CMCON1_ADDR) CMCON1; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (WPUDA_ADDR) WPUDA; +__sfr __at (IOCA_ADDR) IOCA; +__sfr __at (WDA_ADDR) WDA; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (EEDAT_ADDR) EEDAT; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (CRCON_ADDR) CRCON; +__sfr __at (CRDAT0_ADDR) CRDAT0; +__sfr __at (CRDAT1_ADDR) CRDAT1; +__sfr __at (CRDAT2_ADDR) CRDAT2; +__sfr __at (CRDAT3_ADDR) CRDAT3; + +// +// bitfield definitions +// +volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; +volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; +volatile __CRCON_bits_t __at(CRCON_ADDR) CRCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDA_bits_t __at(WDA_ADDR) WDA_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; +volatile __WPUDA_bits_t __at(WPUDA_ADDR) WPUDA_bits; + diff --git a/device/lib/pic/libdev/pic16f648a.c b/device/lib/pic/libdev/pic16f648a.c new file mode 100644 index 0000000..b7fd2f2 --- /dev/null +++ b/device/lib/pic/libdev/pic16f648a.c @@ -0,0 +1,65 @@ +/* Register definitions for pic16f648a. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (VRCON_ADDR) VRCON; + +// +// bitfield definitions +// +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + diff --git a/device/lib/pic/libdev/pic16f676.c b/device/lib/pic/libdev/pic16f676.c new file mode 100644 index 0000000..572a3b8 --- /dev/null +++ b/device/lib/pic/libdev/pic16f676.c @@ -0,0 +1,65 @@ +/* Register definitions for pic16f676. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCAL_ADDR) OSCCAL; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (WPU_ADDR) WPU; +__sfr __at (WPUA_ADDR) WPUA; +__sfr __at (IOC_ADDR) IOC; +__sfr __at (IOCA_ADDR) IOCA; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEDAT_ADDR) EEDAT; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCAL_bits_t __at(OSCCAL_ADDR) OSCCAL_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + diff --git a/device/lib/pic/libdev/pic16f684.c b/device/lib/pic/libdev/pic16f684.c new file mode 100644 index 0000000..84da2a1 --- /dev/null +++ b/device/lib/pic/libdev/pic16f684.c @@ -0,0 +1,85 @@ +/* Register definitions for pic16f684. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (PWM1CON_ADDR) PWM1CON; +__sfr __at (ECCPAS_ADDR) ECCPAS; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (CMCON0_ADDR) CMCON0; +__sfr __at (CMCON1_ADDR) CMCON1; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (WPU_ADDR) WPU; +__sfr __at (WPUA_ADDR) WPUA; +__sfr __at (IOC_ADDR) IOC; +__sfr __at (IOCA_ADDR) IOCA; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (EEDAT_ADDR) EEDAT; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; +volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; +volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; +volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + diff --git a/device/lib/pic/libdev/pic16f685.c b/device/lib/pic/libdev/pic16f685.c new file mode 100644 index 0000000..3fe7833 --- /dev/null +++ b/device/lib/pic/libdev/pic16f685.c @@ -0,0 +1,108 @@ +/* Register definitions for pic16f685. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (PWM1CON_ADDR) PWM1CON; +__sfr __at (ECCPAS_ADDR) ECCPAS; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (WPU_ADDR) WPU; +__sfr __at (WPUA_ADDR) WPUA; +__sfr __at (IOC_ADDR) IOC; +__sfr __at (IOCA_ADDR) IOCA; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDAT_ADDR) EEDAT; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (CM1CON0_ADDR) CM1CON0; +__sfr __at (CM2CON0_ADDR) CM2CON0; +__sfr __at (CM2CON1_ADDR) CM2CON1; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (ANSELH_ADDR) ANSELH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (PSTRCON_ADDR) PSTRCON; +__sfr __at (SRCON_ADDR) SRCON; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; +volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; +volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; +volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; +volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; +volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PSTRCON_bits_t __at(PSTRCON_ADDR) PSTRCON_bits; +volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits; +volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; +volatile __WPUA_bits_t __at(WPUA_ADDR) WPUA_bits; +volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + diff --git a/device/lib/pic/libdev/pic16f687.c b/device/lib/pic/libdev/pic16f687.c new file mode 100644 index 0000000..e330b52 --- /dev/null +++ b/device/lib/pic/libdev/pic16f687.c @@ -0,0 +1,114 @@ +/* Register definitions for pic16f687. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (MSK_ADDR) MSK; +__sfr __at (SSPMSK_ADDR) SSPMSK; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (WPU_ADDR) WPU; +__sfr __at (WPUA_ADDR) WPUA; +__sfr __at (IOC_ADDR) IOC; +__sfr __at (IOCA_ADDR) IOCA; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (SPBRGH_ADDR) SPBRGH; +__sfr __at (BAUDCTL_ADDR) BAUDCTL; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDAT_ADDR) EEDAT; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (CM1CON0_ADDR) CM1CON0; +__sfr __at (CM2CON0_ADDR) CM2CON0; +__sfr __at (CM2CON1_ADDR) CM2CON1; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (ANSELH_ADDR) ANSELH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (SRCON_ADDR) SRCON; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits; +volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits; +volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; +volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; +volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; +volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; +volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits; +volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits; +volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; +volatile __WPUA_bits_t __at(WPUA_ADDR) WPUA_bits; +volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + diff --git a/device/lib/pic/libdev/pic16f688.c b/device/lib/pic/libdev/pic16f688.c new file mode 100644 index 0000000..541791a --- /dev/null +++ b/device/lib/pic/libdev/pic16f688.c @@ -0,0 +1,84 @@ +/* Register definitions for pic16f688. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (BAUDCTL_ADDR) BAUDCTL; +__sfr __at (SPBRGH_ADDR) SPBRGH; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (CMCON0_ADDR) CMCON0; +__sfr __at (CMCON1_ADDR) CMCON1; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (WPU_ADDR) WPU; +__sfr __at (WPUA_ADDR) WPUA; +__sfr __at (IOC_ADDR) IOC; +__sfr __at (IOCA_ADDR) IOCA; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (EEDAT_ADDR) EEDAT; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits; +volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; +volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; +volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; + diff --git a/device/lib/pic/libdev/pic16f689.c b/device/lib/pic/libdev/pic16f689.c new file mode 100644 index 0000000..f9191f7 --- /dev/null +++ b/device/lib/pic/libdev/pic16f689.c @@ -0,0 +1,114 @@ +/* Register definitions for pic16f689. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (MSK_ADDR) MSK; +__sfr __at (SSPMSK_ADDR) SSPMSK; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (WPU_ADDR) WPU; +__sfr __at (WPUA_ADDR) WPUA; +__sfr __at (IOC_ADDR) IOC; +__sfr __at (IOCA_ADDR) IOCA; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (SPBRGH_ADDR) SPBRGH; +__sfr __at (BAUDCTL_ADDR) BAUDCTL; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDAT_ADDR) EEDAT; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (CM1CON0_ADDR) CM1CON0; +__sfr __at (CM2CON0_ADDR) CM2CON0; +__sfr __at (CM2CON1_ADDR) CM2CON1; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (ANSELH_ADDR) ANSELH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (SRCON_ADDR) SRCON; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits; +volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits; +volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; +volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; +volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; +volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; +volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits; +volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits; +volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; +volatile __WPUA_bits_t __at(WPUA_ADDR) WPUA_bits; +volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + diff --git a/device/lib/pic/libdev/pic16f690.c b/device/lib/pic/libdev/pic16f690.c new file mode 100644 index 0000000..d431fc0 --- /dev/null +++ b/device/lib/pic/libdev/pic16f690.c @@ -0,0 +1,128 @@ +/* Register definitions for pic16f690. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (PWM1CON_ADDR) PWM1CON; +__sfr __at (ECCPAS_ADDR) ECCPAS; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (MSK_ADDR) MSK; +__sfr __at (SSPMSK_ADDR) SSPMSK; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (WPU_ADDR) WPU; +__sfr __at (WPUA_ADDR) WPUA; +__sfr __at (IOC_ADDR) IOC; +__sfr __at (IOCA_ADDR) IOCA; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (SPBRGH_ADDR) SPBRGH; +__sfr __at (BAUDCTL_ADDR) BAUDCTL; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDAT_ADDR) EEDAT; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (CM1CON0_ADDR) CM1CON0; +__sfr __at (CM2CON0_ADDR) CM2CON0; +__sfr __at (CM2CON1_ADDR) CM2CON1; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (ANSELH_ADDR) ANSELH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (PSTRCON_ADDR) PSTRCON; +__sfr __at (SRCON_ADDR) SRCON; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits; +volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; +volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; +volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; +volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; +volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; +volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PSTRCON_bits_t __at(PSTRCON_ADDR) PSTRCON_bits; +volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits; +volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits; +volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; +volatile __WPUA_bits_t __at(WPUA_ADDR) WPUA_bits; +volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + diff --git a/device/lib/pic/libdev/pic16f716.c b/device/lib/pic/libdev/pic16f716.c new file mode 100644 index 0000000..bf3acdb --- /dev/null +++ b/device/lib/pic/libdev/pic16f716.c @@ -0,0 +1,60 @@ +/* Register definitions for pic16f716. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (DATACCP_ADDR) DATACCP; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (PWM1CON_ADDR) PWM1CON; +__sfr __at (ECCPAS_ADDR) ECCPAS; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISCP_ADDR) TRISCP; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (ADCON1_ADDR) ADCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + diff --git a/device/lib/pic/libdev/pic16f72.c b/device/lib/pic/libdev/pic16f72.c new file mode 100644 index 0000000..75d3b3b --- /dev/null +++ b/device/lib/pic/libdev/pic16f72.c @@ -0,0 +1,70 @@ +/* Register definitions for pic16f72. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (PMDATL_ADDR) PMDATL; +__sfr __at (PMADRL_ADDR) PMADRL; +__sfr __at (PMDATH_ADDR) PMDATH; +__sfr __at (PMADRH_ADDR) PMADRH; +__sfr __at (PMCON1_ADDR) PMCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + diff --git a/device/lib/pic/libdev/pic16f73.c b/device/lib/pic/libdev/pic16f73.c new file mode 100644 index 0000000..a5a788a --- /dev/null +++ b/device/lib/pic/libdev/pic16f73.c @@ -0,0 +1,85 @@ +/* Register definitions for pic16f73. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (PMDATA_ADDR) PMDATA; +__sfr __at (PMADR_ADDR) PMADR; +__sfr __at (PMDATH_ADDR) PMDATH; +__sfr __at (PMADRH_ADDR) PMADRH; +__sfr __at (PMCON1_ADDR) PMCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16f737.c b/device/lib/pic/libdev/pic16f737.c new file mode 100644 index 0000000..425ae1d --- /dev/null +++ b/device/lib/pic/libdev/pic16f737.c @@ -0,0 +1,114 @@ +/* Register definitions for pic16f737. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (CCPR3L_ADDR) CCPR3L; +__sfr __at (CCPR3H_ADDR) CCPR3H; +__sfr __at (CCP3CON_ADDR) CCP3CON; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADCON2_ADDR) ADCON2; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (CVRCON_ADDR) CVRCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (PMDATA_ADDR) PMDATA; +__sfr __at (PMADR_ADDR) PMADR; +__sfr __at (PMDATH_ADDR) PMDATH; +__sfr __at (PMADRH_ADDR) PMADRH; +__sfr __at (PMCON1_ADDR) PMCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ADCON2_bits_t __at(ADCON2_ADDR) ADCON2_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __CCP3CON_bits_t __at(CCP3CON_ADDR) CCP3CON_bits; +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + diff --git a/device/lib/pic/libdev/pic16f74.c b/device/lib/pic/libdev/pic16f74.c new file mode 100644 index 0000000..02fb870 --- /dev/null +++ b/device/lib/pic/libdev/pic16f74.c @@ -0,0 +1,93 @@ +/* Register definitions for pic16f74. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (PMDATA_ADDR) PMDATA; +__sfr __at (PMADR_ADDR) PMADR; +__sfr __at (PMDATH_ADDR) PMDATH; +__sfr __at (PMADRH_ADDR) PMADRH; +__sfr __at (PMCON1_ADDR) PMCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16f76.c b/device/lib/pic/libdev/pic16f76.c new file mode 100644 index 0000000..ccf0115 --- /dev/null +++ b/device/lib/pic/libdev/pic16f76.c @@ -0,0 +1,85 @@ +/* Register definitions for pic16f76. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (PMDATA_ADDR) PMDATA; +__sfr __at (PMADR_ADDR) PMADR; +__sfr __at (PMDATH_ADDR) PMDATH; +__sfr __at (PMADRH_ADDR) PMADRH; +__sfr __at (PMCON1_ADDR) PMCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16f767.c b/device/lib/pic/libdev/pic16f767.c new file mode 100644 index 0000000..4912f7e --- /dev/null +++ b/device/lib/pic/libdev/pic16f767.c @@ -0,0 +1,110 @@ +/* Register definitions for pic16f767. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (CCPR3L_ADDR) CCPR3L; +__sfr __at (CCPR3H_ADDR) CCPR3H; +__sfr __at (CCP3CON_ADDR) CCP3CON; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADCON2_ADDR) ADCON2; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (CVRCON_ADDR) CVRCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (PMDATA_ADDR) PMDATA; +__sfr __at (PMADR_ADDR) PMADR; +__sfr __at (PMDATH_ADDR) PMDATH; +__sfr __at (PMADRH_ADDR) PMADRH; +__sfr __at (PMCON1_ADDR) PMCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ADCON2_bits_t __at(ADCON2_ADDR) ADCON2_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __CCP3CON_bits_t __at(CCP3CON_ADDR) CCP3CON_bits; +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + diff --git a/device/lib/pic/libdev/pic16f77.c b/device/lib/pic/libdev/pic16f77.c new file mode 100644 index 0000000..abbf41c --- /dev/null +++ b/device/lib/pic/libdev/pic16f77.c @@ -0,0 +1,93 @@ +/* Register definitions for pic16f77. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRES_ADDR) ADRES; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (PMDATA_ADDR) PMDATA; +__sfr __at (PMADR_ADDR) PMADR; +__sfr __at (PMDATH_ADDR) PMDATH; +__sfr __at (PMADRH_ADDR) PMADRH; +__sfr __at (PMCON1_ADDR) PMCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16f777.c b/device/lib/pic/libdev/pic16f777.c new file mode 100644 index 0000000..b9ef823 --- /dev/null +++ b/device/lib/pic/libdev/pic16f777.c @@ -0,0 +1,114 @@ +/* Register definitions for pic16f777. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (CCPR3L_ADDR) CCPR3L; +__sfr __at (CCPR3H_ADDR) CCPR3H; +__sfr __at (CCP3CON_ADDR) CCP3CON; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADCON2_ADDR) ADCON2; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (CVRCON_ADDR) CVRCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (PMDATA_ADDR) PMDATA; +__sfr __at (PMADR_ADDR) PMADR; +__sfr __at (PMDATH_ADDR) PMDATH; +__sfr __at (PMADRH_ADDR) PMADRH; +__sfr __at (PMCON1_ADDR) PMCON1; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ADCON2_bits_t __at(ADCON2_ADDR) ADCON2_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __CCP3CON_bits_t __at(CCP3CON_ADDR) CCP3CON_bits; +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + diff --git a/device/lib/pic/libdev/pic16f785.c b/device/lib/pic/libdev/pic16f785.c new file mode 100644 index 0000000..35b2ba2 --- /dev/null +++ b/device/lib/pic/libdev/pic16f785.c @@ -0,0 +1,102 @@ +/* Register definitions for pic16f785. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (ANSEL0_ADDR) ANSEL0; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (ANSEL1_ADDR) ANSEL1; +__sfr __at (WPU_ADDR) WPU; +__sfr __at (WPUA_ADDR) WPUA; +__sfr __at (IOC_ADDR) IOC; +__sfr __at (IOCA_ADDR) IOCA; +__sfr __at (REFCON_ADDR) REFCON; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (EEDAT_ADDR) EEDAT; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (PWMCON1_ADDR) PWMCON1; +__sfr __at (PWMCON0_ADDR) PWMCON0; +__sfr __at (PWMCLK_ADDR) PWMCLK; +__sfr __at (PWMPH1_ADDR) PWMPH1; +__sfr __at (PWMPH2_ADDR) PWMPH2; +__sfr __at (CM1CON0_ADDR) CM1CON0; +__sfr __at (CM2CON0_ADDR) CM2CON0; +__sfr __at (CM2CON1_ADDR) CM2CON1; +__sfr __at (OPA1CON_ADDR) OPA1CON; +__sfr __at (OPA2CON_ADDR) OPA2CON; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ANSEL1_bits_t __at(ANSEL1_ADDR) ANSEL1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; +volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; +volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; +volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PWMCLK_bits_t __at(PWMCLK_ADDR) PWMCLK_bits; +volatile __PWMCON0_bits_t __at(PWMCON0_ADDR) PWMCON0_bits; +volatile __PWMCON1_bits_t __at(PWMCON1_ADDR) PWMCON1_bits; +volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; +volatile __WPUA_bits_t __at(WPUA_ADDR) WPUA_bits; + diff --git a/device/lib/pic/libdev/pic16f818.c b/device/lib/pic/libdev/pic16f818.c new file mode 100644 index 0000000..a9a030d --- /dev/null +++ b/device/lib/pic/libdev/pic16f818.c @@ -0,0 +1,76 @@ +/* Register definitions for pic16f818. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + diff --git a/device/lib/pic/libdev/pic16f819.c b/device/lib/pic/libdev/pic16f819.c new file mode 100644 index 0000000..9c36d29 --- /dev/null +++ b/device/lib/pic/libdev/pic16f819.c @@ -0,0 +1,76 @@ +/* Register definitions for pic16f819. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + diff --git a/device/lib/pic/libdev/pic16f84.c b/device/lib/pic/libdev/pic16f84.c new file mode 100644 index 0000000..dbb666a --- /dev/null +++ b/device/lib/pic/libdev/pic16f84.c @@ -0,0 +1,36 @@ +/* Register definitions for pic16f84. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + diff --git a/device/lib/pic/libdev/pic16f84a.c b/device/lib/pic/libdev/pic16f84a.c new file mode 100644 index 0000000..edd87f9 --- /dev/null +++ b/device/lib/pic/libdev/pic16f84a.c @@ -0,0 +1,36 @@ +/* Register definitions for pic16f84a. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; + diff --git a/device/lib/pic/libdev/pic16f87.c b/device/lib/pic/libdev/pic16f87.c new file mode 100644 index 0000000..43254d8 --- /dev/null +++ b/device/lib/pic/libdev/pic16f87.c @@ -0,0 +1,83 @@ +/* Register definitions for pic16f87. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (CVRCON_ADDR) CVRCON; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + diff --git a/device/lib/pic/libdev/pic16f870.c b/device/lib/pic/libdev/pic16f870.c new file mode 100644 index 0000000..780b199 --- /dev/null +++ b/device/lib/pic/libdev/pic16f870.c @@ -0,0 +1,77 @@ +/* Register definitions for pic16f870. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16f871.c b/device/lib/pic/libdev/pic16f871.c new file mode 100644 index 0000000..942561c --- /dev/null +++ b/device/lib/pic/libdev/pic16f871.c @@ -0,0 +1,85 @@ +/* Register definitions for pic16f871. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16f872.c b/device/lib/pic/libdev/pic16f872.c new file mode 100644 index 0000000..109751a --- /dev/null +++ b/device/lib/pic/libdev/pic16f872.c @@ -0,0 +1,78 @@ +/* Register definitions for pic16f872. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; + diff --git a/device/lib/pic/libdev/pic16f873.c b/device/lib/pic/libdev/pic16f873.c new file mode 100644 index 0000000..24bcdc6 --- /dev/null +++ b/device/lib/pic/libdev/pic16f873.c @@ -0,0 +1,89 @@ +/* Register definitions for pic16f873. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16f873a.c b/device/lib/pic/libdev/pic16f873a.c new file mode 100644 index 0000000..42d73e0 --- /dev/null +++ b/device/lib/pic/libdev/pic16f873a.c @@ -0,0 +1,93 @@ +/* Register definitions for pic16f873a. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (CVRCON_ADDR) CVRCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16f874.c b/device/lib/pic/libdev/pic16f874.c new file mode 100644 index 0000000..378f1b0 --- /dev/null +++ b/device/lib/pic/libdev/pic16f874.c @@ -0,0 +1,97 @@ +/* Register definitions for pic16f874. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16f874a.c b/device/lib/pic/libdev/pic16f874a.c new file mode 100644 index 0000000..1a2d947 --- /dev/null +++ b/device/lib/pic/libdev/pic16f874a.c @@ -0,0 +1,101 @@ +/* Register definitions for pic16f874a. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (CVRCON_ADDR) CVRCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16f876.c b/device/lib/pic/libdev/pic16f876.c new file mode 100644 index 0000000..baaea1f --- /dev/null +++ b/device/lib/pic/libdev/pic16f876.c @@ -0,0 +1,89 @@ +/* Register definitions for pic16f876. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16f876a.c b/device/lib/pic/libdev/pic16f876a.c new file mode 100644 index 0000000..e64cbd5 --- /dev/null +++ b/device/lib/pic/libdev/pic16f876a.c @@ -0,0 +1,93 @@ +/* Register definitions for pic16f876a. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (CVRCON_ADDR) CVRCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16f877.c b/device/lib/pic/libdev/pic16f877.c new file mode 100644 index 0000000..89b81ac --- /dev/null +++ b/device/lib/pic/libdev/pic16f877.c @@ -0,0 +1,97 @@ +/* Register definitions for pic16f877. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16f877a.c b/device/lib/pic/libdev/pic16f877a.c new file mode 100644 index 0000000..e23cbea --- /dev/null +++ b/device/lib/pic/libdev/pic16f877a.c @@ -0,0 +1,101 @@ +/* Register definitions for pic16f877a. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (CVRCON_ADDR) CVRCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; + diff --git a/device/lib/pic/libdev/pic16f88.c b/device/lib/pic/libdev/pic16f88.c new file mode 100644 index 0000000..ca8a067 --- /dev/null +++ b/device/lib/pic/libdev/pic16f88.c @@ -0,0 +1,90 @@ +/* Register definitions for pic16f88. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (CMCON_ADDR) CMCON; +__sfr __at (CVRCON_ADDR) CVRCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits; +volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; + diff --git a/device/lib/pic/libdev/pic16f886.c b/device/lib/pic/libdev/pic16f886.c new file mode 100644 index 0000000..f34a209 --- /dev/null +++ b/device/lib/pic/libdev/pic16f886.c @@ -0,0 +1,130 @@ +/* Register definitions for pic16f886. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + * + * Rename this file if your gputils in fact support this device. + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (SPBRGH_ADDR) SPBRGH; +__sfr __at (PWM1CON_ADDR) PWM1CON; +__sfr __at (ECCPAS_ADDR) ECCPAS; +__sfr __at (PSTRCON_ADDR) PSTRCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (CM1CON0_ADDR) CM1CON0; +__sfr __at (CM2CON0_ADDR) CM2CON0; +__sfr __at (CM2CON1_ADDR) CM2CON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (SRCON_ADDR) SRCON; +__sfr __at (BAUDCTL_ADDR) BAUDCTL; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (ANSELH_ADDR) ANSELH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits; +volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; +volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; +volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; +volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __PSTRCON_bits_t __at(PSTRCON_ADDR) PSTRCON_bits; +volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits; +volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits; +volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; +volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + diff --git a/device/lib/pic/libdev/pic16f887.c b/device/lib/pic/libdev/pic16f887.c new file mode 100644 index 0000000..56496f1 --- /dev/null +++ b/device/lib/pic/libdev/pic16f887.c @@ -0,0 +1,134 @@ +/* Register definitions for pic16f887. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + * + * Rename this file if your gputils in fact support this device. + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (SPBRGH_ADDR) SPBRGH; +__sfr __at (PWM1CON_ADDR) PWM1CON; +__sfr __at (ECCPAS_ADDR) ECCPAS; +__sfr __at (PSTRCON_ADDR) PSTRCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (CM1CON0_ADDR) CM1CON0; +__sfr __at (CM2CON0_ADDR) CM2CON0; +__sfr __at (CM2CON1_ADDR) CM2CON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (SRCON_ADDR) SRCON; +__sfr __at (BAUDCTL_ADDR) BAUDCTL; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (ANSELH_ADDR) ANSELH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits; +volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; +volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; +volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; +volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __PSTRCON_bits_t __at(PSTRCON_ADDR) PSTRCON_bits; +volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits; +volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits; +volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; +volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + diff --git a/device/lib/pic/libdev/pic16f913.c b/device/lib/pic/libdev/pic16f913.c new file mode 100644 index 0000000..b6daccd --- /dev/null +++ b/device/lib/pic/libdev/pic16f913.c @@ -0,0 +1,137 @@ +/* Register definitions for pic16f913. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (WPU_ADDR) WPU; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (IOC_ADDR) IOC; +__sfr __at (CMCON1_ADDR) CMCON1; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (CMCON0_ADDR) CMCON0; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (LCDCON_ADDR) LCDCON; +__sfr __at (LCDPS_ADDR) LCDPS; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (EEDATL_ADDR) EEDATL; +__sfr __at (EEADRL_ADDR) EEADRL; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (LCDDATA0_ADDR) LCDDATA0; +__sfr __at (LCDDATA1_ADDR) LCDDATA1; +__sfr __at (LCDDATA3_ADDR) LCDDATA3; +__sfr __at (LCDDATA4_ADDR) LCDDATA4; +__sfr __at (LCDDATA6_ADDR) LCDDATA6; +__sfr __at (LCDDATA7_ADDR) LCDDATA7; +__sfr __at (LCDDATA9_ADDR) LCDDATA9; +__sfr __at (LCDDATA10_ADDR) LCDDATA10; +__sfr __at (LCDSE0_ADDR) LCDSE0; +__sfr __at (LCDSE1_ADDR) LCDSE1; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; +volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; +volatile __EEADRH_bits_t __at(EEADRH_ADDR) EEADRH_bits; +volatile __EEADRL_bits_t __at(EEADRL_ADDR) EEADRL_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; +volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; +volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits; +volatile __LCDDATA0_bits_t __at(LCDDATA0_ADDR) LCDDATA0_bits; +volatile __LCDDATA1_bits_t __at(LCDDATA1_ADDR) LCDDATA1_bits; +volatile __LCDDATA10_bits_t __at(LCDDATA10_ADDR) LCDDATA10_bits; +volatile __LCDDATA3_bits_t __at(LCDDATA3_ADDR) LCDDATA3_bits; +volatile __LCDDATA4_bits_t __at(LCDDATA4_ADDR) LCDDATA4_bits; +volatile __LCDDATA6_bits_t __at(LCDDATA6_ADDR) LCDDATA6_bits; +volatile __LCDDATA7_bits_t __at(LCDDATA7_ADDR) LCDDATA7_bits; +volatile __LCDDATA9_bits_t __at(LCDDATA9_ADDR) LCDDATA9_bits; +volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits; +volatile __LCDSE0_bits_t __at(LCDSE0_ADDR) LCDSE0_bits; +volatile __LCDSE1_bits_t __at(LCDSE1_ADDR) LCDSE1_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; +volatile __WPU_bits_t __at(WPU_ADDR) WPU_bits; +volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + diff --git a/device/lib/pic/libdev/pic16f914.c b/device/lib/pic/libdev/pic16f914.c new file mode 100644 index 0000000..34be36b --- /dev/null +++ b/device/lib/pic/libdev/pic16f914.c @@ -0,0 +1,155 @@ +/* Register definitions for pic16f914. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (WPU_ADDR) WPU; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (IOC_ADDR) IOC; +__sfr __at (CMCON1_ADDR) CMCON1; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (CMCON0_ADDR) CMCON0; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (LCDCON_ADDR) LCDCON; +__sfr __at (LCDPS_ADDR) LCDPS; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (EEDATL_ADDR) EEDATL; +__sfr __at (EEADRL_ADDR) EEADRL; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (LCDDATA0_ADDR) LCDDATA0; +__sfr __at (LCDDATA1_ADDR) LCDDATA1; +__sfr __at (LCDDATA2_ADDR) LCDDATA2; +__sfr __at (LCDDATA3_ADDR) LCDDATA3; +__sfr __at (LCDDATA4_ADDR) LCDDATA4; +__sfr __at (LCDDATA5_ADDR) LCDDATA5; +__sfr __at (LCDDATA6_ADDR) LCDDATA6; +__sfr __at (LCDDATA7_ADDR) LCDDATA7; +__sfr __at (LCDDATA8_ADDR) LCDDATA8; +__sfr __at (LCDDATA9_ADDR) LCDDATA9; +__sfr __at (LCDDATA10_ADDR) LCDDATA10; +__sfr __at (LCDDATA11_ADDR) LCDDATA11; +__sfr __at (LCDSE0_ADDR) LCDSE0; +__sfr __at (LCDSE1_ADDR) LCDSE1; +__sfr __at (LCDSE2_ADDR) LCDSE2; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; +volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; +volatile __EEADRH_bits_t __at(EEADRH_ADDR) EEADRH_bits; +volatile __EEADRL_bits_t __at(EEADRL_ADDR) EEADRL_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; +volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; +volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits; +volatile __LCDDATA0_bits_t __at(LCDDATA0_ADDR) LCDDATA0_bits; +volatile __LCDDATA1_bits_t __at(LCDDATA1_ADDR) LCDDATA1_bits; +volatile __LCDDATA10_bits_t __at(LCDDATA10_ADDR) LCDDATA10_bits; +volatile __LCDDATA11_bits_t __at(LCDDATA11_ADDR) LCDDATA11_bits; +volatile __LCDDATA2_bits_t __at(LCDDATA2_ADDR) LCDDATA2_bits; +volatile __LCDDATA3_bits_t __at(LCDDATA3_ADDR) LCDDATA3_bits; +volatile __LCDDATA4_bits_t __at(LCDDATA4_ADDR) LCDDATA4_bits; +volatile __LCDDATA5_bits_t __at(LCDDATA5_ADDR) LCDDATA5_bits; +volatile __LCDDATA6_bits_t __at(LCDDATA6_ADDR) LCDDATA6_bits; +volatile __LCDDATA7_bits_t __at(LCDDATA7_ADDR) LCDDATA7_bits; +volatile __LCDDATA8_bits_t __at(LCDDATA8_ADDR) LCDDATA8_bits; +volatile __LCDDATA9_bits_t __at(LCDDATA9_ADDR) LCDDATA9_bits; +volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits; +volatile __LCDSE0_bits_t __at(LCDSE0_ADDR) LCDSE0_bits; +volatile __LCDSE1_bits_t __at(LCDSE1_ADDR) LCDSE1_bits; +volatile __LCDSE2_bits_t __at(LCDSE2_ADDR) LCDSE2_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; +volatile __WPU_bits_t __at(WPU_ADDR) WPU_bits; +volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + diff --git a/device/lib/pic/libdev/pic16f916.c b/device/lib/pic/libdev/pic16f916.c new file mode 100644 index 0000000..9addbbb --- /dev/null +++ b/device/lib/pic/libdev/pic16f916.c @@ -0,0 +1,137 @@ +/* Register definitions for pic16f916. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (WPU_ADDR) WPU; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (IOC_ADDR) IOC; +__sfr __at (CMCON1_ADDR) CMCON1; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (CMCON0_ADDR) CMCON0; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (LCDCON_ADDR) LCDCON; +__sfr __at (LCDPS_ADDR) LCDPS; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (EEDATL_ADDR) EEDATL; +__sfr __at (EEADRL_ADDR) EEADRL; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (LCDDATA0_ADDR) LCDDATA0; +__sfr __at (LCDDATA1_ADDR) LCDDATA1; +__sfr __at (LCDDATA3_ADDR) LCDDATA3; +__sfr __at (LCDDATA4_ADDR) LCDDATA4; +__sfr __at (LCDDATA6_ADDR) LCDDATA6; +__sfr __at (LCDDATA7_ADDR) LCDDATA7; +__sfr __at (LCDDATA9_ADDR) LCDDATA9; +__sfr __at (LCDDATA10_ADDR) LCDDATA10; +__sfr __at (LCDSE0_ADDR) LCDSE0; +__sfr __at (LCDSE1_ADDR) LCDSE1; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; +volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; +volatile __EEADRH_bits_t __at(EEADRH_ADDR) EEADRH_bits; +volatile __EEADRL_bits_t __at(EEADRL_ADDR) EEADRL_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; +volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; +volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits; +volatile __LCDDATA0_bits_t __at(LCDDATA0_ADDR) LCDDATA0_bits; +volatile __LCDDATA1_bits_t __at(LCDDATA1_ADDR) LCDDATA1_bits; +volatile __LCDDATA10_bits_t __at(LCDDATA10_ADDR) LCDDATA10_bits; +volatile __LCDDATA3_bits_t __at(LCDDATA3_ADDR) LCDDATA3_bits; +volatile __LCDDATA4_bits_t __at(LCDDATA4_ADDR) LCDDATA4_bits; +volatile __LCDDATA6_bits_t __at(LCDDATA6_ADDR) LCDDATA6_bits; +volatile __LCDDATA7_bits_t __at(LCDDATA7_ADDR) LCDDATA7_bits; +volatile __LCDDATA9_bits_t __at(LCDDATA9_ADDR) LCDDATA9_bits; +volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits; +volatile __LCDSE0_bits_t __at(LCDSE0_ADDR) LCDSE0_bits; +volatile __LCDSE1_bits_t __at(LCDSE1_ADDR) LCDSE1_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; +volatile __WPU_bits_t __at(WPU_ADDR) WPU_bits; +volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + diff --git a/device/lib/pic/libdev/pic16f917.c b/device/lib/pic/libdev/pic16f917.c new file mode 100644 index 0000000..565c063 --- /dev/null +++ b/device/lib/pic/libdev/pic16f917.c @@ -0,0 +1,155 @@ +/* Register definitions for pic16f917. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + */ +#include + +__sfr __at (INDF_ADDR) INDF; +__sfr __at (TMR0_ADDR) TMR0; +__sfr __at (PCL_ADDR) PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (WPU_ADDR) WPU; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (IOC_ADDR) IOC; +__sfr __at (CMCON1_ADDR) CMCON1; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (CMCON0_ADDR) CMCON0; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (LCDCON_ADDR) LCDCON; +__sfr __at (LCDPS_ADDR) LCDPS; +__sfr __at (LVDCON_ADDR) LVDCON; +__sfr __at (EEDATL_ADDR) EEDATL; +__sfr __at (EEADRL_ADDR) EEADRL; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (LCDDATA0_ADDR) LCDDATA0; +__sfr __at (LCDDATA1_ADDR) LCDDATA1; +__sfr __at (LCDDATA2_ADDR) LCDDATA2; +__sfr __at (LCDDATA3_ADDR) LCDDATA3; +__sfr __at (LCDDATA4_ADDR) LCDDATA4; +__sfr __at (LCDDATA5_ADDR) LCDDATA5; +__sfr __at (LCDDATA6_ADDR) LCDDATA6; +__sfr __at (LCDDATA7_ADDR) LCDDATA7; +__sfr __at (LCDDATA8_ADDR) LCDDATA8; +__sfr __at (LCDDATA9_ADDR) LCDDATA9; +__sfr __at (LCDDATA10_ADDR) LCDDATA10; +__sfr __at (LCDDATA11_ADDR) LCDDATA11; +__sfr __at (LCDSE0_ADDR) LCDSE0; +__sfr __at (LCDSE1_ADDR) LCDSE1; +__sfr __at (LCDSE2_ADDR) LCDSE2; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits; +volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits; +volatile __EEADRH_bits_t __at(EEADRH_ADDR) EEADRH_bits; +volatile __EEADRL_bits_t __at(EEADRL_ADDR) EEADRL_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits; +volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; +volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits; +volatile __LCDDATA0_bits_t __at(LCDDATA0_ADDR) LCDDATA0_bits; +volatile __LCDDATA1_bits_t __at(LCDDATA1_ADDR) LCDDATA1_bits; +volatile __LCDDATA10_bits_t __at(LCDDATA10_ADDR) LCDDATA10_bits; +volatile __LCDDATA11_bits_t __at(LCDDATA11_ADDR) LCDDATA11_bits; +volatile __LCDDATA2_bits_t __at(LCDDATA2_ADDR) LCDDATA2_bits; +volatile __LCDDATA3_bits_t __at(LCDDATA3_ADDR) LCDDATA3_bits; +volatile __LCDDATA4_bits_t __at(LCDDATA4_ADDR) LCDDATA4_bits; +volatile __LCDDATA5_bits_t __at(LCDDATA5_ADDR) LCDDATA5_bits; +volatile __LCDDATA6_bits_t __at(LCDDATA6_ADDR) LCDDATA6_bits; +volatile __LCDDATA7_bits_t __at(LCDDATA7_ADDR) LCDDATA7_bits; +volatile __LCDDATA8_bits_t __at(LCDDATA8_ADDR) LCDDATA8_bits; +volatile __LCDDATA9_bits_t __at(LCDDATA9_ADDR) LCDDATA9_bits; +volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits; +volatile __LCDSE0_bits_t __at(LCDSE0_ADDR) LCDSE0_bits; +volatile __LCDSE1_bits_t __at(LCDSE1_ADDR) LCDSE1_bits; +volatile __LCDSE2_bits_t __at(LCDSE2_ADDR) LCDSE2_bits; +volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; +volatile __WPU_bits_t __at(WPU_ADDR) WPU_bits; +volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + diff --git a/device/lib/pic/libm/Makefile.in b/device/lib/pic/libm/Makefile.in new file mode 100644 index 0000000..ec178a6 --- /dev/null +++ b/device/lib/pic/libm/Makefile.in @@ -0,0 +1,10 @@ +top_builddir=@top_builddir@ +top_srcdir=@top_srcdir@ + +VPATH = @srcdir@ +srcdir = @srcdir@ + +SUBDIRS = +MKLIB = libm.lib + +include $(top_srcdir)/Makefile.subdir diff --git a/device/lib/pic/libm/acosf.c b/device/lib/pic/libm/acosf.c new file mode 100644 index 0000000..57c1025 --- /dev/null +++ b/device/lib/pic/libm/acosf.c @@ -0,0 +1,35 @@ +/* acosf.c: Computes arc cosine of a 32-bit float + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: acosf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +float asincosf(const float x, const int isacos); + +float acosf(const float x) _MATH_REENTRANT +{ + if(x== 1.0) return 0.0; + else if(x==-1.0) return PI; + else if(x== 0.0) return HALF_PI; + return asincosf(x,1); +} diff --git a/device/lib/pic/libm/asincosf.c b/device/lib/pic/libm/asincosf.c new file mode 100644 index 0000000..382bc5a --- /dev/null +++ b/device/lib/pic/libm/asincosf.c @@ -0,0 +1,86 @@ +/* asincosf.c: Computes asin or acos of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: asincosf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + + +#include +#include + +#define P1 0.933935835E+0 +#define P2 -0.504400557E+0 +#define Q0 0.560363004E+1 +#define Q1 -0.554846723E+1 +#define Q2 0.100000000E+1 + +#define P(g) (P2*g+P1) +#define Q(g) ((Q2*g+Q1)*g+Q0) + +float asincosf(const float x, const int isacos) +{ + float y, g, r; + int i; + + static const float a[2]={ 0.0, QUART_PI }; + static const float b[2]={ HALF_PI, QUART_PI }; + + y=fabsf(x); + i=isacos; + if (y < EPS) r=y; + else + { + if (y > 0.5) + { + i=1-i; + if (y > 1.0) + { + errno=EDOM; + return 0.0; + } + g=(0.5-y)+0.5; + g=ldexpf(g,-1); + y=sqrtf(g); + y=-(y+y); + } + else + { + g=y*y; + } + r=y+y*((P(g)*g)/Q(g)); + } + if (isacos) + { + if (x < 0.0) + r=(b[i]+r)+b[i]; + else + r=(a[i]-r)+a[i]; + } + else + { + r=(a[i]+r)+a[i]; + if (x<0.0) r=-r; + } + return r; +} diff --git a/device/lib/pic/libm/asinf.c b/device/lib/pic/libm/asinf.c new file mode 100644 index 0000000..ffb72f4 --- /dev/null +++ b/device/lib/pic/libm/asinf.c @@ -0,0 +1,36 @@ +/* asinf.c: Computes asin(x) + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: asinf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +float asincosf(const float x, const int isacos); + +float asinf(const float x) _MATH_REENTRANT +{ + if(x== 1.0) return HALF_PI; + else if(x==-1.0) return -HALF_PI; + else if(x== 0.0) return 0.0; + else return asincosf(x,0); +} + diff --git a/device/lib/pic/libm/atan2f.c b/device/lib/pic/libm/atan2f.c new file mode 100644 index 0000000..4ad28a4 --- /dev/null +++ b/device/lib/pic/libm/atan2f.c @@ -0,0 +1,49 @@ +/* atan2f.c: Computes atan2(x) where x is a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: atan2f.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include +#include + +float atan2f(const float x, const float y) +{ + float r; + + if ((x==0.0) && (y==0.0)) + { + errno=EDOM; + return 0.0; + } + + if(fabsf(y)>=fabsf(x)) + { + r=atanf(x/y); + if(y<0.0) r+=(x>=0?PI:-PI); + } + else + { + r=-atanf(y/x); + r+=(x<0.0?-HALF_PI:HALF_PI); + } + return r; +} diff --git a/device/lib/pic/libm/atanf.c b/device/lib/pic/libm/atanf.c new file mode 100644 index 0000000..79e28e4 --- /dev/null +++ b/device/lib/pic/libm/atanf.c @@ -0,0 +1,74 @@ +/* atanf.c: Computes arctan of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: atanf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include +#include + +#define P0 -0.4708325141E+0 +#define P1 -0.5090958253E-1 +#define Q0 0.1412500740E+1 +#define Q1 0.1000000000E+1 + +#define P(g,f) ((P1*g+P0)*g*f) +#define Q(g) (Q1*g+Q0) + +#define K1 0.2679491924 /* 2-sqrt(3) */ +#define K2 0.7320508076 /* sqrt(3)-1 */ +#define K3 1.7320508076 /* sqrt(3) */ + +float atanf(const float x) _MATH_REENTRANT +{ + float f, r, g; + int n=0; + static float a[]={ 0.0, 0.5235987756, 1.5707963268, 1.0471975512 }; + + f=fabsf(x); + if(f>1.0) + { + f=1.0/f; + n=2; + } + if(f>K1) + { + f=((K2*f-1.0)+f)/(K3+f); + // What it is actually wanted is this more accurate formula, + // but SDCC optimizes it and then it does not work: + // f=(((K2*f-0.5)-0.5)+f)/(K3+f); + n++; + } + if(fabsf(f)1) r=-r; + r+=a[n]; + if(x<0.0) r=-r; + return r; +} + diff --git a/device/lib/pic/libm/ceilf.c b/device/lib/pic/libm/ceilf.c new file mode 100644 index 0000000..1d11119 --- /dev/null +++ b/device/lib/pic/libm/ceilf.c @@ -0,0 +1,35 @@ +/* ceilf.c: Returns the integer larger or equal than x + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: ceilf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +float ceilf(float x) _MATH_REENTRANT +{ + long r; + r=x; + if (r<0) + return r; + else + return (r+((r + +float sincosf(float x, int iscos); + +float cosf(float x) _MATH_REENTRANT +{ + if (x==0.0) return 1.0; + return sincosf(x, 1); +} diff --git a/device/lib/pic/libm/coshf.c b/device/lib/pic/libm/coshf.c new file mode 100644 index 0000000..04acbb4 --- /dev/null +++ b/device/lib/pic/libm/coshf.c @@ -0,0 +1,32 @@ +/* coshf.c: Computes cosh(x) where x is a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: coshf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +float sincoshf(const float x, const int iscosh); + +float coshf(const float x) _MATH_REENTRANT +{ + return sincoshf(x, 1); +} diff --git a/device/lib/pic/libm/cotf.c b/device/lib/pic/libm/cotf.c new file mode 100644 index 0000000..177753b --- /dev/null +++ b/device/lib/pic/libm/cotf.c @@ -0,0 +1,45 @@ +/* cotf.c: Computes cot(x) where x is a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: cotf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include +#include + +float tancotf(const float x, const int iscot); + +float cotf(const float x) _MATH_REENTRANT +{ + float y; + + y=fabsf(x); + if (y<1.0E-30) //This one requires more thinking... + { + errno = ERANGE; + if (x<0.0) + return -XMAX; + else + return XMAX; + } + return tancotf(x, 1); +} + diff --git a/device/lib/pic/libm/errno.c b/device/lib/pic/libm/errno.c new file mode 100644 index 0000000..a439110 --- /dev/null +++ b/device/lib/pic/libm/errno.c @@ -0,0 +1,25 @@ +/*------------------------------------------------------------------------- + + errno.c :- just declares errno as a variable + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +-------------------------------------------------------------------------*/ + +/* +** $Id: errno.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +int errno; diff --git a/device/lib/pic/libm/expf.c b/device/lib/pic/libm/expf.c new file mode 100644 index 0000000..4bdeec6 --- /dev/null +++ b/device/lib/pic/libm/expf.c @@ -0,0 +1,90 @@ +/* expf.c: Computes e**x of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: expf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include +#include + +#define P0 0.2499999995E+0 +#define P1 0.4160288626E-2 +#define Q0 0.5000000000E+0 +#define Q1 0.4998717877E-1 + +#define P(z) ((P1*z)+P0) +#define Q(z) ((Q1*z)+Q0) + +#define C1 0.693359375 +#define C2 -2.1219444005469058277e-4 + +#define BIGX 88.72283911 /* ln(XMAX) */ +#define EXPEPS 1.0E-7 /* exp(1.0E-7)=0.0000001 */ +#define K1 1.4426950409 /* 1/ln(2) */ + +float expf(const float x) +{ + int n; + float xn, g, r, z, y; + char sign; + + if(x>=0.0) + { y=x; sign=0; } + else + { y=-x; sign=1; } + + if(yBIGX) + { + if(sign) + { + errno=ERANGE; + return XMAX; + } + else + { + return 0.0; + } + } + + z=y*K1; + n=z; + + if(n<0) --n; + if(z-n>=0.5) ++n; + xn=n; + g=((y-xn*C1))-xn*C2; + z=g*g; + r=P(z)*g; + r=0.5+(r/(Q(z)-r)); + + n++; + z=ldexpf(r, n); + if(sign) + return 1.0/z; + else + return z; +} + diff --git a/device/lib/pic/libm/fabsf.c b/device/lib/pic/libm/fabsf.c new file mode 100644 index 0000000..70dc694 --- /dev/null +++ b/device/lib/pic/libm/fabsf.c @@ -0,0 +1,36 @@ +/* fabsf.c: Returns the absolute value of a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: fabsf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include +#include +#include + +float fabsf(const float x) _MATH_REENTRANT +{ + FS_STATIC union float_long fl; + + fl.f = x; + fl.l &= 0x7fffffff; + return fl.f; +} diff --git a/device/lib/pic/libm/floorf.c b/device/lib/pic/libm/floorf.c new file mode 100644 index 0000000..be1ad74 --- /dev/null +++ b/device/lib/pic/libm/floorf.c @@ -0,0 +1,35 @@ +/* floorf.c: Returns the integer smaller or equal than x + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: floorf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +float floorf (float x) _MATH_REENTRANT +{ + long r; + r=x; + if (r<=0) + return (r+((r>x)?-1:0)); + else + return r; +} diff --git a/device/lib/pic/libm/frexpf.c b/device/lib/pic/libm/frexpf.c new file mode 100644 index 0000000..20b636d --- /dev/null +++ b/device/lib/pic/libm/frexpf.c @@ -0,0 +1,42 @@ +/* frexpf.c: Returns the exponent and mantisa of a 32 bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: frexpf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include +#include +#include + +float frexpf(const float x, int *pw2) +{ + FS_STATIC union float_long fl; + long int i; + + fl.f=x; + /* Find the exponent (power of 2) */ + i = ( fl.l >> 23) & 0x000000ff; + i -= 0x7e; + *pw2 = i; + fl.l &= 0x807fffff; /* strip all exponent bits */ + fl.l |= 0x3f000000; /* mantissa between 0.5 and 1 */ + return(fl.f); +} diff --git a/device/lib/pic/libm/ldexpf.c b/device/lib/pic/libm/ldexpf.c new file mode 100644 index 0000000..e04f49c --- /dev/null +++ b/device/lib/pic/libm/ldexpf.c @@ -0,0 +1,41 @@ +/* ldexpf.c: Build a float from a mantisa and exponent. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: ldexpf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include +#include +#include + +float ldexpf(const float x, const int pw2) +{ + FS_STATIC union float_long fl; + long e; + + fl.f = x; + + e=(fl.l >> 23) & 0x000000ff; + e+=pw2; + fl.l= ((e & 0xff) << 23) | (fl.l & 0x807fffff); + + return(fl.f); +} diff --git a/device/lib/pic/libm/log10f.c b/device/lib/pic/libm/log10f.c new file mode 100644 index 0000000..86ef4f0 --- /dev/null +++ b/device/lib/pic/libm/log10f.c @@ -0,0 +1,31 @@ +/* log10f.c: Computes the base 10 log of a 32 bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: log10f.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include +#include + +float log10f(const float x) _MATH_REENTRANT +{ + return logf(x)*0.4342944819; +} diff --git a/device/lib/pic/libm/logf.c b/device/lib/pic/libm/logf.c new file mode 100644 index 0000000..e0cd18c --- /dev/null +++ b/device/lib/pic/libm/logf.c @@ -0,0 +1,71 @@ +/* logf.c: Computes the natural log of a 32 bit float as outlined in [1]. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: logf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include +#include +#include + +/*Constans for 24 bits or less (8 decimal digits)*/ +#define A0 -0.5527074855E+0 +#define B0 -0.6632718214E+1 +#define A(w) (A0) +#define B(w) (w+B0) + +#define C0 0.70710678118654752440 +#define C1 0.693359375 /*355.0/512.0*/ +#define C2 -2.121944400546905827679E-4 + +float logf(const float x) _MATH_REENTRANT +{ + float Rz; + float f, z, w, znum, zden, xn; + FS_STATIC int n; + + if (x<=0.0) + { + errno=EDOM; + return 0.0; + } + f=frexpf(x, &n); + znum=f-0.5; + if (f>C0) + { + znum-=0.5; + zden=(f*0.5)+0.5; + } + else + { + n--; + zden=znum*0.5+0.5; + } + z=znum/zden; + w=z*z; + + Rz=z+z*(w*A(w)/B(w)); + xn=n; + return ((xn*C2+Rz)+xn*C1); +} diff --git a/device/lib/pic/libm/modff.c b/device/lib/pic/libm/modff.c new file mode 100644 index 0000000..896357f --- /dev/null +++ b/device/lib/pic/libm/modff.c @@ -0,0 +1,31 @@ +/* modff.c: Returns both the integer and fraction of a float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: modff.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +float modff(float x, float * y) +{ + *y=((int)x); + return (x-*y); +} diff --git a/device/lib/pic/libm/powf.c b/device/lib/pic/libm/powf.c new file mode 100644 index 0000000..c6527bb --- /dev/null +++ b/device/lib/pic/libm/powf.c @@ -0,0 +1,35 @@ +/* powf.c: Computes x**y where x and y are 32-bit floats. + WARNING: less that 6 digits accuracy. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: powf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include +#include + +float powf(const float x, const float y) +{ + if(y == 0.0) return 1.0; + if(y==1.0) return x; + if(x <= 0.0) return 0.0; + return expf(logf(x) * y); +} diff --git a/device/lib/pic/libm/sincosf.c b/device/lib/pic/libm/sincosf.c new file mode 100644 index 0000000..31f297f --- /dev/null +++ b/device/lib/pic/libm/sincosf.c @@ -0,0 +1,90 @@ +/* sincosf.c: Computes sin or cos of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: sincosf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include +#include + +#define r1 (-0.1666665668E+0) +#define r2 (0.8333025139E-2) +#define r3 (-0.1980741872E-3) +#define r4 (0.2601903036E-5) + +/* PI=C1+C2 */ +#define C1 3.140625 +#define C2 9.676535897E-4 + +/*A reasonable value for YMAX is the int part of PI*B**(t/2)=3.1416*2**(12)*/ +#define YMAX 12867.0 + +float sincosf(float x, int iscos) +{ + float y, f, r, g, XN; + int N; + char sign; + + if(iscos) + { + y=fabsf(x)+HALF_PI; + sign=0; + } + else + { + if(x<0.0) + { y=-x; sign=1; } + else + { y=x; sign=0; } + } + + if(y>YMAX) + { + errno=ERANGE; + return 0.0; + } + + /*Round y/PI to the nearest integer*/ + N=((y*iPI)+0.5); /*y is positive*/ + + /*If N is odd change sign*/ + if(N&1) sign=!sign; + + XN=N; + /*Cosine required? (is done here to keep accuracy)*/ + if(iscos) XN-=0.5; + + y=fabsf(x); + r=(int)y; + g=y-r; + f=((r-XN*C1)+g)-XN*C2; + + g=f*f; + if(g>EPS2) //Used to be if(fabsf(f)>EPS) + { + r=(((r4*g+r3)*g+r2)*g+r1)*g; + f+=f*r; + } + return (sign?-f:f); +} diff --git a/device/lib/pic/libm/sincoshf.c b/device/lib/pic/libm/sincoshf.c new file mode 100644 index 0000000..8a7cd89 --- /dev/null +++ b/device/lib/pic/libm/sincoshf.c @@ -0,0 +1,93 @@ +/* sincoshf.c: Computes sinh or cosh of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: sincoshf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include +#include + +#define P0 -0.713793159E+1 +#define P1 -0.190333999E+0 +#define Q0 -0.428277109E+2 +#define Q1 0.100000000E+1 + +#define P(z) (P1*z+P0) +#define Q(z) (Q1*z+Q0) + +#define K1 0.69316101074218750000E+0 /* ln(v) */ +#define K2 0.24999308500451499336E+0 /* v**(-2) */ +#define K3 0.13830277879601902638E-4 /* v/2-1 */ + +//WMAX is defined as ln(XMAX)-ln(v)+0.69 +#define WMAX 44.93535952E+0 +//WBAR 0.35*(b+1) +#define WBAR 1.05 +#define YBAR 9.0 /*Works for me*/ + +float sincoshf(const float x, const int iscosh) +{ + float y, w, z; + char sign; + + if (x<0.0) { y=-x; sign=1; } + else { y=x; sign=0; } + + if ((y>1.0) || iscosh) + { + if(y>YBAR) + { + w=y-K1; + if (w>WMAX) + { + errno=ERANGE; + z=XMAX; + } + else + { + z=expf(w); + z+=K3*z; + } + } + else + { + z=expf(y); + w=1.0/z; + if(!iscosh) w=-w; + z=(z+w)*0.5; + } + if(sign) z=-z; + } + else + { + if (y + +float sincosf(float x, int iscos); + +float sinf(float x) _MATH_REENTRANT +{ + if (x==0.0) return 0.0; + return sincosf(x, 0); +} diff --git a/device/lib/pic/libm/sinhf.c b/device/lib/pic/libm/sinhf.c new file mode 100644 index 0000000..69b6145 --- /dev/null +++ b/device/lib/pic/libm/sinhf.c @@ -0,0 +1,32 @@ +/* sinhf.c: Computes sinh(x) where x is a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: sinhf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +float sincoshf(const float x, const int iscosh); + +float sinhf(const float x) _MATH_REENTRANT +{ + return sincoshf(x, 0); +} diff --git a/device/lib/pic/libm/sqrtf.c b/device/lib/pic/libm/sqrtf.c new file mode 100644 index 0000000..5895768 --- /dev/null +++ b/device/lib/pic/libm/sqrtf.c @@ -0,0 +1,56 @@ +/* sqrtf.c: Computes square root of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: sqrtf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include +#include +#include + +float sqrtf(const float x) _MATH_REENTRANT +{ + float f, y; + FS_STATIC int n; + + if (x==0.0) return x; + else if (x==1.0) return 1.0; + else if (x<0.0) + { + errno=EDOM; + return 0.0; + } + f=frexpf(x, &n); + y=0.41731+0.59016*f; /*Educated guess*/ + /*For a 24 bit mantisa (float), two iterations are sufficient*/ + y+=f/y; + y=ldexpf(y, -2) + f/y; /*Faster version of 0.25 * y + f/y*/ + + if (n&1) + { + y*=0.7071067812; + ++n; + } + return ldexpf(y, n/2); +} diff --git a/device/lib/pic/libm/tancotf.c b/device/lib/pic/libm/tancotf.c new file mode 100644 index 0000000..0765fa9 --- /dev/null +++ b/device/lib/pic/libm/tancotf.c @@ -0,0 +1,89 @@ +/* tancotf.c: Computes tan or cot of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: tancotf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include +#include + +#define P0 0.100000000E+1 +#define P1 -0.958017723E-1 +#define Q0 0.100000000E+1 +#define Q1 -0.429135777E+0 +#define Q2 0.971685835E-2 + +#define C1 1.5703125 +#define C2 4.83826794897E-4 + +#define P(f,g) (P1*g*f+f) +#define Q(g) ((Q2*g+Q1)*g+Q0) + +//A reasonable choice for YMAX is the integer part of B**(t/2)*PI/2: +#define YMAX 6433.0 + +float tancotf(const float x, const int iscotan) +{ + float f, g, xn, xnum, xden; + int n; + + if (fabsf(x) > YMAX) + { + errno = ERANGE; + return 0.0; + } + + /*Round x*2*PI to the nearest integer*/ + n=(x*TWO_O_PI+(x>0.0?0.5:-0.5)); /*works for +-x*/ + xn=n; + + xnum=(int)x; + xden=x-xnum; + f=((xnum-xn*C1)+xden)-xn*C2; + + if (fabsf(f) < EPS) + { + xnum = f; + xden = 1.0; + } + else + { + g = f*f; + xnum = P(f,g); + xden = Q(g); + } + + if(n&1) + //xn is odd + { + if(iscotan) return (-xnum/xden); + else return (-xden/xnum); + } + else + { + if(iscotan) return (xden/xnum); + else return (xnum/xden); + } +} + diff --git a/device/lib/pic/libm/tanf.c b/device/lib/pic/libm/tanf.c new file mode 100644 index 0000000..1b548f4 --- /dev/null +++ b/device/lib/pic/libm/tanf.c @@ -0,0 +1,33 @@ +/* tanf.c: Computes tan(x) where x is a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: tanf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +float tancotf(const float x, const int iscot); + +float tanf(const float x) _MATH_REENTRANT +{ + return tancotf(x, 0); +} + diff --git a/device/lib/pic/libm/tanhf.c b/device/lib/pic/libm/tanhf.c new file mode 100644 index 0000000..6950ac9 --- /dev/null +++ b/device/lib/pic/libm/tanhf.c @@ -0,0 +1,64 @@ +/* tanhf.c: Computes tanh(x) where x is a 32-bit float as outlined in [1]. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: tanhf.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include +#include + +#define P0 -0.8237728127E+0 +#define P1 -0.3831010665E-2 +#define Q0 0.2471319654E+1 +#define Q1 0.1000000000E+1 + +/* ln(3)/2 */ +#define K1 0.5493061443E+0 +/* SBIG=[ln(2)+(t+1)*ln(B)]/2 */ +#define SBIG 9.01091 + +#define P(g) ((P1*g+P0)*g) +#define Q(g) (Q1*g+Q0) + +float tanhf(const float x) _MATH_REENTRANT +{ + float f, g, r; + + f=fabsf(x); + if(f>SBIG) r=1.0; + else if(f>K1) + { + r=0.5-1.0/(expf(f+f)+1.0); + r+=r; + } + else if(f (2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307 USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: _divschar.c 4148 2006-05-01 20:47:12Z tecodev $ + ------------------------------------------------------------------------ */ + +extern unsigned char _divuchar (unsigned char a, unsigned char b); + +signed char +_divschar (signed char a, signed char b) +{ + if (a < 0) { + /* a < 0 */ + if (b < 0) + return _divuchar ((unsigned int)-a, (unsigned int)-b); + else + return -_divuchar ((unsigned int)-a, (unsigned int)b); + } else { + /* a >= 0 */ + if (b < 0) + return -_divuchar ((unsigned int)a, (unsigned int)-b); + else + return _divuchar ((unsigned int)a, (unsigned int)b); + } + /* we never reach here */ +} + diff --git a/device/lib/pic/libsdcc/_divsint.c b/device/lib/pic/libsdcc/_divsint.c new file mode 100644 index 0000000..810963d --- /dev/null +++ b/device/lib/pic/libsdcc/_divsint.c @@ -0,0 +1,48 @@ +/* --------------------------------------------------------------------------- + _divsint.c : 16 bit division routines for pic14 devices + + Written By Raphael Neider (2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307 USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: _divsint.c 4148 2006-05-01 20:47:12Z tecodev $ + ------------------------------------------------------------------------ */ + +extern unsigned int _divuint (unsigned int a, unsigned int b); + +int +_divsint (int a, int b) +{ + if (a < 0) { + /* a < 0 */ + if (b < 0) + return _divuint ((unsigned int)-a, (unsigned int)-b); + else + return -_divuint ((unsigned int)-a, (unsigned int)b); + } else { + /* a >= 0 */ + if (b < 0) + return -_divuint ((unsigned int)a, (unsigned int)-b); + else + return _divuint ((unsigned int)a, (unsigned int)b); + } + /* we never reach here */ +} + diff --git a/device/lib/pic/libsdcc/_divslong.c b/device/lib/pic/libsdcc/_divslong.c new file mode 100644 index 0000000..4ffccf9 --- /dev/null +++ b/device/lib/pic/libsdcc/_divslong.c @@ -0,0 +1,48 @@ +/* --------------------------------------------------------------------------- + _divslong.c : 32 bit division routines for pic14 devices + + Written By Raphael Neider (2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307 USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: _divslong.c 4148 2006-05-01 20:47:12Z tecodev $ + ------------------------------------------------------------------------ */ + +extern unsigned long _divulong (unsigned long a, unsigned long b); + +long +_divslong (long a, long b) +{ + if (a < 0) { + /* a < 0 */ + if (b < 0) + return _divulong ((unsigned long)-a, (unsigned long)-b); + else + return -_divulong ((unsigned long)-a, (unsigned long)b); + } else { + /* a >= 0 */ + if (b < 0) + return -_divulong ((unsigned long)a, (unsigned long)-b); + else + return _divulong ((unsigned long)a, (unsigned long)b); + } + /* we never reach here */ +} + diff --git a/device/lib/pic/libsdcc/_divuchar.c b/device/lib/pic/libsdcc/_divuchar.c new file mode 100644 index 0000000..80ee3ae --- /dev/null +++ b/device/lib/pic/libsdcc/_divuchar.c @@ -0,0 +1,57 @@ +/* --------------------------------------------------------------------------- + _divuchar.c : 8 bit division routines for pic14 devices + + Written By Raphael Neider (2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307 USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: _divuchar.c 4148 2006-05-01 20:47:12Z tecodev $ + ------------------------------------------------------------------------ */ + +unsigned char +_divuchar (unsigned char a, unsigned char b) +{ + unsigned char result = 0; + unsigned char mask = 0x01; + + /* prevent endless loop (division by zero exception?!?) */ + if (!b) return (unsigned char)-1; + + /* it would suffice to make b >= a, but that test is + * more complex and will fail if a has its MSB set */ + while (!(b & (1UL << (8*sizeof(unsigned char)-1)))) { + b <<= 1; + mask <<= 1; + } // while + + /* now add up the powers of two (of b) that "fit" into a */ + /* we might stop if (a == 0), but that's an additional test in every iteration... */ + while (mask) { + if (a >= b) { + result += mask; + a -= b; + } // if + b >>= 1; + mask >>= 1; + } // while + + return result; +} + diff --git a/device/lib/pic/libsdcc/_divuint.c b/device/lib/pic/libsdcc/_divuint.c new file mode 100644 index 0000000..3cd71a0 --- /dev/null +++ b/device/lib/pic/libsdcc/_divuint.c @@ -0,0 +1,57 @@ +/* --------------------------------------------------------------------------- + _divuint.c : 16 bit division routines for pic14 devices + + Written By Raphael Neider (2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307 USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: _divuint.c 4148 2006-05-01 20:47:12Z tecodev $ + ------------------------------------------------------------------------ */ + +unsigned int +_divuint (unsigned int a, unsigned int b) +{ + unsigned int result = 0; + unsigned int mask = 0x01; + + /* prevent endless loop (division by zero exception?!?) */ + if (!b) return (unsigned int)-1; + + /* it would suffice to make b >= a, but that test is + * more complex and will fail if a has its MSB set */ + while (!(b & (1UL << (8*sizeof(unsigned int)-1)))) { + b <<= 1; + mask <<= 1; + } // while + + /* now add up the powers of two (of b) that "fit" into a */ + /* we might stop if (a == 0), but that's an additional test in every iteration... */ + while (mask) { + if (a >= b) { + result += mask; + a -= b; + } // if + b >>= 1; + mask >>= 1; + } // while + + return result; +} + diff --git a/device/lib/pic/libsdcc/_divulong.c b/device/lib/pic/libsdcc/_divulong.c new file mode 100644 index 0000000..475d636 --- /dev/null +++ b/device/lib/pic/libsdcc/_divulong.c @@ -0,0 +1,57 @@ +/* --------------------------------------------------------------------------- + _divulong.c : 32 bit division routines for pic14 devices + + Written By Raphael Neider (2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307 USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: _divulong.c 4148 2006-05-01 20:47:12Z tecodev $ + ------------------------------------------------------------------------ */ + +unsigned long +_divulong (unsigned long a, unsigned long b) +{ + unsigned long result = 0; + unsigned long mask = 0x01; + + /* prevent endless loop (division by zero exception?!?) */ + if (!b) return (unsigned long)-1; + + /* it would suffice to make b >= a, but that test is + * more complex and will fail if a has its MSB set */ + while (!(b & (1UL << (8*sizeof(unsigned long)-1)))) { + b <<= 1; + mask <<= 1; + } // while + + /* now add up the powers of two (of b) that "fit" into a */ + /* we might stop if (a == 0), but that's an additional test in every iteration... */ + while (mask) { + if (a >= b) { + result += mask; + a -= b; + } // if + b >>= 1; + mask >>= 1; + } // while + + return result; +} + diff --git a/device/lib/pic/libsdcc/_gptrget1.S b/device/lib/pic/libsdcc/_gptrget1.S new file mode 100644 index 0000000..cc5faf8 --- /dev/null +++ b/device/lib/pic/libsdcc/_gptrget1.S @@ -0,0 +1,72 @@ +; ------------------------------------------------------------------------- +; _gptrget1.S - read one byte pointed to by a generic pointer +; +; Written By Raphael Neider (2005) +; +; This library is free software; you can redistribute it and/or +; modify it under the terms of the GNU Library General Public +; License as published by the Free Software Foundation; either +; version 2 of the License, or (at your option) any later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public +; License along with this library; if not, write to the +; Free Software Foundation, Inc., 59 Temple Place - Suite 330, +; Boston, MA 02111-1307 USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; +; $Id: _gptrget1.S 4148 2006-05-01 20:47:12Z tecodev $ +; ------------------------------------------------------------------------ + +; calling conventions: +; 3 byte generic pointer is passed in via (WREG STK00 STK01). +; The result is returned in (WREG (STK00 (STK01 (STK02)))). +; +; unsigned char _gptrget (void *gptr); +; unsigned char _gptrget1 (void *gptr); +; unsigned int _gptrget2 (void *gptr); +; void * _gptrget3 (void *gptr); +; unsigned long _gptrget4 (void *gptr); +; +; void _gptrput (void *ptr, unsigned char val); +; void _gptrput1 (void *ptr, unsigned char val); +; void _gptrput2 (void *ptr, unsigned int val); +; void _gptrput3 (void *ptr, unsigned int val); +; void _gptrput4 (void *ptr, unsigned long val); + +include macros.inc +include p16f_common.inc + + global __gptrget + global __gptrget1 + global __codeptrget1 + + CODE + +__gptrget: +__gptrget1: + select_routine __dataptrget1, __codeptrget1 + ; invalid tag -- return 0x00 + retlw 0x00 + +__dataptrget1: + setup_fsr + movf _INDF, W + return + +__codeptrget1: + ; call the RETLW instruction at the given address + movf STK00, W + movwf _PCLATH + movf STK01, W + movwf _PCL + return ; should never be executed... + + END diff --git a/device/lib/pic/libsdcc/_gptrget2.S b/device/lib/pic/libsdcc/_gptrget2.S new file mode 100644 index 0000000..87bfc9b --- /dev/null +++ b/device/lib/pic/libsdcc/_gptrget2.S @@ -0,0 +1,81 @@ +; ------------------------------------------------------------------------- +; _gptrget2.S - read two bytes pointed to by a generic pointer +; +; Written By Raphael Neider (2005) +; +; This library is free software; you can redistribute it and/or +; modify it under the terms of the GNU Library General Public +; License as published by the Free Software Foundation; either +; version 2 of the License, or (at your option) any later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public +; License along with this library; if not, write to the +; Free Software Foundation, Inc., 59 Temple Place - Suite 330, +; Boston, MA 02111-1307 USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; +; $Id: _gptrget2.S 4148 2006-05-01 20:47:12Z tecodev $ +; ------------------------------------------------------------------------ + +; calling conventions: +; 3 byte generic pointer is passed in via (WREG STK00 STK01). +; The result is returned in (WREG (STK00 (STK01 (STK02)))). +; +; unsigned char _gptrget (void *gptr); +; unsigned char _gptrget1 (void *gptr); +; unsigned int _gptrget2 (void *gptr); +; void * _gptrget3 (void *gptr); +; unsigned long _gptrget4 (void *gptr); +; +; void _gptrput (void *ptr, unsigned char val); +; void _gptrput1 (void *ptr, unsigned char val); +; void _gptrput2 (void *ptr, unsigned int val); +; void _gptrput3 (void *ptr, unsigned int val); +; void _gptrput4 (void *ptr, unsigned long val); + +include macros.inc +include p16f_common.inc + + global __gptrget2 + extern __codeptrget1 + + CODE + +__gptrget2: + select_routine __dataptrget2, __codeptrget2 + ; invalid tag -- return 0x0000 + clrf STK00 + retlw 0x00 + +__dataptrget2: + setup_fsr + movf _INDF, W + movwf STK00 ; low byte in STK00 + inc_fsr + movf _INDF, W ; high byte in WREG + return + +__codeptrget2: + pagesel __codeptrget1 ; might reside in different page + call __codeptrget1 + movwf STK02 ; temporarily store LSB + incfsz STK01,F ; increment low address byte + decf STK00,F ; undo increment of high address byte if low byte did not overflow + incf STK00,F ; increment high address byte + pagesel __codeptrget1 ; might reside in different page + call __codeptrget1 + movwf STK03 ; temporarily store MSB + movf STK02, W + movwf STK00 ; LSB in STK00 + movf STK03, W ; MSB in WREG + return + + END diff --git a/device/lib/pic/libsdcc/_gptrget3.S b/device/lib/pic/libsdcc/_gptrget3.S new file mode 100644 index 0000000..4d3ca6b --- /dev/null +++ b/device/lib/pic/libsdcc/_gptrget3.S @@ -0,0 +1,93 @@ +; ------------------------------------------------------------------------- +; _gptrget3.S - read three bytes pointed to by a generic pointer +; +; Written By Raphael Neider (2005) +; +; This library is free software; you can redistribute it and/or +; modify it under the terms of the GNU Library General Public +; License as published by the Free Software Foundation; either +; version 2 of the License, or (at your option) any later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public +; License along with this library; if not, write to the +; Free Software Foundation, Inc., 59 Temple Place - Suite 330, +; Boston, MA 02111-1307 USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; +; $Id: _gptrget3.S 4148 2006-05-01 20:47:12Z tecodev $ +; ------------------------------------------------------------------------ + +; calling conventions: +; 3 byte generic pointer is passed in via (WREG STK00 STK01). +; The result is returned in (WREG (STK00 (STK01 (STK02)))). +; +; unsigned char _gptrget (void *gptr); +; unsigned char _gptrget1 (void *gptr); +; unsigned int _gptrget2 (void *gptr); +; void * _gptrget3 (void *gptr); +; unsigned long _gptrget4 (void *gptr); +; +; void _gptrput (void *ptr, unsigned char val); +; void _gptrput1 (void *ptr, unsigned char val); +; void _gptrput2 (void *ptr, unsigned int val); +; void _gptrput3 (void *ptr, unsigned int val); +; void _gptrput4 (void *ptr, unsigned long val); + +include macros.inc +include p16f_common.inc + + global __gptrget3 + extern __codeptrget1 + + CODE + +__gptrget3: + select_routine __dataptrget3, __codeptrget3 + ; invalid tag -- return 0x000000 + clrf STK01 + clrf STK00 + retlw 0x00 + +__dataptrget3: + setup_fsr + movf _INDF, W + movwf STK01 ; LSB in STK01 + inc_fsr + movf _INDF, W + movwf STK00 ; 2nd byte in STK00 + inc_fsr + movf _INDF, W ; MSB in WREG + return + +__codeptrget3: + pagesel __codeptrget1 ; might reside in different page + call __codeptrget1 + movwf STK02 ; temporarily store LSB + incfsz STK01,F ; increment low address byte + decf STK00,F ; undo increment of high address byte if low byte did not overflow + incf STK00,F ; increment high address byte + pagesel __codeptrget1 ; might reside in different page + call __codeptrget1 + movwf STK03 ; temporarily store 2nd byte + incfsz STK01,F ; increment low address byte + decf STK00,F ; undo increment of high address byte if low byte did not overflow + incf STK00,F ; increment high address byte + pagesel __codeptrget1 ; might reside in different page + call __codeptrget1 + movwf STK04 ; temporarily store MSB + movf STK02, W + movwf STK01 ; LSB in STK01 + movf STK03, W + movwf STK00 ; 2nd byte in STK00 + movf STK04, W ; MSB in WREG + return + + END diff --git a/device/lib/pic/libsdcc/_gptrget4.S b/device/lib/pic/libsdcc/_gptrget4.S new file mode 100644 index 0000000..2d49048 --- /dev/null +++ b/device/lib/pic/libsdcc/_gptrget4.S @@ -0,0 +1,105 @@ +; ------------------------------------------------------------------------- +; _gptrget4.S - read four bytes pointed to by a generic pointer +; +; Written By Raphael Neider (2005) +; +; This library is free software; you can redistribute it and/or +; modify it under the terms of the GNU Library General Public +; License as published by the Free Software Foundation; either +; version 2 of the License, or (at your option) any later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public +; License along with this library; if not, write to the +; Free Software Foundation, Inc., 59 Temple Place - Suite 330, +; Boston, MA 02111-1307 USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; +; $Id: _gptrget4.S 4148 2006-05-01 20:47:12Z tecodev $ +; ------------------------------------------------------------------------ + +; calling conventions: +; 3 byte generic pointer is passed in via (WREG STK00 STK01). +; The result is returned in (WREG (STK00 (STK01 (STK02)))). +; +; unsigned char _gptrget (void *gptr); +; unsigned char _gptrget1 (void *gptr); +; unsigned int _gptrget2 (void *gptr); +; void * _gptrget3 (void *gptr); +; unsigned long _gptrget4 (void *gptr); +; +; void _gptrput (void *ptr, unsigned char val); +; void _gptrput1 (void *ptr, unsigned char val); +; void _gptrput2 (void *ptr, unsigned int val); +; void _gptrput3 (void *ptr, unsigned int val); +; void _gptrput4 (void *ptr, unsigned long val); + +include macros.inc +include p16f_common.inc + + global __gptrget4 + extern __codeptrget1 + + CODE + +__gptrget4: + select_routine __dataptrget4, __codeptrget4 + ; invalid tag -- return 0x00000000 + clrf STK02 + clrf STK01 + clrf STK00 + retlw 0x00 + +__dataptrget4: + setup_fsr + movf _INDF, W + movwf STK02 ; LSB in STK02 + inc_fsr + movf _INDF, W + movwf STK01 ; 2nd byte in STK01 + inc_fsr + movf _INDF, W + movwf STK00 ; 3rd byte in STK00 + inc_fsr + movf _INDF, W ; MSB in WREG + return + +__codeptrget4: + pagesel __codeptrget1 ; might reside in different page + call __codeptrget1 + movwf STK02 ; temporarily store LSB + incfsz STK01,F ; increment low address byte + decf STK00,F ; undo increment of high address byte if low byte did not overflow + incf STK00,F ; increment high address byte + pagesel __codeptrget1 ; might reside in different page + call __codeptrget1 + movwf STK03 ; temporarily store 2nd byte + incfsz STK01,F ; increment low address byte + decf STK00,F ; undo increment of high address byte if low byte did not overflow + incf STK00,F ; increment high address byte + pagesel __codeptrget1 ; might reside in different page + call __codeptrget1 + movwf STK04 ; temporarily store 3rd byte + incfsz STK01,F ; increment low address byte + decf STK00,F ; undo increment of high address byte if low byte did not overflow + incf STK00,F ; increment high address byte + pagesel __codeptrget1 ; might reside in different page + call __codeptrget1 + movwf STK05 ; temporarily store MSB + movf STK02, W + movwf STK02 ; LSB in STK02 + movf STK03, W + movwf STK01 ; 2nd byte in STK01 + movf STK04, W + movwf STK00 ; 3rd byte in STK00 + movf STK05, W ; MSB in WREG + return + + END diff --git a/device/lib/pic/libsdcc/_gptrput1.S b/device/lib/pic/libsdcc/_gptrput1.S new file mode 100644 index 0000000..55d146c --- /dev/null +++ b/device/lib/pic/libsdcc/_gptrput1.S @@ -0,0 +1,64 @@ +; ------------------------------------------------------------------------- +; _gptrput1.S : write one byte pointed to by a generic pointer +; +; Written By Raphael Neider (2005) +; +; This library is free software; you can redistribute it and/or +; modify it under the terms of the GNU Library General Public +; License as published by the Free Software Foundation; either +; version 2 of the License, or (at your option) any later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public +; License along with this library; if not, write to the +; Free Software Foundation, Inc., 59 Temple Place - Suite 330, +; Boston, MA 02111-1307 USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; +; $Id: _gptrput1.S 4148 2006-05-01 20:47:12Z tecodev $ +; ------------------------------------------------------------------------ + +; calling conventions: +; 3 byte generic pointer is passed in via (WREG STK00 STK01). +; The result is returned in (WREG (STK00 (STK01 (STK02)))). +; +; unsigned char _gptrget (void *gptr); +; unsigned char _gptrget1 (void *gptr); +; unsigned int _gptrget2 (void *gptr); +; void * _gptrget3 (void *gptr); +; unsigned long _gptrget4 (void *gptr); +; +; void _gptrput (void *ptr, unsigned char val); +; void _gptrput1 (void *ptr, unsigned char val); +; void _gptrput2 (void *ptr, unsigned int val); +; void _gptrput3 (void *ptr, unsigned int val); +; void _gptrput4 (void *ptr, unsigned long val); + +include macros.inc +include p16f_common.inc + + global __gptrput + global __gptrput1 + + CODE + +__gptrput: +__gptrput1: + check_data __dataptrput1 + ; cannot write to __code space + return + +__dataptrput1: + setup_fsr + movf STK02, W ; get LSB(val) + movwf _INDF ; store LSB + return + + END diff --git a/device/lib/pic/libsdcc/_gptrput2.S b/device/lib/pic/libsdcc/_gptrput2.S new file mode 100644 index 0000000..b793260 --- /dev/null +++ b/device/lib/pic/libsdcc/_gptrput2.S @@ -0,0 +1,65 @@ +; ------------------------------------------------------------------------- +; _gptrput2.S : write two bytes pointed to by a generic pointer +; +; Written By Raphael Neider (2005) +; +; This library is free software; you can redistribute it and/or +; modify it under the terms of the GNU Library General Public +; License as published by the Free Software Foundation; either +; version 2 of the License, or (at your option) any later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public +; License along with this library; if not, write to the +; Free Software Foundation, Inc., 59 Temple Place - Suite 330, +; Boston, MA 02111-1307 USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; +; $Id: _gptrput2.S 4148 2006-05-01 20:47:12Z tecodev $ +; ------------------------------------------------------------------------ + +; calling conventions: +; 3 byte generic pointer is passed in via (WREG STK00 STK01). +; The result is returned in (WREG (STK00 (STK01 (STK02)))). +; +; unsigned char _gptrget (void *gptr); +; unsigned char _gptrget1 (void *gptr); +; unsigned int _gptrget2 (void *gptr); +; void * _gptrget3 (void *gptr); +; unsigned long _gptrget4 (void *gptr); +; +; void _gptrput (void *ptr, unsigned char val); +; void _gptrput1 (void *ptr, unsigned char val); +; void _gptrput2 (void *ptr, unsigned int val); +; void _gptrput3 (void *ptr, unsigned int val); +; void _gptrput4 (void *ptr, unsigned long val); + +include macros.inc +include p16f_common.inc + + global __gptrput2 + + CODE + +__gptrput2: + check_data __dataptrput2 + ; cannot write to __code space + return + +__dataptrput2: + setup_fsr + movf STK03, W ; get LSB(val) + movwf _INDF + inc_fsr + movf STK02, W ; get MSB(val) + movwf _INDF + return + + END diff --git a/device/lib/pic/libsdcc/_gptrput3.S b/device/lib/pic/libsdcc/_gptrput3.S new file mode 100644 index 0000000..d1f0866 --- /dev/null +++ b/device/lib/pic/libsdcc/_gptrput3.S @@ -0,0 +1,68 @@ +; ------------------------------------------------------------------------- +; _gptrput3.S : write three bytes pointed to by a generic pointer +; +; Written By Raphael Neider (2005) +; +; This library is free software; you can redistribute it and/or +; modify it under the terms of the GNU Library General Public +; License as published by the Free Software Foundation; either +; version 2 of the License, or (at your option) any later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public +; License along with this library; if not, write to the +; Free Software Foundation, Inc., 59 Temple Place - Suite 330, +; Boston, MA 02111-1307 USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; +; $Id: _gptrput3.S 4148 2006-05-01 20:47:12Z tecodev $ +; ------------------------------------------------------------------------ + +; calling conventions: +; 3 byte generic pointer is passed in via (WREG STK00 STK01). +; The result is returned in (WREG (STK00 (STK01 (STK02)))). +; +; unsigned char _gptrget (void *gptr); +; unsigned char _gptrget1 (void *gptr); +; unsigned int _gptrget2 (void *gptr); +; void * _gptrget3 (void *gptr); +; unsigned long _gptrget4 (void *gptr); +; +; void _gptrput (void *ptr, unsigned char val); +; void _gptrput1 (void *ptr, unsigned char val); +; void _gptrput2 (void *ptr, unsigned int val); +; void _gptrput3 (void *ptr, unsigned int val); +; void _gptrput4 (void *ptr, unsigned long val); + +include macros.inc +include p16f_common.inc + + global __gptrput3 + + CODE + +__gptrput3: + check_data __dataptrput3 + ; cannot write to __code space + return + +__dataptrput3: + setup_fsr + movf STK04, W ; get LSB(val) + movwf _INDF + inc_fsr + movf STK03, W ; get 2nd byte of val + movwf _INDF + inc_fsr + movf STK02, W ; get MSB(val) + movwf _INDF + return + + END diff --git a/device/lib/pic/libsdcc/_gptrput4.S b/device/lib/pic/libsdcc/_gptrput4.S new file mode 100644 index 0000000..1bb3ff8 --- /dev/null +++ b/device/lib/pic/libsdcc/_gptrput4.S @@ -0,0 +1,71 @@ +; ------------------------------------------------------------------------- +; _gptrput4.S : write four bytes pointed to by a generic pointer +; +; Written By Raphael Neider (2005) +; +; This library is free software; you can redistribute it and/or +; modify it under the terms of the GNU Library General Public +; License as published by the Free Software Foundation; either +; version 2 of the License, or (at your option) any later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; Library General Public License for more details. +; +; You should have received a copy of the GNU Library General Public +; License along with this library; if not, write to the +; Free Software Foundation, Inc., 59 Temple Place - Suite 330, +; Boston, MA 02111-1307 USA. +; +; In other words, you are welcome to use, share and improve this program. +; You are forbidden to forbid anyone else to use, share and improve +; what you give them. Help stamp out software-hoarding! +; +; $Id: _gptrput4.S 4148 2006-05-01 20:47:12Z tecodev $ +; ------------------------------------------------------------------------ + +; calling conventions: +; 3 byte generic pointer is passed in via (WREG STK00 STK01). +; The result is returned in (WREG (STK00 (STK01 (STK02)))). +; +; unsigned char _gptrget (void *gptr); +; unsigned char _gptrget1 (void *gptr); +; unsigned int _gptrget2 (void *gptr); +; void * _gptrget3 (void *gptr); +; unsigned long _gptrget4 (void *gptr); +; +; void _gptrput (void *ptr, unsigned char val); +; void _gptrput1 (void *ptr, unsigned char val); +; void _gptrput2 (void *ptr, unsigned int val); +; void _gptrput3 (void *ptr, unsigned int val); +; void _gptrput4 (void *ptr, unsigned long val); + +include macros.inc +include p16f_common.inc + + global __gptrput4 + + CODE + +__gptrput4: + check_data __dataptrput4 + ; cannot write to __code space + return + +__dataptrput4: + setup_fsr + movf STK05, W ; get LSB(val) + movwf _INDF + inc_fsr + movf STK04, W ; get 2nd byte of val + movwf _INDF + inc_fsr + movf STK03, W ; get 3rd byte of val + movwf _INDF + inc_fsr + movf STK02, W ; get MSB(val) + movwf _INDF + return + + END diff --git a/device/lib/pic/libsdcc/_modschar.c b/device/lib/pic/libsdcc/_modschar.c new file mode 100644 index 0000000..5c55d55 --- /dev/null +++ b/device/lib/pic/libsdcc/_modschar.c @@ -0,0 +1,48 @@ +/* --------------------------------------------------------------------------- + _modschar.c : 8 bit modulus routines for pic14 devices + + Written By Raphael Neider (2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307 USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: _modschar.c 4148 2006-05-01 20:47:12Z tecodev $ + ------------------------------------------------------------------------ */ + +extern unsigned char _moduchar (unsigned char a, unsigned char b); + +signed char +_modschar (signed char a, signed char b) +{ + if (a < 0) { + /* a < 0 */ + if (b < 0) + return _moduchar ((unsigned int)-a, (unsigned int)-b); + else + return -_moduchar ((unsigned int)-a, (unsigned int)b); + } else { + /* a >= 0 */ + if (b < 0) + return -_moduchar ((unsigned int)a, (unsigned int)-b); + else + return _moduchar ((unsigned int)a, (unsigned int)b); + } + /* we never reach here */ +} + diff --git a/device/lib/pic/libsdcc/_modsint.c b/device/lib/pic/libsdcc/_modsint.c new file mode 100644 index 0000000..bf26ee6 --- /dev/null +++ b/device/lib/pic/libsdcc/_modsint.c @@ -0,0 +1,46 @@ +/* --------------------------------------------------------------------------- + _modsint.c : 16 bit modulus routines for pic14 devices + + Written By Raphael Neider (2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307 USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: _modsint.c 4148 2006-05-01 20:47:12Z tecodev $ + ------------------------------------------------------------------------ */ + +extern unsigned int _moduint (unsigned int a, unsigned int b); + +int +_modsint (int a, int b) +{ + if (a < 0) { + if (b < 0) + return _moduint ((unsigned int)-a, (unsigned int)-b); + else + return _moduint ((unsigned int)-a, (unsigned int)b); + } else { + if (b < 0) + return _moduint ((unsigned int)a, (unsigned int)-b); + else + return _moduint ((unsigned int)a, (unsigned int)b); + } + /* we never reach here */ +} + diff --git a/device/lib/pic/libsdcc/_modslong.c b/device/lib/pic/libsdcc/_modslong.c new file mode 100644 index 0000000..baa4ce6 --- /dev/null +++ b/device/lib/pic/libsdcc/_modslong.c @@ -0,0 +1,46 @@ +/* --------------------------------------------------------------------------- + _modslong.c : 32 bit modulus routines for pic14 devices + + Written By Raphael Neider (2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307 USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: _modslong.c 4148 2006-05-01 20:47:12Z tecodev $ + ------------------------------------------------------------------------ */ + +extern unsigned long _modulong (unsigned long a, unsigned long b); + +long +_modslong (long a, long b) +{ + if (a < 0) { + if (b < 0) + return _modulong ((unsigned long)-a, (unsigned long)-b); + else + return _modulong ((unsigned long)-a, (unsigned long)b); + } else { + if (b < 0) + return _modulong ((unsigned long)a, (unsigned long)-b); + else + return _modulong ((unsigned long)a, (unsigned long)b); + } + /* we never reach here */ +} + diff --git a/device/lib/pic/libsdcc/_moduchar.c b/device/lib/pic/libsdcc/_moduchar.c new file mode 100644 index 0000000..257f1bb --- /dev/null +++ b/device/lib/pic/libsdcc/_moduchar.c @@ -0,0 +1,54 @@ +/* --------------------------------------------------------------------------- + _moduchar.c : 8 bit modulus routines for pic14 devices + + Written By Raphael Neider (2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307 USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: _moduchar.c 4148 2006-05-01 20:47:12Z tecodev $ + ------------------------------------------------------------------------ */ + +unsigned char +_moduchar (unsigned char a, unsigned char b) +{ + unsigned char count = 1; + + /* prevent endless loop (division by zero exception?!?) */ + if (!b) return (unsigned char)-1; + + /* it would suffice to make b >= a, but that test is + * more complex and will fail if a has its MSB set */ + while (!(b & (1UL << (8*sizeof(unsigned char)-1)))) { + b <<= 1; + ++count; + } // while + + /* now subtract all the powers of two (of b) that "fit" into a */ + while (count) { + if (a >= b) { + a -= b; + } // if + b >>= 1; + --count; + } // while + + return a; +} + diff --git a/device/lib/pic/libsdcc/_moduint.c b/device/lib/pic/libsdcc/_moduint.c new file mode 100644 index 0000000..e4fc307 --- /dev/null +++ b/device/lib/pic/libsdcc/_moduint.c @@ -0,0 +1,54 @@ +/* --------------------------------------------------------------------------- + _moduint.c : 16 bit modulus routines for pic14 devices + + Written By Raphael Neider (2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307 USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: _moduint.c 4148 2006-05-01 20:47:12Z tecodev $ + ------------------------------------------------------------------------ */ + +unsigned int +_moduint (unsigned int a, unsigned int b) +{ + unsigned char count = 1; + + /* prevent endless loop (division by zero exception?!?) */ + if (!b) return (unsigned int)-1; + + /* it would suffice to make b >= a, but that test is + * more complex and will fail if a has its MSB set */ + while (!(b & (1UL << (8*sizeof(unsigned int)-1)))) { + b <<= 1; + ++count; + } // while + + /* now subtract all the powers of two (of b) that "fit" into a */ + while (count) { + if (a >= b) { + a -= b; + } // if + b >>= 1; + --count; + } // while + + return a; +} + diff --git a/device/lib/pic/libsdcc/_modulong.c b/device/lib/pic/libsdcc/_modulong.c new file mode 100644 index 0000000..9bc9780 --- /dev/null +++ b/device/lib/pic/libsdcc/_modulong.c @@ -0,0 +1,54 @@ +/* --------------------------------------------------------------------------- + _modulong.c : 32 bit modulus routines for pic14 devices + + Written By Raphael Neider (2005) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307 USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: _modulong.c 4148 2006-05-01 20:47:12Z tecodev $ + ------------------------------------------------------------------------ */ + +unsigned long +_modulong (unsigned long a, unsigned long b) +{ + unsigned char count = 1; + + /* prevent endless loop (division by zero exception?!?) */ + if (!b) return (unsigned long)-1; + + /* it would suffice to make b >= a, but that test is + * more complex and will fail if a has its MSB set */ + while (!(b & (1UL << (8*sizeof(unsigned long)-1)))) { + b <<= 1; + ++count; + } // while + + /* now subtract all the powers of two (of b) that "fit" into a */ + while (count) { + if (a >= b) { + a -= b; + } // if + b >>= 1; + --count; + } // while + + return a; +} + diff --git a/device/lib/pic/libsdcc/_mulchar.c b/device/lib/pic/libsdcc/_mulchar.c new file mode 100644 index 0000000..8e64e10 --- /dev/null +++ b/device/lib/pic/libsdcc/_mulchar.c @@ -0,0 +1,49 @@ +/* --------------------------------------------------------------------------- + _mulchar.c : routine for 8 bit multiplication + + Written By Raphael Neider (2005) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by + the Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: _mulchar.c 4148 2006-05-01 20:47:12Z tecodev $ + ------------------------------------------------------------------------ */ + +#pragma save +#pragma disable_warning 126 /* unreachable code */ +#pragma disable_warning 116 /* left shifting more than size of object */ +char +_mulchar (char a, char b) +{ + char result = 0; + unsigned char i; + + /* check all bits in a byte */ + for (i = 0; i < 8u; i++) { + /* check all bytes in operand (generic code, optimized by the compiler) */ + if (a & (unsigned char)0x0001u) result += b; + if (sizeof (a) > 1 && (a & 0x00000100ul)) result += (b << 8u); + if (sizeof (a) > 2 && (a & 0x00010000ul)) result += (b << 16u); + if (sizeof (a) > 3 && (a & 0x01000000ul)) result += (b << 24u); + a = ((unsigned char)a) >> 1u; + b <<= 1u; + } // for i + + return result; +} +#pragma restore diff --git a/device/lib/pic/libsdcc/_mulint.c b/device/lib/pic/libsdcc/_mulint.c new file mode 100644 index 0000000..a26425e --- /dev/null +++ b/device/lib/pic/libsdcc/_mulint.c @@ -0,0 +1,49 @@ +/* --------------------------------------------------------------------------- + _mulint.c : routine for 16 bit multiplication + + Written By Raphael Neider (2005) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by + the Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: _mulint.c 4148 2006-05-01 20:47:12Z tecodev $ + ------------------------------------------------------------------------ */ + +#pragma save +#pragma disable_warning 126 /* unreachable code */ +#pragma disable_warning 116 /* left shifting more than size of object */ +int +_mulint (int a, int b) +{ + int result = 0; + unsigned char i; + + /* check all bits in a byte */ + for (i = 0; i < 8u; i++) { + /* check all bytes in operand (generic code, optimized by the compiler) */ + if (a & 0x0001u) result += b; + if (sizeof (a) > 1 && (a & 0x00000100ul)) result += (b << 8u); + if (sizeof (a) > 2 && (a & 0x00010000ul)) result += (b << 16u); + if (sizeof (a) > 3 && (a & 0x01000000ul)) result += (b << 24u); + a = ((unsigned int)a) >> 1u; + b <<= 1u; + } // for i + + return result; +} +#pragma restore diff --git a/device/lib/pic/libsdcc/_mullong.c b/device/lib/pic/libsdcc/_mullong.c new file mode 100644 index 0000000..5b840b6 --- /dev/null +++ b/device/lib/pic/libsdcc/_mullong.c @@ -0,0 +1,49 @@ +/* --------------------------------------------------------------------------- + _mullong.c : routine for 32 bit multiplication + + Written By Raphael Neider (2005) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by + the Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: _mullong.c 4148 2006-05-01 20:47:12Z tecodev $ + ------------------------------------------------------------------------ */ + +#pragma save +#pragma disable_warning 126 /* unreachable code */ +#pragma disable_warning 116 /* left shifting more than size of object */ +long +_mullong (long a, long b) +{ + long result = 0; + unsigned char i; + + /* check all bits in a byte */ + for (i = 0; i < 8u; i++) { + /* check all bytes in operand (generic code, optimized by the compiler) */ + if (a & 0x0001u) result += b; + if (sizeof (a) > 1 && (a & 0x00000100ul)) result += (b << 8u); + if (sizeof (a) > 2 && (a & 0x00010000ul)) result += (b << 16u); + if (sizeof (a) > 3 && (a & 0x01000000ul)) result += (b << 24u); + a = ((unsigned long)a) >> 1u; + b <<= 1u; + } // for i + + return result; +} +#pragma restore diff --git a/device/lib/pic/libsdcc/fs2schar.c b/device/lib/pic/libsdcc/fs2schar.c new file mode 100644 index 0000000..f61b7d9 --- /dev/null +++ b/device/lib/pic/libsdcc/fs2schar.c @@ -0,0 +1,44 @@ +/*------------------------------------------------------------------------- + fs2schar.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: fs2schar.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + + +#include + +/* convert float to signed char */ +signed char __fs2schar (float f) _FS_REENTRANT +{ + signed long sl=__fs2slong(f); + if (sl>=CHAR_MAX) + return CHAR_MAX; + if (sl<=CHAR_MIN) + return -CHAR_MIN; + return sl; +} diff --git a/device/lib/pic/libsdcc/fs2sint.c b/device/lib/pic/libsdcc/fs2sint.c new file mode 100644 index 0000000..8b812ca --- /dev/null +++ b/device/lib/pic/libsdcc/fs2sint.c @@ -0,0 +1,45 @@ +/*------------------------------------------------------------------------- + fs2sint.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + + +/* +** $Id: fs2sint.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + + +#include + +/* convert float to signed int */ +signed int __fs2sint (float f) _FS_REENTRANT +{ + signed long sl=__fs2slong(f); + if (sl>=INT_MAX) + return INT_MAX; + if (sl<=INT_MIN) + return -INT_MIN; + return sl; +} diff --git a/device/lib/pic/libsdcc/fs2slong.c b/device/lib/pic/libsdcc/fs2slong.c new file mode 100644 index 0000000..e6a4f75 --- /dev/null +++ b/device/lib/pic/libsdcc/fs2slong.c @@ -0,0 +1,46 @@ +/*------------------------------------------------------------------------- + fs2slong.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: fs2slong.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +/* convert float to signed long */ +signed long __fs2slong (float f) _FS_REENTRANT +{ + + if (!f) + return 0; + + if (f<0) { + return -__fs2ulong(-f); + } else { + return __fs2ulong(f); + } +} diff --git a/device/lib/pic/libsdcc/fs2uchar.c b/device/lib/pic/libsdcc/fs2uchar.c new file mode 100644 index 0000000..b997f6b --- /dev/null +++ b/device/lib/pic/libsdcc/fs2uchar.c @@ -0,0 +1,41 @@ +/*------------------------------------------------------------------------- + fs2uchar.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: fs2uchar.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +/* convert float to unsigned char */ +unsigned char __fs2uchar (float f) _FS_REENTRANT +{ + unsigned long ul=__fs2ulong(f); + if (ul>=UCHAR_MAX) return UCHAR_MAX; + return ul; +} + diff --git a/device/lib/pic/libsdcc/fs2uint.c b/device/lib/pic/libsdcc/fs2uint.c new file mode 100644 index 0000000..8d504d7 --- /dev/null +++ b/device/lib/pic/libsdcc/fs2uint.c @@ -0,0 +1,43 @@ +/*------------------------------------------------------------------------- + fs2uint.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: fs2uint.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +unsigned long __fs2ulong (float a1); + +/* convert float to unsigned int */ +unsigned int __fs2uint (float f) _FS_REENTRANT +{ + unsigned long ul=__fs2ulong(f); + if (ul>=UINT_MAX) return UINT_MAX; + return ul; +} + diff --git a/device/lib/pic/libsdcc/fs2ulong.c b/device/lib/pic/libsdcc/fs2ulong.c new file mode 100644 index 0000000..b8d3095 --- /dev/null +++ b/device/lib/pic/libsdcc/fs2ulong.c @@ -0,0 +1,49 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fs2ulong.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long +{ + float f; + long l; +}; + +/* convert float to unsigned long */ +unsigned long __fs2ulong (float a1) _FS_REENTRANT +{ + FS_STATIC volatile union float_long fl1; + int exp; + long l; + + fl1.f = a1; + + if (!fl1.l || SIGN(fl1.l)) + return (0); + + exp = EXP (fl1.l) - EXCESS - 24; + l = MANT (fl1.l); + + l >>= -exp; + + return l; +} diff --git a/device/lib/pic/libsdcc/fsadd.c b/device/lib/pic/libsdcc/fsadd.c new file mode 100644 index 0000000..0d00b03 --- /dev/null +++ b/device/lib/pic/libsdcc/fsadd.c @@ -0,0 +1,102 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fsadd.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +union float_long + { + float f; + unsigned long l; + }; + +/* add two floats */ +float __fsadd (float a1, float a2) _FS_REENTRANT +{ + FS_STATIC volatile union float_long fl1, fl2; + unsigned long mant1, mant2; + int exp1, exp2; + unsigned long sign = 0; + + fl1.f = a1; + fl2.f = a2; + + /* check for zero args */ + if (!fl1.l) + return (fl2.f); + if (!fl2.l) + return (fl1.f); + + exp1 = EXP (fl1.l); + exp2 = EXP (fl2.l); + + if (exp1 > exp2 + 25) + return (fl1.f); + if (exp2 > exp1 + 25) + return (fl2.f); + + mant1 = MANT (fl1.l); + mant2 = MANT (fl2.l); + + if (SIGN (fl1.l)) + mant1 = -mant1; + if (SIGN (fl2.l)) + mant2 = -mant2; + + if (exp1 > exp2) + { + mant2 >>= exp1 - exp2; + } + else + { + mant1 >>= exp2 - exp1; + exp1 = exp2; + } + mant1 += mant2; + + if ((long)mant1 < 0) + { + mant1 = -mant1; + sign = SIGNBIT; + } + else if (!mant1) + return (0); + + /* normalize */ + while (mant1>= 1 ; + exp1++; + } + + /* turn off hidden bit */ + mant1 &= ~HIDDEN; + + /* pack up and go home */ + fl1.l = PACK (sign, (unsigned long) exp1, mant1); + + return (fl1.f); +} diff --git a/device/lib/pic/libsdcc/fsdiv.c b/device/lib/pic/libsdcc/fsdiv.c new file mode 100644 index 0000000..bcc4fa6 --- /dev/null +++ b/device/lib/pic/libsdcc/fsdiv.c @@ -0,0 +1,106 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fsdiv.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long + { + float f; + long l; + }; + +/* divide two floats */ +float __fsdiv (float a1, float a2) _FS_REENTRANT +{ + FS_STATIC volatile union float_long fl1, fl2; + long result; + unsigned long mask; + long mant1, mant2; + int exp ; + char sign; + + fl1.f = a1; + fl2.f = a2; + + /* subtract exponents */ + exp = EXP (fl1.l) ; + exp -= EXP (fl2.l); + exp += EXCESS; + + /* compute sign */ + sign = SIGN (fl1.l) ^ SIGN (fl2.l); + + /* divide by zero??? */ + if (!fl2.l) + {/* return NaN or -NaN */ + fl2.l = 0x7FC00000; + return (fl2.f); + } + + /* numerator zero??? */ + if (!fl1.l) + return (0); + + /* now get mantissas */ + mant1 = MANT (fl1.l); + mant2 = MANT (fl2.l); + + /* this assures we have 25 bits of precision in the end */ + if (mant1 < mant2) + { + mant1 <<= 1; + exp--; + } + + /* now we perform repeated subtraction of fl2.l from fl1.l */ + mask = 0x1000000; + result = 0; + while (mask) + { + if (mant1 >= mant2) + { + result |= mask; + mant1 -= mant2; + } + mant1 <<= 1; + mask >>= 1; + } + + /* round */ + result += 1; + + /* normalize down */ + exp++; + result >>= 1; + + result &= ~HIDDEN; + + /* pack up and go home */ + if (exp >= 0x100) + fl1.l = (sign ? SIGNBIT : 0) | 0x7F800000; + else if (exp < 0) + fl1.l = 0; + else + fl1.l = PACK (sign ? SIGNBIT : 0 , exp, result); + return (fl1.f); +} + diff --git a/device/lib/pic/libsdcc/fseq.c b/device/lib/pic/libsdcc/fseq.c new file mode 100644 index 0000000..2f8fa20 --- /dev/null +++ b/device/lib/pic/libsdcc/fseq.c @@ -0,0 +1,43 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fseq.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long + { + float f; + long l; + }; + +/* compare two floats */ +char __fseq (float a1, float a2) _FS_REENTRANT +{ + FS_STATIC volatile union float_long fl1, fl2; + + fl1.f = a1; + fl2.f = a2; + + if (fl1.l == fl2.l) + return (1); + return (0); +} + diff --git a/device/lib/pic/libsdcc/fsgt.c b/device/lib/pic/libsdcc/fsgt.c new file mode 100644 index 0000000..20b7046 --- /dev/null +++ b/device/lib/pic/libsdcc/fsgt.c @@ -0,0 +1,48 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fsgt.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long + { + float f; + long l; + }; + +/* compare two floats */ +char __fsgt (float a1, float a2) _FS_REENTRANT +{ + FS_STATIC volatile union float_long fl1, fl2; + + fl1.f = a1; + fl2.f = a2; + + if (fl1.l<0 && fl2.l<0) { + if (fl2.l > fl1.l) + return (1); + return (0); + } + + if (fl1.l > fl2.l) + return (1); + return (0); +} diff --git a/device/lib/pic/libsdcc/fslt.c b/device/lib/pic/libsdcc/fslt.c new file mode 100644 index 0000000..05dcbdd --- /dev/null +++ b/device/lib/pic/libsdcc/fslt.c @@ -0,0 +1,48 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fslt.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long + { + float f; + long l; + }; + +/* compare two floats */ +char __fslt (float a1, float a2) _FS_REENTRANT +{ + FS_STATIC volatile union float_long fl1, fl2; + + fl1.f = a1; + fl2.f = a2; + + if (fl1.l<0 && fl2.l<0) { + if (fl2.l < fl1.l) + return (1); + return (0); + } + + if (fl1.l < fl2.l) + return (1); + return (0); +} diff --git a/device/lib/pic/libsdcc/fsmul.c b/device/lib/pic/libsdcc/fsmul.c new file mode 100644 index 0000000..a2968b4 --- /dev/null +++ b/device/lib/pic/libsdcc/fsmul.c @@ -0,0 +1,86 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fsmul.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long + { + float f; + unsigned long l; + }; + +/* multiply two floats */ +float __fsmul (float a1, float a2) _FS_REENTRANT +{ + FS_STATIC volatile union float_long fl1, fl2; + unsigned long result; + int exp; + char sign; + + fl1.f = a1; + fl2.f = a2; + + if (!fl1.l || !fl2.l) + return (0); + + /* compute sign and exponent */ + sign = SIGN (fl1.l) ^ SIGN (fl2.l); + exp = EXP (fl1.l) - EXCESS; + exp += EXP (fl2.l); + + fl1.l = MANT (fl1.l); + fl2.l = MANT (fl2.l); + + /* the multiply is done as one 16x16 multiply and two 16x8 multiples */ + result = (fl1.l >> 8) * (fl2.l >> 8); + result += ((fl1.l & (unsigned long) 0xFF) * (fl2.l >> 8)) >> 8; + result += ((fl2.l & (unsigned long) 0xFF) * (fl1.l >> 8)) >> 8; + + if (0 != (result & SIGNBIT)) + { + /* round */ + result += 0x80; + result >>= 8; + } + else + { + /* round */ + result += 0x40; + result >>= 7; + exp--; + } + + result &= ~HIDDEN; + + /* pack up and go home */ + if (exp >= 0x100) + fl1.l = (sign ? SIGNBIT : 0) | 0x7F800000; + else if (exp < 0) + fl1.l = 0; + else + fl1.l = PACK (sign ? SIGNBIT : 0 , exp, result); + return (fl1.f); +} + + + + diff --git a/device/lib/pic/libsdcc/fsneq.c b/device/lib/pic/libsdcc/fsneq.c new file mode 100644 index 0000000..2315190 --- /dev/null +++ b/device/lib/pic/libsdcc/fsneq.c @@ -0,0 +1,50 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fsneq.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long + { + float f; + long l; + }; + +/* compare two floats */ +char __fsneq (float a1, float a2) _FS_REENTRANT +{ + FS_STATIC volatile union float_long fl1, fl2; + + fl1.f = a1; + fl2.f = a2; + +#if 0 + if (fl1.l<0 && fl2.l<0) + { + fl1.l ^= SIGNBIT; + fl2.l ^= SIGNBIT; + } +#endif + + if (fl1.l == fl2.l) + return (0); + return (1); +} diff --git a/device/lib/pic/libsdcc/fssub.c b/device/lib/pic/libsdcc/fssub.c new file mode 100644 index 0000000..de0d937 --- /dev/null +++ b/device/lib/pic/libsdcc/fssub.c @@ -0,0 +1,48 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fssub.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long + { + float f; + long l; + }; + +/* subtract two floats */ +float __fssub (float a1, float a2) _FS_REENTRANT +{ + FS_STATIC volatile union float_long fl1, fl2; + + fl1.f = a1; + fl2.f = a2; + + /* check for zero args */ + if (!fl2.l) + return (fl1.f); + if (!fl1.l) + return (-fl2.f); + + /* twiddle sign bit and add */ + fl2.l ^= SIGNBIT; + return fl1.f + fl2.f; +} diff --git a/device/lib/pic/libsdcc/idata.c b/device/lib/pic/libsdcc/idata.c new file mode 100644 index 0000000..3f593d0 --- /dev/null +++ b/device/lib/pic/libsdcc/idata.c @@ -0,0 +1,81 @@ +/* + * idata.c - startup code evaluating gputils' cinit structure + * + * This code fragment copies initialized data from ROM to their + * assigned RAM locations. The requierd cinit structure is created + * by gputils' linker and comprises initial values of all linked in + * modules. + * + * (c) 2007 by Raphael Neider + * + * This file is part of SDCC's pic14 library and distributed under + * the terms of the GPLv2 with linking exception; see COPYING in some + * parent directory for details. + */ + +/* + * We call the user's main() after initialization is done. + */ +extern void main(void); + +/* + * Force generation of _cinit symbol. + */ +static char force_cinit = 0; + +/* + * This struct describes one initialized variable. + */ +typedef struct { + unsigned src; // source address of data in CODE space + unsigned dst; // destination address of values in DATA space + unsigned size; // number of bytes to copy from `src' to `dst' +} cinit_t; + +/* + * This structure provides the number and position of the above + * structs. to initialize all variables in the .hex file. + */ +extern __code struct { + unsigned records; // number of entries in this file + cinit_t entry[]; // intialization descriptor +} cinit; + +/* + * Iterate over all records and copy values from ROM to RAM. + */ +void +_sdcc_gsinit_startup(void) +{ + unsigned num, size; + __code cinit_t *cptr; + __code char *src; + __data char *dst; + + num = cinit.records; + cptr = &cinit.entry[0]; + + // iterate over all cinit entries + while (num--) { + size = cptr->size; + src = (__code char *) cptr->src; + dst = (__data char *) cptr->dst; + + // copy data byte-wise from ROM to RAM + while (size--) { + *dst = *src; + src++; + dst++; + } // while + + // XXX: might need to clear the watchdog timer here... + cptr++; + } // while + + // call main after initialization + __asm + PAGESEL _main + GOTO _main + __endasm; +} + diff --git a/device/lib/pic/libsdcc/macros.inc b/device/lib/pic/libsdcc/macros.inc new file mode 100644 index 0000000..79294b7 --- /dev/null +++ b/device/lib/pic/libsdcc/macros.inc @@ -0,0 +1,56 @@ +; ----------------------------------------------- +; --- extern declared SFRs +; ----------------------------------------------- + extern _STATUS + extern _FSR + extern _INDF + extern _PCLATH + extern _PCL + +C EQU 0 +DC EQU 1 +Z EQU 2 +IRP EQU 7 + +; ----------------------------------------------- +; --- generic pointer access helpers +; ----------------------------------------------- + +GPTRTAG_DATA EQU 0x00 +GPTRTAG_CODE EQU 0x80 + +; setup FSR to point to (STK00:STK01) +setup_fsr macro + movf STK01, W + movwf _FSR + ; select indirectly addressed bank + bcf _STATUS, IRP + btfsc STK00, 0 + bsf _STATUS, IRP + endm + +; increment FSR, update IRP on bank crossings +; FIXME: update IRP if FSR is reset to 0... +inc_fsr macro + incf _FSR, F + endm + +; dispatch according to gptr type +select_routine macro dataptr, codeptr + ; __data pointer tag: 0x00 + xorlw GPTRTAG_DATA + btfsc _STATUS, Z + goto dataptr + ; __code pointer tag: 0x80 + xorlw (GPTRTAG_DATA ^ GPTRTAG_CODE) + btfsc _STATUS, Z + goto codeptr + endm + +check_data macro dataptr + ; __data pointer tag: 0x00 + xorlw GPTRTAG_DATA + btfsc _STATUS, Z + goto dataptr + endm + diff --git a/device/lib/pic/libsdcc/schar2fs.c b/device/lib/pic/libsdcc/schar2fs.c new file mode 100644 index 0000000..41d81d7 --- /dev/null +++ b/device/lib/pic/libsdcc/schar2fs.c @@ -0,0 +1,38 @@ +/*------------------------------------------------------------------------- + schar2fs.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: schar2fs.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +/* convert signed char to float */ +float __schar2fs (signed char sc) _FS_REENTRANT +{ + return __slong2fs(sc); +} diff --git a/device/lib/pic/libsdcc/shadowregs.c b/device/lib/pic/libsdcc/shadowregs.c new file mode 100644 index 0000000..8824ba5 --- /dev/null +++ b/device/lib/pic/libsdcc/shadowregs.c @@ -0,0 +1,19 @@ +/* + * shadowregs.c - provide shadow register for use during interrupts + * + * (c) 2007 by Raphael Neider + * + * This file is part of SDCC's pic14 library and distributed under + * the terms of the GPLv2 with linking exception; see COPYING in some + * parent directory for details. + */ + +/* + * We should make sure these always reside in the same bank, + * so that we can save two BANKSELs in the interrupt entry code. + */ + +unsigned char __sdcc_saved_fsr; +//unsigned char __sdcc_saved_pclath; +//unsigned char __sdcc_saved_status; + diff --git a/device/lib/pic/libsdcc/sint2fs.c b/device/lib/pic/libsdcc/sint2fs.c new file mode 100644 index 0000000..09e2024 --- /dev/null +++ b/device/lib/pic/libsdcc/sint2fs.c @@ -0,0 +1,38 @@ +/*------------------------------------------------------------------------- + sint2fs.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: sint2fs.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +/* convert signed int to float */ +float __sint2fs (signed int si) _FS_REENTRANT +{ + return __slong2fs(si); +} diff --git a/device/lib/pic/libsdcc/slong2fs.c b/device/lib/pic/libsdcc/slong2fs.c new file mode 100644 index 0000000..a4bd689 --- /dev/null +++ b/device/lib/pic/libsdcc/slong2fs.c @@ -0,0 +1,41 @@ +/*------------------------------------------------------------------------- + slong2fs.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: slong2fs.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +/* convert signed long to float */ +float __slong2fs (signed long sl) _FS_REENTRANT +{ + if (sl<0) + return -__ulong2fs(-sl); + else + return __ulong2fs(sl); +} diff --git a/device/lib/pic/libsdcc/uchar2fs.c b/device/lib/pic/libsdcc/uchar2fs.c new file mode 100644 index 0000000..794aa2f --- /dev/null +++ b/device/lib/pic/libsdcc/uchar2fs.c @@ -0,0 +1,38 @@ +/*------------------------------------------------------------------------- + uchar2fs.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: uchar2fs.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +/* convert unsigned char to float */ +float __uchar2fs (unsigned char uc) _FS_REENTRANT +{ + return __ulong2fs(uc); +} diff --git a/device/lib/pic/libsdcc/uint2fs.c b/device/lib/pic/libsdcc/uint2fs.c new file mode 100644 index 0000000..866fbfa --- /dev/null +++ b/device/lib/pic/libsdcc/uint2fs.c @@ -0,0 +1,38 @@ +/*------------------------------------------------------------------------- + uint2fs.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: uint2fs.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +#include + +/* convert unsigned int to float */ +float __uint2fs (unsigned int ui) _FS_REENTRANT +{ + return __ulong2fs(ui); +} diff --git a/device/lib/pic/libsdcc/ulong2fs.c b/device/lib/pic/libsdcc/ulong2fs.c new file mode 100644 index 0000000..d7534ac --- /dev/null +++ b/device/lib/pic/libsdcc/ulong2fs.c @@ -0,0 +1,75 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: ulong2fs.c 4776 2007-04-29 13:15:51Z borutr $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long + { + float f; + long l; + }; + +float __ulong2fs (unsigned long a ) _FS_REENTRANT +{ + int exp = 24 + EXCESS; + FS_STATIC volatile union float_long fl; + + if (!a) + { + return 0.0; + } + + while (a & NORM) + { + // we lose accuracy here + a >>= 1; + exp++; + } + + + if(a < HIDDEN) { + do { + a<<=1; + exp--; + } while (a < HIDDEN); + } + +#if 0 + while (a < HIDDEN) { + a <<= 1; + exp--; + } +#endif + +#if 1 + if ((a&0x7fffff)==0x7fffff) { + a=0; + exp++; + } +#endif + + a &= ~HIDDEN ; + /* pack up and go home */ + fl.l = PACK(0,(unsigned long)exp, a); + + return (fl.f); +} diff --git a/device/lib/pic16/COPYING b/device/lib/pic16/COPYING new file mode 100644 index 0000000..916d1f0 --- /dev/null +++ b/device/lib/pic16/COPYING @@ -0,0 +1,339 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc. + 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. 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Each time you redistribute the Program (or any work based on the +Program), the recipient automatically receives a license from the +original licensor to copy, distribute or modify the Program subject to +these terms and conditions. You may not impose any further +restrictions on the recipients' exercise of the rights granted herein. +You are not responsible for enforcing compliance by third parties to +this License. + + 7. If, as a consequence of a court judgment or allegation of patent +infringement or for any other reason (not limited to patent issues), +conditions are imposed on you (whether by court order, agreement or +otherwise) that contradict the conditions of this License, they do not +excuse you from the conditions of this License. If you cannot +distribute so as to satisfy simultaneously your obligations under this +License and any other pertinent obligations, then as a consequence you +may not distribute the Program at all. For example, if a patent +license would not permit royalty-free redistribution of the Program by +all those who receive copies directly or indirectly through you, then +the only way you could satisfy both it and this License would be to +refrain entirely from distribution of the Program. + +If any portion of this section is held invalid or unenforceable under +any particular circumstance, the balance of the section is intended to +apply and the section as a whole is intended to apply in other +circumstances. + +It is not the purpose of this section to induce you to infringe any +patents or other property right claims or to contest validity of any +such claims; this section has the sole purpose of protecting the +integrity of the free software distribution system, which is +implemented by public license practices. Many people have made +generous contributions to the wide range of software distributed +through that system in reliance on consistent application of that +system; it is up to the author/donor to decide if he or she is willing +to distribute software through any other system and a licensee cannot +impose that choice. + +This section is intended to make thoroughly clear what is believed to +be a consequence of the rest of this License. + + 8. If the distribution and/or use of the Program is restricted in +certain countries either by patents or by copyrighted interfaces, the +original copyright holder who places the Program under this License +may add an explicit geographical distribution limitation excluding +those countries, so that distribution is permitted only in or among +countries not thus excluded. In such case, this License incorporates +the limitation as if written in the body of this License. + + 9. The Free Software Foundation may publish revised and/or new versions +of the General Public License from time to time. Such new versions will +be similar in spirit to the present version, but may differ in detail to +address new problems or concerns. + +Each version is given a distinguishing version number. If the Program +specifies a version number of this License which applies to it and "any +later version", you have the option of following the terms and conditions +either of that version or of any later version published by the Free +Software Foundation. If the Program does not specify a version number of +this License, you may choose any version ever published by the Free Software +Foundation. + + 10. If you wish to incorporate parts of the Program into other free +programs whose distribution conditions are different, write to the author +to ask for permission. For software which is copyrighted by the Free +Software Foundation, write to the Free Software Foundation; we sometimes +make exceptions for this. Our decision will be guided by the two goals +of preserving the free status of all derivatives of our free software and +of promoting the sharing and reuse of software generally. + + NO WARRANTY + + 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY +FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN +OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES +PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED +OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS +TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE +PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, +REPAIR OR CORRECTION. + + 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING +WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR +REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, +INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING +OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED +TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY +YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER +PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE +POSSIBILITY OF SUCH DAMAGES. + + END OF TERMS AND CONDITIONS + + Appendix: How to Apply These Terms to Your New Programs + + If you develop a new program, and you want it to be of the greatest +possible use to the public, the best way to achieve this is to make it +free software which everyone can redistribute and change under these terms. + + To do so, attach the following notices to the program. It is safest +to attach them to the start of each source file to most effectively +convey the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + + Copyright (C) 19yy + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) 19yy name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + , 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Library General +Public License instead of this License. diff --git a/device/lib/pic16/Makefile.am b/device/lib/pic16/Makefile.am new file mode 100644 index 0000000..71d4ba8 --- /dev/null +++ b/device/lib/pic16/Makefile.am @@ -0,0 +1,6 @@ +## Makefile.am -- Process this file with automake to produce Makefile.in + +SUBDIRS = debug libc libdev libio libm libsdcc startup + +include $(top_srcdir)/Makefile.common + diff --git a/device/lib/pic16/Makefile.common b/device/lib/pic16/Makefile.common new file mode 100644 index 0000000..22cee8b --- /dev/null +++ b/device/lib/pic16/Makefile.common @@ -0,0 +1,43 @@ +AM_CFLAGS = +AM_CFLAGS += --std-c99 +AM_CFLAGS += --asm="$(CCAS)" +AM_CFLAGS += -I. +AM_CFLAGS += -I$(top_srcdir)/../../include/pic16 +##AM_CFLAGS += -Wa,-q + +AM_CFLAGS += --fommit-frame-pointer +AM_CFLAGS += --obanksel=9 +AM_CFLAGS += --denable-peeps +#AM_CFLAGS += --no-optimize-goto +AM_CFLAGS += --optimize-cmp +AM_CFLAGS += --optimize-df + +#AM_CFLAGS += --debug-ralloc +#AM_CFLAGS += --debug-xtra +#AM_CFLAGS += --pcode-verbose +AM_CFLAGS += --i-code-in-asm + +#AM_CFLAGS += --nooverlay +#AM_CFLAGS += --nogcse +#AM_CFLAGS += --nolabelopt +#AM_CFLAGS += --noinvariant +#AM_CFLAGS += --noinduction +#AM_CFLAGS += --nojtbound +#AM_CFLAGS += --noloopreverse + +AM_CFLAGS += @USE_FLOATS@ + +AM_CCASFLAGS = +AM_CCASFLAGS += -I$(top_srcdir)/../../include/pic16 +AM_CCASFLAGS += -I$(srcdir) + +clean-local: + $(RM) *.asm; + $(RM) *.lst; + +clean-intermediate: clean-local + list='$(SUBDIRS)'; for subdir in $$list; do \ + echo "Making $@ in $$subdir"; \ + (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $@); \ + done + diff --git a/device/lib/pic16/Makefile.in b/device/lib/pic16/Makefile.in new file mode 100644 index 0000000..338517d --- /dev/null +++ b/device/lib/pic16/Makefile.in @@ -0,0 +1,621 @@ +# Makefile.in generated by automake 1.10 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +# 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ +VPATH = @srcdir@ +pkgdatadir = $(datadir)/@PACKAGE@ +pkglibdir = $(libdir)/@PACKAGE@ +pkgincludedir = $(includedir)/@PACKAGE@ +am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd +install_sh_DATA = $(install_sh) -c -m 644 +install_sh_PROGRAM = $(install_sh) -c +install_sh_SCRIPT = $(install_sh) -c +INSTALL_HEADER = $(INSTALL_DATA) +transform = $(program_transform_name) +NORMAL_INSTALL = : +PRE_INSTALL = : +POST_INSTALL = : +NORMAL_UNINSTALL = : +PRE_UNINSTALL = : +POST_UNINSTALL = : +DIST_COMMON = README $(am__configure_deps) $(srcdir)/Makefile.am \ + $(srcdir)/Makefile.in $(srcdir)/config.h.in \ + $(top_srcdir)/Makefile.common $(top_srcdir)/configure COPYING \ + config.guess depcomp install-sh missing +subdir = . +ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 +am__aclocal_m4_deps = $(top_srcdir)/configure.ac +am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \ + $(ACLOCAL_M4) +am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \ + configure.lineno config.status.lineno +mkinstalldirs = $(install_sh) -d +CONFIG_HEADER = config.h +CONFIG_CLEAN_FILES = +SOURCES = +DIST_SOURCES = +RECURSIVE_TARGETS = all-recursive check-recursive dvi-recursive \ + html-recursive info-recursive install-data-recursive \ + install-dvi-recursive install-exec-recursive \ + install-html-recursive install-info-recursive \ + install-pdf-recursive install-ps-recursive install-recursive \ + installcheck-recursive installdirs-recursive pdf-recursive \ + ps-recursive uninstall-recursive +RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \ + distclean-recursive maintainer-clean-recursive +ETAGS = etags +CTAGS = ctags +DIST_SUBDIRS = $(SUBDIRS) +DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) +distdir = $(PACKAGE)-$(VERSION) +top_distdir = $(distdir) +am__remove_distdir = \ + { test ! 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We prefer a C program (faster), +# so one script is as good as another. But avoid the broken or +# incompatible versions: +# SysV /etc/install, /usr/sbin/install +# SunOS /usr/etc/install +# IRIX /sbin/install +# AIX /bin/install +# AmigaOS /C/install, which installs bootblocks on floppy discs +# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag +# AFS /usr/afsws/bin/install, which mishandles nonexistent args +# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" +# OS/2's system install, which has a completely different semantic +# ./install, which can be erroneously created by make from ./install.sh. +# Reject install programs that cannot install multiple files. +{ $as_echo "$as_me:$LINENO: checking for a BSD-compatible install" >&5 +$as_echo_n "checking for a BSD-compatible install... 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It has an incompatible calling convention. + : + elif test $ac_prog = install && + grep pwplus "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then + # program-specific install script used by HP pwplus--don't use. + : + else + rm -rf conftest.one conftest.two conftest.dir + echo one > conftest.one + echo two > conftest.two + mkdir conftest.dir + if "$as_dir/$ac_prog$ac_exec_ext" -c conftest.one conftest.two "`pwd`/conftest.dir" && + test -s conftest.one && test -s conftest.two && + test -s conftest.dir/conftest.one && + test -s conftest.dir/conftest.two + then + ac_cv_path_install="$as_dir/$ac_prog$ac_exec_ext -c" + break 3 + fi + fi + fi + done + done + ;; +esac + +done +IFS=$as_save_IFS + +rm -rf conftest.one conftest.two conftest.dir + +fi + if test "${ac_cv_path_install+set}" = set; then + INSTALL=$ac_cv_path_install + else + # As a last resort, use the slow shell script. Don't cache a + # value for INSTALL within a source directory, because that will + # break other packages using the cache if that directory is + # removed, or if the value is a relative name. + INSTALL=$ac_install_sh + fi +fi +{ $as_echo "$as_me:$LINENO: result: $INSTALL" >&5 +$as_echo "$INSTALL" >&6; } + +# Use test -z because SunOS4 sh mishandles braces in ${var-val}. +# It thinks the first close brace ends the variable substitution. +test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}' + +test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL}' + +test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' + +{ $as_echo "$as_me:$LINENO: checking whether build environment is sane" >&5 +$as_echo_n "checking whether build environment is sane... " >&6; } +# Just in case +sleep 1 +echo timestamp > conftest.file +# Do `set' in a subshell so we don't clobber the current shell's +# arguments. Must try -L first in case configure is actually a +# symlink; some systems play weird games with the mod time of symlinks +# (eg FreeBSD returns the mod time of the symlink's containing +# directory). +if ( + set X `ls -Lt $srcdir/configure conftest.file 2> /dev/null` + if test "$*" = "X"; then + # -L didn't work. + set X `ls -t $srcdir/configure conftest.file` + fi + rm -f conftest.file + if test "$*" != "X $srcdir/configure conftest.file" \ + && test "$*" != "X conftest.file $srcdir/configure"; then + + # If neither matched, then we have a broken ls. This can happen + # if, for instance, CONFIG_SHELL is bash and it inherits a + # broken ls alias from the environment. This has actually + # happened. Such a system could not be considered "sane". + { { $as_echo "$as_me:$LINENO: error: ls -t appears to fail. Make sure there is not a broken +alias in your environment" >&5 +$as_echo "$as_me: error: ls -t appears to fail. Make sure there is not a broken +alias in your environment" >&2;} + { (exit 1); exit 1; }; } + fi + + test "$2" = conftest.file + ) +then + # Ok. + : +else + { { $as_echo "$as_me:$LINENO: error: newly created file is older than distributed files! +Check your system clock" >&5 +$as_echo "$as_me: error: newly created file is older than distributed files! +Check your system clock" >&2;} + { (exit 1); exit 1; }; } +fi +{ $as_echo "$as_me:$LINENO: result: yes" >&5 +$as_echo "yes" >&6; } +test "$program_prefix" != NONE && + program_transform_name="s&^&$program_prefix&;$program_transform_name" +# Use a double $ so make ignores it. +test "$program_suffix" != NONE && + program_transform_name="s&\$&$program_suffix&;$program_transform_name" +# Double any \ or $. +# By default was `s,x,x', remove it if useless. +ac_script='s/[\\$]/&&/g;s/;s,x,x,$//' +program_transform_name=`$as_echo "$program_transform_name" | sed "$ac_script"` + +# expand $ac_aux_dir to an absolute path +am_aux_dir=`cd $ac_aux_dir && pwd` + +test x"${MISSING+set}" = xset || MISSING="\${SHELL} $am_aux_dir/missing" +# Use eval to expand $SHELL +if eval "$MISSING --run true"; then + am_missing_run="$MISSING --run " +else + am_missing_run= + { $as_echo "$as_me:$LINENO: WARNING: \`missing' script is too old or missing" >&5 +$as_echo "$as_me: WARNING: \`missing' script is too old or missing" >&2;} +fi + +{ $as_echo "$as_me:$LINENO: checking for a thread-safe mkdir -p" >&5 +$as_echo_n "checking for a thread-safe mkdir -p... " >&6; } +if test -z "$MKDIR_P"; then + if test "${ac_cv_path_mkdir+set}" = set; then + $as_echo_n "(cached) " >&6 +else + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/opt/sfw/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in mkdir gmkdir; do + for ac_exec_ext in '' $ac_executable_extensions; do + { test -f "$as_dir/$ac_prog$ac_exec_ext" && $as_test_x "$as_dir/$ac_prog$ac_exec_ext"; } || continue + case `"$as_dir/$ac_prog$ac_exec_ext" --version 2>&1` in #( + 'mkdir (GNU coreutils) '* | \ + 'mkdir (coreutils) '* | \ + 'mkdir (fileutils) '4.1*) + ac_cv_path_mkdir=$as_dir/$ac_prog$ac_exec_ext + break 3;; + esac + done + done +done +IFS=$as_save_IFS + +fi + + if test "${ac_cv_path_mkdir+set}" = set; then + MKDIR_P="$ac_cv_path_mkdir -p" + else + # As a last resort, use the slow shell script. Don't cache a + # value for MKDIR_P within a source directory, because that will + # break other packages using the cache if that directory is + # removed, or if the value is a relative name. + test -d ./--version && rmdir ./--version + MKDIR_P="$ac_install_sh -d" + fi +fi +{ $as_echo "$as_me:$LINENO: result: $MKDIR_P" >&5 +$as_echo "$MKDIR_P" >&6; } + +mkdir_p="$MKDIR_P" +case $mkdir_p in + [\\/$]* | ?:[\\/]*) ;; + */*) mkdir_p="\$(top_builddir)/$mkdir_p" ;; +esac + +for ac_prog in gawk mawk nawk awk +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_AWK+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$AWK"; then + ac_cv_prog_AWK="$AWK" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_AWK="$ac_prog" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +AWK=$ac_cv_prog_AWK +if test -n "$AWK"; then + { $as_echo "$as_me:$LINENO: result: $AWK" >&5 +$as_echo "$AWK" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$AWK" && break +done + +{ $as_echo "$as_me:$LINENO: checking whether ${MAKE-make} sets \$(MAKE)" >&5 +$as_echo_n "checking whether ${MAKE-make} sets \$(MAKE)... " >&6; } +set x ${MAKE-make} +ac_make=`$as_echo "$2" | sed 's/+/p/g; s/[^a-zA-Z0-9_]/_/g'` +if { as_var=ac_cv_prog_make_${ac_make}_set; eval "test \"\${$as_var+set}\" = set"; }; then + $as_echo_n "(cached) " >&6 +else + cat >conftest.make <<\_ACEOF +SHELL = /bin/sh +all: + @echo '@@@%%%=$(MAKE)=@@@%%%' +_ACEOF +# GNU make sometimes prints "make[1]: Entering...", which would confuse us. +case `${MAKE-make} -f conftest.make 2>/dev/null` in + *@@@%%%=?*=@@@%%%*) + eval ac_cv_prog_make_${ac_make}_set=yes;; + *) + eval ac_cv_prog_make_${ac_make}_set=no;; +esac +rm -f conftest.make +fi +if eval test \$ac_cv_prog_make_${ac_make}_set = yes; then + { $as_echo "$as_me:$LINENO: result: yes" >&5 +$as_echo "yes" >&6; } + SET_MAKE= +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } + SET_MAKE="MAKE=${MAKE-make}" +fi + +rm -rf .tst 2>/dev/null +mkdir .tst 2>/dev/null +if test -d .tst; then + am__leading_dot=. +else + am__leading_dot=_ +fi +rmdir .tst 2>/dev/null + +if test "`cd $srcdir && pwd`" != "`pwd`"; then + # Use -I$(srcdir) only when $(srcdir) != ., so that make's output + # is not polluted with repeated "-I." + am__isrc=' -I$(srcdir)' + # test to see if srcdir already configured + if test -f $srcdir/config.status; then + { { $as_echo "$as_me:$LINENO: error: source directory already configured; run \"make distclean\" there first" >&5 +$as_echo "$as_me: error: source directory already configured; run \"make distclean\" there first" >&2;} + { (exit 1); exit 1; }; } + fi +fi + +# test whether we have cygpath +if test -z "$CYGPATH_W"; then + if (cygpath --version) >/dev/null 2>/dev/null; then + CYGPATH_W='cygpath -w' + else + CYGPATH_W=echo + fi +fi + + +# Define the identity of the package. + PACKAGE='pic16lib' + VERSION='0.3' + + +cat >>confdefs.h <<_ACEOF +@%:@define PACKAGE "$PACKAGE" +_ACEOF + + +cat >>confdefs.h <<_ACEOF +@%:@define VERSION "$VERSION" +_ACEOF + +# Some tools Automake needs. + +ACLOCAL=${ACLOCAL-"${am_missing_run}aclocal-${am__api_version}"} + + +AUTOCONF=${AUTOCONF-"${am_missing_run}autoconf"} + + +AUTOMAKE=${AUTOMAKE-"${am_missing_run}automake-${am__api_version}"} + + +AUTOHEADER=${AUTOHEADER-"${am_missing_run}autoheader"} + + +MAKEINFO=${MAKEINFO-"${am_missing_run}makeinfo"} + +install_sh=${install_sh-"\$(SHELL) $am_aux_dir/install-sh"} + +# Installed binaries are usually stripped using `strip' when the user +# run `make install-strip'. However `strip' might not be the right +# tool to use in cross-compilation environments, therefore Automake +# will honor the `STRIP' environment variable to overrule this program. +if test "$cross_compiling" != no; then + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args. +set dummy ${ac_tool_prefix}strip; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_STRIP+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$STRIP"; then + ac_cv_prog_STRIP="$STRIP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_STRIP="${ac_tool_prefix}strip" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +STRIP=$ac_cv_prog_STRIP +if test -n "$STRIP"; then + { $as_echo "$as_me:$LINENO: result: $STRIP" >&5 +$as_echo "$STRIP" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_STRIP"; then + ac_ct_STRIP=$STRIP + # Extract the first word of "strip", so it can be a program name with args. +set dummy strip; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_STRIP"; then + ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_STRIP="strip" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP +if test -n "$ac_ct_STRIP"; then + { $as_echo "$as_me:$LINENO: result: $ac_ct_STRIP" >&5 +$as_echo "$ac_ct_STRIP" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_STRIP" = x; then + STRIP=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:$LINENO: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + STRIP=$ac_ct_STRIP + fi +else + STRIP="$ac_cv_prog_STRIP" +fi + +fi +INSTALL_STRIP_PROGRAM="\$(install_sh) -c -s" + +# We need awk for the "check" target. The system "awk" is bad on +# some platforms. +# Always define AMTAR for backward compatibility. + +AMTAR=${AMTAR-"${am_missing_run}tar"} + +am__tar='${AMTAR} chof - "$$tardir"'; am__untar='${AMTAR} xf -' + + + + + + +ac_config_headers="$ac_config_headers config.h" + + + +# SDCC setup +case $srcdir in + \\/*|?:\\/*) abs_srcdir="$srcdir"; + ;; + *) abs_srcdir="$ac_pwd/$srcdir"; + ;; +esac +case $ac_top_build_prefix in + \\/*|?:\\/*) + abs_top_builddir="$ac_top_build_prefix"; + ;; + *) abs_top_builddir="$ac_pwd/$ac_top_build_prefix"; + ;; +esac + +libdir=$libdir/pic16 + +USE_FLOATS="-DUSE_FLOATS=0" + +@%:@ Check whether --enable-floats was given. +if test "${enable_floats+set}" = set; then + enableval=$enable_floats; if test "yes" = $enableval; then USE_FLOATS="-DUSE_FLOATS=1"; fi + +fi + + +# Checks for programs. + +# The default architecture can be selected at configure time by setting the +# environment variable ARCH to the desired device (18fxxx). +ARCH=${ARCH:-18f452} + + +# We cannot use AC_PROG_CC(sdcc) as sdcc might not be built at configure-time... +CC=\'$abs_top_builddir/../../../bin/sdcc\' + +CFLAGS="-mpic16 -p$ARCH" + +# Extract the first word of "gpasm", so it can be a program name with args. +set dummy gpasm; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_path_CCAS+set}" = set; then + $as_echo_n "(cached) " >&6 +else + case $CCAS in + [\\/]* | ?:[\\/]*) + ac_cv_path_CCAS="$CCAS" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_path_CCAS="$as_dir/$ac_word$ac_exec_ext" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_path_CCAS" && ac_cv_path_CCAS=":" + ;; +esac +fi +CCAS=$ac_cv_path_CCAS +if test -n "$CCAS"; then + { $as_echo "$as_me:$LINENO: result: $CCAS" >&5 +$as_echo "$CCAS" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +CCAS=\'$CCAS\' + +CCASFLAGS="-p$ARCH" + +# Extract the first word of "gplink", so it can be a program name with args. +set dummy gplink; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... 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Don't cache a + # value for MKDIR_P within a source directory, because that will + # break other packages using the cache if that directory is + # removed, or if the value is a relative name. + test -d ./--version && rmdir ./--version + MKDIR_P="$ac_install_sh -d" + fi +fi +{ $as_echo "$as_me:$LINENO: result: $MKDIR_P" >&5 +$as_echo "$MKDIR_P" >&6; } + +mkdir_p="$MKDIR_P" +case $mkdir_p in + [\\/$]* | ?:[\\/]*) ;; + */*) mkdir_p="\$(top_builddir)/$mkdir_p" ;; +esac + +for ac_prog in gawk mawk nawk awk +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_AWK+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$AWK"; then + ac_cv_prog_AWK="$AWK" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_AWK="$ac_prog" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +AWK=$ac_cv_prog_AWK +if test -n "$AWK"; then + { $as_echo "$as_me:$LINENO: result: $AWK" >&5 +$as_echo "$AWK" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$AWK" && break +done + +{ $as_echo "$as_me:$LINENO: checking whether ${MAKE-make} sets \$(MAKE)" >&5 +$as_echo_n "checking whether ${MAKE-make} sets \$(MAKE)... " >&6; } +set x ${MAKE-make} +ac_make=`$as_echo "$2" | sed 's/+/p/g; s/[^a-zA-Z0-9_]/_/g'` +if { as_var=ac_cv_prog_make_${ac_make}_set; eval "test \"\${$as_var+set}\" = set"; }; then + $as_echo_n "(cached) " >&6 +else + cat >conftest.make <<\_ACEOF +SHELL = /bin/sh +all: + @echo '@@@%%%=$(MAKE)=@@@%%%' +_ACEOF +# GNU make sometimes prints "make[1]: Entering...", which would confuse us. +case `${MAKE-make} -f conftest.make 2>/dev/null` in + *@@@%%%=?*=@@@%%%*) + eval ac_cv_prog_make_${ac_make}_set=yes;; + *) + eval ac_cv_prog_make_${ac_make}_set=no;; +esac +rm -f conftest.make +fi +if eval test \$ac_cv_prog_make_${ac_make}_set = yes; then + { $as_echo "$as_me:$LINENO: result: yes" >&5 +$as_echo "yes" >&6; } + SET_MAKE= +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } + SET_MAKE="MAKE=${MAKE-make}" +fi + +rm -rf .tst 2>/dev/null +mkdir .tst 2>/dev/null +if test -d .tst; then + am__leading_dot=. +else + am__leading_dot=_ +fi +rmdir .tst 2>/dev/null + +if test "`cd $srcdir && pwd`" != "`pwd`"; then + # Use -I$(srcdir) only when $(srcdir) != ., so that make's output + # is not polluted with repeated "-I." + am__isrc=' -I$(srcdir)' + # test to see if srcdir already configured + if test -f $srcdir/config.status; then + { { $as_echo "$as_me:$LINENO: error: source directory already configured; run \"make distclean\" there first" >&5 +$as_echo "$as_me: error: source directory already configured; run \"make distclean\" there first" >&2;} + { (exit 1); exit 1; }; } + fi +fi + +# test whether we have cygpath +if test -z "$CYGPATH_W"; then + if (cygpath --version) >/dev/null 2>/dev/null; then + CYGPATH_W='cygpath -w' + else + CYGPATH_W=echo + fi +fi + + +# Define the identity of the package. + PACKAGE='pic16lib' + VERSION='0.3' + + +cat >>confdefs.h <<_ACEOF +@%:@define PACKAGE "$PACKAGE" +_ACEOF + + +cat >>confdefs.h <<_ACEOF +@%:@define VERSION "$VERSION" +_ACEOF + +# Some tools Automake needs. + +ACLOCAL=${ACLOCAL-"${am_missing_run}aclocal-${am__api_version}"} + + +AUTOCONF=${AUTOCONF-"${am_missing_run}autoconf"} + + +AUTOMAKE=${AUTOMAKE-"${am_missing_run}automake-${am__api_version}"} + + +AUTOHEADER=${AUTOHEADER-"${am_missing_run}autoheader"} + + +MAKEINFO=${MAKEINFO-"${am_missing_run}makeinfo"} + +install_sh=${install_sh-"\$(SHELL) $am_aux_dir/install-sh"} + +# Installed binaries are usually stripped using `strip' when the user +# run `make install-strip'. However `strip' might not be the right +# tool to use in cross-compilation environments, therefore Automake +# will honor the `STRIP' environment variable to overrule this program. +if test "$cross_compiling" != no; then + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args. +set dummy ${ac_tool_prefix}strip; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_STRIP+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$STRIP"; then + ac_cv_prog_STRIP="$STRIP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_STRIP="${ac_tool_prefix}strip" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +STRIP=$ac_cv_prog_STRIP +if test -n "$STRIP"; then + { $as_echo "$as_me:$LINENO: result: $STRIP" >&5 +$as_echo "$STRIP" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_STRIP"; then + ac_ct_STRIP=$STRIP + # Extract the first word of "strip", so it can be a program name with args. +set dummy strip; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_STRIP"; then + ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_STRIP="strip" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP +if test -n "$ac_ct_STRIP"; then + { $as_echo "$as_me:$LINENO: result: $ac_ct_STRIP" >&5 +$as_echo "$ac_ct_STRIP" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_STRIP" = x; then + STRIP=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:$LINENO: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + STRIP=$ac_ct_STRIP + fi +else + STRIP="$ac_cv_prog_STRIP" +fi + +fi +INSTALL_STRIP_PROGRAM="\$(install_sh) -c -s" + +# We need awk for the "check" target. The system "awk" is bad on +# some platforms. +# Always define AMTAR for backward compatibility. + +AMTAR=${AMTAR-"${am_missing_run}tar"} + +am__tar='${AMTAR} chof - "$$tardir"'; am__untar='${AMTAR} xf -' + + + + + + +ac_config_headers="$ac_config_headers config.h" + + + +# SDCC setup +case $srcdir in + \\/*|?:\\/*) abs_srcdir="$srcdir"; + ;; + *) abs_srcdir="$ac_pwd/$srcdir"; + ;; +esac +case $ac_top_build_prefix in + \\/*|?:\\/*) + abs_top_builddir="$ac_top_build_prefix"; + ;; + *) abs_top_builddir="$ac_pwd/$ac_top_build_prefix"; + ;; +esac + +libdir=$libdir/pic16 + +USE_FLOATS="-DUSE_FLOATS=0" + +@%:@ Check whether --enable-floats was given. +if test "${enable_floats+set}" = set; then + enableval=$enable_floats; if test "yes" = $enableval; then USE_FLOATS="-DUSE_FLOATS=1"; fi + +fi + + +# Checks for programs. + +# The default architecture can be selected at configure time by setting the +# environment variable ARCH to the desired device (18fxxx). +ARCH=${ARCH:-18f452} + + +# We cannot use AC_PROG_CC(sdcc) as sdcc might not be built at configure-time... +CC=\'$abs_top_builddir/../../../bin/sdcc\' + +CFLAGS="-mpic16 -p$ARCH" + +# Extract the first word of "gpasm", so it can be a program name with args. +set dummy gpasm; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_path_CCAS+set}" = set; then + $as_echo_n "(cached) " >&6 +else + case $CCAS in + [\\/]* | ?:[\\/]*) + ac_cv_path_CCAS="$CCAS" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_path_CCAS="$as_dir/$ac_word$ac_exec_ext" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_path_CCAS" && ac_cv_path_CCAS=":" + ;; +esac +fi +CCAS=$ac_cv_path_CCAS +if test -n "$CCAS"; then + { $as_echo "$as_me:$LINENO: result: $CCAS" >&5 +$as_echo "$CCAS" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +CCAS=\'$CCAS\' + +CCASFLAGS="-p$ARCH" + +# Extract the first word of "gplink", so it can be a program name with args. +set dummy gplink; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_path_LD+set}" = set; then + $as_echo_n "(cached) " >&6 +else + case $LD in + [\\/]* | ?:[\\/]*) + ac_cv_path_LD="$LD" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_path_LD="$as_dir/$ac_word$ac_exec_ext" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_path_LD" && ac_cv_path_LD=":" + ;; +esac +fi +LD=$ac_cv_path_LD +if test -n "$LD"; then + { $as_echo "$as_me:$LINENO: result: $LD" >&5 +$as_echo "$LD" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +LD=\'$LD\' + +# Extract the first word of "gplib", so it can be a program name with args. +set dummy gplib; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_path_AR+set}" = set; then + $as_echo_n "(cached) " >&6 +else + case $AR in + [\\/]* | ?:[\\/]*) + ac_cv_path_AR="$AR" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_path_AR="$as_dir/$ac_word$ac_exec_ext" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_path_AR" && ac_cv_path_AR=":" + ;; +esac +fi +AR=$ac_cv_path_AR +if test -n "$AR"; then + { $as_echo "$as_me:$LINENO: result: $AR" >&5 +$as_echo "$AR" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +AR=\'$AR\' + +ARFLAGS=-c + + +# $RANLIB is called by the autotools but not provided nor required +RANLIB=: + +OBJEXT=o + + +DEPDIR="${am__leading_dot}deps" + +ac_config_commands="$ac_config_commands depfiles" + + +am_make=${MAKE-make} +cat > confinc << 'END' +am__doit: + @echo done +.PHONY: am__doit +END +# If we don't find an include directive, just comment out the code. +{ $as_echo "$as_me:$LINENO: checking for style of include used by $am_make" >&5 +$as_echo_n "checking for style of include used by $am_make... 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For instance + # both Tru64's cc and ICC support -MD to output dependencies as a + # side effect of compilation, but ICC will put the dependencies in + # the current directory while Tru64 will put them in the object + # directory. + mkdir sub + + am_cv_CC_dependencies_compiler_type=none + if test "$am_compiler_list" = ""; then + am_compiler_list=`sed -n 's/^#*\([a-zA-Z0-9]*\))$/\1/p' < ./depcomp` + fi + for depmode in $am_compiler_list; do + # Setup a source with many dependencies, because some compilers + # like to wrap large dependency lists on column 80 (with \), and + # we should not choose a depcomp mode which is confused by this. + # + # We need to recreate these files for each test, as the compiler may + # overwrite some of them when testing with obscure command lines. + # This happens at least with the AIX C compiler. + : > sub/conftest.c + for i in 1 2 3 4 5 6; do + echo '#include "conftst'$i'.h"' >> sub/conftest.c + # Using `: > sub/conftst$i.h' creates only sub/conftst1.h with + # Solaris 8's {/usr,}/bin/sh. + touch sub/conftst$i.h + done + echo "${am__include} ${am__quote}sub/conftest.Po${am__quote}" > confmf + + case $depmode in + nosideeffect) + # after this tag, mechanisms are not by side-effect, so they'll + # only be used when explicitly requested + if test "x$enable_dependency_tracking" = xyes; then + continue + else + break + fi + ;; + none) break ;; + esac + # We check with `-c' and `-o' for the sake of the "dashmstdout" + # mode. It turns out that the SunPro C++ compiler does not properly + # handle `-M -o', and we need to detect this. + if depmode=$depmode \ + source=sub/conftest.c object=sub/conftest.${OBJEXT-o} \ + depfile=sub/conftest.Po tmpdepfile=sub/conftest.TPo \ + $SHELL ./depcomp $depcc -c -o sub/conftest.${OBJEXT-o} sub/conftest.c \ + >/dev/null 2>conftest.err && + grep sub/conftst1.h sub/conftest.Po > /dev/null 2>&1 && + grep sub/conftst6.h sub/conftest.Po > /dev/null 2>&1 && + grep sub/conftest.${OBJEXT-o} sub/conftest.Po > /dev/null 2>&1 && + ${MAKE-make} -s -f confmf > /dev/null 2>&1; then + # icc doesn't choke on unknown options, it will just issue warnings + # or remarks (even with -Werror). So we grep stderr for any message + # that says an option was ignored or not supported. + # When given -MP, icc 7.0 and 7.1 complain thusly: + # icc: Command line warning: ignoring option '-M'; no argument required + # The diagnosis changed in icc 8.0: + # icc: Command line remark: option '-MP' not supported + if (grep 'ignoring option' conftest.err || + grep 'not supported' conftest.err) >/dev/null 2>&1; then :; else + am_cv_CC_dependencies_compiler_type=$depmode + break + fi + fi + done + + cd .. + rm -rf conftest.dir +else + am_cv_CC_dependencies_compiler_type=none +fi + +fi +{ $as_echo "$as_me:$LINENO: result: $am_cv_CC_dependencies_compiler_type" >&5 +$as_echo "$am_cv_CC_dependencies_compiler_type" >&6; } +CCDEPMODE=depmode=$am_cv_CC_dependencies_compiler_type + + if + test "x$enable_dependency_tracking" != xno \ + && test "$am_cv_CC_dependencies_compiler_type" = gcc3; then + am__fastdepCC_TRUE= + am__fastdepCC_FALSE='#' +else + am__fastdepCC_TRUE='#' + am__fastdepCC_FALSE= +fi + + + +depcc="$CCAS" am_compiler_list= + +{ $as_echo "$as_me:$LINENO: checking dependency style of $depcc" >&5 +$as_echo_n "checking dependency style of $depcc... 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Set only those that are not. +# We use the long form for the default assignment because of an extremely +# bizarre bug on SunOS 4.1.3. +if $ac_need_defaults; then + test "${CONFIG_FILES+set}" = set || CONFIG_FILES=$config_files + test "${CONFIG_HEADERS+set}" = set || CONFIG_HEADERS=$config_headers + test "${CONFIG_COMMANDS+set}" = set || CONFIG_COMMANDS=$config_commands +fi + +# Have a temporary directory for convenience. Make it in the build tree +# simply because there is no reason against having it here, and in addition, +# creating and moving files from /tmp can sometimes cause problems. +# Hook for its removal unless debugging. +# Note that there is a small window in which the directory will not be cleaned: +# after its creation but before its name has been assigned to `$tmp'. +$debug || +{ + tmp= + trap 'exit_status=$? + { test -z "$tmp" || test ! -d "$tmp" || rm -fr "$tmp"; } && exit $exit_status +' 0 + trap '{ (exit 1); exit 1; }' 1 2 13 15 +} +# Create a (secure) tmp directory for tmp files. + +{ + tmp=`(umask 077 && mktemp -d "./confXXXXXX") 2>/dev/null` && + test -n "$tmp" && test -d "$tmp" +} || +{ + tmp=./conf$$-$RANDOM + (umask 077 && mkdir "$tmp") +} || +{ + $as_echo "$as_me: cannot create a temporary directory in ." >&2 + { (exit 1); exit 1; } +} + +# Set up the scripts for CONFIG_FILES section. +# No need to generate them if there are no CONFIG_FILES. +# This happens for instance with `./config.status config.h'. +if test -n "$CONFIG_FILES"; then + + +ac_cr=' ' +ac_cs_awk_cr=`$AWK 'BEGIN { print "a\rb" }' /dev/null` +if test "$ac_cs_awk_cr" = "a${ac_cr}b"; then + ac_cs_awk_cr='\\r' +else + ac_cs_awk_cr=$ac_cr +fi + +echo 'BEGIN {' >"$tmp/subs1.awk" && +_ACEOF + + +{ + echo "cat >conf$$subs.awk <<_ACEOF" && + echo "$ac_subst_vars" | sed 's/.*/&!$&$ac_delim/' && + echo "_ACEOF" +} >conf$$subs.sh || + { { $as_echo "$as_me:$LINENO: error: could not make $CONFIG_STATUS" >&5 +$as_echo "$as_me: error: could not make $CONFIG_STATUS" >&2;} + { (exit 1); exit 1; }; } +ac_delim_num=`echo "$ac_subst_vars" | grep -c '$'` +ac_delim='%!_!# ' +for ac_last_try in false false false false false :; do + . ./conf$$subs.sh || + { { $as_echo "$as_me:$LINENO: error: could not make $CONFIG_STATUS" >&5 +$as_echo "$as_me: error: could not make $CONFIG_STATUS" >&2;} + { (exit 1); exit 1; }; } + + ac_delim_n=`sed -n "s/.*$ac_delim\$/X/p" conf$$subs.awk | grep -c X` + if test $ac_delim_n = $ac_delim_num; then + break + elif $ac_last_try; then + { { $as_echo "$as_me:$LINENO: error: could not make $CONFIG_STATUS" >&5 +$as_echo "$as_me: error: could not make $CONFIG_STATUS" >&2;} + { (exit 1); exit 1; }; } + else + ac_delim="$ac_delim!$ac_delim _$ac_delim!! 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Preserve backslash +# newline sequences. + +ac_word_re=[_$as_cr_Letters][_$as_cr_alnum]* +sed -n ' +s/.\{148\}/&'"$ac_delim"'/g +t rset +:rset +s/^[ ]*#[ ]*define[ ][ ]*/ / +t def +d +:def +s/\\$// +t bsnl +s/["\\]/\\&/g +s/^ \('"$ac_word_re"'\)\(([^()]*)\)[ ]*\(.*\)/P["\1"]="\2"\ +D["\1"]=" \3"/p +s/^ \('"$ac_word_re"'\)[ ]*\(.*\)/D["\1"]=" \2"/p +d +:bsnl +s/["\\]/\\&/g +s/^ \('"$ac_word_re"'\)\(([^()]*)\)[ ]*\(.*\)/P["\1"]="\2"\ +D["\1"]=" \3\\\\\\n"\\/p +t cont +s/^ \('"$ac_word_re"'\)[ ]*\(.*\)/D["\1"]=" \2\\\\\\n"\\/p +t cont +d +:cont +n +s/.\{148\}/&'"$ac_delim"'/g +t clear +:clear +s/\\$// +t bsnlc +s/["\\]/\\&/g; s/^/"/; s/$/"/p +d +:bsnlc +s/["\\]/\\&/g; s/^/"/; s/$/\\\\\\n"\\/p +b cont +' >$CONFIG_STATUS || ac_write_fail=1 + +cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 + for (key in D) D_is_set[key] = 1 + FS = "" +} +/^[\t ]*#[\t ]*(define|undef)[\t ]+$ac_word_re([\t (]|\$)/ { + line = \$ 0 + split(line, arg, " ") + if (arg[1] == "#") { + defundef = arg[2] + mac1 = arg[3] + } else { + defundef = substr(arg[1], 2) + mac1 = arg[2] + } + split(mac1, mac2, "(") #) + macro = mac2[1] + prefix = substr(line, 1, index(line, defundef) - 1) + if (D_is_set[macro]) { + # Preserve the white space surrounding the "#". + print prefix "define", macro P[macro] D[macro] + next + } else { + # Replace #undef with comments. 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can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA +# 02110-1301, USA. +# +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + + +# Originally written by Per Bothner . +# Please send patches to . Submit a context +# diff and a properly formatted ChangeLog entry. +# +# This script attempts to guess a canonical system name similar to +# config.sub. If it succeeds, it prints the system name on stdout, and +# exits with 0. Otherwise, it exits with 1. +# +# The plan is that this can be called by configure scripts if you +# don't specify an explicit build system type. + +me=`echo "$0" | sed -e 's,.*/,,'` + +usage="\ +Usage: $0 [OPTION] + +Output the configuration name of the system \`$me' is run on. + +Operation modes: + -h, --help print this help, then exit + -t, --time-stamp print date of last modification, then exit + -v, --version print version number, then exit + +Report bugs and patches to ." + +version="\ +GNU config.guess ($timestamp) + +Originally written by Per Bothner. +Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 +Free Software Foundation, Inc. + +This is free software; see the source for copying conditions. There is NO +warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." + +help=" +Try \`$me --help' for more information." + +# Parse command line +while test $# -gt 0 ; do + case $1 in + --time-stamp | --time* | -t ) + echo "$timestamp" ; exit ;; + --version | -v ) + echo "$version" ; exit ;; + --help | --h* | -h ) + echo "$usage"; exit ;; + -- ) # Stop option processing + shift; break ;; + - ) # Use stdin as input. + break ;; + -* ) + echo "$me: invalid option $1$help" >&2 + exit 1 ;; + * ) + break ;; + esac +done + +if test $# != 0; then + echo "$me: too many arguments$help" >&2 + exit 1 +fi + +trap 'exit 1' 1 2 15 + +# CC_FOR_BUILD -- compiler used by this script. Note that the use of a +# compiler to aid in system detection is discouraged as it requires +# temporary files to be created and, as you can see below, it is a +# headache to deal with in a portable fashion. + +# Historically, `CC_FOR_BUILD' used to be named `HOST_CC'. We still +# use `HOST_CC' if defined, but it is deprecated. + +# Portable tmp directory creation inspired by the Autoconf team. + +set_cc_for_build=' +trap "exitcode=\$?; (rm -f \$tmpfiles 2>/dev/null; rmdir \$tmp 2>/dev/null) && exit \$exitcode" 0 ; +trap "rm -f \$tmpfiles 2>/dev/null; rmdir \$tmp 2>/dev/null; exit 1" 1 2 13 15 ; +: ${TMPDIR=/tmp} ; + { tmp=`(umask 077 && mktemp -d "$TMPDIR/cgXXXXXX") 2>/dev/null` && test -n "$tmp" && test -d "$tmp" ; } || + { test -n "$RANDOM" && tmp=$TMPDIR/cg$$-$RANDOM && (umask 077 && mkdir $tmp) ; } || + { tmp=$TMPDIR/cg-$$ && (umask 077 && mkdir $tmp) && echo "Warning: creating insecure temp directory" >&2 ; } || + { echo "$me: cannot create a temporary directory in $TMPDIR" >&2 ; exit 1 ; } ; +dummy=$tmp/dummy ; +tmpfiles="$dummy.c $dummy.o $dummy.rel $dummy" ; +case $CC_FOR_BUILD,$HOST_CC,$CC in + ,,) echo "int x;" > $dummy.c ; + for c in cc gcc c89 c99 ; do + if ($c -c -o $dummy.o $dummy.c) >/dev/null 2>&1 ; then + CC_FOR_BUILD="$c"; break ; + fi ; + done ; + if test x"$CC_FOR_BUILD" = x ; then + CC_FOR_BUILD=no_compiler_found ; + fi + ;; + ,,*) CC_FOR_BUILD=$CC ;; + ,*,*) CC_FOR_BUILD=$HOST_CC ;; +esac ; set_cc_for_build= ;' + +# This is needed to find uname on a Pyramid OSx when run in the BSD universe. +# (ghazi@noc.rutgers.edu 1994-08-24) +if (test -f /.attbin/uname) >/dev/null 2>&1 ; then + PATH=$PATH:/.attbin ; export PATH +fi + +UNAME_MACHINE=`(uname -m) 2>/dev/null` || UNAME_MACHINE=unknown +UNAME_RELEASE=`(uname -r) 2>/dev/null` || UNAME_RELEASE=unknown +UNAME_SYSTEM=`(uname -s) 2>/dev/null` || UNAME_SYSTEM=unknown +UNAME_VERSION=`(uname -v) 2>/dev/null` || UNAME_VERSION=unknown + +# Note: order is significant - the case branches are not exclusive. + +case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in + *:NetBSD:*:*) + # NetBSD (nbsd) targets should (where applicable) match one or + # more of the tupples: *-*-netbsdelf*, *-*-netbsdaout*, + # *-*-netbsdecoff* and *-*-netbsd*. For targets that recently + # switched to ELF, *-*-netbsd* would select the old + # object file format. This provides both forward + # compatibility and a consistent mechanism for selecting the + # object file format. + # + # Note: NetBSD doesn't particularly care about the vendor + # portion of the name. We always set it to "unknown". + sysctl="sysctl -n hw.machine_arch" + UNAME_MACHINE_ARCH=`(/sbin/$sysctl 2>/dev/null || \ + /usr/sbin/$sysctl 2>/dev/null || echo unknown)` + case "${UNAME_MACHINE_ARCH}" in + armeb) machine=armeb-unknown ;; + arm*) machine=arm-unknown ;; + sh3el) machine=shl-unknown ;; + sh3eb) machine=sh-unknown ;; + sh5el) machine=sh5le-unknown ;; + *) machine=${UNAME_MACHINE_ARCH}-unknown ;; + esac + # The Operating System including object format, if it has switched + # to ELF recently, or will in the future. + case "${UNAME_MACHINE_ARCH}" in + arm*|i386|m68k|ns32k|sh3*|sparc|vax) + eval $set_cc_for_build + if echo __ELF__ | $CC_FOR_BUILD -E - 2>/dev/null \ + | grep __ELF__ >/dev/null + then + # Once all utilities can be ECOFF (netbsdecoff) or a.out (netbsdaout). + # Return netbsd for either. FIX? + os=netbsd + else + os=netbsdelf + fi + ;; + *) + os=netbsd + ;; + esac + # The OS release + # Debian GNU/NetBSD machines have a different userland, and + # thus, need a distinct triplet. However, they do not need + # kernel version information, so it can be replaced with a + # suitable tag, in the style of linux-gnu. + case "${UNAME_VERSION}" in + Debian*) + release='-gnu' + ;; + *) + release=`echo ${UNAME_RELEASE}|sed -e 's/[-_].*/\./'` + ;; + esac + # Since CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM: + # contains redundant information, the shorter form: + # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM is used. + echo "${machine}-${os}${release}" + exit ;; + *:OpenBSD:*:*) + UNAME_MACHINE_ARCH=`arch | sed 's/OpenBSD.//'` + echo ${UNAME_MACHINE_ARCH}-unknown-openbsd${UNAME_RELEASE} + exit ;; + *:ekkoBSD:*:*) + echo ${UNAME_MACHINE}-unknown-ekkobsd${UNAME_RELEASE} + exit ;; + *:SolidBSD:*:*) + echo ${UNAME_MACHINE}-unknown-solidbsd${UNAME_RELEASE} + exit ;; + macppc:MirBSD:*:*) + echo powerpc-unknown-mirbsd${UNAME_RELEASE} + exit ;; + *:MirBSD:*:*) + echo ${UNAME_MACHINE}-unknown-mirbsd${UNAME_RELEASE} + exit ;; + alpha:OSF1:*:*) + case $UNAME_RELEASE in + *4.0) + UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $3}'` + ;; + *5.*) + UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $4}'` + ;; + esac + # According to Compaq, /usr/sbin/psrinfo has been available on + # OSF/1 and Tru64 systems produced since 1995. I hope that + # covers most systems running today. This code pipes the CPU + # types through head -n 1, so we only detect the type of CPU 0. + ALPHA_CPU_TYPE=`/usr/sbin/psrinfo -v | sed -n -e 's/^ The alpha \(.*\) processor.*$/\1/p' | head -n 1` + case "$ALPHA_CPU_TYPE" in + "EV4 (21064)") + UNAME_MACHINE="alpha" ;; + "EV4.5 (21064)") + UNAME_MACHINE="alpha" ;; + "LCA4 (21066/21068)") + UNAME_MACHINE="alpha" ;; + "EV5 (21164)") + UNAME_MACHINE="alphaev5" ;; + "EV5.6 (21164A)") + UNAME_MACHINE="alphaev56" ;; + "EV5.6 (21164PC)") + UNAME_MACHINE="alphapca56" ;; + "EV5.7 (21164PC)") + UNAME_MACHINE="alphapca57" ;; + "EV6 (21264)") + UNAME_MACHINE="alphaev6" ;; + "EV6.7 (21264A)") + UNAME_MACHINE="alphaev67" ;; + "EV6.8CB (21264C)") + UNAME_MACHINE="alphaev68" ;; + "EV6.8AL (21264B)") + UNAME_MACHINE="alphaev68" ;; + "EV6.8CX (21264D)") + UNAME_MACHINE="alphaev68" ;; + "EV6.9A (21264/EV69A)") + UNAME_MACHINE="alphaev69" ;; + "EV7 (21364)") + UNAME_MACHINE="alphaev7" ;; + "EV7.9 (21364A)") + UNAME_MACHINE="alphaev79" ;; + esac + # A Pn.n version is a patched version. + # A Vn.n version is a released version. + # A Tn.n version is a released field test version. + # A Xn.n version is an unreleased experimental baselevel. + # 1.2 uses "1.2" for uname -r. + echo ${UNAME_MACHINE}-dec-osf`echo ${UNAME_RELEASE} | sed -e 's/^[PVTX]//' | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` + exit ;; + Alpha\ *:Windows_NT*:*) + # How do we know it's Interix rather than the generic POSIX subsystem? + # Should we change UNAME_MACHINE based on the output of uname instead + # of the specific Alpha model? + echo alpha-pc-interix + exit ;; + 21064:Windows_NT:50:3) + echo alpha-dec-winnt3.5 + exit ;; + Amiga*:UNIX_System_V:4.0:*) + echo m68k-unknown-sysv4 + exit ;; + *:[Aa]miga[Oo][Ss]:*:*) + echo ${UNAME_MACHINE}-unknown-amigaos + exit ;; + *:[Mm]orph[Oo][Ss]:*:*) + echo ${UNAME_MACHINE}-unknown-morphos + exit ;; + *:OS/390:*:*) + echo i370-ibm-openedition + exit ;; + *:z/VM:*:*) + echo s390-ibm-zvmoe + exit ;; + *:OS400:*:*) + echo powerpc-ibm-os400 + exit ;; + arm:RISC*:1.[012]*:*|arm:riscix:1.[012]*:*) + echo arm-acorn-riscix${UNAME_RELEASE} + exit ;; + arm:riscos:*:*|arm:RISCOS:*:*) + echo arm-unknown-riscos + exit ;; + SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*) + echo hppa1.1-hitachi-hiuxmpp + exit ;; + Pyramid*:OSx*:*:* | MIS*:OSx*:*:* | MIS*:SMP_DC-OSx*:*:*) + # akee@wpdis03.wpafb.af.mil (Earle F. Ake) contributed MIS and NILE. + if test "`(/bin/universe) 2>/dev/null`" = att ; then + echo pyramid-pyramid-sysv3 + else + echo pyramid-pyramid-bsd + fi + exit ;; + NILE*:*:*:dcosx) + echo pyramid-pyramid-svr4 + exit ;; + DRS?6000:unix:4.0:6*) + echo sparc-icl-nx6 + exit ;; + DRS?6000:UNIX_SV:4.2*:7* | DRS?6000:isis:4.2*:7*) + case `/usr/bin/uname -p` in + sparc) echo sparc-icl-nx7; exit ;; + esac ;; + sun4H:SunOS:5.*:*) + echo sparc-hal-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + sun4*:SunOS:5.*:* | tadpole*:SunOS:5.*:*) + echo sparc-sun-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + i86pc:SunOS:5.*:* | i86xen:SunOS:5.*:*) + echo i386-pc-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + sun4*:SunOS:6*:*) + # According to config.sub, this is the proper way to canonicalize + # SunOS6. Hard to guess exactly what SunOS6 will be like, but + # it's likely to be more like Solaris than SunOS4. + echo sparc-sun-solaris3`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + sun4*:SunOS:*:*) + case "`/usr/bin/arch -k`" in + Series*|S4*) + UNAME_RELEASE=`uname -v` + ;; + esac + # Japanese Language versions have a version number like `4.1.3-JL'. + echo sparc-sun-sunos`echo ${UNAME_RELEASE}|sed -e 's/-/_/'` + exit ;; + sun3*:SunOS:*:*) + echo m68k-sun-sunos${UNAME_RELEASE} + exit ;; + sun*:*:4.2BSD:*) + UNAME_RELEASE=`(sed 1q /etc/motd | awk '{print substr($5,1,3)}') 2>/dev/null` + test "x${UNAME_RELEASE}" = "x" && UNAME_RELEASE=3 + case "`/bin/arch`" in + sun3) + echo m68k-sun-sunos${UNAME_RELEASE} + ;; + sun4) + echo sparc-sun-sunos${UNAME_RELEASE} + ;; + esac + exit ;; + aushp:SunOS:*:*) + echo sparc-auspex-sunos${UNAME_RELEASE} + exit ;; + # The situation for MiNT is a little confusing. The machine name + # can be virtually everything (everything which is not + # "atarist" or "atariste" at least should have a processor + # > m68000). The system name ranges from "MiNT" over "FreeMiNT" + # to the lowercase version "mint" (or "freemint"). Finally + # the system name "TOS" denotes a system which is actually not + # MiNT. But MiNT is downward compatible to TOS, so this should + # be no problem. + atarist[e]:*MiNT:*:* | atarist[e]:*mint:*:* | atarist[e]:*TOS:*:*) + echo m68k-atari-mint${UNAME_RELEASE} + exit ;; + atari*:*MiNT:*:* | atari*:*mint:*:* | atarist[e]:*TOS:*:*) + echo m68k-atari-mint${UNAME_RELEASE} + exit ;; + *falcon*:*MiNT:*:* | *falcon*:*mint:*:* | *falcon*:*TOS:*:*) + echo m68k-atari-mint${UNAME_RELEASE} + exit ;; + milan*:*MiNT:*:* | milan*:*mint:*:* | *milan*:*TOS:*:*) + echo m68k-milan-mint${UNAME_RELEASE} + exit ;; + hades*:*MiNT:*:* | hades*:*mint:*:* | *hades*:*TOS:*:*) + echo m68k-hades-mint${UNAME_RELEASE} + exit ;; + *:*MiNT:*:* | *:*mint:*:* | *:*TOS:*:*) + echo m68k-unknown-mint${UNAME_RELEASE} + exit ;; + m68k:machten:*:*) + echo m68k-apple-machten${UNAME_RELEASE} + exit ;; + powerpc:machten:*:*) + echo powerpc-apple-machten${UNAME_RELEASE} + exit ;; + RISC*:Mach:*:*) + echo mips-dec-mach_bsd4.3 + exit ;; + RISC*:ULTRIX:*:*) + echo mips-dec-ultrix${UNAME_RELEASE} + exit ;; + VAX*:ULTRIX*:*:*) + echo vax-dec-ultrix${UNAME_RELEASE} + exit ;; + 2020:CLIX:*:* | 2430:CLIX:*:*) + echo clipper-intergraph-clix${UNAME_RELEASE} + exit ;; + mips:*:*:UMIPS | mips:*:*:RISCos) + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c +#ifdef __cplusplus +#include /* for printf() prototype */ + int main (int argc, char *argv[]) { +#else + int main (argc, argv) int argc; char *argv[]; { +#endif + #if defined (host_mips) && defined (MIPSEB) + #if defined (SYSTYPE_SYSV) + printf ("mips-mips-riscos%ssysv\n", argv[1]); exit (0); + #endif + #if defined (SYSTYPE_SVR4) + printf ("mips-mips-riscos%ssvr4\n", argv[1]); exit (0); + #endif + #if defined (SYSTYPE_BSD43) || defined(SYSTYPE_BSD) + printf ("mips-mips-riscos%sbsd\n", argv[1]); exit (0); + #endif + #endif + exit (-1); + } +EOF + $CC_FOR_BUILD -o $dummy $dummy.c && + dummyarg=`echo "${UNAME_RELEASE}" | sed -n 's/\([0-9]*\).*/\1/p'` && + SYSTEM_NAME=`$dummy $dummyarg` && + { echo "$SYSTEM_NAME"; exit; } + echo mips-mips-riscos${UNAME_RELEASE} + exit ;; + Motorola:PowerMAX_OS:*:*) + echo powerpc-motorola-powermax + exit ;; + Motorola:*:4.3:PL8-*) + echo powerpc-harris-powermax + exit ;; + Night_Hawk:*:*:PowerMAX_OS | Synergy:PowerMAX_OS:*:*) + echo powerpc-harris-powermax + exit ;; + Night_Hawk:Power_UNIX:*:*) + echo powerpc-harris-powerunix + exit ;; + m88k:CX/UX:7*:*) + echo m88k-harris-cxux7 + exit ;; + m88k:*:4*:R4*) + echo m88k-motorola-sysv4 + exit ;; + m88k:*:3*:R3*) + echo m88k-motorola-sysv3 + exit ;; + AViiON:dgux:*:*) + # DG/UX returns AViiON for all architectures + UNAME_PROCESSOR=`/usr/bin/uname -p` + if [ $UNAME_PROCESSOR = mc88100 ] || [ $UNAME_PROCESSOR = mc88110 ] + then + if [ ${TARGET_BINARY_INTERFACE}x = m88kdguxelfx ] || \ + [ ${TARGET_BINARY_INTERFACE}x = x ] + then + echo m88k-dg-dgux${UNAME_RELEASE} + else + echo m88k-dg-dguxbcs${UNAME_RELEASE} + fi + else + echo i586-dg-dgux${UNAME_RELEASE} + fi + exit ;; + M88*:DolphinOS:*:*) # DolphinOS (SVR3) + echo m88k-dolphin-sysv3 + exit ;; + M88*:*:R3*:*) + # Delta 88k system running SVR3 + echo m88k-motorola-sysv3 + exit ;; + XD88*:*:*:*) # Tektronix XD88 system running UTekV (SVR3) + echo m88k-tektronix-sysv3 + exit ;; + Tek43[0-9][0-9]:UTek:*:*) # Tektronix 4300 system running UTek (BSD) + echo m68k-tektronix-bsd + exit ;; + *:IRIX*:*:*) + echo mips-sgi-irix`echo ${UNAME_RELEASE}|sed -e 's/-/_/g'` + exit ;; + ????????:AIX?:[12].1:2) # AIX 2.2.1 or AIX 2.1.1 is RT/PC AIX. + echo romp-ibm-aix # uname -m gives an 8 hex-code CPU id + exit ;; # Note that: echo "'`uname -s`'" gives 'AIX ' + i*86:AIX:*:*) + echo i386-ibm-aix + exit ;; + ia64:AIX:*:*) + if [ -x /usr/bin/oslevel ] ; then + IBM_REV=`/usr/bin/oslevel` + else + IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} + fi + echo ${UNAME_MACHINE}-ibm-aix${IBM_REV} + exit ;; + *:AIX:2:3) + if grep bos325 /usr/include/stdio.h >/dev/null 2>&1; then + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + #include + + main() + { + if (!__power_pc()) + exit(1); + puts("powerpc-ibm-aix3.2.5"); + exit(0); + } +EOF + if $CC_FOR_BUILD -o $dummy $dummy.c && SYSTEM_NAME=`$dummy` + then + echo "$SYSTEM_NAME" + else + echo rs6000-ibm-aix3.2.5 + fi + elif grep bos324 /usr/include/stdio.h >/dev/null 2>&1; then + echo rs6000-ibm-aix3.2.4 + else + echo rs6000-ibm-aix3.2 + fi + exit ;; + *:AIX:*:[45]) + IBM_CPU_ID=`/usr/sbin/lsdev -C -c processor -S available | sed 1q | awk '{ print $1 }'` + if /usr/sbin/lsattr -El ${IBM_CPU_ID} | grep ' POWER' >/dev/null 2>&1; then + IBM_ARCH=rs6000 + else + IBM_ARCH=powerpc + fi + if [ -x /usr/bin/oslevel ] ; then + IBM_REV=`/usr/bin/oslevel` + else + IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} + fi + echo ${IBM_ARCH}-ibm-aix${IBM_REV} + exit ;; + *:AIX:*:*) + echo rs6000-ibm-aix + exit ;; + ibmrt:4.4BSD:*|romp-ibm:BSD:*) + echo romp-ibm-bsd4.4 + exit ;; + ibmrt:*BSD:*|romp-ibm:BSD:*) # covers RT/PC BSD and + echo romp-ibm-bsd${UNAME_RELEASE} # 4.3 with uname added to + exit ;; # report: romp-ibm BSD 4.3 + *:BOSX:*:*) + echo rs6000-bull-bosx + exit ;; + DPX/2?00:B.O.S.:*:*) + echo m68k-bull-sysv3 + exit ;; + 9000/[34]??:4.3bsd:1.*:*) + echo m68k-hp-bsd + exit ;; + hp300:4.4BSD:*:* | 9000/[34]??:4.3bsd:2.*:*) + echo m68k-hp-bsd4.4 + exit ;; + 9000/[34678]??:HP-UX:*:*) + HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` + case "${UNAME_MACHINE}" in + 9000/31? ) HP_ARCH=m68000 ;; + 9000/[34]?? ) HP_ARCH=m68k ;; + 9000/[678][0-9][0-9]) + if [ -x /usr/bin/getconf ]; then + sc_cpu_version=`/usr/bin/getconf SC_CPU_VERSION 2>/dev/null` + sc_kernel_bits=`/usr/bin/getconf SC_KERNEL_BITS 2>/dev/null` + case "${sc_cpu_version}" in + 523) HP_ARCH="hppa1.0" ;; # CPU_PA_RISC1_0 + 528) HP_ARCH="hppa1.1" ;; # CPU_PA_RISC1_1 + 532) # CPU_PA_RISC2_0 + case "${sc_kernel_bits}" in + 32) HP_ARCH="hppa2.0n" ;; + 64) HP_ARCH="hppa2.0w" ;; + '') HP_ARCH="hppa2.0" ;; # HP-UX 10.20 + esac ;; + esac + fi + if [ "${HP_ARCH}" = "" ]; then + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + + #define _HPUX_SOURCE + #include + #include + + int main () + { + #if defined(_SC_KERNEL_BITS) + long bits = sysconf(_SC_KERNEL_BITS); + #endif + long cpu = sysconf (_SC_CPU_VERSION); + + switch (cpu) + { + case CPU_PA_RISC1_0: puts ("hppa1.0"); break; + case CPU_PA_RISC1_1: puts ("hppa1.1"); break; + case CPU_PA_RISC2_0: + #if defined(_SC_KERNEL_BITS) + switch (bits) + { + case 64: puts ("hppa2.0w"); break; + case 32: puts ("hppa2.0n"); break; + default: puts ("hppa2.0"); break; + } break; + #else /* !defined(_SC_KERNEL_BITS) */ + puts ("hppa2.0"); break; + #endif + default: puts ("hppa1.0"); break; + } + exit (0); + } +EOF + (CCOPTS= $CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null) && HP_ARCH=`$dummy` + test -z "$HP_ARCH" && HP_ARCH=hppa + fi ;; + esac + if [ ${HP_ARCH} = "hppa2.0w" ] + then + eval $set_cc_for_build + + # hppa2.0w-hp-hpux* has a 64-bit kernel and a compiler generating + # 32-bit code. hppa64-hp-hpux* has the same kernel and a compiler + # generating 64-bit code. GNU and HP use different nomenclature: + # + # $ CC_FOR_BUILD=cc ./config.guess + # => hppa2.0w-hp-hpux11.23 + # $ CC_FOR_BUILD="cc +DA2.0w" ./config.guess + # => hppa64-hp-hpux11.23 + + if echo __LP64__ | (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | + grep __LP64__ >/dev/null + then + HP_ARCH="hppa2.0w" + else + HP_ARCH="hppa64" + fi + fi + echo ${HP_ARCH}-hp-hpux${HPUX_REV} + exit ;; + ia64:HP-UX:*:*) + HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` + echo ia64-hp-hpux${HPUX_REV} + exit ;; + 3050*:HI-UX:*:*) + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + #include + int + main () + { + long cpu = sysconf (_SC_CPU_VERSION); + /* The order matters, because CPU_IS_HP_MC68K erroneously returns + true for CPU_PA_RISC1_0. CPU_IS_PA_RISC returns correct + results, however. */ + if (CPU_IS_PA_RISC (cpu)) + { + switch (cpu) + { + case CPU_PA_RISC1_0: puts ("hppa1.0-hitachi-hiuxwe2"); break; + case CPU_PA_RISC1_1: puts ("hppa1.1-hitachi-hiuxwe2"); break; + case CPU_PA_RISC2_0: puts ("hppa2.0-hitachi-hiuxwe2"); break; + default: puts ("hppa-hitachi-hiuxwe2"); break; + } + } + else if (CPU_IS_HP_MC68K (cpu)) + puts ("m68k-hitachi-hiuxwe2"); + else puts ("unknown-hitachi-hiuxwe2"); + exit (0); + } +EOF + $CC_FOR_BUILD -o $dummy $dummy.c && SYSTEM_NAME=`$dummy` && + { echo "$SYSTEM_NAME"; exit; } + echo unknown-hitachi-hiuxwe2 + exit ;; + 9000/7??:4.3bsd:*:* | 9000/8?[79]:4.3bsd:*:* ) + echo hppa1.1-hp-bsd + exit ;; + 9000/8??:4.3bsd:*:*) + echo hppa1.0-hp-bsd + exit ;; + *9??*:MPE/iX:*:* | *3000*:MPE/iX:*:*) + echo hppa1.0-hp-mpeix + exit ;; + hp7??:OSF1:*:* | hp8?[79]:OSF1:*:* ) + echo hppa1.1-hp-osf + exit ;; + hp8??:OSF1:*:*) + echo hppa1.0-hp-osf + exit ;; + i*86:OSF1:*:*) + if [ -x /usr/sbin/sysversion ] ; then + echo ${UNAME_MACHINE}-unknown-osf1mk + else + echo ${UNAME_MACHINE}-unknown-osf1 + fi + exit ;; + parisc*:Lites*:*:*) + echo hppa1.1-hp-lites + exit ;; + C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*) + echo c1-convex-bsd + exit ;; + C2*:ConvexOS:*:* | convex:ConvexOS:C2*:*) + if getsysinfo -f scalar_acc + then echo c32-convex-bsd + else echo c2-convex-bsd + fi + exit ;; + C34*:ConvexOS:*:* | convex:ConvexOS:C34*:*) + echo c34-convex-bsd + exit ;; + C38*:ConvexOS:*:* | convex:ConvexOS:C38*:*) + echo c38-convex-bsd + exit ;; + C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*) + echo c4-convex-bsd + exit ;; + CRAY*Y-MP:*:*:*) + echo ymp-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit ;; + CRAY*[A-Z]90:*:*:*) + echo ${UNAME_MACHINE}-cray-unicos${UNAME_RELEASE} \ + | sed -e 's/CRAY.*\([A-Z]90\)/\1/' \ + -e y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/ \ + -e 's/\.[^.]*$/.X/' + exit ;; + CRAY*TS:*:*:*) + echo t90-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit ;; + CRAY*T3E:*:*:*) + echo alphaev5-cray-unicosmk${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit ;; + CRAY*SV1:*:*:*) + echo sv1-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit ;; + *:UNICOS/mp:*:*) + echo craynv-cray-unicosmp${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit ;; + F30[01]:UNIX_System_V:*:* | F700:UNIX_System_V:*:*) + FUJITSU_PROC=`uname -m | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` + FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` + FUJITSU_REL=`echo ${UNAME_RELEASE} | sed -e 's/ /_/'` + echo "${FUJITSU_PROC}-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" + exit ;; + 5000:UNIX_System_V:4.*:*) + FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` + FUJITSU_REL=`echo ${UNAME_RELEASE} | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/ /_/'` + echo "sparc-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" + exit ;; + i*86:BSD/386:*:* | i*86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*) + echo ${UNAME_MACHINE}-pc-bsdi${UNAME_RELEASE} + exit ;; + sparc*:BSD/OS:*:*) + echo sparc-unknown-bsdi${UNAME_RELEASE} + exit ;; + *:BSD/OS:*:*) + echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE} + exit ;; + *:FreeBSD:*:*) + case ${UNAME_MACHINE} in + pc98) + echo i386-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; + amd64) + echo x86_64-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; + *) + echo ${UNAME_MACHINE}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; + esac + exit ;; + i*:CYGWIN*:*) + echo ${UNAME_MACHINE}-pc-cygwin + exit ;; + *:MINGW*:*) + echo ${UNAME_MACHINE}-pc-mingw32 + exit ;; + i*:windows32*:*) + # uname -m includes "-pc" on this system. + echo ${UNAME_MACHINE}-mingw32 + exit ;; + i*:PW*:*) + echo ${UNAME_MACHINE}-pc-pw32 + exit ;; + *:Interix*:[3456]*) + case ${UNAME_MACHINE} in + x86) + echo i586-pc-interix${UNAME_RELEASE} + exit ;; + EM64T | authenticamd) + echo x86_64-unknown-interix${UNAME_RELEASE} + exit ;; + esac ;; + [345]86:Windows_95:* | [345]86:Windows_98:* | [345]86:Windows_NT:*) + echo i${UNAME_MACHINE}-pc-mks + exit ;; + i*:Windows_NT*:* | Pentium*:Windows_NT*:*) + # How do we know it's Interix rather than the generic POSIX subsystem? + # It also conflicts with pre-2.0 versions of AT&T UWIN. Should we + # UNAME_MACHINE based on the output of uname instead of i386? + echo i586-pc-interix + exit ;; + i*:UWIN*:*) + echo ${UNAME_MACHINE}-pc-uwin + exit ;; + amd64:CYGWIN*:*:* | x86_64:CYGWIN*:*:*) + echo x86_64-unknown-cygwin + exit ;; + p*:CYGWIN*:*) + echo powerpcle-unknown-cygwin + exit ;; + prep*:SunOS:5.*:*) + echo powerpcle-unknown-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + *:GNU:*:*) + # the GNU system + echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-gnu`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'` + exit ;; + *:GNU/*:*:*) + # other systems with GNU libc and userland + echo ${UNAME_MACHINE}-unknown-`echo ${UNAME_SYSTEM} | sed 's,^[^/]*/,,' | tr '[A-Z]' '[a-z]'``echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`-gnu + exit ;; + i*86:Minix:*:*) + echo ${UNAME_MACHINE}-pc-minix + exit ;; + arm*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + avr32*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + cris:Linux:*:*) + echo cris-axis-linux-gnu + exit ;; + crisv32:Linux:*:*) + echo crisv32-axis-linux-gnu + exit ;; + frv:Linux:*:*) + echo frv-unknown-linux-gnu + exit ;; + ia64:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + m32r*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + m68*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + mips:Linux:*:*) + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + #undef CPU + #undef mips + #undef mipsel + #if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL) + CPU=mipsel + #else + #if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB) + CPU=mips + #else + CPU= + #endif + #endif +EOF + eval "`$CC_FOR_BUILD -E $dummy.c 2>/dev/null | sed -n ' + /^CPU/{ + s: ::g + p + }'`" + test x"${CPU}" != x && { echo "${CPU}-unknown-linux-gnu"; exit; } + ;; + mips64:Linux:*:*) + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + #undef CPU + #undef mips64 + #undef mips64el + #if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL) + CPU=mips64el + #else + #if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB) + CPU=mips64 + #else + CPU= + #endif + #endif +EOF + eval "`$CC_FOR_BUILD -E $dummy.c 2>/dev/null | sed -n ' + /^CPU/{ + s: ::g + p + }'`" + test x"${CPU}" != x && { echo "${CPU}-unknown-linux-gnu"; exit; } + ;; + or32:Linux:*:*) + echo or32-unknown-linux-gnu + exit ;; + ppc:Linux:*:*) + echo powerpc-unknown-linux-gnu + exit ;; + ppc64:Linux:*:*) + echo powerpc64-unknown-linux-gnu + exit ;; + alpha:Linux:*:*) + case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in + EV5) UNAME_MACHINE=alphaev5 ;; + EV56) UNAME_MACHINE=alphaev56 ;; + PCA56) UNAME_MACHINE=alphapca56 ;; + PCA57) UNAME_MACHINE=alphapca56 ;; + EV6) UNAME_MACHINE=alphaev6 ;; + EV67) UNAME_MACHINE=alphaev67 ;; + EV68*) UNAME_MACHINE=alphaev68 ;; + esac + objdump --private-headers /bin/sh | grep ld.so.1 >/dev/null + if test "$?" = 0 ; then LIBC="libc1" ; else LIBC="" ; fi + echo ${UNAME_MACHINE}-unknown-linux-gnu${LIBC} + exit ;; + parisc:Linux:*:* | hppa:Linux:*:*) + # Look for CPU level + case `grep '^cpu[^a-z]*:' /proc/cpuinfo 2>/dev/null | cut -d' ' -f2` in + PA7*) echo hppa1.1-unknown-linux-gnu ;; + PA8*) echo hppa2.0-unknown-linux-gnu ;; + *) echo hppa-unknown-linux-gnu ;; + esac + exit ;; + parisc64:Linux:*:* | hppa64:Linux:*:*) + echo hppa64-unknown-linux-gnu + exit ;; + s390:Linux:*:* | s390x:Linux:*:*) + echo ${UNAME_MACHINE}-ibm-linux + exit ;; + sh64*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + sh*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + sparc:Linux:*:* | sparc64:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + vax:Linux:*:*) + echo ${UNAME_MACHINE}-dec-linux-gnu + exit ;; + x86_64:Linux:*:*) + echo x86_64-unknown-linux-gnu + exit ;; + xtensa:Linux:*:*) + echo xtensa-unknown-linux-gnu + exit ;; + i*86:Linux:*:*) + # The BFD linker knows what the default object file format is, so + # first see if it will tell us. cd to the root directory to prevent + # problems with other programs or directories called `ld' in the path. + # Set LC_ALL=C to ensure ld outputs messages in English. + ld_supported_targets=`cd /; LC_ALL=C ld --help 2>&1 \ + | sed -ne '/supported targets:/!d + s/[ ][ ]*/ /g + s/.*supported targets: *// + s/ .*// + p'` + case "$ld_supported_targets" in + elf32-i386) + TENTATIVE="${UNAME_MACHINE}-pc-linux-gnu" + ;; + a.out-i386-linux) + echo "${UNAME_MACHINE}-pc-linux-gnuaout" + exit ;; + coff-i386) + echo "${UNAME_MACHINE}-pc-linux-gnucoff" + exit ;; + "") + # Either a pre-BFD a.out linker (linux-gnuoldld) or + # one that does not give us useful --help. + echo "${UNAME_MACHINE}-pc-linux-gnuoldld" + exit ;; + esac + # Determine whether the default compiler is a.out or elf + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + #include + #ifdef __ELF__ + # ifdef __GLIBC__ + # if __GLIBC__ >= 2 + LIBC=gnu + # else + LIBC=gnulibc1 + # endif + # else + LIBC=gnulibc1 + # endif + #else + #if defined(__INTEL_COMPILER) || defined(__PGI) || defined(__SUNPRO_C) || defined(__SUNPRO_CC) + LIBC=gnu + #else + LIBC=gnuaout + #endif + #endif + #ifdef __dietlibc__ + LIBC=dietlibc + #endif +EOF + eval "`$CC_FOR_BUILD -E $dummy.c 2>/dev/null | sed -n ' + /^LIBC/{ + s: ::g + p + }'`" + test x"${LIBC}" != x && { + echo "${UNAME_MACHINE}-pc-linux-${LIBC}" + exit + } + test x"${TENTATIVE}" != x && { echo "${TENTATIVE}"; exit; } + ;; + i*86:DYNIX/ptx:4*:*) + # ptx 4.0 does uname -s correctly, with DYNIX/ptx in there. + # earlier versions are messed up and put the nodename in both + # sysname and nodename. + echo i386-sequent-sysv4 + exit ;; + i*86:UNIX_SV:4.2MP:2.*) + # Unixware is an offshoot of SVR4, but it has its own version + # number series starting with 2... + # I am not positive that other SVR4 systems won't match this, + # I just have to hope. -- rms. + # Use sysv4.2uw... so that sysv4* matches it. + echo ${UNAME_MACHINE}-pc-sysv4.2uw${UNAME_VERSION} + exit ;; + i*86:OS/2:*:*) + # If we were able to find `uname', then EMX Unix compatibility + # is probably installed. + echo ${UNAME_MACHINE}-pc-os2-emx + exit ;; + i*86:XTS-300:*:STOP) + echo ${UNAME_MACHINE}-unknown-stop + exit ;; + i*86:atheos:*:*) + echo ${UNAME_MACHINE}-unknown-atheos + exit ;; + i*86:syllable:*:*) + echo ${UNAME_MACHINE}-pc-syllable + exit ;; + i*86:LynxOS:2.*:* | i*86:LynxOS:3.[01]*:* | i*86:LynxOS:4.0*:*) + echo i386-unknown-lynxos${UNAME_RELEASE} + exit ;; + i*86:*DOS:*:*) + echo ${UNAME_MACHINE}-pc-msdosdjgpp + exit ;; + i*86:*:4.*:* | i*86:SYSTEM_V:4.*:*) + UNAME_REL=`echo ${UNAME_RELEASE} | sed 's/\/MP$//'` + if grep Novell /usr/include/link.h >/dev/null 2>/dev/null; then + echo ${UNAME_MACHINE}-univel-sysv${UNAME_REL} + else + echo ${UNAME_MACHINE}-pc-sysv${UNAME_REL} + fi + exit ;; + i*86:*:5:[678]*) + # UnixWare 7.x, OpenUNIX and OpenServer 6. + case `/bin/uname -X | grep "^Machine"` in + *486*) UNAME_MACHINE=i486 ;; + *Pentium) UNAME_MACHINE=i586 ;; + *Pent*|*Celeron) UNAME_MACHINE=i686 ;; + esac + echo ${UNAME_MACHINE}-unknown-sysv${UNAME_RELEASE}${UNAME_SYSTEM}${UNAME_VERSION} + exit ;; + i*86:*:3.2:*) + if test -f /usr/options/cb.name; then + UNAME_REL=`sed -n 's/.*Version //p' /dev/null >/dev/null ; then + UNAME_REL=`(/bin/uname -X|grep Release|sed -e 's/.*= //')` + (/bin/uname -X|grep i80486 >/dev/null) && UNAME_MACHINE=i486 + (/bin/uname -X|grep '^Machine.*Pentium' >/dev/null) \ + && UNAME_MACHINE=i586 + (/bin/uname -X|grep '^Machine.*Pent *II' >/dev/null) \ + && UNAME_MACHINE=i686 + (/bin/uname -X|grep '^Machine.*Pentium Pro' >/dev/null) \ + && UNAME_MACHINE=i686 + echo ${UNAME_MACHINE}-pc-sco$UNAME_REL + else + echo ${UNAME_MACHINE}-pc-sysv32 + fi + exit ;; + pc:*:*:*) + # Left here for compatibility: + # uname -m prints for DJGPP always 'pc', but it prints nothing about + # the processor, so we play safe by assuming i386. + echo i386-pc-msdosdjgpp + exit ;; + Intel:Mach:3*:*) + echo i386-pc-mach3 + exit ;; + paragon:*:*:*) + echo i860-intel-osf1 + exit ;; + i860:*:4.*:*) # i860-SVR4 + if grep Stardent /usr/include/sys/uadmin.h >/dev/null 2>&1 ; then + echo i860-stardent-sysv${UNAME_RELEASE} # Stardent Vistra i860-SVR4 + else # Add other i860-SVR4 vendors below as they are discovered. + echo i860-unknown-sysv${UNAME_RELEASE} # Unknown i860-SVR4 + fi + exit ;; + mini*:CTIX:SYS*5:*) + # "miniframe" + echo m68010-convergent-sysv + exit ;; + mc68k:UNIX:SYSTEM5:3.51m) + echo m68k-convergent-sysv + exit ;; + M680?0:D-NIX:5.3:*) + echo m68k-diab-dnix + exit ;; + M68*:*:R3V[5678]*:*) + test -r /sysV68 && { echo 'm68k-motorola-sysv'; exit; } ;; + 3[345]??:*:4.0:3.0 | 3[34]??A:*:4.0:3.0 | 3[34]??,*:*:4.0:3.0 | 3[34]??/*:*:4.0:3.0 | 4400:*:4.0:3.0 | 4850:*:4.0:3.0 | SKA40:*:4.0:3.0 | SDS2:*:4.0:3.0 | SHG2:*:4.0:3.0 | S7501*:*:4.0:3.0) + OS_REL='' + test -r /etc/.relid \ + && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` + /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ + && { echo i486-ncr-sysv4.3${OS_REL}; exit; } + /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \ + && { echo i586-ncr-sysv4.3${OS_REL}; exit; } ;; + 3[34]??:*:4.0:* | 3[34]??,*:*:4.0:*) + /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ + && { echo i486-ncr-sysv4; exit; } ;; + m68*:LynxOS:2.*:* | m68*:LynxOS:3.0*:*) + echo m68k-unknown-lynxos${UNAME_RELEASE} + exit ;; + mc68030:UNIX_System_V:4.*:*) + echo m68k-atari-sysv4 + exit ;; + TSUNAMI:LynxOS:2.*:*) + echo sparc-unknown-lynxos${UNAME_RELEASE} + exit ;; + rs6000:LynxOS:2.*:*) + echo rs6000-unknown-lynxos${UNAME_RELEASE} + exit ;; + PowerPC:LynxOS:2.*:* | PowerPC:LynxOS:3.[01]*:* | PowerPC:LynxOS:4.0*:*) + echo powerpc-unknown-lynxos${UNAME_RELEASE} + exit ;; + SM[BE]S:UNIX_SV:*:*) + echo mips-dde-sysv${UNAME_RELEASE} + exit ;; + RM*:ReliantUNIX-*:*:*) + echo mips-sni-sysv4 + exit ;; + RM*:SINIX-*:*:*) + echo mips-sni-sysv4 + exit ;; + *:SINIX-*:*:*) + if uname -p 2>/dev/null >/dev/null ; then + UNAME_MACHINE=`(uname -p) 2>/dev/null` + echo ${UNAME_MACHINE}-sni-sysv4 + else + echo ns32k-sni-sysv + fi + exit ;; + PENTIUM:*:4.0*:*) # Unisys `ClearPath HMP IX 4000' SVR4/MP effort + # says + echo i586-unisys-sysv4 + exit ;; + *:UNIX_System_V:4*:FTX*) + # From Gerald Hewes . + # How about differentiating between stratus architectures? -djm + echo hppa1.1-stratus-sysv4 + exit ;; + *:*:*:FTX*) + # From seanf@swdc.stratus.com. + echo i860-stratus-sysv4 + exit ;; + i*86:VOS:*:*) + # From Paul.Green@stratus.com. + echo ${UNAME_MACHINE}-stratus-vos + exit ;; + *:VOS:*:*) + # From Paul.Green@stratus.com. + echo hppa1.1-stratus-vos + exit ;; + mc68*:A/UX:*:*) + echo m68k-apple-aux${UNAME_RELEASE} + exit ;; + news*:NEWS-OS:6*:*) + echo mips-sony-newsos6 + exit ;; + R[34]000:*System_V*:*:* | R4000:UNIX_SYSV:*:* | R*000:UNIX_SV:*:*) + if [ -d /usr/nec ]; then + echo mips-nec-sysv${UNAME_RELEASE} + else + echo mips-unknown-sysv${UNAME_RELEASE} + fi + exit ;; + BeBox:BeOS:*:*) # BeOS running on hardware made by Be, PPC only. + echo powerpc-be-beos + exit ;; + BeMac:BeOS:*:*) # BeOS running on Mac or Mac clone, PPC only. + echo powerpc-apple-beos + exit ;; + BePC:BeOS:*:*) # BeOS running on Intel PC compatible. + echo i586-pc-beos + exit ;; + SX-4:SUPER-UX:*:*) + echo sx4-nec-superux${UNAME_RELEASE} + exit ;; + SX-5:SUPER-UX:*:*) + echo sx5-nec-superux${UNAME_RELEASE} + exit ;; + SX-6:SUPER-UX:*:*) + echo sx6-nec-superux${UNAME_RELEASE} + exit ;; + SX-7:SUPER-UX:*:*) + echo sx7-nec-superux${UNAME_RELEASE} + exit ;; + SX-8:SUPER-UX:*:*) + echo sx8-nec-superux${UNAME_RELEASE} + exit ;; + SX-8R:SUPER-UX:*:*) + echo sx8r-nec-superux${UNAME_RELEASE} + exit ;; + Power*:Rhapsody:*:*) + echo powerpc-apple-rhapsody${UNAME_RELEASE} + exit ;; + *:Rhapsody:*:*) + echo ${UNAME_MACHINE}-apple-rhapsody${UNAME_RELEASE} + exit ;; + *:Darwin:*:*) + UNAME_PROCESSOR=`uname -p` || UNAME_PROCESSOR=unknown + case $UNAME_PROCESSOR in + unknown) UNAME_PROCESSOR=powerpc ;; + esac + echo ${UNAME_PROCESSOR}-apple-darwin${UNAME_RELEASE} + exit ;; + *:procnto*:*:* | *:QNX:[0123456789]*:*) + UNAME_PROCESSOR=`uname -p` + if test "$UNAME_PROCESSOR" = "x86"; then + UNAME_PROCESSOR=i386 + UNAME_MACHINE=pc + fi + echo ${UNAME_PROCESSOR}-${UNAME_MACHINE}-nto-qnx${UNAME_RELEASE} + exit ;; + *:QNX:*:4*) + echo i386-pc-qnx + exit ;; + NSE-?:NONSTOP_KERNEL:*:*) + echo nse-tandem-nsk${UNAME_RELEASE} + exit ;; + NSR-?:NONSTOP_KERNEL:*:*) + echo nsr-tandem-nsk${UNAME_RELEASE} + exit ;; + *:NonStop-UX:*:*) + echo mips-compaq-nonstopux + exit ;; + BS2000:POSIX*:*:*) + echo bs2000-siemens-sysv + exit ;; + DS/*:UNIX_System_V:*:*) + echo ${UNAME_MACHINE}-${UNAME_SYSTEM}-${UNAME_RELEASE} + exit ;; + *:Plan9:*:*) + # "uname -m" is not consistent, so use $cputype instead. 386 + # is converted to i386 for consistency with other x86 + # operating systems. + if test "$cputype" = "386"; then + UNAME_MACHINE=i386 + else + UNAME_MACHINE="$cputype" + fi + echo ${UNAME_MACHINE}-unknown-plan9 + exit ;; + *:TOPS-10:*:*) + echo pdp10-unknown-tops10 + exit ;; + *:TENEX:*:*) + echo pdp10-unknown-tenex + exit ;; + KS10:TOPS-20:*:* | KL10:TOPS-20:*:* | TYPE4:TOPS-20:*:*) + echo pdp10-dec-tops20 + exit ;; + XKL-1:TOPS-20:*:* | TYPE5:TOPS-20:*:*) + echo pdp10-xkl-tops20 + exit ;; + *:TOPS-20:*:*) + echo pdp10-unknown-tops20 + exit ;; + *:ITS:*:*) + echo pdp10-unknown-its + exit ;; + SEI:*:*:SEIUX) + echo mips-sei-seiux${UNAME_RELEASE} + exit ;; + *:DragonFly:*:*) + echo ${UNAME_MACHINE}-unknown-dragonfly`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` + exit ;; + *:*VMS:*:*) + UNAME_MACHINE=`(uname -p) 2>/dev/null` + case "${UNAME_MACHINE}" in + A*) echo alpha-dec-vms ; exit ;; + I*) echo ia64-dec-vms ; exit ;; + V*) echo vax-dec-vms ; exit ;; + esac ;; + *:XENIX:*:SysV) + echo i386-pc-xenix + exit ;; + i*86:skyos:*:*) + echo ${UNAME_MACHINE}-pc-skyos`echo ${UNAME_RELEASE}` | sed -e 's/ .*$//' + exit ;; + i*86:rdos:*:*) + echo ${UNAME_MACHINE}-pc-rdos + exit ;; +esac + +#echo '(No uname command or uname output not recognized.)' 1>&2 +#echo "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" 1>&2 + +eval $set_cc_for_build +cat >$dummy.c < +# include +#endif +main () +{ +#if defined (sony) +#if defined (MIPSEB) + /* BFD wants "bsd" instead of "newsos". Perhaps BFD should be changed, + I don't know.... */ + printf ("mips-sony-bsd\n"); exit (0); +#else +#include + printf ("m68k-sony-newsos%s\n", +#ifdef NEWSOS4 + "4" +#else + "" +#endif + ); exit (0); +#endif +#endif + +#if defined (__arm) && defined (__acorn) && defined (__unix) + printf ("arm-acorn-riscix\n"); exit (0); +#endif + +#if defined (hp300) && !defined (hpux) + printf ("m68k-hp-bsd\n"); exit (0); +#endif + +#if defined (NeXT) +#if !defined (__ARCHITECTURE__) +#define __ARCHITECTURE__ "m68k" +#endif + int version; + version=`(hostinfo | sed -n 's/.*NeXT Mach \([0-9]*\).*/\1/p') 2>/dev/null`; + if (version < 4) + printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version); + else + printf ("%s-next-openstep%d\n", __ARCHITECTURE__, version); + exit (0); +#endif + +#if defined (MULTIMAX) || defined (n16) +#if defined (UMAXV) + printf ("ns32k-encore-sysv\n"); exit (0); +#else +#if defined (CMU) + printf ("ns32k-encore-mach\n"); exit (0); +#else + printf ("ns32k-encore-bsd\n"); exit (0); +#endif +#endif +#endif + +#if defined (__386BSD__) + printf ("i386-pc-bsd\n"); exit (0); +#endif + +#if defined (sequent) +#if defined (i386) + printf ("i386-sequent-dynix\n"); exit (0); +#endif +#if defined (ns32000) + printf ("ns32k-sequent-dynix\n"); exit (0); +#endif +#endif + +#if defined (_SEQUENT_) + struct utsname un; + + uname(&un); + + if (strncmp(un.version, "V2", 2) == 0) { + printf ("i386-sequent-ptx2\n"); exit (0); + } + if (strncmp(un.version, "V1", 2) == 0) { /* XXX is V1 correct? */ + printf ("i386-sequent-ptx1\n"); exit (0); + } + printf ("i386-sequent-ptx\n"); exit (0); + +#endif + +#if defined (vax) +# if !defined (ultrix) +# include +# if defined (BSD) +# if BSD == 43 + printf ("vax-dec-bsd4.3\n"); exit (0); +# else +# if BSD == 199006 + printf ("vax-dec-bsd4.3reno\n"); exit (0); +# else + printf ("vax-dec-bsd\n"); exit (0); +# endif +# endif +# else + printf ("vax-dec-bsd\n"); exit (0); +# endif +# else + printf ("vax-dec-ultrix\n"); exit (0); +# endif +#endif + +#if defined (alliant) && defined (i860) + printf ("i860-alliant-bsd\n"); exit (0); +#endif + + exit (1); +} +EOF + +$CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null && SYSTEM_NAME=`$dummy` && + { echo "$SYSTEM_NAME"; exit; } + +# Apollos put the system type in the environment. + +test -d /usr/apollo && { echo ${ISP}-apollo-${SYSTYPE}; exit; } + +# Convex versions that predate uname can use getsysinfo(1) + +if [ -x /usr/convex/getsysinfo ] +then + case `getsysinfo -f cpu_type` in + c1*) + echo c1-convex-bsd + exit ;; + c2*) + if getsysinfo -f scalar_acc + then echo c32-convex-bsd + else echo c2-convex-bsd + fi + exit ;; + c34*) + echo c34-convex-bsd + exit ;; + c38*) + echo c38-convex-bsd + exit ;; + c4*) + echo c4-convex-bsd + exit ;; + esac +fi + +cat >&2 < in order to provide the needed +information to handle your system. + +config.guess timestamp = $timestamp + +uname -m = `(uname -m) 2>/dev/null || echo unknown` +uname -r = `(uname -r) 2>/dev/null || echo unknown` +uname -s = `(uname -s) 2>/dev/null || echo unknown` +uname -v = `(uname -v) 2>/dev/null || echo unknown` + +/usr/bin/uname -p = `(/usr/bin/uname -p) 2>/dev/null` +/bin/uname -X = `(/bin/uname -X) 2>/dev/null` + +hostinfo = `(hostinfo) 2>/dev/null` +/bin/universe = `(/bin/universe) 2>/dev/null` +/usr/bin/arch -k = `(/usr/bin/arch -k) 2>/dev/null` +/bin/arch = `(/bin/arch) 2>/dev/null` +/usr/bin/oslevel = `(/usr/bin/oslevel) 2>/dev/null` +/usr/convex/getsysinfo = `(/usr/convex/getsysinfo) 2>/dev/null` + +UNAME_MACHINE = ${UNAME_MACHINE} +UNAME_RELEASE = ${UNAME_RELEASE} +UNAME_SYSTEM = ${UNAME_SYSTEM} +UNAME_VERSION = ${UNAME_VERSION} +EOF + +exit 1 + +# Local variables: +# eval: (add-hook 'write-file-hooks 'time-stamp) +# time-stamp-start: "timestamp='" +# time-stamp-format: "%:y-%02m-%02d" +# time-stamp-end: "'" +# End: diff --git a/device/lib/pic16/config.h.in b/device/lib/pic16/config.h.in new file mode 100644 index 0000000..c364eda --- /dev/null +++ b/device/lib/pic16/config.h.in @@ -0,0 +1,22 @@ +/* config.h.in. Generated from configure.ac by autoheader. */ + +/* Name of package */ +#undef PACKAGE + +/* Define to the address where bug reports for this package should be sent. */ +#undef PACKAGE_BUGREPORT + +/* Define to the full name of this package. */ +#undef PACKAGE_NAME + +/* Define to the full name and version of this package. */ +#undef PACKAGE_STRING + +/* Define to the one symbol short name of this package. */ +#undef PACKAGE_TARNAME + +/* Define to the version of this package. */ +#undef PACKAGE_VERSION + +/* Version number of package */ +#undef VERSION diff --git a/device/lib/pic16/configure b/device/lib/pic16/configure new file mode 100755 index 0000000..6c3c7db --- /dev/null +++ b/device/lib/pic16/configure @@ -0,0 +1,4199 @@ +#! /bin/sh +# Guess values for system-dependent variables and create Makefiles. +# Generated by GNU Autoconf 2.63 for pic16lib 0.3. +# +# Report bugs to . +# +# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, +# 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. +# This configure script is free software; the Free Software Foundation +# gives unlimited permission to copy, distribute and modify it. +## --------------------- ## +## M4sh Initialization. ## +## --------------------- ## + +# Be more Bourne compatible +DUALCASE=1; export DUALCASE # for MKS sh +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in + *posix*) set -o posix ;; +esac + +fi + + + + +# PATH needs CR +# Avoid depending upon Character Ranges. +as_cr_letters='abcdefghijklmnopqrstuvwxyz' +as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +as_cr_Letters=$as_cr_letters$as_cr_LETTERS +as_cr_digits='0123456789' +as_cr_alnum=$as_cr_Letters$as_cr_digits + +as_nl=' +' +export as_nl +# Printing a long string crashes Solaris 7 /usr/bin/printf. +as_echo='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\' +as_echo=$as_echo$as_echo$as_echo$as_echo$as_echo +as_echo=$as_echo$as_echo$as_echo$as_echo$as_echo$as_echo +if (test "X`printf %s $as_echo`" = "X$as_echo") 2>/dev/null; then + as_echo='printf %s\n' + as_echo_n='printf %s' +else + if test "X`(/usr/ucb/echo -n -n $as_echo) 2>/dev/null`" = "X-n $as_echo"; then + as_echo_body='eval /usr/ucb/echo -n "$1$as_nl"' + as_echo_n='/usr/ucb/echo -n' + else + as_echo_body='eval expr "X$1" : "X\\(.*\\)"' + as_echo_n_body='eval + arg=$1; + case $arg in + *"$as_nl"*) + expr "X$arg" : "X\\(.*\\)$as_nl"; + arg=`expr "X$arg" : ".*$as_nl\\(.*\\)"`;; + esac; + expr "X$arg" : "X\\(.*\\)" | tr -d "$as_nl" + ' + export as_echo_n_body + as_echo_n='sh -c $as_echo_n_body as_echo' + fi + export as_echo_body + as_echo='sh -c $as_echo_body as_echo' +fi + +# The user is always right. +if test "${PATH_SEPARATOR+set}" != set; then + PATH_SEPARATOR=: + (PATH='/bin;/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 && { + (PATH='/bin:/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 || + PATH_SEPARATOR=';' + } +fi + +# Support unset when possible. +if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then + as_unset=unset +else + as_unset=false +fi + + +# IFS +# We need space, tab and new line, in precisely that order. Quoting is +# there to prevent editors from complaining about space-tab. +# (If _AS_PATH_WALK were called with IFS unset, it would disable word +# splitting by setting IFS to empty value.) +IFS=" "" $as_nl" + +# Find who we are. Look in the path if we contain no directory separator. +case $0 in + *[\\/]* ) as_myself=$0 ;; + *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break +done +IFS=$as_save_IFS + + ;; +esac +# We did not find ourselves, most probably we were run as `sh COMMAND' +# in which case we are not to be found in the path. +if test "x$as_myself" = x; then + as_myself=$0 +fi +if test ! -f "$as_myself"; then + $as_echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2 + { (exit 1); exit 1; } +fi + +# Work around bugs in pre-3.0 UWIN ksh. +for as_var in ENV MAIL MAILPATH +do ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var +done +PS1='$ ' +PS2='> ' +PS4='+ ' + +# NLS nuisances. +LC_ALL=C +export LC_ALL +LANGUAGE=C +export LANGUAGE + +# Required to use basename. +if expr a : '\(a\)' >/dev/null 2>&1 && + test "X`expr 00001 : '.*\(...\)'`" = X001; then + as_expr=expr +else + as_expr=false +fi + +if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then + as_basename=basename +else + as_basename=false +fi + + +# Name of the executable. +as_me=`$as_basename -- "$0" || +$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \ + X"$0" : 'X\(//\)$' \| \ + X"$0" : 'X\(/\)' \| . 2>/dev/null || +$as_echo X/"$0" | + sed '/^.*\/\([^/][^/]*\)\/*$/{ + s//\1/ + q + } + /^X\/\(\/\/\)$/{ + s//\1/ + q + } + /^X\/\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + +# CDPATH. +$as_unset CDPATH + + +if test "x$CONFIG_SHELL" = x; then + if (eval ":") 2>/dev/null; then + as_have_required=yes +else + as_have_required=no +fi + + if test $as_have_required = yes && (eval ": +(as_func_return () { + (exit \$1) +} +as_func_success () { + as_func_return 0 +} +as_func_failure () { + as_func_return 1 +} +as_func_ret_success () { + return 0 +} +as_func_ret_failure () { + return 1 +} + +exitcode=0 +if as_func_success; then + : +else + exitcode=1 + echo as_func_success failed. +fi + +if as_func_failure; then + exitcode=1 + echo as_func_failure succeeded. +fi + +if as_func_ret_success; then + : +else + exitcode=1 + echo as_func_ret_success failed. +fi + +if as_func_ret_failure; then + exitcode=1 + echo as_func_ret_failure succeeded. +fi + +if ( set x; as_func_ret_success y && test x = \"\$1\" ); then + : +else + exitcode=1 + echo positional parameters were not saved. +fi + +test \$exitcode = 0) || { (exit 1); exit 1; } + +( + as_lineno_1=\$LINENO + as_lineno_2=\$LINENO + test \"x\$as_lineno_1\" != \"x\$as_lineno_2\" && + test \"x\`expr \$as_lineno_1 + 1\`\" = \"x\$as_lineno_2\") || { (exit 1); exit 1; } +") 2> /dev/null; then + : +else + as_candidate_shells= + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in /bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + case $as_dir in + /*) + for as_base in sh bash ksh sh5; do + as_candidate_shells="$as_candidate_shells $as_dir/$as_base" + done;; + esac +done +IFS=$as_save_IFS + + + for as_shell in $as_candidate_shells $SHELL; do + # Try only shells that exist, to save several forks. + if { test -f "$as_shell" || test -f "$as_shell.exe"; } && + { ("$as_shell") 2> /dev/null <<\_ASEOF +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in + *posix*) set -o posix ;; +esac + +fi + + +: +_ASEOF +}; then + CONFIG_SHELL=$as_shell + as_have_required=yes + if { "$as_shell" 2> /dev/null <<\_ASEOF +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in + *posix*) set -o posix ;; +esac + +fi + + +: +(as_func_return () { + (exit $1) +} +as_func_success () { + as_func_return 0 +} +as_func_failure () { + as_func_return 1 +} +as_func_ret_success () { + return 0 +} +as_func_ret_failure () { + return 1 +} + +exitcode=0 +if as_func_success; then + : +else + exitcode=1 + echo as_func_success failed. +fi + +if as_func_failure; then + exitcode=1 + echo as_func_failure succeeded. +fi + +if as_func_ret_success; then + : +else + exitcode=1 + echo as_func_ret_success failed. +fi + +if as_func_ret_failure; then + exitcode=1 + echo as_func_ret_failure succeeded. +fi + +if ( set x; as_func_ret_success y && test x = "$1" ); then + : +else + exitcode=1 + echo positional parameters were not saved. +fi + +test $exitcode = 0) || { (exit 1); exit 1; } + +( + as_lineno_1=$LINENO + as_lineno_2=$LINENO + test "x$as_lineno_1" != "x$as_lineno_2" && + test "x`expr $as_lineno_1 + 1`" = "x$as_lineno_2") || { (exit 1); exit 1; } + +_ASEOF +}; then + break +fi + +fi + + done + + if test "x$CONFIG_SHELL" != x; then + for as_var in BASH_ENV ENV + do ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var + done + export CONFIG_SHELL + exec "$CONFIG_SHELL" "$as_myself" ${1+"$@"} +fi + + + if test $as_have_required = no; then + echo This script requires a shell more modern than all the + echo shells that I found on your system. Please install a + echo modern shell, or manually run the script under such a + echo shell if you do have one. + { (exit 1); exit 1; } +fi + + +fi + +fi + + + +(eval "as_func_return () { + (exit \$1) +} +as_func_success () { + as_func_return 0 +} +as_func_failure () { + as_func_return 1 +} +as_func_ret_success () { + return 0 +} +as_func_ret_failure () { + return 1 +} + +exitcode=0 +if as_func_success; then + : +else + exitcode=1 + echo as_func_success failed. +fi + +if as_func_failure; then + exitcode=1 + echo as_func_failure succeeded. +fi + +if as_func_ret_success; then + : +else + exitcode=1 + echo as_func_ret_success failed. +fi + +if as_func_ret_failure; then + exitcode=1 + echo as_func_ret_failure succeeded. +fi + +if ( set x; as_func_ret_success y && test x = \"\$1\" ); then + : +else + exitcode=1 + echo positional parameters were not saved. +fi + +test \$exitcode = 0") || { + echo No shell found that supports shell functions. + echo Please tell bug-autoconf@gnu.org about your system, + echo including any error possibly output before this message. + echo This can help us improve future autoconf versions. + echo Configuration will now proceed without shell functions. +} + + + + as_lineno_1=$LINENO + as_lineno_2=$LINENO + test "x$as_lineno_1" != "x$as_lineno_2" && + test "x`expr $as_lineno_1 + 1`" = "x$as_lineno_2" || { + + # Create $as_me.lineno as a copy of $as_myself, but with $LINENO + # uniformly replaced by the line number. The first 'sed' inserts a + # line-number line after each line using $LINENO; the second 'sed' + # does the real work. The second script uses 'N' to pair each + # line-number line with the line containing $LINENO, and appends + # trailing '-' during substitution so that $LINENO is not a special + # case at line end. + # (Raja R Harinath suggested sed '=', and Paul Eggert wrote the + # scripts with optimization help from Paolo Bonzini. Blame Lee + # E. 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"$srcdir/../.."; do + if test -f "$ac_dir/install-sh"; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/install-sh -c" + break + elif test -f "$ac_dir/install.sh"; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/install.sh -c" + break + elif test -f "$ac_dir/shtool"; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/shtool install -c" + break + fi +done +if test -z "$ac_aux_dir"; then + { { $as_echo "$as_me:$LINENO: error: cannot find install-sh or install.sh in \"$srcdir\" \"$srcdir/..\" \"$srcdir/../..\"" >&5 +$as_echo "$as_me: error: cannot find install-sh or install.sh in \"$srcdir\" \"$srcdir/..\" \"$srcdir/../..\"" >&2;} + { (exit 1); exit 1; }; } +fi + +# These three variables are undocumented and unsupported, +# and are intended to be withdrawn in a future Autoconf release. +# They can cause serious problems if a builder's source tree is in a directory +# whose full name contains unusual characters. +ac_config_guess="$SHELL $ac_aux_dir/config.guess" # Please don't use this var. +ac_config_sub="$SHELL $ac_aux_dir/config.sub" # Please don't use this var. +ac_configure="$SHELL $ac_aux_dir/configure" # Please don't use this var. + + +# Find a good install program. We prefer a C program (faster), +# so one script is as good as another. But avoid the broken or +# incompatible versions: +# SysV /etc/install, /usr/sbin/install +# SunOS /usr/etc/install +# IRIX /sbin/install +# AIX /bin/install +# AmigaOS /C/install, which installs bootblocks on floppy discs +# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag +# AFS /usr/afsws/bin/install, which mishandles nonexistent args +# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" +# OS/2's system install, which has a completely different semantic +# ./install, which can be erroneously created by make from ./install.sh. +# Reject install programs that cannot install multiple files. +{ $as_echo "$as_me:$LINENO: checking for a BSD-compatible install" >&5 +$as_echo_n "checking for a BSD-compatible install... " >&6; } +if test -z "$INSTALL"; then +if test "${ac_cv_path_install+set}" = set; then + $as_echo_n "(cached) " >&6 +else + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + # Account for people who put trailing slashes in PATH elements. +case $as_dir/ in + ./ | .// | /cC/* | \ + /etc/* | /usr/sbin/* | /usr/etc/* | /sbin/* | /usr/afsws/bin/* | \ + ?:\\/os2\\/install\\/* | ?:\\/OS2\\/INSTALL\\/* | \ + /usr/ucb/* ) ;; + *) + # OSF1 and SCO ODT 3.0 have their own names for install. + # Don't use installbsd from OSF since it installs stuff as root + # by default. + for ac_prog in ginstall scoinst install; do + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_prog$ac_exec_ext" && $as_test_x "$as_dir/$ac_prog$ac_exec_ext"; }; then + if test $ac_prog = install && + grep dspmsg "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then + # AIX install. It has an incompatible calling convention. + : + elif test $ac_prog = install && + grep pwplus "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then + # program-specific install script used by HP pwplus--don't use. + : + else + rm -rf conftest.one conftest.two conftest.dir + echo one > conftest.one + echo two > conftest.two + mkdir conftest.dir + if "$as_dir/$ac_prog$ac_exec_ext" -c conftest.one conftest.two "`pwd`/conftest.dir" && + test -s conftest.one && test -s conftest.two && + test -s conftest.dir/conftest.one && + test -s conftest.dir/conftest.two + then + ac_cv_path_install="$as_dir/$ac_prog$ac_exec_ext -c" + break 3 + fi + fi + fi + done + done + ;; +esac + +done +IFS=$as_save_IFS + +rm -rf conftest.one conftest.two conftest.dir + +fi + if test "${ac_cv_path_install+set}" = set; then + INSTALL=$ac_cv_path_install + else + # As a last resort, use the slow shell script. Don't cache a + # value for INSTALL within a source directory, because that will + # break other packages using the cache if that directory is + # removed, or if the value is a relative name. + INSTALL=$ac_install_sh + fi +fi +{ $as_echo "$as_me:$LINENO: result: $INSTALL" >&5 +$as_echo "$INSTALL" >&6; } + +# Use test -z because SunOS4 sh mishandles braces in ${var-val}. +# It thinks the first close brace ends the variable substitution. +test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}' + +test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL}' + +test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' + +{ $as_echo "$as_me:$LINENO: checking whether build environment is sane" >&5 +$as_echo_n "checking whether build environment is sane... " >&6; } +# Just in case +sleep 1 +echo timestamp > conftest.file +# Do `set' in a subshell so we don't clobber the current shell's +# arguments. Must try -L first in case configure is actually a +# symlink; some systems play weird games with the mod time of symlinks +# (eg FreeBSD returns the mod time of the symlink's containing +# directory). +if ( + set X `ls -Lt $srcdir/configure conftest.file 2> /dev/null` + if test "$*" = "X"; then + # -L didn't work. + set X `ls -t $srcdir/configure conftest.file` + fi + rm -f conftest.file + if test "$*" != "X $srcdir/configure conftest.file" \ + && test "$*" != "X conftest.file $srcdir/configure"; then + + # If neither matched, then we have a broken ls. This can happen + # if, for instance, CONFIG_SHELL is bash and it inherits a + # broken ls alias from the environment. This has actually + # happened. Such a system could not be considered "sane". + { { $as_echo "$as_me:$LINENO: error: ls -t appears to fail. Make sure there is not a broken +alias in your environment" >&5 +$as_echo "$as_me: error: ls -t appears to fail. Make sure there is not a broken +alias in your environment" >&2;} + { (exit 1); exit 1; }; } + fi + + test "$2" = conftest.file + ) +then + # Ok. + : +else + { { $as_echo "$as_me:$LINENO: error: newly created file is older than distributed files! +Check your system clock" >&5 +$as_echo "$as_me: error: newly created file is older than distributed files! +Check your system clock" >&2;} + { (exit 1); exit 1; }; } +fi +{ $as_echo "$as_me:$LINENO: result: yes" >&5 +$as_echo "yes" >&6; } +test "$program_prefix" != NONE && + program_transform_name="s&^&$program_prefix&;$program_transform_name" +# Use a double $ so make ignores it. +test "$program_suffix" != NONE && + program_transform_name="s&\$&$program_suffix&;$program_transform_name" +# Double any \ or $. +# By default was `s,x,x', remove it if useless. +ac_script='s/[\\$]/&&/g;s/;s,x,x,$//' +program_transform_name=`$as_echo "$program_transform_name" | sed "$ac_script"` + +# expand $ac_aux_dir to an absolute path +am_aux_dir=`cd $ac_aux_dir && pwd` + +test x"${MISSING+set}" = xset || MISSING="\${SHELL} $am_aux_dir/missing" +# Use eval to expand $SHELL +if eval "$MISSING --run true"; then + am_missing_run="$MISSING --run " +else + am_missing_run= + { $as_echo "$as_me:$LINENO: WARNING: \`missing' script is too old or missing" >&5 +$as_echo "$as_me: WARNING: \`missing' script is too old or missing" >&2;} +fi + +{ $as_echo "$as_me:$LINENO: checking for a thread-safe mkdir -p" >&5 +$as_echo_n "checking for a thread-safe mkdir -p... " >&6; } +if test -z "$MKDIR_P"; then + if test "${ac_cv_path_mkdir+set}" = set; then + $as_echo_n "(cached) " >&6 +else + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/opt/sfw/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in mkdir gmkdir; do + for ac_exec_ext in '' $ac_executable_extensions; do + { test -f "$as_dir/$ac_prog$ac_exec_ext" && $as_test_x "$as_dir/$ac_prog$ac_exec_ext"; } || continue + case `"$as_dir/$ac_prog$ac_exec_ext" --version 2>&1` in #( + 'mkdir (GNU coreutils) '* | \ + 'mkdir (coreutils) '* | \ + 'mkdir (fileutils) '4.1*) + ac_cv_path_mkdir=$as_dir/$ac_prog$ac_exec_ext + break 3;; + esac + done + done +done +IFS=$as_save_IFS + +fi + + if test "${ac_cv_path_mkdir+set}" = set; then + MKDIR_P="$ac_cv_path_mkdir -p" + else + # As a last resort, use the slow shell script. Don't cache a + # value for MKDIR_P within a source directory, because that will + # break other packages using the cache if that directory is + # removed, or if the value is a relative name. + test -d ./--version && rmdir ./--version + MKDIR_P="$ac_install_sh -d" + fi +fi +{ $as_echo "$as_me:$LINENO: result: $MKDIR_P" >&5 +$as_echo "$MKDIR_P" >&6; } + +mkdir_p="$MKDIR_P" +case $mkdir_p in + [\\/$]* | ?:[\\/]*) ;; + */*) mkdir_p="\$(top_builddir)/$mkdir_p" ;; +esac + +for ac_prog in gawk mawk nawk awk +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_AWK+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$AWK"; then + ac_cv_prog_AWK="$AWK" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_AWK="$ac_prog" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +AWK=$ac_cv_prog_AWK +if test -n "$AWK"; then + { $as_echo "$as_me:$LINENO: result: $AWK" >&5 +$as_echo "$AWK" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$AWK" && break +done + +{ $as_echo "$as_me:$LINENO: checking whether ${MAKE-make} sets \$(MAKE)" >&5 +$as_echo_n "checking whether ${MAKE-make} sets \$(MAKE)... " >&6; } +set x ${MAKE-make} +ac_make=`$as_echo "$2" | sed 's/+/p/g; s/[^a-zA-Z0-9_]/_/g'` +if { as_var=ac_cv_prog_make_${ac_make}_set; eval "test \"\${$as_var+set}\" = set"; }; then + $as_echo_n "(cached) " >&6 +else + cat >conftest.make <<\_ACEOF +SHELL = /bin/sh +all: + @echo '@@@%%%=$(MAKE)=@@@%%%' +_ACEOF +# GNU make sometimes prints "make[1]: Entering...", which would confuse us. +case `${MAKE-make} -f conftest.make 2>/dev/null` in + *@@@%%%=?*=@@@%%%*) + eval ac_cv_prog_make_${ac_make}_set=yes;; + *) + eval ac_cv_prog_make_${ac_make}_set=no;; +esac +rm -f conftest.make +fi +if eval test \$ac_cv_prog_make_${ac_make}_set = yes; then + { $as_echo "$as_me:$LINENO: result: yes" >&5 +$as_echo "yes" >&6; } + SET_MAKE= +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } + SET_MAKE="MAKE=${MAKE-make}" +fi + +rm -rf .tst 2>/dev/null +mkdir .tst 2>/dev/null +if test -d .tst; then + am__leading_dot=. +else + am__leading_dot=_ +fi +rmdir .tst 2>/dev/null + +if test "`cd $srcdir && pwd`" != "`pwd`"; then + # Use -I$(srcdir) only when $(srcdir) != ., so that make's output + # is not polluted with repeated "-I." + am__isrc=' -I$(srcdir)' + # test to see if srcdir already configured + if test -f $srcdir/config.status; then + { { $as_echo "$as_me:$LINENO: error: source directory already configured; run \"make distclean\" there first" >&5 +$as_echo "$as_me: error: source directory already configured; run \"make distclean\" there first" >&2;} + { (exit 1); exit 1; }; } + fi +fi + +# test whether we have cygpath +if test -z "$CYGPATH_W"; then + if (cygpath --version) >/dev/null 2>/dev/null; then + CYGPATH_W='cygpath -w' + else + CYGPATH_W=echo + fi +fi + + +# Define the identity of the package. + PACKAGE='pic16lib' + VERSION='0.3' + + +cat >>confdefs.h <<_ACEOF +#define PACKAGE "$PACKAGE" +_ACEOF + + +cat >>confdefs.h <<_ACEOF +#define VERSION "$VERSION" +_ACEOF + +# Some tools Automake needs. + +ACLOCAL=${ACLOCAL-"${am_missing_run}aclocal-${am__api_version}"} + + +AUTOCONF=${AUTOCONF-"${am_missing_run}autoconf"} + + +AUTOMAKE=${AUTOMAKE-"${am_missing_run}automake-${am__api_version}"} + + +AUTOHEADER=${AUTOHEADER-"${am_missing_run}autoheader"} + + +MAKEINFO=${MAKEINFO-"${am_missing_run}makeinfo"} + +install_sh=${install_sh-"\$(SHELL) $am_aux_dir/install-sh"} + +# Installed binaries are usually stripped using `strip' when the user +# run `make install-strip'. However `strip' might not be the right +# tool to use in cross-compilation environments, therefore Automake +# will honor the `STRIP' environment variable to overrule this program. +if test "$cross_compiling" != no; then + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args. +set dummy ${ac_tool_prefix}strip; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_STRIP+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$STRIP"; then + ac_cv_prog_STRIP="$STRIP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_STRIP="${ac_tool_prefix}strip" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +STRIP=$ac_cv_prog_STRIP +if test -n "$STRIP"; then + { $as_echo "$as_me:$LINENO: result: $STRIP" >&5 +$as_echo "$STRIP" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_STRIP"; then + ac_ct_STRIP=$STRIP + # Extract the first word of "strip", so it can be a program name with args. +set dummy strip; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_STRIP"; then + ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_STRIP="strip" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP +if test -n "$ac_ct_STRIP"; then + { $as_echo "$as_me:$LINENO: result: $ac_ct_STRIP" >&5 +$as_echo "$ac_ct_STRIP" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_STRIP" = x; then + STRIP=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:$LINENO: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + STRIP=$ac_ct_STRIP + fi +else + STRIP="$ac_cv_prog_STRIP" +fi + +fi +INSTALL_STRIP_PROGRAM="\$(install_sh) -c -s" + +# We need awk for the "check" target. The system "awk" is bad on +# some platforms. +# Always define AMTAR for backward compatibility. + +AMTAR=${AMTAR-"${am_missing_run}tar"} + +am__tar='${AMTAR} chof - "$$tardir"'; am__untar='${AMTAR} xf -' + + + + + + +ac_config_headers="$ac_config_headers config.h" + + + +# SDCC setup +case $srcdir in + \\/*|?:\\/*) abs_srcdir="$srcdir"; + ;; + *) abs_srcdir="$ac_pwd/$srcdir"; + ;; +esac +case $ac_top_build_prefix in + \\/*|?:\\/*) + abs_top_builddir="$ac_top_build_prefix"; + ;; + *) abs_top_builddir="$ac_pwd/$ac_top_build_prefix"; + ;; +esac + +libdir=$libdir/pic16 + +USE_FLOATS="-DUSE_FLOATS=0" + +# Check whether --enable-floats was given. +if test "${enable_floats+set}" = set; then + enableval=$enable_floats; if test "yes" = $enableval; then USE_FLOATS="-DUSE_FLOATS=1"; fi + +fi + + +# Checks for programs. + +# The default architecture can be selected at configure time by setting the +# environment variable ARCH to the desired device (18fxxx). +ARCH=${ARCH:-18f452} + + +# We cannot use AC_PROG_CC(sdcc) as sdcc might not be built at configure-time... +CC=\'$abs_top_builddir/../../../bin/sdcc\' + +CFLAGS="-mpic16 -p$ARCH" + +# Extract the first word of "gpasm", so it can be a program name with args. +set dummy gpasm; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_path_CCAS+set}" = set; then + $as_echo_n "(cached) " >&6 +else + case $CCAS in + [\\/]* | ?:[\\/]*) + ac_cv_path_CCAS="$CCAS" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_path_CCAS="$as_dir/$ac_word$ac_exec_ext" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_path_CCAS" && ac_cv_path_CCAS=":" + ;; +esac +fi +CCAS=$ac_cv_path_CCAS +if test -n "$CCAS"; then + { $as_echo "$as_me:$LINENO: result: $CCAS" >&5 +$as_echo "$CCAS" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +CCAS=\'$CCAS\' + +CCASFLAGS="-p$ARCH" + +# Extract the first word of "gplink", so it can be a program name with args. +set dummy gplink; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_path_LD+set}" = set; then + $as_echo_n "(cached) " >&6 +else + case $LD in + [\\/]* | ?:[\\/]*) + ac_cv_path_LD="$LD" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_path_LD="$as_dir/$ac_word$ac_exec_ext" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_path_LD" && ac_cv_path_LD=":" + ;; +esac +fi +LD=$ac_cv_path_LD +if test -n "$LD"; then + { $as_echo "$as_me:$LINENO: result: $LD" >&5 +$as_echo "$LD" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +LD=\'$LD\' + +# Extract the first word of "gplib", so it can be a program name with args. +set dummy gplib; ac_word=$2 +{ $as_echo "$as_me:$LINENO: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if test "${ac_cv_path_AR+set}" = set; then + $as_echo_n "(cached) " >&6 +else + case $AR in + [\\/]* | ?:[\\/]*) + ac_cv_path_AR="$AR" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_path_AR="$as_dir/$ac_word$ac_exec_ext" + $as_echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_path_AR" && ac_cv_path_AR=":" + ;; +esac +fi +AR=$ac_cv_path_AR +if test -n "$AR"; then + { $as_echo "$as_me:$LINENO: result: $AR" >&5 +$as_echo "$AR" >&6; } +else + { $as_echo "$as_me:$LINENO: result: no" >&5 +$as_echo "no" >&6; } +fi + + +AR=\'$AR\' + +ARFLAGS=-c + + +# $RANLIB is called by the autotools but not provided nor required +RANLIB=: + +OBJEXT=o + + +DEPDIR="${am__leading_dot}deps" + +ac_config_commands="$ac_config_commands depfiles" + + +am_make=${MAKE-make} +cat > confinc << 'END' +am__doit: + @echo done +.PHONY: am__doit +END +# If we don't find an include directive, just comment out the code. +{ $as_echo "$as_me:$LINENO: checking for style of include used by $am_make" >&5 +$as_echo_n "checking for style of include used by $am_make... " >&6; } +am__include="#" +am__quote= +_am_result=none +# First try GNU make style include. +echo "include confinc" > confmf +# We grep out `Entering directory' and `Leaving directory' +# messages which can occur if `w' ends up in MAKEFLAGS. +# In particular we don't look at `^make:' because GNU make might +# be invoked under some other name (usually "gmake"), in which +# case it prints its new name instead of `make'. +if test "`$am_make -s -f confmf 2> /dev/null | grep -v 'ing directory'`" = "done"; then + am__include=include + am__quote= + _am_result=GNU +fi +# Now try BSD make style include. +if test "$am__include" = "#"; then + echo '.include "confinc"' > confmf + if test "`$am_make -s -f confmf 2> /dev/null`" = "done"; then + am__include=.include + am__quote="\"" + _am_result=BSD + fi +fi + + +{ $as_echo "$as_me:$LINENO: result: $_am_result" >&5 +$as_echo "$_am_result" >&6; } +rm -f confinc confmf + +# Check whether --enable-dependency-tracking was given. +if test "${enable_dependency_tracking+set}" = set; then + enableval=$enable_dependency_tracking; +fi + +if test "x$enable_dependency_tracking" != xno; then + am_depcomp="$ac_aux_dir/depcomp" + AMDEPBACKSLASH='\' +fi + if test "x$enable_dependency_tracking" != xno; then + AMDEP_TRUE= + AMDEP_FALSE='#' +else + AMDEP_TRUE='#' + AMDEP_FALSE= +fi + + + +depcc="$CC" am_compiler_list= + +{ $as_echo "$as_me:$LINENO: checking dependency style of $depcc" >&5 +$as_echo_n "checking dependency style of $depcc... " >&6; } +if test "${am_cv_CC_dependencies_compiler_type+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -z "$AMDEP_TRUE" && test -f "$am_depcomp"; then + # We make a subdir and do the tests there. Otherwise we can end up + # making bogus files that we don't know about and never remove. For + # instance it was reported that on HP-UX the gcc test will end up + # making a dummy file named `D' -- because `-MD' means `put the output + # in D'. + mkdir conftest.dir + # Copy depcomp to subdir because otherwise we won't find it if we're + # using a relative directory. + cp "$am_depcomp" conftest.dir + cd conftest.dir + # We will build objects and dependencies in a subdirectory because + # it helps to detect inapplicable dependency modes. For instance + # both Tru64's cc and ICC support -MD to output dependencies as a + # side effect of compilation, but ICC will put the dependencies in + # the current directory while Tru64 will put them in the object + # directory. + mkdir sub + + am_cv_CC_dependencies_compiler_type=none + if test "$am_compiler_list" = ""; then + am_compiler_list=`sed -n 's/^#*\([a-zA-Z0-9]*\))$/\1/p' < ./depcomp` + fi + for depmode in $am_compiler_list; do + # Setup a source with many dependencies, because some compilers + # like to wrap large dependency lists on column 80 (with \), and + # we should not choose a depcomp mode which is confused by this. + # + # We need to recreate these files for each test, as the compiler may + # overwrite some of them when testing with obscure command lines. + # This happens at least with the AIX C compiler. + : > sub/conftest.c + for i in 1 2 3 4 5 6; do + echo '#include "conftst'$i'.h"' >> sub/conftest.c + # Using `: > sub/conftst$i.h' creates only sub/conftst1.h with + # Solaris 8's {/usr,}/bin/sh. + touch sub/conftst$i.h + done + echo "${am__include} ${am__quote}sub/conftest.Po${am__quote}" > confmf + + case $depmode in + nosideeffect) + # after this tag, mechanisms are not by side-effect, so they'll + # only be used when explicitly requested + if test "x$enable_dependency_tracking" = xyes; then + continue + else + break + fi + ;; + none) break ;; + esac + # We check with `-c' and `-o' for the sake of the "dashmstdout" + # mode. It turns out that the SunPro C++ compiler does not properly + # handle `-M -o', and we need to detect this. + if depmode=$depmode \ + source=sub/conftest.c object=sub/conftest.${OBJEXT-o} \ + depfile=sub/conftest.Po tmpdepfile=sub/conftest.TPo \ + $SHELL ./depcomp $depcc -c -o sub/conftest.${OBJEXT-o} sub/conftest.c \ + >/dev/null 2>conftest.err && + grep sub/conftst1.h sub/conftest.Po > /dev/null 2>&1 && + grep sub/conftst6.h sub/conftest.Po > /dev/null 2>&1 && + grep sub/conftest.${OBJEXT-o} sub/conftest.Po > /dev/null 2>&1 && + ${MAKE-make} -s -f confmf > /dev/null 2>&1; then + # icc doesn't choke on unknown options, it will just issue warnings + # or remarks (even with -Werror). So we grep stderr for any message + # that says an option was ignored or not supported. + # When given -MP, icc 7.0 and 7.1 complain thusly: + # icc: Command line warning: ignoring option '-M'; no argument required + # The diagnosis changed in icc 8.0: + # icc: Command line remark: option '-MP' not supported + if (grep 'ignoring option' conftest.err || + grep 'not supported' conftest.err) >/dev/null 2>&1; then :; else + am_cv_CC_dependencies_compiler_type=$depmode + break + fi + fi + done + + cd .. + rm -rf conftest.dir +else + am_cv_CC_dependencies_compiler_type=none +fi + +fi +{ $as_echo "$as_me:$LINENO: result: $am_cv_CC_dependencies_compiler_type" >&5 +$as_echo "$am_cv_CC_dependencies_compiler_type" >&6; } +CCDEPMODE=depmode=$am_cv_CC_dependencies_compiler_type + + if + test "x$enable_dependency_tracking" != xno \ + && test "$am_cv_CC_dependencies_compiler_type" = gcc3; then + am__fastdepCC_TRUE= + am__fastdepCC_FALSE='#' +else + am__fastdepCC_TRUE='#' + am__fastdepCC_FALSE= +fi + + + +depcc="$CCAS" am_compiler_list= + +{ $as_echo "$as_me:$LINENO: checking dependency style of $depcc" >&5 +$as_echo_n "checking dependency style of $depcc... " >&6; } +if test "${am_cv_CCAS_dependencies_compiler_type+set}" = set; then + $as_echo_n "(cached) " >&6 +else + if test -z "$AMDEP_TRUE" && test -f "$am_depcomp"; then + # We make a subdir and do the tests there. Otherwise we can end up + # making bogus files that we don't know about and never remove. For + # instance it was reported that on HP-UX the gcc test will end up + # making a dummy file named `D' -- because `-MD' means `put the output + # in D'. + mkdir conftest.dir + # Copy depcomp to subdir because otherwise we won't find it if we're + # using a relative directory. + cp "$am_depcomp" conftest.dir + cd conftest.dir + # We will build objects and dependencies in a subdirectory because + # it helps to detect inapplicable dependency modes. For instance + # both Tru64's cc and ICC support -MD to output dependencies as a + # side effect of compilation, but ICC will put the dependencies in + # the current directory while Tru64 will put them in the object + # directory. + mkdir sub + + am_cv_CCAS_dependencies_compiler_type=none + if test "$am_compiler_list" = ""; then + am_compiler_list=`sed -n 's/^#*\([a-zA-Z0-9]*\))$/\1/p' < ./depcomp` + fi + for depmode in $am_compiler_list; do + # Setup a source with many dependencies, because some compilers + # like to wrap large dependency lists on column 80 (with \), and + # we should not choose a depcomp mode which is confused by this. + # + # We need to recreate these files for each test, as the compiler may + # overwrite some of them when testing with obscure command lines. + # This happens at least with the AIX C compiler. + : > sub/conftest.c + for i in 1 2 3 4 5 6; do + echo '#include "conftst'$i'.h"' >> sub/conftest.c + # Using `: > sub/conftst$i.h' creates only sub/conftst1.h with + # Solaris 8's {/usr,}/bin/sh. + touch sub/conftst$i.h + done + echo "${am__include} ${am__quote}sub/conftest.Po${am__quote}" > confmf + + case $depmode in + nosideeffect) + # after this tag, mechanisms are not by side-effect, so they'll + # only be used when explicitly requested + if test "x$enable_dependency_tracking" = xyes; then + continue + else + break + fi + ;; + none) break ;; + esac + # We check with `-c' and `-o' for the sake of the "dashmstdout" + # mode. It turns out that the SunPro C++ compiler does not properly + # handle `-M -o', and we need to detect this. + if depmode=$depmode \ + source=sub/conftest.c object=sub/conftest.${OBJEXT-o} \ + depfile=sub/conftest.Po tmpdepfile=sub/conftest.TPo \ + $SHELL ./depcomp $depcc -c -o sub/conftest.${OBJEXT-o} sub/conftest.c \ + >/dev/null 2>conftest.err && + grep sub/conftst1.h sub/conftest.Po > /dev/null 2>&1 && + grep sub/conftst6.h sub/conftest.Po > /dev/null 2>&1 && + grep sub/conftest.${OBJEXT-o} sub/conftest.Po > /dev/null 2>&1 && + ${MAKE-make} -s -f confmf > /dev/null 2>&1; then + # icc doesn't choke on unknown options, it will just issue warnings + # or remarks (even with -Werror). So we grep stderr for any message + # that says an option was ignored or not supported. + # When given -MP, icc 7.0 and 7.1 complain thusly: + # icc: Command line warning: ignoring option '-M'; no argument required + # The diagnosis changed in icc 8.0: + # icc: Command line remark: option '-MP' not supported + if (grep 'ignoring option' conftest.err || + grep 'not supported' conftest.err) >/dev/null 2>&1; then :; else + am_cv_CCAS_dependencies_compiler_type=$depmode + break + fi + fi + done + + cd .. + rm -rf conftest.dir +else + am_cv_CCAS_dependencies_compiler_type=none +fi + +fi +{ $as_echo "$as_me:$LINENO: result: $am_cv_CCAS_dependencies_compiler_type" >&5 +$as_echo "$am_cv_CCAS_dependencies_compiler_type" >&6; } +CCASDEPMODE=depmode=$am_cv_CCAS_dependencies_compiler_type + + if + test "x$enable_dependency_tracking" != xno \ + && test "$am_cv_CCAS_dependencies_compiler_type" = gcc3; then + am__fastdepCCAS_TRUE= + am__fastdepCCAS_FALSE='#' +else + am__fastdepCCAS_TRUE='#' + am__fastdepCCAS_FALSE= +fi + + + +# Checks for libraries. + +# Checks for header files. + +# Checks for typedefs, structures, and compiler characteristics. + +# Checks for library functions. + +case "$CCAS:$LD:$AR" in + *::*) + { { $as_echo "$as_me:$LINENO: error: gputils (gpasm, gplink, and gplib) are required but not found." >&5 +$as_echo "$as_me: error: gputils (gpasm, gplink, and gplib) are required but not found." >&2;} + { (exit 1); exit 1; }; } + ;; +esac + +ac_config_files="$ac_config_files Makefile debug/Makefile libc/Makefile libdev/Makefile libio/Makefile libm/Makefile libsdcc/Makefile startup/Makefile" + +cat >confcache <<\_ACEOF +# This file is a shell script that caches the results of configure +# tests run on this system so they can be shared between configure +# scripts and configure runs, see configure's option --config-cache. +# It is not useful on other systems. If it contains results you don't +# want to keep, you may remove or edit it. +# +# config.status only pays attention to the cache file if you give it +# the --recheck option to rerun configure. +# +# `ac_cv_env_foo' variables (set or unset) will be overridden when +# loading this file, other *unset* `ac_cv_foo' will be assigned the +# following values. + +_ACEOF + +# The following way of writing the cache mishandles newlines in values, +# but we know of no workaround that is simple, portable, and efficient. +# So, we kill variables containing newlines. +# Ultrix sh set writes to stderr and can't be redirected directly, +# and sets the high bit in the cache file unless we assign to the vars. +( + for ac_var in `(set) 2>&1 | sed -n 's/^\([a-zA-Z_][a-zA-Z0-9_]*\)=.*/\1/p'`; do + eval ac_val=\$$ac_var + case $ac_val in #( + *${as_nl}*) + case $ac_var in #( + *_cv_*) { $as_echo "$as_me:$LINENO: WARNING: cache variable $ac_var contains a newline" >&5 +$as_echo "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;; + esac + case $ac_var in #( + _ | IFS | as_nl) ;; #( + BASH_ARGV | BASH_SOURCE) eval $ac_var= ;; #( + *) $as_unset $ac_var ;; + esac ;; + esac + done + + (set) 2>&1 | + case $as_nl`(ac_space=' '; set) 2>&1` in #( + *${as_nl}ac_space=\ *) + # `set' does not quote correctly, so add quotes (double-quote + # substitution turns \\\\ into \\, and sed turns \\ into \). + sed -n \ + "s/'/'\\\\''/g; + s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='\\2'/p" + ;; #( + *) + # `set' quotes correctly as required by POSIX, so do not add quotes. + sed -n "/^[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*=/p" + ;; + esac | + sort +) | + sed ' + /^ac_cv_env_/b end + t clear + :clear + s/^\([^=]*\)=\(.*[{}].*\)$/test "${\1+set}" = set || &/ + t end + s/^\([^=]*\)=\(.*\)$/\1=${\1=\2}/ + :end' >>confcache +if diff "$cache_file" confcache >/dev/null 2>&1; then :; else + if test -w "$cache_file"; then + test "x$cache_file" != "x/dev/null" && + { $as_echo "$as_me:$LINENO: updating cache $cache_file" >&5 +$as_echo "$as_me: updating cache $cache_file" >&6;} + cat confcache >$cache_file + else + { $as_echo "$as_me:$LINENO: not updating unwritable cache $cache_file" >&5 +$as_echo "$as_me: not updating unwritable cache $cache_file" >&6;} + fi +fi +rm -f confcache + +test "x$prefix" = xNONE && prefix=$ac_default_prefix +# Let make expand exec_prefix. +test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + +DEFS=-DHAVE_CONFIG_H + +ac_libobjs= +ac_ltlibobjs= +for ac_i in : $LIBOBJS; do test "x$ac_i" = x: && continue + # 1. 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This is necessary, for example, + # in the case of _POSIX_SOURCE, which is predefined and required + # on some systems where configure will not decide to define it. + if (defundef == "undef") { + print "/*", prefix defundef, macro, "*/" + next + } + } +} +{ print } +_ACAWK +_ACEOF +cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 + { { $as_echo "$as_me:$LINENO: error: could not setup config headers machinery" >&5 +$as_echo "$as_me: error: could not setup config headers machinery" >&2;} + { (exit 1); exit 1; }; } +fi # test -n "$CONFIG_HEADERS" + + +eval set X " :F $CONFIG_FILES :H $CONFIG_HEADERS :C $CONFIG_COMMANDS" +shift +for ac_tag +do + case $ac_tag in + :[FHLC]) ac_mode=$ac_tag; continue;; + esac + case $ac_mode$ac_tag in + :[FHL]*:*);; + :L* | :C*:*) { { $as_echo "$as_me:$LINENO: error: invalid tag $ac_tag" >&5 +$as_echo "$as_me: error: invalid tag $ac_tag" >&2;} + { (exit 1); exit 1; }; };; + :[FH]-) ac_tag=-:-;; + :[FH]*) ac_tag=$ac_tag:$ac_tag.in;; + esac + ac_save_IFS=$IFS + IFS=: + set x $ac_tag + IFS=$ac_save_IFS + shift + ac_file=$1 + shift + + case $ac_mode in + :L) ac_source=$1;; + :[FH]) + ac_file_inputs= + for ac_f + do + case $ac_f in + -) ac_f="$tmp/stdin";; + *) # Look for the file first in the build tree, then in the source tree + # (if the path is not absolute). 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+ $(RM) *.lst; + +clean-intermediate: clean-local + list='$(SUBDIRS)'; for subdir in $$list; do \ + echo "Making $@ in $$subdir"; \ + (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $@); \ + done +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff --git a/device/lib/pic16/debug/gstack/gstack.c b/device/lib/pic16/debug/gstack/gstack.c new file mode 100644 index 0000000..6200ee3 --- /dev/null +++ b/device/lib/pic16/debug/gstack/gstack.c @@ -0,0 +1,199 @@ +/*------------------------------------------------------------------------- + + gstack.c :- debug stack tracing support function + + Written for pic16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +/* +** $Id: gstack.c 3835 2005-08-07 20:09:11Z tecodev $ +*/ + +extern WREG; +extern FSR1L; +extern FSR1H; +extern FSR0L; +extern FSR0H; +extern STATUS; +extern POSTINC0; +extern POSTDEC1; +extern PREINC1; +extern TOSL; +extern TOSH; +extern TOSU; +extern PCL; +extern PCLATH; +extern PCLATU; +extern stack; +extern stack_end; + +#pragma udata access _wreg_store _status_store _fsr0_store +#pragma udata access _gstack_begin _gstack_end _init_ok + +static char _init_ok=0; +static char _wreg_store; +static char _status_store; +static unsigned int _fsr0_store; +static unsigned int _gstack_begin; +static unsigned int _gstack_end; + +char _gstack_fail_str[]="Stack overflow\n"; +char _gstack_succ_str[]="Stack ok\n"; + + +static +void _gstack_overflow_default(void) __naked +{ + __asm + lfsr 0, __gstack_fail_str +; incf _FSR0L, f + +@0: + movf _POSTINC0, w + movff _WREG, 0xf7f + bnz @0 + +; sleep +@00: + goto @00 + + __endasm ; +} + +void (* _gstack_overflow)(void)=_gstack_overflow_default; + + +void _gstack_init(void) __naked +{ + __asm + + movlw LOW(_stack) + movwf __gstack_begin + + movlw HIGH(_stack) + movwf __gstack_begin+1 + + movlw LOW(_stack_end) + movwf __gstack_end + + movlw HIGH(_stack_end) + movwf __gstack_end+1 + + ; load default handler +; movlw LOW(__gstack_overflow_default) +; movwf __gstack_overflow + +; movlw HIGH(__gstack_overflow_default) +; movwf __gstack_overflow+1 + +; movlw UPPER(__gstack_overflow_default) +; movwf __gstack_overflow+2 + + + movlw 1 + movwf __init_ok + + return; + __endasm ; +} + + +void _gstack_test(void) __naked +{ + __asm + movff _WREG, __wreg_store + movff _STATUS, __status_store + + ; if first time, initialize boundary variables + movf __init_ok, w + bnz @1 + call __gstack_init + +@1: + movf __gstack_begin, w + cpfslt _FSR1L + bra @2 + bra @3 + +@2: + movf __gstack_begin+1, w + cpfslt _FSR1H + bra @4 + bra @3 + +@4: + movf __gstack_end, w + cpfsgt _FSR1L + bra @5 + bra @3 + +@5: + movf __gstack_end+1, w + cpfsgt _FSR1H + bra @6 + + ; fail + +@3: + + push + movlw LOW(ret_lab) + movwf _TOSL + + movlw HIGH(ret_lab) + movwf _TOSH + + movlw UPPER(ret_lab) + movwf _TOSU + + movff __gstack_overflow+2, _PCLATU + movff __gstack_overflow+1, _PCLATH + movf __gstack_overflow, w + + ; execute + movwf _PCL + +ret_lab: + bra @10 + + ; success +@6: + movff _FSR0L, __fsr0_store + movff _FSR0H, __fsr0_store+1 + lfsr 0, __gstack_succ_str + + ; print corresponding string +@8: + movf _POSTINC0, w + movff _WREG, 0xf7f + bnz @8 + +@9: + movff __fsr0_store+1, _FSR0H + movff __fsr0_store, _FSR0L + +@10: + movff __status_store, _STATUS + movff __wreg_store, _WREG + + return + + __endasm ; +} diff --git a/device/lib/pic16/depcomp b/device/lib/pic16/depcomp new file mode 100755 index 0000000..e5f9736 --- /dev/null +++ b/device/lib/pic16/depcomp @@ -0,0 +1,589 @@ +#! /bin/sh +# depcomp - compile a program generating dependencies as side-effects + +scriptversion=2007-03-29.01 + +# Copyright (C) 1999, 2000, 2003, 2004, 2005, 2006, 2007 Free Software +# Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA +# 02110-1301, USA. + +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + +# Originally written by Alexandre Oliva . + +case $1 in + '') + echo "$0: No command. Try \`$0 --help' for more information." 1>&2 + exit 1; + ;; + -h | --h*) + cat <<\EOF +Usage: depcomp [--help] [--version] PROGRAM [ARGS] + +Run PROGRAMS ARGS to compile a file, generating dependencies +as side-effects. + +Environment variables: + depmode Dependency tracking mode. + source Source file read by `PROGRAMS ARGS'. + object Object file output by `PROGRAMS ARGS'. + DEPDIR directory where to store dependencies. + depfile Dependency file to output. + tmpdepfile Temporary file to use when outputing dependencies. + libtool Whether libtool is used (yes/no). + +Report bugs to . +EOF + exit $? + ;; + -v | --v*) + echo "depcomp $scriptversion" + exit $? + ;; +esac + +if test -z "$depmode" || test -z "$source" || test -z "$object"; then + echo "depcomp: Variables source, object and depmode must be set" 1>&2 + exit 1 +fi + +# Dependencies for sub/bar.o or sub/bar.obj go into sub/.deps/bar.Po. +depfile=${depfile-`echo "$object" | + sed 's|[^\\/]*$|'${DEPDIR-.deps}'/&|;s|\.\([^.]*\)$|.P\1|;s|Pobj$|Po|'`} +tmpdepfile=${tmpdepfile-`echo "$depfile" | sed 's/\.\([^.]*\)$/.T\1/'`} + +rm -f "$tmpdepfile" + +# Some modes work just like other modes, but use different flags. We +# parameterize here, but still list the modes in the big case below, +# to make depend.m4 easier to write. Note that we *cannot* use a case +# here, because this file can only contain one case statement. +if test "$depmode" = hp; then + # HP compiler uses -M and no extra arg. + gccflag=-M + depmode=gcc +fi + +if test "$depmode" = dashXmstdout; then + # This is just like dashmstdout with a different argument. + dashmflag=-xM + depmode=dashmstdout +fi + +case "$depmode" in +gcc3) +## gcc 3 implements dependency tracking that does exactly what +## we want. Yay! Note: for some reason libtool 1.4 doesn't like +## it if -MD -MP comes after the -MF stuff. Hmm. +## Unfortunately, FreeBSD c89 acceptance of flags depends upon +## the command line argument order; so add the flags where they +## appear in depend2.am. Note that the slowdown incurred here +## affects only configure: in makefiles, %FASTDEP% shortcuts this. + for arg + do + case $arg in + -c) set fnord "$@" -MT "$object" -MD -MP -MF "$tmpdepfile" "$arg" ;; + *) set fnord "$@" "$arg" ;; + esac + shift # fnord + shift # $arg + done + "$@" + stat=$? + if test $stat -eq 0; then : + else + rm -f "$tmpdepfile" + exit $stat + fi + mv "$tmpdepfile" "$depfile" + ;; + +gcc) +## There are various ways to get dependency output from gcc. Here's +## why we pick this rather obscure method: +## - Don't want to use -MD because we'd like the dependencies to end +## up in a subdir. Having to rename by hand is ugly. +## (We might end up doing this anyway to support other compilers.) +## - The DEPENDENCIES_OUTPUT environment variable makes gcc act like +## -MM, not -M (despite what the docs say). +## - Using -M directly means running the compiler twice (even worse +## than renaming). + if test -z "$gccflag"; then + gccflag=-MD, + fi + "$@" -Wp,"$gccflag$tmpdepfile" + stat=$? + if test $stat -eq 0; then : + else + rm -f "$tmpdepfile" + exit $stat + fi + rm -f "$depfile" + echo "$object : \\" > "$depfile" + alpha=ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz +## The second -e expression handles DOS-style file names with drive letters. + sed -e 's/^[^:]*: / /' \ + -e 's/^['$alpha']:\/[^:]*: / /' < "$tmpdepfile" >> "$depfile" +## This next piece of magic avoids the `deleted header file' problem. +## The problem is that when a header file which appears in a .P file +## is deleted, the dependency causes make to die (because there is +## typically no way to rebuild the header). We avoid this by adding +## dummy dependencies for each header file. Too bad gcc doesn't do +## this for us directly. + tr ' ' ' +' < "$tmpdepfile" | +## Some versions of gcc put a space before the `:'. On the theory +## that the space means something, we add a space to the output as +## well. +## Some versions of the HPUX 10.20 sed can't process this invocation +## correctly. Breaking it into two sed invocations is a workaround. + sed -e 's/^\\$//' -e '/^$/d' -e '/:$/d' | sed -e 's/$/ :/' >> "$depfile" + rm -f "$tmpdepfile" + ;; + +hp) + # This case exists only to let depend.m4 do its work. It works by + # looking at the text of this script. This case will never be run, + # since it is checked for above. + exit 1 + ;; + +sgi) + if test "$libtool" = yes; then + "$@" "-Wp,-MDupdate,$tmpdepfile" + else + "$@" -MDupdate "$tmpdepfile" + fi + stat=$? + if test $stat -eq 0; then : + else + rm -f "$tmpdepfile" + exit $stat + fi + rm -f "$depfile" + + if test -f "$tmpdepfile"; then # yes, the sourcefile depend on other files + echo "$object : \\" > "$depfile" + + # Clip off the initial element (the dependent). Don't try to be + # clever and replace this with sed code, as IRIX sed won't handle + # lines with more than a fixed number of characters (4096 in + # IRIX 6.2 sed, 8192 in IRIX 6.5). We also remove comment lines; + # the IRIX cc adds comments like `#:fec' to the end of the + # dependency line. + tr ' ' ' +' < "$tmpdepfile" \ + | sed -e 's/^.*\.o://' -e 's/#.*$//' -e '/^$/ d' | \ + tr ' +' ' ' >> $depfile + echo >> $depfile + + # The second pass generates a dummy entry for each header file. + tr ' ' ' +' < "$tmpdepfile" \ + | sed -e 's/^.*\.o://' -e 's/#.*$//' -e '/^$/ d' -e 's/$/:/' \ + >> $depfile + else + # The sourcefile does not contain any dependencies, so just + # store a dummy comment line, to avoid errors with the Makefile + # "include basename.Plo" scheme. + echo "#dummy" > "$depfile" + fi + rm -f "$tmpdepfile" + ;; + +aix) + # The C for AIX Compiler uses -M and outputs the dependencies + # in a .u file. In older versions, this file always lives in the + # current directory. Also, the AIX compiler puts `$object:' at the + # start of each line; $object doesn't have directory information. + # Version 6 uses the directory in both cases. + dir=`echo "$object" | sed -e 's|/[^/]*$|/|'` + test "x$dir" = "x$object" && dir= + base=`echo "$object" | sed -e 's|^.*/||' -e 's/\.o$//' -e 's/\.lo$//'` + if test "$libtool" = yes; then + tmpdepfile1=$dir$base.u + tmpdepfile2=$base.u + tmpdepfile3=$dir.libs/$base.u + "$@" -Wc,-M + else + tmpdepfile1=$dir$base.u + tmpdepfile2=$dir$base.u + tmpdepfile3=$dir$base.u + "$@" -M + fi + stat=$? + + if test $stat -eq 0; then : + else + rm -f "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" + exit $stat + fi + + for tmpdepfile in "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" + do + test -f "$tmpdepfile" && break + done + if test -f "$tmpdepfile"; then + # Each line is of the form `foo.o: dependent.h'. + # Do two passes, one to just change these to + # `$object: dependent.h' and one to simply `dependent.h:'. + sed -e "s,^.*\.[a-z]*:,$object:," < "$tmpdepfile" > "$depfile" + # That's a tab and a space in the []. + sed -e 's,^.*\.[a-z]*:[ ]*,,' -e 's,$,:,' < "$tmpdepfile" >> "$depfile" + else + # The sourcefile does not contain any dependencies, so just + # store a dummy comment line, to avoid errors with the Makefile + # "include basename.Plo" scheme. + echo "#dummy" > "$depfile" + fi + rm -f "$tmpdepfile" + ;; + +icc) + # Intel's C compiler understands `-MD -MF file'. However on + # icc -MD -MF foo.d -c -o sub/foo.o sub/foo.c + # ICC 7.0 will fill foo.d with something like + # foo.o: sub/foo.c + # foo.o: sub/foo.h + # which is wrong. We want: + # sub/foo.o: sub/foo.c + # sub/foo.o: sub/foo.h + # sub/foo.c: + # sub/foo.h: + # ICC 7.1 will output + # foo.o: sub/foo.c sub/foo.h + # and will wrap long lines using \ : + # foo.o: sub/foo.c ... \ + # sub/foo.h ... \ + # ... + + "$@" -MD -MF "$tmpdepfile" + stat=$? + if test $stat -eq 0; then : + else + rm -f "$tmpdepfile" + exit $stat + fi + rm -f "$depfile" + # Each line is of the form `foo.o: dependent.h', + # or `foo.o: dep1.h dep2.h \', or ` dep3.h dep4.h \'. + # Do two passes, one to just change these to + # `$object: dependent.h' and one to simply `dependent.h:'. + sed "s,^[^:]*:,$object :," < "$tmpdepfile" > "$depfile" + # Some versions of the HPUX 10.20 sed can't process this invocation + # correctly. Breaking it into two sed invocations is a workaround. + sed 's,^[^:]*: \(.*\)$,\1,;s/^\\$//;/^$/d;/:$/d' < "$tmpdepfile" | + sed -e 's/$/ :/' >> "$depfile" + rm -f "$tmpdepfile" + ;; + +hp2) + # The "hp" stanza above does not work with aCC (C++) and HP's ia64 + # compilers, which have integrated preprocessors. The correct option + # to use with these is +Maked; it writes dependencies to a file named + # 'foo.d', which lands next to the object file, wherever that + # happens to be. + # Much of this is similar to the tru64 case; see comments there. + dir=`echo "$object" | sed -e 's|/[^/]*$|/|'` + test "x$dir" = "x$object" && dir= + base=`echo "$object" | sed -e 's|^.*/||' -e 's/\.o$//' -e 's/\.lo$//'` + if test "$libtool" = yes; then + tmpdepfile1=$dir$base.d + tmpdepfile2=$dir.libs/$base.d + "$@" -Wc,+Maked + else + tmpdepfile1=$dir$base.d + tmpdepfile2=$dir$base.d + "$@" +Maked + fi + stat=$? + if test $stat -eq 0; then : + else + rm -f "$tmpdepfile1" "$tmpdepfile2" + exit $stat + fi + + for tmpdepfile in "$tmpdepfile1" "$tmpdepfile2" + do + test -f "$tmpdepfile" && break + done + if test -f "$tmpdepfile"; then + sed -e "s,^.*\.[a-z]*:,$object:," "$tmpdepfile" > "$depfile" + # Add `dependent.h:' lines. + sed -ne '2,${; s/^ *//; s/ \\*$//; s/$/:/; p;}' "$tmpdepfile" >> "$depfile" + else + echo "#dummy" > "$depfile" + fi + rm -f "$tmpdepfile" "$tmpdepfile2" + ;; + +tru64) + # The Tru64 compiler uses -MD to generate dependencies as a side + # effect. `cc -MD -o foo.o ...' puts the dependencies into `foo.o.d'. + # At least on Alpha/Redhat 6.1, Compaq CCC V6.2-504 seems to put + # dependencies in `foo.d' instead, so we check for that too. + # Subdirectories are respected. + dir=`echo "$object" | sed -e 's|/[^/]*$|/|'` + test "x$dir" = "x$object" && dir= + base=`echo "$object" | sed -e 's|^.*/||' -e 's/\.o$//' -e 's/\.lo$//'` + + if test "$libtool" = yes; then + # With Tru64 cc, shared objects can also be used to make a + # static library. This mechanism is used in libtool 1.4 series to + # handle both shared and static libraries in a single compilation. + # With libtool 1.4, dependencies were output in $dir.libs/$base.lo.d. + # + # With libtool 1.5 this exception was removed, and libtool now + # generates 2 separate objects for the 2 libraries. These two + # compilations output dependencies in $dir.libs/$base.o.d and + # in $dir$base.o.d. We have to check for both files, because + # one of the two compilations can be disabled. We should prefer + # $dir$base.o.d over $dir.libs/$base.o.d because the latter is + # automatically cleaned when .libs/ is deleted, while ignoring + # the former would cause a distcleancheck panic. + tmpdepfile1=$dir.libs/$base.lo.d # libtool 1.4 + tmpdepfile2=$dir$base.o.d # libtool 1.5 + tmpdepfile3=$dir.libs/$base.o.d # libtool 1.5 + tmpdepfile4=$dir.libs/$base.d # Compaq CCC V6.2-504 + "$@" -Wc,-MD + else + tmpdepfile1=$dir$base.o.d + tmpdepfile2=$dir$base.d + tmpdepfile3=$dir$base.d + tmpdepfile4=$dir$base.d + "$@" -MD + fi + + stat=$? + if test $stat -eq 0; then : + else + rm -f "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" "$tmpdepfile4" + exit $stat + fi + + for tmpdepfile in "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" "$tmpdepfile4" + do + test -f "$tmpdepfile" && break + done + if test -f "$tmpdepfile"; then + sed -e "s,^.*\.[a-z]*:,$object:," < "$tmpdepfile" > "$depfile" + # That's a tab and a space in the []. + sed -e 's,^.*\.[a-z]*:[ ]*,,' -e 's,$,:,' < "$tmpdepfile" >> "$depfile" + else + echo "#dummy" > "$depfile" + fi + rm -f "$tmpdepfile" + ;; + +#nosideeffect) + # This comment above is used by automake to tell side-effect + # dependency tracking mechanisms from slower ones. + +dashmstdout) + # Important note: in order to support this mode, a compiler *must* + # always write the preprocessed file to stdout, regardless of -o. + "$@" || exit $? + + # Remove the call to Libtool. + if test "$libtool" = yes; then + while test $1 != '--mode=compile'; do + shift + done + shift + fi + + # Remove `-o $object'. + IFS=" " + for arg + do + case $arg in + -o) + shift + ;; + $object) + shift + ;; + *) + set fnord "$@" "$arg" + shift # fnord + shift # $arg + ;; + esac + done + + test -z "$dashmflag" && dashmflag=-M + # Require at least two characters before searching for `:' + # in the target name. This is to cope with DOS-style filenames: + # a dependency such as `c:/foo/bar' could be seen as target `c' otherwise. + "$@" $dashmflag | + sed 's:^[ ]*[^: ][^:][^:]*\:[ ]*:'"$object"'\: :' > "$tmpdepfile" + rm -f "$depfile" + cat < "$tmpdepfile" > "$depfile" + tr ' ' ' +' < "$tmpdepfile" | \ +## Some versions of the HPUX 10.20 sed can't process this invocation +## correctly. Breaking it into two sed invocations is a workaround. + sed -e 's/^\\$//' -e '/^$/d' -e '/:$/d' | sed -e 's/$/ :/' >> "$depfile" + rm -f "$tmpdepfile" + ;; + +dashXmstdout) + # This case only exists to satisfy depend.m4. It is never actually + # run, as this mode is specially recognized in the preamble. + exit 1 + ;; + +makedepend) + "$@" || exit $? + # Remove any Libtool call + if test "$libtool" = yes; then + while test $1 != '--mode=compile'; do + shift + done + shift + fi + # X makedepend + shift + cleared=no + for arg in "$@"; do + case $cleared in + no) + set ""; shift + cleared=yes ;; + esac + case "$arg" in + -D*|-I*) + set fnord "$@" "$arg"; shift ;; + # Strip any option that makedepend may not understand. Remove + # the object too, otherwise makedepend will parse it as a source file. + -*|$object) + ;; + *) + set fnord "$@" "$arg"; shift ;; + esac + done + obj_suffix="`echo $object | sed 's/^.*\././'`" + touch "$tmpdepfile" + ${MAKEDEPEND-makedepend} -o"$obj_suffix" -f"$tmpdepfile" "$@" + rm -f "$depfile" + cat < "$tmpdepfile" > "$depfile" + sed '1,2d' "$tmpdepfile" | tr ' ' ' +' | \ +## Some versions of the HPUX 10.20 sed can't process this invocation +## correctly. Breaking it into two sed invocations is a workaround. + sed -e 's/^\\$//' -e '/^$/d' -e '/:$/d' | sed -e 's/$/ :/' >> "$depfile" + rm -f "$tmpdepfile" "$tmpdepfile".bak + ;; + +cpp) + # Important note: in order to support this mode, a compiler *must* + # always write the preprocessed file to stdout. + "$@" || exit $? + + # Remove the call to Libtool. + if test "$libtool" = yes; then + while test $1 != '--mode=compile'; do + shift + done + shift + fi + + # Remove `-o $object'. + IFS=" " + for arg + do + case $arg in + -o) + shift + ;; + $object) + shift + ;; + *) + set fnord "$@" "$arg" + shift # fnord + shift # $arg + ;; + esac + done + + "$@" -E | + sed -n -e '/^# [0-9][0-9]* "\([^"]*\)".*/ s:: \1 \\:p' \ + -e '/^#line [0-9][0-9]* "\([^"]*\)".*/ s:: \1 \\:p' | + sed '$ s: \\$::' > "$tmpdepfile" + rm -f "$depfile" + echo "$object : \\" > "$depfile" + cat < "$tmpdepfile" >> "$depfile" + sed < "$tmpdepfile" '/^$/d;s/^ //;s/ \\$//;s/$/ :/' >> "$depfile" + rm -f "$tmpdepfile" + ;; + +msvisualcpp) + # Important note: in order to support this mode, a compiler *must* + # always write the preprocessed file to stdout, regardless of -o, + # because we must use -o when running libtool. + "$@" || exit $? + IFS=" " + for arg + do + case "$arg" in + "-Gm"|"/Gm"|"-Gi"|"/Gi"|"-ZI"|"/ZI") + set fnord "$@" + shift + shift + ;; + *) + set fnord "$@" "$arg" + shift + shift + ;; + esac + done + "$@" -E | + sed -n '/^#line [0-9][0-9]* "\([^"]*\)"/ s::echo "`cygpath -u \\"\1\\"`":p' | sort | uniq > "$tmpdepfile" + rm -f "$depfile" + echo "$object : \\" > "$depfile" + . "$tmpdepfile" | sed 's% %\\ %g' | sed -n '/^\(.*\)$/ s:: \1 \\:p' >> "$depfile" + echo " " >> "$depfile" + . "$tmpdepfile" | sed 's% %\\ %g' | sed -n '/^\(.*\)$/ s::\1\::p' >> "$depfile" + rm -f "$tmpdepfile" + ;; + +none) + exec "$@" + ;; + +*) + echo "Unknown depmode $depmode" 1>&2 + exit 1 + ;; +esac + +exit 0 + +# Local Variables: +# mode: shell-script +# sh-indentation: 2 +# eval: (add-hook 'write-file-hooks 'time-stamp) +# time-stamp-start: "scriptversion=" +# time-stamp-format: "%:y-%02m-%02d.%02H" +# time-stamp-end: "$" +# End: diff --git a/device/lib/pic16/install-sh b/device/lib/pic16/install-sh new file mode 100755 index 0000000..a5897de --- /dev/null +++ b/device/lib/pic16/install-sh @@ -0,0 +1,519 @@ +#!/bin/sh +# install - install a program, script, or datafile + +scriptversion=2006-12-25.00 + +# This originates from X11R5 (mit/util/scripts/install.sh), which was +# later released in X11R6 (xc/config/util/install.sh) with the +# following copyright and license. +# +# Copyright (C) 1994 X Consortium +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to +# deal in the Software without restriction, including without limitation the +# rights to use, copy, modify, merge, publish, distribute, sublicense, and/or +# sell copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# X CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN +# AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNEC- +# TION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +# +# Except as contained in this notice, the name of the X Consortium shall not +# be used in advertising or otherwise to promote the sale, use or other deal- +# ings in this Software without prior written authorization from the X Consor- +# tium. +# +# +# FSF changes to this file are in the public domain. +# +# Calling this script install-sh is preferred over install.sh, to prevent +# `make' implicit rules from creating a file called install from it +# when there is no Makefile. +# +# This script is compatible with the BSD install script, but was written +# from scratch. + +nl=' +' +IFS=" "" $nl" + +# set DOITPROG to echo to test this script + +# Don't use :- since 4.3BSD and earlier shells don't like it. +doit=${DOITPROG-} +if test -z "$doit"; then + doit_exec=exec +else + doit_exec=$doit +fi + +# Put in absolute file names if you don't have them in your path; +# or use environment vars. + +chgrpprog=${CHGRPPROG-chgrp} +chmodprog=${CHMODPROG-chmod} +chownprog=${CHOWNPROG-chown} +cmpprog=${CMPPROG-cmp} +cpprog=${CPPROG-cp} +mkdirprog=${MKDIRPROG-mkdir} +mvprog=${MVPROG-mv} +rmprog=${RMPROG-rm} +stripprog=${STRIPPROG-strip} + +posix_glob='?' +initialize_posix_glob=' + test "$posix_glob" != "?" || { + if (set -f) 2>/dev/null; then + posix_glob= + else + posix_glob=: + fi + } +' + +posix_mkdir= + +# Desired mode of installed file. +mode=0755 + +chgrpcmd= +chmodcmd=$chmodprog +chowncmd= +mvcmd=$mvprog +rmcmd="$rmprog -f" +stripcmd= + +src= +dst= +dir_arg= +dst_arg= + +copy_on_change=false +no_target_directory= + +usage="\ +Usage: $0 [OPTION]... [-T] SRCFILE DSTFILE + or: $0 [OPTION]... SRCFILES... DIRECTORY + or: $0 [OPTION]... -t DIRECTORY SRCFILES... + or: $0 [OPTION]... -d DIRECTORIES... + +In the 1st form, copy SRCFILE to DSTFILE. +In the 2nd and 3rd, copy all SRCFILES to DIRECTORY. +In the 4th, create DIRECTORIES. + +Options: + --help display this help and exit. + --version display version info and exit. + + -c (ignored) + -C install only if different (preserve the last data modification time) + -d create directories instead of installing files. + -g GROUP $chgrpprog installed files to GROUP. + -m MODE $chmodprog installed files to MODE. + -o USER $chownprog installed files to USER. + -s $stripprog installed files. + -t DIRECTORY install into DIRECTORY. + -T report an error if DSTFILE is a directory. + +Environment variables override the default commands: + CHGRPPROG CHMODPROG CHOWNPROG CMPPROG CPPROG MKDIRPROG MVPROG + RMPROG STRIPPROG +" + +while test $# -ne 0; do + case $1 in + -c) ;; + + -C) copy_on_change=true;; + + -d) dir_arg=true;; + + -g) chgrpcmd="$chgrpprog $2" + shift;; + + --help) echo "$usage"; exit $?;; + + -m) mode=$2 + case $mode in + *' '* | *' '* | *' +'* | *'*'* | *'?'* | *'['*) + echo "$0: invalid mode: $mode" >&2 + exit 1;; + esac + shift;; + + -o) chowncmd="$chownprog $2" + shift;; + + -s) stripcmd=$stripprog;; + + -t) dst_arg=$2 + shift;; + + -T) no_target_directory=true;; + + --version) echo "$0 $scriptversion"; exit $?;; + + --) shift + break;; + + -*) echo "$0: invalid option: $1" >&2 + exit 1;; + + *) break;; + esac + shift +done + +if test $# -ne 0 && test -z "$dir_arg$dst_arg"; then + # When -d is used, all remaining arguments are directories to create. + # When -t is used, the destination is already specified. + # Otherwise, the last argument is the destination. Remove it from $@. + for arg + do + if test -n "$dst_arg"; then + # $@ is not empty: it contains at least $arg. + set fnord "$@" "$dst_arg" + shift # fnord + fi + shift # arg + dst_arg=$arg + done +fi + +if test $# -eq 0; then + if test -z "$dir_arg"; then + echo "$0: no input file specified." >&2 + exit 1 + fi + # It's OK to call `install-sh -d' without argument. + # This can happen when creating conditional directories. + exit 0 +fi + +if test -z "$dir_arg"; then + trap '(exit $?); exit' 1 2 13 15 + + # Set umask so as not to create temps with too-generous modes. + # However, 'strip' requires both read and write access to temps. + case $mode in + # Optimize common cases. + *644) cp_umask=133;; + *755) cp_umask=22;; + + *[0-7]) + if test -z "$stripcmd"; then + u_plus_rw= + else + u_plus_rw='% 200' + fi + cp_umask=`expr '(' 777 - $mode % 1000 ')' $u_plus_rw`;; + *) + if test -z "$stripcmd"; then + u_plus_rw= + else + u_plus_rw=,u+rw + fi + cp_umask=$mode$u_plus_rw;; + esac +fi + +for src +do + # Protect names starting with `-'. + case $src in + -*) src=./$src;; + esac + + if test -n "$dir_arg"; then + dst=$src + dstdir=$dst + test -d "$dstdir" + dstdir_status=$? + else + + # Waiting for this to be detected by the "$cpprog $src $dsttmp" command + # might cause directories to be created, which would be especially bad + # if $src (and thus $dsttmp) contains '*'. + if test ! -f "$src" && test ! -d "$src"; then + echo "$0: $src does not exist." >&2 + exit 1 + fi + + if test -z "$dst_arg"; then + echo "$0: no destination specified." >&2 + exit 1 + fi + + dst=$dst_arg + # Protect names starting with `-'. + case $dst in + -*) dst=./$dst;; + esac + + # If destination is a directory, append the input filename; won't work + # if double slashes aren't ignored. + if test -d "$dst"; then + if test -n "$no_target_directory"; then + echo "$0: $dst_arg: Is a directory" >&2 + exit 1 + fi + dstdir=$dst + dst=$dstdir/`basename "$src"` + dstdir_status=0 + else + # Prefer dirname, but fall back on a substitute if dirname fails. + dstdir=` + (dirname "$dst") 2>/dev/null || + expr X"$dst" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ + X"$dst" : 'X\(//\)[^/]' \| \ + X"$dst" : 'X\(//\)$' \| \ + X"$dst" : 'X\(/\)' \| . 2>/dev/null || + echo X"$dst" | + sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ + s//\1/ + q + } + /^X\(\/\/\)[^/].*/{ + s//\1/ + q + } + /^X\(\/\/\)$/{ + s//\1/ + q + } + /^X\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q' + ` + + test -d "$dstdir" + dstdir_status=$? + fi + fi + + obsolete_mkdir_used=false + + if test $dstdir_status != 0; then + case $posix_mkdir in + '') + # Create intermediate dirs using mode 755 as modified by the umask. + # This is like FreeBSD 'install' as of 1997-10-28. + umask=`umask` + case $stripcmd.$umask in + # Optimize common cases. + *[2367][2367]) mkdir_umask=$umask;; + .*0[02][02] | .[02][02] | .[02]) mkdir_umask=22;; + + *[0-7]) + mkdir_umask=`expr $umask + 22 \ + - $umask % 100 % 40 + $umask % 20 \ + - $umask % 10 % 4 + $umask % 2 + `;; + *) mkdir_umask=$umask,go-w;; + esac + + # With -d, create the new directory with the user-specified mode. + # Otherwise, rely on $mkdir_umask. + if test -n "$dir_arg"; then + mkdir_mode=-m$mode + else + mkdir_mode= + fi + + posix_mkdir=false + case $umask in + *[123567][0-7][0-7]) + # POSIX mkdir -p sets u+wx bits regardless of umask, which + # is incompatible with FreeBSD 'install' when (umask & 300) != 0. + ;; + *) + tmpdir=${TMPDIR-/tmp}/ins$RANDOM-$$ + trap 'ret=$?; rmdir "$tmpdir/d" "$tmpdir" 2>/dev/null; exit $ret' 0 + + if (umask $mkdir_umask && + exec $mkdirprog $mkdir_mode -p -- "$tmpdir/d") >/dev/null 2>&1 + then + if test -z "$dir_arg" || { + # Check for POSIX incompatibilities with -m. + # HP-UX 11.23 and IRIX 6.5 mkdir -m -p sets group- or + # other-writeable bit of parent directory when it shouldn't. + # FreeBSD 6.1 mkdir -m -p sets mode of existing directory. + ls_ld_tmpdir=`ls -ld "$tmpdir"` + case $ls_ld_tmpdir in + d????-?r-*) different_mode=700;; + d????-?--*) different_mode=755;; + *) false;; + esac && + $mkdirprog -m$different_mode -p -- "$tmpdir" && { + ls_ld_tmpdir_1=`ls -ld "$tmpdir"` + test "$ls_ld_tmpdir" = "$ls_ld_tmpdir_1" + } + } + then posix_mkdir=: + fi + rmdir "$tmpdir/d" "$tmpdir" + else + # Remove any dirs left behind by ancient mkdir implementations. + rmdir ./$mkdir_mode ./-p ./-- 2>/dev/null + fi + trap '' 0;; + esac;; + esac + + if + $posix_mkdir && ( + umask $mkdir_umask && + $doit_exec $mkdirprog $mkdir_mode -p -- "$dstdir" + ) + then : + else + + # The umask is ridiculous, or mkdir does not conform to POSIX, + # or it failed possibly due to a race condition. Create the + # directory the slow way, step by step, checking for races as we go. + + case $dstdir in + /*) prefix='/';; + -*) prefix='./';; + *) prefix='';; + esac + + eval "$initialize_posix_glob" + + oIFS=$IFS + IFS=/ + $posix_glob set -f + set fnord $dstdir + shift + $posix_glob set +f + IFS=$oIFS + + prefixes= + + for d + do + test -z "$d" && continue + + prefix=$prefix$d + if test -d "$prefix"; then + prefixes= + else + if $posix_mkdir; then + (umask=$mkdir_umask && + $doit_exec $mkdirprog $mkdir_mode -p -- "$dstdir") && break + # Don't fail if two instances are running concurrently. + test -d "$prefix" || exit 1 + else + case $prefix in + *\'*) qprefix=`echo "$prefix" | sed "s/'/'\\\\\\\\''/g"`;; + *) qprefix=$prefix;; + esac + prefixes="$prefixes '$qprefix'" + fi + fi + prefix=$prefix/ + done + + if test -n "$prefixes"; then + # Don't fail if two instances are running concurrently. + (umask $mkdir_umask && + eval "\$doit_exec \$mkdirprog $prefixes") || + test -d "$dstdir" || exit 1 + obsolete_mkdir_used=true + fi + fi + fi + + if test -n "$dir_arg"; then + { test -z "$chowncmd" || $doit $chowncmd "$dst"; } && + { test -z "$chgrpcmd" || $doit $chgrpcmd "$dst"; } && + { test "$obsolete_mkdir_used$chowncmd$chgrpcmd" = false || + test -z "$chmodcmd" || $doit $chmodcmd $mode "$dst"; } || exit 1 + else + + # Make a couple of temp file names in the proper directory. + dsttmp=$dstdir/_inst.$$_ + rmtmp=$dstdir/_rm.$$_ + + # Trap to clean up those temp files at exit. + trap 'ret=$?; rm -f "$dsttmp" "$rmtmp" && exit $ret' 0 + + # Copy the file name to the temp name. + (umask $cp_umask && $doit_exec $cpprog "$src" "$dsttmp") && + + # and set any options; do chmod last to preserve setuid bits. + # + # If any of these fail, we abort the whole thing. If we want to + # ignore errors from any of these, just make sure not to ignore + # errors from the above "$doit $cpprog $src $dsttmp" command. + # + { test -z "$chowncmd" || $doit $chowncmd "$dsttmp"; } && + { test -z "$chgrpcmd" || $doit $chgrpcmd "$dsttmp"; } && + { test -z "$stripcmd" || $doit $stripcmd "$dsttmp"; } && + { test -z "$chmodcmd" || $doit $chmodcmd $mode "$dsttmp"; } && + + # If -C, don't bother to copy if it wouldn't change the file. + if $copy_on_change && + old=`LC_ALL=C ls -dlL "$dst" 2>/dev/null` && + new=`LC_ALL=C ls -dlL "$dsttmp" 2>/dev/null` && + + eval "$initialize_posix_glob" && + $posix_glob set -f && + set X $old && old=:$2:$4:$5:$6 && + set X $new && new=:$2:$4:$5:$6 && + $posix_glob set +f && + + test "$old" = "$new" && + $cmpprog "$dst" "$dsttmp" >/dev/null 2>&1 + then + rm -f "$dsttmp" + else + # Rename the file to the real destination. + $doit $mvcmd -f "$dsttmp" "$dst" 2>/dev/null || + + # The rename failed, perhaps because mv can't rename something else + # to itself, or perhaps because mv is so ancient that it does not + # support -f. + { + # Now remove or move aside any old file at destination location. + # We try this two ways since rm can't unlink itself on some + # systems and the destination file might be busy for other + # reasons. In this case, the final cleanup might fail but the new + # file should still install successfully. + { + test ! -f "$dst" || + $doit $rmcmd -f "$dst" 2>/dev/null || + { $doit $mvcmd -f "$dst" "$rmtmp" 2>/dev/null && + { $doit $rmcmd -f "$rmtmp" 2>/dev/null; :; } + } || + { echo "$0: cannot unlink or rename $dst" >&2 + (exit 1); exit 1 + } + } && + + # Now rename the file to the real destination. + $doit $mvcmd "$dsttmp" "$dst" + } + fi || exit 1 + + trap '' 0 + fi +done + +# Local variables: +# eval: (add-hook 'write-file-hooks 'time-stamp) +# time-stamp-start: "scriptversion=" +# time-stamp-format: "%:y-%02m-%02d.%02H" +# time-stamp-end: "$" +# End: diff --git a/device/lib/pic16/libc/Makefile.am b/device/lib/pic16/libc/Makefile.am new file mode 100644 index 0000000..eea0142 --- /dev/null +++ b/device/lib/pic16/libc/Makefile.am @@ -0,0 +1,83 @@ +## Makefile.am -- Process this file with automake to produce Makefile.in + +lib_LIBRARIES = libc18f.a + +libc18f_a_SOURCES = +libc18f_a_SOURCES += ctype/iscntrl.c +libc18f_a_SOURCES += ctype/isdigit.c +libc18f_a_SOURCES += ctype/isgraph.c +libc18f_a_SOURCES += ctype/islower.c +libc18f_a_SOURCES += ctype/isprint.c +libc18f_a_SOURCES += ctype/ispunct.c +libc18f_a_SOURCES += ctype/isspace.c +libc18f_a_SOURCES += ctype/isupper.c +libc18f_a_SOURCES += ctype/isxdigit.c +libc18f_a_SOURCES += delay/delay100ktcy.S +libc18f_a_SOURCES += delay/delay100tcy.S +libc18f_a_SOURCES += delay/delay10ktcy.S +libc18f_a_SOURCES += delay/delay10tcy.S +libc18f_a_SOURCES += delay/delay1ktcy.S +libc18f_a_SOURCES += delay/delay1mtcy.S +libc18f_a_SOURCES += stdio/fprintf.c +libc18f_a_SOURCES += stdio/printf.c +libc18f_a_SOURCES += stdio/printf_small.c +libc18f_a_SOURCES += stdio/printf_tiny.c +libc18f_a_SOURCES += stdio/putchar.c +libc18f_a_SOURCES += stdio/sprintf.c +libc18f_a_SOURCES += stdio/streams.c +libc18f_a_SOURCES += stdio/strmgpsim.c +libc18f_a_SOURCES += stdio/strmmssp.c +libc18f_a_SOURCES += stdio/strmputchar.c +libc18f_a_SOURCES += stdio/strmusart.c +libc18f_a_SOURCES += stdio/vfprintf.c +libc18f_a_SOURCES += stdio/vprintf.c +libc18f_a_SOURCES += stdio/vsprintf.c +libc18f_a_SOURCES += stdlib/atof.c +libc18f_a_SOURCES += stdlib/atoi.c +libc18f_a_SOURCES += stdlib/atol.c +libc18f_a_SOURCES += stdlib/calloc.c +libc18f_a_SOURCES += stdlib/crc16.c +libc18f_a_SOURCES += stdlib/free.c +libc18f_a_SOURCES += stdlib/g_ftoa.S +libc18f_a_SOURCES += stdlib/itoa.c +libc18f_a_SOURCES += stdlib/ltoa.c +libc18f_a_SOURCES += stdlib/malloc.c +libc18f_a_SOURCES += stdlib/memfree.c +libc18f_a_SOURCES += stdlib/memfreemax.c +libc18f_a_SOURCES += stdlib/memmisc.c +libc18f_a_SOURCES += stdlib/rand.c +libc18f_a_SOURCES += stdlib/realloc.c +libc18f_a_SOURCES += stdlib/x_ftoa.c +libc18f_a_SOURCES += string/memccpy.c +libc18f_a_SOURCES += string/memchr.c +libc18f_a_SOURCES += string/memchrpgm.c +libc18f_a_SOURCES += string/memchrram.c +libc18f_a_SOURCES += string/memcmp.c +libc18f_a_SOURCES += string/memcpy.c +libc18f_a_SOURCES += string/memcpypgm2ram.c +libc18f_a_SOURCES += string/memcpyram2ram.c +libc18f_a_SOURCES += string/memmove.c +libc18f_a_SOURCES += string/memrchr.c +libc18f_a_SOURCES += string/memset.c +libc18f_a_SOURCES += string/strcat.c +libc18f_a_SOURCES += string/strchr.c +libc18f_a_SOURCES += string/strcmp.c +libc18f_a_SOURCES += string/strcpy.c +libc18f_a_SOURCES += string/strcspn.c +libc18f_a_SOURCES += string/strlen.c +libc18f_a_SOURCES += string/strlwr.c +libc18f_a_SOURCES += string/strncat.c +libc18f_a_SOURCES += string/strncmp.c +libc18f_a_SOURCES += string/strncpy.c +libc18f_a_SOURCES += string/strpbrk.c +libc18f_a_SOURCES += string/strrchr.c +libc18f_a_SOURCES += string/strspn.c +libc18f_a_SOURCES += string/strstr.c +libc18f_a_SOURCES += string/strtok.c +libc18f_a_SOURCES += string/strupr.c +libc18f_a_SOURCES += utils/cnvfrac.S +libc18f_a_SOURCES += utils/cnvint.S +libc18f_a_SOURCES += utils/cvtdec.S + +include $(top_srcdir)/Makefile.common + diff --git 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diff --git a/device/lib/pic16/libc/ctype/iscntrl.c b/device/lib/pic16/libc/ctype/iscntrl.c new file mode 100644 index 0000000..4e52696 --- /dev/null +++ b/device/lib/pic16/libc/ctype/iscntrl.c @@ -0,0 +1,31 @@ +/*------------------------------------------------------------------------- + _iscntrl.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +char iscntrl(unsigned char c) +{ + if ( c <= '\x1F' || c == '\x7f') + return 1; + + return 0; +} diff --git a/device/lib/pic16/libc/ctype/isdigit.c b/device/lib/pic16/libc/ctype/isdigit.c new file mode 100644 index 0000000..7510d2c --- /dev/null +++ b/device/lib/pic16/libc/ctype/isdigit.c @@ -0,0 +1,31 @@ +/*------------------------------------------------------------------------- + _isdigit.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +char isdigit( unsigned char c) +{ + if ( c >= '0' && c <= '9' ) + return 1; + + return 0; +} diff --git a/device/lib/pic16/libc/ctype/isgraph.c b/device/lib/pic16/libc/ctype/isgraph.c new file mode 100644 index 0000000..2ec902f --- /dev/null +++ b/device/lib/pic16/libc/ctype/isgraph.c @@ -0,0 +1,31 @@ +/*------------------------------------------------------------------------- + _isgraph.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +char isgraph( unsigned char c) +{ + if ( c >= '\x21' && c <= '\x7e' ) + return 1; + + return 0; +} diff --git a/device/lib/pic16/libc/ctype/islower.c b/device/lib/pic16/libc/ctype/islower.c new file mode 100644 index 0000000..3b9fc43 --- /dev/null +++ b/device/lib/pic16/libc/ctype/islower.c @@ -0,0 +1,31 @@ +/*------------------------------------------------------------------------- + _islower.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +char islower(unsigned char c) +{ + if( c >= 'a' && c <= 'z' ) + return 1; + + return 0; +} diff --git a/device/lib/pic16/libc/ctype/isprint.c b/device/lib/pic16/libc/ctype/isprint.c new file mode 100644 index 0000000..4b23b27 --- /dev/null +++ b/device/lib/pic16/libc/ctype/isprint.c @@ -0,0 +1,30 @@ +/*------------------------------------------------------------------------- + _isprint.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +char isprint (unsigned char c) +{ + if ( c >= '\x20' && c <= '\x7e') + return 1; + + return 0; +} diff --git a/device/lib/pic16/libc/ctype/ispunct.c b/device/lib/pic16/libc/ctype/ispunct.c new file mode 100644 index 0000000..0447eb9 --- /dev/null +++ b/device/lib/pic16/libc/ctype/ispunct.c @@ -0,0 +1,37 @@ +/*------------------------------------------------------------------------- + _ispunct.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +char ispunct (unsigned char c) +{ + if (isprint (c) + && !islower(c) + && !isupper(c) + && c != ' ' + && !isdigit(c)) + return 1; + + return 0; +} diff --git a/device/lib/pic16/libc/ctype/isspace.c b/device/lib/pic16/libc/ctype/isspace.c new file mode 100644 index 0000000..126e246 --- /dev/null +++ b/device/lib/pic16/libc/ctype/isspace.c @@ -0,0 +1,36 @@ +/*------------------------------------------------------------------------- + _isppace.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +char isspace (unsigned char c) +{ + if ( c == ' ' + || c == '\f' + || c == '\n' + || c == '\r' + || c == '\t' + || c == '\v' ) + return 1; + + return 0; +} diff --git a/device/lib/pic16/libc/ctype/isupper.c b/device/lib/pic16/libc/ctype/isupper.c new file mode 100644 index 0000000..d26f749 --- /dev/null +++ b/device/lib/pic16/libc/ctype/isupper.c @@ -0,0 +1,31 @@ +/*------------------------------------------------------------------------- + _isupper.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +char isupper (unsigned char c) +{ + if ( c >= 'A' && c <= 'Z') + return 1; + + return 0; +} diff --git a/device/lib/pic16/libc/ctype/isxdigit.c b/device/lib/pic16/libc/ctype/isxdigit.c new file mode 100644 index 0000000..a0dc943 --- /dev/null +++ b/device/lib/pic16/libc/ctype/isxdigit.c @@ -0,0 +1,33 @@ +/*------------------------------------------------------------------------- + _isxdigit.c - part of ctype.h + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +char isxdigit (unsigned char c) +{ + if (( c >= '0' && c <= '9') + || ( c >= 'a' && c <= 'f') + || ( c >= 'A' && c <= 'F')) + return 1; + + return 0; +} + diff --git a/device/lib/pic16/libc/delay/delay100ktcy.S b/device/lib/pic16/libc/delay/delay100ktcy.S new file mode 100644 index 0000000..9ea4123 --- /dev/null +++ b/device/lib/pic16/libc/delay/delay100ktcy.S @@ -0,0 +1,46 @@ + + include + + extern _delay10tcy + extern _delay1ktcy + + global _delay100ktcy + + code + +_delay100ktcy: + ; polynomial for 100ktcy delay is f(x) = 100000 * (x-1) + 100000 + decf WREG, f + + movwf POSTDEC1 + movlw 99 + call _delay1ktcy + + movlw 99 + call _delay10tcy + + movf PREINC1, w + + bz @delay100k_end + bra $+2 + +@delay100k_loop: + movwf POSTDEC1 + + movlw 99 + call _delay1ktcy + + movlw 99 + call _delay10tcy + + bra $+2 + bra $+2 + nop + movf PREINC1, w + decfsz WREG, f + bra @delay100k_loop + +@delay100k_end: + return + + end diff --git a/device/lib/pic16/libc/delay/delay100tcy.S b/device/lib/pic16/libc/delay/delay100tcy.S new file mode 100644 index 0000000..1783b93 --- /dev/null +++ b/device/lib/pic16/libc/delay/delay100tcy.S @@ -0,0 +1,39 @@ + + include + + extern _delay10tcy + + global _delay100tcy + + code + +_delay100tcy: + ; polynomial for 100tcy delay is f(x) = 100 * (x-1) + 100 + decf WREG, f + movwf POSTDEC1 + movlw 9 + call _delay10tcy + + movf PREINC1, w + + bz @delay100_end + bra $+2 + +@delay100_loop: + movwf POSTDEC1 + + movlw 9 + call _delay10tcy + + bra $+2 + + movf PREINC1, w + nop + bra $+2 + decfsz WREG, f + bra @delay100_loop + +@delay100_end: + return + + end diff --git a/device/lib/pic16/libc/delay/delay10ktcy.S b/device/lib/pic16/libc/delay/delay10ktcy.S new file mode 100644 index 0000000..a5a68cb --- /dev/null +++ b/device/lib/pic16/libc/delay/delay10ktcy.S @@ -0,0 +1,46 @@ + + include + + extern _delay10tcy + extern _delay1ktcy + + global _delay10ktcy + + code + +_delay10ktcy: + ; polynomial for 10ktcy delay is f(x) = 10000 * (x-1) + 10000 + decf WREG, f + + movwf POSTDEC1 + movlw 9 + call _delay1ktcy + + movlw 99 + call _delay10tcy + + movf PREINC1, w + + bz @delay10k_end + bra $+2 + +@delay10k_loop: + movwf POSTDEC1 + + movlw 9 + call _delay1ktcy + + movlw 99 + call _delay10tcy + + bra $+2 + bra $+2 + nop + movf PREINC1, w + decfsz WREG, f + bra @delay10k_loop + +@delay10k_end: + return + + end diff --git a/device/lib/pic16/libc/delay/delay10tcy.S b/device/lib/pic16/libc/delay/delay10tcy.S new file mode 100644 index 0000000..8d292f0 --- /dev/null +++ b/device/lib/pic16/libc/delay/delay10tcy.S @@ -0,0 +1,31 @@ + + include + + global _delay10tcy + + code + +_delay10tcy: + ; polynomial for 10tcy delay is f(x) = 10 * (x-1) + 10 + decf WREG, f + nop + + movf WREG, w + bz @delay10_end + + bra $+2 + +@delay10_loop: + bra $+2 + bra $+2 + bra $+2 + + nop + decfsz WREG, f + bra @delay10_loop + +@delay10_end: + + return + + end diff --git a/device/lib/pic16/libc/delay/delay1ktcy.S b/device/lib/pic16/libc/delay/delay1ktcy.S new file mode 100644 index 0000000..cd0fb05 --- /dev/null +++ b/device/lib/pic16/libc/delay/delay1ktcy.S @@ -0,0 +1,39 @@ + + include + + extern _delay10tcy + + global _delay1ktcy + + code + +_delay1ktcy: + ; polynomial for 1ktcy delay is f(x) = 1000 * (x-1) + 1000 + decf WREG, f + + movwf POSTDEC1 + movlw 99 + call _delay10tcy + + movf PREINC1, w + + bz @delay1k_end + bra $+2 + +@delay1k_loop: + movwf POSTDEC1 + movlw 99 + call _delay10tcy + + bra $+2 + bra $+2 + nop + + movf PREINC1, w + decfsz WREG, f + bra @delay1k_loop + +@delay1k_end: + return + + end diff --git a/device/lib/pic16/libc/delay/delay1mtcy.S b/device/lib/pic16/libc/delay/delay1mtcy.S new file mode 100644 index 0000000..b112e54 --- /dev/null +++ b/device/lib/pic16/libc/delay/delay1mtcy.S @@ -0,0 +1,53 @@ + + include + + extern _delay10tcy + extern _delay100tcy + extern _delay10ktcy + + global _delay1mtcy + + code + +_delay1mtcy: + ; polynomial for 1mtcy delay is f(x) = 100000 * (x-1) + 100000 + decf WREG, f + + movwf POSTDEC1 + movlw 99 + call _delay10ktcy + + movlw 99 + call _delay100tcy + + movlw 9 + call _delay10tcy + + movf PREINC1, w + + bz @delay1m_end + bra $+2 + +@delay1m_loop: + movwf POSTDEC1 + + movlw 99 + call _delay10ktcy + + movlw 99 + call _delay100tcy + + movlw 9 + call _delay10tcy + + bra $+2 + bra $+2 + nop + movf PREINC1, w + decfsz WREG, f + bra @delay1m_loop + +@delay1m_end: + return + + end diff --git a/device/lib/pic16/libc/stdio/fprintf.c b/device/lib/pic16/libc/stdio/fprintf.c new file mode 100644 index 0000000..a261d34 --- /dev/null +++ b/device/lib/pic16/libc/stdio/fprintf.c @@ -0,0 +1,53 @@ +/*----------------------------------------------------------------- + fprintf.c - + + Written for pic16 port, by Vangelis Rokas, 2005 (vrokas@otenet.gr) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + As a special exception, if you link this library with other files, + some of which are compiled with SDCC, to produce an executable, + this library does not by itself cause the resulting executable + to be covered by the GNU General Public License. + This exception does not however invalidate any other reasons why + the executable file might be covered by the GNU General Public License. +-------------------------------------------------------------------------*/ + +#include +#include + +#if _DEBUG +extern void io_long (unsigned long); +extern void io_str (char *); +#endif + +int +fprintf (FILE *stream, const char *fmt, ...) +{ + va_list ap; + +#if _DEBUG + io_str ("fprintf: "); + io_long ((unsigned long) stream); + io_long ((unsigned long) fmt); +#endif + + va_start (ap, fmt); + return vfprintf (stream, fmt, ap); +} diff --git a/device/lib/pic16/libc/stdio/printf.c b/device/lib/pic16/libc/stdio/printf.c new file mode 100644 index 0000000..9312693 --- /dev/null +++ b/device/lib/pic16/libc/stdio/printf.c @@ -0,0 +1,52 @@ +/*----------------------------------------------------------------- + printf.c - + + Written for pic16 port, by Vangelis Rokas, 2005 (vrokas@otenet.gr) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + As a special exception, if you link this library with other files, + some of which are compiled with SDCC, to produce an executable, + this library does not by itself cause the resulting executable + to be covered by the GNU General Public License. + This exception does not however invalidate any other reasons why + the executable file might be covered by the GNU General Public License. +-------------------------------------------------------------------------*/ + +#include +#include + +#if _DEBUG +extern void io_long (unsigned long); +extern void io_str (char *); +#endif + +int +printf (const char *fmt, ...) +{ + va_list ap; + +#if _DEBUG + io_str ("printf: "); + io_long ((unsigned long) stdout); +#endif + + va_start (ap, fmt); + return vfprintf (stdout, fmt, ap); +} diff --git a/device/lib/pic16/libc/stdio/printf_small.c b/device/lib/pic16/libc/stdio/printf_small.c new file mode 100644 index 0000000..d1c7661 --- /dev/null +++ b/device/lib/pic16/libc/stdio/printf_small.c @@ -0,0 +1,166 @@ +/*----------------------------------------------------------------- + printf_small.c - source file for reduced version of printf + + Modified for pic16 port, by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + As a special exception, if you link this library with other files, + some of which are compiled with SDCC, to produce an executable, + this library does not by itself cause the resulting executable + to be covered by the GNU General Public License. + This exception does not however invalidate any other reasons why + the executable file might be covered by the GNU General Public License. +-------------------------------------------------------------------------*/ + +/* This function uses function putchar() to dump a character + * to standard output. putchar() is defined in libc18f.lib + * as dummy function, which will be linked if no putchar() + * function is provided by the user. + * The user can write his own putchar() function and link it + * with the source *BEFORE* the libc18f.lib library. This way + * the linker will link the first function (i.e. the user's function) */ + +/* following formats are supported :- + format output type argument-type + %d decimal int + %ld decimal long + %hd decimal char + %x hexadecimal int + %lx hexadecimal long + %hx hexadecimal char + %o octal int + %lo octal long + %ho octal char + %c character char + %s character generic pointer + %f float float +*/ + +#include +#include +#include + +void +printf_small (const char *fmt, ...) + __reentrant +{ + char *ch; + char radix; + char flong; + char fstr; + char fchar; + char ffloat; + float flt; + char *str; + __data char *str1; + long val; + static char buffer[16]; + va_list ap; + + ch = fmt; + va_start (ap, fmt); + + while (*ch) //for (; *fmt ; fmt++ ) + { + if (*ch == '%') + { + flong = fstr = fchar = ffloat = 0; + radix = 0; + ++ch; + + if (*ch == 'l') + { + flong = 1; + ++ch; + } + else if (*ch == 'h') + { + fchar = 1; + ++ch; + } + + if (*ch == 's') + fstr = 1; + else if (*ch == 'f') + ffloat = 1; + else if (*ch == 'd') + radix = 10; + else if (*ch == 'x') + radix = 16; + else if (*ch == 'c') + radix = 0; + else if (*ch == 'o') + radix = 8; + + if (fstr) + { + str = va_arg (ap, char *); + while (*str) + putchar (*str++); + } + else if (ffloat) + { + flt = va_arg (ap, float); + x_ftoa (flt, buffer, 32, 6); + str1 = buffer; + while (*str1) + ++str1; + --str1; + while (*str1 == '0') + --str1; + ++str1; + *str1 = 0; + str1 = buffer; + while (*str1) + putchar (*str1++); + } + else + { + if (flong) + val = va_arg (ap, long); + else if (fchar) + val = (char) va_arg (ap, int); // FIXME: SDCC casts char arguments into ints + else + { + val = va_arg (ap, int); + } + + if (radix) + { + ltoa (val, buffer, radix); + + str1 = buffer; + while (*str1) + { + putchar (*str1++); + } + } + else + putchar ((char) val); + } + } + else + putchar (*ch); + + ++ch; + } +} diff --git a/device/lib/pic16/libc/stdio/printf_tiny.c b/device/lib/pic16/libc/stdio/printf_tiny.c new file mode 100644 index 0000000..fb44bcf --- /dev/null +++ b/device/lib/pic16/libc/stdio/printf_tiny.c @@ -0,0 +1,207 @@ +/*----------------------------------------------------------------- + printf_tiny.c - source file for reduced version of printf + + Modified for pic16 port, by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + As a special exception, if you link this library with other files, + some of which are compiled with SDCC, to produce an executable, + this library does not by itself cause the resulting executable + to be covered by the GNU General Public License. + This exception does not however invalidate any other reasons why + the executable file might be covered by the GNU General Public License. +-------------------------------------------------------------------------*/ + +/* This function uses function putchar() to dump a character + * to standard output. putchar() is defined in libc18f.lib + * as dummy function, which will be linked if no putchar() + * function is provided by the user. + * The user can write his own putchar() function and link it + * with the source *BEFORE* the libc18f.lib library. This way + * the linker will link the first function (i.e. the user's function) */ + +/* following formats are supported :- + format output type argument-type + %u* unsigned * + + %b binary + %d decimal int + %ld decimal long + %hd decimal char + %x hexadecimal int + %lxX hexadecimal long + %hxX hexadecimal char + %o octal int + %lo octal long + %ho octal char + %c character char + %s character generic pointer +*/ + +/* + * This macro enables the use of the 'b' binary specifier and + * the use of "%b", "%hb" and "%lb" + */ +/* #define BINARY_SPECIFIER */ + +#include +#include +#include +#include + +#if 0 +#define DPUT(c) putchar(c) +#else +#define DPUT(c) +#endif + +#define ISLONG (flong) +#define ISSTR (fstr) +#define ISCHAR (fchar) +#define HAVESIGN (nosign) + +#ifdef BINARY_SPECIFIER +/* "%lb" = "0" - "11111111111111111111111111111111" */ +# define BUF_SIZE 33 +#else +/* "%lo" = "0" - "37777777777" or "-21777777777" - "17777777777" */ +# define BUF_SIZE 13 +#endif + +void +printf_tiny (const char *fmt, ...) +{ + char radix; + char flong, fstr; + char fchar, nosign; + char upcase; + + char *str, *ch; + __data char *str1; + long val; + char buffer[BUF_SIZE]; + va_list ap; + + va_start (ap, fmt); + ch = fmt; + + while (*ch) //for (; *fmt ; fmt++ ) + { + if (*ch == '%') + { + ISLONG = 0; + ISSTR = 0; + ISCHAR = 0; + HAVESIGN = 0; + radix = 0; + upcase = 0; + ch++; + + if (*ch == 'u') + { + HAVESIGN = 1; + ++ch; + } + + if (*ch == 'l') + { + ISLONG = 1; + ++ch; + } + else if (*ch == 'h') + { + ISCHAR = 1; + ++ch; + } + + if (*ch == 's') + ISSTR = 1; + else if (*ch == 'd') + radix = 10; + else if (*ch == 'x') + { + radix = 16; + upcase = 0; + } + else if (*ch == 'X') + { + radix = 16; + upcase = 1; + } + else if (*ch == 'c') + radix = 0; + else if (*ch == 'o') + radix = 8; +#ifdef BINARX_SPECIFIER + else if (*ch == 'b') + radix = 2; +#endif + + if (ISSTR) + { + str = va_arg (ap, char *); + while (*str) + { + putchar (*str); + ++str; + } + } + else + { + if (ISLONG) + val = va_arg (ap, long); + else if (ISCHAR) + { + val = (unsigned char) va_arg (ap, int); // FIXME: SDCC casts char arguments into ints + if (!HAVESIGN) + val = (char) val; // FIXME cont'd: sign-extend if required + } + else + val = va_arg (ap, int); + + if (radix) + { + if (HAVESIGN) + ultoa (val, buffer, radix); + else + ltoa (val, buffer, radix); + + str1 = buffer; + while ((*str1)) + { + radix = *str1; + if (upcase) + radix = toupper (radix); + putchar (radix); + ++str1; + } + } + else + putchar ((char) val); + } + } + else + putchar (*ch); + + ++ch; + } +} diff --git a/device/lib/pic16/libc/stdio/putchar.c b/device/lib/pic16/libc/stdio/putchar.c new file mode 100644 index 0000000..1ce624d --- /dev/null +++ b/device/lib/pic16/libc/stdio/putchar.c @@ -0,0 +1,39 @@ +/* + * putchar.c - putchar dummy function + * + * written by Vangelis Rokas, 2005 (vrokas@otenet.gr) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * As a special exception, if you link this library with other files, + * some of which are compiled with SDCC, to produce an executable, + * this library does not by itself cause the resulting executable + * to be covered by the GNU General Public License. + * This exception does not however invalidate any other reasons why + * the executable file might be covered by the GNU General Public License. + */ + +#include + +/* this is a dummy function so that sources compile, + * even when user doesn't give a putchar() function. + * NOTE that putchar() is declared in stdio.h to + * have the argument in WCHAR (via the wparam pragma) */ + +void +putchar (char c) __wparam +{ + (void)c; +} diff --git a/device/lib/pic16/libc/stdio/sprintf.c b/device/lib/pic16/libc/stdio/sprintf.c new file mode 100644 index 0000000..137a192 --- /dev/null +++ b/device/lib/pic16/libc/stdio/sprintf.c @@ -0,0 +1,46 @@ +/*----------------------------------------------------------------- + sprintf.c - + + Written for pic16 port, by Vangelis Rokas, 2005 (vrokas@otenet.gr) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + As a special exception, if you link this library with other files, + some of which are compiled with SDCC, to produce an executable, + this library does not by itself cause the resulting executable + to be covered by the GNU General Public License. + This exception does not however invalidate any other reasons why + the executable file might be covered by the GNU General Public License. +-------------------------------------------------------------------------*/ + +#include +#include + +int +sprintf (char *ebuf, char *fmt, ...) +{ + unsigned int i; + va_list ap; + + ap = va_start (ap, fmt); + i = vfprintf ((FILE *) ebuf, fmt, ap); + ebuf[i] = '\0'; + + return i; +} diff --git a/device/lib/pic16/libc/stdio/streams.c b/device/lib/pic16/libc/stdio/streams.c new file mode 100644 index 0000000..f48eb8b --- /dev/null +++ b/device/lib/pic16/libc/stdio/streams.c @@ -0,0 +1,37 @@ +/*----------------------------------------------------------------- + streams.c - source file for stream declarations + + Written by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + As a special exception, if you link this library with other files, + some of which are compiled with SDCC, to produce an executable, + this library does not by itself cause the resulting executable + to be covered by the GNU General Public License. + This exception does not however invalidate any other reasons why + the executable file might be covered by the GNU General Public License. +-------------------------------------------------------------------------*/ + +#include + +FILE *stdout; +// = STREAM_USER; +FILE *stdin; +// = STREAM_USER; diff --git a/device/lib/pic16/libc/stdio/strmgpsim.c b/device/lib/pic16/libc/stdio/strmgpsim.c new file mode 100644 index 0000000..5730629 --- /dev/null +++ b/device/lib/pic16/libc/stdio/strmgpsim.c @@ -0,0 +1,45 @@ +/*----------------------------------------------------------------- + strmusart.c - usart stream putchar + + Modified for pic16 port, by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + As a special exception, if you link this library with other files, + some of which are compiled with SDCC, to produce an executable, + this library does not by itself cause the resulting executable + to be covered by the GNU General Public License. + This exception does not however invalidate any other reasons why + the executable file might be covered by the GNU General Public License. +-------------------------------------------------------------------------*/ + +extern WREG; + +/* note that USART should already been initialized */ +void +__stream_gpsim_putchar (char c) __wparam __naked +{ + (void)c; + __asm + MOVFF _WREG, 0xf7f + RETURN + __endasm; +} diff --git a/device/lib/pic16/libc/stdio/strmmssp.c b/device/lib/pic16/libc/stdio/strmmssp.c new file mode 100644 index 0000000..3b0702d --- /dev/null +++ b/device/lib/pic16/libc/stdio/strmmssp.c @@ -0,0 +1,44 @@ +/*----------------------------------------------------------------- + strmmssp.c - MSSP stream putchar + + Written for pic16 port, by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + As a special exception, if you link this library with other files, + some of which are compiled with SDCC, to produce an executable, + this library does not by itself cause the resulting executable + to be covered by the GNU General Public License. + This exception does not however invalidate any other reasons why + the executable file might be covered by the GNU General Public License. +-------------------------------------------------------------------------*/ + +extern WREG; +extern SSPBUF; + +/* note that USART should already been initialized */ +void +__stream_mssp_putchar (char c) __wparam __naked +{ + (void)c; + __asm + MOVWF _SSPBUF + RETURN + __endasm; +} diff --git a/device/lib/pic16/libc/stdio/strmputchar.c b/device/lib/pic16/libc/stdio/strmputchar.c new file mode 100644 index 0000000..57d16b9 --- /dev/null +++ b/device/lib/pic16/libc/stdio/strmputchar.c @@ -0,0 +1,64 @@ +/*----------------------------------------------------------------- + strmputchar.c - stream putchar dispatch function + + Written for pic16 port, by Vangelis Rokas, 2005 (vrokas@otenet.gr) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + As a special exception, if you link this library with other files, + some of which are compiled with SDCC, to produce an executable, + this library does not by itself cause the resulting executable + to be covered by the GNU General Public License. + This exception does not however invalidate any other reasons why + the executable file might be covered by the GNU General Public License. +-------------------------------------------------------------------------*/ + +#include + +void +__stream_putchar(FILE *stream, char c) +{ + unsigned char deref; + + deref = (unsigned char) (((unsigned long) stream) >> 16); + +#if _DEBUG + io_str ("__stream_putchar: "); + io_long ((unsigned long) stream); +#endif + + if (deref == 0x80) + { + /* this is a data/near memory pointer */ + *(*(char **) stream) = c; + *(char **) stream += 1; + } + else if (deref & 0x20) + { + deref ^= 0x20; + if (deref == USART_DEREF) + __stream_usart_putchar (c); + else if (deref == MSSP_DEREF) + __stream_mssp_putchar (c); + else if (deref == USER_DEREF) + putchar (c); + else if (deref == GPSIM_DEREF) /* see stdio.h for info on this */ + __stream_gpsim_putchar (c); /* feature */ + } +} diff --git a/device/lib/pic16/libc/stdio/strmusart.c b/device/lib/pic16/libc/stdio/strmusart.c new file mode 100644 index 0000000..60a7e46 --- /dev/null +++ b/device/lib/pic16/libc/stdio/strmusart.c @@ -0,0 +1,50 @@ +/*----------------------------------------------------------------- + strmusart.c - usart stream putchar + + Written for pic16 port, by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + As a special exception, if you link this library with other files, + some of which are compiled with SDCC, to produce an executable, + this library does not by itself cause the resulting executable + to be covered by the GNU General Public License. + This exception does not however invalidate any other reasons why + the executable file might be covered by the GNU General Public License. +-------------------------------------------------------------------------*/ + +extern WREG; +extern TXREG; +extern TXSTA; + +/* note that USART should already been initialized */ +void +__stream_usart_putchar (char c) __wparam __naked +{ + (void)c; + __asm +@1: + BTFSS _TXSTA, 1 + BRA @1 + MOVWF _TXREG + RETURN + __endasm; +} diff --git a/device/lib/pic16/libc/stdio/vfprintf.c b/device/lib/pic16/libc/stdio/vfprintf.c new file mode 100644 index 0000000..3d3137c --- /dev/null +++ b/device/lib/pic16/libc/stdio/vfprintf.c @@ -0,0 +1,493 @@ +/*----------------------------------------------------------------- + vfprintf.c - source file for reduced version of printf + + Modified for pic16 port, by Vangelis Rokas, 2005 (vrokas@otenet.gr) + Bug-fixed and feature-enhanced by Mauro Giachero, 2008 (mauro.giachero@gmail.com) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + As a special exception, if you link this library with other files, + some of which are compiled with SDCC, to produce an executable, + this library does not by itself cause the resulting executable + to be covered by the GNU General Public License. + This exception does not however invalidate any other reasons why + the executable file might be covered by the GNU General Public License. +-------------------------------------------------------------------------*/ + +/* following formats are supported :- + format output type argument-type + %% - - + %u unsigned int + %u* unsigned * + %b binary int + %lb binary long + %hb binary char + %d decimal int + %lu unsigned long + %hu unsigned char + %l[di] decimal long + %lu[di] unsigned long + %h[di] decimal char + %hu[di] unsigned char + %[xX] hexadecimal int + %l[xX] hexadecimal long + %h[xX] hexadecimal char + %o octal int + %lo octal long + %ho octal char + %c character char + %s character generic pointer + Also supported are: + - the '0', '-' and ' ' alignment modifiers + - the '+' and ' ' modifiers + - the width field for integral types + - the precision field for strings +*/ + +#include +#include +#include +#include + +/*********************************************************** + * The following switches enable some "advanced" features. * + * With all the switches enabled: * + * ; Statistics: * + * ; code size: 2062 (0x080e) bytes ( 1.57%) * + * ; 1031 (0x0407) words * + * ; udata size: 16 (0x0010) bytes ( 1.25%) * + * ; access size: 31 (0x001f) bytes * + * With all the switches disabled: * + * ; Statistics: * + * ; code size: 1278 (0x04fe) bytes ( 0.98%) * + * ; 639 (0x027f) words * + * ; udata size: 16 (0x0010) bytes ( 1.25%) * + * ; access size: 25 (0x0019) bytes * + ***********************************************************/ +/* + * Define this to enable support of the field width, which + * allows to specify the minimum number of characters an + * integer must use. + * Costs ~200 code words and 3 bytes in access RAM. + */ +#define FIELD_WIDTH +/* + * Define this to enable support of the precision, which + * allows to specify the maximum number of characters a + * string can use. Note that this implementation doesn't + * use this field for integers (as it should). + * Costs ~85 code words and 1 byte in access RAM. + */ +#define PRECISION +/* + * Define this to enable support of the '+' and ' ' modifiers, + * which specify that a positive signed number must be + * preceded respectively with a '+' or a ' ' character. + * Costs ~70 code words and 2 words of access RAM + */ +#define SIGN_MODIFIERS +/* + * With this macro defined, trying to print a float number + * will generate the "" string. + * Costs ~25 code words + */ +#define FLOAT_PLACEHOLDER +/* + * With this macro defined, printing floats will work. + * This also enables PRECISION and disables FLOAT_PLACEHOLDER. + */ +#if defined(USE_FLOATS) + /* The configure script always defines USE_FLOATS to 0 or 1. */ +# if USE_FLOATS < 1 +# undef USE_FLOATS +# endif +#else +/* # define USE_FLOATS */ +#endif + +#if defined(USE_FLOATS) +#define PRECISION +#undef FLOAT_PLACEHOLDER +#endif +/* + * This macro enables the use of the 'b' binary specifier and + * the use of "%b", "%hb" and "%lb" + */ +/* #define BINARY_SPECIFIER */ +/* + * This macro enables the use of the 'i' integer specifier and + * the use of "%u", "%lu", ... in place of "%ud", "%lud", ... . + * costs ~10 code words + */ +#define EXTRA_INTEGER + +#if defined(USE_FLOATS) +/* x_ftoa requires up to 8 digits (integral part) + '.' + 24 digits + * (fractional part). Adding a sign and a NUL byte yields 35 byte. */ +# define BUF_SIZE 36 +#elif defined(BINARY_SPECIFIER) +/* "%lb" = "0" - "11111111111111111111111111111111" */ +# define BUF_SIZE 33 +#else +/* "%lo" = "0" - "37777777777" or "-20000000000" - "17777777777" */ +# define BUF_SIZE 13 +#endif + +#if _DEBUG +extern void io_long (unsigned long); +extern void io_str (char *); +extern void io_int (unsigned int); +#endif + +int +vfprintf (FILE * stream, const char *fmt, va_list ap) +{ + unsigned char radix; + unsigned char flong; + unsigned char fstr; + unsigned char fchar; +#if defined(FLOAT_PLACEHOLDER) || defined(USE_FLOATS) + unsigned char ffloat; +#endif + unsigned char nosign; + unsigned char upcase; +#ifdef FIELD_WIDTH + unsigned char fieldwidth; + unsigned char lalign; + char padchar; + char *str1; +#endif +#ifdef PRECISION + unsigned char precision; +#endif +#ifdef SIGN_MODIFIERS + unsigned char printsign; + char positivechar; +#endif + int count = 0; + char *str, *ch; + long val; + char buffer[BUF_SIZE]; + char *stringbuffer; + + if (0x80 == (unsigned char)(((unsigned long)stream) >> 16)) { + /* strmputchar will modify *(char **)stream, thus confusing the user */ + stringbuffer = (char *) stream; + stream = (FILE *) &stringbuffer; + } + +#if _DEBUG + io_str ("vfprintf: "); + io_long ((unsigned long) stream); + io_long ((unsigned long) fmt); +#endif + +// va_start(ap,fmt); + ch = fmt; + + while (*ch) //for (; *fmt ; fmt++ ) + { + if (*ch == '%') + { + flong = 0; + fstr = 0; + fchar = 0; +#if defined(FLOAT_PLACEHOLDER) || defined(USE_FLOATS) + ffloat = 0; +#endif + nosign = 0; + radix = 10; + upcase = 0; +#ifdef FIELD_WIDTH + fieldwidth = 0; + lalign = 0; + padchar = ' '; +#endif +#ifdef PRECISION + // precision == -1 is used as an "unlimited" precision marker + precision = -1; +#endif +#ifdef SIGN_MODIFIERS + printsign = 0; + positivechar = '+'; +#endif + ++ch; + + if (*ch == '%') + { + __stream_putchar (stream, *ch); + ++count; + ++ch; + continue; + } + +#ifdef FIELD_WIDTH + if (*ch == '0') + { + padchar = '0'; + ++ch; + } + + if (*ch == '-') + { + lalign = 1; + ++ch; + } +#endif +#ifdef SIGN_MODIFIERS + if (*ch == ' ') + { + printsign = 1; + positivechar = ' '; + ++ch; + } + + if (*ch == '+') + { + printsign = 1; + ++ch; + } +#endif + +#ifdef FIELD_WIDTH + if ((*ch >= '1') && (*ch <= '9')) + { + while ((*ch >= '0') && (*ch <= '9')) + { + fieldwidth = 10 * fieldwidth + (*ch) - '0'; + ++ch; + } + } +#endif + +#ifdef PRECISION + if (*ch == '.') + { + ++ch; + precision = 0; + while ((*ch >= '0') && (*ch <= '9')) + { + precision = 10 * precision + (*ch) - '0'; + ++ch; + } + } +#endif + + if (*ch == 'l') + { + flong = 1; + ++ch; + } + else if (*ch == 'h') + { + fchar = 1; + ++ch; + } + + if (*ch == 'u') + { + nosign = 1; + ++ch; + } + + if (*ch == 's') + { + fstr = 1; +#ifdef FIELD_WIDTH + padchar = ' '; /* Strings are always space-padded */ +#endif + } + else if (*ch == 'x') + radix = 16; + else if (*ch == 'X') + { + radix = 16; + upcase = 1; + } + else if (*ch == 'c') + radix = 0; + else if (*ch == 'o') + radix = 8; +#ifdef BINARX_SPECIFIER + else if (*ch == 'b') + radix = 2; +#endif +#if defined(FLOAT_PLACEHOLDER) || defined(USE_FLOATS) + else if (*ch == 'f') + { + ffloat = 1; + } +#endif +#ifdef EXTRA_INTEGER + else if ((*ch == 'd') || (*ch == 'i')) /* This is the default */ + ; + else if (nosign) /* %u alone is the same as %ud */ + --ch; +#else + else if (*ch == 'd') + ; +#endif + else + { + __stream_putchar (stream, *ch); + ++count; + ++ch; + continue; + } + + if (fstr) + { + str = va_arg (ap, char *); +#if defined(USE_FLOATS) + } + else if (ffloat) + { + float f = va_arg(ap, float); + str = buffer; + x_ftoa (f, buffer, BUF_SIZE, precision); + precision = -1; +#elif defined(FLOAT_PLACEHOLDER) + } + else if (ffloat) + { + str = ""; + va_arg (ap, float); +#ifdef PRECISION + precision = -1; +#endif /* PRECISION */ +#endif /* FLOAT_PLACEHOLDER */ + } + else + { +#ifdef PRECISION + precision = -1; //FIXME: No support for the precision field on numerals +#endif + val = 0; + if (flong) + { + val = va_arg (ap, long); +#if _DEBUG + io_long (val); +#endif + } + else if (fchar) + { + val = (char) va_arg (ap, int); // FIXME: SDCC passes 1-byte char varargs as 2-byte ints... + if ((radix != 10) || nosign) + val = (unsigned char) val; //Avoid unwanted sign extension +#if _DEBUG + io_long (val); +#endif + } + else + { + val = va_arg (ap, int); + if ((radix != 10) || nosign) + val = (unsigned int) val; //Avoid unwanted sign extension +#if _DEBUG + io_long (val); +#endif + } + + str = buffer + 1; //Reserve space for a forced '+' + if (radix) + { + if (nosign) + ultoa (val, buffer + 1, radix); + else + ltoa (val, buffer + 1, radix); +#ifdef SIGN_MODIFIERS + if (printsign && (*str != '-')) + { + --str; + *str = positivechar; + } +#endif + } + else + { + *str = (unsigned char) val; + *(str + 1) = '\0'; + } + } + +#ifdef FIELD_WIDTH + //Count how many pad chars are required in fieldwidth + str1 = str; + while (fieldwidth && *str1) + { + ++str1; + --fieldwidth; + } + //Left padding + if (!lalign) + { + while (fieldwidth) + { + __stream_putchar (stream, padchar); + ++count; + --fieldwidth; + } + } +#endif + while (*str +#ifdef PRECISION + && (!~precision || precision--) +#endif + ) + { + radix = *str; + if (upcase) + { + radix = toupper (radix); + } + __stream_putchar (stream, radix); + ++str; + ++count; + if (fieldwidth) + { + fieldwidth--; + } + } +#ifdef FIELD_WIDTH + //Right padding (with spaces) + if (lalign) + { + while (fieldwidth) + { + __stream_putchar (stream, ' '); + ++count; + --fieldwidth; + } + } +#endif + } + else + { + __stream_putchar (stream, *ch); + ++count; + } + + ++ch; + } + + return count; +} diff --git a/device/lib/pic16/libc/stdio/vprintf.c b/device/lib/pic16/libc/stdio/vprintf.c new file mode 100644 index 0000000..ef6be5e --- /dev/null +++ b/device/lib/pic16/libc/stdio/vprintf.c @@ -0,0 +1,39 @@ +/*----------------------------------------------------------------- + vprintf.c - + + Written for pic16 port, by Vangelis Rokas, 2005 (vrokas@otenet.gr) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + As a special exception, if you link this library with other files, + some of which are compiled with SDCC, to produce an executable, + this library does not by itself cause the resulting executable + to be covered by the GNU General Public License. + This exception does not however invalidate any other reasons why + the executable file might be covered by the GNU General Public License. +-------------------------------------------------------------------------*/ + +#include +#include + +int +vprintf (const char *fmt, va_list ap) +{ + return vfprintf(stdout, fmt, ap); +} diff --git a/device/lib/pic16/libc/stdio/vsprintf.c b/device/lib/pic16/libc/stdio/vsprintf.c new file mode 100644 index 0000000..57259e5 --- /dev/null +++ b/device/lib/pic16/libc/stdio/vsprintf.c @@ -0,0 +1,44 @@ +/*----------------------------------------------------------------- + vsprintf.c - + + Written for pic16 port, by Vangelis Rokas, 2005 (vrokas@otenet.gr) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + As a special exception, if you link this library with other files, + some of which are compiled with SDCC, to produce an executable, + this library does not by itself cause the resulting executable + to be covered by the GNU General Public License. + This exception does not however invalidate any other reasons why + the executable file might be covered by the GNU General Public License. +-------------------------------------------------------------------------*/ + +#include +#include + +int +vsprintf (char *ebuf, const char *fmt, va_list ap) +{ + unsigned int i; + + i = vfprintf((FILE *) ebuf, fmt, ap); + ebuf[i] = '\0'; + + return i; +} diff --git a/device/lib/pic16/libc/stdlib/atof.c b/device/lib/pic16/libc/stdlib/atof.c new file mode 100644 index 0000000..0548c72 --- /dev/null +++ b/device/lib/pic16/libc/stdlib/atof.c @@ -0,0 +1,84 @@ +/* atof.c: converts an ASCII string to float + + Copyright (C) 2003 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +#include +#include + +float atof(char * s) +{ + float value, fraction; + char iexp; + char sign; + + //Skip leading blanks + while (isspace(*s)) s++; + + //Get the sign + if (*s == '-') + { + sign=1; + s++; + } + else + { + sign=0; + if (*s == '+') s++; + } + + //Get the integer part + for (value=0.0; isdigit(*s); s++) + { + value=10.0*value+(*s-'0'); + } + + //Get the fraction + if (*s == '.') + { + s++; + for (fraction=0.1; isdigit(*s); s++) + { + value+=(*s-'0')*fraction; + fraction*=0.1; + } + } + + //Finally, the exponent (not very efficient, but enough for now*/ + if (toupper(*s)=='E') + { + s++; + iexp=(char)atoi(s); + { + while(iexp!=0) + { + if(iexp<0) + { + value*=0.1; + iexp++; + } + else + { + value*=10.0; + iexp--; + } + } + } + } + + if(sign) value*=-1.0; + return (value); +} diff --git a/device/lib/pic16/libc/stdlib/atoi.c b/device/lib/pic16/libc/stdlib/atoi.c new file mode 100644 index 0000000..4167cda --- /dev/null +++ b/device/lib/pic16/libc/stdlib/atoi.c @@ -0,0 +1,54 @@ +/*--------------------------------------------------------------------- + atoi - convert a string to an integer and return it + + written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +int atoi(char * s) +{ + int rv=0; + char sign = 0; + + /* skip till we find either a digit or '+' or '-' */ + while (*s) { + if (*s <= '9' && *s >= '0') + break; + if (*s == '-' || *s == '+') + break; + s++; + } + + if(*s == '-')sign=1; + +// sign = (*s == '-'); + if (*s == '-' || *s == '+') s++; + + while (*s && *s >= '0' && *s <= '9') { + rv = (rv * 10) + (*s - '0'); + s++; + } + + if(sign)return (-rv); + else return (rv); + +// return (sign ? -rv : rv); +} + diff --git a/device/lib/pic16/libc/stdlib/atol.c b/device/lib/pic16/libc/stdlib/atol.c new file mode 100644 index 0000000..794f899 --- /dev/null +++ b/device/lib/pic16/libc/stdlib/atol.c @@ -0,0 +1,49 @@ +/*--------------------------------------------------------------------- + atol - convert a string to long integer and return it + + written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +long atol(char * s) +{ + register long rv=0; + register char sign = 0; + + /* skip till we find either a digit or '+' or '-' */ + while (*s) { + if (*s <= '9' && *s >= '0') + break; + if (*s == '-' || *s == '+') + break; + s++; + } + + sign = (*s == '-'); + if (*s == '-' || *s == '+') s++; + + while (*s && *s >= '0' && *s <= '9') { + rv = (rv * 10) + (*s - '0'); + s++; + } + + return (sign ? -rv : rv); +} + diff --git a/device/lib/pic16/libc/stdlib/calloc.c b/device/lib/pic16/libc/stdlib/calloc.c new file mode 100644 index 0000000..08f570d --- /dev/null +++ b/device/lib/pic16/libc/stdlib/calloc.c @@ -0,0 +1,48 @@ +/* + * calloc.c - dynamic memory allocation + * + * written by Vangelis Rokas, 2004 (vrokas@otenet.gr) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2, or (at your option) any + * later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * In other words, you are welcome to use, share and improve this program. + * You are forbidden to forbid anyone else to use, share and improve + * what you give them. Help stamp out software-hoarding! + * + * $Id: calloc.c 3835 2005-08-07 20:09:11Z tecodev $ + */ + +#include + +extern unsigned char _MALLOC_SPEC *heap; + +unsigned char _MALLOC_SPEC *calloc(unsigned char len) +{ + unsigned char _MALLOC_SPEC *result, *ch; + + if (len >= MAX_BLOCK_SIZE) return ((unsigned char _MALLOC_SPEC *)0); + ch = malloc( len ); + result = ch; + + if (result != 0) { + while (len) { + --len; + *ch = 0; + ch++; + } + } + + return (result); +} diff --git a/device/lib/pic16/libc/stdlib/crc16.c b/device/lib/pic16/libc/stdlib/crc16.c new file mode 100644 index 0000000..cc94918 --- /dev/null +++ b/device/lib/pic16/libc/stdlib/crc16.c @@ -0,0 +1,206 @@ +/* + * crc16.c - CRC16 checksum generation + * + * this source is part of the linux kernel distribution + * + * modified for SDCC/pic16 by Vangelis Rokas, 2005 + * + * + * PURPOSE + * Routines to generate, calculate, and test a 16-bit CRC. + * + * DESCRIPTION + * The CRC code was devised by Don P. Mitchell of AT&T Bell Laboratories + * and Ned W. Rhodes of Software Systems Group. It has been published in + * "Design and Validation of Computer Protocols", Prentice Hall, + * Englewood Cliffs, NJ, 1991, Chapter 3, ISBN 0-13-539925-4. + * + * Copyright is held by AT&T. + * + * AT&T gives permission for the free use of the CRC source code. + * + * CONTACTS + * E-mail regarding any portion of the Linux UDF file system should be + * directed to the development team mailing list (run by majordomo): + * linux_udf@hpesjro.fc.hp.com + * + * COPYRIGHT + * This file is distributed under the terms of the GNU General Public + * License (GPL). Copies of the GPL can be obtained from: + * ftp://prep.ai.mit.edu/pub/gnu/GPL + * Each contributing author retains all rights to their own work. + * + * + * $Id: crc16.c 3721 2005-04-06 20:09:07Z maartenbrock $ + */ + +#include + +__code uint16_t crc_table[256] = { + 0x0000U, 0x1021U, 0x2042U, 0x3063U, 0x4084U, 0x50a5U, 0x60c6U, 0x70e7U, + 0x8108U, 0x9129U, 0xa14aU, 0xb16bU, 0xc18cU, 0xd1adU, 0xe1ceU, 0xf1efU, + 0x1231U, 0x0210U, 0x3273U, 0x2252U, 0x52b5U, 0x4294U, 0x72f7U, 0x62d6U, + 0x9339U, 0x8318U, 0xb37bU, 0xa35aU, 0xd3bdU, 0xc39cU, 0xf3ffU, 0xe3deU, + 0x2462U, 0x3443U, 0x0420U, 0x1401U, 0x64e6U, 0x74c7U, 0x44a4U, 0x5485U, + 0xa56aU, 0xb54bU, 0x8528U, 0x9509U, 0xe5eeU, 0xf5cfU, 0xc5acU, 0xd58dU, + 0x3653U, 0x2672U, 0x1611U, 0x0630U, 0x76d7U, 0x66f6U, 0x5695U, 0x46b4U, + 0xb75bU, 0xa77aU, 0x9719U, 0x8738U, 0xf7dfU, 0xe7feU, 0xd79dU, 0xc7bcU, + 0x48c4U, 0x58e5U, 0x6886U, 0x78a7U, 0x0840U, 0x1861U, 0x2802U, 0x3823U, + 0xc9ccU, 0xd9edU, 0xe98eU, 0xf9afU, 0x8948U, 0x9969U, 0xa90aU, 0xb92bU, + 0x5af5U, 0x4ad4U, 0x7ab7U, 0x6a96U, 0x1a71U, 0x0a50U, 0x3a33U, 0x2a12U, + 0xdbfdU, 0xcbdcU, 0xfbbfU, 0xeb9eU, 0x9b79U, 0x8b58U, 0xbb3bU, 0xab1aU, + 0x6ca6U, 0x7c87U, 0x4ce4U, 0x5cc5U, 0x2c22U, 0x3c03U, 0x0c60U, 0x1c41U, + 0xedaeU, 0xfd8fU, 0xcdecU, 0xddcdU, 0xad2aU, 0xbd0bU, 0x8d68U, 0x9d49U, + 0x7e97U, 0x6eb6U, 0x5ed5U, 0x4ef4U, 0x3e13U, 0x2e32U, 0x1e51U, 0x0e70U, + 0xff9fU, 0xefbeU, 0xdfddU, 0xcffcU, 0xbf1bU, 0xaf3aU, 0x9f59U, 0x8f78U, + 0x9188U, 0x81a9U, 0xb1caU, 0xa1ebU, 0xd10cU, 0xc12dU, 0xf14eU, 0xe16fU, + 0x1080U, 0x00a1U, 0x30c2U, 0x20e3U, 0x5004U, 0x4025U, 0x7046U, 0x6067U, + 0x83b9U, 0x9398U, 0xa3fbU, 0xb3daU, 0xc33dU, 0xd31cU, 0xe37fU, 0xf35eU, + 0x02b1U, 0x1290U, 0x22f3U, 0x32d2U, 0x4235U, 0x5214U, 0x6277U, 0x7256U, + 0xb5eaU, 0xa5cbU, 0x95a8U, 0x8589U, 0xf56eU, 0xe54fU, 0xd52cU, 0xc50dU, + 0x34e2U, 0x24c3U, 0x14a0U, 0x0481U, 0x7466U, 0x6447U, 0x5424U, 0x4405U, + 0xa7dbU, 0xb7faU, 0x8799U, 0x97b8U, 0xe75fU, 0xf77eU, 0xc71dU, 0xd73cU, + 0x26d3U, 0x36f2U, 0x0691U, 0x16b0U, 0x6657U, 0x7676U, 0x4615U, 0x5634U, + 0xd94cU, 0xc96dU, 0xf90eU, 0xe92fU, 0x99c8U, 0x89e9U, 0xb98aU, 0xa9abU, + 0x5844U, 0x4865U, 0x7806U, 0x6827U, 0x18c0U, 0x08e1U, 0x3882U, 0x28a3U, + 0xcb7dU, 0xdb5cU, 0xeb3fU, 0xfb1eU, 0x8bf9U, 0x9bd8U, 0xabbbU, 0xbb9aU, + 0x4a75U, 0x5a54U, 0x6a37U, 0x7a16U, 0x0af1U, 0x1ad0U, 0x2ab3U, 0x3a92U, + 0xfd2eU, 0xed0fU, 0xdd6cU, 0xcd4dU, 0xbdaaU, 0xad8bU, 0x9de8U, 0x8dc9U, + 0x7c26U, 0x6c07U, 0x5c64U, 0x4c45U, 0x3ca2U, 0x2c83U, 0x1ce0U, 0x0cc1U, + 0xef1fU, 0xff3eU, 0xcf5dU, 0xdf7cU, 0xaf9bU, 0xbfbaU, 0x8fd9U, 0x9ff8U, + 0x6e17U, 0x7e36U, 0x4e55U, 0x5e74U, 0x2e93U, 0x3eb2U, 0x0ed1U, 0x1ef0U +}; + +/* + * udf_crc + * + * PURPOSE + * Calculate a 16-bit CRC checksum using ITU-T V.41 polynomial. + * + * DESCRIPTION + * The OSTA-UDF(tm) 1.50 standard states that using CRCs is mandatory. + * The polynomial used is: x^16 + x^12 + x^5 + 1 + * + * PRE-CONDITIONS + * data Pointer to the data block. + * size Size of the data block. + * + * POST-CONDITIONS + * CRC of the data block. + * + * HISTORY + * July 21, 1997 - Andrew E. Mileski + * Adapted from OSTA-UDF(tm) 1.50 standard. + */ +uint16_t crc16(uint8_t *data, uint32_t size, uint16_t crc) +{ + while (size--) + crc = crc_table[(crc >> 8 ^ *(data++)) & 0xffU] ^ (crc << 8); + + return crc; +} + +/****************************************************************************/ +#if defined(CRCTEST) + +/* + * PURPOSE + * Test udf_crc() + * + * HISTORY + * July 21, 1997 - Andrew E. Mileski + * Adapted from OSTA-UDF(tm) 1.50 standard. + */ + +#include + +unsigned char bytes[] = { 0x70U, 0x6AU, 0x77U }; + +void dump_table(void) +{ + int i, j; + + for(i=j=0;i<256;i++) { + printf("0x%ux ", crc_table[i]); + j++; + if(j % 8 == 0)printf("\n"); + } +} + + +int main(void) +{ + unsigned int x; + + + stdout = STREAM_GPSIM; + + dump_table(); + + x = crc16(bytes, sizeof(bytes), 0); + printf("crc16: calculated = %ux, correct = %ux\n", x, 0x3299U); + + printf("test value = %d\n", -45); + + return 0; +} + +#endif /* defined(CRCTEST) */ + +/****************************************************************************/ +#if defined(CRCGENERATE) + +/* + * PURPOSE + * Generate a table for fast 16-bit CRC calculations (any polynomial). + * + * DESCRIPTION + * The ITU-T V.41 polynomial is 010041. + * + * HISTORY + * July 21, 1997 - Andrew E. Mileski + * Adapted from OSTA-UDF(tm) 1.50 standard. + */ + +#include + +int main(int argc, char **argv) +{ + unsigned long crc, poly; + int n, i; + + /* Get the polynomial */ + sscanf(argv[1], "%lo", &poly); + if (poly & 0xffff0000U){ + fprintf(stderr, "polynomial is too large\en"); + exit(1); + } + + printf("/* CRC %d 0%o 0x%x */\n", poly, poly, poly); + + /* Create a table */ + printf("static unsigned short crc_table[256] = {\n"); + for (n = 0; n < 256; n++){ + if (n % 8 == 0) + printf("\t"); + crc = n << 8; + for (i = 0; i < 8; i++){ + if(crc & 0x8000U) + crc = (crc << 1) ^ poly; + else + crc <<= 1; + crc &= 0xFFFFU; + } + if (n == 255) + printf("0x%04xU ", crc); + else + printf("0x%04xU, ", crc); + if(n % 8 == 7) + printf("\n"); + } + printf("};\n"); + + return 0; +} + +#endif /* defined(CRCGENERATE) */ diff --git a/device/lib/pic16/libc/stdlib/free.c b/device/lib/pic16/libc/stdlib/free.c new file mode 100644 index 0000000..b3d0884 --- /dev/null +++ b/device/lib/pic16/libc/stdlib/free.c @@ -0,0 +1,36 @@ +/* + * free.c - dynamic memory allocation + * + * written by Vangelis Rokas, 2004 (vrokas@otenet.gr) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2, or (at your option) any + * later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * In other words, you are welcome to use, share and improve this program. + * You are forbidden to forbid anyone else to use, share and improve + * what you give them. Help stamp out software-hoarding! + * + * $Id: free.c 4914 2007-09-16 18:24:27Z tecodev $ + */ + +#include + +extern char _MALLOC_SPEC *heap; + +void free(unsigned char _MALLOC_SPEC *buf) +{ + /* mark block as deallocated */ + ((_MALLOC_SPEC _malloc_rec *)((unsigned int)buf - 1))->bits.alloc = 0; +} + diff --git a/device/lib/pic16/libc/stdlib/g_ftoa.S b/device/lib/pic16/libc/stdlib/g_ftoa.S new file mode 100644 index 0000000..e1381fd --- /dev/null +++ b/device/lib/pic16/libc/stdlib/g_ftoa.S @@ -0,0 +1,208 @@ +;-- +; +; File: ftoa.asm +; Author: George Gallant +; Date: 19OCT04 +; +; This routine provides a floating point to ascii conversion. +; It was written support the SDCC project. +; +; SDCC C Syntax: +; +; extern void g_ftoa(data char *buf, float num, char precision); +; +; The routine is NOT reenterant but expects the entire parameter list +; to be placed on the stack. +; +; Notes: 1. measured 105usec to convert -65535.996 on a 20MHz 18f252 +; 2. Software stack can not cross a RAM page boundary +; +;-- + list r=dec, n=96, st=off, mm=off + + nolist + include + list + + udata + + extern digits + +exp: res 1 +man: res 4 +r: res 5 +x: res 3 +bp: res 2 +prec: res 1 +ctr: res 1 + + code + + extern cvt_dec_word + global _g_ftoa + +_g_ftoa: movff FSR2H,POSTDEC1 + movff FSR2L,POSTDEC1 + + movff FSR1H,FSR2H + movff FSR1L,FSR2L + + movff exp, POSTDEC1 + movff man+0, POSTDEC1 + movff man+1, POSTDEC1 + movff man+2, POSTDEC1 + movff man+3, POSTDEC1 + movff r+0, POSTDEC1 + movff r+1, POSTDEC1 + movff r+2, POSTDEC1 + movff r+3, POSTDEC1 + movff r+4, POSTDEC1 + movff x+0, POSTDEC1 + movff x+1, POSTDEC1 + movff bp+0, POSTDEC1 + movff bp+1, POSTDEC1 + movff prec, POSTDEC1 + movff ctr, POSTDEC1 + + movff FSR0H,POSTDEC1 + movff FSR0L,POSTDEC1 + + movlw 3 + addwf FSR2L, f + btfsc STATUS,C + incf FSR2H, f + + movff POSTINC2,FSR0L ;get the low byte of buf pointer + movff POSTINC2,FSR0H + + movff POSTINC2,man+0 ;get the low byte of float + movff POSTINC2,man+1 + movff POSTINC2,man+2 + movff POSTINC2,exp + + movff POSTINC2,prec + + rlcf man+2,w + rlcf exp,f + bnc @1 + movlw '-' + movwf POSTINC0 + +@1: movff man+0,r+0 + movff man+1,r+1 + movff man+2,r+2 + bsf r+2,7 + clrf r+3 + clrf r+4 + +; Shift the mantissa left or right by the expondent + + movf exp,w ;get the expondent + sublw 127 ;subtract the bais + bz @4 ;skip shifting if zero + bn @3 ;shift left if neg + +@2: bcf STATUS,C ;otherwise, shift right + rrcf r+4,f + rrcf r+3,f + rrcf r+2,f + rrcf r+1,f + rrcf r+0,f + decfsz WREG,w + bra @2 + bra @4 + +@3: bcf STATUS,C + rlcf r+0, f + rlcf r+1, f + rlcf r+2, f + rlcf r+3, f + rlcf r+4, f + incfsz WREG,w + bra @3 + +@4: rlcf r+2,w ;extract bit 23 + rlcf r+3,f ;shift rest of whole number + rlcf r+4,f + + movff r+3,PRODL + movff r+4,PRODH + call cvt_dec_word + + movlw '.' + movwf POSTINC0 + +@10: movlw 0x7F + andwf r+2,f + clrf r+3 + + movff r+0,x+0 ;temp copy + movff r+1,x+1 + movff r+2,x+2 + + bcf STATUS,C ;mult by 2 + rlcf r+0,f + rlcf r+1,f + rlcf r+2,f + rlcf r+3,f + + bcf STATUS,C ;mult by 4 + rlcf r+0,f + rlcf r+1,f + rlcf r+2,f + rlcf r+3,f + + movf x+0,w ;mult by 5 + addwf r+0,f + movf x+1,w + addwfc r+1,f + movf x+2,w + addwfc r+2,f + movlw 0 + addwfc r+3,f + + rlcf r+2,w ;div by 0x400000 + rlcf r+3,f ;or just extract bits 24-22 + rlcf WREG,w + rlcf r+3,f + + movf r+3,w ;this is the bcd value + addlw 0x30 ;convert to ascii + movwf POSTINC0 ;and save in memory + + bcf STATUS,C ;mult by 2 + rlcf r+0,f + rlcf r+1,f + rlcf r+2,f + + decfsz prec,f + bra @10 + + clrf POSTINC0 ;pack a nullbyte at the end + + + movff ctr, POSTDEC1 + movff prec, POSTDEC1 + movff bp+1, POSTDEC1 + movff bp+0, POSTDEC1 + movff x+1, POSTDEC1 + movff x+0, POSTDEC1 + movff r+4, POSTDEC1 + movff r+3, POSTDEC1 + movff r+2, POSTDEC1 + movff r+1, POSTDEC1 + movff r+0, POSTDEC1 + movff man+3, POSTDEC1 + movff man+2, POSTDEC1 + movff man+1, POSTDEC1 + movff man+0, POSTDEC1 + movff exp, POSTDEC1 + + movff PREINC1,FSR0L + movff PREINC1,FSR0H + + movff PREINC1,FSR2L + movff PREINC1,FSR2H + return + + end diff --git a/device/lib/pic16/libc/stdlib/itoa.c b/device/lib/pic16/libc/stdlib/itoa.c new file mode 100644 index 0000000..bb94e2b --- /dev/null +++ b/device/lib/pic16/libc/stdlib/itoa.c @@ -0,0 +1,34 @@ +/*------------------------------------------------------------------- + itoa.c - convert (unsigned) int to strings + + written by: Raphael Neider + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + $Id: itoa.c 4148 2006-05-01 20:47:12Z tecodev $ +-------------------------------------------------------------------*/ + +#include + +void uitoa (unsigned int value, __data char *str, unsigned char radix) +{ + ultoa (value, str, radix); +} + +void itoa (int value, __data char *str, unsigned char radix) +{ + ltoa (value, str, radix); +} + diff --git a/device/lib/pic16/libc/stdlib/ltoa.c b/device/lib/pic16/libc/stdlib/ltoa.c new file mode 100644 index 0000000..428d4dc --- /dev/null +++ b/device/lib/pic16/libc/stdlib/ltoa.c @@ -0,0 +1,68 @@ +/*------------------------------------------------------------------------- + integer to string conversion + + Written by: Bela Torok, 1999 + bela.torok@kssg.ch + usage: + + _ultoa(unsigned long value, char* string, int radix) + _ltoa(long value, char* string, int radix) + + value -> Number to be converted + string -> Result + radix -> Base of value (e.g.: 2 for binary, 10 for decimal, 16 for hex) +---------------------------------------------------------------------------*/ + +#define NUMBER_OF_DIGITS 32 + +#if _DEBUG +extern void io_long(unsigned long); +extern void io_str(char *); +#endif + + +void ultoa(unsigned long value, __data char* str, unsigned char radix) +{ + unsigned int index; + unsigned char ch; + unsigned char buffer[NUMBER_OF_DIGITS]; /* space for NUMBER_OF_DIGITS + '\0' */ + + index = NUMBER_OF_DIGITS; + + do { + ch = '0' + (value % radix); + if ( ch > '9') ch += 'a' - '9' - 1; + +#if _DEBUG + io_str( "ultoa: " ); + io_long( value ); + io_long( (unsigned long) ch ); +#endif + + buffer[ --index ] = ch; + value /= radix; + } while (value != 0); + + do { + *str++ = buffer[index++]; + } while ( index < NUMBER_OF_DIGITS ); + + *str = 0; /* string terminator */ +} + +void ltoa(long value, __data char* str, unsigned char radix) +{ +#if _DEBUG + io_str( "ltoa: " ); + io_long( (unsigned long)value ); +#endif + + if (value < 0 && radix == 10) { + *str++ = '-'; + value = -value; + } + + + + ultoa((unsigned long)value, str, radix); +} diff --git a/device/lib/pic16/libc/stdlib/malloc.c b/device/lib/pic16/libc/stdlib/malloc.c new file mode 100644 index 0000000..b1818fe --- /dev/null +++ b/device/lib/pic16/libc/stdlib/malloc.c @@ -0,0 +1,117 @@ +/* + * malloc.c - dynamic memory allocation + * + * written by Vangelis Rokas, 2004 (vrokas@otenet.gr) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2, or (at your option) any + * later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * In other words, you are welcome to use, share and improve this program. + * You are forbidden to forbid anyone else to use, share and improve + * what you give them. Help stamp out software-hoarding! + * + * $Id: malloc.c 3835 2005-08-07 20:09:11Z tecodev $ + */ + +#include + +/* this is an external pointer to HEAP. It should be defined in + * the user's program, or it can be a symbol created by linker */ +extern unsigned char _MALLOC_SPEC *heap; + +unsigned char _MALLOC_SPEC *malloc(unsigned char len) +{ + _malloc_rec _MALLOC_SPEC *pHeap; /* pointer to block header */ + _malloc_rec _MALLOC_SPEC *temp; + unsigned char bLen, eLen; /* size of block */ +#if MALLOC_MAX_FIRST + unsigned char pass=1; +#endif + + if(len >= MAX_BLOCK_SIZE) + goto do_end; + + pHeap = (_malloc_rec _MALLOC_SPEC *)&heap; + + while(1) { + bLen = pHeap->bits.count; + + /* if datum is zero, then last block, return NULL */ + if(pHeap->datum == 0) { +#if !MALLOC_MAX_FIRST + goto do_end; +#else + if(!pass) + goto do_end; + + /* in the first pass, we search for blocks that have + * the requested size, in the second pass, try to merge + * adjacent blocks to 'make' the requested block */ + pHeap = (_malloc_rec _MALLOC_SPEC *)&heap; + pass--; + continue; +#endif + } + + /* if current block is allocated then proceed to next */ + if(pHeap->bits.alloc) + goto do_continue; + + + /* current block is not allocated, try to allocate */ + + /* if current block is not enough for allocation, then proceed to next */ + if(bLen <= len) { + +#if MALLOC_MAX_FIRST + /* if we are in the first pass, check next block */ + if(pass) + goto do_continue; + + /* otherwise try merge */ +#endif + + temp = _mergeHeapBlock(pHeap, len); + + if(!temp) + /* otherwise proceed with next block */ + goto do_continue; + + //pHeap = temp; /* temp == pHeap */ + bLen = pHeap->bits.count; + } + + /* current block is enough to hold the new block */ + + /* allocate by filling the fields */ + eLen = (len+1); + pHeap->datum = 0x80 | eLen; + + if(bLen > eLen) { + /* if current block size is greater than the requested one, + * create a new empty block at the end of the newly allocated */ + temp = (_malloc_rec _MALLOC_SPEC *)((unsigned int)pHeap + eLen); + temp->datum = (bLen - eLen); + } + + return ((unsigned char _MALLOC_SPEC *)((unsigned int)pHeap + 1)); + +do_continue: + pHeap = (_malloc_rec _MALLOC_SPEC *)((unsigned int)pHeap + bLen); + } + +do_end: + return ((unsigned char _MALLOC_SPEC *)0); + +} diff --git a/device/lib/pic16/libc/stdlib/memfree.c b/device/lib/pic16/libc/stdlib/memfree.c new file mode 100644 index 0000000..9a8fd05 --- /dev/null +++ b/device/lib/pic16/libc/stdlib/memfree.c @@ -0,0 +1,47 @@ +/* + * memfree.c - return size of all unallocated heap + * + * written by Vangelis Rokas 2005 + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2, or (at your option) any + * later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * In other words, you are welcome to use, share and improve this program. + * You are forbidden to forbid anyone else to use, share and improve + * what you give them. Help stamp out software-hoarding! + * + * $Id: memfree.c 3835 2005-08-07 20:09:11Z tecodev $ + */ + +#include + +extern unsigned char _MALLOC_SPEC *heap; + +unsigned int memfree(void) +{ + _malloc_rec _MALLOC_SPEC *pHeap; + unsigned int hsize=0; + unsigned char bLen; + + pHeap = (_malloc_rec _MALLOC_SPEC *)&heap; + + while ((bLen = pHeap->bits.count)) { + if(!pHeap->bits.alloc) + hsize += bLen - 1; + + pHeap = (_malloc_rec _MALLOC_SPEC *)((unsigned int)pHeap + bLen); + } + + return (hsize); +} diff --git a/device/lib/pic16/libc/stdlib/memfreemax.c b/device/lib/pic16/libc/stdlib/memfreemax.c new file mode 100644 index 0000000..eb5d0b9 --- /dev/null +++ b/device/lib/pic16/libc/stdlib/memfreemax.c @@ -0,0 +1,50 @@ +/* + * memfreemax.c - return size of maximum unallocated heap block + * + * written by Vangelis Rokas 2005 + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2, or (at your option) any + * later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * In other words, you are welcome to use, share and improve this program. + * You are forbidden to forbid anyone else to use, share and improve + * what you give them. Help stamp out software-hoarding! + * + * $Id: memfreemax.c 3835 2005-08-07 20:09:11Z tecodev $ + */ + +#include + +extern unsigned char _MALLOC_SPEC *heap; + +unsigned int memfreemax(void) +{ + _malloc_rec _MALLOC_SPEC *pHeap; + unsigned char maxSize = 1; + unsigned char bLen; + + pHeap = (_malloc_rec _MALLOC_SPEC *)&heap; + + while ((bLen = pHeap->bits.count)) { + if(!pHeap->bits.alloc && (bLen > maxSize)) + maxSize = bLen; + + pHeap = (_malloc_rec _MALLOC_SPEC *)((unsigned int)pHeap + bLen); + } + + /* do not count the block header */ + --maxSize; + + return (maxSize); +} diff --git a/device/lib/pic16/libc/stdlib/memmisc.c b/device/lib/pic16/libc/stdlib/memmisc.c new file mode 100644 index 0000000..66a7edb --- /dev/null +++ b/device/lib/pic16/libc/stdlib/memmisc.c @@ -0,0 +1,96 @@ +/* + * memmisc.c - heap handling functions + * + * written by Vangelis Rokas, 2005 + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2, or (at your option) any + * later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * In other words, you are welcome to use, share and improve this program. + * You are forbidden to forbid anyone else to use, share and improve + * what you give them. Help stamp out software-hoarding! + * + * $Id: memmisc.c 3835 2005-08-07 20:09:11Z tecodev $ + */ + +#include + +void _initHeap(unsigned char _MALLOC_SPEC *dheap, unsigned int heapsize) +{ + _malloc_rec _MALLOC_SPEC *pHeap; + unsigned int hsize=0; + int bsize; + + pHeap = (_malloc_rec _MALLOC_SPEC *)dheap; + if (heapsize == 0) return; + /* we need one byte as the end of block list marker */ + heapsize--; + + while (hsize < heapsize) { + /* a guess of the next block size */ + bsize = (heapsize - hsize); /* thus: bsize > 0 */ + if(bsize > MAX_BLOCK_SIZE) bsize = MAX_BLOCK_SIZE; + + /* now we can create the block */ + pHeap->datum = bsize; + pHeap = (_malloc_rec _MALLOC_SPEC *)((unsigned int)pHeap + bsize); + + hsize += bsize; + } + + /* mark end of block list */ + pHeap->datum = 0; +} + +/* search heap starting from sBlock for a block of size bSize, merging + * adjacent blocks if necessery */ +_malloc_rec _MALLOC_SPEC *_mergeHeapBlock(_malloc_rec _MALLOC_SPEC *sBlock, unsigned char bSize) +{ + _malloc_rec _MALLOC_SPEC *temp; + unsigned char bLen; + unsigned char eLen; + unsigned char dat; + + bLen = sBlock->bits.count; + + /* current block is not enough, see if we can merge some adjacent memory + * blocks to make it fit */ + temp = (_malloc_rec _MALLOC_SPEC *)((unsigned int)sBlock + bLen); //sBlock->bits.count); + eLen = bLen; + while((temp->datum) && (!temp->bits.alloc) && (eLen <= bSize)) { + eLen += (dat=temp->bits.count); + temp = (_malloc_rec _MALLOC_SPEC *)((unsigned int)temp + dat); + } + + if(eLen > bSize) { + unsigned char i; + + /* yes, there are some free blocks that can be merged, so merge them... */ + temp = sBlock; + while(eLen > 0) { + if(eLen > MAX_BLOCK_SIZE)i = MAX_BLOCK_SIZE; + else i = eLen; + temp->datum = i; + temp = (_malloc_rec _MALLOC_SPEC *)((unsigned int)temp + i); + eLen -= i; + } + + /* return block starts at the old block start address */ + return (sBlock); + } else { + + /* no, there are no free blocks after sBlock, so return NULL */ + return ((_malloc_rec _MALLOC_SPEC *)0); + } +} diff --git a/device/lib/pic16/libc/stdlib/rand.c b/device/lib/pic16/libc/stdlib/rand.c new file mode 100644 index 0000000..26a21c1 --- /dev/null +++ b/device/lib/pic16/libc/stdlib/rand.c @@ -0,0 +1,98 @@ +/*- + * rand.c - random number generation routines + * + * this source was part of the avr-lib library + * modified for SDCC/pic16 by Vangelis Rokas, 2005 + * + * + * Copyright (c) 1990, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Posix rand_r function added May 1999 by Wes Peters . + */ + +#include + +static long do_rand(unsigned long *ctx) +{ + return ((*ctx = *ctx * 1103515245UL + 12345UL) % ((unsigned long)RAND_MAX + 1)); +} + +long rand_r(unsigned long *ctx) +{ + unsigned long val = (unsigned long) *ctx; + + *ctx = do_rand(&val); + return (long) *ctx; +} + +static unsigned long next = 1; + +long rand(void) +{ + return do_rand(&next); +} + +void srand(unsigned long seed) +{ + next = seed; +} + +#ifdef TEST + +main() +{ + int i; + unsigned long myseed; + + stdout = STREAM_GPSIM; + + printf("seeding rand with 0x19610910: \n"); + srand(0x19610910); + + printf("generating three pseudo-random numbers:\n"); + for (i = 0; i < 10; i++) + { + printf("next random number = %ld\n", rand()); + } + + printf("generating the same sequence with rand_r:\n"); + myseed = 0x19610910; + for (i = 0; i < 10; i++) + { + printf("next random number = %ld\n", rand_r(&myseed)); + } + + return 0; +} + +#endif /* TEST */ + diff --git a/device/lib/pic16/libc/stdlib/realloc.c b/device/lib/pic16/libc/stdlib/realloc.c new file mode 100644 index 0000000..25e9b61 --- /dev/null +++ b/device/lib/pic16/libc/stdlib/realloc.c @@ -0,0 +1,81 @@ +/* + * realloc.c - dynamic memory allocation + * + * written by Vangelis Rokas, 2004 (vrokas@otenet.gr) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2, or (at your option) any + * later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * In other words, you are welcome to use, share and improve this program. + * You are forbidden to forbid anyone else to use, share and improve + * what you give them. Help stamp out software-hoarding! + * + * $Id: realloc.c 3835 2005-08-07 20:09:11Z tecodev $ + */ + +#include + +extern unsigned char _MALLOC_SPEC *heap; + +unsigned char _MALLOC_SPEC *realloc(unsigned char _MALLOC_SPEC *mblock, unsigned char len) +{ + _malloc_rec _MALLOC_SPEC *pHeap; /* pointer to block header */ + _malloc_rec _MALLOC_SPEC *temp; + unsigned char bLen; /* size of block */ + + if(len >= MAX_BLOCK_SIZE) + return ((unsigned char _MALLOC_SPEC *)0); + + /* if mblock is NULL, then same as malloc */ + if(!mblock) + return (malloc(len)); + + /* if len is 0 */ + if(len == 0) { + free(mblock); + return ((unsigned char _MALLOC_SPEC *)0); + } + + pHeap = (_malloc_rec _MALLOC_SPEC *)((unsigned int)mblock - 1); + bLen = pHeap->bits.count; + + /* block too small for len bytes + 1 byte header <===> bLen < len + 1 <===> blen <= len */ + if (bLen <= len) { + /* so, new segment has size bigger than the old one, we can return a + * valid pointer only when after the block there is an empty block that + * can be merged to produce a new block of the requested size, otherwise + * we return NULL */ + temp = _mergeHeapBlock(pHeap, len); + + if(!temp) { + /* no could not find a valid block, return NULL */ + return ((unsigned char _MALLOC_SPEC *)0); + } + + //pHeap = temp; /* temp == pHeap */ + bLen = pHeap->bits.count; + } + + len++; /* increase to also count the header */ + + if(bLen > len) { + /* new segment is smaller than the old one (or the merged one), that's easy! */ + pHeap->bits.count = len; + temp = (_malloc_rec _MALLOC_SPEC *)((unsigned int)pHeap + len); + temp->bits.alloc = 0; + temp->bits.count = bLen - len; + } + + return (mblock); +} diff --git a/device/lib/pic16/libc/stdlib/x_ftoa.c b/device/lib/pic16/libc/stdlib/x_ftoa.c new file mode 100644 index 0000000..100bb8a --- /dev/null +++ b/device/lib/pic16/libc/stdlib/x_ftoa.c @@ -0,0 +1,191 @@ + +/* + * wrapper function to use _convert_float + * + * written by Vangelis Rokas, 2004, + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +/* + * $Id: x_ftoa.c 3835 2005-08-07 20:09:11Z tecodev $ + */ + +#include + +extern convert_frac; +extern convert_int; + +/* char x_ftoa(float, __data char *, unsigned char, unsigned char); */ + + +extern POSTDEC1; +extern PLUSW2; +extern FSR0L; +extern FSR0H; +extern PREINC1; +extern PREINC2; +extern FSR2L; +extern FSR2H; + +#define _vv0x00 0x00 +#define _vv0x01 0x01 +#define _vv0x02 0x02 +#define _vv0x03 0x03 +#define _vv0x04 0x04 + +/* do not warn about unreferenced arguments/missing return values */ +#pragma save +#pragma disable_warning 59 +#pragma disable_warning 85 + +char x_cnvint_wrap(unsigned long num, __data char *buffer) +{ + __asm + movff _vv0x00, _POSTDEC1 + movff _vv0x01, _POSTDEC1 + movff _vv0x02, _POSTDEC1 + movff _vv0x03, _POSTDEC1 + + movlw 2 + movff _PLUSW2, _vv0x00 + movlw 3 + movff _PLUSW2, _vv0x01 + movlw 4 + movff _PLUSW2, _vv0x02 + movlw 5 + movff _PLUSW2, _vv0x03 + + movlw 6 + movff _PLUSW2, _FSR0L + movlw 7 + movff _PLUSW2, _FSR0H + + call _convert_int + + /* return value is already in WREG */ + + movff _PREINC1, _vv0x03 + movff _PREINC1, _vv0x02 + movff _PREINC1, _vv0x01 + movff _PREINC1, _vv0x00 + __endasm ; +} + +char x_cnvfrac_wrap(unsigned long num, __data char *buffer, unsigned char prec) +{ + num; + buffer; + prec; + + __asm + movff _vv0x00, _POSTDEC1 + movff _vv0x01, _POSTDEC1 + movff _vv0x02, _POSTDEC1 + movff _vv0x03, _POSTDEC1 + movff _vv0x04, _POSTDEC1 + + movlw 2 + movff _PLUSW2, _vv0x00 + movlw 3 + movff _PLUSW2, _vv0x01 + movlw 4 + movff _PLUSW2, _vv0x02 + movlw 5 + movff _PLUSW2, _vv0x03 + + movlw 6 + movff _PLUSW2, _FSR0L + movlw 7 + movff _PLUSW2, _FSR0H + + movlw 8 + movff _PLUSW2, _vv0x04 + + call _convert_frac + + /* return value is already in WREG */ + + movff _PREINC1, _vv0x04 + movff _PREINC1, _vv0x03 + movff _PREINC1, _vv0x02 + movff _PREINC1, _vv0x01 + movff _PREINC1, _vv0x00 + __endasm ; +} +#pragma restore + + +union float_long { + unsigned long l; + float f; +}; + +char x_ftoa(float num, __data char *buffer, unsigned char buflen, unsigned char prec) +{ + char len; + char expn; + unsigned long ll; + unsigned long li; +// volatile + union float_long f_l; + + len = buflen; + while(len--)buffer[len] = 0; + + f_l.f = num; + + if((f_l.l & SIGNBIT) == SIGNBIT) { + f_l.l &= ~SIGNBIT; + *buffer = '-'; + buffer++; + } + + expn = EXCESS - EXP(f_l.l); // - 24; + + ll = MANT(f_l.l); + li = 0; + + while( expn ) { + if(expn < 0) { + li <<= 1; + if(ll & 0x00800000UL)li |= 1; + ll <<= 1; + expn++; + } else { + ll >>= 1; + expn--; + } + } + + if(li) + len = x_cnvint_wrap(li, buffer); + else { + *buffer = '0'; len = 1; + } + + buffer += len; + + if(prec) { + *buffer = '.'; len++; + buffer++; + + len += x_cnvfrac_wrap(ll, buffer, 24-prec); + buffer[ prec ] = '\0'; + } + + return (len); +} diff --git a/device/lib/pic16/libc/string/memccpy.c b/device/lib/pic16/libc/string/memccpy.c new file mode 100644 index 0000000..73ec684 --- /dev/null +++ b/device/lib/pic16/libc/string/memccpy.c @@ -0,0 +1,46 @@ +/*------------------------------------------------------------------------- + memccpy.c - part of string library functions + + Written by Vangelis Rokas, 2004 + + Based on source + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +void *memccpy (void *dst, void *src, char c, size_t acount) +{ + void *ret = dst; + char *d = dst; + char *s = src; + + /* + * copy from lower addresses to higher addresses + */ + while (acount--) { + if( *s == c) + return (++s); + + *d++ = *s++; + } + + return((void *)0x00); +} diff --git a/device/lib/pic16/libc/string/memchr.c b/device/lib/pic16/libc/string/memchr.c new file mode 100644 index 0000000..2b3130c --- /dev/null +++ b/device/lib/pic16/libc/string/memchr.c @@ -0,0 +1,41 @@ +/*------------------------------------------------------------------------- + memchr.c - part of string library functions + + Written by Vangelis Rokas 2004 + + Based on source + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +void *memchr(void *s, char c, size_t count) +{ + if(!count)return (void *)0x00; + + while((*(char *)s != c) && (count)) { + s = (char *)s + sizeof(char *); + count--; + } + + if(count)return s; + else return (void *)0x00; +} diff --git a/device/lib/pic16/libc/string/memchrpgm.c b/device/lib/pic16/libc/string/memchrpgm.c new file mode 100644 index 0000000..9d7f7b3 --- /dev/null +++ b/device/lib/pic16/libc/string/memchrpgm.c @@ -0,0 +1,41 @@ +/*------------------------------------------------------------------------- + memchrpgm.c - part of string library functions + + Written by Vangelis Rokas 2004 + + Based on source + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +__code void *memchrpgm(__code void *s, char c, size_t count) +{ + if(!count)return (void *)0x00; + + while((*(__code char *)s != c) && (count)) { + s = (__code char *)s + sizeof(__code char *); + count--; + } + + if(count)return s; + else return (void *)0x00; +} diff --git a/device/lib/pic16/libc/string/memchrram.c b/device/lib/pic16/libc/string/memchrram.c new file mode 100644 index 0000000..d8e1d45 --- /dev/null +++ b/device/lib/pic16/libc/string/memchrram.c @@ -0,0 +1,41 @@ +/*------------------------------------------------------------------------- + memchrram.c - part of string library functions + + Written by Vangelis Rokas 2004 + + Based on source + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +__data void *memchrram(__data void *s, char c, size_t count) +{ + if(!count)return (void *)0x00; + + while((*(__data char *)s != c) && (count)) { + s = (__data char *)s + sizeof(__data char *); + count--; + } + + if(count)return s; + else return (void *)0x00; +} diff --git a/device/lib/pic16/libc/string/memcmp.c b/device/lib/pic16/libc/string/memcmp.c new file mode 100644 index 0000000..27f2d65 --- /dev/null +++ b/device/lib/pic16/libc/string/memcmp.c @@ -0,0 +1,36 @@ +/*------------------------------------------------------------------------- + memcmp.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +int memcmp (void * buf1, void * buf2, size_t count) +{ + if(!count)return(0); + + while (--count && *((char *)buf1) == *((char *)buf2) ) { + buf1 = (char *)buf1 + 1; + buf2 = (char *)buf2 + 1; + } + + return( *((unsigned char *)buf1) - *((unsigned char *)buf2) ); +} diff --git a/device/lib/pic16/libc/string/memcpy.c b/device/lib/pic16/libc/string/memcpy.c new file mode 100644 index 0000000..495f400 --- /dev/null +++ b/device/lib/pic16/libc/string/memcpy.c @@ -0,0 +1,40 @@ +/*------------------------------------------------------------------------- + memcpy.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +void *memcpy (void *dst, void *src, size_t acount) +{ + void *ret = dst; /* perhaps ret should be removed, use dst instead */ + char *d = dst; + char *s = src; + + /* + * copy from lower addresses to higher addresses + */ + while (acount--) { + *d++ = *s++; + } + + return(ret); +} diff --git a/device/lib/pic16/libc/string/memcpypgm2ram.c b/device/lib/pic16/libc/string/memcpypgm2ram.c new file mode 100644 index 0000000..b27a881 --- /dev/null +++ b/device/lib/pic16/libc/string/memcpypgm2ram.c @@ -0,0 +1,39 @@ +/*------------------------------------------------------------------------- + memcpypgm2ram.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +__data void *memcpypgm2ram (__data void *dst, __code void *src, size_t acount) +{ + char __data *d = dst; + char __code *s = src; + + /* + * copy from lower addresses to higher addresses + */ + while (acount--) { + *d++ = *s++; + } + + return(dst); +} diff --git a/device/lib/pic16/libc/string/memcpyram2ram.c b/device/lib/pic16/libc/string/memcpyram2ram.c new file mode 100644 index 0000000..c237e43 --- /dev/null +++ b/device/lib/pic16/libc/string/memcpyram2ram.c @@ -0,0 +1,39 @@ +/*------------------------------------------------------------------------- + memcpyram2ram.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +__data void *memcpyram2ram (__data void *dst, __data void *src, size_t acount) +{ + char __data *d = dst; + char __data *s = src; + + /* + * copy from lower addresses to higher addresses + */ + while (acount--) { + *d++ = *s++; + } + + return(dst); +} diff --git a/device/lib/pic16/libc/string/memmove.c b/device/lib/pic16/libc/string/memmove.c new file mode 100644 index 0000000..91bc657 --- /dev/null +++ b/device/lib/pic16/libc/string/memmove.c @@ -0,0 +1,55 @@ +/*------------------------------------------------------------------------- + _memmove.c - part of string library functions + + Adapted By - Erik Petrich . epetrich@users.sourceforge.net + from _memcpy.c which was originally + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +void *memmove (void *dst, void *src, size_t acount) +{ + void *ret = dst; + char *d; + char *s; + + if(((int)src < (int)dst) && ((((int)src)+acount) > (int)dst)) { + /* + * copy from higher addresses to lower addresses + */ + d = ((char *)dst)+acount-1; + s = ((char *)src)+acount-1; + while (acount--) { + *d-- = *s--; + } + } else { + /* + * copy from lower addresses to higher addresses + */ + d = dst; + s = src; + while (acount--) { + *d++ = *s++; + } + } + + return(ret); +} diff --git a/device/lib/pic16/libc/string/memrchr.c b/device/lib/pic16/libc/string/memrchr.c new file mode 100644 index 0000000..5e53c40 --- /dev/null +++ b/device/lib/pic16/libc/string/memrchr.c @@ -0,0 +1,43 @@ +/*------------------------------------------------------------------------- + memrchr.c - part of string library functions + + Written by Vangelis Rokas 2004 + + Based on source + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +void *memrchr(void *s, char c, size_t count) +{ + if(!count)return (void *)0x00; + + s = (char *)s + sizeof(char *) * count; + + while((*(char *)s != c) && (count)) { + s = (char *)s - sizeof(char *); + count--; + } + + if(count)return s; + else return (void *)0x00; +} diff --git a/device/lib/pic16/libc/string/memset.c b/device/lib/pic16/libc/string/memset.c new file mode 100644 index 0000000..d8acf9a --- /dev/null +++ b/device/lib/pic16/libc/string/memset.c @@ -0,0 +1,36 @@ +/*------------------------------------------------------------------------- + memset.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +void *memset (void _STRING_SPEC *buf, unsigned char ch, size_t count) +{ + register unsigned char *ret = buf; + + while (count--) { + *(unsigned char *) ret = ch; + ret++; + } + + return buf ; +} diff --git a/device/lib/pic16/libc/string/strcat.c b/device/lib/pic16/libc/string/strcat.c new file mode 100644 index 0000000..485ecbd --- /dev/null +++ b/device/lib/pic16/libc/string/strcat.c @@ -0,0 +1,35 @@ +/*------------------------------------------------------------------------- + strncat.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +char *strcat(char *dst, char *src) +{ + char *cp = dst; + + while( *cp )cp++; /* find end of dst */ + + while( *cp++ = *src++ ) ; /* Copy src to end of dst */ + + return( dst ); /* return dst */ +} diff --git a/device/lib/pic16/libc/string/strchr.c b/device/lib/pic16/libc/string/strchr.c new file mode 100644 index 0000000..be63989 --- /dev/null +++ b/device/lib/pic16/libc/string/strchr.c @@ -0,0 +1,33 @@ +/*------------------------------------------------------------------------- + strchr.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +char *strchr(char *string, char ch) +{ + while(*string && *string != ch)string++; + + if (*string == ch)return(string); + + return ( NULL ); +} diff --git a/device/lib/pic16/libc/string/strcmp.c b/device/lib/pic16/libc/string/strcmp.c new file mode 100644 index 0000000..3bb0155 --- /dev/null +++ b/device/lib/pic16/libc/string/strcmp.c @@ -0,0 +1,37 @@ +/*------------------------------------------------------------------------- + strcmp.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +int strcmp(char * asrc, char * adst) +{ + register int ret = 0 ; + + while( ! (ret = *asrc - *adst) && *adst)++asrc, ++adst; + + if ( ret < 0 )ret = -1 ; + else if ( ret > 0 )ret = 1 ; + + return( ret ); +} + diff --git a/device/lib/pic16/libc/string/strcpy.c b/device/lib/pic16/libc/string/strcpy.c new file mode 100644 index 0000000..89a36a3 --- /dev/null +++ b/device/lib/pic16/libc/string/strcpy.c @@ -0,0 +1,33 @@ +/*------------------------------------------------------------------------- + strcpy.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +char *strcpy(char *d, char *s) +{ + register char * d1 = d; + + while (*d1++ = *s++) ; + + return d; +} diff --git a/device/lib/pic16/libc/string/strcspn.c b/device/lib/pic16/libc/string/strcspn.c new file mode 100644 index 0000000..0a8383c --- /dev/null +++ b/device/lib/pic16/libc/string/strcspn.c @@ -0,0 +1,39 @@ +/*------------------------------------------------------------------------- + strcspn.c - part of string library functions + + Bug fixed by Vangelis Rokas . vrokas AT otenet.gr (2004) + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +int strcspn (char *string, char *control) +{ + register int count = 0 ; + register char ch ; + + while (ch = *string) { + if (strchr(control,ch))break; + else count++ ; + string++; + } + + return count ; +} diff --git a/device/lib/pic16/libc/string/strlen.c b/device/lib/pic16/libc/string/strlen.c new file mode 100644 index 0000000..d33662e --- /dev/null +++ b/device/lib/pic16/libc/string/strlen.c @@ -0,0 +1,33 @@ +/*------------------------------------------------------------------------- + strcpy.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +int strlen (char * str) +{ + register int i = 0 ; + + while (*str++)i++; + + return i; +} diff --git a/device/lib/pic16/libc/string/strlwr.c b/device/lib/pic16/libc/string/strlwr.c new file mode 100644 index 0000000..10257f5 --- /dev/null +++ b/device/lib/pic16/libc/string/strlwr.c @@ -0,0 +1,38 @@ +/*------------------------------------------------------------------------- + strlwr.c - part of string library functions + + Written by Vangelis Rokas, 2004 + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include +#include + +char *strlwr(char *str) +{ + char *ret = str; + + while(*str) { + *str = tolower( *str ); + str++; + } + + return (ret); +} diff --git a/device/lib/pic16/libc/string/strncat.c b/device/lib/pic16/libc/string/strncat.c new file mode 100644 index 0000000..8ab7c3c --- /dev/null +++ b/device/lib/pic16/libc/string/strncat.c @@ -0,0 +1,39 @@ +/*------------------------------------------------------------------------- + strncat.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +char *strncat(char *front, char * back, size_t count) +{ + char *start = front; + + while (*front++); + + front--; + while (count--) + if (!(*front++ = *back++))return(start); + + *front = '\0'; + + return(start); +} diff --git a/device/lib/pic16/libc/string/strncmp.c b/device/lib/pic16/libc/string/strncmp.c new file mode 100644 index 0000000..f193c7a --- /dev/null +++ b/device/lib/pic16/libc/string/strncmp.c @@ -0,0 +1,36 @@ +/*------------------------------------------------------------------------- + _strncmp.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +int strncmp(char *first, char *last, size_t count) +{ + if (!count)return(0); + + while (--count && *first && *first == *last) { + first++; + last++; + } + + return( *first - *last ); +} diff --git a/device/lib/pic16/libc/string/strncpy.c b/device/lib/pic16/libc/string/strncpy.c new file mode 100644 index 0000000..d8dd613 --- /dev/null +++ b/device/lib/pic16/libc/string/strncpy.c @@ -0,0 +1,33 @@ +/*------------------------------------------------------------------------- + strncpy.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +char *strncpy (char *d, char *s, size_t n) +{ + register char *d1 = d; + + while ( n-- )*d++ = *s++ ; + + return d1; +} diff --git a/device/lib/pic16/libc/string/strpbrk.c b/device/lib/pic16/libc/string/strpbrk.c new file mode 100644 index 0000000..1862ca0 --- /dev/null +++ b/device/lib/pic16/libc/string/strpbrk.c @@ -0,0 +1,35 @@ +/*------------------------------------------------------------------------- + strpbrk.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +char *strpbrk (char * string, char *control) +{ + register char ch ; + + while(ch = *string) { + if(strchr(control, ch ))return string ; + } + + return (NULL); +} diff --git a/device/lib/pic16/libc/string/strrchr.c b/device/lib/pic16/libc/string/strrchr.c new file mode 100644 index 0000000..d4cdd51 --- /dev/null +++ b/device/lib/pic16/libc/string/strrchr.c @@ -0,0 +1,41 @@ +/*------------------------------------------------------------------------- + strrchr.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +char *strrchr(char *string, char ch) +{ + char *start = string; + + while (*string++) /* find end of string */ + ; + + /* search towards front */ + while (--string != start && *string != ch) + ; + + if (*string == ch) /* char found ? */ + return( (char *)string ); + + return (NULL) ; +} diff --git a/device/lib/pic16/libc/string/strspn.c b/device/lib/pic16/libc/string/strspn.c new file mode 100644 index 0000000..28feace --- /dev/null +++ b/device/lib/pic16/libc/string/strspn.c @@ -0,0 +1,40 @@ +/*------------------------------------------------------------------------- + strspn.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +int strspn(char *string, char *control) +{ + register int count = 0; + register char ch ; + + while (ch = *string) { + if ( strchr(control,ch) ) + count++ ; + else break ; + + string++ ; + } + + return count ; +} diff --git a/device/lib/pic16/libc/string/strstr.c b/device/lib/pic16/libc/string/strstr.c new file mode 100644 index 0000000..6351bfa --- /dev/null +++ b/device/lib/pic16/libc/string/strstr.c @@ -0,0 +1,49 @@ +/*------------------------------------------------------------------------- + _strstr.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +char *strstr(char *str1, char *str2) +{ + char *cp = str1; + char *s1; + char *s2; + + + if( !*str2 ) + return str1; + + while (*cp) { + s1 = cp; + s2 = str2; + + while ( *s1 && *s2 && !(*s1-*s2) ) + s1++, s2++; + + if (!*s2)return(cp); + + cp++; + } + + return (NULL) ; +} diff --git a/device/lib/pic16/libc/string/strtok.c b/device/lib/pic16/libc/string/strtok.c new file mode 100644 index 0000000..209dd57 --- /dev/null +++ b/device/lib/pic16/libc/string/strtok.c @@ -0,0 +1,54 @@ +/*------------------------------------------------------------------------- + strtok.c - part of string library functions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include + +char *strtok(char *str, char *control) +{ + static char * s; + register char * s1; + + if (str)s = str ; + + if (!s)return NULL; + + while (*s) { + if (strchr(control,*s))s++; + else break; + } + + s1 = s ; + + while (*s) { + if (strchr(control,*s)) { + *s++ = '\0'; + return s1 ; + } + s++ ; + } + + s = NULL; + + if (*s1)return s1; + else return NULL; +} diff --git a/device/lib/pic16/libc/string/strupr.c b/device/lib/pic16/libc/string/strupr.c new file mode 100644 index 0000000..457d561 --- /dev/null +++ b/device/lib/pic16/libc/string/strupr.c @@ -0,0 +1,38 @@ +/*------------------------------------------------------------------------- + strupr.c - part of string library functions + + Written by Vangelis Rokas, 2004 + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include +#include + +char *strupr(char *str) +{ + char *ret = str; + + while(*str) { + *str = toupper( *str ); + str++; + } + + return (ret); +} diff --git a/device/lib/pic16/libc/utils/cnvfrac.S b/device/lib/pic16/libc/utils/cnvfrac.S new file mode 100644 index 0000000..4aedb30 --- /dev/null +++ b/device/lib/pic16/libc/utils/cnvfrac.S @@ -0,0 +1,1427 @@ +; +; Convertion routine of 24 bits floating point to ASCII +; +; written by Vangelis Rokas , 2004 +; +; +; This program is free software; you can redistribute it and/or +; modify it under the terms of the GNU Library General Public License +; as published by the Free Software Foundation; either version 2 +; of the License, or (at your option) any later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU General Public License for more details. +; +; You should have received a copy of the GNU General Public License +; along with this program; if not, write to the Free Software +; Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +; +; $Id: cnvfrac.S 3711 2005-03-31 16:25:17Z vrokas $ +; + radix dec + list + nolist + + +WREG equ 0xfe8 +POSTINC0 equ 0xfee +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 +STATUS equ 0xfd8 + + + global _convert_frac + + +.registers udata_ovr 0x000 +r0x00 res 1 +r0x01 res 1 +r0x02 res 1 +r0x03 res 1 +round_digit res 1 +d0x00 res 1 +d0x01 res 1 +d0x02 res 1 +d0x03 res 1 +d0x04 res 1 +d0x05 res 1 +d0x06 res 1 +d0x07 res 1 +d0x08 res 1 +d0x09 res 1 +d0x10 res 1 +d0x11 res 1 +d0x12 res 1 +d0x13 res 1 +d0x14 res 1 +d0x15 res 1 +d0x16 res 1 +d0x17 res 1 +d0x18 res 1 +d0x19 res 1 +d0x20 res 1 +d0x21 res 1 +d0x22 res 1 +d0x23 res 1 +d0x24 res 1 + + +S__convert_frac code +_convert_frac: + + movff d0x00, POSTDEC1 + movff d0x01, POSTDEC1 + movff d0x02, POSTDEC1 + movff d0x03, POSTDEC1 + movff d0x04, POSTDEC1 + movff d0x05, POSTDEC1 + movff d0x06, POSTDEC1 + movff d0x07, POSTDEC1 + movff d0x08, POSTDEC1 + movff d0x09, POSTDEC1 + movff d0x10, POSTDEC1 + movff d0x11, POSTDEC1 + movff d0x12, POSTDEC1 + movff d0x13, POSTDEC1 + movff d0x14, POSTDEC1 + movff d0x15, POSTDEC1 + movff d0x16, POSTDEC1 + movff d0x17, POSTDEC1 + movff d0x18, POSTDEC1 + movff d0x19, POSTDEC1 + movff d0x20, POSTDEC1 + movff d0x21, POSTDEC1 + movff d0x22, POSTDEC1 + movff d0x23, POSTDEC1 + movff d0x24, POSTDEC1 + + +; adding digit 0 +; movff 0xf7f, 0xfe8 + + movlw 0 + + btfsc r0x00, 0 ; bit 0 + addlw 5 + + + clrf d0x01 +@1: + addlw -10 + bnc @2 + incf d0x01, f + bra @1 +@2: + addlw 10 + movwf d0x00 + + + decfsz round_digit, f + bra @3 + addlw 251 + bnc @3 + incf d0x01, f + +@3: + +; adding digit 1 + movf d0x01, w + + btfsc r0x00, 0 ; bit 0 + addlw 2 + + btfsc r0x00, 1 ; bit 1 + addlw 5 + + + clrf d0x02 +@4: + addlw -10 + bnc @5 + incf d0x02, f + bra @4 +@5: + addlw 10 + movwf d0x01 + + + decfsz round_digit, f + bra @6 + addlw 251 + bnc @6 + incf d0x02, f + +@6: + +; adding digit 2 + movf d0x02, w + + btfsc r0x00, 0 ; bit 0 + addlw 6 + + btfsc r0x00, 1 ; bit 1 + addlw 2 + + btfsc r0x00, 2 ; bit 2 + addlw 5 + + + clrf d0x03 +@7: + addlw -10 + bnc @8 + incf d0x03, f + bra @7 +@8: + addlw 10 + movwf d0x02 + + + decfsz round_digit, f + bra @9 + addlw 251 + bnc @9 + incf d0x03, f + +@9: + +; adding digit 3 + movf d0x03, w + + btfsc r0x00, 1 ; bit 1 + addlw 1 + + btfsc r0x00, 2 ; bit 2 + addlw 2 + + btfsc r0x00, 3 ; bit 3 + addlw 5 + + + clrf d0x04 +@10: + addlw -10 + bnc @11 + incf d0x04, f + bra @10 +@11: + addlw 10 + movwf d0x03 + + + decfsz round_digit, f + bra @12 + addlw 251 + bnc @12 + incf d0x04, f + +@12: + +; adding digit 4 + movf d0x04, w + + btfsc r0x00, 0 ; bit 0 + addlw 9 + + btfsc r0x00, 1 ; bit 1 + addlw 8 + + btfsc r0x00, 2 ; bit 2 + addlw 6 + + btfsc r0x00, 3 ; bit 3 + addlw 2 + + btfsc r0x00, 4 ; bit 4 + addlw 5 + + + clrf d0x05 +@13: + addlw -10 + bnc @14 + incf d0x05, f + bra @13 +@14: + addlw 10 + movwf d0x04 + + + decfsz round_digit, f + bra @15 + addlw 251 + bnc @15 + incf d0x05, f + +@15: + +; adding digit 5 + movf d0x05, w + + btfsc r0x00, 0 ; bit 0 + addlw 3 + + btfsc r0x00, 1 ; bit 1 + addlw 7 + + btfsc r0x00, 2 ; bit 2 + addlw 5 + + btfsc r0x00, 3 ; bit 3 + addlw 1 + + btfsc r0x00, 4 ; bit 4 + addlw 2 + + btfsc r0x00, 5 ; bit 5 + addlw 5 + + + clrf d0x06 +@16: + addlw -10 + bnc @17 + incf d0x06, f + bra @16 +@17: + addlw 10 + movwf d0x05 + + + decfsz round_digit, f + bra @18 + addlw 251 + bnc @18 + incf d0x06, f + +@18: + +; adding digit 6 + movf d0x06, w + + btfsc r0x00, 0 ; bit 0 + addlw 5 + + btfsc r0x00, 2 ; bit 2 + addlw 1 + + btfsc r0x00, 3 ; bit 3 + addlw 3 + + btfsc r0x00, 4 ; bit 4 + addlw 6 + + btfsc r0x00, 5 ; bit 5 + addlw 2 + + btfsc r0x00, 6 ; bit 6 + addlw 5 + + + clrf d0x07 +@19: + addlw -10 + bnc @20 + incf d0x07, f + bra @19 +@20: + addlw 10 + movwf d0x06 + + + decfsz round_digit, f + bra @21 + addlw 251 + bnc @21 + incf d0x07, f + +@21: + +; adding digit 7 + movf d0x07, w + + btfsc r0x00, 0 ; bit 0 + addlw 7 + + btfsc r0x00, 1 ; bit 1 + addlw 5 + + btfsc r0x00, 5 ; bit 5 + addlw 1 + + btfsc r0x00, 6 ; bit 6 + addlw 2 + + btfsc r0x00, 7 ; bit 7 + addlw 5 + + + clrf d0x08 +@22: + addlw -10 + bnc @23 + incf d0x08, f + bra @22 +@23: + addlw 10 + movwf d0x07 + + + decfsz round_digit, f + bra @24 + addlw 251 + bnc @24 + incf d0x08, f + +@24: + +; adding digit 8 + movf d0x08, w + + btfsc r0x00, 0 ; bit 0 + addlw 7 + + btfsc r0x00, 1 ; bit 1 + addlw 5 + + btfsc r0x00, 2 ; bit 2 + addlw 1 + + btfsc r0x00, 3 ; bit 3 + addlw 2 + + btfsc r0x00, 4 ; bit 4 + addlw 4 + + btfsc r0x00, 5 ; bit 5 + addlw 8 + + btfsc r0x00, 6 ; bit 6 + addlw 6 + + btfsc r0x00, 7 ; bit 7 + addlw 2 + + btfsc r0x01, 0 ; bit 8 + addlw 5 + + + clrf d0x09 +@25: + addlw -10 + bnc @26 + incf d0x09, f + bra @25 +@26: + addlw 10 + movwf d0x08 + + + decfsz round_digit, f + bra @27 + addlw 251 + bnc @27 + incf d0x09, f + +@27: + +; adding digit 9 + movf d0x09, w + + btfsc r0x00, 0 ; bit 0 + addlw 4 + + btfsc r0x00, 1 ; bit 1 + addlw 9 + + btfsc r0x00, 2 ; bit 2 + addlw 9 + + btfsc r0x00, 3 ; bit 3 + addlw 8 + + btfsc r0x00, 4 ; bit 4 + addlw 6 + + btfsc r0x00, 5 ; bit 5 + addlw 2 + + btfsc r0x00, 6 ; bit 6 + addlw 5 + + btfsc r0x00, 7 ; bit 7 + addlw 1 + + btfsc r0x01, 0 ; bit 8 + addlw 2 + + btfsc r0x01, 1 ; bit 9 + addlw 5 + + + clrf d0x10 +@28: + addlw -10 + bnc @29 + incf d0x10, f + bra @28 +@29: + addlw 10 + movwf d0x09 + + + decfsz round_digit, f + bra @30 + addlw 251 + bnc @30 + incf d0x10, f + +@30: + +; adding digit 10 + movf d0x10, w + + btfsc r0x00, 0 ; bit 0 + addlw 4 + + btfsc r0x00, 1 ; bit 1 + addlw 8 + + btfsc r0x00, 2 ; bit 2 + addlw 7 + + btfsc r0x00, 3 ; bit 3 + addlw 5 + + btfsc r0x00, 4 ; bit 4 + addlw 1 + + btfsc r0x00, 5 ; bit 5 + addlw 3 + + btfsc r0x00, 6 ; bit 6 + addlw 6 + + btfsc r0x00, 7 ; bit 7 + addlw 3 + + btfsc r0x01, 0 ; bit 8 + addlw 6 + + btfsc r0x01, 1 ; bit 9 + addlw 2 + + btfsc r0x01, 2 ; bit 10 + addlw 5 + + + clrf d0x11 +@31: + addlw -10 + bnc @32 + incf d0x11, f + bra @31 +@32: + addlw 10 + movwf d0x10 + + + decfsz round_digit, f + bra @33 + addlw 251 + bnc @33 + incf d0x11, f + +@33: + +; adding digit 11 + movf d0x11, w + + btfsc r0x00, 0 ; bit 0 + addlw 6 + + btfsc r0x00, 1 ; bit 1 + addlw 2 + + btfsc r0x00, 2 ; bit 2 + addlw 5 + + btfsc r0x00, 3 ; bit 3 + addlw 1 + + btfsc r0x00, 4 ; bit 4 + addlw 3 + + btfsc r0x00, 5 ; bit 5 + addlw 6 + + btfsc r0x00, 6 ; bit 6 + addlw 2 + + btfsc r0x00, 7 ; bit 7 + addlw 5 + + btfsc r0x01, 1 ; bit 9 + addlw 1 + + btfsc r0x01, 2 ; bit 10 + addlw 2 + + btfsc r0x01, 3 ; bit 11 + addlw 5 + + + clrf d0x12 +@34: + addlw -10 + bnc @35 + incf d0x12, f + bra @34 +@35: + addlw 10 + movwf d0x11 + + + decfsz round_digit, f + bra @36 + addlw 251 + bnc @36 + incf d0x12, f + +@36: + +; adding digit 12 + movf d0x12, w + + btfsc r0x00, 0 ; bit 0 + addlw 4 + + btfsc r0x00, 1 ; bit 1 + addlw 9 + + btfsc r0x00, 2 ; bit 2 + addlw 8 + + btfsc r0x00, 3 ; bit 3 + addlw 7 + + btfsc r0x00, 4 ; bit 4 + addlw 4 + + btfsc r0x00, 5 ; bit 5 + addlw 8 + + btfsc r0x00, 6 ; bit 6 + addlw 7 + + btfsc r0x00, 7 ; bit 7 + addlw 4 + + btfsc r0x01, 0 ; bit 8 + addlw 9 + + btfsc r0x01, 1 ; bit 9 + addlw 8 + + btfsc r0x01, 2 ; bit 10 + addlw 6 + + btfsc r0x01, 3 ; bit 11 + addlw 2 + + btfsc r0x01, 4 ; bit 12 + addlw 5 + + + clrf d0x13 +@37: + addlw -10 + bnc @38 + incf d0x13, f + bra @37 +@38: + addlw 10 + movwf d0x12 + + + decfsz round_digit, f + bra @39 + addlw 251 + bnc @39 + incf d0x13, f + +@39: + +; adding digit 13 + movf d0x13, w + + btfsc r0x00, 2 ; bit 2 + addlw 1 + + btfsc r0x00, 3 ; bit 3 + addlw 3 + + btfsc r0x00, 4 ; bit 4 + addlw 7 + + btfsc r0x00, 5 ; bit 5 + addlw 4 + + btfsc r0x00, 6 ; bit 6 + addlw 9 + + btfsc r0x00, 7 ; bit 7 + addlw 9 + + btfsc r0x01, 0 ; bit 8 + addlw 8 + + btfsc r0x01, 1 ; bit 9 + addlw 7 + + btfsc r0x01, 2 ; bit 10 + addlw 5 + + btfsc r0x01, 3 ; bit 11 + addlw 1 + + btfsc r0x01, 4 ; bit 12 + addlw 2 + + btfsc r0x01, 5 ; bit 13 + addlw 5 + + + clrf d0x14 +@40: + addlw -10 + bnc @41 + incf d0x14, f + bra @40 +@41: + addlw 10 + movwf d0x13 + + + decfsz round_digit, f + bra @42 + addlw 251 + bnc @42 + incf d0x14, f + +@42: + +; adding digit 14 + movf d0x14, w + + btfsc r0x00, 0 ; bit 0 + addlw 6 + + btfsc r0x00, 1 ; bit 1 + addlw 2 + + btfsc r0x00, 2 ; bit 2 + addlw 4 + + btfsc r0x00, 3 ; bit 3 + addlw 8 + + btfsc r0x00, 4 ; bit 4 + addlw 6 + + btfsc r0x00, 5 ; bit 5 + addlw 3 + + btfsc r0x00, 6 ; bit 6 + addlw 6 + + btfsc r0x00, 7 ; bit 7 + addlw 3 + + btfsc r0x01, 0 ; bit 8 + addlw 7 + + btfsc r0x01, 1 ; bit 9 + addlw 5 + + btfsc r0x01, 2 ; bit 10 + addlw 1 + + btfsc r0x01, 3 ; bit 11 + addlw 3 + + btfsc r0x01, 4 ; bit 12 + addlw 6 + + btfsc r0x01, 5 ; bit 13 + addlw 2 + + btfsc r0x01, 6 ; bit 14 + addlw 5 + + + clrf d0x15 +@43: + addlw -10 + bnc @44 + incf d0x15, f + bra @43 +@44: + addlw 10 + movwf d0x14 + + + decfsz round_digit, f + bra @45 + addlw 251 + bnc @45 + incf d0x15, f + +@45: + +; adding digit 15 + movf d0x15, w + + btfsc r0x00, 0 ; bit 0 + addlw 9 + + btfsc r0x00, 1 ; bit 1 + addlw 9 + + btfsc r0x00, 2 ; bit 2 + addlw 8 + + btfsc r0x00, 3 ; bit 3 + addlw 6 + + btfsc r0x00, 4 ; bit 4 + addlw 3 + + btfsc r0x00, 5 ; bit 5 + addlw 7 + + btfsc r0x00, 6 ; bit 6 + addlw 4 + + btfsc r0x00, 7 ; bit 7 + addlw 9 + + btfsc r0x01, 0 ; bit 8 + addlw 8 + + btfsc r0x01, 1 ; bit 9 + addlw 7 + + btfsc r0x01, 2 ; bit 10 + addlw 5 + + btfsc r0x01, 5 ; bit 13 + addlw 1 + + btfsc r0x01, 6 ; bit 14 + addlw 2 + + btfsc r0x01, 7 ; bit 15 + addlw 5 + + + clrf d0x16 +@46: + addlw -10 + bnc @47 + incf d0x16, f + bra @46 +@47: + addlw 10 + movwf d0x15 + + + decfsz round_digit, f + bra @48 + addlw 251 + bnc @48 + incf d0x16, f + +@48: + +; adding digit 16 + movf d0x16, w + + btfsc r0x00, 0 ; bit 0 + addlw 5 + + btfsc r0x00, 1 ; bit 1 + addlw 1 + + btfsc r0x00, 2 ; bit 2 + addlw 3 + + btfsc r0x00, 3 ; bit 3 + addlw 7 + + btfsc r0x00, 4 ; bit 4 + addlw 5 + + btfsc r0x00, 6 ; bit 6 + addlw 1 + + btfsc r0x00, 7 ; bit 7 + addlw 2 + + btfsc r0x01, 0 ; bit 8 + addlw 5 + + btfsc r0x01, 1 ; bit 9 + addlw 1 + + btfsc r0x01, 2 ; bit 10 + addlw 3 + + btfsc r0x01, 3 ; bit 11 + addlw 7 + + btfsc r0x01, 4 ; bit 12 + addlw 4 + + btfsc r0x01, 5 ; bit 13 + addlw 8 + + btfsc r0x01, 6 ; bit 14 + addlw 6 + + btfsc r0x01, 7 ; bit 15 + addlw 2 + + btfsc r0x02, 0 ; bit 16 + addlw 5 + + + clrf d0x17 +@49: + addlw -10 + bnc @50 + incf d0x17, f + bra @49 +@50: + addlw 10 + movwf d0x16 + + + decfsz round_digit, f + bra @51 + addlw 251 + bnc @51 + incf d0x17, f + +@51: + +; adding digit 17 + movf d0x17, w + + btfsc r0x00, 1 ; bit 1 + addlw 1 + + btfsc r0x00, 2 ; bit 2 + addlw 2 + + btfsc r0x00, 3 ; bit 3 + addlw 4 + + btfsc r0x00, 4 ; bit 4 + addlw 9 + + btfsc r0x00, 5 ; bit 5 + addlw 9 + + btfsc r0x00, 6 ; bit 6 + addlw 8 + + btfsc r0x00, 7 ; bit 7 + addlw 6 + + btfsc r0x01, 0 ; bit 8 + addlw 2 + + btfsc r0x01, 1 ; bit 9 + addlw 5 + + btfsc r0x01, 4 ; bit 12 + addlw 1 + + btfsc r0x01, 5 ; bit 13 + addlw 2 + + btfsc r0x01, 6 ; bit 14 + addlw 5 + + btfsc r0x01, 7 ; bit 15 + addlw 1 + + btfsc r0x02, 0 ; bit 16 + addlw 2 + + btfsc r0x02, 1 ; bit 17 + addlw 5 + + + clrf d0x18 +@52: + addlw -10 + bnc @53 + incf d0x18, f + bra @52 +@53: + addlw 10 + movwf d0x17 + + + decfsz round_digit, f + bra @54 + addlw 251 + bnc @54 + incf d0x18, f + +@54: + +; adding digit 18 + movf d0x18, w + + btfsc r0x00, 5 ; bit 5 + addlw 1 + + btfsc r0x00, 6 ; bit 6 + addlw 3 + + btfsc r0x00, 7 ; bit 7 + addlw 7 + + btfsc r0x01, 0 ; bit 8 + addlw 5 + + btfsc r0x01, 2 ; bit 10 + addlw 1 + + btfsc r0x01, 3 ; bit 11 + addlw 2 + + btfsc r0x01, 4 ; bit 12 + addlw 4 + + btfsc r0x01, 5 ; bit 13 + addlw 8 + + btfsc r0x01, 6 ; bit 14 + addlw 6 + + btfsc r0x01, 7 ; bit 15 + addlw 3 + + btfsc r0x02, 0 ; bit 16 + addlw 6 + + btfsc r0x02, 1 ; bit 17 + addlw 2 + + btfsc r0x02, 2 ; bit 18 + addlw 5 + + + clrf d0x19 +@55: + addlw -10 + bnc @56 + incf d0x19, f + bra @55 +@56: + addlw 10 + movwf d0x18 + + + decfsz round_digit, f + bra @57 + addlw 251 + bnc @57 + incf d0x19, f + +@57: + +; adding digit 19 + movf d0x19, w + + btfsc r0x01, 0 ; bit 8 + addlw 1 + + btfsc r0x01, 1 ; bit 9 + addlw 3 + + btfsc r0x01, 2 ; bit 10 + addlw 6 + + btfsc r0x01, 3 ; bit 11 + addlw 2 + + btfsc r0x01, 4 ; bit 12 + addlw 4 + + btfsc r0x01, 5 ; bit 13 + addlw 8 + + btfsc r0x01, 6 ; bit 14 + addlw 7 + + btfsc r0x01, 7 ; bit 15 + addlw 5 + + btfsc r0x02, 1 ; bit 17 + addlw 1 + + btfsc r0x02, 2 ; bit 18 + addlw 2 + + btfsc r0x02, 3 ; bit 19 + addlw 5 + + + clrf d0x20 +@58: + addlw -10 + bnc @59 + incf d0x20, f + bra @58 +@59: + addlw 10 + movwf d0x19 + + + decfsz round_digit, f + bra @60 + addlw 251 + bnc @60 + incf d0x20, f + +@60: + +; adding digit 20 + movf d0x20, w + + btfsc r0x01, 3 ; bit 11 + addlw 1 + + btfsc r0x01, 4 ; bit 12 + addlw 2 + + btfsc r0x01, 5 ; bit 13 + addlw 4 + + btfsc r0x01, 6 ; bit 14 + addlw 9 + + btfsc r0x01, 7 ; bit 15 + addlw 9 + + btfsc r0x02, 0 ; bit 16 + addlw 9 + + btfsc r0x02, 1 ; bit 17 + addlw 8 + + btfsc r0x02, 2 ; bit 18 + addlw 6 + + btfsc r0x02, 3 ; bit 19 + addlw 2 + + btfsc r0x02, 4 ; bit 20 + addlw 5 + + + clrf d0x21 +@61: + addlw -10 + bnc @62 + incf d0x21, f + bra @61 +@62: + addlw 10 + movwf d0x20 + + + decfsz round_digit, f + bra @63 + addlw 251 + bnc @63 + incf d0x21, f + +@63: + +; adding digit 21 + movf d0x21, w + + btfsc r0x01, 7 ; bit 15 + addlw 1 + + btfsc r0x02, 0 ; bit 16 + addlw 3 + + btfsc r0x02, 1 ; bit 17 + addlw 7 + + btfsc r0x02, 2 ; bit 18 + addlw 5 + + btfsc r0x02, 3 ; bit 19 + addlw 1 + + btfsc r0x02, 4 ; bit 20 + addlw 2 + + btfsc r0x02, 5 ; bit 21 + addlw 5 + + + clrf d0x22 +@64: + addlw -10 + bnc @65 + incf d0x22, f + bra @64 +@65: + addlw 10 + movwf d0x21 + + + decfsz round_digit, f + bra @66 + addlw 251 + bnc @66 + incf d0x22, f + +@66: + +; adding digit 22 + movf d0x22, w + + btfsc r0x02, 2 ; bit 18 + addlw 1 + + btfsc r0x02, 3 ; bit 19 + addlw 3 + + btfsc r0x02, 4 ; bit 20 + addlw 6 + + btfsc r0x02, 5 ; bit 21 + addlw 2 + + btfsc r0x02, 6 ; bit 22 + addlw 5 + + + clrf d0x23 +@67: + addlw -10 + bnc @68 + incf d0x23, f + bra @67 +@68: + addlw 10 + movwf d0x22 + + + decfsz round_digit, f + bra @69 + addlw 251 + bnc @69 + incf d0x23, f + +@69: + +; adding digit 23 + movf d0x23, w + + btfsc r0x02, 5 ; bit 21 + addlw 1 + + btfsc r0x02, 6 ; bit 22 + addlw 2 + + btfsc r0x02, 7 ; bit 23 + addlw 5 + + + clrf d0x24 +@70: + addlw -10 + bnc @71 + incf d0x24, f + bra @70 +@71: + addlw 10 + movwf d0x23 + + + decfsz round_digit, f + bra @72 + addlw 251 + bnc @72 + incf d0x24, f + +@72: + + +; finalization +@73: + addlw 48 + movwf POSTINC0 + movf d0x22, w +@74: + addlw 48 + movwf POSTINC0 + movf d0x21, w +@75: + addlw 48 + movwf POSTINC0 + movf d0x20, w +@76: + addlw 48 + movwf POSTINC0 + movf d0x19, w +@77: + addlw 48 + movwf POSTINC0 + movf d0x18, w +@78: + addlw 48 + movwf POSTINC0 + movf d0x17, w +@79: + addlw 48 + movwf POSTINC0 + movf d0x16, w +@80: + addlw 48 + movwf POSTINC0 + movf d0x15, w +@81: + addlw 48 + movwf POSTINC0 + movf d0x14, w +@82: + addlw 48 + movwf POSTINC0 + movf d0x13, w +@83: + addlw 48 + movwf POSTINC0 + movf d0x12, w +@84: + addlw 48 + movwf POSTINC0 + movf d0x11, w +@85: + addlw 48 + movwf POSTINC0 + movf d0x10, w +@86: + addlw 48 + movwf POSTINC0 + movf d0x09, w +@87: + addlw 48 + movwf POSTINC0 + movf d0x08, w +@88: + addlw 48 + movwf POSTINC0 + movf d0x07, w +@89: + addlw 48 + movwf POSTINC0 + movf d0x06, w +@90: + addlw 48 + movwf POSTINC0 + movf d0x05, w +@91: + addlw 48 + movwf POSTINC0 + movf d0x04, w +@92: + addlw 48 + movwf POSTINC0 + movf d0x03, w +@93: + addlw 48 + movwf POSTINC0 + movf d0x02, w +@94: + addlw 48 + movwf POSTINC0 + movf d0x01, w +@95: + addlw 48 + movwf POSTINC0 + movf d0x00, w +@96: + addlw 48 + movwf POSTINC0 + + movlw 23 + + movff PREINC1, d0x24 + movff PREINC1, d0x23 + movff PREINC1, d0x22 + movff PREINC1, d0x21 + movff PREINC1, d0x20 + movff PREINC1, d0x19 + movff PREINC1, d0x18 + movff PREINC1, d0x17 + movff PREINC1, d0x16 + movff PREINC1, d0x15 + movff PREINC1, d0x14 + movff PREINC1, d0x13 + movff PREINC1, d0x12 + movff PREINC1, d0x11 + movff PREINC1, d0x10 + movff PREINC1, d0x09 + movff PREINC1, d0x08 + movff PREINC1, d0x07 + movff PREINC1, d0x06 + movff PREINC1, d0x05 + movff PREINC1, d0x04 + movff PREINC1, d0x03 + movff PREINC1, d0x02 + movff PREINC1, d0x01 + movff PREINC1, d0x00 + return + + end + +; Converstion table +; +;00 0.5000000000000000000000000 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +;01 0.2500000000000000000000000 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +;02 0.1250000000000000000000000 1 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +;03 0.0625000000000000000000000 0 6 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +;04 0.0312500000000000000000000 0 3 1 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +;05 0.0156250000000000000000000 0 1 5 6 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +;06 0.0078125000000000000000000 0 0 7 8 1 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +;07 0.0039062500000000000000000 0 0 3 9 0 6 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +;08 0.0019531250000000000000000 0 0 1 9 5 3 1 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +;09 0.0009765625000000000000000 0 0 0 9 7 6 5 6 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +;10 0.0004882812500000000000000 0 0 0 4 8 8 2 8 1 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 +;11 0.0002441406250000000000000 0 0 0 2 4 4 1 4 0 6 2 5 0 0 0 0 0 0 0 0 0 0 0 0 +;12 0.0001220703125000000000000 0 0 0 1 2 2 0 7 0 3 1 2 5 0 0 0 0 0 0 0 0 0 0 0 +;13 0.0000610351562500000000000 0 0 0 0 6 1 0 3 5 1 5 6 2 5 0 0 0 0 0 0 0 0 0 0 +;14 0.0000305175781250000000000 0 0 0 0 3 0 5 1 7 5 7 8 1 2 5 0 0 0 0 0 0 0 0 0 +;15 0.0000152587890625000000000 0 0 0 0 1 5 2 5 8 7 8 9 0 6 2 5 0 0 0 0 0 0 0 0 +;16 0.0000076293945312500000000 0 0 0 0 0 7 6 2 9 3 9 4 5 3 1 2 5 0 0 0 0 0 0 0 +;17 0.0000038146972656250000000 0 0 0 0 0 3 8 1 4 6 9 7 2 6 5 6 2 5 0 0 0 0 0 0 +;18 0.0000019073486328125000000 0 0 0 0 0 1 9 0 7 3 4 8 6 3 2 8 1 2 5 0 0 0 0 0 +;19 0.0000009536743164062500000 0 0 0 0 0 0 9 5 3 6 7 4 3 1 6 4 0 6 2 5 0 0 0 0 +;20 0.0000004768371582031250000 0 0 0 0 0 0 4 7 6 8 3 7 1 5 8 2 0 3 1 2 5 0 0 0 +;21 0.0000002384185791015625000 0 0 0 0 0 0 2 3 8 4 1 8 5 7 9 1 0 1 5 6 2 5 0 0 +;22 0.0000001192092895507812500 0 0 0 0 0 0 1 1 9 2 0 9 2 8 9 5 5 0 7 8 1 2 5 0 +;23 0.0000000596046447753906250 0 0 0 0 0 0 0 5 9 6 0 4 6 4 4 7 7 5 3 9 0 6 2 5 diff --git a/device/lib/pic16/libc/utils/cnvint.S b/device/lib/pic16/libc/utils/cnvint.S new file mode 100644 index 0000000..f306cb3 --- /dev/null +++ b/device/lib/pic16/libc/utils/cnvint.S @@ -0,0 +1,548 @@ +; +; Convertion routine of 24 bits integer to ASCII +; +; written by Vangelis Rokas , 2004 +; +; +; +; This program is free software; you can redistribute it and/or +; modify it under the terms of the GNU Library General Public License +; as published by the Free Software Foundation; either version 2 +; of the License, or (at your option) any later version. +; +; This library is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU General Public License for more details. +; +; You should have received a copy of the GNU General Public License +; along with this program; if not, write to the Free Software +; Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +; +; +; $Id: cnvint.S 3711 2005-03-31 16:25:17Z vrokas $ +; + + radix dec + list + nolist + + +POSTINC0 equ 0xfee +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 +STATUS equ 0xfd8 + + + global _convert_int + + +.registers udata_ovr 0x000 +r0x00 res 1 +r0x01 res 1 +r0x02 res 1 +r0x03 res 1 +d0x00 res 1 +d0x01 res 1 +d0x02 res 1 +d0x03 res 1 +d0x04 res 1 +d0x05 res 1 +d0x06 res 1 +d0x07 res 1 +d0x08 res 1 +d0x09 res 1 +digit_count res 1 + + +S__convert_int code +_convert_int: + + movff r0x00, POSTDEC1 + movff r0x01, POSTDEC1 + movff r0x02, POSTDEC1 + movff r0x03, POSTDEC1 + movff d0x00, POSTDEC1 + movff d0x01, POSTDEC1 + movff d0x02, POSTDEC1 + movff d0x03, POSTDEC1 + movff d0x04, POSTDEC1 + movff d0x05, POSTDEC1 + movff d0x06, POSTDEC1 + movff d0x07, POSTDEC1 + movff d0x08, POSTDEC1 + movff d0x09, POSTDEC1 + movff digit_count, POSTDEC1 + + +; adding digit 0 + movlw 0 + + btfsc r0x00, 0 ; bit 0 + addlw 1 + + btfsc r0x00, 1 ; bit 1 + addlw 2 + + btfsc r0x00, 2 ; bit 2 + addlw 4 + + btfsc r0x00, 3 ; bit 3 + addlw 8 + + btfsc r0x00, 4 ; bit 4 + addlw 6 + + btfsc r0x00, 5 ; bit 5 + addlw 2 + + btfsc r0x00, 6 ; bit 6 + addlw 4 + + btfsc r0x00, 7 ; bit 7 + addlw 8 + + btfsc r0x01, 0 ; bit 8 + addlw 6 + + btfsc r0x01, 1 ; bit 9 + addlw 2 + + btfsc r0x01, 2 ; bit 10 + addlw 4 + + btfsc r0x01, 3 ; bit 11 + addlw 8 + + btfsc r0x01, 4 ; bit 12 + addlw 6 + + btfsc r0x01, 5 ; bit 13 + addlw 2 + + btfsc r0x01, 6 ; bit 14 + addlw 4 + + btfsc r0x01, 7 ; bit 15 + addlw 8 + + btfsc r0x02, 0 ; bit 16 + addlw 6 + + btfsc r0x02, 1 ; bit 17 + addlw 2 + + btfsc r0x02, 2 ; bit 18 + addlw 4 + + btfsc r0x02, 3 ; bit 19 + addlw 8 + + btfsc r0x02, 4 ; bit 20 + addlw 6 + + btfsc r0x02, 5 ; bit 21 + addlw 2 + + btfsc r0x02, 6 ; bit 22 + addlw 4 + + btfsc r0x02, 7 ; bit 23 + addlw 8 + + + clrf d0x01 +@1: + addlw -10 + bnc @2 + incf d0x01, f + bra @1 +@2: + addlw 10 + movwf d0x00 + +; adding digit 1 + movf d0x01, w + + btfsc r0x00, 4 ; bit 4 + addlw 1 + + btfsc r0x00, 5 ; bit 5 + addlw 3 + + btfsc r0x00, 6 ; bit 6 + addlw 6 + + btfsc r0x00, 7 ; bit 7 + addlw 2 + + btfsc r0x01, 0 ; bit 8 + addlw 5 + + btfsc r0x01, 1 ; bit 9 + addlw 1 + + btfsc r0x01, 2 ; bit 10 + addlw 2 + + btfsc r0x01, 3 ; bit 11 + addlw 4 + + btfsc r0x01, 4 ; bit 12 + addlw 9 + + btfsc r0x01, 5 ; bit 13 + addlw 9 + + btfsc r0x01, 6 ; bit 14 + addlw 8 + + btfsc r0x01, 7 ; bit 15 + addlw 6 + + btfsc r0x02, 0 ; bit 16 + addlw 3 + + btfsc r0x02, 1 ; bit 17 + addlw 7 + + btfsc r0x02, 2 ; bit 18 + addlw 4 + + btfsc r0x02, 3 ; bit 19 + addlw 8 + + btfsc r0x02, 4 ; bit 20 + addlw 7 + + btfsc r0x02, 5 ; bit 21 + addlw 5 + + + clrf d0x02 +@3: + addlw -10 + bnc @4 + incf d0x02, f + bra @3 +@4: + addlw 10 + movwf d0x01 + +; adding digit 2 + movf d0x02, w + + btfsc r0x00, 7 ; bit 7 + addlw 1 + + btfsc r0x01, 0 ; bit 8 + addlw 2 + + btfsc r0x01, 1 ; bit 9 + addlw 5 + + btfsc r0x01, 5 ; bit 13 + addlw 1 + + btfsc r0x01, 6 ; bit 14 + addlw 3 + + btfsc r0x01, 7 ; bit 15 + addlw 7 + + btfsc r0x02, 0 ; bit 16 + addlw 5 + + btfsc r0x02, 2 ; bit 18 + addlw 1 + + btfsc r0x02, 3 ; bit 19 + addlw 2 + + btfsc r0x02, 4 ; bit 20 + addlw 5 + + btfsc r0x02, 5 ; bit 21 + addlw 1 + + btfsc r0x02, 6 ; bit 22 + addlw 3 + + btfsc r0x02, 7 ; bit 23 + addlw 6 + + + clrf d0x03 +@5: + addlw -10 + bnc @6 + incf d0x03, f + bra @5 +@6: + addlw 10 + movwf d0x02 + +; adding digit 3 + movf d0x03, w + + btfsc r0x01, 2 ; bit 10 + addlw 1 + + btfsc r0x01, 3 ; bit 11 + addlw 2 + + btfsc r0x01, 4 ; bit 12 + addlw 4 + + btfsc r0x01, 5 ; bit 13 + addlw 8 + + btfsc r0x01, 6 ; bit 14 + addlw 6 + + btfsc r0x01, 7 ; bit 15 + addlw 2 + + btfsc r0x02, 0 ; bit 16 + addlw 5 + + btfsc r0x02, 1 ; bit 17 + addlw 1 + + btfsc r0x02, 2 ; bit 18 + addlw 2 + + btfsc r0x02, 3 ; bit 19 + addlw 4 + + btfsc r0x02, 4 ; bit 20 + addlw 8 + + btfsc r0x02, 5 ; bit 21 + addlw 7 + + btfsc r0x02, 6 ; bit 22 + addlw 4 + + btfsc r0x02, 7 ; bit 23 + addlw 8 + + + clrf d0x04 +@7: + addlw -10 + bnc @8 + incf d0x04, f + bra @7 +@8: + addlw 10 + movwf d0x03 + +; adding digit 4 + movf d0x04, w + + btfsc r0x01, 6 ; bit 14 + addlw 1 + + btfsc r0x01, 7 ; bit 15 + addlw 3 + + btfsc r0x02, 0 ; bit 16 + addlw 6 + + btfsc r0x02, 1 ; bit 17 + addlw 3 + + btfsc r0x02, 2 ; bit 18 + addlw 6 + + btfsc r0x02, 3 ; bit 19 + addlw 2 + + btfsc r0x02, 4 ; bit 20 + addlw 4 + + btfsc r0x02, 5 ; bit 21 + addlw 9 + + btfsc r0x02, 6 ; bit 22 + addlw 9 + + btfsc r0x02, 7 ; bit 23 + addlw 8 + + + clrf d0x05 +@9: + addlw -10 + bnc @10 + incf d0x05, f + bra @9 +@10: + addlw 10 + movwf d0x04 + +; adding digit 5 + movf d0x05, w + + btfsc r0x02, 1 ; bit 17 + addlw 1 + + btfsc r0x02, 2 ; bit 18 + addlw 2 + + btfsc r0x02, 3 ; bit 19 + addlw 5 + + btfsc r0x02, 6 ; bit 22 + addlw 1 + + btfsc r0x02, 7 ; bit 23 + addlw 3 + + + clrf d0x06 +@11: + addlw -10 + bnc @12 + incf d0x06, f + bra @11 +@12: + addlw 10 + movwf d0x05 + +; adding digit 6 + movf d0x06, w + + btfsc r0x02, 4 ; bit 20 + addlw 1 + + btfsc r0x02, 5 ; bit 21 + addlw 2 + + btfsc r0x02, 6 ; bit 22 + addlw 4 + + btfsc r0x02, 7 ; bit 23 + addlw 8 + + + clrf d0x07 +@13: + addlw -10 + bnc @14 + incf d0x07, f + bra @13 +@14: + addlw 10 + movwf d0x06 + +; adding digit 7 + movf d0x07, w + + clrf digit_count + + +; finalization + bnz @15 + movf d0x06, w + bnz @16 + movf d0x05, w + bnz @17 + movf d0x04, w + bnz @18 + movf d0x03, w + bnz @19 + movf d0x02, w + bnz @20 + movf d0x01, w + bnz @21 + movf d0x00, w + bra @22 +@15: + incf digit_count, f + addlw 48 + movwf POSTINC0 + movf d0x06, w +@16: + incf digit_count, f + addlw 48 + movwf POSTINC0 + movf d0x05, w +@17: + incf digit_count, f + addlw 48 + movwf POSTINC0 + movf d0x04, w +@18: + incf digit_count, f + addlw 48 + movwf POSTINC0 + movf d0x03, w +@19: + incf digit_count, f + addlw 48 + movwf POSTINC0 + movf d0x02, w +@20: + incf digit_count, f + addlw 48 + movwf POSTINC0 + movf d0x01, w +@21: + incf digit_count, f + addlw 48 + movwf POSTINC0 + movf d0x00, w +@22: + incf digit_count, f + addlw 48 + movwf POSTINC0 + + movf digit_count, w + + movff PREINC1, digit_count + movff PREINC1, d0x09 + movff PREINC1, d0x08 + movff PREINC1, d0x07 + movff PREINC1, d0x06 + movff PREINC1, d0x05 + movff PREINC1, d0x04 + movff PREINC1, d0x03 + movff PREINC1, d0x02 + movff PREINC1, d0x01 + movff PREINC1, d0x00 + movff PREINC1, r0x03 + movff PREINC1, r0x02 + movff PREINC1, r0x01 + movff PREINC1, r0x00 + return + + end + +; Converstion table +; +;00 000000000000000000000001 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 +;01 000000000000000000000002 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 +;02 000000000000000000000004 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 +;03 000000000000000000000008 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8 +;04 000000000000000000000016 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 6 +;05 000000000000000000000032 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 2 +;06 000000000000000000000064 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 4 +;07 000000000000000000000128 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 8 +;08 000000000000000000000256 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 5 6 +;09 000000000000000000000512 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 1 2 +;10 000000000000000000001024 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 2 4 +;11 000000000000000000002048 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 4 8 +;12 000000000000000000004096 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 0 9 6 +;13 000000000000000000008192 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8 1 9 2 +;14 000000000000000000016384 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 6 3 8 4 +;15 000000000000000000032768 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 2 7 6 8 +;16 000000000000000000065536 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 5 5 3 6 +;17 000000000000000000131072 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 1 0 7 2 +;18 000000000000000000262144 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 6 2 1 4 4 +;19 000000000000000000524288 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 2 4 2 8 8 +;20 000000000000000001048576 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 4 8 5 7 6 +;21 000000000000000002097152 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 9 7 1 5 2 +;22 000000000000000004194304 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 1 9 4 3 0 4 +;23 000000000000000008388608 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8 3 8 8 6 0 8 diff --git a/device/lib/pic16/libc/utils/cvtdec.S b/device/lib/pic16/libc/utils/cvtdec.S new file mode 100644 index 0000000..69266b5 --- /dev/null +++ b/device/lib/pic16/libc/utils/cvtdec.S @@ -0,0 +1,286 @@ +;-- +; +; File: cvtdec.asm +; Author: George Gallant +; Date: 19OCT04 +; +; $Id: cvtdec.S 3718 2005-04-06 06:06:20Z vrokas $ +; +; This routine is based on the code and algorithm by +; Nikolai Golovchenko and Scott Dattalo presented in +; the piclist webb site on radix conversion methods. +; Modified to support integers from 0 to 65535 and coded +; for the pic18 chip set. +; +; Digit +; BIT Weight 4 3 2 1 0 +; --- ------ --- --- --- --- --- +; 0 1 0 0 0 0 1 +; 1 2 0 0 0 0 2 +; 2 4 0 0 0 0 4 +; 3 8 0 0 0 0 8 +; +; 4 16 0 0 0 1 6 +; 5 32 0 0 0 3 2 +; 6 64 0 0 0 6 4 +; 7 128 0 0 1 2 8 +; +; 8 256 0 0 2 5 6 +; 9 512 0 0 5 1 2 +; 10 1024 0 1 0 2 4 +; 11 2048 0 2 0 4 8 +; +; 12 4096 0 4 0 9 6 +; 13 8192 0 8 1 9 2 +; 14 16384 1 6 3 8 4 +; 15 32768 3 2 7 6 8 +; +;-- + nolist + include + list + + udata + + global digits + +digits: res 6 + + code + + global cvt_dec_word + +;-- +; +; Convert a 16-bit binary word to 5 BCD bytes +; +; On Call +; PROD 16 bit word +; FSR0 pointer to ascii buffer +; +; On Return +; digits[4:0] contain the BCD integers +; +; Notes: 1. strip leading zeros +; 2. only positive integers on input +; 3. FSR0, PROD & W are modified and not preserved +; +;-- +cvt_dec_word: clrw ;calculate digit 0 - lsd + + btfsc PRODL,0 ;bit0 + addlw 1 + + btfsc PRODL,1 ;bit1 + addlw 2 + + btfsc PRODL,2 ;bit2 + addlw 4 + + btfsc PRODL,3 ;bit3 + addlw 8 + + btfsc PRODL,4 ;bit4 + addlw 6 + + btfsc PRODL,5 ;bit5 + addlw 2 + + btfsc PRODL,6 ;bit6 + addlw 4 + + btfsc PRODL,7 ;bit7 + addlw 8 + + btfsc PRODH,0 ;bit8 + addlw 6 + + btfsc PRODH,1 ;bit9 + addlw 2 + + btfsc PRODH,2 ;bit10 + addlw 4 + + btfsc PRODH,3 ;bit11 + addlw 8 + + btfsc PRODH,4 ;bit12 + addlw 6 + + btfsc PRODH,5 ;bit13 + addlw 2 + + btfsc PRODH,6 ;bit14 + addlw 4 + + btfsc PRODH,7 ;bit15 + addlw 8 + + clrf digits+1 ;setup for carry in 10's +@1: addlw -10 + bnc @2 + incf digits+1,f + bra @1 + +@2: addlw 10 + movwf digits+0 + +; calculate digit 1 + + movf digits+1,w + + btfsc PRODL,4 ;bit4 + addlw 1 + + btfsc PRODL,5 ;bit5 + addlw 3 + + btfsc PRODL,6 ;bit6 + addlw 6 + + btfsc PRODL,7 ;bit7 + addlw 2 + + btfsc PRODH,0 ;bit8 + addlw 5 + + btfsc PRODH,1 ;bit9 + addlw 1 + + btfsc PRODH,2 ;bit10 + addlw 2 + + btfsc PRODH,3 ;bit11 + addlw 4 + + btfsc PRODH,4 ;bit12 + addlw 9 + + btfsc PRODH,5 ;bit13 + addlw 9 + + btfsc PRODH,6 ;bit14 + addlw 8 + + btfsc PRODH,7 ;bit15 + addlw 6 + + clrf digits+2 ;setup for carry into 100's +@3: addlw -10 + bnc @4 + incf digits+2,f + bra @3 + +@4: addlw 10 + movwf digits+1 + +; calculate digit 2 + + movf digits+2,w + + btfsc PRODL,7 ;bit7 + addlw 1 + + btfsc PRODH,0 ;bit8 + addlw 2 + + btfsc PRODH,1 ;bit9 + addlw 5 + + btfsc PRODH,5 ;bit13 + addlw 1 + + btfsc PRODH,6 ;bit14 + addlw 3 + + btfsc PRODH,7 ;bit15 + addlw 7 + + clrf digits+3 ;setup for carry into 1000's +@5: addlw -10 + bnc @6 + incf digits+3,f + bra @5 +@6: addlw 10 + + movwf digits+2 + +; calculate digit 3 + + movf digits+3,w + + btfsc PRODH,2 ;bit10 + addlw 1 + + btfsc PRODH,3 ;bit11 + addlw 2 + + btfsc PRODH,4 ;bit12 + addlw 4 + + btfsc PRODH,5 ;bit13 + addlw 8 + + btfsc PRODH,6 ;bit14 + addlw 6 + + btfsc PRODH,7 ;bit15 + addlw 2 + + clrf digits+4 ;setup for carry into 10000's +@7: addlw -10 + bnc @8 + incf digits+4,f + bra @7 + +@8: addlw 10 + movwf digits+3 + +; calculate digit 4 + + movf digits+4,w + + btfsc PRODH,6 ;bit14 + addlw 1 + + btfsc PRODH,7 ;bit15 + addlw 3 + +@9: addlw -10 + bc @9 + + addlw 10 +; movwf digits+4 + +; movf digits+4,w + bnz @11 + movf digits+3,w + bnz @12 + movf digits+2,w + bnz @13 + movf digits+1,w + bnz @14 + bra @15 + +@11: addlw 0x30 + movwf POSTINC0 + + movf digits+3,w +@12: addlw 0x30 + movwf POSTINC0 + + movf digits+2,w +@13: addlw 0x30 + movwf POSTINC0 + + movf digits+1,w +@14: addlw 0x30 + movwf POSTINC0 + +@15: movf digits+0,w + addlw 0x30 + movwf POSTINC0 + + return + + end diff --git a/device/lib/pic16/libdev/Makefile.am b/device/lib/pic16/libdev/Makefile.am new file mode 100644 index 0000000..47aad5e --- /dev/null +++ b/device/lib/pic16/libdev/Makefile.am @@ -0,0 +1,403 @@ +## Makefile.am -- Process this file with automake to produce Makefile.in +## This file has been automatically generated using ./mkmk.sh. + +lib_LIBRARIES = + +lib_LIBRARIES += libdev18f1220.a +libdev18f1220_a_SOURCES = pic18f1220.c +libdev18f1220_a_CFLAGS = -p18f1220 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f1320.a +libdev18f1320_a_SOURCES = pic18f1320.c +libdev18f1320_a_CFLAGS = -p18f1320 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2220.a +libdev18f2220_a_SOURCES = pic18f2220.c +libdev18f2220_a_CFLAGS = -p18f2220 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2221.a +libdev18f2221_a_SOURCES = pic18f2221.c +libdev18f2221_a_CFLAGS = -p18f2221 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2320.a +libdev18f2320_a_SOURCES = pic18f2320.c +libdev18f2320_a_CFLAGS = -p18f2320 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2321.a +libdev18f2321_a_SOURCES = pic18f2321.c +libdev18f2321_a_CFLAGS = -p18f2321 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2331.a +libdev18f2331_a_SOURCES = pic18f2331.c +libdev18f2331_a_CFLAGS = -p18f2331 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f23k20.a +libdev18f23k20_a_SOURCES = pic18f23k20.c +libdev18f23k20_a_CFLAGS = -p18f23k20 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2410.a +libdev18f2410_a_SOURCES = pic18f2410.c +libdev18f2410_a_CFLAGS = -p18f2410 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f242.a +libdev18f242_a_SOURCES = pic18f242.c +libdev18f242_a_CFLAGS = -p18f242 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2420.a +libdev18f2420_a_SOURCES = pic18f2420.c +libdev18f2420_a_CFLAGS = -p18f2420 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2423.a +libdev18f2423_a_SOURCES = pic18f2423.c +libdev18f2423_a_CFLAGS = -p18f2423 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2431.a +libdev18f2431_a_SOURCES = pic18f2431.c +libdev18f2431_a_CFLAGS = -p18f2431 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2450.a +libdev18f2450_a_SOURCES = pic18f2450.c +libdev18f2450_a_CFLAGS = -p18f2450 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2455.a +libdev18f2455_a_SOURCES = pic18f2455.c +libdev18f2455_a_CFLAGS = -p18f2455 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f248.a +libdev18f248_a_SOURCES = pic18f248.c +libdev18f248_a_CFLAGS = -p18f248 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2480.a +libdev18f2480_a_SOURCES = pic18f2480.c +libdev18f2480_a_CFLAGS = -p18f2480 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f24j10.a +libdev18f24j10_a_SOURCES = pic18f24j10.c +libdev18f24j10_a_CFLAGS = -p18f24j10 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f24k20.a +libdev18f24k20_a_SOURCES = pic18f24k20.c +libdev18f24k20_a_CFLAGS = -p18f24k20 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2510.a +libdev18f2510_a_SOURCES = pic18f2510.c +libdev18f2510_a_CFLAGS = -p18f2510 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2515.a +libdev18f2515_a_SOURCES = pic18f2515.c +libdev18f2515_a_CFLAGS = -p18f2515 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f252.a +libdev18f252_a_SOURCES = pic18f252.c +libdev18f252_a_CFLAGS = -p18f252 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2520.a +libdev18f2520_a_SOURCES = pic18f2520.c +libdev18f2520_a_CFLAGS = -p18f2520 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2523.a +libdev18f2523_a_SOURCES = pic18f2523.c +libdev18f2523_a_CFLAGS = -p18f2523 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2525.a +libdev18f2525_a_SOURCES = pic18f2525.c +libdev18f2525_a_CFLAGS = -p18f2525 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2550.a +libdev18f2550_a_SOURCES = pic18f2550.c +libdev18f2550_a_CFLAGS = -p18f2550 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f258.a +libdev18f258_a_SOURCES = pic18f258.c +libdev18f258_a_CFLAGS = -p18f258 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2580.a +libdev18f2580_a_SOURCES = pic18f2580.c +libdev18f2580_a_CFLAGS = -p18f2580 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2585.a +libdev18f2585_a_SOURCES = pic18f2585.c +libdev18f2585_a_CFLAGS = -p18f2585 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f25j10.a +libdev18f25j10_a_SOURCES = pic18f25j10.c +libdev18f25j10_a_CFLAGS = -p18f25j10 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f25k20.a +libdev18f25k20_a_SOURCES = pic18f25k20.c +libdev18f25k20_a_CFLAGS = -p18f25k20 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2610.a +libdev18f2610_a_SOURCES = pic18f2610.c +libdev18f2610_a_CFLAGS = -p18f2610 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2620.a +libdev18f2620_a_SOURCES = pic18f2620.c +libdev18f2620_a_CFLAGS = -p18f2620 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2680.a +libdev18f2680_a_SOURCES = pic18f2680.c +libdev18f2680_a_CFLAGS = -p18f2680 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2682.a +libdev18f2682_a_SOURCES = pic18f2682.c +libdev18f2682_a_CFLAGS = -p18f2682 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f2685.a +libdev18f2685_a_SOURCES = pic18f2685.c +libdev18f2685_a_CFLAGS = -p18f2685 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f26k20.a +libdev18f26k20_a_SOURCES = pic18f26k20.c +libdev18f26k20_a_CFLAGS = -p18f26k20 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4220.a +libdev18f4220_a_SOURCES = pic18f4220.c +libdev18f4220_a_CFLAGS = -p18f4220 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4221.a +libdev18f4221_a_SOURCES = pic18f4221.c +libdev18f4221_a_CFLAGS = -p18f4221 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4320.a +libdev18f4320_a_SOURCES = pic18f4320.c +libdev18f4320_a_CFLAGS = -p18f4320 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4321.a +libdev18f4321_a_SOURCES = pic18f4321.c +libdev18f4321_a_CFLAGS = -p18f4321 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4331.a +libdev18f4331_a_SOURCES = pic18f4331.c +libdev18f4331_a_CFLAGS = -p18f4331 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f43k20.a +libdev18f43k20_a_SOURCES = pic18f43k20.c +libdev18f43k20_a_CFLAGS = -p18f43k20 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4410.a +libdev18f4410_a_SOURCES = pic18f4410.c +libdev18f4410_a_CFLAGS = -p18f4410 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f442.a +libdev18f442_a_SOURCES = pic18f442.c +libdev18f442_a_CFLAGS = -p18f442 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4420.a +libdev18f4420_a_SOURCES = pic18f4420.c +libdev18f4420_a_CFLAGS = -p18f4420 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4423.a +libdev18f4423_a_SOURCES = pic18f4423.c +libdev18f4423_a_CFLAGS = -p18f4423 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4431.a +libdev18f4431_a_SOURCES = pic18f4431.c +libdev18f4431_a_CFLAGS = -p18f4431 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4450.a +libdev18f4450_a_SOURCES = pic18f4450.c +libdev18f4450_a_CFLAGS = -p18f4450 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4455.a +libdev18f4455_a_SOURCES = pic18f4455.c +libdev18f4455_a_CFLAGS = -p18f4455 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f448.a +libdev18f448_a_SOURCES = pic18f448.c +libdev18f448_a_CFLAGS = -p18f448 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4480.a +libdev18f4480_a_SOURCES = pic18f4480.c +libdev18f4480_a_CFLAGS = -p18f4480 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f44j10.a +libdev18f44j10_a_SOURCES = pic18f44j10.c +libdev18f44j10_a_CFLAGS = -p18f44j10 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f44k20.a +libdev18f44k20_a_SOURCES = pic18f44k20.c +libdev18f44k20_a_CFLAGS = -p18f44k20 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4510.a +libdev18f4510_a_SOURCES = pic18f4510.c +libdev18f4510_a_CFLAGS = -p18f4510 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4515.a +libdev18f4515_a_SOURCES = pic18f4515.c +libdev18f4515_a_CFLAGS = -p18f4515 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f452.a +libdev18f452_a_SOURCES = pic18f452.c +libdev18f452_a_CFLAGS = -p18f452 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4520.a +libdev18f4520_a_SOURCES = pic18f4520.c +libdev18f4520_a_CFLAGS = -p18f4520 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4523.a +libdev18f4523_a_SOURCES = pic18f4523.c +libdev18f4523_a_CFLAGS = -p18f4523 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4525.a +libdev18f4525_a_SOURCES = pic18f4525.c +libdev18f4525_a_CFLAGS = -p18f4525 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4550.a +libdev18f4550_a_SOURCES = pic18f4550.c +libdev18f4550_a_CFLAGS = -p18f4550 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f458.a +libdev18f458_a_SOURCES = pic18f458.c +libdev18f458_a_CFLAGS = -p18f458 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4580.a +libdev18f4580_a_SOURCES = pic18f4580.c +libdev18f4580_a_CFLAGS = -p18f4580 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4585.a +libdev18f4585_a_SOURCES = pic18f4585.c +libdev18f4585_a_CFLAGS = -p18f4585 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f45j10.a +libdev18f45j10_a_SOURCES = pic18f45j10.c +libdev18f45j10_a_CFLAGS = -p18f45j10 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f45k20.a +libdev18f45k20_a_SOURCES = pic18f45k20.c +libdev18f45k20_a_CFLAGS = -p18f45k20 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4610.a +libdev18f4610_a_SOURCES = pic18f4610.c +libdev18f4610_a_CFLAGS = -p18f4610 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4620.a +libdev18f4620_a_SOURCES = pic18f4620.c +libdev18f4620_a_CFLAGS = -p18f4620 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4680.a +libdev18f4680_a_SOURCES = pic18f4680.c +libdev18f4680_a_CFLAGS = -p18f4680 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4682.a +libdev18f4682_a_SOURCES = pic18f4682.c +libdev18f4682_a_CFLAGS = -p18f4682 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f4685.a +libdev18f4685_a_SOURCES = pic18f4685.c +libdev18f4685_a_CFLAGS = -p18f4685 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f46k20.a +libdev18f46k20_a_SOURCES = pic18f46k20.c +libdev18f46k20_a_CFLAGS = -p18f46k20 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f6520.a +libdev18f6520_a_SOURCES = pic18f6520.c +libdev18f6520_a_CFLAGS = -p18f6520 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f6585.a +libdev18f6585_a_SOURCES = pic18f6585.c +libdev18f6585_a_CFLAGS = -p18f6585 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f65j50.a +libdev18f65j50_a_SOURCES = pic18f65j50.c +libdev18f65j50_a_CFLAGS = -p18f65j50 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f6620.a +libdev18f6620_a_SOURCES = pic18f6620.c +libdev18f6620_a_CFLAGS = -p18f6620 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f6680.a +libdev18f6680_a_SOURCES = pic18f6680.c +libdev18f6680_a_CFLAGS = -p18f6680 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f66j50.a +libdev18f66j50_a_SOURCES = pic18f66j50.c +libdev18f66j50_a_CFLAGS = -p18f66j50 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f66j55.a +libdev18f66j55_a_SOURCES = pic18f66j55.c +libdev18f66j55_a_CFLAGS = -p18f66j55 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f66j60.a +libdev18f66j60_a_SOURCES = pic18f66j60.c +libdev18f66j60_a_CFLAGS = -p18f66j60 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f66j65.a +libdev18f66j65_a_SOURCES = pic18f66j65.c +libdev18f66j65_a_CFLAGS = -p18f66j65 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f6720.a +libdev18f6720_a_SOURCES = pic18f6720.c +libdev18f6720_a_CFLAGS = -p18f6720 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f67j50.a +libdev18f67j50_a_SOURCES = pic18f67j50.c +libdev18f67j50_a_CFLAGS = -p18f67j50 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f67j60.a +libdev18f67j60_a_SOURCES = pic18f67j60.c +libdev18f67j60_a_CFLAGS = -p18f67j60 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f8520.a +libdev18f8520_a_SOURCES = pic18f8520.c +libdev18f8520_a_CFLAGS = -p18f8520 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f8585.a +libdev18f8585_a_SOURCES = pic18f8585.c +libdev18f8585_a_CFLAGS = -p18f8585 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f85j50.a +libdev18f85j50_a_SOURCES = pic18f85j50.c +libdev18f85j50_a_CFLAGS = -p18f85j50 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f8620.a +libdev18f8620_a_SOURCES = pic18f8620.c +libdev18f8620_a_CFLAGS = -p18f8620 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f8680.a +libdev18f8680_a_SOURCES = pic18f8680.c +libdev18f8680_a_CFLAGS = -p18f8680 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f86j50.a +libdev18f86j50_a_SOURCES = pic18f86j50.c +libdev18f86j50_a_CFLAGS = -p18f86j50 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f86j55.a +libdev18f86j55_a_SOURCES = pic18f86j55.c +libdev18f86j55_a_CFLAGS = -p18f86j55 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f86j60.a +libdev18f86j60_a_SOURCES = pic18f86j60.c +libdev18f86j60_a_CFLAGS = -p18f86j60 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f86j65.a +libdev18f86j65_a_SOURCES = pic18f86j65.c +libdev18f86j65_a_CFLAGS = -p18f86j65 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f8720.a +libdev18f8720_a_SOURCES = pic18f8720.c +libdev18f8720_a_CFLAGS = -p18f8720 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f87j50.a +libdev18f87j50_a_SOURCES = pic18f87j50.c +libdev18f87j50_a_CFLAGS = -p18f87j50 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f87j60.a +libdev18f87j60_a_SOURCES = pic18f87j60.c +libdev18f87j60_a_CFLAGS = -p18f87j60 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f96j60.a +libdev18f96j60_a_SOURCES = pic18f96j60.c +libdev18f96j60_a_CFLAGS = -p18f96j60 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f96j65.a +libdev18f96j65_a_SOURCES = pic18f96j65.c +libdev18f96j65_a_CFLAGS = -p18f96j65 $(AM_CFLAGS) + +lib_LIBRARIES += libdev18f97j60.a +libdev18f97j60_a_SOURCES = pic18f97j60.c +libdev18f97j60_a_CFLAGS = -p18f97j60 $(AM_CFLAGS) + +include $(top_srcdir)/Makefile.common + diff --git a/device/lib/pic16/libdev/Makefile.in b/device/lib/pic16/libdev/Makefile.in new file mode 100644 index 0000000..789beae --- /dev/null +++ b/device/lib/pic16/libdev/Makefile.in @@ -0,0 +1,3046 @@ +# Makefile.in generated by automake 1.10 from Makefile.am. +# @configure_input@ + +# Copyright (C) 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@prefix@ +program_transform_name = @program_transform_name@ +psdir = @psdir@ +sbindir = @sbindir@ +sharedstatedir = @sharedstatedir@ +srcdir = @srcdir@ +sysconfdir = @sysconfdir@ +target_alias = @target_alias@ +top_build_prefix = @top_build_prefix@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ +lib_LIBRARIES = libdev18f1220.a libdev18f1320.a libdev18f2220.a \ + libdev18f2221.a libdev18f2320.a libdev18f2321.a \ + libdev18f2331.a libdev18f23k20.a libdev18f2410.a \ + libdev18f242.a libdev18f2420.a libdev18f2423.a libdev18f2431.a \ + libdev18f2450.a libdev18f2455.a libdev18f248.a libdev18f2480.a \ + libdev18f24j10.a libdev18f24k20.a libdev18f2510.a \ + libdev18f2515.a libdev18f252.a libdev18f2520.a libdev18f2523.a \ + libdev18f2525.a libdev18f2550.a libdev18f258.a libdev18f2580.a \ + libdev18f2585.a libdev18f25j10.a libdev18f25k20.a \ + libdev18f2610.a libdev18f2620.a libdev18f2680.a \ + libdev18f2682.a libdev18f2685.a libdev18f26k20.a \ + libdev18f4220.a libdev18f4221.a libdev18f4320.a \ + libdev18f4321.a libdev18f4331.a libdev18f43k20.a \ + libdev18f4410.a libdev18f442.a libdev18f4420.a libdev18f4423.a \ + libdev18f4431.a libdev18f4450.a libdev18f4455.a libdev18f448.a \ + libdev18f4480.a libdev18f44j10.a libdev18f44k20.a \ + libdev18f4510.a libdev18f4515.a libdev18f452.a libdev18f4520.a \ + libdev18f4523.a libdev18f4525.a libdev18f4550.a libdev18f458.a \ + libdev18f4580.a libdev18f4585.a libdev18f45j10.a \ + libdev18f45k20.a libdev18f4610.a libdev18f4620.a \ + libdev18f4680.a libdev18f4682.a libdev18f4685.a \ + libdev18f46k20.a libdev18f6520.a libdev18f6585.a \ + libdev18f65j50.a libdev18f6620.a libdev18f6680.a \ + libdev18f66j50.a libdev18f66j55.a libdev18f66j60.a \ + libdev18f66j65.a libdev18f6720.a libdev18f67j50.a \ + libdev18f67j60.a libdev18f8520.a libdev18f8585.a \ + libdev18f85j50.a libdev18f8620.a libdev18f8680.a \ + libdev18f86j50.a libdev18f86j55.a libdev18f86j60.a \ + libdev18f86j65.a libdev18f8720.a libdev18f87j50.a \ + libdev18f87j60.a libdev18f96j60.a libdev18f96j65.a \ + libdev18f97j60.a +libdev18f1220_a_SOURCES = pic18f1220.c +libdev18f1220_a_CFLAGS = -p18f1220 $(AM_CFLAGS) +libdev18f1320_a_SOURCES = pic18f1320.c +libdev18f1320_a_CFLAGS = -p18f1320 $(AM_CFLAGS) +libdev18f2220_a_SOURCES = pic18f2220.c +libdev18f2220_a_CFLAGS = -p18f2220 $(AM_CFLAGS) +libdev18f2221_a_SOURCES = pic18f2221.c +libdev18f2221_a_CFLAGS = -p18f2221 $(AM_CFLAGS) +libdev18f2320_a_SOURCES = pic18f2320.c +libdev18f2320_a_CFLAGS = -p18f2320 $(AM_CFLAGS) +libdev18f2321_a_SOURCES = pic18f2321.c +libdev18f2321_a_CFLAGS = -p18f2321 $(AM_CFLAGS) +libdev18f2331_a_SOURCES = pic18f2331.c +libdev18f2331_a_CFLAGS = -p18f2331 $(AM_CFLAGS) +libdev18f23k20_a_SOURCES = pic18f23k20.c +libdev18f23k20_a_CFLAGS = -p18f23k20 $(AM_CFLAGS) +libdev18f2410_a_SOURCES = pic18f2410.c +libdev18f2410_a_CFLAGS = -p18f2410 $(AM_CFLAGS) +libdev18f242_a_SOURCES = pic18f242.c +libdev18f242_a_CFLAGS = -p18f242 $(AM_CFLAGS) +libdev18f2420_a_SOURCES = pic18f2420.c +libdev18f2420_a_CFLAGS = -p18f2420 $(AM_CFLAGS) +libdev18f2423_a_SOURCES = pic18f2423.c +libdev18f2423_a_CFLAGS = -p18f2423 $(AM_CFLAGS) +libdev18f2431_a_SOURCES = pic18f2431.c +libdev18f2431_a_CFLAGS = -p18f2431 $(AM_CFLAGS) +libdev18f2450_a_SOURCES = pic18f2450.c +libdev18f2450_a_CFLAGS = -p18f2450 $(AM_CFLAGS) +libdev18f2455_a_SOURCES = pic18f2455.c +libdev18f2455_a_CFLAGS = -p18f2455 $(AM_CFLAGS) +libdev18f248_a_SOURCES = pic18f248.c +libdev18f248_a_CFLAGS = -p18f248 $(AM_CFLAGS) +libdev18f2480_a_SOURCES = pic18f2480.c +libdev18f2480_a_CFLAGS = -p18f2480 $(AM_CFLAGS) +libdev18f24j10_a_SOURCES = pic18f24j10.c +libdev18f24j10_a_CFLAGS = -p18f24j10 $(AM_CFLAGS) +libdev18f24k20_a_SOURCES = pic18f24k20.c +libdev18f24k20_a_CFLAGS = -p18f24k20 $(AM_CFLAGS) +libdev18f2510_a_SOURCES = pic18f2510.c +libdev18f2510_a_CFLAGS = -p18f2510 $(AM_CFLAGS) +libdev18f2515_a_SOURCES = pic18f2515.c +libdev18f2515_a_CFLAGS = -p18f2515 $(AM_CFLAGS) +libdev18f252_a_SOURCES = pic18f252.c +libdev18f252_a_CFLAGS = -p18f252 $(AM_CFLAGS) +libdev18f2520_a_SOURCES = pic18f2520.c +libdev18f2520_a_CFLAGS = -p18f2520 $(AM_CFLAGS) +libdev18f2523_a_SOURCES = pic18f2523.c +libdev18f2523_a_CFLAGS = -p18f2523 $(AM_CFLAGS) +libdev18f2525_a_SOURCES = pic18f2525.c +libdev18f2525_a_CFLAGS = -p18f2525 $(AM_CFLAGS) +libdev18f2550_a_SOURCES = pic18f2550.c +libdev18f2550_a_CFLAGS = -p18f2550 $(AM_CFLAGS) +libdev18f258_a_SOURCES = pic18f258.c +libdev18f258_a_CFLAGS = -p18f258 $(AM_CFLAGS) +libdev18f2580_a_SOURCES = pic18f2580.c +libdev18f2580_a_CFLAGS = -p18f2580 $(AM_CFLAGS) +libdev18f2585_a_SOURCES = pic18f2585.c +libdev18f2585_a_CFLAGS = -p18f2585 $(AM_CFLAGS) +libdev18f25j10_a_SOURCES = pic18f25j10.c +libdev18f25j10_a_CFLAGS = -p18f25j10 $(AM_CFLAGS) +libdev18f25k20_a_SOURCES = pic18f25k20.c +libdev18f25k20_a_CFLAGS = -p18f25k20 $(AM_CFLAGS) +libdev18f2610_a_SOURCES = pic18f2610.c +libdev18f2610_a_CFLAGS = -p18f2610 $(AM_CFLAGS) +libdev18f2620_a_SOURCES = pic18f2620.c +libdev18f2620_a_CFLAGS = -p18f2620 $(AM_CFLAGS) +libdev18f2680_a_SOURCES = pic18f2680.c +libdev18f2680_a_CFLAGS = -p18f2680 $(AM_CFLAGS) +libdev18f2682_a_SOURCES = pic18f2682.c +libdev18f2682_a_CFLAGS = -p18f2682 $(AM_CFLAGS) +libdev18f2685_a_SOURCES = pic18f2685.c +libdev18f2685_a_CFLAGS = -p18f2685 $(AM_CFLAGS) +libdev18f26k20_a_SOURCES = pic18f26k20.c +libdev18f26k20_a_CFLAGS = -p18f26k20 $(AM_CFLAGS) +libdev18f4220_a_SOURCES = pic18f4220.c +libdev18f4220_a_CFLAGS = -p18f4220 $(AM_CFLAGS) +libdev18f4221_a_SOURCES = pic18f4221.c +libdev18f4221_a_CFLAGS = -p18f4221 $(AM_CFLAGS) +libdev18f4320_a_SOURCES = pic18f4320.c +libdev18f4320_a_CFLAGS = -p18f4320 $(AM_CFLAGS) +libdev18f4321_a_SOURCES = pic18f4321.c +libdev18f4321_a_CFLAGS = -p18f4321 $(AM_CFLAGS) +libdev18f4331_a_SOURCES = pic18f4331.c +libdev18f4331_a_CFLAGS = -p18f4331 $(AM_CFLAGS) +libdev18f43k20_a_SOURCES = pic18f43k20.c +libdev18f43k20_a_CFLAGS = -p18f43k20 $(AM_CFLAGS) +libdev18f4410_a_SOURCES = pic18f4410.c +libdev18f4410_a_CFLAGS = -p18f4410 $(AM_CFLAGS) +libdev18f442_a_SOURCES = pic18f442.c +libdev18f442_a_CFLAGS = -p18f442 $(AM_CFLAGS) +libdev18f4420_a_SOURCES = pic18f4420.c +libdev18f4420_a_CFLAGS = -p18f4420 $(AM_CFLAGS) +libdev18f4423_a_SOURCES = pic18f4423.c +libdev18f4423_a_CFLAGS = -p18f4423 $(AM_CFLAGS) +libdev18f4431_a_SOURCES = pic18f4431.c +libdev18f4431_a_CFLAGS = -p18f4431 $(AM_CFLAGS) +libdev18f4450_a_SOURCES = pic18f4450.c +libdev18f4450_a_CFLAGS = -p18f4450 $(AM_CFLAGS) +libdev18f4455_a_SOURCES = pic18f4455.c +libdev18f4455_a_CFLAGS = -p18f4455 $(AM_CFLAGS) +libdev18f448_a_SOURCES = pic18f448.c +libdev18f448_a_CFLAGS = -p18f448 $(AM_CFLAGS) +libdev18f4480_a_SOURCES = pic18f4480.c +libdev18f4480_a_CFLAGS = -p18f4480 $(AM_CFLAGS) +libdev18f44j10_a_SOURCES = pic18f44j10.c +libdev18f44j10_a_CFLAGS = -p18f44j10 $(AM_CFLAGS) +libdev18f44k20_a_SOURCES = pic18f44k20.c +libdev18f44k20_a_CFLAGS = -p18f44k20 $(AM_CFLAGS) +libdev18f4510_a_SOURCES = pic18f4510.c +libdev18f4510_a_CFLAGS = -p18f4510 $(AM_CFLAGS) +libdev18f4515_a_SOURCES = pic18f4515.c +libdev18f4515_a_CFLAGS = -p18f4515 $(AM_CFLAGS) +libdev18f452_a_SOURCES = pic18f452.c +libdev18f452_a_CFLAGS = -p18f452 $(AM_CFLAGS) +libdev18f4520_a_SOURCES = pic18f4520.c +libdev18f4520_a_CFLAGS = -p18f4520 $(AM_CFLAGS) +libdev18f4523_a_SOURCES = pic18f4523.c +libdev18f4523_a_CFLAGS = -p18f4523 $(AM_CFLAGS) +libdev18f4525_a_SOURCES = pic18f4525.c +libdev18f4525_a_CFLAGS = -p18f4525 $(AM_CFLAGS) +libdev18f4550_a_SOURCES = pic18f4550.c +libdev18f4550_a_CFLAGS = -p18f4550 $(AM_CFLAGS) +libdev18f458_a_SOURCES = pic18f458.c +libdev18f458_a_CFLAGS = -p18f458 $(AM_CFLAGS) +libdev18f4580_a_SOURCES = pic18f4580.c +libdev18f4580_a_CFLAGS = -p18f4580 $(AM_CFLAGS) +libdev18f4585_a_SOURCES = pic18f4585.c +libdev18f4585_a_CFLAGS = -p18f4585 $(AM_CFLAGS) +libdev18f45j10_a_SOURCES = pic18f45j10.c +libdev18f45j10_a_CFLAGS = -p18f45j10 $(AM_CFLAGS) +libdev18f45k20_a_SOURCES = pic18f45k20.c +libdev18f45k20_a_CFLAGS = -p18f45k20 $(AM_CFLAGS) +libdev18f4610_a_SOURCES = pic18f4610.c +libdev18f4610_a_CFLAGS = -p18f4610 $(AM_CFLAGS) +libdev18f4620_a_SOURCES = pic18f4620.c +libdev18f4620_a_CFLAGS = -p18f4620 $(AM_CFLAGS) +libdev18f4680_a_SOURCES = pic18f4680.c +libdev18f4680_a_CFLAGS = -p18f4680 $(AM_CFLAGS) +libdev18f4682_a_SOURCES = pic18f4682.c +libdev18f4682_a_CFLAGS = -p18f4682 $(AM_CFLAGS) +libdev18f4685_a_SOURCES = pic18f4685.c +libdev18f4685_a_CFLAGS = -p18f4685 $(AM_CFLAGS) +libdev18f46k20_a_SOURCES = pic18f46k20.c +libdev18f46k20_a_CFLAGS = -p18f46k20 $(AM_CFLAGS) +libdev18f6520_a_SOURCES = pic18f6520.c +libdev18f6520_a_CFLAGS = -p18f6520 $(AM_CFLAGS) +libdev18f6585_a_SOURCES = pic18f6585.c +libdev18f6585_a_CFLAGS = -p18f6585 $(AM_CFLAGS) +libdev18f65j50_a_SOURCES = pic18f65j50.c +libdev18f65j50_a_CFLAGS = -p18f65j50 $(AM_CFLAGS) +libdev18f6620_a_SOURCES = pic18f6620.c +libdev18f6620_a_CFLAGS = -p18f6620 $(AM_CFLAGS) +libdev18f6680_a_SOURCES = pic18f6680.c +libdev18f6680_a_CFLAGS = -p18f6680 $(AM_CFLAGS) +libdev18f66j50_a_SOURCES = pic18f66j50.c +libdev18f66j50_a_CFLAGS = -p18f66j50 $(AM_CFLAGS) +libdev18f66j55_a_SOURCES = pic18f66j55.c +libdev18f66j55_a_CFLAGS = -p18f66j55 $(AM_CFLAGS) +libdev18f66j60_a_SOURCES = pic18f66j60.c +libdev18f66j60_a_CFLAGS = -p18f66j60 $(AM_CFLAGS) +libdev18f66j65_a_SOURCES = pic18f66j65.c +libdev18f66j65_a_CFLAGS = -p18f66j65 $(AM_CFLAGS) +libdev18f6720_a_SOURCES = pic18f6720.c +libdev18f6720_a_CFLAGS = -p18f6720 $(AM_CFLAGS) +libdev18f67j50_a_SOURCES = pic18f67j50.c +libdev18f67j50_a_CFLAGS = -p18f67j50 $(AM_CFLAGS) +libdev18f67j60_a_SOURCES = pic18f67j60.c +libdev18f67j60_a_CFLAGS = -p18f67j60 $(AM_CFLAGS) +libdev18f8520_a_SOURCES = pic18f8520.c +libdev18f8520_a_CFLAGS = -p18f8520 $(AM_CFLAGS) +libdev18f8585_a_SOURCES = pic18f8585.c +libdev18f8585_a_CFLAGS = -p18f8585 $(AM_CFLAGS) +libdev18f85j50_a_SOURCES = pic18f85j50.c +libdev18f85j50_a_CFLAGS = -p18f85j50 $(AM_CFLAGS) +libdev18f8620_a_SOURCES = pic18f8620.c +libdev18f8620_a_CFLAGS = -p18f8620 $(AM_CFLAGS) +libdev18f8680_a_SOURCES = pic18f8680.c +libdev18f8680_a_CFLAGS = -p18f8680 $(AM_CFLAGS) +libdev18f86j50_a_SOURCES = pic18f86j50.c +libdev18f86j50_a_CFLAGS = -p18f86j50 $(AM_CFLAGS) +libdev18f86j55_a_SOURCES = pic18f86j55.c +libdev18f86j55_a_CFLAGS = -p18f86j55 $(AM_CFLAGS) +libdev18f86j60_a_SOURCES = pic18f86j60.c +libdev18f86j60_a_CFLAGS = -p18f86j60 $(AM_CFLAGS) +libdev18f86j65_a_SOURCES = pic18f86j65.c +libdev18f86j65_a_CFLAGS = -p18f86j65 $(AM_CFLAGS) +libdev18f8720_a_SOURCES = pic18f8720.c +libdev18f8720_a_CFLAGS = -p18f8720 $(AM_CFLAGS) +libdev18f87j50_a_SOURCES = pic18f87j50.c +libdev18f87j50_a_CFLAGS = -p18f87j50 $(AM_CFLAGS) +libdev18f87j60_a_SOURCES = pic18f87j60.c +libdev18f87j60_a_CFLAGS = -p18f87j60 $(AM_CFLAGS) +libdev18f96j60_a_SOURCES = pic18f96j60.c +libdev18f96j60_a_CFLAGS = -p18f96j60 $(AM_CFLAGS) +libdev18f96j65_a_SOURCES = pic18f96j65.c +libdev18f96j65_a_CFLAGS = -p18f96j65 $(AM_CFLAGS) +libdev18f97j60_a_SOURCES = pic18f97j60.c +libdev18f97j60_a_CFLAGS = -p18f97j60 $(AM_CFLAGS) +#AM_CFLAGS += --no-optimize-goto + +#AM_CFLAGS += --debug-ralloc +#AM_CFLAGS += --debug-xtra +#AM_CFLAGS += --pcode-verbose + +#AM_CFLAGS += --nooverlay +#AM_CFLAGS += --nogcse +#AM_CFLAGS += --nolabelopt +#AM_CFLAGS += --noinvariant +#AM_CFLAGS += --noinduction +#AM_CFLAGS += --nojtbound +#AM_CFLAGS += --noloopreverse +AM_CFLAGS = --std-c99 --asm="$(CCAS)" -I. \ + -I$(top_srcdir)/../../include/pic16 --fommit-frame-pointer \ + --obanksel=9 --denable-peeps --optimize-cmp --optimize-df \ + --i-code-in-asm @USE_FLOATS@ +AM_CCASFLAGS = -I$(top_srcdir)/../../include/pic16 -I$(srcdir) +all: all-am + +.SUFFIXES: +.SUFFIXES: .c .o .obj +$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(top_srcdir)/Makefile.common $(am__configure_deps) + @for dep in $?; do \ + case '$(am__configure_deps)' in \ + *$$dep*) \ + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh \ + && exit 0; \ + exit 1;; \ + esac; \ + done; \ + echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign libdev/Makefile'; \ + cd $(top_srcdir) && \ + $(AUTOMAKE) --foreign libdev/Makefile +.PRECIOUS: Makefile +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + @case '$?' in \ + *config.status*) \ + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ + *) \ + echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ + cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ + esac; + +$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh + +$(top_srcdir)/configure: $(am__configure_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(ACLOCAL_M4): $(am__aclocal_m4_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +install-libLIBRARIES: $(lib_LIBRARIES) + @$(NORMAL_INSTALL) + test -z "$(libdir)" || $(MKDIR_P) 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limit (for SysV at least) may be exceeded. +.NOEXPORT: diff --git a/device/lib/pic16/libdev/mkmk.sh b/device/lib/pic16/libdev/mkmk.sh new file mode 100755 index 0000000..403065e --- /dev/null +++ b/device/lib/pic16/libdev/mkmk.sh @@ -0,0 +1,33 @@ +#!/bin/sh + +# +# Script to generate Makefile.am, +# execute in device/lib/pic16/libdev/ with no arguments. +# +# Written by Raphael Neider +# +# Released under the terms of the GPL v2. +# + +cat < + * + * $Id: pic18f1220.c 5352 2009-02-01 16:40:52Z tecodev $ + * + */ + +#include + +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfaa) BAUDCTL; +__sfr __at (0xfab) RCSTA; +volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; +__sfr __at (0xfb0) SPBRGH; +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfb6) ECCPAS; +volatile __ECCPASbits_t __at (0xfb6) ECCPASbits; + +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc0) ADCON2; +volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc9) SSPBUF; /* unimplemented */ +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f1320.c b/device/lib/pic16/libdev/pic18f1320.c new file mode 100644 index 0000000..491f9bf --- /dev/null +++ b/device/lib/pic16/libdev/pic18f1320.c @@ -0,0 +1,18 @@ +/* + * pic18f1320.c - PIC18F1320 Device Library Sources + * + * This file is part of the GNU PIC Library. + * + * May, 2005 + * The GNU PIC Library is maintained by + * Raphael Neider + * + * originally designed by + * Vangelis Rokas + * + * $Id: pic18f1320.c 4148 2006-05-01 20:47:12Z tecodev $ + * + */ + +#include "pic18f1220.c" /* just line, but with 8KB code */ + diff --git a/device/lib/pic16/libdev/pic18f2220.c b/device/lib/pic16/libdev/pic18f2220.c new file mode 100644 index 0000000..fa8cc72 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2220.c @@ -0,0 +1,201 @@ + +/* + * pic18f2220.c - PIC18F2220 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f2220.c 3835 2005-08-07 20:09:11Z tecodev $ + * + */ + +#include + +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf9b) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xf9b) OSCTUNEbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfab) RCSTA; +volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfb4) CMCON; +volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +__sfr __at (0xfb5) CVRCON; +volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfbb) CCPR2L; +__sfr __at (0xfbc) CCPR2H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc0) ADCON2; +volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f2221.c b/device/lib/pic16/libdev/pic18f2221.c new file mode 100644 index 0000000..0822a1c --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2221.c @@ -0,0 +1,288 @@ +/* + * pic18f2221.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFA8) EEDATA; + +__sfr __at (0xFA9) EEADR; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB1) T3CON; +volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +__sfr __at (0xFB2) TMR3L; + +__sfr __at (0xFB3) TMR3H; + +__sfr __at (0xFB4) CMCON; +volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +__sfr __at (0xFB7) PWM1CON; +volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFB8) BAUDCTL; +volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBB) CCPR2; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) HLVDCON; +volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +__sfr __at (0xFD2) LVDCON; +volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f2320.c b/device/lib/pic16/libdev/pic18f2320.c new file mode 100644 index 0000000..aade1c6 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2320.c @@ -0,0 +1,15 @@ +/* + * pic18f2320.c - PIC18F2320 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f2320.c 4914 2007-09-16 18:24:27Z tecodev $ + * + */ + +#include "pic18f2220.c" + diff --git a/device/lib/pic16/libdev/pic18f2321.c b/device/lib/pic16/libdev/pic18f2321.c new file mode 100644 index 0000000..6b7000e --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2321.c @@ -0,0 +1,288 @@ +/* + * pic18f2321.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFA8) EEDATA; + +__sfr __at (0xFA9) EEADR; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB1) T3CON; +volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +__sfr __at (0xFB2) TMR3L; + +__sfr __at (0xFB3) TMR3H; + +__sfr __at (0xFB4) CMCON; +volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +__sfr __at (0xFB7) PWM1CON; +volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFB8) BAUDCTL; +volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBB) CCPR2; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) HLVDCON; +volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +__sfr __at (0xFD2) LVDCON; +volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f2331.c b/device/lib/pic16/libdev/pic18f2331.c new file mode 100644 index 0000000..d384b24 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2331.c @@ -0,0 +1,6 @@ +/* + * pic18f2331.c - device specific definitions + */ + +#include "pic18f4331.c" + diff --git a/device/lib/pic16/libdev/pic18f23k20.c b/device/lib/pic16/libdev/pic18f23k20.c new file mode 100644 index 0000000..619a86b --- /dev/null +++ b/device/lib/pic16/libdev/pic18f23k20.c @@ -0,0 +1,6 @@ +/* + * pic18f23k20.c - device specific definitions + */ + +#include "pic18f46k20.c" + diff --git a/device/lib/pic16/libdev/pic18f2410.c b/device/lib/pic16/libdev/pic18f2410.c new file mode 100644 index 0000000..6af251c --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2410.c @@ -0,0 +1,6 @@ +/* + * pic18f2410.c - device specific definitions + */ + +#include "pic18f4610.c" + diff --git a/device/lib/pic16/libdev/pic18f242.c b/device/lib/pic16/libdev/pic18f242.c new file mode 100644 index 0000000..c4a7d00 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f242.c @@ -0,0 +1,189 @@ + +/* + * pic18f242.c - PIC18F242 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f242.c 3765 2005-05-18 20:32:06Z tecodev $ + * + */ + +#include + +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfab) RCSTA; +volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfbb) CCPR2L; +__sfr __at (0xfbc) CCPR2H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f2420.c b/device/lib/pic16/libdev/pic18f2420.c new file mode 100644 index 0000000..20528d3 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2420.c @@ -0,0 +1,11 @@ +/* + * pic18f2420.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * (c) 2007 by Raphael Neider + */ + +#include "pic18f4520.c" + diff --git a/device/lib/pic16/libdev/pic18f2423.c b/device/lib/pic16/libdev/pic18f2423.c new file mode 100644 index 0000000..393becd --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2423.c @@ -0,0 +1,6 @@ +/* + * pic18f2423.c - device specific definitions + */ + +#include "pic18f4523.c" + diff --git a/device/lib/pic16/libdev/pic18f2431.c b/device/lib/pic16/libdev/pic18f2431.c new file mode 100644 index 0000000..25795d2 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2431.c @@ -0,0 +1,6 @@ +/* + * pic18f2431.c - device specific definitions + */ + +#include "pic18f4331.c" + diff --git a/device/lib/pic16/libdev/pic18f2450.c b/device/lib/pic16/libdev/pic18f2450.c new file mode 100644 index 0000000..a003748 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2450.c @@ -0,0 +1,6 @@ +/* + * pic18f2450.c - device specific definitions + */ + +#include "pic18f4450.c" + diff --git a/device/lib/pic16/libdev/pic18f2455.c b/device/lib/pic16/libdev/pic18f2455.c new file mode 100644 index 0000000..e25bca0 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2455.c @@ -0,0 +1,385 @@ +/* + * pic18f2455.h - PIC18F2455 Device Library Sources + * + * This file is part of the GNU PIC Library. + * + * May, 2005 + * The GNU PIC Library is maintained by + * Raphael Neider + * + * originally designed by + * Vangelis Rokas + * + * $Id: pic18f2455.c 4573 2007-01-14 23:40:09Z tecodev $ + * + */ + +#include + +__sfr __at (0xF62) SPPDATA; +volatile __SPPDATA_t __at (0xF62) SPPDATAbits; + +__sfr __at (0xF63) SPPCFG; +volatile __SPPCFG_t __at (0xF63) SPPCFGbits; + +__sfr __at (0xF64) SPPEPS; +volatile __SPPEPS_t __at (0xF64) SPPEPSbits; + +__sfr __at (0xF65) SPPCON; +volatile __SPPCON_t __at (0xF65) SPPCONbits; + +__sfr __at (0xF66) UFRML; +volatile __UFRML_t __at (0xF66) UFRMLbits; + +__sfr __at (0xF67) UFRMH; +volatile __UFRMH_t __at (0xF67) UFRMHbits; + +__sfr __at (0xF68) UIR; +volatile __UIR_t __at (0xF68) UIRbits; + +__sfr __at (0xF69) UIE; +volatile __UIE_t __at (0xF69) UIEbits; + +__sfr __at (0xF6A) UEIR; +volatile __UEIR_t __at (0xF6A) UEIRbits; + +__sfr __at (0xF6B) UEIE; +volatile __UEIE_t __at (0xF6B) UEIEbits; + +__sfr __at (0xF6C) USTAT; +volatile __USTAT_t __at (0xF6C) USTATbits; + +__sfr __at (0xF6D) UCON; +volatile __UCON_t __at (0xF6D) UCONbits; + +__sfr __at (0xF6E) UADDR; +volatile __UADDR_t __at (0xF6E) UADDRbits; + +__sfr __at (0xF6F) UCFG; +volatile __UCFG_t __at (0xF6F) UCFGbits; + +__sfr __at (0xF70) UEP0; +volatile __UEP0_t __at (0xF70) UEP0bits; + +__sfr __at (0xF71) UEP1; +volatile __UEP1_t __at (0xF71) UEP1bits; + +__sfr __at (0xF72) UEP2; +volatile __UEP2_t __at (0xF72) UEP2bits; + +__sfr __at (0xF73) UEP3; +volatile __UEP3_t __at (0xF73) UEP3bits; + +__sfr __at (0xF74) UEP4; +volatile __UEP4_t __at (0xF74) UEP4bits; + +__sfr __at (0xF75) UEP5; +volatile __UEP5_t __at (0xF75) UEP5bits; + +__sfr __at (0xF76) UEP6; +volatile __UEP6_t __at (0xF76) UEP6bits; + +__sfr __at (0xF77) UEP7; +volatile __UEP7_t __at (0xF77) UEP7bits; + +__sfr __at (0xF78) UEP8; +volatile __UEP8_t __at (0xF78) UEP8bits; + +__sfr __at (0xF79) UEP9; +volatile __UEP9_t __at (0xF79) UEP9bits; + +__sfr __at (0xF7A) UEP10; +volatile __UEP10_t __at (0xF7A) UEP10bits; + +__sfr __at (0xF7B) UEP11; +volatile __UEP11_t __at (0xF7B) UEP11bits; + +__sfr __at (0xF7C) UEP12; +volatile __UEP12_t __at (0xF7C) UEP12bits; + +__sfr __at (0xF7D) UEP13; +volatile __UEP13_t __at (0xF7D) UEP13bits; + +__sfr __at (0xF7E) UEP14; +volatile __UEP14_t __at (0xF7E) UEP14bits; + +__sfr __at (0xF7F) UEP15; +volatile __UEP15_t __at (0xF7F) UEP15bits; + +__sfr __at (0xF80) PORTA; +volatile __PORTA_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTB_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTC_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTD_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTE_t __at (0xF84) PORTEbits; + +__sfr __at (0xF89) LATA; +volatile __LATA_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATB_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATC_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATD_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATE_t __at (0xF8D) LATEbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISA_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISB_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISC_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISD_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISE_t __at (0xF96) TRISEbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNE_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFA8) EEDATA; + +__sfr __at (0xFA9) EEADR; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTA_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTA_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB1) T3CON; +volatile __T3CON_t __at (0xFB1) T3CONbits; + +__sfr __at (0xFB2) TMR3L; + +__sfr __at (0xFB3) TMR3H; + +__sfr __at (0xFB4) CMCON; +volatile __CMCON_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCON_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1AS_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) ECCP1DEL; +volatile __ECCP1DEL_t __at (0xFB7) ECCP1DELbits; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCON_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CON_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CON_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTAT_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CON_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CON_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCON_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCON_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) HLVDCON; +volatile __HLVDCON_t __at (0xFD2) HLVDCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCON_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CON_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUS_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; +volatile __FSR2H_t __at (0xFDA) FSR2Hbits; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; +volatile __BSR_t __at (0xFE0) BSRbits; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; +volatile __FSR1H_t __at (0xFE2) FSR1Hbits; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; +volatile __FSR0H_t __at (0xFEA) FSR0Hbits; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCON_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; +volatile __TBLPTRU_t __at (0xFF8) TBLPTRUbits; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; +volatile __PCLATH_t __at (0xFFA) PCLATHbits; + +__sfr __at (0xFFB) PCLATU; +volatile __PCLATU_t __at (0xFFB) PCLATUbits; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTR_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; +volatile __TOSU_t __at (0xFFF) TOSUbits; + diff --git a/device/lib/pic16/libdev/pic18f248.c b/device/lib/pic16/libdev/pic18f248.c new file mode 100644 index 0000000..cff023e --- /dev/null +++ b/device/lib/pic16/libdev/pic18f248.c @@ -0,0 +1,522 @@ + +/* + * pic18f248.c - PIC18F248 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f248.c 4906 2007-09-03 09:17:13Z tecodev $ + * + */ + +#include + +__sfr __at (0xf00) RXF0SIDH; +volatile __RXF0SIDHbits_t __at (0xf00) RXF0SIDHbits; + +__sfr __at (0xf01) RXF0SIDL; +volatile __RXF0SIDLbits_t __at (0xf01) RXF0SIDLbits; + +__sfr __at (0xf02) RXF0EIDH; +volatile __RXF0EIDHbits_t __at (0xf02) RXF0EIDHbits; + +__sfr __at (0xf03) RXF0EIDL; +volatile __RXF0EIDLbits_t __at (0xf03) RXF0EIDLbits; + +__sfr __at (0xf04) RXF1SIDH; +volatile __RXF1SIDHbits_t __at (0xf04) RXF1SIDHbits; + +__sfr __at (0xf05) RXF1SIDL; +volatile __RXF1SIDLbits_t __at (0xf05) RXF1SIDLbits; + +__sfr __at (0xf06) RXF1EIDH; +volatile __RXF1EIDHbits_t __at (0xf06) RXF1EIDHbits; + +__sfr __at (0xf07) RXF1EIDL; +volatile __RXF1EIDLbits_t __at (0xf07) RXF1EIDLbits; + +__sfr __at (0xf08) RXF2SIDH; +volatile __RXF2SIDHbits_t __at (0xf08) RXF2SIDHbits; + +__sfr __at (0xf09) RXF2SIDL; +volatile __RXF2SIDLbits_t __at (0xf09) RXF2SIDLbits; + +__sfr __at (0xf0a) RXF2EIDH; +volatile __RXF2EIDHbits_t __at (0xf0a) RXF2EIDHbits; + +__sfr __at (0xf0b) RXF2EIDL; +volatile __RXF2EIDLbits_t __at (0xf0b) RXF2EIDLbits; + +__sfr __at (0xf0c) RXF3SIDH; +volatile __RXF3SIDHbits_t __at (0xf0c) RXF3SIDHbits; + +__sfr __at (0xf0d) RXF3SIDL; +volatile __RXF3SIDLbits_t __at (0xf0d) RXF3SIDLbits; + +__sfr __at (0xf0e) RXF3EIDH; +volatile __RXF3EIDHbits_t __at (0xf0e) RXF3EIDHbits; + +__sfr __at (0xf0f) RXF3EIDL; +volatile __RXF3EIDLbits_t __at (0xf0f) RXF3EIDLbits; + +__sfr __at (0xf10) RXF4SIDH; +volatile __RXF4SIDHbits_t __at (0xf10) RXF4SIDHbits; + +__sfr __at (0xf11) RXF4SIDL; +volatile __RXF4SIDLbits_t __at (0xf11) RXF4SIDLbits; + +__sfr __at (0xf12) RXF4EIDH; +volatile __RXF4EIDHbits_t __at (0xf12) RXF4EIDHbits; + +__sfr __at (0xf13) RXF4EIDL; +volatile __RXF4EIDLbits_t __at (0xf13) RXF4EIDLbits; + +__sfr __at (0xf14) RXF5SIDH; +volatile __RXF5SIDHbits_t __at (0xf14) RXF5SIDHbits; + +__sfr __at (0xf15) RXF5SIDL; +volatile __RXF5SIDLbits_t __at (0xf15) RXF5SIDLbits; + +__sfr __at (0xf16) RXF5EIDH; +volatile __RXF5EIDHbits_t __at (0xf16) RXF5EIDHbits; + +__sfr __at (0xf17) RXF5EIDL; +volatile __RXF5EIDLbits_t __at (0xf17) RXF5EIDLbits; + +__sfr __at (0xf18) RXM0SIDH; +volatile __RXM0SIDHbits_t __at (0xf18) RXM0SIDHbits; + +__sfr __at (0xf19) RXM0SIDL; +volatile __RXM0SIDLbits_t __at (0xf19) RXM0SIDLbits; + +__sfr __at (0xf1a) RXM0EIDH; +volatile __RXM0EIDHbits_t __at (0xf1a) RXM0EIDHbits; + +__sfr __at (0xf1b) RXM0EIDL; +volatile __RXM0EIDLbits_t __at (0xf1b) RXM0EIDLbits; + +__sfr __at (0xf1c) RXM1SIDH; +volatile __RXM1SIDHbits_t __at (0xf1c) RXM1SIDHbits; + +__sfr __at (0xf1d) RXM1SIDL; +volatile __RXM1SIDLbits_t __at (0xf1d) RXM1SIDLbits; + +__sfr __at (0xf1e) RXM1EIDH; +volatile __RXM1EIDHbits_t __at (0xf1e) RXM1EIDHbits; + +__sfr __at (0xf1f) RXM1EIDL; +volatile __RXM1EIDLbits_t __at (0xf1f) RXM1EIDLbits; + +__sfr __at (0xf20) TXB2CON; +volatile __TXB2CONbits_t __at (0xf20) TXB2CONbits; + +__sfr __at (0xf21) TXB2SIDH; +volatile __TXB2SIDHbits_t __at (0xf21) TXB2SIDHbits; + +__sfr __at (0xf22) TXB2SIDL; +volatile __TXB2SIDLbits_t __at (0xf22) TXB2SIDLbits; + +__sfr __at (0xf23) TXB2EIDH; +volatile __TXB2EIDHbits_t __at (0xf23) TXB2EIDHbits; + +__sfr __at (0xf24) TXB2EIDL; +volatile __TXB2EIDLbits_t __at (0xf24) TXB2EIDLbits; + +__sfr __at (0xf25) TXB2DLC; +volatile __TXB2DLCbits_t __at (0xf25) TXB2DLCbits; + +__sfr __at (0xf26) TXB2D0; +volatile __TXB2D0bits_t __at (0xf26) TXB2D0bits; + +__sfr __at (0xf27) TXB2D1; +volatile __TXB2D1bits_t __at (0xf27) TXB2D1bits; + +__sfr __at (0xf28) TXB2D2; +volatile __TXB2D2bits_t __at (0xf28) TXB2D2bits; + +__sfr __at (0xf29) TXB2D3; +volatile __TXB2D3bits_t __at (0xf29) TXB2D3bits; + +__sfr __at (0xf2a) TXB2D4; +volatile __TXB2D4bits_t __at (0xf2a) TXB2D4bits; + +__sfr __at (0xf2b) TXB2D5; +volatile __TXB2D5bits_t __at (0xf2b) TXB2D5bits; + +__sfr __at (0xf2c) TXB2D6; +volatile __TXB2D6bits_t __at (0xf2c) TXB2D6bits; + +__sfr __at (0xf2d) TXB2D7; +volatile __TXB2D7bits_t __at (0xf2d) TXB2D7bits; + +__sfr __at (0xf2e) CANSTATRO4; +volatile __CANSTATRO4bits_t __at (0xf2e) CANSTATRO4bits; + +__sfr __at (0xf30) TXB1CON; +volatile __TXB1CONbits_t __at (0xf30) TXB1CONbits; + +__sfr __at (0xf31) TXB1SIDH; +volatile __TXB1SIDHbits_t __at (0xf31) TXB1SIDHbits; + +__sfr __at (0xf32) TXB1SIDL; +volatile __TXB1SIDLbits_t __at (0xf32) TXB1SIDLbits; + +__sfr __at (0xf33) TXB1EIDH; +volatile __TXB1EIDHbits_t __at (0xf33) TXB1EIDHbits; + +__sfr __at (0xf34) TXB1EIDL; +volatile __TXB1EIDLbits_t __at (0xf34) TXB1EIDLbits; + +__sfr __at (0xf35) TXB1DLC; +volatile __TXB1DLCbits_t __at (0xf35) TXB1DLCbits; + +__sfr __at (0xf36) TXB1D0; +volatile __TXB1D0bits_t __at (0xf36) TXB1D0bits; + +__sfr __at (0xf37) TXB1D1; +volatile __TXB1D1bits_t __at (0xf37) TXB1D1bits; + +__sfr __at (0xf38) TXB1D2; +volatile __TXB1D2bits_t __at (0xf38) TXB1D2bits; + +__sfr __at (0xf39) TXB1D3; +volatile __TXB1D3bits_t __at (0xf39) TXB1D3bits; + +__sfr __at (0xf3a) TXB1D4; +volatile __TXB1D4bits_t __at (0xf3a) TXB1D4bits; + +__sfr __at (0xf3b) TXB1D5; +volatile __TXB1D5bits_t __at (0xf3b) TXB1D5bits; + +__sfr __at (0xf3c) TXB1D6; +volatile __TXB1D6bits_t __at (0xf3c) TXB1D6bits; + +__sfr __at (0xf3d) TXB1D7; +volatile __TXB1D7bits_t __at (0xf3d) TXB1D7bits; + +__sfr __at (0xf3e) CANSTATRO3; +volatile __CANSTATRO3bits_t __at (0xf3e) CANSTATRO3bits; + +__sfr __at (0xf40) TXB0CON; +volatile __TXB0CONbits_t __at (0xf40) TXB0CONbits; + +__sfr __at (0xf41) TXB0SIDH; +volatile __TXB0SIDHbits_t __at (0xf41) TXB0SIDHbits; + +__sfr __at (0xf42) TXB0SIDL; +volatile __TXB0SIDLbits_t __at (0xf42) TXB0SIDLbits; + +__sfr __at (0xf43) TXB0EIDH; +volatile __TXB0EIDHbits_t __at (0xf43) TXB0EIDHbits; + +__sfr __at (0xf44) TXB0EIDL; +volatile __TXB0EIDLbits_t __at (0xf44) TXB0EIDLbits; + +__sfr __at (0xf45) TXB0DLC; +volatile __TXB0DLCbits_t __at (0xf45) TXB0DLCbits; + +__sfr __at (0xf46) TXB0D0; +volatile __TXB0D0bits_t __at (0xf46) TXB0D0bits; + +__sfr __at (0xf47) TXB0D1; +volatile __TXB0D1bits_t __at (0xf47) TXB0D1bits; + +__sfr __at (0xf48) TXB0D2; +volatile __TXB0D2bits_t __at (0xf48) TXB0D2bits; + +__sfr __at (0xf49) TXB0D3; +volatile __TXB0D3bits_t __at (0xf49) TXB0D3bits; + +__sfr __at (0xf4a) TXB0D4; +volatile __TXB0D4bits_t __at (0xf4a) TXB0D4bits; + +__sfr __at (0xf4b) TXB0D5; +volatile __TXB0D5bits_t __at (0xf4b) TXB0D5bits; + +__sfr __at (0xf4c) TXB0D6; +volatile __TXB0D6bits_t __at (0xf4c) TXB0D6bits; + +__sfr __at (0xf4d) TXB0D7; +volatile __TXB0D7bits_t __at (0xf4d) TXB0D7bits; + +__sfr __at (0xf4e) CANSTATRO2; +volatile __CANSTATRO2bits_t __at (0xf4e) CANSTATRO2bits; + +__sfr __at (0xf50) RXB1CON; +volatile __RXB1CONbits_t __at (0xf50) RXB1CONbits; + +__sfr __at (0xf51) RXB1SIDH; +volatile __RXB1SIDHbits_t __at (0xf51) RXB1SIDHbits; + +__sfr __at (0xf52) RXB1SIDL; +volatile __RXB1SIDLbits_t __at (0xf52) RXB1SIDLbits; + +__sfr __at (0xf53) RXB1EIDH; +volatile __RXB1EIDHbits_t __at (0xf53) RXB1EIDHbits; + +__sfr __at (0xf54) RXB1EIDL; +volatile __RXB1EIDLbits_t __at (0xf54) RXB1EIDLbits; + +__sfr __at (0xf55) RXB1DLC; +volatile __RXB1DLCbits_t __at (0xf55) RXB1DLCbits; + +__sfr __at (0xf56) RXB1D0; +volatile __RXB1D0bits_t __at (0xf56) RXB1D0bits; + +__sfr __at (0xf57) RXB1D1; +volatile __RXB1D1bits_t __at (0xf57) RXB1D1bits; + +__sfr __at (0xf58) RXB1D2; +volatile __RXB1D2bits_t __at (0xf58) RXB1D2bits; + +__sfr __at (0xf59) RXB1D3; +volatile __RXB1D3bits_t __at (0xf59) RXB1D3bits; + +__sfr __at (0xf5a) RXB1D4; +volatile __RXB1D4bits_t __at (0xf5a) RXB1D4bits; + +__sfr __at (0xf5b) RXB1D5; +volatile __RXB1D5bits_t __at (0xf5b) RXB1D5bits; + +__sfr __at (0xf5c) RXB1D6; +volatile __RXB1D6bits_t __at (0xf5c) RXB1D6bits; + +__sfr __at (0xf5d) RXB1D7; +volatile __RXB1D7bits_t __at (0xf5d) RXB1D7bits; + +__sfr __at (0xf5e) CANSTATRO1; +volatile __CANSTATRO1bits_t __at (0xf5e) CANSTATRO1bits; + +__sfr __at (0xf60) RXB0CON; +volatile __RXB0CONbits_t __at (0xf60) RXB0CONbits; + +__sfr __at (0xf61) RXB0SIDH; +volatile __RXB0SIDHbits_t __at (0xf61) RXB0SIDHbits; + +__sfr __at (0xf62) RXB0SIDL; +volatile __RXB0SIDLbits_t __at (0xf62) RXB0SIDLbits; + +__sfr __at (0xf63) RXB0EIDH; +volatile __RXB0EIDHbits_t __at (0xf63) RXB0EIDHbits; + +__sfr __at (0xf64) RXB0EIDL; +volatile __RXB0EIDLbits_t __at (0xf64) RXB0EIDLbits; + +__sfr __at (0xf65) RXB0DLC; +volatile __RXB0DLCbits_t __at (0xf65) RXB0DLCbits; + +__sfr __at (0xf66) RXB0D0; +__sfr __at (0xf67) RXB0D1; +__sfr __at (0xf68) RXB0D2; +__sfr __at (0xf69) RXB0D3; +__sfr __at (0xf6a) RXB0D4; +__sfr __at (0xf6b) RXB0D5; +__sfr __at (0xf6c) RXB0D6; +__sfr __at (0xf6d) RXB0D7; +__sfr __at (0xf6e) CANSTAT; +volatile __CANSTATbits_t __at (0xf6e) CANSTATbits; + +__sfr __at (0xf6f) CANCON; +volatile __CANCONbits_t __at (0xf6f) CANCONbits; + +__sfr __at (0xf70) BRGCON1; +volatile __BRGCON1bits_t __at (0xf70) BRGCON1bits; + +__sfr __at (0xf71) BRGCON2; +volatile __BRGCON2bits_t __at (0xf71) BRGCON2bits; + +__sfr __at (0xf72) BRGCON3; +volatile __BRGCON3bits_t __at (0xf72) BRGCON3bits; + +__sfr __at (0xf73) CIOCON; +volatile __CIOCONbits_t __at (0xf73) CIOCONbits; + +__sfr __at (0xf74) COMSTAT; +volatile __COMSTATbits_t __at (0xf74) COMSTATbits; + +__sfr __at (0xf75) RXERRCNT; +volatile __RXERRCNTbits_t __at (0xf75) RXERRCNTbits; + +__sfr __at (0xf76) TXERRCNT; +volatile __TXERRCNTbits_t __at (0xf76) TXERRCNTbits; + +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa3) PIE3; +volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +__sfr __at (0xfa4) PIR3; +volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +__sfr __at (0xfa5) IPR3; +volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfab) RCSTA; +volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f2480.c b/device/lib/pic16/libdev/pic18f2480.c new file mode 100644 index 0000000..8be9f5d --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2480.c @@ -0,0 +1,6 @@ +/* + * pic18f2480.c - device specific definitions + */ + +#include "pic18f4580.c" + diff --git a/device/lib/pic16/libdev/pic18f24j10.c b/device/lib/pic16/libdev/pic18f24j10.c new file mode 100644 index 0000000..4c30431 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f24j10.c @@ -0,0 +1,314 @@ +/* + * pic18f24j10.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA3) PIE3; +volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +__sfr __at (0xFA4) PIR3; +volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +__sfr __at (0xFA5) IPR3; +volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAB) RCSTA1; +volatile __RCSTA1bits_t __at (0xFAB) RCSTA1bits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAC) TXSTA1; +volatile __TXSTA1bits_t __at (0xFAC) TXSTA1bits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAD) TXREG1; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAE) RCREG1; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFAF) SPBRG1; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB4) CMCON; +volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +__sfr __at (0xFB7) PWM1CON; +volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFB8) BAUDCTL; +volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBB) CCPR2; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSP1CON2; +volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSP1CON1; +volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSP1STAT; +volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSP1ADD; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSP1BUF; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f24k20.c b/device/lib/pic16/libdev/pic18f24k20.c new file mode 100644 index 0000000..39ca38a --- /dev/null +++ b/device/lib/pic16/libdev/pic18f24k20.c @@ -0,0 +1,6 @@ +/* + * pic18f24k20.c - device specific definitions + */ + +#include "pic18f46k20.c" + diff --git a/device/lib/pic16/libdev/pic18f2510.c b/device/lib/pic16/libdev/pic18f2510.c new file mode 100644 index 0000000..33add9b --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2510.c @@ -0,0 +1,6 @@ +/* + * pic18f2510.c - device specific definitions + */ + +#include "pic18f4610.c" + diff --git a/device/lib/pic16/libdev/pic18f2515.c b/device/lib/pic16/libdev/pic18f2515.c new file mode 100644 index 0000000..c53c594 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2515.c @@ -0,0 +1,6 @@ +/* + * pic18f2515.c - device specific definitions + */ + +#include "pic18f4610.c" + diff --git a/device/lib/pic16/libdev/pic18f252.c b/device/lib/pic16/libdev/pic18f252.c new file mode 100644 index 0000000..f3ebd7b --- /dev/null +++ b/device/lib/pic16/libdev/pic18f252.c @@ -0,0 +1,189 @@ + +/* + * pic18f252.c - PIC18F252 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f252.c 3765 2005-05-18 20:32:06Z tecodev $ + * + */ + +#include + +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfab) RCSTA; +volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfbb) CCPR2L; +__sfr __at (0xfbc) CCPR2H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f2520.c b/device/lib/pic16/libdev/pic18f2520.c new file mode 100644 index 0000000..81fbff9 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2520.c @@ -0,0 +1,11 @@ +/* + * pic18f2520.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * (c) 2007 by Raphael Neider + */ + +#include "pic18f4520.c" + diff --git a/device/lib/pic16/libdev/pic18f2523.c b/device/lib/pic16/libdev/pic18f2523.c new file mode 100644 index 0000000..4faca70 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2523.c @@ -0,0 +1,6 @@ +/* + * pic18f2523.c - device specific definitions + */ + +#include "pic18f4523.c" + diff --git a/device/lib/pic16/libdev/pic18f2525.c b/device/lib/pic16/libdev/pic18f2525.c new file mode 100644 index 0000000..35a02ce --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2525.c @@ -0,0 +1,6 @@ +/* + * pic18f2525.c - Device Library Sources + */ + +#include "pic18f4620.c" + diff --git a/device/lib/pic16/libdev/pic18f2550.c b/device/lib/pic16/libdev/pic18f2550.c new file mode 100644 index 0000000..713d849 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2550.c @@ -0,0 +1,6 @@ +/* + * pic18f2550.h - PIC18F2550 Device Library Sources + */ + +#include "pic18f2455.c" + diff --git a/device/lib/pic16/libdev/pic18f258.c b/device/lib/pic16/libdev/pic18f258.c new file mode 100644 index 0000000..be16838 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f258.c @@ -0,0 +1,522 @@ + +/* + * pic18f258.c - PIC18F258 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f258.c 4906 2007-09-03 09:17:13Z tecodev $ + * + */ + +#include + +__sfr __at (0xf00) RXF0SIDH; +volatile __RXF0SIDHbits_t __at (0xf00) RXF0SIDHbits; + +__sfr __at (0xf01) RXF0SIDL; +volatile __RXF0SIDLbits_t __at (0xf01) RXF0SIDLbits; + +__sfr __at (0xf02) RXF0EIDH; +volatile __RXF0EIDHbits_t __at (0xf02) RXF0EIDHbits; + +__sfr __at (0xf03) RXF0EIDL; +volatile __RXF0EIDLbits_t __at (0xf03) RXF0EIDLbits; + +__sfr __at (0xf04) RXF1SIDH; +volatile __RXF1SIDHbits_t __at (0xf04) RXF1SIDHbits; + +__sfr __at (0xf05) RXF1SIDL; +volatile __RXF1SIDLbits_t __at (0xf05) RXF1SIDLbits; + +__sfr __at (0xf06) RXF1EIDH; +volatile __RXF1EIDHbits_t __at (0xf06) RXF1EIDHbits; + +__sfr __at (0xf07) RXF1EIDL; +volatile __RXF1EIDLbits_t __at (0xf07) RXF1EIDLbits; + +__sfr __at (0xf08) RXF2SIDH; +volatile __RXF2SIDHbits_t __at (0xf08) RXF2SIDHbits; + +__sfr __at (0xf09) RXF2SIDL; +volatile __RXF2SIDLbits_t __at (0xf09) RXF2SIDLbits; + +__sfr __at (0xf0a) RXF2EIDH; +volatile __RXF2EIDHbits_t __at (0xf0a) RXF2EIDHbits; + +__sfr __at (0xf0b) RXF2EIDL; +volatile __RXF2EIDLbits_t __at (0xf0b) RXF2EIDLbits; + +__sfr __at (0xf0c) RXF3SIDH; +volatile __RXF3SIDHbits_t __at (0xf0c) RXF3SIDHbits; + +__sfr __at (0xf0d) RXF3SIDL; +volatile __RXF3SIDLbits_t __at (0xf0d) RXF3SIDLbits; + +__sfr __at (0xf0e) RXF3EIDH; +volatile __RXF3EIDHbits_t __at (0xf0e) RXF3EIDHbits; + +__sfr __at (0xf0f) RXF3EIDL; +volatile __RXF3EIDLbits_t __at (0xf0f) RXF3EIDLbits; + +__sfr __at (0xf10) RXF4SIDH; +volatile __RXF4SIDHbits_t __at (0xf10) RXF4SIDHbits; + +__sfr __at (0xf11) RXF4SIDL; +volatile __RXF4SIDLbits_t __at (0xf11) RXF4SIDLbits; + +__sfr __at (0xf12) RXF4EIDH; +volatile __RXF4EIDHbits_t __at (0xf12) RXF4EIDHbits; + +__sfr __at (0xf13) RXF4EIDL; +volatile __RXF4EIDLbits_t __at (0xf13) RXF4EIDLbits; + +__sfr __at (0xf14) RXF5SIDH; +volatile __RXF5SIDHbits_t __at (0xf14) RXF5SIDHbits; + +__sfr __at (0xf15) RXF5SIDL; +volatile __RXF5SIDLbits_t __at (0xf15) RXF5SIDLbits; + +__sfr __at (0xf16) RXF5EIDH; +volatile __RXF5EIDHbits_t __at (0xf16) RXF5EIDHbits; + +__sfr __at (0xf17) RXF5EIDL; +volatile __RXF5EIDLbits_t __at (0xf17) RXF5EIDLbits; + +__sfr __at (0xf18) RXM0SIDH; +volatile __RXM0SIDHbits_t __at (0xf18) RXM0SIDHbits; + +__sfr __at (0xf19) RXM0SIDL; +volatile __RXM0SIDLbits_t __at (0xf19) RXM0SIDLbits; + +__sfr __at (0xf1a) RXM0EIDH; +volatile __RXM0EIDHbits_t __at (0xf1a) RXM0EIDHbits; + +__sfr __at (0xf1b) RXM0EIDL; +volatile __RXM0EIDLbits_t __at (0xf1b) RXM0EIDLbits; + +__sfr __at (0xf1c) RXM1SIDH; +volatile __RXM1SIDHbits_t __at (0xf1c) RXM1SIDHbits; + +__sfr __at (0xf1d) RXM1SIDL; +volatile __RXM1SIDLbits_t __at (0xf1d) RXM1SIDLbits; + +__sfr __at (0xf1e) RXM1EIDH; +volatile __RXM1EIDHbits_t __at (0xf1e) RXM1EIDHbits; + +__sfr __at (0xf1f) RXM1EIDL; +volatile __RXM1EIDLbits_t __at (0xf1f) RXM1EIDLbits; + +__sfr __at (0xf20) TXB2CON; +volatile __TXB2CONbits_t __at (0xf20) TXB2CONbits; + +__sfr __at (0xf21) TXB2SIDH; +volatile __TXB2SIDHbits_t __at (0xf21) TXB2SIDHbits; + +__sfr __at (0xf22) TXB2SIDL; +volatile __TXB2SIDLbits_t __at (0xf22) TXB2SIDLbits; + +__sfr __at (0xf23) TXB2EIDH; +volatile __TXB2EIDHbits_t __at (0xf23) TXB2EIDHbits; + +__sfr __at (0xf24) TXB2EIDL; +volatile __TXB2EIDLbits_t __at (0xf24) TXB2EIDLbits; + +__sfr __at (0xf25) TXB2DLC; +volatile __TXB2DLCbits_t __at (0xf25) TXB2DLCbits; + +__sfr __at (0xf26) TXB2D0; +volatile __TXB2D0bits_t __at (0xf26) TXB2D0bits; + +__sfr __at (0xf27) TXB2D1; +volatile __TXB2D1bits_t __at (0xf27) TXB2D1bits; + +__sfr __at (0xf28) TXB2D2; +volatile __TXB2D2bits_t __at (0xf28) TXB2D2bits; + +__sfr __at (0xf29) TXB2D3; +volatile __TXB2D3bits_t __at (0xf29) TXB2D3bits; + +__sfr __at (0xf2a) TXB2D4; +volatile __TXB2D4bits_t __at (0xf2a) TXB2D4bits; + +__sfr __at (0xf2b) TXB2D5; +volatile __TXB2D5bits_t __at (0xf2b) TXB2D5bits; + +__sfr __at (0xf2c) TXB2D6; +volatile __TXB2D6bits_t __at (0xf2c) TXB2D6bits; + +__sfr __at (0xf2d) TXB2D7; +volatile __TXB2D7bits_t __at (0xf2d) TXB2D7bits; + +__sfr __at (0xf2e) CANSTATRO4; +volatile __CANSTATRO4bits_t __at (0xf2e) CANSTATRO4bits; + +__sfr __at (0xf30) TXB1CON; +volatile __TXB1CONbits_t __at (0xf30) TXB1CONbits; + +__sfr __at (0xf31) TXB1SIDH; +volatile __TXB1SIDHbits_t __at (0xf31) TXB1SIDHbits; + +__sfr __at (0xf32) TXB1SIDL; +volatile __TXB1SIDLbits_t __at (0xf32) TXB1SIDLbits; + +__sfr __at (0xf33) TXB1EIDH; +volatile __TXB1EIDHbits_t __at (0xf33) TXB1EIDHbits; + +__sfr __at (0xf34) TXB1EIDL; +volatile __TXB1EIDLbits_t __at (0xf34) TXB1EIDLbits; + +__sfr __at (0xf35) TXB1DLC; +volatile __TXB1DLCbits_t __at (0xf35) TXB1DLCbits; + +__sfr __at (0xf36) TXB1D0; +volatile __TXB1D0bits_t __at (0xf36) TXB1D0bits; + +__sfr __at (0xf37) TXB1D1; +volatile __TXB1D1bits_t __at (0xf37) TXB1D1bits; + +__sfr __at (0xf38) TXB1D2; +volatile __TXB1D2bits_t __at (0xf38) TXB1D2bits; + +__sfr __at (0xf39) TXB1D3; +volatile __TXB1D3bits_t __at (0xf39) TXB1D3bits; + +__sfr __at (0xf3a) TXB1D4; +volatile __TXB1D4bits_t __at (0xf3a) TXB1D4bits; + +__sfr __at (0xf3b) TXB1D5; +volatile __TXB1D5bits_t __at (0xf3b) TXB1D5bits; + +__sfr __at (0xf3c) TXB1D6; +volatile __TXB1D6bits_t __at (0xf3c) TXB1D6bits; + +__sfr __at (0xf3d) TXB1D7; +volatile __TXB1D7bits_t __at (0xf3d) TXB1D7bits; + +__sfr __at (0xf3e) CANSTATRO3; +volatile __CANSTATRO3bits_t __at (0xf3e) CANSTATRO3bits; + +__sfr __at (0xf40) TXB0CON; +volatile __TXB0CONbits_t __at (0xf40) TXB0CONbits; + +__sfr __at (0xf41) TXB0SIDH; +volatile __TXB0SIDHbits_t __at (0xf41) TXB0SIDHbits; + +__sfr __at (0xf42) TXB0SIDL; +volatile __TXB0SIDLbits_t __at (0xf42) TXB0SIDLbits; + +__sfr __at (0xf43) TXB0EIDH; +volatile __TXB0EIDHbits_t __at (0xf43) TXB0EIDHbits; + +__sfr __at (0xf44) TXB0EIDL; +volatile __TXB0EIDLbits_t __at (0xf44) TXB0EIDLbits; + +__sfr __at (0xf45) TXB0DLC; +volatile __TXB0DLCbits_t __at (0xf45) TXB0DLCbits; + +__sfr __at (0xf46) TXB0D0; +volatile __TXB0D0bits_t __at (0xf46) TXB0D0bits; + +__sfr __at (0xf47) TXB0D1; +volatile __TXB0D1bits_t __at (0xf47) TXB0D1bits; + +__sfr __at (0xf48) TXB0D2; +volatile __TXB0D2bits_t __at (0xf48) TXB0D2bits; + +__sfr __at (0xf49) TXB0D3; +volatile __TXB0D3bits_t __at (0xf49) TXB0D3bits; + +__sfr __at (0xf4a) TXB0D4; +volatile __TXB0D4bits_t __at (0xf4a) TXB0D4bits; + +__sfr __at (0xf4b) TXB0D5; +volatile __TXB0D5bits_t __at (0xf4b) TXB0D5bits; + +__sfr __at (0xf4c) TXB0D6; +volatile __TXB0D6bits_t __at (0xf4c) TXB0D6bits; + +__sfr __at (0xf4d) TXB0D7; +volatile __TXB0D7bits_t __at (0xf4d) TXB0D7bits; + +__sfr __at (0xf4e) CANSTATRO2; +volatile __CANSTATRO2bits_t __at (0xf4e) CANSTATRO2bits; + +__sfr __at (0xf50) RXB1CON; +volatile __RXB1CONbits_t __at (0xf50) RXB1CONbits; + +__sfr __at (0xf51) RXB1SIDH; +volatile __RXB1SIDHbits_t __at (0xf51) RXB1SIDHbits; + +__sfr __at (0xf52) RXB1SIDL; +volatile __RXB1SIDLbits_t __at (0xf52) RXB1SIDLbits; + +__sfr __at (0xf53) RXB1EIDH; +volatile __RXB1EIDHbits_t __at (0xf53) RXB1EIDHbits; + +__sfr __at (0xf54) RXB1EIDL; +volatile __RXB1EIDLbits_t __at (0xf54) RXB1EIDLbits; + +__sfr __at (0xf55) RXB1DLC; +volatile __RXB1DLCbits_t __at (0xf55) RXB1DLCbits; + +__sfr __at (0xf56) RXB1D0; +volatile __RXB1D0bits_t __at (0xf56) RXB1D0bits; + +__sfr __at (0xf57) RXB1D1; +volatile __RXB1D1bits_t __at (0xf57) RXB1D1bits; + +__sfr __at (0xf58) RXB1D2; +volatile __RXB1D2bits_t __at (0xf58) RXB1D2bits; + +__sfr __at (0xf59) RXB1D3; +volatile __RXB1D3bits_t __at (0xf59) RXB1D3bits; + +__sfr __at (0xf5a) RXB1D4; +volatile __RXB1D4bits_t __at (0xf5a) RXB1D4bits; + +__sfr __at (0xf5b) RXB1D5; +volatile __RXB1D5bits_t __at (0xf5b) RXB1D5bits; + +__sfr __at (0xf5c) RXB1D6; +volatile __RXB1D6bits_t __at (0xf5c) RXB1D6bits; + +__sfr __at (0xf5d) RXB1D7; +volatile __RXB1D7bits_t __at (0xf5d) RXB1D7bits; + +__sfr __at (0xf5e) CANSTATRO1; +volatile __CANSTATRO1bits_t __at (0xf5e) CANSTATRO1bits; + +__sfr __at (0xf60) RXB0CON; +volatile __RXB0CONbits_t __at (0xf60) RXB0CONbits; + +__sfr __at (0xf61) RXB0SIDH; +volatile __RXB0SIDHbits_t __at (0xf61) RXB0SIDHbits; + +__sfr __at (0xf62) RXB0SIDL; +volatile __RXB0SIDLbits_t __at (0xf62) RXB0SIDLbits; + +__sfr __at (0xf63) RXB0EIDH; +volatile __RXB0EIDHbits_t __at (0xf63) RXB0EIDHbits; + +__sfr __at (0xf64) RXB0EIDL; +volatile __RXB0EIDLbits_t __at (0xf64) RXB0EIDLbits; + +__sfr __at (0xf65) RXB0DLC; +volatile __RXB0DLCbits_t __at (0xf65) RXB0DLCbits; + +__sfr __at (0xf66) RXB0D0; +__sfr __at (0xf67) RXB0D1; +__sfr __at (0xf68) RXB0D2; +__sfr __at (0xf69) RXB0D3; +__sfr __at (0xf6a) RXB0D4; +__sfr __at (0xf6b) RXB0D5; +__sfr __at (0xf6c) RXB0D6; +__sfr __at (0xf6d) RXB0D7; +__sfr __at (0xf6e) CANSTAT; +volatile __CANSTATbits_t __at (0xf6e) CANSTATbits; + +__sfr __at (0xf6f) CANCON; +volatile __CANCONbits_t __at (0xf6f) CANCONbits; + +__sfr __at (0xf70) BRGCON1; +volatile __BRGCON1bits_t __at (0xf70) BRGCON1bits; + +__sfr __at (0xf71) BRGCON2; +volatile __BRGCON2bits_t __at (0xf71) BRGCON2bits; + +__sfr __at (0xf72) BRGCON3; +volatile __BRGCON3bits_t __at (0xf72) BRGCON3bits; + +__sfr __at (0xf73) CIOCON; +volatile __CIOCONbits_t __at (0xf73) CIOCONbits; + +__sfr __at (0xf74) COMSTAT; +volatile __COMSTATbits_t __at (0xf74) COMSTATbits; + +__sfr __at (0xf75) RXERRCNT; +volatile __RXERRCNTbits_t __at (0xf75) RXERRCNTbits; + +__sfr __at (0xf76) TXERRCNT; +volatile __TXERRCNTbits_t __at (0xf76) TXERRCNTbits; + +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa3) PIE3; +volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +__sfr __at (0xfa4) PIR3; +volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +__sfr __at (0xfa5) IPR3; +volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfab) RCSTA; +volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f2580.c b/device/lib/pic16/libdev/pic18f2580.c new file mode 100644 index 0000000..7215efa --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2580.c @@ -0,0 +1,6 @@ +/* + * pic18f2580.c - device specific definitions + */ + +#include "pic18f4580.c" + diff --git a/device/lib/pic16/libdev/pic18f2585.c b/device/lib/pic16/libdev/pic18f2585.c new file mode 100644 index 0000000..e03512e --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2585.c @@ -0,0 +1,12 @@ +/* + * pic18f2585.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include "pic18f2680.c" + diff --git a/device/lib/pic16/libdev/pic18f25j10.c b/device/lib/pic16/libdev/pic18f25j10.c new file mode 100644 index 0000000..f3b7fea --- /dev/null +++ b/device/lib/pic16/libdev/pic18f25j10.c @@ -0,0 +1,11 @@ +/* + * pic18f25j10.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include "pic18f24j10.c" diff --git a/device/lib/pic16/libdev/pic18f25k20.c b/device/lib/pic16/libdev/pic18f25k20.c new file mode 100644 index 0000000..46024f4 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f25k20.c @@ -0,0 +1,6 @@ +/* + * pic18f25k20.c - device specific definitions + */ + +#include "pic18f46k20.c" + diff --git a/device/lib/pic16/libdev/pic18f2610.c b/device/lib/pic16/libdev/pic18f2610.c new file mode 100644 index 0000000..180b5de --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2610.c @@ -0,0 +1,6 @@ +/* + * pic18f2610.c - device specific definitions + */ + +#include "pic18f4610.c" + diff --git a/device/lib/pic16/libdev/pic18f2620.c b/device/lib/pic16/libdev/pic18f2620.c new file mode 100644 index 0000000..c297ade --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2620.c @@ -0,0 +1,6 @@ +/* + * pic18f2620.c - PIC18F2620 Device Library Sources + */ + +#include "pic18f4620.c" /* just the same, but in a different package */ + diff --git a/device/lib/pic16/libdev/pic18f2680.c b/device/lib/pic16/libdev/pic18f2680.c new file mode 100644 index 0000000..257fefa --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2680.c @@ -0,0 +1,1103 @@ +/* + * pic18f2680.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xD60) RXF6SIDH; +volatile __RXF6SIDHbits_t __at (0xD60) RXF6SIDHbits; + +__sfr __at (0xD61) RXF6SIDL; +volatile __RXF6SIDLbits_t __at (0xD61) RXF6SIDLbits; + +__sfr __at (0xD62) RXF6EIDH; +volatile __RXF6EIDHbits_t __at (0xD62) RXF6EIDHbits; + +__sfr __at (0xD63) RXF6EIDL; +volatile __RXF6EIDLbits_t __at (0xD63) RXF6EIDLbits; + +__sfr __at (0xD64) RXF7SIDH; +volatile __RXF7SIDHbits_t __at (0xD64) RXF7SIDHbits; + +__sfr __at (0xD65) RXF7SIDL; +volatile __RXF7SIDLbits_t __at (0xD65) RXF7SIDLbits; + +__sfr __at (0xD66) RXF7EIDH; +volatile __RXF7EIDHbits_t __at (0xD66) RXF7EIDHbits; + +__sfr __at (0xD67) RXF7EIDL; +volatile __RXF7EIDLbits_t __at (0xD67) RXF7EIDLbits; + +__sfr __at (0xD68) RXF8SIDH; +volatile __RXF8SIDHbits_t __at (0xD68) RXF8SIDHbits; + +__sfr __at (0xD69) RXF8SIDL; +volatile __RXF8SIDLbits_t __at (0xD69) RXF8SIDLbits; + +__sfr __at (0xD6A) RXF8EIDH; +volatile __RXF8EIDHbits_t __at (0xD6A) RXF8EIDHbits; + +__sfr __at (0xD6B) RXF8EIDL; +volatile __RXF8EIDLbits_t __at (0xD6B) RXF8EIDLbits; + +__sfr __at (0xD70) RXF9SIDH; +volatile __RXF9SIDHbits_t __at (0xD70) RXF9SIDHbits; + +__sfr __at (0xD71) RXF9SIDL; +volatile __RXF9SIDLbits_t __at (0xD71) RXF9SIDLbits; + +__sfr __at (0xD72) RXF9EIDH; +volatile __RXF9EIDHbits_t __at (0xD72) RXF9EIDHbits; + +__sfr __at (0xD73) RXF9EIDL; +volatile __RXF9EIDLbits_t __at (0xD73) RXF9EIDLbits; + +__sfr __at (0xD74) RXF10SIDH; +volatile __RXF10SIDHbits_t __at (0xD74) RXF10SIDHbits; + +__sfr __at (0xD75) RXF10SIDL; +volatile __RXF10SIDLbits_t __at (0xD75) RXF10SIDLbits; + +__sfr __at (0xD76) RXF10EIDH; +volatile __RXF10EIDHbits_t __at (0xD76) RXF10EIDHbits; + +__sfr __at (0xD77) RXF10EIDL; +volatile __RXF10EIDLbits_t __at (0xD77) RXF10EIDLbits; + +__sfr __at (0xD78) RXF11SIDH; +volatile __RXF11SIDHbits_t __at (0xD78) RXF11SIDHbits; + +__sfr __at (0xD79) RXF11SIDL; +volatile __RXF11SIDLbits_t __at (0xD79) RXF11SIDLbits; + +__sfr __at (0xD7A) RXF11EIDH; +volatile __RXF11EIDHbits_t __at (0xD7A) RXF11EIDHbits; + +__sfr __at (0xD7B) RXF11EIDL; +volatile __RXF11EIDLbits_t __at (0xD7B) RXF11EIDLbits; + +__sfr __at (0xD80) RXF12SIDH; +volatile __RXF12SIDHbits_t __at (0xD80) RXF12SIDHbits; + +__sfr __at (0xD81) RXF12SIDL; +volatile __RXF12SIDLbits_t __at (0xD81) RXF12SIDLbits; + +__sfr __at (0xD82) RXF12EIDH; +volatile __RXF12EIDHbits_t __at (0xD82) RXF12EIDHbits; + +__sfr __at (0xD83) RXF12EIDL; +volatile __RXF12EIDLbits_t __at (0xD83) RXF12EIDLbits; + +__sfr __at (0xD84) RXF13SIDH; +volatile __RXF13SIDHbits_t __at (0xD84) RXF13SIDHbits; + +__sfr __at (0xD85) RXF13SIDL; +volatile __RXF13SIDLbits_t __at (0xD85) RXF13SIDLbits; + +__sfr __at (0xD86) RXF13EIDH; +volatile __RXF13EIDHbits_t __at (0xD86) RXF13EIDHbits; + +__sfr __at (0xD87) RXF13EIDL; +volatile __RXF13EIDLbits_t __at (0xD87) RXF13EIDLbits; + +__sfr __at (0xD88) RXF14SIDH; +volatile __RXF14SIDHbits_t __at (0xD88) RXF14SIDHbits; + +__sfr __at (0xD89) RXF14SIDL; +volatile __RXF14SIDLbits_t __at (0xD89) RXF14SIDLbits; + +__sfr __at (0xD8A) RXF14EIDH; +volatile __RXF14EIDHbits_t __at (0xD8A) RXF14EIDHbits; + +__sfr __at (0xD8B) RXF14EIDL; +volatile __RXF14EIDLbits_t __at (0xD8B) RXF14EIDLbits; + +__sfr __at (0xD90) RXF15SIDH; +volatile __RXF15SIDHbits_t __at (0xD90) RXF15SIDHbits; + +__sfr __at (0xD91) RXF15SIDL; +volatile __RXF15SIDLbits_t __at (0xD91) RXF15SIDLbits; + +__sfr __at (0xD92) RXF15EIDH; +volatile __RXF15EIDHbits_t __at (0xD92) RXF15EIDHbits; + +__sfr __at (0xD93) RXF15EIDL; +volatile __RXF15EIDLbits_t __at (0xD93) RXF15EIDLbits; + +__sfr __at (0xDD4) RXFCON0; +volatile __RXFCON0bits_t __at (0xDD4) RXFCON0bits; + +__sfr __at (0xDD5) RXFCON1; +volatile __RXFCON1bits_t __at (0xDD5) RXFCON1bits; + +__sfr __at (0xDD8) SDFLC; +volatile __SDFLCbits_t __at (0xDD8) SDFLCbits; + +__sfr __at (0xDE0) RXFBCON0; +volatile __RXFBCON0bits_t __at (0xDE0) RXFBCON0bits; + +__sfr __at (0xDE1) RXFBCON1; +volatile __RXFBCON1bits_t __at (0xDE1) RXFBCON1bits; + +__sfr __at (0xDE2) RXFBCON2; +volatile __RXFBCON2bits_t __at (0xDE2) RXFBCON2bits; + +__sfr __at (0xDE3) RXFBCON3; +volatile __RXFBCON3bits_t __at (0xDE3) RXFBCON3bits; + +__sfr __at (0xDE4) RXFBCON4; +volatile __RXFBCON4bits_t __at (0xDE4) RXFBCON4bits; + +__sfr __at (0xDE5) RXFBCON5; +volatile __RXFBCON5bits_t __at (0xDE5) RXFBCON5bits; + +__sfr __at (0xDE6) RXFBCON6; +volatile __RXFBCON6bits_t __at (0xDE6) RXFBCON6bits; + +__sfr __at (0xDE7) RXFBCON7; +volatile __RXFBCON7bits_t __at (0xDE7) RXFBCON7bits; + +__sfr __at (0xDF0) MSEL0; +volatile __MSEL0bits_t __at (0xDF0) MSEL0bits; + +__sfr __at (0xDF1) MSEL1; +volatile __MSEL1bits_t __at (0xDF1) MSEL1bits; + +__sfr __at (0xDF2) MSEL2; +volatile __MSEL2bits_t __at (0xDF2) MSEL2bits; + +__sfr __at (0xDF3) MSEL3; +volatile __MSEL3bits_t __at (0xDF3) MSEL3bits; + +__sfr __at (0xDF8) BSEL0; +volatile __BSEL0bits_t __at (0xDF8) BSEL0bits; + +__sfr __at (0xDFA) BIE0; +volatile __BIE0bits_t __at (0xDFA) BIE0bits; + +__sfr __at (0xDFC) TXBIE; +volatile __TXBIEbits_t __at (0xDFC) TXBIEbits; + +__sfr __at (0xE20) B0CON; +volatile __B0CONbits_t __at (0xE20) B0CONbits; + +__sfr __at (0xE21) B0SIDH; +volatile __B0SIDHbits_t __at (0xE21) B0SIDHbits; + +__sfr __at (0xE22) B0SIDL; +volatile __B0SIDLbits_t __at (0xE22) B0SIDLbits; + +__sfr __at (0xE23) B0EIDH; +volatile __B0EIDHbits_t __at (0xE23) B0EIDHbits; + +__sfr __at (0xE24) B0EIDL; +volatile __B0EIDLbits_t __at (0xE24) B0EIDLbits; + +__sfr __at (0xE25) B0DLC; +volatile __B0DLCbits_t __at (0xE25) B0DLCbits; + +__sfr __at (0xE26) B0D0; +volatile __B0D0bits_t __at (0xE26) B0D0bits; + +__sfr __at (0xE27) B0D1; +volatile __B0D1bits_t __at (0xE27) B0D1bits; + +__sfr __at (0xE28) B0D2; +volatile __B0D2bits_t __at (0xE28) B0D2bits; + +__sfr __at (0xE29) B0D3; +volatile __B0D3bits_t __at (0xE29) B0D3bits; + +__sfr __at (0xE2A) B0D4; +volatile __B0D4bits_t __at (0xE2A) B0D4bits; + +__sfr __at (0xE2B) B0D5; +volatile __B0D5bits_t __at (0xE2B) B0D5bits; + +__sfr __at (0xE2C) B0D6; +volatile __B0D6bits_t __at (0xE2C) B0D6bits; + +__sfr __at (0xE2D) B0D7; +volatile __B0D7bits_t __at (0xE2D) B0D7bits; + +__sfr __at (0xE2E) CANSTAT_RO9; +volatile __CANSTAT_RO9bits_t __at (0xE2E) CANSTAT_RO9bits; + +__sfr __at (0xE2F) CANCON_RO9; +volatile __CANCON_RO9bits_t __at (0xE2F) CANCON_RO9bits; + +__sfr __at (0xE30) B1CON; +volatile __B1CONbits_t __at (0xE30) B1CONbits; + +__sfr __at (0xE31) B1SIDH; +volatile __B1SIDHbits_t __at (0xE31) B1SIDHbits; + +__sfr __at (0xE32) B1SIDL; +volatile __B1SIDLbits_t __at (0xE32) B1SIDLbits; + +__sfr __at (0xE33) B1EIDH; +volatile __B1EIDHbits_t __at (0xE33) B1EIDHbits; + +__sfr __at (0xE34) B1EIDL; +volatile __B1EIDLbits_t __at (0xE34) B1EIDLbits; + +__sfr __at (0xE35) B1DLC; +volatile __B1DLCbits_t __at (0xE35) B1DLCbits; + +__sfr __at (0xE36) B1D0; +volatile __B1D0bits_t __at (0xE36) B1D0bits; + +__sfr __at (0xE37) B1D1; +volatile __B1D1bits_t __at (0xE37) B1D1bits; + +__sfr __at (0xE38) B1D2; +volatile __B1D2bits_t __at (0xE38) B1D2bits; + +__sfr __at (0xE39) B1D3; +volatile __B1D3bits_t __at (0xE39) B1D3bits; + +__sfr __at (0xE3A) B1D4; +volatile __B1D4bits_t __at (0xE3A) B1D4bits; + +__sfr __at (0xE3B) B1D5; +volatile __B1D5bits_t __at (0xE3B) B1D5bits; + +__sfr __at (0xE3C) B1D6; +volatile __B1D6bits_t __at (0xE3C) B1D6bits; + +__sfr __at (0xE3D) B1D7; +volatile __B1D7bits_t __at (0xE3D) B1D7bits; + +__sfr __at (0xE3E) CANSTAT_RO8; +volatile __CANSTAT_RO8bits_t __at (0xE3E) CANSTAT_RO8bits; + +__sfr __at (0xE3F) CANCON_RO8; +volatile __CANCON_RO8bits_t __at (0xE3F) CANCON_RO8bits; + +__sfr __at (0xE40) B2CON; +volatile __B2CONbits_t __at (0xE40) B2CONbits; + +__sfr __at (0xE41) B2SIDH; +volatile __B2SIDHbits_t __at (0xE41) B2SIDHbits; + +__sfr __at (0xE42) B2SIDL; +volatile __B2SIDLbits_t __at (0xE42) B2SIDLbits; + +__sfr __at (0xE43) B2EIDH; +volatile __B2EIDHbits_t __at (0xE43) B2EIDHbits; + +__sfr __at (0xE44) B2EIDL; +volatile __B2EIDLbits_t __at (0xE44) B2EIDLbits; + +__sfr __at (0xE45) B2DLC; +volatile __B2DLCbits_t __at (0xE45) B2DLCbits; + +__sfr __at (0xE46) B2D0; +volatile __B2D0bits_t __at (0xE46) B2D0bits; + +__sfr __at (0xE47) B2D1; +volatile __B2D1bits_t __at (0xE47) B2D1bits; + +__sfr __at (0xE48) B2D2; +volatile __B2D2bits_t __at (0xE48) B2D2bits; + +__sfr __at (0xE49) B2D3; +volatile __B2D3bits_t __at (0xE49) B2D3bits; + +__sfr __at (0xE4A) B2D4; +volatile __B2D4bits_t __at (0xE4A) B2D4bits; + +__sfr __at (0xE4B) B2D5; +volatile __B2D5bits_t __at (0xE4B) B2D5bits; + +__sfr __at (0xE4C) B2D6; +volatile __B2D6bits_t __at (0xE4C) B2D6bits; + +__sfr __at (0xE4D) B2D7; +volatile __B2D7bits_t __at (0xE4D) B2D7bits; + +__sfr __at (0xE4E) CANSTAT_RO7; +volatile __CANSTAT_RO7bits_t __at (0xE4E) CANSTAT_RO7bits; + +__sfr __at (0xE4F) CANCON_RO7; +volatile __CANCON_RO7bits_t __at (0xE4F) CANCON_RO7bits; + +__sfr __at (0xE50) B3CON; +volatile __B3CONbits_t __at (0xE50) B3CONbits; + +__sfr __at (0xE51) B3SIDH; +volatile __B3SIDHbits_t __at (0xE51) B3SIDHbits; + +__sfr __at (0xE52) B3SIDL; +volatile __B3SIDLbits_t __at (0xE52) B3SIDLbits; + +__sfr __at (0xE53) B3EIDH; +volatile __B3EIDHbits_t __at (0xE53) B3EIDHbits; + +__sfr __at (0xE54) B3EIDL; +volatile __B3EIDLbits_t __at (0xE54) B3EIDLbits; + +__sfr __at (0xE55) B3DLC; +volatile __B3DLCbits_t __at (0xE55) B3DLCbits; + +__sfr __at (0xE56) B3D0; +volatile __B3D0bits_t __at (0xE56) B3D0bits; + +__sfr __at (0xE57) B3D1; +volatile __B3D1bits_t __at (0xE57) B3D1bits; + +__sfr __at (0xE58) B3D2; +volatile __B3D2bits_t __at (0xE58) B3D2bits; + +__sfr __at (0xE59) B3D3; +volatile __B3D3bits_t __at (0xE59) B3D3bits; + +__sfr __at (0xE5A) B3D4; +volatile __B3D4bits_t __at (0xE5A) B3D4bits; + +__sfr __at (0xE5B) B3D5; +volatile __B3D5bits_t __at (0xE5B) B3D5bits; + +__sfr __at (0xE5C) B3D6; +volatile __B3D6bits_t __at (0xE5C) B3D6bits; + +__sfr __at (0xE5D) B3D7; +volatile __B3D7bits_t __at (0xE5D) B3D7bits; + +__sfr __at (0xE5E) CANSTAT_RO6; +volatile __CANSTAT_RO6bits_t __at (0xE5E) CANSTAT_RO6bits; + +__sfr __at (0xE5F) CANCON_RO6; +volatile __CANCON_RO6bits_t __at (0xE5F) CANCON_RO6bits; + +__sfr __at (0xE60) B4CON; +volatile __B4CONbits_t __at (0xE60) B4CONbits; + +__sfr __at (0xE61) B4SIDH; +volatile __B4SIDHbits_t __at (0xE61) B4SIDHbits; + +__sfr __at (0xE62) B4SIDL; +volatile __B4SIDLbits_t __at (0xE62) B4SIDLbits; + +__sfr __at (0xE63) B4EIDH; +volatile __B4EIDHbits_t __at (0xE63) B4EIDHbits; + +__sfr __at (0xE64) B4EIDL; +volatile __B4EIDLbits_t __at (0xE64) B4EIDLbits; + +__sfr __at (0xE65) B4DLC; +volatile __B4DLCbits_t __at (0xE65) B4DLCbits; + +__sfr __at (0xE66) B4D0; +volatile __B4D0bits_t __at (0xE66) B4D0bits; + +__sfr __at (0xE67) B4D1; +volatile __B4D1bits_t __at (0xE67) B4D1bits; + +__sfr __at (0xE68) B4D2; +volatile __B4D2bits_t __at (0xE68) B4D2bits; + +__sfr __at (0xE69) B4D3; +volatile __B4D3bits_t __at (0xE69) B4D3bits; + +__sfr __at (0xE6A) B4D4; +volatile __B4D4bits_t __at (0xE6A) B4D4bits; + +__sfr __at (0xE6B) B4D5; +volatile __B4D5bits_t __at (0xE6B) B4D5bits; + +__sfr __at (0xE6C) B4D6; +volatile __B4D6bits_t __at (0xE6C) B4D6bits; + +__sfr __at (0xE6D) B4D7; +volatile __B4D7bits_t __at (0xE6D) B4D7bits; + +__sfr __at (0xE6E) CANSTAT_RO5; +volatile __CANSTAT_RO5bits_t __at (0xE6E) CANSTAT_RO5bits; + +__sfr __at (0xE6F) CANCON_RO5; +volatile __CANCON_RO5bits_t __at (0xE6F) CANCON_RO5bits; + +__sfr __at (0xE70) B5CON; +volatile __B5CONbits_t __at (0xE70) B5CONbits; + +__sfr __at (0xE71) B5SIDH; +volatile __B5SIDHbits_t __at (0xE71) B5SIDHbits; + +__sfr __at (0xE72) B5SIDL; +volatile __B5SIDLbits_t __at (0xE72) B5SIDLbits; + +__sfr __at (0xE73) B5EIDH; +volatile __B5EIDHbits_t __at (0xE73) B5EIDHbits; + +__sfr __at (0xE74) B5EIDL; +volatile __B5EIDLbits_t __at (0xE74) B5EIDLbits; + +__sfr __at (0xE75) B5DLC; +volatile __B5DLCbits_t __at (0xE75) B5DLCbits; + +__sfr __at (0xE76) B5D0; +volatile __B5D0bits_t __at (0xE76) B5D0bits; + +__sfr __at (0xE77) B5D1; +volatile __B5D1bits_t __at (0xE77) B5D1bits; + +__sfr __at (0xE78) B5D2; +volatile __B5D2bits_t __at (0xE78) B5D2bits; + +__sfr __at (0xE79) B5D3; +volatile __B5D3bits_t __at (0xE79) B5D3bits; + +__sfr __at (0xE7A) B5D4; +volatile __B5D4bits_t __at (0xE7A) B5D4bits; + +__sfr __at (0xE7B) B5D5; +volatile __B5D5bits_t __at (0xE7B) B5D5bits; + +__sfr __at (0xE7C) B5D6; +volatile __B5D6bits_t __at (0xE7C) B5D6bits; + +__sfr __at (0xE7D) B5D7; +volatile __B5D7bits_t __at (0xE7D) B5D7bits; + +__sfr __at (0xE7E) CANSTAT_RO4; +volatile __CANSTAT_RO4bits_t __at (0xE7E) CANSTAT_RO4bits; + +__sfr __at (0xE7F) CANCON_RO4; +volatile __CANCON_RO4bits_t __at (0xE7F) CANCON_RO4bits; + +__sfr __at (0xF00) RXF0SIDH; +volatile __RXF0SIDHbits_t __at (0xF00) RXF0SIDHbits; + +__sfr __at (0xF01) RXF0SIDL; +volatile __RXF0SIDLbits_t __at (0xF01) RXF0SIDLbits; + +__sfr __at (0xF02) RXF0EIDH; +volatile __RXF0EIDHbits_t __at (0xF02) RXF0EIDHbits; + +__sfr __at (0xF03) RXF0EIDL; +volatile __RXF0EIDLbits_t __at (0xF03) RXF0EIDLbits; + +__sfr __at (0xF04) RXF1SIDH; +volatile __RXF1SIDHbits_t __at (0xF04) RXF1SIDHbits; + +__sfr __at (0xF05) RXF1SIDL; +volatile __RXF1SIDLbits_t __at (0xF05) RXF1SIDLbits; + +__sfr __at (0xF06) RXF1EIDH; +volatile __RXF1EIDHbits_t __at (0xF06) RXF1EIDHbits; + +__sfr __at (0xF07) RXF1EIDL; +volatile __RXF1EIDLbits_t __at (0xF07) RXF1EIDLbits; + +__sfr __at (0xF08) RXF2SIDH; +volatile __RXF2SIDHbits_t __at (0xF08) RXF2SIDHbits; + +__sfr __at (0xF09) RXF2SIDL; +volatile __RXF2SIDLbits_t __at (0xF09) RXF2SIDLbits; + +__sfr __at (0xF0A) RXF2EIDH; +volatile __RXF2EIDHbits_t __at (0xF0A) RXF2EIDHbits; + +__sfr __at (0xF0B) RXF2EIDL; +volatile __RXF2EIDLbits_t __at (0xF0B) RXF2EIDLbits; + +__sfr __at (0xF0C) RXF3SIDH; +volatile __RXF3SIDHbits_t __at (0xF0C) RXF3SIDHbits; + +__sfr __at (0xF0D) RXF3SIDL; +volatile __RXF3SIDLbits_t __at (0xF0D) RXF3SIDLbits; + +__sfr __at (0xF0E) RXF3EIDH; +volatile __RXF3EIDHbits_t __at (0xF0E) RXF3EIDHbits; + +__sfr __at (0xF0F) RXF3EIDL; +volatile __RXF3EIDLbits_t __at (0xF0F) RXF3EIDLbits; + +__sfr __at (0xF10) RXF4SIDH; +volatile __RXF4SIDHbits_t __at (0xF10) RXF4SIDHbits; + +__sfr __at (0xF11) RXF4SIDL; +volatile __RXF4SIDLbits_t __at (0xF11) RXF4SIDLbits; + +__sfr __at (0xF12) RXF4EIDH; +volatile __RXF4EIDHbits_t __at (0xF12) RXF4EIDHbits; + +__sfr __at (0xF13) RXF4EIDL; +volatile __RXF4EIDLbits_t __at (0xF13) RXF4EIDLbits; + +__sfr __at (0xF14) RXF5SIDH; +volatile __RXF5SIDHbits_t __at (0xF14) RXF5SIDHbits; + +__sfr __at (0xF15) RXF5SIDL; +volatile __RXF5SIDLbits_t __at (0xF15) RXF5SIDLbits; + +__sfr __at (0xF16) RXF5EIDH; +volatile __RXF5EIDHbits_t __at (0xF16) RXF5EIDHbits; + +__sfr __at (0xF17) RXF5EIDL; +volatile __RXF5EIDLbits_t __at (0xF17) RXF5EIDLbits; + +__sfr __at (0xF18) RXM0SIDH; +volatile __RXM0SIDHbits_t __at (0xF18) RXM0SIDHbits; + +__sfr __at (0xF19) RXM0SIDL; +volatile __RXM0SIDLbits_t __at (0xF19) RXM0SIDLbits; + +__sfr __at (0xF1A) RXM0EIDH; +volatile __RXM0EIDHbits_t __at (0xF1A) RXM0EIDHbits; + +__sfr __at (0xF1B) RXM0EIDL; +volatile __RXM0EIDLbits_t __at (0xF1B) RXM0EIDLbits; + +__sfr __at (0xF1C) RXM1SIDH; +volatile __RXM1SIDHbits_t __at (0xF1C) RXM1SIDHbits; + +__sfr __at (0xF1D) RXM1SIDL; +volatile __RXM1SIDLbits_t __at (0xF1D) RXM1SIDLbits; + +__sfr __at (0xF1E) RXM1EIDH; +volatile __RXM1EIDHbits_t __at (0xF1E) RXM1EIDHbits; + +__sfr __at (0xF1F) RXM1EIDL; +volatile __RXM1EIDLbits_t __at (0xF1F) RXM1EIDLbits; + +__sfr __at (0xF20) TXB2CON; +volatile __TXB2CONbits_t __at (0xF20) TXB2CONbits; + +__sfr __at (0xF21) TXB2SIDH; +volatile __TXB2SIDHbits_t __at (0xF21) TXB2SIDHbits; + +__sfr __at (0xF22) TXB2SIDL; +volatile __TXB2SIDLbits_t __at (0xF22) TXB2SIDLbits; + +__sfr __at (0xF23) TXB2EIDH; +volatile __TXB2EIDHbits_t __at (0xF23) TXB2EIDHbits; + +__sfr __at (0xF24) TXB2EIDL; +volatile __TXB2EIDLbits_t __at (0xF24) TXB2EIDLbits; + +__sfr __at (0xF25) TXB2DLC; +volatile __TXB2DLCbits_t __at (0xF25) TXB2DLCbits; + +__sfr __at (0xF26) TXB2D0; +volatile __TXB2D0bits_t __at (0xF26) TXB2D0bits; + +__sfr __at (0xF27) TXB2D1; +volatile __TXB2D1bits_t __at (0xF27) TXB2D1bits; + +__sfr __at (0xF28) TXB2D2; +volatile __TXB2D2bits_t __at (0xF28) TXB2D2bits; + +__sfr __at (0xF29) TXB2D3; +volatile __TXB2D3bits_t __at (0xF29) TXB2D3bits; + +__sfr __at (0xF2A) TXB2D4; +volatile __TXB2D4bits_t __at (0xF2A) TXB2D4bits; + +__sfr __at (0xF2B) TXB2D5; +volatile __TXB2D5bits_t __at (0xF2B) TXB2D5bits; + +__sfr __at (0xF2C) TXB2D6; +volatile __TXB2D6bits_t __at (0xF2C) TXB2D6bits; + +__sfr __at (0xF2D) TXB2D7; +volatile __TXB2D7bits_t __at (0xF2D) TXB2D7bits; + +__sfr __at (0xF2E) CANSTAT_RO3; +volatile __CANSTAT_RO3bits_t __at (0xF2E) CANSTAT_RO3bits; + +__sfr __at (0xF2F) CANCON_RO3; +volatile __CANCON_RO3bits_t __at (0xF2F) CANCON_RO3bits; + +__sfr __at (0xF30) TXB1CON; +volatile __TXB1CONbits_t __at (0xF30) TXB1CONbits; + +__sfr __at (0xF31) TXB1SIDH; +volatile __TXB1SIDHbits_t __at (0xF31) TXB1SIDHbits; + +__sfr __at (0xF32) TXB1SIDL; +volatile __TXB1SIDLbits_t __at (0xF32) TXB1SIDLbits; + +__sfr __at (0xF33) TXB1EIDH; +volatile __TXB1EIDHbits_t __at (0xF33) TXB1EIDHbits; + +__sfr __at (0xF34) TXB1EIDL; +volatile __TXB1EIDLbits_t __at (0xF34) TXB1EIDLbits; + +__sfr __at (0xF35) TXB1DLC; +volatile __TXB1DLCbits_t __at (0xF35) TXB1DLCbits; + +__sfr __at (0xF36) TXB1D0; +volatile __TXB1D0bits_t __at (0xF36) TXB1D0bits; + +__sfr __at (0xF37) TXB1D1; +volatile __TXB1D1bits_t __at (0xF37) TXB1D1bits; + +__sfr __at (0xF38) TXB1D2; +volatile __TXB1D2bits_t __at (0xF38) TXB1D2bits; + +__sfr __at (0xF39) TXB1D3; +volatile __TXB1D3bits_t __at (0xF39) TXB1D3bits; + +__sfr __at (0xF3A) TXB1D4; +volatile __TXB1D4bits_t __at (0xF3A) TXB1D4bits; + +__sfr __at (0xF3B) TXB1D5; +volatile __TXB1D5bits_t __at (0xF3B) TXB1D5bits; + +__sfr __at (0xF3C) TXB1D6; +volatile __TXB1D6bits_t __at (0xF3C) TXB1D6bits; + +__sfr __at (0xF3D) TXB1D7; +volatile __TXB1D7bits_t __at (0xF3D) TXB1D7bits; + +__sfr __at (0xF3E) CANSTAT_RO2; +volatile __CANSTAT_RO2bits_t __at (0xF3E) CANSTAT_RO2bits; + +__sfr __at (0xF3F) CANCON_RO2; +volatile __CANCON_RO2bits_t __at (0xF3F) CANCON_RO2bits; + +__sfr __at (0xF40) TXB0CON; +volatile __TXB0CONbits_t __at (0xF40) TXB0CONbits; + +__sfr __at (0xF41) TXB0SIDH; +volatile __TXB0SIDHbits_t __at (0xF41) TXB0SIDHbits; + +__sfr __at (0xF42) TXB0SIDL; +volatile __TXB0SIDLbits_t __at (0xF42) TXB0SIDLbits; + +__sfr __at (0xF43) TXB0EIDH; +volatile __TXB0EIDHbits_t __at (0xF43) TXB0EIDHbits; + +__sfr __at (0xF44) TXB0EIDL; +volatile __TXB0EIDLbits_t __at (0xF44) TXB0EIDLbits; + +__sfr __at (0xF45) TXB0DLC; +volatile __TXB0DLCbits_t __at (0xF45) TXB0DLCbits; + +__sfr __at (0xF46) TXB0D0; +volatile __TXB0D0bits_t __at (0xF46) TXB0D0bits; + +__sfr __at (0xF47) TXB0D1; +volatile __TXB0D1bits_t __at (0xF47) TXB0D1bits; + +__sfr __at (0xF48) TXB0D2; +volatile __TXB0D2bits_t __at (0xF48) TXB0D2bits; + +__sfr __at (0xF49) TXB0D3; +volatile __TXB0D3bits_t __at (0xF49) TXB0D3bits; + +__sfr __at (0xF4A) TXB0D4; +volatile __TXB0D4bits_t __at (0xF4A) TXB0D4bits; + +__sfr __at (0xF4B) TXB0D5; +volatile __TXB0D5bits_t __at (0xF4B) TXB0D5bits; + +__sfr __at (0xF4C) TXB0D6; +volatile __TXB0D6bits_t __at (0xF4C) TXB0D6bits; + +__sfr __at (0xF4D) TXB0D7; +volatile __TXB0D7bits_t __at (0xF4D) TXB0D7bits; + +__sfr __at (0xF4E) CANSTAT_RO1; +volatile __CANSTAT_RO1bits_t __at (0xF4E) CANSTAT_RO1bits; + +__sfr __at (0xF4F) CANCON_RO1; +volatile __CANCON_RO1bits_t __at (0xF4F) CANCON_RO1bits; + +__sfr __at (0xF50) RXB1CON; +volatile __RXB1CONbits_t __at (0xF50) RXB1CONbits; + +__sfr __at (0xF51) RXB1SIDH; +volatile __RXB1SIDHbits_t __at (0xF51) RXB1SIDHbits; + +__sfr __at (0xF52) RXB1SIDL; +volatile __RXB1SIDLbits_t __at (0xF52) RXB1SIDLbits; + +__sfr __at (0xF53) RXB1EIDH; +volatile __RXB1EIDHbits_t __at (0xF53) RXB1EIDHbits; + +__sfr __at (0xF54) RXB1EIDL; +volatile __RXB1EIDLbits_t __at (0xF54) RXB1EIDLbits; + +__sfr __at (0xF55) RXB1DLC; +volatile __RXB1DLCbits_t __at (0xF55) RXB1DLCbits; + +__sfr __at (0xF56) RXB1D0; +volatile __RXB1D0bits_t __at (0xF56) RXB1D0bits; + +__sfr __at (0xF57) RXB1D1; +volatile __RXB1D1bits_t __at (0xF57) RXB1D1bits; + +__sfr __at (0xF58) RXB1D2; +volatile __RXB1D2bits_t __at (0xF58) RXB1D2bits; + +__sfr __at (0xF59) RXB1D3; +volatile __RXB1D3bits_t __at (0xF59) RXB1D3bits; + +__sfr __at (0xF5A) RXB1D4; +volatile __RXB1D4bits_t __at (0xF5A) RXB1D4bits; + +__sfr __at (0xF5B) RXB1D5; +volatile __RXB1D5bits_t __at (0xF5B) RXB1D5bits; + +__sfr __at (0xF5C) RXB1D6; +volatile __RXB1D6bits_t __at (0xF5C) RXB1D6bits; + +__sfr __at (0xF5D) RXB1D7; +volatile __RXB1D7bits_t __at (0xF5D) RXB1D7bits; + +__sfr __at (0xF5E) CANSTAT_RO0; +volatile __CANSTAT_RO0bits_t __at (0xF5E) CANSTAT_RO0bits; + +__sfr __at (0xF5F) CANCON_RO0; +volatile __CANCON_RO0bits_t __at (0xF5F) CANCON_RO0bits; + +__sfr __at (0xF60) RXB0CON; +volatile __RXB0CONbits_t __at (0xF60) RXB0CONbits; + +__sfr __at (0xF61) RXB0SIDH; +volatile __RXB0SIDHbits_t __at (0xF61) RXB0SIDHbits; + +__sfr __at (0xF62) RXB0SIDL; +volatile __RXB0SIDLbits_t __at (0xF62) RXB0SIDLbits; + +__sfr __at (0xF63) RXB0EIDH; +volatile __RXB0EIDHbits_t __at (0xF63) RXB0EIDHbits; + +__sfr __at (0xF64) RXB0EIDL; +volatile __RXB0EIDLbits_t __at (0xF64) RXB0EIDLbits; + +__sfr __at (0xF65) RXB0DLC; +volatile __RXB0DLCbits_t __at (0xF65) RXB0DLCbits; + +__sfr __at (0xF66) RXB0D0; +volatile __RXB0D0bits_t __at (0xF66) RXB0D0bits; + +__sfr __at (0xF67) RXB0D1; +volatile __RXB0D1bits_t __at (0xF67) RXB0D1bits; + +__sfr __at (0xF68) RXB0D2; +volatile __RXB0D2bits_t __at (0xF68) RXB0D2bits; + +__sfr __at (0xF69) RXB0D3; +volatile __RXB0D3bits_t __at (0xF69) RXB0D3bits; + +__sfr __at (0xF6A) RXB0D4; +volatile __RXB0D4bits_t __at (0xF6A) RXB0D4bits; + +__sfr __at (0xF6B) RXB0D5; +volatile __RXB0D5bits_t __at (0xF6B) RXB0D5bits; + +__sfr __at (0xF6C) RXB0D6; +volatile __RXB0D6bits_t __at (0xF6C) RXB0D6bits; + +__sfr __at (0xF6D) RXB0D7; +volatile __RXB0D7bits_t __at (0xF6D) RXB0D7bits; + +__sfr __at (0xF6E) CANSTAT; +volatile __CANSTATbits_t __at (0xF6E) CANSTATbits; + +__sfr __at (0xF6F) CANCON; +volatile __CANCONbits_t __at (0xF6F) CANCONbits; + +__sfr __at (0xF70) BRGCON1; +volatile __BRGCON1bits_t __at (0xF70) BRGCON1bits; + +__sfr __at (0xF71) BRGCON2; +volatile __BRGCON2bits_t __at (0xF71) BRGCON2bits; + +__sfr __at (0xF72) BRGCON3; +volatile __BRGCON3bits_t __at (0xF72) BRGCON3bits; + +__sfr __at (0xF73) CIOCON; +volatile __CIOCONbits_t __at (0xF73) CIOCONbits; + +__sfr __at (0xF74) COMSTAT; +volatile __COMSTATbits_t __at (0xF74) COMSTATbits; + +__sfr __at (0xF75) RXERRCNT; +volatile __RXERRCNTbits_t __at (0xF75) RXERRCNTbits; + +__sfr __at (0xF76) TXERRCNT; +volatile __TXERRCNTbits_t __at (0xF76) TXERRCNTbits; + +__sfr __at (0xF77) ECANCON; +volatile __ECANCONbits_t __at (0xF77) ECANCONbits; + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA3) PIE3; +volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +__sfr __at (0xFA4) PIR3; +volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +__sfr __at (0xFA5) IPR3; +volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFA8) EEDATA; + +__sfr __at (0xFA9) EEADR; + +__sfr __at (0xFAA) EEADRH; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB1) T3CON; +volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +__sfr __at (0xFB2) TMR3L; + +__sfr __at (0xFB3) TMR3H; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) HLVDCON; +volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +__sfr __at (0xFD2) LVDCON; +volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f2682.c b/device/lib/pic16/libdev/pic18f2682.c new file mode 100644 index 0000000..de92136 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2682.c @@ -0,0 +1,12 @@ +/* + * pic18f2682.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include "pic18f2680.c" + diff --git a/device/lib/pic16/libdev/pic18f2685.c b/device/lib/pic16/libdev/pic18f2685.c new file mode 100644 index 0000000..51b0da3 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2685.c @@ -0,0 +1,12 @@ +/* + * pic18f2685.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include "pic18f2680.c" + diff --git a/device/lib/pic16/libdev/pic18f26k20.c b/device/lib/pic16/libdev/pic18f26k20.c new file mode 100644 index 0000000..3836912 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f26k20.c @@ -0,0 +1,6 @@ +/* + * pic18f26k20.c - device specific definitions + */ + +#include "pic18f46k20.c" + diff --git a/device/lib/pic16/libdev/pic18f4220.c b/device/lib/pic16/libdev/pic18f4220.c new file mode 100644 index 0000000..4bd1e44 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4220.c @@ -0,0 +1,222 @@ + +/* + * pic18f4220.c - PIC18F4220 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f4220.c 3835 2005-08-07 20:09:11Z tecodev $ + * + */ + +#include + +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf83) PORTD; +volatile __PORTDbits_t __at (0xf83) PORTDbits; + +__sfr __at (0xf84) PORTE; +volatile __PORTEbits_t __at (0xf84) PORTEbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf8c) LATD; +volatile __LATDbits_t __at (0xf8c) LATDbits; + +__sfr __at (0xf8d) LATE; +volatile __LATEbits_t __at (0xf8d) LATEbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf9b) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xf9b) OSCTUNEbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfab) RCSTA; +volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfb4) CMCON; +volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +__sfr __at (0xfb5) CVRCON; +volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfb7) PWM1CON; +volatile __PWM1CONbits_t __at (0xfb7) PWM1CONbits; + +__sfr __at (0xfb6) ECCPAS; +volatile __ECCPASbits_t __at (0xfb6) ECCPASbits; + +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfbb) CCPR2L; +__sfr __at (0xfbc) CCPR2H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc0) ADCON2; +volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f4221.c b/device/lib/pic16/libdev/pic18f4221.c new file mode 100644 index 0000000..b01acf0 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4221.c @@ -0,0 +1,309 @@ +/* + * pic18f4221.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFA8) EEDATA; + +__sfr __at (0xFA9) EEADR; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB1) T3CON; +volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +__sfr __at (0xFB2) TMR3L; + +__sfr __at (0xFB3) TMR3H; + +__sfr __at (0xFB4) CMCON; +volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +__sfr __at (0xFB7) PWM1CON; +volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFB8) BAUDCTL; +volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBB) CCPR2; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBD) ECCP1CON; +volatile __ECCP1CONbits_t __at (0xFBD) ECCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) HLVDCON; +volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +__sfr __at (0xFD2) LVDCON; +volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f4320.c b/device/lib/pic16/libdev/pic18f4320.c new file mode 100644 index 0000000..866c9dd --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4320.c @@ -0,0 +1,15 @@ +/* + * pic18f4320.c - PIC18F4320 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f4320.c 4914 2007-09-16 18:24:27Z tecodev $ + * + */ + +#include "pic18f4220.c" + diff --git a/device/lib/pic16/libdev/pic18f4321.c b/device/lib/pic16/libdev/pic18f4321.c new file mode 100644 index 0000000..f38e4b5 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4321.c @@ -0,0 +1,309 @@ +/* + * pic18f4321.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFA8) EEDATA; + +__sfr __at (0xFA9) EEADR; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB1) T3CON; +volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +__sfr __at (0xFB2) TMR3L; + +__sfr __at (0xFB3) TMR3H; + +__sfr __at (0xFB4) CMCON; +volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +__sfr __at (0xFB7) PWM1CON; +volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFB8) BAUDCTL; +volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBB) CCPR2; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBD) ECCP1CON; +volatile __ECCP1CONbits_t __at (0xFBD) ECCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) HLVDCON; +volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +__sfr __at (0xFD2) LVDCON; +volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f4331.c b/device/lib/pic16/libdev/pic18f4331.c new file mode 100644 index 0000000..4682401 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4331.c @@ -0,0 +1,416 @@ +/* + * pic18f4331.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xF60) DFLTCON; +volatile __DFLTCONbits_t __at (0xF60) DFLTCONbits; + +__sfr __at (0xF61) CAP3CON; +volatile __CAP3CONbits_t __at (0xF61) CAP3CONbits; + +__sfr __at (0xF62) CAP2CON; +volatile __CAP2CONbits_t __at (0xF62) CAP2CONbits; + +__sfr __at (0xF63) CAP1CON; +volatile __CAP1CONbits_t __at (0xF63) CAP1CONbits; + +__sfr __at (0xF64) CAP3BUFL; + +__sfr __at (0xF64) MAXCNTL; + +__sfr __at (0xF65) CAP3BUFH; + +__sfr __at (0xF65) MAXCNTH; + +__sfr __at (0xF66) CAP2BUFL; + +__sfr __at (0xF66) POSCNTL; + +__sfr __at (0xF67) CAP2BUFH; + +__sfr __at (0xF67) POSCNTH; + +__sfr __at (0xF68) CAP1BUFL; + +__sfr __at (0xF68) VELRL; + +__sfr __at (0xF69) CAP1BUFH; + +__sfr __at (0xF69) VELRH; + +__sfr __at (0xF6A) OVDCONS; +volatile __OVDCONSbits_t __at (0xF6A) OVDCONSbits; + +__sfr __at (0xF6B) OVDCOND; +volatile __OVDCONDbits_t __at (0xF6B) OVDCONDbits; + +__sfr __at (0xF6C) FLTCONFIG; +volatile __FLTCONFIGbits_t __at (0xF6C) FLTCONFIGbits; + +__sfr __at (0xF6D) DTCON; +volatile __DTCONbits_t __at (0xF6D) DTCONbits; + +__sfr __at (0xF6E) PWMCON1; +volatile __PWMCON1bits_t __at (0xF6E) PWMCON1bits; + +__sfr __at (0xF6F) PWMCON0; +volatile __PWMCON0bits_t __at (0xF6F) PWMCON0bits; + +__sfr __at (0xF70) SEVTCMPH; + +__sfr __at (0xF71) SEVTCMPL; + +__sfr __at (0xF72) PDC3H; + +__sfr __at (0xF73) PDC3L; + +__sfr __at (0xF74) PDC2H; + +__sfr __at (0xF75) PDC2L; + +__sfr __at (0xF76) PDC1H; + +__sfr __at (0xF77) PDC1L; + +__sfr __at (0xF78) PDC0H; + +__sfr __at (0xF79) PDC0L; + +__sfr __at (0xF7A) PTPERH; + +__sfr __at (0xF7B) PTPERL; + +__sfr __at (0xF7C) PTMRH; + +__sfr __at (0xF7D) PTMRL; + +__sfr __at (0xF7E) PTCON1; +volatile __PTCON1bits_t __at (0xF7E) PTCON1bits; + +__sfr __at (0xF7F) PTCON0; +volatile __PTCON0bits_t __at (0xF7F) PTCON0bits; + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF87) TMR5L; + +__sfr __at (0xF88) TMR5H; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF90) PR5L; + +__sfr __at (0xF91) PR5H; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) DDRD; +volatile __DDRDbits_t __at (0xF95) DDRDbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) DDRE; +volatile __DDREbits_t __at (0xF96) DDREbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF99) ADCHS; +volatile __ADCHSbits_t __at (0xF99) ADCHSbits; + +__sfr __at (0xF9A) ADCON3; +volatile __ADCON3bits_t __at (0xF9A) ADCON3bits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA3) PIE3; +volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +__sfr __at (0xFA4) PIR3; +volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +__sfr __at (0xFA5) IPR3; +volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFA8) EEDATA; + +__sfr __at (0xFA9) EEADR; + +__sfr __at (0xFAA) BAUDCON; +volatile __BAUDCONbits_t __at (0xFAA) BAUDCONbits; + +__sfr __at (0xFAA) BAUDCTL; +volatile __BAUDCTLbits_t __at (0xFAA) BAUDCTLbits; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB6) QEICON; +volatile __QEICONbits_t __at (0xFB6) QEICONbits; + +__sfr __at (0xFB7) T5CON; +volatile __T5CONbits_t __at (0xFB7) T5CONbits; + +__sfr __at (0xFB8) ANSEL0; +volatile __ANSEL0bits_t __at (0xFB8) ANSEL0bits; + +__sfr __at (0xFB9) ANSEL1; +volatile __ANSEL1bits_t __at (0xFB9) ANSEL1bits; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBB) CCPR2; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC6) SSPCON; +volatile __SSPCONbits_t __at (0xFC6) SSPCONbits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) LVDCON; +volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f43k20.c b/device/lib/pic16/libdev/pic18f43k20.c new file mode 100644 index 0000000..3718ae3 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f43k20.c @@ -0,0 +1,6 @@ +/* + * pic18f43k20.c - device specific definitions + */ + +#include "pic18f46k20.c" + diff --git a/device/lib/pic16/libdev/pic18f4410.c b/device/lib/pic16/libdev/pic18f4410.c new file mode 100644 index 0000000..0cf4378 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4410.c @@ -0,0 +1,6 @@ +/* + * pic18f4410.c - device specific definitions + */ + +#include "pic18f4610.c" + diff --git a/device/lib/pic16/libdev/pic18f442.c b/device/lib/pic16/libdev/pic18f442.c new file mode 100644 index 0000000..0d4c219 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f442.c @@ -0,0 +1,207 @@ + +/* + * pic18f442.c - PIC18F442 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f442.c 3765 2005-05-18 20:32:06Z tecodev $ + * + */ + +#include + +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf83) PORTD; +volatile __PORTDbits_t __at (0xf83) PORTDbits; + +__sfr __at (0xf84) PORTE; +volatile __PORTEbits_t __at (0xf84) PORTEbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf8c) LATD; +volatile __LATDbits_t __at (0xf8c) LATDbits; + +__sfr __at (0xf8d) LATE; +volatile __LATEbits_t __at (0xf8d) LATEbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf95) TRISD; +volatile __TRISDbits_t __at (0xf95) TRISDbits; + +__sfr __at (0xf96) TRISE; +volatile __TRISEbits_t __at (0xf96) TRISEbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfab) RCSTA; +volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfbb) CCPR2L; +__sfr __at (0xfbc) CCPR2H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f4420.c b/device/lib/pic16/libdev/pic18f4420.c new file mode 100644 index 0000000..53f5580 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4420.c @@ -0,0 +1,11 @@ +/* + * pic18f4420.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * (c) 2007 by Raphael Neider + */ + +#include "pic18f4520.c" + diff --git a/device/lib/pic16/libdev/pic18f4423.c b/device/lib/pic16/libdev/pic18f4423.c new file mode 100644 index 0000000..f045e55 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4423.c @@ -0,0 +1,6 @@ +/* + * pic18f4423.c - device specific definitions + */ + +#include "pic18f4523.c" + diff --git a/device/lib/pic16/libdev/pic18f4431.c b/device/lib/pic16/libdev/pic18f4431.c new file mode 100644 index 0000000..6b02db0 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4431.c @@ -0,0 +1,6 @@ +/* + * pic18f4431.c - device specific definitions + */ + +#include "pic18f4331.c" + diff --git a/device/lib/pic16/libdev/pic18f4450.c b/device/lib/pic16/libdev/pic18f4450.c new file mode 100644 index 0000000..f961fa2 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4450.c @@ -0,0 +1,347 @@ +/* + * pic18f4450.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xF66) UFRM; + +__sfr __at (0xF66) UFRML; + +__sfr __at (0xF67) UFRMH; + +__sfr __at (0xF68) UIR; +volatile __UIRbits_t __at (0xF68) UIRbits; + +__sfr __at (0xF69) UIE; +volatile __UIEbits_t __at (0xF69) UIEbits; + +__sfr __at (0xF6A) UEIR; +volatile __UEIRbits_t __at (0xF6A) UEIRbits; + +__sfr __at (0xF6B) UEIE; +volatile __UEIEbits_t __at (0xF6B) UEIEbits; + +__sfr __at (0xF6C) USTAT; +volatile __USTATbits_t __at (0xF6C) USTATbits; + +__sfr __at (0xF6D) UCON; +volatile __UCONbits_t __at (0xF6D) UCONbits; + +__sfr __at (0xF6E) UADDR; +volatile __UADDRbits_t __at (0xF6E) UADDRbits; + +__sfr __at (0xF6F) UCFG; +volatile __UCFGbits_t __at (0xF6F) UCFGbits; + +__sfr __at (0xF70) UEP0; +volatile __UEP0bits_t __at (0xF70) UEP0bits; + +__sfr __at (0xF71) UEP1; +volatile __UEP1bits_t __at (0xF71) UEP1bits; + +__sfr __at (0xF72) UEP2; +volatile __UEP2bits_t __at (0xF72) UEP2bits; + +__sfr __at (0xF73) UEP3; +volatile __UEP3bits_t __at (0xF73) UEP3bits; + +__sfr __at (0xF74) UEP4; +volatile __UEP4bits_t __at (0xF74) UEP4bits; + +__sfr __at (0xF75) UEP5; +volatile __UEP5bits_t __at (0xF75) UEP5bits; + +__sfr __at (0xF76) UEP6; +volatile __UEP6bits_t __at (0xF76) UEP6bits; + +__sfr __at (0xF77) UEP7; +volatile __UEP7bits_t __at (0xF77) UEP7bits; + +__sfr __at (0xF78) UEP8; +volatile __UEP8bits_t __at (0xF78) UEP8bits; + +__sfr __at (0xF79) UEP9; +volatile __UEP9bits_t __at (0xF79) UEP9bits; + +__sfr __at (0xF7A) UEP10; +volatile __UEP10bits_t __at (0xF7A) UEP10bits; + +__sfr __at (0xF7B) UEP11; +volatile __UEP11bits_t __at (0xF7B) UEP11bits; + +__sfr __at (0xF7C) UEP12; +volatile __UEP12bits_t __at (0xF7C) UEP12bits; + +__sfr __at (0xF7D) UEP13; +volatile __UEP13bits_t __at (0xF7D) UEP13bits; + +__sfr __at (0xF7E) UEP14; +volatile __UEP14bits_t __at (0xF7E) UEP14bits; + +__sfr __at (0xF7F) UEP15; +volatile __UEP15bits_t __at (0xF7F) UEP15bits; + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) DDRD; +volatile __DDRDbits_t __at (0xF95) DDRDbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) DDRE; +volatile __DDREbits_t __at (0xF96) DDREbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC9) SSPBUF; /* unimplemented */ + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) HLVDCON; +volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +__sfr __at (0xFD2) LVDCON; +volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f4455.c b/device/lib/pic16/libdev/pic18f4455.c new file mode 100644 index 0000000..dbc6ce2 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4455.c @@ -0,0 +1,6 @@ +/* + * pic18f4455.h - PIC18F4455 Device Library Sources + */ + +#include "pic18f2455.c" + diff --git a/device/lib/pic16/libdev/pic18f448.c b/device/lib/pic16/libdev/pic18f448.c new file mode 100644 index 0000000..e2f96db --- /dev/null +++ b/device/lib/pic16/libdev/pic18f448.c @@ -0,0 +1,560 @@ + +/* + * pic18f448.c - PIC18F448 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f448.c 4906 2007-09-03 09:17:13Z tecodev $ + * + */ + +#include + +__sfr __at (0xf00) RXF0SIDH; +volatile __RXF0SIDHbits_t __at (0xf00) RXF0SIDHbits; + +__sfr __at (0xf01) RXF0SIDL; +volatile __RXF0SIDLbits_t __at (0xf01) RXF0SIDLbits; + +__sfr __at (0xf02) RXF0EIDH; +volatile __RXF0EIDHbits_t __at (0xf02) RXF0EIDHbits; + +__sfr __at (0xf03) RXF0EIDL; +volatile __RXF0EIDLbits_t __at (0xf03) RXF0EIDLbits; + +__sfr __at (0xf04) RXF1SIDH; +volatile __RXF1SIDHbits_t __at (0xf04) RXF1SIDHbits; + +__sfr __at (0xf05) RXF1SIDL; +volatile __RXF1SIDLbits_t __at (0xf05) RXF1SIDLbits; + +__sfr __at (0xf06) RXF1EIDH; +volatile __RXF1EIDHbits_t __at (0xf06) RXF1EIDHbits; + +__sfr __at (0xf07) RXF1EIDL; +volatile __RXF1EIDLbits_t __at (0xf07) RXF1EIDLbits; + +__sfr __at (0xf08) RXF2SIDH; +volatile __RXF2SIDHbits_t __at (0xf08) RXF2SIDHbits; + +__sfr __at (0xf09) RXF2SIDL; +volatile __RXF2SIDLbits_t __at (0xf09) RXF2SIDLbits; + +__sfr __at (0xf0a) RXF2EIDH; +volatile __RXF2EIDHbits_t __at (0xf0a) RXF2EIDHbits; + +__sfr __at (0xf0b) RXF2EIDL; +volatile __RXF2EIDLbits_t __at (0xf0b) RXF2EIDLbits; + +__sfr __at (0xf0c) RXF3SIDH; +volatile __RXF3SIDHbits_t __at (0xf0c) RXF3SIDHbits; + +__sfr __at (0xf0d) RXF3SIDL; +volatile __RXF3SIDLbits_t __at (0xf0d) RXF3SIDLbits; + +__sfr __at (0xf0e) RXF3EIDH; +volatile __RXF3EIDHbits_t __at (0xf0e) RXF3EIDHbits; + +__sfr __at (0xf0f) RXF3EIDL; +volatile __RXF3EIDLbits_t __at (0xf0f) RXF3EIDLbits; + +__sfr __at (0xf10) RXF4SIDH; +volatile __RXF4SIDHbits_t __at (0xf10) RXF4SIDHbits; + +__sfr __at (0xf11) RXF4SIDL; +volatile __RXF4SIDLbits_t __at (0xf11) RXF4SIDLbits; + +__sfr __at (0xf12) RXF4EIDH; +volatile __RXF4EIDHbits_t __at (0xf12) RXF4EIDHbits; + +__sfr __at (0xf13) RXF4EIDL; +volatile __RXF4EIDLbits_t __at (0xf13) RXF4EIDLbits; + +__sfr __at (0xf14) RXF5SIDH; +volatile __RXF5SIDHbits_t __at (0xf14) RXF5SIDHbits; + +__sfr __at (0xf15) RXF5SIDL; +volatile __RXF5SIDLbits_t __at (0xf15) RXF5SIDLbits; + +__sfr __at (0xf16) RXF5EIDH; +volatile __RXF5EIDHbits_t __at (0xf16) RXF5EIDHbits; + +__sfr __at (0xf17) RXF5EIDL; +volatile __RXF5EIDLbits_t __at (0xf17) RXF5EIDLbits; + +__sfr __at (0xf18) RXM0SIDH; +volatile __RXM0SIDHbits_t __at (0xf18) RXM0SIDHbits; + +__sfr __at (0xf19) RXM0SIDL; +volatile __RXM0SIDLbits_t __at (0xf19) RXM0SIDLbits; + +__sfr __at (0xf1a) RXM0EIDH; +volatile __RXM0EIDHbits_t __at (0xf1a) RXM0EIDHbits; + +__sfr __at (0xf1b) RXM0EIDL; +volatile __RXM0EIDLbits_t __at (0xf1b) RXM0EIDLbits; + +__sfr __at (0xf1c) RXM1SIDH; +volatile __RXM1SIDHbits_t __at (0xf1c) RXM1SIDHbits; + +__sfr __at (0xf1d) RXM1SIDL; +volatile __RXM1SIDLbits_t __at (0xf1d) RXM1SIDLbits; + +__sfr __at (0xf1e) RXM1EIDH; +volatile __RXM1EIDHbits_t __at (0xf1e) RXM1EIDHbits; + +__sfr __at (0xf1f) RXM1EIDL; +volatile __RXM1EIDLbits_t __at (0xf1f) RXM1EIDLbits; + +__sfr __at (0xf20) TXB2CON; +volatile __TXB2CONbits_t __at (0xf20) TXB2CONbits; + +__sfr __at (0xf21) TXB2SIDH; +volatile __TXB2SIDHbits_t __at (0xf21) TXB2SIDHbits; + +__sfr __at (0xf22) TXB2SIDL; +volatile __TXB2SIDLbits_t __at (0xf22) TXB2SIDLbits; + +__sfr __at (0xf23) TXB2EIDH; +volatile __TXB2EIDHbits_t __at (0xf23) TXB2EIDHbits; + +__sfr __at (0xf24) TXB2EIDL; +volatile __TXB2EIDLbits_t __at (0xf24) TXB2EIDLbits; + +__sfr __at (0xf25) TXB2DLC; +volatile __TXB2DLCbits_t __at (0xf25) TXB2DLCbits; + +__sfr __at (0xf26) TXB2D0; +volatile __TXB2D0bits_t __at (0xf26) TXB2D0bits; + +__sfr __at (0xf27) TXB2D1; +volatile __TXB2D1bits_t __at (0xf27) TXB2D1bits; + +__sfr __at (0xf28) TXB2D2; +volatile __TXB2D2bits_t __at (0xf28) TXB2D2bits; + +__sfr __at (0xf29) TXB2D3; +volatile __TXB2D3bits_t __at (0xf29) TXB2D3bits; + +__sfr __at (0xf2a) TXB2D4; +volatile __TXB2D4bits_t __at (0xf2a) TXB2D4bits; + +__sfr __at (0xf2b) TXB2D5; +volatile __TXB2D5bits_t __at (0xf2b) TXB2D5bits; + +__sfr __at (0xf2c) TXB2D6; +volatile __TXB2D6bits_t __at (0xf2c) TXB2D6bits; + +__sfr __at (0xf2d) TXB2D7; +volatile __TXB2D7bits_t __at (0xf2d) TXB2D7bits; + +__sfr __at (0xf2e) CANSTATRO4; +volatile __CANSTATRO4bits_t __at (0xf2e) CANSTATRO4bits; + +__sfr __at (0xf30) TXB1CON; +volatile __TXB1CONbits_t __at (0xf30) TXB1CONbits; + +__sfr __at (0xf31) TXB1SIDH; +volatile __TXB1SIDHbits_t __at (0xf31) TXB1SIDHbits; + +__sfr __at (0xf32) TXB1SIDL; +volatile __TXB1SIDLbits_t __at (0xf32) TXB1SIDLbits; + +__sfr __at (0xf33) TXB1EIDH; +volatile __TXB1EIDHbits_t __at (0xf33) TXB1EIDHbits; + +__sfr __at (0xf34) TXB1EIDL; +volatile __TXB1EIDLbits_t __at (0xf34) TXB1EIDLbits; + +__sfr __at (0xf35) TXB1DLC; +volatile __TXB1DLCbits_t __at (0xf35) TXB1DLCbits; + +__sfr __at (0xf36) TXB1D0; +volatile __TXB1D0bits_t __at (0xf36) TXB1D0bits; + +__sfr __at (0xf37) TXB1D1; +volatile __TXB1D1bits_t __at (0xf37) TXB1D1bits; + +__sfr __at (0xf38) TXB1D2; +volatile __TXB1D2bits_t __at (0xf38) TXB1D2bits; + +__sfr __at (0xf39) TXB1D3; +volatile __TXB1D3bits_t __at (0xf39) TXB1D3bits; + +__sfr __at (0xf3a) TXB1D4; +volatile __TXB1D4bits_t __at (0xf3a) TXB1D4bits; + +__sfr __at (0xf3b) TXB1D5; +volatile __TXB1D5bits_t __at (0xf3b) TXB1D5bits; + +__sfr __at (0xf3c) TXB1D6; +volatile __TXB1D6bits_t __at (0xf3c) TXB1D6bits; + +__sfr __at (0xf3d) TXB1D7; +volatile __TXB1D7bits_t __at (0xf3d) TXB1D7bits; + +__sfr __at (0xf3e) CANSTATRO3; +volatile __CANSTATRO3bits_t __at (0xf3e) CANSTATRO3bits; + +__sfr __at (0xf40) TXB0CON; +volatile __TXB0CONbits_t __at (0xf40) TXB0CONbits; + +__sfr __at (0xf41) TXB0SIDH; +volatile __TXB0SIDHbits_t __at (0xf41) TXB0SIDHbits; + +__sfr __at (0xf42) TXB0SIDL; +volatile __TXB0SIDLbits_t __at (0xf42) TXB0SIDLbits; + +__sfr __at (0xf43) TXB0EIDH; +volatile __TXB0EIDHbits_t __at (0xf43) TXB0EIDHbits; + +__sfr __at (0xf44) TXB0EIDL; +volatile __TXB0EIDLbits_t __at (0xf44) TXB0EIDLbits; + +__sfr __at (0xf45) TXB0DLC; +volatile __TXB0DLCbits_t __at (0xf45) TXB0DLCbits; + +__sfr __at (0xf46) TXB0D0; +volatile __TXB0D0bits_t __at (0xf46) TXB0D0bits; + +__sfr __at (0xf47) TXB0D1; +volatile __TXB0D1bits_t __at (0xf47) TXB0D1bits; + +__sfr __at (0xf48) TXB0D2; +volatile __TXB0D2bits_t __at (0xf48) TXB0D2bits; + +__sfr __at (0xf49) TXB0D3; +volatile __TXB0D3bits_t __at (0xf49) TXB0D3bits; + +__sfr __at (0xf4a) TXB0D4; +volatile __TXB0D4bits_t __at (0xf4a) TXB0D4bits; + +__sfr __at (0xf4b) TXB0D5; +volatile __TXB0D5bits_t __at (0xf4b) TXB0D5bits; + +__sfr __at (0xf4c) TXB0D6; +volatile __TXB0D6bits_t __at (0xf4c) TXB0D6bits; + +__sfr __at (0xf4d) TXB0D7; +volatile __TXB0D7bits_t __at (0xf4d) TXB0D7bits; + +__sfr __at (0xf4e) CANSTATRO2; +volatile __CANSTATRO2bits_t __at (0xf4e) CANSTATRO2bits; + +__sfr __at (0xf50) RXB1CON; +volatile __RXB1CONbits_t __at (0xf50) RXB1CONbits; + +__sfr __at (0xf51) RXB1SIDH; +volatile __RXB1SIDHbits_t __at (0xf51) RXB1SIDHbits; + +__sfr __at (0xf52) RXB1SIDL; +volatile __RXB1SIDLbits_t __at (0xf52) RXB1SIDLbits; + +__sfr __at (0xf53) RXB1EIDH; +volatile __RXB1EIDHbits_t __at (0xf53) RXB1EIDHbits; + +__sfr __at (0xf54) RXB1EIDL; +volatile __RXB1EIDLbits_t __at (0xf54) RXB1EIDLbits; + +__sfr __at (0xf55) RXB1DLC; +volatile __RXB1DLCbits_t __at (0xf55) RXB1DLCbits; + +__sfr __at (0xf56) RXB1D0; +volatile __RXB1D0bits_t __at (0xf56) RXB1D0bits; + +__sfr __at (0xf57) RXB1D1; +volatile __RXB1D1bits_t __at (0xf57) RXB1D1bits; + +__sfr __at (0xf58) RXB1D2; +volatile __RXB1D2bits_t __at (0xf58) RXB1D2bits; + +__sfr __at (0xf59) RXB1D3; +volatile __RXB1D3bits_t __at (0xf59) RXB1D3bits; + +__sfr __at (0xf5a) RXB1D4; +volatile __RXB1D4bits_t __at (0xf5a) RXB1D4bits; + +__sfr __at (0xf5b) RXB1D5; +volatile __RXB1D5bits_t __at (0xf5b) RXB1D5bits; + +__sfr __at (0xf5c) RXB1D6; +volatile __RXB1D6bits_t __at (0xf5c) RXB1D6bits; + +__sfr __at (0xf5d) RXB1D7; +volatile __RXB1D7bits_t __at (0xf5d) RXB1D7bits; + +__sfr __at (0xf5e) CANSTATRO1; +volatile __CANSTATRO1bits_t __at (0xf5e) CANSTATRO1bits; + +__sfr __at (0xf60) RXB0CON; +volatile __RXB0CONbits_t __at (0xf60) RXB0CONbits; + +__sfr __at (0xf61) RXB0SIDH; +volatile __RXB0SIDHbits_t __at (0xf61) RXB0SIDHbits; + +__sfr __at (0xf62) RXB0SIDL; +volatile __RXB0SIDLbits_t __at (0xf62) RXB0SIDLbits; + +__sfr __at (0xf63) RXB0EIDH; +volatile __RXB0EIDHbits_t __at (0xf63) RXB0EIDHbits; + +__sfr __at (0xf64) RXB0EIDL; +volatile __RXB0EIDLbits_t __at (0xf64) RXB0EIDLbits; + +__sfr __at (0xf65) RXB0DLC; +volatile __RXB0DLCbits_t __at (0xf65) RXB0DLCbits; + +__sfr __at (0xf66) RXB0D0; +__sfr __at (0xf67) RXB0D1; +__sfr __at (0xf68) RXB0D2; +__sfr __at (0xf69) RXB0D3; +__sfr __at (0xf6a) RXB0D4; +__sfr __at (0xf6b) RXB0D5; +__sfr __at (0xf6c) RXB0D6; +__sfr __at (0xf6d) RXB0D7; +__sfr __at (0xf6e) CANSTAT; +volatile __CANSTATbits_t __at (0xf6e) CANSTATbits; + +__sfr __at (0xf6f) CANCON; +volatile __CANCONbits_t __at (0xf6f) CANCONbits; + +__sfr __at (0xf70) BRGCON1; +volatile __BRGCON1bits_t __at (0xf70) BRGCON1bits; + +__sfr __at (0xf71) BRGCON2; +volatile __BRGCON2bits_t __at (0xf71) BRGCON2bits; + +__sfr __at (0xf72) BRGCON3; +volatile __BRGCON3bits_t __at (0xf72) BRGCON3bits; + +__sfr __at (0xf73) CIOCON; +volatile __CIOCONbits_t __at (0xf73) CIOCONbits; + +__sfr __at (0xf74) COMSTAT; +volatile __COMSTATbits_t __at (0xf74) COMSTATbits; + +__sfr __at (0xf75) RXERRCNT; +volatile __RXERRCNTbits_t __at (0xf75) RXERRCNTbits; + +__sfr __at (0xf76) TXERRCNT; +volatile __TXERRCNTbits_t __at (0xf76) TXERRCNTbits; + +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf83) PORTD; +volatile __PORTDbits_t __at (0xf83) PORTDbits; + +__sfr __at (0xf84) PORTE; +volatile __PORTEbits_t __at (0xf84) PORTEbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf8c) LATD; +volatile __LATDbits_t __at (0xf8c) LATDbits; + +__sfr __at (0xf8d) LATE; +volatile __LATEbits_t __at (0xf8d) LATEbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf95) TRISD; +volatile __TRISDbits_t __at (0xf95) TRISDbits; + +__sfr __at (0xf96) TRISE; +volatile __TRISEbits_t __at (0xf96) TRISEbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa3) PIE3; +volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +__sfr __at (0xfa4) PIR3; +volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +__sfr __at (0xfa5) IPR3; +volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfab) RCSTA; +volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; +__sfr __at (0xfb0) PSPCON; +volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfb4) CMCON; +volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +__sfr __at (0xfb5) CVRCON; +volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +__sfr __at (0xfb6) ECCPAS; +volatile __ECCPASbits_t __at (0xfb6) ECCPASbits; + +__sfr __at (0xfb7) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xfb7) ECCP1DELbits; + +__sfr __at (0xfba) ECCP1CON; +volatile __ECCP1CONbits_t __at (0xfba) ECCP1CONbits; + +__sfr __at (0xfbb) ECCPR1L; +__sfr __at (0xfbc) ECCPR1H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f4480.c b/device/lib/pic16/libdev/pic18f4480.c new file mode 100644 index 0000000..13b8525 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4480.c @@ -0,0 +1,6 @@ +/* + * pic18f4480.c - device specific definitions + */ + +#include "pic18f4580.c" + diff --git a/device/lib/pic16/libdev/pic18f44j10.c b/device/lib/pic16/libdev/pic18f44j10.c new file mode 100644 index 0000000..bbb70ef --- /dev/null +++ b/device/lib/pic16/libdev/pic18f44j10.c @@ -0,0 +1,354 @@ +/* + * pic18f44j10.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF85) SSP2CON2; +volatile __SSP2CON2bits_t __at (0xF85) SSP2CON2bits; + +__sfr __at (0xF86) SSP2CON1; +volatile __SSP2CON1bits_t __at (0xF86) SSP2CON1bits; + +__sfr __at (0xF87) SSP2STAT; +volatile __SSP2STATbits_t __at (0xF87) SSP2STATbits; + +__sfr __at (0xF88) SSP2ADD; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF8E) SSP2BUF; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) DDRD; +volatile __DDRDbits_t __at (0xF95) DDRDbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) DDRE; +volatile __DDREbits_t __at (0xF96) DDREbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA3) PIE3; +volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +__sfr __at (0xFA4) PIR3; +volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +__sfr __at (0xFA5) IPR3; +volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAB) RCSTA1; +volatile __RCSTA1bits_t __at (0xFAB) RCSTA1bits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAC) TXSTA1; +volatile __TXSTA1bits_t __at (0xFAC) TXSTA1bits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAD) TXREG1; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAE) RCREG1; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFAF) SPBRG1; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB4) CMCON; +volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +__sfr __at (0xFB7) PWM1CON; +volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFB8) BAUDCTL; +volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBB) CCPR2; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBD) ECCP1CON; +volatile __ECCP1CONbits_t __at (0xFBD) ECCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSP1CON2; +volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSP1CON1; +volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSP1STAT; +volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSP1ADD; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSP1BUF; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f44k20.c b/device/lib/pic16/libdev/pic18f44k20.c new file mode 100644 index 0000000..c7b53ae --- /dev/null +++ b/device/lib/pic16/libdev/pic18f44k20.c @@ -0,0 +1,6 @@ +/* + * pic18f44k20.c - device specific definitions + */ + +#include "pic18f46k20.c" + diff --git a/device/lib/pic16/libdev/pic18f4510.c b/device/lib/pic16/libdev/pic18f4510.c new file mode 100644 index 0000000..fa1764e --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4510.c @@ -0,0 +1,6 @@ +/* + * pic18f4510.c - device specific definitions + */ + +#include "pic18f4610.c" + diff --git a/device/lib/pic16/libdev/pic18f4515.c b/device/lib/pic16/libdev/pic18f4515.c new file mode 100644 index 0000000..79df4e9 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4515.c @@ -0,0 +1,6 @@ +/* + * pic18f4515.c - device specific definitions + */ + +#include "pic18f4610.c" + diff --git a/device/lib/pic16/libdev/pic18f452.c b/device/lib/pic16/libdev/pic18f452.c new file mode 100644 index 0000000..518b7e4 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f452.c @@ -0,0 +1,207 @@ + +/* + * pic18f452.c - PIC18F452 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f452.c 3765 2005-05-18 20:32:06Z tecodev $ + * + */ + +#include + +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf83) PORTD; +volatile __PORTDbits_t __at (0xf83) PORTDbits; + +__sfr __at (0xf84) PORTE; +volatile __PORTEbits_t __at (0xf84) PORTEbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf8c) LATD; +volatile __LATDbits_t __at (0xf8c) LATDbits; + +__sfr __at (0xf8d) LATE; +volatile __LATEbits_t __at (0xf8d) LATEbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf95) TRISD; +volatile __TRISDbits_t __at (0xf95) TRISDbits; + +__sfr __at (0xf96) TRISE; +volatile __TRISEbits_t __at (0xf96) TRISEbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfab) RCSTA; +volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfbb) CCPR2L; +__sfr __at (0xfbc) CCPR2H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f4520.c b/device/lib/pic16/libdev/pic18f4520.c new file mode 100644 index 0000000..1ed7193 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4520.c @@ -0,0 +1,318 @@ +/* + * pic18f4520.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) DDRD; +volatile __DDRDbits_t __at (0xF95) DDRDbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) DDRE; +volatile __DDREbits_t __at (0xF96) DDREbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFA8) EEDATA; + +__sfr __at (0xFA9) EEADR; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB1) T3CON; +volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +__sfr __at (0xFB2) TMR3L; + +__sfr __at (0xFB3) TMR3H; + +__sfr __at (0xFB4) CMCON; +volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) PWM1CON; +volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFB8) BAUDCTL; +volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBB) CCPR2; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) HLVDCON; +volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +__sfr __at (0xFD2) LVDCON; +volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f4523.c b/device/lib/pic16/libdev/pic18f4523.c new file mode 100644 index 0000000..1fd5fae --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4523.c @@ -0,0 +1,318 @@ +/* + * pic18f4523.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) DDRD; +volatile __DDRDbits_t __at (0xF95) DDRDbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) DDRE; +volatile __DDREbits_t __at (0xF96) DDREbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFA8) EEDATA; + +__sfr __at (0xFA9) EEADR; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB1) T3CON; +volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +__sfr __at (0xFB2) TMR3L; + +__sfr __at (0xFB3) TMR3H; + +__sfr __at (0xFB4) CMCON; +volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) PWM1CON; +volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFB8) BAUDCTL; +volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBB) CCPR2; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) HLVDCON; +volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +__sfr __at (0xFD2) LVDCON; +volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f4525.c b/device/lib/pic16/libdev/pic18f4525.c new file mode 100644 index 0000000..c51ba72 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4525.c @@ -0,0 +1,6 @@ +/* + * pic18f4525.c - PIC18F4525 Device Library Sources + */ + +#include "pic18f4620.c" /* just the same as the 4620 but with less eeprom */ + diff --git a/device/lib/pic16/libdev/pic18f4550.c b/device/lib/pic16/libdev/pic18f4550.c new file mode 100644 index 0000000..cae656d --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4550.c @@ -0,0 +1,6 @@ +/* + * pic18f4550.h - PIC18F4550 Device Library Sources + */ + +#include "pic18f2455.c" + diff --git a/device/lib/pic16/libdev/pic18f458.c b/device/lib/pic16/libdev/pic18f458.c new file mode 100644 index 0000000..50a80f8 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f458.c @@ -0,0 +1,560 @@ + +/* + * pic18f458.c - PIC18F458 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f458.c 3817 2005-07-31 08:51:38Z tecodev $ + * + */ + +#include + +__sfr __at (0xf00) RXF0SIDH; +volatile __RXF0SIDHbits_t __at (0xf00) RXF0SIDHbits; + +__sfr __at (0xf01) RXF0SIDL; +volatile __RXF0SIDLbits_t __at (0xf01) RXF0SIDLbits; + +__sfr __at (0xf02) RXF0EIDH; +volatile __RXF0EIDHbits_t __at (0xf02) RXF0EIDHbits; + +__sfr __at (0xf03) RXF0EIDL; +volatile __RXF0EIDLbits_t __at (0xf03) RXF0EIDLbits; + +__sfr __at (0xf04) RXF1SIDH; +volatile __RXF1SIDHbits_t __at (0xf04) RXF1SIDHbits; + +__sfr __at (0xf05) RXF1SIDL; +volatile __RXF1SIDLbits_t __at (0xf05) RXF1SIDLbits; + +__sfr __at (0xf06) RXF1EIDH; +volatile __RXF1EIDHbits_t __at (0xf06) RXF1EIDHbits; + +__sfr __at (0xf07) RXF1EIDL; +volatile __RXF1EIDLbits_t __at (0xf07) RXF1EIDLbits; + +__sfr __at (0xf08) RXF2SIDH; +volatile __RXF2SIDHbits_t __at (0xf08) RXF2SIDHbits; + +__sfr __at (0xf09) RXF2SIDL; +volatile __RXF2SIDLbits_t __at (0xf09) RXF2SIDLbits; + +__sfr __at (0xf0a) RXF2EIDH; +volatile __RXF2EIDHbits_t __at (0xf0a) RXF2EIDHbits; + +__sfr __at (0xf0b) RXF2EIDL; +volatile __RXF2EIDLbits_t __at (0xf0b) RXF2EIDLbits; + +__sfr __at (0xf0c) RXF3SIDH; +volatile __RXF3SIDHbits_t __at (0xf0c) RXF3SIDHbits; + +__sfr __at (0xf0d) RXF3SIDL; +volatile __RXF3SIDLbits_t __at (0xf0d) RXF3SIDLbits; + +__sfr __at (0xf0e) RXF3EIDH; +volatile __RXF3EIDHbits_t __at (0xf0e) RXF3EIDHbits; + +__sfr __at (0xf0f) RXF3EIDL; +volatile __RXF3EIDLbits_t __at (0xf0f) RXF3EIDLbits; + +__sfr __at (0xf10) RXF4SIDH; +volatile __RXF4SIDHbits_t __at (0xf10) RXF4SIDHbits; + +__sfr __at (0xf11) RXF4SIDL; +volatile __RXF4SIDLbits_t __at (0xf11) RXF4SIDLbits; + +__sfr __at (0xf12) RXF4EIDH; +volatile __RXF4EIDHbits_t __at (0xf12) RXF4EIDHbits; + +__sfr __at (0xf13) RXF4EIDL; +volatile __RXF4EIDLbits_t __at (0xf13) RXF4EIDLbits; + +__sfr __at (0xf14) RXF5SIDH; +volatile __RXF5SIDHbits_t __at (0xf14) RXF5SIDHbits; + +__sfr __at (0xf15) RXF5SIDL; +volatile __RXF5SIDLbits_t __at (0xf15) RXF5SIDLbits; + +__sfr __at (0xf16) RXF5EIDH; +volatile __RXF5EIDHbits_t __at (0xf16) RXF5EIDHbits; + +__sfr __at (0xf17) RXF5EIDL; +volatile __RXF5EIDLbits_t __at (0xf17) RXF5EIDLbits; + +__sfr __at (0xf18) RXM0SIDH; +volatile __RXM0SIDHbits_t __at (0xf18) RXM0SIDHbits; + +__sfr __at (0xf19) RXM0SIDL; +volatile __RXM0SIDLbits_t __at (0xf19) RXM0SIDLbits; + +__sfr __at (0xf1a) RXM0EIDH; +volatile __RXM0EIDHbits_t __at (0xf1a) RXM0EIDHbits; + +__sfr __at (0xf1b) RXM0EIDL; +volatile __RXM0EIDLbits_t __at (0xf1b) RXM0EIDLbits; + +__sfr __at (0xf1c) RXM1SIDH; +volatile __RXM1SIDHbits_t __at (0xf1c) RXM1SIDHbits; + +__sfr __at (0xf1d) RXM1SIDL; +volatile __RXM1SIDLbits_t __at (0xf1d) RXM1SIDLbits; + +__sfr __at (0xf1e) RXM1EIDH; +volatile __RXM1EIDHbits_t __at (0xf1e) RXM1EIDHbits; + +__sfr __at (0xf1f) RXM1EIDL; +volatile __RXM1EIDLbits_t __at (0xf1f) RXM1EIDLbits; + +__sfr __at (0xf20) TXB2CON; +volatile __TXB2CONbits_t __at (0xf20) TXB2CONbits; + +__sfr __at (0xf21) TXB2SIDH; +volatile __TXB2SIDHbits_t __at (0xf21) TXB2SIDHbits; + +__sfr __at (0xf22) TXB2SIDL; +volatile __TXB2SIDLbits_t __at (0xf22) TXB2SIDLbits; + +__sfr __at (0xf23) TXB2EIDH; +volatile __TXB2EIDHbits_t __at (0xf23) TXB2EIDHbits; + +__sfr __at (0xf24) TXB2EIDL; +volatile __TXB2EIDLbits_t __at (0xf24) TXB2EIDLbits; + +__sfr __at (0xf25) TXB2DLC; +volatile __TXB2DLCbits_t __at (0xf25) TXB2DLCbits; + +__sfr __at (0xf26) TXB2D0; +volatile __TXB2D0bits_t __at (0xf26) TXB2D0bits; + +__sfr __at (0xf27) TXB2D1; +volatile __TXB2D1bits_t __at (0xf27) TXB2D1bits; + +__sfr __at (0xf28) TXB2D2; +volatile __TXB2D2bits_t __at (0xf28) TXB2D2bits; + +__sfr __at (0xf29) TXB2D3; +volatile __TXB2D3bits_t __at (0xf29) TXB2D3bits; + +__sfr __at (0xf2a) TXB2D4; +volatile __TXB2D4bits_t __at (0xf2a) TXB2D4bits; + +__sfr __at (0xf2b) TXB2D5; +volatile __TXB2D5bits_t __at (0xf2b) TXB2D5bits; + +__sfr __at (0xf2c) TXB2D6; +volatile __TXB2D6bits_t __at (0xf2c) TXB2D6bits; + +__sfr __at (0xf2d) TXB2D7; +volatile __TXB2D7bits_t __at (0xf2d) TXB2D7bits; + +__sfr __at (0xf2e) CANSTATRO4; +volatile __CANSTATRO4bits_t __at (0xf2e) CANSTATRO4bits; + +__sfr __at (0xf30) TXB1CON; +volatile __TXB1CONbits_t __at (0xf30) TXB1CONbits; + +__sfr __at (0xf31) TXB1SIDH; +volatile __TXB1SIDHbits_t __at (0xf31) TXB1SIDHbits; + +__sfr __at (0xf32) TXB1SIDL; +volatile __TXB1SIDLbits_t __at (0xf32) TXB1SIDLbits; + +__sfr __at (0xf33) TXB1EIDH; +volatile __TXB1EIDHbits_t __at (0xf33) TXB1EIDHbits; + +__sfr __at (0xf34) TXB1EIDL; +volatile __TXB1EIDLbits_t __at (0xf34) TXB1EIDLbits; + +__sfr __at (0xf35) TXB1DLC; +volatile __TXB1DLCbits_t __at (0xf35) TXB1DLCbits; + +__sfr __at (0xf36) TXB1D0; +volatile __TXB1D0bits_t __at (0xf36) TXB1D0bits; + +__sfr __at (0xf37) TXB1D1; +volatile __TXB1D1bits_t __at (0xf37) TXB1D1bits; + +__sfr __at (0xf38) TXB1D2; +volatile __TXB1D2bits_t __at (0xf38) TXB1D2bits; + +__sfr __at (0xf39) TXB1D3; +volatile __TXB1D3bits_t __at (0xf39) TXB1D3bits; + +__sfr __at (0xf3a) TXB1D4; +volatile __TXB1D4bits_t __at (0xf3a) TXB1D4bits; + +__sfr __at (0xf3b) TXB1D5; +volatile __TXB1D5bits_t __at (0xf3b) TXB1D5bits; + +__sfr __at (0xf3c) TXB1D6; +volatile __TXB1D6bits_t __at (0xf3c) TXB1D6bits; + +__sfr __at (0xf3d) TXB1D7; +volatile __TXB1D7bits_t __at (0xf3d) TXB1D7bits; + +__sfr __at (0xf3e) CANSTATRO3; +volatile __CANSTATRO3bits_t __at (0xf3e) CANSTATRO3bits; + +__sfr __at (0xf40) TXB0CON; +volatile __TXB0CONbits_t __at (0xf40) TXB0CONbits; + +__sfr __at (0xf41) TXB0SIDH; +volatile __TXB0SIDHbits_t __at (0xf41) TXB0SIDHbits; + +__sfr __at (0xf42) TXB0SIDL; +volatile __TXB0SIDLbits_t __at (0xf42) TXB0SIDLbits; + +__sfr __at (0xf43) TXB0EIDH; +volatile __TXB0EIDHbits_t __at (0xf43) TXB0EIDHbits; + +__sfr __at (0xf44) TXB0EIDL; +volatile __TXB0EIDLbits_t __at (0xf44) TXB0EIDLbits; + +__sfr __at (0xf45) TXB0DLC; +volatile __TXB0DLCbits_t __at (0xf45) TXB0DLCbits; + +__sfr __at (0xf46) TXB0D0; +volatile __TXB0D0bits_t __at (0xf46) TXB0D0bits; + +__sfr __at (0xf47) TXB0D1; +volatile __TXB0D1bits_t __at (0xf47) TXB0D1bits; + +__sfr __at (0xf48) TXB0D2; +volatile __TXB0D2bits_t __at (0xf48) TXB0D2bits; + +__sfr __at (0xf49) TXB0D3; +volatile __TXB0D3bits_t __at (0xf49) TXB0D3bits; + +__sfr __at (0xf4a) TXB0D4; +volatile __TXB0D4bits_t __at (0xf4a) TXB0D4bits; + +__sfr __at (0xf4b) TXB0D5; +volatile __TXB0D5bits_t __at (0xf4b) TXB0D5bits; + +__sfr __at (0xf4c) TXB0D6; +volatile __TXB0D6bits_t __at (0xf4c) TXB0D6bits; + +__sfr __at (0xf4d) TXB0D7; +volatile __TXB0D7bits_t __at (0xf4d) TXB0D7bits; + +__sfr __at (0xf4e) CANSTATRO2; +volatile __CANSTATRO2bits_t __at (0xf4e) CANSTATRO2bits; + +__sfr __at (0xf50) RXB1CON; +volatile __RXB1CONbits_t __at (0xf50) RXB1CONbits; + +__sfr __at (0xf51) RXB1SIDH; +volatile __RXB1SIDHbits_t __at (0xf51) RXB1SIDHbits; + +__sfr __at (0xf52) RXB1SIDL; +volatile __RXB1SIDLbits_t __at (0xf52) RXB1SIDLbits; + +__sfr __at (0xf53) RXB1EIDH; +volatile __RXB1EIDHbits_t __at (0xf53) RXB1EIDHbits; + +__sfr __at (0xf54) RXB1EIDL; +volatile __RXB1EIDLbits_t __at (0xf54) RXB1EIDLbits; + +__sfr __at (0xf55) RXB1DLC; +volatile __RXB1DLCbits_t __at (0xf55) RXB1DLCbits; + +__sfr __at (0xf56) RXB1D0; +volatile __RXB1D0bits_t __at (0xf56) RXB1D0bits; + +__sfr __at (0xf57) RXB1D1; +volatile __RXB1D1bits_t __at (0xf57) RXB1D1bits; + +__sfr __at (0xf58) RXB1D2; +volatile __RXB1D2bits_t __at (0xf58) RXB1D2bits; + +__sfr __at (0xf59) RXB1D3; +volatile __RXB1D3bits_t __at (0xf59) RXB1D3bits; + +__sfr __at (0xf5a) RXB1D4; +volatile __RXB1D4bits_t __at (0xf5a) RXB1D4bits; + +__sfr __at (0xf5b) RXB1D5; +volatile __RXB1D5bits_t __at (0xf5b) RXB1D5bits; + +__sfr __at (0xf5c) RXB1D6; +volatile __RXB1D6bits_t __at (0xf5c) RXB1D6bits; + +__sfr __at (0xf5d) RXB1D7; +volatile __RXB1D7bits_t __at (0xf5d) RXB1D7bits; + +__sfr __at (0xf5e) CANSTATRO1; +volatile __CANSTATRO1bits_t __at (0xf5e) CANSTATRO1bits; + +__sfr __at (0xf60) RXB0CON; +volatile __RXB0CONbits_t __at (0xf60) RXB0CONbits; + +__sfr __at (0xf61) RXB0SIDH; +volatile __RXB0SIDHbits_t __at (0xf61) RXB0SIDHbits; + +__sfr __at (0xf62) RXB0SIDL; +volatile __RXB0SIDLbits_t __at (0xf62) RXB0SIDLbits; + +__sfr __at (0xf63) RXB0EIDH; +volatile __RXB0EIDHbits_t __at (0xf63) RXB0EIDHbits; + +__sfr __at (0xf64) RXB0EIDL; +volatile __RXB0EIDLbits_t __at (0xf64) RXB0EIDLbits; + +__sfr __at (0xf65) RXB0DLC; +volatile __RXB0DLCbits_t __at (0xf65) RXB0DLCbits; + +__sfr __at (0xf66) RXB0D0; +__sfr __at (0xf67) RXB0D1; +__sfr __at (0xf68) RXB0D2; +__sfr __at (0xf69) RXB0D3; +__sfr __at (0xf6a) RXB0D4; +__sfr __at (0xf6b) RXB0D5; +__sfr __at (0xf6c) RXB0D6; +__sfr __at (0xf6d) RXB0D7; +__sfr __at (0xf6e) CANSTAT; +volatile __CANSTATbits_t __at (0xf6e) CANSTATbits; + +__sfr __at (0xf6f) CANCON; +volatile __CANCONbits_t __at (0xf6f) CANCONbits; + +__sfr __at (0xf70) BRGCON1; +volatile __BRGCON1bits_t __at (0xf70) BRGCON1bits; + +__sfr __at (0xf71) BRGCON2; +volatile __BRGCON2bits_t __at (0xf71) BRGCON2bits; + +__sfr __at (0xf72) BRGCON3; +volatile __BRGCON3bits_t __at (0xf72) BRGCON3bits; + +__sfr __at (0xf73) CIOCON; +volatile __CIOCONbits_t __at (0xf73) CIOCONbits; + +__sfr __at (0xf74) COMSTAT; +volatile __COMSTATbits_t __at (0xf74) COMSTATbits; + +__sfr __at (0xf75) RXERRCNT; +volatile __RXERRCNTbits_t __at (0xf75) RXERRCNTbits; + +__sfr __at (0xf76) TXERRCNT; +volatile __TXERRCNTbits_t __at (0xf76) TXERRCNTbits; + +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf83) PORTD; +volatile __PORTDbits_t __at (0xf83) PORTDbits; + +__sfr __at (0xf84) PORTE; +volatile __PORTEbits_t __at (0xf84) PORTEbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf8c) LATD; +volatile __LATDbits_t __at (0xf8c) LATDbits; + +__sfr __at (0xf8d) LATE; +volatile __LATEbits_t __at (0xf8d) LATEbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf95) TRISD; +volatile __TRISDbits_t __at (0xf95) TRISDbits; + +__sfr __at (0xf96) TRISE; +volatile __TRISEbits_t __at (0xf96) TRISEbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa3) PIE3; +volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +__sfr __at (0xfa4) PIR3; +volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +__sfr __at (0xfa5) IPR3; +volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfab) RCSTA; +volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; +__sfr __at (0xfb0) PSPCON; +volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfb4) CMCON; +volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +__sfr __at (0xfb5) CVRCON; +volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +__sfr __at (0xfb6) ECCPAS; +volatile __ECCPASbits_t __at (0xfb6) ECCPASbits; + +__sfr __at (0xfb7) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xfb7) ECCP1DELbits; + +__sfr __at (0xfba) ECCP1CON; +volatile __ECCP1CONbits_t __at (0xfba) ECCP1CONbits; + +__sfr __at (0xfbb) ECCPR1L; +__sfr __at (0xfbc) ECCPR1H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f4580.c b/device/lib/pic16/libdev/pic18f4580.c new file mode 100644 index 0000000..acbda61 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4580.c @@ -0,0 +1,1146 @@ +/* + * pic18f4580.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xD60) RXF6SIDH; +volatile __RXF6SIDHbits_t __at (0xD60) RXF6SIDHbits; + +__sfr __at (0xD61) RXF6SIDL; +volatile __RXF6SIDLbits_t __at (0xD61) RXF6SIDLbits; + +__sfr __at (0xD62) RXF6EIDH; +volatile __RXF6EIDHbits_t __at (0xD62) RXF6EIDHbits; + +__sfr __at (0xD63) RXF6EIDL; +volatile __RXF6EIDLbits_t __at (0xD63) RXF6EIDLbits; + +__sfr __at (0xD64) RXF7SIDH; +volatile __RXF7SIDHbits_t __at (0xD64) RXF7SIDHbits; + +__sfr __at (0xD65) RXF7SIDL; +volatile __RXF7SIDLbits_t __at (0xD65) RXF7SIDLbits; + +__sfr __at (0xD66) RXF7EIDH; +volatile __RXF7EIDHbits_t __at (0xD66) RXF7EIDHbits; + +__sfr __at (0xD67) RXF7EIDL; +volatile __RXF7EIDLbits_t __at (0xD67) RXF7EIDLbits; + +__sfr __at (0xD68) RXF8SIDH; +volatile __RXF8SIDHbits_t __at (0xD68) RXF8SIDHbits; + +__sfr __at (0xD69) RXF8SIDL; +volatile __RXF8SIDLbits_t __at (0xD69) RXF8SIDLbits; + +__sfr __at (0xD6A) RXF8EIDH; +volatile __RXF8EIDHbits_t __at (0xD6A) RXF8EIDHbits; + +__sfr __at (0xD6B) RXF8EIDL; +volatile __RXF8EIDLbits_t __at (0xD6B) RXF8EIDLbits; + +__sfr __at (0xD70) RXF9SIDH; +volatile __RXF9SIDHbits_t __at (0xD70) RXF9SIDHbits; + +__sfr __at (0xD71) RXF9SIDL; +volatile __RXF9SIDLbits_t __at (0xD71) RXF9SIDLbits; + +__sfr __at (0xD72) RXF9EIDH; +volatile __RXF9EIDHbits_t __at (0xD72) RXF9EIDHbits; + +__sfr __at (0xD73) RXF9EIDL; +volatile __RXF9EIDLbits_t __at (0xD73) RXF9EIDLbits; + +__sfr __at (0xD74) RXF10SIDH; +volatile __RXF10SIDHbits_t __at (0xD74) RXF10SIDHbits; + +__sfr __at (0xD75) RXF10SIDL; +volatile __RXF10SIDLbits_t __at (0xD75) RXF10SIDLbits; + +__sfr __at (0xD76) RXF10EIDH; +volatile __RXF10EIDHbits_t __at (0xD76) RXF10EIDHbits; + +__sfr __at (0xD77) RXF10EIDL; +volatile __RXF10EIDLbits_t __at (0xD77) RXF10EIDLbits; + +__sfr __at (0xD78) RXF11SIDH; +volatile __RXF11SIDHbits_t __at (0xD78) RXF11SIDHbits; + +__sfr __at (0xD79) RXF11SIDL; +volatile __RXF11SIDLbits_t __at (0xD79) RXF11SIDLbits; + +__sfr __at (0xD7A) RXF11EIDH; +volatile __RXF11EIDHbits_t __at (0xD7A) RXF11EIDHbits; + +__sfr __at (0xD7B) RXF11EIDL; +volatile __RXF11EIDLbits_t __at (0xD7B) RXF11EIDLbits; + +__sfr __at (0xD80) RXF12SIDH; +volatile __RXF12SIDHbits_t __at (0xD80) RXF12SIDHbits; + +__sfr __at (0xD81) RXF12SIDL; +volatile __RXF12SIDLbits_t __at (0xD81) RXF12SIDLbits; + +__sfr __at (0xD82) RXF12EIDH; +volatile __RXF12EIDHbits_t __at (0xD82) RXF12EIDHbits; + +__sfr __at (0xD83) RXF12EIDL; +volatile __RXF12EIDLbits_t __at (0xD83) RXF12EIDLbits; + +__sfr __at (0xD84) RXF13SIDH; +volatile __RXF13SIDHbits_t __at (0xD84) RXF13SIDHbits; + +__sfr __at (0xD85) RXF13SIDL; +volatile __RXF13SIDLbits_t __at (0xD85) RXF13SIDLbits; + +__sfr __at (0xD86) RXF13EIDH; +volatile __RXF13EIDHbits_t __at (0xD86) RXF13EIDHbits; + +__sfr __at (0xD87) RXF13EIDL; +volatile __RXF13EIDLbits_t __at (0xD87) RXF13EIDLbits; + +__sfr __at (0xD88) RXF14SIDH; +volatile __RXF14SIDHbits_t __at (0xD88) RXF14SIDHbits; + +__sfr __at (0xD89) RXF14SIDL; +volatile __RXF14SIDLbits_t __at (0xD89) RXF14SIDLbits; + +__sfr __at (0xD8A) RXF14EIDH; +volatile __RXF14EIDHbits_t __at (0xD8A) RXF14EIDHbits; + +__sfr __at (0xD8B) RXF14EIDL; +volatile __RXF14EIDLbits_t __at (0xD8B) RXF14EIDLbits; + +__sfr __at (0xD90) RXF15SIDH; +volatile __RXF15SIDHbits_t __at (0xD90) RXF15SIDHbits; + +__sfr __at (0xD91) RXF15SIDL; +volatile __RXF15SIDLbits_t __at (0xD91) RXF15SIDLbits; + +__sfr __at (0xD92) RXF15EIDH; +volatile __RXF15EIDHbits_t __at (0xD92) RXF15EIDHbits; + +__sfr __at (0xD93) RXF15EIDL; +volatile __RXF15EIDLbits_t __at (0xD93) RXF15EIDLbits; + +__sfr __at (0xDD4) RXFCON0; +volatile __RXFCON0bits_t __at (0xDD4) RXFCON0bits; + +__sfr __at (0xDD5) RXFCON1; +volatile __RXFCON1bits_t __at (0xDD5) RXFCON1bits; + +__sfr __at (0xDD8) SDFLC; +volatile __SDFLCbits_t __at (0xDD8) SDFLCbits; + +__sfr __at (0xDE0) RXFBCON0; +volatile __RXFBCON0bits_t __at (0xDE0) RXFBCON0bits; + +__sfr __at (0xDE1) RXFBCON1; +volatile __RXFBCON1bits_t __at (0xDE1) RXFBCON1bits; + +__sfr __at (0xDE2) RXFBCON2; +volatile __RXFBCON2bits_t __at (0xDE2) RXFBCON2bits; + +__sfr __at (0xDE3) RXFBCON3; +volatile __RXFBCON3bits_t __at (0xDE3) RXFBCON3bits; + +__sfr __at (0xDE4) RXFBCON4; +volatile __RXFBCON4bits_t __at (0xDE4) RXFBCON4bits; + +__sfr __at (0xDE5) RXFBCON5; +volatile __RXFBCON5bits_t __at (0xDE5) RXFBCON5bits; + +__sfr __at (0xDE6) RXFBCON6; +volatile __RXFBCON6bits_t __at (0xDE6) RXFBCON6bits; + +__sfr __at (0xDE7) RXFBCON7; +volatile __RXFBCON7bits_t __at (0xDE7) RXFBCON7bits; + +__sfr __at (0xDF0) MSEL0; +volatile __MSEL0bits_t __at (0xDF0) MSEL0bits; + +__sfr __at (0xDF1) MSEL1; +volatile __MSEL1bits_t __at (0xDF1) MSEL1bits; + +__sfr __at (0xDF2) MSEL2; +volatile __MSEL2bits_t __at (0xDF2) MSEL2bits; + +__sfr __at (0xDF3) MSEL3; +volatile __MSEL3bits_t __at (0xDF3) MSEL3bits; + +__sfr __at (0xDF8) BSEL0; +volatile __BSEL0bits_t __at (0xDF8) BSEL0bits; + +__sfr __at (0xDFA) BIE0; +volatile __BIE0bits_t __at (0xDFA) BIE0bits; + +__sfr __at (0xDFC) TXBIE; +volatile __TXBIEbits_t __at (0xDFC) TXBIEbits; + +__sfr __at (0xE20) B0CON; +volatile __B0CONbits_t __at (0xE20) B0CONbits; + +__sfr __at (0xE21) B0SIDH; +volatile __B0SIDHbits_t __at (0xE21) B0SIDHbits; + +__sfr __at (0xE22) B0SIDL; +volatile __B0SIDLbits_t __at (0xE22) B0SIDLbits; + +__sfr __at (0xE23) B0EIDH; +volatile __B0EIDHbits_t __at (0xE23) B0EIDHbits; + +__sfr __at (0xE24) B0EIDL; +volatile __B0EIDLbits_t __at (0xE24) B0EIDLbits; + +__sfr __at (0xE25) B0DLC; +volatile __B0DLCbits_t __at (0xE25) B0DLCbits; + +__sfr __at (0xE26) B0D0; +volatile __B0D0bits_t __at (0xE26) B0D0bits; + +__sfr __at (0xE27) B0D1; +volatile __B0D1bits_t __at (0xE27) B0D1bits; + +__sfr __at (0xE28) B0D2; +volatile __B0D2bits_t __at (0xE28) B0D2bits; + +__sfr __at (0xE29) B0D3; +volatile __B0D3bits_t __at (0xE29) B0D3bits; + +__sfr __at (0xE2A) B0D4; +volatile __B0D4bits_t __at (0xE2A) B0D4bits; + +__sfr __at (0xE2B) B0D5; +volatile __B0D5bits_t __at (0xE2B) B0D5bits; + +__sfr __at (0xE2C) B0D6; +volatile __B0D6bits_t __at (0xE2C) B0D6bits; + +__sfr __at (0xE2D) B0D7; +volatile __B0D7bits_t __at (0xE2D) B0D7bits; + +__sfr __at (0xE2E) CANSTAT_RO9; +volatile __CANSTAT_RO9bits_t __at (0xE2E) CANSTAT_RO9bits; + +__sfr __at (0xE2F) CANCON_RO9; +volatile __CANCON_RO9bits_t __at (0xE2F) CANCON_RO9bits; + +__sfr __at (0xE30) B1CON; +volatile __B1CONbits_t __at (0xE30) B1CONbits; + +__sfr __at (0xE31) B1SIDH; +volatile __B1SIDHbits_t __at (0xE31) B1SIDHbits; + +__sfr __at (0xE32) B1SIDL; +volatile __B1SIDLbits_t __at (0xE32) B1SIDLbits; + +__sfr __at (0xE33) B1EIDH; +volatile __B1EIDHbits_t __at (0xE33) B1EIDHbits; + +__sfr __at (0xE34) B1EIDL; +volatile __B1EIDLbits_t __at (0xE34) B1EIDLbits; + +__sfr __at (0xE35) B1DLC; +volatile __B1DLCbits_t __at (0xE35) B1DLCbits; + +__sfr __at (0xE36) B1D0; +volatile __B1D0bits_t __at (0xE36) B1D0bits; + +__sfr __at (0xE37) B1D1; +volatile __B1D1bits_t __at (0xE37) B1D1bits; + +__sfr __at (0xE38) B1D2; +volatile __B1D2bits_t __at (0xE38) B1D2bits; + +__sfr __at (0xE39) B1D3; +volatile __B1D3bits_t __at (0xE39) B1D3bits; + +__sfr __at (0xE3A) B1D4; +volatile __B1D4bits_t __at (0xE3A) B1D4bits; + +__sfr __at (0xE3B) B1D5; +volatile __B1D5bits_t __at (0xE3B) B1D5bits; + +__sfr __at (0xE3C) B1D6; +volatile __B1D6bits_t __at (0xE3C) B1D6bits; + +__sfr __at (0xE3D) B1D7; +volatile __B1D7bits_t __at (0xE3D) B1D7bits; + +__sfr __at (0xE3E) CANSTAT_RO8; +volatile __CANSTAT_RO8bits_t __at (0xE3E) CANSTAT_RO8bits; + +__sfr __at (0xE3F) CANCON_RO8; +volatile __CANCON_RO8bits_t __at (0xE3F) CANCON_RO8bits; + +__sfr __at (0xE40) B2CON; +volatile __B2CONbits_t __at (0xE40) B2CONbits; + +__sfr __at (0xE41) B2SIDH; +volatile __B2SIDHbits_t __at (0xE41) B2SIDHbits; + +__sfr __at (0xE42) B2SIDL; +volatile __B2SIDLbits_t __at (0xE42) B2SIDLbits; + +__sfr __at (0xE43) B2EIDH; +volatile __B2EIDHbits_t __at (0xE43) B2EIDHbits; + +__sfr __at (0xE44) B2EIDL; +volatile __B2EIDLbits_t __at (0xE44) B2EIDLbits; + +__sfr __at (0xE45) B2DLC; +volatile __B2DLCbits_t __at (0xE45) B2DLCbits; + +__sfr __at (0xE46) B2D0; +volatile __B2D0bits_t __at (0xE46) B2D0bits; + +__sfr __at (0xE47) B2D1; +volatile __B2D1bits_t __at (0xE47) B2D1bits; + +__sfr __at (0xE48) B2D2; +volatile __B2D2bits_t __at (0xE48) B2D2bits; + +__sfr __at (0xE49) B2D3; +volatile __B2D3bits_t __at (0xE49) B2D3bits; + +__sfr __at (0xE4A) B2D4; +volatile __B2D4bits_t __at (0xE4A) B2D4bits; + +__sfr __at (0xE4B) B2D5; +volatile __B2D5bits_t __at (0xE4B) B2D5bits; + +__sfr __at (0xE4C) B2D6; +volatile __B2D6bits_t __at (0xE4C) B2D6bits; + +__sfr __at (0xE4D) B2D7; +volatile __B2D7bits_t __at (0xE4D) B2D7bits; + +__sfr __at (0xE4E) CANSTAT_RO7; +volatile __CANSTAT_RO7bits_t __at (0xE4E) CANSTAT_RO7bits; + +__sfr __at (0xE4F) CANCON_RO7; +volatile __CANCON_RO7bits_t __at (0xE4F) CANCON_RO7bits; + +__sfr __at (0xE50) B3CON; +volatile __B3CONbits_t __at (0xE50) B3CONbits; + +__sfr __at (0xE51) B3SIDH; +volatile __B3SIDHbits_t __at (0xE51) B3SIDHbits; + +__sfr __at (0xE52) B3SIDL; +volatile __B3SIDLbits_t __at (0xE52) B3SIDLbits; + +__sfr __at (0xE53) B3EIDH; +volatile __B3EIDHbits_t __at (0xE53) B3EIDHbits; + +__sfr __at (0xE54) B3EIDL; +volatile __B3EIDLbits_t __at (0xE54) B3EIDLbits; + +__sfr __at (0xE55) B3DLC; +volatile __B3DLCbits_t __at (0xE55) B3DLCbits; + +__sfr __at (0xE56) B3D0; +volatile __B3D0bits_t __at (0xE56) B3D0bits; + +__sfr __at (0xE57) B3D1; +volatile __B3D1bits_t __at (0xE57) B3D1bits; + +__sfr __at (0xE58) B3D2; +volatile __B3D2bits_t __at (0xE58) B3D2bits; + +__sfr __at (0xE59) B3D3; +volatile __B3D3bits_t __at (0xE59) B3D3bits; + +__sfr __at (0xE5A) B3D4; +volatile __B3D4bits_t __at (0xE5A) B3D4bits; + +__sfr __at (0xE5B) B3D5; +volatile __B3D5bits_t __at (0xE5B) B3D5bits; + +__sfr __at (0xE5C) B3D6; +volatile __B3D6bits_t __at (0xE5C) B3D6bits; + +__sfr __at (0xE5D) B3D7; +volatile __B3D7bits_t __at (0xE5D) B3D7bits; + +__sfr __at (0xE5E) CANSTAT_RO6; +volatile __CANSTAT_RO6bits_t __at (0xE5E) CANSTAT_RO6bits; + +__sfr __at (0xE5F) CANCON_RO6; +volatile __CANCON_RO6bits_t __at (0xE5F) CANCON_RO6bits; + +__sfr __at (0xE60) B4CON; +volatile __B4CONbits_t __at (0xE60) B4CONbits; + +__sfr __at (0xE61) B4SIDH; +volatile __B4SIDHbits_t __at (0xE61) B4SIDHbits; + +__sfr __at (0xE62) B4SIDL; +volatile __B4SIDLbits_t __at (0xE62) B4SIDLbits; + +__sfr __at (0xE63) B4EIDH; +volatile __B4EIDHbits_t __at (0xE63) B4EIDHbits; + +__sfr __at (0xE64) B4EIDL; +volatile __B4EIDLbits_t __at (0xE64) B4EIDLbits; + +__sfr __at (0xE65) B4DLC; +volatile __B4DLCbits_t __at (0xE65) B4DLCbits; + +__sfr __at (0xE66) B4D0; +volatile __B4D0bits_t __at (0xE66) B4D0bits; + +__sfr __at (0xE67) B4D1; +volatile __B4D1bits_t __at (0xE67) B4D1bits; + +__sfr __at (0xE68) B4D2; +volatile __B4D2bits_t __at (0xE68) B4D2bits; + +__sfr __at (0xE69) B4D3; +volatile __B4D3bits_t __at (0xE69) B4D3bits; + +__sfr __at (0xE6A) B4D4; +volatile __B4D4bits_t __at (0xE6A) B4D4bits; + +__sfr __at (0xE6B) B4D5; +volatile __B4D5bits_t __at (0xE6B) B4D5bits; + +__sfr __at (0xE6C) B4D6; +volatile __B4D6bits_t __at (0xE6C) B4D6bits; + +__sfr __at (0xE6D) B4D7; +volatile __B4D7bits_t __at (0xE6D) B4D7bits; + +__sfr __at (0xE6E) CANSTAT_RO5; +volatile __CANSTAT_RO5bits_t __at (0xE6E) CANSTAT_RO5bits; + +__sfr __at (0xE6F) CANCON_RO5; +volatile __CANCON_RO5bits_t __at (0xE6F) CANCON_RO5bits; + +__sfr __at (0xE70) B5CON; +volatile __B5CONbits_t __at (0xE70) B5CONbits; + +__sfr __at (0xE71) B5SIDH; +volatile __B5SIDHbits_t __at (0xE71) B5SIDHbits; + +__sfr __at (0xE72) B5SIDL; +volatile __B5SIDLbits_t __at (0xE72) B5SIDLbits; + +__sfr __at (0xE73) B5EIDH; +volatile __B5EIDHbits_t __at (0xE73) B5EIDHbits; + +__sfr __at (0xE74) B5EIDL; +volatile __B5EIDLbits_t __at (0xE74) B5EIDLbits; + +__sfr __at (0xE75) B5DLC; +volatile __B5DLCbits_t __at (0xE75) B5DLCbits; + +__sfr __at (0xE76) B5D0; +volatile __B5D0bits_t __at (0xE76) B5D0bits; + +__sfr __at (0xE77) B5D1; +volatile __B5D1bits_t __at (0xE77) B5D1bits; + +__sfr __at (0xE78) B5D2; +volatile __B5D2bits_t __at (0xE78) B5D2bits; + +__sfr __at (0xE79) B5D3; +volatile __B5D3bits_t __at (0xE79) B5D3bits; + +__sfr __at (0xE7A) B5D4; +volatile __B5D4bits_t __at (0xE7A) B5D4bits; + +__sfr __at (0xE7B) B5D5; +volatile __B5D5bits_t __at (0xE7B) B5D5bits; + +__sfr __at (0xE7C) B5D6; +volatile __B5D6bits_t __at (0xE7C) B5D6bits; + +__sfr __at (0xE7D) B5D7; +volatile __B5D7bits_t __at (0xE7D) B5D7bits; + +__sfr __at (0xE7E) CANSTAT_RO4; +volatile __CANSTAT_RO4bits_t __at (0xE7E) CANSTAT_RO4bits; + +__sfr __at (0xE7F) CANCON_RO4; +volatile __CANCON_RO4bits_t __at (0xE7F) CANCON_RO4bits; + +__sfr __at (0xF00) RXF0SIDH; +volatile __RXF0SIDHbits_t __at (0xF00) RXF0SIDHbits; + +__sfr __at (0xF01) RXF0SIDL; +volatile __RXF0SIDLbits_t __at (0xF01) RXF0SIDLbits; + +__sfr __at (0xF02) RXF0EIDH; +volatile __RXF0EIDHbits_t __at (0xF02) RXF0EIDHbits; + +__sfr __at (0xF03) RXF0EIDL; +volatile __RXF0EIDLbits_t __at (0xF03) RXF0EIDLbits; + +__sfr __at (0xF04) RXF1SIDH; +volatile __RXF1SIDHbits_t __at (0xF04) RXF1SIDHbits; + +__sfr __at (0xF05) RXF1SIDL; +volatile __RXF1SIDLbits_t __at (0xF05) RXF1SIDLbits; + +__sfr __at (0xF06) RXF1EIDH; +volatile __RXF1EIDHbits_t __at (0xF06) RXF1EIDHbits; + +__sfr __at (0xF07) RXF1EIDL; +volatile __RXF1EIDLbits_t __at (0xF07) RXF1EIDLbits; + +__sfr __at (0xF08) RXF2SIDH; +volatile __RXF2SIDHbits_t __at (0xF08) RXF2SIDHbits; + +__sfr __at (0xF09) RXF2SIDL; +volatile __RXF2SIDLbits_t __at (0xF09) RXF2SIDLbits; + +__sfr __at (0xF0A) RXF2EIDH; +volatile __RXF2EIDHbits_t __at (0xF0A) RXF2EIDHbits; + +__sfr __at (0xF0B) RXF2EIDL; +volatile __RXF2EIDLbits_t __at (0xF0B) RXF2EIDLbits; + +__sfr __at (0xF0C) RXF3SIDH; +volatile __RXF3SIDHbits_t __at (0xF0C) RXF3SIDHbits; + +__sfr __at (0xF0D) RXF3SIDL; +volatile __RXF3SIDLbits_t __at (0xF0D) RXF3SIDLbits; + +__sfr __at (0xF0E) RXF3EIDH; +volatile __RXF3EIDHbits_t __at (0xF0E) RXF3EIDHbits; + +__sfr __at (0xF0F) RXF3EIDL; +volatile __RXF3EIDLbits_t __at (0xF0F) RXF3EIDLbits; + +__sfr __at (0xF10) RXF4SIDH; +volatile __RXF4SIDHbits_t __at (0xF10) RXF4SIDHbits; + +__sfr __at (0xF11) RXF4SIDL; +volatile __RXF4SIDLbits_t __at (0xF11) RXF4SIDLbits; + +__sfr __at (0xF12) RXF4EIDH; +volatile __RXF4EIDHbits_t __at (0xF12) RXF4EIDHbits; + +__sfr __at (0xF13) RXF4EIDL; +volatile __RXF4EIDLbits_t __at (0xF13) RXF4EIDLbits; + +__sfr __at (0xF14) RXF5SIDH; +volatile __RXF5SIDHbits_t __at (0xF14) RXF5SIDHbits; + +__sfr __at (0xF15) RXF5SIDL; +volatile __RXF5SIDLbits_t __at (0xF15) RXF5SIDLbits; + +__sfr __at (0xF16) RXF5EIDH; +volatile __RXF5EIDHbits_t __at (0xF16) RXF5EIDHbits; + +__sfr __at (0xF17) RXF5EIDL; +volatile __RXF5EIDLbits_t __at (0xF17) RXF5EIDLbits; + +__sfr __at (0xF18) RXM0SIDH; +volatile __RXM0SIDHbits_t __at (0xF18) RXM0SIDHbits; + +__sfr __at (0xF19) RXM0SIDL; +volatile __RXM0SIDLbits_t __at (0xF19) RXM0SIDLbits; + +__sfr __at (0xF1A) RXM0EIDH; +volatile __RXM0EIDHbits_t __at (0xF1A) RXM0EIDHbits; + +__sfr __at (0xF1B) RXM0EIDL; +volatile __RXM0EIDLbits_t __at (0xF1B) RXM0EIDLbits; + +__sfr __at (0xF1C) RXM1SIDH; +volatile __RXM1SIDHbits_t __at (0xF1C) RXM1SIDHbits; + +__sfr __at (0xF1D) RXM1SIDL; +volatile __RXM1SIDLbits_t __at (0xF1D) RXM1SIDLbits; + +__sfr __at (0xF1E) RXM1EIDH; +volatile __RXM1EIDHbits_t __at (0xF1E) RXM1EIDHbits; + +__sfr __at (0xF1F) RXM1EIDL; +volatile __RXM1EIDLbits_t __at (0xF1F) RXM1EIDLbits; + +__sfr __at (0xF20) TXB2CON; +volatile __TXB2CONbits_t __at (0xF20) TXB2CONbits; + +__sfr __at (0xF21) TXB2SIDH; +volatile __TXB2SIDHbits_t __at (0xF21) TXB2SIDHbits; + +__sfr __at (0xF22) TXB2SIDL; +volatile __TXB2SIDLbits_t __at (0xF22) TXB2SIDLbits; + +__sfr __at (0xF23) TXB2EIDH; +volatile __TXB2EIDHbits_t __at (0xF23) TXB2EIDHbits; + +__sfr __at (0xF24) TXB2EIDL; +volatile __TXB2EIDLbits_t __at (0xF24) TXB2EIDLbits; + +__sfr __at (0xF25) TXB2DLC; +volatile __TXB2DLCbits_t __at (0xF25) TXB2DLCbits; + +__sfr __at (0xF26) TXB2D0; +volatile __TXB2D0bits_t __at (0xF26) TXB2D0bits; + +__sfr __at (0xF27) TXB2D1; +volatile __TXB2D1bits_t __at (0xF27) TXB2D1bits; + +__sfr __at (0xF28) TXB2D2; +volatile __TXB2D2bits_t __at (0xF28) TXB2D2bits; + +__sfr __at (0xF29) TXB2D3; +volatile __TXB2D3bits_t __at (0xF29) TXB2D3bits; + +__sfr __at (0xF2A) TXB2D4; +volatile __TXB2D4bits_t __at (0xF2A) TXB2D4bits; + +__sfr __at (0xF2B) TXB2D5; +volatile __TXB2D5bits_t __at (0xF2B) TXB2D5bits; + +__sfr __at (0xF2C) TXB2D6; +volatile __TXB2D6bits_t __at (0xF2C) TXB2D6bits; + +__sfr __at (0xF2D) TXB2D7; +volatile __TXB2D7bits_t __at (0xF2D) TXB2D7bits; + +__sfr __at (0xF2E) CANSTAT_RO3; +volatile __CANSTAT_RO3bits_t __at (0xF2E) CANSTAT_RO3bits; + +__sfr __at (0xF2F) CANCON_RO3; +volatile __CANCON_RO3bits_t __at (0xF2F) CANCON_RO3bits; + +__sfr __at (0xF30) TXB1CON; +volatile __TXB1CONbits_t __at (0xF30) TXB1CONbits; + +__sfr __at (0xF31) TXB1SIDH; +volatile __TXB1SIDHbits_t __at (0xF31) TXB1SIDHbits; + +__sfr __at (0xF32) TXB1SIDL; +volatile __TXB1SIDLbits_t __at (0xF32) TXB1SIDLbits; + +__sfr __at (0xF33) TXB1EIDH; +volatile __TXB1EIDHbits_t __at (0xF33) TXB1EIDHbits; + +__sfr __at (0xF34) TXB1EIDL; +volatile __TXB1EIDLbits_t __at (0xF34) TXB1EIDLbits; + +__sfr __at (0xF35) TXB1DLC; +volatile __TXB1DLCbits_t __at (0xF35) TXB1DLCbits; + +__sfr __at (0xF36) TXB1D0; +volatile __TXB1D0bits_t __at (0xF36) TXB1D0bits; + +__sfr __at (0xF37) TXB1D1; +volatile __TXB1D1bits_t __at (0xF37) TXB1D1bits; + +__sfr __at (0xF38) TXB1D2; +volatile __TXB1D2bits_t __at (0xF38) TXB1D2bits; + +__sfr __at (0xF39) TXB1D3; +volatile __TXB1D3bits_t __at (0xF39) TXB1D3bits; + +__sfr __at (0xF3A) TXB1D4; +volatile __TXB1D4bits_t __at (0xF3A) TXB1D4bits; + +__sfr __at (0xF3B) TXB1D5; +volatile __TXB1D5bits_t __at (0xF3B) TXB1D5bits; + +__sfr __at (0xF3C) TXB1D6; +volatile __TXB1D6bits_t __at (0xF3C) TXB1D6bits; + +__sfr __at (0xF3D) TXB1D7; +volatile __TXB1D7bits_t __at (0xF3D) TXB1D7bits; + +__sfr __at (0xF3E) CANSTAT_RO2; +volatile __CANSTAT_RO2bits_t __at (0xF3E) CANSTAT_RO2bits; + +__sfr __at (0xF3F) CANCON_RO2; +volatile __CANCON_RO2bits_t __at (0xF3F) CANCON_RO2bits; + +__sfr __at (0xF40) TXB0CON; +volatile __TXB0CONbits_t __at (0xF40) TXB0CONbits; + +__sfr __at (0xF41) TXB0SIDH; +volatile __TXB0SIDHbits_t __at (0xF41) TXB0SIDHbits; + +__sfr __at (0xF42) TXB0SIDL; +volatile __TXB0SIDLbits_t __at (0xF42) TXB0SIDLbits; + +__sfr __at (0xF43) TXB0EIDH; +volatile __TXB0EIDHbits_t __at (0xF43) TXB0EIDHbits; + +__sfr __at (0xF44) TXB0EIDL; +volatile __TXB0EIDLbits_t __at (0xF44) TXB0EIDLbits; + +__sfr __at (0xF45) TXB0DLC; +volatile __TXB0DLCbits_t __at (0xF45) TXB0DLCbits; + +__sfr __at (0xF46) TXB0D0; +volatile __TXB0D0bits_t __at (0xF46) TXB0D0bits; + +__sfr __at (0xF47) TXB0D1; +volatile __TXB0D1bits_t __at (0xF47) TXB0D1bits; + +__sfr __at (0xF48) TXB0D2; +volatile __TXB0D2bits_t __at (0xF48) TXB0D2bits; + +__sfr __at (0xF49) TXB0D3; +volatile __TXB0D3bits_t __at (0xF49) TXB0D3bits; + +__sfr __at (0xF4A) TXB0D4; +volatile __TXB0D4bits_t __at (0xF4A) TXB0D4bits; + +__sfr __at (0xF4B) TXB0D5; +volatile __TXB0D5bits_t __at (0xF4B) TXB0D5bits; + +__sfr __at (0xF4C) TXB0D6; +volatile __TXB0D6bits_t __at (0xF4C) TXB0D6bits; + +__sfr __at (0xF4D) TXB0D7; +volatile __TXB0D7bits_t __at (0xF4D) TXB0D7bits; + +__sfr __at (0xF4E) CANSTAT_RO1; +volatile __CANSTAT_RO1bits_t __at (0xF4E) CANSTAT_RO1bits; + +__sfr __at (0xF4F) CANCON_RO1; +volatile __CANCON_RO1bits_t __at (0xF4F) CANCON_RO1bits; + +__sfr __at (0xF50) RXB1CON; +volatile __RXB1CONbits_t __at (0xF50) RXB1CONbits; + +__sfr __at (0xF51) RXB1SIDH; +volatile __RXB1SIDHbits_t __at (0xF51) RXB1SIDHbits; + +__sfr __at (0xF52) RXB1SIDL; +volatile __RXB1SIDLbits_t __at (0xF52) RXB1SIDLbits; + +__sfr __at (0xF53) RXB1EIDH; +volatile __RXB1EIDHbits_t __at (0xF53) RXB1EIDHbits; + +__sfr __at (0xF54) RXB1EIDL; +volatile __RXB1EIDLbits_t __at (0xF54) RXB1EIDLbits; + +__sfr __at (0xF55) RXB1DLC; +volatile __RXB1DLCbits_t __at (0xF55) RXB1DLCbits; + +__sfr __at (0xF56) RXB1D0; +volatile __RXB1D0bits_t __at (0xF56) RXB1D0bits; + +__sfr __at (0xF57) RXB1D1; +volatile __RXB1D1bits_t __at (0xF57) RXB1D1bits; + +__sfr __at (0xF58) RXB1D2; +volatile __RXB1D2bits_t __at (0xF58) RXB1D2bits; + +__sfr __at (0xF59) RXB1D3; +volatile __RXB1D3bits_t __at (0xF59) RXB1D3bits; + +__sfr __at (0xF5A) RXB1D4; +volatile __RXB1D4bits_t __at (0xF5A) RXB1D4bits; + +__sfr __at (0xF5B) RXB1D5; +volatile __RXB1D5bits_t __at (0xF5B) RXB1D5bits; + +__sfr __at (0xF5C) RXB1D6; +volatile __RXB1D6bits_t __at (0xF5C) RXB1D6bits; + +__sfr __at (0xF5D) RXB1D7; +volatile __RXB1D7bits_t __at (0xF5D) RXB1D7bits; + +__sfr __at (0xF5E) CANSTAT_RO0; +volatile __CANSTAT_RO0bits_t __at (0xF5E) CANSTAT_RO0bits; + +__sfr __at (0xF5F) CANCON_RO0; +volatile __CANCON_RO0bits_t __at (0xF5F) CANCON_RO0bits; + +__sfr __at (0xF60) RXB0CON; +volatile __RXB0CONbits_t __at (0xF60) RXB0CONbits; + +__sfr __at (0xF61) RXB0SIDH; +volatile __RXB0SIDHbits_t __at (0xF61) RXB0SIDHbits; + +__sfr __at (0xF62) RXB0SIDL; +volatile __RXB0SIDLbits_t __at (0xF62) RXB0SIDLbits; + +__sfr __at (0xF63) RXB0EIDH; +volatile __RXB0EIDHbits_t __at (0xF63) RXB0EIDHbits; + +__sfr __at (0xF64) RXB0EIDL; +volatile __RXB0EIDLbits_t __at (0xF64) RXB0EIDLbits; + +__sfr __at (0xF65) RXB0DLC; +volatile __RXB0DLCbits_t __at (0xF65) RXB0DLCbits; + +__sfr __at (0xF66) RXB0D0; +volatile __RXB0D0bits_t __at (0xF66) RXB0D0bits; + +__sfr __at (0xF67) RXB0D1; +volatile __RXB0D1bits_t __at (0xF67) RXB0D1bits; + +__sfr __at (0xF68) RXB0D2; +volatile __RXB0D2bits_t __at (0xF68) RXB0D2bits; + +__sfr __at (0xF69) RXB0D3; +volatile __RXB0D3bits_t __at (0xF69) RXB0D3bits; + +__sfr __at (0xF6A) RXB0D4; +volatile __RXB0D4bits_t __at (0xF6A) RXB0D4bits; + +__sfr __at (0xF6B) RXB0D5; +volatile __RXB0D5bits_t __at (0xF6B) RXB0D5bits; + +__sfr __at (0xF6C) RXB0D6; +volatile __RXB0D6bits_t __at (0xF6C) RXB0D6bits; + +__sfr __at (0xF6D) RXB0D7; +volatile __RXB0D7bits_t __at (0xF6D) RXB0D7bits; + +__sfr __at (0xF6E) CANSTAT; +volatile __CANSTATbits_t __at (0xF6E) CANSTATbits; + +__sfr __at (0xF6F) CANCON; +volatile __CANCONbits_t __at (0xF6F) CANCONbits; + +__sfr __at (0xF70) BRGCON1; +volatile __BRGCON1bits_t __at (0xF70) BRGCON1bits; + +__sfr __at (0xF71) BRGCON2; +volatile __BRGCON2bits_t __at (0xF71) BRGCON2bits; + +__sfr __at (0xF72) BRGCON3; +volatile __BRGCON3bits_t __at (0xF72) BRGCON3bits; + +__sfr __at (0xF73) CIOCON; +volatile __CIOCONbits_t __at (0xF73) CIOCONbits; + +__sfr __at (0xF74) COMSTAT; +volatile __COMSTATbits_t __at (0xF74) COMSTATbits; + +__sfr __at (0xF75) RXERRCNT; +volatile __RXERRCNTbits_t __at (0xF75) RXERRCNTbits; + +__sfr __at (0xF76) TXERRCNT; +volatile __TXERRCNTbits_t __at (0xF76) TXERRCNTbits; + +__sfr __at (0xF77) ECANCON; +volatile __ECANCONbits_t __at (0xF77) ECANCONbits; + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) DDRD; +volatile __DDRDbits_t __at (0xF95) DDRDbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) DDRE; +volatile __DDREbits_t __at (0xF96) DDREbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA3) PIE3; +volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +__sfr __at (0xFA4) PIR3; +volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +__sfr __at (0xFA5) IPR3; +volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFA8) EEDATA; + +__sfr __at (0xFA9) EEADR; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB1) T3CON; +volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +__sfr __at (0xFB2) TMR3L; + +__sfr __at (0xFB3) TMR3H; + +__sfr __at (0xFB4) CMCON; +volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFBA) ECCP1CON; +volatile __ECCP1CONbits_t __at (0xFBA) ECCP1CONbits; + +__sfr __at (0xFBB) ECCPR1; + +__sfr __at (0xFBB) ECCPR1L; + +__sfr __at (0xFBC) ECCPR1H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) HLVDCON; +volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +__sfr __at (0xFD2) LVDCON; +volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f4585.c b/device/lib/pic16/libdev/pic18f4585.c new file mode 100644 index 0000000..8b229b2 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4585.c @@ -0,0 +1,12 @@ +/* + * pic18f4585.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include "pic18f4680.c" + diff --git a/device/lib/pic16/libdev/pic18f45j10.c b/device/lib/pic16/libdev/pic18f45j10.c new file mode 100644 index 0000000..cb09c09 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f45j10.c @@ -0,0 +1,11 @@ +/* + * pic18f45j10.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include "pic18f44j10.c" diff --git a/device/lib/pic16/libdev/pic18f45k20.c b/device/lib/pic16/libdev/pic18f45k20.c new file mode 100644 index 0000000..da3d215 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f45k20.c @@ -0,0 +1,6 @@ +/* + * pic18f45k20.c - device specific definitions + */ + +#include "pic18f46k20.c" + diff --git a/device/lib/pic16/libdev/pic18f4610.c b/device/lib/pic16/libdev/pic18f4610.c new file mode 100644 index 0000000..4390a4d --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4610.c @@ -0,0 +1,312 @@ +/* + * pic18f4610.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) DDRD; +volatile __DDRDbits_t __at (0xF95) DDRDbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) DDRE; +volatile __DDREbits_t __at (0xF96) DDREbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB1) T3CON; +volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +__sfr __at (0xFB2) TMR3L; + +__sfr __at (0xFB3) TMR3H; + +__sfr __at (0xFB4) CMCON; +volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB6) ECCPAS; +volatile __ECCPASbits_t __at (0xFB6) ECCPASbits; + +__sfr __at (0xFB7) PWM1CON; +volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFB8) BAUDCTL; +volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBB) CCPR2; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) HLVDCON; +volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +__sfr __at (0xFD2) LVDCON; +volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f4620.c b/device/lib/pic16/libdev/pic18f4620.c new file mode 100644 index 0000000..de4d570 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4620.c @@ -0,0 +1,305 @@ +/* + * pic18f4620.c - PIC18F4620 Device Library Sources + * + * This file is part of the GNU PIC Library. + * + * September, 2006 + * Added modifications by + * Anton Strobl + * + * September, 2006 + * Added based on existing PICs + * Gary Plumbridge + * + * May, 2005 + * The GNU PIC Library is maintained by + * Raphael Neider + * + * originally designed by + * Vangelis Rokas + * + * $Id: pic18f4620.c 5085 2008-03-09 22:12:13Z tecodev $ + * + */ + +#include + +__sfr __at (0xF80) PORTA; +volatile __PORTA_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTB_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTC_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTD_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTE_t __at (0xF84) PORTEbits; + +__sfr __at (0xF89) LATA; +volatile __LATA_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATB_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATC_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATD_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATE_t __at (0xF8D) LATEbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISA_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISB_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISC_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISD_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISE_t __at (0xF96) TRISEbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNE_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFA8) EEDATA; + +__sfr __at (0xFA9) EEADR; + +__sfr __at (0xFAA) EEADRH; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTA_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTA_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB1) T3CON; +volatile __T3CON_t __at (0xFB1) T3CONbits; + +__sfr __at (0xFB2) TMR3L; + +__sfr __at (0xFB3) TMR3H; + +__sfr __at (0xFB4) CMCON; +volatile __CMCON_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCON_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1AS_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) PWM1CON; +volatile __PWM1CON_t __at (0xFB7) PWM1CONbits; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCON_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CON_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CON_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTAT_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CON_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CON_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCON_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCON_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) HLVDCON; +volatile __HLVDCON_t __at (0xFD2) HLVDCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCON_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CON_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUS_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; +volatile __FSR2H_t __at (0xFDA) FSR2Hbits; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; +volatile __BSR_t __at (0xFE0) BSRbits; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; +volatile __FSR1H_t __at (0xFE2) FSR1Hbits; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; +volatile __FSR0H_t __at (0xFEA) FSR0Hbits; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCON_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; +volatile __TBLPTRU_t __at (0xFF8) TBLPTRUbits; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; +volatile __PCLATH_t __at (0xFFA) PCLATHbits; + +__sfr __at (0xFFB) PCLATU; +volatile __PCLATU_t __at (0xFFB) PCLATUbits; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTR_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; +volatile __TOSU_t __at (0xFFF) TOSUbits; + diff --git a/device/lib/pic16/libdev/pic18f4680.c b/device/lib/pic16/libdev/pic18f4680.c new file mode 100644 index 0000000..9d09cf6 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4680.c @@ -0,0 +1,1148 @@ +/* + * pic18f4680.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xD60) RXF6SIDH; +volatile __RXF6SIDHbits_t __at (0xD60) RXF6SIDHbits; + +__sfr __at (0xD61) RXF6SIDL; +volatile __RXF6SIDLbits_t __at (0xD61) RXF6SIDLbits; + +__sfr __at (0xD62) RXF6EIDH; +volatile __RXF6EIDHbits_t __at (0xD62) RXF6EIDHbits; + +__sfr __at (0xD63) RXF6EIDL; +volatile __RXF6EIDLbits_t __at (0xD63) RXF6EIDLbits; + +__sfr __at (0xD64) RXF7SIDH; +volatile __RXF7SIDHbits_t __at (0xD64) RXF7SIDHbits; + +__sfr __at (0xD65) RXF7SIDL; +volatile __RXF7SIDLbits_t __at (0xD65) RXF7SIDLbits; + +__sfr __at (0xD66) RXF7EIDH; +volatile __RXF7EIDHbits_t __at (0xD66) RXF7EIDHbits; + +__sfr __at (0xD67) RXF7EIDL; +volatile __RXF7EIDLbits_t __at (0xD67) RXF7EIDLbits; + +__sfr __at (0xD68) RXF8SIDH; +volatile __RXF8SIDHbits_t __at (0xD68) RXF8SIDHbits; + +__sfr __at (0xD69) RXF8SIDL; +volatile __RXF8SIDLbits_t __at (0xD69) RXF8SIDLbits; + +__sfr __at (0xD6A) RXF8EIDH; +volatile __RXF8EIDHbits_t __at (0xD6A) RXF8EIDHbits; + +__sfr __at (0xD6B) RXF8EIDL; +volatile __RXF8EIDLbits_t __at (0xD6B) RXF8EIDLbits; + +__sfr __at (0xD70) RXF9SIDH; +volatile __RXF9SIDHbits_t __at (0xD70) RXF9SIDHbits; + +__sfr __at (0xD71) RXF9SIDL; +volatile __RXF9SIDLbits_t __at (0xD71) RXF9SIDLbits; + +__sfr __at (0xD72) RXF9EIDH; +volatile __RXF9EIDHbits_t __at (0xD72) RXF9EIDHbits; + +__sfr __at (0xD73) RXF9EIDL; +volatile __RXF9EIDLbits_t __at (0xD73) RXF9EIDLbits; + +__sfr __at (0xD74) RXF10SIDH; +volatile __RXF10SIDHbits_t __at (0xD74) RXF10SIDHbits; + +__sfr __at (0xD75) RXF10SIDL; +volatile __RXF10SIDLbits_t __at (0xD75) RXF10SIDLbits; + +__sfr __at (0xD76) RXF10EIDH; +volatile __RXF10EIDHbits_t __at (0xD76) RXF10EIDHbits; + +__sfr __at (0xD77) RXF10EIDL; +volatile __RXF10EIDLbits_t __at (0xD77) RXF10EIDLbits; + +__sfr __at (0xD78) RXF11SIDH; +volatile __RXF11SIDHbits_t __at (0xD78) RXF11SIDHbits; + +__sfr __at (0xD79) RXF11SIDL; +volatile __RXF11SIDLbits_t __at (0xD79) RXF11SIDLbits; + +__sfr __at (0xD7A) RXF11EIDH; +volatile __RXF11EIDHbits_t __at (0xD7A) RXF11EIDHbits; + +__sfr __at (0xD7B) RXF11EIDL; +volatile __RXF11EIDLbits_t __at (0xD7B) RXF11EIDLbits; + +__sfr __at (0xD80) RXF12SIDH; +volatile __RXF12SIDHbits_t __at (0xD80) RXF12SIDHbits; + +__sfr __at (0xD81) RXF12SIDL; +volatile __RXF12SIDLbits_t __at (0xD81) RXF12SIDLbits; + +__sfr __at (0xD82) RXF12EIDH; +volatile __RXF12EIDHbits_t __at (0xD82) RXF12EIDHbits; + +__sfr __at (0xD83) RXF12EIDL; +volatile __RXF12EIDLbits_t __at (0xD83) RXF12EIDLbits; + +__sfr __at (0xD84) RXF13SIDH; +volatile __RXF13SIDHbits_t __at (0xD84) RXF13SIDHbits; + +__sfr __at (0xD85) RXF13SIDL; +volatile __RXF13SIDLbits_t __at (0xD85) RXF13SIDLbits; + +__sfr __at (0xD86) RXF13EIDH; +volatile __RXF13EIDHbits_t __at (0xD86) RXF13EIDHbits; + +__sfr __at (0xD87) RXF13EIDL; +volatile __RXF13EIDLbits_t __at (0xD87) RXF13EIDLbits; + +__sfr __at (0xD88) RXF14SIDH; +volatile __RXF14SIDHbits_t __at (0xD88) RXF14SIDHbits; + +__sfr __at (0xD89) RXF14SIDL; +volatile __RXF14SIDLbits_t __at (0xD89) RXF14SIDLbits; + +__sfr __at (0xD8A) RXF14EIDH; +volatile __RXF14EIDHbits_t __at (0xD8A) RXF14EIDHbits; + +__sfr __at (0xD8B) RXF14EIDL; +volatile __RXF14EIDLbits_t __at (0xD8B) RXF14EIDLbits; + +__sfr __at (0xD90) RXF15SIDH; +volatile __RXF15SIDHbits_t __at (0xD90) RXF15SIDHbits; + +__sfr __at (0xD91) RXF15SIDL; +volatile __RXF15SIDLbits_t __at (0xD91) RXF15SIDLbits; + +__sfr __at (0xD92) RXF15EIDH; +volatile __RXF15EIDHbits_t __at (0xD92) RXF15EIDHbits; + +__sfr __at (0xD93) RXF15EIDL; +volatile __RXF15EIDLbits_t __at (0xD93) RXF15EIDLbits; + +__sfr __at (0xDD4) RXFCON0; +volatile __RXFCON0bits_t __at (0xDD4) RXFCON0bits; + +__sfr __at (0xDD5) RXFCON1; +volatile __RXFCON1bits_t __at (0xDD5) RXFCON1bits; + +__sfr __at (0xDD8) SDFLC; +volatile __SDFLCbits_t __at (0xDD8) SDFLCbits; + +__sfr __at (0xDE0) RXFBCON0; +volatile __RXFBCON0bits_t __at (0xDE0) RXFBCON0bits; + +__sfr __at (0xDE1) RXFBCON1; +volatile __RXFBCON1bits_t __at (0xDE1) RXFBCON1bits; + +__sfr __at (0xDE2) RXFBCON2; +volatile __RXFBCON2bits_t __at (0xDE2) RXFBCON2bits; + +__sfr __at (0xDE3) RXFBCON3; +volatile __RXFBCON3bits_t __at (0xDE3) RXFBCON3bits; + +__sfr __at (0xDE4) RXFBCON4; +volatile __RXFBCON4bits_t __at (0xDE4) RXFBCON4bits; + +__sfr __at (0xDE5) RXFBCON5; +volatile __RXFBCON5bits_t __at (0xDE5) RXFBCON5bits; + +__sfr __at (0xDE6) RXFBCON6; +volatile __RXFBCON6bits_t __at (0xDE6) RXFBCON6bits; + +__sfr __at (0xDE7) RXFBCON7; +volatile __RXFBCON7bits_t __at (0xDE7) RXFBCON7bits; + +__sfr __at (0xDF0) MSEL0; +volatile __MSEL0bits_t __at (0xDF0) MSEL0bits; + +__sfr __at (0xDF1) MSEL1; +volatile __MSEL1bits_t __at (0xDF1) MSEL1bits; + +__sfr __at (0xDF2) MSEL2; +volatile __MSEL2bits_t __at (0xDF2) MSEL2bits; + +__sfr __at (0xDF3) MSEL3; +volatile __MSEL3bits_t __at (0xDF3) MSEL3bits; + +__sfr __at (0xDF8) BSEL0; +volatile __BSEL0bits_t __at (0xDF8) BSEL0bits; + +__sfr __at (0xDFA) BIE0; +volatile __BIE0bits_t __at (0xDFA) BIE0bits; + +__sfr __at (0xDFC) TXBIE; +volatile __TXBIEbits_t __at (0xDFC) TXBIEbits; + +__sfr __at (0xE20) B0CON; +volatile __B0CONbits_t __at (0xE20) B0CONbits; + +__sfr __at (0xE21) B0SIDH; +volatile __B0SIDHbits_t __at (0xE21) B0SIDHbits; + +__sfr __at (0xE22) B0SIDL; +volatile __B0SIDLbits_t __at (0xE22) B0SIDLbits; + +__sfr __at (0xE23) B0EIDH; +volatile __B0EIDHbits_t __at (0xE23) B0EIDHbits; + +__sfr __at (0xE24) B0EIDL; +volatile __B0EIDLbits_t __at (0xE24) B0EIDLbits; + +__sfr __at (0xE25) B0DLC; +volatile __B0DLCbits_t __at (0xE25) B0DLCbits; + +__sfr __at (0xE26) B0D0; +volatile __B0D0bits_t __at (0xE26) B0D0bits; + +__sfr __at (0xE27) B0D1; +volatile __B0D1bits_t __at (0xE27) B0D1bits; + +__sfr __at (0xE28) B0D2; +volatile __B0D2bits_t __at (0xE28) B0D2bits; + +__sfr __at (0xE29) B0D3; +volatile __B0D3bits_t __at (0xE29) B0D3bits; + +__sfr __at (0xE2A) B0D4; +volatile __B0D4bits_t __at (0xE2A) B0D4bits; + +__sfr __at (0xE2B) B0D5; +volatile __B0D5bits_t __at (0xE2B) B0D5bits; + +__sfr __at (0xE2C) B0D6; +volatile __B0D6bits_t __at (0xE2C) B0D6bits; + +__sfr __at (0xE2D) B0D7; +volatile __B0D7bits_t __at (0xE2D) B0D7bits; + +__sfr __at (0xE2E) CANSTAT_RO9; +volatile __CANSTAT_RO9bits_t __at (0xE2E) CANSTAT_RO9bits; + +__sfr __at (0xE2F) CANCON_RO9; +volatile __CANCON_RO9bits_t __at (0xE2F) CANCON_RO9bits; + +__sfr __at (0xE30) B1CON; +volatile __B1CONbits_t __at (0xE30) B1CONbits; + +__sfr __at (0xE31) B1SIDH; +volatile __B1SIDHbits_t __at (0xE31) B1SIDHbits; + +__sfr __at (0xE32) B1SIDL; +volatile __B1SIDLbits_t __at (0xE32) B1SIDLbits; + +__sfr __at (0xE33) B1EIDH; +volatile __B1EIDHbits_t __at (0xE33) B1EIDHbits; + +__sfr __at (0xE34) B1EIDL; +volatile __B1EIDLbits_t __at (0xE34) B1EIDLbits; + +__sfr __at (0xE35) B1DLC; +volatile __B1DLCbits_t __at (0xE35) B1DLCbits; + +__sfr __at (0xE36) B1D0; +volatile __B1D0bits_t __at (0xE36) B1D0bits; + +__sfr __at (0xE37) B1D1; +volatile __B1D1bits_t __at (0xE37) B1D1bits; + +__sfr __at (0xE38) B1D2; +volatile __B1D2bits_t __at (0xE38) B1D2bits; + +__sfr __at (0xE39) B1D3; +volatile __B1D3bits_t __at (0xE39) B1D3bits; + +__sfr __at (0xE3A) B1D4; +volatile __B1D4bits_t __at (0xE3A) B1D4bits; + +__sfr __at (0xE3B) B1D5; +volatile __B1D5bits_t __at (0xE3B) B1D5bits; + +__sfr __at (0xE3C) B1D6; +volatile __B1D6bits_t __at (0xE3C) B1D6bits; + +__sfr __at (0xE3D) B1D7; +volatile __B1D7bits_t __at (0xE3D) B1D7bits; + +__sfr __at (0xE3E) CANSTAT_RO8; +volatile __CANSTAT_RO8bits_t __at (0xE3E) CANSTAT_RO8bits; + +__sfr __at (0xE3F) CANCON_RO8; +volatile __CANCON_RO8bits_t __at (0xE3F) CANCON_RO8bits; + +__sfr __at (0xE40) B2CON; +volatile __B2CONbits_t __at (0xE40) B2CONbits; + +__sfr __at (0xE41) B2SIDH; +volatile __B2SIDHbits_t __at (0xE41) B2SIDHbits; + +__sfr __at (0xE42) B2SIDL; +volatile __B2SIDLbits_t __at (0xE42) B2SIDLbits; + +__sfr __at (0xE43) B2EIDH; +volatile __B2EIDHbits_t __at (0xE43) B2EIDHbits; + +__sfr __at (0xE44) B2EIDL; +volatile __B2EIDLbits_t __at (0xE44) B2EIDLbits; + +__sfr __at (0xE45) B2DLC; +volatile __B2DLCbits_t __at (0xE45) B2DLCbits; + +__sfr __at (0xE46) B2D0; +volatile __B2D0bits_t __at (0xE46) B2D0bits; + +__sfr __at (0xE47) B2D1; +volatile __B2D1bits_t __at (0xE47) B2D1bits; + +__sfr __at (0xE48) B2D2; +volatile __B2D2bits_t __at (0xE48) B2D2bits; + +__sfr __at (0xE49) B2D3; +volatile __B2D3bits_t __at (0xE49) B2D3bits; + +__sfr __at (0xE4A) B2D4; +volatile __B2D4bits_t __at (0xE4A) B2D4bits; + +__sfr __at (0xE4B) B2D5; +volatile __B2D5bits_t __at (0xE4B) B2D5bits; + +__sfr __at (0xE4C) B2D6; +volatile __B2D6bits_t __at (0xE4C) B2D6bits; + +__sfr __at (0xE4D) B2D7; +volatile __B2D7bits_t __at (0xE4D) B2D7bits; + +__sfr __at (0xE4E) CANSTAT_RO7; +volatile __CANSTAT_RO7bits_t __at (0xE4E) CANSTAT_RO7bits; + +__sfr __at (0xE4F) CANCON_RO7; +volatile __CANCON_RO7bits_t __at (0xE4F) CANCON_RO7bits; + +__sfr __at (0xE50) B3CON; +volatile __B3CONbits_t __at (0xE50) B3CONbits; + +__sfr __at (0xE51) B3SIDH; +volatile __B3SIDHbits_t __at (0xE51) B3SIDHbits; + +__sfr __at (0xE52) B3SIDL; +volatile __B3SIDLbits_t __at (0xE52) B3SIDLbits; + +__sfr __at (0xE53) B3EIDH; +volatile __B3EIDHbits_t __at (0xE53) B3EIDHbits; + +__sfr __at (0xE54) B3EIDL; +volatile __B3EIDLbits_t __at (0xE54) B3EIDLbits; + +__sfr __at (0xE55) B3DLC; +volatile __B3DLCbits_t __at (0xE55) B3DLCbits; + +__sfr __at (0xE56) B3D0; +volatile __B3D0bits_t __at (0xE56) B3D0bits; + +__sfr __at (0xE57) B3D1; +volatile __B3D1bits_t __at (0xE57) B3D1bits; + +__sfr __at (0xE58) B3D2; +volatile __B3D2bits_t __at (0xE58) B3D2bits; + +__sfr __at (0xE59) B3D3; +volatile __B3D3bits_t __at (0xE59) B3D3bits; + +__sfr __at (0xE5A) B3D4; +volatile __B3D4bits_t __at (0xE5A) B3D4bits; + +__sfr __at (0xE5B) B3D5; +volatile __B3D5bits_t __at (0xE5B) B3D5bits; + +__sfr __at (0xE5C) B3D6; +volatile __B3D6bits_t __at (0xE5C) B3D6bits; + +__sfr __at (0xE5D) B3D7; +volatile __B3D7bits_t __at (0xE5D) B3D7bits; + +__sfr __at (0xE5E) CANSTAT_RO6; +volatile __CANSTAT_RO6bits_t __at (0xE5E) CANSTAT_RO6bits; + +__sfr __at (0xE5F) CANCON_RO6; +volatile __CANCON_RO6bits_t __at (0xE5F) CANCON_RO6bits; + +__sfr __at (0xE60) B4CON; +volatile __B4CONbits_t __at (0xE60) B4CONbits; + +__sfr __at (0xE61) B4SIDH; +volatile __B4SIDHbits_t __at (0xE61) B4SIDHbits; + +__sfr __at (0xE62) B4SIDL; +volatile __B4SIDLbits_t __at (0xE62) B4SIDLbits; + +__sfr __at (0xE63) B4EIDH; +volatile __B4EIDHbits_t __at (0xE63) B4EIDHbits; + +__sfr __at (0xE64) B4EIDL; +volatile __B4EIDLbits_t __at (0xE64) B4EIDLbits; + +__sfr __at (0xE65) B4DLC; +volatile __B4DLCbits_t __at (0xE65) B4DLCbits; + +__sfr __at (0xE66) B4D0; +volatile __B4D0bits_t __at (0xE66) B4D0bits; + +__sfr __at (0xE67) B4D1; +volatile __B4D1bits_t __at (0xE67) B4D1bits; + +__sfr __at (0xE68) B4D2; +volatile __B4D2bits_t __at (0xE68) B4D2bits; + +__sfr __at (0xE69) B4D3; +volatile __B4D3bits_t __at (0xE69) B4D3bits; + +__sfr __at (0xE6A) B4D4; +volatile __B4D4bits_t __at (0xE6A) B4D4bits; + +__sfr __at (0xE6B) B4D5; +volatile __B4D5bits_t __at (0xE6B) B4D5bits; + +__sfr __at (0xE6C) B4D6; +volatile __B4D6bits_t __at (0xE6C) B4D6bits; + +__sfr __at (0xE6D) B4D7; +volatile __B4D7bits_t __at (0xE6D) B4D7bits; + +__sfr __at (0xE6E) CANSTAT_RO5; +volatile __CANSTAT_RO5bits_t __at (0xE6E) CANSTAT_RO5bits; + +__sfr __at (0xE6F) CANCON_RO5; +volatile __CANCON_RO5bits_t __at (0xE6F) CANCON_RO5bits; + +__sfr __at (0xE70) B5CON; +volatile __B5CONbits_t __at (0xE70) B5CONbits; + +__sfr __at (0xE71) B5SIDH; +volatile __B5SIDHbits_t __at (0xE71) B5SIDHbits; + +__sfr __at (0xE72) B5SIDL; +volatile __B5SIDLbits_t __at (0xE72) B5SIDLbits; + +__sfr __at (0xE73) B5EIDH; +volatile __B5EIDHbits_t __at (0xE73) B5EIDHbits; + +__sfr __at (0xE74) B5EIDL; +volatile __B5EIDLbits_t __at (0xE74) B5EIDLbits; + +__sfr __at (0xE75) B5DLC; +volatile __B5DLCbits_t __at (0xE75) B5DLCbits; + +__sfr __at (0xE76) B5D0; +volatile __B5D0bits_t __at (0xE76) B5D0bits; + +__sfr __at (0xE77) B5D1; +volatile __B5D1bits_t __at (0xE77) B5D1bits; + +__sfr __at (0xE78) B5D2; +volatile __B5D2bits_t __at (0xE78) B5D2bits; + +__sfr __at (0xE79) B5D3; +volatile __B5D3bits_t __at (0xE79) B5D3bits; + +__sfr __at (0xE7A) B5D4; +volatile __B5D4bits_t __at (0xE7A) B5D4bits; + +__sfr __at (0xE7B) B5D5; +volatile __B5D5bits_t __at (0xE7B) B5D5bits; + +__sfr __at (0xE7C) B5D6; +volatile __B5D6bits_t __at (0xE7C) B5D6bits; + +__sfr __at (0xE7D) B5D7; +volatile __B5D7bits_t __at (0xE7D) B5D7bits; + +__sfr __at (0xE7E) CANSTAT_RO4; +volatile __CANSTAT_RO4bits_t __at (0xE7E) CANSTAT_RO4bits; + +__sfr __at (0xE7F) CANCON_RO4; +volatile __CANCON_RO4bits_t __at (0xE7F) CANCON_RO4bits; + +__sfr __at (0xF00) RXF0SIDH; +volatile __RXF0SIDHbits_t __at (0xF00) RXF0SIDHbits; + +__sfr __at (0xF01) RXF0SIDL; +volatile __RXF0SIDLbits_t __at (0xF01) RXF0SIDLbits; + +__sfr __at (0xF02) RXF0EIDH; +volatile __RXF0EIDHbits_t __at (0xF02) RXF0EIDHbits; + +__sfr __at (0xF03) RXF0EIDL; +volatile __RXF0EIDLbits_t __at (0xF03) RXF0EIDLbits; + +__sfr __at (0xF04) RXF1SIDH; +volatile __RXF1SIDHbits_t __at (0xF04) RXF1SIDHbits; + +__sfr __at (0xF05) RXF1SIDL; +volatile __RXF1SIDLbits_t __at (0xF05) RXF1SIDLbits; + +__sfr __at (0xF06) RXF1EIDH; +volatile __RXF1EIDHbits_t __at (0xF06) RXF1EIDHbits; + +__sfr __at (0xF07) RXF1EIDL; +volatile __RXF1EIDLbits_t __at (0xF07) RXF1EIDLbits; + +__sfr __at (0xF08) RXF2SIDH; +volatile __RXF2SIDHbits_t __at (0xF08) RXF2SIDHbits; + +__sfr __at (0xF09) RXF2SIDL; +volatile __RXF2SIDLbits_t __at (0xF09) RXF2SIDLbits; + +__sfr __at (0xF0A) RXF2EIDH; +volatile __RXF2EIDHbits_t __at (0xF0A) RXF2EIDHbits; + +__sfr __at (0xF0B) RXF2EIDL; +volatile __RXF2EIDLbits_t __at (0xF0B) RXF2EIDLbits; + +__sfr __at (0xF0C) RXF3SIDH; +volatile __RXF3SIDHbits_t __at (0xF0C) RXF3SIDHbits; + +__sfr __at (0xF0D) RXF3SIDL; +volatile __RXF3SIDLbits_t __at (0xF0D) RXF3SIDLbits; + +__sfr __at (0xF0E) RXF3EIDH; +volatile __RXF3EIDHbits_t __at (0xF0E) RXF3EIDHbits; + +__sfr __at (0xF0F) RXF3EIDL; +volatile __RXF3EIDLbits_t __at (0xF0F) RXF3EIDLbits; + +__sfr __at (0xF10) RXF4SIDH; +volatile __RXF4SIDHbits_t __at (0xF10) RXF4SIDHbits; + +__sfr __at (0xF11) RXF4SIDL; +volatile __RXF4SIDLbits_t __at (0xF11) RXF4SIDLbits; + +__sfr __at (0xF12) RXF4EIDH; +volatile __RXF4EIDHbits_t __at (0xF12) RXF4EIDHbits; + +__sfr __at (0xF13) RXF4EIDL; +volatile __RXF4EIDLbits_t __at (0xF13) RXF4EIDLbits; + +__sfr __at (0xF14) RXF5SIDH; +volatile __RXF5SIDHbits_t __at (0xF14) RXF5SIDHbits; + +__sfr __at (0xF15) RXF5SIDL; +volatile __RXF5SIDLbits_t __at (0xF15) RXF5SIDLbits; + +__sfr __at (0xF16) RXF5EIDH; +volatile __RXF5EIDHbits_t __at (0xF16) RXF5EIDHbits; + +__sfr __at (0xF17) RXF5EIDL; +volatile __RXF5EIDLbits_t __at (0xF17) RXF5EIDLbits; + +__sfr __at (0xF18) RXM0SIDH; +volatile __RXM0SIDHbits_t __at (0xF18) RXM0SIDHbits; + +__sfr __at (0xF19) RXM0SIDL; +volatile __RXM0SIDLbits_t __at (0xF19) RXM0SIDLbits; + +__sfr __at (0xF1A) RXM0EIDH; +volatile __RXM0EIDHbits_t __at (0xF1A) RXM0EIDHbits; + +__sfr __at (0xF1B) RXM0EIDL; +volatile __RXM0EIDLbits_t __at (0xF1B) RXM0EIDLbits; + +__sfr __at (0xF1C) RXM1SIDH; +volatile __RXM1SIDHbits_t __at (0xF1C) RXM1SIDHbits; + +__sfr __at (0xF1D) RXM1SIDL; +volatile __RXM1SIDLbits_t __at (0xF1D) RXM1SIDLbits; + +__sfr __at (0xF1E) RXM1EIDH; +volatile __RXM1EIDHbits_t __at (0xF1E) RXM1EIDHbits; + +__sfr __at (0xF1F) RXM1EIDL; +volatile __RXM1EIDLbits_t __at (0xF1F) RXM1EIDLbits; + +__sfr __at (0xF20) TXB2CON; +volatile __TXB2CONbits_t __at (0xF20) TXB2CONbits; + +__sfr __at (0xF21) TXB2SIDH; +volatile __TXB2SIDHbits_t __at (0xF21) TXB2SIDHbits; + +__sfr __at (0xF22) TXB2SIDL; +volatile __TXB2SIDLbits_t __at (0xF22) TXB2SIDLbits; + +__sfr __at (0xF23) TXB2EIDH; +volatile __TXB2EIDHbits_t __at (0xF23) TXB2EIDHbits; + +__sfr __at (0xF24) TXB2EIDL; +volatile __TXB2EIDLbits_t __at (0xF24) TXB2EIDLbits; + +__sfr __at (0xF25) TXB2DLC; +volatile __TXB2DLCbits_t __at (0xF25) TXB2DLCbits; + +__sfr __at (0xF26) TXB2D0; +volatile __TXB2D0bits_t __at (0xF26) TXB2D0bits; + +__sfr __at (0xF27) TXB2D1; +volatile __TXB2D1bits_t __at (0xF27) TXB2D1bits; + +__sfr __at (0xF28) TXB2D2; +volatile __TXB2D2bits_t __at (0xF28) TXB2D2bits; + +__sfr __at (0xF29) TXB2D3; +volatile __TXB2D3bits_t __at (0xF29) TXB2D3bits; + +__sfr __at (0xF2A) TXB2D4; +volatile __TXB2D4bits_t __at (0xF2A) TXB2D4bits; + +__sfr __at (0xF2B) TXB2D5; +volatile __TXB2D5bits_t __at (0xF2B) TXB2D5bits; + +__sfr __at (0xF2C) TXB2D6; +volatile __TXB2D6bits_t __at (0xF2C) TXB2D6bits; + +__sfr __at (0xF2D) TXB2D7; +volatile __TXB2D7bits_t __at (0xF2D) TXB2D7bits; + +__sfr __at (0xF2E) CANSTAT_RO3; +volatile __CANSTAT_RO3bits_t __at (0xF2E) CANSTAT_RO3bits; + +__sfr __at (0xF2F) CANCON_RO3; +volatile __CANCON_RO3bits_t __at (0xF2F) CANCON_RO3bits; + +__sfr __at (0xF30) TXB1CON; +volatile __TXB1CONbits_t __at (0xF30) TXB1CONbits; + +__sfr __at (0xF31) TXB1SIDH; +volatile __TXB1SIDHbits_t __at (0xF31) TXB1SIDHbits; + +__sfr __at (0xF32) TXB1SIDL; +volatile __TXB1SIDLbits_t __at (0xF32) TXB1SIDLbits; + +__sfr __at (0xF33) TXB1EIDH; +volatile __TXB1EIDHbits_t __at (0xF33) TXB1EIDHbits; + +__sfr __at (0xF34) TXB1EIDL; +volatile __TXB1EIDLbits_t __at (0xF34) TXB1EIDLbits; + +__sfr __at (0xF35) TXB1DLC; +volatile __TXB1DLCbits_t __at (0xF35) TXB1DLCbits; + +__sfr __at (0xF36) TXB1D0; +volatile __TXB1D0bits_t __at (0xF36) TXB1D0bits; + +__sfr __at (0xF37) TXB1D1; +volatile __TXB1D1bits_t __at (0xF37) TXB1D1bits; + +__sfr __at (0xF38) TXB1D2; +volatile __TXB1D2bits_t __at (0xF38) TXB1D2bits; + +__sfr __at (0xF39) TXB1D3; +volatile __TXB1D3bits_t __at (0xF39) TXB1D3bits; + +__sfr __at (0xF3A) TXB1D4; +volatile __TXB1D4bits_t __at (0xF3A) TXB1D4bits; + +__sfr __at (0xF3B) TXB1D5; +volatile __TXB1D5bits_t __at (0xF3B) TXB1D5bits; + +__sfr __at (0xF3C) TXB1D6; +volatile __TXB1D6bits_t __at (0xF3C) TXB1D6bits; + +__sfr __at (0xF3D) TXB1D7; +volatile __TXB1D7bits_t __at (0xF3D) TXB1D7bits; + +__sfr __at (0xF3E) CANSTAT_RO2; +volatile __CANSTAT_RO2bits_t __at (0xF3E) CANSTAT_RO2bits; + +__sfr __at (0xF3F) CANCON_RO2; +volatile __CANCON_RO2bits_t __at (0xF3F) CANCON_RO2bits; + +__sfr __at (0xF40) TXB0CON; +volatile __TXB0CONbits_t __at (0xF40) TXB0CONbits; + +__sfr __at (0xF41) TXB0SIDH; +volatile __TXB0SIDHbits_t __at (0xF41) TXB0SIDHbits; + +__sfr __at (0xF42) TXB0SIDL; +volatile __TXB0SIDLbits_t __at (0xF42) TXB0SIDLbits; + +__sfr __at (0xF43) TXB0EIDH; +volatile __TXB0EIDHbits_t __at (0xF43) TXB0EIDHbits; + +__sfr __at (0xF44) TXB0EIDL; +volatile __TXB0EIDLbits_t __at (0xF44) TXB0EIDLbits; + +__sfr __at (0xF45) TXB0DLC; +volatile __TXB0DLCbits_t __at (0xF45) TXB0DLCbits; + +__sfr __at (0xF46) TXB0D0; +volatile __TXB0D0bits_t __at (0xF46) TXB0D0bits; + +__sfr __at (0xF47) TXB0D1; +volatile __TXB0D1bits_t __at (0xF47) TXB0D1bits; + +__sfr __at (0xF48) TXB0D2; +volatile __TXB0D2bits_t __at (0xF48) TXB0D2bits; + +__sfr __at (0xF49) TXB0D3; +volatile __TXB0D3bits_t __at (0xF49) TXB0D3bits; + +__sfr __at (0xF4A) TXB0D4; +volatile __TXB0D4bits_t __at (0xF4A) TXB0D4bits; + +__sfr __at (0xF4B) TXB0D5; +volatile __TXB0D5bits_t __at (0xF4B) TXB0D5bits; + +__sfr __at (0xF4C) TXB0D6; +volatile __TXB0D6bits_t __at (0xF4C) TXB0D6bits; + +__sfr __at (0xF4D) TXB0D7; +volatile __TXB0D7bits_t __at (0xF4D) TXB0D7bits; + +__sfr __at (0xF4E) CANSTAT_RO1; +volatile __CANSTAT_RO1bits_t __at (0xF4E) CANSTAT_RO1bits; + +__sfr __at (0xF4F) CANCON_RO1; +volatile __CANCON_RO1bits_t __at (0xF4F) CANCON_RO1bits; + +__sfr __at (0xF50) RXB1CON; +volatile __RXB1CONbits_t __at (0xF50) RXB1CONbits; + +__sfr __at (0xF51) RXB1SIDH; +volatile __RXB1SIDHbits_t __at (0xF51) RXB1SIDHbits; + +__sfr __at (0xF52) RXB1SIDL; +volatile __RXB1SIDLbits_t __at (0xF52) RXB1SIDLbits; + +__sfr __at (0xF53) RXB1EIDH; +volatile __RXB1EIDHbits_t __at (0xF53) RXB1EIDHbits; + +__sfr __at (0xF54) RXB1EIDL; +volatile __RXB1EIDLbits_t __at (0xF54) RXB1EIDLbits; + +__sfr __at (0xF55) RXB1DLC; +volatile __RXB1DLCbits_t __at (0xF55) RXB1DLCbits; + +__sfr __at (0xF56) RXB1D0; +volatile __RXB1D0bits_t __at (0xF56) RXB1D0bits; + +__sfr __at (0xF57) RXB1D1; +volatile __RXB1D1bits_t __at (0xF57) RXB1D1bits; + +__sfr __at (0xF58) RXB1D2; +volatile __RXB1D2bits_t __at (0xF58) RXB1D2bits; + +__sfr __at (0xF59) RXB1D3; +volatile __RXB1D3bits_t __at (0xF59) RXB1D3bits; + +__sfr __at (0xF5A) RXB1D4; +volatile __RXB1D4bits_t __at (0xF5A) RXB1D4bits; + +__sfr __at (0xF5B) RXB1D5; +volatile __RXB1D5bits_t __at (0xF5B) RXB1D5bits; + +__sfr __at (0xF5C) RXB1D6; +volatile __RXB1D6bits_t __at (0xF5C) RXB1D6bits; + +__sfr __at (0xF5D) RXB1D7; +volatile __RXB1D7bits_t __at (0xF5D) RXB1D7bits; + +__sfr __at (0xF5E) CANSTAT_RO0; +volatile __CANSTAT_RO0bits_t __at (0xF5E) CANSTAT_RO0bits; + +__sfr __at (0xF5F) CANCON_RO0; +volatile __CANCON_RO0bits_t __at (0xF5F) CANCON_RO0bits; + +__sfr __at (0xF60) RXB0CON; +volatile __RXB0CONbits_t __at (0xF60) RXB0CONbits; + +__sfr __at (0xF61) RXB0SIDH; +volatile __RXB0SIDHbits_t __at (0xF61) RXB0SIDHbits; + +__sfr __at (0xF62) RXB0SIDL; +volatile __RXB0SIDLbits_t __at (0xF62) RXB0SIDLbits; + +__sfr __at (0xF63) RXB0EIDH; +volatile __RXB0EIDHbits_t __at (0xF63) RXB0EIDHbits; + +__sfr __at (0xF64) RXB0EIDL; +volatile __RXB0EIDLbits_t __at (0xF64) RXB0EIDLbits; + +__sfr __at (0xF65) RXB0DLC; +volatile __RXB0DLCbits_t __at (0xF65) RXB0DLCbits; + +__sfr __at (0xF66) RXB0D0; +volatile __RXB0D0bits_t __at (0xF66) RXB0D0bits; + +__sfr __at (0xF67) RXB0D1; +volatile __RXB0D1bits_t __at (0xF67) RXB0D1bits; + +__sfr __at (0xF68) RXB0D2; +volatile __RXB0D2bits_t __at (0xF68) RXB0D2bits; + +__sfr __at (0xF69) RXB0D3; +volatile __RXB0D3bits_t __at (0xF69) RXB0D3bits; + +__sfr __at (0xF6A) RXB0D4; +volatile __RXB0D4bits_t __at (0xF6A) RXB0D4bits; + +__sfr __at (0xF6B) RXB0D5; +volatile __RXB0D5bits_t __at (0xF6B) RXB0D5bits; + +__sfr __at (0xF6C) RXB0D6; +volatile __RXB0D6bits_t __at (0xF6C) RXB0D6bits; + +__sfr __at (0xF6D) RXB0D7; +volatile __RXB0D7bits_t __at (0xF6D) RXB0D7bits; + +__sfr __at (0xF6E) CANSTAT; +volatile __CANSTATbits_t __at (0xF6E) CANSTATbits; + +__sfr __at (0xF6F) CANCON; +volatile __CANCONbits_t __at (0xF6F) CANCONbits; + +__sfr __at (0xF70) BRGCON1; +volatile __BRGCON1bits_t __at (0xF70) BRGCON1bits; + +__sfr __at (0xF71) BRGCON2; +volatile __BRGCON2bits_t __at (0xF71) BRGCON2bits; + +__sfr __at (0xF72) BRGCON3; +volatile __BRGCON3bits_t __at (0xF72) BRGCON3bits; + +__sfr __at (0xF73) CIOCON; +volatile __CIOCONbits_t __at (0xF73) CIOCONbits; + +__sfr __at (0xF74) COMSTAT; +volatile __COMSTATbits_t __at (0xF74) COMSTATbits; + +__sfr __at (0xF75) RXERRCNT; +volatile __RXERRCNTbits_t __at (0xF75) RXERRCNTbits; + +__sfr __at (0xF76) TXERRCNT; +volatile __TXERRCNTbits_t __at (0xF76) TXERRCNTbits; + +__sfr __at (0xF77) ECANCON; +volatile __ECANCONbits_t __at (0xF77) ECANCONbits; + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) DDRD; +volatile __DDRDbits_t __at (0xF95) DDRDbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) DDRE; +volatile __DDREbits_t __at (0xF96) DDREbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA3) PIE3; +volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +__sfr __at (0xFA4) PIR3; +volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +__sfr __at (0xFA5) IPR3; +volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFA8) EEDATA; + +__sfr __at (0xFA9) EEADR; + +__sfr __at (0xFAA) EEADRH; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB1) T3CON; +volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +__sfr __at (0xFB2) TMR3L; + +__sfr __at (0xFB3) TMR3H; + +__sfr __at (0xFB4) CMCON; +volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFBA) ECCP1CON; +volatile __ECCP1CONbits_t __at (0xFBA) ECCP1CONbits; + +__sfr __at (0xFBB) ECCPR1; + +__sfr __at (0xFBB) ECCPR1L; + +__sfr __at (0xFBC) ECCPR1H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) HLVDCON; +volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +__sfr __at (0xFD2) LVDCON; +volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f4682.c b/device/lib/pic16/libdev/pic18f4682.c new file mode 100644 index 0000000..7c510e0 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4682.c @@ -0,0 +1,12 @@ +/* + * pic18f4682.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include "pic18f4680.c" + diff --git a/device/lib/pic16/libdev/pic18f4685.c b/device/lib/pic16/libdev/pic18f4685.c new file mode 100644 index 0000000..7d1697b --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4685.c @@ -0,0 +1,12 @@ +/* + * pic18f4685.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include "pic18f4680.c" + diff --git a/device/lib/pic16/libdev/pic18f46k20.c b/device/lib/pic16/libdev/pic18f46k20.c new file mode 100644 index 0000000..26d272a --- /dev/null +++ b/device/lib/pic16/libdev/pic18f46k20.c @@ -0,0 +1,351 @@ +/* + * pic18f46k20.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xF77) SSPMSK; + +__sfr __at (0xF78) SLRCON; +volatile __SLRCONbits_t __at (0xF78) SLRCONbits; + +__sfr __at (0xF79) CM12CON; +volatile __CM12CONbits_t __at (0xF79) CM12CONbits; + +__sfr __at (0xF7A) CM2CON; +volatile __CM2CONbits_t __at (0xF7A) CM2CONbits; + +__sfr __at (0xF7B) CM1CON; +volatile __CM1CONbits_t __at (0xF7B) CM1CONbits; + +__sfr __at (0xF7C) WPUB; +volatile __WPUBbits_t __at (0xF7C) WPUBbits; + +__sfr __at (0xF7D) IOCB; +volatile __IOCBbits_t __at (0xF7D) IOCBbits; + +__sfr __at (0xF7E) ANSEL; +volatile __ANSELbits_t __at (0xF7E) ANSELbits; + +__sfr __at (0xF7F) ANSELH; +volatile __ANSELHbits_t __at (0xF7F) ANSELHbits; + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) DDRD; +volatile __DDRDbits_t __at (0xF95) DDRDbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) DDRE; +volatile __DDREbits_t __at (0xF96) DDREbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFA8) EEDATA; + +__sfr __at (0xFA9) EEADR; + +__sfr __at (0xFAA) EEADRH; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB1) T3CON; +volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +__sfr __at (0xFB2) TMR3L; + +__sfr __at (0xFB3) TMR3H; + +__sfr __at (0xFB4) CVRCON2; +volatile __CVRCON2bits_t __at (0xFB4) CVRCON2bits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) PWM1CON; +volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFB8) BAUDCTL; +volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +__sfr __at (0xFB9) PSTRCON; +volatile __PSTRCONbits_t __at (0xFB9) PSTRCONbits; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBB) CCPR2; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) HLVDCON; +volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits; + +__sfr __at (0xFD2) LVDCON; +volatile __LVDCONbits_t __at (0xFD2) LVDCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD4) DEBUG; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f6520.c b/device/lib/pic16/libdev/pic18f6520.c new file mode 100644 index 0000000..f476ea4 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f6520.c @@ -0,0 +1,286 @@ + +/* + * pic18f6520.c - PIC18F6520 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f6520.c 3785 2005-06-24 14:19:36Z tecodev $ + * + */ + +#include + +__sfr __at (0xf6b) RCSTA2; +volatile __RCSTA2bits_t __at (0xf6b) RCSTA2bits; + +__sfr __at (0xf6c) TXSTA2; +volatile __TXSTA2bits_t __at (0xf6c) TXSTA2bits; + +__sfr __at (0xf6d) TXREG2; +__sfr __at (0xf6e) RCREG2; +__sfr __at (0xf6f) SPBRG2; +__sfr __at (0xf70) CCP5CON; +volatile __CCP5CONbits_t __at (0xf70) CCP5CONbits; + +__sfr __at (0xf71) CCPR5L; +__sfr __at (0xf72) CCPR5H; +__sfr __at (0xf73) CCP4CON; +volatile __CCP4CONbits_t __at (0xf73) CCP4CONbits; + +__sfr __at (0xf74) CCPR4L; +__sfr __at (0xf75) CCPR4H; +__sfr __at (0xf76) T4CON; +volatile __T4CONbits_t __at (0xf76) T4CONbits; + +__sfr __at (0xf77) PR4; +__sfr __at (0xf78) TMR4; +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf83) PORTD; +volatile __PORTDbits_t __at (0xf83) PORTDbits; + +__sfr __at (0xf84) PORTE; +volatile __PORTEbits_t __at (0xf84) PORTEbits; + +__sfr __at (0xf85) PORTF; +volatile __PORTFbits_t __at (0xf85) PORTFbits; + +__sfr __at (0xf86) PORTG; +volatile __PORTGbits_t __at (0xf86) PORTGbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf8c) LATD; +volatile __LATDbits_t __at (0xf8c) LATDbits; + +__sfr __at (0xf8d) LATE; +volatile __LATEbits_t __at (0xf8d) LATEbits; + +__sfr __at (0xf8e) LATF; +volatile __LATFbits_t __at (0xf8e) LATFbits; + +__sfr __at (0xf8f) LATG; +volatile __LATGbits_t __at (0xf8f) LATGbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf95) TRISD; +volatile __TRISDbits_t __at (0xf95) TRISDbits; + +__sfr __at (0xf96) TRISE; +volatile __TRISEbits_t __at (0xf96) TRISEbits; + +__sfr __at (0xf97) TRISF; +volatile __TRISFbits_t __at (0xf97) TRISFbits; + +__sfr __at (0xf98) TRISG; +volatile __TRISGbits_t __at (0xf98) TRISGbits; + +__sfr __at (0xf9c) MEMCON; +volatile __MEMCONbits_t __at (0xf9c) MEMCONbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa3) PIE3; +volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +__sfr __at (0xfa4) PIR3; +volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +__sfr __at (0xfa5) IPR3; +volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfaa) EEADRH; +__sfr __at (0xfab) RCSTA1; +volatile __RCSTA1bits_t __at (0xfab) RCSTA1bits; + +__sfr __at (0xfac) TXSTA1; +volatile __TXSTA1bits_t __at (0xfac) TXSTA1bits; + +__sfr __at (0xfad) TXREG1; +__sfr __at (0xfae) RCREG1; +__sfr __at (0xfaf) SPBRG1; +__sfr __at (0xfb0) PSPCON; +volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfb4) CMCON; +volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +__sfr __at (0xfb5) CVRCON; +volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +__sfr __at (0xfb7) CCP3CON; +volatile __CCP3CONbits_t __at (0xfb7) CCP3CONbits; + +__sfr __at (0xfb8) CCPR3L; +__sfr __at (0xfb9) CCPR3H; +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfbb) CCPR2L; +__sfr __at (0xfbc) CCPR2H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc0) ADCON2; +volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + +/* for compatibility reasons */ +__sfr __at (0xfab) RCSTA; +volatile __RCSTA1bits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTA1bits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; diff --git a/device/lib/pic16/libdev/pic18f6585.c b/device/lib/pic16/libdev/pic18f6585.c new file mode 100644 index 0000000..fecac0e --- /dev/null +++ b/device/lib/pic16/libdev/pic18f6585.c @@ -0,0 +1,6 @@ +/* + * pic18f6585.c - device specific definitions + */ + +#include "pic18f8680.c" + diff --git a/device/lib/pic16/libdev/pic18f65j50.c b/device/lib/pic16/libdev/pic18f65j50.c new file mode 100644 index 0000000..b05410a --- /dev/null +++ b/device/lib/pic16/libdev/pic18f65j50.c @@ -0,0 +1,7 @@ +/* + * pic18f65j50.c - device specific definitions + */ + +#include +#include "pic18f67j50.c" + diff --git a/device/lib/pic16/libdev/pic18f6620.c b/device/lib/pic16/libdev/pic18f6620.c new file mode 100644 index 0000000..e083985 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f6620.c @@ -0,0 +1,283 @@ + +/* + * pic18f6620.c - PIC18F6620 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f6620.c 3785 2005-06-24 14:19:36Z tecodev $ + * + */ + +#include + +__sfr __at (0xf6b) RCSTA2; +volatile __RCSTA2bits_t __at (0xf6b) RCSTA2bits; + +__sfr __at (0xf6c) TXSTA2; +volatile __TXSTA2bits_t __at (0xf6c) TXSTA2bits; + +__sfr __at (0xf6d) TXREG2; +__sfr __at (0xf6e) RCREG2; +__sfr __at (0xf6f) SPBRG2; +__sfr __at (0xf70) CCP5CON; +volatile __CCP5CONbits_t __at (0xf70) CCP5CONbits; + +__sfr __at (0xf71) CCPR5L; +__sfr __at (0xf72) CCPR5H; +__sfr __at (0xf73) CCP4CON; +volatile __CCP4CONbits_t __at (0xf73) CCP4CONbits; + +__sfr __at (0xf74) CCPR4L; +__sfr __at (0xf75) CCPR4H; +__sfr __at (0xf76) T4CON; +volatile __T4CONbits_t __at (0xf76) T4CONbits; + +__sfr __at (0xf77) PR4; +__sfr __at (0xf78) TMR4; +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf83) PORTD; +volatile __PORTDbits_t __at (0xf83) PORTDbits; + +__sfr __at (0xf84) PORTE; +volatile __PORTEbits_t __at (0xf84) PORTEbits; + +__sfr __at (0xf85) PORTF; +volatile __PORTFbits_t __at (0xf85) PORTFbits; + +__sfr __at (0xf86) PORTG; +volatile __PORTGbits_t __at (0xf86) PORTGbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf8c) LATD; +volatile __LATDbits_t __at (0xf8c) LATDbits; + +__sfr __at (0xf8d) LATE; +volatile __LATEbits_t __at (0xf8d) LATEbits; + +__sfr __at (0xf8e) LATF; +volatile __LATFbits_t __at (0xf8e) LATFbits; + +__sfr __at (0xf8f) LATG; +volatile __LATGbits_t __at (0xf8f) LATGbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf95) TRISD; +volatile __TRISDbits_t __at (0xf95) TRISDbits; + +__sfr __at (0xf96) TRISE; +volatile __TRISEbits_t __at (0xf96) TRISEbits; + +__sfr __at (0xf97) TRISF; +volatile __TRISFbits_t __at (0xf97) TRISFbits; + +__sfr __at (0xf98) TRISG; +volatile __TRISGbits_t __at (0xf98) TRISGbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa3) PIE3; +volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +__sfr __at (0xfa4) PIR3; +volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +__sfr __at (0xfa5) IPR3; +volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfaa) EEADRH; +__sfr __at (0xfab) RCSTA1; +volatile __RCSTA1bits_t __at (0xfab) RCSTA1bits; + +__sfr __at (0xfac) TXSTA1; +volatile __TXSTA1bits_t __at (0xfac) TXSTA1bits; + +__sfr __at (0xfad) TXREG1; +__sfr __at (0xfae) RCREG1; +__sfr __at (0xfaf) SPBRG1; +__sfr __at (0xfb0) PSPCON; +volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfb4) CMCON; +volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +__sfr __at (0xfb5) CVRCON; +volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +__sfr __at (0xfb7) CCP3CON; +volatile __CCP3CONbits_t __at (0xfb7) CCP3CONbits; + +__sfr __at (0xfb8) CCPR3L; +__sfr __at (0xfb9) CCPR3H; +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfbb) CCPR2L; +__sfr __at (0xfbc) CCPR2H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc0) ADCON2; +volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + +/* for compatibility reasons */ +__sfr __at (0xfab) RCSTA; +volatile __RCSTA1bits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTA1bits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; diff --git a/device/lib/pic16/libdev/pic18f6680.c b/device/lib/pic16/libdev/pic18f6680.c new file mode 100644 index 0000000..e888caa --- /dev/null +++ b/device/lib/pic16/libdev/pic18f6680.c @@ -0,0 +1,6 @@ +/* + * pic18f6680.c - device specific definitions + */ + +#include "pic18f8680.c" + diff --git a/device/lib/pic16/libdev/pic18f66j50.c b/device/lib/pic16/libdev/pic18f66j50.c new file mode 100644 index 0000000..8cb2196 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f66j50.c @@ -0,0 +1,7 @@ +/* + * pic18f66j50.c - device specific definitions + */ + +#include +#include "pic18f67j50.c" + diff --git a/device/lib/pic16/libdev/pic18f66j55.c b/device/lib/pic16/libdev/pic18f66j55.c new file mode 100644 index 0000000..a20cca9 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f66j55.c @@ -0,0 +1,7 @@ +/* + * pic18f66j55.c - device specific definitions + */ + +#include +#include "pic18f67j50.c" + diff --git a/device/lib/pic16/libdev/pic18f66j60.c b/device/lib/pic16/libdev/pic18f66j60.c new file mode 100644 index 0000000..9f9f0c5 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f66j60.c @@ -0,0 +1,661 @@ +/* + * pic18f66j60.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xE80) MAADR5; + +__sfr __at (0xE81) MAADR6; + +__sfr __at (0xE82) MAADR3; + +__sfr __at (0xE83) MAADR4; + +__sfr __at (0xE84) MAADR1; + +__sfr __at (0xE85) MAADR2; + +__sfr __at (0xE86) EBSTSD; + +__sfr __at (0xE87) EBSTCON; +volatile __EBSTCONbits_t __at (0xE87) EBSTCONbits; + +__sfr __at (0xE88) EBSTCS; + +__sfr __at (0xE88) EBSTCSL; + +__sfr __at (0xE89) EBSTCSH; + +__sfr __at (0xE8A) MISTAT; +volatile __MISTATbits_t __at (0xE8A) MISTATbits; + +__sfr __at (0xE97) EFLOCON; +volatile __EFLOCONbits_t __at (0xE97) EFLOCONbits; + +__sfr __at (0xE98) EPAUS; + +__sfr __at (0xE98) EPAUSL; + +__sfr __at (0xE99) EPAUSH; + +__sfr __at (0xEA0) MACON1; +volatile __MACON1bits_t __at (0xEA0) MACON1bits; + +__sfr __at (0xEA1) MACON2; +volatile __MACON2bits_t __at (0xEA1) MACON2bits; + +__sfr __at (0xEA2) MACON3; +volatile __MACON3bits_t __at (0xEA2) MACON3bits; + +__sfr __at (0xEA3) MACON4; +volatile __MACON4bits_t __at (0xEA3) MACON4bits; + +__sfr __at (0xEA4) MABBIPG; + +__sfr __at (0xEA6) MAIPG; + +__sfr __at (0xEA6) MAIPGL; + +__sfr __at (0xEA7) MAIPGH; + +__sfr __at (0xEA8) MACLCON1; +volatile __MACLCON1bits_t __at (0xEA8) MACLCON1bits; + +__sfr __at (0xEA9) MACLCON2; +volatile __MACLCON2bits_t __at (0xEA9) MACLCON2bits; + +__sfr __at (0xEAA) MAMXFL; + +__sfr __at (0xEAA) MAMXFLL; + +__sfr __at (0xEAB) MAMXFLH; + +__sfr __at (0xEB1) MICON; +volatile __MICONbits_t __at (0xEB1) MICONbits; + +__sfr __at (0xEB2) MICMD; +volatile __MICMDbits_t __at (0xEB2) MICMDbits; + +__sfr __at (0xEB4) MIREGADR; + +__sfr __at (0xEB6) MIWR; + +__sfr __at (0xEB6) MIWRL; + +__sfr __at (0xEB7) MIWRH; + +__sfr __at (0xEB8) MIRD; + +__sfr __at (0xEB8) MIRDL; + +__sfr __at (0xEB9) MIRDH; + +__sfr __at (0xEC0) EHT0; + +__sfr __at (0xEC1) EHT1; + +__sfr __at (0xEC2) EHT2; + +__sfr __at (0xEC3) EHT3; + +__sfr __at (0xEC4) EHT4; + +__sfr __at (0xEC5) EHT5; + +__sfr __at (0xEC6) EHT6; + +__sfr __at (0xEC7) EHT7; + +__sfr __at (0xEC8) EPMM0; + +__sfr __at (0xEC9) EPMM1; + +__sfr __at (0xECA) EPMM2; + +__sfr __at (0xECB) EPMM3; + +__sfr __at (0xECC) EPMM4; + +__sfr __at (0xECD) EPMM5; + +__sfr __at (0xECE) EPMM6; + +__sfr __at (0xECF) EPMM7; + +__sfr __at (0xED0) EPMCS; + +__sfr __at (0xED0) EPMCSL; + +__sfr __at (0xED1) EPMCSH; + +__sfr __at (0xED4) EPMO; + +__sfr __at (0xED4) EPMOL; + +__sfr __at (0xED5) EPMOH; + +__sfr __at (0xED6) EWOLIE; +volatile __EWOLIEbits_t __at (0xED6) EWOLIEbits; + +__sfr __at (0xED7) EWOLIR; +volatile __EWOLIRbits_t __at (0xED7) EWOLIRbits; + +__sfr __at (0xED8) ERXFCON; +volatile __ERXFCONbits_t __at (0xED8) ERXFCONbits; + +__sfr __at (0xED9) EPKTCNT; + +__sfr __at (0xEE2) EWRPT; + +__sfr __at (0xEE2) EWRPTL; + +__sfr __at (0xEE3) EWRPTH; + +__sfr __at (0xEE4) ETXST; + +__sfr __at (0xEE4) ETXSTL; + +__sfr __at (0xEE5) ETXSTH; + +__sfr __at (0xEE6) ETXND; + +__sfr __at (0xEE6) ETXNDL; + +__sfr __at (0xEE7) ETXNDH; + +__sfr __at (0xEE8) ERXST; + +__sfr __at (0xEE8) ERXSTL; + +__sfr __at (0xEE9) ERXSTH; + +__sfr __at (0xEEA) ERXND; + +__sfr __at (0xEEA) ERXNDL; + +__sfr __at (0xEEB) ERXNDH; + +__sfr __at (0xEEC) ERXRDPT; + +__sfr __at (0xEEC) ERXRDPTL; + +__sfr __at (0xEED) ERXRDPTH; + +__sfr __at (0xEEE) ERXWRPT; + +__sfr __at (0xEEE) ERXWRPTL; + +__sfr __at (0xEEF) ERXWRPTH; + +__sfr __at (0xEF0) EDMAST; + +__sfr __at (0xEF0) EDMASTL; + +__sfr __at (0xEF1) EDMASTH; + +__sfr __at (0xEF2) EDMAND; + +__sfr __at (0xEF2) EDMANDL; + +__sfr __at (0xEF3) EDMANDH; + +__sfr __at (0xEF4) EDMADST; + +__sfr __at (0xEF4) EDMADSTL; + +__sfr __at (0xEF5) EDMADSTH; + +__sfr __at (0xEF6) EDMACS; + +__sfr __at (0xEF6) EDMACSL; + +__sfr __at (0xEF7) EDMACSH; + +__sfr __at (0xEFB) EIE; +volatile __EIEbits_t __at (0xEFB) EIEbits; + +__sfr __at (0xEFD) ESTAT; +volatile __ESTATbits_t __at (0xEFD) ESTATbits; + +__sfr __at (0xEFE) ECON2; +volatile __ECON2bits_t __at (0xEFE) ECON2bits; + +__sfr __at (0xF60) EIR; +volatile __EIRbits_t __at (0xF60) EIRbits; + +__sfr __at (0xF61) EDATA; +volatile __EDATAbits_t __at (0xF61) EDATAbits; + +__sfr __at (0xF67) ECCP2DEL; +volatile __ECCP2DELbits_t __at (0xF67) ECCP2DELbits; + +__sfr __at (0xF68) ECCP2AS; +volatile __ECCP2ASbits_t __at (0xF68) ECCP2ASbits; + +__sfr __at (0xF69) ECCP3DEL; +volatile __ECCP3DELbits_t __at (0xF69) ECCP3DELbits; + +__sfr __at (0xF6A) ECCP3AS; +volatile __ECCP3ASbits_t __at (0xF6A) ECCP3ASbits; + +__sfr __at (0xF70) CCP5CON; +volatile __CCP5CONbits_t __at (0xF70) CCP5CONbits; + +__sfr __at (0xF71) CCPR5; + +__sfr __at (0xF71) CCPR5L; + +__sfr __at (0xF72) CCPR5H; + +__sfr __at (0xF73) CCP4CON; +volatile __CCP4CONbits_t __at (0xF73) CCP4CONbits; + +__sfr __at (0xF74) CCPR4; + +__sfr __at (0xF74) CCPR4L; + +__sfr __at (0xF75) CCPR4H; + +__sfr __at (0xF76) T4CON; +volatile __T4CONbits_t __at (0xF76) T4CONbits; + +__sfr __at (0xF77) PR4; + +__sfr __at (0xF78) TMR4; + +__sfr __at (0xF79) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xF79) ECCP1DELbits; + +__sfr __at (0xF7A) ERDPT; + +__sfr __at (0xF7A) ERDPTL; + +__sfr __at (0xF7B) ERDPTH; + +__sfr __at (0xF7E) BAUDCON; +volatile __BAUDCONbits_t __at (0xF7E) BAUDCONbits; + +__sfr __at (0xF7E) BAUDCON1; +volatile __BAUDCON1bits_t __at (0xF7E) BAUDCON1bits; + +__sfr __at (0xF7E) BAUDCTL; +volatile __BAUDCTLbits_t __at (0xF7E) BAUDCTLbits; + +__sfr __at (0xF7E) BAUDCTL1; +volatile __BAUDCTL1bits_t __at (0xF7E) BAUDCTL1bits; + +__sfr __at (0xF7F) SPBRGH; + +__sfr __at (0xF7F) SPBRGH1; + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF85) PORTF; +volatile __PORTFbits_t __at (0xF85) PORTFbits; + +__sfr __at (0xF86) PORTG; +volatile __PORTGbits_t __at (0xF86) PORTGbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF8E) LATF; +volatile __LATFbits_t __at (0xF8E) LATFbits; + +__sfr __at (0xF8F) LATG; +volatile __LATGbits_t __at (0xF8F) LATGbits; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) DDRD; +volatile __DDRDbits_t __at (0xF95) DDRDbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) DDRE; +volatile __DDREbits_t __at (0xF96) DDREbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF97) DDRF; +volatile __DDRFbits_t __at (0xF97) DDRFbits; + +__sfr __at (0xF97) TRISF; +volatile __TRISFbits_t __at (0xF97) TRISFbits; + +__sfr __at (0xF98) DDRG; +volatile __DDRGbits_t __at (0xF98) DDRGbits; + +__sfr __at (0xF98) TRISG; +volatile __TRISGbits_t __at (0xF98) TRISGbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA3) PIE3; +volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +__sfr __at (0xFA4) PIR3; +volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +__sfr __at (0xFA5) IPR3; +volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAB) RCSTA1; +volatile __RCSTA1bits_t __at (0xFAB) RCSTA1bits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAC) TXSTA1; +volatile __TXSTA1bits_t __at (0xFAC) TXSTA1bits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAD) TXREG1; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAE) RCREG1; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFAF) SPBRG1; + +__sfr __at (0xFB1) T3CON; +volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +__sfr __at (0xFB2) TMR3L; + +__sfr __at (0xFB3) TMR3H; + +__sfr __at (0xFB4) CMCON; +volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) CCP3CON; +volatile __CCP3CONbits_t __at (0xFB7) CCP3CONbits; + +__sfr __at (0xFB7) ECCP3CON; +volatile __ECCP3CONbits_t __at (0xFB7) ECCP3CONbits; + +__sfr __at (0xFB8) CCPR3; + +__sfr __at (0xFB8) CCPR3L; + +__sfr __at (0xFB9) CCPR3H; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBA) ECCP2CON; +volatile __ECCP2CONbits_t __at (0xFBA) ECCP2CONbits; + +__sfr __at (0xFBB) CCPR2; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBD) ECCP1CON; +volatile __ECCP1CONbits_t __at (0xFBD) ECCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSP1CON2; +volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSP1CON1; +volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSP1STAT; +volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSP1ADD; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSP1BUF; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) ECON1; +volatile __ECON1bits_t __at (0xFD2) ECON1bits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f66j65.c b/device/lib/pic16/libdev/pic18f66j65.c new file mode 100644 index 0000000..8e05a02 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f66j65.c @@ -0,0 +1,6 @@ +/* + * pic18f66j65.c - device specific definitions + */ + +#include "pic18f66j60.c" + diff --git a/device/lib/pic16/libdev/pic18f6720.c b/device/lib/pic16/libdev/pic18f6720.c new file mode 100644 index 0000000..1c4bd16 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f6720.c @@ -0,0 +1,283 @@ + +/* + * pic18f6720.c - PIC18F6720 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f6720.c 3786 2005-06-24 15:59:33Z tecodev $ + * + */ + +#include + +__sfr __at (0xf6b) RCSTA2; +volatile __RCSTA2bits_t __at (0xf6b) RCSTA2bits; + +__sfr __at (0xf6c) TXSTA2; +volatile __TXSTA2bits_t __at (0xf6c) TXSTA2bits; + +__sfr __at (0xf6d) TXREG2; +__sfr __at (0xf6e) RCREG2; +__sfr __at (0xf6f) SPBRG2; +__sfr __at (0xf70) CCP5CON; +volatile __CCP5CONbits_t __at (0xf70) CCP5CONbits; + +__sfr __at (0xf71) CCPR5L; +__sfr __at (0xf72) CCPR5H; +__sfr __at (0xf73) CCP4CON; +volatile __CCP4CONbits_t __at (0xf73) CCP4CONbits; + +__sfr __at (0xf74) CCPR4L; +__sfr __at (0xf75) CCPR4H; +__sfr __at (0xf76) T4CON; +volatile __T4CONbits_t __at (0xf76) T4CONbits; + +__sfr __at (0xf77) PR4; +__sfr __at (0xf78) TMR4; +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf83) PORTD; +volatile __PORTDbits_t __at (0xf83) PORTDbits; + +__sfr __at (0xf84) PORTE; +volatile __PORTEbits_t __at (0xf84) PORTEbits; + +__sfr __at (0xf85) PORTF; +volatile __PORTFbits_t __at (0xf85) PORTFbits; + +__sfr __at (0xf86) PORTG; +volatile __PORTGbits_t __at (0xf86) PORTGbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf8c) LATD; +volatile __LATDbits_t __at (0xf8c) LATDbits; + +__sfr __at (0xf8d) LATE; +volatile __LATEbits_t __at (0xf8d) LATEbits; + +__sfr __at (0xf8e) LATF; +volatile __LATFbits_t __at (0xf8e) LATFbits; + +__sfr __at (0xf8f) LATG; +volatile __LATGbits_t __at (0xf8f) LATGbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf95) TRISD; +volatile __TRISDbits_t __at (0xf95) TRISDbits; + +__sfr __at (0xf96) TRISE; +volatile __TRISEbits_t __at (0xf96) TRISEbits; + +__sfr __at (0xf97) TRISF; +volatile __TRISFbits_t __at (0xf97) TRISFbits; + +__sfr __at (0xf98) TRISG; +volatile __TRISGbits_t __at (0xf98) TRISGbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa3) PIE3; +volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +__sfr __at (0xfa4) PIR3; +volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +__sfr __at (0xfa5) IPR3; +volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfaa) EEADRH; +__sfr __at (0xfab) RCSTA1; +volatile __RCSTA1bits_t __at (0xfab) RCSTA1bits; + +__sfr __at (0xfac) TXSTA1; +volatile __TXSTA1bits_t __at (0xfac) TXSTA1bits; + +__sfr __at (0xfad) TXREG1; +__sfr __at (0xfae) RCREG1; +__sfr __at (0xfaf) SPBRG1; +__sfr __at (0xfb0) PSPCON; +volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfb4) CMCON; +volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +__sfr __at (0xfb5) CVRCON; +volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +__sfr __at (0xfb7) CCP3CON; +volatile __CCP3CONbits_t __at (0xfb7) CCP3CONbits; + +__sfr __at (0xfb8) CCPR3L; +__sfr __at (0xfb9) CCPR3H; +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfbb) CCPR2L; +__sfr __at (0xfbc) CCPR2H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc0) ADCON2; +volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + +/* for compatibility reasons */ +__sfr __at (0xfab) RCSTA; +volatile __RCSTA1bits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTA1bits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; diff --git a/device/lib/pic16/libdev/pic18f67j50.c b/device/lib/pic16/libdev/pic18f67j50.c new file mode 100644 index 0000000..816ecd5 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f67j50.c @@ -0,0 +1,634 @@ +/* + * pic18f67j50.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xF40) PMSTAT; + +__sfr __at (0xF40) PMSTATL; +volatile __PMSTATLbits_t __at (0xF40) PMSTATLbits; + +__sfr __at (0xF41) PMSTATH; +volatile __PMSTATHbits_t __at (0xF41) PMSTATHbits; + +__sfr __at (0xF42) PMEL; +volatile __PMELbits_t __at (0xF42) PMELbits; + +__sfr __at (0xF42) PMEN; + +__sfr __at (0xF43) PMEH; +volatile __PMEHbits_t __at (0xF43) PMEHbits; + +__sfr __at (0xF44) PMDIN2; + +__sfr __at (0xF44) PMDIN2L; + +__sfr __at (0xF45) PMDIN2H; + +__sfr __at (0xF46) PMDOUT2; + +__sfr __at (0xF46) PMDOUT2L; + +__sfr __at (0xF47) PMDOUT2H; + +__sfr __at (0xF48) PMMODE; + +__sfr __at (0xF48) PMMODEL; +volatile __PMMODELbits_t __at (0xF48) PMMODELbits; + +__sfr __at (0xF49) PMMODEH; +volatile __PMMODEHbits_t __at (0xF49) PMMODEHbits; + +__sfr __at (0xF4A) PMCON; + +__sfr __at (0xF4A) PMCONL; +volatile __PMCONLbits_t __at (0xF4A) PMCONLbits; + +__sfr __at (0xF4B) PMCONH; +volatile __PMCONHbits_t __at (0xF4B) PMCONHbits; + +__sfr __at (0xF4C) UEP0; +volatile __UEP0bits_t __at (0xF4C) UEP0bits; + +__sfr __at (0xF4D) UEP1; +volatile __UEP1bits_t __at (0xF4D) UEP1bits; + +__sfr __at (0xF4E) UEP2; +volatile __UEP2bits_t __at (0xF4E) UEP2bits; + +__sfr __at (0xF4F) UEP3; +volatile __UEP3bits_t __at (0xF4F) UEP3bits; + +__sfr __at (0xF50) UEP4; +volatile __UEP4bits_t __at (0xF50) UEP4bits; + +__sfr __at (0xF51) UEP5; +volatile __UEP5bits_t __at (0xF51) UEP5bits; + +__sfr __at (0xF52) UEP6; +volatile __UEP6bits_t __at (0xF52) UEP6bits; + +__sfr __at (0xF53) UEP7; +volatile __UEP7bits_t __at (0xF53) UEP7bits; + +__sfr __at (0xF54) UEP8; +volatile __UEP8bits_t __at (0xF54) UEP8bits; + +__sfr __at (0xF55) UEP9; +volatile __UEP9bits_t __at (0xF55) UEP9bits; + +__sfr __at (0xF56) UEP10; +volatile __UEP10bits_t __at (0xF56) UEP10bits; + +__sfr __at (0xF57) UEP11; +volatile __UEP11bits_t __at (0xF57) UEP11bits; + +__sfr __at (0xF58) UEP12; +volatile __UEP12bits_t __at (0xF58) UEP12bits; + +__sfr __at (0xF59) UEP13; +volatile __UEP13bits_t __at (0xF59) UEP13bits; + +__sfr __at (0xF5A) UEP14; +volatile __UEP14bits_t __at (0xF5A) UEP14bits; + +__sfr __at (0xF5B) UEP15; +volatile __UEP15bits_t __at (0xF5B) UEP15bits; + +__sfr __at (0xF5C) UIE; +volatile __UIEbits_t __at (0xF5C) UIEbits; + +__sfr __at (0xF5D) UEIE; +volatile __UEIEbits_t __at (0xF5D) UEIEbits; + +__sfr __at (0xF5E) UADDR; +volatile __UADDRbits_t __at (0xF5E) UADDRbits; + +__sfr __at (0xF5F) UCFG; +volatile __UCFGbits_t __at (0xF5F) UCFGbits; + +__sfr __at (0xF60) UFRM; + +__sfr __at (0xF60) UFRML; +volatile __UFRMLbits_t __at (0xF60) UFRMLbits; + +__sfr __at (0xF61) UFRMH; +volatile __UFRMHbits_t __at (0xF61) UFRMHbits; + +__sfr __at (0xF62) UIR; +volatile __UIRbits_t __at (0xF62) UIRbits; + +__sfr __at (0xF63) UEIR; +volatile __UEIRbits_t __at (0xF63) UEIRbits; + +__sfr __at (0xF64) USTAT; +volatile __USTATbits_t __at (0xF64) USTATbits; + +__sfr __at (0xF65) UCON; +volatile __UCONbits_t __at (0xF65) UCONbits; + +__sfr __at (0xF66) PMDIN1; + +__sfr __at (0xF66) PMDIN1L; + +__sfr __at (0xF67) PMDIN1H; + +__sfr __at (0xF68) PMADDR; + +__sfr __at (0xF68) PMADDRL; + +__sfr __at (0xF68) PMDOUT1; + +__sfr __at (0xF68) PMDOUT1L; + +__sfr __at (0xF69) PMADDRH; +volatile __PMADDRHbits_t __at (0xF69) PMADDRHbits; + +__sfr __at (0xF69) PMDOUT1H; + +__sfr __at (0xF6A) CMSTAT; +volatile __CMSTATbits_t __at (0xF6A) CMSTATbits; + +__sfr __at (0xF6A) CMSTATUS; +volatile __CMSTATUSbits_t __at (0xF6A) CMSTATUSbits; + +__sfr __at (0xF6B) SSP2CON2; +volatile __SSP2CON2bits_t __at (0xF6B) SSP2CON2bits; + +__sfr __at (0xF6C) SSP2CON1; +volatile __SSP2CON1bits_t __at (0xF6C) SSP2CON1bits; + +__sfr __at (0xF6D) SSP2STAT; +volatile __SSP2STATbits_t __at (0xF6D) SSP2STATbits; + +__sfr __at (0xF6E) SSP2ADD; + +__sfr __at (0xF6E) SSP2MSK; +volatile __SSP2MSKbits_t __at (0xF6E) SSP2MSKbits; + +__sfr __at (0xF6F) SSP2BUF; + +__sfr __at (0xF70) CCP5CON; +volatile __CCP5CONbits_t __at (0xF70) CCP5CONbits; + +__sfr __at (0xF71) CCPR5; + +__sfr __at (0xF71) CCPR5L; + +__sfr __at (0xF72) CCPR5H; + +__sfr __at (0xF73) CCP4CON; +volatile __CCP4CONbits_t __at (0xF73) CCP4CONbits; + +__sfr __at (0xF74) CCPR4; + +__sfr __at (0xF74) CCPR4L; + +__sfr __at (0xF75) CCPR4H; + +__sfr __at (0xF76) T4CON; +volatile __T4CONbits_t __at (0xF76) T4CONbits; + +__sfr __at (0xF77) CVRCON; +volatile __CVRCONbits_t __at (0xF77) CVRCONbits; + +__sfr __at (0xF77) PR4; + +__sfr __at (0xF78) TMR4; + +__sfr __at (0xF79) T3CON; +volatile __T3CONbits_t __at (0xF79) T3CONbits; + +__sfr __at (0xF7A) TMR3L; + +__sfr __at (0xF7B) TMR3H; + +__sfr __at (0xF7C) BAUDCON2; +volatile __BAUDCON2bits_t __at (0xF7C) BAUDCON2bits; + +__sfr __at (0xF7D) SPBRGH2; + +__sfr __at (0xF7E) BAUDCON; +volatile __BAUDCONbits_t __at (0xF7E) BAUDCONbits; + +__sfr __at (0xF7E) BAUDCON1; +volatile __BAUDCON1bits_t __at (0xF7E) BAUDCON1bits; + +__sfr __at (0xF7F) SPBRGH; + +__sfr __at (0xF7F) SPBRGH1; + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF85) PORTF; +volatile __PORTFbits_t __at (0xF85) PORTFbits; + +__sfr __at (0xF86) PORTG; +volatile __PORTGbits_t __at (0xF86) PORTGbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF8E) LATF; +volatile __LATFbits_t __at (0xF8E) LATFbits; + +__sfr __at (0xF8F) LATG; +volatile __LATGbits_t __at (0xF8F) LATGbits; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) DDRD; +volatile __DDRDbits_t __at (0xF95) DDRDbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) DDRE; +volatile __DDREbits_t __at (0xF96) DDREbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF97) DDRF; +volatile __DDRFbits_t __at (0xF97) DDRFbits; + +__sfr __at (0xF97) TRISF; +volatile __TRISFbits_t __at (0xF97) TRISFbits; + +__sfr __at (0xF98) DDRG; +volatile __DDRGbits_t __at (0xF98) DDRGbits; + +__sfr __at (0xF98) TRISG; +volatile __TRISGbits_t __at (0xF98) TRISGbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9C) RCSTA2; +volatile __RCSTA2bits_t __at (0xF9C) RCSTA2bits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA3) PIE3; +volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +__sfr __at (0xFA4) PIR3; +volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +__sfr __at (0xFA5) IPR3; +volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFA8) TXSTA2; +volatile __TXSTA2bits_t __at (0xFA8) TXSTA2bits; + +__sfr __at (0xFA9) TXREG2; + +__sfr __at (0xFAA) RCREG2; + +__sfr __at (0xFAB) SPBRG2; + +__sfr __at (0xFAC) RCSTA; +volatile __RCSTAbits_t __at (0xFAC) RCSTAbits; + +__sfr __at (0xFAC) RCSTA1; +volatile __RCSTA1bits_t __at (0xFAC) RCSTA1bits; + +__sfr __at (0xFAD) TXSTA; +volatile __TXSTAbits_t __at (0xFAD) TXSTAbits; + +__sfr __at (0xFAD) TXSTA1; +volatile __TXSTA1bits_t __at (0xFAD) TXSTA1bits; + +__sfr __at (0xFAE) TXREG; + +__sfr __at (0xFAE) TXREG1; + +__sfr __at (0xFAF) RCREG; + +__sfr __at (0xFAF) RCREG1; + +__sfr __at (0xFB0) SPBRG; + +__sfr __at (0xFB0) SPBRG1; + +__sfr __at (0xFB1) CCP3CON; +volatile __CCP3CONbits_t __at (0xFB1) CCP3CONbits; + +__sfr __at (0xFB1) ECCP3CON; +volatile __ECCP3CONbits_t __at (0xFB1) ECCP3CONbits; + +__sfr __at (0xFB2) CCPR3; + +__sfr __at (0xFB2) CCPR3L; + +__sfr __at (0xFB3) CCPR3H; + +__sfr __at (0xFB4) ECCP3DEL; +volatile __ECCP3DELbits_t __at (0xFB4) ECCP3DELbits; + +__sfr __at (0xFB5) ECCP3AS; +volatile __ECCP3ASbits_t __at (0xFB5) ECCP3ASbits; + +__sfr __at (0xFB6) CCP2CON; +volatile __CCP2CONbits_t __at (0xFB6) CCP2CONbits; + +__sfr __at (0xFB6) ECCP2CON; +volatile __ECCP2CONbits_t __at (0xFB6) ECCP2CONbits; + +__sfr __at (0xFB7) CCPR2; + +__sfr __at (0xFB7) CCPR2L; + +__sfr __at (0xFB8) CCPR2H; + +__sfr __at (0xFB9) ECCP2DEL; +volatile __ECCP2DELbits_t __at (0xFB9) ECCP2DELbits; + +__sfr __at (0xFBA) ECCP2AS; +volatile __ECCP2ASbits_t __at (0xFBA) ECCP2ASbits; + +__sfr __at (0xFBB) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBB) CCP1CONbits; + +__sfr __at (0xFBB) ECCP1CON; +volatile __ECCP1CONbits_t __at (0xFBB) ECCP1CONbits; + +__sfr __at (0xFBC) CCPR1; + +__sfr __at (0xFBC) CCPR1L; + +__sfr __at (0xFBD) CCPR1H; + +__sfr __at (0xFBE) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xFBE) ECCP1DELbits; + +__sfr __at (0xFBF) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFBF) ECCP1ASbits; + +__sfr __at (0xFC0) WDTCON; +volatile __WDTCONbits_t __at (0xFC0) WDTCONbits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC1) ANCON0; +volatile __ANCON0bits_t __at (0xFC1) ANCON0bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC2) ANCON1; +volatile __ANCON1bits_t __at (0xFC2) ANCON1bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSP1CON2; +volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSP1CON1; +volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSP1STAT; +volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSP1ADD; + +__sfr __at (0xFC8) SSP1MSK; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSP1BUF; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) PADCFG1; +volatile __PADCFG1bits_t __at (0xFCC) PADCFG1bits; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) ODCON3; +volatile __ODCON3bits_t __at (0xFCD) ODCON3bits; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) ODCON2; +volatile __ODCON2bits_t __at (0xFCE) ODCON2bits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) ODCON1; +volatile __ODCON1bits_t __at (0xFCF) ODCON1bits; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) CM2CON; +volatile __CM2CONbits_t __at (0xFD1) CM2CONbits; + +__sfr __at (0xFD1) CM2CON1; +volatile __CM2CON1bits_t __at (0xFD1) CM2CON1bits; + +__sfr __at (0xFD2) CM1CON; +volatile __CM1CONbits_t __at (0xFD2) CM1CONbits; + +__sfr __at (0xFD2) CM1CON1; +volatile __CM1CON1bits_t __at (0xFD2) CM1CON1bits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD3) REFOCON; +volatile __REFOCONbits_t __at (0xFD3) REFOCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f67j60.c b/device/lib/pic16/libdev/pic18f67j60.c new file mode 100644 index 0000000..5fe635d --- /dev/null +++ b/device/lib/pic16/libdev/pic18f67j60.c @@ -0,0 +1,6 @@ +/* + * pic18f67j60.c - device specific definitions + */ + +#include "pic18f66j60.c" + diff --git a/device/lib/pic16/libdev/pic18f8520.c b/device/lib/pic16/libdev/pic18f8520.c new file mode 100644 index 0000000..812e22e --- /dev/null +++ b/device/lib/pic16/libdev/pic18f8520.c @@ -0,0 +1,305 @@ + +/* + * pic18f8520.c - PIC18F8520 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f8520.c 3786 2005-06-24 15:59:33Z tecodev $ + * + */ + +#include + +__sfr __at (0xf6b) RCSTA2; +volatile __RCSTA2bits_t __at (0xf6b) RCSTA2bits; + +__sfr __at (0xf6c) TXSTA2; +volatile __TXSTA2bits_t __at (0xf6c) TXSTA2bits; + +__sfr __at (0xf6d) TXREG2; +__sfr __at (0xf6e) RCREG2; +__sfr __at (0xf6f) SPBRG2; +__sfr __at (0xf70) CCP5CON; +volatile __CCP5CONbits_t __at (0xf70) CCP5CONbits; + +__sfr __at (0xf71) CCPR5L; +__sfr __at (0xf72) CCPR5H; +__sfr __at (0xf73) CCP4CON; +volatile __CCP4CONbits_t __at (0xf73) CCP4CONbits; + +__sfr __at (0xf74) CCPR4L; +__sfr __at (0xf75) CCPR4H; +__sfr __at (0xf76) T4CON; +volatile __T4CONbits_t __at (0xf76) T4CONbits; + +__sfr __at (0xf77) PR4; +__sfr __at (0xf78) TMR4; +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf83) PORTD; +volatile __PORTDbits_t __at (0xf83) PORTDbits; + +__sfr __at (0xf84) PORTE; +volatile __PORTEbits_t __at (0xf84) PORTEbits; + +__sfr __at (0xf85) PORTF; +volatile __PORTFbits_t __at (0xf85) PORTFbits; + +__sfr __at (0xf86) PORTG; +volatile __PORTGbits_t __at (0xf86) PORTGbits; + +__sfr __at (0xf87) PORTH; +volatile __PORTHbits_t __at (0xf87) PORTHbits; + +__sfr __at (0xf88) PORTJ; +volatile __PORTJbits_t __at (0xf88) PORTJbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf8c) LATD; +volatile __LATDbits_t __at (0xf8c) LATDbits; + +__sfr __at (0xf8d) LATE; +volatile __LATEbits_t __at (0xf8d) LATEbits; + +__sfr __at (0xf8e) LATF; +volatile __LATFbits_t __at (0xf8e) LATFbits; + +__sfr __at (0xf8f) LATG; +volatile __LATGbits_t __at (0xf8f) LATGbits; + +__sfr __at (0xf90) LATH; +volatile __LATHbits_t __at (0xf90) LATHbits; + +__sfr __at (0xf91) LATJ; +volatile __LATJbits_t __at (0xf91) LATJbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf95) TRISD; +volatile __TRISDbits_t __at (0xf95) TRISDbits; + +__sfr __at (0xf96) TRISE; +volatile __TRISEbits_t __at (0xf96) TRISEbits; + +__sfr __at (0xf97) TRISF; +volatile __TRISFbits_t __at (0xf97) TRISFbits; + +__sfr __at (0xf98) TRISG; +volatile __TRISGbits_t __at (0xf98) TRISGbits; + +__sfr __at (0xf99) TRISH; +volatile __TRISHbits_t __at (0xf99) TRISHbits; + +__sfr __at (0xf9a) TRISJ; +volatile __TRISJbits_t __at (0xf9a) TRISJbits; + +__sfr __at (0xf9c) MEMCON; +volatile __MEMCONbits_t __at (0xf9c) MEMCONbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa3) PIE3; +volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +__sfr __at (0xfa4) PIR3; +volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +__sfr __at (0xfa5) IPR3; +volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfaa) EEADRH; +__sfr __at (0xfab) RCSTA1; +volatile __RCSTA1bits_t __at (0xfab) RCSTA1bits; + +__sfr __at (0xfac) TXSTA1; +volatile __TXSTA1bits_t __at (0xfac) TXSTA1bits; + +__sfr __at (0xfad) TXREG1; +__sfr __at (0xfae) RCREG1; +__sfr __at (0xfaf) SPBRG1; +__sfr __at (0xfb0) PSPCON; +volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfb4) CMCON; +volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +__sfr __at (0xfb5) CVRCON; +volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +__sfr __at (0xfb7) CCP3CON; +volatile __CCP3CONbits_t __at (0xfb7) CCP3CONbits; + +__sfr __at (0xfb8) CCPR3L; +__sfr __at (0xfb9) CCPR3H; +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfbb) CCPR2L; +__sfr __at (0xfbc) CCPR2H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc0) ADCON2; +volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + +/* for compatibility reasons */ +__sfr __at (0xfab) RCSTA; +volatile __RCSTA1bits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTA1bits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; diff --git a/device/lib/pic16/libdev/pic18f8585.c b/device/lib/pic16/libdev/pic18f8585.c new file mode 100644 index 0000000..740ff8d --- /dev/null +++ b/device/lib/pic16/libdev/pic18f8585.c @@ -0,0 +1,6 @@ +/* + * pic18f8585.c - device specific definitions + */ + +#include "pic18f8680.c" + diff --git a/device/lib/pic16/libdev/pic18f85j50.c b/device/lib/pic16/libdev/pic18f85j50.c new file mode 100644 index 0000000..6116d03 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f85j50.c @@ -0,0 +1,7 @@ +/* + * pic18f85j50.c - device specific definitions + */ + +#include +#include "pic18f87j50.c" + diff --git a/device/lib/pic16/libdev/pic18f8620.c b/device/lib/pic16/libdev/pic18f8620.c new file mode 100644 index 0000000..92a4d69 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f8620.c @@ -0,0 +1,305 @@ + +/* + * pic18f8620.c - PIC18F8620 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f8620.c 3786 2005-06-24 15:59:33Z tecodev $ + * + */ + +#include + +__sfr __at (0xf6b) RCSTA2; +volatile __RCSTA2bits_t __at (0xf6b) RCSTA2bits; + +__sfr __at (0xf6c) TXSTA2; +volatile __TXSTA2bits_t __at (0xf6c) TXSTA2bits; + +__sfr __at (0xf6d) TXREG2; +__sfr __at (0xf6e) RCREG2; +__sfr __at (0xf6f) SPBRG2; +__sfr __at (0xf70) CCP5CON; +volatile __CCP5CONbits_t __at (0xf70) CCP5CONbits; + +__sfr __at (0xf71) CCPR5L; +__sfr __at (0xf72) CCPR5H; +__sfr __at (0xf73) CCP4CON; +volatile __CCP4CONbits_t __at (0xf73) CCP4CONbits; + +__sfr __at (0xf74) CCPR4L; +__sfr __at (0xf75) CCPR4H; +__sfr __at (0xf76) T4CON; +volatile __T4CONbits_t __at (0xf76) T4CONbits; + +__sfr __at (0xf77) PR4; +__sfr __at (0xf78) TMR4; +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf83) PORTD; +volatile __PORTDbits_t __at (0xf83) PORTDbits; + +__sfr __at (0xf84) PORTE; +volatile __PORTEbits_t __at (0xf84) PORTEbits; + +__sfr __at (0xf85) PORTF; +volatile __PORTFbits_t __at (0xf85) PORTFbits; + +__sfr __at (0xf86) PORTG; +volatile __PORTGbits_t __at (0xf86) PORTGbits; + +__sfr __at (0xf87) PORTH; +volatile __PORTHbits_t __at (0xf87) PORTHbits; + +__sfr __at (0xf88) PORTJ; +volatile __PORTJbits_t __at (0xf88) PORTJbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf8c) LATD; +volatile __LATDbits_t __at (0xf8c) LATDbits; + +__sfr __at (0xf8d) LATE; +volatile __LATEbits_t __at (0xf8d) LATEbits; + +__sfr __at (0xf8e) LATF; +volatile __LATFbits_t __at (0xf8e) LATFbits; + +__sfr __at (0xf8f) LATG; +volatile __LATGbits_t __at (0xf8f) LATGbits; + +__sfr __at (0xf90) LATH; +volatile __LATHbits_t __at (0xf90) LATHbits; + +__sfr __at (0xf91) LATJ; +volatile __LATJbits_t __at (0xf91) LATJbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf95) TRISD; +volatile __TRISDbits_t __at (0xf95) TRISDbits; + +__sfr __at (0xf96) TRISE; +volatile __TRISEbits_t __at (0xf96) TRISEbits; + +__sfr __at (0xf97) TRISF; +volatile __TRISFbits_t __at (0xf97) TRISFbits; + +__sfr __at (0xf98) TRISG; +volatile __TRISGbits_t __at (0xf98) TRISGbits; + +__sfr __at (0xf99) TRISH; +volatile __TRISHbits_t __at (0xf99) TRISHbits; + +__sfr __at (0xf9a) TRISJ; +volatile __TRISJbits_t __at (0xf9a) TRISJbits; + +__sfr __at (0xf9c) MEMCON; +volatile __MEMCONbits_t __at (0xf9c) MEMCONbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa3) PIE3; +volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +__sfr __at (0xfa4) PIR3; +volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +__sfr __at (0xfa5) IPR3; +volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfaa) EEADRH; +__sfr __at (0xfab) RCSTA1; +volatile __RCSTA1bits_t __at (0xfab) RCSTA1bits; + +__sfr __at (0xfac) TXSTA1; +volatile __TXSTA1bits_t __at (0xfac) TXSTA1bits; + +__sfr __at (0xfad) TXREG1; +__sfr __at (0xfae) RCREG1; +__sfr __at (0xfaf) SPBRG1; +__sfr __at (0xfb0) PSPCON; +volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfb4) CMCON; +volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +__sfr __at (0xfb5) CVRCON; +volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +__sfr __at (0xfb7) CCP3CON; +volatile __CCP3CONbits_t __at (0xfb7) CCP3CONbits; + +__sfr __at (0xfb8) CCPR3L; +__sfr __at (0xfb9) CCPR3H; +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfbb) CCPR2L; +__sfr __at (0xfbc) CCPR2H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc0) ADCON2; +volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + +/* for compatibility reasons */ +__sfr __at (0xfab) RCSTA; +volatile __RCSTA1bits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTA1bits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; diff --git a/device/lib/pic16/libdev/pic18f8680.c b/device/lib/pic16/libdev/pic18f8680.c new file mode 100644 index 0000000..908fd23 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f8680.c @@ -0,0 +1,447 @@ + +/* + * pic18f8680.c - PIC18F8680 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f8680.c 3765 2005-05-18 20:32:06Z tecodev $ + * + */ + +#include + +__sfr __at (0xf00) RXF0SIDH; +__sfr __at (0xf01) RXF0SIDL; +volatile __RXF0SIDLbits_t __at (0xf01) RXF0SIDLbits; + +__sfr __at (0xf02) RXF0EIDH; +__sfr __at (0xf03) RXF0EIDL; +__sfr __at (0xf04) RXF1SIDH; +__sfr __at (0xf05) RXF1SIDL; +volatile __RXF1SIDLbits_t __at (0xf05) RXF1SIDLbits; + +__sfr __at (0xf06) RXF1EIDH; +__sfr __at (0xf07) RXF1EIDL; +__sfr __at (0xf08) RXF2SIDH; +__sfr __at (0xf09) RXF2SIDL; +__sfr __at (0xf0a) RXF2EIDH; +__sfr __at (0xf0b) RXF2EIDL; +volatile __RXF2EIDLbits_t __at (0xf0b) RXF2EIDLbits; + +__sfr __at (0xf0c) RXF3SIDH; +__sfr __at (0xf0d) RXF3SIDL; +volatile __RXF3SIDLbits_t __at (0xf0d) RXF3SIDLbits; + +__sfr __at (0xf0e) RXF3EIDH; +__sfr __at (0xf0f) RXF3EIDL; +__sfr __at (0xf10) RXF4SIDH; +__sfr __at (0xf11) RXF4SIDL; +volatile __RXF4SIDLbits_t __at (0xf11) RXF4SIDLbits; + +__sfr __at (0xf12) RXF4EIDH; +__sfr __at (0xf13) RXF4EIDL; +__sfr __at (0xf14) RXF5SIDH; +__sfr __at (0xf15) RXF5SIDL; +volatile __RXF5SIDLbits_t __at (0xf15) RXF5SIDLbits; + +__sfr __at (0xf16) RXF5EIDH; +__sfr __at (0xf17) RXF5EIDL; +__sfr __at (0xf18) RXM0SIDH; +__sfr __at (0xf19) RXM0SIDL; +volatile __RXM0SIDLbits_t __at (0xf19) RXM0SIDLbits; + +__sfr __at (0xf1a) RXM0EIDH; +__sfr __at (0xf1b) RXM0EIDL; +__sfr __at (0xf1c) RXM1SIDH; +__sfr __at (0xf1d) RXM1SIDL; +volatile __RXM1SIDLbits_t __at (0xf1d) RXM1SIDLbits; + +__sfr __at (0xf1e) RXM1EIDH; +__sfr __at (0xf1f) RXM1EIDL; +__sfr __at (0xf20) TXB2CON; +volatile __TXB2CONbits_t __at (0xf20) TXB2CONbits; + +__sfr __at (0xf21) TXB2SIDH; +__sfr __at (0xf22) TXB2SIDL; +volatile __TXB2SIDLbits_t __at (0xf22) TXB2SIDLbits; + +__sfr __at (0xf23) TXB2EIDH; +__sfr __at (0xf24) TXB2EIDL; +__sfr __at (0xf25) TXB2DLC; +volatile __TXB2DLCbits_t __at (0xf25) TXB2DLCbits; + +__sfr __at (0xf26) TXB2D0; +__sfr __at (0xf27) TXB2D1; +__sfr __at (0xf28) TXB2D2; +__sfr __at (0xf29) TXB2D3; +__sfr __at (0xf2a) TXB2D4; +__sfr __at (0xf2b) TXB2D5; +__sfr __at (0xf2c) TXB2D6; +__sfr __at (0xf2d) TXB2D7; +__sfr __at (0xf2e) CANSTATRO3; +__sfr __at (0xf30) TXB1CON; +volatile __TXB1CONbits_t __at (0xf30) TXB1CONbits; + +__sfr __at (0xf31) TXB1SIDH; +__sfr __at (0xf32) TXB1SIDL; +volatile __TXB1SIDLbits_t __at (0xf32) TXB1SIDLbits; + +__sfr __at (0xf33) TXB1EIDH; +__sfr __at (0xf34) TXB1EIDL; +__sfr __at (0xf35) TXB1DLC; +volatile __TXB1DLCbits_t __at (0xf35) TXB1DLCbits; + +__sfr __at (0xf36) TXB1D0; +__sfr __at (0xf37) TXB1D1; +__sfr __at (0xf38) TXB1D2; +__sfr __at (0xf39) TXB1D3; +__sfr __at (0xf3a) TXB1D4; +__sfr __at (0xf3b) TXB1D5; +__sfr __at (0xf3c) TXB1D6; +__sfr __at (0xf3d) TXB1D7; +__sfr __at (0xf3e) CANSTATRO2; +__sfr __at (0xf40) TXB0CON; +volatile __TXB0CONbits_t __at (0xf40) TXB0CONbits; + +__sfr __at (0xf41) TXB0SIDH; +__sfr __at (0xf42) TXB0SIDL; +__sfr __at (0xf43) TXB0EIDH; +__sfr __at (0xf44) TXB0EIDL; +__sfr __at (0xf45) TXB0DLC; +volatile __TXB0DLCbits_t __at (0xf45) TXB0DLCbits; + +__sfr __at (0xf46) TXB0D0; +__sfr __at (0xf47) TXB0D1; +__sfr __at (0xf48) TXB0D2; +__sfr __at (0xf49) TXB0D3; +__sfr __at (0xf4a) TXB0D4; +__sfr __at (0xf4b) TXB0D5; +__sfr __at (0xf4c) TXB0D6; +__sfr __at (0xf4d) TXB0D7; +__sfr __at (0xf4e) CANSTATRO1; +__sfr __at (0xf50) RXB1CON; +volatile __RXB1CONbits_t __at (0xf50) RXB1CONbits; + +__sfr __at (0xf51) RXB1SIDH; +__sfr __at (0xf52) RXB1SIDL; +volatile __RXB1SIDLbits_t __at (0xf52) RXB1SIDLbits; + +__sfr __at (0xf53) RXB1EIDH; +__sfr __at (0xf54) RXB1EIDL; +__sfr __at (0xf55) RXB1DLC; +volatile __RXB1DLCbits_t __at (0xf55) RXB1DLCbits; + +__sfr __at (0xf56) RXB1D0; +__sfr __at (0xf57) RXB1D1; +__sfr __at (0xf58) RXB1D2; +__sfr __at (0xf59) RXB1D3; +__sfr __at (0xf5a) RXB1D4; +__sfr __at (0xf5b) RXB1D5; +__sfr __at (0xf5c) RXB1D6; +__sfr __at (0xf5d) RXB1D7; +__sfr __at (0xf5e) CANSTATRO0; +__sfr __at (0xf60) RXB0CON; +volatile __RXB0CONbits_t __at (0xf60) RXB0CONbits; + +__sfr __at (0xf61) RXB0SIDH; +__sfr __at (0xf62) RXB0SIDL; +volatile __RXB0SIDLbits_t __at (0xf62) RXB0SIDLbits; + +__sfr __at (0xf63) RXB0EIDH; +__sfr __at (0xf64) RXB0EIDL; +__sfr __at (0xf65) RXB0DLC; +__sfr __at (0xf66) RXB0D0; +__sfr __at (0xf67) RXB0D1; +__sfr __at (0xf68) RXB0D2; +__sfr __at (0xf69) RXB0D3; +__sfr __at (0xf6a) RXB0D4; +__sfr __at (0xf6b) RXB0D5; +__sfr __at (0xf6c) RXB0D6; +__sfr __at (0xf6d) RXB0D7; +__sfr __at (0xf6e) CANSTAT; +volatile __CANSTATbits_t __at (0xf6e) CANSTATbits; + +__sfr __at (0xf6f) CANCON; +volatile __CANCONbits_t __at (0xf6f) CANCONbits; + +__sfr __at (0xf70) BRGCON1; +volatile __BRGCON1bits_t __at (0xf70) BRGCON1bits; + +__sfr __at (0xf71) BRGCON2; +volatile __BRGCON2bits_t __at (0xf71) BRGCON2bits; + +__sfr __at (0xf72) BRGCON3; +volatile __BRGCON3bits_t __at (0xf72) BRGCON3bits; + +__sfr __at (0xf73) CIOCON; +volatile __CIOCONbits_t __at (0xf73) CIOCONbits; + +__sfr __at (0xf74) COMSTAT; +volatile __COMSTATbits_t __at (0xf74) COMSTATbits; + +__sfr __at (0xf75) RXERRCNT; +volatile __RXERRCNTbits_t __at (0xf75) RXERRCNTbits; + +__sfr __at (0xf76) TXERRCNT; +volatile __TXERRCNTbits_t __at (0xf76) TXERRCNTbits; + +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf83) PORTD; +volatile __PORTDbits_t __at (0xf83) PORTDbits; + +__sfr __at (0xf84) PORTE; +volatile __PORTEbits_t __at (0xf84) PORTEbits; + +__sfr __at (0xf85) PORTF; +volatile __PORTFbits_t __at (0xf85) PORTFbits; + +__sfr __at (0xf86) PORTG; +volatile __PORTGbits_t __at (0xf86) PORTGbits; + +__sfr __at (0xf87) PORTH; +volatile __PORTHbits_t __at (0xf87) PORTHbits; + +__sfr __at (0xf88) PORTJ; +volatile __PORTJbits_t __at (0xf88) PORTJbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf8c) LATD; +volatile __LATDbits_t __at (0xf8c) LATDbits; + +__sfr __at (0xf8d) LATE; +volatile __LATEbits_t __at (0xf8d) LATEbits; + +__sfr __at (0xf8e) LATF; +volatile __LATFbits_t __at (0xf8e) LATFbits; + +__sfr __at (0xf8f) LATG; +volatile __LATGbits_t __at (0xf8f) LATGbits; + +__sfr __at (0xf90) LATH; +volatile __LATHbits_t __at (0xf90) LATHbits; + +__sfr __at (0xf91) LATJ; +volatile __LATJbits_t __at (0xf91) LATJbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf95) TRISD; +volatile __TRISDbits_t __at (0xf95) TRISDbits; + +__sfr __at (0xf96) TRISE; +volatile __TRISEbits_t __at (0xf96) TRISEbits; + +__sfr __at (0xf97) TRISF; +volatile __TRISFbits_t __at (0xf97) TRISFbits; + +__sfr __at (0xf98) TRISG; +volatile __TRISGbits_t __at (0xf98) TRISGbits; + +__sfr __at (0xf99) TRISH; +volatile __TRISHbits_t __at (0xf99) TRISHbits; + +__sfr __at (0xf9a) TRISJ; +volatile __TRISJbits_t __at (0xf9a) TRISJbits; + +__sfr __at (0xf9c) MEMCON; +volatile __MEMCONbits_t __at (0xf9c) MEMCONbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa3) PIE3; +volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +__sfr __at (0xfa4) PIR3; +volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +__sfr __at (0xfa5) IPR3; +volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfaa) EEADRH; +__sfr __at (0xfab) RCSTA; +volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; +__sfr __at (0xfb0) PSPCON; +volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfb4) CMCON; +volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +__sfr __at (0xfb5) CVRCON; +volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +__sfr __at (0xfb6) ECCPAS; +volatile __ECCPASbits_t __at (0xfb6) ECCPASbits; + +__sfr __at (0xfb7) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xfb7) ECCP1DELbits; + +__sfr __at (0xfba) ECCP1CON; +volatile __ECCP1CONbits_t __at (0xfba) ECCP1CONbits; + +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfbb) ECCPR1L; +__sfr __at (0xfbb) CCPR2L; +__sfr __at (0xfbc) ECCPR1H; +__sfr __at (0xfbc) CCPR2H; +__sfr __at (0xfc0) ADCON2; +volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f86j50.c b/device/lib/pic16/libdev/pic18f86j50.c new file mode 100644 index 0000000..d5bcabb --- /dev/null +++ b/device/lib/pic16/libdev/pic18f86j50.c @@ -0,0 +1,7 @@ +/* + * pic18f86j50.c - device specific definitions + */ + +#include +#include "pic18f87j50.c" + diff --git a/device/lib/pic16/libdev/pic18f86j55.c b/device/lib/pic16/libdev/pic18f86j55.c new file mode 100644 index 0000000..4a48bb8 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f86j55.c @@ -0,0 +1,7 @@ +/* + * pic18f86j55.c - device specific definitions + */ + +#include +#include "pic18f87j50.c" + diff --git a/device/lib/pic16/libdev/pic18f86j60.c b/device/lib/pic16/libdev/pic18f86j60.c new file mode 100644 index 0000000..4feea2e --- /dev/null +++ b/device/lib/pic16/libdev/pic18f86j60.c @@ -0,0 +1,705 @@ +/* + * pic18f86j60.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xE80) MAADR5; + +__sfr __at (0xE81) MAADR6; + +__sfr __at (0xE82) MAADR3; + +__sfr __at (0xE83) MAADR4; + +__sfr __at (0xE84) MAADR1; + +__sfr __at (0xE85) MAADR2; + +__sfr __at (0xE86) EBSTSD; + +__sfr __at (0xE87) EBSTCON; +volatile __EBSTCONbits_t __at (0xE87) EBSTCONbits; + +__sfr __at (0xE88) EBSTCS; + +__sfr __at (0xE88) EBSTCSL; + +__sfr __at (0xE89) EBSTCSH; + +__sfr __at (0xE8A) MISTAT; +volatile __MISTATbits_t __at (0xE8A) MISTATbits; + +__sfr __at (0xE97) EFLOCON; +volatile __EFLOCONbits_t __at (0xE97) EFLOCONbits; + +__sfr __at (0xE98) EPAUS; + +__sfr __at (0xE98) EPAUSL; + +__sfr __at (0xE99) EPAUSH; + +__sfr __at (0xEA0) MACON1; +volatile __MACON1bits_t __at (0xEA0) MACON1bits; + +__sfr __at (0xEA1) MACON2; +volatile __MACON2bits_t __at (0xEA1) MACON2bits; + +__sfr __at (0xEA2) MACON3; +volatile __MACON3bits_t __at (0xEA2) MACON3bits; + +__sfr __at (0xEA3) MACON4; +volatile __MACON4bits_t __at (0xEA3) MACON4bits; + +__sfr __at (0xEA4) MABBIPG; + +__sfr __at (0xEA6) MAIPG; + +__sfr __at (0xEA6) MAIPGL; + +__sfr __at (0xEA7) MAIPGH; + +__sfr __at (0xEA8) MACLCON1; +volatile __MACLCON1bits_t __at (0xEA8) MACLCON1bits; + +__sfr __at (0xEA9) MACLCON2; +volatile __MACLCON2bits_t __at (0xEA9) MACLCON2bits; + +__sfr __at (0xEAA) MAMXFL; + +__sfr __at (0xEAA) MAMXFLL; + +__sfr __at (0xEAB) MAMXFLH; + +__sfr __at (0xEB1) MICON; +volatile __MICONbits_t __at (0xEB1) MICONbits; + +__sfr __at (0xEB2) MICMD; +volatile __MICMDbits_t __at (0xEB2) MICMDbits; + +__sfr __at (0xEB4) MIREGADR; + +__sfr __at (0xEB6) MIWR; + +__sfr __at (0xEB6) MIWRL; + +__sfr __at (0xEB7) MIWRH; + +__sfr __at (0xEB8) MIRD; + +__sfr __at (0xEB8) MIRDL; + +__sfr __at (0xEB9) MIRDH; + +__sfr __at (0xEC0) EHT0; + +__sfr __at (0xEC1) EHT1; + +__sfr __at (0xEC2) EHT2; + +__sfr __at (0xEC3) EHT3; + +__sfr __at (0xEC4) EHT4; + +__sfr __at (0xEC5) EHT5; + +__sfr __at (0xEC6) EHT6; + +__sfr __at (0xEC7) EHT7; + +__sfr __at (0xEC8) EPMM0; + +__sfr __at (0xEC9) EPMM1; + +__sfr __at (0xECA) EPMM2; + +__sfr __at (0xECB) EPMM3; + +__sfr __at (0xECC) EPMM4; + +__sfr __at (0xECD) EPMM5; + +__sfr __at (0xECE) EPMM6; + +__sfr __at (0xECF) EPMM7; + +__sfr __at (0xED0) EPMCS; + +__sfr __at (0xED0) EPMCSL; + +__sfr __at (0xED1) EPMCSH; + +__sfr __at (0xED4) EPMO; + +__sfr __at (0xED4) EPMOL; + +__sfr __at (0xED5) EPMOH; + +__sfr __at (0xED6) EWOLIE; +volatile __EWOLIEbits_t __at (0xED6) EWOLIEbits; + +__sfr __at (0xED7) EWOLIR; +volatile __EWOLIRbits_t __at (0xED7) EWOLIRbits; + +__sfr __at (0xED8) ERXFCON; +volatile __ERXFCONbits_t __at (0xED8) ERXFCONbits; + +__sfr __at (0xED9) EPKTCNT; + +__sfr __at (0xEE2) EWRPT; + +__sfr __at (0xEE2) EWRPTL; + +__sfr __at (0xEE3) EWRPTH; + +__sfr __at (0xEE4) ETXST; + +__sfr __at (0xEE4) ETXSTL; + +__sfr __at (0xEE5) ETXSTH; + +__sfr __at (0xEE6) ETXND; + +__sfr __at (0xEE6) ETXNDL; + +__sfr __at (0xEE7) ETXNDH; + +__sfr __at (0xEE8) ERXST; + +__sfr __at (0xEE8) ERXSTL; + +__sfr __at (0xEE9) ERXSTH; + +__sfr __at (0xEEA) ERXND; + +__sfr __at (0xEEA) ERXNDL; + +__sfr __at (0xEEB) ERXNDH; + +__sfr __at (0xEEC) ERXRDPT; + +__sfr __at (0xEEC) ERXRDPTL; + +__sfr __at (0xEED) ERXRDPTH; + +__sfr __at (0xEEE) ERXWRPT; + +__sfr __at (0xEEE) ERXWRPTL; + +__sfr __at (0xEEF) ERXWRPTH; + +__sfr __at (0xEF0) EDMAST; + +__sfr __at (0xEF0) EDMASTL; + +__sfr __at (0xEF1) EDMASTH; + +__sfr __at (0xEF2) EDMAND; + +__sfr __at (0xEF2) EDMANDL; + +__sfr __at (0xEF3) EDMANDH; + +__sfr __at (0xEF4) EDMADST; + +__sfr __at (0xEF4) EDMADSTL; + +__sfr __at (0xEF5) EDMADSTH; + +__sfr __at (0xEF6) EDMACS; + +__sfr __at (0xEF6) EDMACSL; + +__sfr __at (0xEF7) EDMACSH; + +__sfr __at (0xEFB) EIE; +volatile __EIEbits_t __at (0xEFB) EIEbits; + +__sfr __at (0xEFD) ESTAT; +volatile __ESTATbits_t __at (0xEFD) ESTATbits; + +__sfr __at (0xEFE) ECON2; +volatile __ECON2bits_t __at (0xEFE) ECON2bits; + +__sfr __at (0xF60) EIR; +volatile __EIRbits_t __at (0xF60) EIRbits; + +__sfr __at (0xF61) EDATA; +volatile __EDATAbits_t __at (0xF61) EDATAbits; + +__sfr __at (0xF67) ECCP2DEL; +volatile __ECCP2DELbits_t __at (0xF67) ECCP2DELbits; + +__sfr __at (0xF68) ECCP2AS; +volatile __ECCP2ASbits_t __at (0xF68) ECCP2ASbits; + +__sfr __at (0xF69) ECCP3DEL; +volatile __ECCP3DELbits_t __at (0xF69) ECCP3DELbits; + +__sfr __at (0xF6A) ECCP3AS; +volatile __ECCP3ASbits_t __at (0xF6A) ECCP3ASbits; + +__sfr __at (0xF6B) RCSTA2; +volatile __RCSTA2bits_t __at (0xF6B) RCSTA2bits; + +__sfr __at (0xF6C) TXSTA2; +volatile __TXSTA2bits_t __at (0xF6C) TXSTA2bits; + +__sfr __at (0xF6D) TXREG2; + +__sfr __at (0xF6E) RCREG2; + +__sfr __at (0xF6F) SPBRG2; + +__sfr __at (0xF70) CCP5CON; +volatile __CCP5CONbits_t __at (0xF70) CCP5CONbits; + +__sfr __at (0xF71) CCPR5; + +__sfr __at (0xF71) CCPR5L; + +__sfr __at (0xF72) CCPR5H; + +__sfr __at (0xF73) CCP4CON; +volatile __CCP4CONbits_t __at (0xF73) CCP4CONbits; + +__sfr __at (0xF74) CCPR4; + +__sfr __at (0xF74) CCPR4L; + +__sfr __at (0xF75) CCPR4H; + +__sfr __at (0xF76) T4CON; +volatile __T4CONbits_t __at (0xF76) T4CONbits; + +__sfr __at (0xF77) PR4; + +__sfr __at (0xF78) TMR4; + +__sfr __at (0xF79) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xF79) ECCP1DELbits; + +__sfr __at (0xF7A) ERDPT; + +__sfr __at (0xF7A) ERDPTL; + +__sfr __at (0xF7B) ERDPTH; + +__sfr __at (0xF7C) BAUDCON2; +volatile __BAUDCON2bits_t __at (0xF7C) BAUDCON2bits; + +__sfr __at (0xF7C) BAUDCTL2; +volatile __BAUDCTL2bits_t __at (0xF7C) BAUDCTL2bits; + +__sfr __at (0xF7D) SPBRGH2; + +__sfr __at (0xF7E) BAUDCON; +volatile __BAUDCONbits_t __at (0xF7E) BAUDCONbits; + +__sfr __at (0xF7E) BAUDCON1; +volatile __BAUDCON1bits_t __at (0xF7E) BAUDCON1bits; + +__sfr __at (0xF7E) BAUDCTL; +volatile __BAUDCTLbits_t __at (0xF7E) BAUDCTLbits; + +__sfr __at (0xF7E) BAUDCTL1; +volatile __BAUDCTL1bits_t __at (0xF7E) BAUDCTL1bits; + +__sfr __at (0xF7F) SPBRGH; + +__sfr __at (0xF7F) SPBRGH1; + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF85) PORTF; +volatile __PORTFbits_t __at (0xF85) PORTFbits; + +__sfr __at (0xF86) PORTG; +volatile __PORTGbits_t __at (0xF86) PORTGbits; + +__sfr __at (0xF87) PORTH; +volatile __PORTHbits_t __at (0xF87) PORTHbits; + +__sfr __at (0xF88) PORTJ; +volatile __PORTJbits_t __at (0xF88) PORTJbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF8E) LATF; +volatile __LATFbits_t __at (0xF8E) LATFbits; + +__sfr __at (0xF8F) LATG; +volatile __LATGbits_t __at (0xF8F) LATGbits; + +__sfr __at (0xF90) LATH; +volatile __LATHbits_t __at (0xF90) LATHbits; + +__sfr __at (0xF91) LATJ; +volatile __LATJbits_t __at (0xF91) LATJbits; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) DDRD; +volatile __DDRDbits_t __at (0xF95) DDRDbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) DDRE; +volatile __DDREbits_t __at (0xF96) DDREbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF97) DDRF; +volatile __DDRFbits_t __at (0xF97) DDRFbits; + +__sfr __at (0xF97) TRISF; +volatile __TRISFbits_t __at (0xF97) TRISFbits; + +__sfr __at (0xF98) DDRG; +volatile __DDRGbits_t __at (0xF98) DDRGbits; + +__sfr __at (0xF98) TRISG; +volatile __TRISGbits_t __at (0xF98) TRISGbits; + +__sfr __at (0xF99) DDRH; +volatile __DDRHbits_t __at (0xF99) DDRHbits; + +__sfr __at (0xF99) TRISH; +volatile __TRISHbits_t __at (0xF99) TRISHbits; + +__sfr __at (0xF9A) DDRJ; +volatile __DDRJbits_t __at (0xF9A) DDRJbits; + +__sfr __at (0xF9A) TRISJ; +volatile __TRISJbits_t __at (0xF9A) TRISJbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA3) PIE3; +volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +__sfr __at (0xFA4) PIR3; +volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +__sfr __at (0xFA5) IPR3; +volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAB) RCSTA1; +volatile __RCSTA1bits_t __at (0xFAB) RCSTA1bits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAC) TXSTA1; +volatile __TXSTA1bits_t __at (0xFAC) TXSTA1bits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAD) TXREG1; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAE) RCREG1; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFAF) SPBRG1; + +__sfr __at (0xFB1) T3CON; +volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +__sfr __at (0xFB2) TMR3L; + +__sfr __at (0xFB3) TMR3H; + +__sfr __at (0xFB4) CMCON; +volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) CCP3CON; +volatile __CCP3CONbits_t __at (0xFB7) CCP3CONbits; + +__sfr __at (0xFB7) ECCP3CON; +volatile __ECCP3CONbits_t __at (0xFB7) ECCP3CONbits; + +__sfr __at (0xFB8) CCPR3; + +__sfr __at (0xFB8) CCPR3L; + +__sfr __at (0xFB9) CCPR3H; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBA) ECCP2CON; +volatile __ECCP2CONbits_t __at (0xFBA) ECCP2CONbits; + +__sfr __at (0xFBB) CCPR2; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBD) ECCP1CON; +volatile __ECCP1CONbits_t __at (0xFBD) ECCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSP1CON2; +volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSP1CON1; +volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSP1STAT; +volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSP1ADD; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSP1BUF; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) ECON1; +volatile __ECON1bits_t __at (0xFD2) ECON1bits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f86j65.c b/device/lib/pic16/libdev/pic18f86j65.c new file mode 100644 index 0000000..c815a55 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f86j65.c @@ -0,0 +1,6 @@ +/* + * pic18f86j65.c - device specific definitions + */ + +#include "pic18f86j60.c" + diff --git a/device/lib/pic16/libdev/pic18f8720.c b/device/lib/pic16/libdev/pic18f8720.c new file mode 100644 index 0000000..02dc39f --- /dev/null +++ b/device/lib/pic16/libdev/pic18f8720.c @@ -0,0 +1,305 @@ + +/* + * pic18f8720.c - PIC18F8720 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id: pic18f8720.c 3786 2005-06-24 15:59:33Z tecodev $ + * + */ + +#include + +__sfr __at (0xf6b) RCSTA2; +volatile __RCSTA2bits_t __at (0xf6b) RCSTA2bits; + +__sfr __at (0xf6c) TXSTA2; +volatile __TXSTA2bits_t __at (0xf6c) TXSTA2bits; + +__sfr __at (0xf6d) TXREG2; +__sfr __at (0xf6e) RCREG2; +__sfr __at (0xf6f) SPBRG2; +__sfr __at (0xf70) CCP5CON; +volatile __CCP5CONbits_t __at (0xf70) CCP5CONbits; + +__sfr __at (0xf71) CCPR5L; +__sfr __at (0xf72) CCPR5H; +__sfr __at (0xf73) CCP4CON; +volatile __CCP4CONbits_t __at (0xf73) CCP4CONbits; + +__sfr __at (0xf74) CCPR4L; +__sfr __at (0xf75) CCPR4H; +__sfr __at (0xf76) T4CON; +volatile __T4CONbits_t __at (0xf76) T4CONbits; + +__sfr __at (0xf77) PR4; +__sfr __at (0xf78) TMR4; +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf83) PORTD; +volatile __PORTDbits_t __at (0xf83) PORTDbits; + +__sfr __at (0xf84) PORTE; +volatile __PORTEbits_t __at (0xf84) PORTEbits; + +__sfr __at (0xf85) PORTF; +volatile __PORTFbits_t __at (0xf85) PORTFbits; + +__sfr __at (0xf86) PORTG; +volatile __PORTGbits_t __at (0xf86) PORTGbits; + +__sfr __at (0xf87) PORTH; +volatile __PORTHbits_t __at (0xf87) PORTHbits; + +__sfr __at (0xf88) PORTJ; +volatile __PORTJbits_t __at (0xf88) PORTJbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf8c) LATD; +volatile __LATDbits_t __at (0xf8c) LATDbits; + +__sfr __at (0xf8d) LATE; +volatile __LATEbits_t __at (0xf8d) LATEbits; + +__sfr __at (0xf8e) LATF; +volatile __LATFbits_t __at (0xf8e) LATFbits; + +__sfr __at (0xf8f) LATG; +volatile __LATGbits_t __at (0xf8f) LATGbits; + +__sfr __at (0xf90) LATH; +volatile __LATHbits_t __at (0xf90) LATHbits; + +__sfr __at (0xf91) LATJ; +volatile __LATJbits_t __at (0xf91) LATJbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf95) TRISD; +volatile __TRISDbits_t __at (0xf95) TRISDbits; + +__sfr __at (0xf96) TRISE; +volatile __TRISEbits_t __at (0xf96) TRISEbits; + +__sfr __at (0xf97) TRISF; +volatile __TRISFbits_t __at (0xf97) TRISFbits; + +__sfr __at (0xf98) TRISG; +volatile __TRISGbits_t __at (0xf98) TRISGbits; + +__sfr __at (0xf99) TRISH; +volatile __TRISHbits_t __at (0xf99) TRISHbits; + +__sfr __at (0xf9a) TRISJ; +volatile __TRISJbits_t __at (0xf9a) TRISJbits; + +__sfr __at (0xf9c) MEMCON; +volatile __MEMCONbits_t __at (0xf9c) MEMCONbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa3) PIE3; +volatile __PIE3bits_t __at (0xfa3) PIE3bits; + +__sfr __at (0xfa4) PIR3; +volatile __PIR3bits_t __at (0xfa4) PIR3bits; + +__sfr __at (0xfa5) IPR3; +volatile __IPR3bits_t __at (0xfa5) IPR3bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfaa) EEADRH; +__sfr __at (0xfab) RCSTA1; +volatile __RCSTA1bits_t __at (0xfab) RCSTA1bits; + +__sfr __at (0xfac) TXSTA1; +volatile __TXSTA1bits_t __at (0xfac) TXSTA1bits; + +__sfr __at (0xfad) TXREG1; +__sfr __at (0xfae) RCREG1; +__sfr __at (0xfaf) SPBRG1; +__sfr __at (0xfb0) PSPCON; +volatile __PSPCONbits_t __at (0xfb0) PSPCONbits; + +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfb4) CMCON; +volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +__sfr __at (0xfb5) CVRCON; +volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +__sfr __at (0xfb7) CCP3CON; +volatile __CCP3CONbits_t __at (0xfb7) CCP3CONbits; + +__sfr __at (0xfb8) CCPR3L; +__sfr __at (0xfb9) CCPR3H; +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfbb) CCPR2L; +__sfr __at (0xfbc) CCPR2H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc0) ADCON2; +volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + +/* for compatibility reasons */ +__sfr __at (0xfab) RCSTA; +volatile __RCSTA1bits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTA1bits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; diff --git a/device/lib/pic16/libdev/pic18f87j50.c b/device/lib/pic16/libdev/pic18f87j50.c new file mode 100644 index 0000000..0c6d5cf --- /dev/null +++ b/device/lib/pic16/libdev/pic18f87j50.c @@ -0,0 +1,661 @@ +/* + * pic18f87j50.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xF40) PMSTAT; + +__sfr __at (0xF40) PMSTATL; +volatile __PMSTATLbits_t __at (0xF40) PMSTATLbits; + +__sfr __at (0xF41) PMSTATH; +volatile __PMSTATHbits_t __at (0xF41) PMSTATHbits; + +__sfr __at (0xF42) PMEL; +volatile __PMELbits_t __at (0xF42) PMELbits; + +__sfr __at (0xF42) PMEN; + +__sfr __at (0xF43) PMEH; +volatile __PMEHbits_t __at (0xF43) PMEHbits; + +__sfr __at (0xF44) PMDIN2; + +__sfr __at (0xF44) PMDIN2L; + +__sfr __at (0xF45) PMDIN2H; + +__sfr __at (0xF46) PMDOUT2; + +__sfr __at (0xF46) PMDOUT2L; + +__sfr __at (0xF47) PMDOUT2H; + +__sfr __at (0xF48) PMMODE; + +__sfr __at (0xF48) PMMODEL; +volatile __PMMODELbits_t __at (0xF48) PMMODELbits; + +__sfr __at (0xF49) PMMODEH; +volatile __PMMODEHbits_t __at (0xF49) PMMODEHbits; + +__sfr __at (0xF4A) PMCON; + +__sfr __at (0xF4A) PMCONL; +volatile __PMCONLbits_t __at (0xF4A) PMCONLbits; + +__sfr __at (0xF4B) PMCONH; +volatile __PMCONHbits_t __at (0xF4B) PMCONHbits; + +__sfr __at (0xF4C) UEP0; +volatile __UEP0bits_t __at (0xF4C) UEP0bits; + +__sfr __at (0xF4D) UEP1; +volatile __UEP1bits_t __at (0xF4D) UEP1bits; + +__sfr __at (0xF4E) UEP2; +volatile __UEP2bits_t __at (0xF4E) UEP2bits; + +__sfr __at (0xF4F) UEP3; +volatile __UEP3bits_t __at (0xF4F) UEP3bits; + +__sfr __at (0xF50) UEP4; +volatile __UEP4bits_t __at (0xF50) UEP4bits; + +__sfr __at (0xF51) UEP5; +volatile __UEP5bits_t __at (0xF51) UEP5bits; + +__sfr __at (0xF52) UEP6; +volatile __UEP6bits_t __at (0xF52) UEP6bits; + +__sfr __at (0xF53) UEP7; +volatile __UEP7bits_t __at (0xF53) UEP7bits; + +__sfr __at (0xF54) UEP8; +volatile __UEP8bits_t __at (0xF54) UEP8bits; + +__sfr __at (0xF55) UEP9; +volatile __UEP9bits_t __at (0xF55) UEP9bits; + +__sfr __at (0xF56) UEP10; +volatile __UEP10bits_t __at (0xF56) UEP10bits; + +__sfr __at (0xF57) UEP11; +volatile __UEP11bits_t __at (0xF57) UEP11bits; + +__sfr __at (0xF58) UEP12; +volatile __UEP12bits_t __at (0xF58) UEP12bits; + +__sfr __at (0xF59) UEP13; +volatile __UEP13bits_t __at (0xF59) UEP13bits; + +__sfr __at (0xF5A) UEP14; +volatile __UEP14bits_t __at (0xF5A) UEP14bits; + +__sfr __at (0xF5B) UEP15; +volatile __UEP15bits_t __at (0xF5B) UEP15bits; + +__sfr __at (0xF5C) UIE; +volatile __UIEbits_t __at (0xF5C) UIEbits; + +__sfr __at (0xF5D) UEIE; +volatile __UEIEbits_t __at (0xF5D) UEIEbits; + +__sfr __at (0xF5E) UADDR; +volatile __UADDRbits_t __at (0xF5E) UADDRbits; + +__sfr __at (0xF5F) UCFG; +volatile __UCFGbits_t __at (0xF5F) UCFGbits; + +__sfr __at (0xF60) UFRM; + +__sfr __at (0xF60) UFRML; +volatile __UFRMLbits_t __at (0xF60) UFRMLbits; + +__sfr __at (0xF61) UFRMH; +volatile __UFRMHbits_t __at (0xF61) UFRMHbits; + +__sfr __at (0xF62) UIR; +volatile __UIRbits_t __at (0xF62) UIRbits; + +__sfr __at (0xF63) UEIR; +volatile __UEIRbits_t __at (0xF63) UEIRbits; + +__sfr __at (0xF64) USTAT; +volatile __USTATbits_t __at (0xF64) USTATbits; + +__sfr __at (0xF65) UCON; +volatile __UCONbits_t __at (0xF65) UCONbits; + +__sfr __at (0xF66) PMDIN1; + +__sfr __at (0xF66) PMDIN1L; + +__sfr __at (0xF67) PMDIN1H; + +__sfr __at (0xF68) PMADDR; + +__sfr __at (0xF68) PMADDRL; + +__sfr __at (0xF68) PMDOUT1; + +__sfr __at (0xF68) PMDOUT1L; + +__sfr __at (0xF69) PMADDRH; +volatile __PMADDRHbits_t __at (0xF69) PMADDRHbits; + +__sfr __at (0xF69) PMDOUT1H; + +__sfr __at (0xF6A) CMSTAT; +volatile __CMSTATbits_t __at (0xF6A) CMSTATbits; + +__sfr __at (0xF6A) CMSTATUS; +volatile __CMSTATUSbits_t __at (0xF6A) CMSTATUSbits; + +__sfr __at (0xF6B) SSP2CON2; +volatile __SSP2CON2bits_t __at (0xF6B) SSP2CON2bits; + +__sfr __at (0xF6C) SSP2CON1; +volatile __SSP2CON1bits_t __at (0xF6C) SSP2CON1bits; + +__sfr __at (0xF6D) SSP2STAT; +volatile __SSP2STATbits_t __at (0xF6D) SSP2STATbits; + +__sfr __at (0xF6E) SSP2ADD; + +__sfr __at (0xF6E) SSP2MSK; +volatile __SSP2MSKbits_t __at (0xF6E) SSP2MSKbits; + +__sfr __at (0xF6F) SSP2BUF; + +__sfr __at (0xF70) CCP5CON; +volatile __CCP5CONbits_t __at (0xF70) CCP5CONbits; + +__sfr __at (0xF71) CCPR5; + +__sfr __at (0xF71) CCPR5L; + +__sfr __at (0xF72) CCPR5H; + +__sfr __at (0xF73) CCP4CON; +volatile __CCP4CONbits_t __at (0xF73) CCP4CONbits; + +__sfr __at (0xF74) CCPR4; + +__sfr __at (0xF74) CCPR4L; + +__sfr __at (0xF75) CCPR4H; + +__sfr __at (0xF76) T4CON; +volatile __T4CONbits_t __at (0xF76) T4CONbits; + +__sfr __at (0xF77) CVRCON; +volatile __CVRCONbits_t __at (0xF77) CVRCONbits; + +__sfr __at (0xF77) PR4; + +__sfr __at (0xF78) TMR4; + +__sfr __at (0xF79) T3CON; +volatile __T3CONbits_t __at (0xF79) T3CONbits; + +__sfr __at (0xF7A) TMR3L; + +__sfr __at (0xF7B) TMR3H; + +__sfr __at (0xF7C) BAUDCON2; +volatile __BAUDCON2bits_t __at (0xF7C) BAUDCON2bits; + +__sfr __at (0xF7D) SPBRGH2; + +__sfr __at (0xF7E) BAUDCON; +volatile __BAUDCONbits_t __at (0xF7E) BAUDCONbits; + +__sfr __at (0xF7E) BAUDCON1; +volatile __BAUDCON1bits_t __at (0xF7E) BAUDCON1bits; + +__sfr __at (0xF7F) SPBRGH; + +__sfr __at (0xF7F) SPBRGH1; + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF85) PORTF; +volatile __PORTFbits_t __at (0xF85) PORTFbits; + +__sfr __at (0xF86) PORTG; +volatile __PORTGbits_t __at (0xF86) PORTGbits; + +__sfr __at (0xF87) PORTH; +volatile __PORTHbits_t __at (0xF87) PORTHbits; + +__sfr __at (0xF88) PORTJ; +volatile __PORTJbits_t __at (0xF88) PORTJbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF8E) LATF; +volatile __LATFbits_t __at (0xF8E) LATFbits; + +__sfr __at (0xF8F) LATG; +volatile __LATGbits_t __at (0xF8F) LATGbits; + +__sfr __at (0xF90) LATH; +volatile __LATHbits_t __at (0xF90) LATHbits; + +__sfr __at (0xF91) LATJ; +volatile __LATJbits_t __at (0xF91) LATJbits; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) DDRD; +volatile __DDRDbits_t __at (0xF95) DDRDbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) DDRE; +volatile __DDREbits_t __at (0xF96) DDREbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF97) DDRF; +volatile __DDRFbits_t __at (0xF97) DDRFbits; + +__sfr __at (0xF97) TRISF; +volatile __TRISFbits_t __at (0xF97) TRISFbits; + +__sfr __at (0xF98) DDRG; +volatile __DDRGbits_t __at (0xF98) DDRGbits; + +__sfr __at (0xF98) TRISG; +volatile __TRISGbits_t __at (0xF98) TRISGbits; + +__sfr __at (0xF99) DDRH; +volatile __DDRHbits_t __at (0xF99) DDRHbits; + +__sfr __at (0xF99) TRISH; +volatile __TRISHbits_t __at (0xF99) TRISHbits; + +__sfr __at (0xF9A) DDRJ; +volatile __DDRJbits_t __at (0xF9A) DDRJbits; + +__sfr __at (0xF9A) TRISJ; +volatile __TRISJbits_t __at (0xF9A) TRISJbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9C) RCSTA2; +volatile __RCSTA2bits_t __at (0xF9C) RCSTA2bits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA3) PIE3; +volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +__sfr __at (0xFA4) PIR3; +volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +__sfr __at (0xFA5) IPR3; +volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFA8) TXSTA2; +volatile __TXSTA2bits_t __at (0xFA8) TXSTA2bits; + +__sfr __at (0xFA9) TXREG2; + +__sfr __at (0xFAA) RCREG2; + +__sfr __at (0xFAB) SPBRG2; + +__sfr __at (0xFAC) RCSTA; +volatile __RCSTAbits_t __at (0xFAC) RCSTAbits; + +__sfr __at (0xFAC) RCSTA1; +volatile __RCSTA1bits_t __at (0xFAC) RCSTA1bits; + +__sfr __at (0xFAD) TXSTA; +volatile __TXSTAbits_t __at (0xFAD) TXSTAbits; + +__sfr __at (0xFAD) TXSTA1; +volatile __TXSTA1bits_t __at (0xFAD) TXSTA1bits; + +__sfr __at (0xFAE) TXREG; + +__sfr __at (0xFAE) TXREG1; + +__sfr __at (0xFAF) RCREG; + +__sfr __at (0xFAF) RCREG1; + +__sfr __at (0xFB0) SPBRG; + +__sfr __at (0xFB0) SPBRG1; + +__sfr __at (0xFB1) CCP3CON; +volatile __CCP3CONbits_t __at (0xFB1) CCP3CONbits; + +__sfr __at (0xFB1) ECCP3CON; +volatile __ECCP3CONbits_t __at (0xFB1) ECCP3CONbits; + +__sfr __at (0xFB2) CCPR3; + +__sfr __at (0xFB2) CCPR3L; + +__sfr __at (0xFB3) CCPR3H; + +__sfr __at (0xFB4) ECCP3DEL; +volatile __ECCP3DELbits_t __at (0xFB4) ECCP3DELbits; + +__sfr __at (0xFB5) ECCP3AS; +volatile __ECCP3ASbits_t __at (0xFB5) ECCP3ASbits; + +__sfr __at (0xFB6) CCP2CON; +volatile __CCP2CONbits_t __at (0xFB6) CCP2CONbits; + +__sfr __at (0xFB6) ECCP2CON; +volatile __ECCP2CONbits_t __at (0xFB6) ECCP2CONbits; + +__sfr __at (0xFB7) CCPR2; + +__sfr __at (0xFB7) CCPR2L; + +__sfr __at (0xFB8) CCPR2H; + +__sfr __at (0xFB9) ECCP2DEL; +volatile __ECCP2DELbits_t __at (0xFB9) ECCP2DELbits; + +__sfr __at (0xFBA) ECCP2AS; +volatile __ECCP2ASbits_t __at (0xFBA) ECCP2ASbits; + +__sfr __at (0xFBB) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBB) CCP1CONbits; + +__sfr __at (0xFBB) ECCP1CON; +volatile __ECCP1CONbits_t __at (0xFBB) ECCP1CONbits; + +__sfr __at (0xFBC) CCPR1; + +__sfr __at (0xFBC) CCPR1L; + +__sfr __at (0xFBD) CCPR1H; + +__sfr __at (0xFBE) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xFBE) ECCP1DELbits; + +__sfr __at (0xFBF) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFBF) ECCP1ASbits; + +__sfr __at (0xFC0) WDTCON; +volatile __WDTCONbits_t __at (0xFC0) WDTCONbits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC1) ANCON0; +volatile __ANCON0bits_t __at (0xFC1) ANCON0bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC2) ANCON1; +volatile __ANCON1bits_t __at (0xFC2) ANCON1bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSP1CON2; +volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSP1CON1; +volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSP1STAT; +volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSP1ADD; + +__sfr __at (0xFC8) SSP1MSK; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSP1BUF; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) MEMCON; +volatile __MEMCONbits_t __at (0xFCB) MEMCONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) PADCFG1; +volatile __PADCFG1bits_t __at (0xFCC) PADCFG1bits; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) ODCON3; +volatile __ODCON3bits_t __at (0xFCD) ODCON3bits; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) ODCON2; +volatile __ODCON2bits_t __at (0xFCE) ODCON2bits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) ODCON1; +volatile __ODCON1bits_t __at (0xFCF) ODCON1bits; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) CM2CON; +volatile __CM2CONbits_t __at (0xFD1) CM2CONbits; + +__sfr __at (0xFD1) CM2CON1; +volatile __CM2CON1bits_t __at (0xFD1) CM2CON1bits; + +__sfr __at (0xFD2) CM1CON; +volatile __CM1CONbits_t __at (0xFD2) CM1CONbits; + +__sfr __at (0xFD2) CM1CON1; +volatile __CM1CON1bits_t __at (0xFD2) CM1CON1bits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD3) REFOCON; +volatile __REFOCONbits_t __at (0xFD3) REFOCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f87j60.c b/device/lib/pic16/libdev/pic18f87j60.c new file mode 100644 index 0000000..966e4c0 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f87j60.c @@ -0,0 +1,6 @@ +/* + * pic18f87j60.c - device specific definitions + */ + +#include "pic18f86j60.c" + diff --git a/device/lib/pic16/libdev/pic18f96j60.c b/device/lib/pic16/libdev/pic18f96j60.c new file mode 100644 index 0000000..685a2a6 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f96j60.c @@ -0,0 +1,724 @@ +/* + * pic18f96j60.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xE80) MAADR5; + +__sfr __at (0xE81) MAADR6; + +__sfr __at (0xE82) MAADR3; + +__sfr __at (0xE83) MAADR4; + +__sfr __at (0xE84) MAADR1; + +__sfr __at (0xE85) MAADR2; + +__sfr __at (0xE86) EBSTSD; + +__sfr __at (0xE87) EBSTCON; +volatile __EBSTCONbits_t __at (0xE87) EBSTCONbits; + +__sfr __at (0xE88) EBSTCS; + +__sfr __at (0xE88) EBSTCSL; + +__sfr __at (0xE89) EBSTCSH; + +__sfr __at (0xE8A) MISTAT; +volatile __MISTATbits_t __at (0xE8A) MISTATbits; + +__sfr __at (0xE97) EFLOCON; +volatile __EFLOCONbits_t __at (0xE97) EFLOCONbits; + +__sfr __at (0xE98) EPAUS; + +__sfr __at (0xE98) EPAUSL; + +__sfr __at (0xE99) EPAUSH; + +__sfr __at (0xEA0) MACON1; +volatile __MACON1bits_t __at (0xEA0) MACON1bits; + +__sfr __at (0xEA1) MACON2; +volatile __MACON2bits_t __at (0xEA1) MACON2bits; + +__sfr __at (0xEA2) MACON3; +volatile __MACON3bits_t __at (0xEA2) MACON3bits; + +__sfr __at (0xEA3) MACON4; +volatile __MACON4bits_t __at (0xEA3) MACON4bits; + +__sfr __at (0xEA4) MABBIPG; + +__sfr __at (0xEA6) MAIPG; + +__sfr __at (0xEA6) MAIPGL; + +__sfr __at (0xEA7) MAIPGH; + +__sfr __at (0xEA8) MACLCON1; +volatile __MACLCON1bits_t __at (0xEA8) MACLCON1bits; + +__sfr __at (0xEA9) MACLCON2; +volatile __MACLCON2bits_t __at (0xEA9) MACLCON2bits; + +__sfr __at (0xEAA) MAMXFL; + +__sfr __at (0xEAA) MAMXFLL; + +__sfr __at (0xEAB) MAMXFLH; + +__sfr __at (0xEB1) MICON; +volatile __MICONbits_t __at (0xEB1) MICONbits; + +__sfr __at (0xEB2) MICMD; +volatile __MICMDbits_t __at (0xEB2) MICMDbits; + +__sfr __at (0xEB4) MIREGADR; + +__sfr __at (0xEB6) MIWR; + +__sfr __at (0xEB6) MIWRL; + +__sfr __at (0xEB7) MIWRH; + +__sfr __at (0xEB8) MIRD; + +__sfr __at (0xEB8) MIRDL; + +__sfr __at (0xEB9) MIRDH; + +__sfr __at (0xEC0) EHT0; + +__sfr __at (0xEC1) EHT1; + +__sfr __at (0xEC2) EHT2; + +__sfr __at (0xEC3) EHT3; + +__sfr __at (0xEC4) EHT4; + +__sfr __at (0xEC5) EHT5; + +__sfr __at (0xEC6) EHT6; + +__sfr __at (0xEC7) EHT7; + +__sfr __at (0xEC8) EPMM0; + +__sfr __at (0xEC9) EPMM1; + +__sfr __at (0xECA) EPMM2; + +__sfr __at (0xECB) EPMM3; + +__sfr __at (0xECC) EPMM4; + +__sfr __at (0xECD) EPMM5; + +__sfr __at (0xECE) EPMM6; + +__sfr __at (0xECF) EPMM7; + +__sfr __at (0xED0) EPMCS; + +__sfr __at (0xED0) EPMCSL; + +__sfr __at (0xED1) EPMCSH; + +__sfr __at (0xED4) EPMO; + +__sfr __at (0xED4) EPMOL; + +__sfr __at (0xED5) EPMOH; + +__sfr __at (0xED6) EWOLIE; +volatile __EWOLIEbits_t __at (0xED6) EWOLIEbits; + +__sfr __at (0xED7) EWOLIR; +volatile __EWOLIRbits_t __at (0xED7) EWOLIRbits; + +__sfr __at (0xED8) ERXFCON; +volatile __ERXFCONbits_t __at (0xED8) ERXFCONbits; + +__sfr __at (0xED9) EPKTCNT; + +__sfr __at (0xEE2) EWRPT; + +__sfr __at (0xEE2) EWRPTL; + +__sfr __at (0xEE3) EWRPTH; + +__sfr __at (0xEE4) ETXST; + +__sfr __at (0xEE4) ETXSTL; + +__sfr __at (0xEE5) ETXSTH; + +__sfr __at (0xEE6) ETXND; + +__sfr __at (0xEE6) ETXNDL; + +__sfr __at (0xEE7) ETXNDH; + +__sfr __at (0xEE8) ERXST; + +__sfr __at (0xEE8) ERXSTL; + +__sfr __at (0xEE9) ERXSTH; + +__sfr __at (0xEEA) ERXND; + +__sfr __at (0xEEA) ERXNDL; + +__sfr __at (0xEEB) ERXNDH; + +__sfr __at (0xEEC) ERXRDPT; + +__sfr __at (0xEEC) ERXRDPTL; + +__sfr __at (0xEED) ERXRDPTH; + +__sfr __at (0xEEE) ERXWRPT; + +__sfr __at (0xEEE) ERXWRPTL; + +__sfr __at (0xEEF) ERXWRPTH; + +__sfr __at (0xEF0) EDMAST; + +__sfr __at (0xEF0) EDMASTL; + +__sfr __at (0xEF1) EDMASTH; + +__sfr __at (0xEF2) EDMAND; + +__sfr __at (0xEF2) EDMANDL; + +__sfr __at (0xEF3) EDMANDH; + +__sfr __at (0xEF4) EDMADST; + +__sfr __at (0xEF4) EDMADSTL; + +__sfr __at (0xEF5) EDMADSTH; + +__sfr __at (0xEF6) EDMACS; + +__sfr __at (0xEF6) EDMACSL; + +__sfr __at (0xEF7) EDMACSH; + +__sfr __at (0xEFB) EIE; +volatile __EIEbits_t __at (0xEFB) EIEbits; + +__sfr __at (0xEFD) ESTAT; +volatile __ESTATbits_t __at (0xEFD) ESTATbits; + +__sfr __at (0xEFE) ECON2; +volatile __ECON2bits_t __at (0xEFE) ECON2bits; + +__sfr __at (0xF60) EIR; +volatile __EIRbits_t __at (0xF60) EIRbits; + +__sfr __at (0xF61) EDATA; +volatile __EDATAbits_t __at (0xF61) EDATAbits; + +__sfr __at (0xF62) SSP2CON2; +volatile __SSP2CON2bits_t __at (0xF62) SSP2CON2bits; + +__sfr __at (0xF63) SSP2CON1; +volatile __SSP2CON1bits_t __at (0xF63) SSP2CON1bits; + +__sfr __at (0xF64) SSP2STAT; +volatile __SSP2STATbits_t __at (0xF64) SSP2STATbits; + +__sfr __at (0xF65) SSP2ADD; + +__sfr __at (0xF66) SSP2BUF; + +__sfr __at (0xF67) ECCP2DEL; +volatile __ECCP2DELbits_t __at (0xF67) ECCP2DELbits; + +__sfr __at (0xF68) ECCP2AS; +volatile __ECCP2ASbits_t __at (0xF68) ECCP2ASbits; + +__sfr __at (0xF69) ECCP3DEL; +volatile __ECCP3DELbits_t __at (0xF69) ECCP3DELbits; + +__sfr __at (0xF6A) ECCP3AS; +volatile __ECCP3ASbits_t __at (0xF6A) ECCP3ASbits; + +__sfr __at (0xF6B) RCSTA2; +volatile __RCSTA2bits_t __at (0xF6B) RCSTA2bits; + +__sfr __at (0xF6C) TXSTA2; +volatile __TXSTA2bits_t __at (0xF6C) TXSTA2bits; + +__sfr __at (0xF6D) TXREG2; + +__sfr __at (0xF6E) RCREG2; + +__sfr __at (0xF6F) SPBRG2; + +__sfr __at (0xF70) CCP5CON; +volatile __CCP5CONbits_t __at (0xF70) CCP5CONbits; + +__sfr __at (0xF71) CCPR5; + +__sfr __at (0xF71) CCPR5L; + +__sfr __at (0xF72) CCPR5H; + +__sfr __at (0xF73) CCP4CON; +volatile __CCP4CONbits_t __at (0xF73) CCP4CONbits; + +__sfr __at (0xF74) CCPR4; + +__sfr __at (0xF74) CCPR4L; + +__sfr __at (0xF75) CCPR4H; + +__sfr __at (0xF76) T4CON; +volatile __T4CONbits_t __at (0xF76) T4CONbits; + +__sfr __at (0xF77) PR4; + +__sfr __at (0xF78) TMR4; + +__sfr __at (0xF79) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xF79) ECCP1DELbits; + +__sfr __at (0xF7A) ERDPT; + +__sfr __at (0xF7A) ERDPTL; + +__sfr __at (0xF7B) ERDPTH; + +__sfr __at (0xF7C) BAUDCON2; +volatile __BAUDCON2bits_t __at (0xF7C) BAUDCON2bits; + +__sfr __at (0xF7C) BAUDCTL2; +volatile __BAUDCTL2bits_t __at (0xF7C) BAUDCTL2bits; + +__sfr __at (0xF7D) SPBRGH2; + +__sfr __at (0xF7E) BAUDCON; +volatile __BAUDCONbits_t __at (0xF7E) BAUDCONbits; + +__sfr __at (0xF7E) BAUDCON1; +volatile __BAUDCON1bits_t __at (0xF7E) BAUDCON1bits; + +__sfr __at (0xF7E) BAUDCTL; +volatile __BAUDCTLbits_t __at (0xF7E) BAUDCTLbits; + +__sfr __at (0xF7E) BAUDCTL1; +volatile __BAUDCTL1bits_t __at (0xF7E) BAUDCTL1bits; + +__sfr __at (0xF7F) SPBRGH; + +__sfr __at (0xF7F) SPBRGH1; + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF85) PORTF; +volatile __PORTFbits_t __at (0xF85) PORTFbits; + +__sfr __at (0xF86) PORTG; +volatile __PORTGbits_t __at (0xF86) PORTGbits; + +__sfr __at (0xF87) PORTH; +volatile __PORTHbits_t __at (0xF87) PORTHbits; + +__sfr __at (0xF88) PORTJ; +volatile __PORTJbits_t __at (0xF88) PORTJbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF8E) LATF; +volatile __LATFbits_t __at (0xF8E) LATFbits; + +__sfr __at (0xF8F) LATG; +volatile __LATGbits_t __at (0xF8F) LATGbits; + +__sfr __at (0xF90) LATH; +volatile __LATHbits_t __at (0xF90) LATHbits; + +__sfr __at (0xF91) LATJ; +volatile __LATJbits_t __at (0xF91) LATJbits; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) DDRD; +volatile __DDRDbits_t __at (0xF95) DDRDbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) DDRE; +volatile __DDREbits_t __at (0xF96) DDREbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF97) DDRF; +volatile __DDRFbits_t __at (0xF97) DDRFbits; + +__sfr __at (0xF97) TRISF; +volatile __TRISFbits_t __at (0xF97) TRISFbits; + +__sfr __at (0xF98) DDRG; +volatile __DDRGbits_t __at (0xF98) DDRGbits; + +__sfr __at (0xF98) TRISG; +volatile __TRISGbits_t __at (0xF98) TRISGbits; + +__sfr __at (0xF99) DDRH; +volatile __DDRHbits_t __at (0xF99) DDRHbits; + +__sfr __at (0xF99) TRISH; +volatile __TRISHbits_t __at (0xF99) TRISHbits; + +__sfr __at (0xF9A) DDRJ; +volatile __DDRJbits_t __at (0xF9A) DDRJbits; + +__sfr __at (0xF9A) TRISJ; +volatile __TRISJbits_t __at (0xF9A) TRISJbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9C) MEMCON; +volatile __MEMCONbits_t __at (0xF9C) MEMCONbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA3) PIE3; +volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +__sfr __at (0xFA4) PIR3; +volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +__sfr __at (0xFA5) IPR3; +volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAB) RCSTA1; +volatile __RCSTA1bits_t __at (0xFAB) RCSTA1bits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAC) TXSTA1; +volatile __TXSTA1bits_t __at (0xFAC) TXSTA1bits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAD) TXREG1; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAE) RCREG1; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFAF) SPBRG1; + +__sfr __at (0xFB0) PSPCON; +volatile __PSPCONbits_t __at (0xFB0) PSPCONbits; + +__sfr __at (0xFB1) T3CON; +volatile __T3CONbits_t __at (0xFB1) T3CONbits; + +__sfr __at (0xFB2) TMR3L; + +__sfr __at (0xFB3) TMR3H; + +__sfr __at (0xFB4) CMCON; +volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) CCP3CON; +volatile __CCP3CONbits_t __at (0xFB7) CCP3CONbits; + +__sfr __at (0xFB7) ECCP3CON; +volatile __ECCP3CONbits_t __at (0xFB7) ECCP3CONbits; + +__sfr __at (0xFB8) CCPR3; + +__sfr __at (0xFB8) CCPR3L; + +__sfr __at (0xFB9) CCPR3H; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBA) ECCP2CON; +volatile __ECCP2CONbits_t __at (0xFBA) ECCP2CONbits; + +__sfr __at (0xFBB) CCPR2; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBD) ECCP1CON; +volatile __ECCP1CONbits_t __at (0xFBD) ECCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSP1CON2; +volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSP1CON1; +volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSP1STAT; +volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSP1ADD; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSP1BUF; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD2) ECON1; +volatile __ECON1bits_t __at (0xFD2) ECON1bits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f96j65.c b/device/lib/pic16/libdev/pic18f96j65.c new file mode 100644 index 0000000..fa1bba1 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f96j65.c @@ -0,0 +1,6 @@ +/* + * pic18f96j65.c - device specific definitions + */ + +#include "pic18f96j60.c" + diff --git a/device/lib/pic16/libdev/pic18f97j60.c b/device/lib/pic16/libdev/pic18f97j60.c new file mode 100644 index 0000000..af7e578 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f97j60.c @@ -0,0 +1,6 @@ +/* + * pic18f97j60.c - device specific definitions + */ + +#include "pic18f96j60.c" + diff --git a/device/lib/pic16/libio/Makefile.am b/device/lib/pic16/libio/Makefile.am new file mode 100644 index 0000000..fd274e0 --- /dev/null +++ b/device/lib/pic16/libio/Makefile.am @@ -0,0 +1,1444 @@ +## Makefile.am -- Process this file with automake to produce Makefile.in +## This file was automatically generated using ./mkmk.sh. + +lib_LIBRARIES = + +lib_LIBRARIES += libio18f1220.a +libio18f1220_a_SOURCES = dummy.c +libio18f1220_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f1220_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f1220_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f1220_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f1220_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f1220_a_SOURCES += usart/usartd.c +libio18f1220_a_CFLAGS = -p18f1220 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f1320.a +libio18f1320_a_SOURCES = dummy.c +libio18f1320_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f1320_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f1320_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f1320_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f1320_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f1320_a_SOURCES += usart/usartd.c +libio18f1320_a_CFLAGS = -p18f1320 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2220.a +libio18f2220_a_SOURCES = dummy.c +libio18f2220_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2220_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2220_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2220_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2220_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2220_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2220_a_SOURCES += i2c/i2cwrites.c +libio18f2220_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2220_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2220_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2220_a_SOURCES += usart/usartd.c +libio18f2220_a_CFLAGS = -p18f2220 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2221.a +libio18f2221_a_SOURCES = dummy.c +libio18f2221_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2221_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2221_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2221_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2221_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2221_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2221_a_SOURCES += i2c/i2cwrites.c +libio18f2221_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2221_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2221_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2221_a_SOURCES += usart/usartd.c +libio18f2221_a_CFLAGS = -p18f2221 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2320.a +libio18f2320_a_SOURCES = dummy.c +libio18f2320_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2320_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2320_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2320_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2320_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2320_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2320_a_SOURCES += i2c/i2cwrites.c +libio18f2320_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2320_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2320_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2320_a_SOURCES += usart/usartd.c +libio18f2320_a_CFLAGS = -p18f2320 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2321.a +libio18f2321_a_SOURCES = dummy.c +libio18f2321_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2321_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2321_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2321_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2321_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2321_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2321_a_SOURCES += i2c/i2cwrites.c +libio18f2321_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2321_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2321_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2321_a_SOURCES += usart/usartd.c +libio18f2321_a_CFLAGS = -p18f2321 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2331.a +libio18f2331_a_SOURCES = dummy.c +libio18f2331_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2331_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2331_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2331_a_SOURCES += usart/usartd.c +libio18f2331_a_CFLAGS = -p18f2331 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f23k20.a +libio18f23k20_a_SOURCES = dummy.c +libio18f23k20_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f23k20_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f23k20_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f23k20_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f23k20_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f23k20_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f23k20_a_SOURCES += i2c/i2cwrites.c +libio18f23k20_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f23k20_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f23k20_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f23k20_a_SOURCES += usart/usartd.c +libio18f23k20_a_CFLAGS = -p18f23k20 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2410.a +libio18f2410_a_SOURCES = dummy.c +libio18f2410_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2410_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2410_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2410_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2410_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2410_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2410_a_SOURCES += i2c/i2cwrites.c +libio18f2410_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2410_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2410_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2410_a_SOURCES += usart/usartd.c +libio18f2410_a_CFLAGS = -p18f2410 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f242.a +libio18f242_a_SOURCES = dummy.c +libio18f242_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f242_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f242_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f242_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f242_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f242_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f242_a_SOURCES += i2c/i2cwrites.c +libio18f242_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f242_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f242_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f242_a_SOURCES += usart/usartd.c +libio18f242_a_CFLAGS = -p18f242 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2420.a +libio18f2420_a_SOURCES = dummy.c +libio18f2420_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2420_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2420_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2420_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2420_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2420_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2420_a_SOURCES += i2c/i2cwrites.c +libio18f2420_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2420_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2420_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2420_a_SOURCES += usart/usartd.c +libio18f2420_a_CFLAGS = -p18f2420 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2423.a +libio18f2423_a_SOURCES = dummy.c +libio18f2423_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2423_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2423_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2423_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2423_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2423_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2423_a_SOURCES += i2c/i2cwrites.c +libio18f2423_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2423_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2423_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2423_a_SOURCES += usart/usartd.c +libio18f2423_a_CFLAGS = -p18f2423 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2431.a +libio18f2431_a_SOURCES = dummy.c +libio18f2431_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2431_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2431_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2431_a_SOURCES += usart/usartd.c +libio18f2431_a_CFLAGS = -p18f2431 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2450.a +libio18f2450_a_SOURCES = dummy.c +libio18f2450_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2450_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2450_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2450_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2450_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2450_a_SOURCES += usart/usartd.c +libio18f2450_a_CFLAGS = -p18f2450 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2455.a +libio18f2455_a_SOURCES = dummy.c +libio18f2455_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2455_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2455_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2455_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2455_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2455_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2455_a_SOURCES += i2c/i2cwrites.c +libio18f2455_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2455_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2455_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2455_a_SOURCES += usart/usartd.c +libio18f2455_a_CFLAGS = -p18f2455 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f248.a +libio18f248_a_SOURCES = dummy.c +libio18f248_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f248_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f248_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f248_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f248_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f248_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f248_a_SOURCES += i2c/i2cwrites.c +libio18f248_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f248_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f248_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f248_a_SOURCES += usart/usartd.c +libio18f248_a_CFLAGS = -p18f248 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2480.a +libio18f2480_a_SOURCES = dummy.c +libio18f2480_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2480_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2480_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2480_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2480_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2480_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2480_a_SOURCES += i2c/i2cwrites.c +libio18f2480_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2480_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2480_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2480_a_SOURCES += usart/usartd.c +libio18f2480_a_CFLAGS = -p18f2480 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f24j10.a +libio18f24j10_a_SOURCES = dummy.c +libio18f24j10_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f24j10_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f24j10_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f24j10_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f24j10_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f24j10_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f24j10_a_SOURCES += i2c/i2cwrites.c +libio18f24j10_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f24j10_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f24j10_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f24j10_a_SOURCES += usart/usartd.c +libio18f24j10_a_CFLAGS = -p18f24j10 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f24k20.a +libio18f24k20_a_SOURCES = dummy.c +libio18f24k20_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f24k20_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f24k20_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f24k20_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f24k20_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f24k20_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f24k20_a_SOURCES += i2c/i2cwrites.c +libio18f24k20_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f24k20_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f24k20_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f24k20_a_SOURCES += usart/usartd.c +libio18f24k20_a_CFLAGS = -p18f24k20 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2510.a +libio18f2510_a_SOURCES = dummy.c +libio18f2510_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2510_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2510_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2510_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2510_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2510_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2510_a_SOURCES += i2c/i2cwrites.c +libio18f2510_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2510_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2510_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2510_a_SOURCES += usart/usartd.c +libio18f2510_a_CFLAGS = -p18f2510 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2515.a +libio18f2515_a_SOURCES = dummy.c +libio18f2515_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2515_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2515_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2515_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2515_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2515_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2515_a_SOURCES += i2c/i2cwrites.c +libio18f2515_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2515_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2515_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2515_a_SOURCES += usart/usartd.c +libio18f2515_a_CFLAGS = -p18f2515 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f252.a +libio18f252_a_SOURCES = dummy.c +libio18f252_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f252_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f252_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f252_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f252_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f252_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f252_a_SOURCES += i2c/i2cwrites.c +libio18f252_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f252_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f252_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f252_a_SOURCES += usart/usartd.c +libio18f252_a_CFLAGS = -p18f252 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2520.a +libio18f2520_a_SOURCES = dummy.c +libio18f2520_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2520_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2520_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2520_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2520_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2520_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2520_a_SOURCES += i2c/i2cwrites.c +libio18f2520_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2520_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2520_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2520_a_SOURCES += usart/usartd.c +libio18f2520_a_CFLAGS = -p18f2520 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2523.a +libio18f2523_a_SOURCES = dummy.c +libio18f2523_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2523_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2523_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2523_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2523_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2523_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2523_a_SOURCES += i2c/i2cwrites.c +libio18f2523_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2523_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2523_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2523_a_SOURCES += usart/usartd.c +libio18f2523_a_CFLAGS = -p18f2523 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2525.a +libio18f2525_a_SOURCES = dummy.c +libio18f2525_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2525_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2525_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2525_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2525_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2525_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2525_a_SOURCES += i2c/i2cwrites.c +libio18f2525_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2525_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2525_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2525_a_SOURCES += usart/usartd.c +libio18f2525_a_CFLAGS = -p18f2525 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2550.a +libio18f2550_a_SOURCES = dummy.c +libio18f2550_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2550_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2550_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2550_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2550_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2550_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2550_a_SOURCES += i2c/i2cwrites.c +libio18f2550_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2550_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2550_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2550_a_SOURCES += usart/usartd.c +libio18f2550_a_CFLAGS = -p18f2550 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f258.a +libio18f258_a_SOURCES = dummy.c +libio18f258_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f258_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f258_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f258_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f258_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f258_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f258_a_SOURCES += i2c/i2cwrites.c +libio18f258_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f258_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f258_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f258_a_SOURCES += usart/usartd.c +libio18f258_a_CFLAGS = -p18f258 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2580.a +libio18f2580_a_SOURCES = dummy.c +libio18f2580_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2580_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2580_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2580_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2580_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2580_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2580_a_SOURCES += i2c/i2cwrites.c +libio18f2580_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2580_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2580_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2580_a_SOURCES += usart/usartd.c +libio18f2580_a_CFLAGS = -p18f2580 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2585.a +libio18f2585_a_SOURCES = dummy.c +libio18f2585_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2585_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2585_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2585_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2585_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2585_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2585_a_SOURCES += i2c/i2cwrites.c +libio18f2585_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2585_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2585_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2585_a_SOURCES += usart/usartd.c +libio18f2585_a_CFLAGS = -p18f2585 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f25j10.a +libio18f25j10_a_SOURCES = dummy.c +libio18f25j10_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f25j10_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f25j10_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f25j10_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f25j10_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f25j10_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f25j10_a_SOURCES += i2c/i2cwrites.c +libio18f25j10_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f25j10_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f25j10_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f25j10_a_SOURCES += usart/usartd.c +libio18f25j10_a_CFLAGS = -p18f25j10 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f25k20.a +libio18f25k20_a_SOURCES = dummy.c +libio18f25k20_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f25k20_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f25k20_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f25k20_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f25k20_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f25k20_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f25k20_a_SOURCES += i2c/i2cwrites.c +libio18f25k20_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f25k20_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f25k20_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f25k20_a_SOURCES += usart/usartd.c +libio18f25k20_a_CFLAGS = -p18f25k20 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2610.a +libio18f2610_a_SOURCES = dummy.c +libio18f2610_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2610_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2610_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2610_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2610_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2610_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2610_a_SOURCES += i2c/i2cwrites.c +libio18f2610_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2610_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2610_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2610_a_SOURCES += usart/usartd.c +libio18f2610_a_CFLAGS = -p18f2610 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2620.a +libio18f2620_a_SOURCES = dummy.c +libio18f2620_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2620_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2620_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2620_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2620_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2620_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2620_a_SOURCES += i2c/i2cwrites.c +libio18f2620_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2620_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2620_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2620_a_SOURCES += usart/usartd.c +libio18f2620_a_CFLAGS = -p18f2620 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2680.a +libio18f2680_a_SOURCES = dummy.c +libio18f2680_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2680_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2680_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2680_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2680_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2680_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2680_a_SOURCES += i2c/i2cwrites.c +libio18f2680_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2680_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2680_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2680_a_SOURCES += usart/usartd.c +libio18f2680_a_CFLAGS = -p18f2680 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2682.a +libio18f2682_a_SOURCES = dummy.c +libio18f2682_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2682_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2682_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2682_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2682_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2682_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2682_a_SOURCES += i2c/i2cwrites.c +libio18f2682_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2682_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2682_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2682_a_SOURCES += usart/usartd.c +libio18f2682_a_CFLAGS = -p18f2682 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f2685.a +libio18f2685_a_SOURCES = dummy.c +libio18f2685_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f2685_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f2685_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f2685_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f2685_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f2685_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f2685_a_SOURCES += i2c/i2cwrites.c +libio18f2685_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f2685_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f2685_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f2685_a_SOURCES += usart/usartd.c +libio18f2685_a_CFLAGS = -p18f2685 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f26k20.a +libio18f26k20_a_SOURCES = dummy.c +libio18f26k20_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f26k20_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f26k20_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f26k20_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f26k20_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f26k20_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f26k20_a_SOURCES += i2c/i2cwrites.c +libio18f26k20_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f26k20_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f26k20_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f26k20_a_SOURCES += usart/usartd.c +libio18f26k20_a_CFLAGS = -p18f26k20 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4220.a +libio18f4220_a_SOURCES = dummy.c +libio18f4220_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4220_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4220_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4220_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4220_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4220_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4220_a_SOURCES += i2c/i2cwrites.c +libio18f4220_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4220_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4220_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4220_a_SOURCES += usart/usartd.c +libio18f4220_a_CFLAGS = -p18f4220 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4221.a +libio18f4221_a_SOURCES = dummy.c +libio18f4221_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4221_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4221_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4221_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4221_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4221_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4221_a_SOURCES += i2c/i2cwrites.c +libio18f4221_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4221_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4221_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4221_a_SOURCES += usart/usartd.c +libio18f4221_a_CFLAGS = -p18f4221 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4320.a +libio18f4320_a_SOURCES = dummy.c +libio18f4320_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4320_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4320_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4320_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4320_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4320_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4320_a_SOURCES += i2c/i2cwrites.c +libio18f4320_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4320_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4320_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4320_a_SOURCES += usart/usartd.c +libio18f4320_a_CFLAGS = -p18f4320 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4321.a +libio18f4321_a_SOURCES = dummy.c +libio18f4321_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4321_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4321_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4321_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4321_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4321_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4321_a_SOURCES += i2c/i2cwrites.c +libio18f4321_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4321_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4321_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4321_a_SOURCES += usart/usartd.c +libio18f4321_a_CFLAGS = -p18f4321 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4331.a +libio18f4331_a_SOURCES = dummy.c +libio18f4331_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4331_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4331_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4331_a_SOURCES += usart/usartd.c +libio18f4331_a_CFLAGS = -p18f4331 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f43k20.a +libio18f43k20_a_SOURCES = dummy.c +libio18f43k20_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f43k20_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f43k20_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f43k20_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f43k20_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f43k20_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f43k20_a_SOURCES += i2c/i2cwrites.c +libio18f43k20_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f43k20_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f43k20_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f43k20_a_SOURCES += usart/usartd.c +libio18f43k20_a_CFLAGS = -p18f43k20 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4410.a +libio18f4410_a_SOURCES = dummy.c +libio18f4410_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4410_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4410_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4410_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4410_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4410_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4410_a_SOURCES += i2c/i2cwrites.c +libio18f4410_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4410_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4410_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4410_a_SOURCES += usart/usartd.c +libio18f4410_a_CFLAGS = -p18f4410 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f442.a +libio18f442_a_SOURCES = dummy.c +libio18f442_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f442_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f442_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f442_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f442_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f442_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f442_a_SOURCES += i2c/i2cwrites.c +libio18f442_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f442_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f442_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f442_a_SOURCES += usart/usartd.c +libio18f442_a_CFLAGS = -p18f442 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4420.a +libio18f4420_a_SOURCES = dummy.c +libio18f4420_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4420_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4420_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4420_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4420_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4420_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4420_a_SOURCES += i2c/i2cwrites.c +libio18f4420_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4420_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4420_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4420_a_SOURCES += usart/usartd.c +libio18f4420_a_CFLAGS = -p18f4420 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4423.a +libio18f4423_a_SOURCES = dummy.c +libio18f4423_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4423_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4423_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4423_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4423_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4423_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4423_a_SOURCES += i2c/i2cwrites.c +libio18f4423_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4423_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4423_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4423_a_SOURCES += usart/usartd.c +libio18f4423_a_CFLAGS = -p18f4423 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4431.a +libio18f4431_a_SOURCES = dummy.c +libio18f4431_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4431_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4431_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4431_a_SOURCES += usart/usartd.c +libio18f4431_a_CFLAGS = -p18f4431 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4450.a +libio18f4450_a_SOURCES = dummy.c +libio18f4450_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4450_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4450_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4450_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4450_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4450_a_SOURCES += usart/usartd.c +libio18f4450_a_CFLAGS = -p18f4450 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4455.a +libio18f4455_a_SOURCES = dummy.c +libio18f4455_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4455_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4455_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4455_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4455_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4455_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4455_a_SOURCES += i2c/i2cwrites.c +libio18f4455_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4455_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4455_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4455_a_SOURCES += usart/usartd.c +libio18f4455_a_CFLAGS = -p18f4455 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f448.a +libio18f448_a_SOURCES = dummy.c +libio18f448_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f448_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f448_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f448_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f448_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f448_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f448_a_SOURCES += i2c/i2cwrites.c +libio18f448_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f448_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f448_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f448_a_SOURCES += usart/usartd.c +libio18f448_a_CFLAGS = -p18f448 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4480.a +libio18f4480_a_SOURCES = dummy.c +libio18f4480_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4480_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4480_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4480_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4480_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4480_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4480_a_SOURCES += i2c/i2cwrites.c +libio18f4480_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4480_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4480_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4480_a_SOURCES += usart/usartd.c +libio18f4480_a_CFLAGS = -p18f4480 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f44j10.a +libio18f44j10_a_SOURCES = dummy.c +libio18f44j10_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f44j10_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f44j10_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f44j10_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f44j10_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f44j10_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f44j10_a_SOURCES += i2c/i2cwrites.c +libio18f44j10_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f44j10_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f44j10_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f44j10_a_SOURCES += usart/usartd.c +libio18f44j10_a_CFLAGS = -p18f44j10 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f44k20.a +libio18f44k20_a_SOURCES = dummy.c +libio18f44k20_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f44k20_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f44k20_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f44k20_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f44k20_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f44k20_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f44k20_a_SOURCES += i2c/i2cwrites.c +libio18f44k20_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f44k20_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f44k20_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f44k20_a_SOURCES += usart/usartd.c +libio18f44k20_a_CFLAGS = -p18f44k20 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4510.a +libio18f4510_a_SOURCES = dummy.c +libio18f4510_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4510_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4510_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4510_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4510_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4510_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4510_a_SOURCES += i2c/i2cwrites.c +libio18f4510_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4510_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4510_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4510_a_SOURCES += usart/usartd.c +libio18f4510_a_CFLAGS = -p18f4510 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4515.a +libio18f4515_a_SOURCES = dummy.c +libio18f4515_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4515_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4515_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4515_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4515_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4515_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4515_a_SOURCES += i2c/i2cwrites.c +libio18f4515_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4515_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4515_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4515_a_SOURCES += usart/usartd.c +libio18f4515_a_CFLAGS = -p18f4515 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f452.a +libio18f452_a_SOURCES = dummy.c +libio18f452_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f452_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f452_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f452_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f452_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f452_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f452_a_SOURCES += i2c/i2cwrites.c +libio18f452_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f452_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f452_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f452_a_SOURCES += usart/usartd.c +libio18f452_a_CFLAGS = -p18f452 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4520.a +libio18f4520_a_SOURCES = dummy.c +libio18f4520_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4520_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4520_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4520_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4520_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4520_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4520_a_SOURCES += i2c/i2cwrites.c +libio18f4520_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4520_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4520_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4520_a_SOURCES += usart/usartd.c +libio18f4520_a_CFLAGS = -p18f4520 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4523.a +libio18f4523_a_SOURCES = dummy.c +libio18f4523_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4523_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4523_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4523_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4523_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4523_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4523_a_SOURCES += i2c/i2cwrites.c +libio18f4523_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4523_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4523_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4523_a_SOURCES += usart/usartd.c +libio18f4523_a_CFLAGS = -p18f4523 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4525.a +libio18f4525_a_SOURCES = dummy.c +libio18f4525_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4525_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4525_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4525_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4525_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4525_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4525_a_SOURCES += i2c/i2cwrites.c +libio18f4525_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4525_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4525_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4525_a_SOURCES += usart/usartd.c +libio18f4525_a_CFLAGS = -p18f4525 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4550.a +libio18f4550_a_SOURCES = dummy.c +libio18f4550_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4550_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4550_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4550_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4550_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4550_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4550_a_SOURCES += i2c/i2cwrites.c +libio18f4550_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4550_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4550_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4550_a_SOURCES += usart/usartd.c +libio18f4550_a_CFLAGS = -p18f4550 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f458.a +libio18f458_a_SOURCES = dummy.c +libio18f458_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f458_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f458_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f458_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f458_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f458_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f458_a_SOURCES += i2c/i2cwrites.c +libio18f458_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f458_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f458_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f458_a_SOURCES += usart/usartd.c +libio18f458_a_CFLAGS = -p18f458 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4580.a +libio18f4580_a_SOURCES = dummy.c +libio18f4580_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4580_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4580_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4580_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4580_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4580_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4580_a_SOURCES += i2c/i2cwrites.c +libio18f4580_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4580_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4580_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4580_a_SOURCES += usart/usartd.c +libio18f4580_a_CFLAGS = -p18f4580 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4585.a +libio18f4585_a_SOURCES = dummy.c +libio18f4585_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4585_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4585_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4585_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4585_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4585_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4585_a_SOURCES += i2c/i2cwrites.c +libio18f4585_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4585_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4585_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4585_a_SOURCES += usart/usartd.c +libio18f4585_a_CFLAGS = -p18f4585 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f45j10.a +libio18f45j10_a_SOURCES = dummy.c +libio18f45j10_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f45j10_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f45j10_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f45j10_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f45j10_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f45j10_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f45j10_a_SOURCES += i2c/i2cwrites.c +libio18f45j10_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f45j10_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f45j10_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f45j10_a_SOURCES += usart/usartd.c +libio18f45j10_a_CFLAGS = -p18f45j10 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f45k20.a +libio18f45k20_a_SOURCES = dummy.c +libio18f45k20_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f45k20_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f45k20_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f45k20_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f45k20_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f45k20_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f45k20_a_SOURCES += i2c/i2cwrites.c +libio18f45k20_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f45k20_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f45k20_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f45k20_a_SOURCES += usart/usartd.c +libio18f45k20_a_CFLAGS = -p18f45k20 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4610.a +libio18f4610_a_SOURCES = dummy.c +libio18f4610_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4610_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4610_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4610_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4610_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4610_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4610_a_SOURCES += i2c/i2cwrites.c +libio18f4610_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4610_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4610_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4610_a_SOURCES += usart/usartd.c +libio18f4610_a_CFLAGS = -p18f4610 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4620.a +libio18f4620_a_SOURCES = dummy.c +libio18f4620_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4620_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4620_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4620_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4620_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4620_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4620_a_SOURCES += i2c/i2cwrites.c +libio18f4620_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4620_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4620_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4620_a_SOURCES += usart/usartd.c +libio18f4620_a_CFLAGS = -p18f4620 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4680.a +libio18f4680_a_SOURCES = dummy.c +libio18f4680_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4680_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4680_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4680_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4680_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4680_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4680_a_SOURCES += i2c/i2cwrites.c +libio18f4680_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4680_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4680_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4680_a_SOURCES += usart/usartd.c +libio18f4680_a_CFLAGS = -p18f4680 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4682.a +libio18f4682_a_SOURCES = dummy.c +libio18f4682_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4682_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4682_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4682_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4682_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4682_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4682_a_SOURCES += i2c/i2cwrites.c +libio18f4682_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4682_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4682_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4682_a_SOURCES += usart/usartd.c +libio18f4682_a_CFLAGS = -p18f4682 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f4685.a +libio18f4685_a_SOURCES = dummy.c +libio18f4685_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f4685_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f4685_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f4685_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f4685_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f4685_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f4685_a_SOURCES += i2c/i2cwrites.c +libio18f4685_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f4685_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f4685_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f4685_a_SOURCES += usart/usartd.c +libio18f4685_a_CFLAGS = -p18f4685 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f46k20.a +libio18f46k20_a_SOURCES = dummy.c +libio18f46k20_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f46k20_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f46k20_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f46k20_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f46k20_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f46k20_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f46k20_a_SOURCES += i2c/i2cwrites.c +libio18f46k20_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f46k20_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f46k20_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f46k20_a_SOURCES += usart/usartd.c +libio18f46k20_a_CFLAGS = -p18f46k20 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f6520.a +libio18f6520_a_SOURCES = dummy.c +libio18f6520_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f6520_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f6520_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f6520_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f6520_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f6520_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f6520_a_SOURCES += i2c/i2cwrites.c +libio18f6520_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f6520_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f6520_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f6520_a_SOURCES += usart/usartd.c +libio18f6520_a_CFLAGS = -p18f6520 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f6585.a +libio18f6585_a_SOURCES = dummy.c +libio18f6585_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f6585_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f6585_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f6585_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f6585_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f6585_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f6585_a_SOURCES += i2c/i2cwrites.c +libio18f6585_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f6585_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f6585_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f6585_a_SOURCES += usart/usartd.c +libio18f6585_a_CFLAGS = -p18f6585 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f65j50.a +libio18f65j50_a_SOURCES = dummy.c +libio18f65j50_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f65j50_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f65j50_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f65j50_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f65j50_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f65j50_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f65j50_a_SOURCES += i2c/i2cwrites.c +libio18f65j50_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f65j50_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f65j50_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f65j50_a_SOURCES += usart/usartd.c +libio18f65j50_a_CFLAGS = -p18f65j50 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f6620.a +libio18f6620_a_SOURCES = dummy.c +libio18f6620_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f6620_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f6620_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f6620_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f6620_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f6620_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f6620_a_SOURCES += i2c/i2cwrites.c +libio18f6620_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f6620_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f6620_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f6620_a_SOURCES += usart/usartd.c +libio18f6620_a_CFLAGS = -p18f6620 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f6680.a +libio18f6680_a_SOURCES = dummy.c +libio18f6680_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f6680_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f6680_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f6680_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f6680_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f6680_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f6680_a_SOURCES += i2c/i2cwrites.c +libio18f6680_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f6680_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f6680_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f6680_a_SOURCES += usart/usartd.c +libio18f6680_a_CFLAGS = -p18f6680 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f66j50.a +libio18f66j50_a_SOURCES = dummy.c +libio18f66j50_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f66j50_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f66j50_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f66j50_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f66j50_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f66j50_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f66j50_a_SOURCES += i2c/i2cwrites.c +libio18f66j50_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f66j50_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f66j50_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f66j50_a_SOURCES += usart/usartd.c +libio18f66j50_a_CFLAGS = -p18f66j50 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f66j55.a +libio18f66j55_a_SOURCES = dummy.c +libio18f66j55_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f66j55_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f66j55_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f66j55_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f66j55_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f66j55_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f66j55_a_SOURCES += i2c/i2cwrites.c +libio18f66j55_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f66j55_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f66j55_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f66j55_a_SOURCES += usart/usartd.c +libio18f66j55_a_CFLAGS = -p18f66j55 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f66j60.a +libio18f66j60_a_SOURCES = dummy.c +libio18f66j60_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f66j60_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f66j60_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f66j60_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f66j60_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f66j60_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f66j60_a_SOURCES += i2c/i2cwrites.c +libio18f66j60_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f66j60_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f66j60_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f66j60_a_SOURCES += usart/usartd.c +libio18f66j60_a_CFLAGS = -p18f66j60 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f66j65.a +libio18f66j65_a_SOURCES = dummy.c +libio18f66j65_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f66j65_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f66j65_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f66j65_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f66j65_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f66j65_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f66j65_a_SOURCES += i2c/i2cwrites.c +libio18f66j65_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f66j65_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f66j65_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f66j65_a_SOURCES += usart/usartd.c +libio18f66j65_a_CFLAGS = -p18f66j65 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f6720.a +libio18f6720_a_SOURCES = dummy.c +libio18f6720_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f6720_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f6720_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f6720_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f6720_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f6720_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f6720_a_SOURCES += i2c/i2cwrites.c +libio18f6720_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f6720_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f6720_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f6720_a_SOURCES += usart/usartd.c +libio18f6720_a_CFLAGS = -p18f6720 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f67j50.a +libio18f67j50_a_SOURCES = dummy.c +libio18f67j50_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f67j50_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f67j50_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f67j50_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f67j50_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f67j50_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f67j50_a_SOURCES += i2c/i2cwrites.c +libio18f67j50_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f67j50_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f67j50_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f67j50_a_SOURCES += usart/usartd.c +libio18f67j50_a_CFLAGS = -p18f67j50 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f67j60.a +libio18f67j60_a_SOURCES = dummy.c +libio18f67j60_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f67j60_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f67j60_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f67j60_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f67j60_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f67j60_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f67j60_a_SOURCES += i2c/i2cwrites.c +libio18f67j60_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f67j60_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f67j60_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f67j60_a_SOURCES += usart/usartd.c +libio18f67j60_a_CFLAGS = -p18f67j60 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f8520.a +libio18f8520_a_SOURCES = dummy.c +libio18f8520_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f8520_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f8520_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f8520_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f8520_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f8520_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f8520_a_SOURCES += i2c/i2cwrites.c +libio18f8520_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f8520_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f8520_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f8520_a_SOURCES += usart/usartd.c +libio18f8520_a_CFLAGS = -p18f8520 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f8585.a +libio18f8585_a_SOURCES = dummy.c +libio18f8585_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f8585_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f8585_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f8585_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f8585_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f8585_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f8585_a_SOURCES += i2c/i2cwrites.c +libio18f8585_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f8585_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f8585_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f8585_a_SOURCES += usart/usartd.c +libio18f8585_a_CFLAGS = -p18f8585 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f85j50.a +libio18f85j50_a_SOURCES = dummy.c +libio18f85j50_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f85j50_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f85j50_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f85j50_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f85j50_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f85j50_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f85j50_a_SOURCES += i2c/i2cwrites.c +libio18f85j50_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f85j50_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f85j50_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f85j50_a_SOURCES += usart/usartd.c +libio18f85j50_a_CFLAGS = -p18f85j50 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f8620.a +libio18f8620_a_SOURCES = dummy.c +libio18f8620_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f8620_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f8620_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f8620_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f8620_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f8620_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f8620_a_SOURCES += i2c/i2cwrites.c +libio18f8620_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f8620_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f8620_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f8620_a_SOURCES += usart/usartd.c +libio18f8620_a_CFLAGS = -p18f8620 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f8680.a +libio18f8680_a_SOURCES = dummy.c +libio18f8680_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f8680_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f8680_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f8680_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f8680_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f8680_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f8680_a_SOURCES += i2c/i2cwrites.c +libio18f8680_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f8680_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f8680_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f8680_a_SOURCES += usart/usartd.c +libio18f8680_a_CFLAGS = -p18f8680 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f86j50.a +libio18f86j50_a_SOURCES = dummy.c +libio18f86j50_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f86j50_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f86j50_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f86j50_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f86j50_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f86j50_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f86j50_a_SOURCES += i2c/i2cwrites.c +libio18f86j50_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f86j50_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f86j50_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f86j50_a_SOURCES += usart/usartd.c +libio18f86j50_a_CFLAGS = -p18f86j50 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f86j55.a +libio18f86j55_a_SOURCES = dummy.c +libio18f86j55_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f86j55_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f86j55_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f86j55_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f86j55_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f86j55_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f86j55_a_SOURCES += i2c/i2cwrites.c +libio18f86j55_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f86j55_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f86j55_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f86j55_a_SOURCES += usart/usartd.c +libio18f86j55_a_CFLAGS = -p18f86j55 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f86j60.a +libio18f86j60_a_SOURCES = dummy.c +libio18f86j60_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f86j60_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f86j60_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f86j60_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f86j60_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f86j60_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f86j60_a_SOURCES += i2c/i2cwrites.c +libio18f86j60_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f86j60_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f86j60_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f86j60_a_SOURCES += usart/usartd.c +libio18f86j60_a_CFLAGS = -p18f86j60 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f86j65.a +libio18f86j65_a_SOURCES = dummy.c +libio18f86j65_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f86j65_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f86j65_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f86j65_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f86j65_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f86j65_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f86j65_a_SOURCES += i2c/i2cwrites.c +libio18f86j65_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f86j65_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f86j65_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f86j65_a_SOURCES += usart/usartd.c +libio18f86j65_a_CFLAGS = -p18f86j65 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f8720.a +libio18f8720_a_SOURCES = dummy.c +libio18f8720_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f8720_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f8720_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f8720_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f8720_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f8720_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f8720_a_SOURCES += i2c/i2cwrites.c +libio18f8720_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f8720_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f8720_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f8720_a_SOURCES += usart/usartd.c +libio18f8720_a_CFLAGS = -p18f8720 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f87j50.a +libio18f87j50_a_SOURCES = dummy.c +libio18f87j50_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f87j50_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f87j50_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f87j50_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f87j50_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f87j50_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f87j50_a_SOURCES += i2c/i2cwrites.c +libio18f87j50_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f87j50_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f87j50_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f87j50_a_SOURCES += usart/usartd.c +libio18f87j50_a_CFLAGS = -p18f87j50 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f87j60.a +libio18f87j60_a_SOURCES = dummy.c +libio18f87j60_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f87j60_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f87j60_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f87j60_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f87j60_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f87j60_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f87j60_a_SOURCES += i2c/i2cwrites.c +libio18f87j60_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f87j60_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f87j60_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f87j60_a_SOURCES += usart/usartd.c +libio18f87j60_a_CFLAGS = -p18f87j60 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f96j60.a +libio18f96j60_a_SOURCES = dummy.c +libio18f96j60_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f96j60_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f96j60_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f96j60_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f96j60_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f96j60_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f96j60_a_SOURCES += i2c/i2cwrites.c +libio18f96j60_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f96j60_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f96j60_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f96j60_a_SOURCES += usart/usartd.c +libio18f96j60_a_CFLAGS = -p18f96j60 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f96j65.a +libio18f96j65_a_SOURCES = dummy.c +libio18f96j65_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f96j65_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f96j65_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f96j65_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f96j65_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f96j65_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f96j65_a_SOURCES += i2c/i2cwrites.c +libio18f96j65_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f96j65_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f96j65_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f96j65_a_SOURCES += usart/usartd.c +libio18f96j65_a_CFLAGS = -p18f96j65 $(AM_CFLAGS) + +lib_LIBRARIES += libio18f97j60.a +libio18f97j60_a_SOURCES = dummy.c +libio18f97j60_a_SOURCES += adc/adcbusy.c adc/adcclose.c adc/adcconv.c +libio18f97j60_a_SOURCES += adc/adcopen.c adc/adcread.c adc/adcsetch.c +libio18f97j60_a_SOURCES += i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c +libio18f97j60_a_SOURCES += i2c/i2cidle.c i2c/i2cnack.c i2c/i2copen.c +libio18f97j60_a_SOURCES += i2c/i2creadc.c i2c/i2creads.c i2c/i2crestart.c +libio18f97j60_a_SOURCES += i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c +libio18f97j60_a_SOURCES += i2c/i2cwrites.c +libio18f97j60_a_SOURCES += usart/ubaud.c usart/ubusy.c usart/uclose.c +libio18f97j60_a_SOURCES += usart/udrdy.c usart/ugetc.c usart/ugets.c +libio18f97j60_a_SOURCES += usart/uopen.c usart/uputc.c usart/uputs.c +libio18f97j60_a_SOURCES += usart/usartd.c +libio18f97j60_a_CFLAGS = -p18f97j60 $(AM_CFLAGS) + +include $(top_srcdir)/Makefile.common + diff --git a/device/lib/pic16/libio/Makefile.in b/device/lib/pic16/libio/Makefile.in new file mode 100644 index 0000000..f9520ec --- /dev/null +++ b/device/lib/pic16/libio/Makefile.in @@ -0,0 +1,47240 @@ +# Makefile.in generated by automake 1.10 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +# 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + +VPATH = @srcdir@ +pkgdatadir = $(datadir)/@PACKAGE@ +pkglibdir = $(libdir)/@PACKAGE@ +pkgincludedir = $(includedir)/@PACKAGE@ +am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd +install_sh_DATA = $(install_sh) -c -m 644 +install_sh_PROGRAM = $(install_sh) -c +install_sh_SCRIPT = $(install_sh) -c +INSTALL_HEADER = $(INSTALL_DATA) +transform = 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usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2220_a_CFLAGS = -p18f2220 $(AM_CFLAGS) +libio18f2221_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2221_a_CFLAGS = -p18f2221 $(AM_CFLAGS) +libio18f2320_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2320_a_CFLAGS = -p18f2320 $(AM_CFLAGS) +libio18f2321_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2321_a_CFLAGS = -p18f2321 $(AM_CFLAGS) +libio18f2331_a_SOURCES = dummy.c usart/ubaud.c usart/ubusy.c \ + usart/uclose.c usart/udrdy.c usart/ugetc.c usart/ugets.c \ + usart/uopen.c usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2331_a_CFLAGS = -p18f2331 $(AM_CFLAGS) +libio18f23k20_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f23k20_a_CFLAGS = -p18f23k20 $(AM_CFLAGS) +libio18f2410_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2410_a_CFLAGS = -p18f2410 $(AM_CFLAGS) +libio18f242_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f242_a_CFLAGS = -p18f242 $(AM_CFLAGS) +libio18f2420_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2420_a_CFLAGS = -p18f2420 $(AM_CFLAGS) +libio18f2423_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2423_a_CFLAGS = -p18f2423 $(AM_CFLAGS) +libio18f2431_a_SOURCES = dummy.c usart/ubaud.c usart/ubusy.c \ + usart/uclose.c usart/udrdy.c usart/ugetc.c usart/ugets.c \ + usart/uopen.c usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2431_a_CFLAGS = -p18f2431 $(AM_CFLAGS) +libio18f2450_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + usart/ubaud.c usart/ubusy.c usart/uclose.c usart/udrdy.c \ + usart/ugetc.c usart/ugets.c usart/uopen.c usart/uputc.c \ + usart/uputs.c usart/usartd.c +libio18f2450_a_CFLAGS = -p18f2450 $(AM_CFLAGS) +libio18f2455_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2455_a_CFLAGS = -p18f2455 $(AM_CFLAGS) +libio18f248_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f248_a_CFLAGS = -p18f248 $(AM_CFLAGS) +libio18f2480_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2480_a_CFLAGS = -p18f2480 $(AM_CFLAGS) +libio18f24j10_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f24j10_a_CFLAGS = -p18f24j10 $(AM_CFLAGS) +libio18f24k20_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f24k20_a_CFLAGS = -p18f24k20 $(AM_CFLAGS) +libio18f2510_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2510_a_CFLAGS = -p18f2510 $(AM_CFLAGS) +libio18f2515_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2515_a_CFLAGS = -p18f2515 $(AM_CFLAGS) +libio18f252_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f252_a_CFLAGS = -p18f252 $(AM_CFLAGS) +libio18f2520_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2520_a_CFLAGS = -p18f2520 $(AM_CFLAGS) +libio18f2523_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2523_a_CFLAGS = -p18f2523 $(AM_CFLAGS) +libio18f2525_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2525_a_CFLAGS = -p18f2525 $(AM_CFLAGS) +libio18f2550_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2550_a_CFLAGS = -p18f2550 $(AM_CFLAGS) +libio18f258_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f258_a_CFLAGS = -p18f258 $(AM_CFLAGS) +libio18f2580_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2580_a_CFLAGS = -p18f2580 $(AM_CFLAGS) +libio18f2585_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2585_a_CFLAGS = -p18f2585 $(AM_CFLAGS) +libio18f25j10_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f25j10_a_CFLAGS = -p18f25j10 $(AM_CFLAGS) +libio18f25k20_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f25k20_a_CFLAGS = -p18f25k20 $(AM_CFLAGS) +libio18f2610_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2610_a_CFLAGS = -p18f2610 $(AM_CFLAGS) +libio18f2620_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2620_a_CFLAGS = -p18f2620 $(AM_CFLAGS) +libio18f2680_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2680_a_CFLAGS = -p18f2680 $(AM_CFLAGS) +libio18f2682_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2682_a_CFLAGS = -p18f2682 $(AM_CFLAGS) +libio18f2685_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f2685_a_CFLAGS = -p18f2685 $(AM_CFLAGS) +libio18f26k20_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f26k20_a_CFLAGS = -p18f26k20 $(AM_CFLAGS) +libio18f4220_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4220_a_CFLAGS = -p18f4220 $(AM_CFLAGS) +libio18f4221_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4221_a_CFLAGS = -p18f4221 $(AM_CFLAGS) +libio18f4320_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4320_a_CFLAGS = -p18f4320 $(AM_CFLAGS) +libio18f4321_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4321_a_CFLAGS = -p18f4321 $(AM_CFLAGS) +libio18f4331_a_SOURCES = dummy.c usart/ubaud.c usart/ubusy.c \ + usart/uclose.c usart/udrdy.c usart/ugetc.c usart/ugets.c \ + usart/uopen.c usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4331_a_CFLAGS = -p18f4331 $(AM_CFLAGS) +libio18f43k20_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f43k20_a_CFLAGS = -p18f43k20 $(AM_CFLAGS) +libio18f4410_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4410_a_CFLAGS = -p18f4410 $(AM_CFLAGS) +libio18f442_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f442_a_CFLAGS = -p18f442 $(AM_CFLAGS) +libio18f4420_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4420_a_CFLAGS = -p18f4420 $(AM_CFLAGS) +libio18f4423_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4423_a_CFLAGS = -p18f4423 $(AM_CFLAGS) +libio18f4431_a_SOURCES = dummy.c usart/ubaud.c usart/ubusy.c \ + usart/uclose.c usart/udrdy.c usart/ugetc.c usart/ugets.c \ + usart/uopen.c usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4431_a_CFLAGS = -p18f4431 $(AM_CFLAGS) +libio18f4450_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + usart/ubaud.c usart/ubusy.c usart/uclose.c usart/udrdy.c \ + usart/ugetc.c usart/ugets.c usart/uopen.c usart/uputc.c \ + usart/uputs.c usart/usartd.c +libio18f4450_a_CFLAGS = -p18f4450 $(AM_CFLAGS) +libio18f4455_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4455_a_CFLAGS = -p18f4455 $(AM_CFLAGS) +libio18f448_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f448_a_CFLAGS = -p18f448 $(AM_CFLAGS) +libio18f4480_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4480_a_CFLAGS = -p18f4480 $(AM_CFLAGS) +libio18f44j10_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f44j10_a_CFLAGS = -p18f44j10 $(AM_CFLAGS) +libio18f44k20_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f44k20_a_CFLAGS = -p18f44k20 $(AM_CFLAGS) +libio18f4510_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4510_a_CFLAGS = -p18f4510 $(AM_CFLAGS) +libio18f4515_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4515_a_CFLAGS = -p18f4515 $(AM_CFLAGS) +libio18f452_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f452_a_CFLAGS = -p18f452 $(AM_CFLAGS) +libio18f4520_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4520_a_CFLAGS = -p18f4520 $(AM_CFLAGS) +libio18f4523_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4523_a_CFLAGS = -p18f4523 $(AM_CFLAGS) +libio18f4525_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4525_a_CFLAGS = -p18f4525 $(AM_CFLAGS) +libio18f4550_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4550_a_CFLAGS = -p18f4550 $(AM_CFLAGS) +libio18f458_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f458_a_CFLAGS = -p18f458 $(AM_CFLAGS) +libio18f4580_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4580_a_CFLAGS = -p18f4580 $(AM_CFLAGS) +libio18f4585_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4585_a_CFLAGS = -p18f4585 $(AM_CFLAGS) +libio18f45j10_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f45j10_a_CFLAGS = -p18f45j10 $(AM_CFLAGS) +libio18f45k20_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f45k20_a_CFLAGS = -p18f45k20 $(AM_CFLAGS) +libio18f4610_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4610_a_CFLAGS = -p18f4610 $(AM_CFLAGS) +libio18f4620_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4620_a_CFLAGS = -p18f4620 $(AM_CFLAGS) +libio18f4680_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4680_a_CFLAGS = -p18f4680 $(AM_CFLAGS) +libio18f4682_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4682_a_CFLAGS = -p18f4682 $(AM_CFLAGS) +libio18f4685_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f4685_a_CFLAGS = -p18f4685 $(AM_CFLAGS) +libio18f46k20_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f46k20_a_CFLAGS = -p18f46k20 $(AM_CFLAGS) +libio18f6520_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f6520_a_CFLAGS = -p18f6520 $(AM_CFLAGS) +libio18f6585_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f6585_a_CFLAGS = -p18f6585 $(AM_CFLAGS) +libio18f65j50_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f65j50_a_CFLAGS = -p18f65j50 $(AM_CFLAGS) +libio18f6620_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f6620_a_CFLAGS = -p18f6620 $(AM_CFLAGS) +libio18f6680_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f6680_a_CFLAGS = -p18f6680 $(AM_CFLAGS) +libio18f66j50_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f66j50_a_CFLAGS = -p18f66j50 $(AM_CFLAGS) +libio18f66j55_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f66j55_a_CFLAGS = -p18f66j55 $(AM_CFLAGS) +libio18f66j60_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f66j60_a_CFLAGS = -p18f66j60 $(AM_CFLAGS) +libio18f66j65_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f66j65_a_CFLAGS = -p18f66j65 $(AM_CFLAGS) +libio18f6720_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f6720_a_CFLAGS = -p18f6720 $(AM_CFLAGS) +libio18f67j50_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f67j50_a_CFLAGS = -p18f67j50 $(AM_CFLAGS) +libio18f67j60_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f67j60_a_CFLAGS = -p18f67j60 $(AM_CFLAGS) +libio18f8520_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f8520_a_CFLAGS = -p18f8520 $(AM_CFLAGS) +libio18f8585_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f8585_a_CFLAGS = -p18f8585 $(AM_CFLAGS) +libio18f85j50_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f85j50_a_CFLAGS = -p18f85j50 $(AM_CFLAGS) +libio18f8620_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f8620_a_CFLAGS = -p18f8620 $(AM_CFLAGS) +libio18f8680_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f8680_a_CFLAGS = -p18f8680 $(AM_CFLAGS) +libio18f86j50_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f86j50_a_CFLAGS = -p18f86j50 $(AM_CFLAGS) +libio18f86j55_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f86j55_a_CFLAGS = -p18f86j55 $(AM_CFLAGS) +libio18f86j60_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f86j60_a_CFLAGS = -p18f86j60 $(AM_CFLAGS) +libio18f86j65_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f86j65_a_CFLAGS = -p18f86j65 $(AM_CFLAGS) +libio18f8720_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f8720_a_CFLAGS = -p18f8720 $(AM_CFLAGS) +libio18f87j50_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f87j50_a_CFLAGS = -p18f87j50 $(AM_CFLAGS) +libio18f87j60_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f87j60_a_CFLAGS = -p18f87j60 $(AM_CFLAGS) +libio18f96j60_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + usart/udrdy.c usart/ugetc.c usart/ugets.c usart/uopen.c \ + usart/uputc.c usart/uputs.c usart/usartd.c +libio18f96j60_a_CFLAGS = -p18f96j60 $(AM_CFLAGS) +libio18f96j65_a_SOURCES = dummy.c adc/adcbusy.c adc/adcclose.c \ + adc/adcconv.c adc/adcopen.c adc/adcread.c adc/adcsetch.c \ + i2c/i2cack.c i2c/i2cclose.c i2c/i2cdrdy.c i2c/i2cidle.c \ + i2c/i2cnack.c i2c/i2copen.c i2c/i2creadc.c i2c/i2creads.c \ + i2c/i2crestart.c i2c/i2cstart.c i2c/i2cstop.c i2c/i2cwritec.c \ + i2c/i2cwrites.c usart/ubaud.c usart/ubusy.c usart/uclose.c \ + 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check-am clean clean-generic \ + clean-libLIBRARIES clean-local ctags distclean \ + distclean-compile distclean-generic distclean-tags distdir dvi \ + dvi-am html html-am info info-am install install-am \ + install-data install-data-am install-dvi install-dvi-am \ + install-exec install-exec-am install-html install-html-am \ + install-info install-info-am install-libLIBRARIES install-man \ + install-pdf install-pdf-am install-ps install-ps-am \ + install-strip installcheck installcheck-am installdirs \ + maintainer-clean maintainer-clean-generic mostlyclean \ + mostlyclean-compile mostlyclean-generic pdf pdf-am ps ps-am \ + tags uninstall uninstall-am uninstall-libLIBRARIES + + +clean-local: + $(RM) *.asm; + $(RM) *.lst; + +clean-intermediate: clean-local + list='$(SUBDIRS)'; for subdir in $$list; do \ + echo "Making $@ in $$subdir"; \ + (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $@); \ + done +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff --git a/device/lib/pic16/libio/adc.ignore b/device/lib/pic16/libio/adc.ignore new file mode 100644 index 0000000..9cd8e69 --- /dev/null +++ b/device/lib/pic16/libio/adc.ignore @@ -0,0 +1,4 @@ +2331 +2431 +4331 +4431 diff --git a/device/lib/pic16/libio/adc/adcbusy.c b/device/lib/pic16/libio/adc/adcbusy.c new file mode 100644 index 0000000..1636240 --- /dev/null +++ b/device/lib/pic16/libio/adc/adcbusy.c @@ -0,0 +1,50 @@ + +/* + * adcbusy - check whether the AD module is busy + * + * written by Vangelis Rokas, 2004 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include +#include + + +char adc_busy(void) __naked +{ +#if defined(__SDCC_ADC_STYLE65J50) + WDTCONbits.ADSHR = 0; /* access ADCON0/1 */ +#endif +#if 0 + return (ADCON0bits.GO); +#else + __asm + movlw 0x00 +#if defined(__SDCC_ADC_STYLE242) + btfsc _ADCON0bits, 2 +#elif defined(__SDCC_ADC_STYLE1220) \ + || defined(__SDCC_ADC_STYLE2220) \ + || defined(__SDCC_ADC_STYLE65J50) + btfsc _ADCON0bits, 1 +#else /* unsupported ADC style */ +#error Unsupported ADC style. +#endif + addlw 0x01 + return + __endasm; +#endif +} + diff --git a/device/lib/pic16/libio/adc/adcclose.c b/device/lib/pic16/libio/adc/adcclose.c new file mode 100644 index 0000000..9153fe0 --- /dev/null +++ b/device/lib/pic16/libio/adc/adcclose.c @@ -0,0 +1,34 @@ + +/* + * adcclose - shutdown AD module + * + * written by Vangelis Rokas, 2004 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include +#include + + +void adc_close(void) +{ +#if defined(__SDCC_ADC_STYLE65J50) + WDTCONbits.ADSHR = 0; /* access ADCON0/1 */ +#endif + ADCON0bits.ADON = 0; + PIE1bits.ADIE = 0; +} + diff --git a/device/lib/pic16/libio/adc/adcconv.c b/device/lib/pic16/libio/adc/adcconv.c new file mode 100644 index 0000000..cbbd8a8 --- /dev/null +++ b/device/lib/pic16/libio/adc/adcconv.c @@ -0,0 +1,33 @@ + +/* + * adcconv - begin a conversion + * + * written by Vangelis Rokas, 2004 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include +#include + + +void adc_conv(void) +{ +#if defined(__SDCC_ADC_STYLE65J50) + WDTCONbits.ADSHR = 0; /* access ADCON0/1 */ +#endif + ADCON0bits.GO = 1; +} + diff --git a/device/lib/pic16/libio/adc/adcopen.c b/device/lib/pic16/libio/adc/adcopen.c new file mode 100644 index 0000000..35beadd --- /dev/null +++ b/device/lib/pic16/libio/adc/adcopen.c @@ -0,0 +1,82 @@ + +/* + * adcopen - initialize AD module + * + * written by Vangelis Rokas, 2004 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include +#include + + +/* + * parameters are: + * channel: one of ADC_CHN_* + * fosc: one of ADC_FOSC_* | ADC_ACQT_* | ADC_CAL + * pcfg: one of ADC_CFG_* (a bitmask with set bits denoting digital ports for 1220/65j50-style) + * config: ADC_FRM_* | ADC_INT_* | ADC_VCFG_* + */ + +#if defined(__SDCC_ADC_STYLE65J50) +void adc_open(unsigned char channel, unsigned char fosc, unsigned int pcfg, unsigned char config) +#else +void adc_open(unsigned char channel, unsigned char fosc, unsigned char pcfg, unsigned char config) +#endif +{ + /* disable ADC */ +#if defined(__SDCC_ADC_STYLE65J50) + WDTCONbits.ADSHR = 0; /* access ADCON0/1 */ +#endif + ADCON0 = 0; + +#if defined(__SDCC_ADC_STYLE242) + ADCON0 = ((channel & 0x07) << 3) | ((fosc & 0x03) << 6); + ADCON1 = (pcfg & 0x0f) | (config & ADC_FRM_RJUST); + if (fosc & 0x04) { + ADCON1bits.ADCS2 = 1; + } +#elif defined (__SDCC_ADC_STYLE1220) + ADCON0 = ((channel & 0x07) | (config & ADC_VCFG_AN3_AN2)) << 2; + ADCON1 = (pcfg & 0x7f); + ADCON2 = (ADCON2 & 0x38) | (fosc & 0x07) | (config & ADC_FRM_RJUST); +#elif defined(__SDCC_ADC_STYLE2220) + ADCON0 = (channel & 0x0f) << 2; + /* XXX: Should be (pcfg & 0x0f) as VCFG comes from config, + * but we retain compatibility for now ... */ + ADCON1 = (pcfg & 0x3f) | (config & ADC_VCFG_AN3_AN2); + ADCON2 = (ADCON2 & 0x38) | (fosc & 0x07) | (config & ADC_FRM_RJUST); +#elif defined(__SDCC_ADC_STYLE65J50) + WDTCONbits.ADSHR = 1; /* access ANCON0/1 */ + ANCON0 = pcfg; + ANCON1 = (pcfg >> 8); + WDTCONbits.ADSHR = 0; /* access ADCON0/1 */ + ADCON0 = ((channel & 0x0f) << 2) | ((config & ADC_VCFG_AN3_AN2) << 2); + ADCON1 = (config & ADC_FRM_RJUST) | (fosc & 0x7f); +#else /* unsupported ADC style */ +#error Unsupported ADC style. +#endif + + if (config & ADC_INT_ON) { + PIR1bits.ADIF = 0; + PIE1bits.ADIE = 1; + INTCONbits.PEIE = 1; + } + + /* enable the A/D module */ + ADCON0bits.ADON = 1; +} + diff --git a/device/lib/pic16/libio/adc/adcread.c b/device/lib/pic16/libio/adc/adcread.c new file mode 100644 index 0000000..94fb9c2 --- /dev/null +++ b/device/lib/pic16/libio/adc/adcread.c @@ -0,0 +1,34 @@ + +/* + * adcread - read value of convertion + * + * written by Vangelis Rokas, 2004 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include +#include + + +int adc_read(void) __naked +{ + __asm + movff _ADRESH, _PRODL + movf _ADRESL, w + return + __endasm; +} + diff --git a/device/lib/pic16/libio/adc/adcsetch.c b/device/lib/pic16/libio/adc/adcsetch.c new file mode 100644 index 0000000..0daffb1 --- /dev/null +++ b/device/lib/pic16/libio/adc/adcsetch.c @@ -0,0 +1,41 @@ + +/* + * adcsetch - select convertion channel + * + * written by Vangelis Rokas, 2004 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include +#include + + +void adc_setchannel(unsigned char channel) +{ +#if defined(__SDCC_ADC_STYLE242) + ADCON0 = (ADCON0 & ~(0x07 << 3)) | ((channel & 0x07) << 3); +#elif defined(__SDCC_ADC_STYLE1220) + ADCON0 = (ADCON0 & ~(0x07 << 2)) | ((channel & 0x07) << 2); +#elif defined(__SDCC_ADC_STYLE2220) + ADCON0 = (ADCON0 & ~(0x0f << 2)) | ((channel & 0x0f) << 2); +#elif defined(__SDCC_ADC_STYLE65J50) + WDTCONbits.ADSHR = 0; /* access ADCON0/1 */ + ADCON0 = (ADCON0 & ~(0x0f << 2)) | ((channel & 0x0f) << 2); +#else /* unsupported ADC style */ +#error Unsupported ADC style. +#endif +} + diff --git a/device/lib/pic16/libio/dummy.c b/device/lib/pic16/libio/dummy.c new file mode 100644 index 0000000..4e1e5fb --- /dev/null +++ b/device/lib/pic16/libio/dummy.c @@ -0,0 +1,2 @@ +static int __foo; + diff --git a/device/lib/pic16/libio/i2c.ignore b/device/lib/pic16/libio/i2c.ignore new file mode 100644 index 0000000..c844316 --- /dev/null +++ b/device/lib/pic16/libio/i2c.ignore @@ -0,0 +1,10 @@ +1220 +1320 + +2331 +2431 +2450 + +4331 +4431 +4450 diff --git a/device/lib/pic16/libio/i2c/i2cack.c b/device/lib/pic16/libio/i2c/i2cack.c new file mode 100644 index 0000000..e5ad735 --- /dev/null +++ b/device/lib/pic16/libio/i2c/i2cack.c @@ -0,0 +1,11 @@ + +#include + +#include + + +void i2c_ack(void) +{ + SSPCON2bits.ACKDT = 0; + SSPCON2bits.ACKEN = 1; +} diff --git a/device/lib/pic16/libio/i2c/i2cclose.c b/device/lib/pic16/libio/i2c/i2cclose.c new file mode 100644 index 0000000..13ef805 --- /dev/null +++ b/device/lib/pic16/libio/i2c/i2cclose.c @@ -0,0 +1,10 @@ + +#include + +#include + + +void i2c_close(void) +{ + SSPCON1 &= 0xdf; +} diff --git a/device/lib/pic16/libio/i2c/i2cdrdy.c b/device/lib/pic16/libio/i2c/i2cdrdy.c new file mode 100644 index 0000000..1cbd0f6 --- /dev/null +++ b/device/lib/pic16/libio/i2c/i2cdrdy.c @@ -0,0 +1,11 @@ + +#include + +#include + + +unsigned char i2c_drdy(void) +{ + if(SSPSTATbits.BF)return (+1); + else return (0); +} diff --git a/device/lib/pic16/libio/i2c/i2cidle.c b/device/lib/pic16/libio/i2c/i2cidle.c new file mode 100644 index 0000000..cd84383 --- /dev/null +++ b/device/lib/pic16/libio/i2c/i2cidle.c @@ -0,0 +1,9 @@ + +#include + +#include + +void i2c_idle(void) +{ + while((SSPCON2 & 0x1f) | (SSPSTATbits.R_W)); +} diff --git a/device/lib/pic16/libio/i2c/i2cnack.c b/device/lib/pic16/libio/i2c/i2cnack.c new file mode 100644 index 0000000..4de29ba --- /dev/null +++ b/device/lib/pic16/libio/i2c/i2cnack.c @@ -0,0 +1,10 @@ + +#include + +#include + +void i2c_nack(void) +{ + SSPCON2bits.ACKDT = 1; + SSPCON2bits.ACKEN = 1; +} diff --git a/device/lib/pic16/libio/i2c/i2copen.c b/device/lib/pic16/libio/i2c/i2copen.c new file mode 100644 index 0000000..d891a44 --- /dev/null +++ b/device/lib/pic16/libio/i2c/i2copen.c @@ -0,0 +1,35 @@ + +#include + +#include + +void i2c_open(unsigned char mode, unsigned char slew, unsigned char addr_brd) +{ + SSPSTAT &= 0x3f; + SSPCON1 = 0; + SSPCON2 = 0; + SSPCON1 |= mode; + SSPSTAT |= slew; + + +#if defined(pic18f2455) || defined (pic18f2550) \ + || defined(pic18f4455) || defined (pic18f4550) \ + || defined(pic18f66j60) || defined(pic18f66j65) || defined(pic18f67j60) \ + || defined(pic18f86j60) || defined(pic18f86j65) || defined(pic18f87j60) \ + || defined(pic18f96j60) || defined(pic18f96j65) || defined(pic18f97j60) + + TRISBbits.TRISB1 = 1; + TRISBbits.TRISB0 = 1; + +#else /* all other devices */ + + TRISCbits.TRISC3 = 1; + TRISCbits.TRISC2 = 1; + +#endif + + SSPADD = addr_brd; + + SSPCON1 |= 0x20; +} + diff --git a/device/lib/pic16/libio/i2c/i2creadc.c b/device/lib/pic16/libio/i2c/i2creadc.c new file mode 100644 index 0000000..09f5bcd --- /dev/null +++ b/device/lib/pic16/libio/i2c/i2creadc.c @@ -0,0 +1,11 @@ + +#include + +#include + +unsigned char i2c_readchar(void) +{ + SSPCON2bits.RCEN = 1; + while( !I2C_DRDY() ); + return ( SSPBUF ); +} diff --git a/device/lib/pic16/libio/i2c/i2creads.c b/device/lib/pic16/libio/i2c/i2creads.c new file mode 100644 index 0000000..6157599 --- /dev/null +++ b/device/lib/pic16/libio/i2c/i2creads.c @@ -0,0 +1,26 @@ + +#include + +#include + + +char i2c_readstr(_I2CPARAM_SPEC unsigned char *ptr, unsigned char len) +{ + unsigned char count=0; + + while( len-- ) { + *ptr++ = i2c_readchar(); + + while(SSPCON2bits.RCEN) { + if(PIR2bits.BCLIF)return (-1); + count++; + + if(len) { + I2C_ACK(); + while(SSPCON2bits.ACKEN); + } + } + } + + return count; +} diff --git a/device/lib/pic16/libio/i2c/i2crestart.c b/device/lib/pic16/libio/i2c/i2crestart.c new file mode 100644 index 0000000..1635746 --- /dev/null +++ b/device/lib/pic16/libio/i2c/i2crestart.c @@ -0,0 +1,9 @@ + +#include + +#include + +void i2c_restart(void) +{ + SSPCON2bits.RSEN = 1; +} diff --git a/device/lib/pic16/libio/i2c/i2cstart.c b/device/lib/pic16/libio/i2c/i2cstart.c new file mode 100644 index 0000000..cae7491 --- /dev/null +++ b/device/lib/pic16/libio/i2c/i2cstart.c @@ -0,0 +1,9 @@ + +#include + +#include + +void i2c_start(void) +{ + SSPCON2bits.SEN = 1; +} diff --git a/device/lib/pic16/libio/i2c/i2cstop.c b/device/lib/pic16/libio/i2c/i2cstop.c new file mode 100644 index 0000000..d348bbe --- /dev/null +++ b/device/lib/pic16/libio/i2c/i2cstop.c @@ -0,0 +1,9 @@ + +#include + +#include + +void i2c_stop(void) +{ + SSPCON2bits.PEN = 1; +} diff --git a/device/lib/pic16/libio/i2c/i2cwritec.c b/device/lib/pic16/libio/i2c/i2cwritec.c new file mode 100644 index 0000000..9008331 --- /dev/null +++ b/device/lib/pic16/libio/i2c/i2cwritec.c @@ -0,0 +1,15 @@ + +#include + +#include + +char i2c_writechar(unsigned char dat) +{ + SSPBUF = dat; + if( SSPCON1bits.WCOL ) { + return -1; + } else { + while( I2C_DRDY() ); + return 0; + } +} diff --git a/device/lib/pic16/libio/i2c/i2cwrites.c b/device/lib/pic16/libio/i2c/i2cwrites.c new file mode 100644 index 0000000..09d9f51 --- /dev/null +++ b/device/lib/pic16/libio/i2c/i2cwrites.c @@ -0,0 +1,32 @@ + +#include + +#include + +char i2c_writestr(unsigned char *ptr) +{ + while( *ptr ) { + if( SSPCON1bits.SSPM3 ) { + if(i2c_writechar( *ptr )) { + return (-3); + } + I2C_IDLE(); + if( SSPCON2bits.ACKSTAT ) { + return (-2); + } + } else { + PIR1bits.SSPIF = 0; + SSPBUF = *ptr; + SSPCON1bits.CKP = 1; + while( !PIR1bits.SSPIF ); + + if((!SSPSTATbits.R_W) && ( !SSPSTATbits.BF )) { + return (-2); + } + } + + ptr++; + } + + return 0; +} diff --git a/device/lib/pic16/libio/mkmk.sh b/device/lib/pic16/libio/mkmk.sh new file mode 100755 index 0000000..ad10f9a --- /dev/null +++ b/device/lib/pic16/libio/mkmk.sh @@ -0,0 +1,53 @@ +#!/bin/sh + +# +# Script to generate Makefile.am, +# execute in device/lib/pic16/libio/ with no arguments. +# +# Written by Raphael Neider +# +# Released under the terms of the GPL v2. +# + +cat <>${arch}<<" >&2; + cat < /dev/null 2>&1 && { echo "No adc." >&2 ; } || cat < /dev/null 2>&1 && { echo "No i2c." >&2 ; } || cat < /dev/null 2>&1 && { echo "No usart." >&2 ; } || cat < + * + * Devices implemented: + * PIC18F[24][45][28] + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * + * $Id: ubaud.c 3835 2005-08-07 20:09:11Z tecodev $ + */ + +#include + +#include + +void usart_baud(unsigned char baudconfig) __wparam +{ + SPBRG = baudconfig; +} diff --git a/device/lib/pic16/libio/usart/ubusy.c b/device/lib/pic16/libio/usart/ubusy.c new file mode 100644 index 0000000..e383a11 --- /dev/null +++ b/device/lib/pic16/libio/usart/ubusy.c @@ -0,0 +1,47 @@ + +/* + * ubusy - return USART TX state + * + * written by Vangelis Rokas, 2004 + * + * Devices implemented: + * PIC18F[24][45][28] + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * + * $Id: ubusy.c 3714 2005-04-02 13:13:53Z vrokas $ + */ + + +#include + +#include + +unsigned char usart_busy(void) __naked +{ +#if 0 + if(!TXSTAbits.TRMT)return 1; + else return 0; +#else + __asm + movlw 0x00 + btfss _TXSTAbits, 1 + addlw 0x01 + return + __endasm; +#endif +} diff --git a/device/lib/pic16/libio/usart/uclose.c b/device/lib/pic16/libio/usart/uclose.c new file mode 100644 index 0000000..8f11c41 --- /dev/null +++ b/device/lib/pic16/libio/usart/uclose.c @@ -0,0 +1,39 @@ + +/* + * uclose - shutdown USART module + * + * written by Vangelis Rokas, 2004 + * + * Devices implemented: + * PIC18F[24][45][28] + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * + * $Id: uclose.c 3711 2005-03-31 16:25:17Z vrokas $ + */ + + +#include + +#include + +void usart_close(void) +{ + RCSTA &= 0x4f; + TXSTAbits.TXEN = 0; + PIE1 &= 0xcf; +} diff --git a/device/lib/pic16/libio/usart/udrdy.c b/device/lib/pic16/libio/usart/udrdy.c new file mode 100644 index 0000000..2de5e0c --- /dev/null +++ b/device/lib/pic16/libio/usart/udrdy.c @@ -0,0 +1,47 @@ + +/* + * udrdy - return 1 is data is received + * + * written by Vangelis Rokas, 2004 + * + * Devices implemented: + * PIC18F[24][45][28] + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * + * $Id: udrdy.c 3714 2005-04-02 13:13:53Z vrokas $ + */ + +#include + +#include + + +unsigned char usart_drdy(void) __naked +{ +#if 0 + if(PIR1bits.RCIF)return 1; + else return 0; +#else + __asm + movlw 0x00 + btfsc _PIR1bits, 5 + addlw 0x01 + return + __endasm; +#endif +} diff --git a/device/lib/pic16/libio/usart/ugetc.c b/device/lib/pic16/libio/usart/ugetc.c new file mode 100644 index 0000000..636d531 --- /dev/null +++ b/device/lib/pic16/libio/usart/ugetc.c @@ -0,0 +1,53 @@ + +/* + * ugetc - get received character + * + * written by Vangelis Rokas, 2004 + * + * Devices implemented: + * PIC18F[24][45][28] + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * + * $Id: ugetc.c 3711 2005-03-31 16:25:17Z vrokas $ + */ + + +#include + +#include + +extern union USART USART_Status; + +unsigned char usart_getc(void) +{ + USART_Status.val &= 0xf0; + + if(RCSTAbits.RX9) { + USART_Status.RX_NINE = 0; + if(RCSTAbits.RX9D) + USART_Status.RX_NINE = 1; + } + + if(RCSTAbits.FERR) + USART_Status.FRAME_ERROR = 1; + + if(RCSTAbits.OERR) + USART_Status.OVERRUN_ERROR = 1; + + return (RCREG); +} diff --git a/device/lib/pic16/libio/usart/ugets.c b/device/lib/pic16/libio/usart/ugets.c new file mode 100644 index 0000000..ca4699c --- /dev/null +++ b/device/lib/pic16/libio/usart/ugets.c @@ -0,0 +1,50 @@ + +/* + * ugets - read string from USART + * + * written by Vangelis Rokas, 2004 + * + * Devices implemented: + * PIC18F[24][45][28] + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * + * $Id: ugets.c 3711 2005-03-31 16:25:17Z vrokas $ + */ + + +#include + +#include + +void usart_gets(RAM_SCLS char *buffer, unsigned char len) +{ + unsigned char i; + unsigned char dat; + + for(i=0;i + * + * Devices implemented: + * PIC18F[24][45][28] + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * + * $Id: uopen.c 5195 2008-06-21 21:36:29Z tecodev $ + */ + + +#include + +#include + +// USART Status Structure +extern union USART USART_Status; + +void usart_open(unsigned char config, unsigned int spbrg) __wparam +{ + TXSTA = 0; // Reset USART registers to POR state + RCSTA = 0; + + if(config&0x01)TXSTAbits.SYNC = 1; + + if(config&0x02) { + TXSTAbits.TX9 = 1; + RCSTAbits.RX9 = 1; + } + + if(config&0x04)TXSTAbits.CSRC = 1; + + if(config&0x08)RCSTAbits.CREN = 1; + else RCSTAbits.SREN = 1; + + if(config&0x10)TXSTAbits.BRGH = 1; + else TXSTAbits.BRGH = 0; + + /* TX interrupts */ +#if defined(pic18f66j60) || defined(pic18f66j65) || \ + defined(pic18f67j60) || defined(pic18f86j60) || \ + defined(pic18f86j65) || defined(pic18f87j60) || \ + defined(pic18f96j60) || defined(pic18f96j65) || \ + defined(pic18f97j60) + + PIR1bits.TXIF_PIR1 = 0; + +#else /* all other devices */ + + PIR1bits.TXIF = 0; + +#endif + + if(config&0x40)PIE1bits.RCIE = 1; + else PIE1bits.RCIE = 0; + + /* RX interrupts */ + PIR1bits.RCIF = 0; + +#if defined(pic18f66j60) || defined(pic18f66j65) || \ + defined(pic18f67j60) || defined(pic18f86j60) || \ + defined(pic18f86j65) || defined(pic18f87j60) || \ + defined(pic18f96j60) || defined(pic18f96j65) || \ + defined(pic18f97j60) + + if(config&0x80)PIE1bits.TXIE_PIE1 = 1; + else PIE1bits.TXIE_PIE1 = 0; + +#else /* all other devices */ + + if(config&0x80)PIE1bits.TXIE = 1; + else PIE1bits.TXIE = 0; + +#endif + + SPBRG = (char)spbrg; + + TXSTAbits.TXEN = 1; + RCSTAbits.SPEN = 1; +} diff --git a/device/lib/pic16/libio/usart/uputc.c b/device/lib/pic16/libio/usart/uputc.c new file mode 100644 index 0000000..349c054 --- /dev/null +++ b/device/lib/pic16/libio/usart/uputc.c @@ -0,0 +1,61 @@ + +/* + * uputc - write a character to USART + * + * written by Vangelis Rokas, 2004 + * + * Devices implemented: + * PIC18F[24][45][28] + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * + * $Id: uputc.c 3714 2005-04-02 13:13:53Z vrokas $ + */ + + +#include + +#include + +extern union USART USART_Status; + +void usart_putc(unsigned char dat) __wparam __naked +{ +#if 0 + if(TXSTAbits.TX9) { + TXSTAbits.TX9D = 0; + if(USART_Status.TX_NINE)TXSTAbits.TX9D = 1; + } + + TXREG = dat; // Write the data byte to the USART +#else + dat; + __asm + btfss _TXSTAbits, 6 + bra _01_ + + bcf _TXSTAbits, 0 + banksel _USART_Status + btfsc _USART_Status, 1, b + bsf _TXSTAbits, 0 + +_01_: + movwf _TXREG + return + __endasm; +#endif +} diff --git a/device/lib/pic16/libio/usart/uputs.c b/device/lib/pic16/libio/usart/uputs.c new file mode 100644 index 0000000..3f1ab15 --- /dev/null +++ b/device/lib/pic16/libio/usart/uputs.c @@ -0,0 +1,40 @@ + +/* + * uputs - put a string to USART + * + * written by Vangelis Rokas, 2004 + * + * Devices implemented: + * PIC18F[24][45][28] + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * + * $Id: uputs.c 3711 2005-03-31 16:25:17Z vrokas $ + */ + + +#include + +#include + +void usart_puts(char *dat) +{ + do { + while( usart_busy() ); + usart_putc( *dat ); + } while( *dat++ ); +} diff --git a/device/lib/pic16/libio/usart/usartd.c b/device/lib/pic16/libio/usart/usartd.c new file mode 100644 index 0000000..5a03c48 --- /dev/null +++ b/device/lib/pic16/libio/usart/usartd.c @@ -0,0 +1,33 @@ + +/* + * usartd - status variable definition + * + * written by Vangelis Rokas, 2004 + * + * Devices implemented: + * PIC18F[24][45][28] + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * + * $Id: usartd.c 3711 2005-03-31 16:25:17Z vrokas $ + */ + +#include + +#include + +union USART USART_Status; diff --git a/device/lib/pic16/libm/Makefile.am b/device/lib/pic16/libm/Makefile.am new file mode 100644 index 0000000..da8a8bb --- /dev/null +++ b/device/lib/pic16/libm/Makefile.am @@ -0,0 +1,35 @@ +## Makefile.am -- Process this file with automake to produce Makefile.in + +lib_LIBRARIES = libm18f.a + +libm18f_a_SOURCES = +libm18f_a_SOURCES += acosf.c +libm18f_a_SOURCES += asincosf.c +libm18f_a_SOURCES += asinf.c +libm18f_a_SOURCES += atan2f.c +libm18f_a_SOURCES += atanf.c +libm18f_a_SOURCES += ceilf.c +libm18f_a_SOURCES += cosf.c +libm18f_a_SOURCES += coshf.c +libm18f_a_SOURCES += cotf.c +libm18f_a_SOURCES += errno.c +libm18f_a_SOURCES += expf.c +libm18f_a_SOURCES += fabsf.c +libm18f_a_SOURCES += floorf.c +libm18f_a_SOURCES += frexpf.c +libm18f_a_SOURCES += ldexpf.c +libm18f_a_SOURCES += log10f.c +libm18f_a_SOURCES += logf.c +libm18f_a_SOURCES += modff.c +libm18f_a_SOURCES += powf.c +libm18f_a_SOURCES += sincosf.c +libm18f_a_SOURCES += sincoshf.c +libm18f_a_SOURCES += sinf.c +libm18f_a_SOURCES += sinhf.c +libm18f_a_SOURCES += sqrtf.c +libm18f_a_SOURCES += tancotf.c +libm18f_a_SOURCES += tanf.c +libm18f_a_SOURCES += tanhf.c + +include $(top_srcdir)/Makefile.common + diff --git a/device/lib/pic16/libm/Makefile.in b/device/lib/pic16/libm/Makefile.in new file mode 100644 index 0000000..96fa405 --- /dev/null +++ b/device/lib/pic16/libm/Makefile.in @@ -0,0 +1,490 @@ +# Makefile.in generated by automake 1.10 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +# 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + +VPATH = @srcdir@ +pkgdatadir = $(datadir)/@PACKAGE@ +pkglibdir = $(libdir)/@PACKAGE@ +pkgincludedir = $(includedir)/@PACKAGE@ +am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd +install_sh_DATA = $(install_sh) -c -m 644 +install_sh_PROGRAM = $(install_sh) -c +install_sh_SCRIPT = $(install_sh) -c +INSTALL_HEADER = $(INSTALL_DATA) +transform = $(program_transform_name) +NORMAL_INSTALL = : +PRE_INSTALL = : +POST_INSTALL = : +NORMAL_UNINSTALL = : +PRE_UNINSTALL = : +POST_UNINSTALL = : +DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in \ + $(top_srcdir)/Makefile.common +subdir = libm +ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 +am__aclocal_m4_deps = $(top_srcdir)/configure.ac +am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \ + $(ACLOCAL_M4) +mkinstalldirs = $(install_sh) -d +CONFIG_HEADER = $(top_builddir)/config.h +CONFIG_CLEAN_FILES = +am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`; 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See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: acosf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include + +float asincosf(const float x, const int isacos); + +float acosf(const float x) _MATH_REENTRANT +{ + if(x== 1.0) return 0.0; + else if(x==-1.0) return PI; + else if(x== 0.0) return HALF_PI; + return asincosf(x,1); +} diff --git a/device/lib/pic16/libm/asincosf.c b/device/lib/pic16/libm/asincosf.c new file mode 100644 index 0000000..2f48bc1 --- /dev/null +++ b/device/lib/pic16/libm/asincosf.c @@ -0,0 +1,92 @@ +/* asincosf.c: Computes asin or acos of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: asincosf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + + +#include +#include + +#define P1 0.933935835E+0 +#define P2 -0.504400557E+0 +#define Q0 0.560363004E+1 +#define Q1 -0.554846723E+1 +#define Q2 0.100000000E+1 + +#define P(g) (P2*g+P1) +#define Q(g) ((Q2*g+Q1)*g+Q0) + +#ifdef SDCC_mcs51 + #define myconst code +#else + #define myconst const +#endif + +float asincosf(const float x, const int isacos) +{ + float y, g, r; + int i; + + static myconst float a[2]={ 0.0, QUART_PI }; + static myconst float b[2]={ HALF_PI, QUART_PI }; + + y=fabsf(x); + i=isacos; + if (y < EPS) r=y; + else + { + if (y > 0.5) + { + i=1-i; + if (y > 1.0) + { + errno=EDOM; + return 0.0; + } + g=(0.5-y)+0.5; + g=ldexpf(g,-1); + y=sqrtf(g); + y=-(y+y); + } + else + { + g=y*y; + } + r=y+y*((P(g)*g)/Q(g)); + } + if (isacos) + { + if (x < 0.0) + r=(b[i]+r)+b[i]; + else + r=(a[i]-r)+a[i]; + } + else + { + r=(a[i]+r)+a[i]; + if (x<0.0) r=-r; + } + return r; +} diff --git a/device/lib/pic16/libm/asinf.c b/device/lib/pic16/libm/asinf.c new file mode 100644 index 0000000..869e0f5 --- /dev/null +++ b/device/lib/pic16/libm/asinf.c @@ -0,0 +1,36 @@ +/* asinf.c: Computes asin(x) + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: asinf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include + +float asincosf(const float x, const int isacos); + +float asinf(const float x) _MATH_REENTRANT +{ + if(x== 1.0) return HALF_PI; + else if(x==-1.0) return -HALF_PI; + else if(x== 0.0) return 0.0; + else return asincosf(x,0); +} + diff --git a/device/lib/pic16/libm/atan2f.c b/device/lib/pic16/libm/atan2f.c new file mode 100644 index 0000000..2e0a4fb --- /dev/null +++ b/device/lib/pic16/libm/atan2f.c @@ -0,0 +1,49 @@ +/* atan2f.c: Computes atan2(x) where x is a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: atan2f.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include +#include + +float atan2f(const float x, const float y) +{ + float r; + + if ((x==0.0) && (y==0.0)) + { + errno=EDOM; + return 0.0; + } + + if(fabsf(y)>=fabsf(x)) + { + r=atanf(x/y); + if(y<0.0) r+=(x>=0?PI:-PI); + } + else + { + r=-atanf(y/x); + r+=(x<0.0?-HALF_PI:HALF_PI); + } + return r; +} diff --git a/device/lib/pic16/libm/atanf.c b/device/lib/pic16/libm/atanf.c new file mode 100644 index 0000000..9f5fe0d --- /dev/null +++ b/device/lib/pic16/libm/atanf.c @@ -0,0 +1,80 @@ +/* atanf.c: Computes arctan of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: atanf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include +#include + +#define P0 -0.4708325141E+0 +#define P1 -0.5090958253E-1 +#define Q0 0.1412500740E+1 +#define Q1 0.1000000000E+1 + +#define P(g,f) ((P1*g+P0)*g*f) +#define Q(g) (Q1*g+Q0) + +#define K1 0.2679491924 /* 2-sqrt(3) */ +#define K2 0.7320508076 /* sqrt(3)-1 */ +#define K3 1.7320508076 /* sqrt(3) */ + +#ifdef SDCC_mcs51 + #define myconst code +#else + #define myconst const +#endif + +float atanf(const float x) _MATH_REENTRANT +{ + float f, r, g; + int n=0; + static myconst float a[]={ 0.0, 0.5235987756, 1.5707963268, 1.0471975512 }; + + f=fabsf(x); + if(f>1.0) + { + f=1.0/f; + n=2; + } + if(f>K1) + { + f=((K2*f-1.0)+f)/(K3+f); + // What it is actually wanted is this more accurate formula, + // but SDCC optimizes it and then it does not work: + // f=(((K2*f-0.5)-0.5)+f)/(K3+f); + n++; + } + if(fabsf(f)1) r=-r; + r+=a[n]; + if(x<0.0) r=-r; + return r; +} + diff --git a/device/lib/pic16/libm/ceilf.c b/device/lib/pic16/libm/ceilf.c new file mode 100644 index 0000000..598630e --- /dev/null +++ b/device/lib/pic16/libm/ceilf.c @@ -0,0 +1,35 @@ +/* ceilf.c: Returns the integer larger or equal than x + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: ceilf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include + +float ceilf(float x) _MATH_REENTRANT +{ + long r; + r=x; + if (r<0) + return r; + else + return (r+((r + +float sincosf(float x, int iscos); + +float cosf(float x) _MATH_REENTRANT +{ + if (x==0.0) return 1.0; + return sincosf(x, 1); +} diff --git a/device/lib/pic16/libm/coshf.c b/device/lib/pic16/libm/coshf.c new file mode 100644 index 0000000..1acdf2e --- /dev/null +++ b/device/lib/pic16/libm/coshf.c @@ -0,0 +1,32 @@ +/* coshf.c: Computes cosh(x) where x is a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: coshf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include + +float sincoshf(const float x, const int iscosh); + +float coshf(const float x) _MATH_REENTRANT +{ + return sincoshf(x, 1); +} diff --git a/device/lib/pic16/libm/cotf.c b/device/lib/pic16/libm/cotf.c new file mode 100644 index 0000000..ae3090b --- /dev/null +++ b/device/lib/pic16/libm/cotf.c @@ -0,0 +1,45 @@ +/* cotf.c: Computes cot(x) where x is a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: cotf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include +#include + +float tancotf(const float x, const int iscot); + +float cotf(const float x) _MATH_REENTRANT +{ + float y; + + y=fabsf(x); + if (y<1.0E-30) //This one requires more thinking... + { + errno = ERANGE; + if (x<0.0) + return -XMAX; + else + return XMAX; + } + return tancotf(x, 1); +} + diff --git a/device/lib/pic16/libm/errno.c b/device/lib/pic16/libm/errno.c new file mode 100644 index 0000000..2a33a84 --- /dev/null +++ b/device/lib/pic16/libm/errno.c @@ -0,0 +1,25 @@ +/*------------------------------------------------------------------------- + + errno.c :- just declares errno as a variable + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +-------------------------------------------------------------------------*/ + +/* +** $Id: errno.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +int errno; diff --git a/device/lib/pic16/libm/expf.c b/device/lib/pic16/libm/expf.c new file mode 100644 index 0000000..6f74e93 --- /dev/null +++ b/device/lib/pic16/libm/expf.c @@ -0,0 +1,90 @@ +/* expf.c: Computes e**x of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: expf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include +#include + +#define P0 0.2499999995E+0 +#define P1 0.4160288626E-2 +#define Q0 0.5000000000E+0 +#define Q1 0.4998717877E-1 + +#define P(z) ((P1*z)+P0) +#define Q(z) ((Q1*z)+Q0) + +#define C1 0.693359375 +#define C2 -2.1219444005469058277e-4 + +#define BIGX 88.72283911 /* ln(XMAX) */ +#define EXPEPS 1.0E-7 /* exp(1.0E-7)=0.0000001 */ +#define K1 1.4426950409 /* 1/ln(2) */ + +float expf(const float x) +{ + int n; + float xn, g, r, z, y; + char sign; + + if(x>=0.0) + { y=x; sign=0; } + else + { y=-x; sign=1; } + + if(yBIGX) + { + if(sign) + { + errno=ERANGE; + return XMAX; + } + else + { + return 0.0; + } + } + + z=y*K1; + n=z; + + if(n<0) --n; + if(z-n>=0.5) ++n; + xn=n; + g=((y-xn*C1))-xn*C2; + z=g*g; + r=P(z)*g; + r=0.5+(r/(Q(z)-r)); + + n++; + z=ldexpf(r, n); + if(sign) + return 1.0/z; + else + return z; +} + diff --git a/device/lib/pic16/libm/fabsf.c b/device/lib/pic16/libm/fabsf.c new file mode 100644 index 0000000..b9dec9c --- /dev/null +++ b/device/lib/pic16/libm/fabsf.c @@ -0,0 +1,35 @@ +/* fabsf.c: Returns the absolute value of a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: fabsf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include +#include + +float fabsf(const float x) _MATH_REENTRANT +{ + union float_long fl; + + fl.f = x; + fl.l &= 0x7fffffff; + return fl.f; +} diff --git a/device/lib/pic16/libm/floorf.c b/device/lib/pic16/libm/floorf.c new file mode 100644 index 0000000..6eeb708 --- /dev/null +++ b/device/lib/pic16/libm/floorf.c @@ -0,0 +1,35 @@ +/* floorf.c: Returns the integer smaller or equal than x + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: floorf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include + +float floorf (float x) _MATH_REENTRANT +{ + long r; + r=x; + if (r<=0) + return (r+((r>x)?-1:0)); + else + return r; +} diff --git a/device/lib/pic16/libm/frexpf.c b/device/lib/pic16/libm/frexpf.c new file mode 100644 index 0000000..c906c13 --- /dev/null +++ b/device/lib/pic16/libm/frexpf.c @@ -0,0 +1,41 @@ +/* frexpf.c: Returns the exponent and mantisa of a 32 bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: frexpf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include +#include + +float frexpf(const float x, int *pw2) +{ + union float_long fl; + long int i; + + fl.f=x; + /* Find the exponent (power of 2) */ + i = ( fl.l >> 23) & 0x000000ff; + i -= 0x7e; + *pw2 = i; + fl.l &= 0x807fffff; /* strip all exponent bits */ + fl.l |= 0x3f000000; /* mantissa between 0.5 and 1 */ + return(fl.f); +} diff --git a/device/lib/pic16/libm/ldexpf.c b/device/lib/pic16/libm/ldexpf.c new file mode 100644 index 0000000..0c55ee2 --- /dev/null +++ b/device/lib/pic16/libm/ldexpf.c @@ -0,0 +1,40 @@ +/* ldexpf.c: Build a float from a mantisa and exponent. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: ldexpf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include +#include + +float ldexpf(const float x, const int pw2) +{ + union float_long fl; + long e; + + fl.f = x; + + e=(fl.l >> 23) & 0x000000ff; + e+=pw2; + fl.l= ((e & 0xff) << 23) | (fl.l & 0x807fffff); + + return(fl.f); +} diff --git a/device/lib/pic16/libm/log10f.c b/device/lib/pic16/libm/log10f.c new file mode 100644 index 0000000..03d5044 --- /dev/null +++ b/device/lib/pic16/libm/log10f.c @@ -0,0 +1,31 @@ +/* log10f.c: Computes the base 10 log of a 32 bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: log10f.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include +#include + +float log10f(const float x) _MATH_REENTRANT +{ + return logf(x)*0.4342944819; +} diff --git a/device/lib/pic16/libm/logf.c b/device/lib/pic16/libm/logf.c new file mode 100644 index 0000000..0fe7e7f --- /dev/null +++ b/device/lib/pic16/libm/logf.c @@ -0,0 +1,74 @@ +/* logf.c: Computes the natural log of a 32 bit float as outlined in [1]. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: logf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include +#include + +/*Constans for 24 bits or less (8 decimal digits)*/ +#define A0 -0.5527074855E+0 +#define B0 -0.6632718214E+1 +#define A(w) (A0) +#define B(w) (w+B0) + +#define C0 0.70710678118654752440 +#define C1 0.693359375 /*355.0/512.0*/ +#define C2 -2.121944400546905827679E-4 + +float logf(const float x) _MATH_REENTRANT +{ +#if defined(SDCC_mcs51) && defined(SDCC_MODEL_SMALL) \ + && !defined(SDCC_NOOVERLAY) + volatile +#endif + float Rz; + float f, z, w, znum, zden, xn; + int n; + + if (x<=0.0) + { + errno=EDOM; + return 0.0; + } + f=frexpf(x, &n); + znum=f-0.5; + if (f>C0) + { + znum-=0.5; + zden=(f*0.5)+0.5; + } + else + { + n--; + zden=znum*0.5+0.5; + } + z=znum/zden; + w=z*z; + + Rz=z+z*(w*A(w)/B(w)); + xn=n; + return ((xn*C2+Rz)+xn*C1); +} diff --git a/device/lib/pic16/libm/modff.c b/device/lib/pic16/libm/modff.c new file mode 100644 index 0000000..3aae5fd --- /dev/null +++ b/device/lib/pic16/libm/modff.c @@ -0,0 +1,31 @@ +/* modff.c: Returns both the integer and fraction of a float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: modff.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include + +float modff(float x, float * y) +{ + *y=((int)x); + return (x-*y); +} diff --git a/device/lib/pic16/libm/powf.c b/device/lib/pic16/libm/powf.c new file mode 100644 index 0000000..b6b941e --- /dev/null +++ b/device/lib/pic16/libm/powf.c @@ -0,0 +1,35 @@ +/* powf.c: Computes x**y where x and y are 32-bit floats. + WARNING: less that 6 digits accuracy. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: powf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include +#include + +float powf(const float x, const float y) +{ + if(y == 0.0) return 1.0; + if(y==1.0) return x; + if(x <= 0.0) return 0.0; + return expf(logf(x) * y); +} diff --git a/device/lib/pic16/libm/sincosf.c b/device/lib/pic16/libm/sincosf.c new file mode 100644 index 0000000..5a74156 --- /dev/null +++ b/device/lib/pic16/libm/sincosf.c @@ -0,0 +1,90 @@ +/* sincosf.c: Computes sin or cos of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: sincosf.c 3714 2005-04-02 13:13:53Z vrokas $ +*/ + +#include +#include + +#define r1 (-0.1666665668E+0) +#define r2 (0.8333025139E-2) +#define r3 (-0.1980741872E-3) +#define r4 (0.2601903036E-5) + +/* PI=C1+C2 */ +#define C1 3.140625 +#define C2 9.676535897E-4 + +/*A reasonable value for YMAX is the int part of PI*B**(t/2)=3.1416*2**(12)*/ +#define YMAX 12867.0 + +float sincosf(float x, int iscos) +{ + float y, f, r, g, XN; + int N; + char sign; + + if(iscos) + { + y=fabsf(x)+HALF_PI; + sign=0; + } + else + { + if(x<0.0) + { y=-x; sign=1; } + else + { y=x; sign=0; } + } + + if(y>YMAX) + { + errno=ERANGE; + return 0.0; + } + + /*Round y/PI to the nearest integer*/ + N=((y*iPI)+0.5); /*y is positive*/ + + /*If N is odd change sign*/ + if(N&1) sign=!sign; + + XN=N; + /*Cosine required? (is done here to keep accuracy)*/ + if(iscos) XN-=0.5; + + y=fabsf(x); + r=(int)y; + g=y-r; + f=((r-XN*C1)+g)-XN*C2; + + g=f*f; + if(g>EPS2) //Used to be if(fabsf(f)>EPS) + { + r=(((r4*g+r3)*g+r2)*g+r1)*g; + f+=f*r; + } + return (sign?-f:f); +} diff --git a/device/lib/pic16/libm/sincoshf.c b/device/lib/pic16/libm/sincoshf.c new file mode 100644 index 0000000..1043bdc --- /dev/null +++ b/device/lib/pic16/libm/sincoshf.c @@ -0,0 +1,93 @@ +/* sincoshf.c: Computes sinh or cosh of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: sincoshf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include +#include + +#define P0 -0.713793159E+1 +#define P1 -0.190333999E+0 +#define Q0 -0.428277109E+2 +#define Q1 0.100000000E+1 + +#define P(z) (P1*z+P0) +#define Q(z) (Q1*z+Q0) + +#define K1 0.69316101074218750000E+0 /* ln(v) */ +#define K2 0.24999308500451499336E+0 /* v**(-2) */ +#define K3 0.13830277879601902638E-4 /* v/2-1 */ + +//WMAX is defined as ln(XMAX)-ln(v)+0.69 +#define WMAX 44.93535952E+0 +//WBAR 0.35*(b+1) +#define WBAR 1.05 +#define YBAR 9.0 /*Works for me*/ + +float sincoshf(const float x, const int iscosh) +{ + float y, w, z; + char sign; + + if (x<0.0) { y=-x; sign=1; } + else { y=x; sign=0; } + + if ((y>1.0) || iscosh) + { + if(y>YBAR) + { + w=y-K1; + if (w>WMAX) + { + errno=ERANGE; + z=XMAX; + } + else + { + z=expf(w); + z+=K3*z; + } + } + else + { + z=expf(y); + w=1.0/z; + if(!iscosh) w=-w; + z=(z+w)*0.5; + } + if(sign) z=-z; + } + else + { + if (y + +float sincosf(float x, int iscos); + +float sinf(float x) _MATH_REENTRANT +{ + if (x==0.0) return 0.0; + return sincosf(x, 0); +} diff --git a/device/lib/pic16/libm/sinhf.c b/device/lib/pic16/libm/sinhf.c new file mode 100644 index 0000000..5d81c5f --- /dev/null +++ b/device/lib/pic16/libm/sinhf.c @@ -0,0 +1,32 @@ +/* sinhf.c: Computes sinh(x) where x is a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: sinhf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include + +float sincoshf(const float x, const int iscosh); + +float sinhf(const float x) _MATH_REENTRANT +{ + return sincoshf(x, 0); +} diff --git a/device/lib/pic16/libm/sqrtf.c b/device/lib/pic16/libm/sqrtf.c new file mode 100644 index 0000000..8b31e16 --- /dev/null +++ b/device/lib/pic16/libm/sqrtf.c @@ -0,0 +1,55 @@ +/* sqrtf.c: Computes square root of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: sqrtf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include +#include + +float sqrtf(const float x) _MATH_REENTRANT +{ + float f, y; + int n; + + if (x==0.0) return x; + else if (x==1.0) return 1.0; + else if (x<0.0) + { + errno=EDOM; + return 0.0; + } + f=frexpf(x, &n); + y=0.41731+0.59016*f; /*Educated guess*/ + /*For a 24 bit mantisa (float), two iterations are sufficient*/ + y+=f/y; + y=ldexpf(y, -2) + f/y; /*Faster version of 0.25 * y + f/y*/ + + if (n&1) + { + y*=0.7071067812; + ++n; + } + return ldexpf(y, n/2); +} diff --git a/device/lib/pic16/libm/tancotf.c b/device/lib/pic16/libm/tancotf.c new file mode 100644 index 0000000..60e3ada --- /dev/null +++ b/device/lib/pic16/libm/tancotf.c @@ -0,0 +1,89 @@ +/* tancotf.c: Computes tan or cot of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: tancotf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include +#include + +#define P0 0.100000000E+1 +#define P1 -0.958017723E-1 +#define Q0 0.100000000E+1 +#define Q1 -0.429135777E+0 +#define Q2 0.971685835E-2 + +#define C1 1.5703125 +#define C2 4.83826794897E-4 + +#define P(f,g) (P1*g*f+f) +#define Q(g) ((Q2*g+Q1)*g+Q0) + +//A reasonable choice for YMAX is the integer part of B**(t/2)*PI/2: +#define YMAX 6433.0 + +float tancotf(const float x, const int iscotan) +{ + float f, g, xn, xnum, xden; + int n; + + if (fabsf(x) > YMAX) + { + errno = ERANGE; + return 0.0; + } + + /*Round x*2*PI to the nearest integer*/ + n=(x*TWO_O_PI+(x>0.0?0.5:-0.5)); /*works for +-x*/ + xn=n; + + xnum=(int)x; + xden=x-xnum; + f=((xnum-xn*C1)+xden)-xn*C2; + + if (fabsf(f) < EPS) + { + xnum = f; + xden = 1.0; + } + else + { + g = f*f; + xnum = P(f,g); + xden = Q(g); + } + + if(n&1) + //xn is odd + { + if(iscotan) return (-xnum/xden); + else return (-xden/xnum); + } + else + { + if(iscotan) return (xden/xnum); + else return (xnum/xden); + } +} + diff --git a/device/lib/pic16/libm/tanf.c b/device/lib/pic16/libm/tanf.c new file mode 100644 index 0000000..4e1bcfa --- /dev/null +++ b/device/lib/pic16/libm/tanf.c @@ -0,0 +1,33 @@ +/* tanf.c: Computes tan(x) where x is a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: tanf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include + +float tancotf(const float x, const int iscot); + +float tanf(const float x) _MATH_REENTRANT +{ + return tancotf(x, 0); +} + diff --git a/device/lib/pic16/libm/tanhf.c b/device/lib/pic16/libm/tanhf.c new file mode 100644 index 0000000..d46a8b0 --- /dev/null +++ b/device/lib/pic16/libm/tanhf.c @@ -0,0 +1,64 @@ +/* tanhf.c: Computes tanh(x) where x is a 32-bit float as outlined in [1]. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +/* +** $Id: tanhf.c 3654 2005-01-24 10:38:53Z vrokas $ +*/ + +#include +#include + +#define P0 -0.8237728127E+0 +#define P1 -0.3831010665E-2 +#define Q0 0.2471319654E+1 +#define Q1 0.1000000000E+1 + +/* ln(3)/2 */ +#define K1 0.5493061443E+0 +/* SBIG=[ln(2)+(t+1)*ln(B)]/2 */ +#define SBIG 9.01091 + +#define P(g) ((P1*g+P0)*g) +#define Q(g) (Q1*g+Q0) + +float tanhf(const float x) _MATH_REENTRANT +{ + float f, g, r; + + f=fabsf(x); + if(f>SBIG) r=1.0; + else if(f>K1) + { + r=0.5-1.0/(expf(f+f)+1.0); + r+=r; + } + else if(f + +unsigned char _divuchar (unsigned char a, unsigned char b); + +int _divschar (char a, char b) _IL_REENTRANT +{ + register unsigned char r; + char ta, tb; + + if(a<0)ta = -a; else ta = a; + if(b<0)tb = -b; else tb = b; + + r = _divuchar(ta, tb); + + if ((a < 0) ^ (b < 0)) return -r; + else return r; +} + diff --git a/device/lib/pic16/libsdcc/char/divuchar.c b/device/lib/pic16/libsdcc/char/divuchar.c new file mode 100644 index 0000000..d964355 --- /dev/null +++ b/device/lib/pic16/libsdcc/char/divuchar.c @@ -0,0 +1,62 @@ +/*------------------------------------------------------------------------- + _divuchar.c :- routine for unsigned char (8 bit) division + + Ecrit par - Jean-Louis Vern . jlvern@writeme.com (1999) + Adopted for char (8-bit) and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* +** $Id: divuchar.c 3711 2005-03-31 16:25:17Z vrokas $ +*/ + +#include + +//#define MSB_SET(x) ((x >> (8*sizeof(x)-1)) & 1) +#define MSB_SET(x) (x & 0x80) + +unsigned char _divuchar (unsigned char a, unsigned char b) _IL_REENTRANT +{ + unsigned char reste = 0; + unsigned char count = 8; + char c; + + do + { + // reste: a <- 0; + c = MSB_SET(a); + a <<= 1; + reste <<= 1; + if (c) + reste |= 1; + + if (reste >= b) + { + reste -= b; + + // a <- (result = 1) + a |= 1; + } + } + while (--count); + + return a; +} diff --git a/device/lib/pic16/libsdcc/char/modschar.c b/device/lib/pic16/libsdcc/char/modschar.c new file mode 100644 index 0000000..1899926 --- /dev/null +++ b/device/lib/pic16/libsdcc/char/modschar.c @@ -0,0 +1,49 @@ +/*------------------------------------------------------------------------- + _modschar.c :- routine for signed char (8 bit) modulus + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + Adopted for char (8-bit) and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* +** $Id: modschar.c 3711 2005-03-31 16:25:17Z vrokas $ +*/ + + +#include + +unsigned char _moduchar (unsigned char a, unsigned char b); + +char _modschar (char a, char b) _IL_REENTRANT +{ + register char r; + char ta, tb; + + if(a<0)ta = -a; else ta = a; + if(b<0)tb = -b; else tb = b; + + r = _moduchar(ta, tb); + + if (a < 0) return -r; + else return r; +} + diff --git a/device/lib/pic16/libsdcc/char/moduchar.c b/device/lib/pic16/libsdcc/char/moduchar.c new file mode 100644 index 0000000..d362890 --- /dev/null +++ b/device/lib/pic16/libsdcc/char/moduchar.c @@ -0,0 +1,57 @@ +/*------------------------------------------------------------------------- + _moduchar.c :- routine for unsigned char (8 bit) modulus + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + Bug fixes by Martijn van Balen, aed@iae.nl + Adopted for char (8-bit) and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +//#define MSB_SET(x) ((x >> (8*sizeof(x)-1)) & 1) +#define MSB_SET(x) (x & 0x80) + + +unsigned char _moduchar (unsigned char a, unsigned char b) _IL_REENTRANT +{ + unsigned char count = 0; + + while (!MSB_SET(b)) + { + b <<= 1; + if (b > a) + { + b >>=1; + break; + } + count++; + } + + do + { + if (a >= b) + a -= b; + b >>= 1; + } + while (count--); + return a; +} diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x162schar.S b/device/lib/pic16/libsdcc/fixed16x16/fps16x162schar.S new file mode 100644 index 0000000..ead5bd0 --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x162schar.S @@ -0,0 +1,49 @@ + +; +; fps16x162schar.S - convert fixed16x16 to signed char +; +; written by Vangelis Rokas, 2004 +; +; +; $Id: fps16x162schar.S 3838 2005-08-10 10:53:34Z tecodev $ +; + + radix dec + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global ___fps16x162schar + +;-------------------------------------------------------- +; Equates to used internal registers +;-------------------------------------------------------- +STATUS equ 0xfd8 +WREG equ 0xfe8 +FSR0L equ 0xfe9 +FSR1L equ 0xfe1 +FSR2L equ 0xfd9 +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 +PLUSW1 equ 0xfe3 +PRODL equ 0xff3 +PRODH equ 0xff4 + + +S_fps16x162schar____fps16x162schar code +___fps16x162schar: + + movlw 0x04 + movff PLUSW1, PRODL + + movlw 0x03 + movf PLUSW1, w + + btfss PRODL, 7 + bra @1 + negf WREG + +@1: + return + + end diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x162sfloat.c b/device/lib/pic16/libsdcc/fixed16x16/fps16x162sfloat.c new file mode 100644 index 0000000..b305580 --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x162sfloat.c @@ -0,0 +1,21 @@ + +float __fps16x162sfloat(__fixed16x16 fixd) +{ + union { + __fixed16x16 fix; + unsigned long value; + } u; + float tmp=0, exp=2; + + u.fix = fixd; + tmp = (u.value & 0xffff0000) >> 16; + + while(u.value) { + u.value &= 0xffff; + if(u.value & 0x8000)tmp += 1/exp; + exp *= 2; + u.value <<= 1; + } + + return (tmp); +} diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x162sint.S b/device/lib/pic16/libsdcc/fixed16x16/fps16x162sint.S new file mode 100644 index 0000000..462262b --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x162sint.S @@ -0,0 +1,56 @@ + +; +; fps16x162sint.S - convert fixed16x16 to signed char +; +; written by Vangelis Rokas, 2004 +; +; +; $Id: fps16x162sint.S 3838 2005-08-10 10:53:34Z tecodev $ +; + + radix dec + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global ___fps16x162sint + +;-------------------------------------------------------- +; Equates to used internal registers +;-------------------------------------------------------- +STATUS equ 0xfd8 +WREG equ 0xfe8 +FSR0L equ 0xfe9 +FSR1L equ 0xfe1 +FSR2L equ 0xfd9 +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 +PLUSW2 equ 0xfdb +PLUSW1 equ 0xfe3 +PRODL equ 0xff3 +PRODH equ 0xff4 + + +S_fps16x162sint____fps16x162sint code +___fps16x162sint: + + movlw 0x04 + movff PLUSW1, PRODL + + movlw 0x03 + movf PLUSW1, w + + btfss PRODL, 7 + bra @1 + + bcf PRODL, 7 + + comf WREG, f + comf PRODL, f + infsnz WREG, f + incf PRODL, f + +@1: + return + + end diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x162slong.S b/device/lib/pic16/libsdcc/fixed16x16/fps16x162slong.S new file mode 100644 index 0000000..bc9920b --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x162slong.S @@ -0,0 +1,74 @@ + +; +; fps16x162slong.S - convert fixed16x16 to signed char +; +; written by Vangelis Rokas, 2004 +; +; +; $Id: fps16x162slong.S 3838 2005-08-10 10:53:34Z tecodev $ +; + + radix dec + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global ___fps16x162slong + +;-------------------------------------------------------- +; Equates to used internal registers +;-------------------------------------------------------- +STATUS equ 0xfd8 +WREG equ 0xfe8 +FSR0L equ 0xfe9 +FSR1L equ 0xfe1 +FSR2L equ 0xfd9 +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 +PLUSW2 equ 0xfdb +PLUSW1 equ 0xfe3 +PRODL equ 0xff3 +PRODH equ 0xff4 + + +; Internal registers +.registers udata_ovr 0x0000 +r0x00 res 1 +r0x01 res 1 +r0x02 res 1 +r0x03 res 1 + + +S_fps16x162slong____fps16x162slong code +___fps16x162slong: + + movlw 0x04 + movff PLUSW1, PRODL + + movlw 0x03 + movf PLUSW1, w + + clrf PRODH + clrf FSR0L + + btfss PRODL, 7 + bra @1 + + bcf PRODL, 7 + comf WREG, f + comf PRODL, f + comf PRODH, f + comf FSR0L, f + + incfsz WREG, f + bra @1 + incfsz PRODL, f + bra @1 + incfsz PRODH, f + bra @1 + incf FSR0L, f + +@1: + return + + end diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x162uchar.S b/device/lib/pic16/libsdcc/fixed16x16/fps16x162uchar.S new file mode 100644 index 0000000..2d11ef6 --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x162uchar.S @@ -0,0 +1,53 @@ + +; +; fps16x162uchar.S - convert fixed16x16 to signed char +; +; written by Vangelis Rokas, 2004 +; +; +; $Id: fps16x162uchar.S 3838 2005-08-10 10:53:34Z tecodev $ +; + + radix dec + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global ___fps16x162uchar + +;-------------------------------------------------------- +; Equates to used internal registers +;-------------------------------------------------------- +STATUS equ 0xfd8 +WREG equ 0xfe8 +FSR0L equ 0xfe9 +FSR1L equ 0xfe1 +FSR2L equ 0xfd9 +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 +PLUSW2 equ 0xfdb +PLUSW1 equ 0xfe3 +PRODL equ 0xff3 +PRODH equ 0xff4 + + +; Internal registers +.registers udata_ovr 0x0000 +r0x00 res 1 +r0x01 res 1 +r0x02 res 1 +r0x03 res 1 + + +S_fps16x162uchar____fps16x162uchar code +___fps16x162uchar: + + ; normally would read from 0x04 but since we haven't setup + ; a stack frame, then read from 0x04 - 1 (VR) + + movlw 0x03 + movf PLUSW1, w + + return + + end diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x162uint.S b/device/lib/pic16/libsdcc/fixed16x16/fps16x162uint.S new file mode 100644 index 0000000..9c63dc0 --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x162uint.S @@ -0,0 +1,53 @@ + +; +; fps16x162uint.S - convert fixed16x16 to signed char +; +; written by Vangelis Rokas, 2004 +; +; +; $Id: fps16x162uint.S 3838 2005-08-10 10:53:34Z tecodev $ +; + + radix dec + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global ___fps16x162uint + +;-------------------------------------------------------- +; Equates to used internal registers +;-------------------------------------------------------- +STATUS equ 0xfd8 +WREG equ 0xfe8 +FSR0L equ 0xfe9 +FSR1L equ 0xfe1 +FSR2L equ 0xfd9 +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 +PLUSW2 equ 0xfdb +PLUSW1 equ 0xfe3 +PRODL equ 0xff3 +PRODH equ 0xff4 + + +; Internal registers +.registers udata_ovr 0x0000 +r0x00 res 1 +r0x01 res 1 +r0x02 res 1 +r0x03 res 1 + + +S_fps16x162uint____fps16x162uint code +___fps16x162uint: + + movlw 0x04 + movff PLUSW1, PRODL + + movlw 0x03 + movf PLUSW1, w + + return + + end diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x162ulong.S b/device/lib/pic16/libsdcc/fixed16x16/fps16x162ulong.S new file mode 100644 index 0000000..eaf0a76 --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x162ulong.S @@ -0,0 +1,61 @@ + +; +; fps16x162ulong.S - convert fixed16x16 to signed char +; +; written by Vangelis Rokas, 2004 +; +; +; $Id: fps16x162ulong.S 3838 2005-08-10 10:53:34Z tecodev $ +; + + radix dec + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global ___fps16x162ulong + +;-------------------------------------------------------- +; Equates to used internal registers +;-------------------------------------------------------- +STATUS equ 0xfd8 +WREG equ 0xfe8 +FSR0L equ 0xfe9 +FSR1L equ 0xfe1 +FSR2L equ 0xfd9 +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 +PLUSW2 equ 0xfdb +PLUSW1 equ 0xfe3 +PRODL equ 0xff3 +PRODH equ 0xff4 + + +; Internal registers +.registers udata_ovr 0x0000 +r0x00 res 1 +r0x01 res 1 +r0x02 res 1 +r0x03 res 1 + + +S_fps16x162ulong____fps16x162ulong code +___fps16x162ulong: + + movlw 0x04 + movff PLUSW1, PRODL + + movlw 0x7f + andwf PRODL, f + + movlw 0x03 + movf PLUSW1, w + + + + clrf PRODH + clrf FSR0L + + return + + end diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x16_add.c b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_add.c new file mode 100644 index 0000000..5e9689c --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_add.c @@ -0,0 +1,17 @@ + +union u_t { + long value; + __fixed16x16 fix; +}; + +__fixed16x16 __fps16x16_add(__fixed16x16 a, __fixed16x16 b) +{ + volatile union u_t u1, u2; + + u1.fix = a; + u2.fix = b; + + u1.value += u2.value; + + return (u1.fix); +} diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x16_div.c b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_div.c new file mode 100644 index 0000000..6656939 --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_div.c @@ -0,0 +1,17 @@ + +union u_t { + long value; + __fixed16x16 fix; +}; + +__fixed16x16 __fps16x16_div(__fixed16x16 a, __fixed16x16 b) +{ + volatile union u_t u1, u2; + + u1.fix = a; + u2.fix = b; + + u1.value = ((u1.value << 6) / u2.value) << 10; + + return (u1.fix); +} diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x16_eq.c b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_eq.c new file mode 100644 index 0000000..7b6df14 --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_eq.c @@ -0,0 +1,42 @@ +/*------------------------------------------------------------------------- + fps16x16_eq.c - compare two __fixed16x16 values for equality + + written by - Raphael Neider (2005) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: fps16x16_eq.c 4148 2006-05-01 20:47:12Z tecodev $ +-------------------------------------------------------------------------*/ + +union u_t { + long value; + __fixed16x16 fix; +}; + +char +__fps16x16_eq (__fixed16x16 a, __fixed16x16 b) +{ + union u_t u1, u2; + + u1.fix = a; + u2.fix = b; + + return (u1.value == u2.value); +} + diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x16_gt.c b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_gt.c new file mode 100644 index 0000000..783a3ad --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_gt.c @@ -0,0 +1,42 @@ +/*------------------------------------------------------------------------- + fps16x16_gt.c - compare two __fixed16x16 values + + written by - Raphael Neider (2005) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: fps16x16_gt.c 4148 2006-05-01 20:47:12Z tecodev $ +-------------------------------------------------------------------------*/ + +union u_t { + long value; + __fixed16x16 fix; +}; + +char +__fps16x16_gt (__fixed16x16 a, __fixed16x16 b) +{ + union u_t u1, u2; + + u1.fix = a; + u2.fix = b; + + return (u1.value > u2.value); +} + diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x16_gteq.c b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_gteq.c new file mode 100644 index 0000000..91b45a2 --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_gteq.c @@ -0,0 +1,42 @@ +/*------------------------------------------------------------------------- + fps16x16_gteq.c - compare two __fixed16x16 values + + written by - Raphael Neider (2005) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: fps16x16_gteq.c 4148 2006-05-01 20:47:12Z tecodev $ +-------------------------------------------------------------------------*/ + +union u_t { + long value; + __fixed16x16 fix; +}; + +char +__fps16x16_gteq (__fixed16x16 a, __fixed16x16 b) +{ + union u_t u1, u2; + + u1.fix = a; + u2.fix = b; + + return (u1.value >= u2.value); +} + diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x16_lt.c b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_lt.c new file mode 100644 index 0000000..2c0f2fb --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_lt.c @@ -0,0 +1,42 @@ +/*------------------------------------------------------------------------- + fps16x16_lt.c - compare two __fixed16x16 values + + written by - Raphael Neider (2005) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: fps16x16_lt.c 4148 2006-05-01 20:47:12Z tecodev $ +-------------------------------------------------------------------------*/ + +union u_t { + long value; + __fixed16x16 fix; +}; + +char +__fps16x16_lt (__fixed16x16 a, __fixed16x16 b) +{ + union u_t u1, u2; + + u1.fix = a; + u2.fix = b; + + return (u1.value < u2.value); +} + diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x16_lteq.c b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_lteq.c new file mode 100644 index 0000000..69d5131 --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_lteq.c @@ -0,0 +1,42 @@ +/*------------------------------------------------------------------------- + fps16x16_lteq.c - compare two __fixed16x16 values + + written by - Raphael Neider (2005) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: fps16x16_lteq.c 4148 2006-05-01 20:47:12Z tecodev $ +-------------------------------------------------------------------------*/ + +union u_t { + long value; + __fixed16x16 fix; +}; + +char +__fps16x16_lteq (__fixed16x16 a, __fixed16x16 b) +{ + union u_t u1, u2; + + u1.fix = a; + u2.fix = b; + + return (u1.value <= u2.value); +} + diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x16_mul.c b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_mul.c new file mode 100644 index 0000000..3e23f3f --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_mul.c @@ -0,0 +1,17 @@ + +union u_t { + long value; + __fixed16x16 fix; +}; + +__fixed16x16 __fps16x16_mul(__fixed16x16 a, __fixed16x16 b) +{ + volatile union u_t u1, u2; + + u1.fix = a; + u2.fix = b; + + u1.value = (u1.value >> 4) * (u2.value >> 4) >> 8; + + return (u1.fix); +} diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x16_neq.c b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_neq.c new file mode 100644 index 0000000..7e60e0a --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_neq.c @@ -0,0 +1,42 @@ +/*------------------------------------------------------------------------- + fps16x16_neq.c - compare two __fixed16x16 values for inequality + + written by - Raphael Neider (2005) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + $Id: fps16x16_neq.c 4148 2006-05-01 20:47:12Z tecodev $ +-------------------------------------------------------------------------*/ + +union u_t { + long value; + __fixed16x16 fix; +}; + +char +__fps16x16_neq (__fixed16x16 a, __fixed16x16 b) +{ + union u_t u1, u2; + + u1.fix = a; + u2.fix = b; + + return (u1.value != u2.value); +} + diff --git a/device/lib/pic16/libsdcc/fixed16x16/fps16x16_sub.c b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_sub.c new file mode 100644 index 0000000..a542d47 --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/fps16x16_sub.c @@ -0,0 +1,17 @@ + +union u_t { + long value; + __fixed16x16 fix; +}; + +__fixed16x16 __fps16x16_sub(__fixed16x16 a, __fixed16x16 b) +{ + volatile union u_t u1, u2; + + u1.fix = a; + u2.fix = b; + + u1.value -= u2.value; + + return (u1.fix); +} diff --git a/device/lib/pic16/libsdcc/fixed16x16/schar2fps16x16.S b/device/lib/pic16/libsdcc/fixed16x16/schar2fps16x16.S new file mode 100644 index 0000000..4d078a3 --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/schar2fps16x16.S @@ -0,0 +1,57 @@ + +; +; schar2fps16x16.S - convert signed char to fixed16x16 +; +; written by Vangelis Rokas, 2004 +; +; +; $Id: schar2fps16x16.S 3838 2005-08-10 10:53:34Z tecodev $ +; + + radix dec + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global ___schar2fps16x16 + +;-------------------------------------------------------- +; Equates to used internal registers +;-------------------------------------------------------- +STATUS equ 0xfd8 +WREG equ 0xfe8 +FSR0L equ 0xfe9 +FSR1L equ 0xfe1 +FSR2L equ 0xfd9 +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 +PLUSW1 equ 0xfe3 +PRODL equ 0xff3 +PRODH equ 0xff4 + + +S_schar2fps16x16____schar2fps16x16 code +___schar2fps16x16: + + movlw 0x01 + movff PLUSW1, PRODH + + clrf WREG + clrf PRODL + clrf FSR0L + + btfss PRODH, 7 + bra @1 + + comf PRODH, f + comf FSR0L, f + + infsnz PRODH, f + incf FSR0L, f + + bsf FSR0L, 7 + +@1: + return + + end diff --git a/device/lib/pic16/libsdcc/fixed16x16/sint2fps16x16.S b/device/lib/pic16/libsdcc/fixed16x16/sint2fps16x16.S new file mode 100644 index 0000000..8e49c1e --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/sint2fps16x16.S @@ -0,0 +1,59 @@ + +; +; sint2fps16x16.S - convert signed char to fixed16x16 +; +; written by Vangelis Rokas, 2004 +; +; +; $Id: sint2fps16x16.S 3838 2005-08-10 10:53:34Z tecodev $ +; + + radix dec + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global ___sint2fps16x16 + +;-------------------------------------------------------- +; Equates to used internal registers +;-------------------------------------------------------- +STATUS equ 0xfd8 +WREG equ 0xfe8 +FSR0L equ 0xfe9 +FSR1L equ 0xfe1 +FSR2L equ 0xfd9 +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 +PLUSW1 equ 0xfe3 +PRODL equ 0xff3 +PRODH equ 0xff4 + + +S_sint2fps16x16____sint2fps16x16 code +___sint2fps16x16: + + movlw 0x02 + movff PLUSW1, FSR0L + movlw 0x01 + movff PLUSW1, PRODH + + clrf WREG + clrf PRODL + + btfss FSR0L, 7 + bra @1 + + + comf PRODH, f + comf FSR0L, f + + infsnz PRODH, f + incf FSR0L, f + + bsf FSR0L, 7 + +@1: + return + + end diff --git a/device/lib/pic16/libsdcc/fixed16x16/slong2fps16x16.S b/device/lib/pic16/libsdcc/fixed16x16/slong2fps16x16.S new file mode 100644 index 0000000..dda14d8 --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/slong2fps16x16.S @@ -0,0 +1,55 @@ + +; +; slong2fps16x16.S - convert signed long to fixed16x16 +; +; written by Vangelis Rokas, 2004 +; +; +; $Id: slong2fps16x16.S 3838 2005-08-10 10:53:34Z tecodev $ +; + + radix dec + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global ___slong2fps16x16 + +;-------------------------------------------------------- +; Equates to used internal registers +;-------------------------------------------------------- +STATUS equ 0xfd8 +WREG equ 0xfe8 +FSR0L equ 0xfe9 +FSR1L equ 0xfe1 +FSR2L equ 0xfd9 +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 +PLUSW1 equ 0xfe3 +PRODL equ 0xff3 +PRODH equ 0xff4 + + +S_slong2fps16x16____slong2fps16x16 code +___slong2fps16x16: + + movlw 0x02 + movff PLUSW1, FSR0L + movlw 0x01 + movff PLUSW1, PRODH + + btfss FSR0L, 7 + bra @1 + + comf PRODH, f + comf FSR0L, f + + infsnz PRODH, f + incf FSR0L, f + + bsf FSR0L, 7 + +@1: + return + + end diff --git a/device/lib/pic16/libsdcc/fixed16x16/uchar2fps16x16.S b/device/lib/pic16/libsdcc/fixed16x16/uchar2fps16x16.S new file mode 100644 index 0000000..622cc63 --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/uchar2fps16x16.S @@ -0,0 +1,48 @@ + +; +; uchar2fps16x16.S - convert signed char to fixed16x16 +; +; written by Vangelis Rokas, 2004 +; +; +; $Id: uchar2fps16x16.S 3838 2005-08-10 10:53:34Z tecodev $ +; + + radix dec + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global ___uchar2fps16x16 + +;-------------------------------------------------------- +; Equates to used internal registers +;-------------------------------------------------------- +STATUS equ 0xfd8 +WREG equ 0xfe8 +FSR0L equ 0xfe9 +FSR1L equ 0xfe1 +FSR2L equ 0xfd9 +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 +PLUSW1 equ 0xfe3 +PRODL equ 0xff3 +PRODH equ 0xff4 + + +S_uchar2fps16x16____uchar2fps16x16 code +___uchar2fps16x16: + + movlw 0x01 + movff PLUSW1, PRODH + + clrf WREG + clrf PRODL + clrf FSR0L + + bcf FSR0L, 7 + +@1: + return + + end diff --git a/device/lib/pic16/libsdcc/fixed16x16/uint2fps16x16.S b/device/lib/pic16/libsdcc/fixed16x16/uint2fps16x16.S new file mode 100644 index 0000000..ce97c6e --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/uint2fps16x16.S @@ -0,0 +1,49 @@ + +; +; uint2fps16x16.S - convert signed char to fixed16x16 +; +; written by Vangelis Rokas, 2004 +; +; +; $Id: uint2fps16x16.S 3838 2005-08-10 10:53:34Z tecodev $ +; + + radix dec + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global ___uint2fps16x16 + +;-------------------------------------------------------- +; Equates to used internal registers +;-------------------------------------------------------- +STATUS equ 0xfd8 +WREG equ 0xfe8 +FSR0L equ 0xfe9 +FSR1L equ 0xfe1 +FSR2L equ 0xfd9 +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 +PLUSW1 equ 0xfe3 +PRODL equ 0xff3 +PRODH equ 0xff4 + + +S_uint2fps16x16____uint2fps16x16 code +___uint2fps16x16: + + movlw 0x02 + movff PLUSW1, FSR0L + movlw 0x01 + movff PLUSW1, PRODH + + clrf WREG + clrf PRODL + + bcf FSR0L, 7 + +@1: + return + + end diff --git a/device/lib/pic16/libsdcc/fixed16x16/ulong2fps16x16.S b/device/lib/pic16/libsdcc/fixed16x16/ulong2fps16x16.S new file mode 100644 index 0000000..21748db --- /dev/null +++ b/device/lib/pic16/libsdcc/fixed16x16/ulong2fps16x16.S @@ -0,0 +1,46 @@ + +; +; ulong2fps16x16.S - convert signed long to fixed16x16 +; +; written by Vangelis Rokas, 2004 +; +; +; $Id: ulong2fps16x16.S 3838 2005-08-10 10:53:34Z tecodev $ +; + + radix dec + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global ___ulong2fps16x16 + +;-------------------------------------------------------- +; Equates to used internal registers +;-------------------------------------------------------- +STATUS equ 0xfd8 +WREG equ 0xfe8 +FSR0L equ 0xfe9 +FSR1L equ 0xfe1 +FSR2L equ 0xfd9 +POSTDEC1 equ 0xfe5 +PREINC1 equ 0xfe4 +PLUSW1 equ 0xfe3 +PRODL equ 0xff3 +PRODH equ 0xff4 + + +S_ulong2fps16x16____ulong2fps16x16 code +___ulong2fps16x16: + + movlw 0x02 + movff PLUSW1, FSR0L + movlw 0x01 + movff PLUSW1, PRODH + + bcf FSR0L, 7 + +@1: + return + + end diff --git a/device/lib/pic16/libsdcc/float/fs2schar.c b/device/lib/pic16/libsdcc/float/fs2schar.c new file mode 100644 index 0000000..387b0c4 --- /dev/null +++ b/device/lib/pic16/libsdcc/float/fs2schar.c @@ -0,0 +1,44 @@ +/*------------------------------------------------------------------------- + fs2schar.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: fs2schar.c 3513 2004-10-01 14:49:51Z vrokas $ +*/ + + +#include + +/* convert float to signed char */ +signed char __fs2schar (float f) _FS_REENTRANT +{ + signed long sl=__fs2slong(f); + if (sl>=CHAR_MAX) + return CHAR_MAX; + if (sl<=CHAR_MIN) + return -CHAR_MIN; + return sl; +} diff --git a/device/lib/pic16/libsdcc/float/fs2sint.c b/device/lib/pic16/libsdcc/float/fs2sint.c new file mode 100644 index 0000000..e6fe0e9 --- /dev/null +++ b/device/lib/pic16/libsdcc/float/fs2sint.c @@ -0,0 +1,45 @@ +/*------------------------------------------------------------------------- + fs2sint.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + + +/* +** $Id: fs2sint.c 3513 2004-10-01 14:49:51Z vrokas $ +*/ + + +#include + +/* convert float to signed int */ +signed int __fs2sint (float f) _FS_REENTRANT +{ + signed long sl=__fs2slong(f); + if (sl>=INT_MAX) + return INT_MAX; + if (sl<=INT_MIN) + return -INT_MIN; + return sl; +} diff --git a/device/lib/pic16/libsdcc/float/fs2slong.c b/device/lib/pic16/libsdcc/float/fs2slong.c new file mode 100644 index 0000000..ef46b6c --- /dev/null +++ b/device/lib/pic16/libsdcc/float/fs2slong.c @@ -0,0 +1,46 @@ +/*------------------------------------------------------------------------- + fs2slong.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: fs2slong.c 3513 2004-10-01 14:49:51Z vrokas $ +*/ + +#include + +/* convert float to signed long */ +signed long __fs2slong (float f) _FS_REENTRANT +{ + + if (!f) + return 0; + + if (f<0) { + return -__fs2ulong(-f); + } else { + return __fs2ulong(f); + } +} diff --git a/device/lib/pic16/libsdcc/float/fs2uchar.c b/device/lib/pic16/libsdcc/float/fs2uchar.c new file mode 100644 index 0000000..cf96371 --- /dev/null +++ b/device/lib/pic16/libsdcc/float/fs2uchar.c @@ -0,0 +1,41 @@ +/*------------------------------------------------------------------------- + fs2uchar.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: fs2uchar.c 3513 2004-10-01 14:49:51Z vrokas $ +*/ + +#include + +/* convert float to unsigned char */ +unsigned char __fs2uchar (float f) _FS_REENTRANT +{ + unsigned long ul=__fs2ulong(f); + if (ul>=UCHAR_MAX) return UCHAR_MAX; + return ul; +} + diff --git a/device/lib/pic16/libsdcc/float/fs2uint.c b/device/lib/pic16/libsdcc/float/fs2uint.c new file mode 100644 index 0000000..1608445 --- /dev/null +++ b/device/lib/pic16/libsdcc/float/fs2uint.c @@ -0,0 +1,43 @@ +/*------------------------------------------------------------------------- + fs2uint.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: fs2uint.c 3513 2004-10-01 14:49:51Z vrokas $ +*/ + +#include + +unsigned long __fs2ulong (float a1); + +/* convert float to unsigned int */ +unsigned int __fs2uint (float f) _FS_REENTRANT +{ + unsigned long ul=__fs2ulong(f); + if (ul>=UINT_MAX) return UINT_MAX; + return ul; +} + diff --git a/device/lib/pic16/libsdcc/float/fs2ulong.c b/device/lib/pic16/libsdcc/float/fs2ulong.c new file mode 100644 index 0000000..16b1462 --- /dev/null +++ b/device/lib/pic16/libsdcc/float/fs2ulong.c @@ -0,0 +1,51 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fs2ulong.c 3711 2005-03-31 16:25:17Z vrokas $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long +{ + float f; + long l; +}; + +#define volatile + +/* convert float to unsigned long */ +unsigned long __fs2ulong (float a1) _FS_REENTRANT +{ + volatile union float_long fl1; + volatile int exp; + volatile long l; + + fl1.f = a1; + + if (!fl1.l || SIGN(fl1.l)) + return (0); + + exp = EXP (fl1.l) - EXCESS - 24; + l = MANT (fl1.l); + + l >>= -exp; + + return l; +} diff --git a/device/lib/pic16/libsdcc/float/fsadd.c b/device/lib/pic16/libsdcc/float/fsadd.c new file mode 100644 index 0000000..2a3c14b --- /dev/null +++ b/device/lib/pic16/libsdcc/float/fsadd.c @@ -0,0 +1,102 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fsadd.c 3513 2004-10-01 14:49:51Z vrokas $ +*/ + +#include + +union float_long + { + float f; + unsigned long l; + }; + +/* add two floats */ +float __fsadd (float a1, float a2) _FS_REENTRANT +{ + volatile long mant1, mant2; + volatile union float_long fl1, fl2; + volatile int exp1, exp2; + volatile unsigned long sign = 0; + + fl1.f = a1; + fl2.f = a2; + + /* check for zero args */ + if (!fl1.l) + return (fl2.f); + if (!fl2.l) + return (fl1.f); + + exp1 = EXP (fl1.l); + exp2 = EXP (fl2.l); + + if (exp1 > exp2 + 25) + return (fl1.f); + if (exp2 > exp1 + 25) + return (fl2.f); + + mant1 = MANT (fl1.l); + mant2 = MANT (fl2.l); + + if (SIGN (fl1.l)) + mant1 = -mant1; + if (SIGN (fl2.l)) + mant2 = -mant2; + + if (exp1 > exp2) + { + mant2 >>= exp1 - exp2; + } + else + { + mant1 >>= exp2 - exp1; + exp1 = exp2; + } + mant1 += mant2; + + if (mant1 < 0) + { + mant1 = -mant1; + sign = SIGNBIT; + } + else if (!mant1) + return (0); + + /* normalize */ + while (mant1>= 1 ; + exp1++; + } + + /* turn off hidden bit */ + mant1 &= ~HIDDEN; + + /* pack up and go home */ + fl1.l = PACK (sign, (unsigned long) exp1, mant1); + + return (fl1.f); +} diff --git a/device/lib/pic16/libsdcc/float/fsdiv.c b/device/lib/pic16/libsdcc/float/fsdiv.c new file mode 100644 index 0000000..2c67512 --- /dev/null +++ b/device/lib/pic16/libsdcc/float/fsdiv.c @@ -0,0 +1,106 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fsdiv.c 4303 2006-07-26 09:21:58Z MaartenBrock $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long + { + float f; + long l; + }; + +/* divide two floats */ +float __fsdiv (float a1, float a2) _FS_REENTRANT +{ + volatile union float_long fl1, fl2; + volatile long result; + volatile unsigned long mask; + volatile long mant1, mant2; + volatile int exp; + char sign; + + fl1.f = a1; + fl2.f = a2; + + /* subtract exponents */ + exp = EXP (fl1.l) ; + exp -= EXP (fl2.l); + exp += EXCESS; + + /* compute sign */ + sign = SIGN (fl1.l) ^ SIGN (fl2.l); + + /* divide by zero??? */ + if (!fl2.l) + {/* return NaN or -NaN */ + fl2.l = 0x7FC00000; + return (fl2.f); + } + + /* numerator zero??? */ + if (!fl1.l) + return (0); + + /* now get mantissas */ + mant1 = MANT (fl1.l); + mant2 = MANT (fl2.l); + + /* this assures we have 25 bits of precision in the end */ + if (mant1 < mant2) + { + mant1 <<= 1; + exp--; + } + + /* now we perform repeated subtraction of fl2.l from fl1.l */ + mask = 0x1000000; + result = 0; + while (mask) + { + if (mant1 >= mant2) + { + result |= mask; + mant1 -= mant2; + } + mant1 <<= 1; + mask >>= 1; + } + + /* round */ + result += 1; + + /* normalize down */ + exp++; + result >>= 1; + + result &= ~HIDDEN; + + /* pack up and go home */ + if (exp >= 0x100) + fl1.l = (sign ? SIGNBIT : 0) | 0x7F800000; + else if (exp < 0) + fl1.l = 0; + else + fl1.l = PACK (sign ? SIGNBIT : 0 , exp, result); + return (fl1.f); +} + diff --git a/device/lib/pic16/libsdcc/float/fseq.c b/device/lib/pic16/libsdcc/float/fseq.c new file mode 100644 index 0000000..838a353 --- /dev/null +++ b/device/lib/pic16/libsdcc/float/fseq.c @@ -0,0 +1,43 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fseq.c 3513 2004-10-01 14:49:51Z vrokas $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long + { + float f; + long l; + }; + +/* compare two floats */ +char __fseq (float a1, float a2) _FS_REENTRANT +{ + volatile union float_long fl1, fl2; + + fl1.f = a1; + fl2.f = a2; + + if (fl1.l == fl2.l) + return (1); + return (0); +} + diff --git a/device/lib/pic16/libsdcc/float/fsgt.c b/device/lib/pic16/libsdcc/float/fsgt.c new file mode 100644 index 0000000..c346ab1 --- /dev/null +++ b/device/lib/pic16/libsdcc/float/fsgt.c @@ -0,0 +1,48 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fsgt.c 3513 2004-10-01 14:49:51Z vrokas $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long + { + float f; + long l; + }; + +/* compare two floats */ +char __fsgt (float a1, float a2) _FS_REENTRANT +{ + volatile union float_long fl1, fl2; + + fl1.f = a1; + fl2.f = a2; + + if (fl1.l<0 && fl2.l<0) { + if (fl2.l > fl1.l) + return (1); + return (0); + } + + if (fl1.l > fl2.l) + return (1); + return (0); +} diff --git a/device/lib/pic16/libsdcc/float/fslt.c b/device/lib/pic16/libsdcc/float/fslt.c new file mode 100644 index 0000000..44f03f3 --- /dev/null +++ b/device/lib/pic16/libsdcc/float/fslt.c @@ -0,0 +1,48 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fslt.c 3513 2004-10-01 14:49:51Z vrokas $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long + { + float f; + long l; + }; + +/* compare two floats */ +char __fslt (float a1, float a2) _FS_REENTRANT +{ + volatile union float_long fl1, fl2; + + fl1.f = a1; + fl2.f = a2; + + if (fl1.l<0 && fl2.l<0) { + if (fl2.l < fl1.l) + return (1); + return (0); + } + + if (fl1.l < fl2.l) + return (1); + return (0); +} diff --git a/device/lib/pic16/libsdcc/float/fsmul.c b/device/lib/pic16/libsdcc/float/fsmul.c new file mode 100644 index 0000000..a7301b9 --- /dev/null +++ b/device/lib/pic16/libsdcc/float/fsmul.c @@ -0,0 +1,86 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fsmul.c 4303 2006-07-26 09:21:58Z MaartenBrock $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long + { + float f; + unsigned long l; + }; + +/* multiply two floats */ +float __fsmul (float a1, float a2) _FS_REENTRANT +{ + volatile union float_long fl1, fl2; + volatile unsigned long result; + volatile int exp; + char sign; + + fl1.f = a1; + fl2.f = a2; + + if (!fl1.l || !fl2.l) + return (0); + + /* compute sign and exponent */ + sign = SIGN (fl1.l) ^ SIGN (fl2.l); + exp = EXP (fl1.l) - EXCESS; + exp += EXP (fl2.l); + + fl1.l = MANT (fl1.l); + fl2.l = MANT (fl2.l); + + /* the multiply is done as one 16x16 multiply and two 16x8 multiples */ + result = (fl1.l >> 8) * (fl2.l >> 8); + result += ((fl1.l & (unsigned long) 0xFF) * (fl2.l >> 8)) >> 8; + result += ((fl2.l & (unsigned long) 0xFF) * (fl1.l >> 8)) >> 8; + + if (result & SIGNBIT) + { + /* round */ + result += 0x80; + result >>= 8; + } + else + { + /* round */ + result += 0x40; + result >>= 7; + exp--; + } + + result &= ~HIDDEN; + + /* pack up and go home */ + if (exp >= 0x100) + fl1.l = (sign ? SIGNBIT : 0) | 0x7F800000; + else if (exp < 0) + fl1.l = 0; + else + fl1.l = PACK (sign ? SIGNBIT : 0 , exp, result); + return (fl1.f); +} + + + + diff --git a/device/lib/pic16/libsdcc/float/fsneq.c b/device/lib/pic16/libsdcc/float/fsneq.c new file mode 100644 index 0000000..e83dcc5 --- /dev/null +++ b/device/lib/pic16/libsdcc/float/fsneq.c @@ -0,0 +1,50 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fsneq.c 3513 2004-10-01 14:49:51Z vrokas $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long + { + float f; + long l; + }; + +/* compare two floats */ +char __fsneq (float a1, float a2) _FS_REENTRANT +{ + volatile union float_long fl1, fl2; + + fl1.f = a1; + fl2.f = a2; + +#if 0 + if (fl1.l<0 && fl2.l<0) + { + fl1.l ^= SIGNBIT; + fl2.l ^= SIGNBIT; + } +#endif + + if (fl1.l == fl2.l) + return (0); + return (1); +} diff --git a/device/lib/pic16/libsdcc/float/fssub.c b/device/lib/pic16/libsdcc/float/fssub.c new file mode 100644 index 0000000..f43ecd8 --- /dev/null +++ b/device/lib/pic16/libsdcc/float/fssub.c @@ -0,0 +1,48 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: fssub.c 3513 2004-10-01 14:49:51Z vrokas $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long + { + float f; + long l; + }; + +/* subtract two floats */ +float __fssub (float a1, float a2) _FS_REENTRANT +{ + volatile union float_long fl1, fl2; + + fl1.f = a1; + fl2.f = a2; + + /* check for zero args */ + if (!fl2.l) + return (fl1.f); + if (!fl1.l) + return (-fl2.f); + + /* twiddle sign bit and add */ + fl2.l ^= SIGNBIT; + return fl1.f + fl2.f; +} diff --git a/device/lib/pic16/libsdcc/float/schar2fs.c b/device/lib/pic16/libsdcc/float/schar2fs.c new file mode 100644 index 0000000..8153b36 --- /dev/null +++ b/device/lib/pic16/libsdcc/float/schar2fs.c @@ -0,0 +1,38 @@ +/*------------------------------------------------------------------------- + schar2fs.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: schar2fs.c 3513 2004-10-01 14:49:51Z vrokas $ +*/ + +#include + +/* convert signed char to float */ +float __schar2fs (signed char sc) _FS_REENTRANT +{ + return __slong2fs(sc); +} diff --git a/device/lib/pic16/libsdcc/float/sint2fs.c b/device/lib/pic16/libsdcc/float/sint2fs.c new file mode 100644 index 0000000..b0d714a --- /dev/null +++ b/device/lib/pic16/libsdcc/float/sint2fs.c @@ -0,0 +1,38 @@ +/*------------------------------------------------------------------------- + sint2fs.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: sint2fs.c 3513 2004-10-01 14:49:51Z vrokas $ +*/ + +#include + +/* convert signed int to float */ +float __sint2fs (signed int si) _FS_REENTRANT +{ + return __slong2fs(si); +} diff --git a/device/lib/pic16/libsdcc/float/slong2fs.c b/device/lib/pic16/libsdcc/float/slong2fs.c new file mode 100644 index 0000000..255d4d3 --- /dev/null +++ b/device/lib/pic16/libsdcc/float/slong2fs.c @@ -0,0 +1,41 @@ +/*------------------------------------------------------------------------- + slong2fs.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: slong2fs.c 3513 2004-10-01 14:49:51Z vrokas $ +*/ + +#include + +/* convert signed long to float */ +float __slong2fs (signed long sl) _FS_REENTRANT +{ + if (sl<0) + return -__ulong2fs(-sl); + else + return __ulong2fs(sl); +} diff --git a/device/lib/pic16/libsdcc/float/uchar2fs.c b/device/lib/pic16/libsdcc/float/uchar2fs.c new file mode 100644 index 0000000..4b42a5c --- /dev/null +++ b/device/lib/pic16/libsdcc/float/uchar2fs.c @@ -0,0 +1,38 @@ +/*------------------------------------------------------------------------- + uchar2fs.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: uchar2fs.c 3513 2004-10-01 14:49:51Z vrokas $ +*/ + +#include + +/* convert unsigned char to float */ +float __uchar2fs (unsigned char uc) _FS_REENTRANT +{ + return __ulong2fs(uc); +} diff --git a/device/lib/pic16/libsdcc/float/uint2fs.c b/device/lib/pic16/libsdcc/float/uint2fs.c new file mode 100644 index 0000000..a1b8de4 --- /dev/null +++ b/device/lib/pic16/libsdcc/float/uint2fs.c @@ -0,0 +1,38 @@ +/*------------------------------------------------------------------------- + uint2fs.c :- + + Adopted for float and pic16 port by + - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +/* +** $Id: uint2fs.c 3513 2004-10-01 14:49:51Z vrokas $ +*/ + +#include + +/* convert unsigned int to float */ +float __uint2fs (unsigned int ui) _FS_REENTRANT +{ + return __ulong2fs(ui); +} diff --git a/device/lib/pic16/libsdcc/float/ulong2fs.c b/device/lib/pic16/libsdcc/float/ulong2fs.c new file mode 100644 index 0000000..d215636 --- /dev/null +++ b/device/lib/pic16/libsdcc/float/ulong2fs.c @@ -0,0 +1,75 @@ +/* +** libgcc support for software floating point. +** Copyright (C) 1991 by Pipeline Associates, Inc. All rights reserved. +** Permission is granted to do *anything* you want with this file, +** commercial or otherwise, provided this message remains intact. So there! +** I would appreciate receiving any updates/patches/changes that anyone +** makes, and am willing to be the repository for said changes (am I +** making a big mistake?). +** +** Pat Wood +** Pipeline Associates, Inc. +** pipeline!phw@motown.com or +** sun!pipeline!phw or +** uunet!motown!pipeline!phw +*/ + +/* +** $Id: ulong2fs.c 3607 2004-12-20 21:48:32Z vrokas $ +*/ + +/* (c)2000/2001: hacked a little by johan.knol@iduna.nl for sdcc */ + +#include + +union float_long + { + float f; + long l; + }; + +float __ulong2fs (unsigned long a ) _FS_REENTRANT +{ + int exp = 24 + EXCESS; + volatile union float_long fl; + + if (!a) + { + return 0.0; + } + + while (a & NORM) + { + // we lose accuracy here + a >>= 1; + exp++; + } + + + if(a < HIDDEN) { + do { + a<<=1; + exp--; + } while (a < HIDDEN); + } + +#if 0 + while (a < HIDDEN) { + a <<= 1; + exp--; + } +#endif + +#if 1 + if ((a&0x7fffff)==0x7fffff) { + a=0; + exp++; + } +#endif + + a &= ~HIDDEN ; + /* pack up and go home */ + fl.l = PACK(0,(unsigned long)exp, a); + + return (fl.f); +} diff --git a/device/lib/pic16/libsdcc/gptr/gptrget1.c b/device/lib/pic16/libsdcc/gptr/gptrget1.c new file mode 100644 index 0000000..4121237 --- /dev/null +++ b/device/lib/pic16/libsdcc/gptr/gptrget1.c @@ -0,0 +1,96 @@ +/*------------------------------------------------------------------------- + + gptrget1.c :- get 1 byte value from generic pointer + + Adopted for pic16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +/* +** $Id: gptrget1.c 3714 2005-04-02 13:13:53Z vrokas $ +*/ + +/* the return value is expected to be in WREG, therefore we choose return + * type void here. Generic pointer is expected to be in WREG:PRODL:FSR0L, + * so function arguments are void, too */ + +extern POSTINC0; +extern POSTINC1; +extern PREINC1; +extern INDF0; +extern FSR0L; +extern FSR0H; +extern WREG; +extern TBLPTRL; +extern TBLPTRH; +extern TBLPTRU; +extern TABLAT; +extern PRODL; + + +void _gptrget1(void) __naked +{ + __asm + /* decode generic pointer MSB (in WREG) bits 6 and 7: + * 00 -> code + * 01 -> EEPROM + * 10 -> data + * 11 -> unimplemented + */ + btfss _WREG, 7 + bra _lab_01_ + + ; data pointer + ; data are already in FSR0 + movff _PRODL, _FSR0H + + movf _POSTINC0, w + + return + + +_lab_01_: + ; code or eeprom + btfsc _WREG, 6 + bra _lab_02_ + + ; code pointer + movff _FSR0L, _TBLPTRL + movff _PRODL, _TBLPTRH + movwf _TBLPTRU + + tblrd*+ + + ; result in WREG + movf _TABLAT, w + + return + +_lab_02_: + ; EEPROM pointer + + ; unimplemented yet + +_end_: + + return + __endasm; +} diff --git a/device/lib/pic16/libsdcc/gptr/gptrget2.c b/device/lib/pic16/libsdcc/gptr/gptrget2.c new file mode 100644 index 0000000..b31290c --- /dev/null +++ b/device/lib/pic16/libsdcc/gptr/gptrget2.c @@ -0,0 +1,99 @@ +/*------------------------------------------------------------------------- + + gptrget2.c :- get 2 byte value from generic pointer + + Adopted for pic16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* +** $Id: gptrget2.c 3714 2005-04-02 13:13:53Z vrokas $ +*/ + +/* the return value is expected to be in WREG:PRODL, therefore we choose return + * type void here. Generic pointer is expected to be in WREG:PRODL:FSR0L, + * so function arguments are void, too */ + +extern POSTINC0; +extern INDF0; +extern FSR0L; +extern FSR0H; +extern WREG; +extern TBLPTRL; +extern TBLPTRH; +extern TBLPTRU; +extern TABLAT; +extern PRODL; + +void _gptrget2(void) __naked +{ + __asm + /* decode generic pointer MSB (in WREG) bits 6 and 7: + * 00 -> code + * 01 -> EEPROM + * 10 -> data + * 11 -> unimplemented + */ + btfss _WREG, 7 + bra _lab_01_ + + /* data pointer */ + /* data are already in FSR0 */ + movff _PRODL, _FSR0H + + movf _POSTINC0, w + movff _POSTINC0, _PRODL + + return + + +_lab_01_: + /* code or eeprom */ + btfsc _WREG, 6 + bra _lab_02_ + + ; code pointer + movff _FSR0L, _TBLPTRL + movff _PRODL, _TBLPTRH + movwf _TBLPTRU + + /* fetch first byte */ + TBLRD*+ + movf _TABLAT, w + + /* fetch second byte */ + TBLRD*+ + movff _TABLAT, _PRODL + + return + + +_lab_02_: + /* EEPROM pointer */ + + /* unimplemented yet */ + +_end_: + + return + __endasm; +} diff --git a/device/lib/pic16/libsdcc/gptr/gptrget3.c b/device/lib/pic16/libsdcc/gptr/gptrget3.c new file mode 100644 index 0000000..02ae491 --- /dev/null +++ b/device/lib/pic16/libsdcc/gptr/gptrget3.c @@ -0,0 +1,103 @@ +/*------------------------------------------------------------------------- + + gptrget3.c :- get 3 byte value from generic pointer + + Adopted for pic16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* +** $Id: gptrget3.c 3714 2005-04-02 13:13:53Z vrokas $ +*/ + +/* the return value is expected to be in WREG:PRODL:PRODH, therefore we choose return + * type void here. Generic pointer is expected to be in WREG:PRODL:FSR0L, + * so function arguments are void, too */ + +extern POSTINC0; +extern INDF0; +extern FSR0L; +extern FSR0H; +extern WREG; +extern TBLPTRL; +extern TBLPTRH; +extern TBLPTRU; +extern TABLAT; +extern PRODL; +extern PRODH; + +void _gptrget3(void) __naked +{ + __asm + /* decode generic pointer MSB (in WREG) bits 6 and 7: + * 00 -> code + * 01 -> EEPROM + * 10 -> data + * 11 -> unimplemented + */ + btfss _WREG, 7 + bra _lab_01_ + + /* data pointer */ + /* data are already in FSR0 */ + movff _PRODL, _FSR0H + + movf _POSTINC0, w + movff _POSTINC0, _PRODL + movff _POSTINC0, _PRODH + + return + + +_lab_01_: + /* code or eeprom */ + btfsc _WREG, 6 + bra _lab_02_ + + ; code pointer + movff _FSR0L, _TBLPTRL + movff _PRODL, _TBLPTRH + movwf _TBLPTRU + + /* fetch first byte */ + TBLRD*+ + movf _TABLAT, w + + /* fetch second byte */ + TBLRD*+ + movff _TABLAT, _PRODL + + /* fetch third byte */ + TBLRD*+ + movff _TABLAT, _PRODH + + return + + +_lab_02_: + /* EEPROM pointer */ + + /* unimplemented yet */ + + return + __endasm; +} diff --git a/device/lib/pic16/libsdcc/gptr/gptrget4.c b/device/lib/pic16/libsdcc/gptr/gptrget4.c new file mode 100644 index 0000000..d75bd7d --- /dev/null +++ b/device/lib/pic16/libsdcc/gptr/gptrget4.c @@ -0,0 +1,108 @@ +/*------------------------------------------------------------------------- + + gptrget4.c :- get 4 byte value from generic pointer + + Adopted for pic16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* +** $Id: gptrget4.c 3714 2005-04-02 13:13:53Z vrokas $ +*/ + +/* the return value is expected to be in WREG:PRODL, therefore we choose return + * type void here. Generic pointer is expected to be in WREG:PRODL:FSR0L, + * so function arguments are void, too */ + +extern POSTINC0; +extern INDF0; +extern FSR0L; +extern FSR0H; +extern WREG; +extern TBLPTRL; +extern TBLPTRH; +extern TBLPTRU; +extern TABLAT; +extern PRODL; +extern PRODH; + +void _gptrget4(void) __naked +{ + __asm + /* decode generic pointer MSB (in WREG) bits 6 and 7: + * 00 -> code + * 01 -> EEPROM + * 10 -> data + * 11 -> unimplemented + */ + btfss _WREG, 7 + bra _lab_01_ + + /* data pointer */ + /* data are already in FSR0 */ + movff _PRODL, _FSR0H + + movf _POSTINC0, w + movff _POSTINC0, _PRODL + movff _POSTINC0, _PRODH + movff _POSTINC0, _FSR0L + + return + + +_lab_01_: + /* code or eeprom */ + btfsc _WREG, 6 + bra _lab_02_ + + ; code pointer + movff _FSR0L, _TBLPTRL + movff _PRODL, _TBLPTRH + movwf _TBLPTRU + + /* fetch first byte */ + TBLRD*+ + movf _TABLAT, w + + /* fetch second byte */ + TBLRD*+ + movff _TABLAT, _PRODL + + /* fetch third byte */ + TBLRD*+ + movff _TABLAT, _PRODH + + /* fetch fourth byte */ + TBLRD*+ + movff _TABLAT, _FSR0L + + return + +_lab_02_: + /* EEPROM pointer */ + + /* unimplemented yet */ + + return + + __endasm; +} diff --git a/device/lib/pic16/libsdcc/gptr/gptrput1.c b/device/lib/pic16/libsdcc/gptr/gptrput1.c new file mode 100644 index 0000000..d6b7232 --- /dev/null +++ b/device/lib/pic16/libsdcc/gptr/gptrput1.c @@ -0,0 +1,84 @@ +/*------------------------------------------------------------------------- + + gptrput1.c :- put 1 byte value at generic pointer + + Adopted for pic16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* +** $Id: gptrput1.c 3714 2005-04-02 13:13:53Z vrokas $ +*/ + +/* write address is expected to be in WREG:PRODL:FSR0L while + * write value is in TBLPTRL:TBLPTRH:PRODH:[stack] */ + +extern POSTINC0; +extern PREINC1; +extern INDF0; +extern FSR0L; +extern FSR0H; +extern WREG; +extern TBLPTRL; +extern TBLPTRH; +extern TBLPTRU; +extern TABLAT; +extern PRODL; +extern PRODH; + +void _gptrput1(void) __naked +{ + __asm + /* decode generic pointer MSB (in WREG) bits 6 and 7: + * 00 -> code (unimplemented) + * 01 -> EEPROM (unimplemented) + * 10 -> data + * 11 -> unimplemented + */ + btfss _WREG, 7 + bra _lab_01_ + + /* data pointer */ + /* data are already in FSR0 */ + movff _PRODL, _FSR0H + + movff _PREINC1, _POSTINC0 + + return + + +_lab_01_: + /* code or eeprom */ + btfss _WREG, 6 + return + + /* code pointer, cannot write code pointers */ + +_lab_02_: + /* EEPROM pointer */ + + /* unimplemented yet */ + + + return + __endasm; +} diff --git a/device/lib/pic16/libsdcc/gptr/gptrput2.c b/device/lib/pic16/libsdcc/gptr/gptrput2.c new file mode 100644 index 0000000..6c4c874 --- /dev/null +++ b/device/lib/pic16/libsdcc/gptr/gptrput2.c @@ -0,0 +1,86 @@ +/*------------------------------------------------------------------------- + + gptrput1.c :- put 2 byte value at generic pointer + + Adopted for pic16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* +** $Id: gptrput2.c 3714 2005-04-02 13:13:53Z vrokas $ +*/ + +/* write address is expected to be in WREG:PRODL:FSR0L while + * write value is in TBLPTRL:TBLPTRH:PRODH:[stack] */ + +extern POSTINC0; +extern PREINC1; +extern INDF0; +extern FSR0L; +extern FSR0H; +extern WREG; +extern TBLPTRL; +extern TBLPTRH; +extern TBLPTRU; +extern TABLAT; +extern PRODL; +extern PRODH; + +void _gptrput2(void) __naked +{ + __asm + /* decode generic pointer MSB (in WREG) bits 6 and 7: + * 00 -> code (unimplemented) + * 01 -> EEPROM (unimplemented) + * 10 -> data + * 11 -> unimplemented + */ + btfss _WREG, 7 + bra _lab_01_ + + /* data pointer */ + /* data are already in FSR0 */ + movff _PRODL, _FSR0H + + movff _PREINC1, _POSTINC0 + movff _PRODH, _POSTINC0 + + return + + +_lab_01_: + /* code or eeprom */ + btfss _WREG, 6 + return + + /* code pointer, cannot write code pointers */ + + +_lab_02_: + /* EEPROM pointer */ + + /* unimplemented yet */ + + + return + __endasm; +} diff --git a/device/lib/pic16/libsdcc/gptr/gptrput3.c b/device/lib/pic16/libsdcc/gptr/gptrput3.c new file mode 100644 index 0000000..8f526cb --- /dev/null +++ b/device/lib/pic16/libsdcc/gptr/gptrput3.c @@ -0,0 +1,87 @@ +/*------------------------------------------------------------------------- + + gptrput3.c :- put 3 byte value at generic pointer + + Adopted for pic16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* +** $Id: gptrput3.c 3714 2005-04-02 13:13:53Z vrokas $ +*/ + +/* write address is expected to be in WREG:FSR0H:FSR0L while + * write value is in TBLPTRH:TBLPTRL:PRODH:[stack] */ + +extern POSTINC0; +extern PREINC1; +extern INDF0; +extern FSR0L; +extern FSR0H; +extern WREG; +extern TBLPTRL; +extern TBLPTRH; +extern TBLPTRU; +extern TABLAT; +extern PRODL; +extern PRODH; + +void _gptrput3(void) __naked +{ + __asm + /* decode generic pointer MSB (in WREG) bits 6 and 7: + * 00 -> code (unimplemented) + * 01 -> EEPROM (unimplemented) + * 10 -> data + * 11 -> unimplemented + */ + btfss _WREG, 7 + bra _lab_01_ + + /* data pointer */ + /* data are already in FSR0 */ + movff _PRODL, _FSR0H + + movff _PREINC1, _POSTINC0 + movff _PRODH, _POSTINC0 + movff _TBLPTRL, _POSTINC0 + + return + + +_lab_01_: + /* code or eeprom */ + btfss _WREG, 6 + return + + /* code pointer, cannot write code pointers */ + + +_lab_02_: + /* EEPROM pointer */ + + /* unimplemented yet */ + + + return + __endasm; +} diff --git a/device/lib/pic16/libsdcc/gptr/gptrput4.c b/device/lib/pic16/libsdcc/gptr/gptrput4.c new file mode 100644 index 0000000..dd7d37d --- /dev/null +++ b/device/lib/pic16/libsdcc/gptr/gptrput4.c @@ -0,0 +1,88 @@ +/*------------------------------------------------------------------------- + + gptrput4.c :- put 4 byte value at generic pointer + + Adopted for pic16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* +** $Id: gptrput4.c 3714 2005-04-02 13:13:53Z vrokas $ +*/ + +/* write address is expected to be in WREG:FSR0H:FSR0L while + * write value is in TBLPTRH:TBLPTRL:PRODH:[stack] */ + +extern POSTINC0; +extern PREINC1; +extern INDF0; +extern FSR0L; +extern FSR0H; +extern WREG; +extern TBLPTRL; +extern TBLPTRH; +extern TBLPTRU; +extern TABLAT; +extern PRODL; +extern PRODH; + +void _gptrput4(void) __naked +{ + __asm + /* decode generic pointer MSB (in WREG) bits 6 and 7: + * 00 -> code (unimplemented) + * 01 -> EEPROM (unimplemented) + * 10 -> data + * 11 -> unimplemented + */ + btfss _WREG, 7 + bra _lab_01_ + + /* data pointer */ + /* data are already in FSR0 */ + movff _PRODL, _FSR0H + + movff _PREINC1, _POSTINC0 + movff _PRODH, _POSTINC0 + movff _TBLPTRL, _POSTINC0 + movff _TBLPTRH, _POSTINC0 + + return + + +_lab_01_: + /* code or eeprom */ + btfss _WREG, 6 + return + + /* code pointer, cannot write code pointers */ + + +_lab_02_: + /* EEPROM pointer */ + + /* unimplemented yet */ + + + return + __endasm; +} diff --git a/device/lib/pic16/libsdcc/int/divsint.c b/device/lib/pic16/libsdcc/int/divsint.c new file mode 100644 index 0000000..21ba08e --- /dev/null +++ b/device/lib/pic16/libsdcc/int/divsint.c @@ -0,0 +1,41 @@ +/*------------------------------------------------------------------------- + _divsint.c :- routine for signed int (16 bit) division. just calls + routine for unsigned division after sign adjustment + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +unsigned unsigned _divuint (unsigned a, unsigned b); + +int _divsint (int a, int b) _IL_REENTRANT +{ + register int r; + + r = _divuint((a < 0 ? -a : a), + (b < 0 ? -b : b)); + if ( (a < 0) ^ (b < 0)) + return -r; + else + return r; +} + diff --git a/device/lib/pic16/libsdcc/int/divuint.c b/device/lib/pic16/libsdcc/int/divuint.c new file mode 100644 index 0000000..892d0e5 --- /dev/null +++ b/device/lib/pic16/libsdcc/int/divuint.c @@ -0,0 +1,53 @@ +/*------------------------------------------------------------------------- + _divuint.c :- routine for unsigned int (16 bit) division + + Ecrit par - Jean-Louis Vern . jlvern@writeme.com (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +#define MSB_SET(x) ((x >> (8*sizeof(x)-1)) & 1) + +unsigned int _divuint (unsigned int a, unsigned int b) _IL_REENTRANT +{ + unsigned int reste = 0; + unsigned char count = 16; + unsigned char c; + + do + { + // reste: a <- 0; + c = MSB_SET(a); + a <<= 1; + reste <<= 1; + if (c) + reste |= 1; + + if (reste >= b) + { + reste -= b; + // a <- (result = 1) + a |= 1; + } + } + while (--count); + return a; +} diff --git a/device/lib/pic16/libsdcc/int/modsint.c b/device/lib/pic16/libsdcc/int/modsint.c new file mode 100644 index 0000000..f326a4d --- /dev/null +++ b/device/lib/pic16/libsdcc/int/modsint.c @@ -0,0 +1,41 @@ +/*------------------------------------------------------------------------- + _modsint.c :- routine for signed int (16 bit) modulus + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +unsigned unsigned _moduint (unsigned a, unsigned b); + +int _modsint (int a, int b) _IL_REENTRANT +{ + register int r; + + r = _moduint((a < 0 ? -a : a), + (b < 0 ? -b : b)); + + if (a < 0) + return -r; + else + return r; +} + diff --git a/device/lib/pic16/libsdcc/int/moduint.c b/device/lib/pic16/libsdcc/int/moduint.c new file mode 100644 index 0000000..0006c9e --- /dev/null +++ b/device/lib/pic16/libsdcc/int/moduint.c @@ -0,0 +1,55 @@ +/*------------------------------------------------------------------------- + _moduint.c :- routine for unsigned int (16 bit) modulus + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + Bug fixes by Martijn van Balen, aed@iae.nl + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +#define MSB_SET(x) ((x >> (8*sizeof(x)-1)) & 1) + +unsigned int _moduint (unsigned int a, unsigned int b) _IL_REENTRANT +{ + unsigned char count = 0; + + + while (!MSB_SET(b)) + { + b <<= 1; + if (b > a) + { + b >>=1; + break; + } + count++; + } + do + { + if (a >= b) + a -= b; + b >>= 1; + } + while (count--); + return a; +} + diff --git a/device/lib/pic16/libsdcc/int/mulint.c b/device/lib/pic16/libsdcc/int/mulint.c new file mode 100644 index 0000000..5979fe6 --- /dev/null +++ b/device/lib/pic16/libsdcc/int/mulint.c @@ -0,0 +1,49 @@ +/*------------------------------------------------------------------------- + _mulint.c :- routine for (unsigned) int (16 bit) multiplication + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + Modified for pic16 port by - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* Signed and unsigned multiplication are the same - as long as the output + has the same precision as the input. +*/ + +#include + +union uu { + struct { unsigned char lo,hi ;} s; + unsigned int t; +} ; + +int _mulint (int a, int b) _IL_REENTRANT +{ + union uu x; + union uu y; + union uu t; + + x.t = a; + y.t = b; + t.t = x.s.lo * y.s.lo; + t.s.hi += (x.s.lo * y.s.hi) + (x.s.hi * y.s.lo); + + return t.t; +} diff --git a/device/lib/pic16/libsdcc/long/divslong.c b/device/lib/pic16/libsdcc/long/divslong.c new file mode 100644 index 0000000..bd99d08 --- /dev/null +++ b/device/lib/pic16/libsdcc/long/divslong.c @@ -0,0 +1,39 @@ +/*------------------------------------------------------------------------- + _divslong.c - routine for division of 32 bit long + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +unsigned long _divulong(unsigned long a, unsigned long b); + +long _divslong (long a, long b) _IL_REENTRANT +{ + long r; + + r = _divulong((a < 0 ? -a : a), + (b < 0 ? -b : b)); + if ( (a < 0) ^ (b < 0)) + return -r; + else + return r; +} diff --git a/device/lib/pic16/libsdcc/long/divulong.c b/device/lib/pic16/libsdcc/long/divulong.c new file mode 100644 index 0000000..1029e83 --- /dev/null +++ b/device/lib/pic16/libsdcc/long/divulong.c @@ -0,0 +1,54 @@ +/*------------------------------------------------------------------------- + _divulong.c - routine for division of 32 bit unsigned long + + Ecrit par - Jean-Louis Vern . jlvern@writeme.com (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +#define MSB_SET(x) ((x >> (8*sizeof(x)-1)) & 1) + +unsigned long _divulong (unsigned long a, unsigned long b) _IL_REENTRANT +{ + unsigned long reste = 0L; + unsigned char count = 32; + unsigned char c; + + do + { + // reste: a <- 0; + c = MSB_SET(a); + a <<= 1; + reste <<= 1; + if (c) + reste |= 1L; + + if (reste >= b) + { + reste -= b; + // a <- (result = 1) + a |= 1L; + } + } + while (--count); + return a; +} + diff --git a/device/lib/pic16/libsdcc/long/modslong.c b/device/lib/pic16/libsdcc/long/modslong.c new file mode 100644 index 0000000..d5459d7 --- /dev/null +++ b/device/lib/pic16/libsdcc/long/modslong.c @@ -0,0 +1,39 @@ +/*------------------------------------------------------------------------- + _modslong.c - routine for modulus of 32 bit signed long + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +unsigned long _modulong (unsigned long a, unsigned long b); + +long _modslong (long a, long b) _IL_REENTRANT +{ + long r; + + r = _modulong((a < 0 ? -a : a), + (b < 0 ? -b : b)); + if (a < 0) + return -r; + else + return r; +} diff --git a/device/lib/pic16/libsdcc/long/modulong.c b/device/lib/pic16/libsdcc/long/modulong.c new file mode 100644 index 0000000..0d13745 --- /dev/null +++ b/device/lib/pic16/libsdcc/long/modulong.c @@ -0,0 +1,54 @@ +/*------------------------------------------------------------------------- + _modulong.c - routine for modulus of 32 bit unsigned long + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + Bug fixes by Martijn van Balen, aed@iae.nl + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +#define MSB_SET(x) ((x >> (8*sizeof(x)-1)) & 1) + +unsigned long _modulong (unsigned long a, unsigned long b) _IL_REENTRANT +{ + unsigned char count = 0; + + while (!MSB_SET(b)) + { + b <<= 1; + if (b > a) + { + b >>=1; + break; + } + count++; + } + do + { + if (a >= b) + a -= b; + b >>= 1; + } + while (count--); + + return a; +} diff --git a/device/lib/pic16/libsdcc/long/mullong.c b/device/lib/pic16/libsdcc/long/mullong.c new file mode 100644 index 0000000..ad14020 --- /dev/null +++ b/device/lib/pic16/libsdcc/long/mullong.c @@ -0,0 +1,118 @@ +/*------------------------------------------------------------------------- + _mullong.c - routine for multiplication of 32 bit (unsigned) long + + Written By - Jean Louis VERN jlvern@writeme.com (1999) + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + Modified for pic16 port by - Vangelis Rokas, vrokas@otenet.gr (2004) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +union bil { + struct {unsigned char b0,b1,b2,b3 ;} b; + struct {unsigned short lo,hi ;} i; + unsigned long l; + struct { unsigned char b0; unsigned short i12; unsigned char b3;} bi; +}; + +#define bcast(x) ((union bil near *)&(x)) + +/* + 3 2 1 0 + X 3 2 1 0 + ---------------------------- + 0.3 0.2 0.1 0.0 + 1.3 1.2 1.1 1.0 + 2.3 2.2 2.1 2.0 + 3.3 3.2 3.1 3.0 + ---------------------------- + |3.3|1.3|0.2|0.0| A + |2.3|0.3|0.1| B + |3.2|1.2|1.0| C + |2.2|1.1| D + |3.1|2.0| E + |2.1| F + |3.0| G + |-------> only this side 32 x 32 -> 32 +*/ + +long _mullong (long a, long b) _IL_REENTRANT +{ +#if 0 + union bil t; + + t.i.hi = bcast(a)->b.b0 * bcast(b)->b.b2; // A + t.i.lo = bcast(a)->b.b0 * bcast(b)->b.b0; // A + t.b.b3 += bcast(a)->b.b3 * + bcast(b)->b.b0; // G + t.b.b3 += bcast(a)->b.b2 * + bcast(b)->b.b1; // F + t.i.hi += bcast(a)->b.b2 * bcast(b)->b.b0; // E <- b lost in .lst + // bcast(a)->i.hi is free ! + t.i.hi += bcast(a)->b.b1 * bcast(b)->b.b1; // D <- b lost in .lst + + bcast(a)->bi.b3 = bcast(a)->b.b1 * + bcast(b)->b.b2; + bcast(a)->bi.i12 = bcast(a)->b.b1 * + bcast(b)->b.b0; // C + + bcast(b)->bi.b3 = bcast(a)->b.b0 * + bcast(b)->b.b3; + bcast(b)->bi.i12 = bcast(a)->b.b0 * + bcast(b)->b.b1; // B + bcast(b)->bi.b0 = 0; // B + bcast(a)->bi.b0 = 0; // C + t.l += a; + + return t.l + b; +#else + + union bil x; + union bil y; + union bil t; + union bil t1, t2; + + x.l = a; + y.l = b; + + t.i.hi = x.b.b0 * y.b.b2; + t.i.lo = x.b.b0 * y.b.b0; + + t.b.b3 += x.b.b3 * y.b.b0; + t.b.b3 += x.b.b2 * y.b.b1; + + t.i.hi += x.b.b2 * y.b.b0; + t.i.hi += x.b.b1 * y.b.b1; + + t1.bi.b3 = x.b.b1 * y.b.b2; + t1.bi.i12 = x.b.b1 * y.b.b0; + + t2.bi.b3 = x.b.b0 * y.b.b3; + t2.bi.i12 = x.b.b0 * y.b.b1; + + t1.bi.b0 = 0; + t2.bi.b0 = 0; + t.l += t1.l; + + return (t.l + t2.l); + +#endif +} diff --git a/device/lib/pic16/libsdcc/lregs/lrrest.c b/device/lib/pic16/libsdcc/lregs/lrrest.c new file mode 100644 index 0000000..4e4a3c0 --- /dev/null +++ b/device/lib/pic16/libsdcc/lregs/lrrest.c @@ -0,0 +1,46 @@ +/*------------------------------------------------------------------------- + + lrrest.c :- restore local registers in stack upon function exit + + Written for pic16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +/* +** $Id: lrrest.c 3835 2005-08-07 20:09:11Z tecodev $ +*/ + +/* FSR0 points to last register to store, WREG holds the register count + */ + +extern PREINC1; +extern POSTDEC0; +extern WREG; + +void _lr_restore(void) __naked +{ + __asm +loop: + movff _PREINC1, _POSTDEC0 + decfsz _WREG, f + bra loop + + return + __endasm; +} diff --git a/device/lib/pic16/libsdcc/lregs/lrst.c b/device/lib/pic16/libsdcc/lregs/lrst.c new file mode 100644 index 0000000..ae48d79 --- /dev/null +++ b/device/lib/pic16/libsdcc/lregs/lrst.c @@ -0,0 +1,46 @@ +/*------------------------------------------------------------------------- + + lrst.c :- store local registers in stack upon function entry + + Written for pic16 port by Vangelis Rokas, 2004 (vrokas@otenet.gr) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +/* +** $Id: lrst.c 3835 2005-08-07 20:09:11Z tecodev $ +*/ + +/* FSR0 points to first register to store, WREG holds the register count + */ + +extern POSTDEC1; +extern POSTINC0; +extern WREG; + +void _lr_store(void) __naked +{ + __asm +loop: + movff _POSTINC0, _POSTDEC1 + decfsz _WREG, f + bra loop + + return + __endasm; +} diff --git a/device/lib/pic16/libsdcc/stack/stack.S b/device/lib/pic16/libsdcc/stack/stack.S new file mode 100644 index 0000000..6f6db36 --- /dev/null +++ b/device/lib/pic16/libsdcc/stack/stack.S @@ -0,0 +1,24 @@ +; +; stack.S - automatically allocate stack for PIC16 targets +; with out the need for using the #pragma stack +; directive +; +; written by Vangelis Rokas, 2006 +; +; object will only be used if and only if #pragma stack is not +; defined in one of the projet's sources + + radix dec + +;-------------------------------------------------------- +; public variables in this module +;-------------------------------------------------------- + global _stack + global _stack_end + +; allocate space for stack +stack_section udata +_stack res 0xff +_stack_end res 1 + + end diff --git a/device/lib/pic16/missing b/device/lib/pic16/missing new file mode 100755 index 0000000..1c8ff70 --- /dev/null +++ b/device/lib/pic16/missing @@ -0,0 +1,367 @@ +#! /bin/sh +# Common stub for a few missing GNU programs while installing. + +scriptversion=2006-05-10.23 + +# Copyright (C) 1996, 1997, 1999, 2000, 2002, 2003, 2004, 2005, 2006 +# Free Software Foundation, Inc. +# Originally by Fran,cois Pinard , 1996. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA +# 02110-1301, USA. + +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + +if test $# -eq 0; then + echo 1>&2 "Try \`$0 --help' for more information" + exit 1 +fi + +run=: +sed_output='s/.* --output[ =]\([^ ]*\).*/\1/p' +sed_minuso='s/.* -o \([^ ]*\).*/\1/p' + +# In the cases where this matters, `missing' is being run in the +# srcdir already. +if test -f configure.ac; then + configure_ac=configure.ac +else + configure_ac=configure.in +fi + +msg="missing on your system" + +case $1 in +--run) + # Try to run requested program, and just exit if it succeeds. + run= + shift + "$@" && exit 0 + # Exit code 63 means version mismatch. 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PROGRAM [ARGUMENT]... + +Handle \`PROGRAM [ARGUMENT]...' for when PROGRAM is missing, or return an +error status if there is no known handling for PROGRAM. + +Options: + -h, --help display this help and exit + -v, --version output version information and exit + --run try to run the given command, and emulate it if it fails + +Supported PROGRAM values: + aclocal touch file \`aclocal.m4' + autoconf touch file \`configure' + autoheader touch file \`config.h.in' + autom4te touch the output file, or create a stub one + automake touch all \`Makefile.in' files + bison create \`y.tab.[ch]', if possible, from existing .[ch] + flex create \`lex.yy.c', if possible, from existing .c + help2man touch the output file + lex create \`lex.yy.c', if possible, from existing .c + makeinfo touch the output file + tar try tar, gnutar, gtar, then tar without non-portable flags + yacc create \`y.tab.[ch]', if possible, from existing .[ch] + +Send bug reports to ." + exit $? + ;; + + -v|--v|--ve|--ver|--vers|--versi|--versio|--version) + echo "missing $scriptversion (GNU Automake)" + exit $? + ;; + + -*) + echo 1>&2 "$0: Unknown \`$1' option" + echo 1>&2 "Try \`$0 --help' for more information" + exit 1 + ;; + +esac + +# Now exit if we have it, but it failed. Also exit now if we +# don't have it and --version was passed (most likely to detect +# the program). +case $1 in + lex|yacc) + # Not GNU programs, they don't have --version. + ;; + + tar) + if test -n "$run"; then + echo 1>&2 "ERROR: \`tar' requires --run" + exit 1 + elif test "x$2" = "x--version" || test "x$2" = "x--help"; then + exit 1 + fi + ;; + + *) + if test -z "$run" && ($1 --version) > /dev/null 2>&1; then + # We have it, but it failed. + exit 1 + elif test "x$2" = "x--version" || test "x$2" = "x--help"; then + # Could not run --version or --help. This is probably someone + # running `$TOOL --version' or `$TOOL --help' to check whether + # $TOOL exists and not knowing $TOOL uses missing. + exit 1 + fi + ;; +esac + +# If it does not exist, or fails to run (possibly an outdated version), +# try to emulate it. +case $1 in + aclocal*) + echo 1>&2 "\ +WARNING: \`$1' is $msg. You should only need it if + you modified \`acinclude.m4' or \`${configure_ac}'. You might want + to install the \`Automake' and \`Perl' packages. Grab them from + any GNU archive site." + touch aclocal.m4 + ;; + + autoconf) + echo 1>&2 "\ +WARNING: \`$1' is $msg. You should only need it if + you modified \`${configure_ac}'. You might want to install the + \`Autoconf' and \`GNU m4' packages. Grab them from any GNU + archive site." + touch configure + ;; + + autoheader) + echo 1>&2 "\ +WARNING: \`$1' is $msg. You should only need it if + you modified \`acconfig.h' or \`${configure_ac}'. You might want + to install the \`Autoconf' and \`GNU m4' packages. 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You should only need it if + you modified a \`.texi' or \`.texinfo' file, or any other file + indirectly affecting the aspect of the manual. The spurious + call might also be the consequence of using a buggy \`make' (AIX, + DU, IRIX). You might want to install the \`Texinfo' package or + the \`GNU make' package. Grab either from any GNU archive site." + # The file to touch is that specified with -o ... + file=`echo "$*" | sed -n "$sed_output"` + test -z "$file" && file=`echo "$*" | sed -n "$sed_minuso"` + if test -z "$file"; then + # ... or it is the one specified with @setfilename ... + infile=`echo "$*" | sed 's/.* \([^ ]*\) *$/\1/'` + file=`sed -n ' + /^@setfilename/{ + s/.* \([^ ]*\) *$/\1/ + p + q + }' $infile` + # ... or it is derived from the source name (dir/f.texi becomes f.info) + test -z "$file" && file=`echo "$infile" | sed 's,.*/,,;s,.[^.]*$,,'`.info + fi + # If the file does not exist, the user really needs makeinfo; + # let's fail without touching anything. + test -f $file || exit 1 + touch $file + ;; + + tar) + shift + + # We have already tried tar in the generic part. + # Look for gnutar/gtar before invocation to avoid ugly error + # messages. + if (gnutar --version > /dev/null 2>&1); then + gnutar "$@" && exit 0 + fi + if (gtar --version > /dev/null 2>&1); then + gtar "$@" && exit 0 + fi + firstarg="$1" + if shift; then + case $firstarg in + *o*) + firstarg=`echo "$firstarg" | sed s/o//` + tar "$firstarg" "$@" && exit 0 + ;; + esac + case $firstarg in + *h*) + firstarg=`echo "$firstarg" | sed s/h//` + tar "$firstarg" "$@" && exit 0 + ;; + esac + fi + + echo 1>&2 "\ +WARNING: I can't seem to be able to run \`tar' with the given arguments. + You may want to install GNU tar or Free paxutils, or check the + command line arguments." + exit 1 + ;; + + *) + echo 1>&2 "\ +WARNING: \`$1' is needed, and is $msg. + You might have modified some files without having the + proper tools for further handling them. Check the \`README' file, + it often tells you about the needed prerequisites for installing + this package. You may also peek at any GNU archive site, in case + some other package would contain this missing \`$1' program." + exit 1 + ;; +esac + +exit 0 + +# Local variables: +# eval: (add-hook 'write-file-hooks 'time-stamp) +# time-stamp-start: "scriptversion=" +# time-stamp-format: "%:y-%02m-%02d.%02H" +# time-stamp-end: "$" +# End: diff --git a/device/lib/pic16/pics.all b/device/lib/pic16/pics.all new file mode 100644 index 0000000..1ff8ed9 --- /dev/null +++ b/device/lib/pic16/pics.all @@ -0,0 +1,106 @@ +242 +248 +252 +258 + +442 +448 +452 +458 + +1220 +1320 + +2220 +2221 +2320 +2321 +2331 +23k20 +2410 +2420 +2423 +2431 +2450 +2455 +2480 +24j10 +24k20 +2510 +2515 +2520 +2523 +2525 +2550 +2580 +2585 +25j10 +25k20 +2610 +2620 +2680 +2682 +2685 +26k20 + +4220 +4221 +4320 +4321 +4331 +43k20 +4410 +4420 +4423 +4431 +4450 +4455 +4480 +44j10 +44k20 +4510 +4515 +4520 +4523 +4525 +4550 +4580 +4585 +45j10 +45k20 +4610 +4620 +4680 +4682 +4685 +46k20 + +6520 +6585 +65j50 +6620 +6680 +66j50 +66j55 +66j60 +66j65 +6720 +67j50 +67j60 + +8520 +8585 +85j50 +8620 +8680 +86j50 +86j55 +86j60 +86j65 +8720 +87j50 +87j60 + +96j60 +96j65 +97j60 diff --git a/device/lib/pic16/startup/Makefile.am b/device/lib/pic16/startup/Makefile.am new file mode 100644 index 0000000..8778c0e --- /dev/null +++ b/device/lib/pic16/startup/Makefile.am @@ -0,0 +1,14 @@ +## Makefile.am -- Process this file with automake to produce Makefile.in + +# Dummy libs to generate crt0*.o +noinst_LIBRARIES = libcrt0.a libcrt0i.a libcrt0iz.a +libcrt0_a_SOURCES = crt0.c +libcrt0i_a_SOURCES = crt0i.c +libcrt0iz_a_SOURCES = crt0iz.c + +# Force installation of .o files into $libdir +crtdir = $(libdir) +crt_DATA = crt0.o crt0i.o crt0iz.o + +include $(top_srcdir)/Makefile.common + diff --git a/device/lib/pic16/startup/Makefile.in b/device/lib/pic16/startup/Makefile.in new file mode 100644 index 0000000..e35ca9c --- /dev/null +++ b/device/lib/pic16/startup/Makefile.in @@ -0,0 +1,475 @@ +# Makefile.in generated by automake 1.10 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +# 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +# This Makefile.in is free software; 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you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2, or (at your option) any + * later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * In other words, you are welcome to use, share and improve this program. + * You are forbidden to forbid anyone else to use, share and improve + * what you give them. Help stamp out software-hoarding! + * + * $Id: crt0.c 5183 2008-05-26 18:55:44Z tecodev $ + */ + +extern stack_end; +extern TBLPTRU; + +/* external reference to the user's main routine */ +extern void main (void); + +void _entry (void) __naked __interrupt 0; +void _startup (void) __naked; + +/* Access bank selector. */ +#define a 0 + + +/* + * entry function, placed at interrupt vector 0 (RESET) + */ +void _entry (void) __naked __interrupt 0 +{ + __asm + goto __startup + __endasm; +} + +void _startup (void) __naked +{ + __asm + ; Initialize the stack pointer + lfsr 1, _stack_end + lfsr 2, _stack_end + + ; 1st silicon does not do this on POR + clrf _TBLPTRU, a + + ; Initialize the flash memory access configuration. + ; This is harmless for non-flash devices, so we do it on all parts. + bsf 0xa6, 7, a ; EECON1.EEPGD = 1, TBLPTR accesses program memory + bcf 0xa6, 6, a ; EECON1.CFGS = 0, TBLPTR accesses program memory + __endasm; + + /* Call the main routine. */ + main(); + + __asm +lockup: + ; Returning from main will lock up. + bra lockup + __endasm; +} + diff --git a/device/lib/pic16/startup/crt0i.c b/device/lib/pic16/startup/crt0i.c new file mode 100644 index 0000000..40f7546 --- /dev/null +++ b/device/lib/pic16/startup/crt0i.c @@ -0,0 +1,254 @@ +/* + * crt0i.c - SDCC pic16 port runtime start code with + * initialisation + * + * Converted for SDCC and pic16 port + * by Vangelis Rokas (vrokas@otenet.gr) + * + * based on Microchip MPLAB-C18 startup files + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2, or (at your option) any + * later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * In other words, you are welcome to use, share and improve this program. + * You are forbidden to forbid anyone else to use, share and improve + * what you give them. Help stamp out software-hoarding! + * + * $Id: crt0i.c 5183 2008-05-26 18:55:44Z tecodev $ + */ + +extern stack_end; +extern TBLPTRU; +extern TBLPTRH; +extern TBLPTRL; +extern FSR0L; +extern FSR0H; +extern TABLAT; +extern POSTINC0; + + +#if 1 +/* global variable for forcing gplink to add _cinit section */ +char __uflags = 0; +#endif + +/* external reference to the user's main routine */ +extern void main (void); + +void _entry (void) __naked __interrupt 0; +void _startup (void) __naked; +void _do_cinit (void) __naked; + +/* Access bank selector. */ +#define a 0 + + +/* + * entry function, placed at interrupt vector 0 (RESET) + */ +void _entry (void) __naked __interrupt 0 +{ + __asm + goto __startup + __endasm; +} + +void _startup (void) __naked +{ + __asm + ; Initialize the stack pointer + lfsr 1, _stack_end + lfsr 2, _stack_end + + ; 1st silicon does not do this on POR + clrf _TBLPTRU, a + + ; Initialize the flash memory access configuration. + ; This is harmless for non-flash devices, so we do it on all parts. + bsf 0xa6, 7, a ; EECON1.EEPGD = 1, TBLPTR accesses program memory + bcf 0xa6, 6, a ; EECON1.CFGS = 0, TBLPTR accesses program memory + __endasm; + + /* Initialize global and/or static variables. */ + _do_cinit(); + + /* Call the main routine. */ + main(); + + __asm +lockup: + ; Returning from main will lock up. + bra lockup + __endasm; +} + + +/* the cinit table will be filled by the linker */ +extern __code struct { + unsigned short num_init; + struct { + unsigned long from; + unsigned long to; + unsigned long size; + } entries[1]; +} cinit; + + +#define TBLRDPOSTINC tblrd*+ + +#define prom 0x00 /* 0x00 0x01 0x02*/ +#define curr_byte 0x03 /* 0x03 0x04 */ +#define curr_entry 0x05 /* 0x05 0x06 */ +#define data_ptr 0x07 /* 0x07 0x08 0x09 */ + +/* the variable initialisation routine */ +void _do_cinit (void) __naked +{ + /* + * access registers 0x00 - 0x09 are not saved in this function + */ + __asm + ; TBLPTR = &cinit + movlw low(_cinit) + movwf _TBLPTRL, a + movlw high(_cinit) + movwf _TBLPTRH, a + movlw upper(_cinit) + movwf _TBLPTRU, a + + ; curr_entry = cinit.num_init + TBLRDPOSTINC + movf _TABLAT, w, a + movwf curr_entry, a + + TBLRDPOSTINC + movf _TABLAT, w, a + movwf curr_entry + 1, a + + ; while (curr_entry) + movf curr_entry, w, a +test: + bnz cont1 + movf curr_entry + 1, w, a + bz done + +cont1: + ; Count down so we only have to look up the data in _cinit once. + + ; At this point we know that TBLPTR points to the top of the current + ; entry in _cinit, so we can just start reading the from, to, and + ; size values. + + ; read the source address low + TBLRDPOSTINC + movf _TABLAT, w, a + movwf prom, a + + ; source address high + TBLRDPOSTINC + movf _TABLAT, w, a + movwf prom + 1, a + + ; source address upper + TBLRDPOSTINC + movf _TABLAT, w, a + movwf prom + 2, a + + ; skip a byte since it is stored as a 32bit int + TBLRDPOSTINC + + ; read the destination address directly into FSR0 + ; destination address low + TBLRDPOSTINC + movf _TABLAT, w, a + movwf _FSR0L, a + + ; destination address high + TBLRDPOSTINC + movf _TABLAT, w, a + movwf _FSR0H, a + + ; skip two bytes since it is stored as a 32bit int + TBLRDPOSTINC + TBLRDPOSTINC + + ; read the size of data to transfer to destination address + TBLRDPOSTINC + movf _TABLAT, w, a + movwf curr_byte, a + + TBLRDPOSTINC + movf _TABLAT, w, a + movwf curr_byte + 1, a + + ; skip two bytes since it is stored as a 32bit int + TBLRDPOSTINC + TBLRDPOSTINC + + ; prom = data_ptr->from; + ; FSR0 = data_ptr->to; + ; curr_byte = (unsigned short) data_ptr->size; + + ; the table pointer now points to the next entry. Save it + ; off since we will be using the table pointer to do the copying + ; for the entry + + ; data_ptr = TBLPTR + movff _TBLPTRL, data_ptr + movff _TBLPTRH, data_ptr + 1 + movff _TBLPTRU, data_ptr + 2 + + ; now assign the source address to the table pointer + ; TBLPTR = prom + movff prom, _TBLPTRL + movff prom + 1, _TBLPTRH + movff prom + 2, _TBLPTRU + + ; while (curr_byte) + movf curr_byte, w, a +copy_loop: + bnz copy_one_byte + movf curr_byte + 1, w, a + bz done_copying + +copy_one_byte: + TBLRDPOSTINC + movf _TABLAT, w, a + movwf _POSTINC0, a + + ; decrement byte counter + decf curr_byte, f, a + bc copy_loop + decf curr_byte + 1, f, a + bra copy_one_byte + +done_copying: + ; restore the table pointer for the next entry + ; TBLPTR = data_ptr + movff data_ptr, _TBLPTRL + movff data_ptr + 1, _TBLPTRH + movff data_ptr + 2, _TBLPTRU + + ; decrement entry counter + decf curr_entry, f, a + bc test + decf curr_entry + 1, f, a + bra cont1 + + ; emit done label +done: + return + __endasm; +} + diff --git a/device/lib/pic16/startup/crt0iz.c b/device/lib/pic16/startup/crt0iz.c new file mode 100644 index 0000000..1c54a11 --- /dev/null +++ b/device/lib/pic16/startup/crt0iz.c @@ -0,0 +1,270 @@ +/* + * crt0iz.c - SDCC pic16 port runtime start code with + * initialisation and clear RAM + * + * Converted for SDCC and pic16 port + * by Vangelis Rokas (vrokas@otenet.gr) + * + * based on Microchip MPLAB-C18 startup files + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2, or (at your option) any + * later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * In other words, you are welcome to use, share and improve this program. + * You are forbidden to forbid anyone else to use, share and improve + * what you give them. Help stamp out software-hoarding! + * + * $Id: crt0iz.c 5183 2008-05-26 18:55:44Z tecodev $ + */ + +extern stack_end; +extern TBLPTRU; +extern TBLPTRH; +extern TBLPTRL; +extern FSR0L; +extern FSR0H; +extern TABLAT; +extern POSTINC0; +extern POSTDEC0; + +#if 1 +/* global variable for forcing gplink to add _cinit section */ +char __uflags = 0; +#endif + +/* external reference to the user's main routine */ +extern void main (void); + +void _entry (void) __naked __interrupt 0; +void _startup (void) __naked; +void _do_cinit (void) __naked; + +/* Access bank selector. */ +#define a 0 + + +/* + * entry function, placed at interrupt vector 0 (RESET) + */ +void _entry (void) __naked __interrupt 0 +{ + __asm + goto __startup + __endasm; +} + +void _startup (void) __naked +{ + __asm + ; Initialize the stack pointer + lfsr 1, _stack_end + lfsr 2, _stack_end + + ; 1st silicon does not do this on POR + clrf _TBLPTRU, a + + ; Initialize the flash memory access configuration. + ; This is harmless for non-flash devices, so we do it on all parts. + bsf 0xa6, 7, a ; EECON1.EEPGD = 1, TBLPTR accesses program memory + bcf 0xa6, 6, a ; EECON1.CFGS = 0, TBLPTR accesses program memory + __endasm; + + /* cleanup the RAM */ + __asm + ; Load FSR0 with top of RAM. + setf _FSR0L, a + movlw 0x0e + movwf _FSR0H, a + + ; Place 0xff at address 0x00 as a sentinel. + setf 0x00, a + +clear_loop: + clrf _POSTDEC0, a + movf 0x00, w, a + bnz clear_loop + __endasm; + + /* Initialize global and/or static variables. */ + _do_cinit(); + + /* Call the main routine. */ + main(); + + __asm +lockup: + ; Returning from main will lock up. + bra lockup + __endasm; +} + + +/* the cinit table will be filled by the linker */ +extern __code struct { + unsigned short num_init; + struct { + unsigned long from; + unsigned long to; + unsigned long size; + } entries[1]; +} cinit; + + +#define TBLRDPOSTINC tblrd*+ + +#define prom 0x00 /* 0x00 0x01 0x02*/ +#define curr_byte 0x03 /* 0x03 0x04 */ +#define curr_entry 0x05 /* 0x05 0x06 */ +#define data_ptr 0x07 /* 0x07 0x08 0x09 */ + +/* the variable initialisation routine */ +void _do_cinit (void) __naked +{ + /* + * access registers 0x00 - 0x09 are not saved in this function + */ + __asm + ; TBLPTR = &cinit + movlw low(_cinit) + movwf _TBLPTRL, a + movlw high(_cinit) + movwf _TBLPTRH, a + movlw upper(_cinit) + movwf _TBLPTRU, a + + ; curr_entry = cinit.num_init + TBLRDPOSTINC + movf _TABLAT, w, a + movwf curr_entry, a + + TBLRDPOSTINC + movf _TABLAT, w, a + movwf curr_entry + 1, a + + ; while (curr_entry) + movf curr_entry, w, a +test: + bnz cont1 + movf curr_entry + 1, w, a + bz done + +cont1: + ; Count down so we only have to look up the data in _cinit once. + + ; At this point we know that TBLPTR points to the top of the current + ; entry in _cinit, so we can just start reading the from, to, and + ; size values. + + ; read the source address low + TBLRDPOSTINC + movf _TABLAT, w, a + movwf prom, a + + ; source address high + TBLRDPOSTINC + movf _TABLAT, w, a + movwf prom + 1, a + + ; source address upper + TBLRDPOSTINC + movf _TABLAT, w, a + movwf prom + 2, a + + ; skip a byte since it is stored as a 32bit int + TBLRDPOSTINC + + ; read the destination address directly into FSR0 + ; destination address low + TBLRDPOSTINC + movf _TABLAT, w, a + movwf _FSR0L, a + + ; destination address high + TBLRDPOSTINC + movf _TABLAT, w, a + movwf _FSR0H, a + + ; skip two bytes since it is stored as a 32bit int + TBLRDPOSTINC + TBLRDPOSTINC + + ; read the size of data to transfer to destination address + TBLRDPOSTINC + movf _TABLAT, w, a + movwf curr_byte, a + + TBLRDPOSTINC + movf _TABLAT, w, a + movwf curr_byte + 1, a + + ; skip two bytes since it is stored as a 32bit int + TBLRDPOSTINC + TBLRDPOSTINC + + ; prom = data_ptr->from; + ; FSR0 = data_ptr->to; + ; curr_byte = (unsigned short) data_ptr->size; + + ; the table pointer now points to the next entry. Save it + ; off since we will be using the table pointer to do the copying + ; for the entry + + ; data_ptr = TBLPTR + movff _TBLPTRL, data_ptr + movff _TBLPTRH, data_ptr + 1 + movff _TBLPTRU, data_ptr + 2 + + ; now assign the source address to the table pointer + ; TBLPTR = prom + movff prom, _TBLPTRL + movff prom + 1, _TBLPTRH + movff prom + 2, _TBLPTRU + + ; while (curr_byte) + movf curr_byte, w, a +copy_loop: + bnz copy_one_byte + movf curr_byte + 1, w, a + bz done_copying + +copy_one_byte: + TBLRDPOSTINC + movf _TABLAT, w, a + movwf _POSTINC0, a + + ; decrement byte counter + decf curr_byte, f, a + bc copy_loop + decf curr_byte + 1, f, a + bra copy_one_byte + +done_copying: + ; restore the table pointer for the next entry + ; TBLPTR = data_ptr + movff data_ptr, _TBLPTRL + movff data_ptr + 1, _TBLPTRH + movff data_ptr + 2, _TBLPTRU + + ; decrement entry counter + decf curr_entry, f, a + bc test + decf curr_entry + 1, f, a + bra cont1 + + ; emit done label +done: + return + __endasm; +} + diff --git a/device/lib/powf.c b/device/lib/powf.c new file mode 100644 index 0000000..ef78f58 --- /dev/null +++ b/device/lib/powf.c @@ -0,0 +1,31 @@ +/* powf.c: Computes x**y where x and y are 32-bit floats. + WARNING: less that 6 digits accuracy. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +#include +#include + +float powf(const float x, const float y) +{ + if(y == 0.0) return 1.0; + if(y==1.0) return x; + if(x <= 0.0) return 0.0; + return expf(logf(x) * y); +} diff --git a/device/lib/printf_fast.c b/device/lib/printf_fast.c new file mode 100644 index 0000000..3e20d34 --- /dev/null +++ b/device/lib/printf_fast.c @@ -0,0 +1,1711 @@ +/* Fast printf routine for use with sdcc/mcs51 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +/******************************************************************/ +/** **/ +/** Major features. These determine what capabilities your **/ +/** compiled printf_fast will have. **/ +/** **/ +/******************************************************************/ + +// Include support for 32 bit base 10 integers (%ld and %lu). Without +// this, you won't be able to print 32 bit integers as base 10. They +// will appear in hexadecimal. +#define LONG + +// Include support for floating point numbers (%f). Don't forget to +// enable LONG above, if you want to print floats greater than +// 65535.997. You can have 6 good digits after the decimal point, +// or an 8th if a small error is ok. +/- 2^32 to 1/10^8 isn't the +// full dynamic range of 32 bit floats, but it covers the most +// commonly used range. Adds about 500-600 bytes of code. +//#define FLOAT + +// Include support for minimum field widths (%8d, %20s, %12.5f) +#define FIELD_WIDTH + +// Include fast integer conversion. Without this, a compact but slower +// algorithm is used to convert integers (%d, %u, int part of %f). +// Even the slow algorithm is much faster than a typical C implementation +// based on repetitive division by 10. If you enable this, you get an +// extremely fast version (only 8 table lookups and 8 adds to convert a +// 32 bit integer), but it costs extra code space for larger lookup +// tables and optimized non-looping code. +#define FAST_INTEGER + + +/******************************************************************/ +/** **/ +/** Minor tweaks. These provide small code savings, with **/ +/** a partial loss of functionality. **/ +/** **/ +/******************************************************************/ + + +// If you enabled FLOAT, enabling this replaces the normal %f float +// output with a very compact version that always prints 4 fractional +// digits and does not have round off. Zero will print as "0.0000", +// and 1.999997 will print as "1.9999" (not rounded up to 2). The +// 4th digit is not accurate (+/- 2). This simpler version also +// avoids using 5 bytes of internal data memory. Code size is about +// 240 bytes less. +//#define FLOAT_FIXED4 + +// If you used FLOAT (not FLOAT_FIXED4), this will remove the smart +// default number of digits code. When you use "%f" without a field +// width, normally the smart default width code chooses a good number +// of digits based on size of the number. If you enabled FIELD_WIDTH +// and use a number, like "%.5f", this smart default code is never +// used anyway. Saves about 40 bytes of code. +//#define FLOAT_DEFAULT_FRAC_DIGITS 6 + +// If you used FLOAT (not FLOAT_FIXED4) and you do not specify a +// field width, normally trailing zeros are trimmed. Using this +// removes that feature (saves only a few bytes). +//#define DO_NOT_TRIM_TRAILING_ZEROS + +// Omit saving and restoring registers when calling putchar(). If you +// are desparate for a little more code space, this will give you a +// small savings. You MUST define putchar() with #pragma callee_saves, +// or implement it in assembly and avoid changing the registers. +//#define PUTCHAR_CALLEE_SAVES + + +/* extern void putchar(char ); */ + +// Warning: using static/global variables makes these functions NON-reentrant! +// reentrant keyword is only used for parameter passing method + +static __bit long_flag, short_flag, print_zero_flag, negative_flag; + +#ifdef FIELD_WIDTH +static __bit field_width_flag; +static __bit leading_zero_flag; +static __data unsigned char field_width; +#endif + +#ifdef FLOAT +#define SDCC_FLOAT_LIB +#include +static __bit continue_float; +#ifndef FLOAT_FIXED4 +static __data unsigned char frac_field_width; +static __data unsigned char float_frac_bcd[4]; +// TODO: can float_frac_bcd be overlaid with temps used by trig functions +#endif +#endif + +#ifndef FAST_INTEGER +#ifdef LONG +static __data unsigned int i2bcd_tmp; // slow 32 int conversion needs temp space +#endif +#endif + + +#ifndef PRINTF_FAST +#define PRINTF_FAST printf_fast +#endif + + +#if !defined(SDCC_mcs51) || defined(SDCC_USE_XSTACK) || defined(_SDCC_NO_ASM_LIB_FUNCS) +// Does printf_fast really work on ds390 and ds400? +// If it does, enable them in the line above +#if defined(SDCC_USE_XSTACK) +#warning "printf_fast not built, does not support --xstack" +#elif defined(_SDCC_NO_ASM_LIB_FUNCS) +#warning "printf_fast not built, _SDCC_NO_ASM_LIB_FUNCS defined" +#endif +#else // defines are compatible with printf_fast + + +void PRINTF_FAST(__code char *fmt, ...) __reentrant +{ + fmt; /* suppress unreferenced variable warning */ + + __asm + +printf_begin: + mov a, _bp // r0 will point to va_args (stack) + add a, #253 + mov r0, a // r0 points to MSB of fmt + mov dph, @r0 + dec r0 + mov dpl, @r0 // dptr has address of fmt + dec r0 + +printf_main_loop: + clr a + movc a, @a+dptr // get next byte of fmt string + inc dptr + //cjne a, #'%', printf_normal + cjne a, #37, printf_normal + +printf_format: + clr _long_flag + clr _short_flag + clr _print_zero_flag + clr _negative_flag +#ifdef FIELD_WIDTH + clr _field_width_flag + clr _leading_zero_flag + mov r1, #_field_width + mov @r1, #0 +#endif +#ifdef FLOAT + clr _continue_float +#endif + +printf_format_loop: + clr a + movc a, @a+dptr // get next byte of data format + inc dptr + + /* parse and consume the field width digits, even if */ + /* we don't build the code to make use of them */ + add a, #198 + jc printf_nondigit1 + add a, #10 + jnc printf_nondigit2 +#ifdef FIELD_WIDTH +printf_digit: + jnz printf_digit_2 + cjne a, _field_width, printf_digit_2 + setb _leading_zero_flag +printf_digit_2: + setb _field_width_flag + mov r2, a + mov a, @r1 + mov b, #10 + mul ab + add a, r2 + mov @r1, a +#endif + sjmp printf_format_loop +printf_nondigit1: + add a, #10 +printf_nondigit2: + add a, #48 + +printf_format_l: + //cjne a, #'l', printf_format_h + cjne a, #108, printf_format_h + setb _long_flag + sjmp printf_format_loop + +printf_format_h: + //cjne a, #'h', printf_format_s + cjne a, #104, printf_format_s + setb _short_flag + sjmp printf_format_loop + +printf_format_s: + //cjne a, #'s', printf_format_d + cjne a, #115, printf_format_d + ljmp printf_string + +printf_format_d: + //cjne a, #'d', printf_format_u + cjne a, #100, printf_format_u + lcall printf_get_int + ljmp printf_int + +printf_format_u: + //cjne a, #'u', printf_format_c + cjne a, #117, printf_format_c + lcall printf_get_int + ljmp printf_uint + +printf_format_c: + //cjne a, #'c', printf_format_x + cjne a, #99, printf_format_x + dec r0 + mov a, @r0 // Acc has the character to print + dec r0 + sjmp printf_char + +printf_format_x: + //cjne a, #'x', printf_format_f + cjne a, #120, printf_format_f + ljmp printf_hex + +printf_format_f: +#ifdef FLOAT + //cjne a, #'f', printf_format_dot + cjne a, #102, printf_format_dot + ljmp print_float +#endif + +printf_format_dot: + //cjne a, #'.', printf_normal + cjne a, #46, printf_normal +#ifdef FLOAT +#ifdef FLOAT_FIXED4 + mov r1, #ar3 // parse frac field, but discard if FIXED4 +#else + mov r1, #_frac_field_width + mov @r1, #0 +#endif +#endif + sjmp printf_format_loop + +printf_normal: + jz printf_eot +printf_char: + lcall printf_putchar + ljmp printf_main_loop + +printf_eot: + ljmp printf_end + + + /* print a string... just grab each byte with __gptrget */ + /* the user much pass a 24 bit generic pointer */ + +printf_string: + push dph // save addr in fmt onto stack + push dpl + mov b, @r0 // b has type of address (generic *) + dec r0 + mov dph, @r0 + dec r0 + mov dpl, @r0 // dptr has address of user's string + dec r0 + +#ifdef FIELD_WIDTH + jnb _field_width_flag, printf_str_loop + clr _leading_zero_flag // never leading zeros for strings + push dpl + push dph +printf_str_fw_loop: + lcall __gptrget + jz printf_str_space + inc dptr + dec _field_width + mov a, _field_width + jnz printf_str_fw_loop +printf_str_space: + lcall printf_space + pop dph + pop dpl +#endif // FIELD_WIDTH + +printf_str_loop: + lcall __gptrget + jz printf_str_done + inc dptr + lcall printf_putchar + sjmp printf_str_loop +printf_str_done: + pop dpl // restore addr withing fmt + pop dph + ljmp printf_main_loop + + + /* printing in hex is easy because sdcc pushes the LSB first */ + +printf_hex: + lcall printf_hex8 + jb _short_flag, printf_hex_end + lcall printf_hex8 + jnb _long_flag, printf_hex_end + lcall printf_hex8 + lcall printf_hex8 +printf_hex_end: + lcall printf_zero + ljmp printf_main_loop +printf_hex8: + mov a, @r0 + lcall printf_phex_msn + mov a, @r0 + dec r0 + ljmp printf_phex_lsn + + +#ifndef LONG +printf_ld_in_hex: + //mov a, #'0' + mov a, #48 + lcall printf_putchar + //mov a, #'x' + mov a, #120 + lcall printf_putchar + mov a, r0 + add a, #4 + mov r0, a + sjmp printf_hex +#endif + + + /* printing an integer is not so easy. For a signed int */ + /* check if it is negative and print the minus sign and */ + /* invert it to a positive integer */ + +printf_int: + mov a, r5 + jnb acc.7, printf_uint /* check if negative */ + setb _negative_flag + mov a, r1 /* invert integer */ + cpl a + add a, #1 + mov r1, a + jb _short_flag, printf_uint + mov a, r2 + cpl a + addc a, #0 + mov r2, a + jnb _long_flag, printf_uint + mov a, r3 + cpl a + addc a, #0 + mov r3, a + mov a, r4 + cpl a + addc a, #0 + mov r4, a + + + /* printing integers is a lot of work... because it takes so */ + /* long, the first thing to do is make sure we're doing as */ + /* little work as possible, then convert the binary int to */ + /* packed BCD, and finally print each digit of the BCD number */ + +printf_uint: + + jb _short_flag, printf_uint_ck8 + jnb _long_flag, printf_uint_ck16 +printf_uint_ck32: + /* it's a 32 bit int... but if the upper 16 bits are zero */ + /* we can treat it like a 16 bit integer and convert much faster */ +#ifdef LONG + mov a, r3 + jnz printf_uint_begin + mov a, r4 + jnz printf_uint_begin +#else + mov a, r3 + jnz printf_ld_in_hex // print long integer as hex + mov a, r4 // rather than just the low 16 bits + jnz printf_ld_in_hex +#endif + clr _long_flag +printf_uint_ck16: + /* it's a 16 bit int... but if the upper 8 bits are zero */ + /* we can treat it like a 8 bit integer and convert much faster */ + mov a, r2 + jnz printf_uint_begin + setb _short_flag +printf_uint_ck8: + /* it's an 8 bit int... if it's zero, it's a lot faster to just */ + /* print the digit zero and skip all the hard work! */ + mov a, r1 + jnz printf_uint_begin +#ifdef FLOAT + /* never use the "just print zero" shortcut if we're printing */ + /* the integer part of a float (fixes bug 1255403) */ + jb _continue_float, printf_uint_begin +#endif +#ifdef FIELD_WIDTH + jnb _field_width_flag, printf_uint_zero + mov a, _field_width + jz printf_uint_zero + dec _field_width + lcall printf_space +#endif +printf_uint_zero: + //mov a, #'0' + mov a, #48 + lcall printf_putchar + ljmp printf_main_loop + +printf_uint_begin: + push dpl + push dph + lcall printf_int2bcd // bcd number in r3/r2/r7/r6/r5 +printf_uint_2: + +#ifdef FIELD_WIDTH + jnb _field_width_flag, printf_uifw_end +#ifdef LONG +printf_uifw_32: + mov r1, #10 + jnb _long_flag, printf_uifw_16 + mov a, r3 + anl a, #0xF0 + jnz printf_uifw_sub + dec r1 + mov a, r3 + anl a, #0x0F + jnz printf_uifw_sub + dec r1 + mov a, r2 + anl a, #0xF0 + jnz printf_uifw_sub + dec r1 + mov a, r2 + anl a, #0x0F + jnz printf_uifw_sub + dec r1 + mov a, r7 + anl a, #0xF0 + jnz printf_uifw_sub +#endif // LONG +printf_uifw_16: + mov r1, #5 + jb _short_flag, printf_uifw_8 + mov a, r7 + anl a, #0x0F + jnz printf_uifw_sub + dec r1 + mov a, r6 + anl a, #0xF0 + jnz printf_uifw_sub +printf_uifw_8: + mov r1, #3 + mov a, r6 + anl a, #0x0F + jnz printf_uifw_sub + dec r1 + mov a, r5 + anl a, #0xF0 + jnz printf_uifw_sub + dec r1 +printf_uifw_sub: + //r1 has the number of digits for the number + mov a, _field_width + mov c, _negative_flag + subb a, r1 + jc printf_uifw_end + mov _field_width, a + +#ifndef PUTCHAR_CALLEE_SAVES +#ifdef LONG + push ar3 + push ar2 +#endif + push ar7 + push ar6 + push ar5 +#endif + lcall printf_space +#ifndef PUTCHAR_CALLEE_SAVES + pop ar5 + pop ar6 + pop ar7 +#ifdef LONG + pop ar2 + pop ar3 +#endif +#endif + + +printf_uifw_end: +#endif // FIELD_WIDTH + + +printf_uint_doit: + jnb _negative_flag, printf_uint_pos +#ifdef PUTCHAR_CALLEE_SAVES + //mov a, #'-' + mov a, #45 + lcall printf_putchar +#else +#ifdef LONG + push ar3 + push ar2 +#endif + push ar7 + push ar6 + push ar5 + //mov a, #'-' + mov a, #45 + lcall printf_putchar + pop ar5 + pop ar6 + pop ar7 +#ifdef LONG + pop ar2 + pop ar3 +#endif +#endif // PUTCHAR_CALLEE_SAVES + +printf_uint_pos: + jb _short_flag, printf_uint8 +#ifdef LONG + jnb _long_flag, printf_uint16 +printf_uint32: + push ar5 + push ar6 + push ar7 + mov dpl, r2 + mov a, r3 + mov dph, a + lcall printf_phex_msn + mov a, dph + lcall printf_phex_lsn + mov a, dpl + lcall printf_phex_msn + mov a, dpl + lcall printf_phex_lsn + pop acc + mov dpl, a + lcall printf_phex_msn + mov a, dpl + pop dph + pop dpl + sjmp printf_uint16a +#endif // LONG + +printf_uint16: + mov dpl, r5 + mov dph, r6 + mov a, r7 +printf_uint16a: + lcall printf_phex_lsn + mov a, dph + lcall printf_phex_msn + mov a, dph + sjmp printf_uint8a + +printf_uint8: + mov dpl, r5 + mov a, r6 +printf_uint8a: + lcall printf_phex_lsn + mov a, dpl + lcall printf_phex_msn + mov a, dpl + lcall printf_phex_lsn + lcall printf_zero + pop dph + pop dpl +#ifdef FLOAT + jnb _continue_float, 0002$ + ret +0002$: +#endif + ljmp printf_main_loop + + +#ifdef FLOAT +#ifdef FLOAT_FIXED4 + // Print a float the easy way. First, extract the integer part and + // use the integer printing code. Then extract the fractional part, + // convert each bit to 4 digit BCD, and print the BCD sum. Absolutely + // no field width control, always 4 digits printed past the decimal + // point. No round off. 1.9999987 prints as 1.9999, not 2.0000. +print_float: +#ifdef FIELD_WIDTH + jnb _field_width_flag, print_float_begin + mov a, _field_width + add a, #251 + mov _field_width, a + jc print_float_begin + mov _field_width, #0 +#endif +print_float_begin: + push ar0 // keep r0 safe, will need it again + lcall printf_get_float + clr c + mov a, #158 // check for large float we can't print + subb a, r7 + jnc print_float_size_ok +printf_float_too_big: + // TODO: should print some sort of overflow error?? + pop ar0 + ljmp printf_format_loop +print_float_size_ok: + push dpl + lcall fs_rshift_a + pop dpl + setb _continue_float +#ifndef LONG + mov a, r3 + orl a, r4 + jnz printf_float_too_big +#endif + lcall printf_uint // print the integer portion + //mov a, #'.' + mov a, #0x2E + lcall printf_putchar + // now that the integer part is printed, we need to refetch the + // float from the va_args and extract the fractional part + pop ar0 + lcall printf_get_float + push ar0 + push dpl + push dph + mov a, r7 + cjne a, #126, print_float_frac_lshift + sjmp print_float_frac // input between 0.5 to 0.9999 +print_float_frac_lshift: + jc print_float_frac_rshift + //Acc (exponent) is greater than 126 (input >= 1.0) + add a, #130 + mov r5, a +print_float_lshift_loop: + clr c + mov a, r2 + rlc a + mov r2, a + mov a, r3 + rlc a + mov r3, a + mov a, r4 + rlc a + mov r4, a + djnz r5, print_float_lshift_loop + sjmp print_float_frac +print_float_frac_rshift: + //Acc (exponent) is less than 126 (input < 0.5) + cpl a + add a, #127 + lcall fs_rshift_a +print_float_frac: + // now we've got the fractional part, so now is the time to + // convert to BCD... just convert each bit to BCD using a + // lookup table and BCD sum them together + mov r7, #14 + clr a + mov r6, a + mov r5, a + mov dptr, #_frac2bcd // FLOAT_FIXED4 version (14 entries) +print_float_frac_loop: + mov a, r3 + rlc a + mov r3, a + mov a, r4 + rlc a + mov r4, a + jnc print_float_frac_skip + clr a + movc a, @a+dptr + add a, r5 + da a + mov r5, a + mov a, #1 + movc a, @a+dptr + addc a, r6 + da a + mov r6, a +print_float_frac_skip: + inc dptr + inc dptr + djnz r7, print_float_frac_loop + // the BCD sum is in dptr, so all we've got to do is output + // all 4 digits. No trailing zero suppression, no nice round + // off (impossible to change the integer part since we already + // printed it). + mov dph, r6 + mov dpl, r5 + setb _print_zero_flag + mov a, dph + lcall printf_phex_msn + mov a, dph + lcall printf_phex_lsn + mov a, dpl + lcall printf_phex_msn + mov a, dpl + lcall printf_phex_lsn + pop dph + pop dpl + pop ar0 + ljmp printf_main_loop + +#else // not FLOAT_FIXED4 + + +print_float: + // Print a float the not-as-easy way, with a configurable number of + // fractional digits (up to 8) and proper round-off (up to 7 digits). + // First, extract the fractional part, convert to BCD, and then add + // the scaled round-off. Store the rounded fractional digits and + // their carry. Then extract the integer portion, increment it if + // the rounding caused a carry. Use the integer printing to output + // the integer, and then output the stored fractional digits. This + // approach requires 5 bytes of internal RAM to store the 8 fractional + // digits and the number of them we'll actually print. This code is + // a couple hundred bytes larger and a bit slower than the FIXED4 + // version, but it gives very nice results. +print_float_1: +#ifdef FIELD_WIDTH + jnb _field_width_flag, print_float_default_width + // The caller specified exact field width, so use it. Need to + // convert the whole float digits into the integer portion only. + mov a, _field_width + setb c + subb a, _frac_field_width + mov _field_width, a + jnc print_float_begin + mov _field_width, #0 + sjmp print_float_begin +#endif +print_float_default_width: + // The caller didn't specify field width (or FIELD_WIDTH is + // not defined so it's ignored). We've still got to know + // how many fractional digits are going to print, so we can + // round off properly. +#ifdef FLOAT_DEFAULT_FRAC_DIGITS + mov _frac_field_width, #FLOAT_DEFAULT_FRAC_DIGITS +#else + // default fractional field width (between 0 to 7) + // attempt to scale the default number of fractional digits + // based on the magnitude of the float + mov a, @r0 + anl a, #0x7F // ignore sign bit + mov r2, a // r2 is first byte of float + dec r0 + mov ar3, @r0 // r3 is second byte of float + inc r0 + mov r6, dpl + mov r7, dph + mov dptr, #_float_range_table + mov r5, #7 +print_float_default_loop: + clr a + movc a, @a+dptr + add a, r3 + inc dptr + clr a + movc a, @a+dptr + addc a, r2 + jnc print_float_default_done + inc dptr + djnz r5, print_float_default_loop +print_float_default_done: + mov _frac_field_width, r5 + mov dpl, r6 + mov dph, r7 +#endif // not FLOAT_DEFAULT_FRAC_DIGITS + +print_float_begin: + push ar0 // keep r0 safe, will need it again + lcall printf_get_float + push dpl + push dph + mov a, r7 + cjne a, #126, print_float_frac_lshift + sjmp print_float_frac // input between 0.5 to 0.9999 + +print_float_frac_lshift: + jc print_float_frac_rshift + //Acc (exponent) is greater than 126 (input >= 1.0) + add a, #130 + mov r5, a +print_float_lshift_loop: + clr c + mov a, r2 + rlc a + mov r2, a + mov a, r3 + rlc a + mov r3, a + mov a, r4 + rlc a + mov r4, a + djnz r5, print_float_lshift_loop + sjmp print_float_frac +print_float_frac_rshift: + //Acc (exponent) is less than 126 (input < 0.5) + cpl a + add a, #127 + lcall fs_rshift_a +print_float_frac: + // Convert the fraction in r4/r3/r2/r1 into 8 BCD digits in r0/r7/r6/r5 + mov b, #27 + clr a + mov r0, a + mov r7, a + mov r6, a + mov r5, a + mov dptr, #_frac2bcd // FLOAT version (27 entries) +print_float_frac_loop: + mov a, r1 + rlc a + mov r1, a + mov a, r2 + rlc a + mov r2, a + mov a, r3 + rlc a + mov r3, a + mov a, r4 + rlc a + mov r4, a + jnc print_float_frac_skip + clr a + movc a, @a+dptr + add a, r5 + da a + mov r5, a + mov a, #1 + movc a, @a+dptr + addc a, r6 + da a + mov r6, a + mov a, #2 + movc a, @a+dptr + addc a, r7 + da a + mov r7, a + mov a, #3 + movc a, @a+dptr + addc a, r0 + da a + mov r0, a +print_float_frac_skip: + inc dptr + inc dptr + inc dptr + inc dptr + djnz b, print_float_frac_loop +print_float_frac_roundoff: + // Now it's time to round-off the BCD digits to the desired precision. + clr a + mov r4, #0x50 // r4/r3/r2/r1 = 0.5 (bcd rounding) + mov r3, a + mov r2, a + mov r1, a + mov a, _frac_field_width + rl a + rl a + anl a, #0xFC + mov dph, r0 // fs_rshift_a will overwrite r0 & dpl + lcall fs_rshift_a // divide r4/r3/r2/r1 by 10^frac_field_width + mov a, r5 + add a, r1 // add rounding to fractional part + da a + mov _float_frac_bcd+3, a // and store it for later use + mov a, r6 + addc a, r2 + da a + mov _float_frac_bcd+2, a + mov a, r7 + addc a, r3 + da a + mov _float_frac_bcd+1, a + mov a, dph + addc a, r4 + da a + mov _float_frac_bcd+0, a + mov sign_b, c // keep fractional carry in sign_b + pop dph + pop dpl +print_float_int: + // Time to work on the integer portion... fetch the float again, check + // size (exponent), scale to integer, add the fraction's carry, and + // let the integer printing code do all the work. + pop ar0 + lcall printf_get_float + push ar0 + clr c + mov a, #158 // check for large float we can't print + subb a, r7 + jnc print_float_size_ok +printf_float_too_big: + // TODO: should print some sort of overflow error?? + pop ar0 + ljmp printf_format_loop +print_float_size_ok: + push dpl + lcall fs_rshift_a + pop dpl + jnb sign_b, print_float_do_int + // if we get here, the fractional round off caused the + // integer part to increment. Add 1 for a proper result + mov a, r1 + add a, #1 + mov r1, a + clr a + addc a, r2 + mov r2, a +#ifdef LONG + clr a + addc a, r3 + mov r3, a + clr a + addc a, r4 + mov r4, a +#endif + jc printf_float_too_big +print_float_do_int: +#ifndef LONG + mov a, r3 + orl a, r4 + jnz printf_float_too_big +#endif + setb _continue_float + lcall printf_uint // print the integer portion + + +print_float_frac_width: + // Now all we have to do is output the fractional digits that + // were previous computed and stored in memory. +#ifdef FIELD_WIDTH + jb _field_width_flag, print_float_do_frac +#endif +#ifndef DO_NOT_TRIM_TRAILING_ZEROS + // if the user did not explicitly set a + // field width, trim off trailing zeros +print_float_frac_trim: + mov a, _frac_field_width + jz print_float_do_frac + lcall get_float_frac_digit + jnz print_float_do_frac + djnz _frac_field_width, print_float_frac_trim +#endif + +print_float_do_frac: + mov a, _frac_field_width + jz print_float_done + //mov a, #'.' + mov a, #0x2E + lcall printf_putchar + mov r0, #0 + setb _print_zero_flag +print_float_do_frac_loop: + inc r0 + mov a, r0 + lcall get_float_frac_digit + lcall printf_phex_lsn + mov a, r0 + cjne a, _frac_field_width, print_float_do_frac_loop + +print_float_done: + pop ar0 + ljmp printf_main_loop + + + // acc=1 for tenths, acc=2 for hundredths, etc +get_float_frac_digit: + dec a + clr c + rrc a + mov psw.5, c + add a, #_float_frac_bcd + mov r1, a + mov a, @r1 + jb psw.5, get_float_frac_digit_done + swap a +get_float_frac_digit_done: + anl a, #15 + ret + +#endif // end of normal FLOAT code (not FLOAT_FIXED4) + + +// These helper functions are used, regardless of which type of +// FLOAT code is used. + +#if 0 +pm2_print_float: + mov a, r7 + lcall pm2_entry_phex + mov a, #0x20 + lcall pm2_entry_cout + lcall _print_r4321 + mov a, #0x20 + lcall pm2_entry_cout + ret +#endif + + // Fetch a float from the va_args and put it into + // r7(exp) r4/r3/r2(mant) and also clear r1 and preset + // the flags +printf_get_float: + mov a, @r0 + dec r0 + mov r1, a + mov a, @r0 + dec r0 + mov r4, a + rlc a + mov a, r1 + rlc a + mov _negative_flag, c + mov r7, a + jz printf_get_float_2 + orl ar4, #0x80 +printf_get_float_2: + mov a, @r0 + dec r0 + mov r3, a + mov a, @r0 + dec r0 + mov r2, a + mov r1, #0 + clr _short_flag + setb _long_flag + ret +#endif // FLOAT + + + /* read an integer into r1/r2/r3/r4, and msb into r5 */ +printf_get_int: + mov a, @r0 + mov r1, a + mov r5, a + dec r0 + jb _short_flag, printf_get_done + mov r2, ar1 + mov a, @r0 + mov r1, a + dec r0 + jnb _long_flag, printf_get_done + mov r4, ar2 + mov r3, ar1 + mov a, @r0 + mov r2, a + dec r0 + mov a, @r0 + mov r1, a + dec r0 +printf_get_done: + ret + + +#ifdef FAST_INTEGER + + /* convert binary number in r4/r3/r2/r1 into bcd packed number + * in r3/r2/r7/r6/r5. The input number is destroyed in the + * process, to avoid needing extra memory for the result (and + * r1 gets used for temporary storage). dptr is overwritten, + * but r0 is not changed. + */ + +printf_int2bcd: + mov a, r1 + mov b, #100 + div ab + mov r6, a + mov a, #10 + xch a, b + div ab + swap a + orl a, b + mov r5, a + + jnb _short_flag, printf_i2bcd_16 // if 8 bit int, we're done + ret + +printf_i2bcd_16: + mov a, r2 + anl a, #0x0F + mov r1, a + mov dptr, #_int2bcd_2 + movc a, @a+dptr + add a, r5 + da a + mov r5, a + mov a, r1 + orl a, #16 + movc a, @a+dptr + addc a, r6 + da a + mov r6, a + + mov a, r2 + swap a + anl a, #0x0F + mov r1, a + mov dptr, #_int2bcd_3 + movc a, @a+dptr + add a, r5 + da a + mov r5, a + mov a, r1 + orl a, #16 + movc a, @a+dptr + addc a, r6 + da a + mov r6, a + mov a, r1 + orl a, #32 + movc a, @a+dptr + addc a, #0 + da a + mov r7, a + + jb _long_flag, printf_i2bcd_32 // if 16 bit int, we're done + ret + +printf_i2bcd_32: + +#ifdef LONG + mov a, r3 + anl a, #0x0F + mov r1, a + mov dptr, #_int2bcd_4 + movc a, @a+dptr + add a, r5 + da a + mov r5, a + mov a, r1 + orl a, #16 + movc a, @a+dptr + addc a, r6 + da a + mov r6, a + mov a, r1 + orl a, #32 + movc a, @a+dptr + addc a, r7 + da a + mov r7, a + clr a + addc a, #0 + mov r2, a + + mov a, r3 + swap a + anl a, #0x0F + mov r1, a + mov dptr, #_int2bcd_5 + movc a, @a+dptr + add a, r5 + da a + mov r5, a + mov a, r1 + orl a, #16 + movc a, @a+dptr + addc a, r6 + da a + mov r6, a + mov a, r1 + orl a, #32 + movc a, @a+dptr + addc a, r7 + da a + mov r7, a + mov a, r1 + orl a, #48 + movc a, @a+dptr + addc a, r2 + da a + mov r2, a + + mov a, r4 + anl a, #0x0F + mov r1, a + mov dptr, #_int2bcd_6 + mov r3, #0 + lcall printf_bcd_add10 // saves 27 bytes, costs 5 cycles + + mov a, r4 + swap a + anl a, #0x0F + mov r1, a + mov dptr, #_int2bcd_7 +printf_bcd_add10: + movc a, @a+dptr + add a, r5 + da a + mov r5, a + mov a, r1 + orl a, #16 + movc a, @a+dptr + addc a, r6 + da a + mov r6, a + mov a, r1 + orl a, #32 + movc a, @a+dptr + addc a, r7 + da a + mov r7, a + mov a, r1 + orl a, #48 + movc a, @a+dptr + addc a, r2 + da a + mov r2, a + mov a, r1 + orl a, #64 + movc a, @a+dptr + addc a, r3 + da a + mov r3, a +#endif // LONG + ret + + +#else // not FAST_INTEGER + + /* convert binary number in r4/r3/r2/r1 into bcd packed number + * in r3/r2/r7/r6/r5. The input number is destroyed in the + * process, to avoid needing extra memory for the result (and + * r1 gets used for temporary storage). dptr is overwritten, + * but r0 is not changed. + */ + +#ifdef LONG + +printf_int2bcd: + mov a, #8 + jb _short_flag, printf_int2bcd_begin + mov a, #16 + jnb _long_flag, printf_int2bcd_begin + mov a, #32 +printf_int2bcd_begin: + mov b, a + clr a + mov r5, a + mov r6, a + mov r7, a + mov (_i2bcd_tmp + 0), a + mov (_i2bcd_tmp + 1), a + mov dptr, #_int2bcd +printf_i2bcd_loop: + mov a, r4 + rrc a + mov r4, a + mov a, r3 + rrc a + mov r3, a + mov a, r2 + rrc a + mov r2, a + mov a, r1 + rrc a + mov r1, a + jnc print_i2bcd_skip + clr a + movc a, @a+dptr + add a, r5 + da a + mov r5, a + mov a, #1 + movc a, @a+dptr + addc a, r6 + da a + mov r6, a + mov a, #2 + movc a, @a+dptr + addc a, r7 + da a + mov r7, a + mov a, #3 + movc a, @a+dptr + addc a, (_i2bcd_tmp + 0) + da a + mov (_i2bcd_tmp + 0), a + mov a, #4 + movc a, @a+dptr + addc a, (_i2bcd_tmp + 1) + da a + mov (_i2bcd_tmp + 1), a +print_i2bcd_skip: + inc dptr + inc dptr + inc dptr + inc dptr + inc dptr + djnz b, printf_i2bcd_loop + mov r2, (_i2bcd_tmp + 0) + mov r3, (_i2bcd_tmp + 1) + ret + +#else // not LONG + +printf_int2bcd: + mov a, #8 + jb _short_flag, printf_int2bcd_begin + mov a, #16 +printf_int2bcd_begin: + mov b, a + clr a + mov r5, a + mov r6, a + mov r7, a + mov dptr, #_int2bcd +printf_i2bcd_loop: + mov a, r2 + rrc a + mov r2, a + mov a, r1 + rrc a + mov r1, a + jnc printf_i2bcd_add_skip + clr a + movc a, @a+dptr + add a, r5 + da a + mov r5, a + mov a, #1 + movc a, @a+dptr + addc a, r6 + da a + mov r6, a + mov a, #2 + movc a, @a+dptr + addc a, r7 + da a + mov r7, a +printf_i2bcd_add_skip: + inc dptr + inc dptr + inc dptr + djnz b, printf_i2bcd_loop + ret + +#endif // not LONG + + +#endif // not FAST_INTEGER + + +#ifdef FIELD_WIDTH +printf_space_loop: + //mov a, #' ' + mov a, #32 + jnb _leading_zero_flag, printf_space_output + //mov a, #'0' + mov a, #48 +printf_space_output: + lcall printf_putchar + dec _field_width +printf_space: + mov a, _field_width + jnz printf_space_loop + ret +#endif + + /* print a hex digit, either upper 4 bit (msn) or lower 4 bits (lsn) */ + +printf_phex_msn: + swap a +printf_phex_lsn: + anl a, #15 + jnz printf_phex_ok + jnb _print_zero_flag, printf_ret +printf_phex_ok: + setb _print_zero_flag + add a, #0x90 + da a + addc a, #0x40 + da a +printf_putchar: +#ifdef PUTCHAR_CALLEE_SAVES + push dph + push dpl + mov dpl, a + lcall _putchar + pop dpl + pop dph +#else + push dph + push dpl + push ar0 + mov dpl, a + lcall _putchar + pop ar0 + pop dpl + pop dph +#endif +printf_ret: + ret + + /* print a zero if all the calls to print the digits ended up */ + /* being leading zeros */ + +printf_zero: + jb _print_zero_flag, printf_ret + //mov a, #'0' + mov a, #48 + ljmp printf_putchar + +printf_end: + __endasm; +} + + +#ifdef FAST_INTEGER +/* + * #! /usr/bin/perl + * for ($d=0; $d < 8; $d++) { + * $n = 16 ** $d; + * for ($p=0; $p < 5; $p++) { + * last unless (((16 ** $d) * 15) / (10 ** ($p * 2))) % 100; + * printf "code unsigned char int2bcd_%d_%d[15] = {", $d, $p; + * for ($i=0; $i < 16; $i++) { + * printf "0x%02d", + * (((16 ** $d) * $i) / (10 ** ($p * 2))) % 100; + * print ", " if $i < 15; + * } + * print "};\n"; + * } + * } + */ + +#if 0 +static __code unsigned char int2bcd_0[] = { +0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, +0x08, 0x09, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15}; + +static __code unsigned char int2bcd_1[] = { +0x00, 0x16, 0x32, 0x48, 0x64, 0x80, 0x96, 0x12, +0x28, 0x44, 0x60, 0x76, 0x92, 0x08, 0x24, 0x40, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, +0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02}; +#endif + +static __code unsigned char int2bcd_2[] = { +0x00, 0x56, 0x12, 0x68, 0x24, 0x80, 0x36, 0x92, +0x48, 0x04, 0x60, 0x16, 0x72, 0x28, 0x84, 0x40, +0x00, 0x02, 0x05, 0x07, 0x10, 0x12, 0x15, 0x17, +0x20, 0x23, 0x25, 0x28, 0x30, 0x33, 0x35, 0x38}; + +static __code unsigned char int2bcd_3[] = { +0x00, 0x96, 0x92, 0x88, 0x84, 0x80, 0x76, 0x72, +0x68, 0x64, 0x60, 0x56, 0x52, 0x48, 0x44, 0x40, +0x00, 0x40, 0x81, 0x22, 0x63, 0x04, 0x45, 0x86, +0x27, 0x68, 0x09, 0x50, 0x91, 0x32, 0x73, 0x14, +0x00, 0x00, 0x00, 0x01, 0x01, 0x02, 0x02, 0x02, +0x03, 0x03, 0x04, 0x04, 0x04, 0x05, 0x05, 0x06}; + +#ifdef LONG +static __code unsigned char int2bcd_4[] = { +0x00, 0x36, 0x72, 0x08, 0x44, 0x80, 0x16, 0x52, +0x88, 0x24, 0x60, 0x96, 0x32, 0x68, 0x04, 0x40, +0x00, 0x55, 0x10, 0x66, 0x21, 0x76, 0x32, 0x87, +0x42, 0x98, 0x53, 0x08, 0x64, 0x19, 0x75, 0x30, +0x00, 0x06, 0x13, 0x19, 0x26, 0x32, 0x39, 0x45, +0x52, 0x58, 0x65, 0x72, 0x78, 0x85, 0x91, 0x98}; + +static __code unsigned char int2bcd_5[] = { +0x00, 0x76, 0x52, 0x28, 0x04, 0x80, 0x56, 0x32, +0x08, 0x84, 0x60, 0x36, 0x12, 0x88, 0x64, 0x40, +0x00, 0x85, 0x71, 0x57, 0x43, 0x28, 0x14, 0x00, +0x86, 0x71, 0x57, 0x43, 0x29, 0x14, 0x00, 0x86, +0x00, 0x04, 0x09, 0x14, 0x19, 0x24, 0x29, 0x34, +0x38, 0x43, 0x48, 0x53, 0x58, 0x63, 0x68, 0x72, +0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, +0x08, 0x09, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15}; + +static __code unsigned char int2bcd_6[] = { +0x00, 0x16, 0x32, 0x48, 0x64, 0x80, 0x96, 0x12, +0x28, 0x44, 0x60, 0x76, 0x92, 0x08, 0x24, 0x40, +0x00, 0x72, 0x44, 0x16, 0x88, 0x60, 0x32, 0x05, +0x77, 0x49, 0x21, 0x93, 0x65, 0x38, 0x10, 0x82, +0x00, 0x77, 0x55, 0x33, 0x10, 0x88, 0x66, 0x44, +0x21, 0x99, 0x77, 0x54, 0x32, 0x10, 0x88, 0x65, +0x00, 0x16, 0x33, 0x50, 0x67, 0x83, 0x00, 0x17, +0x34, 0x50, 0x67, 0x84, 0x01, 0x18, 0x34, 0x51, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, +0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, 0x02}; + +static __code unsigned char int2bcd_7[] = { +0x00, 0x56, 0x12, 0x68, 0x24, 0x80, 0x36, 0x92, +0x48, 0x04, 0x60, 0x16, 0x72, 0x28, 0x84, 0x40, +0x00, 0x54, 0x09, 0x63, 0x18, 0x72, 0x27, 0x81, +0x36, 0x91, 0x45, 0x00, 0x54, 0x09, 0x63, 0x18, +0x00, 0x43, 0x87, 0x30, 0x74, 0x17, 0x61, 0x04, +0x48, 0x91, 0x35, 0x79, 0x22, 0x66, 0x09, 0x53, +0x00, 0x68, 0x36, 0x05, 0x73, 0x42, 0x10, 0x79, +0x47, 0x15, 0x84, 0x52, 0x21, 0x89, 0x58, 0x26, +0x00, 0x02, 0x05, 0x08, 0x10, 0x13, 0x16, 0x18, +0x21, 0x24, 0x26, 0x29, 0x32, 0x34, 0x37, 0x40}; +#endif // LONG + +#else // not FAST_INTEGER + +/* + * #! /usr/bin/perl + * print "__code unsigned char int2bcd[] = {\n"; + * for ($i=0, $n=1; $i<32; $i++, $n*=2) { + * $r = sprintf "%010u", $n; + * $r =~ /([0-9][0-9])([0-9][0-9])([0-9][0-9])([0-9][0-9])([0-9][0-9])/; + * printf "0x%02d, 0x%02d, 0x%02d, 0x%02d, 0x%02d", $5, $4, $3, $2, $1; + * print ',' if $i < 31; + * printf "\t\t// %10u\n", $n; + * } + * print "}\n__code unsigned char int2bcd[] = {\n"; + * for ($i=0, $n=1; $i<16; $i++, $n*=2) { + * $r = sprintf "%06u", $n; + * $r =~ /([0-9][0-9])([0-9][0-9])([0-9][0-9])/; + * printf "0x%02d, 0x%02d, 0x%02d", $3, $2, $1; + * print ',' if $i < 15; + * printf "\t\t// %10u\n", $n; + * } + * print "};\n"; +*/ + +#ifdef LONG +static __code unsigned char int2bcd[] = { +0x01, 0x00, 0x00, 0x00, 0x00, // 1 +0x02, 0x00, 0x00, 0x00, 0x00, // 2 +0x04, 0x00, 0x00, 0x00, 0x00, // 4 +0x08, 0x00, 0x00, 0x00, 0x00, // 8 +0x16, 0x00, 0x00, 0x00, 0x00, // 16 +0x32, 0x00, 0x00, 0x00, 0x00, // 32 +0x64, 0x00, 0x00, 0x00, 0x00, // 64 +0x28, 0x01, 0x00, 0x00, 0x00, // 128 +0x56, 0x02, 0x00, 0x00, 0x00, // 256 +0x12, 0x05, 0x00, 0x00, 0x00, // 512 +0x24, 0x10, 0x00, 0x00, 0x00, // 1024 +0x48, 0x20, 0x00, 0x00, 0x00, // 2048 +0x96, 0x40, 0x00, 0x00, 0x00, // 4096 +0x92, 0x81, 0x00, 0x00, 0x00, // 8192 +0x84, 0x63, 0x01, 0x00, 0x00, // 16384 +0x68, 0x27, 0x03, 0x00, 0x00, // 32768 +0x36, 0x55, 0x06, 0x00, 0x00, // 65536 +0x72, 0x10, 0x13, 0x00, 0x00, // 131072 +0x44, 0x21, 0x26, 0x00, 0x00, // 262144 +0x88, 0x42, 0x52, 0x00, 0x00, // 524288 +0x76, 0x85, 0x04, 0x01, 0x00, // 1048576 +0x52, 0x71, 0x09, 0x02, 0x00, // 2097152 +0x04, 0x43, 0x19, 0x04, 0x00, // 4194304 +0x08, 0x86, 0x38, 0x08, 0x00, // 8388608 +0x16, 0x72, 0x77, 0x16, 0x00, // 16777216 +0x32, 0x44, 0x55, 0x33, 0x00, // 33554432 +0x64, 0x88, 0x10, 0x67, 0x00, // 67108864 +0x28, 0x77, 0x21, 0x34, 0x01, // 134217728 +0x56, 0x54, 0x43, 0x68, 0x02, // 268435456 +0x12, 0x09, 0x87, 0x36, 0x05, // 536870912 +0x24, 0x18, 0x74, 0x73, 0x10, // 1073741824 +0x48, 0x36, 0x48, 0x47, 0x21 // 2147483648 +}; +#else // not LONG +static __code unsigned char int2bcd[] = { +0x01, 0x00, 0x00, // 1 +0x02, 0x00, 0x00, // 2 +0x04, 0x00, 0x00, // 4 +0x08, 0x00, 0x00, // 8 +0x16, 0x00, 0x00, // 16 +0x32, 0x00, 0x00, // 32 +0x64, 0x00, 0x00, // 64 +0x28, 0x01, 0x00, // 128 +0x56, 0x02, 0x00, // 256 +0x12, 0x05, 0x00, // 512 +0x24, 0x10, 0x00, // 1024 +0x48, 0x20, 0x00, // 2048 +0x96, 0x40, 0x00, // 4096 +0x92, 0x81, 0x00, // 8192 +0x84, 0x63, 0x01, // 16384 +0x68, 0x27, 0x03 // 32768 +}; +#endif // not LONG + +#endif // not FAST_INTEGER + + +#ifdef FLOAT +#ifndef FLOAT_FIXED4 + +/* + * #! /usr/bin/perl + * for ($i=0, $f=0.5; $i<24; $i++) { + * $r = sprintf "%.8f", $f; + * $r =~ /0\.([0-9][0-9])([0-9][0-9])([0-9][0-9])([0-9][0-9])/; + * printf "0x%02d, 0x%02d, 0x%02d, 0x%02d", $4, $3, $2, $1; + * print ',' if $i < 23; + * $sum += $r; + * printf "\t\t// %.15f %.8f\n", $f, $sum; + * $f /= 2; + * } + */ + +static __code unsigned char frac2bcd[] = { +0x00, 0x00, 0x00, 0x50, // 0.500000000000000 0.50000000 +0x00, 0x00, 0x00, 0x25, // 0.250000000000000 0.75000000 +0x00, 0x00, 0x50, 0x12, // 0.125000000000000 0.87500000 +0x00, 0x00, 0x25, 0x06, // 0.062500000000000 0.93750000 +0x00, 0x50, 0x12, 0x03, // 0.031250000000000 0.96875000 +0x00, 0x25, 0x56, 0x01, // 0.015625000000000 0.98437500 +0x50, 0x12, 0x78, 0x00, // 0.007812500000000 0.99218750 +0x25, 0x06, 0x39, 0x00, // 0.003906250000000 0.99609375 +0x12, 0x53, 0x19, 0x00, // 0.001953125000000 0.99804687 +0x56, 0x76, 0x09, 0x00, // 0.000976562500000 0.99902343 +0x28, 0x88, 0x04, 0x00, // 0.000488281250000 0.99951171 +0x14, 0x44, 0x02, 0x00, // 0.000244140625000 0.99975585 +0x07, 0x22, 0x01, 0x00, // 0.000122070312500 0.99987792 +0x04, 0x61, 0x00, 0x00, // 0.000061035156250 0.99993896 +0x52, 0x30, 0x00, 0x00, // 0.000030517578125 0.99996948 +0x26, 0x15, 0x00, 0x00, // 0.000015258789062 0.99998474 +0x63, 0x07, 0x00, 0x00, // 0.000007629394531 0.99999237 +0x81, 0x03, 0x00, 0x00, // 0.000003814697266 0.99999618 +0x91, 0x01, 0x00, 0x00, // 0.000001907348633 0.99999809 +0x95, 0x00, 0x00, 0x00, // 0.000000953674316 0.99999904 +0x48, 0x00, 0x00, 0x00, // 0.000000476837158 0.99999952 +0x24, 0x00, 0x00, 0x00, // 0.000000238418579 0.99999976 +0x12, 0x00, 0x00, 0x00, // 0.000000119209290 0.99999988 +0x06, 0x00, 0x00, 0x00, // 0.000000059604645 0.99999994 +0x03, 0x00, 0x00, 0x00, // 0.000000029802322 0.99999997 +0x01, 0x00, 0x00, 0x00, // 0.000000014901161 0.99999998 +0x01, 0x00, 0x00, 0x00 // 0.000000007450581 0.99999999 +}; + +#ifndef FLOAT_DEFAULT_FRAC_DIGITS +// TODO: Perhaps these should be tweaked a bit to take round up +// effects into account... or maybe give more default digits?? +// Range #digits +// 0.0001 - 0.0009999 7 +// 0.001 - 0.009999 6 0.001 = 0x3A83126F 3A83 +// 0.01 - 0.09999 5 0.01 = 0x3C23D70A 3C23 +// 0.1 - 9.9999 4 0.1 = 0x3DCCCCCD, 3DCC +// 10.0 - 99.99 3 10.0 = 0x41200000 4120 +// 100.0 - 999.99 2 100.0 = 0x42C80000 42C8 +// 1000 - 9999.9 1 1000 = 0x447A0000 447A +// 10000+ 0 10000 = 0x461C4000 461C +static __code unsigned int float_range_table[] = { +65536 - 0x3A83, +65536 - 0x3C23, +65536 - 0x3DCC, +65536 - 0x4120, +65536 - 0x42C8, +65536 - 0x447A, +65536 - 0x461C +}; +#endif + +#else // using FLOAT_FIXED4 + +/* +* #! /usr/bin/perl +* for ($i=0, $f=0.5; $i<14; $i++) { +* $r = sprintf "%.4f", $f; +* $r =~ /0\.([0-9][0-9])([0-9][0-9])/; +* printf "0x%02d, 0x%02d", $2, $1; +* print ',' if $i < 13; +* $sum += $r; +* printf "\t\t// %.15f %.4f\n", $f, $sum; +* $f /= 2; +* } +*/ + +static __code unsigned char frac2bcd[] = { +0x00, 0x50, // 0.500000000000000 0.5000 +0x00, 0x25, // 0.250000000000000 0.7500 +0x50, 0x12, // 0.125000000000000 0.8750 +0x25, 0x06, // 0.062500000000000 0.9375 +0x12, 0x03, // 0.031250000000000 0.9687 +0x56, 0x01, // 0.015625000000000 0.9843 +0x78, 0x00, // 0.007812500000000 0.9921 +0x39, 0x00, // 0.003906250000000 0.9960 +0x20, 0x00, // 0.001953125000000 0.9980 +0x10, 0x00, // 0.000976562500000 0.9990 +0x05, 0x00, // 0.000488281250000 0.9995 +0x02, 0x00, // 0.000244140625000 0.9997 +0x01, 0x00, // 0.000122070312500 0.9998 +0x01, 0x00 // 0.000061035156250 0.9999 +}; + +#endif // FLOAT_FIXED4 +#endif // FLOAT + + +#endif // defines compatible with printf_fast diff --git a/device/lib/printf_fast_f.c b/device/lib/printf_fast_f.c new file mode 100644 index 0000000..c2504a6 --- /dev/null +++ b/device/lib/printf_fast_f.c @@ -0,0 +1,13 @@ +// Same as printf_fast, but with floating point enabled + +#define SDCC_FLOAT_LIB +#include + +#ifdef FLOAT_ASM_MCS51 + +#define FLOAT +#define PRINTF_FAST printf_fast_f + +#include "printf_fast.c" + +#endif diff --git a/device/lib/printf_large.c b/device/lib/printf_large.c new file mode 100644 index 0000000..fba74ff --- /dev/null +++ b/device/lib/printf_large.c @@ -0,0 +1,819 @@ +/*------------------------------------------------------------------------- + printf_large.c - formatted output conversion + + Written By - Martijn van Balen aed@iae.nl (1999) + Added %f By - johan.knol@iduna.nl (2000) + Refactored by - Maarten Brock (2004) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#if defined (SDCC_ds390) +#define USE_FLOATS 1 +#endif + +#include +#include +#include +#include +#include +#include + +#define PTR value.ptr + +#ifdef SDCC_ds390 +#define NULL_STRING "" +#define NULL_STRING_LENGTH 6 +#endif + +#if defined (SDCC_mcs51) && defined (SDCC_MODEL_SMALL) && !defined (SDCC_STACK_AUTO) +# define MEM_SPACE_BUF __idata +# define MEM_SPACE_BUF_PP __idata +#else +# define MEM_SPACE_BUF +# define MEM_SPACE_BUF_PP _AUTOMEM +#endif + +/****************************************************************************/ + +//typedef char * ptr_t; +#define ptr_t char * + +#ifdef toupper +#undef toupper +#endif +#ifdef tolower +#undef tolower +#endif +#ifdef islower +#undef islower +#endif +#ifdef isdigit +#undef isdigit +#endif + +//#define toupper(c) ((c)&=~0x20) +#define toupper(c) ((c)&=0xDF) +#define tolower(c) ((c)|=0x20) +#define islower(c) ((unsigned char)c >= (unsigned char)'a' && (unsigned char)c <= (unsigned char)'z') +#define isdigit(c) ((unsigned char)c >= (unsigned char)'0' && (unsigned char)c <= (unsigned char)'9') + +typedef union +{ + unsigned char byte[5]; + long l; + unsigned long ul; + float f; + char *ptr; +} value_t; + +#ifndef SDCC_STACK_AUTO + static BOOL lower_case; + static pfn_outputchar output_char; + static void* p; + static value_t value; + static int charsOutputted; +#endif + +/****************************************************************************/ + +#ifdef SDCC_STACK_AUTO + #define OUTPUT_CHAR(c, p) { output_char (c, p); charsOutputted++; } +#else + #define OUTPUT_CHAR(c, p) _output_char (c) + static void _output_char( unsigned char c ) + { + output_char( c, p ); + charsOutputted++; + } +#endif + +/*--------------------------------------------------------------------------*/ + +#ifdef SDCC_STACK_AUTO + static void output_digit( unsigned char n, BOOL lower_case, pfn_outputchar output_char, void* p ) + { + register unsigned char c = n + (unsigned char)'0'; + + if (c > (unsigned char)'9') + { + c += (unsigned char)('A' - '0' - 10); + if (lower_case) + c += (unsigned char)('a' - 'A'); + } + output_char( c, p ); + } +#else + static void output_digit( unsigned char n ) + { + register unsigned char c = n + (unsigned char)'0'; + + if (c > (unsigned char)'9') + { + c += (unsigned char)('A' - '0' - 10); + if (lower_case) + c = tolower(c); + } + _output_char( c ); + } +#endif + +/*--------------------------------------------------------------------------*/ + +#ifdef SDCC_STACK_AUTO + #define OUTPUT_2DIGITS( B ) { output_2digits( B, lower_case, output_char, p ); charsOutputted += 2; } + static void output_2digits( unsigned char b, BOOL lower_case, pfn_outputchar output_char, void* p ) + { + output_digit( b>>4, lower_case, output_char, p ); + output_digit( b&0x0F, lower_case, output_char, p ); + } +#else + #define OUTPUT_2DIGITS( B ) output_2digits( B ) + static void output_2digits( unsigned char b ) + { + output_digit( b>>4 ); + output_digit( b&0x0F ); + } +#endif + +/*--------------------------------------------------------------------------*/ + +#if defined SDCC_STACK_AUTO +static void calculate_digit( value_t _AUTOMEM * value, unsigned char radix ) +{ + unsigned long ul = value->ul; + unsigned char _AUTOMEM * pb4 = &value->byte[4]; + unsigned char i = 32; + + do + { + *pb4 = (*pb4 << 1) | ((ul >> 31) & 0x01); + ul <<= 1; + + if (radix <= *pb4 ) + { + *pb4 -= radix; + ul |= 1; + } + } while (--i); + value->ul = ul; +} +#else +static void calculate_digit( unsigned char radix ) +{ + register unsigned long ul = value.ul; + register unsigned char b4 = value.byte[4]; + register unsigned char i = 32; + + do + { + b4 = (b4 << 1); + b4 |= (ul >> 31) & 0x01; + ul <<= 1; + + if (radix <= b4 ) + { + b4 -= radix; + ul |= 1; + } + } while (--i); + value.ul = ul; + value.byte[4] = b4; +} +#endif + +#if USE_FLOATS + +/* This is a very inefficient but direct approach, since we have no math + library yet (e.g. log()). + It does most of the modifiers, but has some restrictions. E.g. the + abs(float) shouldn't be bigger than an unsigned long (that's + about 4294967295), but still makes it usefull for most real-life + applications. +*/ + +#define DEFAULT_FLOAT_PRECISION 6 + +#ifdef SDCC_STACK_AUTO +#define OUTPUT_FLOAT(F, W, D, L, Z, S, P) output_float(F, W, D, L, Z, S, P, output_char, p) +static unsigned char +output_float (float f, unsigned char reqWidth, + signed char reqDecimals, + BOOL left, BOOL zero, BOOL sign, BOOL space, + pfn_outputchar output_char, void* p) +{ + unsigned char charsOutputted = 0; + #if defined (SDCC_mcs51) + char fpBuffer[16]; //mcs51 has only a small stack + #else + char fpBuffer[128]; + #endif +#else +#define OUTPUT_FLOAT(F, W, D, L, Z, S, P) output_float(F, W, D, L, Z, S, P) +static void +output_float (float f, unsigned char reqWidth, + signed char reqDecimals, + BOOL left, BOOL zero, BOOL sign, BOOL space) +{ + __xdata char fpBuffer[128]; +#endif //SDCC_STACK_AUTO + BOOL negative = 0; + unsigned long integerPart; + float rounding; + float decimalPart; + char fpBI=0, fpBD; + unsigned char minWidth, i; + signed char exp = -128; + + // save the sign + if (f<0) { + negative=1; + f=-f; + } + + if (f>0x00ffffff) { + // this part is from Frank van der Hulst + + for (exp = 0; f >= 10.0; exp++) f /=10.0; + for ( ; f < 1.0; exp--) f *=10.0; + + if (negative) { + OUTPUT_CHAR ('-', p); + } else { + if (sign) { + OUTPUT_CHAR ('+', p); + } + } + reqWidth = 0; + left = 0; + zero = 0; + sign = 0; + space = 0; + } + + // display some decimals as default + if (reqDecimals==-1) + reqDecimals=DEFAULT_FLOAT_PRECISION; + + // round the float + rounding = 0.5; + for (i=reqDecimals; i>0; i--) { + rounding /= 10.0; + } + f += rounding; + + // split the float + integerPart = f; + decimalPart = f - integerPart; + + // fill the buffer with the integerPart (in reversed order!) + while (integerPart) { + fpBuffer[fpBI++]='0' + integerPart%10; + integerPart /= 10; + } + if (!fpBI) { + // we need at least a 0 + fpBuffer[fpBI++]='0'; + } + + // fill buffer with the decimalPart (in normal order) + fpBD=fpBI; + + for (i=reqDecimals; i>0; i--) { + decimalPart *= 10.0; + // truncate the float + integerPart = decimalPart; + fpBuffer[fpBD++] = '0' + integerPart; + decimalPart -= integerPart; + } + + minWidth=fpBI; // we need at least these + minWidth+=reqDecimals?reqDecimals+1:0; // maybe these + if (negative || sign || space) + minWidth++; // and maybe even this :) + + if (!left && reqWidth>i) { + if (zero) { + if (negative) + { + OUTPUT_CHAR('-', p); + } + else if (sign) + { + OUTPUT_CHAR('+', p); + } + else if (space) + { + OUTPUT_CHAR(' ', p); + } + while (reqWidth-->minWidth) + { + OUTPUT_CHAR('0', p); + } + } else { + while (reqWidth-->minWidth) + { + OUTPUT_CHAR(' ', p); + } + if (negative) + { + OUTPUT_CHAR('-', p); + } + else if (sign) + { + OUTPUT_CHAR('+', p); + } + else if (space) + { + OUTPUT_CHAR(' ', p); + } + } + } else { + if (negative) + { + OUTPUT_CHAR('-', p); + } + else if (sign) + { + OUTPUT_CHAR('+', p); + } + else if (space) + { + OUTPUT_CHAR(' ', p); + } + } + + // output the integer part + i=fpBI-1; + do { + OUTPUT_CHAR (fpBuffer[i], p); + } while (i--); + + // ouput the decimal part + if (reqDecimals) { + OUTPUT_CHAR ('.', p); + i=fpBI; + while (reqDecimals--) + { + OUTPUT_CHAR (fpBuffer[i++], p); + } + } + + if (left && reqWidth>minWidth) { + while (reqWidth-->minWidth) + { + OUTPUT_CHAR(' ', p); + } + } + + if (exp != -128) { + OUTPUT_CHAR ('e', p); + if (exp<0) { + OUTPUT_CHAR ('-', p); + exp = -exp; + } + OUTPUT_CHAR ('0'+exp/10, p); + OUTPUT_CHAR ('0'+exp%10, p); + } +#ifdef SDCC_STACK_AUTO + return charsOutputted; +#else + return; +#endif //SDCC_STACK_AUTO +} +#endif //USE_FLOATS + +int _print_format (pfn_outputchar pfn, void* pvoid, const char *format, va_list ap) +{ + BOOL left_justify; + BOOL zero_padding; + BOOL prefix_sign; + BOOL prefix_space; + BOOL signed_argument; + BOOL char_argument; + BOOL long_argument; + BOOL float_argument; +#ifdef SDCC_STACK_AUTO + BOOL lower_case; + value_t value; + int charsOutputted; +#endif + BOOL lsd; + + unsigned char radix; + unsigned char width; + signed char decimals; + unsigned char length; + char c; + +#ifdef SDCC_STACK_AUTO + #define output_char pfn + #define p pvoid +#else + output_char = pfn; + p = pvoid; +#endif + + // reset output chars + charsOutputted = 0; + +#ifdef SDCC_ds390 + if (format==0) { + format=NULL_STRING; + } +#endif + + while( c=*format++ ) + { + if ( c=='%' ) + { + left_justify = 0; + zero_padding = 0; + prefix_sign = 0; + prefix_space = 0; + signed_argument = 0; + char_argument = 0; + long_argument = 0; + float_argument = 0; + radix = 0; + width = 0; + decimals = -1; + +get_conversion_spec: + + c = *format++; + + if (c=='%') { + OUTPUT_CHAR(c, p); + continue; + } + + if (isdigit(c)) { + if (decimals==-1) { + width = 10*width + (c - '0'); + if (width == 0) { + /* first character of width is a zero */ + zero_padding = 1; + } + } else { + decimals = 10*decimals + (c-'0'); + } + goto get_conversion_spec; + } + + if (c=='.') { + if (decimals==-1) decimals=0; + else + ; // duplicate, ignore + goto get_conversion_spec; + } + + if (islower(c)) + { + c = toupper(c); + lower_case = 1; + } + else + lower_case = 0; + + switch( c ) + { + case '-': + left_justify = 1; + goto get_conversion_spec; + case '+': + prefix_sign = 1; + goto get_conversion_spec; + case ' ': + prefix_space = 1; + goto get_conversion_spec; + case 'B': + char_argument = 1; + goto get_conversion_spec; + case 'L': + long_argument = 1; + goto get_conversion_spec; + + case 'C': + if( char_argument ) + c = va_arg(ap,char); + else + c = va_arg(ap,int); + OUTPUT_CHAR( c, p ); + break; + + case 'S': + PTR = va_arg(ap,ptr_t); + +#ifdef SDCC_ds390 + if (PTR==0) { + PTR=NULL_STRING; + length=NULL_STRING_LENGTH; + } else { + length = strlen(PTR); + } +#else + length = strlen(PTR); +#endif + if ( decimals == -1 ) + { + decimals = length; + } + if ( ( !left_justify ) && (length < width) ) + { + width -= length; + while( width-- != 0 ) + { + OUTPUT_CHAR( ' ', p ); + } + } + + while ( (c = *PTR) && (decimals-- > 0)) + { + OUTPUT_CHAR( c, p ); + PTR++; + } + + if ( left_justify && (length < width)) + { + width -= length; + while( width-- != 0 ) + { + OUTPUT_CHAR( ' ', p ); + } + } + break; + + case 'P': + PTR = va_arg(ap,ptr_t); + +#if defined (SDCC_ds390) + { + unsigned char memtype = value.byte[3]; + if (memtype >= 0x80) + c = 'C'; + else if (memtype >= 0x60) + c = 'P'; + else if (memtype >= 0x40) + c = 'I'; + else + c = 'X'; + } + OUTPUT_CHAR(c, p); + OUTPUT_CHAR(':', p); + OUTPUT_CHAR('0', p); + OUTPUT_CHAR('x', p); + OUTPUT_2DIGITS( value.byte[2] ); + OUTPUT_2DIGITS( value.byte[1] ); + OUTPUT_2DIGITS( value.byte[0] ); +#elif defined (SDCC_mcs51) + { + unsigned char memtype = value.byte[2]; + if (memtype >= 0x80) + c = 'C'; + else if (memtype >= 0x60) + c = 'P'; + else if (memtype >= 0x40) + c = 'I'; + else + c = 'X'; + } + OUTPUT_CHAR(c, p); + OUTPUT_CHAR(':', p); + OUTPUT_CHAR('0', p); + OUTPUT_CHAR('x', p); + if ((c != 'I' /* idata */) && + (c != 'P' /* pdata */)) + { + OUTPUT_2DIGITS( value.byte[1] ); + } + OUTPUT_2DIGITS( value.byte[0] ); +#else + OUTPUT_CHAR('0', p); + OUTPUT_CHAR('x', p); + OUTPUT_2DIGITS( value.byte[1] ); + OUTPUT_2DIGITS( value.byte[0] ); +#endif + break; + + case 'D': + case 'I': + signed_argument = 1; + radix = 10; + break; + + case 'O': + radix = 8; + break; + + case 'U': + radix = 10; + break; + + case 'X': + radix = 16; + break; + + case 'F': + float_argument=1; + break; + + default: + // nothing special, just output the character + OUTPUT_CHAR( c, p ); + break; + } + + if (float_argument) { + value.f=va_arg(ap,float); +#if !USE_FLOATS + PTR=""; + while (c=*PTR++) + { + OUTPUT_CHAR (c, p); + } + // treat as long hex + //radix=16; + //long_argument=1; + //zero_padding=1; + //width=8; +#else + // ignore b and l conversion spec for now +#ifdef SDCC_STACK_AUTO + charsOutputted += OUTPUT_FLOAT(value.f, width, decimals, left_justify, + zero_padding, prefix_sign, prefix_space); +#else + OUTPUT_FLOAT(value.f, width, decimals, left_justify, + zero_padding, prefix_sign, prefix_space); +#endif //SDCC_STACK_AUTO +#endif //USE_FLOATS + } else if (radix != 0) + { + // Apparently we have to output an integral type + // with radix "radix" + unsigned char MEM_SPACE_BUF store[6]; + unsigned char MEM_SPACE_BUF_PP *pstore = &store[5]; + + // store value in byte[0] (LSB) ... byte[3] (MSB) + if (char_argument) + { + value.l = va_arg(ap,char); + if (!signed_argument) + { + value.l &= 0xFF; + } + } + else if (long_argument) + { + value.l = va_arg(ap,long); + } + else // must be int + { + value.l = va_arg(ap,int); + if (!signed_argument) + { + value.l &= 0xFFFF; + } + } + + if ( signed_argument ) + { + if (value.l < 0) + value.l = -value.l; + else + signed_argument = 0; + } + + length=0; + lsd = 1; + + do { + value.byte[4] = 0; +#if defined SDCC_STACK_AUTO + calculate_digit(&value, radix); +#else + calculate_digit(radix); +#endif + if (!lsd) + { + *pstore = (value.byte[4] << 4) | (value.byte[4] >> 4) | *pstore; + pstore--; + } + else + { + *pstore = value.byte[4]; + } + length++; + lsd = !lsd; + } while( value.ul ); + + if (width == 0) + { + // default width. We set it to 1 to output + // at least one character in case the value itself + // is zero (i.e. length==0) + width=1; + } + + /* prepend spaces if needed */ + if (!zero_padding && !left_justify) + { + while ( width > (unsigned char) (length+1) ) + { + OUTPUT_CHAR( ' ', p ); + width--; + } + } + + if (signed_argument) // this now means the original value was negative + { + OUTPUT_CHAR( '-', p ); + // adjust width to compensate for this character + width--; + } + else if (length != 0) + { + // value > 0 + if (prefix_sign) + { + OUTPUT_CHAR( '+', p ); + // adjust width to compensate for this character + width--; + } + else if (prefix_space) + { + OUTPUT_CHAR( ' ', p ); + // adjust width to compensate for this character + width--; + } + } + + /* prepend zeroes/spaces if needed */ + if (!left_justify) + while ( width-- > length ) + { + OUTPUT_CHAR( zero_padding ? '0' : ' ', p ); + } + else + { + /* spaces are appended after the digits */ + if (width > length) + width -= length; + else + width = 0; + } + + /* output the digits */ + while( length-- ) + { + lsd = !lsd; + if (!lsd) + { + pstore++; + value.byte[4] = *pstore >> 4; + } + else + { + value.byte[4] = *pstore & 0x0F; + } +#ifdef SDCC_STACK_AUTO + output_digit( value.byte[4], lower_case, output_char, p ); + charsOutputted++; +#else + output_digit( value.byte[4] ); +#endif + } + if (left_justify) + while (width-- > 0) + { + OUTPUT_CHAR(' ', p); + } + } + } + else + { + // nothing special, just output the character + OUTPUT_CHAR( c, p ); + } + } + + return charsOutputted; +} + +/****************************************************************************/ diff --git a/device/lib/printf_tiny.c b/device/lib/printf_tiny.c new file mode 100644 index 0000000..78df2c5 --- /dev/null +++ b/device/lib/printf_tiny.c @@ -0,0 +1,295 @@ +/* Tiny printf routine for use with sdcc/mcs51 + * Copyright (c) 2004, Paul Stoffregen, paul@pjrc.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +/* + * This tiny printf uses minimal code space, and it is fully reentrant + * and register bank neutral (usually safe to call from within an + * interrupt routine). Code size is under 270 bytes. Only one library + * function is called (_gptrget, 41 bytes), in addition to calls to + * putchar(). + * + * Five simple formats are supported + * + * %d signed 16 bit integer decimal (-32768 to 32767) + * %u unsigned 16 bit integer decimal (0 to 65535) + * %s string, takes a 24 bit generic pointer + * %c character. You must explicitly cast to char in SDCC + * %x 16 bit integer in hex (0 to FFFF) + * + * For a more complete printf that supports longs, floating point and + * field width, try using printf_fast() or printf_large(). + */ + + +/* This removes the negative number code, causing "%d" to be the same + as "%u". If you don't care about printing negative numbers, this + will save 21 bytes of code. */ +/* #define ALWAYS_PRINT_UNSIGNED */ + +/* Directly output characters to the serial port using simple polling, + rather than calling putchar(). This saves 14 bytes, plus the size + of putchar. */ +/* #define DIRECT_SERIAL_OUTPUT */ + + + +/* extern void putchar(char ); */ + + +#define print_zero_flag PSW.5 + + +#if !defined(SDCC_mcs51) || defined(SDCC_USE_XSTACK) || defined(_SDCC_NO_ASM_LIB_FUNCS) +/* Does printf_tiny really work on ds390 and ds400? + If it does, enable them in the line above */ +#if defined(_SDCC_BUILD_LIB) +/* Disable all warnings if building a library */ +#pragma disable_warning 190 +#elif defined(SDCC_USE_XSTACK) +#warning "printf_tiny not built, does not support --xstack" +#elif defined(_SDCC_NO_ASM_LIB_FUNCS) +#warning "printf_tiny not built, _SDCC_NO_ASM_LIB_FUNCS defined" +#else +/* Disable "ISO C forbids an empty source file" wraning message */ +#pragma disable_warning 190 +#endif +#else /* defines are compatible with printf_tiny */ + + + +void printf_tiny(__code char *fmt, ...) __reentrant +{ + fmt; /* suppress unreferenced variable warning */ + + __asm + +printf_begin: + mov a, _bp /* r0 will point to va_args (stack) */ + add a, #253 + mov r0, a /* r0 points to MSB of fmt */ + mov dph, @r0 + dec r0 + mov dpl, @r0 /* dptr has address of fmt */ + dec r0 + + +printf_main_loop: + clr a + movc a, @a+dptr /* get next byte of fmt string */ + inc dptr + add a, #256 - 37 + jz printf_format /* check for '%' */ + add a, #37 + jz printf_end_h + lcall printf_putchar + sjmp printf_main_loop +printf_end_h: + ljmp printf_end + + +printf_format: + setb print_zero_flag + clr a + movc a, @a+dptr /* get next byte of data format */ + inc dptr + push dph + push dpl + + +printf_format_s: + /*cjne a, #'s', printf_format_c*/ + cjne a, #115, printf_format_c +printf_string: + /* print a string... just grab each byte with __gptrget */ + /* the user much pass a 24 bit generic pointer */ + mov b, @r0 /* b has type of address (generic *) */ + dec r0 + mov dph, @r0 + dec r0 + mov dpl, @r0 /* dptr has address of user's string */ + dec r0 +printf_str_loop: + lcall __gptrget + jz printf_format_done + inc dptr + lcall printf_putchar + sjmp printf_str_loop + + +printf_format_c: + /*cjne a, #'c', printf_format_d*/ + cjne a, #99, printf_format_d + dec r0 + mov a, @r0 /* Acc has the character to print */ + dec r0 + lcall printf_putchar + sjmp printf_format_done + + +printf_format_d: + /*cjne a, #'d', printf_format_u*/ + cjne a, #100, printf_format_x +#ifndef ALWAYS_PRINT_UNSIGNED + mov a, @r0 + jnb acc.7, printf_uint + dec r0 + mov a, @r0 + cpl a + add a, #1 + mov @r0, a + inc r0 + mov a, @r0 + cpl a + addc a, #0 + mov @r0, a + /*mov a, #'-'*/ + mov a, #45 + lcall printf_putchar +#endif + sjmp printf_uint + + +printf_format_x: + /*cjne a, #'x', printf_format_u*/ + cjne a, #120, printf_format_u + mov dph, @r0 + dec r0 + mov dpl, @r0 + dec r0 + clr a +printf_hex: + lcall printf_phex_lsn + mov a, dph + lcall printf_phex_msn + mov a, dph + lcall printf_phex_lsn + mov a, dpl + lcall printf_phex_msn + mov a, dpl + lcall printf_phex_lsn + jnb print_zero_flag, printf_format_done + /*mov a, #'0'*/ + mov a, #48 + lcall printf_putchar +printf_format_done: + pop dpl + pop dph + ljmp printf_main_loop + + +printf_format_u: + /*cjne a, #'u', printf_format_done*/ + cjne a, #117, printf_format_done +printf_uint: + mov a, @r0 + mov r2, a + dec r0 + mov a, @r0 + mov r1, a + dec r0 +printf_int2bcd: + mov r4, #16 + mov r5, #39 + lcall div_by_sub + mov r7, a + mov r4, #232 + mov r5, #3 + lcall div_by_sub + swap a + mov dph, a + mov r4, #100 + mov r5, #0 + lcall div_by_sub + orl dph, a + mov a, r1 + mov b, #10 + div ab + swap a + orl a, b + mov dpl, a + mov a, r7 + sjmp printf_hex + + + /* Divide r2/r1 by r5/r4 using successive subtraction + returns quotient in r2/r1 and remainder in acc. */ +div_by_sub: + mov r3, #0 +div_by_sub_loop: + inc r3 + clr c + mov a, r1 + subb a, r4 + mov r1, a + mov a, r2 + subb a, r5 + mov r2, a + jnc div_by_sub_loop + dec r3 + mov a, r1 + add a, r4 + mov r1, a + mov a, r2 + addc a, r5 + mov r2, a + mov a, r3 + ret + + + /* print a hex digit, either upper 4 bit (msn) or lower 4 bits (lsn) */ +printf_phex_msn: + swap a +printf_phex_lsn: + anl a, #15 + jnz printf_phex_ok + jb print_zero_flag, printf_ret +printf_phex_ok: + clr print_zero_flag + add a, #0x90 + da a + addc a, #0x40 + da a +printf_putchar: +#ifdef DIRECT_SERIAL_OUTPUT + jnb ti, printf_putchar + clr ti + mov sbuf, a +#else + push dph + push dpl + push b + mov dpl, a + mov a, r0 + push acc + lcall _putchar + pop acc + mov r0, a + pop b + pop dpl + pop dph +#endif +printf_ret: + ret + + +printf_end: + __endasm; +} + + +#endif /* defines compatible with printf_tiny */ diff --git a/device/lib/printfl.c b/device/lib/printfl.c new file mode 100644 index 0000000..a5d2211 --- /dev/null +++ b/device/lib/printfl.c @@ -0,0 +1,198 @@ +/*----------------------------------------------------------------- + printfl.c - source file for reduced version of printf + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + 2001060401: Improved by was@icb.snz.chel.su +-------------------------------------------------------------------------*/ + + +/* following formats are supported :- + format output type argument-type + %d decimal int + %ld decimal long + %hd decimal char + %x hexadecimal int + %lx hexadecimal long + %hx hexadecimal char + %o octal int + %lo octal long + %ho octal char + %c character char + %s character generic pointer +*/ + +#include +#include +#include +#ifndef __ds390 +/* just for the SP */ +#include <8051.h> +#endif + +static __data char radix ; +static __bit long_flag = 0; +static __bit string_flag =0; +static __bit char_flag = 0; +static char * __data str ; +static __data long val; + +/* This great loop fails with the ds390 port (2003-01-13). + + At the beginning resp. end of the loop the compiler inserts a "push ar2" + resp. "pop ar2", which badly interfers with the push/pop in the source. + + Library functions should be rock solid and portable. There's an _ltoa in + the library, so let's use it and don't reinvent the wheel. + + Bernhard +*/ + +#if NICE_LIFO_IMPLEMENTATION_BUT_NOT_PORTABLE +static __data volatile char ch; +static __bit sign; + +static void pval(void) +{ + volatile char sp; + unsigned long lval; + sp = SP; + + if (val < 0 && radix != 16) + { + lval = -val; + sign = 1; + } + else { sign = 0; lval = val;} + + if (!long_flag) { + lval &= 0x0000ffff; + } + if (char_flag) { + lval &= 0x000000ff; + } + + do + { + +# if 1 + if(radix != 16) ch = (lval % radix) + '0'; + else ch = "0123456789ABCDEF"[(unsigned char)lval & 0x0f]; + __asm push _ch __endasm; + lval /= radix; +# else + // This only looks more efficient, but isn't. see the .map + ch = (lval % radix) + '0'; + if (ch>'9') ch+=7; + __asm push _ch __endasm; + lval /= radix; +# endif + } + while (lval); + + if (sign) { + ch = '-'; + __asm push _ch __endasm; + } + + while (sp != SP) { + __asm pop _ch __endasm; + putchar(ch); + } +} +#endif + +void printf_small (char * fmt, ... ) __reentrant +{ + va_list ap ; + + va_start(ap,fmt); + + for (; *fmt ; fmt++ ) { + if (*fmt == '%') { + long_flag = string_flag = char_flag = 0; + fmt++ ; + switch (*fmt) { + case 'l': + long_flag = 1; + fmt++; + break; + case 'h': + char_flag = 1; + fmt++; + } + + switch (*fmt) { + case 's': + string_flag = 1; + break; + case 'd': + radix = 10; + break; + case 'x': + radix = 16; + break; + case 'c': + radix = 0; + break; + case 'o': + radix = 8; + break; + } + + if (string_flag) { + str = va_arg(ap, char *); + while (*str) putchar(*str++); + continue ; + } + + if (long_flag) + val = va_arg(ap,long); + else + if (char_flag) + val = va_arg(ap,char); + else + val = va_arg(ap,int); + +#if NICE_LIFO_IMPLEMENTATION_BUT_NOT_PORTABLE + if (radix) pval(); +#else + if (radix) + { + static char __idata buffer[12]; /* 37777777777(oct) */ + char __idata * stri; + + _ltoa (val, buffer, radix); + stri = buffer; + while (*stri) + { + putchar (*stri); + stri++; + } + } +#endif + else + putchar((char)val); + + } else + putchar(*fmt); + } +} diff --git a/device/lib/puts.c b/device/lib/puts.c new file mode 100644 index 0000000..a948aed --- /dev/null +++ b/device/lib/puts.c @@ -0,0 +1,36 @@ +/*----------------------------------------------------------------- + puts.c - source file for ANSI Function puts + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This library is free software; you can redistribute it and/or modify it + under the terms of the GNU Library General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Library General Public License for more details. + + You should have received a copy of the GNU Library General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +extern void putchar(char); + +int puts (char *s) +{ + int i = 0; + while (*s){ + putchar(*s++); + i++; + } + putchar('\n'); + return i+1; +} diff --git a/device/lib/rand.c b/device/lib/rand.c new file mode 100644 index 0000000..a6c118f --- /dev/null +++ b/device/lib/rand.c @@ -0,0 +1,38 @@ +/*------------------------------------------------------------------------- + rand.c - random number generator + + Written By - Maarten Brock, sourceforge.brock@dse.nl (2006) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +static unsigned long int next = 1; + +int rand(void) +{ + next = next * 1103515245UL + 12345; + return (unsigned int)(next/65536) % (RAND_MAX + 1U); +} + +void srand(unsigned int seed) +{ + next = seed; +} diff --git a/device/lib/ser_ir.c b/device/lib/ser_ir.c new file mode 100644 index 0000000..2523d74 --- /dev/null +++ b/device/lib/ser_ir.c @@ -0,0 +1,140 @@ +/*------------------------------------------------------------------------- + ser_ir.c - source file for serial routines + + Written By - Josef Wolf (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + +-------------------------------------------------------------------------*/ +#include "ser_ir.h" + +/* This file implements a serial interrupt handler and its supporting +* routines. Compared with the existing serial.c and _ser.c it has +* following advantages: +* - You can specify arbitrary buffer sizes (umm, up to 255 bytes), +* so it can run on devices with _little_ memory like at89cx051. +* - It won't overwrite characters which already are stored in the +* receive-/transmit-buffer. +*/ + +/* BUG: those definitions (and the #include) should be set dynamically +* (while linking or at runtime) to make this file a _real_ library. +*/ +#include <8051.h> +#define XBUFLEN 4 +#define RBUFLEN 8 + +/* You might want to specify idata, pdata or xdata for the buffers */ +static unsigned char __pdata rbuf[RBUFLEN], xbuf[XBUFLEN]; +static unsigned char rcnt, xcnt, rpos, xpos; +static __bit busy; + +void ser_init (void) +{ + ES = 0; + rcnt = xcnt = rpos = xpos = 0; /* init buffers */ + busy = 0; + SCON = 0x50; + PCON |= 0x80; /* SMOD = 1; */ + TMOD &= 0x0f; /* use timer 1 */ + TMOD |= 0x20; + TL1 = -3; TH1 = -3; TR1 = 1; /* 19200bps with 11.059MHz crystal */ + ES = 1; +} + +void ser_handler (void) __interrupt 4 +{ + if (RI) { + RI = 0; + /* don't overwrite chars already in buffer */ + if (rcnt < RBUFLEN) + rbuf [(unsigned char)(rpos+rcnt++) % RBUFLEN] = SBUF; + } + if (TI) { + TI = 0; + if (busy = xcnt) { /* Assignment, _not_ comparison! */ + xcnt--; + SBUF = xbuf [xpos++]; + if (xpos >= XBUFLEN) + xpos = 0; + } + } +} + +void ser_putc (unsigned char c) +{ + while (xcnt >= XBUFLEN) /* wait for room in buffer */ + ; + ES = 0; + if (busy) { + xbuf[(unsigned char)(xpos+xcnt++) % XBUFLEN] = c; + } else { + SBUF = c; + busy = 1; + } + ES = 1; +} + +unsigned char ser_getc (void) +{ + unsigned char c; + while (!rcnt) /* wait for character */ + ; + ES = 0; + rcnt--; + c = rbuf [rpos++]; + if (rpos >= RBUFLEN) + rpos = 0; + ES = 1; + return (c); +} +#pragma save +#pragma noinduction +void ser_puts (unsigned char *s) +{ + unsigned char c; + while (c=*s++) { + if (c == '\n') ser_putc ('\r'); + ser_putc (c); + } +} +#pragma restore +void ser_gets (unsigned char *s, unsigned char len) +{ + unsigned char pos, c; + + pos = 0; + while (pos <= len) { + c = ser_getc (); + if (c == '\r') continue; /* discard CR's */ + s[pos++] = c; + if (c == '\n') break; /* NL terminates */ + } + s[pos] = '\0'; +} + +unsigned char ser_can_xmt (void) +{ + return XBUFLEN - xcnt; +} + +unsigned char ser_can_rcv (void) +{ + return rcnt; +} diff --git a/device/lib/ser_ir_cts_rts.c b/device/lib/ser_ir_cts_rts.c new file mode 100644 index 0000000..51069fe --- /dev/null +++ b/device/lib/ser_ir_cts_rts.c @@ -0,0 +1,199 @@ +/*------------------------------------------------------------------------- + ser_ir.c - source file for serial routines + + Written By - Josef Wolf (1999) + + Revisions: + 1.0 Bela Torok Jul. 2000 + RTS / CTS protocol added + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + +-------------------------------------------------------------------------*/ + +/* This file implements a serial interrupt handler and its supporting +* routines. Compared with the existing serial.c and _ser.c it has +* following advantages: +* - You can specify arbitrary buffer sizes (umm, up to 255 bytes), +* so it can run on devices with _little_ memory like at89cx051. +* - It won't overwrite characters which already are stored in the +* receive-/transmit-buffer. +*/ + +/* BUG: those definitions (and the #include) should be set dynamically +* (while linking or at runtime) to make this file a _real_ library. +*/ + +/* RTS/CTS protocol howto: + + + Shematic of cable for RTS/CTS protocol (B. Torok - Jun. 2000) + +<- DB9 female connector -><- RS232 driver/receiver -><- 8051 system -> + connect to PC e.g. MAX232 + + RS232 TTL + level level + + DCD DTR + Pin1---Pin4 + Transmitters/Receivers + RXD + Pin2-----------------------------<<<-------------------TXD + + TXD + Pin3----------------------------->>>-------------------RXD + + GND + Pin5---------------------------------------------------GND + + DSR CTS + Pin6---Pin8----------------------<<<-------------------CTS (see #define CTS) + + RTS + Pin7----------------------------->>>-------------------RTS (see #define RTS) +*/ + + +#include <8051.h> +#include "ser_ir.h" + +#define TXBUFLEN 3 +#define RXBUFLEN 18 // The minimum rx buffer size for safe communications + // is 17. (The UART in the PC has a 16-byte FIFO.) +// TXBUFLEN & RXBUFLEN can be highher if rxbuf[] and txbuf[] is in xdata, max size is limited to 256! + +#define THRESHOLD 16 +#define ENABLE 0 +#define DISABLE 1 + +#define CTS P3_6 // CTS & RTS can be assigned to any free pins +#define RTS P3_7 + +// You might want to specify idata, pdata or xdata for the buffers +static unsigned char rxbuf[RXBUFLEN], txbuf[TXBUFLEN]; +static unsigned char rxcnt, txcnt, rxpos, txpos; +static bit busy; + +void ser_init() +{ + ES = 0; + rxcnt = txcnt = rxpos = txpos = 0; // init buffers + busy = 0; + SCON = 0x50; // mode 1 - 8-bit UART + PCON |= 0x80; // SMOD = 1; + TMOD &= 0x0f; // use timer 1 + TMOD |= 0x20; +// TL1 = TH1 = 256 - 104; // 600bps with 12 MHz crystal +// TL1 = TH1 = 256 - 52; // 1200bps with 12 MHz crystal +// TL1 = TH1 = 256 - 26; // 2400bps with 12 MHz crystal + TL1 = TH1 = 256 - 13; // 4800bps with 12 MHz crystal + + TR1 = 1; // Enable timer 1 + ES = 1; + + CTS = ENABLE; +} + +void ser_handler(void) interrupt 4 +{ + if (RI) { + RI = 0; + /* don't overwrite chars already in buffer */ + if(rxcnt < RXBUFLEN) rxbuf [(unsigned char)(rxpos + rxcnt++) % RXBUFLEN] = SBUF; + if(rxcnt >= (RXBUFLEN - THRESHOLD)) CTS = DISABLE; + } + + if (TI) { + TI = 0; + if (busy = txcnt) { /* Assignment, _not_ comparison! */ + txcnt--; + SBUF = txbuf[txpos++]; + if(txpos >= TXBUFLEN) txpos = 0; + } + } +} + +void ser_putc(unsigned char c) +{ + while(txcnt >= TXBUFLEN); // wait for room in buffer + + while(RTS == DISABLE); + + ES = 0; + if (busy) { + txbuf[(unsigned char)(txpos + txcnt++) % TXBUFLEN] = c; + } else { + SBUF = c; + busy = 1; + } + ES = 1; +} + +unsigned char ser_getc(void) +{ + unsigned char c; + + while (!rxcnt) { // wait for a character + CTS = ENABLE; + } + + ES = 0; + rxcnt--; + c = rxbuf[rxpos++]; + if (rxpos >= RXBUFLEN) rxpos = 0; + ES = 1; + return (c); +} + +#pragma save +#pragma noinduction +void ser_puts(unsigned char *s) +{ + unsigned char c; + while (c= *s++) { + if (c == '\n') ser_putc('\r'); + ser_putc (c); + } +} +#pragma restore + +void ser_gets(unsigned char *s, unsigned char len) +{ + unsigned char pos, c; + + pos = 0; + while (pos <= len) { + c = ser_getc(); + if (c == '\r') continue; // discard CR's + s[pos++] = c; + if (c == '\n') break; // NL terminates + } + s[pos] = '\0'; // terminate string +} + +unsigned char ser_can_xmt(void) +{ + return TXBUFLEN - txcnt; +} + +unsigned char ser_can_rcv(void) +{ + return rxcnt; +} diff --git a/device/lib/serial.c b/device/lib/serial.c new file mode 100644 index 0000000..58ddba1 --- /dev/null +++ b/device/lib/serial.c @@ -0,0 +1,90 @@ +//---------------------------------------------------------------------------- +//Written by Dmitry S. Obukhov, 1996 +// dso@usa.net +//---------------------------------------------------------------------------- +//This module implements serial interrupt handler and IO routinwes using +//two 256 byte cyclic buffers. Bit variables can be used as flags for +//real-time kernel tasks +//Last modified 6 Apr 97 +//---------------------------------------------------------------------------- + +//This module contains definition of I8051 registers +#include "8052.h" + + +static unsigned char __xdata stx_index_in, srx_index_in, stx_index_out, srx_index_out; +static unsigned char __xdata stx_buffer[0x100]; +static unsigned char __xdata srx_buffer[0x100]; + +static __bit work_flag_byte_arrived; +static __bit work_flag_buffer_transfered; +static __bit tx_serial_buffer_empty; +static __bit rx_serial_buffer_empty; + + +void serial_init(void) +{ + SCON = 0x50; + T2CON = 0x34; + PS = 1; + T2CON = 0x34; + RCAP2H = 0xFF; + RCAP2L = 0xDA; + + RI = 0; + TI = 0; + + stx_index_in = srx_index_in = stx_index_out = srx_index_out = 0; + rx_serial_buffer_empty = tx_serial_buffer_empty = 1; + work_flag_buffer_transfered = 0; + work_flag_byte_arrived = 0; + ES=1; +} + +void serial_interrupt_handler(void) __interrupt 4 __using 1 +{ + ES=0; + if ( RI ) + { + RI = 0; + srx_buffer[srx_index_in++]=SBUF; + work_flag_byte_arrived = 1; + rx_serial_buffer_empty = 0; + } + if ( TI ) + { + TI = 0; + if (stx_index_out == stx_index_in ) + { + tx_serial_buffer_empty = 1; + work_flag_buffer_transfered = 1; + } + else SBUF = stx_buffer[stx_index_out++]; + } + ES=1; +} + +//Next two functions are interface + +void serial_putc(unsigned char c) +{ + stx_buffer[stx_index_in++]=c; + ES=0; + if ( tx_serial_buffer_empty ) + { + tx_serial_buffer_empty = 0; + TI=1; + } + ES=1; +} + +unsigned char serial_getc(void) +{ + unsigned char tmp = srx_buffer[srx_index_out++]; + ES=0; + if ( srx_index_out == srx_index_in) rx_serial_buffer_empty = 1; + ES=1; + return tmp; +} + +//END OF MODULE diff --git a/device/lib/sincosf.c b/device/lib/sincosf.c new file mode 100644 index 0000000..e4750e4 --- /dev/null +++ b/device/lib/sincosf.c @@ -0,0 +1,87 @@ +/* sincosf.c: Computes sin or cos of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +#include +#include +#include + +#define r1 -0.1666665668E+0 +#define r2 0.8333025139E-2 +#define r3 -0.1980741872E-3 +#define r4 0.2601903036E-5 + +/* PI=C1+C2 */ +#define C1 3.140625 +#define C2 9.676535897E-4 + +/*A reasonable value for YMAX is the int part of PI*B**(t/2)=3.1416*2**(12)*/ +#define YMAX 12867.0 + +float sincosf(const float x, const int iscos) +{ + float y, f, r, g, XN; + int N; + BOOL sign; + + if(iscos) + { + y=fabsf(x)+HALF_PI; + sign=0; + } + else + { + if(x<0.0) + { y=-x; sign=1; } + else + { y=x; sign=0; } + } + + if(y>YMAX) + { + errno=ERANGE; + return 0.0; + } + + /*Round y/PI to the nearest integer*/ + N=((y*iPI)+0.5); /*y is positive*/ + + /*If N is odd change sign*/ + if(N&1) sign=!sign; + + XN=N; + /*Cosine required? (is done here to keep accuracy)*/ + if(iscos) XN-=0.5; + + y=fabsf(x); + r=(int)y; + g=y-r; + f=((r-XN*C1)+g)-XN*C2; + + g=f*f; + if(g>EPS2) //Used to be if(fabsf(f)>EPS) + { + r=(((r4*g+r3)*g+r2)*g+r1)*g; + f+=f*r; + } + return (sign?-f:f); +} diff --git a/device/lib/sincoshf.c b/device/lib/sincoshf.c new file mode 100644 index 0000000..c4e877b --- /dev/null +++ b/device/lib/sincoshf.c @@ -0,0 +1,90 @@ +/* sincoshf.c: Computes sinh or cosh of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +#include +#include +#include + +#define P0 -0.713793159E+1 +#define P1 -0.190333999E+0 +#define Q0 -0.428277109E+2 +#define Q1 0.100000000E+1 + +#define P(z) (P1*z+P0) +#define Q(z) (Q1*z+Q0) + +#define K1 0.69316101074218750000E+0 /* ln(v) */ +#define K2 0.24999308500451499336E+0 /* v**(-2) */ +#define K3 0.13830277879601902638E-4 /* v/2-1 */ + +//WMAX is defined as ln(HUGE_VALF)-ln(v)+0.69 +#define WMAX 44.93535952E+0 +//WBAR 0.35*(b+1) +#define WBAR 1.05 +#define YBAR 9.0 /*Works for me*/ + +float sincoshf(const float x, const int iscosh) +{ + float y, w, z; + BOOL sign; + + if (x<0.0) { y=-x; sign=1; } + else { y=x; sign=0; } + + if ((y>1.0) || iscosh) + { + if(y>YBAR) + { + w=y-K1; + if (w>WMAX) + { + errno=ERANGE; + z=HUGE_VALF; + } + else + { + z=expf(w); + z+=K3*z; + } + } + else + { + z=expf(y); + w=1.0/z; + if(!iscosh) w=-w; + z=(z+w)*0.5; + } + if(sign) z=-z; + } + else + { + if (y + +float sincosf(const float x, const int iscos); + +float sinf(const float x) _FLOAT_FUNC_REENTRANT +{ + if (x==0.0) return 0.0; + return sincosf(x, 0); +} diff --git a/device/lib/sinhf.c b/device/lib/sinhf.c new file mode 100644 index 0000000..81c2bb7 --- /dev/null +++ b/device/lib/sinhf.c @@ -0,0 +1,28 @@ +/* sinhf.c: Computes sinh(x) where x is a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +#include + +float sincoshf(const float x, const int iscosh); + +float sinhf(const float x) _FLOAT_FUNC_REENTRANT +{ + return sincoshf(x, 0); +} diff --git a/device/lib/small/Makefile.in b/device/lib/small/Makefile.in new file mode 100644 index 0000000..472b701 --- /dev/null +++ b/device/lib/small/Makefile.in @@ -0,0 +1,10 @@ +all: + $(MAKE) -C ../mcs51 all + cp ../mcs51/*.rel . + touch dummy.rel + +clean: + rm -f *.rel + +distclean: clean + rm -f Makefile \ No newline at end of file diff --git a/device/lib/sprintf.c b/device/lib/sprintf.c new file mode 100644 index 0000000..7232f8e --- /dev/null +++ b/device/lib/sprintf.c @@ -0,0 +1,54 @@ +/*------------------------------------------------------------------------- + sprintf.c - formatted output conversion + + Written By - Martijn van Balen aed@iae.nl (1999) + Refactored by - Maarten Brock (2004) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include +#include + +static void put_char_to_string( char c, void* p ) _REENTRANT +{ + char **buf = (char **)p; + *(*buf)++ = c; +} + +int vsprintf (char *buf, const char *format, va_list ap) +{ + int i; + i = _print_format( put_char_to_string, &buf, format, ap ); + *buf = 0; + return i; +} + +int sprintf (char *buf, const char *format, ...) +{ + va_list arg; + int i; + + va_start (arg, format); + i = _print_format( put_char_to_string, &buf, format, arg ); + *buf = 0; + va_end (arg); + + return i; +} diff --git a/device/lib/sqrtf.c b/device/lib/sqrtf.c new file mode 100644 index 0000000..740fac7 --- /dev/null +++ b/device/lib/sqrtf.c @@ -0,0 +1,51 @@ +/* sqrtf.c: Computes square root of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +#include +#include + +float sqrtf(const float x) _FLOAT_FUNC_REENTRANT +{ + float f, y; + int n; + + if (x==0.0) return x; + else if (x==1.0) return 1.0; + else if (x<0.0) + { + errno=EDOM; + return 0.0; + } + f=frexpf(x, &n); + y=0.41731+0.59016*f; /*Educated guess*/ + /*For a 24 bit mantisa (float), two iterations are sufficient*/ + y+=f/y; + y=ldexpf(y, -2) + f/y; /*Faster version of 0.25 * y + f/y*/ + + if (n&1) + { + y*=0.7071067812; + ++n; + } + return ldexpf(y, n/2); +} diff --git a/device/lib/tancotf.c b/device/lib/tancotf.c new file mode 100644 index 0000000..7269612 --- /dev/null +++ b/device/lib/tancotf.c @@ -0,0 +1,85 @@ +/* tancotf.c: Computes tan or cot of a 32-bit float as outlined in [1] + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +#include +#include + +#define P0 0.100000000E+1 +#define P1 -0.958017723E-1 +#define Q0 0.100000000E+1 +#define Q1 -0.429135777E+0 +#define Q2 0.971685835E-2 + +#define C1 1.5703125 +#define C2 4.83826794897E-4 + +#define P(f,g) (P1*g*f+f) +#define Q(g) ((Q2*g+Q1)*g+Q0) + +//A reasonable choice for YMAX is the integer part of B**(t/2)*PI/2: +#define YMAX 6433.0 + +float tancotf(const float x, const int iscotan) +{ + float f, g, xn, xnum, xden; + int n; + + if (fabsf(x) > YMAX) + { + errno = ERANGE; + return 0.0; + } + + /*Round x*2*PI to the nearest integer*/ + n=(x*TWO_O_PI+(x>0.0?0.5:-0.5)); /*works for +-x*/ + xn=n; + + xnum=(int)x; + xden=x-xnum; + f=((xnum-xn*C1)+xden)-xn*C2; + + if (fabsf(f) < EPS) + { + xnum = f; + xden = 1.0; + } + else + { + g = f*f; + xnum = P(f,g); + xden = Q(g); + } + + if(n&1) + //xn is odd + { + if(iscotan) return (-xnum/xden); + else return (-xden/xnum); + } + else + { + if(iscotan) return (xden/xnum); + else return (xnum/xden); + } +} + diff --git a/device/lib/tanf.c b/device/lib/tanf.c new file mode 100644 index 0000000..2ba7400 --- /dev/null +++ b/device/lib/tanf.c @@ -0,0 +1,29 @@ +/* tanf.c: Computes tan(x) where x is a 32-bit float. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* Version 1.0 - Initial release */ + +#include + +float tancotf(const float x, const int iscot); + +float tanf(const float x) _FLOAT_FUNC_REENTRANT +{ + return tancotf(x, 0); +} + diff --git a/device/lib/tanhf.c b/device/lib/tanhf.c new file mode 100644 index 0000000..9fc7e53 --- /dev/null +++ b/device/lib/tanhf.c @@ -0,0 +1,60 @@ +/* tanhf.c: Computes tanh(x) where x is a 32-bit float as outlined in [1]. + + Copyright (C) 2001, 2002 Jesus Calvino-Fraga, jesusc@ieee.org + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/* [1] William James Cody and W. M. Waite. _Software manual for the + elementary functions_, Englewood Cliffs, N.J.:Prentice-Hall, 1980. */ + +/* Version 1.0 - Initial release */ + +#include +#include + +#define P0 -0.8237728127E+0 +#define P1 -0.3831010665E-2 +#define Q0 0.2471319654E+1 +#define Q1 0.1000000000E+1 + +/* ln(3)/2 */ +#define K1 0.5493061443E+0 +/* SBIG=[ln(2)+(t+1)*ln(B)]/2 */ +#define SBIG 9.01091 + +#define P(g) ((P1*g+P0)*g) +#define Q(g) (Q1*g+Q0) + +float tanhf(const float x) _FLOAT_FUNC_REENTRANT +{ + float f, g, r; + + f=fabsf(x); + if(f>SBIG) r=1.0; + else if(f>K1) + { + r=0.5-1.0/(expf(f+f)+1.0); + r+=r; + } + else if(f +#include + +// please note that the tm structure has the years since 1900, +// but time returns the seconds since 1970 + +/* You need some kind of real time clock for the time() function. + Either a rtc-chip or some kind of DCF device will do. For TINI, the + HAVE_RTC is defined in tinibios.h + If not, the conversion routines still work. +*/ + +#ifndef HAVE_RTC +unsigned char RtcRead(struct tm *timeptr) { + // no real time hardware + timeptr; // hush the compiler + return 0; +} +#endif + +// return the calendar time, seconds since the Epoch (Jan 1 1970 00:00:00) +time_t time(time_t *timeptr) { + struct tm now; + time_t t=-1; + + if (RtcRead(&now)) { + t=mktime(&now); + } + if (timeptr) { + *timeptr=t; + } + return t; +} + +static _CODE char monthDays[]={31,28,31,30,31,30,31,31,30,31,30,31}; + +_CODE char * _CODE __month[]={"Jan","Feb","Mar","Apr","May","Jun", + "Jul","Aug","Sep","Oct","Nov","Dec"}; + +_CODE char * _CODE __day[]={"Sun","Mon","Tue","Wed","Thu","Fri","Sat"}; + +static char ascTimeBuffer[32]; + +// validate the tm structure +static void CheckTime(struct tm *timeptr) { + // we could do some normalization here, e.g. + // change 40 october to 9 november + #if !__TIME_UNSIGNED + if (timeptr->tm_sec<0) timeptr->tm_sec=0; + if (timeptr->tm_min<0) timeptr->tm_min=0; + if (timeptr->tm_hour<0) timeptr->tm_hour=0; + if (timeptr->tm_wday<0) timeptr->tm_wday=0; + if (timeptr->tm_mon<0) timeptr->tm_mon=0; + #endif + + if (timeptr->tm_sec>59) timeptr->tm_sec=59; + if (timeptr->tm_min>59) timeptr->tm_min=59; + if (timeptr->tm_hour>23) timeptr->tm_hour=23; + if (timeptr->tm_wday>6) timeptr->tm_wday=6; + if (timeptr->tm_mday<1) timeptr->tm_mday=1; + else if (timeptr->tm_mday>31) timeptr->tm_mday=31; + if (timeptr->tm_mon>11) timeptr->tm_mon=11; + if (timeptr->tm_year<0) timeptr->tm_year=0; +} + +// format the time into "Sat Feb 17 17:45:23 2001\n" +char *asctime(struct tm *timeptr) { + CheckTime(timeptr); + sprintf (ascTimeBuffer, "%s %s %2d %02d:%02d:%02d %04d\n", + __day[timeptr->tm_wday], __month[timeptr->tm_mon], timeptr->tm_mday, + timeptr->tm_hour, timeptr->tm_min, timeptr->tm_sec, + timeptr->tm_year+1900); + return ascTimeBuffer; +} + +char *ctime(time_t *timep) { + return asctime(localtime(timep)); +} + +static struct tm lastTime; + +/* convert calendar time (seconds since 1970) to broken-time + This only works for dates between 01-01-1970 00:00:00 and + 19-01-2038 03:14:07 + + A leap year is ((((year%4)==0) && ((year%100)!=0)) || ((year%400)==0)) + but since we have no fancy years between 1970 and 2038 we can do: +*/ + +#define LEAP_YEAR(year) ((year%4)==0) + +// forget about timezones for now +struct tm *localtime(time_t *timep) { + return gmtime(timep); +} + +struct tm *gmtime(time_t *timep) { + unsigned long epoch=*timep; + unsigned int year; + unsigned char month, monthLength; + unsigned long days; + + lastTime.tm_sec=epoch%60; + epoch/=60; // now it is minutes + lastTime.tm_min=epoch%60; + epoch/=60; // now it is hours + lastTime.tm_hour=epoch%24; + epoch/=24; // now it is days + lastTime.tm_wday=(epoch+4)%7; + + year=1970; + days=0; + while((days += (LEAP_YEAR(year) ? 366 : 365)) <= epoch) { + year++; + } + lastTime.tm_year=year-1900; + + days -= LEAP_YEAR(year) ? 366 : 365; + epoch -= days; // now it is days in this year, starting at 0 + lastTime.tm_yday=epoch; + + days=0; + month=0; + monthLength=0; + for (month=0; month<12; month++) { + if (month==1) { // februari + if (LEAP_YEAR(year)) { + monthLength=29; + } else { + monthLength=28; + } + } else { + monthLength = monthDays[month]; + } + + if (epoch>=monthLength) { + epoch-=monthLength; + } else { + break; + } + } + lastTime.tm_mon=month; + lastTime.tm_mday=epoch+1; + + lastTime.tm_isdst=0; + + return &lastTime; +} + +// convert broken time to calendar time (seconds since 1970) +time_t mktime(struct tm *timeptr) { + int year=timeptr->tm_year+1900, month=timeptr->tm_mon, i; + long seconds; + + CheckTime(timeptr); + + // seconds from 1970 till 1 jan 00:00:00 this year + seconds= (year-1970)*(60*60*24L*365); + + // add extra days for leap years + for (i=1970; itm_mday-1)*60*60*24L; + seconds+= timeptr->tm_hour*60*60L; + seconds+= timeptr->tm_min*60; + seconds+= timeptr->tm_sec; + return seconds; +} + diff --git a/device/lib/vprintf.c b/device/lib/vprintf.c new file mode 100644 index 0000000..07b5cac --- /dev/null +++ b/device/lib/vprintf.c @@ -0,0 +1,50 @@ +/*------------------------------------------------------------------------- + vprintf.c - formatted output conversion + + Written By - Martijn van Balen aed@iae.nl (1999) + Refactored by - Maarten Brock (2004) + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include +#include + +static void put_char_to_stdout( char c, void* p ) _REENTRANT +{ + p; //make compiler happy + putchar( c ); +} + +int vprintf (const char *format, va_list ap) +{ + return _print_format( put_char_to_stdout, NULL, format, ap ); +} + +int printf (const char *format, ...) +{ + va_list arg; + int i; + + va_start (arg, format); + i = _print_format( put_char_to_stdout, NULL, format, arg ); + va_end (arg); + + return i; +} diff --git a/device/lib/z80/Makefile.in b/device/lib/z80/Makefile.in new file mode 100644 index 0000000..9a8345b --- /dev/null +++ b/device/lib/z80/Makefile.in @@ -0,0 +1,78 @@ +# libc/z80 Makefile + +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ + +LIB_TYPE = @LIB_TYPE@ + +TOPDIR = ../../.. + +SCC = $(TOPDIR)/bin/sdcc -mz80 +SAS = $(TOPDIR)/bin/as-z80 + +PORTDIR = ../build/z80 + +include $(srcdir)/../incl.mk + +Z80_FLOAT = $(COMMON_FLOAT) + +Z80_INT = $(COMMON_INT) + +Z80_LONG = $(COMMON_LONG) \ + _divulong.c \ + _mullong.c + +Z80_SDCC = $(COMMON_SDCC) \ + _itoa.c \ + _ltoa.c \ + _startup.c \ + sprintf.c \ + vprintf.c + +Z80SOURCES = $(addprefix ../,$(Z80_FLOAT) $(Z80_INT) $(Z80_LONG) $(Z80_SDCC)) +Z8OBJECTS = $(patsubst %.c,%.o,$(Z80_FLOAT) $(Z80_INT) $(Z80_LONG) $(Z80_SDCC)) + +OBJ = div.o divsigned.o mod.o mul.o mulchar.o putchar.o shift.o stubs.o crt0_rle.o heap.o fstubs.o memmove.o strlen.o + +LIB = z80.lib +CC = $(SCC) +AS = $(SAS) +ASFLAGS = -plosgff + +CFLAGS = -I$(srcdir)/../../include -I. --std-c99 + +all: $(PORTDIR)/$(LIB) $(PORTDIR)/crt0.o + +$(PORTDIR)/crt0.o: crt0.o + cp crt0.o $(PORTDIR)/crt0.o + +$(PORTDIR)/$(LIB): $(OBJ) $(Z8OBJECTS) Makefile +ifeq ($(LIB_TYPE), SDCCLIB) + rm -f $@; \ + ../../../bin/sdcclib -a $@ $(OBJ) $(Z8OBJECTS) +else ifeq ($(LIB_TYPE), AR) + ar -Scq $@ $(OBJ) $(Z8OBJECTS) +else ifeq ($(LIB_TYPE), RANLIB) + ar -Scq $@ $(OBJ) $(Z8OBJECTS) + $(top_builddir)/bin/asranlib $@ +else + rm -f $@; \ + for i in $(basename $(OBJ) $(Z8OBJECTS)); do echo $$i >>$@; done + cp $(OBJ) $(Z8OBJECTS) $(PORTDIR) +endif + +%.o: %.c + $(CC) $(CFLAGS) -c $< + +%.o: %.s + $(AS) $(ASFLAGS) $@ $< + +%.o: ../%.c + $(CC) $(CFLAGS) -c $< + +clean: + rm -f *.o *.sym *.lst *~ $(CLEANSPEC) *.dump* *.asm *.lib + +distclean: clean + rm -f Makefile diff --git a/device/lib/z80/README b/device/lib/z80/README new file mode 100644 index 0000000..259ca6d --- /dev/null +++ b/device/lib/z80/README @@ -0,0 +1,9 @@ +sdcc/device/lib/z80 +------------------- + +Z80 specific routines. + +Notes: +* Cost of ld r,(ix+n): 19 +* Cost of ld r,(hl); inc hl: 7+6 = 13 and you don't have to pop ix + \ No newline at end of file diff --git a/device/lib/z80/asm_strings.s b/device/lib/z80/asm_strings.s new file mode 100644 index 0000000..177d523 --- /dev/null +++ b/device/lib/z80/asm_strings.s @@ -0,0 +1,112 @@ + ;; Implementation of some string functions in + ;; assembler. + + ;; Why - because I want a better dhrystone score :) + + ;; strcpy is disabled as the C version is almost as good. + ;; Just the setup and return is slower. + .if 0 +; char *strcpy(char *dest, const char *source) +_strcpy:: + ;; Fall through to the correct type +__strcpy_rrf_s:: + ld a,#5 + rst 0x08 +__strcpy_rrx_s:: + ld hl,#2 + add hl,sp + ld e,(hl) + inc hl + ld d,(hl) + inc hl + ld c,(hl) + inc hl + ld b,(hl) + ;; Setup the return value + ld l,c + ld h,b +1$: + ld a,(bc) + ld (de),a + or a + jp NZ,1$ + + ret + ;; Notes on strcpy styles: + ;; *de = *hl; hl++; de++; or a; ret z; jp - slower as jp is + ;; same cost as conditional jump, so condition on ret is more expensive. + ;; *de = *bc; bc++; de++; or a, jp nz - OK + ;; Can't use LDI as need to check for end of string. + ;; Above also matches the z88dk version. + .endif + +; void *memcpy(void *dest, const void *source, int count) +_memcpy:: + ;; Fall through to correct type +__memcpy_rrf_s:: + ld a,#5 + rst 0x08 +__memcpy_rrx_s:: + ;; Using LDIR + ;; LDIR: do; *DE = *HL; HL++; BC--; while BC != 0 + + ;; All registers are already saved. + pop iy ; iy = return address + pop de ; de = destination pointer + pop hl ; hl = source pointer + pop bc ; bc = count + push bc + push hl + push de + ld a,b + or c + jr Z,1$ + ldir +1$: + pop hl ; return hl = original destination pointer + push hl + jp (iy) + ret + +; int strcmp(const char *s1, const char *s2) +_strcmp:: + ;; Fall through to the correct style + ;; Fall through to correct type +__strcmp_rrf_s:: + ld a,#5 + rst 0x08 +__strcmp_rrx_s:: + ld hl,#2 + add hl,sp + + ld e,(hl) + inc hl + ld d,(hl) + inc hl + ld a,(hl) + inc hl + ld h,(hl) + ld l,a + +1$: + ld a,(de) + sub (hl) + + ;; Normally not taken, so use a jr (12/7) instead of jp (10) + jr NZ,2$ + + ;; A == 0 + cp (hl) + + inc de + inc hl + ;; Normally taken. Flag from the cp above. + jp nz,1$ +2$: + ;; Sign extend + ld l,a + rla + sbc a + ld h,a + ret + diff --git a/device/lib/z80/crt0.s b/device/lib/z80/crt0.s new file mode 100644 index 0000000..7ff5fa4 --- /dev/null +++ b/device/lib/z80/crt0.s @@ -0,0 +1,63 @@ + ;; Generic crt0.s for a Z80 + .module crt0 + .globl _main + + .area _HEADER (ABS) + ;; Reset vector + .org 0 + jp init + + .org 0x08 + reti + .org 0x10 + reti + .org 0x18 + reti + .org 0x20 + reti + .org 0x28 + reti + .org 0x30 + reti + .org 0x38 + reti + + .org 0x100 +init: + ;; Stack at the top of memory. + ld sp,#0xffff + + ;; Initialise global variables + call gsinit + call _main + jp _exit + + ;; Ordering of segments for the linker. + .area _HOME + .area _CODE + .area _GSINIT + .area _GSFINAL + + .area _DATA + .area _BSS + .area _HEAP + + .area _CODE +__clock:: + ld a,#2 + rst 0x08 + ret + +_exit:: + ;; Exit - special code to the emulator + ld a,#0 + rst 0x08 +1$: + halt + jr 1$ + + .area _GSINIT +gsinit:: + + .area _GSFINAL + ret diff --git a/device/lib/z80/crt0_rle.s b/device/lib/z80/crt0_rle.s new file mode 100644 index 0000000..e7deb7d --- /dev/null +++ b/device/lib/z80/crt0_rle.s @@ -0,0 +1,45 @@ + .area _CODE + + ;; Special RLE decoder used for initing global data +__initrleblock:: + ;; Pull the destination address out + ld c,l + ld b,h + + ;; Pop the return address + pop hl +1$: + ;; Fetch the run + ld e,(hl) + inc hl + ;; Negative means a run + bit 7,e + jp Z,2$ + ;; Code for expanding a run + ld a,(hl) + inc hl +3$: + ld (bc),a + inc bc + inc e + jp NZ,3$ + jp 1$ +2$: + ;; Zero means end of a block + xor a + or e + jp Z,4$ + ;; Code for expanding a block +5$: + ld a,(hl) + inc hl + ld (bc),a + inc bc + dec e + jp NZ,5$ + jp 1$ +4$: + ;; Push the return address back onto the stack + push hl + ret + diff --git a/device/lib/z80/div.s b/device/lib/z80/div.s new file mode 100644 index 0000000..e64aa07 --- /dev/null +++ b/device/lib/z80/div.s @@ -0,0 +1,260 @@ + ;; Originally from GBDK by Pascal Felber. + + .area _CODE + + ;; Unsigned +__divuchar_rrx_s:: + ld hl,#2+1 + add hl,sp + + ld e,(hl) + dec hl + ld l,(hl) + + ;; Fall through +__divuchar_rrx_hds:: + ld c,l + call __divu8 + + ld l,c + ld h,b + + ret + +__divuint_rrx_s:: + ld hl,#2+3 + add hl,sp + + ld d,(hl) + dec hl + ld e,(hl) + dec hl + ld a,(hl) + dec hl + ld l,(hl) + ld h,a + + ;; Fall through +__divuint_rrx_hds:: + ld b,h + ld c,l + call __divu16 + + ld l,c + ld h,b + + ret + +__divsuchar_rrx_s:: + ld hl,#2+1 + add hl,sp + + ld e,(hl) + dec hl + ld c,(hl) + ld b, #0 + + call signexte + + ld l,c + ld h,b + + ret + +__modsuchar_rrx_s:: + ld hl,#2+1 + add hl,sp + + ld e,(hl) + dec hl + ld c,(hl) + ld b, #0 + + call signexte + + ld l,e + ld h,d + + ret + +__divuschar_rrx_s:: + ld hl,#2+1 + add hl,sp + + ld e,(hl) + ld d, #0 + dec hl + ld c,(hl) + + ld a,c ; Sign extend + rlca + sbc a + ld b,a + + call __div16 + + ld l,c + ld h,b + + ret + +__div8:: +.mod8:: + ld a,c ; Sign extend + rlca + sbc a + ld b,a +signexte: + ld a,e ; Sign extend + rlca + sbc a + ld d,a + + ; Fall through to __div16 + + ;; 16-bit division + ;; + ;; Entry conditions + ;; BC = dividend + ;; DE = divisor + ;; + ;; Exit conditions + ;; BC = quotient + ;; DE = remainder + ;; If divisor is non-zero, carry=0 + ;; If divisor is 0, carry=1 and both quotient and remainder are 0 + ;; + ;; Register used: AF,BC,DE,HL +__div16:: +.mod16:: + ;; Determine sign of quotient by xor-ing high bytes of dividend + ;; and divisor. Quotient is positive if signs are the same, negative + ;; if signs are different + ;; Remainder has same sign as dividend + ld a,b ; Get high byte of dividend + push af ; Save as sign of remainder + xor d ; Xor with high byte of divisor + push af ; Save sign of quotient + + ;; Take absolute value of divisor + bit 7,d + jr Z,.chkde ; Jump if divisor is positive + sub a ; Substract divisor from 0 + sub e + ld e,a + sbc a ; Propagate borrow (A=0xFF if borrow) + sub d + ld d,a + ;; Take absolute value of dividend +.chkde: + bit 7,b + jr Z,.dodiv ; Jump if dividend is positive + sub a ; Substract dividend from 0 + sub c + ld c,a + sbc a ; Propagate borrow (A=0xFF if borrow) + sub b + ld b,a + ;; Divide absolute values +.dodiv: + call __divu16 + jr C,.exit ; Exit if divide by zero + ;; Negate quotient if it is negative + pop af ; recover sign of quotient + and #0x80 + jr Z,.dorem ; Jump if quotient is positive + sub a ; Substract quotient from 0 + sub c + ld c,a + sbc a ; Propagate borrow (A=0xFF if borrow) + sub b + ld b,a +.dorem: + ;; Negate remainder if it is negative + pop af ; recover sign of remainder + and #0x80 + ret Z ; Return if remainder is positive + sub a ; Substract remainder from 0 + sub e + ld e,a + sbc a ; Propagate remainder (A=0xFF if borrow) + sub d + ld d,a + ret +.exit: + pop af + pop af + ret + +__divu8:: +.modu8:: + ld b,#0x00 + ld d,b + ; Fall through to divu16 + +__divu16:: +.modu16:: + ;; Check for division by zero + ld a,e + or d + jr NZ,.divide ; Branch if divisor is non-zero + ld bc,#0x00 ; Divide by zero error + ld d,b + ld e,c + scf ; Set carry, invalid result + ret +.divide: + ld hl,#0 +; ld l,c ; L = low byte of dividend/quotient +; ld h,b ; H = high byte of dividend/quotient +; ld bc,#0x00 ; BC = remainder + or a ; Clear carry to start + ex af,af' + ld a,#16 ; 16 bits in dividend +.dvloop: + ;; Shift next bit of quotient into bit 0 of dividend + ;; Shift next MSB of dividend into LSB of remainder + ;; BC holds both dividend and quotient. While we shift a bit from + ;; MSB of dividend, we shift next bit of quotient in from carry + ;; HL holds remainder + ;; Do a 32-bit left shift, shifting carry to L, L to H, + ;; H to C, C to B + ex af,af' + rl c ; Carry (next bit of quotient) to bit 0 + rl b ; Clears carry since BC was 0 + adc hl,hl + + ;; If remainder is >= divisor, next bit of quotient is 1. This + ;; bit goes to carry + push hl ; Save current remainder + sbc hl,de +; ld a,c ; Substract divisor from remainder +; sbc e +; ld c,a +; ld a,b +; sbc d +; ld b,a + ccf ; Complement borrow so 1 indicates a + ; successful substraction (this is the + ; next bit of quotient) + jr C,.drop ; Jump if remainder is >= dividend + pop hl ; Otherwise, restore remainder + jr .nodrop +.drop: + inc sp + inc sp +.nodrop: + ex af,af' + dec a ; DEC does not affect carry flag + jp NZ,.dvloop + ex af,af' + ;; Shift last carry bit into quotient + ld d,h ; DE = remainder + ld e,l + rl c ; Carry to L +; ld c,l ; C = low byte of quotient + rl b +; ld b,h ; B = high byte of quotient + or a ; Clear carry, valid result + ret + diff --git a/device/lib/z80/divsigned.s b/device/lib/z80/divsigned.s new file mode 100644 index 0000000..3614047 --- /dev/null +++ b/device/lib/z80/divsigned.s @@ -0,0 +1,90 @@ + .area _CODE + +__divschar_rrx_s:: + ld hl,#2+1 + add hl,sp + + ld e,(hl) + dec hl + ld l,(hl) + + ;; Fall through +__divschar_rrx_hds:: + ld c,l + + call __div8 + + ld l,c + ld h,b + + ret + +__modschar_rrx_s:: + ld hl,#2+1 + add hl,sp + + ld e,(hl) + dec hl + ld l,(hl) + + ;; Fall through +__modschar_rrx_hds:: + ld c,l + + call __div8 + + ld l,e + ld h,d + + ret + +__divsint_rrx_s:: + ld hl,#2+3 + add hl,sp + + ld d,(hl) + dec hl + ld e,(hl) + dec hl + ld a,(hl) + dec hl + ld l,(hl) + ld h,a + + ;; Fall through +__divsint_rrx_hds:: + ld b,h + ld c,l + + call __div16 + + ld l,c + ld h,b + + ret + +__modsint_rrx_s:: + ld hl,#2+3 + add hl,sp + + ld d,(hl) + dec hl + ld e,(hl) + dec hl + ld a,(hl) + dec hl + ld l,(hl) + ld h,a + + ;; Fall through +__modsint_rrx_hds:: + ld b,h + ld c,l + + call __div16 + + ld l,e + ld h,d + + ret + diff --git a/device/lib/z80/fstubs.s b/device/lib/z80/fstubs.s new file mode 100644 index 0000000..b5a196e --- /dev/null +++ b/device/lib/z80/fstubs.s @@ -0,0 +1,5 @@ + ;; Stubs to match between function names + .area _CODE + +___slong2fs_rrx_s:: + jp ___slong2fs diff --git a/device/lib/z80/heap.s b/device/lib/z80/heap.s new file mode 100644 index 0000000..06b452f --- /dev/null +++ b/device/lib/z80/heap.s @@ -0,0 +1,14 @@ + ;; Stubs that hook the heap in + .globl __sdcc_heap_init + + .area _GSINIT + call __sdcc_heap_init + + .area _HEAP +__sdcc_heap_start:: + ;; For now just allocate 1k of heap. + .ds 1023 + + .area _HEAP_END +__sdcc_heap_end:: + .ds 1 diff --git a/device/lib/z80/memmove.s b/device/lib/z80/memmove.s new file mode 100644 index 0000000..76d21a2 --- /dev/null +++ b/device/lib/z80/memmove.s @@ -0,0 +1,44 @@ + .area _CODE + + .globl _memmove + +; The Z80 has the ldir and lddr instructions, which are perfect for implementing memmove(). + +_memmove: + push ix + ld ix, #0 + add ix, sp + ld c, 8(ix) + ld b, 9(ix) + ld a, c + or a, b + jr Z, memmove_end + ld e, 4(ix) + ld d, 5(ix) + ld l, 6(ix) + ld h, 7(ix) + ld a, l + sbc hl, de ; or above cleared carry. + ld l, a + ld h, 7(ix) + jr NC, memmove_up +memmove_down: + add hl, bc + dec hl + ld a, e + add a, c + ld e, a + ld a, d + adc a, b + ld d, a + dec de + lddr + jr memmove_end +memmove_up: + ldir +memmove_end: + ld l, 4(ix) + ld h, 5(ix) + pop ix + ret + diff --git a/device/lib/z80/mod.s b/device/lib/z80/mod.s new file mode 100644 index 0000000..763cf6c --- /dev/null +++ b/device/lib/z80/mod.s @@ -0,0 +1,66 @@ + .area _CODE + +__moduchar_rrx_s:: + ld hl,#2+1 + add hl,sp + + ld e,(hl) + dec hl + ld l,(hl) + + ;; Fall through +__moduchar_rrx_hds:: + ld c,l + call __divu8 + + ld l,e + ld h,d + + ret + +__moduint_rrx_s:: + ld hl,#2+3 + add hl,sp + + ld d,(hl) + dec hl + ld e,(hl) + dec hl + ld a,(hl) + dec hl + ld l,(hl) + ld h,a + ;; Fall through + +__moduint_rrx_hds:: + ld b,h + ld c,l + + call __divu16 + + ld l,e + ld h,d + + ret + +__moduschar_rrx_s:: + ld hl,#2+1 + add hl,sp + + ld e,(hl) + ld d, #0 + dec hl + ld c,(hl) + + ld a,c ; Sign extend + rlca + sbc a + ld b,a + + call __div16 + + ld l,e + ld h,d + + ret + diff --git a/device/lib/z80/mul.s b/device/lib/z80/mul.s new file mode 100644 index 0000000..b54fd9d --- /dev/null +++ b/device/lib/z80/mul.s @@ -0,0 +1,59 @@ + .area _CODE + +__mulint_rrx_s:: + ld hl,#2 + add hl,sp + + ld e,(hl) + inc hl + ld d,(hl) + inc hl + ld a,(hl) + inc hl + ld h,(hl) + ld l,a + + ;; Fall through + +__muluchar_rrx_hds:: +__mulint_rrx_hds:: + ;; Parameters: + ;; HL, DE (left, right irrelevant) + ld b,h + ld c,l + + ;; 16-bit multiplication + ;; + ;; Entry conditions + ;; BC = multiplicand + ;; DE = multiplier + ;; + ;; Exit conditions + ;; DE = less significant word of product + ;; + ;; Register used: AF,BC,DE,HL +__mul16:: + ld hl,#0 + ld a,b + ; ld c,c + ld b,#16 + + ;; Optimise for the case when this side has 8 bits of data or + ;; less. This is often the case with support address calls. + or a + jr NZ,1$ + + ld b,#8 + ld a,c +1$: + ;; Taken from z88dk, which originally borrowed from the + ;; Spectrum rom. + add hl,hl + rl c + rla ;DLE 27/11/98 + jr NC,2$ + add hl,de +2$: + djnz 1$ + ret + diff --git a/device/lib/z80/mulchar.s b/device/lib/z80/mulchar.s new file mode 100644 index 0000000..7217dd8 --- /dev/null +++ b/device/lib/z80/mulchar.s @@ -0,0 +1,73 @@ + .area _CODE + +; This multiplication routine is similar to the one +; from Rodnay Zaks, "Programming the Z80". + +; Now replaced by a builtin for code generation, but +; still called from some asm files in this directory. +__muluchar_rrx_s:: + ld hl, #2+1 + add hl, sp + ld e, (hl) + dec hl + ld h, (hl) + ld l, #0 + ld d, l + ld b, #8 +muluchar_rrx_s_loop: + add hl, hl + jr nc, muluchar_rrx_s_noadd + add hl, de +muluchar_rrx_s_noadd: + djnz muluchar_rrx_s_loop + ret + +; operands have different sign + +__mulsuchar_rrx_s:: + ld hl,#2+1 + add hl,sp + + ld e,(hl) + dec hl + ld c,(hl) + ld b, #0 + jr signexte + +__muluschar_rrx_s:: + ld hl,#2+1 + add hl,sp + + ld c,(hl) + ld b, #0 + dec hl + ld e,(hl) + jr signexte + +;; Originally from GBDK by Pascal Felber. + +__mulschar_rrx_s:: + ld hl,#2+1 + add hl,sp + + ld e,(hl) + dec hl + ld l,(hl) + + ;; Fall through +__mulschar_rrx_hds:: + ;; Need to sign extend before going in. + ld c,l + + ld a,l + rla + sbc a,a + ld b,a +signexte: + ld a,e + rla + sbc a,a + ld d,a + + jp __mul16 + diff --git a/device/lib/z80/putchar.s b/device/lib/z80/putchar.s new file mode 100644 index 0000000..123f1f5 --- /dev/null +++ b/device/lib/z80/putchar.s @@ -0,0 +1,19 @@ + .area _CODE +_putchar:: +_putchar_rr_s:: + ld hl,#2 + add hl,sp + + ld l,(hl) + ld a,#1 + rst 0x08 + + ret + +_putchar_rr_dbs:: + ld l,e + ld a,#1 + rst 0x08 + + ret + diff --git a/device/lib/z80/shift.s b/device/lib/z80/shift.s new file mode 100644 index 0000000..a9ae6bf --- /dev/null +++ b/device/lib/z80/shift.s @@ -0,0 +1,85 @@ + ;; +__rrulong_rrx_s:: + ld hl,#2+4 + add hl,sp + + ld c,(hl) + dec hl + ld d,(hl) + dec hl + ld e,(hl) + dec hl + ld a,(hl) + dec hl + ld l,(hl) + ld h,a + + ld a,c +1$: + or a,a + ret Z + + rr d + rr e + rr h + rr l + + dec a + jp 1$ + +__rrslong_rrx_s:: + ld hl,#2+4 + add hl,sp + + ld c,(hl) + dec hl + ld d,(hl) + dec hl + ld e,(hl) + dec hl + ld a,(hl) + dec hl + ld l,(hl) + ld h,a + + ld a,c +1$: + or a,a + ret Z + + sra d + rr e + rr h + rr l + + dec a + jp 1$ + +__rlslong_rrx_s:: +__rlulong_rrx_s:: + ld hl,#2+4 + add hl,sp + + ld c,(hl) + dec hl + ld d,(hl) + dec hl + ld e,(hl) + dec hl + ld a,(hl) + dec hl + ld l,(hl) + ld h,a + + ld a,c +1$: + or a,a + ret Z + + rl l + rl h + rl e + rl d + + dec a + jp 1$ diff --git a/device/lib/z80/strlen.s b/device/lib/z80/strlen.s new file mode 100644 index 0000000..2eccf70 --- /dev/null +++ b/device/lib/z80/strlen.s @@ -0,0 +1,21 @@ + .area _CODE + + .globl _strlen + +; The Z80 has the cpir instruction, which is perfect for implementing strlen(). + +_strlen: + push ix + ld ix, #0 + add ix, sp + ld l, 4(ix) + ld h, 5(ix) + xor a, a + ld b, a + ld c, a + cpir + ld hl, #-1 + sbc hl, bc ; C flag still cleared from xor above. + pop ix + ret + diff --git a/device/lib/z80/stubs.s b/device/lib/z80/stubs.s new file mode 100644 index 0000000..667662a --- /dev/null +++ b/device/lib/z80/stubs.s @@ -0,0 +1,154 @@ + ;; Stubs to match between function names + .area _CODE + + .globl __mullong + .globl __modslong + .globl __modulong + .globl __divslong + .globl __divulong + .globl __divschar_rrx_s + .globl __divuchar_rrx_s + .globl __divsuchar_rrx_s + .globl __divuschar_rrx_s + .globl __divsint_rrx_s + .globl __divuint_rrx_s + .globl __mulschar_rrx_s + .globl __muluchar_rrx_s + .globl __mulsuchar_rrx_s + .globl __muluschar_rrx_s + .globl __mulint_rrx_s + .globl __modschar_rrx_s + .globl __moduchar_rrx_s + .globl __modsuchar_rrx_s + .globl __moduschar_rrx_s + .globl __moduint_rrx_s + .globl __modsint_rrx_s + .globl __rrulong_rrx_s + .globl __rrslong_rrx_s + .globl __rlulong_rrx_s + .globl __rlslong_rrx_s + +__mullong_rrx_s:: +__mullong_rrf_s:: + jp __mullong + +__modslong_rrx_s:: +__modslong_rrf_s:: + jp __modslong + +__modulong_rrx_s:: +__modulong_rrf_s:: + jp __modulong + +__divslong_rrx_s:: +__divslong_rrf_s:: + jp __divslong + +__divulong_rrx_s:: +__divulong_rrf_s:: + jp __divulong + +__mulint_rrf_s:: + ld a,#5 + rst 0x08 + jp __mulint_rrx_s + +__divsint_rrf_s:: + ld a,#5 + rst 0x08 + jp __divsint_rrx_s + +__divuint_rrf_s:: + ld a,#5 + rst 0x08 + jp __divuint_rrx_s + +__mulschar_rrf_s:: + ld a,#5 + rst 0x08 + jp __mulschar_rrx_s + +__divschar_rrf_s:: + ld a,#5 + rst 0x08 + jp __divschar_rrx_s + +__modschar_rrf_s:: + ld a,#5 + rst 0x08 + jp __modschar_rrx_s + +__muluchar_rrf_s:: + ld a,#5 + rst 0x08 + jp __muluchar_rrx_s + +__divuchar_rrf_s:: + ld a,#5 + rst 0x08 + jp __divuchar_rrx_s + +__moduchar_rrf_s:: + ld a,#5 + rst 0x08 + jp __moduchar_rrx_s + +__mulsuchar_rrf_s:: + ld a,#5 + rst 0x08 + jp __mulsuchar_rrx_s + +__divsuchar_rrf_s:: + ld a,#5 + rst 0x08 + jp __divsuchar_rrx_s + +__modsuchar_rrf_s:: + ld a,#5 + rst 0x08 + jp __modsuchar_rrx_s + +__muluschar_rrf_s:: + ld a,#5 + rst 0x08 + jp __muluschar_rrx_s + +__divuschar_rrf_s:: + ld a,#5 + rst 0x08 + jp __divuschar_rrx_s + +__moduschar_rrf_s:: + ld a,#5 + rst 0x08 + jp __moduschar_rrx_s + +__modsint_rrf_s:: + ld a,#5 + rst 0x08 + jp __modsint_rrx_s + +__moduint_rrf_s:: + ld a,#5 + rst 0x08 + jp __moduint_rrx_s + +__rrulong_rrf_s:: + ld a,#5 + rst 0x08 + jp __rrulong_rrx_s + +__rrslong_rrf_s:: + ld a,#5 + rst 0x08 + jp __rrslong_rrx_s + +__rlulong_rrf_s:: + ld a,#5 + rst 0x08 + jp __rlulong_rrx_s + +__rlslong_rrf_s:: + ld a,#5 + rst 0x08 + jp __rlslong_rrx_s diff --git a/doc/INSTALL.txt b/doc/INSTALL.txt new file mode 100644 index 0000000..1484b51 --- /dev/null +++ b/doc/INSTALL.txt @@ -0,0 +1,83 @@ +SDCC Binary Kit Install Help +---------------------------- + +For Linux users: +================ +To install: + +* Extract the binary kit to a temporary directory. + This will create a new directory called 'sdcc' in the temporary directory. + cd ~ + mkdir tmp + cd tmp + tar xjf path/to/binary/kit/sdcc-2.9.0-i386-unknown-linux2.5.tar.bz2 + +* Change to the sdcc directory and copy all files to /usr/local + cd sdcc + cp -r * /usr/local + +This will install sdcc binaries into: /usr/local/bin/ +header files into: /usr/local/share/sdcc/include/ +library files into: /usr/local/share/sdcc/lib/ +and documentation into: /usr/local/share/sdcc/doc/ + +You can test the install by entering: + /usr/local/bin/sdcc -v + +This should return sdcc's version number. + +Even if the default search paths look into /usr/local, sdcc is fully +relocatable. Try `sdcc --print-search-dirs` if you have problems with header +or library files. See sdccman.[txt|pdf|html] for more detailed information. + + +For Windows 9X/NT/2000/XP users: +================================ +To install: + +* If you would like to keep a copy of your previous version, + rename the directory where it's installed first +* Run sdcc-2.9.0-setup.exe + +By default this will install sdcc binaries into: C:\Program Files\SDCC\bin\ +header files into: C:\Program Files\SDCC\include\ +library files into: C:\Program Files\SDCC\lib\ +and documentation into: C:\Program Files\SDCC\doc\ + +You can test the install by opening a DOS box and entering: + sdcc -v + +This should return sdcc's version number. + +sdcc for win32 is fully relocatable. Try `sdcc --print-search-dirs` if you +have problems with header or library files. See sdccman.[txt|pdf|html] for +more detailed information. + + +For Mac OS X users: +=================== +To install: + +* Extract the binary kit to a temporary directory. + This will create a new directory called 'sdcc' in the temporary directory. + cd ~ + mkdir tmp + cd tmp + tar xjf path/to/binary/kit/sdcc-2.9.0-universal-apple-macosx.tar.bz2 + +* Change to the sdcc directory and copy all files to /Developer/sdcc + cp -r sdcc /Developer/sdcc + +This will install sdcc binaries into: /Developer/sdcc/bin/ +header files into: /Developer/sdcc/share/sdcc/include/ +library files into: /Developer/sdcc/share/sdcc/lib/ +and documentation into: /Developer/sdcc/share/sdcc/doc/ + +You can test the install by entering: + /Developer/sdcc/bin/sdcc -v + +This should return sdcc's version number. + +Even if the default search paths look into /usr/local, sdcc is fully +relocatable. Try `sdcc --print-search-dirs` if you have problems with header +or library files. See sdccman.[txt|pdf|html] for more detailed information. diff --git a/doc/Makefile.in b/doc/Makefile.in new file mode 100644 index 0000000..b8e3c26 --- /dev/null +++ b/doc/Makefile.in @@ -0,0 +1,127 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ + +LYX = @LYX@ +LATEX2HTML = @LATEX2HTML@ +PDFLATEX = @PDFLATEX@ +MAKEINDEX = @MAKEINDEX@ +PDFOPT = @PDFOPT@ + +QUIET = >/dev/null 2>/dev/null + +include ../Makefile.common + +MANUAL = sdccman +TSS = test_suite_spec +CDB = cdbfileformat + +all: $(MANUAL).pdf $(MANUAL).html/index.html $(MANUAL).txt \ + $(TSS).pdf $(TSS).html/index.html $(TSS).txt \ + $(CDB).pdf $(CDB).html/index.html $(CDB).txt + +install: + $(INSTALL) -d $(DESTDIR)$(docdir) + cp -rf $(srcdir)/*.txt $(srcdir)/z80 $(srcdir)/avr $(DESTDIR)$(docdir) + txtfiles=`echo *.txt | grep -v '\*\.txt' || true` + if [ $(txtfiles) ]; then cp $(txtfiles) $(DESTDIR)$(docdir); fi + if [ -f $(MANUAL).html/index.html ]; then cp -rf $(MANUAL).html $(DESTDIR)$(docdir); fi + if [ -f $(TSS).html/index.html ]; then cp -rf $(TSS).html $(DESTDIR)$(docdir); fi + if [ -f $(CDB).html/index.html ]; then cp -rf $(CDB).html $(DESTDIR)$(docdir); fi + if [ -f $(MANUAL).pdf ]; then cp -rf $(MANUAL).pdf $(DESTDIR)$(docdir); fi + if [ -f $(TSS).pdf ]; then cp -rf $(TSS).pdf $(DESTDIR)$(docdir); fi + if [ -f $(CDB).pdf ]; then cp -rf $(CDB).pdf $(DESTDIR)$(docdir); fi + rm -rf `find $(DESTDIR)$(docdir) -name .svn -type d` + rm -f $(DESTDIR)$(docdir)/*/images.* + +uninstall: + rm -rf $(DESTDIR)$(docdir) + +$(MANUAL).html/index.html: $(MANUAL).tex $(MANUAL).aux ;#$(MANUAL).ind $(MANUAL).glo + mkdir -p $(dir $@) + @# fixes $(LATEX2HTML) problems with two consecutive dashes for long-options: --stack-auto + @# fixes $(LATEX2HTML) problems with \tabularnewline + sed -e 's,-\\/-,-\\/-\\/-,g' \ + -e 's,\\tabularnewline$$,\\\\,g' < $< > $(dir $@)$(notdir $<) + cp $(MANUAL).aux $(dir $@) + -cd $(dir $@); $(LATEX2HTML) -split 5 -show_section_numbers -local_icons -info "" -nosubdir $(MANUAL) $(QUIET) + rm -f $(dir $@)WARNINGS $(dir $@)labels.pl $(dir $@)$(notdir $<) $(dir $@)$*.aux + +%.html/index.html: %.tex %.aux + mkdir -p $(dir $@) + @# fixes $(LATEX2HTML) problems with two consecutive dashes for long-options: --stack-auto + @# fixes $(LATEX2HTML) problems with \tabularnewline + sed -e 's,-\\/-,-\\/-\\/-,g' \ + -e 's,\\tabularnewline$$,\\\\,g' < $< > $(dir $@)$(notdir $<) + cp $*.aux $(dir $@) + -cd $(dir $@); $(LATEX2HTML) -split 0 -local_icons -info "" -nosubdir $* $(QUIET) + rm -f $(dir $@)WARNINGS $(dir $@)labels.pl $(dir $@)$(notdir $<) $(dir $@)$*.aux + +%.txt: %.lyx + @# $(LYX) will export the file in the directory of the $(LYX) file + @# if VPATH is used the $(LYX) file is copied first + if [ "$(srcdir)" != "." ]; then \ + cp -f $(srcdir)/$(notdir $<) . ; \ + fi + $(LYX) -e text $(notdir $<); + +#%.pdf: %.tex %.dvi %.ind +# $(DVIPDF) $* +## pdflatex creates documents for acrobat reader >= 5.0 +## which $(PDFLATEX) > /dev/null && $(PDFLATEX) $* || $(DVIPDF) $* + +#%.ps: %.pdf +# $(DVIPS) $* + +#%.dvi: %.tex +# $(LATEX) $< +# @# rerun to in include aux +# $(LATEX) $< + +%.tex: %.lyx + if [ "$(srcdir)" != "." ] ; then \ + cp -f $(srcdir)/$(notdir $<) . ; \ + fi + $(LYX) -e latex $(notdir $<); + +#%.ind: %.dvi +# $(LATEX) $* +# # is there an index? +# if [ -f $*.idx ] ; then \ +# $(MAKEINDEX) $*; \ +# $(LATEX) $*; \ +# $(LATEX) $*; \ +# fi +## -$(MAKEINDEX) -s l2hidx.ist $*; \ + +#%.glo: %.dvi +# # the glossary, not implemented yet +# # $(MAKEINDEX) -s l2hglo.ist -o $@ $< + +%.pdf %.aux: %.tex + $(PDFLATEX) $* $(QUIET) + [ ! -e "$*.idx" ] || $(MAKEINDEX) $* $(QUIET) + $(PDFLATEX) $* $(QUIET) + [ ! -e "$*.idx" ] || $(MAKEINDEX) $* $(QUIET) + $(PDFLATEX) $* $(QUIET) + $(PDFOPT) $*.pdf $*-tmp.pdf + rm $*.pdf + mv $*-tmp.pdf $*.pdf + +archive: all + rm -rf sdcc-doc sdcc-doc.tar.bz2 + mkdir sdcc-doc + rsync -rCt avr z80 *.pdf *.txt $(srcdir)/*.txt sdcc-doc + + for doc in $(MANUAL) $(TSS) $(CDB); do \ + rsync -Rt $$doc.html/*.html $$doc.html/*.png $$doc.html/*.css sdcc-doc/; \ + done + + mkdir sdcc-doc/as + rsync -rCt $(top_srcdir)/as/doc/* sdcc-doc/as/ + + mkdir sdcc-doc/ucsim + cd $(top_srcdir)/sim/ucsim/doc; rsync *.html *.jpg *.gif *.fig ../../../doc/sdcc-doc/ucsim/ + + tar -c sdcc-doc | bzip2 -9 > sdcc-doc.tar.bz2 + +include $(srcdir)/clean.mk diff --git a/doc/README.txt b/doc/README.txt new file mode 100644 index 0000000..bb90f13 --- /dev/null +++ b/doc/README.txt @@ -0,0 +1,90 @@ +SDCC - free open source, retargettable, optimizing ANSI-C compiler +------------------------------------------------------------------ +$Id: README.txt 5325 2009-01-04 08:18:33Z borutr $ + + +Welcome to SDCC, free open source, retargettable, optimizing ANSI C compiler +that supports a growing list of processors including the Intel mcs51 +family, the Zilog z80, the Maxim ds390 and ds400, the Motorola HC08 and the +PIC16 and PIC18 familiy. + +See share/sdcc/doc/INSTALL.txt for the installation instructions for +the binary kits. + +See the share/sdcc/doc directory for more documentation. + +See http://sdcc.sourceforge.net/ for the latest information on sdcc. + + +License: +SDCC is licensed under the GNU Public license (GPL) v2. Note that +this license covers the code to the compiler and other executables, +but explicitly does not cover any code or objects generated by sdcc. +We have not yet decided on a license for the run time libraries, but +it will not put any requirements on code linked against it. See: + + http://www.gnu.org/copyleft/gpl.html + + +Support: +SDCC is a collaborative effort between a group of volunteers. Please +feel free to report bugs via the Sourceforge bug tracker, or to ask +questions on the user mailing list. See: + + http://sourceforge.net/tracker/?atid=100599&group_id=599&func=browse + + http://sourceforge.net/mail/?group_id=599 + + +Notes: +* The ds400, pic14 and pic16 are currently experimental, but work is in +progress. Please check http://sdcc.sourceforge.net/snap.php for snapshots. +* The TININative, gbz80, avr and xa51 targets are no longer maintained. + +Roadmap: +COPYING - GPL v2 +as/ - Assembler, derived from asxxxx +debugger/ +device/ - Device libraries and examples +doc/ - sdcc and target specific documentation +link/ - Linker, also derived from asxxxx +sim/ - Simulator (mcs51 only) +src/ - Source to the C compiler and targets +support/ - Libraries and apps that may not be provided by your system. + + +Authors and interested persons: +* Sandeep Dutta (sandeep AT users.sourceforge.net) + +* Jean Loius-VERN +* Daniel Drotos +* Kevin Vigor +* Johan Knol +* Scott Dattalo +* Karl Bongers +* Bernhard Held +* Frieder Ferlemann +* Jesus Calvino-Fraga +* Borut Razem +* Vangelis Rokas +* Erik Petrich +* Paul Stoffregen +* Michael Hope +* Maarten Brock +* Raphael Neider +* Hans-Juergen Dorn +* Klaus Flittner +* Philipp Klaus Krause + +SDCC includes code from: +* Alan Baldwin + Initial version of ASXXXX and ASLINK. +* John Hartman + Porting ASXXXX and ASLINK for 8051. +* Dmitry S. Obukhov + malloc and serial I/O routines. +* Pascal Felber + Some of the Z80 related files are borrowed from the Gameboy + Development Kit (GBDK). +* The GCC development team http://gcc.gnu.org/ + The basis of sdcpp preprocessor diff --git a/doc/TININative.txt b/doc/TININative.txt new file mode 100644 index 0000000..706b310 --- /dev/null +++ b/doc/TININative.txt @@ -0,0 +1,171 @@ +Using SDCC to develop Native Java functions +------------------------------------------- + +Prerequisites +-------------- + +1) Download the latest compiler sources from http://sdcc.sourceforge.net (Subversion download), build & + install the compiler. +2) Download & install tini development kit. SDCC uses 'a390' assembler to generate Native libraries, + it is NOT distributed with the compiler. Tested with Version 1.02d. + + +Small Example +------------- + +Hello.java :- + +import com.dalsemi.comm.*; +import com.dalsemi.system.*; + +public class Hello +{ + public static native int method1(int i,int j); + static void main(String args[]) + { + System.out.println("Hello Started"); + try { + System.loadLibrary("myn.tlib"); + System.out.println("Load Success"); + System.out.println("Native method1 returned " + method1(200,100)); + } + catch (Throwable t) { + System.out.println(t); + } + } +} + +myn.c :- + +long Native_method1() _JavaNative +{ + long l = NatLib_LoadInt(0); + long k = NatLib_LoadInt(1); + return l-k; +} + +Before you start compiling make sure +a) 'macro' & 'a390' are in the PATH +b) The files tini.inc, ds80c390.inc, tinimacro.inc & apiequ.inc are in the SAME directory as + the C file. + +> javac -bootclasspath /tiniclasses.jar Hello.java +> java -cp /tini.jar TINIConvertor -f Hello.class -o Hello.tini -d /tini.db +> sdcc -mTININative myn.c + +Load Hello.tini & myn.tlib into the TINI board then + +TINI /> java Hello.tini +Hello Started +Load Success +Native method1 returned 100 + +TINI /> + +Details you MUST know +--------------------- +SDCC has a completely different and incompatible parameter passing and register usage +than the TINI java environment. The Native API has been implemented using the __builtin, +or intrinsic function support in SDCC . Each of the Native API functions are mapped to an +SDCC intrinsic function, the code generator for the intrinsic function takes care of mapping +the registers and parameters to the TINI Java environment's expectations . + +The _JavaNative keyword is used to map the return value from a Native function to R4:R0, by +default SDCC uses DPTR:b:a to return a value. + + Type Mapping + ------------ + + SDCC can support types that are upto 4 bytes (32 bits). + + Java SDCC + ---- ---- + char char + short short/int + int long + long NOT SUPPORTED + double NOT SUPPORTED + + _bpx & _ap + --------- + SDCC requires a 16 bit frame pointer to access local variables (on the stack), and + function parameters . In the TININative environment _bpx is mapped to R7_B3:R6_B3 + (register R7:R6 in bank3). The compiler also uses AP as a temp register, for the + TINI environment this is mapped to R5_B3. + +Limitations +----------- + +The TININative environment does not have a linker. Multiplication & Division of 16 & 32 bit +numbers are implemented in SDCC as library functions this implies that , division & multiplication +of these numbers are not supported in the TININative environment. The compiler transforms div/mul by +power of 2 to shifts . For other mul/divs there are two ways around . + +a) Copy the library function from the library to your code . The sources can be found in + sdcc/device/lib. +b) Use the --use-accelerator option, with this option the compiler will generate code to use + the on-chip arithmetic accelerator for 16 bit multiplication & division & modulus. + NOTE The compiler will disable interrupts during this operation to prevent corruption of + MA & MB registers. MUL/DIV/MOD of unsigned quantities are more efficient than signed + quantities. + +API Mappings +------------ +As mentioned earlier the Native APIs are implemented using compiler intrinsic functions, at this +time only the following functions have been mapped (more will be mapped in the future). Some +Native API calls return multiple values, I haven't found a good way to handle this yet, in most +cases these return a HANDLE and a pointer to ABSOLUTE memory in DPTR, in such cases SDCC will +return ONLY the HANDLE and ignore the POINTER value. The HANDLE can then be used with MM_Deref to +obtain the POINTER value again (I hope my assumption is correct here). + +SDCC Prototype Native API +-------------- ---------- +char NatLib_LoadByte (char parmnum); NatLib_LoadPrimitive +int NatLib_LoadShort(char parmnum); NatLib_LoadPrimitive +long NatLib_LoadInt (char parmnum); NatLib_LoadPrimitive +char *NatLib_LoadPointer (char parmnum); NatLib_LoadPointer + +/* in the following cases the compiler will fill in the pointer to LibraryID when required*/ +/* NatLib_Get* return mutiple values return value is HANDLE , pointer is ignored */ + +char NatLib_InstallImmutableStateBlock(void *state_block,int handle); + NatLib_InstallImmutableStateBlock +char NatLib_InstallEphemeralStateBlock(void *state_block,int handle); + NatLib_InstallEphemeralStateBlock +void NatLib_RemoveImmutableStateBlock (); NatLib_RemoveImmutableStateBlock +void NatLib_RemoveEphemeralStateBlock (); NatLib_RemoveEphemeralStateBlock +int NatLib_GetImmutableStateBlock(); NatLib_GetImmutableStateBlock +int NatLib_GetEphemeralStateBlock(); NatLib_GetEphemeralStateBlock + +int MM_XMalloc (long size); MM_XMalloc /* returns HANDLE */ +int MM_Malloc (int size); MM_Malloc /* return HANDLE */ +int MM_ApplicationMalloc ( int size ); MM_ApplicationMalloc /* returns HANDLE */ +int MM_Free (int handle); MM_Free +char *MM_Deref (int handle); MM_Deref +char MM_UnrestrictedPersist(int handle); MM_UnrestrictedPersist + +char System_ExecJavaProcess(char *image,int handle-to-processname) + System_ExecJavaProcess +void System_GetRTCRegisters(char *regsavearea) System_GetRTCRegisters +void System_SetRTCRegisters(char *regsavearea) System_SetRTCRegisters +void System_ThreadSleep(long timeout) System_ThreadSleep +void System_ThreadSleep_ExitCriticalSection(long timeout) System_ThreadSleep_ExitCriticalSection +void System_ThreadResume(char threadid,char processid) System_ThreadResume +void System_SaveJavaThreadState() System_SaveJavaThreadState +void System_RestoreJavaThreadState() System_RestoreJavaThreadState +void System_ProcessSleep(long timeout) System_ProcessSleep +void System_ProcessSleep_ExitCriticalSection(long timeout) System_ProcessSleep_ExitCriticalSection +void System_ProcessYield() System_ProcessYield +void System_ProcessSuspend() System_ProcessSuspend +void System_ProcessResume(char processid) System_ProcessResume +char System_RegisterPoll((void *)(funcpointer)()) System_RegisterPoll +char System_RemovePoll((void *)(funcpointer)()) System_RemovePoll +char System_GetCurrentThreadId() System_GetCurrentThreadId +char System_GetCurrentProcessId() System_GetCurrentProcessId + + +Some Notes +---------- + +The register convention mapping causes a lot of push & pops to be generated. +The source for the built in functions can be found in file src/ds390/gen.c. \ No newline at end of file diff --git a/doc/avr/avr_design.txt b/doc/avr/avr_design.txt new file mode 100644 index 0000000..f47176d --- /dev/null +++ b/doc/avr/avr_design.txt @@ -0,0 +1,107 @@ +Design Document for AVR Port +---------------------------- + +The first release will support all AVR architectures except ATMega & ATtiny +(i.e. all variants with 64K or less of code/data space will be supported) + +All functions will be REENTRANT . + +I) Language extensions. +----------------------- + +a) Storage classes +------------------ + +"bit" - not applicable (will be returned to user name space) +"data" - not applicable (will be returned to user name space) +"idata" - not applicable (will be returned to user name space) +"xdata" - not applicable (will be returned to user name space) +"code" - will place variable in "code" space. NOTE code space is NOT read-only. +"eeprom"- (new) will place the variable in eeprom (read & write) +"sram" - (new) will place the variable in "SRAM" after the SFRs (default). + + +b) register/sfr bit access. +-------------------------- +Operator '.' will be overloaded ( the compiler will decide if it +is a structure access or register bit access depending on context) +eg. + +sfr SOME_SFR = 0x40; +sfr SOME_OTHER_SFR = 0x41; +foobar() +{ + ... + SOME_SFR.4 = 1; // set bit 4 of sfr SOME_SFR + ... + SOME_SFR.5 = SOME_OTHER_SFR.6; // copy bit 6 of SOME_OTHER_SFR to SOME_SFR's bit 5. + ... +} + +II) Pointers +------------ +As mentioned above initial releases will NOT support ATMega. + +Keeping with the three byte pointers for generic pointers, +the compiler will treat unqualified pointers as 3 byte pointers, +the storage area will be saved in the upper nibble of the third byte +(this will facilitate later support for ATMega). Here we differ for +IAR (they seem to make copies of variables in code & other address +spaces into data space, seemed like a needless waste of data space). + +pointer declaration examples. + +char *cp; /* generic three byte pointer */ +code char *cp; /* pointer to code space */ +eeprom char *cp; /* pointer to data in eepromp */ +sram char *cp; /* pointer to data in SRAM space */ + +III) Function calls +------------------- +The previous issue of function calls has been somewhat resolved. +SDCC will NOT support ATtiny & other variants (such as AT90S1200) +which have limited stack depth. It will however support variants +with 8 bit stack pointers. + +IV) Register Usage +------------------ + +R0-R7 - Parameter passing & return value (differs from IAR I don't + like IAR's usage of R16-R23, specially since R0-R1 has + to be kept free anyway for divide & multiply operations) +R8-R25 - General purpose registers for local variables. +R28-R29(Y) - Stack Frame (Same as IAR) +R26-R27(X) - GPRs assigned to pointers (non generic pointers). +R30-R31(Z) - GPRs assigned to pointers (non generic pointers). + +V) Parameter passing & return values +------------------------------------ +Registers R0-R7 (eight) registers will be used for parameter passing. +Unlike the 8051 port the AVR port will pass the first eight bytes of +parameters in a registers (8051 passes only the first parameter in +registers), the exception being.. part of a parameter will not be put +into registers. + +Examples +int foo (char a,long b); + R0 <- a, + R1-R4 <- b; + +int foo (long a, char b, long c) + R0-R3 <- a, + R4 <- b, + (STACK) <- c; + +int foo (long a,long b) + R0-R3 <- a, + R4-R7 <- b; + +Return values will be placed in registers R0-R3; + +VI) Memory models +----------------- +The memory model will be used primarily to determine the +width of the stack pointer. + +--model-small - stack pointer 8 bit +--model-large - stack pointer 16 bit. \ No newline at end of file diff --git a/doc/builtins.txt b/doc/builtins.txt new file mode 100644 index 0000000..ab40d13 --- /dev/null +++ b/doc/builtins.txt @@ -0,0 +1,126 @@ +/* This document is meant for developers */ + +Implementation details of "builtin" functions in SDCC. +Built in functions are target/port specific and are defined in src//main.c. +Here is a layout of the builtin structure (port.h). + +Front-End +--------- + +#define MAX_BUILTIN_ARGS 16 +/* definition of builtin functions */ +typedef struct builtins +{ + char *name ; /* name of builtin function */ + char *rtype; /* return type as string : see typefromStr */ + int nParms; /* number of parms : max 8 */ + char *parm_types[MAX_BUILTIN_ARGS]; /* each parm type as string : see typeFromStr */ +} builtins ; + +The port structure contains a pointer to a table of the builtin functions. Example of the +builtin function table. + +static builtins __ds390_builtins[] = { + { "__builtin_memcpy_x2x","v",3,{"cx*","cx*","i"}}, /* void __builtin_memcpy_x2x (xdata char *,xdata char *,int) */ + { "__builtin_memcpy_c2x","v",3,{"cx*","cp*","i"}}, /* void __builtin_memcpy_c2x (xdata char *,code char *,int) */ + { NULL , NULL,0, {NULL}} /* mark end of table */ +}; + +Here the function names are prefixed with "__builtin" this is not a requirement, standard C +library functions can also be defined in this table by a particular port to generate more +efficient code . + +Function "initBuiltIns" in SDCCsymt.c is invoked to initialize the symbol table with the +builtin functions. The return type & the parameter types are specified as encoded strings. +Function "typeFromStr" parses this encoded string and translates them into sym_link . + +/*-----------------------------------------------------------------*/ +/* typeFromStr - create a typechain from an encoded string */ +/* basic types - 'c' - char */ +/* 's' - short */ +/* 'i' - int */ +/* 'l' - long */ +/* 'f' - float */ +/* 'v' - void */ +/* '*' - pointer - default (GPOINTER) */ +/* modifiers - 'u' - unsigned */ +/* pointer modifiers - 'g' - generic */ +/* 'x' - xdata */ +/* 'p' - code */ +/* 'd' - data */ +/* 'F' - FUNCTION */ +/* examples : "ig*" - generic int * */ +/* "cx*" - char xdata * */ +/* "ui" - unsigned int */ +/*-----------------------------------------------------------------*/ + +So much for the front-end issues. + +iCode - implications. +--------------------- + +Intermediate code (iCode) will ALWAYS generate a SEND for parameters of a builtin function with +a special flag (ic->builtinSEND) set. This eliminates the need for special processing for different +memory models and --stack-auto option. All optimizations remain untouched. Example of intermediate code +generated for builtin + +void memcpy(xdata char *d,xdata char *s) +{ + __builtin_memcpy_x2x(d,s+10,10); +} +iTemp0 [k2 lr3:12 so:0]{ ia0 re1 rm0 nos0 ru0}{xdata char xdata * }{ sir@ _memcpy_d_1_1}[_memcpy_d_1_1] = recv +iTemp2 [k7 lr4:12 so:0]{ ia0 re0 rm0 nos0 ru0}{xdata char xdata * }[r5 r6 r7 ] + := _memcpy_PARM_2 [k6 lr0:0 so:0]{ ia0 re0 rm0 nos0 ru0}{xdata char xdata * } +iTemp3 [k8 lr5:8 so:0]{ ia0 re0 rm0 nos0 ru0}{xdata char xdata * }[r0 r1 r2 ] = + iTemp2 [k7 lr4:12 so:0]{ ia0 re0 rm0 nos0 ru0}{xdata char xdata * }[r5 r6 r7 ] + 0xa {literal unsigned char} +send iTemp0 [k2 lr3:12 so:0]{ ia0 re1 rm0 nos0 ru0}{xdata char xdata * }{ sir@ _memcpy_d_1_1}[_memcpy_d_1_1] +send iTemp3 [k8 lr5:8 so:0]{ ia0 re0 rm0 nos0 ru0}{xdata char xdata * }[r0 r1 r2 ] +send 0xa {literal int} +iTemp4 [k9 lr9:9 so:0]{ ia0 re0 rm0 nos0 ru1}{void} = + call ___builtin_memcpy_x2x [k4 lr0:0 so:0]{ ia0 re0 rm0 nos0 ru0}{void function __builtin__} + + +Backend/Code generation for builtin functions. +---------------------------------------------- + +When a SEND icode with the ic->builtinSEND flag is detected by the code generator, it should go +into builtin function processing mode. E.g. + + case SEND: + if (ic->builtinSEND) genBuiltIn(ic); + else addSet (&_G.sendSet, ic); + break; + +SDCCicode.c contains a port/target independent routine (getBuiltinParms) which goes thru the +iCodes (starting from the first SEND (with builtinSEND set)) and returns the parameters and number +of parameters in an array, example. NOTE the function "getBuiltinParms" also marks the iCodes +as "generated" . + +/*-----------------------------------------------------------------*/ +/* genBuiltIn - calls the appropriate function to generating code */ +/* for a built in function */ +/*-----------------------------------------------------------------*/ +static void genBuiltIn (iCode *ic) +{ + operand *bi_parms[MAX_BUILTIN_ARGS]; + int nbi_parms; + iCode *bi_iCode; + symbol *bif; + + /* get all the arguments for a built in function */ + bi_iCode = getBuiltinParms(ic,&nbi_parms,bi_parms); + + /* which function is it */ + bif = OP_SYMBOL(IC_LEFT(bi_iCode)); + if (strcmp(bif->name,"__builtin_memcpy_x2x")==0) { + genMemcpyX2X(bi_iCode,nbi_parms,bi_parms,0); + } else if (strcmp(bif->name,"__builtin_memcpy_c2x")==0) { + genMemcpyX2X(bi_iCode,nbi_parms,bi_parms,1); + } else { + werror(E_INTERNAL_ERROR,"unknown builtin function encountered\n"); + return ; + } + return ; +} + + diff --git a/doc/cdbfileformat.lyx b/doc/cdbfileformat.lyx new file mode 100644 index 0000000..1f8aced --- /dev/null +++ b/doc/cdbfileformat.lyx @@ -0,0 +1,4379 @@ +#LyX 1.5.7 created this file. For more info see http://www.lyx.org/ +\lyxformat 276 +\begin_document +\begin_header +\textclass article +\begin_preamble +\pdfoptionpdfminorversion=3 +\usepackage[ + pdftitle={CDB File Format}, + pdfauthor={Lenny Story}, + pdfkeywords={address c compiler debugger format GPL linker record SDCC}, + colorlinks=true, + linkcolor=blue] {hyperref} +\end_preamble +\language english +\inputencoding auto +\font_roman times +\font_sans helvet +\font_typewriter courier +\font_default_family default +\font_sc false +\font_osf false +\font_sf_scale 100 +\font_tt_scale 100 +\graphics default +\paperfontsize default +\spacing single +\papersize default +\use_geometry false +\use_amsmath 1 +\use_esint 0 +\cite_engine basic +\use_bibtopic false +\paperorientation portrait +\secnumdepth 3 +\tocdepth 3 +\paragraph_separation skip +\defskip medskip +\quotes_language english +\papercolumns 1 +\papersides 1 +\paperpagestyle fancy +\tracking_changes false +\output_changes false +\author "" +\end_header + +\begin_body + +\begin_layout Title +CDB File Format +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +date{2003-03-21} +\end_layout + +\end_inset + + +\end_layout + +\begin_layout Author +Lenny Story +\end_layout + +\begin_layout Standard +\align center +SDCC Development Team +\end_layout + +\begin_layout Standard +\begin_inset LatexCommand tableofcontents + +\end_inset + + +\end_layout + +\begin_layout Section +Overview +\end_layout + +\begin_layout Standard +The CDB File is used to record all of the information that describes the + variables, functions, lines, and memory items. + These records provide the critical information that allows external utilities + to properly locate and interpret variables, functions, and types. + Development tools such as simulators debuggers and profilers use these + records to analyze and describe the code in terms of the high level language + in which it was written. + The CDB file is therefore the critical link to bridging the compiled code + image to the source files from which it was built. +\end_layout + +\begin_layout Section +Usage +\end_layout + +\begin_layout Standard +CDB files are created when the "- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-debug" option is used. + Each source file will have its own CDB file associated with it. + When the - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-debug flag is used during the link process, the CDB file of the FIRST source + module will contain all the records from all the source modules linked + as well as the linker records. +\end_layout + +\begin_layout Standard +Code and variables that are removed during the optimization phase will not + be present in the debug file. + Images created for debugging purposes should always disable as much optimizatio +n as possible. + The following options are critical for the completeness of the resulting + debugging file. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-debug Mandatory to produce a debugging file. + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-noinduction Induction processing occurs at the very latest stages of compilatio +n. + This results in the inability to report the location of the resulting variables. + Including this option disables the loop induction optimization. + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-nooverlay Overlay variables will not show up in the debug file. + Including this option will force variables to the data segment. +\end_layout + +\begin_layout Section +Conventions +\end_layout + +\begin_layout Standard +The record examples and grammar shown in this document are displayed on + multiple lines only for the purposes of readability. + The records contained within the CDB files are always encoded on a single + line. + +\end_layout + +\begin_layout Standard +Record grammar is indicated here using a custom format of the following + specifications: +\end_layout + +\begin_layout Itemize +Record Elements are surrounded using the characters `<' and '>'. +\end_layout + +\begin_layout Itemize +Alternation is indicated using the `|' character. +\end_layout + +\begin_layout Itemize +Non-mandatory items are surrounded using the characters `{` and `}'. +\end_layout + +\begin_layout Section +Record Formats +\end_layout + +\begin_layout Subsection +Basic Record Format +\end_layout + +\begin_layout Description +<:> +\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Type +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Description +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Form +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +M +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Module Record +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Compiler +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +F +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Function Record +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Compiler +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +S +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol Record +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Compiler +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +T +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Structure (Complex Type) Record +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Compiler +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +L +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Linker Record +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Assembler / Linker +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard +All records are ASCII text, with one record per line. + The record type is the first character, followed by a single colon ":". + Sub types are often included as part of the record specific format. +\end_layout + +\begin_layout Subsection +Module Record +\end_layout + +\begin_layout Description +<:> +\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard +M +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Module record type indicator +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +Filename +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +The filename of the module that this CDB file represents. +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard + +\series bold +Purpose +\end_layout + +\begin_layout Standard +The module record is used to define a source module. + It is usually used at the beginning of each of the module specific CDB + files, and will occur several times in the final CDB file produced by the + linker to represent each of the source modules. + The location of this record within the file does not necessarily indicate + the scope of the variables that follow. + Those variables that have module specific scope have an indication encoded + within their respective symbol entry. +\end_layout + +\begin_layout Standard + +\series bold +Examples +\end_layout + +\begin_layout Standard + +\family typewriter +M:Timer0 +\newline +M:_bp +\end_layout + +\begin_layout Subsection +Symbol Records +\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard +S +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol record type indicator +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +G +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Scope is global +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +F +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Scope is file +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +L +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Scope is local +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol name +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Scope level (see below) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Scope block (see below) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Type chain record (see type record below) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +
+\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Address space code (see table below) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Is this symbol on the stack? Indicates if the next parameter is valid. +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +The stack Offsetorelative to the +\begin_inset Quotes eld +\end_inset + +bp +\begin_inset Quotes erd +\end_inset + + variable. + (The libraries may have to be recompiled to include the - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-debug option for this variable to appear in the debug file). +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +If the address space is 'R', this field indicates the register that the + symbol is allocated. + The register name is in its native form: R1, AX, etc. +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Description +<:> +\series bold + +\newline +{ G | F | L { | +\begin_inset Quotes eld +\end_inset + +--null-- +\begin_inset Quotes eld +\end_inset + + }} +\newline +<$> +\newline +<$> +\newline +<$> +\newline +<(><)> +\newline +<,> +\newline +<,> +\newline +< +,> +\newline +<,><[><,>{<,>}<]> +\end_layout + +\begin_layout Standard +A symbol record is generated for each named symbol in the source file; this + includes local, global and parameter symbols. + +\end_layout + +\begin_layout Standard + +\series bold +Blocks and Levels +\end_layout + +\begin_layout Standard +The level & block are used to further scope local variables since C allows + unique definitions across different scope blocks. + When using the symbol records, it is always important to include the level + and block information as part of the identification. + It is possible to have two symbols that share the same name, but have different + scope information. +\end_layout + +\begin_layout Standard +The linker address records contain not only the name of the symbol, but + the Scope information as well, which is instrumental in determining the + correct instantiation of the symbol. +\end_layout + +\begin_layout Standard +Linker C line records also contain the Scope information (see below). +\end_layout + +\begin_layout Standard +The following code fragment illustrates a simple scope example: +\end_layout + +\begin_layout LyX-Code +foo() +\end_layout + +\begin_layout LyX-Code +{ +\end_layout + +\begin_layout LyX-Code +int c; /* block #1 , level #1 */ +\end_layout + +\begin_layout LyX-Code + { +\end_layout + +\begin_layout LyX-Code + int c; /* block #2, level #2 */ +\end_layout + +\begin_layout LyX-Code + ... +\end_layout + +\begin_layout LyX-Code + } +\end_layout + +\begin_layout LyX-Code + { +\end_layout + +\begin_layout LyX-Code + int c; /* block #3 , level #2 */ +\end_layout + +\begin_layout LyX-Code + ... +\end_layout + +\begin_layout LyX-Code + } +\end_layout + +\begin_layout LyX-Code +} +\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard +A +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +External stack +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +B +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Internal stack +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +C +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Code +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +D +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Code / static segment +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +E +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Internal ram (lower 128) bytes +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +F +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +External ram +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +G +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Internal ram +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +H +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Bit addressable +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +I +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +SFR space +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +J +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +SBIT space +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +R +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Register space +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +Z +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Used for function records, or any undefined space code +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Subsection +Type Chain Record +\end_layout + +\begin_layout Description +<{><}> +\series bold + <,> { <,>} <:> +\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +The size of the item in decimal. +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +The type encoded using the table below. +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +The sign of the item. + Encoded as 'U' or 'S'. +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard + +\series bold +Purpose +\end_layout + +\begin_layout Standard +The C programming language allows arbitrarily complex type constructions. + Because of this, the CDB file type designations are organized as a list + of basic primitive types. +\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard +DA +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Array of n elements +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +DF +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Function +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +DG +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Generic pointer +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +DC +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Code pointer +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +DX +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +External ram pointer +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +DD +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Internal ram pointer +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +DP +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Paged pointer +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +DI +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Upper 128 byte pointer +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SL +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +long +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SI +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +int +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SC +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +char +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SS +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +short +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SV +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +void +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SF +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +float +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +ST +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Structure of name +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SX +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +sbit +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SB +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Bit field of bits +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard + +\series bold +Examples +\end_layout + +\begin_layout Standard + +\family typewriter +\size small +S:LcheckSerialPort$pstBuffer$1$1({3}DG,STTTinyBuffer:S),R,0,0,[r2,r3,r4] +\newline +S:Ltimer +0LoadExtended$count$1$1({2}SI:S),B,1,-4 +\newline +S:G$T2CON_7$0$0({1}SX:S),J,0,0 +\newline +S:LAdcIniti +alize$a$1$1({2}SI:S),B,1,1 +\newline +S:G$ScanCount$0$0({2}SI:S),F,0,0 +\end_layout + +\begin_layout Subsection +Function Records +\end_layout + +\begin_layout Description +<:> +\series bold + +\newline +{ G | F | L { | +\begin_inset Quotes eld +\end_inset + +--null-- +\begin_inset Quotes eld +\end_inset + + }} +\newline +<$> +\newline +<$> +\newline +<$> +\newline +<(><)> +\newline +<,> +\newline +<,> +\newline +< +,> +\newline +<,> +\newline +<,> +\newline +<,> +\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard +F +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol record type indicator +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +G +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Scope is global +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +F +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Scope is file +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +L +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Scope is local +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol name +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Scope level (see below) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Scope block (see below) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Type chain record (see type record below) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +
+\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Address space code +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Indicates if this is a stack variable +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +If stack variable, the stack offset relative to the +\begin_inset Quotes eld +\end_inset + +bp +\begin_inset Quotes erd +\end_inset + + variable. + (Libraries will have to be compiled using the - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-debug option for this to be available) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Indicates if this is an interrupt handler. +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +If interrupt handler, this indicates the interrupt number. +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +If interrupt handler, this ist he register bank number. +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard + +\series bold +Purpose +\end_layout + +\begin_layout Standard +The Function record defines any Source File function. + Its construction is the same as the symbol record, with the addition of + 3 extra parameters for indicating interrupt handlers. +\end_layout + +\begin_layout Standard + +\series bold +Example +\end_layout + +\begin_layout Standard + +\family typewriter +F:G$main$0$0({2}DF,SV:S),C,0,0,0,0,0 +\newline +F:G$SioISR$0$0({2}DF,SV:S),Z,0,0,1,4,0 +\end_layout + +\begin_layout Subsection +Type Records +\end_layout + +\begin_layout Description +<:> +\series bold + +\newline +<$> +\newline + +\newline +<[> {} <]> +\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard +T +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Type record type indicator +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +The filename where this type is declared +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +The name of this type +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +(see below) +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Subsection +Type Member +\end_layout + +\begin_layout Description +<(><{><}><)> +\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +The offset of this type member in decimal. +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +A complete symbol record describing this Member. + (See +\begin_inset Quotes eld +\end_inset + +Symbol Records +\begin_inset Quotes erd +\end_inset + + above. +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard + +\series bold +Purpose +\end_layout + +\begin_layout Standard +Type records describe the complex types within the source file. + These include structure and union types. +\end_layout + +\begin_layout Standard + +\series bold +Examples +\end_layout + +\begin_layout Standard + +\family typewriter +T:Fcmdas$TTinyBuffer[ +\newline +({0}S:S$pNext$0$0({3}DG,STTTinyBuffer:S),Z,0,0) +\newline +({3}S:S$leng +th$0$0({1}SC:U),Z,0,0) +\newline +({4}S:S$maxLength$0$0({1}SC:U),Z,0,0) +\newline +({5}S:S$rindex$0$0({1 +}SC:U),Z,0,0) +\newline +({6}S:S$windex$0$0({1}SC:U),Z,0,0) +\newline +({7}S:S$buffer$0$0({64}DA64,SC:U) +,Z,0,0) +\newline +] +\end_layout + +\begin_layout Subsection +Link Address of Symbol +\end_layout + +\begin_layout Description +<:> +\series bold + +\newline +{ | F | L } +\newline +<$> +\newline +<$> +\newline +<$> +\newline +<:>
+\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard +L +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Link record type indicator +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +G +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol has file scope. +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +F +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol has file scope. +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +L +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol has function scope +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol name +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol level +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol block +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +
+\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol address in hex, relative to the address space code, in the matching + symbol record. +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard + +\series bold +Purpose +\end_layout + +\begin_layout Standard +The link address record is used to bind a memory location to a symbol record. +\end_layout + +\begin_layout Standard + +\series bold +Example +\end_layout + +\begin_layout Standard + +\family typewriter +L:G$P0$0$0:80 +\newline +L:G$ScanCount$0$0:0 +\newline +L:Fcmdas$_str_0$0$0:195 +\end_layout + +\begin_layout Subsection +Linker Symbol End Address Record +\end_layout + +\begin_layout Description +<:> +\series bold + +\newline +{ | F | L } +\newline +<$> +\newline +<$> +\newline +<$> +\newline +<:>
+\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard +L +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Link record type indicator +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +X +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Link end address sub type indicator +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +G +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol has file scope. +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +F +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol has file scope. +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +L +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol has function scope. +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol name +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol level +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol block +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +
+\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Symbol end address in hex, relative to the address space code contained + in the matching symbol record. +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard + +\series bold +Purpose +\end_layout + +\begin_layout Standard +The Linker Symbol end address record is primarily used to indicate the Ending + address of functions. + This is because function records do not contain a size value, as symbol + records do. +\end_layout + +\begin_layout Standard + +\series bold +Example +\end_layout + +\begin_layout Standard + +\family typewriter +L:XG$sysClearError$0$0:194 +\newline +L:XG$SioISR$0$0:A09 +\end_layout + +\begin_layout Subsection +Linker ASM Line Record +\end_layout + +\begin_layout Description + +\series bold +<:> +\newline +<$> +\newline +<$> +\newline +<:> +\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard +L +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Link record type indicator +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +A +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Link assembly file line record sub type indicator +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Filename of the assembly file. +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Line number in the above filename.{}These numbers start at 1 (not 0). +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +End address +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard + +\series bold +Purpose +\end_layout + +\begin_layout Standard +The linker Asm Line record is used to bind the execution address with a + source file and line number. +\end_layout + +\begin_layout Standard + +\series bold +Example +\end_layout + +\begin_layout Standard + +\family typewriter +L:A$TinyBuffer$2320:A13 +\newline +L:A$max1270$391:CA4 +\end_layout + +\begin_layout Subsection +Linker C-Line Record +\end_layout + +\begin_layout Description + +\series bold +<:> +\newline +<$> +\newline +<$> +\newline +<$> +\newline +<$> +\newline +<:> +\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard +L +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Link record type indicator +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +C +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Link assembly file line record sub type indicator +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Filename of the assembly file. +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Line number in the above filename. + These numbers start at 1 (not 0). +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Current level at this line and address. +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Current block at this line and address. +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +End address +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard + +\series bold +Purpose +\end_layout + +\begin_layout Standard +The linker C-Line record is used to bind the execution address with a source + file, line number and the level, block information. +\end_layout + +\begin_layout Standard +The following is an example source module with its lines showing the correspondi +ng C-Line Records. + You will notice in this example that there are no line entries for lines + 18, 19. + This is because the code was optimized and removed. +\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + + +\begin_inset Text + +\begin_layout Standard +01 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +02 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +struct complex +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +03 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +{ +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +04 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +int count; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +05 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +int Max; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +06 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +}; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +07 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +08 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +L:C$vars.c$8$0$0:38 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +void main(void) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +09 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +{ +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +10 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +int iterA; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +11 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +int iterB; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +12 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +struct complex myStruct; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +13 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +14 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +L:C$vars.c$14$1$1:C1 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +for(iterA = 0; iterA < 10; iterA++) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +15 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +{ +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +16 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +L:C$vars.c$16$2$2:B9 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +for(iterB = 0; iterB < 10; iterB++) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +17 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +{ +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +18 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +int iterA = 6 + iterB; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +19 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +iterA++; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +20 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +21 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +L:C$vars.c$21$1$1:69 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +myStruct.count++; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +22 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +23 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +L:C$vars.c$23$3$3:83 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +if(myStruct.count > myStruct.Max) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +24 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +L:C$vars.c$24$3$3:A3 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +myStruct.Max = mystruct.count; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +25 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +} +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +26 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +} +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +27 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +L:C$vars.c$27$1$1:CE +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +} +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard + +\series bold +Example +\end_layout + +\begin_layout Standard + +\family typewriter +L:C$max1270.c$35$1$1:CA9 +\newline +L:C$Timer0.c$20$1$1:D9D +\end_layout + +\begin_layout Section +Source File Example +\end_layout + +\begin_layout LyX-Code +sfr IM = 0x90; +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout LyX-Code +struct complex +\end_layout + +\begin_layout LyX-Code +{ +\end_layout + +\begin_layout LyX-Code + int count; +\end_layout + +\begin_layout LyX-Code + int Max; +\end_layout + +\begin_layout LyX-Code +}; +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout LyX-Code +void main(void) +\end_layout + +\begin_layout LyX-Code +{ +\end_layout + +\begin_layout LyX-Code + int iterA; +\end_layout + +\begin_layout LyX-Code + int iterB; +\end_layout + +\begin_layout LyX-Code + struct complex myStruct; +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout LyX-Code + for(iterA = 0; iterA < 10; iterA++) +\end_layout + +\begin_layout LyX-Code + { +\end_layout + +\begin_layout LyX-Code + for(iterB = 0; iterB < 10; iterB++) +\end_layout + +\begin_layout LyX-Code + { +\end_layout + +\begin_layout LyX-Code + int iterA = 6 + iterB; +\end_layout + +\begin_layout LyX-Code + iterA++; +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout LyX-Code + myStruct.count++; +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout LyX-Code + IM = iterA; +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout LyX-Code + if(myStruct.count > myStruct.Max) +\end_layout + +\begin_layout LyX-Code + myStruct.Max = myStruct.count; +\end_layout + +\begin_layout LyX-Code + } +\end_layout + +\begin_layout LyX-Code + } +\end_layout + +\begin_layout LyX-Code +} +\end_layout + +\begin_layout Section +CDB File Example +\end_layout + +\begin_layout Standard + +\family typewriter +M:vars +\newline +F:G$main$0$0({2}DF,SV:S),C,0,0,0,0,0 +\newline +T:Fvars$complex[({0}S:S$count$0$0({2}S +I:S),Z,0,0)({2}S:S$Max$0$0({2}SI:S),Z,0,0)] +\newline +S:Lmain$iterA$1$1({2}SI:S),R,0,0,[r0, +r1] +\newline +S:Lmain$iterB$1$1({2}SI:S),R,0,0,[r4,r5] +\newline +S:Lmain$myStruct$1$1({4}STcomplex:S), +E,0,0 +\newline +S:Lmain$iterA$3$3({2}SI:S),R,0,0,[r6,r7] +\newline +S:G$IM$0$0({1}SC:U),I,0,0 +\newline +S:G$main$0 +$0({2}DF,SV:S),C,0,0 +\newline +L:G$IM$0$0:90 +\newline +L:Lmain$myStruct$1$1:8 +\newline +L:A$vars$64:0 +\newline +L:A$vars$65: +3 +\newline +L:A$vars$67:B +\newline +L:A$vars$69:13 +\newline +L:A$vars$71:1B +\newline +L:A$vars$73:23 +\newline +L:A$vars$75:2B +\newline +L:A$vars$1 +29:33 +\newline +L:A$vars$131:36 +\newline +L:A$vars$158:38 +\newline +L:C$vars.c$10$0$0:38 +\newline +L:G$main$0$0:38 +\newline +L:A$vars$15 +9:3A +\newline +L:A$vars$163:3C +\newline +L:A$vars$164:3D +\newline +L:A$vars$165:3E +\newline +L:A$vars$166:40 +\newline +L:A$vars$167:41 +\newline +L +:A$vars$168:43 +\newline +L:A$vars$170:45 +\newline +L:A$vars$171:47 +\newline +L:A$vars$176:4A +\newline +L:A$vars$177:4C +\newline +L:A$va +rs$181:4E +\newline +L:A$vars$182:4F +\newline +L:A$vars$183:50 +\newline +L:A$vars$184:52 +\newline +L:A$vars$185:53 +\newline +L:A$vars$18 +6:55 +\newline +L:A$vars$191:57 +\newline +L:A$vars$196:59 +\newline +L:C$vars.c$20$3$3:59 +\newline +L:A$vars$197:5B +\newline +L:A$vars$198 +:5D +\newline +L:A$vars$200:5E +\newline +L:A$vars$201:5F +\newline +L:A$vars$202:61 +\newline +L:A$vars$207:62 +\newline +L:C$vars.c$21$3$3: +62 +\newline +L:A$vars$208:63 +\newline +L:A$vars$209:66 +\newline +L:A$vars$216:67 +\newline +L:C$vars.c$23$3$3:67 +\newline +L:A$vars$217:6 +9 +\newline +L:A$vars$220:6B +\newline +L:A$vars$221:6C +\newline +L:A$vars$222:6F +\newline +L:A$vars$227:70 +\newline +L:A$vars$228:72 +\newline +L:A$ +vars$232:74 +\newline +L:C$vars.c$25$3$3:74 +\newline +L:A$vars$238:76 +\newline +L:C$vars.c$27$3$3:76 +\newline +L:A$vars$239:77 +\newline +L +:A$vars$240:79 +\newline +L:A$vars$241:7A +\newline +L:A$vars$242:7C +\newline +L:A$vars$243:7E +\newline +L:A$vars$244:80 +\newline +L:A$va +rs$245:83 +\newline +L:A$vars$248:85 +\newline +L:A$vars$256:87 +\newline +L:C$vars.c$28$3$3:87 +\newline +L:A$vars$257:8A +\newline +L:A$var +s$263:8D +\newline +L:C$vars.c$18$2$2:8D +\newline +L:A$vars$264:8E +\newline +L:A$vars$265:91 +\newline +L:A$vars$268:92 +\newline +L:A$vars +$274:94 +\newline +L:C$vars.c$16$1$1:94 +\newline +L:A$vars$275:95 +\newline +L:A$vars$276:98 +\newline +L:A$vars$278:99 +\newline +L:A$vars$ +282:9C +\newline +L:C$vars.c$31$1$1:9C +\newline +L:XG$main$0$0:9C +\newline +L:A$vars$84:A1 +\newline +L:A$vars$85:A4 +\newline +L:A$vars$86 +:A7 +\newline +L:A$vars$87:A9 +\newline +L:A$vars$88:AB +\newline +L:A$vars$91:AE +\newline +L:A$vars$92:B0 +\newline +L:A$vars$93:B2 +\newline +L:A$var +s$94:B4 +\newline +L:A$vars$95:B6 +\newline +L:A$vars$96:B8 +\newline +L:A$vars$97:B9 +\newline +L:A$vars$98:BB +\newline +L:A$vars$99:BD +\newline +L:A +$vars$100:BE +\newline +L:A$vars$101:C1 +\newline +L:A$vars$102:C3 +\newline +L:A$vars$103:C6 +\newline +L:A$vars$104:C7 +\newline +L:A$vars +$105:C8 +\newline +L:A$vars$106:C9 +\newline +L:A$vars$107:CA +\newline +L:A$vars$108:CB +\newline +L:A$vars$109:CE +\newline +L:A$vars$110: +D0 +\newline +L:A$vars$111:D2 +\newline +L:A$vars$112:D5 +\newline +L:A$vars$113:D7 +\newline +L:A$vars$114:DA +\newline +L:A$vars$118:DD +\end_layout + +\end_body +\end_document diff --git a/doc/choices.txt b/doc/choices.txt new file mode 100644 index 0000000..1442eca --- /dev/null +++ b/doc/choices.txt @@ -0,0 +1,242 @@ +Some of the implementation choices +---------------------------------- + +gbz80: + +Load from direct space: + Alternatives: + 1. Via HL + ld hl,#dir + ld x,(hl) + inc hl + ld y,(hl) + 2. Via a + ld a,(dir) + ld x,a + ld a,(dir+1) + ld x,a + 1 is bad when x or y involve HL (1b) + 8 16 32 + 1 = 12 + n*(8+8) - 8 20 36 68 + 1b = n*(12+12+8) 32 64 128 + 2 = n*(16+4) 20 40 80 + So choose 2. + + Hmm. (2) is too hard to support in the current model. + +On stack word push + 1. lda hl,x(sp) + ld a,(hl+) + ld h,(hl) + ld l,a + push hl + 2. lda hl,x(sp) + ld e,(hl) + inc hl + ld d,(hl) + 1 = d + 8 + 8 + 4 + 2 = d + 8 + 8 + 8 + +Structure member get: + Normally fetch pair + Then add pair and constant with result in hl + + ld l,c ; 4 + ld h,b ; 4 + inc hl .. ; 6 = 8 + 6n +or + ld l,c ; 4 + ld h,b ; 4 + ld a,#0x06 ; 7 + add a,c ; 4 + ld l,a ; 4 + ld a,#0x00 ; 7 + adc a,b ; 4 + ld h,a ; 4 = 38 +alt: (only when result=hl and left, rigth = pair, const) + ld hl,#const ; 10 + add hl,pair ; 11 = 21 + +So (1) is best for n <= 2, (2) is just bad, (3) is good n > 2 + +How about: + pair = pair + constant: +1: + ld a,#0x08 ; 7 + add a,c ; 4 + ld c,a ; 4 + ld a,#0x00 ; 7 + adc a,b ; 4 + ld b,a ; 4 = 30 +2: + ld hl,#const ; 10 + add hl,pair ; 11 + ld c,l ; 4 + ld b,h ; 4 = 29 +One cycle. If I cache HL later it will throw away the advantage. Choose 1. + +PlusIncr on pairs: +1: + inc pair ; 6 = 6n +2: + ld a,#0x04 ; 7 + add a,c ; 4 + ld c,a ; 4 + ld a,#0x00 ; 7 + adc a,b ; 4 + ld b,a ; 4 = 30 +So n <= 5 (1) is better. + +Frame pointer: +It's nice to use HL as the temp register, but what if I used it as the +frame pointer instead of ix? + +Instead of: + ld e,5(ix) ; 19 + ld d,6(ix) ; 19 = 38 + + ld hl,#5 ; 10 + add hl,sp ; 11 + ld e,(hl) ; 7 + inc hl ; 6 + ld d,(hl) ; 7 = 41 + +Things get better when you access the same set over, as you get rid +of the setup. But they get worse when both ops are on the stack/in +direct space. Easiest this way for now. iy may benifit... + +cmpGt: + ld l,#0x80 ; 7 + ld a,-1(ix) ; 19 + xor a,#0x80 ; 7 + ld h,a ; 4 + ld a,#0x02 ; 7 + sub a,-2(ix) ; 19 + ld a,l ; 4 + sbc a,h ; 4 = 71 + +vs + ld hl,0x8002 ; 10 + ld a,-2(ix) ; 19 + xor 0x80 ; 7 + ld d,a ; 4 + ld e,-1(ix) ; 19 + sbc hl,de ; 15 = 74 + +Why is there the whole xor thing going on? + +cmpGt using sub: + left right l-r c expect + 0 0 0 0 false + -1 0 -1 0 false + 1 0 1 0 true + 0 -1 1 1 true + 0 1 -1 1 false + +With top most bits xored + 80h 80h 0 0 false + 7fh 80h FFh 1 false + 81h 80h 01h 0 true + 80h 7fh 01h 0 true + 80h 81h FFh 1 false + +r-l instead - ah. + 80h 80h 0 0 false + 7fh 80h 01h 0 false + 81h 80h FFh 1 true + 80h 7fh FFh 1 true + 80h 81h 01h 0 false + +How about using the sign bit and no XOR on r-l? + 0 0 0 false + FFh 0 01h false + 01h 0 FFh true + 0 FFh FFh true + 0 01h 01h false - works + +cmpEq: + ld hl,#nn ; 10 + ld c,(ix+-5) ; 19 + ld b,(ix+-4) ; 19 + or a ; 4 + sbc hl,bc ; 15 + jp nz,l19 ; 10 = 77 + + ld a,-82(ix) ; 19 + cp a,#0x01 ; 7 + jp nz,00129$ ; 10 + ld a,-81(ix) ; 19 + or a,a ; 7 + jp nz,00129$ ; 10 - 72 + +Add: + ld a,c ; 4 + add a,#0x04 ; 7 + ld -4(ix),a ; 19 + ld a,b ; 4 + adc a,#0x00 ; 7 + ld -3(ix),a ; 19 = 60 +vs + ld hl,#4 ; 10 + add hl,bc ; 11 + ld -4(ix),l ; 19 + ld -3(ix),h ; 19 = 59 + +Same argument as above - not worth the extra cycle. + +Pending optimisations: + iTemp1 = @iTemp2 + iTemp3 = iTemp1 + + iTemp4 = something in direct space + ... + push iTemp4 + +Swaps: + ld hl,bc ; 8 + ld bc,de ; 8 + ld de,hl ; 8 + +vs + push bc ; 11 + ld bc,de ; 8 + pop de ; 11 + +Swaps 2: + ld a,h + ld h,b + ld b,a + ld a,l + ld l,c + ld c,aq ; 6*4 = 24 + +Cleaning up the arguments to a call: + ld iy,#n ; 14 + add iy,sp ; 15 + ld sp,iy ; 10 = 39 + + pop af ; 5/byte + + +So for 8 bytes and above use the first form. + +Pointer assign: + ld hl,bc ; 4+4 + ld e,(hl) ; 7 + inc hl ; 6 + ld d,(hl) ; 7 + +vs: + ld a,(bc) ; 7 + ld e,a ; 4 + inc bc ; 6 + ld a,(bc) ; 7 + ld d,a ; 4 + +Same cost. Not worth it, although is does free up HL. + +Shift left signed on HL + sla l + rl h ; 8+8 = 16 + + add hl,hl ; 11 diff --git a/doc/clean.mk b/doc/clean.mk new file mode 100644 index 0000000..b5cd2e7 --- /dev/null +++ b/doc/clean.mk @@ -0,0 +1,21 @@ +clean: + rm -rf $(MANUAL).html $(TSS).html $(CDB).html + rm -rf $(MANUAL).txt $(TSS).txt $(CDB).txt \ + *.pdf *.tex *.aux *.dvi *.idx *.ilg *.out\ + *.ind *.log *.toc *~ \#* *.ps */*.css */*.pl *.gif core *.glo + rm -rf sdcc-doc sdcc-doc.tar.bz2 + if [ "$(srcdir)" != "." ]; then rm -f *.lyx; fi + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f Makefile + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean diff --git a/doc/figures/ddd_example.eps b/doc/figures/ddd_example.eps new file mode 100644 index 0000000..558602b --- /dev/null +++ b/doc/figures/ddd_example.eps @@ -0,0 +1,618 @@ +%!PS-Adobe-3.0 EPSF-3.0 +%%BoundingBox: 0 0 785 976 +% +% created by bmeps 1.2.5 (SCCS=1.77) +% +/pstr + 2355 string +def +/inputf + currentfile + /ASCII85Decode filter + /FlateDecode filter +def +gsave +0 976 translate +785 976 scale +785 976 8 [785 0 0 -976 0 0] +{ inputf pstr readstring pop } +false +3 +colorimage +GhVMtBs8m`^#46$pSW5qhWg-b\;_0MHL/@A^"S>N#?3$%OPrap7B;eO*<`3r_L`[9 +:_Y]c<,n-oW^%+D9$rf)KS)UVbfGaP?Q7BGW]Qq"\g.."OmtWJ&%lK8-!s[_/(^;, +Ac@.`@RokAR="&&F8bf^X^(2*p\*W#!!!!!n<^o&f0]K$=#^.8M*rPM80ehI;4PRp +mqmJXV"s3Q?P82`,*>DA;Q`K#CW_'>lgFe.6m@aa,SGr5:1\4`Q"fjYs#5d&;GZ'@ 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z3yeO;aDwl3I{8_MG~j0`a~N8vWgsGGel`E8gzWXM{0;Kds%E~J2*X(*4^`Pa-`e_H zd0+)HT`p>=8S zA1|$vn$FPNL`xMG>g}fA?zXA8mq58rUo!OLaoX2NYg$WA(!~+V+>Hz z83Qg^L4m4nHH2|ZYV`L^C8|em-=9BB60Y{663|Q!`!1eqFH3Ve=KFm&y6;rVa{)`S z5Rm1JqT27a%083i+QRo(E=JE7wIaMy0X71(JlP}gRC2G8noMaI^qq)rT+2srNf+hZ z@2b#vqb{RGRS!dT?{PG5l5f7I4lIy%EEiq{3+GGHIIf8rZdYsK_Ki8!(g2#KT*lZ@ zkMdlFOF##eP;BGS;3@Ani=bl5#U3Q_|9|#X#aD_>e)WxL-*;t%n - all ports + char isalnum (unsigned char c); MACRO + Return true if c is an ASCII letter or digit + 'a-z','A-Z', '0'-'9' otherwise return false. + +isalpha - character classification - #include - all ports + char isalpha (unsigned char c); MACRO + Return true if c is an ASCII letter + 'a-z','A-Z' otherwise return false. + +isascii - character classification - #include - missing + char isascii (unsigned char c); + Return true if c is an 7-bit ASCII character + 0x00-0x7F otherwise return false. + +iscntrl - character classification - #include - all ports + char iscntrl (unsigned char c); + Return true if c is an ASCII control character + 0x00-0x1F or 0x7F (DEL) otherwise return false. + +isdigit - character classification - #include - all ports + char isdigit (unsigned char c); + Return true if c is an ASCII digit '0'-'9' + otherwise return false. + +isgraph - character classification - #include - all ports + char isgraph (unsigned char c); + Return true is c is an ASCII printable graphic + excluding space 0x21-0x7E otherwise return false. + +islower - character classification - #include - all ports + char islower (unsigned char c); + Return true if c is an ASCII lower case letter + 'a'-'z' otherwise return false. + +isprint - character classification - #include - all ports + char isprint (unsigned char c); + Return true is c is an ASCII printable graphic + including space 0x20-0x7E otherwise return false. + +ispunct - character classification - #include - all ports + char ispunct (unsigned char c); + Return true if c is ASCII punctuation (isgraph but not isalnum) + otherwise return false. + +isspace - character classification - #include - all ports + char isspace (unsigned char c); + Return true if c is an ASCII white space character + space, tab, carriage return, newline or vertical tab + 0x09-0x0D, 0x20 otherwise return false. + +isupper - character classification - #include - all ports + char isupper (unsigned char c); + Return true if c is an ASCII upper case letter + 'A'-'Z' otherwise return false. + +isxdigit - character classification - #include - all ports + char isxdigit (unsigned char c); + Return true if c is an ASCII hexidecimal digit + '0-9','a-f','A-F' otherwise return false. + +toascii - character classification - #include - all ports + char toascii(unsigned char c); MACRO + Convert c from 8-bit value to 7-bit ASCII. + +tolower - character classification - #include - all ports + char _tolower(unsigned char c); MACRO + char tolower(unsigned char c); MACRO + Convert c from upper case to lower case. + +toupper - character classification - #include - all ports + char _toupper(unsigned char c); MACRO + char toupper(unsigned char c); MACRO + Convert c from lower case to upper case. + +__uchar2fs - IEEE single precision math - #include - ??? ports + float __uchar2fs (unsigned char uc); INTERNAL + Convert an unsigned char to float. + +__schar2fs - IEEE single precision math - #include - ??? ports + float __schar2fs (signed char sc); INTERNAL + Convert a signed char to float. + +__uint2fs - IEEE single precision math - #include - ??? ports + float __uint2fs (unsigned int ui); INTERNAL + Convert an unsigned int to float. + +__sint2fs - IEEE single precision math - #include - ??? ports + float __sint2fs (signed int si); INTERNAL + Convert a signed int to float. + +__ulong2fs - IEEE single precision math - #include - ??? ports + float __ulong2fs (unsigned long ul); INTERNAL + Convert an unsigned log to float. + +__slong2fs - IEEE single precision math - #include - ??? ports + float __slong2fs (signed long sl); INTERNAL + Convert a signed long to float. + +__fs2uchar - IEEE single precision math - #include - ??? ports + unsigned char __fs2uchar (float f); INTERNAL + Convert a float to unsigned char; + +__fs2schar - IEEE single precision math - #include - ??? ports + signed char __fs2schar (float f); INTERNAL + Convert a float to signed char; + +__fs2uint - IEEE single precision math - #include - ??? ports + unsigned int __fs2uint (float f); INTERNAL + Convert a float to unsigned int; + +__fs2sint - IEEE single precision math - #include - ??? ports + signed int __fs2sint (float f); INTERNAL + Convert a float to signed int; + +__fs2ulong - IEEE single precision math - #include - ??? ports + unsigned long __fs2ulong (float f); INTERNAL + Convert a float to unsigned long; + +__fs2slong - IEEE single precision math - #include - ??? ports + signed long __fs2slong (float f); INTERNAL + Convert a float to signed long. + +__fsadd - IEEE single precision math - #include - ??? ports + float __fsadd (float a1, float a2); INTERNAL + Add two floats. + +__fssub - IEEE single precision math - #include - ??? ports + float __fssub (float a1, float a2); INTERNAL + Subtract two floats. + +__fsmul - IEEE single precision math - #include - ??? ports + float __fsmul (float a1, float a2); INTERNAL + Multiply two floats. + +__fsdiv - IEEE single precision math - #include - ??? ports + float __fsdiv (float a1, float a2); INTERNAL + Divide two floats. + +__fslt - IEEE single precision math - #include - ??? ports + char __fslt (float a1, float a2); INTERNAL + Compare two floats lt. + +__fseq - IEEE single precision math - #include - ??? ports + char __fseq (float a1, float a2); INTERNAL + Compare two floats eq. + +__fsneq - IEEE single precision math - #include - ??? ports + char __fseq (float a1, float a2); INTERNAL ??? missing in float.h ??? + Compare two floats neq. + +__fsgt - IEEE single precision math - #include - ??? ports + char __fsgt (float a1, float a2); INTERNAL ??? typo in float.h ??? + Compare two floats gt. + +malloc - memory allocation - #include - ??? ports + void *malloc (unsigned int); + void xdata * malloc (unsigned int ); + Allocate a block of memory from the heap; + +free - memory allocation - #include - ??? ports + void free (void *p); + void free (void xdata * p); + Return previously allocated memory to the heap. + +init_dynamic_memory - memory allocation - #include - ??? ports + void init_dynamic_memory (MEMHEADER xdata * , unsigned int ); + Initialize the memory allocation system. + +sincosf - ANSI C math - #include - all ports + float sincosf(const float x, const int iscos); INTERNAL + Compute the sine or cosine of x. + +tancotf - ANSI C math - #include - all ports + float tancotf(const float x, const int iscot); INTERNAL + Compute the tangent or cotangent of x. + +asincosf - ANSI C math - #include - all ports + float asincosf(const float x, const int isacos); INTERNAL + Compute the arc sine or arc cosine of x. + +sincoshf - ANSI C math - #include - all ports + float sincoshf(const float x, const int iscosh); INTERNAL + Compute the hyperbolic sine or hyperbolic cosine of x. + +sinf - ANSI C math - #include - all ports + float sinf (const float x); + Compute sine of x. + +cosf - ANSI C math - #include - all ports + float cosf (const float x); + Compute cosine of x. + +tanf - ANSI C math - #include - all ports + float tanf (const float x); + Compute tangent of x. + +cotf - ANSI C math - #include - all ports + float cotf (const float x); + Compute cotangent of x. + +asinf - ANSI C math - #include - all ports + float asinf (const float x); + Compute the arc sine of x. + +acosf - ANSI C math - #include - all ports + float acosf (const float x); + Compute the arc cosine of x. + +atanf - ANSI C math - #include - all ports + float atanf (const float x); + Compute the arc tangent of x. + +atan2f - ANSI C math - #include - all ports + float atan2f (const float x, const float y); ??? x,y reversed ??? + Compute the arc tangent of (x/y); + +sinhf - ANSI C math - #include - all ports + float sinhf (const float x); + Compute the hyperbolic sine of x. + +coshf - ANSI C math - #include - all ports + float coshf (const float x); + Compute the hyperbolic cosine of x. + +tanhf - ANSI C math - #include - all ports + float tanhf (const float x); + Compute the hyperbolic tangent of x. + +expf - ANSI C math - #include - all ports + float expf (const float x); + Compute e to the x power. + +logf - ANSI C math - #include - all ports + float logf (const float x); + Compute log base e of x. + +log10f - ANSI C math - #include - all ports + float log10f (const float x); + Compute log base 10 of x. + +powf - ANSI C math - #include - all ports + float powf (const float x, const float y); + Compute x to y power. + +sqrtf - ANSI C math - #include - all ports + float sqrtf (const float x); + Compute the square root of x. + +fabsf - ANSI C math - #include - all ports + float fabsf (const float x); + Compute the absolute value of x. + +frexpf - ANSI C math - #include - all ports + float frexpf (const float x, int *pw2); + Split x in to mantissa and exponent parts. + +ldexpf - ANSI C math - #include - all ports + float ldexpf (const float x, const int pw2); + Combine mantissa and exponent parts of a float. + +ceilf - ANSI C math - #include - all ports + float ceilf (float x); + Find the smallest integer not less than x. + +floorf - ANSI C math - #include - all ports + float floorf (float x); + Find the largest integer not more than x. + +modff - ANSI C math - #include - all ports + float modff (float x, float * y); + Split x in to integer and fractional parts. + +setjmp - long jump - #include - ??? ports + int setjmp (unsigned char * jmpb); + Save the return address and sufficient task state + to allow implementation of co-routines or error + handlers that unwind the stack using longjmp. + Returns 0, which is reserved and cannot be used + by longjmp. + +longjmp - long jump - #include - ??? ports + int longjmp (unsigned char * jmpb, int retval); + Return to the the location and task state previously + save in the jump buffer. Any integer number except 0 + may be passed as retval. + +stdio.h +/*------------------------------------------------------------------------- +printf_small - standard character I/O - #include - all ports + void printf_small (char *,...); + +printf - standard character I/O - #include - all ports + int printf (const char *,...); + +vprintf - standard character I/O - #include - all ports + int vprintf (const char *, va_list); + +sprintf - standard character I/O - #include - all ports + int sprintf (const char *, const char *, ...); + +vsprintf - standard character I/O - #include - all ports + int vsprintf (const char *, const char *, va_list); + +puts - standard character I/O - #include - all ports + int puts(const char *); + +gets - standard character I/O - #include - all ports + char *gets(char *); + +getchar - standard character I/O - #include - all ports + char getchar(void); + +putchar - standard character I/O - #include - all ports + void putchar(char); + +string.h +/*------------------------------------------------------------------------- +strcpy - string manipulation - #include - all ports + char *strcpy (char * d, char * s); + Copy the nul terminated source string s to the destination d. + +strncpy - string manipulation - #include - all ports + char *strncpy(char * d, char * s, int n); + Copy the nul terminated source string s to the destination d but + do not copy more than n characters even if this causes d to not + be nul terminated. + +strcat - string manipulation - #include - all ports + char *strcat (char * front, char * back); + Copy the nul terminated string back to the end of the nul terminated + string front, overwriting the nul and creating a concatenation of + the two with a single trailing nul terminator. + +strncat - string manipulation - #include - all ports + char *strncat(char * front, char * back, int n); + Copy the nul terminated string back to the end of the nul terminated + string front, overwriting the nul and creating a concatenation of + the two, but do not copy more than n characters, even if this causes + the result to no be nul terminated. + +strcmp - string manipulation - #include - all ports + int strcmp (char * asrc, char * adst); + Compare two nul terminated strings asrc and adst. Return a value < 0 if asrc + is less than adst. Return a value > 0 if asrc is greater than adst. Otherwise + return 0. + +strncmp - string manipulation - #include - all ports + int strncmp(char * asrc, char * adst, int n); + Compare two nul terminated strings asrc and adst but do not check more than n + characters. Return a value < 0 if asrc is less than adst. Return a value > 0 + if asrc is greater than adst. Otherwise return 0. + +strchr - string manipulation - #include - all ports + char *strchr (char * string, char ch); + Return a pointer to the first occurrence of the character ch is string + or a NULL pointer if not found. + +strrchr - string manipulation - #include - all ports + char *strrchr(char * string, char ch); + Return a pointer to the last occurrence of the character ch is string + or a NULL pointer if not found. + +strspn - string manipulation - #include - all ports + int strspn (char *, char *); + +strcspn - string manipulation - #include - all ports + int strcspn(char *, char *); + +strpbrk - string manipulation - #include - all ports + char *strpbrk(char *, char *); + +strstr - string manipulation - #include - all ports + char *strstr (char *, char *); + +strlen - string manipulation - #include - all ports + int strlen (char * ); + +strtok - string manipulation - #include - all ports + char *strtok (char *, char *); + +memcpy - string manipulation - #include - all ports + void *memcpy (void *, void *, int ); + +memcmp - string manipulation - #include - all ports + int memcmp (void *, void *, int ); + +memset - string manipulation - #include - all ports + void *memset (void *, unsigned char , int ); + +time.h +/*------------------------------------------------------------------------- + +mktime - time and date - #include - all ports + time_t mktime(struct tm *timeptr); + +asctime - time and date - #include - all ports + char *asctime(struct tm *timeptr); + +ctime - time and date - #include - all ports + char *ctime(time_t *timep); + diff --git a/doc/macro-sys-design.txt b/doc/macro-sys-design.txt new file mode 100644 index 0000000..36bdbed --- /dev/null +++ b/doc/macro-sys-design.txt @@ -0,0 +1,79 @@ +Macro system design +$Id: macro-sys-design.txt 5290 2008-12-19 07:09:42Z borutr $ + +The purposes of the macro system are: +1. Provide a way to target other assemblers than asxxxx, such as the +GB IAR or rgbds assemblers. +2. Provide a way to target multiple similar processors at a relatively +simple level from one backend, such as the gbz80 and z80. +3. Provide a way to dynamically build a command line for any spawned +processes. +4. Provide a way for the backend to conveniently access volatile global data +such as the source file name or current function name. This is mainly +to get around assembler limitations. + +Examples are: +1. Different assemblers use different forms for immediate values. + Compare: + ld a,#0x00 + ld a,$00 + ld a,#$00 + Different assemblers use different forms for certain constructs. + Compare: + .ds 2 + DS 2 + DEFS 2 + +2. Some concepts, such as prolog and epilogue can be combined. + Compare: + push ix + ld ix,#0 + add ix,sp + + ld hl,0(sp) + +3. Various paths such as include or library paths may change at run +time. + +4. Need to use the function name in a temporary variable name as the +assembler doesn't support temporary local labels + Compare: + 1$: + _func_0001: + +Types of data: +1. Static for a given starting set of parameters, such as target +assembler or path + + {zero} -> #0, $0, 0x00 + {sdccinclude} -> c:/sdcc/include, /usr/share/sdcc/include + +2. Static for a given starting set of parameters, but include +arguments inside them + + {immeda} -> #0x%02X, $%02X + {areaa} -> .area %s, SECTION "%s" + +3. Volatile throughout the run time with no parameters + + {currfuncv} -> _func + +4. Volatile with arguments + {templabeldef} -> {currfuncv}_%d: + +Rules: +1. Macros are surrounded by curly braces {}. +2. Curly braces cannot appear in any data. +3. Macros will be recursively expanded. The expansion cannot be +cyclic. +4. Macros used as values to arguments will be recursively expanded. +Any macros used as argument values cannot require arguments. If they +do the arguments will not be evaluated. + +Problems: +1. There is no type checking or usage checking due to things being +evaluated at run time. This could be verified by using a separate +perl script to statically evaluate the strings. + +-- Michael + diff --git a/doc/random-notes.txt b/doc/random-notes.txt new file mode 100644 index 0000000..301c6de --- /dev/null +++ b/doc/random-notes.txt @@ -0,0 +1,382 @@ +Random notes +------------ +A random set of notes about sdcc and how it works. + +Michael on the register allocation stage: +----------------------------------------- +Lets trace how the register allocator in the mcs51 port works. + +Some concepts: +eBBlock + A basic block. I can't remember the conditions, but a basic block +is one that is easy to optimise and analyse. I guess this means that it has +a nice set of assignments and a reasonably straight flow. +iCode + Intermediate code. Provides the interface between the parser + optimiser +and the code generator by providing an abstract machine with infinite registers +which the parser can generate for and the back end can turn into real code. +iTemps + An iTemp is a temporary register used in iCode. These will eventually +be either replaced, allocated into a register, or placed onto the stack by the +backend. +Live range + The live range of an iTemp is the part of the code that the iTemp is used +over. Generally the live range of an iTemp is from its first assignment to its +last use. + +Input to mcs51_assignRegisters is an array of basic blocks. Assign +registers is normally called at the end of a function. + +In pseudo code, +1. For each basic block, pack the registers in the block. + In this case register packing consists of: + Remove any unneded iTemps that are just used in assignments. + Mark anything that can be rematerialised as rematerialisable. + There is no way I spelt that correctly. Something is rematerialisable + if it can be generated easily and is constant, and hence dosn't need + to be cached away in an iTemp. An example is the address of something. + Packs iTemps that are only used once into normally unavailable registers. + Register packing removes unneeded iTemps. +2. Determine what number and type of registers are needed for each + live range. + It does + If the iTemp lives for zero time, don't bother assigning + If its not an iTemp, skip for now. + If its a conditional (determined in the register packing), skip as it will + be stored in carry. + If the iTemp is already packed from 1.c, skip + If the iTemp is remat and some other magic, skip. + Else set the number and type of registers based on the size of the iTemp. +3. Assign registers for each segment. + For each iCode, do + If it is a IPOP (pop of an iTemp at the end of a block), reset the LR. + De-assign the live ranges of the iTemps that expire here. + For each iTemp, do + If this iTemp is still alive, skip + If this iTemp is spilt on the stack, free the location and continue. + If there are no registers assigned (?), continue. + Some magic using IFX and IPOP + If the iTemp has no registers, continue. + If the result of this iCode doesnt yet have registers, allocate them now. Weird. + Deallocate the registers used. + Skip instructions that dont need registers (IFX, JUMPTABLE, POINTER_SET) + Only assign registers to the result of this iCode. + If the iCode has registers, or has been spilt, continue. + If this will cause a spill as it needs more registers than are free, then + Find those that can be spilt. + Spill this if its easy. + Spill this if its the least used. + Allocate registers to the result iTemp + If any registers in the result are shared with the operand, make them line up. +4. Create the register mask for each segment. + For each iCode, do + Set the used register bit vector from the used registers. + Mark these registers as used in the higher function. This lets the generator + decide which registers need to be saved when calling or being called by a function. + Hmm. It seems to re-setup the used register bit vector. +5. Redo the stack offsets. +6. Turn the basic blocks into an intermediate code chain. + Takes the array of basic blocks and pulls them out into one iCode chain. +7. Optimise the labels in the iCode chain. + Skipped if the label optimisations are turned off. + Remove any gotos that go to the next line. + Simplify any chained gotos + Remove unreferenced labels + Remove unreferenced code. +7. Generate the mcs51 code from the iCode chain. +8. Deallocate everything (registers and stack locations). + +Sandeep: +-------- +======= +Sandeep: +-------- +The Register Allocation story. + +Before I get into this there are a few important fields +on the iCode & oprtand data structures that need to be +addressed. + +iCode. +----- + ->key - is an unique number assigned to this + iCode when this icode is allocated. + + ->seq - sequence number of the iCode given in + ascending order of execution. + +operand. +------- + ->key - unique number for an operand when operand + is allocated. + +OP_LIVEFROM(op) - sequence number of the iCode where it was + first defined. Computed in SDCClrange.c + +OP_LIVETO(op) - sequence number of the iCode where it is + last used. Computed in SDCClrange.c + + + + +Sandeep: +-------- +Adding memory maps for AVR, setup default map for +local & global variables in port.h will be initialised +by the __finaliseOptions() [good functions]..some +kludges remain because of the "overlay" segment for 8051. + +The memory segment stuff will have to be made more flexible. +Currently there does not seem to be a 1-to-1 correspondence +between storage class & memory map. (should there be??). + +Also Added check for memory map in SDCCmem.c allocLocal +and allocglobal for "eeprom" memory space (AVR). + + + +Michael: +-------- +Tracing parmBytes and function calls. + +Bug: +void printf(const char *format); + +void puts(const char *s) +{ + printf(s); +} + +Generates the pseudo-code: + hl = s + push hl + call printf + pop l (not hl - so parmBytes is too small) + +parmBytes for a function call seems to be setup in geniCodeCall in +SDCCicode.c. + +geniCodeCall: +* Takes care of calls with side effects (?) +* Generates the icode to push the parameters (this also computes the + resulting stack size) +* Generates a CALL or PCALL depending on if its a function or pointer to. +* Computes the result +* Adds the code for the call to the chain. + +My bug is probably in geniCodeParms - it's probably computing the +size of pointers wrong. + +geniCodeParms: +* A 'parm' node causes this to be run on the tree branches. +* It switches on the stack mode and sendto mode, and adds the + instructions required to push or put. +* A push adds the result of 'getSize' to the stack size. + +So the bug is probably in getSize. 's' is not an aggregate, so the +bug is in getSize(). + +It seems that IS_SPEC() is being set, deferencing *s so that it's size +is sizeof(char) == 1. It's either a SPECIFIER or a DECLARATOR - seems that +were the wrong way around. This is set in SDCCsymt.c, SDCCval.c, and the +yacc file. SDCCsymt.c and SDCCval.c havnt really changed in 5 days - must +be SDCC.y. Nope, no changes. diff against 5 days ago shows only interesting +changes are in SDCCicode. Same with -14 days. + +Michael +------- +Next bug is global function parameters not being pushed correctly. i.e + +unsigned int counter; + +void print(void) +{ + printf("Counter is %u\n", counter); +} +generates: +_print:: + ld hl,#_counter + push hl + ld hl,#str_1 + push hl + call printf + fix, ret + +which is more like: + printf("Counter is %u\n", &counter); + +First looking in SDCCicode.c for the stuff that generates function calls: +Probably a bug in geniCodeParams. +Nope, a bug in my stuff :) + +Michael +------- +Comparing the dhrystone code vs Hitech C v7.50 + +cp: + ld hl,__r + ld (_Next_Ptr_Glob),hl +vs: + ld hl,#__r + ld iy,#_Next_Ptr_Glob + ld 0(iy),l + ld 1(iy),h + +cp: + ld a,#<__r + add a,#0x27 + ld iy,#_Ptr_Glob + ld 0(iy),a + ld a,#>__r + adc a,#0x00 + ld 1(iy),a +vs: + ld hl,__r+027h + ld (_Ptr_Glob),hl + +cp: + ld iy,#_Next_Ptr_Glob + ld a,0(iy) + ld (hl),a + inc hl + ld a,1(iy) + ld (hl),a + +vs: + ld bc,(_Next_Ptr_Glob) + ld hl,(_Ptr_Glob) + ld (hl),c + inc hl + ld (hl),b + + +cp: + ld bc,(_Ptr_Glob) + ld l,c + ld h,b + inc hl + inc hl + ld (hl),#0x00 + inc hl + ld (hl),#0x00 +vs: + ld iy,(_Ptr_Glob) + ld (iy+2),0 + ld (iy+3),0 + + +strcpy is inlined as: +u12: + ld a,(hl) + ldi + or a + jp nz,u12 + +cp: + ld a,#<_Arr_2_Glob + add a,#0x2E + ld -80(ix),a + ld a,#>_Arr_2_Glob + adc a,#0x03 + ld -79(ix),a +; genAssign (pointer) +; AOP_STK for _main_sloc1_1_0 + ld l,-80(ix) + ld h,-79(ix) + ld (hl),#0x0A + inc hl + ld (hl),#0x00 +vs: + ld hl,0Ah + ld (_Arr_2_Glob+032Eh),hl + +cp: + ld a,-72(ix) + or a,a + jp nz,00126$ + ld a,-71(ix) + and a,#0x03 +; Rule 4: Changed jp order + jp z,00127$ +00126$: + jp 00102$ +00127$: + +vs: + ld (ix+-7),c + ld (ix+-6),b + ld a,c + ld l,a + ld a,b + and 03h + ld h,a + ld a,l + or h + jp nz,l12 + +cp: + ld a,-82(ix) + or a,-81(ix) + sub a,#0x01 + ld a,#0x00 + rla + ld iy,#_Bool_Glob + ld 0(iy),a + ld 1(iy),#0x00 + +vs: + ld a,l + or h + ld hl,01h + jp z,u42 + dec hl +u42: + ld (_Bool_Glob),hl + +;C:\TEMP\DHRY.C: 173: Int_3_Loc = 5 * Int_1_Loc - Int_2_Loc; +is turned into: + ld l,(ix+-13) + ld h,(ix+-12) + ld d,h + ld e,l + add hl,hl + add hl,hl + add hl,de + +Comapring two types of cmpeq: + ld a,c ; 4 + cp a,#0xFB ; 7 + jp nz,00119$ ; 10 + ld a,b ; 4 + cp a,#0xFF ; 7 +; Rule 5: Changed jump logic + jp z,00101$ ; 10 +00119$: + ; 21 to 42 + +vs: + ld hl,#val ; 10 + or a ; 4 + sbc hl,bc ; 15 + jp z,... ; 10 + ; Always 39 - worse + +Comaring break even point for shift: + ld a,#0x03+1 ; 7 + jp 00114$ ; 10 +00113$: + sra b ; 8 + rr c ; 8 +00114$: + dec a ; 4 + jp nz,00113$ ; 10 + + ; Bytes: 2+3+1+1+1+3 = 11 + ; t-states = 17+n*30 +vs + sra b + rr c ... + ; Bytes: 2*n + ; t-states = 16*n + + Ah, pick 4 \ No newline at end of file diff --git a/doc/sdccman.lyx b/doc/sdccman.lyx new file mode 100644 index 0000000..850c310 --- /dev/null +++ b/doc/sdccman.lyx @@ -0,0 +1,42853 @@ +#LyX 1.5.7 created this file. For more info see http://www.lyx.org/ +\lyxformat 276 +\begin_document +\begin_header +\textclass book +\begin_preamble +\pdfoptionpdfminorversion=3 +\usepackage[ + pdftitle={SDCC Compiler User Guide}, + pdfauthor={SDCC development team}, + pdfsubject={installation, user manual}, + pdfkeywords={68hc08 8032 8051 ansi c compiler assembler CPU DS390 embedded development free Floating Point Arithmetic Freescale GPL HC08 inline Intel ISO/IEC 9899:1990 Linux MAC OS X manual Maxim mcs51 Microchip microcontroller open source PIC Unix Windows Z80 Zilog}, + pdfpagemode=UseOutlines, + colorlinks=true, + linkcolor=blue] {hyperref} +% +\sloppy +\tolerance=500 +\emergencystretch=30pt +% +\date{} +\end_preamble +\language english +\inputencoding default +\font_roman times +\font_sans helvet +\font_typewriter courier +\font_default_family default +\font_sc false +\font_osf false +\font_sf_scale 100 +\font_tt_scale 100 +\graphics default +\paperfontsize default +\spacing single +\papersize letterpaper +\use_geometry true +\use_amsmath 1 +\use_esint 0 +\cite_engine basic +\use_bibtopic false +\paperorientation portrait +\leftmargin 30mm +\topmargin 20mm +\rightmargin 25mm +\bottommargin 20mm +\secnumdepth 3 +\tocdepth 3 +\paragraph_separation indent +\defskip medskip +\quotes_language swedish +\papercolumns 1 +\papersides 1 +\paperpagestyle fancy +\tracking_changes false +\output_changes false +\author "" +\author "" +\end_header + +\begin_body + +\begin_layout Standard +\begin_inset Note Note +status collapsed + +\begin_layout Standard +Please note: double dashed longoptions (e.g. + --version) are written this way: - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +- +\end_layout + +\begin_layout Standard +Two resp. + three consecutive dashes would otherwise result in a long resp. + extra long dash. +\end_layout + +\begin_layout Standard +Architecture specific stuff (like memory models, code examples) should maybe + later go +\end_layout + +\begin_layout Standard +into separate sections/chapters/appendices (it is hard to document PIC or + Z80 in +\end_layout + +\begin_layout Standard +a 8051 centered document) - for now simply add. +\end_layout + +\end_inset + + +\end_layout + +\begin_layout Title +SDCC Compiler User Guide +\end_layout + +\begin_layout Date + +\size normal +SDCC 2.9.0 +\size footnotesize + +\newline +$Date:: 2009-03-13 #$ +\newline +$Revision: 5413 $ +\end_layout + +\begin_layout Standard +\begin_inset Note Note +status collapsed + +\begin_layout Standard +The above strings enclosed in $ are automatically updated by Subversion +\end_layout + +\end_inset + + +\end_layout + +\begin_layout Standard +\begin_inset LatexCommand tableofcontents + +\end_inset + + +\end_layout + +\begin_layout Chapter +Introduction +\end_layout + +\begin_layout Section +About SDCC +\end_layout + +\begin_layout Standard + +\series bold +SDCC +\series default + ( +\emph on +S +\emph default +mall +\emph on +D +\emph default +evice +\emph on +C +\emph default + +\emph on +C +\emph default +ompiler) is free open source, retargettable, optimizing ANSI-C compiler + by +\series bold +Sandeep Dutta +\series default + designed for 8 bit Microprocessors. + The current version targets Intel MCS51 based Microprocessors (8031, 8032, + 8051, 8052 +\begin_inset LatexCommand index +name "8031, 8032, 8051, 8052, mcs51 CPU" + +\end_inset + +, etc.), Dallas DS80C390 variants, Freescale (formerly Motorola) HC08 and + Zilog Z80 based MCUs. + It can be retargeted for other microprocessors, support for Microchip PIC, + Atmel AVR is under development. + The entire source code for the compiler is distributed under GPL. + SDCC uses ASXXXX +\begin_inset LatexCommand index +name "asXXXX (as-gbz80, as-hc08, asx8051, as-z80)" + +\end_inset + + & ASLINK +\begin_inset LatexCommand index +name "aslink" + +\end_inset + +, an free open source retargetable assembler & linker. + SDCC has extensive language extensions suitable for utilizing various microcont +rollers and underlying hardware effectively. + +\newline + +\newline +In addition to the MCU specific optimizations SDCC also does a host of + standard optimizations like: +\end_layout + +\begin_layout Itemize +global sub expression elimination, +\end_layout + +\begin_layout Itemize +loop optimizations (loop invariant, strength reduction of induction variables + and loop reversing), +\end_layout + +\begin_layout Itemize +constant folding & propagation, +\end_layout + +\begin_layout Itemize +copy propagation, +\end_layout + +\begin_layout Itemize +dead code elimination +\end_layout + +\begin_layout Itemize +jump tables for +\emph on +switch +\emph default + statements. +\end_layout + +\begin_layout Standard +For the back-end SDCC uses a global register allocation scheme which should + be well suited for other 8 bit MCUs. + +\newline + +\newline +The peep hole optimizer uses a rule based substitution mechanism which + is MCU independent. + +\newline + +\newline +Supported data-types are: +\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + + + + +\begin_inset Text + +\begin_layout Standard +type +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +width +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +default +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +signed range +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +unsigned range +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +bool +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1 bit +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +unsigned +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0, 1 +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +char +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +8 bits, 1 byte +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +signed +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +-128, +127 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0, +255 +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +short +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +16 bits, 2 bytes +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +signed +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +-32.768, +32.767 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0, +65.535 +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +int +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +16 bits, 2 bytes +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +signed +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +-32.768, +32.767 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0, +65.535 +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +long +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +32 bits, 4 bytes +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +signed +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +-2.147.483.648, +2.147.483.647 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0, +4.294.967.295 +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +float +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +4 bytes IEEE 754 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +signed +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1.175494351E-38, +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +3.402823466E+38 +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +pointer +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1, 2, 3 or 4 bytes +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +generic +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + + + +\end_inset + + +\newline +The compiler also allows +\emph on +inline assembler code +\emph default + to be embedded anywhere in a function. + In addition, routines developed in assembly can also be called. +\newline + +\newline +SDCC also + provides an option (- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-cyclomatic) to report the relative complexity of a function. + These functions can then be further optimized, or hand coded in assembly + if needed. + +\newline + +\newline +SDCC also comes with a companion source level debugger SDCDB. + The debugger currently uses ucSim, a free open source simulator for 8051 + and other micro-controllers. +\newline + +\newline +The latest SDCC version can be downloaded from + +\begin_inset LatexCommand url +target "http://sdcc.sourceforge.net/snap.php" + +\end_inset + +. + +\emph on +Please note: the compiler will probably always be some steps ahead of this + documentation +\series bold +\emph default + +\begin_inset LatexCommand index +name "Status of documentation" + +\end_inset + + +\begin_inset Foot +status open + +\begin_layout Standard +Obviously this has pros and cons +\end_layout + +\end_inset + +. +\end_layout + +\begin_layout Section +Open Source +\end_layout + +\begin_layout Standard +All packages used in this compiler system are +\emph on +free open source +\emph default +; source code for all the sub-packages (pre-processor, assemblers, linkers + etc.) is distributed with the package. + This documentation is maintained using a free open source word processor + (LyX). +\newline +This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License +\begin_inset LatexCommand index +name "GNU General Public License, GPL" + +\end_inset + + as published by the Free Software Foundation; either version 2, or (at + your option) any later version. + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty +\begin_inset LatexCommand index +name "warranty" + +\end_inset + + of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU General Public License for more details. + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, 59 Temple + Place - Suite 330, Boston, MA 02111-1307, USA. + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve what + you give them. + Help stamp out software-hoarding! +\end_layout + +\begin_layout Section +Typographic conventions +\begin_inset LatexCommand index +name "Typographic conventions" + +\end_inset + + +\end_layout + +\begin_layout Standard +Throughout this manual, we will use the following convention. + Commands you have to type in are printed in +\family sans +\series bold +"sans serif" +\series default +. + +\family default + Code samples are printed in +\family typewriter +typewriter font. + +\family default + Interesting items and new terms are printed in +\emph on +italic. +\end_layout + +\begin_layout Section +Compatibility +\begin_inset LatexCommand label +name "sec:Compatibility-with-previous" + +\end_inset + + with previous versions +\begin_inset LatexCommand index +name "Compatibility with previous versions" + +\end_inset + + +\end_layout + +\begin_layout Standard +Newer versions have usually numerous bug fixes compared with the previous + version. + But we also sometimes introduce some incompatibilities with older versions. + Not just for the fun of it, but to make the compiler more stable, efficient + and ANSI compliant +\begin_inset LatexCommand index +name "ANSI-compliance" + +\end_inset + + (see section +\begin_inset LatexCommand ref +reference "sub:ANSI-Compliance" + +\end_inset + + for ANSI-Compliance). + +\begin_inset Note Note +status collapsed + +\begin_layout Standard +It would be fine to add to each item, in which version was it changed. +\end_layout + +\end_inset + + +\newline + +\end_layout + +\begin_layout Itemize +short is now equivalent to int (16 bits), it used to be equivalent to char + (8 bits) which is not ANSI compliant. + To maintain compatibility, old programs may be compiled using the - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-short-is-8bits commandline option (see +\begin_inset LatexCommand vref +reference "lyx:--short-is-8bits" + +\end_inset + +). +\end_layout + +\begin_layout Itemize +the default directory for gcc-builds where include, library and documentation + files are stored is now in /usr/local/share. +\end_layout + +\begin_layout Itemize +char type parameters to vararg +\begin_inset LatexCommand index +name "vararg, va\\_arg" + +\end_inset + + functions are casted to int unless explicitly casted and +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-c89 +\begin_inset LatexCommand index +name "-\\/-std-c89" + +\end_inset + + +\series default + and +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-c99 +\begin_inset LatexCommand index +name "-\\/-std-c99" + +\end_inset + + +\series default + command line option are not defined +\begin_inset Marginal +status collapsed + +\begin_layout Standard + +\series bold +\InsetSpace ~ +! +\end_layout + +\end_inset + +, e.g.: +\newline + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +char a=3; +\newline +\InsetSpace ~ +\InsetSpace ~ +printf ("%d %c +\backslash +n", a, (char)a); +\family default + +\newline + will push a as an int and as a char resp if +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-c89 +\begin_inset LatexCommand index +name "-\\/-std-c89" + +\end_inset + + +\series default + and +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-c99 +\begin_inset LatexCommand index +name "-\\/-std-c99" + +\end_inset + + +\series default + command line options are not defined, +\newline + will push a as two ints if +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-c89 +\begin_inset LatexCommand index +name "-\\/-std-c89" + +\end_inset + + +\series default + or +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-c99 +\begin_inset LatexCommand index +name "-\\/-std-c99" + +\end_inset + + +\series default + command line option is defined. +\end_layout + +\begin_layout Itemize +option - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-regextend has been removed. +\end_layout + +\begin_layout Itemize +option - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-noregparms has been removed. +\end_layout + +\begin_layout Itemize +option - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-after-data has been removed. +\end_layout + +\begin_layout Itemize +bit +\begin_inset LatexCommand index +name "bit" + +\end_inset + + and sbit +\begin_inset LatexCommand index +name "sbit" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_sbit" + +\end_inset + + types now consistently behave like the C99 _Bool type with respect to type + conversion +\begin_inset LatexCommand index +name "type conversion" + +\end_inset + + +\begin_inset LatexCommand index +name "type promotion" + +\end_inset + +. + The most common incompatibility resulting from this change is related to + bit toggling +\begin_inset LatexCommand index +name "Bit toggling" + +\end_inset + + idioms, e.g.: +\newline + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +bit b; +\newline +\InsetSpace ~ +\InsetSpace ~ +b = ~ +\begin_inset LatexCommand index +name "\\~\\/ Operator" + +\end_inset + +b; /* equivalent to b=1 instead of toggling b */ +\begin_inset Marginal +status collapsed + +\begin_layout Standard + +\series bold +\InsetSpace ~ +! +\end_layout + +\end_inset + + +\newline +\InsetSpace ~ +\InsetSpace ~ +b = !b; /* toggles b */ +\newline + +\family default +In previous versions, both forms would have toggled the bit. +\end_layout + +\begin_layout Itemize +in older versions, the preprocessor was always called with +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-c99 +\begin_inset LatexCommand index +name "-\\/-std-c99" + +\end_inset + + +\series default + regardless of the +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-xxx +\series default + setting. + This is no longer true, and can cause compilation failures on code built + with +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-c89 +\begin_inset LatexCommand index +name "-\\/-std-c89" + +\end_inset + + +\series default + but using c99 preprocessor features, such as one-line (//) comments +\end_layout + +\begin_layout Itemize +in versions older then 2.8.4 the pic16 *printf() and printf_tiny() library + functions supported undocumented and not standard compliant 'b' binary + format specifier ("%b", "%hb" and "%lb"). + The 'b' specifier is now disabled by default. + It can be enabled by defining BINARY_SPECIFIER macro in files device/lib/pic16/ +libc/stdio/vfprintf.c and device/lib/pic16/libc/stdio/printf_tiny.c and recompilin +g the library. +\end_layout + +\begin_layout Itemize +in versions older then 2.8.5 the unnamed bitfield structure members participated + in initialization, which is not conforming with ISO/IEC 9899:1999 standard + (see section Section 6.7.8 Initialization, clause 9) +\newline + +\newline +Old behavior, before + version 2.8.5: +\family typewriter + +\newline +\InsetSpace ~ +\InsetSpace ~ +struct { +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +int a : 2; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +char\InsetSpace ~ + : 2; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +int b : 2; +\newline +\InsetSpace ~ +\InsetSpace ~ +} s = {1, 2, 3}; +\family default + +\newline + +\family typewriter +/* s.a = 1, s.b = 3 */ +\family default + +\newline + +\newline +New behavior: +\family typewriter + +\newline +\InsetSpace ~ +\InsetSpace ~ +struct { +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +int a : 2; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +char\InsetSpace ~ + : 2; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +int b : 2; +\newline +\InsetSpace ~ +\InsetSpace ~ +} s = {1, 2}; +\family default + +\newline + +\family typewriter +/* s.a = 1, s.b = 2 */ +\end_layout + +\begin_layout Section +System Requirements +\end_layout + +\begin_layout Standard +What do you need before you start installation of SDCC? A computer, and + a desire to compute. + The preferred method of installation is to compile SDCC from source using + GNU gcc and make. + For Windows some pre-compiled binary distributions are available for your + convenience. + You should have some experience with command line tools and compiler use. +\end_layout + +\begin_layout Section +Other Resources +\end_layout + +\begin_layout Standard +The SDCC home page at +\begin_inset LatexCommand url +target "http://sdcc.sourceforge.net/" + +\end_inset + + is a great place to find distribution sets. + You can also find links to the user mailing lists that offer help or discuss + SDCC with other SDCC users. + Web links to other SDCC related sites can also be found here. + This document can be found in the DOC directory of the source package as + a text or HTML file. + A pdf version of this document is available at +\begin_inset LatexCommand url +target "http://sdcc.sourceforge.net/doc/sdccman.pdf" + +\end_inset + +. + Some of the other tools (simulator and assembler) included with SDCC contain + their own documentation and can be found in the source distribution. + If you want the latest unreleased software, the complete source package + is available directly from Subversion on https://sdcc.svn.sourceforge.net/svnroot/ +sdcc/trunk/sdcc. +\end_layout + +\begin_layout Section +Wishes for the future +\end_layout + +\begin_layout Standard +There are (and always will be) some things that could be done. + Here are some I can think of: +\newline + +\end_layout + +\begin_layout Standard + +\family typewriter +char KernelFunction3(char p) at 0x340; +\newline + +\end_layout + +\begin_layout Standard + +\family typewriter +better code banking +\begin_inset LatexCommand index +name "code banking (limited support)" + +\end_inset + + support for mcs51 +\newline + +\newline + +\family default +If you can think of some more, please see the section +\begin_inset LatexCommand ref +reference "sub:Requesting-Features" + +\end_inset + + about filing feature requests +\begin_inset LatexCommand index +name "Requesting features" + +\end_inset + + +\begin_inset LatexCommand index +name "Feature request" + +\end_inset + +. +\newline + +\end_layout + +\begin_layout Chapter +Installing SDCC +\begin_inset LatexCommand index +name "Installation" + +\end_inset + + +\end_layout + +\begin_layout Standard +For most users it is sufficient to skip to either section +\begin_inset LatexCommand ref +reference "sub:Building-SDCC-on-Linux" + +\end_inset + + (Unix) or section +\begin_inset LatexCommand ref +reference "sub:Windows-Install" + +\end_inset + + (Windows). + More detailed instructions follow below. +\end_layout + +\begin_layout Section +Configure Options +\begin_inset LatexCommand index +name "Options SDCC configuration" + +\end_inset + + +\end_layout + +\begin_layout Standard +The install paths, search paths and other options are defined when running + 'configure'. + The defaults can be overridden by: +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-prefix see table below +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-exec_prefix see table below +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-bindir see table below +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-datadir see table below +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-datarootdir see table below +\newline + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +\InsetSpace ~ +\InsetSpace ~ +docdir environment variable, see table below +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +\InsetSpace ~ +\InsetSpace ~ +include_dir_suffix environment variable, see table below +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +\InsetSpace ~ +\InsetSpace ~ +lib_dir_suffix environment variable, see table below +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +\InsetSpace ~ +\InsetSpace ~ +sdccconf_h_dir_separator environment variable, either / or +\backslash + +\backslash + makes sense here. + This character will only be used in sdccconf.h; don't forget it's a C-header, + therefore a double-backslash is needed there. +\newline + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-mcs51-port Excludes the Intel mcs51 port +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-gbz80-port Excludes the Gameboy gbz80 port +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-z80-port Excludes the z80 port +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-avr-port Excludes the AVR port +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-ds390-port Excludes the DS390 port +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-hc08-port Excludes the HC08 port +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-pic-port Excludes the PIC14 port +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-pic16-port Excludes the PIC16 port +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-xa51-port Excludes the XA51 port +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-ucsim Disables configuring and building of ucsim +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-device-lib Disables automatically building device libraries +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-packihx Disables building packihx +\newline + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-enable-doc Build pdf, html and txt files from the lyx sources +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-enable-libgc Use the Bohem memory allocator. + Lower runtime footprint. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-without-ccache Do not use ccache even if available +\end_layout + +\begin_layout Standard +Furthermore the environment variables CC, CFLAGS, ... + the tools and their arguments can be influenced. + Please see `configure - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-help' and the man/info pages of `configure' for details. +\newline + +\newline +The names of the + standard libraries STD_LIB, STD_INT_LIB, STD_LONG_LIB, STD_FP_LIB, STD_DS390_LI +B, STD_XA51_LIB and the environment variables SDCC_DIR_NAME, SDCC_INCLUDE_NAME, + SDCC_LIB_NAME are defined by `configure' too. + At the moment it's not possible to change the default settings (it was + simply never required). +\newline + +\newline +These configure options are compiled into the binaries, + and can only be changed by rerunning 'configure' and recompiling SDCC. + The configure options are written in +\emph on +italics +\emph default + to distinguish them from run time environment variables (see section search + paths). +\newline + +\newline +The settings for +\begin_inset Quotes sld +\end_inset + +Win32 builds +\begin_inset Quotes srd +\end_inset + + are used by the SDCC team to build the official Win32 binaries. + The SDCC team uses Mingw32 to build the official Windows binaries, because + it's +\end_layout + +\begin_layout Enumerate +open source, +\end_layout + +\begin_layout Enumerate +a gcc compiler and last but not least +\end_layout + +\begin_layout Enumerate +the binaries can be built by cross compiling on SDCC Distributed Compile + Farm. +\end_layout + +\begin_layout Standard +See the examples, how to pass the Win32 settings to 'configure'. + The other Win32 builds using Borland, VC or whatever don't use 'configure', + but a header file sdcc_vc_in.h is the same as sdccconf.h built by 'configure' + for Win32. +\newline + +\newline +These defaults are: +\newline + +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + + +\begin_inset Text + +\begin_layout Standard +Variable +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +default +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Win32 builds +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\emph on +PREFIX +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +/usr/local +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\backslash +sdcc +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\emph on +EXEC_PREFIX +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +$PREFIX +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +$PREFIX +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\emph on +BINDIR +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +$EXEC_PREFIX +\emph default +/bin +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +$EXEC_PREFIX +\emph default + +\backslash +bin +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\emph on +DATADIR +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +$DATAROOTDIR +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +$DATAROOTDIR +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\emph on +DATAROOTDIR +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +$PREFIX +\emph default +/share +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +$PREFIX +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\emph on +DOCDIR +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +$DATAROOTDIR +\emph default +/sdcc/doc +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +$DATAROOTDIR +\emph default + +\backslash +doc +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\emph on +INCLUDE_DIR_SUFFIX +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +sdcc/include +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +include +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\emph on +LIB_DIR_SUFFIX +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +sdcc/lib +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +lib +\end_layout + +\end_inset + + + + +\end_inset + + +\newline + +\end_layout + +\begin_layout Standard +\noindent +'configure' also computes relative paths. + This is needed for full relocatability of a binary package and to complete + search paths (see section search paths below): +\newline + +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + + +\begin_inset Text + +\begin_layout Standard +Variable (computed) +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +default +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Win32 builds +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\emph on +BIN2DATA_DIR +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +../share +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +.. +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\emph on +PREFIX2BIN_DIR +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +bin +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +bin +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\emph on +PREFIX2DATA_DIR +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +share/sdcc +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + + + +\end_inset + + +\newline + +\end_layout + +\begin_layout Standard +\noindent +Examples: +\end_layout + +\begin_layout LyX-Code +./configure +\newline +./configure - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-prefix= +\begin_inset Quotes srd +\end_inset + +/usr/bin +\begin_inset Quotes srd +\end_inset + + - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-datarootdir= +\begin_inset Quotes srd +\end_inset + +/usr/share +\begin_inset Quotes srd +\end_inset + + +\newline +./configure - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-avr-port - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-xa51-port +\end_layout + +\begin_layout Standard +To cross compile on linux for Mingw32 (see also 'sdcc/support/scripts/sdcc_mingw +32'): +\end_layout + +\begin_layout LyX-Code +./configure +\backslash + +\newline +CC= +\begin_inset Quotes srd +\end_inset + +i586-mingw32msvc-gcc +\begin_inset Quotes srd +\end_inset + + CXX= +\begin_inset Quotes srd +\end_inset + +i586-mingw32msvc-g++ +\begin_inset Quotes srd +\end_inset + + +\backslash + +\newline +RANLIB= +\begin_inset Quotes srd +\end_inset + +i586-mingw32msvc-ranlib +\begin_inset Quotes srd +\end_inset + + +\backslash + +\newline +STRIP= +\begin_inset Quotes srd +\end_inset + +i586-mingw32msvc-strip +\begin_inset Quotes srd +\end_inset + + +\backslash + +\newline +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-prefix= +\begin_inset Quotes srd +\end_inset + +/sdcc +\begin_inset Quotes srd +\end_inset + + +\backslash + +\newline +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-datarootdir= +\begin_inset Quotes srd +\end_inset + +/sdcc +\begin_inset Quotes srd +\end_inset + + +\backslash + +\newline +docdir= +\begin_inset Quotes srd +\end_inset + + +\backslash +${datarootdir}/doc +\begin_inset Quotes srd +\end_inset + + +\backslash + +\newline +include_dir_suffix= +\begin_inset Quotes srd +\end_inset + +include +\begin_inset Quotes srd +\end_inset + + +\backslash + +\newline +lib_dir_suffix= +\begin_inset Quotes srd +\end_inset + +lib +\begin_inset Quotes srd +\end_inset + + +\backslash + +\newline +sdccconf_h_dir_separator= +\begin_inset Quotes srd +\end_inset + + +\backslash + +\backslash + +\backslash + +\backslash + +\begin_inset Quotes srd +\end_inset + + +\backslash + +\newline +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-device-lib +\backslash + +\newline +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-host=i586-mingw32msvc +\backslash + +\newline +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-build=unknown-unknown-linux-gnu +\end_layout + +\begin_layout Standard +To +\begin_inset Quotes sld +\end_inset + +cross +\begin_inset Quotes srd +\end_inset + +compile on Cygwin for Mingw32 (see also sdcc/support/scripts/sdcc_cygwin_mingw32 +): +\end_layout + +\begin_layout LyX-Code +./configure -C +\backslash + +\newline +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-prefix= +\begin_inset Quotes srd +\end_inset + +/sdcc +\begin_inset Quotes srd +\end_inset + + +\backslash + +\newline +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-datarootdir= +\begin_inset Quotes srd +\end_inset + +/sdcc +\begin_inset Quotes srd +\end_inset + + +\backslash + +\newline +docdir= +\begin_inset Quotes srd +\end_inset + + +\backslash +${datarootdir}/doc +\begin_inset Quotes srd +\end_inset + + +\backslash + +\newline +include_dir_suffix= +\begin_inset Quotes srd +\end_inset + +include +\begin_inset Quotes srd +\end_inset + + +\backslash + +\newline +lib_dir_suffix= +\begin_inset Quotes srd +\end_inset + +lib +\begin_inset Quotes srd +\end_inset + + +\backslash + +\newline +sdccconf_h_dir_separator= +\begin_inset Quotes srd +\end_inset + + +\backslash + +\backslash + +\backslash + +\backslash + +\begin_inset Quotes srd +\end_inset + + +\backslash + +\newline +CC= +\begin_inset Quotes srd +\end_inset + +gcc -mno-cygwin +\begin_inset Quotes srd +\end_inset + + +\backslash + +\newline +CXX= +\begin_inset Quotes srd +\end_inset + +g++ -mno-cygwin +\begin_inset Quotes srd +\end_inset + + +\end_layout + +\begin_layout Standard +'configure' is quite slow on Cygwin (at least on windows before Win2000/XP). + The option '- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-C' turns on caching, which gives a little bit extra speed. + However if options are changed, it can be necessary to delete the config.cache + file. +\end_layout + +\begin_layout Section +Install paths +\begin_inset LatexCommand label +name "sub:Install-paths" + +\end_inset + + +\begin_inset LatexCommand index +name "Install paths" + +\end_inset + + +\end_layout + +\begin_layout Standard +\begin_inset VSpace medskip +\end_inset + + +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Description +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Path +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Default +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Win32 builds +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +Binary files* +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +$EXEC_PREFIX +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +/usr/local/bin +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\backslash +sdcc +\backslash +bin +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +Include files +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +$DATADIR/ $INCLUDE_DIR_SUFFIX +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +/usr/local/share/sdcc/include +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\backslash +sdcc +\backslash +include +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +Library file** +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +$DATADIR/$LIB_DIR_SUFFIX +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +/usr/local/share/sdcc/lib +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\backslash +sdcc +\backslash +lib +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +Documentation +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +$DOCDIR +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +/usr/local/share/sdcc/doc +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\backslash +sdcc +\backslash +doc +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Verse + +\size footnotesize +*compiler, preprocessor, assembler, and linker +\newline +**the +\shape italic +model +\shape default + is auto-appended by the compiler, e.g. + small, large, z80, ds390 etc +\end_layout + +\begin_layout Standard +\noindent +The install paths can still be changed during `make install' with e.g.: +\end_layout + +\begin_layout LyX-Code +make install prefix=$(HOME)/local/sdcc +\end_layout + +\begin_layout Standard +Of course this doesn't change the search paths compiled into the binaries. +\newline + +\newline +Moreove +r the install path can be changed by defining DESTDIR +\begin_inset LatexCommand index +name "DESTDIR" + +\end_inset + +: +\end_layout + +\begin_layout LyX-Code +make install DESTDIR=$(HOME)/sdcc.rpm/ +\end_layout + +\begin_layout Standard +Please note that DESTDIR must have a trailing slash! +\end_layout + +\begin_layout Section +Search Paths +\begin_inset LatexCommand label +name "sub:Search-Paths" + +\end_inset + + +\begin_inset LatexCommand index +name "Search path" + +\end_inset + + +\end_layout + +\begin_layout Standard +Some search paths or parts of them are determined by configure variables + (in +\emph on +italics +\emph default +, see section above). + Further search paths are determined by environment variables during runtime. + +\newline +The paths searched when running the compiler are as follows (the first + catch wins): +\newline + +\newline +1. + Binary files (preprocessor, assembler and linker) +\newline + +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + + +\begin_inset Text + +\begin_layout Standard +Search path +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +default +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Win32 builds +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +$SDCC_HOME/ +\emph on +$PPREFIX2BIN_DIR +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +$SDCC_HOME/bin +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +$SDCC_HOME +\backslash +bin +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +Path of argv[0] (if available) +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Path of argv[0] +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Path of argv[0] +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +$PATH +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +$PATH +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +$PATH +\end_layout + +\end_inset + + + + +\end_inset + + +\newline + +\end_layout + +\begin_layout Standard +\noindent +2. + Include files +\newline + +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + + +\begin_inset Text + +\begin_layout Standard +Search path +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +default +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Win32 builds +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-I dir +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-I dir +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-I dir +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +$SDCC_INCLUDE +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +$SDCC_INCLUDE +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +$SDCC_INCLUDE +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +$SDCC_HOME/ +\newline + +\emph on +$PREFIX2DATA_DIR/ +\newline +$INCLUDE_DIR_SUFFIX +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +$SDCC_ HOME/ +\newline +share/sdcc/ +\newline +include +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +$SDCC_HOME +\backslash +include +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +path(argv[0])/ +\newline + +\emph on +$BIN2DATADIR/ +\emph default + +\newline + +\emph on +$INCLUDE_DIR_SUFFIX +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +path(argv[0])/ +\newline +../sdcc/include +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +path(argv[0]) +\backslash +.. +\backslash +include +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\emph on +$DATADIR/ +\emph default + +\newline + +\emph on +$INCLUDE_DIR_SUFFIX +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +/usr/local/share/sdcc/ +\newline +include +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +(not on Win32) +\end_layout + +\end_inset + + + + +\end_inset + + +\newline + +\end_layout + +\begin_layout Standard +\noindent +The option - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-nostdinc disables the last two search paths. +\newline + +\newline +3. + Library files +\newline + +\end_layout + +\begin_layout Standard +With the exception of +\begin_inset Quotes sld +\end_inset + +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-L dir +\begin_inset Quotes srd +\end_inset + + the +\shape italic +model +\shape default + is auto-appended by the compiler (e.g. + small, large, z80, ds390 etc.). + +\newline + +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + + +\begin_inset Text + +\begin_layout Standard +Search path +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +default +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Win32 builds +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-L dir +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-L dir +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-L dir +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +$SDCC_LIB/ +\newline + +\emph on + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +$SDCC_LIB/ +\newline + +\emph on + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +$SDCC_LIB +\backslash + +\newline + +\emph on + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +$SDCC_HOME/ +\newline + +\emph on +$PREFIX2DATA_DIR/ +\newline +$LIB_DIR_SUFFIX/ +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +$SDCC_HOME/ +\newline +share/sdcc/ +\newline +lib/ +\emph on + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +$SDCC_HOME +\backslash +lib +\backslash + +\emph on + +\newline + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +path(argv[0])/ +\newline + +\emph on +$BIN2DATADIR/ +\emph default + +\newline + +\emph on +$LIB_DIR_SUFFIX/ +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +path(argv[0])/ +\newline +../sdcc/lib/ +\emph on + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +path(argv[0]) +\backslash + +\newline +.. +\backslash +lib +\backslash + +\emph on + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\emph on +$DATADIR/ +\newline +$LIB_DIR_SUFFIX/ +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +/usr/local/share/sdcc/ +\newline +lib/ +\emph on + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +(not on Win32) +\end_layout + +\end_inset + + + + +\end_inset + + +\newline + +\end_layout + +\begin_layout Standard +\begin_inset Note Note +status collapsed + +\begin_layout Standard +Don't delete any of the stray spaces in the table above without checking + the HTML output (last line)! +\end_layout + +\end_inset + + +\end_layout + +\begin_layout Standard +\InsetSpace ~ + +\newline +The option - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-nostdlib disables the last two search paths. +\end_layout + +\begin_layout Section +Building SDCC +\begin_inset LatexCommand index +name "Building SDCC" + +\end_inset + + +\end_layout + +\begin_layout Subsection +Building SDCC on Linux +\begin_inset LatexCommand label +name "sub:Building-SDCC-on-Linux" + +\end_inset + + +\end_layout + +\begin_layout Enumerate + +\series medium +Download the source package +\series default + either from the SDCC Subversion repository or from snapshot builds +\series medium +, it will be named something like sdcc +\series default +-src +\series medium +-yyyymmdd-rrrr.t +\series default +ar. +\series medium +bz2 +\series default + +\begin_inset LatexCommand url +target "http://sdcc.sourceforge.net/snap.php" + +\end_inset + +. +\end_layout + +\begin_layout Enumerate + +\series medium +Bring up a command line terminal, such as xterm. +\end_layout + +\begin_layout Enumerate + +\series medium +Unpack the file using a command like: +\series default + +\family sans +\series bold +"tar -xvjf sdcc-src-yyyymmdd-rrrr.tar.bz2 +\begin_inset Quotes srd +\end_inset + + +\family default +\series medium +, this will create a sub-directory called sdcc with all of the sources. +\end_layout + +\begin_layout Enumerate +Change directory into the main SDCC directory, for example type: +\family sans +\series bold +"cd sdcc +\series default +". +\end_layout + +\begin_layout Enumerate + +\series medium +Type +\series default + +\family sans +\series bold +"./configure +\family default +\series default +". + This configures the package for compilation on your system. +\end_layout + +\begin_layout Enumerate + +\series medium +Type +\series default + +\family sans +\series bold +"make +\family default +\series default +" +\series medium +. + +\series default + All of the source packages will compile, this can take a while. +\end_layout + +\begin_layout Enumerate + +\series medium +Type +\series default + +\family sans +\series bold +"make install" +\family default +\series default + as root +\series medium +. + +\series default + This copies the binary executables, the include files, the libraries and + the documentation to the install directories. + Proceed with section +\begin_inset LatexCommand ref +reference "sec:Testing-the-SDCC" + +\end_inset + +. +\end_layout + +\begin_layout Subsection +Building SDCC on Mac OS X +\end_layout + +\begin_layout Standard +Follow the instruction for Linux. +\newline + +\newline +On Mac OS X 10.2.x it was reported, that the + default gcc (version 3.1 20020420 (prerelease)) fails to compile SDCC. + Fortunately there's also gcc 2.9.x installed, which works fine. + This compiler can be selected by running 'configure' with: +\end_layout + +\begin_layout LyX-Code +./configure CC=gcc2 CXX=g++2 +\end_layout + +\begin_layout Standard +Universal (ppc and i386) binaries can be produced on Mac OS X 10.4.x with + Xcode. + Run 'configure' with: +\end_layout + +\begin_layout LyX-Code +./configure +\backslash + +\end_layout + +\begin_layout LyX-Code +LDFLAGS="-Wl,-syslibroot,/Developer/SDKs/MacOSX10.4u.sdk -arch i386 -arch + ppc" +\backslash + +\end_layout + +\begin_layout LyX-Code +CXXFLAGS = "-O2 -isysroot /Developer/SDKs/MacOSX10.4u.sdk -arch i386 -arch + ppc" +\backslash + +\end_layout + +\begin_layout LyX-Code +CFLAGS = "-O2 -isysroot /Developer/SDKs/MacOSX10.4u.sdk -arch i386 -arch ppc" +\end_layout + +\begin_layout Subsection +Cross compiling SDCC on Linux for Windows +\end_layout + +\begin_layout Standard +With the Mingw32 gcc cross compiler it's easy to compile SDCC for Win32. + See section 'Configure Options'. +\end_layout + +\begin_layout Subsection +Building SDCC using Cygwin and Mingw32 +\end_layout + +\begin_layout Standard +For building and installing a Cygwin executable follow the instructions + for Linux. +\newline + +\newline +On Cygwin a +\begin_inset Quotes sld +\end_inset + +native +\begin_inset Quotes srd +\end_inset + + Win32-binary can be built, which will not need the Cygwin-DLL. + For the necessary 'configure' options see section 'configure options' or + the script 'sdcc/support/scripts/sdcc_cygwin_mingw32'. +\newline + +\newline +In order to install + Cygwin on Windows download setup.exe from +\begin_inset LatexCommand url +name "www.cygwin.com" +target "http://www.cygwin.com/" + +\end_inset + +. + Run it, set the +\begin_inset Quotes sld +\end_inset + +default text file type +\begin_inset Quotes srd +\end_inset + + to +\begin_inset Quotes sld +\end_inset + +unix +\begin_inset Quotes srd +\end_inset + + and download/install at least the following packages. + Some packages are selected by default, others will be automatically selected + because of dependencies with the manually selected packages. + Never deselect these packages! +\end_layout + +\begin_layout Itemize +flex +\end_layout + +\begin_layout Itemize +bison +\end_layout + +\begin_layout Itemize +gcc ; version 3.x is fine, no need to use the old 2.9x +\end_layout + +\begin_layout Itemize +binutils ; selected with gcc +\end_layout + +\begin_layout Itemize +make +\end_layout + +\begin_layout Itemize +rxvt ; a nice console, which makes life much easier under windoze (see below) +\end_layout + +\begin_layout Itemize +man ; not really needed for building SDCC, but you'll miss it sooner or + later +\end_layout + +\begin_layout Itemize +less ; not really needed for building SDCC, but you'll miss it sooner or + later +\end_layout + +\begin_layout Itemize +svn ; only if you use Subversion access +\end_layout + +\begin_layout Standard +If you want to develop something you'll need: +\end_layout + +\begin_layout Itemize +python ; for the regression tests +\end_layout + +\begin_layout Itemize +gdb ; the gnu debugger, together with the nice GUI +\begin_inset Quotes sld +\end_inset + +insight +\begin_inset Quotes srd +\end_inset + + +\end_layout + +\begin_layout Itemize +openssh ; to access the CF or commit changes +\end_layout + +\begin_layout Itemize +autoconf and autoconf-devel ; if you want to fight with 'configure', don't + use autoconf-stable! +\end_layout + +\begin_layout Standard +rxvt is a nice console with history. + Replace in your cygwin.bat the line +\end_layout + +\begin_layout LyX-Code +bash - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-login -i +\end_layout + +\begin_layout Standard +with (one line): +\end_layout + +\begin_layout LyX-Code +rxvt -sl 1000 -fn "Lucida Console-12" -sr -cr red +\end_layout + +\begin_layout LyX-Code + -bg black -fg white -geometry 100x65 -e bash - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-login +\end_layout + +\begin_layout Standard +Text selected with the mouse is automatically copied to the clipboard, pasting + works with shift-insert. +\newline + +\newline +The other good tip is to make sure you have no //c/-styl +e paths anywhere, use /cygdrive/c/ instead. + Using // invokes a network lookup which is very slow. + If you think +\begin_inset Quotes sld +\end_inset + +cygdrive +\begin_inset Quotes srd +\end_inset + + is too long, you can change it with e.g. +\end_layout + +\begin_layout LyX-Code +mount -s -u -c /mnt +\end_layout + +\begin_layout Standard +SDCC sources use the unix line ending LF. + Life is much easier, if you store the source tree on a drive which is mounted + in binary mode. + And use an editor which can handle LF-only line endings. + Make sure not to commit files with windows line endings. + The tabulator spacing +\begin_inset LatexCommand index +name "tabulator spacing (8 columns)" + +\end_inset + + used in the project is 8. + Although a tabulator spacing of 8 is a sensible choice for programmers + (it's a power of 2 and allows to display 8/16 bit signed variables without + loosing columns) the plan is to move towards using only spaces in the source. +\end_layout + +\begin_layout Subsection +Building SDCC Using Microsoft Visual C++ 6.0/NET (MSVC) +\end_layout + +\begin_layout Standard + +\series medium +Download the source package +\series default + either from the SDCC Subversion repository or from the +\begin_inset LatexCommand url +name "snapshot builds" +target "http://sdcc.sourceforge.net/snap.php" + +\end_inset + + +\series medium +, it will be named something like sdcc +\series default +-src +\series medium +-yyyymmdd-rrrr.tar.bz2. + +\series default + SDCC is distributed with all the projects, workspaces, and files you need + to build it using Visual C++ 6.0/NET (except for SDCDB and ucSim). + The workspace name is 'sdcc.dsw'. + Please note that as it is now, all the executables are created in a folder + called sdcc +\backslash +bin_vc. + Once built you need to copy the executables from sdcc +\backslash +bin_vc to sdcc +\backslash +bin before running SDCC. + +\newline + +\newline +WARNING: Visual studio is very picky with line terminations; it expects + the 0x0d, 0x0a DOS style line endings, not the 0x0a Unix style line endings. + When using the Subversion repository it's easiest to configure the svn + client to convert automatically for you. + If however you are getting a message such as "This makefile was not generated + by Developer Studio etc. + etc. +\begin_inset Quotes srd +\end_inset + + when opening the sdcc.dsw workspace or any of the *.dsp projects, then you + need to convert the Unix style line endings to DOS style line endings. + To do so you can use the +\begin_inset Quotes sld +\end_inset + +unix2dos +\begin_inset Quotes srd +\end_inset + + utility freely available on the internet. + Doug Hawkins reported in the sdcc-user list that this works: +\newline + +\newline +C: +\backslash +Programming +\backslash +SDCC> unix2dos sdcc.dsw +\newline +C: +\backslash +Programming +\backslash +SDCC> for /R %I in (*.dsp) do @unix2dos "%I" +\newline + +\newline +In order to build SDCC with MSVC + you need win32 executables of bison.exe, flex.exe, and gawk.exe. + One good place to get them is +\begin_inset LatexCommand url +name "here" +target "http://unxutils.sourceforge.net" + +\end_inset + + +\newline + +\newline +Download the file UnxUtils +\begin_inset LatexCommand index +name "UnxUtils" + +\end_inset + +.zip. + Now you have to install the utilities and setup MSVC so it can locate the + required programs. + Here there are two alternatives (choose one!): +\end_layout + +\begin_layout Enumerate +The easy way: +\newline + +\newline +a) Extract UnxUtils.zip to your C: +\backslash + hard disk PRESERVING the original paths, otherwise bison won't work. + (If you are using WinZip make certain that 'Use folder names' is selected) +\newline + +\newline +b) + In the Visual C++ IDE click Tools, Options, select the Directory tab, in + 'Show directories for:' select 'Executable files', and in the directories + window add a new path: 'C: +\backslash +user +\backslash +local +\backslash +wbin', click ok. +\newline + +\newline +(As a side effect, you get a bunch of Unix utilities that + could be useful, such as diff and patch.) +\end_layout + +\begin_layout Enumerate +A more compact way: +\newline + +\newline +This one avoids extracting a bunch of files you may not + use, but requires some extra work: +\newline + +\newline +a) Create a directory were to put the + tools needed, or use a directory already present. + Say for example 'C: +\backslash +util'. +\newline + +\newline +b) Extract 'bison.exe', 'bison.hairy', 'bison.simple', 'flex.exe', and + gawk.exe to such directory WITHOUT preserving the original paths. + (If you are using WinZip make certain that 'Use folder names' is not selected) +\newline + +\newline +c +) Rename bison.exe to '_bison.exe'. +\newline + +\newline +d) Create a batch file 'bison.bat' in 'C: +\backslash +util +\backslash +' and add these lines: +\newline +\InsetSpace ~ +\InsetSpace ~ +set BISON_SIMPLE=C: +\backslash +util +\backslash +bison.simple +\newline +\InsetSpace ~ +\InsetSpace ~ +set BISON_HAIRY=C: +\backslash +util +\backslash +bison.hairy +\newline +\InsetSpace ~ +\InsetSpace ~ +_bison %1 %2 %3 %4 %5 %6 %7 %8 %9 +\newline + +\newline +Steps 'c' and 'd' are needed + because bison requires by default that the files 'bison.simple' and 'bison.hairy' + reside in some weird Unix directory, '/usr/local/share/' I think. + So it is necessary to tell bison where those files are located if they + are not in such directory. + That is the function of the environment variables BISON_SIMPLE and BISON_HAIRY. +\newline + +\newline +e +) In the Visual C++ IDE click Tools, Options, select the Directory tab, + in 'Show directories for:' select 'Executable files', and in the directories + window add a new path: 'c: +\backslash +util', click ok. + Note that you can use any other path instead of 'c: +\backslash +util', even the path where the Visual C++ tools are, probably: 'C: +\backslash +Program Files +\backslash +Microsoft Visual Studio +\backslash +Common +\backslash +Tools'. + So you don't have to execute step 'e' :) +\end_layout + +\begin_layout Standard +That is it. + Open 'sdcc.dsw' in Visual Studio, click 'build all', when it finishes copy + the executables from sdcc +\backslash +bin_vc to sdcc +\backslash +bin, and you can compile using SDCC. +\end_layout + +\begin_layout Subsection +Building SDCC Using Borland +\end_layout + +\begin_layout Enumerate +From the sdcc directory, run the command "make -f Makefile.bcc". + This should regenerate all the .exe files in the bin directory except for + SDCDB and ucSim. +\end_layout + +\begin_layout Enumerate +If you modify any source files and need to rebuild, be aware that the dependenci +es may not be correctly calculated. + The safest option is to delete all .obj files and run the build again. + From a Cygwin BASH prompt, this can easily be done with the command (be + sure you are in the sdcc directory): +\newline + +\newline + +\family sans +\series bold +find . + +\backslash +( -name '*.obj' -o -name '*.lib' -o -name '*.rul' +\backslash +) -print -exec rm {} +\backslash +; +\family default +\series default + +\newline + +\newline +or on Windows NT/2000/XP from the command prompt with the command: +\newline + +\family sans +\series bold + +\newline +del /s *.obj *.lib *.rul +\family default +\series default + from the sdcc directory. +\end_layout + +\begin_layout Subsection +Windows Install Using a ZIP Package +\end_layout + +\begin_layout Enumerate +Download the binary zip package from +\begin_inset LatexCommand url +target "http://sdcc.sf.net/snap.php" + +\end_inset + + and unpack it using your favorite unpacking tool (gunzip, WinZip, etc). + This should unpack to a group of sub-directories. + An example directory structure after unpacking the mingw32 package is: + c: +\backslash +sdcc +\backslash +bin for the executables, c: +\backslash +sdcc +\backslash +include and c: +\backslash +sdcc +\backslash +lib for the include and libraries. +\end_layout + +\begin_layout Enumerate +Adjust your environment variable PATH to include the location of the bin + directory or start sdcc using the full path. +\end_layout + +\begin_layout Subsection +Windows Install Using the Setup Program +\begin_inset LatexCommand label +name "sub:Windows-Install" + +\end_inset + + +\end_layout + +\begin_layout Standard +Download the setup program +\emph on +sdcc-x.y.z-setup.exe +\emph default + for an official release from +\newline + +\begin_inset LatexCommand url +target "http://sf.net/project/showfiles.php?group_id=599" + +\end_inset + + or a setup program for one of the snapshots +\emph on +sdcc-yyyymmdd-xxxx-setup.exe +\emph default + from +\begin_inset LatexCommand url +target "http://sdcc.sf.net/snap.php" + +\end_inset + + and execute it. + A windows typical installer will guide you through the installation process. +\end_layout + +\begin_layout Subsection +VPATH +\begin_inset LatexCommand index +name "VPATH" + +\end_inset + + feature +\end_layout + +\begin_layout Standard +SDCC supports the VPATH feature provided by configure and make. + It allows to separate the source and build trees. + Here's an example: +\end_layout + +\begin_layout Standard + +\family typewriter +cd ~\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +# cd $HOME +\end_layout + +\begin_layout Standard + +\family typewriter +tar -xjf sdcc-src-yyyymmdd-rrrr.tar.bz2\InsetSpace ~ +# extract source to directory sdcc +\end_layout + +\begin_layout Standard + +\family typewriter +mkdir sdcc.build\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +# put output in sdcc.build +\end_layout + +\begin_layout Standard + +\family typewriter +cd sdcc.build +\end_layout + +\begin_layout Standard + +\family typewriter +../sdcc/configure\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +# configure is doing all the magic! +\end_layout + +\begin_layout Standard + +\family typewriter +make +\end_layout + +\begin_layout Standard +\noindent +That's it! +\series bold +configure +\series default + will create the directory tree will all the necessary Makefiles in ~/sdcc.build. + It automagically computes the variables srcdir, top_srcdir and top_buildir + for each directory. + After running +\series bold +make +\series default + the generated files will be in ~/sdcc.build, while the source files stay + in ~/sdcc. +\newline +This is not only usefull for building different binaries, e.g. + when cross compiling. + It also gives you a much better overview in the source tree when all the + generated files are not scattered between the source files. + And the best thing is: if you want to change a file you can leave the original + file untouched in the source directory. + Simply copy it to the build directory, edit it, enter `make clean', `rm + Makefile.dep' and `make'. + +\series bold +make +\series default + will do the rest for you! +\end_layout + +\begin_layout Section +Building the Documentation +\end_layout + +\begin_layout Standard +Add - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-enable-doc to the configure arguments to build the documentation together + with all the other stuff. + You will need several tools (LyX, LaTeX, LaTeX2HTML, pdflatex, dvipdf, + dvips and makeindex) to get the job done. + Another possibility is to change to the doc directory and to type +\family sans +\series bold + +\begin_inset Quotes srd +\end_inset + +make +\begin_inset Quotes srd +\end_inset + + +\family default +\series default + there. + You're invited to make changes and additions to this manual (sdcc/doc/sdccman.ly +x). + Using LyX +\begin_inset LatexCommand url +target "http://www.lyx.org" + +\end_inset + + as editor is straightforward. + Prebuilt documentation in html and pdf format is available from +\begin_inset LatexCommand url +target "http://sdcc.sf.net/snap.php" + +\end_inset + +. +\end_layout + +\begin_layout Section +Reading the Documentation +\begin_inset LatexCommand index +name "Documentation" + +\end_inset + + +\end_layout + +\begin_layout Standard +Currently reading the document in pdf format is recommended, as for unknown + reason the hyperlinks are working there whereas in the html version they + are not +\begin_inset Foot +status open + +\begin_layout Standard +If you should know why please drop us a note +\end_layout + +\end_inset + +. + +\newline +You'll find the pdf version +\begin_inset LatexCommand index +name "PDF version of this document" + +\end_inset + + at +\begin_inset LatexCommand url +target "http://sdcc.sf.net/doc/sdccman.pdf" + +\end_inset + +. + +\newline +A html version +\begin_inset LatexCommand index +name "HTML version of this document" + +\end_inset + + should be online at +\begin_inset LatexCommand url +target "http://sdcc.sf.net/doc/sdccman.html/index.html" + +\end_inset + +. +\newline +This documentation is in some aspects different from a commercial documentation: + +\end_layout + +\begin_layout Itemize +It tries to document SDCC for several processor architectures in one document + (commercially these probably would be separate documents/products). + This document +\begin_inset LatexCommand index +name "Status of documentation" + +\end_inset + + currently matches SDCC for mcs51 and DS390 best and does give too few informati +on about f.e. + Z80, PIC14, PIC16 and HC08. +\end_layout + +\begin_layout Itemize +There are many references pointing away from this documentation. + Don't let this distract you. + If there f.e. + was a reference like +\begin_inset LatexCommand url +target "http://www.opencores.org" + +\end_inset + + together with a statement +\begin_inset Quotes sld +\end_inset + +some processors which are targetted by SDCC can be implemented in a +\emph on +f +\emph default +ield +\emph on +p +\emph default +rogrammable +\emph on +g +\emph default +ate +\emph on +a +\emph default +rray +\begin_inset LatexCommand index +name "FPGA (field programmable gate array)" + +\end_inset + + +\begin_inset Quotes srd +\end_inset + + or +\begin_inset LatexCommand url +target "http://sf.net/projects/fpgac" + +\end_inset + + +\begin_inset LatexCommand index +name "FpgaC ((subset of) C to FPGA compiler)" + +\end_inset + + +\begin_inset Quotes sld +\end_inset + +have you ever heard of an open source compiler that compiles a subset of + C for an FPGA? +\begin_inset Quotes srd +\end_inset + + we expect you to have a quick look there and come back. + If you read this you are on the right track. +\end_layout + +\begin_layout Itemize +Some sections attribute more space to problems, restrictions and warnings + than to the solution. +\end_layout + +\begin_layout Itemize +The installation section and the section about the debugger is intimidating. +\end_layout + +\begin_layout Itemize +There are still lots of typos and there are more different writing styles + than pictures. +\end_layout + +\begin_layout Section +Testing the SDCC Compiler +\begin_inset LatexCommand label +name "sec:Testing-the-SDCC" + +\end_inset + + +\end_layout + +\begin_layout Standard +The first thing you should do after installing your SDCC compiler is to + see if it runs. + Type +\family sans +\series bold +"sdcc - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-version" +\begin_inset LatexCommand index +name "version" + +\end_inset + + +\family default +\series default + at the prompt, and the program should run and output its version like: + +\newline + +\family typewriter +SDCC : mcs51/z80/avr/ds390/pic16/pic14/ds400/hc08 2.5.6 #4169 (May 8 2006) + (UNIX) +\end_layout + +\begin_layout Standard +If it doesn't run, or gives a message about not finding sdcc program, then + you need to check over your installation. + Make sure that the sdcc bin directory is in your executable search path + defined by the PATH environment setting ( +\series medium +see +\series default + section +\begin_inset LatexCommand ref +reference "sub:Install-Trouble-shooting" + +\end_inset + +\InsetSpace ~ + +\series medium +Install trouble-shooting for suggestions +\series default +). + Make sure that the sdcc program is in the bin folder, if not perhaps something + did not install correctly. +\newline + +\newline + +\series medium +SDCC +\series default + is commonly installed as described in section +\begin_inset Quotes sld +\end_inset + +Install and search paths +\begin_inset Quotes srd +\end_inset + +. +\newline + +\newline + +\series medium +Make sure the compiler works on a very simple example. + Type in the following test.c program using your favorite +\series default + ASCII +\series medium +editor: +\end_layout + +\begin_layout Verse + +\family typewriter +char test; +\newline + +\newline +void main(void) { +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +test=0; +\newline +} +\end_layout + +\begin_layout Standard + +\series medium +Compile this using the following command: +\series default + +\family sans +\series bold +"sdcc -c test.c". + +\family default +\series default + +\series medium +If all goes well, the compiler will generate a test.asm and test.rel file. + Congratulations, you've just compiled your first program with SDCC. + We used the -c option to tell SDCC not to link the generated code, just + to keep things simple for this step. +\series default + +\newline + +\newline + +\series medium +The next step is to try it with the linker. + Type in +\series default + +\family sans +\series bold +"sdcc test.c +\family default +\series default +" +\series medium +. + If all goes well the compiler will link with the libraries and produce + a test.ihx output file. + If this step fails +\series default + +\series medium +(no test.ihx, and the linker generates warnings), then the problem is most + likely that +\series default + SDCC +\series medium +cannot find the +\series default + / +\series medium +usr/local/share/sdcc/lib directory +\series default + +\series medium +(see +\series default + section +\begin_inset LatexCommand ref +reference "sub:Install-Trouble-shooting" + +\end_inset + +\InsetSpace ~ + +\series medium +Install trouble-shooting for suggestions). +\series default + +\newline + +\newline + +\series medium +The final test is to ensure +\series default + SDCC +\series medium +can use the +\series default + standard +\series medium +header files and libraries. + Edit test.c and change it to the following: +\end_layout + +\begin_layout Verse + +\family typewriter +#include +\newline + +\newline +char str1[10]; +\newline + +\newline +void main(void) { +\newline +\InsetSpace ~ +\InsetSpace ~ +strcpy(str1, "testing"); +\newline +} +\end_layout + +\begin_layout Standard + +\series medium +Compile this by typing +\series default + +\family sans +\series bold +"sdcc test.c" +\family default +\series medium +. + This should generate a test.ihx output file, and it should give no warnings + such as not finding the string.h file. + If it cannot find the string.h file, then the problem is that +\series default + SDCC +\series medium +cannot find the /usr/local/share/sdcc/include directory +\series default + +\series medium +(see the +\series default + section +\begin_inset LatexCommand ref +reference "sub:Install-Trouble-shooting" + +\end_inset + +\InsetSpace ~ + +\series medium +Install trouble-shooting section for suggestions). + +\series default + Use option +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-print-search-dirs +\series default + +\begin_inset LatexCommand index +name "-\\/-print-search-dirs" + +\end_inset + + to find exactly where SDCC is looking for the include and lib files. +\end_layout + +\begin_layout Section +Install Trouble-shooting +\begin_inset LatexCommand label +name "sub:Install-Trouble-shooting" + +\end_inset + + +\begin_inset LatexCommand index +name "Install trouble-shooting" + +\end_inset + + +\end_layout + +\begin_layout Subsection +If SDCC does not build correctly +\end_layout + +\begin_layout Standard +A thing to try is starting from scratch by unpacking the .tgz source package + again in an empty directory. + Configure it like: +\newline + +\newline + +\family sans +\series bold +./configure 2>&1 | tee configure.log +\family default +\series default + +\newline + +\newline +and build it like: +\newline + +\newline + +\family sans +\series bold +make 2>&1 | tee make.log +\family default +\series default + +\newline + +\newline +If anything goes wrong, you can review the log files to locate the problem. + Or a relevant part of this can be attached to an email that could be helpful + when requesting help from the mailing list. +\end_layout + +\begin_layout Subsection +What the +\begin_inset Quotes sld +\end_inset + +./configure +\begin_inset Quotes srd +\end_inset + + does +\end_layout + +\begin_layout Standard +The +\begin_inset Quotes sld +\end_inset + +./configure +\begin_inset Quotes srd +\end_inset + + command is a script that analyzes your system and performs some configuration + to ensure the source package compiles on your system. + It will take a few minutes to run, and will compile a few tests to determine + what compiler features are installed. +\end_layout + +\begin_layout Subsection +What the +\begin_inset Quotes sld +\end_inset + +make +\begin_inset Quotes srd +\end_inset + + does +\end_layout + +\begin_layout Standard +This runs the GNU make tool, which automatically compiles all the source + packages into the final installed binary executables. +\end_layout + +\begin_layout Subsection +What the +\begin_inset Quotes sld +\end_inset + +make install +\begin_inset Quotes erd +\end_inset + + command does. +\end_layout + +\begin_layout Standard +This will install the compiler, other executables libraries and include + files into the appropriate directories. + See sections +\begin_inset LatexCommand ref +reference "sub:Install-paths" + +\end_inset + +,\InsetSpace ~ + +\begin_inset LatexCommand ref +reference "sub:Search-Paths" + +\end_inset + +\InsetSpace ~ +about install and search paths. +\newline +On most systems you will need super-user privilege +s to do this. +\end_layout + +\begin_layout Section +Components of SDCC +\end_layout + +\begin_layout Standard +SDCC is not just a compiler, but a collection of tools by various developers. + These include linkers, assemblers, simulators and other components. + Here is a summary of some of the components. + Note that the included simulator and assembler have separate documentation + which you can find in the source package in their respective directories. + As SDCC grows to include support for other processors, other packages from + various developers are included and may have their own sets of documentation. +\newline + +\newline +You + might want to look at the files which are installed in . + At the time of this writing, we find the following programs for gcc-builds: +\newline + + +\newline +In /bin: +\end_layout + +\begin_layout Itemize +sdcc - The compiler. +\end_layout + +\begin_layout Itemize +sdcpp - The C preprocessor. +\end_layout + +\begin_layout Itemize +asx8051 - The assembler for 8051 type processors. +\end_layout + +\begin_layout Itemize +as-z80 +\series bold +, +\series default + as-gbz80 - The Z80 and GameBoy Z80 assemblers. +\end_layout + +\begin_layout Itemize +aslink -The linker for 8051 type processors. +\end_layout + +\begin_layout Itemize +link-z80 +\series bold +, +\series default + link-gbz80 - The Z80 and GameBoy Z80 linkers. +\end_layout + +\begin_layout Itemize +s51 - The ucSim 8051 simulator. +\end_layout + +\begin_layout Itemize +sdcdb - The source debugger. +\end_layout + +\begin_layout Itemize +packihx - A tool to pack (compress) Intel hex files. +\end_layout + +\begin_layout Standard +In /share/sdcc/include +\end_layout + +\begin_layout Itemize +the include files +\end_layout + +\begin_layout Standard +In /share/sdcc/lib +\end_layout + +\begin_layout Itemize +the subdirs src and small, large, z80, gbz80 and ds390 with the precompiled + relocatables. +\end_layout + +\begin_layout Standard +In /share/sdcc/doc +\end_layout + +\begin_layout Itemize +the documentation +\end_layout + +\begin_layout Standard +As development for other processors proceeds, this list will expand to include + executables to support processors like AVR, PIC, etc. +\end_layout + +\begin_layout Subsection +sdcc - The Compiler +\end_layout + +\begin_layout Standard +This is the actual compiler, it in turn uses the c-preprocessor and invokes + the assembler and linkage editor. +\end_layout + +\begin_layout Subsection +sdcpp - The C-Preprocessor +\end_layout + +\begin_layout Standard +The preprocessor +\begin_inset LatexCommand index +name "sdcpp (preprocessor)" + +\end_inset + + is a modified version of the GNU cpp +\begin_inset LatexCommand index +name "cpp|see{sdcpp}" + +\end_inset + + preprocessor +\begin_inset LatexCommand url +target "http://gcc.gnu.org/" + +\end_inset + +. + The C preprocessor is used to pull in #include sources, process #ifdef + statements, #defines and so on. +\end_layout + +\begin_layout Subsection +as +\emph on +xxxx +\emph default +, aslink, link- +\emph on +xxx +\emph default + - The Assemblers and Linkage Editors +\end_layout + +\begin_layout Standard +This is retargettable assembler & linkage editor, it was developed by Alan + Baldwin. + John Hartman created the version for 8051, and I (Sandeep) have made some + enhancements and bug fixes for it to work properly with SDCC. +\end_layout + +\begin_layout Subsection +s51 - The Simulator +\end_layout + +\begin_layout Standard +S51 +\begin_inset LatexCommand index +name "s51" + +\end_inset + + is a free open source simulator developed by Daniel Drotos. + The simulator is built as part of the build process. + For more information visit Daniel's web site at: +\begin_inset LatexCommand url +target "http://mazsola.iit.uni-miskolc.hu/~drdani/embedded/s51" + +\end_inset + +. + It currently supports the core mcs51, the Dallas DS80C390 and the Phillips + XA51 family. +\end_layout + +\begin_layout Subsection +sdcdb - Source Level Debugger +\end_layout + +\begin_layout Standard +SDCDB +\begin_inset LatexCommand index +name "SDCDB (debugger)" + +\end_inset + + is the companion source level debugger. + More about SDCDB in section +\begin_inset LatexCommand ref +reference "cha:Debugging-with-SDCDB" + +\end_inset + +. + The current version of the debugger uses Daniel's Simulator S51 +\begin_inset LatexCommand index +name "s51" + +\end_inset + +, but can be easily changed to use other simulators. +\end_layout + +\begin_layout Chapter +Using SDCC +\end_layout + +\begin_layout Section +Compiling +\end_layout + +\begin_layout Subsection +Single Source File Projects +\end_layout + +\begin_layout Standard +For single source file 8051 projects the process is very simple. + Compile your programs with the following command +\family sans +\series bold +"sdcc sourcefile.c". + +\family default +\series default + This will compile, assemble and link your source file. + Output files are as follows: +\end_layout + +\begin_layout Itemize +sourcefile.asm +\begin_inset LatexCommand index +name ".asm" + +\end_inset + + - Assembler source +\begin_inset LatexCommand index +name "Assembler source" + +\end_inset + + file created by the compiler +\end_layout + +\begin_layout Itemize +sourcefile.lst +\begin_inset LatexCommand index +name ".lst" + +\end_inset + + - Assembler listing +\begin_inset LatexCommand index +name "Assembler listing" + +\end_inset + + file created by the Assembler +\end_layout + +\begin_layout Itemize +sourcefile.rst +\begin_inset LatexCommand index +name ".rst" + +\end_inset + + - Assembler listing +\begin_inset LatexCommand index +name "Assembler listing" + +\end_inset + + file updated with linkedit information, created by linkage editor +\end_layout + +\begin_layout Itemize +sourcefile.sym +\begin_inset LatexCommand index +name ".sym" + +\end_inset + + - symbol listing +\begin_inset LatexCommand index +name "Symbol listing" + +\end_inset + + for the sourcefile, created by the assembler +\end_layout + +\begin_layout Itemize +sourcefile.rel +\begin_inset LatexCommand index +name ".rel" + +\end_inset + + or sourcefile.o +\begin_inset LatexCommand index +name ".o" + +\end_inset + + - Object file +\begin_inset LatexCommand index +name "Object file" + +\end_inset + + created by the assembler, input to Linkage editor +\end_layout + +\begin_layout Itemize +sourcefile.map +\begin_inset LatexCommand index +name ".map" + +\end_inset + + - The memory map +\begin_inset LatexCommand index +name "Memory map" + +\end_inset + + for the load module, created by the Linker +\end_layout + +\begin_layout Itemize +sourcefile.mem +\begin_inset LatexCommand index +name ".mem" + +\end_inset + + - A file with a summary of the memory usage +\end_layout + +\begin_layout Itemize +sourcefile.ihx +\begin_inset LatexCommand index +name ".ihx" + +\end_inset + + - The load module in Intel hex format +\begin_inset LatexCommand index +name "Intel hex format" + +\end_inset + + (you can select the Motorola S19 format +\begin_inset LatexCommand index +name "Motorola S19 format" + +\end_inset + + with - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-out-fmt-s19 +\begin_inset LatexCommand index +name "-\\/-out-fmt-s19" + +\end_inset + +. + If you need another format you might want to use +\family sans +\shape italic +objdump +\family default +\shape default + +\begin_inset LatexCommand index +name "objdump (tool)" + +\end_inset + + or +\family sans +\shape italic +srecord +\family default +\shape default + +\begin_inset LatexCommand index +name "srecord (bin, hex, ... tool)" + +\end_inset + + +\begin_inset Note Note +status collapsed + +\begin_layout Standard +hyperlinks needed +\end_layout + +\end_inset + + - see also section +\begin_inset LatexCommand vref +reference "sub:Postprocessing-the-Intel" + +\end_inset + +). + Both formats are documented in the documentation of srecord +\begin_inset LatexCommand index +name "srecord (bin, hex, ... tool)" + +\end_inset + + +\end_layout + +\begin_layout Itemize +sourcefile.adb +\begin_inset LatexCommand index +name ".adb" + +\end_inset + + - An intermediate file containing debug information needed to create the + .cdb file (with - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-debug +\begin_inset LatexCommand index +name "-\\/-debug" + +\end_inset + +) +\end_layout + +\begin_layout Itemize +sourcefile.cdb +\begin_inset LatexCommand index +name ".cdb" + +\end_inset + + - An optional file (with - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-debug) containing debug information. + The format is documented in cdbfileformat.pdf +\end_layout + +\begin_layout Itemize +sourcefile. + - (no extension) +\begin_inset LatexCommand index +name " (no extension)" + +\end_inset + + An optional AOMF or AOMF51 +\begin_inset LatexCommand index +name "AOMF, AOMF51" + +\end_inset + + +\begin_inset LatexCommand label +name "OMF file" + +\end_inset + +file containing debug information (generated with option - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-debug). + The (Intel) +\emph on +a +\emph default +bsolute +\emph on +o +\emph default +bject +\emph on +m +\emph default +odule +\emph on +f +\emph default +ormat is a subformat of the OMF51 format and is commonly used by third party + tools (debuggers +\begin_inset LatexCommand index +name "Debugger" + +\end_inset + +, simulators, emulators). +\end_layout + +\begin_layout Itemize +sourcefile.dump* +\begin_inset LatexCommand index +name ".dump*" + +\end_inset + + - Dump file to debug the compiler it self (generated with option - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-dumpall) (see section +\begin_inset LatexCommand ref +reference "sub:Intermediate-Dump-Options" + +\end_inset + +\InsetSpace ~ + and section +\begin_inset LatexCommand ref +reference "sub:The-anatomy-of" + +\end_inset + +\InsetSpace ~ + +\begin_inset Quotes sld +\end_inset + +Anatomy of the compiler +\begin_inset Quotes srd +\end_inset + +). +\end_layout + +\begin_layout Subsection +Postprocessing the Intel Hex +\begin_inset LatexCommand index +name "Intel hex format" + +\end_inset + + file +\begin_inset LatexCommand label +name "sub:Postprocessing-the-Intel" + +\end_inset + + +\end_layout + +\begin_layout Standard +In most cases this won't be needed but the Intel Hex file +\begin_inset LatexCommand index +name ".ihx" + +\end_inset + + which is generated by SDCC might include lines of varying length and the + addresses within the file are not guaranteed to be strictly ascending. + If your toolchain or a bootloader does not like this you can use the tool + +\family typewriter +packihx +\family default + +\begin_inset LatexCommand index +name "packihx (tool)" + +\end_inset + + which is part of the SDCC distribution: +\newline + +\newline + +\family sans +\series bold +packihx sourcefile.ihx >sourcefile.hex +\family default +\series default + +\newline + +\newline +The separately available +\emph on +srecord +\emph default + +\begin_inset LatexCommand index +name "srecord (bin, hex, ... tool)" + +\end_inset + + package additionally allows to set undefined locations to a predefined + value, to insert checksums +\begin_inset LatexCommand index +name "checksum" + +\end_inset + + of various flavours (crc, add, xor) and to perform other manipulations + (convert, split, crop, offset, ...). + +\newline + +\newline + +\family sans +\series bold +srec_cat\InsetSpace ~ +\InsetSpace ~ +sourcefile.ihx -intel\InsetSpace ~ +\InsetSpace ~ +-o sourcefile.hex -intel +\newline + +\newline + +\family default +\series default +An example for a more complex command line +\begin_inset Foot +status open + +\begin_layout Standard +the command backfills +\begin_inset LatexCommand index +name "backfill unused memory" + +\end_inset + + unused memory with 0x12 and the overall 16 bit sum of the complete 64 kByte + block is zero. + If the program counter on an mcs51 runs wild the backfill pattern 0x12 + will be interpreted as an +\family typewriter +lcall +\family default + to address +\family typewriter +0x1212 +\family default + (where an emergency routine could sit). +\end_layout + +\end_inset + + could look like: +\newline + +\newline + +\family sans +\series bold +\size footnotesize +srec_cat\InsetSpace ~ +sourcefile.ihx -intel\InsetSpace ~ +\InsetSpace ~ +-fill 0x12 0x0000 0xfffe\InsetSpace ~ +-little-endian-checksum-nega +tive 0xfffe 0x02 0x02\InsetSpace ~ +\InsetSpace ~ +-o sourcefile.hex -intel +\size default + +\newline + +\newline + +\family default +\series default +The srecord package is available at +\begin_inset LatexCommand url +target "http://sf.net/projects/srecord" + +\end_inset + + . +\end_layout + +\begin_layout Subsection +Projects with Multiple Source Files +\end_layout + +\begin_layout Standard +SDCC can compile only ONE file at a time. + Let us for example assume that you have a project containing the following + files: +\newline + +\newline +foo1.c (contains some functions) +\newline +foo2.c (contains some more functions) +\newline +foomai +n.c (contains more functions and the function main) +\newline + +\size footnotesize + +\newline + +\size default +The first two files will need to be compiled separately with the commands: +\size footnotesize + +\size default + +\newline + +\newline + +\family sans +\series bold +sdcc\InsetSpace ~ +-c\InsetSpace ~ +foo1.c +\family default +\series default +\size footnotesize + +\newline + +\family sans +\series bold +\size default +sdcc\InsetSpace ~ +-c\InsetSpace ~ +foo2.c +\family default +\series default + +\newline + +\newline +Then compile the source file containing the +\emph on +main() +\emph default + function and link +\begin_inset LatexCommand index +name "Linker" + +\end_inset + + the files together with the following command: +\newline + +\newline + +\family sans +\series bold +sdcc\InsetSpace ~ +foomain.c\InsetSpace ~ +foo1.rel\InsetSpace ~ +foo2.rel +\family default +\series default + +\begin_inset LatexCommand index +name ".rel" + +\end_inset + + +\newline + +\newline +Alternatively, +\emph on +foomain.c +\emph default + can be separately compiled as well: +\family sans +\series bold + +\newline + +\newline +sdcc\InsetSpace ~ +-c\InsetSpace ~ +foomain.c +\newline +sdcc foomain.rel foo1.rel foo2.rel +\newline + +\newline + +\family default +\series default +The file containing the +\emph on +main() +\emph default + function +\noun on +must +\noun default + be the +\noun on +first +\noun default + file specified in the command line, since the linkage editor processes + file in the order they are presented to it. + The linker is invoked from SDCC using a script file with extension .lnk +\begin_inset LatexCommand index +name ".lnk" + +\end_inset + +. + You can view this file to troubleshoot linking problems such as those arising + from missing libraries. +\end_layout + +\begin_layout Subsection +Projects with Additional Libraries +\begin_inset LatexCommand index +name "Libraries" + +\end_inset + + +\end_layout + +\begin_layout Standard +Some reusable routines may be compiled into a library, see the documentation + for the assembler and linkage editor (which are in /share/sdcc/doc) + for how to create a +\emph on +.lib +\begin_inset LatexCommand index +name ".lib" + +\end_inset + + +\emph default + library file. + Libraries created in this manner can be included in the command line. + Make sure you include the -L option to tell the linker where + to look for these files if they are not in the current directory. + Here is an example, assuming you have the source file +\emph on +foomain.c +\emph default + and a library +\emph on +foolib.lib +\emph default + in the directory +\emph on +mylib +\emph default + (if that is not the same as your current project): +\newline + +\newline + +\family sans +\series bold +sdcc foomain.c foolib.lib -L mylib +\newline + +\newline + +\family default +\series default +Note here that +\emph on +mylib +\emph default + must be an absolute path name. +\newline + +\newline +The most efficient way to use libraries is + to keep separate modules in separate source files. + The lib file now should name all the modules.rel +\begin_inset LatexCommand index +name ".rel" + +\end_inset + + files. + For an example see the standard library file +\emph on +libsdcc.lib +\emph default + in the directory /share/lib/small. +\end_layout + +\begin_layout Subsection +Using sdcclib to Create and Manage Libraries +\begin_inset LatexCommand index +name "sdcclib" + +\end_inset + + +\end_layout + +\begin_layout Standard +Alternatively, instead of having a .rel file for each entry on the library + file as described in the preceding section, sdcclib can be used to embed + all the modules belonging to such library in the library file itself. + This results in a larger library file, but it greatly reduces the number + of disk files accessed by the linker. + Additionally, the packed library file contains an index of all include + modules and symbols that significantly speeds up the linking process. + To display a list of options supported by sdcclib type: +\newline + +\end_layout + +\begin_layout Standard + +\family sans +\series bold +sdcclib -? +\begin_inset LatexCommand index +name "sdcclib" + +\end_inset + + +\newline + +\newline + +\family default +\series default +To create a new library file, start by compiling all the required modules. + For example: +\newline + +\end_layout + +\begin_layout Standard + +\family sans +\series bold +sdcc -c _divsint.c +\end_layout + +\begin_layout Standard + +\family sans +\series bold +sdcc -c _divuint.c +\end_layout + +\begin_layout Standard + +\family sans +\series bold +sdcc -c _modsint.c +\end_layout + +\begin_layout Standard + +\family sans +\series bold +sdcc -c _moduint.c +\end_layout + +\begin_layout Standard + +\family sans +\series bold +sdcc -c _mulint.c +\newline + +\end_layout + +\begin_layout Standard +This will create files _divsint.rel, _divuint.rel, _modsint.rel, _moduint.rel, + and _mulint.rel. + The next step is to add the .rel files to the library file: +\newline + +\end_layout + +\begin_layout Standard + +\family sans +\series bold +sdcclib libint.lib _divsint.rel +\family default + +\begin_inset LatexCommand index +name "sdcclib" + +\end_inset + + +\end_layout + +\begin_layout Standard + +\family sans +\series bold +sdcclib libint.lib _divuint.rel +\end_layout + +\begin_layout Standard + +\family sans +\series bold +sdcclib libint.lib _modsint.rel +\end_layout + +\begin_layout Standard + +\family sans +\series bold +sdcclib libint.lib _moduint.rel +\end_layout + +\begin_layout Standard + +\family sans +\series bold +sdcclib libint.lib _mulint.rel +\family default +\series default + +\newline + +\end_layout + +\begin_layout Standard +Or, if you preffer: +\family sans +\series bold + +\newline + +\end_layout + +\begin_layout Standard + +\family sans +\series bold +sdcclib libint.lib _divsint.rel _divuint.rel _modsint.rel _moduint.rel _mulint.rel +\family default +\series default + +\newline + +\end_layout + +\begin_layout Standard +If the file already exists in the library, it will be replaced. + If a list of .rel files is available, you can tell sdcclib to add those + files to a library. + For example, if the file 'myliblist.txt' contains +\family sans +\series bold + +\newline + +\end_layout + +\begin_layout Standard + +\family sans +\series bold +_divsint.rel +\end_layout + +\begin_layout Standard + +\family sans +\series bold +_divuint.rel +\end_layout + +\begin_layout Standard + +\family sans +\series bold +_modsint.rel +\end_layout + +\begin_layout Standard + +\family sans +\series bold +_moduint.rel +\end_layout + +\begin_layout Standard + +\family sans +\series bold +_mulint.rel +\family default +\series default + +\newline + +\end_layout + +\begin_layout Standard +Use +\family sans +\series bold + +\newline + +\end_layout + +\begin_layout Standard + +\family sans +\series bold +sdcclib -l libint.lib myliblist.txt +\family default +\series default + +\newline + +\end_layout + +\begin_layout Standard +Additionally, you can instruct sdcclib to compiles the files before adding + them to the library. + This is achieved using the environment variables SDCCLIB_CC and/or SDCCLIB_AS. + For example: +\family sans +\series bold + +\newline + +\end_layout + +\begin_layout Standard + +\family sans +\series bold +set SDCCLIB_CC=sdcc -c +\end_layout + +\begin_layout Standard + +\family sans +\series bold +sdcclib -l libint.lib myliblist.txt +\family default +\series default + +\newline + +\end_layout + +\begin_layout Standard +To see what modules and symbols are included in the library, options -s + and -m are available. + For example: +\newline + +\newline + +\family sans +\series bold +sdcclib -s libint.lib +\family default + +\begin_inset LatexCommand index +name "sdcclib" + +\end_inset + + +\newline + +\family typewriter +\series default +_divsint.rel: +\end_layout + +\begin_layout Standard + +\family typewriter +__divsint_a_1_1 +\end_layout + +\begin_layout Standard + +\family typewriter +__divsint_PARM_2 +\end_layout + +\begin_layout Standard + +\family typewriter +__divsint +\newline +_divuint.rel: +\end_layout + +\begin_layout Standard + +\family typewriter +__divuint_a_1_1 +\end_layout + +\begin_layout Standard + +\family typewriter +__divuint_PARM_2 +\end_layout + +\begin_layout Standard + +\family typewriter +__divuint_reste_1_1 +\end_layout + +\begin_layout Standard + +\family typewriter +__divuint_count_1_1 +\end_layout + +\begin_layout Standard + +\family typewriter +__divuint +\newline +_modsint.rel: +\end_layout + +\begin_layout Standard + +\family typewriter +__modsint_a_1_1 +\end_layout + +\begin_layout Standard + +\family typewriter +__modsint_PARM_2 +\end_layout + +\begin_layout Standard + +\family typewriter +__modsint +\newline +_moduint.rel: +\end_layout + +\begin_layout Standard + +\family typewriter +__moduint_a_1_1 +\end_layout + +\begin_layout Standard + +\family typewriter +__moduint_PARM_2 +\end_layout + +\begin_layout Standard + +\family typewriter +__moduint_count_1_1 +\end_layout + +\begin_layout Standard + +\family typewriter +__moduint +\newline +_mulint.rel: +\end_layout + +\begin_layout Standard + +\family typewriter +__mulint_PARM_2 +\end_layout + +\begin_layout Standard + +\family typewriter +__mulint +\family default +\series bold + +\newline + +\end_layout + +\begin_layout Standard +If the source files are compiled using - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-debug +\begin_inset LatexCommand index +name "-\\/-debug" + +\end_inset + +, the corresponding debug information file .adb will be include in the library + file as well. + The library files created with sdcclib are plain text files, so they can + be viewed with a text editor. + It is not recommended to modify a library file created with sdcclib using + a text editor, as there are file indexes numbers located across the file + used by the linker to quickly locate the required module to link. + Once a .rel file (as well as a .adb file) is added to a library using sdcclib, + it can be safely deleted, since all the information required for linking + is embedded in the library file itself. + Library files created using sdcclib are used as described in the preceding + sections. +\end_layout + +\begin_layout Subsection +Using ar to Create and Manage Libraries +\begin_inset LatexCommand index +name "ar" + +\end_inset + + +\end_layout + +\begin_layout Standard +Support for ar format libraries was introduced in sdcc 2.9.0. + Ar is a standard archive managing utility on unices (Linux, Mac OS X, several + unix flavors) so it is not included in the sdcc package. +\series bold + +\newline + +\newline + +\series default +For Windows platform you can find ar utility in GNU binutils package included + in several projects: Cygwin at +\begin_inset LatexCommand url +target "http://www.cygwin.com/" + +\end_inset + +, MinGW at +\begin_inset LatexCommand url +target "http://www.mingw.org/" + +\end_inset + +. +\series bold + +\newline + +\newline + +\series default +Both the GNU and BSD ar format variants are suppurated by asxxxx linkers. + Ar doesn't understand the asxxxx object file format, so there is a special + version of ranlib distributed with sdcc, called asranlib, which produces + the ar symbol lookup table. +\series bold + +\newline + +\newline + +\series default +To create a library containing asxxxx object files, you should use the following + sequence: +\series bold + +\newline + +\end_layout + +\begin_layout Standard + +\family sans +\series bold +ar -Sq .lib +\end_layout + +\begin_layout Standard + +\family sans +\series bold +asranlib .lib +\end_layout + +\begin_layout Standard +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +Command Line Options +\begin_inset LatexCommand index +name "Command Line Options" + +\end_inset + + +\begin_inset LatexCommand label +name "sec:Command-Line-Options" + +\end_inset + + +\end_layout + +\begin_layout Subsection +Processor Selection Options +\begin_inset LatexCommand index +name "Options processor selection" + +\end_inset + + +\begin_inset LatexCommand index +name "Processor selection options" + +\end_inset + + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-mmcs51 +\begin_inset LatexCommand index +name "-mmcs51" + +\end_inset + + +\series default + Generate code for the Intel MCS51 +\begin_inset LatexCommand index +name "MCS51" + +\end_inset + + family of processors. + This is the default processor target. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-mds390 +\begin_inset LatexCommand index +name "-mds390" + +\end_inset + + +\series default + Generate code for the Dallas DS80C390 +\begin_inset LatexCommand index +name "DS80C390" + +\end_inset + + processor. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-mds400 +\begin_inset LatexCommand index +name "-mds400" + +\end_inset + + +\series default + Generate code for the Dallas DS80C400 +\begin_inset LatexCommand index +name "DS80C400" + +\end_inset + + processor. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-mhc08 +\begin_inset LatexCommand index +name "-mhc08" + +\end_inset + + +\series default + Generate code for the Freescale/Motorola HC08 +\begin_inset LatexCommand index +name "HC08" + +\end_inset + + family of processors. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-mz80 +\begin_inset LatexCommand index +name "-mz80" + +\end_inset + + +\series default + Generate code for the Zilog Z80 +\begin_inset LatexCommand index +name "Z80" + +\end_inset + + family of processors. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-mgbz80 +\begin_inset LatexCommand index +name "-mgbz80" + +\end_inset + + +\series default + Generate code for the GameBoy Z80 +\begin_inset LatexCommand index +name "gbz80 (GameBoy Z80)" + +\end_inset + + processor (Not actively maintained). +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-mavr +\begin_inset LatexCommand index +name "-mavr" + +\end_inset + + +\series default + Generate code for the Atmel AVR +\begin_inset LatexCommand index +name "AVR" + +\end_inset + + processor (Not maintained, not complete). + AVR users should probably have a look at winavr +\begin_inset LatexCommand url +target "http://sourceforge.net/projects/winavr" + +\end_inset + + or +\begin_inset LatexCommand url +target "http://www.avrfreaks.net/index.php?name=PNphpBB2&file=index" + +\end_inset + +, which is based on AVR-port of the gcc compiler. +\end_layout + +\begin_layout Standard +\begin_inset Note Note +status collapsed + +\begin_layout Standard +I think it is fair to direct users there for now. + Open source is also about avoiding unnecessary work . + But I didn't find the 'official' link. +\end_layout + +\end_inset + + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-mpic14 +\begin_inset LatexCommand index +name "-mpic14" + +\end_inset + + +\series default + Generate code for the Microchip PIC 14 +\begin_inset LatexCommand index +name "PIC14" + +\end_inset + +-bit processors (p16f84 and variants. + In development, not complete). +\end_layout + +\begin_layout Standard +\begin_inset Note Note +status collapsed + +\begin_layout Standard +p16f627 p16f628 p16f84 p16f873 p16f877? +\end_layout + +\end_inset + + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-mpic16 +\begin_inset LatexCommand index +name "-mpic16" + +\end_inset + + +\series default + Generate code for the Microchip PIC 16 +\begin_inset LatexCommand index +name "PIC16" + +\end_inset + +-bit processors (p18f452 and variants. + In development, not complete). +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-mtlcs900h +\series default + Generate code for the Toshiba TLCS-900H +\begin_inset LatexCommand index +name "TLCS-900H" + +\end_inset + + processor (Not maintained, not complete). +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-mxa51 +\begin_inset LatexCommand index +name "-mxa51" + +\end_inset + + +\series default + Generate code for the Phillips XA51 +\begin_inset LatexCommand index +name "XA51" + +\end_inset + + processor (Not maintained, not complete). +\end_layout + +\begin_layout Standard +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +Preprocessor Options +\begin_inset LatexCommand index +name "Options preprocessor" + +\end_inset + + +\begin_inset LatexCommand index +name "Preprocessor options" + +\end_inset + + +\begin_inset LatexCommand index +name "sdcpp (preprocessor)" + +\end_inset + + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-I +\begin_inset LatexCommand index +name "-I" + +\end_inset + + +\series default + The additional location where the preprocessor will look for <..h> or +\begin_inset Quotes eld +\end_inset + +..h +\begin_inset Quotes erd +\end_inset + + files. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-D +\begin_inset LatexCommand index +name "-D" + +\end_inset + + +\series default + Command line definition of macros. + Passed to the preprocessor. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-M +\begin_inset LatexCommand index +name "-M" + +\end_inset + + +\series default + Tell the preprocessor to output a rule suitable for make describing the + dependencies of each object file. + For each source file, the preprocessor outputs one make-rule whose target + is the object file name for that source file and whose dependencies are + all the files `#include'd in it. + This rule may be a single line or may be continued with ` +\backslash +'-newline if it is long. + The list of rules is printed on standard output instead of the preprocessed + C program. + `-M' implies `-E +\begin_inset LatexCommand index +name "-E" + +\end_inset + +'. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-C +\begin_inset LatexCommand index +name "-C" + +\end_inset + + +\series default + Tell the preprocessor not to discard comments. + Used with the `-E' option. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-MM +\begin_inset LatexCommand index +name "-MM" + +\end_inset + + +\series default +\size large + +\size default +Like `-M' but the output mentions only the user header files included with + `#include +\begin_inset Quotes eld +\end_inset + +file"'. + System header files included with `#include ' are omitted. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-Aquestion(answer) +\begin_inset LatexCommand index +name "-Aquestion(answer)" + +\end_inset + + +\series default + Assert the answer answer for question, in case it is tested with a preprocessor + conditional such as `#if #question(answer)'. + `-A-' disables the standard assertions that normally describe the target + machine. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-Umacro +\begin_inset LatexCommand index +name "-Umacro" + +\end_inset + + +\series default + Undefine macro macro. + `-U' options are evaluated after all `-D' options, but before any `-include' + and `-imacros' options. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-dM +\begin_inset LatexCommand index +name "-dM" + +\end_inset + + +\series default + Tell the preprocessor to output only a list of the macro definitions that + are in effect at the end of preprocessing. + Used with the `-E' option. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-dD +\begin_inset LatexCommand index +name "-dD" + +\end_inset + + +\series default + Tell the preprocessor to pass all macro definitions into the output, in + their proper sequence in the rest of the output. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-dN +\begin_inset LatexCommand index +name "-dN" + +\end_inset + + +\series default +\size large + +\size default +Like `-dD' except that the macro arguments and contents are omitted. + Only `#define name' is included in the output. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-pedantic-parse-number +\begin_inset LatexCommand index +name "pedantic" + +\end_inset + + +\begin_inset LatexCommand index +name "-pedantic-parse-number" + +\end_inset + + +\size large +\bar under + +\begin_inset LatexCommand label +name "lyx:-pedantic-parse-number" + +\end_inset + + +\series default +\bar default + +\size default +Pedantic parse numbers so that situations like 0xfe-LO_B(3) are parsed properly + and the macro LO_B(3) gets expanded. + See also #pragma pedantic_parse_number +\begin_inset LatexCommand vpageref +reference "ite:pedantic_parse_number" + +\end_inset + + in section +\begin_inset LatexCommand ref +reference "sec:Pragmas" + +\end_inset + + +\emph on +Note: this functionality is not in conformance with C99 standard! +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-Wp\InsetSpace ~ +preprocessorOption[,preprocessorOption] +\series default + +\begin_inset LatexCommand index +name "-Wp preprocessorOption[,preprocessorOption]" + +\end_inset + +... + Pass the preprocessorOption to the preprocessor +\family typewriter +sdcpp +\family default + +\begin_inset LatexCommand index +name "sdcpp (preprocessor)" + +\end_inset + +. + SDCC uses an adapted version of the GNU Compiler Collection +\begin_inset LatexCommand index +name "gcc (GNU Compiler Collection)" + +\end_inset + + preprocessor +\emph on +cpp +\emph default + ( +\emph on +gcc +\emph default + +\begin_inset LatexCommand url +target "http://gcc.gnu.org/" + +\end_inset + +). + If you need more dedicated options please refer to the GCC\InsetSpace ~ +CPP\InsetSpace ~ +Manual at + +\begin_inset LatexCommand htmlurl +target "http://www.gnu.org/software/gcc/onlinedocs/" + +\end_inset + +. +\end_layout + +\begin_layout Standard +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +Linker Options +\begin_inset LatexCommand index +name "Options linker" + +\end_inset + + +\begin_inset LatexCommand index +name "Linker options" + +\end_inset + + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-L\InsetSpace ~ +- +\series default + +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\series bold +-lib-path +\begin_inset LatexCommand index +name "-\\/-lib-path " + +\end_inset + + +\begin_inset LatexCommand index +name "-L " + +\end_inset + + +\series default +\InsetSpace ~ + This option is passed to the linkage + editor's additional libraries +\begin_inset LatexCommand index +name "Libraries" + +\end_inset + + search path. + The path name must be absolute. + Additional library files may be specified in the command line. + See section Compiling programs for more details. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-xram-loc +\series default + +\begin_inset LatexCommand index +name "-\\/-xram-loc " + +\end_inset + +\InsetSpace ~ + The start location of the external ram +\begin_inset LatexCommand index +name "xdata (mcs51, ds390 storage class)" + +\end_inset + +, default value is 0. + The value entered can be in Hexadecimal or Decimal format, e.g.: - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-xram-loc 0x8000 or - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-xram-loc 32768. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-code-loc +\series default + +\begin_inset LatexCommand index +name "-\\/-code-loc " + +\end_inset + +\InsetSpace ~ + The start location of the code +\begin_inset LatexCommand index +name "code" + +\end_inset + + segment, default value 0. + Note when this option is used the interrupt vector table +\begin_inset LatexCommand index +name "interrupt vector table" + +\end_inset + + is also relocated to the given address. + The value entered can be in Hexadecimal or Decimal format, e.g.: - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-code-loc 0x8000 or - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-code-loc 32768. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-loc +\series default + +\begin_inset LatexCommand index +name "-\\/-stack-loc " + +\end_inset + +\InsetSpace ~ + By default the stack +\begin_inset LatexCommand index +name "stack" + +\end_inset + + is placed after the data segment. + Using this option the stack can be placed anywhere in the internal memory + space of the 8051. + The value entered can be in Hexadecimal or Decimal format, e.g. + - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-loc 0x20 or - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-loc 32. + Since the sp register is incremented before a push or call, the initial + sp will be set to one byte prior the provided value. + The provided value should not overlap any other memory areas such as used + register banks or the data segment and with enough space for the current + application. + The +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-pack-iram +\series default +\InsetSpace ~ + +\begin_inset LatexCommand index +name "-\\/-pack-iram" + +\end_inset + + option (which is now a default setting) will override this setting, so + you should also specify the +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-no-pack-iram +\series default +\InsetSpace ~ + +\begin_inset LatexCommand index +name "-\\/-no-pack-iram" + +\end_inset + + option if you need to manually place the stack. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-xstack-loc +\series default + +\begin_inset LatexCommand index +name "-\\/-xstack-loc " + +\end_inset + +\InsetSpace ~ + By default the external stack +\begin_inset LatexCommand index +name "xstack" + +\end_inset + + is placed after the pdata +\begin_inset LatexCommand index +name "pdata (mcs51, ds390 storage class)" + +\end_inset + + segment. + Using this option the xstack can be placed anywhere in the external memory + space of the 8051. + The value entered can be in Hexadecimal or Decimal format, e.g. + - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-xstack-loc 0x8000 or - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-loc 32768. + The provided value should not overlap any other memory areas such as the + pdata or xdata segment and with enough space for the current application. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-data-loc +\series default + +\begin_inset LatexCommand index +name "-\\/-data-loc " + +\end_inset + +\InsetSpace ~ + The start location of the internal ram data +\begin_inset LatexCommand index +name "data (mcs51, ds390 storage class)" + +\end_inset + + segment. + The value entered can be in Hexadecimal or Decimal format, eg. + - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-data-loc 0x20 or - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-data-loc 32. + (By default, the start location of the internal ram data segment is set + as low as possible in memory, taking into account the used register banks + and the bit segment at address 0x20. + For example if register banks 0 and 1 are used without bit variables, the + data segment will be set, if - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-data-loc is not used, to location 0x10.) +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-idata-loc +\series default + +\begin_inset LatexCommand index +name "-\\/-idata-loc " + +\end_inset + +\InsetSpace ~ + The start location of the indirectly addressable internal ram +\begin_inset LatexCommand index +name "idata (mcs51, ds390 storage class)" + +\end_inset + + of the 8051, default value is 0x80. + The value entered can be in Hexadecimal or Decimal format, eg. + - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-idata-loc 0x88 or - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-idata-loc 136. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-bit-loc +\series default +\InsetSpace ~ + The start location of the bit +\begin_inset LatexCommand index +name "bit" + +\end_inset + + addressable internal ram of the 8051. + This is +\emph on +not +\emph default + implemented yet. + Instead an option can be passed directly to the linker: -Wl\InsetSpace ~ +-bBSEG=. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-out-fmt-ihx +\begin_inset LatexCommand index +name "-\\/-out-fmt-ihx" + +\end_inset + + +\series default +The linker output (final object code) is in Intel Hex format. +\begin_inset LatexCommand index +name "Intel hex format" + +\end_inset + + This is the default option. + The format itself is documented in the documentation of srecord +\begin_inset LatexCommand index +name "srecord (bin, hex, ... tool)" + +\end_inset + +. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-out-fmt-s19 +\begin_inset LatexCommand index +name "-\\/-out-fmt-s19" + +\end_inset + + +\series default +The linker output (final object code) is in Motorola S19 format +\begin_inset LatexCommand index +name "Motorola S19 format" + +\end_inset + +. + The format itself is documented in the documentation of srecord. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-out-fmt-elf +\begin_inset LatexCommand index +name "-\\/-out-fmt-s19" + +\end_inset + + +\begin_inset LatexCommand index +name "HC08!Options!-\\/-out-fmt-elf" + +\end_inset + + +\series default +The linker output (final object code) is in ELF format +\begin_inset LatexCommand index +name "ELF format" + +\end_inset + +. + (Currently only supported for the HC08 +\begin_inset LatexCommand index +name "HC08" + +\end_inset + + processors) +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-Wl\InsetSpace ~ +linkOption[,linkOption] +\series default + +\begin_inset LatexCommand index +name "-Wl linkOption[,linkOption]" + +\end_inset + + +\begin_inset LatexCommand label +name "lyx:-Wl option" + +\end_inset + +... + Pass the linkOption to the linker. + If a bootloader is used an option like +\begin_inset Quotes sld +\end_inset + +-Wl\InsetSpace ~ +-bCSEG=0x1000 +\begin_inset Quotes srd +\end_inset + + would be typical to set the start of the code segment. + Either use the double quotes around this option or use no space (e.g. + -Wl-bCSEG=0x1000). + See also #pragma constseg and #pragma codeseg in section +\begin_inset LatexCommand ref +reference "sec:Pragmas" + +\end_inset + + . + File sdcc/as/doc/asxhtm.html has more on linker options. +\end_layout + +\begin_layout Standard +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +MCS51 Options +\begin_inset LatexCommand index +name "Options MCS51" + +\end_inset + + +\begin_inset LatexCommand index +name "MCS51 options" + +\end_inset + + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-model-small +\begin_inset LatexCommand index +name "-\\/-model-small" + +\end_inset + + +\series default +\size large + +\size default +Generate code for Small Model programs, see section Memory Models for more + details. + This is the default model. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-model-medium +\begin_inset LatexCommand index +name "-\\/-model-medium" + +\end_inset + + +\series default + Generate code for Medium model programs, see section Memory Models for + more details. + If this option is used all source files in the project have to be compiled + with this option. + It must also be used when invoking the linker. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-model-large +\begin_inset LatexCommand index +name "-\\/-model-large" + +\end_inset + + +\series default + Generate code for Large model programs, see section Memory Models for more + details. + If this option is used all source files in the project have to be compiled + with this option. + It must also be used when invoking the linker. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-xstack +\begin_inset LatexCommand index +name "-\\/-xstack" + +\end_inset + + +\series default + Uses a pseudo stack in the pdata +\begin_inset LatexCommand index +name "pdata (mcs51, ds390 storage class)" + +\end_inset + + area (usually the first 256 bytes in the external ram) for allocating variables + and passing parameters. + See section +\begin_inset LatexCommand ref +reference "sub:External-Stack" + +\end_inset + +\InsetSpace ~ + External Stack for more details. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-iram-size +\series default +\InsetSpace ~ + +\begin_inset LatexCommand index +name "-\\/-iram-size " + +\end_inset + + Causes the linker to check if the internal ram usage is within limits of + the given value. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-xram-size +\series default +\InsetSpace ~ + +\begin_inset LatexCommand index +name "-\\/-xram-size " + +\end_inset + + Causes the linker to check if the external ram usage is within limits of + the given value. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-code-size +\series default +\InsetSpace ~ + +\begin_inset LatexCommand index +name "-\\/-code-size " + +\end_inset + + Causes the linker to check if the code memory usage is within limits of + the given value. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-size +\series default +\InsetSpace ~ + +\begin_inset LatexCommand index +name "-\\/-stack-size " + +\end_inset + + Causes the linker to check if there is at minimum bytes for stack. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-pack-iram +\series default +\InsetSpace ~ + +\begin_inset LatexCommand index +name "-\\/-pack-iram" + +\end_inset + + Causes the linker to use unused register banks for data variables and pack + data, idata and stack together. + This is the default now. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-no-pack-iram +\series default +\InsetSpace ~ + +\begin_inset LatexCommand index +name "-\\/-no-pack-iram" + +\end_inset + + Causes the linker to use old style for allocating memory areas. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-acall-ajmp +\series default +\InsetSpace ~ + +\begin_inset LatexCommand index +name "-\\/-acall-ajmp" + +\end_inset + + Replaces the three byte instructions lcall/ljmp with the two byte instructions + acall/ajmp. + Only use this option if your code is in the same 2k block of memory. + You may need to use this option for some 8051 derivatives which lack the + lcall/ljmp instructions.. +\end_layout + +\begin_layout Standard +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +DS390 / DS400 Options +\begin_inset LatexCommand index +name "Options DS390" + +\end_inset + + +\begin_inset LatexCommand index +name "DS390" + +\end_inset + + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-model-flat24 +\series default + +\begin_inset LatexCommand index +name "DS390!Options!-\\/-model-flat24" + +\end_inset + + +\size large + +\size default +Generate 24-bit flat mode code. + This is the one and only that the ds390 code generator supports right now + and is default when using +\emph on +-mds390 +\emph default +. + See section Memory Models for more details. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-protect-sp-update +\begin_inset LatexCommand index +name "DS390!Options!-\\/-protect-sp-update" + +\end_inset + + +\series default + disable interrupts during ESP:SP updates. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-10bit +\series default + +\begin_inset LatexCommand index +name "DS390!Options!-\\/-stack-10bit" + +\end_inset + + Generate code for the 10 bit stack mode of the Dallas DS80C390 part. + This is the one and only that the ds390 code generator supports right now + and is default when using +\emph on +-mds390 +\emph default +. + In this mode, the stack is located in the lower 1K of the internal RAM, + which is mapped to 0x400000. + Note that the support is incomplete, since it still uses a single byte + as the stack pointer. + This means that only the lower 256 bytes of the potential 1K stack space + will actually be used. + However, this does allow you to reclaim the precious 256 bytes of low RAM + for use for the DATA and IDATA segments. + The compiler will not generate any code to put the processor into 10 bit + stack mode. + It is important to ensure that the processor is in this mode before calling + any re-entrant functions compiled with this option. + In principle, this should work with the +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-auto +\begin_inset LatexCommand index +name "-\\/-stack-auto" + +\end_inset + + +\emph default + option, but that has not been tested. + It is incompatible with the +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-xstack +\begin_inset LatexCommand index +name "-\\/-xstack" + +\end_inset + + +\emph default + option. + It also only makes sense if the processor is in 24 bit contiguous addressing + mode (see the +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-model-flat24 option +\emph default +). +\series bold + +\begin_inset Note Note +status collapsed + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-8-bit - switches off the 10-bit mode +\end_layout + +\end_inset + + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-probe +\begin_inset LatexCommand index +name "DS390!Options!-\\/-stack-probe" + +\end_inset + + +\series default + insert call to function __stack_probe at each function prologue. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-tini-libid +\begin_inset LatexCommand index +name "DS390!Options!-\\/-tini-libid" + +\end_inset + + +\series default + LibraryID used in -mTININative. + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-use-accelerator +\begin_inset LatexCommand index +name "DS390!Options!-\\/-use-accelerator" + +\end_inset + + +\series default + generate code for DS390 Arithmetic Accelerator. + +\end_layout + +\begin_layout Standard +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +Z80 Options +\begin_inset LatexCommand index +name "Options Z80" + +\end_inset + + +\begin_inset LatexCommand index +name "Z80" + +\end_inset + + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-callee-saves-bc +\series default + +\begin_inset LatexCommand index +name "Z80!Options!-\\/-callee-saves-bc" + +\end_inset + + +\size large + +\size default +Force a called function to always save BC. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-no-std-crt0 +\series default + +\begin_inset LatexCommand index +name "Z80!Options!-\\/-no-std-crt0" + +\end_inset + + When linking, skip the standard crt0.o object file. + You must provide your own crt0.o for your system when linking. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-portmode= +\series default + +\begin_inset LatexCommand index +name "Z80!Options!-\\/-portmode=" + +\end_inset + + Determinate PORT I/O mode ( is z80 or z180). +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-asm= +\series default + +\begin_inset LatexCommand index +name "Z80!Options!-\\/-asm=" + +\end_inset + + Define assembler name ( is rgbds, asxxxx, isas or z80asm). +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-codeseg +\series default +\InsetSpace ~ + +\begin_inset LatexCommand index +name "Z80!Options!-\\/-codeseg " + +\end_inset + + Use for the code segment name. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-constseg +\series default +\InsetSpace ~ + +\begin_inset LatexCommand index +name "Z80!Options!-\\/-constseg " + +\end_inset + + Use for the const segment name. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +GBZ80 Options +\begin_inset LatexCommand index +name "Options GBZ80" + +\end_inset + + +\begin_inset LatexCommand index +name "GBZ80" + +\end_inset + + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-callee-saves-bc +\series default + +\begin_inset LatexCommand index +name "GBZ80!Options!-\\/-callee-saves-bc" + +\end_inset + + +\size large + +\size default +Force a called function to always save BC. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-no-std-crt0 +\series default + +\begin_inset LatexCommand index +name "Z80!Options!-\\/-no-std-crt0" + +\end_inset + + When linking, skip the standard crt0.o object file. + You must provide your own crt0.o for your system when linking. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-bo +\series default +\InsetSpace ~ + +\begin_inset LatexCommand index +name "GBZ80!Options!-bo " + +\end_inset + + Use code bank . +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-ba +\series default +\InsetSpace ~ + +\begin_inset LatexCommand index +name "GBZ80!Options!-ba " + +\end_inset + + Use data bank . +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-codeseg +\series default +\InsetSpace ~ + +\begin_inset LatexCommand index +name "GBZ80!Options!-\\/-codeseg " + +\end_inset + + Use for the code segment name. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-constseg +\series default +\InsetSpace ~ + +\begin_inset LatexCommand index +name "GBZ80!Options!-\\/-constseg " + +\end_inset + + Use for the const segment name. +\end_layout + +\begin_layout Standard +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +Optimization Options +\begin_inset LatexCommand index +name "Options optimization" + +\end_inset + + +\begin_inset LatexCommand index +name "Optimization options" + +\end_inset + + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-nogcse +\begin_inset LatexCommand index +name "-\\/-nogcse" + +\end_inset + + +\series default + Will not do global subexpression elimination, this option may be used when + the compiler creates undesirably large stack/data spaces to store compiler + temporaries ( +\emph on +s +\emph default +pill +\emph on +loc +\emph default +ations, sloc +\begin_inset LatexCommand index +name "sloc (spill location)" + +\end_inset + +). + A warning message will be generated when this happens and the compiler + will indicate the number of extra bytes it allocated. + It is recommended that this option NOT be used, #pragma\InsetSpace ~ +nogcse +\begin_inset LatexCommand index +name "\\#pragma nogcse" + +\end_inset + + can be used to turn off global subexpression elimination +\begin_inset LatexCommand index +name "Subexpression elimination" + +\end_inset + + for a given function only. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-noinvariant +\begin_inset LatexCommand index +name "-\\/-noinvariant" + +\end_inset + + +\series default + Will not do loop invariant optimizations, this may be turned off for reasons + explained for the previous option. + For more details of loop optimizations performed see Loop Invariants in + section +\begin_inset LatexCommand ref +reference "sub:Loop-Optimizations" + +\end_inset + +. + It is recommended that this option NOT be used, #pragma\InsetSpace ~ +noinvariant +\begin_inset LatexCommand index +name "\\#pragma noinvariant" + +\end_inset + + can be used to turn off invariant optimizations for a given function only. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-noinduction +\begin_inset LatexCommand index +name "-\\/-noinduction" + +\end_inset + + +\series default + Will not do loop induction optimizations, see section strength reduction + for more details. + It is recommended that this option is NOT used, #pragma\InsetSpace ~ +noinduction +\begin_inset LatexCommand index +name "\\#pragma noinduction" + +\end_inset + + can be used to turn off induction optimizations for a given function only. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-nojtbound +\begin_inset LatexCommand index +name "-\\/-nojtbound" + +\end_inset + + +\size large + +\series default +\size default + Will not generate boundary condition check when switch statements +\begin_inset LatexCommand index +name "switch statement" + +\end_inset + + are implemented using jump-tables. + See section +\begin_inset LatexCommand ref +reference "sub:'switch'-Statements" + +\end_inset + +\InsetSpace ~ +Switch Statements for more details. + It is recommended that this option is NOT used, #pragma\InsetSpace ~ +nojtbound +\begin_inset LatexCommand index +name "\\#pragma nojtbound" + +\end_inset + + can be used to turn off boundary checking for jump tables for a given function + only. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-noloopreverse +\begin_inset LatexCommand index +name "-\\/-noloopreverse" + +\end_inset + + +\series default +\size large + +\size default +Will not do loop reversal +\begin_inset LatexCommand index +name "Loop reversing" + +\end_inset + +optimization. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +- +\series bold +nolabelopt +\series default + +\begin_inset LatexCommand index +name "-\\/-nolabelopt " + +\end_inset + +Will not optimize labels (makes the dumpfiles more readable). +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-no-xinit-opt +\begin_inset LatexCommand index +name "-\\/-no-xinit-opt" + +\end_inset + + +\series default + Will not memcpy initialized data from code space into xdata space. + This saves a few bytes in code space if you don't have initialized data +\begin_inset LatexCommand index +name "Variable initialization" + +\end_inset + +. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-nooverlay +\begin_inset LatexCommand index +name "-\\/-nooverlay" + +\end_inset + + +\series default + The compiler will not overlay parameters and local variables of any function, + see section Parameters and local variables for more details. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-no-peep +\begin_inset LatexCommand index +name "-\\/-no-peep" + +\end_inset + + +\series default + Disable peep-hole optimization with built-in rules. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-peep-file +\series default + +\begin_inset LatexCommand index +name "-\\/-peep-file" + +\end_inset + +\InsetSpace ~ + This option can be used to use additional rules to be used by + the peep hole optimizer. + See section +\begin_inset LatexCommand ref +reference "sub:Peephole-Optimizer" + +\end_inset + +\InsetSpace ~ +Peep Hole optimizations for details on how to write these rules. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-peep-asm +\begin_inset LatexCommand index +name "-\\/-peep-asm" + +\end_inset + + +\series default + Pass the inline assembler code through the peep hole optimizer. + This can cause unexpected changes to inline assembler code, please go through + the peephole optimizer +\begin_inset LatexCommand index +name "Peephole optimizer" + +\end_inset + + rules defined in the source file tree '/peeph.def' before using + this option. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-opt-code-speed +\begin_inset LatexCommand index +name "-\\/-opt-code-speed" + +\end_inset + + +\series default + The compiler will optimize code generation towards fast code, possibly + at the expense of code size. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-opt-code-size +\begin_inset LatexCommand index +name "-\\/-opt-code-size" + +\end_inset + + +\series default + The compiler will optimize code generation towards compact code, possibly + at the expense of code speed. +\end_layout + +\begin_layout Standard +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +Other Options +\begin_inset LatexCommand index +name "Options other" + +\end_inset + + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-v\InsetSpace ~ +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-version +\begin_inset LatexCommand index +name "-\\/-version" + +\end_inset + + +\begin_inset LatexCommand index +name "-v" + +\end_inset + + +\series default + displays the sdcc version. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-c\InsetSpace ~ +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-compile-only +\begin_inset LatexCommand index +name "-\\/-compile-only" + +\end_inset + + +\begin_inset LatexCommand index +name "-c" + +\end_inset + + +\series default + will compile and assemble the source, but will not call the linkage editor. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\series default + +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\series bold +-c1mode +\begin_inset LatexCommand index +name "-\\/-c1mode" + +\end_inset + + +\series default + reads the preprocessed source from standard input and compiles it. + The file name for the assembler output must be specified using the -o option. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-E +\begin_inset LatexCommand index +name "-E" + +\end_inset + + +\series default + Run only the C preprocessor. + Preprocess all the C source files specified and output the results to standard + output. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-o\InsetSpace ~ + +\begin_inset LatexCommand index +name "-o " + +\end_inset + + +\series default + The output path where everything will be placed or the file name used for + all generated output files. + If the parameter is a path, it must have a trailing slash (or backslash + for the Windows binaries) to be recognized as a path. + Note for Windows users: if the path contains spaces, it should be surrounded + by quotes. + The trailing backslash should be doubled in order to prevent escaping the + final quote, for example: +\emph on +-o +\begin_inset Quotes sld +\end_inset + +F: +\backslash +Projects +\backslash +test3 +\backslash +output 1 +\backslash + +\backslash + +\begin_inset Quotes srd +\end_inset + + +\emph default + or put after the final quote, for example: +\emph on +-o +\begin_inset Quotes sld +\end_inset + +F: +\backslash +Projects +\backslash +test3 +\backslash +output 1 +\begin_inset Quotes srd +\end_inset + + +\backslash + +\emph default +. + The path using slashes for directory delimiters can be used too, for example: + +\emph on +-o +\begin_inset Quotes sld +\end_inset + +F:/Projects/test3/output 1/ +\begin_inset Quotes srd +\end_inset + + +\emph default +. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-auto +\begin_inset LatexCommand index +name "-\\/-stack-auto" + +\end_inset + + +\series default +\size large + +\size default +All functions in the source file will be compiled as +\emph on +reentrant +\emph default + +\begin_inset LatexCommand index +name "reentrant" + +\end_inset + +, i.e. + the parameters and local variables will be allocated on the stack +\begin_inset LatexCommand index +name "stack" + +\end_inset + +. + See section +\begin_inset LatexCommand ref +reference "sec:Parameters-and-Local-Variables" + +\end_inset + + Parameters and Local Variables for more details. + If this option is used all source files in the project should be compiled + with this option. + It automatically implies - +\series bold + +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\series default +-int-long-reent and - +\series bold + +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\series default +-float-reent. + +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-callee-saves +\begin_inset LatexCommand index +name "-\\/-callee-saves" + +\end_inset + + +\begin_inset LatexCommand label +name "lyx:--callee-saves-function1[,function2][,function3]..." + +\end_inset + +function1[,function2][,function3].... + +\series default + The compiler by default uses a caller saves convention for register saving + across function calls, however this can cause unnecessary register pushing + and popping when calling small functions from larger functions. + This option can be used to switch the register saving convention for the + function names specified. + The compiler will not save registers when calling these functions, no extra + code will be generated at the entry and exit (function prologue +\series bold + +\begin_inset LatexCommand index +name "function prologue" + +\end_inset + + +\series default + and epilogue +\series bold + +\begin_inset LatexCommand index +name "function epilogue" + +\end_inset + + +\series default +) for these functions to save and restore the registers used by these functions, + this can SUBSTANTIALLY reduce code and improve run time performance of + the generated code. + In the future the compiler (with inter procedural analysis) will be able + to determine the appropriate scheme to use for each function call. + DO NOT use this option for built-in functions such as _mulint..., if this + option is used for a library function the appropriate library function + needs to be recompiled with the same option. + If the project consists of multiple source files then all the source file + should be compiled with the same - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-callee-saves option string. + Also see #pragma\InsetSpace ~ +callee_saves +\begin_inset LatexCommand index +name "\\#pragma callee\\_saves" + +\end_inset + + +\begin_inset LatexCommand vpageref +reference "ite:callee_saves-function1[,function2[,function3...]]--" + +\end_inset + +. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-all-callee-saves +\begin_inset LatexCommand index +name "-\\/-all-callee-saves" + +\end_inset + + +\series default + Function of - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-callee-saves will be applied to all functions by default. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-debug +\begin_inset LatexCommand index +name "-\\/-debug" + +\end_inset + + +\series default +When this option is used the compiler will generate debug information. + The debug information collected in a file with .cdb extension can be used + with the SDCDB. + For more information see documentation for SDCDB. + Another file with no extension contains debug information in AOMF or AOMF51 +\begin_inset LatexCommand index +name "AOMF, AOMF51" + +\end_inset + + format which is commonly used by third party tools. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-S +\begin_inset LatexCommand index +name "-S" + +\end_inset + + +\series default +\size large + +\size default +Stop after the stage of compilation proper; do not assemble. + The output is an assembler code file for the input file specified. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-int-long-reent +\begin_inset LatexCommand index +name "-\\/-int-long-reent" + +\end_inset + + +\series default + Integer (16 bit) and long (32 bit) libraries have been compiled as reentrant. + Note by default these libraries are compiled as non-reentrant. + See section Installation for more details. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-cyclomatic +\begin_inset LatexCommand index +name "-\\/-cyclomatic" + +\end_inset + + +\series default +This option will cause the compiler to generate an information message for + each function in the source file. + The message contains some +\emph on +important +\emph default + information about the function. + The number of edges and nodes the compiler detected in the control flow + graph of the function, and most importantly the +\emph on +cyclomatic complexity +\begin_inset LatexCommand index +name "Cyclomatic complexity" + +\end_inset + + +\emph default + see section on Cyclomatic Complexity for more details. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-float-reent +\begin_inset LatexCommand index +name "-\\/-float-reent" + +\end_inset + + +\series default + Floating point library is compiled as reentrant +\begin_inset LatexCommand index +name "reentrant" + +\end_inset + +. + See section Installation for more details. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-funsigned-char +\begin_inset LatexCommand index +name "-\\/-funsigned-char" + +\end_inset + + +\series default + The default signedness for every type is +\family typewriter +signed +\family default +. + In some embedded environments the default signedness of +\family typewriter +char +\family default + is +\family typewriter +unsigned +\family default +. + To set the signess for characters to unsigned, use the option - +\series bold + +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\series default +-funsigned-char. + If this option is set and no signedness keyword (unsigned/signed) is given, + a char will be signed. + All other types are unaffected. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-main-return +\begin_inset LatexCommand index +name "-\\/-main-return" + +\end_inset + + +\series default + This option can be used if the code generated is called by a monitor program + or if the main routine includes an endless loop. + This option results in slightly smaller code and saves two bytes of stack + space. + The return from the 'main' +\begin_inset LatexCommand index +name "main return" + +\end_inset + + function will return to the function calling main. + The default setting is to lock up i.e. + generate a ' +\family typewriter +sjmp . +\family default +'. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-nostdinc +\begin_inset LatexCommand index +name "-\\/-nostdinc" + +\end_inset + + +\series default + This will prevent the compiler from passing on the default include path + to the preprocessor. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-nostdlib +\begin_inset LatexCommand index +name "-\\/-nostdlib" + +\end_inset + + +\series default + This will prevent the compiler from passing on the default library +\begin_inset LatexCommand index +name "Libraries" + +\end_inset + + path to the linker. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-verbose +\begin_inset LatexCommand index +name "-\\/-verbose" + +\end_inset + + +\series default + Shows the various actions the compiler is performing. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-V +\begin_inset LatexCommand index +name "-V" + +\end_inset + + +\series default + Shows the actual commands the compiler is executing. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-no-c-code-in-asm +\begin_inset LatexCommand index +name "-\\/-no-c-code-in-asm" + +\end_inset + + +\series default + Hides your ugly and inefficient c-code from the asm file, so you can always + blame the compiler :) +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-fverbose-asm +\begin_inset LatexCommand index +name "-\\/-no-gen-comments" + +\end_inset + + +\series default + Include code generator and peep-hole comments in the generated asm files. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-no-peep-comments +\begin_inset LatexCommand index +name "-\\/-no-peep-comments" + +\end_inset + + +\series default + Don't include peep-hole comments in the generated asm files even if - +\series bold + +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\series default +-fverbose-asm option is specified. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-i-code-in-asm +\begin_inset LatexCommand index +name "-\\/-i-code-in-asm" + +\end_inset + + +\series default + Include i-codes in the asm file. + Sounds like noise but is most helpful for debugging the compiler itself. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-less-pedantic +\begin_inset LatexCommand index +name "pedantic" + +\end_inset + + +\begin_inset LatexCommand index +name "-\\/-less-pedantic" + +\end_inset + + +\series default + +\begin_inset LatexCommand label +name "lyx:--less-pedantic" + +\end_inset + + Disable some of the more pedantic warnings +\begin_inset LatexCommand index +name "Warnings" + +\end_inset + +. + For more details, see the less_pedantic pragma +\begin_inset LatexCommand vpageref +reference "ite:less_pedantic" + +\end_inset + +. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-warning\InsetSpace ~ + +\begin_inset LatexCommand index +name "-\\/-disable-warning" + +\end_inset + + +\series default + Disable specific warning with number . +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-Werror +\begin_inset LatexCommand index +name "-\\/-Werror" + +\end_inset + + +\series default + Treat all warnings as errors. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-print-search-dirs +\begin_inset LatexCommand index +name "-\\/-print-search-dirs" + +\end_inset + + +\series default + Display the directories in the compiler's search path +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-vc +\begin_inset LatexCommand index +name "-\\/-vc" + +\end_inset + + +\series default + Display errors and warnings using MSVC style, so you can use SDCC with + the visual studio IDE +\begin_inset LatexCommand index +name "IDE" + +\end_inset + +. + With SDCC both offering a GCC-like (the default) and a MSVC-like +\begin_inset LatexCommand index +name "MSVC output style" + +\end_inset + + output style, integration into most programming editors should be straightforwa +rd. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-use-stdout +\begin_inset LatexCommand index +name "-\\/-use-stdout" + +\end_inset + + +\series default + Send errors and warnings to stdout instead of stderr. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +-Wa\InsetSpace ~ +asmOption[,asmOption] +\series default + +\begin_inset LatexCommand index +name "-Wa asmOption[,asmOption]" + +\end_inset + +... + Pass the asmOption to the assembler +\begin_inset LatexCommand index +name "Options assembler" + +\end_inset + + +\begin_inset LatexCommand index +name "Assembler options" + +\end_inset + +. + See file sdcc/as/doc/asxhtm.html for assembler options.cd +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-sdcc89 +\begin_inset LatexCommand index +name "-\\/-std-sdcc89" + +\end_inset + + +\series default + Generally follow the C89 standard, but allow SDCC features that conflict + with the standard (default). +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-c89 +\begin_inset LatexCommand index +name "-\\/-std-c89" + +\end_inset + + +\series default + Follow the C89 standard and disable SDCC features that conflict with the + standard. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-sdcc99 +\begin_inset LatexCommand index +name "-\\/-std-sdcc99" + +\end_inset + + +\series default + Generally follow the C99 standard, but allow SDCC features that conflict + with the standard (incomplete support). +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-c99 +\begin_inset LatexCommand index +name "-\\/-std-sdcc99" + +\end_inset + + +\series default + Follow the C99 standard and disable SDCC features that conflict with the + standard (incomplete support). +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-codeseg +\series default + +\begin_inset LatexCommand index +name "-\\/-codeseg " + +\end_inset + + +\begin_inset LatexCommand label +name "lyx:-codeseg" + +\end_inset + +\InsetSpace ~ + The name to be used for the code +\begin_inset LatexCommand index +name "code" + +\end_inset + + segment, default CSEG. + This is useful if you need to tell the compiler to put the code in a special + segment so you can later on tell the linker to put this segment in a special + place in memory. + Can be used for instance when using bank switching to put the code in a + bank. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-constseg +\series default + +\begin_inset LatexCommand index +name "-\\/-constseg " + +\end_inset + +\InsetSpace ~ + The name to be used for the const +\begin_inset LatexCommand index +name "const" + +\end_inset + + segment, default CONST. + This is useful if you need to tell the compiler to put the const data in + a special segment so you can later on tell the linker to put this segment + in a special place in memory. + Can be used for instance when using bank switching to put the const data + in a bank. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-fdollars-in-identifiers +\begin_inset LatexCommand index +name "-\\/-fdollars-in-identifiers" + +\end_inset + + +\series default + Permit '$' as an identifier character. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-more-pedantic +\series default + +\begin_inset LatexCommand index +name "-\\/-more-pedantic" + +\end_inset + + +\begin_inset LatexCommand index +name "pedantic" + +\end_inset + + Actually this is +\series bold +\emph on +not +\series default +\emph default + a SDCC compiler option but if you want +\emph on +more +\emph default + warnings you can use a separate tool dedicated to syntax checking like + splint +\begin_inset LatexCommand label +name "lyx:more-pedantic-SPLINT" + +\end_inset + + +\begin_inset LatexCommand index +name "lint (syntax checking tool)" + +\end_inset + + +\begin_inset LatexCommand url +target "http://www.splint.org" + +\end_inset + +. + To make your source files parseable by splint you will have to include + +\family sans +lint.h +\family default + +\begin_inset LatexCommand index +name "splint (syntax checking tool)" + +\end_inset + + in your source file and add brackets around extended keywords (like +\family sans + +\begin_inset Quotes sld +\end_inset + +__at\InsetSpace ~ + +\series bold +( +\series default +0xab +\series bold +) +\series default + +\begin_inset Quotes srd +\end_inset + + +\family default + and +\family sans + +\begin_inset Quotes sld +\end_inset + +__interrupt\InsetSpace ~ +(2) +\begin_inset Quotes srd +\end_inset + + +\family default +). + +\newline +Splint has an excellent on line manual at +\begin_inset LatexCommand url +target "http://www.splint.org/manual/" + +\end_inset + + and it's capabilities go beyond pure syntax checking. + You'll need to tell splint the location of SDCC's include files so a typical + command line could look like this: +\newline + +\family sans +splint\InsetSpace ~ +-I\InsetSpace ~ +/usr/local/share/sdcc/include/mcs51/\InsetSpace ~ +\InsetSpace ~ +myprogram.c +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-short-is-8bits +\series default + +\begin_inset LatexCommand index +name "-\\/-short-is-8bits" + +\end_inset + + +\begin_inset LatexCommand label +name "lyx:--short-is-8bits" + +\end_inset + + Treat short as 8-bit (for backward compatibility with older versions of + compiler - see section +\begin_inset LatexCommand ref +reference "sec:Compatibility-with-previous" + +\end_inset + +) +\end_layout + +\begin_layout Standard +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +Intermediate Dump Options +\begin_inset LatexCommand label +name "sub:Intermediate-Dump-Options" + +\end_inset + + +\begin_inset LatexCommand index +name "Options intermediate dump" + +\end_inset + + +\begin_inset LatexCommand index +name "Intermediate dump options" + +\end_inset + + +\end_layout + +\begin_layout Standard +The following options are provided for the purpose of retargetting and debugging + the compiler. + They provide a means to dump the intermediate code (iCode +\begin_inset LatexCommand index +name "iCode" + +\end_inset + +) generated by the compiler in human readable form at various stages of + the compilation process. + More on iCodes see chapter +\begin_inset LatexCommand ref +reference "sub:The-anatomy-of" + +\end_inset + + +\begin_inset Quotes srd +\end_inset + +The anatomy of the compiler +\begin_inset Quotes srd +\end_inset + +. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-dumpraw +\begin_inset LatexCommand index +name "-\\/-dumpraw" + +\end_inset + + +\series default + This option will cause the compiler to dump the intermediate code into + a file of named +\emph on +.dumpraw +\emph default + just after the intermediate code has been generated for a function, i.e. + before any optimizations are done. + The basic blocks +\begin_inset LatexCommand index +name "Basic blocks" + +\end_inset + + at this stage ordered in the depth first number, so they may not be in + sequence of execution. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-dumpgcse +\begin_inset LatexCommand index +name "-\\/-dumpgcse" + +\end_inset + + +\series default + Will create a dump of iCodes, after global subexpression elimination +\begin_inset LatexCommand index +name "Global subexpression elimination" + +\end_inset + +, into a file named +\emph on +.dumpgcse. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-dumpdeadcode +\begin_inset LatexCommand index +name "-\\/-dumpdeadcode" + +\end_inset + + +\series default + Will create a dump of iCodes, after deadcode elimination +\begin_inset LatexCommand index +name "Dead-code elimination" + +\end_inset + +, into a file named +\emph on +.dumpdeadcode. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-dumploop +\begin_inset LatexCommand index +name "-\\/-dumploop" + +\end_inset + + +\series default +\size large + +\size default +Will create a dump of iCodes, after loop optimizations +\begin_inset LatexCommand index +name "Loop optimization" + +\end_inset + +, into a file named +\emph on +.dumploop. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-dumprange +\begin_inset LatexCommand index +name "-\\/-dumprange" + +\end_inset + + +\series default +\size large + +\size default +Will create a dump of iCodes, after live range analysis +\begin_inset LatexCommand index +name "Live range analysis" + +\end_inset + +, into a file named +\emph on +.dumprange. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-dumlrange +\begin_inset LatexCommand index +name "-\\/-dumlrange" + +\end_inset + + +\series default + Will dump the life ranges +\begin_inset LatexCommand index +name "Live range analysis" + +\end_inset + + for all symbols. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-dumpregassign +\begin_inset LatexCommand index +name "-\\/-dumpregassign" + +\end_inset + + +\series default +Will create a dump of iCodes, after register assignment +\begin_inset LatexCommand index +name "Register assignment" + +\end_inset + +, into a file named +\emph on +.dumprassgn. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-dumplrange +\begin_inset LatexCommand index +name "-\\/-dumplrange" + +\end_inset + + +\series default + Will create a dump of the live ranges of iTemp's +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-dumpall +\begin_inset LatexCommand index +name "-\\/-dumpall" + +\end_inset + + +\size large + +\series default +\size default +Will cause all the above mentioned dumps to be created. +\end_layout + +\begin_layout Standard +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +Redirecting output on Windows Shells +\end_layout + +\begin_layout Standard +By default SDCC writes its error messages to +\begin_inset Quotes sld +\end_inset + +standard error +\begin_inset Quotes srd +\end_inset + +. + To force all messages to +\begin_inset Quotes sld +\end_inset + +standard output +\begin_inset Quotes srd +\end_inset + + use +\series bold +- +\series default +\emph on + +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\series bold +\emph default +- +\series default +use-stdout +\begin_inset LatexCommand index +name "-\\/-use-stdout" + +\end_inset + +. + Additionally, if you happen to have visual studio installed in your windows + machine, you can use it to compile your sources using a custom build and + the SDCC - +\emph on + +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\emph default +-vc +\begin_inset LatexCommand index +name "-\\/-vc" + +\end_inset + + option. + Something like this should work: +\newline + +\newline + +\series bold +c: +\backslash +sdcc +\backslash +bin +\backslash +sdcc.exe - +\series default +\emph on + +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\series bold +\emph default +-vc - +\series default +\emph on + +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\series bold +\emph default +-model-large -c $(InputPath) +\series default + +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +Environment variables +\begin_inset LatexCommand index +name "Environment variables" + +\end_inset + + +\end_layout + +\begin_layout Standard +SDCC recognizes the following environment variables: +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +SDCC_LEAVE_SIGNALS +\begin_inset LatexCommand index +name "SDCC\\_LEAVE\\_SIGNALS" + +\end_inset + + +\series default + SDCC installs a signal handler +\begin_inset LatexCommand index +name "signal handler" + +\end_inset + + to be able to delete temporary files after an user break (^C) or an exception. + If this environment variable is set, SDCC won't install the signal handler + in order to be able to debug SDCC. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +TMP,\InsetSpace ~ +TEMP,\InsetSpace ~ +TMPDIR +\begin_inset LatexCommand index +name "TMP, TEMP, TMPDIR" + +\end_inset + + +\series default + Path, where temporary files will be created. + The order of the variables is the search order. + In a standard *nix environment these variables are not set, and there's + no need to set them. + On Windows it's recommended to set one of them. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +SDCC_HOME +\begin_inset LatexCommand index +name "SDCC\\_HOME" + +\end_inset + + +\series default + Path, see section +\begin_inset LatexCommand ref +reference "sub:Install-paths" + +\end_inset + +\InsetSpace ~ + +\begin_inset Quotes sld +\end_inset + + Install Paths +\begin_inset Quotes srd +\end_inset + +. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +SDCC_INCLUDE +\begin_inset LatexCommand index +name "SDCC\\_INCLUDE" + +\end_inset + + +\series default + Path, see section +\begin_inset LatexCommand ref +reference "sub:Search-Paths" + +\end_inset + +\InsetSpace ~ + +\begin_inset Quotes sld +\end_inset + +Search Paths +\begin_inset Quotes srd +\end_inset + +. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series bold +SDCC_LIB +\begin_inset LatexCommand index +name "SDCC\\_LIB" + +\end_inset + + +\series default + Path, see section +\begin_inset LatexCommand ref +reference "sub:Search-Paths" + +\end_inset + +\InsetSpace ~ + +\begin_inset Quotes sld +\end_inset + +Search Paths +\begin_inset Quotes srd +\end_inset + +.. +\end_layout + +\begin_layout Standard +There are some more environment variables recognized by SDCC, but these + are solely used for debugging purposes. + They can change or disappear very quickly, and will never be documented. +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +Storage Class Language Extensions +\end_layout + +\begin_layout Subsection +MCS51/DS390 Storage Class +\begin_inset LatexCommand index +name "Storage class" + +\end_inset + + Language Extensions +\end_layout + +\begin_layout Standard +In addition to the ANSI storage classes SDCC allows the following MCS51 + specific storage classes: +\end_layout + +\begin_layout Subsubsection +data +\begin_inset LatexCommand index +name "data (mcs51, ds390 storage class)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_data (mcs51, ds390 storage class)" + +\end_inset + + / near +\begin_inset LatexCommand index +name "near (storage class)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_near (storage class)" + +\end_inset + + +\end_layout + +\begin_layout Standard +This is the +\series bold +default +\series default + storage class for the Small Memory model ( +\emph on +data +\emph default + and +\emph on +near +\emph default + or the more ANSI-C compliant forms +\emph on +__data +\emph default + and +\emph on +__near +\emph default + can be used synonymously). + Variables declared with this storage class will be allocated in the directly + addressable portion of the internal RAM of a 8051, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +__data unsigned char test_data; +\end_layout + +\begin_layout Standard +Writing 0x01 to this variable generates the assembly code: +\end_layout + +\begin_layout Verse + +\family typewriter +75*00 01\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +_test_data,#0x01 +\end_layout + +\begin_layout Subsubsection +xdata +\begin_inset LatexCommand index +name "xdata (mcs51, ds390 storage class)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_xdata (mcs51, ds390 storage class)" + +\end_inset + + / far +\begin_inset LatexCommand index +name "far (storage class)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_far (storage class)" + +\end_inset + + +\end_layout + +\begin_layout Standard +Variables declared with this storage class will be placed in the external + RAM. + This is the +\series bold +default +\series default + storage class for the Large Memory model, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +__xdata unsigned char test_xdata; +\end_layout + +\begin_layout Standard +Writing 0x01 to this variable generates the assembly code: +\end_layout + +\begin_layout Verse + +\family typewriter +90s00r00\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +dptr,#_test_xdata +\newline +74\InsetSpace ~ +01\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +a,#0x01 +\newline +F0\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +movx\InsetSpace ~ +@dptr,a +\end_layout + +\begin_layout Subsubsection +idata +\begin_inset LatexCommand index +name "idata (mcs51, ds390 storage class)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_idata (mcs51, ds390 storage class)" + +\end_inset + + +\end_layout + +\begin_layout Standard +Variables declared with this storage class will be allocated into the indirectly + addressable portion of the internal ram of a 8051, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +__idata unsigned char test_idata; +\end_layout + +\begin_layout Standard +Writing 0x01 to this variable generates the assembly code: +\end_layout + +\begin_layout Verse + +\family typewriter +78r00\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +r0,#_test_idata +\newline +76\InsetSpace ~ +01\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +@r0,#0x01 +\end_layout + +\begin_layout Standard +Please note, the first 128 byte of idata physically access the same RAM + as the data memory. + The original 8051 had 128 byte idata memory, nowadays most devices have + 256 byte idata memory. + The stack +\begin_inset LatexCommand index +name "stack" + +\end_inset + + is located in idata memory. +\end_layout + +\begin_layout Subsubsection +pdata +\begin_inset LatexCommand index +name "pdata (mcs51, ds390 storage class)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_pdata (mcs51, ds390 storage class)" + +\end_inset + + +\end_layout + +\begin_layout Standard +Paged xdata access is just as straightforward as using the other addressing + modes of a 8051. + It is typically located at the start of xdata and has a maximum size of + 256 bytes. + The following example writes 0x01 to the pdata variable. + Please note, pdata access physically accesses xdata memory. + The high byte of the address is determined by port P2 +\begin_inset LatexCommand index +name "P2 (mcs51 sfr)" + +\end_inset + +(or in case of some 8051 variants by a separate Special Function Register, + see section +\begin_inset LatexCommand ref +reference "sub:MCS51-variants" + +\end_inset + +). + This is the +\series bold +default +\series default + storage class for the Medium Memory model, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +__pdata unsigned char test_pdata; +\end_layout + +\begin_layout Standard +Writing 0x01 to this variable generates the assembly code: +\end_layout + +\begin_layout Verse + +\family typewriter +78r00\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov r0,#_test_pdata +\newline +74 01\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov a,#0x01 +\newline +F2\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +movx @r0,a +\end_layout + +\begin_layout Standard +If the - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-xstack +\begin_inset LatexCommand index +name "-\\/-xstack" + +\end_inset + + option is used the pdata memory area is followed by the xstack memory area + and the sum of their sizes is limited to 256 bytes. +\end_layout + +\begin_layout Subsubsection +code +\begin_inset LatexCommand index +name "code" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_code" + +\end_inset + + +\end_layout + +\begin_layout Standard +'Variables' declared with this storage class will be placed in the code + memory: +\end_layout + +\begin_layout Verse + +\family typewriter +__code unsigned char test_code; +\end_layout + +\begin_layout Standard +Read access to this variable generates the assembly code: +\end_layout + +\begin_layout Verse + +\family typewriter +90s00r6F\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov dptr,#_test_code +\newline +E4\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +clr a +\newline +93\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +movc a,@a+dptr +\end_layout + +\begin_layout Standard + +\family typewriter +char +\family default + indexed arrays of characters in code memory can be accessed efficiently: +\end_layout + +\begin_layout Verse + +\family typewriter +__code char test_array[] = {'c','h','e','a','p'}; +\end_layout + +\begin_layout Standard +Read access to this array using an 8-bit unsigned index generates the assembly + code: +\end_layout + +\begin_layout Verse + +\family typewriter +E5*00\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov a,_index +\end_layout + +\begin_layout Verse + +\family typewriter +90s00r41\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov dptr,#_test_array +\end_layout + +\begin_layout Verse + +\family typewriter +93\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +movc a,@a+dptr +\end_layout + +\begin_layout Subsubsection +bit +\begin_inset LatexCommand index +name "bit" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_bit" + +\end_inset + + +\end_layout + +\begin_layout Standard +This is a data-type and a storage class specifier. + When a variable is declared as a bit, it is allocated into the bit addressable + memory of 8051, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +__bit test_bit; +\end_layout + +\begin_layout Standard +Writing 1 to this variable generates the assembly code: +\end_layout + +\begin_layout Verse + +\family typewriter +D2*00\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +setb\InsetSpace ~ +_test_bit +\end_layout + +\begin_layout Standard +The bit addressable memory consists of 128 bits which are located from 0x20 + to 0x2f in data memory. + +\newline +Apart from this 8051 specific storage class most architectures support + ANSI-C bitfields +\begin_inset LatexCommand index +name "bitfields" + +\end_inset + + +\begin_inset Foot +status open + +\begin_layout Standard +Not really meant as examples, but nevertheless showing what bitfields are + about: device/include/mc68hc908qy.h and support/regression/tests/bitfields.c +\end_layout + +\end_inset + +. + In accordance with ISO/IEC 9899 bits and bitfields without an explicit + signed modifier are implemented as unsigned. +\end_layout + +\begin_layout Subsubsection +sfr +\begin_inset LatexCommand index +name "sfr" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_sfr" + +\end_inset + + / sfr16 +\begin_inset LatexCommand index +name "sfr16" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_sfr16" + +\end_inset + + / sfr32 +\begin_inset LatexCommand index +name "sfr32" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_sfr32" + +\end_inset + + / sbit +\begin_inset LatexCommand index +name "\\_\\_sbit" + +\end_inset + + +\begin_inset LatexCommand index +name "sbit" + +\end_inset + + +\end_layout + +\begin_layout Standard +Like the bit keyword, +\emph on +sfr / sfr16 / sfr32 / sbit +\emph default + signify both a data-type and storage class, they are used to describe the + +\emph on +s +\emph default +pecial +\emph on +f +\emph default +unction +\emph on +r +\emph default +egisters and +\emph on +s +\emph default +pecial +\emph on +bit +\emph default + variables of a 8051, eg: +\end_layout + +\begin_layout Verse + +\family typewriter +__sfr __at +\begin_inset LatexCommand index +name "at" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_at" + +\end_inset + + (0x80) P0;\InsetSpace ~ + /* special function register P0 at location 0x80 */ +\newline + +\newline +/* 16 bit + special function register combination for timer 0 +\newline +\InsetSpace ~ +\InsetSpace ~ + with the high byte at + location 0x8C and the low byte at location 0x8A */ +\newline +__sfr16 __at (0x8C8A) + TMR0; +\newline + +\newline +__sbit __at +\begin_inset LatexCommand index +name "at" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_at" + +\end_inset + + (0xd7) CY;\InsetSpace ~ + /* CY (Carry Flag +\begin_inset LatexCommand index +name "Flags" + +\end_inset + + +\begin_inset LatexCommand index +name "Carry flag" + +\end_inset + +) */ +\end_layout + +\begin_layout Standard +Special function registers which are located on an address dividable by + 8 are bit-addressable, an +\emph on +sbit +\emph default + addresses a specific bit within these sfr. +\newline +16 Bit and 32 bit special function + register combinations which require a certain access order are better not + declared using +\emph on +sfr16 +\emph default + or +\emph on +sfr32. + +\emph default + Allthough SDCC usually accesses them Least Significant Byte (LSB) first, + this is not guaranteed. +\newline + +\end_layout + +\begin_layout Standard +Please note, if you use a header file which was written for another compiler + then the sfr / sfr16 / sfr32 / sbit Storage Class extensions will most + likely be +\emph on +not +\emph default + compatible. + Specifically the syntax +\family typewriter +\InsetSpace ~ +sfr P0 = 0x80;\InsetSpace ~ + +\family default + is compiled +\emph on +without warning +\emph default + by SDCC to an assignment of 0x80 to a variable called P0 +\family typewriter + +\begin_inset Marginal +status collapsed + +\begin_layout Standard + +\series bold +\InsetSpace ~ +! +\end_layout + +\end_inset + +. + +\family default + +\series bold +Nevertheless it is possible to write header files +\begin_inset LatexCommand index +name "Header files" + +\end_inset + + +\begin_inset LatexCommand index +name "Include files" + +\end_inset + + which can be shared among different compilers (see section +\begin_inset LatexCommand ref +reference "sec:Porting-code-to-other-compilers" + +\end_inset + +). + +\end_layout + +\begin_layout Subsubsection +Pointers +\begin_inset LatexCommand index +name "Pointer" + +\end_inset + + to MCS51/DS390 specific memory spaces +\end_layout + +\begin_layout Standard +SDCC allows (via language extensions) pointers to explicitly point to any + of the memory spaces +\begin_inset LatexCommand index +name "Memory model" + +\end_inset + + of the 8051. + In addition to the explicit pointers, the compiler uses (by default) generic + pointers which can be used to point to any of the memory spaces. +\newline + +\newline +Pointer + declaration examples: +\end_layout + +\begin_layout Verse + +\family typewriter +/* pointer physically in internal ram pointing to object in external ram + */ +\newline +__xdata unsigned char * __data p; +\newline + +\newline +/* pointer physically in external ram + pointing to object in internal ram */ +\newline +__data unsigned char * __xdata p; +\newline + +\newline +/* + pointer physically in code rom pointing to data in xdata space */ +\newline +__xdata + unsigned char * __code p; +\newline + +\newline +/* pointer physically in code space pointing to + data in code space */ +\newline +__code unsigned char * __code p; +\newline + +\newline +/* generic pointer + physically located in xdata space */ +\newline +unsigned char * __xdata p; +\newline + +\newline +/* generic + pointer physically located in default memory space */ +\newline +unsigned char * p; +\newline + +\newline +/* + the following is a function pointer +\begin_inset LatexCommand index +name "function pointer" + +\end_inset + + physically located in data space */ +\newline +char (* __data fp)(void); +\end_layout + +\begin_layout Standard +Well you get the idea. + +\newline + +\newline +All unqualified pointers are treated as 3-byte (4-byte for the ds390) +\emph on +generic +\emph default + pointers. + +\size small + +\newline + +\newline + +\size default +The highest order byte of the +\emph on +generic +\emph default + pointers contains the data space information. + Assembler support routines are called whenever data is stored or retrieved + using +\emph on +generic +\emph default + pointers. + These are useful for developing reusable library +\begin_inset LatexCommand index +name "Libraries" + +\end_inset + + routines. + Explicitly specifying the pointer +\begin_inset LatexCommand index +name "pointer" + +\end_inset + + type will generate the most efficient code. +\end_layout + +\begin_layout Subsubsection +Notes on MCS51 memory +\begin_inset LatexCommand index +name "MCS51 memory" + +\end_inset + + layout +\end_layout + +\begin_layout Standard +The 8051 family of microcontrollers have a minimum of 128 bytes of internal + RAM memory which is structured as follows: +\newline + +\newline +- Bytes 00-1F - 32 bytes to hold + up to 4 banks of the registers R0 to R7, +\newline +- Bytes 20-2F - 16 bytes to hold + 128 bit +\begin_inset LatexCommand index +name "bit" + +\end_inset + + variables and, +\newline +- Bytes 30-7F - 80 bytes for general purpose use. +\newline + +\end_layout + +\begin_layout Standard +Additionally some members of the MCS51 family may have up to 128 bytes of + additional, indirectly addressable, internal RAM memory ( +\emph on +idata +\emph default + +\begin_inset LatexCommand index +name "idata (mcs51, ds390 storage class)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_idata (mcs51, ds390 storage class)" + +\end_inset + +). + Furthermore, some chips may have some built in external memory ( +\emph on +xdata +\emph default + +\begin_inset LatexCommand index +name "xdata (mcs51, ds390 storage class)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_xdata (mcs51, ds390 storage class)" + +\end_inset + +) which should not be confused with the internal, directly addressable RAM + memory ( +\emph on +data +\emph default + +\begin_inset LatexCommand index +name "data (mcs51, ds390 storage class)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_data (mcs51, ds390 storage class)" + +\end_inset + +). + Sometimes this built in +\emph on +xdata +\emph default + memory has to be activated before using it (you can probably find this + information on the datasheet of the microcontroller your are using, see + also section +\begin_inset LatexCommand ref +reference "sub:Startup-Code" + +\end_inset + +\InsetSpace ~ +Startup-Code). +\end_layout + +\begin_layout Standard +Normally SDCC will only use the first bank +\begin_inset LatexCommand index +name "register bank (mcs51, ds390)" + +\end_inset + + of registers (register bank 0), but it is possible to specify that other + banks of registers (keyword +\emph on +using +\emph default + +\emph on + +\begin_inset LatexCommand index +name "using (mcs51, ds390 register bank)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_using (mcs51, ds390 register bank)" + +\end_inset + + +\emph default +) should be used for example in interrupt +\begin_inset LatexCommand index +name "interrupt" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_interrupt" + +\end_inset + + routines. + By default, the compiler will place the stack after the last byte of allocated + memory for variables. + For example, if the first 2 banks of registers are used, and only four + bytes are used for +\emph on +data +\emph default + variables, it will position the base of the internal stack at address 20 + (0x14). + This implies that as the stack +\begin_inset LatexCommand index +name "stack" + +\end_inset + + grows, it will use up the remaining register banks, and the 16 bytes used + by the 128 bit variables, and 80 bytes for general purpose use. + If any bit variables are used, the data variables will be placed in unused + register banks and after the byte holding the last bit variable. + For example, if register banks 0 and 1 are used, and there are 9 bit variables + (two bytes used), +\emph on +data +\emph default + variables will be placed starting from address 0x10 to 0x20 and continue + at address 0x22. + You can also use - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-data-loc +\begin_inset LatexCommand index +name "-\\/-data-loc " + +\end_inset + + to specify the start address of the +\emph on +data +\emph default + and - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-iram-size +\begin_inset LatexCommand index +name "-\\/-iram-size " + +\end_inset + + to specify the size of the total internal RAM ( +\emph on +data +\emph default ++ +\emph on +idata +\emph default +). + +\newline + +\end_layout + +\begin_layout Standard +By default the 8051 linker will place the stack after the last byte of (i)data + variables. + Option - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-loc +\begin_inset LatexCommand index +name "-\\/-stack-loc " + +\end_inset + + allows you to specify the start of the stack, i.e. + you could start it after any data in the general purpose area. + If your microcontroller has additional indirectly addressable internal + RAM ( +\emph on +idata +\emph default +) you can place the stack on it. + You may also need to use - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-xdata-loc +\begin_inset LatexCommand index +name "-\\/-xdata-loc" + +\end_inset + + to set the start address of the external RAM ( +\emph on +xdata +\emph default +) and - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-xram-size +\begin_inset LatexCommand index +name "-\\/-xram-size " + +\end_inset + + to specify its size. + Same goes for the code memory, using - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-code-loc +\begin_inset LatexCommand index +name "-\\/-code-loc " + +\end_inset + + and - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-code-size +\begin_inset LatexCommand index +name "-\\/-code-size " + +\end_inset + +. + If in doubt, don't specify any options and see if the resulting memory + layout is appropriate, then you can adjust it. +\end_layout + +\begin_layout Standard +The linker generates two files with memory allocation information. + The first, with extension .map +\begin_inset LatexCommand index +name ".map" + +\end_inset + + shows all the variables and segments. + The second with extension .mem +\begin_inset LatexCommand index +name ".mem" + +\end_inset + + shows the final memory layout. + The linker will complain either if memory segments overlap, there is not + enough memory, or there is not enough space for stack. + If you get any linking warnings and/or errors related to stack or segments + allocation, take a look at either the .map or .mem files to find out what + the problem is. + The .mem file may even suggest a solution to the problem. +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +Z80/Z180 Storage Class +\begin_inset LatexCommand index +name "Z80!Storage class" + +\end_inset + + Language Extensions +\end_layout + +\begin_layout Subsubsection +sfr +\begin_inset LatexCommand index +name "sfr" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_sfr" + +\end_inset + + (in/out to 8-bit addresses) +\end_layout + +\begin_layout Standard +The Z80 +\begin_inset LatexCommand index +name "Z80" + +\end_inset + + family has separate address spaces for memory and +\emph on +i +\emph default +nput/ +\emph on +o +\emph default +utput memory. + I/O memory +\begin_inset LatexCommand index +name "I/O memory (Z80, Z180)" + +\end_inset + + +\begin_inset LatexCommand index +name "Z80!I/O memory" + +\end_inset + + +\begin_inset LatexCommand index +name "Z180!I/O memory" + +\end_inset + + is accessed with special instructions, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +sfr at 0x78 IoPort;\InsetSpace ~ +\InsetSpace ~ +/* define a var in I/O space at 78h called IoPort */ + +\end_layout + +\begin_layout Standard +Writing 0x01 to this variable generates the assembly code: +\end_layout + +\begin_layout Verse + +\family typewriter +3E 01\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +ld a,#0x01 +\newline +D3 78\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +out (_IoPort),a +\end_layout + +\begin_layout Subsubsection +banked sfr +\begin_inset LatexCommand index +name "sfr" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_sfr" + +\end_inset + + (in/out to 16-bit addresses) +\end_layout + +\begin_layout Standard +The keyword +\emph on +banked +\emph default + is used to support 16 bit addresses in I/O memory e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +sfr banked at +\begin_inset LatexCommand index +name "at" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_at" + +\end_inset + + 0x123 IoPort; +\end_layout + +\begin_layout Standard +Writing 0x01 to this variable generates the assembly code: +\end_layout + +\begin_layout Verse + +\family typewriter +01 23 01\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +ld bc,#_IoPort +\newline +3E 01\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +ld a,#0x01 +\newline +ED 79\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +out (c),a +\end_layout + +\begin_layout Subsubsection +sfr +\begin_inset LatexCommand index +name "sfr" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_sfr" + +\end_inset + + (in0/out0 to 8 bit addresses on Z180 +\begin_inset LatexCommand index +name "Z180" + +\end_inset + +/HD64180 +\begin_inset LatexCommand index +name "HD64180 (see Z180)" + +\end_inset + +) +\end_layout + +\begin_layout Standard +The compiler option - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-portmode +\begin_inset LatexCommand index +name "Z180!Options!-\\/-portmode" + +\end_inset + +=180 (80) and a compiler #pragma\InsetSpace ~ +portmode +\begin_inset LatexCommand index +name "Z180!Pragmas!\\#pragma portmode" + +\end_inset + + z180 (z80) is used to turn on (off) the Z180/HD64180 port addressing instructio +ns +\family typewriter +in0/out0 +\family default + instead of +\family typewriter +in/out +\family default +. + If you include the file z180.h this will be set automatically. +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +HC08 Storage Class +\begin_inset LatexCommand index +name "HC08!Storage class" + +\end_inset + + Language Extensions +\end_layout + +\begin_layout Subsubsection +data +\begin_inset LatexCommand index +name "data (hc08 storage class)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_data (hc08 storage class)" + +\end_inset + + +\end_layout + +\begin_layout Standard +The data storage class declares a variable that resides in the first 256 + bytes of memory (the direct page). + The HC08 +\begin_inset LatexCommand index +name "HC08" + +\end_inset + + is most efficient at accessing variables (especially pointers) stored here. +\end_layout + +\begin_layout Subsubsection +xdata +\begin_inset LatexCommand index +name "xdata (hc08 storage class)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_xdata (hc08 storage class)" + +\end_inset + + +\end_layout + +\begin_layout Standard +The xdata storage class declares a variable that can reside anywhere in + memory. + This is the default if no storage class is specified. + +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +Other SDCC language extensions +\begin_inset LatexCommand index +name "Other SDCC language extensions" + +\end_inset + + +\end_layout + +\begin_layout Subsection +Binary constants +\end_layout + +\begin_layout Standard +SDCC supports the use of binary constants, such as 0b01100010. + This feature is only enabled when the compiler is invoked using --std-sdccxx. +\end_layout + +\begin_layout Standard +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +Absolute Addressing +\begin_inset LatexCommand index +name "Absolute addressing" + +\end_inset + + +\end_layout + +\begin_layout Standard +Data items can be assigned an absolute address with the +\emph on +at +\begin_inset LatexCommand index +name "at" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_at" + +\end_inset + +
+\emph default + keyword, in addition to a storage class, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +xdata +\begin_inset LatexCommand index +name "xdata (mcs51, ds390 storage class)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_xdata (mcs51, ds390 storage class)" + +\end_inset + + at +\begin_inset LatexCommand index +name "at" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_at" + +\end_inset + + 0x7ffe unsigned int chksum; +\end_layout + +\begin_layout Standard +or, better conforming to ISO/IEC 9899 C: +\end_layout + +\begin_layout Verse + +\family typewriter +__xdata __at (0x7ffe) unsigned int chksum; +\end_layout + +\begin_layout Standard +In the above example the variable chksum will be located at 0x7ffe and 0x7fff + of the external ram. + The compiler does +\emph on +not +\emph default + reserve any space for variables declared in this way +\begin_inset Marginal +status collapsed + +\begin_layout Standard + +\series bold +\InsetSpace ~ +! +\end_layout + +\end_inset + + (they are implemented with an equate in the assembler). + Thus it is left to the programmer to make sure there are no overlaps with + other variables that are declared without the absolute address. + The assembler listing file (.lst +\begin_inset LatexCommand index +name ".lst" + +\end_inset + +) and the linker output files (.rst +\begin_inset LatexCommand index +name ".rst" + +\end_inset + +) and (.map +\begin_inset LatexCommand index +name ".map" + +\end_inset + +) are good places to look for such overlaps. +\end_layout + +\begin_layout Standard +If however you provide an initializer +\begin_inset LatexCommand index +name "Variable initialization" + +\end_inset + + actual memory allocation will take place and overlaps will be detected + by the linker. + E.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +__code __at (0x7ff0) char Id[5] = +\begin_inset Quotes sld +\end_inset + +SDCC +\begin_inset Quotes srd +\end_inset + +; +\end_layout + +\begin_layout Standard +In the above example the variable Id will be located from 0x7ff0 to 0x7ff4 + in code memory. +\end_layout + +\begin_layout Standard +In case of memory mapped I/O devices the keyword +\emph on +volatile +\emph default + has to be used to tell the compiler that accesses might not be removed: +\end_layout + +\begin_layout Verse + +\family typewriter +volatile +\begin_inset LatexCommand index +name "volatile" + +\end_inset + + __xdata +\begin_inset LatexCommand index +name "xdata (mcs51, ds390 storage class)" + +\end_inset + + __at +\begin_inset LatexCommand index +name "at" + +\end_inset + + (0x8000) unsigned char PORTA_8255; +\end_layout + +\begin_layout Standard +For some architectures (mcs51) array accesses are more efficient if an (xdata/fa +r) array +\family typewriter +\size footnotesize + +\begin_inset LatexCommand index +name "Aligned array" + +\end_inset + + +\family default +\size default + starts at a block (256 byte) boundary +\begin_inset LatexCommand index +name "block boundary" + +\end_inset + + (section +\begin_inset LatexCommand ref +reference "sub:A-Step-by Assembler Introduction" + +\end_inset + + has an example). +\newline +Absolute addresses can be specified for variables in all + storage classes, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +__bit +\begin_inset LatexCommand index +name "bit" + +\end_inset + + __at +\begin_inset LatexCommand index +name "at" + +\end_inset + + (0x02) bvar; +\end_layout + +\begin_layout Standard +The above example will allocate the variable at offset 0x02 in the bit-addressab +le space. + There is no real advantage to assigning absolute addresses to variables + in this manner, unless you want strict control over all the variables allocated. + One possible use would be to write hardware portable code. + For example, if you have a routine that uses one or more of the microcontroller + I/O pins, and such pins are different for two different hardwares, you + can declare the I/O pins in your routine using: +\end_layout + +\begin_layout Verse + +\family typewriter +extern volatile +\begin_inset LatexCommand index +name "volatile" + +\end_inset + + __bit MOSI;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* master out, slave in */ +\newline +extern volatile __bit MISO;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* master + in, slave out */ +\newline +extern volatile __bit MCLK;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* master clock */ +\newline + +\newline +/* Input and + Output of a byte on a 3-wire serial bus. +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +If needed adapt polarity of clock, + polarity of data and bit order +\newline +\InsetSpace ~ +*/ +\newline +unsigned char spi_io(unsigned char out_byte) + +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +unsigned char i=8; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +do { +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +MOSI = out_byte & 0x80; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +out_byte <<= 1; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +MCLK = + 1; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* _asm nop _endasm; */\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* for slow peripherals */ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +if(MISO) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +out_byte += + 1; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +MCLK = 0; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +} while(--i); +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +return out_byte; +\newline +} +\end_layout + +\begin_layout Standard +Then, someplace in the code for the first hardware you would use +\end_layout + +\begin_layout Verse + +\family typewriter +__bit __at +\begin_inset LatexCommand index +name "at" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_at" + +\end_inset + + (0x80) MOSI;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* I/O port 0, bit 0 */ +\newline +__bit __at (0x81) MISO;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* I/O port 0, + bit 1 */ +\newline +__bit __at (0x82) MCLK;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* I/O port 0, bit 2 */ +\end_layout + +\begin_layout Standard +Similarly, for the second hardware you would use +\end_layout + +\begin_layout Verse + +\family typewriter +__bit __at (0x83) MOSI;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* I/O port 0, bit 3 */ +\newline +__bit __at (0x91) MISO;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* + I/O port 1, bit 1 */ +\newline +__bit +\begin_inset LatexCommand index +name "bit" + +\end_inset + + __at (0x92) MCLK;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* I/O port 1, bit 2 */ +\end_layout + +\begin_layout Standard +and you can use the same hardware dependent routine without changes, as + for example in a library. + This is somehow similar to sbit, but only one absolute address has to be + specified in the whole project. +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +Parameters +\begin_inset LatexCommand index +name "Parameters" + +\end_inset + + +\begin_inset LatexCommand index +name "function parameter" + +\end_inset + + & Local Variables +\begin_inset LatexCommand index +name "local variables" + +\end_inset + + +\begin_inset LatexCommand label +name "sec:Parameters-and-Local-Variables" + +\end_inset + + +\end_layout + +\begin_layout Standard +Automatic (local) variables and parameters to functions can either be placed + on the stack or in data-space. + The default action of the compiler is to place these variables in the internal + RAM (for small model) or external RAM (for medium or large model). + This in fact makes them similar to +\emph on +static +\begin_inset LatexCommand index +name "static" + +\end_inset + + +\emph default + so by default functions are non-reentrant +\begin_inset LatexCommand index +name "reentrant" + +\end_inset + +. + +\newline + +\newline +They can be placed on the stack +\begin_inset LatexCommand index +name "stack" + +\end_inset + + by using the +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-auto +\begin_inset LatexCommand index +name "-\\/-stack-auto" + +\end_inset + + +\emph default + option, by using +\emph on +#pragma\InsetSpace ~ +stackauto +\emph default + +\begin_inset LatexCommand index +name "\\#pragma stackauto" + +\end_inset + + or by using the +\emph on +reentrant +\begin_inset LatexCommand index +name "reentrant" + +\end_inset + + +\emph default + keyword in the function declaration, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +unsigned char foo(char i) __reentrant +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +... + +\newline +} +\end_layout + +\begin_layout Standard +Since stack space on 8051 is limited, the +\emph on +reentrant +\emph default + keyword or the +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-auto +\emph default + option should be used sparingly. + Note that the reentrant keyword just means that the parameters & local + variables will be allocated to the stack, it +\emph on +does not +\emph default + mean that the function is register bank +\begin_inset LatexCommand index +name "register bank (mcs51, ds390)" + +\end_inset + + independent. +\newline + +\newline +Local variables +\begin_inset LatexCommand index +name "local variables" + +\end_inset + + can be assigned storage classes and absolute +\begin_inset LatexCommand index +name "Absolute addressing" + +\end_inset + + addresses, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +unsigned char foo() +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +__xdata unsigned char i; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +__bit bvar; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +__data __at +\begin_inset LatexCommand index +name "at" + +\end_inset + + (0x31) unsigned char j; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +... + +\newline +} +\end_layout + +\begin_layout Standard +In the above example the variable +\emph on +i +\emph default + will be allocated in the external ram, +\emph on +bvar +\emph default + in bit addressable space and +\emph on +j +\emph default + in internal ram. + When compiled with +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-auto +\emph default + or when a function is declared as +\emph on +reentrant +\emph default + this should only be done for static variables. +\end_layout + +\begin_layout Standard +Parameters +\begin_inset LatexCommand index +name "function parameter" + +\end_inset + + however are not allowed any storage class +\begin_inset LatexCommand index +name "Storage class" + +\end_inset + +, (storage classes for parameters will be ignored), their allocation is + governed by the memory model in use, and the reentrancy options. +\end_layout + +\begin_layout Standard +It is however allowed to use bit parameters in reentrant functions and also + non-static local bit variables are supported. + Efficient use is limited to 8 semi-bitregisters in bit space. + They are pushed and popped to stack +\begin_inset LatexCommand index +name "stack" + +\end_inset + + as a single byte just like the normal registers. +\end_layout + +\begin_layout Section +Overlaying +\begin_inset LatexCommand label +name "sub:Overlaying" + +\end_inset + + +\begin_inset LatexCommand index +name "Overlaying" + +\end_inset + + +\end_layout + +\begin_layout Standard +For non-reentrant +\begin_inset LatexCommand index +name "reentrant" + +\end_inset + + functions SDCC will try to reduce internal ram space usage by overlaying + parameters and local variables of a function (if possible). + Parameters and local variables +\begin_inset LatexCommand index +name "local variables" + +\end_inset + + of a function will be allocated to an overlayable segment if the function + has +\emph on +no other function calls and the function is non-reentrant and the memory + model +\begin_inset LatexCommand index +name "Memory model" + +\end_inset + + is small. + +\emph default + If an explicit storage class +\begin_inset LatexCommand index +name "Storage class" + +\end_inset + + is specified for a local variable, it will NOT be overlaid. +\end_layout + +\begin_layout Standard +Note that the compiler (not the linkage editor) makes the decision for overlayin +g the data items. + Functions that are called from an interrupt service routine +\begin_inset Marginal +status collapsed + +\begin_layout Standard + +\series bold +! +\end_layout + +\end_inset + + should be preceded by a #pragma\InsetSpace ~ +nooverlay +\begin_inset LatexCommand index +name "\\#pragma nooverlay" + +\end_inset + + if they are not reentrant. +\end_layout + +\begin_layout Standard +Also note that the compiler does not do any processing of inline assembler + code, so the compiler might incorrectly assign local variables and parameters + of a function into the overlay segment if the inline assembler code calls + other c-functions that might use the overlay. + In that case the #pragma\InsetSpace ~ +nooverlay should be used. +\end_layout + +\begin_layout Standard +Parameters and local variables of functions that contain 16 or 32 bit multiplica +tion +\begin_inset LatexCommand index +name "Multiplication" + +\end_inset + + or division +\begin_inset LatexCommand index +name "Division" + +\end_inset + + will NOT be overlaid since these are implemented using external functions, + e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +#pragma save +\newline +#pragma nooverlay +\begin_inset LatexCommand index +name "\\#pragma nooverlay" + +\end_inset + + +\newline +void set_error(unsigned char errcd) +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +P3 = errcd; +\newline +} +\newline +#pragma restore +\newline + +\newline +void + some_isr () __interrupt +\begin_inset LatexCommand index +name "interrupt" + +\end_inset + + (2) +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +... +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +set_error(10); +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +... + +\newline +} +\end_layout + +\begin_layout Standard +In the above example the parameter +\emph on +errcd +\emph default + for the function +\emph on +set_error +\emph default + would be assigned to the overlayable segment if the #pragma\InsetSpace ~ +nooverlay was + not present, this could cause unpredictable runtime behavior when called + from an interrupt service routine. + The #pragma\InsetSpace ~ +nooverlay ensures that the parameters and local variables for + the function are NOT overlaid. +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +Interrupt Service Routines +\begin_inset LatexCommand label +name "sub:Interrupt-Service-Routines" + +\end_inset + + +\end_layout + +\begin_layout Subsection +General Information +\end_layout + +\begin_layout Standard +SDCC allows +\emph on +i +\emph default +nterrupt +\emph on +s +\emph default +ervice +\emph on +r +\emph default +outines to be coded in C, with some extended keywords. +\end_layout + +\begin_layout Verse + +\family typewriter +void timer_isr (void) __interrupt (1) __using (1) +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +... + +\newline +} +\end_layout + +\begin_layout Standard +The optional number following the +\emph on +interrupt +\begin_inset LatexCommand index +name "interrupt" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_interrupt" + +\end_inset + + +\emph default + keyword is the interrupt number this routine will service. + When present, the compiler will insert a call to this routine in the interrupt + vector table +\begin_inset LatexCommand index +name "interrupt vector table" + +\end_inset + + for the interrupt number specified. + If you have multiple source files in your project, interrupt service routines + can be present in any of them, but a prototype of the isr MUST be present + or included in the file that contains the function +\emph on +main +\emph default +. + The optional (8051 specific) keyword +\emph on +using +\begin_inset LatexCommand index +name "using (mcs51, ds390 register bank)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_using (mcs51, ds390 register bank)" + +\end_inset + + +\emph default + can be used to tell the compiler to use the specified register bank when + generating code for this function. + +\newline +Interrupt service routines open the door for some very interesting bugs: +\end_layout + +\begin_layout Subsubsection +\begin_inset LatexCommand label +name "sub:Common-interrupt-pitfall-volatile" + +\end_inset + +Common interrupt pitfall: variable not declared +\emph on +volatile +\end_layout + +\begin_layout Standard +If an interrupt service routine changes variables which are accessed by + other functions these variables have to be declared +\emph on +volatile +\emph default + +\begin_inset LatexCommand index +name "volatile" + +\end_inset + +. + See +\begin_inset LatexCommand url +target "http://en.wikipedia.org/wiki/Volatile_variable" + +\end_inset + + . +\end_layout + +\begin_layout Subsubsection +\begin_inset LatexCommand label +name "sub:Common-interrupt-pitfall-non-atomic" + +\end_inset + +Common interrupt pitfall: +\emph on +non-atomic access +\end_layout + +\begin_layout Standard +If the access to these variables is not +\emph on +atomic +\begin_inset LatexCommand index +name "atomic" + +\end_inset + + +\emph default + (i.e. + the processor needs more than one instruction for the access and could + be interrupted while accessing the variable) the interrupt must be disabled + during the access to avoid inconsistent data. + +\newline +Access to 16 or 32 bit variables is obviously not atomic on 8 bit CPUs + and should be protected by disabling interrupts. + You're not automatically on the safe side if you use 8 bit variables though. + We need an example here: f.e. + on the 8051 the harmless looking +\begin_inset Quotes srd +\end_inset + + +\family typewriter +flags\InsetSpace ~ +|=\InsetSpace ~ +0x80; +\family default + +\begin_inset Quotes sld +\end_inset + + is not atomic if +\family typewriter +flags +\family default + resides in xdata. + Setting +\begin_inset Quotes srd +\end_inset + + +\family typewriter +flags\InsetSpace ~ +|=\InsetSpace ~ +0x40; +\family default + +\begin_inset Quotes sld +\end_inset + + from within an interrupt routine might get lost if the interrupt occurs + at the wrong time. + +\begin_inset Quotes sld +\end_inset + + +\family typewriter +counter\InsetSpace ~ ++=\InsetSpace ~ +8; +\family default + +\begin_inset Quotes srd +\end_inset + + is not atomic on the 8051 even if +\family typewriter +counter +\family default + is located in data memory. +\newline +Bugs like these are hard to reproduce and can + cause a lot of trouble. + +\end_layout + +\begin_layout Subsubsection +\begin_inset LatexCommand label +name "sub:Common-interrupt-pitfall-stack-overflow" + +\end_inset + +Common interrupt pitfall: +\emph on +stack overflow +\end_layout + +\begin_layout Standard +The return address and the registers used in the interrupt service routine + are saved on the stack +\begin_inset LatexCommand index +name "stack" + +\end_inset + + so there must be sufficient stack space. + If there isn't variables or registers (or even the return address itself) + will be corrupted. + This +\emph on +stack overflow +\emph default + +\begin_inset LatexCommand index +name "stack overflow" + +\end_inset + + is most likely to happen if the interrupt occurs during the +\begin_inset Quotes sld +\end_inset + +deepest +\begin_inset Quotes srd +\end_inset + + subroutine when the stack is already in use for f.e. + many return addresses. +\end_layout + +\begin_layout Subsubsection +\begin_inset LatexCommand label +name "sub:Common-interrupt-pitfall-non-reentrant" + +\end_inset + +Common interrupt pitfall: +\emph on +use of non-reentrant functions +\end_layout + +\begin_layout Standard +A special note here, int (16 bit) and long (32 bit) integer division +\begin_inset LatexCommand index +name "Division" + +\end_inset + +, multiplication +\begin_inset LatexCommand index +name "Multiplication" + +\end_inset + + & modulus +\begin_inset LatexCommand index +name "Modulus" + +\end_inset + + and floating-point +\begin_inset LatexCommand index +name "Floating point support" + +\end_inset + + operations are implemented using external support routines. + If an interrupt service routine needs to do any of these operations then + the support routines (as mentioned in a following section) will have to + be recompiled using the +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-auto +\begin_inset LatexCommand index +name "-\\/-stack-auto" + +\end_inset + + +\emph default + option and the source file will need to be compiled using the +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-int-long-reent +\emph default + +\begin_inset LatexCommand index +name "-\\/-int-long-reent" + +\end_inset + + compiler option. + +\newline +Note, the type promotion +\begin_inset LatexCommand index +name "type promotion" + +\end_inset + + required by ANSI C can cause 16 bit routines to be used +\begin_inset Marginal +status collapsed + +\begin_layout Standard + +\series bold +\InsetSpace ~ +! +\end_layout + +\end_inset + + without the programmer being aware of it. + See f.e. + the cast +\family typewriter +\series bold +(unsigned char)(tail-1) +\family default +\series default + +\series bold +within the if clause in section +\begin_inset LatexCommand ref +reference "sub:A-Step-by Assembler Introduction" + +\end_inset + +. +\end_layout + +\begin_layout Standard +Calling other functions from an interrupt service routine is not recommended, + avoid it if possible. + Note that when some function is called from an interrupt service routine + it should be preceded by a #pragma\InsetSpace ~ +nooverlay +\begin_inset LatexCommand index +name "\\#pragma nooverlay" + +\end_inset + + if it is not reentrant. + Furthermore nonreentrant functions should not be called from the main program + while the interrupt service routine might be active. + They also must not be called from low priority interrupt service routines + while a high priority interrupt service routine might be active. + You could use semaphores or make the function +\emph on +critical +\emph default + if all parameters are passed in registers. +\newline + Also see section +\begin_inset LatexCommand ref +reference "sub:Overlaying" + +\end_inset + +\InsetSpace ~ +about Overlaying and section +\begin_inset LatexCommand ref +reference "sub:Functions-using-private-banks" + +\end_inset + +\InsetSpace ~ +about Functions using private register banks. +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +MCS51/DS390 Interrupt Service Routines +\end_layout + +\begin_layout Standard +Interrupt +\begin_inset LatexCommand index +name "interrupt" + +\end_inset + + numbers and the corresponding address & descriptions for the Standard 8051/8052 + are listed below. + SDCC will automatically adjust the +\begin_inset LatexCommand index +name "interrupt vector table" + +\end_inset + + to the maximum interrupt number specified. +\newline + +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + + +\begin_inset Text + +\begin_layout Standard +Interrupt # +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Description +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Vector Address +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +0 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +External 0 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0x0003 +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +1 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Timer 0 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0x000b +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +2 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +External 1 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0x0013 +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +3 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Timer 1 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0x001b +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +4 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Serial +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0x0023 +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +5 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Timer 2 (8052) +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0x002b +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +... +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +... +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +n +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0x0003 + 8*n +\end_layout + +\end_inset + + + + +\end_inset + + +\newline + +\end_layout + +\begin_layout Standard +If the interrupt service routine is defined without +\emph on +using +\begin_inset LatexCommand index +name "using (mcs51, ds390 register bank)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_using (mcs51, ds390 register bank)" + +\end_inset + + +\emph default + a register bank or with register bank 0 ( +\emph on +using +\emph default + 0), the compiler will save the registers used by itself on the stack upon + entry and restore them at exit, however if such an interrupt service routine + calls another function then the entire register bank will be saved on the + stack. + This scheme may be advantageous for small interrupt service routines which + have low register usage. +\end_layout + +\begin_layout Standard +If the interrupt service routine is defined to be using a specific register + bank then only +\emph on +a, b, dptr +\emph default + & psw are saved and restored, if such an interrupt service routine calls + another function (using another register bank) then the entire register + bank of the called function will be saved on the stack +\begin_inset LatexCommand index +name "stack" + +\end_inset + +. + This scheme is recommended for larger interrupt service routines. +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +HC08 +\begin_inset LatexCommand index +name "HC08" + +\end_inset + + Interrupt Service Routines +\end_layout + +\begin_layout Standard +Since the number of interrupts +\begin_inset LatexCommand index +name "HC08!interrupt" + +\end_inset + + available is chip specific and the interrupt vector table always ends at + the last byte of memory, the interrupt numbers corresponds to the interrupt + vectors in reverse order of address. + For example, interrupt 1 will use the interrupt vector at 0xfffc, interrupt + 2 will use the interrupt vector at 0xfffa, and so on. + However, interrupt 0 (the reset vector at 0xfffe) is not redefinable in + this way; instead see section +\begin_inset LatexCommand ref +reference "sub:Startup-Code" + +\end_inset + + for details on customizing startup. +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +Z80 Interrupt Service Routines +\end_layout + +\begin_layout Standard +The Z80 +\begin_inset LatexCommand index +name "Z80" + +\end_inset + + uses several different methods for determining the correct interrupt +\begin_inset LatexCommand index +name "Z80!interrupt" + +\end_inset + + vector depending on the hardware implementation. + Therefore, SDCC ignores the optional interrupt number and does not attempt + to generate an interrupt vector table. +\end_layout + +\begin_layout Standard +By default, SDCC generates code for a maskable interrupt, which uses a RETI + instruction to return from the interrupt. + To write an interrupt handler for the non-maskable interrupt, which needs + a RETN instruction instead, add the +\emph on +critical +\emph default + keyword: +\end_layout + +\begin_layout Verse + +\family typewriter +void nmi_isr (void) critical interrupt +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +... + +\newline +} +\end_layout + +\begin_layout Standard +However if you need to create a non-interruptable interrupt service routine + you would also require the +\emph on +critical +\emph default + keyword. + To distinguish between this and an nmi_isr you must provide an interrupt + number. +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +Enabling and Disabling Interrupts +\end_layout + +\begin_layout Subsection +Critical Functions and Critical Statements +\end_layout + +\begin_layout Standard +A special keyword may be associated with a block or a function declaring + it as +\emph on +critical +\emph default +. + SDCC will generate code to disable all interrupts +\begin_inset LatexCommand index +name "interrupt" + +\end_inset + + upon entry to a critical function and restore the interrupt enable to the + previous state before returning. + Nesting critical functions will need one additional byte on the stack +\begin_inset LatexCommand index +name "stack" + +\end_inset + + for each call. +\end_layout + +\begin_layout Verse + +\family typewriter +int foo () __critical +\begin_inset LatexCommand index +name "critical" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_critical" + +\end_inset + + +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +... + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +... + +\newline +} +\end_layout + +\begin_layout Standard +The critical attribute maybe used with other attributes like +\emph on +reentrant. +\emph default + +\newline +The keyword +\emph on +critical +\emph default + may also be used to disable interrupts more locally: +\end_layout + +\begin_layout Verse + +\family typewriter +__critical{ i++; } +\end_layout + +\begin_layout Standard +More than one statement could have been included in the block. +\end_layout + +\begin_layout Subsection +Enabling and Disabling Interrupts directly +\end_layout + +\begin_layout Standard +Interrupts +\begin_inset LatexCommand index +name "interrupt" + +\end_inset + + can also be disabled and enabled directly (8051): +\end_layout + +\begin_layout Verse + +\family typewriter +EA = 0;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +or:\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +EA_SAVE = EA; +\end_layout + +\begin_layout Verse + +\family typewriter +...\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +EA = 0; +\end_layout + +\begin_layout Verse + +\family typewriter +EA = 1;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +... +\end_layout + +\begin_layout Verse + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +EA = EA_SAVE; +\end_layout + +\begin_layout Standard +On other architectures which have separate opcodes for enabling and disabling + interrupts you might want to make use of defines with inline assembly +\begin_inset LatexCommand index +name "Assembler routines" + +\end_inset + + (HC08 +\begin_inset LatexCommand index +name "HC08!interrupt" + +\end_inset + +): +\end_layout + +\begin_layout Verse + +\family typewriter +#define CLI _asm +\begin_inset LatexCommand index +name "\\_asm" + +\end_inset + +\InsetSpace ~ +\InsetSpace ~ +cli\InsetSpace ~ +\InsetSpace ~ +_endasm +\begin_inset LatexCommand index +name "\\_endasm" + +\end_inset + +; +\end_layout + +\begin_layout Verse + +\family typewriter +#define SEI _asm\InsetSpace ~ +\InsetSpace ~ +sei\InsetSpace ~ +\InsetSpace ~ +_endasm; +\end_layout + +\begin_layout Verse + +\family typewriter +... +\end_layout + +\begin_layout Standard +Note: it is sometimes sufficient to disable only a specific interrupt source + like f.e. + a timer or serial interrupt by manipulating an +\emph on +interrupt mask +\begin_inset LatexCommand index +name "interrupt mask" + +\end_inset + + +\emph default + register. + +\end_layout + +\begin_layout Standard +Usually the time during which interrupts are disabled should be kept as + short as possible. + This minimizes both +\emph on +interrupt latency +\emph default + +\begin_inset LatexCommand index +name "interrupt latency" + +\end_inset + + (the time between the occurrence of the interrupt and the execution of + the first code in the interrupt routine) and +\emph on +interrupt jitter +\emph default + +\begin_inset LatexCommand index +name "interrupt jitter" + +\end_inset + + (the difference between the shortest and the longest interrupt latency). + These really are something different, f.e. + a serial interrupt has to be served before its buffer overruns so it cares + for the maximum interrupt latency, whereas it does not care about jitter. + On a loudspeaker driven via a digital to analog converter which is fed + by an interrupt a latency of a few milliseconds might be tolerable, whereas + a much smaller jitter will be very audible. +\end_layout + +\begin_layout Standard +You can reenable interrupts within an interrupt routine and on some architecture +s you can make use of two (or more) levels of +\emph on +interrupt priorities +\emph default + +\begin_inset LatexCommand index +name "interrupt priority" + +\end_inset + +. + On some architectures which don't support interrupt priorities these can + be implemented by manipulating the interrupt mask and reenabling interrupts + within the interrupt routine. + Check there is sufficient space on the stack +\begin_inset LatexCommand index +name "stack" + +\end_inset + + and don't add complexity unless you have to. + +\end_layout + +\begin_layout Subsection +Semaphore +\begin_inset LatexCommand index +name "semaphore" + +\end_inset + + locking (mcs51/ds390) +\end_layout + +\begin_layout Standard +Some architectures (mcs51/ds390) have an atomic +\begin_inset LatexCommand index +name "atomic" + +\end_inset + + bit test and clear instruction. + These type of instructions are typically used in preemptive multitasking + systems, where a routine f.e. + claims the use of a data structure ('acquires a lock +\begin_inset LatexCommand index +name "lock" + +\end_inset + + on it'), makes some modifications and then releases the lock when the data + structure is consistent again. + The instruction may also be used if interrupt and non-interrupt code have + to compete for a resource. + With the atomic bit test and clear instruction interrupts +\begin_inset LatexCommand index +name "interrupt" + +\end_inset + + don't have to be disabled for the locking operation. + +\end_layout + +\begin_layout Standard +SDCC generates this instruction if the source follows this pattern: +\end_layout + +\begin_layout Verse + +\family typewriter +volatile +\begin_inset LatexCommand index +name "volatile" + +\end_inset + + bit resource_is_free; +\newline + +\newline +if (resource_is_free) +\newline +\InsetSpace ~ +\InsetSpace ~ +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +resource_is_free=0; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +... + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +resource_is_free=1; +\newline +\InsetSpace ~ +\InsetSpace ~ +} +\end_layout + +\begin_layout Standard +Note, mcs51 and ds390 support only an atomic +\begin_inset LatexCommand index +name "atomic" + +\end_inset + + bit test and +\emph on +clear +\emph default + instruction (as opposed to atomic bit test and +\emph on +set). +\end_layout + +\begin_layout Section +Functions using private register banks +\begin_inset LatexCommand label +name "sub:Functions-using-private-banks" + +\end_inset + + (mcs51/ds390) +\end_layout + +\begin_layout Standard +Some architectures have support for quickly changing register sets. + SDCC supports this feature with the +\emph on +using +\begin_inset LatexCommand index +name "using (mcs51, ds390 register bank)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_using (mcs51, ds390 register bank)" + +\end_inset + + +\emph default + attribute (which tells the compiler to use a register bank +\begin_inset LatexCommand index +name "register bank (mcs51, ds390)" + +\end_inset + + other than the default bank zero). + It should only be applied to +\emph on +interrupt +\begin_inset LatexCommand index +name "interrupt" + +\end_inset + + +\emph default + functions (see footnote below). + This will in most circumstances make the generated ISR code more efficient + since it will not have to save registers on the stack. +\end_layout + +\begin_layout Standard +The +\emph on +using +\emph default + attribute will have no effect on the generated code for a +\emph on +non-interrupt +\emph default + function (but may occasionally be useful anyway +\begin_inset Foot +status open + +\begin_layout Standard +possible exception: if a function is called ONLY from 'interrupt' functions + using a particular bank, it can be declared with the same 'using' attribute + as the calling 'interrupt' functions. + For instance, if you have several ISRs using bank one, and all of them + call memcpy(), it might make sense to create a specialized version of memcpy() + 'using 1', since this would prevent the ISR from having to save bank zero + to the stack on entry and switch to bank zero before calling the function +\end_layout + +\end_inset + +). +\newline + +\emph on +(pending: Note, nowadays the +\emph default + using +\emph on +attribute has an effect on +\emph default + +\emph on +the generated code for a +\emph default + non-interrupt +\emph on +function +\emph default +. +\emph on +) +\end_layout + +\begin_layout Standard +An +\emph on +interrupt +\emph default + function using a non-zero bank will assume that it can trash that register + bank, and will not save it. + Since high-priority interrupts +\begin_inset LatexCommand index +name "interrupts" + +\end_inset + + +\begin_inset LatexCommand index +name "interrupt priority" + +\end_inset + + can interrupt low-priority ones on the 8051 and friends, this means that + if a high-priority ISR +\emph on +using +\emph default + a particular bank occurs while processing a low-priority ISR +\emph on +using +\emph default + the same bank, terrible and bad things can happen. + To prevent this, no single register bank should be +\emph on +used +\emph default + by both a high priority and a low priority ISR. + This is probably most easily done by having all high priority ISRs use + one bank and all low priority ISRs use another. + If you have an ISR which can change priority at runtime, you're on your + own: I suggest using the default bank zero and taking the small performance + hit. +\end_layout + +\begin_layout Standard +It is most efficient if your ISR calls no other functions. + If your ISR must call other functions, it is most efficient if those functions + use the same bank as the ISR (see note 1 below); the next best is if the + called functions use bank zero. + It is very inefficient to call a function using a different, non-zero bank + from an ISR. + +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +Startup Code +\begin_inset LatexCommand label +name "sub:Startup-Code" + +\end_inset + + +\begin_inset LatexCommand index +name "Startup code" + +\end_inset + + +\end_layout + +\begin_layout Subsection +MCS51/DS390 Startup Code +\end_layout + +\begin_layout Standard +The compiler triggers the linker to link certain initialization modules + from the runtime library +\begin_inset LatexCommand index +name "Runtime library" + +\end_inset + + called crt. + Only the necessary ones are linked, for instance crtxstack.asm (GSINIT1, + GSINIT5) is not linked unless the - +\series bold + +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\series default +-xstack option is used. + These modules are highly entangled by the use of special segments/areas, + but a common layout is shown below: +\end_layout + +\begin_layout Verse + +\family typewriter +\series bold +\size footnotesize +(main.asm) +\end_layout + +\begin_layout Verse + +\family typewriter +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.area HOME (CODE) +\newline +__interrupt_vect: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +ljmp __sdcc_gsinit_startup +\end_layout + +\begin_layout Verse + +\family typewriter +\series bold +\size footnotesize +(crtstart.asm) +\end_layout + +\begin_layout Verse + +\family typewriter +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.area GSINIT0 (CODE) +\newline +__sdcc_gsinit_startup:: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov sp,#__start__stack - 1 +\end_layout + +\begin_layout Verse + +\family typewriter +\series bold +\size footnotesize +(crtxstack.asm) +\end_layout + +\begin_layout Verse + +\family typewriter +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.area GSINIT1 (CODE) +\newline +__sdcc_init_xstack:: +\newline +; Need to initialize in GSINIT1 in + case the user's __sdcc_external_startup uses the xstack. +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov __XPAGE,#(__start__x +stack >> 8) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov _spx,#__start__xstack +\end_layout + +\begin_layout Verse + +\family typewriter +\series bold +\size footnotesize +(crtstart.asm) +\end_layout + +\begin_layout Verse + +\family typewriter +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.area GSINIT2 (CODE) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +lcall __sdcc_external_startup +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov a,dpl +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +jz __sdcc_init_data +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +ljmp + __sdcc_program_startup +\newline +__sdcc_init_data: +\end_layout + +\begin_layout Verse + +\family typewriter +\series bold +\size footnotesize +(crtxinit.asm) +\end_layout + +\begin_layout Verse + +\family typewriter +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.area GSINIT3 (CODE) +\newline +__mcs51_genXINIT:: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov r1,#l_XINIT +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov a,r1 +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +orl a,#(l_XINIT + >> 8) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +jz 00003$ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov r2,#((l_XINIT+255) >> 8) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov dptr,#s_XINIT +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov r0,#s_XISEG +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov + __XPAGE,#(s_XISEG >> 8) +\newline +00001$:\InsetSpace ~ +clr a +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +movc a,@a+dptr +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +movx @r0,a +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +inc dptr +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +inc + r0 +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +cjne r0,#0,00002$ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +inc __XPAGE +\newline +00002$:\InsetSpace ~ +djnz r1,00001$ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +djnz r2,00001$ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov __XPAGE,#0 +xFF +\newline +00003$: +\end_layout + +\begin_layout Verse + +\family typewriter +\series bold +\size footnotesize +(crtclear.asm) +\end_layout + +\begin_layout Verse + +\family typewriter +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.area GSINIT4 (CODE) +\newline +__mcs51_genRAMCLEAR:: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +clr a +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov r0,#(l_IRAM-1) +\newline +00004$:\InsetSpace ~ +mov + @r0,a +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +djnz r0,00004$ +\newline +; _mcs51_genRAMCLEAR() end +\end_layout + +\begin_layout Verse + +\family typewriter +\series bold +\size footnotesize +(crtxclear.asm) +\end_layout + +\begin_layout Verse + +\family typewriter +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.area GSINIT4 (CODE) +\newline +__mcs51_genXRAMCLEAR:: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov r0,#l_PSEG +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov a,r0 +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +orl a,#(l_PSEG + >> 8) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +jz 00006$ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov r1,#s_PSEG +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov __XPAGE,#(s_PSEG >> 8) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +clr a +\newline +00005$:\InsetSpace ~ +movx + @r1,a +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +inc r1 +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +djnz r0,00005$ +\newline +00006$: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov r0,#l_XSEG +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov a,r0 +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +orl a,#(l_XSEG >> + 8) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +jz 00008$ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov r1,#((l_XSEG + 255) >> 8) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov dptr,#s_XSEG +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +clr a +\newline +00007$:\InsetSpace ~ +movx + @dptr,a +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +inc dptr +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +djnz r0,00007$ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +djnz r1,00007$ +\newline +00008$: +\end_layout + +\begin_layout Verse + +\family typewriter +\series bold +\size footnotesize +(crtxstack.asm) +\end_layout + +\begin_layout Verse + +\family typewriter +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.area GSINIT5 (CODE) +\newline +; Need to initialize in GSINIT5 because __mcs51_genXINIT + modifies __XPAGE +\newline +; and __mcs51_genRAMCLEAR modifies _spx. +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov __XPAGE,#(__start__x +stack >> 8) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov _spx,#__start__xstack +\end_layout + +\begin_layout Verse + +\family typewriter +\series bold +\size footnotesize +(application modules) +\end_layout + +\begin_layout Verse + +\family typewriter +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.area GSINIT (CODE) +\end_layout + +\begin_layout Verse + +\family typewriter +\series bold +\size footnotesize +(main.asm) +\end_layout + +\begin_layout Verse + +\family typewriter +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.area GSFINAL (CODE) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +ljmp __sdcc_program_startup +\newline +;--------------------------------- +----------------------- +\newline +; Home +\newline +;-------------------------------------------------- +------ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.area HOME (CODE) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.area CSEG (CODE) +\newline +__sdcc_program_startup: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +lcall _main +\newline +; + return from main will lock up +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sjmp . +\end_layout + +\begin_layout Standard +One of these modules (crtstart.asm) contains a call to the C routine +\emph on +_sdcc_external_startup() +\begin_inset LatexCommand index +name "\\_sdcc\\_external\\_startup()" + +\end_inset + + +\emph default + at the start of the CODE area. + This routine is also in the runtime library +\begin_inset LatexCommand index +name "Runtime library" + +\end_inset + + and returns 0 by default. + If this routine returns a non-zero value, the static & global variable + initialization will be skipped and the function main will be invoked. + Otherwise static & global variables will be initialized before the function + main is invoked. + You could add an +\emph on +_sdcc_external_startup() +\emph default + routine to your program to override the default if you need to setup hardware + or perform some other critical operation prior to static & global variable + initialization +\begin_inset LatexCommand index +name "Variable initialization" + +\end_inset + +. + On some mcs51 variants xdata +\begin_inset LatexCommand index +name "xdata (mcs51, ds390 storage class)" + +\end_inset + + memory has to be explicitly enabled before it can be accessed or if the + watchdog +\begin_inset LatexCommand index +name "watchdog" + +\end_inset + + needs to be disabled, this is the place to do it. + The startup code clears all internal data memory, 256 bytes by default, + but from 0 to n-1 if +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-iram-size +\begin_inset LatexCommand index +name "-\\/-iram-size " + +\end_inset + +n +\emph default + is used. + (recommended for Chipcon CC1010). +\end_layout + +\begin_layout Standard +See also the compiler options +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-no-xinit +\emph default +- +\emph on +opt +\emph default + +\begin_inset LatexCommand index +name "-\\/-no-xinit-opt" + +\end_inset + +, +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-main-return +\emph default + +\begin_inset LatexCommand index +name "-\\/-main-return" + +\end_inset + + and section +\begin_inset LatexCommand ref +reference "sub:MCS51-variants" + +\end_inset + + about MCS51-variants. +\newline + +\end_layout + +\begin_layout Standard +While these initialization modules are meant as generic startup code there + might be the need for customization. + Let's assume the return value of +\emph on +_sdcc_external_startup() +\emph default + in +\emph on +crtstart.asm +\emph default + should not be checked (or +\emph on +_sdcc_external_startup() +\emph default + should not be called at all). + The recommended way would be to copy +\emph on +crtstart.asm +\emph default + (f.e. + from +\begin_inset LatexCommand url +target "http://sdcc.svn.sourceforge.net/viewvc/*checkout*/sdcc/trunk/sdcc/device/lib/mcs51/crtstart.asm" + +\end_inset + +) into the source directory, adapt it there, then assemble it with +\emph on +asx8051 -plosgff +\begin_inset Foot +status open + +\begin_layout Standard +\begin_inset Quotes sld +\end_inset + +-plosgff +\begin_inset Quotes srd +\end_inset + + are the assembler options used in +\begin_inset LatexCommand url +target "http://sdcc.svn.sourceforge.net/viewvc/sdcc/trunk/sdcc/device/lib/mcs51/Makefile.in?view=markup " + +\end_inset + + +\end_layout + +\end_inset + + crtstart.asm +\emph default + and when linking your project explicitly specify +\emph on +crtstart.rel +\emph default +. + As a bonus a listing of the relocated object file +\emph on +crtstart.rst +\emph default + is generated. +\end_layout + +\begin_layout Standard +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +HC08 Startup Code +\end_layout + +\begin_layout Standard +The HC08 +\begin_inset LatexCommand index +name "HC08" + +\end_inset + + startup code follows the same scheme as the MCS51 startup code. +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Subsection +Z80 Startup Code +\end_layout + +\begin_layout Standard +On the Z80 +\begin_inset LatexCommand index +name "Z80" + +\end_inset + + the startup code is inserted by linking with crt0.o which is generated from + sdcc/device/lib/z80/crt0.s. + If you need a different startup code you can use the compiler option +\emph on +- +\series bold +\emph default + +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\series default +\emph on +-no-std-crt0 +\emph default + +\begin_inset LatexCommand index +name "-\\/-no-std-crt0" + +\end_inset + + and provide your own crt0.o. + +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +Inline Assembler Code +\begin_inset LatexCommand index +name "Assembler routines" + +\end_inset + + +\end_layout + +\begin_layout Subsection +A Step by Step Introduction +\begin_inset LatexCommand label +name "sub:A-Step-by Assembler Introduction" + +\end_inset + + +\end_layout + +\begin_layout Standard +Starting from a small snippet of c-code this example shows for the MCS51 + how to use inline assembly, access variables, a function parameter and + an array in xdata memory. + The example uses an MCS51 here but is easily adapted for other architectures. + This is a buffer routine which should be optimized: +\end_layout + +\begin_layout Verse + +\family typewriter +\size footnotesize +unsigned char __far +\begin_inset LatexCommand index +name "far (storage class)" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_far (storage class)" + +\end_inset + + __at +\begin_inset LatexCommand index +name "at" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_at" + +\end_inset + +(0x7f00) buf[0x100]; +\begin_inset LatexCommand index +name "Aligned array" + +\end_inset + + +\newline +unsigned char head, tail;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* if interrupts +\begin_inset LatexCommand index +name "interrupt" + +\end_inset + + are involved see +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +section +\begin_inset LatexCommand ref +reference "sub:Common-interrupt-pitfall-volatile" + +\end_inset + + about +\family default + +\family typewriter +\series bold +volatile +\family default +\series default + +\family typewriter +*/ +\newline + +\newline +void to_buffer( unsigned char c ) +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +if( head != (unsigned char)(tail-1) + )\InsetSpace ~ +/* cast +\family default + +\family typewriter +\series bold +needed +\family default +\series default + +\family typewriter +to avoid promotion +\begin_inset LatexCommand index +name "promotion to signed int" + +\end_inset + + +\begin_inset LatexCommand index +name "type promotion" + +\end_inset + + to integer */ +\begin_inset Marginal +status collapsed + +\begin_layout Standard + +\series bold +\InsetSpace ~ +! +\end_layout + +\end_inset + + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +buf[ head++ ] = c;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* access to a 256 byte aligned array */ +\newline +} +\end_layout + +\begin_layout Standard +If the code snippet (assume it is saved in buffer.c) is compiled with SDCC + then a corresponding buffer.asm file is generated. + We define a new function +\family typewriter +to_buffer_asm() +\family default + in file buffer.c in which we cut and paste the generated code, removing + unwanted comments and some ':'. + Then add +\begin_inset Quotes sld +\end_inset + + +\series bold +_asm +\series default + +\begin_inset Quotes srd +\end_inset + + and +\begin_inset Quotes sld +\end_inset + + +\series bold +_endasm; +\series default + +\begin_inset Quotes srd +\end_inset + + +\begin_inset Foot +status open + +\begin_layout Standard +Note, that the single underscore form (_asm and _endasm) are not C99-compatible, + and for C-99 compatibility, the double-underscore form (__asm and __endasm) + has to be used. + The latter is also used in the library functions. +\end_layout + +\end_inset + + to the beginning and the end of the function body: +\end_layout + +\begin_layout Verse + +\family typewriter +\size footnotesize +/* With a cut and paste from the .asm file, we have something to start with. +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +The + function is not yet OK! (registers aren't saved) */ +\newline +void to_buffer_asm( + unsigned char c ) +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +_asm +\begin_inset LatexCommand index +name "\\_asm" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_asm" + +\end_inset + + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +r2,dpl +\newline +;buffer.c if( head != (unsigned char)(tail-1) ) \InsetSpace ~ +/* cast +\family default + +\family typewriter +\series bold +needed +\family default +\series default + +\family typewriter +to avoid promotion +\begin_inset LatexCommand index +name "promotion to signed int" + +\end_inset + + +\begin_inset LatexCommand index +name "type promotion" + +\end_inset + + to integer */ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +a,_tail +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +dec\InsetSpace ~ +\InsetSpace ~ +a +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +r3,a +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +a,_head +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +cjne a,ar3,00106$ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +ret +\newline +00106$: + +\newline +;buffer.c buf[ head++ ] = c; /* access to a 256 byte aligned array */ +\begin_inset LatexCommand index +name "Aligned array" + +\end_inset + + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +r3,_head +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +inc\InsetSpace ~ +\InsetSpace ~ +_head +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +dpl,r3 +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +dph,#(_buf >> 8) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +a,r2 +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +movx @dptr,a + +\newline +00103$: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +ret +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +_endasm +\begin_inset LatexCommand index +name "\\_endasm" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_endasm" + +\end_inset + +; +\newline +} +\end_layout + +\begin_layout Standard +The new file buffer.c should compile with only one warning about the unreferenced + function argument 'c'. + Now we hand-optimize the assembly code and insert an #define USE_ASSEMBLY + (1) and finally have: +\end_layout + +\begin_layout Verse + +\family typewriter +\size footnotesize +unsigned char __far __at(0x7f00) buf[0x100]; +\newline +unsigned char head, tail; +\newline +#define + USE_ASSEMBLY (1) +\newline + +\newline +#if !USE_ASSEMBLY +\newline + +\newline +void to_buffer( unsigned char c ) +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +if( + head != (unsigned char)(tail-1) ) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +buf[ head++ ] = c; +\newline +} +\newline + +\newline +#else +\newline + +\newline +void to_buffer( + unsigned char c ) +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +c; // to avoid warning: unreferenced function argument +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +_asm +\begin_inset LatexCommand index +name "\\_asm" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_asm" + +\end_inset + + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +; save used registers here. + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +; If we were still using r2,r3 we would have to push them here. + +\newline +; if( head != (unsigned char)(tail-1) ) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ + a,_tail +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +dec\InsetSpace ~ + a +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +xrl\InsetSpace ~ + a,_head +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +; we + could do an ANL a,#0x0f here to use a smaller buffer (see below) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +jz\InsetSpace ~ +\InsetSpace ~ + t_b_end$ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +; +\newline +; + buf[ head++ ] = c; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ + a,dpl \InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +; dpl holds lower byte of function argument +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ + + dpl,_head \InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +; buf is 0x100 byte aligned so head can be used directly +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ + dph,#(_bu +f>>8) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +movx @dptr,a +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +inc \InsetSpace ~ +_head +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +; we could do an ANL _head,#0x0f here to use a + smaller buffer (see above) +\newline +t_b_end$: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +; restore used registers here +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +_endasm +\begin_inset LatexCommand index +name "\\_endasm" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_endasm" + +\end_inset + +; +\newline +} +\newline +#endif +\end_layout + +\begin_layout Standard +The inline assembler code can contain any valid code understood by the assembler +, this includes any assembler directives and comment lines. + The assembler does not like some characters like ':' or ''' in comments. + You'll find an 100+ pages assembler manual in sdcc/as/doc/asxhtm.html +\begin_inset LatexCommand index +name "asXXXX (as-gbz80, as-hc08, asx8051, as-z80)" + +\end_inset + + +\begin_inset LatexCommand index +name "Assembler documentation" + +\end_inset + + or online at +\begin_inset LatexCommand url +target "http://sdcc.svn.sourceforge.net/viewvc/*checkout*/sdcc/trunk/sdcc/as/doc/asxhtm.html" + +\end_inset + +\InsetSpace ~ +. +\end_layout + +\begin_layout Standard +The compiler does not do any validation of the code within the +\family typewriter +_asm +\begin_inset LatexCommand index +name "\\_asm" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_asm" + +\end_inset + + ... + _endasm +\size footnotesize + +\begin_inset LatexCommand index +name "\\_endasm" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_endasm" + +\end_inset + + +\size default +; +\family default + keyword pair. + Specifically it will not know which registers are used and thus register + pushing/popping +\begin_inset LatexCommand index +name "push/pop" + +\end_inset + + has to be done manually. + +\end_layout + +\begin_layout Standard +It is recommended that each assembly instruction (including labels) be placed + in a separate line (as the example shows). + When the - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +- +\emph on +peep-asm +\begin_inset LatexCommand index +name "-\\/-peep-asm" + +\end_inset + + +\emph default + command line option is used, the inline assembler code will be passed through + the peephole optimizer +\begin_inset LatexCommand index +name "Peephole optimizer" + +\end_inset + +. + There are only a few (if any) cases where this option makes sense, it might + cause some unexpected changes in the inline assembler code. + Please go through the peephole optimizer rules defined in file +\emph on +SDCCpeeph.def +\emph default + before using this option. +\end_layout + +\begin_layout Subsection +Naked Functions +\begin_inset LatexCommand label +name "sub:Naked-Functions" + +\end_inset + + +\begin_inset LatexCommand index +name "Naked functions" + +\end_inset + + +\end_layout + +\begin_layout Standard +A special keyword may be associated with a function declaring it as +\emph on +_naked +\begin_inset LatexCommand index +name "\\_naked" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_naked" + +\end_inset + +. + +\emph default + The +\emph on +_naked +\emph default + function modifier attribute prevents the compiler from generating prologue +\begin_inset LatexCommand index +name "function prologue" + +\end_inset + + and epilogue +\begin_inset LatexCommand index +name "function epilogue" + +\end_inset + + code for that function. + This means that the user is entirely responsible for such things as saving + any registers that may need to be preserved, selecting the proper register + bank, generating the +\emph on +return +\emph default + instruction at the end, etc. + Practically, this means that the contents of the function must be written + in inline assembler. + This is particularly useful for interrupt functions, which can have a large + (and often unnecessary) prologue/epilogue. + For example, compare the code generated by these two functions: +\end_layout + +\begin_layout Verse + +\family typewriter +volatile +\begin_inset LatexCommand index +name "volatile" + +\end_inset + + data unsigned char counter; +\newline + +\newline +void simpleInterrupt(void) __interrupt +\begin_inset LatexCommand index +name "interrupt" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_interrupt" + +\end_inset + + (1) +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +counter++; +\newline +} +\newline + +\newline +void nakedInterrupt(void) __interrupt (2) __naked +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +_asm +\begin_inset LatexCommand index +name "\\_asm" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_asm" + +\end_inset + + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +inc\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +_counter ; does not change flags, no need to save psw +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +reti\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +; MUST explicitly + include ret or reti in _naked function. +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +_endasm +\begin_inset LatexCommand index +name "\\_endasm" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_endasm" + +\end_inset + +; +\newline +} +\end_layout + +\begin_layout Standard +For an 8051 target, the generated simpleInterrupt looks like: +\end_layout + +\begin_layout Verse + +\family typewriter +Note, this is an +\family default + +\family typewriter +\emph on +outdated +\family default +\emph default + +\family typewriter +example, recent versions of SDCC generate +\newline +the +\family default + +\family typewriter +\emph on +same +\family default +\emph default + +\family typewriter +code for simpleInterrupt() and nakedInterrupt()! +\newline + +\newline +_simpleInterrupt: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +push\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +acc +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +push\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +b +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +pus +h\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +dpl +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +push\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +dph +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +push\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +psw +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +psw,#0x00 +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +inc\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +_counter +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +pop\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +psw +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +pop\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +dph +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +pop\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +dpl +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +pop\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +b +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +pop\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +acc +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +reti +\end_layout + +\begin_layout Standard +whereas nakedInterrupt looks like: +\end_layout + +\begin_layout Verse + +\family typewriter +_nakedInterrupt: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +inc\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +_counter ; does not change flags, no need to save psw +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +reti\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +; + MUST explicitly include ret or reti in _naked function +\end_layout + +\begin_layout Standard +The related directive #pragma exclude +\begin_inset LatexCommand index +name "\\#pragma exclude" + +\end_inset + + allows a more fine grained control over pushing & popping +\begin_inset LatexCommand index +name "push/pop" + +\end_inset + + the registers. +\end_layout + +\begin_layout Standard +While there is nothing preventing you from writing C code inside a +\family typewriter +_naked +\family default + function, there are many ways to shoot yourself in the foot doing this, + and it is recommended that you stick to inline assembler. +\end_layout + +\begin_layout Subsection +Use of Labels within Inline Assembler +\end_layout + +\begin_layout Standard +SDCC allows the use of in-line assembler with a few restrictions regarding + labels. + All labels defined within inline assembler code have to be of the form + +\emph on +nnnnn$ +\emph default + where nnnnn is a number less than 100 (which implies a limit of utmost + 100 inline assembler labels +\emph on +per function +\emph default +\noun on +) +\noun default +. +\begin_inset Foot +status open + +\begin_layout Standard +This is a slightly more stringent rule than absolutely necessary, but stays + always on the safe side. + Labels in the form of nnnnn$ are local labels in the assembler, locality + of which is confined within two labels of the standard form. + The compiler uses the same form for labels within a function (but starting + from nnnnn=00100); and places always a standard label at the beginning + of a function, thus limiting the locality of labels within the scope of + the function. + So, if the inline assembler part would be embedded into C-code, an improperly + placed non-local label in the assembler would break up the reference space + for labels created by the compiler for the C-code, leading to an assembling + error. +\end_layout + +\begin_layout Standard +The numeric part of local labels does not need to have 5 digits (although + this is the form of labels output by the compiler), any valid integer will + do. + Please refer to the assemblers documentation for further details. +\end_layout + +\end_inset + + +\end_layout + +\begin_layout Verse + +\family typewriter +_asm +\begin_inset LatexCommand index +name "\\_asm" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_asm" + +\end_inset + + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +b,#10 +\newline +00001$: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +djnz\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +b,00001$ +\newline +_endasm +\begin_inset LatexCommand index +name "\\_endasm" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_endasm" + +\end_inset + + ; +\end_layout + +\begin_layout Standard +Inline assembler code cannot reference any C-labels, however it can reference + labels +\begin_inset LatexCommand index +name "Labels" + +\end_inset + + defined by the inline assembler, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +foo() { +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* some c code */ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +_asm +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +; some assembler code +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +ljmp 0003$ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +_endasm; + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* some more c code */ +\newline +clabel:\InsetSpace ~ +\InsetSpace ~ +/* inline assembler cannot reference this + label */ +\begin_inset Foot +status open + +\begin_layout Standard +Here, the C-label +\family typewriter +clabel +\family default + is translated by the compiler into a local label, so the locality of labels + within the function is not broken. +\end_layout + +\end_inset + + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +_asm +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +0003$: ;label (can be referenced by inline assembler only) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +_endasm +\begin_inset LatexCommand index +name "\\_endasm" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_endasm" + +\end_inset + + ; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* some more c code */ +\newline +} +\end_layout + +\begin_layout Standard +In other words inline assembly code can access labels defined in inline + assembly within the scope of the function. + The same goes the other way, i.e. + labels defines in inline assembly can not be accessed by C statements. +\end_layout + +\begin_layout Section +Interfacing with Assembler Code +\begin_inset LatexCommand index +name "Assembler routines" + +\end_inset + + +\end_layout + +\begin_layout Subsection +Global Registers used for Parameter Passing +\begin_inset LatexCommand index +name "Parameter passing" + +\end_inset + + +\end_layout + +\begin_layout Standard +The compiler always uses the global registers +\emph on +DPL, DPH +\begin_inset LatexCommand index +name "DPTR, DPH, DPL" + +\end_inset + + +\begin_inset LatexCommand index +name "DPTR" + +\end_inset + +, B +\begin_inset LatexCommand index +name "B (mcs51, ds390 register)" + +\end_inset + + +\emph default + and +\emph on +ACC +\begin_inset LatexCommand index +name "ACC (mcs51, ds390 register)" + +\end_inset + + +\emph default + to pass the first (non-bit) parameter to a function, and also to pass the + return value +\begin_inset LatexCommand index +name "return value" + +\end_inset + +of function; according to the following scheme: one byte return value in + +\emph on +DPL +\emph default +, two byte value in +\emph on +DPL +\emph default + (LSB) and +\emph on +DPH +\emph default + (MSB). + three byte values (generic pointers) in +\emph on +DPH +\emph default +, +\emph on +DPL +\emph default + and +\emph on +B +\emph default +, and four byte values in +\emph on +DPH +\emph default +, +\emph on +DPL +\emph default +, +\emph on +B +\emph default + and +\emph on +ACC +\emph default +. + Generic pointers +\begin_inset LatexCommand index +name "generic pointer" + +\end_inset + + contain type of accessed memory in +\emph on +B +\emph default +: +\series bold +0x00 +\series default + -- xdata/far, +\series bold +0x40 +\series default + -- idata/near -- , +\series bold +0x60 +\series default + -- pdata, +\series bold +0x80 +\series default + -- code +\begin_inset Note Note +status collapsed + +\begin_layout Standard +This might not be the case of certain memory models (medium???) +\end_layout + +\end_inset + +. +\end_layout + +\begin_layout Standard +The second parameter onwards is either allocated on the stack (for reentrant + routines or if - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-auto is used) or in data/xdata memory (depending on the memory model). +\end_layout + +\begin_layout Standard +Bit parameters are passed in a virtual register called 'bits' in bit-addressable + space for reentrant functions or allocated directly in bit memory otherwise. +\end_layout + +\begin_layout Standard +Functions (with two or more parameters or bit parameters) that are called + through function pointers +\begin_inset LatexCommand index +name "function pointers" + +\end_inset + + must therefor be reentrant so the compiler knows how to pass the parameters. +\end_layout + +\begin_layout Subsection +Registers usage +\end_layout + +\begin_layout Standard +Unless the called function is declared as +\family typewriter +_naked +\family default + +\begin_inset LatexCommand index +name "naked" + +\end_inset + +, or the - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-callee-saves +\begin_inset LatexCommand index +name "-\\/-callee-saves" + +\end_inset + +/- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-all-callee-saves command line option or the corresponding callee_saves + pragma are used, the caller will save the registers ( +\emph on +R0-R7 +\emph default +) around the call, so the called function can destroy they content freely. +\end_layout + +\begin_layout Standard +If the called function is not declared as +\family typewriter +_naked +\family default +, the caller will swap register banks around the call, if caller and callee + use different register banks (having them defined by the +\family typewriter +_using +\family default + modifier). + +\end_layout + +\begin_layout Standard +The called function can also use +\emph on +DPL +\emph default +, +\emph on +DPH +\emph default +, +\emph on +B +\emph default + and +\emph on +ACC +\emph default + observing that they are used for parameter/return value passing. +\end_layout + +\begin_layout Subsection +Assembler Routine (non-reentrant) +\end_layout + +\begin_layout Standard +In the following example +\begin_inset LatexCommand index +name "reentrant" + +\end_inset + + +\begin_inset LatexCommand index +name "Assembler routines (non-reentrant)" + +\end_inset + + the function c_func calls an assembler routine asm_func, which takes two + parameters +\begin_inset LatexCommand index +name "function parameter" + +\end_inset + +. +\end_layout + +\begin_layout Verse + +\family typewriter +extern int asm_func(unsigned char, unsigned char); +\newline + +\newline +int c_func (unsigned char + i, unsigned char j) +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +return asm_func(i,j); +\newline +} +\newline + +\newline +int main() +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +return c_func(10,9); +\newline +} +\end_layout + +\begin_layout Standard +The corresponding assembler function is: +\end_layout + +\begin_layout Verse + +\family typewriter +.globl _asm_func_PARM_2 +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.globl _asm_func +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.area OSEG +\newline +_asm_func_PARM_2: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.ds + 1 +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.area CSEG +\newline +_asm_func: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +a,dpl +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +add\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +a,_asm_func_PARM_2 +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +dpl,a +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +dph +\begin_inset LatexCommand index +name "DPTR, DPH, DPL" + +\end_inset + +,#0x00 +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +ret +\end_layout + +\begin_layout Standard +The parameter naming convention is __PARM_, where n is + the parameter number starting from 1, and counting from the left. + The first parameter is passed in +\emph on +DPH +\emph default +, +\emph on +DPL +\emph default +, +\emph on +B +\emph default + and +\emph on +ACC +\emph default + according to the description above. + The variable name for the second parameter will be __PARM_2. +\newline + +\newline +Assem +ble the assembler routine with the following command: +\newline + +\newline + +\family sans +\series bold +asx8051 -losg asmfunc.asm +\newline + +\newline + +\family default +\series default +Then compile and link the assembler routine to the C source file with the + following command: +\newline + +\newline + +\family sans +\series bold +sdcc cfunc.c asmfunc.rel +\end_layout + +\begin_layout Subsection +Assembler Routine (reentrant) +\end_layout + +\begin_layout Standard +In this case +\begin_inset LatexCommand index +name "reentrant" + +\end_inset + + +\begin_inset LatexCommand index +name "Assembler routines (reentrant)" + +\end_inset + + the second parameter +\begin_inset LatexCommand index +name "function parameter" + +\end_inset + + onwards will be passed on the stack, the parameters are pushed from right + to left i.e. + before the call the second leftmost parameter will be on the top of the + stack (the leftmost parameter is passed in registers). + Here is an example: +\end_layout + +\begin_layout Verse + +\family typewriter +extern int asm_func(unsigned char, unsigned char, unsigned char) reentrant; +\newline + +\newline +int + c_func (unsigned char i, unsigned char j, unsigned char k) reentrant +\newline +{ + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +return asm_func(i,j,k); +\newline +} +\newline + +\newline +int main() +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +return c_func(10,9,8); +\newline +} +\end_layout + +\begin_layout Standard +The corresponding (unoptimized) assembler routine is: +\end_layout + +\begin_layout Verse + +\family typewriter +.globl _asm_func +\newline +_asm_func: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +push\InsetSpace ~ +_bp +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +_bp,sp\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +;stack contains: _bp, return + address, second parameter, third parameter +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +r2,dpl +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +a,_bp +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +add\InsetSpace ~ +\InsetSpace ~ +a,#0xfd\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +;calculate + pointer to the second parameter +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +r0,a +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +a,_bp +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +add\InsetSpace ~ +\InsetSpace ~ +a,#0xfc\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +;calculate pointer + to the rightmost parameter +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +r1,a +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +a,@r0 +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +add\InsetSpace ~ +\InsetSpace ~ +a,@r1 +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +add\InsetSpace ~ +\InsetSpace ~ +a,r2\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +;calculate the + result (= sum of all three parameters) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +dpl,a\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +;return value goes into dptr + (cast into int) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +dph,#0x00 +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov\InsetSpace ~ +\InsetSpace ~ +sp,_bp +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +pop\InsetSpace ~ +\InsetSpace ~ +_bp +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +ret +\end_layout + +\begin_layout Standard +The compiling and linking procedure remains the same, however note the extra + entry & exit linkage required for the assembler code, _bp is the stack + frame pointer and is used to compute the offset into the stack for parameters + and local variables. +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +int (16 bit) +\begin_inset LatexCommand index +name "int (16 bit)" + +\end_inset + + and long (32 bit) +\begin_inset LatexCommand index +name "long (32 bit)" + +\end_inset + + Support +\end_layout + +\begin_layout Standard +For signed & unsigned int (16 bit) and long (32 bit) variables, division, + multiplication and modulus operations are implemented by support routines. + These support routines are all developed in ANSI-C to facilitate porting + to other MCUs, although some model specific assembler optimizations are + used. + The following files contain the described routines, all of them can be + found in /share/sdcc/lib. +\newline + +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Function +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Description +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +_mulint.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +16 bit multiplication +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +_divsint.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + signed 16 bit division (calls _divuint) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +_divuint.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + unsigned 16 bit division +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +_modsint.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +signed 16 bit modulus (calls _moduint) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +_moduint.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +unsigned 16 bit modulus +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +_mullong.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +32 bit multiplication +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +_divslong.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + signed 32 division (calls _divulong) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +_divulong.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +unsigned 32 division +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +_modslong.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + signed 32 bit modulus (calls _modulong) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +_modulong.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +unsigned 32 bit modulus +\end_layout + +\end_inset + + + + +\end_inset + + +\newline + +\end_layout + +\begin_layout Standard +Since they are compiled as +\emph on +non-reentrant +\emph default + +\begin_inset LatexCommand index +name "reentrant" + +\end_inset + +, interrupt +\begin_inset LatexCommand index +name "interrupt" + +\end_inset + + service routines should not do any of the above operations. + If this is unavoidable then the above routines will need to be compiled + with the +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-auto +\begin_inset LatexCommand index +name "-\\/-stack-auto" + +\end_inset + + +\emph default + option, after which the source program will have to be compiled with +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-int-long-reent +\begin_inset LatexCommand index +name "-\\/-int-long-reent" + +\end_inset + + +\emph default + option. + Notice that you don't have to call these routines directly. + The compiler will use them automatically every time an integer operation + is required. +\end_layout + +\begin_layout Section +Floating Point Support +\begin_inset LatexCommand index +name "Floating point support" + +\end_inset + + +\end_layout + +\begin_layout Standard +SDCC supports IEEE (single precision 4 bytes) floating point numbers. + The floating point support routines are derived from gcc's floatlib.c and + consist of the following routines: +\newline + +\end_layout + +\begin_layout Standard +\align center + +\size footnotesize +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +Function +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Description +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +_fsadd.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +add floating point numbers +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +_fssub.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +subtract floating point numbers +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +_fsdiv.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +divide floating point numbers +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +_fsmul.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +multiply floating point numbers +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +_fs2uchar.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +convert floating point to unsigned char +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +_fs2char.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +convert floating point to signed char +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +_fs2uint.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +convert floating point to unsigned int +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +_fs2int.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +convert floating point to signed int +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +_fs2ulong. +\family default +\series default +\shape default +\size default +\emph default +\bar default +\noun default +c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +convert floating point to unsigned long +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +_fs2long.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +convert floating point to signed long +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +_uchar2fs.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +convert unsigned char to floating point +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +_char2fs.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +convert char to floating point number +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +_uint2fs.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +convert unsigned int to floating point +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +_int2fs.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +convert int to floating point numbers +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +_ulong2fs.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +convert unsigned long to floating point number +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +_long2fs.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +convert long to floating point number +\end_layout + +\end_inset + + + + +\end_inset + + +\newline + +\end_layout + +\begin_layout Standard +These support routines are developed in ANSI-C so there is room for space + and speed improvement +\begin_inset Foot +status open + +\begin_layout Standard +These floating point routines ( +\emph on +not +\emph default + sinf(), cosf(), ...) for the mcs51 are implemented in assembler. + +\end_layout + +\end_inset + +. + Note if all these routines are used simultaneously the data space might + overflow. + For serious floating point usage the large model might be needed. + Also notice that you don't have to call this routines directly. + The compiler will use them automatically every time a floating point operation + is required. +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +Library Routines +\begin_inset LatexCommand index +name "Libraries" + +\end_inset + + +\end_layout + +\begin_layout Standard + +\emph on + +\end_layout + +\begin_layout Subsection +Compiler support routines (_gptrget, _mulint etc.) +\end_layout + +\begin_layout Subsection +Stdclib functions (puts, printf, strcat etc.) +\end_layout + +\begin_layout Subsubsection + +\end_layout + +\begin_layout Paragraph +getchar(), putchar() +\end_layout + +\begin_layout Standard +\begin_inset LatexCommand index +name "" + +\end_inset + +As usual on embedded systems you have to provide your own +\family typewriter +getchar() +\begin_inset LatexCommand index +name "getchar()" + +\end_inset + + +\family default + and +\family typewriter +putchar() +\begin_inset LatexCommand index +name "putchar()" + +\end_inset + + +\family default + routines. + SDCC does not know whether the system connects to a serial line with or + without handshake, LCD, keyboard or other device. + And whether a +\family typewriter +lf +\family default + to +\family typewriter +crlf +\family default + conversion within +\family typewriter +putchar() +\family default + is intended. + You'll find examples for serial routines f.e. + in sdcc/device/lib. + For the mcs51 this minimalistic polling +\family typewriter +putchar() +\family default + routine might be a start: +\end_layout + +\begin_layout Verse + +\family typewriter +void putchar (char c) { +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +while (!TI)\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + /* assumes UART is initialized */ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +TI + = 0; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +SBUF = c; +\newline +} +\end_layout + +\begin_layout Paragraph +printf() +\end_layout + +\begin_layout Standard +The default +\family typewriter +printf() +\begin_inset LatexCommand index +name "printf()" + +\end_inset + + +\family default + implementation in +\family typewriter +printf_large.c +\family default + does not support float +\begin_inset LatexCommand index +name "Floating point support" + +\end_inset + + (except on ds390), only +\begin_inset LatexCommand index +name "" + +\end_inset + + +\begin_inset LatexCommand index +name "printf floating point support" + +\end_inset + + will be printed instead of the value. + To enable floating point output, recompile it with the option +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +DUSE_FLOATS=1 +\begin_inset LatexCommand index +name "USE\\_FLOATS" + +\end_inset + + +\emph default + on the command line. + Use +\emph on +- +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-model-large +\begin_inset LatexCommand index +name "-\\/-model-large" + +\end_inset + + +\emph default + for the mcs51 port, since this uses a lot of memory. + To enable float support for the pic16 targets, see +\begin_inset LatexCommand ref +reference "sub:pic16Libraries" + +\end_inset + +. +\end_layout + +\begin_layout Standard +If you're short on code memory you might want to use +\family typewriter +printf_small() +\begin_inset LatexCommand index +name "printf\\_small()" + +\end_inset + + +\family default + +\emph on +instead +\emph default + of +\family typewriter +printf(). + +\family default + For the mcs51 there additionally are assembly versions +\family typewriter +printf_tiny() +\begin_inset LatexCommand index +name "printf\\_tiny() (mcs51)" + +\end_inset + + +\family default + (subset of printf using less than 270 bytes) and +\family typewriter +printf_fast() +\begin_inset LatexCommand index +name "printf\\_fast() (mcs51)" + +\end_inset + + +\family default + and +\family typewriter +printf_fast_f() +\begin_inset LatexCommand index +name "printf\\_fast\\_f() (mcs51)" + +\end_inset + + +\family default + (floating-point aware version of printf_fast) which should fit the requirements + of many embedded systems (printf_fast() can be customized by unsetting + #defines to +\emph on +not +\emph default + support long variables and field widths). + Be sure to use only one of these printf options within a project. +\newline + +\end_layout + +\begin_layout Standard +Feature matrix of different +\emph on +printf +\emph default + options on mcs51. +\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + + + + + + +\begin_inset Text + +\begin_layout Standard + +\series bold +\size large +mcs51 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +printf +\begin_inset LatexCommand index +name "printf()" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +printf +\size scriptsize +USE_FLOATS=1 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +printf_small +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +printf_fast +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +printf_fast_f +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +printf_tiny +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +filename +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size scriptsize +printf_large.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size scriptsize +printf_large.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size scriptsize +printfl.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size scriptsize +printf_fast.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size scriptsize +printf_fast_f.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size scriptsize +printf_tiny.c +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +\begin_inset Quotes sld +\end_inset + +Hello World +\begin_inset Quotes srd +\end_inset + + size +\end_layout + +\begin_layout Standard +small / large +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1.7k / 2.4k +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +4.3k / 5.6k +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1.2k / 1.8k +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1.3k / 1.3k +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1.9k / 1.9k +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0.44k / 0.44k +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +code size +\end_layout + +\begin_layout Standard +small / large +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1.4k / 2.0k +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +2.8k / 3.7k +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0.45k / 0.47k (+ _ltoa) +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1.2k / 1.2k +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1.6k / 1.6k +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0.26k / 0.26k +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +formats +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +cdi +\emph on +o +\emph default +psux +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +cd +\family default +\series default +\shape default +\size default +\emph default +\bar default +\noun default +f +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +i +\family default +\series default +\shape default +\size default +\emph on +\bar default +\noun default +o +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +psux +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +c +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +d +\family default +\series default +\shape default +\size default +\emph on +\bar default +\noun default +o +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +s +\family default +\series default +\shape default +\size default +\emph default +\bar default +\noun default +x +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +cdsux +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +cdfsux +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +cdsux +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +long (32 bit) support +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +x +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +x +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +x +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +x +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +x +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +byte arguments on stack +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +b +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +b +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +float format +\begin_inset LatexCommand index +name "Floating point support" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +%f +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +%f +\begin_inset Foot +status collapsed + +\begin_layout Standard +Range limited to +/- 4294967040, precision limited to 8 digits past decimal +\end_layout + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +float formats %e %g +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +field width +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +x +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +x +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +x +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +x +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +string speed +\begin_inset Foot +status collapsed + +\begin_layout Standard +Execution time of printf("%s%c%s%c%c%c", "Hello", ' ', "World", '!', ' +\backslash +r', ' +\backslash +n'); standard 8051 @ 22.1184 MHz, empty putchar() +\end_layout + +\end_inset + +, +\end_layout + +\begin_layout Standard +small / large +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1.52 / 2.59 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1.53 / 2.62 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0.92 / 0.93 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0.45 / 0.45 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0.46 / 0.46 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0.45 / 0.45 ms +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +int speed +\begin_inset Foot +status collapsed + +\begin_layout Standard +Execution time of printf("%d", -12345); standard 8051 @ 22.1184 MHz, empty + putchar() +\end_layout + +\end_inset + +, +\end_layout + +\begin_layout Standard +small / large +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +3.01 / 3.61 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +3.01 / 3.61 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +3.51 / 18.13 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0.22 / 0.22 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0.23 / 0.23 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0.25 / 0.25 ms +\begin_inset Foot +status collapsed + +\begin_layout Standard +printf_tiny integer speed is data dependent, worst case is 0.33 ms +\end_layout + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +long speed +\begin_inset Foot +status collapsed + +\begin_layout Standard +Execution time of printf("%ld", -123456789); standard 8051 @ 22.1184 MHz, + empty putchar() +\end_layout + +\end_inset + +, +\end_layout + +\begin_layout Standard +small / large +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +5.37 / 6.31 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +5.37 / 6.31 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +8.71 / 40.65 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0.40 / 0.40 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0.40 / 0.40 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +float speed +\begin_inset Foot +status collapsed + +\begin_layout Standard +Execution time of printf("%.3f", -12345.678); standard 8051 @ 22.1184 MHz, + empty putchar() +\end_layout + +\end_inset + +, +\end_layout + +\begin_layout Standard +small / large +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +7.49 / 22.47 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1.04 / 1.04 ms +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +- +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Subsubsection + +\begin_inset LatexCommand index +name "malloc.h" + +\end_inset + + +\end_layout + +\begin_layout Standard +As of SDCC 2.6.2 you no longer need to call an initialization routine before + using dynamic memory allocation +\begin_inset LatexCommand index +name "dynamic memory allocation (malloc)" + +\end_inset + + and a default heap +\begin_inset LatexCommand index +name "heap (malloc)" + +\end_inset + + space of 1024 bytes is provided for malloc to allocate memory from. + If you need a different heap size you need to recompile _heap.c with the + required size defined in HEAP_SIZE. + It is recommended to make a copy of this file into your project directory + and compile it there with: +\end_layout + +\begin_layout Verse + +\family typewriter +sdcc -c _heap.c -D HEAP_SIZE=2048 +\end_layout + +\begin_layout Standard +And then link it with: +\end_layout + +\begin_layout Verse + +\family typewriter +sdcc main.rel _heap.rel +\end_layout + +\begin_layout Subsection +Math functions (sinf, powf, sqrtf etc.) +\end_layout + +\begin_layout Subsubsection + +\end_layout + +\begin_layout Standard +See definitions in file . +\end_layout + +\begin_layout Subsection +Other libraries +\end_layout + +\begin_layout Standard +Libraries +\begin_inset LatexCommand index +name "Libraries" + +\end_inset + + included in SDCC should have a license at least as liberal as the GNU Lesser + General Public License +\begin_inset LatexCommand index +name "GNU Lesser General Public License, LGPL" + +\end_inset + + +\emph on +LGPL +\emph default +. +\end_layout + +\begin_layout Standard +\begin_inset Note Note +status collapsed + +\begin_layout Standard +license statements for the libraries are missing. + sdcc/device/lib/ser_ir.c +\end_layout + +\begin_layout Standard +or _decdptr f.e. + come with a GPL (as opposed to LGPL) License - this will not be liberal + enough for many embedded programmers. +\end_layout + +\end_inset + + +\end_layout + +\begin_layout Standard +If you have ported some library or want to share experience about some code + which f.e. + falls into any of these categories Busses (I +\begin_inset Formula $^{\textrm{2}}$ +\end_inset + +C, CAN, Ethernet, Profibus, Modbus, USB, SPI, JTAG ...), Media (IDE, Memory + cards, eeprom, flash...), En-/Decryption, Remote debugging, Realtime kernel, + Keyboard, LCD, RTC, FPGA, PID then the sdcc-user mailing list +\begin_inset LatexCommand url +target "http://sourceforge.net/mail/?group_id=599" + +\end_inset + +\InsetSpace ~ +would certainly like to hear about it. +\end_layout + +\begin_layout Standard +Programmers coding for embedded systems are not especially famous for being + enthusiastic, so don't expect a big hurray but as the mailing list is searchabl +e these references are very valuable. + Let's help to create a climate where information is shared. +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +Memory Models +\end_layout + +\begin_layout Subsection +MCS51 Memory Models +\begin_inset LatexCommand index +name "Memory model" + +\end_inset + + +\begin_inset LatexCommand index +name "MCS51 memory model" + +\end_inset + + +\end_layout + +\begin_layout Subsubsection +Small, Medium and Large +\end_layout + +\begin_layout Standard +SDCC allows three memory models for MCS51 code, +\shape slanted +small, medium +\shape default + and +\shape slanted +large +\shape default +. + Modules compiled with different memory models should +\emph on +never +\emph default + be combined together or the results would be unpredictable. + The library routines supplied with the compiler are compiled as small, + medium and large. + The compiled library modules are contained in separate directories as small, + medium and large so that you can link to the appropriate set. +\end_layout + +\begin_layout Standard +When the medium or large model is used all variables declared without a + storage class will be allocated into the external ram, this includes all + parameters and local variables (for non-reentrant +\begin_inset LatexCommand index +name "reentrant" + +\end_inset + + functions). + When the small model is used variables without storage class are allocated + in the internal ram. +\end_layout + +\begin_layout Standard +Judicious usage of the processor specific storage classes +\begin_inset LatexCommand index +name "Storage class" + +\end_inset + + and the 'reentrant' function type will yield much more efficient code, + than using the large model. + Several optimizations are disabled when the program is compiled using the + large model, it is therefore recommended that the small model be used unless + absolutely required. +\end_layout + +\begin_layout Subsubsection +External Stack +\begin_inset LatexCommand label +name "sub:External-Stack" + +\end_inset + + +\begin_inset LatexCommand index +name "stack" + +\end_inset + + +\begin_inset LatexCommand index +name "External stack (mcs51)" + +\end_inset + + +\end_layout + +\begin_layout Standard +The external stack (- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-xstack option +\begin_inset LatexCommand index +name "-\\/-xstack" + +\end_inset + +) is located in pdata +\begin_inset LatexCommand index +name "pdata (mcs51, ds390 storage class)" + +\end_inset + + memory (usually at the start of the external ram segment) and uses all + unused space in pdata (max. + 256 bytes). + When - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-xstack option is used to compile the program, the parameters and local + variables +\begin_inset LatexCommand index +name "local variables" + +\end_inset + + of all reentrant functions are allocated in this area. + This option is provided for programs with large stack space requirements. + When used with the - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-auto +\begin_inset LatexCommand index +name "-\\/-stack-auto" + +\end_inset + + option, all parameters and local variables are allocated on the external + stack (note: support libraries will need to be recompiled with the same + options. + There is a predefined target in the library makefile). +\end_layout + +\begin_layout Standard +The compiler outputs the higher order address byte of the external ram segment + into port P2 +\begin_inset LatexCommand index +name "P2 (mcs51 sfr)" + +\end_inset + + (see also section +\begin_inset LatexCommand ref +reference "sub:MCS51-variants" + +\end_inset + +), therefore when using the External Stack option, this port +\emph on +may not +\emph default + be used by the application program. +\end_layout + +\begin_layout Subsection +DS390 Memory Model +\begin_inset LatexCommand index +name "Memory model" + +\end_inset + + +\begin_inset LatexCommand index +name "DS390 memory model" + +\end_inset + + +\end_layout + +\begin_layout Standard +The only model supported is Flat 24 +\begin_inset LatexCommand index +name "Flat 24 (DS390 memory model)" + +\end_inset + +. + This generates code for the 24 bit contiguous addressing mode of the Dallas + DS80C390 part. + In this mode, up to four meg of external RAM or code space can be directly + addressed. + See the data sheets at www.dalsemi.com for further information on this part. +\newline + +\newline +Note + that the compiler does not generate any code to place the processor into + 24 bitmode (although +\emph on +tinibios +\emph default + in the ds390 libraries will do that for you). + If you don't use +\emph on +tinibios +\emph default + +\begin_inset LatexCommand index +name "Tinibios (DS390)" + +\end_inset + +, the boot loader or similar code must ensure that the processor is in 24 + bit contiguous addressing mode before calling the SDCC startup code. +\newline + +\newline +Like + the +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-model-large +\emph default + option, variables will by default be placed into the XDATA segment. + +\newline + +\newline +Segments may be placed anywhere in the 4 meg address space using the usual + - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-*-loc options. + Note that if any segments are located above 64K, the -r flag must be passed + to the linker to generate the proper segment relocations, and the Intel + HEX output format must be used. + The -r flag can be passed to the linker by using the option +\emph on +-Wl-r +\emph default + on the SDCC command line. + However, currently the linker can not handle code segments > 64k. +\end_layout + +\begin_layout Section +Pragmas +\begin_inset LatexCommand label +name "sec:Pragmas" + +\end_inset + + +\begin_inset LatexCommand index +name "Pragmas" + +\end_inset + + +\end_layout + +\begin_layout Standard +Pragmas are used to turn on and/or off certain compiler options. + Some of them are closely related to corresponding command-line options + (see section +\begin_inset LatexCommand vref +reference "sec:Command-Line-Options" + +\end_inset + +). +\newline +Pragmas should be placed before and/or after a function, placing pragmas + inside a function body could have unpredictable results. +\newline + +\newline +SDCC supports the + following #pragma directives: +\end_layout + +\begin_layout Itemize + +\series bold +save +\series default + +\begin_inset LatexCommand index +name "\\#pragma save" + +\end_inset + + - this will save most current options to the save/restore stack. + See #pragma\InsetSpace ~ +restore. +\end_layout + +\begin_layout Itemize + +\series bold +restore +\series default + +\begin_inset LatexCommand index +name "\\#pragma restore" + +\end_inset + + - will restore saved options from the last save. + saves & restores can be nested. + SDCC uses a save/restore stack: save pushes current options to the stack, + restore pulls current options from the stack. + See #pragma\InsetSpace ~ +save. +\newline + +\end_layout + +\begin_layout Itemize + +\series bold +callee_saves +\series default + +\begin_inset LatexCommand index +name "\\#pragma callee\\_saves" + +\end_inset + + +\begin_inset LatexCommand index +name "function prologue" + +\end_inset + + function1[,function2[,function3...]] +\begin_inset LatexCommand label +name "ite:callee_saves-function1[,function2[,function3...]]--" + +\end_inset + +- The compiler by default uses a caller saves convention for register saving + across function calls, however this can cause unnecessary register pushing + and popping +\begin_inset LatexCommand index +name "push/pop" + +\end_inset + + when calling small functions from larger functions. + This option can be used to switch off the register saving convention for + the function names specified. + The compiler will not save registers when calling these functions, extra + code need to be manually inserted at the entry and exit for these functions + to save and restore the registers used by these functions, this can SUBSTANTIAL +LY reduce code and improve run time performance of the generated code. + In the future the compiler (with inter procedural analysis) may be able + to determine the appropriate scheme to use for each function call. + If - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-callee-saves command line option is used (see page +\begin_inset LatexCommand vpageref +reference "lyx:--callee-saves-function1[,function2][,function3]..." + +\end_inset + +), the function names specified in #pragma\InsetSpace ~ +callee_saves +\begin_inset LatexCommand index +name "\\#pragma callee\\_saves" + +\end_inset + + is appended to the list of functions specified in the command line. +\end_layout + +\begin_layout Itemize + +\series bold +exclude +\series default + +\begin_inset LatexCommand index +name "\\#pragma exclude" + +\end_inset + + none | {acc[,b[,dpl[,dph]]] - The exclude pragma disables the generation + of pairs of push/pop +\begin_inset LatexCommand index +name "push/pop" + +\end_inset + + instructions in +\emph on +I +\emph default +nterrupt +\begin_inset LatexCommand index +name "interrupt" + +\end_inset + + +\emph on +S +\emph default +ervice +\emph on +R +\emph default +outines. + The directive should be placed immediately before the ISR function definition + and it affects ALL ISR functions following it. + To enable the normal register saving for ISR functions use #pragma\InsetSpace ~ +exclude\InsetSpace ~ +none +\begin_inset LatexCommand index +name "\\#pragma exclude" + +\end_inset + +. + See also the related keyword _naked +\begin_inset LatexCommand index +name "\\_naked" + +\end_inset + + +\begin_inset LatexCommand index +name "\\_\\_naked" + +\end_inset + +. +\end_layout + +\begin_layout Itemize + +\series bold +less_pedantic +\series default + +\begin_inset LatexCommand index +name "pedantic" + +\end_inset + + +\begin_inset LatexCommand index +name "\\#pragma less\\_pedantic" + +\end_inset + + +\begin_inset LatexCommand label +name "ite:less_pedantic" + +\end_inset + +- the compiler will not warn you anymore for obvious mistakes, you're on + your own now ;-( . + See also the command line option - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-less-pedantic +\begin_inset LatexCommand vpageref +reference "lyx:--less-pedantic" + +\end_inset + +. + +\newline +More specifically, the following warnings will be disabled: +\shape italic +comparison is always [true/false] due to limited range of data type +\shape default + (94); +\shape italic +overflow in implicit constant conversion +\shape default + (158); [the (in)famous] +\shape italic +conditional flow changed by optimizer: so said EVELYN the modified DOG +\shape default + (110); +\shape italic +function '[function name]' must return value +\shape default + (59). + +\newline +Furthermore, warnings of less importance (of PEDANTIC and INFO warning + level) are disabled, too, namely: +\shape italic +constant value '[ +\begin_inset Note Note +status collapsed + +\begin_layout Standard +dunno what comes here - this warning appears to be unused altogether +\end_layout + +\end_inset + +]', out of range +\shape default + (81); +\shape italic +[left/right] shifting more than size of object changed to zero +\shape default + (116); +\shape italic +unreachable code +\shape default + (126); +\shape italic +integer overflow in expression +\shape default + (165); +\shape italic +unmatched #pragma save and #pragma restore +\shape default + (170); +\shape italic +comparison of 'signed char' with 'unsigned char' requires promotion to int +\shape default + (185); +\shape italic +ISO C90 does not support flexible array members +\shape default + (187); +\shape italic +extended stack by [number] bytes for compiler temp(s) :in function '[function\InsetSpace ~ +nam +e]':\InsetSpace ~ +[ +\begin_inset Note Note +status collapsed + +\begin_layout Standard +appears to be always blank - what was supposed to be here? +\end_layout + +\end_inset + +] +\shape default + (114); +\shape italic +function '[function name]', # edges [number] , # nodes [number] , cyclomatic + complexity [number] +\shape default + (121). +\end_layout + +\begin_layout Itemize + +\series bold +disable_warning +\series default + +\begin_inset LatexCommand index +name "\\#pragma disable\\_warning" + +\end_inset + + - the compiler will not warn you anymore about warning number . +\end_layout + +\begin_layout Itemize + +\series bold +nogcse +\series default + +\begin_inset LatexCommand index +name "\\#pragma nogcse" + +\end_inset + + - will stop global common subexpression elimination. +\end_layout + +\begin_layout Itemize + +\series bold +noinduction +\series default + +\begin_inset LatexCommand index +name "\\#pragma noinduction" + +\end_inset + + - will stop loop induction optimizations. +\end_layout + +\begin_layout Itemize + +\series bold +noinvariant +\series default + +\begin_inset LatexCommand index +name "\\#pragma noinvariant" + +\end_inset + + - will not do loop invariant optimizations. + For more details see Loop Invariants in section +\begin_inset LatexCommand ref +reference "sub:Loop-Optimizations" + +\end_inset + +. +\end_layout + +\begin_layout Itemize + +\series bold +noiv +\series default + +\begin_inset LatexCommand index +name "\\#pragma noiv" + +\end_inset + + - Do not generate interrupt +\begin_inset LatexCommand index +name "interrupt" + +\end_inset + + vector table +\begin_inset LatexCommand index +name "interrupt vector table" + +\end_inset + + entries for all ISR functions defined after the pragma. + This is useful in cases where the interrupt vector table must be defined + manually, or when there is a secondary, manually defined interrupt vector + table (e.g. + for the autovector feature of the Cypress EZ-USB FX2). + More elegantly this can be achieved by omitting the optional interrupt + number after the interrupt keyword, see section +\begin_inset LatexCommand ref +reference "sub:Interrupt-Service-Routines" + +\end_inset + +\InsetSpace ~ +about interrupts. +\end_layout + +\begin_layout Itemize + +\series bold +nojtbound +\series default + +\begin_inset LatexCommand index +name "\\#pragma nojtbound" + +\end_inset + + - will not generate code for boundary value checking, when switch statements + are turned into jump-tables (dangerous). + For more details see section +\begin_inset LatexCommand ref +reference "sub:'switch'-Statements" + +\end_inset + +. +\end_layout + +\begin_layout Itemize + +\series bold +noloopreverse +\series default + +\begin_inset LatexCommand index +name "\\#pragma noloopreverse" + +\end_inset + + - Will not do loop reversal optimization +\end_layout + +\begin_layout Itemize + +\series bold +nooverlay +\series default + +\begin_inset LatexCommand index +name "\\#pragma nooverlay" + +\end_inset + + - the compiler will not overlay the parameters and local variables of a + function. +\end_layout + +\begin_layout Itemize + +\series bold +stackauto +\series default + +\begin_inset LatexCommand index +name "\\#pragma stackauto" + +\end_inset + +- See option - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-auto +\begin_inset LatexCommand index +name "-\\/-stack-auto" + +\end_inset + + and section +\begin_inset LatexCommand ref +reference "sec:Parameters-and-Local-Variables" + +\end_inset + + Parameters and Local Variables. +\end_layout + +\begin_layout Itemize + +\series bold +opt_code_speed +\series default + +\begin_inset LatexCommand index +name "\\#pragma opt\\_code\\_speed" + +\end_inset + +- The compiler will optimize code generation towards fast code, possibly + at the expense of code size. + Currently this has little effect. +\end_layout + +\begin_layout Itemize + +\series bold +opt_code_size +\series default + +\begin_inset LatexCommand index +name "\\#pragma opt\\_code\\_size" + +\end_inset + +- The compiler will optimize code generation towards compact code, possibly + at the expense of code speed. + Currently this has little effect. +\end_layout + +\begin_layout Itemize + +\series bold +opt_code_balanced +\series default + +\begin_inset LatexCommand index +name "\\#pragma opt\\_code\\_balanced" + +\end_inset + +- The compiler will attempt to generate code that is both compact and fast, + as long as meeting one goal is not a detriment to the other (this is the + default). + +\end_layout + +\begin_layout Itemize + +\series bold +std_sdcc89 +\series default + +\begin_inset LatexCommand index +name "\\#pragma std\\_sdcc89" + +\end_inset + +- Generally follow the C89 standard, but allow SDCC features that conflict + with the standard (default). +\end_layout + +\begin_layout Itemize + +\series bold +std_c89 +\series default + +\begin_inset LatexCommand index +name "\\#pragma std\\_c89" + +\end_inset + +- Follow the C89 standard and disable SDCC features that conflict with the + standard. +\end_layout + +\begin_layout Itemize + +\series bold +std_sdcc99 +\series default + +\begin_inset LatexCommand index +name "\\#pragma std\\_sdcc99" + +\end_inset + +- Generally follow the C99 standard, but allow SDCC features that conflict + with the standard (incomplete support). +\end_layout + +\begin_layout Itemize + +\series bold +std_c99 +\series default + +\begin_inset LatexCommand index +name "\\#pragma std\\_c99" + +\end_inset + +- Follow the C99 standard and disable SDCC features that conflict with the + standard (incomplete support). +\end_layout + +\begin_layout Itemize + +\series bold +codeseg +\series default + +\begin_inset LatexCommand index +name "\\#pragma codeseg" + +\end_inset + +- Use this name (max. + 8 characters) for the code segment. + See option - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-codeseg. +\end_layout + +\begin_layout Itemize + +\series bold +constseg +\series default + +\begin_inset LatexCommand index +name "\\#pragma constseg" + +\end_inset + +- Use this name (max. + 8 characters) for the const segment. + See option - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-constseg. +\end_layout + +\begin_layout Standard +The preprocessor SDCPP +\begin_inset LatexCommand index +name "sdcpp (preprocessor)" + +\end_inset + + supports the following #pragma directives: +\end_layout + +\begin_layout Itemize + +\series bold +pedantic_parse_number +\series default + +\begin_inset LatexCommand index +name "pedantic" + +\end_inset + + +\begin_inset LatexCommand index +name "\\#pragma pedantic\\_parse\\_number" + +\end_inset + + (+ | -) +\begin_inset LatexCommand label +name "ite:pedantic_parse_number" + +\end_inset + +- Pedantic parse numbers so that situations like 0xfe-LO_B(3) are parsed + properly and the macro LO_B(3) gets expanded. + Default is off. + See also the - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-pedantic-parse-number command line option +\begin_inset LatexCommand vpageref +reference "lyx:-pedantic-parse-number" + +\end_inset + +. + +\newline +Below is an example on how to use this pragma. + +\emph on +Note: this functionality is not in conformance with standard! +\end_layout + +\begin_layout Verse + +\family typewriter +#pragma pedantic_parse_number + +\begin_inset LatexCommand index +name "\\#pragma pedantic\\_parse\\_number" + +\end_inset + + +\newline + +\newline +#define LO_B(x) ((x) & 0xff) +\newline + +\newline +unsigned char foo(void) +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +unsigned char c=0xfe-LO_B(3) +; +\newline + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +return c; +\newline +} +\newline + +\end_layout + +\begin_layout Itemize + +\series bold +preproc_asm +\series default + +\begin_inset LatexCommand index +name "\\#pragma preproc\\_asm" + +\end_inset + + (+ | -) - switch _asm _endasm block preprocessing on / off. + Default is on. + You use this pragma to define multilines of assembly code. + This will prevent the preprocessor from changing the formatting required + by assembly code. + Below is an example on how to use this pragma. +\end_layout + +\begin_layout Verse + +\family typewriter +#pragma preproc_asm - +\begin_inset LatexCommand index +name "\\#pragma preproc\\_asm" + +\end_inset + + +\newline +#define MYDELAY _asm +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +nop ;my assembly comment... +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +nop +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +nop +\newline +_endasm +\newline +#pragma preproc_asm + + +\newline + +\newline +void foo (void) +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + MYDELAY; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + ... + +\newline +} +\newline + +\end_layout + +\begin_layout Itemize + +\series bold +sdcc_hash +\series default + +\begin_inset LatexCommand index +name "\\#pragma sdcc\\_hash" + +\end_inset + + (+ | -) - Allow "naked" hash in macro definition, for example: +\newline + +\family typewriter +#define DIR_LO(x) #(x & 0xff) +\family default + +\newline +Default is off. + Below is an example on how to use this pragma. +\end_layout + +\begin_layout Verse + +\family typewriter +#pragma preproc_asm + +\newline +#pragma sdcc_hash + +\begin_inset LatexCommand index +name "\\#pragma sdcc\\_hash" + +\end_inset + + +\newline + +\newline +#define ROMCALL(x) +\backslash + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov R6_B3, #(x & 0xff) +\backslash + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mov R7_B3, #((x >> 8) & 0xff) +\backslash + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +lcall __romcall +\newline + +\newline +... +\newline +_asm +\newline +ROMCALL(72) +\newline +_endasm; +\newline +... +\newline + +\end_layout + +\begin_layout Standard +Some of the pragmas are intended to be used to turn-on or off certain optimizati +ons which might cause the compiler to generate extra stack and/or data space + to store compiler generated temporary variables. + This usually happens in large functions. + Pragma directives should be used as shown in the following example, they + are used to control options and optimizations for a given function. + +\end_layout + +\begin_layout Verse + +\family typewriter +#pragma save +\begin_inset LatexCommand index +name "\\#pragma save" + +\end_inset + + \InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* save the current settings */ +\newline +#pragma nogcse +\begin_inset LatexCommand index +name "\\#pragma nogcse" + +\end_inset + + \InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* turnoff global subexpression elimination */ +\newline +#pragma noinduction +\begin_inset LatexCommand index +name "\\#pragma noinduction" + +\end_inset + + /* turn off induction optimizations */ +\newline +int foo () +\newline +{ +\newline +\InsetSpace ~ + \InsetSpace ~ + ... + +\newline +\InsetSpace ~ + \InsetSpace ~ + /* large code */ +\newline +\InsetSpace ~ + \InsetSpace ~ + ... + +\newline +} +\newline +#pragma restore +\begin_inset LatexCommand index +name "\\#pragma restore" + +\end_inset + + /* turn the optimizations back on */ +\end_layout + +\begin_layout Standard +The compiler will generate a warning message when extra space is allocated. + It is strongly recommended that the save and restore pragmas be used when + changing options for a function. +\newline + +\newline + +\newline + +\end_layout + +\begin_layout Section +Defines Created by the Compiler +\end_layout + +\begin_layout Standard +The compiler creates the following #defines +\begin_inset LatexCommand index +name "\\#defines" + +\end_inset + + +\begin_inset LatexCommand index +name "Defines created by the compiler" + +\end_inset + +: +\newline + +\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard + +\series bold +#define +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Description +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC +\begin_inset LatexCommand index +name "SDCC" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Always defined. + Since version 2.5.6 the version number as an int (ex. + 256) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC_mcs51 +\begin_inset LatexCommand index +name "SDCC\\_mcs51" + +\end_inset + + or SDCC_ds390 +\begin_inset LatexCommand index +name "SDCC\\_ds390" + +\end_inset + + or SDCC_z80 +\begin_inset LatexCommand index +name "SDCC\\_z80" + +\end_inset + +, etc. +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +depending on the model used (e.g.: -mds390) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +__mcs51 +\begin_inset LatexCommand index +name "\\_\\_mcs51" + +\end_inset + +, __ds390 +\begin_inset LatexCommand index +name "\\_\\_ds390" + +\end_inset + +, __hc08 +\begin_inset LatexCommand index +name "\\_\\_hc08" + +\end_inset + +, __z80 +\begin_inset LatexCommand index +name "\\_\\_z80" + +\end_inset + +, etc +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +depending on the model used (e.g. + -mz80) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC_STACK_AUTO +\begin_inset LatexCommand index +name "SDCC\\_STACK\\_AUTO" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +when +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-auto +\emph default + option is used +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC_MODEL_SMALL +\begin_inset LatexCommand index +name "SDCC\\_MODEL\\_SMALL" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +when +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-model-small +\emph default + is used +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC_MODEL_MEDIUM +\begin_inset LatexCommand index +name "SDCC\\_MODEL\\_MEDIUM" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +when +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-model-medium +\emph default + is used +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC_MODEL_LARGE +\begin_inset LatexCommand index +name "SDCC\\_MODEL\\_LARGE" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +when +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-model-large +\emph default + is used +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC_USE_XSTACK +\begin_inset LatexCommand index +name "SDCC\\_USE\\_XSTACK" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +when +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-xstack +\emph default + option is used +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC_STACK_TENBIT +\begin_inset LatexCommand index +name "SDCC\\_STACK\\_TENBIT" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +when +\emph on +-mds390 +\emph default + is used +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC_MODEL_FLAT24 +\begin_inset LatexCommand index +name "SDCC\\_MODEL\\_FLAT24" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +when +\emph on +-mds390 +\emph default + is used +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC_REVISION +\begin_inset LatexCommand index +name "SDCC\\_REVISION" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Always defined. + SDCC svn revision number +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC_PARMS_IN_BANK1 +\begin_inset LatexCommand index +name "SDCC\\_PARMS\\_IN\\_BANK1" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +when +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-parms-in-bank1 +\emph default + is used +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC_FLOAT_REENT +\begin_inset LatexCommand index +name "SDCC\\_MODEL\\_FLAT24" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +when +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-float-reent +\emph default + is used +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC_INT_LONG_REENT +\begin_inset LatexCommand index +name "SDCC\\_INT\\_LONG\\_REENT" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +when +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-int-long-reent +\emph default + is used +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Chapter +Notes on supported Processors +\end_layout + +\begin_layout Section +MCS51 variants +\begin_inset LatexCommand label +name "sub:MCS51-variants" + +\end_inset + + +\begin_inset LatexCommand index +name "MCS51 variants" + +\end_inset + + +\end_layout + +\begin_layout Standard +MCS51 processors are available from many vendors and come in many different + flavours. + While they might differ considerably in respect to Special Function Registers + the core MCS51 is usually not modified or is kept compatible. + +\end_layout + +\begin_layout Subsection +pdata access by SFR +\end_layout + +\begin_layout Standard +With the upcome of devices with internal xdata and flash memory devices + using port P2 +\begin_inset LatexCommand index +name "P2 (mcs51 sfr)" + +\end_inset + + as dedicated I/O port is becoming more popular. + Switching the high byte for pdata +\begin_inset LatexCommand index +name "pdata (mcs51, ds390 storage class)" + +\end_inset + + access which was formerly done by port P2 is then achieved by a Special + Function Register +\begin_inset LatexCommand index +name "sfr" + +\end_inset + +. + In well-established MCS51 tradition the address of this +\emph on +sfr +\emph default + is where the chip designers decided to put it. + Needless to say that they didn't agree on a common name either. + So that the startup code can correctly initialize xdata variables, you + should define an sfr with the name _XPAGE +\family typewriter + +\begin_inset LatexCommand index +name "\\_XPAGE (mcs51)" + +\end_inset + + +\family default + at the appropriate location if the default, port P2, is not used for this. + Some examples are: +\end_layout + +\begin_layout Verse + +\family typewriter +__sfr __at (0x85) _XPAGE; /* Ramtron VRS51 family a.k.a. + MPAGE */ +\end_layout + +\begin_layout Verse + +\family typewriter +__sfr __at (0x92) _XPAGE; /* Cypress EZ-USB family, Texas Instruments (Chipcon) + a.k.a. + MPAGE */ +\end_layout + +\begin_layout Verse + +\family typewriter +__sfr __at (0x91) _XPAGE; /* Infineon (Siemens) C500 family a.k.a. + XPAGE */ +\end_layout + +\begin_layout Verse + +\family typewriter +__sfr __at (0xaf) _XPAGE; /* some Silicon Labs (Cygnal) chips a.k.a. + EMI0CN */ +\end_layout + +\begin_layout Verse + +\family typewriter +__sfr __at (0xaa) _XPAGE; /* some Silicon Labs (Cygnal) chips a.k.a. + EMI0CN */ +\end_layout + +\begin_layout Standard +For more exotic implementations further customizations may be needed. + See section +\begin_inset LatexCommand ref +reference "sub:Startup-Code" + +\end_inset + + for other possibilities. +\end_layout + +\begin_layout Subsection +Other Features available by SFR +\end_layout + +\begin_layout Standard +Some MCS51 variants offer features like Double DPTR +\begin_inset LatexCommand index +name "DPTR" + +\end_inset + +, multiple DPTR, decrementing DPTR, 16x16 Multiply. + These are currently not used for the MCS51 port. + If you absolutely need them you can fall back to inline assembly or submit + a patch to SDCC. +\end_layout + +\begin_layout Subsection +Bankswitching +\end_layout + +\begin_layout Standard +Bankswitching +\begin_inset LatexCommand index +name "Bankswitching" + +\end_inset + + (a.k.a. + code banking +\begin_inset LatexCommand index +name "code banking" + +\end_inset + +) is a technique to increase the code space above the 64k limit of the 8051. +\end_layout + +\begin_layout Subsubsection +Hardware +\end_layout + +\begin_layout Standard +\begin_inset Tabular + + + + + + + + +\begin_inset Text + +\begin_layout Standard +8000-FFFF +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +bank1 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +bank2 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +bank3 +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +0000-7FFF +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +common +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SiLabs C8051F120 example +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + + + +\end_inset + + +\newline + +\newline +Usually the hardware uses some sfr (an output port or an internal sfr) to + select a bank and put it in the banked area of the memory map. + The selected bank usually becomes active immediately upon assignment to + this sfr and when running inside a bank it will switch out this code it + is currently running. + Therefor you cannot jump or call directly from one bank to another and + need to use a so-called trampoline in the common area. + For SDCC an example trampoline is in crtbank.asm and you may need to change + it to your 8051 derivative or schematic. + The presented code is written for the C8051F120. +\newline + +\newline +When calling a banked function + SDCC will put the LSB of the functions address in register R0, the MSB + in R1 and the bank in R2 and then call this trampoline +\emph on +__sdcc_banked_call +\emph default +. + The current selected bank is saved on the stack, the new bank is selected + and an indirect jump is made. + When the banked function returns it jumps to +\emph on +__sdcc_banked_ret +\emph default + which restores the previous bank and returns to the caller. +\end_layout + +\begin_layout Subsubsection +Software +\end_layout + +\begin_layout Standard +When writing banked software using SDCC you need to use some special keywords + and options. + You also need to take over a bit of work from the linker. +\newline + +\newline +To create a function + that can be called from another bank it requires the keyword +\emph on +banked +\emph default + +\begin_inset LatexCommand index +name "banked" + +\end_inset + +. + The caller must see this in the prototype of the callee and the callee + needs it for a proper return. + Called functions within the same bank as the caller do not need the +\emph on +banked +\emph default + keyword nor do functions in the common area. + Beware: SDCC does not know or check if functions are in the same bank. + This is your responsibility! +\newline + +\newline +Normally all functions you write end up in + the segment CSEG. + If you want a function explicitly to reside in the common area put it in + segment HOME. + This applies for instance to interrupt service routines as they should + not be banked. +\end_layout + +\begin_layout Standard +Functions that need to be in a switched bank must be put in a named segment. + The name can be mostly anything up to eight characters (e.g. + BANK1). + To do this you either use - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-codeseg BANK1 (See +\begin_inset LatexCommand ref +reference "lyx:-codeseg" + +\end_inset + +) on the command line when compiling or #pragma codeseg BANK1 (See +\begin_inset LatexCommand ref +reference "sec:Pragmas" + +\end_inset + +) at the top of the C source file. + The segment name always applies to the whole source file and generated + object so functions for different banks need to be defined in different + source files. +\newline + +\newline +When linking your objects you need to tell the linker where + to put your segments. + To do this you use the following command line option to SDCC: -Wl-b BANK1=0x180 +00 (See +\begin_inset LatexCommand ref +reference "lyx:-Wl option" + +\end_inset + +). + This sets the virtual start address of this segment. + It sets the banknumber to 0x01 and maps the bank to 0x8000 and up. + The linker will not check for overflows, again this is your responsibility. +\end_layout + +\begin_layout Standard +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +DS400 port +\end_layout + +\begin_layout Standard +The DS80C400 +\begin_inset LatexCommand index +name "DS80C400" + +\end_inset + + +\begin_inset LatexCommand index +name "DS400" + +\end_inset + + microcontroller has a rich set of peripherals. + In its built-in ROM library it includes functions to access some of the + features, among them is a TCP stack with IP4 and IP6 support. + Library headers (currently in beta status) and other files are provided + at +\size footnotesize + +\begin_inset LatexCommand url +target "ftp://ftp.dalsemi.com/pub/tini/ds80c400/c_libraries/sdcc/index.html" + +\end_inset + +. + +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +The Z80 and gbz80 port +\end_layout + +\begin_layout Standard +SDCC can target both the Zilog Z80 +\begin_inset LatexCommand index +name "Z80" + +\end_inset + + and the Nintendo Gameboy's Z80-like gbz80 +\begin_inset LatexCommand index +name "gbz80 (GameBoy Z80)" + +\end_inset + +. + The Z80 port is passed through the same +\emph on +regressions tests +\begin_inset LatexCommand index +name "Regression test" + +\end_inset + + +\emph default + (see section +\begin_inset LatexCommand ref +reference "sec:Quality-control" + +\end_inset + +) as the MCS51 and DS390 ports, so floating point support, support for long + variables and bitfield support is fine. + See mailing lists and forums about interrupt routines. +\end_layout + +\begin_layout Standard +As always, the code is the authoritative reference - see z80/ralloc.c and + z80/gen.c. + The stack +\begin_inset LatexCommand index +name "Z80!stack" + +\end_inset + + frame is similar to that generated by the IAR Z80 compiler. + IX is used as the base pointer, HL and IY are used as a temporary registers, + and BC and DE are available for holding variables. + Return values +\begin_inset LatexCommand index +name "Z80!return value" + +\end_inset + + for the Z80 port are stored in L (one byte), HL (two bytes), or DEHL (four + bytes). + The gbz80 port use the same set of registers for the return values, but + in a different order of significance: E (one byte), DE (two bytes), or + HLDE (four bytes). +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +The HC08 port +\end_layout + +\begin_layout Standard +The port to the Freescale/Motorola HC08 +\begin_inset LatexCommand index +name "HC08" + +\end_inset + + family has been added in October 2003, and is still undergoing some basic + development. + The code generator is complete, but the register allocation is still quite + unoptimized. + Some of the SDCC's standard C library functions have embedded non-HC08 + inline assembly and so are not yet usable. +\end_layout + +\begin_layout Standard +The HC08 port passes the regression test suite (see section +\begin_inset LatexCommand ref +reference "sec:Quality-control" + +\end_inset + +). +\begin_inset VSpace bigskip +\end_inset + + +\end_layout + +\begin_layout Section +The PIC14 +\begin_inset LatexCommand index +name "PIC14" + +\end_inset + + port +\end_layout + +\begin_layout Standard +The PIC14 port adds support for Microchip +\begin_inset LatexCommand index +name "Microchip" + +\end_inset + + +\begin_inset Formula $^{\text{TM}}$ +\end_inset + + PIC +\begin_inset LatexCommand index +name "PIC14" + +\end_inset + + +\begin_inset Formula $^{\text{TM}}$ +\end_inset + + MCUs with 14 bit wide instructions. + This port is not yet mature and still lacks many features. + However, it can work for simple code. +\end_layout + +\begin_layout Standard +\noindent +Currently supported devices include: +\end_layout + +\begin_layout Standard +12F: 629, 635, 675, 683 +\end_layout + +\begin_layout Standard +16C: 432, 433 +\end_layout + +\begin_layout Standard +16C: 554, 557, 558 +\end_layout + +\begin_layout Standard +16C: 62, 620, 620a, 621, 621a, 622, 622a, 63a, 65b +\end_layout + +\begin_layout Standard +16C: 71, 710, 711, 715, 717, 72, 73b, 745, 74b, 765, 770, 771, 773, 774, + 781, 782 +\end_layout + +\begin_layout Standard +16C: 925, 926 +\end_layout + +\begin_layout Standard +16CR: 620a, 73, 74, 76, 77 +\end_layout + +\begin_layout Standard +16F: 616, 627, 627a, 628, 628a, 630, 636, 639, 648, 648a, 676, 684, 685, + 687, 688, 689, 690 +\end_layout + +\begin_layout Standard +16F: 716, 72, 73, 737, 74, 747, 76, 767, 77, 777, 785 +\end_layout + +\begin_layout Standard +16F: 818, 819, 84, 84a, 87, 870, 871, 872, 873, 873a, 874, 874a, 876, 876a, + 877, 877a, 88, 886, 887 +\end_layout + +\begin_layout Standard +16F: 913, 914, 916, 917, 946 +\end_layout + +\begin_layout Standard +26HV: 626, 785 +\end_layout + +\begin_layout Standard +\noindent +An up-to-date list of currently supported devices can be obtained via +\family typewriter +sdcc -mpic14 -phelp foo.c +\family default + (foo.c must exist...). +\end_layout + +\begin_layout Subsection +PIC Code Pages +\begin_inset LatexCommand index +name "code page (pic14)" + +\end_inset + + and Memory Banks +\begin_inset LatexCommand index +name "Memory bank (pic14)" + +\end_inset + + +\end_layout + +\begin_layout Standard +The linker organizes allocation for the code page and RAM banks. + It does not have intimate knowledge of the code flow. + It will put all the code section of a single .asm file into a single code + page. + In order to make use of multiple code pages, separate asm files must be + used. + The compiler assigns all +\emph on +static +\emph default + functions of a single .c file into the same code page. +\newline + +\newline +To get the best results, + follow these guidelines: +\end_layout + +\begin_layout Enumerate +Make local functions static, as non static functions require code page selection + overhead. +\newline +Due to the way sdcc handles functions, place called functions prior + to calling functions in the file wherever possible: Otherwise sdcc will + insert unnecessary pagesel directives around the call, believing that the + called function is externally defined. +\end_layout + +\begin_layout Enumerate +For devices that have multiple code pages it is more efficient to use the + same number of files as pages: Use up to 4 separate .c files for the 16F877, + but only 2 files for the 16F874. + This way the linker can put the code for each file into different code + pages and there will be less page selection overhead. +\end_layout + +\begin_layout Enumerate +And as for any 8 bit micro (especially for PIC14 as they have a very simple + instruction set), use `unsigned char' wherever possible instead of `int'. +\end_layout + +\begin_layout Subsection +Adding New Devices to the Port +\end_layout + +\begin_layout Standard +Adding support for a new 14 +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +, +\end_layout + +\end_inset + +bit PIC MCU requires the following steps: +\end_layout + +\begin_layout Enumerate +Create a new device description. +\newline +Each device is described in two files: pic16f*.h + and pic16f*.c. + These files primarily define SFRs, structs to access their bits, and symbolic + configuration options. + Both files can be generated from gputils' .inc files using the perl script + +\family typewriter +support/scripts/inc2h.pl +\family default +. + This file also contains further instructions on how to proceed. +\end_layout + +\begin_layout Enumerate +Copy the .h file into SDCC's include path and either add the .c file to your + project or copy it to +\family typewriter +device/lib/pic/libdev +\family default +. + Afterwards, rebuild and install the libraries. +\end_layout + +\begin_layout Enumerate +Edit pic14devices.txt in SDCC's include path ( +\family typewriter +device/include/pic/ +\family default + in the source tree or +\family typewriter +/usr/local/share/sdcc/include/pic +\family default + after installation). +\newline +You need to add a device specification here to make + the memory layout (code banks, RAM, aliased memory regions, ...) known to + the compiler. + Probably you can copy and modify an existing entry. + The file format is documented at the top of the file. +\end_layout + +\begin_layout Subsection +Interrupt Code +\end_layout + +\begin_layout Standard +For the interrupt function, use the keyword `__interrupt' +\begin_inset LatexCommand index +name "PIC14!interrupt" + +\end_inset + + with level number of 0 (PIC14 only has 1 interrupt so this number is only + there to avoid a syntax error - it ought to be fixed). + E.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +void Intr(void) __interrupt 0 +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +T0IF = 0; /* Clear timer interrupt */ +\newline +} +\end_layout + +\begin_layout Subsection +Linking and Assembling +\end_layout + +\begin_layout Standard +For assembling you can use either GPUTILS' +\begin_inset LatexCommand index +name "gputils (pic tools)" + +\end_inset + + gpasm.exe or MPLAB's mpasmwin.exe. + GPUTILS are available from +\begin_inset LatexCommand url +target "http://sourceforge.net/projects/gputils" + +\end_inset + +. + For linking you can use either GPUTILS' gplink or MPLAB's mplink.exe. + If you use MPLAB and an interrupt function then the linker script file + vectors section will need to be enlarged to link with mplink. +\newline + +\newline +Here is a +\family typewriter +Makefile +\family default + using GPUTILS: +\end_layout + +\begin_layout Verse + +\family typewriter +.c.o: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdcc -V -mpic14 -p16f877 -c $< +\newline + +\newline +$(PRJ).hex: $(OBJS) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +gplink -m -s $(PRJ).lkr + -o $(PRJ).hex $(OBJS) libsdcc.lib +\end_layout + +\begin_layout Standard +Here is a +\family typewriter +Makefile +\family default + using MPLAB: +\end_layout + +\begin_layout Verse + +\family typewriter +.c.o: +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdcc -S -V -mpic14 -p16f877 $< +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mpasmwin /q /o $*.asm +\newline + +\newline +$(PRJ).hex: $(OBJS) + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mplink /v $(PRJ).lkr /m $(PRJ).map /o $(PRJ).hex $(OBJS) libsdcc.lib +\end_layout + +\begin_layout Standard +Please note that indentations within a +\family typewriter +Makefile +\family default + have to be done with a tabulator character. +\end_layout + +\begin_layout Subsection +Command-Line Options +\end_layout + +\begin_layout Standard +Besides the switches common to all SDCC backends, the PIC14 port accepts + the following options (for an updated list see sdcc - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-help): +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-debug-xtra +\begin_inset LatexCommand index +name "PIC14!Options!-\\/-debug-extra" + +\end_inset + + emit debug info in assembly output +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-no-pcode-opt +\begin_inset LatexCommand index +name "PIC14!Options!-\\/-no-pcode-opt" + +\end_inset + + disable (slightly faulty) optimization on pCode +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-loc +\begin_inset LatexCommand index +name "PIC14!Options!-\\/-stack-loc" + +\end_inset + + sets the lowest address of the argument passing stack (defaults to a suitably + large shared databank to reduce BANKSEL overhead) +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-size +\begin_inset LatexCommand index +name "PIC14!Options!-\\/-stack-size" + +\end_inset + + sets the size if the argument passing stack (default: 16, minimum: 4) +\end_layout + +\begin_layout Subsection +Environment Variables +\end_layout + +\begin_layout Standard +The PIC14 port recognizes the following environment variables: +\end_layout + +\begin_layout Description +SDCC_PIC14_SPLIT_LOCALS If set and not empty, sdcc will allocate each temporary + register (the ones called r0xNNNN) in a section of its own. + By default (if this variable is unset), sdcc tries to cluster registers + in sections in order to reduce the BANKSEL overhead when accessing them. +\end_layout + +\begin_layout Subsection +The Library +\end_layout + +\begin_layout Standard +The PIC14 library currently only contains support routines required by the + compiler to implement multiplication, division, and floating point support. + No libc-like replacement is available at the moment, though many of the + common sdcc library sources (in +\family typewriter +device/lib +\family default +) should also compile with the PIC14 port. +\end_layout + +\begin_layout Subsubsection +error: missing definition for symbol ``__gptrget1'' +\end_layout + +\begin_layout Standard +The PIC14 port uses library routines to provide more complex operations + like multiplication, division/modulus and (generic) pointer dereferencing. + In order to add these routines to your project, you must link with PIC14's + +\family typewriter +libsdcc.lib +\family default +. + For single source file projects this is done automatically, more complex + projects must add +\family typewriter +libsdcc.lib +\family default + to the linker's arguments. + Make sure you also add an include path for the library (using the -I switch + to the linker)! +\end_layout + +\begin_layout Subsubsection +Processor mismatch in file ``XXX''. +\end_layout + +\begin_layout Standard +This warning can usually be ignored due to the very good compatibility amongst + 14 +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +, +\end_layout + +\end_inset + +bit PIC +\begin_inset LatexCommand index +name "PIC14" + +\end_inset + + devices. +\end_layout + +\begin_layout Standard +You might also consider recompiling the library for your specific device + by changing the ARCH=p16f877 (default target) entry in +\family typewriter +device/lib/pic/Makefile.in +\family default + and +\family typewriter +device/lib/pic/Makefile +\family default + to reflect your device. + This might even improve performance for smaller devices as unnecessary + BANKSELs might be removed. +\end_layout + +\begin_layout Subsection +Known Bugs +\end_layout + +\begin_layout Subsubsection +Function arguments +\end_layout + +\begin_layout Standard +Functions with variable argument lists (like printf) are not yet supported. + Similarly, taking the address of the first argument passed into a function + does not work: It is currently passed in WREG and has no address... +\end_layout + +\begin_layout Subsubsection +Regression tests fail +\end_layout + +\begin_layout Standard +Though the small subset of regression tests in src/regression passes, SDCC + regression test suite does not, indicating that there are still major bugs + in the port. + However, many smaller projects have successfully used SDCC in the past... +\end_layout + +\begin_layout Standard + +\size footnotesize + +\newpage + +\end_layout + +\begin_layout Section +The PIC16 +\begin_inset LatexCommand index +name "PIC16" + +\end_inset + + port +\end_layout + +\begin_layout Standard +The PIC16 port adds support for Microchip +\begin_inset LatexCommand index +name "Microchip" + +\end_inset + + +\begin_inset Formula $^{\text{TM}}$ +\end_inset + + PIC +\begin_inset LatexCommand index +name "PIC" + +\end_inset + + +\begin_inset Formula $^{\text{TM}}$ +\end_inset + + MCUs with 16 bit wide instructions. + Currently this family of microcontrollers contains the PIC18Fxxx and PIC18Fxxxx +; devices supported by the port include: +\end_layout + +\begin_layout Standard +18F: 242, 248, 252, 258, 442, 448, 452, 458 +\end_layout + +\begin_layout Standard +18F: 1220, 1320 +\end_layout + +\begin_layout Standard +18F: 2220, 2221, 2320, 2321, 2331, 23k20 +\end_layout + +\begin_layout Standard +18F: 2410, 2420, 2423, 2431, 2450, 2455, 2480, 24j10, 24k20 +\end_layout + +\begin_layout Standard +18F: 2510, 2515, 2520, 2523, 2525, 2550, 2580, 2585, 25j10, 25k20 +\end_layout + +\begin_layout Standard +18F: 2610, 2620, 2680, 2682, 2685 +\end_layout + +\begin_layout Standard +18F: 4220, 4221, 4320, 4321, 4331, 43k20 +\end_layout + +\begin_layout Standard +18F: 4410, 4420, 4423, 4431, 4450, 4455, 4480, 44j10, 44k20 +\end_layout + +\begin_layout Standard +18F: 4510, 4515, 4520, 4523, 4525, 4550, 4580, 4585, 45j10, 45k20 +\end_layout + +\begin_layout Standard +18F: 4610, 4620, 4680, 4682, 4685, 46k20 +\end_layout + +\begin_layout Standard +18F: 6520, 6585, 65j50, 6620, 6680, 66j50, 66j55, 66j60, 66j65, 6720, 67j50, + 67j60 +\end_layout + +\begin_layout Standard +18F: 8520, 8585, 85j50, 8620, 8680, 86j50, 86j55, 86j60, 86j65, 8720, 87j50, + 87j60 +\end_layout + +\begin_layout Standard +18F: 96j60, 96j65, 97j60 +\end_layout + +\begin_layout Standard +\noindent +An up-to-date list of supported devices is also available via ' +\family typewriter +sdcc -mpic16 -plist +\family default +'. +\end_layout + +\begin_layout Subsection +Global Options +\end_layout + +\begin_layout Standard +PIC16 port supports the standard command line arguments as supposed, with + the exception of certain cases that will be mentioned in the following + list: +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-callee-saves +\begin_inset LatexCommand index +name "PIC16!Options!-\\/-callee-saves" + +\end_inset + + See - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-all-callee-saves +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-fommit-frame-pointer +\begin_inset LatexCommand index +name "PIC16!Options!-\\/-fommit-frame-pointer" + +\end_inset + + Frame pointer will be omitted when the function uses no local variables. +\end_layout + +\begin_layout Subsection +Port Specific Options +\begin_inset LatexCommand index +name "Options PIC16" + +\end_inset + + +\end_layout + +\begin_layout Standard +The port specific options appear after the global options in the sdcc - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-help output. +\end_layout + +\begin_layout Subsubsection +Code Generation Options +\end_layout + +\begin_layout Standard +These options influence the generated assembler code. +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-pstack-model=[model] Used in conjunction with the command above. + Defines the stack model to be used, valid stack models are: +\end_layout + +\begin_deeper +\begin_layout List +\labelwidthstring 00.00.0000 + +\emph on +small +\emph default + Selects small stack model. + 8 bit stack and frame pointers. + Supports 256 bytes stack size. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\emph on +large +\emph default + Selects large stack model. + 16 bit stack and frame pointers. + Supports 65536 bytes stack size. +\end_layout + +\end_deeper +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-pno-banksel Do not generate BANKSEL assembler directives. +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-extended Enable extended instruction set/literal offset addressing mode. + Use with care! +\end_layout + +\begin_layout Subsubsection +Optimization Options +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-obanksel=n Set optimization level for inserting BANKSELs. +\newline + +\end_layout + +\begin_deeper +\begin_layout List +\labelwidthstring 00.00.0000 +0 no optimization +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +1 checks previous used register and if it is the same then does not emit + BANKSEL, accounts only for labels. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +2 tries to check the location of (even different) symbols and removes BANKSELs + if they are in the same bank. + +\newline + +\emph on +Important: There might be problems if the linker script has data sections + across bank borders! +\end_layout + +\end_deeper +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-denable-peeps Force the usage of peepholes. + Use with care. +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-no-optimize-goto Do not use (conditional) BRA instead of GOTO. +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-optimize-cmp Try to optimize some compares. +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-optimize-df Analyze the dataflow of the generated code and improve it. +\end_layout + +\begin_layout Subsubsection +Assembling Options +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-asm= Sets the full path and name of an external assembler to call. +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-mplab-comp MPLAB +\begin_inset LatexCommand index +name "PIC16!MPLAB" + +\end_inset + + compatibility option. + Currently only suppresses special gpasm directives. +\end_layout + +\begin_layout Subsubsection +Linking Options +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-link= Sets the full path and name of an external linker to call. +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-preplace-udata-with=[kword] Replaces the default udata keyword for allocating + unitialized data variables with [kword]. + Valid keywords are: "udata_acs", "udata_shr", "udata_ovr". +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-ivt-loc=n Place the interrupt vector table at address +\emph on +n +\emph default +. + Useful for bootloaders. +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-nodefaultlibs Do not link default libraries when linking. +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-use-crt= Use a custom run-time module instead of the defaults. +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-no-crt Don't link the default run-time modules +\end_layout + +\begin_layout Subsubsection +Debugging Options +\end_layout + +\begin_layout Standard +Debugging options enable extra debugging information in the output files. +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-debug-xtra Similar to - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-debug +\begin_inset LatexCommand index +name "-\\/-debug" + +\end_inset + +, but dumps more information. +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-debug-ralloc Force register allocator to dump .d file with debugging + information. + is the name of the file being compiled. +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-pcode-verbose Enable pcode debugging information in translation. +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-calltree Dump call tree in .calltree file. +\end_layout + +\begin_layout Description +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-gstack Trace push/pops for stack pointer overflow. +\end_layout + +\begin_layout Subsection +Environment Variables +\end_layout + +\begin_layout Standard +There is a number of environmental variables that can be used when running + SDCC to enable certain optimizations or force a specific program behaviour. + these variables are primarily for debugging purposes so they can be enabled/dis +abled at will. +\end_layout + +\begin_layout Standard +Currently there is only two such variables available: +\end_layout + +\begin_layout Description +OPTIMIZE_BITFIELD_POINTER_GET When this variable exists, reading of structure + bitfields is optimized by directly loading FSR0 with the address of the + bitfield structure. + Normally SDCC will cast the bitfield structure to a bitfield pointer and + then load FSR0. + This step saves data ram and code space for functions that make heavy use + of bitfields. + (i.e., 80 bytes of code space are saved when compiling malloc.c with this + option). + +\end_layout + +\begin_layout Description +NO_REG_OPT Do not perform pCode registers optimization. + This should be used for debugging purposes. + If bugs in the pcode optimizer are found, users can benefit from temporarily + disabling the optimizer until the bug is fixed. +\end_layout + +\begin_layout Subsection +Preprocessor Macros +\end_layout + +\begin_layout Standard +PIC16 +\begin_inset LatexCommand index +name "PIC16" + +\end_inset + + port defines the following preprocessor macros while translating a source. +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard +Macro +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Description +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC_pic16 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Port identification +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +_ +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +_pic16 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Port identification (same as above) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +pic18fxxxx +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +MCU Identification. + +\emph on +xxxx +\emph default + is the microcontrol identification number, i.e. + 452, 6620, etc +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +_ +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +_18Fxxxx +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +MCU Identification (same as above) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +STACK_MODEL_nnn +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +nnn = SMALL or LARGE respectively according to the stack model used +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard +\noindent +In addition the following macros are defined when calling assembler: +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard +Macro +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Description +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +__18Fxxxx +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +MCU Identification. + +\emph on +xxxx +\emph default + is the microcontrol identification number, i.e. + 452, 6620, etc +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC_MODEL_nnn +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +nnn = SMALL or LARGE respectively according to the memory model used for + SDCC +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +STACK_MODEL_nnn +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +nnn = SMALL or LARGE respectively according to the stack model used +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Subsection +Directories +\end_layout + +\begin_layout Standard +PIC16 +\begin_inset LatexCommand index +name "PIC16" + +\end_inset + + port uses the following directories for searching header files and libraries. +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + + + +\begin_inset Text + +\begin_layout Standard +Directory +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Description +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Target +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Command prefix +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +PREFIX/sdcc/include/pic16 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +PIC16 specific headers +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Compiler +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +-I +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +PREFIX/sdcc/lib/pic16 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +PIC16 specific libraries +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Linker +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +-L +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Subsection +Pragmas +\begin_inset LatexCommand label +name "sub:PIC16_Pragmas" + +\end_inset + + +\end_layout + +\begin_layout Standard +The PIC16 +\begin_inset LatexCommand index +name "PIC16" + +\end_inset + + port currently supports the following pragmas: +\end_layout + +\begin_layout Description +stack +\begin_inset LatexCommand index +name "PIC16!Pragmas!\\#pragma stack" + +\end_inset + + This forces the code generator to initialize the stack & frame pointers + at a specific address. + This is an ad hoc solution for cases where no STACK directive is available + in the linker script or gplink is not instructed to create a stack section. +\newline +The + stack pragma should be used only once in a project. + Multiple pragmas may result in indeterminate behaviour of the program. +\begin_inset Foot +status open + +\begin_layout Standard +The old format (ie. + #pragma stack 0x5ff) is deprecated and will cause the stack pointer to + cross page boundaries (or even exceed the available data RAM) and crash + the program. + Make sure that stack does not cross page boundaries when using the SMALL + stack model. +\end_layout + +\end_inset + + +\newline +The format is as follows: +\newline + +\end_layout + +\begin_layout LyX-Code +#pragma stack bottom_address [stack_size] +\newline + +\end_layout + +\begin_layout Standard + +\emph on +bottom_address +\emph default + is the lower bound of the stack section. + The stack pointer initially will point at address (bottom_address+stack_size-1). +\end_layout + +\begin_layout LyX-Code +Example: +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout LyX-Code +/* initializes stack of 100 bytes at RAM address 0x200 */ +\end_layout + +\begin_layout LyX-Code +#pragma stack 0x200 100 +\end_layout + +\begin_layout Standard +If the stack_size field is omitted then a stack is created with the default + size of 64. + This size might be enough for most programs, but its not enough for operations + with deep function nesting or excessive stack usage. +\end_layout + +\begin_layout Description +code +\begin_inset LatexCommand index +name "PIC16!Pragmas!\\#pragma code" + +\end_inset + + Force a function to a static FLASH address. +\end_layout + +\begin_layout LyX-Code +Example: +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout LyX-Code +/* place function test_func at 0x4000 */ +\end_layout + +\begin_layout LyX-Code +#pragma code test_func 0x4000 +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout Description +library instructs the linker to use a library module. +\newline +Usage: +\end_layout + +\begin_layout LyX-Code +#pragma library module_name +\end_layout + +\begin_layout Standard + +\emph on +module_name +\emph default + can be any library or object file (including its path). + Note that there are four reserved keywords which have special meaning. + These are: +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + + +\begin_inset Text + +\begin_layout Standard +Keyword +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Description +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Module to link +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\series bold +ignore +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +ignore all library pragmas +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +(none) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\series bold +c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +link the C library +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +libc18f +\emph default +.lib +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\series bold +math +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +link the Math libarary +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +libm18f +\emph default +.lib +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\series bold +io +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +link the I/O library +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +libio18f* +\emph default +.lib +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\series bold +debug +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +link the debug library +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\emph on +libdebug +\emph default +.lib +\end_layout + +\end_inset + + + + +\end_inset + + +\newline +* is the device number, i.e. + 452 for PIC18F452 MCU. +\end_layout + +\begin_layout Standard +\noindent +This feature allows for linking with specific libraries without having to + explicit name them in the command line. + Note that the +\noun on +ignore +\noun default + keyword will reject all modules specified by the library pragma. +\end_layout + +\begin_layout Description +udata The pragma udata instructs the compiler to emit code so that linker + will place a variable at a specific memory bank. +\end_layout + +\begin_layout LyX-Code +Example: +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout LyX-Code +/* places variable foo at bank2 */ +\end_layout + +\begin_layout LyX-Code +#pragma udata bank2 foo +\end_layout + +\begin_layout LyX-Code +char foo; +\end_layout + +\begin_layout Standard +In order for this pragma to work extra SECTION directives should be added + in the .lkr script. + In the following example a sample .lkr file is shown: +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout LyX-Code +// Sample linker script for the PIC18F452 processor +\end_layout + +\begin_layout LyX-Code +LIBPATH . +\end_layout + +\begin_layout LyX-Code +CODEPAGE NAME=vectors START=0x0 END=0x29 PROTECTED +\end_layout + +\begin_layout LyX-Code +CODEPAGE NAME=page START=0x2A END=0x7FFF +\end_layout + +\begin_layout LyX-Code +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +\end_layout + +\begin_layout LyX-Code +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +\end_layout + +\begin_layout LyX-Code +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +\end_layout + +\begin_layout LyX-Code +CODEPAGE NAME=eedata START=0xF00000 END=0xF000FF PROTECTED +\end_layout + +\begin_layout LyX-Code +ACCESSBANK NAME=accessram START=0x0 END=0x7F +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout LyX-Code +DATABANK NAME=gpr0 START=0x80 END=0xFF +\end_layout + +\begin_layout LyX-Code +DATABANK NAME=gpr1 START=0x100 END=0x1FF +\end_layout + +\begin_layout LyX-Code +DATABANK NAME=gpr2 START=0x200 END=0x2FF +\end_layout + +\begin_layout LyX-Code +DATABANK NAME=gpr3 START=0x300 END=0x3FF +\end_layout + +\begin_layout LyX-Code +DATABANK NAME=gpr4 START=0x400 END=0x4FF +\end_layout + +\begin_layout LyX-Code +DATABANK NAME=gpr5 START=0x500 END=0x5FF +\end_layout + +\begin_layout LyX-Code +ACCESSBANK NAME=accesssfr START=0xF80 END=0xFFF PROTECTED +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout LyX-Code +SECTION NAME=CONFIG ROM=config +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout LyX-Code +SECTION NAME=bank0 RAM=gpr0 # these SECTION directives +\end_layout + +\begin_layout LyX-Code +SECTION NAME=bank1 RAM=gpr1 # should be added to link +\end_layout + +\begin_layout LyX-Code +SECTION NAME=bank2 RAM=gpr2 # section name 'bank?' with +\end_layout + +\begin_layout LyX-Code +SECTION NAME=bank3 RAM=gpr3 # a specific DATABANK name +\end_layout + +\begin_layout LyX-Code +SECTION NAME=bank4 RAM=gpr4 +\end_layout + +\begin_layout LyX-Code +SECTION NAME=bank5 RAM=gpr5 +\end_layout + +\begin_layout Standard +The linker will recognise the section name set in the pragma statement and + will position the variable at the memory bank set with the RAM field at + the SECTION line in the linker script file. +\end_layout + +\begin_layout Subsection +Header Files +\begin_inset LatexCommand label +name "sub:PIC16_Header-Files" + +\end_inset + + +\end_layout + +\begin_layout Standard +There is one main header file +\begin_inset LatexCommand index +name "PIC16!Header files" + +\end_inset + + that can be included to the source files using the pic16 +\begin_inset LatexCommand index +name "PIC16" + +\end_inset + + port. + That file is the +\series bold +pic18fregs.h +\series default +. + This header file contains the definitions for the processor special registers, + so it is necessary if the source accesses them. + It can be included by adding the following line in the beginning of the + file: +\end_layout + +\begin_layout LyX-Code +#include +\end_layout + +\begin_layout Standard +The specific microcontroller is selected within the pic18fregs.h automatically, + so the same source can be used with a variety of devices. +\end_layout + +\begin_layout Subsection +Libraries +\begin_inset LatexCommand label +name "sub:pic16Libraries" + +\end_inset + + +\end_layout + +\begin_layout Standard +The libraries +\begin_inset LatexCommand index +name "PIC16!Libraries" + +\end_inset + + that PIC16 +\begin_inset LatexCommand index +name "PIC16" + +\end_inset + + port depends on are the microcontroller device libraries which contain + the symbol definitions for the microcontroller special function registers. + These libraries have the format pic18fxxxx.lib, where +\emph on +xxxx +\emph default + is the microcontroller identification number. + The specific library is selected automatically by the compiler at link + stage according to the selected device. +\end_layout + +\begin_layout Standard +\noindent +Libraries are created with gplib which is part of the gputils package +\begin_inset LatexCommand url +target "http://sourceforge.net/projects/gputils" + +\end_inset + +. +\end_layout + +\begin_layout Subsubsection* +Building the libraries +\end_layout + +\begin_layout Standard +Before using SDCC/pic16 there are some libraries that need to be compiled. + This process is done automatically if gputils are found at SDCC's compile + time. + Should you require to rebuild the pic16 libraries manually (e.g. + in order to enable output of float values +\begin_inset LatexCommand index +name "Floating point support" + +\end_inset + + via +\family typewriter +printf() +\family default +, see below), these are the steps required to do so under Linux or Mac OS + X (cygwin might work as well, but is untested): +\end_layout + +\begin_layout LyX-Code +cd device/lib/pic16 +\end_layout + +\begin_layout LyX-Code +./configure.gnu +\end_layout + +\begin_layout LyX-Code +cd .. +\end_layout + +\begin_layout LyX-Code +make model-pic16 +\end_layout + +\begin_layout LyX-Code +su -c 'make install' # install the libraries, you need the root password +\end_layout + +\begin_layout LyX-Code +cd ../.. +\end_layout + +\begin_layout Standard +If you need to install the headers too, do: +\end_layout + +\begin_layout LyX-Code +cd device/include +\end_layout + +\begin_layout LyX-Code +su -c 'make install' # install the headers, you need the root password +\end_layout + +\begin_layout Subsubsection* +Output of float values via printf() +\end_layout + +\begin_layout Standard +The library is normally built without support for displaying float values, + only +\begin_inset LatexCommand index +name "" + +\end_inset + + +\begin_inset LatexCommand index +name "printf floating point support" + +\end_inset + + will appear instead of the value. + To change this, rebuild the library as stated above, but call +\family typewriter +./configure.gnu --enable-floats +\family default +instead of just +\family typewriter +./configure.gnu +\family default +. + Also make sure that at least +\family typewriter +libc/stdio/vfprintf.c +\family default + is actually recompiled, e.g. + by +\family typewriter +touch +\family default +ing it after the +\family typewriter +configure +\family default + run or deleting its +\family typewriter +.o +\family default + file. +\end_layout + +\begin_layout Standard +The more common appraoch of compiling +\family typewriter +vfprintf.c +\family default + manually with +\family typewriter +-DUSE_FLOATS=1 +\family default + should also work, but is untested. +\end_layout + +\begin_layout Subsection +Adding New Devices to the Port +\end_layout + +\begin_layout Standard +Adding support for a new 16 +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +, +\end_layout + +\end_inset + +bit PIC MCU requires the following steps: +\end_layout + +\begin_layout Enumerate +Create picDEVICE.c and picDEVICE.h from pDEVICE.inc using +\newline + +\family typewriter +perl /path/to/sdcc/support/scripts/inc2h-pic16.pl /path/to/gputils/header/pDEVICE. +inc +\end_layout + +\begin_layout Enumerate + +\family typewriter +mv picDEVICE.h /path/to/sdcc/device/include/pic16 +\end_layout + +\begin_layout Enumerate + +\family typewriter +mv picDEVICE.c /path/to/sdcc/device/lib/pic16/libdev +\end_layout + +\begin_layout Enumerate +Add DEVICE to +\family typewriter +/path/to/sdcc/device/lib/pic16/pics.all +\family default + +\newline +Note: No 18f prefix here! +\end_layout + +\begin_layout Enumerate +Edit +\family typewriter +/path/to/sdcc/device/include/pic16/adc.h +\newline + +\family default +Add the new devices to the correct ADC style class (depending on the number + of ADC channels). +\newline +Do not touch +\family typewriter +adc.h +\family default + if the device does not offer any ADC at all. +\end_layout + +\begin_layout Enumerate +Edit +\family typewriter +/path/to/sdcc/device/include/pic16/pic18fregs.h +\family default + +\newline +The file format is self-explanatory, just add +\newline + +\family typewriter +#elif defined(picDEVICE) +\newline +# +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash + +\backslash + +\end_layout + +\end_inset + +include +\family default + +\newline +at the right place (keep the file sorted, please). +\end_layout + +\begin_layout Enumerate +Edit +\family typewriter +/path/to/sdcc/device/include/pic16devices.txt +\newline + +\family default +Copy and modify an existing entry or create a new one and insert it at the + correct place (keep the file sorted, please). +\end_layout + +\begin_layout Enumerate +Add the device to +\family typewriter +/path/to/sdcc/device/lib/pic16/libdev/Makefile.am +\family default + +\newline +Copy an existing entry and adjust the device name. +\end_layout + +\begin_layout Enumerate +Add the device to +\family typewriter +/path/to/sdcc/device/lib/pic16/libio/Makefile.am +\family default + +\newline +Copy the record from the 18f2220 and adjust the device name. +\newline +If the new device + does not offer ADC, I +\begin_inset Formula $^{\text{2}}$ +\end_inset + +C, and/or (E)USART functionality as assumed by the library, remove the lines + with references to +\family typewriter +adc/*.c +\family default +, +\family typewriter +usart/*.c +\family default +, or +\family typewriter +usart/*.c +\family default +, respectively. +\end_layout + +\begin_layout Enumerate +Update +\family typewriter +libdev/Makefile.in +\family default + and +\family typewriter +libio/Makefile.in +\family default + using +\newline + +\family typewriter +./bootstrap.sh +\family default + +\newline +in +\family typewriter +/path/to/sdcc/device/lib/pic16 +\family default +. +\end_layout + +\begin_layout Enumerate +Recompile the pic16 libraries as described in +\begin_inset LatexCommand ref +reference "sub:pic16Libraries" + +\end_inset + +. +\end_layout + +\begin_layout Subsection +Memory Models +\end_layout + +\begin_layout Standard +The following memory models are supported by the PIC16 port: +\end_layout + +\begin_layout Itemize +small model +\end_layout + +\begin_layout Itemize +large model +\end_layout + +\begin_layout Standard +Memory model affects the default size of pointers within the source. + The sizes are shown in the next table: +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + + +\begin_inset Text + +\begin_layout Standard +Pointer sizes according to memory model +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +small model +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +large model +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +code pointers +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +16-bits +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +24-bits +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +data pointers +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +16-bits +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +16-bits +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard +It is advisable that all sources within a project are compiled with the + same memory model. + If one wants to override the default memory model, this can be done by + declaring a pointer as +\series bold +far +\series default + or +\series bold +near +\series default +. + Far selects large memory model's pointers, while near selects small memory + model's pointers. +\end_layout + +\begin_layout Standard +The standard device libraries (see +\begin_inset LatexCommand ref +reference "sub:PIC16_Header-Files" + +\end_inset + +) contain no reference to pointers, so they can be used with both memory + models. +\end_layout + +\begin_layout Subsection +Stack +\end_layout + +\begin_layout Standard +The stack +\begin_inset LatexCommand index +name "PIC16!stack" + +\end_inset + + implementation for the PIC16 port uses two indirect registers, FSR1 and + FSR2. +\end_layout + +\begin_layout Description +FSR1 is assigned as stack pointer +\end_layout + +\begin_layout Description +FSR2 is assigned as frame pointer +\end_layout + +\begin_layout Standard +The following stack models are supported by the PIC16 port +\end_layout + +\begin_layout Itemize + +\noun on +small +\noun default + model +\end_layout + +\begin_layout Itemize + +\noun on +large +\noun default + model +\end_layout + +\begin_layout Standard + +\noun on +Small +\noun default + model means that only the FSRxL byte is used to access stack and frame, + while +\emph on +\noun on +large +\emph default +\noun default + uses both FSRxL and FSRxH registers. + The following table shows the stack/frame pointers sizes according to stack + model and the maximum space they can address: +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + + +\begin_inset Text + +\begin_layout Standard +Stack & Frame pointer sizes according to stack model +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +small +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +large +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +Stack pointer FSR1 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +8-bits +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +16-bits +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +Frame pointer FSR2 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +8-bits +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +16-bits +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard +\noindent + +\noun on +Large +\noun default +stack model is currently not working properly throughout the code generator. + So its use is not advised. + Also there are some other points that need special care: +\newline + +\end_layout + +\begin_layout Enumerate +Do not create stack sections with size more than one physical bank (that + is 256 bytes) +\end_layout + +\begin_layout Enumerate +Stack sections should no cross physical bank limits (i.e. + #pragma stack 0x50 0x100) +\end_layout + +\begin_layout Standard +These limitations are caused by the fact that only FSRxL is modified when + using SMALL stack model, so no more than 256 bytes of stack can be used. + This problem will disappear after LARGE model is fully implemented. +\end_layout + +\begin_layout Subsection +Functions +\end_layout + +\begin_layout Standard +In addition to the standard SDCC function keywords, PIC16 +\begin_inset LatexCommand index +name "PIC16" + +\end_inset + + port makes available two more: +\end_layout + +\begin_layout Description +wparam +\begin_inset LatexCommand index +name "PIC16!wparam" + +\end_inset + + Use the WREG to pass one byte of the first function argument. + This improves speed but you may not use this for functions with arguments + that are called via function pointers, otherwise the first byte of the + first parameter will get lost. + Usage: +\end_layout + +\begin_layout LyX-Code +void func_wparam(int a) wparam +\end_layout + +\begin_layout LyX-Code +{ +\end_layout + +\begin_layout LyX-Code + /* WREG hold the lower part of a */ +\end_layout + +\begin_layout LyX-Code + /* the high part of a is stored in FSR2+2 (or +3 for large stack model) + */ +\end_layout + +\begin_layout LyX-Code +... +\end_layout + +\begin_layout LyX-Code +} +\end_layout + +\begin_layout Description +shadowregs +\begin_inset LatexCommand index +name "PIC16!shadowregs" + +\end_inset + + When entering/exiting an ISR, it is possible to take advantage of the PIC18F + hardware shadow registers which hold the values of WREG, STATUS and BSR + registers. + This can be done by adding the keyword +\emph on +shadowregs +\emph default + before the +\emph on +interrupt +\emph default + keyword in the function's header. +\end_layout + +\begin_layout LyX-Code +void isr_shadow(void) shadowregs interrupt 1 +\end_layout + +\begin_layout LyX-Code +{ +\end_layout + +\begin_layout LyX-Code +... +\end_layout + +\begin_layout LyX-Code +} +\end_layout + +\begin_layout Standard + +\emph on +shadowregs +\emph default + instructs the code generator not to store/restore WREG, STATUS, BSR when + entering/exiting the ISR. +\end_layout + +\begin_layout Subsection +Function return values +\end_layout + +\begin_layout Standard +Return values from functions are placed to the appropriate registers following + a modified Microchip policy optimized for SDCC. + The following table shows these registers: +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard +size +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +destination register +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +8 bits +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +WREG +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +16 bits +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +PRODL:WREG +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +24 bits +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +PRODH:PRODL:WREG +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +32 bits +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +FSR0L:PRODH:PRODL:WREG +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +>32 bits +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +on stack, FSR0 points to the beginning +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Subsection +Interrupts +\end_layout + +\begin_layout Standard +An interrupt +\begin_inset LatexCommand index +name "PIC16!interrupt" + +\end_inset + + service routine (ISR) is declared using the +\emph on +interrupt +\emph default + keyword. +\end_layout + +\begin_layout LyX-Code +void isr(void) interrupt +\emph on +n +\end_layout + +\begin_layout LyX-Code +{ +\end_layout + +\begin_layout LyX-Code +... +\end_layout + +\begin_layout LyX-Code +} +\end_layout + +\begin_layout Standard + +\emph on +n +\emph default + is the interrupt number, which for PIC18F devices can be: +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + + +\begin_inset Text + +\begin_layout Standard + +\emph on +n +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Interrupt Vector +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Interrupt Vector Address +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +0 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +RESET vector +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0x000000 +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +1 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +HIGH priority interrupts +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0x000008 +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +2 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +LOW priority interrupts +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0x000018 +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard +When generating assembly code for ISR the code generator places a +\noun on +goto +\noun default +instruction at the +\emph on +Interrupt Vector Address +\emph default + which points at the generated ISR. + This single GOTO instruction is part of an automatically generated +\emph on +interrupt entry point +\emph default + function. + The actuall ISR code is placed as normally would in the code space. + Upon interrupt request, the GOTO instruction is executed which jumps to + the ISR code. + When declaring interrupt functions as _naked this GOTO instruction is +\series bold +not +\series default + generated. + The whole interrupt functions is therefore placed at the Interrupt Vector + Address of the specific interrupt. + This is not a problem for the LOW priority interrupts, but it is a problem + for the RESET and the HIGH priority interrupts because code may be written + at the next interrupt's vector address and cause indeterminate program + behaviour if that interrupt is raised. +\begin_inset Foot +status open + +\begin_layout Standard +This is not a problem when +\end_layout + +\begin_layout Enumerate +this is a HIGH interrupt ISR and LOW interrupts are +\emph on +disabled +\emph default + or not used. +\end_layout + +\begin_layout Enumerate +when the ISR is small enough not to reach the next interrupt's vector address. +\end_layout + +\end_inset + + +\end_layout + +\begin_layout Standard + +\emph on +n +\emph default + may be omitted. + This way a function is generated similar to an ISR, but it is not assigned + to any interrupt. +\end_layout + +\begin_layout Standard +When entering an interrupt, currently the PIC16 +\begin_inset LatexCommand index +name "PIC16" + +\end_inset + + port automatically saves the following registers: +\end_layout + +\begin_layout Itemize +WREG +\end_layout + +\begin_layout Itemize +STATUS +\end_layout + +\begin_layout Itemize +BSR +\end_layout + +\begin_layout Itemize +PROD (PRODL and PRODH) +\end_layout + +\begin_layout Itemize +FSR0 (FSR0L and FSR0H) +\end_layout + +\begin_layout Standard +These registers are restored upon return from the interrupt routine. +\begin_inset Foot +status open + +\begin_layout Standard +NOTE that when the _naked attribute is specified for an interrupt routine, + then NO registers are stored or restored. +\end_layout + +\end_inset + + +\end_layout + +\begin_layout Subsection +Generic Pointers +\end_layout + +\begin_layout Standard +Generic pointers are implemented in PIC16 port as 3-byte (24-bit) types. + There are 3 types of generic pointers currently implemented data, code + and eeprom pointers. + They are differentiated by the value of the 7th and 6th bits of the upper + byte: +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + + + + +\begin_inset Text + +\begin_layout Standard +pointer type +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +7th bit +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +6th bit +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +rest of the pointer +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +description +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +data +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\shape slanted +\emph on +uuuuuu uuuuxxxx xxxxxxxx +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +a 12-bit data pointer in data RAM memory +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +code +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\shape slanted +\emph on +uxxxxx xxxxxxxx xxxxxxxx +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +a 21-bit code pointer in FLASH memory +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +eeprom +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\shape slanted +\emph on +uuuuuu uuuuuuxx xxxxxxxx +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +a 10-bit eeprom pointer in EEPROM memory +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +(unimplemented) +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\shape slanted +\emph on +xxxxxx xxxxxxxx xxxxxxxx +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +unimplemented pointer type +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard +\noindent +Generic pointer are read and written with a set of library functions which + read/write 1, 2, 3, 4 bytes. +\end_layout + +\begin_layout Subsection +PIC16 C Libraries +\end_layout + +\begin_layout Subsubsection +Standard I/O Streams +\end_layout + +\begin_layout Standard +In the +\emph on +stdio.h +\emph default + the type FILE is defined as: +\end_layout + +\begin_layout LyX-Code +typedef char * FILE; +\end_layout + +\begin_layout Standard +This type is the stream type implemented I/O in the PIC18F devices. + Also the standard input and output streams are declared in stdio.h: +\end_layout + +\begin_layout LyX-Code +extern FILE * stdin; +\end_layout + +\begin_layout LyX-Code +extern FILE * stdout; +\end_layout + +\begin_layout Standard +The FILE type is actually a generic pointer which defines one more type + of generic pointers, the +\emph on +stream +\emph default + pointer. + This new type has the format: +\end_layout + +\begin_layout Standard +\noindent +\align center +\begin_inset Tabular + + + + + + + + + + + +\begin_inset Text + +\begin_layout Standard +pointer type +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +<7:6> +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +<5> +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +<4> +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +<3:0> +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +rest of the pointer +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +descrption +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +stream +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +00 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +1 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +0 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +nnnn +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +\shape slanted +\emph on +uuuuuuuu uuuuuuuu +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +upper byte high nubble is 0x2n, the rest are zeroes +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard +\noindent +Currently implemented there are 3 types of streams defined: +\end_layout + +\begin_layout Standard +\noindent +\align center +\begin_inset Tabular + + + + + + + + +\begin_inset Text + +\begin_layout Standard +stream type +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +value +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +module +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +description +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +STREAM_USART +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +0x200000UL +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +USART +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Writes/Reads characters via the USART peripheral +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +STREAM_MSSP +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +0x210000UL +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +MSSP +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Writes/Reads characters via the MSSP peripheral +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +STREAM_USER +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family typewriter +0x2f0000UL +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +(none) +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Writes/Reads characters via used defined functions +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard +\noindent +The stream identifiers are declared as macros in the stdio.h header. +\end_layout + +\begin_layout Standard +\noindent +In the libc library there exist the functions that are used to write to + each of the above streams. + These are +\end_layout + +\begin_layout Description +_ +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +_stream_usart_putchar writes a character at the USART stream +\end_layout + +\begin_layout Description +_ +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +_stream_mssp_putchar writes a character at the MSSP stream +\end_layout + +\begin_layout Description +putchar dummy function. + This writes a character to a user specified manner. +\end_layout + +\begin_layout Standard +In order to increase performance +\emph on +putchar +\emph default + is declared in stdio.h as having its parameter in WREG (it has the wparam + keyword). + In stdio.h exists the macro PUTCHAR(arg) that defines the putchar function + in a user-friendly way. + +\emph on +arg +\emph default + is the name of the variable that holds the character to print. + An example follows: +\end_layout + +\begin_layout LyX-Code +#include +\newline +#include +\newline + +\newline +PUTCHAR( c ) +\end_layout + +\begin_layout LyX-Code +{ +\end_layout + +\begin_layout LyX-Code + PORTA = c; /* dump character c to PORTA */ +\end_layout + +\begin_layout LyX-Code +} +\newline + +\newline +void main(void) +\end_layout + +\begin_layout LyX-Code +{ +\end_layout + +\begin_layout LyX-Code + stdout = STREAM_USER; /* this is not necessary, since stdout points +\end_layout + +\begin_layout LyX-Code + * by default to STREAM_USER */ +\end_layout + +\begin_layout LyX-Code + printf ( +\begin_inset Quotes sld +\end_inset + +This is a printf test +\backslash +n +\begin_inset Quotes srd +\end_inset + +); +\end_layout + +\begin_layout LyX-Code +} +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout Subsubsection +Printing functions +\end_layout + +\begin_layout Standard +PIC16 contains an implementation of the printf-family of functions. + There exist the following functions: +\end_layout + +\begin_layout LyX-Code +extern unsigned int sprintf(char *buf, char *fmt, ...); +\end_layout + +\begin_layout LyX-Code +extern unsigned int vsprintf(char *buf, char *fmt, va_list ap); +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout LyX-Code +extern unsigned int printf(char *fmt, ...); +\end_layout + +\begin_layout LyX-Code +extern unsigned int vprintf(char *fmt, va_lista ap); +\end_layout + +\begin_layout LyX-Code + +\end_layout + +\begin_layout LyX-Code +extern unsigned int fprintf(FILE *fp, char *fmt, ...); +\end_layout + +\begin_layout LyX-Code +extern unsigned int vfprintf(FILE *fp, char *fmt, va_list ap); +\end_layout + +\begin_layout Standard +For sprintf and vsprintf +\emph on +buf +\emph default + should normally be a data pointer where the resulting string will be placed. + No range checking is done so the user should allocate the necessary buffer. + For fprintf and vfprintf +\emph on +fp +\emph default + should be a stream pointer (i.e. + stdout, STREAM_MSSP, etc...). +\end_layout + +\begin_layout Subsubsection +Signals +\end_layout + +\begin_layout Standard +The PIC18F family of microcontrollers supports a number of interrupt sources. + A list of these interrupts is shown in the following table: +\end_layout + +\begin_layout Standard +\align center +\begin_inset Tabular + + + + + + + + +\begin_inset Text + +\begin_layout Standard +signal name +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +description +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +signal name +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +description +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SIG_RB +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +PORTB change interrupt +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +SIG_EE +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +EEPROM/FLASH write complete interrupt +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SIG_INT0 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +INT0 external interrupt +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +SIG_BCOL +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Bus collision interrupt +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SIG_INT1 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +INT1 external interrupt +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +SIG_LVD +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Low voltage detect interrupt +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SIG_INT2 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +INT2 external interrupt +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +SIG_PSP +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Parallel slave port interrupt +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SIG_CCP1 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +CCP1 module interrupt +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +SIG_AD +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +AD convertion complete interrupt +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SIG_CCP2 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +CCP2 module interrupt +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +SIG_RC +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +USART receive interrupt +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SIG_TMR0 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +TMR0 overflow interrupt +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +SIG_TX +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +USART transmit interrupt +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SIG_TMR1 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +TMR1 overflow interrupt +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +SIG_MSSP +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +SSP receive/transmit interrupt +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SIG_TMR2 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +TMR2 matches PR2 interrupt +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SIG_TMR3 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +TMR3 overflow interrupt +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard +\noindent +The prototypes for these names are defined in the header file +\emph on +signal.h +\emph default + . +\end_layout + +\begin_layout Standard +\noindent +In order to simplify signal handling, a number of macros is provided: +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +DEF_INTHIGH(name) begin the definition of the interrupt dispatch table for + high priority interrupts. + +\emph on +name +\emph default + is the function name to use. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +DEF_INTLOW(name) begin the definition of the interrupt dispatch table fo + low priority interrupt. + +\emph on +name +\emph default + is the function name to use. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +DEF_HANDLER(sig,handler) define a handler for signal +\emph on +sig. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +END_DEF end the declaration of the dispatch table. +\end_layout + +\begin_layout Standard +Additionally there are two more macros to simplify the declaration of the + signal handler: +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 + +\series medium +SIGHANDLER(handler) +\series default + this declares the function prototype for the +\emph on +handler +\emph default + function. +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +SIGHANDLERNAKED(handler) same as SIGHANDLER() but declares a naked function. +\end_layout + +\begin_layout Standard +An example of using the macros above is shown below: +\end_layout + +\begin_layout LyX-Code +#include +\end_layout + +\begin_layout LyX-Code +#include +\newline + +\newline +DEF_INTHIGH(high_int) +\end_layout + +\begin_layout LyX-Code +DEF_HANDLER(SIG_TMR0, _tmr0_handler) +\end_layout + +\begin_layout LyX-Code +DEF_HANDLER(SIG_BCOL, _bcol_handler) +\end_layout + +\begin_layout LyX-Code +END_DEF +\newline + +\newline +SIGHANDLER(_tmr0_handler) +\end_layout + +\begin_layout LyX-Code +{ +\end_layout + +\begin_layout LyX-Code + /* action to be taken when timer 0 overflows */ +\end_layout + +\begin_layout LyX-Code +} +\newline + +\newline +SIGHANDLERNAKED(_bcol_handler) +\end_layout + +\begin_layout LyX-Code +{ +\end_layout + +\begin_layout LyX-Code + _asm +\end_layout + +\begin_layout LyX-Code + /* action to be taken when bus collision occurs */ +\end_layout + +\begin_layout LyX-Code + retfie +\end_layout + +\begin_layout LyX-Code + _endasm; +\end_layout + +\begin_layout LyX-Code +} +\end_layout + +\begin_layout Standard + +\series bold +NOTES: +\series default + Special care should be taken when using the above scheme: +\end_layout + +\begin_layout Itemize +do not place a colon (;) at the end of the DEF_* and END_DEF macros. +\end_layout + +\begin_layout Itemize +when declaring SIGHANDLERNAKED handler never forget to use +\emph on +retfie +\emph default + for proper returning. +\end_layout + +\begin_layout Subsection +PIC16 Port -- Tips +\end_layout + +\begin_layout Standard +Here you can find some general tips for compiling programs with SDCC/pic16. +\end_layout + +\begin_layout Subsubsection +Stack size +\end_layout + +\begin_layout Standard +The default stack +\begin_inset LatexCommand index +name "PIC16!stack" + +\end_inset + + size (that is 64 bytes) probably is enough for many programs. + One must take care that when there are many levels of function nesting, + or there is excessive usage of stack, its size should be extended. + An example of such a case is the printf/sprintf family of functions. + If you encounter problems like not being able to print integers, then you + need to set the stack size around the maximum (256 for small stack model). + The following diagram shows what happens when calling printf to print an + integer: +\end_layout + +\begin_layout LyX-Code +printf () --> ltoa () --> ultoa () --> divschar () +\end_layout + +\begin_layout Standard +It is should be understood that stack is easily consumed when calling complicate +d functions. + Using command line arguments like - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-fommit-frame-pointer might reduce stack usage by not creating unnecessery + stack frames. + Other ways to reduce stack usage may exist. +\end_layout + +\begin_layout Subsection +Known Bugs +\end_layout + +\begin_layout Subsubsection +Extended Instruction Set +\end_layout + +\begin_layout Standard +The PIC16 port emits code which is incompatible with the extended instruction + set available with many newer devices. + Make sure to always explicitly disable it, usually using +\end_layout + +\begin_layout Standard + +\family typewriter +static __code char __at(__CONFIG4L) conf4l = /* more flags & */ _XINST_OFF_4L; +\end_layout + +\begin_layout Standard +\noindent +Some devices (namely 18f2455, 18f2550, 18f4455, and 18f4550) use _ENHCPU_OFF_4L + instead of _XINST_OFF_4L. +\end_layout + +\begin_layout Subsubsection +Regression Tests +\end_layout + +\begin_layout Standard +The PIC16 port currently passes most but not all of the tests in SDCC's + regression test +\begin_inset LatexCommand index +name "Regression test (PIC16)" + +\end_inset + + suite (see section +\begin_inset LatexCommand ref +reference "sec:Quality-control" + +\end_inset + +), thus no automatic regression tests are currently performed for the PIC16 + target. +\end_layout + +\begin_layout Chapter +Debugging +\end_layout + +\begin_layout Standard +There are several approaches to debugging your code. + This chapter is meant to show your options and to give detail on some of + them: +\newline + +\newline +When writing your code: +\end_layout + +\begin_layout Itemize +write your code with debugging in mind (avoid duplicating code, put conceptually + similar variables into structs, use structured code, have strategic points + within your code where all variables are consistent, ...) +\end_layout + +\begin_layout Itemize +run a syntax-checking tool like splint +\begin_inset LatexCommand index +name "splint (syntax checking tool)" + +\end_inset + + +\begin_inset LatexCommand index +name "lint (syntax checking tool)" + +\end_inset + + (see - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-more-pedantic +\begin_inset LatexCommand ref +reference "lyx:more-pedantic-SPLINT" + +\end_inset + +) over the code. +\end_layout + +\begin_layout Itemize +for the high level code use a C-compiler (like f.e. + GCC) to compile run and debug the code on your host. + See (see - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-more-pedantic +\begin_inset LatexCommand ref +reference "lyx:more-pedantic-SPLINT" + +\end_inset + +) on how to handle syntax extensions like __xdata, __at(), ... + +\end_layout + +\begin_layout Itemize +use another C-compiler to compile code for your target. + Always an option but not recommended:) And not very likely to help you. + If you seriously consider walking this path you should at least occasionally + check portability of your code. + Most commercial compiler vendors will offer an evaluation version so you + can test compile your code or snippets of your code. +\end_layout + +\begin_layout Standard +Debugging on a simulator: +\end_layout + +\begin_layout Itemize +there is a separate section about SDCDB (section +\begin_inset LatexCommand ref +reference "cha:Debugging-with-SDCDB" + +\end_inset + +) below. +\end_layout + +\begin_layout Itemize +or (8051 specific) use a free open source/commercial simulator which interfaces + to the AOMF +\begin_inset LatexCommand index +name "AOMF, AOMF51" + +\end_inset + + file (see +\begin_inset LatexCommand ref +reference "OMF file" + +\end_inset + +) optionally generated by SDCC. +\end_layout + +\begin_layout Standard +Debugging On-target: +\end_layout + +\begin_layout Itemize +use a MCU port pin to serially output debug data to the RS232 port of your + host. + You'll probably want some level shifting device typically involving a MAX232 + or similar IC. + If the hardware serial port of the MCU is not available search for 'Software + UART' in your favourite search machine. +\end_layout + +\begin_layout Itemize +use an on-target monitor. + In this context a monitor is a small program which usually accepts commands + via a serial line and allows to set program counter, to single step through + a program and read/write memory locations. + For the 8051 good examples of monitors are paulmon and cmon51 (see section + +\begin_inset LatexCommand ref +reference "sec:Related-open-source-tools" + +\end_inset + +). +\end_layout + +\begin_layout Itemize +toggle MCU port pins at strategic points within your code and use an oscilloscop +e. + A +\emph on +digital oscilloscope +\emph default + +\begin_inset LatexCommand index +name "Oscilloscope" + +\end_inset + + with deep trace memory is really helpful especially if you have to debug + a realtime application. + If you need to monitor more pins than your oscilloscope provides you can + sometimes get away with a small R-2R network. + On a single channel oscilloscope you could f.e. + monitor 2 push-pull driven pins by connecting one via a 10\InsetSpace ~ +k +\begin_inset Formula $\Omega$ +\end_inset + + resistor and the other one by a 5\InsetSpace ~ +k +\begin_inset Formula $\Omega$ +\end_inset + + resistor to the oscilloscope probe (check output drive capability of the + pins you want to monitor). + If you need to monitor many more pins a +\emph on +logic analyzer +\emph default + will be handy. +\end_layout + +\begin_layout Itemize +use an ICE ( +\emph on +i +\emph default +n +\emph on +c +\emph default +ircuit +\emph on +e +\emph default +mulator +\begin_inset LatexCommand index +name "ICE (in circuit emulator)" + +\end_inset + +). + Usually very expensive. + And very nice to have too. + And usually locks you (for years...) to the devices the ICE can emulate. + +\end_layout + +\begin_layout Itemize +use a remote debugger. + In most 8-bit systems the symbol information is not available on the target, + and a complete debugger is too bulky for the target system. + Therefore usually a debugger on the host system connects to an on-target + debugging stub which accepts only primitive commands. + +\newline +Terms to enter into your favourite search engine could be 'remote debugging', + 'gdb stub' or 'inferior debugger'. + (is there one?) +\end_layout + +\begin_layout Itemize +use an on target hardware debugger. + Some of the more modern MCUs include hardware support for setting break + points and monitoring/changing variables by using dedicated hardware pins. + This facility doesn't require additional code to run on the target and + +\emph on +usually +\emph default + doesn't affect runtime behaviour until a breakpoint is hit. + For the mcs51 most hardware debuggers use the AOMF +\begin_inset LatexCommand index +name "AOMF, AOMF51" + +\end_inset + + file (see +\begin_inset LatexCommand ref +reference "OMF file" + +\end_inset + +) as input file. + +\end_layout + +\begin_layout Standard +Last not least: +\end_layout + +\begin_layout Itemize +if you are not familiar with any of the following terms you're likely to + run into problems rather sooner than later: +\emph on +volatile +\emph default +, +\emph on +atomic +\emph default +, +\emph on +memory map +\emph default +, +\emph on +overlay +\emph default +. + As an embedded programmer you +\emph on +have +\emph default + to know them so why not look them up +\emph on +before +\emph default + you have problems?) +\end_layout + +\begin_layout Itemize +tell someone else about your problem (actually this is a surprisingly effective + means to hunt down the bug even if the listener is not familiar with your + environment). + As 'failure to communicate' is probably one of the job-induced deformations + of an embedded programmer this is highly encouraged. +\end_layout + +\begin_layout Section +Debugging with SDCDB +\begin_inset LatexCommand label +name "cha:Debugging-with-SDCDB" + +\end_inset + + +\begin_inset LatexCommand index +name "SDCDB (debugger)" + +\end_inset + + +\end_layout + +\begin_layout Standard +SDCC is distributed with a source level debugger +\begin_inset LatexCommand index +name "Debugger" + +\end_inset + +. + The debugger uses a command line interface, the command repertoire of the + debugger has been kept as close to gdb +\begin_inset LatexCommand index +name "gdb" + +\end_inset + + (the GNU debugger) as possible. + The configuration and build process is part of the standard compiler installati +on, which also builds and installs the debugger in the target directory + specified during configuration. + The debugger allows you debug BOTH at the C source and at the ASM source + level. +\end_layout + +\begin_layout Subsection +Compiling for Debugging +\end_layout + +\begin_layout Standard +The - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-debug +\begin_inset LatexCommand index +name "-\\/-debug" + +\end_inset + + option must be specified for all files for which debug information is to + be generated. + The compiler generates a .adb file for each of these files. + The linker creates the .cdb +\begin_inset LatexCommand index +name ".cdb" + +\end_inset + + file from the .adb +\begin_inset LatexCommand index +name ".adb" + +\end_inset + + files and the address information. + This .cdb is used by the debugger. +\end_layout + +\begin_layout Subsection +How the Debugger Works +\end_layout + +\begin_layout Standard +When the - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-debug option is specified the compiler generates extra symbol information + some of which are put into the assembler source and some are put into the + .adb file. + Then the linker creates the .cdb file from the individual .adb files with + the address information for the symbols. + The debugger reads the symbolic information generated by the compiler & + the address information generated by the linker. + It uses the SIMULATOR (Daniel's S51) to execute the program, the program + execution is controlled by the debugger. + When a command is issued for the debugger, it translates it into appropriate + commands for the simulator. + (Currently SDCDM only connects to the simulator but +\emph on +newcdb +\emph default + at +\begin_inset LatexCommand url +target "http://ec2drv.sf.net/" + +\end_inset + + is an effort to connect directly to the hardware.) +\end_layout + +\begin_layout Subsection +Starting the Debugger SDCDB +\end_layout + +\begin_layout Standard +The debugger can be started using the following command line. + (Assume the file you are debugging has the file name foo). +\newline + +\newline + +\family sans +\series bold +sdcdb foo +\newline + +\family default +\series default + +\newline +The debugger will look for the following files. +\end_layout + +\begin_layout Itemize +foo.c - the source file. +\end_layout + +\begin_layout Itemize +foo.cdb - the debugger symbol information file. +\end_layout + +\begin_layout Itemize +foo.ihx - the Intel hex format +\begin_inset LatexCommand index +name "Intel hex format" + +\end_inset + + object file. +\end_layout + +\begin_layout Subsection +SDCDB Command Line Options +\end_layout + +\begin_layout Itemize +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-directory= this option can used to specify the directory + search list. + The debugger will look into the directory list specified for source, cdb + & ihx files. + The items in the directory list must be separated by ':', e.g. + if the source files can be in the directories /home/src1 and /home/src2, + the - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-directory option should be - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-directory=/home/src1:/home/src2. + Note there can be no spaces in the option. + +\end_layout + +\begin_layout Itemize +-cd - change to the . +\end_layout + +\begin_layout Itemize +-fullname - used by GUI front ends. +\end_layout + +\begin_layout Itemize +-cpu - this argument is passed to the simulator please see the + simulator docs for details. +\end_layout + +\begin_layout Itemize +-X this options is passed to the simulator please see + the simulator docs for details. +\end_layout + +\begin_layout Itemize +-s passed to simulator see the simulator docs for details. +\end_layout + +\begin_layout Itemize +-S passed to simulator see the simulator docs for details. +\end_layout + +\begin_layout Itemize +-k passed to simulator see the simulator docs for details. +\end_layout + +\begin_layout Subsection +SDCDB Debugger Commands +\end_layout + +\begin_layout Standard +As mentioned earlier the command interface for the debugger has been deliberatel +y kept as close the GNU debugger gdb, as possible. + This will help the integration with existing graphical user interfaces + (like ddd, xxgdb or xemacs) existing for the GNU debugger. + If you use a graphical user interface for the debugger you can skip this + section. +\end_layout + +\begin_layout Subsubsection* +break [line | file:line | function | file:function] +\end_layout + +\begin_layout Standard +Set breakpoint at specified line or function: +\newline + +\newline + +\family sans +\series bold +sdcdb>break 100 +\newline +sdcdb>break foo.c:100 +\newline +sdcdb>break funcfoo +\newline +sdcdb>break foo.c:funcfoo +\end_layout + +\begin_layout Subsubsection* +clear [line | file:line | function | file:function ] +\end_layout + +\begin_layout Standard +Clear breakpoint at specified line or function: +\newline + +\newline + +\family sans +\series bold +sdcdb>clear 100 +\newline +sdcdb>clear foo.c:100 +\newline +sdcdb>clear funcfoo +\newline +sdcdb>clear foo.c:funcfoo +\end_layout + +\begin_layout Subsubsection* +continue +\end_layout + +\begin_layout Standard +Continue program being debugged, after breakpoint. +\end_layout + +\begin_layout Subsubsection* +finish +\end_layout + +\begin_layout Standard +Execute till the end of the current function. +\end_layout + +\begin_layout Subsubsection* +delete [n] +\end_layout + +\begin_layout Standard +Delete breakpoint number 'n'. + If used without any option clear ALL user defined break points. +\end_layout + +\begin_layout Subsubsection* +info [break | stack | frame | registers ] +\end_layout + +\begin_layout Itemize +info break - list all breakpoints +\end_layout + +\begin_layout Itemize +info stack - show the function call stack. +\end_layout + +\begin_layout Itemize +info frame - show information about the current execution frame. +\end_layout + +\begin_layout Itemize +info registers - show content of all registers. +\end_layout + +\begin_layout Subsubsection* +step +\end_layout + +\begin_layout Standard +Step program until it reaches a different source line. + Note: pressing repeats the last command. +\end_layout + +\begin_layout Subsubsection* +next +\end_layout + +\begin_layout Standard +Step program, proceeding through subroutine calls. +\end_layout + +\begin_layout Subsubsection* +run +\end_layout + +\begin_layout Standard +Start debugged program. +\end_layout + +\begin_layout Subsubsection* +ptype variable +\end_layout + +\begin_layout Standard +Print type information of the variable. +\end_layout + +\begin_layout Subsubsection* +print variable +\end_layout + +\begin_layout Standard +print value of variable. +\end_layout + +\begin_layout Subsubsection* +file filename +\end_layout + +\begin_layout Standard +load the given file name. + Note this is an alternate method of loading file for debugging. +\end_layout + +\begin_layout Subsubsection* +frame +\end_layout + +\begin_layout Standard +print information about current frame. +\end_layout + +\begin_layout Subsubsection* +set srcmode +\end_layout + +\begin_layout Standard +Toggle between C source & assembly source. +\end_layout + +\begin_layout Subsubsection* +! simulator command +\end_layout + +\begin_layout Standard +Send the string following '!' to the simulator, the simulator response is + displayed. + Note the debugger does not interpret the command being sent to the simulator, + so if a command like 'go' is sent the debugger can loose its execution + context and may display incorrect values. +\end_layout + +\begin_layout Subsubsection* +quit +\end_layout + +\begin_layout Standard +"Watch me now. + Iam going Down. + My name is Bobby Brown" +\end_layout + +\begin_layout Subsection +Interfacing SDCDB with DDD +\end_layout + +\begin_layout Standard +\begin_inset Note Note +status collapsed + +\begin_layout Standard +The screenshot was converted from png to eps with: +\begin_inset Quotes sld +\end_inset + +bmeps -c -e8f -p3 ddd_example.png >ddd_example.eps +\begin_inset Quotes srd +\end_inset + + which produces a pretty compact eps file which is free from compression + artifacts. +\end_layout + +\begin_layout Standard +The screenshot was included in sdccman.lyx cvs version 1.120 but later removed + as this broke the build system on Sourceforge (pdf-file was broken. + pdflatex does not accept eps files). +\end_layout + +\end_inset + + +\end_layout + +\begin_layout Standard +The +\emph on +p +\emph default +ortable +\emph on +n +\emph default +etwork +\emph on +g +\emph default +raphics File +\size footnotesize + +\begin_inset LatexCommand url +target "http://sdcc.svn.sourceforge.net/viewvc/*checkout*/sdcc/trunk/sdcc/doc/figures/ddd_example.png" + +\end_inset + + +\size default + shows a screenshot of a debugging session with DDD +\begin_inset LatexCommand index +name "DDD (debugger)" + +\end_inset + + (Unix only) on a simulated 8032. + The debugging session might not run as smoothly as the screenshot suggests. + The debugger allows setting of breakpoints, displaying and changing variables, + single stepping through C and assembler code. + +\newline +The source was compiled with +\family sans +\series bold + +\newline + +\newline +sdcc - +\family default +\series default + +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\family sans +\series bold +-debug ddd_example.c +\family default +\series default + +\family sans +\series bold + +\newline + +\family default +\series default + +\newline +and DDD was invoked with +\family sans +\series bold + +\newline + +\newline +ddd -debugger "sdcdb -cpu 8032 ddd_example" +\end_layout + +\begin_layout Standard +\begin_inset Note Note +status open + +\begin_layout Standard +Check that the double quotes or an apostrophe within the command line survive + the LyX tool chain. + Previously the apostrophes got slanted in the PDF output so a cut and paste + did not work. +\end_layout + +\end_inset + + +\end_layout + +\begin_layout Subsection +Interfacing SDCDB with XEmacs +\begin_inset LatexCommand index +name "XEmacs" + +\end_inset + + +\begin_inset LatexCommand index +name "Emacs" + +\end_inset + + +\end_layout + +\begin_layout Standard +Two files (in emacs lisp) are provided for the interfacing with XEmacs, + sdcdb.el and sdcdbsrc.el. + These two files can be found in the $(prefix)/bin directory after the installat +ion is complete. + These files need to be loaded into XEmacs for the interface to work. + This can be done at XEmacs startup time by inserting the following into + your '.xemacs' file (which can be found in your HOME directory): +\newline + +\newline + +\family typewriter +(load-file sdcdbsrc.el) +\family default + +\newline + +\newline +.xemacs is a lisp file so the () around the command is REQUIRED. + The files can also be loaded dynamically while XEmacs is running, set the + environment variable 'EMACSLOADPATH' to the installation bin directory + (/bin), then enter the following command ESC-x load-file sdcdbsrc. + To start the interface enter the following command: +\newline + +\newline + +\family sans +\series bold +ESC-x sdcdbsrc +\family default +\series default + +\newline + +\newline +You will prompted to enter the file name to be debugged. + +\newline + +\newline +The command line options that are passed to the simulator directly are + bound to default values in the file sdcdbsrc.el. + The variables are listed below, these values maybe changed as required. +\end_layout + +\begin_layout Itemize +sdcdbsrc-cpu-type '51 +\end_layout + +\begin_layout Itemize +sdcdbsrc-frequency '11059200 +\end_layout + +\begin_layout Itemize +sdcdbsrc-serial nil +\end_layout + +\begin_layout Standard +The following is a list of key mapping for the debugger interface. +\end_layout + +\begin_layout Standard +\InsetSpace ~ + +\family typewriter + +\newline +;;\InsetSpace ~ +Current Listing :: +\newline +;;key\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +binding\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +Comment +\newline +;;---\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +-------\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +------- +\newline +;; +\newline +;;\InsetSpace ~ +n\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdcdb-next-fro +m-src\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +SDCDB next command +\newline +;;\InsetSpace ~ +b\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdcdb-back-from-src\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +SDCDB back command +\newline +;;\InsetSpace ~ +c\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdcdb-cont-f +rom-src\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +SDCDB continue command +\newline +;;\InsetSpace ~ +s\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdcdb-step-from-src\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +SDCDB step command +\newline +;;\InsetSpace ~ +?\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdcdb-w +hatis-c-sexp\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +SDCDB ptypecommand for data at +\newline +;;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +buffer point +\newline +;;\InsetSpace ~ +x\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdcdbsrc-delete\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +SDCD +B Delete all breakpoints if no arg +\newline +;;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +given or delete arg (C-u arg x) +\newline +;;\InsetSpace ~ +m\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdcdbsrc +-frame\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +SDCDB Display current frame if no arg, +\newline +;;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +given or display frame arg + +\newline +;;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +buffer point +\newline +;;\InsetSpace ~ +!\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdcdbsrc-goto-sdcdb\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +Goto the SDCDB output buffer +\newline +;;\InsetSpace ~ +p\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdcdb-prin +t-c-sexp\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +SDCDB print command for data at +\newline +;;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +buffer point +\newline +;;\InsetSpace ~ +g\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdcdbsrc-goto-sdcdb\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +Got +o the SDCDB output buffer +\newline +;;\InsetSpace ~ +t\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdcdbsrc-mode\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +Toggles Sdcdbsrc mode (turns it + off) +\newline +;; +\newline +;;\InsetSpace ~ +C-c\InsetSpace ~ +C-f\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdcdb-finish-from-src\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +SDCDB finish command +\newline +;; +\newline +;;\InsetSpace ~ +C-x\InsetSpace ~ +SPC\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdcdb-brea +k\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +Set break for line with point +\newline +;;\InsetSpace ~ +ESC\InsetSpace ~ +t\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdcdbsrc-mode\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +Toggle Sdcdbsrc mode +\newline +;;\InsetSpace ~ +ESC\InsetSpace ~ +m\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sdc +dbsrc-srcmode\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +Toggle list mode +\newline +;; +\newline + +\family default + +\newpage + +\end_layout + +\begin_layout Chapter +TIPS +\end_layout + +\begin_layout Standard +Here are a few guidelines that will help the compiler generate more efficient + code, some of the tips are specific to this compiler others are generally + good programming practice. +\end_layout + +\begin_layout Itemize +Use the smallest data type to represent your data-value. + If it is known in advance that the value is going to be less than 256 then + use an 'unsigned char' instead of a 'short' or 'int'. + Please note, that ANSI C requires both signed and unsigned chars to be + promoted to 'signed int' +\begin_inset LatexCommand index +name "promotion to signed int" + +\end_inset + + +\begin_inset Marginal +status collapsed + +\begin_layout Standard + +\series bold +\InsetSpace ~ +! +\end_layout + +\end_inset + + before doing any operation. + This promotion +\begin_inset LatexCommand index +name "type promotion" + +\end_inset + + +\begin_inset LatexCommand label +name "type promotion" + +\end_inset + + can be omitted, if the result is the same. + The effect of the promotion rules together with the sign-extension is often + surprising: +\end_layout + +\begin_deeper +\begin_layout Verse + +\family typewriter +unsigned char uc = 0xfe; +\newline +if (uc * uc < 0) /* this is true! */ +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +.... +\newline +} +\end_layout + +\begin_layout Standard + +\family typewriter +uc * uc +\family default + is evaluated as +\family typewriter +(int) uc * (int) uc = (int) 0xfe * (int) 0xfe = (int) 0xfc04 = -1024 +\family default +. + +\newline +Another one: +\end_layout + +\begin_layout Verse + +\family typewriter +(unsigned char) -12 / (signed char) -3 = ... +\end_layout + +\begin_layout Standard +No, the result is not 4: +\end_layout + +\begin_layout Verse + +\family typewriter +(int) (unsigned char) -12 / (int) (signed char) -3 = +\newline +(int) (unsigned char) + 0xf4 / (int) (signed char) 0xfd = +\newline +(int) 0x00f4 / (int) 0xfffd = +\newline +(int) 0x00f4 + / (int) 0xfffd = +\newline +(int) 244 / (int) -3 = +\newline +(int) -81 = (int) 0xffaf; +\end_layout + +\begin_layout Standard +Don't complain, that gcc gives you a different result. + gcc uses 32 bit ints, while SDCC uses 16 bit ints. + Therefore the results are different. +\newline +From +\begin_inset Quotes sld +\end_inset + +comp.lang.c FAQ +\begin_inset Quotes srd +\end_inset + +: +\end_layout + +\begin_layout Quote + +\emph on +If well-defined overflow characteristics are important and negative values + are not, or if you want to steer clear of sign-extension problems when + manipulating bits or bytes, use one of the corresponding unsigned types. + (Beware when mixing signed and unsigned values in expressions, though.) +\newline +Although + character types (especially unsigned char) can be used as "tiny" integers, + doing so is sometimes more trouble than it's worth, due to unpredictable + sign extension and increased code size. +\end_layout + +\end_deeper +\begin_layout Itemize +Use unsigned when it is known in advance that the value is not going to + be negative. + This helps especially if you are doing division or multiplication, bit-shifting + or are using an array index. +\end_layout + +\begin_layout Itemize +NEVER jump into a LOOP. +\end_layout + +\begin_layout Itemize +Declare the variables to be local +\begin_inset LatexCommand index +name "local variables" + +\end_inset + + whenever possible, especially loop control variables (induction). +\end_layout + +\begin_layout Itemize +Have a look at the assembly listing to get a +\begin_inset Quotes sld +\end_inset + +feeling +\begin_inset Quotes srd +\end_inset + + for the code generation. +\end_layout + +\begin_layout Section +Porting code from or to other compilers +\begin_inset LatexCommand label +name "sec:Porting-code-to-other-compilers" + +\end_inset + + +\end_layout + +\begin_layout Itemize +check whether endianness of the compilers differs and adapt where needed. +\end_layout + +\begin_layout Itemize +check the device specific header files +\begin_inset LatexCommand index +name "Header files" + +\end_inset + + +\begin_inset LatexCommand index +name "Include files" + +\end_inset + + for compiler specific syntax. + Eventually include the file +\begin_inset LatexCommand url +target "http://sdcc.svn.sourceforge.net/viewvc/sdcc/trunk/sdcc/device/include/mcs51/compiler.h?view=markup" + +\end_inset + + to allow using common header files. + (see f.e. + cc2510fx.h +\begin_inset LatexCommand url +target "http://sdcc.svn.sourceforge.net/viewvc/sdcc/trunk/sdcc/device/include/mcs51/cc2510fx.h?view=markup" + +\end_inset + +). +\end_layout + +\begin_layout Itemize +check whether the startup code contains the correct initialization (watchdog, + peripherals). +\end_layout + +\begin_layout Itemize +check whether the sizes of short, int, long match. +\end_layout + +\begin_layout Itemize +check if some 16 or 32 bit hardware registers require a specific addressing + order (least significant or most significant byte first) and adapt if needed + ( +\emph on +first +\emph default + and +\emph on +last +\emph default + relate to time and not to lower/upper memory location here, so this is + +\emph on +not +\emph default + the same as endianness). +\end_layout + +\begin_layout Itemize +check whether the keyword +\emph on +volatile +\emph default + is used where needed. + The compilers might differ in their optimization characteristics (as different + versions of the same compiler might also use more clever optimizations + this is good idea anyway). + See section +\begin_inset LatexCommand ref +reference "sub:Common-interrupt-pitfall-volatile" + +\end_inset + +. +\end_layout + +\begin_layout Itemize +check that the compilers are not told to suppress warnings. +\end_layout + +\begin_layout Itemize +check and convert compiler specific extensions (interrupts, memory areas, + pragmas etc.). +\end_layout + +\begin_layout Itemize +check for differences in type promotion. + Especially check for math operations on +\family typewriter +char +\family default + or +\family typewriter +unsigned char +\family default + variables. + For the sake of C99 compatibility SDCC will probably promote these to +\family typewriter +int +\family default + more often than other compilers. + Eventually insert explicit casts to +\family typewriter +(char) +\family default + or +\family typewriter +(unsigned char) +\family default +. + Also check that the ~\InsetSpace ~ +operator +\begin_inset LatexCommand index +name "\\~\\/ Operator" + +\end_inset + + is not used on +\family typewriter +bit +\begin_inset LatexCommand index +name "bit" + +\end_inset + + +\family default + variables, use the !\InsetSpace ~ +operator instead. + See sections +\begin_inset LatexCommand ref +reference "type promotion" + +\end_inset + + and +\begin_inset LatexCommand ref +reference "sec:Compatibility-with-previous" + +\end_inset + +. +\end_layout + +\begin_layout Itemize +check the assembly code generated for interrupt routines (f.e. + for calls to possibly non-reentrant library functions). +\end_layout + +\begin_layout Itemize +check whether timing loops result in proper timing (or preferably consider + a rewrite of the code with timer based delays instead). +\end_layout + +\begin_layout Itemize +check for differences in printf parameters (some compilers push (va_arg +\begin_inset LatexCommand index +name "vararg, va\\_arg" + +\end_inset + +) char variables as +\family typewriter +int +\family default + others push them as +\family typewriter +char +\family default +. + See section +\begin_inset LatexCommand ref +reference "sec:Compatibility-with-previous" + +\end_inset + +). +\end_layout + +\begin_layout Itemize +check the resulting memory map +\begin_inset LatexCommand index +name "Memory map" + +\end_inset + +. + Usage of different memory spaces: code, stack, data (for mcs51/ds390 additional +ly idata, pdata, xdata). + Eventually check if unexpected library functions are included. +\end_layout + +\begin_layout Section +Tools +\begin_inset LatexCommand index +name "Tools" + +\end_inset + + included in the distribution +\end_layout + +\begin_layout Standard +\align left +\begin_inset Tabular + + + + + + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Name +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Purpose +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Directory +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +uCsim +\begin_inset LatexCommand index +name "uCsim" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Simulator for various architectures +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +sdcc/sim/ucsim +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +keil2sdcc.pl +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +header file +\begin_inset LatexCommand index +name "Header files" + +\end_inset + + +\begin_inset LatexCommand index +name "Include files" + +\end_inset + + conversion +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +sdcc/support/scripts +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +mh2h.c +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +header file conversion +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +sdcc/support/scripts +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +as-gbz80 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Assembler +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +sdcc/bin +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +as-z80 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Assembler +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +sdcc/bin +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +asx8051 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Assembler +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +sdcc/bin +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCDB +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Simulator +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +sdcc/bin +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +aslink +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Linker +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +sdcc/bin +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +link-z80 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Linker +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +sdcc/bin +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +link-gbz80 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Linker +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +sdcc/bin +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +packihx +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Intel Hex packer +\begin_inset LatexCommand index +name "packihx (tool)" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +sdcc/bin +\end_layout + +\end_inset + + + + +\end_inset + + +\newline + +\end_layout + +\begin_layout Section +Documentation +\begin_inset LatexCommand index +name "Documentation" + +\end_inset + + included in the distribution +\end_layout + +\begin_layout Standard +\align left +\begin_inset Tabular + + + + + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Subject / Title +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Filename / Where to get +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC Compiler User Guide +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +You're reading it right now +\emph on +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + +\hfill +online at: +\emph default + +\newline + +\begin_inset LatexCommand url +target "http://sdcc.sourceforge.net/doc/sdccman.pdf" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +Changelog of SDCC +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +sdcc/Changelog +\emph on +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + +\hfill +online at: +\emph default + +\newline + +\begin_inset LatexCommand url +target "http://sdcc.svn.sourceforge.net/viewvc/*checkout*/sdcc/trunk/sdcc/ChangeLog" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +ASXXXX +\begin_inset LatexCommand index +name "asXXXX (as-gbz80, as-hc08, asx8051, as-z80)" + +\end_inset + + +\begin_inset LatexCommand index +name "Assembler documentation" + +\end_inset + + Assemblers and +\newline +ASLINK +\begin_inset LatexCommand index +name "aslink" + +\end_inset + + +\begin_inset LatexCommand index +name "Linker documentation" + +\end_inset + + Relocating Linker +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +sdcc/as/doc/asxhtm.html +\emph on +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + +\hfill +online at: +\emph default + +\newline + +\begin_inset LatexCommand url +target "http://sdcc.svn.sourceforge.net/viewvc/*checkout*/sdcc/trunk/sdcc/as/doc/asxhtm.html" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC regression test +\begin_inset LatexCommand index +name "Regression test" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +sdcc/doc/test_suite_spec.pdf +\emph on +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + +\hfill +online at: +\emph default + +\newline + +\begin_inset LatexCommand url +target "http://sdcc.sourceforge.net/doc/test_suite_spec.pdf" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +Various notes +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +sdcc/doc/* +\emph on +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + +\hfill +online at: +\emph default + +\newline + +\begin_inset LatexCommand url +target "http://sdcc.svn.sourceforge.net/viewvc/sdcc/trunk/sdcc/doc/" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +Notes on debugging with SDCDB +\begin_inset LatexCommand index +name "SDCDB (debugger)" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +sdcc/debugger/README +\emph on +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + +\hfill +online at +\emph default +: +\newline + +\begin_inset LatexCommand url +target "http://sdcc.svn.sourceforge.net/viewvc/*checkout*/sdcc/trunk/sdcc/debugger/README" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +uCsim +\begin_inset LatexCommand index +name "uCsim" + +\end_inset + + Software simulator for microcontrollers +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +sdcc/sim/ucsim/doc +\family default +\series default +\shape default +\size default +\emph default +\bar default +\noun default +/index.html +\emph on +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + +\hfill +online at: +\emph default + +\newline + +\begin_inset LatexCommand url +target "http://sdcc.svn.sourceforge.net/viewvc/*checkout*/sdcc/trunk/sdcc/sim/ucsim/doc/index.html" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +Temporary notes on the pic16 +\begin_inset LatexCommand index +name "PIC16" + +\end_inset + + port +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +sdcc/src/pic16/NOTES +\emph on +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + +\hfill +online at: +\newline + +\emph default + +\begin_inset LatexCommand url +target "http://sdcc.svn.sourceforge.net/viewvc/*checkout*/sdcc/trunk/sdcc/src/pic16/NOTES" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +SDCC internal documentation (debugging file format) +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +sdcc/doc/ +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +cdbfileformat.pd +\family default +\series default +\shape default +\size default +\emph default +\bar default +\noun default +f +\emph on +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + +\hfill +online at: +\emph default + +\newline + +\begin_inset LatexCommand url +target "http://sdcc.sourceforge.net/doc/cdbfileformat.pdf" + +\end_inset + + +\end_layout + +\end_inset + + + + +\end_inset + + +\newline + +\end_layout + +\begin_layout Section +Related open source tools +\begin_inset LatexCommand label +name "sec:Related-open-source-tools" + +\end_inset + + +\begin_inset LatexCommand index +name "Related tools" + +\end_inset + + +\end_layout + +\begin_layout Standard +\align left +\begin_inset Tabular + + + + + + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Name +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Purpose +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Where to get +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +gpsim +\begin_inset LatexCommand index +name "gpsim (pic simulator)" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +PIC simulator +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://www.dattalo.com/gnupic/gpsim.html" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +gputils +\begin_inset LatexCommand index +name "gputils (pic tools)" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +GNU PIC utilities +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://sourceforge.net/projects/gputils" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +flP5 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +PIC programmer +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://freshmeat.net/projects/flp5/" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +ec2drv/newcdb +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Tools for Silicon Laboratories JTAG debug adapter, partly based on SDCDB + (Unix only) +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://sourceforge.net/projects/ec2drv" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +indent +\begin_inset LatexCommand index +name "indent (source formatting tool)" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Formats C source - Master of the white spaces +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://directory.fsf.org/GNU/indent.html" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +srecord +\begin_inset LatexCommand index +name "srecord (bin, hex, ... tool)" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Object file conversion, checksumming, ... +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://sourceforge.net/projects/srecord" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +objdump +\begin_inset LatexCommand index +name "objdump (tool)" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Object file conversion, ... +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Part of binutils (should be there anyway) +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +cmon51 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +8051 monitor (hex up-/download, single step, disassemble) +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://sourceforge.net/projects/cmon51" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +doxygen +\begin_inset LatexCommand index +name "doxygen (source documentation tool)" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Source code documentation system +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://www.doxygen.org" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +kdevelop +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +IDE (has anyone tried integrating SDCC & SDCDB? Unix only) +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://www.kdevelop.org" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +paulmon +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +8051 monitor (hex up-/download, single step, disassemble) +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://www.pjrc.com/tech/8051/paulmon2.html" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +splint +\begin_inset LatexCommand index +name "splint (syntax checking tool)" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Statically checks c sources (see +\begin_inset LatexCommand ref +reference "lyx:more-pedantic-SPLINT" + +\end_inset + +) +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://www.splint.org" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +ddd +\begin_inset LatexCommand index +name "DDD (debugger)" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Debugger, serves nicely as GUI to SDCDB +\begin_inset LatexCommand index +name "SDCDB (debugger)" + +\end_inset + + (Unix only) +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://www.gnu.org/software/ddd/" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +d52 +\begin_inset LatexCommand index +name "d52" + +\end_inset + + +\begin_inset LatexCommand index +name "d52 (disassembler)" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Disassembler, can count instruction cycles +\begin_inset LatexCommand index +name "instruction cycles (count)" + +\end_inset + +, use with options -pnd +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://www.8052.com/users/disasm/" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +cmake +\begin_inset LatexCommand index +name "cmake" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Cross platform build system, generates Makefiles +\begin_inset LatexCommand index +name "Makefile" + +\end_inset + + and project workspaces +\begin_inset LatexCommand index +name "project workspace" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://www.cmake.org" + +\end_inset + + \InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +and a dedicated wiki entry: +\begin_inset LatexCommand url +target "http://www.cmake.org/Wiki/CmakeSdcc" + +\end_inset + + +\end_layout + +\end_inset + + + + +\end_inset + + +\newline + +\end_layout + +\begin_layout Section +Related documentation / recommended reading +\end_layout + +\begin_layout Standard +\align left +\begin_inset Tabular + + + + + + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Name +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Subject / Title +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Where to get +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\family roman +\series medium +\shape up +\size normal +\emph off +\bar no +\noun off +\color none +c-refcard.pdf +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +C Reference Card +\begin_inset LatexCommand index +name "C Reference card" + +\end_inset + +, 2 pages +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://refcards.com/refcards/c/index.html" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +c-faq +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +C-FAQ +\begin_inset LatexCommand index +name "C FAQ" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://www.c-faq.com" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +ISO/IEC 9899:TC2 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset Quotes sld +\end_inset + +C-Standard +\begin_inset Quotes srd +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +\begin_inset LatexCommand url +target "http://www.open-std.org/jtc1/sc22/wg14/www/standards.html#9899" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard +ISO/IEC DTR 18037 +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +\begin_inset Quotes sld +\end_inset + +Extensions for Embedded C +\begin_inset Quotes srd +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +\begin_inset LatexCommand url +target "http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1021.pdf" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Latest datasheet of target CPU +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +vendor +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +Revision history of datasheet +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard +vendor +\end_layout + +\end_inset + + + + +\end_inset + + +\newline + +\end_layout + +\begin_layout Section +Application notes specifically for SDCC +\end_layout + +\begin_layout Standard +SDCC makes no claims about the completeness of this list and about up-to-datenes +s or correctness of the application notes +\begin_inset LatexCommand index +name "Application notes" + +\end_inset + +. +\end_layout + +\begin_layout Standard +\align left + +\size footnotesize +\begin_inset Tabular + + + + + + + +\begin_inset Text + +\begin_layout Standard + +\series bold +\size footnotesize +Vendor +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +\size footnotesize +Subject / Title +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +\size footnotesize +Where to get +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Maxim / Dallas +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Using the SDCC Compiler for the DS80C400 +\begin_inset LatexCommand index +name "DS80C400" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +\begin_inset LatexCommand url +target "http://pdfserv.maxim-ic.com/en/an/AN3346.pdf" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Maxim / Dallas +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Using the Free SDCC C Compiler to Develop Firmware for the DS89C420/430/440/450 +\begin_inset LatexCommand index +name "DS89C4x0" + +\end_inset + + Family of Microcontrollers +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +\begin_inset LatexCommand url +target "http://pdfserv.maxim-ic.com/en/an/AN3477.pdf" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Silicon Laboratories / Cygnal +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Integrating SDCC 8051 Tools Into The Silicon Labs IDE +\begin_inset LatexCommand index +name "IDE" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +\begin_inset LatexCommand url +target "http://www.silabs.com/public/documents/tpub_doc/anote/Microcontrollers/en/an198.pdf" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Ramtron / Goal Semiconductor +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Interfacing SDCC to Syn and Textpad +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +\begin_inset LatexCommand url +target "http://www.ramtron.com/doc/Products/Microcontroller/Support_Tools.asp" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Ramtron / Goal Semiconductor +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Installing and Configuring SDCC and Crimson Editor +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +\begin_inset LatexCommand url +target "http://www.ramtron.com/doc/Products/Microcontroller/Support_Tools.asp" + +\end_inset + + +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Texas Instruments +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +MSC12xx Programming with SDCC +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +\begin_inset LatexCommand url +target "http://focus.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=sbaa109&fileType=pdf" + +\end_inset + + +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Section +Some Questions +\end_layout + +\begin_layout Standard +Some questions answered, some pointers given - it might be time to in turn + ask +\emph on +you +\emph default + some questions: +\end_layout + +\begin_layout Itemize +can you solve your project with the selected microcontroller? Would you + find out early or rather late that your target is too small/slow/whatever? + Can you switch to a slightly better device if it doesn't fit? +\end_layout + +\begin_layout Itemize +should you solve the problem with an 8 bit CPU? Or would a 16/32 bit CPU + and/or another programming language be more adequate? Would an operating + system on the target device help? +\end_layout + +\begin_layout Itemize +if you solved the problem, will the marketing department be happy? +\end_layout + +\begin_layout Itemize +if the marketing department is happy, will customers be happy? +\end_layout + +\begin_layout Itemize +if you're the project manager, marketing department and maybe even the customer + in one person, have you tried to see the project from the outside? +\end_layout + +\begin_layout Itemize +is the project done if you think it is done? Or is just that other interface/pro +tocol/feature/configuration/option missing? How about website, manual(s), + internationali(z|s)ation, packaging, labels, 2nd source for components, + electromagnetic compatability/interference, documentation for production, + production test software, update mechanism, patent issues? +\end_layout + +\begin_layout Itemize +is your project adequately positioned in that magic triangle: fame, fortune, + fun? +\end_layout + +\begin_layout Standard +Maybe not all answers to these questions are known and some answers may + even be +\emph on +no +\emph default +, nevertheless knowing these questions may help you to avoid burnout +\begin_inset Foot +status open + +\begin_layout Standard +burnout is bad for electronic devices, programmers and motorcycle tyres +\end_layout + +\end_inset + +. + Chances are you didn't want to hear some of them... +\end_layout + +\begin_layout Chapter +Support +\begin_inset LatexCommand index +name "Support" + +\end_inset + + +\end_layout + +\begin_layout Standard +SDCC has grown to be a large project. + The compiler alone (without the preprocessor, assembler and linker) is + well over 150,000 lines of code (blank stripped). + The open source nature of this project is a key to its continued growth + and support. + You gain the benefit and support of many active software developers and + end users. + Is SDCC perfect? No, that's why we need your help. + The developers take pride in fixing reported bugs. + You can help by reporting the bugs and helping other SDCC users. + There are lots of ways to contribute, and we encourage you to take part + in making SDCC a great software package. + +\end_layout + +\begin_layout Standard +The SDCC project is hosted on the SDCC sourceforge site at +\begin_inset LatexCommand htmlurl +target "http://sourceforge.net/projects/sdcc" + +\end_inset + +. + You'll find the complete set of mailing lists +\begin_inset LatexCommand index +name "Mailing list(s)" + +\end_inset + +, forums, bug reporting system, patch submission +\begin_inset LatexCommand index +name "Patch submission" + +\end_inset + + system, download +\begin_inset LatexCommand index +name "download" + +\end_inset + + area and Subversion code repository +\begin_inset LatexCommand index +name "Subversion code repository" + +\end_inset + + there. +\end_layout + +\begin_layout Section +Reporting Bugs +\begin_inset LatexCommand index +name "Bug reporting" + +\end_inset + + +\begin_inset LatexCommand index +name "Reporting bugs" + +\end_inset + + +\end_layout + +\begin_layout Standard +The recommended way of reporting bugs is using the infrastructure of the + sourceforge site. + You can follow the status of bug reports there and have an overview about + the known bugs. +\end_layout + +\begin_layout Standard +Bug reports are automatically forwarded to the developer mailing list and + will be fixed ASAP. + When reporting a bug, it is very useful to include a small test program + (the smaller the better) which reproduces the problem. + If you can isolate the problem by looking at the generated assembly code, + this can be very helpful. + Compiling your program with the - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-dumpall +\begin_inset LatexCommand index +name "-\\/-dumpall" + +\end_inset + + option can sometimes be useful in locating optimization problems. + When reporting a bug please make sure you: +\end_layout + +\begin_layout Enumerate +Attach the code you are compiling with SDCC. + +\end_layout + +\begin_layout Enumerate +Specify the exact command you use to run SDCC, or attach your Makefile. + +\end_layout + +\begin_layout Enumerate +Specify the SDCC version (type " +\family sans +\series bold +sdcc -v +\family default +\series default +"), your platform, and operating system. + +\end_layout + +\begin_layout Enumerate +Provide an exact copy of any error message or incorrect output. + +\end_layout + +\begin_layout Enumerate +Put something meaningful in the subject of your message. +\end_layout + +\begin_layout Standard +Please attempt to include these 5 important parts, as applicable, in all + requests for support or when reporting any problems or bugs with SDCC. + Though this will make your message lengthy, it will greatly improve your + chance that SDCC users and developers will be able to help you. + Some SDCC developers are frustrated by bug reports without code provided + that they can use to reproduce and ultimately fix the problem, so please + be sure to provide sample code if you are reporting a bug! +\end_layout + +\begin_layout Standard +Please have a short check that you are using a recent version of SDCC and + the bug is not yet known. + This is the link for reporting bugs: +\begin_inset LatexCommand htmlurl +target "http://sourceforge.net/tracker/?group_id=599&atid=100599" + +\end_inset + +. + With SDCC on average having more than 200 downloads +\begin_inset LatexCommand index +name "download" + +\end_inset + + on sourceforge per day +\begin_inset Foot +status open + +\begin_layout Standard +220 daily downloads on average Jan-Sept 2006 and about 150 daily downloads + between 2002 and 2005. + This does not include other methods of distribution. +\end_layout + +\end_inset + + there must be some users. + So it's not exactly easy to find a new bug. + If you find one we need it: +\emph on +reporting bugs is good +\emph default +. +\end_layout + +\begin_layout Section +Requesting Features +\begin_inset LatexCommand label +name "sub:Requesting-Features" + +\end_inset + + +\begin_inset LatexCommand index +name "Feature request" + +\end_inset + + +\begin_inset LatexCommand index +name "Requesting features" + +\end_inset + + +\end_layout + +\begin_layout Standard +Like bug reports feature requests are forwarded to the developer mailing + list. + This is the link for requesting features: +\begin_inset LatexCommand htmlurl +target "http://sourceforge.net/tracker/?group_id=599&atid=350599" + +\end_inset + +. +\end_layout + +\begin_layout Section +Submitting patches +\end_layout + +\begin_layout Standard +Like bug reports contributed patches are forwarded to the developer mailing + list. + This is the link for submitting patches +\begin_inset LatexCommand index +name "Patch submission" + +\end_inset + +: +\begin_inset LatexCommand url +target "http://sourceforge.net/tracker/?group_id=599&atid=300599" + +\end_inset + +. +\end_layout + +\begin_layout Standard +You need to specify some parameters to the +\family typewriter +diff +\family default + command for the patches to be useful. + If you modified more than one file a patch created f.e. + with +\family sans +\series bold + +\begin_inset Quotes sld +\end_inset + +diff -Naur unmodified_directory modified_directory >my_changes.patch +\begin_inset Quotes srd +\end_inset + + +\family default +\series default + will be fine, otherwise +\family sans +\series bold + +\begin_inset Quotes sld +\end_inset + +diff -u sourcefile.c.orig sourcefile.c >my_changes.patch +\begin_inset Quotes srd +\end_inset + + +\family default +\series default + will do. +\end_layout + +\begin_layout Section +Getting Help +\end_layout + +\begin_layout Standard +These links should take you directly to the +\begin_inset LatexCommand url +name "Mailing lists" +target "http://sourceforge.net/mail/?group_id=599" + +\end_inset + + +\begin_inset Foot +status open + +\begin_layout Standard +Traffic on sdcc-devel and sdcc-user is about 100 mails/month each not counting + automated messages (mid 2003) +\end_layout + +\end_inset + + and the +\begin_inset LatexCommand url +name "Forums" +target "http://sourceforge.net/forum/?group_id=599" + +\end_inset + +, lists +\begin_inset LatexCommand index +name "Mailing list(s)" + +\end_inset + + and forums are archived and searchable so if you are lucky someone already + had a similar problem. + While mails to the lists themselves are delivered promptly their web front + end on sourceforge sometimes shows a severe time lag (up to several weeks), + if you're seriously using SDCC please consider subscribing to the lists. +\end_layout + +\begin_layout Section +ChangeLog +\end_layout + +\begin_layout Standard +You can follow the status of the Subversion version +\begin_inset LatexCommand index +name "version" + +\end_inset + + of SDCC by watching the Changelog +\begin_inset LatexCommand index +name "Changelog" + +\end_inset + + in the Subversion repository +\size footnotesize + +\begin_inset LatexCommand htmlurl +target "http://sdcc.svn.sourceforge.net/viewcvs.cgi/*checkout*/sdcc/trunk/sdcc/ChangeLog" + +\end_inset + +. +\end_layout + +\begin_layout Section +Subversion Source Code Repository +\end_layout + +\begin_layout Standard +The output of +\family sans +\series bold +sdcc - +\family default + +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\family sans +-version +\family default +\series default + or the filenames of the snapshot versions of SDCC include date and its + Subversion +\begin_inset LatexCommand index +name "Subversion code repository" + +\end_inset + + number. + Subversion allows to download the source of recent or previous versions + +\begin_inset LatexCommand url +target "http://sourceforge.net/svn/?group_id=599" + +\end_inset + + (by number or by date). + An on-line source code browser and detailled instructions are also available + there. + SDCC versions starting from 1999 up to now are available (currently the + versions prior to the conversion from cvs +\begin_inset LatexCommand index +name "cvs|see{Subversion}" + +\end_inset + + to Subversion (April 2006) are either by accessible by Subversion or by + cvs). +\end_layout + +\begin_layout Section +Release policy +\begin_inset LatexCommand index +name "Release policy" + +\end_inset + + +\end_layout + +\begin_layout Standard +Historically there often were long delays between official releases and + the sourceforge download area tends to get not updated at all. + Excuses in the past might have referred to problems with live range analysis, + but as this was fixed a while ago, the current problem is that another + excuse has to be found. + Kidding aside, we have to get better there! On the other hand there are + daily snapshots available at +\begin_inset LatexCommand htmlurl +name "snap" +target "http://sdcc.sourceforge.net/snap.php" + +\end_inset + +, and you can always build the very last version (hopefully with many bugs + fixed, and features added) from the source code available at +\begin_inset LatexCommand htmlurl +name "Source" +target "http://sdcc.sourceforge.net/snap.php#Source" + +\end_inset + +. + The SDCC Wiki +\begin_inset LatexCommand index +name "wiki" + +\end_inset + + +\begin_inset LatexCommand index +name "SDCC Wiki" + +\end_inset + + at +\begin_inset LatexCommand url +target "http://sdcc.wiki.sourceforge.net/" + +\end_inset + + also holds some information about past and future releases. +\end_layout + +\begin_layout Section +Examples +\begin_inset LatexCommand index +name "Examples" + +\end_inset + + +\end_layout + +\begin_layout Standard +You'll find some small examples in the directory +\emph on +sdcc/device/examples/. + +\emph default + More examples and libraries are available at +\emph on +The SDCC Open Knowledge Resource +\begin_inset LatexCommand url +target "http://sdccokr.dl9sec.de/" + +\end_inset + + +\emph default + web site or at +\begin_inset LatexCommand url +target "http://www.pjrc.com/tech/8051/" + +\end_inset + +. +\end_layout + +\begin_layout Standard +\begin_inset Note Note +status collapsed + +\begin_layout Standard +I did insert a reference to Paul's web site here although it seems rather + dedicated to a specific 8032 board (I think it's okay because it f.e. + shows LCD/Harddisc interface and has a free 8051 monitor. + Independent 8032 board vendors face hard competition of heavily subsidized + development boards anyway). +\end_layout + +\begin_layout Standard +Maybe we should include some links to real world applications. + Preferably pointer to pointers (one for each architecture) so this stays + manageable here? +\end_layout + +\end_inset + + +\end_layout + +\begin_layout Section +Quality control +\begin_inset LatexCommand label +name "sec:Quality-control" + +\end_inset + + +\begin_inset LatexCommand index +name "Quality control" + +\end_inset + + +\end_layout + +\begin_layout Standard +The compiler is passed through snaphot build compile and build checks. + The so called +\shape italic +regression tests +\shape default + +\begin_inset LatexCommand index +name "Regression test" + +\end_inset + + check that SDCC itself compiles flawlessly on several host platforms (i386, + Opteron, 64 bit Alpha, ppc64, Mac OS X on ppc and i386, Solaris on Sparc) + and checks the quality of the code generated by SDCC by running the code + for several target platforms through simulators. + The regression test suite comprises more than 100 files which expand to + more than 500 test cases which include more than 4500 tests. + The results of these tests are published daily on SDCC's snapshot page + (click on the red or green symbols on the right side of +\begin_inset LatexCommand url +target "http://sdcc.sourceforge.net/snap.php" + +\end_inset + +). +\end_layout + +\begin_layout Standard +There is a separate document +\shape italic +test_suite.pdf +\begin_inset LatexCommand index +name "Test suite" + +\end_inset + + +\shape default + +\begin_inset LatexCommand url +target "http://sdcc.sourceforge.net/doc/test_suite_spec.pdf" + +\end_inset + + about the regression test suite. +\end_layout + +\begin_layout Standard +You'll find the test code in the directory +\shape italic +sdcc/support/regression +\shape default +. + You can run these tests manually by running +\family sans +make +\family default + in this directory (or f.e. + +\family sans +\series bold + +\begin_inset Quotes sld +\end_inset + +make test-mcs51 +\begin_inset Quotes srd +\end_inset + + +\family default +\series default + if you don't want to run the complete tests). + The test code might also be interesting if you want to look for examples +\begin_inset LatexCommand index +name "Examples" + +\end_inset + + checking corner cases of SDCC or if you plan to submit patches +\begin_inset LatexCommand index +name "Patch submission" + +\end_inset + +. +\end_layout + +\begin_layout Standard +The PIC14 port uses a different set of regression tests +\begin_inset LatexCommand index +name "Regression test (PIC14)" + +\end_inset + +, you'll find them in the directory +\shape italic +sdcc/src/regression +\shape default +. +\end_layout + +\begin_layout Section +Use of SDCC in Education +\end_layout + +\begin_layout Standard +In short: +\emph on +highly +\emph default + encouraged +\begin_inset Foot +status open + +\begin_layout Standard +the phrase "use in education" might evoke the association " +\emph on +only +\emph default + fit for use in education". + This connotation is not intended but nevertheless risked as the licensing + of SDCC makes it difficult to offer educational discounts +\end_layout + +\end_inset + +. + If your rationales are to: +\end_layout + +\begin_layout Enumerate +give students a chance to understand the +\emph on +complete +\emph default + steps of code generation +\end_layout + +\begin_layout Enumerate +have a curriculum that can be extended for years. + Then you could use an fpga board as target and your curriculum will seamlessly + extend from logic synthesis ( +\begin_inset LatexCommand url +name "http://www.opencores.org" +target "opencores.org" + +\end_inset + +, +\begin_inset LatexCommand url +name "Oregano" +target "http://www.oregano.at/ip/ip01.htm" + +\end_inset + +), over assembly programming, to C to FPGA compilers ( +\begin_inset LatexCommand url +name "FPGAC" +target "http://sf.net/projects/fpgac" + +\end_inset + +) and to C. +\end_layout + +\begin_layout Enumerate +be able to insert excursions about skills like using a revision control + system, submitting/applying patches, using a type-setting (as opposed to + word-processing) engine LyX/LaTeX, using +\begin_inset LatexCommand url +name "SourceForge" +target "http://www.sf.net" + +\end_inset + +, following some +\begin_inset LatexCommand url +name "netiquette" +target "http://en.wikipedia.org/wiki/Netiquette" + +\end_inset + +, understanding BSD/LGPL/GPL/Proprietary licensing, growth models of Open + Source Software, CPU simulation, compiler regression tests +\begin_inset LatexCommand index +name "Regression test" + +\end_inset + +. + +\newline +And if there should be a shortage of ideas then you can always point students + to the ever-growing feature request list +\begin_inset LatexCommand htmlurl +target "http://sourceforge.net/tracker/?group_id=599&atid=350599" + +\end_inset + +. +\end_layout + +\begin_layout Enumerate +not tie students to a specific host platform and instead allow them to use + a host platform of +\emph on +their +\emph default + choice (among them Alpha, i386, i386_64, Mac OS X, Mips, Sparc, Windows + and eventually +\begin_inset LatexCommand url +name "OLPC" +target "http://www.laptop.org" + +\end_inset + +) +\end_layout + +\begin_layout Enumerate +not encourage students to use illegal copies of educational software +\end_layout + +\begin_layout Enumerate +be immune to licensing/availability/price changes of the chosen tool chain +\end_layout + +\begin_layout Enumerate +be able to change to a new target platform without having to adopt a new + tool chain +\end_layout + +\begin_layout Enumerate +have complete control over and insight into the tool chain +\end_layout + +\begin_layout Enumerate +make your students aware about the pros and cons of open source software + development +\end_layout + +\begin_layout Enumerate +give back to the public as you are probably at least partially publicly + funded +\end_layout + +\begin_layout Enumerate +give students a chance to publicly prove their skills and to possibly see + a world wide impact +\end_layout + +\begin_layout Standard +then SDCC is probably among the first choices. + Well, probably SDCC might be the only choice. +\newpage + +\end_layout + +\begin_layout Chapter +SDCC Technical Data +\end_layout + +\begin_layout Section +Optimizations +\begin_inset LatexCommand index +name "Optimizations" + +\end_inset + + +\end_layout + +\begin_layout Standard +SDCC performs a host of standard optimizations in addition to some MCU specific + optimizations. + +\end_layout + +\begin_layout Subsection +Sub-expression Elimination +\begin_inset LatexCommand index +name "Subexpression elimination" + +\end_inset + + +\end_layout + +\begin_layout Standard +The compiler does local and +\emph on +g +\emph default +lobal +\emph on +c +\emph default +ommon +\emph on +s +\emph default +ubexpression +\emph on +e +\emph default +limination, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +i = x + y + 1; +\newline +j = x + y; +\end_layout + +\begin_layout Standard +will be translated to +\end_layout + +\begin_layout Verse + +\family typewriter +iTemp = x + y; +\newline +i = iTemp + 1; +\newline +j = iTemp; +\end_layout + +\begin_layout Standard +Some subexpressions are not as obvious as the above example, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +a->b[i].c = 10; +\newline +a->b[i].d = 11; +\end_layout + +\begin_layout Standard +In this case the address arithmetic a->b[i] will be computed only once; + the equivalent code in C would be. +\end_layout + +\begin_layout Verse + +\family typewriter +iTemp = a->b[i]; +\newline +iTemp.c = 10; +\newline +iTemp.d = 11; +\end_layout + +\begin_layout Standard +The compiler will try to keep these temporary variables in registers. +\end_layout + +\begin_layout Subsection +Dead-Code Elimination +\begin_inset LatexCommand index +name "Dead-code elimination" + +\end_inset + + +\end_layout + +\begin_layout Verse + +\family typewriter +int global; +\newline + +\newline +void f () { +\newline +\InsetSpace ~ +\InsetSpace ~ +int i; +\newline +\InsetSpace ~ +\InsetSpace ~ +i = 1; \InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* dead store */ +\newline +\InsetSpace ~ +\InsetSpace ~ +global = 1;\InsetSpace ~ +/* dead + store */ +\newline +\InsetSpace ~ +\InsetSpace ~ +global = 2; +\newline +\InsetSpace ~ +\InsetSpace ~ +return; +\newline +\InsetSpace ~ +\InsetSpace ~ +global = 3;\InsetSpace ~ +/* unreachable */ +\newline +} +\end_layout + +\begin_layout Standard +will be changed to +\end_layout + +\begin_layout Verse + +\family typewriter +int global; +\newline + +\newline +void f () { +\newline +\InsetSpace ~ +\InsetSpace ~ +global = 2; +\newline +} +\end_layout + +\begin_layout Subsection +Copy-Propagation +\begin_inset LatexCommand index +name "Copy propagation" + +\end_inset + + +\end_layout + +\begin_layout Verse + +\family typewriter +int f() { +\newline +\InsetSpace ~ +\InsetSpace ~ +int i, j; +\newline +\InsetSpace ~ +\InsetSpace ~ +i = 10; +\newline +\InsetSpace ~ +\InsetSpace ~ +j = i; +\newline +\InsetSpace ~ +\InsetSpace ~ +return j; +\newline +} +\end_layout + +\begin_layout Standard +will be changed to +\end_layout + +\begin_layout Verse + +\family typewriter +int f() { +\newline +\InsetSpace ~ +\InsetSpace ~ +int i, j; +\newline +\InsetSpace ~ +\InsetSpace ~ +i = 10; +\newline +\InsetSpace ~ +\InsetSpace ~ +j = 10; +\newline +\InsetSpace ~ +\InsetSpace ~ +return 10; +\newline +} +\end_layout + +\begin_layout Standard +Note: the dead stores created by this copy propagation will be eliminated + by dead-code elimination. +\end_layout + +\begin_layout Subsection +Loop Optimizations +\begin_inset LatexCommand index +name "Loop optimization" + +\end_inset + + +\begin_inset LatexCommand label +name "sub:Loop-Optimizations" + +\end_inset + + +\end_layout + +\begin_layout Standard +Two types of loop optimizations are done by SDCC +\emph on +loop invariant +\emph default + lifting and +\emph on +strength reduction +\emph default + of loop induction variables. + In addition to the strength reduction the optimizer marks the induction + variables and the register allocator tries to keep the induction variables + in registers for the duration of the loop. + Because of this preference of the register allocator +\begin_inset LatexCommand index +name "Register allocation" + +\end_inset + +, loop induction optimization causes an increase in register pressure, which + may cause unwanted spilling of other temporary variables into the stack +\begin_inset LatexCommand index +name "stack" + +\end_inset + + / data space. + The compiler will generate a warning message when it is forced to allocate + extra space either on the stack or data space. + If this extra space allocation is undesirable then induction optimization + can be eliminated either for the entire source file (with - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-noinduction option) or for a given function only using #pragma\InsetSpace ~ +noinduction +\begin_inset LatexCommand index +name "\\#pragma noinduction" + +\end_inset + +. +\newline + +\newline +Loop Invariant: +\end_layout + +\begin_layout Verse + +\family typewriter +for (i = 0 ; i < 100 ; i ++) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +f += k + l; +\end_layout + +\begin_layout Standard +changed to +\end_layout + +\begin_layout Verse + +\family typewriter +itemp = k + l; +\newline +for (i = 0; i < 100; i++) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +f += itemp; +\end_layout + +\begin_layout Standard +As mentioned previously some loop invariants are not as apparent, all static + address computations are also moved out of the loop. +\newline + +\newline +Strength Reduction +\begin_inset LatexCommand index +name "Strength reduction" + +\end_inset + +, this optimization substitutes an expression by a cheaper expression: +\end_layout + +\begin_layout Verse + +\family typewriter +for (i=0;i < 100; i++) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +ar[i*5] = i*3; +\end_layout + +\begin_layout Standard +changed to +\end_layout + +\begin_layout Verse + +\family typewriter +itemp1 = 0; +\newline +itemp2 = 0; +\newline +for (i=0;i< 100;i++) { +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +ar[itemp1] = itemp2; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +itemp1 + += 5; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +itemp2 += 3; +\newline +} +\end_layout + +\begin_layout Standard +The more expensive multiplication +\begin_inset LatexCommand index +name "Multiplication" + +\end_inset + + is changed to a less expensive addition. +\end_layout + +\begin_layout Subsection +Loop Reversing +\begin_inset LatexCommand index +name "Loop reversing" + +\end_inset + + +\end_layout + +\begin_layout Standard +This optimization is done to reduce the overhead of checking loop boundaries + for every iteration. + Some simple loops can be reversed and implemented using a +\begin_inset Quotes eld +\end_inset + +decrement and jump if not zero +\begin_inset Quotes erd +\end_inset + + instruction. + SDCC checks for the following criterion to determine if a loop is reversible + (note: more sophisticated compilers use data-dependency analysis to make + this determination, SDCC uses a more simple minded analysis). +\end_layout + +\begin_layout Itemize +The 'for' loop is of the form +\newline + +\newline + +\family typewriter +for( = ; [< | <=] ; [++ | + += 1]) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + +\end_layout + +\begin_layout Itemize +The does not contain +\begin_inset Quotes eld +\end_inset + +continue +\begin_inset Quotes erd +\end_inset + + or 'break +\begin_inset Quotes erd +\end_inset + +. +\end_layout + +\begin_layout Itemize +All goto's are contained within the loop. +\end_layout + +\begin_layout Itemize +No function calls within the loop. +\end_layout + +\begin_layout Itemize +The loop control variable is not assigned any value within the loop +\end_layout + +\begin_layout Itemize +The loop control variable does NOT participate in any arithmetic operation + within the loop. +\end_layout + +\begin_layout Itemize +There are NO switch statements in the loop. +\end_layout + +\begin_layout Subsection +Algebraic Simplifications +\end_layout + +\begin_layout Standard +SDCC does numerous algebraic simplifications, the following is a small sub-set + of these optimizations. +\end_layout + +\begin_layout Verse + +\family typewriter +i = j + 0;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + /* changed to: */\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + i = j; +\newline +i /= 2;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + /* changed to: */\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + i >>= 1; +\newline +i + = j - j;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + /* changed to: */\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + i = 0; +\newline +i = j / 1;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + /* changed to: */\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + i = j; +\end_layout + +\begin_layout Standard +Note the subexpressions +\begin_inset LatexCommand index +name "Subexpression" + +\end_inset + + given above are generally introduced by macro expansions or as a result + of copy/constant propagation. +\end_layout + +\begin_layout Subsection +'switch' Statements +\begin_inset LatexCommand label +name "sub:'switch'-Statements" + +\end_inset + + +\begin_inset LatexCommand index +name "switch statement" + +\end_inset + + +\end_layout + +\begin_layout Standard +SDCC can optimize switch statements to jump tables +\begin_inset LatexCommand index +name "jump tables" + +\end_inset + +. + It makes the decision based on an estimate of the generated code size. + SDCC is quite liberal in the requirements for jump table generation: +\end_layout + +\begin_layout Itemize +The labels need not be in order, and the starting number need not be one + or zero, the case labels are in numerical sequence or not too many case + labels are missing. +\end_layout + +\begin_deeper +\begin_layout Verse + +\family typewriter +switch(i) {\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +switch (i) { +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 4: ...\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 0: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 5: ...\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 1: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 3: ...\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 6: ...\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 3: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 7: ...\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 4: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 8: ...\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 5: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 9: ...\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 6: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 10: ...\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 7: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 11: ...\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +case 8: ... + +\newline +}\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +} +\end_layout + +\begin_layout Standard +Both the above switch statements will be implemented using a jump-table. + The example to the right side is slightly more efficient as the check for + the lower boundary of the jump-table is not needed. +\end_layout + +\end_deeper +\begin_layout Itemize +The number of case labels is not larger than supported by the target architectur +e. +\end_layout + +\begin_layout Itemize +If the case labels are not in numerical sequence ('gaps' between cases) + SDCC checks whether a jump table with additionally inserted dummy cases + is still attractive. + +\end_layout + +\begin_layout Itemize +If the starting number is not zero and a check for the lower boundary of + the jump-table can thus be eliminated SDCC might insert dummy cases 0, + ... + . +\end_layout + +\begin_layout Standard +Switch statements which have large gaps in the numeric sequence or those + that have too many case labels can be split into more than one switch statement + for efficient code generation, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +switch (i) { +\newline +\InsetSpace ~ +\InsetSpace ~ +case 1: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 2: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 3: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 4: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 5: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 6: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 7: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 101: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 102: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 103: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 104: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 105: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 106: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 107: ... + +\newline +} +\end_layout + +\begin_layout Standard +If the above switch statement is broken down into two switch statements +\end_layout + +\begin_layout Verse + +\family typewriter +switch (i) { +\newline +\InsetSpace ~ +\InsetSpace ~ +case 1: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 2: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 3: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 4: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 5: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 6: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 7: ... + +\newline +} +\end_layout + +\begin_layout Standard +and +\end_layout + +\begin_layout Verse + +\family typewriter +switch (i) { +\newline +\InsetSpace ~ +\InsetSpace ~ +case 101: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 102: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 103: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 104: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 105: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 106: ... + +\newline +\InsetSpace ~ +\InsetSpace ~ +case 107: ... + +\newline +} +\end_layout + +\begin_layout Standard +then both the switch statements will be implemented using jump-tables whereas + the unmodified switch statement will not be. +\end_layout + +\begin_layout Standard +\begin_inset Note Note +status collapsed + +\begin_layout Standard +There might be reasons which SDCC cannot know about to either favour or + not favour jump tables. + If the target system has to be as quick for the last switch case as for + the first (pro jump table), or if the switch argument is known to be zero + in the majority of the cases (contra jump table). +\end_layout + +\end_inset + + +\end_layout + +\begin_layout Standard +The pragma nojtbound +\begin_inset LatexCommand index +name "\\#pragma nojtbound" + +\end_inset + + can be used to turn off checking the +\emph on +j +\emph default +ump +\emph on +t +\emph default +able +\emph on +bound +\emph default +aries. + It has no effect if a default label is supplied. + Use of this pragma is dangerous: if the switch +\begin_inset LatexCommand index +name "switch statement" + +\end_inset + + argument is not matched by a case statement the processor will happily + jump into Nirvana. +\end_layout + +\begin_layout Subsection +Bit-shifting Operations +\begin_inset LatexCommand index +name "Bit shifting" + +\end_inset + +. +\end_layout + +\begin_layout Standard +Bit shifting is one of the most frequently used operation in embedded programmin +g. + SDCC tries to implement bit-shift operations in the most efficient way + possible, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +unsigned char i; +\newline +... + +\newline +i >>= 4; +\newline +... +\end_layout + +\begin_layout Standard +generates the following code: +\end_layout + +\begin_layout Verse + +\family typewriter +mov\InsetSpace ~ + a,_i +\newline +swap a +\newline +anl\InsetSpace ~ + a,#0x0f +\newline +mov\InsetSpace ~ + _i,a +\end_layout + +\begin_layout Standard +In general SDCC will never setup a loop if the shift count is known. + Another example: +\end_layout + +\begin_layout Verse + +\family typewriter +unsigned int i; +\newline +... + +\newline +i >>= 9; +\newline +... +\end_layout + +\begin_layout Standard +will generate: +\end_layout + +\begin_layout Verse + +\family typewriter +mov\InsetSpace ~ +\InsetSpace ~ +a,(_i + 1) +\newline +mov\InsetSpace ~ +\InsetSpace ~ +(_i + 1),#0x00 +\newline +clr\InsetSpace ~ +\InsetSpace ~ +c +\newline +rrc\InsetSpace ~ +\InsetSpace ~ +a +\newline +mov\InsetSpace ~ +\InsetSpace ~ +_i,a +\end_layout + +\begin_layout Subsection +Bit-rotation +\begin_inset LatexCommand index +name "Bit rotation" + +\end_inset + + +\end_layout + +\begin_layout Standard +A special case of the bit-shift operation is bit rotation +\begin_inset LatexCommand index +name "rotating bits" + +\end_inset + +, SDCC recognizes the following expression to be a left bit-rotation: +\end_layout + +\begin_layout Verse + +\family typewriter +\series bold +unsigned +\series default +\InsetSpace ~ +\InsetSpace ~ +char i;\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* unsigned is needed for rotation */ +\newline +... + +\newline +i = ((i << 1) | (i >> 7)); +\family default + +\newline + +\family typewriter +... +\end_layout + +\begin_layout Standard +will generate the following code: +\end_layout + +\begin_layout Verse + +\family typewriter +mov\InsetSpace ~ +\InsetSpace ~ +a,_i +\newline +rl\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +a +\newline +mov\InsetSpace ~ +\InsetSpace ~ +_i,a +\end_layout + +\begin_layout Standard +SDCC uses pattern matching on the parse tree to determine this operation.Variatio +ns of this case will also be recognized as bit-rotation, i.e.: +\end_layout + +\begin_layout Verse + +\family typewriter +i = ((i >> 7) | (i << 1)); /* left-bit rotation */ +\end_layout + +\begin_layout Subsection +Nibble and Byte Swapping +\end_layout + +\begin_layout Standard +Other special cases of the bit-shift operations are nibble or byte swapping +\begin_inset LatexCommand index +name "swapping nibbles/bytes" + +\end_inset + +, SDCC recognizes the following expressions: +\end_layout + +\begin_layout Verse + +\family typewriter +\series bold +unsigned +\series default +\InsetSpace ~ +\InsetSpace ~ +char i; +\newline + +\series bold +unsigned +\series default +\InsetSpace ~ +\InsetSpace ~ +int j; +\newline +... + +\newline +i = ((i << 4) | (i >> 4)); +\family default + +\newline + +\family typewriter +j = ((j << 8) | (j >> 8)); +\end_layout + +\begin_layout Standard +and generates a swap instruction for the nibble swapping +\begin_inset LatexCommand index +name "Nibble swapping" + +\end_inset + + or move instructions for the byte swapping +\begin_inset LatexCommand index +name "Byte swapping" + +\end_inset + +. + The +\begin_inset Quotes sld +\end_inset + +j +\begin_inset Quotes srd +\end_inset + + example can be used to convert from little to big-endian or vice versa. + If you want to change the endianness of a +\emph on +signed +\emph default + integer you have to cast to +\family typewriter +(unsigned int) +\family default + first. +\end_layout + +\begin_layout Standard +Note that SDCC stores numbers in little-endian +\begin_inset Foot +status open + +\begin_layout Standard +Usually 8-bit processors don't care much about endianness. + This is not the case for the standard 8051 which only has an instruction + to increment its +\emph on +dptr +\emph default + +\begin_inset LatexCommand index +name "DPTR" + +\end_inset + +-datapointer so little-endian is the more efficient byte order. +\end_layout + +\end_inset + + +\begin_inset LatexCommand index +name "little-endian" + +\end_inset + + +\begin_inset LatexCommand index +name "Endianness" + +\end_inset + + format (i.e. + lowest order first). +\end_layout + +\begin_layout Subsection +Highest Order Bit +\begin_inset LatexCommand index +name "Highest Order Bit" + +\end_inset + + / Any Order Bit +\begin_inset LatexCommand index +name "Any Order Bit" + +\end_inset + + +\end_layout + +\begin_layout Standard +It is frequently required to obtain the highest order bit of an integral + type (long, int, short or char types). + Also obtaining any other order bit is not uncommon. + SDCC recognizes the following expressions to yield the highest order bit + and generates optimized code for it, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +unsigned int gint; +\newline + +\newline +foo () { +\newline +\InsetSpace ~ +\InsetSpace ~ +unsigned char hob1, aob1; +\newline +\InsetSpace ~ +\InsetSpace ~ +bit hob2, hob3, aob2, + aob3; +\newline +\InsetSpace ~ +\InsetSpace ~ +... + +\newline +\InsetSpace ~ +\InsetSpace ~ +hob1 = (gint >> 15) & 1; +\newline +\InsetSpace ~ +\InsetSpace ~ +hob2 = (gint >> 15) & 1; +\newline +\InsetSpace ~ +\InsetSpace ~ +hob3 = gint & 0x8000; + +\newline +\InsetSpace ~ +\InsetSpace ~ +aob1 = (gint >> 9) & 1; +\newline +\InsetSpace ~ +\InsetSpace ~ +aob2 = (gint >> 8) & 1; +\newline +\InsetSpace ~ +\InsetSpace ~ +aob3 = gint & 0x0800; +\newline +\InsetSpace ~ +\InsetSpace ~ +.. + +\newline +} +\end_layout + +\begin_layout Standard +will generate the following code: +\end_layout + +\begin_layout Verse + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 61 ;\InsetSpace ~ + hob.c 7 +\newline +000A E5*01\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 62\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + a,(_gint + 1) +\newline +000C 23\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 63\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + rl\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + a +\newline +000D 54 01\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + + 64\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + anl\InsetSpace ~ +\InsetSpace ~ + a,#0x01 +\newline +000F F5*02\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 65\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + _foo_hob1_1_1,a +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 66 ;\InsetSpace ~ + hob.c 8 +\newline +0011 E5*01\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + + 67\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + a,(_gint + 1) +\newline +0013 33\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 68\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + rlc\InsetSpace ~ +\InsetSpace ~ + a +\newline +0014 92*00\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 69\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + _foo_hob2_1_1,c + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 66 ;\InsetSpace ~ + hob.c 9 +\newline +0016 E5*01\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 67\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + a,(_gint + 1) +\newline +0018 33\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 68\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + rlc\InsetSpace ~ +\InsetSpace ~ + a +\newline +0019 92*01\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + + 69\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + _foo_hob3_1_1,c +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 70 ;\InsetSpace ~ + hob.c 10 +\newline +001B E5*01\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 71\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + a,(_gint + 1) +\newline +001D + 03\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 72\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + rr\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + a +\newline +001E 54 01\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 73\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + anl\InsetSpace ~ +\InsetSpace ~ + a,#0x01 +\newline +0020 F5*03\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 74\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + _foo_aob1_1_1,a + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 75 ;\InsetSpace ~ + hob.c 11 +\newline +0022 E5*01\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 76\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + a,(_gint + 1) +\newline +0024 13\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 77\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + rrc\InsetSpace ~ +\InsetSpace ~ + a +\newline +0025 92*02\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + + 78\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + _foo_aob2_1_1,c +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 79 ;\InsetSpace ~ + hob.c 12 +\newline +0027 E5*01\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 80\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + a,(_gint + 1) +\newline +0029 + A2 E3\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 81\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + c,acc[3] +\newline +002B 92*03\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 82\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + _foo_aob3_1_1,c +\end_layout + +\begin_layout Standard +Other variations of these cases however will +\emph on +not +\emph default + be recognized. + They are standard C expressions, so I heartily recommend these be the only + way to get the highest order bit, (it is portable). + Of course it will be recognized even if it is embedded in other expressions, + e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +xyz = gint + ((gint >> 15) & 1); +\end_layout + +\begin_layout Standard +will still be recognized. +\end_layout + +\begin_layout Subsection +Higher Order Byte +\begin_inset LatexCommand index +name "Higher Order Byte" + +\end_inset + + / Higher Order Word +\begin_inset LatexCommand index +name "Higher Order Word" + +\end_inset + + +\end_layout + +\begin_layout Standard +It is also frequently required to obtain a higher order byte or word of + a larger integral type (long, int or short types). + SDCC recognizes the following expressions to yield the higher order byte + or word and generates optimized code for it, e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +unsigned int gint; +\newline +unsigned long int glong; +\newline + +\newline +foo () { +\newline +\InsetSpace ~ +\InsetSpace ~ +unsigned char hob1, + hob2; +\newline +\InsetSpace ~ +\InsetSpace ~ +unsigned int how1, how2; +\newline +\InsetSpace ~ +\InsetSpace ~ +... + +\newline +\InsetSpace ~ +\InsetSpace ~ +hob1 = (gint >> 8) & 0xFF; +\newline +\InsetSpace ~ +\InsetSpace ~ +hob2 = glong >> 24; +\newline +\InsetSpace ~ +\InsetSpace ~ +how1 = (glong >> 16) & 0xFFFF; + +\newline +\InsetSpace ~ +\InsetSpace ~ +how2 = glong >> 8; +\newline +\InsetSpace ~ +\InsetSpace ~ +.. + +\newline +} +\end_layout + +\begin_layout Standard +will generate the following code: +\end_layout + +\begin_layout Verse + +\family typewriter +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 91 ;\InsetSpace ~ + hob.c 15 +\newline +0037 85*01*06\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 92\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + _foo_hob1_1_1,(_gint + 1) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 93 ;\InsetSpace ~ + hob.c + 16 +\newline +003A 85*05*07\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 94\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + _foo_hob2_1_1,(_glong + 3) +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 95 ;\InsetSpace ~ + hob.c 17 +\newline +003D 85*04*08\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + + 96\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + _foo_how1_1_1,(_glong + 2) +\newline +0040 85*05*09\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 97\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + (_foo_how1_1_1 + + 1),(_glong + 3) +\newline +0043 85*03*0A\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + 98\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + _foo_how2_1_1,(_glong + 1) +\newline +0046 85*04*0B\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + + 99\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ + mov\InsetSpace ~ +\InsetSpace ~ + (_foo_how2_1_1 + 1),(_glong + 2) +\end_layout + +\begin_layout Standard +Again, variations of these cases may +\emph on +not +\emph default + be recognized. + They are standard C expressions, so I heartily recommend these be the only + way to get the higher order byte/word, (it is portable). + Of course it will be recognized even if it is embedded in other expressions, + e.g.: +\end_layout + +\begin_layout Verse + +\family typewriter +xyz = gint + ((gint >> 8) & 0xFF); +\end_layout + +\begin_layout Standard +will still be recognized. +\end_layout + +\begin_layout Subsection +Peephole Optimizer +\begin_inset LatexCommand label +name "sub:Peephole-Optimizer" + +\end_inset + + +\begin_inset LatexCommand index +name "Peephole optimizer" + +\end_inset + + +\end_layout + +\begin_layout Standard +The compiler uses a rule based, pattern matching and re-writing mechanism + for peep-hole optimization. + It is inspired by +\emph on +copt +\emph default + a peep-hole optimizer by Christopher W. + Fraser (cwfraser\InsetSpace ~ +@\InsetSpace ~ +microsoft.com). + A default set of rules are compiled into the compiler, additional rules + may be added with the +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-peep-file +\begin_inset LatexCommand index +name "-\\/-peep-file" + +\end_inset + + +\emph default + option. + The rule language is best illustrated with examples. +\end_layout + +\begin_layout Verse + +\family typewriter +replace { +\newline +\InsetSpace ~ +\InsetSpace ~ +mov %1,a +\newline +\InsetSpace ~ +\InsetSpace ~ +mov a,%1 +\newline +} by { +\newline +\InsetSpace ~ +\InsetSpace ~ +mov %1,a +\newline +} +\end_layout + +\begin_layout Standard +The above rule will change the following assembly +\begin_inset LatexCommand index +name "Assembler routines" + +\end_inset + + sequence: +\end_layout + +\begin_layout Verse + +\family typewriter +mov r1,a +\newline +mov a,r1 +\end_layout + +\begin_layout Standard +to +\end_layout + +\begin_layout Verse + +\family typewriter +mov r1,a +\end_layout + +\begin_layout Standard +Note: All occurrences of a +\emph on +%n +\emph default + (pattern variable) must denote the same string. + With the above rule, the assembly sequence: +\end_layout + +\begin_layout Verse + +\family typewriter +mov r1,a +\newline +mov a,r2 +\end_layout + +\begin_layout Standard +will remain unmodified. +\newline + +\newline +Other special case optimizations may be added by the + user (via +\emph on +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-peep-file option +\emph default +). + E.g. + some variants of the 8051 MCU +\begin_inset LatexCommand index +name "MCS51 variants" + +\end_inset + + allow only +\family typewriter +ajmp +\family default + and +\family typewriter +acall +\family default +. + The following two rules will change all +\family typewriter +ljmp +\family default + and +\family typewriter +lcall +\family default + to +\family typewriter +ajmp +\family default + and +\family typewriter +acall +\end_layout + +\begin_layout Verse + +\family typewriter +replace { lcall %1 } by { acall %1 } +\newline +replace { ljmp %1 } by { ajmp %1 } +\end_layout + +\begin_layout Standard +(NOTE: from version 2.7.3 on, you can use option - +\emph on + +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\emph default +-acall-ajmp +\begin_inset LatexCommand index +name "-\\/-acall-ajmp" + +\end_inset + +, which also takes care of aligning the interrupt vectors properly.) +\newline + +\end_layout + +\begin_layout Standard +The +\emph on +inline-assembler code +\emph default + is also passed through the peep hole optimizer, thus the peephole optimizer + can also be used as an assembly level macro expander. + The rules themselves are MCU dependent whereas the rule language infra-structur +e is MCU independent. + Peephole optimization rules for other MCU can be easily programmed using + the rule language. +\newline + +\newline +The syntax for a rule is as follows: +\end_layout + +\begin_layout Verse + +\family typewriter +rule := replace [ restart ] '{' ' +\backslash +n' +\newline +\InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + '}' by '{' ' +\backslash +n' +\newline +\InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + ' +\backslash +n' +\newline +\InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ + '}' [if ] ' +\backslash +n' +\end_layout + +\begin_layout Standard + := assembly instruction (each instruction including + labels must be on a separate line). +\newline + +\newline +The optimizer will apply to the rules + one by one from the top in the sequence of their appearance, it will terminate + when all rules are exhausted. + If the 'restart' option is specified, then the optimizer will start matching + the rules again from the top, this option for a rule is expensive (performance) +, it is intended to be used in situations where a transformation will trigger + the same rule again. + An example of this (not a good one, it has side effects) is the following + rule: +\end_layout + +\begin_layout Verse + +\family typewriter +replace restart { +\newline +\InsetSpace ~ +\InsetSpace ~ +pop %1 +\newline +\InsetSpace ~ +\InsetSpace ~ +push %1 } by { +\newline +\InsetSpace ~ +\InsetSpace ~ +; nop +\newline +} +\end_layout + +\begin_layout Standard +Note that the replace pattern cannot be a blank, but can be a comment line. + Without the 'restart' option only the innermost 'pop' 'push' pair would + be eliminated, i.e.: +\end_layout + +\begin_layout Verse + +\family typewriter +pop ar1 +\newline +pop ar2 +\newline +push ar2 +\newline +push ar1 +\end_layout + +\begin_layout Standard +would result in: +\end_layout + +\begin_layout Verse + +\family typewriter +pop ar1 +\newline +; nop +\newline +push ar1 +\end_layout + +\begin_layout Standard + +\emph on +with +\emph default + the restart option the rule will be applied again to the resulting code + and then all the pop-push pairs will be eliminated to yield: +\end_layout + +\begin_layout Verse + +\family typewriter +; nop +\newline +; nop +\end_layout + +\begin_layout Standard +A conditional function can be attached to a rule. + Attaching rules are somewhat more involved, let me illustrate this with + an example. +\end_layout + +\begin_layout Verse + +\family typewriter +replace { +\newline +\InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ +ljmp %5 +\newline +%2: +\newline +} by { +\newline +\InsetSpace ~ + \InsetSpace ~ + \InsetSpace ~ +sjmp %5 +\newline +%2: +\newline +} if labelInRange +\end_layout + +\begin_layout Standard +The optimizer does a look-up of a function name table defined in function + +\emph on +callFuncByName +\emph default + in the source file SDCCpeeph.c, with the name +\emph on +labelInRange +\emph default +. + If it finds a corresponding entry the function is called. + Note there can be no parameters specified for these functions, in this + case the use of +\emph on +%5 +\emph default + is crucial, since the function +\emph on +labelInRange +\emph default + expects to find the label in that particular variable (the hash table containin +g the variable bindings is passed as a parameter). + If you want to code more such functions, take a close look at the function + labelInRange and the calling mechanism in source file SDCCpeeph.c. + Currently implemented are +\emph on +labelInRange, labelRefCount, labelIsReturnOnly, operandsNotSame, xramMovcOption, + 24bitMode, portIsDS390, 24bitModeAndPortDS390 +\emph default + and +\emph on +notVolatile +\emph default +. +\end_layout + +\begin_layout Standard +I know this whole thing is a little kludgey, but maybe some day we will + have some better means. + If you are looking at this file, you will see the default rules that are + compiled into the compiler, you can add your own rules in the default set + there if you get tired of specifying the - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-peep-file option. +\end_layout + +\begin_layout Section +ANSI-Compliance +\begin_inset LatexCommand index +name "ANSI-compliance" + +\end_inset + + +\begin_inset LatexCommand label +name "sub:ANSI-Compliance" + +\end_inset + + +\end_layout + +\begin_layout Standard +The latest publicly available version of the standard +\emph on +ISO/IEC 9899 - Programming languages - C +\emph default + should be available at: +\begin_inset LatexCommand url +target "http://www.open-std.org/jtc1/sc22/wg14/www/standards.html#9899" + +\end_inset + +. +\newline + +\end_layout + +\begin_layout Standard +Deviations from the compliance: +\end_layout + +\begin_layout Itemize +functions are not reentrant +\begin_inset LatexCommand index +name "reentrant" + +\end_inset + + unless explicitly declared as such or the +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-auto +\begin_inset LatexCommand index +name "-\\/-stack-auto" + +\end_inset + + +\series default + command line option is specified. +\end_layout + +\begin_layout Itemize +structures +\begin_inset LatexCommand index +name "struct" + +\end_inset + + and unions +\begin_inset LatexCommand index +name "union" + +\end_inset + + cannot be assigned values directly, cannot be passed as function parameters + or assigned to each other and cannot be a return value +\begin_inset LatexCommand index +name "return value" + +\end_inset + + from a function, e.g.: +\end_layout + +\begin_deeper +\begin_layout Verse + +\family typewriter +struct s { ... + }; +\newline +struct s s1, s2; +\newline +foo() +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +... + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +s1 = s2 ; /* is invalid in SDCC although allowed in ANSI */ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +... + +\newline +} +\newline + +\series bold +struct +\family default +\series default + +\family typewriter +s foo1 ( +\series bold +struct +\family default +\series default + +\family typewriter +s parms) /* invalid in SDCC although allowed in ANSI */ +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +struct s rets; + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +... + +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +return rets; /* is invalid in SDCC although allowed in ANSI */ +\newline +} +\end_layout + +\end_deeper +\begin_layout Itemize +initialization of structure arrays must be fully braced. +\end_layout + +\begin_deeper +\begin_layout Verse + +\family typewriter +struct s { char x } a[] = {1, 2};\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +/* invalid in SDCC */ +\newline +struct s { char x + } a[] = {{1}, {2}}; /* OK */ +\end_layout + +\end_deeper +\begin_layout Itemize +'long long +\begin_inset LatexCommand index +name "long long (not supported)" + +\end_inset + +' (64 bit integers +\begin_inset LatexCommand index +name "int (64 bit) (not supported)" + +\end_inset + +) not supported. +\end_layout + +\begin_layout Itemize +'double +\begin_inset LatexCommand index +name "double (not supported)" + +\end_inset + +' precision floating point +\begin_inset LatexCommand index +name "Floating point support" + +\end_inset + +not supported. +\end_layout + +\begin_layout Itemize +Old K&R style +\begin_inset LatexCommand index +name "K\\&R style" + +\end_inset + + function declarations are NOT allowed. +\end_layout + +\begin_deeper +\begin_layout Verse + +\family typewriter +foo(i,j) /* this old style of function declarations */ +\newline +int i,j; /* is valid + in ANSI but not valid in SDCC */ +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +... + +\newline +} +\end_layout + +\end_deeper +\begin_layout Itemize +Most enhancements in C99 are not supported, e.g.: +\end_layout + +\begin_deeper +\begin_layout Verse + +\family typewriter +for ( +\series bold +int +\family default +\series default + +\family typewriter +i=0; i<10; i++) /* is invalid in SDCC although allowed in C99 */ +\end_layout + +\end_deeper +\begin_layout Itemize +But some have been added recently in SDCC 2.7.0. + They must be considered alpha quality however. +\end_layout + +\begin_deeper +\begin_layout Verse + +\family typewriter +\series bold +inline +\begin_inset LatexCommand index +name "inline (not supported)" + +\end_inset + + +\family default +\series default + +\family typewriter +int increment (int a) { return a+1; } /* inlines the increment without function + call overhead */ +\newline +int * +\family default + +\family typewriter +\series bold +restrict +\begin_inset LatexCommand index +name "inline (not supported)" + +\end_inset + + +\family default +\series default + +\family typewriter +p; /* accepted but ignored */ +\end_layout + +\end_deeper +\begin_layout Itemize +Certain words that are valid identifiers in the standard may be reserved + words in SDCC unless the +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-c89 +\begin_inset LatexCommand index +name "-\\/-std-c89" + +\end_inset + + +\series default + or +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-c99 +\begin_inset LatexCommand index +name "-\\/-std-c99" + +\end_inset + + +\series default + command line options are used. + These may include (depending on the selected processor): 'at', 'banked', + 'bit', 'code', 'critical', 'data', 'eeprom', 'far', 'flash', 'idata', 'interrup +t', 'near', 'nonbanked', 'pdata', 'reentrant', 'sbit', 'sfr', 'shadowregs', + 'sram', 'using', 'wparam', 'xdata', '_overlay', '_asm', '_endasm', and + '_naked'. + Compliant equivalents of these keywords are always available in a form + that begin with two underscores +\begin_inset LatexCommand index +name "\\_\\_ (prefix for extended keywords)" + +\end_inset + +, f.e. + '__data' instead of 'data'. +\end_layout + +\begin_layout Itemize +Integer promotion of variable arguments is not performed if the argument + is explicitly taypecasted unless the +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-c89 +\begin_inset LatexCommand index +name "-\\/-std-c89" + +\end_inset + + +\series default + or +\series bold +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-std-c99 +\begin_inset LatexCommand index +name "-\\/-std-c99" + +\end_inset + + +\series default + command line options are used. +\end_layout + +\begin_deeper +\begin_layout Verse + +\family typewriter +void vararg_func (char *str, ...) { str; } +\newline + +\newline +void main (void) +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +char c = 10; +\newline + +\newline +\InsetSpace ~ +\InsetSpace ~ +/* argument + u is promoted to int before +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +* passing to function */ +\newline +\InsetSpace ~ +\InsetSpace ~ +vararg_func ("%c", c); +\newline + +\newline +\InsetSpace ~ +\InsetSpace ~ +/* + argument u is not promoted to int, +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +* it is passed as char to function +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +* if + --std-cXX is not defined; +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +* is promoted to int before passing +\newline +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +* to function + if --std-cXX is defined */ +\newline +\InsetSpace ~ +\InsetSpace ~ +vararg_func ("%bc", (char)u); +\newline +} +\end_layout + +\end_deeper +\begin_layout Section +Cyclomatic Complexity +\begin_inset LatexCommand index +name "Cyclomatic complexity" + +\end_inset + + +\end_layout + +\begin_layout Standard +Cyclomatic complexity of a function is defined as the number of independent + paths the program can take during execution of the function. + This is an important number since it defines the number test cases you + have to generate to validate the function. + The accepted industry standard for complexity number is 10, if the cyclomatic + complexity reported by SDCC exceeds 10 you should think about simplification + of the function logic. + Note that the complexity level is not related to the number of lines of + code in a function. + Large functions can have low complexity, and small functions can have large + complexity levels. + +\newline + +\newline +SDCC uses the following formula to compute the complexity: +\newline + +\end_layout + +\begin_layout Standard +complexity = (number of edges in control flow graph) - (number of nodes + in control flow graph) + 2; +\newline + +\newline +Having said that the industry standard is 10, + you should be aware that in some cases it be may unavoidable to have a + complexity level of less than 10. + For example if you have switch statement with more than 10 case labels, + each case label adds one to the complexity level. + The complexity level is by no means an absolute measure of the algorithmic + complexity of the function, it does however provide a good starting point + for which functions you might look at for further optimization. +\end_layout + +\begin_layout Section +Retargetting for other Processors +\end_layout + +\begin_layout Standard +The issues for retargetting the compiler are far too numerous to be covered + by this document. + What follows is a brief description of each of the seven phases of the + compiler and its MCU dependency. +\end_layout + +\begin_layout Itemize +Parsing the source and building the annotated parse tree. + This phase is largely MCU independent (except for the language extensions). + Syntax & semantic checks are also done in this phase, along with some initial + optimizations like back patching labels and the pattern matching optimizations + like bit-rotation etc. +\end_layout + +\begin_layout Itemize +The second phase involves generating an intermediate code which can be easy + manipulated during the later phases. + This phase is entirely MCU independent. + The intermediate code generation assumes the target machine has unlimited + number of registers, and designates them with the name iTemp. + The compiler can be made to dump a human readable form of the code generated + by using the - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-dumpraw option. +\end_layout + +\begin_layout Itemize +This phase does the bulk of the standard optimizations and is also MCU independe +nt. + This phase can be broken down into several sub-phases: +\newline + +\newline +Break down intermediate + code (iCode) into basic blocks. +\newline +Do control flow & data flow analysis on the + basic blocks. +\newline +Do local common subexpression elimination, then global subexpressio +n elimination +\newline +Dead code elimination +\newline +Loop optimizations +\newline +If loop optimizations + caused any changes then do 'global subexpression elimination' and 'dead + code elimination' again. +\end_layout + +\begin_layout Itemize +This phase determines the live-ranges; by live range I mean those iTemp + variables defined by the compiler that still survive after all the optimization +s. + Live range analysis +\begin_inset LatexCommand index +name "Live range analysis" + +\end_inset + + is essential for register allocation, since these computation determines + which of these iTemps will be assigned to registers, and for how long. +\end_layout + +\begin_layout Itemize +Phase five is register allocation. + There are two parts to this process. +\newline + +\newline +The first part I call 'register packing' + (for lack of a better term). + In this case several MCU specific expression folding is done to reduce + register pressure. +\newline + +\newline +The second part is more MCU independent and deals with + allocating registers to the remaining live ranges. + A lot of MCU specific code does creep into this phase because of the limited + number of index registers available in the 8051. +\end_layout + +\begin_layout Itemize +The Code generation phase is (unhappily), entirely MCU dependent and very + little (if any at all) of this code can be reused for other MCU. + However the scheme for allocating a homogenized assembler operand for each + iCode operand may be reused. +\end_layout + +\begin_layout Itemize +As mentioned in the optimization section the peep-hole optimizer is rule + based system, which can reprogrammed for other MCUs. +\end_layout + +\begin_layout Standard +More information is available on SDCC Wiki +\begin_inset LatexCommand index +name "wiki" + +\end_inset + + (preliminary link +\begin_inset LatexCommand url +target "http://sdcc.wiki.sourceforge.net/SDCC+internals+and+porting" + +\end_inset + +) and in the thread +\begin_inset LatexCommand url +target "http://sf.net/mailarchive/message.php?msg_id=13954144" + +\end_inset + + . +\end_layout + +\begin_layout Chapter +Compiler internals +\begin_inset LatexCommand index +name "Compiler internals" + +\end_inset + + +\end_layout + +\begin_layout Section +The anatomy of the compiler +\begin_inset LatexCommand label +name "sub:The-anatomy-of" + +\end_inset + + +\end_layout + +\begin_layout Standard + +\shape italic +This is an excerpt from an article published in Circuit Cellar Magazine + in +\shape default + +\series bold +\shape italic +August 2000 +\series default +. + It's a little outdated (the compiler is much more efficient now and user/develo +per friendly), but pretty well exposes the guts of it all. +\shape default + +\newline + +\newline +The current version of SDCC can generate code for Intel 8051 and Z80 MCU. + It is fairly easy to retarget for other 8-bit MCU. + Here we take a look at some of the internals of the compiler. + +\end_layout + +\begin_layout Paragraph* +Parsing +\begin_inset LatexCommand index +name "Parsing" + +\end_inset + + +\end_layout + +\begin_layout Standard +Parsing the input source file and creating an AST (Annotated Syntax Tree +\begin_inset LatexCommand index +name "Annotated syntax tree" + +\end_inset + +). + This phase also involves propagating types (annotating each node of the + parse tree with type information) and semantic analysis. + There are some MCU specific parsing rules. + For example the storage classes, the extended storage classes are MCU specific + while there may be a xdata storage class for 8051 there is no such storage + class for z80 or Atmel AVR. + SDCC allows MCU specific storage class extensions, i.e. + xdata will be treated as a storage class specifier when parsing 8051 C + code but will be treated as a C identifier when parsing z80 or ATMEL AVR + C code. +\end_layout + +\begin_layout Paragraph* +Generating iCode +\begin_inset LatexCommand index +name "iCode" + +\end_inset + + +\end_layout + +\begin_layout Standard +Intermediate code generation. + In this phase the AST is broken down into three-operand form (iCode). + These three operand forms are represented as doubly linked lists. + ICode is the term given to the intermediate form generated by the compiler. + ICode example section shows some examples of iCode generated for some simple + C source functions. +\end_layout + +\begin_layout Paragraph* +Optimizations +\begin_inset LatexCommand index +name "Optimizations" + +\end_inset + +. +\end_layout + +\begin_layout Standard +Bulk of the target independent optimizations is performed in this phase. + The optimizations include constant propagation, common sub-expression eliminati +on, loop invariant code movement, strength reduction of loop induction variables + and dead-code elimination. +\end_layout + +\begin_layout Paragraph* +Live range analysis +\begin_inset LatexCommand index +name "Live range analysis" + +\end_inset + + +\end_layout + +\begin_layout Standard +During intermediate code generation phase, the compiler assumes the target + machine has infinite number of registers and generates a lot of temporary + variables. + The live range computation determines the lifetime of each of these compiler-ge +nerated temporaries. + A picture speaks a thousand words. + ICode example sections show the live range annotations for each of the + operand. + It is important to note here, each iCode is assigned a number in the order + of its execution in the function. + The live ranges are computed in terms of these numbers. + The from number is the number of the iCode which first defines the operand + and the to number signifies the iCode which uses this operand last. +\end_layout + +\begin_layout Paragraph* +Register Allocation +\begin_inset LatexCommand index +name "Register allocation" + +\end_inset + + +\end_layout + +\begin_layout Standard +The register allocation determines the type and number of registers needed + by each operand. + In most MCUs only a few registers can be used for indirect addressing. + In case of 8051 for example the registers R0 & R1 can be used to indirectly + address the internal ram and DPTR to indirectly address the external ram. + The compiler will try to allocate the appropriate register to pointer variables + if it can. + ICode example section shows the operands annotated with the registers assigned + to them. + The compiler will try to keep operands in registers as much as possible; + there are several schemes the compiler uses to do achieve this. + When the compiler runs out of registers the compiler will check to see + if there are any live operands which is not used or defined in the current + basic block being processed, if there are any found then it will push that + operand and use the registers in this block, the operand will then be popped + at the end of the basic block. + +\end_layout + +\begin_layout Standard +There are other MCU specific considerations in this phase. + Some MCUs have an accumulator; very short-lived operands could be assigned + to the accumulator instead of a general-purpose register. +\end_layout + +\begin_layout Paragraph* +Code generation +\end_layout + +\begin_layout Standard +Figure II gives a table of iCode +\begin_inset LatexCommand index +name "iCode" + +\end_inset + + operations supported by the compiler. + The code generation involves translating these operations into corresponding + assembly code for the processor. + This sounds overly simple but that is the essence of code generation. + Some of the iCode operations are generated on a MCU specific manner for + example, the z80 port does not use registers to pass parameters so the + SEND and RECV iCode operations will not be generated, and it also does + not support JUMPTABLES. + +\newline + +\end_layout + +\begin_layout Standard + +\size footnotesize +Figure II +\begin_inset Tabular + + + + + + + + +\begin_inset Text + +\begin_layout Standard + +\series bold +iCode +\series default + +\begin_inset LatexCommand index +name "iCode" + +\end_inset + + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Operands +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +Description +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\series bold +C Equivalent +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +'!' +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +NOT operation +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = ! IC_LEFT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +'~' +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Bitwise complement of +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = ~IC_LEFT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +RRC +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Rotate right with carry +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = (IC_LEFT << 1) | (IC_LEFT >> (sizeof(IC_LEFT)*8-1)); +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +RLC +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Rotate left with carry +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = (IC_LEFT << (sizeof(LC_LEFT)*8-1) ) | (IC_LEFT >> 1); +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +GETHBIT +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Get the highest order bit of IC_LEFT +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = (IC_LEFT >> (sizeof(IC_LEFT)*8 -1)); +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +UNARYMINUS +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Unary minus +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = - IC_LEFT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IPUSH +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Push the operand into stack +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +NONE +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IPOP +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Pop the operand from the stack +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +NONE +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +CALL +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Call the function represented by IC_LEFT +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_LEFT(); +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +PCALL +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Call via function pointer +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = (*IC_LEFT)(); +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +RETURN +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Return the value in operand IC_LEFT +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +return IC_LEFT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +LABEL +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LABEL() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Label +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LABEL: +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +GOTO +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LABEL() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Goto label +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +goto IC_LABEL(); +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +'+' +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Addition +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_LEFT + IC_RIGHT +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +'-' +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Subtraction +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_LEFT - IC_RIGHT +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +'*' +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Multiplication +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_LEFT * IC_RIGHT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +'/' +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Division +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_LEFT / IC_RIGHT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +'%' +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Modulus +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_LEFT % IC_RIGHT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +'<' +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Less than +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_LEFT < IC_RIGHT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +'>' +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Greater than +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_LEFT > IC_RIGHT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +EQ_OP +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Equal to +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_LEFT == IC_RIGHT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +AND_OP +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Logical and operation +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_LEFT && IC_RIGHT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +OR_OP +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Logical or operation +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_LEFT || IC_RIGHT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +'^' +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Exclusive OR +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_LEFT ^ IC_RIGHT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +'|' +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Bitwise OR +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_LEFT | IC_RIGHT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +BITWISEAND +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Bitwise AND +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_LEFT & IC_RIGHT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +LEFT_OP +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Left shift +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_LEFT << IC_RIGHT +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +RIGHT_OP +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Right shift +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_LEFT >> IC_RIGHT +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +GET_VALUE_ +\newline +AT_ ADDRESS +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Indirect fetch +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = (*IC_LEFT); +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +POINTER_SET +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Indirect set +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +(*IC_RESULT) = IC_RIGHT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +'=' +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RIGHT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Assignment +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = IC_RIGHT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IFX +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_COND IC_TRUE IC_LABEL +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Conditional jump. + If true label is present then jump to true label if condition is true else + jump to false label if condition is false +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +if (IC_COND) goto IC_TRUE; +\newline +\InsetSpace ~ +\InsetSpace ~ +Or +\newline +If (!IC_COND) goto IC_FALSE; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +ADDRESS_OF +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Address of +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = &IC_LEFT(); +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +JUMPTABLE +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_JTCOND IC_JTLABELS +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Jump to list of labels depending on the value of JTCOND +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Switch statement +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +CAST +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RIGHT() IC_LEFT() IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +Cast types +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT = (typeof IC_LEFT) IC_RIGHT; +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +SEND +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_LEFT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +This is used for passing parameters in registers; +\newline +move IC_LEFT to the next + available parameter register. +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +None +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +RECV +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +IC_RESULT() +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +This is used for receiving parameters passed in registers; +\newline +Move the values + in the next parameter register to IC_RESULT +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\size footnotesize +None +\end_layout + +\end_inset + + + + +\begin_inset Text + +\begin_layout Standard + +\shape slanted +\size footnotesize +(some more have been added) +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\end_layout + +\end_inset + + +\begin_inset Text + +\begin_layout Standard + +\shape slanted +\size footnotesize +see f.e. + +\shape default + +\family typewriter +\shape slanted +gen51Code() +\family default +\shape default + +\shape slanted +in +\shape default + +\family typewriter +\shape slanted +src/mcs51/gen.c +\end_layout + +\end_inset + + + + +\end_inset + + +\end_layout + +\begin_layout Standard +\begin_inset Note Note +status collapsed + +\begin_layout Standard +In the original article Figure II was announced to be downloadable on +\shape italic +Circuit Cellar +\shape default +'s web site. + ftp://ftp.circuitcellar.com/pub/Circuit_Cellar/2000/121/dutta.ZIP +\end_layout + +\end_inset + + +\end_layout + +\begin_layout Paragraph* +ICode Example +\begin_inset LatexCommand index +name "iCode" + +\end_inset + + +\end_layout + +\begin_layout Standard +This section shows some details of iCode. + The example C code does not do anything useful; it is used as an example + to illustrate the intermediate code generated by the compiler. +\end_layout + +\begin_layout Verse + +\family typewriter +1.\InsetSpace ~ +xdata int * p; +\newline +2.\InsetSpace ~ +int gint; +\newline +3.\InsetSpace ~ +/* This function does nothing useful. + It is used +\newline +4.\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +for the purpose of explaining iCode */ +\newline +5.\InsetSpace ~ +short function (data + int *x) +\newline +6.\InsetSpace ~ +{ +\newline +7.\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +short i=10; \InsetSpace ~ +\InsetSpace ~ +/* dead initialization eliminated */ +\newline +8.\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +short sum=10; + /* dead initialization eliminated */ +\newline +9.\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +short mul; +\newline +10.\InsetSpace ~ +\InsetSpace ~ +int j ; +\newline +11.\InsetSpace ~ +\InsetSpace ~ +while (*x) *x++ + = *p++; +\newline +12.\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sum = 0 ; +\newline +13.\InsetSpace ~ +\InsetSpace ~ +mul = 0; +\newline +14.\InsetSpace ~ +\InsetSpace ~ +/* compiler detects i,j to be induction + variables */ +\newline +15.\InsetSpace ~ +\InsetSpace ~ +for (i = 0, j = 10 ; i < 10 ; i++, j +\family default +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +- +\family typewriter +) { +\newline +16.\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +sum += i; +\newline +17.\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +mul += i * 3; \InsetSpace ~ +\InsetSpace ~ +/* this multiplication remains */ +\newline +18.\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +gint += + j * 3;\InsetSpace ~ +\InsetSpace ~ +/* this multiplication changed to addition */ +\newline +19.\InsetSpace ~ +\InsetSpace ~ +} +\newline +20.\InsetSpace ~ +\InsetSpace ~ +return sum+mul; +\newline +21.\InsetSpace ~ +} +\end_layout + +\begin_layout Standard +In addition to the operands each iCode contains information about the filename + and line it corresponds to in the source file. + The first field in the listing should be interpreted as follows: +\newline + +\shape italic +\size footnotesize +Filename(linenumber: iCode Execution sequence number : ICode hash table + key : loop depth of the iCode). +\shape default +\size default + +\newline +Then follows the human readable form of the ICode operation. + Each operand of this triplet form can be of three basic types a) compiler + generated temporary b) user defined variable c) a constant value. + Note that local variables and parameters are replaced by compiler generated + temporaries. + Live ranges +\begin_inset LatexCommand index +name "Live range analysis" + +\end_inset + + are computed only for temporaries (i.e. + live ranges are not computed for global variables). + Registers +\begin_inset LatexCommand index +name "Register allocation" + +\end_inset + + are allocated for temporaries only. + Operands are formatted in the following manner: +\newline + +\shape italic +\size footnotesize +Operand Name [lr live-from : live-to ] { type information } [ registers + allocated ]. +\shape default +\size default + +\newline +As mentioned earlier the live ranges are computed in terms of the execution + sequence number of the iCodes, for example +\newline +the iTemp0 is live from (i.e. + first defined in iCode with execution sequence number 3, and is last used + in the iCode with sequence number 5). + For induction variables such as iTemp21 the live range computation extends + the lifetime from the start to the end of the loop. +\newline +The register allocator + used the live range information to allocate registers, the same registers + may be used for different temporaries if their live ranges do not overlap, + for example r0 is allocated to both iTemp6 and to iTemp17 since their live + ranges do not overlap. + In addition the allocator also takes into consideration the type and usage + of a temporary, for example itemp6 is a pointer to near space and is used + as to fetch data from (i.e. + used in GET_VALUE_AT_ADDRESS) so it is allocated a pointer register (r0). + Some short lived temporaries are allocated to special registers which have + meaning to the code generator e.g. + iTemp13 is allocated to a pseudo register CC which tells the back end that + the temporary is used only for a conditional jump the code generation makes + use of this information to optimize a compare and jump ICode. +\newline +There are several + loop optimizations +\begin_inset LatexCommand index +name "Loop optimization" + +\end_inset + + performed by the compiler. + It can detect induction variables iTemp21(i) and iTemp23(j). + Also note the compiler does selective strength reduction +\begin_inset LatexCommand index +name "Strength reduction" + +\end_inset + +, i.e. + the multiplication of an induction variable in line 18 (gint = j * 3) is + changed to addition, a new temporary iTemp17 is allocated and assigned + a initial value, a constant 3 is then added for each iteration of the loop. + The compiler does not change the multiplication +\begin_inset LatexCommand index +name "Multiplication" + +\end_inset + + in line 17 however since the processor does support an 8 * 8 bit multiplication. +\newline + +Note the dead code elimination +\begin_inset LatexCommand index +name "Dead-code elimination" + +\end_inset + + optimization eliminated the dead assignments in line 7 & 8 to I and sum + respectively. +\newline + +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c (5:1:0:0) _entry($9) : +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(5:2:1:0) proc _function [lr0:0]{function short} +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(11:3:2:0) iTemp0 [lr3:5]{_near * int}[r2] = recv +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(11:4:53:0) preHeaderLbl0($11) : +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(11:5:55:0) iTemp6 [lr5:16]{_near * int}[r0] := iTemp0 [lr3:5]{_near + * int}[r2] +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(11:6:5:1) _whilecontinue_0($1) : +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(11:7:7:1) iTemp4 [lr7:8]{int}[r2 r3] = @[iTemp6 [lr5:16]{_near * + int}[r0]] +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(11:8:8:1) if iTemp4 [lr7:8]{int}[r2 r3] == 0 goto _whilebreak_0($3) +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(11:9:14:1) iTemp7 [lr9:13]{_far * int}[DPTR] := _p [lr0:0]{_far + * int} +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(11:10:15:1) _p [lr0:0]{_far * int} = _p [lr0:0]{_far * int} + 0x2 + {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(11:13:18:1) iTemp10 [lr13:14]{int}[r2 r3] = @[iTemp7 [lr9:13]{_far + * int}[DPTR]] +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(11:14:19:1) *(iTemp6 [lr5:16]{_near * int}[r0]) := iTemp10 [lr13:14]{int +}[r2 r3] +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(11:15:12:1) iTemp6 [lr5:16]{_near * int}[r0] = iTemp6 [lr5:16]{_near + * int}[r0] + 0x2 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(11:16:20:1) goto _whilecontinue_0($1) +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(11:17:21:0)_whilebreak_0($3) : +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(12:18:22:0) iTemp2 [lr18:40]{short}[r2] := 0x0 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(13:19:23:0) iTemp11 [lr19:40]{short}[r3] := 0x0 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(15:20:54:0)preHeaderLbl1($13) : +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(15:21:56:0) iTemp21 [lr21:38]{short}[r4] := 0x0 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(15:22:57:0) iTemp23 [lr22:38]{int}[r5 r6] := 0xa {int} +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(15:23:58:0) iTemp17 [lr23:38]{int}[r7 r0] := 0x1e {int} +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(15:24:26:1)_forcond_0($4) : +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(15:25:27:1) iTemp13 [lr25:26]{char}[CC] = iTemp21 [lr21:38]{short}[r4] + < 0xa {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(15:26:28:1) if iTemp13 [lr25:26]{char}[CC] == 0 goto _forbreak_0($7) +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(16:27:31:1) iTemp2 [lr18:40]{short}[r2] = iTemp2 [lr18:40]{short}[r2] + + ITemp21 [lr21:38]{short}[r4] +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(17:29:33:1) iTemp15 [lr29:30]{short}[r1] = iTemp21 [lr21:38]{short}[r4] + * 0x3 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(17:30:34:1) iTemp11 [lr19:40]{short}[r3] = iTemp11 [lr19:40]{short}[r3] + + iTemp15 [lr29:30]{short}[r1] +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(18:32:36:1:1) iTemp17 [lr23:38]{int}[r7 r0]= iTemp17 [lr23:38]{int}[r7 + r0]- 0x3 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(18:33:37:1) _gint [lr0:0]{int} = _gint [lr0:0]{int} + iTemp17 [lr23:38]{ +int}[r7 r0] +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(15:36:42:1) iTemp21 [lr21:38]{short}[r4] = iTemp21 [lr21:38]{short}[r4] + + 0x1 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(15:37:45:1) iTemp23 [lr22:38]{int}[r5 r6]= iTemp23 [lr22:38]{int}[r5 + r6]- 0x1 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(19:38:47:1) goto _forcond_0($4) +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(19:39:48:0)_forbreak_0($7) : +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(20:40:49:0) iTemp24 [lr40:41]{short}[DPTR] = iTemp2 [lr18:40]{short}[r2] + + ITemp11 [lr19:40]{short}[r3] +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(20:41:50:0) ret iTemp24 [lr40:41]{short} +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(20:42:51:0)_return($8) : +\end_layout + +\begin_layout Standard + +\size footnotesize +Sample.c(20:43:52:0) eproc _function [lr0:0]{ ia0 re0 rm0}{function short} +\size default + +\newline + +\newline +Finally the code generated for this function: +\newline + +\end_layout + +\begin_layout Standard + +\size footnotesize +.area DSEG (DATA) +\end_layout + +\begin_layout Standard + +\size footnotesize +_p:: +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +.ds 2 +\end_layout + +\begin_layout Standard + +\size footnotesize +_gint:: +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +.ds 2 +\end_layout + +\begin_layout Standard + +\size footnotesize +; sample.c 5 +\end_layout + +\begin_layout Standard + +\size footnotesize +; ---------------------------------------------- +\end_layout + +\begin_layout Standard + +\size footnotesize +; function function +\end_layout + +\begin_layout Standard + +\size footnotesize +; ---------------------------------------------- +\end_layout + +\begin_layout Standard + +\size footnotesize +_function: +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp0 [lr3:5]{_near * int}[r2] = recv +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov r2,dpl +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp6 [lr5:16]{_near * int}[r0] := iTemp0 [lr3:5]{_near * int}[r2] +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov ar0,r2 +\end_layout + +\begin_layout Standard + +\size footnotesize +;_whilecontinue_0($1) : +\end_layout + +\begin_layout Standard + +\size footnotesize +00101$: +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp4 [lr7:8]{int}[r2 r3] = @[iTemp6 [lr5:16]{_near * int}[r0]] +\end_layout + +\begin_layout Standard + +\size footnotesize +; if iTemp4 [lr7:8]{int}[r2 r3] == 0 goto _whilebreak_0($3) +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov ar2,@r0 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +inc r0 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov ar3,@r0 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +dec r0 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov a,r2 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +orl a,r3 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +jz 00103$ +\end_layout + +\begin_layout Standard + +\size footnotesize +00114$: +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp7 [lr9:13]{_far * int}[DPTR] := _p [lr0:0]{_far * int} +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov dpl,_p +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov dph,(_p + 1) +\end_layout + +\begin_layout Standard + +\size footnotesize +; _p [lr0:0]{_far * int} = _p [lr0:0]{_far * int} + 0x2 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov a,#0x02 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +add a,_p +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov _p,a +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +clr a +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +addc a,(_p + 1) +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov (_p + 1),a +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp10 [lr13:14]{int}[r2 r3] = @[iTemp7 [lr9:13]{_far * int}[DPTR]] +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +movx a,@dptr +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov r2,a +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +inc dptr +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +movx a,@dptr +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov r3,a +\end_layout + +\begin_layout Standard + +\size footnotesize +; *(iTemp6 [lr5:16]{_near * int}[r0]) := iTemp10 [lr13:14]{int}[r2 r3] +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov @r0,ar2 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +inc r0 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov @r0,ar3 +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp6 [lr5:16]{_near * int}[r0] = +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp6 [lr5:16]{_near * int}[r0] + +\end_layout + +\begin_layout Standard + +\size footnotesize +; 0x2 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +inc r0 +\end_layout + +\begin_layout Standard + +\size footnotesize +; goto _whilecontinue_0($1) +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +sjmp 00101$ +\end_layout + +\begin_layout Standard + +\size footnotesize +; _whilebreak_0($3) : +\end_layout + +\begin_layout Standard + +\size footnotesize +00103$: +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp2 [lr18:40]{short}[r2] := 0x0 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov r2,#0x00 +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp11 [lr19:40]{short}[r3] := 0x0 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov r3,#0x00 +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp21 [lr21:38]{short}[r4] := 0x0 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov r4,#0x00 +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp23 [lr22:38]{int}[r5 r6] := 0xa {int} +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov r5,#0x0A +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov r6,#0x00 +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp17 [lr23:38]{int}[r7 r0] := 0x1e {int} +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov r7,#0x1E +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov r0,#0x00 +\end_layout + +\begin_layout Standard + +\size footnotesize +; _forcond_0($4) : +\end_layout + +\begin_layout Standard + +\size footnotesize +00104$: +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp13 [lr25:26]{char}[CC] = iTemp21 [lr21:38]{short}[r4] < 0xa {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +; if iTemp13 [lr25:26]{char}[CC] == 0 goto _forbreak_0($7) +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +clr c +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov a,r4 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +xrl a,#0x80 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +subb a,#0x8a +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +jnc 00107$ +\end_layout + +\begin_layout Standard + +\size footnotesize +00115$: +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp2 [lr18:40]{short}[r2] = iTemp2 [lr18:40]{short}[r2] + +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp21 [lr21:38]{short}[r4] +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov a,r4 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +add a,r2 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov r2,a +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp15 [lr29:30]{short}[r1] = iTemp21 [lr21:38]{short}[r4] * 0x3 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov b,#0x03 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov a,r4 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mul ab +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov r1,a +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp11 [lr19:40]{short}[r3] = iTemp11 [lr19:40]{short}[r3] + +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp15 [lr29:30]{short}[r1] +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +add a,r3 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov r3,a +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp17 [lr23:38]{int}[r7 r0]= iTemp17 [lr23:38]{int}[r7 r0]- 0x3 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov a,r7 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +add a,#0xfd +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov r7,a +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov a,r0 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +addc a,#0xff +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov r0,a +\end_layout + +\begin_layout Standard + +\size footnotesize +; _gint [lr0:0]{int} = _gint [lr0:0]{int} + iTemp17 [lr23:38]{int}[r7 r0] +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov a,r7 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +add a,_gint +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov _gint,a +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov a,r0 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +addc a,(_gint + 1) +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov (_gint + 1),a +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp21 [lr21:38]{short}[r4] = iTemp21 [lr21:38]{short}[r4] + 0x1 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +inc r4 +\end_layout + +\begin_layout Standard + +\size footnotesize +; iTemp23 [lr22:38]{int}[r5 r6]= iTemp23 [lr22:38]{int}[r5 r6]- 0x1 {short} +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +dec r5 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +cjne r5,#0xff,00104$ +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +dec r6 +\end_layout + +\begin_layout Standard + +\size footnotesize +; goto _forcond_0($4) +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +sjmp 00104$ +\end_layout + +\begin_layout Standard + +\size footnotesize +; _forbreak_0($7) : +\end_layout + +\begin_layout Standard + +\size footnotesize +00107$: +\end_layout + +\begin_layout Standard + +\size footnotesize +; ret iTemp24 [lr40:41]{short} +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov a,r3 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +add a,r2 +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +mov dpl,a +\end_layout + +\begin_layout Standard + +\size footnotesize +; _return($8) : +\end_layout + +\begin_layout Standard + +\size footnotesize +00108$: +\end_layout + +\begin_layout Standard + +\size footnotesize +\InsetSpace ~ +\InsetSpace ~ +ret +\newline + +\end_layout + +\begin_layout Section +A few words about basic block successors, predecessors and dominators +\end_layout + +\begin_layout Standard +Successors are basic blocks +\begin_inset LatexCommand index +name "Basic blocks" + +\end_inset + + that might execute after this basic block. +\newline +Predecessors are basic blocks + that might execute before reaching this basic block. +\newline +Dominators are basic + blocks that WILL execute before reaching this basic block. +\newline + +\end_layout + +\begin_layout Standard +[basic block 1] +\end_layout + +\begin_layout Standard +if (something) +\end_layout + +\begin_layout Standard +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +[basic block 2] +\end_layout + +\begin_layout Standard +else +\end_layout + +\begin_layout Standard +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +\InsetSpace ~ +[basic block 3] +\end_layout + +\begin_layout Standard +[basic block 4] +\newline + +\end_layout + +\begin_layout Standard +a) succList of [BB2] = [BB4], of [BB3] = [BB4], of [BB1] = [BB2,BB3] +\end_layout + +\begin_layout Standard +b) predList of [BB2] = [BB1], of [BB3] = [BB1], of [BB4] = [BB2,BB3] +\end_layout + +\begin_layout Standard +c) domVect of [BB4] = BB1 ... + here we are not sure if BB2 or BB3 was executed but we are SURE that BB1 + was executed. +\end_layout + +\begin_layout Chapter +Acknowledgments +\end_layout + +\begin_layout Standard +\begin_inset LatexCommand url +target "http://sdcc.sourceforge.net/#Who" + +\end_inset + + +\newline + +\newline + +\emph on +Thanks to all the other volunteer developers who have helped with coding, + testing, web-page creation, distribution sets, etc. + You know who you are :-) +\emph default + +\newline + +\newline + +\emph on +Thanks to Sourceforge +\begin_inset LatexCommand url +target "http://www.sf.net" + +\end_inset + + which has hosted the project since 1999 and donates significant download + bandwidth. +\emph default + +\newline + +\newline + +\emph on +Also thanks to all SDCC Distributed Compile Farm members for donating CPU + cycles and bandwidth for snapshot builds. +\newline + +\end_layout + +\begin_layout Standard +This document was initially written by Sandeep Dutta +\end_layout + +\begin_layout Standard +All product names mentioned herein may be trademarks +\begin_inset LatexCommand index +name "Trademarks" + +\end_inset + + of their respective companies. + +\end_layout + +\begin_layout Section* +Alphabetical index +\end_layout + +\begin_layout Standard +To avoid confusion, the installation and building options for SDCC itself + (chapter 2) are not part of the index. +\end_layout + +\begin_layout Standard +\begin_inset LatexCommand printindex + +\end_inset + + +\end_layout + +\end_body +\end_document diff --git a/doc/test_suite_spec.lyx b/doc/test_suite_spec.lyx new file mode 100644 index 0000000..bf4ea1b --- /dev/null +++ b/doc/test_suite_spec.lyx @@ -0,0 +1,647 @@ +#LyX 1.5.7 created this file. For more info see http://www.lyx.org/ +\lyxformat 276 +\begin_document +\begin_header +\textclass article +\begin_preamble +\pdfoptionpdfminorversion=3 +\usepackage[ + pdftitle={Proposed Test Suite Design}, + pdfauthor={Michael Hope}, + pdfkeywords={c case compiler framework GPL regression SDCC suite test}, + colorlinks=true, + linkcolor=blue] {hyperref} +\end_preamble +\language english +\inputencoding auto +\font_roman times +\font_sans default +\font_typewriter default +\font_default_family default +\font_sc false +\font_osf false +\font_sf_scale 100 +\font_tt_scale 100 +\graphics default +\paperfontsize default +\spacing single +\papersize default +\use_geometry false +\use_amsmath 1 +\use_esint 0 +\cite_engine basic +\use_bibtopic false +\paperorientation portrait +\secnumdepth 3 +\tocdepth 3 +\paragraph_separation indent +\defskip medskip +\quotes_language english +\papercolumns 1 +\papersides 1 +\paperpagestyle default +\tracking_changes false +\output_changes false +\author "" +\end_header + +\begin_body + +\begin_layout Title +Proposed Test Suite Design +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +date{2001-07-13} +\end_layout + +\end_inset + + +\end_layout + +\begin_layout Author +Michael Hope (michaelh @ juju.net.nz) +\end_layout + +\begin_layout Abstract +This article describes the goals, requirements, and suggested specification + for a test suite for the output of the Small Device C Compiler (sdcc). + Also included is a short list of existing works. + +\end_layout + +\begin_layout Section +Goals +\end_layout + +\begin_layout Standard +The main goals of a test suite for sdcc are +\end_layout + +\begin_layout Enumerate +To allow developers to run regression tests to check that core changes do + not break any of the many ports. + +\end_layout + +\begin_layout Enumerate +To verify the core. + +\end_layout + +\begin_layout Enumerate +To allow developers to verify individual ports. + +\end_layout + +\begin_layout Enumerate +To allow developers to test port changes. + +\end_layout + +\begin_layout Standard +This design only covers the generated code. + It does not cover a test/unit test framework for the sdcc application itself, + which may be useful. +\end_layout + +\begin_layout Standard +One side effect of (1) is that it requires that the individual ports pass + the tests originally. + This may be too hard. + See the section on Exceptions below. +\end_layout + +\begin_layout Section +Requirements +\end_layout + +\begin_layout Subsection +Coverage +\end_layout + +\begin_layout Standard +The suite is intended to cover language features only. + Hardware specific libraries are explicitly not covered. +\end_layout + +\begin_layout Subsection +Permutations +\end_layout + +\begin_layout Standard +The ports often generate different code for handling different types (Byte, + Word, DWord, and the signed forms). + Meta information could be used to permute the different test cases across + the different types. +\end_layout + +\begin_layout Subsection +Exceptions +\end_layout + +\begin_layout Standard +The different ports are all at different levels of development. + Test cases must be able to be disabled on a per port basis. + Permutations also must be able to be disabled on a port level for unsupported + cases. + Disabling, as opposed to enabling, on a per port basis seems more maintainable. +\end_layout + +\begin_layout Subsection +Running +\end_layout + +\begin_layout Standard +The tests must be able to run unaided. + The test suite must run on all platforms that sdcc runs on. + A good minimum may be a subset of Unix command set and common tools, provided + by default on a Unix host and provided through cygwin on a Windows host. +\end_layout + +\begin_layout Standard +The tests suits should be able to be sub-divided, so that the failing or + interesting tests may be run separately. +\end_layout + +\begin_layout Subsection +Artifacts +\end_layout + +\begin_layout Standard +The test code within the test cases should not generate artifacts. + An artifact occurs when the test code itself interferes with the test and + generates an erroneous result. +\end_layout + +\begin_layout Subsection +Emulators +\end_layout + +\begin_layout Standard +sdcc is a cross compiling compiler. + As such, an emulator is needed for each port to run the tests. +\end_layout + +\begin_layout Section +Existing works +\end_layout + +\begin_layout Subsection +DejaGnu +\end_layout + +\begin_layout Standard +DejaGnu is a toolkit written in Expect designed to test an interactive program. + It provides a way of specifying an interface to the program, and given + that interface a way of stimulating the program and interpreting the results. + It was originally written by Cygnus Solutions for running against development + boards. + I believe the gcc test suite is written against DejaGnu, perhaps partly + to test the Cygnus ports of gcc on target systems. +\end_layout + +\begin_layout Subsection +gcc test suite +\end_layout + +\begin_layout Standard +I don't know much about the gcc test suite. + It was recently removed from the gcc distribution due to issues with copyright + ownership. + The code I saw from older distributions seemed more concerned with esoteric + features of the language. +\end_layout + +\begin_layout Subsection +xUnit +\end_layout + +\begin_layout Standard +The xUnit family, in particular JUnit, is a library of in test assertions, + test wrappers, and test suite wrappers designed mainly for unit testing. + PENDING: More. +\end_layout + +\begin_layout Subsection +CoreLinux++ Assertion framework +\end_layout + +\begin_layout Standard +While not a test suite system, the assertion framework is an interesting + model for the types of assertions that could be used. + They include pre-condition, post-condition, invariants, conditional assertions, + unconditional assertions, and methods for checking conditions. +\end_layout + +\begin_layout Section +Specification +\end_layout + +\begin_layout Standard +This specification borrows from the JUnit style of unit testing and the + CoreLinux++ style of assertions. + The emphasis is on maintainability and ease of writing the test cases. +\end_layout + +\begin_layout Subsection +Terms +\end_layout + +\begin_layout Standard +PENDING: Align these terms with the rest of the world. +\end_layout + +\begin_layout Itemize +An +\emph on +assertion +\emph default + is a statement of how things should be. + PENDING: Better description, an example. + +\end_layout + +\begin_layout Itemize +A +\emph on +test point +\emph default + is the smallest unit of a test suite, and consists of a single assertion + that passes if the test passes. + +\end_layout + +\begin_layout Itemize +A +\emph on +test case +\emph default + is a set of test points that test a certain feature. + +\end_layout + +\begin_layout Itemize +A +\emph on +test suite +\emph default + is a set of test cases that test a certain set of features. + +\end_layout + +\begin_layout Subsection +Test cases +\end_layout + +\begin_layout Standard +Test cases shall be contained in their own C file, along with the meta data + on the test. + Test cases shall be contained within functions whose names start with 'test' + and which are descriptive of the test case. + Any function that starts with 'test' will be automatically run in the test + suite. +\end_layout + +\begin_layout Standard +To make the automatic code generation easier, the C code shall have this + format +\end_layout + +\begin_layout Itemize +Test functions shall start with 'test' to allow automatic detection. + +\end_layout + +\begin_layout Itemize +Test functions shall follow the K&R intention style for ease of detection. + i.e. + the function name shall start in the left column on a new line below the + return specification. + +\end_layout + +\begin_layout Subsection +Assertions +\end_layout + +\begin_layout Standard +All assertions shall log the line number, function name, and test case file + when they fail. + Most assertions can have a more descriptive message attached to them. + Assertions will be implemented through macros to get at the line information. + This may cause trouble with artifacts. +\end_layout + +\begin_layout Standard +The following definitions use C++ style default arguments where optional + messages may be inserted. + All assertions use double opening and closing brackets in the macros to + allow them to be compiled out without any side effects. + While this is not required for a test suite, they are there in case any + of this code is incorporated into the main product. +\end_layout + +\begin_layout Standard +Borrowing from JUnit, the assertions shall include +\end_layout + +\begin_layout Itemize +FAIL((String msg = +\begin_inset Quotes eld +\end_inset + +Failed +\begin_inset Quotes erd +\end_inset + +)). + Used when execution should not get here. + +\end_layout + +\begin_layout Itemize +ASSERT((Boolean cond, String msg = +\begin_inset Quotes eld +\end_inset + +Assertion failed +\begin_inset Quotes erd +\end_inset + +). + Fails if cond is false. + Parent to REQUIRE and ENSURE. + +\end_layout + +\begin_layout Standard +JUnit also includes may sub-cases of ASSERT, such as assertNotNull, assertEquals +, and assertSame. +\end_layout + +\begin_layout Standard +CoreLinux++ includes the extra assertions +\end_layout + +\begin_layout Itemize +REQUIRE((Boolean cond, String msg = +\begin_inset Quotes eld +\end_inset + +Precondition failed +\begin_inset Quotes erd +\end_inset + +). + Checks preconditions. + +\end_layout + +\begin_layout Itemize +ENSURE((Boolean cond, String msg = +\begin_inset Quotes eld +\end_inset + +Postcondition failed +\begin_inset Quotes erd +\end_inset + +). + Checks post conditions. + +\end_layout + +\begin_layout Itemize +CHECK((Boolean cond, String msg = +\begin_inset Quotes eld +\end_inset + +Check failed +\begin_inset Quotes erd +\end_inset + +)). + Used to call a function and to check that the return value is as expected. + i.e. + CHECK((fread(in, buf, 10) != -1)). + Very similar to ASSERT, but the function still gets called in a release + build. + +\end_layout + +\begin_layout Itemize +FORALL and EXISTS. + Used to check conditions within part of the code. + For example, can be used to check that a list is still sorted inside each + loop of a sort routine. + +\end_layout + +\begin_layout Standard +All of FAIL, ASSERT, REQUIRE, ENSURE, and CHECK shall be available. +\end_layout + +\begin_layout Subsection +Meta data +\end_layout + +\begin_layout Standard +PENDING: It's not really meta data. +\end_layout + +\begin_layout Standard +Meta data includes permutation information, exception information, and permutati +on exceptions. +\end_layout + +\begin_layout Standard +Meta data shall be global to the file. + Meta data names consist of the lower case alphanumerics. + Test case specific meta data (fields) shall be stored in a comment block + at the start of the file. + This is only due to style. +\end_layout + +\begin_layout Standard +A field definition shall consist of +\end_layout + +\begin_layout Itemize +The field name +\end_layout + +\begin_layout Itemize +A colon. + +\end_layout + +\begin_layout Itemize +A comma separated list of values. + +\end_layout + +\begin_layout Standard +The values shall be stripped of leading and trailing white space. +\end_layout + +\begin_layout Standard +Permutation exceptions are by port only. + Exceptions to a field are specified by a modified field definition. + An exception definition consists of +\end_layout + +\begin_layout Itemize +The field name. + +\end_layout + +\begin_layout Itemize +An opening square bracket. + +\end_layout + +\begin_layout Itemize +A comma separated list of ports the exception applies for. + +\end_layout + +\begin_layout Itemize +A closing square bracket. + +\end_layout + +\begin_layout Itemize +A colon. + +\end_layout + +\begin_layout Itemize +The values to use for this field for these ports. + +\end_layout + +\begin_layout Standard +An instance of the test case shall be generated for each permutation of + the test case specific meta data fields. +\end_layout + +\begin_layout Standard +The runtime meta fields are +\end_layout + +\begin_layout Itemize +port - The port this test is running on. + +\end_layout + +\begin_layout Itemize +testcase - The name of this test case. + +\end_layout + +\begin_layout Itemize +function - The name of the current function. + +\end_layout + +\begin_layout Standard +Most of the runtime fields are not very usable. + They are there for completeness. +\end_layout + +\begin_layout Standard +Meta fields may be accessed inside the test case by enclosing them in curly + brackets. + The curly brackets will be interpreted anywhere inside the test case, including + inside quoted strings. + Field names that are not recognised will be passed through including the + brackets. + Note that it is therefore impossible to use some strings within the test + case. +\end_layout + +\begin_layout Standard +Test case function names should include the permuted fields in the name + to reduce name collisions. +\end_layout + +\begin_layout Subsection +An example +\end_layout + +\begin_layout Standard +I don't know how to do pre-formatted text in LaTeX. + Sigh. +\end_layout + +\begin_layout Standard +The following code generates a simple increment test for all combinations + of the storage classes and all combinations of the data sizes. + This is a bad example as the optimiser will often remove most of this code. +\newline + +\end_layout + +\begin_layout Verse + +\family typewriter +/** Test for increment. + +\newline +\InsetSpace ~ +\InsetSpace ~ +type: char, int, long +\newline +\InsetSpace ~ +\InsetSpace ~ +Z80 port does not fully support longs (4 byte) +\newline +\InsetSpace ~ +\InsetSpace ~ +type[z80]: + char, int +\newline +\InsetSpace ~ +\InsetSpace ~ +class: +\begin_inset Quotes eld +\end_inset + + +\begin_inset Quotes erd +\end_inset + +, register, static */ +\newline + +\newline +static void +\newline +testInc{class}{types}(void) +\newline +{ +\newline +\InsetSpace ~ +\InsetSpace ~ +{class} {type} + i = 0; +\newline +\InsetSpace ~ +\InsetSpace ~ +i = i + 1; +\newline +\InsetSpace ~ +\InsetSpace ~ +ASSERT((i == 1)); +\newline +} +\end_layout + +\end_body +\end_document diff --git a/doc/z80/Makefile b/doc/z80/Makefile new file mode 100644 index 0000000..f8f288e --- /dev/null +++ b/doc/z80/Makefile @@ -0,0 +1,17 @@ +# Very simple Makefile for converting the design doc into something useful. +TEX = latex + +S = combined_i186_z80_design.tex +PDF = $(S:.tex=.pdf) +PS = $(S:.tex=.ps) + +all: $(PS) $(PDF) + +%.ps: %.dvi + dvips -f.ps $< > $@ + +%.pdf: %.dvi + dvipdf $< $@ + +clean: + rm -f $(PS) $(PDF) *.log *.aux *~ diff --git a/doc/z80/README b/doc/z80/README new file mode 100644 index 0000000..38726ca --- /dev/null +++ b/doc/z80/README @@ -0,0 +1,6 @@ +For more information on the z80 port, see: + +http://earthling.net.nz/michaelh/ + +-- Michael Hope + michaelh@earthling.net diff --git a/doc/z80/combined_i186_z80_design.tex b/doc/z80/combined_i186_z80_design.tex new file mode 100644 index 0000000..2bec4f7 --- /dev/null +++ b/doc/z80/combined_i186_z80_design.tex @@ -0,0 +1,192 @@ +% Combined i186/Z80 design +\documentclass{article} + +% Too long to type :) +\newcommand{\tosh}{Toshiba TLCS-900H} + +\begin{document} +\title{Combined i186/Z80 backend design} +\author{Michael Hope michaelh@earthling.net.nz} +\date{\today} +\maketitle + +\begin{abstract} +There is much similarity between the Zilog Z80, Nintendo GBZ80, Intel +i186, and \tosh processors. This document describes the design of a +backend consisting of a register allocator and set of extendable code +generators for SDCC which can target all of these processors. +\end{abstract} + +\section{Motivation} +The primary motivation is to add a i186 backend to SDCC, and in the +process come to understand register allocation. The secondary goal is +to attempt to combine the common parts from the Z80 and i186 backends +to make both easier to maintain. In the 'would be nice' category is +adding support for the \tosh. + +\section{Processor descriptions} + +\subsection{Zilog Z80} +\begin{tabular}{l|l|l} + Name & Parts & Notes \\ \hline + AF & A & Accumulator and flags. Unusable as a pair. \\ \hline + BC & B, C & \\ \hline + DE & D, E & \\ \hline + HL & H, L & \\ \hline + IX & None & Index register. \\ \hline + IY & None & Index register. \\ +\end{tabular} + +The Z80 also has a switchable alternate register set AF', BC', DE', +and HL' which are not accessible directly. It is assumed that it is +too hard to track these to make it worthwhile. IX and IY can be split +at the byte level by using undocumented instructions. While this +would make them more usable as general purpose registers, it is +ignored for compatibility. + +\subsection{Nintendo GBZ80} +The GBZ80 is basically a Z80 less the index registers and the +alternate register set. \\ +\begin{tabular}{l|l|l} + Name & Parts & Notes \\ \hline + AF & A & Accumulator and flags. Unusable as a pair. \\ \hline + BC & B, C & \\ \hline + DE & D, E & \\ \hline + HL & H, L & \\ +\end{tabular} + +\subsection{Intel i186} +\begin{tabular}{l|l|l} + Name & Parts & Notes \\ \hline + AX & AH, AL & Accumulator. \\ \hline + BX & BH, BL & \\ \hline + CX & CH, CL & \\ \hline + DX & DH, DL & \\ \hline + DI & None & Destination Index. \\ \hline + SI & None & Source Index. \\ \hline + BP & None & Base pointer. \\ +\end{tabular} + +Note that the segment registers CS, DS, ES, and SS are not listed. +For simplicity only tiny mode is supported. Tiny mode is where both +the data and code exist in one segment, such that CS = DS. This +allows constant data stored in the code segment to be accessed in the +same method as data. This may cause trouble later if far mode is +needed. + +\subsection{\tosh} +The 900H seems to be inspired by the Z80. It is listed as a 16 bit +device, but most of the registers are 32 bits wide. \\ +\begin{tabular}{l|l|l} + Name & Parts & Notes \\ \hline + XWA & WA, W, A & Accumulator \\ \hline + XBC & BC, B, C & \\ \hline + XDE & DE, D, E & \\ \hline + XHL & HL, H, L & \\ \hline + XIX & IX & \\ \hline + XIY & IY & \\ \hline + XIZ & IZ & \\ +\end{tabular} + +All registers can act as either an index base or an index offset. The +offset is limited to sixteen bits. Apparently XIX, XIY, and XIZ can +be split at the byte level. For simplicity this is ignored. + +\section{Common features} +\subsection{Stack} +The stack grows downwards. All push operations are pre-decrement. +All but the GBZ80 have a base pointer register that can be used along +with an offset to access local variables and parameters. The GBZ80 and +Z80 both have problems with more than 127 bytes of local variables due +to their offset being a INT8. + +\subsection{Registers} +All contain a reasonable but small number of registers. All have some +special purpose registers which can either be handled separately or +ignored. All general purpose registers can be split at the byte and +word level, but doing so may make the rest of the register +unavailable. + +\subsection{Memory} +All have a 64k address space. However this should not be assumed to make +far support easier later. + +\section{Design} +\subsection{Basics} +The design is mainly stack based, such that all local variables and +parameters go onto the stack. Compare with the mcs51 backend which +overlays variables onto a shared static area. + +All stack access goes through the base pointer register (BP). The +stack frame consists of the parameters pushed right to left, the +return context, and then local variables. SP points to the base of +the local variables. BP points to the bottom of the return context +and hence to just above the top of the local variables. Note that as +the stack grows down the parameters appear with the left most +parameter at the lowest address. + +A scratch register will be available for any sub operation to use and +will be valid only within that sub operation. The accumulator is also +unavailable. Return values are normally returned in the scratch +register and accumulator. + +\begin{tabular}{l|l|l|l|l} + Name & i186 & Z80 & GBZ80 & 900H \\ \hline + Base pointer & BP & IX & HL & XIX \\ \hline + Scratch & BX & HL & DE & XHL \\ \hline + Return & BX, AX & HL, IY & DE, HL & XHL \\ \hline + Available & CX, DX & BC, DE & BC & XBC, XDE \\ \hline + Ignored & SI, DI & IY & None & XIY, XIZ \\ +\end{tabular} + +\subsection{Register allocator} +The current Z80 and mcs51 register allocators perform these steps: +\begin{enumerate} + \item Pack each basic block by removing straight assignments and marking +remat. iTemps. + \item Set the number of registers required for each live range based on +the type and size of the live range. + \item Assign registers to each segment by deassigning registers and stack +locations for any just expired iTemps, skipping any instructions which don't need +registers, and spilling and assigning registers to the result of this tuple. + \item Create the register mask for this segment. +\end{enumerate} + +Optimisations include assigning into the accumulator or the scratch +register where possible. This requires knowledge of what the code +generator touches for a given instruction. + +The first generation register allocator will only pack assignments and mark +remat. variables. Only the register management is processor specific. The +allocator may ask for a given size register or if a given size register is +available. Note that only whole registers may be returned. For example, +allocation will fail if a sixteen bit register is requested and no pair +is available, even two eight bit registers are available. Note that on +the Z80, GBZ80, and i186 a request for a 32 bit register will always fail. + +\subsection{Code generator} +The possible operations are: +\begin{itemize} + \item NOT - Logical not. 0 -> 1, others -> 0. + \item CPL - Bitwise complement. + \item UMINUS - Unary minus. result = 0 - left. + \item IPUSH - Push immediate onto the stack. + \item CALL - Call a function. + \item PCALL - Call via pointer. + \item FUNCTION - Emit the function prelude. + \item ENDFUNCTION - Emit the function prologue. + \item RET - Load the return value and jump to end of function. + \item LABEL - Generate a local label. + \item GOTO - Jump to a local label. + \item Arithmitic - +, -, *, /, \%. + \item Comparison - LT, GT, LEQ, GEQ, !=, =. + \item Logical - \&\&, || + \item Binary - AND, OR, XOR. + \item Shift - RRC, RLC, LSR, LSL. + \item Pointer - Set and Get. + \item Assign. + \item IF jump. + \item Misc - Jump table, cast, address of. +\end{itemize} + +\end{document} \ No newline at end of file diff --git a/install-sh b/install-sh new file mode 100755 index 0000000..39ed53b --- /dev/null +++ b/install-sh @@ -0,0 +1,241 @@ +#! /bin/sh +# +# install - install a program, script, or datafile +# This comes from X11R5. +# +# Calling this script install-sh is preferred over install.sh, to prevent +# `make' implicit rules from creating a file called install from it +# when there is no Makefile. +# +# This script is compatible with the BSD install script, but was written +# from scratch. +# + + +# set DOITPROG to echo to test this script + +# Don't use :- since 4.3BSD and earlier shells don't like it. +doit="${DOITPROG-}" + +# make sure ordinary users can access files installed by +# a restrictive root using umaks 0077 +umask 0022 + +# put in absolute paths if you don't have them in your path; or use env. vars. + +mvprog="${MVPROG-mv}" +cpprog="${CPPROG-cp}" +chmodprog="${CHMODPROG-chmod}" +chownprog="${CHOWNPROG-chown}" +chgrpprog="${CHGRPPROG-chgrp}" +stripprog="${STRIPPROG-strip}" +rmprog="${RMPROG-rm}" +mkdirprog="${MKDIRPROG-mkdir}" + +tranformbasename="" +transform_arg="" +instcmd="$mvprog" +chmodcmd="$chmodprog 0755" +chowncmd="" +chgrpcmd="" +stripcmd="" +rmcmd="$rmprog -f" +mvcmd="$mvprog" +src="" +dst="" +dir_arg="" + +while [ x"$1" != x ]; do + case $1 in + -c) instcmd="$cpprog" + shift + continue;; + + -d) dir_arg=true + shift + continue;; + + -m) chmodcmd="$chmodprog $2" + shift + shift + continue;; + + -o) chowncmd="$chownprog $2" + shift + shift + continue;; + + -g) chgrpcmd="$chgrpprog $2" + shift + shift + continue;; + + -s) stripcmd="$stripprog" + shift + continue;; + + -t=*) transformarg=`echo $1 | sed 's/-t=//'` + shift + continue;; + + -b=*) transformbasename=`echo $1 | sed 's/-b=//'` + shift + continue;; + + *) if [ x"$src" = x ] + then + src=$1 + else + # this colon is to work around a 386BSD /bin/sh bug + : + dst=$1 + fi + shift + continue;; + esac +done + +if [ x"$src" = x ] +then + echo "install: no input file specified" + exit 1 +else + true +fi + +if [ x"$dir_arg" != x ]; then + dst=$src + src="" + + if [ -d $dst ]; then + instcmd=: + else + instcmd=mkdir + fi +else + +# Waiting for this to be detected by the "$instcmd $src $dsttmp" command +# might cause directories to be created, which would be especially bad +# if $src (and thus $dsttmp) contains '*'. + + if [ -f $src -o -d $src ] + then + true + else + echo "install: $src does not exist" + exit 1 + fi + + if [ x"$dst" = x ] + then + echo "install: no destination specified" + exit 1 + else + true + fi + +# If destination is a directory, append the input filename; if your system +# does not like double slashes in filenames, you may need to add some logic + + if [ -d $dst ] + then + dst="$dst"/`basename $src` + else + true + fi +fi + +## this sed command emulates the dirname command +dstdir=`echo $dst | sed -e 's,[^/]*$,,;s,/$,,;s,^$,.,'` + +# Make sure that the destination directory exists. +# this part is taken from Noah Friedman's mkinstalldirs script + +# Skip lots of stat calls in the usual case. +if [ ! -d "$dstdir" ]; then +defaultIFS=' +' +IFS="${IFS-${defaultIFS}}" + +oIFS="${IFS}" +# Some sh's can't handle IFS=/ for some reason. +IFS='%' +set - `echo ${dstdir} | sed -e 's@/@%@g' -e 's@^%@/@'` +IFS="${oIFS}" + +pathcomp='' + +while [ $# -ne 0 ] ; do + pathcomp="${pathcomp}${1}" + shift + + if [ ! -d "${pathcomp}" ] ; + then + $mkdirprog "${pathcomp}" + else + true + fi + + pathcomp="${pathcomp}/" +done +fi + +if [ x"$dir_arg" != x ] +then + $doit $instcmd $dst && + + if [ x"$chowncmd" != x ]; then $doit $chowncmd $dst; else true ; fi && + if [ x"$chgrpcmd" != x ]; then $doit $chgrpcmd $dst; else true ; fi && + if [ x"$stripcmd" != x ]; then $doit $stripcmd $dst; else true ; fi && + if [ x"$chmodcmd" != x ]; then $doit $chmodcmd $dst; else true ; fi +else + +# If we're going to rename the final executable, determine the name now. + + if [ x"$transformarg" = x ] + then + dstfile=`basename $dst` + else + dstfile=`basename $dst $transformbasename | + sed $transformarg`$transformbasename + fi + +# don't allow the sed command to completely eliminate the filename + + if [ x"$dstfile" = x ] + then + dstfile=`basename $dst` + else + true + fi + +# Make a temp file name in the proper directory. + + dsttmp=$dstdir/#inst.$$# + +# Move or copy the file name to the temp name + + $doit $instcmd $src $dsttmp && + + trap "rm -f ${dsttmp}" 0 && + +# and set any options; do chmod last to preserve setuid bits + +# If any of these fail, we abort the whole thing. If we want to +# ignore errors from any of these, just make sure not to ignore +# errors from the above "$doit $instcmd $src $dsttmp" command. + + if [ x"$chowncmd" != x ]; then $doit $chowncmd $dsttmp; else true;fi && + if [ x"$chgrpcmd" != x ]; then $doit $chgrpcmd $dsttmp; else true;fi && + if [ x"$stripcmd" != x ]; then $doit $stripcmd $dsttmp; else true;fi && + if [ x"$chmodcmd" != x ]; then $doit $chmodcmd $dsttmp; else true;fi && + +# Now rename the file to the real destination. + + $doit $rmcmd -f $dstdir/$dstfile && + $doit $mvcmd $dsttmp $dstdir/$dstfile + +fi && + + +exit 0 diff --git a/main_in.mk b/main_in.mk new file mode 100644 index 0000000..a389108 --- /dev/null +++ b/main_in.mk @@ -0,0 +1,106 @@ +# +# +# + +# Version +VERSION = @VERSION@ +VERSIONHI = @VERSIONHI@ +VERSIONLO = @VERSIONLO@ +VERSIONP = @VERSIONP@ + +# Programs +SHELL = /bin/sh +CC = @CC@ +CPP = @CPP@ +RANLIB = @RANLIB@ +INSTALL = @INSTALL@ +AUTOCONF = @AUTOCONF@ + +# Directories +PRJDIR = . + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @infodir@ +srcdir = @srcdir@ + +# Flags +DEFS = $(subs -DHAVE_CONFIG_H,,@DEFS@) +CPPFLAGS = @CPPFLAGS@ -I$(PRJDIR) +CFLAGS = @CFLAGS@ +M_OR_MM = @M_OR_MM@ + + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf + + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: all installdirs + + +# Deleting all the installed files +# -------------------------------- +uninstall: + + +# Performing self-test +# -------------------- +check: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + + +# Creating dependencies +# --------------------- +dep: #main.dep + +#main.dep: *.c *.h +# $(CPP) $(CPPFLAGS) $(M_OR_MM) *.c >main.dep + +#-include main.dep +include $(srcdir)/clean.mk + +# My rules +# -------- +.c.o: + $(CC) $(CFLAGS) $(CPPFLAGS) -c $< -o $@ + +.y.c: + rm -f $*.cc $*.h + $(YACC) -d $< + mv y.tab.c $*.cc + mv y.tab.h $*.h + +.l.c: + rm -f $*.cc + $(LEX) -t $< >$*.cc + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(PRJDIR)/devel ]; then\ + $(MAKE) -f $(srcdir)/conf.mk srcdir="$(srcdir)" freshconf;\ + fi + +# End of main_in.mk/main.mk + diff --git a/sdcc.dsw b/sdcc.dsw new file mode 100644 index 0000000..3f89a7c --- /dev/null +++ b/sdcc.dsw @@ -0,0 +1,557 @@ +Microsoft Developer Studio Workspace File, Format Version 6.00 +# WARNING: DO NOT EDIT OR DELETE THIS WORKSPACE FILE! + +############################################################################### + +Project: "all"=.\all.dsp - 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Package Owner=<4> + +Package=<5> +{{{ +}}} + +Package=<4> +{{{ + Begin Project Dependency + Project_Dep_Name xa51a + End Project Dependency + Begin Project Dependency + Project_Dep_Name yacc + End Project Dependency + Begin Project Dependency + Project_Dep_Name config + End Project Dependency +}}} + +############################################################################### + +Project: "xa51a"=.\src\xa51\xa51a.dsp - Package Owner=<4> + +Package=<5> +{{{ +}}} + +Package=<4> +{{{ +}}} + +############################################################################### + +Project: "yacc"=.\src\yacc.dsp - Package Owner=<4> + +Package=<5> +{{{ +}}} + +Package=<4> +{{{ +}}} + +############################################################################### + +Project: "z80"=.\src\z80\z80.dsp - Package Owner=<4> + +Package=<5> +{{{ +}}} + +Package=<4> +{{{ + Begin Project Dependency + Project_Dep_Name z80a + End Project Dependency + Begin Project Dependency + Project_Dep_Name yacc + End Project Dependency + Begin Project Dependency + Project_Dep_Name config + End Project Dependency +}}} + +############################################################################### + +Project: "z80a"=.\src\z80\z80a.dsp - Package Owner=<4> + +Package=<5> +{{{ +}}} + +Package=<4> +{{{ +}}} + +############################################################################### + +Global: + +Package=<5> +{{{ +}}} + +Package=<3> +{{{ +}}} + +############################################################################### + diff --git a/sdcc.spec b/sdcc.spec new file mode 100644 index 0000000..86653d2 --- /dev/null +++ b/sdcc.spec @@ -0,0 +1,92 @@ +# +# spec file for package sdcc +# + +Name: sdcc +Requires: /bin/sh +License: GPL +Group: Applications/Engineering +Summary: Small Device C Compiler +Requires: sdcc-common +Version: 2.9.0 +Release: 2 +Source: %{name}-src-%{version}.tar.gz +URL: http://sdcc.sourceforge.net/ +Packager: Bernhard Held +BuildRoot: %{_tmppath}/%{name}-%{version}-build + +%description +SDCC is a C compiler for 8051 class and similar microcontrollers. +The package includes the compiler, assemblers and linkers, a device +simulator and a core library. The processors supported (to a varying +degree) include the 8051, ds390, z80, hc08, and PIC. + +%package common +License: GPL, LGPL +Group: Application/Engineering +Summary: Libraries and Header Files for the SDCC C compiler +Requires: sdcc + +%description common +SDCC is a C compiler for 8051 class and similar microcontrollers. +The package includes the compiler, assemblers and linkers, a device +simulator and a core library. The processors supported (to a varying +degree) include the 8051, ds390, z80, hc08, and PIC. + +%package doc +License: GPL +Group: Applications/Engineering +Summary: Documentation for the SDCC C compiler + +%description doc +SDCC is a C compiler for 8051 class and similar microcontrollers. +The package includes the compiler, assemblers and linkers, a device +simulator and a core library. The processors supported (to a varying +degree) include the 8051, ds390, z80, hc08, and PIC. + +%prep +%setup -n sdcc + +%build +./configure CFLAGS="$RPM_OPT_FLAGS" --prefix=/usr --enable-doc docdir=$RPM_BUILD_ROOT/%{_defaultdocdir}/%{name} +make +cd doc +make +cd .. + +%install +rm -rf $RPM_BUILD_ROOT +make prefix=$RPM_BUILD_ROOT/usr install +cd doc +make install +cd .. + +%clean +rm -rf $RPM_BUILD_ROOT + +%files +%defattr(-,root,root) +/usr/bin + +%files common +%defattr(-,root,root) +/usr/share/sdcc/include +/usr/share/sdcc/lib + +%files doc +%defattr(-,root,root) +%doc %{_defaultdocdir} + +%changelog +* Sun Dec 26 2006 - bernhard AT bernhardheld.de +- version updated +* Sun Sep 03 2006 - Christer Weinigel +- fixed build of doc +* Tue Mar 09 2004 - bernhard AT bernhardheld.de +- split into two packages +* Wed Feb 26 2004 - bernhard AT bernhardheld.de +- version updated +* Sun Jan 04 2004 - bernhard AT bernhardheld.de +- updated +* Sat Apr 27 2002 - steve AT icarus.com +- first version from Stephen Williams diff --git a/sdcc_vc_in.h b/sdcc_vc_in.h new file mode 100644 index 0000000..55fee18 --- /dev/null +++ b/sdcc_vc_in.h @@ -0,0 +1,80 @@ +#ifndef SDCC_VC_HEADER +#define SDCC_VC_HEADER + + +#undef SDCC_VERSION_HI +#undef SDCC_VERSION_LO +#undef SDCC_VERSION_P +#undef SDCC_VERSION_STR + +#ifndef __FUNCTION__ +#define __FUNCTION__ __FILE__ +#endif + +#define __func__ __FUNCTION__ + +#define DIR_SEPARATOR_STRING "\\" +#define DIR_SEPARATOR_CHAR '\\' + +#define PREFIX "\\sdcc" +#define EXEC_PREFIX "\\sdcc" +#define BIN_PREFIX "\\sdcc\\bin" +#define DATADIR "\\sdcc" + +#define INCLUDE_DIR_SUFFIX "\\include" +#define LIB_DIR_SUFFIX "\\lib" + +#define BIN2DATA_DIR "\\.." +#define PREFIX2BIN_DIR "\\bin" +#define PREFIX2DATA_DIR "" +#define BINDIR PREFIX "\\bin" + +/* environment variables */ +#define SDCC_DIR_NAME "SDCC_HOME" +#define SDCC_INCLUDE_NAME "SDCC_INCLUDE" +#define SDCC_LIB_NAME "SDCC_LIB" + +/* standard libraries */ +#define STD_LIB "libsdcc" +#define STD_INT_LIB "libint" +#define STD_LONG_LIB "liblong" +#define STD_FP_LIB "libfloat" +#define STD_DS390_LIB "libds390" +#define STD_DS400_LIB "libds400" +/* #undef STD_XA51_LIB */ + +/* #undef HAVE_SYS_SOCKET_H */ + +#undef HAVE_STRERROR +#define HAVE_VSNPRINTF +#define vsnprintf _vsnprintf +#undef HAVE_SPRINTF +#undef HAVE_VSPRINTF +#undef HAVE_MKSTEMP +#define pclose _pclose + +#define RETSIGTYPE void + +#define TYPE_BYTE char +#define TYPE_WORD short +#define TYPE_DWORD int +#define TYPE_UBYTE unsigned TYPE_BYTE +#define TYPE_UWORD unsigned TYPE_WORD +#define TYPE_UDWORD unsigned TYPE_DWORD + +/* #undef WORDS_BIGENDIAN */ + +/* for flex 2.5.35 and greater */ +#define YY_NO_UNISTD_H 1 + +#undef OPT_DISABLE_MCS51 +#undef OPT_DISABLE_GBZ80 +#undef OPT_DISABLE_Z80 +#undef OPT_DISABLE_AVR +#undef OPT_DISABLE_TININative +#undef OPT_DISABLE_PIC +#undef OPT_DISABLE_XA51 + +#endif /* SDCC_VC_HEADER */ + +/* End of sdcc_vc.h */ diff --git a/sdccconf_in.h b/sdccconf_in.h new file mode 100644 index 0000000..cd08da4 --- /dev/null +++ b/sdccconf_in.h @@ -0,0 +1,99 @@ +/* + */ + +#ifndef SDCCCONF_HEADER +#define SDCCCONF_HEADER + + +#undef SDCC_VERSION_HI +#undef SDCC_VERSION_LO +#undef SDCC_VERSION_P +#undef SDCC_VERSION_STR + +#undef DIR_SEPARATOR_STRING +#undef DIR_SEPARATOR_CHAR + +#undef PREFIX +#undef EXEC_PREFIX +#undef BINDIR +#undef DATADIR + +#undef INCLUDE_DIR_SUFFIX +#undef LIB_DIR_SUFFIX + +#undef BIN2DATA_DIR +#undef PREFIX2BIN_DIR +#undef PREFIX2DATA_DIR + +/* environment variables */ +#undef SDCC_DIR_NAME +#undef SDCC_INCLUDE_NAME +#undef SDCC_LIB_NAME + +/* standard libraries */ +#undef STD_LIB +#undef STD_INT_LIB +#undef STD_LONG_LIB +#undef STD_FP_LIB +#undef STD_DS390_LIB +#undef STD_DS400_LIB +#undef STD_XA51_LIB + +#undef HAVE_STRERROR +#undef HAVE_VSNPRINTF +#undef HAVE_SNPRINTF +#undef HAVE_VSPRINTF +#undef HAVE_MKSTEMP + +#undef RETSIGTYPE + +#undef TYPE_BYTE +#undef TYPE_WORD +#undef TYPE_DWORD +#undef TYPE_UBYTE +#undef TYPE_UWORD +#undef TYPE_UDWORD + +/* + * find out the endianess of host machine + * in order to be able to make Mac OS X unified binaries + */ +/* This is tricky since these might be defined with a blank replacement list */ +/* such as on SPARC Solaris. However, configure gets it right, so it's ok */ +/* that (_BIG_ENDIAN+0) is false, even though it is defined. */ +#if (__BIG_ENDIAN__+0) || (_BIG_ENDIAN+0) +/* 1) trust the compiler */ +# define WORDS_BIGENDIAN 1 +#elif __LITTLE_ENDIAN__ +/* do nothing */ +#elif (defined BYTE_ORDER && defined BIG_ENDIAN && defined LITTLE_ENDIAN && BYTE_ORDER && BIG_ENDIAN && LITTLE_ENDIAN) +/* 2) trust the header files */ +# if BYTE_ORDER == BIG_ENDIAN +# define WORDS_BIGENDIAN 1 +# endif +#else +/* 3) trust the configure; this actually doesn't work for unified Mac OS X binaries :-( */ +# undef BUILD_WORDS_BIGENDIAN +# if (defined BUILD_WORDS_BIGENDIAN && BUILD_WORDS_BIGENDIAN) +# define WORDS_BIGENDIAN 1 +# endif +/* 4) assume that host is a little endian machine */ +#endif + +#undef OPT_DISABLE_MCS51 +#undef OPT_DISABLE_GBZ80 +#undef OPT_DISABLE_Z80 +#undef OPT_DISABLE_AVR +#undef OPT_DISABLE_DS390 +#undef OPT_DISABLE_DS400 +#undef OPT_DISABLE_TININative +#undef OPT_DISABLE_PIC +#undef OPT_DISABLE_PIC16 +#undef OPT_DISABLE_XA51 +#undef OPT_DISABLE_HC08 + +#undef OPT_ENABLE_LIBGC + +#endif + +/* End of config.h */ diff --git a/sim/README b/sim/README new file mode 100644 index 0000000..e1fa4a7 --- /dev/null +++ b/sim/README @@ -0,0 +1,6 @@ +sdcc/simulator +-------------- + +I have no idea :) + +-- Michael diff --git a/sim/ucsim/(c).1 b/sim/ucsim/(c).1 new file mode 100644 index 0000000..d673f9f --- /dev/null +++ b/sim/ucsim/(c).1 @@ -0,0 +1,25 @@ +/* + * Simulator of microcontrollers (@@F@@) + * + * Copyright (C) @@S@@,@@Y@@ Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ diff --git a/sim/ucsim/.version b/sim/ucsim/.version new file mode 100644 index 0000000..7d85683 --- /dev/null +++ b/sim/ucsim/.version @@ -0,0 +1 @@ +0.5.4 diff --git a/sim/ucsim/COPYING b/sim/ucsim/COPYING new file mode 100644 index 0000000..916d1f0 --- /dev/null +++ b/sim/ucsim/COPYING @@ -0,0 +1,339 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc. + 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. 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The Free Software Foundation may publish revised and/or new versions +of the General Public License from time to time. Such new versions will +be similar in spirit to the present version, but may differ in detail to +address new problems or concerns. + +Each version is given a distinguishing version number. If the Program +specifies a version number of this License which applies to it and "any +later version", you have the option of following the terms and conditions +either of that version or of any later version published by the Free +Software Foundation. If the Program does not specify a version number of +this License, you may choose any version ever published by the Free Software +Foundation. + + 10. If you wish to incorporate parts of the Program into other free +programs whose distribution conditions are different, write to the author +to ask for permission. For software which is copyrighted by the Free +Software Foundation, write to the Free Software Foundation; we sometimes +make exceptions for this. Our decision will be guided by the two goals +of preserving the free status of all derivatives of our free software and +of promoting the sharing and reuse of software generally. + + NO WARRANTY + + 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY +FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN +OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES +PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED +OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS +TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE +PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, +REPAIR OR CORRECTION. + + 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING +WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR +REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, +INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING +OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED +TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY +YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER +PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE +POSSIBILITY OF SUCH DAMAGES. + + END OF TERMS AND CONDITIONS + + Appendix: How to Apply These Terms to Your New Programs + + If you develop a new program, and you want it to be of the greatest +possible use to the public, the best way to achieve this is to make it +free software which everyone can redistribute and change under these terms. + + To do so, attach the following notices to the program. It is safest +to attach them to the start of each source file to most effectively +convey the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + + Copyright (C) 19yy + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) 19yy name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + , 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Library General +Public License instead of this License. diff --git a/sim/ucsim/INSTALL b/sim/ucsim/INSTALL new file mode 100644 index 0000000..4f02465 --- /dev/null +++ b/sim/ucsim/INSTALL @@ -0,0 +1,6 @@ +uCsim +Microcontroller simulator + + +See HTML documents in doc subdirectory for instructions how to install +uCsim. diff --git a/sim/ucsim/Makefile.in b/sim/ucsim/Makefile.in new file mode 100644 index 0000000..0a2cccf --- /dev/null +++ b/sim/ucsim/Makefile.in @@ -0,0 +1,203 @@ +# +# uCsim Makefile +# +# (c) Drotos Daniel, Talker Bt. 1997,99 +# + +STARTYEAR = 1997 + +SHELL = /bin/sh + +include packages.mk +#PKGS = cmd.src sim.src gui.src s51.src avr.src z80.src doc + +VPATH = @srcdir@ +srcdir = @srcdir@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf + $(MAKE) -f main.mk all + @for pkg in $(PKGS); do\ + $(MAKE) -C $$pkg $$pkg ;\ + done + $(MAKE) -f main.mk main_app + +libs: main.mk + $(MAKE) -f main.mk libs + + +# Compiling and installing everything and runing test +# --------------------------------------------------- +.PHONY: install INSTALL Install +install: + $(MAKE) -f main.mk install + @for pkg in $(PKGS); do\ + $(MAKE) -C $$pkg install ;\ + done + + +# Deleting all the installed files +# -------------------------------- +uninstall: + $(MAKE) -f main.mk uninstall + @for pkg in $(PKGS); do\ + $(MAKE) -C $$pkg uninstall ;\ + done + + +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + $(MAKE) -f $(srcdir)/clean.mk clean EXEEXT=$(EXEEXT) + @for pkg in $(PKGS_ALL); do\ + $(MAKE) -C $$pkg -f ../$(srcdir)/$$pkg/clean.mk clean EXEEXT=$(EXEEXT) ;\ + done + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + $(MAKE) -f $(srcdir)/clean.mk distclean + @for pkg in $(PKGS_ALL); do\ + $(MAKE) -C $$pkg -f ../$(srcdir)/$$pkg/clean.mk distclean ;\ + done + rm -rf doc/*~ doc/*.bak Makefile packages.mk libtool + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + $(MAKE) -f clean.mk mostlyclean + @for pkg in $(PKGS_ALL); do\ + $(MAKE) -C $$pkg -f ../$(srcdir)/$$pkg/clean.mk mostlyclean ;\ + done + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, stc. +# ----------------------------------------------------------------------- +realclean: distclean + $(MAKE) -f clean.mk realclean + @for pkg in $(PKGS_ALL); do\ + $(MAKE) -C $$pkg -f ../$(srcdir)/$$pkg/clean.mk realclean ;\ + done + + +# Creating distribution +# --------------------- +dist: distclean + @if [ -f devel ]; then\ + rm -f devel; mkdist; touch devel;\ + else\ + mkdist;\ + fi + + +# Performing self-test +# -------------------- +check: + $(MAKE) -f main.mk check + @for pkg in $(PKGS); do\ + $(MAKE) -C $$pkg check ;\ + done + +test: + $(MAKE) -f main.mk test + @for pkg in $(PKGS); do\ + $(MAKE) -C $$pkg test ;\ + done + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating dependencies +# --------------------- +dep: + $(MAKE) -f main.mk dep + @for pkg in $(PKGS); do\ + $(MAKE) -C $$pkg dep ;\ + done + + +# My rules +# -------- +putcopyright: + 'put(c)' -s $(STARTYEAR) *.cc *.h *.y *.l + +start: + date '+%Y.%m.%d-%H:%M' >.start + +newer: distclean + @if [ -f .start ]; then \ + tar cvf - \ + `find . -newer .start -type f -print` |\ + gzip -9c >ucsim-newer-`cat .start`_`date '+%Y.%m.%d-%H:%M'`_`hostname`.tgz; \ + else \ + echo ".start file not found.\n"; \ + exit 1; \ + fi + +print-newer: + @if [ -f .start ]; then \ + find . -newer .start -type f -print ;\ + else \ + echo ".start file not found.\n" ;\ + exit 1 ;\ + fi + +new_files: + diff -rNu $$HOME/clean-source/sdcc/sim/ucsim .|\ + grep '^diff' | grep -v .svn | awk '{print $$4}' + +lines: + @find . \( -name '*.[ch]' -o -name '*.cc' -o -name '*.hh' \) \ + -exec cat {} \; | clines + + +# Remaking configuration +# ---------------------- +configure: configure.in + @$(top_srcdir)/mkecho $(top_builddir) "RE-CREATING CONFIGURE" + autoconf configure.in >configure + chmod 755 configure + +config.status: configure + @$(top_srcdir)/mkecho $(top_builddir) "RE-CHECKING CONFIGURATION (re-creating config.status from configure)" + @if [ -x ./config.status ]; then \ + ./config.status -recheck;\ + else\ + if [ -x ./conf ]; then\ + ./conf;\ + else\ + ./configure;\ + fi\ + fi + +makefiles: config.status + @$(top_srcdir)/mkecho $(top_builddir) "RE-MAKING MAKEFILES" + $(SHELL) ./config.status + +main.mk: $(srcdir)/main_in.mk config.status + @$(top_srcdir)/mkecho $(top_builddir) "RE-MAKING MAIN.MK" + $(SHELL) ./config.status + +freshconf: echo_freshconf configure main.mk ddconfig.h + +ddconfig.h: ddconfig_in.h config.status + $(SHELL) ./config.status + +echo_freshconf: + @$(top_srcdir)/mkecho $(top_builddir) "FRESHCONF" + +checkconf: + @$(top_srcdir)/mkecho $(top_builddir) "CHECKCONF" + @if [ -f devel ]; then $(MAKE) freshconf; fi + +# End of Makefile diff --git a/sim/ucsim/NEWS b/sim/ucsim/NEWS new file mode 100644 index 0000000..0fd259e --- /dev/null +++ b/sim/ucsim/NEWS @@ -0,0 +1,47 @@ +0.4.1-pre3 + +Redirection of output of commands. + + +0.4.1-pre4 + +Redesigned of option handling. +Start of libtool introduction. + + +0.4.1-pre5 + +Fix of cl_cmdline::syntax_match. + + +0.4.1-pre6 + +Stack tracking. +Error handling. + + +0.5.0 + +Expressions +Memory simulation redesigned: address space, chip, address decoder +Fix of command interpreter +Document updated + + +0.5.1 + +Implementation of missing instruction ORL C,\bit of MCS51 +Apply changes of SDCC cvs +Fix of AVR instruction decoder +Bug fixes + + +0.5.2 + +Bug fixes to run sdcc regression tests + + +0.5.3 + +Eliminate need of flex (for compile) +Fix of some includes diff --git a/sim/ucsim/README b/sim/ucsim/README new file mode 100644 index 0000000..87bd0d1 --- /dev/null +++ b/sim/ucsim/README @@ -0,0 +1,114 @@ + + uCsim + Micro-controller simulator + + + +What is uCsim? +-------------- + +uCsim is a micro-controller simulator. It is extensible to support +different micro-controller families. Currently it supports Intel MCS51 +family. Atmel AVR core is working now and Z80 support is under +development. + + +How to get uCsim? +----------------- + +uCsim is distributed in source code under GPL. It can be downloaded +from its home site: + +http://mazsola.iit.uni-miskolc.hu/~drdani/embedded/ucsim/ + +uCsim is included in sdcc, free C compiler of Sandeep Dutta. It is a +complete development package with debugger (see belove). It can be +downloaded from its home site (or from its mirrors): + +http://sdcc.sourceforge.net/ + + +Mailing list +------------ + +There is no mailing list which is specifically opened for +uCsim. Announcements are sent to sdcc's mailing list. See sdcc's main +page at above URL for subscribing information and the archive. Ideas, +bug reports or fixes should be sent to sdcc's list too. + + +Feautres of uCsim +----------------- + +Features of uCsim are similar to features of other simulators. It +simulates instructions of the program code and all parts of the +microcontroller including timer/counters, uart, etc. Peripherals are +simulated as accurate as possible. Time resolution is machine cycle +based which means that 1 machine cycle is the smallest time quantity +which is handled by the simulator. + +uCsim has some features which may not available in other +simulators. They include: + +- No GUI. It is not the simulator's job to do graphical representation + of the CPU. It should be done by external programs. uCsim tries to + help GUI and other external tool writers. + +- More than one command console. It is possible to use as many command + interpreters as many needed. uCsim accepts commands from command + consoles simultaneously. It makes possible to give commands to the + simulator during execution of the simulated program. + +- Simulating UART of the controller makes it possible to connect two + instances of the simulator together via simulated serial lines. It + is also possible to connect simulated UART to serial port of the + host machine. + +- Profiling support. uCsim provides "virtual timers" to measure + execution time of any part of the code. It also makes statistic + about ratio of main program and interrupt services. + +- Event breakpoints. Simulator can stop the execution when read or + write event occures at any location of any kind of memory. + + +External tools +-------------- + +uCsim is not well supported (yet) by external tools. But some exists +already. + +SerialView + + It is written by Timothy Hurman and it is + now included in the uCsim package. It is simple "terminal + emulator" which can be used to provide input for the simulated + UART as well as present the output of the UART. + +sdcdb + + Debugger of the free C compiler, called sdcc written by Sandeep + Dutta . It is a usual debugger with command + line interface which uses uCsim in background to run the + code. "Standard" interface of the sdcdb makes it possible to use + any debugger GUI such as ddd to make it comfortable. + + +Contributors and mainteners +--------------------------- + +Gunnar Holm +Sandeep Dutta +Salvador Eduardo Tropea +Josef Wolf +Stephane MEYER +Larry Doolittle +Timothy Hurman +Karl-Max Wagner +Edmar Wienskoski Jr +Alexandre Frey +Kaido Karner +Karl Bongers + +Maintener of serialview: Timothy Hurman +Maintener of other parts: Daniel Drotos diff --git a/sim/ucsim/TODO b/sim/ucsim/TODO new file mode 100644 index 0000000..2c54960 --- /dev/null +++ b/sim/ucsim/TODO @@ -0,0 +1,14 @@ +prompt command to set diff prompt for any console +Tue Aug 17 1999 + +timer val id value +Tue Aug 17 1999 +Done: Tue Aug 17 1999 + +stop should report stop address on `go' console +Tue Aug 17 1999 +Done: Tue Aug 17 1999 + +dis command prints out short lists repeatedly. It should remember addresses +printed out and stop if an already used address comes. +Thu Sep 30 1999 diff --git a/sim/ucsim/aclocal.m4 b/sim/ucsim/aclocal.m4 new file mode 100644 index 0000000..c4229fc --- /dev/null +++ b/sim/ucsim/aclocal.m4 @@ -0,0 +1,3581 @@ +# libtool.m4 - Configure libtool for the host system. -*-Shell-script-*- +## Copyright 1996, 1997, 1998, 1999, 2000, 2001 +## Free Software Foundation, Inc. +## Originally by Gordon Matzigkeit , 1996 +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, but +## WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +## General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +## +## As a special exception to the GNU General Public License, if you +## distribute this file as part of a program that contains a +## configuration script generated by Autoconf, you may include it under +## the same distribution terms that you use for the rest of that program. + +# serial 46 AC_PROG_LIBTOOL + +AC_DEFUN([AC_PROG_LIBTOOL], +[AC_REQUIRE([AC_LIBTOOL_SETUP])dnl + +# This can be used to rebuild libtool when needed +LIBTOOL_DEPS="$ac_aux_dir/ltmain.sh" + +# Always use our own libtool. +LIBTOOL='$(SHELL) $(top_builddir)/libtool' +AC_SUBST(LIBTOOL)dnl + +# Prevent multiple expansion +define([AC_PROG_LIBTOOL], []) +]) + +AC_DEFUN([AC_LIBTOOL_SETUP], +[AC_PREREQ(2.13)dnl +AC_REQUIRE([AC_ENABLE_SHARED])dnl +AC_REQUIRE([AC_ENABLE_STATIC])dnl +AC_REQUIRE([AC_ENABLE_FAST_INSTALL])dnl +AC_REQUIRE([AC_CANONICAL_HOST])dnl +AC_REQUIRE([AC_CANONICAL_BUILD])dnl +AC_REQUIRE([AC_PROG_CC])dnl +AC_REQUIRE([AC_PROG_LD])dnl +AC_REQUIRE([AC_PROG_LD_RELOAD_FLAG])dnl +AC_REQUIRE([AC_PROG_NM])dnl +AC_REQUIRE([AC_PROG_LN_S])dnl +AC_REQUIRE([AC_DEPLIBS_CHECK_METHOD])dnl +AC_REQUIRE([AC_OBJEXT])dnl +AC_REQUIRE([AC_EXEEXT])dnl +dnl + +_LT_AC_PROG_ECHO_BACKSLASH +# Only perform the check for file, if the check method requires it +case $deplibs_check_method in +file_magic*) + if test "$file_magic_cmd" = '$MAGIC_CMD'; then + AC_PATH_MAGIC + fi + ;; +esac + +AC_CHECK_TOOL(RANLIB, ranlib, :) +AC_CHECK_TOOL(STRIP, strip, :) + +ifdef([AC_PROVIDE_AC_LIBTOOL_DLOPEN], enable_dlopen=yes, enable_dlopen=no) +ifdef([AC_PROVIDE_AC_LIBTOOL_WIN32_DLL], +enable_win32_dll=yes, enable_win32_dll=no) + +AC_ARG_ENABLE(libtool-lock, + [ --disable-libtool-lock avoid locking (might break parallel builds)]) +test "x$enable_libtool_lock" != xno && enable_libtool_lock=yes + +# Some flags need to be propagated to the compiler or linker for good +# libtool support. +case $host in +*-*-irix6*) + # Find out which ABI we are using. + echo '[#]line __oline__ "configure"' > conftest.$ac_ext + if AC_TRY_EVAL(ac_compile); then + case `/usr/bin/file conftest.$ac_objext` in + *32-bit*) + LD="${LD-ld} -32" + ;; + *N32*) + LD="${LD-ld} -n32" + ;; + *64-bit*) + LD="${LD-ld} -64" + ;; + esac + fi + rm -rf conftest* + ;; + +*-*-sco3.2v5*) + # On SCO OpenServer 5, we need -belf to get full-featured binaries. + SAVE_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -belf" + AC_CACHE_CHECK([whether the C compiler needs -belf], lt_cv_cc_needs_belf, + [AC_LANG_SAVE + AC_LANG_C + AC_TRY_LINK([],[],[lt_cv_cc_needs_belf=yes],[lt_cv_cc_needs_belf=no]) + AC_LANG_RESTORE]) + if test x"$lt_cv_cc_needs_belf" != x"yes"; then + # this is probably gcc 2.8.0, egcs 1.0 or newer; no need for -belf + CFLAGS="$SAVE_CFLAGS" + fi + ;; + +ifdef([AC_PROVIDE_AC_LIBTOOL_WIN32_DLL], +[*-*-cygwin* | *-*-mingw* | *-*-pw32*) + AC_CHECK_TOOL(DLLTOOL, dlltool, false) + AC_CHECK_TOOL(AS, as, false) + AC_CHECK_TOOL(OBJDUMP, objdump, false) + + # recent cygwin and mingw systems supply a stub DllMain which the user + # can override, but on older systems we have to supply one + AC_CACHE_CHECK([if libtool should supply DllMain function], lt_cv_need_dllmain, + [AC_TRY_LINK([], + [extern int __attribute__((__stdcall__)) DllMain(void*, int, void*); + DllMain (0, 0, 0);], + [lt_cv_need_dllmain=no],[lt_cv_need_dllmain=yes])]) + + case $host/$CC in + *-*-cygwin*/gcc*-mno-cygwin*|*-*-mingw*) + # old mingw systems require "-dll" to link a DLL, while more recent ones + # require "-mdll" + SAVE_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -mdll" + AC_CACHE_CHECK([how to link DLLs], lt_cv_cc_dll_switch, + [AC_TRY_LINK([], [], [lt_cv_cc_dll_switch=-mdll],[lt_cv_cc_dll_switch=-dll])]) + CFLAGS="$SAVE_CFLAGS" ;; + *-*-cygwin* | *-*-pw32*) + # cygwin systems need to pass --dll to the linker, and not link + # crt.o which will require a WinMain@16 definition. + lt_cv_cc_dll_switch="-Wl,--dll -nostartfiles" ;; + esac + ;; + ]) +esac + +_LT_AC_LTCONFIG_HACK + +]) + +# AC_LIBTOOL_HEADER_ASSERT +# ------------------------ +AC_DEFUN([AC_LIBTOOL_HEADER_ASSERT], +[AC_CACHE_CHECK([whether $CC supports assert without backlinking], + [lt_cv_func_assert_works], + [case $host in + *-*-solaris*) + if test "$GCC" = yes && test "$with_gnu_ld" != yes; then + case `$CC --version 2>/dev/null` in + [[12]].*) lt_cv_func_assert_works=no ;; + *) lt_cv_func_assert_works=yes ;; + esac + fi + ;; + esac]) + +if test "x$lt_cv_func_assert_works" = xyes; then + AC_CHECK_HEADERS(assert.h) +fi +])# AC_LIBTOOL_HEADER_ASSERT + +# _LT_AC_CHECK_DLFCN +# -------------------- +AC_DEFUN([_LT_AC_CHECK_DLFCN], +[AC_CHECK_HEADERS(dlfcn.h) +])# _LT_AC_CHECK_DLFCN + +# AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE +# --------------------------------- +AC_DEFUN([AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE], +[AC_REQUIRE([AC_CANONICAL_HOST]) +AC_REQUIRE([AC_PROG_NM]) +AC_REQUIRE([AC_OBJEXT]) +# Check for command to grab the raw symbol name followed by C symbol from nm. +AC_MSG_CHECKING([command to parse $NM output]) +AC_CACHE_VAL([lt_cv_sys_global_symbol_pipe], [dnl + +# These are sane defaults that work on at least a few old systems. +# [They come from Ultrix. What could be older than Ultrix?!! ;)] + +# Character class describing NM global symbol codes. +symcode='[[BCDEGRST]]' + +# Regexp to match symbols that can be accessed directly from C. +sympat='\([[_A-Za-z]][[_A-Za-z0-9]]*\)' + +# Transform the above into a raw symbol and a C symbol. +symxfrm='\1 \2\3 \3' + +# Transform an extracted symbol line into a proper C declaration +lt_cv_global_symbol_to_cdecl="sed -n -e 's/^. .* \(.*\)$/extern char \1;/p'" + +# Transform an extracted symbol line into symbol name and symbol address +lt_cv_global_symbol_to_c_name_address="sed -n -e 's/^: \([[^ ]]*\) $/ {\\\"\1\\\", (lt_ptr) 0},/p' -e 's/^$symcode \([[^ ]]*\) \([[^ ]]*\)$/ {\"\2\", (lt_ptr) \&\2},/p'" + +# Define system-specific variables. +case $host_os in +aix*) + symcode='[[BCDT]]' + ;; +cygwin* | mingw* | pw32*) + symcode='[[ABCDGISTW]]' + ;; +hpux*) # Its linker distinguishes data from code symbols + lt_cv_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern char \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'" + lt_cv_global_symbol_to_c_name_address="sed -n -e 's/^: \([[^ ]]*\) $/ {\\\"\1\\\", (lt_ptr) 0},/p' -e 's/^$symcode* \([[^ ]]*\) \([[^ ]]*\)$/ {\"\2\", (lt_ptr) \&\2},/p'" + ;; +irix* | nonstopux*) + symcode='[[BCDEGRST]]' + ;; +solaris* | sysv5*) + symcode='[[BDT]]' + ;; +sysv4) + symcode='[[DFNSTU]]' + ;; +esac + +# Handle CRLF in mingw tool chain +opt_cr= +case $host_os in +mingw*) + opt_cr=`echo 'x\{0,1\}' | tr x '\015'` # option cr in regexp + ;; +esac + +# If we're using GNU nm, then use its standard symbol codes. +if $NM -V 2>&1 | egrep '(GNU|with BFD)' > /dev/null; then + symcode='[[ABCDGISTW]]' +fi + +# Try without a prefix undercore, then with it. +for ac_symprfx in "" "_"; do + + # Write the raw and C identifiers. +lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[[ ]]\($symcode$symcode*\)[[ ]][[ ]]*\($ac_symprfx\)$sympat$opt_cr$/$symxfrm/p'" + + # Check to see that the pipe works correctly. + pipe_works=no + rm -f conftest* + cat > conftest.$ac_ext < $nlist) && test -s "$nlist"; then + # Try sorting and uniquifying the output. + if sort "$nlist" | uniq > "$nlist"T; then + mv -f "$nlist"T "$nlist" + else + rm -f "$nlist"T + fi + + # Make sure that we snagged all the symbols we need. + if egrep ' nm_test_var$' "$nlist" >/dev/null; then + if egrep ' nm_test_func$' "$nlist" >/dev/null; then + cat < conftest.$ac_ext +#ifdef __cplusplus +extern "C" { +#endif + +EOF + # Now generate the symbol file. + eval "$lt_cv_global_symbol_to_cdecl"' < "$nlist" >> conftest.$ac_ext' + + cat <> conftest.$ac_ext +#if defined (__STDC__) && __STDC__ +# define lt_ptr void * +#else +# define lt_ptr char * +# define const +#endif + +/* The mapping between symbol names and symbols. */ +const struct { + const char *name; + lt_ptr address; +} +lt_preloaded_symbols[[]] = +{ +EOF + sed "s/^$symcode$symcode* \(.*\) \(.*\)$/ {\"\2\", (lt_ptr) \&\2},/" < "$nlist" >> conftest.$ac_ext + cat <<\EOF >> conftest.$ac_ext + {0, (lt_ptr) 0} +}; + +#ifdef __cplusplus +} +#endif +EOF + # Now try linking the two files. + mv conftest.$ac_objext conftstm.$ac_objext + save_LIBS="$LIBS" + save_CFLAGS="$CFLAGS" + LIBS="conftstm.$ac_objext" + CFLAGS="$CFLAGS$no_builtin_flag" + if AC_TRY_EVAL(ac_link) && test -s conftest; then + pipe_works=yes + fi + LIBS="$save_LIBS" + CFLAGS="$save_CFLAGS" + else + echo "cannot find nm_test_func in $nlist" >&AC_FD_CC + fi + else + echo "cannot find nm_test_var in $nlist" >&AC_FD_CC + fi + else + echo "cannot run $lt_cv_sys_global_symbol_pipe" >&AC_FD_CC + fi + else + echo "$progname: failed program was:" >&AC_FD_CC + cat conftest.$ac_ext >&5 + fi + rm -f conftest* conftst* + + # Do not use the global_symbol_pipe unless it works. + if test "$pipe_works" = yes; then + break + else + lt_cv_sys_global_symbol_pipe= + fi +done +]) +global_symbol_pipe="$lt_cv_sys_global_symbol_pipe" +if test -z "$lt_cv_sys_global_symbol_pipe"; then + global_symbol_to_cdecl= + global_symbol_to_c_name_address= +else + global_symbol_to_cdecl="$lt_cv_global_symbol_to_cdecl" + global_symbol_to_c_name_address="$lt_cv_global_symbol_to_c_name_address" +fi +if test -z "$global_symbol_pipe$global_symbol_to_cdec$global_symbol_to_c_name_address"; +then + AC_MSG_RESULT(failed) +else + AC_MSG_RESULT(ok) +fi +]) # AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE + +# _LT_AC_LIBTOOL_SYS_PATH_SEPARATOR +# --------------------------------- +AC_DEFUN([_LT_AC_LIBTOOL_SYS_PATH_SEPARATOR], +[# Find the correct PATH separator. Usually this is `:', but +# DJGPP uses `;' like DOS. +if test "X${PATH_SEPARATOR+set}" != Xset; then + UNAME=${UNAME-`uname 2>/dev/null`} + case X$UNAME in + *-DOS) lt_cv_sys_path_separator=';' ;; + *) lt_cv_sys_path_separator=':' ;; + esac + PATH_SEPARATOR=$lt_cv_sys_path_separator +fi +])# _LT_AC_LIBTOOL_SYS_PATH_SEPARATOR + +# _LT_AC_PROG_ECHO_BACKSLASH +# -------------------------- +# Add some code to the start of the generated configure script which +# will find an echo command which doesn't interpret backslashes. +AC_DEFUN([_LT_AC_PROG_ECHO_BACKSLASH], +[ifdef([AC_DIVERSION_NOTICE], [AC_DIVERT_PUSH(AC_DIVERSION_NOTICE)], + [AC_DIVERT_PUSH(NOTICE)]) +_LT_AC_LIBTOOL_SYS_PATH_SEPARATOR + +# Check that we are running under the correct shell. +SHELL=${CONFIG_SHELL-/bin/sh} + +case X$ECHO in +X*--fallback-echo) + # Remove one level of quotation (which was required for Make). + ECHO=`echo "$ECHO" | sed 's,\\\\\[$]\\[$]0,'[$]0','` + ;; +esac + +echo=${ECHO-echo} +if test "X[$]1" = X--no-reexec; then + # Discard the --no-reexec flag, and continue. + shift +elif test "X[$]1" = X--fallback-echo; then + # Avoid inline document here, it may be left over + : +elif test "X`($echo '\t') 2>/dev/null`" = 'X\t'; then + # Yippee, $echo works! + : +else + # Restart under the correct shell. + exec $SHELL "[$]0" --no-reexec ${1+"[$]@"} +fi + +if test "X[$]1" = X--fallback-echo; then + # used as fallback echo + shift + cat </dev/null && + echo_test_string="`eval $cmd`" && + (test "X$echo_test_string" = "X$echo_test_string") 2>/dev/null + then + break + fi + done +fi + +if test "X`($echo '\t') 2>/dev/null`" = 'X\t' && + echo_testing_string=`($echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + : +else + # The Solaris, AIX, and Digital Unix default echo programs unquote + # backslashes. This makes it impossible to quote backslashes using + # echo "$something" | sed 's/\\/\\\\/g' + # + # So, first we look for a working echo in the user's PATH. + + IFS="${IFS= }"; save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for dir in $PATH /usr/ucb; do + if (test -f $dir/echo || test -f $dir/echo$ac_exeext) && + test "X`($dir/echo '\t') 2>/dev/null`" = 'X\t' && + echo_testing_string=`($dir/echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + echo="$dir/echo" + break + fi + done + IFS="$save_ifs" + + if test "X$echo" = Xecho; then + # We didn't find a better echo, so look for alternatives. + if test "X`(print -r '\t') 2>/dev/null`" = 'X\t' && + echo_testing_string=`(print -r "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + # This shell has a builtin print -r that does the trick. + echo='print -r' + elif (test -f /bin/ksh || test -f /bin/ksh$ac_exeext) && + test "X$CONFIG_SHELL" != X/bin/ksh; then + # If we have ksh, try running configure again with it. + ORIGINAL_CONFIG_SHELL=${CONFIG_SHELL-/bin/sh} + export ORIGINAL_CONFIG_SHELL + CONFIG_SHELL=/bin/ksh + export CONFIG_SHELL + exec $CONFIG_SHELL "[$]0" --no-reexec ${1+"[$]@"} + else + # Try using printf. + echo='printf %s\n' + if test "X`($echo '\t') 2>/dev/null`" = 'X\t' && + echo_testing_string=`($echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + # Cool, printf works + : + elif echo_testing_string=`($ORIGINAL_CONFIG_SHELL "[$]0" --fallback-echo '\t') 2>/dev/null` && + test "X$echo_testing_string" = 'X\t' && + echo_testing_string=`($ORIGINAL_CONFIG_SHELL "[$]0" --fallback-echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + CONFIG_SHELL=$ORIGINAL_CONFIG_SHELL + export CONFIG_SHELL + SHELL="$CONFIG_SHELL" + export SHELL + echo="$CONFIG_SHELL [$]0 --fallback-echo" + elif echo_testing_string=`($CONFIG_SHELL "[$]0" --fallback-echo '\t') 2>/dev/null` && + test "X$echo_testing_string" = 'X\t' && + echo_testing_string=`($CONFIG_SHELL "[$]0" --fallback-echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + echo="$CONFIG_SHELL [$]0 --fallback-echo" + else + # maybe with a smaller string... + prev=: + + for cmd in 'echo test' 'sed 2q "[$]0"' 'sed 10q "[$]0"' 'sed 20q "[$]0"' 'sed 50q "[$]0"'; do + if (test "X$echo_test_string" = "X`eval $cmd`") 2>/dev/null + then + break + fi + prev="$cmd" + done + + if test "$prev" != 'sed 50q "[$]0"'; then + echo_test_string=`eval $prev` + export echo_test_string + exec ${ORIGINAL_CONFIG_SHELL-${CONFIG_SHELL-/bin/sh}} "[$]0" ${1+"[$]@"} + else + # Oops. We lost completely, so just stick with echo. + echo=echo + fi + fi + fi + fi +fi +fi + +# Copy echo and quote the copy suitably for passing to libtool from +# the Makefile, instead of quoting the original, which is used later. +ECHO=$echo +if test "X$ECHO" = "X$CONFIG_SHELL [$]0 --fallback-echo"; then + ECHO="$CONFIG_SHELL \\\$\[$]0 --fallback-echo" +fi + +AC_SUBST(ECHO) +AC_DIVERT_POP +])# _LT_AC_PROG_ECHO_BACKSLASH + +# _LT_AC_TRY_DLOPEN_SELF (ACTION-IF-TRUE, ACTION-IF-TRUE-W-USCORE, +# ACTION-IF-FALSE, ACTION-IF-CROSS-COMPILING) +# ------------------------------------------------------------------ +AC_DEFUN([_LT_AC_TRY_DLOPEN_SELF], +[if test "$cross_compiling" = yes; then : + [$4] +else + AC_REQUIRE([_LT_AC_CHECK_DLFCN])dnl + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext < +#endif + +#include + +#ifdef RTLD_GLOBAL +# define LT_DLGLOBAL RTLD_GLOBAL +#else +# ifdef DL_GLOBAL +# define LT_DLGLOBAL DL_GLOBAL +# else +# define LT_DLGLOBAL 0 +# endif +#endif + +/* We may have to define LT_DLLAZY_OR_NOW in the command line if we + find out it does not work in some platform. */ +#ifndef LT_DLLAZY_OR_NOW +# ifdef RTLD_LAZY +# define LT_DLLAZY_OR_NOW RTLD_LAZY +# else +# ifdef DL_LAZY +# define LT_DLLAZY_OR_NOW DL_LAZY +# else +# ifdef RTLD_NOW +# define LT_DLLAZY_OR_NOW RTLD_NOW +# else +# ifdef DL_NOW +# define LT_DLLAZY_OR_NOW DL_NOW +# else +# define LT_DLLAZY_OR_NOW 0 +# endif +# endif +# endif +# endif +#endif + +#ifdef __cplusplus +extern "C" void exit (int); +#endif + +void fnord() { int i=42;} +int main () +{ + void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); + int status = $lt_dlunknown; + + if (self) + { + if (dlsym (self,"fnord")) status = $lt_dlno_uscore; + else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; + /* dlclose (self); */ + } + + exit (status); +}] +EOF + if AC_TRY_EVAL(ac_link) && test -s conftest${ac_exeext} 2>/dev/null; then + (./conftest; exit; ) 2>/dev/null + lt_status=$? + case x$lt_status in + x$lt_dlno_uscore) $1 ;; + x$lt_dlneed_uscore) $2 ;; + x$lt_unknown|x*) $3 ;; + esac + else : + # compilation failed + $3 + fi +fi +rm -fr conftest* +])# _LT_AC_TRY_DLOPEN_SELF + +# AC_LIBTOOL_DLOPEN_SELF +# ------------------- +AC_DEFUN([AC_LIBTOOL_DLOPEN_SELF], +[if test "x$enable_dlopen" != xyes; then + enable_dlopen=unknown + enable_dlopen_self=unknown + enable_dlopen_self_static=unknown +else + lt_cv_dlopen=no + lt_cv_dlopen_libs= + + case $host_os in + beos*) + lt_cv_dlopen="load_add_on" + lt_cv_dlopen_libs= + lt_cv_dlopen_self=yes + ;; + + cygwin* | mingw* | pw32*) + lt_cv_dlopen="LoadLibrary" + lt_cv_dlopen_libs= + ;; + + *) + AC_CHECK_FUNC([shl_load], + [lt_cv_dlopen="shl_load"], + [AC_CHECK_LIB([dld], [shl_load], + [lt_cv_dlopen="shl_load" lt_cv_dlopen_libs="-dld"], + [AC_CHECK_FUNC([dlopen], + [lt_cv_dlopen="dlopen"], + [AC_CHECK_LIB([dl], [dlopen], + [lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-ldl"], + [AC_CHECK_LIB([svld], [dlopen], + [lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-lsvld"], + [AC_CHECK_LIB([dld], [dld_link], + [lt_cv_dlopen="dld_link" lt_cv_dlopen_libs="-dld"]) + ]) + ]) + ]) + ]) + ]) + ;; + esac + + if test "x$lt_cv_dlopen" != xno; then + enable_dlopen=yes + else + enable_dlopen=no + fi + + case $lt_cv_dlopen in + dlopen) + save_CPPFLAGS="$CPPFLAGS" + AC_REQUIRE([_LT_AC_CHECK_DLFCN])dnl + test "x$ac_cv_header_dlfcn_h" = xyes && CPPFLAGS="$CPPFLAGS -DHAVE_DLFCN_H" + + save_LDFLAGS="$LDFLAGS" + eval LDFLAGS=\"\$LDFLAGS $export_dynamic_flag_spec\" + + save_LIBS="$LIBS" + LIBS="$lt_cv_dlopen_libs $LIBS" + + AC_CACHE_CHECK([whether a program can dlopen itself], + lt_cv_dlopen_self, [dnl + _LT_AC_TRY_DLOPEN_SELF( + lt_cv_dlopen_self=yes, lt_cv_dlopen_self=yes, + lt_cv_dlopen_self=no, lt_cv_dlopen_self=cross) + ]) + + if test "x$lt_cv_dlopen_self" = xyes; then + LDFLAGS="$LDFLAGS $link_static_flag" + AC_CACHE_CHECK([whether a statically linked program can dlopen itself], + lt_cv_dlopen_self_static, [dnl + _LT_AC_TRY_DLOPEN_SELF( + lt_cv_dlopen_self_static=yes, lt_cv_dlopen_self_static=yes, + lt_cv_dlopen_self_static=no, lt_cv_dlopen_self_static=cross) + ]) + fi + + CPPFLAGS="$save_CPPFLAGS" + LDFLAGS="$save_LDFLAGS" + LIBS="$save_LIBS" + ;; + esac + + case $lt_cv_dlopen_self in + yes|no) enable_dlopen_self=$lt_cv_dlopen_self ;; + *) enable_dlopen_self=unknown ;; + esac + + case $lt_cv_dlopen_self_static in + yes|no) enable_dlopen_self_static=$lt_cv_dlopen_self_static ;; + *) enable_dlopen_self_static=unknown ;; + esac +fi +])# AC_LIBTOOL_DLOPEN_SELF + +AC_DEFUN([_LT_AC_LTCONFIG_HACK], +[AC_REQUIRE([AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE])dnl +# Sed substitution that helps us do robust quoting. It backslashifies +# metacharacters that are still active within double-quoted strings. +Xsed='sed -e s/^X//' +sed_quote_subst='s/\([[\\"\\`$\\\\]]\)/\\\1/g' + +# Same as above, but do not quote variable references. +double_quote_subst='s/\([[\\"\\`\\\\]]\)/\\\1/g' + +# Sed substitution to delay expansion of an escaped shell variable in a +# double_quote_subst'ed string. +delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g' + +# Constants: +rm="rm -f" + +# Global variables: +default_ofile=libtool +can_build_shared=yes + +# All known linkers require a `.a' archive for static linking (except M$VC, +# which needs '.lib'). +libext=a +ltmain="$ac_aux_dir/ltmain.sh" +ofile="$default_ofile" +with_gnu_ld="$lt_cv_prog_gnu_ld" +need_locks="$enable_libtool_lock" + +old_CC="$CC" +old_CFLAGS="$CFLAGS" + +# Set sane defaults for various variables +test -z "$AR" && AR=ar +test -z "$AR_FLAGS" && AR_FLAGS=cru +test -z "$AS" && AS=as +test -z "$CC" && CC=cc +test -z "$DLLTOOL" && DLLTOOL=dlltool +test -z "$LD" && LD=ld +test -z "$LN_S" && LN_S="ln -s" +test -z "$MAGIC_CMD" && MAGIC_CMD=file +test -z "$NM" && NM=nm +test -z "$OBJDUMP" && OBJDUMP=objdump +test -z "$RANLIB" && RANLIB=: +test -z "$STRIP" && STRIP=: +test -z "$ac_objext" && ac_objext=o + +if test x"$host" != x"$build"; then + ac_tool_prefix=${host_alias}- +else + ac_tool_prefix= +fi + +# Transform linux* to *-*-linux-gnu*, to support old configure scripts. +case $host_os in +linux-gnu*) ;; +linux*) host=`echo $host | sed 's/^\(.*-.*-linux\)\(.*\)$/\1-gnu\2/'` +esac + +case $host_os in +aix3*) + # AIX sometimes has problems with the GCC collect2 program. For some + # reason, if we set the COLLECT_NAMES environment variable, the problems + # vanish in a puff of smoke. + if test "X${COLLECT_NAMES+set}" != Xset; then + COLLECT_NAMES= + export COLLECT_NAMES + fi + ;; +esac + +# Determine commands to create old-style static archives. +old_archive_cmds='$AR $AR_FLAGS $oldlib$oldobjs$old_deplibs' +old_postinstall_cmds='chmod 644 $oldlib' +old_postuninstall_cmds= + +if test -n "$RANLIB"; then + case $host_os in + openbsd*) + old_postinstall_cmds="\$RANLIB -t \$oldlib~$old_postinstall_cmds" + ;; + *) + old_postinstall_cmds="\$RANLIB \$oldlib~$old_postinstall_cmds" + ;; + esac + old_archive_cmds="$old_archive_cmds~\$RANLIB \$oldlib" +fi + +# Allow CC to be a program name with arguments. +set dummy $CC +compiler="[$]2" + +## FIXME: this should be a separate macro +## +AC_MSG_CHECKING([for objdir]) +rm -f .libs 2>/dev/null +mkdir .libs 2>/dev/null +if test -d .libs; then + objdir=.libs +else + # MS-DOS does not allow filenames that begin with a dot. + objdir=_libs +fi +rmdir .libs 2>/dev/null +AC_MSG_RESULT($objdir) +## +## END FIXME + + +## FIXME: this should be a separate macro +## +AC_ARG_WITH(pic, +[ --with-pic try to use only PIC/non-PIC objects [default=use both]], +pic_mode="$withval", pic_mode=default) +test -z "$pic_mode" && pic_mode=default + +# We assume here that the value for lt_cv_prog_cc_pic will not be cached +# in isolation, and that seeing it set (from the cache) indicates that +# the associated values are set (in the cache) correctly too. +AC_MSG_CHECKING([for $compiler option to produce PIC]) +AC_CACHE_VAL(lt_cv_prog_cc_pic, +[ lt_cv_prog_cc_pic= + lt_cv_prog_cc_shlib= + lt_cv_prog_cc_wl= + lt_cv_prog_cc_static= + lt_cv_prog_cc_no_builtin= + lt_cv_prog_cc_can_build_shared=$can_build_shared + + if test "$GCC" = yes; then + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static='-static' + + case $host_os in + aix*) + # Below there is a dirty hack to force normal static linking with -ldl + # The problem is because libdl dynamically linked with both libc and + # libC (AIX C++ library), which obviously doesn't included in libraries + # list by gcc. This cause undefined symbols with -static flags. + # This hack allows C programs to be linked with "-static -ldl", but + # not sure about C++ programs. + lt_cv_prog_cc_static="$lt_cv_prog_cc_static ${lt_cv_prog_cc_wl}-lC" + ;; + amigaos*) + # FIXME: we need at least 68020 code to build shared libraries, but + # adding the `-m68020' flag to GCC prevents building anything better, + # like `-m68040'. + lt_cv_prog_cc_pic='-m68020 -resident32 -malways-restore-a4' + ;; + beos* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*) + # PIC is the default for these OSes. + ;; + darwin* | rhapsody*) + # PIC is the default on this platform + # Common symbols not allowed in MH_DYLIB files + lt_cv_prog_cc_pic='-fno-common' + ;; + cygwin* | mingw* | pw32* | os2*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + lt_cv_prog_cc_pic='-DDLL_EXPORT' + ;; + sysv4*MP*) + if test -d /usr/nec; then + lt_cv_prog_cc_pic=-Kconform_pic + fi + ;; + *) + lt_cv_prog_cc_pic='-fPIC' + ;; + esac + else + # PORTME Check for PIC flags for the system compiler. + case $host_os in + aix3* | aix4* | aix5*) + lt_cv_prog_cc_wl='-Wl,' + # All AIX code is PIC. + if test "$host_cpu" = ia64; then + # AIX 5 now supports IA64 processor + lt_cv_prog_cc_static='-Bstatic' + else + lt_cv_prog_cc_static='-bnso -bI:/lib/syscalls.exp' + fi + ;; + + hpux9* | hpux10* | hpux11*) + # Is there a better lt_cv_prog_cc_static that works with the bundled CC? + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static="${lt_cv_prog_cc_wl}-a ${lt_cv_prog_cc_wl}archive" + lt_cv_prog_cc_pic='+Z' + ;; + + irix5* | irix6* | nonstopux*) + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static='-non_shared' + # PIC (with -KPIC) is the default. + ;; + + cygwin* | mingw* | pw32* | os2*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + lt_cv_prog_cc_pic='-DDLL_EXPORT' + ;; + + newsos6) + lt_cv_prog_cc_pic='-KPIC' + lt_cv_prog_cc_static='-Bstatic' + ;; + + osf3* | osf4* | osf5*) + # All OSF/1 code is PIC. + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static='-non_shared' + ;; + + sco3.2v5*) + lt_cv_prog_cc_pic='-Kpic' + lt_cv_prog_cc_static='-dn' + lt_cv_prog_cc_shlib='-belf' + ;; + + solaris*) + lt_cv_prog_cc_pic='-KPIC' + lt_cv_prog_cc_static='-Bstatic' + lt_cv_prog_cc_wl='-Wl,' + ;; + + sunos4*) + lt_cv_prog_cc_pic='-PIC' + lt_cv_prog_cc_static='-Bstatic' + lt_cv_prog_cc_wl='-Qoption ld ' + ;; + + sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + lt_cv_prog_cc_pic='-KPIC' + lt_cv_prog_cc_static='-Bstatic' + if test "x$host_vendor" = xsni; then + lt_cv_prog_cc_wl='-LD' + else + lt_cv_prog_cc_wl='-Wl,' + fi + ;; + + uts4*) + lt_cv_prog_cc_pic='-pic' + lt_cv_prog_cc_static='-Bstatic' + ;; + + sysv4*MP*) + if test -d /usr/nec ;then + lt_cv_prog_cc_pic='-Kconform_pic' + lt_cv_prog_cc_static='-Bstatic' + fi + ;; + + *) + lt_cv_prog_cc_can_build_shared=no + ;; + esac + fi +]) +if test -z "$lt_cv_prog_cc_pic"; then + AC_MSG_RESULT([none]) +else + AC_MSG_RESULT([$lt_cv_prog_cc_pic]) + + # Check to make sure the pic_flag actually works. + AC_MSG_CHECKING([if $compiler PIC flag $lt_cv_prog_cc_pic works]) + AC_CACHE_VAL(lt_cv_prog_cc_pic_works, [dnl + save_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS $lt_cv_prog_cc_pic -DPIC" + AC_TRY_COMPILE([], [], [dnl + case $host_os in + hpux9* | hpux10* | hpux11*) + # On HP-UX, both CC and GCC only warn that PIC is supported... then + # they create non-PIC objects. So, if there were any warnings, we + # assume that PIC is not supported. + if test -s conftest.err; then + lt_cv_prog_cc_pic_works=no + else + lt_cv_prog_cc_pic_works=yes + fi + ;; + *) + lt_cv_prog_cc_pic_works=yes + ;; + esac + ], [dnl + lt_cv_prog_cc_pic_works=no + ]) + CFLAGS="$save_CFLAGS" + ]) + + if test "X$lt_cv_prog_cc_pic_works" = Xno; then + lt_cv_prog_cc_pic= + lt_cv_prog_cc_can_build_shared=no + else + lt_cv_prog_cc_pic=" $lt_cv_prog_cc_pic" + fi + + AC_MSG_RESULT([$lt_cv_prog_cc_pic_works]) +fi +## +## END FIXME + +# Check for any special shared library compilation flags. +if test -n "$lt_cv_prog_cc_shlib"; then + AC_MSG_WARN([\`$CC' requires \`$lt_cv_prog_cc_shlib' to build shared libraries]) + if echo "$old_CC $old_CFLAGS " | egrep -e "[[ ]]$lt_cv_prog_cc_shlib[[ ]]" >/dev/null; then : + else + AC_MSG_WARN([add \`$lt_cv_prog_cc_shlib' to the CC or CFLAGS env variable and reconfigure]) + lt_cv_prog_cc_can_build_shared=no + fi +fi + +## FIXME: this should be a separate macro +## +AC_MSG_CHECKING([if $compiler static flag $lt_cv_prog_cc_static works]) +AC_CACHE_VAL([lt_cv_prog_cc_static_works], [dnl + lt_cv_prog_cc_static_works=no + save_LDFLAGS="$LDFLAGS" + LDFLAGS="$LDFLAGS $lt_cv_prog_cc_static" + AC_TRY_LINK([], [], [lt_cv_prog_cc_static_works=yes]) + LDFLAGS="$save_LDFLAGS" +]) + +# Belt *and* braces to stop my trousers falling down: +test "X$lt_cv_prog_cc_static_works" = Xno && lt_cv_prog_cc_static= +AC_MSG_RESULT([$lt_cv_prog_cc_static_works]) + +pic_flag="$lt_cv_prog_cc_pic" +special_shlib_compile_flags="$lt_cv_prog_cc_shlib" +wl="$lt_cv_prog_cc_wl" +link_static_flag="$lt_cv_prog_cc_static" +no_builtin_flag="$lt_cv_prog_cc_no_builtin" +can_build_shared="$lt_cv_prog_cc_can_build_shared" +## +## END FIXME + + +## FIXME: this should be a separate macro +## +# Check to see if options -o and -c are simultaneously supported by compiler +AC_MSG_CHECKING([if $compiler supports -c -o file.$ac_objext]) +AC_CACHE_VAL([lt_cv_compiler_c_o], [ +$rm -r conftest 2>/dev/null +mkdir conftest +cd conftest +echo "int some_variable = 0;" > conftest.$ac_ext +mkdir out +# According to Tom Tromey, Ian Lance Taylor reported there are C compilers +# that will create temporary files in the current directory regardless of +# the output directory. Thus, making CWD read-only will cause this test +# to fail, enabling locking or at least warning the user not to do parallel +# builds. +chmod -w . +save_CFLAGS="$CFLAGS" +CFLAGS="$CFLAGS -o out/conftest2.$ac_objext" +compiler_c_o=no +if { (eval echo configure:__oline__: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>out/conftest.err; } && test -s out/conftest2.$ac_objext; then + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s out/conftest.err; then + lt_cv_compiler_c_o=no + else + lt_cv_compiler_c_o=yes + fi +else + # Append any errors to the config.log. + cat out/conftest.err 1>&AC_FD_CC + lt_cv_compiler_c_o=no +fi +CFLAGS="$save_CFLAGS" +chmod u+w . +$rm conftest* out/* +rmdir out +cd .. +rmdir conftest +$rm -r conftest 2>/dev/null +]) +compiler_c_o=$lt_cv_compiler_c_o +AC_MSG_RESULT([$compiler_c_o]) + +if test x"$compiler_c_o" = x"yes"; then + # Check to see if we can write to a .lo + AC_MSG_CHECKING([if $compiler supports -c -o file.lo]) + AC_CACHE_VAL([lt_cv_compiler_o_lo], [ + lt_cv_compiler_o_lo=no + save_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -c -o conftest.lo" + save_objext="$ac_objext" + ac_objext=lo + AC_TRY_COMPILE([], [int some_variable = 0;], [dnl + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s conftest.err; then + lt_cv_compiler_o_lo=no + else + lt_cv_compiler_o_lo=yes + fi + ]) + ac_objext="$save_objext" + CFLAGS="$save_CFLAGS" + ]) + compiler_o_lo=$lt_cv_compiler_o_lo + AC_MSG_RESULT([$compiler_o_lo]) +else + compiler_o_lo=no +fi +## +## END FIXME + +## FIXME: this should be a separate macro +## +# Check to see if we can do hard links to lock some files if needed +hard_links="nottested" +if test "$compiler_c_o" = no && test "$need_locks" != no; then + # do not overwrite the value of need_locks provided by the user + AC_MSG_CHECKING([if we can lock with hard links]) + hard_links=yes + $rm conftest* + ln conftest.a conftest.b 2>/dev/null && hard_links=no + touch conftest.a + ln conftest.a conftest.b 2>&5 || hard_links=no + ln conftest.a conftest.b 2>/dev/null && hard_links=no + AC_MSG_RESULT([$hard_links]) + if test "$hard_links" = no; then + AC_MSG_WARN([\`$CC' does not support \`-c -o', so \`make -j' may be unsafe]) + need_locks=warn + fi +else + need_locks=no +fi +## +## END FIXME + +## FIXME: this should be a separate macro +## +if test "$GCC" = yes; then + # Check to see if options -fno-rtti -fno-exceptions are supported by compiler + AC_MSG_CHECKING([if $compiler supports -fno-rtti -fno-exceptions]) + echo "int some_variable = 0;" > conftest.$ac_ext + save_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -fno-rtti -fno-exceptions -c conftest.$ac_ext" + compiler_rtti_exceptions=no + AC_TRY_COMPILE([], [int some_variable = 0;], [dnl + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s conftest.err; then + compiler_rtti_exceptions=no + else + compiler_rtti_exceptions=yes + fi + ]) + CFLAGS="$save_CFLAGS" + AC_MSG_RESULT([$compiler_rtti_exceptions]) + + if test "$compiler_rtti_exceptions" = "yes"; then + no_builtin_flag=' -fno-builtin -fno-rtti -fno-exceptions' + else + no_builtin_flag=' -fno-builtin' + fi +fi +## +## END FIXME + +## FIXME: this should be a separate macro +## +# See if the linker supports building shared libraries. +AC_MSG_CHECKING([whether the linker ($LD) supports shared libraries]) + +allow_undefined_flag= +no_undefined_flag= +need_lib_prefix=unknown +need_version=unknown +# when you set need_version to no, make sure it does not cause -set_version +# flags to be left without arguments +archive_cmds= +archive_expsym_cmds= +old_archive_from_new_cmds= +old_archive_from_expsyms_cmds= +export_dynamic_flag_spec= +whole_archive_flag_spec= +thread_safe_flag_spec= +hardcode_into_libs=no +hardcode_libdir_flag_spec= +hardcode_libdir_separator= +hardcode_direct=no +hardcode_minus_L=no +hardcode_shlibpath_var=unsupported +runpath_var= +link_all_deplibs=unknown +always_export_symbols=no +export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | sed '\''s/.* //'\'' | sort | uniq > $export_symbols' +# include_expsyms should be a list of space-separated symbols to be *always* +# included in the symbol list +include_expsyms= +# exclude_expsyms can be an egrep regular expression of symbols to exclude +# it will be wrapped by ` (' and `)$', so one must not match beginning or +# end of line. Example: `a|bc|.*d.*' will exclude the symbols `a' and `bc', +# as well as any symbol that contains `d'. +exclude_expsyms="_GLOBAL_OFFSET_TABLE_" +# Although _GLOBAL_OFFSET_TABLE_ is a valid symbol C name, most a.out +# platforms (ab)use it in PIC code, but their linkers get confused if +# the symbol is explicitly referenced. Since portable code cannot +# rely on this symbol name, it's probably fine to never include it in +# preloaded symbol tables. +extract_expsyms_cmds= + +case $host_os in +cygwin* | mingw* | pw32*) + # FIXME: the MSVC++ port hasn't been tested in a loooong time + # When not using gcc, we currently assume that we are using + # Microsoft Visual C++. + if test "$GCC" != yes; then + with_gnu_ld=no + fi + ;; +openbsd*) + with_gnu_ld=no + ;; +esac + +ld_shlibs=yes +if test "$with_gnu_ld" = yes; then + # If archive_cmds runs LD, not CC, wlarc should be empty + wlarc='${wl}' + + # See if GNU ld supports shared libraries. + case $host_os in + aix3* | aix4* | aix5*) + # On AIX, the GNU linker is very broken + # Note:Check GNU linker on AIX 5-IA64 when/if it becomes available. + ld_shlibs=no + cat <&2 + +*** Warning: the GNU linker, at least up to release 2.9.1, is reported +*** to be unable to reliably create shared libraries on AIX. +*** Therefore, libtool is disabling shared libraries support. If you +*** really care for shared libraries, you may want to modify your PATH +*** so that a non-GNU linker is found, and then restart. + +EOF + ;; + + amigaos*) + archive_cmds='$rm $output_objdir/a2ixlibrary.data~$echo "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$echo "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$echo "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$echo "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + + # Samuel A. Falvo II reports + # that the semantics of dynamic libraries on AmigaOS, at least up + # to version 4, is to share data among multiple programs linked + # with the same dynamic library. Since this doesn't match the + # behavior of shared libraries on other platforms, we can use + # them. + ld_shlibs=no + ;; + + beos*) + if $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + allow_undefined_flag=unsupported + # Joseph Beckenbach says some releases of gcc + # support --undefined. This deserves some investigation. FIXME + archive_cmds='$CC -nostart $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + else + ld_shlibs=no + fi + ;; + + cygwin* | mingw* | pw32*) + # hardcode_libdir_flag_spec is actually meaningless, as there is + # no search path for DLLs. + hardcode_libdir_flag_spec='-L$libdir' + allow_undefined_flag=unsupported + always_export_symbols=yes + + extract_expsyms_cmds='test -f $output_objdir/impgen.c || \ + sed -e "/^# \/\* impgen\.c starts here \*\//,/^# \/\* impgen.c ends here \*\// { s/^# //;s/^# *$//; p; }" -e d < $''0 > $output_objdir/impgen.c~ + test -f $output_objdir/impgen.exe || (cd $output_objdir && \ + if test "x$HOST_CC" != "x" ; then $HOST_CC -o impgen impgen.c ; \ + else $CC -o impgen impgen.c ; fi)~ + $output_objdir/impgen $dir/$soroot > $output_objdir/$soname-def' + + old_archive_from_expsyms_cmds='$DLLTOOL --as=$AS --dllname $soname --def $output_objdir/$soname-def --output-lib $output_objdir/$newlib' + + # cygwin and mingw dlls have different entry points and sets of symbols + # to exclude. + # FIXME: what about values for MSVC? + dll_entry=__cygwin_dll_entry@12 + dll_exclude_symbols=DllMain@12,_cygwin_dll_entry@12,_cygwin_noncygwin_dll_entry@12~ + case $host_os in + mingw*) + # mingw values + dll_entry=_DllMainCRTStartup@12 + dll_exclude_symbols=DllMain@12,DllMainCRTStartup@12,DllEntryPoint@12~ + ;; + esac + + # mingw and cygwin differ, and it's simplest to just exclude the union + # of the two symbol sets. + dll_exclude_symbols=DllMain@12,_cygwin_dll_entry@12,_cygwin_noncygwin_dll_entry@12,DllMainCRTStartup@12,DllEntryPoint@12 + + # recent cygwin and mingw systems supply a stub DllMain which the user + # can override, but on older systems we have to supply one (in ltdll.c) + if test "x$lt_cv_need_dllmain" = "xyes"; then + ltdll_obj='$output_objdir/$soname-ltdll.'"$ac_objext " + ltdll_cmds='test -f $output_objdir/$soname-ltdll.c || sed -e "/^# \/\* ltdll\.c starts here \*\//,/^# \/\* ltdll.c ends here \*\// { s/^# //; p; }" -e d < $''0 > $output_objdir/$soname-ltdll.c~ + test -f $output_objdir/$soname-ltdll.$ac_objext || (cd $output_objdir && $CC -c $soname-ltdll.c)~' + else + ltdll_obj= + ltdll_cmds= + fi + + # Extract the symbol export list from an `--export-all' def file, + # then regenerate the def file from the symbol export list, so that + # the compiled dll only exports the symbol export list. + # Be careful not to strip the DATA tag left be newer dlltools. + export_symbols_cmds="$ltdll_cmds"' + $DLLTOOL --export-all --exclude-symbols '$dll_exclude_symbols' --output-def $output_objdir/$soname-def '$ltdll_obj'$libobjs $convenience~ + sed -e "1,/EXPORTS/d" -e "s/ @ [[0-9]]*//" -e "s/ *;.*$//" < $output_objdir/$soname-def > $export_symbols' + + # If the export-symbols file already is a .def file (1st line + # is EXPORTS), use it as is. + # If DATA tags from a recent dlltool are present, honour them! + archive_expsym_cmds='if test "x`head -1 $export_symbols`" = xEXPORTS; then + cp $export_symbols $output_objdir/$soname-def; + else + echo EXPORTS > $output_objdir/$soname-def; + _lt_hint=1; + cat $export_symbols | while read symbol; do + set dummy \$symbol; + case \[$]# in + 2) echo " \[$]2 @ \$_lt_hint ; " >> $output_objdir/$soname-def;; + *) echo " \[$]2 @ \$_lt_hint \[$]3 ; " >> $output_objdir/$soname-def;; + esac; + _lt_hint=`expr 1 + \$_lt_hint`; + done; + fi~ + '"$ltdll_cmds"' + $CC -Wl,--base-file,$output_objdir/$soname-base '$lt_cv_cc_dll_switch' -Wl,-e,'$dll_entry' -o $output_objdir/$soname '$ltdll_obj'$libobjs $deplibs $compiler_flags~ + $DLLTOOL --as=$AS --dllname $soname --exclude-symbols '$dll_exclude_symbols' --def $output_objdir/$soname-def --base-file $output_objdir/$soname-base --output-exp $output_objdir/$soname-exp~ + $CC -Wl,--base-file,$output_objdir/$soname-base $output_objdir/$soname-exp '$lt_cv_cc_dll_switch' -Wl,-e,'$dll_entry' -o $output_objdir/$soname '$ltdll_obj'$libobjs $deplibs $compiler_flags~ + $DLLTOOL --as=$AS --dllname $soname --exclude-symbols '$dll_exclude_symbols' --def $output_objdir/$soname-def --base-file $output_objdir/$soname-base --output-exp $output_objdir/$soname-exp --output-lib $output_objdir/$libname.dll.a~ + $CC $output_objdir/$soname-exp '$lt_cv_cc_dll_switch' -Wl,-e,'$dll_entry' -o $output_objdir/$soname '$ltdll_obj'$libobjs $deplibs $compiler_flags' + ;; + + netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + archive_cmds='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib' + wlarc= + else + archive_cmds='$CC -shared -nodefaultlibs $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared -nodefaultlibs $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + fi + ;; + + solaris* | sysv5*) + if $LD -v 2>&1 | egrep 'BFD 2\.8' > /dev/null; then + ld_shlibs=no + cat <&2 + +*** Warning: The releases 2.8.* of the GNU linker cannot reliably +*** create shared libraries on Solaris systems. Therefore, libtool +*** is disabling shared libraries support. We urge you to upgrade GNU +*** binutils to release 2.9.1 or newer. Another option is to modify +*** your PATH or compiler configuration so that the native linker is +*** used, and then restart. + +EOF + elif $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + ld_shlibs=no + fi + ;; + + sunos4*) + archive_cmds='$LD -assert pure-text -Bshareable -o $lib $libobjs $deplibs $linker_flags' + wlarc= + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + *) + if $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + ld_shlibs=no + fi + ;; + esac + + if test "$ld_shlibs" = yes; then + runpath_var=LD_RUN_PATH + hardcode_libdir_flag_spec='${wl}--rpath ${wl}$libdir' + export_dynamic_flag_spec='${wl}--export-dynamic' + case $host_os in + cygwin* | mingw* | pw32*) + # dlltool doesn't understand --whole-archive et. al. + whole_archive_flag_spec= + ;; + *) + # ancient GNU ld didn't support --whole-archive et. al. + if $LD --help 2>&1 | egrep 'no-whole-archive' > /dev/null; then + whole_archive_flag_spec="$wlarc"'--whole-archive$convenience '"$wlarc"'--no-whole-archive' + else + whole_archive_flag_spec= + fi + ;; + esac + fi +else + # PORTME fill in a description of your system's linker (not GNU ld) + case $host_os in + aix3*) + allow_undefined_flag=unsupported + always_export_symbols=yes + archive_expsym_cmds='$LD -o $output_objdir/$soname $libobjs $deplibs $linker_flags -bE:$export_symbols -T512 -H512 -bM:SRE~$AR $AR_FLAGS $lib $output_objdir/$soname' + # Note: this linker hardcodes the directories in LIBPATH if there + # are no directories specified by -L. + hardcode_minus_L=yes + if test "$GCC" = yes && test -z "$link_static_flag"; then + # Neither direct hardcoding nor static linking is supported with a + # broken collect2. + hardcode_direct=unsupported + fi + ;; + + aix4* | aix5*) + if test "$host_cpu" = ia64; then + # On IA64, the linker does run time linking by default, so we don't + # have to do anything special. + aix_use_runtimelinking=no + exp_sym_flag='-Bexport' + no_entry_flag="" + else + aix_use_runtimelinking=no + + # Test if we are trying to use run time linking or normal + # AIX style linking. If -brtl is somewhere in LDFLAGS, we + # need to do runtime linking. + case $host_os in aix4.[[23]]|aix4.[[23]].*|aix5*) + for ld_flag in $LDFLAGS; do + if (test $ld_flag = "-brtl" || test $ld_flag = "-Wl,-brtl"); then + aix_use_runtimelinking=yes + break + fi + done + esac + + exp_sym_flag='-bexport' + no_entry_flag='-bnoentry' + fi + + # When large executables or shared objects are built, AIX ld can + # have problems creating the table of contents. If linking a library + # or program results in "error TOC overflow" add -mminimal-toc to + # CXXFLAGS/CFLAGS for g++/gcc. In the cases where that is not + # enough to fix the problem, add -Wl,-bbigtoc to LDFLAGS. + + hardcode_direct=yes + archive_cmds='' + hardcode_libdir_separator=':' + if test "$GCC" = yes; then + case $host_os in aix4.[[012]]|aix4.[[012]].*) + collect2name=`${CC} -print-prog-name=collect2` + if test -f "$collect2name" && \ + strings "$collect2name" | grep resolve_lib_name >/dev/null + then + # We have reworked collect2 + hardcode_direct=yes + else + # We have old collect2 + hardcode_direct=unsupported + # It fails to find uninstalled libraries when the uninstalled + # path is not listed in the libpath. Setting hardcode_minus_L + # to unsupported forces relinking + hardcode_minus_L=yes + hardcode_libdir_flag_spec='-L$libdir' + hardcode_libdir_separator= + fi + esac + + shared_flag='-shared' + else + # not using gcc + if test "$host_cpu" = ia64; then + shared_flag='${wl}-G' + else + if test "$aix_use_runtimelinking" = yes; then + shared_flag='${wl}-G' + else + shared_flag='${wl}-bM:SRE' + fi + fi + fi + + # It seems that -bexpall can do strange things, so it is better to + # generate a list of symbols to export. + always_export_symbols=yes + if test "$aix_use_runtimelinking" = yes; then + # Warning - without using the other runtime loading flags (-brtl), + # -berok will link without error, but may produce a broken library. + allow_undefined_flag='-berok' + hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:/usr/lib:/lib' + archive_expsym_cmds="\$CC"' -o $output_objdir/$soname $libobjs $deplibs $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then echo "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols $shared_flag" + else + if test "$host_cpu" = ia64; then + hardcode_libdir_flag_spec='${wl}-R $libdir:/usr/lib:/lib' + allow_undefined_flag="-z nodefs" + archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname ${wl}-h$soname $libobjs $deplibs $compiler_flags ${wl}${allow_undefined_flag} '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols" + else + hardcode_libdir_flag_spec='${wl}-bnolibpath ${wl}-blibpath:$libdir:/usr/lib:/lib' + # Warning - without using the other run time loading flags, + # -berok will link without error, but may produce a broken library. + allow_undefined_flag='${wl}-berok' + # This is a bit strange, but is similar to how AIX traditionally builds + # it's shared libraries. + archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs $compiler_flags ${allow_undefined_flag} '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols"' ~$AR -crlo $objdir/$libname$release.a $objdir/$soname' + fi + fi + ;; + + amigaos*) + archive_cmds='$rm $output_objdir/a2ixlibrary.data~$echo "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$echo "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$echo "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$echo "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + # see comment about different semantics on the GNU ld section + ld_shlibs=no + ;; + + cygwin* | mingw* | pw32*) + # When not using gcc, we currently assume that we are using + # Microsoft Visual C++. + # hardcode_libdir_flag_spec is actually meaningless, as there is + # no search path for DLLs. + hardcode_libdir_flag_spec=' ' + allow_undefined_flag=unsupported + # Tell ltmain to make .lib files, not .a files. + libext=lib + # FIXME: Setting linknames here is a bad hack. + archive_cmds='$CC -o $lib $libobjs $compiler_flags `echo "$deplibs" | sed -e '\''s/ -lc$//'\''` -link -dll~linknames=' + # The linker will automatically build a .lib file if we build a DLL. + old_archive_from_new_cmds='true' + # FIXME: Should let the user specify the lib program. + old_archive_cmds='lib /OUT:$oldlib$oldobjs$old_deplibs' + fix_srcfile_path='`cygpath -w "$srcfile"`' + ;; + + darwin* | rhapsody*) + case "$host_os" in + rhapsody* | darwin1.[[012]]) + allow_undefined_flag='-undefined suppress' + ;; + *) # Darwin 1.3 on + allow_undefined_flag='-flat_namespace -undefined suppress' + ;; + esac + # FIXME: Relying on posixy $() will cause problems for + # cross-compilation, but unfortunately the echo tests do not + # yet detect zsh echo's removal of \ escapes. Also zsh mangles + # `"' quotes if we put them in here... so don't! + archive_cmds='$nonopt $(test .$module = .yes && echo -bundle || echo -dynamiclib) $allow_undefined_flag -o $lib $libobjs $deplibs$linker_flags -install_name $rpath/$soname $verstring' + # We need to add '_' to the symbols in $export_symbols first + #archive_expsym_cmds="$archive_cmds"' && strip -s $export_symbols' + hardcode_direct=yes + hardcode_shlibpath_var=no + whole_archive_flag_spec='-all_load $convenience' + ;; + + freebsd1*) + ld_shlibs=no + ;; + + # FreeBSD 2.2.[012] allows us to include c++rt0.o to get C++ constructor + # support. Future versions do this automatically, but an explicit c++rt0.o + # does not break anything, and helps significantly (at the cost of a little + # extra space). + freebsd2.2*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags /usr/lib/c++rt0.o' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + # Unfortunately, older versions of FreeBSD 2 do not have this feature. + freebsd2*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_minus_L=yes + hardcode_shlibpath_var=no + ;; + + # FreeBSD 3 and greater uses gcc -shared to do shared libraries. + freebsd*) + archive_cmds='$CC -shared -o $lib $libobjs $deplibs $compiler_flags' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + hpux9* | hpux10* | hpux11*) + case $host_os in + hpux9*) archive_cmds='$rm $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib' ;; + *) archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags' ;; + esac + hardcode_libdir_flag_spec='${wl}+b ${wl}$libdir' + hardcode_libdir_separator=: + hardcode_direct=yes + hardcode_minus_L=yes # Not in the search PATH, but as the default + # location of the library. + export_dynamic_flag_spec='${wl}-E' + ;; + + irix5* | irix6* | nonstopux*) + if test "$GCC" = yes; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + else + archive_cmds='$LD -shared $libobjs $deplibs $linker_flags -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib' + fi + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + link_all_deplibs=yes + ;; + + netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' # a.out + else + archive_cmds='$LD -shared -o $lib $libobjs $deplibs $linker_flags' # ELF + fi + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + newsos6) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + hardcode_shlibpath_var=no + ;; + + openbsd*) + hardcode_direct=yes + hardcode_shlibpath_var=no + if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='${wl}-rpath,$libdir' + export_dynamic_flag_spec='${wl}-E' + else + case "$host_os" in + openbsd[[01]].* | openbsd2.[[0-7]] | openbsd2.[[0-7]].*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-R$libdir' + ;; + *) + archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='${wl}-rpath,$libdir' + ;; + esac + fi + ;; + + os2*) + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + allow_undefined_flag=unsupported + archive_cmds='$echo "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$echo "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~$echo DATA >> $output_objdir/$libname.def~$echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~$echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def' + old_archive_from_new_cmds='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def' + ;; + + osf3*) + if test "$GCC" = yes; then + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + else + allow_undefined_flag=' -expect_unresolved \*' + archive_cmds='$LD -shared${allow_undefined_flag} $libobjs $deplibs $linker_flags -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib' + fi + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + ;; + + osf4* | osf5*) # as osf3* with the addition of -msym flag + if test "$GCC" = yes; then + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + else + allow_undefined_flag=' -expect_unresolved \*' + archive_cmds='$LD -shared${allow_undefined_flag} $libobjs $deplibs $linker_flags -msym -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib' + archive_expsym_cmds='for i in `cat $export_symbols`; do printf "-exported_symbol " >> $lib.exp; echo "\$i" >> $lib.exp; done; echo "-hidden">> $lib.exp~ + $LD -shared${allow_undefined_flag} -input $lib.exp $linker_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${objdir}/so_locations -o $lib~$rm $lib.exp' + + #Both c and cxx compiler support -rpath directly + hardcode_libdir_flag_spec='-rpath $libdir' + fi + hardcode_libdir_separator=: + ;; + + sco3.2v5*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + runpath_var=LD_RUN_PATH + hardcode_runpath_var=yes + export_dynamic_flag_spec='${wl}-Bexport' + ;; + + solaris*) + # gcc --version < 3.0 without binutils cannot create self contained + # shared libraries reliably, requiring libgcc.a to resolve some of + # the object symbols generated in some cases. Libraries that use + # assert need libgcc.a to resolve __eprintf, for example. Linking + # a copy of libgcc.a into every shared library to guarantee resolving + # such symbols causes other problems: According to Tim Van Holder + # , C++ libraries end up with a separate + # (to the application) exception stack for one thing. + no_undefined_flag=' -z defs' + if test "$GCC" = yes; then + case `$CC --version 2>/dev/null` in + [[12]].*) + cat <&2 + +*** Warning: Releases of GCC earlier than version 3.0 cannot reliably +*** create self contained shared libraries on Solaris systems, without +*** introducing a dependency on libgcc.a. Therefore, libtool is disabling +*** -no-undefined support, which will at least allow you to build shared +*** libraries. However, you may find that when you link such libraries +*** into an application without using GCC, you have to manually add +*** \`gcc --print-libgcc-file-name\` to the link command. We urge you to +*** upgrade to a newer version of GCC. Another option is to rebuild your +*** current GCC to use the GNU linker from GNU binutils 2.9.1 or newer. + +EOF + no_undefined_flag= + ;; + esac + fi + # $CC -shared without GNU ld will not create a library from C++ + # object files and a static libstdc++, better avoid it by now + archive_cmds='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags' + archive_expsym_cmds='$echo "{ global:" > $lib.exp~cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~ + $LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$rm $lib.exp' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_shlibpath_var=no + case $host_os in + solaris2.[[0-5]] | solaris2.[[0-5]].*) ;; + *) # Supported since Solaris 2.6 (maybe 2.5.1?) + whole_archive_flag_spec='-z allextract$convenience -z defaultextract' ;; + esac + link_all_deplibs=yes + ;; + + sunos4*) + if test "x$host_vendor" = xsequent; then + # Use $CC to link under sequent, because it throws in some extra .o + # files that make .init and .fini sections work. + archive_cmds='$CC -G ${wl}-h $soname -o $lib $libobjs $deplibs $compiler_flags' + else + archive_cmds='$LD -assert pure-text -Bstatic -o $lib $libobjs $deplibs $linker_flags' + fi + hardcode_libdir_flag_spec='-L$libdir' + hardcode_direct=yes + hardcode_minus_L=yes + hardcode_shlibpath_var=no + ;; + + sysv4) + if test "x$host_vendor" = xsno; then + archive_cmds='$LD -G -Bsymbolic -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes # is this really true??? + else + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=no #Motorola manual says yes, but my tests say they lie + fi + runpath_var='LD_RUN_PATH' + hardcode_shlibpath_var=no + ;; + + sysv4.3*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + export_dynamic_flag_spec='-Bexport' + ;; + + sysv5*) + no_undefined_flag=' -z text' + # $CC -shared without GNU ld will not create a library from C++ + # object files and a static libstdc++, better avoid it by now + archive_cmds='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags' + archive_expsym_cmds='$echo "{ global:" > $lib.exp~cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~ + $LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$rm $lib.exp' + hardcode_libdir_flag_spec= + hardcode_shlibpath_var=no + runpath_var='LD_RUN_PATH' + ;; + + uts4*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_shlibpath_var=no + ;; + + dgux*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_shlibpath_var=no + ;; + + sysv4*MP*) + if test -d /usr/nec; then + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + runpath_var=LD_RUN_PATH + hardcode_runpath_var=yes + ld_shlibs=yes + fi + ;; + + sysv4.2uw2*) + archive_cmds='$LD -G -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_minus_L=no + hardcode_shlibpath_var=no + hardcode_runpath_var=yes + runpath_var=LD_RUN_PATH + ;; + + sysv5uw7* | unixware7*) + no_undefined_flag='${wl}-z ${wl}text' + if test "$GCC" = yes; then + archive_cmds='$CC -shared ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' + else + archive_cmds='$CC -G ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' + fi + runpath_var='LD_RUN_PATH' + hardcode_shlibpath_var=no + ;; + + *) + ld_shlibs=no + ;; + esac +fi +AC_MSG_RESULT([$ld_shlibs]) +test "$ld_shlibs" = no && can_build_shared=no +## +## END FIXME + +## FIXME: this should be a separate macro +## +# Check hardcoding attributes. +AC_MSG_CHECKING([how to hardcode library paths into programs]) +hardcode_action= +if test -n "$hardcode_libdir_flag_spec" || \ + test -n "$runpath_var"; then + + # We can hardcode non-existant directories. + if test "$hardcode_direct" != no && + # If the only mechanism to avoid hardcoding is shlibpath_var, we + # have to relink, otherwise we might link with an installed library + # when we should be linking with a yet-to-be-installed one + ## test "$hardcode_shlibpath_var" != no && + test "$hardcode_minus_L" != no; then + # Linking always hardcodes the temporary library directory. + hardcode_action=relink + else + # We can link without hardcoding, and we can hardcode nonexisting dirs. + hardcode_action=immediate + fi +else + # We cannot hardcode anything, or else we can only hardcode existing + # directories. + hardcode_action=unsupported +fi +AC_MSG_RESULT([$hardcode_action]) +## +## END FIXME + +## FIXME: this should be a separate macro +## +striplib= +old_striplib= +AC_MSG_CHECKING([whether stripping libraries is possible]) +if test -n "$STRIP" && $STRIP -V 2>&1 | grep "GNU strip" >/dev/null; then + test -z "$old_striplib" && old_striplib="$STRIP --strip-debug" + test -z "$striplib" && striplib="$STRIP --strip-unneeded" + AC_MSG_RESULT([yes]) +else + AC_MSG_RESULT([no]) +fi +## +## END FIXME + +reload_cmds='$LD$reload_flag -o $output$reload_objs' +test -z "$deplibs_check_method" && deplibs_check_method=unknown + +## FIXME: this should be a separate macro +## +# PORTME Fill in your ld.so characteristics +AC_MSG_CHECKING([dynamic linker characteristics]) +library_names_spec= +libname_spec='lib$name' +soname_spec= +postinstall_cmds= +postuninstall_cmds= +finish_cmds= +finish_eval= +shlibpath_var= +shlibpath_overrides_runpath=unknown +version_type=none +dynamic_linker="$host_os ld.so" +sys_lib_dlsearch_path_spec="/lib /usr/lib" +sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib" + +case $host_os in +aix3*) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix $libname.a' + shlibpath_var=LIBPATH + + # AIX has no versioning support, so we append a major version to the name. + soname_spec='${libname}${release}.so$major' + ;; + +aix4* | aix5*) + version_type=linux + if test "$host_cpu" = ia64; then + # AIX 5 supports IA64 + library_names_spec='${libname}${release}.so$major ${libname}${release}.so$versuffix $libname.so' + shlibpath_var=LD_LIBRARY_PATH + else + # With GCC up to 2.95.x, collect2 would create an import file + # for dependence libraries. The import file would start with + # the line `#! .'. This would cause the generated library to + # depend on `.', always an invalid library. This was fixed in + # development snapshots of GCC prior to 3.0. + case $host_os in + aix4 | aix4.[[01]] | aix4.[[01]].*) + if { echo '#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 97)' + echo ' yes ' + echo '#endif'; } | ${CC} -E - | grep yes > /dev/null; then + : + else + can_build_shared=no + fi + ;; + esac + # AIX (on Power*) has no versioning support, so currently we can + # not hardcode correct soname into executable. Probably we can + # add versioning support to collect2, so additional links can + # be useful in future. + if test "$aix_use_runtimelinking" = yes; then + # If using run time linking (on AIX 4.2 or later) use lib.so + # instead of lib.a to let people know that these are not + # typical AIX shared libraries. + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + else + # We preserve .a as extension for shared libraries through AIX4.2 + # and later when we are not doing run time linking. + library_names_spec='${libname}${release}.a $libname.a' + soname_spec='${libname}${release}.so$major' + fi + shlibpath_var=LIBPATH + fi + ;; + +amigaos*) + library_names_spec='$libname.ixlibrary $libname.a' + # Create ${libname}_ixlibrary.a entries in /sys/libs. + finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`$echo "X$lib" | $Xsed -e '\''s%^.*/\([[^/]]*\)\.ixlibrary$%\1%'\''`; test $rm /sys/libs/${libname}_ixlibrary.a; $show "(cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a)"; (cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a) || exit 1; done' + ;; + +beos*) + library_names_spec='${libname}.so' + dynamic_linker="$host_os ld.so" + shlibpath_var=LIBRARY_PATH + ;; + +bsdi4*) + version_type=linux + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + finish_cmds='PATH="\$PATH:/sbin" ldconfig $libdir' + shlibpath_var=LD_LIBRARY_PATH + sys_lib_search_path_spec="/shlib /usr/lib /usr/X11/lib /usr/contrib/lib /lib /usr/local/lib" + sys_lib_dlsearch_path_spec="/shlib /usr/lib /usr/local/lib" + export_dynamic_flag_spec=-rdynamic + # the default ld.so.conf also contains /usr/contrib/lib and + # /usr/X11R6/lib (/usr/X11 is a link to /usr/X11R6), but let us allow + # libtool to hard-code these into programs + ;; + +cygwin* | mingw* | pw32*) + version_type=windows + need_version=no + need_lib_prefix=no + case $GCC,$host_os in + yes,cygwin*) + library_names_spec='$libname.dll.a' + soname_spec='`echo ${libname} | sed -e 's/^lib/cyg/'``echo ${release} | sed -e 's/[[.]]/-/g'`${versuffix}.dll' + postinstall_cmds='dlpath=`bash 2>&1 -c '\''. $dir/${file}i;echo \$dlname'\''`~ + dldir=$destdir/`dirname \$dlpath`~ + test -d \$dldir || mkdir -p \$dldir~ + $install_prog .libs/$dlname \$dldir/$dlname' + postuninstall_cmds='dldll=`bash 2>&1 -c '\''. $file; echo \$dlname'\''`~ + dlpath=$dir/\$dldll~ + $rm \$dlpath' + ;; + yes,mingw*) + library_names_spec='${libname}`echo ${release} | sed -e 's/[[.]]/-/g'`${versuffix}.dll' + sys_lib_search_path_spec=`$CC -print-search-dirs | grep "^libraries:" | sed -e "s/^libraries://" -e "s/;/ /g"` + ;; + yes,pw32*) + library_names_spec='`echo ${libname} | sed -e 's/^lib/pw/'``echo ${release} | sed -e 's/[.]/-/g'`${versuffix}.dll' + ;; + *) + library_names_spec='${libname}`echo ${release} | sed -e 's/[[.]]/-/g'`${versuffix}.dll $libname.lib' + ;; + esac + dynamic_linker='Win32 ld.exe' + # FIXME: first we should search . and the directory the executable is in + shlibpath_var=PATH + ;; + +darwin* | rhapsody*) + dynamic_linker="$host_os dyld" + version_type=darwin + need_lib_prefix=no + need_version=no + # FIXME: Relying on posixy $() will cause problems for + # cross-compilation, but unfortunately the echo tests do not + # yet detect zsh echo's removal of \ escapes. + library_names_spec='${libname}${release}${versuffix}.$(test .$module = .yes && echo so || echo dylib) ${libname}${release}${major}.$(test .$module = .yes && echo so || echo dylib) ${libname}.$(test .$module = .yes && echo so || echo dylib)' + soname_spec='${libname}${release}${major}.$(test .$module = .yes && echo so || echo dylib)' + shlibpath_overrides_runpath=yes + shlibpath_var=DYLD_LIBRARY_PATH + ;; + +freebsd1*) + dynamic_linker=no + ;; + +freebsd*) + objformat=`test -x /usr/bin/objformat && /usr/bin/objformat || echo aout` + version_type=freebsd-$objformat + case $version_type in + freebsd-elf*) + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so $libname.so' + need_version=no + need_lib_prefix=no + ;; + freebsd-*) + library_names_spec='${libname}${release}.so$versuffix $libname.so$versuffix' + need_version=yes + ;; + esac + shlibpath_var=LD_LIBRARY_PATH + case $host_os in + freebsd2*) + shlibpath_overrides_runpath=yes + ;; + *) + shlibpath_overrides_runpath=no + hardcode_into_libs=yes + ;; + esac + ;; + +gnu*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so${major} ${libname}.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + hardcode_into_libs=yes + ;; + +hpux9* | hpux10* | hpux11*) + # Give a soname corresponding to the major version so that dld.sl refuses to + # link against other versions. + dynamic_linker="$host_os dld.sl" + version_type=sunos + need_lib_prefix=no + need_version=no + shlibpath_var=SHLIB_PATH + shlibpath_overrides_runpath=no # +s is required to enable SHLIB_PATH + library_names_spec='${libname}${release}.sl$versuffix ${libname}${release}.sl$major $libname.sl' + soname_spec='${libname}${release}.sl$major' + # HP-UX runs *really* slowly unless shared libraries are mode 555. + postinstall_cmds='chmod 555 $lib' + ;; + +irix5* | irix6* | nonstopux*) + case $host_os in + nonstopux*) version_type=nonstopux ;; + *) version_type=irix ;; + esac + need_lib_prefix=no + need_version=no + soname_spec='${libname}${release}.so$major' + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major ${libname}${release}.so $libname.so' + case $host_os in + irix5* | nonstopux*) + libsuff= shlibsuff= + ;; + *) + case $LD in # libtool.m4 will add one of these switches to LD + *-32|*"-32 ") libsuff= shlibsuff= libmagic=32-bit;; + *-n32|*"-n32 ") libsuff=32 shlibsuff=N32 libmagic=N32;; + *-64|*"-64 ") libsuff=64 shlibsuff=64 libmagic=64-bit;; + *) libsuff= shlibsuff= libmagic=never-match;; + esac + ;; + esac + shlibpath_var=LD_LIBRARY${shlibsuff}_PATH + shlibpath_overrides_runpath=no + sys_lib_search_path_spec="/usr/lib${libsuff} /lib${libsuff} /usr/local/lib${libsuff}" + sys_lib_dlsearch_path_spec="/usr/lib${libsuff} /lib${libsuff}" + ;; + +# No shared lib support for Linux oldld, aout, or coff. +linux-gnuoldld* | linux-gnuaout* | linux-gnucoff*) + dynamic_linker=no + ;; + +# This must be Linux ELF. +linux-gnu*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=no + # This implies no fast_install, which is unacceptable. + # Some rework will be needed to allow for fast_install + # before this can be enabled. + hardcode_into_libs=yes + + # We used to test for /lib/ld.so.1 and disable shared libraries on + # powerpc, because MkLinux only supported shared libraries with the + # GNU dynamic linker. Since this was broken with cross compilers, + # most powerpc-linux boxes support dynamic linking these days and + # people can always --disable-shared, the test was removed, and we + # assume the GNU/Linux dynamic linker is in use. + dynamic_linker='GNU/Linux ld.so' + ;; + +netbsd*) + version_type=sunos + need_lib_prefix=no + need_version=no + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + library_names_spec='${libname}${release}.so$versuffix ${libname}.so$versuffix' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' + dynamic_linker='NetBSD (a.out) ld.so' + else + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major ${libname}${release}.so ${libname}.so' + soname_spec='${libname}${release}.so$major' + dynamic_linker='NetBSD ld.elf_so' + fi + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + ;; + +newsos6) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + ;; + +openbsd*) + version_type=sunos + need_lib_prefix=no + need_version=no + if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + case "$host_os" in + openbsd2.[[89]] | openbsd2.[[89]].*) + shlibpath_overrides_runpath=no + ;; + *) + shlibpath_overrides_runpath=yes + ;; + esac + else + shlibpath_overrides_runpath=yes + fi + library_names_spec='${libname}${release}.so$versuffix ${libname}.so$versuffix' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' + shlibpath_var=LD_LIBRARY_PATH + ;; + +os2*) + libname_spec='$name' + need_lib_prefix=no + library_names_spec='$libname.dll $libname.a' + dynamic_linker='OS/2 ld.exe' + shlibpath_var=LIBPATH + ;; + +osf3* | osf4* | osf5*) + version_type=osf + need_version=no + soname_spec='${libname}${release}.so' + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so $libname.so' + shlibpath_var=LD_LIBRARY_PATH + sys_lib_search_path_spec="/usr/shlib /usr/ccs/lib /usr/lib/cmplrs/cc /usr/lib /usr/local/lib /var/shlib" + sys_lib_dlsearch_path_spec="$sys_lib_search_path_spec" + ;; + +sco3.2v5*) + version_type=osf + soname_spec='${libname}${release}.so$major' + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + shlibpath_var=LD_LIBRARY_PATH + ;; + +solaris*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + # ldd complains unless libraries are executable + postinstall_cmds='chmod +x $lib' + ;; + +sunos4*) + version_type=sunos + library_names_spec='${libname}${release}.so$versuffix ${libname}.so$versuffix' + finish_cmds='PATH="\$PATH:/usr/etc" ldconfig $libdir' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + if test "$with_gnu_ld" = yes; then + need_lib_prefix=no + fi + need_version=yes + ;; + +sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + case $host_vendor in + sni) + shlibpath_overrides_runpath=no + ;; + motorola) + need_lib_prefix=no + need_version=no + shlibpath_overrides_runpath=no + sys_lib_search_path_spec='/lib /usr/lib /usr/ccs/lib' + ;; + esac + ;; + +uts4*) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + ;; + +dgux*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + ;; + +sysv4*MP*) + if test -d /usr/nec ;then + version_type=linux + library_names_spec='$libname.so.$versuffix $libname.so.$major $libname.so' + soname_spec='$libname.so.$major' + shlibpath_var=LD_LIBRARY_PATH + fi + ;; + +*) + dynamic_linker=no + ;; +esac +AC_MSG_RESULT([$dynamic_linker]) +test "$dynamic_linker" = no && can_build_shared=no +## +## END FIXME + +## FIXME: this should be a separate macro +## +# Report the final consequences. +AC_MSG_CHECKING([if libtool supports shared libraries]) +AC_MSG_RESULT([$can_build_shared]) +## +## END FIXME + +## FIXME: this should be a separate macro +## +AC_MSG_CHECKING([whether to build shared libraries]) +test "$can_build_shared" = "no" && enable_shared=no + +# On AIX, shared libraries and static libraries use the same namespace, and +# are all built from PIC. +case "$host_os" in +aix3*) + test "$enable_shared" = yes && enable_static=no + if test -n "$RANLIB"; then + archive_cmds="$archive_cmds~\$RANLIB \$lib" + postinstall_cmds='$RANLIB $lib' + fi + ;; + +aix4*) + if test "$host_cpu" != ia64 && test "$aix_use_runtimelinking" = no ; then + test "$enable_shared" = yes && enable_static=no + fi + ;; +esac +AC_MSG_RESULT([$enable_shared]) +## +## END FIXME + +## FIXME: this should be a separate macro +## +AC_MSG_CHECKING([whether to build static libraries]) +# Make sure either enable_shared or enable_static is yes. +test "$enable_shared" = yes || enable_static=yes +AC_MSG_RESULT([$enable_static]) +## +## END FIXME + +if test "$hardcode_action" = relink; then + # Fast installation is not supported + enable_fast_install=no +elif test "$shlibpath_overrides_runpath" = yes || + test "$enable_shared" = no; then + # Fast installation is not necessary + enable_fast_install=needless +fi + +variables_saved_for_relink="PATH $shlibpath_var $runpath_var" +if test "$GCC" = yes; then + variables_saved_for_relink="$variables_saved_for_relink GCC_EXEC_PREFIX COMPILER_PATH LIBRARY_PATH" +fi + +AC_LIBTOOL_DLOPEN_SELF + +## FIXME: this should be a separate macro +## +if test "$enable_shared" = yes && test "$GCC" = yes; then + case $archive_cmds in + *'~'*) + # FIXME: we may have to deal with multi-command sequences. + ;; + '$CC '*) + # Test whether the compiler implicitly links with -lc since on some + # systems, -lgcc has to come before -lc. If gcc already passes -lc + # to ld, don't add -lc before -lgcc. + AC_MSG_CHECKING([whether -lc should be explicitly linked in]) + AC_CACHE_VAL([lt_cv_archive_cmds_need_lc], + [$rm conftest* + echo 'static int dummy;' > conftest.$ac_ext + + if AC_TRY_EVAL(ac_compile); then + soname=conftest + lib=conftest + libobjs=conftest.$ac_objext + deplibs= + wl=$lt_cv_prog_cc_wl + compiler_flags=-v + linker_flags=-v + verstring= + output_objdir=. + libname=conftest + save_allow_undefined_flag=$allow_undefined_flag + allow_undefined_flag= + if AC_TRY_EVAL(archive_cmds 2\>\&1 \| grep \" -lc \" \>/dev/null 2\>\&1) + then + lt_cv_archive_cmds_need_lc=no + else + lt_cv_archive_cmds_need_lc=yes + fi + allow_undefined_flag=$save_allow_undefined_flag + else + cat conftest.err 1>&5 + fi]) + AC_MSG_RESULT([$lt_cv_archive_cmds_need_lc]) + ;; + esac +fi +need_lc=${lt_cv_archive_cmds_need_lc-yes} +## +## END FIXME + +## FIXME: this should be a separate macro +## +# The second clause should only fire when bootstrapping the +# libtool distribution, otherwise you forgot to ship ltmain.sh +# with your package, and you will get complaints that there are +# no rules to generate ltmain.sh. +if test -f "$ltmain"; then + : +else + # If there is no Makefile yet, we rely on a make rule to execute + # `config.status --recheck' to rerun these tests and create the + # libtool script then. + test -f Makefile && make "$ltmain" +fi + +if test -f "$ltmain"; then + trap "$rm \"${ofile}T\"; exit 1" 1 2 15 + $rm -f "${ofile}T" + + echo creating $ofile + + # Now quote all the things that may contain metacharacters while being + # careful not to overquote the AC_SUBSTed values. We take copies of the + # variables and quote the copies for generation of the libtool script. + for var in echo old_CC old_CFLAGS \ + AR AR_FLAGS CC LD LN_S NM SHELL \ + reload_flag reload_cmds wl \ + pic_flag link_static_flag no_builtin_flag export_dynamic_flag_spec \ + thread_safe_flag_spec whole_archive_flag_spec libname_spec \ + library_names_spec soname_spec \ + RANLIB old_archive_cmds old_archive_from_new_cmds old_postinstall_cmds \ + old_postuninstall_cmds archive_cmds archive_expsym_cmds postinstall_cmds \ + postuninstall_cmds extract_expsyms_cmds old_archive_from_expsyms_cmds \ + old_striplib striplib file_magic_cmd export_symbols_cmds \ + deplibs_check_method allow_undefined_flag no_undefined_flag \ + finish_cmds finish_eval global_symbol_pipe global_symbol_to_cdecl \ + global_symbol_to_c_name_address \ + hardcode_libdir_flag_spec hardcode_libdir_separator \ + sys_lib_search_path_spec sys_lib_dlsearch_path_spec \ + compiler_c_o compiler_o_lo need_locks exclude_expsyms include_expsyms; do + + case $var in + reload_cmds | old_archive_cmds | old_archive_from_new_cmds | \ + old_postinstall_cmds | old_postuninstall_cmds | \ + export_symbols_cmds | archive_cmds | archive_expsym_cmds | \ + extract_expsyms_cmds | old_archive_from_expsyms_cmds | \ + postinstall_cmds | postuninstall_cmds | \ + finish_cmds | sys_lib_search_path_spec | sys_lib_dlsearch_path_spec) + # Double-quote double-evaled strings. + eval "lt_$var=\\\"\`\$echo \"X\$$var\" | \$Xsed -e \"\$double_quote_subst\" -e \"\$sed_quote_subst\" -e \"\$delay_variable_subst\"\`\\\"" + ;; + *) + eval "lt_$var=\\\"\`\$echo \"X\$$var\" | \$Xsed -e \"\$sed_quote_subst\"\`\\\"" + ;; + esac + done + + cat <<__EOF__ > "${ofile}T" +#! $SHELL + +# `$echo "$ofile" | sed 's%^.*/%%'` - Provide generalized library-building support services. +# Generated automatically by $PROGRAM (GNU $PACKAGE $VERSION$TIMESTAMP) +# NOTE: Changes made to this file will be lost: look at ltmain.sh. +# +# Copyright (C) 1996-2000 Free Software Foundation, Inc. +# Originally by Gordon Matzigkeit , 1996 +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + +# Sed that helps us avoid accidentally triggering echo(1) options like -n. +Xsed="sed -e s/^X//" + +# The HP-UX ksh and POSIX shell print the target directory to stdout +# if CDPATH is set. +if test "X\${CDPATH+set}" = Xset; then CDPATH=:; export CDPATH; fi + +# ### BEGIN LIBTOOL CONFIG + +# Libtool was configured on host `(hostname || uname -n) 2>/dev/null | sed 1q`: + +# Shell to use when invoking shell scripts. +SHELL=$lt_SHELL + +# Whether or not to build shared libraries. +build_libtool_libs=$enable_shared + +# Whether or not to build static libraries. +build_old_libs=$enable_static + +# Whether or not to add -lc for building shared libraries. +build_libtool_need_lc=$need_lc + +# Whether or not to optimize for fast installation. +fast_install=$enable_fast_install + +# The host system. +host_alias=$host_alias +host=$host + +# An echo program that does not interpret backslashes. +echo=$lt_echo + +# The archiver. +AR=$lt_AR +AR_FLAGS=$lt_AR_FLAGS + +# The default C compiler. +CC=$lt_CC + +# Is the compiler the GNU C compiler? +with_gcc=$GCC + +# The linker used to build libraries. +LD=$lt_LD + +# Whether we need hard or soft links. +LN_S=$lt_LN_S + +# A BSD-compatible nm program. +NM=$lt_NM + +# A symbol stripping program +STRIP=$STRIP + +# Used to examine libraries when file_magic_cmd begins "file" +MAGIC_CMD=$MAGIC_CMD + +# Used on cygwin: DLL creation program. +DLLTOOL="$DLLTOOL" + +# Used on cygwin: object dumper. +OBJDUMP="$OBJDUMP" + +# Used on cygwin: assembler. +AS="$AS" + +# The name of the directory that contains temporary libtool files. +objdir=$objdir + +# How to create reloadable object files. +reload_flag=$lt_reload_flag +reload_cmds=$lt_reload_cmds + +# How to pass a linker flag through the compiler. +wl=$lt_wl + +# Object file suffix (normally "o"). +objext="$ac_objext" + +# Old archive suffix (normally "a"). +libext="$libext" + +# Executable file suffix (normally ""). +exeext="$exeext" + +# Additional compiler flags for building library objects. +pic_flag=$lt_pic_flag +pic_mode=$pic_mode + +# Does compiler simultaneously support -c and -o options? +compiler_c_o=$lt_compiler_c_o + +# Can we write directly to a .lo ? +compiler_o_lo=$lt_compiler_o_lo + +# Must we lock files when doing compilation ? +need_locks=$lt_need_locks + +# Do we need the lib prefix for modules? +need_lib_prefix=$need_lib_prefix + +# Do we need a version for libraries? +need_version=$need_version + +# Whether dlopen is supported. +dlopen_support=$enable_dlopen + +# Whether dlopen of programs is supported. +dlopen_self=$enable_dlopen_self + +# Whether dlopen of statically linked programs is supported. +dlopen_self_static=$enable_dlopen_self_static + +# Compiler flag to prevent dynamic linking. +link_static_flag=$lt_link_static_flag + +# Compiler flag to turn off builtin functions. +no_builtin_flag=$lt_no_builtin_flag + +# Compiler flag to allow reflexive dlopens. +export_dynamic_flag_spec=$lt_export_dynamic_flag_spec + +# Compiler flag to generate shared objects directly from archives. +whole_archive_flag_spec=$lt_whole_archive_flag_spec + +# Compiler flag to generate thread-safe objects. +thread_safe_flag_spec=$lt_thread_safe_flag_spec + +# Library versioning type. +version_type=$version_type + +# Format of library name prefix. +libname_spec=$lt_libname_spec + +# List of archive names. First name is the real one, the rest are links. +# The last name is the one that the linker finds with -lNAME. +library_names_spec=$lt_library_names_spec + +# The coded name of the library, if different from the real name. +soname_spec=$lt_soname_spec + +# Commands used to build and install an old-style archive. +RANLIB=$lt_RANLIB +old_archive_cmds=$lt_old_archive_cmds +old_postinstall_cmds=$lt_old_postinstall_cmds +old_postuninstall_cmds=$lt_old_postuninstall_cmds + +# Create an old-style archive from a shared archive. +old_archive_from_new_cmds=$lt_old_archive_from_new_cmds + +# Create a temporary old-style archive to link instead of a shared archive. +old_archive_from_expsyms_cmds=$lt_old_archive_from_expsyms_cmds + +# Commands used to build and install a shared archive. +archive_cmds=$lt_archive_cmds +archive_expsym_cmds=$lt_archive_expsym_cmds +postinstall_cmds=$lt_postinstall_cmds +postuninstall_cmds=$lt_postuninstall_cmds + +# Commands to strip libraries. +old_striplib=$lt_old_striplib +striplib=$lt_striplib + +# Method to check whether dependent libraries are shared objects. +deplibs_check_method=$lt_deplibs_check_method + +# Command to use when deplibs_check_method == file_magic. +file_magic_cmd=$lt_file_magic_cmd + +# Flag that allows shared libraries with undefined symbols to be built. +allow_undefined_flag=$lt_allow_undefined_flag + +# Flag that forces no undefined symbols. +no_undefined_flag=$lt_no_undefined_flag + +# Commands used to finish a libtool library installation in a directory. +finish_cmds=$lt_finish_cmds + +# Same as above, but a single script fragment to be evaled but not shown. +finish_eval=$lt_finish_eval + +# Take the output of nm and produce a listing of raw symbols and C names. +global_symbol_pipe=$lt_global_symbol_pipe + +# Transform the output of nm in a proper C declaration +global_symbol_to_cdecl=$lt_global_symbol_to_cdecl + +# Transform the output of nm in a C name address pair +global_symbol_to_c_name_address=$lt_global_symbol_to_c_name_address + +# This is the shared library runtime path variable. +runpath_var=$runpath_var + +# This is the shared library path variable. +shlibpath_var=$shlibpath_var + +# Is shlibpath searched before the hard-coded library search path? +shlibpath_overrides_runpath=$shlibpath_overrides_runpath + +# How to hardcode a shared library path into an executable. +hardcode_action=$hardcode_action + +# Whether we should hardcode library paths into libraries. +hardcode_into_libs=$hardcode_into_libs + +# Flag to hardcode \$libdir into a binary during linking. +# This must work even if \$libdir does not exist. +hardcode_libdir_flag_spec=$lt_hardcode_libdir_flag_spec + +# Whether we need a single -rpath flag with a separated argument. +hardcode_libdir_separator=$lt_hardcode_libdir_separator + +# Set to yes if using DIR/libNAME.so during linking hardcodes DIR into the +# resulting binary. +hardcode_direct=$hardcode_direct + +# Set to yes if using the -LDIR flag during linking hardcodes DIR into the +# resulting binary. +hardcode_minus_L=$hardcode_minus_L + +# Set to yes if using SHLIBPATH_VAR=DIR during linking hardcodes DIR into +# the resulting binary. +hardcode_shlibpath_var=$hardcode_shlibpath_var + +# Variables whose values should be saved in libtool wrapper scripts and +# restored at relink time. +variables_saved_for_relink="$variables_saved_for_relink" + +# Whether libtool must link a program against all its dependency libraries. +link_all_deplibs=$link_all_deplibs + +# Compile-time system search path for libraries +sys_lib_search_path_spec=$lt_sys_lib_search_path_spec + +# Run-time system search path for libraries +sys_lib_dlsearch_path_spec=$lt_sys_lib_dlsearch_path_spec + +# Fix the shell variable \$srcfile for the compiler. +fix_srcfile_path="$fix_srcfile_path" + +# Set to yes if exported symbols are required. +always_export_symbols=$always_export_symbols + +# The commands to list exported symbols. +export_symbols_cmds=$lt_export_symbols_cmds + +# The commands to extract the exported symbol list from a shared archive. +extract_expsyms_cmds=$lt_extract_expsyms_cmds + +# Symbols that should not be listed in the preloaded symbols. +exclude_expsyms=$lt_exclude_expsyms + +# Symbols that must always be exported. +include_expsyms=$lt_include_expsyms + +# ### END LIBTOOL CONFIG + +__EOF__ + + case $host_os in + aix3*) + cat <<\EOF >> "${ofile}T" + +# AIX sometimes has problems with the GCC collect2 program. For some +# reason, if we set the COLLECT_NAMES environment variable, the problems +# vanish in a puff of smoke. +if test "X${COLLECT_NAMES+set}" != Xset; then + COLLECT_NAMES= + export COLLECT_NAMES +fi +EOF + ;; + esac + + case $host_os in + cygwin* | mingw* | pw32* | os2*) + cat <<'EOF' >> "${ofile}T" + # This is a source program that is used to create dlls on Windows + # Don't remove nor modify the starting and closing comments +# /* ltdll.c starts here */ +# #define WIN32_LEAN_AND_MEAN +# #include +# #undef WIN32_LEAN_AND_MEAN +# #include +# +# #ifndef __CYGWIN__ +# # ifdef __CYGWIN32__ +# # define __CYGWIN__ __CYGWIN32__ +# # endif +# #endif +# +# #ifdef __cplusplus +# extern "C" { +# #endif +# BOOL APIENTRY DllMain (HINSTANCE hInst, DWORD reason, LPVOID reserved); +# #ifdef __cplusplus +# } +# #endif +# +# #ifdef __CYGWIN__ +# #include +# DECLARE_CYGWIN_DLL( DllMain ); +# #endif +# HINSTANCE __hDllInstance_base; +# +# BOOL APIENTRY +# DllMain (HINSTANCE hInst, DWORD reason, LPVOID reserved) +# { +# __hDllInstance_base = hInst; +# return TRUE; +# } +# /* ltdll.c ends here */ + # This is a source program that is used to create import libraries + # on Windows for dlls which lack them. Don't remove nor modify the + # starting and closing comments +# /* impgen.c starts here */ +# /* Copyright (C) 1999-2000 Free Software Foundation, Inc. +# +# This file is part of GNU libtool. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# */ +# +# #include /* for printf() */ +# #include /* for open(), lseek(), read() */ +# #include /* for O_RDONLY, O_BINARY */ +# #include /* for strdup() */ +# +# /* O_BINARY isn't required (or even defined sometimes) under Unix */ +# #ifndef O_BINARY +# #define O_BINARY 0 +# #endif +# +# static unsigned int +# pe_get16 (fd, offset) +# int fd; +# int offset; +# { +# unsigned char b[2]; +# lseek (fd, offset, SEEK_SET); +# read (fd, b, 2); +# return b[0] + (b[1]<<8); +# } +# +# static unsigned int +# pe_get32 (fd, offset) +# int fd; +# int offset; +# { +# unsigned char b[4]; +# lseek (fd, offset, SEEK_SET); +# read (fd, b, 4); +# return b[0] + (b[1]<<8) + (b[2]<<16) + (b[3]<<24); +# } +# +# static unsigned int +# pe_as32 (ptr) +# void *ptr; +# { +# unsigned char *b = ptr; +# return b[0] + (b[1]<<8) + (b[2]<<16) + (b[3]<<24); +# } +# +# int +# main (argc, argv) +# int argc; +# char *argv[]; +# { +# int dll; +# unsigned long pe_header_offset, opthdr_ofs, num_entries, i; +# unsigned long export_rva, export_size, nsections, secptr, expptr; +# unsigned long name_rvas, nexp; +# unsigned char *expdata, *erva; +# char *filename, *dll_name; +# +# filename = argv[1]; +# +# dll = open(filename, O_RDONLY|O_BINARY); +# if (dll < 1) +# return 1; +# +# dll_name = filename; +# +# for (i=0; filename[i]; i++) +# if (filename[i] == '/' || filename[i] == '\\' || filename[i] == ':') +# dll_name = filename + i +1; +# +# pe_header_offset = pe_get32 (dll, 0x3c); +# opthdr_ofs = pe_header_offset + 4 + 20; +# num_entries = pe_get32 (dll, opthdr_ofs + 92); +# +# if (num_entries < 1) /* no exports */ +# return 1; +# +# export_rva = pe_get32 (dll, opthdr_ofs + 96); +# export_size = pe_get32 (dll, opthdr_ofs + 100); +# nsections = pe_get16 (dll, pe_header_offset + 4 +2); +# secptr = (pe_header_offset + 4 + 20 + +# pe_get16 (dll, pe_header_offset + 4 + 16)); +# +# expptr = 0; +# for (i = 0; i < nsections; i++) +# { +# char sname[8]; +# unsigned long secptr1 = secptr + 40 * i; +# unsigned long vaddr = pe_get32 (dll, secptr1 + 12); +# unsigned long vsize = pe_get32 (dll, secptr1 + 16); +# unsigned long fptr = pe_get32 (dll, secptr1 + 20); +# lseek(dll, secptr1, SEEK_SET); +# read(dll, sname, 8); +# if (vaddr <= export_rva && vaddr+vsize > export_rva) +# { +# expptr = fptr + (export_rva - vaddr); +# if (export_rva + export_size > vaddr + vsize) +# export_size = vsize - (export_rva - vaddr); +# break; +# } +# } +# +# expdata = (unsigned char*)malloc(export_size); +# lseek (dll, expptr, SEEK_SET); +# read (dll, expdata, export_size); +# erva = expdata - export_rva; +# +# nexp = pe_as32 (expdata+24); +# name_rvas = pe_as32 (expdata+32); +# +# printf ("EXPORTS\n"); +# for (i = 0; i> "${ofile}T" || (rm -f "${ofile}T"; exit 1) + + mv -f "${ofile}T" "$ofile" || \ + (rm -f "$ofile" && cp "${ofile}T" "$ofile" && rm -f "${ofile}T") + chmod +x "$ofile" +fi +## +## END FIXME + +])# _LT_AC_LTCONFIG_HACK + +# AC_LIBTOOL_DLOPEN - enable checks for dlopen support +AC_DEFUN([AC_LIBTOOL_DLOPEN], [AC_BEFORE([$0],[AC_LIBTOOL_SETUP])]) + +# AC_LIBTOOL_WIN32_DLL - declare package support for building win32 dll's +AC_DEFUN([AC_LIBTOOL_WIN32_DLL], [AC_BEFORE([$0], [AC_LIBTOOL_SETUP])]) + +# AC_ENABLE_SHARED - implement the --enable-shared flag +# Usage: AC_ENABLE_SHARED[(DEFAULT)] +# Where DEFAULT is either `yes' or `no'. If omitted, it defaults to +# `yes'. +AC_DEFUN([AC_ENABLE_SHARED], +[define([AC_ENABLE_SHARED_DEFAULT], ifelse($1, no, no, yes))dnl +AC_ARG_ENABLE(shared, +changequote(<<, >>)dnl +<< --enable-shared[=PKGS] build shared libraries [default=>>AC_ENABLE_SHARED_DEFAULT], +changequote([, ])dnl +[p=${PACKAGE-default} +case $enableval in +yes) enable_shared=yes ;; +no) enable_shared=no ;; +*) + enable_shared=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_shared=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac], +enable_shared=AC_ENABLE_SHARED_DEFAULT)dnl +]) + +# AC_DISABLE_SHARED - set the default shared flag to --disable-shared +AC_DEFUN([AC_DISABLE_SHARED], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl +AC_ENABLE_SHARED(no)]) + +# AC_ENABLE_STATIC - implement the --enable-static flag +# Usage: AC_ENABLE_STATIC[(DEFAULT)] +# Where DEFAULT is either `yes' or `no'. If omitted, it defaults to +# `yes'. +AC_DEFUN([AC_ENABLE_STATIC], +[define([AC_ENABLE_STATIC_DEFAULT], ifelse($1, no, no, yes))dnl +AC_ARG_ENABLE(static, +changequote(<<, >>)dnl +<< --enable-static[=PKGS] build static libraries [default=>>AC_ENABLE_STATIC_DEFAULT], +changequote([, ])dnl +[p=${PACKAGE-default} +case $enableval in +yes) enable_static=yes ;; +no) enable_static=no ;; +*) + enable_static=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_static=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac], +enable_static=AC_ENABLE_STATIC_DEFAULT)dnl +]) + +# AC_DISABLE_STATIC - set the default static flag to --disable-static +AC_DEFUN([AC_DISABLE_STATIC], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl +AC_ENABLE_STATIC(no)]) + + +# AC_ENABLE_FAST_INSTALL - implement the --enable-fast-install flag +# Usage: AC_ENABLE_FAST_INSTALL[(DEFAULT)] +# Where DEFAULT is either `yes' or `no'. If omitted, it defaults to +# `yes'. +AC_DEFUN([AC_ENABLE_FAST_INSTALL], +[define([AC_ENABLE_FAST_INSTALL_DEFAULT], ifelse($1, no, no, yes))dnl +AC_ARG_ENABLE(fast-install, +changequote(<<, >>)dnl +<< --enable-fast-install[=PKGS] optimize for fast installation [default=>>AC_ENABLE_FAST_INSTALL_DEFAULT], +changequote([, ])dnl +[p=${PACKAGE-default} +case $enableval in +yes) enable_fast_install=yes ;; +no) enable_fast_install=no ;; +*) + enable_fast_install=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_fast_install=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac], +enable_fast_install=AC_ENABLE_FAST_INSTALL_DEFAULT)dnl +]) + +# AC_DISABLE_FAST_INSTALL - set the default to --disable-fast-install +AC_DEFUN([AC_DISABLE_FAST_INSTALL], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl +AC_ENABLE_FAST_INSTALL(no)]) + +# AC_LIBTOOL_PICMODE - implement the --with-pic flag +# Usage: AC_LIBTOOL_PICMODE[(MODE)] +# Where MODE is either `yes' or `no'. If omitted, it defaults to +# `both'. +AC_DEFUN([AC_LIBTOOL_PICMODE], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl +pic_mode=ifelse($#,1,$1,default)]) + + +# AC_PATH_TOOL_PREFIX - find a file program which can recognise shared library +AC_DEFUN([AC_PATH_TOOL_PREFIX], +[AC_MSG_CHECKING([for $1]) +AC_CACHE_VAL(lt_cv_path_MAGIC_CMD, +[case $MAGIC_CMD in + /*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a path. + ;; + ?:/*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a dos path. + ;; + *) + ac_save_MAGIC_CMD="$MAGIC_CMD" + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" +dnl $ac_dummy forces splitting on constant user-supplied paths. +dnl POSIX.2 word splitting is done only on the output of word expansions, +dnl not every word. This closes a longstanding sh security hole. + ac_dummy="ifelse([$2], , $PATH, [$2])" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$1; then + lt_cv_path_MAGIC_CMD="$ac_dir/$1" + if test -n "$file_magic_test_file"; then + case $deplibs_check_method in + "file_magic "*) + file_magic_regex="`expr \"$deplibs_check_method\" : \"file_magic \(.*\)\"`" + MAGIC_CMD="$lt_cv_path_MAGIC_CMD" + if eval $file_magic_cmd \$file_magic_test_file 2> /dev/null | + egrep "$file_magic_regex" > /dev/null; then + : + else + cat <&2 + +*** Warning: the command libtool uses to detect shared libraries, +*** $file_magic_cmd, produces output that libtool cannot recognize. +*** The result is that libtool may fail to recognize shared libraries +*** as such. This will affect the creation of libtool libraries that +*** depend on shared libraries, but programs linked with such libtool +*** libraries will work regardless of this problem. Nevertheless, you +*** may want to report the problem to your system manager and/or to +*** bug-libtool@gnu.org + +EOF + fi ;; + esac + fi + break + fi + done + IFS="$ac_save_ifs" + MAGIC_CMD="$ac_save_MAGIC_CMD" + ;; +esac]) +MAGIC_CMD="$lt_cv_path_MAGIC_CMD" +if test -n "$MAGIC_CMD"; then + AC_MSG_RESULT($MAGIC_CMD) +else + AC_MSG_RESULT(no) +fi +]) + + +# AC_PATH_MAGIC - find a file program which can recognise a shared library +AC_DEFUN([AC_PATH_MAGIC], +[AC_REQUIRE([AC_CHECK_TOOL_PREFIX])dnl +AC_PATH_TOOL_PREFIX(${ac_tool_prefix}file, /usr/bin:$PATH) +if test -z "$lt_cv_path_MAGIC_CMD"; then + if test -n "$ac_tool_prefix"; then + AC_PATH_TOOL_PREFIX(file, /usr/bin:$PATH) + else + MAGIC_CMD=: + fi +fi +]) + + +# AC_PROG_LD - find the path to the GNU or non-GNU linker +AC_DEFUN([AC_PROG_LD], +[AC_ARG_WITH(gnu-ld, +[ --with-gnu-ld assume the C compiler uses GNU ld [default=no]], +test "$withval" = no || with_gnu_ld=yes, with_gnu_ld=no) +AC_REQUIRE([AC_PROG_CC])dnl +AC_REQUIRE([AC_CANONICAL_HOST])dnl +AC_REQUIRE([AC_CANONICAL_BUILD])dnl +AC_REQUIRE([_LT_AC_LIBTOOL_SYS_PATH_SEPARATOR])dnl +ac_prog=ld +if test "$GCC" = yes; then + # Check if gcc -print-prog-name=ld gives a path. + AC_MSG_CHECKING([for ld used by GCC]) + case $host in + *-*-mingw*) + # gcc leaves a trailing carriage return which upsets mingw + ac_prog=`($CC -print-prog-name=ld) 2>&5 | tr -d '\015'` ;; + *) + ac_prog=`($CC -print-prog-name=ld) 2>&5` ;; + esac + case $ac_prog in + # Accept absolute paths. + [[\\/]]* | [[A-Za-z]]:[[\\/]]*) + re_direlt='/[[^/]][[^/]]*/\.\./' + # Canonicalize the path of ld + ac_prog=`echo $ac_prog| sed 's%\\\\%/%g'` + while echo $ac_prog | grep "$re_direlt" > /dev/null 2>&1; do + ac_prog=`echo $ac_prog| sed "s%$re_direlt%/%"` + done + test -z "$LD" && LD="$ac_prog" + ;; + "") + # If it fails, then pretend we aren't using GCC. + ac_prog=ld + ;; + *) + # If it is relative, then search for the first ld in PATH. + with_gnu_ld=unknown + ;; + esac +elif test "$with_gnu_ld" = yes; then + AC_MSG_CHECKING([for GNU ld]) +else + AC_MSG_CHECKING([for non-GNU ld]) +fi +AC_CACHE_VAL(lt_cv_path_LD, +[if test -z "$LD"; then + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for ac_dir in $PATH; do + test -z "$ac_dir" && ac_dir=. + if test -f "$ac_dir/$ac_prog" || test -f "$ac_dir/$ac_prog$ac_exeext"; then + lt_cv_path_LD="$ac_dir/$ac_prog" + # Check to see if the program is GNU ld. I'd rather use --version, + # but apparently some GNU ld's only accept -v. + # Break only if it was the GNU/non-GNU ld that we prefer. + if "$lt_cv_path_LD" -v 2>&1 < /dev/null | egrep '(GNU|with BFD)' > /dev/null; then + test "$with_gnu_ld" != no && break + else + test "$with_gnu_ld" != yes && break + fi + fi + done + IFS="$ac_save_ifs" +else + lt_cv_path_LD="$LD" # Let the user override the test with a path. +fi]) +LD="$lt_cv_path_LD" +if test -n "$LD"; then + AC_MSG_RESULT($LD) +else + AC_MSG_RESULT(no) +fi +test -z "$LD" && AC_MSG_ERROR([no acceptable ld found in \$PATH]) +AC_PROG_LD_GNU +]) + +# AC_PROG_LD_GNU - +AC_DEFUN([AC_PROG_LD_GNU], +[AC_CACHE_CHECK([if the linker ($LD) is GNU ld], lt_cv_prog_gnu_ld, +[# I'd rather use --version here, but apparently some GNU ld's only accept -v. +if $LD -v 2>&1 &5; then + lt_cv_prog_gnu_ld=yes +else + lt_cv_prog_gnu_ld=no +fi]) +with_gnu_ld=$lt_cv_prog_gnu_ld +]) + +# AC_PROG_LD_RELOAD_FLAG - find reload flag for linker +# -- PORTME Some linkers may need a different reload flag. +AC_DEFUN([AC_PROG_LD_RELOAD_FLAG], +[AC_CACHE_CHECK([for $LD option to reload object files], lt_cv_ld_reload_flag, +[lt_cv_ld_reload_flag='-r']) +reload_flag=$lt_cv_ld_reload_flag +test -n "$reload_flag" && reload_flag=" $reload_flag" +]) + +# AC_DEPLIBS_CHECK_METHOD - how to check for library dependencies +# -- PORTME fill in with the dynamic library characteristics +AC_DEFUN([AC_DEPLIBS_CHECK_METHOD], +[AC_CACHE_CHECK([how to recognise dependant libraries], +lt_cv_deplibs_check_method, +[lt_cv_file_magic_cmd='$MAGIC_CMD' +lt_cv_file_magic_test_file= +lt_cv_deplibs_check_method='unknown' +# Need to set the preceding variable on all platforms that support +# interlibrary dependencies. +# 'none' -- dependencies not supported. +# `unknown' -- same as none, but documents that we really don't know. +# 'pass_all' -- all dependencies passed with no checks. +# 'test_compile' -- check by making test program. +# 'file_magic [[regex]]' -- check by looking for files in library path +# which responds to the $file_magic_cmd with a given egrep regex. +# If you have `file' or equivalent on your system and you're not sure +# whether `pass_all' will *always* work, you probably want this one. + +case $host_os in +aix4* | aix5*) + lt_cv_deplibs_check_method=pass_all + ;; + +beos*) + lt_cv_deplibs_check_method=pass_all + ;; + +bsdi4*) + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (shared object|dynamic lib)' + lt_cv_file_magic_cmd='/usr/bin/file -L' + lt_cv_file_magic_test_file=/shlib/libc.so + ;; + +cygwin* | mingw* | pw32*) + lt_cv_deplibs_check_method='file_magic file format pei*-i386(.*architecture: i386)?' + lt_cv_file_magic_cmd='$OBJDUMP -f' + ;; + +darwin* | rhapsody*) + lt_cv_deplibs_check_method='file_magic Mach-O dynamically linked shared library' + lt_cv_file_magic_cmd='/usr/bin/file -L' + case "$host_os" in + rhapsody* | darwin1.[[012]]) + lt_cv_file_magic_test_file=`echo /System/Library/Frameworks/System.framework/Versions/*/System | head -1` + ;; + *) # Darwin 1.3 on + lt_cv_file_magic_test_file='/usr/lib/libSystem.dylib' + ;; + esac + ;; + +freebsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ > /dev/null; then + case $host_cpu in + i*86 ) + # Not sure whether the presence of OpenBSD here was a mistake. + # Let's accept both of them until this is cleared up. + lt_cv_deplibs_check_method='file_magic (FreeBSD|OpenBSD)/i[[3-9]]86 (compact )?demand paged shared library' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` + ;; + esac + else + lt_cv_deplibs_check_method=pass_all + fi + ;; + +gnu*) + lt_cv_deplibs_check_method=pass_all + ;; + +hpux10.20*|hpux11*) + lt_cv_deplibs_check_method='file_magic (s[[0-9]][[0-9]][[0-9]]|PA-RISC[[0-9]].[[0-9]]) shared library' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=/usr/lib/libc.sl + ;; + +irix5* | irix6* | nonstopux*) + case $host_os in + irix5* | nonstopux*) + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method="file_magic ELF 32-bit MSB dynamic lib MIPS - version 1" + ;; + *) + case $LD in + *-32|*"-32 ") libmagic=32-bit;; + *-n32|*"-n32 ") libmagic=N32;; + *-64|*"-64 ") libmagic=64-bit;; + *) libmagic=never-match;; + esac + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method="file_magic ELF ${libmagic} MSB mips-[[1234]] dynamic lib MIPS - version 1" + ;; + esac + lt_cv_file_magic_test_file=`echo /lib${libsuff}/libc.so*` + lt_cv_deplibs_check_method=pass_all + ;; + +# This must be Linux ELF. +linux-gnu*) + case $host_cpu in + alpha* | hppa* | i*86 | powerpc* | sparc* | ia64* ) + lt_cv_deplibs_check_method=pass_all ;; + *) + # glibc up to 2.1.1 does not perform some relocations on ARM + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB (shared object|dynamic lib )' ;; + esac + lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so` + ;; + +netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ > /dev/null; then + lt_cv_deplibs_check_method='match_pattern /lib[[^/\.]]+\.so\.[[0-9]]+\.[[0-9]]+$' + else + lt_cv_deplibs_check_method='match_pattern /lib[[^/\.]]+\.so$' + fi + ;; + +newos6*) + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (executable|dynamic lib)' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=/usr/lib/libnls.so + ;; + +openbsd*) + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` + if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB shared object' + else + lt_cv_deplibs_check_method='file_magic OpenBSD.* shared library' + fi + ;; + +osf3* | osf4* | osf5*) + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method='file_magic COFF format alpha shared library' + lt_cv_file_magic_test_file=/shlib/libc.so + lt_cv_deplibs_check_method=pass_all + ;; + +sco3.2v5*) + lt_cv_deplibs_check_method=pass_all + ;; + +solaris*) + lt_cv_deplibs_check_method=pass_all + lt_cv_file_magic_test_file=/lib/libc.so + ;; + +sysv5uw[[78]]* | sysv4*uw2*) + lt_cv_deplibs_check_method=pass_all + ;; + +sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + case $host_vendor in + motorola) + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (shared object|dynamic lib) M[[0-9]][[0-9]]* Version [[0-9]]' + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so*` + ;; + ncr) + lt_cv_deplibs_check_method=pass_all + ;; + sequent) + lt_cv_file_magic_cmd='/bin/file' + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB (shared object|dynamic lib )' + ;; + sni) + lt_cv_file_magic_cmd='/bin/file' + lt_cv_deplibs_check_method="file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB dynamic lib" + lt_cv_file_magic_test_file=/lib/libc.so + ;; + esac + ;; +esac +]) +file_magic_cmd=$lt_cv_file_magic_cmd +deplibs_check_method=$lt_cv_deplibs_check_method +]) + + +# AC_PROG_NM - find the path to a BSD-compatible name lister +AC_DEFUN([AC_PROG_NM], +[AC_REQUIRE([_LT_AC_LIBTOOL_SYS_PATH_SEPARATOR])dnl +AC_MSG_CHECKING([for BSD-compatible nm]) +AC_CACHE_VAL(lt_cv_path_NM, +[if test -n "$NM"; then + # Let the user override the test. + lt_cv_path_NM="$NM" +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for ac_dir in $PATH /usr/ccs/bin /usr/ucb /bin; do + test -z "$ac_dir" && ac_dir=. + tmp_nm=$ac_dir/${ac_tool_prefix}nm + if test -f $tmp_nm || test -f $tmp_nm$ac_exeext ; then + # Check to see if the nm accepts a BSD-compat flag. + # Adding the `sed 1q' prevents false positives on HP-UX, which says: + # nm: unknown option "B" ignored + # Tru64's nm complains that /dev/null is an invalid object file + if ($tmp_nm -B /dev/null 2>&1 | sed '1q'; exit 0) | egrep '(/dev/null|Invalid file or object type)' >/dev/null; then + lt_cv_path_NM="$tmp_nm -B" + break + elif ($tmp_nm -p /dev/null 2>&1 | sed '1q'; exit 0) | egrep /dev/null >/dev/null; then + lt_cv_path_NM="$tmp_nm -p" + break + else + lt_cv_path_NM=${lt_cv_path_NM="$tmp_nm"} # keep the first match, but + continue # so that we can try to find one that supports BSD flags + fi + fi + done + IFS="$ac_save_ifs" + test -z "$lt_cv_path_NM" && lt_cv_path_NM=nm +fi]) +NM="$lt_cv_path_NM" +AC_MSG_RESULT([$NM]) +]) + +# AC_CHECK_LIBM - check for math library +AC_DEFUN([AC_CHECK_LIBM], +[AC_REQUIRE([AC_CANONICAL_HOST])dnl +LIBM= +case $host in +*-*-beos* | *-*-cygwin* | *-*-pw32*) + # These system don't have libm + ;; +*-ncr-sysv4.3*) + AC_CHECK_LIB(mw, _mwvalidcheckl, LIBM="-lmw") + AC_CHECK_LIB(m, main, LIBM="$LIBM -lm") + ;; +*) + AC_CHECK_LIB(m, main, LIBM="-lm") + ;; +esac +]) + +# AC_LIBLTDL_CONVENIENCE[(dir)] - sets LIBLTDL to the link flags for +# the libltdl convenience library and LTDLINCL to the include flags for +# the libltdl header and adds --enable-ltdl-convenience to the +# configure arguments. Note that LIBLTDL and LTDLINCL are not +# AC_SUBSTed, nor is AC_CONFIG_SUBDIRS called. If DIR is not +# provided, it is assumed to be `libltdl'. LIBLTDL will be prefixed +# with '${top_builddir}/' and LTDLINCL will be prefixed with +# '${top_srcdir}/' (note the single quotes!). If your package is not +# flat and you're not using automake, define top_builddir and +# top_srcdir appropriately in the Makefiles. +AC_DEFUN([AC_LIBLTDL_CONVENIENCE], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl + case $enable_ltdl_convenience in + no) AC_MSG_ERROR([this package needs a convenience libltdl]) ;; + "") enable_ltdl_convenience=yes + ac_configure_args="$ac_configure_args --enable-ltdl-convenience" ;; + esac + LIBLTDL='${top_builddir}/'ifelse($#,1,[$1],['libltdl'])/libltdlc.la + LTDLINCL='-I${top_srcdir}/'ifelse($#,1,[$1],['libltdl']) + # For backwards non-gettext consistent compatibility... + INCLTDL="$LTDLINCL" +]) + +# AC_LIBLTDL_INSTALLABLE[(dir)] - sets LIBLTDL to the link flags for +# the libltdl installable library and LTDLINCL to the include flags for +# the libltdl header and adds --enable-ltdl-install to the configure +# arguments. Note that LIBLTDL and LTDLINCL are not AC_SUBSTed, nor is +# AC_CONFIG_SUBDIRS called. If DIR is not provided and an installed +# libltdl is not found, it is assumed to be `libltdl'. LIBLTDL will +# be prefixed with '${top_builddir}/' and LTDLINCL will be prefixed +# with '${top_srcdir}/' (note the single quotes!). If your package is +# not flat and you're not using automake, define top_builddir and +# top_srcdir appropriately in the Makefiles. +# In the future, this macro may have to be called after AC_PROG_LIBTOOL. +AC_DEFUN([AC_LIBLTDL_INSTALLABLE], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl + AC_CHECK_LIB(ltdl, main, + [test x"$enable_ltdl_install" != xyes && enable_ltdl_install=no], + [if test x"$enable_ltdl_install" = xno; then + AC_MSG_WARN([libltdl not installed, but installation disabled]) + else + enable_ltdl_install=yes + fi + ]) + if test x"$enable_ltdl_install" = x"yes"; then + ac_configure_args="$ac_configure_args --enable-ltdl-install" + LIBLTDL='${top_builddir}/'ifelse($#,1,[$1],['libltdl'])/libltdl.la + LTDLINCL='-I${top_srcdir}/'ifelse($#,1,[$1],['libltdl']) + else + ac_configure_args="$ac_configure_args --enable-ltdl-install=no" + LIBLTDL="-lltdl" + LTDLINCL= + fi + # For backwards non-gettext consistent compatibility... + INCLTDL="$LTDLINCL" +]) + +# old names +AC_DEFUN([AM_PROG_LIBTOOL], [AC_PROG_LIBTOOL]) +AC_DEFUN([AM_ENABLE_SHARED], [AC_ENABLE_SHARED($@)]) +AC_DEFUN([AM_ENABLE_STATIC], [AC_ENABLE_STATIC($@)]) +AC_DEFUN([AM_DISABLE_SHARED], [AC_DISABLE_SHARED($@)]) +AC_DEFUN([AM_DISABLE_STATIC], [AC_DISABLE_STATIC($@)]) +AC_DEFUN([AM_PROG_LD], [AC_PROG_LD]) +AC_DEFUN([AM_PROG_NM], [AC_PROG_NM]) + +# This is just to silence aclocal about the macro not being used +ifelse([AC_DISABLE_FAST_INSTALL]) diff --git a/sim/ucsim/app.cc b/sim/ucsim/app.cc new file mode 100644 index 0000000..2414547 --- /dev/null +++ b/sim/ucsim/app.cc @@ -0,0 +1,824 @@ +/* + * Simulator of microcontrollers (app.cc) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include +#include +#ifdef HAVE_UNISTD_H +# include +#endif +#ifdef HAVE_GETOPT_H +# include +#endif +#ifdef SOCKET_AVAIL +# include HEADER_SOCKET +#endif +#include +#include +#include "i_string.h" + +// prj +#include "utils.h" +#include "appcl.h" +#include "optioncl.h" +#include "globals.h" + +// sim.src +#include "simcl.h" + +// cmd.src +#include "cmdsetcl.h" +#include "cmdutil.h" +#include "cmdconfcl.h" +#include "showcl.h" +#include "getcl.h" +#include "setcl.h" +#ifdef _WIN32 +#include "newcmdwin32cl.h" +#else +#include "newcmdposixcl.h" +#endif + + +/* + * Program options + */ + +/*cl_option::cl_option(int atype, char sn, char *ln) +{ + type= atype; + short_name= sn; + if (!ln) + long_name= NULL; + else + long_name= strdup(ln); + values= new cl_ustrings(1, 1); +} + +cl_option::~cl_option(void) +{ + if (long_name) + free(long_name); + delete values; +} + +int +cl_option::add_value(char *value) +{ + values->add(value); + return(values->count - 1); +} + +char * +cl_option::get_value(int index) +{ + if (index > values->count - 1) + return(0); + return((char*)(values->at(index))); +}*/ + +/* List of options */ + +/*cl_options::cl_options(void): + cl_list(2, 2) +{ +}*/ + + +/* + * Application + **************************************************************************** + */ + +cl_app::cl_app(void) +{ + sim= 0; + in_files= new cl_ustrings(2, 2, "input files"); + options= new cl_options(); + going= 1; +} + +cl_app::~cl_app(void) +{ + remove_simulator(); + delete commander; + delete in_files; + delete options; +} + +int +cl_app::init(int argc, char *argv[]) +{ + cl_base::init(); + set_name("application"); + mk_options(); + proc_arguments(argc, argv); + class cl_cmdset *cmdset= new cl_cmdset(); + cmdset->init(); + build_cmdset(cmdset); + commander= new cl_commander(this, cmdset/*, sim*/); + commander->init(); + return(0); +} + +/* Main cycle */ + +int +cl_app::run(void) +{ + int done= 0; + + while (!done && + going) + { + if (sim) + { + if (sim->state & SIM_GO) + { + if (commander->input_avail()) + done= commander->proc_input(); + else + sim->step(); + } + else + { + commander->wait_input(); + done= commander->proc_input(); + } + } + else + { + commander->wait_input(); + done= commander->proc_input(); + } + } + return(0); +} + +void +cl_app::done(void) +{ +} + + +/* + * Interpretation of parameters + */ + +static void +print_help(const char *name) +{ + printf("%s: %s\n", name, VERSIONSTR); + printf("Usage: %s [-hHVvP] [-p prompt] [-t CPU] [-X freq[k|M]]\n" + " [-c file] [-s file] [-S optionlist]" +#ifdef SOCKET_AVAIL + " [-Z portnum] [-k portnum]" +#endif + "\n" + " [files...]\n", name); + printf + ( + "Options:\n" + " -t CPU Type of CPU: 51, C52, 251, etc.\n" + " -X freq[k|M] XTAL frequency\n" + " -c file Open command console on `file'\n" +#ifdef SOCKET_AVAIL + " -Z portnum Use localhost:portnumber for command console\n" + " -k portnum Use localhost:portnum for serial I/O\n" +#endif + " -s file Connect serial interface to `file'\n" + " -S options `options' is a comma separated list of options according to\n" + " serial interface. Know options are:\n" + " in=file serial input will be read from file named `file'\n" + " out=file serial output will be written to `file'\n" + " -p prompt Specify string for prompt\n" + " -P Prompt is a null ('\\0') character\n" + " -V Verbose mode\n" + " -v Print out version number\n" + " -H Print out types of known CPUs\n" + " -h Print out this help\n" + ); +} + +enum { + SOPT_IN= 0, + SOPT_OUT +}; + +static const char *S_opts[]= { + /*[SOPT_IN]=*/ "in", + /*[SOPT_OUT]=*/ "out", + NULL +}; + +int +cl_app::proc_arguments(int argc, char *argv[]) +{ + int i, c; + char opts[100], *cp, *subopts, *value; + char *cpu_type= NULL; + bool s_done= DD_FALSE, k_done= DD_FALSE; + bool S_i_done= DD_FALSE, S_o_done= DD_FALSE; + + strcpy(opts, "c:C:p:PX:vVt:s:S:hHk:"); +#ifdef SOCKET_AVAIL + strcat(opts, "Z:r:"); +#endif + + while((c= getopt(argc, argv, opts)) != -1) + switch (c) + { + case 'c': + if (!options->set_value("console_on", this, optarg)) + fprintf(stderr, "Warning: No \"console_on\" option found " + "to set by -c\n"); + break; + case 'C': + if (!options->set_value("config_file", this, optarg)) + fprintf(stderr, "Warning: No \"config_file\" option found to set " + "parameter of -C as config file\n"); + break; +#ifdef SOCKET_AVAIL + case 'Z': case 'r': + { + // By Sandeep + // Modified by DD + class cl_option *o; + options->new_option(o= new cl_number_option(this, "port_number", + "Listen on port (-Z)")); + o->init(); + o->hide(); + if (!options->set_value("port_number", this, strtol(optarg, NULL, 0))) + fprintf(stderr, "Warning: No \"port_number\" option found" + " to set parameter of -Z as pot number to listen on\n"); + break; + } +#endif + case 'p': { + if (!options->set_value("prompt", this, optarg)) + fprintf(stderr, "Warning: No \"prompt\" option found to set " + "parameter of -p as default prompt\n"); + break; + } + case 'P': + if (!options->set_value("null_prompt", this, bool(DD_TRUE))) + fprintf(stderr, "Warning: No \"null_prompt\" option found\n"); + break; + case 'X': + { + double XTAL; + for (cp= optarg; *cp; *cp= toupper(*cp), cp++); + XTAL= strtod(optarg, &cp); + if (*cp == 'K') + XTAL*= 1e3; + if (*cp == 'M') + XTAL*= 1e6; + if (XTAL == 0) + { + fprintf(stderr, "Xtal frequency must be greather than 0\n"); + exit(1); + } + if (!options->set_value("xtal", this, XTAL)) + fprintf(stderr, "Warning: No \"xtal\" option found to set " + "parameter of -X as XTAL frequency\n"); + break; + } + case 'v': + printf("%s: %s\n", argv[0], VERSIONSTR); + exit(0); + break; + case 'V': + if (!options->set_value("debug", this, (bool)DD_TRUE)) + fprintf(stderr, "Warning: No \"debug\" option found to set " + "by -V parameter\n"); + break; + case 't': + { + if (cpu_type) + free(cpu_type); + cpu_type= case_string(case_upper, optarg); + if (!options->set_value("cpu_type", this, /*optarg*/cpu_type)) + fprintf(stderr, "Warning: No \"cpu_type\" option found to set " + "parameter of -t as type of controller\n"); + break; + } + case 's': + { +#ifdef _WIN32 + /* TODO: this code should be probably used for all platforms? */ + FILE *Ser; + if (s_done) + { + fprintf(stderr, "-s option can not be used more than once.\n"); + break; + } + s_done= DD_TRUE; + if ((Ser= fopen(optarg, "r+")) == NULL) + { + fprintf(stderr, + "Can't open `%s': %s\n", optarg, strerror(errno)); + return(4); + } + if (!options->set_value("serial_in_file", this, Ser)) + fprintf(stderr, "Warning: No \"serial_in_file\" option found to set " + "parameter of -s as serial input file\n"); + if (!options->set_value("serial_out_file", this, Ser)) + fprintf(stderr, "Warning: No \"serial_out_file\" option found " + "to set parameter of -s as serial output file\n"); +#else + FILE *Ser_in, *Ser_out; + if (s_done) + { + fprintf(stderr, "-s option can not be used more than once.\n"); + break; + } + s_done= DD_TRUE; + if ((Ser_in= fopen(optarg, "r")) == NULL) + { + fprintf(stderr, + "Can't open `%s': %s\n", optarg, strerror(errno)); + return(4); + } + if (!options->set_value("serial_in_file", this, Ser_in)) + fprintf(stderr, "Warning: No \"serial_in_file\" option found to set " + "parameter of -s as serial input file\n"); + if ((Ser_out= fopen(optarg, "w")) == NULL) + { + fprintf(stderr, + "Can't open `%s': %s\n", optarg, strerror(errno)); + return(4); + } + if (!options->set_value("serial_out_file", this, Ser_out)) + fprintf(stderr, "Warning: No \"serial_out_file\" option found " + "to set parameter of -s as serial output file\n"); +#endif + break; + } +#ifdef SOCKET_AVAIL + // socket serial I/O by Alexandre Frey + case 'k': + { + FILE *Ser_in, *Ser_out; + UCSOCKET_T sock; + unsigned short serverport; + UCSOCKET_T client_sock; + + if (k_done) + { + fprintf(stderr, "Serial input specified more than once.\n"); + } + k_done= DD_TRUE; + + serverport = atoi(optarg); + sock = make_server_socket(serverport); +#ifdef _WIN32 + if (SOCKET_ERROR == listen((SOCKET)sock, 1)) + { + fprintf(stderr, "Listen on port %d: %d\n", serverport, + WSAGetLastError()); + return (4); + } + fprintf(stderr, "Listening on port %d for a serial connection.\n", + serverport); + if (INVALID_SOCKET == (client_sock = accept(sock, NULL, NULL))) + { + fprintf(stderr, "accept: %d\n", WSAGetLastError()); + return (4); + } + fprintf(stderr, "Serial connection established.\n"); + + int fh = _open_osfhandle((intptr_t)client_sock, 0); + if (-1 == fh) + { + perror("_open_osfhandle"); + return (4); + } + if (NULL == (Ser_in = fdopen(fh, "r"))) + { + fprintf(stderr, "Can't create input stream: %s\n", strerror(errno)); + return (4); + } + + fh = _open_osfhandle((intptr_t)client_sock, 0); + if (-1 == fh) + { + perror("_open_osfhandle"); + } + if (NULL == (Ser_out = fdopen(fh, "w"))) { + fprintf(stderr, "Can't create output stream: %s\n", strerror(errno)); + return (4); + } +#else + if (listen(sock, 1) < 0) { + fprintf(stderr, "Listen on port %d: %s\n", serverport, + strerror(errno)); + return (4); + } + fprintf(stderr, "Listening on port %d for a serial connection.\n", + serverport); + if ((client_sock= accept(sock, NULL, NULL)) < 0) { + fprintf(stderr, "accept: %s\n", strerror(errno)); + } + fprintf(stderr, "Serial connection established.\n"); + + if ((Ser_in= fdopen(client_sock, "r")) == NULL) { + fprintf(stderr, "Can't create input stream: %s\n", strerror(errno)); + return (4); + } + if ((Ser_out= fdopen(client_sock, "w")) == NULL) { + fprintf(stderr, "Can't create output stream: %s\n", strerror(errno)); + return (4); + } +#endif + if (!options->set_value("serial_in_file", this, (void*)Ser_in)) + fprintf(stderr, "Warning: No \"serial_in_file\" option found to " + "set parameter of -s as serial input file\n"); + if (!options->set_value("serial_out_file", this, Ser_out)) + fprintf(stderr, "Warning: No \"serial_out_file\" option found " + "to set parameter of -s as serial output file\n"); + break; + } +#endif + case 'S': + subopts= optarg; + while (*subopts != '\0') + switch (get_sub_opt(&subopts, S_opts, &value)) + { + FILE *Ser_in, *Ser_out; + case SOPT_IN: + if (value == NULL) { + fprintf(stderr, "No value for -S in\n"); + exit(1); + } + if (S_i_done) + { + fprintf(stderr, "Serial input specified more than once.\n"); + break; + } + S_i_done= DD_TRUE; + if ((Ser_in= fopen(value, "r")) == NULL) + { + fprintf(stderr, + "Can't open `%s': %s\n", value, strerror(errno)); + exit(4); + } + if (!options->set_value("serial_in_file", this, (void*)Ser_in)) + fprintf(stderr, "Warning: No \"serial_in_file\" option found " + "to set parameter of -s as serial input file\n"); + break; + case SOPT_OUT: + if (value == NULL) { + fprintf(stderr, "No value for -S out\n"); + exit(1); + } + if (S_o_done) + { + fprintf(stderr, "Serial output specified more than once.\n"); + break; + } + if ((Ser_out= fopen(value, "w")) == NULL) + { + fprintf(stderr, + "Can't open `%s': %s\n", value, strerror(errno)); + exit(4); + } + if (!options->set_value("serial_out_file", this, Ser_out)) + fprintf(stderr, "Warning: No \"serial_out_file\" option found " + "to set parameter of -s as serial output file\n"); + break; + default: + /* Unknown suboption. */ + fprintf(stderr, "Unknown suboption `%s' for -S\n", value); + exit(1); + break; + } + break; + case 'h': + print_help("s51"); + exit(0); + break; + case 'H': + { + if (!cpus) + { + fprintf(stderr, "CPU type is not selectable\n"); + exit(0); + } + i= 0; + while (cpus[i].type_str != NULL) + { + printf("%s\n", cpus[i].type_str); + i++; + } + exit(0); + break; + } + case '?': + if (isprint(optopt)) + fprintf(stderr, "Unknown option `-%c'.\n", optopt); + else + fprintf(stderr, "Unknown option character `\\x%x'.\n", optopt); + return(1); + break; + default: + exit(c); + } + + for (i= optind; i < argc; i++) + in_files->add(argv[i]); + + return(0); +} + + +class cl_uc * +cl_app::get_uc(void) +{ + if (!sim) + return(0); + return(sim->get_uc()); +} + + +/* Command handling */ + +class cl_cmd * +cl_app::get_cmd(class cl_cmdline *cmdline) +{ + return(0); +} + + +/* + * Messages to broadcast + */ + +/* +void +cl_app::mem_cell_changed(class cl_m *mem, t_addr addr) +{ + if (sim) + sim->mem_cell_changed(mem, addr); +} +*/ + + +/* Adding and removing components */ + +void +cl_app::set_simulator(class cl_sim *simulator) +{ + if (sim) + remove_simulator(); + sim= simulator; + +} + +void +cl_app::remove_simulator(void) +{ + if (!sim) + return; + delete sim; + sim= 0; +} + +void +cl_app::build_cmdset(class cl_cmdset *cmdset) +{ + class cl_cmd *cmd; + class cl_super_cmd *super_cmd; + class cl_cmdset *cset; + + { + cset= new cl_cmdset(); + cset->init(); + cset->add(cmd= new cl_conf_cmd("_no_parameters_", 0, +"conf Configuration", +"long help of conf")); + cmd->init(); + cset->add(cmd= new cl_conf_objects_cmd("objects", 0, +"conf objects Show object tree", +"long help of conf objects")); + cmd->init(); + } + cmdset->add(cmd= new cl_super_cmd("conf", 0, +"conf subcommand Information, see `conf' command for more help", +"long help of conf", cset)); + cmd->init(); + + cmd= new cl_help_cmd("help", 0, +"help [command] Help about command(s)", +"long help of help"); + cmdset->add(cmd); + cmd->init(); + cmd->add_name("?"); + + cmdset->add(cmd= new cl_quit_cmd("quit", 0, +"quit Quit", +"long help of quit")); + cmd->init(); + + cmdset->add(cmd= new cl_kill_cmd("kill", 0, +"kill Shutdown simulator", +"long help of kill")); + cmd->init(); + + cmdset->add(cmd= new cl_exec_cmd("exec", 0, +"exec file Execute commands from file", +"long help of exec")); + cmd->init(); + + cmdset->add(cmd= new cl_expression_cmd("expression", 0, +"expression expr Evaluate the expression", +"long help of expression ")); + cmd->init(); + cmd->add_name("let"); + + { + super_cmd= (class cl_super_cmd *)(cmdset->get_cmd("show")); + if (super_cmd) + cset= super_cmd->commands; + else { + cset= new cl_cmdset(); + cset->init(); + } + cset->add(cmd= new cl_show_copying_cmd("copying", 0, +"show copying Conditions for redistributing copies of uCsim", +"long help of show copying")); + cmd->init(); + cset->add(cmd= new cl_show_warranty_cmd("warranty", 0, +"show warranty Various kinds of warranty you do not have", +"long help of show warranty")); + cmd->init(); + cset->add(cmd= new cl_show_option_cmd("option", 0, +"show option [name] Show internal data of options", +"long help of show option")); + cmd->init(); + cset->add(cmd= new cl_show_error_cmd("error", 0, +"show error Show class of errors", +"long help of show error")); + cmd->init(); + } + if (!super_cmd) + { + cmdset->add(cmd= new cl_super_cmd("show", 0, +"show subcommand Generic command for showing things about the uCsim", +"long help of show", cset)); + cmd->init(); + } + + { + super_cmd= (class cl_super_cmd *)(cmdset->get_cmd("get")); + if (super_cmd) + cset= super_cmd->commands; + else { + cset= new cl_cmdset(); + cset->init(); + } + cset->add(cmd= new cl_get_option_cmd("option", 0, +"get option [name] Get value of an option", +"long help of get option")); + cmd->init(); + } + if (!super_cmd) + { + cmdset->add(cmd= new cl_super_cmd("get", 0, +"get subcommand Get, see `get' command for more help", +"long help of get", cset)); + cmd->init(); + } + + { + super_cmd= (class cl_super_cmd *)(cmdset->get_cmd("set")); + if (super_cmd) + cset= super_cmd->commands; + else { + cset= new cl_cmdset(); + cset->init(); + } + cset->add(cmd= new cl_set_option_cmd("option", 0, +"set option name|nr value\n" +" Set value of an option", +"long help of set option")); + cmd->init(); + cset->add(cmd= new cl_set_error_cmd("error", 0, +"set error error_name on|off|unset\n" +" Set value of an error", +"long help of set error")); + cmd->init(); + } + if (!super_cmd) + { + cmdset->add(cmd= new cl_super_cmd("set", 0, +"set subcommand Set, see `set' command for more help", +"long help of set", cset)); + cmd->init(); + } +} + +void +cl_app::mk_options(void) +{ + class cl_option *o; + + options->new_option(o= new cl_bool_option(this, "null_prompt", + "Use \\0 as prompt (-P)")); + o->init(); + + options->new_option(o= new cl_pointer_option(this, "serial_in_file", + "Input file for serial line (-s)")); + o->init(); + o->hide(); + + options->new_option(o= new cl_pointer_option(this, "serial_out_file", + "Output file for serial line (-s)")); + o->init(); + o->hide(); + + options->new_option(o= new cl_string_option(this, "prompt", + "String of prompt (-p)")); + o->init(); + + options->new_option(o= new cl_bool_option(this, "debug", + "Print debug messages (-V)")); + o->init(); + + options->new_option(o= new cl_string_option(this, "console_on", + "Open console on this file (-c)")); + o->init(); + o->hide(); + + options->new_option(o= new cl_string_option(this, "config_file", + "Execute this file at startup (-C)")); + o->init(); + o->hide(); + + options->new_option(o= new cl_float_option(this, "xtal", + "Frequency of XTAL in Hz")); + o->init(); + o->set_value(11059200.0); + + options->new_option(o= new cl_string_option(this, "cpu_type", + "Type of controller (-t)")); + o->init(); + o->hide(); +} + + +int +cl_app::dd_printf(const char *format, ...) +{ + va_list ap; + + if (!commander) + return(0); + + va_start(ap, format); + int i= commander->dd_printf(format, ap); + va_end(ap); + return(i); +} + +int +cl_app::debug(const char *format, ...) +{ + va_list ap; + + if (!commander) + return(0); + + va_start(ap, format); + int i= commander->debug(format, ap); + va_end(ap); + return(i); +} + + +/* End of app.cc */ diff --git a/sim/ucsim/appcl.h b/sim/ucsim/appcl.h new file mode 100644 index 0000000..a9a3ced --- /dev/null +++ b/sim/ucsim/appcl.h @@ -0,0 +1,126 @@ +/* + * Simulator of microcontrollers (appcl.h) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef APPCL_HEADER +#define APPCL_HEADER + +#include "ddconfig.h" + +// prj +#include "pobjcl.h" +#include "optioncl.h" + +// sim.src +#include "argcl.h" +#include "simcl.h" + + +/* Options */ + +#define OPT_GENERAL 0x0001 +#define OPT_SIM 0x0002 +#define OPT_UC 0x0004 +#define OPT_PRG_OPT (OPT_GENERAL|OPT_SIM|OPT_UC) +#define OPT_51 0x0010 +#define OPT_AVR 0x0020 +#define OPT_Z80 0x0040 +#define OPT_TARGET (OPT_51|OPT_AVR|OPT_Z80) + +/*class cl_option: public cl_base +{ +public: + int type; // See OPT_XXX + char short_name; + char *long_name; + class cl_ustrings *values; + +public: + cl_option(int atype, char sn, char *ln); + virtual ~cl_option(void); + + virtual int add_value(char *value); + virtual char *get_value(int index); +}; + +class cl_options: public cl_list +{ +public: + cl_options(void); +};*/ + + +/* Application */ + +class cl_app: public cl_base +{ +protected: + class cl_commander_base *commander; +public: + class cl_sim *sim; + class cl_ustrings *in_files; + //class cl_arguments *args; + class cl_options *options; + int going; + +public: + cl_app(void); + virtual ~cl_app(void); + +public: + virtual int init(int argc , char *argv[]); + virtual int run(void); + virtual void done(void); + +protected: + virtual int proc_arguments(int argc, char *argv[]); + +public: + class cl_sim *get_sim(void) { return(sim); } + class cl_uc *get_uc(void); + class cl_commander_base *get_commander(void) { return(commander); } + virtual class cl_cmd *get_cmd(class cl_cmdline *cmdline); + +public: // messages to broadcast + //virtual void mem_cell_changed(class cl_m *mem, t_addr addr); + +public: + virtual void set_simulator(class cl_sim *simulator); + virtual void remove_simulator(void); + +protected: + virtual void build_cmdset(class cl_cmdset *cs); + virtual void mk_options(void); + +public: // output functions + virtual int dd_printf(const char *format, ...); + virtual int debug(const char *format, ...); +}; + + +#endif + +/* End of appcl.h */ diff --git a/sim/ucsim/avr.src/(c).1 b/sim/ucsim/avr.src/(c).1 new file mode 100644 index 0000000..d673f9f --- /dev/null +++ b/sim/ucsim/avr.src/(c).1 @@ -0,0 +1,25 @@ +/* + * Simulator of microcontrollers (@@F@@) + * + * Copyright (C) @@S@@,@@Y@@ Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ diff --git a/sim/ucsim/avr.src/Makefile.in b/sim/ucsim/avr.src/Makefile.in new file mode 100644 index 0000000..c0bde32 --- /dev/null +++ b/sim/ucsim/avr.src/Makefile.in @@ -0,0 +1,153 @@ +# +# uCsim avr.src/Makefile +# +# (c) Drotos Daniel, Talker Bt. 1997 +# + +STARTYEAR = 1997 + +SHELL = /bin/sh +CXX = @CXX@ +CPP = @CPP@ +CXXCPP = @CXXCPP@ +RANLIB = @RANLIB@ +INSTALL = @INSTALL@ +STRIP = @STRIP@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +DEFS = $(subs -DHAVE_CONFIG_H,,@DEFS@) +CPPFLAGS = @CPPFLAGS@ -I$(srcdir) -I$(top_srcdir) -I$(top_builddir) \ + -I$(top_srcdir)/cmd.src -I$(top_srcdir)/sim.src \ + -I$(top_srcdir)/gui.src +CFLAGS = @CFLAGS@ -Wall +CXXFLAGS = @CXXFLAGS@ -Wall +LDFLAGS = @LDFLAGS@ +M_OR_MM = @M_OR_MM@ +PICOPT = @PICOPT@ +SHAREDLIB = @SHAREDLIB@ +EXEEXT = @EXEEXT@ + +LIBS = -L$(top_builddir) -lsim -lucsimutil -lguiucsim -lcmd -lsim @LIBS@ +DL = @DL@ +dl_ok = @dl_ok@ + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @infodir@ +srcdir = @srcdir@ +VPATH = @srcdir@ + +OBJECTS_SHARED = glob.o \ + simavr.o avr.o port.o \ + inst.o bit_inst.o jump_inst.o move_inst.o logic_inst.o \ + arith_inst.o +OBJECTS_EXE = savr.o +OBJECTS = $(OBJECTS_SHARED) $(OBJECTS_EXE) + +enable_dlso = @enable_dlso@ +dlso_ok = @dlso_ok@ + +AVRASM = tavrasm +TEST_OBJ = test_bit.hex test_dis.hex test_mov.hex test_jmp.hex \ + test_arith.hex test_call.hex + + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf otherlibs avr.src + + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: all installdirs + $(INSTALL) savr$(EXEEXT) $(DESTDIR)$(bindir)/savr$(EXEEXT) + $(STRIP) $(DESTDIR)$(bindir)/savr$(EXEEXT) + + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(DESTDIR)$(bindir)/savr + + +# Performing self-test +# -------------------- +check: $(TEST_OBJ) + +test: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + test -d $(DESTDIR)$(bindir) || $(INSTALL) -d $(DESTDIR)$(bindir) + + +# Creating dependencies +# --------------------- +dep: Makefile.dep + +Makefile.dep: $(srcdir)/*.cc $(srcdir)/*.h + $(CXXCPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.cc,$^) >Makefile.dep + +-include Makefile.dep +include $(srcdir)/clean.mk + +#parser.cc: parser.y + +#plex.cc: plex.l + +# My rules +# -------- +.SUFFIXES: .asm .hex + +avr.src: savr$(EXEEXT) shared_lib + +savr$(EXEEXT): $(OBJECTS) $(top_builddir)/*.a + $(CXX) $(CXXFLAGS) $(LDFLAGS) $(OBJECTS) $(LIBS) -o $@ + +ifeq ($(dlso_ok),yes) +shared_lib: $(top_builddir)/savr.so +else +shared_lib: + @$(top_srcdir)/mkecho $(top_builddir) "No AVR shared lib made." + @$(top_srcdir)/mkecho $(top_builddir) "(SHAREDLIB="$(SHAREDLIB)",dl_ok="$(dl_ok)",enable_dlso="$(enable_dlso)")" +endif + +$(top_builddir)/savr.so: $(OBJECTS_SHARED) + $(CXX) -shared $(LDFLAGS) $(OBJECTS_SHARED) -o $(top_builddir)/savr.so + +otherlibs: + $(MAKE) -C $(top_builddir)/cmd.src all + $(MAKE) -C $(top_builddir)/sim.src all + +.cc.o: + $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c $< -o $@ + +.asm.hex: + $(AVRASM) -l $< -o $@ -e $<.lst + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" freshconf;\ + fi + +# End of avr.src/Makefile.in diff --git a/sim/ucsim/avr.src/arith_cl.h b/sim/ucsim/avr.src/arith_cl.h new file mode 100644 index 0000000..8d43b88 --- /dev/null +++ b/sim/ucsim/avr.src/arith_cl.h @@ -0,0 +1,27 @@ +/* avr.src/arith_cl.h */ + + virtual int cpi_Rd_K(t_mem code); + virtual int sbci_Rd_K(t_mem code); + virtual int subi_Rd_K(t_mem code); + virtual int muls_Rd_Rr(t_mem code); + virtual int mulsu_Rd_Rr(t_mem code); + virtual int fmul_Rd_Rr(t_mem code); + virtual int fmuls_Rd_Rr(t_mem code); + virtual int fmulsu_Rd_Rr(t_mem code); + virtual int cpc_Rd_Rr(t_mem code); + virtual int sbc_Rd_Rr(t_mem code); + virtual int add_Rd_Rr(t_mem code); + virtual int cp_Rd_Rr(t_mem code); + virtual int sub_Rd_Rr(t_mem code); + virtual int adc_Rd_Rr(t_mem code); + virtual int com_Rd(t_mem code); + virtual int neg_Rd(t_mem code); + virtual int inc_Rd(t_mem code); + virtual int asr_Rd(t_mem code); + virtual int lsr_Rd(t_mem code); + virtual int ror_Rd(t_mem code); + virtual int dec_Rd(t_mem code); + virtual int mul_Rd_Rr(t_mem code); + virtual int adiw_Rdl_K(t_mem code); + virtual int sbiw_Rdl_K(t_mem code); +/* End of avr.src/arith_cl.h */ diff --git a/sim/ucsim/avr.src/arith_inst.cc b/sim/ucsim/avr.src/arith_inst.cc new file mode 100644 index 0000000..53f6626 --- /dev/null +++ b/sim/ucsim/avr.src/arith_inst.cc @@ -0,0 +1,956 @@ +/* + * Simulator of microcontrollers (arith_inst.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "avrcl.h" +#include "regsavr.h" + + +/* + * Compare with Immediate + * CPI Rd,K 16<=d<=31, 0<=K<=255 + * 0011 KKKK dddd KKKK + *____________________________________________________________________________ + */ + +int +cl_avr::cpi_Rd_K(t_mem code) +{ + t_addr d; + t_mem D, K, result, res; + + d= 16+((code&0xf0)>>4); + K= (code&0xf) | ((code&0xf00)>>8); + D= ram->read(d); + + if (K & 0x80) + K|= ~0xff; + if (D & 0x80) + D|= ~0xff; + t_mem sreg= ram->get(SREG); + result= (signed)D-(signed)K; + res= result & 0xff; + + sreg= sreg & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_C|BIT_Z); + if (0x08 & (((~D)&K) | (K&res) | (res&(~D)))) + sreg|= BIT_H; + int n= 0, v= 0; + if (0x80 & ((D&(~K)&(~res)) | ((~D)&K&res))) + { + sreg|= BIT_V; + v= 1; + } + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (!res) + sreg|= BIT_Z; + if (0x80 & (((~D)&K) | (K&res) | (res&(~D)))) + sreg|= BIT_C; + ram->set(SREG, sreg); + return(resGO); +} + + +/* + * Substract Immediate with Carry + * SBCI Rd,K 16<=d<=31, 0<=K<=255 + * 0100 KKKK dddd KKKK + *____________________________________________________________________________ + */ + +int +cl_avr::sbci_Rd_K(t_mem code) +{ + t_addr d; + t_mem D, K, result, res; + + d= 16+((code&0xf0)>>4); + K= (code&0xf) | ((code&0xf00)>>8); + D= ram->read(d); + + if (K & 0x80) + K|= ~0xff; + if (D & 0x80) + D|= ~0xff; + t_mem sreg= ram->get(SREG); + result= (signed)D-(signed)K-(sreg&BIT_C)?1:0; + res= result & 0xff; + ram->write(d, res); + + sreg= sreg & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_C); + if (0x08 & (((~D)&K) | (K&res) | (res&(~D)))) + sreg|= BIT_H; + int n= 0, v= 0; + if (0x80 & ((D&(~K)&(~res)) | ((~D)&K&res))) + { + sreg|= BIT_V; + v= 1; + } + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (res) + sreg&= ~BIT_Z; + if (0x80 & (((~D)&K) | (K&res) | (res&(~D)))) + sreg|= BIT_C; + ram->set(SREG, sreg); + return(resGO); +} + + +/* + * Substract Immediate + * SUBI Rd,K 16<=d<=31, 0<=K<=255 + * 0101 KKKK dddd KKKK + *____________________________________________________________________________ + */ + +int +cl_avr::subi_Rd_K(t_mem code) +{ + t_addr d; + t_mem D, K, result, res; + + d= 16+((code&0xf0)>>4); + K= (code&0xf) | ((code&0xf00)>>8); + D= ram->read(d); + + if (K & 0x80) + K|= ~0xff; + if (D & 0x80) + D|= ~0xff; + result= (signed)D-(signed)K; + res= result & 0xff; + ram->write(d, res); + + t_mem sreg= ram->get(SREG) & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C); + if (0x08 & (((~D)&K) | (K&res) | (res&(~D)))) + sreg|= BIT_H; + int n= 0, v= 0; + if (0x80 & ((D&(~K)&(~res)) | ((~D)&K&res))) + { + sreg|= BIT_V; + v= 1; + } + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (!res) + sreg|= BIT_Z; + if (0x80 & (((~D)&K) | (K&res) | (res&(~D)))) + sreg|= BIT_C; + ram->set(SREG, sreg); + return(resGO); +} + + +int +cl_avr::muls_Rd_Rr(t_mem code) +{ + return(resGO); +} + + +int +cl_avr::mulsu_Rd_Rr(t_mem code) +{ + return(resGO); +} + + +int +cl_avr::fmul_Rd_Rr(t_mem code) +{ + return(resGO); +} + + +int +cl_avr::fmuls_Rd_Rr(t_mem code) +{ + return(resGO); +} + + +int +cl_avr::fmulsu_Rd_Rr(t_mem code) +{ + return(resGO); +} + + +/* + * Compare with Carry + * CPC Rd,Rr 0<=d<=31, 0<=r<=31 + * 0000 01rd dddd rrrr + *____________________________________________________________________________ + */ + +int +cl_avr::cpc_Rd_Rr(t_mem code) +{ + t_addr r, d; + t_mem R, D, result, res; + + d= (code&0x1f0)>>4; + r= ((code&0x200)>>5)|(code&0xf); + R= ram->read(r); + D= ram->read(d); + if (R & 0x80) + R|= ~0xff; + if (D & 0x80) + D|= ~0xff; + t_mem sreg= ram->get(SREG); + result= (signed)D-(signed)R-(sreg&BIT_C)?1:0; + res= result & 0xff; + + sreg= sreg & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_C); + if (0x08 & (((~D)&R) | (R&res) | (res&(~D)))) + sreg|= BIT_H; + int n= 0, v= 0; + if (0x80 & ((D&(~R)&(~res)) | ((~D)&R&res))) + { + sreg|= BIT_V; + v= 1; + } + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (res) + sreg&= ~BIT_Z; + if (0x80 & (((~D)&R) | (R&res) | (res&(~D)))) + sreg|= BIT_C; + ram->set(SREG, sreg); + return(resGO); +} + + +/* + * Substract with Carry + * SBC Rd,Rr 0<=d<=31, 0<=r<=31 + * 0000 10rd dddd rrrr + *____________________________________________________________________________ + */ + +int +cl_avr::sbc_Rd_Rr(t_mem code) +{ + t_addr r, d; + t_mem R, D, result, res; + + d= (code&0x1f0)>>4; + r= ((code&0x200)>>5)|(code&0xf); + R= ram->read(r); + D= ram->read(d); + if (R & 0x80) + R|= ~0xff; + if (D & 0x80) + D|= ~0xff; + t_mem sreg= ram->get(SREG); + result= (signed)D-(signed)R-(sreg&BIT_C)?1:0; + res= result & 0xff; + ram->write(d, res); + + sreg= sreg & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_C); + if (0x08 & (((~D)&R) | (R&res) | (res&(~D)))) + sreg|= BIT_H; + int n= 0, v= 0; + if (0x80 & ((D&(~R)&(~res)) | ((~D)&R&res))) + { + sreg|= BIT_V; + v= 1; + } + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (res) + sreg&= ~BIT_Z; + if (0x80 & (((~D)&R) | (R&res) | (res&(~D)))) + sreg|= BIT_C; + ram->set(SREG, sreg); + return(resGO); +} + + +/* + * Add without Carry + * ADD Rd,Rr 0<=d<=31, 0<=r<=31 + * 0000 11rd dddd rrrr + *____________________________________________________________________________ + */ + +int +cl_avr::add_Rd_Rr(t_mem code) +{ + t_addr r, d; + t_mem R, D, result, res; + + d= (code&0x1f0)>>4; + r= ((code&0x200)>>5)|(code&0xf); + R= ram->read(r); + D= ram->read(d); + result= D+R; + res= result & 0xff; + ram->write(d, res); + + t_mem sreg= ram->get(SREG); + if (!res) + sreg|= BIT_Z; + else + sreg&= ~BIT_Z; + if (((D&R&~res)&0x80) || + ((~D&~R&res)&0x80)) + sreg|= (BIT_V|BIT_S); + else + sreg&= ~(BIT_V|BIT_S); + if (res & 0x80) + { + sreg|= BIT_N; + sreg^= BIT_S; + } + else + sreg&= ~BIT_N; + if (result & ~0xff) + sreg|= BIT_C; + else + sreg&= ~BIT_C; + if ((R&0xf) + (D&0xf) > 15) + sreg|= BIT_H; + else + sreg&= ~BIT_H; + ram->set(SREG, sreg); + + return(resGO); +} + + +/* + * Compare + * CP Rd,Rr 0<=d<=31, 0<=r<=31 + * 0001 01rd dddd rrrr + *____________________________________________________________________________ + */ + +int +cl_avr::cp_Rd_Rr(t_mem code) +{ + t_addr r, d; + t_mem R, D, result, res; + + d= (code&0x1f0)>>4; + r= ((code&0x200)>>5)|(code&0xf); + R= ram->read(r); + D= ram->read(d); + if (R & 0x80) + R|= ~0xff; + if (D & 0x80) + D|= ~0xff; + result= (signed)D-(signed)R; + res= result & 0xff; + + t_mem sreg= ram->get(SREG) & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C); + if (0x08 & (((~D)&R) | (R&res) | (res&(~D)))) + sreg|= BIT_H; + int n= 0, v= 0; + if (0x80 & ((D&(~R)&(~res)) | ((~D)&R&res))) + { + sreg|= BIT_V; + v= 1; + } + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (!res) + sreg|= BIT_Z; + if (0x80 & (((~D)&R) | (R&res) | (res&(~D)))) + sreg|= BIT_C; + ram->set(SREG, sreg); + return(resGO); +} + + +/* + * Substract without Carry + * SUB Rd,Rr 0<=d<=31, 0<=r<=31 + * 0001 10rd dddd rrrr + *____________________________________________________________________________ + */ + +int +cl_avr::sub_Rd_Rr(t_mem code) +{ + t_addr r, d; + t_mem R, D, result, res; + + d= (code&0x1f0)>>4; + r= ((code&0x200)>>5)|(code&0xf); + R= ram->read(r); + D= ram->read(d); + if (R & 0x80) + R|= ~0xff; + if (D & 0x80) + D|= ~0xff; + result= (signed)D-(signed)R; + res= result & 0xff; + ram->write(d, res); + + t_mem sreg= ram->get(SREG) & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C); + if (0x08 & (((~D)&R) | (R&res) | (res&(~D)))) + sreg|= BIT_H; + int n= 0, v= 0; + if (0x80 & ((D&(~R)&(~res)) | ((~D)&R&res))) + { + sreg|= BIT_V; + v= 1; + } + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (!res) + sreg|= BIT_Z; + if (0x80 & (((~D)&R) | (R&res) | (res&(~D)))) + sreg|= BIT_C; + ram->set(SREG, sreg); + return(resGO); +} + + +/* + * Add with Carry + * ADC Rd,Rr 0<=d<=31, 0<=r<=31 + * 0001 11rd dddd rrrr + *____________________________________________________________________________ + */ + +int +cl_avr::adc_Rd_Rr(t_mem code) +{ + t_addr r, d; + t_mem R, D, result, res; + + d= (code&0x1f0)>>4; + r= ((code&0x200)>>5)|(code&0xf); + R= ram->read(r); + D= ram->read(d); + t_mem sreg= ram->get(SREG); + result= D+R+((sreg&BIT_C)?1:0); + res= result & 0xff; + ram->write(d, res); + + if (!res) + sreg|= BIT_Z; + else + sreg&= ~BIT_Z; + if (((D&R&~res)&0x80) || + ((~D&~R&res)&0x80)) + sreg|= (BIT_V|BIT_S); + else + sreg&= ~(BIT_V|BIT_S); + if (res & 0x80) + { + sreg|= BIT_N; + sreg^= BIT_S; + } + else + sreg&= ~BIT_N; + if (result & ~0xff) + sreg|= BIT_C; + else + sreg&= ~BIT_C; + if ((R&0xf) + (D&0xf) > 15) + sreg|= BIT_H; + else + sreg&= ~BIT_H; + ram->set(SREG, sreg); + + return(resGO); +} + + +/* + * One's Complement + * COM Rd 0<=d<=31 + * 1001 010d dddd 0000 + *____________________________________________________________________________ + */ + +int +cl_avr::com_Rd(t_mem code) +{ + t_addr d; + t_mem D, result, res; + + d= (code&0x1f0)>>4; + D= ram->read(d); + result= ~D; + res= result & 0xff; + ram->write(d, res); + + t_mem sreg= ram->get(SREG); + if (!res) + sreg|= BIT_Z; + else + sreg&= ~BIT_Z; + sreg&= ~BIT_V; + if (res & 0x80) + sreg|= (BIT_N|BIT_S); + else + sreg&= ~(BIT_N|BIT_S); + sreg|= BIT_C; + ram->set(SREG, sreg); + + return(resGO); +} + + +/* + * Two's Complement + * NEG Rd 0<=d<=31 + * 1001 010d dddd 0001 + *____________________________________________________________________________ + */ + +int +cl_avr::neg_Rd(t_mem code) +{ + t_addr d; + t_mem D, result, res; + + d= (code&0x1f0)>>4; + D= ram->read(d); + result= (~D)+1; + res= result & 0xff; + ram->write(d, res); + + t_mem sreg= ram->get(SREG); + if (res & (~d) & 0x08) + sreg|= BIT_H; + else + sreg&= ~BIT_H; + if (res > 0x80) + sreg|= BIT_S; + else + sreg&= ~BIT_S; + if (!res) + { + sreg|= BIT_Z; + sreg&= ~BIT_C; + } + else + { + sreg&= ~BIT_Z; + sreg|= BIT_C; + } + if (res == 0x80) + sreg|= BIT_V; + else + sreg&= ~BIT_V; + if (res & 0x80) + sreg|= (BIT_N); + else + sreg&= ~BIT_N; + ram->set(SREG, sreg); + + return(resGO); +} + + +/* + * Increment + * INC Rd 0<=d<=31 + * 1001 010d dddd 0011 + *____________________________________________________________________________ + */ + +int +cl_avr::inc_Rd(t_mem code) +{ + t_addr d; + + d= (code&0x1f0)>>4; + t_mem data= ram->read(d)+1; + ram->write(d, data); + + t_mem sreg= ram->get(SREG); + data= data&0xff; + if (data & 0x80) + { + sreg|= (BIT_N); + if (data == 0x80) + { + sreg|= BIT_V; + sreg&= ~BIT_S; + } + else + { + sreg&= ~BIT_V; + sreg|= BIT_S; + } + sreg&= ~BIT_Z; + } + else + { + sreg&= ~(BIT_N|BIT_V|BIT_S); + if (!data) + sreg|= BIT_Z; + else + sreg&= ~BIT_Z; + } + ram->set(SREG, sreg); + return(resGO); +} + + +/* + * Arithmetic Shift Right + * ASR Rd 0<=d<=31 + * 1001 010d dddd 0101 + *____________________________________________________________________________ + */ + +int +cl_avr::asr_Rd(t_mem code) +{ + t_addr d; + t_mem D, result, res; + + d= (code&0x1f0)>>4; + D= ram->read(d); + t_mem sreg= ram->read(SREG) & ~(BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C); + int n=0, v= 0, c= 0; + if (D & 1) + { + sreg|= BIT_C; + c= 1; + } + result= D>>1; + if (result & 0x40) + result|= 0x80; + res= result & 0xff; + ram->write(d, res); + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ c) & 1) + { + sreg|= BIT_V; + v= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (!res) + sreg|= BIT_Z; + ram->write(SREG, sreg); + return(resGO); +} + + +/* + * Logical Shift Right + * LSR Rd 0<=d<=31 + * 1001 010d dddd 0110 + *____________________________________________________________________________ + */ + +int +cl_avr::lsr_Rd(t_mem code) +{ + t_addr d; + t_mem D, result, res; + + d= (code &0x1f0)>>4; + D= ram->read(d); + t_mem sreg= ram->read(SREG) & ~(BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C); + if (D & 1) + sreg|= (BIT_C|BIT_V|BIT_S); + result= D >> 1; + res= result & 0xff; + ram->write(d, res); + if (!res) + sreg|= BIT_Z; + ram->write(SREG, sreg); + return(resGO); +} + + +/* + * Rotate Right trough Carry + * ROR Rd 0<=d<=31 + * 1001 010d dddd 0111 + *____________________________________________________________________________ + */ + +int +cl_avr::ror_Rd(t_mem code) +{ + t_addr d; + t_mem D, result, res; + + d= (code&0x1f0)>>4; + D= ram->read(d); + t_mem sreg= ram->read(SREG); + int oldc= sreg & BIT_C; + sreg= sreg & ~(BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C); + int n= 0, v= 0, c= 0; + if (D & 1) + { + sreg|= BIT_C; + c= 1; + } + result= (D >> 1) | oldc?0x80:0; + res= result & 0xff; + ram->write(d, res); + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ c) & 1) + { + sreg|= BIT_V; + v= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (!res) + sreg|= BIT_Z; + ram->write(SREG, sreg); + return(resGO); +} + + +/* + * Decrement + * DEC Rd 0<=d<=31 + * 1001 010d dddd 1010 + *____________________________________________________________________________ + */ + +int +cl_avr::dec_Rd(t_mem code) +{ + t_addr d; + t_mem D, result, res; + + d= (code&0x1f0)>>4; + D= ram->read(d); + result= D-1; + res= result & 0xff; + ram->write(d, res); + + t_mem sreg= ram->get(SREG); + if (!res) + sreg|= BIT_Z; + else + sreg&= ~BIT_Z; + int n= 0, v= 0; + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + else + sreg&= ~BIT_N; + if (D == 0x80) + { + sreg|= BIT_V; + v= 1; + } + else + sreg&= ~BIT_V; + if ((n ^ v) & 1) + sreg|= BIT_S; + else + sreg&= ~BIT_S; + ram->set(SREG, sreg); + + return(resGO); +} + + +/* + * Multiply + * MUL Rd,Rr 0<=d<=31, 0<=r<=31 + * 1001 11rd dddd rrrr + *____________________________________________________________________________ + */ + +int +cl_avr::mul_Rd_Rr(t_mem code) +{ + t_addr d, r; + t_mem D, R, result, resl, resh; + + d= (code>>4) & 0x1f; + r= ((code&0x200)>>5) | (code&0xf); + D= ram->read(d); + R= ram->read(r); + result= R*D; + resl= result & 0xff; + resh= (result>>8) & 0xff; + ram->write(0, resl); + ram->write(1, resh); + t_mem sreg= ram->read(SREG) & ~BIT_C; + if (resh & 0x80) + sreg|= BIT_C; + ram->write(SREG, sreg); + tick(1); + return(resGO); +} + + +/* + * Add Immediate to Word + * ADIW Rdl,K dl={24,26,28,30}, 0<=K<=63 + * 1001 0110 KK dd KKKK + *____________________________________________________________________________ + */ + +int +cl_avr::adiw_Rdl_K(t_mem code) +{ + t_addr dl; + t_mem D, K, result, res; + + dl= 24+(2*((code&0x30)>>4)); + K= ((code&0xc0)>>2)|(code&0xf); + D= ram->read(dl+1)*256 + ram->read(dl); + result= D+K; + res= result & 0xffff; + t_mem resl= result&0xff, resh= (result>>8)&0xff; + ram->write(dl+1, resh); + ram->write(dl, resl); + + t_mem sreg= ram->get(SREG); + if (!res) + sreg|= BIT_Z; + else + sreg&= ~BIT_Z; + if (D&res&0x8000) + sreg|= (BIT_V|BIT_S); + else + sreg&= ~(BIT_V|BIT_S); + if (res & 0x8000) + { + sreg|= BIT_N; + sreg^= BIT_S; + } + else + sreg&= ~BIT_N; + if ((~res)&D&0x8000) + sreg|= BIT_C; + else + sreg&= ~BIT_C; + ram->set(SREG, sreg); + tick(1); + + return(resGO); +} + + +/* + * Substract Immediate from Word + * SBIW Rdl,K dl={24,26,28,30}, 0<=K<=63 + * 1001 0111 KK dd KKKK + *____________________________________________________________________________ + */ + +int +cl_avr::sbiw_Rdl_K(t_mem code) +{ + t_addr dl; + t_mem D, K, result, res; + + dl= 24+(2*((code&0x30)>>4)); + K= ((code&0xc0)>>2)|(code&0xf); + D= ram->read(dl+1)*256 + ram->read(dl); + if (K & 0x20) + K|= ~0x3f; + if (D & 0x8000) + D|= ~0xffff; + result= (signed)D-(signed)K; + res= result & 0xffff; + t_mem resl= res&0xff, resh= (res>>8)&0xff; + ram->write(dl+1, resh); + ram->write(dl, resl); + + t_mem sreg= ram->get(SREG) & ~(BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C); + int n= 0, v= 0; + if (0x8000 & D & (~res)) + { + sreg|= BIT_V; + v= 1; + } + if (res & 0x8000) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (!res) + sreg|= BIT_Z; + if (0x8000 & res & (~D)) + sreg|= BIT_C; + ram->set(SREG, sreg); + tick(1); + + return(resGO); +} + + +/* End of avr.src/arith_inst.cc */ diff --git a/sim/ucsim/avr.src/avr.cc b/sim/ucsim/avr.src/avr.cc new file mode 100644 index 0000000..3b021e5 --- /dev/null +++ b/sim/ucsim/avr.src/avr.cc @@ -0,0 +1,747 @@ +/* + * Simulator of microcontrollers (avr.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include +#include +#include "i_string.h" + +// prj +#include "pobjcl.h" + +// sim +#include "simcl.h" +#include "memcl.h" + +// local +#include "portcl.h" +#include "avrcl.h" +#include "glob.h" +#include "regsavr.h" + + +/* + * Base type of AVR microcontrollers + */ + +cl_avr::cl_avr(class cl_sim *asim): + cl_uc(asim) +{ + type= CPU_AVR; + sleep_executed= 0; +} + +int +cl_avr::init(void) +{ + cl_uc::init(); /* Memories now exist */ + ram= address_space(MEM_IRAM_ID); + rom= address_space(MEM_ROM_ID); + return(0); +} + +const char * +cl_avr::id_string(void) +{ + return("unspecified AVR"); +} + + +/* + * Making elements of the controller + */ +/* +t_addr +cl_avr::get_mem_size(enum mem_class type) +{ + switch(type) + { + case MEM_ROM: return(8*1024); + case MEM_IRAM: return(0x10000); + default: return(0); + } + //return(0); + //return(cl_uc::get_mem_size(type)); +} +*/ +/* +int +cl_avr::get_mem_width(enum mem_class type) +{ + if (type == MEM_ROM) + return(16); + return(cl_uc::get_mem_width(type)); +} +*/ + +void +cl_avr::mk_hw_elements(void) +{ + class cl_base *o; + /* t_uc::mk_hw() does nothing */ + hws->add(o= new cl_port(this)); + o->init(); +} + + +void +cl_avr::make_memories(void) +{ + class cl_address_space *as; + + rom= as= new cl_address_space(MEM_ROM_ID, 0, 0x10000, 16); + as->init(); + address_spaces->add(as); + ram= as= new cl_address_space(MEM_IRAM_ID, 0, 0x10000, 8); + as->init(); + address_spaces->add(as); + + class cl_address_decoder *ad; + class cl_memory_chip *chip; + + chip= new cl_memory_chip("rom_chip", 0x10000, 16); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= rom/*address_space(MEM_ROM_ID)*/, + chip, 0, 0xffff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + chip= new cl_memory_chip("iram_chip", 0x80, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= ram/*address_space(MEM_IRAM_ID)*/, + chip, 0, 0x7f, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); +} + + +/* + * Help command interpreter + */ + +struct dis_entry * +cl_avr::dis_tbl(void) +{ + return(disass_avr); +} + +struct name_entry * +cl_avr::sfr_tbl(void) +{ + return(sfr_tabl); +} + +struct name_entry * +cl_avr::bit_tbl(void) +{ + //FIXME + return(0); +} + +const char * +cl_avr::disass(t_addr addr, const char *sep) +{ + char work[256], temp[20]; + const char *b; + char *buf, *p, *t; + uint code, data= 0; + int i; + + p= work; + + code= get_mem(MEM_ROM_ID, addr); + i= 0; + while ((code & dis_tbl()[i].mask) != dis_tbl()[i].code && + dis_tbl()[i].mnemonic) + i++; + if (dis_tbl()[i].mnemonic == NULL) + { + buf= (char*)malloc(30); + strcpy(buf, "UNKNOWN/INVALID"); + return(buf); + } + b= dis_tbl()[i].mnemonic; + + while (*b) + { + if (*b == '%') + { + b++; + switch (*(b++)) + { + case 'd': // Rd .... ...d dddd .... 0<=d<=31 + if (!get_name(data= (code&0x01f0)>>4, sfr_tbl(), temp)) + sprintf(temp, "r%d", data); + break; + case 'D': // Rd .... .... dddd .... 16<=d<=31 + if (!get_name(data= 16+((code&0xf0)>>4), sfr_tbl(), temp)) + sprintf(temp, "r%d", data); + break; + case 'K': // K .... KKKK .... KKKK 0<=K<=255 + sprintf(temp, "%d", ((code&0xf00)>>4)|(code&0xf)); + break; + case 'r': // Rr .... ..r. .... rrrr 0<=r<=31 + if (!get_name(data= ((code&0x0200)>>5)|(code&0x000f), + sfr_tbl(), temp)) + sprintf(temp, "r%d", data); + break; + case '2': // Rdl .... .... ..dd .... dl= {24,26,28,30} + if (!get_name(data= 24+(2*((code&0x0030)>>4)), + sfr_tbl(), temp)) + sprintf(temp, "r%d", data); + break; + case '6': // K .... .... KK.. KKKK 0<=K<=63 + sprintf(temp, "%d", ((code&0xc0)>>2)|(code&0xf)); + break; + case 's': // s .... .... .sss .... 0<=s<=7 + sprintf(temp, "%d", (code&0x70)>>4); + break; + case 'b': // b .... .... .... .bbb 0<=b<=7 + sprintf(temp, "%d", code&0x7); + break; + case 'k': // k .... ..kk kkkk k... -64<=k<=+63 + { + int k= (code&0x3f8)>>3; + if (code&0x200) + k|= -128; + sprintf(temp, "0x%06x", k+1+(signed int)addr); + break; + } + case 'A': // k .... ...k kkkk ...k 0<=k<=64K + // kkkk kkkk kkkk kkkk 0<=k<=4M + sprintf(temp, "0x%06x", + (((code&0x1f0)>>3)|(code&1))*0x10000+ + (uint)get_mem(MEM_ROM_ID, addr+1)); + break; + case 'P': // P .... .... pppp p... 0<=P<=31 + data= (code&0xf8)>>3; + if (!get_name(data+0x20, sfr_tbl(), temp)) + sprintf(temp, "%d", data); + break; + case 'p': // P .... .PP. .... PPPP 0<=P<=63 + data= ((code&0x600)>>5)|(code&0xf); + if (!get_name(data+0x20, sfr_tbl(), temp)) + sprintf(temp, "%d", data); + break; + case 'q': // q ..q. qq.. .... .qqq 0<=q<=63 + sprintf(temp, "%d", + ((code&0x2000)>>8)|((code&0xc00)>>7)|(code&7)); + break; + case 'R': // k SRAM address on second word 0<=k<=65535 + sprintf(temp, "0x%06x", (uint)get_mem(MEM_ROM_ID, addr+1)); + break; + case 'a': // k .... kkkk kkkk kkkk -2k<=k<=2k + { + int k= code&0xfff; + if (code&0x800) + k|= -4096; + sprintf(temp, "0x%06"_A_"x", + rom->validate_address(k+1+(signed int)addr)); + break; + } + default: + strcpy(temp, "?"); + break; + } + t= temp; + while (*t) + *(p++)= *(t++); + } + else + *(p++)= *(b++); + } + *p= '\0'; + + p= strchr(work, ' '); + if (!p) + { + buf= strdup(work); + return(buf); + } + if (sep == NULL) + buf= (char *)malloc(6+strlen(p)+1); + else + buf= (char *)malloc((p-work)+strlen(sep)+strlen(p)+1); + for (p= work, t= buf; *p != ' '; p++, t++) + *t= *p; + p++; + *t= '\0'; + if (sep == NULL) + { + while (strlen(buf) < 6) + strcat(buf, " "); + } + else + strcat(buf, sep); + strcat(buf, p); + return(buf); +} + + +void +cl_avr::print_regs(class cl_console_base *con) +{ + uchar data, sreg= ram->get(SREG); + uint x, y, z; + + ram->dump(0, 31, 16, con); + + con->dd_printf("ITHSVNZC SREG= 0x%02x %3d %c\n", + sreg, sreg, isprint(sreg)?sreg:'.'); + con->dd_printf("%c%c%c%c%c%c%c%c ", + (sreg&BIT_I)?'1':'0', + (sreg&BIT_T)?'1':'0', + (sreg&BIT_H)?'1':'0', + (sreg&BIT_S)?'1':'0', + (sreg&BIT_V)?'1':'0', + (sreg&BIT_N)?'1':'0', + (sreg&BIT_Z)?'1':'0', + (sreg&BIT_C)?'1':'0'); + con->dd_printf("SP = 0x%06x\n", ram->get(SPH)*256+ram->get(SPL)); + + x= ram->get(XH)*256 + ram->get(XL); + data= ram->get(x); + con->dd_printf("X= 0x%04x [X]= 0x%02x %3d %c ", x, + data, data, isprint(data)?data:'.'); + y= ram->get(YH)*256 + ram->get(YL); + data= ram->get(y); + con->dd_printf("Y= 0x%04x [Y]= 0x%02x %3d %c ", y, + data, data, isprint(data)?data:'.'); + z= ram->get(ZH)*256 + ram->get(ZL); + data= ram->get(z); + con->dd_printf("Z= 0x%04x [Z]= 0x%02x %3d %c\n", z, + data, data, isprint(data)?data:'.'); + + print_disass(PC, con); +} + + +/* + * Execution + */ + +int +cl_avr::exec_inst(void) +{ + t_mem code; + + instPC= PC; + if (fetch(&code)) + return(resBREAKPOINT); + tick(1); + switch (code) + { + case 0x9419: + return(eijmp(code)); + case 0x9519: + return(eicall(code)); + case 0x9508: case 0x9528: case 0x9548: case 0x9568: + return(ret(code)); + case 0x9518: case 0x9538: case 0x9558: case 0x9578: + return(reti(code)); + case 0x95c8: + return(lpm(code)); + case 0x95d8: + return(elpm(code)); // in some devices equal to lpm + case 0x95e8: + return(spm(code)); + case 0x95f8: + return(espm(code)); + case 0x9408: + return(sec(code)); + case 0x9488: + return(clc(code)); + case 0x9428: + return(sen(code)); + case 0x94a8: + return(cln(code)); + case 0x9418: + return(sez(code)); + case 0x9498: + return(clz(code)); + case 0x9478: + return(sei(code)); + case 0x94f8: + return(cli(code)); + case 0x9448: + return(ses(code)); + case 0x94c8: + return(cls(code)); + case 0x9438: + return(sev(code)); + case 0x94b8: + return(clv(code)); + case 0x9468: + return(set(code)); + case 0x94e8: + return(clt(code)); + case 0x9458: + return(seh(code)); + case 0x94d8: + return(clh(code)); + case 0x0000: + return(nop(code)); + case 0x9588: case 0x9598: + return(sleep(code)); + case 0x95a8: case 0x95b8: + return(wdr(code)); + } + switch (code & 0xf000) + { + case 0x3000: return(cpi_Rd_K(code)); + case 0x4000: return(sbci_Rd_K(code)); + case 0x5000: return(subi_Rd_K(code)); + case 0x6000: return(ori_Rd_K(code)); + case 0x7000: return(andi_Rd_K(code)); + case 0xc000: return(rjmp_k(code)); + case 0xd000: return(rcall_k(code)); + case 0xe000: return(ldi_Rd_K(code)); + } + switch (code & 0xf000) + { + case 0x0000: + { + // 0x0... + switch (code & 0xfc00) + { + case 0x0000: + { + switch (code & 0xff00) + { + case 0x0100: return(movw_Rd_Rr(code)); + case 0x0200: return(muls_Rd_Rr(code)); + case 0x0300: + { + switch (code & 0xff88) + { + case 0x0300: return(mulsu_Rd_Rr(code)); + case 0x0308: return(fmul_Rd_Rr(code)); + case 0x0380: return(fmuls_Rd_Rr(code)); + case 0x0388: return(fmulsu_Rd_Rr(code)); + } + break; + } + break; + } + break; + } + case 0x0400: return(cpc_Rd_Rr(code)); + case 0x0800: return(sbc_Rd_Rr(code)); + case 0x0c00: return(add_Rd_Rr(code)); + } + break; + } + case 0x1000: + { + // 0x1... + switch (code & 0xfc00) + { + case 0x1000: return(cpse_Rd_Rr(code)); + case 0x1400: return(cp_Rd_Rr(code)); + case 0x1800: return(sub_Rd_Rr(code)); + case 0x1c00: return(adc_Rd_Rr(code)); + } + break; + } + case 0x2000: + { + // 0x2... + switch (code & 0xfc00) + { + case 0x2000: return(and_Rd_Rr(code)); + case 0x2400: return(eor_Rd_Rr(code)); + case 0x2800: return(or_Rd_Rr(code)); + case 0x2c00: return(mov_Rd_Rr(code)); + } + break; + } + case 0x8000: + { + // 0x8... + switch (code &0xf208) + { + case 0x8000: return(ldd_Rd_Z_q(code)); + case 0x8008: return(ldd_Rd_Y_q(code)); + case 0x8200: return(std_Z_q_Rr(code)); + case 0x8208: return(std_Y_q_Rr(code)); + } + break; + } + case 0x9000: + { + // 0x9... + if ((code & 0xff0f) == 0x9509) + return(icall(code)); + if ((code & 0xff0f) == 0x9409) + return(ijmp(code)); + if ((code & 0xff00) == 0x9600) + return(adiw_Rdl_K(code)); + if ((code & 0xff00) == 0x9700) + return(sbiw_Rdl_K(code)); + switch (code & 0xfc00) + { + case 0x9000: + { + switch (code & 0xfe0f) + { + case 0x9000: return(lds_Rd_k(code)); + case 0x9001: return(ld_Rd_ZS(code)); + case 0x9002: return(ld_Rd_SZ(code)); + case 0x9004: return(lpm_Rd_Z(code)); + case 0x9005: return(lpm_Rd_ZS(code)); + case 0x9006: return(elpm_Rd_Z(code)); + case 0x9007: return(elpm_Rd_ZS(code)); + case 0x9009: return(ld_Rd_YS(code)); + case 0x900a: return(ld_Rd_SY(code)); + case 0x900c: return(ld_Rd_X(code)); + case 0x900d: return(ld_Rd_XS(code)); + case 0x900e: return(ld_Rd_SX(code)); + case 0x900f: return(pop_Rd(code)); + case 0x9200: return(sts_k_Rr(code)); + case 0x9201: return(st_ZS_Rr(code)); + case 0x9202: return(st_SZ_Rr(code)); + case 0x9209: return(st_YS_Rr(code)); + case 0x920a: return(st_SY_Rr(code)); + case 0x920c: return(st_X_Rr(code)); + case 0x920d: return(st_XS_Rr(code)); + case 0x920e: return(st_SX_Rr(code)); + case 0x920f: return(push_Rr(code)); + } + break; + } + case 0x9400: + { + switch (code & 0xfe0f) + { + case 0x9400: return(com_Rd(code)); + case 0x9401: return(neg_Rd(code)); + case 0x9402: return(swap_Rd(code)); + case 0x9403: return(inc_Rd(code)); + case 0x9405: return(asr_Rd(code)); + case 0x9406: return(lsr_Rd(code)); + case 0x9407: return(ror_Rd(code)); + case 0x940a: return(dec_Rd(code)); + case 0x940c: case 0x940d: return(jmp_k(code)); + case 0x940e: case 0x940f: return(call_k(code)); + } + break; + } + case 0x9800: + { + switch (code & 0xff00) + { + case 0x9800: return(cbi_A_b(code)); + case 0x9900: return(sbic_P_b(code)); + case 0x9a00: return(sbi_A_b(code)); + case 0x9b00: return(sbis_P_b(code)); + } + break; + } + case 0x9c00: return(mul_Rd_Rr(code)); + } + break; + } + case 0xa000: + { + // 0xa... + switch (code &0xf208) + { + case 0xa000: return(ldd_Rd_Z_q(code)); + case 0xa008: return(ldd_Rd_Y_q(code)); + case 0xa200: return(std_Z_q_Rr(code)); + case 0xa208: return(std_Y_q_Rr(code)); + } + break; + } + case 0xb000: + { + // 0xb... + switch (code & 0xf800) + { + case 0xb000: return(in_Rd_A(code)); + case 0xb800: return(out_A_Rr(code)); + } + break; + } + case 0xe000: + { + // 0xe... + switch (code & 0xff0f) + { + case 0xef0f: return(ser_Rd(code)); + } + break; + } + case 0xf000: + { + // 0xf... + switch (code & 0xfc00) + { + case 0xf000: return(brbs_s_k(code)); + case 0xf400: return(brbc_s_k(code)); + case 0xf800: case 0xfc00: + { + switch (code & 0xfe08) + { + case 0xf800: return(bld_Rd_b(code)); + case 0xfa00: return(bst_Rd_b(code)); + case 0xfc00: case 0xfc08: return(sbrc_Rr_b(code)); + case 0xfe00: case 0xfe08: return(sbrs_Rr_b(code)); + } + break; + } + } + break; + } + } + /*if (PC) + PC--; + else + PC= get_mem_size(MEM_ROM_ID)-1;*/ + class cl_error_unknown_code *e= new cl_error_unknown_code(this); + error(e); + return(resGO); + PC= rom->inc_address(PC, -1); + //tick(-clock_per_cycle()); + sim->stop(resINV_INST); + return(resINV_INST); +} + + +/* + */ + +int +cl_avr::push_data(t_mem data) +{ + t_addr sp; + t_mem spl, sph; + + spl= ram->read(SPL); + sph= ram->read(SPH); + sp= 0xffff & (256*sph + spl); + data= ram->write(sp, data); + sp= 0xffff & (sp-1); + spl= sp & 0xff; + sph= (sp>>8) & 0xff; + ram->write(SPL, spl); + ram->write(SPH, sph); + return(resGO); +} + +int +cl_avr::push_addr(t_addr addr) +{ + t_addr sp; + t_mem spl, sph, al, ah; + + spl= ram->read(SPL); + sph= ram->read(SPH); + sp= 0xffff & (256*sph + spl); + al= addr & 0xff; + ah= (addr>>8) & 0xff; + ram->write(sp, ah); + sp= 0xffff & (sp-1); + ram->write(sp, al); + sp= 0xffff & (sp-1); + spl= sp & 0xff; + sph= (sp>>8) & 0xff; + ram->write(SPL, spl); + ram->write(SPH, sph); + return(resGO); +} + +int +cl_avr::pop_data(t_mem *data) +{ + t_addr sp; + t_mem spl, sph; + + spl= ram->read(SPL); + sph= ram->read(SPH); + sp= 256*sph + spl; + sp= 0xffff & (sp+1); + *data= ram->read(sp); + spl= sp & 0xff; + sph= (sp>>8) & 0xff; + ram->write(SPL, spl); + ram->write(SPH, sph); + + return(resGO); +} + +int +cl_avr::pop_addr(t_addr *addr) +{ + t_addr sp; + t_mem spl, sph, al, ah; + + spl= ram->read(SPL); + sph= ram->read(SPH); + sp= 256*sph + spl; + sp= 0xffff & (sp+1); + al= ram->read(sp); + sp= 0xffff & (sp+1); + ah= ram->read(sp); + *addr= ah*256 + al; + spl= sp & 0xff; + sph= (sp>>8) & 0xff; + ram->write(SPL, spl); + ram->write(SPH, sph); + + return(resGO); +} + + +/* + * Set Z, N, V, S bits of SREG after logic instructions and some others + */ + +void +cl_avr::set_zn0s(t_mem data) +{ + t_mem sreg= ram->get(SREG) & ~BIT_V; + data= data&0xff; + if (!data) + sreg|= BIT_Z; + else + sreg&= ~BIT_Z; + if (data & 0x80) + sreg|= (BIT_N|BIT_S); + else + sreg&= ~(BIT_N|BIT_S); + ram->set(SREG, sreg); +} + + +/* End of avr.src/avr.cc */ diff --git a/sim/ucsim/avr.src/avrcl.h b/sim/ucsim/avr.src/avrcl.h new file mode 100644 index 0000000..e692640 --- /dev/null +++ b/sim/ucsim/avr.src/avrcl.h @@ -0,0 +1,81 @@ +/* + * Simulator of microcontrollers (avrcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef AVRCL_HEADER +#define AVRCL_HEADER + +// sim.src +#include "uccl.h" +#include "memcl.h" + + +/* + * Base type of AVR microcontrollers + */ + +class cl_avr: public cl_uc +{ +public: + class cl_address_space *ram; + class cl_address_space *rom; + int sleep_executed; +public: + cl_avr(class cl_sim *asim); + virtual int init(void); + virtual const char *id_string(void); + + //virtual t_addr get_mem_size(enum mem_class type); + //virtual int get_mem_width(enum mem_class type); + virtual void mk_hw_elements(void); + virtual void make_memories(void); + + virtual struct dis_entry *dis_tbl(void); + virtual struct name_entry *sfr_tbl(void); + virtual struct name_entry *bit_tbl(void); + virtual const char *disass(t_addr addr, const char *sep); + virtual void print_regs(class cl_console_base *con); + + virtual int exec_inst(void); + + virtual int push_data(t_mem data); + virtual int push_addr(t_addr addr); + virtual int pop_data(t_mem *data); + virtual int pop_addr(t_addr *addr); + + void set_zn0s(t_mem data); +#include "arith_cl.h" +#include "logic_cl.h" +#include "move_cl.h" +#include "bit_cl.h" +#include "jump_cl.h" +#include "instcl.h" +}; + + +#endif + +/* End of avr.src/avrcl.h */ diff --git a/sim/ucsim/avr.src/bit_cl.h b/sim/ucsim/avr.src/bit_cl.h new file mode 100644 index 0000000..65ab343 --- /dev/null +++ b/sim/ucsim/avr.src/bit_cl.h @@ -0,0 +1,24 @@ +/* avr.src/bit_cl.h */ + + virtual int sec(t_mem code); + virtual int clc(t_mem code); + virtual int sen(t_mem code); + virtual int cln(t_mem code); + virtual int sez(t_mem code); + virtual int clz(t_mem code); + virtual int sei(t_mem code); + virtual int cli(t_mem code); + virtual int ses(t_mem code); + virtual int cls(t_mem code); + virtual int sev(t_mem code); + virtual int clv(t_mem code); + virtual int set(t_mem code); + virtual int clt(t_mem code); + virtual int seh(t_mem code); + virtual int clh(t_mem code); + virtual int cbi_A_b(t_mem code); + virtual int sbi_A_b(t_mem code); + virtual int bld_Rd_b(t_mem code); + virtual int bst_Rd_b(t_mem code); + +/* End of avr.src/bit_cl.h */ diff --git a/sim/ucsim/avr.src/bit_inst.cc b/sim/ucsim/avr.src/bit_inst.cc new file mode 100644 index 0000000..0699837 --- /dev/null +++ b/sim/ucsim/avr.src/bit_inst.cc @@ -0,0 +1,383 @@ +/* + * Simulator of microcontrollers (bit_inst.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +// local +#include "avrcl.h" +#include "regsavr.h" + + +/* + * Set Carry Flag + * SEC + * 1001 0100 0000 1000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::sec(t_mem code) +{ + t_mem d= BIT_C | ram->read(SREG); + ram->write(SREG, d); + return(resGO); +} + + +/* + * Set Negative Flag + * SEN + * 1001 0100 0010 1000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::sen(t_mem code) +{ + t_mem d= BIT_N | ram->read(SREG); + ram->write(SREG, d); + return(resGO); +} + + +/* + * Set Zero Flag + * SEZ + * 1001 0100 0001 1000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::sez(t_mem code) +{ + t_mem d= BIT_Z | ram->read(SREG); + ram->write(SREG, d); + return(resGO); +} + + +/* + * Set Global Interrupt Flag + * SEI + * 1001 0100 0111 1000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::sei(t_mem code) +{ + t_mem d= BIT_I | ram->read(SREG); + ram->write(SREG, d); + return(resGO); +} + + +/* + * Set Signed Flag + * SES + * 1001 0100 0100 1000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::ses(t_mem code) +{ + t_mem d= BIT_S | ram->read(SREG); + ram->write(SREG, d); + return(resGO); +} + + +/* + * Set Overflow Flag + * SEV + * 1001 0100 0011 1000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::sev(t_mem code) +{ + t_mem d= BIT_V | ram->read(SREG); + ram->write(SREG, d); + return(resGO); +} + + +/* + * Set T Flag + * SET + * 1001 0100 0110 1000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::set(t_mem code) +{ + t_mem d= BIT_T | ram->read(SREG); + ram->write(SREG, d); + return(resGO); +} + + +/* + * Set Half Carry Flag + * SEH + * 1001 0100 0101 1000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::seh(t_mem code) +{ + t_mem d= BIT_H | ram->read(SREG); + ram->write(SREG, d); + return(resGO); +} + + +/* + * Clear Carry Flag + * CLC + * 1001 0100 1000 1000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::clc(t_mem code) +{ + t_mem d= ~BIT_C & ram->read(SREG); + ram->write(SREG, d); + return(resGO); +} + + +/* + * Clear Negative Flag + * CLN + * 1001 0100 1010 1000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::cln(t_mem code) +{ + t_mem d= ~BIT_N & ram->read(SREG); + ram->write(SREG, d); + return(resGO); +} + + +/* + * Clear Zero Flag + * CLZ + * 1001 0100 1001 1000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::clz(t_mem code) +{ + t_mem d= ~BIT_Z & ram->read(SREG); + ram->write(SREG, d); + return(resGO); +} + + +/* + * Global Interrupt Flag + * CLI + * 1001 0100 1111 1000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::cli(t_mem code) +{ + t_mem d= ~BIT_I & ram->read(SREG); + ram->write(SREG, d); + return(resGO); +} + + +/* + * Clear Signed Flag + * CLS + * 1001 0100 1100 1000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::cls(t_mem code) +{ + t_mem d= ~BIT_S & ram->read(SREG); + ram->write(SREG, d); + return(resGO); +} + + +/* + * Clear Overflow Flag + * CLV + * 1001 0100 1011 1000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::clv(t_mem code) +{ + t_mem d= ~BIT_V & ram->read(SREG); + ram->write(SREG, d); + return(resGO); +} + + +/* + * Clear T Flag + * CLT + * 1001 0100 1110 1000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::clt(t_mem code) +{ + t_mem d= ~BIT_T & ram->read(SREG); + ram->write(SREG, d); + return(resGO); +} + + +/* + * Clear Half Carry Flag + * CLH + * 1001 0100 1101 1000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::clh(t_mem code) +{ + t_mem d= ~BIT_H & ram->read(SREG); + ram->write(SREG, d); + return(resGO); +} + + +/* + * Clear Bit in I/O Register + * CBI P,b 0<=P<=31 0<=b<=7 + * 1001 1000 pppp pbbb + *____________________________________________________________________________ + */ + +int +cl_avr::cbi_A_b(t_mem code) +{ + uint addr, mask; + t_mem d; + + addr= ((code&0xf8)>>3)+0x20; + mask= 1 << (code&7); + d= ~mask & ram->read(addr); + ram->write(addr, d); + tick(1); + return(resGO); +} + + +/* + * Set Bit in I/O Register + * SBI P,b 0<=P<=31 0<=b<=7 + * 1001 1010 pppp pbbb + *____________________________________________________________________________ + */ + +int +cl_avr::sbi_A_b(t_mem code) +{ + uint addr, mask; + + addr= ((code&0xf8)>>3)+0x20; + mask= 1 << (code&7); + t_mem d= mask | ram->read(addr); + ram->write(addr, d); + tick(1); + return(resGO); +} + + +/* + * Bit Load from the T Flag in SREG to a Bit in Register + * BLD Rd,b 0<=d<=31, 0<=b<=7 + * 1111 100d dddd 0bbb + *____________________________________________________________________________ + */ + +int +cl_avr::bld_Rd_b(t_mem code) +{ + t_addr d; + int b, mask; + t_mem data; + + d= (code&0x1f0)>>4; + b= code&7; + mask= 1<read(SREG) & BIT_T) + data= ram->read(d) | mask; + else + data= ram->read(d) & ~mask; + ram->write(d, data); + return(resGO); +} + + +/* + * Bit Store from Bit in Register to T Flag in SREG + * BST Rd,b 0<=d<=31, 0<=b<=7 + * 1111 101d dddd Xbbb + *____________________________________________________________________________ + */ + +int +cl_avr::bst_Rd_b(t_mem code) +{ + t_addr d; + int b, mask; + + d= (code&0x1f0)>>4; + b= code&7; + mask= 1<read(d); + if (data & mask) + ram->set_bit1(SREG, BIT_T); + else + ram->set_bit0(SREG, BIT_T); + return(resGO); +} + + +/* End of avr.src/bit_inst.cc */ diff --git a/sim/ucsim/avr.src/clean.mk b/sim/ucsim/avr.src/clean.mk new file mode 100644 index 0000000..e81b3cc --- /dev/null +++ b/sim/ucsim/avr.src/clean.mk @@ -0,0 +1,29 @@ +# avr.src/clean.mk + +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] *.map + rm -f .[a-z]*~ + rm -f savr$(EXEEXT) + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f config.cache config.log config.status + rm -f Makefile *.dep + rm -f *.obj *.list *.lst *.hex + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean + +# End of avr.src/clean.mk diff --git a/sim/ucsim/avr.src/conf.mk b/sim/ucsim/avr.src/conf.mk new file mode 100644 index 0000000..d61802a --- /dev/null +++ b/sim/ucsim/avr.src/conf.mk @@ -0,0 +1,11 @@ +# avr.src/conf.mk +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_builddir) && $(SHELL) ./config.status + +# End of avr.src/conf.mk diff --git a/sim/ucsim/avr.src/glob.cc b/sim/ucsim/avr.src/glob.cc new file mode 100644 index 0000000..561275d --- /dev/null +++ b/sim/ucsim/avr.src/glob.cc @@ -0,0 +1,221 @@ +/* + * Simulator of microcontrollers (glob.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include + +#include "stypes.h" + + +struct dis_entry disass_avr[]= { + { 0x0000, 0xffff, ' ', 1, "nop" }, + { 0x9488, 0xffff, ' ', 1, "clc" }, + { 0x94d8, 0xffff, ' ', 1, "clh" }, + { 0x94f8, 0xffff, ' ', 1, "cli" }, + { 0x94a8, 0xffff, ' ', 1, "cln" }, + { 0x94c8, 0xffff, ' ', 1, "cls" }, + { 0x94e8, 0xffff, ' ', 1, "clt" }, + { 0x94b8, 0xffff, ' ', 1, "clv" }, + { 0x9498, 0xffff, ' ', 1, "clz" }, + { 0x9408, 0xffff, ' ', 1, "sec" }, + { 0x9458, 0xffff, ' ', 1, "seh" }, + { 0x9478, 0xffff, ' ', 1, "sei" }, + { 0x9428, 0xffff, ' ', 1, "sen" }, + { 0x9448, 0xffff, ' ', 1, "ses" }, + { 0x9468, 0xffff, ' ', 1, "set" }, + { 0x9438, 0xffff, ' ', 1, "sev" }, + { 0x9418, 0xffff, ' ', 1, "sez" }, + { 0x1c00, 0xfc00, ' ', 1, "adc %d,%r" }, + { 0x0c00, 0xfc00, ' ', 1, "add %d,%r" }, + { 0x9600, 0xff00, ' ', 1, "adiw %2,%6" }, + { 0x2000, 0xfc00, ' ', 1, "and %d,%r" }, + { 0x7000, 0xf000, ' ', 1, "andi %D,%K" }, + { 0x9405, 0xfe0f, ' ', 1, "asr %d" }, + { 0x9488, 0xff8f, ' ', 1, "bclr %s" }, + { 0xf800, 0xfe08, ' ', 1, "bld %d,%b" }, + { 0xf400, 0xfc07, ' ', 1, "brcc %k" }, + { 0xf000, 0xfc07, ' ', 1, "brcs %k" }, + { 0xf001, 0xfc07, ' ', 1, "breq %k" }, + { 0xf404, 0xfc07, ' ', 1, "brge %k" }, + { 0xf405, 0xfc07, ' ', 1, "brhc %k" }, + { 0xf005, 0xfc07, ' ', 1, "brhs %k" }, + { 0xf407, 0xfc07, ' ', 1, "brid %k" }, + { 0xf007, 0xfc07, ' ', 1, "brie %k" }, + { 0xf000, 0xfc07, ' ', 1, "brlo %k" }, + { 0xf004, 0xfc07, ' ', 1, "brlt %k" }, + { 0xf002, 0xfc07, ' ', 1, "brmi %k" }, + { 0xf401, 0xfc07, ' ', 1, "brne %k" }, + { 0xf402, 0xfc07, ' ', 1, "brpl %k" }, + { 0xf400, 0xfc07, ' ', 1, "brsh %k" }, + { 0xf406, 0xfc07, ' ', 1, "brtc %k" }, + { 0xf006, 0xfc07, ' ', 1, "brts %k" }, + { 0xf403, 0xfc07, ' ', 1, "brvc %k" }, + { 0xf003, 0xfc07, ' ', 1, "brvs %k" }, + { 0xf400, 0xfc00, ' ', 1, "brbc %b,%k" }, + { 0xf000, 0xfc00, ' ', 1, "brbs %b,%k" }, + { 0x9408, 0xff8f, ' ', 1, "bset %s" }, + { 0xfa00, 0xfe00, ' ', 1, "bst %d,%b" }, + { 0x940e, 0xfe0e, 'l', 2, "call %A" }, + { 0x9800, 0xff00, ' ', 1, "cbi %P,%b" }, + { 0x9400, 0xfe0f, ' ', 1, "com %d" }, + { 0x1400, 0xfc00, ' ', 1, "cp %d,%r" }, + { 0x0400, 0xfc00, ' ', 1, "cpc %d,%r" }, + { 0x3000, 0xf000, ' ', 1, "cpi %D,%K" }, + { 0x1000, 0xfc00, ' ', 1, "cpse %d,%r" }, + { 0x940a, 0xfe0f, ' ', 1, "dec %d" }, + { 0x2400, 0xfc00, ' ', 1, "eor %d,%r" }, + { 0x9509, 0xff0f, ' ', 1, "icall" }, + { 0x9409, 0xff0f, ' ', 1, "ijmp" }, + { 0xb000, 0xf800, ' ', 1, "in %d,%p" }, + { 0x9403, 0xfe0f, ' ', 1, "inc %d" }, + { 0x940c, 0xfe0e, ' ', 2, "jmp %A" }, + { 0x900c, 0xfe0f, ' ', 1, "ld %d,X" }, + { 0x900d, 0xfe0f, ' ', 1, "ld %d,X+" }, + { 0x900e, 0xfe0f, ' ', 1, "ld %d,-X" }, + { 0x8008, 0xfe0f, ' ', 1, "ld %d,Y" }, + { 0x9009, 0xfe0f, ' ', 1, "ld %d,Y+" }, + { 0x900a, 0xfe0f, ' ', 1, "ld %d,-Y" }, + { 0x8008, 0xd208, ' ', 1, "ldd %d,Y+%q" }, + { 0x8000, 0xfe0f, ' ', 1, "ld %d,Z" }, + { 0x9001, 0xfe0f, ' ', 1, "ld %d,Z+" }, + { 0x9002, 0xfe0f, ' ', 1, "ld %d,-Z" }, + { 0x8000, 0xd208, ' ', 1, "ldd %d,Z+%q" }, + { 0xe000, 0xf000, ' ', 1, "ldi %D,%K" }, + { 0x9000, 0xfe0f, ' ', 2, "lds %d,%R" }, + { 0x95c8, 0xffff, ' ', 1, "lpm" }, + { 0x95d8, 0xffff, ' ', 1, "elpm" }, // in some devices equal to lpm + { 0x9406, 0xfe0f, ' ', 1, "lsr %d" }, + { 0x2c00, 0xfc00, ' ', 1, "mov %d,%r" }, + { 0x9c00, 0xfc00, ' ', 1, "mul %d,%r" }, + { 0x9401, 0xfe0f, ' ', 1, "neg %d" }, + { 0x2800, 0xfc00, ' ', 1, "or %d,%r" }, + { 0x6000, 0xf000, ' ', 1, "ori %d,%K" }, + { 0xb800, 0xf800, ' ', 1, "out %p,%d" }, + { 0x900f, 0xfe0f, ' ', 1, "pop %d" }, + { 0x920f, 0xfe0f, ' ', 1, "push %d" }, + { 0xd000, 0xf000, ' ', 1, "rcall %a" }, + { 0x9508, 0xff9f, ' ', 1, "ret" }, + { 0x9518, 0xff9f, ' ', 1, "reti" }, + { 0xc000, 0xf000, ' ', 1, "rjmp %a" }, + { 0x9407, 0xfe0f, ' ', 1, "ror %d" }, + { 0x0800, 0xfc00, ' ', 1, "sbc %d,%r" }, + { 0x4000, 0xf000, ' ', 1, "sbci %D,%K" }, + { 0x9a00, 0xff00, ' ', 1, "sbi %P,%b" }, + { 0x9900, 0xff00, ' ', 1, "sbic %P,%b" }, + { 0x9b00, 0xff00, ' ', 1, "sbis %P,%b" }, + { 0x9700, 0xff00, ' ', 1, "sbiw %2,%6" }, + { 0x6000, 0xf000, ' ', 1, "sbr %D,%K" }, + { 0xfc00, 0xfe00, ' ', 1, "sbrc %d,%b" }, + { 0xfe00, 0xfe00, ' ', 1, "sbrs %d,%b" }, + { 0xef0f, 0xff0f, ' ', 1, "ser %D" }, + { 0x9588, 0xffef, ' ', 1, "sleep" }, + { 0x920c, 0xfe0f, ' ', 1, "st X,%d" }, + { 0x920d, 0xfe0f, ' ', 1, "st X+,%d" }, + { 0x920e, 0xfe0f, ' ', 1, "st -X,%d" }, + { 0x8208, 0xfe0f, ' ', 1, "st Y,%d" }, + { 0x9209, 0xfe0f, ' ', 1, "st Y+,%d" }, + { 0x920a, 0xfe0f, ' ', 1, "st -Y,%d" }, + { 0x8208, 0xd208, ' ', 1, "std Y+%q,%d" }, + { 0x8200, 0xfe0f, ' ', 1, "st Z,%d" }, + { 0x9201, 0xfe0f, ' ', 1, "st Z+,%d" }, + { 0x9202, 0xfe0f, ' ', 1, "st -Z,%d" }, + { 0x8200, 0xd208, ' ', 1, "std Z+%q,%d" }, + { 0x9200, 0xfe0f, ' ', 2, "sts %R,%d" }, + { 0x1800, 0xfc00, ' ', 1, "sub %d,%r" }, + { 0x5000, 0xf000, ' ', 1, "subi %D,%K" }, + { 0x9402, 0xfe0f, ' ', 1, "swap %d" }, + { 0x95a8, 0xffef, ' ', 1, "wdr" }, + { 0, 0, 0, 0, NULL } +}; + +// Addresses are IRAM addresses! +struct name_entry sfr_tabl[]= { + { CPU_ALL_AVR, 0x001a, "XL"}, + { CPU_ALL_AVR, 0x001a, "XL" }, + { CPU_ALL_AVR, 0x001b, "XH" }, + { CPU_ALL_AVR, 0x001c, "YL" }, + { CPU_ALL_AVR, 0x001d, "YH" }, + { CPU_ALL_AVR, 0x001e, "ZL" }, + { CPU_ALL_AVR, 0x001f, "ZH" }, + { CPU_ALL_AVR, 0x0024, "ADCL" }, + { CPU_ALL_AVR, 0x0025, "ADCH" }, + { CPU_ALL_AVR, 0x0026, "ADCSR" }, + { CPU_ALL_AVR, 0x0027, "ADMUX" }, + { CPU_ALL_AVR, 0x0028, "ACSR" }, + { CPU_ALL_AVR, 0x0029, "UBRR" }, + { CPU_ALL_AVR, 0x002A, "UCR" }, + { CPU_ALL_AVR, 0x002B, "USR" }, + { CPU_ALL_AVR, 0x002C, "UDR" }, + { CPU_ALL_AVR, 0x002D, "SPCR" }, + { CPU_ALL_AVR, 0x002E, "SPSR" }, + { CPU_ALL_AVR, 0x002F, "SPDR" }, + { CPU_ALL_AVR, 0x0030, "PIND" }, + { CPU_ALL_AVR, 0x0031, "DDRD" }, + { CPU_ALL_AVR, 0x0032, "PORTD" }, + { CPU_ALL_AVR, 0x0033, "PINC" }, + { CPU_ALL_AVR, 0x0034, "DDRC" }, + { CPU_ALL_AVR, 0x0035, "PORTC" }, + { CPU_ALL_AVR, 0x0036, "PINB" }, + { CPU_ALL_AVR, 0x0037, "DDRB" }, + { CPU_ALL_AVR, 0x0038, "PORTB" }, + { CPU_ALL_AVR, 0x0039, "PINA" }, + { CPU_ALL_AVR, 0x003A, "DDRA" }, + { CPU_ALL_AVR, 0x003B, "PORTA" }, + { CPU_ALL_AVR, 0x003C, "EECR" }, + { CPU_ALL_AVR, 0x003D, "EEDR" }, + { CPU_ALL_AVR, 0x003E, "EEARL" }, + { CPU_ALL_AVR, 0x003E, "EEARH" }, + { CPU_ALL_AVR, 0x0041, "WDTCR" }, + { CPU_ALL_AVR, 0x0042, "ASSR" }, + { CPU_ALL_AVR, 0x0043, "OCR2" }, + { CPU_ALL_AVR, 0x0044, "TCNT2" }, + { CPU_ALL_AVR, 0x0045, "TCCR2" }, + { CPU_ALL_AVR, 0x0046, "ICR1L" }, + { CPU_ALL_AVR, 0x0047, "ICR1H" }, + { CPU_ALL_AVR, 0x0048, "OCR1BL" }, + { CPU_ALL_AVR, 0x0049, "OCR1BH" }, + { CPU_ALL_AVR, 0x004A, "OCR1AL" }, + { CPU_ALL_AVR, 0x004B, "OCR1AH" }, + { CPU_ALL_AVR, 0x004C, "TCNT1L" }, + { CPU_ALL_AVR, 0x004D, "TCNT1H" }, + { CPU_ALL_AVR, 0x004E, "TCCR1B" }, + { CPU_ALL_AVR, 0x004F, "TCCR1A" }, + { CPU_ALL_AVR, 0x0052, "TCNT0" }, + { CPU_ALL_AVR, 0x0053, "TCCR0" }, + { CPU_ALL_AVR, 0x0054, "MCUSR" }, + { CPU_ALL_AVR, 0x0055, "MCUCR" }, + { CPU_ALL_AVR, 0x0058, "TIFR" }, + { CPU_ALL_AVR, 0x0059, "TIMSK" }, + { CPU_ALL_AVR, 0x005A, "GIFR" }, + { CPU_ALL_AVR, 0x005B, "GIMSK" }, + { CPU_ALL_AVR, 0x005D, "SPL" }, + { CPU_ALL_AVR, 0x005E, "SPH" }, + { CPU_ALL_AVR, 0x005F, "SREG" }, + {0, 0} +}; + + +/* End of avr.src/glob.cc */ diff --git a/sim/ucsim/avr.src/glob.h b/sim/ucsim/avr.src/glob.h new file mode 100644 index 0000000..32bc79c --- /dev/null +++ b/sim/ucsim/avr.src/glob.h @@ -0,0 +1,40 @@ +/* + * Simulator of microcontrollers (glob.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef GLOB_HEADER +#define GLOB_HEADER + +#include "stypes.h" + + +extern struct dis_entry disass_avr[]; +extern struct name_entry sfr_tabl[]; + + +#endif + +/* End of avr.src/glob.h */ diff --git a/sim/ucsim/avr.src/info_1001.txt b/sim/ucsim/avr.src/info_1001.txt new file mode 100644 index 0000000..c9650c1 --- /dev/null +++ b/sim/ucsim/avr.src/info_1001.txt @@ -0,0 +1,47 @@ +LDS Rd,k 1001 000d dddd 0000 +LD Rd,Z+ 1001 000d dddd 0001 +LD Rd,-Z 1001 000d dddd 0010 +LPM Rd,Z 1001 000d dddd 0100 +LPM Rd,Z+ 1001 000d dddd 0101 +ELMP Rd,Z 1001 000d dddd 0110 +ELMP Rd,Z+ 1001 000d dddd 0111 +LD Rd,Y+ 1001 000d dddd 1001 +LD Rd,-Y 1001 000d dddd 1010 +LD Rd,X 1001 000d dddd 1100 +LD Rd,X+ 1001 000d dddd 1101 +LD Rd,-X 1001 000d dddd 1110 +POP Rd 1001 000d dddd 1111 + +STS k,Rr 1001 001d dddd 0000 +ST Z+,Rr 1001 001r rrrr 0001 +ST -Z,Rr 1001 001r rrrr 0010 +ST Y+,Rr 1001 001r rrrr 1001 +ST -Y,Rr 1001 001r rrrr 1010 +ST X,Rr 1001 001r rrrr 1100 +ST X+,Rr 1001 001r rrrr 1101 +ST -X,Rr 1001 001r rrrr 1110 +PUSH Rr 1001 001d dddd 1111 + +COM Rd 1001 010d dddd 0000 +NEG Rd 1001 010d dddd 0001 +SWAP Rd 1001 010d dddd 0010 +INC Rd 1001 010d dddd 0011 +ASR Rd 1001 010d dddd 0101 +LSR Rd 1001 010d dddd 0110 +ROR Rd 1001 010d dddd 0111 +DEC Rd 1001 010d dddd 1010 +JMP k 1001 010k kkkk 110k +CALL k 1001 010k kkkk 111k + +BSET s 1001 0100 0sss 1000 +BCLR s 1001 0100 1sss 1000 + +ADIW Rd,K 1001 0110 KKdd KKKK +SBIW Rd,K 1001 0111 KKdd KKKK + +CBI A,b 1001 1000 AAAA Abbb +SBIC A,b 1001 1001 AAAA Abbb +SBI A,b 1001 1010 AAAA Abbb +SBIS A,b 1001 1011 AAAA Abbb + +MUL Rd,Rr 1001 11rd dddd rrrr diff --git a/sim/ucsim/avr.src/info_1111.txt b/sim/ucsim/avr.src/info_1111.txt new file mode 100644 index 0000000..0faf0a1 --- /dev/null +++ b/sim/ucsim/avr.src/info_1111.txt @@ -0,0 +1,27 @@ +BRCS k 1111 00kk kkkk k000 =BRBS 0,k =BRLO k +BRLO k 1111 00kk kkkk k000 =BRBS 0,k =BRCS k +BREQ k 1111 00kk kkkk k001 =BRBS 1,k +BRMI k 1111 00kk kkkk k010 =BRBS 2,k +BRVS k 1111 00kk kkkk k011 =BRBS 3,k +BRLT k 1111 00kk kkkk k100 =BRBS 4,k +BRHS k 1111 00kk kkkk k101 =BRBS 5,k +BRTS k 1111 00kk kkkk k110 =BRBS 6,k +BRIE k 1111 00kk kkkk k111 =BRBS 7,k +BRBS s,k 1111 00kk kkkk ksss + +BRCC k 1111 01kk kkkk k000 =BRBC 0,k +BRHS k 1111 01kk kkkk k000 =BRBC 0,k +BRNE k 1111 01kk kkkk k001 =BRBC 1,k +BRPL k 1111 01kk kkkk k010 =BRBC 2,k +BRVC k 1111 01kk kkkk k011 =BRBC 3,k +BRGE k 1111 01kk kkkk k100 =BRBC 4,k +BRHC k 1111 01kk kkkk k101 =BRBC 5,k +BRTC k 1111 01kk kkkk k110 =BRBC 6,k +BRID k 1111 01kk kkkk k111 =BRBC 7,k +BRBC s,k 1111 01kk kkkk ksss + +BLD Rd,b 1111 100d dddd 0bbb +BST Rd,b 1111 101d dddd 0bbb + +SBRC Rr,b 1111 110r rrrr 0bbb +SBRS Rr,b 1111 111r rrrr 0bbb diff --git a/sim/ucsim/avr.src/info_types.txt b/sim/ucsim/avr.src/info_types.txt new file mode 100644 index 0000000..21f4115 --- /dev/null +++ b/sim/ucsim/avr.src/info_types.txt @@ -0,0 +1,23 @@ + inst Flash EE SRAM I/O Vcc Speed +AT90S1200 89 1K 64 0 15 2.7-6.0 0-12 +AT90S2313 118 2K 128 128 15 2.7-6.0 0-10 +AT90S2323 118 2K 128 128 3 4.0-6.0 0-10 +AT90LS2323 118 2K 128 128 3 2.7-6.0 0-4 +AT90S2343 118 2K 128 128 5 4.0-6.0 0-10 +AT90LS2343 118 2K 128 128 5 2.7-6.0 0-4 +AT90S2333 118 2K 128 128 20 4.0-6.0 0-8 +AT90LS2333 118 2K 128 128 20 2.7-6.0 0-4 +AT90S4433 118 4K 256 128 20 4.0-6.0 0-8 +AT90LS4433 118 4K 256 128 20 2.7-6.0 0-4 +AT90S4414 118 4K 256 256 32 2.7-6.0 0-8 +AT90S4434 118 4K 256 256 32 4.0-6.0 0-8 +AT90LS4434 118 4K 256 256 32 2.7-6.0 0-4 +AT90S8535 118 8K 512 512 32 4.0-6.0 0-8 +AT90LS8535 118 8K 512 512 32 2.7-6.0 0-4 +AT90S8515 118 8K 512 512 32 2.7-6.0 0-8 +ATmega603 121 64K 2K 4K 32 4.0-5.5 0-6 +ATmega603L 121 64K 2K 4K 32 2.7-3.6 0-4 +ATmega103 121 128K 4K 4K 32 4.0-5.5 0-6 +ATmega103L 121 128K 4K 4K 32 2.7-3.6 0-4 + +1200 2313 2323 2343 2333 4333 4414/34 8535/15 603 103 \ No newline at end of file diff --git a/sim/ucsim/avr.src/inst.cc b/sim/ucsim/avr.src/inst.cc new file mode 100644 index 0000000..5818294 --- /dev/null +++ b/sim/ucsim/avr.src/inst.cc @@ -0,0 +1,96 @@ +/* + * Simulator of microcontrollers (inst.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +// local +#include "avrcl.h" +#include "regsavr.h" + + +/* + * No Instruction + * NOP + * 0000 0000 0000 0000 + *---------------------------------------------------------------------------- + */ + +int +cl_avr::nop(t_mem code) +{ + return(resGO); +} + + +/* + * Sleep + * SLEEP + * 1001 0101 100X 1000 + *____________________________________________________________________________ + */ + +int +cl_avr::sleep(t_mem code) +{ + sleep_executed= 1; + return(resGO); +} + + +/* + * Watchdog Reset + * WDR + * 1001 0101 101X 1000 + *____________________________________________________________________________ + */ + +int +cl_avr::wdr(t_mem code) +{ + //FIXME + return(resGO); +} + + +/* + * Set all bits in Register + * SER Rd 16<=d<=31 + * 1110 1111 dddd 1111 + *____________________________________________________________________________ + */ + +int +cl_avr::ser_Rd(t_mem code) +{ + t_addr d= (code&0xf0)>>4; + t_mem data= 0xff; + ram->write(d, data); + return(resGO); +} + + +/* End of avr.src/inst.cc */ diff --git a/sim/ucsim/avr.src/instcl.h b/sim/ucsim/avr.src/instcl.h new file mode 100644 index 0000000..62b2398 --- /dev/null +++ b/sim/ucsim/avr.src/instcl.h @@ -0,0 +1,8 @@ +/* avr.src/instcl.h */ + + virtual int nop(t_mem code); + virtual int sleep(t_mem code); + virtual int wdr(t_mem code); + virtual int ser_Rd(t_mem code); + +/* End of avr.src/instcl.h */ diff --git a/sim/ucsim/avr.src/jump_cl.h b/sim/ucsim/avr.src/jump_cl.h new file mode 100644 index 0000000..92dedc7 --- /dev/null +++ b/sim/ucsim/avr.src/jump_cl.h @@ -0,0 +1,21 @@ +/* avr.src/jump_cl.h */ + + virtual int ijmp(t_mem code); + virtual int eijmp(t_mem code); + virtual int icall(t_mem code); + virtual int eicall(t_mem code); + virtual int ret(t_mem code); + virtual int reti(t_mem code); + virtual int rjmp_k(t_mem code); + virtual int rcall_k(t_mem code); + virtual int cpse_Rd_Rr(t_mem code); + virtual int jmp_k(t_mem code); + virtual int call_k(t_mem code); + virtual int brbs_s_k(t_mem code); + virtual int brbc_s_k(t_mem code); + virtual int sbrc_Rr_b(t_mem code); + virtual int sbrs_Rr_b(t_mem code); + virtual int sbic_P_b(t_mem code); + virtual int sbis_P_b(t_mem code); + +/* End of avr.src/jump_cl.h */ diff --git a/sim/ucsim/avr.src/jump_inst.cc b/sim/ucsim/avr.src/jump_inst.cc new file mode 100644 index 0000000..54f98f9 --- /dev/null +++ b/sim/ucsim/avr.src/jump_inst.cc @@ -0,0 +1,428 @@ +/* + * Simulator of microcontrollers (jmp_inst.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "avrcl.h" +#include "regsavr.h" + + +/* + * Indirect Jump + * IJMP + * 1001 0100 XXXX 1001 + *____________________________________________________________________________ + */ + +int +cl_avr::ijmp(t_mem code) +{ + t_addr z; + + z= ram->get(ZH)*256 + ram->get(ZL); + PC= rom->validate_address((PC & ~0xffff) | z); + //FIXME: analyze + return(resGO); +} + + +int +cl_avr::eijmp(t_mem code) +{ + return(resGO); +} + + +/* + * Indirect Call to Subroutine + * ICALL + * 1001 0101 XXXX 1001 + *____________________________________________________________________________ + */ + +int +cl_avr::icall(t_mem code) +{ + t_mem zl, zh; + t_addr z; + + push_addr(PC); + zl= ram->read(ZL); + zh= ram->read(ZH); + z= zh*256 + zl; + PC= (PC & ~0xffff) | (z & 0xffff); + //FIXME: analyze + tick(2); + return(resGO); +} + + +int +cl_avr::eicall(t_mem code) +{ + return(resGO); +} + + +/* + * Return from Subroutine + * RET + * 1001 0101 0XX0 1000 + *____________________________________________________________________________ + */ + +int +cl_avr::ret(t_mem code) +{ + t_addr a; + + pop_addr(&a); + PC= rom->validate_address(a); + tick(3); + return(resGO); +} + + +/* + * Return from Interrupt + * RETI + * 1001 0101 0XX1 1000 + *____________________________________________________________________________ + */ + +int +cl_avr::reti(t_mem code) +{ + t_addr a; + + pop_addr(&a); + PC= rom->validate_address(a); + t_mem sreg= ram->read(SREG); + sreg|= BIT_I; + ram->write(SREG, sreg); + tick(3); + return(resGO); +} + + +/* + * Relative Jump + * RJMP k -2K<=k<=2K + * 1100 kkkk kkkk kkkk + *____________________________________________________________________________ + */ + +int +cl_avr::rjmp_k(t_mem code) +{ + long k= code & 0xfff; + + if (k & 0x800) + k|= -4096; + PC= rom->validate_address((signed)PC + (signed)k); + tick(1); + return(resGO); +} + + +/* + * Relative Call to Subroutine + * RCALL k + * 1101 kkkk kkkk kkkk -1K<=k<=+1k + *____________________________________________________________________________ + */ + +int +cl_avr::rcall_k(t_mem code) +{ + t_addr k; + + push_addr(PC); + k= code & 0xfff; + if (k & 0x800) + k|= ~0xfff; + PC= rom->validate_address((signed)PC + (signed)k); + tick(2); + + return(resGO); +} + + +/* + * Compare Skip if Equal + * CPSE Rd,Rr 0<=d<=31, 0<=r<=31 + * 0001 00rd dddd rrrr + *____________________________________________________________________________ + */ + +int +cl_avr::cpse_Rd_Rr(t_mem code) +{ + t_addr d, r; + + d= (code&0x1f0)>>4; + r= ((code&0x200)>>5)|(code&0xf); + if (ram->read(r) == ram->read(d)) + { + t_mem next_code= rom->get(PC); + int i= 0; + struct dis_entry *dt= dis_tbl(); + while ((next_code & dt[i].mask) != dt[i].code && + dt[i].mnemonic) + i++; + if (dt[i].mnemonic != NULL) + { + PC= rom->validate_address(PC + dt[i].length); + tick(1); + } + else + return(resINV_INST); + } + return(resGO); +} + + +/* + * Jump + * JMP k 0<=k<=4M + * 1001 010k kkkk 110k + * kkkk kkkk kkkk kkkk + *____________________________________________________________________________ + */ + +int +cl_avr::jmp_k(t_mem code) +{ + t_addr k; + + k= ((code&0x1f0)>>3)|(code&1); + k= (k<<16)|fetch(); + PC= rom->validate_address(k); + tick(2); + return(resGO); +} + + +/* + * Long Call to a Subroutine + * CALL k 0<=k<=64k/4M + * 1001 010k kkkk 111k + * kkkk kkkk kkkk kkkk + *____________________________________________________________________________ + */ + +int +cl_avr::call_k(t_mem code) +{ + t_addr k; + + k= (((code&0x1f0)>>3)|(code&1))*0x10000; + k= k + fetch(); + push_addr(PC); + PC= rom->validate_address(k); + tick(3); + return(resGO); +} + + +/* + * Branch if Bit in SREG is Set + * BRBS s,k 0<=s<=7, -64<=k<=+63 + * 1111 00kk kkkk ksss + *____________________________________________________________________________ + */ + +int +cl_avr::brbs_s_k(t_mem code) +{ + int s, k; + + k= (code&0x3f8)>>3; + s= code&7; + t_mem sreg= ram->get(SREG); + t_mem mask= 1<validate_address((signed)PC+k); + tick(1); + } + return(resGO); +} + + +/* + * Branch if Bit in SREG is Cleared + * BRBC s,k 0<=s<=7, -64<=k<=+63 + * 1111 01kk kkkk ksss + *____________________________________________________________________________ + */ + +int +cl_avr::brbc_s_k(t_mem code) +{ + int s, k; + + k= (code&0x3f8)>>3; + s= code&7; + t_mem sreg= ram->get(SREG); + t_mem mask= 1<validate_address((signed)PC+k); + tick(1); + } + return(resGO); +} + + +/* + * Skip if Bit in Register is Cleared + * SBRC Rr,b 0<=r<=31, 0<=b<=7 + * 1111 110r rrrr Xbbb + *____________________________________________________________________________ + */ + +int +cl_avr::sbrc_Rr_b(t_mem code) +{ + t_addr r= (code&0x1f0)>>4; + int b= code&7; + t_mem mask= 1<read(r) & mask)) + { + t_mem next_code= rom->get(PC); + int i= 0; + struct dis_entry *dt= dis_tbl(); + while ((next_code & dt[i].mask) != dt[i].code && + dt[i].mnemonic) + i++; + if (dt[i].mnemonic != NULL) + { + PC= rom->validate_address(PC + dt[i].length); + tick(1); + } + else + return(resINV_INST); + } + return(resGO); +} + + +/* + * Skip if Bit in Register is Set + * SBRS Rr,b 0<=r<=31, 0<=b<=7 + * 1111 111r rrrr Xbbb + *____________________________________________________________________________ + */ + +int +cl_avr::sbrs_Rr_b(t_mem code) +{ + t_addr r= (code&0x1f0)>>4; + int b= code&7; + t_mem mask= 1<read(r) & mask) + { + t_mem next_code= rom->get(PC); + int i= 0; + struct dis_entry *dt= dis_tbl(); + while ((next_code & dt[i].mask) != dt[i].code && + dt[i].mnemonic) + i++; + if (dt[i].mnemonic != NULL) + { + PC= rom->validate_address(PC + dt[i].length); + tick(1); + } + else + return(resINV_INST); + } + return(resGO); +} + + +/* + * Skip if Bit in I/O Register is Clear + * SBIC P,b 0<=P<=31 0<=b<=7 + * 1001 1001 pppp pbbb + *____________________________________________________________________________ + */ + +int +cl_avr::sbic_P_b(t_mem code) +{ + uint addr, mask; + + addr= ((code&0xf8)>>3)+0x20; + mask= 1 << (code&7); + if (0 == (mask & ram->read(addr))) + { + code= fetch(); + int size= inst_length(code); + while (size > 1) + { + fetch(); + size--; + } + tick(1); + } + return(resGO); +} + + +/* + * Skip if Bit in I/O Register is Set + * SBIS P,b 0<=P<=31 0<=b<=7 + * 1001 1011 pppp pbbb + *____________________________________________________________________________ + */ + +int +cl_avr::sbis_P_b(t_mem code) +{ + uint addr, mask; + + addr= ((code&0xf8)>>3)+0x20; + mask= 1 << (code&7); + if (mask & ram->read(addr)) + { + code= fetch(); + int size= inst_length(code); + while (size > 1) + { + fetch(); + size--; + } + tick(1); + } + return(resGO); +} + + +/* End of avr.src/jump_inst.cc */ diff --git a/sim/ucsim/avr.src/logic_cl.h b/sim/ucsim/avr.src/logic_cl.h new file mode 100644 index 0000000..636eba4 --- /dev/null +++ b/sim/ucsim/avr.src/logic_cl.h @@ -0,0 +1,9 @@ +/* avr.src/logic_cl.h */ + + virtual int ori_Rd_K(t_mem code); + virtual int andi_Rd_K(t_mem code); + virtual int and_Rd_Rr(t_mem code); + virtual int eor_Rd_Rr(t_mem code); + virtual int or_Rd_Rr(t_mem code); + +/* End of avr.src/logic_cl.h */ diff --git a/sim/ucsim/avr.src/logic_inst.cc b/sim/ucsim/avr.src/logic_inst.cc new file mode 100644 index 0000000..3a2c935 --- /dev/null +++ b/sim/ucsim/avr.src/logic_inst.cc @@ -0,0 +1,142 @@ +/* + * Simulator of microcontrollers (logic_inst.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "avrcl.h" +#include "regsavr.h" + + +/* + * Logical OR with Immediate + * ORI Rd,K 16<=d<=31 0<=K<=255 + * 0110 KKKK dddd KKKK + *____________________________________________________________________________ + */ + +int +cl_avr::ori_Rd_K(t_mem code) +{ + t_addr d; + t_mem K, data; + + d= (code&0xf0)>>4; + K= ((code&0xf00)>>4)|(code&0xf); + data= K | ram->read(d); + ram->write(d+16, data); + set_zn0s(data); + return(resGO); +} + + +/* + * Logical AND with Immediate + * ANDI Rd,K 16<=d<=31 0<=K<=255 + * 0111 KKKK dddd KKKK + *____________________________________________________________________________ + */ + +int +cl_avr::andi_Rd_K(t_mem code) +{ + t_addr d; + t_mem K, data; + + d= (code&0xf0)>>4; + K= ((code&0xf00)>>4)|(code&0xf); + data= K & ram->read(d); + ram->write(d+16, data); + set_zn0s(data); + return(resGO); +} + + +/* + * Logical AND + * AND Rd,Rr 0<=d<=31 0<=r<=31 + * 0010 00rd dddd rrrr + *____________________________________________________________________________ + */ + +int +cl_avr::and_Rd_Rr(t_mem code) +{ + t_addr d, r; + t_mem data; + + d= (code&0x1f0)>>4; + r= ((code&0x200)>>5)|(code&0xf); + data= ram->read(d) & ram->read(r); + ram->write(d, data); + set_zn0s(data); + return(resGO); +} + + +/* + * Exclusive OR + * EOR Rd,Rr 0<=d<=31 0<=r<=31 + * 0010 01rd dddd rrrr + *____________________________________________________________________________ + */ + +int +cl_avr::eor_Rd_Rr(t_mem code) +{ + t_addr d, r; + t_mem data; + + d= (code&0x1f0)>>4; + r= ((code&0x200)>>5)|(code&0xf); + data= ram->read(d) ^ ram->read(r); + ram->write(d, data); + set_zn0s(data); + return(resGO); +} + + +/* + * Logical OR + * OR Rd,Rr 0<=d<=31 0<=r<=31 + * 0010 10rd dddd rrrr + *____________________________________________________________________________ + */ + +int +cl_avr::or_Rd_Rr(t_mem code) +{ + t_addr d, r; + t_mem data; + + d= (code&0x1f0)>>4; + r= ((code&0x200)>>5)|(code&0xf); + data= ram->read(d) | ram->read(r); + ram->write(d, data); + set_zn0s(data); + return(resGO); +} + + +/* End of avr.src/logic_inst.cc */ diff --git a/sim/ucsim/avr.src/move_cl.h b/sim/ucsim/avr.src/move_cl.h new file mode 100644 index 0000000..46e11d2 --- /dev/null +++ b/sim/ucsim/avr.src/move_cl.h @@ -0,0 +1,40 @@ +/* avr.src/move_cl.h */ + + virtual int lpm(t_mem code); + virtual int elpm(t_mem code); + virtual int spm(t_mem code); + virtual int espm(t_mem code); + virtual int ldi_Rd_K(t_mem code); + virtual int movw_Rd_Rr(t_mem code); + virtual int lds_Rd_k(t_mem code); + virtual int ld_Rd_ZS(t_mem code); + virtual int ld_Rd_SZ(t_mem code); + virtual int lpm_Rd_Z(t_mem code); + virtual int lpm_Rd_ZS(t_mem code); + virtual int elpm_Rd_Z(t_mem code); + virtual int elpm_Rd_ZS(t_mem code); + virtual int ld_Rd_YS(t_mem code); + virtual int ld_Rd_SY(t_mem code); + virtual int ld_Rd_X(t_mem code); + virtual int ld_Rd_XS(t_mem code); + virtual int ld_Rd_SX(t_mem code); + virtual int pop_Rd(t_mem code); + virtual int sts_k_Rr(t_mem code); + virtual int st_ZS_Rr(t_mem code); + virtual int st_SZ_Rr(t_mem code); + virtual int st_YS_Rr(t_mem code); + virtual int st_SY_Rr(t_mem code); + virtual int st_X_Rr(t_mem code); + virtual int st_XS_Rr(t_mem code); + virtual int st_SX_Rr(t_mem code); + virtual int push_Rr(t_mem code); + virtual int swap_Rd(t_mem code); + virtual int ldd_Rd_Z_q(t_mem code); + virtual int ldd_Rd_Y_q(t_mem code); + virtual int std_Z_q_Rr(t_mem code); + virtual int std_Y_q_Rr(t_mem code); + virtual int in_Rd_A(t_mem code); + virtual int out_A_Rr(t_mem code); + virtual int mov_Rd_Rr(t_mem code); + +/* End of avr.src/move_cl.h */ diff --git a/sim/ucsim/avr.src/move_inst.cc b/sim/ucsim/avr.src/move_inst.cc new file mode 100644 index 0000000..058be7e --- /dev/null +++ b/sim/ucsim/avr.src/move_inst.cc @@ -0,0 +1,733 @@ +/* + * Simulator of microcontrollers (move_inst.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "avrcl.h" +#include "regsavr.h" + + +/* + * Load Program Memory + * LPM + * 1001 0101 110X 1000 + *____________________________________________________________________________ + */ + +int +cl_avr::lpm(t_mem code) +{ + t_addr addr; + t_mem data; + + addr= ram->get(ZH)*256 + ram->get(ZL); + data= rom->read(addr); + if (addr & 1) + ram->/*write*/set(0, (data>>8)&0xff); + else + ram->/*write*/set(0, data&0xff); + tick(2); + return(resGO); +} + + +int +cl_avr::elpm(t_mem code) +{ + return(resGO); +} + + +int +cl_avr::spm(t_mem code) +{ + return(resGO); +} + + +int +cl_avr::espm(t_mem code) +{ + return(resGO); +} + + +/* + * Load Immediate + * LDI Rd,K 16<=d<=31 0<=K<=255 + * 1110 KKKK dddd KKKK + *____________________________________________________________________________ + */ + +int +cl_avr::ldi_Rd_K(t_mem code) +{ + t_addr d; + t_mem K; + + d= (code&0xf0)>>4; + K= ((code&0xf00)>>4)|(code&0xf); + ram->write(d+16, K); + return(resGO); +} + + +int +cl_avr::movw_Rd_Rr(t_mem code) +{ + return(resGO); +} + + +/* + * Load Indirect From SRAM to Register using Index Z + * LDD Rd,Z+q 0<=d<=31, 0<=q<=63 + * 10q0 qq0d dddd 0qqq + *____________________________________________________________________________ + */ + +int +cl_avr::ldd_Rd_Z_q(t_mem code) +{ + int d, q; + t_addr z; + + d= (code&0x1f0)>>4; + q= ((code&0x2000)>>8)|((code&0xc00)>>7)|(code&0x7); + z= ram->get(ZH)*256 + ram->get(ZL); + t_mem data= ram->read(z+q); + ram->write(d, data); + tick(1); + return(resGO); +} + + +/* + * Load Indirect From SRAM to Register using Index Y + * LDD Rd,Y+q 0<=d<=31, 0<=q<=63 + * 10q0 qq0d dddd 1qqq + *____________________________________________________________________________ + */ + +int +cl_avr::ldd_Rd_Y_q(t_mem code) +{ + int d, q; + t_addr y; + + d= (code&0x1f0)>>4; + q= ((code&0x2000)>>8)|((code&0xc00)>>7)|(code&0x7); + y= ram->get(YH)*256 + ram->get(YL); + t_mem data= ram->read(y+q); + ram->write(d, data); + tick(1); + return(resGO); +} + + +/* + * Store Indirect From Register to SRAM using Index Z + * ST Z+q,Rr 0<=r<=31, 0<=q<=63 + * 10q0 qq1r rrrr 0qqq + *____________________________________________________________________________ + */ + +int +cl_avr::std_Z_q_Rr(t_mem code) +{ + int r, q; + t_addr z; + + r= (code&0x1f0)>>4; + q= ((code&0x2000)>>8)|((code&0xc00)>>7)|(code&0x7); + z= ram->get(ZH)*256 + ram->get(ZL); + t_mem data= ram->read(r); + ram->write(z+q, data); + tick(1); + return(resGO); +} + + +/* + * Store Indirect From Register to SRAM using Index Y + * ST Y+q,Rr 0<=r<=31, 0<=q<=63 + * 10q0 qq1r rrrr 1qqq + *____________________________________________________________________________ + */ + +int +cl_avr::std_Y_q_Rr(t_mem code) +{ + int r, q; + t_addr y; + + r= (code&0x1f0)>>4; + q= ((code&0x2000)>>8)|((code&0xc00)>>7)|(code&0x7); + y= ram->get(YH)*256 + ram->get(YL); + t_mem data= ram->read(r); + ram->write(y+q, data); + tick(1); + return(resGO); +} + + +/* + * Load Direct from SRAM + * LDS Rd,k 0<=d<=31, 0<=k<=65535 + * 1001 000d dddd 0000 + * kkkk kkkk kkkk kkkk + *____________________________________________________________________________ + */ + +int +cl_avr::lds_Rd_k(t_mem code) +{ + t_addr d, k; + + d= (code&0x1f0)>>4; + k= fetch(); + t_mem data= ram->read(k); + ram->write(d, data); + tick(2); + return(resGO); +} + + +/* + * Load Indirect From SRAM to register using Index Z + * LD Rd,Z+ 0<=d<=31 + * 1001 000d dddd 0001 + *____________________________________________________________________________ + */ + +int +cl_avr::ld_Rd_ZS(t_mem code) +{ + t_addr z, d; + + d= (code&0x1f0)>>4; + z= ram->get(ZH)*256 + ram->get(ZL); + t_mem data= ram->read(z); + ram->write(d, data); + ram->set(ZL, data= (ram->get(ZL)+1)&0xff); + if (!data) + ram->set(ZH, (ram->get(ZH)+1)&0xff); + tick(1); + return(resGO); +} + + +/* + * Load Indirect From SRAM to register using Index Z + * LD Rd,-Z 0<=d<=31 + * 1001 000d dddd 0010 + *____________________________________________________________________________ + */ + +int +cl_avr::ld_Rd_SZ(t_mem code) +{ + t_addr z, d; + t_mem data; + + d= (code&0x1f0)>>4; + ram->set(ZL, z= (ram->get(ZL)-1)&0xff); + if (z == 0xff) + ram->set(ZH, (ram->get(ZH)-1)&0xff); + z= ram->get(ZH)*256 + z; + data= ram->read(z); + ram->write(d, data); + tick(1); + return(resGO); +} + + +int +cl_avr::lpm_Rd_Z(t_mem code) +{ + return(resGO); +} + + +int +cl_avr::lpm_Rd_ZS(t_mem code) +{ + return(resGO); +} + + +int +cl_avr::elpm_Rd_Z(t_mem code) +{ + return(resGO); +} + + +int +cl_avr::elpm_Rd_ZS(t_mem code) +{ + return(resGO); +} + + +/* + * Load Indirect From SRAM to register using Index Y + * LD Rd,Y+ 0<=d<=31 + * 1001 000d dddd 1001 + *____________________________________________________________________________ + */ + +int +cl_avr::ld_Rd_YS(t_mem code) +{ + t_addr y, d; + + d= (code&0x1f0)>>4; + y= ram->get(YH)*256 + ram->get(YL); + t_mem data= ram->read(y); + ram->write(d, data); + ram->set(YL, data= (ram->get(YL)+1)&0xff); + if (!data) + ram->set(YH, (ram->get(YH)+1)&0xff); + tick(1); + return(resGO); +} + + +/* + * Load Indirect From SRAM to register using Index Y + * LD Rd,-Y 0<=d<=31 + * 1001 000d dddd 1010 + *____________________________________________________________________________ + */ + +int +cl_avr::ld_Rd_SY(t_mem code) +{ + t_addr y, d; + t_mem data; + + d= (code&0x1f0)>>4; + ram->set(YL, y= (ram->get(YL)-1)&0xff); + if (y == 0xff) + ram->set(YH, (ram->get(YH)-1)&0xff); + y= ram->get(YH)*256 + y; + data= ram->read(y); + ram->write(d, data); + tick(1); + return(resGO); +} + + +/* + * Load Indirect From SRAM to register using Index X + * LD Rd,X 0<=d<=31 + * 1001 000d dddd 1100 + *____________________________________________________________________________ + */ + +int +cl_avr::ld_Rd_X(t_mem code) +{ + t_addr x, d; + + d= (code&0x1f0)>>4; + x= ram->get(XH)*256 + ram->get(XL); + t_mem data= ram->read(x); + ram->write(d, data); + tick(1); + return(resGO); +} + + +/* + * Load Indirect From SRAM to register using Index X + * LD Rd,X+ 0<=d<=31 + * 1001 000d dddd 1101 + *____________________________________________________________________________ + */ + +int +cl_avr::ld_Rd_XS(t_mem code) +{ + t_addr x, d; + + d= (code&0x1f0)>>4; + x= ram->get(XH)*256 + ram->get(XL); + t_mem data= ram->read(x); + ram->write(d, data); + ram->set(XL, data= (ram->get(XL)+1)&0xff); + if (!data) + ram->set(XH, (ram->get(XH)+1)&0xff); + tick(1); + return(resGO); +} + + +/* + * Load Indirect From SRAM to register using Index X + * LD Rd,-X 0<=d<=31 + * 1001 000d dddd 1110 + *____________________________________________________________________________ + */ + +int +cl_avr::ld_Rd_SX(t_mem code) +{ + t_addr x, d; + t_mem data; + + d= (code&0x1f0)>>4; + ram->set(XL, x= (ram->get(XL)-1)&0xff); + if (x == 0xff) + ram->set(XH, (ram->get(XH)-1)&0xff); + x= ram->get(XH)*256 + x; + data= ram->read(x); + ram->write(d, data); + tick(1); + return(resGO); +} + + +/* + * Pop Register from Stack + * POP Rd 0<=d<=31 + * 1001 000d dddd 1111 + *____________________________________________________________________________ + */ + +int +cl_avr::pop_Rd(t_mem code) +{ + t_addr d; + t_mem D; + + d= (code&0x1f0)>>4; + pop_data(&D); + ram->write(d, D); + tick(1); + + return(resGO); +} + + +/* + * Store Direct to SRAM + * STS k,Rr 0<=r<=31, 0<=k<=65535 + * 1001 001r rrrr 0000 + * kkkk kkkk kkkk kkkk + *____________________________________________________________________________ + */ + +int +cl_avr::sts_k_Rr(t_mem code) +{ + t_addr r, k; + + r= (code&0x1f0)>>4; + k= fetch(); + t_mem data= ram->read(r); + ram->write(k, data); + tick(2); + return(resGO); +} + + +/* + * Store Indirect From Register to SRAM using Index Z + * ST Z+,Rr 0<=r<=63 + * 1001 001r rrrr 0001 + *____________________________________________________________________________ + */ + +int +cl_avr::st_ZS_Rr(t_mem code) +{ + t_addr z, r; + + r= (code&0x1f0)>>4; + z= ram->get(ZH)*256 + ram->get(ZL); + t_mem data= ram->read(r); + ram->write(z, data); + ram->set(ZL, data= (ram->get(ZL)+1)&0xff); + if (!data) + ram->set(ZH, (ram->get(ZH)+1)&0xff); + tick(1); + return(resGO); +} + + +/* + * Store Indirect From Register to SRAM using Index Z + * ST -Z,Rr 0<=r<=63 + * 1001 001r rrrr 0010 + *____________________________________________________________________________ + */ + +int +cl_avr::st_SZ_Rr(t_mem code) +{ + t_addr z, r; + t_mem data; + + r= (code&0x1f0)>>4; + ram->set(ZL, z= (ram->get(ZL)-1)&0xff); + if (z == 0xff) + ram->set(ZH, (ram->get(ZH)-1)&0xff); + z= ram->get(ZH)*256 + z; + data= ram->read(r); + ram->write(z, data); + tick(1); + return(resGO); +} + + +/* + * Store Indirect From Register to SRAM using Index Y + * ST Y+,Rr 0<=r<=63 + * 1001 001r rrrr 1001 + *____________________________________________________________________________ + */ + +int +cl_avr::st_YS_Rr(t_mem code) +{ + t_addr y, r; + + r= (code&0x1f0)>>4; + y= ram->get(YH)*256 + ram->get(YL); + t_mem data= ram->read(r); + ram->write(y, data); + ram->set(YL, data= (ram->get(YL)+1)&0xff); + if (!data) + ram->set(YH, (ram->get(YH)+1)&0xff); + tick(1); + return(resGO); +} + + +/* + * Store Indirect From Register to SRAM using Index Y + * ST -Y,Rr 0<=r<=63 + * 1001 001r rrrr 1010 + *____________________________________________________________________________ + */ + +int +cl_avr::st_SY_Rr(t_mem code) +{ + t_addr y, r; + t_mem data; + + r= (code&0x1f0)>>4; + ram->set(YL, y= (ram->get(YL)-1)&0xff); + if (y == 0xff) + ram->set(YH, (ram->get(YH)-1)&0xff); + y= ram->get(YH)*256 + y; + data= ram->read(r); + ram->write(y, data); + tick(1); + return(resGO); +} + + +/* + * Store Indirect From Register to SRAM using Index X + * ST X,Rr 0<=r<=31 + * 1001 001r rrrr 1100 + *____________________________________________________________________________ + */ + +int +cl_avr::st_X_Rr(t_mem code) +{ + int r; + t_addr x; + + r= (code&0x1f0)>>4; + x= ram->get(XH)*256 + ram->get(XL); + t_mem data= ram->read(r); + ram->write(x, data); + tick(1); + return(resGO); +} + + +/* + * Store Indirect From Register to SRAM using Index X + * ST X+,Rr 0<=r<=63 + * 1001 001r rrrr 1101 + *____________________________________________________________________________ + */ + +int +cl_avr::st_XS_Rr(t_mem code) +{ + t_addr x, r; + + r= (code&0x1f0)>>4; + x= ram->get(XH)*256 + ram->get(XL); + t_mem data= ram->read(r); + ram->write(x, data); + ram->set(XL, data= (ram->get(XL)+1)&0xff); + if (!data) + ram->set(XH, (ram->get(XH)+1)&0xff); + tick(1); + return(resGO); +} + + +/* + * Store Indirect From Register to SRAM using Index X + * ST -X,Rr 0<=r<=63 + * 1001 001r rrrr 1110 + *____________________________________________________________________________ + */ + +int +cl_avr::st_SX_Rr(t_mem code) +{ + t_addr x, r; + t_mem data; + + r= (code&0x1f0)>>4; + ram->set(XL, x= (ram->get(XL)-1)&0xff); + if (x == 0xff) + ram->set(XH, (ram->get(XH)-1)&0xff); + x= ram->get(XH)*256 + x; + data= ram->read(r); + ram->write(x, data); + tick(1); + return(resGO); +} + + +/* + * Push register on Stack + * PUSH Rr 0<=r<=31 + * 1001 001d dddd 1111 + *____________________________________________________________________________ + */ + +int +cl_avr::push_Rr(t_mem code) +{ + t_addr d; + t_mem D; + + d= (code&0x1f0)>>4; + D= ram->read(d); + push_data(D); + tick(1); + + return(resGO); +} + + +/* + * Swap Nibbles + * SWAP Rd 0<=d<=31 + * 1001 010d dddd 0010 + *____________________________________________________________________________ + */ + +int +cl_avr::swap_Rd(t_mem code) +{ + t_addr d; + t_mem data, temp; + + d= (code&0x1f0)>>4; + data= ram->read(d); + temp= (data>>4)&0xf; + data= (data<<4)|temp; + ram->write(d, data); + return(resGO); +} + + +/* + * Load an I/O Port to Register + * IN Rd,P 0<=d<=31 0<=P<=63 + * 1011 0PPd dddd PPPP + *____________________________________________________________________________ + */ + +int +cl_avr::in_Rd_A(t_mem code) +{ + t_mem P, data; + t_addr d; + + P= ((code&0x600)>>5)|(code&0xf); + d= (code&0x1f0)>>4; + data= ram->read(P+0x20); + ram->write(d, data); + return(resGO); +} + + +/* + * Store Register to I/O Port + * OUT P,Rr 0<=r<=31 0<=P<=63 + * 1011 1PPr rrrr PPPP + *____________________________________________________________________________ + */ + +int +cl_avr::out_A_Rr(t_mem code) +{ + t_mem P, data; + t_addr r; + + P= ((code&0x600)>>5)|(code&0xf); + r= (code&0x1f0)>>4; + data= ram->read(r); + ram->write(P+0x20, data); + return(resGO); +} + + +/* + * Copy Register + * MOV Rd,Rr 0<=d<=31 0<=r<=31 + * 0010 11rd dddd rrrr + *____________________________________________________________________________ + */ + +int +cl_avr::mov_Rd_Rr(t_mem code) +{ + t_addr d, r; + + d= (code&0x1f0)>>4; + r= ((code&0x200)>>5)|(code&0xf); + t_mem data= ram->read(r); + ram->write(d, data); + return(resGO); +} + + +/* End of avr.src/move_inst.cc */ diff --git a/sim/ucsim/avr.src/port.cc b/sim/ucsim/avr.src/port.cc new file mode 100644 index 0000000..0cb2638 --- /dev/null +++ b/sim/ucsim/avr.src/port.cc @@ -0,0 +1,55 @@ +/* + * Simulator of microcontrollers (port.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + + +#include + +#include "portcl.h" + + +cl_port::cl_port(class cl_uc *auc): + cl_hw(auc, HW_PORT, 0, "port") +{ + //uc->register_hw_read(MEM_SFR, 2, this); + //uc->register_hw_read(MEM_SFR, 4, this); +} + +/*ulong +cl_port::read(class cl_mem *mem, long addr) +{ + switch (addr) + { + case 2: + return(22); + case 4: + return(44); + } + return(cl_hw::read(mem, addr)); +}*/ + + +/* End of avr.src/port.cc */ diff --git a/sim/ucsim/avr.src/portcl.h b/sim/ucsim/avr.src/portcl.h new file mode 100644 index 0000000..781a98b --- /dev/null +++ b/sim/ucsim/avr.src/portcl.h @@ -0,0 +1,45 @@ +/* + * Simulator of microcontrollers (portcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef PORTCL_HEADER +#define PORTCL_HEADER + +#include "hwcl.h" + + +class cl_port: public cl_hw +{ +public: + cl_port(class cl_uc *auc); + + //virtual ulong read(class cl_mem *mem, long addr); +}; + + +#endif + +/* End of avr.src/portcl.h */ diff --git a/sim/ucsim/avr.src/regsavr.h b/sim/ucsim/avr.src/regsavr.h new file mode 100644 index 0000000..a0d72b1 --- /dev/null +++ b/sim/ucsim/avr.src/regsavr.h @@ -0,0 +1,113 @@ +/* + * Simulator of microcontrollers (regsavr.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef REGSAVR_HEADER +#define REGSAVR_HEADER + +/* + * Registers, absolute data space addresses + */ + +#define X 0x001a +#define XL 0x001a +#define XH 0x001b +#define Y 0x001c +#define YL 0x001c +#define YH 0x001d +#define Z 0x001e +#define ZL 0x001e +#define ZH 0x001f + +#define ADCL 0x0024 +#define ADCH 0x0025 +#define ADCSR 0x0026 +#define ADMUX 0x0027 +#define ACSR 0x0028 +#define UBRR 0x0029 +#define UCR 0x002A +#define USR 0x002B +#define UDR 0x002C +#define SPCR 0x002D +#define SPSR 0x002E +#define SPDR 0x002F +#define PIND 0x0030 +#define DDRD 0x0031 +#define PORTD 0x0032 +#define PINC 0x0033 +#define DDRC 0x0034 +#define PORTC 0x0035 +#define PINB 0x0036 +#define DDRB 0x0037 +#define PORTB 0x0038 +#define PINA 0x0039 +#define DDRA 0x003A +#define PORTA 0x003B +#define EECR 0x003C +#define EEDR 0x003D +#define EEARL 0x003E +#define EEARH 0x003E +#define WDTCR 0x0041 +#define ASSR 0x0042 +#define OCR2 0x0043 +#define TCNT2 0x0044 +#define TCCR2 0x0045 +#define ICR1L 0x0046 +#define ICR1H 0x0047 +#define OCR1BL 0x0048 +#define OCR1BH 0x0049 +#define OCR1AL 0x004A +#define OCR1AH 0x004B +#define TCNT1L 0x004C +#define TCNT1H 0x004D +#define TCCR1B 0x004E +#define TCCR1A 0x004F +#define TCNT0 0x0052 +#define TCCR0 0x0053 +#define MCUSR 0x0054 +#define MCUCR 0x0055 +#define TIFR 0x0058 +#define TIMSK 0x0059 +#define GIFR 0x005A +#define GIMSK 0x005B +#define SPL 0x005D +#define SPH 0x005E +#define SREG 0x005F + +/* Bits of SREG */ +#define BIT_I 0x80 +#define BIT_T 0x40 +#define BIT_H 0x20 +#define BIT_S 0x10 +#define BIT_V 0x08 +#define BIT_N 0x04 +#define BIT_Z 0x02 +#define BIT_C 0x01 + + +#endif + +/* End of avr.src/regsavr.h */ diff --git a/sim/ucsim/avr.src/savr.cc b/sim/ucsim/avr.src/savr.cc new file mode 100644 index 0000000..d5b401c --- /dev/null +++ b/sim/ucsim/avr.src/savr.cc @@ -0,0 +1,56 @@ +/* + * Simulator of microcontrollers (savr.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include + + // prj +#include "globals.h" + +// sim.src +#include "appcl.h" + +// local +#include "simavrcl.h" + + +int +main(int argc, char *argv[]) +{ + class cl_sim *sim; + + application= new cl_app(); + application->init(argc, argv); + sim= new cl_simavr(application); + sim->init(); + application->set_simulator(sim); + sim->main(); + delete application; + return(0); +} + + +/* End of avr.src/savr.cc */ diff --git a/sim/ucsim/avr.src/simavr.cc b/sim/ucsim/avr.src/simavr.cc new file mode 100644 index 0000000..58b8d8d --- /dev/null +++ b/sim/ucsim/avr.src/simavr.cc @@ -0,0 +1,50 @@ +/* + * Simulator of microcontrollers (simavr.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + + +//#include + +// sim.src +#include "appcl.h" + +// local +#include "simavrcl.h" +#include "avrcl.h" + + +cl_simavr::cl_simavr(class cl_app *the_app): + cl_sim(the_app) +{} + +class cl_uc * +cl_simavr::mk_controller(void) +{ + return(new cl_avr(this)); +} + + +/* End of avr.src/simavr.cc */ diff --git a/sim/ucsim/avr.src/simavrcl.h b/sim/ucsim/avr.src/simavrcl.h new file mode 100644 index 0000000..70347ed --- /dev/null +++ b/sim/ucsim/avr.src/simavrcl.h @@ -0,0 +1,45 @@ +/* + * Simulator of microcontrollers (simavrcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef SIMAVRCL_HEADER +#define SIMAVRCL_HEADER + +#include "simcl.h" + + +class cl_simavr: public cl_sim +{ +public: + cl_simavr(class cl_app *the_app); + + virtual class cl_uc *mk_controller(void); +}; + + +#endif + +/* End of avr.src/simavrcl.h */ diff --git a/sim/ucsim/avr.src/test_arith.asm b/sim/ucsim/avr.src/test_arith.asm new file mode 100644 index 0000000..cb097af --- /dev/null +++ b/sim/ucsim/avr.src/test_arith.asm @@ -0,0 +1,81 @@ + nop + clr r0 + out $3f,r0 + +; jmp t2 + + ldi r16,$12 + mov r2,r16 + inc r16 + inc r2 + ldi r17,$ff + inc r17 + ldi r18,$7f + inc r18 + nop +t1: + ldi r16,10 ; 10+20 + ldi r17,20 + add r16,r17 + in r0,$3f + mov r18,r16 + ldi r16,127 ; 127+10 + ldi r17,10 + add r16,r17 + in r1,$3f + mov r19,r16 + ldi r16,255 ; 255+2 + ldi r17,2 + add r16,r17 + in r2,$3f + mov r20,r16 + ldi r16,255 ; 255+1 + ldi r17,1 + add r16,r17 + in r3,$3f + mov r21,r16 + ldi r16,10 ; 10+6 + ldi r17,6 + add r16,r17 + in r4,$3f + mov r22,r16 + nop + ldi r16,-10 ; -10-20 + ldi r17,-20 + add r16,r17 + in r5,$3f + mov r23,r16 + ldi r16,-120 ; -120-30 + ldi r17,-30 + add r16,r17 + in r6,$3f + mov r24,r16 + nop + ldi r16,254 ; 254+1 +0 + ldi r17,1 + clc + adc r16,r17 + in r7,$3f + mov r25,r16 + ldi r16,254 ; 254+1 +1 + sec + adc r16,r17 + in r8,$3f + mov r26,r16 + nop +t2: + ldi r24,0 + ldi r25,0 + adiw r24,20 + ldi r26,low($0fff) + ldi r27,high($0fff) + adiw r26,2 + ldi r28,low($fff0) + ldi r29,high($fff0) + adiw r28,$f + adiw r28,1 +done: + jmp done + +copyright: + .db "(c) 2000 Talker Bt." diff --git a/sim/ucsim/avr.src/test_bit.asm b/sim/ucsim/avr.src/test_bit.asm new file mode 100644 index 0000000..687e539 --- /dev/null +++ b/sim/ucsim/avr.src/test_bit.asm @@ -0,0 +1,87 @@ + jmp t11 + + ldi r17,0 + sbi 0,0 + sbis 0,0 + ldi r17,1 + cbi 0,0 + sbis 0,0 + ldi r17,2 + nop + + ldi r17,0 + cbi 0,0 + sbic 0,0 + ldi r17,1 + sbi 0,0 + sbic 0,0 + ldi r17,2 + nop + + clr r0 + out $3f,r0 + + sec + sen + sez + sei + ses + sev + set + seh + + ;ld sreg,$ff + + clc + cln + clz + cli + cls + clv + clt + clh + + nop + + sbi 0,0 + sbi 0,1 + sbi 0,2 + sbi 0,3 + sbi 0,4 + sbi 0,5 + sbi 0,6 + sbi 0,7 + nop + sbi $10,4 + sbi $1f,7 + nop + cbi 0,0 + cbi 0,1 + cbi 0,2 + cbi 0,3 + cbi 0,4 + cbi 0,5 + cbi 0,6 + cbi 0,7 +t1: + ldi r16,$55 + bst r16,0 + bst r16,1 + bst r16,2 + bst r16,3 + bst r16,4 + bst r16,5 + bst r16,6 + bst r16,7 +t11: + ldi r16,0 + set + bld r16,0 + ldi r16,1 + clt + bld r16,0 + + nop + +copyright: + .db "(c) 1999,2000 Talker Bt." diff --git a/sim/ucsim/avr.src/test_call.asm b/sim/ucsim/avr.src/test_call.asm new file mode 100644 index 0000000..753a686 --- /dev/null +++ b/sim/ucsim/avr.src/test_call.asm @@ -0,0 +1,14 @@ + nop + ldi r16,$ff + out $3d,r16 + ldi r16,$01 + out $3e,r16 + nop + call sub1 + nop + +sub1: nop + ret + +copyright: + .db "(c) 2000 talker Bt." diff --git a/sim/ucsim/avr.src/test_dis.asm b/sim/ucsim/avr.src/test_dis.asm new file mode 100644 index 0000000..71fd621 --- /dev/null +++ b/sim/ucsim/avr.src/test_dis.asm @@ -0,0 +1,167 @@ + nop + + adc r1,r31 + add r2,r30 + adiw r24,54 + and r4,r29 + andi r16,253 + asr r5 + bclr 7 + bld r6,6 +lab1: nop + brbc 0,lab1 + brbc 1,lab1 + brbc 2,lab1 + brbc 3,lab1 + brbc 4,lab1 + brbc 5,lab1 + brbc 6,lab1 + brbc 7,lab1 +lab2: brbs 0,lab3 + brbs 1,lab3 + brbs 2,lab3 + brbs 3,lab3 + brbs 4,lab3 + brbs 5,lab3 + brbs 6,lab3 + brbs 7,lab3 +lab3: brcc lab4 + brcc lab3 +lab4: brcs lab5 + brcs lab4 +lab5: breq lab6 + breq lab5 +lab6: brge lab7 + brge lab6 +lab7: brhc lab8 + brhc lab7 +lab8: brhs lab9 + brhs lab8 +lab9: brid lab10 + brid lab9 +lab10: brie lab11 + brie lab10 +lab11: brlo lab12 + brlo lab11 +lab12: brlt lab13 + brlt lab12 +lab13: brmi lab14 + brmi lab13 +lab14: brne lab15 + brne lab14 +lab15: brpl lab16 + brpl lab15 +lab16: brsh lab17 + brsh lab16 +lab17: brtc lab18 + brtc lab17 +lab18: brts lab19 + brts lab18 +lab19: brvc lab20 + brvc lab19 +lab20: brvs lab21 + brvs lab20 +lab21: bset 6 + bst r7,5 + call 0 + call lab1 + call lab22 + nop +lab22: cbi $8,4 + + clc + clh + cli + cln + cls + clt + clv + clz + + com r9 + cp r10,r11 + cpc r12,r13 + cpi r16,95 + cpse r14,r15 + dec r17 + eor r18,r19 + icall + ijmp + in r20,9 + inc r21 + jmp lab1 + jmp lab23 + ld r22,x + ld r23,x+ + ld r24,-x + ld r25,y + ld r26,y+ + ld r27,-y + ldd r28,y+63 + ld r29,z + ld r30,z+ + ld r31,-z + ldd r0,z+1 + ldi r17,170 + lds r1,12345 + lpm + ;elpm + lsr r2 + mov r3,r4 + mul r5,r6 + neg r7 + or r8,r9 + ori r18,85 + out 9,r10 + pop r11 + push r12 + rcall lab1 + rcall lab23 + nop +lab23: ret + reti + rjmp lab23 + rjmp lab24 + nop +lab24: ror r13 + sbc r14,r15 + sbci r19,83 + sbi 10,2 + sbic 11,3 + sbis 12,4 + sbiw r26,60 + sbr r19,254 + sbrc r20,5 + sbrs r21,6 + sec + seh + sei + sen + ses + set + sev + sez + + ser r22 + sleep + st x,r23 + st x+,r24 + st -x,r25 + st y,r26 + st y+,r27 + st -y,r28 + std y+34,r29 + st z,r30 + st z+,r31 + st -z,r0 + st z+35,r1 + sts $ff00,r2 + sub r3,r4 + subi r31,123 + swap r4 + wdr + + nop +a: jmp a + + .db "(c) 1999 Talker Bt." diff --git a/sim/ucsim/avr.src/test_jmp.asm b/sim/ucsim/avr.src/test_jmp.asm new file mode 100644 index 0000000..3b6a1d4 --- /dev/null +++ b/sim/ucsim/avr.src/test_jmp.asm @@ -0,0 +1,62 @@ + nop + jmp skip + nop +skip: + ldi r16,12 + ldi r17,13 + cpse r16,r17 + inc r16 + cpse r16,r17 + inc r16 + inc r16 + nop + nop + ldi r16,0 + sbrc r16,0 + nop + sbrc r16,1 + jmp 0 + sbrs r16,2 + ldi r16,$ff + sbrs r16,7 + nop + sbrs r16,6 + jmp 0 + nop +t0: +; rjmp -$100 + bclr 0 + brbs 0,b0_1 + brbc 0,b0_1 + nop +b2_0: + nop +b1_0: + bclr 1 + brbs 1,b1_1 + brbc 1,b1_1 + nop +b0_1: + bset 0 + brbc 0,b1_0 + brbs 0,b1_0 + nop +b1_1: + bset 1 + brbc 1,b2_0 + brbs 1,b2_0 + nop +t1: + ldi r30,low(t11) + ldi r31,high(t11) + ijmp + nop +t11: + rjmp t2 + nop +t2: + rjmp t0 + nop + +copyright: + .db "(c) 2000 talker Bt." diff --git a/sim/ucsim/avr.src/test_mov.asm b/sim/ucsim/avr.src/test_mov.asm new file mode 100644 index 0000000..315681c --- /dev/null +++ b/sim/ucsim/avr.src/test_mov.asm @@ -0,0 +1,93 @@ +;X = 0x001a +;XL = 0x001a +;XH = 0x001b +;Y = 0x001c +;YL = 0x001c +;YH = 0x001d +;Z = 0x001e +;ZL = 0x001e +.equ ZH =$1f + + jmp t42 + + ldi r16,0 + ldi r16,16 + ldi r17,0 + ldi r17,17 + ldi r30,0 + ldi r30,30 + ldi r30,255 +t1: + ldi r30,low(copyright) + ldi r31,high(copyright) + lpm + ldi r30,low(copyright+1) + ldi r31,high(copyright+1) + lpm +t2: + ldi r31,0 + ldi r30,100 + ldi r16,$65 + std z+1,r16 + std z+63,r16 + ldd r1,z+1 + ldd r2,z+63 +t21: + ldi r31,0 + ldi r30,255 + ldi r18,88 + std z,r18 + ld r6,z+ + ld r7,-z +t3: + ldi r29,0 + ldi r28,100 + ldi r17,$45 + std y+2,r17 + std y+62,r17 + ldd r3,y+2 + ldd r4,y+62 +t31: + ldi r29,0 + ldi r28,255 + ldi r19,$55 + std y,r19 + ld r8,y+ + ld r9,-y +t32: + ldi r27,0 + ldi r26,255 + ldi r19,$70 + st x,r19 + ld r20,x + ld r10,x+ + ld r11,-x +t4: + ldi r31,0 + ldi r30,255 + ldi r16,66 + ldi r17,77 + st z+,r16 + st -z,r17 +t41: + ldi r29,0 + ldi r28,255 + ldi r18,88 + ldi r19,99 + st y+,r18 + st -y,r19 +t42: + ldi r27,0 + ldi r26,255 + ldi r20,22 + ldi r21,11 + st x+,r20 + st -x,r21 + + lds r5,162 + sts 161,r5 + + nop + +copyright: + .db "(c) 2000 Talker Bt." diff --git a/sim/ucsim/clean.mk b/sim/ucsim/clean.mk new file mode 100644 index 0000000..4411323 --- /dev/null +++ b/sim/ucsim/clean.mk @@ -0,0 +1,24 @@ +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] *.so ucsim$(EXEEXT) + rm -f .[a-z]*~ ptt + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f config.cache config.log config.status + rm -f ddconfig.h main.mk Makefile *.dep + rm -rf autom4te.cache + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean diff --git a/sim/ucsim/cmd.src/(c).1 b/sim/ucsim/cmd.src/(c).1 new file mode 100644 index 0000000..3fbc039 --- /dev/null +++ b/sim/ucsim/cmd.src/(c).1 @@ -0,0 +1,25 @@ +/* + * Simulator of microcontrollers (cmd.src/@@F@@) + * + * Copyright (C) @@S@@,@@Y@@ Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ diff --git a/sim/ucsim/cmd.src/FlexLexer.h b/sim/ucsim/cmd.src/FlexLexer.h new file mode 100644 index 0000000..e69de29 diff --git a/sim/ucsim/cmd.src/Makefile.in b/sim/ucsim/cmd.src/Makefile.in new file mode 100644 index 0000000..62a4d1a --- /dev/null +++ b/sim/ucsim/cmd.src/Makefile.in @@ -0,0 +1,144 @@ +# +# ucsim cmd.src/Makefile +# +# (c) Drotos Daniel, Talker Bt. 1997 +# + +STARTYEAR = 1997 + +SHELL = /bin/sh +CXX = @CXX@ +CPP = @CPP@ +CXXCPP = @CXXCPP@ +RANLIB = @RANLIB@ +INSTALL = @INSTALL@ + +LEX = @LEX@ +YACC = @YACC@ +BISON_PLUS_PLUS = @BISON_PLUS_PLUS@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +DEFS = $(subs -DHAVE_CONFIG_H,,@DEFS@) +CPPFLAGS = @CPPFLAGS@ -I$(srcdir) -I$(top_srcdir) -I$(top_builddir) \ + -I$(top_srcdir)/sim.src -I$(top_srcdir)/gui.src +CFLAGS = @CFLAGS@ -Wall +CXXFLAGS = @CXXFLAGS@ -Wall +M_OR_MM = @M_OR_MM@ +WINSOCK_AVAIL = @WINSOCK_AVAIL@ + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @infodir@ +srcdir = @srcdir@ +VPATH = @srcdir@ + +OBJECTS = cmdset.o command.o cmdutil.o syntax.o \ + get.o set.o timer.o bp.o info.o show.o cmdgui.o cmdconf.o \ + cmduc.o cmdstat.o cmdmem.o \ + cmdpars.o cmdlex.o newcmd.o + +ifeq ($(WINSOCK_AVAIL), 1) +OBJECTS += newcmdwin32.o +else +OBJECTS += newcmdposix.o +endif + +DEVEL = $(shell test -e $(top_builddir)/devel && echo yes) + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf cmdlib + +cmd.src: all + + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: all installdirs + + +# Deleting all the installed files +# -------------------------------- +uninstall: + + +# Performing self-test +# -------------------- +check: + +test: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + + +# Creating dependencies +# --------------------- +dep: Makefile.dep + +Makefile.dep: $(srcdir)/*.cc $(srcdir)/*.h + $(CXXCPP) $(CPPFLAGS) $(M_OR_MM) $(addprefix $(srcdir)/, $(OBJECTS:.o=.cc)) >Makefile.dep + +-include Makefile.dep +include $(srcdir)/clean.mk + +cmdpars.cc: cmdpars.y + +ifeq ($(DEVEL),yes) + cmdlex.cc: cmdlex.l cmdpars.h +endif + +# My rules +# -------- + +cmdlib: $(top_builddir)/libcmd.a + +$(top_builddir)/libcmd.a: $(OBJECTS) + ar -rcu $*.a $(OBJECTS) + $(RANLIB) $*.a + +.cc.o: + $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c $< -o $@ + +#.y.cc: +# rm -f $*.cc $*.h +# $(YACC) -d $< +# mv y.tab.c $*.cc +# mv y.tab.h $*.h + +ifeq ($(DEVEL),yes) +.y.cc: + rm -f $*.cc $*.h + $(BISON_PLUS_PLUS) -d -o $*.cc $< + +.l.cc: + rm -f $*.cc + $(LEX) --c++ -o $*.cc $< +endif + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" freshconf;\ + fi + +# End of cmd.src/Makefile.in diff --git a/sim/ucsim/cmd.src/bp.cc b/sim/ucsim/cmd.src/bp.cc new file mode 100644 index 0000000..202eb17 --- /dev/null +++ b/sim/ucsim/cmd.src/bp.cc @@ -0,0 +1,205 @@ +/* + * Simulator of microcontrollers (cmd.src/bp.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include "stdlib.h" + +// sim +#include "brkcl.h" +#include "argcl.h" +#include "simcl.h" + +// cmd +#include "cmdsetcl.h" +#include "bpcl.h" + + +/* + * BREAK command + */ + +//int +//cl_break_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_break_cmd) +{ + t_addr addr= 0; + int hit= 1; + char op; + class cl_address_space *mem; + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + + if (cmdline->syntax_match(uc, ADDRESS)) { + addr= params[0]->value.address; + hit= 1; + do_fetch(uc, addr, hit, con); + } + else if (cmdline->syntax_match(uc, ADDRESS NUMBER)) { + addr= params[0]->value.address; + hit= params[1]->value.number; + do_fetch(uc, addr, hit, con); + } + else if (cmdline->syntax_match(uc, MEMORY STRING ADDRESS)) { + mem= params[0]->value.memory.address_space; + op= *(params[1]->get_svalue()); + addr= params[2]->value.address; + hit= 1; + do_event(uc, mem, op, addr, hit, con); + } + else if (cmdline->syntax_match(uc, MEMORY STRING ADDRESS NUMBER)) { + mem= params[0]->value.memory.address_space; + op= *(params[1]->get_svalue()); + addr= params[2]->value.address; + hit= params[3]->value.number; + do_event(uc, mem, op, addr, hit, con); + } + else + { + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax\n"); + return(DD_FALSE); + } + return(DD_FALSE); +} + +void +cl_break_cmd::do_fetch(class cl_uc *uc, + t_addr addr, int hit, class cl_console_base *con) +{ + if (hit > 99999) + { + con->dd_printf("Hit value %d is too big.\n", hit); + return; + } + if (uc->fbrk->bp_at(addr)) + con->dd_printf("Breakpoint at 0x%06x is already set.\n", addr); + else + { + class cl_brk *b= new cl_fetch_brk(uc->address_space(MEM_ROM_ID), + uc->make_new_brknr(), + addr, perm, hit); + b->init(); + uc->fbrk->add_bp(b); + const char *s= uc->disass(addr, NULL); + con->dd_printf("Breakpoint %d at 0x%06x: %s\n", b->nr, addr, s); + free((char *)s); + } +} + +void +cl_break_cmd::do_event(class cl_uc *uc, + class cl_address_space *mem, + char op, t_addr addr, int hit, + class cl_console_base *con) +{ + class cl_ev_brk *b= NULL; + + b= uc->mk_ebrk(perm, mem, op, addr, hit); + if (b) + uc->ebrk->add_bp(b); + else + con->dd_printf("Couldn't make event breakpoint\n"); +} + + +/* + * CLEAR address + */ + +//int +//cl_clear_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_clear_cmd) +{ + int idx; + class cl_brk *brk= uc->fbrk->get_bp(uc->PC, &idx); + + if (cmdline->param(0) == 0) + { + if (!brk) + { + con->dd_printf("No breakpoint at this address.\n"); + return(0); + } + uc->fbrk->del_bp(uc->PC); + return(0); + } + + int i= 0; + class cl_cmd_arg *param; + while ((param= cmdline->param(i++))) + { + t_addr addr; + if (!param->as_address(uc)) + return(DD_FALSE); + addr= param->value.address; + if (uc->fbrk->bp_at(addr) == 0) + con->dd_printf("No breakpoint at 0x%06x\n", addr); + else + uc->fbrk->del_bp(addr); + } + + return(DD_FALSE); +} + + +/* + * DELETE nr nr ... + */ + +//int +//cl_delete_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_delete_cmd) +{ + if (cmdline->param(0) == 0) + { + // delete all + uc->remove_all_breaks(); + } + else + { + int i= 0; + class cl_cmd_arg *param; + while ((param= cmdline->param(i++))) + { + long num; + if (param->get_ivalue(&num)) + { + if (!uc->rm_brk(num)) + con->dd_printf("Error\n"); + } + } + } + return(DD_FALSE); +} + + +/* End of cmd.src/bp.cc */ diff --git a/sim/ucsim/cmd.src/bpcl.h b/sim/ucsim/cmd.src/bpcl.h new file mode 100644 index 0000000..117cf35 --- /dev/null +++ b/sim/ucsim/cmd.src/bpcl.h @@ -0,0 +1,67 @@ +/* + * Simulator of microcontrollers (cmd.src/bpcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_BPCL_HEADER +#define CMD_BPCL_HEADER + +#include "newcmdcl.h" + + +// BREAK +COMMAND_HEAD(cl_break_cmd) +public: + enum brk_perm perm; +COMMAND_METHODS_ON(uc,cl_break_cmd) + virtual void do_fetch(class cl_uc *uc, + t_addr addr, int hit, class cl_console_base *con); + virtual void do_event(class cl_uc *uc, + class cl_address_space *mem, + char op, t_addr addr, int hit, + class cl_console_base *con); +COMMAND_TAIL; + +// TBREAK +class cl_tbreak_cmd: public cl_break_cmd +{ +public: + cl_tbreak_cmd(const char *aname, + int can_rep, + const char *short_hlp, + const char *long_hlp): + cl_break_cmd(aname, can_rep, short_hlp, long_hlp) {perm=brkDYNAMIC;} +}; + +// CLEAR +COMMAND_ON(uc,cl_clear_cmd); + +// DELETE +COMMAND_ON(uc,cl_delete_cmd); + + +#endif + +/* End of cmd.src/bpcl.h */ diff --git a/sim/ucsim/cmd.src/clean.mk b/sim/ucsim/cmd.src/clean.mk new file mode 100644 index 0000000..4902934 --- /dev/null +++ b/sim/ucsim/cmd.src/clean.mk @@ -0,0 +1,29 @@ +# +# ucsim cmd.src/clean.mk +# + +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f config.cache config.log config.status + rm -f Makefile *.dep + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean + +# End of cmd.src/clean.mk diff --git a/sim/ucsim/cmd.src/cmdconf.cc b/sim/ucsim/cmd.src/cmdconf.cc new file mode 100644 index 0000000..7a93118 --- /dev/null +++ b/sim/ucsim/cmd.src/cmdconf.cc @@ -0,0 +1,104 @@ +/* + * Simulator of microcontrollers (cmd.src/cmdconf.cc) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +// prj +#include "globals.h" +#include "utils.h" + +// sim +#include "simcl.h" + +// local +#include "cmdconfcl.h" + + +/* + * Command: conf + *---------------------------------------------------------------------------- + */ + +//int +//cl_conf_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_conf_cmd) +{ + int i; + + con->dd_printf("ucsim version %s\n", VERSIONSTR); + con->dd_printf("Type of microcontroller: %s\n", uc->id_string()); + con->dd_printf("Controller has %d hardware element(s).\n", + uc->hws->count); + for (i= 0; i < uc->hws->count; i++) + { + class cl_hw *hw= (class cl_hw *)(uc->hws->at(i)); + con->dd_printf(" %s[%d]\n", hw->id_string, hw->id); + } + return(0); +} + +/* + * Command: conf objects + *---------------------------------------------------------------------------- + */ + +static void +conf_objects_cmd_print_node(class cl_console_base *con, + int indent, class cl_base *node) +{ + if (!node) + return; + int i; + for (i= 0; i < indent; i++) + con->dd_printf(" "); + const char *name= node->get_name("unknown"); + con->dd_printf("%s\n", name); + class cl_base *c= node->first_child(); + while (c) + { + conf_objects_cmd_print_node(con, indent+2, c); + c= node->next_child(c); + } +} + +//int +//cl_conf_addmem_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_APP(cl_conf_objects_cmd) +{ + //class cl_address_space *mem= 0; + /*class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) };*/ + class cl_error *cl_error_base = new cl_error(); + conf_objects_cmd_print_node(con, 0, /*application*/cl_error_base->get_class()); + delete cl_error_base; + return(DD_FALSE); +} + + +/* End of cmd.src/cmdconf.cc */ diff --git a/sim/ucsim/cmd.src/cmdconfcl.h b/sim/ucsim/cmd.src/cmdconfcl.h new file mode 100644 index 0000000..68ebc2a --- /dev/null +++ b/sim/ucsim/cmd.src/cmdconfcl.h @@ -0,0 +1,43 @@ +/* + * Simulator of microcontrollers (cmd.src/cmdconfcl.h) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_CMDCONF_HEADER +#define CMD_CMDCONF_HEADER + +#include "newcmdcl.h" + + +// CONF +COMMAND_ON(uc,cl_conf_cmd); + +// CONF OBJECTS +COMMAND_ON(app,cl_conf_objects_cmd); + + +#endif + +/* End of cmd.src/cmdconfcl.h */ diff --git a/sim/ucsim/cmd.src/cmdgui.cc b/sim/ucsim/cmd.src/cmdgui.cc new file mode 100644 index 0000000..10c6928 --- /dev/null +++ b/sim/ucsim/cmd.src/cmdgui.cc @@ -0,0 +1,90 @@ +/* + * Simulator of microcontrollers (cmd.src/cmdgui.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +// prj +#include "globals.h" + +// sim +#include "simcl.h" + +// local +#include "cmdguicl.h" + + +/* + * Command: gui start + *---------------------------------------------------------------------------- + */ + +//int +//cl_gui_start_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_gui_start_cmd) +{ + class cl_hw *hw; + class cl_memory *mem; + t_addr start, end; + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + + if (cmdline->syntax_match(uc, HW)) { + hw= params[0]->value.hw; + } + else if (cmdline->syntax_match(uc, MEMORY ADDRESS ADDRESS)) { + mem= params[0]->value.memory.memory; + start= params[1]->value.address; + end= params[2]->value.address; + } + else + { + con->dd_printf("Error: wrong syntax\n" + "%s\n", short_help?short_help:"no help"); + } + + return(DD_FALSE);; +} + + +/* + * Command: gui stop + *---------------------------------------------------------------------------- + */ + +//int +//cl_gui_stop_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_gui_stop_cmd) +{ + return(DD_FALSE);; +} + + +/* End of cmd.src/cmdgui.cc */ diff --git a/sim/ucsim/cmd.src/cmdguicl.h b/sim/ucsim/cmd.src/cmdguicl.h new file mode 100644 index 0000000..2a09080 --- /dev/null +++ b/sim/ucsim/cmd.src/cmdguicl.h @@ -0,0 +1,43 @@ +/* + * Simulator of microcontrollers (cmd.src/cmdguicl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_CMDGUICL_HEADER +#define CMD_CMDGUICL_HEADER + +#include "newcmdcl.h" + + +// GUI START +COMMAND_ON(uc,cl_gui_start_cmd); + +// GUI STOP +COMMAND_ON(uc,cl_gui_stop_cmd); + + +#endif + +/* End of cmd.src/cmdguicl.h */ diff --git a/sim/ucsim/cmd.src/cmdlex.cc b/sim/ucsim/cmd.src/cmdlex.cc new file mode 100644 index 0000000..b567b98 --- /dev/null +++ b/sim/ucsim/cmd.src/cmdlex.cc @@ -0,0 +1,1659 @@ +#line 2 "cmdlex.cc" + +#line 4 "cmdlex.cc" + +#define YY_INT_ALIGNED short int + +/* A lexical scanner generated by flex */ + +#define FLEX_SCANNER +#define YY_FLEX_MAJOR_VERSION 2 +#define YY_FLEX_MINOR_VERSION 5 +#define YY_FLEX_SUBMINOR_VERSION 31 +#if YY_FLEX_SUBMINOR_VERSION > 0 +#define FLEX_BETA +#endif + + /* The c++ scanner is a mess. The FlexLexer.h header file relies on the + * following macro. + */ + #define yyFlexLexer yyFlexLexer + +/* First, we deal with platform-specific or compiler-specific issues. */ + +/* begin standard C headers. */ + +/* end standard C headers. */ + +/* flex integer type definitions */ + +#ifndef FLEXINT_H +#define FLEXINT_H + +/* C99 systems have . Non-C99 systems may or may not. */ + +#if defined __STDC_VERSION__ && __STDC_VERSION__ >= 199901L +#include +typedef int8_t flex_int8_t; +typedef uint8_t flex_uint8_t; +typedef int16_t flex_int16_t; +typedef uint16_t flex_uint16_t; +typedef int32_t flex_int32_t; +typedef uint32_t flex_uint32_t; +#else +typedef signed char flex_int8_t; +typedef short int flex_int16_t; +typedef int flex_int32_t; +typedef unsigned char flex_uint8_t; +typedef unsigned short int flex_uint16_t; +typedef unsigned int flex_uint32_t; +#endif /* ! C99 */ + +/* Limits of integral types. */ +#ifndef INT8_MIN +#define INT8_MIN (-128) +#endif +#ifndef INT16_MIN +#define INT16_MIN (-32767-1) +#endif +#ifndef INT32_MIN +#define INT32_MIN (-2147483647-1) +#endif +#ifndef INT8_MAX +#define INT8_MAX (127) +#endif +#ifndef INT16_MAX +#define INT16_MAX (32767) +#endif +#ifndef INT32_MAX +#define INT32_MAX (2147483647) +#endif +#ifndef UINT8_MAX +#define UINT8_MAX (255U) +#endif +#ifndef UINT16_MAX +#define UINT16_MAX (65535U) +#endif +#ifndef UINT32_MAX +#define UINT32_MAX (4294967295U) +#endif + +#endif /* ! FLEXINT_H */ + +/* begin standard C++ headers. */ +#include +#include +#include +#include +/* end standard C++ headers. */ + +#ifdef __cplusplus + +/* The "const" storage-class-modifier is valid. */ +#define YY_USE_CONST + +#else /* ! __cplusplus */ + +#if __STDC__ + +#define YY_USE_CONST + +#endif /* __STDC__ */ +#endif /* ! __cplusplus */ + +#ifdef YY_USE_CONST +#define yyconst const +#else +#define yyconst +#endif + +/* Returned upon end-of-file. */ +#define YY_NULL 0 + +/* Promotes a possibly negative, possibly signed char to an unsigned + * integer for use as an array index. If the signed char is negative, + * we want to instead treat it as an 8-bit unsigned char, hence the + * double cast. + */ +#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) + +/* Enter a start condition. This macro really ought to take a parameter, + * but we do it the disgusting crufty way forced on us by the ()-less + * definition of BEGIN. + */ +#define BEGIN (yy_start) = 1 + 2 * + +/* Translate the current start state into a value that can be later handed + * to BEGIN to return to the state. The YYSTATE alias is for lex + * compatibility. + */ +#define YY_START (((yy_start) - 1) / 2) +#define YYSTATE YY_START + +/* Action number for EOF rule of a given start state. */ +#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) + +/* Special action meaning "start processing a new file". */ +#define YY_NEW_FILE yyrestart( yyin ) + +#define YY_END_OF_BUFFER_CHAR 0 + +/* Size of default input buffer. */ +#ifndef YY_BUF_SIZE +#define YY_BUF_SIZE 16384 +#endif + +#ifndef YY_TYPEDEF_YY_BUFFER_STATE +#define YY_TYPEDEF_YY_BUFFER_STATE +typedef struct yy_buffer_state *YY_BUFFER_STATE; +#endif + +extern int yyleng; + +#define EOB_ACT_CONTINUE_SCAN 0 +#define EOB_ACT_END_OF_FILE 1 +#define EOB_ACT_LAST_MATCH 2 + + #define YY_LESS_LINENO(n) + +/* Return all but the first "n" matched characters back to the input stream. */ +#define yyless(n) \ + do \ + { \ + /* Undo effects of setting up yytext. */ \ + int yyless_macro_arg = (n); \ + YY_LESS_LINENO(yyless_macro_arg);\ + *yy_cp = (yy_hold_char); \ + YY_RESTORE_YY_MORE_OFFSET \ + (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \ + YY_DO_BEFORE_ACTION; /* set up yytext again */ \ + } \ + while ( 0 ) + +#define unput(c) yyunput( c, (yytext_ptr) ) + +/* The following is because we cannot portably get our hands on size_t + * (without autoconf's help, which isn't available because we want + * flex-generated scanners to compile on their own). + */ + +#ifndef YY_TYPEDEF_YY_SIZE_T +#define YY_TYPEDEF_YY_SIZE_T +typedef unsigned int yy_size_t; +#endif + +#ifndef YY_STRUCT_YY_BUFFER_STATE +#define YY_STRUCT_YY_BUFFER_STATE +struct yy_buffer_state + { + + std::istream* yy_input_file; + + char *yy_ch_buf; /* input buffer */ + char *yy_buf_pos; /* current position in input buffer */ + + /* Size of input buffer in bytes, not including room for EOB + * characters. + */ + yy_size_t yy_buf_size; + + /* Number of characters read into yy_ch_buf, not including EOB + * characters. + */ + int yy_n_chars; + + /* Whether we "own" the buffer - i.e., we know we created it, + * and can realloc() it to grow it, and should free() it to + * delete it. + */ + int yy_is_our_buffer; + + /* Whether this is an "interactive" input source; if so, and + * if we're using stdio for input, then we want to use getc() + * instead of fread(), to make sure we stop fetching input after + * each newline. + */ + int yy_is_interactive; + + /* Whether we're considered to be at the beginning of a line. + * If so, '^' rules will be active on the next match, otherwise + * not. + */ + int yy_at_bol; + + int yy_bs_lineno; /**< The line count. */ + int yy_bs_column; /**< The column count. */ + + /* Whether to try to fill the input buffer when we reach the + * end of it. + */ + int yy_fill_buffer; + + int yy_buffer_status; + +#define YY_BUFFER_NEW 0 +#define YY_BUFFER_NORMAL 1 + /* When an EOF's been seen but there's still some text to process + * then we mark the buffer as YY_EOF_PENDING, to indicate that we + * shouldn't try reading from the input source any more. We might + * still have a bunch of tokens to match, though, because of + * possible backing-up. + * + * When we actually see the EOF, we change the status to "new" + * (via yyrestart()), so that the user can continue scanning by + * just pointing yyin at a new input file. + */ +#define YY_BUFFER_EOF_PENDING 2 + + }; +#endif /* !YY_STRUCT_YY_BUFFER_STATE */ + +/* We provide macros for accessing buffer states in case in the + * future we want to put the buffer states in a more general + * "scanner state". + * + * Returns the top of the stack, or NULL. + */ +#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \ + ? (yy_buffer_stack)[(yy_buffer_stack_top)] \ + : NULL) + +/* Same as previous macro, but useful when we know that the buffer stack is not + * NULL or when we need an lvalue. For internal use only. + */ +#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)] + +void *yyalloc (yy_size_t ); +void *yyrealloc (void *,yy_size_t ); +void yyfree (void * ); + +#define yy_new_buffer yy_create_buffer + +#define yy_set_interactive(is_interactive) \ + { \ + if ( ! YY_CURRENT_BUFFER ){ \ + yyensure_buffer_stack (); \ + YY_CURRENT_BUFFER_LVALUE = \ + yy_create_buffer( yyin, YY_BUF_SIZE ); \ + } \ + YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ + } + +#define yy_set_bol(at_bol) \ + { \ + if ( ! YY_CURRENT_BUFFER ){\ + yyensure_buffer_stack (); \ + YY_CURRENT_BUFFER_LVALUE = \ + yy_create_buffer( yyin, YY_BUF_SIZE ); \ + } \ + YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ + } + +#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) + +/* Begin user sect3 */ + +typedef unsigned char YY_CHAR; + +#define yytext_ptr yytext +#define YY_INTERACTIVE + +#include + +/* Done after the current pattern has been matched and before the + * corresponding action - sets up yytext. + */ +#define YY_DO_BEFORE_ACTION \ + (yytext_ptr) = yy_bp; \ + yyleng = (size_t) (yy_cp - yy_bp); \ + (yy_hold_char) = *yy_cp; \ + *yy_cp = '\0'; \ + (yy_c_buf_p) = yy_cp; + +#define YY_NUM_RULES 16 +#define YY_END_OF_BUFFER 17 +/* This struct is not used in this scanner, + but its presence is necessary. */ +struct yy_trans_info + { + flex_int32_t yy_verify; + flex_int32_t yy_nxt; + }; +static yyconst flex_int16_t yy_accept[27] = + { 0, + 1, 1, 17, 15, 1, 16, 12, 6, 7, 4, + 2, 3, 11, 5, 13, 13, 10, 14, 8, 9, + 1, 13, 0, 14, 13, 0 + } ; + +static yyconst flex_int32_t yy_ec[256] = + { 0, + 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 2, 1, 1, 1, 1, 1, 4, 1, 5, + 6, 7, 8, 1, 9, 10, 11, 12, 13, 13, + 13, 13, 13, 13, 13, 13, 13, 1, 1, 1, + 14, 1, 1, 1, 15, 15, 15, 15, 15, 15, + 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, + 17, 1, 18, 1, 16, 1, 15, 15, 15, 15, + + 15, 15, 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, 16, 19, + 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1 + } ; + +static yyconst flex_int32_t yy_meta[20] = + { 0, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 2, 2, 1, 3, 4, 1, 1, 5 + } ; + +static yyconst flex_int16_t yy_base[30] = + { 0, + 0, 0, 35, 36, 32, 36, 36, 36, 36, 36, + 36, 36, 36, 36, 7, 8, 36, 0, 36, 36, + 23, 10, 0, 0, 0, 36, 22, 26, 30 + } ; + +static yyconst flex_int16_t yy_def[30] = + { 0, + 26, 1, 26, 26, 26, 26, 26, 26, 26, 26, + 26, 26, 26, 26, 27, 26, 26, 28, 26, 26, + 26, 26, 29, 28, 29, 0, 26, 26, 26 + } ; + +static yyconst flex_int16_t yy_nxt[56] = + { 0, + 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, + 14, 15, 16, 17, 18, 18, 19, 20, 18, 22, + 22, 22, 22, 22, 21, 23, 22, 24, 24, 24, + 24, 25, 25, 21, 26, 3, 26, 26, 26, 26, + 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, + 26, 26, 26, 26, 26 + } ; + +static yyconst flex_int16_t yy_chk[56] = + { 0, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 16, + 16, 22, 22, 27, 21, 15, 27, 28, 28, 28, + 28, 29, 29, 5, 3, 26, 26, 26, 26, 26, + 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, + 26, 26, 26, 26, 26 + } ; + +/* The intent behind this definition is that it'll catch + * any uses of REJECT which flex missed. + */ +#define REJECT reject_used_but_not_detected +#define yymore() yymore_used_but_not_detected +#define YY_MORE_ADJ 0 +#define YY_RESTORE_YY_MORE_OFFSET +#line 1 "cmdlex.l" +#line 2 "cmdlex.l" +#include "cmdlexcl.h" +#include "cmdpars.h" + +static YY_cl_ucsim_parser_STYPE *yylval; + +int yywrap(void); + +#define tok(x) (YY_cl_ucsim_parser_CLASS::x) +#define lexer_obj (dynamic_cast(this)) + +#line 421 "cmdlex.cc" + +#define INITIAL 0 + +#ifndef YY_NO_UNISTD_H +/* Special case for "unistd.h", since it is non-ANSI. We include it way + * down here because we want the user's section 1 to have been scanned first. + * The user has a chance to override it with an option. + */ +#include +#endif + +#ifndef YY_EXTRA_TYPE +#define YY_EXTRA_TYPE void * +#endif + +#ifndef yytext_ptr +static void yy_flex_strncpy (char *,yyconst char *,int ); +#endif + +#ifdef YY_NEED_STRLEN +static int yy_flex_strlen (yyconst char * ); +#endif + +#ifndef YY_NO_INPUT + +#endif + +/* Amount of stuff to slurp up with each read. */ +#ifndef YY_READ_BUF_SIZE +#define YY_READ_BUF_SIZE 8192 +#endif + +/* Copy whatever the last rule matched to the standard output. */ +#ifndef ECHO +#define ECHO LexerOutput( yytext, yyleng ) +#endif + +/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, + * is returned in "result". + */ +#ifndef YY_INPUT +#define YY_INPUT(buf,result,max_size) \ +\ + if ( (result = LexerInput( (char *) buf, max_size )) < 0 ) \ + YY_FATAL_ERROR( "input in flex scanner failed" ); + +#endif + +/* No semi-colon after return; correct usage is to write "yyterminate();" - + * we don't want an extra ';' after the "return" because that will cause + * some compilers to complain about unreachable statements. + */ +#ifndef yyterminate +#define yyterminate() return YY_NULL +#endif + +/* Number of entries by which start-condition stack grows. */ +#ifndef YY_START_STACK_INCR +#define YY_START_STACK_INCR 25 +#endif + +/* Report a fatal error. */ +#ifndef YY_FATAL_ERROR +#define YY_FATAL_ERROR(msg) LexerError( msg ) +#endif + +/* end tables serialization structures and prototypes */ + +/* Default declaration of generated scanner - a define so the user can + * easily add parameters. + */ +#ifndef YY_DECL +#define YY_DECL_IS_OURS 1 +#define YY_DECL int yyFlexLexer::yylex() +#endif /* !YY_DECL */ + +/* Code executed at the beginning of each rule, after yytext and yyleng + * have been set up. + */ +#ifndef YY_USER_ACTION +#define YY_USER_ACTION +#endif + +/* Code executed at the end of each rule. */ +#ifndef YY_BREAK +#define YY_BREAK break; +#endif + +#define YY_RULE_SETUP \ + YY_USER_ACTION + +/** The main scanner function which does all the work. + */ +YY_DECL +{ + register yy_state_type yy_current_state; + register char *yy_cp, *yy_bp; + register int yy_act; + +#line 14 "cmdlex.l" + + +#line 524 "cmdlex.cc" + + if ( (yy_init) ) + { + (yy_init) = 0; + +#ifdef YY_USER_INIT + YY_USER_INIT; +#endif + + if ( ! (yy_start) ) + (yy_start) = 1; /* first start state */ + + if ( ! yyin ) + yyin = & std::cin; + + if ( ! yyout ) + yyout = & std::cout; + + if ( ! YY_CURRENT_BUFFER ) { + yyensure_buffer_stack (); + YY_CURRENT_BUFFER_LVALUE = + yy_create_buffer( yyin, YY_BUF_SIZE ); + } + + yy_load_buffer_state( ); + } + + while ( 1 ) /* loops until end-of-file is reached */ + { + yy_cp = (yy_c_buf_p); + + /* Support of yytext. */ + *yy_cp = (yy_hold_char); + + /* yy_bp points to the position in yy_ch_buf of the start of + * the current run. + */ + yy_bp = yy_cp; + + yy_current_state = (yy_start); +yy_match: + do + { + register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)]; + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 27 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + ++yy_cp; + } + while ( yy_base[yy_current_state] != 36 ); + +yy_find_action: + yy_act = yy_accept[yy_current_state]; + if ( yy_act == 0 ) + { /* have to back up */ + yy_cp = (yy_last_accepting_cpos); + yy_current_state = (yy_last_accepting_state); + yy_act = yy_accept[yy_current_state]; + } + + YY_DO_BEFORE_ACTION; + +do_action: /* This label is used only to access EOF actions. */ + + switch ( yy_act ) + { /* beginning of action switch */ + case 0: /* must back up */ + /* undo the effects of YY_DO_BEFORE_ACTION */ + *yy_cp = (yy_hold_char); + yy_cp = (yy_last_accepting_cpos); + yy_current_state = (yy_last_accepting_state); + goto yy_find_action; + +case 1: +YY_RULE_SETUP +#line 16 "cmdlex.l" +; + YY_BREAK +case 2: +YY_RULE_SETUP +#line 18 "cmdlex.l" +return(tok(PTOK_PLUS)); + YY_BREAK +case 3: +YY_RULE_SETUP +#line 19 "cmdlex.l" +return(tok(PTOK_MINUS)); + YY_BREAK +case 4: +YY_RULE_SETUP +#line 20 "cmdlex.l" +return(tok(PTOK_ASTERIX)); + YY_BREAK +case 5: +YY_RULE_SETUP +#line 21 "cmdlex.l" +return(tok(PTOK_SLASH)); + YY_BREAK +case 6: +YY_RULE_SETUP +#line 22 "cmdlex.l" +return(tok(PTOK_LEFT_PAREN)); + YY_BREAK +case 7: +YY_RULE_SETUP +#line 23 "cmdlex.l" +return(tok(PTOK_RIGHT_PAREN)); + YY_BREAK +case 8: +YY_RULE_SETUP +#line 24 "cmdlex.l" +return(tok(PTOK_LEFT_BRACKET)); + YY_BREAK +case 9: +YY_RULE_SETUP +#line 25 "cmdlex.l" +return(tok(PTOK_RIGHT_BRACKET)); + YY_BREAK +case 10: +YY_RULE_SETUP +#line 26 "cmdlex.l" +return(tok(PTOK_EQUAL)); + YY_BREAK +case 11: +YY_RULE_SETUP +#line 27 "cmdlex.l" +return(tok(PTOK_DOT)); + YY_BREAK +case 12: +YY_RULE_SETUP +#line 28 "cmdlex.l" +return(tok(PTOK_AMPERSAND)); + YY_BREAK +case 13: +YY_RULE_SETUP +#line 30 "cmdlex.l" +{ + yylval->number= strtol(yytext, 0, 0); + return(YY_cl_ucsim_parser_CLASS::PTOK_NUMBER); +} + YY_BREAK +case 14: +YY_RULE_SETUP +#line 35 "cmdlex.l" +return(lexer_obj->check_id(yytext)); + YY_BREAK +case 15: +YY_RULE_SETUP +#line 37 "cmdlex.l" +; + YY_BREAK +case 16: +YY_RULE_SETUP +#line 39 "cmdlex.l" +ECHO; + YY_BREAK +#line 690 "cmdlex.cc" +case YY_STATE_EOF(INITIAL): + yyterminate(); + + case YY_END_OF_BUFFER: + { + /* Amount of text matched not including the EOB char. */ + int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1; + + /* Undo the effects of YY_DO_BEFORE_ACTION. */ + *yy_cp = (yy_hold_char); + YY_RESTORE_YY_MORE_OFFSET + + if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW ) + { + /* We're scanning a new file or input source. It's + * possible that this happened because the user + * just pointed yyin at a new source and called + * yylex(). If so, then we have to assure + * consistency between YY_CURRENT_BUFFER and our + * globals. Here is the right place to do so, because + * this is the first action (other than possibly a + * back-up) that will match for the new input source. + */ + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; + YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin; + YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL; + } + + /* Note that here we test for yy_c_buf_p "<=" to the position + * of the first EOB in the buffer, since yy_c_buf_p will + * already have been incremented past the NUL character + * (since all states make transitions on EOB to the + * end-of-buffer state). Contrast this with the test + * in input(). + */ + if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) + { /* This was really a NUL. */ + yy_state_type yy_next_state; + + (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text; + + yy_current_state = yy_get_previous_state( ); + + /* Okay, we're now positioned to make the NUL + * transition. We couldn't have + * yy_get_previous_state() go ahead and do it + * for us because it doesn't know how to deal + * with the possibility of jamming (and we don't + * want to build jamming into it because then it + * will run more slowly). + */ + + yy_next_state = yy_try_NUL_trans( yy_current_state ); + + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + + if ( yy_next_state ) + { + /* Consume the NUL. */ + yy_cp = ++(yy_c_buf_p); + yy_current_state = yy_next_state; + goto yy_match; + } + + else + { + yy_cp = (yy_c_buf_p); + goto yy_find_action; + } + } + + else switch ( yy_get_next_buffer( ) ) + { + case EOB_ACT_END_OF_FILE: + { + (yy_did_buffer_switch_on_eof) = 0; + + if ( yywrap( ) ) + { + /* Note: because we've taken care in + * yy_get_next_buffer() to have set up + * yytext, we can now set up + * yy_c_buf_p so that if some total + * hoser (like flex itself) wants to + * call the scanner after we return the + * YY_NULL, it'll still work - another + * YY_NULL will get returned. + */ + (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ; + + yy_act = YY_STATE_EOF(YY_START); + goto do_action; + } + + else + { + if ( ! (yy_did_buffer_switch_on_eof) ) + YY_NEW_FILE; + } + break; + } + + case EOB_ACT_CONTINUE_SCAN: + (yy_c_buf_p) = + (yytext_ptr) + yy_amount_of_matched_text; + + yy_current_state = yy_get_previous_state( ); + + yy_cp = (yy_c_buf_p); + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + goto yy_match; + + case EOB_ACT_LAST_MATCH: + (yy_c_buf_p) = + &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)]; + + yy_current_state = yy_get_previous_state( ); + + yy_cp = (yy_c_buf_p); + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + goto yy_find_action; + } + break; + } + + default: + YY_FATAL_ERROR( + "fatal flex scanner internal error--no action found" ); + } /* end of action switch */ + } /* end of scanning one token */ +} /* end of yylex */ + +yyFlexLexer::yyFlexLexer( std::istream* arg_yyin, std::ostream* arg_yyout ) +{ + yyin = arg_yyin; + yyout = arg_yyout; + yy_c_buf_p = 0; + yy_init = 1; + yy_start = 0; + yy_flex_debug = 0; + yylineno = 1; // this will only get updated if %option yylineno + + yy_did_buffer_switch_on_eof = 0; + + yy_looking_for_trail_begin = 0; + yy_more_flag = 0; + yy_more_len = 0; + yy_more_offset = yy_prev_more_offset = 0; + + yy_start_stack_ptr = yy_start_stack_depth = 0; + yy_start_stack = 0; + + (yy_buffer_stack) = 0; + (yy_buffer_stack_top) = 0; + (yy_buffer_stack_max) = 0; + + yy_state_buf = 0; + +} + +yyFlexLexer::~yyFlexLexer() +{ + delete [] yy_state_buf; + yyfree(yy_start_stack ); + yy_delete_buffer( YY_CURRENT_BUFFER ); +} + +void yyFlexLexer::switch_streams( std::istream* new_in, std::ostream* new_out ) +{ + if ( new_in ) + { + yy_delete_buffer( YY_CURRENT_BUFFER ); + yy_switch_to_buffer( yy_create_buffer( new_in, YY_BUF_SIZE ) ); + } + + if ( new_out ) + yyout = new_out; +} + +#ifdef YY_INTERACTIVE +int yyFlexLexer::LexerInput( char* buf, int /* max_size */ ) +#else +int yyFlexLexer::LexerInput( char* buf, int max_size ) +#endif +{ + if ( yyin->eof() || yyin->fail() ) + return 0; + +#ifdef YY_INTERACTIVE + yyin->get( buf[0] ); + + if ( yyin->eof() ) + return 0; + + if ( yyin->bad() ) + return -1; + + return 1; + +#else + (void) yyin->read( buf, max_size ); + + if ( yyin->bad() ) + return -1; + else + return yyin->gcount(); +#endif +} + +void yyFlexLexer::LexerOutput( const char* buf, int size ) +{ + (void) yyout->write( buf, size ); +} + +/* yy_get_next_buffer - try to read in a new buffer + * + * Returns a code representing an action: + * EOB_ACT_LAST_MATCH - + * EOB_ACT_CONTINUE_SCAN - continue scanning from current position + * EOB_ACT_END_OF_FILE - end of file + */ +int yyFlexLexer::yy_get_next_buffer() +{ + register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; + register char *source = (yytext_ptr); + register int number_to_move, i; + int ret_val; + + if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] ) + YY_FATAL_ERROR( + "fatal flex scanner internal error--end of buffer missed" ); + + if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 ) + { /* Don't try to fill the buffer, so this is an EOF. */ + if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 ) + { + /* We matched a single character, the EOB, so + * treat this as a final EOF. + */ + return EOB_ACT_END_OF_FILE; + } + + else + { + /* We matched some text prior to the EOB, first + * process it. + */ + return EOB_ACT_LAST_MATCH; + } + } + + /* Try to read more data. */ + + /* First move last chars to start of buffer. */ + number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1; + + for ( i = 0; i < number_to_move; ++i ) + *(dest++) = *(source++); + + if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING ) + /* don't do the read, it's not guaranteed to return an EOF, + * just force an EOF + */ + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0; + + else + { + size_t num_to_read = + YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; + + while ( num_to_read <= 0 ) + { /* Not enough room in the buffer - grow it. */ + + /* just a shorter name for the current buffer */ + YY_BUFFER_STATE b = YY_CURRENT_BUFFER; + + int yy_c_buf_p_offset = + (int) ((yy_c_buf_p) - b->yy_ch_buf); + + if ( b->yy_is_our_buffer ) + { + int new_size = b->yy_buf_size * 2; + + if ( new_size <= 0 ) + b->yy_buf_size += b->yy_buf_size / 8; + else + b->yy_buf_size *= 2; + + b->yy_ch_buf = (char *) + /* Include room in for 2 EOB chars. */ + yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ); + } + else + /* Can't grow it, we don't own it. */ + b->yy_ch_buf = 0; + + if ( ! b->yy_ch_buf ) + YY_FATAL_ERROR( + "fatal error - scanner input buffer overflow" ); + + (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset]; + + num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size - + number_to_move - 1; + + } + + if ( num_to_read > YY_READ_BUF_SIZE ) + num_to_read = YY_READ_BUF_SIZE; + + /* Read in more data. */ + YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]), + (yy_n_chars), num_to_read ); + + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + if ( (yy_n_chars) == 0 ) + { + if ( number_to_move == YY_MORE_ADJ ) + { + ret_val = EOB_ACT_END_OF_FILE; + yyrestart( yyin ); + } + + else + { + ret_val = EOB_ACT_LAST_MATCH; + YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = + YY_BUFFER_EOF_PENDING; + } + } + + else + ret_val = EOB_ACT_CONTINUE_SCAN; + + (yy_n_chars) += number_to_move; + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR; + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR; + + (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0]; + + return ret_val; +} + +/* yy_get_previous_state - get the state just before the EOB char was reached */ + + yy_state_type yyFlexLexer::yy_get_previous_state() +{ + register yy_state_type yy_current_state; + register char *yy_cp; + + yy_current_state = (yy_start); + + for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp ) + { + register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1); + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 27 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + } + + return yy_current_state; +} + +/* yy_try_NUL_trans - try to make a transition on the NUL character + * + * synopsis + * next_state = yy_try_NUL_trans( current_state ); + */ + yy_state_type yyFlexLexer::yy_try_NUL_trans( yy_state_type yy_current_state ) +{ + register int yy_is_jam; + register char *yy_cp = (yy_c_buf_p); + + register YY_CHAR yy_c = 1; + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 27 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + yy_is_jam = (yy_current_state == 26); + + return yy_is_jam ? 0 : yy_current_state; +} + + void yyFlexLexer::yyunput( int c, register char* yy_bp) +{ + register char *yy_cp; + + yy_cp = (yy_c_buf_p); + + /* undo effects of setting up yytext */ + *yy_cp = (yy_hold_char); + + if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) + { /* need to shift things up to make room */ + /* +2 for EOB chars. */ + register int number_to_move = (yy_n_chars) + 2; + register char *dest = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[ + YY_CURRENT_BUFFER_LVALUE->yy_buf_size + 2]; + register char *source = + &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]; + + while ( source > YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) + *--dest = *--source; + + yy_cp += (int) (dest - source); + yy_bp += (int) (dest - source); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_buf_size; + + if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) + YY_FATAL_ERROR( "flex scanner push-back overflow" ); + } + + *--yy_cp = (char) c; + + (yytext_ptr) = yy_bp; + (yy_hold_char) = *yy_cp; + (yy_c_buf_p) = yy_cp; +} + + int yyFlexLexer::yyinput() +{ + int c; + + *(yy_c_buf_p) = (yy_hold_char); + + if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR ) + { + /* yy_c_buf_p now points to the character we want to return. + * If this occurs *before* the EOB characters, then it's a + * valid NUL; if not, then we've hit the end of the buffer. + */ + if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) + /* This was really a NUL. */ + *(yy_c_buf_p) = '\0'; + + else + { /* need more input */ + int offset = (yy_c_buf_p) - (yytext_ptr); + ++(yy_c_buf_p); + + switch ( yy_get_next_buffer( ) ) + { + case EOB_ACT_LAST_MATCH: + /* This happens because yy_g_n_b() + * sees that we've accumulated a + * token and flags that we need to + * try matching the token before + * proceeding. But for input(), + * there's no matching to consider. + * So convert the EOB_ACT_LAST_MATCH + * to EOB_ACT_END_OF_FILE. + */ + + /* Reset buffer status. */ + yyrestart( yyin ); + + /*FALLTHROUGH*/ + + case EOB_ACT_END_OF_FILE: + { + if ( yywrap( ) ) + return EOF; + + if ( ! (yy_did_buffer_switch_on_eof) ) + YY_NEW_FILE; +#ifdef __cplusplus + return yyinput(); +#else + return input(); +#endif + } + + case EOB_ACT_CONTINUE_SCAN: + (yy_c_buf_p) = (yytext_ptr) + offset; + break; + } + } + } + + c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */ + *(yy_c_buf_p) = '\0'; /* preserve yytext */ + (yy_hold_char) = *++(yy_c_buf_p); + + return c; +} + +/** Immediately switch to a different input stream. + * @param input_file A readable stream. + * + * @note This function does not reset the start condition to @c INITIAL . + */ + void yyFlexLexer::yyrestart( std::istream* input_file ) +{ + + if ( ! YY_CURRENT_BUFFER ){ + yyensure_buffer_stack (); + YY_CURRENT_BUFFER_LVALUE = + yy_create_buffer( yyin, YY_BUF_SIZE ); + } + + yy_init_buffer( YY_CURRENT_BUFFER, input_file ); + yy_load_buffer_state( ); +} + +/** Switch to a different input buffer. + * @param new_buffer The new input buffer. + * + */ + void yyFlexLexer::yy_switch_to_buffer( YY_BUFFER_STATE new_buffer ) +{ + + /* TODO. We should be able to replace this entire function body + * with + * yypop_buffer_state(); + * yypush_buffer_state(new_buffer); + */ + yyensure_buffer_stack (); + if ( YY_CURRENT_BUFFER == new_buffer ) + return; + + if ( YY_CURRENT_BUFFER ) + { + /* Flush out information for old buffer. */ + *(yy_c_buf_p) = (yy_hold_char); + YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + YY_CURRENT_BUFFER_LVALUE = new_buffer; + yy_load_buffer_state( ); + + /* We don't actually know whether we did this switch during + * EOF (yywrap()) processing, but the only time this flag + * is looked at is after yywrap() is called, so it's safe + * to go ahead and always set it. + */ + (yy_did_buffer_switch_on_eof) = 1; +} + + void yyFlexLexer::yy_load_buffer_state() +{ + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; + (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos; + yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file; + (yy_hold_char) = *(yy_c_buf_p); +} + +/** Allocate and initialize an input buffer state. + * @param file A readable stream. + * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE. + * + * @return the allocated buffer state. + */ + YY_BUFFER_STATE yyFlexLexer::yy_create_buffer( std::istream* file, int size ) +{ + YY_BUFFER_STATE b; + + b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); + if ( ! b ) + YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); + + b->yy_buf_size = size; + + /* yy_ch_buf has to be 2 characters longer than the size given because + * we need to put in 2 end-of-buffer characters. + */ + b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 ); + if ( ! b->yy_ch_buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); + + b->yy_is_our_buffer = 1; + + yy_init_buffer( b, file ); + + return b; +} + +/** Destroy the buffer. + * @param b a buffer created with yy_create_buffer() + * + */ + void yyFlexLexer::yy_delete_buffer( YY_BUFFER_STATE b ) +{ + + if ( ! b ) + return; + + if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */ + YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0; + + if ( b->yy_is_our_buffer ) + yyfree((void *) b->yy_ch_buf ); + + yyfree((void *) b ); +} + +extern "C" int isatty (int ); + +/* Initializes or reinitializes a buffer. + * This function is sometimes called more than once on the same buffer, + * such as during a yyrestart() or at EOF. + */ + void yyFlexLexer::yy_init_buffer( YY_BUFFER_STATE b, std::istream* file ) + +{ + int oerrno = errno; + + yy_flush_buffer( b ); + + b->yy_input_file = file; + b->yy_fill_buffer = 1; + + /* If b is the current buffer, then yy_init_buffer was _probably_ + * called from yyrestart() or through yy_get_next_buffer. + * In that case, we don't want to reset the lineno or column. + */ + if (b != YY_CURRENT_BUFFER){ + b->yy_bs_lineno = 1; + b->yy_bs_column = 0; + } + + b->yy_is_interactive = 0; + errno = oerrno; +} + +/** Discard all buffered characters. On the next scan, YY_INPUT will be called. + * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER. + * + */ + void yyFlexLexer::yy_flush_buffer( YY_BUFFER_STATE b ) +{ + if ( ! b ) + return; + + b->yy_n_chars = 0; + + /* We always need two end-of-buffer characters. The first causes + * a transition to the end-of-buffer state. The second causes + * a jam in that state. + */ + b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR; + b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR; + + b->yy_buf_pos = &b->yy_ch_buf[0]; + + b->yy_at_bol = 1; + b->yy_buffer_status = YY_BUFFER_NEW; + + if ( b == YY_CURRENT_BUFFER ) + yy_load_buffer_state( ); +} + +/** Pushes the new state onto the stack. The new state becomes + * the current state. This function will allocate the stack + * if necessary. + * @param new_buffer The new state. + * + */ +void yyFlexLexer::yypush_buffer_state (YY_BUFFER_STATE new_buffer) +{ + if (new_buffer == NULL) + return; + + yyensure_buffer_stack(); + + /* This block is copied from yy_switch_to_buffer. */ + if ( YY_CURRENT_BUFFER ) + { + /* Flush out information for old buffer. */ + *(yy_c_buf_p) = (yy_hold_char); + YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + /* Only push if top exists. Otherwise, replace top. */ + if (YY_CURRENT_BUFFER) + (yy_buffer_stack_top)++; + YY_CURRENT_BUFFER_LVALUE = new_buffer; + + /* copied from yy_switch_to_buffer. */ + yy_load_buffer_state( ); + (yy_did_buffer_switch_on_eof) = 1; +} + +/** Removes and deletes the top of the stack, if present. + * The next element becomes the new top. + * + */ +void yyFlexLexer::yypop_buffer_state (void) +{ + if (!YY_CURRENT_BUFFER) + return; + + yy_delete_buffer(YY_CURRENT_BUFFER ); + YY_CURRENT_BUFFER_LVALUE = NULL; + if ((yy_buffer_stack_top) > 0) + --(yy_buffer_stack_top); + + if (YY_CURRENT_BUFFER) { + yy_load_buffer_state( ); + (yy_did_buffer_switch_on_eof) = 1; + } +} + +/* Allocates the stack if it does not exist. + * Guarantees space for at least one push. + */ +void yyFlexLexer::yyensure_buffer_stack(void) +{ + int num_to_alloc; + + if (!(yy_buffer_stack)) { + + /* First allocation is just for 2 elements, since we don't know if this + * scanner will even need a stack. We use 2 instead of 1 to avoid an + * immediate realloc on the next call. + */ + num_to_alloc = 1; + (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc + (num_to_alloc * sizeof(struct yy_buffer_state*) + ); + + memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*)); + + (yy_buffer_stack_max) = num_to_alloc; + (yy_buffer_stack_top) = 0; + return; + } + + if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){ + + /* Increase the buffer to prepare for a possible push. */ + int grow_size = 8 /* arbitrary grow size */; + + num_to_alloc = (yy_buffer_stack_max) + grow_size; + (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc + ((yy_buffer_stack), + num_to_alloc * sizeof(struct yy_buffer_state*) + ); + + /* zero only the new slots.*/ + memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*)); + (yy_buffer_stack_max) = num_to_alloc; + } +} + + void yyFlexLexer::yy_push_state( int new_state ) +{ + if ( (yy_start_stack_ptr) >= (yy_start_stack_depth) ) + { + yy_size_t new_size; + + (yy_start_stack_depth) += YY_START_STACK_INCR; + new_size = (yy_start_stack_depth) * sizeof( int ); + + if ( ! (yy_start_stack) ) + (yy_start_stack) = (int *) yyalloc(new_size ); + + else + (yy_start_stack) = (int *) yyrealloc((void *) (yy_start_stack),new_size ); + + if ( ! (yy_start_stack) ) + YY_FATAL_ERROR( + "out of memory expanding start-condition stack" ); + } + + (yy_start_stack)[(yy_start_stack_ptr)++] = YY_START; + + BEGIN(new_state); +} + + void yyFlexLexer::yy_pop_state() +{ + if ( --(yy_start_stack_ptr) < 0 ) + YY_FATAL_ERROR( "start-condition stack underflow" ); + + BEGIN((yy_start_stack)[(yy_start_stack_ptr)]); +} + + int yyFlexLexer::yy_top_state() +{ + return (yy_start_stack)[(yy_start_stack_ptr) - 1]; +} + +#ifndef YY_EXIT_FAILURE +#define YY_EXIT_FAILURE 2 +#endif + +void yyFlexLexer::LexerError( yyconst char msg[] ) +{ + std::cerr << msg << std::endl; + exit( YY_EXIT_FAILURE ); +} + +/* Redefine yyless() so it works in section 3 code. */ + +#undef yyless +#define yyless(n) \ + do \ + { \ + /* Undo effects of setting up yytext. */ \ + int yyless_macro_arg = (n); \ + YY_LESS_LINENO(yyless_macro_arg);\ + yytext[yyleng] = (yy_hold_char); \ + (yy_c_buf_p) = yytext + yyless_macro_arg; \ + (yy_hold_char) = *(yy_c_buf_p); \ + *(yy_c_buf_p) = '\0'; \ + yyleng = yyless_macro_arg; \ + } \ + while ( 0 ) + +/* Accessor methods (get/set functions) to struct members. */ + +/* + * Internal utility routines. + */ + +#ifndef yytext_ptr +static void yy_flex_strncpy (char* s1, yyconst char * s2, int n ) +{ + register int i; + for ( i = 0; i < n; ++i ) + s1[i] = s2[i]; +} +#endif + +#ifdef YY_NEED_STRLEN +static int yy_flex_strlen (yyconst char * s ) +{ + register int n; + for ( n = 0; s[n]; ++n ) + ; + + return n; +} +#endif + +void *yyalloc (yy_size_t size ) +{ + return (void *) malloc( size ); +} + +void *yyrealloc (void * ptr, yy_size_t size ) +{ + /* The cast to (char *) in the following accommodates both + * implementations that use char* generic pointers, and those + * that use void* generic pointers. It works with the latter + * because both ANSI C and C++ allow castless assignment from + * any pointer type to void*, and deal with argument conversions + * as though doing an assignment. + */ + return (void *) realloc( (char *) ptr, size ); +} + +void yyfree (void * ptr ) +{ + free( (char *) ptr ); /* see yyrealloc() for (char *) cast */ +} + +#define YYTABLES_NAME "yytables" + +#undef YY_NEW_FILE +#undef YY_FLUSH_BUFFER +#undef yy_set_bol +#undef yy_new_buffer +#undef yy_set_interactive +#undef yytext_ptr +#undef YY_DO_BEFORE_ACTION + +#ifdef YY_DECL_IS_OURS +#undef YY_DECL_IS_OURS +#undef YY_DECL +#endif +#line 39 "cmdlex.l" + + + +#undef lexer_obj + +int +yywrap(void) +{ + return(1); +} + +#include "cmdlexcl.h" +#include "globals.h" + +int +cl_ucsim_lexer::LexerInput(char *buf, int max_size) +{ + if (!string_to_parse) + return(yyFlexLexer::LexerInput(buf, max_size)); + int lrem= strlen(string_ptr); + int n= max_size; + if (lrem < max_size) + n= lrem; + strncpy(buf, string_ptr, n); + string_ptr+= n; + return(n); +} + +void +cl_ucsim_lexer::activate_lexer_to_parse_into(void *yylv) +{ + yylval= (YY_cl_ucsim_parser_STYPE *)yylv; +} + +int +cl_ucsim_lexer::check_id(char *token) +{ + class cl_uc *uc= application->get_uc(); + //printf("checking id=\"%s\"\n",token); + + if (uc) + { + class cl_memory *mem= uc->memory(token); + if (mem) + { + yylval->memory_object= mem; + return(tok(PTOK_MEMORY_OBJECT)); + } + + t_addr addr; + bool found= uc->symbol2address(yytext, uc->sfr_tbl(), &addr); + if (found) + { + /*yylval->number= addr; + return(tok(PTOK_NUMBER));*/ + yylval->memory.memory= uc->address_space(MEM_SFR_ID); + yylval->memory.address= addr; + return(tok(PTOK_MEMORY)); + } + + found= uc->symbol2address(yytext, uc->bit_tbl(), &addr); + if (found) + { + t_addr memaddr; + t_mem mask; + yylval->bit.memory= uc->bit2mem(addr, &memaddr, &mask); + yylval->bit.mem_address= memaddr; + yylval->bit.bit_address= addr; + yylval->bit.mask= mask; + return(tok(PTOK_BIT)); + } + } + + return(0); +} + diff --git a/sim/ucsim/cmd.src/cmdlex.l b/sim/ucsim/cmd.src/cmdlex.l new file mode 100644 index 0000000..4522fab --- /dev/null +++ b/sim/ucsim/cmd.src/cmdlex.l @@ -0,0 +1,112 @@ +%{ +#include "cmdlexcl.h" +#include "cmdpars.h" + +static YY_cl_ucsim_parser_STYPE *yylval; + +int yywrap(void); + +#define tok(x) (YY_cl_ucsim_parser_CLASS::x) +#define lexer_obj (dynamic_cast(this)) + +%} + +%% + +[ \t]* ; + +"+" return(tok(PTOK_PLUS)); +"-" return(tok(PTOK_MINUS)); +"*" return(tok(PTOK_ASTERIX)); +"/" return(tok(PTOK_SLASH)); +"(" return(tok(PTOK_LEFT_PAREN)); +")" return(tok(PTOK_RIGHT_PAREN)); +"[" return(tok(PTOK_LEFT_BRACKET)); +"]" return(tok(PTOK_RIGHT_BRACKET)); +"=" return(tok(PTOK_EQUAL)); +"." return(tok(PTOK_DOT)); +"&" return(tok(PTOK_AMPERSAND)); + +([0-9]+)|(0x[0-9a-fA-F]+) { + yylval->number= strtol(yytext, 0, 0); + return(YY_cl_ucsim_parser_CLASS::PTOK_NUMBER); +} + +[a-zA-Z_][0-9a-zA-Z_]* return(lexer_obj->check_id(yytext)); + +. ; + +%% + +#undef lexer_obj + +int +yywrap(void) +{ + return(1); +} + +#include "cmdlexcl.h" +#include "globals.h" + +int +cl_ucsim_lexer::LexerInput(char *buf, int max_size) +{ + if (!string_to_parse) + return(yyFlexLexer::LexerInput(buf, max_size)); + int lrem= strlen(string_ptr); + int n= max_size; + if (lrem < max_size) + n= lrem; + strncpy(buf, string_ptr, n); + string_ptr+= n; + return(n); +} + +void +cl_ucsim_lexer::activate_lexer_to_parse_into(void *yylv) +{ + yylval= (YY_cl_ucsim_parser_STYPE *)yylv; +} + +int +cl_ucsim_lexer::check_id(char *token) +{ + class cl_uc *uc= application->get_uc(); + //printf("checking id=\"%s\"\n",token); + + if (uc) + { + class cl_memory *mem= uc->memory(token); + if (mem) + { + yylval->memory_object= mem; + return(tok(PTOK_MEMORY_OBJECT)); + } + + t_addr addr; + bool found= uc->symbol2address(yytext, uc->sfr_tbl(), &addr); + if (found) + { + /*yylval->number= addr; + return(tok(PTOK_NUMBER));*/ + yylval->memory.memory= uc->address_space(MEM_SFR_ID); + yylval->memory.address= addr; + return(tok(PTOK_MEMORY)); + } + + found= uc->symbol2address(yytext, uc->bit_tbl(), &addr); + if (found) + { + t_addr memaddr; + t_mem mask; + yylval->bit.memory= uc->bit2mem(addr, &memaddr, &mask); + yylval->bit.mem_address= memaddr; + yylval->bit.bit_address= addr; + yylval->bit.mask= mask; + return(tok(PTOK_BIT)); + } + } + + return(0); +} diff --git a/sim/ucsim/cmd.src/cmdlexcl.h b/sim/ucsim/cmd.src/cmdlexcl.h new file mode 100644 index 0000000..9b19d10 --- /dev/null +++ b/sim/ucsim/cmd.src/cmdlexcl.h @@ -0,0 +1,44 @@ +#ifndef CMDLEXCL_HEADER +#define CMDLEXCL_HEADER + +#include +//#ifndef __FLEX_LEXER_H +//#include +//#endif +#include "flex_lexer.h" +#include "i_string.h" + +#include "pobjcl.h" + + +class cl_ucsim_lexer: public yyFlexLexer +{ +protected: + char *string_to_parse; + char *string_ptr; +public: + cl_ucsim_lexer(void): yyFlexLexer() + { + string_to_parse= string_ptr= 0; + } + cl_ucsim_lexer(char *str): yyFlexLexer() + { + string_to_parse= string_ptr= strdup(str); + } + virtual ~cl_ucsim_lexer(void) + { + if (string_to_parse) + { + free(string_to_parse); + string_to_parse= 0; + } + } + void activate_lexer_to_parse_into(void *yylv); +protected: + int LexerInput(char *buf, int max_size); +public: + int check_id(char *token); +}; + + +#endif diff --git a/sim/ucsim/cmd.src/cmdmem.cc b/sim/ucsim/cmd.src/cmdmem.cc new file mode 100644 index 0000000..b2cdcaa --- /dev/null +++ b/sim/ucsim/cmd.src/cmdmem.cc @@ -0,0 +1,219 @@ +/* + * Simulator of microcontrollers (cmd.src/cmdmem.cc) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +// prj +#include "globals.h" +#include "utils.h" + +// sim +#include "simcl.h" + +// local +#include "cmdmemcl.h" + + +/* + * Command: memory createchip + *---------------------------------------------------------------------------- + */ + +//int +//cl_conf_addmem_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_memory_createchip_cmd) +{ + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + char *memid= NULL; + int size= -1; + int width= 8; + + if (cmdline->syntax_match(uc, STRING NUMBER)) { + memid= params[0]->value.string.string; + size= params[1]->value.number; + } + else if (cmdline->syntax_match(uc, STRING NUMBER NUMBER)) { + memid= params[0]->value.string.string; + size= params[1]->value.number; + width= params[2]->value.number; + } + else + con->dd_printf("Syntax error.\n"); + + if (!memid || + !*memid) + con->dd_printf("Wrong id\n"); + else if (size < 1) + con->dd_printf("Wrong size\n"); + else + { + class cl_memory *mem= new cl_memory_chip(memid, size, width); + mem->init(); + uc->memchips->add(mem); + mem->set_uc(uc); + } + return(DD_FALSE); +} + + +/* + * Command: memory createaddressspace + *---------------------------------------------------------------------------- + */ + +//int +//cl_conf_addmem_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_memory_createaddressspace_cmd) +{ + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + char *memid= NULL; + int start= 0, size= -1, width= 8; + + if (cmdline->syntax_match(uc, STRING NUMBER)) { + memid= params[0]->value.string.string; + size= params[1]->value.number; + } + else if (cmdline->syntax_match(uc, STRING NUMBER NUMBER)) { + memid= params[0]->value.string.string; + start= params[1]->value.number; + size= params[2]->value.number; + } + else if (cmdline->syntax_match(uc, STRING NUMBER NUMBER NUMBER)) { + memid= params[0]->value.string.string; + start= params[1]->value.number; + size= params[2]->value.number; + width= params[3]->value.number; + } + else + con->dd_printf("Syntax error.\n"); + + if (!memid || + !*memid) + con->dd_printf("Wrong id\n"); + else if (size < 1) + con->dd_printf("Wrong size\n"); + else + { + class cl_address_space *mem= + new cl_address_space(memid, start, size, width); + mem->init(); + uc->address_spaces->add(mem); + mem->set_uc(uc); + } + return(DD_FALSE); +} + + +/* + * Command: memory createaddressdecoder + *---------------------------------------------------------------------------- + */ + +//int +//cl_conf_addmem_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_memory_createaddressdecoder_cmd) +{ + class cl_cmd_arg *params[5]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3), + cmdline->param(4) }; + class cl_memory *as= 0, *chip= 0; + t_addr as_begin= 0, as_end= 0, chip_begin= 0; + + if (cmdline->syntax_match(uc, MEMORY MEMORY)) { + as= params[0]->value.memory.memory; + as_end= as->highest_valid_address(); + chip= params[1]->value.memory.memory; + } + else if (cmdline->syntax_match(uc, MEMORY MEMORY NUMBER)) { + as= params[0]->value.memory.memory; + as_end= as->highest_valid_address(); + chip= params[1]->value.memory.memory; + chip_begin= params[2]->value.number; + } + else if (cmdline->syntax_match(uc, MEMORY NUMBER MEMORY)) { + as= params[0]->value.memory.memory; + as_begin= params[1]->value.number; + as_end= as->highest_valid_address(); + chip= params[2]->value.memory.memory; + } + else if (cmdline->syntax_match(uc, MEMORY NUMBER MEMORY NUMBER)) { + as= params[0]->value.memory.memory; + as_begin= params[1]->value.number; + as_end= as->highest_valid_address(); + chip= params[2]->value.memory.memory; + chip_begin= params[3]->value.number; + } + else if (cmdline->syntax_match(uc, MEMORY NUMBER NUMBER MEMORY)) { + as= params[0]->value.memory.memory; + as_begin= params[1]->value.number; + as_end= params[2]->value.number; + chip= params[3]->value.memory.memory; + } + else if (cmdline->syntax_match(uc, MEMORY NUMBER NUMBER MEMORY NUMBER)) { + as= params[0]->value.memory.memory; + as_begin= params[1]->value.number; + as_end= params[2]->value.number; + chip= params[3]->value.memory.memory; + chip_begin= params[4]->value.number; + } + else + con->dd_printf("Syntax error.\n"); + + if (!as->is_address_space()) + con->dd_printf("%s is not an address space\n", as->get_name("unknown")); + else if (!chip->is_chip()) + con->dd_printf("%s is not a memory chip\n", chip->get_name("unknown")); + else if (as_begin > as_end) + con->dd_printf("Wrong address area specification\n"); + else if (chip_begin >= chip->get_size()) + con->dd_printf("Wrong chip area specification\n"); + else if (as_begin < as->start_address || + as_end > as->highest_valid_address()) + con->dd_printf("Specified area is out of address space\n"); + else if (as_end-as_begin > chip->get_size()-chip_begin) + con->dd_printf("Specified area is out of chip size\n"); + else + { + class cl_address_decoder *d= + new cl_address_decoder(as, chip, as_begin, as_end, chip_begin); + ((class cl_address_space *)as)->decoders->add(d); + d->activate(con); + } + return(DD_FALSE); +} + + +/* End of cmd.src/cmdmem.cc */ diff --git a/sim/ucsim/cmd.src/cmdmemcl.h b/sim/ucsim/cmd.src/cmdmemcl.h new file mode 100644 index 0000000..be18f97 --- /dev/null +++ b/sim/ucsim/cmd.src/cmdmemcl.h @@ -0,0 +1,46 @@ +/* + * Simulator of microcontrollers (cmd.src/cmdmemcl.h) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_CMDMEM_HEADER +#define CMD_CMDMEM_HEADER + +#include "newcmdcl.h" + + +// MEMORY CREATECHIP +COMMAND_ON(uc,cl_memory_createchip_cmd); + +// MEMORY CREATEADDRESSSPACE +COMMAND_ON(uc,cl_memory_createaddressspace_cmd); + +// MEMORY CREATEADDRESSDECODER +COMMAND_ON(uc,cl_memory_createaddressdecoder_cmd); + + +#endif + +/* End of cmd.src/cmdmemcl.h */ diff --git a/sim/ucsim/cmd.src/cmdpars.cc b/sim/ucsim/cmd.src/cmdpars.cc new file mode 100644 index 0000000..ffd62ce --- /dev/null +++ b/sim/ucsim/cmd.src/cmdpars.cc @@ -0,0 +1,1445 @@ +#define YY_cl_ucsim_parser_h_included +#define YY_USE_CLASS + +/* A Bison++ parser, made from cmdpars.y */ + + /* with Bison++ version bison++ Version 1.21.9-1, adapted from GNU bison by coetmeur@icdc.fr +Maintained by Magnus Ekdahl + */ + +#define YY_USE_CLASS + +#line 1 "/usr/share/bison++/bison.cc" +/* -*-C-*- Note some compilers choke on comments on `#line' lines. */ +/* Skeleton output parser for bison, + Copyright (C) 1984, 1989, 1990 Bob Corbett and Richard Stallman + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 1, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + + As a special exception, when this file is copied by Bison++ into a + Bison++ output file, you may use that output file without restriction. + This special exception was added by the Free Software Foundation + in version 1.24 of Bison, and has been in Bison++ since 1.21.9. + +*/ + +/* HEADER SECTION */ +#if defined( _MSDOS ) || defined(MSDOS) || defined(__MSDOS__) + #define __MSDOS_AND_ALIKE +#endif + +#if defined(_WINDOWS) && defined(_MSC_VER) + #define __HAVE_NO_ALLOCA + #define __MSDOS_AND_ALIKE +#endif + +#ifndef alloca + #if defined( __GNUC__) + #define alloca __builtin_alloca + + #elif (!defined (__STDC__) && defined (sparc)) || defined (__sparc__) || defined (__sparc) || defined (__sgi) + #include + + #elif defined (__MSDOS_AND_ALIKE) + #include + #ifndef __TURBOC__ + /* MS C runtime lib */ + #define alloca _alloca + #endif + + #elif defined(_AIX) + /* pragma must be put before any C/C++ instruction !! */ + #pragma alloca + #include + + #elif defined(__hpux) + #ifdef __cplusplus + extern "C" { + void *alloca (unsigned int); + }; + #else /* not __cplusplus */ + void *alloca (); + #endif /* not __cplusplus */ + + #endif /* not _AIX not MSDOS, or __TURBOC__ or _AIX, not sparc. */ +#endif /* alloca not defined. */ + +#ifdef c_plusplus + #ifndef __cplusplus + #define __cplusplus + #endif +#endif + +#ifdef __cplusplus + #ifndef YY_USE_CLASS +/*#warning "For C++ its recomended to use bison++, otherwise classes won't be generated"*/ + #endif +#else + #ifndef __STDC__ + #define const + #endif + #ifdef YY_USE_CLASS + #error "This is a C++ header generated by bison++, please use a C++ compiler!" + #endif +#endif + +#include +#define YYBISON 1 + + #line 88 "/usr/share/bison++/bison.cc" +#line 3 "cmdpars.y" + +#include "cmdlexcl.h" +#include "memcl.h" +#include "globals.h" +#include "stypes.h" +#define YY_cl_ucsim_parser_INHERIT : public cl_base +#define YY_cl_ucsim_parser_MEMBERS class cl_ucsim_lexer *lexer_object;\ +virtual ~YY_cl_ucsim_parser_CLASS(void) { delete lexer_object; } +#define YY_cl_ucsim_parser_CONSTRUCTOR_PARAM \ +class cl_ucsim_lexer *the_lexer +#define YY_cl_ucsim_parser_CONSTRUCTOR_CODE \ +lexer_object= the_lexer; + +#line 43 "cmdpars.y" +typedef union { + long number; + class cl_memory *memory_object; + struct { + class cl_memory *memory; + long address; + } memory; + struct { + class cl_memory *memory; + long mem_address, bit_address; + long mask; + } bit; +} yy_cl_ucsim_parser_stype; +#define YY_cl_ucsim_parser_STYPE yy_cl_ucsim_parser_stype + +#line 88 "/usr/share/bison++/bison.cc" +/* %{ and %header{ and %union, during decl */ +#define YY_cl_ucsim_parser_BISON 1 + +#ifndef YY_cl_ucsim_parser_COMPATIBILITY + #ifndef YY_USE_CLASS + #define YY_cl_ucsim_parser_COMPATIBILITY 1 + #else + #define YY_cl_ucsim_parser_COMPATIBILITY 0 + #endif +#endif + +#if YY_cl_ucsim_parser_COMPATIBILITY != 0 + /* backward compatibility */ + #ifdef YYLTYPE + #ifndef YY_cl_ucsim_parser_LTYPE + #define YY_cl_ucsim_parser_LTYPE YYLTYPE + #endif + #endif +/* Testing alternative bison solution + /#ifdef YYSTYPE*/ +#ifndef YY_cl_ucsim_parser_STYPE + #define YY_cl_ucsim_parser_STYPE YYSTYPE +#endif +/*#endif*/ + #ifdef YYDEBUG + #ifndef YY_cl_ucsim_parser_DEBUG + #define YY_cl_ucsim_parser_DEBUG YYDEBUG + #endif + #endif + + /* use goto to be compatible */ + #ifndef YY_cl_ucsim_parser_USE_GOTO + #define YY_cl_ucsim_parser_USE_GOTO 1 + #endif +#endif + +/* use no goto to be clean in C++ */ +#ifndef YY_cl_ucsim_parser_USE_GOTO + #define YY_cl_ucsim_parser_USE_GOTO 0 +#endif + +#ifndef YY_cl_ucsim_parser_PURE + + #line 130 "/usr/share/bison++/bison.cc" +#define YY_cl_ucsim_parser_PURE 1 + +#line 130 "/usr/share/bison++/bison.cc" +/* YY_cl_ucsim_parser_PURE */ +#endif + +/* section apres lecture def, avant lecture grammaire S2 */ + + #line 134 "/usr/share/bison++/bison.cc" + +#line 134 "/usr/share/bison++/bison.cc" +/* prefix */ +#ifndef YY_cl_ucsim_parser_DEBUG + + #line 136 "/usr/share/bison++/bison.cc" + +#line 136 "/usr/share/bison++/bison.cc" +/* YY_cl_ucsim_parser_DEBUG */ +#endif + + +#ifndef YY_cl_ucsim_parser_LSP_NEEDED + + #line 141 "/usr/share/bison++/bison.cc" + +#line 141 "/usr/share/bison++/bison.cc" + /* YY_cl_ucsim_parser_LSP_NEEDED*/ +#endif + + + +/* DEFAULT LTYPE*/ +#ifdef YY_cl_ucsim_parser_LSP_NEEDED +#ifndef YY_cl_ucsim_parser_LTYPE +#ifndef BISON_YYLTYPE_ISDECLARED +#define BISON_YYLTYPE_ISDECLARED +typedef + struct yyltype + { + int timestamp; + int first_line; + int first_column; + int last_line; + int last_column; + char *text; + } + yyltype; + +#endif +#define YY_cl_ucsim_parser_LTYPE yyltype +#endif +#endif +/* DEFAULT STYPE*/ + /* We used to use `unsigned long' as YY_cl_ucsim_parser_STYPE on MSDOS, + but it seems better to be consistent. + Most programs should declare their own type anyway. */ + +#ifndef YY_cl_ucsim_parser_STYPE +#define YY_cl_ucsim_parser_STYPE int +#endif +/* DEFAULT MISCELANEOUS */ +#ifndef YY_cl_ucsim_parser_PARSE +#define YY_cl_ucsim_parser_PARSE yyparse +#endif +#ifndef YY_cl_ucsim_parser_LEX +#define YY_cl_ucsim_parser_LEX yylex +#endif +#ifndef YY_cl_ucsim_parser_LVAL +#define YY_cl_ucsim_parser_LVAL yylval +#endif +#ifndef YY_cl_ucsim_parser_LLOC +#define YY_cl_ucsim_parser_LLOC yylloc +#endif +#ifndef YY_cl_ucsim_parser_CHAR +#define YY_cl_ucsim_parser_CHAR yychar +#endif +#ifndef YY_cl_ucsim_parser_NERRS +#define YY_cl_ucsim_parser_NERRS yynerrs +#endif +#ifndef YY_cl_ucsim_parser_DEBUG_FLAG +#define YY_cl_ucsim_parser_DEBUG_FLAG yydebug +#endif +#ifndef YY_cl_ucsim_parser_ERROR +#define YY_cl_ucsim_parser_ERROR yyerror +#endif + +#ifndef YY_cl_ucsim_parser_PARSE_PARAM + #ifndef YY_USE_CLASS + #ifdef YYPARSE_PARAM + #define YY_cl_ucsim_parser_PARSE_PARAM void* YYPARSE_PARAM + #else + #ifndef __STDC__ + #ifndef __cplusplus + #define YY_cl_ucsim_parser_PARSE_PARAM + #endif + #endif + #endif + #endif + #ifndef YY_cl_ucsim_parser_PARSE_PARAM + #define YY_cl_ucsim_parser_PARSE_PARAM void + #endif +#endif + +#if YY_cl_ucsim_parser_COMPATIBILITY != 0 +/* backward compatibility */ +#ifdef YY_cl_ucsim_parser_LTYPE +#ifndef YYLTYPE +#define YYLTYPE YY_cl_ucsim_parser_LTYPE +#else +/* WARNING obsolete !!! user defined YYLTYPE not reported into generated header */ +#endif +#endif + +/* Removed due to bison compabilityproblems +/#ifndef YYSTYPE +/#define YYSTYPE YY_cl_ucsim_parser_STYPE +/#else*/ +/* WARNING obsolete !!! user defined YYSTYPE not reported into generated header */ +/*#endif*/ + +#ifdef YY_cl_ucsim_parser_PURE +# ifndef YYPURE +# define YYPURE YY_cl_ucsim_parser_PURE +# endif +#endif + +#ifdef YY_cl_ucsim_parser_DEBUG +# ifndef YYDEBUG +# define YYDEBUG YY_cl_ucsim_parser_DEBUG +# endif +#endif + +#ifndef YY_cl_ucsim_parser_ERROR_VERBOSE + #ifdef YYERROR_VERBOSE + #define YY_cl_ucsim_parser_ERROR_VERBOSE YYERROR_VERBOSE + #endif +#endif + +#ifndef YY_cl_ucsim_parser_LSP_NEEDED +# ifdef YYLSP_NEEDED +# define YY_cl_ucsim_parser_LSP_NEEDED YYLSP_NEEDED +# endif +#endif + +#endif + +#ifndef YY_USE_CLASS +/* TOKEN C */ + + #line 263 "/usr/share/bison++/bison.cc" +#define PTOK_PLUS 258 +#define PTOK_MINUS 259 +#define PTOK_ASTERIX 260 +#define PTOK_SLASH 261 +#define PTOK_EQUAL 262 +#define PTOK_LEFT_PAREN 263 +#define PTOK_RIGHT_PAREN 264 +#define PTOK_LEFT_BRACKET 265 +#define PTOK_RIGHT_BRACKET 266 +#define PTOK_DOT 267 +#define PTOK_AMPERSAND 268 +#define PTOK_MEMORY_OBJECT 269 +#define PTOK_MEMORY 270 +#define PTOK_NUMBER 271 +#define PTOK_BIT 272 +#define UNARYMINUS 273 + + +#line 263 "/usr/share/bison++/bison.cc" + /* #defines tokens */ +#else +/* CLASS */ +#ifndef YY_cl_ucsim_parser_CLASS +#define YY_cl_ucsim_parser_CLASS cl_ucsim_parser +#endif +#ifndef YY_cl_ucsim_parser_INHERIT +#define YY_cl_ucsim_parser_INHERIT +#endif +#ifndef YY_cl_ucsim_parser_MEMBERS +#define YY_cl_ucsim_parser_MEMBERS +#endif +#ifndef YY_cl_ucsim_parser_LEX_BODY +#define YY_cl_ucsim_parser_LEX_BODY +#endif +#ifndef YY_cl_ucsim_parser_ERROR_BODY +#define YY_cl_ucsim_parser_ERROR_BODY +#endif +#ifndef YY_cl_ucsim_parser_CONSTRUCTOR_PARAM +#define YY_cl_ucsim_parser_CONSTRUCTOR_PARAM +#endif +#ifndef YY_cl_ucsim_parser_CONSTRUCTOR_CODE +#define YY_cl_ucsim_parser_CONSTRUCTOR_CODE +#endif +#ifndef YY_cl_ucsim_parser_CONSTRUCTOR_INIT +#define YY_cl_ucsim_parser_CONSTRUCTOR_INIT +#endif +/* choose between enum and const */ +#ifndef YY_cl_ucsim_parser_USE_CONST_TOKEN +#define YY_cl_ucsim_parser_USE_CONST_TOKEN 0 +/* yes enum is more compatible with flex, */ +/* so by default we use it */ +#endif +#if YY_cl_ucsim_parser_USE_CONST_TOKEN != 0 +#ifndef YY_cl_ucsim_parser_ENUM_TOKEN +#define YY_cl_ucsim_parser_ENUM_TOKEN yy_cl_ucsim_parser_enum_token +#endif +#endif + +class YY_cl_ucsim_parser_CLASS YY_cl_ucsim_parser_INHERIT +{ +public: +#if YY_cl_ucsim_parser_USE_CONST_TOKEN != 0 +/* static const int token ... */ + + #line 307 "/usr/share/bison++/bison.cc" +static const int PTOK_PLUS; +static const int PTOK_MINUS; +static const int PTOK_ASTERIX; +static const int PTOK_SLASH; +static const int PTOK_EQUAL; +static const int PTOK_LEFT_PAREN; +static const int PTOK_RIGHT_PAREN; +static const int PTOK_LEFT_BRACKET; +static const int PTOK_RIGHT_BRACKET; +static const int PTOK_DOT; +static const int PTOK_AMPERSAND; +static const int PTOK_MEMORY_OBJECT; +static const int PTOK_MEMORY; +static const int PTOK_NUMBER; +static const int PTOK_BIT; +static const int UNARYMINUS; + + +#line 307 "/usr/share/bison++/bison.cc" + /* decl const */ +#else +enum YY_cl_ucsim_parser_ENUM_TOKEN { YY_cl_ucsim_parser_NULL_TOKEN=0 + + #line 310 "/usr/share/bison++/bison.cc" + ,PTOK_PLUS=258 + ,PTOK_MINUS=259 + ,PTOK_ASTERIX=260 + ,PTOK_SLASH=261 + ,PTOK_EQUAL=262 + ,PTOK_LEFT_PAREN=263 + ,PTOK_RIGHT_PAREN=264 + ,PTOK_LEFT_BRACKET=265 + ,PTOK_RIGHT_BRACKET=266 + ,PTOK_DOT=267 + ,PTOK_AMPERSAND=268 + ,PTOK_MEMORY_OBJECT=269 + ,PTOK_MEMORY=270 + ,PTOK_NUMBER=271 + ,PTOK_BIT=272 + ,UNARYMINUS=273 + + +#line 310 "/usr/share/bison++/bison.cc" + /* enum token */ + }; /* end of enum declaration */ +#endif +public: + int YY_cl_ucsim_parser_PARSE (YY_cl_ucsim_parser_PARSE_PARAM); + virtual void YY_cl_ucsim_parser_ERROR(char *msg) YY_cl_ucsim_parser_ERROR_BODY; +#ifdef YY_cl_ucsim_parser_PURE +#ifdef YY_cl_ucsim_parser_LSP_NEEDED + virtual int YY_cl_ucsim_parser_LEX (YY_cl_ucsim_parser_STYPE *YY_cl_ucsim_parser_LVAL,YY_cl_ucsim_parser_LTYPE *YY_cl_ucsim_parser_LLOC) YY_cl_ucsim_parser_LEX_BODY; +#else + virtual int YY_cl_ucsim_parser_LEX (YY_cl_ucsim_parser_STYPE *YY_cl_ucsim_parser_LVAL) YY_cl_ucsim_parser_LEX_BODY; +#endif +#else + virtual int YY_cl_ucsim_parser_LEX() YY_cl_ucsim_parser_LEX_BODY; + YY_cl_ucsim_parser_STYPE YY_cl_ucsim_parser_LVAL; +#ifdef YY_cl_ucsim_parser_LSP_NEEDED + YY_cl_ucsim_parser_LTYPE YY_cl_ucsim_parser_LLOC; +#endif + int YY_cl_ucsim_parser_NERRS; + int YY_cl_ucsim_parser_CHAR; +#endif +#if YY_cl_ucsim_parser_DEBUG != 0 + int YY_cl_ucsim_parser_DEBUG_FLAG; /* nonzero means print parse trace */ +#endif +public: + YY_cl_ucsim_parser_CLASS(YY_cl_ucsim_parser_CONSTRUCTOR_PARAM); +public: + YY_cl_ucsim_parser_MEMBERS +}; +/* other declare folow */ +#if YY_cl_ucsim_parser_USE_CONST_TOKEN != 0 + + #line 341 "/usr/share/bison++/bison.cc" +const int YY_cl_ucsim_parser_CLASS::PTOK_PLUS=258; +const int YY_cl_ucsim_parser_CLASS::PTOK_MINUS=259; +const int YY_cl_ucsim_parser_CLASS::PTOK_ASTERIX=260; +const int YY_cl_ucsim_parser_CLASS::PTOK_SLASH=261; +const int YY_cl_ucsim_parser_CLASS::PTOK_EQUAL=262; +const int YY_cl_ucsim_parser_CLASS::PTOK_LEFT_PAREN=263; +const int YY_cl_ucsim_parser_CLASS::PTOK_RIGHT_PAREN=264; +const int YY_cl_ucsim_parser_CLASS::PTOK_LEFT_BRACKET=265; +const int YY_cl_ucsim_parser_CLASS::PTOK_RIGHT_BRACKET=266; +const int YY_cl_ucsim_parser_CLASS::PTOK_DOT=267; +const int YY_cl_ucsim_parser_CLASS::PTOK_AMPERSAND=268; +const int YY_cl_ucsim_parser_CLASS::PTOK_MEMORY_OBJECT=269; +const int YY_cl_ucsim_parser_CLASS::PTOK_MEMORY=270; +const int YY_cl_ucsim_parser_CLASS::PTOK_NUMBER=271; +const int YY_cl_ucsim_parser_CLASS::PTOK_BIT=272; +const int YY_cl_ucsim_parser_CLASS::UNARYMINUS=273; + + +#line 341 "/usr/share/bison++/bison.cc" + /* const YY_cl_ucsim_parser_CLASS::token */ +#endif +/*apres const */ +YY_cl_ucsim_parser_CLASS::YY_cl_ucsim_parser_CLASS(YY_cl_ucsim_parser_CONSTRUCTOR_PARAM) YY_cl_ucsim_parser_CONSTRUCTOR_INIT +{ +#if YY_cl_ucsim_parser_DEBUG != 0 +YY_cl_ucsim_parser_DEBUG_FLAG=0; +#endif +YY_cl_ucsim_parser_CONSTRUCTOR_CODE; +}; +#endif + + #line 352 "/usr/share/bison++/bison.cc" + + +#define YYFINAL 37 +#define YYFLAG -32768 +#define YYNTBASE 19 + +#define YYTRANSLATE(x) ((unsigned)(x) <= 273 ? yytranslate[x] : 25) + +static const char yytranslate[] = { 0, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 1, 2, 3, 4, 5, + 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, + 16, 17, 18 +}; + +#if YY_cl_ucsim_parser_DEBUG != 0 +static const short yyprhs[] = { 0, + 0, 2, 6, 10, 12, 16, 20, 24, 28, 31, + 33, 37, 39, 41, 43, 46, 49, 51, 56, 58 +}; + +static const short yyrhs[] = { 21, + 0, 23, 7, 21, 0, 24, 7, 21, 0, 20, + 0, 21, 3, 21, 0, 21, 4, 21, 0, 21, + 5, 21, 0, 21, 6, 21, 0, 4, 21, 0, + 22, 0, 8, 21, 9, 0, 16, 0, 23, 0, + 24, 0, 13, 23, 0, 13, 24, 0, 15, 0, + 14, 10, 21, 11, 0, 17, 0, 23, 12, 21, + 0 +}; + +#endif + +#if (YY_cl_ucsim_parser_DEBUG != 0) || defined(YY_cl_ucsim_parser_ERROR_VERBOSE) +static const short yyrline[] = { 0, + 59, 63, 69, 86, 88, 89, 90, 91, 98, 99, + 100, 101, 102, 103, 106, 108, 119, 121, 127, 129 +}; + +static const char * const yytname[] = { "$","error","$illegal.","PTOK_PLUS", +"PTOK_MINUS","PTOK_ASTERIX","PTOK_SLASH","PTOK_EQUAL","PTOK_LEFT_PAREN","PTOK_RIGHT_PAREN", +"PTOK_LEFT_BRACKET","PTOK_RIGHT_BRACKET","PTOK_DOT","PTOK_AMPERSAND","PTOK_MEMORY_OBJECT", +"PTOK_MEMORY","PTOK_NUMBER","PTOK_BIT","UNARYMINUS","ucsim_grammar","assignment", +"expression","address_of_expression","memory","bit","" +}; +#endif + +static const short yyr1[] = { 0, + 19, 20, 20, 21, 21, 21, 21, 21, 21, 21, + 21, 21, 21, 21, 22, 22, 23, 23, 24, 24 +}; + +static const short yyr2[] = { 0, + 1, 3, 3, 1, 3, 3, 3, 3, 2, 1, + 3, 1, 1, 1, 2, 2, 1, 4, 1, 3 +}; + +static const short yydefact[] = { 0, + 0, 0, 0, 0, 17, 12, 19, 4, 1, 10, + 13, 14, 9, 0, 15, 16, 0, 0, 0, 0, + 0, 0, 0, 0, 11, 0, 5, 6, 7, 8, + 2, 20, 3, 18, 0, 0, 0 +}; + +static const short yydefgoto[] = { 35, + 8, 9, 10, 11, 12 +}; + +static const short yypact[] = { -2, + -2, -2, -10, 23,-32768,-32768,-32768,-32768, 32,-32768, + -4, 33,-32768, 25, 27,-32768, -2, -2, -2, -2, + -2, -2, -2, -2,-32768, 21, 4, 4,-32768,-32768, + 32, 32, 32,-32768, 41, 42,-32768 +}; + +static const short yypgoto[] = {-32768, +-32768, -1,-32768, 40, 43 +}; + + +#define YYLAST 46 + + +static const short yytable[] = { 13, + 14, 1, 22, 4, 5, 2, 7, 23, 20, 21, + 3, 4, 5, 6, 7, 26, 27, 28, 29, 30, + 31, 32, 33, 18, 19, 20, 21, 18, 19, 20, + 21, 34, 17, 25, 18, 19, 20, 21, 23, 24, + 36, 37, 15, 0, 0, 16 +}; + +static const short yycheck[] = { 1, + 2, 4, 7, 14, 15, 8, 17, 12, 5, 6, + 13, 14, 15, 16, 17, 17, 18, 19, 20, 21, + 22, 23, 24, 3, 4, 5, 6, 3, 4, 5, + 6, 11, 10, 9, 3, 4, 5, 6, 12, 7, + 0, 0, 3, -1, -1, 3 +}; + +#line 352 "/usr/share/bison++/bison.cc" + /* fattrs + tables */ + +/* parser code folow */ + + +/* This is the parser code that is written into each bison parser + when the %semantic_parser declaration is not specified in the grammar. + It was written by Richard Stallman by simplifying the hairy parser + used when %semantic_parser is specified. */ + +/* Note: dollar marks section change + the next is replaced by the list of actions, each action + as one case of the switch. */ + +#if YY_cl_ucsim_parser_USE_GOTO != 0 +/* + SUPRESSION OF GOTO : on some C++ compiler (sun c++) + the goto is strictly forbidden if any constructor/destructor + is used in the whole function (very stupid isn't it ?) + so goto are to be replaced with a 'while/switch/case construct' + here are the macro to keep some apparent compatibility +*/ +#define YYGOTO(lb) {yy_gotostate=lb;continue;} +#define YYBEGINGOTO enum yy_labels yy_gotostate=yygotostart; \ + for(;;) switch(yy_gotostate) { case yygotostart: { +#define YYLABEL(lb) } case lb: { +#define YYENDGOTO } } +#define YYBEGINDECLARELABEL enum yy_labels {yygotostart +#define YYDECLARELABEL(lb) ,lb +#define YYENDDECLARELABEL }; +#else +/* macro to keep goto */ +#define YYGOTO(lb) goto lb +#define YYBEGINGOTO +#define YYLABEL(lb) lb: +#define YYENDGOTO +#define YYBEGINDECLARELABEL +#define YYDECLARELABEL(lb) +#define YYENDDECLARELABEL +#endif +/* LABEL DECLARATION */ +YYBEGINDECLARELABEL + YYDECLARELABEL(yynewstate) + YYDECLARELABEL(yybackup) +/* YYDECLARELABEL(yyresume) */ + YYDECLARELABEL(yydefault) + YYDECLARELABEL(yyreduce) + YYDECLARELABEL(yyerrlab) /* here on detecting error */ + YYDECLARELABEL(yyerrlab1) /* here on error raised explicitly by an action */ + YYDECLARELABEL(yyerrdefault) /* current state does not do anything special for the error token. */ + YYDECLARELABEL(yyerrpop) /* pop the current state because it cannot handle the error token */ + YYDECLARELABEL(yyerrhandle) +YYENDDECLARELABEL +/* ALLOCA SIMULATION */ +/* __HAVE_NO_ALLOCA */ +#ifdef __HAVE_NO_ALLOCA +int __alloca_free_ptr(char *ptr,char *ref) +{if(ptr!=ref) free(ptr); + return 0;} + +#define __ALLOCA_alloca(size) malloc(size) +#define __ALLOCA_free(ptr,ref) __alloca_free_ptr((char *)ptr,(char *)ref) + +#ifdef YY_cl_ucsim_parser_LSP_NEEDED +#define __ALLOCA_return(num) \ + do { return( __ALLOCA_free(yyss,yyssa)+\ + __ALLOCA_free(yyvs,yyvsa)+\ + __ALLOCA_free(yyls,yylsa)+\ + (num)); } while(0) +#else +#define __ALLOCA_return(num) \ + do { return( __ALLOCA_free(yyss,yyssa)+\ + __ALLOCA_free(yyvs,yyvsa)+\ + (num)); } while(0) +#endif +#else +#define __ALLOCA_return(num) do { return(num); } while(0) +#define __ALLOCA_alloca(size) alloca(size) +#define __ALLOCA_free(ptr,ref) +#endif + +/* ENDALLOCA SIMULATION */ + +#define yyerrok (yyerrstatus = 0) +#define yyclearin (YY_cl_ucsim_parser_CHAR = YYEMPTY) +#define YYEMPTY -2 +#define YYEOF 0 +#define YYACCEPT __ALLOCA_return(0) +#define YYABORT __ALLOCA_return(1) +#define YYERROR YYGOTO(yyerrlab1) +/* Like YYERROR except do call yyerror. + This remains here temporarily to ease the + transition to the new meaning of YYERROR, for GCC. + Once GCC version 2 has supplanted version 1, this can go. */ +#define YYFAIL YYGOTO(yyerrlab) +#define YYRECOVERING() (!!yyerrstatus) +#define YYBACKUP(token, value) \ +do \ + if (YY_cl_ucsim_parser_CHAR == YYEMPTY && yylen == 1) \ + { YY_cl_ucsim_parser_CHAR = (token), YY_cl_ucsim_parser_LVAL = (value); \ + yychar1 = YYTRANSLATE (YY_cl_ucsim_parser_CHAR); \ + YYPOPSTACK; \ + YYGOTO(yybackup); \ + } \ + else \ + { YY_cl_ucsim_parser_ERROR ((char *)"syntax error: cannot back up"); YYERROR; } \ +while (0) + +#define YYTERROR 1 +#define YYERRCODE 256 + +#ifndef YY_cl_ucsim_parser_PURE +/* UNPURE */ +#define YYLEX YY_cl_ucsim_parser_LEX() +#ifndef YY_USE_CLASS +/* If nonreentrant, and not class , generate the variables here */ +int YY_cl_ucsim_parser_CHAR; /* the lookahead symbol */ +YY_cl_ucsim_parser_STYPE YY_cl_ucsim_parser_LVAL; /* the semantic value of the */ + /* lookahead symbol */ +int YY_cl_ucsim_parser_NERRS; /* number of parse errors so far */ +#ifdef YY_cl_ucsim_parser_LSP_NEEDED +YY_cl_ucsim_parser_LTYPE YY_cl_ucsim_parser_LLOC; /* location data for the lookahead */ + /* symbol */ +#endif +#endif + + +#else +/* PURE */ +#ifdef YY_cl_ucsim_parser_LSP_NEEDED +#define YYLEX YY_cl_ucsim_parser_LEX(&YY_cl_ucsim_parser_LVAL, &YY_cl_ucsim_parser_LLOC) +#else +#define YYLEX YY_cl_ucsim_parser_LEX(&YY_cl_ucsim_parser_LVAL) +#endif +#endif +#ifndef YY_USE_CLASS +#if YY_cl_ucsim_parser_DEBUG != 0 +int YY_cl_ucsim_parser_DEBUG_FLAG; /* nonzero means print parse trace */ +/* Since this is uninitialized, it does not stop multiple parsers + from coexisting. */ +#endif +#endif + + + +/* YYINITDEPTH indicates the initial size of the parser's stacks */ + +#ifndef YYINITDEPTH +#define YYINITDEPTH 200 +#endif + +/* YYMAXDEPTH is the maximum size the stacks can grow to + (effective only if the built-in stack extension method is used). */ + +#if YYMAXDEPTH == 0 +#undef YYMAXDEPTH +#endif + +#ifndef YYMAXDEPTH +#define YYMAXDEPTH 10000 +#endif + + +#if __GNUC__ > 1 /* GNU C and GNU C++ define this. */ +#define __yy_bcopy(FROM,TO,COUNT) __builtin_memcpy(TO,FROM,COUNT) +#else /* not GNU C or C++ */ + +/* This is the most reliable way to avoid incompatibilities + in available built-in functions on various systems. */ + +#ifdef __cplusplus +static void __yy_bcopy (char *from, char *to, int count) +#else +#ifdef __STDC__ +static void __yy_bcopy (char *from, char *to, int count) +#else +static void __yy_bcopy (from, to, count) + char *from; + char *to; + int count; +#endif +#endif +{ + register char *f = from; + register char *t = to; + register int i = count; + + while (i-- > 0) + *t++ = *f++; +} +#endif + + +int +#ifdef YY_USE_CLASS + YY_cl_ucsim_parser_CLASS:: +#endif + YY_cl_ucsim_parser_PARSE(YY_cl_ucsim_parser_PARSE_PARAM) +#ifndef __STDC__ +#ifndef __cplusplus +#ifndef YY_USE_CLASS +/* parameter definition without protypes */ +YY_cl_ucsim_parser_PARSE_PARAM_DEF +#endif +#endif +#endif +{ + register int yystate; + register int yyn; + register short *yyssp; + register YY_cl_ucsim_parser_STYPE *yyvsp; + int yyerrstatus; /* number of tokens to shift before error messages enabled */ + int yychar1=0; /* lookahead token as an internal (translated) token number */ + + short yyssa[YYINITDEPTH]; /* the state stack */ + YY_cl_ucsim_parser_STYPE yyvsa[YYINITDEPTH]; /* the semantic value stack */ + + short *yyss = yyssa; /* refer to the stacks thru separate pointers */ + YY_cl_ucsim_parser_STYPE *yyvs = yyvsa; /* to allow yyoverflow to reallocate them elsewhere */ + +#ifdef YY_cl_ucsim_parser_LSP_NEEDED + YY_cl_ucsim_parser_LTYPE yylsa[YYINITDEPTH]; /* the location stack */ + YY_cl_ucsim_parser_LTYPE *yyls = yylsa; + YY_cl_ucsim_parser_LTYPE *yylsp; + +#define YYPOPSTACK (yyvsp--, yyssp--, yylsp--) +#else +#define YYPOPSTACK (yyvsp--, yyssp--) +#endif + + int yystacksize = YYINITDEPTH; + +#ifdef YY_cl_ucsim_parser_PURE + int YY_cl_ucsim_parser_CHAR; + YY_cl_ucsim_parser_STYPE YY_cl_ucsim_parser_LVAL; + int YY_cl_ucsim_parser_NERRS; +#ifdef YY_cl_ucsim_parser_LSP_NEEDED + YY_cl_ucsim_parser_LTYPE YY_cl_ucsim_parser_LLOC; +#endif +#endif + + YY_cl_ucsim_parser_STYPE yyval; /* the variable used to return */ + /* semantic values from the action */ + /* routines */ + + int yylen; +/* start loop, in which YYGOTO may be used. */ +YYBEGINGOTO + +#if YY_cl_ucsim_parser_DEBUG != 0 + if (YY_cl_ucsim_parser_DEBUG_FLAG) + fprintf(stderr, "Starting parse\n"); +#endif + yystate = 0; + yyerrstatus = 0; + YY_cl_ucsim_parser_NERRS = 0; + YY_cl_ucsim_parser_CHAR = YYEMPTY; /* Cause a token to be read. */ + + /* Initialize stack pointers. + Waste one element of value and location stack + so that they stay on the same level as the state stack. + The wasted elements are never initialized. */ + + yyssp = yyss - 1; + yyvsp = yyvs; +#ifdef YY_cl_ucsim_parser_LSP_NEEDED + yylsp = yyls; +#endif + +/* Push a new state, which is found in yystate . */ +/* In all cases, when you get here, the value and location stacks + have just been pushed. so pushing a state here evens the stacks. */ +YYLABEL(yynewstate) + + *++yyssp = yystate; + + if (yyssp >= yyss + yystacksize - 1) + { + /* Give user a chance to reallocate the stack */ + /* Use copies of these so that the &'s don't force the real ones into memory. */ + YY_cl_ucsim_parser_STYPE *yyvs1 = yyvs; + short *yyss1 = yyss; +#ifdef YY_cl_ucsim_parser_LSP_NEEDED + YY_cl_ucsim_parser_LTYPE *yyls1 = yyls; +#endif + + /* Get the current used size of the three stacks, in elements. */ + int size = yyssp - yyss + 1; + +#ifdef yyoverflow + /* Each stack pointer address is followed by the size of + the data in use in that stack, in bytes. */ +#ifdef YY_cl_ucsim_parser_LSP_NEEDED + /* This used to be a conditional around just the two extra args, + but that might be undefined if yyoverflow is a macro. */ + yyoverflow("parser stack overflow", + &yyss1, size * sizeof (*yyssp), + &yyvs1, size * sizeof (*yyvsp), + &yyls1, size * sizeof (*yylsp), + &yystacksize); +#else + yyoverflow("parser stack overflow", + &yyss1, size * sizeof (*yyssp), + &yyvs1, size * sizeof (*yyvsp), + &yystacksize); +#endif + + yyss = yyss1; yyvs = yyvs1; +#ifdef YY_cl_ucsim_parser_LSP_NEEDED + yyls = yyls1; +#endif +#else /* no yyoverflow */ + /* Extend the stack our own way. */ + if (yystacksize >= YYMAXDEPTH) + { + YY_cl_ucsim_parser_ERROR((char *)"parser stack overflow"); + __ALLOCA_return(2); + } + yystacksize *= 2; + if (yystacksize > YYMAXDEPTH) + yystacksize = YYMAXDEPTH; + yyss = (short *) __ALLOCA_alloca (yystacksize * sizeof (*yyssp)); + __yy_bcopy ((char *)yyss1, (char *)yyss, size * sizeof (*yyssp)); + __ALLOCA_free(yyss1,yyssa); + yyvs = (YY_cl_ucsim_parser_STYPE *) __ALLOCA_alloca (yystacksize * sizeof (*yyvsp)); + __yy_bcopy ((char *)yyvs1, (char *)yyvs, size * sizeof (*yyvsp)); + __ALLOCA_free(yyvs1,yyvsa); +#ifdef YY_cl_ucsim_parser_LSP_NEEDED + yyls = (YY_cl_ucsim_parser_LTYPE *) __ALLOCA_alloca (yystacksize * sizeof (*yylsp)); + __yy_bcopy ((char *)yyls1, (char *)yyls, size * sizeof (*yylsp)); + __ALLOCA_free(yyls1,yylsa); +#endif +#endif /* no yyoverflow */ + + yyssp = yyss + size - 1; + yyvsp = yyvs + size - 1; +#ifdef YY_cl_ucsim_parser_LSP_NEEDED + yylsp = yyls + size - 1; +#endif + +#if YY_cl_ucsim_parser_DEBUG != 0 + if (YY_cl_ucsim_parser_DEBUG_FLAG) + fprintf(stderr, "Stack size increased to %d\n", yystacksize); +#endif + + if (yyssp >= yyss + yystacksize - 1) + YYABORT; + } + +#if YY_cl_ucsim_parser_DEBUG != 0 + if (YY_cl_ucsim_parser_DEBUG_FLAG) + fprintf(stderr, "Entering state %d\n", yystate); +#endif + + YYGOTO(yybackup); +YYLABEL(yybackup) + +/* Do appropriate processing given the current state. */ +/* Read a lookahead token if we need one and don't already have one. */ +/* YYLABEL(yyresume) */ + + /* First try to decide what to do without reference to lookahead token. */ + + yyn = yypact[yystate]; + if (yyn == YYFLAG) + YYGOTO(yydefault); + + /* Not known => get a lookahead token if don't already have one. */ + + /* yychar is either YYEMPTY or YYEOF + or a valid token in external form. */ + + if (YY_cl_ucsim_parser_CHAR == YYEMPTY) + { +#if YY_cl_ucsim_parser_DEBUG != 0 + if (YY_cl_ucsim_parser_DEBUG_FLAG) + fprintf(stderr, "Reading a token: "); +#endif + YY_cl_ucsim_parser_CHAR = YYLEX; + } + + /* Convert token to internal form (in yychar1) for indexing tables with */ + + if (YY_cl_ucsim_parser_CHAR <= 0) /* This means end of input. */ + { + yychar1 = 0; + YY_cl_ucsim_parser_CHAR = YYEOF; /* Don't call YYLEX any more */ + +#if YY_cl_ucsim_parser_DEBUG != 0 + if (YY_cl_ucsim_parser_DEBUG_FLAG) + fprintf(stderr, "Now at end of input.\n"); +#endif + } + else + { + yychar1 = YYTRANSLATE(YY_cl_ucsim_parser_CHAR); + +#if YY_cl_ucsim_parser_DEBUG != 0 + if (YY_cl_ucsim_parser_DEBUG_FLAG) + { + fprintf (stderr, "Next token is %d (%s", YY_cl_ucsim_parser_CHAR, yytname[yychar1]); + /* Give the individual parser a way to print the precise meaning + of a token, for further debugging info. */ +#ifdef YYPRINT + YYPRINT (stderr, YY_cl_ucsim_parser_CHAR, YY_cl_ucsim_parser_LVAL); +#endif + fprintf (stderr, ")\n"); + } +#endif + } + + yyn += yychar1; + if (yyn < 0 || yyn > YYLAST || yycheck[yyn] != yychar1) + YYGOTO(yydefault); + + yyn = yytable[yyn]; + + /* yyn is what to do for this token type in this state. + Negative => reduce, -yyn is rule number. + Positive => shift, yyn is new state. + New state is final state => don't bother to shift, + just return success. + 0, or most negative number => error. */ + + if (yyn < 0) + { + if (yyn == YYFLAG) + YYGOTO(yyerrlab); + yyn = -yyn; + YYGOTO(yyreduce); + } + else if (yyn == 0) + YYGOTO(yyerrlab); + + if (yyn == YYFINAL) + YYACCEPT; + + /* Shift the lookahead token. */ + +#if YY_cl_ucsim_parser_DEBUG != 0 + if (YY_cl_ucsim_parser_DEBUG_FLAG) + fprintf(stderr, "Shifting token %d (%s), ", YY_cl_ucsim_parser_CHAR, yytname[yychar1]); +#endif + + /* Discard the token being shifted unless it is eof. */ + if (YY_cl_ucsim_parser_CHAR != YYEOF) + YY_cl_ucsim_parser_CHAR = YYEMPTY; + + *++yyvsp = YY_cl_ucsim_parser_LVAL; +#ifdef YY_cl_ucsim_parser_LSP_NEEDED + *++yylsp = YY_cl_ucsim_parser_LLOC; +#endif + + /* count tokens shifted since error; after three, turn off error status. */ + if (yyerrstatus) yyerrstatus--; + + yystate = yyn; + YYGOTO(yynewstate); + +/* Do the default action for the current state. */ +YYLABEL(yydefault) + + yyn = yydefact[yystate]; + if (yyn == 0) + YYGOTO(yyerrlab); + +/* Do a reduction. yyn is the number of a rule to reduce with. */ +YYLABEL(yyreduce) + yylen = yyr2[yyn]; + if (yylen > 0) + yyval = yyvsp[1-yylen]; /* implement default value of the action */ + +#if YY_cl_ucsim_parser_DEBUG != 0 + if (YY_cl_ucsim_parser_DEBUG_FLAG) + { + int i; + + fprintf (stderr, "Reducing via rule %d (line %d), ", + yyn, yyrline[yyn]); + + /* Print the symbols being reduced, and their result. */ + for (i = yyprhs[yyn]; yyrhs[i] > 0; i++) + fprintf (stderr, "%s ", yytname[yyrhs[i]]); + fprintf (stderr, " -> %s\n", yytname[yyr1[yyn]]); + } +#endif + + + #line 839 "/usr/share/bison++/bison.cc" + + switch (yyn) { + +case 1: +#line 60 "cmdpars.y" +{ application->dd_printf("%d\n", yyvsp[0].number); ; + break;} +case 2: +#line 65 "cmdpars.y" +{ + yyvsp[-2].memory.memory->write(yyvsp[-2].memory.address, yyvsp[0].number); + yyval.number= yyvsp[0].number; + ; + break;} +case 3: +#line 70 "cmdpars.y" +{ + if (yyvsp[0].number) + { + yyvsp[-2].bit.memory->write(yyvsp[-2].bit.mem_address, + yyvsp[-2].bit.memory->read(yyvsp[-2].bit.mem_address) | yyvsp[-2].bit.mask); + yyval.number= 1; + } + else + { + yyvsp[-2].bit.memory->write(yyvsp[-2].bit.mem_address, + yyvsp[-2].bit.memory->read(yyvsp[-2].bit.mem_address) & ~(yyvsp[-2].bit.mask)); + yyval.number= 0; + } + ; + break;} +case 4: +#line 87 "cmdpars.y" +{ yyval.number= yyvsp[0].number; ; + break;} +case 5: +#line 88 "cmdpars.y" +{ yyval.number= yyvsp[-2].number + yyvsp[0].number; ; + break;} +case 6: +#line 89 "cmdpars.y" +{ yyval.number= yyvsp[-2].number - yyvsp[0].number; ; + break;} +case 7: +#line 90 "cmdpars.y" +{ yyval.number= yyvsp[-2].number * yyvsp[0].number; ; + break;} +case 8: +#line 92 "cmdpars.y" +{ + if (yyvsp[0].number == 0) + yyerror((char *)"Divide by zero"); + else + yyval.number= yyvsp[-2].number / yyvsp[0].number; + ; + break;} +case 9: +#line 98 "cmdpars.y" +{ yyval.number= -yyvsp[0].number; ; + break;} +case 10: +#line 99 "cmdpars.y" +{ yyval.number= yyvsp[0].number; ; + break;} +case 11: +#line 100 "cmdpars.y" +{ yyval.number= yyvsp[-1].number; ; + break;} +case 12: +#line 101 "cmdpars.y" +{ yyval.number= yyvsp[0].number; ; + break;} +case 13: +#line 102 "cmdpars.y" +{ yyval.number= yyvsp[0].memory.memory->read(yyvsp[0].memory.address); ; + break;} +case 14: +#line 103 "cmdpars.y" +{ yyval.number= (yyvsp[0].bit.memory->read(yyvsp[0].bit.mem_address) & yyvsp[0].bit.mask)?1:0; ; + break;} +case 15: +#line 107 "cmdpars.y" +{ yyval.number= yyvsp[0].memory.address; ; + break;} +case 16: +#line 109 "cmdpars.y" +{ + yyval.number= yyvsp[0].bit.bit_address; + if (yyval.number < 0) + { + yyerror((char *)"Bit has no address."); + yyval.number= 0; + } + ; + break;} +case 18: +#line 122 "cmdpars.y" +{ + yyval.memory.memory= yyvsp[-3].memory_object; + yyval.memory.address= yyvsp[-1].number; + ; + break;} +case 20: +#line 130 "cmdpars.y" +{ + yyval.bit.memory= yyvsp[-2].memory.memory; + yyval.bit.mem_address= yyvsp[-2].memory.address; + yyval.bit.mask= 1 << yyvsp[0].number; + yyval.bit.bit_address= -1; + class cl_uc *uc= application->get_uc(); + if (uc) + yyval.bit.bit_address= uc->bit_address(yyvsp[-2].memory.memory, yyvsp[-2].memory.address, yyvsp[0].number); + ; + break;} +} + +#line 839 "/usr/share/bison++/bison.cc" + /* the action file gets copied in in place of this dollarsign */ + yyvsp -= yylen; + yyssp -= yylen; +#ifdef YY_cl_ucsim_parser_LSP_NEEDED + yylsp -= yylen; +#endif + +#if YY_cl_ucsim_parser_DEBUG != 0 + if (YY_cl_ucsim_parser_DEBUG_FLAG) + { + short *ssp1 = yyss - 1; + fprintf (stderr, "state stack now"); + while (ssp1 != yyssp) + fprintf (stderr, " %d", *++ssp1); + fprintf (stderr, "\n"); + } +#endif + + *++yyvsp = yyval; + +#ifdef YY_cl_ucsim_parser_LSP_NEEDED + yylsp++; + if (yylen == 0) + { + yylsp->first_line = YY_cl_ucsim_parser_LLOC.first_line; + yylsp->first_column = YY_cl_ucsim_parser_LLOC.first_column; + yylsp->last_line = (yylsp-1)->last_line; + yylsp->last_column = (yylsp-1)->last_column; + yylsp->text = 0; + } + else + { + yylsp->last_line = (yylsp+yylen-1)->last_line; + yylsp->last_column = (yylsp+yylen-1)->last_column; + } +#endif + + /* Now "shift" the result of the reduction. + Determine what state that goes to, + based on the state we popped back to + and the rule number reduced by. */ + + yyn = yyr1[yyn]; + + yystate = yypgoto[yyn - YYNTBASE] + *yyssp; + if (yystate >= 0 && yystate <= YYLAST && yycheck[yystate] == *yyssp) + yystate = yytable[yystate]; + else + yystate = yydefgoto[yyn - YYNTBASE]; + + YYGOTO(yynewstate); + +YYLABEL(yyerrlab) /* here on detecting error */ + + if (! yyerrstatus) + /* If not already recovering from an error, report this error. */ + { + ++YY_cl_ucsim_parser_NERRS; + +#ifdef YY_cl_ucsim_parser_ERROR_VERBOSE + yyn = yypact[yystate]; + + if (yyn > YYFLAG && yyn < YYLAST) + { + int size = 0; + char *msg; + int x, count; + + count = 0; + /* Start X at -yyn if nec to avoid negative indexes in yycheck. */ + for (x = (yyn < 0 ? -yyn : 0); + x < (sizeof(yytname) / sizeof(char *)); x++) + if (yycheck[x + yyn] == x) + size += strlen(yytname[x]) + 15, count++; + msg = (char *) malloc(size + 15); + if (msg != 0) + { + strcpy(msg, "parse error"); + + if (count < 5) + { + count = 0; + for (x = (yyn < 0 ? -yyn : 0); + x < (sizeof(yytname) / sizeof(char *)); x++) + if (yycheck[x + yyn] == x) + { + strcat(msg, count == 0 ? ", expecting `" : " or `"); + strcat(msg, yytname[x]); + strcat(msg, "'"); + count++; + } + } + YY_cl_ucsim_parser_ERROR(msg); + free(msg); + } + else + YY_cl_ucsim_parser_ERROR ((char *)"parse error; also virtual memory exceeded"); + } + else +#endif /* YY_cl_ucsim_parser_ERROR_VERBOSE */ + YY_cl_ucsim_parser_ERROR((char *)"parse error"); + } + + YYGOTO(yyerrlab1); +YYLABEL(yyerrlab1) /* here on error raised explicitly by an action */ + + if (yyerrstatus == 3) + { + /* if just tried and failed to reuse lookahead token after an error, discard it. */ + + /* return failure if at end of input */ + if (YY_cl_ucsim_parser_CHAR == YYEOF) + YYABORT; + +#if YY_cl_ucsim_parser_DEBUG != 0 + if (YY_cl_ucsim_parser_DEBUG_FLAG) + fprintf(stderr, "Discarding token %d (%s).\n", YY_cl_ucsim_parser_CHAR, yytname[yychar1]); +#endif + + YY_cl_ucsim_parser_CHAR = YYEMPTY; + } + + /* Else will try to reuse lookahead token + after shifting the error token. */ + + yyerrstatus = 3; /* Each real token shifted decrements this */ + + YYGOTO(yyerrhandle); + +YYLABEL(yyerrdefault) /* current state does not do anything special for the error token. */ + +#if 0 + /* This is wrong; only states that explicitly want error tokens + should shift them. */ + yyn = yydefact[yystate]; /* If its default is to accept any token, ok. Otherwise pop it.*/ + if (yyn) YYGOTO(yydefault); +#endif + +YYLABEL(yyerrpop) /* pop the current state because it cannot handle the error token */ + + if (yyssp == yyss) YYABORT; + yyvsp--; + yystate = *--yyssp; +#ifdef YY_cl_ucsim_parser_LSP_NEEDED + yylsp--; +#endif + +#if YY_cl_ucsim_parser_DEBUG != 0 + if (YY_cl_ucsim_parser_DEBUG_FLAG) + { + short *ssp1 = yyss - 1; + fprintf (stderr, "Error: state stack now"); + while (ssp1 != yyssp) + fprintf (stderr, " %d", *++ssp1); + fprintf (stderr, "\n"); + } +#endif + +YYLABEL(yyerrhandle) + + yyn = yypact[yystate]; + if (yyn == YYFLAG) + YYGOTO(yyerrdefault); + + yyn += YYTERROR; + if (yyn < 0 || yyn > YYLAST || yycheck[yyn] != YYTERROR) + YYGOTO(yyerrdefault); + + yyn = yytable[yyn]; + if (yyn < 0) + { + if (yyn == YYFLAG) + YYGOTO(yyerrpop); + yyn = -yyn; + YYGOTO(yyreduce); + } + else if (yyn == 0) + YYGOTO(yyerrpop); + + if (yyn == YYFINAL) + YYACCEPT; + +#if YY_cl_ucsim_parser_DEBUG != 0 + if (YY_cl_ucsim_parser_DEBUG_FLAG) + fprintf(stderr, "Shifting error token, "); +#endif + + *++yyvsp = YY_cl_ucsim_parser_LVAL; +#ifdef YY_cl_ucsim_parser_LSP_NEEDED + *++yylsp = YY_cl_ucsim_parser_LLOC; +#endif + + yystate = yyn; + YYGOTO(yynewstate); +/* end loop, in which YYGOTO may be used. */ + YYENDGOTO +} + +/* END */ + + #line 1038 "/usr/share/bison++/bison.cc" +#line 141 "cmdpars.y" + + +int +YY_cl_ucsim_parser_CLASS::yylex(YY_cl_ucsim_parser_STYPE *yylval) +{ + lexer_object->activate_lexer_to_parse_into(yylval); + return(lexer_object->yylex()); +} + +void +YY_cl_ucsim_parser_CLASS::yyerror(char *msg) +{ + application->dd_printf("Parser error: %s\n", msg); +} diff --git a/sim/ucsim/cmd.src/cmdpars.h b/sim/ucsim/cmd.src/cmdpars.h new file mode 100644 index 0000000..20ca525 --- /dev/null +++ b/sim/ucsim/cmd.src/cmdpars.h @@ -0,0 +1,369 @@ +#ifndef YY_cl_ucsim_parser_h_included +#define YY_cl_ucsim_parser_h_included +#define YY_USE_CLASS + +#line 1 "/usr/share/bison++/bison.h" +/* before anything */ +#ifdef c_plusplus + #ifndef __cplusplus + #define __cplusplus + #endif +#endif + + + #line 8 "/usr/share/bison++/bison.h" +#define YY_cl_ucsim_parser_INHERIT : public cl_base +#define YY_cl_ucsim_parser_MEMBERS class cl_ucsim_lexer *lexer_object;\ +virtual ~YY_cl_ucsim_parser_CLASS(void) { delete lexer_object; } +#define YY_cl_ucsim_parser_CONSTRUCTOR_PARAM \ +class cl_ucsim_lexer *the_lexer +#define YY_cl_ucsim_parser_CONSTRUCTOR_CODE \ +lexer_object= the_lexer; + +#line 43 "cmdpars.y" +typedef union { + long number; + class cl_memory *memory_object; + struct { + class cl_memory *memory; + long address; + } memory; + struct { + class cl_memory *memory; + long mem_address, bit_address; + long mask; + } bit; +} yy_cl_ucsim_parser_stype; +#define YY_cl_ucsim_parser_STYPE yy_cl_ucsim_parser_stype + +#line 21 "/usr/share/bison++/bison.h" + /* %{ and %header{ and %union, during decl */ +#ifndef YY_cl_ucsim_parser_COMPATIBILITY + #ifndef YY_USE_CLASS + #define YY_cl_ucsim_parser_COMPATIBILITY 1 + #else + #define YY_cl_ucsim_parser_COMPATIBILITY 0 + #endif +#endif + +#if YY_cl_ucsim_parser_COMPATIBILITY != 0 +/* backward compatibility */ + #ifdef YYLTYPE + #ifndef YY_cl_ucsim_parser_LTYPE + #define YY_cl_ucsim_parser_LTYPE YYLTYPE +/* WARNING obsolete !!! user defined YYLTYPE not reported into generated header */ +/* use %define LTYPE */ + #endif + #endif +/*#ifdef YYSTYPE*/ + #ifndef YY_cl_ucsim_parser_STYPE + #define YY_cl_ucsim_parser_STYPE YYSTYPE + /* WARNING obsolete !!! user defined YYSTYPE not reported into generated header */ + /* use %define STYPE */ + #endif +/*#endif*/ + #ifdef YYDEBUG + #ifndef YY_cl_ucsim_parser_DEBUG + #define YY_cl_ucsim_parser_DEBUG YYDEBUG + /* WARNING obsolete !!! user defined YYDEBUG not reported into generated header */ + /* use %define DEBUG */ + #endif + #endif + /* use goto to be compatible */ + #ifndef YY_cl_ucsim_parser_USE_GOTO + #define YY_cl_ucsim_parser_USE_GOTO 1 + #endif +#endif + +/* use no goto to be clean in C++ */ +#ifndef YY_cl_ucsim_parser_USE_GOTO + #define YY_cl_ucsim_parser_USE_GOTO 0 +#endif + +#ifndef YY_cl_ucsim_parser_PURE + + #line 65 "/usr/share/bison++/bison.h" +#define YY_cl_ucsim_parser_PURE 1 + + +#line 65 "/usr/share/bison++/bison.h" +/* YY_cl_ucsim_parser_PURE */ +#endif + + + #line 68 "/usr/share/bison++/bison.h" + +#line 68 "/usr/share/bison++/bison.h" +/* prefix */ + +#ifndef YY_cl_ucsim_parser_DEBUG + + #line 71 "/usr/share/bison++/bison.h" + +#line 71 "/usr/share/bison++/bison.h" +/* YY_cl_ucsim_parser_DEBUG */ +#endif + +#ifndef YY_cl_ucsim_parser_LSP_NEEDED + + #line 75 "/usr/share/bison++/bison.h" + +#line 75 "/usr/share/bison++/bison.h" + /* YY_cl_ucsim_parser_LSP_NEEDED*/ +#endif + +/* DEFAULT LTYPE*/ +#ifdef YY_cl_ucsim_parser_LSP_NEEDED + #ifndef YY_cl_ucsim_parser_LTYPE + #ifndef BISON_YYLTYPE_ISDECLARED + #define BISON_YYLTYPE_ISDECLARED +typedef + struct yyltype + { + int timestamp; + int first_line; + int first_column; + int last_line; + int last_column; + char *text; + } + yyltype; + #endif + + #define YY_cl_ucsim_parser_LTYPE yyltype + #endif +#endif + +/* DEFAULT STYPE*/ +#ifndef YY_cl_ucsim_parser_STYPE + #define YY_cl_ucsim_parser_STYPE int +#endif + +/* DEFAULT MISCELANEOUS */ +#ifndef YY_cl_ucsim_parser_PARSE + #define YY_cl_ucsim_parser_PARSE yyparse +#endif + +#ifndef YY_cl_ucsim_parser_LEX + #define YY_cl_ucsim_parser_LEX yylex +#endif + +#ifndef YY_cl_ucsim_parser_LVAL + #define YY_cl_ucsim_parser_LVAL yylval +#endif + +#ifndef YY_cl_ucsim_parser_LLOC + #define YY_cl_ucsim_parser_LLOC yylloc +#endif + +#ifndef YY_cl_ucsim_parser_CHAR + #define YY_cl_ucsim_parser_CHAR yychar +#endif + +#ifndef YY_cl_ucsim_parser_NERRS + #define YY_cl_ucsim_parser_NERRS yynerrs +#endif + +#ifndef YY_cl_ucsim_parser_DEBUG_FLAG + #define YY_cl_ucsim_parser_DEBUG_FLAG yydebug +#endif + +#ifndef YY_cl_ucsim_parser_ERROR + #define YY_cl_ucsim_parser_ERROR yyerror +#endif + +#ifndef YY_cl_ucsim_parser_PARSE_PARAM + #ifndef __STDC__ + #ifndef __cplusplus + #ifndef YY_USE_CLASS + #define YY_cl_ucsim_parser_PARSE_PARAM + #ifndef YY_cl_ucsim_parser_PARSE_PARAM_DEF + #define YY_cl_ucsim_parser_PARSE_PARAM_DEF + #endif + #endif + #endif + #endif + #ifndef YY_cl_ucsim_parser_PARSE_PARAM + #define YY_cl_ucsim_parser_PARSE_PARAM void + #endif +#endif + +/* TOKEN C */ +#ifndef YY_USE_CLASS + + #ifndef YY_cl_ucsim_parser_PURE + #ifndef yylval + extern YY_cl_ucsim_parser_STYPE YY_cl_ucsim_parser_LVAL; + #else + #if yylval != YY_cl_ucsim_parser_LVAL + extern YY_cl_ucsim_parser_STYPE YY_cl_ucsim_parser_LVAL; + #else + #warning "Namespace conflict, disabling some functionality (bison++ only)" + #endif + #endif + #endif + + + #line 169 "/usr/share/bison++/bison.h" +#define PTOK_PLUS 258 +#define PTOK_MINUS 259 +#define PTOK_ASTERIX 260 +#define PTOK_SLASH 261 +#define PTOK_EQUAL 262 +#define PTOK_LEFT_PAREN 263 +#define PTOK_RIGHT_PAREN 264 +#define PTOK_LEFT_BRACKET 265 +#define PTOK_RIGHT_BRACKET 266 +#define PTOK_DOT 267 +#define PTOK_AMPERSAND 268 +#define PTOK_MEMORY_OBJECT 269 +#define PTOK_MEMORY 270 +#define PTOK_NUMBER 271 +#define PTOK_BIT 272 +#define UNARYMINUS 273 + + +#line 169 "/usr/share/bison++/bison.h" + /* #defines token */ +/* after #define tokens, before const tokens S5*/ +#else + #ifndef YY_cl_ucsim_parser_CLASS + #define YY_cl_ucsim_parser_CLASS cl_ucsim_parser + #endif + + #ifndef YY_cl_ucsim_parser_INHERIT + #define YY_cl_ucsim_parser_INHERIT + #endif + + #ifndef YY_cl_ucsim_parser_MEMBERS + #define YY_cl_ucsim_parser_MEMBERS + #endif + + #ifndef YY_cl_ucsim_parser_LEX_BODY + #define YY_cl_ucsim_parser_LEX_BODY + #endif + + #ifndef YY_cl_ucsim_parser_ERROR_BODY + #define YY_cl_ucsim_parser_ERROR_BODY + #endif + + #ifndef YY_cl_ucsim_parser_CONSTRUCTOR_PARAM + #define YY_cl_ucsim_parser_CONSTRUCTOR_PARAM + #endif + /* choose between enum and const */ + #ifndef YY_cl_ucsim_parser_USE_CONST_TOKEN + #define YY_cl_ucsim_parser_USE_CONST_TOKEN 0 + /* yes enum is more compatible with flex, */ + /* so by default we use it */ + #endif + #if YY_cl_ucsim_parser_USE_CONST_TOKEN != 0 + #ifndef YY_cl_ucsim_parser_ENUM_TOKEN + #define YY_cl_ucsim_parser_ENUM_TOKEN yy_cl_ucsim_parser_enum_token + #endif + #endif + +class YY_cl_ucsim_parser_CLASS YY_cl_ucsim_parser_INHERIT +{ +public: + #if YY_cl_ucsim_parser_USE_CONST_TOKEN != 0 + /* static const int token ... */ + + #line 212 "/usr/share/bison++/bison.h" +static const int PTOK_PLUS; +static const int PTOK_MINUS; +static const int PTOK_ASTERIX; +static const int PTOK_SLASH; +static const int PTOK_EQUAL; +static const int PTOK_LEFT_PAREN; +static const int PTOK_RIGHT_PAREN; +static const int PTOK_LEFT_BRACKET; +static const int PTOK_RIGHT_BRACKET; +static const int PTOK_DOT; +static const int PTOK_AMPERSAND; +static const int PTOK_MEMORY_OBJECT; +static const int PTOK_MEMORY; +static const int PTOK_NUMBER; +static const int PTOK_BIT; +static const int UNARYMINUS; + + +#line 212 "/usr/share/bison++/bison.h" + /* decl const */ + #else + enum YY_cl_ucsim_parser_ENUM_TOKEN { YY_cl_ucsim_parser_NULL_TOKEN=0 + + #line 215 "/usr/share/bison++/bison.h" + ,PTOK_PLUS=258 + ,PTOK_MINUS=259 + ,PTOK_ASTERIX=260 + ,PTOK_SLASH=261 + ,PTOK_EQUAL=262 + ,PTOK_LEFT_PAREN=263 + ,PTOK_RIGHT_PAREN=264 + ,PTOK_LEFT_BRACKET=265 + ,PTOK_RIGHT_BRACKET=266 + ,PTOK_DOT=267 + ,PTOK_AMPERSAND=268 + ,PTOK_MEMORY_OBJECT=269 + ,PTOK_MEMORY=270 + ,PTOK_NUMBER=271 + ,PTOK_BIT=272 + ,UNARYMINUS=273 + + +#line 215 "/usr/share/bison++/bison.h" + /* enum token */ + }; /* end of enum declaration */ + #endif +public: + int YY_cl_ucsim_parser_PARSE(YY_cl_ucsim_parser_PARSE_PARAM); + virtual void YY_cl_ucsim_parser_ERROR(char *msg) YY_cl_ucsim_parser_ERROR_BODY; + #ifdef YY_cl_ucsim_parser_PURE + #ifdef YY_cl_ucsim_parser_LSP_NEEDED + virtual int YY_cl_ucsim_parser_LEX(YY_cl_ucsim_parser_STYPE *YY_cl_ucsim_parser_LVAL,YY_cl_ucsim_parser_LTYPE *YY_cl_ucsim_parser_LLOC) YY_cl_ucsim_parser_LEX_BODY; + #else + virtual int YY_cl_ucsim_parser_LEX(YY_cl_ucsim_parser_STYPE *YY_cl_ucsim_parser_LVAL) YY_cl_ucsim_parser_LEX_BODY; + #endif + #else + virtual int YY_cl_ucsim_parser_LEX() YY_cl_ucsim_parser_LEX_BODY; + YY_cl_ucsim_parser_STYPE YY_cl_ucsim_parser_LVAL; + #ifdef YY_cl_ucsim_parser_LSP_NEEDED + YY_cl_ucsim_parser_LTYPE YY_cl_ucsim_parser_LLOC; + #endif + int YY_cl_ucsim_parser_NERRS; + int YY_cl_ucsim_parser_CHAR; + #endif + #if YY_cl_ucsim_parser_DEBUG != 0 + public: + int YY_cl_ucsim_parser_DEBUG_FLAG; /* nonzero means print parse trace */ + #endif +public: + YY_cl_ucsim_parser_CLASS(YY_cl_ucsim_parser_CONSTRUCTOR_PARAM); +public: + YY_cl_ucsim_parser_MEMBERS +}; +/* other declare folow */ +#endif + + +#if YY_cl_ucsim_parser_COMPATIBILITY != 0 + /* backward compatibility */ + /* Removed due to bison problems + /#ifndef YYSTYPE + / #define YYSTYPE YY_cl_ucsim_parser_STYPE + /#endif*/ + + #ifndef YYLTYPE + #define YYLTYPE YY_cl_ucsim_parser_LTYPE + #endif + #ifndef YYDEBUG + #ifdef YY_cl_ucsim_parser_DEBUG + #define YYDEBUG YY_cl_ucsim_parser_DEBUG + #endif + #endif + +#endif +/* END */ + + #line 267 "/usr/share/bison++/bison.h" +#endif diff --git a/sim/ucsim/cmd.src/cmdpars.y b/sim/ucsim/cmd.src/cmdpars.y new file mode 100644 index 0000000..70f69b3 --- /dev/null +++ b/sim/ucsim/cmd.src/cmdpars.y @@ -0,0 +1,154 @@ +%name cl_ucsim_parser + +%{ +#include "cmdlexcl.h" +#include "memcl.h" +#include "globals.h" +#include "stypes.h" +%} + +%pure_parser + +%define INHERIT : public cl_base + +%define MEMBERS class cl_ucsim_lexer *lexer_object;\ +virtual ~YY_cl_ucsim_parser_CLASS(void) { delete lexer_object; } + +%define CONSTRUCTOR_PARAM \ +class cl_ucsim_lexer *the_lexer + +%define CONSTRUCTOR_CODE \ +lexer_object= the_lexer; + +%token PTOK_PLUS PTOK_MINUS PTOK_ASTERIX PTOK_SLASH PTOK_EQUAL +%token PTOK_LEFT_PAREN PTOK_RIGHT_PAREN +%token PTOK_LEFT_BRACKET PTOK_RIGHT_BRACKET +%token PTOK_DOT PTOK_AMPERSAND + +%token PTOK_MEMORY_OBJECT +%token PTOK_MEMORY +%token PTOK_NUMBER +%token PTOK_BIT + +%right PTOK_EQUAL +%left PTOK_MINUS PTOK_PLUS +%left PTOK_ASTERIX PTOK_SLASH +%nonassoc UNARYMINUS PTOK_AMPERSAND +%nonassoc PTOK_LEFT_PAREN PTOK_RIGHT_PAREN + +%type ucsim_grammar assignment expression address_of_expression +%type memory +%type bit + +%union { + long number; + class cl_memory *memory_object; + struct { + class cl_memory *memory; + long address; + } memory; + struct { + class cl_memory *memory; + long mem_address, bit_address; + long mask; + } bit; +} + +%% + +ucsim_grammar: + expression { application->dd_printf("%d\n", $1); } + ; + +assignment: + memory PTOK_EQUAL expression + { + $1.memory->write($1.address, $3); + $$= $3; + } + | bit PTOK_EQUAL expression + { + if ($3) + { + $1.memory->write($1.mem_address, + $1.memory->read($1.mem_address) | $1.mask); + $$= 1; + } + else + { + $1.memory->write($1.mem_address, + $1.memory->read($1.mem_address) & ~($1.mask)); + $$= 0; + } + } + ; + +expression: + assignment { $$= $1; } + | expression PTOK_PLUS expression { $$= $1 + $3; } + | expression PTOK_MINUS expression { $$= $1 - $3; } + | expression PTOK_ASTERIX expression { $$= $1 * $3; } + | expression PTOK_SLASH expression + { + if ($3 == 0) + yyerror((char *)"Divide by zero"); + else + $$= $1 / $3; + } + | PTOK_MINUS expression %prec UNARYMINUS { $$= -$2; } + | address_of_expression { $$= $1; } + | PTOK_LEFT_PAREN expression PTOK_RIGHT_PAREN { $$= $2; } + | PTOK_NUMBER { $$= $1; } + | memory { $$= $1.memory->read($1.address); } + | bit { $$= ($1.memory->read($1.mem_address) & $1.mask)?1:0; } + ; + +address_of_expression: + PTOK_AMPERSAND memory { $$= $2.address; } + | PTOK_AMPERSAND bit + { + $$= $2.bit_address; + if ($$ < 0) + { + yyerror((char *)"Bit has no address."); + $$= 0; + } + } + ; + +memory: + PTOK_MEMORY + | PTOK_MEMORY_OBJECT PTOK_LEFT_BRACKET expression PTOK_RIGHT_BRACKET + { + $$.memory= $1; + $$.address= $3; + } + +bit: + PTOK_BIT + | memory PTOK_DOT expression + { + $$.memory= $1.memory; + $$.mem_address= $1.address; + $$.mask= 1 << $3; + $$.bit_address= -1; + class cl_uc *uc= application->get_uc(); + if (uc) + $$.bit_address= uc->bit_address($1.memory, $1.address, $3); + } + ; + +%% + +int +YY_cl_ucsim_parser_CLASS::yylex(YY_cl_ucsim_parser_STYPE *yylval) +{ + lexer_object->activate_lexer_to_parse_into(yylval); + return(lexer_object->yylex()); +} + +void +YY_cl_ucsim_parser_CLASS::yyerror(char *msg) +{ + application->dd_printf("Parser error: %s\n", msg); +} diff --git a/sim/ucsim/cmd.src/cmdset.cc b/sim/ucsim/cmd.src/cmdset.cc new file mode 100644 index 0000000..8f3523b --- /dev/null +++ b/sim/ucsim/cmd.src/cmdset.cc @@ -0,0 +1,463 @@ +/* + * Simulator of microcontrollers (cmd.src/cmdset.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include "cmdlexcl.h" +#include "cmdpars.h" + +// prj +#include "i_string.h" +#include "utils.h" +#include "globals.h" + +// sim.src +#include "simcl.h" + +// local, cmd.src +#include "cmdsetcl.h" +#include "cmdutil.h" + + +/* + * Command: run + *---------------------------------------------------------------------------- + */ + +//int +//cl_run_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_SIM(cl_run_cmd) +{ + class cl_brk *b; + t_addr start, end; + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + + if (params[0]) + if (!(params[0]->get_address(sim->uc, &start))) + { + con->dd_printf("Error: wrong start address\n"); + return(DD_FALSE); + } + if (params[1]) + if (!(params[1]->get_address(sim->uc, &end))) + { + con->dd_printf("Error: wromg end address\n"); + return(DD_FALSE); + } + if (params[0]) + { + if (!sim->uc->inst_at(start)) + con->dd_printf("Warning: maybe not instruction at 0x%06lx\n", start); + sim->uc->PC= start; + if (params[1]) + { + if (start == end) + { + con->dd_printf("Addresses must be different.\n"); + return(DD_FALSE); + } + if ((b= sim->uc->fbrk_at(end))) + { + } + else + { + b= new cl_fetch_brk(sim->uc->address_space(MEM_ROM_ID), + sim->uc->make_new_brknr(), end, + brkDYNAMIC, 1); + sim->uc->fbrk->add_bp(b); + } + } + } + con->dd_printf("Simulation started, PC=0x%06x\n", sim->uc->PC); + if (sim->uc->fbrk_at(sim->uc->PC)) + sim->uc->do_inst(1); + + sim->start(con); + return(DD_FALSE); +} + + +/* + * Command: stop + *---------------------------------------------------------------------------- + */ + +//int +//cl_stop_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_SIM(cl_stop_cmd) +{ + sim->stop(resUSER); + sim->uc->print_disass(sim->uc->PC, con); + return(DD_FALSE); +} + + +/* + * Command: step + *---------------------------------------------------------------------------- + */ + +//int +//cl_step_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_step_cmd) +{ + //printf("step %x\n",uc->PC); + uc->do_inst(1); + //printf("step done %x\n",uc->PC); + uc->print_regs(con); + return(0); +} + + +/* + * Command: next + *---------------------------------------------------------------------------- + */ + +//int +//cl_next_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_SIM(cl_next_cmd) +{ + class cl_brk *b; + t_addr next; + int branch; + int inst_len; + +#if 0 + struct dis_entry *de; + t_mem code= sim->uc->get_mem(MEM_ROM, sim->uc->PC); + int i= 0; + de= &(sim->uc->dis_tbl()[i]); + while ((code & de->mask) != de->code && + de->mnemonic) + { + i++; + de= &(sim->uc->dis_tbl()[i]); + } +#endif + + branch = sim->uc->inst_branch(sim->uc->PC); + inst_len = sim->uc->inst_length(sim->uc->PC); + + if ((branch == 'a') || (branch == 'l')) + { + next= sim->uc->PC + inst_len; + if (!sim->uc->fbrk_at(next)) + { + b= new cl_fetch_brk(sim->uc->address_space(MEM_ROM_ID), + sim->uc->make_new_brknr(), + next, brkDYNAMIC, 1); + + b->init(); +// sim->uc->fbrk->add_bp(b); + + sim->uc->fbrk->add(b); + b->activate(); + } + if (sim->uc->fbrk_at(sim->uc->PC)) + sim->uc->do_inst(1); + sim->start(con); + //sim->uc->do_inst(-1); + } + else { + sim->uc->do_inst(1); + sim->uc->print_regs(con); + } + return(DD_FALSE); +} + + +/* + * Command: help + *---------------------------------------------------------------------------- + */ + +//int +//cl_help_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_APP(cl_help_cmd) +{ + class cl_sim *sim; + class cl_commander_base *commander; + class cl_cmdset *cmdset= 0; + int i; + class cl_cmd_arg *parm= cmdline->param(0); + + sim= app->get_sim(); + if ((commander= app->get_commander()) != 0) + cmdset= commander->cmdset; + if (!cmdset) + return(DD_FALSE); + if (!parm) { + for (i= 0; i < cmdset->count; i++) + { + class cl_cmd *c= (class cl_cmd *)(cmdset->at(i)); + if (c->short_help) + con->dd_printf("%s\n", c->short_help); + else + con->dd_printf("%s\n", (char*)(c->names->at(0))); + } + } + else + { + matches= 0; + do_set(cmdline, 0, cmdset, con); + if (matches == 1 && + cmd_found) + { + int names; + con->dd_printf("Names of command:"); + for (names= 0; names < cmd_found->names->count; names++) + con->dd_printf(" %s", (char*)(cmd_found->names->at(names))); + con->dd_printf("\n"); + class cl_cmdset *subset= cmd_found->get_subcommands(); + if (subset) + { + con->dd_printf("\"%s\" must be followed by the name of a " + "subcommand\nList of subcommands:\n", + (char*)(cmd_found->names->at(0))); + for (i= 0; i < subset->count; i++) + { + class cl_cmd *c= + dynamic_cast(subset->object_at(i)); + con->dd_printf("%s\n", c->short_help); + } + } + if (cmd_found->long_help) + con->dd_printf("%s\n", cmd_found->long_help); + } + if (!matches || + !cmd_found) + con->dd_printf("No such command.\n"); + //return(DD_FALSE); + /* + int pari; + for (pari= 0; pari < cmdline->nuof_params(); pari++) + { + class cl_cmd_arg *act_param; + act_param= (class cl_cmd_arg *)(cmdline->param(pari)); + for (i= 0; i < cmdset->count; i++) + { + class cl_cmd *c= (class cl_cmd *)(cmdset->at(i)); + if (!c->name_match(act_param->s_value, DD_FALSE)) + continue; + if (c->short_help) + con->dd_printf("%s\n", c->short_help); + else + con->dd_printf("%s\n", (char*)(c->names->at(0))); + if (pari < cmdline->nuof_params()-1) + continue; + cmdset= c->get_subcommands(); + if (!cmdset) + return(DD_FALSE); + } + } + return(DD_FALSE); + */ + } + return(DD_FALSE); + /* + if (cmdline->syntax_match(0, STRING)) { + matches= 0; + for (i= 0; i < cmdset->count; i++) + { + c= (class cl_cmd *)(cmdset->at(i)); + if (c->name_match(parm->value.string.string, DD_FALSE)) + matches++; + } + if (!matches) + con->dd_printf("No such command\n"); + else if (matches > 1) + for (i= 0; i < cmdset->count; i++) + { + c= (class cl_cmd *)(cmdset->at(i)); + if (!c->name_match(parm->value.string.string, DD_FALSE)) + continue; + if (c->short_help) + con->dd_printf("%s\n", c->short_help); + else + con->dd_printf("%s\n", (char*)(c->names->at(0))); + } + else + for (i= 0; i < cmdset->count; i++) + { + c= (class cl_cmd *)(cmdset->at(i)); + if (!c->name_match(parm->value.string.string, DD_FALSE)) + continue; + if (c->short_help) + con->dd_printf("%s\n", c->short_help); + else + con->dd_printf("%s\n", (char*)(c->names->at(0))); + int names; + con->dd_printf("Names of command:"); + for (names= 0; names < c->names->count; names++) + con->dd_printf(" %s", (char*)(c->names->at(names))); + con->dd_printf("\n"); + if (c->long_help) + con->dd_printf("%s\n", c->long_help); + else + con->dd_printf("%s\n", (char*)(c->names->at(0))); + } + } + else + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax"); + + return(0); + */ +} + +bool +cl_help_cmd::do_set(class cl_cmdline *cmdline, int pari, + class cl_cmdset *cmdset, + class cl_console_base *con) +{ + int i; + for (i= 0; i < cmdset->count; i++) + { + class cl_cmd *cmd= dynamic_cast(cmdset->object_at(i)); + if (!cmd) + continue; + if (pari >= cmdline->nuof_params()) + return(DD_FALSE); + class cl_cmd_arg *param= cmdline->param(pari); + if (!param) + return(DD_FALSE); + class cl_cmdset *next_set= cmd->get_subcommands(); + if (cmd->name_match(param->s_value, DD_FALSE)) + { + if (pari+1 >= cmdline->nuof_params()) + { + matches++; + cmd_found= cmd; + if (cmd->short_help) + con->dd_printf("%s\n", cmd->short_help); + else + con->dd_printf("%s\n", (char*)(cmd->names->at(0))); + //continue; + } + else + if (next_set) + do_set(cmdline, pari+1, next_set, con); + } + } + return(DD_TRUE); +} + + +/* + * Command: quit + *---------------------------------------------------------------------------- + */ + +//int +//cl_quit_cmd::do_work(class cl_sim *sim, +// class cl_cmdline */*cmdline*/, class cl_console_base */*con*/) +COMMAND_DO_WORK(cl_quit_cmd) +{ + return(1); +} + + +/* + * Command: kill + *---------------------------------------------------------------------------- + */ + +//int +//cl_kill_cmd::do_work(class cl_sim *sim, +// class cl_cmdline */*cmdline*/, class cl_console_base */*con*/) +COMMAND_DO_WORK_APP(cl_kill_cmd) +{ + app->going= 0; + if (app->sim) + app->sim->state|= SIM_QUIT; + return(1); +} + + +/* + * EXEC file + */ + +COMMAND_DO_WORK_APP(cl_exec_cmd) +{ + class cl_cmd_arg *parm= cmdline->param(0); + char *fn= 0; + + if (cmdline->syntax_match(0, STRING)) { + fn= parm->value.string.string; + } + else + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax\n"); + + class cl_commander_base *c= app->get_commander(); + class cl_console_base *cons= con->clone_for_exec(fn); + if (cons) + { + cons->flags|= CONS_NOWELCOME; + c->add_console(cons); + } + + return(DD_FALSE); +} + + +/* + * expression expression + */ + +COMMAND_DO_WORK_APP(cl_expression_cmd) +{ + //con->dd_printf("\"%s\"\n", cmdline->cmd); + char *s= cmdline->cmd; + if (!s || + !*s) + return(DD_FALSE); + int i= strspn(s, " \t\v\n"); + s+= i; + //con->dd_printf("\"%s\"\n", s); + i= strspn(s, "abcdefghijklmnopqrstuvwxyz"); + s+= i; + //con->dd_printf("\"%s\"\n", s); + class YY_cl_ucsim_parser_CLASS *pars; + class cl_ucsim_lexer *lexer; + lexer= new cl_ucsim_lexer(s); + pars= new YY_cl_ucsim_parser_CLASS(lexer); + pars->yyparse(); + delete pars; + return(DD_FALSE); +} + + +/* End of cmd.src/cmdset.cc */ diff --git a/sim/ucsim/cmd.src/cmdsetcl.h b/sim/ucsim/cmd.src/cmdsetcl.h new file mode 100644 index 0000000..4757eff --- /dev/null +++ b/sim/ucsim/cmd.src/cmdsetcl.h @@ -0,0 +1,60 @@ +/* + * Simulator of microcontrollers (cmd.src/cmdsetcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_CMDSETCL_HEADER +#define CMD_CMDSETCL_HEADER + +// local, cmd +#include "commandcl.h" +#include "newcmdcl.h" + + +// STATE +COMMAND_ON(sim,cl_run_cmd); +COMMAND_ON(sim,cl_stop_cmd); +COMMAND_ON(uc,cl_step_cmd); +COMMAND_ON(sim,cl_next_cmd); + +//COMMAND_ON(app,cl_help_cmd); +COMMAND_HEAD(cl_help_cmd) +COMMAND_METHODS_ON(app,cl_help_cmd) + private: +int matches; +class cl_cmd *cmd_found; +bool do_set(class cl_cmdline *cmdline, int pari, class cl_cmdset *cmdset, + class cl_console_base *con); +COMMAND_TAIL; + +COMMAND(cl_quit_cmd); +COMMAND_ON(app,cl_kill_cmd); +COMMAND_ON(app,cl_exec_cmd); +COMMAND_ON(app,cl_expression_cmd); + + +#endif + +/* End of cmd.src/cmdsetcl.h */ diff --git a/sim/ucsim/cmd.src/cmdstat.cc b/sim/ucsim/cmd.src/cmdstat.cc new file mode 100644 index 0000000..f359983 --- /dev/null +++ b/sim/ucsim/cmd.src/cmdstat.cc @@ -0,0 +1,125 @@ +/* + * Simulator of microcontrollers (cmd.src/cmdstat.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +// prj +#include "globals.h" + +// sim +#include "simcl.h" + +// local +#include "cmdstatcl.h" + + +#ifdef STATISTIC +/* + * Command: statistic + *---------------------------------------------------------------------------- + */ + +//int +//cl_stat_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_statistic_cmd) +{ + class cl_hw *hw; + class cl_address_space *mem; + t_addr start= 0, end= 0; + bool addresses= DD_FALSE; + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + + if (cmdline->syntax_match(uc, HW)) { + hw= params[0]->value.hw; + } + else { + mem= 0; + if (cmdline->syntax_match(uc, MEMORY ADDRESS ADDRESS)) { + mem= params[0]->value.memory.address_space; + start= params[1]->value.address; + end= params[2]->value.address; + addresses= DD_TRUE; + } + else if (cmdline->syntax_match(uc, MEMORY ADDRESS)) { + mem= params[0]->value.memory.address_space; + start= end= params[1]->value.address; + addresses= DD_TRUE; + } + else if (cmdline->syntax_match(uc, MEMORY)) { + mem= params[0]->value.memory.address_space; + addresses= DD_FALSE; + } + else + { + /*con->dd_printf("Error: wrong syntax\n" + "%s\n", short_help?short_help:"no help");*/ + int i; + unsigned long wr, ww; + for (i= 0; i < uc->address_spaces->count; i++) + { + mem= (class cl_address_space *)(uc->address_spaces->at(i)); + wr= mem->get_nuof_reads(); + ww= mem->get_nuof_writes(); + con->dd_printf("%s writes= %10lu " + "reads= %10lu " + "(%10lu operations)\n", + mem->get_name("mem"), ww, wr, ww+wr); + } + } + if (mem) + { + t_addr i; + unsigned long wr, ww; + wr= mem->get_nuof_reads(); + ww= mem->get_nuof_writes(); + if (!addresses) + con->dd_printf("%s writes= %10lu " + "reads= %10lu\n", mem->get_name("mem"), ww, wr); + else + for (i= start; i <= end; i++) + { + class cl_memory_cell *c= mem->get_cell(i); + unsigned long w= c->nuof_writes, r= c->nuof_reads; + double dr= wr?((double(r)*100.0)/double(wr)):0.0; + double dw= ww?((double(w)*100.0)/double(ww)):0.0; + con->dd_printf("%s[0x%06x] writes= %10lu (%6.2lf%%) " + "reads= %10lu (%6.2lf%%)\n", + mem->get_name("mem"), i, w, dw, r, dr); + } + } + } + + return(DD_FALSE);; +} +#endif + + +/* End of cmd.src/cmdstat.cc */ diff --git a/sim/ucsim/cmd.src/cmdstatcl.h b/sim/ucsim/cmd.src/cmdstatcl.h new file mode 100644 index 0000000..b3b054c --- /dev/null +++ b/sim/ucsim/cmd.src/cmdstatcl.h @@ -0,0 +1,44 @@ +/* + * Simulator of microcontrollers (cmd.src/cmdstatcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_CMDSTATCL_HEADER +#define CMD_CMDSTATCL_HEADER + +#include "ddconfig.h" + +#include "newcmdcl.h" + + +#ifdef STATISTIC +// STATISTIC +COMMAND_ON(uc,cl_statistic_cmd); +#endif + + +#endif + +/* End of cmd.src/cmdstatcl.h */ diff --git a/sim/ucsim/cmd.src/cmduc.cc b/sim/ucsim/cmd.src/cmduc.cc new file mode 100644 index 0000000..02330e4 --- /dev/null +++ b/sim/ucsim/cmd.src/cmduc.cc @@ -0,0 +1,536 @@ +/* + * Simulator of microcontrollers (cmd.src/cmduc.cc) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +// prj +#include "globals.h" +#include "utils.h" + +// sim.src +#include "uccl.h" + +// local, cmd.src +#include "cmduccl.h" + + +/* + * Command: state + *---------------------------------------------------------------------------- + */ + +//int +//cl_state_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_state_cmd) +{ + con->dd_printf("CPU state= %s PC= 0x%06x XTAL= %g\n", + get_id_string(cpu_states, uc->state), + uc->PC, + uc->xtal); + con->dd_printf("Total time since last reset= %g sec (%lu clks)\n", + uc->get_rtime(), uc->ticks->ticks); + con->dd_printf("Time in isr = %g sec (%lu clks) %3.2g%%\n", + uc->isr_ticks->get_rtime(uc->xtal), + uc->isr_ticks->ticks, + (uc->ticks->ticks == 0)?0.0: + (100.0*((double)(uc->isr_ticks->ticks)/ + (double)(uc->ticks->ticks)))); + con->dd_printf("Time in idle= %g sec (%lu clks) %3.2g%%\n", + uc->idle_ticks->get_rtime(uc->xtal), + uc->idle_ticks->ticks, + (uc->ticks->ticks == 0)?0.0: + (100.0*((double)(uc->idle_ticks->ticks)/ + (double)(uc->ticks->ticks)))); + con->dd_printf("Max value of stack pointer= 0x%06x, avg= 0x%06x\n", + uc->sp_max, uc->sp_avg); + return(0); +} + + +/* + * Command: file + *---------------------------------------------------------------------------- + */ + +//int +//cl_file_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_file_cmd) +{ + char *fname= 0; + long l; + + if ((cmdline->param(0) == 0) || + ((fname= cmdline->param(0)->get_svalue()) == NULL)) + { + con->dd_printf("File name is missing.\n"); + return(0); + } + if ((l= uc->read_hex_file(fname)) >= 0) + con->dd_printf("%ld words read from %s\n", l, fname); + + return(0); +} + + +/* + * Command: download + *---------------------------------------------------------------------------- + */ + +//int +//cl_dl_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_dl_cmd) +{ + long l; + + if ((l= uc->read_hex_file(NULL)) >= 0) + con->dd_printf("%ld words loaded\n", l); + + return(0); +} + + +/* + * Command: pc + *---------------------------------------------------------------------------- + */ + +//int +//cl_pc_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_pc_cmd) +{ + t_addr addr; + class cl_cmd_arg *params[1]= { cmdline->param(0) }; + + if (params[0]) + { + if (!(params[0]->get_address(uc, &addr))) + { + con->dd_printf("Error: wrong parameter\n"); + return(DD_FALSE); + } + class cl_address_space *rom= uc->address_space(MEM_ROM_ID); + if (rom) + { + if (addr > rom->highest_valid_address()) + addr= rom->highest_valid_address(); + } + if (!uc->inst_at(addr)) + con->dd_printf("Warning: maybe not instruction at 0x%06x\n", addr); + uc->PC= addr; + } + uc->print_disass(uc->PC, con); + return(DD_FALSE); +} + + +/* + * Command: reset + *---------------------------------------------------------------------------- + */ + +//int +//cl_reset_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_reset_cmd) +{ + uc->reset(); + return(0); +} + + +/* + * Command: dump + *---------------------------------------------------------------------------- + */ + +//int +//cl_dump_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_dump_cmd) +{ + class cl_memory *mem= 0; + long bpl= 8; + t_addr start= 0, end; + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + + if (params[0] && + params[0]->as_bit(uc)) + { + int i= 0; + while (params[0] && + params[0]->as_bit(uc)) + { + t_mem m; + mem= params[0]->value.bit.mem; + m= mem->read(params[0]->value.bit.mem_address); + char *sn= + uc->symbolic_bit_name((t_addr)-1, + mem, + params[0]->value.bit.mem_address, + params[0]->value.bit.mask); + con->dd_printf("%10s ", sn?sn:""); + con->dd_printf(mem->addr_format, params[0]->value.bit.mem_address); + con->dd_printf(" "); + con->dd_printf(mem->data_format, m); + con->dd_printf(" %c\n", (m&(params[0]->value.bit.mask))?'1':'0'); + i++; + params[0]= cmdline->param(i); + } + if (params[0]) + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax\n"); + } + else + { + if (!params[0] || + !params[0]->as_memory(uc)) + { + con->dd_printf("No memory specified. Use \"info memory\" for available memories\n"); + return(DD_FALSE); + } + if (cmdline->syntax_match(uc, MEMORY)) + { + mem= params[0]->value.memory.memory; + mem->dump(con); + } + else if (cmdline->syntax_match(uc, MEMORY ADDRESS)) { + mem = params[0]->value.memory.memory; + start= params[1]->value.address; + end = start+10*8-1; + mem->dump(start, end, bpl, con); + } + else if (cmdline->syntax_match(uc, MEMORY ADDRESS ADDRESS)) { + mem = params[0]->value.memory.memory; + start= params[1]->value.address; + end = params[2]->value.address; + mem->dump(start, end, bpl, con); + } + else if (cmdline->syntax_match(uc, MEMORY ADDRESS ADDRESS NUMBER)) { + mem = params[0]->value.memory.memory; + start= params[1]->value.address; + end = params[2]->value.address; + bpl = params[3]->value.number; + mem->dump(start, end, bpl, con); + } + else + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax\n"); + } + + return(DD_FALSE);; +} + + +/* + * Command: di + *---------------------------------------------------------------------------- + */ + +//int +//cl_di_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_di_cmd) +{ + cmdline->insert_param(0, new cl_cmd_sym_arg("iram")); + cl_dump_cmd::do_work(uc, cmdline, con); + return(0); +} + + +/* + * Command: dx + *---------------------------------------------------------------------------- + */ + +//int +//cl_dx_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_dx_cmd) +{ + cmdline->insert_param(0, new cl_cmd_sym_arg("xram")); + cl_dump_cmd::do_work(uc, cmdline, con); + return(0); +} + + +/* + * Command: dch + *---------------------------------------------------------------------------- + */ + +//int +//cl_dch_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_dch_cmd) +{ + cmdline->insert_param(0, new cl_cmd_sym_arg("rom")); + cl_dump_cmd::do_work(uc, cmdline, con); + return(0); +} + + +/* + * Command: ds + *---------------------------------------------------------------------------- + */ + +//int +//cl_ds_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_ds_cmd) +{ + cmdline->insert_param(0, new cl_cmd_sym_arg("sfr")); + cl_dump_cmd::do_work(uc, cmdline, con); + return(0); +} + + +/* + * Command: dc + *---------------------------------------------------------------------------- + */ + +//int +//cl_dc_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_dc_cmd) +{ + t_addr start= last, end= last+20; + class cl_cmd_arg *params[2]= { cmdline->param(0), + cmdline->param(1) }; + class cl_address_space *rom= uc->address_space(MEM_ROM_ID); + + if (!rom) + return(DD_FALSE); + if (params[0] == 0) + ; + else if (cmdline->syntax_match(uc, ADDRESS)) { + start= params[0]->value.address; + end= start+20; + } + else if (cmdline->syntax_match(uc, ADDRESS ADDRESS)) { + start= params[0]->value.address; + end= params[1]->value.address; + } + if (start > rom->highest_valid_address()) + { + con->dd_printf("Error: start address is too high\n"); + return(DD_FALSE); + } + if (end > rom->highest_valid_address()) + { + con->dd_printf("Error: end address is too high\n"); + return(DD_FALSE); + } + + for (; + start <= end; + start+= uc->inst_length(start)) + uc->print_disass(start, con); + last= start; + return(DD_FALSE); +} + + +/* + * Command: disassemble + *---------------------------------------------------------------------------- + */ + +static int disass_last_stop= 0; + +//int +//cl_disassemble_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_disassemble_cmd) +{ + t_addr start, realstart; + int offset= -1, dir, lines= 20; + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + + start= disass_last_stop; + if (params[0] == 0) ; + else if (cmdline->syntax_match(uc, ADDRESS)) { + start= params[0]->value.address; + } + else if (cmdline->syntax_match(uc, ADDRESS NUMBER)) { + start= params[0]->value.address; + offset= params[1]->value.number; + } + else if (cmdline->syntax_match(uc, ADDRESS NUMBER NUMBER)) { + start= params[0]->value.address; + offset= params[1]->value.number; + lines= params[2]->value.number; + } + else + { + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax\n"); + return(DD_FALSE); + } + + if (lines < 1) + { + con->dd_printf("Error: wrong `lines' parameter\n"); + return(DD_FALSE); + } + if (!uc->there_is_inst()) + return(DD_FALSE); + realstart= start; + class cl_address_space *rom= uc->address_space(MEM_ROM_ID); + if (!rom) + return(DD_FALSE); + while (realstart <= rom->highest_valid_address() && + !uc->inst_at(realstart)) + realstart= realstart+1; + if (offset) + { + dir= (offset < 0)?-1:+1; + while (offset) + { + realstart= rom->inc_address(realstart, dir); + while (!uc->inst_at(realstart)) + realstart= rom->inc_address(realstart, dir); + offset+= -dir; + } + } + + while (lines) + { + uc->print_disass(realstart, con); + realstart= rom->inc_address(realstart, +1) + rom->start_address; + while (!uc->inst_at(realstart)) + realstart= rom->inc_address(realstart, +1) + rom->start_address; + lines--; + } + + disass_last_stop= realstart; + + return(DD_FALSE);; +} + + +/* + * Command: fill + *---------------------------------------------------------------------------- + */ + +//int +//cl_fill_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_fill_cmd) +{ + class cl_memory *mem= 0; + t_mem what= 0; + t_addr start= 0, end; + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + + if (cmdline->syntax_match(uc, MEMORY ADDRESS ADDRESS NUMBER)) { + mem = params[0]->value.memory.memory; + start= params[1]->value.address; + end = params[2]->value.address; + what = params[3]->value.number; + t_addr i; + for (i= start; i <= end; i++) + { + t_mem d; + d= what; + mem->write(i, d); + } + } + else + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax\n"); + + return(DD_FALSE);; +} + + +/* + * Command: where + *---------------------------------------------------------------------------- + */ + +int +cl_where_cmd::do_real_work(class cl_uc *uc, + class cl_cmdline *cmdline, class cl_console_base *con, + bool case_sensitive) +{ + class cl_memory *mem= 0; + class cl_cmd_arg *params[2]= { cmdline->param(0), + cmdline->param(1) }; + + if (cmdline->syntax_match(uc, MEMORY DATALIST)) { + mem= params[0]->value.memory.memory; + t_mem *array= params[1]->value.data_list.array; + int len= params[1]->value.data_list.len; + if (!len) + { + con->dd_printf("Error: nothing to search for\n"); + return(DD_FALSE); + } + t_addr addr= 0; + bool found= mem->search_next(case_sensitive, array, len, &addr); + while (found) + { + mem->dump(addr, addr+len-1, 8, con); + addr++; + found= mem->search_next(case_sensitive, array, len, &addr); + } + } + else + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax\n"); + + return(DD_FALSE); +} + +//int +//cl_where_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_where_cmd) +{ + return(do_real_work(uc, cmdline, con, DD_FALSE)); +} + +//int +//cl_Where_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_Where_cmd) +{ + return(do_real_work(uc, cmdline, con, DD_TRUE)); +} + + +/* End of cmd.src/cmduc.cc */ diff --git a/sim/ucsim/cmd.src/cmduccl.h b/sim/ucsim/cmd.src/cmduccl.h new file mode 100644 index 0000000..94f1ae6 --- /dev/null +++ b/sim/ucsim/cmd.src/cmduccl.h @@ -0,0 +1,57 @@ +/* + * Simulator of microcontrollers (cmd.src/cmduccl.h) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_CMDUCCL_HEADER +#define CMD_CMDUCCL_HEADER + +#include "newcmdcl.h" + +COMMAND_ON(uc,cl_state_cmd); +COMMAND_ON(uc,cl_file_cmd); +COMMAND_ON(uc,cl_dl_cmd); +COMMAND_ON(uc,cl_pc_cmd); +COMMAND_ON(uc,cl_reset_cmd); +COMMAND_ON(uc,cl_dump_cmd); +COMMAND_ANCESTOR_ON(uc,cl_di_cmd,cl_dump_cmd); +COMMAND_ANCESTOR_ON(uc,cl_dx_cmd,cl_dump_cmd); +COMMAND_ANCESTOR_ON(uc,cl_ds_cmd,cl_dump_cmd); +COMMAND_ANCESTOR_ON(uc,cl_dch_cmd,cl_dump_cmd); +COMMAND_DATA_ON(uc,cl_dc_cmd,t_addr last); +COMMAND_DATA_ON(uc,cl_disassemble_cmd,int last); +COMMAND_DATA_ON(uc,cl_fill_cmd,int last); +COMMAND_HEAD(cl_where_cmd) + public: int last; +COMMAND_METHODS_ON(uc,cl_where_cmd) + virtual int do_real_work(class cl_uc *uc, + class cl_cmdline *cmdline, class cl_console_base *con, + bool case_sensitive); +COMMAND_TAIL; +COMMAND_DATA_ANCESTOR_ON(uc,cl_Where_cmd,cl_where_cmd,int last); + +#endif + +/* End of cmd.src/cmduccl.h */ diff --git a/sim/ucsim/cmd.src/cmdutil.cc b/sim/ucsim/cmd.src/cmdutil.cc new file mode 100644 index 0000000..955c51e --- /dev/null +++ b/sim/ucsim/cmd.src/cmdutil.cc @@ -0,0 +1,483 @@ +/* + * Simulator of microcontrollers (cmd.src/cmdutil.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * Copyright (C) 2006, Borut Razem - borut.razem@siol.net + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include +#include +#include +#include +#include +#ifdef SOCKET_AVAIL +# include HEADER_SOCKET +# if defined HAVE_SYS_SOCKET_H +# include +# include +# endif +#endif +#ifdef HAVE_UNISTD_H +#include +#endif +#ifdef _WIN32 +#include +#endif + +#include "i_string.h" + +#include "stypes.h" +#include "globals.h" +#include "uccl.h" +#include "cmdutil.h" + + +/* + * Making a socket which can be used to listen for a specified port + */ + +#ifdef SOCKET_AVAIL +#ifdef _WIN32 +static void +init_winsock(void) +{ + static bool is_initialized = false; + + if (!is_initialized) + { + WSADATA wsaData; + + // Initialize Winsock + int iResult = WSAStartup(MAKEWORD(2,2), &wsaData); + if (iResult != 0) + { + printf("WSAStartup failed: %d\n", iResult); + exit(1); + } + } +} + +SOCKET +make_server_socket(unsigned short int port) +{ + init_winsock(); + + struct sockaddr_in name; + + /* Create the socket. */ + SOCKET sock = WSASocket(PF_INET, SOCK_STREAM, IPPROTO_TCP, NULL, 0, 0); + if (INVALID_SOCKET == sock) + { + fprintf(stderr, "socket: %d\n", WSAGetLastError()); + return INVALID_SOCKET; + } + + name.sin_family = AF_INET; + name.sin_port = htons(port); + name.sin_addr.s_addr= htonl(INADDR_ANY); + if (SOCKET_ERROR == bind(sock, (struct sockaddr *)&name, sizeof(name))) + { + fprintf(stderr, "bind: %d\n", WSAGetLastError()); + return INVALID_SOCKET; + } + + return sock; +} +#else +int +make_server_socket(unsigned short int port) +{ + int sock, i; + struct sockaddr_in name; + + /* Create the socket. */ + sock= socket(PF_INET, SOCK_STREAM, 0); + if (sock < 0) + { + perror("socket"); + return(0); + } + + /* Give the socket a name. */ + i= 1; + if (setsockopt(sock, SOL_SOCKET, SO_REUSEADDR, (char*)&i, sizeof(i)) < 0) + { + perror("setsockopt"); + } + name.sin_family = AF_INET; + name.sin_port = htons(port); + name.sin_addr.s_addr= htonl(INADDR_ANY); + if (bind(sock, (struct sockaddr *)&name, sizeof(name)) < 0) + { + perror("bind"); + return(0); + } + + return(sock); +} +#endif +#endif + +#if _WIN32 +enum e_handle_type +get_handle_type(HANDLE handle) +{ + DWORD file_type = GetFileType(handle); + + switch (file_type) + { + case FILE_TYPE_CHAR: + { + DWORD err; + + if (!ClearCommError(handle, &err, NULL)) + { + switch (GetLastError()) + { + case ERROR_INVALID_HANDLE: + return CH_CONSOLE; + + case ERROR_INVALID_FUNCTION: + /* + * In case of NUL device return type CH_FILE. + * Is this the correct way to test it? + */ + return CH_FILE; + + default: + assert(false); + } + } + } + return CH_SERIAL; + + case FILE_TYPE_DISK: + return CH_FILE; + } + + char sockbuf[256]; + int optlen = sizeof(sockbuf); + + if (SOCKET_ERROR != getsockopt((SOCKET)handle, SOL_SOCKET, SO_TYPE, sockbuf, &optlen) || + WSAENOTSOCK != WSAGetLastError()) + return CH_SOCKET; + + assert(false); + return CH_UNDEF; +} + +bool +input_avail(HANDLE handle, e_handle_type type) +{ + if (CH_UNDEF == type) + type = get_handle_type(handle); + + switch (type) + { + case CH_SOCKET: + { + struct timeval tv = {0, 0}; + + assert(INVALID_HANDLE_VALUE != handle); + + fd_set s; + FD_ZERO(&s); + FD_SET((SOCKET)handle, &s); + + int ret = select(0, &s, NULL, NULL, &tv); + if (SOCKET_ERROR == ret) + fprintf(stderr, "Can't select: %d\n", WSAGetLastError()); + + return ret != SOCKET_ERROR && ret != 0; + } + + case CH_FILE: + return true; + + case CH_CONSOLE: + { + PINPUT_RECORD pIRBuf; + DWORD NumPending; + DWORD NumPeeked; + + /* + * Peek all pending console events + */ + if (INVALID_HANDLE_VALUE == handle || + !GetNumberOfConsoleInputEvents(handle, &NumPending) || + NumPending == 0 || + NULL == (pIRBuf = (PINPUT_RECORD)_alloca(NumPending * sizeof(INPUT_RECORD)))) + return false; + + if (PeekConsoleInput(handle, pIRBuf, NumPending, &NumPeeked) && + NumPeeked != 0L && + NumPeeked <= NumPending) + { + /* + * Scan all of the peeked events to determine if any is a key event + * which should be recognized. + */ + for ( ; NumPeeked > 0 ; NumPeeked--, pIRBuf++ ) + { + if (KEY_EVENT == pIRBuf->EventType && + pIRBuf->Event.KeyEvent.bKeyDown && + pIRBuf->Event.KeyEvent.uChar.AsciiChar) + return true; + } + } + + return false; + } + + case CH_SERIAL: + { + DWORD err; + COMSTAT comStat; + + bool res = ClearCommError(handle, &err, &comStat); + assert(res); + + return res ? comStat.cbInQue > 0 : false; + } + + default: + assert(false); + return false; + } +} +#else +bool +input_avail(UCSOCKET_T fd) +{ + assert(0 <= fd); + + fd_set s; + FD_ZERO(&s); + FD_SET(fd, &s); + + struct timeval tv = {0, 0}; + + int i = select(fd + 1, &s, NULL, NULL, &tv); + if (i < 0) + perror("select"); + + return i > 0; +} +#endif + +/* + * Searching for a name in the specified table + */ + +struct name_entry * +get_name_entry(struct name_entry tabl[], char *name, class cl_uc *uc) +{ + int i= 0; + char *p; + + if (!tabl || + !name || + !(*name)) + return(0); + for (p= name; *p; *p= toupper(*p), p++); + while (tabl[i].name && + (!(tabl[i].cpu_type & uc->type) || + (strcmp(tabl[i].name, name) != 0))) + { + //printf("tabl[%d].name=%s <-> %s\n",i,tabl[i].name,name); + i++; + } + if (tabl[i].name != NULL) + return(&tabl[i]); + else + return(0); +} + + +/* + * Interpreting a bitname + */ + +/*bool +interpret_bitname(char *name, class cl_uc *uc, + uchar **cell, uchar *celladdr, + uchar *bitaddr, uchar *bitmask, + char **symname) +{ + char *dot, *p; + char *sym, bitnumstr[2]; + struct name_entry *ne; + int bitnum, i; + + if ((dot= strchr(name, '.')) != NULL) + { + *dot++= '\0'; + if ((ne= get_name_entry(uc->sfr_tbl(), name, uc)) == NULL) + { + *celladdr= strtol(name, &p, 0); + if (p && *p) + { + dot--; + *dot= '.'; + return(DD_FALSE); + } + } + else + *celladdr= ne->addr; + if ((*celladdr < 0x20) || + ((*celladdr > 0x2f) && (*celladdr < 0x80)) || + ((*celladdr > 0x7f) && (*celladdr & 0x07))) + return(DD_FALSE); + bitnum= strtol(dot, &p, 0); + if ((p && *p) || + (bitnum < 0) || + (bitnum > 7)) + return(DD_FALSE); + if (*celladdr > 0x7f) + *bitaddr= *celladdr + bitnum; + else + *bitaddr= (*celladdr - 0x20)*8 + bitnum; + dot--; + *dot= '.'; + } + else + { + if ((ne= get_name_entry(uc->bit_tbl(), name, uc)) == NULL) + { + *bitaddr= strtol(name, &p, 0); + if ((p && *p) || + (*bitaddr > 0xff)) + return(DD_FALSE); + } + else + *bitaddr= ne->addr; + if (*bitaddr > 0x7f) + *celladdr= *bitaddr & 0xf8; + else + *celladdr= (*bitaddr >> 3) + 0x20; + } + // *bitaddr, *celladdr now OK + *cell= uc->get_bit//FIXME + (*bitaddr); + *bitmask= BIT_MASK(*bitaddr); + // making symbolic name + if (!symname) + return(DD_TRUE); + i= 0; + while (uc->bit_tbl()[i].name && + (uc->bit_tbl()[i].addr != *bitaddr)) + i++; + if (uc->bit_tbl()[i].name) + { + sym= strdup(uc->bit_tbl()[i].name); + *symname= sym; + return(DD_TRUE); + } + i= 0; + while (uc->sfr_tbl()[i].name && + (uc->sfr_tbl()[i].addr != *celladdr)) + i++; + if (uc->sfr_tbl()[i].name) + sym= strdup(uc->sfr_tbl()[i].name); + else + { + sym= (char *)malloc(3); + sprintf(sym, "%02x", *celladdr); + } + sym= (char *)realloc(sym, strlen(sym)+2); + strcat(sym, "."); + sprintf(bitnumstr, "%1d", *bitaddr & 0x07); + strcat(sym, bitnumstr); + *symname= sym; + return(DD_TRUE); +}*/ + + +/* + * Processing escape sequencies in a string + */ + +char * +proc_escape(char *string, int *len) +{ + char spec_chars[]= "fnrtvab\""; + char spec[]= "\f\n\r\t\v\a\b\""; + char *s, *str, *p; + + s = string; + str= (char *)malloc(strlen(string)+1); + p = str; + while (*s) + { + char *spec_c; + + if (*s == '\\' && + *(s+1)) + { + s++; + if (*s == '0') + { + if (!isdigit(*(s+1))) + { + *p++= '\0'; + s++; + } + else + { + char *octal, *chk, data; + int i, j; + i= strspn(s, "01234567"); + octal= (char *)malloc(i+1); + j= 0; + while (*s && + (j < i)) + octal[j++]= *s++; + octal[j]= '\0'; + data= strtol(octal, &chk, 8); + if (!chk || !(*chk)) + *p++= data; + } + } + else + if ((spec_c= strchr(spec_chars, *s)) != NULL) + { + *p++= spec[spec_c-spec_chars]; + s++; + } + else + *p++= *s++; + } + else + *p++= *s++; + } + *p= '\0'; + *len= p-str; + return(str); +} + + +/* End of cmd.src/cmdutil.cc */ diff --git a/sim/ucsim/cmd.src/cmdutil.h b/sim/ucsim/cmd.src/cmdutil.h new file mode 100644 index 0000000..09ade8d --- /dev/null +++ b/sim/ucsim/cmd.src/cmdutil.h @@ -0,0 +1,63 @@ +/* + * Simulator of microcontrollers (cmd.src/cmdutil.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * Copyright (C) 2006, Borut Razem - borut.razem@siol.net + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_CMDUTIL_HEADER +#define CMD_CMDUTIL_HEADER + +#ifdef SOCKET_AVAIL +# include HEADER_SOCKET +#endif + +#include "ddconfig.h" + +#include "uccl.h" + +#ifdef SOCKET_AVAIL +extern UCSOCKET_T make_server_socket(unsigned short int port); +#endif +#ifdef _WIN32 +enum e_handle_type { CH_UNDEF, CH_FILE, CH_SOCKET, CH_CONSOLE, CH_SERIAL,}; +enum e_handle_type get_handle_type(HANDLE handle); +bool input_avail(HANDLE handle, e_handle_type type = CH_UNDEF); +#else +bool input_avail(UCSOCKET_T handle); +#endif +//extern void print_bin(long data, int bits, class cl_console_base *con); +extern struct name_entry *get_name_entry(struct name_entry tabl[], + char *name, + class cl_uc *uc); +/*extern bool interpret_bitname(char *name, class cl_uc *uc, + uchar **cell, uchar *celladdr, + uchar *bitaddr, uchar *bitmask, + char **symname);*/ +extern char *proc_escape(char *string, int *len); + + +#endif + +/* End of cmd.src/cmdutil.h */ diff --git a/sim/ucsim/cmd.src/command.cc b/sim/ucsim/cmd.src/command.cc new file mode 100644 index 0000000..f52e370 --- /dev/null +++ b/sim/ucsim/cmd.src/command.cc @@ -0,0 +1,815 @@ +/* + * Simulator of microcontrollers (cmd.src/command.cc) + * + * Copyright (C) 2002,02 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include "i_string.h" + +// prj + +// local, cmd +#include "commandcl.h" + + +/* + * Command line + *____________________________________________________________________________ + */ + +cl_cmdline::cl_cmdline(class cl_app *the_app, + char *acmd, class cl_console_base *acon): + cl_base() +{ + app= the_app; + cmd= strdup(acmd); + params= new cl_list(2, 2, "command line params"); + tokens= new cl_ustrings(2, 2, "command line tokens"); + set_name(0); + matched_syntax= 0; + con= acon; +} + +cl_cmdline::~cl_cmdline(void) +{ + if (cmd) + free(cmd); + delete params; + delete tokens; +} + +int +cl_cmdline::init(void) +{ + split(); + return(0); +} + +char * +cl_cmdline::skip_delims(char *start) +{ + while (*start && + strchr(" \t\v\r,", *start)) + start++; + return(start); +} + +int +cl_cmdline::split(void) +{ + //class cl_sim *sim; + char *start= cmd; + int i; + class cl_cmd_arg *arg; + + //sim= app->get_sim(); + set_name("\n"); + if (!cmd || + !*cmd) + return(0); + start+= strspn(start, " \t\v\r,"); + if (start && + *start == '\n') + { + char *n= (char*)malloc(2); + strcpy(n, "\n"); + set_name(n); + return(0); + } + if (!*start) + return(0); + i= strcspn(start, " \t\v\r,"); + if (i) + { + char *n= (char*)malloc(i+1); + strncpy(n, start, i); + n[i]= '\0'; + set_name(n); + } + start+= i; + start= skip_delims(start); + // skip delimiters + while (*start) + { + char *end= start, *param_str; + if (*start == '"') + split_out_string(&start, &end); + else if (*start == '>') + split_out_output_redirection(&start, &end); + else + { + char *dot; + i= strcspn(start, " \t\v\r,"); + end= start+i; + param_str= (char *)malloc(i+1); + strncpy(param_str, start, i); + param_str[i]= '\0'; + tokens->add(strdup(param_str)); + if ((dot= strchr(param_str, '.')) != NULL) + split_out_bit(dot, param_str); + else if ((dot= strchr(param_str, '[')) != NULL) + split_out_array(dot, param_str); + else if (strchr("0123456789-+", *param_str) != NULL) + { + // number + params->add(arg= new cl_cmd_int_arg((long) + strtol(param_str, 0, 0))); + arg->init(); + } + else + { + // symbol + params->add(arg= new cl_cmd_sym_arg(param_str)); + arg->init(); + } + free(param_str); + } + start= end; + start= skip_delims(start); + } + return(0); +} + +void +cl_cmdline::split_out_string(char **_start, char **_end) +{ + char *start= *_start, *end; + start++; + end= start; + while (*end && + *end != '"') + { + if (*end == '\\') + { + end++; + if (*end) + end++; + } + else + end++; + } + if (*end == '"') + end--; + else + con->dd_printf("Unterminated string\n"); + char *param_str= (char *)malloc(end-start+2); + strncpy(param_str, start, 1+end-start); + param_str[1+end-start]= '\0'; + tokens->add(strdup(param_str)); + class cl_cmd_arg *arg; + params->add(arg= new cl_cmd_str_arg(param_str)); + arg->init(); + free(param_str); + if (*end) + end++; + if (*end == '"') + end++; + *_start= start; + *_end= end; +} + +void +cl_cmdline::split_out_output_redirection(char **_start, char **_end) +{ + char *start= *_start, *end/*= *_end*/; + int i; + char mode[2]; + + mode[0]= 'w'; + mode[1]= '\0'; + start++; + i= strcspn(start, " \t\v\r,"); + end= start+i; + char *param_str= (char *)malloc(i+1); + char *n= param_str; + strncpy(param_str, start, i); + param_str[i]= '\0'; + if (param_str && + param_str[0] == '>') + { + n++; + mode[0]= 'a'; + } + tokens->add(strdup(n)); + con->redirect(n, mode); + free(param_str); + *_start= start; + *_end= end; +} + +void +cl_cmdline::split_out_bit(char *dot, char *param_str) +{ + class cl_cmd_arg *sfr, *bit; + + *dot= '\0'; + dot++; + if (strchr("0123456789", *param_str) != NULL) + { + sfr= new cl_cmd_int_arg((long)strtol(param_str, 0, 0)); + sfr->init(); + } + else + { + sfr= new cl_cmd_sym_arg(param_str); + sfr->init(); + } + if (*dot == '\0') + { + bit= 0; + con->dd_printf("Uncomplete bit address\n"); + delete sfr; + } + else + { + if (strchr("0123456789", *dot) != NULL) + { + bit= new cl_cmd_int_arg((long)strtol(dot, 0, 0)); + bit->init(); + } + else + { + bit= new cl_cmd_sym_arg(dot); + bit->init(); + } + class cl_cmd_arg *arg; + params->add(arg= new cl_cmd_bit_arg(sfr, bit)); + arg->init(); + } +} + +void +cl_cmdline::split_out_array(char *dot, char *param_str) +{ + class cl_cmd_arg *aname, *aindex; + + *dot= '\0'; + dot++; + if (strchr("0123456789", *param_str) != NULL) + { + aname= new cl_cmd_int_arg((long)strtol(param_str, 0, 0)); + aname->init(); + } + else + { + aname= new cl_cmd_sym_arg(param_str); + aname->init(); + } + if (*dot == '\0') + { + aname= 0; + con->dd_printf("Uncomplete array\n"); + } + else + { + char *p; + p= dot + strlen(dot) - 1; + while (p > dot && + *p != ']') + { + *p= '\0'; + p--; + } + if (*p == ']') + *p= '\0'; + if (strlen(dot) == 0) + { + con->dd_printf("Uncomplete array index\n"); + delete aname; + } + else + { + if (strchr("0123456789", *dot) != NULL) + { + aindex= new cl_cmd_int_arg((long)strtol(dot, 0, 0)); + aindex->init(); + } + else + { + aindex= new cl_cmd_sym_arg(dot); + aindex->init(); + } + class cl_cmd_arg *arg; + params->add(arg= new cl_cmd_array_arg(aname, aindex)); + arg->init(); + } + } +} + +int +cl_cmdline::shift(void) +{ + char *s= skip_delims(cmd); + + set_name(0); + if (s && *s) + { + while (*s && + strchr(" \t\v\r,", *s) == NULL) + s++; + s= skip_delims(s); + char *p= strdup(s); + free(cmd); + cmd= p; + delete params; + params= new cl_list(2, 2, "params"); + split(); + if (strcmp(get_name(), "\n") == 0) + set_name(0); + } + return(have_real_name()); +} + +int +cl_cmdline::repeat(void) +{ + const char *n; + return((n= get_name()) && + *n == '\n'); +} + +class cl_cmd_arg * +cl_cmdline::param(int num) +{ + if (num >= params->count) + return(0); + return((class cl_cmd_arg *)(params->at(num))); +} + +void +cl_cmdline::insert_param(int pos, class cl_cmd_arg *param) +{ + if (pos >= params->count) + params->add(param); + else + params->add_at(pos, param); +} + +bool +cl_cmdline::syntax_match(class cl_uc *uc, const char *syntax) +{ + if (!syntax) + return(DD_FALSE); + if (!*syntax && + !params->count) + { + matched_syntax= syntax; + return(DD_TRUE); + } + if (!params->count) + return(DD_FALSE); + //printf("syntax %s?\n",syntax); + const char *p= syntax; + int iparam= 0; + class cl_cmd_arg *parm= (class cl_cmd_arg *)(params->at(iparam)); + while (*p && + parm) + { + //printf("***Checking %s as %c\n",parm->get_svalue(),*p); + if (uc) + switch (*p) + { + case SY_ADDR: + if (!parm->as_address(uc)) + return(DD_FALSE); + //printf("ADDRESS match %lx\n",parm->value.address); + break; + case SY_MEMORY: + if (!parm->as_memory(uc)) + return(DD_FALSE); + //printf("MEMORY match %s\n",parm->value.memory->class_name); + break; + case SY_BIT: + if (!parm->as_bit(uc)) + return(DD_FALSE); + break; + } + switch (*p) + { + case SY_ADDR: case SY_MEMORY: case SY_BIT: break; + case SY_NUMBER: + if (!parm->as_number()) + return(DD_FALSE); + break; + case SY_DATA: + if (!parm->as_data()) + return(DD_FALSE); + break; + case SY_HW: + if (!parm->as_hw(uc)) + return(DD_FALSE); + break; + case SY_STRING: + if (!parm->as_string()) + return(DD_FALSE); + break; + case SY_DATALIST: + if (!set_data_list(parm, &iparam)) + return(DD_FALSE); + break; + default: + return(DD_FALSE); + } + p++; + iparam++; + if (iparam < params->count) + parm= (class cl_cmd_arg *)(params->at(iparam)); + else + parm= 0; + } + if (!*p && + !parm) + { + matched_syntax= syntax; + return(DD_TRUE); + } + return(DD_FALSE); +} + +bool +cl_cmdline::set_data_list(class cl_cmd_arg *parm, int *iparm) +{ + class cl_cmd_arg *next_parm; + int len, i, j; + t_mem *array; + + len= 0; + array= 0; + for (i= *iparm, next_parm= param(i); next_parm; i++, next_parm= param(i)) + { + if (next_parm->is_string()) + { + int l; + char *s; + //s= proc_escape(next_parm->get_svalue(), &l); + if (!next_parm->as_string()) + continue; + s= next_parm->value.string.string; + l= next_parm->value.string.len; + if (!array) + array= (t_mem*)malloc(sizeof(t_mem)*l); + else + array= (t_mem*)realloc(array, sizeof(t_mem)*(l+len)); + for (j= 0; j < l; j++) + { + array[len]= s[j]; + len++; + } + //if (s) + //free(s); + } + else + { + if (!next_parm->as_data()) + { + if (array) + free(array); + return(DD_FALSE); + } + if (!array) + array= (t_mem*)malloc(sizeof(t_mem)); + else + array= (t_mem*)realloc(array, sizeof(t_mem)*(1+len)); + array[len]= next_parm->value.data; + len++; + } + } + *iparm= i; + parm->value.data_list.array= array; + parm->value.data_list.len= len; + return(DD_TRUE); +} + + +/* + * Command + *____________________________________________________________________________ + */ + +cl_cmd::cl_cmd(enum cmd_operate_on op_on, + const char *aname, + int can_rep, + const char *short_hlp, + const char *long_hlp): + cl_base() +{ + operate_on= op_on; + names= new cl_strings(1, 1, "names of a command"); + names->add(aname?strdup(aname):strdup("unknown")); + can_repeat= can_rep; + short_help= short_hlp?strdup(short_hlp):NULL; + long_help= long_hlp?strdup(long_hlp):NULL; +} + +/*cl_cmd::cl_cmd(class cl_sim *asim): + cl_base() +{ + sim= asim; + name= short_help= long_help= 0; + can_repeat= 0; +}*/ + +cl_cmd::~cl_cmd(void) +{ + delete names; +} + +void +cl_cmd::add_name(const char *nam) +{ + if (nam) + names->add(strdup(nam)); +} + +int +cl_cmd::name_match(const char *aname, int strict) +{ + int i; + + if (names->count == 0 && + !aname) + return(1); + if (!aname) + return(0); + if (strict) + { + for (i= 0; i < names->count; i++) + { + char *n= (char*)(names->at(i)); + if (strcmp(aname, n) == 0) + return(1); + } + } + else + { + for (i= 0; i < names->count; i++) + { + char *n= (char*)(names->at(i)); + if (strstr(n, aname) == n) + return(1); + } + } + return(0); +} + +int +cl_cmd::name_match(class cl_cmdline *cmdline, int strict) +{ + return(name_match(cmdline->get_name(), strict)); +} + +int +cl_cmd::syntax_ok(class cl_cmdline *cmdline) +{ + return(1); +} + +int +cl_cmd::work(class cl_app *app, + class cl_cmdline *cmdline, class cl_console_base *con) +{ + if (!syntax_ok(cmdline)) + return(0); + class cl_sim *sim= app->get_sim(); + class cl_uc *uc= 0; + if (sim) + uc= sim->uc; + switch (operate_on) + { + case operate_on_app: + if (!app) + { + con->dd_printf("There is no application to work on!\n"); + return(DD_TRUE); + } + return(do_work(app, cmdline, con)); + case operate_on_sim: + if (!sim) + { + con->dd_printf("There is no simulator to work on!\n"); + return(DD_TRUE); + } + return(do_work(sim, cmdline, con)); + case operate_on_uc: + if (!sim) + { + con->dd_printf("There is no microcontroller to work on!\n"); + return(DD_TRUE); + } + return(do_work(uc, cmdline, con)); + default: + return(do_work(cmdline, con)); + } +} + +int +cl_cmd::do_work(class cl_cmdline *cmdline, class cl_console_base *con) +{ + con->dd_printf("Command \"%s\" does nothing.\n", + (char*)(names->at(0))); + return(0); +} + +int +cl_cmd::do_work(class cl_app *app, + class cl_cmdline *cmdline, class cl_console_base *con) +{ + con->dd_printf("Command \"%s\" does nothing on application.\n", + (char*)(names->at(0))); + return(0); +} + +int +cl_cmd::do_work(class cl_sim *sim, + class cl_cmdline *cmdline, class cl_console_base *con) +{ + con->dd_printf("Command \"%s\" does nothing on simulator.\n", + (char*)(names->at(0))); + return(0); +} + +int +cl_cmd::do_work(class cl_uc *uc, + class cl_cmdline *cmdline, class cl_console_base *con) +{ + con->dd_printf("Command \"%s\" does nothing on microcontroller.\n", + (char*)(names->at(0))); + return(0); +} + + +/* + * Set of commands + *____________________________________________________________________________ + */ + +cl_cmdset::cl_cmdset(void): + cl_list(5, 5, "cmdset") +{ + //sim= 0; + //last_command= 0; +} + +/*cl_cmdset::cl_cmdset(class cl_sim *asim): + cl_list(5, 5) +{ + sim= asim; + last_command= 0; +}*/ + +class cl_cmd * +cl_cmdset::get_cmd(class cl_cmdline *cmdline, bool accept_last) +{ + int i; + + // exact match + for (i= 0; i < count; i++) + { + class cl_cmd *c= (class cl_cmd *)at(i); + if (c->name_match(cmdline, 1)) + return(c); + } + // not exact match + class cl_cmd *c_matched= 0; + for (i= 0; i < count; i++) + { + class cl_cmd *c= (class cl_cmd *)at(i); + if (c->name_match(cmdline, 0)) + { + if (!c_matched) + c_matched= c; + else + return(0); + } + } + return(c_matched); + //return(0); +} + +class cl_cmd * +cl_cmdset::get_cmd(const char *cmd_name) +{ + int i; + + for (i= 0; i < count; i++) + { + class cl_cmd *c= (class cl_cmd *)at(i); + if (c->name_match(cmd_name, 1)) + return(c); + } + return(0); +} + +void +cl_cmdset::del(char *nam) +{ + int i; + + if (!nam) + return; + for (i= 0; i < count; i++) + { + class cl_cmd *cmd= (class cl_cmd *)(at(i)); + if (cmd->name_match(nam, 1)) + free_at(i); + } +} + +void +cl_cmdset::replace(char *nam, class cl_cmd *cmd) +{ + int i; + + if (!nam) + return; + for (i= 0; i < count; i++) + { + class cl_cmd *c= (class cl_cmd *)(at(i)); + if (c->name_match(nam, 1)) + { + delete c; + put_at(i, cmd); + } + } +} + + +/* + * Composed command: subset of commands + *____________________________________________________________________________ + */ + +cl_super_cmd::cl_super_cmd(const char *aname, + int can_rep, + const char *short_hlp, + const char *long_hlp, + class cl_cmdset *acommands): + cl_cmd(operate_on_none, aname, can_rep, short_hlp, long_hlp) +{ + commands= acommands; +} + +cl_super_cmd::~cl_super_cmd(void) +{ + if (commands) + delete commands; +} + +int +cl_super_cmd::work(class cl_app *app, + class cl_cmdline *cmdline, class cl_console_base *con) +{ + class cl_cmd *cmd= 0; + + if (!commands) + return(0); + + if (!cmdline->shift()) + { + if ((cmd= commands->get_cmd("_no_parameters_")) != 0) + return(cmd->work(app, cmdline, con)); + int i; + con->dd_printf("\"%s\" must be followed by the name of a subcommand\n" + "List of subcommands:\n", (char*)(names->at(0))); + for (i= 0; i < commands->count; i++) + { + cmd= (class cl_cmd *)(commands->at(i)); + con->dd_printf("%s\n", cmd->short_help); + } + return(0); + } + if ((cmd= commands->get_cmd(cmdline, con->accept_last())) == NULL) + { + con->dd_printf("Undefined subcommand: \"%s\". Try \"help %s\".\n", + cmdline->get_name(), (char*)(names->at(0))); + return(0); + } + return(cmd->work(app, cmdline, con)); +} + + +/* End of cmd.src/command.cc */ diff --git a/sim/ucsim/cmd.src/commandcl.h b/sim/ucsim/cmd.src/commandcl.h new file mode 100644 index 0000000..6de3a68 --- /dev/null +++ b/sim/ucsim/cmd.src/commandcl.h @@ -0,0 +1,269 @@ +/* + * Simulator of microcontrollers (cmd.src/commandcl.h) + * + * Copyright (C) 2002,02 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_COMMAND_HEADER +#define CMD_COMMAND_HEADER + +#include "ddconfig.h" + +// prj +#include "pobjcl.h" + +// local, cmd +#include "newcmdcl.h" + + +enum cmd_operate_on { + operate_on_none, + operate_on_app, + operate_on_sim, + operate_on_uc +}; + + +/* + * Command line with parameters + */ + +class cl_cmdline: public cl_base +{ +public: + class cl_app *app; + char *cmd; + //char *name; + class cl_list *params; + class cl_ustrings *tokens; + const char *matched_syntax; + class cl_console_base *con; + +public: + cl_cmdline(class cl_app *the_app, char *acmd, class cl_console_base *acon); + virtual ~cl_cmdline(void); + virtual int init(void); + +private: + virtual void split_out_string(char **_start, char **_end); + virtual void split_out_output_redirection(char **_start, char **_end); + virtual void split_out_bit(char *dot, char *param_str); + virtual void split_out_array(char *dot, char *param_str); +public: + virtual int split(void); + virtual int shift(void); + virtual int repeat(void); + virtual class cl_cmd_arg *param(int num); + virtual void insert_param(int pos, class cl_cmd_arg *param); + virtual bool syntax_match(class cl_uc *uc, const char *syntax); + virtual bool set_data_list(class cl_cmd_arg *parm, int *iparm); + virtual int nuof_params(void) { return(params->get_count()); } +private: + char *skip_delims(char *start); +}; + + +/* + * Command and container + */ + +class cl_cmdset; + +// simple command +class cl_cmd: public cl_base +{ +public: + enum cmd_operate_on operate_on; + class cl_strings *names; + int can_repeat; + const char *short_help; + const char *long_help; + +public: + cl_cmd(enum cmd_operate_on opon, + const char *aname, + int can_rep, + const char *short_hlp, + const char *long_hlp); + virtual ~cl_cmd(void); + + virtual class cl_cmdset *get_subcommands(void) { return(0); } + virtual void add_name(const char *nam); + virtual int name_match(const char *aname, int strict); + virtual int name_match(class cl_cmdline *cmdline, int strict); + virtual int syntax_ok(class cl_cmdline *cmdline); + virtual int work(class cl_app *app, + class cl_cmdline *cmdline, class cl_console_base *con); + virtual int do_work(class cl_cmdline *cmdline, class cl_console_base *con); + virtual int do_work(class cl_app *app, + class cl_cmdline *cmdline, class cl_console_base *con); + virtual int do_work(class cl_sim *sim, + class cl_cmdline *cmdline, class cl_console_base *con); + virtual int do_work(class cl_uc *uc, + class cl_cmdline *cmdline, class cl_console_base *con); +}; + +#define COMMAND_HEAD(CLASS_NAME) \ +class CLASS_NAME : public cl_cmd\ +{ +#define COMMAND_HEAD_ANCESTOR(CLASS_NAME,ANCESTOR) \ +class CLASS_NAME : public ANCESTOR \ +{ + +#define COMMAND_METHODS(CLASS_NAME) \ +public:\ + CLASS_NAME (const char *aname,\ + int can_rep,\ + const char *short_help,\ + const char *long_help):\ + cl_cmd(operate_on_none, aname, can_rep, short_help, long_help) {}\ + virtual int do_work(class cl_cmdline *cmdline, class cl_console_base *con); + +#define COMMAND_METHODS_ON(ON,CLASS_NAME) \ +public:\ + CLASS_NAME (const char *aname,\ + int can_rep,\ + const char *short_help,\ + const char *long_help):\ + cl_cmd(operate_on_ ## ON, aname, can_rep, short_help, long_help) {}\ + virtual int do_work(class cl_ ## ON * ON ,\ + class cl_cmdline *cmdline, class cl_console_base *con); + +#define COMMAND_METHODS_ANCESTOR(CLASS_NAME,ANCESTOR) \ +public:\ + CLASS_NAME (const char *aname,\ + int can_rep,\ + const char *short_help,\ + const char *long_help):\ + ANCESTOR (aname, can_rep, short_help, long_help) {}\ + virtual int do_work(class cl_cmdline *cmdline, class cl_console_base *con); + +#define COMMAND_METHODS_ANCESTOR_ON(ON,CLASS_NAME,ANCESTOR) \ +public:\ + CLASS_NAME (const char *aname,\ + int can_rep,\ + const char *short_help,\ + const char *long_help):\ + ANCESTOR (aname, can_rep, short_help, long_help) {}\ + virtual int do_work(class cl_ ## ON * ON ,\ + class cl_cmdline *cmdline, class cl_console_base *con); \ + + +#define COMMAND_TAIL } + +#define COMMAND(CLASS_NAME) \ +COMMAND_HEAD(CLASS_NAME) \ +COMMAND_METHODS(CLASS_NAME) \ +COMMAND_TAIL + +#define COMMAND_ON(ON,CLASS_NAME) \ +COMMAND_HEAD(CLASS_NAME) \ +COMMAND_METHODS_ON(ON,CLASS_NAME) \ +COMMAND_TAIL + +#define COMMAND_DATA(CLASS_NAME,DATA) \ +COMMAND_HEAD(CLASS_NAME) \ +public: DATA ; \ +COMMAND_METHODS(CLASS_NAME)\ +COMMAND_TAIL + +#define COMMAND_DATA_ON(ON,CLASS_NAME,DATA) \ +COMMAND_HEAD(CLASS_NAME) \ +public: DATA ; \ +COMMAND_METHODS_ON(ON,CLASS_NAME)\ +COMMAND_TAIL + +#define COMMAND_ANCESTOR_ON(ON,CLASS_NAME,ANCESTOR) \ +COMMAND_HEAD_ANCESTOR(CLASS_NAME,ANCESTOR) \ +COMMAND_METHODS_ANCESTOR_ON(ON,CLASS_NAME,ANCESTOR) \ +COMMAND_TAIL + +#define COMMAND_DATA_ANCESTOR(CLASS_NAME,ANCESTOR,DATA) \ +COMMAND_HEAD_ANCESTOR(CLASS_NAME,ANCESTOR) \ +public: DATA ; \ +COMMAND_METHODS_ANCESTOR(CLASS_NAME,ANCESTOR)\ +COMMAND_TAIL + +#define COMMAND_DATA_ANCESTOR_ON(ON,CLASS_NAME,ANCESTOR,DATA) \ +COMMAND_HEAD_ANCESTOR(CLASS_NAME,ANCESTOR) \ +public: DATA ; \ +COMMAND_METHODS_ANCESTOR_ON(ON,CLASS_NAME,ANCESTOR)\ +COMMAND_TAIL + +#define COMMAND_DO_WORK(CLASS_NAME) \ +int \ +CLASS_NAME::do_work(class cl_cmdline *cmdline, class cl_console_base *con) +#define COMMAND_DO_WORK_APP(CLASS_NAME) \ +int \ +CLASS_NAME::do_work(class cl_app *app,\ + class cl_cmdline *cmdline, class cl_console_base *con) +#define COMMAND_DO_WORK_SIM(CLASS_NAME) \ +int \ +CLASS_NAME::do_work(class cl_sim *sim,\ + class cl_cmdline *cmdline, class cl_console_base *con) +#define COMMAND_DO_WORK_UC(CLASS_NAME) \ +int \ +CLASS_NAME::do_work(class cl_uc *uc,\ + class cl_cmdline *cmdline, class cl_console_base *con) + +// Command set is list of cl_cmd objects +class cl_cmdset: public cl_list +{ +public: + //class cl_sim *sim; + //class cl_cmd *last_command; + +public: + cl_cmdset(void); + //cl_cmdset(class cl_sim *asim); + + virtual class cl_cmd *get_cmd(class cl_cmdline *cmdline, bool accept_last); + virtual class cl_cmd *get_cmd(const char *cmd_name); + virtual void del(char *nam); + virtual void replace(char *nam, class cl_cmd *cmd); +}; + +// subset of commands +class cl_super_cmd: public cl_cmd +{ +public: + class cl_cmdset *commands; + +public: + cl_super_cmd(const char *aname, + int can_rep, + const char *short_hlp, + const char *long_hlp, + class cl_cmdset *acommands); + virtual ~cl_super_cmd(void); + + virtual class cl_cmdset *get_subcommands(void) { return(commands); } + virtual int work(class cl_app *app, + class cl_cmdline *cmdline, class cl_console_base *con); +}; + + +#endif + +/* End of cmd.src/commandcl.h */ diff --git a/sim/ucsim/cmd.src/conf.mk b/sim/ucsim/cmd.src/conf.mk new file mode 100644 index 0000000..9507568 --- /dev/null +++ b/sim/ucsim/cmd.src/conf.mk @@ -0,0 +1,12 @@ +# +# ucsim cmd.src/conf.mk +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_builddir) && $(SHELL) ./config.status + +# End of cmd.src/conf.mk diff --git a/sim/ucsim/cmd.src/flex_lexer.h b/sim/ucsim/cmd.src/flex_lexer.h new file mode 100644 index 0000000..3a1025c --- /dev/null +++ b/sim/ucsim/cmd.src/flex_lexer.h @@ -0,0 +1,204 @@ +// -*-C++-*- +// FlexLexer.h -- define interfaces for lexical analyzer classes generated +// by flex + +// Copyright (c) 1993 The Regents of the University of California. +// All rights reserved. +// +// This code is derived from software contributed to Berkeley by +// Kent Williams and Tom Epperly. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions +// are met: + +// 1. Redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer. +// 2. Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. + +// Neither the name of the University nor the names of its contributors +// may be used to endorse or promote products derived from this software +// without specific prior written permission. + +// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR +// IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED +// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// PURPOSE. + +// This file defines FlexLexer, an abstract class which specifies the +// external interface provided to flex C++ lexer objects, and yyFlexLexer, +// which defines a particular lexer class. +// +// If you want to create multiple lexer classes, you use the -P flag +// to rename each yyFlexLexer to some other xxFlexLexer. You then +// include in your other sources once per lexer class: +// +// #undef yyFlexLexer +// #define yyFlexLexer xxFlexLexer +// #include +// +// #undef yyFlexLexer +// #define yyFlexLexer zzFlexLexer +// #include +// ... + +#ifndef __FLEX_LEXER_H +// Never included before - need to define base class. +#define __FLEX_LEXER_H + +#include +# ifndef FLEX_STD +# define FLEX_STD std:: +# endif + +extern "C++" { + +struct yy_buffer_state; +typedef int yy_state_type; + +class FlexLexer { +public: + virtual ~FlexLexer() { } + + const char* YYText() { return yytext; } + int YYLeng() { return yyleng; } + + virtual void + yy_switch_to_buffer( struct yy_buffer_state* new_buffer ) = 0; + virtual struct yy_buffer_state* + yy_create_buffer( FLEX_STD istream* s, int size ) = 0; + virtual void yy_delete_buffer( struct yy_buffer_state* b ) = 0; + virtual void yyrestart( FLEX_STD istream* s ) = 0; + + virtual int yylex() = 0; + + // Call yylex with new input/output sources. + int yylex( FLEX_STD istream* new_in, FLEX_STD ostream* new_out = 0 ) + { + switch_streams( new_in, new_out ); + return yylex(); + } + + // Switch to new input/output streams. A nil stream pointer + // indicates "keep the current one". + virtual void switch_streams( FLEX_STD istream* new_in = 0, + FLEX_STD ostream* new_out = 0 ) = 0; + + int lineno() const { return yylineno; } + + int debug() const { return yy_flex_debug; } + void set_debug( int flag ) { yy_flex_debug = flag; } + +protected: + char* yytext; + int yyleng; + int yylineno; // only maintained if you use %option yylineno + int yy_flex_debug; // only has effect with -d or "%option debug" +}; + +} +#endif + +#if defined(yyFlexLexer) || ! defined(yyFlexLexerOnce) +// Either this is the first time through (yyFlexLexerOnce not defined), +// or this is a repeated include to define a different flavor of +// yyFlexLexer, as discussed in the flex man page. +#define yyFlexLexerOnce + +extern "C++" { + +class yyFlexLexer : public FlexLexer { +public: + // arg_yyin and arg_yyout default to the cin and cout, but we + // only make that assignment when initializing in yylex(). + yyFlexLexer( FLEX_STD istream* arg_yyin = 0, FLEX_STD ostream* arg_yyout = 0 ); + + virtual ~yyFlexLexer(); + + void yy_switch_to_buffer( struct yy_buffer_state* new_buffer ); + struct yy_buffer_state* yy_create_buffer( FLEX_STD istream* s, int size ); + void yy_delete_buffer( struct yy_buffer_state* b ); + void yyrestart( FLEX_STD istream* s ); + + void yypush_buffer_state( struct yy_buffer_state* new_buffer ); + void yypop_buffer_state(void); + + virtual int yylex(); + virtual void switch_streams( FLEX_STD istream* new_in, FLEX_STD ostream* new_out ); + +protected: + virtual int LexerInput( char* buf, int max_size ); + virtual void LexerOutput( const char* buf, int size ); + virtual void LexerError( const char* msg ); + + void yyunput( int c, char* buf_ptr ); + int yyinput(); + + void yy_load_buffer_state(); + void yy_init_buffer( struct yy_buffer_state* b, FLEX_STD istream* s ); + void yy_flush_buffer( struct yy_buffer_state* b ); + + int yy_start_stack_ptr; + int yy_start_stack_depth; + int* yy_start_stack; + + void yy_push_state( int new_state ); + void yy_pop_state(); + int yy_top_state(); + + yy_state_type yy_get_previous_state(); + yy_state_type yy_try_NUL_trans( yy_state_type current_state ); + int yy_get_next_buffer(); + + FLEX_STD istream* yyin; // input source for default LexerInput + FLEX_STD ostream* yyout; // output sink for default LexerOutput + + // yy_hold_char holds the character lost when yytext is formed. + char yy_hold_char; + + // Number of characters read into yy_ch_buf. + int yy_n_chars; + + // Points to current character in buffer. + char* yy_c_buf_p; + + int yy_init; // whether we need to initialize + int yy_start; // start state number + + // Flag which is used to allow yywrap()'s to do buffer switches + // instead of setting up a fresh yyin. A bit of a hack ... + int yy_did_buffer_switch_on_eof; + + + size_t yy_buffer_stack_top; /**< index of top of stack. */ + size_t yy_buffer_stack_max; /**< capacity of stack. */ + struct yy_buffer_state ** yy_buffer_stack; /**< Stack as an array. */ + void yyensure_buffer_stack(void); + + // The following are not always needed, but may be depending + // on use of certain flex features (like REJECT or yymore()). + + yy_state_type yy_last_accepting_state; + char* yy_last_accepting_cpos; + + yy_state_type* yy_state_buf; + yy_state_type* yy_state_ptr; + + char* yy_full_match; + int* yy_full_state; + int yy_full_lp; + + int yy_lp; + int yy_looking_for_trail_begin; + + int yy_more_flag; + int yy_more_len; + int yy_more_offset; + int yy_prev_more_offset; +}; + +} + +#endif diff --git a/sim/ucsim/cmd.src/get.cc b/sim/ucsim/cmd.src/get.cc new file mode 100644 index 0000000..fe6d4c4 --- /dev/null +++ b/sim/ucsim/cmd.src/get.cc @@ -0,0 +1,130 @@ +/* + * Simulator of microcontrollers (cmd.src/get.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include "i_string.h" + +// prj +#include "utils.h" + +// sim +#include "simcl.h" +#include "optioncl.h" + +// local +#include "cmdsetcl.h" +#include "getcl.h" +#include "cmdutil.h" + + +/* + * Command: get sfr + *---------------------------------------------------------------------------- + */ + +//int +//cl_get_sfr_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_get_sfr_cmd) +{ + class cl_address_space *mem= uc->address_space(MEM_SFR_ID); + class cl_cmd_arg *parm; + int i; + + if (!mem) + { + con->dd_printf("Error: No SFR\n"); + return(DD_FALSE); + } + for (i= 0, parm= cmdline->param(i); + parm; + i++, parm= cmdline->param(i)) + { + if (!parm->as_address(uc) || + !mem->valid_address(parm->value.address)) + con->dd_printf("Warning: Invalid address %s\n", + (char*)cmdline->tokens->at(i+1)); + else + mem->dump(parm->value.address, parm->value.address, 1, con); + } + + return(DD_FALSE);; +} + + +/* + * Command: get option + *---------------------------------------------------------------------------- + */ + +//int +//cl_get_option_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_APP(cl_get_option_cmd) +{ + class cl_cmd_arg *parm= cmdline->param(0); + char *s= 0; + + if (!parm) + ; + else if (cmdline->syntax_match(0/*app->get_uc()*/, STRING)) { + s= parm->value.string.string; + } + else + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax\n"); + + int i; + for (i= 0; i < app->options->count; i++) + { + class cl_option *o= (class cl_option *)(/*uc*/app->options->at(i)); + if ((!s || + !strcmp(s, o->get_name()))) + { + if (!o->hidden) + { + con->dd_printf("%2d. %s(by %s): ", i, object_name(o), + object_name(o->get_creator())); + o->print(con); + con->dd_printf(" - %s\n", o->help); + } + else + { + /* + con->dd_printf("%2d. %s(by %s) is hidden!\n", i, object_name(o), + object_name(o->get_creator())); + */ + } + } + } + + return(DD_FALSE);; +} + + +/* End of cmd.src/get.cc */ diff --git a/sim/ucsim/cmd.src/getcl.h b/sim/ucsim/cmd.src/getcl.h new file mode 100644 index 0000000..a65de00 --- /dev/null +++ b/sim/ucsim/cmd.src/getcl.h @@ -0,0 +1,66 @@ +/* + * Simulator of microcontrollers (cmd.src/getcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_GETCL_HEADER +#define CMD_GETCL_HEADER + +#include "newcmdcl.h" + + +// GET SFR +/*class cl_get_sfr_cmd: public cl_cmd +{ +public: + cl_get_sfr_cmd(//class cl_sim *asim, + char *aname, + int can_rep, + char *short_hlp, + char *long_hlp): + cl_cmd(aname, can_rep, short_hlp, long_hlp) {} + virtual int do_work(class cl_sim *sim, + class cl_cmdline *cmdline, class cl_console_base *con); +};*/ +COMMAND_ON(uc,cl_get_sfr_cmd); + +// GET OPTION +/*class cl_get_option_cmd: public cl_cmd +{ +public: + cl_get_option_cmd(//class cl_sim *asim, + char *aname, + int can_rep, + char *short_hlp, + char *long_hlp): + cl_cmd(aname, can_rep, short_hlp, long_hlp) {} + virtual int do_work(class cl_sim *sim, + class cl_cmdline *cmdline, class cl_console_base *con); +};*/ +COMMAND_ON(app,cl_get_option_cmd); + +#endif + +/* End of cmd.src/getcl.h */ diff --git a/sim/ucsim/cmd.src/info.cc b/sim/ucsim/cmd.src/info.cc new file mode 100644 index 0000000..fbdc1f9 --- /dev/null +++ b/sim/ucsim/cmd.src/info.cc @@ -0,0 +1,209 @@ +/* + * Simulator of microcontrollers (cmd.src/info.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include +#include "i_string.h" + +// sim.src +#include "simcl.h" + +// local +#include "infocl.h" + + +/* + * INFO BREAKPOINTS command + */ + +//int +//cl_info_bp_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_info_bp_cmd) +{ + int i; + + con->dd_printf("Num Type Disp Hit Cnt Address What\n"); + for (i= 0; i < uc->fbrk->count; i++) + { + class cl_brk *fb= (class cl_brk *)(uc->fbrk->at(i)); + const char *s= uc->disass(fb->addr, NULL); + con->dd_printf("%-3d %-10s %s %-5d %-5d 0x%06x %s\n", fb->nr, + "fetch", (fb->perm==brkFIX)?"keep":"del ", + fb->hit, fb->cnt, + fb->addr, s); + free((char *)s); + } + for (i= 0; i < uc->ebrk->count; i++) + { + class cl_ev_brk *eb= (class cl_ev_brk *)(uc->ebrk->at(i)); + con->dd_printf("%-3d %-10s %s %-5d %-5d 0x%06x %s\n", eb->nr, + "event", (eb->perm==brkFIX)?"keep":"del ", + eb->hit, eb->cnt, + eb->addr, eb->id); + } + /*t_addr a; + class cl_rom *r= (class cl_rom *)(sim->uc->mem(MEM_ROM)); + for (a= 0; a < sim->uc->get_mem_size(MEM_ROM); a++) + { + if (r->bp_map->get(a)) + con->dd_printf("0x%06x\n", a); + }*/ + return(0); +} + + +/* + * INFO REGISTERS command + */ + +//int +//cl_info_reg_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_info_reg_cmd) +{ + uc->print_regs(con); + return(0); +} + + +/* + * INFO HW command + */ + +//int +//cl_info_hw_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_info_hw_cmd) +{ + class cl_hw *hw; + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + + if (cmdline->syntax_match(uc, HW)) { + hw= params[0]->value.hw; + hw->print_info(con); + } + else + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax\n"); + + return(DD_FALSE); +} + + +/* + * INFO STACK command + */ + +//int +//cl_info_stack_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_info_stack_cmd) +{ + int i; + + cl_stack_op::info_head(con); + for (i= uc->stack_ops->count-1; i >= 0; i--) + { + class cl_stack_op *so= (class cl_stack_op *)(uc->stack_ops->at(i)); + so->info(con, uc); + } + return(DD_FALSE); +} + + +/* + * INFO MMEORY command + *---------------------------------------------------------------------------- + */ + +COMMAND_DO_WORK_UC(cl_info_memory_cmd) +{ + int i; + + con->dd_printf("Memory chips:\n"); + for (i= 0; i < uc->memchips->count; i++) + { + class cl_memory_chip *m= (class cl_memory_chip *)(uc->memchips->at(i)); + if (m) + con->dd_printf(" 0x%06x-0x%06x %8d %s (%d,%s,%s)\n", + m->get_start_address(), + m->highest_valid_address(), + m->get_size(), + m->get_name(), + m->width, m->data_format, m->addr_format); + } + con->dd_printf("Address spaces:\n"); + for (i= 0; i < uc->address_spaces->count; i++) + { + class cl_address_space *m= + (class cl_address_space *)(uc->address_spaces->at(i)); + if (m) + con->dd_printf(" 0x%06x-0x%06x %8d %s (%d,%s,%s)\n", + m->get_start_address(), + m->highest_valid_address(), + m->get_size(), + m->get_name(), + m->width, m->data_format, m->addr_format); + } + con->dd_printf("Address decoders:\n"); + for (i= 0; i < uc->address_spaces->count; i++) + { + class cl_address_space *m= + (class cl_address_space *)(uc->address_spaces->at(i)); + int j; + for (j= 0; j < m->decoders->count; j++) + { + class cl_address_decoder *d= + (class cl_address_decoder *)(m->decoders->at(j)); + con->dd_printf("%2d ", j); + if (d->address_space) + { + con->dd_printf("%s ", d->address_space->get_name("unknown")); + con->dd_printf(d->address_space->addr_format, d->as_begin); + con->dd_printf(" "); + con->dd_printf(d->address_space->addr_format, d->as_end); + } + else + con->dd_printf("x"); + con->dd_printf(" -> "); + if (d->memchip) + { + con->dd_printf("%s ", d->memchip->get_name("unknown")); + con->dd_printf(d->memchip->addr_format, d->chip_begin); + } + else + con->dd_printf("x"); + con->dd_printf(" %s\n", (d->activated)?"activated":"inactive"); + } + } + return(0); +} + + +/* End of cmd.src/info.cc */ diff --git a/sim/ucsim/cmd.src/infocl.h b/sim/ucsim/cmd.src/infocl.h new file mode 100644 index 0000000..870d96a --- /dev/null +++ b/sim/ucsim/cmd.src/infocl.h @@ -0,0 +1,52 @@ +/* + * Simulator of microcontrollers (cmd.src/infocl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_INFOCL_HEADER +#define CMD_INFOCL_HEADER + +#include "newcmdcl.h" + + +// INFO BP +COMMAND_ON(uc,cl_info_bp_cmd); + +// INFO REG +COMMAND_ON(uc,cl_info_reg_cmd); + +// INFO HW +COMMAND_ON(uc,cl_info_hw_cmd); + +// INFO STACK +COMMAND_ON(uc,cl_info_stack_cmd); + +// INFO MEMORY +COMMAND_ON(uc,cl_info_memory_cmd); + + +#endif + +/* End of cmd.src/infocl.h */ diff --git a/sim/ucsim/cmd.src/newcmd.cc b/sim/ucsim/cmd.src/newcmd.cc new file mode 100644 index 0000000..3355443 --- /dev/null +++ b/sim/ucsim/cmd.src/newcmd.cc @@ -0,0 +1,572 @@ +/* + * Simulator of microcontrollers (cmd.src/newcmd.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * Copyright (C) 2006, Borut Razem - borut.razem@siol.net + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include +#include +#include +#include +#include "i_string.h" + +#include "cmdlexcl.h" +#include "cmdpars.h" + +// prj +#include "globals.h" +#include "utils.h" + +// sim +#include "simcl.h" +#include "argcl.h" +#include "appcl.h" + +// local +#include "newcmdcl.h" +#include "cmdutil.h" + + +/* + * Options of console + */ + +cl_prompt_option::cl_prompt_option(class cl_console_base *console): + cl_optref(console) +{ + con= console; +} + +int +cl_prompt_option::init(void) +{ + char *help; + help= format_string("Prompt string of console%d", con->get_id()); + create(con, string_opt, "prompt", help); + //fprintf(stderr," **new prompt option %p\"%s\", value=%p str=%p\n",option,object_name(option),option->get_value(),option->get_value()->sval); + free(help); + default_option("prompt"); + //fprintf(stderr,"opt=%p\"%s\" value after default set=%p str=%p\n",option,object_name(option),option->get_value(),option->get_value()->sval); + return(0); +} + +void +cl_prompt_option::option_changed(void) +{ + if (!con) + return; + char *s; + option->get_value(&s); + con->set_prompt(s); +} + + +cl_debug_option::cl_debug_option(class cl_console_base *console): + cl_prompt_option(console) +{} + +int +cl_debug_option::init(void) +{ + char *help; + help= format_string("Debug messages to console%d", con->get_id()); + create(con, bool_opt, "debug", help); + free(help); + default_option("debug"); + return(0); +} + +void +cl_debug_option::option_changed(void) +{ + if (!con) + return; + bool b; + option->get_value(&b); + if (b) + con->flags|= CONS_DEBUG; + else + con->flags&= ~CONS_DEBUG; +} + + +/* + * Command console + *____________________________________________________________________________ + */ + +int +cl_console_base::init(void) +{ + cl_base::init(); + prompt_option= new cl_prompt_option(this); + prompt_option->init(); + null_prompt_option= new cl_optref(this); + null_prompt_option->init(); + null_prompt_option->use("null_prompt"); + debug_option= new cl_debug_option(this); + debug_option->init(); + welcome(); + flags&= ~CONS_PROMPT; + //print_prompt(); + last_command= 0; + last_cmdline= 0; + return(0); +} + +void +cl_console_base::welcome(void) +{ + if (!(flags & CONS_NOWELCOME)) + { + dd_printf("uCsim %s, Copyright (C) 1997 Daniel Drotos, Talker Bt.\n" + "uCsim comes with ABSOLUTELY NO WARRANTY; for details type " + "`show w'.\n" + "This is free software, and you are welcome to redistribute it\n" + "under certain conditions; type `show c' for details.\n", + VERSIONSTR); + } +} + +void +cl_console_base::print_prompt(void) +{ + if (flags & (CONS_PROMPT | CONS_FROZEN | CONS_INACTIVE)) + return; + + flags |= CONS_PROMPT; + if (/*app->args->arg_avail('P')*/null_prompt_option->get_value(bool(0))) + { + dd_printf("%c", 0); + } + else + { + dd_printf("%d%s", id, (prompt && prompt[0]) ? prompt : "> "); + // ((p= app->args->get_sarg(0, "prompt"))?p:"> ")); + } +} + +int +cl_console_base::dd_printf(const char *format, ...) +{ + va_list ap; + int ret= 0; + + va_start(ap, format); + ret= cmd_do_print(format, ap); + va_end(ap); + + return(ret); +} + +int +cl_console_base::debug(const char *format, ...) +{ + if ((flags & CONS_DEBUG) == 0) + return(0); + + va_list ap; + int ret= 0; + + va_start(ap, format); + ret= cmd_do_print(format, ap); + va_end(ap); + + return(ret); +} + +/* + * Printing out an integer in binary format + */ + +void +cl_console_base::print_bin(long data, int bits) +{ + long mask= 1; + + mask= mask << ((bits >= 1)?(bits-1):0); + while (bits--) + { + dd_printf("%c", (data&mask)?'1':'0'); + mask>>= 1; + } +} + +void +cl_console_base::print_char_octal(char c) +{ + if (strchr("\a\b\f\n\r\t\v\"", c)) + switch (c) + { + case '\a': dd_printf("\a"); break; + case '\b': dd_printf("\b"); break; + case '\f': dd_printf("\f"); break; + case '\n': dd_printf("\n"); break; + case '\r': dd_printf("\r"); break; + case '\t': dd_printf("\t"); break; + case '\v': dd_printf("\v"); break; + case '\"': dd_printf("\""); break; + } + else if (isprint(c)) + dd_printf("%c", c); + else + dd_printf("\\%03hho", c); +} + +int +cl_console_base::interpret(char *cmd) +{ + dd_printf("Unknown command\n"); + return(0); +} + +void +cl_console_base::set_id(int new_id) +{ + char *s; + + id= new_id; + set_name(s= format_string("console%d", id)); + free(s); +} + +void +cl_console_base::set_prompt(char *p) +{ + if (prompt) + free(prompt); + if (p && *p) + prompt= strdup(p); + else + prompt= 0; +} + +bool +cl_console_base::input_active(void) const +{ + if (((flags & CONS_FROZEN) == 0 || + (flags & CONS_INTERACTIVE) != 0) && + (flags & CONS_INACTIVE) == 0) + { + return true; + } + else + return false; +} + +int +cl_console_base::proc_input(class cl_cmdset *cmdset) +{ + int retval = 0; + + un_redirect(); + if (is_eof()) + { + dd_printf("End\n"); + return 1; + } + char *cmdstr = read_line(); + if (!cmdstr) + return 1; + if (flags & CONS_FROZEN) + { + app->get_sim()->stop(resUSER); + flags&= ~CONS_FROZEN; + retval = 0; + } + else + { + if (cmdstr && *cmdstr == '\004') + retval = 1; + else + { + class cl_cmdline *cmdline= 0; + class cl_cmd *cm = 0; + if (flags & CONS_ECHO) + dd_printf("%s\n", cmdstr); + cmdline= new cl_cmdline(app, cmdstr, this); + cmdline->init(); + if (cmdline->repeat() && + accept_last() && + last_command) + { + cm = last_command; + delete cmdline; + cmdline = last_cmdline; + } + else + { + cm= cmdset->get_cmd(cmdline, accept_last()); + if (last_cmdline) + { + delete last_cmdline; + last_cmdline = 0; + } + last_command = 0; + } + if (cm) + { + retval= cm->work(app, cmdline, this); + if (cm->can_repeat) + { + last_command = cm; + last_cmdline = cmdline; + } + else + delete cmdline; + } + else + { + class YY_cl_ucsim_parser_CLASS *pars; + class cl_ucsim_lexer *lexer; + lexer = new cl_ucsim_lexer(cmdstr); + pars = new YY_cl_ucsim_parser_CLASS(lexer); + pars->yyparse(); + delete cmdline; + delete pars; + } + /*if (!cm) + retval= interpret(cmdstr);*/ + } + } + //retval= sim->do_cmd(cmd, this); + un_redirect(); + /*if (!retval) + print_prompt();*/ + free(cmdstr); + return(retval); +} + + +/* + * Command interpreter + *____________________________________________________________________________ + */ + +cl_commander_base::cl_commander_base(class cl_app *the_app, class cl_cmdset *acmdset): + cl_base() +{ + app= the_app; + cons= new cl_list(1, 1, "consoles"); + actual_console= frozen_console= 0; + cmdset= acmdset; +} + +cl_commander_base::~cl_commander_base(void) +{ + delete cons; + delete cmdset; +} + +void +cl_commander_base::add_console(class cl_console_base *console) +{ + if (!console) + return; + int i=cons->add(console); + console->set_id(i); + console->init(); + set_fd_set(); +} + +void +cl_commander_base::del_console(class cl_console_base *console) +{ + cons->disconn(console); + set_fd_set(); +} + +void +cl_commander_base::activate_console(class cl_console_base *console) +{ + console->flags&= ~CONS_INACTIVE; + //console->print_prompt(); + set_fd_set(); +} + +void +cl_commander_base::deactivate_console(class cl_console_base *console) +{ + console->flags|= CONS_INACTIVE; + set_fd_set(); +} + +/* + * Printing to all consoles + */ + +int +cl_commander_base::all_printf(const char *format, ...) +{ + va_list ap; + int i, ret= 0; + + for (i= 0; i < cons->count; i++) + { + class cl_console_base *c= (class cl_console_base*)(cons->at(i)); + + va_start(ap, format); + ret= c->cmd_do_print(format, ap); + va_end(ap); + } + return(ret); +} + +void +cl_commander_base::prompt(void) +{ + int i; + + for (i= 0; i < cons->count; i++) + { + class cl_console_base *c= (class cl_console_base*)(cons->at(i)); + c->print_prompt(); + } +} + +/* + * Printing to actual_console + */ + +int +cl_commander_base::dd_printf(const char *format, va_list ap) +{ + int ret= 0; + class cl_console_base *con; + + if (actual_console) + { + con= actual_console; + } + else if (frozen_console) + { + con= frozen_console; + } + else + { + con= 0; + } + if (con) + { + ret= con->cmd_do_print(format, ap); + } + return(ret); +} + +int +cl_commander_base::dd_printf(const char *format, ...) +{ + va_list ap; + int ret= 0; + + va_start(ap, format); + ret= dd_printf(format, ap); + va_end(ap); + + return(ret); +} + +/* + * Printing to consoles which have CONS_DEBUG flag set + */ + +int +cl_commander_base::debug(const char *format, ...) +{ + va_list ap; + int i, ret= 0; + + for (i= 0; i < cons->count; i++) + { + class cl_console_base *c= (class cl_console_base*)(cons->at(i)); + if (c->flags & CONS_DEBUG) + { + va_start(ap, format); + ret= c->cmd_do_print(format, ap); + va_end(ap); + } + } + return(ret); +} + +int +cl_commander_base::debug(const char *format, va_list ap) +{ + int i, ret= 0; + + for (i= 0; i < cons->count; i++) + { + class cl_console_base *c= (class cl_console_base*)(cons->at(i)); + if (c->flags & CONS_DEBUG) + { + ret= c->cmd_do_print(format, ap); + } + } + return(ret); +} + +int +cl_commander_base::flag_printf(int iflags, const char *format, ...) +{ + va_list ap; + int i, ret= 0; + + for (i= 0; i < cons->count; i++) + { + class cl_console_base *c= (class cl_console_base*)(cons->at(i)); + if ((c->flags & iflags) == iflags) + { + va_start(ap, format); + ret= c->cmd_do_print(format, ap); + va_end(ap); + } + } + return(ret); +} + +int +cl_commander_base::input_avail_on_frozen(void) +{ + if (!frozen_console || frozen_console->is_tty()) + return(0); + return(frozen_console->input_avail()); +} + +void +cl_commander_base::exec_on(class cl_console_base *cons, char *file_name) +{ + if (!cons || !file_name || !fopen(file_name, "r")) + return; + + class cl_console_base *subcon = cons->clone_for_exec(file_name); + subcon->flags |= CONS_NOWELCOME; + add_console(subcon); +} + + +/* End of cmd.src/newcmd.cc */ diff --git a/sim/ucsim/cmd.src/newcmdcl.h b/sim/ucsim/cmd.src/newcmdcl.h new file mode 100644 index 0000000..6bff5b1 --- /dev/null +++ b/sim/ucsim/cmd.src/newcmdcl.h @@ -0,0 +1,190 @@ +/* + * Simulator of microcontrollers (cmd.src/newcmdcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * Copyright (C) 2006, Borut Razem - borut.razem@siol.net + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_NEWCMDCL_HEADER +#define CMD_NEWCMDCL_HEADER + + +#include "ddconfig.h" + +#include +#include +#include + +// prj +#include "pobjcl.h" + +// sim.src +#include "appcl.h" + +// local, cmd +#include "commandcl.h" + + +// Flags of consoles +#define CONS_NONE 0 +#define CONS_DEBUG 0x01 // Print debug messages on this console +#define CONS_FROZEN 0x02 // Console is frozen (g command issued) +#define CONS_PROMPT 0x04 // Prompt is out, waiting for input +#define CONS_INTERACTIVE 0x08 // Interactive console +#define CONS_NOWELCOME 0x10 // Do not print welcome message +#define CONS_INACTIVE 0x20 // Do not do any action +#define CONS_ECHO 0x40 // Echo commands + +#define SY_ADDR 'a' +#define ADDRESS "a" +#define SY_NUMBER 'n' +#define NUMBER "n" +#define SY_DATA 'd' +#define DATA "d" +#define SY_STRING 's' +#define STRING "s" +#define SY_MEMORY 'm' +#define MEMORY "m" +#define SY_HW 'h' +#define HW "h" +#define SY_DATALIST 'D' +#define DATALIST "D" +#define SY_BIT 'b' +#define BIT "b" + + +class cl_prompt_option: public cl_optref +{ +protected: + class cl_console_base *con; +public: + cl_prompt_option(class cl_console_base *console); + virtual int init(void); + virtual void option_changed(void); +}; + +class cl_debug_option: public cl_prompt_option +{ +public: + cl_debug_option(class cl_console_base *console); + virtual int init(void); + virtual void option_changed(void); +}; + +/* + * Command console + */ + +class cl_console_base: public cl_base +{ +protected: + class cl_prompt_option *prompt_option; + class cl_optref *null_prompt_option; + class cl_debug_option *debug_option; + class cl_ustrings *lines_printed; + class cl_cmd *last_command; + class cl_cmdline *last_cmdline; + +public: + cl_console_base(void): cl_base() { app = 0; flags = 0; prompt = 0; } + + virtual class cl_console_base *clone_for_exec(char *fin) = 0; + + virtual void redirect(char *fname, char *mode) = 0; + virtual void un_redirect(void) = 0; + virtual int cmd_do_print(const char *format, va_list ap) = 0; + virtual bool is_tty(void) const = 0; + virtual bool is_eof(void) const = 0; + virtual int input_avail(void) = 0; + virtual char *read_line(void) = 0; + + virtual int init(void); + virtual void welcome(void); + virtual int proc_input(class cl_cmdset *cmdset); + + void print_prompt(void); + int dd_printf(const char *format, ...); + int debug(const char *format, ...); + void print_bin(long data, int bits); + void print_char_octal(char c); + + bool interpret(char *cmd); + int get_id(void) const { return(id); } + void set_id(int new_id); + void set_prompt(char *p); + + bool input_active(void) const; + bool accept_last(void) { return is_tty() ? DD_TRUE : DD_FALSE; } + +public: + int flags; // See CONS_XXXX + +protected: + class cl_app *app; + char *prompt; + int id; +}; + +/* + * Command interpreter + */ + +class cl_commander_base: public cl_base +{ +public: + class cl_app *app; + class cl_list *cons; + class cl_console_base *actual_console, *frozen_console; + class cl_cmdset *cmdset; + +public: + cl_commander_base(class cl_app *the_app, class cl_cmdset *acmdset); + virtual ~cl_commander_base(void); + + void add_console(class cl_console_base *console); + void del_console(class cl_console_base *console); + void activate_console(class cl_console_base *console); + void deactivate_console(class cl_console_base *console); + + void prompt(void); + int all_printf(const char *format, ...); // print to all consoles + int dd_printf(const char *format, va_list ap); // print to actual_console + int dd_printf(const char *format, ...); // print to actual_console + int debug(const char *format, ...); // print consoles with debug flag set + int debug(const char *format, va_list ap); // print consoles with debug flag set + int flag_printf(int iflags, const char *format, ...); + int input_avail_on_frozen(void); + void exec_on(class cl_console_base *cons, char *file_name); + + virtual int init(void) = 0; + virtual void set_fd_set(void) = 0; + virtual int proc_input(void) = 0; + virtual int input_avail(void) = 0; + virtual int wait_input(void) = 0; +}; + + +#endif + +/* End of cmd.src/newcmdcl.h */ diff --git a/sim/ucsim/cmd.src/newcmdposix.cc b/sim/ucsim/cmd.src/newcmdposix.cc new file mode 100644 index 0000000..f74d6e3 --- /dev/null +++ b/sim/ucsim/cmd.src/newcmdposix.cc @@ -0,0 +1,466 @@ +/* + * Simulator of microcontrollers (cmd.src/newcmdposix.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * Copyright (C) 2006, Borut Razem - borut.razem@siol.net + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include +#include +#include +#include +#include +#include +#ifdef SOCKET_AVAIL +# include HEADER_SOCKET +# if defined HAVE_SYS_SOCKET_H +# include +# include +# include +# endif +#endif +#if FD_HEADER_OK +# include HEADER_FD +#endif +#ifdef HAVE_UNISTD_H +# include +#endif +#include "i_string.h" + +#include "cmdlexcl.h" +#include "cmdpars.h" + +// prj +#include "globals.h" +#include "utils.h" + +// sim +#include "simcl.h" +#include "argcl.h" +#include "appcl.h" + +// local +#include "newcmdposixcl.h" + + +/* + * Command console + *____________________________________________________________________________ + */ + +cl_console::cl_console(const char *fin, const char *fout, class cl_app *the_app) +{ + FILE *f; + + app= the_app; + in= 0; + if (fin) + if (f= fopen(fin, "r"), in= f, !f) + fprintf(stderr, "Can't open `%s': %s\n", fin, strerror(errno)); + out= 0; + if (fout) + if (f= fopen(fout, "w"), out= f, !f) + fprintf(stderr, "Can't open `%s': %s\n", fout, strerror(errno)); + prompt= 0; + flags= CONS_NONE; + if (is_tty()) + flags|= CONS_INTERACTIVE; + else + ;//fprintf(stderr, "Warning: non-interactive console\n"); + rout= 0; + id= 0; + lines_printed= new cl_ustrings(100, 100, "console_cache"); +} + +cl_console::cl_console(FILE *fin, FILE *fout, class cl_app *the_app) +{ + app= the_app; + in = fin; + out= fout; + prompt= 0; + flags= CONS_NONE; + if (is_tty()) + flags|= CONS_INTERACTIVE; + else + ;//fprintf(stderr, "Warning: non-interactive console\n"); + rout= 0; + id= 0; + lines_printed= new cl_ustrings(100, 100, "console_cache"); +} + +class cl_console * +cl_console::clone_for_exec(char *fin) +{ + FILE *fi= 0, *fo= 0; + + if (!fin) + return(0); + if (fi= fopen(fin, "r"), !fi) + { + fprintf(stderr, "Can't open `%s': %s\n", fin, strerror(errno)); + return(0); + } + if ((fo= fdopen(dup(fileno(out)), "a")) == 0) + { + fclose(fi); + fprintf(stderr, "Can't re-open output file: %s\n", strerror(errno)); + return(0); + } + class cl_console *con= new cl_sub_console(this, fi, fo, app); + return(con); +} + +cl_console::~cl_console(void) +{ + if (in) + fclose(in); + un_redirect(); + if (out) + { + if (flags & CONS_PROMPT) + fprintf(out, "\n"); + fflush(out); + fclose(out); + } + delete prompt_option; + delete null_prompt_option; + delete debug_option; +#ifdef SOCKET_AVAIL + /* if (sock) + { + shutdown(sock, 2); + close(sock); + }*/ +#endif +} + + +/* + * Output functions + */ + +void +cl_console::redirect(char *fname, char *mode) +{ + if ((rout= fopen(fname, mode)) == NULL) + dd_printf("Unable to open file '%s' for %s: %s\n", + fname, (mode[0]=='w')?"write":"append", strerror(errno)); +} + +void +cl_console::un_redirect(void) +{ + if (!rout) + return; + fclose(rout); + rout = NULL; +} + +int +cl_console::cmd_do_print(const char *format, va_list ap) +{ + int ret; + FILE *f = get_out(); + + if (f) + { + ret= vfprintf(f, format, ap); + fflush(f); + } + else + ret = 0; + + return ret; +} + +/* + * Input functions + */ + +char * +cl_console::read_line(void) +{ + char *s= NULL; + +#ifdef HAVE_GETLINE + if (getline(&s, 0, in) < 0) + return(0); +#elif defined HAVE_GETDELIM + size_t n= 30; + s= (char *)malloc(n); + if (getdelim(&s, &n, '\n', in) < 0) + { + free(s); + return(0); + } +#elif defined HAVE_FGETS + s= (char *)malloc(300); + if (fgets(s, 300, in) == NULL) + { + free(s); + return(0); + } +#endif + s[strlen(s)-1]= '\0'; + if (s[strlen(s)-1] == '\r') + s[strlen(s)-1]= '\0'; + flags&= ~CONS_PROMPT; + return(s); +} + + +/* + * This console listen on a socket and can accept connection requests + */ +#ifdef SOCKET_AVAIL + +cl_listen_console::cl_listen_console(int serverport, class cl_app *the_app) +{ + app= the_app; + if ((sock= make_server_socket(serverport)) >= 0) + { + if (listen(sock, 10) < 0) + fprintf(stderr, "Listen on port %d: %s\n", + serverport, strerror(errno)); + } + in= out= rout= 0; +} + +int +cl_listen_console::proc_input(class cl_cmdset *cmdset) +{ + int newsock; + ACCEPT_SOCKLEN_T size; + struct sockaddr_in sock_addr; + class cl_commander_base *cmd; + FILE *in, *out; + + cmd= app->get_commander(); + size= sizeof(struct sockaddr); + newsock= accept(sock, (struct sockaddr*)&sock_addr, &size); + if (newsock < 0) + { + perror("accept"); + return(0); + } + if (!(in= fdopen(newsock, "r"))) + fprintf(stderr, "cannot open port for input\n"); + if (!(out= fdopen(newsock, "w"))) + fprintf(stderr, "cannot open port for output\n"); + class cl_console_base *c= new cl_console(in, out, app); + c->flags|= CONS_INTERACTIVE; + cmd->add_console(c); + return(0); +} + +#endif /* SOCKET_AVAIL */ + + +/* + * Sub-console + */ + +cl_sub_console::cl_sub_console(class cl_console_base *the_parent, + FILE *fin, FILE *fout, class cl_app *the_app): + cl_console(fin, fout, the_app) +{ + parent= the_parent; +} + +cl_sub_console::~cl_sub_console(void) +{ + class cl_commander_base *c= app->get_commander(); + + if (parent && c) + { + c->activate_console(parent); + } +} + +int +cl_sub_console::init(void) +{ + class cl_commander_base *c= app->get_commander(); + + if (parent && c) + { + c->deactivate_console(parent); + } + cl_console::init(); + flags|= CONS_ECHO; + return(0); +} + + +/* + * Command interpreter + *____________________________________________________________________________ + */ + +int +cl_commander::init(void) +{ + class cl_optref console_on_option(this); + class cl_optref config_file_option(this); + class cl_optref port_number_option(this); + class cl_console_base *con; + + console_on_option.init(); + console_on_option.use("console_on"); + config_file_option.init(); + config_file_option.use("config_file"); + port_number_option.init(); + + cl_base::init(); + set_name("Commander"); + + bool need_config= DD_TRUE; + +#ifdef SOCKET_AVAIL + if (port_number_option.use("port_number")) + add_console(new cl_listen_console(port_number_option.get_value((long)0), app)); +#endif + + /* The following code is commented out because it produces gcc warnings + * newcmd.cc: In member function `virtual int cl_commander::init()': + * newcmd.cc:785: warning: 'Config' might be used uninitialized in this function + * newcmd.cc:786: warning: 'cn' might be used uninitialized in this function + */ + /* + char *Config= config_file_option.get_value(Config); + char *cn= console_on_option.get_value(cn); + */ + /* Here shoud probably be something else, but is still better then the former code... */ + char *Config= config_file_option.get_value(""); + char *cn= console_on_option.get_value(""); + + if (cn) + { + add_console(con= new cl_console(cn, cn, app)); + exec_on(con, Config); + need_config= DD_FALSE; + } + if (cons->get_count() == 0) + { + add_console(con= new cl_console(stdin, stdout, app)); + exec_on(con, Config); + need_config= DD_FALSE; + } + if (need_config && + Config && + *Config) + { + FILE *fc= fopen(Config, "r"); + if (!fc) + fprintf(stderr, "Can't open `%s': %s\n", Config, strerror(errno)); + else + { + con= new cl_console(fc, stderr, app); + con->flags|= CONS_NOWELCOME|CONS_ECHO; + add_console(con); + } + } + return(0); +} + +void +cl_commander::set_fd_set(void) +{ + int i; + + FD_ZERO(&read_set); + fd_num = 0; + for (i = 0; i < cons->count; i++) + { + class cl_console *c= dynamic_cast((class cl_console_base*)(cons->at(i))); + + if (c->input_active()) + { + UCSOCKET_T fd = c->get_in_fd(); + assert(0 <= fd); + + FD_SET(fd, &read_set); + if (fd > fd_num) + fd_num = fd; + } + } + fd_num++; +} + +int +cl_commander::input_avail(void) +{ + struct timeval tv = {0, 0}; + active_set = read_set; + + int i = select(fd_num, &active_set, NULL, NULL, &tv); + if (i < 0) + perror("select"); + + return i; +} + +int +cl_commander::wait_input(void) +{ + prompt(); + active_set = read_set; + int i = select(fd_num, &active_set, NULL, NULL, NULL); + return i; +} + +int +cl_commander::proc_input(void) +{ + for (int j = 0; j < cons->count; j++) + { + class cl_console *c = dynamic_cast((class cl_console_base*)(cons->at(j))); + + if (c->input_active()) + { + UCSOCKET_T fd = c->get_in_fd(); + assert(0 <= fd); + + if (FD_ISSET(fd, &active_set)) + { + actual_console = c; + int retval = c->proc_input(cmdset); + if (retval) + { + del_console(c); + delete c; + } + actual_console = 0; + return(0 == cons->count); + } + } + } + return 0; +} + + +/* End of cmd.src/newcmdposix.cc */ diff --git a/sim/ucsim/cmd.src/newcmdposixcl.h b/sim/ucsim/cmd.src/newcmdposixcl.h new file mode 100644 index 0000000..5050d2f --- /dev/null +++ b/sim/ucsim/cmd.src/newcmdposixcl.h @@ -0,0 +1,121 @@ +/* + * Simulator of microcontrollers (cmd.src/newcmdposixcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * Copyright (C) 2006, Borut Razem - borut.razem@siol.net + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_NEWCMDFDCL_HEADER +#define CMD_NEWCMDFDCL_HEADER + +#include "newcmdcl.h" +#include "cmdutil.h" + + +/* + * Command fd console + */ + +class cl_console: public cl_console_base +{ +protected: + FILE *in, *out, *rout/*redirected output*/; + +public: + cl_console(void) { in = out = rout = 0; } + cl_console(const char *fin, const char *fout, class cl_app *the_app); + cl_console(FILE *fin, FILE *fout, class cl_app *the_app); + int cmd_do_print(const char *format, va_list ap); + + virtual ~cl_console(void); + virtual class cl_console *clone_for_exec(char *fin); + + virtual void redirect(char *fname, char *mode); + virtual void un_redirect(void); + virtual UCSOCKET_T get_in_fd(void) { return(in ? fileno(in) : -1); } + virtual bool is_tty(void) const { return in && isatty(fileno(in)); } + virtual bool is_eof(void) const { return in ? feof(in) : true; } + virtual bool input_avail(void) { return input_active() ? ::input_avail(fileno(in)) : false; }; + virtual char *read_line(void); + +private: + FILE *get_out(void) { return rout ? rout : out; } +}; + +#ifdef SOCKET_AVAIL +class cl_listen_console: public cl_console +{ +private: + int sock; + +public: + cl_listen_console(int serverport, class cl_app *the_app); + + virtual void welcome(void) {} + + virtual UCSOCKET_T get_in_fd(void) { return(sock); } + virtual int proc_input(class cl_cmdset *cmdset); +}; +#endif + + +class cl_sub_console: public cl_console +{ +private: + class cl_console_base *parent; + +public: + cl_sub_console(class cl_console_base *the_parent, + FILE *fin, FILE *fout, class cl_app *the_app); + virtual ~cl_sub_console(void); + virtual int init(void); +}; + + +/* + * Command interpreter + */ + +class cl_commander: public cl_commander_base +{ +private: + fd_set read_set, active_set; + UCSOCKET_T fd_num; + +public: + cl_commander(class cl_app *the_app, class cl_cmdset *acmdset) + : cl_commander_base(the_app, acmdset) + { + } + + virtual int init(void); + virtual void set_fd_set(void); + virtual int input_avail(void); + virtual int wait_input(void); + virtual int proc_input(void); +}; + +#endif + +/* End of cmd.src/newcmdposixcl.h */ diff --git a/sim/ucsim/cmd.src/newcmdwin32.cc b/sim/ucsim/cmd.src/newcmdwin32.cc new file mode 100644 index 0000000..a4973aa --- /dev/null +++ b/sim/ucsim/cmd.src/newcmdwin32.cc @@ -0,0 +1,636 @@ +/* + * Simulator of microcontrollers (cmd.src/newcmdwin32.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * Copyright (C) 2006, Borut Razem - borut.razem@siol.net + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "i_string.h" + +#include "cmdlexcl.h" +#include "cmdpars.h" + +// prj +#include "globals.h" +#include "utils.h" + +// sim +#include "simcl.h" +#include "argcl.h" +#include "appcl.h" + +// local +#include "newcmdwin32cl.h" + + +/* + * Channel + *____________________________________________________________________________ + */ + +inline void +cl_channel::set(void) +{ + fp = 0; + handle = INVALID_HANDLE_VALUE; + type = CH_UNDEF; +} + +inline void +cl_channel::set(HANDLE _handle, e_handle_type _type) +{ + assert(INVALID_HANDLE_VALUE != _handle); + + fp = 0; + handle = _handle; + type = (_type == CH_UNDEF) ? guess_type() : _type; +} + +inline void +cl_channel::set(FILE *_fp, e_handle_type _type) +{ + assert(_fp); + fp = _fp; + handle = (HANDLE)_get_osfhandle(fileno(fp)); + assert(INVALID_HANDLE_VALUE != handle); + type = (_type == CH_UNDEF) ? guess_type() : _type; +} + +void +cl_channel::close(void) +{ + assert(INVALID_HANDLE_VALUE != handle); + + if (CH_SOCKET == type) + { + shutdown((SOCKET)handle, SD_BOTH); + closesocket((SOCKET)handle); + } + if (fp) + fclose(fp); + else if (CH_SOCKET != type) + CloseHandle(handle); + + fp = 0; + handle = INVALID_HANDLE_VALUE; + type = CH_UNDEF; +} + +/* + * Command console + *____________________________________________________________________________ + */ + +cl_console::cl_console(const char *fin, const char *fout, class cl_app *the_app) +{ + FILE *f; + + app = the_app; + if (fin) + { + if (!(f = fopen(fin, "r"))) + fprintf(stderr, "Can't open `%s': %s\n", fin, strerror(errno)); + in.set(f, CH_FILE); + } + + if (fout) + { + if (!(f = fopen(fout, "w"))) + fprintf(stderr, "Can't open `%s': %s\n", fout, strerror(errno)); + out.set(f, CH_FILE); + } + + prompt = 0; + flags = CONS_NONE; + if (in.is_tty()) + flags |= CONS_INTERACTIVE; + else + ;//fprintf(stderr, "Warning: non-interactive console\n"); + id = 0; + lines_printed = new cl_ustrings(100, 100, "console_cache"); +} + +cl_console::cl_console(FILE *fin, FILE *fout, class cl_app *the_app) +{ + app = the_app; + in.set(fin); + out.set(fout); + + prompt = 0; + flags = CONS_NONE; + if (in.is_tty()) + flags |= CONS_INTERACTIVE; + else + ;//fprintf(stderr, "Warning: non-interactive console\n"); + id = 0; + lines_printed = new cl_ustrings(100, 100, "console_cache"); +} + +cl_console::cl_console(cl_channel _in, cl_channel _out, class cl_app *the_app) +{ + app = the_app; + in = _in; + out = _out; + + prompt = 0; + flags = CONS_NONE; + if (in.is_tty()) + flags |= CONS_INTERACTIVE; + else + ;//fprintf(stderr, "Warning: non-interactive console\n"); + id = 0; + lines_printed= new cl_ustrings(100, 100, "console_cache"); +} + +class cl_console * +cl_console::clone_for_exec(char *fin) +{ + FILE *fi; + if (!fin) + return 0; + + if (!(fi = fopen(fin, "r"))) + { + fprintf(stderr, "Can't open `%s': %s\n", fin, strerror(errno)); + return 0; + } + cl_channel ch_in = cl_channel(fi, CH_FILE); + class cl_console *con= new cl_sub_console(this, ch_in, out, app); + return con; +} + +cl_console::~cl_console(void) +{ + if (CH_UNDEF != in.get_type()) + in.close(); + un_redirect(); + if (CH_UNDEF != out.get_type()) + { + if (flags & CONS_PROMPT) + dd_printf("\n"); + out.close(); + } + delete prompt_option; + delete null_prompt_option; + delete debug_option; +} + + +/* + * Output functions + */ + +void +cl_console::redirect(char *fname, char *mode) +{ + FILE *fp = fopen(fname, mode); + if (!fp) + dd_printf("Unable to open file '%s' for %s: %s\n", + fname, (mode[0]=='w') ? "write" : "append", strerror(errno)); + out.set(fp, CH_FILE); +} + +void +cl_console::un_redirect(void) +{ + if (CH_UNDEF != rout.get_type()) + out.close(); +} + +int +cl_console::cmd_do_print(const char *format, va_list ap) +{ + FILE *f = get_out()->get_fp(); + + if (f) + { + int ret = vfprintf(f, format, ap); + fflush(f); + return ret; + } + else + return 0; +} + +/* + * Input functions + */ + +char * +cl_console::read_line(void) +{ +#define BUF_LEN 1024 + + TRACE("%d-%s\n", get_id(), __PRETTY_FUNCTION__); + + char *s = NULL; + FILE *fp = in.get_fp(); + assert(fp); + +#ifdef HAVE_GETLINE + if (getline(&s, 0, fp) < 0) + return(0); +#elif defined HAVE_GETDELIM + size_t n = BUF_LEN; + s = (char *)malloc(n); + if (getdelim(&s, &n, '\n', fp) < 0) + { + free(s); + return(0); + } +#elif defined HAVE_FGETS + s = (char *)malloc(BUF_LEN); + if (fgets(s, BUF_LEN, fp) == NULL) + { + free(s); + return(0); + } +#endif + s[strlen(s)-1]= '\0'; + if (s[strlen(s)-1] == '\r') + s[strlen(s)-1]= '\0'; + flags&= ~CONS_PROMPT; + return(s); +} + + +/* + * This console cl_listen_console on a socket and can accept connection requests + */ + +cl_listen_console::cl_listen_console(int serverport, class cl_app *the_app) +{ + SOCKET sock; + app = the_app; + + if (INVALID_SOCKET != (sock = make_server_socket(serverport))) + { + if (SOCKET_ERROR == listen(sock, 10)) + fprintf(stderr, "Can't listen on port %d: %d\n", serverport, WSAGetLastError()); + } + in.set((HANDLE)sock, CH_SOCKET); +} + +int +cl_listen_console::proc_input(class cl_cmdset *cmdset) +{ + class cl_commander_base *cmd = app->get_commander(); + + struct sockaddr_in sock_addr; + ACCEPT_SOCKLEN_T size = sizeof(struct sockaddr); + SOCKET newsock = accept((SOCKET)get_in_fd(), (struct sockaddr*)&sock_addr, &size); + + if (INVALID_SOCKET == newsock) + { + fprintf(stderr, "Can't accept: %d\n", WSAGetLastError()); + return(0); + } + + int fh = _open_osfhandle((intptr_t)newsock, _O_TEXT); + if (-1 == fh) + { + fprintf(stderr, "Can't _open_osfhandle\n"); + } + FILE *fp = fdopen(fh, "r"); + if (!fp) + fprintf(stderr, "Can't open port for input\n"); + cl_channel ch_in = cl_channel(fp, CH_SOCKET); + + fh = _open_osfhandle((intptr_t)newsock, _O_TEXT); + if (-1 == fh) + { + fprintf(stderr, "Can't _open_osfhandle\n"); + } + fp = fdopen(fh, "w"); + if (!fp) + fprintf(stderr, "Can't open port for output\n"); + cl_channel ch_out = cl_channel(fp, CH_SOCKET); + + class cl_console_base *c = new cl_console(ch_in, ch_out, app); + c->flags |= CONS_INTERACTIVE; + cmd->add_console(c); + + return 0; +} + + +/* + * Sub-console + */ + +cl_sub_console::cl_sub_console(class cl_console_base *the_parent, + cl_channel _in, cl_channel _out, class cl_app *the_app): + cl_console(_in, _out, the_app) +{ + parent = the_parent; +} + +cl_sub_console::~cl_sub_console(void) +{ + class cl_commander_base *c = app->get_commander(); + + if (parent && c) + { + c->activate_console(parent); + } +} + +int +cl_sub_console::init(void) +{ + class cl_commander_base *c = app->get_commander(); + + if (parent && c) + { + c->deactivate_console(parent); + } + cl_console::init(); + flags |= CONS_ECHO; + return 0; +} + + +/* + * Command interpreter + *____________________________________________________________________________ + */ + +int +cl_commander::init(void) +{ + TRACE("%s\n", __PRETTY_FUNCTION__); + + class cl_optref console_on_option(this); + class cl_optref config_file_option(this); + class cl_optref port_number_option(this); + class cl_console_base *con; + + console_on_option.init(); + console_on_option.use("console_on"); + config_file_option.init(); + config_file_option.use("config_file"); + port_number_option.init(); + + cl_base::init(); + set_name("Commander"); + + bool need_config = DD_TRUE; + + if (port_number_option.use("port_number")) + add_console(new cl_listen_console(port_number_option.get_value((long)0), app)); + + /* The following code is commented out because it produces gcc warnings + * newcmd.cc: In member function `virtual int cl_commander::init()': + * newcmd.cc:785: warning: 'Config' might be used uninitialized in this function + * newcmd.cc:786: warning: 'cn' might be used uninitialized in this function + */ + /* + char *Config= config_file_option.get_value(Config); + char *cn= console_on_option.get_value(cn); + */ + /* Here shoud probably be something else, but is still better then the former code... */ + char *Config = config_file_option.get_value(""); + char *cn = console_on_option.get_value(""); + + if (cn) + { + add_console(con = new cl_console(cn, cn, app)); + exec_on(con, Config); + need_config = DD_FALSE; + } + if (cons->get_count() == 0) + { + add_console(con = new cl_console(stdin, stdout, app)); + exec_on(con, Config); + need_config = DD_FALSE; + } + if (need_config && Config && *Config) + { + FILE *fc = fopen(Config, "r"); + if (!fc) + fprintf(stderr, "Can't open `%s': %s\n", Config, strerror(errno)); + else + { + con = new cl_console(fc, stderr, app); + con->flags |= CONS_NOWELCOME | CONS_ECHO; + add_console(con); + } + } + return(0); +} + +void +cl_commander::set_fd_set(void) +{ + TRACE("%s\n", __PRETTY_FUNCTION__); + + int i; + + FD_ZERO(&read_set); + + for (i = 0; i < cons->count; i++) + { + class cl_console *c= dynamic_cast((class cl_console_base*)(cons->at(i))); + + if (c->input_active() && CH_SOCKET == c->in.get_type()) + { + HANDLE fd = c->get_in_fd(); + assert(INVALID_HANDLE_VALUE != fd); + + FD_SET((SOCKET)fd, &read_set); + } + } +} + +int +cl_commander::console_count(void) +{ + int i = 0; + + for (int j = 0; j < cons->count; j++) + { + class cl_console *c = dynamic_cast((class cl_console_base*)(cons->at(j))); + + if (c->input_active()) + { + switch (c->in.get_type()) + { + case CH_CONSOLE: + case CH_FILE: + case CH_SERIAL: + ++i; + break; + + default: + break; + } + } + } + + return i; +} + +int +cl_commander::console_input_avail(void) +{ + int i = 0; + + FD_ZERO(&console_active_set); + for (int j = 0; j < cons->count; j++) + { + class cl_console *c = dynamic_cast((class cl_console_base*)(cons->at(j))); + + if (c->input_avail()) + { + HANDLE fd = c->get_in_fd(); + assert(INVALID_HANDLE_VALUE != fd); + + switch (c->in.get_type()) + { + case CH_CONSOLE: + case CH_FILE: + case CH_SERIAL: + FD_SET((SOCKET)fd, &console_active_set); + ++i; + break; + + default: + break; + } + } + } + + return i; +} + +int +cl_commander::socket_input_avail(long timeout, bool sleep) +{ + active_set = read_set; + + if (active_set.fd_count) + { + struct timeval tv = {0, 0}; + + struct timeval *tvp = sleep ? NULL : &tv; + + int i = select(0, &active_set, NULL, NULL, tvp); + if (SOCKET_ERROR == i) + { + fprintf(stderr, "Can't select: %d\n", WSAGetLastError()); + return 0; + } + + return i; + } + else + { + Sleep(timeout / 1000); + return 0; + } +} + +int +cl_commander::input_avail_timeout(long timeout) +{ + TRACE("%s\n", __PRETTY_FUNCTION__); + + int n; + if (0 != (n = console_input_avail())) + FD_ZERO(&active_set); + else + n = socket_input_avail(timeout, false); + + return n; +} + +#define CONSOLE_TIMEOUT 300000 + +int +cl_commander::wait_input(void) +{ + TRACE("%s\n", __PRETTY_FUNCTION__); + + prompt(); + + if (0 < console_count()) + { + int n; + + while (0 == (n = input_avail_timeout(CONSOLE_TIMEOUT))) + ; + + return n; + } + else + { + FD_ZERO(&console_active_set); + return socket_input_avail(0, true); + } +} + +int +cl_commander::proc_input(void) +{ + TRACE("%s\n", __PRETTY_FUNCTION__); + + for (int j = 0; j < cons->count; j++) + { + class cl_console *c = dynamic_cast((class cl_console_base*)(cons->at(j))); + + if (c->input_active()) + { + HANDLE fd = c->get_in_fd(); + assert(INVALID_HANDLE_VALUE != fd); + + if (FD_ISSET(fd, &active_set) || FD_ISSET(fd, &console_active_set)) + { + actual_console = c; + if (c->proc_input(cmdset)) + { + del_console(c); + delete c; + } + actual_console = 0; + return 0 == cons->count; + } + } + } + return 0; +} + + +/* End of cmd.src/newcmdwin32.cc */ diff --git a/sim/ucsim/cmd.src/newcmdwin32cl.h b/sim/ucsim/cmd.src/newcmdwin32cl.h new file mode 100644 index 0000000..bdb8560 --- /dev/null +++ b/sim/ucsim/cmd.src/newcmdwin32cl.h @@ -0,0 +1,150 @@ +/* + * Simulator of microcontrollers (cmd.src/newcmdwin32cl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * Copyright (C) 2006, Borut Razem - borut.razem@siol.net + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_NEWCMDFDCL_HEADER +#define CMD_NEWCMDFDCL_HEADER + +#include "newcmdcl.h" +#include "cmdutil.h" + + +class cl_channel +{ +public: + cl_channel(void) { set(); } + cl_channel(HANDLE _handle, e_handle_type _type = CH_UNDEF) { set(_handle, _type); } + cl_channel(FILE *_fp, e_handle_type _type = CH_UNDEF) { set(_fp, _type); } + + void set(void); + void set(HANDLE _handle, e_handle_type _type = CH_UNDEF); + void set(FILE *_fp, e_handle_type _type = CH_UNDEF); + + void close(void); + bool input_avail(void) const { return ::input_avail(handle, type); } + enum e_handle_type get_type(void) const { return type; } + HANDLE get_handle(void) const { return handle; } + FILE *get_fp(void) const { return fp; } + bool is_tty(void) const { return CH_FILE != type; } + bool is_eof(void) const { return get_fp() ? feof(get_fp()) : true; } + +private: + e_handle_type guess_type(void) { return get_handle_type(handle); } + + e_handle_type type; + HANDLE handle; + FILE *fp; +}; + + +/* + * Command socket console + */ + +class cl_console: public cl_console_base +{ + friend class cl_commander; + +protected: + cl_channel in, out, rout/*redirected output*/; + +public: + cl_console(void) { in = cl_channel(); out = cl_channel(); rout = cl_channel(); } + cl_console(const char *fin, const char *fout, class cl_app *the_app); + cl_console(FILE *fin, FILE *fout, class cl_app *the_app); + cl_console(cl_channel _in, cl_channel _out, class cl_app *the_app); + + int cmd_do_print(const char *format, va_list ap); + + virtual ~cl_console(void); + virtual class cl_console *clone_for_exec(char *fin); + + virtual void redirect(char *fname, char *mode); + virtual void un_redirect(void); + virtual bool is_tty(void) const { return CH_FILE != in.get_type(); } + virtual bool is_eof(void) const { return in.is_eof(); } + virtual HANDLE get_in_fd(void) { return in.get_handle(); } + virtual bool input_avail(void) { return input_active() ? in.input_avail() : false; } + virtual char *read_line(void); + +private: + class cl_channel *get_out(void) { return (CH_UNDEF != rout.get_type()) ? &rout : &out; } +}; + +class cl_listen_console: public cl_console +{ +public: + cl_listen_console(int serverport, class cl_app *the_app); + + virtual void welcome(void) {} + virtual int proc_input(class cl_cmdset *cmdset); +}; + +class cl_sub_console: public cl_console +{ +private: + class cl_console_base *parent; + +public: + cl_sub_console(class cl_console_base *the_parent, + cl_channel _in, cl_channel _out, class cl_app *the_app); + virtual ~cl_sub_console(void); + virtual int init(void); +}; + + +/* + * Command interpreter + */ + +class cl_commander: public cl_commander_base +{ +private: + fd_set read_set, active_set, console_active_set; + +public: + cl_commander(class cl_app *the_app, class cl_cmdset *acmdset) + : cl_commander_base(the_app, acmdset) + { + } + + virtual int init(void); + virtual void set_fd_set(void); + virtual int input_avail(void) { return input_avail_timeout(0); } + virtual int wait_input(void); + virtual int proc_input(void); + +private: + int console_count(void); + int console_input_avail(void); + int socket_input_avail(long timeout, bool sleep); + int input_avail_timeout(long timeout); +}; + +#endif + +/* End of cmd.src/newcmdwin32cl.h */ diff --git a/sim/ucsim/cmd.src/set.cc b/sim/ucsim/cmd.src/set.cc new file mode 100644 index 0000000..dc5cbb7 --- /dev/null +++ b/sim/ucsim/cmd.src/set.cc @@ -0,0 +1,296 @@ +/* + * Simulator of microcontrollers (cmd.src/set.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* + This file is part of microcontroller simulator: ucsim. + + UCSIM is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + UCSIM is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with UCSIM; see the file COPYING. If not, write to the Free + Software Foundation, 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. +*/ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include "i_string.h" + +// prj +#include "errorcl.h" + +// sim +#include "simcl.h" +#include "optioncl.h" + +// local +#include "setcl.h" +#include "cmdutil.h" + + +/* + * Command: set memory + *---------------------------------------------------------------------------- + */ + +//int +//cl_set_mem_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_set_mem_cmd) +{ + class cl_memory *mem= 0; + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + + if (cmdline->syntax_match(uc, MEMORY ADDRESS DATALIST)) { + mem= params[0]->value.memory.memory; + t_addr start= params[1]->value.address; + t_mem *array= params[2]->value.data_list.array; + int len= params[2]->value.data_list.len; + + if (len == 0) + con->dd_printf("Error: no data\n"); + else if (start < mem->get_start_address()) + con->dd_printf("Start address less then 0x%"_A_"x\n", + mem->get_start_address()); + else + { + int i; + t_addr addr; + for (i= 0, addr= start; + i < len && mem->valid_address(addr); + i++, addr++) + mem->write(addr, array[i]); + uc->check_errors(); + mem->dump(start, start+len-1, 8, con); + } + } + else + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax\n"); + + return(DD_FALSE);; +} + + +/* + * Command: set bit + *---------------------------------------------------------------------------- + */ + +//int +//cl_set_bit_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_set_bit_cmd) +{ + class cl_memory *mem; + t_addr mem_addr= 0; + t_mem bit_mask= 0; + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + + if (cmdline->syntax_match(uc, BIT NUMBER)) { + mem= params[0]->value.bit.mem; + mem_addr= params[0]->value.bit.mem_address; + bit_mask= params[0]->value.bit.mask; + if (params[1]->value.number) + mem->set_bit1(mem_addr, bit_mask); + else + mem->set_bit0(mem_addr, bit_mask); + mem->dump(mem_addr, mem_addr, 1, con); + } + else + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax\n"); + + return(DD_FALSE);; +} + + +/* + * Command: set hw + *---------------------------------------------------------------------------- + */ + +COMMAND_DO_WORK_UC(cl_set_hw_cmd) +{ + class cl_hw *hw= 0; + class cl_cmd_arg *params[1]= { cmdline->param(0)/*, + cmdline->param(1), + cmdline->param(2), + cmdline->param(3)*/ }; + + if (params[0] && /*cmdline->syntax_match(uc, HW)*/params[0]->as_hw(uc)) { + hw= params[0]->value.hw; + //pn= hw->id; + //l= params[1]->value.number; + } + /*else if (cmdline->syntax_match(uc, NUMBER NUMBER)) { + pn= params[0]->value.number; + l= params[1]->value.number; + hw= uc->get_hw(HW_PORT, pn, 0); + }*/ + else + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax\n"); + /*if (pn < 0 || + pn > 3) + con->dd_printf("Error: wrong port\n"); + else*/ + { + if (hw) + { + cmdline->shift(); + hw->set_cmd(cmdline, con); + } + else + con->dd_printf("Error: no hw\n"); + } + return(DD_FALSE);; +} + + +/* + * Command: set option + *---------------------------------------------------------------------------- + */ + +//int +//cl_set_option_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_APP(cl_set_option_cmd) +{ + char *id= 0, *s= 0; + int idx; + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + class cl_option *option= 0; + + if (cmdline->syntax_match(0/*app->get_uc()*/, NUMBER STRING)) { + idx= params[0]->value.number; + s= params[1]->value.string.string; + option= app->options->get_option(idx); + } + else if (cmdline->syntax_match(0, STRING STRING STRING)) { + id= params[0]->value.string.string; + char *cr= params[1]->value.string.string; + s= params[2]->value.string.string; + int n= app->options->nuof_options(id, cr); + if (n > 1) + { + con->dd_printf("Ambiguous option name, use number instead\n"); + return(DD_FALSE); + } + else if (n == 0) + ;//con->dd_printf("Named option does not exist\n"); + else + { + if ((option= app->options->get_option(id, cr)) == 0) + option= app->options->get_option(cr, id); + } + } + else if (cmdline->syntax_match(0/*app->get_uc()*/, STRING STRING)) { + id= params[0]->value.string.string; + s= params[1]->value.string.string; + int n= app->options->nuof_options(id); + if (n > 1) + { + con->dd_printf("Ambiguous option name, use number instead\n"); + return(DD_FALSE); + } + else if (n == 0) + ;//con->dd_printf("Named option does not exist\n"); + else + option= app->options->get_option(id); + } + else + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax\n"); + if (!option) + { + con->dd_printf("Option does not exist\n"); + return(DD_FALSE); + } + + option->set_value(s); + + return(DD_FALSE); +} + + +/* + * Command: set error + *---------------------------------------------------------------------------- + */ + +//int +//cl_set_option_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_APP(cl_set_error_cmd) +{ + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + char *error_name= NIL, *value= NIL; + + if (cmdline->syntax_match(0/*app->get_uc()*/, STRING STRING)) { + error_name= params[0]->value.string.string; + value= params[1]->value.string.string; + } + else + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax\n"); + + class cl_list *registered_errors = cl_error_registry::get_list(); + if (error_name && + value && + registered_errors) + { + int i; + for (i= 0; i < registered_errors->count; i++) + { + class cl_error_class *e= + dynamic_cast(registered_errors->object_at(i)); + if (e->is_inamed(error_name)) + { + if (strchr("uU-?", *value) != NULL) + e->set_on(ERROR_PARENT); + else if (strchr("1tTyY", *value) != NULL || + (strlen(value) > 1 && + strchr("nN", value[2]) != NULL)) + e->set_on(ERROR_ON); + else if (strchr("0fFnN", *value) != NULL || + (strlen(value) > 1 && + strchr("fF", value[2]) != NULL)) + e->set_on(ERROR_OFF); + else + con->dd_printf("Bad value (%s)\n", value); + return(DD_FALSE); + } + } + } + con->dd_printf("Error %s not found\n", error_name); + + return(DD_FALSE); +} + + +/* End of cmd.src/set.cc */ diff --git a/sim/ucsim/cmd.src/setcl.h b/sim/ucsim/cmd.src/setcl.h new file mode 100644 index 0000000..8f9481c --- /dev/null +++ b/sim/ucsim/cmd.src/setcl.h @@ -0,0 +1,52 @@ +/* + * Simulator of microcontrollers (cmd.src/setcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_SETCL_HEADER +#define CMD_SETCL_HEADER + +#include "newcmdcl.h" + + +// SET MEMORY +COMMAND_ON(uc,cl_set_mem_cmd); + +// SET BIT +COMMAND_ON(uc,cl_set_bit_cmd); + +// SET HW +COMMAND_ON(uc,cl_set_hw_cmd); + +// SET OPTION +COMMAND_ON(app,cl_set_option_cmd); + +// SET ERROR +COMMAND_ON(app,cl_set_error_cmd); + + +#endif + +/* End of cmd.src/setcl.h */ diff --git a/sim/ucsim/cmd.src/show.cc b/sim/ucsim/cmd.src/show.cc new file mode 100644 index 0000000..2876374 --- /dev/null +++ b/sim/ucsim/cmd.src/show.cc @@ -0,0 +1,190 @@ +/* + * Simulator of microcontrollers (cmd.src/show.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include "i_string.h" + +// prj +#include "globals.h" +#include "utils.h" +#include "errorcl.h" + +// sim +#include "simcl.h" + +// local +#include "showcl.h" + + +/* + * Command: show copying + *---------------------------------------------------------------------------- + */ + +//int +//cl_show_copying_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK(cl_show_copying_cmd) +{ + con->dd_printf("%s\n", copying); + return(DD_FALSE);; +} + + +/* + * Command: show warranty + *---------------------------------------------------------------------------- + */ + +//int +//cl_show_warranty_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK(cl_show_warranty_cmd) +{ + con->dd_printf("%s\n", warranty); + return(DD_FALSE);; +} + + +/* + * Command: show option + *---------------------------------------------------------------------------- + */ +COMMAND_DO_WORK_APP(cl_show_option_cmd) +{ + class cl_cmd_arg *parm= cmdline->param(0); + char *s= 0; + + if (!parm) + ; + else if (cmdline->syntax_match(0/*app->get_uc()*/, STRING)) { + s= parm->value.string.string; + } + else + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax\n"); + + int i; + for (i= 0; i < app->options->count; i++) + { + class cl_option *o= (class cl_option *)(/*uc*/app->options->at(i)); + if (!s || + !strcmp(s, o->get_name())) + { + int j; + con->dd_printf("%d. %s: ", i, object_name(o)); + o->print(con); + con->dd_printf(" - %s\n", o->help); + con->dd_printf(" Type: %s\n", o->get_type_name()); + /*union option_value *val= o->get_value(); + con->dd_printf(" Value: \""); + unsigned int uj; + TYPE_UBYTE *d= (TYPE_UBYTE*)val; + for (uj= 0; uj < sizeof(*val); uj++) + con->print_char_octal(d[uj]); + con->dd_printf("\"\n");*/ + con->dd_printf(" Hidden: %s\n", (o->hidden)?"True":"False"); + con->dd_printf(" Creator: \"%s\"\n %d Users:\n", + object_name(o->get_creator()), + o->users->count); + for (j= 0; j < o->users->count; j++) + { + class cl_optref *r= (class cl_optref *)(o->users->at(j)); + con->dd_printf(" %2d. owner(s)=\"%s\"\n", j, + object_name(r->get_owner())); + } + if (i >= 0 && + i < app->options->count-1) + con->dd_printf("\n"); + } + } + + return(DD_FALSE); +} + + +// prj +#include "errorcl.h" + +static void +show_error_cmd_print_node(class cl_console_base *con, + int indent, class cl_base *node) +{ + if (!node) + return; + int i; + for (i= 0; i < indent; i++) + con->dd_printf(" "); + const char *name= node->get_name("unknown"); + class cl_error_class *ec= dynamic_cast(node); + char *str; + con->dd_printf("%s: %s [%s/%s]\n", + str= case_string(case_case, ec->get_type_name()), + name, get_id_string(error_on_off_names, + ec->get_on()), + (ec->is_on())?"ON":"OFF"); + free(str); + class cl_base *c= node->first_child(); + while (c) + { + show_error_cmd_print_node(con, indent+2, c); + c= node->next_child(c); + } +} + +/* + * Command: show error + *---------------------------------------------------------------------------- + */ +COMMAND_DO_WORK_APP(cl_show_error_cmd) +{ + /*class cl_cmd_arg *parm= cmdline->param(0); + char *s= 0; + + if (!parm) + ; + else if (cmdline->syntax_match(0, STRING)) { + s= parm->value.string.string; + } + else + con->dd_printf("%s\n", short_help?short_help:"Error: wrong syntax\n"); + */ + class cl_list *registered_errors = cl_error_registry::get_list(); + int i; + for (i= 0; i < registered_errors->count; i++) + { + class cl_error_class *ec; + ec= dynamic_cast(registered_errors->object_at(i)); + if (!ec->get_parent()) + show_error_cmd_print_node(con, 0, ec); + } + return(DD_FALSE); +} + + +/* End of cmd.src/show.cc */ diff --git a/sim/ucsim/cmd.src/showcl.h b/sim/ucsim/cmd.src/showcl.h new file mode 100644 index 0000000..f7eab7d --- /dev/null +++ b/sim/ucsim/cmd.src/showcl.h @@ -0,0 +1,49 @@ +/* + * Simulator of microcontrollers (cmd.src/showcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_SHOWCL_HEADER +#define CMD_SHOWCL_HEADER + +#include "newcmdcl.h" + + +// SHOW COPYING +COMMAND(cl_show_copying_cmd); + +// SHOW WARRANTY +COMMAND(cl_show_warranty_cmd); + +// SHOW OPTION +COMMAND_ON(app,cl_show_option_cmd); + +// SHOW ERROR +COMMAND_ON(app,cl_show_error_cmd); + + +#endif + +/* End of cmd.src/showcl.h */ diff --git a/sim/ucsim/cmd.src/syntax.cc b/sim/ucsim/cmd.src/syntax.cc new file mode 100644 index 0000000..d99f09b --- /dev/null +++ b/sim/ucsim/cmd.src/syntax.cc @@ -0,0 +1,31 @@ +/* + * Simulator of microcontrollers (cmd.src/syntax.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +// local +#include "syntaxcl.h" + +/* End of cmd.src/syntax.cc */ diff --git a/sim/ucsim/cmd.src/syntaxcl.h b/sim/ucsim/cmd.src/syntaxcl.h new file mode 100644 index 0000000..c49d047 --- /dev/null +++ b/sim/ucsim/cmd.src/syntaxcl.h @@ -0,0 +1,33 @@ +/* + * Simulator of microcontrollers (cmd.src/syntaxcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_SYNTAXCL_HEADER +#define CMD_SYNTAXCL_HEADER + +#endif + +/* End of cmd.src/syntaxcl.h */ diff --git a/sim/ucsim/cmd.src/timer.cc b/sim/ucsim/cmd.src/timer.cc new file mode 100644 index 0000000..3f8ad9d --- /dev/null +++ b/sim/ucsim/cmd.src/timer.cc @@ -0,0 +1,286 @@ +/* + * Simulator of microcontrollers (cmd.src/timer.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include "stdio.h" +#include "i_string.h" + +// sim +#include "simcl.h" + +// local +#include "timercl.h" + + +/* + * Command: timer + *---------------------------------------------------------------------------- + */ + +//int +//cl_timer_cmd::do_work(class cl_sim *sim, +// class cl_cmdline *cmdline, class cl_console_base *con) +COMMAND_DO_WORK_UC(cl_timer_cmd) +{ + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + + if (!params[0]) + { + con->dd_printf("Timer id is missing."); + return(DD_FALSE); + } + if (params[0]->as_number()) + { + as_nr= DD_TRUE; + id_nr= params[0]->value.number; + if (id_nr <= 0) + { + con->dd_printf("Error: " + "Timer id must be greater than zero or a string\n"); + return(DD_TRUE); + } + ticker= uc->get_counter(id_nr); + } + else + { + as_nr= DD_FALSE; + id_str= params[0]->s_value; + ticker= uc->get_counter(id_str); + } + cmdline->shift(); + return(DD_FALSE); +} + + +/* + * Command: timer add + *----------------------------------------------------------------------------- + * Add a new timer to the list + */ + +COMMAND_DO_WORK_UC(cl_timer_add_cmd) + //add(class cl_uc *uc, class cl_cmdline *cmdline, class cl_console_base *con) +{ + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + long dir= +1, in_isr= 0; + + if (cl_timer_cmd::do_work(uc, cmdline, con)) + return(DD_FALSE); + if (ticker) + { + if (!as_nr) + con->dd_printf("Error: Timer \"%s\" already exists\n", id_str); + else + con->dd_printf("Error: Timer %d already exists\n", id_nr); + return(DD_FALSE); + } + + if (cmdline->nuof_params() > 0) + { + if (cmdline->syntax_match(uc, NUMBER)) + dir= params[0]->value.number; + else if (cmdline->syntax_match(uc, NUMBER NUMBER)) + { + dir= params[0]->value.number; + in_isr= params[1]->value.number; + } + } + + if (!as_nr) + { + ticker= new cl_ticker(dir, in_isr, id_str); + uc->add_counter(ticker, id_str); + } + else + { + ticker= new cl_ticker(dir, in_isr, 0); + uc->add_counter(ticker, id_nr); + } + + return(DD_FALSE); +} + +/* + * Command: timer delete + *----------------------------------------------------------------------------- + * Delete a timer from the list + */ + +COMMAND_DO_WORK_UC(cl_timer_delete_cmd) + //del(class cl_uc *uc, class cl_cmdline *cmdline, class cl_console_base *con) +{ + if (cl_timer_cmd::do_work(uc, cmdline, con)) + return(DD_FALSE); + if (!ticker) + { + if (!as_nr) + con->dd_printf("Timer \"%s\" does not exist\n", id_str); + else + con->dd_printf("Timer %d does not exist\n", id_nr); + return(DD_FALSE); + } + if (!as_nr) + uc->del_counter(id_str); + else + uc->del_counter(id_nr); + + return(DD_FALSE); +} + +/* + * Command: timer get + *----------------------------------------------------------------------------- + * Get the value of just one timer or all of them + */ + +COMMAND_DO_WORK_UC(cl_timer_get_cmd) + //get(class cl_uc *uc, class cl_cmdline *cmdline, class cl_console_base *con) +{ + if (cmdline->nuof_params()) + { + if (cl_timer_cmd::do_work(uc, cmdline, con)) + return(DD_FALSE); + } + else + ticker= 0; + if (ticker) + ticker->dump(id_nr, uc->xtal, con); + else + { + uc->ticks->dump(0, uc->xtal, con); + uc->isr_ticks->dump(0, uc->xtal, con); + uc->idle_ticks->dump(0, uc->xtal, con); + for (id_nr= 0; id_nr < uc->counters->count; id_nr++) + { + ticker= uc->get_counter(id_nr); + if (ticker) + ticker->dump(id_nr, uc->xtal, con); + } + } + + return(DD_FALSE); +} + +/* + * Command: timer run + *----------------------------------------------------------------------------- + * Allow a timer to run + */ + +COMMAND_DO_WORK_UC(cl_timer_run_cmd) + //run(class cl_uc *uc, class cl_cmdline *cmdline, class cl_console_base *con) +{ + if (cl_timer_cmd::do_work(uc, cmdline, con)) + return(DD_FALSE); + if (!ticker) + { + if (!as_nr) + con->dd_printf("Timer %d does not exist\n", id_str); + else + con->dd_printf("Timer %d does not exist\n", id_nr); + return(0); + } + ticker->options|= TICK_RUN; + + return(DD_FALSE); +} + +/* + * Command: timer stop + *----------------------------------------------------------------------------- + * Stop a timer + */ + +COMMAND_DO_WORK_UC(cl_timer_stop_cmd) + //stop(class cl_uc *uc, class cl_cmdline *cmdline, class cl_console_base *con) +{ + if (cl_timer_cmd::do_work(uc, cmdline, con)) + return(DD_FALSE); + + if (!ticker) + { + if (!as_nr) + con->dd_printf("Timer %d does not exist\n", id_str); + else + con->dd_printf("Timer %d does not exist\n", id_nr); + return(DD_FALSE); + } + ticker->options&= ~TICK_RUN; + + return(DD_FALSE); +} + + +/* + * Command: timer value + *----------------------------------------------------------------------------- + * Set a timer to a specified value + */ + +COMMAND_DO_WORK_UC(cl_timer_value_cmd) + //val(class cl_uc *uc, class cl_cmdline *cmdline, class cl_console_base *con) +{ + class cl_cmd_arg *params[4]= { cmdline->param(0), + cmdline->param(1), + cmdline->param(2), + cmdline->param(3) }; + + if (cl_timer_cmd::do_work(uc, cmdline, con)) + return(DD_FALSE); + if (!ticker) + { + if (!as_nr) + con->dd_printf("Error: Timer %d does not exist\n", id_str); + else + con->dd_printf("Error: Timer %d does not exist\n", id_nr); + return(DD_FALSE); + } + if (params[2]) + { + con->dd_printf("Error: Value is missing\n"); + return(DD_FALSE); + } + long val; + if (!params[2]->get_ivalue(&val)) + { + con->dd_printf("Error: Wrong parameter\n"); + return(DD_FALSE); + } + ticker->ticks= val; + + return(DD_FALSE); +} + + +/* End of cmd.src/timer.cc */ diff --git a/sim/ucsim/cmd.src/timercl.h b/sim/ucsim/cmd.src/timercl.h new file mode 100644 index 0000000..7547908 --- /dev/null +++ b/sim/ucsim/cmd.src/timercl.h @@ -0,0 +1,57 @@ +/* + * Simulator of microcontrollers (cmd.src/timercl.h) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef CMD_TIMERCL_HEADER +#define CMD_TIMERCL_HEADER + +#include "newcmdcl.h" + + + +COMMAND_HEAD(cl_timer_cmd) +public: + class cl_ticker *ticker; + bool as_nr; + int id_nr; + char *id_str; +COMMAND_METHODS_ON(uc,cl_timer_cmd) + void set_ticker(class cl_uc *uc, + class cl_cmd_arg *param); +COMMAND_TAIL; + + +COMMAND_ANCESTOR_ON(uc,cl_timer_add_cmd,cl_timer_cmd); +COMMAND_ANCESTOR_ON(uc,cl_timer_delete_cmd,cl_timer_cmd); +COMMAND_ANCESTOR_ON(uc,cl_timer_get_cmd,cl_timer_cmd); +COMMAND_ANCESTOR_ON(uc,cl_timer_run_cmd,cl_timer_cmd); +COMMAND_ANCESTOR_ON(uc,cl_timer_stop_cmd,cl_timer_cmd); +COMMAND_ANCESTOR_ON(uc,cl_timer_value_cmd,cl_timer_cmd); + + +#endif + +/* End of cmd.src/timercl.h */ diff --git a/sim/ucsim/conf b/sim/ucsim/conf new file mode 100755 index 0000000..c5a4eb1 --- /dev/null +++ b/sim/ucsim/conf @@ -0,0 +1,43 @@ +#!/bin/bash + +TARGET=linux + +if [ "$#" -ge 1 ]; then + case "$1" in + [lL]*) TARGET=linux;shift;; + [mM]*) TARGET=mingw;shift;; + *) echo "Unknown target \"${1}\"" >&2; exit 1;; + esac +fi + +if [ -f devel ]; then + export CXXFLAGS="" +fi + +case $TARGET in + linux) + ./configure --prefix=${HOME}/local \ + --enable-ucsim \ + --enable-dlso \ + --enable-serio \ + --enable-z80 \ + --enable-xa \ + "$@" + ;; + mingw) + export CC=/usr/local/cross-tools/mingw32/bin/gcc + export CXX=/usr/local/cross-tools/mingw32/bin/g++ + ./configure --prefix=${HOME}/local \ + --disable-ucsim \ + --disable-dlso \ + --disable-serio \ + --enable-z80 \ + --enable-xa \ + "$@" + ;; + *) + echo >&2 "Do not know how to configure!" + ;; +esac + +# End of conf diff --git a/sim/ucsim/conf.mk b/sim/ucsim/conf.mk new file mode 100644 index 0000000..3520f3c --- /dev/null +++ b/sim/ucsim/conf.mk @@ -0,0 +1,15 @@ +# +# Makefile targets to remake configuration +# + +freshconf: main.mk ddconfig.h + +main.mk: $(srcdir)/main_in.mk config.status + $(SHELL) ./config.status + +ddconfig.h: ddconfig_in.h config.status + @echo "Re-making ddconfig.h" + $(SHELL) ./config.status + touch ddconfig.h + +# End of conf.mk diff --git a/sim/ucsim/config.guess b/sim/ucsim/config.guess new file mode 100755 index 0000000..1c1090c --- /dev/null +++ b/sim/ucsim/config.guess @@ -0,0 +1,1319 @@ +#! /bin/sh +# Attempt to guess a canonical system name. +# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +# 2000, 2001, 2002 Free Software Foundation, Inc. + +timestamp='2002-01-02' + +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + +# Originally written by Per Bothner . +# Please send patches to . Submit a context +# diff and a properly formatted ChangeLog entry. +# +# This script attempts to guess a canonical system name similar to +# config.sub. If it succeeds, it prints the system name on stdout, and +# exits with 0. Otherwise, it exits with 1. +# +# The plan is that this can be called by configure scripts if you +# don't specify an explicit build system type. + +me=`echo "$0" | sed -e 's,.*/,,'` + +usage="\ +Usage: $0 [OPTION] + +Output the configuration name of the system \`$me' is run on. + +Operation modes: + -h, --help print this help, then exit + -t, --time-stamp print date of last modification, then exit + -v, --version print version number, then exit + +Report bugs and patches to ." + +version="\ +GNU config.guess ($timestamp) + +Originally written by Per Bothner. +Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 +Free Software Foundation, Inc. + +This is free software; see the source for copying conditions. There is NO +warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." + +help=" +Try \`$me --help' for more information." + +# Parse command line +while test $# -gt 0 ; do + case $1 in + --time-stamp | --time* | -t ) + echo "$timestamp" ; exit 0 ;; + --version | -v ) + echo "$version" ; exit 0 ;; + --help | --h* | -h ) + echo "$usage"; exit 0 ;; + -- ) # Stop option processing + shift; break ;; + - ) # Use stdin as input. + break ;; + -* ) + echo "$me: invalid option $1$help" >&2 + exit 1 ;; + * ) + break ;; + esac +done + +if test $# != 0; then + echo "$me: too many arguments$help" >&2 + exit 1 +fi + + +dummy=dummy-$$ +trap 'rm -f $dummy.c $dummy.o $dummy.rel $dummy; exit 1' 1 2 15 + +# CC_FOR_BUILD -- compiler used by this script. +# Historically, `CC_FOR_BUILD' used to be named `HOST_CC'. We still +# use `HOST_CC' if defined, but it is deprecated. + +set_cc_for_build='case $CC_FOR_BUILD,$HOST_CC,$CC in + ,,) echo "int dummy(){}" > $dummy.c ; + for c in cc gcc c89 ; do + ($c $dummy.c -c -o $dummy.o) >/dev/null 2>&1 ; + if test $? = 0 ; then + CC_FOR_BUILD="$c"; break ; + fi ; + done ; + rm -f $dummy.c $dummy.o $dummy.rel ; + if test x"$CC_FOR_BUILD" = x ; then + CC_FOR_BUILD=no_compiler_found ; + fi + ;; + ,,*) CC_FOR_BUILD=$CC ;; + ,*,*) CC_FOR_BUILD=$HOST_CC ;; +esac' + +# This is needed to find uname on a Pyramid OSx when run in the BSD universe. +# (ghazi@noc.rutgers.edu 1994-08-24) +if (test -f /.attbin/uname) >/dev/null 2>&1 ; then + PATH=$PATH:/.attbin ; export PATH +fi + +UNAME_MACHINE=`(uname -m) 2>/dev/null` || UNAME_MACHINE=unknown +UNAME_RELEASE=`(uname -r) 2>/dev/null` || UNAME_RELEASE=unknown +UNAME_SYSTEM=`(uname -s) 2>/dev/null` || UNAME_SYSTEM=unknown +UNAME_VERSION=`(uname -v) 2>/dev/null` || UNAME_VERSION=unknown + +# Note: order is significant - the case branches are not exclusive. + +case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in + *:NetBSD:*:*) + # NetBSD (nbsd) targets should (where applicable) match one or + # more of the tupples: *-*-netbsdelf*, *-*-netbsdaout*, + # *-*-netbsdecoff* and *-*-netbsd*. For targets that recently + # switched to ELF, *-*-netbsd* would select the old + # object file format. This provides both forward + # compatibility and a consistent mechanism for selecting the + # object file format. + # + # Note: NetBSD doesn't particularly care about the vendor + # portion of the name. We always set it to "unknown". + UNAME_MACHINE_ARCH=`(uname -p) 2>/dev/null` || \ + UNAME_MACHINE_ARCH=unknown + case "${UNAME_MACHINE_ARCH}" in + arm*) machine=arm-unknown ;; + sh3el) machine=shl-unknown ;; + sh3eb) machine=sh-unknown ;; + *) machine=${UNAME_MACHINE_ARCH}-unknown ;; + esac + # The Operating System including object format, if it has switched + # to ELF recently, or will in the future. + case "${UNAME_MACHINE_ARCH}" in + arm*|i386|m68k|ns32k|sh3*|sparc|vax) + eval $set_cc_for_build + if echo __ELF__ | $CC_FOR_BUILD -E - 2>/dev/null \ + | grep __ELF__ >/dev/null + then + # Once all utilities can be ECOFF (netbsdecoff) or a.out (netbsdaout). + # Return netbsd for either. FIX? + os=netbsd + else + os=netbsdelf + fi + ;; + *) + os=netbsd + ;; + esac + # The OS release + release=`echo ${UNAME_RELEASE}|sed -e 's/[-_].*/\./'` + # Since CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM: + # contains redundant information, the shorter form: + # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM is used. + echo "${machine}-${os}${release}" + exit 0 ;; + amiga:OpenBSD:*:*) + echo m68k-unknown-openbsd${UNAME_RELEASE} + exit 0 ;; + arc:OpenBSD:*:*) + echo mipsel-unknown-openbsd${UNAME_RELEASE} + exit 0 ;; + hp300:OpenBSD:*:*) + echo m68k-unknown-openbsd${UNAME_RELEASE} + exit 0 ;; + mac68k:OpenBSD:*:*) + echo m68k-unknown-openbsd${UNAME_RELEASE} + exit 0 ;; + macppc:OpenBSD:*:*) + echo powerpc-unknown-openbsd${UNAME_RELEASE} + exit 0 ;; + mvme68k:OpenBSD:*:*) + echo m68k-unknown-openbsd${UNAME_RELEASE} + exit 0 ;; + mvme88k:OpenBSD:*:*) + echo m88k-unknown-openbsd${UNAME_RELEASE} + exit 0 ;; + mvmeppc:OpenBSD:*:*) + echo powerpc-unknown-openbsd${UNAME_RELEASE} + exit 0 ;; + pmax:OpenBSD:*:*) + echo mipsel-unknown-openbsd${UNAME_RELEASE} + exit 0 ;; + sgi:OpenBSD:*:*) + echo mipseb-unknown-openbsd${UNAME_RELEASE} + exit 0 ;; + sun3:OpenBSD:*:*) + echo m68k-unknown-openbsd${UNAME_RELEASE} + exit 0 ;; + wgrisc:OpenBSD:*:*) + echo mipsel-unknown-openbsd${UNAME_RELEASE} + exit 0 ;; + *:OpenBSD:*:*) + echo ${UNAME_MACHINE}-unknown-openbsd${UNAME_RELEASE} + exit 0 ;; + alpha:OSF1:*:*) + if test $UNAME_RELEASE = "V4.0"; then + UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $3}'` + fi + # A Vn.n version is a released version. + # A Tn.n version is a released field test version. + # A Xn.n version is an unreleased experimental baselevel. + # 1.2 uses "1.2" for uname -r. + cat <$dummy.s + .data +\$Lformat: + .byte 37,100,45,37,120,10,0 # "%d-%x\n" + + .text + .globl main + .align 4 + .ent main +main: + .frame \$30,16,\$26,0 + ldgp \$29,0(\$27) + .prologue 1 + .long 0x47e03d80 # implver \$0 + lda \$2,-1 + .long 0x47e20c21 # amask \$2,\$1 + lda \$16,\$Lformat + mov \$0,\$17 + not \$1,\$18 + jsr \$26,printf + ldgp \$29,0(\$26) + mov 0,\$16 + jsr \$26,exit + .end main +EOF + eval $set_cc_for_build + $CC_FOR_BUILD $dummy.s -o $dummy 2>/dev/null + if test "$?" = 0 ; then + case `./$dummy` in + 0-0) + UNAME_MACHINE="alpha" + ;; + 1-0) + UNAME_MACHINE="alphaev5" + ;; + 1-1) + UNAME_MACHINE="alphaev56" + ;; + 1-101) + UNAME_MACHINE="alphapca56" + ;; + 2-303) + UNAME_MACHINE="alphaev6" + ;; + 2-307) + UNAME_MACHINE="alphaev67" + ;; + 2-1307) + UNAME_MACHINE="alphaev68" + ;; + esac + fi + rm -f $dummy.s $dummy + echo ${UNAME_MACHINE}-dec-osf`echo ${UNAME_RELEASE} | sed -e 's/^[VTX]//' | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` + exit 0 ;; + Alpha\ *:Windows_NT*:*) + # How do we know it's Interix rather than the generic POSIX subsystem? + # Should we change UNAME_MACHINE based on the output of uname instead + # of the specific Alpha model? + echo alpha-pc-interix + exit 0 ;; + 21064:Windows_NT:50:3) + echo alpha-dec-winnt3.5 + exit 0 ;; + Amiga*:UNIX_System_V:4.0:*) + echo m68k-unknown-sysv4 + exit 0;; + *:[Aa]miga[Oo][Ss]:*:*) + echo ${UNAME_MACHINE}-unknown-amigaos + exit 0 ;; + *:[Mm]orph[Oo][Ss]:*:*) + echo ${UNAME_MACHINE}-unknown-morphos + exit 0 ;; + *:OS/390:*:*) + echo i370-ibm-openedition + exit 0 ;; + arm:RISC*:1.[012]*:*|arm:riscix:1.[012]*:*) + echo arm-acorn-riscix${UNAME_RELEASE} + exit 0;; + SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*) + echo hppa1.1-hitachi-hiuxmpp + exit 0;; + Pyramid*:OSx*:*:* | MIS*:OSx*:*:* | MIS*:SMP_DC-OSx*:*:*) + # akee@wpdis03.wpafb.af.mil (Earle F. Ake) contributed MIS and NILE. + if test "`(/bin/universe) 2>/dev/null`" = att ; then + echo pyramid-pyramid-sysv3 + else + echo pyramid-pyramid-bsd + fi + exit 0 ;; + NILE*:*:*:dcosx) + echo pyramid-pyramid-svr4 + exit 0 ;; + sun4H:SunOS:5.*:*) + echo sparc-hal-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit 0 ;; + sun4*:SunOS:5.*:* | tadpole*:SunOS:5.*:*) + echo sparc-sun-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit 0 ;; + i86pc:SunOS:5.*:*) + echo i386-pc-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit 0 ;; + sun4*:SunOS:6*:*) + # According to config.sub, this is the proper way to canonicalize + # SunOS6. Hard to guess exactly what SunOS6 will be like, but + # it's likely to be more like Solaris than SunOS4. + echo sparc-sun-solaris3`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit 0 ;; + sun4*:SunOS:*:*) + case "`/usr/bin/arch -k`" in + Series*|S4*) + UNAME_RELEASE=`uname -v` + ;; + esac + # Japanese Language versions have a version number like `4.1.3-JL'. + echo sparc-sun-sunos`echo ${UNAME_RELEASE}|sed -e 's/-/_/'` + exit 0 ;; + sun3*:SunOS:*:*) + echo m68k-sun-sunos${UNAME_RELEASE} + exit 0 ;; + sun*:*:4.2BSD:*) + UNAME_RELEASE=`(head -1 /etc/motd | awk '{print substr($5,1,3)}') 2>/dev/null` + test "x${UNAME_RELEASE}" = "x" && UNAME_RELEASE=3 + case "`/bin/arch`" in + sun3) + echo m68k-sun-sunos${UNAME_RELEASE} + ;; + sun4) + echo sparc-sun-sunos${UNAME_RELEASE} + ;; + esac + exit 0 ;; + aushp:SunOS:*:*) + echo sparc-auspex-sunos${UNAME_RELEASE} + exit 0 ;; + # The situation for MiNT is a little confusing. The machine name + # can be virtually everything (everything which is not + # "atarist" or "atariste" at least should have a processor + # > m68000). The system name ranges from "MiNT" over "FreeMiNT" + # to the lowercase version "mint" (or "freemint"). Finally + # the system name "TOS" denotes a system which is actually not + # MiNT. But MiNT is downward compatible to TOS, so this should + # be no problem. + atarist[e]:*MiNT:*:* | atarist[e]:*mint:*:* | atarist[e]:*TOS:*:*) + echo m68k-atari-mint${UNAME_RELEASE} + exit 0 ;; + atari*:*MiNT:*:* | atari*:*mint:*:* | atarist[e]:*TOS:*:*) + echo m68k-atari-mint${UNAME_RELEASE} + exit 0 ;; + *falcon*:*MiNT:*:* | *falcon*:*mint:*:* | *falcon*:*TOS:*:*) + echo m68k-atari-mint${UNAME_RELEASE} + exit 0 ;; + milan*:*MiNT:*:* | milan*:*mint:*:* | *milan*:*TOS:*:*) + echo m68k-milan-mint${UNAME_RELEASE} + exit 0 ;; + hades*:*MiNT:*:* | hades*:*mint:*:* | *hades*:*TOS:*:*) + echo m68k-hades-mint${UNAME_RELEASE} + exit 0 ;; + *:*MiNT:*:* | *:*mint:*:* | *:*TOS:*:*) + echo m68k-unknown-mint${UNAME_RELEASE} + exit 0 ;; + powerpc:machten:*:*) + echo powerpc-apple-machten${UNAME_RELEASE} + exit 0 ;; + RISC*:Mach:*:*) + echo mips-dec-mach_bsd4.3 + exit 0 ;; + RISC*:ULTRIX:*:*) + echo mips-dec-ultrix${UNAME_RELEASE} + exit 0 ;; + VAX*:ULTRIX*:*:*) + echo vax-dec-ultrix${UNAME_RELEASE} + exit 0 ;; + 2020:CLIX:*:* | 2430:CLIX:*:*) + echo clipper-intergraph-clix${UNAME_RELEASE} + exit 0 ;; + mips:*:*:UMIPS | mips:*:*:RISCos) + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c +#ifdef __cplusplus +#include /* for printf() prototype */ + int main (int argc, char *argv[]) { +#else + int main (argc, argv) int argc; char *argv[]; { +#endif + #if defined (host_mips) && defined (MIPSEB) + #if defined (SYSTYPE_SYSV) + printf ("mips-mips-riscos%ssysv\n", argv[1]); exit (0); + #endif + #if defined (SYSTYPE_SVR4) + printf ("mips-mips-riscos%ssvr4\n", argv[1]); exit (0); + #endif + #if defined (SYSTYPE_BSD43) || defined(SYSTYPE_BSD) + printf ("mips-mips-riscos%sbsd\n", argv[1]); exit (0); + #endif + #endif + exit (-1); + } +EOF + $CC_FOR_BUILD $dummy.c -o $dummy \ + && ./$dummy `echo "${UNAME_RELEASE}" | sed -n 's/\([0-9]*\).*/\1/p'` \ + && rm -f $dummy.c $dummy && exit 0 + rm -f $dummy.c $dummy + echo mips-mips-riscos${UNAME_RELEASE} + exit 0 ;; + Motorola:PowerMAX_OS:*:*) + echo powerpc-motorola-powermax + exit 0 ;; + Night_Hawk:Power_UNIX:*:*) + echo powerpc-harris-powerunix + exit 0 ;; + m88k:CX/UX:7*:*) + echo m88k-harris-cxux7 + exit 0 ;; + m88k:*:4*:R4*) + echo m88k-motorola-sysv4 + exit 0 ;; + m88k:*:3*:R3*) + echo m88k-motorola-sysv3 + exit 0 ;; + AViiON:dgux:*:*) + # DG/UX returns AViiON for all architectures + UNAME_PROCESSOR=`/usr/bin/uname -p` + if [ $UNAME_PROCESSOR = mc88100 ] || [ $UNAME_PROCESSOR = mc88110 ] + then + if [ ${TARGET_BINARY_INTERFACE}x = m88kdguxelfx ] || \ + [ ${TARGET_BINARY_INTERFACE}x = x ] + then + echo m88k-dg-dgux${UNAME_RELEASE} + else + echo m88k-dg-dguxbcs${UNAME_RELEASE} + fi + else + echo i586-dg-dgux${UNAME_RELEASE} + fi + exit 0 ;; + M88*:DolphinOS:*:*) # DolphinOS (SVR3) + echo m88k-dolphin-sysv3 + exit 0 ;; + M88*:*:R3*:*) + # Delta 88k system running SVR3 + echo m88k-motorola-sysv3 + exit 0 ;; + XD88*:*:*:*) # Tektronix XD88 system running UTekV (SVR3) + echo m88k-tektronix-sysv3 + exit 0 ;; + Tek43[0-9][0-9]:UTek:*:*) # Tektronix 4300 system running UTek (BSD) + echo m68k-tektronix-bsd + exit 0 ;; + *:IRIX*:*:*) + echo mips-sgi-irix`echo ${UNAME_RELEASE}|sed -e 's/-/_/g'` + exit 0 ;; + ????????:AIX?:[12].1:2) # AIX 2.2.1 or AIX 2.1.1 is RT/PC AIX. + echo romp-ibm-aix # uname -m gives an 8 hex-code CPU id + exit 0 ;; # Note that: echo "'`uname -s`'" gives 'AIX ' + i*86:AIX:*:*) + echo i386-ibm-aix + exit 0 ;; + ia64:AIX:*:*) + if [ -x /usr/bin/oslevel ] ; then + IBM_REV=`/usr/bin/oslevel` + else + IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} + fi + echo ${UNAME_MACHINE}-ibm-aix${IBM_REV} + exit 0 ;; + *:AIX:2:3) + if grep bos325 /usr/include/stdio.h >/dev/null 2>&1; then + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + #include + + main() + { + if (!__power_pc()) + exit(1); + puts("powerpc-ibm-aix3.2.5"); + exit(0); + } +EOF + $CC_FOR_BUILD $dummy.c -o $dummy && ./$dummy && rm -f $dummy.c $dummy && exit 0 + rm -f $dummy.c $dummy + echo rs6000-ibm-aix3.2.5 + elif grep bos324 /usr/include/stdio.h >/dev/null 2>&1; then + echo rs6000-ibm-aix3.2.4 + else + echo rs6000-ibm-aix3.2 + fi + exit 0 ;; + *:AIX:*:[45]) + IBM_CPU_ID=`/usr/sbin/lsdev -C -c processor -S available | head -1 | awk '{ print $1 }'` + if /usr/sbin/lsattr -El ${IBM_CPU_ID} | grep ' POWER' >/dev/null 2>&1; then + IBM_ARCH=rs6000 + else + IBM_ARCH=powerpc + fi + if [ -x /usr/bin/oslevel ] ; then + IBM_REV=`/usr/bin/oslevel` + else + IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} + fi + echo ${IBM_ARCH}-ibm-aix${IBM_REV} + exit 0 ;; + *:AIX:*:*) + echo rs6000-ibm-aix + exit 0 ;; + ibmrt:4.4BSD:*|romp-ibm:BSD:*) + echo romp-ibm-bsd4.4 + exit 0 ;; + ibmrt:*BSD:*|romp-ibm:BSD:*) # covers RT/PC BSD and + echo romp-ibm-bsd${UNAME_RELEASE} # 4.3 with uname added to + exit 0 ;; # report: romp-ibm BSD 4.3 + *:BOSX:*:*) + echo rs6000-bull-bosx + exit 0 ;; + DPX/2?00:B.O.S.:*:*) + echo m68k-bull-sysv3 + exit 0 ;; + 9000/[34]??:4.3bsd:1.*:*) + echo m68k-hp-bsd + exit 0 ;; + hp300:4.4BSD:*:* | 9000/[34]??:4.3bsd:2.*:*) + echo m68k-hp-bsd4.4 + exit 0 ;; + 9000/[34678]??:HP-UX:*:*) + HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` + case "${UNAME_MACHINE}" in + 9000/31? ) HP_ARCH=m68000 ;; + 9000/[34]?? ) HP_ARCH=m68k ;; + 9000/[678][0-9][0-9]) + if [ -x /usr/bin/getconf ]; then + sc_cpu_version=`/usr/bin/getconf SC_CPU_VERSION 2>/dev/null` + sc_kernel_bits=`/usr/bin/getconf SC_KERNEL_BITS 2>/dev/null` + case "${sc_cpu_version}" in + 523) HP_ARCH="hppa1.0" ;; # CPU_PA_RISC1_0 + 528) HP_ARCH="hppa1.1" ;; # CPU_PA_RISC1_1 + 532) # CPU_PA_RISC2_0 + case "${sc_kernel_bits}" in + 32) HP_ARCH="hppa2.0n" ;; + 64) HP_ARCH="hppa2.0w" ;; + '') HP_ARCH="hppa2.0" ;; # HP-UX 10.20 + esac ;; + esac + fi + if [ "${HP_ARCH}" = "" ]; then + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + + #define _HPUX_SOURCE + #include + #include + + int main () + { + #if defined(_SC_KERNEL_BITS) + long bits = sysconf(_SC_KERNEL_BITS); + #endif + long cpu = sysconf (_SC_CPU_VERSION); + + switch (cpu) + { + case CPU_PA_RISC1_0: puts ("hppa1.0"); break; + case CPU_PA_RISC1_1: puts ("hppa1.1"); break; + case CPU_PA_RISC2_0: + #if defined(_SC_KERNEL_BITS) + switch (bits) + { + case 64: puts ("hppa2.0w"); break; + case 32: puts ("hppa2.0n"); break; + default: puts ("hppa2.0"); break; + } break; + #else /* !defined(_SC_KERNEL_BITS) */ + puts ("hppa2.0"); break; + #endif + default: puts ("hppa1.0"); break; + } + exit (0); + } +EOF + (CCOPTS= $CC_FOR_BUILD $dummy.c -o $dummy 2>/dev/null) && HP_ARCH=`./$dummy` + if test -z "$HP_ARCH"; then HP_ARCH=hppa; fi + rm -f $dummy.c $dummy + fi ;; + esac + echo ${HP_ARCH}-hp-hpux${HPUX_REV} + exit 0 ;; + ia64:HP-UX:*:*) + HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` + echo ia64-hp-hpux${HPUX_REV} + exit 0 ;; + 3050*:HI-UX:*:*) + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + #include + int + main () + { + long cpu = sysconf (_SC_CPU_VERSION); + /* The order matters, because CPU_IS_HP_MC68K erroneously returns + true for CPU_PA_RISC1_0. CPU_IS_PA_RISC returns correct + results, however. */ + if (CPU_IS_PA_RISC (cpu)) + { + switch (cpu) + { + case CPU_PA_RISC1_0: puts ("hppa1.0-hitachi-hiuxwe2"); break; + case CPU_PA_RISC1_1: puts ("hppa1.1-hitachi-hiuxwe2"); break; + case CPU_PA_RISC2_0: puts ("hppa2.0-hitachi-hiuxwe2"); break; + default: puts ("hppa-hitachi-hiuxwe2"); break; + } + } + else if (CPU_IS_HP_MC68K (cpu)) + puts ("m68k-hitachi-hiuxwe2"); + else puts ("unknown-hitachi-hiuxwe2"); + exit (0); + } +EOF + $CC_FOR_BUILD $dummy.c -o $dummy && ./$dummy && rm -f $dummy.c $dummy && exit 0 + rm -f $dummy.c $dummy + echo unknown-hitachi-hiuxwe2 + exit 0 ;; + 9000/7??:4.3bsd:*:* | 9000/8?[79]:4.3bsd:*:* ) + echo hppa1.1-hp-bsd + exit 0 ;; + 9000/8??:4.3bsd:*:*) + echo hppa1.0-hp-bsd + exit 0 ;; + *9??*:MPE/iX:*:* | *3000*:MPE/iX:*:*) + echo hppa1.0-hp-mpeix + exit 0 ;; + hp7??:OSF1:*:* | hp8?[79]:OSF1:*:* ) + echo hppa1.1-hp-osf + exit 0 ;; + hp8??:OSF1:*:*) + echo hppa1.0-hp-osf + exit 0 ;; + i*86:OSF1:*:*) + if [ -x /usr/sbin/sysversion ] ; then + echo ${UNAME_MACHINE}-unknown-osf1mk + else + echo ${UNAME_MACHINE}-unknown-osf1 + fi + exit 0 ;; + parisc*:Lites*:*:*) + echo hppa1.1-hp-lites + exit 0 ;; + C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*) + echo c1-convex-bsd + exit 0 ;; + C2*:ConvexOS:*:* | convex:ConvexOS:C2*:*) + if getsysinfo -f scalar_acc + then echo c32-convex-bsd + else echo c2-convex-bsd + fi + exit 0 ;; + C34*:ConvexOS:*:* | convex:ConvexOS:C34*:*) + echo c34-convex-bsd + exit 0 ;; + C38*:ConvexOS:*:* | convex:ConvexOS:C38*:*) + echo c38-convex-bsd + exit 0 ;; + C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*) + echo c4-convex-bsd + exit 0 ;; + CRAY*X-MP:*:*:*) + echo xmp-cray-unicos + exit 0 ;; + CRAY*Y-MP:*:*:*) + echo ymp-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit 0 ;; + CRAY*[A-Z]90:*:*:*) + echo ${UNAME_MACHINE}-cray-unicos${UNAME_RELEASE} \ + | sed -e 's/CRAY.*\([A-Z]90\)/\1/' \ + -e y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/ \ + -e 's/\.[^.]*$/.X/' + exit 0 ;; + CRAY*TS:*:*:*) + echo t90-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit 0 ;; + CRAY*T3D:*:*:*) + echo alpha-cray-unicosmk${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit 0 ;; + CRAY*T3E:*:*:*) + echo alphaev5-cray-unicosmk${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit 0 ;; + CRAY*SV1:*:*:*) + echo sv1-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit 0 ;; + CRAY-2:*:*:*) + echo cray2-cray-unicos + exit 0 ;; + F30[01]:UNIX_System_V:*:* | F700:UNIX_System_V:*:*) + FUJITSU_PROC=`uname -m | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` + FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` + FUJITSU_REL=`echo ${UNAME_RELEASE} | sed -e 's/ /_/'` + echo "${FUJITSU_PROC}-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" + exit 0 ;; + i*86:BSD/386:*:* | i*86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*) + echo ${UNAME_MACHINE}-pc-bsdi${UNAME_RELEASE} + exit 0 ;; + sparc*:BSD/OS:*:*) + echo sparc-unknown-bsdi${UNAME_RELEASE} + exit 0 ;; + *:BSD/OS:*:*) + echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE} + exit 0 ;; + *:FreeBSD:*:*) + echo ${UNAME_MACHINE}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` + exit 0 ;; + i*:CYGWIN*:*) + echo ${UNAME_MACHINE}-pc-cygwin + exit 0 ;; + i*:MINGW*:*) + echo ${UNAME_MACHINE}-pc-mingw32 + exit 0 ;; + i*:PW*:*) + echo ${UNAME_MACHINE}-pc-pw32 + exit 0 ;; + x86:Interix*:3*) + echo i386-pc-interix3 + exit 0 ;; + i*:Windows_NT*:* | Pentium*:Windows_NT*:*) + # How do we know it's Interix rather than the generic POSIX subsystem? + # It also conflicts with pre-2.0 versions of AT&T UWIN. Should we + # UNAME_MACHINE based on the output of uname instead of i386? + echo i386-pc-interix + exit 0 ;; + i*:UWIN*:*) + echo ${UNAME_MACHINE}-pc-uwin + exit 0 ;; + p*:CYGWIN*:*) + echo powerpcle-unknown-cygwin + exit 0 ;; + prep*:SunOS:5.*:*) + echo powerpcle-unknown-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit 0 ;; + *:GNU:*:*) + echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-gnu`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'` + exit 0 ;; + i*86:Minix:*:*) + echo ${UNAME_MACHINE}-pc-minix + exit 0 ;; + arm*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit 0 ;; + ia64:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux + exit 0 ;; + m68*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit 0 ;; + mips:Linux:*:*) + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + #undef CPU + #undef mips + #undef mipsel + #if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL) + CPU=mipsel + #else + #if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB) + CPU=mips + #else + CPU= + #endif + #endif +EOF + eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep ^CPU=` + rm -f $dummy.c + test x"${CPU}" != x && echo "${CPU}-pc-linux-gnu" && exit 0 + ;; + ppc:Linux:*:*) + echo powerpc-unknown-linux-gnu + exit 0 ;; + ppc64:Linux:*:*) + echo powerpc64-unknown-linux-gnu + exit 0 ;; + alpha:Linux:*:*) + case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in + EV5) UNAME_MACHINE=alphaev5 ;; + EV56) UNAME_MACHINE=alphaev56 ;; + PCA56) UNAME_MACHINE=alphapca56 ;; + PCA57) UNAME_MACHINE=alphapca56 ;; + EV6) UNAME_MACHINE=alphaev6 ;; + EV67) UNAME_MACHINE=alphaev67 ;; + EV68*) UNAME_MACHINE=alphaev68 ;; + esac + objdump --private-headers /bin/sh | grep ld.so.1 >/dev/null + if test "$?" = 0 ; then LIBC="libc1" ; else LIBC="" ; fi + echo ${UNAME_MACHINE}-unknown-linux-gnu${LIBC} + exit 0 ;; + parisc:Linux:*:* | hppa:Linux:*:*) + # Look for CPU level + case `grep '^cpu[^a-z]*:' /proc/cpuinfo 2>/dev/null | cut -d' ' -f2` in + PA7*) echo hppa1.1-unknown-linux-gnu ;; + PA8*) echo hppa2.0-unknown-linux-gnu ;; + *) echo hppa-unknown-linux-gnu ;; + esac + exit 0 ;; + parisc64:Linux:*:* | hppa64:Linux:*:*) + echo hppa64-unknown-linux-gnu + exit 0 ;; + s390:Linux:*:* | s390x:Linux:*:*) + echo ${UNAME_MACHINE}-ibm-linux + exit 0 ;; + sh*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit 0 ;; + sparc:Linux:*:* | sparc64:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit 0 ;; + x86_64:Linux:*:*) + echo x86_64-unknown-linux-gnu + exit 0 ;; + i*86:Linux:*:*) + # The BFD linker knows what the default object file format is, so + # first see if it will tell us. cd to the root directory to prevent + # problems with other programs or directories called `ld' in the path. + ld_supported_targets=`cd /; ld --help 2>&1 \ + | sed -ne '/supported targets:/!d + s/[ ][ ]*/ /g + s/.*supported targets: *// + s/ .*// + p'` + case "$ld_supported_targets" in + elf32-i386) + TENTATIVE="${UNAME_MACHINE}-pc-linux-gnu" + ;; + a.out-i386-linux) + echo "${UNAME_MACHINE}-pc-linux-gnuaout" + exit 0 ;; + coff-i386) + echo "${UNAME_MACHINE}-pc-linux-gnucoff" + exit 0 ;; + "") + # Either a pre-BFD a.out linker (linux-gnuoldld) or + # one that does not give us useful --help. + echo "${UNAME_MACHINE}-pc-linux-gnuoldld" + exit 0 ;; + esac + # Determine whether the default compiler is a.out or elf + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + #include + #ifdef __ELF__ + # ifdef __GLIBC__ + # if __GLIBC__ >= 2 + LIBC=gnu + # else + LIBC=gnulibc1 + # endif + # else + LIBC=gnulibc1 + # endif + #else + LIBC=gnuaout + #endif +EOF + eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep ^LIBC=` + rm -f $dummy.c + test x"${LIBC}" != x && echo "${UNAME_MACHINE}-pc-linux-${LIBC}" && exit 0 + test x"${TENTATIVE}" != x && echo "${TENTATIVE}" && exit 0 + ;; + i*86:DYNIX/ptx:4*:*) + # ptx 4.0 does uname -s correctly, with DYNIX/ptx in there. + # earlier versions are messed up and put the nodename in both + # sysname and nodename. + echo i386-sequent-sysv4 + exit 0 ;; + i*86:UNIX_SV:4.2MP:2.*) + # Unixware is an offshoot of SVR4, but it has its own version + # number series starting with 2... + # I am not positive that other SVR4 systems won't match this, + # I just have to hope. -- rms. + # Use sysv4.2uw... so that sysv4* matches it. + echo ${UNAME_MACHINE}-pc-sysv4.2uw${UNAME_VERSION} + exit 0 ;; + i*86:*:4.*:* | i*86:SYSTEM_V:4.*:*) + UNAME_REL=`echo ${UNAME_RELEASE} | sed 's/\/MP$//'` + if grep Novell /usr/include/link.h >/dev/null 2>/dev/null; then + echo ${UNAME_MACHINE}-univel-sysv${UNAME_REL} + else + echo ${UNAME_MACHINE}-pc-sysv${UNAME_REL} + fi + exit 0 ;; + i*86:*:5:[78]*) + case `/bin/uname -X | grep "^Machine"` in + *486*) UNAME_MACHINE=i486 ;; + *Pentium) UNAME_MACHINE=i586 ;; + *Pent*|*Celeron) UNAME_MACHINE=i686 ;; + esac + echo ${UNAME_MACHINE}-unknown-sysv${UNAME_RELEASE}${UNAME_SYSTEM}${UNAME_VERSION} + exit 0 ;; + i*86:*:3.2:*) + if test -f /usr/options/cb.name; then + UNAME_REL=`sed -n 's/.*Version //p' /dev/null >/dev/null ; then + UNAME_REL=`(/bin/uname -X|egrep Release|sed -e 's/.*= //')` + (/bin/uname -X|egrep i80486 >/dev/null) && UNAME_MACHINE=i486 + (/bin/uname -X|egrep '^Machine.*Pentium' >/dev/null) \ + && UNAME_MACHINE=i586 + (/bin/uname -X|egrep '^Machine.*Pent ?II' >/dev/null) \ + && UNAME_MACHINE=i686 + (/bin/uname -X|egrep '^Machine.*Pentium Pro' >/dev/null) \ + && UNAME_MACHINE=i686 + echo ${UNAME_MACHINE}-pc-sco$UNAME_REL + else + echo ${UNAME_MACHINE}-pc-sysv32 + fi + exit 0 ;; + i*86:*DOS:*:*) + echo ${UNAME_MACHINE}-pc-msdosdjgpp + exit 0 ;; + pc:*:*:*) + # Left here for compatibility: + # uname -m prints for DJGPP always 'pc', but it prints nothing about + # the processor, so we play safe by assuming i386. + echo i386-pc-msdosdjgpp + exit 0 ;; + Intel:Mach:3*:*) + echo i386-pc-mach3 + exit 0 ;; + paragon:*:*:*) + echo i860-intel-osf1 + exit 0 ;; + i860:*:4.*:*) # i860-SVR4 + if grep Stardent /usr/include/sys/uadmin.h >/dev/null 2>&1 ; then + echo i860-stardent-sysv${UNAME_RELEASE} # Stardent Vistra i860-SVR4 + else # Add other i860-SVR4 vendors below as they are discovered. + echo i860-unknown-sysv${UNAME_RELEASE} # Unknown i860-SVR4 + fi + exit 0 ;; + mini*:CTIX:SYS*5:*) + # "miniframe" + echo m68010-convergent-sysv + exit 0 ;; + M68*:*:R3V[567]*:*) + test -r /sysV68 && echo 'm68k-motorola-sysv' && exit 0 ;; + 3[34]??:*:4.0:3.0 | 3[34]??A:*:4.0:3.0 | 3[34]??,*:*:4.0:3.0 | 3[34]??/*:*:4.0:3.0 | 4850:*:4.0:3.0 | SKA40:*:4.0:3.0) + OS_REL='' + test -r /etc/.relid \ + && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` + /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ + && echo i486-ncr-sysv4.3${OS_REL} && exit 0 + /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \ + && echo i586-ncr-sysv4.3${OS_REL} && exit 0 ;; + 3[34]??:*:4.0:* | 3[34]??,*:*:4.0:*) + /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ + && echo i486-ncr-sysv4 && exit 0 ;; + m68*:LynxOS:2.*:* | m68*:LynxOS:3.0*:*) + echo m68k-unknown-lynxos${UNAME_RELEASE} + exit 0 ;; + mc68030:UNIX_System_V:4.*:*) + echo m68k-atari-sysv4 + exit 0 ;; + i*86:LynxOS:2.*:* | i*86:LynxOS:3.[01]*:* | i*86:LynxOS:4.0*:*) + echo i386-unknown-lynxos${UNAME_RELEASE} + exit 0 ;; + TSUNAMI:LynxOS:2.*:*) + echo sparc-unknown-lynxos${UNAME_RELEASE} + exit 0 ;; + rs6000:LynxOS:2.*:*) + echo rs6000-unknown-lynxos${UNAME_RELEASE} + exit 0 ;; + PowerPC:LynxOS:2.*:* | PowerPC:LynxOS:3.[01]*:* | PowerPC:LynxOS:4.0*:*) + echo powerpc-unknown-lynxos${UNAME_RELEASE} + exit 0 ;; + SM[BE]S:UNIX_SV:*:*) + echo mips-dde-sysv${UNAME_RELEASE} + exit 0 ;; + RM*:ReliantUNIX-*:*:*) + echo mips-sni-sysv4 + exit 0 ;; + RM*:SINIX-*:*:*) + echo mips-sni-sysv4 + exit 0 ;; + *:SINIX-*:*:*) + if uname -p 2>/dev/null >/dev/null ; then + UNAME_MACHINE=`(uname -p) 2>/dev/null` + echo ${UNAME_MACHINE}-sni-sysv4 + else + echo ns32k-sni-sysv + fi + exit 0 ;; + PENTIUM:*:4.0*:*) # Unisys `ClearPath HMP IX 4000' SVR4/MP effort + # says + echo i586-unisys-sysv4 + exit 0 ;; + *:UNIX_System_V:4*:FTX*) + # From Gerald Hewes . + # How about differentiating between stratus architectures? -djm + echo hppa1.1-stratus-sysv4 + exit 0 ;; + *:*:*:FTX*) + # From seanf@swdc.stratus.com. + echo i860-stratus-sysv4 + exit 0 ;; + *:VOS:*:*) + # From Paul.Green@stratus.com. + echo hppa1.1-stratus-vos + exit 0 ;; + mc68*:A/UX:*:*) + echo m68k-apple-aux${UNAME_RELEASE} + exit 0 ;; + news*:NEWS-OS:6*:*) + echo mips-sony-newsos6 + exit 0 ;; + R[34]000:*System_V*:*:* | R4000:UNIX_SYSV:*:* | R*000:UNIX_SV:*:*) + if [ -d /usr/nec ]; then + echo mips-nec-sysv${UNAME_RELEASE} + else + echo mips-unknown-sysv${UNAME_RELEASE} + fi + exit 0 ;; + BeBox:BeOS:*:*) # BeOS running on hardware made by Be, PPC only. + echo powerpc-be-beos + exit 0 ;; + BeMac:BeOS:*:*) # BeOS running on Mac or Mac clone, PPC only. + echo powerpc-apple-beos + exit 0 ;; + BePC:BeOS:*:*) # BeOS running on Intel PC compatible. + echo i586-pc-beos + exit 0 ;; + SX-4:SUPER-UX:*:*) + echo sx4-nec-superux${UNAME_RELEASE} + exit 0 ;; + SX-5:SUPER-UX:*:*) + echo sx5-nec-superux${UNAME_RELEASE} + exit 0 ;; + Power*:Rhapsody:*:*) + echo powerpc-apple-rhapsody${UNAME_RELEASE} + exit 0 ;; + *:Rhapsody:*:*) + echo ${UNAME_MACHINE}-apple-rhapsody${UNAME_RELEASE} + exit 0 ;; + *:Darwin:*:*) + echo `uname -p`-apple-darwin${UNAME_RELEASE} + exit 0 ;; + *:procnto*:*:* | *:QNX:[0123456789]*:*) + if test "${UNAME_MACHINE}" = "x86pc"; then + UNAME_MACHINE=pc + fi + echo `uname -p`-${UNAME_MACHINE}-nto-qnx + exit 0 ;; + *:QNX:*:4*) + echo i386-pc-qnx + exit 0 ;; + NSR-[GKLNPTVW]:NONSTOP_KERNEL:*:*) + echo nsr-tandem-nsk${UNAME_RELEASE} + exit 0 ;; + *:NonStop-UX:*:*) + echo mips-compaq-nonstopux + exit 0 ;; + BS2000:POSIX*:*:*) + echo bs2000-siemens-sysv + exit 0 ;; + DS/*:UNIX_System_V:*:*) + echo ${UNAME_MACHINE}-${UNAME_SYSTEM}-${UNAME_RELEASE} + exit 0 ;; + *:Plan9:*:*) + # "uname -m" is not consistent, so use $cputype instead. 386 + # is converted to i386 for consistency with other x86 + # operating systems. + if test "$cputype" = "386"; then + UNAME_MACHINE=i386 + else + UNAME_MACHINE="$cputype" + fi + echo ${UNAME_MACHINE}-unknown-plan9 + exit 0 ;; + i*86:OS/2:*:*) + # If we were able to find `uname', then EMX Unix compatibility + # is probably installed. + echo ${UNAME_MACHINE}-pc-os2-emx + exit 0 ;; + *:TOPS-10:*:*) + echo pdp10-unknown-tops10 + exit 0 ;; + *:TENEX:*:*) + echo pdp10-unknown-tenex + exit 0 ;; + KS10:TOPS-20:*:* | KL10:TOPS-20:*:* | TYPE4:TOPS-20:*:*) + echo pdp10-dec-tops20 + exit 0 ;; + XKL-1:TOPS-20:*:* | TYPE5:TOPS-20:*:*) + echo pdp10-xkl-tops20 + exit 0 ;; + *:TOPS-20:*:*) + echo pdp10-unknown-tops20 + exit 0 ;; + *:ITS:*:*) + echo pdp10-unknown-its + exit 0 ;; + i*86:XTS-300:*:STOP) + echo ${UNAME_MACHINE}-unknown-stop + exit 0 ;; + i*86:atheos:*:*) + echo ${UNAME_MACHINE}-unknown-atheos + exit 0 ;; +esac + +#echo '(No uname command or uname output not recognized.)' 1>&2 +#echo "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" 1>&2 + +eval $set_cc_for_build +cat >$dummy.c < +# include +#endif +main () +{ +#if defined (sony) +#if defined (MIPSEB) + /* BFD wants "bsd" instead of "newsos". Perhaps BFD should be changed, + I don't know.... */ + printf ("mips-sony-bsd\n"); exit (0); +#else +#include + printf ("m68k-sony-newsos%s\n", +#ifdef NEWSOS4 + "4" +#else + "" +#endif + ); exit (0); +#endif +#endif + +#if defined (__arm) && defined (__acorn) && defined (__unix) + printf ("arm-acorn-riscix"); exit (0); +#endif + +#if defined (hp300) && !defined (hpux) + printf ("m68k-hp-bsd\n"); exit (0); +#endif + +#if defined (NeXT) +#if !defined (__ARCHITECTURE__) +#define __ARCHITECTURE__ "m68k" +#endif + int version; + version=`(hostinfo | sed -n 's/.*NeXT Mach \([0-9]*\).*/\1/p') 2>/dev/null`; + if (version < 4) + printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version); + else + printf ("%s-next-openstep%d\n", __ARCHITECTURE__, version); + exit (0); +#endif + +#if defined (MULTIMAX) || defined (n16) +#if defined (UMAXV) + printf ("ns32k-encore-sysv\n"); exit (0); +#else +#if defined (CMU) + printf ("ns32k-encore-mach\n"); exit (0); +#else + printf ("ns32k-encore-bsd\n"); exit (0); +#endif +#endif +#endif + +#if defined (__386BSD__) + printf ("i386-pc-bsd\n"); exit (0); +#endif + +#if defined (sequent) +#if defined (i386) + printf ("i386-sequent-dynix\n"); exit (0); +#endif +#if defined (ns32000) + printf ("ns32k-sequent-dynix\n"); exit (0); +#endif +#endif + +#if defined (_SEQUENT_) + struct utsname un; + + uname(&un); + + if (strncmp(un.version, "V2", 2) == 0) { + printf ("i386-sequent-ptx2\n"); exit (0); + } + if (strncmp(un.version, "V1", 2) == 0) { /* XXX is V1 correct? */ + printf ("i386-sequent-ptx1\n"); exit (0); + } + printf ("i386-sequent-ptx\n"); exit (0); + +#endif + +#if defined (vax) +# if !defined (ultrix) +# include +# if defined (BSD) +# if BSD == 43 + printf ("vax-dec-bsd4.3\n"); exit (0); +# else +# if BSD == 199006 + printf ("vax-dec-bsd4.3reno\n"); exit (0); +# else + printf ("vax-dec-bsd\n"); exit (0); +# endif +# endif +# else + printf ("vax-dec-bsd\n"); exit (0); +# endif +# else + printf ("vax-dec-ultrix\n"); exit (0); +# endif +#endif + +#if defined (alliant) && defined (i860) + printf ("i860-alliant-bsd\n"); exit (0); +#endif + + exit (1); +} +EOF + +$CC_FOR_BUILD $dummy.c -o $dummy 2>/dev/null && ./$dummy && rm -f $dummy.c $dummy && exit 0 +rm -f $dummy.c $dummy + +# Apollos put the system type in the environment. + +test -d /usr/apollo && { echo ${ISP}-apollo-${SYSTYPE}; exit 0; } + +# Convex versions that predate uname can use getsysinfo(1) + +if [ -x /usr/convex/getsysinfo ] +then + case `getsysinfo -f cpu_type` in + c1*) + echo c1-convex-bsd + exit 0 ;; + c2*) + if getsysinfo -f scalar_acc + then echo c32-convex-bsd + else echo c2-convex-bsd + fi + exit 0 ;; + c34*) + echo c34-convex-bsd + exit 0 ;; + c38*) + echo c38-convex-bsd + exit 0 ;; + c4*) + echo c4-convex-bsd + exit 0 ;; + esac +fi + +cat >&2 < in order to provide the needed +information to handle your system. + +config.guess timestamp = $timestamp + +uname -m = `(uname -m) 2>/dev/null || echo unknown` +uname -r = `(uname -r) 2>/dev/null || echo unknown` +uname -s = `(uname -s) 2>/dev/null || echo unknown` +uname -v = `(uname -v) 2>/dev/null || echo unknown` + +/usr/bin/uname -p = `(/usr/bin/uname -p) 2>/dev/null` +/bin/uname -X = `(/bin/uname -X) 2>/dev/null` + +hostinfo = `(hostinfo) 2>/dev/null` +/bin/universe = `(/bin/universe) 2>/dev/null` +/usr/bin/arch -k = `(/usr/bin/arch -k) 2>/dev/null` +/bin/arch = `(/bin/arch) 2>/dev/null` +/usr/bin/oslevel = `(/usr/bin/oslevel) 2>/dev/null` +/usr/convex/getsysinfo = `(/usr/convex/getsysinfo) 2>/dev/null` + +UNAME_MACHINE = ${UNAME_MACHINE} +UNAME_RELEASE = ${UNAME_RELEASE} +UNAME_SYSTEM = ${UNAME_SYSTEM} +UNAME_VERSION = ${UNAME_VERSION} +EOF + +exit 1 + +# Local variables: +# eval: (add-hook 'write-file-hooks 'time-stamp) +# time-stamp-start: "timestamp='" +# time-stamp-format: "%:y-%02m-%02d" +# time-stamp-end: "'" +# End: diff --git a/sim/ucsim/config.sub b/sim/ucsim/config.sub new file mode 100755 index 0000000..1657334 --- /dev/null +++ b/sim/ucsim/config.sub @@ -0,0 +1,1440 @@ +#! /bin/sh +# Configuration validation subroutine script. +# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +# 2000, 2001, 2002 Free Software Foundation, Inc. + +timestamp='2002-01-02' + +# This file is (in principle) common to ALL GNU software. +# The presence of a machine in this file suggests that SOME GNU software +# can handle that machine. It does not imply ALL GNU software can. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. + +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + +# Please send patches to . Submit a context +# diff and a properly formatted ChangeLog entry. +# +# Configuration subroutine to validate and canonicalize a configuration type. +# Supply the specified configuration type as an argument. +# If it is invalid, we print an error message on stderr and exit with code 1. +# Otherwise, we print the canonical config type on stdout and succeed. + +# This file is supposed to be the same for all GNU packages +# and recognize all the CPU types, system types and aliases +# that are meaningful with *any* GNU software. +# Each package is responsible for reporting which valid configurations +# it does not support. The user should be able to distinguish +# a failure to support a valid configuration from a meaningless +# configuration. + +# The goal of this file is to map all the various variations of a given +# machine specification into a single specification in the form: +# CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM +# or in some cases, the newer four-part form: +# CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM +# It is wrong to echo any other type of specification. + +me=`echo "$0" | sed -e 's,.*/,,'` + +usage="\ +Usage: $0 [OPTION] CPU-MFR-OPSYS + $0 [OPTION] ALIAS + +Canonicalize a configuration name. + +Operation modes: + -h, --help print this help, then exit + -t, --time-stamp print date of last modification, then exit + -v, --version print version number, then exit + +Report bugs and patches to ." + +version="\ +GNU config.sub ($timestamp) + +Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 +Free Software Foundation, Inc. + +This is free software; see the source for copying conditions. There is NO +warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." + +help=" +Try \`$me --help' for more information." + +# Parse command line +while test $# -gt 0 ; do + case $1 in + --time-stamp | --time* | -t ) + echo "$timestamp" ; exit 0 ;; + --version | -v ) + echo "$version" ; exit 0 ;; + --help | --h* | -h ) + echo "$usage"; exit 0 ;; + -- ) # Stop option processing + shift; break ;; + - ) # Use stdin as input. + break ;; + -* ) + echo "$me: invalid option $1$help" + exit 1 ;; + + *local*) + # First pass through any local machine types. + echo $1 + exit 0;; + + * ) + break ;; + esac +done + +case $# in + 0) echo "$me: missing argument$help" >&2 + exit 1;; + 1) ;; + *) echo "$me: too many arguments$help" >&2 + exit 1;; +esac + +# Separate what the user gave into CPU-COMPANY and OS or KERNEL-OS (if any). +# Here we must recognize all the valid KERNEL-OS combinations. +maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'` +case $maybe_os in + nto-qnx* | linux-gnu* | storm-chaos* | os2-emx* | windows32-*) + os=-$maybe_os + basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'` + ;; + *) + basic_machine=`echo $1 | sed 's/-[^-]*$//'` + if [ $basic_machine != $1 ] + then os=`echo $1 | sed 's/.*-/-/'` + else os=; fi + ;; +esac + +### Let's recognize common machines as not being operating systems so +### that things like config.sub decstation-3100 work. We also +### recognize some manufacturers as not being operating systems, so we +### can provide default operating systems below. +case $os in + -sun*os*) + # Prevent following clause from handling this invalid input. + ;; + -dec* | -mips* | -sequent* | -encore* | -pc532* | -sgi* | -sony* | \ + -att* | -7300* | -3300* | -delta* | -motorola* | -sun[234]* | \ + -unicom* | -ibm* | -next | -hp | -isi* | -apollo | -altos* | \ + -convergent* | -ncr* | -news | -32* | -3600* | -3100* | -hitachi* |\ + -c[123]* | -convex* | -sun | -crds | -omron* | -dg | -ultra | -tti* | \ + -harris | -dolphin | -highlevel | -gould | -cbm | -ns | -masscomp | \ + -apple | -axis) + os= + basic_machine=$1 + ;; + -sim | -cisco | -oki | -wec | -winbond) + os= + basic_machine=$1 + ;; + -scout) + ;; + -wrs) + os=-vxworks + basic_machine=$1 + ;; + -chorusos*) + os=-chorusos + basic_machine=$1 + ;; + -chorusrdb) + os=-chorusrdb + basic_machine=$1 + ;; + -hiux*) + os=-hiuxwe2 + ;; + -sco5) + os=-sco3.2v5 + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -sco4) + os=-sco3.2v4 + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -sco3.2.[4-9]*) + os=`echo $os | sed -e 's/sco3.2./sco3.2v/'` + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -sco3.2v[4-9]*) + # Don't forget version if it is 3.2v4 or newer. + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -sco*) + os=-sco3.2v2 + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -udk*) + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -isc) + os=-isc2.2 + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -clix*) + basic_machine=clipper-intergraph + ;; + -isc*) + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -lynx*) + os=-lynxos + ;; + -ptx*) + basic_machine=`echo $1 | sed -e 's/86-.*/86-sequent/'` + ;; + -windowsnt*) + os=`echo $os | sed -e 's/windowsnt/winnt/'` + ;; + -psos*) + os=-psos + ;; + -mint | -mint[0-9]*) + basic_machine=m68k-atari + os=-mint + ;; +esac + +# Decode aliases for certain CPU-COMPANY combinations. +case $basic_machine in + # Recognize the basic CPU types without company name. + # Some are omitted here because they have special meanings below. + 1750a | 580 \ + | a29k \ + | alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \ + | alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \ + | arc | arm | arm[bl]e | arme[lb] | armv[2345] | armv[345][lb] | avr \ + | c4x | clipper \ + | d10v | d30v | dsp16xx \ + | fr30 \ + | h8300 | h8500 | hppa | hppa1.[01] | hppa2.0 | hppa2.0[nw] | hppa64 \ + | i370 | i860 | i960 | ia64 \ + | m32r | m68000 | m68k | m88k | mcore \ + | mips16 | mips64 | mips64el | mips64orion | mips64orionel \ + | mips64vr4100 | mips64vr4100el | mips64vr4300 \ + | mips64vr4300el | mips64vr5000 | mips64vr5000el \ + | mipsbe | mipseb | mipsel | mipsle | mipstx39 | mipstx39el \ + | mipsisa32 \ + | mn10200 | mn10300 \ + | ns16k | ns32k \ + | openrisc \ + | pdp10 | pdp11 | pj | pjl \ + | powerpc | powerpc64 | powerpc64le | powerpcle | ppcbe \ + | pyramid \ + | sh | sh[34] | sh[34]eb | shbe | shle \ + | sparc | sparc64 | sparclet | sparclite | sparcv9 | sparcv9b \ + | strongarm \ + | tahoe | thumb | tic80 | tron \ + | v850 | v850e \ + | we32k \ + | x86 | xscale | xstormy16 | xtensa \ + | z8k) + basic_machine=$basic_machine-unknown + ;; + m6811 | m68hc11 | m6812 | m68hc12) + # Motorola 68HC11/12. + basic_machine=$basic_machine-unknown + os=-none + ;; + m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | v70 | w65 | z8k) + ;; + + # We use `pc' rather than `unknown' + # because (1) that's what they normally are, and + # (2) the word "unknown" tends to confuse beginning users. + i*86 | x86_64) + basic_machine=$basic_machine-pc + ;; + # Object if more than one company name word. + *-*-*) + echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2 + exit 1 + ;; + # Recognize the basic CPU types with company name. + 580-* \ + | a29k-* \ + | alpha-* | alphaev[4-8]-* | alphaev56-* | alphaev6[78]-* \ + | alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \ + | alphapca5[67]-* | alpha64pca5[67]-* | arc-* \ + | arm-* | armbe-* | armle-* | armv*-* \ + | avr-* \ + | bs2000-* \ + | c[123]* | c30-* | [cjt]90-* | c54x-* \ + | clipper-* | cray2-* | cydra-* \ + | d10v-* | d30v-* \ + | elxsi-* \ + | f30[01]-* | f700-* | fr30-* | fx80-* \ + | h8300-* | h8500-* \ + | hppa-* | hppa1.[01]-* | hppa2.0-* | hppa2.0[nw]-* | hppa64-* \ + | i*86-* | i860-* | i960-* | ia64-* \ + | m32r-* \ + | m68000-* | m680[01234]0-* | m68360-* | m683?2-* | m68k-* \ + | m88110-* | m88k-* | mcore-* \ + | mips-* | mips16-* | mips64-* | mips64el-* | mips64orion-* \ + | mips64orionel-* | mips64vr4100-* | mips64vr4100el-* \ + | mips64vr4300-* | mips64vr4300el-* | mipsbe-* | mipseb-* \ + | mipsle-* | mipsel-* | mipstx39-* | mipstx39el-* \ + | none-* | np1-* | ns16k-* | ns32k-* \ + | orion-* \ + | pdp10-* | pdp11-* | pj-* | pjl-* | pn-* | power-* \ + | powerpc-* | powerpc64-* | powerpc64le-* | powerpcle-* | ppcbe-* \ + | pyramid-* \ + | romp-* | rs6000-* \ + | sh-* | sh[34]-* | sh[34]eb-* | shbe-* | shle-* \ + | sparc-* | sparc64-* | sparc86x-* | sparclite-* \ + | sparcv9-* | sparcv9b-* | strongarm-* | sv1-* \ + | t3e-* | tahoe-* | thumb-* | tic30-* | tic54x-* | tic80-* | tron-* \ + | v850-* | v850e-* | vax-* \ + | we32k-* \ + | x86-* | x86_64-* | xmp-* | xps100-* | xscale-* | xstormy16-* \ + | xtensa-* \ + | ymp-* \ + | z8k-*) + ;; + # Recognize the various machine names and aliases which stand + # for a CPU type and a company and sometimes even an OS. + 386bsd) + basic_machine=i386-unknown + os=-bsd + ;; + 3b1 | 7300 | 7300-att | att-7300 | pc7300 | safari | unixpc) + basic_machine=m68000-att + ;; + 3b*) + basic_machine=we32k-att + ;; + a29khif) + basic_machine=a29k-amd + os=-udi + ;; + adobe68k) + basic_machine=m68010-adobe + os=-scout + ;; + alliant | fx80) + basic_machine=fx80-alliant + ;; + altos | altos3068) + basic_machine=m68k-altos + ;; + am29k) + basic_machine=a29k-none + os=-bsd + ;; + amdahl) + basic_machine=580-amdahl + os=-sysv + ;; + amiga | amiga-*) + basic_machine=m68k-unknown + ;; + amigaos | amigados) + basic_machine=m68k-unknown + os=-amigaos + ;; + amigaunix | amix) + basic_machine=m68k-unknown + os=-sysv4 + ;; + apollo68) + basic_machine=m68k-apollo + os=-sysv + ;; + apollo68bsd) + basic_machine=m68k-apollo + os=-bsd + ;; + aux) + basic_machine=m68k-apple + os=-aux + ;; + balance) + basic_machine=ns32k-sequent + os=-dynix + ;; + convex-c1) + basic_machine=c1-convex + os=-bsd + ;; + convex-c2) + basic_machine=c2-convex + os=-bsd + ;; + convex-c32) + basic_machine=c32-convex + os=-bsd + ;; + convex-c34) + basic_machine=c34-convex + os=-bsd + ;; + convex-c38) + basic_machine=c38-convex + os=-bsd + ;; + cray | ymp) + basic_machine=ymp-cray + os=-unicos + ;; + cray2) + basic_machine=cray2-cray + os=-unicos + ;; + [cjt]90) + basic_machine=${basic_machine}-cray + os=-unicos + ;; + crds | unos) + basic_machine=m68k-crds + ;; + cris | cris-* | etrax*) + basic_machine=cris-axis + ;; + da30 | da30-*) + basic_machine=m68k-da30 + ;; + decstation | decstation-3100 | pmax | pmax-* | pmin | dec3100 | decstatn) + basic_machine=mips-dec + ;; + decsystem10* | dec10*) + basic_machine=pdp10-dec + os=-tops10 + ;; + decsystem20* | dec20*) + basic_machine=pdp10-dec + os=-tops20 + ;; + delta | 3300 | motorola-3300 | motorola-delta \ + | 3300-motorola | delta-motorola) + basic_machine=m68k-motorola + ;; + delta88) + basic_machine=m88k-motorola + os=-sysv3 + ;; + dpx20 | dpx20-*) + basic_machine=rs6000-bull + os=-bosx + ;; + dpx2* | dpx2*-bull) + basic_machine=m68k-bull + os=-sysv3 + ;; + ebmon29k) + basic_machine=a29k-amd + os=-ebmon + ;; + elxsi) + basic_machine=elxsi-elxsi + os=-bsd + ;; + encore | umax | mmax) + basic_machine=ns32k-encore + ;; + es1800 | OSE68k | ose68k | ose | OSE) + basic_machine=m68k-ericsson + os=-ose + ;; + fx2800) + basic_machine=i860-alliant + ;; + genix) + basic_machine=ns32k-ns + ;; + gmicro) + basic_machine=tron-gmicro + os=-sysv + ;; + go32) + basic_machine=i386-pc + os=-go32 + ;; + h3050r* | hiux*) + basic_machine=hppa1.1-hitachi + os=-hiuxwe2 + ;; + h8300hms) + basic_machine=h8300-hitachi + os=-hms + ;; + h8300xray) + basic_machine=h8300-hitachi + os=-xray + ;; + h8500hms) + basic_machine=h8500-hitachi + os=-hms + ;; + harris) + basic_machine=m88k-harris + os=-sysv3 + ;; + hp300-*) + basic_machine=m68k-hp + ;; + hp300bsd) + basic_machine=m68k-hp + os=-bsd + ;; + hp300hpux) + basic_machine=m68k-hp + os=-hpux + ;; + hp3k9[0-9][0-9] | hp9[0-9][0-9]) + basic_machine=hppa1.0-hp + ;; + hp9k2[0-9][0-9] | hp9k31[0-9]) + basic_machine=m68000-hp + ;; + hp9k3[2-9][0-9]) + basic_machine=m68k-hp + ;; + hp9k6[0-9][0-9] | hp6[0-9][0-9]) + basic_machine=hppa1.0-hp + ;; + hp9k7[0-79][0-9] | hp7[0-79][0-9]) + basic_machine=hppa1.1-hp + ;; + hp9k78[0-9] | hp78[0-9]) + # FIXME: really hppa2.0-hp + basic_machine=hppa1.1-hp + ;; + hp9k8[67]1 | hp8[67]1 | hp9k80[24] | hp80[24] | hp9k8[78]9 | hp8[78]9 | hp9k893 | hp893) + # FIXME: really hppa2.0-hp + basic_machine=hppa1.1-hp + ;; + hp9k8[0-9][13679] | hp8[0-9][13679]) + basic_machine=hppa1.1-hp + ;; + hp9k8[0-9][0-9] | hp8[0-9][0-9]) + basic_machine=hppa1.0-hp + ;; + hppa-next) + os=-nextstep3 + ;; + hppaosf) + basic_machine=hppa1.1-hp + os=-osf + ;; + hppro) + basic_machine=hppa1.1-hp + os=-proelf + ;; + i370-ibm* | ibm*) + basic_machine=i370-ibm + ;; +# I'm not sure what "Sysv32" means. Should this be sysv3.2? + i*86v32) + basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` + os=-sysv32 + ;; + i*86v4*) + basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` + os=-sysv4 + ;; + i*86v) + basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` + os=-sysv + ;; + i*86sol2) + basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` + os=-solaris2 + ;; + i386mach) + basic_machine=i386-mach + os=-mach + ;; + i386-vsta | vsta) + basic_machine=i386-unknown + os=-vsta + ;; + iris | iris4d) + basic_machine=mips-sgi + case $os in + -irix*) + ;; + *) + os=-irix4 + ;; + esac + ;; + isi68 | isi) + basic_machine=m68k-isi + os=-sysv + ;; + m88k-omron*) + basic_machine=m88k-omron + ;; + magnum | m3230) + basic_machine=mips-mips + os=-sysv + ;; + merlin) + basic_machine=ns32k-utek + os=-sysv + ;; + mingw32) + basic_machine=i386-pc + os=-mingw32 + ;; + miniframe) + basic_machine=m68000-convergent + ;; + *mint | -mint[0-9]* | *MiNT | *MiNT[0-9]*) + basic_machine=m68k-atari + os=-mint + ;; + mipsel*-linux*) + basic_machine=mipsel-unknown + os=-linux-gnu + ;; + mips*-linux*) + basic_machine=mips-unknown + os=-linux-gnu + ;; + mips3*-*) + basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'` + ;; + mips3*) + basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`-unknown + ;; + mmix*) + basic_machine=mmix-knuth + os=-mmixware + ;; + monitor) + basic_machine=m68k-rom68k + os=-coff + ;; + morphos) + basic_machine=powerpc-unknown + os=-morphos + ;; + msdos) + basic_machine=i386-pc + os=-msdos + ;; + mvs) + basic_machine=i370-ibm + os=-mvs + ;; + ncr3000) + basic_machine=i486-ncr + os=-sysv4 + ;; + netbsd386) + basic_machine=i386-unknown + os=-netbsd + ;; + netwinder) + basic_machine=armv4l-rebel + os=-linux + ;; + news | news700 | news800 | news900) + basic_machine=m68k-sony + os=-newsos + ;; + news1000) + basic_machine=m68030-sony + os=-newsos + ;; + news-3600 | risc-news) + basic_machine=mips-sony + os=-newsos + ;; + necv70) + basic_machine=v70-nec + os=-sysv + ;; + next | m*-next ) + basic_machine=m68k-next + case $os in + -nextstep* ) + ;; + -ns2*) + os=-nextstep2 + ;; + *) + os=-nextstep3 + ;; + esac + ;; + nh3000) + basic_machine=m68k-harris + os=-cxux + ;; + nh[45]000) + basic_machine=m88k-harris + os=-cxux + ;; + nindy960) + basic_machine=i960-intel + os=-nindy + ;; + mon960) + basic_machine=i960-intel + os=-mon960 + ;; + nonstopux) + basic_machine=mips-compaq + os=-nonstopux + ;; + np1) + basic_machine=np1-gould + ;; + nsr-tandem) + basic_machine=nsr-tandem + ;; + op50n-* | op60c-*) + basic_machine=hppa1.1-oki + os=-proelf + ;; + OSE68000 | ose68000) + basic_machine=m68000-ericsson + os=-ose + ;; + os68k) + basic_machine=m68k-none + os=-os68k + ;; + pa-hitachi) + basic_machine=hppa1.1-hitachi + os=-hiuxwe2 + ;; + paragon) + basic_machine=i860-intel + os=-osf + ;; + pbd) + basic_machine=sparc-tti + ;; + pbb) + basic_machine=m68k-tti + ;; + pc532 | pc532-*) + basic_machine=ns32k-pc532 + ;; + pentium | p5 | k5 | k6 | nexgen | viac3) + basic_machine=i586-pc + ;; + pentiumpro | p6 | 6x86 | athlon) + basic_machine=i686-pc + ;; + pentiumii | pentium2) + basic_machine=i686-pc + ;; + pentium-* | p5-* | k5-* | k6-* | nexgen-* | viac3-*) + basic_machine=i586-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + pentiumpro-* | p6-* | 6x86-* | athlon-*) + basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + pentiumii-* | pentium2-*) + basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + pn) + basic_machine=pn-gould + ;; + power) basic_machine=power-ibm + ;; + ppc) basic_machine=powerpc-unknown + ;; + ppc-*) basic_machine=powerpc-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + ppcle | powerpclittle | ppc-le | powerpc-little) + basic_machine=powerpcle-unknown + ;; + ppcle-* | powerpclittle-*) + basic_machine=powerpcle-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + ppc64) basic_machine=powerpc64-unknown + ;; + ppc64-*) basic_machine=powerpc64-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + ppc64le | powerpc64little | ppc64-le | powerpc64-little) + basic_machine=powerpc64le-unknown + ;; + ppc64le-* | powerpc64little-*) + basic_machine=powerpc64le-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + ps2) + basic_machine=i386-ibm + ;; + pw32) + basic_machine=i586-unknown + os=-pw32 + ;; + rom68k) + basic_machine=m68k-rom68k + os=-coff + ;; + rm[46]00) + basic_machine=mips-siemens + ;; + rtpc | rtpc-*) + basic_machine=romp-ibm + ;; + s390 | s390-*) + basic_machine=s390-ibm + ;; + s390x | s390x-*) + basic_machine=s390x-ibm + ;; + sa29200) + basic_machine=a29k-amd + os=-udi + ;; + sequent) + basic_machine=i386-sequent + ;; + sh) + basic_machine=sh-hitachi + os=-hms + ;; + sparclite-wrs | simso-wrs) + basic_machine=sparclite-wrs + os=-vxworks + ;; + sps7) + basic_machine=m68k-bull + os=-sysv2 + ;; + spur) + basic_machine=spur-unknown + ;; + st2000) + basic_machine=m68k-tandem + ;; + stratus) + basic_machine=i860-stratus + os=-sysv4 + ;; + sun2) + basic_machine=m68000-sun + ;; + sun2os3) + basic_machine=m68000-sun + os=-sunos3 + ;; + sun2os4) + basic_machine=m68000-sun + os=-sunos4 + ;; + sun3os3) + basic_machine=m68k-sun + os=-sunos3 + ;; + sun3os4) + basic_machine=m68k-sun + os=-sunos4 + ;; + sun4os3) + basic_machine=sparc-sun + os=-sunos3 + ;; + sun4os4) + basic_machine=sparc-sun + os=-sunos4 + ;; + sun4sol2) + basic_machine=sparc-sun + os=-solaris2 + ;; + sun3 | sun3-*) + basic_machine=m68k-sun + ;; + sun4) + basic_machine=sparc-sun + ;; + sun386 | sun386i | roadrunner) + basic_machine=i386-sun + ;; + sv1) + basic_machine=sv1-cray + os=-unicos + ;; + symmetry) + basic_machine=i386-sequent + os=-dynix + ;; + t3e) + basic_machine=t3e-cray + os=-unicos + ;; + tic54x | c54x*) + basic_machine=tic54x-unknown + os=-coff + ;; + tx39) + basic_machine=mipstx39-unknown + ;; + tx39el) + basic_machine=mipstx39el-unknown + ;; + toad1) + basic_machine=pdp10-xkl + os=-tops20 + ;; + tower | tower-32) + basic_machine=m68k-ncr + ;; + udi29k) + basic_machine=a29k-amd + os=-udi + ;; + ultra3) + basic_machine=a29k-nyu + os=-sym1 + ;; + v810 | necv810) + basic_machine=v810-nec + os=-none + ;; + vaxv) + basic_machine=vax-dec + os=-sysv + ;; + vms) + basic_machine=vax-dec + os=-vms + ;; + vpp*|vx|vx-*) + basic_machine=f301-fujitsu + ;; + vxworks960) + basic_machine=i960-wrs + os=-vxworks + ;; + vxworks68) + basic_machine=m68k-wrs + os=-vxworks + ;; + vxworks29k) + basic_machine=a29k-wrs + os=-vxworks + ;; + w65*) + basic_machine=w65-wdc + os=-none + ;; + w89k-*) + basic_machine=hppa1.1-winbond + os=-proelf + ;; + windows32) + basic_machine=i386-pc + os=-windows32-msvcrt + ;; + xmp) + basic_machine=xmp-cray + os=-unicos + ;; + xps | xps100) + basic_machine=xps100-honeywell + ;; + z8k-*-coff) + basic_machine=z8k-unknown + os=-sim + ;; + none) + basic_machine=none-none + os=-none + ;; + +# Here we handle the default manufacturer of certain CPU types. It is in +# some cases the only manufacturer, in others, it is the most popular. + w89k) + basic_machine=hppa1.1-winbond + ;; + op50n) + basic_machine=hppa1.1-oki + ;; + op60c) + basic_machine=hppa1.1-oki + ;; + mips) + if [ x$os = x-linux-gnu ]; then + basic_machine=mips-unknown + else + basic_machine=mips-mips + fi + ;; + romp) + basic_machine=romp-ibm + ;; + rs6000) + basic_machine=rs6000-ibm + ;; + vax) + basic_machine=vax-dec + ;; + pdp10) + # there are many clones, so DEC is not a safe bet + basic_machine=pdp10-unknown + ;; + pdp11) + basic_machine=pdp11-dec + ;; + we32k) + basic_machine=we32k-att + ;; + sh3 | sh4 | sh3eb | sh4eb) + basic_machine=sh-unknown + ;; + sparc | sparcv9 | sparcv9b) + basic_machine=sparc-sun + ;; + cydra) + basic_machine=cydra-cydrome + ;; + orion) + basic_machine=orion-highlevel + ;; + orion105) + basic_machine=clipper-highlevel + ;; + mac | mpw | mac-mpw) + basic_machine=m68k-apple + ;; + pmac | pmac-mpw) + basic_machine=powerpc-apple + ;; + c4x*) + basic_machine=c4x-none + os=-coff + ;; + *-unknown) + # Make sure to match an already-canonicalized machine name. + ;; + *) + echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2 + exit 1 + ;; +esac + +# Here we canonicalize certain aliases for manufacturers. +case $basic_machine in + *-digital*) + basic_machine=`echo $basic_machine | sed 's/digital.*/dec/'` + ;; + *-commodore*) + basic_machine=`echo $basic_machine | sed 's/commodore.*/cbm/'` + ;; + *) + ;; +esac + +# Decode manufacturer-specific aliases for certain operating systems. + +if [ x"$os" != x"" ] +then +case $os in + # First match some system type aliases + # that might get confused with valid system types. + # -solaris* is a basic system type, with this one exception. + -solaris1 | -solaris1.*) + os=`echo $os | sed -e 's|solaris1|sunos4|'` + ;; + -solaris) + os=-solaris2 + ;; + -svr4*) + os=-sysv4 + ;; + -unixware*) + os=-sysv4.2uw + ;; + -gnu/linux*) + os=`echo $os | sed -e 's|gnu/linux|linux-gnu|'` + ;; + # First accept the basic system types. + # The portable systems comes first. + # Each alternative MUST END IN A *, to match a version number. + # -sysv* is not here because it comes later, after sysvr4. + -gnu* | -bsd* | -mach* | -minix* | -genix* | -ultrix* | -irix* \ + | -*vms* | -sco* | -esix* | -isc* | -aix* | -sunos | -sunos[34]*\ + | -hpux* | -unos* | -osf* | -luna* | -dgux* | -solaris* | -sym* \ + | -amigaos* | -amigados* | -msdos* | -newsos* | -unicos* | -aof* \ + | -aos* \ + | -nindy* | -vxsim* | -vxworks* | -ebmon* | -hms* | -mvs* \ + | -clix* | -riscos* | -uniplus* | -iris* | -rtu* | -xenix* \ + | -hiux* | -386bsd* | -netbsd* | -openbsd* | -freebsd* | -riscix* \ + | -lynxos* | -bosx* | -nextstep* | -cxux* | -aout* | -elf* | -oabi* \ + | -ptx* | -coff* | -ecoff* | -winnt* | -domain* | -vsta* \ + | -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \ + | -chorusos* | -chorusrdb* \ + | -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* \ + | -mingw32* | -linux-gnu* | -uxpv* | -beos* | -mpeix* | -udk* \ + | -interix* | -uwin* | -rhapsody* | -darwin* | -opened* \ + | -openstep* | -oskit* | -conix* | -pw32* | -nonstopux* \ + | -storm-chaos* | -tops10* | -tenex* | -tops20* | -its* \ + | -os2* | -vos* | -palmos* | -uclinux* | -nucleus* | -morphos*) + # Remember, each alternative MUST END IN *, to match a version number. + ;; + -qnx*) + case $basic_machine in + x86-* | i*86-*) + ;; + *) + os=-nto$os + ;; + esac + ;; + -nto*) + os=-nto-qnx + ;; + -sim | -es1800* | -hms* | -xray | -os68k* | -none* | -v88r* \ + | -windows* | -osx | -abug | -netware* | -os9* | -beos* \ + | -macos* | -mpw* | -magic* | -mmixware* | -mon960* | -lnews*) + ;; + -mac*) + os=`echo $os | sed -e 's|mac|macos|'` + ;; + -linux*) + os=`echo $os | sed -e 's|linux|linux-gnu|'` + ;; + -sunos5*) + os=`echo $os | sed -e 's|sunos5|solaris2|'` + ;; + -sunos6*) + os=`echo $os | sed -e 's|sunos6|solaris3|'` + ;; + -opened*) + os=-openedition + ;; + -wince*) + os=-wince + ;; + -osfrose*) + os=-osfrose + ;; + -osf*) + os=-osf + ;; + -utek*) + os=-bsd + ;; + -dynix*) + os=-bsd + ;; + -acis*) + os=-aos + ;; + -atheos*) + os=-atheos + ;; + -386bsd) + os=-bsd + ;; + -ctix* | -uts*) + os=-sysv + ;; + -ns2 ) + os=-nextstep2 + ;; + -nsk*) + os=-nsk + ;; + # Preserve the version number of sinix5. + -sinix5.*) + os=`echo $os | sed -e 's|sinix|sysv|'` + ;; + -sinix*) + os=-sysv4 + ;; + -triton*) + os=-sysv3 + ;; + -oss*) + os=-sysv3 + ;; + -svr4) + os=-sysv4 + ;; + -svr3) + os=-sysv3 + ;; + -sysvr4) + os=-sysv4 + ;; + # This must come after -sysvr4. + -sysv*) + ;; + -ose*) + os=-ose + ;; + -es1800*) + os=-ose + ;; + -xenix) + os=-xenix + ;; + -*mint | -mint[0-9]* | -*MiNT | -MiNT[0-9]*) + os=-mint + ;; + -none) + ;; + *) + # Get rid of the `-' at the beginning of $os. + os=`echo $os | sed 's/[^-]*-//'` + echo Invalid configuration \`$1\': system \`$os\' not recognized 1>&2 + exit 1 + ;; +esac +else + +# Here we handle the default operating systems that come with various machines. +# The value should be what the vendor currently ships out the door with their +# machine or put another way, the most popular os provided with the machine. + +# Note that if you're going to try to match "-MANUFACTURER" here (say, +# "-sun"), then you have to tell the case statement up towards the top +# that MANUFACTURER isn't an operating system. Otherwise, code above +# will signal an error saying that MANUFACTURER isn't an operating +# system, and we'll never get to this point. + +case $basic_machine in + *-acorn) + os=-riscix1.2 + ;; + arm*-rebel) + os=-linux + ;; + arm*-semi) + os=-aout + ;; + # This must come before the *-dec entry. + pdp10-*) + os=-tops20 + ;; + pdp11-*) + os=-none + ;; + *-dec | vax-*) + os=-ultrix4.2 + ;; + m68*-apollo) + os=-domain + ;; + i386-sun) + os=-sunos4.0.2 + ;; + m68000-sun) + os=-sunos3 + # This also exists in the configure program, but was not the + # default. + # os=-sunos4 + ;; + m68*-cisco) + os=-aout + ;; + mips*-cisco) + os=-elf + ;; + mips*-*) + os=-elf + ;; + *-tti) # must be before sparc entry or we get the wrong os. + os=-sysv3 + ;; + sparc-* | *-sun) + os=-sunos4.1.1 + ;; + *-be) + os=-beos + ;; + *-ibm) + os=-aix + ;; + *-wec) + os=-proelf + ;; + *-winbond) + os=-proelf + ;; + *-oki) + os=-proelf + ;; + *-hp) + os=-hpux + ;; + *-hitachi) + os=-hiux + ;; + i860-* | *-att | *-ncr | *-altos | *-motorola | *-convergent) + os=-sysv + ;; + *-cbm) + os=-amigaos + ;; + *-dg) + os=-dgux + ;; + *-dolphin) + os=-sysv3 + ;; + m68k-ccur) + os=-rtu + ;; + m88k-omron*) + os=-luna + ;; + *-next ) + os=-nextstep + ;; + *-sequent) + os=-ptx + ;; + *-crds) + os=-unos + ;; + *-ns) + os=-genix + ;; + i370-*) + os=-mvs + ;; + *-next) + os=-nextstep3 + ;; + *-gould) + os=-sysv + ;; + *-highlevel) + os=-bsd + ;; + *-encore) + os=-bsd + ;; + *-sgi) + os=-irix + ;; + *-siemens) + os=-sysv4 + ;; + *-masscomp) + os=-rtu + ;; + f30[01]-fujitsu | f700-fujitsu) + os=-uxpv + ;; + *-rom68k) + os=-coff + ;; + *-*bug) + os=-coff + ;; + *-apple) + os=-macos + ;; + *-atari*) + os=-mint + ;; + *) + os=-none + ;; +esac +fi + +# Here we handle the case where we know the os, and the CPU type, but not the +# manufacturer. We pick the logical manufacturer. +vendor=unknown +case $basic_machine in + *-unknown) + case $os in + -riscix*) + vendor=acorn + ;; + -sunos*) + vendor=sun + ;; + -aix*) + vendor=ibm + ;; + -beos*) + vendor=be + ;; + -hpux*) + vendor=hp + ;; + -mpeix*) + vendor=hp + ;; + -hiux*) + vendor=hitachi + ;; + -unos*) + vendor=crds + ;; + -dgux*) + vendor=dg + ;; + -luna*) + vendor=omron + ;; + -genix*) + vendor=ns + ;; + -mvs* | -opened*) + vendor=ibm + ;; + -ptx*) + vendor=sequent + ;; + -vxsim* | -vxworks*) + vendor=wrs + ;; + -aux*) + vendor=apple + ;; + -hms*) + vendor=hitachi + ;; + -mpw* | -macos*) + vendor=apple + ;; + -*mint | -mint[0-9]* | -*MiNT | -MiNT[0-9]*) + vendor=atari + ;; + -vos*) + vendor=stratus + ;; + esac + basic_machine=`echo $basic_machine | sed "s/unknown/$vendor/"` + ;; +esac + +echo $basic_machine$os +exit 0 + +# Local variables: +# eval: (add-hook 'write-file-hooks 'time-stamp) +# time-stamp-start: "timestamp='" +# time-stamp-format: "%:y-%02m-%02d" +# time-stamp-end: "'" +# End: diff --git a/sim/ucsim/configure b/sim/ucsim/configure new file mode 100755 index 0000000..edca158 --- /dev/null +++ b/sim/ucsim/configure @@ -0,0 +1,15952 @@ +#! /bin/sh +# Guess values for system-dependent variables and create Makefiles. +# Generated by GNU Autoconf 2.61. +# +# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, +# 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +# This configure script is free software; the Free Software Foundation +# gives unlimited permission to copy, distribute and modify it. +## --------------------- ## +## M4sh Initialization. ## +## --------------------- ## + +# Be more Bourne compatible +DUALCASE=1; export DUALCASE # for MKS sh +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in + *posix*) set -o posix ;; +esac + +fi + + + + +# PATH needs CR +# Avoid depending upon Character Ranges. +as_cr_letters='abcdefghijklmnopqrstuvwxyz' +as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +as_cr_Letters=$as_cr_letters$as_cr_LETTERS +as_cr_digits='0123456789' +as_cr_alnum=$as_cr_Letters$as_cr_digits + +# The user is always right. +if test "${PATH_SEPARATOR+set}" != set; then + echo "#! /bin/sh" >conf$$.sh + echo "exit 0" >>conf$$.sh + chmod +x conf$$.sh + if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then + PATH_SEPARATOR=';' + else + PATH_SEPARATOR=: + fi + rm -f conf$$.sh +fi + +# Support unset when possible. +if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then + as_unset=unset +else + as_unset=false +fi + + +# IFS +# We need space, tab and new line, in precisely that order. Quoting is +# there to prevent editors from complaining about space-tab. +# (If _AS_PATH_WALK were called with IFS unset, it would disable word +# splitting by setting IFS to empty value.) +as_nl=' +' +IFS=" "" $as_nl" + +# Find who we are. Look in the path if we contain no directory separator. +case $0 in + *[\\/]* ) as_myself=$0 ;; + *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break +done +IFS=$as_save_IFS + + ;; +esac +# We did not find ourselves, most probably we were run as `sh COMMAND' +# in which case we are not to be found in the path. +if test "x$as_myself" = x; then + as_myself=$0 +fi +if test ! -f "$as_myself"; then + echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2 + { (exit 1); exit 1; } +fi + +# Work around bugs in pre-3.0 UWIN ksh. +for as_var in ENV MAIL MAILPATH +do ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var +done +PS1='$ ' +PS2='> ' +PS4='+ ' + +# NLS nuisances. +for as_var in \ + LANG LANGUAGE LC_ADDRESS LC_ALL LC_COLLATE LC_CTYPE LC_IDENTIFICATION \ + LC_MEASUREMENT LC_MESSAGES LC_MONETARY LC_NAME LC_NUMERIC LC_PAPER \ + LC_TELEPHONE LC_TIME +do + if (set +x; test -z "`(eval $as_var=C; export $as_var) 2>&1`"); then + eval $as_var=C; export $as_var + else + ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var + fi +done + +# Required to use basename. +if expr a : '\(a\)' >/dev/null 2>&1 && + test "X`expr 00001 : '.*\(...\)'`" = X001; then + as_expr=expr +else + as_expr=false +fi + +if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then + as_basename=basename +else + as_basename=false +fi + + +# Name of the executable. +as_me=`$as_basename -- "$0" || +$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \ + X"$0" : 'X\(//\)$' \| \ + X"$0" : 'X\(/\)' \| . 2>/dev/null || +echo X/"$0" | + sed '/^.*\/\([^/][^/]*\)\/*$/{ + s//\1/ + q + } + /^X\/\(\/\/\)$/{ + s//\1/ + q + } + /^X\/\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + +# CDPATH. +$as_unset CDPATH + + +if test "x$CONFIG_SHELL" = x; then + if (eval ":") 2>/dev/null; then + as_have_required=yes +else + as_have_required=no +fi + + if test $as_have_required = yes && (eval ": +(as_func_return () { + (exit \$1) +} +as_func_success () { + as_func_return 0 +} +as_func_failure () { + as_func_return 1 +} +as_func_ret_success () { + return 0 +} +as_func_ret_failure () { + return 1 +} + +exitcode=0 +if as_func_success; then + : +else + exitcode=1 + echo as_func_success failed. +fi + +if as_func_failure; then + exitcode=1 + echo as_func_failure succeeded. +fi + +if as_func_ret_success; then + : +else + exitcode=1 + echo as_func_ret_success failed. +fi + +if as_func_ret_failure; then + exitcode=1 + echo as_func_ret_failure succeeded. +fi + +if ( set x; as_func_ret_success y && test x = \"\$1\" ); then + : +else + exitcode=1 + echo positional parameters were not saved. +fi + +test \$exitcode = 0) || { (exit 1); exit 1; } + +( + as_lineno_1=\$LINENO + as_lineno_2=\$LINENO + test \"x\$as_lineno_1\" != \"x\$as_lineno_2\" && + test \"x\`expr \$as_lineno_1 + 1\`\" = \"x\$as_lineno_2\") || { (exit 1); exit 1; } +") 2> /dev/null; then + : +else + as_candidate_shells= + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in /bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + case $as_dir in + /*) + for as_base in sh bash ksh sh5; do + as_candidate_shells="$as_candidate_shells $as_dir/$as_base" + done;; + esac +done +IFS=$as_save_IFS + + + for as_shell in $as_candidate_shells $SHELL; do + # Try only shells that exist, to save several forks. + if { test -f "$as_shell" || test -f "$as_shell.exe"; } && + { ("$as_shell") 2> /dev/null <<\_ASEOF +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in + *posix*) set -o posix ;; +esac + +fi + + +: +_ASEOF +}; then + CONFIG_SHELL=$as_shell + as_have_required=yes + if { "$as_shell" 2> /dev/null <<\_ASEOF +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in + *posix*) set -o posix ;; +esac + +fi + + +: +(as_func_return () { + (exit $1) +} +as_func_success () { + as_func_return 0 +} +as_func_failure () { + as_func_return 1 +} +as_func_ret_success () { + return 0 +} +as_func_ret_failure () { + return 1 +} + +exitcode=0 +if as_func_success; then + : +else + exitcode=1 + echo as_func_success failed. +fi + +if as_func_failure; then + exitcode=1 + echo as_func_failure succeeded. +fi + +if as_func_ret_success; then + : +else + exitcode=1 + echo as_func_ret_success failed. +fi + +if as_func_ret_failure; then + exitcode=1 + echo as_func_ret_failure succeeded. +fi + +if ( set x; as_func_ret_success y && test x = "$1" ); then + : +else + exitcode=1 + echo positional parameters were not saved. +fi + +test $exitcode = 0) || { (exit 1); exit 1; } + +( + as_lineno_1=$LINENO + as_lineno_2=$LINENO + test "x$as_lineno_1" != "x$as_lineno_2" && + test "x`expr $as_lineno_1 + 1`" = "x$as_lineno_2") || { (exit 1); exit 1; } + +_ASEOF +}; then + break +fi + +fi + + done + + if test "x$CONFIG_SHELL" != x; then + for as_var in BASH_ENV ENV + do ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var + done + export CONFIG_SHELL + exec "$CONFIG_SHELL" "$as_myself" ${1+"$@"} +fi + + + if test $as_have_required = no; then + echo This script requires a shell more modern than all the + echo shells that I found on your system. Please install a + echo modern shell, or manually run the script under such a + echo shell if you do have one. + { (exit 1); exit 1; } +fi + + +fi + +fi + + + +(eval "as_func_return () { + (exit \$1) +} +as_func_success () { + as_func_return 0 +} +as_func_failure () { + as_func_return 1 +} +as_func_ret_success () { + return 0 +} +as_func_ret_failure () { + return 1 +} + +exitcode=0 +if as_func_success; then + : +else + exitcode=1 + echo as_func_success failed. +fi + +if as_func_failure; then + exitcode=1 + echo as_func_failure succeeded. +fi + +if as_func_ret_success; then + : +else + exitcode=1 + echo as_func_ret_success failed. +fi + +if as_func_ret_failure; then + exitcode=1 + echo as_func_ret_failure succeeded. +fi + +if ( set x; as_func_ret_success y && test x = \"\$1\" ); then + : +else + exitcode=1 + echo positional parameters were not saved. +fi + +test \$exitcode = 0") || { + echo No shell found that supports shell functions. + echo Please tell autoconf@gnu.org about your system, + echo including any error possibly output before this + echo message +} + + + + as_lineno_1=$LINENO + as_lineno_2=$LINENO + test "x$as_lineno_1" != "x$as_lineno_2" && + test "x`expr $as_lineno_1 + 1`" = "x$as_lineno_2" || { + + # Create $as_me.lineno as a copy of $as_myself, but with $LINENO + # uniformly replaced by the line number. The first 'sed' inserts a + # line-number line after each line using $LINENO; the second 'sed' + # does the real work. The second script uses 'N' to pair each + # line-number line with the line containing $LINENO, and appends + # trailing '-' during substitution so that $LINENO is not a special + # case at line end. + # (Raja R Harinath suggested sed '=', and Paul Eggert wrote the + # scripts with optimization help from Paolo Bonzini. Blame Lee + # E. McMahon (1931-1989) for sed's syntax. :-) + sed -n ' + p + /[$]LINENO/= + ' <$as_myself | + sed ' + s/[$]LINENO.*/&-/ + t lineno + b + :lineno + N + :loop + s/[$]LINENO\([^'$as_cr_alnum'_].*\n\)\(.*\)/\2\1\2/ + t loop + s/-\n.*// + ' >$as_me.lineno && + chmod +x "$as_me.lineno" || + { echo "$as_me: error: cannot create $as_me.lineno; rerun with a POSIX shell" >&2 + { (exit 1); exit 1; }; } + + # Don't try to exec as it changes $[0], causing all sort of problems + # (the dirname of $[0] is not the place where we might find the + # original and so on. Autoconf is especially sensitive to this). + . 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Usually this is `:', but +# DJGPP uses `;' like DOS. +if test "X${PATH_SEPARATOR+set}" != Xset; then + UNAME=${UNAME-`uname 2>/dev/null`} + case X$UNAME in + *-DOS) lt_cv_sys_path_separator=';' ;; + *) lt_cv_sys_path_separator=':' ;; + esac + PATH_SEPARATOR=$lt_cv_sys_path_separator +fi + + +# Check that we are running under the correct shell. +SHELL=${CONFIG_SHELL-/bin/sh} + +case X$ECHO in +X*--fallback-echo) + # Remove one level of quotation (which was required for Make). + ECHO=`echo "$ECHO" | sed 's,\\\\\$\\$0,'$0','` + ;; +esac + +echo=${ECHO-echo} +if test "X$1" = X--no-reexec; then + # Discard the --no-reexec flag, and continue. + shift +elif test "X$1" = X--fallback-echo; then + # Avoid inline document here, it may be left over + : +elif test "X`($echo '\t') 2>/dev/null`" = 'X\t'; then + # Yippee, $echo works! + : +else + # Restart under the correct shell. + exec $SHELL "$0" --no-reexec ${1+"$@"} +fi + +if test "X$1" = X--fallback-echo; then + # used as fallback echo + shift + cat </dev/null && + echo_test_string="`eval $cmd`" && + (test "X$echo_test_string" = "X$echo_test_string") 2>/dev/null + then + break + fi + done +fi + +if test "X`($echo '\t') 2>/dev/null`" = 'X\t' && + echo_testing_string=`($echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + : +else + # The Solaris, AIX, and Digital Unix default echo programs unquote + # backslashes. This makes it impossible to quote backslashes using + # echo "$something" | sed 's/\\/\\\\/g' + # + # So, first we look for a working echo in the user's PATH. + + IFS="${IFS= }"; save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for dir in $PATH /usr/ucb; do + if (test -f $dir/echo || test -f $dir/echo$ac_exeext) && + test "X`($dir/echo '\t') 2>/dev/null`" = 'X\t' && + echo_testing_string=`($dir/echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + echo="$dir/echo" + break + fi + done + IFS="$save_ifs" + + if test "X$echo" = Xecho; then + # We didn't find a better echo, so look for alternatives. + if test "X`(print -r '\t') 2>/dev/null`" = 'X\t' && + echo_testing_string=`(print -r "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + # This shell has a builtin print -r that does the trick. + echo='print -r' + elif (test -f /bin/ksh || test -f /bin/ksh$ac_exeext) && + test "X$CONFIG_SHELL" != X/bin/ksh; then + # If we have ksh, try running configure again with it. + ORIGINAL_CONFIG_SHELL=${CONFIG_SHELL-/bin/sh} + export ORIGINAL_CONFIG_SHELL + CONFIG_SHELL=/bin/ksh + export CONFIG_SHELL + exec $CONFIG_SHELL "$0" --no-reexec ${1+"$@"} + else + # Try using printf. + echo='printf %s\n' + if test "X`($echo '\t') 2>/dev/null`" = 'X\t' && + echo_testing_string=`($echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + # Cool, printf works + : + elif echo_testing_string=`($ORIGINAL_CONFIG_SHELL "$0" --fallback-echo '\t') 2>/dev/null` && + test "X$echo_testing_string" = 'X\t' && + echo_testing_string=`($ORIGINAL_CONFIG_SHELL "$0" --fallback-echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + CONFIG_SHELL=$ORIGINAL_CONFIG_SHELL + export CONFIG_SHELL + SHELL="$CONFIG_SHELL" + export SHELL + echo="$CONFIG_SHELL $0 --fallback-echo" + elif echo_testing_string=`($CONFIG_SHELL "$0" --fallback-echo '\t') 2>/dev/null` && + test "X$echo_testing_string" = 'X\t' && + echo_testing_string=`($CONFIG_SHELL "$0" --fallback-echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + echo="$CONFIG_SHELL $0 --fallback-echo" + else + # maybe with a smaller string... + prev=: + + for cmd in 'echo test' 'sed 2q "$0"' 'sed 10q "$0"' 'sed 20q "$0"' 'sed 50q "$0"'; do + if (test "X$echo_test_string" = "X`eval $cmd`") 2>/dev/null + then + break + fi + prev="$cmd" + done + + if test "$prev" != 'sed 50q "$0"'; then + echo_test_string=`eval $prev` + export echo_test_string + exec ${ORIGINAL_CONFIG_SHELL-${CONFIG_SHELL-/bin/sh}} "$0" ${1+"$@"} + else + # Oops. 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+ grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || + test ! -s conftest.err + }; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Broken: fails on valid input. +continue +fi + +rm -f conftest.err conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || + test ! -s conftest.err + }; then + # Broken: success on invalid input. +continue +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Passes both tests. +ac_preproc_ok=: +break +fi + +rm -f conftest.err conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.err conftest.$ac_ext +if $ac_preproc_ok; then + break +fi + + done + ac_cv_prog_CXXCPP=$CXXCPP + +fi + CXXCPP=$ac_cv_prog_CXXCPP +else + ac_cv_prog_CXXCPP=$CXXCPP +fi +{ echo "$as_me:$LINENO: result: $CXXCPP" >&5 +echo "${ECHO_T}$CXXCPP" >&6; } +ac_preproc_ok=false +for ac_cxx_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || + test ! -s conftest.err + }; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Broken: fails on valid input. +continue +fi + +rm -f conftest.err conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || + test ! -s conftest.err + }; then + # Broken: success on invalid input. +continue +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Passes both tests. +ac_preproc_ok=: +break +fi + +rm -f conftest.err conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.err conftest.$ac_ext +if $ac_preproc_ok; then + : +else + { { echo "$as_me:$LINENO: error: C++ preprocessor \"$CXXCPP\" fails sanity check +See \`config.log' for more details." >&5 +echo "$as_me: error: C++ preprocessor \"$CXXCPP\" fails sanity check +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } +fi + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + +ac_aux_dir= +for ac_dir in "$srcdir" "$srcdir/.." "$srcdir/../.."; do + if test -f "$ac_dir/install-sh"; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/install-sh -c" + break + elif test -f "$ac_dir/install.sh"; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/install.sh -c" + break + elif test -f "$ac_dir/shtool"; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/shtool install -c" + break + fi +done +if test -z "$ac_aux_dir"; then + { { echo "$as_me:$LINENO: error: cannot find install-sh or install.sh in \"$srcdir\" \"$srcdir/..\" \"$srcdir/../..\"" >&5 +echo "$as_me: error: cannot find install-sh or install.sh in \"$srcdir\" \"$srcdir/..\" \"$srcdir/../..\"" >&2;} + { (exit 1); exit 1; }; } +fi + +# These three variables are undocumented and unsupported, +# and are intended to be withdrawn in a future Autoconf release. +# They can cause serious problems if a builder's source tree is in a directory +# whose full name contains unusual characters. +ac_config_guess="$SHELL $ac_aux_dir/config.guess" # Please don't use this var. +ac_config_sub="$SHELL $ac_aux_dir/config.sub" # Please don't use this var. +ac_configure="$SHELL $ac_aux_dir/configure" # Please don't use this var. + + +# Find a good install program. We prefer a C program (faster), +# so one script is as good as another. But avoid the broken or +# incompatible versions: +# SysV /etc/install, /usr/sbin/install +# SunOS /usr/etc/install +# IRIX /sbin/install +# AIX /bin/install +# AmigaOS /C/install, which installs bootblocks on floppy discs +# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag +# AFS /usr/afsws/bin/install, which mishandles nonexistent args +# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" +# OS/2's system install, which has a completely different semantic +# ./install, which can be erroneously created by make from ./install.sh. +{ echo "$as_me:$LINENO: checking for a BSD-compatible install" >&5 +echo $ECHO_N "checking for a BSD-compatible install... $ECHO_C" >&6; } +if test -z "$INSTALL"; then +if test "${ac_cv_path_install+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + # Account for people who put trailing slashes in PATH elements. +case $as_dir/ in + ./ | .// | /cC/* | \ + /etc/* | /usr/sbin/* | /usr/etc/* | /sbin/* | /usr/afsws/bin/* | \ + ?:\\/os2\\/install\\/* | ?:\\/OS2\\/INSTALL\\/* | \ + /usr/ucb/* ) ;; + *) + # OSF1 and SCO ODT 3.0 have their own names for install. + # Don't use installbsd from OSF since it installs stuff as root + # by default. + for ac_prog in ginstall scoinst install; do + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_prog$ac_exec_ext" && $as_test_x "$as_dir/$ac_prog$ac_exec_ext"; }; then + if test $ac_prog = install && + grep dspmsg "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then + # AIX install. It has an incompatible calling convention. + : + elif test $ac_prog = install && + grep pwplus "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then + # program-specific install script used by HP pwplus--don't use. + : + else + ac_cv_path_install="$as_dir/$ac_prog$ac_exec_ext -c" + break 3 + fi + fi + done + done + ;; +esac +done +IFS=$as_save_IFS + + +fi + if test "${ac_cv_path_install+set}" = set; then + INSTALL=$ac_cv_path_install + else + # As a last resort, use the slow shell script. Don't cache a + # value for INSTALL within a source directory, because that will + # break other packages using the cache if that directory is + # removed, or if the value is a relative name. + INSTALL=$ac_install_sh + fi +fi +{ echo "$as_me:$LINENO: result: $INSTALL" >&5 +echo "${ECHO_T}$INSTALL" >&6; } + +# Use test -z because SunOS4 sh mishandles braces in ${var-val}. +# It thinks the first close brace ends the variable substitution. +test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}' + +test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL}' + +test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' + +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. +set dummy ${ac_tool_prefix}ranlib; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_RANLIB+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$RANLIB"; then + ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +RANLIB=$ac_cv_prog_RANLIB +if test -n "$RANLIB"; then + { echo "$as_me:$LINENO: result: $RANLIB" >&5 +echo "${ECHO_T}$RANLIB" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_RANLIB"; then + ac_ct_RANLIB=$RANLIB + # Extract the first word of "ranlib", so it can be a program name with args. +set dummy ranlib; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_RANLIB+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_RANLIB"; then + ac_cv_prog_ac_ct_RANLIB="$ac_ct_RANLIB" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_RANLIB="ranlib" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_RANLIB=$ac_cv_prog_ac_ct_RANLIB +if test -n "$ac_ct_RANLIB"; then + { echo "$as_me:$LINENO: result: $ac_ct_RANLIB" >&5 +echo "${ECHO_T}$ac_ct_RANLIB" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + if test "x$ac_ct_RANLIB" = x; then + RANLIB=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + RANLIB=$ac_ct_RANLIB + fi +else + RANLIB="$ac_cv_prog_RANLIB" +fi + + +# Extract the first word of "strip", so it can be a program name with args. +set dummy strip; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_STRIP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$STRIP"; then + ac_cv_prog_STRIP="$STRIP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_STRIP="strip" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_STRIP" && ac_cv_prog_STRIP=":" +fi +fi +STRIP=$ac_cv_prog_STRIP +if test -n "$STRIP"; then + { echo "$as_me:$LINENO: result: $STRIP" >&5 +echo "${ECHO_T}$STRIP" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + + +# Check whether --enable-shared was given. +if test "${enable_shared+set}" = set; then + enableval=$enable_shared; p=${PACKAGE-default} +case $enableval in +yes) enable_shared=yes ;; +no) enable_shared=no ;; +*) + enable_shared=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_shared=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac +else + enable_shared=yes +fi + +# Check whether --enable-static was given. +if test "${enable_static+set}" = set; then + enableval=$enable_static; p=${PACKAGE-default} +case $enableval in +yes) enable_static=yes ;; +no) enable_static=no ;; +*) + enable_static=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_static=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac +else + enable_static=yes +fi + +# Check whether --enable-fast-install was given. +if test "${enable_fast_install+set}" = set; then + enableval=$enable_fast_install; p=${PACKAGE-default} +case $enableval in +yes) enable_fast_install=yes ;; +no) enable_fast_install=no ;; +*) + enable_fast_install=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_fast_install=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac +else + enable_fast_install=yes +fi + +# Make sure we can run config.sub. +$SHELL "$ac_aux_dir/config.sub" sun4 >/dev/null 2>&1 || + { { echo "$as_me:$LINENO: error: cannot run $SHELL $ac_aux_dir/config.sub" >&5 +echo "$as_me: error: cannot run $SHELL $ac_aux_dir/config.sub" >&2;} + { (exit 1); exit 1; }; } + +{ echo "$as_me:$LINENO: checking build system type" >&5 +echo $ECHO_N "checking build system type... $ECHO_C" >&6; } +if test "${ac_cv_build+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_build_alias=$build_alias +test "x$ac_build_alias" = x && + ac_build_alias=`$SHELL "$ac_aux_dir/config.guess"` +test "x$ac_build_alias" = x && + { { echo "$as_me:$LINENO: error: cannot guess build type; you must specify one" >&5 +echo "$as_me: error: cannot guess build type; you must specify one" >&2;} + { (exit 1); exit 1; }; } +ac_cv_build=`$SHELL "$ac_aux_dir/config.sub" $ac_build_alias` || + { { echo "$as_me:$LINENO: error: $SHELL $ac_aux_dir/config.sub $ac_build_alias failed" >&5 +echo "$as_me: error: $SHELL $ac_aux_dir/config.sub $ac_build_alias failed" >&2;} + { (exit 1); exit 1; }; } + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_build" >&5 +echo "${ECHO_T}$ac_cv_build" >&6; } +case $ac_cv_build in +*-*-*) ;; +*) { { echo "$as_me:$LINENO: error: invalid value of canonical build" >&5 +echo "$as_me: error: invalid value of canonical build" >&2;} + { (exit 1); exit 1; }; };; +esac +build=$ac_cv_build +ac_save_IFS=$IFS; IFS='-' +set x $ac_cv_build +shift +build_cpu=$1 +build_vendor=$2 +shift; shift +# Remember, the first character of IFS is used to create $*, +# except with old shells: +build_os=$* +IFS=$ac_save_IFS +case $build_os in *\ *) build_os=`echo "$build_os" | sed 's/ /-/g'`;; esac + + +{ echo "$as_me:$LINENO: checking host system type" >&5 +echo $ECHO_N "checking host system type... $ECHO_C" >&6; } +if test "${ac_cv_host+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "x$host_alias" = x; then + ac_cv_host=$ac_cv_build +else + ac_cv_host=`$SHELL "$ac_aux_dir/config.sub" $host_alias` || + { { echo "$as_me:$LINENO: error: $SHELL $ac_aux_dir/config.sub $host_alias failed" >&5 +echo "$as_me: error: $SHELL $ac_aux_dir/config.sub $host_alias failed" >&2;} + { (exit 1); exit 1; }; } +fi + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_host" >&5 +echo "${ECHO_T}$ac_cv_host" >&6; } +case $ac_cv_host in +*-*-*) ;; +*) { { echo "$as_me:$LINENO: error: invalid value of canonical host" >&5 +echo "$as_me: error: invalid value of canonical host" >&2;} + { (exit 1); exit 1; }; };; +esac +host=$ac_cv_host +ac_save_IFS=$IFS; IFS='-' +set x $ac_cv_host +shift +host_cpu=$1 +host_vendor=$2 +shift; shift +# Remember, the first character of IFS is used to create $*, +# except with old shells: +host_os=$* +IFS=$ac_save_IFS +case $host_os in *\ *) host_os=`echo "$host_os" | sed 's/ /-/g'`;; esac + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}gcc", so it can be a program name with args. +set dummy ${ac_tool_prefix}gcc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="${ac_tool_prefix}gcc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_CC"; then + ac_ct_CC=$CC + # Extract the first word of "gcc", so it can be a program name with args. +set dummy gcc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_CC="gcc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 +echo "${ECHO_T}$ac_ct_CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +else + CC="$ac_cv_prog_CC" +fi + +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}cc", so it can be a program name with args. +set dummy ${ac_tool_prefix}cc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="${ac_tool_prefix}cc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + fi +fi +if test -z "$CC"; then + # Extract the first word of "cc", so it can be a program name with args. +set dummy cc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else + ac_prog_rejected=no +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then + ac_prog_rejected=yes + continue + fi + ac_cv_prog_CC="cc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +if test $ac_prog_rejected = yes; then + # We found a bogon in the path, so make sure we never use it. + set dummy $ac_cv_prog_CC + shift + if test $# != 0; then + # We chose a different compiler from the bogus one. + # However, it has the same basename, so the bogon will be chosen + # first if we set CC to just the basename; use the full file name. + shift + ac_cv_prog_CC="$as_dir/$ac_word${1+' '}$@" + fi +fi +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + for ac_prog in cl.exe + do + # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. +set dummy $ac_tool_prefix$ac_prog; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="$ac_tool_prefix$ac_prog" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + test -n "$CC" && break + done +fi +if test -z "$CC"; then + ac_ct_CC=$CC + for ac_prog in cl.exe +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_CC="$ac_prog" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 +echo "${ECHO_T}$ac_ct_CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + test -n "$ac_ct_CC" && break +done + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +fi + +fi + + +test -z "$CC" && { { echo "$as_me:$LINENO: error: no acceptable C compiler found in \$PATH +See \`config.log' for more details." >&5 +echo "$as_me: error: no acceptable C compiler found in \$PATH +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } + +# Provide some information about the compiler. +echo "$as_me:$LINENO: checking for C compiler version" >&5 +ac_compiler=`set X $ac_compile; echo $2` +{ (ac_try="$ac_compiler --version >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compiler --version >&5") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } +{ (ac_try="$ac_compiler -v >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compiler -v >&5") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } +{ (ac_try="$ac_compiler -V >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compiler -V >&5") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } + +{ echo "$as_me:$LINENO: checking whether we are using the GNU C compiler" >&5 +echo $ECHO_N "checking whether we are using the GNU C compiler... $ECHO_C" >&6; } +if test "${ac_cv_c_compiler_gnu+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ +#ifndef __GNUC__ + choke me +#endif + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_compiler_gnu=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_compiler_gnu=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +ac_cv_c_compiler_gnu=$ac_compiler_gnu + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_c_compiler_gnu" >&5 +echo "${ECHO_T}$ac_cv_c_compiler_gnu" >&6; } +GCC=`test $ac_compiler_gnu = yes && echo yes` +ac_test_CFLAGS=${CFLAGS+set} +ac_save_CFLAGS=$CFLAGS +{ echo "$as_me:$LINENO: checking whether $CC accepts -g" >&5 +echo $ECHO_N "checking whether $CC accepts -g... $ECHO_C" >&6; } +if test "${ac_cv_prog_cc_g+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_save_c_werror_flag=$ac_c_werror_flag + ac_c_werror_flag=yes + ac_cv_prog_cc_g=no + CFLAGS="-g" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_prog_cc_g=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + CFLAGS="" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_c_werror_flag=$ac_save_c_werror_flag + CFLAGS="-g" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_prog_cc_g=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + ac_c_werror_flag=$ac_save_c_werror_flag +fi +{ echo "$as_me:$LINENO: result: $ac_cv_prog_cc_g" >&5 +echo "${ECHO_T}$ac_cv_prog_cc_g" >&6; } +if test "$ac_test_CFLAGS" = set; then + CFLAGS=$ac_save_CFLAGS +elif test $ac_cv_prog_cc_g = yes; then + if test "$GCC" = yes; then + CFLAGS="-g -O2" + else + CFLAGS="-g" + fi +else + if test "$GCC" = yes; then + CFLAGS="-O2" + else + CFLAGS= + fi +fi +{ echo "$as_me:$LINENO: checking for $CC option to accept ISO C89" >&5 +echo $ECHO_N "checking for $CC option to accept ISO C89... $ECHO_C" >&6; } +if test "${ac_cv_prog_cc_c89+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_cv_prog_cc_c89=no +ac_save_CC=$CC +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#include +#include +/* Most of the following tests are stolen from RCS 5.7's src/conf.sh. */ +struct buf { int x; }; +FILE * (*rcsopen) (struct buf *, struct stat *, int); +static char *e (p, i) + char **p; + int i; +{ + return p[i]; +} +static char *f (char * (*g) (char **, int), char **p, ...) +{ + char *s; + va_list v; + va_start (v,p); + s = g (p, va_arg (v,int)); + va_end (v); + return s; +} + +/* OSF 4.0 Compaq cc is some sort of almost-ANSI by default. It has + function prototypes and stuff, but not '\xHH' hex character constants. + These don't provoke an error unfortunately, instead are silently treated + as 'x'. The following induces an error, until -std is added to get + proper ANSI mode. Curiously '\x00'!='x' always comes out true, for an + array size at least. It's necessary to write '\x00'==0 to get something + that's true only with -std. */ +int osf4_cc_array ['\x00' == 0 ? 1 : -1]; + +/* IBM C 6 for AIX is almost-ANSI by default, but it replaces macro parameters + inside strings and character constants. */ +#define FOO(x) 'x' +int xlc6_cc_array[FOO(a) == 'x' ? 1 : -1]; + +int test (int i, double x); +struct s1 {int (*f) (int a);}; +struct s2 {int (*f) (double a);}; +int pairnames (int, char **, FILE *(*)(struct buf *, struct stat *, int), int, int); +int argc; +char **argv; +int +main () +{ +return f (e, argv, 0) != argv[0] || f (e, argv, 1) != argv[1]; + ; + return 0; +} +_ACEOF +for ac_arg in '' -qlanglvl=extc89 -qlanglvl=ansi -std \ + -Ae "-Aa -D_HPUX_SOURCE" "-Xc -D__EXTENSIONS__" +do + CC="$ac_save_CC $ac_arg" + rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_prog_cc_c89=$ac_arg +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext + test "x$ac_cv_prog_cc_c89" != "xno" && break +done +rm -f conftest.$ac_ext +CC=$ac_save_CC + +fi +# AC_CACHE_VAL +case "x$ac_cv_prog_cc_c89" in + x) + { echo "$as_me:$LINENO: result: none needed" >&5 +echo "${ECHO_T}none needed" >&6; } ;; + xno) + { echo "$as_me:$LINENO: result: unsupported" >&5 +echo "${ECHO_T}unsupported" >&6; } ;; + *) + CC="$CC $ac_cv_prog_cc_c89" + { echo "$as_me:$LINENO: result: $ac_cv_prog_cc_c89" >&5 +echo "${ECHO_T}$ac_cv_prog_cc_c89" >&6; } ;; +esac + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + +# Find the correct PATH separator. Usually this is `:', but +# DJGPP uses `;' like DOS. +if test "X${PATH_SEPARATOR+set}" != Xset; then + UNAME=${UNAME-`uname 2>/dev/null`} + case X$UNAME in + *-DOS) lt_cv_sys_path_separator=';' ;; + *) lt_cv_sys_path_separator=':' ;; + esac + PATH_SEPARATOR=$lt_cv_sys_path_separator +fi + + +# Check whether --with-gnu-ld was given. +if test "${with_gnu_ld+set}" = set; then + withval=$with_gnu_ld; test "$withval" = no || with_gnu_ld=yes +else + with_gnu_ld=no +fi + +ac_prog=ld +if test "$GCC" = yes; then + # Check if gcc -print-prog-name=ld gives a path. + { echo "$as_me:$LINENO: checking for ld used by GCC" >&5 +echo $ECHO_N "checking for ld used by GCC... $ECHO_C" >&6; } + case $host in + *-*-mingw*) + # gcc leaves a trailing carriage return which upsets mingw + ac_prog=`($CC -print-prog-name=ld) 2>&5 | tr -d '\015'` ;; + *) + ac_prog=`($CC -print-prog-name=ld) 2>&5` ;; + esac + case $ac_prog in + # Accept absolute paths. + [\\/]* | [A-Za-z]:[\\/]*) + re_direlt='/[^/][^/]*/\.\./' + # Canonicalize the path of ld + ac_prog=`echo $ac_prog| sed 's%\\\\%/%g'` + while echo $ac_prog | grep "$re_direlt" > /dev/null 2>&1; do + ac_prog=`echo $ac_prog| sed "s%$re_direlt%/%"` + done + test -z "$LD" && LD="$ac_prog" + ;; + "") + # If it fails, then pretend we aren't using GCC. + ac_prog=ld + ;; + *) + # If it is relative, then search for the first ld in PATH. + with_gnu_ld=unknown + ;; + esac +elif test "$with_gnu_ld" = yes; then + { echo "$as_me:$LINENO: checking for GNU ld" >&5 +echo $ECHO_N "checking for GNU ld... $ECHO_C" >&6; } +else + { echo "$as_me:$LINENO: checking for non-GNU ld" >&5 +echo $ECHO_N "checking for non-GNU ld... $ECHO_C" >&6; } +fi +if test "${lt_cv_path_LD+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -z "$LD"; then + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for ac_dir in $PATH; do + test -z "$ac_dir" && ac_dir=. + if test -f "$ac_dir/$ac_prog" || test -f "$ac_dir/$ac_prog$ac_exeext"; then + lt_cv_path_LD="$ac_dir/$ac_prog" + # Check to see if the program is GNU ld. I'd rather use --version, + # but apparently some GNU ld's only accept -v. + # Break only if it was the GNU/non-GNU ld that we prefer. + if "$lt_cv_path_LD" -v 2>&1 < /dev/null | egrep '(GNU|with BFD)' > /dev/null; then + test "$with_gnu_ld" != no && break + else + test "$with_gnu_ld" != yes && break + fi + fi + done + IFS="$ac_save_ifs" +else + lt_cv_path_LD="$LD" # Let the user override the test with a path. +fi +fi + +LD="$lt_cv_path_LD" +if test -n "$LD"; then + { echo "$as_me:$LINENO: result: $LD" >&5 +echo "${ECHO_T}$LD" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi +test -z "$LD" && { { echo "$as_me:$LINENO: error: no acceptable ld found in \$PATH" >&5 +echo "$as_me: error: no acceptable ld found in \$PATH" >&2;} + { (exit 1); exit 1; }; } +{ echo "$as_me:$LINENO: checking if the linker ($LD) is GNU ld" >&5 +echo $ECHO_N "checking if the linker ($LD) is GNU ld... $ECHO_C" >&6; } +if test "${lt_cv_prog_gnu_ld+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + # I'd rather use --version here, but apparently some GNU ld's only accept -v. +if $LD -v 2>&1 &5; then + lt_cv_prog_gnu_ld=yes +else + lt_cv_prog_gnu_ld=no +fi +fi +{ echo "$as_me:$LINENO: result: $lt_cv_prog_gnu_ld" >&5 +echo "${ECHO_T}$lt_cv_prog_gnu_ld" >&6; } +with_gnu_ld=$lt_cv_prog_gnu_ld + + +{ echo "$as_me:$LINENO: checking for $LD option to reload object files" >&5 +echo $ECHO_N "checking for $LD option to reload object files... $ECHO_C" >&6; } +if test "${lt_cv_ld_reload_flag+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + lt_cv_ld_reload_flag='-r' +fi +{ echo "$as_me:$LINENO: result: $lt_cv_ld_reload_flag" >&5 +echo "${ECHO_T}$lt_cv_ld_reload_flag" >&6; } +reload_flag=$lt_cv_ld_reload_flag +test -n "$reload_flag" && reload_flag=" $reload_flag" + +{ echo "$as_me:$LINENO: checking for BSD-compatible nm" >&5 +echo $ECHO_N "checking for BSD-compatible nm... $ECHO_C" >&6; } +if test "${lt_cv_path_NM+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$NM"; then + # Let the user override the test. + lt_cv_path_NM="$NM" +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for ac_dir in $PATH /usr/ccs/bin /usr/ucb /bin; do + test -z "$ac_dir" && ac_dir=. + tmp_nm=$ac_dir/${ac_tool_prefix}nm + if test -f $tmp_nm || test -f $tmp_nm$ac_exeext ; then + # Check to see if the nm accepts a BSD-compat flag. + # Adding the `sed 1q' prevents false positives on HP-UX, which says: + # nm: unknown option "B" ignored + # Tru64's nm complains that /dev/null is an invalid object file + if ($tmp_nm -B /dev/null 2>&1 | sed '1q'; exit 0) | egrep '(/dev/null|Invalid file or object type)' >/dev/null; then + lt_cv_path_NM="$tmp_nm -B" + break + elif ($tmp_nm -p /dev/null 2>&1 | sed '1q'; exit 0) | egrep /dev/null >/dev/null; then + lt_cv_path_NM="$tmp_nm -p" + break + else + lt_cv_path_NM=${lt_cv_path_NM="$tmp_nm"} # keep the first match, but + continue # so that we can try to find one that supports BSD flags + fi + fi + done + IFS="$ac_save_ifs" + test -z "$lt_cv_path_NM" && lt_cv_path_NM=nm +fi +fi + +NM="$lt_cv_path_NM" +{ echo "$as_me:$LINENO: result: $NM" >&5 +echo "${ECHO_T}$NM" >&6; } + +{ echo "$as_me:$LINENO: checking whether ln -s works" >&5 +echo $ECHO_N "checking whether ln -s works... $ECHO_C" >&6; } +LN_S=$as_ln_s +if test "$LN_S" = "ln -s"; then + { echo "$as_me:$LINENO: result: yes" >&5 +echo "${ECHO_T}yes" >&6; } +else + { echo "$as_me:$LINENO: result: no, using $LN_S" >&5 +echo "${ECHO_T}no, using $LN_S" >&6; } +fi + +{ echo "$as_me:$LINENO: checking how to recognise dependant libraries" >&5 +echo $ECHO_N "checking how to recognise dependant libraries... $ECHO_C" >&6; } +if test "${lt_cv_deplibs_check_method+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + lt_cv_file_magic_cmd='$MAGIC_CMD' +lt_cv_file_magic_test_file= +lt_cv_deplibs_check_method='unknown' +# Need to set the preceding variable on all platforms that support +# interlibrary dependencies. +# 'none' -- dependencies not supported. +# `unknown' -- same as none, but documents that we really don't know. +# 'pass_all' -- all dependencies passed with no checks. +# 'test_compile' -- check by making test program. +# 'file_magic [[regex]]' -- check by looking for files in library path +# which responds to the $file_magic_cmd with a given egrep regex. +# If you have `file' or equivalent on your system and you're not sure +# whether `pass_all' will *always* work, you probably want this one. + +case $host_os in +aix4* | aix5*) + lt_cv_deplibs_check_method=pass_all + ;; + +beos*) + lt_cv_deplibs_check_method=pass_all + ;; + +bsdi4*) + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (shared object|dynamic lib)' + lt_cv_file_magic_cmd='/usr/bin/file -L' + lt_cv_file_magic_test_file=/shlib/libc.so + ;; + +cygwin* | mingw* | pw32*) + lt_cv_deplibs_check_method='file_magic file format pei*-i386(.*architecture: i386)?' + lt_cv_file_magic_cmd='$OBJDUMP -f' + ;; + +darwin* | rhapsody*) + lt_cv_deplibs_check_method='file_magic Mach-O dynamically linked shared library' + lt_cv_file_magic_cmd='/usr/bin/file -L' + case "$host_os" in + rhapsody* | darwin1.[012]) + lt_cv_file_magic_test_file=`echo /System/Library/Frameworks/System.framework/Versions/*/System | head -1` + ;; + *) # Darwin 1.3 on + lt_cv_file_magic_test_file='/usr/lib/libSystem.dylib' + ;; + esac + ;; + +freebsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ > /dev/null; then + case $host_cpu in + i*86 ) + # Not sure whether the presence of OpenBSD here was a mistake. + # Let's accept both of them until this is cleared up. + lt_cv_deplibs_check_method='file_magic (FreeBSD|OpenBSD)/i[3-9]86 (compact )?demand paged shared library' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` + ;; + esac + else + lt_cv_deplibs_check_method=pass_all + fi + ;; + +gnu*) + lt_cv_deplibs_check_method=pass_all + ;; + +hpux10.20*|hpux11*) + lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9].[0-9]) shared library' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=/usr/lib/libc.sl + ;; + +irix5* | irix6* | nonstopux*) + case $host_os in + irix5* | nonstopux*) + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method="file_magic ELF 32-bit MSB dynamic lib MIPS - version 1" + ;; + *) + case $LD in + *-32|*"-32 ") libmagic=32-bit;; + *-n32|*"-n32 ") libmagic=N32;; + *-64|*"-64 ") libmagic=64-bit;; + *) libmagic=never-match;; + esac + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method="file_magic ELF ${libmagic} MSB mips-[1234] dynamic lib MIPS - version 1" + ;; + esac + lt_cv_file_magic_test_file=`echo /lib${libsuff}/libc.so*` + lt_cv_deplibs_check_method=pass_all + ;; + +# This must be Linux ELF. +linux-gnu*) + case $host_cpu in + alpha* | hppa* | i*86 | powerpc* | sparc* | ia64* ) + lt_cv_deplibs_check_method=pass_all ;; + *) + # glibc up to 2.1.1 does not perform some relocations on ARM + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' ;; + esac + lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so` + ;; + +netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ > /dev/null; then + lt_cv_deplibs_check_method='match_pattern /lib[^/\.]+\.so\.[0-9]+\.[0-9]+$' + else + lt_cv_deplibs_check_method='match_pattern /lib[^/\.]+\.so$' + fi + ;; + +newos6*) + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (executable|dynamic lib)' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=/usr/lib/libnls.so + ;; + +openbsd*) + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` + if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB shared object' + else + lt_cv_deplibs_check_method='file_magic OpenBSD.* shared library' + fi + ;; + +osf3* | osf4* | osf5*) + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method='file_magic COFF format alpha shared library' + lt_cv_file_magic_test_file=/shlib/libc.so + lt_cv_deplibs_check_method=pass_all + ;; + +sco3.2v5*) + lt_cv_deplibs_check_method=pass_all + ;; + +solaris*) + lt_cv_deplibs_check_method=pass_all + lt_cv_file_magic_test_file=/lib/libc.so + ;; + +sysv5uw[78]* | sysv4*uw2*) + lt_cv_deplibs_check_method=pass_all + ;; + +sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + case $host_vendor in + motorola) + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (shared object|dynamic lib) M[0-9][0-9]* Version [0-9]' + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so*` + ;; + ncr) + lt_cv_deplibs_check_method=pass_all + ;; + sequent) + lt_cv_file_magic_cmd='/bin/file' + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' + ;; + sni) + lt_cv_file_magic_cmd='/bin/file' + lt_cv_deplibs_check_method="file_magic ELF [0-9][0-9]*-bit [LM]SB dynamic lib" + lt_cv_file_magic_test_file=/lib/libc.so + ;; + esac + ;; +esac + +fi +{ echo "$as_me:$LINENO: result: $lt_cv_deplibs_check_method" >&5 +echo "${ECHO_T}$lt_cv_deplibs_check_method" >&6; } +file_magic_cmd=$lt_cv_file_magic_cmd +deplibs_check_method=$lt_cv_deplibs_check_method + + + + + + + + +# Check for command to grab the raw symbol name followed by C symbol from nm. +{ echo "$as_me:$LINENO: checking command to parse $NM output" >&5 +echo $ECHO_N "checking command to parse $NM output... $ECHO_C" >&6; } +if test "${lt_cv_sys_global_symbol_pipe+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + +# These are sane defaults that work on at least a few old systems. +# [They come from Ultrix. What could be older than Ultrix?!! ;)] + +# Character class describing NM global symbol codes. +symcode='[BCDEGRST]' + +# Regexp to match symbols that can be accessed directly from C. +sympat='\([_A-Za-z][_A-Za-z0-9]*\)' + +# Transform the above into a raw symbol and a C symbol. +symxfrm='\1 \2\3 \3' + +# Transform an extracted symbol line into a proper C declaration +lt_cv_global_symbol_to_cdecl="sed -n -e 's/^. .* \(.*\)$/extern char \1;/p'" + +# Transform an extracted symbol line into symbol name and symbol address +lt_cv_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\) $/ {\\\"\1\\\", (lt_ptr) 0},/p' -e 's/^$symcode \([^ ]*\) \([^ ]*\)$/ {\"\2\", (lt_ptr) \&\2},/p'" + +# Define system-specific variables. +case $host_os in +aix*) + symcode='[BCDT]' + ;; +cygwin* | mingw* | pw32*) + symcode='[ABCDGISTW]' + ;; +hpux*) # Its linker distinguishes data from code symbols + lt_cv_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern char \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'" + lt_cv_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\) $/ {\\\"\1\\\", (lt_ptr) 0},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/ {\"\2\", (lt_ptr) \&\2},/p'" + ;; +irix* | nonstopux*) + symcode='[BCDEGRST]' + ;; +solaris* | sysv5*) + symcode='[BDT]' + ;; +sysv4) + symcode='[DFNSTU]' + ;; +esac + +# Handle CRLF in mingw tool chain +opt_cr= +case $host_os in +mingw*) + opt_cr=`echo 'x\{0,1\}' | tr x '\015'` # option cr in regexp + ;; +esac + +# If we're using GNU nm, then use its standard symbol codes. +if $NM -V 2>&1 | egrep '(GNU|with BFD)' > /dev/null; then + symcode='[ABCDGISTW]' +fi + +# Try without a prefix undercore, then with it. +for ac_symprfx in "" "_"; do + + # Write the raw and C identifiers. +lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[ ]\($symcode$symcode*\)[ ][ ]*\($ac_symprfx\)$sympat$opt_cr$/$symxfrm/p'" + + # Check to see that the pipe works correctly. + pipe_works=no + rm -f conftest* + cat > conftest.$ac_ext <&5 + (eval $ac_compile) 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; then + # Now try to grab the symbols. + nlist=conftest.nm + if { (eval echo "$as_me:$LINENO: \"$NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist\"") >&5 + (eval $NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist) 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && test -s "$nlist"; then + # Try sorting and uniquifying the output. + if sort "$nlist" | uniq > "$nlist"T; then + mv -f "$nlist"T "$nlist" + else + rm -f "$nlist"T + fi + + # Make sure that we snagged all the symbols we need. + if egrep ' nm_test_var$' "$nlist" >/dev/null; then + if egrep ' nm_test_func$' "$nlist" >/dev/null; then + cat < conftest.$ac_ext +#ifdef __cplusplus +extern "C" { +#endif + +EOF + # Now generate the symbol file. + eval "$lt_cv_global_symbol_to_cdecl"' < "$nlist" >> conftest.$ac_ext' + + cat <> conftest.$ac_ext +#if defined (__STDC__) && __STDC__ +# define lt_ptr void * +#else +# define lt_ptr char * +# define const +#endif + +/* The mapping between symbol names and symbols. */ +const struct { + const char *name; + lt_ptr address; +} +lt_preloaded_symbols[] = +{ +EOF + sed "s/^$symcode$symcode* \(.*\) \(.*\)$/ {\"\2\", (lt_ptr) \&\2},/" < "$nlist" >> conftest.$ac_ext + cat <<\EOF >> conftest.$ac_ext + {0, (lt_ptr) 0} +}; + +#ifdef __cplusplus +} +#endif +EOF + # Now try linking the two files. + mv conftest.$ac_objext conftstm.$ac_objext + save_LIBS="$LIBS" + save_CFLAGS="$CFLAGS" + LIBS="conftstm.$ac_objext" + CFLAGS="$CFLAGS$no_builtin_flag" + if { (eval echo "$as_me:$LINENO: \"$ac_link\"") >&5 + (eval $ac_link) 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && test -s conftest; then + pipe_works=yes + fi + LIBS="$save_LIBS" + CFLAGS="$save_CFLAGS" + else + echo "cannot find nm_test_func in $nlist" >&5 + fi + else + echo "cannot find nm_test_var in $nlist" >&5 + fi + else + echo "cannot run $lt_cv_sys_global_symbol_pipe" >&5 + fi + else + echo "$progname: failed program was:" >&5 + cat conftest.$ac_ext >&5 + fi + rm -f conftest* conftst* + + # Do not use the global_symbol_pipe unless it works. + if test "$pipe_works" = yes; then + break + else + lt_cv_sys_global_symbol_pipe= + fi +done + +fi + +global_symbol_pipe="$lt_cv_sys_global_symbol_pipe" +if test -z "$lt_cv_sys_global_symbol_pipe"; then + global_symbol_to_cdecl= + global_symbol_to_c_name_address= +else + global_symbol_to_cdecl="$lt_cv_global_symbol_to_cdecl" + global_symbol_to_c_name_address="$lt_cv_global_symbol_to_c_name_address" +fi +if test -z "$global_symbol_pipe$global_symbol_to_cdec$global_symbol_to_c_name_address"; +then + { echo "$as_me:$LINENO: result: failed" >&5 +echo "${ECHO_T}failed" >&6; } +else + { echo "$as_me:$LINENO: result: ok" >&5 +echo "${ECHO_T}ok" >&6; } +fi + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu +{ echo "$as_me:$LINENO: checking how to run the C preprocessor" >&5 +echo $ECHO_N "checking how to run the C preprocessor... $ECHO_C" >&6; } +# On Suns, sometimes $CPP names a directory. +if test -n "$CPP" && test -d "$CPP"; then + CPP= +fi +if test -z "$CPP"; then + if test "${ac_cv_prog_CPP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + # Double quotes because CPP needs to be expanded + for CPP in "$CC -E" "$CC -E -traditional-cpp" "/lib/cpp" + do + ac_preproc_ok=false +for ac_c_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Broken: fails on valid input. +continue +fi + +rm -f conftest.err conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then + # Broken: success on invalid input. +continue +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Passes both tests. +ac_preproc_ok=: +break +fi + +rm -f conftest.err conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.err conftest.$ac_ext +if $ac_preproc_ok; then + break +fi + + done + ac_cv_prog_CPP=$CPP + +fi + CPP=$ac_cv_prog_CPP +else + ac_cv_prog_CPP=$CPP +fi +{ echo "$as_me:$LINENO: result: $CPP" >&5 +echo "${ECHO_T}$CPP" >&6; } +ac_preproc_ok=false +for ac_c_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Broken: fails on valid input. +continue +fi + +rm -f conftest.err conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then + # Broken: success on invalid input. +continue +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Passes both tests. +ac_preproc_ok=: +break +fi + +rm -f conftest.err conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.err conftest.$ac_ext +if $ac_preproc_ok; then + : +else + { { echo "$as_me:$LINENO: error: C preprocessor \"$CPP\" fails sanity check +See \`config.log' for more details." >&5 +echo "$as_me: error: C preprocessor \"$CPP\" fails sanity check +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } +fi + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + +{ echo "$as_me:$LINENO: checking for grep that handles long lines and -e" >&5 +echo $ECHO_N "checking for grep that handles long lines and -e... $ECHO_C" >&6; } +if test "${ac_cv_path_GREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + # Extract the first word of "grep ggrep" to use in msg output +if test -z "$GREP"; then +set dummy grep ggrep; ac_prog_name=$2 +if test "${ac_cv_path_GREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_path_GREP_found=false +# Loop through the user's path and test for each of PROGNAME-LIST +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in grep ggrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_GREP="$as_dir/$ac_prog$ac_exec_ext" + { test -f "$ac_path_GREP" && $as_test_x "$ac_path_GREP"; } || continue + # Check for GNU ac_path_GREP and select it if it is found. + # Check for GNU $ac_path_GREP +case `"$ac_path_GREP" --version 2>&1` in +*GNU*) + ac_cv_path_GREP="$ac_path_GREP" ac_path_GREP_found=:;; +*) + ac_count=0 + echo $ECHO_N "0123456789$ECHO_C" >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + echo 'GREP' >> "conftest.nl" + "$ac_path_GREP" -e 'GREP$' -e '-(cannot match)-' < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + ac_count=`expr $ac_count + 1` + if test $ac_count -gt ${ac_path_GREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_GREP="$ac_path_GREP" + ac_path_GREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + + $ac_path_GREP_found && break 3 + done +done + +done +IFS=$as_save_IFS + + +fi + +GREP="$ac_cv_path_GREP" +if test -z "$GREP"; then + { { echo "$as_me:$LINENO: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&5 +echo "$as_me: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&2;} + { (exit 1); exit 1; }; } +fi + +else + ac_cv_path_GREP=$GREP +fi + + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_path_GREP" >&5 +echo "${ECHO_T}$ac_cv_path_GREP" >&6; } + GREP="$ac_cv_path_GREP" + + +{ echo "$as_me:$LINENO: checking for egrep" >&5 +echo $ECHO_N "checking for egrep... $ECHO_C" >&6; } +if test "${ac_cv_path_EGREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if echo a | $GREP -E '(a|b)' >/dev/null 2>&1 + then ac_cv_path_EGREP="$GREP -E" + else + # Extract the first word of "egrep" to use in msg output +if test -z "$EGREP"; then +set dummy egrep; ac_prog_name=$2 +if test "${ac_cv_path_EGREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_path_EGREP_found=false +# Loop through the user's path and test for each of PROGNAME-LIST +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in egrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_EGREP="$as_dir/$ac_prog$ac_exec_ext" + { test -f "$ac_path_EGREP" && $as_test_x "$ac_path_EGREP"; } || continue + # Check for GNU ac_path_EGREP and select it if it is found. + # Check for GNU $ac_path_EGREP +case `"$ac_path_EGREP" --version 2>&1` in +*GNU*) + ac_cv_path_EGREP="$ac_path_EGREP" ac_path_EGREP_found=:;; +*) + ac_count=0 + echo $ECHO_N "0123456789$ECHO_C" >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + echo 'EGREP' >> "conftest.nl" + "$ac_path_EGREP" 'EGREP$' < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + ac_count=`expr $ac_count + 1` + if test $ac_count -gt ${ac_path_EGREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_EGREP="$ac_path_EGREP" + ac_path_EGREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + + $ac_path_EGREP_found && break 3 + done +done + +done +IFS=$as_save_IFS + + +fi + +EGREP="$ac_cv_path_EGREP" +if test -z "$EGREP"; then + { { echo "$as_me:$LINENO: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&5 +echo "$as_me: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&2;} + { (exit 1); exit 1; }; } +fi + +else + ac_cv_path_EGREP=$EGREP +fi + + + fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_path_EGREP" >&5 +echo "${ECHO_T}$ac_cv_path_EGREP" >&6; } + EGREP="$ac_cv_path_EGREP" + + +{ echo "$as_me:$LINENO: checking for ANSI C header files" >&5 +echo $ECHO_N "checking for ANSI C header files... $ECHO_C" >&6; } +if test "${ac_cv_header_stdc+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#include +#include + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_header_stdc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_header_stdc=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + +if test $ac_cv_header_stdc = yes; then + # SunOS 4.x string.h does not declare mem*, contrary to ANSI. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "memchr" >/dev/null 2>&1; then + : +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "free" >/dev/null 2>&1; then + : +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. + if test "$cross_compiling" = yes; then + : +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#if ((' ' & 0x0FF) == 0x020) +# define ISLOWER(c) ('a' <= (c) && (c) <= 'z') +# define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c)) +#else +# define ISLOWER(c) \ + (('a' <= (c) && (c) <= 'i') \ + || ('j' <= (c) && (c) <= 'r') \ + || ('s' <= (c) && (c) <= 'z')) +# define TOUPPER(c) (ISLOWER(c) ? ((c) | 0x40) : (c)) +#endif + +#define XOR(e, f) (((e) && !(f)) || (!(e) && (f))) +int +main () +{ + int i; + for (i = 0; i < 256; i++) + if (XOR (islower (i), ISLOWER (i)) + || toupper (i) != TOUPPER (i)) + return 2; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + : +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +ac_cv_header_stdc=no +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi + + +fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_stdc" >&5 +echo "${ECHO_T}$ac_cv_header_stdc" >&6; } +if test $ac_cv_header_stdc = yes; then + +cat >>confdefs.h <<\_ACEOF +#define STDC_HEADERS 1 +_ACEOF + +fi + +# On IRIX 5.3, sys/types and inttypes.h are conflicting. + + + + + + + + + +for ac_header in sys/types.h sys/stat.h stdlib.h string.h memory.h strings.h \ + inttypes.h stdint.h unistd.h +do +as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` +{ echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + +#include <$ac_header> +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + eval "$as_ac_Header=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_Header=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_Header'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 +_ACEOF + +fi + +done + + + +for ac_header in dlfcn.h +do +as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + { echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +else + # Is the header compilable? +{ echo "$as_me:$LINENO: checking $ac_header usability" >&5 +echo $ECHO_N "checking $ac_header usability... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +#include <$ac_header> +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_header_compiler=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_compiler=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 +echo "${ECHO_T}$ac_header_compiler" >&6; } + +# Is the header present? +{ echo "$as_me:$LINENO: checking $ac_header presence" >&5 +echo $ECHO_N "checking $ac_header presence... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include <$ac_header> +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then + ac_header_preproc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_preproc=no +fi + +rm -f conftest.err conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 +echo "${ECHO_T}$ac_header_preproc" >&6; } + +# So? What about this header? +case $ac_header_compiler:$ac_header_preproc:$ac_c_preproc_warn_flag in + yes:no: ) + { echo "$as_me:$LINENO: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&5 +echo "$as_me: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the compiler's result" >&5 +echo "$as_me: WARNING: $ac_header: proceeding with the compiler's result" >&2;} + ac_header_preproc=yes + ;; + no:yes:* ) + { echo "$as_me:$LINENO: WARNING: $ac_header: present but cannot be compiled" >&5 +echo "$as_me: WARNING: $ac_header: present but cannot be compiled" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: check for missing prerequisite headers?" >&5 +echo "$as_me: WARNING: $ac_header: check for missing prerequisite headers?" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: see the Autoconf documentation" >&5 +echo "$as_me: WARNING: $ac_header: see the Autoconf documentation" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&5 +echo "$as_me: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the preprocessor's result" >&5 +echo "$as_me: WARNING: $ac_header: proceeding with the preprocessor's result" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: in the future, the compiler will take precedence" >&5 +echo "$as_me: WARNING: $ac_header: in the future, the compiler will take precedence" >&2;} + + ;; +esac +{ echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + eval "$as_ac_Header=\$ac_header_preproc" +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } + +fi +if test `eval echo '${'$as_ac_Header'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 +_ACEOF + +fi + +done + + + + + +# Only perform the check for file, if the check method requires it +case $deplibs_check_method in +file_magic*) + if test "$file_magic_cmd" = '$MAGIC_CMD'; then + { echo "$as_me:$LINENO: checking for ${ac_tool_prefix}file" >&5 +echo $ECHO_N "checking for ${ac_tool_prefix}file... $ECHO_C" >&6; } +if test "${lt_cv_path_MAGIC_CMD+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + case $MAGIC_CMD in + /*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a path. + ;; + ?:/*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a dos path. + ;; + *) + ac_save_MAGIC_CMD="$MAGIC_CMD" + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="/usr/bin:$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/${ac_tool_prefix}file; then + lt_cv_path_MAGIC_CMD="$ac_dir/${ac_tool_prefix}file" + if test -n "$file_magic_test_file"; then + case $deplibs_check_method in + "file_magic "*) + file_magic_regex="`expr \"$deplibs_check_method\" : \"file_magic \(.*\)\"`" + MAGIC_CMD="$lt_cv_path_MAGIC_CMD" + if eval $file_magic_cmd \$file_magic_test_file 2> /dev/null | + egrep "$file_magic_regex" > /dev/null; then + : + else + cat <&2 + +*** Warning: the command libtool uses to detect shared libraries, +*** $file_magic_cmd, produces output that libtool cannot recognize. +*** The result is that libtool may fail to recognize shared libraries +*** as such. This will affect the creation of libtool libraries that +*** depend on shared libraries, but programs linked with such libtool +*** libraries will work regardless of this problem. Nevertheless, you +*** may want to report the problem to your system manager and/or to +*** bug-libtool@gnu.org + +EOF + fi ;; + esac + fi + break + fi + done + IFS="$ac_save_ifs" + MAGIC_CMD="$ac_save_MAGIC_CMD" + ;; +esac +fi + +MAGIC_CMD="$lt_cv_path_MAGIC_CMD" +if test -n "$MAGIC_CMD"; then + { echo "$as_me:$LINENO: result: $MAGIC_CMD" >&5 +echo "${ECHO_T}$MAGIC_CMD" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + +if test -z "$lt_cv_path_MAGIC_CMD"; then + if test -n "$ac_tool_prefix"; then + { echo "$as_me:$LINENO: checking for file" >&5 +echo $ECHO_N "checking for file... $ECHO_C" >&6; } +if test "${lt_cv_path_MAGIC_CMD+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + case $MAGIC_CMD in + /*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a path. + ;; + ?:/*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a dos path. + ;; + *) + ac_save_MAGIC_CMD="$MAGIC_CMD" + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="/usr/bin:$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/file; then + lt_cv_path_MAGIC_CMD="$ac_dir/file" + if test -n "$file_magic_test_file"; then + case $deplibs_check_method in + "file_magic "*) + file_magic_regex="`expr \"$deplibs_check_method\" : \"file_magic \(.*\)\"`" + MAGIC_CMD="$lt_cv_path_MAGIC_CMD" + if eval $file_magic_cmd \$file_magic_test_file 2> /dev/null | + egrep "$file_magic_regex" > /dev/null; then + : + else + cat <&2 + +*** Warning: the command libtool uses to detect shared libraries, +*** $file_magic_cmd, produces output that libtool cannot recognize. +*** The result is that libtool may fail to recognize shared libraries +*** as such. This will affect the creation of libtool libraries that +*** depend on shared libraries, but programs linked with such libtool +*** libraries will work regardless of this problem. Nevertheless, you +*** may want to report the problem to your system manager and/or to +*** bug-libtool@gnu.org + +EOF + fi ;; + esac + fi + break + fi + done + IFS="$ac_save_ifs" + MAGIC_CMD="$ac_save_MAGIC_CMD" + ;; +esac +fi + +MAGIC_CMD="$lt_cv_path_MAGIC_CMD" +if test -n "$MAGIC_CMD"; then + { echo "$as_me:$LINENO: result: $MAGIC_CMD" >&5 +echo "${ECHO_T}$MAGIC_CMD" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + else + MAGIC_CMD=: + fi +fi + + fi + ;; +esac + +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. +set dummy ${ac_tool_prefix}ranlib; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_RANLIB+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$RANLIB"; then + ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +RANLIB=$ac_cv_prog_RANLIB +if test -n "$RANLIB"; then + { echo "$as_me:$LINENO: result: $RANLIB" >&5 +echo "${ECHO_T}$RANLIB" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_RANLIB"; then + ac_ct_RANLIB=$RANLIB + # Extract the first word of "ranlib", so it can be a program name with args. +set dummy ranlib; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_RANLIB+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_RANLIB"; then + ac_cv_prog_ac_ct_RANLIB="$ac_ct_RANLIB" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_RANLIB="ranlib" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_RANLIB=$ac_cv_prog_ac_ct_RANLIB +if test -n "$ac_ct_RANLIB"; then + { echo "$as_me:$LINENO: result: $ac_ct_RANLIB" >&5 +echo "${ECHO_T}$ac_ct_RANLIB" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + if test "x$ac_ct_RANLIB" = x; then + RANLIB=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + RANLIB=$ac_ct_RANLIB + fi +else + RANLIB="$ac_cv_prog_RANLIB" +fi + +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args. +set dummy ${ac_tool_prefix}strip; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_STRIP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$STRIP"; then + ac_cv_prog_STRIP="$STRIP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_STRIP="${ac_tool_prefix}strip" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +STRIP=$ac_cv_prog_STRIP +if test -n "$STRIP"; then + { echo "$as_me:$LINENO: result: $STRIP" >&5 +echo "${ECHO_T}$STRIP" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_STRIP"; then + ac_ct_STRIP=$STRIP + # Extract the first word of "strip", so it can be a program name with args. +set dummy strip; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_STRIP"; then + ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_STRIP="strip" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP +if test -n "$ac_ct_STRIP"; then + { echo "$as_me:$LINENO: result: $ac_ct_STRIP" >&5 +echo "${ECHO_T}$ac_ct_STRIP" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + if test "x$ac_ct_STRIP" = x; then + STRIP=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + STRIP=$ac_ct_STRIP + fi +else + STRIP="$ac_cv_prog_STRIP" +fi + + +enable_dlopen=no +enable_win32_dll=no + +# Check whether --enable-libtool-lock was given. +if test "${enable_libtool_lock+set}" = set; then + enableval=$enable_libtool_lock; +fi + +test "x$enable_libtool_lock" != xno && enable_libtool_lock=yes + +# Some flags need to be propagated to the compiler or linker for good +# libtool support. +case $host in +*-*-irix6*) + # Find out which ABI we are using. + echo '#line 5704 "configure"' > conftest.$ac_ext + if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 + (eval $ac_compile) 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; then + case `/usr/bin/file conftest.$ac_objext` in + *32-bit*) + LD="${LD-ld} -32" + ;; + *N32*) + LD="${LD-ld} -n32" + ;; + *64-bit*) + LD="${LD-ld} -64" + ;; + esac + fi + rm -rf conftest* + ;; + +*-*-sco3.2v5*) + # On SCO OpenServer 5, we need -belf to get full-featured binaries. + SAVE_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -belf" + { echo "$as_me:$LINENO: checking whether the C compiler needs -belf" >&5 +echo $ECHO_N "checking whether the C compiler needs -belf... $ECHO_C" >&6; } +if test "${lt_cv_cc_needs_belf+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + + ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + lt_cv_cc_needs_belf=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + lt_cv_cc_needs_belf=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext + ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + +fi +{ echo "$as_me:$LINENO: result: $lt_cv_cc_needs_belf" >&5 +echo "${ECHO_T}$lt_cv_cc_needs_belf" >&6; } + if test x"$lt_cv_cc_needs_belf" != x"yes"; then + # this is probably gcc 2.8.0, egcs 1.0 or newer; no need for -belf + CFLAGS="$SAVE_CFLAGS" + fi + ;; + + +esac + +# Sed substitution that helps us do robust quoting. It backslashifies +# metacharacters that are still active within double-quoted strings. +Xsed='sed -e s/^X//' +sed_quote_subst='s/\([\\"\\`$\\\\]\)/\\\1/g' + +# Same as above, but do not quote variable references. +double_quote_subst='s/\([\\"\\`\\\\]\)/\\\1/g' + +# Sed substitution to delay expansion of an escaped shell variable in a +# double_quote_subst'ed string. +delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g' + +# Constants: +rm="rm -f" + +# Global variables: +default_ofile=libtool +can_build_shared=yes + +# All known linkers require a `.a' archive for static linking (except M$VC, +# which needs '.lib'). +libext=a +ltmain="$ac_aux_dir/ltmain.sh" +ofile="$default_ofile" +with_gnu_ld="$lt_cv_prog_gnu_ld" +need_locks="$enable_libtool_lock" + +old_CC="$CC" +old_CFLAGS="$CFLAGS" + +# Set sane defaults for various variables +test -z "$AR" && AR=ar +test -z "$AR_FLAGS" && AR_FLAGS=cru +test -z "$AS" && AS=as +test -z "$CC" && CC=cc +test -z "$DLLTOOL" && DLLTOOL=dlltool +test -z "$LD" && LD=ld +test -z "$LN_S" && LN_S="ln -s" +test -z "$MAGIC_CMD" && MAGIC_CMD=file +test -z "$NM" && NM=nm +test -z "$OBJDUMP" && OBJDUMP=objdump +test -z "$RANLIB" && RANLIB=: +test -z "$STRIP" && STRIP=: +test -z "$ac_objext" && ac_objext=o + +if test x"$host" != x"$build"; then + ac_tool_prefix=${host_alias}- +else + ac_tool_prefix= +fi + +# Transform linux* to *-*-linux-gnu*, to support old configure scripts. +case $host_os in +linux-gnu*) ;; +linux*) host=`echo $host | sed 's/^\(.*-.*-linux\)\(.*\)$/\1-gnu\2/'` +esac + +case $host_os in +aix3*) + # AIX sometimes has problems with the GCC collect2 program. For some + # reason, if we set the COLLECT_NAMES environment variable, the problems + # vanish in a puff of smoke. + if test "X${COLLECT_NAMES+set}" != Xset; then + COLLECT_NAMES= + export COLLECT_NAMES + fi + ;; +esac + +# Determine commands to create old-style static archives. +old_archive_cmds='$AR $AR_FLAGS $oldlib$oldobjs$old_deplibs' +old_postinstall_cmds='chmod 644 $oldlib' +old_postuninstall_cmds= + +if test -n "$RANLIB"; then + case $host_os in + openbsd*) + old_postinstall_cmds="\$RANLIB -t \$oldlib~$old_postinstall_cmds" + ;; + *) + old_postinstall_cmds="\$RANLIB \$oldlib~$old_postinstall_cmds" + ;; + esac + old_archive_cmds="$old_archive_cmds~\$RANLIB \$oldlib" +fi + +# Allow CC to be a program name with arguments. +set dummy $CC +compiler="$2" + +## FIXME: this should be a separate macro +## +{ echo "$as_me:$LINENO: checking for objdir" >&5 +echo $ECHO_N "checking for objdir... $ECHO_C" >&6; } +rm -f .libs 2>/dev/null +mkdir .libs 2>/dev/null +if test -d .libs; then + objdir=.libs +else + # MS-DOS does not allow filenames that begin with a dot. + objdir=_libs +fi +rmdir .libs 2>/dev/null +{ echo "$as_me:$LINENO: result: $objdir" >&5 +echo "${ECHO_T}$objdir" >&6; } +## +## END FIXME + + +## FIXME: this should be a separate macro +## + +# Check whether --with-pic was given. +if test "${with_pic+set}" = set; then + withval=$with_pic; pic_mode="$withval" +else + pic_mode=default +fi + +test -z "$pic_mode" && pic_mode=default + +# We assume here that the value for lt_cv_prog_cc_pic will not be cached +# in isolation, and that seeing it set (from the cache) indicates that +# the associated values are set (in the cache) correctly too. +{ echo "$as_me:$LINENO: checking for $compiler option to produce PIC" >&5 +echo $ECHO_N "checking for $compiler option to produce PIC... $ECHO_C" >&6; } +if test "${lt_cv_prog_cc_pic+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + lt_cv_prog_cc_pic= + lt_cv_prog_cc_shlib= + lt_cv_prog_cc_wl= + lt_cv_prog_cc_static= + lt_cv_prog_cc_no_builtin= + lt_cv_prog_cc_can_build_shared=$can_build_shared + + if test "$GCC" = yes; then + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static='-static' + + case $host_os in + aix*) + # Below there is a dirty hack to force normal static linking with -ldl + # The problem is because libdl dynamically linked with both libc and + # libC (AIX C++ library), which obviously doesn't included in libraries + # list by gcc. This cause undefined symbols with -static flags. + # This hack allows C programs to be linked with "-static -ldl", but + # not sure about C++ programs. + lt_cv_prog_cc_static="$lt_cv_prog_cc_static ${lt_cv_prog_cc_wl}-lC" + ;; + amigaos*) + # FIXME: we need at least 68020 code to build shared libraries, but + # adding the `-m68020' flag to GCC prevents building anything better, + # like `-m68040'. + lt_cv_prog_cc_pic='-m68020 -resident32 -malways-restore-a4' + ;; + beos* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*) + # PIC is the default for these OSes. + ;; + darwin* | rhapsody*) + # PIC is the default on this platform + # Common symbols not allowed in MH_DYLIB files + lt_cv_prog_cc_pic='-fno-common' + ;; + cygwin* | mingw* | pw32* | os2*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + lt_cv_prog_cc_pic='-DDLL_EXPORT' + ;; + sysv4*MP*) + if test -d /usr/nec; then + lt_cv_prog_cc_pic=-Kconform_pic + fi + ;; + *) + lt_cv_prog_cc_pic='-fPIC' + ;; + esac + else + # PORTME Check for PIC flags for the system compiler. + case $host_os in + aix3* | aix4* | aix5*) + lt_cv_prog_cc_wl='-Wl,' + # All AIX code is PIC. + if test "$host_cpu" = ia64; then + # AIX 5 now supports IA64 processor + lt_cv_prog_cc_static='-Bstatic' + else + lt_cv_prog_cc_static='-bnso -bI:/lib/syscalls.exp' + fi + ;; + + hpux9* | hpux10* | hpux11*) + # Is there a better lt_cv_prog_cc_static that works with the bundled CC? + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static="${lt_cv_prog_cc_wl}-a ${lt_cv_prog_cc_wl}archive" + lt_cv_prog_cc_pic='+Z' + ;; + + irix5* | irix6* | nonstopux*) + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static='-non_shared' + # PIC (with -KPIC) is the default. + ;; + + cygwin* | mingw* | pw32* | os2*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + lt_cv_prog_cc_pic='-DDLL_EXPORT' + ;; + + newsos6) + lt_cv_prog_cc_pic='-KPIC' + lt_cv_prog_cc_static='-Bstatic' + ;; + + osf3* | osf4* | osf5*) + # All OSF/1 code is PIC. + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static='-non_shared' + ;; + + sco3.2v5*) + lt_cv_prog_cc_pic='-Kpic' + lt_cv_prog_cc_static='-dn' + lt_cv_prog_cc_shlib='-belf' + ;; + + solaris*) + lt_cv_prog_cc_pic='-KPIC' + lt_cv_prog_cc_static='-Bstatic' + lt_cv_prog_cc_wl='-Wl,' + ;; + + sunos4*) + lt_cv_prog_cc_pic='-PIC' + lt_cv_prog_cc_static='-Bstatic' + lt_cv_prog_cc_wl='-Qoption ld ' + ;; + + sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + lt_cv_prog_cc_pic='-KPIC' + lt_cv_prog_cc_static='-Bstatic' + if test "x$host_vendor" = xsni; then + lt_cv_prog_cc_wl='-LD' + else + lt_cv_prog_cc_wl='-Wl,' + fi + ;; + + uts4*) + lt_cv_prog_cc_pic='-pic' + lt_cv_prog_cc_static='-Bstatic' + ;; + + sysv4*MP*) + if test -d /usr/nec ;then + lt_cv_prog_cc_pic='-Kconform_pic' + lt_cv_prog_cc_static='-Bstatic' + fi + ;; + + *) + lt_cv_prog_cc_can_build_shared=no + ;; + esac + fi + +fi + +if test -z "$lt_cv_prog_cc_pic"; then + { echo "$as_me:$LINENO: result: none" >&5 +echo "${ECHO_T}none" >&6; } +else + { echo "$as_me:$LINENO: result: $lt_cv_prog_cc_pic" >&5 +echo "${ECHO_T}$lt_cv_prog_cc_pic" >&6; } + + # Check to make sure the pic_flag actually works. + { echo "$as_me:$LINENO: checking if $compiler PIC flag $lt_cv_prog_cc_pic works" >&5 +echo $ECHO_N "checking if $compiler PIC flag $lt_cv_prog_cc_pic works... $ECHO_C" >&6; } + if test "${lt_cv_prog_cc_pic_works+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + save_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS $lt_cv_prog_cc_pic -DPIC" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + case $host_os in + hpux9* | hpux10* | hpux11*) + # On HP-UX, both CC and GCC only warn that PIC is supported... then + # they create non-PIC objects. So, if there were any warnings, we + # assume that PIC is not supported. + if test -s conftest.err; then + lt_cv_prog_cc_pic_works=no + else + lt_cv_prog_cc_pic_works=yes + fi + ;; + *) + lt_cv_prog_cc_pic_works=yes + ;; + esac + +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + lt_cv_prog_cc_pic_works=no + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + CFLAGS="$save_CFLAGS" + +fi + + + if test "X$lt_cv_prog_cc_pic_works" = Xno; then + lt_cv_prog_cc_pic= + lt_cv_prog_cc_can_build_shared=no + else + lt_cv_prog_cc_pic=" $lt_cv_prog_cc_pic" + fi + + { echo "$as_me:$LINENO: result: $lt_cv_prog_cc_pic_works" >&5 +echo "${ECHO_T}$lt_cv_prog_cc_pic_works" >&6; } +fi +## +## END FIXME + +# Check for any special shared library compilation flags. +if test -n "$lt_cv_prog_cc_shlib"; then + { echo "$as_me:$LINENO: WARNING: \`$CC' requires \`$lt_cv_prog_cc_shlib' to build shared libraries" >&5 +echo "$as_me: WARNING: \`$CC' requires \`$lt_cv_prog_cc_shlib' to build shared libraries" >&2;} + if echo "$old_CC $old_CFLAGS " | egrep -e "[ ]$lt_cv_prog_cc_shlib[ ]" >/dev/null; then : + else + { echo "$as_me:$LINENO: WARNING: add \`$lt_cv_prog_cc_shlib' to the CC or CFLAGS env variable and reconfigure" >&5 +echo "$as_me: WARNING: add \`$lt_cv_prog_cc_shlib' to the CC or CFLAGS env variable and reconfigure" >&2;} + lt_cv_prog_cc_can_build_shared=no + fi +fi + +## FIXME: this should be a separate macro +## +{ echo "$as_me:$LINENO: checking if $compiler static flag $lt_cv_prog_cc_static works" >&5 +echo $ECHO_N "checking if $compiler static flag $lt_cv_prog_cc_static works... $ECHO_C" >&6; } +if test "${lt_cv_prog_cc_static_works+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + lt_cv_prog_cc_static_works=no + save_LDFLAGS="$LDFLAGS" + LDFLAGS="$LDFLAGS $lt_cv_prog_cc_static" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + lt_cv_prog_cc_static_works=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext + LDFLAGS="$save_LDFLAGS" + +fi + + +# Belt *and* braces to stop my trousers falling down: +test "X$lt_cv_prog_cc_static_works" = Xno && lt_cv_prog_cc_static= +{ echo "$as_me:$LINENO: result: $lt_cv_prog_cc_static_works" >&5 +echo "${ECHO_T}$lt_cv_prog_cc_static_works" >&6; } + +pic_flag="$lt_cv_prog_cc_pic" +special_shlib_compile_flags="$lt_cv_prog_cc_shlib" +wl="$lt_cv_prog_cc_wl" +link_static_flag="$lt_cv_prog_cc_static" +no_builtin_flag="$lt_cv_prog_cc_no_builtin" +can_build_shared="$lt_cv_prog_cc_can_build_shared" +## +## END FIXME + + +## FIXME: this should be a separate macro +## +# Check to see if options -o and -c are simultaneously supported by compiler +{ echo "$as_me:$LINENO: checking if $compiler supports -c -o file.$ac_objext" >&5 +echo $ECHO_N "checking if $compiler supports -c -o file.$ac_objext... $ECHO_C" >&6; } +if test "${lt_cv_compiler_c_o+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + +$rm -r conftest 2>/dev/null +mkdir conftest +cd conftest +echo "int some_variable = 0;" > conftest.$ac_ext +mkdir out +# According to Tom Tromey, Ian Lance Taylor reported there are C compilers +# that will create temporary files in the current directory regardless of +# the output directory. Thus, making CWD read-only will cause this test +# to fail, enabling locking or at least warning the user not to do parallel +# builds. +chmod -w . +save_CFLAGS="$CFLAGS" +CFLAGS="$CFLAGS -o out/conftest2.$ac_objext" +compiler_c_o=no +if { (eval echo configure:6270: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>out/conftest.err; } && test -s out/conftest2.$ac_objext; then + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s out/conftest.err; then + lt_cv_compiler_c_o=no + else + lt_cv_compiler_c_o=yes + fi +else + # Append any errors to the config.log. + cat out/conftest.err 1>&5 + lt_cv_compiler_c_o=no +fi +CFLAGS="$save_CFLAGS" +chmod u+w . +$rm conftest* out/* +rmdir out +cd .. +rmdir conftest +$rm -r conftest 2>/dev/null + +fi + +compiler_c_o=$lt_cv_compiler_c_o +{ echo "$as_me:$LINENO: result: $compiler_c_o" >&5 +echo "${ECHO_T}$compiler_c_o" >&6; } + +if test x"$compiler_c_o" = x"yes"; then + # Check to see if we can write to a .lo + { echo "$as_me:$LINENO: checking if $compiler supports -c -o file.lo" >&5 +echo $ECHO_N "checking if $compiler supports -c -o file.lo... $ECHO_C" >&6; } + if test "${lt_cv_compiler_o_lo+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + + lt_cv_compiler_o_lo=no + save_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -c -o conftest.lo" + save_objext="$ac_objext" + ac_objext=lo + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ +int some_variable = 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s conftest.err; then + lt_cv_compiler_o_lo=no + else + lt_cv_compiler_o_lo=yes + fi + +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + ac_objext="$save_objext" + CFLAGS="$save_CFLAGS" + +fi + + compiler_o_lo=$lt_cv_compiler_o_lo + { echo "$as_me:$LINENO: result: $compiler_o_lo" >&5 +echo "${ECHO_T}$compiler_o_lo" >&6; } +else + compiler_o_lo=no +fi +## +## END FIXME + +## FIXME: this should be a separate macro +## +# Check to see if we can do hard links to lock some files if needed +hard_links="nottested" +if test "$compiler_c_o" = no && test "$need_locks" != no; then + # do not overwrite the value of need_locks provided by the user + { echo "$as_me:$LINENO: checking if we can lock with hard links" >&5 +echo $ECHO_N "checking if we can lock with hard links... $ECHO_C" >&6; } + hard_links=yes + $rm conftest* + ln conftest.a conftest.b 2>/dev/null && hard_links=no + touch conftest.a + ln conftest.a conftest.b 2>&5 || hard_links=no + ln conftest.a conftest.b 2>/dev/null && hard_links=no + { echo "$as_me:$LINENO: result: $hard_links" >&5 +echo "${ECHO_T}$hard_links" >&6; } + if test "$hard_links" = no; then + { echo "$as_me:$LINENO: WARNING: \`$CC' does not support \`-c -o', so \`make -j' may be unsafe" >&5 +echo "$as_me: WARNING: \`$CC' does not support \`-c -o', so \`make -j' may be unsafe" >&2;} + need_locks=warn + fi +else + need_locks=no +fi +## +## END FIXME + +## FIXME: this should be a separate macro +## +if test "$GCC" = yes; then + # Check to see if options -fno-rtti -fno-exceptions are supported by compiler + { echo "$as_me:$LINENO: checking if $compiler supports -fno-rtti -fno-exceptions" >&5 +echo $ECHO_N "checking if $compiler supports -fno-rtti -fno-exceptions... $ECHO_C" >&6; } + echo "int some_variable = 0;" > conftest.$ac_ext + save_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -fno-rtti -fno-exceptions -c conftest.$ac_ext" + compiler_rtti_exceptions=no + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ +int some_variable = 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s conftest.err; then + compiler_rtti_exceptions=no + else + compiler_rtti_exceptions=yes + fi + +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + CFLAGS="$save_CFLAGS" + { echo "$as_me:$LINENO: result: $compiler_rtti_exceptions" >&5 +echo "${ECHO_T}$compiler_rtti_exceptions" >&6; } + + if test "$compiler_rtti_exceptions" = "yes"; then + no_builtin_flag=' -fno-builtin -fno-rtti -fno-exceptions' + else + no_builtin_flag=' -fno-builtin' + fi +fi +## +## END FIXME + +## FIXME: this should be a separate macro +## +# See if the linker supports building shared libraries. +{ echo "$as_me:$LINENO: checking whether the linker ($LD) supports shared libraries" >&5 +echo $ECHO_N "checking whether the linker ($LD) supports shared libraries... $ECHO_C" >&6; } + +allow_undefined_flag= +no_undefined_flag= +need_lib_prefix=unknown +need_version=unknown +# when you set need_version to no, make sure it does not cause -set_version +# flags to be left without arguments +archive_cmds= +archive_expsym_cmds= +old_archive_from_new_cmds= +old_archive_from_expsyms_cmds= +export_dynamic_flag_spec= +whole_archive_flag_spec= +thread_safe_flag_spec= +hardcode_into_libs=no +hardcode_libdir_flag_spec= +hardcode_libdir_separator= +hardcode_direct=no +hardcode_minus_L=no +hardcode_shlibpath_var=unsupported +runpath_var= +link_all_deplibs=unknown +always_export_symbols=no +export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | sed '\''s/.* //'\'' | sort | uniq > $export_symbols' +# include_expsyms should be a list of space-separated symbols to be *always* +# included in the symbol list +include_expsyms= +# exclude_expsyms can be an egrep regular expression of symbols to exclude +# it will be wrapped by ` (' and `)$', so one must not match beginning or +# end of line. Example: `a|bc|.*d.*' will exclude the symbols `a' and `bc', +# as well as any symbol that contains `d'. +exclude_expsyms="_GLOBAL_OFFSET_TABLE_" +# Although _GLOBAL_OFFSET_TABLE_ is a valid symbol C name, most a.out +# platforms (ab)use it in PIC code, but their linkers get confused if +# the symbol is explicitly referenced. Since portable code cannot +# rely on this symbol name, it's probably fine to never include it in +# preloaded symbol tables. +extract_expsyms_cmds= + +case $host_os in +cygwin* | mingw* | pw32*) + # FIXME: the MSVC++ port hasn't been tested in a loooong time + # When not using gcc, we currently assume that we are using + # Microsoft Visual C++. + if test "$GCC" != yes; then + with_gnu_ld=no + fi + ;; +openbsd*) + with_gnu_ld=no + ;; +esac + +ld_shlibs=yes +if test "$with_gnu_ld" = yes; then + # If archive_cmds runs LD, not CC, wlarc should be empty + wlarc='${wl}' + + # See if GNU ld supports shared libraries. + case $host_os in + aix3* | aix4* | aix5*) + # On AIX, the GNU linker is very broken + # Note:Check GNU linker on AIX 5-IA64 when/if it becomes available. + ld_shlibs=no + cat <&2 + +*** Warning: the GNU linker, at least up to release 2.9.1, is reported +*** to be unable to reliably create shared libraries on AIX. +*** Therefore, libtool is disabling shared libraries support. If you +*** really care for shared libraries, you may want to modify your PATH +*** so that a non-GNU linker is found, and then restart. + +EOF + ;; + + amigaos*) + archive_cmds='$rm $output_objdir/a2ixlibrary.data~$echo "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$echo "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$echo "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$echo "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + + # Samuel A. Falvo II reports + # that the semantics of dynamic libraries on AmigaOS, at least up + # to version 4, is to share data among multiple programs linked + # with the same dynamic library. Since this doesn't match the + # behavior of shared libraries on other platforms, we can use + # them. + ld_shlibs=no + ;; + + beos*) + if $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + allow_undefined_flag=unsupported + # Joseph Beckenbach says some releases of gcc + # support --undefined. This deserves some investigation. FIXME + archive_cmds='$CC -nostart $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + else + ld_shlibs=no + fi + ;; + + cygwin* | mingw* | pw32*) + # hardcode_libdir_flag_spec is actually meaningless, as there is + # no search path for DLLs. + hardcode_libdir_flag_spec='-L$libdir' + allow_undefined_flag=unsupported + always_export_symbols=yes + + extract_expsyms_cmds='test -f $output_objdir/impgen.c || \ + sed -e "/^# \/\* impgen\.c starts here \*\//,/^# \/\* impgen.c ends here \*\// { s/^# //;s/^# *$//; p; }" -e d < $''0 > $output_objdir/impgen.c~ + test -f $output_objdir/impgen.exe || (cd $output_objdir && \ + if test "x$HOST_CC" != "x" ; then $HOST_CC -o impgen impgen.c ; \ + else $CC -o impgen impgen.c ; fi)~ + $output_objdir/impgen $dir/$soroot > $output_objdir/$soname-def' + + old_archive_from_expsyms_cmds='$DLLTOOL --as=$AS --dllname $soname --def $output_objdir/$soname-def --output-lib $output_objdir/$newlib' + + # cygwin and mingw dlls have different entry points and sets of symbols + # to exclude. + # FIXME: what about values for MSVC? + dll_entry=__cygwin_dll_entry@12 + dll_exclude_symbols=DllMain@12,_cygwin_dll_entry@12,_cygwin_noncygwin_dll_entry@12~ + case $host_os in + mingw*) + # mingw values + dll_entry=_DllMainCRTStartup@12 + dll_exclude_symbols=DllMain@12,DllMainCRTStartup@12,DllEntryPoint@12~ + ;; + esac + + # mingw and cygwin differ, and it's simplest to just exclude the union + # of the two symbol sets. + dll_exclude_symbols=DllMain@12,_cygwin_dll_entry@12,_cygwin_noncygwin_dll_entry@12,DllMainCRTStartup@12,DllEntryPoint@12 + + # recent cygwin and mingw systems supply a stub DllMain which the user + # can override, but on older systems we have to supply one (in ltdll.c) + if test "x$lt_cv_need_dllmain" = "xyes"; then + ltdll_obj='$output_objdir/$soname-ltdll.'"$ac_objext " + ltdll_cmds='test -f $output_objdir/$soname-ltdll.c || sed -e "/^# \/\* ltdll\.c starts here \*\//,/^# \/\* ltdll.c ends here \*\// { s/^# //; p; }" -e d < $''0 > $output_objdir/$soname-ltdll.c~ + test -f $output_objdir/$soname-ltdll.$ac_objext || (cd $output_objdir && $CC -c $soname-ltdll.c)~' + else + ltdll_obj= + ltdll_cmds= + fi + + # Extract the symbol export list from an `--export-all' def file, + # then regenerate the def file from the symbol export list, so that + # the compiled dll only exports the symbol export list. + # Be careful not to strip the DATA tag left be newer dlltools. + export_symbols_cmds="$ltdll_cmds"' + $DLLTOOL --export-all --exclude-symbols '$dll_exclude_symbols' --output-def $output_objdir/$soname-def '$ltdll_obj'$libobjs $convenience~ + sed -e "1,/EXPORTS/d" -e "s/ @ [0-9]*//" -e "s/ *;.*$//" < $output_objdir/$soname-def > $export_symbols' + + # If the export-symbols file already is a .def file (1st line + # is EXPORTS), use it as is. + # If DATA tags from a recent dlltool are present, honour them! + archive_expsym_cmds='if test "x`head -1 $export_symbols`" = xEXPORTS; then + cp $export_symbols $output_objdir/$soname-def; + else + echo EXPORTS > $output_objdir/$soname-def; + _lt_hint=1; + cat $export_symbols | while read symbol; do + set dummy \$symbol; + case \$# in + 2) echo " \$2 @ \$_lt_hint ; " >> $output_objdir/$soname-def;; + *) echo " \$2 @ \$_lt_hint \$3 ; " >> $output_objdir/$soname-def;; + esac; + _lt_hint=`expr 1 + \$_lt_hint`; + done; + fi~ + '"$ltdll_cmds"' + $CC -Wl,--base-file,$output_objdir/$soname-base '$lt_cv_cc_dll_switch' -Wl,-e,'$dll_entry' -o $output_objdir/$soname '$ltdll_obj'$libobjs $deplibs $compiler_flags~ + $DLLTOOL --as=$AS --dllname $soname --exclude-symbols '$dll_exclude_symbols' --def $output_objdir/$soname-def --base-file $output_objdir/$soname-base --output-exp $output_objdir/$soname-exp~ + $CC -Wl,--base-file,$output_objdir/$soname-base $output_objdir/$soname-exp '$lt_cv_cc_dll_switch' -Wl,-e,'$dll_entry' -o $output_objdir/$soname '$ltdll_obj'$libobjs $deplibs $compiler_flags~ + $DLLTOOL --as=$AS --dllname $soname --exclude-symbols '$dll_exclude_symbols' --def $output_objdir/$soname-def --base-file $output_objdir/$soname-base --output-exp $output_objdir/$soname-exp --output-lib $output_objdir/$libname.dll.a~ + $CC $output_objdir/$soname-exp '$lt_cv_cc_dll_switch' -Wl,-e,'$dll_entry' -o $output_objdir/$soname '$ltdll_obj'$libobjs $deplibs $compiler_flags' + ;; + + netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + archive_cmds='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib' + wlarc= + else + archive_cmds='$CC -shared -nodefaultlibs $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared -nodefaultlibs $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + fi + ;; + + solaris* | sysv5*) + if $LD -v 2>&1 | egrep 'BFD 2\.8' > /dev/null; then + ld_shlibs=no + cat <&2 + +*** Warning: The releases 2.8.* of the GNU linker cannot reliably +*** create shared libraries on Solaris systems. Therefore, libtool +*** is disabling shared libraries support. We urge you to upgrade GNU +*** binutils to release 2.9.1 or newer. Another option is to modify +*** your PATH or compiler configuration so that the native linker is +*** used, and then restart. + +EOF + elif $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + ld_shlibs=no + fi + ;; + + sunos4*) + archive_cmds='$LD -assert pure-text -Bshareable -o $lib $libobjs $deplibs $linker_flags' + wlarc= + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + *) + if $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + ld_shlibs=no + fi + ;; + esac + + if test "$ld_shlibs" = yes; then + runpath_var=LD_RUN_PATH + hardcode_libdir_flag_spec='${wl}--rpath ${wl}$libdir' + export_dynamic_flag_spec='${wl}--export-dynamic' + case $host_os in + cygwin* | mingw* | pw32*) + # dlltool doesn't understand --whole-archive et. al. + whole_archive_flag_spec= + ;; + *) + # ancient GNU ld didn't support --whole-archive et. al. + if $LD --help 2>&1 | egrep 'no-whole-archive' > /dev/null; then + whole_archive_flag_spec="$wlarc"'--whole-archive$convenience '"$wlarc"'--no-whole-archive' + else + whole_archive_flag_spec= + fi + ;; + esac + fi +else + # PORTME fill in a description of your system's linker (not GNU ld) + case $host_os in + aix3*) + allow_undefined_flag=unsupported + always_export_symbols=yes + archive_expsym_cmds='$LD -o $output_objdir/$soname $libobjs $deplibs $linker_flags -bE:$export_symbols -T512 -H512 -bM:SRE~$AR $AR_FLAGS $lib $output_objdir/$soname' + # Note: this linker hardcodes the directories in LIBPATH if there + # are no directories specified by -L. + hardcode_minus_L=yes + if test "$GCC" = yes && test -z "$link_static_flag"; then + # Neither direct hardcoding nor static linking is supported with a + # broken collect2. + hardcode_direct=unsupported + fi + ;; + + aix4* | aix5*) + if test "$host_cpu" = ia64; then + # On IA64, the linker does run time linking by default, so we don't + # have to do anything special. + aix_use_runtimelinking=no + exp_sym_flag='-Bexport' + no_entry_flag="" + else + aix_use_runtimelinking=no + + # Test if we are trying to use run time linking or normal + # AIX style linking. If -brtl is somewhere in LDFLAGS, we + # need to do runtime linking. + case $host_os in aix4.[23]|aix4.[23].*|aix5*) + for ld_flag in $LDFLAGS; do + if (test $ld_flag = "-brtl" || test $ld_flag = "-Wl,-brtl"); then + aix_use_runtimelinking=yes + break + fi + done + esac + + exp_sym_flag='-bexport' + no_entry_flag='-bnoentry' + fi + + # When large executables or shared objects are built, AIX ld can + # have problems creating the table of contents. If linking a library + # or program results in "error TOC overflow" add -mminimal-toc to + # CXXFLAGS/CFLAGS for g++/gcc. In the cases where that is not + # enough to fix the problem, add -Wl,-bbigtoc to LDFLAGS. + + hardcode_direct=yes + archive_cmds='' + hardcode_libdir_separator=':' + if test "$GCC" = yes; then + case $host_os in aix4.[012]|aix4.[012].*) + collect2name=`${CC} -print-prog-name=collect2` + if test -f "$collect2name" && \ + strings "$collect2name" | grep resolve_lib_name >/dev/null + then + # We have reworked collect2 + hardcode_direct=yes + else + # We have old collect2 + hardcode_direct=unsupported + # It fails to find uninstalled libraries when the uninstalled + # path is not listed in the libpath. Setting hardcode_minus_L + # to unsupported forces relinking + hardcode_minus_L=yes + hardcode_libdir_flag_spec='-L$libdir' + hardcode_libdir_separator= + fi + esac + + shared_flag='-shared' + else + # not using gcc + if test "$host_cpu" = ia64; then + shared_flag='${wl}-G' + else + if test "$aix_use_runtimelinking" = yes; then + shared_flag='${wl}-G' + else + shared_flag='${wl}-bM:SRE' + fi + fi + fi + + # It seems that -bexpall can do strange things, so it is better to + # generate a list of symbols to export. + always_export_symbols=yes + if test "$aix_use_runtimelinking" = yes; then + # Warning - without using the other runtime loading flags (-brtl), + # -berok will link without error, but may produce a broken library. + allow_undefined_flag='-berok' + hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:/usr/lib:/lib' + archive_expsym_cmds="\$CC"' -o $output_objdir/$soname $libobjs $deplibs $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then echo "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols $shared_flag" + else + if test "$host_cpu" = ia64; then + hardcode_libdir_flag_spec='${wl}-R $libdir:/usr/lib:/lib' + allow_undefined_flag="-z nodefs" + archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname ${wl}-h$soname $libobjs $deplibs $compiler_flags ${wl}${allow_undefined_flag} '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols" + else + hardcode_libdir_flag_spec='${wl}-bnolibpath ${wl}-blibpath:$libdir:/usr/lib:/lib' + # Warning - without using the other run time loading flags, + # -berok will link without error, but may produce a broken library. + allow_undefined_flag='${wl}-berok' + # This is a bit strange, but is similar to how AIX traditionally builds + # it's shared libraries. + archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs $compiler_flags ${allow_undefined_flag} '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols"' ~$AR -crlo $objdir/$libname$release.a $objdir/$soname' + fi + fi + ;; + + amigaos*) + archive_cmds='$rm $output_objdir/a2ixlibrary.data~$echo "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$echo "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$echo "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$echo "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + # see comment about different semantics on the GNU ld section + ld_shlibs=no + ;; + + cygwin* | mingw* | pw32*) + # When not using gcc, we currently assume that we are using + # Microsoft Visual C++. + # hardcode_libdir_flag_spec is actually meaningless, as there is + # no search path for DLLs. + hardcode_libdir_flag_spec=' ' + allow_undefined_flag=unsupported + # Tell ltmain to make .lib files, not .a files. + libext=lib + # FIXME: Setting linknames here is a bad hack. + archive_cmds='$CC -o $lib $libobjs $compiler_flags `echo "$deplibs" | sed -e '\''s/ -lc$//'\''` -link -dll~linknames=' + # The linker will automatically build a .lib file if we build a DLL. + old_archive_from_new_cmds='true' + # FIXME: Should let the user specify the lib program. + old_archive_cmds='lib /OUT:$oldlib$oldobjs$old_deplibs' + fix_srcfile_path='`cygpath -w "$srcfile"`' + ;; + + darwin* | rhapsody*) + case "$host_os" in + rhapsody* | darwin1.[012]) + allow_undefined_flag='-undefined suppress' + ;; + *) # Darwin 1.3 on + allow_undefined_flag='-flat_namespace -undefined suppress' + ;; + esac + # FIXME: Relying on posixy $() will cause problems for + # cross-compilation, but unfortunately the echo tests do not + # yet detect zsh echo's removal of \ escapes. Also zsh mangles + # `"' quotes if we put them in here... so don't! + archive_cmds='$nonopt $(test .$module = .yes && echo -bundle || echo -dynamiclib) $allow_undefined_flag -o $lib $libobjs $deplibs$linker_flags -install_name $rpath/$soname $verstring' + # We need to add '_' to the symbols in $export_symbols first + #archive_expsym_cmds="$archive_cmds"' && strip -s $export_symbols' + hardcode_direct=yes + hardcode_shlibpath_var=no + whole_archive_flag_spec='-all_load $convenience' + ;; + + freebsd1*) + ld_shlibs=no + ;; + + # FreeBSD 2.2.[012] allows us to include c++rt0.o to get C++ constructor + # support. Future versions do this automatically, but an explicit c++rt0.o + # does not break anything, and helps significantly (at the cost of a little + # extra space). + freebsd2.2*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags /usr/lib/c++rt0.o' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + # Unfortunately, older versions of FreeBSD 2 do not have this feature. + freebsd2*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_minus_L=yes + hardcode_shlibpath_var=no + ;; + + # FreeBSD 3 and greater uses gcc -shared to do shared libraries. + freebsd*) + archive_cmds='$CC -shared -o $lib $libobjs $deplibs $compiler_flags' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + hpux9* | hpux10* | hpux11*) + case $host_os in + hpux9*) archive_cmds='$rm $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib' ;; + *) archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags' ;; + esac + hardcode_libdir_flag_spec='${wl}+b ${wl}$libdir' + hardcode_libdir_separator=: + hardcode_direct=yes + hardcode_minus_L=yes # Not in the search PATH, but as the default + # location of the library. + export_dynamic_flag_spec='${wl}-E' + ;; + + irix5* | irix6* | nonstopux*) + if test "$GCC" = yes; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + else + archive_cmds='$LD -shared $libobjs $deplibs $linker_flags -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib' + fi + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + link_all_deplibs=yes + ;; + + netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' # a.out + else + archive_cmds='$LD -shared -o $lib $libobjs $deplibs $linker_flags' # ELF + fi + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + newsos6) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + hardcode_shlibpath_var=no + ;; + + openbsd*) + hardcode_direct=yes + hardcode_shlibpath_var=no + if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='${wl}-rpath,$libdir' + export_dynamic_flag_spec='${wl}-E' + else + case "$host_os" in + openbsd[01].* | openbsd2.[0-7] | openbsd2.[0-7].*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-R$libdir' + ;; + *) + archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='${wl}-rpath,$libdir' + ;; + esac + fi + ;; + + os2*) + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + allow_undefined_flag=unsupported + archive_cmds='$echo "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$echo "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~$echo DATA >> $output_objdir/$libname.def~$echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~$echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def' + old_archive_from_new_cmds='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def' + ;; + + osf3*) + if test "$GCC" = yes; then + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + else + allow_undefined_flag=' -expect_unresolved \*' + archive_cmds='$LD -shared${allow_undefined_flag} $libobjs $deplibs $linker_flags -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib' + fi + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + ;; + + osf4* | osf5*) # as osf3* with the addition of -msym flag + if test "$GCC" = yes; then + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + else + allow_undefined_flag=' -expect_unresolved \*' + archive_cmds='$LD -shared${allow_undefined_flag} $libobjs $deplibs $linker_flags -msym -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib' + archive_expsym_cmds='for i in `cat $export_symbols`; do printf "-exported_symbol " >> $lib.exp; echo "\$i" >> $lib.exp; done; echo "-hidden">> $lib.exp~ + $LD -shared${allow_undefined_flag} -input $lib.exp $linker_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${objdir}/so_locations -o $lib~$rm $lib.exp' + + #Both c and cxx compiler support -rpath directly + hardcode_libdir_flag_spec='-rpath $libdir' + fi + hardcode_libdir_separator=: + ;; + + sco3.2v5*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + runpath_var=LD_RUN_PATH + hardcode_runpath_var=yes + export_dynamic_flag_spec='${wl}-Bexport' + ;; + + solaris*) + # gcc --version < 3.0 without binutils cannot create self contained + # shared libraries reliably, requiring libgcc.a to resolve some of + # the object symbols generated in some cases. Libraries that use + # assert need libgcc.a to resolve __eprintf, for example. Linking + # a copy of libgcc.a into every shared library to guarantee resolving + # such symbols causes other problems: According to Tim Van Holder + # , C++ libraries end up with a separate + # (to the application) exception stack for one thing. + no_undefined_flag=' -z defs' + if test "$GCC" = yes; then + case `$CC --version 2>/dev/null` in + [12].*) + cat <&2 + +*** Warning: Releases of GCC earlier than version 3.0 cannot reliably +*** create self contained shared libraries on Solaris systems, without +*** introducing a dependency on libgcc.a. Therefore, libtool is disabling +*** -no-undefined support, which will at least allow you to build shared +*** libraries. However, you may find that when you link such libraries +*** into an application without using GCC, you have to manually add +*** \`gcc --print-libgcc-file-name\` to the link command. We urge you to +*** upgrade to a newer version of GCC. Another option is to rebuild your +*** current GCC to use the GNU linker from GNU binutils 2.9.1 or newer. + +EOF + no_undefined_flag= + ;; + esac + fi + # $CC -shared without GNU ld will not create a library from C++ + # object files and a static libstdc++, better avoid it by now + archive_cmds='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags' + archive_expsym_cmds='$echo "{ global:" > $lib.exp~cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~ + $LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$rm $lib.exp' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_shlibpath_var=no + case $host_os in + solaris2.[0-5] | solaris2.[0-5].*) ;; + *) # Supported since Solaris 2.6 (maybe 2.5.1?) + whole_archive_flag_spec='-z allextract$convenience -z defaultextract' ;; + esac + link_all_deplibs=yes + ;; + + sunos4*) + if test "x$host_vendor" = xsequent; then + # Use $CC to link under sequent, because it throws in some extra .o + # files that make .init and .fini sections work. + archive_cmds='$CC -G ${wl}-h $soname -o $lib $libobjs $deplibs $compiler_flags' + else + archive_cmds='$LD -assert pure-text -Bstatic -o $lib $libobjs $deplibs $linker_flags' + fi + hardcode_libdir_flag_spec='-L$libdir' + hardcode_direct=yes + hardcode_minus_L=yes + hardcode_shlibpath_var=no + ;; + + sysv4) + if test "x$host_vendor" = xsno; then + archive_cmds='$LD -G -Bsymbolic -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes # is this really true??? + else + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=no #Motorola manual says yes, but my tests say they lie + fi + runpath_var='LD_RUN_PATH' + hardcode_shlibpath_var=no + ;; + + sysv4.3*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + export_dynamic_flag_spec='-Bexport' + ;; + + sysv5*) + no_undefined_flag=' -z text' + # $CC -shared without GNU ld will not create a library from C++ + # object files and a static libstdc++, better avoid it by now + archive_cmds='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags' + archive_expsym_cmds='$echo "{ global:" > $lib.exp~cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~ + $LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$rm $lib.exp' + hardcode_libdir_flag_spec= + hardcode_shlibpath_var=no + runpath_var='LD_RUN_PATH' + ;; + + uts4*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_shlibpath_var=no + ;; + + dgux*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_shlibpath_var=no + ;; + + sysv4*MP*) + if test -d /usr/nec; then + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + runpath_var=LD_RUN_PATH + hardcode_runpath_var=yes + ld_shlibs=yes + fi + ;; + + sysv4.2uw2*) + archive_cmds='$LD -G -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_minus_L=no + hardcode_shlibpath_var=no + hardcode_runpath_var=yes + runpath_var=LD_RUN_PATH + ;; + + sysv5uw7* | unixware7*) + no_undefined_flag='${wl}-z ${wl}text' + if test "$GCC" = yes; then + archive_cmds='$CC -shared ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' + else + archive_cmds='$CC -G ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' + fi + runpath_var='LD_RUN_PATH' + hardcode_shlibpath_var=no + ;; + + *) + ld_shlibs=no + ;; + esac +fi +{ echo "$as_me:$LINENO: result: $ld_shlibs" >&5 +echo "${ECHO_T}$ld_shlibs" >&6; } +test "$ld_shlibs" = no && can_build_shared=no +## +## END FIXME + +## FIXME: this should be a separate macro +## +# Check hardcoding attributes. +{ echo "$as_me:$LINENO: checking how to hardcode library paths into programs" >&5 +echo $ECHO_N "checking how to hardcode library paths into programs... $ECHO_C" >&6; } +hardcode_action= +if test -n "$hardcode_libdir_flag_spec" || \ + test -n "$runpath_var"; then + + # We can hardcode non-existant directories. + if test "$hardcode_direct" != no && + # If the only mechanism to avoid hardcoding is shlibpath_var, we + # have to relink, otherwise we might link with an installed library + # when we should be linking with a yet-to-be-installed one + ## test "$hardcode_shlibpath_var" != no && + test "$hardcode_minus_L" != no; then + # Linking always hardcodes the temporary library directory. + hardcode_action=relink + else + # We can link without hardcoding, and we can hardcode nonexisting dirs. + hardcode_action=immediate + fi +else + # We cannot hardcode anything, or else we can only hardcode existing + # directories. + hardcode_action=unsupported +fi +{ echo "$as_me:$LINENO: result: $hardcode_action" >&5 +echo "${ECHO_T}$hardcode_action" >&6; } +## +## END FIXME + +## FIXME: this should be a separate macro +## +striplib= +old_striplib= +{ echo "$as_me:$LINENO: checking whether stripping libraries is possible" >&5 +echo $ECHO_N "checking whether stripping libraries is possible... $ECHO_C" >&6; } +if test -n "$STRIP" && $STRIP -V 2>&1 | grep "GNU strip" >/dev/null; then + test -z "$old_striplib" && old_striplib="$STRIP --strip-debug" + test -z "$striplib" && striplib="$STRIP --strip-unneeded" + { echo "$as_me:$LINENO: result: yes" >&5 +echo "${ECHO_T}yes" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi +## +## END FIXME + +reload_cmds='$LD$reload_flag -o $output$reload_objs' +test -z "$deplibs_check_method" && deplibs_check_method=unknown + +## FIXME: this should be a separate macro +## +# PORTME Fill in your ld.so characteristics +{ echo "$as_me:$LINENO: checking dynamic linker characteristics" >&5 +echo $ECHO_N "checking dynamic linker characteristics... $ECHO_C" >&6; } +library_names_spec= +libname_spec='lib$name' +soname_spec= +postinstall_cmds= +postuninstall_cmds= +finish_cmds= +finish_eval= +shlibpath_var= +shlibpath_overrides_runpath=unknown +version_type=none +dynamic_linker="$host_os ld.so" +sys_lib_dlsearch_path_spec="/lib /usr/lib" +sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib" + +case $host_os in +aix3*) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix $libname.a' + shlibpath_var=LIBPATH + + # AIX has no versioning support, so we append a major version to the name. + soname_spec='${libname}${release}.so$major' + ;; + +aix4* | aix5*) + version_type=linux + if test "$host_cpu" = ia64; then + # AIX 5 supports IA64 + library_names_spec='${libname}${release}.so$major ${libname}${release}.so$versuffix $libname.so' + shlibpath_var=LD_LIBRARY_PATH + else + # With GCC up to 2.95.x, collect2 would create an import file + # for dependence libraries. The import file would start with + # the line `#! .'. This would cause the generated library to + # depend on `.', always an invalid library. This was fixed in + # development snapshots of GCC prior to 3.0. + case $host_os in + aix4 | aix4.[01] | aix4.[01].*) + if { echo '#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 97)' + echo ' yes ' + echo '#endif'; } | ${CC} -E - | grep yes > /dev/null; then + : + else + can_build_shared=no + fi + ;; + esac + # AIX (on Power*) has no versioning support, so currently we can + # not hardcode correct soname into executable. Probably we can + # add versioning support to collect2, so additional links can + # be useful in future. + if test "$aix_use_runtimelinking" = yes; then + # If using run time linking (on AIX 4.2 or later) use lib.so + # instead of lib.a to let people know that these are not + # typical AIX shared libraries. + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + else + # We preserve .a as extension for shared libraries through AIX4.2 + # and later when we are not doing run time linking. + library_names_spec='${libname}${release}.a $libname.a' + soname_spec='${libname}${release}.so$major' + fi + shlibpath_var=LIBPATH + fi + ;; + +amigaos*) + library_names_spec='$libname.ixlibrary $libname.a' + # Create ${libname}_ixlibrary.a entries in /sys/libs. + finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`$echo "X$lib" | $Xsed -e '\''s%^.*/\([^/]*\)\.ixlibrary$%\1%'\''`; test $rm /sys/libs/${libname}_ixlibrary.a; $show "(cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a)"; (cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a) || exit 1; done' + ;; + +beos*) + library_names_spec='${libname}.so' + dynamic_linker="$host_os ld.so" + shlibpath_var=LIBRARY_PATH + ;; + +bsdi4*) + version_type=linux + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + finish_cmds='PATH="\$PATH:/sbin" ldconfig $libdir' + shlibpath_var=LD_LIBRARY_PATH + sys_lib_search_path_spec="/shlib /usr/lib /usr/X11/lib /usr/contrib/lib /lib /usr/local/lib" + sys_lib_dlsearch_path_spec="/shlib /usr/lib /usr/local/lib" + export_dynamic_flag_spec=-rdynamic + # the default ld.so.conf also contains /usr/contrib/lib and + # /usr/X11R6/lib (/usr/X11 is a link to /usr/X11R6), but let us allow + # libtool to hard-code these into programs + ;; + +cygwin* | mingw* | pw32*) + version_type=windows + need_version=no + need_lib_prefix=no + case $GCC,$host_os in + yes,cygwin*) + library_names_spec='$libname.dll.a' + soname_spec='`echo ${libname} | sed -e 's/^lib/cyg/'``echo ${release} | sed -e 's/[.]/-/g'`${versuffix}.dll' + postinstall_cmds='dlpath=`bash 2>&1 -c '\''. $dir/${file}i;echo \$dlname'\''`~ + dldir=$destdir/`dirname \$dlpath`~ + test -d \$dldir || mkdir -p \$dldir~ + $install_prog .libs/$dlname \$dldir/$dlname' + postuninstall_cmds='dldll=`bash 2>&1 -c '\''. $file; echo \$dlname'\''`~ + dlpath=$dir/\$dldll~ + $rm \$dlpath' + ;; + yes,mingw*) + library_names_spec='${libname}`echo ${release} | sed -e 's/[.]/-/g'`${versuffix}.dll' + sys_lib_search_path_spec=`$CC -print-search-dirs | grep "^libraries:" | sed -e "s/^libraries://" -e "s/;/ /g"` + ;; + yes,pw32*) + library_names_spec='`echo ${libname} | sed -e 's/^lib/pw/'``echo ${release} | sed -e 's/./-/g'`${versuffix}.dll' + ;; + *) + library_names_spec='${libname}`echo ${release} | sed -e 's/[.]/-/g'`${versuffix}.dll $libname.lib' + ;; + esac + dynamic_linker='Win32 ld.exe' + # FIXME: first we should search . and the directory the executable is in + shlibpath_var=PATH + ;; + +darwin* | rhapsody*) + dynamic_linker="$host_os dyld" + version_type=darwin + need_lib_prefix=no + need_version=no + # FIXME: Relying on posixy $() will cause problems for + # cross-compilation, but unfortunately the echo tests do not + # yet detect zsh echo's removal of \ escapes. + library_names_spec='${libname}${release}${versuffix}.$(test .$module = .yes && echo so || echo dylib) ${libname}${release}${major}.$(test .$module = .yes && echo so || echo dylib) ${libname}.$(test .$module = .yes && echo so || echo dylib)' + soname_spec='${libname}${release}${major}.$(test .$module = .yes && echo so || echo dylib)' + shlibpath_overrides_runpath=yes + shlibpath_var=DYLD_LIBRARY_PATH + ;; + +freebsd1*) + dynamic_linker=no + ;; + +freebsd*) + objformat=`test -x /usr/bin/objformat && /usr/bin/objformat || echo aout` + version_type=freebsd-$objformat + case $version_type in + freebsd-elf*) + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so $libname.so' + need_version=no + need_lib_prefix=no + ;; + freebsd-*) + library_names_spec='${libname}${release}.so$versuffix $libname.so$versuffix' + need_version=yes + ;; + esac + shlibpath_var=LD_LIBRARY_PATH + case $host_os in + freebsd2*) + shlibpath_overrides_runpath=yes + ;; + *) + shlibpath_overrides_runpath=no + hardcode_into_libs=yes + ;; + esac + ;; + +gnu*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so${major} ${libname}.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + hardcode_into_libs=yes + ;; + +hpux9* | hpux10* | hpux11*) + # Give a soname corresponding to the major version so that dld.sl refuses to + # link against other versions. + dynamic_linker="$host_os dld.sl" + version_type=sunos + need_lib_prefix=no + need_version=no + shlibpath_var=SHLIB_PATH + shlibpath_overrides_runpath=no # +s is required to enable SHLIB_PATH + library_names_spec='${libname}${release}.sl$versuffix ${libname}${release}.sl$major $libname.sl' + soname_spec='${libname}${release}.sl$major' + # HP-UX runs *really* slowly unless shared libraries are mode 555. + postinstall_cmds='chmod 555 $lib' + ;; + +irix5* | irix6* | nonstopux*) + case $host_os in + nonstopux*) version_type=nonstopux ;; + *) version_type=irix ;; + esac + need_lib_prefix=no + need_version=no + soname_spec='${libname}${release}.so$major' + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major ${libname}${release}.so $libname.so' + case $host_os in + irix5* | nonstopux*) + libsuff= shlibsuff= + ;; + *) + case $LD in # libtool.m4 will add one of these switches to LD + *-32|*"-32 ") libsuff= shlibsuff= libmagic=32-bit;; + *-n32|*"-n32 ") libsuff=32 shlibsuff=N32 libmagic=N32;; + *-64|*"-64 ") libsuff=64 shlibsuff=64 libmagic=64-bit;; + *) libsuff= shlibsuff= libmagic=never-match;; + esac + ;; + esac + shlibpath_var=LD_LIBRARY${shlibsuff}_PATH + shlibpath_overrides_runpath=no + sys_lib_search_path_spec="/usr/lib${libsuff} /lib${libsuff} /usr/local/lib${libsuff}" + sys_lib_dlsearch_path_spec="/usr/lib${libsuff} /lib${libsuff}" + ;; + +# No shared lib support for Linux oldld, aout, or coff. +linux-gnuoldld* | linux-gnuaout* | linux-gnucoff*) + dynamic_linker=no + ;; + +# This must be Linux ELF. +linux-gnu*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=no + # This implies no fast_install, which is unacceptable. + # Some rework will be needed to allow for fast_install + # before this can be enabled. + hardcode_into_libs=yes + + # We used to test for /lib/ld.so.1 and disable shared libraries on + # powerpc, because MkLinux only supported shared libraries with the + # GNU dynamic linker. Since this was broken with cross compilers, + # most powerpc-linux boxes support dynamic linking these days and + # people can always --disable-shared, the test was removed, and we + # assume the GNU/Linux dynamic linker is in use. + dynamic_linker='GNU/Linux ld.so' + ;; + +netbsd*) + version_type=sunos + need_lib_prefix=no + need_version=no + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + library_names_spec='${libname}${release}.so$versuffix ${libname}.so$versuffix' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' + dynamic_linker='NetBSD (a.out) ld.so' + else + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major ${libname}${release}.so ${libname}.so' + soname_spec='${libname}${release}.so$major' + dynamic_linker='NetBSD ld.elf_so' + fi + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + ;; + +newsos6) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + ;; + +openbsd*) + version_type=sunos + need_lib_prefix=no + need_version=no + if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + case "$host_os" in + openbsd2.[89] | openbsd2.[89].*) + shlibpath_overrides_runpath=no + ;; + *) + shlibpath_overrides_runpath=yes + ;; + esac + else + shlibpath_overrides_runpath=yes + fi + library_names_spec='${libname}${release}.so$versuffix ${libname}.so$versuffix' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' + shlibpath_var=LD_LIBRARY_PATH + ;; + +os2*) + libname_spec='$name' + need_lib_prefix=no + library_names_spec='$libname.dll $libname.a' + dynamic_linker='OS/2 ld.exe' + shlibpath_var=LIBPATH + ;; + +osf3* | osf4* | osf5*) + version_type=osf + need_version=no + soname_spec='${libname}${release}.so' + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so $libname.so' + shlibpath_var=LD_LIBRARY_PATH + sys_lib_search_path_spec="/usr/shlib /usr/ccs/lib /usr/lib/cmplrs/cc /usr/lib /usr/local/lib /var/shlib" + sys_lib_dlsearch_path_spec="$sys_lib_search_path_spec" + ;; + +sco3.2v5*) + version_type=osf + soname_spec='${libname}${release}.so$major' + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + shlibpath_var=LD_LIBRARY_PATH + ;; + +solaris*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + # ldd complains unless libraries are executable + postinstall_cmds='chmod +x $lib' + ;; + +sunos4*) + version_type=sunos + library_names_spec='${libname}${release}.so$versuffix ${libname}.so$versuffix' + finish_cmds='PATH="\$PATH:/usr/etc" ldconfig $libdir' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + if test "$with_gnu_ld" = yes; then + need_lib_prefix=no + fi + need_version=yes + ;; + +sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + case $host_vendor in + sni) + shlibpath_overrides_runpath=no + ;; + motorola) + need_lib_prefix=no + need_version=no + shlibpath_overrides_runpath=no + sys_lib_search_path_spec='/lib /usr/lib /usr/ccs/lib' + ;; + esac + ;; + +uts4*) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + ;; + +dgux*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + ;; + +sysv4*MP*) + if test -d /usr/nec ;then + version_type=linux + library_names_spec='$libname.so.$versuffix $libname.so.$major $libname.so' + soname_spec='$libname.so.$major' + shlibpath_var=LD_LIBRARY_PATH + fi + ;; + +*) + dynamic_linker=no + ;; +esac +{ echo "$as_me:$LINENO: result: $dynamic_linker" >&5 +echo "${ECHO_T}$dynamic_linker" >&6; } +test "$dynamic_linker" = no && can_build_shared=no +## +## END FIXME + +## FIXME: this should be a separate macro +## +# Report the final consequences. +{ echo "$as_me:$LINENO: checking if libtool supports shared libraries" >&5 +echo $ECHO_N "checking if libtool supports shared libraries... $ECHO_C" >&6; } +{ echo "$as_me:$LINENO: result: $can_build_shared" >&5 +echo "${ECHO_T}$can_build_shared" >&6; } +## +## END FIXME + +## FIXME: this should be a separate macro +## +{ echo "$as_me:$LINENO: checking whether to build shared libraries" >&5 +echo $ECHO_N "checking whether to build shared libraries... $ECHO_C" >&6; } +test "$can_build_shared" = "no" && enable_shared=no + +# On AIX, shared libraries and static libraries use the same namespace, and +# are all built from PIC. +case "$host_os" in +aix3*) + test "$enable_shared" = yes && enable_static=no + if test -n "$RANLIB"; then + archive_cmds="$archive_cmds~\$RANLIB \$lib" + postinstall_cmds='$RANLIB $lib' + fi + ;; + +aix4*) + if test "$host_cpu" != ia64 && test "$aix_use_runtimelinking" = no ; then + test "$enable_shared" = yes && enable_static=no + fi + ;; +esac +{ echo "$as_me:$LINENO: result: $enable_shared" >&5 +echo "${ECHO_T}$enable_shared" >&6; } +## +## END FIXME + +## FIXME: this should be a separate macro +## +{ echo "$as_me:$LINENO: checking whether to build static libraries" >&5 +echo $ECHO_N "checking whether to build static libraries... $ECHO_C" >&6; } +# Make sure either enable_shared or enable_static is yes. +test "$enable_shared" = yes || enable_static=yes +{ echo "$as_me:$LINENO: result: $enable_static" >&5 +echo "${ECHO_T}$enable_static" >&6; } +## +## END FIXME + +if test "$hardcode_action" = relink; then + # Fast installation is not supported + enable_fast_install=no +elif test "$shlibpath_overrides_runpath" = yes || + test "$enable_shared" = no; then + # Fast installation is not necessary + enable_fast_install=needless +fi + +variables_saved_for_relink="PATH $shlibpath_var $runpath_var" +if test "$GCC" = yes; then + variables_saved_for_relink="$variables_saved_for_relink GCC_EXEC_PREFIX COMPILER_PATH LIBRARY_PATH" +fi + +if test "x$enable_dlopen" != xyes; then + enable_dlopen=unknown + enable_dlopen_self=unknown + enable_dlopen_self_static=unknown +else + lt_cv_dlopen=no + lt_cv_dlopen_libs= + + case $host_os in + beos*) + lt_cv_dlopen="load_add_on" + lt_cv_dlopen_libs= + lt_cv_dlopen_self=yes + ;; + + cygwin* | mingw* | pw32*) + lt_cv_dlopen="LoadLibrary" + lt_cv_dlopen_libs= + ;; + + *) + { echo "$as_me:$LINENO: checking for shl_load" >&5 +echo $ECHO_N "checking for shl_load... $ECHO_C" >&6; } +if test "${ac_cv_func_shl_load+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define shl_load to an innocuous variant, in case declares shl_load. + For example, HP-UX 11i declares gettimeofday. */ +#define shl_load innocuous_shl_load + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char shl_load (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef shl_load + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char shl_load (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_shl_load || defined __stub___shl_load +choke me +#endif + +int +main () +{ +return shl_load (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_func_shl_load=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_func_shl_load=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_func_shl_load" >&5 +echo "${ECHO_T}$ac_cv_func_shl_load" >&6; } +if test $ac_cv_func_shl_load = yes; then + lt_cv_dlopen="shl_load" +else + { echo "$as_me:$LINENO: checking for shl_load in -ldld" >&5 +echo $ECHO_N "checking for shl_load in -ldld... $ECHO_C" >&6; } +if test "${ac_cv_lib_dld_shl_load+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-ldld $LIBS" +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char shl_load (); +int +main () +{ +return shl_load (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_lib_dld_shl_load=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_lib_dld_shl_load=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ echo "$as_me:$LINENO: result: $ac_cv_lib_dld_shl_load" >&5 +echo "${ECHO_T}$ac_cv_lib_dld_shl_load" >&6; } +if test $ac_cv_lib_dld_shl_load = yes; then + lt_cv_dlopen="shl_load" lt_cv_dlopen_libs="-dld" +else + { echo "$as_me:$LINENO: checking for dlopen" >&5 +echo $ECHO_N "checking for dlopen... $ECHO_C" >&6; } +if test "${ac_cv_func_dlopen+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define dlopen to an innocuous variant, in case declares dlopen. + For example, HP-UX 11i declares gettimeofday. */ +#define dlopen innocuous_dlopen + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char dlopen (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef dlopen + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char dlopen (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_dlopen || defined __stub___dlopen +choke me +#endif + +int +main () +{ +return dlopen (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_func_dlopen=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_func_dlopen=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_func_dlopen" >&5 +echo "${ECHO_T}$ac_cv_func_dlopen" >&6; } +if test $ac_cv_func_dlopen = yes; then + lt_cv_dlopen="dlopen" +else + { echo "$as_me:$LINENO: checking for dlopen in -ldl" >&5 +echo $ECHO_N "checking for dlopen in -ldl... $ECHO_C" >&6; } +if test "${ac_cv_lib_dl_dlopen+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-ldl $LIBS" +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char dlopen (); +int +main () +{ +return dlopen (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_lib_dl_dlopen=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_lib_dl_dlopen=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ echo "$as_me:$LINENO: result: $ac_cv_lib_dl_dlopen" >&5 +echo "${ECHO_T}$ac_cv_lib_dl_dlopen" >&6; } +if test $ac_cv_lib_dl_dlopen = yes; then + lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-ldl" +else + { echo "$as_me:$LINENO: checking for dlopen in -lsvld" >&5 +echo $ECHO_N "checking for dlopen in -lsvld... $ECHO_C" >&6; } +if test "${ac_cv_lib_svld_dlopen+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-lsvld $LIBS" +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char dlopen (); +int +main () +{ +return dlopen (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_lib_svld_dlopen=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_lib_svld_dlopen=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ echo "$as_me:$LINENO: result: $ac_cv_lib_svld_dlopen" >&5 +echo "${ECHO_T}$ac_cv_lib_svld_dlopen" >&6; } +if test $ac_cv_lib_svld_dlopen = yes; then + lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-lsvld" +else + { echo "$as_me:$LINENO: checking for dld_link in -ldld" >&5 +echo $ECHO_N "checking for dld_link in -ldld... $ECHO_C" >&6; } +if test "${ac_cv_lib_dld_dld_link+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-ldld $LIBS" +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char dld_link (); +int +main () +{ +return dld_link (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_lib_dld_dld_link=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_lib_dld_dld_link=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ echo "$as_me:$LINENO: result: $ac_cv_lib_dld_dld_link" >&5 +echo "${ECHO_T}$ac_cv_lib_dld_dld_link" >&6; } +if test $ac_cv_lib_dld_dld_link = yes; then + lt_cv_dlopen="dld_link" lt_cv_dlopen_libs="-dld" +fi + + +fi + + +fi + + +fi + + +fi + + +fi + + ;; + esac + + if test "x$lt_cv_dlopen" != xno; then + enable_dlopen=yes + else + enable_dlopen=no + fi + + case $lt_cv_dlopen in + dlopen) + save_CPPFLAGS="$CPPFLAGS" + test "x$ac_cv_header_dlfcn_h" = xyes && CPPFLAGS="$CPPFLAGS -DHAVE_DLFCN_H" + + save_LDFLAGS="$LDFLAGS" + eval LDFLAGS=\"\$LDFLAGS $export_dynamic_flag_spec\" + + save_LIBS="$LIBS" + LIBS="$lt_cv_dlopen_libs $LIBS" + + { echo "$as_me:$LINENO: checking whether a program can dlopen itself" >&5 +echo $ECHO_N "checking whether a program can dlopen itself... $ECHO_C" >&6; } +if test "${lt_cv_dlopen_self+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then : + lt_cv_dlopen_self=cross +else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext < +#endif + +#include + +#ifdef RTLD_GLOBAL +# define LT_DLGLOBAL RTLD_GLOBAL +#else +# ifdef DL_GLOBAL +# define LT_DLGLOBAL DL_GLOBAL +# else +# define LT_DLGLOBAL 0 +# endif +#endif + +/* We may have to define LT_DLLAZY_OR_NOW in the command line if we + find out it does not work in some platform. */ +#ifndef LT_DLLAZY_OR_NOW +# ifdef RTLD_LAZY +# define LT_DLLAZY_OR_NOW RTLD_LAZY +# else +# ifdef DL_LAZY +# define LT_DLLAZY_OR_NOW DL_LAZY +# else +# ifdef RTLD_NOW +# define LT_DLLAZY_OR_NOW RTLD_NOW +# else +# ifdef DL_NOW +# define LT_DLLAZY_OR_NOW DL_NOW +# else +# define LT_DLLAZY_OR_NOW 0 +# endif +# endif +# endif +# endif +#endif + +#ifdef __cplusplus +extern "C" void exit (int); +#endif + +void fnord() { int i=42;} +int main () +{ + void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); + int status = $lt_dlunknown; + + if (self) + { + if (dlsym (self,"fnord")) status = $lt_dlno_uscore; + else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; + /* dlclose (self); */ + } + + exit (status); +} +EOF + if { (eval echo "$as_me:$LINENO: \"$ac_link\"") >&5 + (eval $ac_link) 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && test -s conftest${ac_exeext} 2>/dev/null; then + (./conftest; exit; ) 2>/dev/null + lt_status=$? + case x$lt_status in + x$lt_dlno_uscore) lt_cv_dlopen_self=yes ;; + x$lt_dlneed_uscore) lt_cv_dlopen_self=yes ;; + x$lt_unknown|x*) lt_cv_dlopen_self=no ;; + esac + else : + # compilation failed + lt_cv_dlopen_self=no + fi +fi +rm -fr conftest* + + +fi +{ echo "$as_me:$LINENO: result: $lt_cv_dlopen_self" >&5 +echo "${ECHO_T}$lt_cv_dlopen_self" >&6; } + + if test "x$lt_cv_dlopen_self" = xyes; then + LDFLAGS="$LDFLAGS $link_static_flag" + { echo "$as_me:$LINENO: checking whether a statically linked program can dlopen itself" >&5 +echo $ECHO_N "checking whether a statically linked program can dlopen itself... $ECHO_C" >&6; } +if test "${lt_cv_dlopen_self_static+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then : + lt_cv_dlopen_self_static=cross +else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext < +#endif + +#include + +#ifdef RTLD_GLOBAL +# define LT_DLGLOBAL RTLD_GLOBAL +#else +# ifdef DL_GLOBAL +# define LT_DLGLOBAL DL_GLOBAL +# else +# define LT_DLGLOBAL 0 +# endif +#endif + +/* We may have to define LT_DLLAZY_OR_NOW in the command line if we + find out it does not work in some platform. */ +#ifndef LT_DLLAZY_OR_NOW +# ifdef RTLD_LAZY +# define LT_DLLAZY_OR_NOW RTLD_LAZY +# else +# ifdef DL_LAZY +# define LT_DLLAZY_OR_NOW DL_LAZY +# else +# ifdef RTLD_NOW +# define LT_DLLAZY_OR_NOW RTLD_NOW +# else +# ifdef DL_NOW +# define LT_DLLAZY_OR_NOW DL_NOW +# else +# define LT_DLLAZY_OR_NOW 0 +# endif +# endif +# endif +# endif +#endif + +#ifdef __cplusplus +extern "C" void exit (int); +#endif + +void fnord() { int i=42;} +int main () +{ + void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); + int status = $lt_dlunknown; + + if (self) + { + if (dlsym (self,"fnord")) status = $lt_dlno_uscore; + else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; + /* dlclose (self); */ + } + + exit (status); +} +EOF + if { (eval echo "$as_me:$LINENO: \"$ac_link\"") >&5 + (eval $ac_link) 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && test -s conftest${ac_exeext} 2>/dev/null; then + (./conftest; exit; ) 2>/dev/null + lt_status=$? + case x$lt_status in + x$lt_dlno_uscore) lt_cv_dlopen_self_static=yes ;; + x$lt_dlneed_uscore) lt_cv_dlopen_self_static=yes ;; + x$lt_unknown|x*) lt_cv_dlopen_self_static=no ;; + esac + else : + # compilation failed + lt_cv_dlopen_self_static=no + fi +fi +rm -fr conftest* + + +fi +{ echo "$as_me:$LINENO: result: $lt_cv_dlopen_self_static" >&5 +echo "${ECHO_T}$lt_cv_dlopen_self_static" >&6; } + fi + + CPPFLAGS="$save_CPPFLAGS" + LDFLAGS="$save_LDFLAGS" + LIBS="$save_LIBS" + ;; + esac + + case $lt_cv_dlopen_self in + yes|no) enable_dlopen_self=$lt_cv_dlopen_self ;; + *) enable_dlopen_self=unknown ;; + esac + + case $lt_cv_dlopen_self_static in + yes|no) enable_dlopen_self_static=$lt_cv_dlopen_self_static ;; + *) enable_dlopen_self_static=unknown ;; + esac +fi + + +## FIXME: this should be a separate macro +## +if test "$enable_shared" = yes && test "$GCC" = yes; then + case $archive_cmds in + *'~'*) + # FIXME: we may have to deal with multi-command sequences. + ;; + '$CC '*) + # Test whether the compiler implicitly links with -lc since on some + # systems, -lgcc has to come before -lc. If gcc already passes -lc + # to ld, don't add -lc before -lgcc. + { echo "$as_me:$LINENO: checking whether -lc should be explicitly linked in" >&5 +echo $ECHO_N "checking whether -lc should be explicitly linked in... $ECHO_C" >&6; } + if test "${lt_cv_archive_cmds_need_lc+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + $rm conftest* + echo 'static int dummy;' > conftest.$ac_ext + + if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 + (eval $ac_compile) 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; then + soname=conftest + lib=conftest + libobjs=conftest.$ac_objext + deplibs= + wl=$lt_cv_prog_cc_wl + compiler_flags=-v + linker_flags=-v + verstring= + output_objdir=. + libname=conftest + save_allow_undefined_flag=$allow_undefined_flag + allow_undefined_flag= + if { (eval echo "$as_me:$LINENO: \"$archive_cmds 2\>\&1 \| grep \" -lc \" \>/dev/null 2\>\&1\"") >&5 + (eval $archive_cmds 2\>\&1 \| grep \" -lc \" \>/dev/null 2\>\&1) 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } + then + lt_cv_archive_cmds_need_lc=no + else + lt_cv_archive_cmds_need_lc=yes + fi + allow_undefined_flag=$save_allow_undefined_flag + else + cat conftest.err 1>&5 + fi +fi + + { echo "$as_me:$LINENO: result: $lt_cv_archive_cmds_need_lc" >&5 +echo "${ECHO_T}$lt_cv_archive_cmds_need_lc" >&6; } + ;; + esac +fi +need_lc=${lt_cv_archive_cmds_need_lc-yes} +## +## END FIXME + +## FIXME: this should be a separate macro +## +# The second clause should only fire when bootstrapping the +# libtool distribution, otherwise you forgot to ship ltmain.sh +# with your package, and you will get complaints that there are +# no rules to generate ltmain.sh. +if test -f "$ltmain"; then + : +else + # If there is no Makefile yet, we rely on a make rule to execute + # `config.status --recheck' to rerun these tests and create the + # libtool script then. + test -f Makefile && make "$ltmain" +fi + +if test -f "$ltmain"; then + trap "$rm \"${ofile}T\"; exit 1" 1 2 15 + $rm -f "${ofile}T" + + echo creating $ofile + + # Now quote all the things that may contain metacharacters while being + # careful not to overquote the AC_SUBSTed values. We take copies of the + # variables and quote the copies for generation of the libtool script. + for var in echo old_CC old_CFLAGS \ + AR AR_FLAGS CC LD LN_S NM SHELL \ + reload_flag reload_cmds wl \ + pic_flag link_static_flag no_builtin_flag export_dynamic_flag_spec \ + thread_safe_flag_spec whole_archive_flag_spec libname_spec \ + library_names_spec soname_spec \ + RANLIB old_archive_cmds old_archive_from_new_cmds old_postinstall_cmds \ + old_postuninstall_cmds archive_cmds archive_expsym_cmds postinstall_cmds \ + postuninstall_cmds extract_expsyms_cmds old_archive_from_expsyms_cmds \ + old_striplib striplib file_magic_cmd export_symbols_cmds \ + deplibs_check_method allow_undefined_flag no_undefined_flag \ + finish_cmds finish_eval global_symbol_pipe global_symbol_to_cdecl \ + global_symbol_to_c_name_address \ + hardcode_libdir_flag_spec hardcode_libdir_separator \ + sys_lib_search_path_spec sys_lib_dlsearch_path_spec \ + compiler_c_o compiler_o_lo need_locks exclude_expsyms include_expsyms; do + + case $var in + reload_cmds | old_archive_cmds | old_archive_from_new_cmds | \ + old_postinstall_cmds | old_postuninstall_cmds | \ + export_symbols_cmds | archive_cmds | archive_expsym_cmds | \ + extract_expsyms_cmds | old_archive_from_expsyms_cmds | \ + postinstall_cmds | postuninstall_cmds | \ + finish_cmds | sys_lib_search_path_spec | sys_lib_dlsearch_path_spec) + # Double-quote double-evaled strings. + eval "lt_$var=\\\"\`\$echo \"X\$$var\" | \$Xsed -e \"\$double_quote_subst\" -e \"\$sed_quote_subst\" -e \"\$delay_variable_subst\"\`\\\"" + ;; + *) + eval "lt_$var=\\\"\`\$echo \"X\$$var\" | \$Xsed -e \"\$sed_quote_subst\"\`\\\"" + ;; + esac + done + + cat <<__EOF__ > "${ofile}T" +#! $SHELL + +# `$echo "$ofile" | sed 's%^.*/%%'` - Provide generalized library-building support services. +# Generated automatically by $PROGRAM (GNU $PACKAGE $VERSION$TIMESTAMP) +# NOTE: Changes made to this file will be lost: look at ltmain.sh. +# +# Copyright (C) 1996-2000 Free Software Foundation, Inc. +# Originally by Gordon Matzigkeit , 1996 +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + +# Sed that helps us avoid accidentally triggering echo(1) options like -n. +Xsed="sed -e s/^X//" + +# The HP-UX ksh and POSIX shell print the target directory to stdout +# if CDPATH is set. +if test "X\${CDPATH+set}" = Xset; then CDPATH=:; export CDPATH; fi + +# ### BEGIN LIBTOOL CONFIG + +# Libtool was configured on host `(hostname || uname -n) 2>/dev/null | sed 1q`: + +# Shell to use when invoking shell scripts. +SHELL=$lt_SHELL + +# Whether or not to build shared libraries. +build_libtool_libs=$enable_shared + +# Whether or not to build static libraries. +build_old_libs=$enable_static + +# Whether or not to add -lc for building shared libraries. +build_libtool_need_lc=$need_lc + +# Whether or not to optimize for fast installation. +fast_install=$enable_fast_install + +# The host system. +host_alias=$host_alias +host=$host + +# An echo program that does not interpret backslashes. +echo=$lt_echo + +# The archiver. +AR=$lt_AR +AR_FLAGS=$lt_AR_FLAGS + +# The default C compiler. +CC=$lt_CC + +# Is the compiler the GNU C compiler? +with_gcc=$GCC + +# The linker used to build libraries. +LD=$lt_LD + +# Whether we need hard or soft links. +LN_S=$lt_LN_S + +# A BSD-compatible nm program. +NM=$lt_NM + +# A symbol stripping program +STRIP=$STRIP + +# Used to examine libraries when file_magic_cmd begins "file" +MAGIC_CMD=$MAGIC_CMD + +# Used on cygwin: DLL creation program. +DLLTOOL="$DLLTOOL" + +# Used on cygwin: object dumper. +OBJDUMP="$OBJDUMP" + +# Used on cygwin: assembler. +AS="$AS" + +# The name of the directory that contains temporary libtool files. +objdir=$objdir + +# How to create reloadable object files. +reload_flag=$lt_reload_flag +reload_cmds=$lt_reload_cmds + +# How to pass a linker flag through the compiler. +wl=$lt_wl + +# Object file suffix (normally "o"). +objext="$ac_objext" + +# Old archive suffix (normally "a"). +libext="$libext" + +# Executable file suffix (normally ""). +exeext="$exeext" + +# Additional compiler flags for building library objects. +pic_flag=$lt_pic_flag +pic_mode=$pic_mode + +# Does compiler simultaneously support -c and -o options? +compiler_c_o=$lt_compiler_c_o + +# Can we write directly to a .lo ? +compiler_o_lo=$lt_compiler_o_lo + +# Must we lock files when doing compilation ? +need_locks=$lt_need_locks + +# Do we need the lib prefix for modules? +need_lib_prefix=$need_lib_prefix + +# Do we need a version for libraries? +need_version=$need_version + +# Whether dlopen is supported. +dlopen_support=$enable_dlopen + +# Whether dlopen of programs is supported. +dlopen_self=$enable_dlopen_self + +# Whether dlopen of statically linked programs is supported. +dlopen_self_static=$enable_dlopen_self_static + +# Compiler flag to prevent dynamic linking. +link_static_flag=$lt_link_static_flag + +# Compiler flag to turn off builtin functions. +no_builtin_flag=$lt_no_builtin_flag + +# Compiler flag to allow reflexive dlopens. +export_dynamic_flag_spec=$lt_export_dynamic_flag_spec + +# Compiler flag to generate shared objects directly from archives. +whole_archive_flag_spec=$lt_whole_archive_flag_spec + +# Compiler flag to generate thread-safe objects. +thread_safe_flag_spec=$lt_thread_safe_flag_spec + +# Library versioning type. +version_type=$version_type + +# Format of library name prefix. +libname_spec=$lt_libname_spec + +# List of archive names. First name is the real one, the rest are links. +# The last name is the one that the linker finds with -lNAME. +library_names_spec=$lt_library_names_spec + +# The coded name of the library, if different from the real name. +soname_spec=$lt_soname_spec + +# Commands used to build and install an old-style archive. +RANLIB=$lt_RANLIB +old_archive_cmds=$lt_old_archive_cmds +old_postinstall_cmds=$lt_old_postinstall_cmds +old_postuninstall_cmds=$lt_old_postuninstall_cmds + +# Create an old-style archive from a shared archive. +old_archive_from_new_cmds=$lt_old_archive_from_new_cmds + +# Create a temporary old-style archive to link instead of a shared archive. +old_archive_from_expsyms_cmds=$lt_old_archive_from_expsyms_cmds + +# Commands used to build and install a shared archive. +archive_cmds=$lt_archive_cmds +archive_expsym_cmds=$lt_archive_expsym_cmds +postinstall_cmds=$lt_postinstall_cmds +postuninstall_cmds=$lt_postuninstall_cmds + +# Commands to strip libraries. +old_striplib=$lt_old_striplib +striplib=$lt_striplib + +# Method to check whether dependent libraries are shared objects. +deplibs_check_method=$lt_deplibs_check_method + +# Command to use when deplibs_check_method == file_magic. +file_magic_cmd=$lt_file_magic_cmd + +# Flag that allows shared libraries with undefined symbols to be built. +allow_undefined_flag=$lt_allow_undefined_flag + +# Flag that forces no undefined symbols. +no_undefined_flag=$lt_no_undefined_flag + +# Commands used to finish a libtool library installation in a directory. +finish_cmds=$lt_finish_cmds + +# Same as above, but a single script fragment to be evaled but not shown. +finish_eval=$lt_finish_eval + +# Take the output of nm and produce a listing of raw symbols and C names. +global_symbol_pipe=$lt_global_symbol_pipe + +# Transform the output of nm in a proper C declaration +global_symbol_to_cdecl=$lt_global_symbol_to_cdecl + +# Transform the output of nm in a C name address pair +global_symbol_to_c_name_address=$lt_global_symbol_to_c_name_address + +# This is the shared library runtime path variable. +runpath_var=$runpath_var + +# This is the shared library path variable. +shlibpath_var=$shlibpath_var + +# Is shlibpath searched before the hard-coded library search path? +shlibpath_overrides_runpath=$shlibpath_overrides_runpath + +# How to hardcode a shared library path into an executable. +hardcode_action=$hardcode_action + +# Whether we should hardcode library paths into libraries. +hardcode_into_libs=$hardcode_into_libs + +# Flag to hardcode \$libdir into a binary during linking. +# This must work even if \$libdir does not exist. +hardcode_libdir_flag_spec=$lt_hardcode_libdir_flag_spec + +# Whether we need a single -rpath flag with a separated argument. +hardcode_libdir_separator=$lt_hardcode_libdir_separator + +# Set to yes if using DIR/libNAME.so during linking hardcodes DIR into the +# resulting binary. +hardcode_direct=$hardcode_direct + +# Set to yes if using the -LDIR flag during linking hardcodes DIR into the +# resulting binary. +hardcode_minus_L=$hardcode_minus_L + +# Set to yes if using SHLIBPATH_VAR=DIR during linking hardcodes DIR into +# the resulting binary. +hardcode_shlibpath_var=$hardcode_shlibpath_var + +# Variables whose values should be saved in libtool wrapper scripts and +# restored at relink time. +variables_saved_for_relink="$variables_saved_for_relink" + +# Whether libtool must link a program against all its dependency libraries. +link_all_deplibs=$link_all_deplibs + +# Compile-time system search path for libraries +sys_lib_search_path_spec=$lt_sys_lib_search_path_spec + +# Run-time system search path for libraries +sys_lib_dlsearch_path_spec=$lt_sys_lib_dlsearch_path_spec + +# Fix the shell variable \$srcfile for the compiler. +fix_srcfile_path="$fix_srcfile_path" + +# Set to yes if exported symbols are required. +always_export_symbols=$always_export_symbols + +# The commands to list exported symbols. +export_symbols_cmds=$lt_export_symbols_cmds + +# The commands to extract the exported symbol list from a shared archive. +extract_expsyms_cmds=$lt_extract_expsyms_cmds + +# Symbols that should not be listed in the preloaded symbols. +exclude_expsyms=$lt_exclude_expsyms + +# Symbols that must always be exported. +include_expsyms=$lt_include_expsyms + +# ### END LIBTOOL CONFIG + +__EOF__ + + case $host_os in + aix3*) + cat <<\EOF >> "${ofile}T" + +# AIX sometimes has problems with the GCC collect2 program. For some +# reason, if we set the COLLECT_NAMES environment variable, the problems +# vanish in a puff of smoke. +if test "X${COLLECT_NAMES+set}" != Xset; then + COLLECT_NAMES= + export COLLECT_NAMES +fi +EOF + ;; + esac + + case $host_os in + cygwin* | mingw* | pw32* | os2*) + cat <<'EOF' >> "${ofile}T" + # This is a source program that is used to create dlls on Windows + # Don't remove nor modify the starting and closing comments +# /* ltdll.c starts here */ +# #define WIN32_LEAN_AND_MEAN +# #include +# #undef WIN32_LEAN_AND_MEAN +# #include +# +# #ifndef __CYGWIN__ +# # ifdef __CYGWIN32__ +# # define __CYGWIN__ __CYGWIN32__ +# # endif +# #endif +# +# #ifdef __cplusplus +# extern "C" { +# #endif +# BOOL APIENTRY DllMain (HINSTANCE hInst, DWORD reason, LPVOID reserved); +# #ifdef __cplusplus +# } +# #endif +# +# #ifdef __CYGWIN__ +# #include +# DECLARE_CYGWIN_DLL( DllMain ); +# #endif +# HINSTANCE __hDllInstance_base; +# +# BOOL APIENTRY +# DllMain (HINSTANCE hInst, DWORD reason, LPVOID reserved) +# { +# __hDllInstance_base = hInst; +# return TRUE; +# } +# /* ltdll.c ends here */ + # This is a source program that is used to create import libraries + # on Windows for dlls which lack them. Don't remove nor modify the + # starting and closing comments +# /* impgen.c starts here */ +# /* Copyright (C) 1999-2000 Free Software Foundation, Inc. +# +# This file is part of GNU libtool. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# */ +# +# #include /* for printf() */ +# #include /* for open(), lseek(), read() */ +# #include /* for O_RDONLY, O_BINARY */ +# #include /* for strdup() */ +# +# /* O_BINARY isn't required (or even defined sometimes) under Unix */ +# #ifndef O_BINARY +# #define O_BINARY 0 +# #endif +# +# static unsigned int +# pe_get16 (fd, offset) +# int fd; +# int offset; +# { +# unsigned char b[2]; +# lseek (fd, offset, SEEK_SET); +# read (fd, b, 2); +# return b[0] + (b[1]<<8); +# } +# +# static unsigned int +# pe_get32 (fd, offset) +# int fd; +# int offset; +# { +# unsigned char b[4]; +# lseek (fd, offset, SEEK_SET); +# read (fd, b, 4); +# return b[0] + (b[1]<<8) + (b[2]<<16) + (b[3]<<24); +# } +# +# static unsigned int +# pe_as32 (ptr) +# void *ptr; +# { +# unsigned char *b = ptr; +# return b[0] + (b[1]<<8) + (b[2]<<16) + (b[3]<<24); +# } +# +# int +# main (argc, argv) +# int argc; +# char *argv[]; +# { +# int dll; +# unsigned long pe_header_offset, opthdr_ofs, num_entries, i; +# unsigned long export_rva, export_size, nsections, secptr, expptr; +# unsigned long name_rvas, nexp; +# unsigned char *expdata, *erva; +# char *filename, *dll_name; +# +# filename = argv[1]; +# +# dll = open(filename, O_RDONLY|O_BINARY); +# if (dll < 1) +# return 1; +# +# dll_name = filename; +# +# for (i=0; filename[i]; i++) +# if (filename[i] == '/' || filename[i] == '\\' || filename[i] == ':') +# dll_name = filename + i +1; +# +# pe_header_offset = pe_get32 (dll, 0x3c); +# opthdr_ofs = pe_header_offset + 4 + 20; +# num_entries = pe_get32 (dll, opthdr_ofs + 92); +# +# if (num_entries < 1) /* no exports */ +# return 1; +# +# export_rva = pe_get32 (dll, opthdr_ofs + 96); +# export_size = pe_get32 (dll, opthdr_ofs + 100); +# nsections = pe_get16 (dll, pe_header_offset + 4 +2); +# secptr = (pe_header_offset + 4 + 20 + +# pe_get16 (dll, pe_header_offset + 4 + 16)); +# +# expptr = 0; +# for (i = 0; i < nsections; i++) +# { +# char sname[8]; +# unsigned long secptr1 = secptr + 40 * i; +# unsigned long vaddr = pe_get32 (dll, secptr1 + 12); +# unsigned long vsize = pe_get32 (dll, secptr1 + 16); +# unsigned long fptr = pe_get32 (dll, secptr1 + 20); +# lseek(dll, secptr1, SEEK_SET); +# read(dll, sname, 8); +# if (vaddr <= export_rva && vaddr+vsize > export_rva) +# { +# expptr = fptr + (export_rva - vaddr); +# if (export_rva + export_size > vaddr + vsize) +# export_size = vsize - (export_rva - vaddr); +# break; +# } +# } +# +# expdata = (unsigned char*)malloc(export_size); +# lseek (dll, expptr, SEEK_SET); +# read (dll, expdata, export_size); +# erva = expdata - export_rva; +# +# nexp = pe_as32 (expdata+24); +# name_rvas = pe_as32 (expdata+32); +# +# printf ("EXPORTS\n"); +# for (i = 0; i> "${ofile}T" || (rm -f "${ofile}T"; exit 1) + + mv -f "${ofile}T" "$ofile" || \ + (rm -f "$ofile" && cp "${ofile}T" "$ofile" && rm -f "${ofile}T") + chmod +x "$ofile" +fi +## +## END FIXME + + + + + +# This can be used to rebuild libtool when needed +LIBTOOL_DEPS="$ac_aux_dir/ltmain.sh" + +# Always use our own libtool. +LIBTOOL='$(SHELL) $(top_builddir)/libtool' + +# Prevent multiple expansion + + + + +for ac_prog in flex lex +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_LEX+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$LEX"; then + ac_cv_prog_LEX="$LEX" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_LEX="$ac_prog" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +LEX=$ac_cv_prog_LEX +if test -n "$LEX"; then + { echo "$as_me:$LINENO: result: $LEX" >&5 +echo "${ECHO_T}$LEX" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + test -n "$LEX" && break +done +test -n "$LEX" || LEX=":" + +if test "x$LEX" != "x:"; then + cat >conftest.l <<_ACEOF +%% +a { ECHO; } +b { REJECT; } +c { yymore (); } +d { yyless (1); } +e { yyless (input () != 0); } +f { unput (yytext[0]); } +. { BEGIN INITIAL; } +%% +#ifdef YYTEXT_POINTER +extern char *yytext; +#endif +int +main (void) +{ + return ! yylex () + ! yywrap (); +} +_ACEOF +{ (ac_try="$LEX conftest.l" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$LEX conftest.l") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } +{ echo "$as_me:$LINENO: checking lex output file root" >&5 +echo $ECHO_N "checking lex output file root... $ECHO_C" >&6; } +if test "${ac_cv_prog_lex_root+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + +if test -f lex.yy.c; then + ac_cv_prog_lex_root=lex.yy +elif test -f lexyy.c; then + ac_cv_prog_lex_root=lexyy +else + { { echo "$as_me:$LINENO: error: cannot find output from $LEX; giving up" >&5 +echo "$as_me: error: cannot find output from $LEX; giving up" >&2;} + { (exit 1); exit 1; }; } +fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_prog_lex_root" >&5 +echo "${ECHO_T}$ac_cv_prog_lex_root" >&6; } +LEX_OUTPUT_ROOT=$ac_cv_prog_lex_root + +if test -z "${LEXLIB+set}"; then + { echo "$as_me:$LINENO: checking lex library" >&5 +echo $ECHO_N "checking lex library... $ECHO_C" >&6; } +if test "${ac_cv_lib_lex+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + + ac_save_LIBS=$LIBS + ac_cv_lib_lex='none needed' + for ac_lib in '' -lfl -ll; do + LIBS="$ac_lib $ac_save_LIBS" + cat >conftest.$ac_ext <<_ACEOF +`cat $LEX_OUTPUT_ROOT.c` +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_lib_lex=$ac_lib +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext + test "$ac_cv_lib_lex" != 'none needed' && break + done + LIBS=$ac_save_LIBS + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_lib_lex" >&5 +echo "${ECHO_T}$ac_cv_lib_lex" >&6; } + test "$ac_cv_lib_lex" != 'none needed' && LEXLIB=$ac_cv_lib_lex +fi + + +{ echo "$as_me:$LINENO: checking whether yytext is a pointer" >&5 +echo $ECHO_N "checking whether yytext is a pointer... $ECHO_C" >&6; } +if test "${ac_cv_prog_lex_yytext_pointer+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + # POSIX says lex can declare yytext either as a pointer or an array; the +# default is implementation-dependent. Figure out which it is, since +# not all implementations provide the %pointer and %array declarations. +ac_cv_prog_lex_yytext_pointer=no +ac_save_LIBS=$LIBS +LIBS="$LEXLIB $ac_save_LIBS" +cat >conftest.$ac_ext <<_ACEOF +#define YYTEXT_POINTER 1 +`cat $LEX_OUTPUT_ROOT.c` +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_prog_lex_yytext_pointer=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_save_LIBS + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_prog_lex_yytext_pointer" >&5 +echo "${ECHO_T}$ac_cv_prog_lex_yytext_pointer" >&6; } +if test $ac_cv_prog_lex_yytext_pointer = yes; then + +cat >>confdefs.h <<\_ACEOF +#define YYTEXT_POINTER 1 +_ACEOF + +fi +rm -f conftest.l $LEX_OUTPUT_ROOT.c + +fi +if test ${LEX} = "flex"; then + cat >>confdefs.h <<\_ACEOF +#define HAVE_FLEX 1 +_ACEOF + +fi +for ac_prog in 'bison -y' byacc +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_YACC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$YACC"; then + ac_cv_prog_YACC="$YACC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_YACC="$ac_prog" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +YACC=$ac_cv_prog_YACC +if test -n "$YACC"; then + { echo "$as_me:$LINENO: result: $YACC" >&5 +echo "${ECHO_T}$YACC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + test -n "$YACC" && break +done +test -n "$YACC" || YACC="yacc" + +# Extract the first word of "bison++", so it can be a program name with args. +set dummy bison++; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_BISON_PLUS_PLUS+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$BISON_PLUS_PLUS"; then + ac_cv_prog_BISON_PLUS_PLUS="$BISON_PLUS_PLUS" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_BISON_PLUS_PLUS="bison++" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_BISON_PLUS_PLUS" && ac_cv_prog_BISON_PLUS_PLUS=":" +fi +fi +BISON_PLUS_PLUS=$ac_cv_prog_BISON_PLUS_PLUS +if test -n "$BISON_PLUS_PLUS"; then + { echo "$as_me:$LINENO: result: $BISON_PLUS_PLUS" >&5 +echo "${ECHO_T}$BISON_PLUS_PLUS" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + + +ac_ext=cpp +ac_cpp='$CXXCPP $CPPFLAGS' +ac_compile='$CXX -c $CXXFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CXX -o conftest$ac_exeext $CXXFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_cxx_compiler_gnu + + +# Checking for header files. +# =========================================================================== + +if test -d /stuff/include; then + CPPFLAGS="$CPPFLAGS -I/stuff/include" +fi + + + +{ echo "$as_me:$LINENO: checking for ANSI C header files" >&5 +echo $ECHO_N "checking for ANSI C header files... $ECHO_C" >&6; } +if test "${ac_cv_header_stdc+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#include +#include + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_header_stdc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_header_stdc=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + +if test $ac_cv_header_stdc = yes; then + # SunOS 4.x string.h does not declare mem*, contrary to ANSI. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "memchr" >/dev/null 2>&1; then + : +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "free" >/dev/null 2>&1; then + : +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. + if test "$cross_compiling" = yes; then + : +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#if ((' ' & 0x0FF) == 0x020) +# define ISLOWER(c) ('a' <= (c) && (c) <= 'z') +# define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c)) +#else +# define ISLOWER(c) \ + (('a' <= (c) && (c) <= 'i') \ + || ('j' <= (c) && (c) <= 'r') \ + || ('s' <= (c) && (c) <= 'z')) +# define TOUPPER(c) (ISLOWER(c) ? ((c) | 0x40) : (c)) +#endif + +#define XOR(e, f) (((e) && !(f)) || (!(e) && (f))) +int +main () +{ + int i; + for (i = 0; i < 256; i++) + if (XOR (islower (i), ISLOWER (i)) + || toupper (i) != TOUPPER (i)) + return 2; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + : +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +ac_cv_header_stdc=no +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi + + +fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_stdc" >&5 +echo "${ECHO_T}$ac_cv_header_stdc" >&6; } +if test $ac_cv_header_stdc = yes; then + +cat >>confdefs.h <<\_ACEOF +#define STDC_HEADERS 1 +_ACEOF + +fi + + + + +for ac_header in getopt.h unistd.h termios.h +do +as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + { echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +else + # Is the header compilable? +{ echo "$as_me:$LINENO: checking $ac_header usability" >&5 +echo $ECHO_N "checking $ac_header usability... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +#include <$ac_header> +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_header_compiler=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_compiler=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 +echo "${ECHO_T}$ac_header_compiler" >&6; } + +# Is the header present? +{ echo "$as_me:$LINENO: checking $ac_header presence" >&5 +echo $ECHO_N "checking $ac_header presence... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include <$ac_header> +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || + test ! -s conftest.err + }; then + ac_header_preproc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_preproc=no +fi + +rm -f conftest.err conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 +echo "${ECHO_T}$ac_header_preproc" >&6; } + +# So? What about this header? +case $ac_header_compiler:$ac_header_preproc:$ac_cxx_preproc_warn_flag in + yes:no: ) + { echo "$as_me:$LINENO: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&5 +echo "$as_me: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the compiler's result" >&5 +echo "$as_me: WARNING: $ac_header: proceeding with the compiler's result" >&2;} + ac_header_preproc=yes + ;; + no:yes:* ) + { echo "$as_me:$LINENO: WARNING: $ac_header: present but cannot be compiled" >&5 +echo "$as_me: WARNING: $ac_header: present but cannot be compiled" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: check for missing prerequisite headers?" >&5 +echo "$as_me: WARNING: $ac_header: check for missing prerequisite headers?" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: see the Autoconf documentation" >&5 +echo "$as_me: WARNING: $ac_header: see the Autoconf documentation" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&5 +echo "$as_me: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the preprocessor's result" >&5 +echo "$as_me: WARNING: $ac_header: proceeding with the preprocessor's result" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: in the future, the compiler will take precedence" >&5 +echo "$as_me: WARNING: $ac_header: in the future, the compiler will take precedence" >&2;} + + ;; +esac +{ echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + eval "$as_ac_Header=\$ac_header_preproc" +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } + +fi +if test `eval echo '${'$as_ac_Header'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 +_ACEOF + +fi + +done + + +if test "${ac_cv_header_curses_h+set}" = set; then + { echo "$as_me:$LINENO: checking for curses.h" >&5 +echo $ECHO_N "checking for curses.h... $ECHO_C" >&6; } +if test "${ac_cv_header_curses_h+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_curses_h" >&5 +echo "${ECHO_T}$ac_cv_header_curses_h" >&6; } +else + # Is the header compilable? +{ echo "$as_me:$LINENO: checking curses.h usability" >&5 +echo $ECHO_N "checking curses.h usability... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +#include +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_header_compiler=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_compiler=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 +echo "${ECHO_T}$ac_header_compiler" >&6; } + +# Is the header present? +{ echo "$as_me:$LINENO: checking curses.h presence" >&5 +echo $ECHO_N "checking curses.h presence... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || + test ! -s conftest.err + }; then + ac_header_preproc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_preproc=no +fi + +rm -f conftest.err conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 +echo "${ECHO_T}$ac_header_preproc" >&6; } + +# So? What about this header? +case $ac_header_compiler:$ac_header_preproc:$ac_cxx_preproc_warn_flag in + yes:no: ) + { echo "$as_me:$LINENO: WARNING: curses.h: accepted by the compiler, rejected by the preprocessor!" >&5 +echo "$as_me: WARNING: curses.h: accepted by the compiler, rejected by the preprocessor!" >&2;} + { echo "$as_me:$LINENO: WARNING: curses.h: proceeding with the compiler's result" >&5 +echo "$as_me: WARNING: curses.h: proceeding with the compiler's result" >&2;} + ac_header_preproc=yes + ;; + no:yes:* ) + { echo "$as_me:$LINENO: WARNING: curses.h: present but cannot be compiled" >&5 +echo "$as_me: WARNING: curses.h: present but cannot be compiled" >&2;} + { echo "$as_me:$LINENO: WARNING: curses.h: check for missing prerequisite headers?" >&5 +echo "$as_me: WARNING: curses.h: check for missing prerequisite headers?" >&2;} + { echo "$as_me:$LINENO: WARNING: curses.h: see the Autoconf documentation" >&5 +echo "$as_me: WARNING: curses.h: see the Autoconf documentation" >&2;} + { echo "$as_me:$LINENO: WARNING: curses.h: section \"Present But Cannot Be Compiled\"" >&5 +echo "$as_me: WARNING: curses.h: section \"Present But Cannot Be Compiled\"" >&2;} + { echo "$as_me:$LINENO: WARNING: curses.h: proceeding with the preprocessor's result" >&5 +echo "$as_me: WARNING: curses.h: proceeding with the preprocessor's result" >&2;} + { echo "$as_me:$LINENO: WARNING: curses.h: in the future, the compiler will take precedence" >&5 +echo "$as_me: WARNING: curses.h: in the future, the compiler will take precedence" >&2;} + + ;; +esac +{ echo "$as_me:$LINENO: checking for curses.h" >&5 +echo $ECHO_N "checking for curses.h... $ECHO_C" >&6; } +if test "${ac_cv_header_curses_h+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_cv_header_curses_h=$ac_header_preproc +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_curses_h" >&5 +echo "${ECHO_T}$ac_cv_header_curses_h" >&6; } + +fi +if test $ac_cv_header_curses_h = yes; then + cat >>confdefs.h <<\_ACEOF +#define HAVE_CURSES_H 1 +_ACEOF + + curses_h_ok=yes +else + curses_h_ok=no + +fi + + + +ucsim_cv_socket="unknown" +if test "${ac_cv_header_sys_socket_h+set}" = set; then + { echo "$as_me:$LINENO: checking for sys/socket.h" >&5 +echo $ECHO_N "checking for sys/socket.h... $ECHO_C" >&6; } +if test "${ac_cv_header_sys_socket_h+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_sys_socket_h" >&5 +echo "${ECHO_T}$ac_cv_header_sys_socket_h" >&6; } +else + # Is the header compilable? +{ echo "$as_me:$LINENO: checking sys/socket.h usability" >&5 +echo $ECHO_N "checking sys/socket.h usability... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +#include +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_header_compiler=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_compiler=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 +echo "${ECHO_T}$ac_header_compiler" >&6; } + +# Is the header present? +{ echo "$as_me:$LINENO: checking sys/socket.h presence" >&5 +echo $ECHO_N "checking sys/socket.h presence... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || + test ! -s conftest.err + }; then + ac_header_preproc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_preproc=no +fi + +rm -f conftest.err conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 +echo "${ECHO_T}$ac_header_preproc" >&6; } + +# So? What about this header? +case $ac_header_compiler:$ac_header_preproc:$ac_cxx_preproc_warn_flag in + yes:no: ) + { echo "$as_me:$LINENO: WARNING: sys/socket.h: accepted by the compiler, rejected by the preprocessor!" >&5 +echo "$as_me: WARNING: sys/socket.h: accepted by the compiler, rejected by the preprocessor!" >&2;} + { echo "$as_me:$LINENO: WARNING: sys/socket.h: proceeding with the compiler's result" >&5 +echo "$as_me: WARNING: sys/socket.h: proceeding with the compiler's result" >&2;} + ac_header_preproc=yes + ;; + no:yes:* ) + { echo "$as_me:$LINENO: WARNING: sys/socket.h: present but cannot be compiled" >&5 +echo "$as_me: WARNING: sys/socket.h: present but cannot be compiled" >&2;} + { echo "$as_me:$LINENO: WARNING: sys/socket.h: check for missing prerequisite headers?" >&5 +echo "$as_me: WARNING: sys/socket.h: check for missing prerequisite headers?" >&2;} + { echo "$as_me:$LINENO: WARNING: sys/socket.h: see the Autoconf documentation" >&5 +echo "$as_me: WARNING: sys/socket.h: see the Autoconf documentation" >&2;} + { echo "$as_me:$LINENO: WARNING: sys/socket.h: section \"Present But Cannot Be Compiled\"" >&5 +echo "$as_me: WARNING: sys/socket.h: section \"Present But Cannot Be Compiled\"" >&2;} + { echo "$as_me:$LINENO: WARNING: sys/socket.h: proceeding with the preprocessor's result" >&5 +echo "$as_me: WARNING: sys/socket.h: proceeding with the preprocessor's result" >&2;} + { echo "$as_me:$LINENO: WARNING: sys/socket.h: in the future, the compiler will take precedence" >&5 +echo "$as_me: WARNING: sys/socket.h: in the future, the compiler will take precedence" >&2;} + + ;; +esac +{ echo "$as_me:$LINENO: checking for sys/socket.h" >&5 +echo $ECHO_N "checking for sys/socket.h... $ECHO_C" >&6; } +if test "${ac_cv_header_sys_socket_h+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_cv_header_sys_socket_h=$ac_header_preproc +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_sys_socket_h" >&5 +echo "${ECHO_T}$ac_cv_header_sys_socket_h" >&6; } + +fi +if test $ac_cv_header_sys_socket_h = yes; then + cat >>confdefs.h <<\_ACEOF +#define HAVE_SYS_SOCKET_H 1 +_ACEOF + + cat >>confdefs.h <<\_ACEOF +#define SOCKET_AVAIL 1 +_ACEOF + + cat >>confdefs.h <<_ACEOF +#define UCSOCKET_T int +_ACEOF + + ucsim_cv_socket="" + +fi + + + +WINSOCK_AVAIL=0 +if test $ucsim_cv_socket = unknown; then + if test "${ac_cv_header_winsock2_h+set}" = set; then + { echo "$as_me:$LINENO: checking for winsock2.h" >&5 +echo $ECHO_N "checking for winsock2.h... $ECHO_C" >&6; } +if test "${ac_cv_header_winsock2_h+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_winsock2_h" >&5 +echo "${ECHO_T}$ac_cv_header_winsock2_h" >&6; } +else + # Is the header compilable? +{ echo "$as_me:$LINENO: checking winsock2.h usability" >&5 +echo $ECHO_N "checking winsock2.h usability... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +#include +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_header_compiler=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_compiler=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 +echo "${ECHO_T}$ac_header_compiler" >&6; } + +# Is the header present? +{ echo "$as_me:$LINENO: checking winsock2.h presence" >&5 +echo $ECHO_N "checking winsock2.h presence... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || + test ! -s conftest.err + }; then + ac_header_preproc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_preproc=no +fi + +rm -f conftest.err conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 +echo "${ECHO_T}$ac_header_preproc" >&6; } + +# So? What about this header? +case $ac_header_compiler:$ac_header_preproc:$ac_cxx_preproc_warn_flag in + yes:no: ) + { echo "$as_me:$LINENO: WARNING: winsock2.h: accepted by the compiler, rejected by the preprocessor!" >&5 +echo "$as_me: WARNING: winsock2.h: accepted by the compiler, rejected by the preprocessor!" >&2;} + { echo "$as_me:$LINENO: WARNING: winsock2.h: proceeding with the compiler's result" >&5 +echo "$as_me: WARNING: winsock2.h: proceeding with the compiler's result" >&2;} + ac_header_preproc=yes + ;; + no:yes:* ) + { echo "$as_me:$LINENO: WARNING: winsock2.h: present but cannot be compiled" >&5 +echo "$as_me: WARNING: winsock2.h: present but cannot be compiled" >&2;} + { echo "$as_me:$LINENO: WARNING: winsock2.h: check for missing prerequisite headers?" >&5 +echo "$as_me: WARNING: winsock2.h: check for missing prerequisite headers?" >&2;} + { echo "$as_me:$LINENO: WARNING: winsock2.h: see the Autoconf documentation" >&5 +echo "$as_me: WARNING: winsock2.h: see the Autoconf documentation" >&2;} + { echo "$as_me:$LINENO: WARNING: winsock2.h: section \"Present But Cannot Be Compiled\"" >&5 +echo "$as_me: WARNING: winsock2.h: section \"Present But Cannot Be Compiled\"" >&2;} + { echo "$as_me:$LINENO: WARNING: winsock2.h: proceeding with the preprocessor's result" >&5 +echo "$as_me: WARNING: winsock2.h: proceeding with the preprocessor's result" >&2;} + { echo "$as_me:$LINENO: WARNING: winsock2.h: in the future, the compiler will take precedence" >&5 +echo "$as_me: WARNING: winsock2.h: in the future, the compiler will take precedence" >&2;} + + ;; +esac +{ echo "$as_me:$LINENO: checking for winsock2.h" >&5 +echo $ECHO_N "checking for winsock2.h... $ECHO_C" >&6; } +if test "${ac_cv_header_winsock2_h+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_cv_header_winsock2_h=$ac_header_preproc +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_winsock2_h" >&5 +echo "${ECHO_T}$ac_cv_header_winsock2_h" >&6; } + +fi +if test $ac_cv_header_winsock2_h = yes; then + cat >>confdefs.h <<\_ACEOF +#define HAVE_WINSOCK2_H 1 +_ACEOF + + cat >>confdefs.h <<\_ACEOF +#define SOCKET_AVAIL 1 +_ACEOF + + cat >>confdefs.h <<_ACEOF +#define UCSOCKET_T SOCKET +_ACEOF + + ucsim_cv_socket="" + WINSOCK_AVAIL=1 + +fi + + +fi + + +if test $ucsim_cv_socket != unknown; then + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include <$ucsim_cv_socket> + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "socklen_t" >/dev/null 2>&1; then + cat >>confdefs.h <<_ACEOF +#define SOCKLEN_T socklen_t +_ACEOF + +else + cat >>confdefs.h <<_ACEOF +#define SOCKLEN_T uint +_ACEOF + +fi +rm -f conftest* + +fi +cat >>confdefs.h <<_ACEOF +#define HEADER_SOCKET ${ucsim_cv_socket} +_ACEOF + + +if test "${ac_cv_header_dlfcn_h+set}" = set; then + { echo "$as_me:$LINENO: checking for dlfcn.h" >&5 +echo $ECHO_N "checking for dlfcn.h... $ECHO_C" >&6; } +if test "${ac_cv_header_dlfcn_h+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_dlfcn_h" >&5 +echo "${ECHO_T}$ac_cv_header_dlfcn_h" >&6; } +else + # Is the header compilable? +{ echo "$as_me:$LINENO: checking dlfcn.h usability" >&5 +echo $ECHO_N "checking dlfcn.h usability... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +#include +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_header_compiler=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_compiler=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 +echo "${ECHO_T}$ac_header_compiler" >&6; } + +# Is the header present? +{ echo "$as_me:$LINENO: checking dlfcn.h presence" >&5 +echo $ECHO_N "checking dlfcn.h presence... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_cxx_preproc_warn_flag$ac_cxx_werror_flag" || + test ! -s conftest.err + }; then + ac_header_preproc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_preproc=no +fi + +rm -f conftest.err conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 +echo "${ECHO_T}$ac_header_preproc" >&6; } + +# So? What about this header? +case $ac_header_compiler:$ac_header_preproc:$ac_cxx_preproc_warn_flag in + yes:no: ) + { echo "$as_me:$LINENO: WARNING: dlfcn.h: accepted by the compiler, rejected by the preprocessor!" >&5 +echo "$as_me: WARNING: dlfcn.h: accepted by the compiler, rejected by the preprocessor!" >&2;} + { echo "$as_me:$LINENO: WARNING: dlfcn.h: proceeding with the compiler's result" >&5 +echo "$as_me: WARNING: dlfcn.h: proceeding with the compiler's result" >&2;} + ac_header_preproc=yes + ;; + no:yes:* ) + { echo "$as_me:$LINENO: WARNING: dlfcn.h: present but cannot be compiled" >&5 +echo "$as_me: WARNING: dlfcn.h: present but cannot be compiled" >&2;} + { echo "$as_me:$LINENO: WARNING: dlfcn.h: check for missing prerequisite headers?" >&5 +echo "$as_me: WARNING: dlfcn.h: check for missing prerequisite headers?" >&2;} + { echo "$as_me:$LINENO: WARNING: dlfcn.h: see the Autoconf documentation" >&5 +echo "$as_me: WARNING: dlfcn.h: see the Autoconf documentation" >&2;} + { echo "$as_me:$LINENO: WARNING: dlfcn.h: section \"Present But Cannot Be Compiled\"" >&5 +echo "$as_me: WARNING: dlfcn.h: section \"Present But Cannot Be Compiled\"" >&2;} + { echo "$as_me:$LINENO: WARNING: dlfcn.h: proceeding with the preprocessor's result" >&5 +echo "$as_me: WARNING: dlfcn.h: proceeding with the preprocessor's result" >&2;} + { echo "$as_me:$LINENO: WARNING: dlfcn.h: in the future, the compiler will take precedence" >&5 +echo "$as_me: WARNING: dlfcn.h: in the future, the compiler will take precedence" >&2;} + + ;; +esac +{ echo "$as_me:$LINENO: checking for dlfcn.h" >&5 +echo $ECHO_N "checking for dlfcn.h... $ECHO_C" >&6; } +if test "${ac_cv_header_dlfcn_h+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_cv_header_dlfcn_h=$ac_header_preproc +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_dlfcn_h" >&5 +echo "${ECHO_T}$ac_cv_header_dlfcn_h" >&6; } + +fi + + + + + + + +ac_header_dirent=no +for ac_hdr in dirent.h sys/ndir.h sys/dir.h ndir.h; do + as_ac_Header=`echo "ac_cv_header_dirent_$ac_hdr" | $as_tr_sh` +{ echo "$as_me:$LINENO: checking for $ac_hdr that defines DIR" >&5 +echo $ECHO_N "checking for $ac_hdr that defines DIR... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include <$ac_hdr> + +int +main () +{ +if ((DIR *) 0) +return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + eval "$as_ac_Header=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_Header=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_Header'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_hdr" | $as_tr_cpp` 1 +_ACEOF + +ac_header_dirent=$ac_hdr; break +fi + +done +# Two versions of opendir et al. are in -ldir and -lx on SCO Xenix. +if test $ac_header_dirent = dirent.h; then + { echo "$as_me:$LINENO: checking for library containing opendir" >&5 +echo $ECHO_N "checking for library containing opendir... $ECHO_C" >&6; } +if test "${ac_cv_search_opendir+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_func_search_save_LIBS=$LIBS +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char opendir (); +int +main () +{ +return opendir (); + ; + return 0; +} +_ACEOF +for ac_lib in '' dir; do + if test -z "$ac_lib"; then + ac_res="none required" + else + ac_res=-l$ac_lib + LIBS="-l$ac_lib $ac_func_search_save_LIBS" + fi + rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_search_opendir=$ac_res +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext + if test "${ac_cv_search_opendir+set}" = set; then + break +fi +done +if test "${ac_cv_search_opendir+set}" = set; then + : +else + ac_cv_search_opendir=no +fi +rm conftest.$ac_ext +LIBS=$ac_func_search_save_LIBS +fi +{ echo "$as_me:$LINENO: result: $ac_cv_search_opendir" >&5 +echo "${ECHO_T}$ac_cv_search_opendir" >&6; } +ac_res=$ac_cv_search_opendir +if test "$ac_res" != no; then + test "$ac_res" = "none required" || LIBS="$ac_res $LIBS" + +fi + +else + { echo "$as_me:$LINENO: checking for library containing opendir" >&5 +echo $ECHO_N "checking for library containing opendir... $ECHO_C" >&6; } +if test "${ac_cv_search_opendir+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_func_search_save_LIBS=$LIBS +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char opendir (); +int +main () +{ +return opendir (); + ; + return 0; +} +_ACEOF +for ac_lib in '' x; do + if test -z "$ac_lib"; then + ac_res="none required" + else + ac_res=-l$ac_lib + LIBS="-l$ac_lib $ac_func_search_save_LIBS" + fi + rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_search_opendir=$ac_res +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext + if test "${ac_cv_search_opendir+set}" = set; then + break +fi +done +if test "${ac_cv_search_opendir+set}" = set; then + : +else + ac_cv_search_opendir=no +fi +rm conftest.$ac_ext +LIBS=$ac_func_search_save_LIBS +fi +{ echo "$as_me:$LINENO: result: $ac_cv_search_opendir" >&5 +echo "${ECHO_T}$ac_cv_search_opendir" >&6; } +ac_res=$ac_cv_search_opendir +if test "$ac_res" != no; then + test "$ac_res" = "none required" || LIBS="$ac_res $LIBS" + +fi + +fi + + +# This must be after CXXCPP + +{ echo "$as_me:$LINENO: checking which header file defines FD_ macros" >&5 +echo $ECHO_N "checking which header file defines FD_ macros... $ECHO_C" >&6; } +if test "${ucsim_cv_fd+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ucsim_cv_fd="unknown" +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +#include +#ifdef FD_ZERO +yes +#endif +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "yes" >/dev/null 2>&1; then + ucsim_cv_fd="" +fi +rm -f conftest* + +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +#include +#ifdef FD_ZERO +yes +#endif +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "yes" >/dev/null 2>&1; then + ucsim_cv_fd="" +fi +rm -f conftest* + +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +#include +#ifdef FD_ZERO +yes +#endif +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "yes" >/dev/null 2>&1; then + ucsim_cv_fd="" +fi +rm -f conftest* + +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +#include +#ifdef FD_ZERO +yes +#endif +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "yes" >/dev/null 2>&1; then + ucsim_cv_fd="" +fi +rm -f conftest* + +fi +{ echo "$as_me:$LINENO: result: $ucsim_cv_fd" >&5 +echo "${ECHO_T}$ucsim_cv_fd" >&6; } + +ucsim_cv_header_ok=0 +if echo $ucsim_cv_fd|grep time >/dev/null 2>&1; then +cat >>confdefs.h <<\_ACEOF +#define FD_NEED_TIME_H 1 +_ACEOF + +ucsim_cv_header_ok=1 +else +cat >>confdefs.h <<\_ACEOF +#define FD_NEED_TIME_H 0 +_ACEOF + +fi +if echo $ucsim_cv_fd|grep types >/dev/null 2>&1; then +cat >>confdefs.h <<\_ACEOF +#define FD_NEED_TYPES_H 1 +_ACEOF + +ucsim_cv_header_ok=1 +else +cat >>confdefs.h <<\_ACEOF +#define FD_NEED_TYPES_H 0 +_ACEOF + +fi +if echo $ucsim_cv_fd|grep select >/dev/null 2>&1; then +cat >>confdefs.h <<\_ACEOF +#define FD_NEED_SELECT_H 1 +_ACEOF + +ucsim_cv_header_ok=1 +else +cat >>confdefs.h <<\_ACEOF +#define FD_NEED_SELECT_H 0 +_ACEOF + +fi +if echo $ucsim_cv_fd|grep winsock2 >/dev/null 2>&1; then +cat >>confdefs.h <<\_ACEOF +#define FD_NEED_WINSOCK2_H 1 +_ACEOF + +ucsim_cv_header_ok=1 +else +cat >>confdefs.h <<\_ACEOF +#define FD_NEED_WINSOCK2_H 0 +_ACEOF + +fi + +cat >>confdefs.h <<_ACEOF +#define FD_HEADER_OK ${ucsim_cv_header_ok} +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define HEADER_FD ${ucsim_cv_fd} +_ACEOF + + + +# Checking for functions/libs +# =========================================================================== +if echo $ucsim_cv_socket|grep winsock2 >/dev/null 2>&1; then + LIBS="-lws2_32 $LIBS" +else + +{ echo "$as_me:$LINENO: checking for socket in -lsocket" >&5 +echo $ECHO_N "checking for socket in -lsocket... $ECHO_C" >&6; } +if test "${ac_cv_lib_socket_socket+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-lsocket $LIBS" +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char socket (); +int +main () +{ +return socket (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_lib_socket_socket=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_lib_socket_socket=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ echo "$as_me:$LINENO: result: $ac_cv_lib_socket_socket" >&5 +echo "${ECHO_T}$ac_cv_lib_socket_socket" >&6; } +if test $ac_cv_lib_socket_socket = yes; then + cat >>confdefs.h <<_ACEOF +#define HAVE_LIBSOCKET 1 +_ACEOF + + LIBS="-lsocket $LIBS" + +fi + + +{ echo "$as_me:$LINENO: checking for xdr_short in -lnsl" >&5 +echo $ECHO_N "checking for xdr_short in -lnsl... $ECHO_C" >&6; } +if test "${ac_cv_lib_nsl_xdr_short+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-lnsl $LIBS" +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char xdr_short (); +int +main () +{ +return xdr_short (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_lib_nsl_xdr_short=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_lib_nsl_xdr_short=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ echo "$as_me:$LINENO: result: $ac_cv_lib_nsl_xdr_short" >&5 +echo "${ECHO_T}$ac_cv_lib_nsl_xdr_short" >&6; } +if test $ac_cv_lib_nsl_xdr_short = yes; then + cat >>confdefs.h <<_ACEOF +#define HAVE_LIBNSL 1 +_ACEOF + + LIBS="-lnsl $LIBS" + +fi + +fi + +{ echo "$as_me:$LINENO: checking for dlopen in -ldl" >&5 +echo $ECHO_N "checking for dlopen in -ldl... $ECHO_C" >&6; } +if test "${ac_cv_lib_dl_dlopen+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-ldl $LIBS" +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char dlopen (); +int +main () +{ +return dlopen (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_lib_dl_dlopen=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_lib_dl_dlopen=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ echo "$as_me:$LINENO: result: $ac_cv_lib_dl_dlopen" >&5 +echo "${ECHO_T}$ac_cv_lib_dl_dlopen" >&6; } +if test $ac_cv_lib_dl_dlopen = yes; then + dl_ok="yes" +DL="-ldl" +else + dl_ok="no" +DL="" +fi + + + + +#AC_CHECK_LIB(panel,panel_above, +#panel_ok="yes" +#curses_ok="yes" +#CURSES_LIBS="-lpanel -lcurses" +#, +#panel_ok="no" +#AC_CHECK_LIB(curses,nl, +#curses_ok="yes" +#CURSES_LIBS="-lcurses" +#, +#curses_ok="no") +#, +#-lcurses) + +if test $curses_h_ok != yes; then + panel_ok="no" + curses_ok="no" +else + { echo "$as_me:$LINENO: checking for panel_above in -lpanel" >&5 +echo $ECHO_N "checking for panel_above in -lpanel... $ECHO_C" >&6; } +if test "${ac_cv_lib_panel_panel_above+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-lpanel $LIBS" +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char panel_above (); +int +main () +{ +return panel_above (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_lib_panel_panel_above=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_lib_panel_panel_above=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ echo "$as_me:$LINENO: result: $ac_cv_lib_panel_panel_above" >&5 +echo "${ECHO_T}$ac_cv_lib_panel_panel_above" >&6; } +if test $ac_cv_lib_panel_panel_above = yes; then + panel_ok="yes" + curses_ok="yes" + CURSES_LIBS="-lpanel" +else + panel_ok="no" + curses_ok="no" + +fi + + + if test $curses_ok != yes; then + { echo "$as_me:$LINENO: checking for nl in -lcurses" >&5 +echo $ECHO_N "checking for nl in -lcurses... $ECHO_C" >&6; } +if test "${ac_cv_lib_curses_nl+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-lcurses $LIBS" +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char nl (); +int +main () +{ +return nl (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_lib_curses_nl=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_lib_curses_nl=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ echo "$as_me:$LINENO: result: $ac_cv_lib_curses_nl" >&5 +echo "${ECHO_T}$ac_cv_lib_curses_nl" >&6; } +if test $ac_cv_lib_curses_nl = yes; then + curses_ok="yes" + CURSES_LIBS="-lcurses" +else + curses_ok="no" +fi + + fi + + if test $curses_ok != yes; then + { echo "$as_me:$LINENO: checking for nl in -lncurses" >&5 +echo $ECHO_N "checking for nl in -lncurses... $ECHO_C" >&6; } +if test "${ac_cv_lib_ncurses_nl+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-lncurses $LIBS" +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char nl (); +int +main () +{ +return nl (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_lib_ncurses_nl=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_lib_ncurses_nl=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ echo "$as_me:$LINENO: result: $ac_cv_lib_ncurses_nl" >&5 +echo "${ECHO_T}$ac_cv_lib_ncurses_nl" >&6; } +if test $ac_cv_lib_ncurses_nl = yes; then + curses_ok="yes" + CURSES_LIBS="-lncurses" +else + curses_ok="no" +fi + + fi +fi + + + + + + +for ac_func in vprintf +do +as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` +{ echo "$as_me:$LINENO: checking for $ac_func" >&5 +echo $ECHO_N "checking for $ac_func... $ECHO_C" >&6; } +if { as_var=$as_ac_var; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define $ac_func to an innocuous variant, in case declares $ac_func. + For example, HP-UX 11i declares gettimeofday. */ +#define $ac_func innocuous_$ac_func + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char $ac_func (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef $ac_func + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char $ac_func (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_$ac_func || defined __stub___$ac_func +choke me +#endif + +int +main () +{ +return $ac_func (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + eval "$as_ac_var=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_var=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_var'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_var'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_func" | $as_tr_cpp` 1 +_ACEOF + +{ echo "$as_me:$LINENO: checking for _doprnt" >&5 +echo $ECHO_N "checking for _doprnt... $ECHO_C" >&6; } +if test "${ac_cv_func__doprnt+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define _doprnt to an innocuous variant, in case declares _doprnt. + For example, HP-UX 11i declares gettimeofday. */ +#define _doprnt innocuous__doprnt + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char _doprnt (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef _doprnt + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char _doprnt (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub__doprnt || defined __stub____doprnt +choke me +#endif + +int +main () +{ +return _doprnt (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_func__doprnt=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_func__doprnt=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_func__doprnt" >&5 +echo "${ECHO_T}$ac_cv_func__doprnt" >&6; } +if test $ac_cv_func__doprnt = yes; then + +cat >>confdefs.h <<\_ACEOF +#define HAVE_DOPRNT 1 +_ACEOF + +fi + +fi +done + + + +for ac_func in vsnprintf +do +as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` +{ echo "$as_me:$LINENO: checking for $ac_func" >&5 +echo $ECHO_N "checking for $ac_func... $ECHO_C" >&6; } +if { as_var=$as_ac_var; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define $ac_func to an innocuous variant, in case declares $ac_func. + For example, HP-UX 11i declares gettimeofday. */ +#define $ac_func innocuous_$ac_func + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char $ac_func (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef $ac_func + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char $ac_func (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_$ac_func || defined __stub___$ac_func +choke me +#endif + +int +main () +{ +return $ac_func (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + eval "$as_ac_var=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_var=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_var'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_var'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_func" | $as_tr_cpp` 1 +_ACEOF + +fi +done + + +for ac_func in _vsnprintf +do +as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` +{ echo "$as_me:$LINENO: checking for $ac_func" >&5 +echo $ECHO_N "checking for $ac_func... $ECHO_C" >&6; } +if { as_var=$as_ac_var; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define $ac_func to an innocuous variant, in case declares $ac_func. + For example, HP-UX 11i declares gettimeofday. */ +#define $ac_func innocuous_$ac_func + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char $ac_func (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef $ac_func + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char $ac_func (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_$ac_func || defined __stub___$ac_func +choke me +#endif + +int +main () +{ +return $ac_func (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + eval "$as_ac_var=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_var=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_var'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_var'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_func" | $as_tr_cpp` 1 +_ACEOF + +fi +done + + +for ac_func in vasprintf +do +as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` +{ echo "$as_me:$LINENO: checking for $ac_func" >&5 +echo $ECHO_N "checking for $ac_func... $ECHO_C" >&6; } +if { as_var=$as_ac_var; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define $ac_func to an innocuous variant, in case declares $ac_func. + For example, HP-UX 11i declares gettimeofday. */ +#define $ac_func innocuous_$ac_func + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char $ac_func (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef $ac_func + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char $ac_func (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_$ac_func || defined __stub___$ac_func +choke me +#endif + +int +main () +{ +return $ac_func (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + eval "$as_ac_var=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_var=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_var'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_var'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_func" | $as_tr_cpp` 1 +_ACEOF + +fi +done + + + + + + + + + +for ac_func in strlen strcpy strcat strstr strcmp strerror strtok strdup +do +as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` +{ echo "$as_me:$LINENO: checking for $ac_func" >&5 +echo $ECHO_N "checking for $ac_func... $ECHO_C" >&6; } +if { as_var=$as_ac_var; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define $ac_func to an innocuous variant, in case declares $ac_func. + For example, HP-UX 11i declares gettimeofday. */ +#define $ac_func innocuous_$ac_func + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char $ac_func (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef $ac_func + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char $ac_func (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_$ac_func || defined __stub___$ac_func +choke me +#endif + +int +main () +{ +return $ac_func (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + eval "$as_ac_var=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_var=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_var'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_var'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_func" | $as_tr_cpp` 1 +_ACEOF + +fi +done + + + +for ac_func in strchr memcpy +do +as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` +{ echo "$as_me:$LINENO: checking for $ac_func" >&5 +echo $ECHO_N "checking for $ac_func... $ECHO_C" >&6; } +if { as_var=$as_ac_var; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define $ac_func to an innocuous variant, in case declares $ac_func. + For example, HP-UX 11i declares gettimeofday. */ +#define $ac_func innocuous_$ac_func + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char $ac_func (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef $ac_func + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char $ac_func (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_$ac_func || defined __stub___$ac_func +choke me +#endif + +int +main () +{ +return $ac_func (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + eval "$as_ac_var=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_var=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_var'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_var'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_func" | $as_tr_cpp` 1 +_ACEOF + +fi +done + + +for ac_func in fgets +do +as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` +{ echo "$as_me:$LINENO: checking for $ac_func" >&5 +echo $ECHO_N "checking for $ac_func... $ECHO_C" >&6; } +if { as_var=$as_ac_var; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define $ac_func to an innocuous variant, in case declares $ac_func. + For example, HP-UX 11i declares gettimeofday. */ +#define $ac_func innocuous_$ac_func + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char $ac_func (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef $ac_func + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char $ac_func (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_$ac_func || defined __stub___$ac_func +choke me +#endif + +int +main () +{ +return $ac_func (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + eval "$as_ac_var=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_var=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_var'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_var'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_func" | $as_tr_cpp` 1 +_ACEOF + +fi +done + + +for ac_func in yylex +do +as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` +{ echo "$as_me:$LINENO: checking for $ac_func" >&5 +echo $ECHO_N "checking for $ac_func... $ECHO_C" >&6; } +if { as_var=$as_ac_var; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define $ac_func to an innocuous variant, in case declares $ac_func. + For example, HP-UX 11i declares gettimeofday. */ +#define $ac_func innocuous_$ac_func + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char $ac_func (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef $ac_func + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char $ac_func (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_$ac_func || defined __stub___$ac_func +choke me +#endif + +int +main () +{ +return $ac_func (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + eval "$as_ac_var=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_var=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_var'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_var'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_func" | $as_tr_cpp` 1 +_ACEOF + +fi +done + + +{ echo "$as_me:$LINENO: checking whether scanf knows %a" >&5 +echo $ECHO_N "checking whether scanf knows %a... $ECHO_C" >&6; } +if test "${ucsim_cv_scanf_a+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + echo "a b" >conftest.data +if test "$cross_compiling" = yes; then + ucsim_cv_scanf_a="unknown" +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +#include +void main(void) +{ + FILE *f; + char *a; + int i; + if ((f= fopen("conftest.data", "r")) == NULL) + exit(1); + i= fscanf(f, " %a[a-z] ", &a); + fclose(f); + if (i == 0) + exit(2); + if (i == 1) + exit(0); + exit(3); +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ucsim_cv_scanf_a="yes" +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +ucsim_cv_scanf_a="no" +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi + + + +fi +{ echo "$as_me:$LINENO: result: $ucsim_cv_scanf_a" >&5 +echo "${ECHO_T}$ucsim_cv_scanf_a" >&6; } +if test "$ucsim_cv_scanf_a" = "yes"; then + cat >>confdefs.h <<\_ACEOF +#define SCANF_A 1 +_ACEOF + +fi + +{ echo "$as_me:$LINENO: checking whether getcwd is GNUish" >&5 +echo $ECHO_N "checking whether getcwd is GNUish... $ECHO_C" >&6; } +if test "${ucsim_cv_getcwd+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then + ucsim_cv_getcwd="unknown" +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +#include +void main(void) +{ + if ((getcwd(NULL, 0)) == NULL) + exit(1); + exit(0); +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ucsim_cv_getcwd="yes" +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +ucsim_cv_getcwd="no" +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi + + + +fi +{ echo "$as_me:$LINENO: result: $ucsim_cv_getcwd" >&5 +echo "${ECHO_T}$ucsim_cv_getcwd" >&6; } +if test "$ucsim_cv_getcwd" = "yes"; then + cat >>confdefs.h <<\_ACEOF +#define GNU_GETCWD 1 +_ACEOF + +fi + + +#' + +{ echo "$as_me:$LINENO: checking for type of length pointer parameter of accept" >&5 +echo $ECHO_N "checking for type of length pointer parameter of accept... $ECHO_C" >&6; } +if test "${ucsim_cv_accept_length_type+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_save_CPPFLAGS="$CPPFLAGS" + ucsim_cv_accept_length_type=no + for ac_val in int size_t socklen_t; do + CPPFLAGS="$ac_save_CPPFLAGS -DACCEPT_SOCKLEN_T=$ac_val" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include ${ucsim_cv_socket} +int +main () +{ +struct sockaddr a; $ac_val len; accept (0, &a, &len); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ucsim_cv_accept_length_type=$ac_val; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done + CPPFLAGS="$ac_save_CPPFLAGS" +fi +{ echo "$as_me:$LINENO: result: $ucsim_cv_accept_length_type" >&5 +echo "${ECHO_T}$ucsim_cv_accept_length_type" >&6; } + if test "$ucsim_cv_accept_length_type" != no; then + +cat >>confdefs.h <<_ACEOF +#define ACCEPT_SOCKLEN_T $ucsim_cv_accept_length_type +_ACEOF + + fi + + + +# Macro definitions +################### + +# DD_COPT macro checks if the compiler specified as the 1st parameter +# supports option specified as the 2nd parameter +# For example: DD_COPT(CXX, fPIC) + + + +# DD_COPT_NO_IGNORE macro checks if the compiler specified as the +# 1st parameter supports and doesn't ignore option specified as the +# 2nd parameter +# For example: DD_COPT_NO_IGNORE(CXX, fPIC) + + + + +# Checking characteristics of compilers and other programs +# -------------------------------------------------------- + +# Cross compiling overrides +# FIXME +if test "$CC" = "i586-mingw32msvc-gcc"; then + ac_cv_c_bigendian=no + ac_cv_sizeof_char=1 + ac_cv_sizeof_short=2 + ac_cv_sizeof_int=4 + ac_cv_sizeof_long=4 + ac_cv_sizeof_long_long=4 +fi + +# SDCC_BUILD_BIGENDIAN ([ACTION-IF-TRUE], [ACTION-IF-FALSE], [ACTION-IF-UNKNOWN]) +# ------------------------------------------------------------------------- +# SDCC_BUILD_BIGENDIAN + +{ echo "$as_me:$LINENO: checking whether host machine byte ordering is bigendian" >&5 +echo $ECHO_N "checking whether host machine byte ordering is bigendian... $ECHO_C" >&6; } +if test "${sdcc_cv_build_bigendian+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + # See if sys/param.h defines the BYTE_ORDER macro. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include + +int +main () +{ +#if ! (defined BYTE_ORDER && defined BIG_ENDIAN && defined LITTLE_ENDIAN \ + && BYTE_ORDER && BIG_ENDIAN && LITTLE_ENDIAN) + bogus endian macros +#endif + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + # It does; now see whether it defined to BIG_ENDIAN or not. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include + +int +main () +{ +#if BYTE_ORDER != BIG_ENDIAN + not big endian +#endif + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + sdcc_cv_build_bigendian=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + sdcc_cv_build_bigendian=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # It does not; compile a test program. +if test "$cross_compiling" = yes; then + # try to guess the endianness by grepping values into an object file + sdcc_cv_build_bigendian=unknown + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +short int ascii_mm[] = { 0x4249, 0x4765, 0x6E44, 0x6961, 0x6E53, 0x7953, 0 }; +short int ascii_ii[] = { 0x694C, 0x5454, 0x656C, 0x6E45, 0x6944, 0x6E61, 0 }; +void _ascii () { char *s = (char *) ascii_mm; s = (char *) ascii_ii; } +short int ebcdic_ii[] = { 0x89D3, 0xE3E3, 0x8593, 0x95C5, 0x89C4, 0x9581, 0 }; +short int ebcdic_mm[] = { 0xC2C9, 0xC785, 0x95C4, 0x8981, 0x95E2, 0xA8E2, 0 }; +void _ebcdic () { char *s = (char *) ebcdic_mm; s = (char *) ebcdic_ii; } +int +main () +{ + _ascii (); _ebcdic (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + if grep BIGenDianSyS conftest.$ac_objext >/dev/null ; then + sdcc_cv_build_bigendian=yes +fi +if grep LiTTleEnDian conftest.$ac_objext >/dev/null ; then + if test "$sdcc_cv_build_bigendian" = unknown; then + sdcc_cv_build_bigendian=no + else + # finding both strings is unlikely to happen, but who knows? + sdcc_cv_build_bigendian=unknown + fi +fi +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ + + /* Are we little or big endian? From Harbison&Steele. */ + union + { + long int l; + char c[sizeof (long int)]; + } u; + u.l = 1; + return u.c[sizeof (long int) - 1] == 1; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + sdcc_cv_build_bigendian=no +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +sdcc_cv_build_bigendian=yes +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $sdcc_cv_build_bigendian" >&5 +echo "${ECHO_T}$sdcc_cv_build_bigendian" >&6; } +case $sdcc_cv_build_bigendian in + yes) + +cat >>confdefs.h <<\_ACEOF +#define BUILD_WORDS_BIGENDIAN 1 +_ACEOF + ;; + no) + ;; + *) + { { echo "$as_me:$LINENO: error: unknown endianness +presetting sdcc_cv_build_bigendian=no (or yes) will help" >&5 +echo "$as_me: error: unknown endianness +presetting sdcc_cv_build_bigendian=no (or yes) will help" >&2;} + { (exit 1); exit 1; }; } ;; +esac + + +{ echo "$as_me:$LINENO: checking whether preprocessor accepts -MM or -M" >&5 +echo $ECHO_N "checking whether preprocessor accepts -MM or -M... $ECHO_C" >&6; } +if test "${ucsim_cv_MM+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + echo "#include " >_test_.c +echo "" >>_test_.c +$CXXCPP -v -MM _test_.c 1>&5 2>&5 +if test "$?" = "0"; then + ucsim_cv_MM="-MM" +else + ucsim_cv_MM="-M" +fi +rm -f _test_.* +fi +{ echo "$as_me:$LINENO: result: $ucsim_cv_MM" >&5 +echo "${ECHO_T}$ucsim_cv_MM" >&6; } +M_OR_MM=$ucsim_cv_MM + + +# This is the first time when CFLAGS are set/modified!! + + +{ echo "$as_me:$LINENO: checking whether $CXX accepts -ggdb" >&5 +echo $ECHO_N "checking whether $CXX accepts -ggdb... $ECHO_C" >&6; } +if test "${ucsim_cv_CXXggdb+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >_test_.c <&5 2>&5 +if test "$?" = "0"; then + ucsim_cv_CXXggdb="yes" +else + ucsim_cv_CXXggdb="no" +fi +rm -f _test_.* a.out +fi +{ echo "$as_me:$LINENO: result: $ucsim_cv_CXXggdb" >&5 +echo "${ECHO_T}$ucsim_cv_CXXggdb" >&6; } + + +{ echo "$as_me:$LINENO: checking whether $CXX accepts -gstabs" >&5 +echo $ECHO_N "checking whether $CXX accepts -gstabs... $ECHO_C" >&6; } +if test "${ucsim_cv_CXXgstabs+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >_test_.c <&5 2>&5 +if test "$?" = "0"; then + ucsim_cv_CXXgstabs="yes" +else + ucsim_cv_CXXgstabs="no" +fi +rm -f _test_.* a.out +fi +{ echo "$as_me:$LINENO: result: $ucsim_cv_CXXgstabs" >&5 +echo "${ECHO_T}$ucsim_cv_CXXgstabs" >&6; } + +if test "$ucsim_cv_CXXgstabs" = "yes"; then + gopt="-gstabs+ -g3" +elif test "$ucsim_cv_CXXggdb" = "yes"; then + gopt="-ggdb -g3" +else + gopt="-g" +fi +if test "$CXXFLAGS"x = x ;then + CXXFLAGS="$gopt" +else + CXXFLAGS="$CXXFLAGS $gopt" +fi + + +{ echo "$as_me:$LINENO: checking whether $CXX accepts -pipe" >&5 +echo $ECHO_N "checking whether $CXX accepts -pipe... $ECHO_C" >&6; } +if test "${ucsim_cv_CXXpipe+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >_test_.c <&5 2>&5 +if test "$?" = "0"; then + ucsim_cv_CXXpipe="yes" +else + ucsim_cv_CXXpipe="no" +fi +rm -f _test_.* a.out +fi +{ echo "$as_me:$LINENO: result: $ucsim_cv_CXXpipe" >&5 +echo "${ECHO_T}$ucsim_cv_CXXpipe" >&6; } + +if test "$ucsim_cv_CXXpipe" = "yes"; then + CXXFLAGS="$CXXFLAGS -pipe" +fi + +PICOPT="" +SHAREDLIB="no" + +{ echo "$as_me:$LINENO: checking whether $CXX accepts and doesn't ignore -fPIC" >&5 +echo $ECHO_N "checking whether $CXX accepts and doesn't ignore -fPIC... $ECHO_C" >&6; } +if test "${ucsim_cv_CXXfPIC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >_test_.c <&1 1>&5) +if test "$?" = "0"; then + expr "$ucsim_cv_CXXfPIC" : '.*'-fPIC'.*ignored' 1>&5 2>&5 + if test "$?" = "0"; then + ucsim_cv_CXXfPIC="no" + else + ucsim_cv_CXXfPIC="yes" + fi +else + ucsim_cv_CXXfPIC="no" +fi +rm -f _test_.* a.out +fi +{ echo "$as_me:$LINENO: result: $ucsim_cv_CXXfPIC" >&5 +echo "${ECHO_T}$ucsim_cv_CXXfPIC" >&6; } + +if test "$ucsim_cv_CXXfPIC" = "yes"; then + PICOPT="-fPIC" +else + +{ echo "$as_me:$LINENO: checking whether $CXX accepts and doesn't ignore -fpic" >&5 +echo $ECHO_N "checking whether $CXX accepts and doesn't ignore -fpic... $ECHO_C" >&6; } +if test "${ucsim_cv_CXXfpic+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >_test_.c <&1 1>&5) +if test "$?" = "0"; then + expr "$ucsim_cv_CXXfpic" : '.*'-fpic'.*ignored' 1>&5 2>&5 + if test "$?" = "0"; then + ucsim_cv_CXXfpic="no" + else + ucsim_cv_CXXfpic="yes" + fi +else + ucsim_cv_CXXfpic="no" +fi +rm -f _test_.* a.out +fi +{ echo "$as_me:$LINENO: result: $ucsim_cv_CXXfpic" >&5 +echo "${ECHO_T}$ucsim_cv_CXXfpic" >&6; } + + if test "$ucsim_cv_CXXfpic" = "yes"; then + PICOPT="-fpic" + fi +fi +if test "$PICOPT"x != "x"; then + SHAREDLIB="yes" +fi + + + +dlso_ok="no" +if test $SHAREDLIB = "yes" -a $dl_ok = "yes" -a $enable_dlso = "yes"; then + dlso_ok="yes" +fi + + +# Checks for typedefs, structures, and compiler characteristics. +# =========================================================================== + +{ echo "$as_me:$LINENO: checking return type of signal handlers" >&5 +echo $ECHO_N "checking return type of signal handlers... $ECHO_C" >&6; } +if test "${ac_cv_type_signal+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include + +int +main () +{ +return *(signal (0, 0)) (0) == 1; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_type_signal=int +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_signal=void +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_type_signal" >&5 +echo "${ECHO_T}$ac_cv_type_signal" >&6; } + +cat >>confdefs.h <<_ACEOF +#define RETSIGTYPE $ac_cv_type_signal +_ACEOF + + +if test "$cross_compiling" = "no"; then +{ echo "$as_me:$LINENO: checking for char" >&5 +echo $ECHO_N "checking for char... $ECHO_C" >&6; } +if test "${ac_cv_type_char+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef char ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_type_char=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_char=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_type_char" >&5 +echo "${ECHO_T}$ac_cv_type_char" >&6; } + +# The cast to long int works around a bug in the HP C Compiler +# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects +# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. +# This bug is HP SR number 8606223364. +{ echo "$as_me:$LINENO: checking size of char" >&5 +echo $ECHO_N "checking size of char... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_char+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_char=$ac_lo;; +'') if test "$ac_cv_type_char" = yes; then + { { echo "$as_me:$LINENO: error: cannot compute sizeof (char) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (char) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_char=0 + fi ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_char=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test "$ac_cv_type_char" = yes; then + { { echo "$as_me:$LINENO: error: cannot compute sizeof (char) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (char) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_char=0 + fi +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +fi +{ echo "$as_me:$LINENO: result: $ac_cv_sizeof_char" >&5 +echo "${ECHO_T}$ac_cv_sizeof_char" >&6; } + + + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_CHAR $ac_cv_sizeof_char +_ACEOF + + +{ echo "$as_me:$LINENO: checking for short" >&5 +echo $ECHO_N "checking for short... $ECHO_C" >&6; } +if test "${ac_cv_type_short+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef short ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_type_short=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_short=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_type_short" >&5 +echo "${ECHO_T}$ac_cv_type_short" >&6; } + +# The cast to long int works around a bug in the HP C Compiler +# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects +# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. +# This bug is HP SR number 8606223364. +{ echo "$as_me:$LINENO: checking size of short" >&5 +echo $ECHO_N "checking size of short... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_short+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_short=$ac_lo;; +'') if test "$ac_cv_type_short" = yes; then + { { echo "$as_me:$LINENO: error: cannot compute sizeof (short) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (short) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_short=0 + fi ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_short=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test "$ac_cv_type_short" = yes; then + { { echo "$as_me:$LINENO: error: cannot compute sizeof (short) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (short) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_short=0 + fi +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +fi +{ echo "$as_me:$LINENO: result: $ac_cv_sizeof_short" >&5 +echo "${ECHO_T}$ac_cv_sizeof_short" >&6; } + + + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_SHORT $ac_cv_sizeof_short +_ACEOF + + +{ echo "$as_me:$LINENO: checking for int" >&5 +echo $ECHO_N "checking for int... $ECHO_C" >&6; } +if test "${ac_cv_type_int+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef int ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_type_int=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_int=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_type_int" >&5 +echo "${ECHO_T}$ac_cv_type_int" >&6; } + +# The cast to long int works around a bug in the HP C Compiler +# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects +# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. +# This bug is HP SR number 8606223364. +{ echo "$as_me:$LINENO: checking size of int" >&5 +echo $ECHO_N "checking size of int... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_int+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_int=$ac_lo;; +'') if test "$ac_cv_type_int" = yes; then + { { echo "$as_me:$LINENO: error: cannot compute sizeof (int) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (int) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_int=0 + fi ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_int=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test "$ac_cv_type_int" = yes; then + { { echo "$as_me:$LINENO: error: cannot compute sizeof (int) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (int) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_int=0 + fi +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +fi +{ echo "$as_me:$LINENO: result: $ac_cv_sizeof_int" >&5 +echo "${ECHO_T}$ac_cv_sizeof_int" >&6; } + + + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_INT $ac_cv_sizeof_int +_ACEOF + + +{ echo "$as_me:$LINENO: checking for long" >&5 +echo $ECHO_N "checking for long... $ECHO_C" >&6; } +if test "${ac_cv_type_long+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef long ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_type_long=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_long=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_type_long" >&5 +echo "${ECHO_T}$ac_cv_type_long" >&6; } + +# The cast to long int works around a bug in the HP C Compiler +# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects +# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. +# This bug is HP SR number 8606223364. +{ echo "$as_me:$LINENO: checking size of long" >&5 +echo $ECHO_N "checking size of long... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_long+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_long=$ac_lo;; +'') if test "$ac_cv_type_long" = yes; then + { { echo "$as_me:$LINENO: error: cannot compute sizeof (long) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (long) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_long=0 + fi ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_long=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test "$ac_cv_type_long" = yes; then + { { echo "$as_me:$LINENO: error: cannot compute sizeof (long) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (long) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_long=0 + fi +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +fi +{ echo "$as_me:$LINENO: result: $ac_cv_sizeof_long" >&5 +echo "${ECHO_T}$ac_cv_sizeof_long" >&6; } + + + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_LONG $ac_cv_sizeof_long +_ACEOF + + +{ echo "$as_me:$LINENO: checking for long long" >&5 +echo $ECHO_N "checking for long long... $ECHO_C" >&6; } +if test "${ac_cv_type_long_long+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef long long ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_type_long_long=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_long_long=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_type_long_long" >&5 +echo "${ECHO_T}$ac_cv_type_long_long" >&6; } + +# The cast to long int works around a bug in the HP C Compiler +# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects +# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. +# This bug is HP SR number 8606223364. +{ echo "$as_me:$LINENO: checking size of long long" >&5 +echo $ECHO_N "checking size of long long... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_long_long+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_long_long=$ac_lo;; +'') if test "$ac_cv_type_long_long" = yes; then + { { echo "$as_me:$LINENO: error: cannot compute sizeof (long long) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (long long) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_long_long=0 + fi ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_long_long=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test "$ac_cv_type_long_long" = yes; then + { { echo "$as_me:$LINENO: error: cannot compute sizeof (long long) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (long long) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_long_long=0 + fi +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +fi +{ echo "$as_me:$LINENO: result: $ac_cv_sizeof_long_long" >&5 +echo "${ECHO_T}$ac_cv_sizeof_long_long" >&6; } + + + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_LONG_LONG $ac_cv_sizeof_long_long +_ACEOF + + +else + if $CXX -v 2>&1|grep "mingw" >/dev/null 2>&1; then + ac_cv_sizeof_char=1 + ac_cv_sizeof_short=2 + ac_cv_sizeof_int=4 + ac_cv_sizeof_long=4 + ac_cv_sizeof_long_long=4 + else + : # FIXME + fi +#echo +fi + +type_name() +{ + if expr "$ac_cv_sizeof_char" '>=' "$1" >/dev/null; then + echo "char" + exit + fi + if expr "$ac_cv_sizeof_short" '>=' "$1" >/dev/null; then + echo "short" + exit + fi + if expr "$ac_cv_sizeof_int" '>=' "$1" >/dev/null; then + echo "int" + exit + fi + if expr "$ac_cv_sizeof_long" '>=' "$1" >/dev/null; then + echo "long" + exit + fi + if expr "$ac_cv_sizeof_long_long" '>=' "$1" >/dev/null; then + echo "long long" + exit + fi + echo "long long" +} + +{ echo "$as_me:$LINENO: checking type name for byte" >&5 +echo $ECHO_N "checking type name for byte... $ECHO_C" >&6; } +TYPE_BYTE=`type_name 1` +{ echo "$as_me:$LINENO: result: $TYPE_BYTE" >&5 +echo "${ECHO_T}$TYPE_BYTE" >&6; } +{ echo "$as_me:$LINENO: checking type name for word" >&5 +echo $ECHO_N "checking type name for word... $ECHO_C" >&6; } +TYPE_WORD=`type_name 2` +{ echo "$as_me:$LINENO: result: $TYPE_WORD" >&5 +echo "${ECHO_T}$TYPE_WORD" >&6; } +{ echo "$as_me:$LINENO: checking type name for dword" >&5 +echo $ECHO_N "checking type name for dword... $ECHO_C" >&6; } +TYPE_DWORD=`type_name 4` +{ echo "$as_me:$LINENO: result: $TYPE_DWORD" >&5 +echo "${ECHO_T}$TYPE_DWORD" >&6; } +cat >>confdefs.h <<_ACEOF +#define TYPE_BYTE $TYPE_BYTE +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define TYPE_WORD $TYPE_WORD +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define TYPE_DWORD $TYPE_DWORD +_ACEOF + + +if echo $TYPE_DWORD|grep short >/dev/null; then + A="h" +elif echo $TYPE_DWORD|grep long >/dev/null; then + A="l" +else + A="" +fi + +if echo $TYPE_WORD|grep short >/dev/null; then M="h" +elif echo $TYPE_WORD|grep long >/dev/null; then M="l" +else M="" +fi + +cat >>confdefs.h <<_ACEOF +#define _A_ "${A}" +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define _M_ "${M}" +_ACEOF + + +# Generating output files +# =========================================================================== + +ac_config_files="$ac_config_files Makefile main.mk:main_in.mk packages.mk:packages_in.mk sim.src/Makefile cmd.src/Makefile s51.src/Makefile avr.src/Makefile z80.src/Makefile hc08.src/Makefile xa.src/Makefile gui.src/Makefile gui.src/serio.src/Makefile doc/Makefile" + +cat >confcache <<\_ACEOF +# This file is a shell script that caches the results of configure +# tests run on this system so they can be shared between configure +# scripts and configure runs, see configure's option --config-cache. +# It is not useful on other systems. If it contains results you don't +# want to keep, you may remove or edit it. +# +# config.status only pays attention to the cache file if you give it +# the --recheck option to rerun configure. +# +# `ac_cv_env_foo' variables (set or unset) will be overridden when +# loading this file, other *unset* `ac_cv_foo' will be assigned the +# following values. + +_ACEOF + +# The following way of writing the cache mishandles newlines in values, +# but we know of no workaround that is simple, portable, and efficient. +# So, we kill variables containing newlines. +# Ultrix sh set writes to stderr and can't be redirected directly, +# and sets the high bit in the cache file unless we assign to the vars. +( + for ac_var in `(set) 2>&1 | sed -n 's/^\([a-zA-Z_][a-zA-Z0-9_]*\)=.*/\1/p'`; do + eval ac_val=\$$ac_var + case $ac_val in #( + *${as_nl}*) + case $ac_var in #( + *_cv_*) { echo "$as_me:$LINENO: WARNING: Cache variable $ac_var contains a newline." >&5 +echo "$as_me: WARNING: Cache variable $ac_var contains a newline." >&2;} ;; + esac + case $ac_var in #( + _ | IFS | as_nl) ;; #( + *) $as_unset $ac_var ;; + esac ;; + esac + done + + (set) 2>&1 | + case $as_nl`(ac_space=' '; set) 2>&1` in #( + *${as_nl}ac_space=\ *) + # `set' does not quote correctly, so add quotes (double-quote + # substitution turns \\\\ into \\, and sed turns \\ into \). + sed -n \ + "s/'/'\\\\''/g; + s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='\\2'/p" + ;; #( + *) + # `set' quotes correctly as required by POSIX, so do not add quotes. + sed -n "/^[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*=/p" + ;; + esac | + sort +) | + sed ' + /^ac_cv_env_/b end + t clear + :clear + s/^\([^=]*\)=\(.*[{}].*\)$/test "${\1+set}" = set || &/ + t end + s/^\([^=]*\)=\(.*\)$/\1=${\1=\2}/ + :end' >>confcache +if diff "$cache_file" confcache >/dev/null 2>&1; then :; else + if test -w "$cache_file"; then + test "x$cache_file" != "x/dev/null" && + { echo "$as_me:$LINENO: updating cache $cache_file" >&5 +echo "$as_me: updating cache $cache_file" >&6;} + cat confcache >$cache_file + else + { echo "$as_me:$LINENO: not updating unwritable cache $cache_file" >&5 +echo "$as_me: not updating unwritable cache $cache_file" >&6;} + fi +fi +rm -f confcache + +test "x$prefix" = xNONE && prefix=$ac_default_prefix +# Let make expand exec_prefix. +test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + +DEFS=-DHAVE_CONFIG_H + +ac_libobjs= +ac_ltlibobjs= +for ac_i in : $LIBOBJS; do test "x$ac_i" = x: && continue + # 1. Remove the extension, and $U if already installed. + ac_script='s/\$U\././;s/\.o$//;s/\.obj$//' + ac_i=`echo "$ac_i" | sed "$ac_script"` + # 2. Prepend LIBOBJDIR. When used with automake>=1.10 LIBOBJDIR + # will be set to the directory where LIBOBJS objects are built. + ac_libobjs="$ac_libobjs \${LIBOBJDIR}$ac_i\$U.$ac_objext" + ac_ltlibobjs="$ac_ltlibobjs \${LIBOBJDIR}$ac_i"'$U.lo' +done +LIBOBJS=$ac_libobjs + +LTLIBOBJS=$ac_ltlibobjs + + + +: ${CONFIG_STATUS=./config.status} +ac_clean_files_save=$ac_clean_files +ac_clean_files="$ac_clean_files $CONFIG_STATUS" +{ echo "$as_me:$LINENO: creating $CONFIG_STATUS" >&5 +echo "$as_me: creating $CONFIG_STATUS" >&6;} +cat >$CONFIG_STATUS <<_ACEOF +#! $SHELL +# Generated by $as_me. +# Run this file to recreate the current configuration. +# Compiler output produced by configure, useful for debugging +# configure, is in config.log if it exists. + +debug=false +ac_cs_recheck=false +ac_cs_silent=false +SHELL=\${CONFIG_SHELL-$SHELL} +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF +## --------------------- ## +## M4sh Initialization. ## +## --------------------- ## + +# Be more Bourne compatible +DUALCASE=1; export DUALCASE # for MKS sh +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. 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The absolute path cannot be DOS-style, + # because $ac_f cannot contain `:'. + test -f "$ac_f" || + case $ac_f in + [\\/$]*) false;; + *) test -f "$srcdir/$ac_f" && ac_f="$srcdir/$ac_f";; + esac || + { { echo "$as_me:$LINENO: error: cannot find input file: $ac_f" >&5 +echo "$as_me: error: cannot find input file: $ac_f" >&2;} + { (exit 1); exit 1; }; };; + esac + ac_file_inputs="$ac_file_inputs $ac_f" + done + + # Let's still pretend it is `configure' which instantiates (i.e., don't + # use $as_me), people would be surprised to read: + # /* config.h. Generated by config.status. */ + configure_input="Generated from "`IFS=: + echo $* | sed 's|^[^:]*/||;s|:[^:]*/|, |g'`" by configure." + if test x"$ac_file" != x-; then + configure_input="$ac_file. $configure_input" + { echo "$as_me:$LINENO: creating $ac_file" >&5 +echo "$as_me: creating $ac_file" >&6;} + fi + + case $ac_tag in + *:-:* | *:-) cat >"$tmp/stdin";; + esac + ;; + esac + + ac_dir=`$as_dirname -- "$ac_file" || +$as_expr X"$ac_file" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ + X"$ac_file" : 'X\(//\)[^/]' \| \ + X"$ac_file" : 'X\(//\)$' \| \ + X"$ac_file" : 'X\(/\)' \| . 2>/dev/null || +echo X"$ac_file" | + sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ + s//\1/ + q + } + /^X\(\/\/\)[^/].*/{ + s//\1/ + q + } + /^X\(\/\/\)$/{ + s//\1/ + q + } + /^X\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + { as_dir="$ac_dir" + case $as_dir in #( + -*) as_dir=./$as_dir;; + esac + test -d "$as_dir" || { $as_mkdir_p && mkdir -p "$as_dir"; } || { + as_dirs= + while :; do + case $as_dir in #( + *\'*) as_qdir=`echo "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #( + *) as_qdir=$as_dir;; + esac + as_dirs="'$as_qdir' $as_dirs" + as_dir=`$as_dirname -- "$as_dir" || +$as_expr X"$as_dir" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ + X"$as_dir" : 'X\(//\)[^/]' \| \ + X"$as_dir" : 'X\(//\)$' \| \ + X"$as_dir" : 'X\(/\)' \| . 2>/dev/null || +echo X"$as_dir" | + sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ + s//\1/ + q + } + /^X\(\/\/\)[^/].*/{ + s//\1/ + q + } + /^X\(\/\/\)$/{ + s//\1/ + q + } + /^X\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + test -d "$as_dir" && break + done + test -z "$as_dirs" || eval "mkdir $as_dirs" + } || test -d "$as_dir" || { { echo "$as_me:$LINENO: error: cannot create directory $as_dir" >&5 +echo "$as_me: error: cannot create directory $as_dir" >&2;} + { (exit 1); exit 1; }; }; } + ac_builddir=. + +case "$ac_dir" in +.) ac_dir_suffix= ac_top_builddir_sub=. ac_top_build_prefix= ;; +*) + ac_dir_suffix=/`echo "$ac_dir" | sed 's,^\.[\\/],,'` + # A ".." for each directory in $ac_dir_suffix. + ac_top_builddir_sub=`echo "$ac_dir_suffix" | sed 's,/[^\\/]*,/..,g;s,/,,'` + case $ac_top_builddir_sub in + "") ac_top_builddir_sub=. ac_top_build_prefix= ;; + *) ac_top_build_prefix=$ac_top_builddir_sub/ ;; + esac ;; +esac +ac_abs_top_builddir=$ac_pwd +ac_abs_builddir=$ac_pwd$ac_dir_suffix +# for backward compatibility: +ac_top_builddir=$ac_top_build_prefix + +case $srcdir in + .) # We are building in place. + ac_srcdir=. + ac_top_srcdir=$ac_top_builddir_sub + ac_abs_top_srcdir=$ac_pwd ;; + [\\/]* | ?:[\\/]* ) # Absolute name. + ac_srcdir=$srcdir$ac_dir_suffix; + ac_top_srcdir=$srcdir + ac_abs_top_srcdir=$srcdir ;; + *) # Relative name. + ac_srcdir=$ac_top_build_prefix$srcdir$ac_dir_suffix + ac_top_srcdir=$ac_top_build_prefix$srcdir + ac_abs_top_srcdir=$ac_pwd/$srcdir ;; +esac +ac_abs_srcdir=$ac_abs_top_srcdir$ac_dir_suffix + + + case $ac_mode in + :F) + # + # CONFIG_FILE + # + + case $INSTALL in + [\\/$]* | ?:[\\/]* ) ac_INSTALL=$INSTALL ;; + *) ac_INSTALL=$ac_top_build_prefix$INSTALL ;; + esac +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF +# If the template does not know about datarootdir, expand it. +# FIXME: This hack should be removed a few years after 2.60. +ac_datarootdir_hack=; ac_datarootdir_seen= + +case `sed -n '/datarootdir/ { + p + q +} +/@datadir@/p +/@docdir@/p +/@infodir@/p +/@localedir@/p +/@mandir@/p +' $ac_file_inputs` in +*datarootdir*) ac_datarootdir_seen=yes;; +*@datadir@*|*@docdir@*|*@infodir@*|*@localedir@*|*@mandir@*) + { echo "$as_me:$LINENO: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&5 +echo "$as_me: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&2;} +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF + ac_datarootdir_hack=' + s&@datadir@&$datadir&g + s&@docdir@&$docdir&g + s&@infodir@&$infodir&g + s&@localedir@&$localedir&g + s&@mandir@&$mandir&g + s&\\\${datarootdir}&$datarootdir&g' ;; +esac +_ACEOF + +# Neutralize VPATH when `$srcdir' = `.'. +# Shell code in configure.ac might set extrasub. +# FIXME: do we really want to maintain this feature? +cat >>$CONFIG_STATUS <<_ACEOF + sed "$ac_vpsub +$extrasub +_ACEOF +cat >>$CONFIG_STATUS <<\_ACEOF +:t +/@[a-zA-Z_][a-zA-Z_0-9]*@/!b +s&@configure_input@&$configure_input&;t t +s&@top_builddir@&$ac_top_builddir_sub&;t t +s&@srcdir@&$ac_srcdir&;t t +s&@abs_srcdir@&$ac_abs_srcdir&;t t +s&@top_srcdir@&$ac_top_srcdir&;t t +s&@abs_top_srcdir@&$ac_abs_top_srcdir&;t t +s&@builddir@&$ac_builddir&;t t +s&@abs_builddir@&$ac_abs_builddir&;t t +s&@abs_top_builddir@&$ac_abs_top_builddir&;t t +s&@INSTALL@&$ac_INSTALL&;t t +$ac_datarootdir_hack +" $ac_file_inputs | sed -f "$tmp/subs-1.sed" | sed -f "$tmp/subs-2.sed" >$tmp/out + +test -z "$ac_datarootdir_hack$ac_datarootdir_seen" && + { ac_out=`sed -n '/\${datarootdir}/p' "$tmp/out"`; test -n "$ac_out"; } && + { ac_out=`sed -n '/^[ ]*datarootdir[ ]*:*=/p' "$tmp/out"`; test -z "$ac_out"; } && + { echo "$as_me:$LINENO: WARNING: $ac_file contains a reference to the variable \`datarootdir' +which seems to be undefined. Please make sure it is defined." >&5 +echo "$as_me: WARNING: $ac_file contains a reference to the variable \`datarootdir' +which seems to be undefined. Please make sure it is defined." >&2;} + + rm -f "$tmp/stdin" + case $ac_file in + -) cat "$tmp/out"; rm -f "$tmp/out";; + *) rm -f "$ac_file"; mv "$tmp/out" $ac_file;; + esac + ;; + :H) + # + # CONFIG_HEADER + # +_ACEOF + +# Transform confdefs.h into a sed script `conftest.defines', that +# substitutes the proper values into config.h.in to produce config.h. +rm -f conftest.defines conftest.tail +# First, append a space to every undef/define line, to ease matching. +echo 's/$/ /' >conftest.defines +# Then, protect against being on the right side of a sed subst, or in +# an unquoted here document, in config.status. If some macros were +# called several times there might be several #defines for the same +# symbol, which is useless. But do not sort them, since the last +# AC_DEFINE must be honored. +ac_word_re=[_$as_cr_Letters][_$as_cr_alnum]* +# These sed commands are passed to sed as "A NAME B PARAMS C VALUE D", where +# NAME is the cpp macro being defined, VALUE is the value it is being given. +# PARAMS is the parameter list in the macro definition--in most cases, it's +# just an empty string. +ac_dA='s,^\\([ #]*\\)[^ ]*\\([ ]*' +ac_dB='\\)[ (].*,\\1define\\2' +ac_dC=' ' +ac_dD=' ,' + +uniq confdefs.h | + sed -n ' + t rset + :rset + s/^[ ]*#[ ]*define[ ][ ]*// + t ok + d + :ok + s/[\\&,]/\\&/g + s/^\('"$ac_word_re"'\)\(([^()]*)\)[ ]*\(.*\)/ '"$ac_dA"'\1'"$ac_dB"'\2'"${ac_dC}"'\3'"$ac_dD"'/p + s/^\('"$ac_word_re"'\)[ ]*\(.*\)/'"$ac_dA"'\1'"$ac_dB$ac_dC"'\2'"$ac_dD"'/p + ' >>conftest.defines + +# Remove the space that was appended to ease matching. +# Then replace #undef with comments. This is necessary, for +# example, in the case of _POSIX_SOURCE, which is predefined and required +# on some systems where configure will not decide to define it. +# (The regexp can be short, since the line contains either #define or #undef.) +echo 's/ $// +s,^[ #]*u.*,/* & */,' >>conftest.defines + +# Break up conftest.defines: +ac_max_sed_lines=50 + +# First sed command is: sed -f defines.sed $ac_file_inputs >"$tmp/out1" +# Second one is: sed -f defines.sed "$tmp/out1" >"$tmp/out2" +# Third one will be: sed -f defines.sed "$tmp/out2" >"$tmp/out1" +# et cetera. +ac_in='$ac_file_inputs' +ac_out='"$tmp/out1"' +ac_nxt='"$tmp/out2"' + +while : +do + # Write a here document: + cat >>$CONFIG_STATUS <<_ACEOF + # First, check the format of the line: + cat >"\$tmp/defines.sed" <<\\CEOF +/^[ ]*#[ ]*undef[ ][ ]*$ac_word_re[ ]*\$/b def +/^[ ]*#[ ]*define[ ][ ]*$ac_word_re[( ]/b def +b +:def +_ACEOF + sed ${ac_max_sed_lines}q conftest.defines >>$CONFIG_STATUS + echo 'CEOF + sed -f "$tmp/defines.sed"' "$ac_in >$ac_out" >>$CONFIG_STATUS + ac_in=$ac_out; ac_out=$ac_nxt; ac_nxt=$ac_in + sed 1,${ac_max_sed_lines}d conftest.defines >conftest.tail + grep . conftest.tail >/dev/null || break + rm -f conftest.defines + mv conftest.tail conftest.defines +done +rm -f conftest.defines conftest.tail + +echo "ac_result=$ac_in" >>$CONFIG_STATUS +cat >>$CONFIG_STATUS <<\_ACEOF + if test x"$ac_file" != x-; then + echo "/* $configure_input */" >"$tmp/config.h" + cat "$ac_result" >>"$tmp/config.h" + if diff $ac_file "$tmp/config.h" >/dev/null 2>&1; then + { echo "$as_me:$LINENO: $ac_file is unchanged" >&5 +echo "$as_me: $ac_file is unchanged" >&6;} + else + rm -f $ac_file + mv "$tmp/config.h" $ac_file + fi + else + echo "/* $configure_input */" + cat "$ac_result" + fi + rm -f "$tmp/out12" + ;; + + + esac + +done # for ac_tag + + +{ (exit 0); exit 0; } +_ACEOF +chmod +x $CONFIG_STATUS +ac_clean_files=$ac_clean_files_save + + +# configure is writing to config.log, and then calls config.status. +# config.status does its own redirection, appending to config.log. +# Unfortunately, on DOS this fails, as config.log is still kept open +# by configure, so config.status won't be able to write to it; its +# output is simply discarded. So we exec the FD to /dev/null, +# effectively closing config.log, so it can be properly (re)opened and +# appended to by config.status. When coming back to configure, we +# need to make the FD available again. +if test "$no_create" != yes; then + ac_cs_success=: + ac_config_status_args= + test "$silent" = yes && + ac_config_status_args="$ac_config_status_args --quiet" + exec 5>/dev/null + $SHELL $CONFIG_STATUS $ac_config_status_args || ac_cs_success=false + exec 5>>config.log + # Use ||, not &&, to avoid exiting from the if with $? = 1, which + # would make configure fail if this is the last instruction. + $ac_cs_success || { (exit 1); exit 1; } +fi + + +#gui.src/portmon.src/Makefile + + +# End of configure/configure.in diff --git a/sim/ucsim/configure.in b/sim/ucsim/configure.in new file mode 100644 index 0000000..c227895 --- /dev/null +++ b/sim/ucsim/configure.in @@ -0,0 +1,660 @@ +#!/bin/sh + +AC_PREREQ(2.60) +AC_INIT(.version) +AC_CONFIG_HEADER(ddconfig.h:ddconfig_in.h) + +AC_PROG_AWK + +AC_MSG_CHECKING(version of the package) +if test -f ${srcdir}/.version; then + { read VERSION; } < ${srcdir}/.version + AC_MSG_RESULT($VERSION) +else + VERSION="0.0.0" + AC_MSG_RESULT(unknown using 0.0.0) +fi +VERSIONHI=`echo $VERSION|$AWK 'BEGIN {FS="."} {print $1}'` +VERSIONLO=`echo $VERSION|$AWK 'BEGIN {FS="."} {print $2}'` +VERSIONP=`echo $VERSION|$AWK 'BEGIN {FS="."} {print $3}'` +AC_SUBST(VERSION) +AC_SUBST(VERSIONHI) +AC_SUBST(VERSIONLO) +AC_SUBST(VERSIONP) +AC_DEFINE_UNQUOTED(VERSIONSTR, "${VERSION}") +AC_DEFINE_UNQUOTED(VERSIONHI, $VERSIONHI) +AC_DEFINE_UNQUOTED(VERSIONLO, $VERSIONLO) +AC_DEFINE_UNQUOTED(VERSIONP, $VERSIONP) + +# Some options +#============== +# *nix default: "${datadir}/sdcc/doc" +AC_ARG_VAR(docdir, documentation installation directory) +if test "${docdir}" = ""; then + docdir="\${datadir}"/sdcc/doc +fi +AC_SUBST(docdir) + +AC_ARG_ENABLE(ucsim, +[ --enable-ucsim compile ucsim frontend], +if test $enable_ucsim != "no"; then + enable_ucsim="yes" +fi, +#default +enable_ucsim="no") +AC_ARG_ENABLE(dlso, +[ --enable-dlso compile dynamically loadable shared libraries], +if test $enable_dlso != "no"; then + enable_dlso="yes" +fi, +enable_dlso="no") +AC_ARG_ENABLE(51, +[ --disable-51 do not compile simulator for MCS51], +if test $enable_51 != "no"; then + enable_51="yes" +fi, +enable_51="yes") +AC_ARG_ENABLE(avr, +[ --disable-avr do not compile simulator for AVR], +if test $enable_avr != "no"; then + enable_avr="yes" +fi, +enable_avr="yes") +AC_ARG_ENABLE(z80, +[ --disable-z80 do not compile simulator for Z80], +if test $enable_z80 != "no"; then + enable_z80="yes" +fi, +enable_z80="yes") +AC_ARG_ENABLE(hc08, +[ --disable-hc08 do not compile simulator for hc08], +if test $enable_hc08 != "no"; then + enable_hc08="yes" +fi, +enable_hc08="yes") +AC_ARG_ENABLE(xa, +[ --enable-xa compile simulator for XA], +if test $enable_xa != "no"; then + enable_xa="yes" +fi, +enable_xa="no") +AC_ARG_ENABLE(portmon, +[ --enable-serio compile serio GUI tool (needs curses)], +if test $enable_serio != "no"; then + enable_serio="yes" +fi, +enable_serio="no") +AC_SUBST(enable_ucsim) +AC_SUBST(enable_dlso) +AC_SUBST(enable_51) +AC_SUBST(enable_avr) +AC_SUBST(enable_z80) +AC_SUBST(enable_hc08) +AC_SUBST(enable_xa) +AC_SUBST(enable_serio) + +AC_ARG_ENABLE(statistic, +[ --enable-statistic compile statistical features (slower simulation)], +if test $enable_statistic != "no"; then + enable_statistic="yes" +fi, +enable_statistic="no") +AC_DEFINE_UNQUOTED(STATISTIC, $enable_statistic) + + +# Required programs +#------------------- +AC_PROG_CXX +AC_PROG_CXXCPP +AC_PROG_INSTALL +AC_PROG_RANLIB +dnl AC_LANG_CPLUSPLUS + +AC_CHECK_PROG(STRIP, strip, strip, :) + +AC_LIBTOOL_DLOPEN +dnl AC_LIBTOOL_WIN32_DLL +AC_PROG_LIBTOOL +AC_SUBST(LIBTOOL_DEPS) + +AC_PROG_LEX +if test ${LEX} = "flex"; then + AC_DEFINE(HAVE_FLEX) +fi +AC_PROG_YACC +AC_CHECK_PROG(BISON_PLUS_PLUS, bison++, bison++, :) + + +AC_LANG_CPLUSPLUS + +# Checking for header files. +# =========================================================================== + +if test -d /stuff/include; then + CPPFLAGS="$CPPFLAGS -I/stuff/include" +fi + +AC_HEADER_STDC +AC_CHECK_HEADERS(getopt.h unistd.h termios.h) + +AC_CHECK_HEADER(curses.h, + AC_DEFINE(HAVE_CURSES_H) + curses_h_ok=yes, + curses_h_ok=no +) + +ucsim_cv_socket="unknown" +AC_CHECK_HEADER(sys/socket.h, + AC_DEFINE(HAVE_SYS_SOCKET_H) + AC_DEFINE(SOCKET_AVAIL) + AC_DEFINE_UNQUOTED(UCSOCKET_T, int) + ucsim_cv_socket="" +) + +WINSOCK_AVAIL=0 +if test $ucsim_cv_socket = unknown; then + AC_CHECK_HEADER(winsock2.h, + AC_DEFINE(HAVE_WINSOCK2_H) + AC_DEFINE(SOCKET_AVAIL) + AC_DEFINE_UNQUOTED(UCSOCKET_T, SOCKET) + ucsim_cv_socket="" + WINSOCK_AVAIL=1 + ) +fi +AC_SUBST(WINSOCK_AVAIL) + +if test $ucsim_cv_socket != unknown; then + AC_EGREP_HEADER(socklen_t, + $ucsim_cv_socket, + AC_DEFINE_UNQUOTED(SOCKLEN_T, socklen_t), + AC_DEFINE_UNQUOTED(SOCKLEN_T, uint)) +fi +AC_DEFINE_UNQUOTED(HEADER_SOCKET, ${ucsim_cv_socket}) + +AC_CHECK_HEADER(dlfcn.h) +AC_HEADER_DIRENT + +# This must be after CXXCPP + +AC_CACHE_CHECK(which header file defines FD_ macros, ucsim_cv_fd, +[ucsim_cv_fd="unknown" +AC_EGREP_CPP(yes, [ +#include +#ifdef FD_ZERO +yes +#endif], ucsim_cv_fd="") +AC_EGREP_CPP(yes, [ +#include +#ifdef FD_ZERO +yes +#endif], ucsim_cv_fd="") +AC_EGREP_CPP(yes, [ +#include +#ifdef FD_ZERO +yes +#endif], ucsim_cv_fd="") +AC_EGREP_CPP(yes, [ +#include +#ifdef FD_ZERO +yes +#endif], ucsim_cv_fd="")]) + +ucsim_cv_header_ok=0 +if echo $ucsim_cv_fd|grep time >/dev/null 2>&1; then +AC_DEFINE(FD_NEED_TIME_H, 1) +ucsim_cv_header_ok=1 +else +AC_DEFINE(FD_NEED_TIME_H, 0) +fi +if echo $ucsim_cv_fd|grep types >/dev/null 2>&1; then +AC_DEFINE(FD_NEED_TYPES_H, 1) +ucsim_cv_header_ok=1 +else +AC_DEFINE(FD_NEED_TYPES_H, 0) +fi +if echo $ucsim_cv_fd|grep select >/dev/null 2>&1; then +AC_DEFINE(FD_NEED_SELECT_H, 1) +ucsim_cv_header_ok=1 +else +AC_DEFINE(FD_NEED_SELECT_H, 0) +fi +if echo $ucsim_cv_fd|grep winsock2 >/dev/null 2>&1; then +AC_DEFINE(FD_NEED_WINSOCK2_H, 1) +ucsim_cv_header_ok=1 +else +AC_DEFINE(FD_NEED_WINSOCK2_H, 0) +fi + +AC_DEFINE_UNQUOTED(FD_HEADER_OK, ${ucsim_cv_header_ok}) +AC_DEFINE_UNQUOTED(HEADER_FD, ${ucsim_cv_fd}) + + +# Checking for functions/libs +# =========================================================================== +if echo $ucsim_cv_socket|grep winsock2 >/dev/null 2>&1; then + LIBS="-lws2_32 $LIBS" +else + AC_CHECK_LIB(socket,socket) + AC_CHECK_LIB(nsl,xdr_short) +fi + +AC_CHECK_LIB(dl,dlopen, +dl_ok="yes" +DL="-ldl", +dl_ok="no" +DL="") +AC_SUBST(dl_ok) +AC_SUBST(DL) + +#AC_CHECK_LIB(panel,panel_above, +#panel_ok="yes" +#curses_ok="yes" +#CURSES_LIBS="-lpanel -lcurses" +#, +#panel_ok="no" +#AC_CHECK_LIB(curses,nl, +#curses_ok="yes" +#CURSES_LIBS="-lcurses" +#, +#curses_ok="no") +#, +#-lcurses) + +if test $curses_h_ok != yes; then + panel_ok="no" + curses_ok="no" +else + AC_CHECK_LIB(panel,panel_above, + panel_ok="yes" + curses_ok="yes" + CURSES_LIBS="-lpanel", + panel_ok="no" + curses_ok="no" + ) + + if test $curses_ok != yes; then + AC_CHECK_LIB(curses,nl, + curses_ok="yes" + CURSES_LIBS="-lcurses", + curses_ok="no") + fi + + if test $curses_ok != yes; then + AC_CHECK_LIB(ncurses,nl, + curses_ok="yes" + CURSES_LIBS="-lncurses", + curses_ok="no") + fi +fi + +AC_SUBST(panel_ok) +AC_SUBST(curses_ok) +AC_SUBST(CURSES_LIBS) + +AC_FUNC_VPRINTF +AC_CHECK_FUNCS(vsnprintf) +AC_CHECK_FUNCS(_vsnprintf) +AC_CHECK_FUNCS(vasprintf) +AC_CHECK_FUNCS(strlen strcpy strcat strstr strcmp strerror strtok strdup) +AC_CHECK_FUNCS(strchr memcpy) +dnl AC_CHECK_FUNCS(getline) +dnl AC_CHECK_FUNCS(getdelim) +AC_CHECK_FUNCS(fgets) +AC_CHECK_FUNCS(yylex) + +AC_CACHE_CHECK(whether scanf knows %a, ucsim_cv_scanf_a, +[echo "a b" >conftest.data +AC_TRY_RUN([ +#include +void main(void) +{ + FILE *f; + char *a; + int i; + if ((f= fopen("conftest.data", "r")) == NULL) + exit(1); + i= fscanf(f, " %a[a-z] ", &a); + fclose(f); + if (i == 0) + exit(2); + if (i == 1) + exit(0); + exit(3); +}], +ucsim_cv_scanf_a="yes", +ucsim_cv_scanf_a="no", +ucsim_cv_scanf_a="unknown") +]) +if test "$ucsim_cv_scanf_a" = "yes"; then + AC_DEFINE(SCANF_A) +fi + +AC_CACHE_CHECK(whether getcwd is GNUish, ucsim_cv_getcwd, +[AC_TRY_RUN([ +#include +void main(void) +{ + if ((getcwd(NULL, 0)) == NULL) + exit(1); + exit(0); +}], +ucsim_cv_getcwd="yes", +ucsim_cv_getcwd="no", +ucsim_cv_getcwd="unknown") +]) +if test "$ucsim_cv_getcwd" = "yes"; then + AC_DEFINE(GNU_GETCWD) +fi + +AC_DEFUN(ucsim_ACCEPT_LENGTH_T, + [AC_CACHE_CHECK([for type of length pointer parameter of accept], + ucsim_cv_accept_length_type, + [ac_save_CPPFLAGS="$CPPFLAGS" + ucsim_cv_accept_length_type=no + for ac_val in int size_t socklen_t; do + CPPFLAGS="$ac_save_CPPFLAGS -DACCEPT_SOCKLEN_T=$ac_val" + AC_TRY_COMPILE([#include +#include ${ucsim_cv_socket}], + [struct sockaddr a; $ac_val len; accept (0, &a, &len);], + [ucsim_cv_accept_length_type=$ac_val; break]) + done + CPPFLAGS="$ac_save_CPPFLAGS"]) + if test "$ucsim_cv_accept_length_type" != no; then + AC_DEFINE_UNQUOTED(ACCEPT_SOCKLEN_T, $ucsim_cv_accept_length_type, + [Define to be the type of length parameter of accept (without the \*').]) + fi + ] +) +#' + +ucsim_ACCEPT_LENGTH_T + +# Macro definitions +################### + +# DD_COPT macro checks if the compiler specified as the 1st parameter +# supports option specified as the 2nd parameter +# For example: DD_COPT(CXX, fPIC) + +AC_DEFUN(DD_COPT, [ +AC_CACHE_CHECK(whether $$1 accepts -$2,ucsim_cv_$1$2, +cat >_test_.c <&5 2>&5 +if test "$?" = "0"; then + ucsim_cv_$1$2="yes" +else + ucsim_cv_$1$2="no" +fi +rm -f _test_.* a.out) +]) + +# DD_COPT_NO_IGNORE macro checks if the compiler specified as the +# 1st parameter supports and doesn't ignore option specified as the +# 2nd parameter +# For example: DD_COPT_NO_IGNORE(CXX, fPIC) + +AC_DEFUN(DD_COPT_NO_IGNORE, [ +AC_CACHE_CHECK(whether $$1 accepts and doesn't ignore -$2,ucsim_cv_$1$2, +cat >_test_.c <&1 1>&5) +if test "$?" = "0"; then + expr "$ucsim_cv_$1$2" : '.*'-$2'.*ignored' 1>&5 2>&5 + if test "$?" = "0"; then + ucsim_cv_$1$2="no" + else + ucsim_cv_$1$2="yes" + fi +else + ucsim_cv_$1$2="no" +fi +rm -f _test_.* a.out) +]) + + +# Checking characteristics of compilers and other programs +# -------------------------------------------------------- + +# Cross compiling overrides +# FIXME +if test "$CC" = "i586-mingw32msvc-gcc"; then + ac_cv_c_bigendian=no + ac_cv_sizeof_char=1 + ac_cv_sizeof_short=2 + ac_cv_sizeof_int=4 + ac_cv_sizeof_long=4 + ac_cv_sizeof_long_long=4 +fi + +# SDCC_BUILD_BIGENDIAN ([ACTION-IF-TRUE], [ACTION-IF-FALSE], [ACTION-IF-UNKNOWN]) +# ------------------------------------------------------------------------- +AC_DEFUN([SDCC_BUILD_BIGENDIAN], +[AC_CACHE_CHECK(whether host machine byte ordering is bigendian, sdcc_cv_build_bigendian, +[# See if sys/param.h defines the BYTE_ORDER macro. +AC_COMPILE_IFELSE([AC_LANG_PROGRAM([#include +#include +], +[#if ! (defined BYTE_ORDER && defined BIG_ENDIAN && defined LITTLE_ENDIAN \ + && BYTE_ORDER && BIG_ENDIAN && LITTLE_ENDIAN) + bogus endian macros +#endif +])], +[# It does; now see whether it defined to BIG_ENDIAN or not. +AC_COMPILE_IFELSE([AC_LANG_PROGRAM([#include +#include +], [#if BYTE_ORDER != BIG_ENDIAN + not big endian +#endif +])], [sdcc_cv_build_bigendian=yes], [sdcc_cv_build_bigendian=no])], +[# It does not; compile a test program. +AC_RUN_IFELSE( +[AC_LANG_PROGRAM([AC_INCLUDES_DEFAULT], [[ + /* Are we little or big endian? From Harbison&Steele. */ + union + { + long int l; + char c[sizeof (long int)]; + } u; + u.l = 1; + return u.c[sizeof (long int) - 1] == 1; +]])], + [sdcc_cv_build_bigendian=no], + [sdcc_cv_build_bigendian=yes], +[# try to guess the endianness by grepping values into an object file + sdcc_cv_build_bigendian=unknown + AC_COMPILE_IFELSE([AC_LANG_PROGRAM( +[[short int ascii_mm[] = { 0x4249, 0x4765, 0x6E44, 0x6961, 0x6E53, 0x7953, 0 }; +short int ascii_ii[] = { 0x694C, 0x5454, 0x656C, 0x6E45, 0x6944, 0x6E61, 0 }; +void _ascii () { char *s = (char *) ascii_mm; s = (char *) ascii_ii; } +short int ebcdic_ii[] = { 0x89D3, 0xE3E3, 0x8593, 0x95C5, 0x89C4, 0x9581, 0 }; +short int ebcdic_mm[] = { 0xC2C9, 0xC785, 0x95C4, 0x8981, 0x95E2, 0xA8E2, 0 }; +void _ebcdic () { char *s = (char *) ebcdic_mm; s = (char *) ebcdic_ii; }]], +[[ _ascii (); _ebcdic (); ]])], +[if grep BIGenDianSyS conftest.$ac_objext >/dev/null ; then + sdcc_cv_build_bigendian=yes +fi +if grep LiTTleEnDian conftest.$ac_objext >/dev/null ; then + if test "$sdcc_cv_build_bigendian" = unknown; then + sdcc_cv_build_bigendian=no + else + # finding both strings is unlikely to happen, but who knows? + sdcc_cv_build_bigendian=unknown + fi +fi])])])]) +case $sdcc_cv_build_bigendian in + yes) + m4_default([$1], + [AC_DEFINE([BUILD_WORDS_BIGENDIAN], 1, + [Define to 1 if your processor stores words with the most significant + byte first (like Motorola and SPARC, unlike Intel and VAX).])]) ;; + no) + $2 ;; + *) + m4_default([$3], + [AC_MSG_ERROR([unknown endianness +presetting sdcc_cv_build_bigendian=no (or yes) will help])]) ;; +esac +])# SDCC_BUILD_BIGENDIAN + +SDCC_BUILD_BIGENDIAN + +AC_CACHE_CHECK(whether preprocessor accepts -MM or -M,ucsim_cv_MM, +echo "#include " >_test_.c +echo "" >>_test_.c +$CXXCPP -v -MM _test_.c 1>&5 2>&5 +if test "$?" = "0"; then + ucsim_cv_MM="-MM" +else + ucsim_cv_MM="-M" +fi +rm -f _test_.*) +M_OR_MM=$ucsim_cv_MM +AC_SUBST(M_OR_MM) + +# This is the first time when CFLAGS are set/modified!! + +DD_COPT(CXX, ggdb) +DD_COPT(CXX, gstabs) +if test "$ucsim_cv_CXXgstabs" = "yes"; then + gopt="-gstabs+ -g3" +elif test "$ucsim_cv_CXXggdb" = "yes"; then + gopt="-ggdb -g3" +else + gopt="-g" +fi +if test "$CXXFLAGS"x = x ;then + CXXFLAGS="$gopt" +else + CXXFLAGS="$CXXFLAGS $gopt" +fi + +DD_COPT(CXX, pipe) +if test "$ucsim_cv_CXXpipe" = "yes"; then + CXXFLAGS="$CXXFLAGS -pipe" +fi + +PICOPT="" +SHAREDLIB="no" +DD_COPT_NO_IGNORE(CXX, fPIC) +if test "$ucsim_cv_CXXfPIC" = "yes"; then + PICOPT="-fPIC" +else + DD_COPT_NO_IGNORE(CXX, fpic) + if test "$ucsim_cv_CXXfpic" = "yes"; then + PICOPT="-fpic" + fi +fi +if test "$PICOPT"x != "x"; then + SHAREDLIB="yes" +fi +AC_SUBST(SHAREDLIB) +AC_SUBST(PICOPT) + +dlso_ok="no" +if test $SHAREDLIB = "yes" -a $dl_ok = "yes" -a $enable_dlso = "yes"; then + dlso_ok="yes" +fi +AC_SUBST(dlso_ok) + +# Checks for typedefs, structures, and compiler characteristics. +# =========================================================================== + +AC_TYPE_SIGNAL +if test "$cross_compiling" = "no"; then +AC_CHECK_SIZEOF(char) +AC_CHECK_SIZEOF(short) +AC_CHECK_SIZEOF(int) +AC_CHECK_SIZEOF(long) +AC_CHECK_SIZEOF(long long) +else + if $CXX -v 2>&1|grep "mingw" >/dev/null 2>&1; then + ac_cv_sizeof_char=1 + ac_cv_sizeof_short=2 + ac_cv_sizeof_int=4 + ac_cv_sizeof_long=4 + ac_cv_sizeof_long_long=4 + else + : # FIXME + fi +#echo +fi + +type_name() +{ + if expr "$ac_cv_sizeof_char" '>=' "$1" >/dev/null; then + echo "char" + exit + fi + if expr "$ac_cv_sizeof_short" '>=' "$1" >/dev/null; then + echo "short" + exit + fi + if expr "$ac_cv_sizeof_int" '>=' "$1" >/dev/null; then + echo "int" + exit + fi + if expr "$ac_cv_sizeof_long" '>=' "$1" >/dev/null; then + echo "long" + exit + fi + if expr "$ac_cv_sizeof_long_long" '>=' "$1" >/dev/null; then + echo "long long" + exit + fi + echo "long long" +} + +AC_MSG_CHECKING(type name for byte) +TYPE_BYTE=`type_name 1` +AC_MSG_RESULT($TYPE_BYTE) +AC_MSG_CHECKING(type name for word) +TYPE_WORD=`type_name 2` +AC_MSG_RESULT($TYPE_WORD) +AC_MSG_CHECKING(type name for dword) +TYPE_DWORD=`type_name 4` +AC_MSG_RESULT($TYPE_DWORD) +AC_DEFINE_UNQUOTED(TYPE_BYTE, $TYPE_BYTE) +AC_DEFINE_UNQUOTED(TYPE_WORD, $TYPE_WORD) +AC_DEFINE_UNQUOTED(TYPE_DWORD, $TYPE_DWORD) + +if echo $TYPE_DWORD|grep short >/dev/null; then + A="h" +elif echo $TYPE_DWORD|grep long >/dev/null; then + A="l" +else + A="" +fi + +if echo $TYPE_WORD|grep short >/dev/null; then M="h" +elif echo $TYPE_WORD|grep long >/dev/null; then M="l" +else M="" +fi + +AC_DEFINE_UNQUOTED(_A_, "${A}") +AC_DEFINE_UNQUOTED(_M_, "${M}") + +# Generating output files +# =========================================================================== + +AC_OUTPUT(Makefile +main.mk:main_in.mk +packages.mk:packages_in.mk +sim.src/Makefile +cmd.src/Makefile +s51.src/Makefile +avr.src/Makefile +z80.src/Makefile +hc08.src/Makefile +xa.src/Makefile +gui.src/Makefile +gui.src/serio.src/Makefile +doc/Makefile +) + +#gui.src/portmon.src/Makefile + + +# End of configure/configure.in diff --git a/sim/ucsim/ddconfig_in.h b/sim/ucsim/ddconfig_in.h new file mode 100644 index 0000000..054a0c8 --- /dev/null +++ b/sim/ucsim/ddconfig_in.h @@ -0,0 +1,138 @@ +/* + * Simulator of microcontrollers (ddconfig.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef DDCONFIG_HEADER +#define DDCONFIG_HEADER + +#define DD_TRUE 1 +#define DD_FALSE 0 +#define NIL 0 + +#undef STDC_HEADERS +#undef HAVE_GETOPT_H +#undef HAVE_UNISTD_H +#undef HAVE_DIRENT_H +#undef HAVE_SYS_NDIR_H +#undef HAVE_SYS_DIR_H +#undef HAVE_NDIR_H +#undef HAVE_SYS_SOCKET_H +#undef HAVE_WINSOCK2_H +#undef HAVE_DLFCN_H +#undef HAVE_CURSES_H +#undef HAVE_TERMIOS_H + +#undef SOCKET_AVAIL +#undef SOCKLEN_T +#undef UCSOCKET_T +#undef HEADER_SOCKET + +#undef FD_NEED_TIME_H +#undef FD_NEED_TYPES_H +#undef FD_NEED_SELECT_H +#undef FD_NEED_WINSOCK2_H +#undef HEADER_FD +#undef FD_HEADER_OK + +#undef SCANF_A +#undef GNU_GETCWD + +#undef HAVE_STRLEN +#undef HAVE_STRCPY +#undef HAVE_STRCAT +#undef HAVE_STRSTR +#undef HAVE_STRCMP +#undef HAVE_STRERROR +#undef HAVE_STRTOK +#undef HAVE_STRDUP +#undef HAVE_STRCHR + +#undef HAVE_MEMCPY + +#undef HAVE_VPRINTF +#undef HAVE_DOPRNT +#undef HAVE_VSNPRINTF +#undef HAVE__VSNPRINTF +#undef HAVE_VASPRINTF + +#undef HAVE_GETLINE +#undef HAVE_GETDELIM +#undef HAVE_FGETS + +#undef HAVE_YYLEX +#undef HAVE_FLEX +#undef YYTEXT_POINTER + +#undef RETSIGTYPE +#undef SIZEOF_CHAR +#undef SIZEOF_SHORT +#undef SIZEOF_INT +#undef SIZEOF_LONG +#undef SIZEOF_LONG_LONG +#undef TYPE_BYTE +#undef TYPE_WORD +#undef TYPE_DWORD +#define TYPE_UBYTE unsigned TYPE_BYTE +#define TYPE_UWORD unsigned TYPE_WORD +#define TYPE_UDWORD unsigned TYPE_DWORD +#undef _M_ +#undef _A_ + +/* + * find out the endianess of host machine + * in order to be able to make Mac OS X unified binaries + */ +#if __BIG_ENDIAN__ || _BIG_ENDIAN +/* 1) trust the compiler */ +# define WORDS_BIGENDIAN 1 +#elif __LITTLE_ENDIAN__ +/* do nothing */ +#elif (defined BYTE_ORDER && defined BIG_ENDIAN && defined LITTLE_ENDIAN && BYTE_ORDER && BIG_ENDIAN && LITTLE_ENDIAN) +/* 2) trust the header files */ +# if BYTE_ORDER == BIG_ENDIAN +# define WORDS_BIGENDIAN 1 +# endif +#else +/* 3) trust the configure; this actually doesn't work for unified Mac OS X binaries :-( */ +# undef BUILD_WORDS_BIGENDIAN +# if (defined BUILD_WORDS_BIGENDIAN && BUILD_WORDS_BIGENDIAN) +# define WORDS_BIGENDIAN 1 +# endif +/* 4) assume that host is a little endian machine */ +#endif + +#undef VERSIONSTR +#undef VERSIONHI +#undef VERSIONLO +#undef VERSIONP + +#undef ACCEPT_SOCKLEN_T + +#undef STATISTIC + +#endif + +/* End of ddconfig.h */ diff --git a/sim/ucsim/doc/Makefile.in b/sim/ucsim/doc/Makefile.in new file mode 100644 index 0000000..a127d92 --- /dev/null +++ b/sim/ucsim/doc/Makefile.in @@ -0,0 +1,85 @@ +# +# uCsim doc/Makefile +# +# (c) Drotos Daniel, Talker Bt. 1997 +# + +STARTYEAR = 1997 + +SHELL = /bin/sh +INSTALL = @INSTALL@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @infodir@ +srcdir = @srcdir@ +VPATH = @srcdir@ +#docdir = $(prefix)/share/doc/ucsim +docdir = @docdir@/ucsim + + +# Compiling entire program or any subproject +# ------------------------------------------ +all: doc + +doc: checkconf + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: all installdirs + cp $(srcdir)/*.html $(DESTDIR)$(docdir) + cp $(srcdir)/*.gif $(DESTDIR)$(docdir) + cp $(srcdir)/*.jpg $(DESTDIR)$(docdir) + cp $(srcdir)/*.fig $(DESTDIR)$(docdir) + + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -rf $(DESTDIR)$(docdir) + + +# Performing self-test +# -------------------- +check: + +test: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + test -d $(DESTDIR)$(docdir) || $(INSTALL) -d $(DESTDIR)$(docdir) + + +# Creating dependencies +# --------------------- +include $(srcdir)/clean.mk + +# My rules +# -------- + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" freshconf;\ + fi + +# End of s51.src/Makefile.in diff --git a/sim/ucsim/doc/UCsim.jpg b/sim/ucsim/doc/UCsim.jpg new file mode 100644 index 0000000000000000000000000000000000000000..a4356acc70a081a5f0e4234d1ef8348a1f6357ad GIT binary patch literal 5540 zcmbW4byO5?m&a$QA*Er!A*8#zLs}RZx??~}x;rEkX%qx;5CkQp8IY3hl8zB%W(Yw+ z8U%#p_r7~}&)L6r_j}LtoO91}?>*1wdG0^=cIkE%{CMzr}!OCN3pvCIz7zlS`6%`WW zWo0!Aa(v<*7{;o|DlI9%YV76X6X@pd?Rw{n5Z|Hz>HtCl0uTW{AqWH_A|fOvr6D6F zAt7a;q9&(dVq{@vVuV0gIfS@b*#y`j5FTk>0TEFN2?-W%Sw$H!1tD<>v44sHiHL|u zNl3wDWMHuekOyM_XWe!KCjy#PM&UjqE6fH=5#_yizA zB4U!e03-zf2Z)P{gNKWckB4^`9d&mOz@x;cdLXJwKyBm*V)LUBi_0n|WLK;2p@mH! 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Code analyzer

+ +This feature is included into both DOS and UNIX versions. Code +analyzer analyzes the code of the simulated program and tries to +figure out which address contains valid instruction. Analyzer starts +analyzing of the code with address 0 which always must contain an +instruction because reset of the device sets zero into program +counter. So, analyzer marks address 0 that it contains an +instruction. Then it marks the address of the next instruction and so +on. If the analyzer finds a jump instruction it continues with +destination address of the jump instruction. If it finds a +call instruction, it recursively analyzes destination address +as well as next instruction follows the call one. Analyzator +stops if it finds an address which is already marked or if it finds a +return instruction or an indirect jump which is +impossible to follow. All these mean that it is impossible to discover +all instructions of the program. + +

This problem is solved in very simple way in UNIX version. If the +execution reaches an umarked address, the analyzer is called to +analyze the code starting at actual address pointed by the PC. This +method is not included into DOS version but this re-analyzation can be +requested by pressing Ctrl-F7 at any time. + +

+ + + diff --git a/sim/ucsim/doc/burst.gif b/sim/ucsim/doc/burst.gif new file mode 100644 index 0000000000000000000000000000000000000000..fbdcf575f78a5ebbd3eeac5bbd9f963962ab664f GIT binary patch literal 235 zcmZ?wbhEHb6k!l!IK;s49|+DEpZWiPW*S3UTAH!3F#{MV{__jT$ShV!EGkg|Qki)Q zB^jv-1*J(jnaK(%`MHUid3p-osbxS3kJ9vv)M6clY!ENQAvLo^FF8L~MXn zDYZz!(9+VBLGdRGBLf2ygAT}iknIf2aT>es{4+SUl4tW3o}3LYCJ5%-`ZlvqY)y_i zON{zvlk8Qc_r#nUUz;+oS7*8wAfNp1ThKa>J&QI6cbF|deBP(?&CiC}j@vi=I#{!y ctx@66$5l65-@mTg36FLd3o%#&030@6>Hq)$ literal 0 HcmV?d00001 diff --git a/sim/ucsim/doc/chip.fig b/sim/ucsim/doc/chip.fig new file mode 100644 index 0000000..49e0d02 --- /dev/null +++ b/sim/ucsim/doc/chip.fig @@ -0,0 +1,108 @@ +#FIG 3.2 +Landscape +Center +Metric +A4 +100.00 +Single +-2 +1200 2 +6 3375 2610 5130 2925 +2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 + 3375 2610 5130 2610 5130 2925 3375 2925 3375 2610 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3600 2925 3600 2790 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3825 2925 3825 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reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean diff --git a/sim/ucsim/doc/cmd.html b/sim/ucsim/doc/cmd.html new file mode 100644 index 0000000..3d72870 --- /dev/null +++ b/sim/ucsim/doc/cmd.html @@ -0,0 +1,355 @@ + + +Commands of s51 + + + + +

Command reference of µCsim

+ + + + +General commands and information + + + + + + +Memory manipulation + + + + + + +Execution + + + + + + +Breakpoints + + + + + + +Dump commands + + + + + + +Removed obsolet commands + +
  • wi,Wi Search for string in +Internal RAM (removed 0.2.38, use where,Where instead) + +
  • wx,Wx Search for string in +External RAM (removed 0.2.38, use where,Where instead) + +
  • wc,Wc Search for string in ROM +(removed 0.2.38, use where,Where instead) + +
  • gopt Get value of option(s) +(removed 0.2.38, use get option instead) + +
  • sopt Set value of option +(removed 0.2.38, use set option instead) + +
  • g Go (changed 0.2.12) (removed +0.2.38, use run instead) + +
  • bs Set FETCH Breakpoint (removed 0.2.20, use +break or tbreak instead) + +
  • bse Set EVENT Breakpoint (removed 0.2.38, use break or tbreak instead) + +
  • bd Delete FETCH Breakpoint (removed +0.2.20, use clear instead) + +
  • bde Delete EVENT Breakpoint +(removed 0.2.38, use delete instead) + +
  • ba Delete all breakpoints (removed 0.2.38, use delete instead) + +
  • bl List Breakpoints (removed 0.2.20, use info breakpoints instead) + +
  • dr Dump registers (removed 0.2.37, +use info registers instead) + +
  • dp Dump ports (removed 0.2.38, use info hardware instead) + +
  • si Set Internal RAM (removed 0.2.38, use set +memory instead) + +
  • sx Set External RAM (removed 0.2.38, use set +memory instead) + +
  • sc Set code (ROM) (removed 0.2.38, use set +memory instead) + +
  • ss Set SFR area (removed 0.2.38, use set +memory instead) + +
  • sb Set bit (removed 0.2.38, use set +bit instead) + +
  • fi Fill IRAM area with data +(removed 0.2.38, use fill instead) + +
  • fx Fill XRAM area with data +(removed 0.2.38, use fill instead) + +
  • fs Fill SFR area with data +(removed 0.2.38, use fill instead) + +
  • fc Fill ROM area with data +(removed 0.2.38, use fill instead) + +
  • db Dump bit (removed 0.2.38, use dump instead) + +
  • sp Set port pins (removed 0.2.38, use set port instead) + +
+ +
+ + + diff --git a/sim/ucsim/doc/cmd.txt b/sim/ucsim/doc/cmd.txt new file mode 100644 index 0000000..7239007 --- /dev/null +++ b/sim/ucsim/doc/cmd.txt @@ -0,0 +1,69 @@ +app +G conf +G conf objects +G help,? +G quit +G kill + G exec file + G expression,let expr +G show copying +G show warranty +G show option [name] +G show error +G get option [name] +G set option name|nr value +G set error error_name on|off|unset + +sim +E run,go,r [start [stop]] +E stop +E step,s +E next,n + gui start + gui stop + +uc +G state + statistic [mem [startaddr [endaddr]] + GM file "file" + GM download,dl +E pc [addr] +G reset +D dump mem_type [start [stop [bytes_per_line]] +D dump bitname... +D dch [start [stop]] +D dc [start [stop]] +D disassemble [start [offset [lines]]] + GM fill mem_type start end data + GM where mem_type data... + GM Where mem_type data... +B break addr [hit] +B break mem_type r|w addr [hit] +B tbreak addr [hit] +B tbreak mem_type r|w addr [hit] +B clear [addr...] +B delete [nr...] +G get sfr addr... +G set memory mem_type addr data... +G set bit addr 0|1 +G set hardware,hw cath params... +G info breakpoints +G info registers +G info hardware,hw cath +G info stack +G info memory +G timer add,create,make id [direction [in_isr]] +G timer delete,remove id +G timer get [id] +G timer run,start id +G timer stop id +G timer value,set id value + memory createchip,cchip id size cellsize + memory createaddressspace,createaddrspace,createaspace,caddressspace,caddrspace,caspace id startaddr size + memory createaddressdecoder,createaddrdecoder,createadecoder,caddressdecoder,caddrdecoder,cadecoder addressspace begin end chip begin + + s51 + +D di [start [stop]] +D dx [start [stop]] +D ds [start [stop]] diff --git a/sim/ucsim/doc/cmd_bp.html b/sim/ucsim/doc/cmd_bp.html new file mode 100644 index 0000000..e64e2bf --- /dev/null +++ b/sim/ucsim/doc/cmd_bp.html @@ -0,0 +1,142 @@ + + +Breakpoints commands of µCsim + + + + + + +

Commands of µCsim to manage breakpoints

+ +Two kind of breakpoint can be used: fetch and event +breakpoint. Fetch breakpoints are classical breakpoints. They +can be placed at any instruction in the code memory. Breakpoint will +be hit if CPU fetches instruction code from the memory location +specified by the breakpoint. Only fetching of first byte of the +instruction hits the breakpoint. If the execution reaches a breakpoint +it stops before the instruction at location specified by the +breakpoint would be executed. + +

Event breakpoints are special onces. They cause stop of +execution if event specified by the breakpoint occures. Event can be a +read or a write operation on any address space location. Event +breakpoint stops execution after specified event occured. + +

Every breakpoint can be fix (permanent) or dynamic +(temporary). Dynamic breakpoints are automatically removed when they +reached. Some commands place dynamic fetch breakpoints into the code, +for example go or next. + +

A hit number can be associated to any breakpoint. This hit +number specifies how many times the breakpoint must be hit before it +causes the execution to stop. This hit number is 1 by default. + +

+ + +

break addr [hit] +
break memory_type r|w addr [hit]

 +

tbreak addr [hit] +
tbreak memory_type r|w addr [hit]

 + + +Set fetch or event breakpoint. The command specifies if the breakpoint +will be fix (break) or dynamic (temporary) +(tbreak). + +

Fetch or event breakpoint can be defined. First form defines fetch +while second form defines event breakpoint. + +

Fetch breakpoint + +
First parameter specifies address where the breakpoint must be +placed to. It should be address of an instruction. +
Second parameter is optional and it specifies the hit number. It is +1 by default. + +
Event breakpoint + +
First parameter specifies class name of memory where we are going +to watch for en event. Class names of memories can be checked by info memory command. +
Second parameter specifies the event. It can be r to +specify read operation or w which means write +operation. +
Remaining parameters are address of watched memory location and an +optional hit number (1 by default). + +
+ +
+$ s51 remoansi.hex
+ucsim 0.2.24, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+58659 bytes read from remoansi.hex
+> dc 0 0x10
+   000000 02 01 60 LJMP  0160
+ * 000003 02 00 3c LJMP  003c
+ * 000006 ff       MOV   R7,A
+ * 000007 ff       MOV   R7,A
+ * 000008 ff       MOV   R7,A
+ * 000009 ff       MOV   R7,A
+ * 00000a ff       MOV   R7,A
+ * 00000b 02 3b e0 LJMP  3be0
+ * 00000e ff       MOV   R7,A
+ * 00000f ff       MOV   R7,A
+ * 000010 ff       MOV   R7,A
+> break 0x160
+Breakpoint 1 at 0x000160: CLR   P1.0
+> tbreak 8 2
+Breakpoint 2 at 0x000008: MOV   R7,A
+> g
+Simulation started, PC=0x000000
+Stop at 000160: (4) Breakpoint
+F 000160
+>
+ +
+ + +

clear [addr...]

 + +Delete fetch breakpoint. Parameter specifies address of breakpoint. If +there is no breakpoint specified at given address this command prints +out a warning message. + +

If parameter is not given then breakpoint at current PC will be +deleted if it exists. If more than one address is specified then all +breakpoints at specified addresses will be deleted. + +

+> i b
+Num Type       Disp Hit   Cnt   Address  What
+1   fetch      keep 1     1     0x000160 CLR   P1.0
+2   fetch      del  1     1     0x000180 LJMP  022a
+1   event      keep 1     1     0x000006 wi
+> clear 160
+No breakpoint at 0000a0
+> clear 0x160
+> i b
+Num Type       Disp Hit   Cnt   Address  What
+2   fetch      del  1     1     0x000180 LJMP  022a
+1   event      keep 1     1     0x000006 wi
+>
+ +
+ + +

delete [number...]

 + +Delete breakpoint(s) by its number. + +

If parameter is not used then all breakpoints are deleted. + + +

+ + + diff --git a/sim/ucsim/doc/cmd_dump.html b/sim/ucsim/doc/cmd_dump.html new file mode 100644 index 0000000..af2150c --- /dev/null +++ b/sim/ucsim/doc/cmd_dump.html @@ -0,0 +1,385 @@ + + +Dump commands of µCsim + + + + + +

Dump commands of µCsim

+ +

dump memory_type [start [end [bytes_per_line]]] +
dump bit_name...

 + +First form can be used get content of memory while second form can be +used to check value of bit or bits. + + +
+ +

dump memory_type [start [end +[bytes_per_line]]]

 + +Hexadecimal dump of a memory region. First parameter specifies +memory. It can be name of an address space or a chip, and can be +checked using info memory +command which lists size and name of all available memories. + +

start and end parameters can be used to specify the +first and last address of the dumped region. If end is omitted +then 64 memory location is dumped. If both start and end +are omitted then next 64 memory location will be dumped out. Every +time when dump command is used the address of last dumped memory +location is stored and next dump command automatically continues at +next address. + +

Last parameter can be used to specify how many memory locations +should be dumped out in one line. It is 8 by default. + +

+$ s51 remo.hex
+ucsim 0.2.38-pre2, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> 55470 words read from remo.hex
+55470 words read from remo.hex
+> run
+Simulation started, PC=0x000000
+
+Stop at 0x000515: (105) User stopped
+F 0x000515
+> du rom 20
+0x0014 00 ac ff ff ff ff ff ff ........
+0x001c ff ff ff ff ff ff ff 02 ........
+0x0024 01 1c ff ff ff ff ff 32 .......2
+0x002c ff ff ff ff 02 0f a7 02 ........
+0x0034 0e 9c 02 0d d2 02 08 41 .......A
+0x003c c0 82 c0 83 c0 d0 c0 e0 ........
+0x0044 c0 00 a2 90 c0 d0 c2 90 ........
+0x004c 78 18 06 30 03 4b 20 92 x..0.K .
+0x0054 48 30 07 05 c2 07 02 00 H0......
+0x005c 9d 30 08 05 20 93 3a c2 .0.. .:.
+> du xram 10 20 10
+0x000a ff 01 00 fa 01 01 40 01 01 44 ......@..D
+0x0014 01                            .
+> du xram
+0x0015 00 00 00 00 00 00 00 00 ........
+0x001d 00 10 01 00 ae 01 00 ae ........
+0x0025 02 12 e1 00 5a 85 00 01 ....Z...
+0x002d 00 3b 00 00 5a 85 00 ab .;..Z...
+0x0035 1f 80 00 00 01 00 01 00 ........
+0x003d fa 0c 02 01 00 fa 00 02 ........
+0x0045 00 01 00 ab 00 00 00 00 ........
+0x004d 00 00 5a 85 ff 00 01 00 ..Z.....
+0x0055 00 00 00 94 a7 01 0c a6 ........
+0x005d 00 6f ff 00 00 00 00 00 .o......
+>
+
+ +
+ + +

dump bit_name...

 + +If the simulated controller supports addressable bits (such as MCS51 +does) this command can be used to print out values of bit(s). Any form of bit address can be used +as parameter: + +
+0> dump ac p1.2 0x21
+     PSW.6 0xd0 00 0
+      P1.2 0x90 ff 1
+    0x24.1 0x24 24 0
+0> 
+
+ +Please note, that this command can not be used, if there is no address +space called sfr. + +
+$ sz80
+uCsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+uCsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+0> dump 0.0
+No memory specified. Use "info memory" for available memories
+0> 
+
+ + +
+ +
+ + +

dch [start [stop]]

 + +Hexadecimal dump of code memory area from address start to +address stop. Default value of start address is address of +following memory cell which was dumped by previous dch +command. If stop parameter is not given dch command +lists 10 lines 8 bytes per line. + +
+$ s51 remo.hex
+ucsim 0.2.24, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+58659 bytes read from remoansi.hex
+> wc remo
+0013da 52 65 6d 6f             Remo
+> dch 0x13da
+0013da 52 65 6d 6f 20 00 56 65 Remo .Ve
+0013e2 72 73 69 6f 6e 20 31 2e rsion 1.
+0013ea 30 20 00 43 6f 70 79 72 0 .Copyr
+0013f2 69 67 68 74 20 28 63 29 ight (c)
+0013fa 20 00 31 39 39 34 2c 39  .1994,9
+001402 35 20 00 54 61 6c 6b 65 5 .Talke
+00140a 72 20 42 74 2e 00 53 75 r Bt..Su
+001412 6e 64 61 79 2e 00 4d 6f nday..Mo
+00141a 6e 64 61 79 2e 00 54 68 nday..Th
+001422 75 65 73 64 61 79 2e 00 uesday..
+>
+ +First element in every lines is address of first byte dumped out in +the line. Next elements are hexadecimal values of bytes followed by +ASCII charactes of bytes dumped out in the line. If value of the +memory cell is not printable than a dot is dumped out. + +
+ + +

dc [start [stop]]

 + +Disassembled dump of code memory area. This command simply produces +disassambled list of memory area specified by the parameters. Default +value of start parameter is last address listed by previous +dc command. If stop parameter is not given 20 lines are +listed. + +
+$ s51 remoansi.hex 
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+58659 bytes read from remoansi.hex
+> dc
+   000000 02 01 60 LJMP  0160
+ * 000003 02 00 3c LJMP  003c
+ * 000006 ff       MOV   R7,A
+ * 000007 ff       MOV   R7,A
+ * 000008 ff       MOV   R7,A
+ * 000009 ff       MOV   R7,A
+ * 00000a ff       MOV   R7,A
+ * 00000b 02 3b e0 LJMP  3be0
+ * 00000e ff       MOV   R7,A
+ * 00000f ff       MOV   R7,A
+ * 000010 ff       MOV   R7,A
+ * 000011 ff       MOV   R7,A
+ * 000012 ff       MOV   R7,A
+ * 000013 02 00 ac LJMP  00ac
+ * 000016 ff       MOV   R7,A
+ * 000017 ff       MOV   R7,A
+ * 000018 ff       MOV   R7,A
+ * 000019 ff       MOV   R7,A
+ * 00001a ff       MOV   R7,A
+ * 00001b ff       MOV   R7,A
+ * 00001c ff       MOV   R7,A
+>
+ +
+ + +

disassemble [start [offset +[lines]]]

 + +Disassemble code. This command can be used to list disassembled +instructions which discovered by the code +analyzer. First two parameters specify the address where the list +starts. First parameter is address where the command starts to search +an instruction. This search goes forward. When the first instruction +marked by code analyzer found the simulator skips as many instructions +as you specify in second parameter. If offset is negative the +simulator goes backward and skips specified number of +instructions. Default value of +start parameter is last address which was listed by previous +dis command and default value of offset is -1. It means +you can make continuous list repeating parameterless dis +command. + +

In third parameter you can specify how many instructions you want +to list. Default value is 20. + +

+$ s51 remoansi.hex
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+58659 bytes read from remoansi.hex
+> dis
+   000000 02 01 60 LJMP  0160
+   000160 c2 90    CLR   P1.0
+   000162 c2 97    CLR   P1.7
+   000164 d2 b5    SETB  P3.5
+   000166 d2 b4    SETB  P3.4
+   000168 75 81 22 MOV   SP,#22
+   00016b 75 d0 00 MOV   PSW,#00
+   00016e 7e 00    MOV   R6,#00
+   000170 7f 00    MOV   R7,#00
+   000172 79 04    MOV   R1,#04
+   000174 12 0d b8 LCALL 0db8
+   000177 0f       INC   R7
+   000178 d9 fa    DJNZ  R1,0174
+   00017a 75 0b 00 MOV   0b,#00
+   00017d 75 0c 00 MOV   0c,#00
+   000180 02 02 2a LJMP  022a
+   000183 78 22    MOV   R0,#22
+   000185 76 00    MOV   @R0,#00
+   000187 d8 fc    DJNZ  R0,0185
+> br 0x180
+> tbr 0x189
+> dis 0x180 -3 10
+   000178 d9 fa    DJNZ  R1,0174
+   00017a 75 0b 00 MOV   0b,#00
+   00017d 75 0c 00 MOV   0c,#00
+F  000180 02 02 2a LJMP  022a
+   000183 78 22    MOV   R0,#22
+   000185 76 00    MOV   @R0,#00
+   000187 d8 fc    DJNZ  R0,0185
+D  000189 22       RET
+   00018a 90 09 ec MOV   DPTR,#09ec
+   00018d ae 83    MOV   R6,DPH
+>
+ +If there is an F or D character at the beginning of the +line, it means that there is a fix or dynamic fetch breakpoint at +listed address. Next element on the list can be an asterix (*) +which means that the listed address is not marked by the code +analyzer. dis lists marked instructions only so asterix never +appears in the list. Next element of the list is address displayed as +six digit hexadecimal number. Address is followed by hexadecimal dump +of instruction's code. Last element of the list is disassembled +instruction. Every number appeared on the list is hexadecimal number. + +
+ + +

di [start [stop]]

 + +Hexadecimal dump of iram named address space area from address +start to address stop. Default value of start address is +address of following memory cell which was dumped by previous +di command. If stop parameter is not given di +command lists 10 lines 8 bytes per line. + +
+$ s51 remoansi.hex
+ucsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+58659 bytes read from remoansi.hex
+0> set opt irq_stop 1
+0> go
+Simulation started, PC=0x000000
+Stop at 000023: (5) Interrupt
+F 000023
+0> di
+000000 18 02 16 ba 00 02 00 0a ........
+000008 00 00 00 00 00 00 00 00 ........
+000010 00 00 00 00 00 00 00 00 ........
+000018 4a 00 00 00 00 00 00 00 J.......
+000020 bc 27 06 2d 02 ee 35 8f .'.-..5.
+000028 31 e7 42 01 0e 01 0b 00 1.B.....
+000030 ec 0b 7f 10 7f a9 7e 08 ......~.
+000038 fe 03 09 00 00 00 af 08 ........
+000040 af 08 00 00 00 00 00 00 ........
+000048 00 00 00 00 00 00 00 00 ........
+0>
+
+ +
+ + +

dx [start [stop]]

 + +Hexadecimal dump of xram named address space area from address +start to address stop. Default value of start address is +address of following memory cell which was dumped by previous +dx command. If stop parameter is not given dx +command lists 10 lines 8 bytes per line. + +
+$ s51 remoansi.hex
+ucsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+58659 bytes read from remoansi.hex
+0> set opt irq_stop 1
+0> go
+Simulation started, PC=0x000000
+Stop at 000023: (5) Interrupt
+F 000023
+0> dx 0x100
+000100 00 00 00 00 00 00 00 00 ........
+000108 00 00 00 00 00 00 00 00 ........
+000110 00 00 00 00 00 00 00 00 ........
+000118 00 00 00 00 00 00 00 00 ........
+000120 00 00 00 00 00 00 00 00 ........
+000128 00 00 00 00 00 00 00 44 .......D
+000130 61 6e 69 00 00 00 02 02 ani.....
+000138 07 00 00 ff 00 00 07 cb ........
+000140 08 0c 32 00 07 cb 06 05 ..2.....
+000148 02 00 24 00 00 00 00 00 ..$.....
+0>
+
+ +
+ + +

ds [start [stop]]

 + +Hexadecimal dump of sfr named address space area from address +start to address stop. Default value of start address is +address of following memory cell which was dumped by previous +ds command. If stop parameter is not given ds +command lists 10 lines 8 bytes per line. + +
+$ s51 remo.hex
+ucsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+58659 bytes read from remoansi.hex
+0> set opt irq_stop 1
+0> go
+Simulation started, PC=0x000000
+Stop at 000023: (5) Interrupt
+F 000023
+0> ds
+0x80 ff 2a 1e 13 00 00 00 80 .*......
+0x88 d5 21 f7 fd 50 fd 00 00 .!..P...
+0x90 fe 00 00 00 00 00 00 00 ........
+0x98 7e 0a 00 00 00 00 00 00 ~.......
+0xa0 ff 00 00 00 00 00 00 00 ........
+0xa8 97 00 00 00 00 00 00 00 ........
+0xb0 ff 00 00 00 00 00 00 00 ........
+0xb8 15 00 00 00 00 00 00 00 ........
+0xc0 00 00 00 00 00 00 00 00 ........
+0xc8 00 00 00 00 00 00 00 00 ........
+0>
+
+ +
+ + + + diff --git a/sim/ucsim/doc/cmd_exec.html b/sim/ucsim/doc/cmd_exec.html new file mode 100644 index 0000000..c4adbe9 --- /dev/null +++ b/sim/ucsim/doc/cmd_exec.html @@ -0,0 +1,187 @@ + + +Execution commands of µCsim + + + + + +

Execution commands of µCsim

+ + +

r,run,go [start [stop]]

 + +This command starts the execution of the simulated program. + +

Parameters are optional. First parameter specifies start address of +the execution. By default execution starts at address specified by +actual value of the PC. This can be overridden by first parameter. + +

If second parameter is specified it places a dynamic breakpoint at +specified address which stops the execution. If stop address is not +given the simulator stops if it reaches a breakpoint, or the CPU +accepts an interrupt and stopit option is TRUE, or fatal error +occures or stop command is used on an other +console, or ENTER key is pressed on the console where the run command +was issued. + +

If program execution is started the console is frozen it is +not possible to give commands on this console to the simulator while +execution is running. If it is needed to control the simulator during +program execution then more consoles can be used. See using multiple consoles for more information. + +

Note that first instruction is executed without effect of +breakpoints and simulation will be started afterwards. It means that +if there is a breakpoint at start address then it will not be hit. See +following example: + +

+$ ./s51
+ucsim 0.2.38-pre1, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> b 0x10
+Breakpoint 1 at 0x000010: MOV   R7,A
+> b 0x20
+Breakpoint 2 at 0x000020: MOV   R7,A
+> run 0x10
+Warning: maybe not instruction at 0x000010
+Simulation started, PC=0x000010
+Stop at 0x000020: (104) Breakpoint
+F 0x000020
+> 
+
+ +
+ + +

stop

 + +This command stops the simulation, it freezes the CPU and all the +peripherials. + +
+$ s51 remoansi.hex
+ucsim 0.2.24, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+58659 bytes read from remoansi.hex
+> g
+Simulation started
+> dr
+000000 00 01 00 14 00 00 5a 47 ......ZG
+000000 00 .  ACC= 0x47  71 G  B= 0x01   DPTR= 0x001c @DPTR= 0x47  71 G
+000001 01 .  PSW= 0x00 CY=0 AC=0 OV=0 P=0
+   006f02 90 00 1e MOV   DPTR,#001e
+> stop
+   006ac5 24 a5    ADD   A,#a5
+> 
+
+ +Simulated program is executed in background and the simulator accepts +commands. If it stopped by the stop command the instruction pointed by +PC is dissassembled, see the dis command for +description of disassembled form. + +
+ + +

s,step

 + +Step command. It executes one instruction without effect of +breakpoints. + +
+$ s51 remoansi.hex
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+58659 bytes read from remoansi.hex
+> s
+000000 00 00 00 00 00 00 00 00 ........
+000000 00 .  ACC= 0x00   0 .  B= 0x00   DPTR= 0x0000 @DPTR= 0x00   0 .
+000000 00 .  PSW= 0x00 CY=0 AC=0 OV=0 P=0
+   000160 c2 90    CLR   P1.0
+>
+ +After execution of actual instruction pointed by PC the step +command dumps out the register set. + +
+ + +

n,next

 + +Execute until next instruction is reached. This command is similar to +step command described above but if actual +instruction to execute is a subroutine call the next command +places a dynamic breakpoint after the call instruction and starts to +execute the subroutine. If the subroutine is infinite the breakpoint +set by next will never reached. It can be a dangerous situation +because the executeion started by the next command can not be +stopped interactively. But it can be stopped by other breakpoints. + +
+$ s51 remoansi.hex
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+58659 bytes read from remoansi.hex
+> run 0 0x172
+   000172 79 04    MOV   R1,#04
+> dis 0x172 0 5
+   000170 7f 00    MOV   R7,#00
+   000172 79 04    MOV   R1,#04
+   000174 12 0d b8 LCALL 0db8
+   000177 0f       INC   R7
+   000178 d9 fa    DJNZ  R1,0174
+   00017a 75 0b 00 MOV   0b,#00
+> n
+000000 00 04 00 00 00 00 00 00 ........
+000000 00 .  ACC= 0x00   0 .  B= 0x00   DPTR= 0x0000 @DPTR= 0x00   0 .
+000004 00 .  PSW= 0x00 CY=0 AC=0 OV=0 P=0
+   000174 12 0d b8 LCALL 0db8
+> n
+000000 00 04 00 00 00 00 00 00 ........
+000000 00 .  ACC= 0x00   0 .  B= 0x00   DPTR= 0x0167 @DPTR= 0x00   0 .
+000004 00 .  PSW= 0x00 CY=0 AC=0 OV=0 P=0
+   000177 0f       INC   R7
+>
+ +
+ + +

pc [address]

 + +Using this command without any parameter it simply dumps out +instruction pointed by the PC. Specify address if you want to set the +PC. + +
+$ s51
+S51 0.1.5, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+S51 comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> pc
+ * 000000 ff       MOV   R7,A
+> pc 123
+ * 00007b ff       MOV   R7,A
+> sopt debug t  
+> pc 32
+Warning: maybe not instruction at 000020
+ * 000020 ff       MOV   R7,A
+>
+ +
+ + + + + + diff --git a/sim/ucsim/doc/cmd_general.html b/sim/ucsim/doc/cmd_general.html new file mode 100644 index 0000000..fd0adf9 --- /dev/null +++ b/sim/ucsim/doc/cmd_general.html @@ -0,0 +1,1090 @@ + + +General commands of µCsim + + + + +

General commands of µCsim

+ + +

conf

 + +Conf command can be used to display different kind of information +about µCsim. It can be followed by a subcommand: + +

conf +
conf objects + +

+ +

conf

 + +This command (without a subcommand) prints out configuration of the +simulator: + +
+0> conf
+ucsim version 0.5.0-pre3
+Type of microcontroller: 51 CMOS
+Controller has 9 hardware element(s).
+  timer0[0]
+  timer1[1]
+  uart[0]
+  port[0]
+  port[1]
+  port[2]
+  port[3]
+  irq[0]
+  _51_dummy[0]
+0>
+
+ +First line contains version number of the program. Second line informs +about type of the simulated microcontroller. Third line prints out how +many hardware elements are simulated. + +

conf objects

 + +This command is for development only. + +
+ +
+ + +

?,help [command]

 + +Help command. It prints out short description of the commands. + +

If a command name is given as parameter then µCsim prints out all +command that has similar names: + +

+0> ? s
+show subcommand    Generic command for showing things about the uCsim
+set subcommand     Set, see `set' command for more help
+stop               Stop
+step               Step
+state              State of microcontroller
+statistic [mem [startaddr [endaddr]]]
+                   Statistic of memory accesses
+0> ? s o
+show option [name] Show internal data of options
+set option name|nr value
+                   Set value of an option
+0> 
+
+ +Some commands have more than one name which can produce interesting +result: + +
+0> ? t r
+timer delete id    Delete a timer
+timer start id     Start a timer
+0> 
+
+ +It looks that names of listed subcommands start with no "r" but take a +closer look on that commands: + +
+0> ? t d
+timer delete id    Delete a timer
+Names of command: delete remove
+long help of timer delete
+0> ? t start
+timer start id     Start a timer
+Names of command: run start
+long help of timer run
+0>
+ +

If parameter is unique name of a command then long description of +the command is printed out. + +

+ + +

quit

 + +Quit. This command terminates actual console, it does not ask you to +confirm your intention. Simulator always reads commands from a file so +end of file condition finishes too. If command console is on standard +input/output, pressing the CTRL-D will quit just like the quit +command. + +

Note that if -Z option was used at +invokation then the quit command does not terminate the simulator +program. In this case kill command can be used to +terminate the simulator. See for more information about using multiple consoles. + +

$ s51
+ucsim 0.2.24, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> q
+$
+ +
+ + +

kill

 + +This kommand terminates the simulator. It does not ask for +confirmation. It doesn't matter how many consoles are used and what +commands are running on them. + +
+ + +

exec file

 + +Reads commands from "file" and executes them. This command opens a new +console (which will use same in/out file as the actual one) to execute +the file. This means the "quit" command in the file will not exit the +simulator: + +
+drdani@emma:~$ cat /tmp/x
+get opt
+quit
+conf
+drdani@emma:~$ s51
+uCsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+uCsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+0> exec "/tmp/x"
+1> get opt
+ 0. config_file(by application) is hidden!
+ 1. console_on(by application) is hidden!
+ 2. cpu_type(by application) is hidden!
+ 3. debug(by console1): FALSE - Debug messages to console1
+ 4. debug(by console0): FALSE - Debug messages to console0
+ 5. debug(by application): FALSE - Print debug messages (-V)
+ 6. irq_stop(by mcs51_controller): FALSE - Stop when IRQ accepted
+ 7. null_prompt(by application): FALSE - Use \0 as prompt (-P)
+ 8. prompt(by console1): "" - Prompt string of console1
+ 9. prompt(by console0): "" - Prompt string of console0
+10. prompt(by application): (null) - String of prompt (-p)
+11. serial_in_file(by application) is hidden!
+12. serial_out_file(by application) is hidden!
+13. xtal(by application): 11059200.000 - Frequency of XTAL in Hz
+1> quit
+0> 
+
+ +
+ + +

expression expr

 + +Executes "expr" as an expression. For more about expressions, see command syntax. + +
+0> expr 1 + 2
+3
+0> expr xram[256*dph+dpl]= &sp
+129
+0> 
+
+ + +
+ + +

show

 + +Show command can be used to display different kind of information. It +must be followed by a subcommand. Subcommands are: + +

show copying +
show warranty +
show option +
show error + +

+ +

show copying

 + +This command can be used to list licensing information. It is first 10 +point of the version 2 of GNU Genral Public License. If you do not +accept GPL simply do not use the program. + +
+ +

show warranty

 + +This command prints out last 2 point of the license ("NO WARRANTY" +message). + +
+ +

show option

 + +This command is for development only. + +
+ +

show error

 + +Errors or warnings are events which can happen in the simulated system +during simulation. Report of that events can be turned on or off using +set error command. Errors are +organized in parent-child relationship. Childs are listed under the +parent: + +
+0> sh er
+Error: non-classified [on/ON]
+  Error: memory [on/ON]
+    Error: invalid_address [unset/ON]
+    Error: non_decoded [unset/ON]
+  Error: stack [off/OFF]
+    Error: stack_tracker [unset/OFF]
+      Error: stack_tracker_wrong_handle [unset/OFF]
+      Error: operation_on_empty_stack [unset/OFF]
+      Warning: stack_operation_unmatched_to_top_of_stack [unset/OFF]
+      Warning: stack_looks_corrupted [unset/OFF]
+0>
+ +First element is the type (Error or Warning). Error stops the +simulation. Warning is just reported and simulation goes on. Next +element is the name of the error. Last element shows actual value and +state. Value can be: + +
on
state is ON + +
off
state is OFF + +
unset
state is inherited from the parent. +
+ +If state is ON and the event happens, it is reported. If state +is OFF then the event is silently ignored. + +
+
+ + +

get

 + +This command can be used to get value of various kind of things. It +requires a subcommand to specify what is going to be set. Known +subcommands are: + +

get sfr +
get option + + +

+ +

get sfr address...

 + +This command can be used to check values of SFR location(s) if SFR +exists in simulated memory. Note that dump memory or ds can be used as well. + +

Parameters are interpreted as SFR names or addresses and values of +addressed locations are dumped out. + +

+$ s51 
+ucsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+0> get sfr pcon p1 0 0x80 kahd scon 256
+0x87 00 .
+0x90 ff .
+Warning: Invalid address 0
+0x80 ff .
+Warning: Invalid address kahd
+0x98 00 .
+Warning: Invalid address 256
+0>
+ +
+ + +

get option [name]

 + +Get actual value of option(s). Some options can be set by set option to modify behavior of the +simulator. Using get option you can get actual value of these +options. If you use this command without parameter you get list of all +options known by the program. In this way you can figure out which +options can be used. + +
+$ s51 -V
+ucsim 0.5.0, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+0> get opt
+ 3. debug(by console0): FALSE - Debug messages to console0
+ 4. debug(by application): FALSE - Print debug messages (-V)
+ 5. irq_stop(by mcs51_controller): FALSE - Stop when IRQ accepted
+ 6. null_prompt(by application): FALSE - Use \0 as prompt (-P)
+ 7. prompt(by console0): "" - Prompt string of console0
+ 8. prompt(by application): (null) - String of prompt (-p)
+11. xtal(by application): 11059200.000 - Frequency of XTAL in Hz
+0> 
+
+ +First element of the list is the number of the option. It is followed +by name of the option (debug, irq_stop, etc.). Number or +the name can be used to identify the option in +get option and set option +command. Next element shows which part of the simulator created the +option. + +

Next element of the list is the value of the option. It can be an +integer or a floating point number, a string or a boolean value. + +

Last part describes the option. + +

Some options can have same name. An example is the debug +option. One is created by the application to store value given by -V +(see invokation). This will be used as +default value when a new instance of a console is created: + +

+$ cat /tmp/x
+get opt debug
+$ s51
+uCsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+uCsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+0> get opt debug
+ 3. debug(by console0): FALSE - Debug messages to console0
+ 4. debug(by application): FALSE - Print debug messages (-V)
+0> set opt 4 1
+0> get opt debug
+ 3. debug(by console0): FALSE - Debug messages to console0
+ 4. debug(by application): TRUE - Print debug messages (-V)
+0> exec "/tmp/x"
+1> get opt debug
+ 3. debug(by console1): TRUE - Debug messages to console1
+ 4. debug(by console0): FALSE - Debug messages to console0
+ 5. debug(by application): TRUE - Print debug messages (-V)
+1> 
+0> 
+
+ +
+ +
+ + +

set

 + +This command can be used to set various kind of things. It requires a +subcommand to specify what is going to be set. Known subcommands are: + +

set option +
set error +
set memory +
set bit +
set hardware + + +

+ +

set option name|nr value

 + +

Set option value. Options described at (get option) command can be set using +this command. First parameter must be an option name or number and +second the new value. Interpretation of the value depends on type of +the option. Value for a boolean type of option interpreted as follows: +if first character of the value is one of 1, t, +T, y, Y then value will be TRUE otherwise +it will be FALSE. + +

+$ s51 -V
+uCsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+uCsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> get opt
+ 0. config_file(by application) is hidden!
+ 1. console_on(by application) is hidden!
+ 2. cpu_type(by application) is hidden!
+ 3. debug(by console0): TRUE - Debug messages to console0
+ 4. debug(by application): TRUE - Print debug messages (-V)
+ 5. irq_stop(by mcs51_controller): FALSE - Stop when IRQ accepted
+ 6. null_prompt(by application): FALSE - Use \0 as prompt (-P)
+ 7. prompt(by console0): "" - Prompt string of console0
+ 8. prompt(by application): (null) - String of prompt (-p)
+ 9. serial_in_file(by application) is hidden!
+10. serial_out_file(by application) is hidden!
+11. xtal(by application): 11059200.000 - Frequency of XTAL in Hz
+> set opt debug f
+Ambiguous option name, use number instead
+> set opt 3 f
+> get opt debug
+ 3. debug(by console0): FALSE - Debug messages to console0
+ 4. debug(by application): TRUE - Print debug messages (-V)
+>
+ +
+ + +

set error error_name +on|off|unset

 + +This command can be used to set if an error event should be reported +or not. Actual settings can be retrieved by show +error command. + +
+ + +

set memory memory_type address +data...

 + +This command can be used to modify content of any simulated +memory. First parameter must be a class name to specify type of +memory. Class names can de checked by info memory command. Chips and +address spaces can be used as well. + +

Second parameter specifies start address of the modification. + +

Remaining parameters will be written into the memory starting at +address specified by second parameter. Data list can include numbers +as well as strings. See syntax for more +details. + +

Modified memory locations will be dumped out. + +

+0> set mem xram 1 "ab\tcd\0ef\012ghq" 2 "ABC"
+0x0001 61 62 09 63 64 00 65 66 ab.cd.ef
+0x0009 0a 67 68 71 02 41 42 43 .ghq.ABC
+0> set mem sfr pcon 0x34
+0x87 34                      4
+0> set mem xram_chip 1 2
+0x0001 02                      .
+0>
+ +
+ + +

set bit address 0|1

 + +Set one bit to 0 or 1. First parameter specifies the bit. It can be +the address of the bit (number or syqmbolic name) or it can be +specified in address.bitnumber format where +address addresses SFR area and bitnumber is number of +bit in specified SFR location. Using this syntax any SFR (and 8051's +internal RAM) location can be modified it need not be really bit +addressable. + +

Second parameter interpreted as 1 if it is not zero. + +

Modified memory location is dumped out. + +

+$ s51 
+ucsim 0.2.38-pre2, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> set bit tf1 1
+0x88 80 .
+> set bit 130 0
+0x80 fb .
+> set bit pcon.2 1
+0x87 04 .
+> set bit 10.7 1
+0x0a 80 .
+> 
+
+ +
+ + +

set hardware hardware_id data

 + +This command can be used to set value into a hardware element of the +controller (conf command lists them). + +

Actually only port element of MCS51 accepts this method. It +can be used to set value of external circuits which +connected to ports of simulated controller. First parameter specifies +port element (as an array), second is the new value. + +

+0> conf
+Type of microcontroller: 51 CMOS
+Controller has 9 hardware element(s).
+  timer0[0]
+  timer1[1]
+  uart[0]
+  port[0]
+  port[1]
+  port[2]
+  port[3]
+  irq[0]
+  _51_dummy[0]
+0> set hw port[0] 12
+0> i h po[0]
+port[0]
+P0    11111111 0xff 255 . (Value in SFR register)
+Pin0  00001100 0x0c  12 . (Output of outside circuits)
+Port0 00001100 0x0c  12 . (Value on the port pins)
+0> set hw port[0] 23
+0> i h po[0]
+port[0]
+P0    11111111 0xff 255 . (Value in SFR register)
+Pin0  00010111 0x17  23 . (Output of outside circuits)
+Port0 00010111 0x17  23 . (Value on the port pins)
+0> set hw irq[0] 12
+Nothing to do
+0> 
+
+ +
+ +
+ + +

state

 + +State of the simulator and the simulated microcontroller: + +
+> state
+CPU state= OK PC= 0x004349 XTAL= 1.10592e+07
+Total time since last reset= 0.614873 sec (6800004 clks)
+Time in isr = 0.0144227 sec (159504 clks) 2.3%
+Time in idle= 0 sec (0 clks)   0%
+Max value of stack pointer= 0x000049, avg= 0x000026
+> 
+
+ +The "CPU state" in the first line is an internal information. PC is +value of the program counter. First line shows XTAL frequency too. + +

Following lines contain information about simulated time. First, +full simulated time (elapsed from last reset) is printed out in +seconds and number of clock periods then same data is printed out +about time spent in interrupt service routines as well as in idle +mode. Last data in lines of ISR and IDLE time shows ratio of ISRs, +Idle times and main program. + +

Last line infroms about maximum value of the stack pointer and a +"not very well" calculated average value of it. + +

+ + +

reset

 + +Reset command. It resets the microcontroller. It has same effect as +active signal on the RST pin. + +
+$ s51 -V remoansi.hex
+ucsim 0.2.24, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+58659 bytes read from remoansi.hex
+> i r
+000000 00 00 00 00 00 00 00 00 ........
+000000 00 .  ACC= 0x00   0 .  B= 0x00   DPTR= 0x0000 @DPTR= 0x00   0 .
+000000 00 .  PSW= 0x00 CY=0 AC=0 OV=0 P=0
+   000000 02 01 60 LJMP  0160
+> s
+000000 00 00 00 00 00 00 00 00 ........
+000000 00 .  ACC= 0x00   0 .  B= 0x00   DPTR= 0x0000 @DPTR= 0x00   0 .
+000000 00 .  PSW= 0x00 CY=0 AC=0 OV=0 P=0
+   000160 c2 90    CLR   P1.0
+> s
+000000 00 00 00 00 00 00 00 00 ........
+000000 00 .  ACC= 0x00   0 .  B= 0x00   DPTR= 0x0000 @DPTR= 0x00   0 .
+000000 00 .  PSW= 0x00 CY=0 AC=0 OV=0 P=0
+   000162 c2 97    CLR   P1.7
+> res
+> i r
+000000 00 00 00 00 00 00 00 00 ........
+000000 00 .  ACC= 0x00   0 .  B= 0x00   DPTR= 0x0000 @DPTR= 0x00   0 .
+000000 00 .  PSW= 0x00 CY=0 AC=0 OV=0 P=0
+   000000 02 01 60 LJMP  0160
+>
+ +
+ + +

info

 + +This command prints out information about different things which must +be specified as paramater to the command. Following subcommands are +known: + +

info breakpoints +
info registers +
info hardware +
info stack +
info memory + +

+ +

info breakpoints

 + +This subcommand prints out information about breakpoints: + +
+0> b 12
+Breakpoint 1 at 0x00000c: MOV   R7,A
+0> tb 43
+Breakpoint 2 at 0x00002b: MOV   R7,A
+0> b sfr w 0x80
+0> i b
+Num Type       Disp Hit   Cnt   Address  What
+1   fetch      keep 1     1     0x00000c MOV   R7,A
+2   fetch      del  1     1     0x00002b MOV   R7,A
+3   event      keep 1     1     0x000080 write
+0> 
+
+ +As you see above, the command can be shortened to "i b". The list of +breakpoints contains 7 columns: + +
Num
Number of the breakpoint. + +
Type
This column shows type of the breakpoint. It can +be fetch for normal breakpoints or event for event +breakpoints. First the normal breakpoints are listed and then the +event breakpoints. + +
Disp
This shows if the breakpoint is temporary +(del) or not (keep). + +
Hit
How many times the breakpoint must be hit before it +really stops the program. + +
Cnt
Counter of breakpint hits. This counter decrements +and the breakpoint is activated if it reaches zero. + +
Address
Address where the breakpoint is set. + +
What
For normal breakpoints this field contains +disassembled instruction where the breakpoint is set. For event +breakpoints it contains type of event. + +
+ +
+ + +

info registers

 + +This subcommand prints out full register set of the CPU. Output of +this command depends of type of CPU. + +
Registers of MCS51 family
+ +
+$ s51 remoansi.hex 
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+58659 bytes read from remoansi.hex
+> sopt stopit 1
+> g
+5
+ * 000023 02 01 1c LJMP  011c
+> i r
+000000 18 02 16 ba 00 02 00 0a ........
+000018 4a J  ACC= 0x0a  10 .  B= 0x00   DPTR= 0x16ba @DPTR= 0x00   0 .
+000002 16 .  PSW= 0x00 CY=0 AC=0 OV=0 P=0
+ * 000023 02 01 1c LJMP  011c
+>
+ +In first line the actual register bank is dumped out. Register banks +reside in internal RAM, address at the begining of the line shows +start address of actual register bank selected by RS0 and RS1 bits of +PSW register. + +

Next two lines begin with value of indirectly addressed internal +RAM cells. Second line shows IRAM cell pointed by R0 while third line +shows IRAM addressed by R1. + +

Second line displays some important registers. First one is the +accumulator. Its value dumped out in hexadecimal, decimal form and +then the ASCII character of its value. It is followed by value of the +B register which is dumped out in hexadecimal form only. Next is DPTR +register in hexadecimal and then external RAM cell which is addressed +by DPTR. This is dumped out in hexadecimal, decimal and ASCII too. + +

In third line you find program status word in hexadecimal and then +some flag bits of PSW register. Last line is disassembled instruction +at PC. + +

Registers of AVR family
+ +
+$ savr test_arith.hex
+ucsim 0.2.37, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> 83 words read from test_arith.hex
+83 words read from test_arith.hex
+> run
+
+Stop at 0x000047: (105) User stopped
+F 0x000047
+> i r
+000000 00 2c 21 23 20 35 19 14 03 00 00 00 00 00 00 00 .,!# 5..........
+000010 00 01 1e 89 01 00 10 e2 14 00 01 10 00 00 00 00 ................
+ITHSVNZC  SREG= 0x03   3 .
+00000011  SP  = 0x000000
+X= 0x1001 [X]= 0x00   0 .  Y= 0x0000 [Y]= 0x00   0 .  Z= 0x0000 [Z]= 0x00   0 .
+ * 000047 940c 0047 jmp   0x000047
+> 
+
+ +First two lines show first 32 bytes of internal RAM which is the +register set of AVR controllers. + +

At the beginning of next two lines bits of status register are +printed. These lines present hexadecimal, decimal and ASCII values of +the status register too, and value of the stack pointer. + +

Following line shows indirect addressing registers X, Y, and Z as +well as pointed memory values. + +

Last line is disassembled instruction at PC. + +

Registers of Z80 family
+ +
+$ sz80
+uCsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+uCsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+0> i r
+SZ-A--P-C  Flags= 0x00   0 .  A= 0x00   0 .
+00-0--0-0
+BC= 0x0000 [BC]= 00   0 .  DE= 0x0000 [DE]= 00   0 .  HL= 0x0000 [HL]= 00   0 .
+IX= 0x0000 [IX]= 00   0 .  IY= 0x0000 [IY]= 00   0 .  SP= 0x0000 [SP]= 00   0 .
+ ? 0x0000 00          NOP
+0> 
+
+ +
Registers of XA family
+ +
+$ sxa
+uCsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+uCsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+The XA Simulator is in development, UNSTABLE, DEVELOPERS ONLY!
+0> i r
+CA---VNZ | R0:0100 R1:0302 R2:0504 R3:0706
+00---000 | R4:0908 R5:0b0a R6:0d0c SP:0100 ES:0000  DS:0000
+ ? 0x0302 02 03             ADD   R0l,[R3]
+0> 
+
+ +
Registers of HC08 family
+ +
+$ shc08
+uCsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+uCsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+0> i r
+V--HINZC  Flags= 0x60  96 `  A= 0x00   0 .
+0--00000      H= 0x00   0 .  X= 0x00   0 .
+SP= 0x00ff [SP+1]= 00   0 .
+ ? 0x0000 00 01 02    brset #0,*0x01,0x0005
+0> 
+
+ +
+ + +

info hardware|hw identifier

 + +This subcommand prints out information about a unit of the +controller. identifier specifies hardware element. One form of +it is a name. Names of hardware elements can be checked by conf command. This form is accepted only when name is +unique. If more than one element exists with the same name then name +must be followed by id number in squere brackets in same form as it is +listed by conf command. + +

Ouput format of this command depends on CPU family and type of the +CPU too because requested unit can be different in different type of +controller even in the same CPU family. + +

+$ s51 -t 51
+ucsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+0> conf
+ucsim version 0.5.0-pre3
+Type of microcontroller: 51 CMOS
+Controller has 8 hardware element(s).
+  timer0[0]
+  timer1[1]
+  uart[0]
+  port[0]
+  port[1]
+  port[2]
+  port[3]
+  irq[0]
+  _51_dummy[0]
+0> i h port[2]
+port[2]
+P2    11111111 0xff 255 . (Value in SFR register)
+Pin2  11111111 0xff 255 . (Output of outside circuits)
+Port2 11111111 0xff 255 . (Value on the port pins)
+0> i h t[0]
+timer0[0] 0x0000 13 bit timer OFF irq=0 dis prio=0
+0> i h u
+uart[0] Shift, fixed clock MultiProc=none irq=dis prio=0
+Receiver OFF RB8=0 irq=0
+Transmitter TB8=0 irq=0
+0> 
+
+ +Timer #2 differs a little bit from other timers of MCS51: + +
+$ s51 -t 52
+ucsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+0> i h timer0
+timer0[0] 0x0000 13 bit timer OFF irq=0 dis prio=0
+0> i h t[2]
+timer2[2] 0x0000 reload 0x0000 timer OFF irq=0 dis prio=0
+0> 
+
+ +
+ + +

info stack

 + +This command prints out information about data stored in the CPU's +stack and operations which put them there. + +
+$ s51 ~/remo.hex
+uCsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+uCsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+55470 words read from /home/staff/drdani/remo.hex
+0> set opt irq_stop true
+0> r
+Simulation started, PC=0x000000
+Stop at 0x000023: (2) Interrupt
+F 0x000023
+0> i s
+OP   SP before-after   L DATA/ADDR   INSTRUCTION
+call 0x000022-0x000024 2 0x002976    0x022a 12 29 76 LCALL 2976
+call 0x000024-0x000026 2 0x002379    0x2976 12 23 79 LCALL 2379
+call 0x000026-0x000028 2 0x003612    0x2517 12 36 12 LCALL 3612
+intr 0x000028-0x00002a 2 0x000023    0x366f 20 0c 02 JB    21.4,3674
+0> 
+
+ +First column shows the operation which can be call or +push or intr (interrupt call). Next column contains +value of the SP register before and after the operation. Column "L" +shows size of the data, and the next column the data itself. Note, +that for call operations (call, and intr) the called address is +printed, not the pushed one! Last column is the instruction which has +been executed when the operation occured. + +
+ + +

info memory

 + +This command shows information about memory +system: chips, address spaces and address decoders. + +
+$ s51
+uCsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+uCsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+0> i m
+Memory chips:
+  0x000000-0x010000    65536 rom_chip (8,%02x,0x%04x)
+  0x000000-0x000080      128 iram_chip (8,%02x,0x%02x)
+  0x000000-0x010000    65536 xram_chip (8,%02x,0x%04x)
+  0x000000-0x000080      128 sfr_chip (8,%02x,0x%02x)
+Address spaces:
+  0x000000-0x010000    65536 rom (8,%02x,0x%04x)
+  0x000000-0x000080      128 iram (8,%02x,0x%02x)
+  0x000080-0x000080      128 sfr (8,%02x,0x%02x)
+  0x000000-0x010000    65536 xram (8,%02x,0x%04x)
+Address decoders:
+ 0 rom 0x0000 0xffff -> rom_chip 0x0000 activated
+ 0 iram 0x00 0x7f -> iram_chip 0x00 activated
+ 0 sfr 0x80 0xff -> sfr_chip 0x00 activated
+ 0 xram 0x0000 0xffff -> xram_chip 0x0000 activated
+0> 
+
+ +First column shows address ranges, next one is the size followed by +the name of the memory. This name can be used in other commands (such +as dump, set +memory, etc.). Last column shows some technical information +(width in bits, format specifier to print out content and address). + +

Address decoders are associated with address spaces. Each address +space has a list of decoders. First column of the address decoder +information is the number of the decoder. Next three columns specifies +name and area of the address space which is handled by the +decoder. After "->" sign the name and the address of the memory +chip is printed where the decoder maps the area of the address space. + +

Memory system of other controller family can be different. + +

+$ savr
+uCsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+uCsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+0> i m
+Memory chips:
+  0x000000-0x00ffff    65536 rom_chip (16,%04x,0x%04x)
+  0x000000-0x00007f      128 iram_chip (8,%02x,0x%02x)
+Address spaces:
+  0x000000-0x00ffff    65536 rom (16,%04x,0x%04x)
+  0x000000-0x00ffff    65536 iram (8,%02x,0x%04x)
+Address decoders:
+ 0 rom 0x0000 0xffff -> rom_chip 0x0000 activated
+ 0 iram 0x0000 0x007f -> iram_chip 0x00 activated
+0> 
+
+ +
+ +
+ + +

timer

 + +Handling of timers. Don't be confused! This command doesn't handle +timer element of the controller. It manages "clock counters" which can +be used to profile applications. + +

Known subcommands are: + +

timer add +
timer delete +
timer get +
timer start +
timer stop +
timer set + +

Each subcommand can (some must) be followed by a timer id which can be +a number or a string. Timers are numbered from 1. You can use any +number greater than 0 to identify a timer. Or you can use a simbolic +name, in this case simulator uses the first unused number to allocate +a new timer. + +

+ +

timer add|create|make id [direction +[in_isr]]

 + +To create a new timer. New timers are turned ON by default and +initialized to value 0. Direction is an integer (can be +positive or negative) number which is added to the actual value in +every step. If in_isr is TRUE the timer counts only when +execution is in an interrupt handler. + +
+ + +

timer delete|remove id

 + +To remove a timer if you don't need it any more. + +
+ + +

timer get [id]

 + +To get value of timers. If you don't use timer id in this command +simulator prints out value of all timers including predefined +ones. See example below. + +
+ + +

timer start|run id

 + +To turn a timer ON. + +
+ + +

timer stop id

 + +To turn a timer OFF. It still exist but doesn't count xtal periods. + +
+ + +

timer set|value id value

 + +To set value of the timer (number of xtal periods). value is +the new value. + + +
+0> tim a 3
+0> tim g
+timer #0("time") ON: 0.463255 sec (5123232 clks)
+timer #0("isr") ON: 0.0051888 sec (57384 clks)
+timer #0("idle") ON,ISR: 0 sec (0 clks)
+timer #3("unnamed") ON: 0 sec (0 clks)
+0> tim a "a"
+0> tim g
+timer #0("time") ON: 0.463255 sec (5123232 clks)
+timer #0("isr") ON: 0.0051888 sec (57384 clks)
+timer #0("idle") ON,ISR: 0 sec (0 clks)
+timer #1("a") ON: 0 sec (0 clks)
+timer #3("unnamed") ON: 0 sec (0 clks)
+0> 
+
+ +
+ +
+ + + + diff --git a/sim/ucsim/doc/cmd_memory.html b/sim/ucsim/doc/cmd_memory.html new file mode 100644 index 0000000..f06abb5 --- /dev/null +++ b/sim/ucsim/doc/cmd_memory.html @@ -0,0 +1,284 @@ + + +Memory manipulation commands of µCsim + + + + +

Memory manipulation commands of µCsim

+ +Every command which changes content of ROM area such as dl or set +memory deletes result of code +analyzer and causes to re-analyze the code. + +
+ + +

file,load "FILE"

 + +Loads file named FILE into the simulated code memory. File must +contain data in Intel HEX format. + +
+> file "../../remo.hex"
+55470 words read from ../../remo.hex
+> 
+
+ +Don't forget to enclose file name in quotes to make the parameter to +be a string. + +
+ + +

download,dl

 + +Download command. It is same as load above but it +reads information from command console which is standard input by +default. This command stops read records when it detects an "END" +record which is normaly the last record. This command has two +equivalent forms download and dl. + +
+$ s51 -V
+ucsim 0.2.24, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> do
+:03000000020003F8
+:1000030075812078207600D8FC900000AE83AF8203
+:100013009000001200416005E4F0A380F690009F79
+:1000230012004A9000A312004A9000A712006890A1
+:1000330000AD12006875D0001200B50200B3EF6581
+:10004300827003EE658322E493F8740193F97402DA
+:1000530093FE740393F5828E83E869700122E4931F
+:10006300F6A30880F4E493FC740193FD740293FEF9
+:10007300740393FF740493F8740593F582888312D1
+:100083000041700122E493A3A883A9828C838D820B
+:10009300F0A3AC83AD828883898280E3212100B5FC
+:1000A300212100B5000000B500B5000000B500B582
+:0200B30080FECD
+:1000B5007520117501AA850120750102850120228F
+:00000001FF
+197 bytes loaded
+>
+ +
+ + +

fill memory_type start end data

 + +Fill memory region with specified data. First parameter specifies +memory. Name of the memory must be used, it can be checked using info memory command which +lists size and name of all available memories. + +

start and end parameters specify first and last +address of the memory region to be filled. + +

data parameter specifies the data which is used to fill the +memory region. + +

+$ s51 
+ucsim 0.2.38-pre2, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> fill xram 12 0x12 0x56
+> dump xram 0 0x20
+0x0000 00 00 00 00 00 00 00 00 ........
+0x0008 00 00 00 00 56 56 56 56 ....VVVV
+0x0010 56 56 56 00 00 00 00 00 VVV.....
+0x0018 00 00 00 00 00 00 00 00 ........
+0x0020 00                      .
+>
+ + +
+ + +

where,Where memory_type data...

 + +Searching for some data in memory. First parameter specifies +memory. Name of the memory must be used, it can be checked using info memory command which +lists size and name of all available memories. + +

Other parameters can be mixed list of strings (characters between " +and ") and numbers. Strings can contain escape sequencies. µCsim +merges all parameters together and will search for megred list of +values in specified memory. + +

where command do case unsensitive search while Where +command is for case sensitive search. + +

Search is done in whole memory and all matches are dumped out. + +

+$ /s51
+ucsim 0.2.38-pre2, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> set mem xram 20 "Dani d ani D ani dani Dani"
+0x0014 44 61 6e 69 20 64 20 61 Dani d a
+0x001c 6e 69 20 44 20 61 6e 69 ni D ani
+0x0024 20 64 61 6e 69 20 44 61  dani Da
+0x002c 6e 69                   ni
+> where xram "dani"
+0x0014 44 61 6e 69             Dani
+0x0025 64 61 6e 69             dani
+0x002a 44 61 6e 69             Dani
+> Where xram "d ani"
+0x0019 64 20 61 6e 69          d ani
+>
+ +
+ + +

memory

 + +This set of commands can be used to manipulate memory system including chips, address spaces and address decoders. + +

Subcommands are: + +

memory createchip +
memory createaddressspace +
memory createaddressdecoder + + +

+ +

memory createchip|cchip id size +cellsize

 + +This command creates a chip (array of storage elements). id +must be a unique name which will be used to identify the chip in other +commands. size is number of storage elements, cellsize +is number of bits stored in one element. + +
+ + +

memory +createaddressspace|caddressspace|caddrspace|caspace|createaddrspace|createaspace +id startaddr size

 + +This command should never be used. It defines an adress space, names +it as id sets its starting address and size. Simulator programs +(s51, savr, etc.) define necessary address spaces for +themself, so this command is not needed. + +
+ + +

memory +createaddressdecoder|caddrdecoder|caddressdecoder|cadecoder|createaddrdecoder|createadecoder +addressspace begin end chip begin

 + +Address decoder maps a part of the address space to a chip +area. addressspace parameter is name of the address space, +begin and end specify address range of the address space +to be mapped. chip parameter is name of the memory chip and +the second begin parameter is the (start of the) chip address +where the area is mapped to. + +

Address space will be split if a "middle" are is mapped: + +

+$ s51
+uCsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+uCsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+0> i m
+Memory chips:
+  0x000000-0x00ffff    65536 rom_chip (8,%02x,0x%04x)
+  0x000000-0x00007f      128 iram_chip (8,%02x,0x%02x)
+  0x000000-0x00ffff    65536 xram_chip (8,%02x,0x%04x)
+  0x000000-0x00007f      128 sfr_chip (8,%02x,0x%02x)
+Address spaces:
+  0x000000-0x00ffff    65536 rom (8,%02x,0x%04x)
+  0x000000-0x00007f      128 iram (8,%02x,0x%02x)
+  0x000080-0x0000ff      128 sfr (8,%02x,0x%02x)
+  0x000000-0x00ffff    65536 xram (8,%02x,0x%04x)
+Address decoders:
+ 0 rom 0x0000 0xffff -> rom_chip 0x0000 activated
+ 0 iram 0x00 0x7f -> iram_chip 0x00 activated
+ 0 sfr 0x80 0xff -> sfr_chip 0x00 activated
+ 0 xram 0x0000 0xffff -> xram_chip 0x0000 activated
+0> mem cchip myram 0x1000 8
+0> mem createaddressdecoder xram 1234 2000 myram 15
+0> i m
+Memory chips:
+  0x000000-0x00ffff    65536 rom_chip (8,%02x,0x%04x)
+  0x000000-0x00007f      128 iram_chip (8,%02x,0x%02x)
+  0x000000-0x00ffff    65536 xram_chip (8,%02x,0x%04x)
+  0x000000-0x00007f      128 sfr_chip (8,%02x,0x%02x)
+  0x000000-0x000fff     4096 myram (8,%02x,0x%03x)
+Address spaces:
+  0x000000-0x00ffff    65536 rom (8,%02x,0x%04x)
+  0x000000-0x00007f      128 iram (8,%02x,0x%02x)
+  0x000080-0x0000ff      128 sfr (8,%02x,0x%02x)
+  0x000000-0x00ffff    65536 xram (8,%02x,0x%04x)
+Address decoders:
+ 0 rom 0x0000 0xffff -> rom_chip 0x0000 activated
+ 0 iram 0x00 0x7f -> iram_chip 0x00 activated
+ 0 sfr 0x80 0xff -> sfr_chip 0x00 activated
+ 0 xram 0x0000 0x04d1 -> xram_chip 0x0000 activated
+ 1 xram 0x04d2 0x07d0 -> myram 0x00f activated
+ 2 xram 0x07d1 0xffff -> xram_chip 0x07d1 activated
+0> 
+
+ +It is easy to share chip area between address spaces: + +
+$ s51
+uCsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+uCsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+0> mem createaddressdecoder rom 0 0xfff xram_chip 0xf000
+0> i m
+Memory chips:
+  0x000000-0x00ffff    65536 rom_chip (8,%02x,0x%04x)
+  0x000000-0x00007f      128 iram_chip (8,%02x,0x%02x)
+  0x000000-0x00ffff    65536 xram_chip (8,%02x,0x%04x)
+  0x000000-0x00007f      128 sfr_chip (8,%02x,0x%02x)
+Address spaces:
+  0x000000-0x00ffff    65536 rom (8,%02x,0x%04x)
+  0x000000-0x00007f      128 iram (8,%02x,0x%02x)
+  0x000080-0x0000ff      128 sfr (8,%02x,0x%02x)
+  0x000000-0x00ffff    65536 xram (8,%02x,0x%04x)
+Address decoders:
+ 0 rom 0x0000 0x0fff -> xram_chip 0xf000 activated
+ 1 rom 0x1000 0xffff -> rom_chip 0x1000 activated
+ 0 iram 0x00 0x7f -> iram_chip 0x00 activated
+ 0 sfr 0x80 0xff -> sfr_chip 0x00 activated
+ 0 xram 0x0000 0xffff -> xram_chip 0x0000 activated
+0> rom[0]=0xab
+171
+0> xram[0xf000]
+171
+0> 
+
+ + +
+ + +
+ +
+ + + + diff --git a/sim/ucsim/doc/cmd_removed.html b/sim/ucsim/doc/cmd_removed.html new file mode 100644 index 0000000..b4130b7 --- /dev/null +++ b/sim/ucsim/doc/cmd_removed.html @@ -0,0 +1,688 @@ + + +Removed commands of µCsim + + + + +

Removed commands of µCsim

+ + + + +

bse wi|ri|wx|rx|ws|rs|rc f|d addr [hit]

 + +Removed 0.2.38, use break or tbreak instead!! + +

Set event breakpoint. First parameter specifies type of event. See general description of event breakpoints above +about meaning of event identifiers. Second parameter specify if the +breakpoint will be fix (f) or dynamic (d). Third +parameter specifies address. Remember that this is not an instruction +address, it is address of the memory cell where specified event should +occur. + +

Forth parameter is optional and it specifies the hit number. It is +1 by default. + +

+$ s51 remoansi.hex
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+58659 bytes read from remoansi.hex
+> dis
+   00d47e 22       RET
+   000000 02 01 60 LJMP  0160
+   000160 c2 90    CLR   P1.0
+   000162 c2 97    CLR   P1.7
+   000164 d2 b5    SETB  P3.5
+   000166 d2 b4    SETB  P3.4
+   000168 75 81 22 MOV   SP,#22
+   00016b 75 d0 00 MOV   PSW,#00
+   00016e 7e 00    MOV   R6,#00
+   000170 7f 00    MOV   R7,#00
+   000172 79 04    MOV   R1,#04
+   000174 12 0d b8 LCALL 0db8
+   000177 0f       INC   R7
+   000178 d9 fa    DJNZ  R1,0174
+   00017a 75 0b 00 MOV   0b,#00
+   00017d 75 0c 00 MOV   0c,#00
+   000180 02 02 2a LJMP  022a
+   000183 78 22    MOV   R0,#22
+   000185 76 00    MOV   @R0,#00
+   000187 d8 fc    DJNZ  R0,0185
+> bse wi f 6
+> g
+4
+   000170 7f 00    MOV   R7,#00
+>
+ + +

bde wi|ri|wx|rx|ws|rs|rc addr

 + +Removed 0.2.38, use delete instead!! + +

Delete event breakpoint. First parameter must be given to specify type +of event. Second parameter is address of memory cell which the +breakpoint is associated to. Continuing example given above: + +

+> bl
+D 2(2) 000180 02 LJMP  022a
+F 1(1) 000006 wi
+> bde ri 6
+No ri breakpoint at 000006
+> bde wi 6
+> bl
+D 2(2) 000180 02 LJMP  022a
+>
+ + +

ba

 + +Removed 0.2.38, use delete instead!! + +

Delete all breakpoints. This command deletes all fetch as well as +event breakpoints. Be carefull because it does not ask you to confirm +your intention. + +

+> bl
+F 1(1) 000160 c2 CLR   P1.0
+D 2(2) 000180 02 LJMP  022a
+F 1(1) 000006 wi
+> ba
+> bl
+>
+ + +

dp

 + +Removed 0.2.38, use info hardware instead!! + +

Dump out ports. This command shows actual value of ports. + +

+$ s51 remoansi.hex 
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+58659 bytes read from remoansi.hex
+> sopt stopit 1
+> g
+5
+ * 000023 02 01 1c LJMP  011c
+> dp
+P0    11111111 0xff 255 .    P1    11111110 0xfe 254 .
+Pin0  11111111 0xff 255 .    Pin1  11111111 0xff 255 .
+Port0 11111111 0xff 255 .    Port1 11111110 0xfe 254 .
+
+P2    11111111 0xff 255 .    P3    11111111 0xff 255 .
+Pin2  11111111 0xff 255 .    Pin3  11111111 0xff 255 .
+Port2 11111111 0xff 255 .    Port3 11111111 0xff 255 .
+>
+ +First lines on the list (labeled with Px) are value of SFRs which are +internal latch registers. Second lines (labeled with Pinx) are outputs +of external devices connected to port pins of the +microcontroller. These values can be set by you using sp command. Third lines (labeled with Portx) +show actual values can be measured on pins of the device. These values +are calculated with following pseudo formula: + +

Portx= Px AND Pinx + +

All three values are displayed in binary, hexadecimal, decimal form +and then the ASCII character of the value is shown. + + +

ds [addr...]

+ +Removed 0.2.38, use dump instead!! + +Print out SFR. This command can be used to get value of all or some +SFRs. If you do not specify any parameter the ds command simply +dumps out full SFR area 16 bytes per line. + +
+$ s51 remoansi.hex 
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+58659 bytes read from remoansi.hex
+> sopt stopit 1
+> g
+5
+ * 000023 02 01 1c LJMP  011c
+> ds
+000080 ff 2a ba 16 00 00 00 00 55 a1 d7 fe 50 fd 00 00 .*......U...P...
+000090 fe 00 00 00 00 00 00 00 7e 00 00 00 00 00 00 00 ........~.......
+0000a0 ff 00 00 00 00 00 00 00 97 00 00 00 00 00 00 00 ................
+0000b0 ff 00 00 00 00 00 00 00 15 00 00 00 00 00 00 00 ................
+0000c0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0000d0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0000e0 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0000f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+> ds p1 0x87
+    P1 fe 254 .
+000087 00   0 .
+> ds p2 ip scon
+    P2 ff 255 .
+    IP 15  21 .
+  SCON 7e 126 ~
+>
+ +If you specify one or more parameter the ds command prints out +value of registers specified by parameters. Parameter can be an +address or a symbolic name of the register. Note that the simulator +implements a register at all address in the address space which is not +true in real microcontroller where reading of an unimplemented +register gets undefined value. Value of the registers printed out in +hexadecimal, decimal, and ASCII form. + +

Note that different type of controllers can implement different +registers: + +

+$ s51
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> ds rcap2l
+> q
+$ s51 -t 52
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> ds rcap2l
+RCAP2L 00   0 .
+>
+ + +

db addr...

 + +Removed 0.2.38, use dump instead!! + +Dump bits. This command can be used to get value of bits. At least one +parameter must be given. Bit address can be specified in three +forms. First of all name of the bit can be used if it has any. Direct +bit address is accepted too and it can be specified by address of IRAM +or SFR which contains the bit and bit number within the byte separated +by a dot. If the requested bit is in an SFR the address of the +register can be specified by its name. + +
+$ s51
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> db it1 0x20.3 0x43 p2.5
+000088    IT1 0
+000020   20.3 0
+000028   28.3 0
+0000a0   P2.5 1
+>
+ +Value of bits are printed out one per line. The list starts direct +address of the bit followed by bit name or address of the memory cell +or SFR which contains the displayed bit and bit number within the byte +separated by a dot. At last the value of the bit is shown. Displaying +a port bit you get value of SFR latch: + +
+> sp 1 0x0f
+> ss p1 0x55
+000090 55                                              U
+> dp
+P0    11111111 0xff 255 .    P1    01010101 0x55  85 U
+Pin0  11111111 0xff 255 .    Pin1  00001111 0x0f  15 .
+Port0 11111111 0xff 255 .    Port1 00000101 0x05   5 .
+
+P2    11111111 0xff 255 .    P3    11111111 0xff 255 .
+Pin2  11111111 0xff 255 .    Pin3  11111111 0xff 255 .
+Port2 11111111 0xff 255 .    Port3 11111111 0xff 255 .
+> db p1.2 p1.3 p1.4 p1.5 p1.6
+000090   P1.2 1
+000090   P1.3 0
+000090   P1.4 1
+000090   P1.5 0
+000090   P1.6 1
+>
+ + +

g [start [stop]]

 + +Removed 0.2.38, use run instead!! + +

Go, start execution. Parameters are optional. First parameter +specifies start address of the execution. By default execution starts +at address specified by actual value of the PC. This can be overridden +by first parameter. If second parameter is specified it places a +dynamic breakpoint at specified address which stops the execution. If +stop address is not given the simulator stops if it reaches a +breakpoint, or the CPU accepts an interrupt and stopit option +is TRUE, or fatal error occures or stop command is +used. Note that first instruction is executed without effect of +breakpoints. It means that if there is a breakpoint at start address +then it will not be hit. + +

+$ s51 remoansi.hex
+ucsim 0.2.24, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+55755 bytes read from remoansi.hex
+> b 0x187
+> sopt stopit y
+> g
+Simulation started, PC=0x000000
+Stop at 000187: (4) Breakpoint
+F 000187
+>
+ +After execution is started the Simulaton started message +appears with value of PC where the execution started and the simulator +is ready to accept other commands while the simulation is running in +background. + + + + +

wi,Wi string

 + +Removed 0.2.38, use where,Where instead!! + +

Searching for specified string in internal RAM area. String is +interpreted from first non-space sharacter until end of the command +including spaces. wi command makes case insensitive search and +Wi can be used to make case sensitive search. Result is a hexa +dump of memory areas that match with specified string. Most of C-style +escape sequences can be used in the string: \f, \n, +\r, \t, \v, \a, \b, +\0, and \0xxx where xxx is an octadecimal +number of the code of the character. + +

+$ s51 remoansi.hex
+ucsim 0.2.24, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+58659 bytes read from remoansi.hex
+> g
+Simulation started, PC=0x000000
+
+Stop at 00019c: (7) User stopped
+F 00019c
+> si 20 Dani DAni
+000014 44 61 6e 69 44 41 6e 69                         DaniDAni
+> wi dani
+000014 44 61 6e 69             Dani
+000018 44 41 6e 69             DAni
+> Wi Dani
+000014 44 61 6e 69             Dani
+> wi dani\0
+000018 44 41 6e 69 00          DAni.
+>
+ + +

wx,Wx string

 + +Removed 0.2.38, use where,Where instead!! + +

Search commands. These commands are similar to wi, +Wi commands the only difference is that wx,Wx are used +to search for a string in external memory. + + +

wc,Wc string

+ +Removed 0.2.38, use where,Where instead!! + +

Search commands. These commands are similar to wi, +Wi commands the only difference is that wx,Wx are used +to search for a string in code memory area. + + +

gopt [opt]

+ +Removed 0.2.38, use get_option instead!! + +

Get actual value of option(s). Some options can be set by sopt to modify behavior of the +simulator. Using gopt you can get actual value of these +options. If you use this command without parameter you get list of all +options known by the program. In this way you can figure out which +options can be used. + +

+$ s51 -V
+ucsim 0.2.24, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> gopt
+verbose TRUE Verbose flag.
+stopit FALSE Stop if interrupt accepted.
+debug FALSE Debug flag.
+> gopt stopit
+stopit FALSE Stop if interrupt accepted.
+>
+ +This version of the simulator knows about three options. First element +of the list is name of the option (verbose, debug and +stopit). This name can be used to identify the option in +gopt and sopt command. Second +element of the list is the value of the option. In this case type of +both options is boolean, their value can be TRUE or FALSE. Third +element is a short description of the option. + +
verbose
? + +
debug
Debug flag can be set by -V option of the +program to TRUE otherwise its default value is FALSE. If it is TRUE, +the simulator prints out short messages about important events. + +
stopit
Setting this option to TRUE (default value is +FALSE) forces execution to stop every time when CPU accepts an +interrupt. You do not have to use breakpoints to inspect interrupts. + +
+ + +

sopt opt value

 + +Removed 0.2.38, use set_option instead!! + +

Set option value. Options described at previous command (gopt) can be set using this command. First +parameter must be an option name and second the new +value. Interpretation of the value depends on type of the +option. Value for a boolean type of option interpreted as follows: if +first character of the value is one of 1, t, +T, y, Y then value will be TRUE otherwise +it will be FALSE. + +

+$ s51 -V
+ucsim 0.2.24, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> gopt
+verbose TRUE Verbose flag.
+stopit FALSE Stop if interrupt accepted.
+debug FALSE Debug messages appears on this console.
+> sopt debug t
+> gopt
+verbose TRUE Verbose flag.
+stopit FALSE Stop if interrupt accepted.
+debug TRUE Debug messages appears on this console.
+>
+ + +

si addr data...

 + +Removed 0.2.38, use set memory instead!! + +

Write data into internal RAM area. First parameter specifies start +address of memory area to set and other parameters are data to set. + +

+$ s51
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> si 10 dani\040hej-ho
+00000a 64 61 6e 69 20 68 65 6a 2d 68 6f                dani hej-ho
+>
+ +Result of the command is a memory dump of area which has been modified +by the command. If there is syntax error in a data parameter then +remaining parameters are dropped out. + +
+> si 20 1 2 0xi 3 4
+Bad data 0xi
+000014 01 02                                           ..
+>
+ + +

sx addr data...

 + +Removed 0.2.38, use set memory instead!! + +

This command is similar to si command +described above but it is used to modify external RAM. + + +

sc addr data...

+ +Removed 0.2.38, use set memory instead!! + +

This command is similar to si command +described above but it is used to modify code memory area (ROM). + + +

ss addr data...

+ +Removed 0.2.38, use set memory instead!! + +

This command is similar to si command +described above but it is used to modify SFR. Other difference is that +first parameter (start address) can be specified by name of SFR +not by address only. + +

+$ s51
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> ss p1 0
+000090 00                                              .
+>
+ + +

sb addr data...

 + +Removed 0.2.38, use set bit instead!! + +

Modify bit(s). First parameter is address of first bit to modify. See +description of db command how bit address can +be specified. If first character of data parameter is 0 it +means zero otherwise it means one. + +

+$ s51
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> sb 0x23.5 1
+> db 0x23.5
+000023   23.5 1
+> sb p3.3 0
+> dp
+P0    11111111 0xff 255 .    P1    11111111 0xff 255 .
+Pin0  11111111 0xff 255 .    Pin1  11111111 0xff 255 .
+Port0 11111111 0xff 255 .    Port1 11111111 0xff 255 .
+
+P2    11111111 0xff 255 .    P3    11110111 0xf7 247 .
+Pin2  11111111 0xff 255 .    Pin3  11111111 0xff 255 .
+Port2 11111111 0xff 255 .    Port3 11110111 0xf7 247 .
+> sb tr1 0
+> db tr1
+000088    TR1 0
+> sb tr1 1
+> db tr1
+000088    TR1 1
+>
+ + +

sp port data

 + +Removed 0.2.38, use set port instead!! + +

This command can be used to sep up output values of external circuits +connected to port pins. If a port bit is used as output to drive +external circuits, do not set corresponding pin bit to zero because +read back value of the port can be false. First parameter must be +number of the port between 0 and 3. + +

+$ s51
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> dp
+P0    11111111 0xff 255 .    P1    11111111 0xff 255 .
+Pin0  11111111 0xff 255 .    Pin1  11111111 0xff 255 .
+Port0 11111111 0xff 255 .    Port1 11111111 0xff 255 .
+
+P2    11111111 0xff 255 .    P3    11111111 0xff 255 .
+Pin2  11111111 0xff 255 .    Pin3  11111111 0xff 255 .
+Port2 11111111 0xff 255 .    Port3 11111111 0xff 255 .
+> ss p1 0x55
+000090 55                                              U
+> sp 1 0x0f
+> dp
+P0    11111111 0xff 255 .    P1    01010101 0x55  85 U
+Pin0  11111111 0xff 255 .    Pin1  00001111 0x0f  15 .
+Port0 11111111 0xff 255 .    Port1 00000101 0x05   5 .
+
+P2    11111111 0xff 255 .    P3    11111111 0xff 255 .
+Pin2  11111111 0xff 255 .    Pin3  11111111 0xff 255 .
+Port2 11111111 0xff 255 .    Port3 11111111 0xff 255 .
+>
+ + +

fi start stop data

 + +Removed 0.2.38, use fill instead!! + +

Fill command. It can be used to fill up an area of internal RAM with a +specified data. + +

+$ s51
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+> fi 11 0x34 44
+> di
+000000 00 00 00 00 00 00 00 00 ........
+000008 00 00 00 2c 2c 2c 2c 2c ...,,,,,
+000010 2c 2c 2c 2c 2c 2c 2c 2c ,,,,,,,,
+000018 2c 2c 2c 2c 2c 2c 2c 2c ,,,,,,,,
+000020 2c 2c 2c 2c 2c 2c 2c 2c ,,,,,,,,
+000028 2c 2c 2c 2c 2c 2c 2c 2c ,,,,,,,,
+000030 2c 2c 2c 2c 2c 00 00 00 ,,,,,...
+000038 00 00 00 00 00 00 00 00 ........
+000040 00 00 00 00 00 00 00 00 ........
+000048 00 00 00 00 00 00 00 00 ........
+>
+ + +

fx start stop data

 + +Removed 0.2.38, use fill instead!! + +

Fill command. It works similar to fi but it +puts data into external RAM instead of internal RAM. + + +

fs start stop data

+ +Removed 0.2.38, use fill instead!! + +

Fill command. It works similar to fi but it +puts data into SFR instead of internal RAM. + + +

fc start stop data

+ +Removed 0.2.38, use fill instead!! + +

Fill command. It works similar to fi but it +puts data into code memory (ROM) instead of internal RAM. + + + + +

+ + + diff --git a/sim/ucsim/doc/cmd_set.html b/sim/ucsim/doc/cmd_set.html new file mode 100644 index 0000000..fa96645 --- /dev/null +++ b/sim/ucsim/doc/cmd_set.html @@ -0,0 +1,34 @@ + + +Set commands of µCsim + + + + + + +

Set commands

+ +Set commands can be used to set value of memory cells, bits, or port +pins. Those commands that set value of memory interpret their command +lines a litle bit different than other commands. First parameter is +always the start address of the memory area which is being set. This +parameter is followed by a list of data parameters. Data can be +specified by a number. Numbers must begin with a digit. Each number +specifies one byte of data. If the parameter begins with a non-digit +character, it is interpreted as string of characters and this kind of +parameter specifies as many bytes as many characters the string +has. Strings can contain escape sequencies (see description of wi command where escape +sequencies are discussed) but they can not contain spaces because +space characters (space, tabulator and vertical tabulator) separates +parameters. Spaces can be specified as escape sequences or separated +number parameters if needed. Only space characters separate data +parameters while normaly comma (,) and semicolon (;) +are interpreted as separator characters too. + + +
+ + + diff --git a/sim/ucsim/doc/commref.html b/sim/ucsim/doc/commref.html new file mode 100644 index 0000000..c77ed6b --- /dev/null +++ b/sim/ucsim/doc/commref.html @@ -0,0 +1,83 @@ + + +µCsim: Command Reference + + + + +

Command reference

+ + +

The simulator can be controlled with a simple monitor program which +uses the command console to read commands and print out results. After +starting the program you see a prompt on the command console and you +can write in commands after the prompt: + +

+g [start [stop]]   Go
+stop               Stop
+pc [address]       Get/set content of PC
+s [step]           Step
+n [step]           Next
+bse wi|ri|wx|rx|ws|rs|rc f|d addr [hit]
+                   Set EVENT Breakpoint
+bde wi|ri|wx|rx|ws|rs|rc addr
+                   Delete EVENT Breakpoint
+ba                 Delete all breakpoints
+dis [start [offset [lines]]]
+                   Disassemble code
+dp                 Dump ports
+ds [addr...]       Dump SFR
+db addr...         Dump bit
+si addr data...    Set Internal RAM
+sx addr data...    Set External RAM
+sc addr data...    Set code (ROM)
+ss addr data...    Set SFR area
+sb addr data...    Set bit
+sp port data       Set port pins
+fi start stop data Fill IRAM area with `data'
+fx start stop data Fill XRAM area with `data'
+fs start stop data Fill SFR area with `data'
+fc start stop data Fill ROM area with `data'
+wi,Wi string       Search for `string' in IRAM (Wi case sensitive)
+wx,Wx string       Search for `string' in XRAM (Wx case sensitive)
+wc,Wc string       Search for `string' in ROM (Wc case sensitive)
+sopt opt value     Set value of option
+gopt [opt]         Get value of option(s)
+show c|w           Show licensing information
+----
+Set of new commands:
+conf               Configuration
+state              State of simulator
+file,load "FILE"   Load FILE into ROM
+download,dl        Download (intel hex) data
+info               Information
+get                Get
+set                Set
+timer a|d|g|r|s|v id [value]
+                   Timer add|del|get|run|stop|value
+run                Go
+step               Step
+reset              Reset
+dump i|x|r|s [start [stop]]
+                   Dump memory
+di [start [stop]]  Dump Internal RAM
+dx [start [stop]]  Dump External RAM
+dch [start [stop]] Dump code in hex form
+dc [start [stop]]  Dump code in disass form
+break addr [hit]   Set fix breakpoint
+tbreak addr [hit]  Set temporary breakpoint
+clear [addr...]    Clear fix breakpoint
+help,?             Help about commands
+quit               Quit
+kill               Shut down the simulator
+
+ +In command reference you can find more +information about breakpoints and execution of the simulated program. + + +
+ + + diff --git a/sim/ucsim/doc/conf.mk b/sim/ucsim/doc/conf.mk new file mode 100644 index 0000000..ac65f24 --- /dev/null +++ b/sim/ucsim/doc/conf.mk @@ -0,0 +1,10 @@ +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_builddir) && $(SHELL) ./config.status + +# End of conf.mk diff --git a/sim/ucsim/doc/cpu-mem.fig b/sim/ucsim/doc/cpu-mem.fig new file mode 100644 index 0000000..20753bd --- /dev/null +++ b/sim/ucsim/doc/cpu-mem.fig @@ -0,0 +1,93 @@ +#FIG 3.2 +Landscape +Center +Metric +A4 +100.00 +Single +-2 +1200 2 +2 1 0 1 0 7 49 -1 -1 0.000 0 0 -1 1 0 3 + 0 0 1.00 60.00 120.00 + 4320 2160 6660 2160 6660 2430 +2 1 0 1 0 7 49 -1 -1 0.000 0 0 -1 1 0 3 + 0 0 1.00 60.00 120.00 + 4320 2025 6840 2025 6840 2430 +2 1 0 1 0 7 49 -1 -1 0.000 0 0 -1 0 1 2 + 0 0 1.00 60.00 120.00 + 5175 2430 5175 2160 +2 1 0 1 0 7 49 -1 -1 0.000 0 0 -1 0 1 2 + 0 0 1.00 60.00 120.00 + 5355 2430 5355 2025 +2 1 0 1 0 7 49 -1 -1 0.000 0 0 -1 1 0 3 + 0 0 1.00 60.00 120.00 + 4320 1845 8460 1845 8460 2430 +2 1 0 1 0 7 49 -1 -1 0.000 0 0 -1 0 1 3 + 0 0 1.00 60.00 120.00 + 8640 2430 8640 1710 4320 1710 +2 3 0 1 0 1 51 -1 20 0.000 0 0 -1 0 0 11 + 5580 3375 5490 3375 5670 3195 5850 3375 5760 3375 5760 3555 + 5850 3555 5670 3735 5490 3555 5580 3555 5580 3375 +2 3 0 1 0 1 51 -1 20 0.000 0 0 -1 0 0 11 + 7020 3375 6930 3375 7110 3195 7290 3375 7200 3375 7200 3555 + 7290 3555 7110 3735 6930 3555 7020 3555 7020 3375 +2 3 0 1 0 1 51 -1 20 0.000 0 0 -1 0 0 11 + 8775 3375 8685 3375 8865 3195 9045 3375 8955 3375 8955 3555 + 9045 3555 8865 3735 8685 3555 8775 3555 8775 3375 +2 2 0 1 0 1 50 -1 20 0.000 0 0 -1 0 0 5 + 9090 3735 4320 3735 4320 3915 9090 3915 9090 3735 +2 2 0 1 0 26 50 -1 20 0.000 0 0 -1 0 0 5 + 3150 1575 4320 1575 4320 4815 3150 4815 3150 1575 +2 2 0 1 0 13 48 -1 20 0.000 0 0 -1 0 0 5 + 4995 4635 6210 4635 6210 5400 4995 5400 4995 4635 +2 2 0 1 -1 17 50 -1 20 0.000 0 0 -1 0 0 5 + 5085 2430 6120 2430 6120 3195 5085 3195 5085 2430 +2 2 0 1 0 17 50 -1 20 0.000 0 0 -1 0 0 5 + 6525 2430 7560 2430 7560 3195 6525 3195 6525 2430 +2 2 0 1 0 15 50 -1 20 0.000 0 0 -1 0 0 5 + 8280 2430 9315 2430 9315 3195 8280 3195 8280 2430 +2 1 0 1 0 7 49 -1 -1 0.000 0 0 -1 0 0 7 + 5130 1440 5220 1350 6210 1350 6300 1260 6390 1350 7380 1350 + 7470 1440 +2 1 0 1 0 7 49 -1 -1 0.000 0 0 -1 0 0 7 + 8280 1440 8370 1350 8730 1350 8820 1260 8910 1350 9270 1350 + 9360 1440 +2 1 0 1 0 7 53 -1 -1 0.000 0 0 -1 0 1 2 + 0 0 1.00 60.00 120.00 + 5985 3195 5985 4635 +2 1 0 1 0 7 53 -1 -1 0.000 0 0 -1 0 1 3 + 0 0 1.00 60.00 120.00 + 7425 3195 7425 4815 6210 4815 +2 1 0 1 0 7 46 -1 -1 0.000 0 0 -1 0 1 3 + 0 0 1.00 60.00 120.00 + 9180 3195 9180 4950 6210 4950 +2 1 0 1 0 7 46 -1 -1 0.000 0 0 -1 1 0 4 + 0 0 1.00 60.00 120.00 + 4410 1710 4455 1755 4455 5265 4995 5265 +2 1 0 1 0 7 46 -1 -1 0.000 0 0 -1 0 0 2 + 4410 1845 4455 1890 +2 1 0 1 0 7 46 -1 -1 0.000 0 0 -1 0 0 2 + 4410 2025 4455 2070 +2 1 0 1 0 7 46 -1 -1 0.000 0 0 -1 0 0 2 + 4410 2160 4455 2205 +2 1 0 1 0 2 50 -1 20 0.000 0 0 -1 0 0 31 + 8460 3195 8640 3375 8550 3375 8550 4410 4680 4410 4860 4725 + 4860 4635 4995 4860 4860 5085 4860 4995 4590 4590 4320 4590 + 4320 4095 5175 4095 5175 3375 5085 3375 5265 3195 5445 3375 + 5355 3375 5355 4095 6615 4095 6615 3375 6525 3375 6705 3195 + 6885 3375 6795 3375 6795 4095 8370 4095 8370 3375 8280 3375 + 8460 3195 +4 1 0 49 -1 16 12 0.0000 4 135 1035 7650 2070 Control lines\001 +4 1 0 49 -1 16 12 0.0000 4 180 465 7650 2295 (R/W)\001 +4 1 0 47 -1 16 12 0.0000 4 135 390 3690 3060 CPU\001 +4 1 0 49 -1 16 12 0.0000 4 135 735 7920 3690 Data bus\001 +4 1 0 49 -1 16 12 0.0000 4 135 1020 6480 4320 Address bus\001 +4 1 0 46 -1 16 12 0.0000 4 135 705 5580 5220 Decoder\001 +4 1 0 46 -1 16 12 0.0000 4 135 675 5580 4995 Address\001 +4 1 0 48 -1 16 12 0.0000 4 135 510 5625 2880 Mem1\001 +4 1 0 48 -1 16 12 0.0000 4 135 510 7065 2880 Mem2\001 +4 1 0 48 -1 16 12 0.0000 4 135 510 8775 2880 Mem3\001 +4 1 0 49 -1 16 12 0.0000 4 180 1380 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z{`x4SZ6q2grIkwRsHK@|I>iA8#H7%sp^9n+o1>a~ssx>WY6q&Vy2=)&ugW^AsuLVC zE3U7Wnk%n`*1FIS!3sMpvBesDEV9WeyDYQKI{PfN(MmflwbfdCEw_}vK717}lz%eEriG?6^_);ztf8jVMby`zg(5slw&qYH+n ze<=>uI)0Rmn4f)@+gM$aX`|j^N?`NtcGFnacV*|EpA354B})08?rc{`)-I80F4l6# z`@LuEFwV|Zd$z~ty7Rl6?mONf8kn?K{E*FC)S1zoyj!79V1N0t!!P|>>|bc2-O4k% z|Gcd$0?FP1#TTdO1rT`Wo1fFP!nwT&uPf|h;OZhsKjmEje@Ii`@Y1^@qp19D9~&dz zfUE>NrsxlW;iDaaxRk;vO$2?Zvxy8TXuzC6FF+XNo%V9KK|*-#exJ)ABeKLjy(uSg zNn9LOSSF?4I1f4q)F1ZZq^2iU?L!cxq7t7c#+^AZW!Cdb<@^R8oRO_?LyVWpjCKY& znr}OF6k;4En2$TY(Ofyi8XW#OiZ%(-c!VfqA29}uMKZFHj(j8}BPq#AQnHekyd)+w bsmV=pvXh?tBq&2E%2ATCl%^DA1ONa#5xYQ7 literal 0 HcmV?d00001 diff --git a/sim/ucsim/doc/cpu.html b/sim/ucsim/doc/cpu.html new file mode 100644 index 0000000..679f818 --- /dev/null +++ b/sim/ucsim/doc/cpu.html @@ -0,0 +1,59 @@ + + +Simulator for MCS51 + + + + +

Software simulator for MCS51

+ +This screeshot demonstrates CPU window of the simulator. The CPU +window contains five different panes. Active pane can be changed by +pressing TAB and Shift-TAB keys. First pane contains disassembled code +of the program. Instructions found by the code analyzer appear on the +list only. Some of instructions can be highlighted in different +ways. First highlighted instruction on the list (instruction at +0x4386) is highlighted because there is a breakpoint specified at that +address. Second highlighted instruction (at 0x438A) shows a dynamic +breakpoint. Third highlighted line contains the cursor which can be +moved by pressing up and down arrow keys. Because the pane lists +analyzed instructions only, the list can be scrolled backward as well +as forward. + +

+ +

Second pane which is under disass pane is a memory dump pane which +shows content of internal RAM. Activating this pane the cursor appears +in the pane and the memory content can be changed simply by entering +new value at requested location. Cursor can be moved by cursor keys. + +

Next pane shows content of registers: accumulators, program status +word, general purpose registers, indirectly addressed memory +locations, data pointer, and stack pointer, program counter. Note that +changing content of PC can be dangerous. If you set new value to PC +and this address is not found by code analyzer as instruction, +disassembled list disappears from disass pane and an error message `PC +is at invalid address' appears. If you are sure that PC is at an +instruction (remember that code analyzer is unable to locate every +instructions of the program) you can "validate" actual address by +pressing Ctrl-F7 keys. + +

Next pane shows values of ports. P0 and P2 is disabled if simulated +microcontroller is a 8X31 which needs P0 and P2 for multiplexed +address/data bus. + +

Last pane is a passive pane, it can not be activated. It shows time +elapsed since last reset. First line contains number of number of +cycles (in hex) and second line the cycles that the CPU spent in +interrupt routines. Last line is calculated dependent of specified +XTAL frequency and it shows `real time' (symulated time) elapsed since +reset (in microseconds). + +

At right side of menu bar there is an indicator which shows status +of the simulation (CPU Stopped, Symulation Running). The screenshot +shows some menus as well. + +

+ + + diff --git a/sim/ucsim/doc/cpu_types.html b/sim/ucsim/doc/cpu_types.html new file mode 100644 index 0000000..75886a5 --- /dev/null +++ b/sim/ucsim/doc/cpu_types.html @@ -0,0 +1,210 @@ + + +µCsim: CPU types + + + + +

Select type of CPU

+ +The simulator supports following type of microprocessors from MCS51 +family: + +

8051/8031 + +
8052/8032 + +
DS390 + +
8051R + +
89C51R + +
80251 + + +

8051/8031

+ +You can select this type of microcontroller using one of the following +parameter for -t option: + +
  • 51 (HMOS type) + +
  • 8051 (HMOS type) + +
  • 8751 (HMOS type) + +
  • C51 (CMOS type) + +
  • 80C51 (CMOS type) + +
  • 87C51 (CMOS type) + +
  • 31 (HMOS type) + +
  • 8031 (HMOS type) + +
  • C31 (CMOS type) + +
  • 80C31 (CMOS type) + +
+ +It includes core 51 features: + +
  • 64k external RAM + +
  • 64k ROM + +
  • 128 byte internal RAM + +
  • 2 timers (timer #0, timer #1) + +
  • Serial interface + +
  • 4 8-bit quazi bi-directional ports + +
+ +CMOS types also include: + +
  • Idle mode + +
  • Power down mode + +
+ + +

8052/8032

 + +You can select this type of microcontroller using one of the following +parameter for -t option: + +
  • 52 (HMOS type) + +
  • 8052 (HMOS type) + +
  • 8752 (HMOS type) + +
  • C52 (CMOS type) + +
  • 80C52 (CMOS type) + +
  • 87C52 (CMOS type) + +
  • 32 (HMOS type) + +
  • 8032 (HMOS type) + +
  • C32 (CMOS type) + +
  • 80C32 (CMOS type) + +
+ +It includes same features as 8051/8031 +microcontrollers and additionaly: + +
  • 3 timers (timer #0, timer #1, timer #2) + +
  • 256 bytes of internal RAM + +
+ + +

DS390

 + +You can select this type of microcontroller using DS390 as +parameter for -t option (this is a CMOS type). + +It includes same features as 8052 and adds: + +
  • 24 bit flat mode + +
  • support for dual DPTR register + +
  • 128k external RAM + +
  • 128k ROM + +
  • 4k internal SRAM usable + +
  • 10 bit stack mode + +
  • "timed access" of SFRs + +
+ + +

8051R

 + +You can select this type of microcontroller using one of the following +parameter for -t option (all are CMOS types): + +
  • 51R + +
  • 51RA + +
  • 51RB + +
  • 51RC + +
  • C51RA + +
  • C51RB + +
  • C51RC + +
+ +It includes all features that 8052/8032 does and +additionaly: + +
  • Extended interrupt priority system (4 priority levels) + +
  • Extended serial line interface (automatic address recognition) + +
  • Watchdog timer + +
+ + +

89C51R

 + +You can select this type of microcontroller using 89C51R +parameter for -t option (this CPU is always CMOS). This is a Philips +clone, excluding duplicated DPTR it is similar to 8051XR from Intel. + +

It includes all features that 8051R does and +additionaly: + +

  • PCA (Programmable Counter Array): 5 16-bit counter, one of +them can act as watchdog timer. + +
  • Duplicated DPTR. + +
+ + +

80251

 + +You can select this type of microcontroller using one of the following +parameter for -t option (all are CMOS types): + +
  • 251 + +
  • C251 + +
+ +

It includes all features that 89C51R does +and additionaly: + +

  • Nothing implemented yet. + +
+ +
+ + + diff --git a/sim/ucsim/doc/decoded.fig b/sim/ucsim/doc/decoded.fig new file mode 100644 index 0000000..77d98bf --- /dev/null +++ b/sim/ucsim/doc/decoded.fig @@ -0,0 +1,116 @@ +#FIG 3.2 Produced by xfig version 3.2.5-alpha4 +Landscape +Center +Metric +A4 +100.00 +Single +-2 +1200 2 +2 1 0 3 0 15 46 -1 20 0.000 0 0 -1 0 0 2 + 3285 1080 3465 1080 +2 1 0 3 0 15 46 -1 20 0.000 0 0 -1 0 0 2 + 3285 4140 3465 4140 +2 1 0 1 0 7 46 -1 -1 0.000 0 0 -1 0 0 7 + 3375 3870 3465 3780 3465 3465 3555 3375 3465 3285 3465 2970 + 3375 2880 +2 2 0 1 0 17 50 -1 20 0.000 0 0 -1 0 0 5 + 3870 1350 4410 1350 4410 2520 3870 2520 3870 1350 +2 1 0 1 0 7 46 -1 -1 0.000 0 0 -1 0 0 7 + 3375 2520 3465 2430 3465 1980 3555 1890 3465 1800 3465 1440 + 3375 1350 +2 1 2 1 0 15 46 -1 20 2.000 0 0 -1 0 0 2 + 3375 3870 3870 3870 +2 1 2 1 0 15 46 -1 20 2.000 0 0 -1 0 0 2 + 3375 2520 3870 2520 +2 1 2 1 0 15 46 -1 20 2.000 0 0 -1 1 0 2 + 0 0 1.00 60.00 120.00 + 3690 2520 3690 1350 +2 1 2 1 0 15 46 -1 20 2.000 0 0 -1 1 0 2 + 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+ +

Software simulator for microcontrollers

+ +µCsim can be used to simulate microcontrollers. It +supports MCS51 family. AVR core, Z80, HC08 and XA are supported by +UNIX version only. + +

Download

 + +Simulator is available for two platforms: DOS (MCS51 only) +and UNIX but DOS version +is not supported any more. DOS version is not finished so I call it +demo version and it is available in binary only. Limitations of DOS +version are: + +
  • There is no built in help available; + +
  • Some of the utilities are not working, for example calculator, bit +simulator; + +
  • Serial line works in mode 1 independently of mode bits.
+ +I used this simulator to verify my applications and I never used +missing feautres mentioned above, so I think that this "demo" version +can be usefull anyway. + +

Download +now + + + + +

How to install

+ +DOS version + +

Get the ZIP file and unzip it. ZIP file contains three files: +s51.exe the executable itself, dpmi16bi.ovl and +rtm.exe. Last two files are required because s51.exe is +a DOS protected mode program. Put these files in a directory which is +in the PATH or keep them together with the s51.exe. + +

UNIX version + +

UNIX version is distributed in source. + +

  1. Get archive file, uncompress and untar it. These steps will +produce a directory ucsim-X.Y.Z where X.Y.Z is the version +number. + +
  2. Go to the directory and configure the package. Issue +configure command. It will determine your system and +make Makefile. Installation directory can be specified with +--prefix=dir option to the +configure. Default directory is +/usr/local. Executable file will be placed in bin +subdirectory. + +
  3. Compile the package with make command. + +
  4. Install executables s51, savr, shc08, +sxa, sz80 to any directory you want. It can be done with +make install command which will place files in +installation directory specified with --prefix=dir option of +configure. Note that you may have to have special +privilege to do this if installation directory is not writable by you. + +
+ + + + +

How to use

 + +

DOS version

+ +S51 for DOS has been written in Borland Pascal using Turbo Vision to +produce menu driven, multiwindow user interface which is very easy to +use. The program can be started using following command: + +

C:\> s51 [input file] + +

Parameter is optional. If it specified it must be the name of an +Intel hex file. Some screenshots of the program and short descriptions +of them: + +

+ + +

UNIX version

+ +Invokation.
Starting the simulator +program. + +

Features of the simulator + +

    + +
  • Code analyzer.
    The simulator tries +to figure out places of valid instructions in code area. This feature +included in both DOS and UNIX versions. + +
  • Processor types.
    The simulator can +simulate different type of microcontrollers. + +
  • Multiple consoles.
    The simulator can +handle more than one command consoles and accepts command from +multiple sources. It also can be driven by other programs such as +debugger interfaces. + +
  • Serial interfaces.
    The simulator can +virtually connect a terminal to serial interface of the simulated CPU. + +
  • Memory simulation.
    Simulated CPU +provides address spaces, storage is simulated by memory chips, address +decoders conects them together. + +
  • Command syntax and command reference. (Now updated up to +0.5.0)
    The simulator can be controlled via a command line +interface. It accepts simple commands. + +
+ +
+ + + + + +
© 1997,99 Dániel Drótos, Talker Bt.
drdani@mazsola.iit.uni-miskolc.hu
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Software simulator for MCS51

+ +This screenshot demonstrates window which displays interrupt system of +the microcontroller. Interrupt enable register and priority register +as well as interrupt request bits are displayed in this window. Note +that if you set some request bit during simulation and interrupt is +enabled, the CPU will accept the interrupt and responding to it by +starting the service routine. + +

+ +

The `Interrupt/program rate' pane shows ratio of execution time of +main program and interrupt service routines. Content of this pane is +not saved if you close tha window which means that measure of the +ratio is restarted every time you reopen the window. + +

+ + + diff --git a/sim/ucsim/doc/invoke.html b/sim/ucsim/doc/invoke.html new file mode 100644 index 0000000..58f1aff --- /dev/null +++ b/sim/ucsim/doc/invoke.html @@ -0,0 +1,128 @@ + + +µCsim: Invokation + + + + +

Starting the simulator

+ +There are separate programs to simulate different microcontroller +families: + +

MCS51 family is simulated by s51 +
AVR family is simulated by savr +
Z80 processor is simulated by sz80 +
XA family is simulated by sxa +
HC08 processor is simulated by shc08 + +

The simulator can be started in the following way: + +

$ s51 [-hHVvP] [-p prompt] [-t CPU] +[-X freq[k|M]] [-c file] [-s file] [-S optionlist] [-Z portnum] +[files...] + +

Specified files must be names of Intel hex files. Simulator loads +them in specified order into the ROM of the simulated system. + +

Options: + +

-t CPU + +
Type of CPU. Recognized types are: 51, 8051, 8751, C51, 80C51, +87C51, 31, 8031, C31, 80C31, 52, 8052, 8752, C52, 80C52, 87C52, 32, +8032, C32, 80C32, 51R, 51RA, 51RB, 51RC, C51R, C51RA, C51RB, C51RC, +89C51R, 251, C251, DS390, DS390F. Note that recognition of a CPU type +as option does not mean that the simulator can simulate that kind of +CPU. Default type is C51. +
DS390 supports Dallas DS80C390 24 bit flat mode, dual-dptr operations, etc. +DS390F is the same as DS390, but it starts already in 24 bit flat mode +(ACON = 0xFA instead of 0xF8). DS390F is needed to run programs compiled +with sdcc -mds390. + +
See how to select CPU type. + +
-X freq[k|M] + +
XTAL frequency is freq Hertz. k or M can be +used to specify frequency in kHZ or MHz. Space is not allowed between +the number and the k or M. Default value is 11059200 Hz. + +
-c file + +
Open command console on file. Command consoles are on +standard input and output by default. Using this option the console +can be opened on any file for example on the serial interface of the +computer. + +
-Z portnum + +
Listen for incoming connections on port portnum. Using this +option µCsim can serve multiple consoles. You can get a console +by simply telnet into machine running µCsim to port +portnumber. This option is not available on platforms which +doesn't support BSD networking. + +
See how to use multiple consoles. + +
-s file + +
Connect serial interface of the simulated microcontroller to the +file. Nothing is used by default which means that characters +transmitted by serial interface of the simulated microcontroller go to +nowhere and it will never receive anything. If you are going to +communicate with serial interface interactively the best idea is to +specify a teminal with -s option. + +
-S in=file,out=file + +
Using this option you can specify different files for input and +output streams that µCsim uses to simulate microprocessor's +serial interface. + +
See more about serial interface +simulation. + +
-p prompt + +
Using this option you can specify any string to be the prompt of +command interpreter, for example: + +
$ s51 -p "s51> "
+ucsim 0.2.12, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+s51>
+ +
-P + +
Prompt will be a null ('\0') character. This feature can be +useful for programs which controlls simulator through a pipe. + +
-V + +
Verbose mode. The simulator notifies you about some kind of +internal actions for example interrupts. Messages are printed on +command console. + +
-v + +
Print out version number and stop. + +
-H + +
Print out types of known CPUs. Names printed out by this option +can be used to determine CPU type using -t option. + +
-h + +
Print out a short help about the options and stop. + +
+ + +
+ + + diff --git a/sim/ucsim/doc/memory.html b/sim/ucsim/doc/memory.html new file mode 100644 index 0000000..f724037 --- /dev/null +++ b/sim/ucsim/doc/memory.html @@ -0,0 +1,83 @@ + + +Memory simulation in µCsim + + + + +

Memory simulation in µCsim

+ +Typical microprocessor system can look like this: + +

[CPU-memory connection] + + +

Address space

+ +In our terminilogy "address space" means a set of: + +
  • address bus lines + +
  • data bus lines + +
  • control (read/write) lines
+ +Bus lines can be shared by address spaces, in this case number of +control line sets specifies the address spaces. + +

Microcontrollers usually have more address spaces. Some is used +inside only, some can be used for external memories. + +

Address space does not store any value. It just specifies range of +addresses by start address (which is not necessarily zero) and +size which the CPU can provide when it tries to access a memory +location. + + +

Memory chip

+ +"Memory chip" is a circuit which can hold values in +cells. Cells are indexed from 0 up to size-1. Each cell stores some +(usually 8) bits. + +

[Memory chip] + + +

Address decoder

+ +Addresses coming from an address space via address bus must be routed +to memory and translated to cell indexes. This is done by the +"address decoder". It listens addresses on the bus and control +lines and enables exactly one memory chip. This way cells of the +memory chip appear in the address space. + +

[Decoded addresses] + +

It is possible that some addresses are not decoded. Writing to such +an address results data to be lost. Reading of a non-decoded address +results random value. Pullup or pulldown resistors can be applied to +data bus lines to provide a specific value for read operations. + +

As it shown above, it is also possible that some cells of a chip is +not mapped to any address. + + +

Mixed address spaces (shared chips)

+ +Decoder connects an address of an address space to a cell of a memory +chip. Only one cell can be connected to each addresses but same cell +can be connected to more than one address spaces. This is done by +routing different control lines to the same chip through logic L: + +

[Sharing memchip] + +

Because each cell of a memory chip uses same read/write control, in +real world it is not possible to share individual cells of a chip +between address spaces. In µCsim simulator we can define as many +address decoders as we want so it is possible to map any cell to any +address. + +

+ + + diff --git a/sim/ucsim/doc/mulcons.html b/sim/ucsim/doc/mulcons.html new file mode 100644 index 0000000..a5888da --- /dev/null +++ b/sim/ucsim/doc/mulcons.html @@ -0,0 +1,115 @@ + + +µCsim: Multiple Consoles + + + + +

Using multiple consoles

+ +

Why?

+ +Using more than one console can be useful if you want to issue a +command during the simulated program is executed. + + +

How?

+ +

To get multiple consoles you have to execute the simulator in the +background like daemons run in UNIX systems. The simulator +then will listen and wait for network connection requests and provide +console functions for network connections. + +

To run µCsim in the background you have to use -Z option for the simulator: + +

+pigmy$ s51 -Z 5555 foo.hex
+
+ +In this case s51 runs in forground in your command interpreters point +of view. Of course you can run the program really in the background: + +
+pigmy$ s51 -Z 5555 foo.hex &
+
+ +The parameter of the -Z option is a +port number. This can be number of any unused port of your machine. If +the specified port is already occupied then following message appears: + +
+pigmy$ s51 -Z 5555
+bind: Address already in use
+
+ +In this case you have to use an other number. + +

Let's suppose you have found a free port number and the simulator +listens on it. Now go to somewhere else, at least to an other window +and connect to the simulator: + +

+other_machine$ telnet pigmy 5555
+
+ +First parameter to the telnet command is the name of the machine where +the simulator is running on. It can be localhost if you are +on the same machine or the fully qualified host name if you are at the +other end of the world. Second parameter is the number of the port +where the simulator is listening. It must be the same number which was +specified as parameter of the -Z +option when the simulator was started (see above). + +

Connecting to the simulator you get a command console: + +

+pigmy$ telnet pigmy 5555
+Trying 127.0.0.1...
+Connected to pigmy.talker.bt.
+Escape character is '^]'.
+ucsim 0.2.21, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+ucsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+>
+ 
+
+ + +

What to do with it?

+ +Obviously you can telnet into the simulator as many times as many +command consoles you want. You can start the execution using one +console and while the program is executed you can, for example, modify +ports on the other console. + + +

Stop

+ +Using quit (q) command you can not stop the +simulator. It just stops the actual console and the simulator +continues to listen for incoming network connections. + +

To stop the simulator completely you have to use kill command. Note that if you stop the +simulator then all the active network connections (all other consoles) +will stop. + + +

Tricks

+ +You can get a console on the terminal where you started the +simulator. To do this you must explicitly ask the simulator to open a +console on the standard input/output. You can do this using -c option and specify the actual +terminal as parameter for it: + +
+pigmy$ s51 -Z 5555 foo.hex -c /dev/tty
+
+ +
+ + + diff --git a/sim/ucsim/doc/new.gif b/sim/ucsim/doc/new.gif new file mode 100644 index 0000000000000000000000000000000000000000..0fe3d295ed8f61973f31e2b421ac70f942a3d14c GIT binary patch literal 161 zcmZ?wbhEHblw%NKSjfO|;J|_Z{~3NP)d&pyt@x9LkpT#FKm~nr37EGF@xlv*&A`CBJ2Iyz}1up-gXg!e>F|Us>B! zHFh!yZTEY(ZK|@-e4nRZgYG<=GnHGZwt4ot!{J=n+wPk$n((YyJarQ5RMCj(O9~&j NZ94JdMg#+cH2{CDL+1bh literal 0 HcmV?d00001 diff --git a/sim/ucsim/doc/obsolete.html b/sim/ucsim/doc/obsolete.html new file mode 100644 index 0000000..2afd228 --- /dev/null +++ b/sim/ucsim/doc/obsolete.html @@ -0,0 +1,25 @@ +

bl

 + +List breakpoints. This command prints out information about every +fetch and then event breakpoints. + +
+> bl
+F 1(1) 000160 c2 CLR   P1.0
+D 2(2) 000180 02 LJMP  022a
+F 1(1) 000006 wi
+>
+ +First character on the list shows permanency of the +breakpoint. F means fix and D means dynamic. Second item +on the list is the hit number associated to breakpoint. After that +between the parentheses there is the actual value of the hit +counter. If hit counter reaches zero, breakpoint is activated and hit +counter is preset with value of hit number. Next item is the +address. Next items are different for fetch and event breakpoints. + +

Fetch breakpoints list hexadecimal code of instruction at +breakpoint's address and then dissassembled instruction. + +

Event breakpoints list identification of the event's type. + diff --git a/sim/ucsim/doc/post.jpg b/sim/ucsim/doc/post.jpg new file mode 100644 index 0000000000000000000000000000000000000000..37dbfa15c4a438a14be0be533a7ba937b8f85386 GIT binary patch literal 1016 zcmex=^(PF6}rMnOeST|r4lSw=>~TvNxu(8R<1W=16jCP7AKLB{__803NOWMu>c1}I=;VrF4wW9Q)H;sz?% zD!{d!pzFb!U9xX3zTPI5o8roG<0MW4oqZMDikqloVbuf*=gfJ(V&YTRE(2~ znmD<{#3dx9RMpfqG__1j&CD$#!(;m`U-bo}m%dwG{CBCg(Brp38zWBszAf@D z^yD$8R%Yg&WI^8Kzz<(?OPAi^HA>BW676#^McKN%v9(6v29HFMBlE&jvz|m`7{s_W zoVXqE@TR}>m6eh&j}`aT^WAsxNVyj@kHm0!})1O z4NM_D8*KO@R(jqwepP7EW6P!0vS?dWWa;az->(XP{7Lea5z zmD2yNxViC}TeX4Qg4TpnOH1Z!)SS#-esJZBg6MPc`KKPNV?4*d;^q05*SD6&$$nIu z|FD|%($=$vrS<%pMr+p|$uxFUxcm8-{L|;^+7rKbN?7vWc(tGX{o1_Q{{(N(Hrtf0 zvmws<*abd=g@^XfuzIW@z;H5e%USIQci&!pwY}rrnrkOzjH7Q_@0?RSHC=1AbxMQh z$zzw#7Oyy`cjDI_H)Eakt$X&_g={O|_4)QkEBhZIaY9$>FKwO6b^LAqe+Hd3-qDA- dzPSp%x!?EhaIuj8DYHdW?_Z2%KPmtJCIGg6l^6g3 literal 0 HcmV?d00001 diff --git a/sim/ucsim/doc/serial.html b/sim/ucsim/doc/serial.html new file mode 100644 index 0000000..7766446 --- /dev/null +++ b/sim/ucsim/doc/serial.html @@ -0,0 +1,135 @@ + + +µCsim: Serial Interafces + + + + +

Using serial interfaces

+ +

Connecting a terminal

+ +You can easily connect a terminal to the serial interface of the +simulated microcontroller. This terminal is just a file so it can be +anything which is represented as a file. It can be a real serial line +of the computer: + +
+$ s51 -s/dev/ttyS1
+
+ +Of course you must use the actual device name of your operating +system. Device name ttyS1 above is used in Linux +systems. Your system can use other names. + +

You can use a terminal of your system. It can be a virtual console +if your system provides such as Linux does for example. On X Windows +you can use xterm windows as terminals, one for running the +simulator and one as a terminal on CPU's serial line. Here is a sample +how to do this: + +

  1. Prepare the terminal window which will be connected to the +serial line: + +

    • Check the device name which represents the terminal: + +
      +$ tty
+/dev/ttyp1
+
      + +
    • Disconnect the shell from the terminal. Usualy I use the +tail command and any existing text file: + +
      +$ tail -f $HOME/.profile
+
      + +
    + +
  2. Run the simulator in the other window: + +
    +$ s51 -s/dev/ttyp1 program.hex
+
    + +Use the output of the tty command above as the parameter of the +-s option. + +
+ +Every character sent out by the simulated program +appears in the "terminal" window and every charater you type in there +will be received by the simulated controller's serial line. + + +

Connecting two instances of simulator

+ +Executing two instances of the simulator, serial lines of two +simulators (micros) can be connected together so they can talk to +each other over their serial interface. It is because you can specify +separate files for serial input and output. For example you run two +simulators "1" and "2", here is the sample how to connect them: + +

+ +

  1. Make two FIFOs to represent physical wires in serial cable +connecting two micros: + +
    +$ mkfifo 1-2 2-1 # 1-2: 1->2  and 2-1: 2->1
+
    + +
  2. Start two simulators and specify the FIFOs as input and output of +serial interface: + +
    +term1 $ # start sim "1"
+term1 $ s51 -Sin=2-1,out=1-2 program_1_.hex
+term2 $ # start sim "2"
+term2 $ s51 -Sout=2-1,in=1-2 program_2_.hex
+
    + +Because opening a pipe blocks the program until other direction is +opened, the order of arguments above is important! + +

    + +

  3. Debug programs as usual. + +
+ +Using the most usefull unix commands cat and tee and +just some more FIFOs you can monitor serial communication, here is a +sample: + +

+ +

  1. Make some FIFOs to use between simulators and tee "monitors": + +
    +$ mkfifo 1_tee tee_2 2_tee tee_2
+
    + +
  2. Run monitoring programs (in two xterms for example): + +
    +xterm1 $ cat 1_tee|tee /dev/tty >tee_2 # monitor 1->2
+xterm2 $ cat 2_tee|tee /dev/tty >tee_1 # monitor 2->1
+
    + +
  3. Now you can start simulators (on two other terminals:) + +
    +xterm3 $ s51 -Sin=tee_1,out=1_tee program_1_.hex
+xterm4 $ s51 -Sin=tee_2,out=2_tee program_2_.hex
+
    + +
  4. Start your apps and listen what they are talking about. + +
+ +
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+

Command syntax of µCsim

 + +µCsim uses a very simple command interpreter. Command can be entered +after µCsim displays the prompt and interpreted when ENTER key is +pressed. Commands must start with the name of the command following +parameters. Name of the command can be abbreviated if abbreviation is +unique. Some commands have more than one names. + +

Syntacticaly parameters can be a string, bit name, array, number or +symbol. Interpretation of these syntactical elements depends on actual +command. + +

If the command line can not be recognized as a known command, +µCsim tries to evaluate the command line as an +expression. See below for information about +operands and operators which can be used in expressions. + + +

Command names

+ +Name of the command must be the first word of the command line. It is +not necessary to enter whole name if abbreviation is unique. Help +command can be used to check out if a command has more names: + +
+> help run
+run [start [stop]] Go
+Names of command: go r run
+...
+
+ +Some commands just groups other commands. These commands have a set of +so-called sub-commands. Sub-command must be second word in the +command line. For example: + +
+> help set
+set subcommand     Set, see `set' command for more help
+Names of command: set
+long help of set
+> set
+"set" must be followed by the name of a subcommand
+List of subcommands:
+set option name|nr value
+                   Set value of an option
+set error on|off|unset
+                   Set value of an error
+set memory memory_type address data...
+                   Place list of data into memory
+set bit addr 0|1   Set specified bit to 0 or 1
+set hardware cathegory params...
+                   Set parameters of specified hardware element
+
+ + +

Type of parameters

+ +

String type

 + +To distinguish strings and symbols, strings can be sorrounded by +(double) quotes. Quotes can be omitted if command parameter is +interpreted as string and actual parameter start with a letter (so it +doesn't look to be a number) and doesn't contain space. Let's look an +example: + +
+0> set opt 7 s51>
+0s51>set opt 7 ".s51> "
+0.s51> 
+
+ + +

Bit type

 + +If parameter contains a dot (.) it is treated as bit +specification. Part before the dot gives memory address and part after +the dot means bit number in the specified data. + +
+0> dump p1.1
+      P1.1 0x90 ff 1
+0> dump 0x80.1
+      P4.1 0x80 ff 1
+0> 
+
+ + +

Array type

 + +Parameters contain [ character are treated as arrays. Arrays can be +used to specify hardware elements. Array index selects an object if +more than one exists: + +
+0> info hw port[0]
+port[0]
+P0    11111111 0xff 255 . (Value in SFR register)
+Pin0  11111111 0xff 255 . (Output of outside circuits)
+Port0 11111111 0xff 255 . (Value on the port pins)
+0> 
+
+ + +

Number type

 + +Some commands accept parameters which in most cases can be +numbers. Numbers can be entered in C-style form. If the number begins +whith 0x or 0X it is interpreted as a +hexadecimal number. If it begins with 0 followed by +digits it is interpreted as octal number. In other cases it is +interpreted as decimal number. + + +

Symbol type

 + +If a command parameter can not be classified in other ways (doesn't +start with a digit or a quote, doesn't contain dot or [) then it will +be treated as a symbol. Symbols can be interpreted in several +ways. + + +

Interpretation of parameters

+ + +

Address parameters

 + +Many commands requires memory addresses as parameters. Addresses can +be specified using number or symbol type of parameters. Value of +symbols depends on processor type. For example MCS52 family of +controllers defines more symbols than MCS51 family. + + +

Number, data parameters

 + +When a command expects a number it should get a number. Note, that symbols is not converted to number they +can be used as address only! + + +

String parameters

 + +Strings can be entered without quotes if they are recognized as +srtings (see above) and do not contain spaces. + + +

Data list parameters

 + +Data list can be any space separated list of numbers and strings. If +you include a string in the list, it is broken to list of bytes where +every byte is ASCII code of a string's character. + +
+> where xram "ab" 0x43
+0xf961 61 62 63                abc
+> 
+
+ + +

Memory parameters

 + +Where memory type is expected, name of the memory should be +used. Most commands accept memory chip and address space too. See +memory simulation for more information. + + +

Hardware element parameters

 + +Hardwer elements can be specified by using arrays, where array name is +name of the element and the array index selects one if more than one +exists. + + +

Bit parameters

 + +Bits can be specified by several ways. One way is using bit type of +command parameter: + +
+0> dump 0.2
+    0x00.2 0x00 00 0
+0> dump 0xc3.2
+    0xc3.2 0xc3 00 0
+0> dump p2.3
+      P2.3 0xa0 ff 1
+0>
+
+ +In this way, any IRAM or SFR location can be addressed as the above +example shows. + +

Other way is using bit address either by value or by symbolic name: + +

+0> dump ea
+     IE0.7 0xa8 00 0
+0> dump 34
+    0x24.2 0x24 24 1
+0> dump 0xc7
+   SCON1.7 0xc0 00 0
+0> 
+
+ +Of course, only addressable bits can be accessed in this way. + +
+ + +

Expressions

 + +If first word of the command line is not recognized as a known +command, the command line will be evaluated as an expression and the +result value printed (in decimal): + +
+0> 12*(34+56)
+1080
+0> 
+
+ + +

Operands

+ +Operands of the expressions can be + +
  • number; + +
  • memory (either address space, or memory chip); + +
  • or bit
+ + +

Number operands

+ +Numbers can be entered in decimal, octal (starting with 0 followed by +a number), or hexadecimal (started with 0x): + +
+0> 12
+12
+0> 012
+10
+0> 0x12
+18
+0> 
+
+ +Numbers must be integers (floating point is not supported) and not +bigger than the value which can be stored as long int. + + +

Memory operands

+ +Memory can be an address space location or a memory chip cell. It can +be specified in following form: + +
name[address]
+ +where name is the name of the address space or memory chip and +address is an expression specifying location (index) of the +cell. + +

Registers in SFR address space can also be specified using +pre-defined names (symbols) of the registers. + +

+0> xram[0x543]
+67
+0> xram_chip[1347]
+67
+0> rom[12*(34+56)]
+56
+0> sp
+7
+0> rom[256*dph+dpl]
+88
+0> 
+
+ +Value of the memory operand is always a positive integer number. + + +

Bit operands

+ +Bit operands are evaluated to 0 or 1. Any bit of any memory location +can be specified as bit using following form: + +
memory.bitnumber
+ +where memory is a memory location as a memory operand and +bitnumber is number of the bit within the specified memory +cell specified as an expression. Note, that dot (.) is part of the +syntax, not an operator. + +

Alternatively, name of the bit can be used to specify named SFR +bits. + +

+0> p0.3
+1
+0> xram[12*(34+56)].9-2
+0
+0> it0
+0
+0> 
+
+ + +

Operators

+ + + + + + + + +
Type Operator Meaning
Primary ( ) Group of sub-expressions
One operand - & Unary minus, address of
Arithmetic * / Multiply, divide
+ - Add, substract
Assignment = Assign to
+ +Arithmetic operators and parenthesises work as usual. + +

Assigment operator can be used to modify memory cells and bits of +the cells. Result will be the assigned value. + +

+0> p0=23
+23
+0> i h port[0]
+port[0]
+P0    00010111 0x17  23 . (Value in SFR register)
+Pin0  11111111 0xff 255 . (Output of outside circuits)
+Port0 00010111 0x17  23 . (Value on the port pins)
+0> p0.0= 0
+0
+0> i h p[0]
+port[0]
+P0    00010110 0x16  22 . (Value in SFR register)
+Pin0  11111111 0xff 255 . (Output of outside circuits)
+Port0 00010110 0x16  22 . (Value on the port pins)
+0> xram[256*dph+dpl]= rom[0]
+108
+0> dump rom 0 0
+0x0000 6c                      l
+0> dump sfr dph dph
+0x83 00                      .
+0> dump sfr dpl dpl
+0x82 00                      .
+0> dump xram 0 0
+0x0000 6c                      l
+0> 0x6c
+108
+0> dump ea
+     IE0.7 0xa8 00 0
+0> ea= 1111
+1
+0> dump ea
+     IE0.7 0xa8 80 1
+0> 
+
+ +When a symbolic name of the SFR is used, it results value of the named +register not the value of the symbol. "Address of" operator can be +used to get value of the symbol. + +
+0> dpl
+0
+0> &dpl
+130
+0> ea
+1
+0> &ea
+175
+0> 256*dph+dpl
+46630
+0> &xram[256*dph+dpl]
+46630
+0> 
+
+ +
+ + +

Redirection

 + +Output of any command can be redirected to a file. Same syntax can be +used for this as for UNIX shell. The only difference is that +µCsim doesn't allow to put redirection at the beginning of the +command! + +
+$ s51 remo.hex
+uCsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+uCsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+55470 words read from remo.hex
+0> dump >/tmp/rom.dump rom
+0> quit
+$ cat /tmp/rom.dump
+0x0000 02 01 60 02 00 3c 06 07 ..`..<..
+0x0008 08 09 0a 02 2f 6b 0e 0f ..../k..
+0x0010 10 11 12 02 00 ac 16 17 ........
+0x0018 18 19 1a 1b 1c 1d 1e 1f ........
+0x0020 20 21 22 02 01 1c 26 27  !"...&'
+0x0028 28 29 2a 32 2c 2d 2e 2f ()*2,-./
+0x0030 02 0f a7 02 0e 9c 02 0d ........
+0x0038 d2 02 08 41 c0 82 c0 83 ...A....
+0x0040 c0 d0 c0 e0 c0 00 a2 90 ........
+0x0048 c0 d0 c2 90 78 18 06 30 ....x..0
+$ s51 remo.hex
+uCsim 0.5.0-pre3, Copyright (C) 1997 Daniel Drotos, Talker Bt.
+uCsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+This is free software, and you are welcome to redistribute it
+under certain conditions; type `show c' for details.
+55470 words read from remo.hex
+0> dump rom 0x50 >>/tmp/rom.dump
+0> quit
+$ cat /tmp/rom.dump
+0x0000 02 01 60 02 00 3c 06 07 ..`..<..
+0x0008 08 09 0a 02 2f 6b 0e 0f ..../k..
+0x0010 10 11 12 02 00 ac 16 17 ........
+0x0018 18 19 1a 1b 1c 1d 1e 1f ........
+0x0020 20 21 22 02 01 1c 26 27  !"...&'
+0x0028 28 29 2a 32 2c 2d 2e 2f ()*2,-./
+0x0030 02 0f a7 02 0e 9c 02 0d ........
+0x0038 d2 02 08 41 c0 82 c0 83 ...A....
+0x0040 c0 d0 c0 e0 c0 00 a2 90 ........
+0x0048 c0 d0 c2 90 78 18 06 30 ....x..0
+0x0050 03 4b 20 92 48 30 07 05 .K .H0..
+0x0058 c2 07 02 00 9d 30 08 05 .....0..
+0x0060 20 93 3a c2 08 90 08 60  .:....`
+0x0068 e0 b4 ff 03 02 00 9d 04 ........
+0x0070 f0 14 f8 03 03 03 54 1f ......T.
+0x0078 90 08 62 25 82 f5 82 e5 ..b%....
+0x0080 83 34 00 f5 83 e8 54 07 .4....T.
+0x0088 f8 08 74 80 23 d8 fd f8 ..t.#...
+0x0090 e0 30 93 07 c8 f4 58 f0 .0....X.
+0x0098 02 00 9d 48 f0 d0 d0 92 ...H....
+$ 
+
+ + +
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Software simulator for MCS51

+ +This screenshot demonstrates one of option dialog boxes and the +terminal window. Terminal window simulates a terminal which is +connected to the serial interface of the simulated +microcontroller. Every character sent by the CPU is printed out in the +terminal window (it does not matter if it is opened or not) and every +time when you press a key in the terminal window the character will be +received by the serial interface of the CPU (when the simulation is +running obviously). During receiving of the character the cursor +disappears from the terminal window and reappears when receive is +completed. Echo is turned off in the terminal window which means that +only simulated program can "write" into the window. + +

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Software simulator for MCS51

+ +This screenshot demonstrates timer/counter window. The window displays +value of the timer and control bits related to the timer/counter +unit. Different windows can be opened to display information about +different timers. Note that Timer2 of 8X52 is not implemented. Value +of the timer or control bits can be changed using these windows or SFR +window. + +

+ +

+ + + diff --git a/sim/ucsim/doc/ucsim.1 b/sim/ucsim/doc/ucsim.1 new file mode 100644 index 0000000..f7b8f67 --- /dev/null +++ b/sim/ucsim/doc/ucsim.1 @@ -0,0 +1,33 @@ +.TH UCSIM 1 +.SH NAME +uCsim \- Micro\-controller simulator +.SH SYNOPSIS +.B s51|sz80|savr|sxa +.RB \-t type +.SH DESCRIPTION +.I s51 +command is used to simulate MCS51 controller family +.PP +.B Options of the command +.TP +.B \-t type +Specifies type of the controller. +.PP +.TP +.B \-s file +Serial file +.SH EXAMPLES +None yet. +.SH FILES +None. +.SH "SEE ALSO" +sdcc(1), sdcdb(1). +.SH DIAGNOSTICS +None. +.SH BUGS +Probably many. +.SH AUTHORS +xy +.RS 0 +zc +.RE 0 \ No newline at end of file diff --git a/sim/ucsim/doc/wins.gif b/sim/ucsim/doc/wins.gif new file mode 100644 index 0000000000000000000000000000000000000000..e9bda89c7ff0f8a806e224391a69bcbed358b90d GIT binary patch literal 18016 zcmV)6K*+yGNk%v~VSoZI0rLO=0001h0001h0Dyo1004jhfPlcjz<_{&0Q>;>`~dg> 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Software simulator for MCS51

+ +This screenshot demonstrates some kind of windows that can be opened +using commands in View menu. Every windows including CPU window +can be resized and moved on the desktop area. Every windows are active +which means that value of displayed data can be changed at any time +including execution of the simulated program. + +

+ +

+ + + diff --git a/sim/ucsim/error.cc b/sim/ucsim/error.cc new file mode 100644 index 0000000..eea6639 --- /dev/null +++ b/sim/ucsim/error.cc @@ -0,0 +1,189 @@ +/* + * Simulator of microcontrollers (error.cc) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* + This file is part of microcontroller simulator: ucsim. + + UCSIM is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + UCSIM is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with UCSIM; see the file COPYING. If not, write to the Free + Software Foundation, 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. +*/ +/*@1@*/ + +#include +#include "i_string.h" + +// prj (local) +#include "errorcl.h" +#include "globals.h" +#include "utils.h" + +// cmd.src +#include "newcmdcl.h" + +struct id_element error_on_off_names[]= { + { ERROR_PARENT, "unset" }, + { ERROR_ON , "on" }, + { ERROR_OFF , "off" }, + { 0 , 0 } +}; + +static class cl_error_registry error_registry; + +class cl_list *cl_error_registry::registered_errors= NIL; + +/* + */ + +cl_error_class::cl_error_class(enum error_type typ, const char *aname, + enum error_on_off be_on/* = ERROR_PARENT*/): + cl_base() +{ + type= typ; + on= be_on; + set_name(aname, "not-known"); +} + +cl_error_class::cl_error_class(enum error_type typ, const char *aname, + class cl_error_class *parent, + enum error_on_off be_on/* = ERROR_PARENT*/): + cl_base() +{ + type= typ; + on= be_on; + set_name(aname, "not-known"); + if (parent) + parent->add_child(this); +} + +void +cl_error_class::set_on(enum error_on_off val) +{ + if (!get_parent() && + val == ERROR_PARENT) + return; + on= val; +} + +bool +cl_error_class::is_on(void) +{ + if (on == ERROR_PARENT) + { + if (!get_parent()) + return(DD_TRUE); + class cl_error_class *p= + dynamic_cast(get_parent()); + return(p->is_on()); + } + else + return(on == ERROR_ON); +} + +enum error_type +cl_error_class::get_type(void) +{ + return(type); +} + +/*char * +cl_error_class::get_name(void) +{ + return(name); +}*/ + +const char * +cl_error_class::get_type_name() +{ + return(get_id_string(error_type_names, type, "untyped")); + /*switch (type) + { + case err_unknown: return("unclassified"); break; + case err_error: return("error"); break; + case err_warning: return("warning"); break; + } + return("untyped");*/ +} + + +/* + */ + +cl_error::cl_error(void): + cl_base() +{ + classification= error_registry.find("non-classified"); +} + +cl_error::~cl_error(void) +{} + +int +cl_error::init(void) +{ + //type= get_type(); + return(0); +} + +enum error_type +cl_error::get_type(void) +{ + if (classification) + return(classification->get_type()); + return(err_unknown); +} + +enum error_on_off +cl_error::get_on(void) +{ + if (!classification) + return(ERROR_ON); + return(classification->get_on()); +} + +bool +cl_error::is_on(void) +{ + if (!classification) + return(DD_TRUE); + return(classification->is_on()); +} + +void +cl_error::print(class cl_commander_base *c) +{ + c->dd_printf("%s\n", get_type_name()); +} + +const char * +cl_error::get_type_name() +{ + enum error_type type= get_type(); + return(get_id_string(error_type_names, type, "untyped")); +} + +cl_error_registry::cl_error_registry(void) +{ + if (NULL == error_registry.find("non-classified")) + register_error(new cl_error_class(err_error, "non-classified", ERROR_ON)); +} + + +/* End of sim.src/error.cc */ diff --git a/sim/ucsim/errorcl.h b/sim/ucsim/errorcl.h new file mode 100644 index 0000000..ae3e284 --- /dev/null +++ b/sim/ucsim/errorcl.h @@ -0,0 +1,129 @@ +/* + * Simulator of microcontrollers (errorcl.h) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* + This file is part of microcontroller simulator: ucsim. + + UCSIM is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + UCSIM is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with UCSIM; see the file COPYING. If not, write to the Free + Software Foundation, 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. +*/ +/*@1@*/ + +#ifndef ERRORCL_HEADER +#define ERRORCL_HEADER + +#include + +// prj +#include "pobjcl.h" +#include "stypes.h" + +extern struct id_element error_on_off_names[]; + +enum error_on_off { + ERROR_PARENT, + ERROR_ON, + ERROR_OFF +}; + +const int err_stop= (err_unknown|err_error); + +class cl_error_class: public cl_base +{ +protected: + enum error_type type; + //char *name; + enum error_on_off on; +public: + cl_error_class(enum error_type typ, const char *aname, + enum error_on_off be_on= ERROR_PARENT); + cl_error_class(enum error_type typ, const char *aname, + class cl_error_class *parent, + enum error_on_off be_on= ERROR_PARENT); + + enum error_on_off get_on(void) { return(on); } + void set_on(enum error_on_off val); + bool is_on(void); + enum error_type get_type(void); + const char *get_type_name(void); + //char *get_name(void); +}; + +class cl_error_registry +{ +public: + cl_error_registry(void); + class cl_error_class *find(const char *type_name) + { + if (NIL == registered_errors) + return NIL; + return static_cast(registered_errors->first_that(compare, type_name)); + } + static class cl_list *get_list(void) + { + return registered_errors; + } + +protected: + class cl_error_class *register_error(class cl_error_class *error_class) + { + if (!registered_errors) + registered_errors= new cl_list(2, 2, "registered errors"); + registered_errors->add(error_class); + return error_class; + } + +private: + static class cl_list *registered_errors; + static int compare(void *obj1, const void *obj2) + { + return (static_cast(obj1))->is_named(static_cast(obj2)); + } +}; + +class cl_commander_base; //forward + +class cl_error: public cl_base +{ +protected: + class cl_error_class *classification; +public: + bool inst; // Occured during instruction execution + t_addr PC; // Address of the instruction +public: + cl_error(void); + virtual ~cl_error(void); + virtual int init(void); + +public: + virtual enum error_type get_type(void); + virtual enum error_on_off get_on(void); + virtual bool is_on(void); + virtual class cl_error_class *get_class(void) { return(classification); } + + virtual void print(class cl_commander_base *c); + virtual const char *get_type_name(); +}; + +#endif + + +/* End of sim.src/errorcl.h */ diff --git a/sim/ucsim/eventcl.h b/sim/ucsim/eventcl.h new file mode 100644 index 0000000..fa0c525 --- /dev/null +++ b/sim/ucsim/eventcl.h @@ -0,0 +1,16 @@ +/*@1@*/ + +#ifndef EVENTCL_HEADER +#define EVENTCL_HEADER + + +enum event { + ev_nothing = 0x00000000, + + ev_address_space_added = 0x00000001 +}; + + +#endif + +/* End of eventcl.h */ diff --git a/sim/ucsim/globals.cc b/sim/ucsim/globals.cc new file mode 100644 index 0000000..56a934c --- /dev/null +++ b/sim/ucsim/globals.cc @@ -0,0 +1,411 @@ +/* + * Simulator of microcontrollers (globals.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include + +#include "stypes.h" + + +// No other global variable should exists! +class cl_app *application; + + +/* Delimiters to split up command line */ +char delimiters[]= " ,;\t\r\n"; + +struct id_element mem_ids[]= { + { MEM_ROM , "ROM " }, + { MEM_XRAM , "XRAM " }, + { MEM_IRAM , "IRAM " }, + { MEM_SFR , "SFR " }, + { MEM_IXRAM, "IXRAM" }, + { MEM_DUMMY, "DUMMY" }, + { 0, 0 } +}; + +struct id_element mem_classes[]= { + { MEM_ROM , "rom" }, + { MEM_XRAM , "xram" }, + { MEM_IRAM , "iram" }, + { MEM_SFR , "sfr" }, + { MEM_IXRAM, "ixram" }, + { MEM_DUMMY, "dummy" }, + { 0, 0 } +}; + +struct id_element cpu_states[]= { + { stGO, "OK" }, + { stIDLE, "Idle" }, + { stPD, "PowerDown" }, + { 0, 0 } +}; + +struct id_element error_type_names[]= { + { err_unknown, "unclassified" }, + { err_error, "error" }, + { err_warning, "warning" } +}; + + +const char *warranty= +" NO WARRANTY\n" +"\n" +" 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY\n" +"FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN\n" +"OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES\n" +"PROVIDE THE PROGRAM \"AS IS\" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED\n" +"OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\n" +"MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS\n" +"TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE\n" +"PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,\n" +"REPAIR OR CORRECTION.\n" +"\n" +" 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING\n" +"WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR\n" +"REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,\n" +"INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING\n" +"OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED\n" +"TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY\n" +"YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER\n" +"PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE\n" +"POSSIBILITY OF SUCH DAMAGES.\n" +; + + +const char *copying= +" GNU GENERAL PUBLIC LICENSE\n" +" Version 2, June 1991\n" +"\n" +" Copyright (C) 1989, 1991 Free Software Foundation, Inc.\n" +" 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA\n" +" Everyone is permitted to copy and distribute verbatim copies\n" +" of this license document, but changing it is not allowed.\n" +"\n" +" Preamble\n" +"\n" +" The licenses for most software are designed to take away your\n" +"freedom to share and change it. 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Our decision will be guided by the two goals\n" +"of preserving the free status of all derivatives of our free software and\n" +"of promoting the sharing and reuse of software generally.\n" +; + + +/* + * Information about different type of CPUs + */ + +struct cpu_entry *cpus= NIL; + +struct cpu_entry cpus_51[]= +{ + {"51" , CPU_51, CPU_HMOS}, + {"8051" , CPU_51, CPU_HMOS}, + {"8751" , CPU_51, CPU_HMOS}, + {"C51" , CPU_51, CPU_CMOS}, + {"80C51" , CPU_51, CPU_CMOS}, + {"87C51" , CPU_51, CPU_CMOS}, + {"31" , CPU_31, CPU_HMOS}, + {"8031" , CPU_31, CPU_HMOS}, + {"C31" , CPU_31, CPU_CMOS}, + {"80C31" , CPU_31, CPU_CMOS}, + + {"52" , CPU_52, CPU_HMOS}, + {"8052" , CPU_52, CPU_HMOS}, + {"8752" , CPU_52, CPU_HMOS}, + {"C52" , CPU_52, CPU_CMOS}, + {"80C52" , CPU_52, CPU_CMOS}, + {"87C52" , CPU_52, CPU_CMOS}, + {"32" , CPU_32, CPU_HMOS}, + {"8032" , CPU_32, CPU_HMOS}, + {"C32" , CPU_32, CPU_CMOS}, + {"80C32" , CPU_32, CPU_CMOS}, + + {"51R" , CPU_51R, CPU_CMOS}, + {"51RA" , CPU_51R, CPU_CMOS}, + {"51RB" , CPU_51R, CPU_CMOS}, + {"51RC" , CPU_51R, CPU_CMOS}, + {"C51R" , CPU_51R, CPU_CMOS}, + {"C51RA" , CPU_51R, CPU_CMOS}, + {"C51RB" , CPU_51R, CPU_CMOS}, + {"C51RC" , CPU_51R, CPU_CMOS}, + + {"89C51R", CPU_89C51R, CPU_CMOS}, + + {"251" , CPU_251, CPU_CMOS}, + {"C251" , CPU_251, CPU_CMOS}, + + {"DS390" , CPU_DS390, CPU_CMOS}, + {"DS390F", CPU_DS390F, CPU_CMOS}, + {NULL, 0, 0} +}; + + +/* End of globals.cc */ diff --git a/sim/ucsim/globals.h b/sim/ucsim/globals.h new file mode 100644 index 0000000..45c5492 --- /dev/null +++ b/sim/ucsim/globals.h @@ -0,0 +1,57 @@ +/* + * Simulator of microcontrollers (globals.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef GLOBALS_HEADER +#define GLOBALS_HEADER + +#include "ddconfig.h" + +// prj +#include "stypes.h" +#include "appcl.h" + + +extern class cl_app *application; + +extern char delimiters[]; + +extern struct id_element mem_ids[]; +extern struct id_element mem_classes[]; +extern struct id_element cpu_states[]; +extern struct id_element error_type_names[]; +//extern char *case_string(enum letter_case lcase, const char *str); + +extern char *warranty; +extern char *copying; + +extern struct cpu_entry *cpus; +extern struct cpu_entry cpus_51[]; + + +#endif + +/* End of globals.h */ diff --git a/sim/ucsim/gui.src/(c).1 b/sim/ucsim/gui.src/(c).1 new file mode 100644 index 0000000..d673f9f --- /dev/null +++ b/sim/ucsim/gui.src/(c).1 @@ -0,0 +1,25 @@ +/* + * Simulator of microcontrollers (@@F@@) + * + * Copyright (C) @@S@@,@@Y@@ Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ diff --git a/sim/ucsim/gui.src/Makefile.in b/sim/ucsim/gui.src/Makefile.in new file mode 100644 index 0000000..d3272db --- /dev/null +++ b/sim/ucsim/gui.src/Makefile.in @@ -0,0 +1,185 @@ +# +# uCsim gui.src/Makefile +# +# (c) Drotos Daniel, Talker Bt. 1999 +# + +SHELL = /bin/sh +CXX = @CXX@ +CPP = @CPP@ +CXXCPP = @CXXCPP@ +RANLIB = @RANLIB@ +INSTALL = @INSTALL@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +DEFS = $(subs -DHAVE_CONFIG_H,,@DEFS@) +CPPFLAGS = @CPPFLAGS@ -I$(srcdir) -I$(top_builddir) -I$(top_srcdir) \ + -I$(top_srcdir)/sim.src -I$(top_srcdir)/cmd.src +CFLAGS = @CFLAGS@ -Wall +CXXFLAGS = @CXXFLAGS@ -Wall +M_OR_MM = @M_OR_MM@ + +LIBS = @LIBS@ @CURSES_LIBS@ -L$(top_builddir) + +curses_ok = @curses_ok@ + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @infodir@ +srcdir = @srcdir@ +VPATH = @srcdir@ + +enable_serio = @enable_serio@ +PKGS = +ifeq ($(enable_serio),yes) +SERIO_PKG = serio.src +else +SERIO_PKG = +endif +CURSES_PKGS = $(SERIO_PKG) + +# Common code +OBJECTS = rec.o +SOURCES = $(patsubst %.o,%.cc,$(OBJECTS)) + +# uCsim only +UCSIM_OBJECTS = gui.o if.o +UCSIM_SOURCES = $(patsubst %.o,%.cc,$(UCSIM_OBJECTS)) + +# Tool only +TOOL_OBJECTS = +TOOL_SOURCES = $(patsubst %.o,%.cc,$(TOOL_OBJECTS)) + +ALL_SOURCES = $(SOURCES) $(UCSIM_SOURCES) $(TOOL_SOURCES) + + +# Compiling entire program or any subproject +# ------------------------------------------ +all: gui.src + +gui.src: checkconf gui_api +ifeq ($(curses_ok),yes) + @for pkg in dummy $(CURSES_PKGS); do\ + if test -f $$pkg/Makefile; then $(MAKE) -C $$pkg $$pkg; else : ; fi ;\ + done +endif +# @for pkg in $(PKGS); do\ +# $(MAKE) -C $$pkg $$pkg ;\ +# done + +gui_api: ucsim_lib tool_lib + + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: install_gui_api +ifeq ($(curses_ok),yes) + @for pkg in $(CURSES_PKGS); do\ + $(MAKE) -C $$pkg install ; cd ..;\ + done +endif + +install_gui_api: + + +# Deleting all the installed files +# -------------------------------- +uninstall: uninstall_gui_api +ifeq ($(curses_ok),yes) + @for pkg in $(CURSES_PKGS); do\ + $(MAKE) -C $$pkg uninstall ; cd ..;\ + done +endif + +uninstall_gui_api: + + +# Performing self-test +# -------------------- +check: check_local + @for pkg in $(CURSES_PKGS); do\ + $(MAKE) -C $$pkg check ; cd ..;\ + done + +check_local: + +test: test_local + @for pkg in $(CURSES_PKGS); do\ + $(MAKE) -C $$pkg test ; cd ..;\ + done + +test_local: + + +# Performing installation test +# ---------------------------- +installcheck: installcheck_gui_api + @for pkg in $(CURSES_PKGS); do\ + $(MAKE) -C $$pkg installcheck ; cd ..;\ + done + +installcheck_gui_api: + + +# Creating installation directories +# --------------------------------- +installdirs: + @for pkg in $(CURSES_PKGS); do\ + $(MAKE) -C $$pkg installdirs ; cd ..;\ + done + + +# Creating dependencies +# --------------------- +dep: Makefile.dep + +Makefile.dep: $(ALL_SOURCES) $(srcdir)/*.h + $(CXXCPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.cc,$^) >Makefile.dep + +# don't include Makefile.dep for the listed targets: +ifeq "$(findstring $(MAKECMDGOALS),uninstall uninstall_gui_api \ + check check_local test test_local \ + checkconf \ + clean_local clean distclean_local \ + distclean mostlyclean realclean)" "" + -include Makefile.dep +endif +include $(srcdir)/clean.mk + + +# My rules +# -------- +ucsim_lib: $(top_builddir)/libguiucsim.a + +$(top_builddir)/libguiucsim.a: $(OBJECTS) $(UCSIM_OBJECTS) + ar -rcu $*.a $(OBJECTS) $(UCSIM_OBJECTS) + $(RANLIB) $*.a + +tool_lib: $(top_builddir)/libguitool.a + +$(top_builddir)/libguitool.a: $(OBJECTS) $(TOOL_OBJECTS) + ar -rcu $*.a $(OBJECTS) $(TOOL_OBJECTS) + $(RANLIB) $*.a + +.cc.o: + $(CXX) $(CXXFLAGS) $(CPPFLAGS) -c $< -o $@ + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" freshconf;\ + fi + +# End of gui.src/Makefile diff --git a/sim/ucsim/gui.src/clean.mk b/sim/ucsim/gui.src/clean.mk new file mode 100644 index 0000000..826170c --- /dev/null +++ b/sim/ucsim/gui.src/clean.mk @@ -0,0 +1,45 @@ +# uCsim gui.src/clean.mk + +PKGS = serio.src + +# Deleting all files created by building the program +# -------------------------------------------------- +clean_local: + rm -f *core *[%~] *.[oa] a + rm -f .[a-z]*~ + +clean: clean_local + @for pkg in $(PKGS); do\ + $(MAKE) -C $$pkg clean;\ + done + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean_local: clean_local + rm -f config.cache config.log config.status + rm -f Makefile *.dep + +distclean: distclean_local + @for pkg in $(PKGS); do\ + $(MAKE) -C $$pkg distclean;\ + done + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean_local + @for pkg in $(PKGS); do\ + $(MAKE) -C $$pkg mostlyclean;\ + done + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean_local + @for pkg in $(PKGS); do\ + $(MAKE) $$pkg realclean;\ + done + +# End of gui.src/clean.mk diff --git a/sim/ucsim/gui.src/conf.mk b/sim/ucsim/gui.src/conf.mk new file mode 100644 index 0000000..d9a45d9 --- /dev/null +++ b/sim/ucsim/gui.src/conf.mk @@ -0,0 +1,12 @@ +# uCsim gui.src/conf.mk + +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_builddir) && $(SHELL) ./config.status + +# End of gui.src/conf.mk diff --git a/sim/ucsim/gui.src/gui.cc b/sim/ucsim/gui.src/gui.cc new file mode 100644 index 0000000..8565ca1 --- /dev/null +++ b/sim/ucsim/gui.src/gui.cc @@ -0,0 +1,59 @@ +/* + * Simulator of microcontrollers (gui.cc) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "guicl.h" + + +cl_gui::cl_gui(class cl_sim *asim): + cl_base() +{ + sim= asim; + ifs= new cl_list(2, 2, "ifs of a gui"); +} + +cl_gui::~cl_gui(void) +{ + delete ifs; +} + +class cl_gui_if * +cl_gui::if_by_obj(class cl_guiobj *o) +{ + int i; + + for (i= 0; i < ifs->count; i++) + { + class cl_gui_if *gi= (class cl_gui_if *)(ifs->at(i)); + if (gi->obj && + gi->obj == o) + return(gi); + } + return(0); +} + + +/* End of gui.src/gui.cc */ diff --git a/sim/ucsim/gui.src/guicl.h b/sim/ucsim/gui.src/guicl.h new file mode 100644 index 0000000..3fd3702 --- /dev/null +++ b/sim/ucsim/gui.src/guicl.h @@ -0,0 +1,58 @@ +/* + * Simulator of microcontrollers (guicl.h) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef GUISRC_GUICL_HEADER +#define GUISRC_GUICL_HEADER + +#include "ddconfig.h" + +// prj +#include "pobjcl.h" + +// sim +#include "simcl.h" + +// local +#include "ifcl.h" + + +class cl_gui: public cl_base +{ +public: + class cl_sim *sim; + class cl_list *ifs; +public: + cl_gui(class cl_sim *asim); + virtual ~cl_gui(void); + + virtual class cl_gui_if *if_by_obj(class cl_guiobj *o); +}; + + +#endif + +/* End of gui.src/guicl.h */ diff --git a/sim/ucsim/gui.src/if.cc b/sim/ucsim/gui.src/if.cc new file mode 100644 index 0000000..b93c2ce --- /dev/null +++ b/sim/ucsim/gui.src/if.cc @@ -0,0 +1,38 @@ +/* + * Simulator of microcontrollers (if.cc) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ifcl.h" + + +cl_gui_if::cl_gui_if(class cl_guiobj *o): + cl_base() +{ + obj= o; +} + + +/* End of gui.src/if.cc */ diff --git a/sim/ucsim/gui.src/ifcl.h b/sim/ucsim/gui.src/ifcl.h new file mode 100644 index 0000000..aec1025 --- /dev/null +++ b/sim/ucsim/gui.src/ifcl.h @@ -0,0 +1,51 @@ +/* + * Simulator of microcontrollers (guiifcl.h) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef GUISRC_IFCL_HEADER +#define GUISRC_IFCL_HEADER + +#include "ddconfig.h" + +// prj +#include "pobjcl.h" + +// sim +#include "guiobjcl.h" + + +class cl_gui_if: public cl_base +{ +public: + class cl_guiobj *obj; // Object inspected by the GUI tool +public: + cl_gui_if(class cl_guiobj *o); +}; + + +#endif + +/* End of gui.src/ifcl.h */ diff --git a/sim/ucsim/gui.src/obsolete/a.cc b/sim/ucsim/gui.src/obsolete/a.cc new file mode 100644 index 0000000..81d62c3 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/a.cc @@ -0,0 +1,87 @@ +#include +#include + +int sfr[4]; +int port[4]; + +void +init_panel(PANEL *p) +{ + int mask, x, y; + int na, ha; + int cursor= 2; + WINDOW *w= panel_window(p); + + if (has_colors()) + { + na= COLOR_PAIR(1); + ha= COLOR_PAIR(2); + } + else + { + na= A_NORMAL; + ha= A_STANDOUT; + } + //wattron(w, COLOR_PAIR); + x= 0; + for (mask= 1, y= 0; mask < 0x100; mask<<= 1,y++) + { + wattrset(w, (y==cursor)?ha:na); + mvwprintw(w, y,x, "%s", (sfr[0]&mask)?"High":" Low"); + } +} + +wchar_t +wait_input(PANEL *p) +{ + WINDOW *w= panel_window(p); + wchar_t c; + + c= wgetch(w); + printw("%d 0x%x\n",c,c); + return(c); +} + +int +main(int argc, char *argv[]) +{ + wchar_t c; + + initscr(); /* initialize the curses library */ + keypad(stdscr, TRUE); /* enable keyboard mapping */ + nonl(); /* tell curses not to do NL->CR/NL on output */ + cbreak(); /* take input chars one at a time, no wait for \n */ + noecho(); /* don't echo input */ + if (has_colors()) + { + start_color(); + printw("has %d colors and %d pairs\n", COLORS, COLOR_PAIRS); + init_pair(1, COLOR_WHITE, COLOR_BLUE); + init_pair(2, COLOR_WHITE, COLOR_RED); + } + if (has_key(KEY_UP)) + printw("has UP KEY_UP=0x%x\n",KEY_UP); + else + printf("has no UP\n"); + c= getch(); + printw("got %d %x\n",c,c); + + WINDOW *w= newwin(10,10, 3,3); + keypad(w, TRUE); + PANEL *p= new_panel(w); + + sfr[0]= 0x5a; + init_panel(p); + update_panels(); + doupdate(); + c= wait_input(p); + //c= getch(); + + endwin(); + if (c==KEY_UP) + printf("got UP\n"); + else if (c==KEY_DOWN) + printf("got DOWN\n"); + else + printf("got \"%d\"\n", c); +} diff --git a/sim/ucsim/gui.src/obsolete/app.cc b/sim/ucsim/gui.src/obsolete/app.cc new file mode 100644 index 0000000..309497b --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/app.cc @@ -0,0 +1,171 @@ +/* + * Simulator of microcontrollers (app.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include + +#include "appcl.h" +#include "deskcl.h" + + +cl_app::cl_app(char *iname): + cl_group(iname, this) +{ + drawn= 0; +} + +cl_app::~cl_app(void) +{ + endwin(); +} + +int +cl_app::init(void) +{ + initscr(); + keypad(stdscr, TRUE); + nonl(); + cbreak(); + noecho(); + + pos= new cl_box(0,0, COLS, LINES); + cl_view::init(); + state|= SF_SELECTED;//select(); + class cl_box b(*pos); + //b.move_rel(0,1); + //b.grow(0,-2); + if ((desk= mk_desk(&b))) + insert(desk); + desk->select(); + mk_views(desk); + + //update(); + update_panels(); + doupdate(); + return(0); +} + +class cl_gin * +cl_app::mk_input(void) +{ + class cl_gin *i= new cl_gin(); + i->init(); + i->add_input(stdin, 0); + return(i); +} + +int * +cl_app::mk_palette(void) +{ + int *p, i; + int colors; + + colors= 64; + p= (int*)malloc(colors * sizeof(int)); + if (has_colors()) + { + start_color(); + + init_pair(i= C_WIN+C_WIN_NORMAL, COLOR_YELLOW, COLOR_BLUE); + p[i]= COLOR_PAIR(i)|A_BOLD; + for (i= 1; i < colors; i++) + p[i]= p[C_WIN+C_WIN_NORMAL]; + // desktop + init_pair(i= C_DSK_BG, COLOR_BLACK, COLOR_WHITE); + p[i]= COLOR_PAIR(i); + // menus and status bar + init_pair(i= C_DSK_NORMAL, COLOR_WHITE, COLOR_BLUE); + p[i]= COLOR_PAIR(i)|A_BOLD; + init_pair(i= C_DSK_DISABLED, COLOR_WHITE, COLOR_BLUE); + p[i]= COLOR_PAIR(i); + // window + init_pair(i= C_WIN+C_WIN_FPASSIVE, COLOR_WHITE, COLOR_BLUE); + p[i]= COLOR_PAIR(i); + init_pair(i= C_WIN+C_WIN_FACTIVE, COLOR_WHITE, COLOR_BLUE); + p[i]= COLOR_PAIR(i)|A_BOLD; + init_pair(i= C_WIN+C_WIN_SELECTED, COLOR_YELLOW, COLOR_RED); + p[i]= COLOR_PAIR(i)|A_BOLD; + } + else + { + for (i= 0; i < colors; i++) + p[i]= A_NORMAL; + p[C_WIN+C_WIN_FACTIVE]|= A_BOLD; + p[C_WIN+C_WIN_SELECTED]|= A_REVERSE; + } + return(p); +} + +class cl_group * +cl_app::mk_desk(class cl_box *ipos) +{ + class cl_group *d= new cl_desk(ipos, "desktop", this); + d->init(); + return(d); +} + + +int +cl_app::handle_event(struct t_event *event) +{ + if (!cl_group::handle_event(event)) + { + if (event->what == EV_KEY) + switch (event->event.key) + { + case KEY_BREAK: case KEY_EXIT: + event->what= EV_COMMAND; + event->event.msg.cmd= CMD_QUIT; + break; + } + } + return(0); +} + +int +cl_app::run(void) +{ + struct t_event event; + + drawn= 0; + while (get_event(&event)) + { + if (!handle_event(&event)) + { + if (event.what == EV_COMMAND && + event.event.msg.cmd == CMD_QUIT) + return(0); + unhandled(&event); + } + if (drawn) + update(); + drawn= 0; + } + return(0); +} + + +/* End of gui.src/app.cc */ diff --git a/sim/ucsim/gui.src/obsolete/appcl.h b/sim/ucsim/gui.src/obsolete/appcl.h new file mode 100644 index 0000000..92a80c9 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/appcl.h @@ -0,0 +1,54 @@ +/* + * Simulator of microcontrollers (appcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef APPCL_HEADER +#define APPCL_HEADER + +#include "groupcl.h" + + +class cl_app: public cl_group +{ +public: + class cl_group *desk; + int drawn; +public: + cl_app(char *iname); + ~cl_app(void); + virtual int init(void); + virtual class cl_gin *mk_input(void); + virtual int *mk_palette(void); + virtual class cl_group *mk_desk(class cl_box *ipos); + + virtual int handle_event(struct t_event *event); + virtual int run(void); +}; + + +#endif + +/* End of gui.src/appcl.h */ diff --git a/sim/ucsim/gui.src/obsolete/bg.cc b/sim/ucsim/gui.src/obsolete/bg.cc new file mode 100644 index 0000000..d854d30 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/bg.cc @@ -0,0 +1,63 @@ +/* + * Simulator of microcontrollers (bg.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include + +#include "bgcl.h" + + +cl_bg::cl_bg(class cl_box *ipos, char *iname, class cl_app *iapp): + cl_view(ipos, iname, iapp) +{ + options&= ~OF_SELECTABLE; +} + +int * +cl_bg::mk_palette(void) +{ + int *p; + + p= (int*)malloc(1*sizeof(int)); + p[0]= C_DSK_BG; + return(p); +} + +int +cl_bg::draw(void) +{ + int x, y, color= get_color(0); + + wmove(window, 0, 0); + wattrset(window, color); + for (y= 0; y < pos->h; y++) + for (x= 0; x < pos->w; x++) + waddch(window, ACS_CKBOARD); + return(0); +} + + +/* End of gui.src/bg.cc */ diff --git a/sim/ucsim/gui.src/obsolete/bgcl.h b/sim/ucsim/gui.src/obsolete/bgcl.h new file mode 100644 index 0000000..968ed81 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/bgcl.h @@ -0,0 +1,47 @@ +/* + * Simulator of microcontrollers (bgcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef BGCL_HEADER +#define BGCL_HEADER + + +#include "viewcl.h" +#include "appcl.h" + + +class cl_bg: public cl_view +{ +public: + cl_bg(class cl_box *ipos, char *iname, class cl_app *iapp); + virtual int *mk_palette(void); + virtual int draw(void); +}; + + +#endif + +/* End of gui.src/bgcl.h */ diff --git a/sim/ucsim/gui.src/obsolete/desk.cc b/sim/ucsim/gui.src/obsolete/desk.cc new file mode 100644 index 0000000..6808cd7 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/desk.cc @@ -0,0 +1,58 @@ +/* + * Simulator of microcontrollers (desk.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "deskcl.h" +#include "bgcl.h" + + +int +cl_desk::handle_event(struct t_event *event) +{ + if (cl_group::handle_event(event)) + return(1); + if (event->what == EV_KEY && + event->event.key == KEY_F(6)) + { + select_next(); + return(1); + } + return(0); +} + +int +cl_desk::mk_views(class cl_group *ins_to) +{ + class cl_box b(*pos); + + b.move_rel(0,1); + b.grow(0,-2); + insert(new cl_bg(&b, "background", app)); + return(0); +} + + +/* End of gui.src/desk.cc */ diff --git a/sim/ucsim/gui.src/obsolete/deskcl.h b/sim/ucsim/gui.src/obsolete/deskcl.h new file mode 100644 index 0000000..b3346b7 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/deskcl.h @@ -0,0 +1,42 @@ +/* + * Simulator of microcontrollers (deskcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "groupcl.h" + + +class cl_desk: public cl_group +{ +public: + cl_desk(class cl_box *ipos, char *iname, class cl_app *iapp): + cl_group(ipos, iname, iapp) {} + virtual int mk_views(class cl_group *ins_to); + + virtual int handle_event(struct t_event *event); +}; + + +/* End of gui.src/deskcl.h */ diff --git a/sim/ucsim/gui.src/obsolete/event.cc b/sim/ucsim/gui.src/obsolete/event.cc new file mode 100644 index 0000000..3207589 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/event.cc @@ -0,0 +1,126 @@ +/* + * Simulator of microcontrollers (event.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include + +//#include + +#include "eventcl.h" + + +cl_input_src::cl_input_src(FILE *ifile, class cl_view *iview) +{ + file= ifile; + view= iview; +} + + +cl_gin::cl_gin(void) +{ + FD_ZERO(&in_set); + max_fdes= 0; + inputs= new cl_list(1, 1); +} + +cl_gin::~cl_gin(void) +{ + delete inputs; +} + + +int +cl_gin::add_input(FILE *ifile, class cl_view *iview) +{ + int d= fileno(ifile); + + inputs->add(new cl_input_src(ifile, iview)); + if (d > max_fdes) + max_fdes= d; + FD_SET(d, &in_set); + return(0); +} + +class cl_input_src * +cl_gin::get_input_src(int fdes) +{ + int i; + + for (i= 0; i < inputs->count; i++) + { + class cl_input_src *s= (class cl_input_src *)(inputs->at(i)); + if (fileno(s->file) == fdes) + return(s); + } + return(0); +} + +int +cl_gin::get_event(struct t_event *event) +{ + fd_set set; + //static struct timeval timeout= {0,0}; + wchar_t c; + + //FD_ZERO(&set); + set= in_set; + //FD_SET(fileno(stdin), &set); + if(::select(/*fileno(stdin)*/max_fdes+1, + &set, NULL, NULL, + NULL/*&timeout*/) > 0) + { + int i; + for (i= 0; i < inputs->count; i++) + { + class cl_input_src *s= (class cl_input_src *)(inputs->at(i)); + if (!s->file || + !(FD_ISSET(fileno(s->file), &set))) + continue; + if (s->view) + { + if (s->file) + { + c= fgetc(s->file); + return(s->view->mk_event(event, s->file, c)); + } + } + else + if ((c= getch()) > 0) + { + event->what= EV_KEY; + event->event.key= c; + return(1); + } + } + } + + return(0); +} + + +/* End of gui.src/event.cc */ diff --git a/sim/ucsim/gui.src/obsolete/eventcl.h b/sim/ucsim/gui.src/obsolete/eventcl.h new file mode 100644 index 0000000..4077a72 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/eventcl.h @@ -0,0 +1,96 @@ +/* + * Simulator of microcontrollers (eventcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef EVENTCL_HEADER +#define EVENTCL_HEADER + +#include "ddconfig.h" + +#if FD_HEADER_OK +# include HEADER_FD +#endif + +#include "pobjcl.h" + +#include "viewcl.h" + + +#define EV_NOTHING 0x0000 +#define EV_MOUSE_DOWN 0x0001 +#define EV_MOUSE_UP 0x0002 +#define EV_MOUSE_MOVE 0x0004 +#define EV_MOUSE_AUTO 0x0008 +#define EV_KEY 0x0010 +#define EV_COMMAND 0x0100 +#define EV_BROADCAST 0x0200 + +// cathegories +#define EV_MOUSE (EV_MOUSE_DOWN|EV_MOUSE_UP|EV_MOUSE_MOVE|EV_MOUSE_AUTO) +#define EV_KEYBOARD EV_KEY +#define EV_MESSAGE 0xff00 + +#define CMD_QUIT 0 + +struct t_event { + int what; + union { + wchar_t key; + struct { + int cmd; + long param; + } msg; + } event; +}; + + +class cl_input_src: public cl_base +{ +public: + FILE *file; + class cl_view *view; + cl_input_src(FILE *ifile, class cl_view *iview); +}; + +class cl_gin: public cl_base +{ +public: + fd_set in_set; + int max_fdes; + cl_list *inputs; +public: + cl_gin(void); + ~cl_gin(void); + + virtual int add_input(FILE *ifile, class cl_view *iview); + virtual class cl_input_src *get_input_src(int fdes); + virtual int get_event(struct t_event *event); +}; + + +#endif + +/* End of gui.src/eventcl.h */ diff --git a/sim/ucsim/gui.src/obsolete/frame.cc b/sim/ucsim/gui.src/obsolete/frame.cc new file mode 100644 index 0000000..b6b00e8 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/frame.cc @@ -0,0 +1,76 @@ +/* + * Simulator of microcontrollers (frame.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include "i_string.h" + +#include "framecl.h" +#include "wincl.h" + + +cl_frame::cl_frame(class cl_box *ipos, class cl_view *iwindow, char *iname, + class cl_app *iapp): + cl_view(ipos, iname, iapp) +{ + win= iwindow; + options&= ~OF_SELECTABLE; +} + +int * +cl_frame::mk_palette(void) +{ + int *p; + + p= (int*)malloc(2*sizeof(int)); + p[0]= C_WIN_FPASSIVE; + p[1]= C_WIN_FACTIVE; + return(p); +} + +int +cl_frame::draw(void) +{ + char *t; + int color; + + color= get_color((win && (win->state&SF_SELECTED))?1:0); + wattrset(window, color); + box(window, ACS_VLINE, ACS_HLINE); + if (!(t= strdup(((class cl_win *)win)->get_title()))) + return(0); + if ((signed)strlen(t) > (pos->w)-4) + t[(pos->w)-4]= '\0'; + mvwprintw(window, 0,((pos->w)-strlen(t))/2, "[%s]", t); + free(t); + app->drawn++; + return(0); +} + + +/* End of gui.src/frame.cc */ diff --git a/sim/ucsim/gui.src/obsolete/framecl.h b/sim/ucsim/gui.src/obsolete/framecl.h new file mode 100644 index 0000000..6a3c06a --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/framecl.h @@ -0,0 +1,48 @@ +/* + * Simulator of microcontrollers (framecl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef FRAMELCL_HEADER +#define FRAMELCL_HEADER + +#include "viewcl.h" +#include "appcl.h" + + +class cl_frame: public cl_view +{ + class cl_view *win; +public: + cl_frame(class cl_box *ipos, class cl_view *iwindow, char *iname, + class cl_app *iapp); + virtual int *mk_palette(void); + virtual int draw(void); +}; + + +#endif + +/* End of gui.src/framecl.h */ diff --git a/sim/ucsim/gui.src/obsolete/group.cc b/sim/ucsim/gui.src/obsolete/group.cc new file mode 100644 index 0000000..45bb0e4 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/group.cc @@ -0,0 +1,393 @@ +/* + * Simulator of microcontrollers (group.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "groupcl.h" +#include "appcl.h" + + +cl_group::cl_group(class cl_box *ipos, char *iname, class cl_app *iapp): + cl_view(ipos, iname, iapp) +{ + current= 0; +} + +cl_group::cl_group(char *iname, class cl_app *iapp): + cl_view(iname, iapp) +{ + current= 0; +} + +cl_group::~cl_group(void) +{} + +int +cl_group::init(void) +{ + cl_view::init(); + mk_views(this); + return(0); +} + +int +cl_group::mk_views(class cl_group *ins_to) +{ + return(0); +} + + +/* + * Make output by drawing all subviews + */ + +static void do_draw_view(class cl_view *view) +{ + view->draw(); +} + +int +cl_group::draw(void) +{ + /*int i; + + for (i= 0; i < views->count; i++) + { + class cl_view *v= (class cl_view *)(views->at(i)); + v->draw(); + app->drawn++; + }*/ + for_each(do_draw_view); + return(0); +} + +/*int +cl_group::update(void) +{ + draw(); + update_panels(); + doupdate(); +}*/ + + +int +cl_group::handle_event(struct t_event *event) +{ + int handled= 0; + + if (event->what & (EV_KEY|EV_COMMAND)) + { + if (current) + handled= current->handle_event(event); + } + else if (event->what & EV_MESSAGE) + { + class cl_view *v= last; + do + { + handled= v->handle_event(event); + v= v->next; + } + while (! handled && + v != last); + } + return(handled); +} + + +/* + * Managing views + */ + +//class cl_view * +void +cl_group::insert(class cl_view *view) +{ + /*if (view && + view->ok()) + { + views->add_at(0, view); + view->parent= this; + view->select(); + //view->draw(); + return(view); + } + return(0);*/ + insert_before(view, first()); + if (view->options & OF_SELECTABLE) + view->select(); + draw(); +} + +void +cl_group::insert_before(class cl_view *view, class cl_view *target) +{ + unsigned int ss; + + if (view && + !(view->parent) && + (!target || + target->parent == this)) + { + ss= view->state; + //view->hide(); + insert_view(view, target); + /*if (ss & SF_VISIBLE) + view->show();*/ + if (state & SF_ACTIVE) + view->change_state(SF_ACTIVE, 1); + } +} + +void +cl_group::insert_view(class cl_view *view, class cl_view *target) +{ + view->parent= this; + if (target) + { + target= target->prev(); + view->next= target->next; + target->next= view; + } + else + { + if (!last) + view->next= view; + else + { + view->next= last->next; + last->next= view; + } + last= view; + } +} + +class cl_view * +cl_group::first(void) +{ + if (!last) + return(0); + return(last->next); +} + + +/*class cl_view * +cl_group::get_by_state(unsigned int what, int enabled) +{ + int i; + + for (i= 0; i < views->count; i++) + { + class cl_view *v= (class cl_view *)(views->at(i)); + if ((enabled && + (state&what)) + || + (!enabled && + ((~state)&what)) + ) + return(v); + } + return(0); +}*/ + +/*int +cl_group::select(void) +{ +}*/ + +/*int +cl_group::unselect(void) +{ +}*/ + +int +cl_group::select_next() +{ + /* int start, i; + class cl_view *v; + + if (views->count <= 1) + return(1); + if (current) + start= views->index_of(current); + else + if ((v= get_by_state(SF_SELECTED, 1))) + start= views->index_of(v); + else + if ((v= get_by_state(SF_FOCUSED, 1))) + start= views->index_of(v); + else + start= 0; + i= (start+1)%(views->count); + while (i != start) + { + v= (class cl_view *)(views->at(i)); + if ((v->options & OF_SELECTABLE) && + v->select()) + { + //update(); + return(1); + } + i= (i+1)%(views->count); + }*/ + return(0); +} + +int +cl_group::select_prev() +{ + /* int start, i; + class cl_view *v; + + if (views->count <= 1) + return(1); + if (current) + start= views->index_of(current); + else + if ((v= get_by_state(SF_SELECTED, 1))) + start= views->index_of(v); + else + if ((v= get_by_state(SF_FOCUSED, 1))) + start= views->index_of(v); + else + start= 0; + i= start-1; if (i < 0) i= views->count-1; + while (i != start) + { + v= (class cl_view *)(views->at(i)); + if ((v->options & OF_SELECTABLE) && + v->select()) + { + //update(); + return(1); + } + i= start-1; if (i < 0) i= views->count-1; + }*/ + return(0); +} + +class cl_view * +cl_group::current_sub_view(void) +{ + return(current); +} + +void +cl_group::for_each(void (*func)(class cl_view *view)) +{ + class cl_view *v; + + if (!last) + return; + v= last->next; + do + { + func(v); + v= v->next; + } + while (v != last); +} + +void +cl_group::set_current(class cl_view *view) +{ + //current= view; + if (current == view) + return; + //lock(); + /*focus_view(view, 0);*/ + if ((state & SF_FOCUSED) && + (current != 0)) + current->change_state(SF_FOCUSED, 0); + //if (mode!=ENTER_SELECT) select_view(current, 0); + if (current) + current->change_state(SF_SELECTED, 0); + //if (mode!=LEAVE_SELECT) select_view(view, 1); + if (view) + view->change_state(SF_SELECTED, 1); + //focuse_view(view, 1); + if ((state & SF_FOCUSED) && + (view != 0)) + view->change_state(SF_SELECTED, 1); + current= view; + //unlock(); +} + +/*int +cl_group::terminal_view(void) +{ + return(views->count == 0); +}*/ + +static unsigned int grp_what, grp_en; + +static void +do_set_state(class cl_view *v) +{ + v->change_state(grp_what, grp_en); +} + +void +cl_group::change_state(unsigned int what, int enable) +{ + cl_view::change_state(what, enable); + /*if (enable && + (what & SF_SELECTED)) + { + class cl_view *v= get_by_state(SF_SELECTED, 1); + if (v) + { + current= v; + current->change_state(SF_FOCUSED, 1); + current->change_state(SF_SELECTED, 1); + } + else + { + if ((v= get_by_state(SF_FOCUSED, 1))) + { + current= v; + current->change_state(SF_SELECTED, 1); + } + } + }*/ + switch (what) + { + case SF_ACTIVE: + //lock(); + grp_what= what; + grp_en= enable; + for_each(do_set_state); + //unlock(); + break; + case SF_FOCUSED: + if (current) + current->change_state(SF_FOCUSED, enable); + break; + } + draw(); +} + + +/* End of gui.src/group.cc */ diff --git a/sim/ucsim/gui.src/obsolete/groupcl.h b/sim/ucsim/gui.src/obsolete/groupcl.h new file mode 100644 index 0000000..87f0ba8 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/groupcl.h @@ -0,0 +1,70 @@ +/* + * Simulator of microcontrollers (groupcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef GROUPCL_HEADER +#define GROUPCL_HEADER + +#include "viewcl.h" + +class cl_group: public cl_view +{ +public: + class cl_view *current; + +public: + cl_group(class cl_box *ipos, char *iname, class cl_app *iapp); + cl_group(char *iname, class cl_app *iapp); + ~cl_group(void); + virtual int init(void); + virtual int mk_views(class cl_group *ins_to); + virtual int is_group(void) {return(1);} + + virtual int draw(void); + //virtual int update(void); + + virtual int handle_event(struct t_event *event); + + virtual /*class cl_view **/void insert(class cl_view *view); + virtual void insert_before(class cl_view *view, class cl_view *target); + virtual void insert_view(class cl_view *view, class cl_view *target); + virtual class cl_view *first(void); + virtual void for_each(void (*func)(class cl_view *view)); + //virtual class cl_view *get_by_state(unsigned int what, int enabled); + //virtual int select(void); + //virtual int unselect(void); + virtual int select_next(); + virtual int select_prev(); + virtual class cl_view *current_sub_view(void); + virtual void set_current(class cl_view *view); + //virtual int terminal_view(void); + virtual void change_state(unsigned int what, int enable); +}; + + +#endif + +/* End of gui.src/groupcl.h */ diff --git a/sim/ucsim/gui.src/obsolete/label.cc b/sim/ucsim/gui.src/obsolete/label.cc new file mode 100644 index 0000000..90c54a3 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/label.cc @@ -0,0 +1,74 @@ +/* + * Simulator of microcontrollers (label.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include "i_string.h" + +#include "labelcl.h" + + +cl_label::cl_label(class cl_box *ipos, class cl_app *iapp, char *ilabel): + cl_view(ipos, "label", iapp) +{ + options&= ~OF_SELECTABLE; + if (!ilabel || + !(*ilabel)) + label= strdup(""); + else + label= strdup(ilabel); +} + +cl_label::~cl_label(void) +{ + free(label); +} + +int * +cl_label::mk_palette(void) +{ + int *p; + + p= (int*)malloc(1*sizeof(int)); + p[0]= C_WIN_NORMAL; + return(p); +} + +int +cl_label::draw(void) +{ + int color= get_color(0); + + cl_view::draw(); + wattrset(window, color); + mvwprintw(window, 0,0, "%s", label); + return(0); +} + + +/* End of gui.src/label.cc */ diff --git a/sim/ucsim/gui.src/obsolete/labelcl.h b/sim/ucsim/gui.src/obsolete/labelcl.h new file mode 100644 index 0000000..79d6288 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/labelcl.h @@ -0,0 +1,50 @@ +/* + * Simulator of microcontrollers (labelcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef LABELCL_HEADER +#define LABELCL_HEADER + + +#include "viewcl.h" +#include "appcl.h" + + +class cl_label: public cl_view +{ +public: + char *label; +public: + cl_label(class cl_box *ipos, class cl_app *iapp, char *ilabel); + ~cl_label(void); + virtual int *mk_palette(void); + virtual int draw(void); +}; + + +#endif + +/* End of gui.src/labelcl.h */ diff --git a/sim/ucsim/gui.src/obsolete/palette.h b/sim/ucsim/gui.src/obsolete/palette.h new file mode 100644 index 0000000..6f9d383 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/palette.h @@ -0,0 +1,44 @@ +/* + * Simulator of microcontrollers (palette.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef PALETTE_HEADER +#define PALETTE_HEADER + + +#define C_DSK_BG 1 +#define C_DSK_NORMAL 2 +#define C_DSK_DISABLED 3 + +#define C_WIN 8 +#define C_WIN_FPASSIVE 0 +#define C_WIN_FACTIVE 1 +#define C_WIN_NORMAL 5 +#define C_WIN_SELECTED 6 + +#endif + +/* End of gui.src/palette.h */ diff --git a/sim/ucsim/gui.src/obsolete/portmon.src/(c).1 b/sim/ucsim/gui.src/obsolete/portmon.src/(c).1 new file mode 100644 index 0000000..d673f9f --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/portmon.src/(c).1 @@ -0,0 +1,25 @@ +/* + * Simulator of microcontrollers (@@F@@) + * + * Copyright (C) @@S@@,@@Y@@ Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ diff --git a/sim/ucsim/gui.src/obsolete/portmon.src/Makefile.in b/sim/ucsim/gui.src/obsolete/portmon.src/Makefile.in new file mode 100644 index 0000000..125f6af --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/portmon.src/Makefile.in @@ -0,0 +1,131 @@ +# +# uCsim gui.src/portmon.src/Makefile +# +# (c) Drotos Daniel, Talker Bt. 1999 +# + +SHELL = /bin/sh +CXX = @CXX@ +CPP = @CPP@ +CXXCPP = @CXXCPP@ +RANLIB = @RANLIB@ +INSTALL = @INSTALL@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ +PKGDIR = ../ + +DEFS = $(subs -DHAVE_CONFIG_H,,@DEFS@) +CPPFLAGS = @CPPFLAGS@ -I. -I$(top_builddir) -I$(PKGDIR) +CFLAGS = @CFLAGS@ -Wall +CXXFLAGS = @CXXFLAGS@ -Wall +M_OR_MM = @M_OR_MM@ + +LIBS = -L$(top_builddir) -L$(PKGDIR) -lgui @CURSES_LIBS@ -lutil @LIBS@ + +curses_ok = @curses_ok@ + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @infodir@ +srcdir = @srcdir@ + +OBJECTS = portmon.o \ + pmapp.o port.o + + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf otherlibs portmon.src + + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: all installdirs + $(INSTALL) -s portmon $(bindir) + + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(bindir)/portmon + + +# Performing self-test +# -------------------- +check: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + test -d $(bindir) || $(INSTALL) -d $(bindir) + + +# Creating dependencies +# --------------------- +dep: Makefile.dep + +Makefile.dep: $(srcdir)/*.cc $(top_builddir)/*.h $(PKGDIR)/*.h + $(CXXCPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.cc,$^) >Makefile.dep + +-include Makefile.dep +include clean.mk + +#parser.cc: parser.y + +#plex.cc: plex.l + +# My rules +# -------- +ifeq ($(curses_ok),yes) +portmon.src: portmon +else +portmon.src: +endif + +portmon: $(OBJECTS) $(top_builddir)/*.a $(PKGDIR)/*.a + $(CXX) $(CXXFLAGS) -o portmon $(OBJECTS) $(LIBS) + +ifeq ($(curses_ok),yes) +otherlibs: + $(MAKE) -C $(top_builddir) libs + $(MAKE) -C $(PKGDIR) libs +else +otherlibs: +endif + +.cc.o: + $(CXX) $(CXXFLAGS) $(CPPFLAGS) -c $< -o $@ + +.y.cc: + rm -f $*.cc $*.h + $(YACC) -d $< + mv y.tab.c $*.cc + mv y.tab.h $*.h + +.l.cc: + rm -f $*.cc + $(LEX) -t $< >$*.cc + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" freshconf;\ + fi + +# End of gui.src/portmon.src/Makefile.in diff --git a/sim/ucsim/gui.src/obsolete/portmon.src/clean.mk b/sim/ucsim/gui.src/obsolete/portmon.src/clean.mk new file mode 100644 index 0000000..02760e9 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/portmon.src/clean.mk @@ -0,0 +1,28 @@ +# uCsim gui.src/portmon.src/clean.mk + +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + rm -f portmon + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f config.cache config.log config.status + rm -f Makefile *.dep + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean + +# End of gui.src/portmon.src/clean.mk diff --git a/sim/ucsim/gui.src/obsolete/portmon.src/conf.mk b/sim/ucsim/gui.src/obsolete/portmon.src/conf.mk new file mode 100644 index 0000000..344f4f0 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/portmon.src/conf.mk @@ -0,0 +1,12 @@ +# uCsim gui.src/portmon.src/conf.mk + +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_builddir) && $(SHELL) ./config.status + +# End of gui.src/portmon.src/conf.mk diff --git a/sim/ucsim/gui.src/obsolete/portmon.src/pmapp.cc b/sim/ucsim/gui.src/obsolete/portmon.src/pmapp.cc new file mode 100644 index 0000000..2605a22 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/portmon.src/pmapp.cc @@ -0,0 +1,113 @@ +/* + * Simulator of microcontrollers (pmapp.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "wincl.h" +#include "labelcl.h" + +#include "pmappcl.h" +#include "portcl.h" + + +int +cl_pmapp::mk_views(class cl_group *ins_to) +{ + class cl_view *v; + //class cl_win *w; + class cl_box *b; + + b= new cl_box(0,0,0,0); + + if (!ins_to) + return(0); + + b->set(43,2,14,13); + v= new cl_portw(b, 3, "Port #3", this); + v->init(); + ins_to->insert(v); + + b->set(29,2,14,13); + v= new cl_portw(b, 2, "Port #2", this); + v->init(); + ins_to->insert(v); + /* + b->set(15,2,14,13); + ins_to->insert(v= new cl_portw(b, 1, "Port #1", this)); + v->init(); + + b->set(1,2,14,13); + ins_to->insert(v= new cl_portw(b, 0, "Port #0", this)); + v->init(); + + b->set(59,3,19,11); + v= new cl_label(b, this, +"Next win: n,TAB\nPrev win: p\nCursor : u,d,l,r,\n arrows\nToggle : space,CR\nQuit : q"); + v->init(); + b->move_rel(-1,-1); + b->grow(2,2); + + b->set(58,2,21,13); + w= new cl_win(b, "Help", this); + w->options&= ~OF_SELECTABLE; + w->init(); + w->insert(v); + ins_to->insert(w); + w->draw(); + */ + delete b; + + return(0); +} + +int * +cl_pmapp::mk_palette(void) +{ + return(cl_app::mk_palette()); +} + +int +cl_pmapp::handle_event(struct t_event *event) +{ + if (event->what == EV_KEY) + switch (event->event.key) + { + case 'q': + event->what= EV_COMMAND; + event->event.msg.cmd= CMD_QUIT; + return(0); + case 'p': + desk->select_prev(); + return(1); + case 'n': case '\t': + desk->select_next(); + return(1); + + } + return(cl_app::handle_event(event)); +} + + +/* End of gui.src/portmon.src/pmapp.cc */ diff --git a/sim/ucsim/gui.src/obsolete/portmon.src/pmappcl.h b/sim/ucsim/gui.src/obsolete/portmon.src/pmappcl.h new file mode 100644 index 0000000..d9f3011 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/portmon.src/pmappcl.h @@ -0,0 +1,48 @@ +/* + * Simulator of microcontrollers (pmappcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef PMAPPCL_HEADER +#define PMAPPCL_HEADER + +#include "appcl.h" + + +class cl_pmapp: public cl_app +{ +public: + cl_pmapp(char *iname): cl_app(iname) {} + + virtual int mk_views(class cl_group *ins_to); + virtual int *mk_palette(void); + + virtual int handle_event(struct t_event *event); +}; + + +#endif + +/* End of gui.src/portmon.src/pmappcl.h */ diff --git a/sim/ucsim/gui.src/obsolete/portmon.src/port.cc b/sim/ucsim/gui.src/obsolete/portmon.src/port.cc new file mode 100644 index 0000000..010ec3e --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/portmon.src/port.cc @@ -0,0 +1,143 @@ +/*@1@*/ + +#include "portcl.h" + + +/* + * Viewer of the port + */ + +cl_port::cl_port(class cl_box *ipos, int iid, char *iname, class cl_app *iapp): + cl_view(ipos, iname, iapp) +{ + id= iid; + sfr= 0; + pin= 0; + curs_x= curs_y= 0; +} + +int +cl_port::draw(void) +{ + int x, y, mask, hc, nc; + + cl_view::draw(); + + nc= hc= get_color(C_WIN_NORMAL); + if (state & SF_SELECTED) + hc= get_color(C_WIN_SELECTED); + mvwprintw(window, 0,0, "SFR PORT PIN"); + for (x= 0, mask= 0x80, y= 1; mask; mask>>= 1,y++) + { + wattrset(window, (curs_x)?nc:(curs_y==y-1?hc:nc)); + mvwprintw(window, y,x, " %c", (sfr&mask)?'1':'0'); + } + wattrset(window, nc); + for (x= 5, mask= 0x80, y= 1; mask; mask>>= 1,y++) + mvwprintw(window, y,x, "%c", (sfr&pin&mask)?'1':'0'); + for (x=9, mask= 0x80, y= 1; mask; mask>>= 1,y++) + { + wattrset(window, curs_x?(curs_y==y-1?hc:nc):nc); + mvwprintw(window, y,x, "%c ", (pin&mask)?'1':'0'); + } + wattrset(window, nc); + mvwprintw(window, 9,0, "0x%02x 0x%02x", sfr, pin); + mvwprintw(window, 10,4, "0x%02x", sfr&pin); + app->drawn++; + return(0); +} + +int +cl_port::handle_event(struct t_event *event) +{ + if (event->what == EV_KEY) + switch (event->event.key) + { + case KEY_HOME: + curs_y= 0; draw(); return(1); + case KEY_A1: + curs_x= curs_y= 0; draw(); return(1); + case KEY_A3: + curs_y= 0; curs_x= 1; draw(); return(1); + case KEY_C1: + curs_x= 0; curs_y= 7; draw(); return(1); + case KEY_C3: + curs_x= 1; curs_y= 7; draw(); return(1); + case KEY_LEFT: case KEY_RIGHT: case 'j': case 'k': case 'l': case 'r': + if (curs_x) + curs_x= 0; + else + curs_x= 1; + draw(); + return(1); + case KEY_UP: case 'u': + curs_y--; + if (curs_y < 0) + curs_y= 7; + draw(); + return(1); + case KEY_DOWN: case 'd': + curs_y++; + if (curs_y > 7) + curs_y= 0; + draw(); + return(1); + case ' ': case '\n': case '\r': + if (curs_x) + toggle_pin(7-curs_y); + else + toggle_sfr(7-curs_y); + return(1); + } + return(cl_view::handle_event(event)); +} + +int +cl_port::toggle_sfr(int bitnr) +{ + int mask= 1<init(); + return(v); +} + +int +cl_portw::handle_event(struct t_event *event) +{ + return(cl_win::handle_event(event)); +} + + +/* End of gui.src/portmap.src/port.cc */ diff --git a/sim/ucsim/gui.src/obsolete/portmon.src/portcl.h b/sim/ucsim/gui.src/obsolete/portmon.src/portcl.h new file mode 100644 index 0000000..760f0ad --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/portmon.src/portcl.h @@ -0,0 +1,64 @@ +/* + * Simulator of microcontrollers (portcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef PORTCL_HEADER +#define PORTCL_HEADER + +#include "viewcl.h" +#include "wincl.h" + + +class cl_port: public cl_view +{ +public: + int id; + int sfr, pin; + int curs_x, curs_y; +public: + cl_port(class cl_box *ipos, int iid, char *iname, class cl_app *iapp); + + virtual int draw(void); + virtual int handle_event(struct t_event *event); + int toggle_sfr(int bitnr); + int toggle_pin(int bitnr); +}; + +class cl_portw: public cl_win +{ +public: + int id; +public: + cl_portw(class cl_box *ipos, int iid, char *ititle, class cl_app *iapp); + virtual class cl_view *mk_intern(class cl_box *ipos); + + virtual int handle_event(struct t_event *event); +}; + + +#endif + +/* End of gui.src/portmon.src/portcl.h */ diff --git a/sim/ucsim/gui.src/obsolete/portmon.src/portmon.cc b/sim/ucsim/gui.src/obsolete/portmon.src/portmon.cc new file mode 100644 index 0000000..50d3b3a --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/portmon.src/portmon.cc @@ -0,0 +1,68 @@ +/* + * Simulator of microcontrollers (portmon.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include + +#include "pmappcl.h" + + +class cl_pmapp *app; + +void xx(class cl_view *v) +{ + fprintf(stderr,"%s 0x%x ", v->name, v->state); +} + +int +main(int argc, char *argv) +{ + app= new cl_pmapp("portmon"); + app->init(); + { + class cl_view *v= app; + while (v) + { + if (v->is_group()) + { + class cl_group *g= (class cl_group *)v; + fprintf(stderr, "%s->%s\n", g->name,(g->current)?(g->current->name):"none"); + g->for_each(xx); + fprintf(stderr, "\n"); + v= g->current; + } + else + v= 0; + } + } + app->run(); + //getch(); + delete app; + return(0); +} + + +/* End of gui.src/portmon.src/portmon.cc */ diff --git a/sim/ucsim/gui.src/obsolete/view.cc b/sim/ucsim/gui.src/obsolete/view.cc new file mode 100644 index 0000000..9ead6f4 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/view.cc @@ -0,0 +1,356 @@ +/* + * Simulator of microcontrollers (view.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include "i_string.h" + +#include "appcl.h" + + +/* + * Box + */ + +cl_box::cl_box(int ix, int iy, int iw, int ih): + cl_base() +{ + x= ix; + y= iy; + w= iw; + h= ih; +} + +void +cl_box::set(int ix, int iy, int iw, int ih) +{ + x= ix; + y= iy; + w= iw; + h= ih; +} + +void +cl_box::move_rel(int dx, int dy) +{ + x+= dx; + y+= dy; +} + +void +cl_box::grow(int dw, int dh) +{ + w+= dw; + h+= dh; +} + + +/* + * Astbract of a viewer + ****************************************************************************** + */ + +cl_view::cl_view(class cl_box *ipos, char *iname, class cl_app *iapp): + cl_base() +{ + pos= new cl_box(ipos->x,ipos->y, ipos->w,ipos->h); + if ((window= newwin(pos->h,pos->w, pos->y,pos->x))) + { + leaveok(window, TRUE); + panel= new_panel(window); + } + else + { + panel= 0; + delwin(window); + window= 0; + } + parent= 0; + next= last= 0; + app= iapp; + state= SF_NOTHING; + options= OF_SELECTABLE; + if (!iname || + !(*iname)) + { + name= (char*)malloc(100); + sprintf(name, "view%p", this); + } + else + name= strdup(iname); +} + +cl_view::cl_view(char *iname, class cl_app *iapp): + cl_base() +{ + window= 0; + panel= 0; + parent= 0; + next= last= 0; + app= iapp; + state= SF_NOTHING; + options= OF_SELECTABLE; + if (!iname || + !(*iname)) + { + name= (char*)malloc(100); + sprintf(name, "view%p", this); + } + else + name= strdup(iname); +} + +cl_view::~cl_view(void) +{ + if (panel) + del_panel(panel); + if (window) + delwin(window); + if (palette) + free(palette); + if (name) + free(name); +} + +int +cl_view::init(void) +{ + input= mk_input(); + palette= mk_palette(); + //draw(); + return(0); +} + +class cl_gin * +cl_view::mk_input(void) +{ + return(0); +} + +int * +cl_view::mk_palette(void) +{ + return(0); +} + +int +cl_view::ok(void) +{ + return(window && panel); +} + + +/* + * Make output into the view + */ + +int +cl_view::draw(void) +{ + int color, x, y; + + color= get_color(palette?0:C_WIN_NORMAL); + + wattrset(window, color); + for (y= 0; y < pos->h; y++) + for (x= 0; x < pos->w; x++) + mvwaddch(window, y,x, ' '); + app->drawn++; + + return(0); +} + +int +cl_view::update(void) +{ + draw(); + update_panels(); + doupdate(); + return(0); +} + +int +cl_view::get_color(int color) +{ + int *p; + class cl_view *v; + + v= this; + while (v) + { + p= v->get_palette(); + if (p) + color= p[color]; + v= v->parent; + } + return(color); +} + +int * +cl_view::get_palette(void) +{ + return(palette); +} + + +/* + * Event handling + */ + +int +cl_view::get_event(struct t_event *event) +{ + if (parent) + return(parent->get_event(event)); + if (input) + return(input->get_event(event)); + return(0); +} + +int +cl_view::handle_event(struct t_event *event) +{ + return(0); +} + +int +cl_view::unhandled(struct t_event *event) +{ + return(0); +} + +int +cl_view::mk_event(struct t_event *event, FILE *f, int key) +{ + event->what= EV_KEY; + event->event.key= key; + return(1); +} + + +class cl_view * +cl_view::prev(void) +{ + class cl_view *v; + + v= next; + while (v != this) + v= v->next; + return(v); +} + +class cl_view * +cl_view::prev_view(void) +{ + if (parent && + parent->first() == this) + return(0); + else + return(prev()); +} + + +int +cl_view::select(void) +{ + /* class cl_view *v; + + if (!(options & OF_SELECTABLE)) + return(0); + if (state & SF_SELECTED) + return(1); + if (parent && + !(parent->select())) + return(0); + if (parent) + { + v= parent->current_sub_view(); + if (v && + v != this) + v->unselect(); + parent->set_current(this); + } + change_state(SF_FOCUSED, 1); + change_state(SF_SELECTED, 1); + draw(); + return(1);*/ + if (options & OF_SELECTABLE) + if (parent) + parent->set_current(this); + return(1); +} + +int +cl_view::unselect(void) +{ + class cl_view *csv= current_sub_view(); + if (csv && + !(csv->unselect())) + return(0); + if (!terminal_view()) + change_state(SF_FOCUSED, 0); + change_state(SF_SELECTED, 0); + draw(); + return(1); +} + +class cl_view * +cl_view::current_sub_view(void) +{ + return(0); +} + +int +cl_view::terminal_view(void) +{ + return(1); +} + +void +cl_view::change_state(unsigned int what, int enable) +{ + if (enable) + state|= what; + else + state&= ~what; + if (parent) + { + switch (what) + { + case SF_FOCUSED: + //reset_cursor(); + /*message(parent, EV_BROADCAST, + (enable)?CM_RECEIVED_FOCUS:CM_RELEASED_FOCUS, this);*/ + break; + } + } + draw(); +} + + +/* End of gui.src/view.cc */ diff --git a/sim/ucsim/gui.src/obsolete/viewcl.h b/sim/ucsim/gui.src/obsolete/viewcl.h new file mode 100644 index 0000000..668fee1 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/viewcl.h @@ -0,0 +1,118 @@ +/* + * Simulator of microcontrollers (viewcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef VIEWCL_HEADER +#define VIEWCL_HEADER + +#include +#include + +#include "pobjcl.h" + +#include "palette.h" +#include "eventcl.h" + + +// Status flags +#define SF_NOTHING 0x0000 +#define SF_SELECTED 0x0001 +#define SF_FOCUSED 0x0002 +#define SF_ACTIVE 0x0004 + +// Option flags +#define OF_NOTHING 0x0000 +#define OF_SELECTABLE 0x0001 + + +class cl_box: public cl_base +{ +public: + int x, y; + int w, h; +public: + cl_box(int ix, int iy, int iw, int ih); + void set(int ix, int iy, int iw, int ih); + void move_rel(int dx, int dy); + void grow(int dw, int dh); +}; + + +class cl_app; +class cl_group; + +class cl_view: public cl_base +{ +public: + char *name; + WINDOW *window; + PANEL *panel; + class cl_group *parent; + class cl_view *next, *last; + class cl_app *app; + class cl_gin *input; + class cl_box *pos; + int *palette; + unsigned int state; // See SF_XXXX + unsigned int options; // See OF_XXXX +public: + cl_view(class cl_box *ipos, char *iname, class cl_app *iapp); + cl_view(char *name, class cl_app *iapp); + ~cl_view(void); + virtual int init(void); + virtual class cl_gin *mk_input(void); + virtual int *mk_palette(void); + virtual int is_group(void) {return(0);} + + virtual int ok(void); + virtual int draw(void); + virtual int update(void); + virtual int get_color(int color); + virtual int *get_palette(void); + + virtual int get_event(struct t_event *event); + virtual int handle_event(struct t_event *event); + virtual int unhandled(struct t_event *event); + virtual int mk_event(struct t_event *event, FILE *f, int key); + + virtual class cl_view *prev(void); + virtual class cl_view *prev_view(void); + + virtual int select(void); + virtual int unselect(void); + virtual class cl_view *get_by_state(unsigned int what, int enabled) + {return(0);} + virtual int select_next() {return(0);} + virtual class cl_view *current_sub_view(void); + virtual void set_current(class cl_view *view) {} + virtual int terminal_view(void); + virtual void change_state(unsigned int what, int enable); +}; + + +#endif + +/* End of gui.src/viewcl.h */ diff --git a/sim/ucsim/gui.src/obsolete/win.cc b/sim/ucsim/gui.src/obsolete/win.cc new file mode 100644 index 0000000..b5a9a92 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/win.cc @@ -0,0 +1,111 @@ +/* + * Simulator of microcontrollers (win.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include "i_string.h" + +#include "wincl.h" + + +cl_win::cl_win(class cl_box *ipos, char *ititle, class cl_app *iapp): + cl_group(ipos, 0, iapp) +{ + title= strdup(ititle); + free(name); + if (!ititle || + !(*ititle)) + { + name= (char*)malloc(100); + sprintf(name, "win%p", this); + } + else + name= strdup(ititle); +} + +cl_win::~cl_win(void) +{ + if (frame) + delete frame; + if (title) + free(title); +} + +int +cl_win::init(void) +{ + cl_group::init(); + if ((frame= mk_frame(pos))) + insert(frame); + class cl_box *b= new cl_box(pos->x,pos->y, pos->w,pos->h); + b->move_rel(1,1); + b->grow(-2,-2); + if ((intern= mk_intern(b))) + insert(intern); + //draw(); + delete b; + return(0); +} + +int * +cl_win::mk_palette(void) +{ + int *p= (int*)malloc(8*sizeof(int)), i; + for (i= 0; i < 8; i++) + p[i]= i+C_WIN; + return(p); +} + +class cl_frame * +cl_win::mk_frame(class cl_box *ipos) +{ + char n[100]= ""; + + sprintf(n, "frameof_\"%s\"", name); + class cl_frame *f= new cl_frame(ipos, this, n, app); + f->init(); + return(f); +} + +class cl_view * +cl_win::mk_intern(class cl_box *ipos) +{ + class cl_view *v= new cl_view(ipos, 0, app); + v->init(); + v->options&= ~OF_SELECTABLE; + return(v); +} + +char * +cl_win::get_title(void) +{ + return(title); +} + + +/* End of gui.src/win.cc */ diff --git a/sim/ucsim/gui.src/obsolete/wincl.h b/sim/ucsim/gui.src/obsolete/wincl.h new file mode 100644 index 0000000..ddbd0a9 --- /dev/null +++ b/sim/ucsim/gui.src/obsolete/wincl.h @@ -0,0 +1,55 @@ +/* + * Simulator of microcontrollers (wincl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef WINCL_HEADER +#define WINCL_HEADER + +#include "groupcl.h" +#include "framecl.h" + + +class cl_win: public cl_group +{ +public: + class cl_view *frame; + class cl_view *intern; + char *title; +public: + cl_win(class cl_box *ipos, char *ititle, class cl_app *iapp); + ~cl_win(void); + virtual int init(void); + virtual int *mk_palette(void); + virtual class cl_frame *mk_frame(class cl_box *ipos); + virtual class cl_view *mk_intern(class cl_box *ipos); + + virtual char *get_title(void); +}; + + +#endif + +/* End of gui.src/wincl.h */ diff --git a/sim/ucsim/gui.src/rec.cc b/sim/ucsim/gui.src/rec.cc new file mode 100644 index 0000000..dce2efa --- /dev/null +++ b/sim/ucsim/gui.src/rec.cc @@ -0,0 +1,31 @@ +/* + * Simulator of microcontrollers (rec.cc) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "reccl.h" + + +/* End of gui.src/rec.cc */ diff --git a/sim/ucsim/gui.src/reccl.h b/sim/ucsim/gui.src/reccl.h new file mode 100644 index 0000000..4ead68b --- /dev/null +++ b/sim/ucsim/gui.src/reccl.h @@ -0,0 +1,38 @@ +/* + * Simulator of microcontrollers (reccl.h) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef GUISRC_RECCL_HEADER +#define GUISRC_RECCL_HEADER + +#include "ddconfig.h" + +#include "pobjcl.h" + + +#endif + +/* End of gui.src/reccl.h */ diff --git a/sim/ucsim/gui.src/serio.src/Makefile.in b/sim/ucsim/gui.src/serio.src/Makefile.in new file mode 100644 index 0000000..a077e71 --- /dev/null +++ b/sim/ucsim/gui.src/serio.src/Makefile.in @@ -0,0 +1,114 @@ +# Makefile for kano-networks talker + +SHELL = /bin/sh +CXX = @CXX@ +CXXCPP = @CXXCPP@ +INSTALL = @INSTALL@ +STRIP = @STRIP@ +CP = /bin/cp + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +DEFS = $(subs -DHAVE_CONFIG_H,,@DEFS@) +CPPFLAGS = @CPPFLAGS@ -I. -I$(top_builddir) +# -I$(top_builddir)/cmd.src -I$(top_builddir)/sim.src +CFLAGS = @CFLAGS@ -Wall +CXXFLAGS = @CXXFLAGS@ -Wall +M_OR_MM = @M_OR_MM@ + +LIBS = @CURSES_LIBS@ @LIBS@ + +EXEEXT = @EXEEXT@ + +curses_ok = @curses_ok@ + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @infodir@ +srcdir = @srcdir@ +VPATH = @srcdir@ + +OBJECTS = main.o fileio.o frontend.o posix_signal.o + + +# Compiling entire program or any subproject +# ------------------------------------------ +all: serio.src + +ifeq ($(curses_ok),yes) +serio.src: checkconf serialview$(EXEEXT) +else +serio.src: checkconf +endif + + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: all installdirs + $(INSTALL) serialview$(EXEEXT) $(DESTDIR)$(bindir)/serialview$(EXEEXT) + $(STRIP) $(DESTDIR)$(bindir)/serialview$(EXEEXT) + + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(DESTDIR)$(bindir)/serialview$(EXEEXT) + + +# Performing self-test +# -------------------- +check: + +test: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + test -d $(DESTDIR)$(bindir) || $(INSTALL) -d $(DESTDIR)$(bindir) + + +# Creating dependencies +# --------------------- +dep: Makefile.dep + +Makefile.dep: $(srcdir)/*.cc $(srcdir)/*.h $(srcdir)/*.hh + $(CXXCPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.cc,$^) >Makefile.dep + +ifeq "$(findstring $(MAKECMDGOALS),uninstall installcheck installdirs checkconf \ + clean distclean mostlyclean realclean)" "" + -include Makefile.dep +endif +include $(srcdir)/clean.mk + + +# My rules +# -------- +serialview$(EXEEXT): $(OBJECTS) + $(CXX) -o $@ $(LDFLAGS) $(OBJECTS) $(LIBS) + +.cc.o: + $(CXX) $(CXXFLAGS) $(CPPFLAGS) -c $< -o $@ + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" freshconf;\ + fi + +# End of gui.src/serio.src/Makefile.in diff --git a/sim/ucsim/gui.src/serio.src/USAGE b/sim/ucsim/gui.src/serio.src/USAGE new file mode 100644 index 0000000..a76e65e --- /dev/null +++ b/sim/ucsim/gui.src/serio.src/USAGE @@ -0,0 +1,9 @@ +*note: tested on: +Solaris 7 using gcc version 2.95.1 19990816 (release) +with ncurses +should work with curses although not guranteed + +Start serialview +Start the s51 simulator with the following command line options: +-S out=/tmp/out,in=/tmp/in +or whatever pipes you wish to use diff --git a/sim/ucsim/gui.src/serio.src/clean.mk b/sim/ucsim/gui.src/serio.src/clean.mk new file mode 100644 index 0000000..f50d8c6 --- /dev/null +++ b/sim/ucsim/gui.src/serio.src/clean.mk @@ -0,0 +1,28 @@ +# uCsim gui.src/serio.src/clean.mk + +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + rm -f serialview$(EXEEXT) + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f config.cache config.log config.status + rm -f Makefile *.dep + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean + +# End of gui.src/serio.src/clean.mk diff --git a/sim/ucsim/gui.src/serio.src/conf.mk b/sim/ucsim/gui.src/serio.src/conf.mk new file mode 100644 index 0000000..73ad16e --- /dev/null +++ b/sim/ucsim/gui.src/serio.src/conf.mk @@ -0,0 +1,12 @@ +# uCsim gui.src/serio.src/conf.mk + +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_builddir) && $(SHELL) ./config.status + +# End of gui.src/serio.src/conf.mk diff --git a/sim/ucsim/gui.src/serio.src/config.h b/sim/ucsim/gui.src/serio.src/config.h new file mode 100644 index 0000000..2ee3688 --- /dev/null +++ b/sim/ucsim/gui.src/serio.src/config.h @@ -0,0 +1,16 @@ +/****************************************************************************** + * to emulate the serial input and output of an 8051 controller * + * config.h - general defintions * + ******************************************************************************/ + +#ifndef DEF_INFILE +// the processors serial output +#define DEF_INFILE "/tmp/out" +#endif + +#ifndef DEF_OUTFILE +// the processors serial input +#define DEF_OUTFILE "/tmp/in" +#endif + +#define MAX_SIZ 1024 diff --git a/sim/ucsim/gui.src/serio.src/fileio.cc b/sim/ucsim/gui.src/serio.src/fileio.cc new file mode 100644 index 0000000..5d5924d --- /dev/null +++ b/sim/ucsim/gui.src/serio.src/fileio.cc @@ -0,0 +1,143 @@ +/****************************************************************************** + * to emulate the serial input and output of an 8051 controller * + * fileio.cc - file input and output * + ******************************************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include "fileio.hh" + +FileIO::FileIO() +{ + + // make the input fifo + if(mkfifo(DEF_INFILE, S_IRUSR|S_IWUSR|S_IRGRP|S_IROTH) == -1) { + if(errno != EEXIST) { + std::cerr << "mkfifo(): Error number " << errno << " occourred: " << strerror(errno) << "\n"; + exit(-1); + } + } + + // the input fifo - non blocking + if ((fdin = open(DEF_INFILE, O_RDONLY|O_NONBLOCK)) == -1) { + std::cerr << "open(): Error number " << errno << " occourred: " << strerror(errno) << "\n"; + exit(-1); + } + + // make the output fifo + if(mkfifo(DEF_OUTFILE, S_IRUSR|S_IWUSR|S_IRGRP|S_IROTH) == -1) { + if(errno != EEXIST) { + std::cerr << "mkfifo(): Error number " << errno << " occourred: " << strerror(errno) << "\n"; + exit(-1); + } + } + + // the output fifo + if ((fdout = open(DEF_OUTFILE, O_RDWR|O_NONBLOCK)) == -1) { + std::cerr << "open(): Error number " << errno << " occourred: " << strerror(errno) << "\n"; + exit(-1); + } +} + +FileIO::FileIO(char *infile, char *outfile) +{ + // make the input fifo + if(mkfifo(infile, S_IRUSR|S_IWUSR|S_IRGRP|S_IROTH) == -1) { + if(errno != EEXIST) { + std::cerr << "mkfifo(): Error number " << errno << " occourred: " << strerror(errno); + exit(-1); + } + } + + // the input fifo - non blocking + if ((fdin = open(infile, O_RDONLY|O_NONBLOCK)) == -1) { + std::cerr << "open(): Error number " << errno << " occourred: " << strerror(errno); + exit(-1); + } + + // make the output fifo + if(mkfifo(outfile, S_IRUSR|S_IWUSR|S_IRGRP|S_IROTH) == -1) { + if(errno != EEXIST) { + std::cerr << "mkfifo(): Error number " << errno << " occourred: " << strerror(errno); + exit(-1); + } + } + + // the output fifo + if ((fdout = open(outfile, O_RDWR|O_NONBLOCK)) == -1) { + std::cerr << "open(): Error number " << errno << " occourred: " << strerror(errno); + exit(-1); + } +} + + +FileIO::~FileIO() +{ + close(fdin); + close(fdout); +} + +int FileIO::SendByte(char b) +{ + int ret; + + if((ret = write(fdout, &b, 1)) != 1) + { + std::cerr << "write(): Error number " << errno << " occourred: " << strerror(errno); + exit(-1); + } + + return(ret); +} + + +int FileIO::RecvByte(char *b) +{ + int ret; + + ret = read(fdin, b, 1); + + if((ret == -1) && (errno != EAGAIN)) + { + std::cerr << "read(): Error number " << errno << " occourred: " << strerror(errno); + exit(-1); + } + + return(ret); +} + +// send a string +int FileIO::SendStr(char *str) +{ + int ret; + + if((ret = write(fdout, str, strlen(str))) != (int)strlen(str)) + { + std::cerr << "write(): Error number " << errno << " occourred: " << strerror(errno); + exit(-1); + } + + return(ret); +} + + +int FileIO::RecvStr(char *str) +{ + int ret; + + ret = read(fdin, str, MAX_SIZ-1); + str[MAX_SIZ] = 0; + + if((ret == -1) && (errno != EAGAIN)) + { + std::cerr << "read(): Error number " << errno << " occourred: " << strerror(errno); + exit(-1); + } + + return(ret); +} diff --git a/sim/ucsim/gui.src/serio.src/fileio.hh b/sim/ucsim/gui.src/serio.src/fileio.hh new file mode 100644 index 0000000..fa7ac41 --- /dev/null +++ b/sim/ucsim/gui.src/serio.src/fileio.hh @@ -0,0 +1,22 @@ +/****************************************************************************** + * to emulate the serial input and output of an 8051 controller * + * fileio.hh - file input and output * + ******************************************************************************/ +#include "config.h" + +class FileIO +{ + public: + FileIO(); + FileIO(char *infile, char *outfile); + ~FileIO(); + + int SendByte(char b); + int RecvByte(char *b); + int SendStr(char *str); + int RecvStr(char *str); + + private: + int fdin; + int fdout; +}; diff --git a/sim/ucsim/gui.src/serio.src/frontend.cc b/sim/ucsim/gui.src/serio.src/frontend.cc new file mode 100644 index 0000000..263787a --- /dev/null +++ b/sim/ucsim/gui.src/serio.src/frontend.cc @@ -0,0 +1,162 @@ +/****************************************************************************** + * to emulate the serial input and output of an 8051 controller * + * frontend.cc - the ncurses frontend * + ******************************************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "frontend.hh" + +Viewer::Viewer() +{ + /* initalise the output screen */ + initscr(); + cbreak(); + noecho(); + nl(); + intrflush(stdscr,FALSE); + keypad(stdscr, TRUE); + + /* clear the screen and off you go */ + refresh(); + + // get the coordinates for the box + /* create the subwindow */ + win_c.min_x = win_c.min_y = 0; + getmaxyx(stdscr, win_c.max_y, win_c.max_x); + + /* define the boxed size */ + topleft.x = win_c.min_x + 1; + bottomright.x = win_c.max_x - 2; + topleft.y = win_c.min_y + 1; + bottomright.y = win_c.max_y - 2; + middle_y = (int)((bottomright.y-topleft.y)/2)+1; + middle_x = (int)((bottomright.x-topleft.x)/2)+1; + + // draw the two subwindows + inp_c.min_x = outp_c.min_x = topleft.x; + inp_c.max_x = outp_c.max_x = bottomright.x; + inp_c.min_y = topleft.y; + inp_c.max_y = middle_y-topleft.y; + outp_c.min_y = middle_y+1; + outp_c.max_y = bottomright.y-middle_y; + inp = subwin(stdscr, inp_c.max_y, inp_c.max_x, inp_c.min_y, inp_c.min_x); + outp = subwin(stdscr, outp_c.max_y, outp_c.max_x, outp_c.min_y,outp_c.min_x); + + // initalise the windows + touchwin(inp); + werase(inp); + wrefresh(inp); + scrollok(inp, TRUE); + + touchwin(outp); + werase(outp); + wrefresh(outp); + scrollok(outp, TRUE); + refresh(); + + nodelay(inp, TRUE); + + // flush the input buffers + flushinp(); + + move(topleft.x,topleft.y); + DrawBox(); +} + +Viewer::~Viewer() +{ + delwin(inp); + delwin(outp); + erase(); + refresh(); + endwin(); +} + +void Viewer::DrawBox(void) +{ + int height, width; + COORDINATES current; + + // save the current position + getyx(stdscr, current.y, current.x); + + height = (bottomright.y - topleft.y)+1; + width = (bottomright.x - topleft.y)+1; + + mvaddch(topleft.y-1, topleft.x-1, ACS_ULCORNER); + mvaddch(topleft.y-1, bottomright.x+1, ACS_URCORNER); + mvaddch(bottomright.y+1, bottomright.x+1, ACS_LRCORNER); + mvaddch(bottomright.y+1, topleft.x-1, ACS_LLCORNER); + + /* wmove (screen, y, x) */ + /* top */ + move(topleft.y-1, topleft.x); + hline(ACS_HLINE, width); + /* bottom */ + move(bottomright.y+1, topleft.x); + hline(ACS_HLINE, width); + move(bottomright.y+1, topleft.x); + hline(ACS_HLINE, width); + + /* left */ + move(topleft.y, topleft.x-1); + vline(ACS_VLINE, height); + + /* right */ + move(topleft.y, bottomright.x+1); + vline(ACS_VLINE, height); + + /* the divider */ + mvaddch(middle_y, bottomright.x+1, ACS_RTEE); + mvaddch(middle_y, topleft.x-1, ACS_LTEE); + hline(ACS_HLINE, width); + + // the window titles + mvaddstr(inp_c.min_y-1, middle_x-(strlen("Input")/2), "Input"); + mvaddstr(middle_y, middle_x-(strlen("Output")/2), "Output"); + move(current.y, current.x); + refresh(); +} + +void Viewer::AddStrOutWin(char *string) +{ + waddstr(outp, string); + wrefresh(outp); +} + +void Viewer::GetStrInWin(char *string) +{ + if(wgetstr(inp, string) == ERR) { + string[0] = 0; + } else { + waddstr(inp, string); + wrefresh(inp); + } +} + +void Viewer::AddChOutWin(char b) +{ + waddch(outp, b); + wrefresh(outp); +} + +char Viewer::GetChInWin(void) +{ + int b = wgetch(inp); + + if(b==ERR) { + b=0; + } else { + waddch(inp, (chtype)b); + wrefresh(inp); + } + + return((char)b); +} diff --git a/sim/ucsim/gui.src/serio.src/frontend.hh b/sim/ucsim/gui.src/serio.src/frontend.hh new file mode 100644 index 0000000..aa13b9c --- /dev/null +++ b/sim/ucsim/gui.src/serio.src/frontend.hh @@ -0,0 +1,43 @@ +/****************************************************************************** + * to emulate the serial input and output of an 8051 controller * + * frontend.hh - ncurses frontend * + ******************************************************************************/ +#include +#include +/*#include */ +#include "config.h" + +struct COORDS_S +{ + int min_x; + int max_x; + int min_y; + int max_y; +}; +typedef struct COORDS_S COORDS; + +struct COORDINATES_S +{ + int x; + int y; +}; +typedef struct COORDINATES_S COORDINATES; + + +class Viewer +{ + public: + Viewer(); + ~Viewer(); + void DrawBox(void); + void AddStrOutWin(char *string); + void GetStrInWin(char *string); + void AddChOutWin(char b); + char GetChInWin(void); + + private: + WINDOW *inp, *outp; + COORDS win_c, inp_c, outp_c; + COORDINATES topleft, bottomright, current; + int middle_y, middle_x; +}; diff --git a/sim/ucsim/gui.src/serio.src/main.cc b/sim/ucsim/gui.src/serio.src/main.cc new file mode 100644 index 0000000..98ea1bd --- /dev/null +++ b/sim/ucsim/gui.src/serio.src/main.cc @@ -0,0 +1,109 @@ +/****************************************************************************** + * to emulate the serial input and output of an 8051 controller * + * main.cc - the main stuff * + ******************************************************************************/ +#include "ddconfig.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if defined(HAVE_GETOPT_H) +# include +#endif + +#include "fileio.hh" +#include "frontend.hh" +#include "posix_signal.hh" + + +// globals +int doloop = 1; + +// the signal handler +void HandleSig(int info) +{ + doloop = 0; +} + + +// usage +void PrintUsage(char *progname) +{ +std::cout << "Usage: " << progname << " [-i ] [-o ] [-h]\n"; +std::cout << "-i \t is the pipe to the controllers' serial input\n"; +std::cout << "-o \t is the pipe to the controllers' serial output\n"; +std::cout << "-h\t\tshow the help\n"; +std::cout << "\nTim Hurman - t.hurman@virgin.net\n"; +exit(0); +} + + +// the main function +int main(int argc, char **argv) +{ + char *string = new char[MAX_SIZ]; + extern char *optarg; + int errflg=0; + int c; + char *infile = DEF_INFILE; + char *outfile = DEF_OUTFILE; + + // sort out any command line params + while ((c = getopt(argc, argv, "i:o:h")) != EOF) + switch(c) { + case 'i': + infile = optarg; + break; + case 'o': + outfile = optarg; + break; + case 'h': + errflg++; + break; + default: + std::cerr << "Invalid or unknown switch\n"; + errflg++; + break; + } + + // was there a problem + if(errflg) + PrintUsage(argv[0]); + + // the main objects needed + FileIO *fobj = new FileIO(infile, outfile); + Viewer *view = new Viewer(); + SigHandler *sig = new SigHandler(); + + // add a signal handler for ^C + sig->SetSignal(SIGINT, HandleSig); + + // set the timeout for waiting for a char + while(doloop) + { + string[0] = view->GetChInWin(); + if(string[0] == 4) + break; + + if(string[0] != 0) + fobj->SendByte(string[0]); + + if(fobj->RecvStr(string) > 0) + view->AddStrOutWin(string); + + usleep(5000); + } + + delete fobj; + delete view; + delete sig; + delete string; + return(0); +} diff --git a/sim/ucsim/gui.src/serio.src/posix_signal.cc b/sim/ucsim/gui.src/serio.src/posix_signal.cc new file mode 100644 index 0000000..bd9cfc4 --- /dev/null +++ b/sim/ucsim/gui.src/serio.src/posix_signal.cc @@ -0,0 +1,106 @@ +/****************************************************************************** + * posix_signal.cc - A signal handleing class for linux + solaris * + * to convert posix into somthing easier to use * + * Tim Hurman - t.hurman@virgin.net * + * Last edited on 01th Oct 19999 * + ******************************************************************************/ +/* + * A quick note, fscking linux, none of this would be neccessary if + * linux contained support for sighold, sigrelse, sigignore and sigpause. + * + */ + +#include +#include +#include /* header for waitpid() and various macros */ +#include /* header for signal functions */ +#include +#include +#include +#include +#include + +#include "posix_signal.hh" + +// constructor +SigHandler::SigHandler() +{ +} + +// destructor +SigHandler::~SigHandler() +{ +} + +/* set a signal */ +int SigHandler::SetSignal(int SIGNAL, SIG_PF ACTION) +{ + struct sigaction act; + + /* declare what is going to be called when */ + act.sa_handler = ACTION; + + /* clear the structure's mask */ + sigemptyset(&act.sa_mask); + + /* set up some flags */ + if(SIGNAL == SIGCHLD) { + act.sa_flags = SA_NOCLDSTOP; + } + + /* set the signal handler */ + if(sigaction(SIGNAL, &act, NULL) < 0) + { + std::cerr << "sigaction(): " << strerror(errno) << "\n"; + exit(-1); + } + + /* all ok */ + return(0); +} + + +/* block a signal */ +int SigHandler::BlockSignal(int SIGNAL) +{ + sigset_t set; + + /* initalise */ + sigemptyset(&set); + + /* add the SIGNAL to the set */ + sigaddset(&set, SIGNAL); + + /* block it */ + if(sigprocmask(SIG_BLOCK, &set, NULL) < 0) + { + std::cerr << "sigprocmask(): " << strerror(errno) << "\n"; + exit(-1); + } + + /* done */ + return(0); +} + + +/* unblock a signal */ +int SigHandler::UnBlockSignal(int SIGNAL) +{ + sigset_t set; + + /* initalise */ + sigemptyset(&set); + + /* add the SIGNAL to the set */ + sigaddset(&set, SIGNAL); + + /* block it */ + if(sigprocmask(SIG_UNBLOCK, &set, NULL) < 0) + { + std::cerr << "sigprocmask(): " << strerror(errno) << "\n"; + exit(-1); + } + + /* done */ + return(0); +} diff --git a/sim/ucsim/gui.src/serio.src/posix_signal.hh b/sim/ucsim/gui.src/serio.src/posix_signal.hh new file mode 100644 index 0000000..18c0cae --- /dev/null +++ b/sim/ucsim/gui.src/serio.src/posix_signal.hh @@ -0,0 +1,19 @@ +/****************************************************************************** + * posix_signal.hh - A signal handleing class for linux + solaris * + * to convert posix into somthing easier to use * + * Tim Hurman - t.hurman@virgin.net * + * Last edited on 01th Oct 1999 * + ******************************************************************************/ +typedef void(*SIG_PF)(int); +class SigHandler +{ + public: + SigHandler(); + ~SigHandler(); + int SetSignal(int SIGNAL, SIG_PF ACTION); + int BlockSignal(int SIGNAL); + int UnBlockSignal(int SIGNAL); + + private: + +}; diff --git a/sim/ucsim/hc08.src/(c).1 b/sim/ucsim/hc08.src/(c).1 new file mode 100644 index 0000000..d673f9f --- /dev/null +++ b/sim/ucsim/hc08.src/(c).1 @@ -0,0 +1,25 @@ +/* + * Simulator of microcontrollers (@@F@@) + * + * Copyright (C) @@S@@,@@Y@@ Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ diff --git a/sim/ucsim/hc08.src/Makefile.in b/sim/ucsim/hc08.src/Makefile.in new file mode 100644 index 0000000..8dddea1 --- /dev/null +++ b/sim/ucsim/hc08.src/Makefile.in @@ -0,0 +1,151 @@ +# +# uCsim hc08.src/Makefile +# +# (c) Drotos Daniel, Talker Bt. 1997 +# + +STARTYEAR = 1997 + +SHELL = /bin/sh +CXX = @CXX@ +CPP = @CPP@ +CXXCPP = @CXXCPP@ +RANLIB = @RANLIB@ +INSTALL = @INSTALL@ +STRIP = @STRIP@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +DEFS = $(subs -DHAVE_CONFIG_H,,@DEFS@) +CPPFLAGS = @CPPFLAGS@ -I$(srcdir) -I$(top_srcdir) -I$(top_builddir) \ + -I$(top_srcdir)/cmd.src -I$(top_srcdir)/sim.src \ + -I$(top_srcdir)/gui.src +CFLAGS = @CFLAGS@ -Wall +CXXFLAGS = @CXXFLAGS@ -Wall +LDFLAGS = @LDFLAGS@ +M_OR_MM = @M_OR_MM@ +PICOPT = @PICOPT@ +SHAREDLIB = @SHAREDLIB@ + +EXEEXT = @EXEEXT@ + +LIBS = -L$(top_builddir) -lsim -lucsimutil -lguiucsim -lcmd -lsim @LIBS@ +DL = @DL@ +dl_ok = @dl_ok@ + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @infodir@ +srcdir = @srcdir@ +VPATH = @srcdir@ + +OBJECTS_SHARED = glob.o \ + inst.o \ + simhc08.o hc08.o +OBJECTS_EXE = shc08.o +OBJECTS = $(OBJECTS_SHARED) $(OBJECTS_EXE) + +HC08ASM = + +enable_dlso = @enable_dlso@ +dlso_ok = @dlso_ok@ + +#TEST_OBJ = test_bit.hex test_dis.hex test_mov.hex test_jmp.hex \ +# test_arith.hex + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf otherlibs hc08.src tests + +tests: $(TEST_OBJ) + + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: all installdirs + $(INSTALL) shc08$(EXEEXT) $(DESTDIR)$(bindir)/shc08$(EXEEXT) + $(STRIP) $(DESTDIR)$(bindir)/shc08$(EXEEXT) + + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(DESTDIR)$(bindir)/shc08$(EXEEXT) + + +# Performing self-test +# -------------------- +check: test + +test: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + test -d $(DESTDIR)$(bindir) || $(INSTALL) -d $(DESTDIR)$(bindir) + + +# Creating dependencies +# --------------------- +dep: Makefile.dep + +Makefile.dep: $(srcdir)/*.cc $(srcdir)/*.h + $(CXXCPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.cc,$^) >Makefile.dep + +-include Makefile.dep +include $(srcdir)/clean.mk + +# My rules +# -------- +.SUFFIXES: .asm .hex + +hc08.src: shc08$(EXEEXT) shared_lib + +shc08$(EXEEXT): $(OBJECTS) $(top_builddir)/*.a + $(CXX) $(CXXFLAGS) $(LDFLAGS) -o $@ $(OBJECTS) $(LIBS) + +ifeq ($(dlso_ok),yes) +shared_lib: $(top_builddir)/shc08.so +else +shared_lib: + @$(top_srcdir)/mkecho $(top_builddir) "No hc08 shared lib made." + @$(top_srcdir)/mkecho $(top_builddir) "(SHAREDLIB="$(SHAREDLIB)",dl_ok="$(dl_ok)",enable_dlso="$(enable_dlso)")" +endif + +$(top_builddir)/shc08.so: $(OBJECTS_SHARED) + $(CXX) -shared $(LDFLAGS) $(OBJECTS_SHARED) -o $(top_builddir)/shc08.so + +otherlibs: + $(MAKE) -C $(top_builddir)/cmd.src all + $(MAKE) -C $(top_builddir)/sim.src all + +.cc.o: + $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c $< -o $@ + +.asm.hex: + $(HC08ASM) -l $< -o $@ -e $<.lst + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" freshconf;\ + fi + +# End of hc08.src/Makefile.in diff --git a/sim/ucsim/hc08.src/clean.mk b/sim/ucsim/hc08.src/clean.mk new file mode 100644 index 0000000..f570879 --- /dev/null +++ b/sim/ucsim/hc08.src/clean.mk @@ -0,0 +1,26 @@ +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + rm -f shc08$(EXEEXT) + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f config.cache config.log config.status + rm -f Makefile *.dep + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean + +# End of hc08.src/clean.mk diff --git a/sim/ucsim/hc08.src/conf.mk b/sim/ucsim/hc08.src/conf.mk new file mode 100644 index 0000000..a7a0769 --- /dev/null +++ b/sim/ucsim/hc08.src/conf.mk @@ -0,0 +1,10 @@ +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_builddir) && $(SHELL) ./config.status + +# End of hc08.src/conf.mk diff --git a/sim/ucsim/hc08.src/glob.cc b/sim/ucsim/hc08.src/glob.cc new file mode 100644 index 0000000..7ed501c --- /dev/null +++ b/sim/ucsim/hc08.src/glob.cc @@ -0,0 +1,380 @@ +/* + * Simulator of microcontrollers (glob.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include + +#include "stypes.h" + + +/* +%d - direct addressing +%x - extended addressing +%p - pc relative addressing +%b - unsigned byte immediate addressing +%w - unsigned word immediate addressing +%s - signed byte immediate +%1 - unsigned byte index offset +%2 - unsigned word index offset +*/ + +/* uint code, mask; char branch; uchar length; char *mnemonic; */ +struct dis_entry disass_hc08[]= { + { 0x0000, 0x00ff, 'R', 3, "brset #0,%d,%p" }, + { 0x0001, 0x00ff, 'R', 3, "brclr #0,%d,%p" }, + { 0x0002, 0x00ff, 'R', 3, "brset #1,%d,%p" }, + { 0x0003, 0x00ff, 'R', 3, "brclr #1,%d,%p" }, + { 0x0004, 0x00ff, 'R', 3, "brset #2,%d,%p" }, + { 0x0005, 0x00ff, 'R', 3, "brclr #2,%d,%p" }, + { 0x0006, 0x00ff, 'R', 3, "brset #3,%d,%p" }, + { 0x0007, 0x00ff, 'R', 3, "brclr #3,%d,%p" }, + { 0x0008, 0x00ff, 'R', 3, "brset #4,%d,%p" }, + { 0x0009, 0x00ff, 'R', 3, "brclr #4,%d,%p" }, + { 0x000a, 0x00ff, 'R', 3, "brset #5,%d,%p" }, + { 0x000b, 0x00ff, 'R', 3, "brclr #5,%d,%p" }, + { 0x000c, 0x00ff, 'R', 3, "brset #6,%d,%p" }, + { 0x000d, 0x00ff, 'R', 3, "brclr #6,%d,%p" }, + { 0x000e, 0x00ff, 'R', 3, "brset #7,%d,%p" }, + { 0x000f, 0x00ff, 'R', 3, "brclr #7,%d,%p" }, + + { 0x0010, 0x00ff, ' ', 2, "bset #0,%d" }, + { 0x0011, 0x00ff, ' ', 2, "bclr #0,%d" }, + { 0x0012, 0x00ff, ' ', 2, "bset #1,%d" }, + { 0x0013, 0x00ff, ' ', 2, "bclr #1,%d" }, + { 0x0014, 0x00ff, ' ', 2, "bset #2,%d" }, + { 0x0015, 0x00ff, ' ', 2, "bclr #2,%d" }, + { 0x0016, 0x00ff, ' ', 2, "bset #3,%d" }, + { 0x0017, 0x00ff, ' ', 2, "bclr #3,%d" }, + { 0x0018, 0x00ff, ' ', 2, "bset #4,%d" }, + { 0x0019, 0x00ff, ' ', 2, "bclr #4,%d" }, + { 0x001a, 0x00ff, ' ', 2, "bset #5,%d" }, + { 0x001b, 0x00ff, ' ', 2, "bclr #5,%d" }, + { 0x001c, 0x00ff, ' ', 2, "bset #6,%d" }, + { 0x001d, 0x00ff, ' ', 2, "bclr #6,%d" }, + { 0x001e, 0x00ff, ' ', 2, "bset #7,%d" }, + { 0x001f, 0x00ff, ' ', 2, "bclr #7,%d" }, + + { 0x0020, 0x00ff, 'R', 2, "bra %p" }, + { 0x0021, 0x00ff, 'R', 2, "brn %p" }, + { 0x0022, 0x00ff, 'R', 2, "bhi %p" }, + { 0x0023, 0x00ff, 'R', 2, "bls %p" }, + { 0x0024, 0x00ff, 'R', 2, "bcc %p" }, + { 0x0025, 0x00ff, 'R', 2, "bcs %p" }, + { 0x0026, 0x00ff, 'R', 2, "bne %p" }, + { 0x0027, 0x00ff, 'R', 2, "beq %p" }, + { 0x0028, 0x00ff, 'R', 2, "bhcc %p" }, + { 0x0029, 0x00ff, 'R', 2, "bhcs %p" }, + { 0x002a, 0x00ff, 'R', 2, "bpl %p" }, + { 0x002b, 0x00ff, 'R', 2, "bmi %p" }, + { 0x002c, 0x00ff, 'R', 2, "bmc %p" }, + { 0x002d, 0x00ff, 'R', 2, "bms %p" }, + { 0x002e, 0x00ff, 'R', 2, "bil %p" }, + { 0x002f, 0x00ff, 'R', 2, "bih %p" }, + + { 0x0030, 0x00ff, ' ', 2, "neg %d" }, + { 0x0031, 0x00ff, 'R', 3, "cbeq %d,%p" }, + { 0x0033, 0x00ff, ' ', 2, "com %d" }, + { 0x0034, 0x00ff, ' ', 2, "lsr %d" }, + { 0x0035, 0x00ff, ' ', 2, "sthx %d" }, + { 0x0036, 0x00ff, ' ', 2, "ror %d" }, + { 0x0037, 0x00ff, ' ', 2, "asr %d" }, + { 0x0038, 0x00ff, ' ', 2, "lsl %d" }, + { 0x0039, 0x00ff, ' ', 2, "rol %d" }, + { 0x003a, 0x00ff, ' ', 2, "dec %d" }, + { 0x003b, 0x00ff, 'R', 3, "dbnz %d,%d" }, + { 0x003c, 0x00ff, ' ', 2, "inc %d" }, + { 0x003d, 0x00ff, ' ', 2, "tst %d" }, + { 0x003f, 0x00ff, ' ', 2, "clr %d" }, + + { 0x0040, 0x00ff, ' ', 1, "nega" }, + { 0x0041, 0x00ff, 'R', 3, "cbeqa %b,%p" }, + { 0x0042, 0x00ff, ' ', 1, "mul" }, + { 0x0043, 0x00ff, ' ', 1, "coma" }, + { 0x0044, 0x00ff, ' ', 1, "lsra" }, + { 0x0045, 0x00ff, ' ', 3, "ldhx %w" }, + { 0x0046, 0x00ff, ' ', 1, "rora" }, + { 0x0047, 0x00ff, ' ', 1, "asra" }, + { 0x0048, 0x00ff, ' ', 1, "lsla" }, + { 0x0049, 0x00ff, ' ', 1, "rola" }, + { 0x004a, 0x00ff, ' ', 1, "deca" }, + { 0x004b, 0x00ff, 'R', 2, "dbnza %p" }, + { 0x004c, 0x00ff, ' ', 1, "inca" }, + { 0x004d, 0x00ff, ' ', 1, "tsta" }, + { 0x004e, 0x00ff, ' ', 3, "mov %d,%d" }, + { 0x004f, 0x00ff, ' ', 1, "clra" }, + + { 0x0050, 0x00ff, ' ', 1, "negx" }, + { 0x0051, 0x00ff, 'R', 3, "cbeqx %b,%p" }, + { 0x0052, 0x00ff, ' ', 1, "div" }, + { 0x0053, 0x00ff, ' ', 1, "comx" }, + { 0x0054, 0x00ff, ' ', 1, "lsrx" }, + { 0x0055, 0x00ff, ' ', 2, "ldhx %d" }, + { 0x0056, 0x00ff, ' ', 1, "rorx" }, + { 0x0057, 0x00ff, ' ', 1, "asrx" }, + { 0x0058, 0x00ff, ' ', 1, "lslx" }, + { 0x0059, 0x00ff, ' ', 1, "rolx" }, + { 0x005a, 0x00ff, ' ', 1, "decx" }, + { 0x005b, 0x00ff, 'R', 2, "dbnzx %p" }, + { 0x005c, 0x00ff, ' ', 1, "incx" }, + { 0x005d, 0x00ff, ' ', 1, "tstx" }, + { 0x005e, 0x00ff, ' ', 3, "mov %d,x+" }, + { 0x005f, 0x00ff, ' ', 1, "clrx" }, + + { 0x0060, 0x00ff, ' ', 2, "neg %1,x" }, + { 0x0061, 0x00ff, 'R', 3, "cbeq %1,x+,%p" }, + { 0x0062, 0x00ff, ' ', 1, "nsa" }, + { 0x0063, 0x00ff, ' ', 2, "com %1,x" }, + { 0x0064, 0x00ff, ' ', 2, "lsr %1,x" }, + { 0x0065, 0x00ff, ' ', 3, "cphx %w" }, + { 0x0066, 0x00ff, ' ', 2, "ror %1,x" }, + { 0x0067, 0x00ff, ' ', 2, "asr %1,x" }, + { 0x0068, 0x00ff, ' ', 2, "lsl %1,x" }, + { 0x0069, 0x00ff, ' ', 2, "rol %1,x" }, + { 0x006a, 0x00ff, ' ', 2, "dec %1,x" }, + { 0x006b, 0x00ff, 'R', 2, "dbnz %1,x,%p" }, + { 0x006c, 0x00ff, ' ', 2, "inc %1,x" }, + { 0x006d, 0x00ff, ' ', 2, "tst %1,x" }, + { 0x006e, 0x00ff, ' ', 3, "mov %b,%d" }, + { 0x006f, 0x00ff, ' ', 2, "clr %1,x" }, + +/* + { 0x0070, 0x00ff, ' ', 2, "neg %b,sp" }, + { 0x0071, 0x00ff, 'R', 3, "cbeq %b,sp,%d" }, + { 0x0073, 0x00ff, ' ', 2, "com %b,sp" }, + { 0x0074, 0x00ff, ' ', 2, "lsr %b,sp" }, + { 0x0076, 0x00ff, ' ', 2, "ror %b,sp" }, + { 0x0077, 0x00ff, ' ', 2, "asr %b,sp" }, + { 0x0078, 0x00ff, ' ', 2, "lsl %b,sp" }, + { 0x0079, 0x00ff, ' ', 2, "rol %b,sp" }, + { 0x007a, 0x00ff, ' ', 2, "dec %b,sp" }, + { 0x007b, 0x00ff, 'R', 2, "dbnz %b,sp,%d" }, + { 0x007c, 0x00ff, ' ', 2, "inc %b,sp" }, + { 0x007d, 0x00ff, ' ', 2, "tst %b,sp" }, + { 0x007f, 0x00ff, ' ', 2, "clr %b,sp" }, +*/ + + { 0x0070, 0x00ff, ' ', 1, "neg ,x" }, + { 0x0071, 0x00ff, 'R', 2, "cbeq ,x+,%p" }, + { 0x0072, 0x00ff, ' ', 1, "daa" }, + { 0x0073, 0x00ff, ' ', 1, "com ,x" }, + { 0x0074, 0x00ff, ' ', 1, "lsr ,x" }, + { 0x0075, 0x00ff, ' ', 2, "cphx %d" }, + { 0x0076, 0x00ff, ' ', 1, "ror ,x" }, + { 0x0077, 0x00ff, ' ', 1, "asr ,x" }, + { 0x0078, 0x00ff, ' ', 1, "lsl ,x" }, + { 0x0079, 0x00ff, ' ', 1, "rol ,x" }, + { 0x007a, 0x00ff, ' ', 1, "dec ,x" }, + { 0x007b, 0x00ff, 'R', 2, "dbnz ,x,%p" }, + { 0x007c, 0x00ff, ' ', 1, "inc ,x" }, + { 0x007d, 0x00ff, ' ', 1, "tst ,x" }, + { 0x007e, 0x00ff, ' ', 2, "mov ,x+,%d" }, + { 0x007f, 0x00ff, ' ', 1, "clr ,x" }, + + { 0x0080, 0x00ff, ' ', 1, "rti" }, + { 0x0081, 0x00ff, ' ', 1, "rts" }, + { 0x0083, 0x00ff, ' ', 1, "swi" }, + { 0x0084, 0x00ff, ' ', 1, "tap" }, + { 0x0085, 0x00ff, ' ', 1, "tpa" }, + { 0x0086, 0x00ff, ' ', 1, "pula" }, + { 0x0087, 0x00ff, ' ', 1, "psha" }, + { 0x0088, 0x00ff, ' ', 1, "pulx" }, + { 0x0089, 0x00ff, ' ', 1, "pshx" }, + { 0x008a, 0x00ff, ' ', 1, "pulh" }, + { 0x008b, 0x00ff, ' ', 1, "pshh" }, + { 0x008c, 0x00ff, ' ', 1, "clrh" }, + { 0x008e, 0x00ff, ' ', 1, "stop" }, + { 0x008f, 0x00ff, ' ', 1, "wait" }, + + { 0x0090, 0x00ff, 'R', 2, "bge %p" }, + { 0x0091, 0x00ff, 'R', 2, "blt %p" }, + { 0x0092, 0x00ff, 'R', 2, "bgt %p" }, + { 0x0093, 0x00ff, 'R', 2, "ble %p" }, + { 0x0094, 0x00ff, ' ', 1, "txs" }, + { 0x0095, 0x00ff, ' ', 1, "tsx" }, + { 0x0097, 0x00ff, ' ', 1, "tax" }, + { 0x0098, 0x00ff, ' ', 1, "clc" }, + { 0x0099, 0x00ff, ' ', 1, "sec" }, + { 0x009a, 0x00ff, ' ', 1, "cli" }, + { 0x009b, 0x00ff, ' ', 1, "sei" }, + { 0x009c, 0x00ff, ' ', 1, "rsp" }, + { 0x009d, 0x00ff, ' ', 1, "nop" }, + { 0x009f, 0x00ff, ' ', 1, "txa" }, + + { 0x00a0, 0x00ff, ' ', 2, "sub %b" }, + { 0x00a1, 0x00ff, ' ', 2, "cmp %b" }, + { 0x00a2, 0x00ff, ' ', 2, "sbc %b" }, + { 0x00a3, 0x00ff, ' ', 2, "cpx %b" }, + { 0x00a4, 0x00ff, ' ', 2, "and %b" }, + { 0x00a5, 0x00ff, ' ', 2, "bit %b" }, + { 0x00a6, 0x00ff, ' ', 2, "lda %b" }, + { 0x00a7, 0x00ff, ' ', 2, "ais %s" }, + { 0x00a8, 0x00ff, ' ', 2, "eor %b" }, + { 0x00a9, 0x00ff, ' ', 2, "adc %b" }, + { 0x00aa, 0x00ff, ' ', 2, "ora %b" }, + { 0x00ab, 0x00ff, ' ', 2, "add %b" }, + { 0x00ad, 0x00ff, 'R', 2, "bsr %d" }, + { 0x00ae, 0x00ff, ' ', 2, "ldx %b" }, + { 0x00af, 0x00ff, ' ', 2, "aix %s" }, + + { 0x00b0, 0x00ff, ' ', 2, "sub %d" }, + { 0x00b1, 0x00ff, ' ', 2, "cmp %d" }, + { 0x00b2, 0x00ff, ' ', 2, "sbc %d" }, + { 0x00b3, 0x00ff, ' ', 2, "cpx %d" }, + { 0x00b4, 0x00ff, ' ', 2, "and %d" }, + { 0x00b5, 0x00ff, ' ', 2, "bit %d" }, + { 0x00b6, 0x00ff, ' ', 2, "lda %d" }, + { 0x00b7, 0x00ff, ' ', 2, "sta %d" }, + { 0x00b8, 0x00ff, ' ', 2, "eor %d" }, + { 0x00b9, 0x00ff, ' ', 2, "adc %d" }, + { 0x00ba, 0x00ff, ' ', 2, "ora %d" }, + { 0x00bb, 0x00ff, ' ', 2, "add %d" }, + { 0x00bc, 0x00ff, 'A', 2, "jmp %d" }, + { 0x00bd, 0x00ff, 'A', 2, "jsr %d" }, + { 0x00be, 0x00ff, ' ', 2, "ldx %d" }, + { 0x00bf, 0x00ff, ' ', 2, "stx %d" }, + + { 0x00c0, 0x00ff, ' ', 3, "sub %x" }, + { 0x00c1, 0x00ff, ' ', 3, "cmp %x" }, + { 0x00c2, 0x00ff, ' ', 3, "sbc %x" }, + { 0x00c3, 0x00ff, ' ', 3, "cpx %x" }, + { 0x00c4, 0x00ff, ' ', 3, "and %x" }, + { 0x00c5, 0x00ff, ' ', 3, "bit %x" }, + { 0x00c6, 0x00ff, ' ', 3, "lda %x" }, + { 0x00c7, 0x00ff, ' ', 3, "sta %x" }, + { 0x00c8, 0x00ff, ' ', 3, "eor %x" }, + { 0x00c9, 0x00ff, ' ', 3, "adc %x" }, + { 0x00ca, 0x00ff, ' ', 3, "ora %x" }, + { 0x00cb, 0x00ff, ' ', 3, "add %x" }, + { 0x00cc, 0x00ff, 'A', 3, "jmp %x" }, + { 0x00cd, 0x00ff, 'A', 3, "jsr %x" }, + { 0x00ce, 0x00ff, ' ', 3, "ldx %x" }, + { 0x00cf, 0x00ff, ' ', 3, "stx %x" }, + + { 0x00d0, 0x00ff, ' ', 3, "sub %2,x" }, + { 0x00d1, 0x00ff, ' ', 3, "cmp %2,x" }, + { 0x00d2, 0x00ff, ' ', 3, "sbc %2,x" }, + { 0x00d3, 0x00ff, ' ', 3, "cpx %2,x" }, + { 0x00d4, 0x00ff, ' ', 3, "and %2,x" }, + { 0x00d5, 0x00ff, ' ', 3, "bit %2,x" }, + { 0x00d6, 0x00ff, ' ', 3, "lda %2,x" }, + { 0x00d7, 0x00ff, ' ', 3, "sta %2,x" }, + { 0x00d8, 0x00ff, ' ', 3, "eor %2,x" }, + { 0x00d9, 0x00ff, ' ', 3, "adc %2,x" }, + { 0x00da, 0x00ff, ' ', 3, "ora %2,x" }, + { 0x00db, 0x00ff, ' ', 3, "add %2,x" }, + { 0x00dc, 0x00ff, ' ', 3, "jmp %2,x" }, + { 0x00dd, 0x00ff, ' ', 3, "jsr %2,x" }, + { 0x00de, 0x00ff, ' ', 3, "ldx %2,x" }, + { 0x00df, 0x00ff, ' ', 3, "stx %2,x" }, + + { 0x00e0, 0x00ff, ' ', 2, "sub %1,x" }, + { 0x00e1, 0x00ff, ' ', 2, "cmp %1,x" }, + { 0x00e2, 0x00ff, ' ', 2, "sbc %1,x" }, + { 0x00e3, 0x00ff, ' ', 2, "cpx %1,x" }, + { 0x00e4, 0x00ff, ' ', 2, "and %1,x" }, + { 0x00e5, 0x00ff, ' ', 2, "bit %1,x" }, + { 0x00e6, 0x00ff, ' ', 2, "lda %1,x" }, + { 0x00e7, 0x00ff, ' ', 2, "sta %1,x" }, + { 0x00e8, 0x00ff, ' ', 2, "eor %1,x" }, + { 0x00e9, 0x00ff, ' ', 2, "adc %1,x" }, + { 0x00ea, 0x00ff, ' ', 2, "ora %1,x" }, + { 0x00eb, 0x00ff, ' ', 2, "add %1,x" }, + { 0x00ec, 0x00ff, ' ', 2, "jmp %1,x" }, + { 0x00ed, 0x00ff, ' ', 2, "jsr %1,x" }, + { 0x00ee, 0x00ff, ' ', 2, "ldx %1,x" }, + { 0x00ef, 0x00ff, ' ', 2, "stx %1,x" }, + + { 0x00f0, 0x00ff, ' ', 1, "sub ,x" }, + { 0x00f1, 0x00ff, ' ', 1, "cmp ,x" }, + { 0x00f2, 0x00ff, ' ', 1, "sbc ,x" }, + { 0x00f3, 0x00ff, ' ', 1, "cpx ,x" }, + { 0x00f4, 0x00ff, ' ', 1, "and ,x" }, + { 0x00f5, 0x00ff, ' ', 1, "bit ,x" }, + { 0x00f6, 0x00ff, ' ', 1, "lda ,x" }, + { 0x00f7, 0x00ff, ' ', 1, "sta ,x" }, + { 0x00f8, 0x00ff, ' ', 1, "eor ,x" }, + { 0x00f9, 0x00ff, ' ', 1, "adc ,x" }, + { 0x00fa, 0x00ff, ' ', 1, "ora ,x" }, + { 0x00fb, 0x00ff, ' ', 1, "add ,x" }, + { 0x00fc, 0x00ff, ' ', 1, "jmp ,x" }, + { 0x00fd, 0x00ff, ' ', 1, "jsr ,x" }, + { 0x00fe, 0x00ff, ' ', 1, "ldx ,x" }, + { 0x00ff, 0x00ff, ' ', 1, "stx ,x" }, + + { 0, 0, 0, 0, NULL } +}; + + +struct dis_entry disass_hc08_9e[]= { + { 0x0060, 0x00ff, ' ', 2, "neg %1,sp" }, + { 0x0061, 0x00ff, 'R', 3, "cbeq %1,sp,%p" }, + { 0x0063, 0x00ff, ' ', 2, "com %1,sp" }, + { 0x0064, 0x00ff, ' ', 2, "lsr %1,sp" }, + { 0x0066, 0x00ff, ' ', 2, "ror %1,sp" }, + { 0x0067, 0x00ff, ' ', 2, "asr %1,sp" }, + { 0x0068, 0x00ff, ' ', 2, "lsl %1,sp" }, + { 0x0069, 0x00ff, ' ', 2, "rol %1,sp" }, + { 0x006a, 0x00ff, ' ', 2, "dec %1,sp" }, + { 0x006b, 0x00ff, 'R', 2, "dbnz %1,sp,%p" }, + { 0x006c, 0x00ff, ' ', 2, "inc %1,sp" }, + { 0x006d, 0x00ff, ' ', 2, "tst %1,sp" }, + { 0x006f, 0x00ff, ' ', 2, "clr %1,sp" }, + + { 0x00d0, 0x00ff, ' ', 3, "sub %2,sp" }, + { 0x00d1, 0x00ff, ' ', 3, "cmp %2,sp" }, + { 0x00d2, 0x00ff, ' ', 3, "sbc %2,sp" }, + { 0x00d3, 0x00ff, ' ', 3, "cpx %2,sp" }, + { 0x00d4, 0x00ff, ' ', 3, "and %2,sp" }, + { 0x00d5, 0x00ff, ' ', 3, "bit %2,sp" }, + { 0x00d6, 0x00ff, ' ', 3, "lda %2,sp" }, + { 0x00d7, 0x00ff, ' ', 3, "sta %2,sp" }, + { 0x00d8, 0x00ff, ' ', 3, "eor %2,sp" }, + { 0x00d9, 0x00ff, ' ', 3, "adc %2,sp" }, + { 0x00da, 0x00ff, ' ', 3, "ora %2,sp" }, + { 0x00db, 0x00ff, ' ', 3, "add %2,sp" }, + { 0x00de, 0x00ff, ' ', 3, "ldx %2,sp" }, + { 0x00df, 0x00ff, ' ', 3, "stx %2,sp" }, + + { 0x00e0, 0x00ff, ' ', 2, "sub %1,sp" }, + { 0x00e1, 0x00ff, ' ', 2, "cmp %1,sp" }, + { 0x00e2, 0x00ff, ' ', 2, "sbc %1,sp" }, + { 0x00e3, 0x00ff, ' ', 2, "cpx %1,sp" }, + { 0x00e4, 0x00ff, ' ', 2, "and %1,sp" }, + { 0x00e5, 0x00ff, ' ', 2, "bit %1,sp" }, + { 0x00e6, 0x00ff, ' ', 2, "lda %1,sp" }, + { 0x00e7, 0x00ff, ' ', 2, "sta %1,sp" }, + { 0x00e8, 0x00ff, ' ', 2, "eor %1,sp" }, + { 0x00e9, 0x00ff, ' ', 2, "adc %1,sp" }, + { 0x00ea, 0x00ff, ' ', 2, "ora %1,sp" }, + { 0x00eb, 0x00ff, ' ', 2, "add %1,sp" }, + { 0x00ee, 0x00ff, ' ', 2, "ldx %1,sp" }, + { 0x00ef, 0x00ff, ' ', 2, "stx %1,sp" }, + + { 0, 0, 0, 0, NULL } +}; + + +/* glob.cc */ diff --git a/sim/ucsim/hc08.src/glob.h b/sim/ucsim/hc08.src/glob.h new file mode 100644 index 0000000..eda7f1f --- /dev/null +++ b/sim/ucsim/hc08.src/glob.h @@ -0,0 +1,41 @@ +/* + * Simulator of microcontrollers (glob.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef GLOB_HEADER +#define GLOB_HEADER + +#include "stypes.h" + + +extern struct dis_entry disass_hc08[]; + +extern struct dis_entry disass_hc08_9e[]; + + +#endif + +/* End of hc08.src/glob.h */ diff --git a/sim/ucsim/hc08.src/hc08.cc b/sim/ucsim/hc08.src/hc08.cc new file mode 100644 index 0000000..2028ee1 --- /dev/null +++ b/sim/ucsim/hc08.src/hc08.cc @@ -0,0 +1,599 @@ +/* + * Simulator of microcontrollers (hc08.cc) + * + * some hc08 code base from Karl Bongers karl@turbobit.com + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include /* for va_list */ +#include +#include +#include +#include "i_string.h" + +// prj +#include "pobjcl.h" + +// sim +#include "simcl.h" + +// local +#include "hc08cl.h" +#include "glob.h" +#include "regshc08.h" +#include "hc08mac.h" + +#define uint32 t_addr +#define uint8 unsigned char + +/*******************************************************************/ + + +/* + * Base type of HC08 controllers + */ + +cl_hc08::cl_hc08(class cl_sim *asim): + cl_uc(asim) +{ + type= CPU_HC08; +} + +int +cl_hc08::init(void) +{ + cl_uc::init(); /* Memories now exist */ + + xtal = 8000000; + + rom= address_space(MEM_ROM_ID); +// ram= mem(MEM_XRAM); + ram= rom; + + // zero out ram(this is assumed in regression tests) + for (int i=0x80; i<0x8000; i++) { + ram->set((t_addr) i, 0); + } + + return(0); +} + + +void +cl_hc08::reset(void) +{ + cl_uc::reset(); + + regs.SP = 0xff; + regs.A = 0; + regs.X = 0; + regs.H = 0; + regs.P = 0x60; + regs.VECTOR = 1; + +} + + +const char * +cl_hc08::id_string(void) +{ + return("unspecified HC08"); +} + + +/* + * Making elements of the controller + */ +/* +t_addr +cl_hc08::get_mem_size(enum mem_class type) +{ + switch(type) + { + case MEM_ROM: return(0x10000); + case MEM_XRAM: return(0x10000); + default: return(0); + } + return(cl_uc::get_mem_size(type)); +} +*/ +void +cl_hc08::mk_hw_elements(void) +{ + //class cl_base *o; + /* t_uc::mk_hw() does nothing */ +} + +void +cl_hc08::make_memories(void) +{ + class cl_address_space *as; + + as= new cl_address_space("rom", 0, 0x10000, 8); + as->init(); + address_spaces->add(as); + + class cl_address_decoder *ad; + class cl_memory_chip *chip; + + chip= new cl_memory_chip("rom_chip", 0x10000, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= address_space("rom"), chip, 0, 0xffff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); +} + + +/* + * Help command interpreter + */ + +struct dis_entry * +cl_hc08::dis_tbl(void) +{ + return(disass_hc08); +} + +/*struct name_entry * +cl_hc08::sfr_tbl(void) +{ + return(0); +}*/ + +/*struct name_entry * +cl_hc08::bit_tbl(void) +{ + //FIXME + return(0); +}*/ + +int +cl_hc08::inst_length(t_addr addr) +{ + int len = 0; + + get_disasm_info(addr, &len, NULL, NULL); + + return len; +} + +int +cl_hc08::inst_branch(t_addr addr) +{ + int b; + + get_disasm_info(addr, NULL, &b, NULL); + + return b; +} + +int +cl_hc08::longest_inst(void) +{ + return 4; +} + + +const char * +cl_hc08::get_disasm_info(t_addr addr, + int *ret_len, + int *ret_branch, + int *immed_offset) +{ + const char *b = NULL; + uint code; + int len = 0; + int immed_n = 0; + int i; + int start_addr = addr; + struct dis_entry *dis_e; + + code= get_mem(MEM_ROM_ID, addr++); + dis_e = NULL; + + switch(code) { + case 0x9e: /* ESC code to sp relative op-codes */ + code= get_mem(MEM_ROM_ID, addr++); + i= 0; + while ((code & disass_hc08_9e[i].mask) != disass_hc08_9e[i].code && + disass_hc08_9e[i].mnemonic) + i++; + dis_e = &disass_hc08_9e[i]; + b= disass_hc08_9e[i].mnemonic; + if (b != NULL) + len += (disass_hc08_9e[i].length + 1); + break; + + default: + i= 0; + while ((code & disass_hc08[i].mask) != disass_hc08[i].code && + disass_hc08[i].mnemonic) + i++; + dis_e = &disass_hc08[i]; + b= disass_hc08[i].mnemonic; + if (b != NULL) + len += (disass_hc08[i].length); + break; + } + + if (ret_branch) { + *ret_branch = dis_e->branch; + } + + if (immed_offset) { + if (immed_n > 0) + *immed_offset = immed_n; + else *immed_offset = (addr - start_addr); + } + + if (len == 0) + len = 1; + + if (ret_len) + *ret_len = len; + + return b; +} + +const char * +cl_hc08::disass(t_addr addr, const char *sep) +{ + char work[256], temp[20]; + const char *b; + char *buf, *p, *t; + int len = 0; + int immed_offset = 0; + + p= work; + + b = get_disasm_info(addr, &len, NULL, &immed_offset); + + if (b == NULL) { + buf= (char*)malloc(30); + strcpy(buf, "UNKNOWN/INVALID"); + return(buf); + } + + while (*b) + { + if (*b == '%') + { + b++; + switch (*(b++)) + { + case 's': // s signed byte immediate + sprintf(temp, "#%d", (char)get_mem(MEM_ROM_ID, addr+immed_offset)); + ++immed_offset; + break; + case 'w': // w word immediate operand + sprintf(temp, "#0x%04x", + (uint)((get_mem(MEM_ROM_ID, addr+immed_offset)<<8) | + (get_mem(MEM_ROM_ID, addr+immed_offset+1))) ); + ++immed_offset; + ++immed_offset; + break; + case 'b': // b byte immediate operand + sprintf(temp, "#0x%02x", (uint)get_mem(MEM_ROM_ID, addr+immed_offset)); + ++immed_offset; + break; + case 'x': // x extended addressing + sprintf(temp, "0x%04x", + (uint)((get_mem(MEM_ROM_ID, addr+immed_offset)<<8) | + (get_mem(MEM_ROM_ID, addr+immed_offset+1))) ); + ++immed_offset; + ++immed_offset; + break; + case 'd': // d direct addressing + sprintf(temp, "*0x%02x", (uint)get_mem(MEM_ROM_ID, addr+immed_offset)); + ++immed_offset; + break; + case '2': // 2 word index offset + sprintf(temp, "0x%04x", + (uint)((get_mem(MEM_ROM_ID, addr+immed_offset)<<8) | + (get_mem(MEM_ROM_ID, addr+immed_offset+1))) ); + ++immed_offset; + ++immed_offset; + break; + case '1': // b byte index offset + sprintf(temp, "0x%02x", (uint)get_mem(MEM_ROM_ID, addr+immed_offset)); + ++immed_offset; + break; + case 'p': // b byte index offset + sprintf(temp, "0x%04x", + addr+immed_offset+1 + +(char)get_mem(MEM_ROM_ID, addr+immed_offset)); + ++immed_offset; + break; + default: + strcpy(temp, "?"); + break; + } + t= temp; + while (*t) + *(p++)= *(t++); + } + else + *(p++)= *(b++); + } + *p= '\0'; + + p= strchr(work, ' '); + if (!p) + { + buf= strdup(work); + return(buf); + } + if (sep == NULL) + buf= (char *)malloc(6+strlen(p)+1); + else + buf= (char *)malloc((p-work)+strlen(sep)+strlen(p)+1); + for (p= work, t= buf; *p != ' '; p++, t++) + *t= *p; + p++; + *t= '\0'; + if (sep == NULL) + { + while (strlen(buf) < 6) + strcat(buf, " "); + } + else + strcat(buf, sep); + strcat(buf, p); + return(buf); +} + + +void +cl_hc08::print_regs(class cl_console_base *con) +{ + con->dd_printf("V--HINZC Flags= 0x%02x %3d %c ", + regs.P, regs.P, isprint(regs.P)?regs.P:'.'); + con->dd_printf("A= 0x%02x %3d %c\n", + regs.A, regs.A, isprint(regs.A)?regs.A:'.'); + con->dd_printf("%c--%c%c%c%c%c ", + (regs.P&BIT_V)?'1':'0', + (regs.P&BIT_H)?'1':'0', + (regs.P&BIT_I)?'1':'0', + (regs.P&BIT_N)?'1':'0', + (regs.P&BIT_Z)?'1':'0', + (regs.P&BIT_C)?'1':'0'); + con->dd_printf(" H= 0x%02x %3d %c ", + regs.H, regs.H, isprint(regs.H)?regs.H:'.'); + con->dd_printf("X= 0x%02x %3d %c\n", + regs.X, regs.X, isprint(regs.X)?regs.X:'.'); + con->dd_printf("SP= 0x%04x [SP+1]= %02x %3d %c\n", + regs.SP, ram->get(regs.SP+1), ram->get(regs.SP+1), + isprint(ram->get(regs.SP+1))?ram->get(regs.SP+1):'.'); + + print_disass(PC, con); +} + +/* + * Execution + */ + +int +cl_hc08::exec_inst(void) +{ + t_mem code; + + if (regs.VECTOR) { + PC = get2(0xfffe); + regs.VECTOR = 0; + return(resGO); + } + + if (fetch(&code)) + return(resBREAKPOINT); + tick(1); + switch ((code >> 4) & 0xf) { + case 0x0: return(inst_bittestsetclear(code, false)); + case 0x1: return(inst_bitsetclear(code, false)); + case 0x2: return(inst_condbranch(code, false)); + case 0x3: + case 0x4: + case 0x5: + case 0x6: + case 0x7: + switch (code & 0xf) { + case 0x0: return(inst_neg(code, false)); + case 0x1: return(inst_cbeq(code, false)); + case 0x2: + switch (code) { + case 0x42: return(inst_mul(code, false)); + case 0x52: return(inst_div(code, false)); + case 0x62: return(inst_nsa(code, false)); + case 0x72: return(inst_daa(code, false)); + default: return(resHALT); + } + case 0x3: return(inst_com(code, false)); + case 0x4: return(inst_lsr(code, false)); + case 0x5: + switch (code) { + case 0x35: return(inst_sthx(code, false)); + case 0x45: + case 0x55: return(inst_ldhx(code, false)); + case 0x65: + case 0x75: return(inst_cphx(code, false)); + default: return(resHALT); + } + case 0x6: return(inst_ror(code, false)); + case 0x7: return(inst_asr(code, false)); + case 0x8: return(inst_lsl(code, false)); + case 0x9: return(inst_rol(code, false)); + case 0xa: return(inst_dec(code, false)); + case 0xb: return(inst_dbnz(code, false)); + case 0xc: return(inst_inc(code, false)); + case 0xd: return(inst_tst(code, false)); + case 0xe: + switch (code) { + case 0x4e: + case 0x5e: + case 0x6e: + case 0x7e: return(inst_mov(code, false)); + default: return(resHALT); + } + case 0xf: return(inst_clr(code, false)); + default: return(resHALT); + } + case 0x8: + switch (code & 0xf) { + case 0x0: return(inst_rti(code, false)); + case 0x1: return(inst_rts(code, false)); + case 0x3: return(inst_swi(code, false)); + case 0x4: + case 0x5: return(inst_transfer(code, false)); + case 0x6: + case 0x7: + case 0x8: + case 0x9: + case 0xa: + case 0xb: return(inst_pushpull(code, false)); + case 0xc: return(inst_clrh(code, false)); + case 0xe: return(inst_stop(code, false)); + case 0xf: return(inst_wait(code, false)); + default: return(resHALT); + } + case 0x9: + switch (code & 0xf) { + case 0x0: + case 0x1: + case 0x2: + case 0x3: return(inst_condbranch(code, false)); + case 0x4: + case 0x5: + case 0x7: + case 0xf: return(inst_transfer(code, false)); + case 0x8: + case 0x9: + case 0xa: + case 0xb: return(inst_setclearflags(code, false)); + case 0xc: return(inst_rsp(code, false)); + case 0xd: return(inst_nop(code, false)); + case 0xe: + code = fetch(); + switch ((code >> 4) & 0xf) { + case 0x6: + switch (code & 0xf) { + case 0x0: return(inst_neg(code, true)); + case 0x1: return(inst_cbeq(code, true)); + case 0x3: return(inst_com(code, true)); + case 0x4: return(inst_lsr(code, true)); + case 0x6: return(inst_ror(code, true)); + case 0x7: return(inst_asr(code, true)); + case 0x8: return(inst_lsl(code, true)); + case 0x9: return(inst_rol(code, true)); + case 0xa: return(inst_dec(code, true)); + case 0xb: return(inst_dbnz(code, true)); + case 0xc: return(inst_inc(code, true)); + case 0xd: return(inst_tst(code, true)); + case 0xf: return(inst_clr(code, true)); + default: return(resHALT); + } + case 0xd: + case 0xe: + switch (code & 0xf) { + case 0x0: return(inst_sub(code, true)); + case 0x1: return(inst_cmp(code, true)); + case 0x2: return(inst_sbc(code, true)); + case 0x3: return(inst_cpx(code, true)); + case 0x4: return(inst_and(code, true)); + case 0x5: return(inst_bit(code, true)); + case 0x6: return(inst_lda(code, true)); + case 0x7: return(inst_sta(code, true)); + case 0x8: return(inst_eor(code, true)); + case 0x9: return(inst_adc(code, true)); + case 0xa: return(inst_ora(code, true)); + case 0xb: return(inst_add(code, true)); + case 0xc: return(resHALT); + case 0xd: putchar(regs.A); fflush(stdout); return(resGO); + case 0xe: return(inst_ldx(code, true)); + case 0xf: return(inst_stx(code, true)); + default: return(resHALT); + } + default: return(resHALT); + } + + } + case 0xa: + case 0xb: + case 0xc: + case 0xd: + case 0xe: + case 0xf: + switch (code & 0xf) { + case 0x0: return(inst_sub(code, false)); + case 0x1: return(inst_cmp(code, false)); + case 0x2: return(inst_sbc(code, false)); + case 0x3: return(inst_cpx(code, false)); + case 0x4: return(inst_and(code, false)); + case 0x5: return(inst_bit(code, false)); + case 0x6: return(inst_lda(code, false)); + case 0x7: + if (code==0xa7) + return(inst_ais(code, false)); + else + return(inst_sta(code, false)); + case 0x8: return(inst_eor(code, false)); + case 0x9: return(inst_adc(code, false)); + case 0xa: return(inst_ora(code, false)); + case 0xb: return(inst_add(code, false)); + case 0xc: + if (code==0xac) + return(resHALT); + else + return(inst_jmp(code, false)); + case 0xd: + if (code==0xad) + return(inst_bsr(code, false)); + else + return(inst_jsr(code, false)); + case 0xe: return(inst_ldx(code, false)); + case 0xf: + if (code==0xaf) + return(inst_aix(code, false)); + else + return(inst_stx(code, false)); + default: return(resHALT); + } + default: return(resHALT); + } + + /*if (PC) + PC--; + else + PC= get_mem_size(MEM_ROM_ID)-1;*/ + PC= rom->inc_address(PC, -1); + + sim->stop(resINV_INST); + return(resINV_INST); +} + + +/* End of hc08.src/hc08.cc */ diff --git a/sim/ucsim/hc08.src/hc08cl.h b/sim/ucsim/hc08.src/hc08cl.h new file mode 100644 index 0000000..debabed --- /dev/null +++ b/sim/ucsim/hc08.src/hc08cl.h @@ -0,0 +1,76 @@ +/* + * Simulator of microcontrollers (hc08cl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef HC08CL_HEADER +#define HC08CL_HEADER + +#include "uccl.h" + +#include "regshc08.h" + + +/* + * Base type of Z80 microcontrollers + */ + +class cl_hc08: public cl_uc +{ +public: + class cl_memory *ram; + class cl_memory *rom; + struct t_regs regs; +public: + cl_hc08(class cl_sim *asim); + virtual int init(void); + virtual const char *id_string(void); + + //virtual t_addr get_mem_size(enum mem_class type); + virtual void mk_hw_elements(void); + virtual void make_memories(void); + + virtual struct dis_entry *dis_tbl(void); + virtual int inst_length(t_addr addr); + virtual int inst_branch(t_addr addr); + virtual int longest_inst(void); + virtual const char *disass(t_addr addr, const char *sep); + virtual void print_regs(class cl_console_base *con); + + virtual int exec_inst(void); + + virtual const char *get_disasm_info(t_addr addr, + int *ret_len, + int *ret_branch, + int *immed_offset); + + virtual void reset(void); +#include "instcl.h" +}; + + +#endif + +/* End of hc08.src/hc08cl.h */ diff --git a/sim/ucsim/hc08.src/hc08mac.h b/sim/ucsim/hc08.src/hc08mac.h new file mode 100644 index 0000000..d061cfe --- /dev/null +++ b/sim/ucsim/hc08.src/hc08mac.h @@ -0,0 +1,45 @@ +/* + * Simulator of microcontrollers (z80mac.h) + * + * some z80 code base from Karl Bongers karl@turbobit.com + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +// shift positions +#define BITPOS_C 0 // 1 +#define BITPOS_Z 1 // 2H +#define BITPOS_N 2 // 4H +#define BITPOS_I 3 // 8H +#define BITPOS_H 4 // 10H +#define BITPUS_V 7 // 80H + +#define store2(addr, val) { ram->set((t_addr) (addr), (val >> 8) & 0xff); \ + ram->set((t_addr) (addr+1), val & 0xff); } +#define store1(addr, val) ram->set((t_addr) (addr), val) +#define get1(addr) ram->get((t_addr) (addr)) +#define get2(addr) ((ram->get((t_addr) (addr)) << 8) | ram->get((t_addr) (addr+1)) ) +#define fetch2() ((fetch() << 8) | fetch() ) +#define fetch1() fetch() +#define push2(val) {store2(regs.SP-1,(val)); regs.SP-=2; } +#define push1(val) {store1(regs.SP,(val)); regs.SP-=1; } +#define pop2(var) {var=get2(regs.SP+1); regs.SP+=2;} +#define pop1(var) {var=get1(regs.SP+1); regs.SP+=1;} + + +#define FLAG_SET(f) {regs.P |= f;} +#define FLAG_CLEAR(f) {regs.P &= ~(f);} +#define FLAG_ASSIGN(f,c) {regs.P = (c) ? regs.P | (f) : regs.P & ~(f);} +#define FLAG_NZ(f) { \ + regs.P = (regs.P & ~(BIT_N|BIT_Z)) \ + | (((f) & 0xff) ? 0 : BIT_Z) \ + | (((f) & 0x80) ? BIT_N : 0) \ + ; } +#define EA_IMM(c) ((((c) >> 4) & 0xf)==0xa) +#define OPERAND(code,prefix) (EA_IMM(code) ? fetch() : get1(fetchea(code,prefix))) + + + diff --git a/sim/ucsim/hc08.src/inst.cc b/sim/ucsim/hc08.src/inst.cc new file mode 100644 index 0000000..08f786f --- /dev/null +++ b/sim/ucsim/hc08.src/inst.cc @@ -0,0 +1,1143 @@ +/* + * Simulator of microcontrollers (inst.cc) + * + * hc08 code base from Erik Petrich epetrich@users.sourceforge.net + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" +#include "stdio.h" +#include + +// local +#include "hc08cl.h" +#include "regshc08.h" +#include "hc08mac.h" + + + +void +cl_hc08::incx(void) +{ + int hx = (regs.H << 8) | (regs.X); + hx++; + regs.H = (hx >> 8) & 0xff; + regs.X = hx & 0xff; +} + +int +cl_hc08::fetchea(t_mem code, bool prefix) +{ + switch ((code >> 4) & 0x0f) { + case 0x0: + case 0x1: + case 0x3: + case 0xb: + return fetch(); // Direct + case 0x7: + case 0xf: + return (regs.H << 8) | regs.X; // IX + case 0x6: + case 0xe: + if (!prefix) + return ((unsigned char)fetch())+((regs.H << 8) | regs.X); // IX1 + else + return ((unsigned char)fetch())+regs.SP; // SP1 + case 0xd: + if (!prefix) + return fetch2()+((regs.H << 8) | regs.X); // IX2 + else + return fetch2()+regs.SP; // SP2 + case 0xc: + return fetch2(); + default: + return(resHALT); + } +} + + +int +cl_hc08::inst_nop(t_mem code, bool prefix) +{ + return(resGO); +} + + +int +cl_hc08::inst_transfer(t_mem code, bool prefix) +{ + int hx; + + switch (code) { + case 0x84: // TAP + regs.P = regs.A | 0x60; + break; + case 0x85: // TPA + regs.A = regs.P | 0x60; + break; + case 0x97: // TAX + regs.X = regs.A; + break; + case 0x9f: // TXA + regs.A = regs.X; + break; + case 0x94: // TXS + hx = (regs.H << 8) | regs.X; + regs.SP = (hx - 1) & 0xffff; + break; + case 0x95: // TSX + hx = regs.SP +1; + regs.H = (hx >> 8) & 0xff; + regs.X = hx & 0xff; + break; + default: + return(resHALT); + } + return(resGO); +} + + +int +cl_hc08::inst_setclearflags(t_mem code, bool prefix) +{ + switch (code) { + case 0x98: + regs.P &= ~BIT_C; + break; + case 0x99: + regs.P |= BIT_C; + break; + case 0x9a: + regs.P &= ~BIT_I; + break; + case 0x9b: + regs.P |= BIT_I; + break; + default: + return(resHALT); + } + return(resGO); +} + + +int +cl_hc08::inst_rsp(t_mem code, bool prefix) +{ + regs.SP = 0x00ff; + return(resGO); +} + + +int +cl_hc08::inst_nsa(t_mem code, bool prefix) +{ + regs.A = ((regs.A & 0xf0)>>4) | ((regs.A & 0x0f)<<4); + return(resGO); +} + + + +int +cl_hc08::inst_lda(t_mem code, bool prefix) +{ + regs.A = OPERAND(code, prefix); + FLAG_CLEAR(BIT_V); + FLAG_NZ(regs.A); + return(resGO); +} + +int +cl_hc08::inst_ldx(t_mem code, bool prefix) +{ + regs.X = OPERAND(code, prefix); + FLAG_CLEAR(BIT_V); + FLAG_NZ(regs.X); + return(resGO); +} + +int +cl_hc08::inst_sta(t_mem code, bool prefix) +{ + int ea = fetchea(code, prefix); + + //fprintf (stdout, "ea = 0x%04x\n", ea); + + FLAG_CLEAR(BIT_V); + FLAG_NZ(regs.A); + store1(ea, regs.A); + return(resGO); +} + +int +cl_hc08::inst_stx(t_mem code, bool prefix) +{ + int ea = fetchea(code, prefix); + + FLAG_CLEAR(BIT_V); + FLAG_NZ(regs.X); + store1(ea, regs.X); + return(resGO); +} + +int +cl_hc08::inst_add(t_mem code, bool prefix) +{ + int result, operand1, operand2; + + operand1 = regs.A; + operand2 = OPERAND(code, prefix); + result = operand1 + operand2; + FLAG_NZ (result); + FLAG_ASSIGN (BIT_V, 0x80 & (operand1 ^ operand2 ^ result ^ (result >>1))); + FLAG_ASSIGN (BIT_C, 0x100 & result); + FLAG_ASSIGN (BIT_H, 0x10 & (operand1 ^ operand2 ^ result)); + + regs.A = result & 0xff; + return(resGO); +} + +int +cl_hc08::inst_adc(t_mem code, bool prefix) +{ + int result, operand1, operand2; + int carryin = (regs.P & BIT_C)!=0; + + operand1 = regs.A; + operand2 = OPERAND(code, prefix); + result = operand1 + operand2 + carryin; + FLAG_NZ (result); + FLAG_ASSIGN (BIT_V, 0x80 & (operand1 ^ operand2 ^ result ^ (result >>1))); + FLAG_ASSIGN (BIT_C, 0x100 & result); + FLAG_ASSIGN (BIT_H, 0x10 & (operand1 ^ operand2 ^ result)); + + regs.A = result & 0xff; + return(resGO); +} + +int +cl_hc08::inst_sub(t_mem code, bool prefix) +{ + int result, operand1, operand2; + + operand1 = regs.A; + operand2 = OPERAND(code, prefix); + result = operand1 - operand2; + FLAG_NZ (result); + FLAG_ASSIGN (BIT_V, 0x80 & (operand1 ^ operand2 ^ result ^ (result >>1))); + FLAG_ASSIGN (BIT_C, 0x100 & result); + + regs.A = result & 0xff; + return(resGO); +} + +int +cl_hc08::inst_sbc(t_mem code, bool prefix) +{ + int result, operand1, operand2; + int carryin = (regs.P & BIT_C)!=0; + + operand1 = regs.A; + operand2 = OPERAND(code, prefix); + result = operand1 - operand2 - carryin; + FLAG_NZ (result); + FLAG_ASSIGN (BIT_V, 0x80 & (operand1 ^ operand2 ^ result ^ (result >>1))); + FLAG_ASSIGN (BIT_C, 0x100 & result); + + regs.A = result & 0xff; + return(resGO); +} + +int +cl_hc08::inst_cmp(t_mem code, bool prefix) +{ + int result, operand1, operand2; + + operand1 = regs.A; + operand2 = OPERAND(code, prefix); + result = operand1 - operand2; + FLAG_NZ (result); + FLAG_ASSIGN (BIT_V, 0x80 & (operand1 ^ operand2 ^ result ^ (result >>1))); + FLAG_ASSIGN (BIT_C, 0x100 & result); + + return(resGO); +} + +int +cl_hc08::inst_cpx(t_mem code, bool prefix) +{ + int result, operand1, operand2; + + operand1 = regs.X; + operand2 = OPERAND(code, prefix); + result = operand1 - operand2; + FLAG_NZ (result); + FLAG_ASSIGN (BIT_V, 0x80 & (operand1 ^ operand2 ^ result ^ (result >>1))); + FLAG_ASSIGN (BIT_C, 0x100 & result); + + return(resGO); +} + +int +cl_hc08::inst_jmp(t_mem code, bool prefix) +{ + PC = fetchea(code, prefix); + + return(resGO); +} + +int +cl_hc08::inst_jsr(t_mem code, bool prefix) +{ + int newPC = fetchea(code, prefix); + + push2(PC); + PC = newPC; + + return(resGO); +} + +int +cl_hc08::inst_bsr(t_mem code, bool prefix) +{ + signed char ofs = fetch(); + + push2(PC); + PC += ofs; + + return(resGO); +} + +int +cl_hc08::inst_ais(t_mem code, bool prefix) +{ + regs.SP = regs.SP + (signed char)fetch(); + return(resGO); +} + +int +cl_hc08::inst_aix(t_mem code, bool prefix) +{ + int hx = (regs.H << 8) | (regs.X); + hx += (signed char)fetch(); + regs.H = (hx >> 8) & 0xff; + regs.X = hx & 0xff; + return(resGO); +} + +int +cl_hc08::inst_and(t_mem code, bool prefix) +{ + regs.A = regs.A & OPERAND(code, prefix); + FLAG_CLEAR(BIT_V); + FLAG_NZ(regs.A); + return(resGO); +} + +int +cl_hc08::inst_bit(t_mem code, bool prefix) +{ + uchar operand = regs.A & OPERAND(code, prefix); + FLAG_CLEAR(BIT_V); + FLAG_NZ(operand); + return(resGO); +} + +int +cl_hc08::inst_ora(t_mem code, bool prefix) +{ + regs.A = regs.A | OPERAND(code, prefix); + FLAG_CLEAR(BIT_V); + FLAG_NZ(regs.A); + return(resGO); +} + +int +cl_hc08::inst_eor(t_mem code, bool prefix) +{ + regs.A = regs.A ^ OPERAND(code, prefix); + FLAG_CLEAR(BIT_V); + FLAG_NZ(regs.A); + return(resGO); +} + +int +cl_hc08::inst_asr(t_mem code, bool prefix) +{ + int ea = 0xffff; + uchar operand; + + if ((code & 0xf0) == 0x40) + operand = regs.A; + else if ((code & 0xf0) == 0x50) + operand = regs.X; + else { + ea = fetchea(code,prefix); + operand = get1(ea); + } + + FLAG_ASSIGN (BIT_C, operand & 1); + operand = (operand >> 1) | (operand & 0x80); + FLAG_NZ (operand); + FLAG_ASSIGN (BIT_V, ((regs.P & BIT_C)!=0) ^ ((regs.P & BIT_N)!=0)); + + if ((code & 0xf0) == 0x40) + regs.A = operand; + else if ((code & 0xf0) == 0x50) + regs.X = operand; + else { + store1(ea, operand); + } + + return(resGO); +} + + +int +cl_hc08::inst_lsr(t_mem code, bool prefix) +{ + int ea = 0xffff; + uchar operand; + + if ((code & 0xf0) == 0x40) + operand = regs.A; + else if ((code & 0xf0) == 0x50) + operand = regs.X; + else { + ea = fetchea(code,prefix); + operand = get1(ea); + } + + FLAG_ASSIGN (BIT_C, operand & 1); + operand = (operand >> 1) & 0x7f; + FLAG_NZ (operand); + FLAG_ASSIGN (BIT_V, ((regs.P & BIT_C)!=0) ^ ((regs.P & BIT_N)!=0)); + + if ((code & 0xf0) == 0x40) + regs.A = operand; + else if ((code & 0xf0) == 0x50) + regs.X = operand; + else { + store1(ea, operand); + } + return(resGO); +} + + +int +cl_hc08::inst_lsl(t_mem code, bool prefix) +{ + int ea = 0xffff; + uchar operand; + + if ((code & 0xf0) == 0x40) + operand = regs.A; + else if ((code & 0xf0) == 0x50) + operand = regs.X; + else { + ea = fetchea(code,prefix); + operand = get1(ea); + } + + FLAG_ASSIGN (BIT_C, operand & 0x80); + operand = (operand << 1); + FLAG_NZ (operand); + FLAG_ASSIGN (BIT_V, ((regs.P & BIT_C)!=0) ^ ((regs.P & BIT_N)!=0)); + + if ((code & 0xf0) == 0x40) + regs.A = operand; + else if ((code & 0xf0) == 0x50) + regs.X = operand; + else { + store1(ea, operand); + } + return(resGO); +} + + +int +cl_hc08::inst_rol(t_mem code, bool prefix) +{ + uchar c = (regs.P & BIT_C)!=0; + int ea = 0xffff; + uchar operand; + + if ((code & 0xf0) == 0x40) + operand = regs.A; + else if ((code & 0xf0) == 0x50) + operand = regs.X; + else { + ea = fetchea(code,prefix); + operand = get1(ea); + } + + FLAG_ASSIGN (BIT_C, operand & 0x80); + operand = (operand << 1) | c; + FLAG_NZ (operand); + FLAG_ASSIGN (BIT_V, ((regs.P & BIT_C)!=0) ^ ((regs.P & BIT_N)!=0)); + + if ((code & 0xf0) == 0x40) + regs.A = operand; + else if ((code & 0xf0) == 0x50) + regs.X = operand; + else { + store1(ea, operand); + } + return(resGO); +} + + +int +cl_hc08::inst_ror(t_mem code, bool prefix) +{ + uchar c = (regs.P & BIT_C)!=0; + int ea = 0xffff; + uchar operand; + + if ((code & 0xf0) == 0x40) + operand = regs.A; + else if ((code & 0xf0) == 0x50) + operand = regs.X; + else { + ea = fetchea(code,prefix); + operand = get1(ea); + } + + FLAG_ASSIGN (BIT_C, operand & 1); + operand = (operand >> 1) | (c << 7); + FLAG_NZ (operand); + FLAG_ASSIGN (BIT_V, ((regs.P & BIT_C)!=0) ^ ((regs.P & BIT_N)!=0)); + + if ((code & 0xf0) == 0x40) + regs.A = operand; + else if ((code & 0xf0) == 0x50) + regs.X = operand; + else { + store1(ea, operand); + } + return(resGO); +} + + +int +cl_hc08::inst_inc(t_mem code, bool prefix) +{ + int ea = 0xffff; + uchar operand; + + if ((code & 0xf0) == 0x40) + operand = regs.A; + else if ((code & 0xf0) == 0x50) + operand = regs.X; + else { + ea = fetchea(code,prefix); + operand = get1(ea); + } + + operand++; + FLAG_NZ (operand); + FLAG_ASSIGN (BIT_V, operand == 0x80); + + if ((code & 0xf0) == 0x40) + regs.A = operand; + else if ((code & 0xf0) == 0x50) + regs.X = operand; + else { + store1(ea, operand); + } + return(resGO); +} + + +int +cl_hc08::inst_dec(t_mem code, bool prefix) +{ + int ea = 0xffff; + uchar operand; + + if ((code & 0xf0) == 0x40) + operand = regs.A; + else if ((code & 0xf0) == 0x50) + operand = regs.X; + else { + ea = fetchea(code,prefix); + operand = get1(ea); + } + + operand--; + FLAG_NZ (operand); + FLAG_ASSIGN (BIT_V, operand == 0x7f); + + if ((code & 0xf0) == 0x40) + regs.A = operand; + else if ((code & 0xf0) == 0x50) + regs.X = operand; + else { + store1(ea, operand); + } + return(resGO); +} + +int +cl_hc08::inst_dbnz(t_mem code, bool prefix) +{ + int ea = 0xffff; + uchar operand; + signed char ofs; + + if ((code & 0xf0) == 0x40) + operand = regs.A; + else if ((code & 0xf0) == 0x50) + operand = regs.X; + else { + ea = fetchea(code,prefix); + operand = get1(ea); + } + + operand--; + FLAG_NZ (operand); + FLAG_ASSIGN (BIT_V, operand == 0x7f); + + if ((code & 0xf0) == 0x40) + regs.A = operand; + else if ((code & 0xf0) == 0x50) + regs.X = operand; + else { + store1(ea, operand); + } + + ofs = fetch(); + if (operand) + PC += ofs; + + return(resGO); +} + + +int +cl_hc08::inst_tst(t_mem code, bool prefix) +{ + int ea = 0xffff; + uchar operand; + + if ((code & 0xf0) == 0x40) + operand = regs.A; + else if ((code & 0xf0) == 0x50) + operand = regs.X; + else { + ea = fetchea(code,prefix); + operand = get1(ea); + } + + FLAG_NZ (operand); + FLAG_CLEAR (BIT_V); + + return(resGO); +} + + +int +cl_hc08::inst_clr(t_mem code, bool prefix) +{ + int ea = 0xffff; + uchar operand; + + operand = 0; + FLAG_CLEAR (BIT_V); + FLAG_CLEAR (BIT_N); + FLAG_SET (BIT_Z); + + if ((code & 0xf0) == 0x40) + regs.A = operand; + else if ((code & 0xf0) == 0x50) + regs.X = operand; + else { + ea = fetchea(code,prefix); + store1(ea, operand); + } + return(resGO); +} + + +int +cl_hc08::inst_clrh(t_mem code, bool prefix) +{ + FLAG_CLEAR (BIT_V); + FLAG_CLEAR (BIT_N); + FLAG_SET (BIT_Z); + regs.H = 0; + return(resGO); +} + + +int +cl_hc08::inst_com(t_mem code, bool prefix) +{ + int ea = 0xffff; + uchar operand; + + if ((code & 0xf0) == 0x40) + operand = regs.A; + else if ((code & 0xf0) == 0x50) + operand = regs.X; + else { + ea = fetchea(code,prefix); + operand = get1(ea); + } + + operand = ~operand; + FLAG_SET (BIT_C); + FLAG_NZ (operand); + FLAG_CLEAR (BIT_V); + + if ((code & 0xf0) == 0x40) + regs.A = operand; + else if ((code & 0xf0) == 0x50) + regs.X = operand; + else { + store1(ea, operand); + } + return(resGO); +} + + +int +cl_hc08::inst_neg(t_mem code, bool prefix) +{ + int ea = 0xffff; + uchar operand; + + if ((code & 0xf0) == 0x40) + operand = regs.A; + else if ((code & 0xf0) == 0x50) + operand = regs.X; + else { + ea = fetchea(code,prefix); + operand = get1(ea); + } + + FLAG_ASSIGN (BIT_V, operand==0x80); + FLAG_ASSIGN (BIT_C, operand!=0x00); + operand = -operand; + FLAG_NZ (operand); + + if ((code & 0xf0) == 0x40) + regs.A = operand; + else if ((code & 0xf0) == 0x50) + regs.X = operand; + else { + store1(ea, operand); + } + return(resGO); +} + + + +int +cl_hc08::inst_pushpull(t_mem code, bool prefix) +{ + switch (code) { + case 0x86: + pop1(regs.A); + break; + case 0x87: + push1(regs.A); + break; + case 0x88: + pop1(regs.X); + break; + case 0x89: + push1(regs.X); + break; + case 0x8a: + pop1(regs.H); + break; + case 0x8b: + push1(regs.H); + break; + default: + return(resHALT); + } + return(resGO); +} + + + + +int +cl_hc08::inst_stop(t_mem code, bool prefix) +{ + FLAG_CLEAR (BIT_I); + return(resGO); +} + + +int +cl_hc08::inst_wait(t_mem code, bool prefix) +{ + FLAG_CLEAR (BIT_I); + return(resGO); +} + + +int +cl_hc08::inst_daa(t_mem code, bool prefix) +{ + uchar lsn, msn; + + lsn = regs.A & 0xf; + msn = (regs.A >> 4) & 0xf; + if (regs.P & BIT_H) { + lsn += 16; + msn = (msn-1) & 0xf; + } + if (regs.P & BIT_C) + msn += 16; + + FLAG_CLEAR (BIT_C); + while (lsn>9) { + lsn -= 10; + msn++; + } + if (msn>9) { + msn = msn % 10; + FLAG_SET (BIT_C); + } + + return(resGO); +} + +int +cl_hc08::inst_mul(t_mem code, bool prefix) +{ + int result = regs.A * regs.X; + regs.A = result & 0xff; + regs.X = (result >> 8) & 0xff; + FLAG_CLEAR (BIT_C); + FLAG_CLEAR (BIT_H); + return(resGO); +} + +int +cl_hc08::inst_div(t_mem code, bool prefix) +{ + unsigned int dividend = (regs.H << 8) | regs.A; + unsigned int quotient; + + if (regs.X) { + quotient = dividend / (unsigned int)regs.X; + if (quotient<=0xff) { + regs.A = quotient; + regs.H = dividend % regs.X; + FLAG_CLEAR (BIT_C); + FLAG_ASSIGN (BIT_Z, quotient==0); + } + else + FLAG_SET (BIT_C); // overflow + } else + FLAG_SET (BIT_C); // division by zero + + return(resGO); +} + + +int +cl_hc08::inst_condbranch(t_mem code, bool prefix) +{ + bool taken; + signed char ofs; + unsigned char maskedP; + + if ((code & 0xf0)==0x20) { + switch ((code>>1) & 7) { + case 0: // BRA + taken = 1; + break; + case 1: // BHI + taken = !(regs.P & (BIT_C | BIT_Z)); + break; + case 2: // BCC + taken = !(regs.P & BIT_C); + break; + case 3: // BNE + taken = !(regs.P & BIT_Z); + break; + case 4: // BHCC + taken = !(regs.P & BIT_H); + break; + case 5: // BPL + taken = !(regs.P & BIT_N); + break; + case 6: // BMC + taken = !(regs.P & BIT_I); + break; + case 7: // BIL + taken = 0; // TODO: should read simulated IRQ# pin + default: + return(resHALT); + } + } + else if ((code & 0xf0)==0x90) { + switch ((code>>1) & 7) { + case 0: // BGE + maskedP = regs.P & (BIT_N | BIT_V); + taken = !maskedP || (maskedP == (BIT_N | BIT_V)); + break; + case 1: // BGT + maskedP = regs.P & (BIT_N | BIT_V | BIT_Z); + taken = !maskedP || (maskedP == (BIT_N | BIT_V)); + break; + default: + return(resHALT); + } + } + else + return(resHALT); + + if (code & 1) + taken = ! taken; + + ofs = fetch(); + if (taken) + PC += ofs; + + return(resGO); +} + +int +cl_hc08::inst_bitsetclear(t_mem code, bool prefix) +{ + uchar bit = (code >> 1) & 7; + int ea = fetchea(code, prefix); + uchar operand = get1(ea); + + if (code & 1) + operand &= ~(1 << bit); + else + operand |= (1 << bit); + store1(ea, operand); + return(resGO); +} + +int +cl_hc08::inst_bittestsetclear(t_mem code, bool prefix) +{ + uchar bit = (code >> 1) & 7; + int ea = fetchea(code, prefix); + uchar operand = get1(ea); + signed char ofs; + bool taken; + + if (code & 1) + taken = operand & (1 << bit); + else + taken = !(operand & (1 << bit)); + + ofs = fetch(); + if (taken) + PC += ofs; + + FLAG_ASSIGN (BIT_C, operand & (1 << bit)); + return(resGO); +} + +int +cl_hc08::inst_cbeq(t_mem code, bool prefix) +{ + int ea; + uchar operand1, operand2; + signed char ofs; + + if ((code & 0xf0) == 0x40) { + operand1 = regs.A; + operand2 = fetch(); + } + else if ((code & 0xf0) == 0x50) { + operand1 = regs.X; + operand2 = fetch(); + } + else { + ea = fetchea(code,prefix); + operand1 = get1(ea); + operand2 = regs.A; + } + + ofs = fetch(); + if (operand1==operand2) + PC += ofs; + + if (code==0x71) + incx(); + + return(resGO); +} + +int +cl_hc08::inst_rti(t_mem code, bool prefix) +{ + pop1(regs.P); + regs.P |= 0x60; + pop1(regs.A); + pop1(regs.X); + pop2(PC); + + return(resGO); +} + +int +cl_hc08::inst_rts(t_mem code, bool prefix) +{ + pop2(PC); + + return(resGO); +} + + +int +cl_hc08::inst_mov(t_mem code, bool prefix) +{ + int ea; + uchar operand; + bool aix; + int hx = (regs.H << 8) | (regs.X); + + switch (code) { + case 0x4e: //mov opr8a,opr8a + operand = get1(fetch()); + ea = fetch(); + aix = 0; + break; + case 0x5e: //mov opr8a,x+ + operand = get1(fetch()); + ea = hx; + aix = 1; + break; + case 0x6e: //mov #opr8i,opr8a + operand = fetch(); + ea = fetch(); + aix = 0; + break; + case 0x7e: //mov x+,opr8a + operand = get1(hx); + ea = fetch(); + aix = 1; + break; + default: + return(resHALT); + } + + store1(ea, operand); + if (aix) + incx(); + + FLAG_NZ(operand); + FLAG_CLEAR(BIT_V); + + return(resGO); +} + + +int +cl_hc08::inst_sthx(t_mem code, bool prefix) +{ + int ea = fetch1(); + + store1(ea, regs.H); + store1((ea+1) & 0xffff, regs.X); + + FLAG_CLEAR(BIT_V); + FLAG_ASSIGN(BIT_N, regs.H & 0x80); + FLAG_ASSIGN(BIT_Z, !regs.X && !regs.H); + return(resGO); +} + +int +cl_hc08::inst_ldhx(t_mem code, bool prefix) +{ + int ea; + + if (code == 0x45) { + regs.H = fetch(); + regs.X = fetch(); + } + else if (code == 0x55) { + ea = fetch(); + regs.H = get1(ea); + regs.X = get1(ea+1); + } + else + return(resHALT); + + FLAG_CLEAR(BIT_V); + FLAG_ASSIGN(BIT_N, regs.H & 0x80); + FLAG_ASSIGN(BIT_Z, !regs.X && !regs.H); + return(resGO); +} + + +int +cl_hc08::inst_cphx(t_mem code, bool prefix) +{ + int ea; + int hx; + int operand; + int result; + + if (code == 0x65) { + operand = fetch2(); + } + else if (code == 0x75) { + ea = fetch(); + operand = (get1(ea) << 8) | get1(ea+1); + } + else + return(resHALT); + + hx = (regs.H << 8) | regs.X; + result = hx-operand; + + FLAG_ASSIGN (BIT_V, 0x8000 & (hx ^ operand ^ result ^ (result>>1))); + FLAG_ASSIGN (BIT_C, 0x10000 & result); + FLAG_ASSIGN(BIT_N, result & 0x8000); + FLAG_ASSIGN(BIT_Z, !(result & 0xffff)); + + return(resGO); +} + +int +cl_hc08::inst_swi(t_mem code, bool prefix) +{ + push2(PC); + push1(regs.X); + push1(regs.A); + push1(regs.P); + FLAG_CLEAR(BIT_I); + + PC = get2(0xfffc); + + return(resGO); +} + + +/* End of hc08.src/inst.cc */ diff --git a/sim/ucsim/hc08.src/instcl.h b/sim/ucsim/hc08.src/instcl.h new file mode 100644 index 0000000..22b9bd5 --- /dev/null +++ b/sim/ucsim/hc08.src/instcl.h @@ -0,0 +1,61 @@ +/* hc08.src/instcl.h */ + + virtual void incx(void); + virtual int fetchea(t_mem code, bool prefix); + virtual int inst_nop(t_mem code, bool prefix); + virtual int inst_transfer(t_mem code, bool prefix); + virtual int inst_setclearflags(t_mem code, bool prefix); + virtual int inst_rsp(t_mem code, bool prefix); + virtual int inst_nsa(t_mem code, bool prefix); + virtual int inst_lda(t_mem code, bool prefix); + virtual int inst_ldx(t_mem code, bool prefix); + virtual int inst_sta(t_mem code, bool prefix); + virtual int inst_stx(t_mem code, bool prefix); + virtual int inst_add(t_mem code, bool prefix); + virtual int inst_adc(t_mem code, bool prefix); + virtual int inst_sub(t_mem code, bool prefix); + virtual int inst_sbc(t_mem code, bool prefix); + virtual int inst_cmp(t_mem code, bool prefix); + virtual int inst_cpx(t_mem code, bool prefix); + virtual int inst_jmp(t_mem code, bool prefix); + virtual int inst_jsr(t_mem code, bool prefix); + virtual int inst_ais(t_mem code, bool prefix); + virtual int inst_aix(t_mem code, bool prefix); + virtual int inst_and(t_mem code, bool prefix); + virtual int inst_bit(t_mem code, bool prefix); + virtual int inst_ora(t_mem code, bool prefix); + virtual int inst_eor(t_mem code, bool prefix); + virtual int inst_asr(t_mem code, bool prefix); + virtual int inst_lsr(t_mem code, bool prefix); + virtual int inst_lsl(t_mem code, bool prefix); + virtual int inst_rol(t_mem code, bool prefix); + virtual int inst_ror(t_mem code, bool prefix); + virtual int inst_inc(t_mem code, bool prefix); + virtual int inst_dec(t_mem code, bool prefix); + virtual int inst_dbnz(t_mem code, bool prefix); + virtual int inst_tst(t_mem code, bool prefix); + virtual int inst_clr(t_mem code, bool prefix); + virtual int inst_clrh(t_mem code, bool prefix); + virtual int inst_com(t_mem code, bool prefix); + virtual int inst_neg(t_mem code, bool prefix); + virtual int inst_pushpull(t_mem code, bool prefix); + virtual int inst_stop(t_mem code, bool prefix); + virtual int inst_wait(t_mem code, bool prefix); + virtual int inst_daa(t_mem code, bool prefix); + virtual int inst_mul(t_mem code, bool prefix); + virtual int inst_div(t_mem code, bool prefix); + virtual int inst_condbranch(t_mem code, bool prefix); + virtual int inst_bitsetclear(t_mem code, bool prefix); + virtual int inst_bittestsetclear(t_mem code, bool prefix); + virtual int inst_cbeq(t_mem code, bool prefix); + virtual int inst_rti(t_mem code, bool prefix); + virtual int inst_rts(t_mem code, bool prefix); + virtual int inst_mov(t_mem code, bool prefix); + virtual int inst_sthx(t_mem code, bool prefix); + virtual int inst_ldhx(t_mem code, bool prefix); + virtual int inst_cphx(t_mem code, bool prefix); + virtual int inst_swi(t_mem code, bool prefix); + virtual int inst_bsr(t_mem code, bool prefix); + + +/* End of hc08.src/instcl.h */ diff --git a/sim/ucsim/hc08.src/regshc08.h b/sim/ucsim/hc08.src/regshc08.h new file mode 100644 index 0000000..dd6b087 --- /dev/null +++ b/sim/ucsim/hc08.src/regshc08.h @@ -0,0 +1,80 @@ +/* + * Simulator of microcontrollers (regsz80.h) + * + * some z80 code base from Karl Bongers karl@turbobit.com + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef REGHC08_HEADER +#define REGHC08_HEADER + +#include "ddconfig.h" + + +struct t_regpair +{ +#ifdef WORDS_BIGENDIAN + TYPE_UBYTE h; + TYPE_UBYTE l; +#else + TYPE_UBYTE l; + TYPE_UBYTE h; +#endif +}; + +#define DEF_REGPAIR(BIGNAME,smallname) \ + union { \ + TYPE_UWORD BIGNAME; \ + struct t_regpair smallname; \ + } + +struct t_regs +{ + TYPE_UBYTE A; + TYPE_UBYTE P; + TYPE_UBYTE H; + TYPE_UBYTE X; + TYPE_UWORD SP; + TYPE_UBYTE VECTOR; +}; + +#define BIT_C 0x01 // carry status(out of bit 7) +#define BIT_Z 0x02 // zero status, 1=zero, 0=nonzero +#define BIT_N 0x04 // sign, 1=negative, 0=positive (or zero) +#define BIT_I 0x08 // interrupt mask, 1=disabled, 0=enabled +#define BIT_H 0x10 // half carry status(out of bit 3) +#define BIT_V 0x80 // signed overflow, 1=overflow +#define BIT_ALL (BIT_C |BIT_Z |BIT_N |BIT_I |BIT_H |BIT_V) // all bits + +#define BITPOS_C 0 // 1 +#define BITPOS_Z 1 // 2H +#define BITPOS_N 2 // 4H +#define BITPOS_I 3 // 8H +#define BITPOS_H 4 // 10H +#define BITPOS_V 7 // 80H + +#endif + +/* End of hc08.src/regshc08.h */ diff --git a/sim/ucsim/hc08.src/shc08.cc b/sim/ucsim/hc08.src/shc08.cc new file mode 100644 index 0000000..ffcd951 --- /dev/null +++ b/sim/ucsim/hc08.src/shc08.cc @@ -0,0 +1,54 @@ +/* + * Simulator of microcontrollers (shc08.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +// prj +#include "globals.h" + +// sim.src +#include "appcl.h" + +// local +#include "simhc08cl.h" + + +int +main(int argc, char *argv[]) +{ + class cl_sim *sim; + + application= new cl_app(); + application->init(argc, argv); + sim= new cl_simhc08(application); + sim->init(); + application->set_simulator(sim); + application->run(); + delete application; + return(0); +} + + +/* End of hc08.src/shc08.cc */ diff --git a/sim/ucsim/hc08.src/simhc08.cc b/sim/ucsim/hc08.src/simhc08.cc new file mode 100644 index 0000000..57de2bd --- /dev/null +++ b/sim/ucsim/hc08.src/simhc08.cc @@ -0,0 +1,45 @@ +/* + * Simulator of microcontrollers (simhc08.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + + +// local +#include "simhc08cl.h" +#include "hc08cl.h" + + +cl_simhc08::cl_simhc08(class cl_app *the_app): + cl_sim(the_app) +{} + +class cl_uc * +cl_simhc08::mk_controller(void) +{ + return(new cl_hc08(this)); +} + + +/* End of hc08.src/simhc08.cc */ diff --git a/sim/ucsim/hc08.src/simhc08cl.h b/sim/ucsim/hc08.src/simhc08cl.h new file mode 100644 index 0000000..19f83f8 --- /dev/null +++ b/sim/ucsim/hc08.src/simhc08cl.h @@ -0,0 +1,45 @@ +/* + * Simulator of microcontrollers (simhc08cl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef SIMHC08CL_HEADER +#define SIMHC08CL_HEADER + +#include "simcl.h" + + +class cl_simhc08: public cl_sim +{ +public: + cl_simhc08(class cl_app *the_app); + + virtual class cl_uc *mk_controller(void); +}; + + +#endif + +/* End of hc08.src/simhc08cl.h */ diff --git a/sim/ucsim/i_string.h b/sim/ucsim/i_string.h new file mode 100644 index 0000000..d0f9664 --- /dev/null +++ b/sim/ucsim/i_string.h @@ -0,0 +1,49 @@ +/* + * Simulator of microcontrollers (i_string.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef I_STRING_HEADER +#define I_STRING_HEADER + +#include "ddconfig.h" + +#if STDC_HEADERS +# include +#else +# ifndef HAVE_STRCHR +# define strchr index +# define strrchr rindex +# endif +char *strchr (), *strrchr (); +# ifndef HAVE_MEMCPY +# define memcpy(d, s, n) bcopy ((s), (d), (n)) +# define memmove(d, s, n) bcopy ((s), (d), (n)) +# endif +#endif + +#endif + +/* End of i_string.h */ diff --git a/sim/ucsim/install-sh b/sim/ucsim/install-sh new file mode 100755 index 0000000..89fc9b0 --- /dev/null +++ b/sim/ucsim/install-sh @@ -0,0 +1,238 @@ +#! /bin/sh +# +# install - install a program, script, or datafile +# This comes from X11R5. +# +# Calling this script install-sh is preferred over install.sh, to prevent +# `make' implicit rules from creating a file called install from it +# when there is no Makefile. +# +# This script is compatible with the BSD install script, but was written +# from scratch. +# + + +# set DOITPROG to echo to test this script + +# Don't use :- since 4.3BSD and earlier shells don't like it. +doit="${DOITPROG-}" + + +# put in absolute paths if you don't have them in your path; or use env. vars. + +mvprog="${MVPROG-mv}" +cpprog="${CPPROG-cp}" +chmodprog="${CHMODPROG-chmod}" +chownprog="${CHOWNPROG-chown}" +chgrpprog="${CHGRPPROG-chgrp}" +stripprog="${STRIPPROG-strip}" +rmprog="${RMPROG-rm}" +mkdirprog="${MKDIRPROG-mkdir}" + +tranformbasename="" +transform_arg="" +instcmd="$mvprog" +chmodcmd="$chmodprog 0755" +chowncmd="" +chgrpcmd="" +stripcmd="" +rmcmd="$rmprog -f" +mvcmd="$mvprog" +src="" +dst="" +dir_arg="" + +while [ x"$1" != x ]; do + case $1 in + -c) instcmd="$cpprog" + shift + continue;; + + -d) dir_arg=true + shift + continue;; + + -m) chmodcmd="$chmodprog $2" + shift + shift + continue;; + + -o) chowncmd="$chownprog $2" + shift + shift + continue;; + + -g) chgrpcmd="$chgrpprog $2" + shift + shift + continue;; + + -s) stripcmd="$stripprog" + shift + continue;; + + -t=*) transformarg=`echo $1 | sed 's/-t=//'` + shift + continue;; + + -b=*) transformbasename=`echo $1 | sed 's/-b=//'` + shift + continue;; + + *) if [ x"$src" = x ] + then + src=$1 + else + # this colon is to work around a 386BSD /bin/sh bug + : + dst=$1 + fi + shift + continue;; + esac +done + +if [ x"$src" = x ] +then + echo "install: no input file specified" + exit 1 +else + true +fi + +if [ x"$dir_arg" != x ]; then + dst=$src + src="" + + if [ -d $dst ]; then + instcmd=: + else + instcmd=mkdir + fi +else + +# Waiting for this to be detected by the "$instcmd $src $dsttmp" command +# might cause directories to be created, which would be especially bad +# if $src (and thus $dsttmp) contains '*'. + + if [ -f $src -o -d $src ] + then + true + else + echo "install: $src does not exist" + exit 1 + fi + + if [ x"$dst" = x ] + then + echo "install: no destination specified" + exit 1 + else + true + fi + +# If destination is a directory, append the input filename; if your system +# does not like double slashes in filenames, you may need to add some logic + + if [ -d $dst ] + then + dst="$dst"/`basename $src` + else + true + fi +fi + +## this sed command emulates the dirname command +dstdir=`echo $dst | sed -e 's,[^/]*$,,;s,/$,,;s,^$,.,'` + +# Make sure that the destination directory exists. +# this part is taken from Noah Friedman's mkinstalldirs script + +# Skip lots of stat calls in the usual case. +if [ ! -d "$dstdir" ]; then +defaultIFS=' +' +IFS="${IFS-${defaultIFS}}" + +oIFS="${IFS}" +# Some sh's can't handle IFS=/ for some reason. +IFS='%' +set - `echo ${dstdir} | sed -e 's@/@%@g' -e 's@^%@/@'` +IFS="${oIFS}" + +pathcomp='' + +while [ $# -ne 0 ] ; do + pathcomp="${pathcomp}${1}" + shift + + if [ ! -d "${pathcomp}" ] ; + then + $mkdirprog "${pathcomp}" + else + true + fi + + pathcomp="${pathcomp}/" +done +fi + +if [ x"$dir_arg" != x ] +then + $doit $instcmd $dst && + + if [ x"$chowncmd" != x ]; then $doit $chowncmd $dst; else true ; fi && + if [ x"$chgrpcmd" != x ]; then $doit $chgrpcmd $dst; else true ; fi && + if [ x"$stripcmd" != x ]; then $doit $stripcmd $dst; else true ; fi && + if [ x"$chmodcmd" != x ]; then $doit $chmodcmd $dst; else true ; fi +else + +# If we're going to rename the final executable, determine the name now. + + if [ x"$transformarg" = x ] + then + dstfile=`basename $dst` + else + dstfile=`basename $dst $transformbasename | + sed $transformarg`$transformbasename + fi + +# don't allow the sed command to completely eliminate the filename + + if [ x"$dstfile" = x ] + then + dstfile=`basename $dst` + else + true + fi + +# Make a temp file name in the proper directory. + + dsttmp=$dstdir/#inst.$$# + +# Move or copy the file name to the temp name + + $doit $instcmd $src $dsttmp && + + trap "rm -f ${dsttmp}" 0 && + +# and set any options; do chmod last to preserve setuid bits + +# If any of these fail, we abort the whole thing. If we want to +# ignore errors from any of these, just make sure not to ignore +# errors from the above "$doit $instcmd $src $dsttmp" command. + + if [ x"$chowncmd" != x ]; then $doit $chowncmd $dsttmp; else true;fi && + if [ x"$chgrpcmd" != x ]; then $doit $chgrpcmd $dsttmp; else true;fi && + if [ x"$stripcmd" != x ]; then $doit $stripcmd $dsttmp; else true;fi && + if [ x"$chmodcmd" != x ]; then $doit $chmodcmd $dsttmp; else true;fi && + +# Now rename the file to the real destination. + + $doit $rmcmd -f $dstdir/$dstfile && + $doit $mvcmd $dsttmp $dstdir/$dstfile + +fi && + + +exit 0 diff --git a/sim/ucsim/libltdl/COPYING.LIB b/sim/ucsim/libltdl/COPYING.LIB new file mode 100644 index 0000000..cf9b6b9 --- /dev/null +++ b/sim/ucsim/libltdl/COPYING.LIB @@ -0,0 +1,510 @@ + + GNU LESSER GENERAL PUBLIC LICENSE + Version 2.1, February 1999 + + Copyright (C) 1991, 1999 Free Software Foundation, Inc. + 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + +[This is the first released version of the Lesser GPL. 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ltdl.c +libltdlc_la_LIBADD = $(LIBADD_DL) + +## Because we do not have automatic dependency tracking: +ltdl.lo: ltdl.h config.h + +$(OBJECTS) $(libltdl_la_OBJECTS) $(libltdlc_la_OBJECTS): libtool +libtool: $(LIBTOOL_DEPS) + $(SHELL) ./config.status --recheck + +## This allows us to install libltdl without using ln and without creating +## a world writeable directory. +## FIXME: Remove this rule once automake can do this properly by itself. +local-install-files: $(DISTFILES) + -rm -rf $(DESTDIR)$(datadir)/libtool/libltdl + $(mkinstalldirs) $(DESTDIR)$(datadir)/libtool/libltdl + @for file in $(DISTFILES); do \ + d=$(srcdir); \ + if test -d $$d/$$file; then \ + cp -r $$d/$$file $(DESTDIR)$(datadir)/libtool/libltdl/$$file; \ + else \ + test -f $(DESTDIR)$(datadir)/libtool/libltdl/$$file \ + || cp $$d/$$file $(DESTDIR)$(datadir)/libtool/libltdl/$$file || :; \ + fi; \ + done diff --git a/sim/ucsim/libltdl/Makefile.in b/sim/ucsim/libltdl/Makefile.in new file mode 100644 index 0000000..99011b3 --- /dev/null +++ b/sim/ucsim/libltdl/Makefile.in @@ -0,0 +1,463 @@ +# Makefile.in generated automatically by automake 1.5 from Makefile.am. + +# Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 +# Free Software Foundation, Inc. +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + +SHELL = @SHELL@ + +srcdir = @srcdir@ +top_srcdir = @top_srcdir@ +VPATH = @srcdir@ +prefix = @prefix@ +exec_prefix = @exec_prefix@ + +bindir = @bindir@ +sbindir = @sbindir@ +libexecdir = @libexecdir@ +datadir = @datadir@ +sysconfdir = @sysconfdir@ +sharedstatedir = @sharedstatedir@ +localstatedir = @localstatedir@ +libdir = @libdir@ +infodir = @infodir@ +mandir = @mandir@ +includedir = @includedir@ +oldincludedir = /usr/include +pkgdatadir = $(datadir)/@PACKAGE@ +pkglibdir = $(libdir)/@PACKAGE@ +pkgincludedir = $(includedir)/@PACKAGE@ +top_builddir = . + +ACLOCAL = @ACLOCAL@ +AUTOCONF = @AUTOCONF@ +AUTOMAKE = @AUTOMAKE@ +AUTOHEADER = @AUTOHEADER@ + +INSTALL = @INSTALL@ +INSTALL_PROGRAM = @INSTALL_PROGRAM@ +INSTALL_DATA = @INSTALL_DATA@ +INSTALL_SCRIPT = @INSTALL_SCRIPT@ +INSTALL_HEADER = $(INSTALL_DATA) +transform = @program_transform_name@ +NORMAL_INSTALL = : +PRE_INSTALL = : +POST_INSTALL = : +NORMAL_UNINSTALL = : +PRE_UNINSTALL = : +POST_UNINSTALL = : +host_alias = @host_alias@ +host_triplet = @host@ +AMTAR = @AMTAR@ +AS = @AS@ +AWK = @AWK@ +CC = @CC@ +DEPDIR = @DEPDIR@ +DLLTOOL = @DLLTOOL@ +ECHO = @ECHO@ +EXEEXT = @EXEEXT@ +INCLTDL = @INCLTDL@ +INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@ +LIBADD_DL = @LIBADD_DL@ +LIBLTDL = @LIBLTDL@ +LIBTOOL = @LIBTOOL@ +LIBTOOL_DEPS = @LIBTOOL_DEPS@ +LN_S = @LN_S@ +MAINT = @MAINT@ +OBJDUMP = @OBJDUMP@ +OBJEXT = @OBJEXT@ +PACKAGE = @PACKAGE@ +RANLIB = @RANLIB@ +STRIP = @STRIP@ +VERSION = @VERSION@ +am__include = @am__include@ +am__quote = @am__quote@ +install_sh = @install_sh@ + +AUTOMAKE_OPTIONS = no-dependencies foreign + +@INSTALL_LTDL_TRUE@include_HEADERS = ltdl.h +@INSTALL_LTDL_TRUE@lib_LTLIBRARIES = libltdl.la +@INSTALL_LTDL_FALSE@noinst_HEADERS = ltdl.h + +@CONVENIENCE_LTDL_TRUE@noinst_LTLIBRARIES = libltdlc.la + +CLEANFILES = libltdl.la libltdlc.la + +libltdl_la_SOURCES = ltdl.c +libltdl_la_LDFLAGS = -no-undefined -version-info 4:0:1 +libltdl_la_LIBADD = $(LIBADD_DL) + +libltdlc_la_SOURCES = ltdl.c +libltdlc_la_LIBADD = $(LIBADD_DL) +subdir = . +ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 +mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs +CONFIG_HEADER = config.h +CONFIG_CLEAN_FILES = +LTLIBRARIES = $(lib_LTLIBRARIES) $(noinst_LTLIBRARIES) + +libltdl_la_DEPENDENCIES = +am_libltdl_la_OBJECTS = ltdl.lo +libltdl_la_OBJECTS = $(am_libltdl_la_OBJECTS) +libltdlc_la_LDFLAGS = +libltdlc_la_DEPENDENCIES = +am_libltdlc_la_OBJECTS = ltdl.lo +libltdlc_la_OBJECTS = $(am_libltdlc_la_OBJECTS) + +DEFS = @DEFS@ +DEFAULT_INCLUDES = -I. -I$(srcdir) -I. +CPPFLAGS = @CPPFLAGS@ +LDFLAGS = @LDFLAGS@ +LIBS = @LIBS@ +depcomp = +COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \ + $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) +LTCOMPILE = $(LIBTOOL) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) \ + $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) +CCLD = $(CC) +LINK = $(LIBTOOL) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ + $(AM_LDFLAGS) $(LDFLAGS) -o $@ +CFLAGS = @CFLAGS@ +DIST_SOURCES = $(libltdl_la_SOURCES) $(libltdlc_la_SOURCES) +HEADERS = $(include_HEADERS) $(noinst_HEADERS) + +DIST_COMMON = README $(include_HEADERS) $(noinst_HEADERS) \ + ../config.guess ../config.sub ../install-sh ../ltmain.sh \ + ../missing ../mkinstalldirs ./stamp-h.in COPYING.LIB \ + Makefile.am Makefile.in acinclude.m4 aclocal.m4 config-h.in \ + configure configure.in +SOURCES = $(libltdl_la_SOURCES) $(libltdlc_la_SOURCES) + +all: config.h + $(MAKE) $(AM_MAKEFLAGS) all-am + +.SUFFIXES: +.SUFFIXES: .c .lo .o .obj + +mostlyclean-libtool: + -rm -f *.lo + +clean-libtool: + -rm -rf .libs _libs + +distclean-libtool: + -rm -f libtool +$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ Makefile.am $(top_srcdir)/configure.in $(ACLOCAL_M4) + cd $(top_srcdir) && \ + $(AUTOMAKE) --foreign Makefile +Makefile: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.in $(top_builddir)/config.status + cd $(top_builddir) && \ + CONFIG_HEADERS= CONFIG_LINKS= \ + CONFIG_FILES=$@ $(SHELL) ./config.status + +$(top_builddir)/config.status: $(srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) + $(SHELL) ./config.status --recheck +$(srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(srcdir)/configure.in $(ACLOCAL_M4) $(CONFIGURE_DEPENDENCIES) + cd $(srcdir) && $(AUTOCONF) + +$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ configure.in acinclude.m4 + cd $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS) +config.h: stamp-h + @if test ! -f $@; then \ + rm -f stamp-h; \ + $(MAKE) stamp-h; \ + else :; fi +stamp-h: $(srcdir)/config-h.in $(top_builddir)/config.status + @rm -f stamp-h stamp-hT + @echo timestamp > stamp-hT 2> /dev/null + cd $(top_builddir) \ + && CONFIG_FILES= CONFIG_HEADERS=config.h:config-h.in \ + $(SHELL) ./config.status + @mv stamp-hT stamp-h +$(srcdir)/config-h.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/./stamp-h.in + @if test ! -f $@; then \ + rm -f $(srcdir)/./stamp-h.in; \ + $(MAKE) $(srcdir)/./stamp-h.in; \ + else :; fi +$(srcdir)/./stamp-h.in: $(top_srcdir)/configure.in $(ACLOCAL_M4) + @rm -f $(srcdir)/./stamp-h.in $(srcdir)/./stamp-h.inT + @echo timestamp > $(srcdir)/./stamp-h.inT 2> /dev/null + cd $(top_srcdir) && $(AUTOHEADER) + @mv $(srcdir)/./stamp-h.inT $(srcdir)/./stamp-h.in + +distclean-hdr: + -rm -f config.h +install-libLTLIBRARIES: $(lib_LTLIBRARIES) + @$(NORMAL_INSTALL) + $(mkinstalldirs) $(DESTDIR)$(libdir) + @list='$(lib_LTLIBRARIES)'; for p in $$list; do \ + if test -f $$p; then \ + echo " $(LIBTOOL) --mode=install $(INSTALL) $(INSTALL_STRIP_FLAG) $$p $(DESTDIR)$(libdir)/$$p"; \ + $(LIBTOOL) --mode=install $(INSTALL) $(INSTALL_STRIP_FLAG) $$p $(DESTDIR)$(libdir)/$$p; \ + else :; fi; \ + done + +uninstall-libLTLIBRARIES: + @$(NORMAL_UNINSTALL) + @list='$(lib_LTLIBRARIES)'; for p in $$list; do \ + echo " $(LIBTOOL) --mode=uninstall rm -f $(DESTDIR)$(libdir)/$$p"; \ + $(LIBTOOL) --mode=uninstall rm -f $(DESTDIR)$(libdir)/$$p; \ + done + +clean-libLTLIBRARIES: + -test -z "$(lib_LTLIBRARIES)" || rm -f $(lib_LTLIBRARIES) + +clean-noinstLTLIBRARIES: + -test -z "$(noinst_LTLIBRARIES)" || rm -f $(noinst_LTLIBRARIES) +libltdl.la: $(libltdl_la_OBJECTS) $(libltdl_la_DEPENDENCIES) + $(LINK) -rpath $(libdir) $(libltdl_la_LDFLAGS) $(libltdl_la_OBJECTS) $(libltdl_la_LIBADD) $(LIBS) +libltdlc.la: $(libltdlc_la_OBJECTS) $(libltdlc_la_DEPENDENCIES) + $(LINK) $(libltdlc_la_LDFLAGS) $(libltdlc_la_OBJECTS) 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Then +# it guarantees that the distribution is self-contained by making another +# tarfile. +distcheck: dist + -chmod -R a+w $(distdir) > /dev/null 2>&1; rm -rf $(distdir) + GZIP=$(GZIP_ENV) gunzip -c $(distdir).tar.gz | $(AMTAR) xf - + chmod -R a-w $(distdir); chmod a+w $(distdir) + mkdir $(distdir)/=build + mkdir $(distdir)/=inst + chmod a-w $(distdir) + dc_install_base=`CDPATH=: && cd $(distdir)/=inst && pwd` \ + && cd $(distdir)/=build \ + && ../configure --srcdir=.. --prefix=$$dc_install_base \ + && $(MAKE) $(AM_MAKEFLAGS) \ + && $(MAKE) $(AM_MAKEFLAGS) dvi \ + && $(MAKE) $(AM_MAKEFLAGS) check \ + && $(MAKE) $(AM_MAKEFLAGS) install \ + && $(MAKE) $(AM_MAKEFLAGS) installcheck \ + && $(MAKE) $(AM_MAKEFLAGS) uninstall \ + && (test `find $$dc_install_base -type f -print | wc -l` -le 1 \ + || (echo "Error: files left after uninstall" 1>&2; \ + exit 1) ) \ + && $(MAKE) $(AM_MAKEFLAGS) dist \ + && $(MAKE) $(AM_MAKEFLAGS) distclean \ + && rm -f $(distdir).tar.gz \ + && (test `find . -type f -print | wc -l` -eq 0 \ + || (echo "Error: files left after distclean" 1>&2; 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do \ + d=$(srcdir); \ + if test -d $$d/$$file; then \ + cp -r $$d/$$file $(DESTDIR)$(datadir)/libtool/libltdl/$$file; \ + else \ + test -f $(DESTDIR)$(datadir)/libtool/libltdl/$$file \ + || cp $$d/$$file $(DESTDIR)$(datadir)/libtool/libltdl/$$file || :; \ + fi; \ + done +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff --git a/sim/ucsim/libltdl/README b/sim/ucsim/libltdl/README new file mode 100644 index 0000000..e57b99f --- /dev/null +++ b/sim/ucsim/libltdl/README @@ -0,0 +1,9 @@ +This is GNU libltdl, a system independent dlopen wrapper for GNU libtool. + +It supports the following dlopen interfaces: +* dlopen (Solaris, Linux and various BSD flavors) +* shl_load (HP-UX) +* LoadLibrary (Win16 and Win32) +* load_add_on (BeOS) +* GNU DLD (emulates dynamic linking for static libraries) +* libtool's dlpreopen diff --git a/sim/ucsim/libltdl/acinclude.m4 b/sim/ucsim/libltdl/acinclude.m4 new file mode 100644 index 0000000..9669127 --- /dev/null +++ b/sim/ucsim/libltdl/acinclude.m4 @@ -0,0 +1,3973 @@ +# libtool.m4 - Configure libtool for the host system. -*-Shell-script-*- +## Copyright 1996, 1997, 1998, 1999, 2000, 2001 +## Free Software Foundation, Inc. +## Originally by Gordon Matzigkeit , 1996 +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, but +## WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +## General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +## +## As a special exception to the GNU General Public License, if you +## distribute this file as part of a program that contains a +## configuration script generated by Autoconf, you may include it under +## the same distribution terms that you use for the rest of that program. + +# serial 46 AC_PROG_LIBTOOL + +AC_DEFUN([AC_PROG_LIBTOOL], +[AC_REQUIRE([AC_LIBTOOL_SETUP])dnl + +# This can be used to rebuild libtool when needed +LIBTOOL_DEPS="$ac_aux_dir/ltmain.sh" + +# Always use our own libtool. +LIBTOOL='$(SHELL) $(top_builddir)/libtool' +AC_SUBST(LIBTOOL)dnl + +# Prevent multiple expansion +define([AC_PROG_LIBTOOL], []) +]) + +AC_DEFUN([AC_LIBTOOL_SETUP], +[AC_PREREQ(2.13)dnl +AC_REQUIRE([AC_ENABLE_SHARED])dnl +AC_REQUIRE([AC_ENABLE_STATIC])dnl +AC_REQUIRE([AC_ENABLE_FAST_INSTALL])dnl +AC_REQUIRE([AC_CANONICAL_HOST])dnl +AC_REQUIRE([AC_CANONICAL_BUILD])dnl +AC_REQUIRE([AC_PROG_CC])dnl +AC_REQUIRE([AC_PROG_LD])dnl +AC_REQUIRE([AC_PROG_LD_RELOAD_FLAG])dnl +AC_REQUIRE([AC_PROG_NM])dnl +AC_REQUIRE([AC_PROG_LN_S])dnl +AC_REQUIRE([AC_DEPLIBS_CHECK_METHOD])dnl +AC_REQUIRE([AC_OBJEXT])dnl +AC_REQUIRE([AC_EXEEXT])dnl +dnl + +_LT_AC_PROG_ECHO_BACKSLASH +# Only perform the check for file, if the check method requires it +case $deplibs_check_method in +file_magic*) + if test "$file_magic_cmd" = '$MAGIC_CMD'; then + AC_PATH_MAGIC + fi + ;; +esac + +AC_CHECK_TOOL(RANLIB, ranlib, :) +AC_CHECK_TOOL(STRIP, strip, :) + +ifdef([AC_PROVIDE_AC_LIBTOOL_DLOPEN], enable_dlopen=yes, enable_dlopen=no) +ifdef([AC_PROVIDE_AC_LIBTOOL_WIN32_DLL], +enable_win32_dll=yes, enable_win32_dll=no) + +AC_ARG_ENABLE(libtool-lock, + [ --disable-libtool-lock avoid locking (might break parallel builds)]) +test "x$enable_libtool_lock" != xno && enable_libtool_lock=yes + +# Some flags need to be propagated to the compiler or linker for good +# libtool support. +case $host in +*-*-irix6*) + # Find out which ABI we are using. + echo '[#]line __oline__ "configure"' > conftest.$ac_ext + if AC_TRY_EVAL(ac_compile); then + case `/usr/bin/file conftest.$ac_objext` in + *32-bit*) + LD="${LD-ld} -32" + ;; + *N32*) + LD="${LD-ld} -n32" + ;; + *64-bit*) + LD="${LD-ld} -64" + ;; + esac + fi + rm -rf conftest* + ;; + +*-*-sco3.2v5*) + # On SCO OpenServer 5, we need -belf to get full-featured binaries. + SAVE_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -belf" + AC_CACHE_CHECK([whether the C compiler needs -belf], lt_cv_cc_needs_belf, + [AC_LANG_SAVE + AC_LANG_C + AC_TRY_LINK([],[],[lt_cv_cc_needs_belf=yes],[lt_cv_cc_needs_belf=no]) + AC_LANG_RESTORE]) + if test x"$lt_cv_cc_needs_belf" != x"yes"; then + # this is probably gcc 2.8.0, egcs 1.0 or newer; no need for -belf + CFLAGS="$SAVE_CFLAGS" + fi + ;; + +ifdef([AC_PROVIDE_AC_LIBTOOL_WIN32_DLL], +[*-*-cygwin* | *-*-mingw* | *-*-pw32*) + AC_CHECK_TOOL(DLLTOOL, dlltool, false) + AC_CHECK_TOOL(AS, as, false) + AC_CHECK_TOOL(OBJDUMP, objdump, false) + + # recent cygwin and mingw systems supply a stub DllMain which the user + # can override, but on older systems we have to supply one + AC_CACHE_CHECK([if libtool should supply DllMain function], lt_cv_need_dllmain, + [AC_TRY_LINK([], + [extern int __attribute__((__stdcall__)) DllMain(void*, int, void*); + DllMain (0, 0, 0);], + [lt_cv_need_dllmain=no],[lt_cv_need_dllmain=yes])]) + + case $host/$CC in + *-*-cygwin*/gcc*-mno-cygwin*|*-*-mingw*) + # old mingw systems require "-dll" to link a DLL, while more recent ones + # require "-mdll" + SAVE_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -mdll" + AC_CACHE_CHECK([how to link DLLs], lt_cv_cc_dll_switch, + [AC_TRY_LINK([], [], [lt_cv_cc_dll_switch=-mdll],[lt_cv_cc_dll_switch=-dll])]) + CFLAGS="$SAVE_CFLAGS" ;; + *-*-cygwin* | *-*-pw32*) + # cygwin systems need to pass --dll to the linker, and not link + # crt.o which will require a WinMain@16 definition. + lt_cv_cc_dll_switch="-Wl,--dll -nostartfiles" ;; + esac + ;; + ]) +esac + +_LT_AC_LTCONFIG_HACK + +]) + +# AC_LIBTOOL_HEADER_ASSERT +# ------------------------ +AC_DEFUN([AC_LIBTOOL_HEADER_ASSERT], +[AC_CACHE_CHECK([whether $CC supports assert without backlinking], + [lt_cv_func_assert_works], + [case $host in + *-*-solaris*) + if test "$GCC" = yes && test "$with_gnu_ld" != yes; then + case `$CC --version 2>/dev/null` in + [[12]].*) lt_cv_func_assert_works=no ;; + *) lt_cv_func_assert_works=yes ;; + esac + fi + ;; + esac]) + +if test "x$lt_cv_func_assert_works" = xyes; then + AC_CHECK_HEADERS(assert.h) +fi +])# AC_LIBTOOL_HEADER_ASSERT + +# _LT_AC_CHECK_DLFCN +# -------------------- +AC_DEFUN([_LT_AC_CHECK_DLFCN], +[AC_CHECK_HEADERS(dlfcn.h) +])# _LT_AC_CHECK_DLFCN + +# AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE +# --------------------------------- +AC_DEFUN([AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE], +[AC_REQUIRE([AC_CANONICAL_HOST]) +AC_REQUIRE([AC_PROG_NM]) +AC_REQUIRE([AC_OBJEXT]) +# Check for command to grab the raw symbol name followed by C symbol from nm. +AC_MSG_CHECKING([command to parse $NM output]) +AC_CACHE_VAL([lt_cv_sys_global_symbol_pipe], [dnl + +# These are sane defaults that work on at least a few old systems. +# [They come from Ultrix. What could be older than Ultrix?!! ;)] + +# Character class describing NM global symbol codes. +symcode='[[BCDEGRST]]' + +# Regexp to match symbols that can be accessed directly from C. +sympat='\([[_A-Za-z]][[_A-Za-z0-9]]*\)' + +# Transform the above into a raw symbol and a C symbol. +symxfrm='\1 \2\3 \3' + +# Transform an extracted symbol line into a proper C declaration +lt_cv_global_symbol_to_cdecl="sed -n -e 's/^. .* \(.*\)$/extern char \1;/p'" + +# Transform an extracted symbol line into symbol name and symbol address +lt_cv_global_symbol_to_c_name_address="sed -n -e 's/^: \([[^ ]]*\) $/ {\\\"\1\\\", (lt_ptr) 0},/p' -e 's/^$symcode \([[^ ]]*\) \([[^ ]]*\)$/ {\"\2\", (lt_ptr) \&\2},/p'" + +# Define system-specific variables. +case $host_os in +aix*) + symcode='[[BCDT]]' + ;; +cygwin* | mingw* | pw32*) + symcode='[[ABCDGISTW]]' + ;; +hpux*) # Its linker distinguishes data from code symbols + lt_cv_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern char \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'" + lt_cv_global_symbol_to_c_name_address="sed -n -e 's/^: \([[^ ]]*\) $/ {\\\"\1\\\", (lt_ptr) 0},/p' -e 's/^$symcode* \([[^ ]]*\) \([[^ ]]*\)$/ {\"\2\", (lt_ptr) \&\2},/p'" + ;; +irix* | nonstopux*) + symcode='[[BCDEGRST]]' + ;; +solaris* | sysv5*) + symcode='[[BDT]]' + ;; +sysv4) + symcode='[[DFNSTU]]' + ;; +esac + +# Handle CRLF in mingw tool chain +opt_cr= +case $host_os in +mingw*) + opt_cr=`echo 'x\{0,1\}' | tr x '\015'` # option cr in regexp + ;; +esac + +# If we're using GNU nm, then use its standard symbol codes. +if $NM -V 2>&1 | egrep '(GNU|with BFD)' > /dev/null; then + symcode='[[ABCDGISTW]]' +fi + +# Try without a prefix undercore, then with it. +for ac_symprfx in "" "_"; do + + # Write the raw and C identifiers. +lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[[ ]]\($symcode$symcode*\)[[ ]][[ ]]*\($ac_symprfx\)$sympat$opt_cr$/$symxfrm/p'" + + # Check to see that the pipe works correctly. + pipe_works=no + rm -f conftest* + cat > conftest.$ac_ext < $nlist) && test -s "$nlist"; then + # Try sorting and uniquifying the output. + if sort "$nlist" | uniq > "$nlist"T; then + mv -f "$nlist"T "$nlist" + else + rm -f "$nlist"T + fi + + # Make sure that we snagged all the symbols we need. + if egrep ' nm_test_var$' "$nlist" >/dev/null; then + if egrep ' nm_test_func$' "$nlist" >/dev/null; then + cat < conftest.$ac_ext +#ifdef __cplusplus +extern "C" { +#endif + +EOF + # Now generate the symbol file. + eval "$lt_cv_global_symbol_to_cdecl"' < "$nlist" >> conftest.$ac_ext' + + cat <> conftest.$ac_ext +#if defined (__STDC__) && __STDC__ +# define lt_ptr void * +#else +# define lt_ptr char * +# define const +#endif + +/* The mapping between symbol names and symbols. */ +const struct { + const char *name; + lt_ptr address; +} +lt_preloaded_symbols[[]] = +{ +EOF + sed "s/^$symcode$symcode* \(.*\) \(.*\)$/ {\"\2\", (lt_ptr) \&\2},/" < "$nlist" >> conftest.$ac_ext + cat <<\EOF >> conftest.$ac_ext + {0, (lt_ptr) 0} +}; + +#ifdef __cplusplus +} +#endif +EOF + # Now try linking the two files. + mv conftest.$ac_objext conftstm.$ac_objext + save_LIBS="$LIBS" + save_CFLAGS="$CFLAGS" + LIBS="conftstm.$ac_objext" + CFLAGS="$CFLAGS$no_builtin_flag" + if AC_TRY_EVAL(ac_link) && test -s conftest; then + pipe_works=yes + fi + LIBS="$save_LIBS" + CFLAGS="$save_CFLAGS" + else + echo "cannot find nm_test_func in $nlist" >&AC_FD_CC + fi + else + echo "cannot find nm_test_var in $nlist" >&AC_FD_CC + fi + else + echo "cannot run $lt_cv_sys_global_symbol_pipe" >&AC_FD_CC + fi + else + echo "$progname: failed program was:" >&AC_FD_CC + cat conftest.$ac_ext >&5 + fi + rm -f conftest* conftst* + + # Do not use the global_symbol_pipe unless it works. + if test "$pipe_works" = yes; then + break + else + lt_cv_sys_global_symbol_pipe= + fi +done +]) +global_symbol_pipe="$lt_cv_sys_global_symbol_pipe" +if test -z "$lt_cv_sys_global_symbol_pipe"; then + global_symbol_to_cdecl= + global_symbol_to_c_name_address= +else + global_symbol_to_cdecl="$lt_cv_global_symbol_to_cdecl" + global_symbol_to_c_name_address="$lt_cv_global_symbol_to_c_name_address" +fi +if test -z "$global_symbol_pipe$global_symbol_to_cdec$global_symbol_to_c_name_address"; +then + AC_MSG_RESULT(failed) +else + AC_MSG_RESULT(ok) +fi +]) # AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE + +# _LT_AC_LIBTOOL_SYS_PATH_SEPARATOR +# --------------------------------- +AC_DEFUN([_LT_AC_LIBTOOL_SYS_PATH_SEPARATOR], +[# Find the correct PATH separator. Usually this is `:', but +# DJGPP uses `;' like DOS. +if test "X${PATH_SEPARATOR+set}" != Xset; then + UNAME=${UNAME-`uname 2>/dev/null`} + case X$UNAME in + *-DOS) lt_cv_sys_path_separator=';' ;; + *) lt_cv_sys_path_separator=':' ;; + esac + PATH_SEPARATOR=$lt_cv_sys_path_separator +fi +])# _LT_AC_LIBTOOL_SYS_PATH_SEPARATOR + +# _LT_AC_PROG_ECHO_BACKSLASH +# -------------------------- +# Add some code to the start of the generated configure script which +# will find an echo command which doesn't interpret backslashes. +AC_DEFUN([_LT_AC_PROG_ECHO_BACKSLASH], +[ifdef([AC_DIVERSION_NOTICE], [AC_DIVERT_PUSH(AC_DIVERSION_NOTICE)], + [AC_DIVERT_PUSH(NOTICE)]) +_LT_AC_LIBTOOL_SYS_PATH_SEPARATOR + +# Check that we are running under the correct shell. +SHELL=${CONFIG_SHELL-/bin/sh} + +case X$ECHO in +X*--fallback-echo) + # Remove one level of quotation (which was required for Make). + ECHO=`echo "$ECHO" | sed 's,\\\\\[$]\\[$]0,'[$]0','` + ;; +esac + +echo=${ECHO-echo} +if test "X[$]1" = X--no-reexec; then + # Discard the --no-reexec flag, and continue. + shift +elif test "X[$]1" = X--fallback-echo; then + # Avoid inline document here, it may be left over + : +elif test "X`($echo '\t') 2>/dev/null`" = 'X\t'; then + # Yippee, $echo works! + : +else + # Restart under the correct shell. + exec $SHELL "[$]0" --no-reexec ${1+"[$]@"} +fi + +if test "X[$]1" = X--fallback-echo; then + # used as fallback echo + shift + cat </dev/null && + echo_test_string="`eval $cmd`" && + (test "X$echo_test_string" = "X$echo_test_string") 2>/dev/null + then + break + fi + done +fi + +if test "X`($echo '\t') 2>/dev/null`" = 'X\t' && + echo_testing_string=`($echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + : +else + # The Solaris, AIX, and Digital Unix default echo programs unquote + # backslashes. This makes it impossible to quote backslashes using + # echo "$something" | sed 's/\\/\\\\/g' + # + # So, first we look for a working echo in the user's PATH. + + IFS="${IFS= }"; save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for dir in $PATH /usr/ucb; do + if (test -f $dir/echo || test -f $dir/echo$ac_exeext) && + test "X`($dir/echo '\t') 2>/dev/null`" = 'X\t' && + echo_testing_string=`($dir/echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + echo="$dir/echo" + break + fi + done + IFS="$save_ifs" + + if test "X$echo" = Xecho; then + # We didn't find a better echo, so look for alternatives. + if test "X`(print -r '\t') 2>/dev/null`" = 'X\t' && + echo_testing_string=`(print -r "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + # This shell has a builtin print -r that does the trick. + echo='print -r' + elif (test -f /bin/ksh || test -f /bin/ksh$ac_exeext) && + test "X$CONFIG_SHELL" != X/bin/ksh; then + # If we have ksh, try running configure again with it. + ORIGINAL_CONFIG_SHELL=${CONFIG_SHELL-/bin/sh} + export ORIGINAL_CONFIG_SHELL + CONFIG_SHELL=/bin/ksh + export CONFIG_SHELL + exec $CONFIG_SHELL "[$]0" --no-reexec ${1+"[$]@"} + else + # Try using printf. + echo='printf %s\n' + if test "X`($echo '\t') 2>/dev/null`" = 'X\t' && + echo_testing_string=`($echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + # Cool, printf works + : + elif echo_testing_string=`($ORIGINAL_CONFIG_SHELL "[$]0" --fallback-echo '\t') 2>/dev/null` && + test "X$echo_testing_string" = 'X\t' && + echo_testing_string=`($ORIGINAL_CONFIG_SHELL "[$]0" --fallback-echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + CONFIG_SHELL=$ORIGINAL_CONFIG_SHELL + export CONFIG_SHELL + SHELL="$CONFIG_SHELL" + export SHELL + echo="$CONFIG_SHELL [$]0 --fallback-echo" + elif echo_testing_string=`($CONFIG_SHELL "[$]0" --fallback-echo '\t') 2>/dev/null` && + test "X$echo_testing_string" = 'X\t' && + echo_testing_string=`($CONFIG_SHELL "[$]0" --fallback-echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + echo="$CONFIG_SHELL [$]0 --fallback-echo" + else + # maybe with a smaller string... + prev=: + + for cmd in 'echo test' 'sed 2q "[$]0"' 'sed 10q "[$]0"' 'sed 20q "[$]0"' 'sed 50q "[$]0"'; do + if (test "X$echo_test_string" = "X`eval $cmd`") 2>/dev/null + then + break + fi + prev="$cmd" + done + + if test "$prev" != 'sed 50q "[$]0"'; then + echo_test_string=`eval $prev` + export echo_test_string + exec ${ORIGINAL_CONFIG_SHELL-${CONFIG_SHELL-/bin/sh}} "[$]0" ${1+"[$]@"} + else + # Oops. We lost completely, so just stick with echo. + echo=echo + fi + fi + fi + fi +fi +fi + +# Copy echo and quote the copy suitably for passing to libtool from +# the Makefile, instead of quoting the original, which is used later. +ECHO=$echo +if test "X$ECHO" = "X$CONFIG_SHELL [$]0 --fallback-echo"; then + ECHO="$CONFIG_SHELL \\\$\[$]0 --fallback-echo" +fi + +AC_SUBST(ECHO) +AC_DIVERT_POP +])# _LT_AC_PROG_ECHO_BACKSLASH + +# _LT_AC_TRY_DLOPEN_SELF (ACTION-IF-TRUE, ACTION-IF-TRUE-W-USCORE, +# ACTION-IF-FALSE, ACTION-IF-CROSS-COMPILING) +# ------------------------------------------------------------------ +AC_DEFUN([_LT_AC_TRY_DLOPEN_SELF], +[if test "$cross_compiling" = yes; then : + [$4] +else + AC_REQUIRE([_LT_AC_CHECK_DLFCN])dnl + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext < +#endif + +#include + +#ifdef RTLD_GLOBAL +# define LT_DLGLOBAL RTLD_GLOBAL +#else +# ifdef DL_GLOBAL +# define LT_DLGLOBAL DL_GLOBAL +# else +# define LT_DLGLOBAL 0 +# endif +#endif + +/* We may have to define LT_DLLAZY_OR_NOW in the command line if we + find out it does not work in some platform. */ +#ifndef LT_DLLAZY_OR_NOW +# ifdef RTLD_LAZY +# define LT_DLLAZY_OR_NOW RTLD_LAZY +# else +# ifdef DL_LAZY +# define LT_DLLAZY_OR_NOW DL_LAZY +# else +# ifdef RTLD_NOW +# define LT_DLLAZY_OR_NOW RTLD_NOW +# else +# ifdef DL_NOW +# define LT_DLLAZY_OR_NOW DL_NOW +# else +# define LT_DLLAZY_OR_NOW 0 +# endif +# endif +# endif +# endif +#endif + +#ifdef __cplusplus +extern "C" void exit (int); +#endif + +void fnord() { int i=42;} +int main () +{ + void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); + int status = $lt_dlunknown; + + if (self) + { + if (dlsym (self,"fnord")) status = $lt_dlno_uscore; + else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; + /* dlclose (self); */ + } + + exit (status); +}] +EOF + if AC_TRY_EVAL(ac_link) && test -s conftest${ac_exeext} 2>/dev/null; then + (./conftest; exit; ) 2>/dev/null + lt_status=$? + case x$lt_status in + x$lt_dlno_uscore) $1 ;; + x$lt_dlneed_uscore) $2 ;; + x$lt_unknown|x*) $3 ;; + esac + else : + # compilation failed + $3 + fi +fi +rm -fr conftest* +])# _LT_AC_TRY_DLOPEN_SELF + +# AC_LIBTOOL_DLOPEN_SELF +# ------------------- +AC_DEFUN([AC_LIBTOOL_DLOPEN_SELF], +[if test "x$enable_dlopen" != xyes; then + enable_dlopen=unknown + enable_dlopen_self=unknown + enable_dlopen_self_static=unknown +else + lt_cv_dlopen=no + lt_cv_dlopen_libs= + + case $host_os in + beos*) + lt_cv_dlopen="load_add_on" + lt_cv_dlopen_libs= + lt_cv_dlopen_self=yes + ;; + + cygwin* | mingw* | pw32*) + lt_cv_dlopen="LoadLibrary" + lt_cv_dlopen_libs= + ;; + + *) + AC_CHECK_FUNC([shl_load], + [lt_cv_dlopen="shl_load"], + [AC_CHECK_LIB([dld], [shl_load], + [lt_cv_dlopen="shl_load" lt_cv_dlopen_libs="-dld"], + [AC_CHECK_FUNC([dlopen], + [lt_cv_dlopen="dlopen"], + [AC_CHECK_LIB([dl], [dlopen], + [lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-ldl"], + [AC_CHECK_LIB([svld], [dlopen], + [lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-lsvld"], + [AC_CHECK_LIB([dld], [dld_link], + [lt_cv_dlopen="dld_link" lt_cv_dlopen_libs="-dld"]) + ]) + ]) + ]) + ]) + ]) + ;; + esac + + if test "x$lt_cv_dlopen" != xno; then + enable_dlopen=yes + else + enable_dlopen=no + fi + + case $lt_cv_dlopen in + dlopen) + save_CPPFLAGS="$CPPFLAGS" + AC_REQUIRE([_LT_AC_CHECK_DLFCN])dnl + test "x$ac_cv_header_dlfcn_h" = xyes && CPPFLAGS="$CPPFLAGS -DHAVE_DLFCN_H" + + save_LDFLAGS="$LDFLAGS" + eval LDFLAGS=\"\$LDFLAGS $export_dynamic_flag_spec\" + + save_LIBS="$LIBS" + LIBS="$lt_cv_dlopen_libs $LIBS" + + AC_CACHE_CHECK([whether a program can dlopen itself], + lt_cv_dlopen_self, [dnl + _LT_AC_TRY_DLOPEN_SELF( + lt_cv_dlopen_self=yes, lt_cv_dlopen_self=yes, + lt_cv_dlopen_self=no, lt_cv_dlopen_self=cross) + ]) + + if test "x$lt_cv_dlopen_self" = xyes; then + LDFLAGS="$LDFLAGS $link_static_flag" + AC_CACHE_CHECK([whether a statically linked program can dlopen itself], + lt_cv_dlopen_self_static, [dnl + _LT_AC_TRY_DLOPEN_SELF( + lt_cv_dlopen_self_static=yes, lt_cv_dlopen_self_static=yes, + lt_cv_dlopen_self_static=no, lt_cv_dlopen_self_static=cross) + ]) + fi + + CPPFLAGS="$save_CPPFLAGS" + LDFLAGS="$save_LDFLAGS" + LIBS="$save_LIBS" + ;; + esac + + case $lt_cv_dlopen_self in + yes|no) enable_dlopen_self=$lt_cv_dlopen_self ;; + *) enable_dlopen_self=unknown ;; + esac + + case $lt_cv_dlopen_self_static in + yes|no) enable_dlopen_self_static=$lt_cv_dlopen_self_static ;; + *) enable_dlopen_self_static=unknown ;; + esac +fi +])# AC_LIBTOOL_DLOPEN_SELF + +AC_DEFUN([_LT_AC_LTCONFIG_HACK], +[AC_REQUIRE([AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE])dnl +# Sed substitution that helps us do robust quoting. It backslashifies +# metacharacters that are still active within double-quoted strings. +Xsed='sed -e s/^X//' +sed_quote_subst='s/\([[\\"\\`$\\\\]]\)/\\\1/g' + +# Same as above, but do not quote variable references. +double_quote_subst='s/\([[\\"\\`\\\\]]\)/\\\1/g' + +# Sed substitution to delay expansion of an escaped shell variable in a +# double_quote_subst'ed string. +delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g' + +# Constants: +rm="rm -f" + +# Global variables: +default_ofile=libtool +can_build_shared=yes + +# All known linkers require a `.a' archive for static linking (except M$VC, +# which needs '.lib'). +libext=a +ltmain="$ac_aux_dir/ltmain.sh" +ofile="$default_ofile" +with_gnu_ld="$lt_cv_prog_gnu_ld" +need_locks="$enable_libtool_lock" + +old_CC="$CC" +old_CFLAGS="$CFLAGS" + +# Set sane defaults for various variables +test -z "$AR" && AR=ar +test -z "$AR_FLAGS" && AR_FLAGS=cru +test -z "$AS" && AS=as +test -z "$CC" && CC=cc +test -z "$DLLTOOL" && DLLTOOL=dlltool +test -z "$LD" && LD=ld +test -z "$LN_S" && LN_S="ln -s" +test -z "$MAGIC_CMD" && MAGIC_CMD=file +test -z "$NM" && NM=nm +test -z "$OBJDUMP" && OBJDUMP=objdump +test -z "$RANLIB" && RANLIB=: +test -z "$STRIP" && STRIP=: +test -z "$ac_objext" && ac_objext=o + +if test x"$host" != x"$build"; then + ac_tool_prefix=${host_alias}- +else + ac_tool_prefix= +fi + +# Transform linux* to *-*-linux-gnu*, to support old configure scripts. +case $host_os in +linux-gnu*) ;; +linux*) host=`echo $host | sed 's/^\(.*-.*-linux\)\(.*\)$/\1-gnu\2/'` +esac + +case $host_os in +aix3*) + # AIX sometimes has problems with the GCC collect2 program. For some + # reason, if we set the COLLECT_NAMES environment variable, the problems + # vanish in a puff of smoke. + if test "X${COLLECT_NAMES+set}" != Xset; then + COLLECT_NAMES= + export COLLECT_NAMES + fi + ;; +esac + +# Determine commands to create old-style static archives. +old_archive_cmds='$AR $AR_FLAGS $oldlib$oldobjs$old_deplibs' +old_postinstall_cmds='chmod 644 $oldlib' +old_postuninstall_cmds= + +if test -n "$RANLIB"; then + case $host_os in + openbsd*) + old_postinstall_cmds="\$RANLIB -t \$oldlib~$old_postinstall_cmds" + ;; + *) + old_postinstall_cmds="\$RANLIB \$oldlib~$old_postinstall_cmds" + ;; + esac + old_archive_cmds="$old_archive_cmds~\$RANLIB \$oldlib" +fi + +# Allow CC to be a program name with arguments. +set dummy $CC +compiler="[$]2" + +## FIXME: this should be a separate macro +## +AC_MSG_CHECKING([for objdir]) +rm -f .libs 2>/dev/null +mkdir .libs 2>/dev/null +if test -d .libs; then + objdir=.libs +else + # MS-DOS does not allow filenames that begin with a dot. + objdir=_libs +fi +rmdir .libs 2>/dev/null +AC_MSG_RESULT($objdir) +## +## END FIXME + + +## FIXME: this should be a separate macro +## +AC_ARG_WITH(pic, +[ --with-pic try to use only PIC/non-PIC objects [default=use both]], +pic_mode="$withval", pic_mode=default) +test -z "$pic_mode" && pic_mode=default + +# We assume here that the value for lt_cv_prog_cc_pic will not be cached +# in isolation, and that seeing it set (from the cache) indicates that +# the associated values are set (in the cache) correctly too. +AC_MSG_CHECKING([for $compiler option to produce PIC]) +AC_CACHE_VAL(lt_cv_prog_cc_pic, +[ lt_cv_prog_cc_pic= + lt_cv_prog_cc_shlib= + lt_cv_prog_cc_wl= + lt_cv_prog_cc_static= + lt_cv_prog_cc_no_builtin= + lt_cv_prog_cc_can_build_shared=$can_build_shared + + if test "$GCC" = yes; then + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static='-static' + + case $host_os in + aix*) + # Below there is a dirty hack to force normal static linking with -ldl + # The problem is because libdl dynamically linked with both libc and + # libC (AIX C++ library), which obviously doesn't included in libraries + # list by gcc. This cause undefined symbols with -static flags. + # This hack allows C programs to be linked with "-static -ldl", but + # not sure about C++ programs. + lt_cv_prog_cc_static="$lt_cv_prog_cc_static ${lt_cv_prog_cc_wl}-lC" + ;; + amigaos*) + # FIXME: we need at least 68020 code to build shared libraries, but + # adding the `-m68020' flag to GCC prevents building anything better, + # like `-m68040'. + lt_cv_prog_cc_pic='-m68020 -resident32 -malways-restore-a4' + ;; + beos* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*) + # PIC is the default for these OSes. + ;; + darwin* | rhapsody*) + # PIC is the default on this platform + # Common symbols not allowed in MH_DYLIB files + lt_cv_prog_cc_pic='-fno-common' + ;; + cygwin* | mingw* | pw32* | os2*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + lt_cv_prog_cc_pic='-DDLL_EXPORT' + ;; + sysv4*MP*) + if test -d /usr/nec; then + lt_cv_prog_cc_pic=-Kconform_pic + fi + ;; + *) + lt_cv_prog_cc_pic='-fPIC' + ;; + esac + else + # PORTME Check for PIC flags for the system compiler. + case $host_os in + aix3* | aix4* | aix5*) + lt_cv_prog_cc_wl='-Wl,' + # All AIX code is PIC. + if test "$host_cpu" = ia64; then + # AIX 5 now supports IA64 processor + lt_cv_prog_cc_static='-Bstatic' + else + lt_cv_prog_cc_static='-bnso -bI:/lib/syscalls.exp' + fi + ;; + + hpux9* | hpux10* | hpux11*) + # Is there a better lt_cv_prog_cc_static that works with the bundled CC? + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static="${lt_cv_prog_cc_wl}-a ${lt_cv_prog_cc_wl}archive" + lt_cv_prog_cc_pic='+Z' + ;; + + irix5* | irix6* | nonstopux*) + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static='-non_shared' + # PIC (with -KPIC) is the default. + ;; + + cygwin* | mingw* | pw32* | os2*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + lt_cv_prog_cc_pic='-DDLL_EXPORT' + ;; + + newsos6) + lt_cv_prog_cc_pic='-KPIC' + lt_cv_prog_cc_static='-Bstatic' + ;; + + osf3* | osf4* | osf5*) + # All OSF/1 code is PIC. + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static='-non_shared' + ;; + + sco3.2v5*) + lt_cv_prog_cc_pic='-Kpic' + lt_cv_prog_cc_static='-dn' + lt_cv_prog_cc_shlib='-belf' + ;; + + solaris*) + lt_cv_prog_cc_pic='-KPIC' + lt_cv_prog_cc_static='-Bstatic' + lt_cv_prog_cc_wl='-Wl,' + ;; + + sunos4*) + lt_cv_prog_cc_pic='-PIC' + lt_cv_prog_cc_static='-Bstatic' + lt_cv_prog_cc_wl='-Qoption ld ' + ;; + + sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + lt_cv_prog_cc_pic='-KPIC' + lt_cv_prog_cc_static='-Bstatic' + if test "x$host_vendor" = xsni; then + lt_cv_prog_cc_wl='-LD' + else + lt_cv_prog_cc_wl='-Wl,' + fi + ;; + + uts4*) + lt_cv_prog_cc_pic='-pic' + lt_cv_prog_cc_static='-Bstatic' + ;; + + sysv4*MP*) + if test -d /usr/nec ;then + lt_cv_prog_cc_pic='-Kconform_pic' + lt_cv_prog_cc_static='-Bstatic' + fi + ;; + + *) + lt_cv_prog_cc_can_build_shared=no + ;; + esac + fi +]) +if test -z "$lt_cv_prog_cc_pic"; then + AC_MSG_RESULT([none]) +else + AC_MSG_RESULT([$lt_cv_prog_cc_pic]) + + # Check to make sure the pic_flag actually works. + AC_MSG_CHECKING([if $compiler PIC flag $lt_cv_prog_cc_pic works]) + AC_CACHE_VAL(lt_cv_prog_cc_pic_works, [dnl + save_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS $lt_cv_prog_cc_pic -DPIC" + AC_TRY_COMPILE([], [], [dnl + case $host_os in + hpux9* | hpux10* | hpux11*) + # On HP-UX, both CC and GCC only warn that PIC is supported... then + # they create non-PIC objects. So, if there were any warnings, we + # assume that PIC is not supported. + if test -s conftest.err; then + lt_cv_prog_cc_pic_works=no + else + lt_cv_prog_cc_pic_works=yes + fi + ;; + *) + lt_cv_prog_cc_pic_works=yes + ;; + esac + ], [dnl + lt_cv_prog_cc_pic_works=no + ]) + CFLAGS="$save_CFLAGS" + ]) + + if test "X$lt_cv_prog_cc_pic_works" = Xno; then + lt_cv_prog_cc_pic= + lt_cv_prog_cc_can_build_shared=no + else + lt_cv_prog_cc_pic=" $lt_cv_prog_cc_pic" + fi + + AC_MSG_RESULT([$lt_cv_prog_cc_pic_works]) +fi +## +## END FIXME + +# Check for any special shared library compilation flags. +if test -n "$lt_cv_prog_cc_shlib"; then + AC_MSG_WARN([\`$CC' requires \`$lt_cv_prog_cc_shlib' to build shared libraries]) + if echo "$old_CC $old_CFLAGS " | egrep -e "[[ ]]$lt_cv_prog_cc_shlib[[ ]]" >/dev/null; then : + else + AC_MSG_WARN([add \`$lt_cv_prog_cc_shlib' to the CC or CFLAGS env variable and reconfigure]) + lt_cv_prog_cc_can_build_shared=no + fi +fi + +## FIXME: this should be a separate macro +## +AC_MSG_CHECKING([if $compiler static flag $lt_cv_prog_cc_static works]) +AC_CACHE_VAL([lt_cv_prog_cc_static_works], [dnl + lt_cv_prog_cc_static_works=no + save_LDFLAGS="$LDFLAGS" + LDFLAGS="$LDFLAGS $lt_cv_prog_cc_static" + AC_TRY_LINK([], [], [lt_cv_prog_cc_static_works=yes]) + LDFLAGS="$save_LDFLAGS" +]) + +# Belt *and* braces to stop my trousers falling down: +test "X$lt_cv_prog_cc_static_works" = Xno && lt_cv_prog_cc_static= +AC_MSG_RESULT([$lt_cv_prog_cc_static_works]) + +pic_flag="$lt_cv_prog_cc_pic" +special_shlib_compile_flags="$lt_cv_prog_cc_shlib" +wl="$lt_cv_prog_cc_wl" +link_static_flag="$lt_cv_prog_cc_static" +no_builtin_flag="$lt_cv_prog_cc_no_builtin" +can_build_shared="$lt_cv_prog_cc_can_build_shared" +## +## END FIXME + + +## FIXME: this should be a separate macro +## +# Check to see if options -o and -c are simultaneously supported by compiler +AC_MSG_CHECKING([if $compiler supports -c -o file.$ac_objext]) +AC_CACHE_VAL([lt_cv_compiler_c_o], [ +$rm -r conftest 2>/dev/null +mkdir conftest +cd conftest +echo "int some_variable = 0;" > conftest.$ac_ext +mkdir out +# According to Tom Tromey, Ian Lance Taylor reported there are C compilers +# that will create temporary files in the current directory regardless of +# the output directory. Thus, making CWD read-only will cause this test +# to fail, enabling locking or at least warning the user not to do parallel +# builds. +chmod -w . +save_CFLAGS="$CFLAGS" +CFLAGS="$CFLAGS -o out/conftest2.$ac_objext" +compiler_c_o=no +if { (eval echo configure:__oline__: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>out/conftest.err; } && test -s out/conftest2.$ac_objext; then + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s out/conftest.err; then + lt_cv_compiler_c_o=no + else + lt_cv_compiler_c_o=yes + fi +else + # Append any errors to the config.log. + cat out/conftest.err 1>&AC_FD_CC + lt_cv_compiler_c_o=no +fi +CFLAGS="$save_CFLAGS" +chmod u+w . +$rm conftest* out/* +rmdir out +cd .. +rmdir conftest +$rm -r conftest 2>/dev/null +]) +compiler_c_o=$lt_cv_compiler_c_o +AC_MSG_RESULT([$compiler_c_o]) + +if test x"$compiler_c_o" = x"yes"; then + # Check to see if we can write to a .lo + AC_MSG_CHECKING([if $compiler supports -c -o file.lo]) + AC_CACHE_VAL([lt_cv_compiler_o_lo], [ + lt_cv_compiler_o_lo=no + save_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -c -o conftest.lo" + save_objext="$ac_objext" + ac_objext=lo + AC_TRY_COMPILE([], [int some_variable = 0;], [dnl + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s conftest.err; then + lt_cv_compiler_o_lo=no + else + lt_cv_compiler_o_lo=yes + fi + ]) + ac_objext="$save_objext" + CFLAGS="$save_CFLAGS" + ]) + compiler_o_lo=$lt_cv_compiler_o_lo + AC_MSG_RESULT([$compiler_o_lo]) +else + compiler_o_lo=no +fi +## +## END FIXME + +## FIXME: this should be a separate macro +## +# Check to see if we can do hard links to lock some files if needed +hard_links="nottested" +if test "$compiler_c_o" = no && test "$need_locks" != no; then + # do not overwrite the value of need_locks provided by the user + AC_MSG_CHECKING([if we can lock with hard links]) + hard_links=yes + $rm conftest* + ln conftest.a conftest.b 2>/dev/null && hard_links=no + touch conftest.a + ln conftest.a conftest.b 2>&5 || hard_links=no + ln conftest.a conftest.b 2>/dev/null && hard_links=no + AC_MSG_RESULT([$hard_links]) + if test "$hard_links" = no; then + AC_MSG_WARN([\`$CC' does not support \`-c -o', so \`make -j' may be unsafe]) + need_locks=warn + fi +else + need_locks=no +fi +## +## END FIXME + +## FIXME: this should be a separate macro +## +if test "$GCC" = yes; then + # Check to see if options -fno-rtti -fno-exceptions are supported by compiler + AC_MSG_CHECKING([if $compiler supports -fno-rtti -fno-exceptions]) + echo "int some_variable = 0;" > conftest.$ac_ext + save_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -fno-rtti -fno-exceptions -c conftest.$ac_ext" + compiler_rtti_exceptions=no + AC_TRY_COMPILE([], [int some_variable = 0;], [dnl + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s conftest.err; then + compiler_rtti_exceptions=no + else + compiler_rtti_exceptions=yes + fi + ]) + CFLAGS="$save_CFLAGS" + AC_MSG_RESULT([$compiler_rtti_exceptions]) + + if test "$compiler_rtti_exceptions" = "yes"; then + no_builtin_flag=' -fno-builtin -fno-rtti -fno-exceptions' + else + no_builtin_flag=' -fno-builtin' + fi +fi +## +## END FIXME + +## FIXME: this should be a separate macro +## +# See if the linker supports building shared libraries. +AC_MSG_CHECKING([whether the linker ($LD) supports shared libraries]) + +allow_undefined_flag= +no_undefined_flag= +need_lib_prefix=unknown +need_version=unknown +# when you set need_version to no, make sure it does not cause -set_version +# flags to be left without arguments +archive_cmds= +archive_expsym_cmds= +old_archive_from_new_cmds= +old_archive_from_expsyms_cmds= +export_dynamic_flag_spec= +whole_archive_flag_spec= +thread_safe_flag_spec= +hardcode_into_libs=no +hardcode_libdir_flag_spec= +hardcode_libdir_separator= +hardcode_direct=no +hardcode_minus_L=no +hardcode_shlibpath_var=unsupported +runpath_var= +link_all_deplibs=unknown +always_export_symbols=no +export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | sed '\''s/.* //'\'' | sort | uniq > $export_symbols' +# include_expsyms should be a list of space-separated symbols to be *always* +# included in the symbol list +include_expsyms= +# exclude_expsyms can be an egrep regular expression of symbols to exclude +# it will be wrapped by ` (' and `)$', so one must not match beginning or +# end of line. Example: `a|bc|.*d.*' will exclude the symbols `a' and `bc', +# as well as any symbol that contains `d'. +exclude_expsyms="_GLOBAL_OFFSET_TABLE_" +# Although _GLOBAL_OFFSET_TABLE_ is a valid symbol C name, most a.out +# platforms (ab)use it in PIC code, but their linkers get confused if +# the symbol is explicitly referenced. Since portable code cannot +# rely on this symbol name, it's probably fine to never include it in +# preloaded symbol tables. +extract_expsyms_cmds= + +case $host_os in +cygwin* | mingw* | pw32*) + # FIXME: the MSVC++ port hasn't been tested in a loooong time + # When not using gcc, we currently assume that we are using + # Microsoft Visual C++. + if test "$GCC" != yes; then + with_gnu_ld=no + fi + ;; +openbsd*) + with_gnu_ld=no + ;; +esac + +ld_shlibs=yes +if test "$with_gnu_ld" = yes; then + # If archive_cmds runs LD, not CC, wlarc should be empty + wlarc='${wl}' + + # See if GNU ld supports shared libraries. + case $host_os in + aix3* | aix4* | aix5*) + # On AIX, the GNU linker is very broken + # Note:Check GNU linker on AIX 5-IA64 when/if it becomes available. + ld_shlibs=no + cat <&2 + +*** Warning: the GNU linker, at least up to release 2.9.1, is reported +*** to be unable to reliably create shared libraries on AIX. +*** Therefore, libtool is disabling shared libraries support. If you +*** really care for shared libraries, you may want to modify your PATH +*** so that a non-GNU linker is found, and then restart. + +EOF + ;; + + amigaos*) + archive_cmds='$rm $output_objdir/a2ixlibrary.data~$echo "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$echo "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$echo "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$echo "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + + # Samuel A. Falvo II reports + # that the semantics of dynamic libraries on AmigaOS, at least up + # to version 4, is to share data among multiple programs linked + # with the same dynamic library. Since this doesn't match the + # behavior of shared libraries on other platforms, we can use + # them. + ld_shlibs=no + ;; + + beos*) + if $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + allow_undefined_flag=unsupported + # Joseph Beckenbach says some releases of gcc + # support --undefined. This deserves some investigation. FIXME + archive_cmds='$CC -nostart $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + else + ld_shlibs=no + fi + ;; + + cygwin* | mingw* | pw32*) + # hardcode_libdir_flag_spec is actually meaningless, as there is + # no search path for DLLs. + hardcode_libdir_flag_spec='-L$libdir' + allow_undefined_flag=unsupported + always_export_symbols=yes + + extract_expsyms_cmds='test -f $output_objdir/impgen.c || \ + sed -e "/^# \/\* impgen\.c starts here \*\//,/^# \/\* impgen.c ends here \*\// { s/^# //;s/^# *$//; p; }" -e d < $''0 > $output_objdir/impgen.c~ + test -f $output_objdir/impgen.exe || (cd $output_objdir && \ + if test "x$HOST_CC" != "x" ; then $HOST_CC -o impgen impgen.c ; \ + else $CC -o impgen impgen.c ; fi)~ + $output_objdir/impgen $dir/$soroot > $output_objdir/$soname-def' + + old_archive_from_expsyms_cmds='$DLLTOOL --as=$AS --dllname $soname --def $output_objdir/$soname-def --output-lib $output_objdir/$newlib' + + # cygwin and mingw dlls have different entry points and sets of symbols + # to exclude. + # FIXME: what about values for MSVC? + dll_entry=__cygwin_dll_entry@12 + dll_exclude_symbols=DllMain@12,_cygwin_dll_entry@12,_cygwin_noncygwin_dll_entry@12~ + case $host_os in + mingw*) + # mingw values + dll_entry=_DllMainCRTStartup@12 + dll_exclude_symbols=DllMain@12,DllMainCRTStartup@12,DllEntryPoint@12~ + ;; + esac + + # mingw and cygwin differ, and it's simplest to just exclude the union + # of the two symbol sets. + dll_exclude_symbols=DllMain@12,_cygwin_dll_entry@12,_cygwin_noncygwin_dll_entry@12,DllMainCRTStartup@12,DllEntryPoint@12 + + # recent cygwin and mingw systems supply a stub DllMain which the user + # can override, but on older systems we have to supply one (in ltdll.c) + if test "x$lt_cv_need_dllmain" = "xyes"; then + ltdll_obj='$output_objdir/$soname-ltdll.'"$ac_objext " + ltdll_cmds='test -f $output_objdir/$soname-ltdll.c || sed -e "/^# \/\* ltdll\.c starts here \*\//,/^# \/\* ltdll.c ends here \*\// { s/^# //; p; }" -e d < $''0 > $output_objdir/$soname-ltdll.c~ + test -f $output_objdir/$soname-ltdll.$ac_objext || (cd $output_objdir && $CC -c $soname-ltdll.c)~' + else + ltdll_obj= + ltdll_cmds= + fi + + # Extract the symbol export list from an `--export-all' def file, + # then regenerate the def file from the symbol export list, so that + # the compiled dll only exports the symbol export list. + # Be careful not to strip the DATA tag left be newer dlltools. + export_symbols_cmds="$ltdll_cmds"' + $DLLTOOL --export-all --exclude-symbols '$dll_exclude_symbols' --output-def $output_objdir/$soname-def '$ltdll_obj'$libobjs $convenience~ + sed -e "1,/EXPORTS/d" -e "s/ @ [[0-9]]*//" -e "s/ *;.*$//" < $output_objdir/$soname-def > $export_symbols' + + # If the export-symbols file already is a .def file (1st line + # is EXPORTS), use it as is. + # If DATA tags from a recent dlltool are present, honour them! + archive_expsym_cmds='if test "x`head -1 $export_symbols`" = xEXPORTS; then + cp $export_symbols $output_objdir/$soname-def; + else + echo EXPORTS > $output_objdir/$soname-def; + _lt_hint=1; + cat $export_symbols | while read symbol; do + set dummy \$symbol; + case \[$]# in + 2) echo " \[$]2 @ \$_lt_hint ; " >> $output_objdir/$soname-def;; + *) echo " \[$]2 @ \$_lt_hint \[$]3 ; " >> $output_objdir/$soname-def;; + esac; + _lt_hint=`expr 1 + \$_lt_hint`; + done; + fi~ + '"$ltdll_cmds"' + $CC -Wl,--base-file,$output_objdir/$soname-base '$lt_cv_cc_dll_switch' -Wl,-e,'$dll_entry' -o $output_objdir/$soname '$ltdll_obj'$libobjs $deplibs $compiler_flags~ + $DLLTOOL --as=$AS --dllname $soname --exclude-symbols '$dll_exclude_symbols' --def $output_objdir/$soname-def --base-file $output_objdir/$soname-base --output-exp $output_objdir/$soname-exp~ + $CC -Wl,--base-file,$output_objdir/$soname-base $output_objdir/$soname-exp '$lt_cv_cc_dll_switch' -Wl,-e,'$dll_entry' -o $output_objdir/$soname '$ltdll_obj'$libobjs $deplibs $compiler_flags~ + $DLLTOOL --as=$AS --dllname $soname --exclude-symbols '$dll_exclude_symbols' --def $output_objdir/$soname-def --base-file $output_objdir/$soname-base --output-exp $output_objdir/$soname-exp --output-lib $output_objdir/$libname.dll.a~ + $CC $output_objdir/$soname-exp '$lt_cv_cc_dll_switch' -Wl,-e,'$dll_entry' -o $output_objdir/$soname '$ltdll_obj'$libobjs $deplibs $compiler_flags' + ;; + + netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + archive_cmds='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib' + wlarc= + else + archive_cmds='$CC -shared -nodefaultlibs $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared -nodefaultlibs $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + fi + ;; + + solaris* | sysv5*) + if $LD -v 2>&1 | egrep 'BFD 2\.8' > /dev/null; then + ld_shlibs=no + cat <&2 + +*** Warning: The releases 2.8.* of the GNU linker cannot reliably +*** create shared libraries on Solaris systems. Therefore, libtool +*** is disabling shared libraries support. We urge you to upgrade GNU +*** binutils to release 2.9.1 or newer. Another option is to modify +*** your PATH or compiler configuration so that the native linker is +*** used, and then restart. + +EOF + elif $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + ld_shlibs=no + fi + ;; + + sunos4*) + archive_cmds='$LD -assert pure-text -Bshareable -o $lib $libobjs $deplibs $linker_flags' + wlarc= + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + *) + if $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + ld_shlibs=no + fi + ;; + esac + + if test "$ld_shlibs" = yes; then + runpath_var=LD_RUN_PATH + hardcode_libdir_flag_spec='${wl}--rpath ${wl}$libdir' + export_dynamic_flag_spec='${wl}--export-dynamic' + case $host_os in + cygwin* | mingw* | pw32*) + # dlltool doesn't understand --whole-archive et. al. + whole_archive_flag_spec= + ;; + *) + # ancient GNU ld didn't support --whole-archive et. al. + if $LD --help 2>&1 | egrep 'no-whole-archive' > /dev/null; then + whole_archive_flag_spec="$wlarc"'--whole-archive$convenience '"$wlarc"'--no-whole-archive' + else + whole_archive_flag_spec= + fi + ;; + esac + fi +else + # PORTME fill in a description of your system's linker (not GNU ld) + case $host_os in + aix3*) + allow_undefined_flag=unsupported + always_export_symbols=yes + archive_expsym_cmds='$LD -o $output_objdir/$soname $libobjs $deplibs $linker_flags -bE:$export_symbols -T512 -H512 -bM:SRE~$AR $AR_FLAGS $lib $output_objdir/$soname' + # Note: this linker hardcodes the directories in LIBPATH if there + # are no directories specified by -L. + hardcode_minus_L=yes + if test "$GCC" = yes && test -z "$link_static_flag"; then + # Neither direct hardcoding nor static linking is supported with a + # broken collect2. + hardcode_direct=unsupported + fi + ;; + + aix4* | aix5*) + if test "$host_cpu" = ia64; then + # On IA64, the linker does run time linking by default, so we don't + # have to do anything special. + aix_use_runtimelinking=no + exp_sym_flag='-Bexport' + no_entry_flag="" + else + aix_use_runtimelinking=no + + # Test if we are trying to use run time linking or normal + # AIX style linking. If -brtl is somewhere in LDFLAGS, we + # need to do runtime linking. + case $host_os in aix4.[[23]]|aix4.[[23]].*|aix5*) + for ld_flag in $LDFLAGS; do + if (test $ld_flag = "-brtl" || test $ld_flag = "-Wl,-brtl"); then + aix_use_runtimelinking=yes + break + fi + done + esac + + exp_sym_flag='-bexport' + no_entry_flag='-bnoentry' + fi + + # When large executables or shared objects are built, AIX ld can + # have problems creating the table of contents. If linking a library + # or program results in "error TOC overflow" add -mminimal-toc to + # CXXFLAGS/CFLAGS for g++/gcc. In the cases where that is not + # enough to fix the problem, add -Wl,-bbigtoc to LDFLAGS. + + hardcode_direct=yes + archive_cmds='' + hardcode_libdir_separator=':' + if test "$GCC" = yes; then + case $host_os in aix4.[[012]]|aix4.[[012]].*) + collect2name=`${CC} -print-prog-name=collect2` + if test -f "$collect2name" && \ + strings "$collect2name" | grep resolve_lib_name >/dev/null + then + # We have reworked collect2 + hardcode_direct=yes + else + # We have old collect2 + hardcode_direct=unsupported + # It fails to find uninstalled libraries when the uninstalled + # path is not listed in the libpath. Setting hardcode_minus_L + # to unsupported forces relinking + hardcode_minus_L=yes + hardcode_libdir_flag_spec='-L$libdir' + hardcode_libdir_separator= + fi + esac + + shared_flag='-shared' + else + # not using gcc + if test "$host_cpu" = ia64; then + shared_flag='${wl}-G' + else + if test "$aix_use_runtimelinking" = yes; then + shared_flag='${wl}-G' + else + shared_flag='${wl}-bM:SRE' + fi + fi + fi + + # It seems that -bexpall can do strange things, so it is better to + # generate a list of symbols to export. + always_export_symbols=yes + if test "$aix_use_runtimelinking" = yes; then + # Warning - without using the other runtime loading flags (-brtl), + # -berok will link without error, but may produce a broken library. + allow_undefined_flag='-berok' + hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:/usr/lib:/lib' + archive_expsym_cmds="\$CC"' -o $output_objdir/$soname $libobjs $deplibs $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then echo "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols $shared_flag" + else + if test "$host_cpu" = ia64; then + hardcode_libdir_flag_spec='${wl}-R $libdir:/usr/lib:/lib' + allow_undefined_flag="-z nodefs" + archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname ${wl}-h$soname $libobjs $deplibs $compiler_flags ${wl}${allow_undefined_flag} '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols" + else + hardcode_libdir_flag_spec='${wl}-bnolibpath ${wl}-blibpath:$libdir:/usr/lib:/lib' + # Warning - without using the other run time loading flags, + # -berok will link without error, but may produce a broken library. + allow_undefined_flag='${wl}-berok' + # This is a bit strange, but is similar to how AIX traditionally builds + # it's shared libraries. + archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs $compiler_flags ${allow_undefined_flag} '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols"' ~$AR -crlo $objdir/$libname$release.a $objdir/$soname' + fi + fi + ;; + + amigaos*) + archive_cmds='$rm $output_objdir/a2ixlibrary.data~$echo "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$echo "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$echo "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$echo "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + # see comment about different semantics on the GNU ld section + ld_shlibs=no + ;; + + cygwin* | mingw* | pw32*) + # When not using gcc, we currently assume that we are using + # Microsoft Visual C++. + # hardcode_libdir_flag_spec is actually meaningless, as there is + # no search path for DLLs. + hardcode_libdir_flag_spec=' ' + allow_undefined_flag=unsupported + # Tell ltmain to make .lib files, not .a files. + libext=lib + # FIXME: Setting linknames here is a bad hack. + archive_cmds='$CC -o $lib $libobjs $compiler_flags `echo "$deplibs" | sed -e '\''s/ -lc$//'\''` -link -dll~linknames=' + # The linker will automatically build a .lib file if we build a DLL. + old_archive_from_new_cmds='true' + # FIXME: Should let the user specify the lib program. + old_archive_cmds='lib /OUT:$oldlib$oldobjs$old_deplibs' + fix_srcfile_path='`cygpath -w "$srcfile"`' + ;; + + darwin* | rhapsody*) + case "$host_os" in + rhapsody* | darwin1.[[012]]) + allow_undefined_flag='-undefined suppress' + ;; + *) # Darwin 1.3 on + allow_undefined_flag='-flat_namespace -undefined suppress' + ;; + esac + # FIXME: Relying on posixy $() will cause problems for + # cross-compilation, but unfortunately the echo tests do not + # yet detect zsh echo's removal of \ escapes. Also zsh mangles + # `"' quotes if we put them in here... so don't! + archive_cmds='$nonopt $(test .$module = .yes && echo -bundle || echo -dynamiclib) $allow_undefined_flag -o $lib $libobjs $deplibs$linker_flags -install_name $rpath/$soname $verstring' + # We need to add '_' to the symbols in $export_symbols first + #archive_expsym_cmds="$archive_cmds"' && strip -s $export_symbols' + hardcode_direct=yes + hardcode_shlibpath_var=no + whole_archive_flag_spec='-all_load $convenience' + ;; + + freebsd1*) + ld_shlibs=no + ;; + + # FreeBSD 2.2.[012] allows us to include c++rt0.o to get C++ constructor + # support. Future versions do this automatically, but an explicit c++rt0.o + # does not break anything, and helps significantly (at the cost of a little + # extra space). + freebsd2.2*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags /usr/lib/c++rt0.o' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + # Unfortunately, older versions of FreeBSD 2 do not have this feature. + freebsd2*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_minus_L=yes + hardcode_shlibpath_var=no + ;; + + # FreeBSD 3 and greater uses gcc -shared to do shared libraries. + freebsd*) + archive_cmds='$CC -shared -o $lib $libobjs $deplibs $compiler_flags' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + hpux9* | hpux10* | hpux11*) + case $host_os in + hpux9*) archive_cmds='$rm $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib' ;; + *) archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags' ;; + esac + hardcode_libdir_flag_spec='${wl}+b ${wl}$libdir' + hardcode_libdir_separator=: + hardcode_direct=yes + hardcode_minus_L=yes # Not in the search PATH, but as the default + # location of the library. + export_dynamic_flag_spec='${wl}-E' + ;; + + irix5* | irix6* | nonstopux*) + if test "$GCC" = yes; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + else + archive_cmds='$LD -shared $libobjs $deplibs $linker_flags -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib' + fi + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + link_all_deplibs=yes + ;; + + netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' # a.out + else + archive_cmds='$LD -shared -o $lib $libobjs $deplibs $linker_flags' # ELF + fi + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + newsos6) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + hardcode_shlibpath_var=no + ;; + + openbsd*) + hardcode_direct=yes + hardcode_shlibpath_var=no + if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='${wl}-rpath,$libdir' + export_dynamic_flag_spec='${wl}-E' + else + case "$host_os" in + openbsd[[01]].* | openbsd2.[[0-7]] | openbsd2.[[0-7]].*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-R$libdir' + ;; + *) + archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='${wl}-rpath,$libdir' + ;; + esac + fi + ;; + + os2*) + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + allow_undefined_flag=unsupported + archive_cmds='$echo "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$echo "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~$echo DATA >> $output_objdir/$libname.def~$echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~$echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def' + old_archive_from_new_cmds='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def' + ;; + + osf3*) + if test "$GCC" = yes; then + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + else + allow_undefined_flag=' -expect_unresolved \*' + archive_cmds='$LD -shared${allow_undefined_flag} $libobjs $deplibs $linker_flags -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib' + fi + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + ;; + + osf4* | osf5*) # as osf3* with the addition of -msym flag + if test "$GCC" = yes; then + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + else + allow_undefined_flag=' -expect_unresolved \*' + archive_cmds='$LD -shared${allow_undefined_flag} $libobjs $deplibs $linker_flags -msym -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib' + archive_expsym_cmds='for i in `cat $export_symbols`; do printf "-exported_symbol " >> $lib.exp; echo "\$i" >> $lib.exp; done; echo "-hidden">> $lib.exp~ + $LD -shared${allow_undefined_flag} -input $lib.exp $linker_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${objdir}/so_locations -o $lib~$rm $lib.exp' + + #Both c and cxx compiler support -rpath directly + hardcode_libdir_flag_spec='-rpath $libdir' + fi + hardcode_libdir_separator=: + ;; + + sco3.2v5*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + runpath_var=LD_RUN_PATH + hardcode_runpath_var=yes + export_dynamic_flag_spec='${wl}-Bexport' + ;; + + solaris*) + # gcc --version < 3.0 without binutils cannot create self contained + # shared libraries reliably, requiring libgcc.a to resolve some of + # the object symbols generated in some cases. Libraries that use + # assert need libgcc.a to resolve __eprintf, for example. Linking + # a copy of libgcc.a into every shared library to guarantee resolving + # such symbols causes other problems: According to Tim Van Holder + # , C++ libraries end up with a separate + # (to the application) exception stack for one thing. + no_undefined_flag=' -z defs' + if test "$GCC" = yes; then + case `$CC --version 2>/dev/null` in + [[12]].*) + cat <&2 + +*** Warning: Releases of GCC earlier than version 3.0 cannot reliably +*** create self contained shared libraries on Solaris systems, without +*** introducing a dependency on libgcc.a. Therefore, libtool is disabling +*** -no-undefined support, which will at least allow you to build shared +*** libraries. However, you may find that when you link such libraries +*** into an application without using GCC, you have to manually add +*** \`gcc --print-libgcc-file-name\` to the link command. We urge you to +*** upgrade to a newer version of GCC. Another option is to rebuild your +*** current GCC to use the GNU linker from GNU binutils 2.9.1 or newer. + +EOF + no_undefined_flag= + ;; + esac + fi + # $CC -shared without GNU ld will not create a library from C++ + # object files and a static libstdc++, better avoid it by now + archive_cmds='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags' + archive_expsym_cmds='$echo "{ global:" > $lib.exp~cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~ + $LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$rm $lib.exp' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_shlibpath_var=no + case $host_os in + solaris2.[[0-5]] | solaris2.[[0-5]].*) ;; + *) # Supported since Solaris 2.6 (maybe 2.5.1?) + whole_archive_flag_spec='-z allextract$convenience -z defaultextract' ;; + esac + link_all_deplibs=yes + ;; + + sunos4*) + if test "x$host_vendor" = xsequent; then + # Use $CC to link under sequent, because it throws in some extra .o + # files that make .init and .fini sections work. + archive_cmds='$CC -G ${wl}-h $soname -o $lib $libobjs $deplibs $compiler_flags' + else + archive_cmds='$LD -assert pure-text -Bstatic -o $lib $libobjs $deplibs $linker_flags' + fi + hardcode_libdir_flag_spec='-L$libdir' + hardcode_direct=yes + hardcode_minus_L=yes + hardcode_shlibpath_var=no + ;; + + sysv4) + if test "x$host_vendor" = xsno; then + archive_cmds='$LD -G -Bsymbolic -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes # is this really true??? + else + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=no #Motorola manual says yes, but my tests say they lie + fi + runpath_var='LD_RUN_PATH' + hardcode_shlibpath_var=no + ;; + + sysv4.3*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + export_dynamic_flag_spec='-Bexport' + ;; + + sysv5*) + no_undefined_flag=' -z text' + # $CC -shared without GNU ld will not create a library from C++ + # object files and a static libstdc++, better avoid it by now + archive_cmds='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags' + archive_expsym_cmds='$echo "{ global:" > $lib.exp~cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~ + $LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$rm $lib.exp' + hardcode_libdir_flag_spec= + hardcode_shlibpath_var=no + runpath_var='LD_RUN_PATH' + ;; + + uts4*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_shlibpath_var=no + ;; + + dgux*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_shlibpath_var=no + ;; + + sysv4*MP*) + if test -d /usr/nec; then + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + runpath_var=LD_RUN_PATH + hardcode_runpath_var=yes + ld_shlibs=yes + fi + ;; + + sysv4.2uw2*) + archive_cmds='$LD -G -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_minus_L=no + hardcode_shlibpath_var=no + hardcode_runpath_var=yes + runpath_var=LD_RUN_PATH + ;; + + sysv5uw7* | unixware7*) + no_undefined_flag='${wl}-z ${wl}text' + if test "$GCC" = yes; then + archive_cmds='$CC -shared ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' + else + archive_cmds='$CC -G ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' + fi + runpath_var='LD_RUN_PATH' + hardcode_shlibpath_var=no + ;; + + *) + ld_shlibs=no + ;; + esac +fi +AC_MSG_RESULT([$ld_shlibs]) +test "$ld_shlibs" = no && can_build_shared=no +## +## END FIXME + +## FIXME: this should be a separate macro +## +# Check hardcoding attributes. +AC_MSG_CHECKING([how to hardcode library paths into programs]) +hardcode_action= +if test -n "$hardcode_libdir_flag_spec" || \ + test -n "$runpath_var"; then + + # We can hardcode non-existant directories. + if test "$hardcode_direct" != no && + # If the only mechanism to avoid hardcoding is shlibpath_var, we + # have to relink, otherwise we might link with an installed library + # when we should be linking with a yet-to-be-installed one + ## test "$hardcode_shlibpath_var" != no && + test "$hardcode_minus_L" != no; then + # Linking always hardcodes the temporary library directory. + hardcode_action=relink + else + # We can link without hardcoding, and we can hardcode nonexisting dirs. + hardcode_action=immediate + fi +else + # We cannot hardcode anything, or else we can only hardcode existing + # directories. + hardcode_action=unsupported +fi +AC_MSG_RESULT([$hardcode_action]) +## +## END FIXME + +## FIXME: this should be a separate macro +## +striplib= +old_striplib= +AC_MSG_CHECKING([whether stripping libraries is possible]) +if test -n "$STRIP" && $STRIP -V 2>&1 | grep "GNU strip" >/dev/null; then + test -z "$old_striplib" && old_striplib="$STRIP --strip-debug" + test -z "$striplib" && striplib="$STRIP --strip-unneeded" + AC_MSG_RESULT([yes]) +else + AC_MSG_RESULT([no]) +fi +## +## END FIXME + +reload_cmds='$LD$reload_flag -o $output$reload_objs' +test -z "$deplibs_check_method" && deplibs_check_method=unknown + +## FIXME: this should be a separate macro +## +# PORTME Fill in your ld.so characteristics +AC_MSG_CHECKING([dynamic linker characteristics]) +library_names_spec= +libname_spec='lib$name' +soname_spec= +postinstall_cmds= +postuninstall_cmds= +finish_cmds= +finish_eval= +shlibpath_var= +shlibpath_overrides_runpath=unknown +version_type=none +dynamic_linker="$host_os ld.so" +sys_lib_dlsearch_path_spec="/lib /usr/lib" +sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib" + +case $host_os in +aix3*) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix $libname.a' + shlibpath_var=LIBPATH + + # AIX has no versioning support, so we append a major version to the name. + soname_spec='${libname}${release}.so$major' + ;; + +aix4* | aix5*) + version_type=linux + if test "$host_cpu" = ia64; then + # AIX 5 supports IA64 + library_names_spec='${libname}${release}.so$major ${libname}${release}.so$versuffix $libname.so' + shlibpath_var=LD_LIBRARY_PATH + else + # With GCC up to 2.95.x, collect2 would create an import file + # for dependence libraries. The import file would start with + # the line `#! .'. This would cause the generated library to + # depend on `.', always an invalid library. This was fixed in + # development snapshots of GCC prior to 3.0. + case $host_os in + aix4 | aix4.[[01]] | aix4.[[01]].*) + if { echo '#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 97)' + echo ' yes ' + echo '#endif'; } | ${CC} -E - | grep yes > /dev/null; then + : + else + can_build_shared=no + fi + ;; + esac + # AIX (on Power*) has no versioning support, so currently we can + # not hardcode correct soname into executable. Probably we can + # add versioning support to collect2, so additional links can + # be useful in future. + if test "$aix_use_runtimelinking" = yes; then + # If using run time linking (on AIX 4.2 or later) use lib.so + # instead of lib.a to let people know that these are not + # typical AIX shared libraries. + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + else + # We preserve .a as extension for shared libraries through AIX4.2 + # and later when we are not doing run time linking. + library_names_spec='${libname}${release}.a $libname.a' + soname_spec='${libname}${release}.so$major' + fi + shlibpath_var=LIBPATH + fi + ;; + +amigaos*) + library_names_spec='$libname.ixlibrary $libname.a' + # Create ${libname}_ixlibrary.a entries in /sys/libs. + finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`$echo "X$lib" | $Xsed -e '\''s%^.*/\([[^/]]*\)\.ixlibrary$%\1%'\''`; test $rm /sys/libs/${libname}_ixlibrary.a; $show "(cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a)"; (cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a) || exit 1; done' + ;; + +beos*) + library_names_spec='${libname}.so' + dynamic_linker="$host_os ld.so" + shlibpath_var=LIBRARY_PATH + ;; + +bsdi4*) + version_type=linux + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + finish_cmds='PATH="\$PATH:/sbin" ldconfig $libdir' + shlibpath_var=LD_LIBRARY_PATH + sys_lib_search_path_spec="/shlib /usr/lib /usr/X11/lib /usr/contrib/lib /lib /usr/local/lib" + sys_lib_dlsearch_path_spec="/shlib /usr/lib /usr/local/lib" + export_dynamic_flag_spec=-rdynamic + # the default ld.so.conf also contains /usr/contrib/lib and + # /usr/X11R6/lib (/usr/X11 is a link to /usr/X11R6), but let us allow + # libtool to hard-code these into programs + ;; + +cygwin* | mingw* | pw32*) + version_type=windows + need_version=no + need_lib_prefix=no + case $GCC,$host_os in + yes,cygwin*) + library_names_spec='$libname.dll.a' + soname_spec='`echo ${libname} | sed -e 's/^lib/cyg/'``echo ${release} | sed -e 's/[[.]]/-/g'`${versuffix}.dll' + postinstall_cmds='dlpath=`bash 2>&1 -c '\''. $dir/${file}i;echo \$dlname'\''`~ + dldir=$destdir/`dirname \$dlpath`~ + test -d \$dldir || mkdir -p \$dldir~ + $install_prog .libs/$dlname \$dldir/$dlname' + postuninstall_cmds='dldll=`bash 2>&1 -c '\''. $file; echo \$dlname'\''`~ + dlpath=$dir/\$dldll~ + $rm \$dlpath' + ;; + yes,mingw*) + library_names_spec='${libname}`echo ${release} | sed -e 's/[[.]]/-/g'`${versuffix}.dll' + sys_lib_search_path_spec=`$CC -print-search-dirs | grep "^libraries:" | sed -e "s/^libraries://" -e "s/;/ /g"` + ;; + yes,pw32*) + library_names_spec='`echo ${libname} | sed -e 's/^lib/pw/'``echo ${release} | sed -e 's/[.]/-/g'`${versuffix}.dll' + ;; + *) + library_names_spec='${libname}`echo ${release} | sed -e 's/[[.]]/-/g'`${versuffix}.dll $libname.lib' + ;; + esac + dynamic_linker='Win32 ld.exe' + # FIXME: first we should search . and the directory the executable is in + shlibpath_var=PATH + ;; + +darwin* | rhapsody*) + dynamic_linker="$host_os dyld" + version_type=darwin + need_lib_prefix=no + need_version=no + # FIXME: Relying on posixy $() will cause problems for + # cross-compilation, but unfortunately the echo tests do not + # yet detect zsh echo's removal of \ escapes. + library_names_spec='${libname}${release}${versuffix}.$(test .$module = .yes && echo so || echo dylib) ${libname}${release}${major}.$(test .$module = .yes && echo so || echo dylib) ${libname}.$(test .$module = .yes && echo so || echo dylib)' + soname_spec='${libname}${release}${major}.$(test .$module = .yes && echo so || echo dylib)' + shlibpath_overrides_runpath=yes + shlibpath_var=DYLD_LIBRARY_PATH + ;; + +freebsd1*) + dynamic_linker=no + ;; + +freebsd*) + objformat=`test -x /usr/bin/objformat && /usr/bin/objformat || echo aout` + version_type=freebsd-$objformat + case $version_type in + freebsd-elf*) + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so $libname.so' + need_version=no + need_lib_prefix=no + ;; + freebsd-*) + library_names_spec='${libname}${release}.so$versuffix $libname.so$versuffix' + need_version=yes + ;; + esac + shlibpath_var=LD_LIBRARY_PATH + case $host_os in + freebsd2*) + shlibpath_overrides_runpath=yes + ;; + *) + shlibpath_overrides_runpath=no + hardcode_into_libs=yes + ;; + esac + ;; + +gnu*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so${major} ${libname}.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + hardcode_into_libs=yes + ;; + +hpux9* | hpux10* | hpux11*) + # Give a soname corresponding to the major version so that dld.sl refuses to + # link against other versions. + dynamic_linker="$host_os dld.sl" + version_type=sunos + need_lib_prefix=no + need_version=no + shlibpath_var=SHLIB_PATH + shlibpath_overrides_runpath=no # +s is required to enable SHLIB_PATH + library_names_spec='${libname}${release}.sl$versuffix ${libname}${release}.sl$major $libname.sl' + soname_spec='${libname}${release}.sl$major' + # HP-UX runs *really* slowly unless shared libraries are mode 555. + postinstall_cmds='chmod 555 $lib' + ;; + +irix5* | irix6* | nonstopux*) + case $host_os in + nonstopux*) version_type=nonstopux ;; + *) version_type=irix ;; + esac + need_lib_prefix=no + need_version=no + soname_spec='${libname}${release}.so$major' + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major ${libname}${release}.so $libname.so' + case $host_os in + irix5* | nonstopux*) + libsuff= shlibsuff= + ;; + *) + case $LD in # libtool.m4 will add one of these switches to LD + *-32|*"-32 ") libsuff= shlibsuff= libmagic=32-bit;; + *-n32|*"-n32 ") libsuff=32 shlibsuff=N32 libmagic=N32;; + *-64|*"-64 ") libsuff=64 shlibsuff=64 libmagic=64-bit;; + *) libsuff= shlibsuff= libmagic=never-match;; + esac + ;; + esac + shlibpath_var=LD_LIBRARY${shlibsuff}_PATH + shlibpath_overrides_runpath=no + sys_lib_search_path_spec="/usr/lib${libsuff} /lib${libsuff} /usr/local/lib${libsuff}" + sys_lib_dlsearch_path_spec="/usr/lib${libsuff} /lib${libsuff}" + ;; + +# No shared lib support for Linux oldld, aout, or coff. +linux-gnuoldld* | linux-gnuaout* | linux-gnucoff*) + dynamic_linker=no + ;; + +# This must be Linux ELF. +linux-gnu*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=no + # This implies no fast_install, which is unacceptable. + # Some rework will be needed to allow for fast_install + # before this can be enabled. + hardcode_into_libs=yes + + # We used to test for /lib/ld.so.1 and disable shared libraries on + # powerpc, because MkLinux only supported shared libraries with the + # GNU dynamic linker. Since this was broken with cross compilers, + # most powerpc-linux boxes support dynamic linking these days and + # people can always --disable-shared, the test was removed, and we + # assume the GNU/Linux dynamic linker is in use. + dynamic_linker='GNU/Linux ld.so' + ;; + +netbsd*) + version_type=sunos + need_lib_prefix=no + need_version=no + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + library_names_spec='${libname}${release}.so$versuffix ${libname}.so$versuffix' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' + dynamic_linker='NetBSD (a.out) ld.so' + else + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major ${libname}${release}.so ${libname}.so' + soname_spec='${libname}${release}.so$major' + dynamic_linker='NetBSD ld.elf_so' + fi + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + ;; + +newsos6) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + ;; + +openbsd*) + version_type=sunos + need_lib_prefix=no + need_version=no + if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + case "$host_os" in + openbsd2.[[89]] | openbsd2.[[89]].*) + shlibpath_overrides_runpath=no + ;; + *) + shlibpath_overrides_runpath=yes + ;; + esac + else + shlibpath_overrides_runpath=yes + fi + library_names_spec='${libname}${release}.so$versuffix ${libname}.so$versuffix' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' + shlibpath_var=LD_LIBRARY_PATH + ;; + +os2*) + libname_spec='$name' + need_lib_prefix=no + library_names_spec='$libname.dll $libname.a' + dynamic_linker='OS/2 ld.exe' + shlibpath_var=LIBPATH + ;; + +osf3* | osf4* | osf5*) + version_type=osf + need_version=no + soname_spec='${libname}${release}.so' + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so $libname.so' + shlibpath_var=LD_LIBRARY_PATH + sys_lib_search_path_spec="/usr/shlib /usr/ccs/lib /usr/lib/cmplrs/cc /usr/lib /usr/local/lib /var/shlib" + sys_lib_dlsearch_path_spec="$sys_lib_search_path_spec" + ;; + +sco3.2v5*) + version_type=osf + soname_spec='${libname}${release}.so$major' + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + shlibpath_var=LD_LIBRARY_PATH + ;; + +solaris*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + # ldd complains unless libraries are executable + postinstall_cmds='chmod +x $lib' + ;; + +sunos4*) + version_type=sunos + library_names_spec='${libname}${release}.so$versuffix ${libname}.so$versuffix' + finish_cmds='PATH="\$PATH:/usr/etc" ldconfig $libdir' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + if test "$with_gnu_ld" = yes; then + need_lib_prefix=no + fi + need_version=yes + ;; + +sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + case $host_vendor in + sni) + shlibpath_overrides_runpath=no + ;; + motorola) + need_lib_prefix=no + need_version=no + shlibpath_overrides_runpath=no + sys_lib_search_path_spec='/lib /usr/lib /usr/ccs/lib' + ;; + esac + ;; + +uts4*) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + ;; + +dgux*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + ;; + +sysv4*MP*) + if test -d /usr/nec ;then + version_type=linux + library_names_spec='$libname.so.$versuffix $libname.so.$major $libname.so' + soname_spec='$libname.so.$major' + shlibpath_var=LD_LIBRARY_PATH + fi + ;; + +*) + dynamic_linker=no + ;; +esac +AC_MSG_RESULT([$dynamic_linker]) +test "$dynamic_linker" = no && can_build_shared=no +## +## END FIXME + +## FIXME: this should be a separate macro +## +# Report the final consequences. +AC_MSG_CHECKING([if libtool supports shared libraries]) +AC_MSG_RESULT([$can_build_shared]) +## +## END FIXME + +## FIXME: this should be a separate macro +## +AC_MSG_CHECKING([whether to build shared libraries]) +test "$can_build_shared" = "no" && enable_shared=no + +# On AIX, shared libraries and static libraries use the same namespace, and +# are all built from PIC. +case "$host_os" in +aix3*) + test "$enable_shared" = yes && enable_static=no + if test -n "$RANLIB"; then + archive_cmds="$archive_cmds~\$RANLIB \$lib" + postinstall_cmds='$RANLIB $lib' + fi + ;; + +aix4*) + if test "$host_cpu" != ia64 && test "$aix_use_runtimelinking" = no ; then + test "$enable_shared" = yes && enable_static=no + fi + ;; +esac +AC_MSG_RESULT([$enable_shared]) +## +## END FIXME + +## FIXME: this should be a separate macro +## +AC_MSG_CHECKING([whether to build static libraries]) +# Make sure either enable_shared or enable_static is yes. +test "$enable_shared" = yes || enable_static=yes +AC_MSG_RESULT([$enable_static]) +## +## END FIXME + +if test "$hardcode_action" = relink; then + # Fast installation is not supported + enable_fast_install=no +elif test "$shlibpath_overrides_runpath" = yes || + test "$enable_shared" = no; then + # Fast installation is not necessary + enable_fast_install=needless +fi + +variables_saved_for_relink="PATH $shlibpath_var $runpath_var" +if test "$GCC" = yes; then + variables_saved_for_relink="$variables_saved_for_relink GCC_EXEC_PREFIX COMPILER_PATH LIBRARY_PATH" +fi + +AC_LIBTOOL_DLOPEN_SELF + +## FIXME: this should be a separate macro +## +if test "$enable_shared" = yes && test "$GCC" = yes; then + case $archive_cmds in + *'~'*) + # FIXME: we may have to deal with multi-command sequences. + ;; + '$CC '*) + # Test whether the compiler implicitly links with -lc since on some + # systems, -lgcc has to come before -lc. If gcc already passes -lc + # to ld, don't add -lc before -lgcc. + AC_MSG_CHECKING([whether -lc should be explicitly linked in]) + AC_CACHE_VAL([lt_cv_archive_cmds_need_lc], + [$rm conftest* + echo 'static int dummy;' > conftest.$ac_ext + + if AC_TRY_EVAL(ac_compile); then + soname=conftest + lib=conftest + libobjs=conftest.$ac_objext + deplibs= + wl=$lt_cv_prog_cc_wl + compiler_flags=-v + linker_flags=-v + verstring= + output_objdir=. + libname=conftest + save_allow_undefined_flag=$allow_undefined_flag + allow_undefined_flag= + if AC_TRY_EVAL(archive_cmds 2\>\&1 \| grep \" -lc \" \>/dev/null 2\>\&1) + then + lt_cv_archive_cmds_need_lc=no + else + lt_cv_archive_cmds_need_lc=yes + fi + allow_undefined_flag=$save_allow_undefined_flag + else + cat conftest.err 1>&5 + fi]) + AC_MSG_RESULT([$lt_cv_archive_cmds_need_lc]) + ;; + esac +fi +need_lc=${lt_cv_archive_cmds_need_lc-yes} +## +## END FIXME + +## FIXME: this should be a separate macro +## +# The second clause should only fire when bootstrapping the +# libtool distribution, otherwise you forgot to ship ltmain.sh +# with your package, and you will get complaints that there are +# no rules to generate ltmain.sh. +if test -f "$ltmain"; then + : +else + # If there is no Makefile yet, we rely on a make rule to execute + # `config.status --recheck' to rerun these tests and create the + # libtool script then. + test -f Makefile && make "$ltmain" +fi + +if test -f "$ltmain"; then + trap "$rm \"${ofile}T\"; exit 1" 1 2 15 + $rm -f "${ofile}T" + + echo creating $ofile + + # Now quote all the things that may contain metacharacters while being + # careful not to overquote the AC_SUBSTed values. We take copies of the + # variables and quote the copies for generation of the libtool script. + for var in echo old_CC old_CFLAGS \ + AR AR_FLAGS CC LD LN_S NM SHELL \ + reload_flag reload_cmds wl \ + pic_flag link_static_flag no_builtin_flag export_dynamic_flag_spec \ + thread_safe_flag_spec whole_archive_flag_spec libname_spec \ + library_names_spec soname_spec \ + RANLIB old_archive_cmds old_archive_from_new_cmds old_postinstall_cmds \ + old_postuninstall_cmds archive_cmds archive_expsym_cmds postinstall_cmds \ + postuninstall_cmds extract_expsyms_cmds old_archive_from_expsyms_cmds \ + old_striplib striplib file_magic_cmd export_symbols_cmds \ + deplibs_check_method allow_undefined_flag no_undefined_flag \ + finish_cmds finish_eval global_symbol_pipe global_symbol_to_cdecl \ + global_symbol_to_c_name_address \ + hardcode_libdir_flag_spec hardcode_libdir_separator \ + sys_lib_search_path_spec sys_lib_dlsearch_path_spec \ + compiler_c_o compiler_o_lo need_locks exclude_expsyms include_expsyms; do + + case $var in + reload_cmds | old_archive_cmds | old_archive_from_new_cmds | \ + old_postinstall_cmds | old_postuninstall_cmds | \ + export_symbols_cmds | archive_cmds | archive_expsym_cmds | \ + extract_expsyms_cmds | old_archive_from_expsyms_cmds | \ + postinstall_cmds | postuninstall_cmds | \ + finish_cmds | sys_lib_search_path_spec | sys_lib_dlsearch_path_spec) + # Double-quote double-evaled strings. + eval "lt_$var=\\\"\`\$echo \"X\$$var\" | \$Xsed -e \"\$double_quote_subst\" -e \"\$sed_quote_subst\" -e \"\$delay_variable_subst\"\`\\\"" + ;; + *) + eval "lt_$var=\\\"\`\$echo \"X\$$var\" | \$Xsed -e \"\$sed_quote_subst\"\`\\\"" + ;; + esac + done + + cat <<__EOF__ > "${ofile}T" +#! $SHELL + +# `$echo "$ofile" | sed 's%^.*/%%'` - Provide generalized library-building support services. +# Generated automatically by $PROGRAM (GNU $PACKAGE $VERSION$TIMESTAMP) +# NOTE: Changes made to this file will be lost: look at ltmain.sh. +# +# Copyright (C) 1996-2000 Free Software Foundation, Inc. +# Originally by Gordon Matzigkeit , 1996 +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + +# Sed that helps us avoid accidentally triggering echo(1) options like -n. +Xsed="sed -e s/^X//" + +# The HP-UX ksh and POSIX shell print the target directory to stdout +# if CDPATH is set. +if test "X\${CDPATH+set}" = Xset; then CDPATH=:; export CDPATH; fi + +# ### BEGIN LIBTOOL CONFIG + +# Libtool was configured on host `(hostname || uname -n) 2>/dev/null | sed 1q`: + +# Shell to use when invoking shell scripts. +SHELL=$lt_SHELL + +# Whether or not to build shared libraries. +build_libtool_libs=$enable_shared + +# Whether or not to build static libraries. +build_old_libs=$enable_static + +# Whether or not to add -lc for building shared libraries. +build_libtool_need_lc=$need_lc + +# Whether or not to optimize for fast installation. +fast_install=$enable_fast_install + +# The host system. +host_alias=$host_alias +host=$host + +# An echo program that does not interpret backslashes. +echo=$lt_echo + +# The archiver. +AR=$lt_AR +AR_FLAGS=$lt_AR_FLAGS + +# The default C compiler. +CC=$lt_CC + +# Is the compiler the GNU C compiler? +with_gcc=$GCC + +# The linker used to build libraries. +LD=$lt_LD + +# Whether we need hard or soft links. +LN_S=$lt_LN_S + +# A BSD-compatible nm program. +NM=$lt_NM + +# A symbol stripping program +STRIP=$STRIP + +# Used to examine libraries when file_magic_cmd begins "file" +MAGIC_CMD=$MAGIC_CMD + +# Used on cygwin: DLL creation program. +DLLTOOL="$DLLTOOL" + +# Used on cygwin: object dumper. +OBJDUMP="$OBJDUMP" + +# Used on cygwin: assembler. +AS="$AS" + +# The name of the directory that contains temporary libtool files. +objdir=$objdir + +# How to create reloadable object files. +reload_flag=$lt_reload_flag +reload_cmds=$lt_reload_cmds + +# How to pass a linker flag through the compiler. +wl=$lt_wl + +# Object file suffix (normally "o"). +objext="$ac_objext" + +# Old archive suffix (normally "a"). +libext="$libext" + +# Executable file suffix (normally ""). +exeext="$exeext" + +# Additional compiler flags for building library objects. +pic_flag=$lt_pic_flag +pic_mode=$pic_mode + +# Does compiler simultaneously support -c and -o options? +compiler_c_o=$lt_compiler_c_o + +# Can we write directly to a .lo ? +compiler_o_lo=$lt_compiler_o_lo + +# Must we lock files when doing compilation ? +need_locks=$lt_need_locks + +# Do we need the lib prefix for modules? +need_lib_prefix=$need_lib_prefix + +# Do we need a version for libraries? +need_version=$need_version + +# Whether dlopen is supported. +dlopen_support=$enable_dlopen + +# Whether dlopen of programs is supported. +dlopen_self=$enable_dlopen_self + +# Whether dlopen of statically linked programs is supported. +dlopen_self_static=$enable_dlopen_self_static + +# Compiler flag to prevent dynamic linking. +link_static_flag=$lt_link_static_flag + +# Compiler flag to turn off builtin functions. +no_builtin_flag=$lt_no_builtin_flag + +# Compiler flag to allow reflexive dlopens. +export_dynamic_flag_spec=$lt_export_dynamic_flag_spec + +# Compiler flag to generate shared objects directly from archives. +whole_archive_flag_spec=$lt_whole_archive_flag_spec + +# Compiler flag to generate thread-safe objects. +thread_safe_flag_spec=$lt_thread_safe_flag_spec + +# Library versioning type. +version_type=$version_type + +# Format of library name prefix. +libname_spec=$lt_libname_spec + +# List of archive names. First name is the real one, the rest are links. +# The last name is the one that the linker finds with -lNAME. +library_names_spec=$lt_library_names_spec + +# The coded name of the library, if different from the real name. +soname_spec=$lt_soname_spec + +# Commands used to build and install an old-style archive. +RANLIB=$lt_RANLIB +old_archive_cmds=$lt_old_archive_cmds +old_postinstall_cmds=$lt_old_postinstall_cmds +old_postuninstall_cmds=$lt_old_postuninstall_cmds + +# Create an old-style archive from a shared archive. +old_archive_from_new_cmds=$lt_old_archive_from_new_cmds + +# Create a temporary old-style archive to link instead of a shared archive. +old_archive_from_expsyms_cmds=$lt_old_archive_from_expsyms_cmds + +# Commands used to build and install a shared archive. +archive_cmds=$lt_archive_cmds +archive_expsym_cmds=$lt_archive_expsym_cmds +postinstall_cmds=$lt_postinstall_cmds +postuninstall_cmds=$lt_postuninstall_cmds + +# Commands to strip libraries. +old_striplib=$lt_old_striplib +striplib=$lt_striplib + +# Method to check whether dependent libraries are shared objects. +deplibs_check_method=$lt_deplibs_check_method + +# Command to use when deplibs_check_method == file_magic. +file_magic_cmd=$lt_file_magic_cmd + +# Flag that allows shared libraries with undefined symbols to be built. +allow_undefined_flag=$lt_allow_undefined_flag + +# Flag that forces no undefined symbols. +no_undefined_flag=$lt_no_undefined_flag + +# Commands used to finish a libtool library installation in a directory. +finish_cmds=$lt_finish_cmds + +# Same as above, but a single script fragment to be evaled but not shown. +finish_eval=$lt_finish_eval + +# Take the output of nm and produce a listing of raw symbols and C names. +global_symbol_pipe=$lt_global_symbol_pipe + +# Transform the output of nm in a proper C declaration +global_symbol_to_cdecl=$lt_global_symbol_to_cdecl + +# Transform the output of nm in a C name address pair +global_symbol_to_c_name_address=$lt_global_symbol_to_c_name_address + +# This is the shared library runtime path variable. +runpath_var=$runpath_var + +# This is the shared library path variable. +shlibpath_var=$shlibpath_var + +# Is shlibpath searched before the hard-coded library search path? +shlibpath_overrides_runpath=$shlibpath_overrides_runpath + +# How to hardcode a shared library path into an executable. +hardcode_action=$hardcode_action + +# Whether we should hardcode library paths into libraries. +hardcode_into_libs=$hardcode_into_libs + +# Flag to hardcode \$libdir into a binary during linking. +# This must work even if \$libdir does not exist. +hardcode_libdir_flag_spec=$lt_hardcode_libdir_flag_spec + +# Whether we need a single -rpath flag with a separated argument. +hardcode_libdir_separator=$lt_hardcode_libdir_separator + +# Set to yes if using DIR/libNAME.so during linking hardcodes DIR into the +# resulting binary. +hardcode_direct=$hardcode_direct + +# Set to yes if using the -LDIR flag during linking hardcodes DIR into the +# resulting binary. +hardcode_minus_L=$hardcode_minus_L + +# Set to yes if using SHLIBPATH_VAR=DIR during linking hardcodes DIR into +# the resulting binary. +hardcode_shlibpath_var=$hardcode_shlibpath_var + +# Variables whose values should be saved in libtool wrapper scripts and +# restored at relink time. +variables_saved_for_relink="$variables_saved_for_relink" + +# Whether libtool must link a program against all its dependency libraries. +link_all_deplibs=$link_all_deplibs + +# Compile-time system search path for libraries +sys_lib_search_path_spec=$lt_sys_lib_search_path_spec + +# Run-time system search path for libraries +sys_lib_dlsearch_path_spec=$lt_sys_lib_dlsearch_path_spec + +# Fix the shell variable \$srcfile for the compiler. +fix_srcfile_path="$fix_srcfile_path" + +# Set to yes if exported symbols are required. +always_export_symbols=$always_export_symbols + +# The commands to list exported symbols. +export_symbols_cmds=$lt_export_symbols_cmds + +# The commands to extract the exported symbol list from a shared archive. +extract_expsyms_cmds=$lt_extract_expsyms_cmds + +# Symbols that should not be listed in the preloaded symbols. +exclude_expsyms=$lt_exclude_expsyms + +# Symbols that must always be exported. +include_expsyms=$lt_include_expsyms + +# ### END LIBTOOL CONFIG + +__EOF__ + + case $host_os in + aix3*) + cat <<\EOF >> "${ofile}T" + +# AIX sometimes has problems with the GCC collect2 program. For some +# reason, if we set the COLLECT_NAMES environment variable, the problems +# vanish in a puff of smoke. +if test "X${COLLECT_NAMES+set}" != Xset; then + COLLECT_NAMES= + export COLLECT_NAMES +fi +EOF + ;; + esac + + case $host_os in + cygwin* | mingw* | pw32* | os2*) + cat <<'EOF' >> "${ofile}T" + # This is a source program that is used to create dlls on Windows + # Don't remove nor modify the starting and closing comments +# /* ltdll.c starts here */ +# #define WIN32_LEAN_AND_MEAN +# #include +# #undef WIN32_LEAN_AND_MEAN +# #include +# +# #ifndef __CYGWIN__ +# # ifdef __CYGWIN32__ +# # define __CYGWIN__ __CYGWIN32__ +# # endif +# #endif +# +# #ifdef __cplusplus +# extern "C" { +# #endif +# BOOL APIENTRY DllMain (HINSTANCE hInst, DWORD reason, LPVOID reserved); +# #ifdef __cplusplus +# } +# #endif +# +# #ifdef __CYGWIN__ +# #include +# DECLARE_CYGWIN_DLL( DllMain ); +# #endif +# HINSTANCE __hDllInstance_base; +# +# BOOL APIENTRY +# DllMain (HINSTANCE hInst, DWORD reason, LPVOID reserved) +# { +# __hDllInstance_base = hInst; +# return TRUE; +# } +# /* ltdll.c ends here */ + # This is a source program that is used to create import libraries + # on Windows for dlls which lack them. Don't remove nor modify the + # starting and closing comments +# /* impgen.c starts here */ +# /* Copyright (C) 1999-2000 Free Software Foundation, Inc. +# +# This file is part of GNU libtool. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# */ +# +# #include /* for printf() */ +# #include /* for open(), lseek(), read() */ +# #include /* for O_RDONLY, O_BINARY */ +# #include /* for strdup() */ +# +# /* O_BINARY isn't required (or even defined sometimes) under Unix */ +# #ifndef O_BINARY +# #define O_BINARY 0 +# #endif +# +# static unsigned int +# pe_get16 (fd, offset) +# int fd; +# int offset; +# { +# unsigned char b[2]; +# lseek (fd, offset, SEEK_SET); +# read (fd, b, 2); +# return b[0] + (b[1]<<8); +# } +# +# static unsigned int +# pe_get32 (fd, offset) +# int fd; +# int offset; +# { +# unsigned char b[4]; +# lseek (fd, offset, SEEK_SET); +# read (fd, b, 4); +# return b[0] + (b[1]<<8) + (b[2]<<16) + (b[3]<<24); +# } +# +# static unsigned int +# pe_as32 (ptr) +# void *ptr; +# { +# unsigned char *b = ptr; +# return b[0] + (b[1]<<8) + (b[2]<<16) + (b[3]<<24); +# } +# +# int +# main (argc, argv) +# int argc; +# char *argv[]; +# { +# int dll; +# unsigned long pe_header_offset, opthdr_ofs, num_entries, i; +# unsigned long export_rva, export_size, nsections, secptr, expptr; +# unsigned long name_rvas, nexp; +# unsigned char *expdata, *erva; +# char *filename, *dll_name; +# +# filename = argv[1]; +# +# dll = open(filename, O_RDONLY|O_BINARY); +# if (dll < 1) +# return 1; +# +# dll_name = filename; +# +# for (i=0; filename[i]; i++) +# if (filename[i] == '/' || filename[i] == '\\' || filename[i] == ':') +# dll_name = filename + i +1; +# +# pe_header_offset = pe_get32 (dll, 0x3c); +# opthdr_ofs = pe_header_offset + 4 + 20; +# num_entries = pe_get32 (dll, opthdr_ofs + 92); +# +# if (num_entries < 1) /* no exports */ +# return 1; +# +# export_rva = pe_get32 (dll, opthdr_ofs + 96); +# export_size = pe_get32 (dll, opthdr_ofs + 100); +# nsections = pe_get16 (dll, pe_header_offset + 4 +2); +# secptr = (pe_header_offset + 4 + 20 + +# pe_get16 (dll, pe_header_offset + 4 + 16)); +# +# expptr = 0; +# for (i = 0; i < nsections; i++) +# { +# char sname[8]; +# unsigned long secptr1 = secptr + 40 * i; +# unsigned long vaddr = pe_get32 (dll, secptr1 + 12); +# unsigned long vsize = pe_get32 (dll, secptr1 + 16); +# unsigned long fptr = pe_get32 (dll, secptr1 + 20); +# lseek(dll, secptr1, SEEK_SET); +# read(dll, sname, 8); +# if (vaddr <= export_rva && vaddr+vsize > export_rva) +# { +# expptr = fptr + (export_rva - vaddr); +# if (export_rva + export_size > vaddr + vsize) +# export_size = vsize - (export_rva - vaddr); +# break; +# } +# } +# +# expdata = (unsigned char*)malloc(export_size); +# lseek (dll, expptr, SEEK_SET); +# read (dll, expdata, export_size); +# erva = expdata - export_rva; +# +# nexp = pe_as32 (expdata+24); +# name_rvas = pe_as32 (expdata+32); +# +# printf ("EXPORTS\n"); +# for (i = 0; i> "${ofile}T" || (rm -f "${ofile}T"; exit 1) + + mv -f "${ofile}T" "$ofile" || \ + (rm -f "$ofile" && cp "${ofile}T" "$ofile" && rm -f "${ofile}T") + chmod +x "$ofile" +fi +## +## END FIXME + +])# _LT_AC_LTCONFIG_HACK + +# AC_LIBTOOL_DLOPEN - enable checks for dlopen support +AC_DEFUN([AC_LIBTOOL_DLOPEN], [AC_BEFORE([$0],[AC_LIBTOOL_SETUP])]) + +# AC_LIBTOOL_WIN32_DLL - declare package support for building win32 dll's +AC_DEFUN([AC_LIBTOOL_WIN32_DLL], [AC_BEFORE([$0], [AC_LIBTOOL_SETUP])]) + +# AC_ENABLE_SHARED - implement the --enable-shared flag +# Usage: AC_ENABLE_SHARED[(DEFAULT)] +# Where DEFAULT is either `yes' or `no'. If omitted, it defaults to +# `yes'. +AC_DEFUN([AC_ENABLE_SHARED], +[define([AC_ENABLE_SHARED_DEFAULT], ifelse($1, no, no, yes))dnl +AC_ARG_ENABLE(shared, +changequote(<<, >>)dnl +<< --enable-shared[=PKGS] build shared libraries [default=>>AC_ENABLE_SHARED_DEFAULT], +changequote([, ])dnl +[p=${PACKAGE-default} +case $enableval in +yes) enable_shared=yes ;; +no) enable_shared=no ;; +*) + enable_shared=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_shared=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac], +enable_shared=AC_ENABLE_SHARED_DEFAULT)dnl +]) + +# AC_DISABLE_SHARED - set the default shared flag to --disable-shared +AC_DEFUN([AC_DISABLE_SHARED], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl +AC_ENABLE_SHARED(no)]) + +# AC_ENABLE_STATIC - implement the --enable-static flag +# Usage: AC_ENABLE_STATIC[(DEFAULT)] +# Where DEFAULT is either `yes' or `no'. If omitted, it defaults to +# `yes'. +AC_DEFUN([AC_ENABLE_STATIC], +[define([AC_ENABLE_STATIC_DEFAULT], ifelse($1, no, no, yes))dnl +AC_ARG_ENABLE(static, +changequote(<<, >>)dnl +<< --enable-static[=PKGS] build static libraries [default=>>AC_ENABLE_STATIC_DEFAULT], +changequote([, ])dnl +[p=${PACKAGE-default} +case $enableval in +yes) enable_static=yes ;; +no) enable_static=no ;; +*) + enable_static=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_static=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac], +enable_static=AC_ENABLE_STATIC_DEFAULT)dnl +]) + +# AC_DISABLE_STATIC - set the default static flag to --disable-static +AC_DEFUN([AC_DISABLE_STATIC], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl +AC_ENABLE_STATIC(no)]) + + +# AC_ENABLE_FAST_INSTALL - implement the --enable-fast-install flag +# Usage: AC_ENABLE_FAST_INSTALL[(DEFAULT)] +# Where DEFAULT is either `yes' or `no'. If omitted, it defaults to +# `yes'. +AC_DEFUN([AC_ENABLE_FAST_INSTALL], +[define([AC_ENABLE_FAST_INSTALL_DEFAULT], ifelse($1, no, no, yes))dnl +AC_ARG_ENABLE(fast-install, +changequote(<<, >>)dnl +<< --enable-fast-install[=PKGS] optimize for fast installation [default=>>AC_ENABLE_FAST_INSTALL_DEFAULT], +changequote([, ])dnl +[p=${PACKAGE-default} +case $enableval in +yes) enable_fast_install=yes ;; +no) enable_fast_install=no ;; +*) + enable_fast_install=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_fast_install=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac], +enable_fast_install=AC_ENABLE_FAST_INSTALL_DEFAULT)dnl +]) + +# AC_DISABLE_FAST_INSTALL - set the default to --disable-fast-install +AC_DEFUN([AC_DISABLE_FAST_INSTALL], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl +AC_ENABLE_FAST_INSTALL(no)]) + +# AC_LIBTOOL_PICMODE - implement the --with-pic flag +# Usage: AC_LIBTOOL_PICMODE[(MODE)] +# Where MODE is either `yes' or `no'. If omitted, it defaults to +# `both'. +AC_DEFUN([AC_LIBTOOL_PICMODE], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl +pic_mode=ifelse($#,1,$1,default)]) + + +# AC_PATH_TOOL_PREFIX - find a file program which can recognise shared library +AC_DEFUN([AC_PATH_TOOL_PREFIX], +[AC_MSG_CHECKING([for $1]) +AC_CACHE_VAL(lt_cv_path_MAGIC_CMD, +[case $MAGIC_CMD in + /*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a path. + ;; + ?:/*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a dos path. + ;; + *) + ac_save_MAGIC_CMD="$MAGIC_CMD" + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" +dnl $ac_dummy forces splitting on constant user-supplied paths. +dnl POSIX.2 word splitting is done only on the output of word expansions, +dnl not every word. This closes a longstanding sh security hole. + ac_dummy="ifelse([$2], , $PATH, [$2])" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$1; then + lt_cv_path_MAGIC_CMD="$ac_dir/$1" + if test -n "$file_magic_test_file"; then + case $deplibs_check_method in + "file_magic "*) + file_magic_regex="`expr \"$deplibs_check_method\" : \"file_magic \(.*\)\"`" + MAGIC_CMD="$lt_cv_path_MAGIC_CMD" + if eval $file_magic_cmd \$file_magic_test_file 2> /dev/null | + egrep "$file_magic_regex" > /dev/null; then + : + else + cat <&2 + +*** Warning: the command libtool uses to detect shared libraries, +*** $file_magic_cmd, produces output that libtool cannot recognize. +*** The result is that libtool may fail to recognize shared libraries +*** as such. This will affect the creation of libtool libraries that +*** depend on shared libraries, but programs linked with such libtool +*** libraries will work regardless of this problem. Nevertheless, you +*** may want to report the problem to your system manager and/or to +*** bug-libtool@gnu.org + +EOF + fi ;; + esac + fi + break + fi + done + IFS="$ac_save_ifs" + MAGIC_CMD="$ac_save_MAGIC_CMD" + ;; +esac]) +MAGIC_CMD="$lt_cv_path_MAGIC_CMD" +if test -n "$MAGIC_CMD"; then + AC_MSG_RESULT($MAGIC_CMD) +else + AC_MSG_RESULT(no) +fi +]) + + +# AC_PATH_MAGIC - find a file program which can recognise a shared library +AC_DEFUN([AC_PATH_MAGIC], +[AC_REQUIRE([AC_CHECK_TOOL_PREFIX])dnl +AC_PATH_TOOL_PREFIX(${ac_tool_prefix}file, /usr/bin:$PATH) +if test -z "$lt_cv_path_MAGIC_CMD"; then + if test -n "$ac_tool_prefix"; then + AC_PATH_TOOL_PREFIX(file, /usr/bin:$PATH) + else + MAGIC_CMD=: + fi +fi +]) + + +# AC_PROG_LD - find the path to the GNU or non-GNU linker +AC_DEFUN([AC_PROG_LD], +[AC_ARG_WITH(gnu-ld, +[ --with-gnu-ld assume the C compiler uses GNU ld [default=no]], +test "$withval" = no || with_gnu_ld=yes, with_gnu_ld=no) +AC_REQUIRE([AC_PROG_CC])dnl +AC_REQUIRE([AC_CANONICAL_HOST])dnl +AC_REQUIRE([AC_CANONICAL_BUILD])dnl +AC_REQUIRE([_LT_AC_LIBTOOL_SYS_PATH_SEPARATOR])dnl +ac_prog=ld +if test "$GCC" = yes; then + # Check if gcc -print-prog-name=ld gives a path. + AC_MSG_CHECKING([for ld used by GCC]) + case $host in + *-*-mingw*) + # gcc leaves a trailing carriage return which upsets mingw + ac_prog=`($CC -print-prog-name=ld) 2>&5 | tr -d '\015'` ;; + *) + ac_prog=`($CC -print-prog-name=ld) 2>&5` ;; + esac + case $ac_prog in + # Accept absolute paths. + [[\\/]]* | [[A-Za-z]]:[[\\/]]*) + re_direlt='/[[^/]][[^/]]*/\.\./' + # Canonicalize the path of ld + ac_prog=`echo $ac_prog| sed 's%\\\\%/%g'` + while echo $ac_prog | grep "$re_direlt" > /dev/null 2>&1; do + ac_prog=`echo $ac_prog| sed "s%$re_direlt%/%"` + done + test -z "$LD" && LD="$ac_prog" + ;; + "") + # If it fails, then pretend we aren't using GCC. + ac_prog=ld + ;; + *) + # If it is relative, then search for the first ld in PATH. + with_gnu_ld=unknown + ;; + esac +elif test "$with_gnu_ld" = yes; then + AC_MSG_CHECKING([for GNU ld]) +else + AC_MSG_CHECKING([for non-GNU ld]) +fi +AC_CACHE_VAL(lt_cv_path_LD, +[if test -z "$LD"; then + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for ac_dir in $PATH; do + test -z "$ac_dir" && ac_dir=. + if test -f "$ac_dir/$ac_prog" || test -f "$ac_dir/$ac_prog$ac_exeext"; then + lt_cv_path_LD="$ac_dir/$ac_prog" + # Check to see if the program is GNU ld. I'd rather use --version, + # but apparently some GNU ld's only accept -v. + # Break only if it was the GNU/non-GNU ld that we prefer. + if "$lt_cv_path_LD" -v 2>&1 < /dev/null | egrep '(GNU|with BFD)' > /dev/null; then + test "$with_gnu_ld" != no && break + else + test "$with_gnu_ld" != yes && break + fi + fi + done + IFS="$ac_save_ifs" +else + lt_cv_path_LD="$LD" # Let the user override the test with a path. +fi]) +LD="$lt_cv_path_LD" +if test -n "$LD"; then + AC_MSG_RESULT($LD) +else + AC_MSG_RESULT(no) +fi +test -z "$LD" && AC_MSG_ERROR([no acceptable ld found in \$PATH]) +AC_PROG_LD_GNU +]) + +# AC_PROG_LD_GNU - +AC_DEFUN([AC_PROG_LD_GNU], +[AC_CACHE_CHECK([if the linker ($LD) is GNU ld], lt_cv_prog_gnu_ld, +[# I'd rather use --version here, but apparently some GNU ld's only accept -v. +if $LD -v 2>&1 &5; then + lt_cv_prog_gnu_ld=yes +else + lt_cv_prog_gnu_ld=no +fi]) +with_gnu_ld=$lt_cv_prog_gnu_ld +]) + +# AC_PROG_LD_RELOAD_FLAG - find reload flag for linker +# -- PORTME Some linkers may need a different reload flag. +AC_DEFUN([AC_PROG_LD_RELOAD_FLAG], +[AC_CACHE_CHECK([for $LD option to reload object files], lt_cv_ld_reload_flag, +[lt_cv_ld_reload_flag='-r']) +reload_flag=$lt_cv_ld_reload_flag +test -n "$reload_flag" && reload_flag=" $reload_flag" +]) + +# AC_DEPLIBS_CHECK_METHOD - how to check for library dependencies +# -- PORTME fill in with the dynamic library characteristics +AC_DEFUN([AC_DEPLIBS_CHECK_METHOD], +[AC_CACHE_CHECK([how to recognise dependant libraries], +lt_cv_deplibs_check_method, +[lt_cv_file_magic_cmd='$MAGIC_CMD' +lt_cv_file_magic_test_file= +lt_cv_deplibs_check_method='unknown' +# Need to set the preceding variable on all platforms that support +# interlibrary dependencies. +# 'none' -- dependencies not supported. +# `unknown' -- same as none, but documents that we really don't know. +# 'pass_all' -- all dependencies passed with no checks. +# 'test_compile' -- check by making test program. +# 'file_magic [[regex]]' -- check by looking for files in library path +# which responds to the $file_magic_cmd with a given egrep regex. +# If you have `file' or equivalent on your system and you're not sure +# whether `pass_all' will *always* work, you probably want this one. + +case $host_os in +aix4* | aix5*) + lt_cv_deplibs_check_method=pass_all + ;; + +beos*) + lt_cv_deplibs_check_method=pass_all + ;; + +bsdi4*) + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (shared object|dynamic lib)' + lt_cv_file_magic_cmd='/usr/bin/file -L' + lt_cv_file_magic_test_file=/shlib/libc.so + ;; + +cygwin* | mingw* | pw32*) + lt_cv_deplibs_check_method='file_magic file format pei*-i386(.*architecture: i386)?' + lt_cv_file_magic_cmd='$OBJDUMP -f' + ;; + +darwin* | rhapsody*) + lt_cv_deplibs_check_method='file_magic Mach-O dynamically linked shared library' + lt_cv_file_magic_cmd='/usr/bin/file -L' + case "$host_os" in + rhapsody* | darwin1.[[012]]) + lt_cv_file_magic_test_file=`echo /System/Library/Frameworks/System.framework/Versions/*/System | head -1` + ;; + *) # Darwin 1.3 on + lt_cv_file_magic_test_file='/usr/lib/libSystem.dylib' + ;; + esac + ;; + +freebsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ > /dev/null; then + case $host_cpu in + i*86 ) + # Not sure whether the presence of OpenBSD here was a mistake. + # Let's accept both of them until this is cleared up. + lt_cv_deplibs_check_method='file_magic (FreeBSD|OpenBSD)/i[[3-9]]86 (compact )?demand paged shared library' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` + ;; + esac + else + lt_cv_deplibs_check_method=pass_all + fi + ;; + +gnu*) + lt_cv_deplibs_check_method=pass_all + ;; + +hpux10.20*|hpux11*) + lt_cv_deplibs_check_method='file_magic (s[[0-9]][[0-9]][[0-9]]|PA-RISC[[0-9]].[[0-9]]) shared library' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=/usr/lib/libc.sl + ;; + +irix5* | irix6* | nonstopux*) + case $host_os in + irix5* | nonstopux*) + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method="file_magic ELF 32-bit MSB dynamic lib MIPS - version 1" + ;; + *) + case $LD in + *-32|*"-32 ") libmagic=32-bit;; + *-n32|*"-n32 ") libmagic=N32;; + *-64|*"-64 ") libmagic=64-bit;; + *) libmagic=never-match;; + esac + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method="file_magic ELF ${libmagic} MSB mips-[[1234]] dynamic lib MIPS - version 1" + ;; + esac + lt_cv_file_magic_test_file=`echo /lib${libsuff}/libc.so*` + lt_cv_deplibs_check_method=pass_all + ;; + +# This must be Linux ELF. +linux-gnu*) + case $host_cpu in + alpha* | hppa* | i*86 | powerpc* | sparc* | ia64* ) + lt_cv_deplibs_check_method=pass_all ;; + *) + # glibc up to 2.1.1 does not perform some relocations on ARM + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB (shared object|dynamic lib )' ;; + esac + lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so` + ;; + +netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ > /dev/null; then + lt_cv_deplibs_check_method='match_pattern /lib[[^/\.]]+\.so\.[[0-9]]+\.[[0-9]]+$' + else + lt_cv_deplibs_check_method='match_pattern /lib[[^/\.]]+\.so$' + fi + ;; + +newos6*) + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (executable|dynamic lib)' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=/usr/lib/libnls.so + ;; + +openbsd*) + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` + if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB shared object' + else + lt_cv_deplibs_check_method='file_magic OpenBSD.* shared library' + fi + ;; + +osf3* | osf4* | osf5*) + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method='file_magic COFF format alpha shared library' + lt_cv_file_magic_test_file=/shlib/libc.so + lt_cv_deplibs_check_method=pass_all + ;; + +sco3.2v5*) + lt_cv_deplibs_check_method=pass_all + ;; + +solaris*) + lt_cv_deplibs_check_method=pass_all + lt_cv_file_magic_test_file=/lib/libc.so + ;; + +sysv5uw[[78]]* | sysv4*uw2*) + lt_cv_deplibs_check_method=pass_all + ;; + +sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + case $host_vendor in + motorola) + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (shared object|dynamic lib) M[[0-9]][[0-9]]* Version [[0-9]]' + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so*` + ;; + ncr) + lt_cv_deplibs_check_method=pass_all + ;; + sequent) + lt_cv_file_magic_cmd='/bin/file' + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB (shared object|dynamic lib )' + ;; + sni) + lt_cv_file_magic_cmd='/bin/file' + lt_cv_deplibs_check_method="file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB dynamic lib" + lt_cv_file_magic_test_file=/lib/libc.so + ;; + esac + ;; +esac +]) +file_magic_cmd=$lt_cv_file_magic_cmd +deplibs_check_method=$lt_cv_deplibs_check_method +]) + + +# AC_PROG_NM - find the path to a BSD-compatible name lister +AC_DEFUN([AC_PROG_NM], +[AC_REQUIRE([_LT_AC_LIBTOOL_SYS_PATH_SEPARATOR])dnl +AC_MSG_CHECKING([for BSD-compatible nm]) +AC_CACHE_VAL(lt_cv_path_NM, +[if test -n "$NM"; then + # Let the user override the test. + lt_cv_path_NM="$NM" +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for ac_dir in $PATH /usr/ccs/bin /usr/ucb /bin; do + test -z "$ac_dir" && ac_dir=. + tmp_nm=$ac_dir/${ac_tool_prefix}nm + if test -f $tmp_nm || test -f $tmp_nm$ac_exeext ; then + # Check to see if the nm accepts a BSD-compat flag. + # Adding the `sed 1q' prevents false positives on HP-UX, which says: + # nm: unknown option "B" ignored + # Tru64's nm complains that /dev/null is an invalid object file + if ($tmp_nm -B /dev/null 2>&1 | sed '1q'; exit 0) | egrep '(/dev/null|Invalid file or object type)' >/dev/null; then + lt_cv_path_NM="$tmp_nm -B" + break + elif ($tmp_nm -p /dev/null 2>&1 | sed '1q'; exit 0) | egrep /dev/null >/dev/null; then + lt_cv_path_NM="$tmp_nm -p" + break + else + lt_cv_path_NM=${lt_cv_path_NM="$tmp_nm"} # keep the first match, but + continue # so that we can try to find one that supports BSD flags + fi + fi + done + IFS="$ac_save_ifs" + test -z "$lt_cv_path_NM" && lt_cv_path_NM=nm +fi]) +NM="$lt_cv_path_NM" +AC_MSG_RESULT([$NM]) +]) + +# AC_CHECK_LIBM - check for math library +AC_DEFUN([AC_CHECK_LIBM], +[AC_REQUIRE([AC_CANONICAL_HOST])dnl +LIBM= +case $host in +*-*-beos* | *-*-cygwin* | *-*-pw32*) + # These system don't have libm + ;; +*-ncr-sysv4.3*) + AC_CHECK_LIB(mw, _mwvalidcheckl, LIBM="-lmw") + AC_CHECK_LIB(m, main, LIBM="$LIBM -lm") + ;; +*) + AC_CHECK_LIB(m, main, LIBM="-lm") + ;; +esac +]) + +# AC_LIBLTDL_CONVENIENCE[(dir)] - sets LIBLTDL to the link flags for +# the libltdl convenience library and LTDLINCL to the include flags for +# the libltdl header and adds --enable-ltdl-convenience to the +# configure arguments. Note that LIBLTDL and LTDLINCL are not +# AC_SUBSTed, nor is AC_CONFIG_SUBDIRS called. If DIR is not +# provided, it is assumed to be `libltdl'. LIBLTDL will be prefixed +# with '${top_builddir}/' and LTDLINCL will be prefixed with +# '${top_srcdir}/' (note the single quotes!). If your package is not +# flat and you're not using automake, define top_builddir and +# top_srcdir appropriately in the Makefiles. +AC_DEFUN([AC_LIBLTDL_CONVENIENCE], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl + case $enable_ltdl_convenience in + no) AC_MSG_ERROR([this package needs a convenience libltdl]) ;; + "") enable_ltdl_convenience=yes + ac_configure_args="$ac_configure_args --enable-ltdl-convenience" ;; + esac + LIBLTDL='${top_builddir}/'ifelse($#,1,[$1],['libltdl'])/libltdlc.la + LTDLINCL='-I${top_srcdir}/'ifelse($#,1,[$1],['libltdl']) + # For backwards non-gettext consistent compatibility... + INCLTDL="$LTDLINCL" +]) + +# AC_LIBLTDL_INSTALLABLE[(dir)] - sets LIBLTDL to the link flags for +# the libltdl installable library and LTDLINCL to the include flags for +# the libltdl header and adds --enable-ltdl-install to the configure +# arguments. Note that LIBLTDL and LTDLINCL are not AC_SUBSTed, nor is +# AC_CONFIG_SUBDIRS called. If DIR is not provided and an installed +# libltdl is not found, it is assumed to be `libltdl'. LIBLTDL will +# be prefixed with '${top_builddir}/' and LTDLINCL will be prefixed +# with '${top_srcdir}/' (note the single quotes!). If your package is +# not flat and you're not using automake, define top_builddir and +# top_srcdir appropriately in the Makefiles. +# In the future, this macro may have to be called after AC_PROG_LIBTOOL. +AC_DEFUN([AC_LIBLTDL_INSTALLABLE], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl + AC_CHECK_LIB(ltdl, main, + [test x"$enable_ltdl_install" != xyes && enable_ltdl_install=no], + [if test x"$enable_ltdl_install" = xno; then + AC_MSG_WARN([libltdl not installed, but installation disabled]) + else + enable_ltdl_install=yes + fi + ]) + if test x"$enable_ltdl_install" = x"yes"; then + ac_configure_args="$ac_configure_args --enable-ltdl-install" + LIBLTDL='${top_builddir}/'ifelse($#,1,[$1],['libltdl'])/libltdl.la + LTDLINCL='-I${top_srcdir}/'ifelse($#,1,[$1],['libltdl']) + else + ac_configure_args="$ac_configure_args --enable-ltdl-install=no" + LIBLTDL="-lltdl" + LTDLINCL= + fi + # For backwards non-gettext consistent compatibility... + INCLTDL="$LTDLINCL" +]) + +# old names +AC_DEFUN([AM_PROG_LIBTOOL], [AC_PROG_LIBTOOL]) +AC_DEFUN([AM_ENABLE_SHARED], [AC_ENABLE_SHARED($@)]) +AC_DEFUN([AM_ENABLE_STATIC], [AC_ENABLE_STATIC($@)]) +AC_DEFUN([AM_DISABLE_SHARED], [AC_DISABLE_SHARED($@)]) +AC_DEFUN([AM_DISABLE_STATIC], [AC_DISABLE_STATIC($@)]) +AC_DEFUN([AM_PROG_LD], [AC_PROG_LD]) +AC_DEFUN([AM_PROG_NM], [AC_PROG_NM]) + +# This is just to silence aclocal about the macro not being used +ifelse([AC_DISABLE_FAST_INSTALL]) +## ltdl.m4 - Configure ltdl for the target system. -*-Shell-script-*- +## Copyright (C) 1999-2000 Free Software Foundation, Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, but +## WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +## General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +## +## As a special exception to the GNU General Public License, if you +## distribute this file as part of a program that contains a +## configuration script generated by Autoconf, you may include it under +## the same distribution terms that you use for the rest of that program. + +# serial 5 AC_LIB_LTDL + +# AC_WITH_LTDL +# ------------ +# Clients of libltdl can use this macro to allow the installer to +# choose between a shipped copy of the ltdl sources or a preinstalled +# version of the library. +AC_DEFUN([AC_WITH_LTDL], +[AC_REQUIRE([AC_LIB_LTDL]) +AC_SUBST([LIBLTDL]) +AC_SUBST([INCLTDL]) + +# Unless the user asks us to check, assume no installed ltdl exists. +use_installed_libltdl=no + +AC_ARG_WITH([included_ltdl], + [ --with-included-ltdl use the GNU ltdl sources included here]) + +if test "x$with_included_ltdl" != xyes; then + # We are not being forced to use the included libltdl sources, so + # decide whether there is a useful installed version we can use. + AC_CHECK_HEADER([ltdl.h], + [AC_CHECK_LIB([ltdl], [lt_dlcaller_register], + [with_included_ltdl=no], + [with_included_ltdl=yes]) + ]) +fi + +if test "x$enable_ltdl_install" != xyes; then + # If the user did not specify an installable libltdl, then default + # to a convenience lib. + AC_LIBLTDL_CONVENIENCE +fi + +if test "x$with_included_ltdl" = xno; then + # If the included ltdl is not to be used. then Use the + # preinstalled libltdl we found. + AC_DEFINE([HAVE_LTDL], 1, + [Define this if a modern libltdl is already installed]) + LIBLTDL=-lltdl +fi + +# Report our decision... +AC_MSG_CHECKING([whether to use included libltdl]) +AC_MSG_RESULT([$with_included_ltdl]) + +AC_CONFIG_SUBDIRS([libltdl]) +])# AC_WITH_LTDL + + +# AC_LIB_LTDL +# ----------- +# Perform all the checks necessary for compilation of the ltdl objects +# -- including compiler checks and header checks. +AC_DEFUN(AC_LIB_LTDL, +[AC_PREREQ(2.13) +AC_REQUIRE([AC_PROG_CC]) +AC_REQUIRE([AC_C_CONST]) +AC_REQUIRE([AC_HEADER_STDC]) +AC_REQUIRE([AC_HEADER_DIRENT]) +AC_REQUIRE([AC_LIBTOOL_HEADER_ASSERT]) +AC_REQUIRE([_LT_AC_CHECK_DLFCN]) +AC_REQUIRE([AC_LTDL_ENABLE_INSTALL]) +AC_REQUIRE([AC_LTDL_SHLIBEXT]) +AC_REQUIRE([AC_LTDL_SHLIBPATH]) +AC_REQUIRE([AC_LTDL_SYSSEARCHPATH]) +AC_REQUIRE([AC_LTDL_OBJDIR]) +AC_REQUIRE([AC_LTDL_DLPREOPEN]) +AC_REQUIRE([AC_LTDL_DLLIB]) +AC_REQUIRE([AC_LTDL_SYMBOL_USCORE]) +AC_REQUIRE([AC_LTDL_DLSYM_USCORE]) +AC_REQUIRE([AC_LTDL_SYS_DLOPEN_DEPLIBS]) +AC_REQUIRE([AC_LTDL_FUNC_ARGZ]) + +AC_CHECK_HEADERS([errno.h malloc.h memory.h stdlib.h stdio.h ctype.h unistd.h]) +AC_CHECK_HEADERS([dl.h sys/dl.h dld.h]) +AC_CHECK_HEADERS([string.h strings.h], break) + +AC_CHECK_FUNCS([strchr index], break) +AC_CHECK_FUNCS([strrchr rindex], break) +AC_CHECK_FUNCS([memcpy bcopy], break) +AC_CHECK_FUNCS([memmove strcmp]) + +])# AC_LIB_LTDL + +# AC_LTDL_ENABLE_INSTALL +# ---------------------- +AC_DEFUN(AC_LTDL_ENABLE_INSTALL, +[AC_ARG_ENABLE(ltdl-install, +[ --enable-ltdl-install install libltdl]) + +AM_CONDITIONAL(INSTALL_LTDL, test x"${enable_ltdl_install-no}" != xno) +AM_CONDITIONAL(CONVENIENCE_LTDL, test x"${enable_ltdl_convenience-no}" != xno) +])])# AC_LTDL_ENABLE_INSTALL + +# AC_LTDL_SYS_DLOPEN_DEPLIBS +# -------------------------- +AC_DEFUN(AC_LTDL_SYS_DLOPEN_DEPLIBS, +[AC_REQUIRE([AC_CANONICAL_HOST]) +AC_CACHE_CHECK([whether deplibs are loaded by dlopen], + libltdl_cv_sys_dlopen_deplibs, [dnl + # PORTME does your system automatically load deplibs for dlopen()? + libltdl_cv_sys_dlopen_deplibs=unknown + case "$host_os" in + linux*) + libltdl_cv_sys_dlopen_deplibs=yes + ;; + netbsd*) + libltdl_cv_sys_dlopen_deplibs=yes + ;; + openbsd*) + libltdl_cv_sys_dlopen_deplibs=yes + ;; + solaris*) + libltdl_cv_sys_dlopen_deplibs=yes + ;; + esac +]) +if test "$libltdl_cv_sys_dlopen_deplibs" != yes; then + AC_DEFINE(LTDL_DLOPEN_DEPLIBS, 1, + [Define if the OS needs help to load dependent libraries for dlopen(). ]) +fi +])# AC_LTDL_SYS_DLOPEN_DEPLIBS + +# AC_LTDL_SHLIBEXT +# ---------------- +AC_DEFUN(AC_LTDL_SHLIBEXT, +[AC_REQUIRE([_LT_AC_LTCONFIG_HACK]) +AC_CACHE_CHECK([which extension is used for shared libraries], + libltdl_cv_shlibext, +[ac_last= + for ac_spec in $library_names_spec; do + ac_last="$ac_spec" + done + echo "$ac_last" | [sed 's/\[.*\]//;s/^[^.]*//;s/\$.*$//;s/\.$//'] > conftest +libltdl_cv_shlibext=`cat conftest` +rm -f conftest +]) +if test -n "$libltdl_cv_shlibext"; then + AC_DEFINE_UNQUOTED(LTDL_SHLIB_EXT, "$libltdl_cv_shlibext", + [Define to the extension used for shared libraries, say, ".so". ]) +fi +])# AC_LTDL_SHLIBEXT + +# AC_LTDL_SHLIBPATH +# ----------------- +AC_DEFUN(AC_LTDL_SHLIBPATH, +[AC_REQUIRE([_LT_AC_LTCONFIG_HACK]) +AC_CACHE_CHECK([which variable specifies run-time library path], + libltdl_cv_shlibpath_var, [libltdl_cv_shlibpath_var="$shlibpath_var"]) +if test -n "$libltdl_cv_shlibpath_var"; then + AC_DEFINE_UNQUOTED(LTDL_SHLIBPATH_VAR, "$libltdl_cv_shlibpath_var", + [Define to the name of the environment variable that determines the dynamic library search path. ]) +fi +])# AC_LTDL_SHLIBPATH + +# AC_LTDL_SYSSEARCHPATH +# --------------------- +AC_DEFUN(AC_LTDL_SYSSEARCHPATH, +[AC_REQUIRE([_LT_AC_LTCONFIG_HACK]) +AC_CACHE_CHECK([for the default library search path], + libltdl_cv_sys_search_path, [libltdl_cv_sys_search_path="$sys_lib_dlsearch_path_spec"]) +if test -n "$libltdl_cv_sys_search_path"; then + case "$host" in + *-*-mingw*) pathsep=";" ;; + *) pathsep=":" ;; + esac + sys_search_path= + for dir in $libltdl_cv_sys_search_path; do + if test -z "$sys_search_path"; then + sys_search_path="$dir" + else + sys_search_path="$sys_search_path$pathsep$dir" + fi + done + AC_DEFINE_UNQUOTED(LTDL_SYSSEARCHPATH, "$sys_search_path", + [Define to the system default library search path. ]) +fi +])# AC_LTDL_SYSSEARCHPATH + +# AC_LTDL_OBJDIR +# -------------- +AC_DEFUN(AC_LTDL_OBJDIR, +[AC_CACHE_CHECK([for objdir], + libltdl_cv_objdir, [libltdl_cv_objdir="$objdir" +if test -n "$objdir"; then + : +else + rm -f .libs 2>/dev/null + mkdir .libs 2>/dev/null + if test -d .libs; then + libltdl_cv_objdir=.libs + else + # MS-DOS does not allow filenames that begin with a dot. + libltdl_cv_objdir=_libs + fi +rmdir .libs 2>/dev/null +fi]) +AC_DEFINE_UNQUOTED(LTDL_OBJDIR, "$libltdl_cv_objdir/", + [Define to the sub-directory in which libtool stores uninstalled libraries. ]) +])# AC_LTDL_OBJDIR + +# AC_LTDL_DLPREOPEN +# ----------------- +AC_DEFUN(AC_LTDL_DLPREOPEN, +[AC_REQUIRE([AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE])dnl +AC_CACHE_CHECK([whether libtool supports -dlopen/-dlpreopen], + libltdl_cv_preloaded_symbols, [dnl + if test -n "$global_symbol_pipe"; then + libltdl_cv_preloaded_symbols=yes + else + libltdl_cv_preloaded_symbols=no + fi +]) +if test x"$libltdl_cv_preloaded_symbols" = x"yes"; then + AC_DEFINE(HAVE_PRELOADED_SYMBOLS, 1, + [Define if libtool can extract symbol lists from object files. ]) +fi +])# AC_LTDL_DLPREOPEN + +# AC_LTDL_DLLIB +# ------------- +AC_DEFUN(AC_LTDL_DLLIB, +[LIBADD_DL= +AC_SUBST(LIBADD_DL) + +AC_CHECK_FUNC([shl_load], + [AC_DEFINE([HAVE_SHL_LOAD], [1], + [Define if you have the shl_load function.])], + [AC_CHECK_LIB([dld], [shl_load], + [AC_DEFINE([HAVE_SHL_LOAD], [1], + [Define if you have the shl_load function.]) + LIBADD_DL="$LIBADD_DL -ldld"], + [AC_CHECK_LIB([dl], [dlopen], + [AC_DEFINE([HAVE_LIBDL], [1], + [Define if you have the libdl library or equivalent.]) + LIBADD_DL="-ldl"], + [AC_TRY_LINK([#if HAVE_DLFCN_H +# include +#endif + ], + [dlopen(0, 0);], + [AC_DEFINE([HAVE_LIBDL], [1], + [Define if you have the libdl library or equivalent.])], + [AC_CHECK_LIB([svld], [dlopen], + [AC_DEFINE([HAVE_LIBDL], [1], + [Define if you have the libdl library or equivalent.]) + LIBADD_DL="-lsvld"], + [AC_CHECK_LIB([dld], [dld_link], + [AC_DEFINE([HAVE_DLD], [1], + [Define if you have the GNU dld library.]) + LIBADD_DL="$LIBADD_DL -ldld" + ]) + ]) + ]) + ]) + ]) +]) + +if test "x$ac_cv_func_dlopen" = xyes || test "x$ac_cv_lib_dl_dlopen" = xyes; then + LIBS_SAVE="$LIBS" + LIBS="$LIBS $LIBADD_DL" + AC_CHECK_FUNCS(dlerror) + LIBS="$LIBS_SAVE" +fi +])# AC_LTDL_DLLIB + +# AC_LTDL_SYMBOL_USCORE +# --------------------- +AC_DEFUN(AC_LTDL_SYMBOL_USCORE, +[dnl does the compiler prefix global symbols with an underscore? +AC_REQUIRE([AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE])dnl +AC_MSG_CHECKING([for _ prefix in compiled symbols]) +AC_CACHE_VAL(ac_cv_sys_symbol_underscore, +[ac_cv_sys_symbol_underscore=no +cat > conftest.$ac_ext < $ac_nlist) && test -s "$ac_nlist"; then + # See whether the symbols have a leading underscore. + if egrep '^. _nm_test_func' "$ac_nlist" >/dev/null; then + ac_cv_sys_symbol_underscore=yes + else + if egrep '^. nm_test_func ' "$ac_nlist" >/dev/null; then + : + else + echo "configure: cannot find nm_test_func in $ac_nlist" >&AC_FD_CC + fi + fi + else + echo "configure: cannot run $global_symbol_pipe" >&AC_FD_CC + fi +else + echo "configure: failed program was:" >&AC_FD_CC + cat conftest.c >&AC_FD_CC +fi +rm -rf conftest* +]) +AC_MSG_RESULT($ac_cv_sys_symbol_underscore) +])# AC_LTDL_SYMBOL_USCORE + + +# AC_LTDL_DLSYM_USCORE +# -------------------- +AC_DEFUN(AC_LTDL_DLSYM_USCORE, +[AC_REQUIRE([AC_LTDL_SYMBOL_USCORE])dnl +if test x"$ac_cv_sys_symbol_underscore" = xyes; then + if test x"$ac_cv_func_dlopen" = xyes || + test x"$ac_cv_lib_dl_dlopen" = xyes ; then + AC_CACHE_CHECK([whether we have to add an underscore for dlsym], + libltdl_cv_need_uscore, [dnl + libltdl_cv_need_uscore=unknown + save_LIBS="$LIBS" + LIBS="$LIBS $LIBADD_DL" + _LT_AC_TRY_DLOPEN_SELF( + libltdl_cv_need_uscore=no, libltdl_cv_need_uscore=yes, + [], libltdl_cv_need_uscore=cross) + LIBS="$save_LIBS" + ]) + fi +fi + +if test x"$libltdl_cv_need_uscore" = xyes; then + AC_DEFINE(NEED_USCORE, 1, + [Define if dlsym() requires a leading underscore in symbol names. ]) +fi +])# AC_LTDL_DLSYM_USCORE + + +# AC_CHECK_TYPES(TYPES, [ACTION-IF-FOUND], [ACTION-IF-NOT-FOUND], +# [INCLUDES]) +# --------------------------------------------------------------- +# This macro did not exist in Autoconf 2.13, which we do still support +ifdef([AC_CHECK_TYPES], [], +[define([AC_CHECK_TYPES], + [AC_CACHE_CHECK([for $1], ac_Type, + [AC_TRY_LINK([$4], + [if (($1 *) 0) + return 0; + if (sizeof ($1)) + return 0;], + [ac_Type=yes], + [ac_Type=no])]) + if test "x$ac_Type" = xyes; then + ifelse([$2], [], [:], [$2]) + else + ifelse([$3], [], [:], [$3]) + fi]) +])# AC_CHECK_TYPES + + +# AC_LTDL_FUNC_ARGZ +# ----------------- +AC_DEFUN([AC_LTDL_FUNC_ARGZ], +[AC_CHECK_HEADERS([argz.h]) + +AC_CHECK_TYPES([error_t], + [], + [AC_DEFINE([error_t], [int], + [Define to a type to use for \`error_t' if it is not otherwise available.])], + [#if HAVE_ARGZ_H +# include +#endif]) + +AC_CHECK_FUNCS([argz_append argz_create_sep argz_insert argz_next argz_stringify]) +])# AC_LTDL_FUNC_ARGZ diff --git a/sim/ucsim/libltdl/aclocal.m4 b/sim/ucsim/libltdl/aclocal.m4 new file mode 100644 index 0000000..7a1e6db --- /dev/null +++ b/sim/ucsim/libltdl/aclocal.m4 @@ -0,0 +1,4451 @@ +# aclocal.m4 generated automatically by aclocal 1.5 + +# Copyright 1996, 1997, 1998, 1999, 2000, 2001 +# Free Software Foundation, Inc. +# This file is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +# libtool.m4 - Configure libtool for the host system. -*-Shell-script-*- + +# serial 46 AC_PROG_LIBTOOL + +AC_DEFUN([AC_PROG_LIBTOOL], +[AC_REQUIRE([AC_LIBTOOL_SETUP])dnl + +# This can be used to rebuild libtool when needed +LIBTOOL_DEPS="$ac_aux_dir/ltmain.sh" + +# Always use our own libtool. +LIBTOOL='$(SHELL) $(top_builddir)/libtool' +AC_SUBST(LIBTOOL)dnl + +# Prevent multiple expansion +define([AC_PROG_LIBTOOL], []) +]) + +AC_DEFUN([AC_LIBTOOL_SETUP], +[AC_PREREQ(2.13)dnl +AC_REQUIRE([AC_ENABLE_SHARED])dnl +AC_REQUIRE([AC_ENABLE_STATIC])dnl +AC_REQUIRE([AC_ENABLE_FAST_INSTALL])dnl +AC_REQUIRE([AC_CANONICAL_HOST])dnl +AC_REQUIRE([AC_CANONICAL_BUILD])dnl +AC_REQUIRE([AC_PROG_CC])dnl +AC_REQUIRE([AC_PROG_LD])dnl +AC_REQUIRE([AC_PROG_LD_RELOAD_FLAG])dnl +AC_REQUIRE([AC_PROG_NM])dnl +AC_REQUIRE([AC_PROG_LN_S])dnl +AC_REQUIRE([AC_DEPLIBS_CHECK_METHOD])dnl +AC_REQUIRE([AC_OBJEXT])dnl +AC_REQUIRE([AC_EXEEXT])dnl +dnl + +_LT_AC_PROG_ECHO_BACKSLASH +# Only perform the check for file, if the check method requires it +case $deplibs_check_method in +file_magic*) + if test "$file_magic_cmd" = '$MAGIC_CMD'; then + AC_PATH_MAGIC + fi + ;; +esac + +AC_CHECK_TOOL(RANLIB, ranlib, :) +AC_CHECK_TOOL(STRIP, strip, :) + +ifdef([AC_PROVIDE_AC_LIBTOOL_DLOPEN], enable_dlopen=yes, enable_dlopen=no) +ifdef([AC_PROVIDE_AC_LIBTOOL_WIN32_DLL], +enable_win32_dll=yes, enable_win32_dll=no) + +AC_ARG_ENABLE(libtool-lock, + [ --disable-libtool-lock avoid locking (might break parallel builds)]) +test "x$enable_libtool_lock" != xno && enable_libtool_lock=yes + +# Some flags need to be propagated to the compiler or linker for good +# libtool support. +case $host in +*-*-irix6*) + # Find out which ABI we are using. + echo '[#]line __oline__ "configure"' > conftest.$ac_ext + if AC_TRY_EVAL(ac_compile); then + case `/usr/bin/file conftest.$ac_objext` in + *32-bit*) + LD="${LD-ld} -32" + ;; + *N32*) + LD="${LD-ld} -n32" + ;; + *64-bit*) + LD="${LD-ld} -64" + ;; + esac + fi + rm -rf conftest* + ;; + +*-*-sco3.2v5*) + # On SCO OpenServer 5, we need -belf to get full-featured binaries. + SAVE_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -belf" + AC_CACHE_CHECK([whether the C compiler needs -belf], lt_cv_cc_needs_belf, + [AC_LANG_SAVE + AC_LANG_C + AC_TRY_LINK([],[],[lt_cv_cc_needs_belf=yes],[lt_cv_cc_needs_belf=no]) + AC_LANG_RESTORE]) + if test x"$lt_cv_cc_needs_belf" != x"yes"; then + # this is probably gcc 2.8.0, egcs 1.0 or newer; no need for -belf + CFLAGS="$SAVE_CFLAGS" + fi + ;; + +ifdef([AC_PROVIDE_AC_LIBTOOL_WIN32_DLL], +[*-*-cygwin* | *-*-mingw* | *-*-pw32*) + AC_CHECK_TOOL(DLLTOOL, dlltool, false) + AC_CHECK_TOOL(AS, as, false) + AC_CHECK_TOOL(OBJDUMP, objdump, false) + + # recent cygwin and mingw systems supply a stub DllMain which the user + # can override, but on older systems we have to supply one + AC_CACHE_CHECK([if libtool should supply DllMain function], lt_cv_need_dllmain, + [AC_TRY_LINK([], + [extern int __attribute__((__stdcall__)) DllMain(void*, int, void*); + DllMain (0, 0, 0);], + [lt_cv_need_dllmain=no],[lt_cv_need_dllmain=yes])]) + + case $host/$CC in + *-*-cygwin*/gcc*-mno-cygwin*|*-*-mingw*) + # old mingw systems require "-dll" to link a DLL, while more recent ones + # require "-mdll" + SAVE_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -mdll" + AC_CACHE_CHECK([how to link DLLs], lt_cv_cc_dll_switch, + [AC_TRY_LINK([], [], [lt_cv_cc_dll_switch=-mdll],[lt_cv_cc_dll_switch=-dll])]) + CFLAGS="$SAVE_CFLAGS" ;; + *-*-cygwin* | *-*-pw32*) + # cygwin systems need to pass --dll to the linker, and not link + # crt.o which will require a WinMain@16 definition. + lt_cv_cc_dll_switch="-Wl,--dll -nostartfiles" ;; + esac + ;; + ]) +esac + +_LT_AC_LTCONFIG_HACK + +]) + +# AC_LIBTOOL_HEADER_ASSERT +# ------------------------ +AC_DEFUN([AC_LIBTOOL_HEADER_ASSERT], +[AC_CACHE_CHECK([whether $CC supports assert without backlinking], + [lt_cv_func_assert_works], + [case $host in + *-*-solaris*) + if test "$GCC" = yes && test "$with_gnu_ld" != yes; then + case `$CC --version 2>/dev/null` in + [[12]].*) lt_cv_func_assert_works=no ;; + *) lt_cv_func_assert_works=yes ;; + esac + fi + ;; + esac]) + +if test "x$lt_cv_func_assert_works" = xyes; then + AC_CHECK_HEADERS(assert.h) +fi +])# AC_LIBTOOL_HEADER_ASSERT + +# _LT_AC_CHECK_DLFCN +# -------------------- +AC_DEFUN([_LT_AC_CHECK_DLFCN], +[AC_CHECK_HEADERS(dlfcn.h) +])# _LT_AC_CHECK_DLFCN + +# AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE +# --------------------------------- +AC_DEFUN([AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE], +[AC_REQUIRE([AC_CANONICAL_HOST]) +AC_REQUIRE([AC_PROG_NM]) +AC_REQUIRE([AC_OBJEXT]) +# Check for command to grab the raw symbol name followed by C symbol from nm. +AC_MSG_CHECKING([command to parse $NM output]) +AC_CACHE_VAL([lt_cv_sys_global_symbol_pipe], [dnl + +# These are sane defaults that work on at least a few old systems. +# [They come from Ultrix. What could be older than Ultrix?!! ;)] + +# Character class describing NM global symbol codes. +symcode='[[BCDEGRST]]' + +# Regexp to match symbols that can be accessed directly from C. +sympat='\([[_A-Za-z]][[_A-Za-z0-9]]*\)' + +# Transform the above into a raw symbol and a C symbol. +symxfrm='\1 \2\3 \3' + +# Transform an extracted symbol line into a proper C declaration +lt_cv_global_symbol_to_cdecl="sed -n -e 's/^. .* \(.*\)$/extern char \1;/p'" + +# Transform an extracted symbol line into symbol name and symbol address +lt_cv_global_symbol_to_c_name_address="sed -n -e 's/^: \([[^ ]]*\) $/ {\\\"\1\\\", (lt_ptr) 0},/p' -e 's/^$symcode \([[^ ]]*\) \([[^ ]]*\)$/ {\"\2\", (lt_ptr) \&\2},/p'" + +# Define system-specific variables. +case $host_os in +aix*) + symcode='[[BCDT]]' + ;; +cygwin* | mingw* | pw32*) + symcode='[[ABCDGISTW]]' + ;; +hpux*) # Its linker distinguishes data from code symbols + lt_cv_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern char \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'" + lt_cv_global_symbol_to_c_name_address="sed -n -e 's/^: \([[^ ]]*\) $/ {\\\"\1\\\", (lt_ptr) 0},/p' -e 's/^$symcode* \([[^ ]]*\) \([[^ ]]*\)$/ {\"\2\", (lt_ptr) \&\2},/p'" + ;; +irix* | nonstopux*) + symcode='[[BCDEGRST]]' + ;; +solaris* | sysv5*) + symcode='[[BDT]]' + ;; +sysv4) + symcode='[[DFNSTU]]' + ;; +esac + +# Handle CRLF in mingw tool chain +opt_cr= +case $host_os in +mingw*) + opt_cr=`echo 'x\{0,1\}' | tr x '\015'` # option cr in regexp + ;; +esac + +# If we're using GNU nm, then use its standard symbol codes. +if $NM -V 2>&1 | egrep '(GNU|with BFD)' > /dev/null; then + symcode='[[ABCDGISTW]]' +fi + +# Try without a prefix undercore, then with it. +for ac_symprfx in "" "_"; do + + # Write the raw and C identifiers. +lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[[ ]]\($symcode$symcode*\)[[ ]][[ ]]*\($ac_symprfx\)$sympat$opt_cr$/$symxfrm/p'" + + # Check to see that the pipe works correctly. + pipe_works=no + rm -f conftest* + cat > conftest.$ac_ext < $nlist) && test -s "$nlist"; then + # Try sorting and uniquifying the output. + if sort "$nlist" | uniq > "$nlist"T; then + mv -f "$nlist"T "$nlist" + else + rm -f "$nlist"T + fi + + # Make sure that we snagged all the symbols we need. + if egrep ' nm_test_var$' "$nlist" >/dev/null; then + if egrep ' nm_test_func$' "$nlist" >/dev/null; then + cat < conftest.$ac_ext +#ifdef __cplusplus +extern "C" { +#endif + +EOF + # Now generate the symbol file. + eval "$lt_cv_global_symbol_to_cdecl"' < "$nlist" >> conftest.$ac_ext' + + cat <> conftest.$ac_ext +#if defined (__STDC__) && __STDC__ +# define lt_ptr void * +#else +# define lt_ptr char * +# define const +#endif + +/* The mapping between symbol names and symbols. */ +const struct { + const char *name; + lt_ptr address; +} +lt_preloaded_symbols[[]] = +{ +EOF + sed "s/^$symcode$symcode* \(.*\) \(.*\)$/ {\"\2\", (lt_ptr) \&\2},/" < "$nlist" >> conftest.$ac_ext + cat <<\EOF >> conftest.$ac_ext + {0, (lt_ptr) 0} +}; + +#ifdef __cplusplus +} +#endif +EOF + # Now try linking the two files. + mv conftest.$ac_objext conftstm.$ac_objext + save_LIBS="$LIBS" + save_CFLAGS="$CFLAGS" + LIBS="conftstm.$ac_objext" + CFLAGS="$CFLAGS$no_builtin_flag" + if AC_TRY_EVAL(ac_link) && test -s conftest; then + pipe_works=yes + fi + LIBS="$save_LIBS" + CFLAGS="$save_CFLAGS" + else + echo "cannot find nm_test_func in $nlist" >&AC_FD_CC + fi + else + echo "cannot find nm_test_var in $nlist" >&AC_FD_CC + fi + else + echo "cannot run $lt_cv_sys_global_symbol_pipe" >&AC_FD_CC + fi + else + echo "$progname: failed program was:" >&AC_FD_CC + cat conftest.$ac_ext >&5 + fi + rm -f conftest* conftst* + + # Do not use the global_symbol_pipe unless it works. + if test "$pipe_works" = yes; then + break + else + lt_cv_sys_global_symbol_pipe= + fi +done +]) +global_symbol_pipe="$lt_cv_sys_global_symbol_pipe" +if test -z "$lt_cv_sys_global_symbol_pipe"; then + global_symbol_to_cdecl= + global_symbol_to_c_name_address= +else + global_symbol_to_cdecl="$lt_cv_global_symbol_to_cdecl" + global_symbol_to_c_name_address="$lt_cv_global_symbol_to_c_name_address" +fi +if test -z "$global_symbol_pipe$global_symbol_to_cdec$global_symbol_to_c_name_address"; +then + AC_MSG_RESULT(failed) +else + AC_MSG_RESULT(ok) +fi +]) # AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE + +# _LT_AC_LIBTOOL_SYS_PATH_SEPARATOR +# --------------------------------- +AC_DEFUN([_LT_AC_LIBTOOL_SYS_PATH_SEPARATOR], +[# Find the correct PATH separator. Usually this is `:', but +# DJGPP uses `;' like DOS. +if test "X${PATH_SEPARATOR+set}" != Xset; then + UNAME=${UNAME-`uname 2>/dev/null`} + case X$UNAME in + *-DOS) lt_cv_sys_path_separator=';' ;; + *) lt_cv_sys_path_separator=':' ;; + esac + PATH_SEPARATOR=$lt_cv_sys_path_separator +fi +])# _LT_AC_LIBTOOL_SYS_PATH_SEPARATOR + +# _LT_AC_PROG_ECHO_BACKSLASH +# -------------------------- +# Add some code to the start of the generated configure script which +# will find an echo command which doesn't interpret backslashes. +AC_DEFUN([_LT_AC_PROG_ECHO_BACKSLASH], +[ifdef([AC_DIVERSION_NOTICE], [AC_DIVERT_PUSH(AC_DIVERSION_NOTICE)], + [AC_DIVERT_PUSH(NOTICE)]) +_LT_AC_LIBTOOL_SYS_PATH_SEPARATOR + +# Check that we are running under the correct shell. +SHELL=${CONFIG_SHELL-/bin/sh} + +case X$ECHO in +X*--fallback-echo) + # Remove one level of quotation (which was required for Make). + ECHO=`echo "$ECHO" | sed 's,\\\\\[$]\\[$]0,'[$]0','` + ;; +esac + +echo=${ECHO-echo} +if test "X[$]1" = X--no-reexec; then + # Discard the --no-reexec flag, and continue. + shift +elif test "X[$]1" = X--fallback-echo; then + # Avoid inline document here, it may be left over + : +elif test "X`($echo '\t') 2>/dev/null`" = 'X\t'; then + # Yippee, $echo works! + : +else + # Restart under the correct shell. + exec $SHELL "[$]0" --no-reexec ${1+"[$]@"} +fi + +if test "X[$]1" = X--fallback-echo; then + # used as fallback echo + shift + cat </dev/null && + echo_test_string="`eval $cmd`" && + (test "X$echo_test_string" = "X$echo_test_string") 2>/dev/null + then + break + fi + done +fi + +if test "X`($echo '\t') 2>/dev/null`" = 'X\t' && + echo_testing_string=`($echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + : +else + # The Solaris, AIX, and Digital Unix default echo programs unquote + # backslashes. This makes it impossible to quote backslashes using + # echo "$something" | sed 's/\\/\\\\/g' + # + # So, first we look for a working echo in the user's PATH. + + IFS="${IFS= }"; save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for dir in $PATH /usr/ucb; do + if (test -f $dir/echo || test -f $dir/echo$ac_exeext) && + test "X`($dir/echo '\t') 2>/dev/null`" = 'X\t' && + echo_testing_string=`($dir/echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + echo="$dir/echo" + break + fi + done + IFS="$save_ifs" + + if test "X$echo" = Xecho; then + # We didn't find a better echo, so look for alternatives. + if test "X`(print -r '\t') 2>/dev/null`" = 'X\t' && + echo_testing_string=`(print -r "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + # This shell has a builtin print -r that does the trick. + echo='print -r' + elif (test -f /bin/ksh || test -f /bin/ksh$ac_exeext) && + test "X$CONFIG_SHELL" != X/bin/ksh; then + # If we have ksh, try running configure again with it. + ORIGINAL_CONFIG_SHELL=${CONFIG_SHELL-/bin/sh} + export ORIGINAL_CONFIG_SHELL + CONFIG_SHELL=/bin/ksh + export CONFIG_SHELL + exec $CONFIG_SHELL "[$]0" --no-reexec ${1+"[$]@"} + else + # Try using printf. + echo='printf %s\n' + if test "X`($echo '\t') 2>/dev/null`" = 'X\t' && + echo_testing_string=`($echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + # Cool, printf works + : + elif echo_testing_string=`($ORIGINAL_CONFIG_SHELL "[$]0" --fallback-echo '\t') 2>/dev/null` && + test "X$echo_testing_string" = 'X\t' && + echo_testing_string=`($ORIGINAL_CONFIG_SHELL "[$]0" --fallback-echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + CONFIG_SHELL=$ORIGINAL_CONFIG_SHELL + export CONFIG_SHELL + SHELL="$CONFIG_SHELL" + export SHELL + echo="$CONFIG_SHELL [$]0 --fallback-echo" + elif echo_testing_string=`($CONFIG_SHELL "[$]0" --fallback-echo '\t') 2>/dev/null` && + test "X$echo_testing_string" = 'X\t' && + echo_testing_string=`($CONFIG_SHELL "[$]0" --fallback-echo "$echo_test_string") 2>/dev/null` && + test "X$echo_testing_string" = "X$echo_test_string"; then + echo="$CONFIG_SHELL [$]0 --fallback-echo" + else + # maybe with a smaller string... + prev=: + + for cmd in 'echo test' 'sed 2q "[$]0"' 'sed 10q "[$]0"' 'sed 20q "[$]0"' 'sed 50q "[$]0"'; do + if (test "X$echo_test_string" = "X`eval $cmd`") 2>/dev/null + then + break + fi + prev="$cmd" + done + + if test "$prev" != 'sed 50q "[$]0"'; then + echo_test_string=`eval $prev` + export echo_test_string + exec ${ORIGINAL_CONFIG_SHELL-${CONFIG_SHELL-/bin/sh}} "[$]0" ${1+"[$]@"} + else + # Oops. We lost completely, so just stick with echo. + echo=echo + fi + fi + fi + fi +fi +fi + +# Copy echo and quote the copy suitably for passing to libtool from +# the Makefile, instead of quoting the original, which is used later. +ECHO=$echo +if test "X$ECHO" = "X$CONFIG_SHELL [$]0 --fallback-echo"; then + ECHO="$CONFIG_SHELL \\\$\[$]0 --fallback-echo" +fi + +AC_SUBST(ECHO) +AC_DIVERT_POP +])# _LT_AC_PROG_ECHO_BACKSLASH + +# _LT_AC_TRY_DLOPEN_SELF (ACTION-IF-TRUE, ACTION-IF-TRUE-W-USCORE, +# ACTION-IF-FALSE, ACTION-IF-CROSS-COMPILING) +# ------------------------------------------------------------------ +AC_DEFUN([_LT_AC_TRY_DLOPEN_SELF], +[if test "$cross_compiling" = yes; then : + [$4] +else + AC_REQUIRE([_LT_AC_CHECK_DLFCN])dnl + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext < +#endif + +#include + +#ifdef RTLD_GLOBAL +# define LT_DLGLOBAL RTLD_GLOBAL +#else +# ifdef DL_GLOBAL +# define LT_DLGLOBAL DL_GLOBAL +# else +# define LT_DLGLOBAL 0 +# endif +#endif + +/* We may have to define LT_DLLAZY_OR_NOW in the command line if we + find out it does not work in some platform. */ +#ifndef LT_DLLAZY_OR_NOW +# ifdef RTLD_LAZY +# define LT_DLLAZY_OR_NOW RTLD_LAZY +# else +# ifdef DL_LAZY +# define LT_DLLAZY_OR_NOW DL_LAZY +# else +# ifdef RTLD_NOW +# define LT_DLLAZY_OR_NOW RTLD_NOW +# else +# ifdef DL_NOW +# define LT_DLLAZY_OR_NOW DL_NOW +# else +# define LT_DLLAZY_OR_NOW 0 +# endif +# endif +# endif +# endif +#endif + +#ifdef __cplusplus +extern "C" void exit (int); +#endif + +void fnord() { int i=42;} +int main () +{ + void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); + int status = $lt_dlunknown; + + if (self) + { + if (dlsym (self,"fnord")) status = $lt_dlno_uscore; + else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; + /* dlclose (self); */ + } + + exit (status); +}] +EOF + if AC_TRY_EVAL(ac_link) && test -s conftest${ac_exeext} 2>/dev/null; then + (./conftest; exit; ) 2>/dev/null + lt_status=$? + case x$lt_status in + x$lt_dlno_uscore) $1 ;; + x$lt_dlneed_uscore) $2 ;; + x$lt_unknown|x*) $3 ;; + esac + else : + # compilation failed + $3 + fi +fi +rm -fr conftest* +])# _LT_AC_TRY_DLOPEN_SELF + +# AC_LIBTOOL_DLOPEN_SELF +# ------------------- +AC_DEFUN([AC_LIBTOOL_DLOPEN_SELF], +[if test "x$enable_dlopen" != xyes; then + enable_dlopen=unknown + enable_dlopen_self=unknown + enable_dlopen_self_static=unknown +else + lt_cv_dlopen=no + lt_cv_dlopen_libs= + + case $host_os in + beos*) + lt_cv_dlopen="load_add_on" + lt_cv_dlopen_libs= + lt_cv_dlopen_self=yes + ;; + + cygwin* | mingw* | pw32*) + lt_cv_dlopen="LoadLibrary" + lt_cv_dlopen_libs= + ;; + + *) + AC_CHECK_FUNC([shl_load], + [lt_cv_dlopen="shl_load"], + [AC_CHECK_LIB([dld], [shl_load], + [lt_cv_dlopen="shl_load" lt_cv_dlopen_libs="-dld"], + [AC_CHECK_FUNC([dlopen], + [lt_cv_dlopen="dlopen"], + [AC_CHECK_LIB([dl], [dlopen], + [lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-ldl"], + [AC_CHECK_LIB([svld], [dlopen], + [lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-lsvld"], + [AC_CHECK_LIB([dld], [dld_link], + [lt_cv_dlopen="dld_link" lt_cv_dlopen_libs="-dld"]) + ]) + ]) + ]) + ]) + ]) + ;; + esac + + if test "x$lt_cv_dlopen" != xno; then + enable_dlopen=yes + else + enable_dlopen=no + fi + + case $lt_cv_dlopen in + dlopen) + save_CPPFLAGS="$CPPFLAGS" + AC_REQUIRE([_LT_AC_CHECK_DLFCN])dnl + test "x$ac_cv_header_dlfcn_h" = xyes && CPPFLAGS="$CPPFLAGS -DHAVE_DLFCN_H" + + save_LDFLAGS="$LDFLAGS" + eval LDFLAGS=\"\$LDFLAGS $export_dynamic_flag_spec\" + + save_LIBS="$LIBS" + LIBS="$lt_cv_dlopen_libs $LIBS" + + AC_CACHE_CHECK([whether a program can dlopen itself], + lt_cv_dlopen_self, [dnl + _LT_AC_TRY_DLOPEN_SELF( + lt_cv_dlopen_self=yes, lt_cv_dlopen_self=yes, + lt_cv_dlopen_self=no, lt_cv_dlopen_self=cross) + ]) + + if test "x$lt_cv_dlopen_self" = xyes; then + LDFLAGS="$LDFLAGS $link_static_flag" + AC_CACHE_CHECK([whether a statically linked program can dlopen itself], + lt_cv_dlopen_self_static, [dnl + _LT_AC_TRY_DLOPEN_SELF( + lt_cv_dlopen_self_static=yes, lt_cv_dlopen_self_static=yes, + lt_cv_dlopen_self_static=no, lt_cv_dlopen_self_static=cross) + ]) + fi + + CPPFLAGS="$save_CPPFLAGS" + LDFLAGS="$save_LDFLAGS" + LIBS="$save_LIBS" + ;; + esac + + case $lt_cv_dlopen_self in + yes|no) enable_dlopen_self=$lt_cv_dlopen_self ;; + *) enable_dlopen_self=unknown ;; + esac + + case $lt_cv_dlopen_self_static in + yes|no) enable_dlopen_self_static=$lt_cv_dlopen_self_static ;; + *) enable_dlopen_self_static=unknown ;; + esac +fi +])# AC_LIBTOOL_DLOPEN_SELF + +AC_DEFUN([_LT_AC_LTCONFIG_HACK], +[AC_REQUIRE([AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE])dnl +# Sed substitution that helps us do robust quoting. It backslashifies +# metacharacters that are still active within double-quoted strings. +Xsed='sed -e s/^X//' +sed_quote_subst='s/\([[\\"\\`$\\\\]]\)/\\\1/g' + +# Same as above, but do not quote variable references. +double_quote_subst='s/\([[\\"\\`\\\\]]\)/\\\1/g' + +# Sed substitution to delay expansion of an escaped shell variable in a +# double_quote_subst'ed string. +delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g' + +# Constants: +rm="rm -f" + +# Global variables: +default_ofile=libtool +can_build_shared=yes + +# All known linkers require a `.a' archive for static linking (except M$VC, +# which needs '.lib'). +libext=a +ltmain="$ac_aux_dir/ltmain.sh" +ofile="$default_ofile" +with_gnu_ld="$lt_cv_prog_gnu_ld" +need_locks="$enable_libtool_lock" + +old_CC="$CC" +old_CFLAGS="$CFLAGS" + +# Set sane defaults for various variables +test -z "$AR" && AR=ar +test -z "$AR_FLAGS" && AR_FLAGS=cru +test -z "$AS" && AS=as +test -z "$CC" && CC=cc +test -z "$DLLTOOL" && DLLTOOL=dlltool +test -z "$LD" && LD=ld +test -z "$LN_S" && LN_S="ln -s" +test -z "$MAGIC_CMD" && MAGIC_CMD=file +test -z "$NM" && NM=nm +test -z "$OBJDUMP" && OBJDUMP=objdump +test -z "$RANLIB" && RANLIB=: +test -z "$STRIP" && STRIP=: +test -z "$ac_objext" && ac_objext=o + +if test x"$host" != x"$build"; then + ac_tool_prefix=${host_alias}- +else + ac_tool_prefix= +fi + +# Transform linux* to *-*-linux-gnu*, to support old configure scripts. +case $host_os in +linux-gnu*) ;; +linux*) host=`echo $host | sed 's/^\(.*-.*-linux\)\(.*\)$/\1-gnu\2/'` +esac + +case $host_os in +aix3*) + # AIX sometimes has problems with the GCC collect2 program. For some + # reason, if we set the COLLECT_NAMES environment variable, the problems + # vanish in a puff of smoke. + if test "X${COLLECT_NAMES+set}" != Xset; then + COLLECT_NAMES= + export COLLECT_NAMES + fi + ;; +esac + +# Determine commands to create old-style static archives. +old_archive_cmds='$AR $AR_FLAGS $oldlib$oldobjs$old_deplibs' +old_postinstall_cmds='chmod 644 $oldlib' +old_postuninstall_cmds= + +if test -n "$RANLIB"; then + case $host_os in + openbsd*) + old_postinstall_cmds="\$RANLIB -t \$oldlib~$old_postinstall_cmds" + ;; + *) + old_postinstall_cmds="\$RANLIB \$oldlib~$old_postinstall_cmds" + ;; + esac + old_archive_cmds="$old_archive_cmds~\$RANLIB \$oldlib" +fi + +# Allow CC to be a program name with arguments. +set dummy $CC +compiler="[$]2" + +AC_MSG_CHECKING([for objdir]) +rm -f .libs 2>/dev/null +mkdir .libs 2>/dev/null +if test -d .libs; then + objdir=.libs +else + # MS-DOS does not allow filenames that begin with a dot. + objdir=_libs +fi +rmdir .libs 2>/dev/null +AC_MSG_RESULT($objdir) + + +AC_ARG_WITH(pic, +[ --with-pic try to use only PIC/non-PIC objects [default=use both]], +pic_mode="$withval", pic_mode=default) +test -z "$pic_mode" && pic_mode=default + +# We assume here that the value for lt_cv_prog_cc_pic will not be cached +# in isolation, and that seeing it set (from the cache) indicates that +# the associated values are set (in the cache) correctly too. +AC_MSG_CHECKING([for $compiler option to produce PIC]) +AC_CACHE_VAL(lt_cv_prog_cc_pic, +[ lt_cv_prog_cc_pic= + lt_cv_prog_cc_shlib= + lt_cv_prog_cc_wl= + lt_cv_prog_cc_static= + lt_cv_prog_cc_no_builtin= + lt_cv_prog_cc_can_build_shared=$can_build_shared + + if test "$GCC" = yes; then + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static='-static' + + case $host_os in + aix*) + # Below there is a dirty hack to force normal static linking with -ldl + # The problem is because libdl dynamically linked with both libc and + # libC (AIX C++ library), which obviously doesn't included in libraries + # list by gcc. This cause undefined symbols with -static flags. + # This hack allows C programs to be linked with "-static -ldl", but + # not sure about C++ programs. + lt_cv_prog_cc_static="$lt_cv_prog_cc_static ${lt_cv_prog_cc_wl}-lC" + ;; + amigaos*) + # FIXME: we need at least 68020 code to build shared libraries, but + # adding the `-m68020' flag to GCC prevents building anything better, + # like `-m68040'. + lt_cv_prog_cc_pic='-m68020 -resident32 -malways-restore-a4' + ;; + beos* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*) + # PIC is the default for these OSes. + ;; + darwin* | rhapsody*) + # PIC is the default on this platform + # Common symbols not allowed in MH_DYLIB files + lt_cv_prog_cc_pic='-fno-common' + ;; + cygwin* | mingw* | pw32* | os2*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + lt_cv_prog_cc_pic='-DDLL_EXPORT' + ;; + sysv4*MP*) + if test -d /usr/nec; then + lt_cv_prog_cc_pic=-Kconform_pic + fi + ;; + *) + lt_cv_prog_cc_pic='-fPIC' + ;; + esac + else + # PORTME Check for PIC flags for the system compiler. + case $host_os in + aix3* | aix4* | aix5*) + lt_cv_prog_cc_wl='-Wl,' + # All AIX code is PIC. + if test "$host_cpu" = ia64; then + # AIX 5 now supports IA64 processor + lt_cv_prog_cc_static='-Bstatic' + else + lt_cv_prog_cc_static='-bnso -bI:/lib/syscalls.exp' + fi + ;; + + hpux9* | hpux10* | hpux11*) + # Is there a better lt_cv_prog_cc_static that works with the bundled CC? + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static="${lt_cv_prog_cc_wl}-a ${lt_cv_prog_cc_wl}archive" + lt_cv_prog_cc_pic='+Z' + ;; + + irix5* | irix6* | nonstopux*) + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static='-non_shared' + # PIC (with -KPIC) is the default. + ;; + + cygwin* | mingw* | pw32* | os2*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + lt_cv_prog_cc_pic='-DDLL_EXPORT' + ;; + + newsos6) + lt_cv_prog_cc_pic='-KPIC' + lt_cv_prog_cc_static='-Bstatic' + ;; + + osf3* | osf4* | osf5*) + # All OSF/1 code is PIC. + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static='-non_shared' + ;; + + sco3.2v5*) + lt_cv_prog_cc_pic='-Kpic' + lt_cv_prog_cc_static='-dn' + lt_cv_prog_cc_shlib='-belf' + ;; + + solaris*) + lt_cv_prog_cc_pic='-KPIC' + lt_cv_prog_cc_static='-Bstatic' + lt_cv_prog_cc_wl='-Wl,' + ;; + + sunos4*) + lt_cv_prog_cc_pic='-PIC' + lt_cv_prog_cc_static='-Bstatic' + lt_cv_prog_cc_wl='-Qoption ld ' + ;; + + sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + lt_cv_prog_cc_pic='-KPIC' + lt_cv_prog_cc_static='-Bstatic' + if test "x$host_vendor" = xsni; then + lt_cv_prog_cc_wl='-LD' + else + lt_cv_prog_cc_wl='-Wl,' + fi + ;; + + uts4*) + lt_cv_prog_cc_pic='-pic' + lt_cv_prog_cc_static='-Bstatic' + ;; + + sysv4*MP*) + if test -d /usr/nec ;then + lt_cv_prog_cc_pic='-Kconform_pic' + lt_cv_prog_cc_static='-Bstatic' + fi + ;; + + *) + lt_cv_prog_cc_can_build_shared=no + ;; + esac + fi +]) +if test -z "$lt_cv_prog_cc_pic"; then + AC_MSG_RESULT([none]) +else + AC_MSG_RESULT([$lt_cv_prog_cc_pic]) + + # Check to make sure the pic_flag actually works. + AC_MSG_CHECKING([if $compiler PIC flag $lt_cv_prog_cc_pic works]) + AC_CACHE_VAL(lt_cv_prog_cc_pic_works, [dnl + save_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS $lt_cv_prog_cc_pic -DPIC" + AC_TRY_COMPILE([], [], [dnl + case $host_os in + hpux9* | hpux10* | hpux11*) + # On HP-UX, both CC and GCC only warn that PIC is supported... then + # they create non-PIC objects. So, if there were any warnings, we + # assume that PIC is not supported. + if test -s conftest.err; then + lt_cv_prog_cc_pic_works=no + else + lt_cv_prog_cc_pic_works=yes + fi + ;; + *) + lt_cv_prog_cc_pic_works=yes + ;; + esac + ], [dnl + lt_cv_prog_cc_pic_works=no + ]) + CFLAGS="$save_CFLAGS" + ]) + + if test "X$lt_cv_prog_cc_pic_works" = Xno; then + lt_cv_prog_cc_pic= + lt_cv_prog_cc_can_build_shared=no + else + lt_cv_prog_cc_pic=" $lt_cv_prog_cc_pic" + fi + + AC_MSG_RESULT([$lt_cv_prog_cc_pic_works]) +fi + +# Check for any special shared library compilation flags. +if test -n "$lt_cv_prog_cc_shlib"; then + AC_MSG_WARN([\`$CC' requires \`$lt_cv_prog_cc_shlib' to build shared libraries]) + if echo "$old_CC $old_CFLAGS " | egrep -e "[[ ]]$lt_cv_prog_cc_shlib[[ ]]" >/dev/null; then : + else + AC_MSG_WARN([add \`$lt_cv_prog_cc_shlib' to the CC or CFLAGS env variable and reconfigure]) + lt_cv_prog_cc_can_build_shared=no + fi +fi + +AC_MSG_CHECKING([if $compiler static flag $lt_cv_prog_cc_static works]) +AC_CACHE_VAL([lt_cv_prog_cc_static_works], [dnl + lt_cv_prog_cc_static_works=no + save_LDFLAGS="$LDFLAGS" + LDFLAGS="$LDFLAGS $lt_cv_prog_cc_static" + AC_TRY_LINK([], [], [lt_cv_prog_cc_static_works=yes]) + LDFLAGS="$save_LDFLAGS" +]) + +# Belt *and* braces to stop my trousers falling down: +test "X$lt_cv_prog_cc_static_works" = Xno && lt_cv_prog_cc_static= +AC_MSG_RESULT([$lt_cv_prog_cc_static_works]) + +pic_flag="$lt_cv_prog_cc_pic" +special_shlib_compile_flags="$lt_cv_prog_cc_shlib" +wl="$lt_cv_prog_cc_wl" +link_static_flag="$lt_cv_prog_cc_static" +no_builtin_flag="$lt_cv_prog_cc_no_builtin" +can_build_shared="$lt_cv_prog_cc_can_build_shared" + + +# Check to see if options -o and -c are simultaneously supported by compiler +AC_MSG_CHECKING([if $compiler supports -c -o file.$ac_objext]) +AC_CACHE_VAL([lt_cv_compiler_c_o], [ +$rm -r conftest 2>/dev/null +mkdir conftest +cd conftest +echo "int some_variable = 0;" > conftest.$ac_ext +mkdir out +# According to Tom Tromey, Ian Lance Taylor reported there are C compilers +# that will create temporary files in the current directory regardless of +# the output directory. Thus, making CWD read-only will cause this test +# to fail, enabling locking or at least warning the user not to do parallel +# builds. +chmod -w . +save_CFLAGS="$CFLAGS" +CFLAGS="$CFLAGS -o out/conftest2.$ac_objext" +compiler_c_o=no +if { (eval echo configure:__oline__: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>out/conftest.err; } && test -s out/conftest2.$ac_objext; then + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s out/conftest.err; then + lt_cv_compiler_c_o=no + else + lt_cv_compiler_c_o=yes + fi +else + # Append any errors to the config.log. + cat out/conftest.err 1>&AC_FD_CC + lt_cv_compiler_c_o=no +fi +CFLAGS="$save_CFLAGS" +chmod u+w . +$rm conftest* out/* +rmdir out +cd .. +rmdir conftest +$rm -r conftest 2>/dev/null +]) +compiler_c_o=$lt_cv_compiler_c_o +AC_MSG_RESULT([$compiler_c_o]) + +if test x"$compiler_c_o" = x"yes"; then + # Check to see if we can write to a .lo + AC_MSG_CHECKING([if $compiler supports -c -o file.lo]) + AC_CACHE_VAL([lt_cv_compiler_o_lo], [ + lt_cv_compiler_o_lo=no + save_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -c -o conftest.lo" + save_objext="$ac_objext" + ac_objext=lo + AC_TRY_COMPILE([], [int some_variable = 0;], [dnl + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s conftest.err; then + lt_cv_compiler_o_lo=no + else + lt_cv_compiler_o_lo=yes + fi + ]) + ac_objext="$save_objext" + CFLAGS="$save_CFLAGS" + ]) + compiler_o_lo=$lt_cv_compiler_o_lo + AC_MSG_RESULT([$compiler_o_lo]) +else + compiler_o_lo=no +fi + +# Check to see if we can do hard links to lock some files if needed +hard_links="nottested" +if test "$compiler_c_o" = no && test "$need_locks" != no; then + # do not overwrite the value of need_locks provided by the user + AC_MSG_CHECKING([if we can lock with hard links]) + hard_links=yes + $rm conftest* + ln conftest.a conftest.b 2>/dev/null && hard_links=no + touch conftest.a + ln conftest.a conftest.b 2>&5 || hard_links=no + ln conftest.a conftest.b 2>/dev/null && hard_links=no + AC_MSG_RESULT([$hard_links]) + if test "$hard_links" = no; then + AC_MSG_WARN([\`$CC' does not support \`-c -o', so \`make -j' may be unsafe]) + need_locks=warn + fi +else + need_locks=no +fi + +if test "$GCC" = yes; then + # Check to see if options -fno-rtti -fno-exceptions are supported by compiler + AC_MSG_CHECKING([if $compiler supports -fno-rtti -fno-exceptions]) + echo "int some_variable = 0;" > conftest.$ac_ext + save_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -fno-rtti -fno-exceptions -c conftest.$ac_ext" + compiler_rtti_exceptions=no + AC_TRY_COMPILE([], [int some_variable = 0;], [dnl + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s conftest.err; then + compiler_rtti_exceptions=no + else + compiler_rtti_exceptions=yes + fi + ]) + CFLAGS="$save_CFLAGS" + AC_MSG_RESULT([$compiler_rtti_exceptions]) + + if test "$compiler_rtti_exceptions" = "yes"; then + no_builtin_flag=' -fno-builtin -fno-rtti -fno-exceptions' + else + no_builtin_flag=' -fno-builtin' + fi +fi + +# See if the linker supports building shared libraries. +AC_MSG_CHECKING([whether the linker ($LD) supports shared libraries]) + +allow_undefined_flag= +no_undefined_flag= +need_lib_prefix=unknown +need_version=unknown +# when you set need_version to no, make sure it does not cause -set_version +# flags to be left without arguments +archive_cmds= +archive_expsym_cmds= +old_archive_from_new_cmds= +old_archive_from_expsyms_cmds= +export_dynamic_flag_spec= +whole_archive_flag_spec= +thread_safe_flag_spec= +hardcode_into_libs=no +hardcode_libdir_flag_spec= +hardcode_libdir_separator= +hardcode_direct=no +hardcode_minus_L=no +hardcode_shlibpath_var=unsupported +runpath_var= +link_all_deplibs=unknown +always_export_symbols=no +export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | sed '\''s/.* //'\'' | sort | uniq > $export_symbols' +# include_expsyms should be a list of space-separated symbols to be *always* +# included in the symbol list +include_expsyms= +# exclude_expsyms can be an egrep regular expression of symbols to exclude +# it will be wrapped by ` (' and `)$', so one must not match beginning or +# end of line. Example: `a|bc|.*d.*' will exclude the symbols `a' and `bc', +# as well as any symbol that contains `d'. +exclude_expsyms="_GLOBAL_OFFSET_TABLE_" +# Although _GLOBAL_OFFSET_TABLE_ is a valid symbol C name, most a.out +# platforms (ab)use it in PIC code, but their linkers get confused if +# the symbol is explicitly referenced. Since portable code cannot +# rely on this symbol name, it's probably fine to never include it in +# preloaded symbol tables. +extract_expsyms_cmds= + +case $host_os in +cygwin* | mingw* | pw32*) + # FIXME: the MSVC++ port hasn't been tested in a loooong time + # When not using gcc, we currently assume that we are using + # Microsoft Visual C++. + if test "$GCC" != yes; then + with_gnu_ld=no + fi + ;; +openbsd*) + with_gnu_ld=no + ;; +esac + +ld_shlibs=yes +if test "$with_gnu_ld" = yes; then + # If archive_cmds runs LD, not CC, wlarc should be empty + wlarc='${wl}' + + # See if GNU ld supports shared libraries. + case $host_os in + aix3* | aix4* | aix5*) + # On AIX, the GNU linker is very broken + # Note:Check GNU linker on AIX 5-IA64 when/if it becomes available. + ld_shlibs=no + cat <&2 + +*** Warning: the GNU linker, at least up to release 2.9.1, is reported +*** to be unable to reliably create shared libraries on AIX. +*** Therefore, libtool is disabling shared libraries support. If you +*** really care for shared libraries, you may want to modify your PATH +*** so that a non-GNU linker is found, and then restart. + +EOF + ;; + + amigaos*) + archive_cmds='$rm $output_objdir/a2ixlibrary.data~$echo "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$echo "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$echo "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$echo "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + + # Samuel A. Falvo II reports + # that the semantics of dynamic libraries on AmigaOS, at least up + # to version 4, is to share data among multiple programs linked + # with the same dynamic library. Since this doesn't match the + # behavior of shared libraries on other platforms, we can use + # them. + ld_shlibs=no + ;; + + beos*) + if $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + allow_undefined_flag=unsupported + # Joseph Beckenbach says some releases of gcc + # support --undefined. This deserves some investigation. FIXME + archive_cmds='$CC -nostart $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + else + ld_shlibs=no + fi + ;; + + cygwin* | mingw* | pw32*) + # hardcode_libdir_flag_spec is actually meaningless, as there is + # no search path for DLLs. + hardcode_libdir_flag_spec='-L$libdir' + allow_undefined_flag=unsupported + always_export_symbols=yes + + extract_expsyms_cmds='test -f $output_objdir/impgen.c || \ + sed -e "/^# \/\* impgen\.c starts here \*\//,/^# \/\* impgen.c ends here \*\// { s/^# //;s/^# *$//; p; }" -e d < $''0 > $output_objdir/impgen.c~ + test -f $output_objdir/impgen.exe || (cd $output_objdir && \ + if test "x$HOST_CC" != "x" ; then $HOST_CC -o impgen impgen.c ; \ + else $CC -o impgen impgen.c ; fi)~ + $output_objdir/impgen $dir/$soroot > $output_objdir/$soname-def' + + old_archive_from_expsyms_cmds='$DLLTOOL --as=$AS --dllname $soname --def $output_objdir/$soname-def --output-lib $output_objdir/$newlib' + + # cygwin and mingw dlls have different entry points and sets of symbols + # to exclude. + # FIXME: what about values for MSVC? + dll_entry=__cygwin_dll_entry@12 + dll_exclude_symbols=DllMain@12,_cygwin_dll_entry@12,_cygwin_noncygwin_dll_entry@12~ + case $host_os in + mingw*) + # mingw values + dll_entry=_DllMainCRTStartup@12 + dll_exclude_symbols=DllMain@12,DllMainCRTStartup@12,DllEntryPoint@12~ + ;; + esac + + # mingw and cygwin differ, and it's simplest to just exclude the union + # of the two symbol sets. + dll_exclude_symbols=DllMain@12,_cygwin_dll_entry@12,_cygwin_noncygwin_dll_entry@12,DllMainCRTStartup@12,DllEntryPoint@12 + + # recent cygwin and mingw systems supply a stub DllMain which the user + # can override, but on older systems we have to supply one (in ltdll.c) + if test "x$lt_cv_need_dllmain" = "xyes"; then + ltdll_obj='$output_objdir/$soname-ltdll.'"$ac_objext " + ltdll_cmds='test -f $output_objdir/$soname-ltdll.c || sed -e "/^# \/\* ltdll\.c starts here \*\//,/^# \/\* ltdll.c ends here \*\// { s/^# //; p; }" -e d < $''0 > $output_objdir/$soname-ltdll.c~ + test -f $output_objdir/$soname-ltdll.$ac_objext || (cd $output_objdir && $CC -c $soname-ltdll.c)~' + else + ltdll_obj= + ltdll_cmds= + fi + + # Extract the symbol export list from an `--export-all' def file, + # then regenerate the def file from the symbol export list, so that + # the compiled dll only exports the symbol export list. + # Be careful not to strip the DATA tag left be newer dlltools. + export_symbols_cmds="$ltdll_cmds"' + $DLLTOOL --export-all --exclude-symbols '$dll_exclude_symbols' --output-def $output_objdir/$soname-def '$ltdll_obj'$libobjs $convenience~ + sed -e "1,/EXPORTS/d" -e "s/ @ [[0-9]]*//" -e "s/ *;.*$//" < $output_objdir/$soname-def > $export_symbols' + + # If the export-symbols file already is a .def file (1st line + # is EXPORTS), use it as is. + # If DATA tags from a recent dlltool are present, honour them! + archive_expsym_cmds='if test "x`head -1 $export_symbols`" = xEXPORTS; then + cp $export_symbols $output_objdir/$soname-def; + else + echo EXPORTS > $output_objdir/$soname-def; + _lt_hint=1; + cat $export_symbols | while read symbol; do + set dummy \$symbol; + case \[$]# in + 2) echo " \[$]2 @ \$_lt_hint ; " >> $output_objdir/$soname-def;; + *) echo " \[$]2 @ \$_lt_hint \[$]3 ; " >> $output_objdir/$soname-def;; + esac; + _lt_hint=`expr 1 + \$_lt_hint`; + done; + fi~ + '"$ltdll_cmds"' + $CC -Wl,--base-file,$output_objdir/$soname-base '$lt_cv_cc_dll_switch' -Wl,-e,'$dll_entry' -o $output_objdir/$soname '$ltdll_obj'$libobjs $deplibs $compiler_flags~ + $DLLTOOL --as=$AS --dllname $soname --exclude-symbols '$dll_exclude_symbols' --def $output_objdir/$soname-def --base-file $output_objdir/$soname-base --output-exp $output_objdir/$soname-exp~ + $CC -Wl,--base-file,$output_objdir/$soname-base $output_objdir/$soname-exp '$lt_cv_cc_dll_switch' -Wl,-e,'$dll_entry' -o $output_objdir/$soname '$ltdll_obj'$libobjs $deplibs $compiler_flags~ + $DLLTOOL --as=$AS --dllname $soname --exclude-symbols '$dll_exclude_symbols' --def $output_objdir/$soname-def --base-file $output_objdir/$soname-base --output-exp $output_objdir/$soname-exp --output-lib $output_objdir/$libname.dll.a~ + $CC $output_objdir/$soname-exp '$lt_cv_cc_dll_switch' -Wl,-e,'$dll_entry' -o $output_objdir/$soname '$ltdll_obj'$libobjs $deplibs $compiler_flags' + ;; + + netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + archive_cmds='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib' + wlarc= + else + archive_cmds='$CC -shared -nodefaultlibs $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared -nodefaultlibs $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + fi + ;; + + solaris* | sysv5*) + if $LD -v 2>&1 | egrep 'BFD 2\.8' > /dev/null; then + ld_shlibs=no + cat <&2 + +*** Warning: The releases 2.8.* of the GNU linker cannot reliably +*** create shared libraries on Solaris systems. Therefore, libtool +*** is disabling shared libraries support. We urge you to upgrade GNU +*** binutils to release 2.9.1 or newer. Another option is to modify +*** your PATH or compiler configuration so that the native linker is +*** used, and then restart. + +EOF + elif $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + ld_shlibs=no + fi + ;; + + sunos4*) + archive_cmds='$LD -assert pure-text -Bshareable -o $lib $libobjs $deplibs $linker_flags' + wlarc= + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + *) + if $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + ld_shlibs=no + fi + ;; + esac + + if test "$ld_shlibs" = yes; then + runpath_var=LD_RUN_PATH + hardcode_libdir_flag_spec='${wl}--rpath ${wl}$libdir' + export_dynamic_flag_spec='${wl}--export-dynamic' + case $host_os in + cygwin* | mingw* | pw32*) + # dlltool doesn't understand --whole-archive et. al. + whole_archive_flag_spec= + ;; + *) + # ancient GNU ld didn't support --whole-archive et. al. + if $LD --help 2>&1 | egrep 'no-whole-archive' > /dev/null; then + whole_archive_flag_spec="$wlarc"'--whole-archive$convenience '"$wlarc"'--no-whole-archive' + else + whole_archive_flag_spec= + fi + ;; + esac + fi +else + # PORTME fill in a description of your system's linker (not GNU ld) + case $host_os in + aix3*) + allow_undefined_flag=unsupported + always_export_symbols=yes + archive_expsym_cmds='$LD -o $output_objdir/$soname $libobjs $deplibs $linker_flags -bE:$export_symbols -T512 -H512 -bM:SRE~$AR $AR_FLAGS $lib $output_objdir/$soname' + # Note: this linker hardcodes the directories in LIBPATH if there + # are no directories specified by -L. + hardcode_minus_L=yes + if test "$GCC" = yes && test -z "$link_static_flag"; then + # Neither direct hardcoding nor static linking is supported with a + # broken collect2. + hardcode_direct=unsupported + fi + ;; + + aix4* | aix5*) + if test "$host_cpu" = ia64; then + # On IA64, the linker does run time linking by default, so we don't + # have to do anything special. + aix_use_runtimelinking=no + exp_sym_flag='-Bexport' + no_entry_flag="" + else + aix_use_runtimelinking=no + + # Test if we are trying to use run time linking or normal + # AIX style linking. If -brtl is somewhere in LDFLAGS, we + # need to do runtime linking. + case $host_os in aix4.[[23]]|aix4.[[23]].*|aix5*) + for ld_flag in $LDFLAGS; do + if (test $ld_flag = "-brtl" || test $ld_flag = "-Wl,-brtl"); then + aix_use_runtimelinking=yes + break + fi + done + esac + + exp_sym_flag='-bexport' + no_entry_flag='-bnoentry' + fi + + # When large executables or shared objects are built, AIX ld can + # have problems creating the table of contents. If linking a library + # or program results in "error TOC overflow" add -mminimal-toc to + # CXXFLAGS/CFLAGS for g++/gcc. In the cases where that is not + # enough to fix the problem, add -Wl,-bbigtoc to LDFLAGS. + + hardcode_direct=yes + archive_cmds='' + hardcode_libdir_separator=':' + if test "$GCC" = yes; then + case $host_os in aix4.[[012]]|aix4.[[012]].*) + collect2name=`${CC} -print-prog-name=collect2` + if test -f "$collect2name" && \ + strings "$collect2name" | grep resolve_lib_name >/dev/null + then + # We have reworked collect2 + hardcode_direct=yes + else + # We have old collect2 + hardcode_direct=unsupported + # It fails to find uninstalled libraries when the uninstalled + # path is not listed in the libpath. Setting hardcode_minus_L + # to unsupported forces relinking + hardcode_minus_L=yes + hardcode_libdir_flag_spec='-L$libdir' + hardcode_libdir_separator= + fi + esac + + shared_flag='-shared' + else + # not using gcc + if test "$host_cpu" = ia64; then + shared_flag='${wl}-G' + else + if test "$aix_use_runtimelinking" = yes; then + shared_flag='${wl}-G' + else + shared_flag='${wl}-bM:SRE' + fi + fi + fi + + # It seems that -bexpall can do strange things, so it is better to + # generate a list of symbols to export. + always_export_symbols=yes + if test "$aix_use_runtimelinking" = yes; then + # Warning - without using the other runtime loading flags (-brtl), + # -berok will link without error, but may produce a broken library. + allow_undefined_flag='-berok' + hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:/usr/lib:/lib' + archive_expsym_cmds="\$CC"' -o $output_objdir/$soname $libobjs $deplibs $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then echo "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols $shared_flag" + else + if test "$host_cpu" = ia64; then + hardcode_libdir_flag_spec='${wl}-R $libdir:/usr/lib:/lib' + allow_undefined_flag="-z nodefs" + archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname ${wl}-h$soname $libobjs $deplibs $compiler_flags ${wl}${allow_undefined_flag} '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols" + else + hardcode_libdir_flag_spec='${wl}-bnolibpath ${wl}-blibpath:$libdir:/usr/lib:/lib' + # Warning - without using the other run time loading flags, + # -berok will link without error, but may produce a broken library. + allow_undefined_flag='${wl}-berok' + # This is a bit strange, but is similar to how AIX traditionally builds + # it's shared libraries. + archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs $compiler_flags ${allow_undefined_flag} '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols"' ~$AR -crlo $objdir/$libname$release.a $objdir/$soname' + fi + fi + ;; + + amigaos*) + archive_cmds='$rm $output_objdir/a2ixlibrary.data~$echo "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$echo "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$echo "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$echo "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + # see comment about different semantics on the GNU ld section + ld_shlibs=no + ;; + + cygwin* | mingw* | pw32*) + # When not using gcc, we currently assume that we are using + # Microsoft Visual C++. + # hardcode_libdir_flag_spec is actually meaningless, as there is + # no search path for DLLs. + hardcode_libdir_flag_spec=' ' + allow_undefined_flag=unsupported + # Tell ltmain to make .lib files, not .a files. + libext=lib + # FIXME: Setting linknames here is a bad hack. + archive_cmds='$CC -o $lib $libobjs $compiler_flags `echo "$deplibs" | sed -e '\''s/ -lc$//'\''` -link -dll~linknames=' + # The linker will automatically build a .lib file if we build a DLL. + old_archive_from_new_cmds='true' + # FIXME: Should let the user specify the lib program. + old_archive_cmds='lib /OUT:$oldlib$oldobjs$old_deplibs' + fix_srcfile_path='`cygpath -w "$srcfile"`' + ;; + + darwin* | rhapsody*) + case "$host_os" in + rhapsody* | darwin1.[[012]]) + allow_undefined_flag='-undefined suppress' + ;; + *) # Darwin 1.3 on + allow_undefined_flag='-flat_namespace -undefined suppress' + ;; + esac + # FIXME: Relying on posixy $() will cause problems for + # cross-compilation, but unfortunately the echo tests do not + # yet detect zsh echo's removal of \ escapes. Also zsh mangles + # `"' quotes if we put them in here... so don't! + archive_cmds='$nonopt $(test .$module = .yes && echo -bundle || echo -dynamiclib) $allow_undefined_flag -o $lib $libobjs $deplibs$linker_flags -install_name $rpath/$soname $verstring' + # We need to add '_' to the symbols in $export_symbols first + #archive_expsym_cmds="$archive_cmds"' && strip -s $export_symbols' + hardcode_direct=yes + hardcode_shlibpath_var=no + whole_archive_flag_spec='-all_load $convenience' + ;; + + freebsd1*) + ld_shlibs=no + ;; + + # FreeBSD 2.2.[012] allows us to include c++rt0.o to get C++ constructor + # support. Future versions do this automatically, but an explicit c++rt0.o + # does not break anything, and helps significantly (at the cost of a little + # extra space). + freebsd2.2*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags /usr/lib/c++rt0.o' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + # Unfortunately, older versions of FreeBSD 2 do not have this feature. + freebsd2*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_minus_L=yes + hardcode_shlibpath_var=no + ;; + + # FreeBSD 3 and greater uses gcc -shared to do shared libraries. + freebsd*) + archive_cmds='$CC -shared -o $lib $libobjs $deplibs $compiler_flags' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + hpux9* | hpux10* | hpux11*) + case $host_os in + hpux9*) archive_cmds='$rm $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib' ;; + *) archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags' ;; + esac + hardcode_libdir_flag_spec='${wl}+b ${wl}$libdir' + hardcode_libdir_separator=: + hardcode_direct=yes + hardcode_minus_L=yes # Not in the search PATH, but as the default + # location of the library. + export_dynamic_flag_spec='${wl}-E' + ;; + + irix5* | irix6* | nonstopux*) + if test "$GCC" = yes; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + else + archive_cmds='$LD -shared $libobjs $deplibs $linker_flags -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib' + fi + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + link_all_deplibs=yes + ;; + + netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' # a.out + else + archive_cmds='$LD -shared -o $lib $libobjs $deplibs $linker_flags' # ELF + fi + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + newsos6) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + hardcode_shlibpath_var=no + ;; + + openbsd*) + hardcode_direct=yes + hardcode_shlibpath_var=no + if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='${wl}-rpath,$libdir' + export_dynamic_flag_spec='${wl}-E' + else + case "$host_os" in + openbsd[[01]].* | openbsd2.[[0-7]] | openbsd2.[[0-7]].*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-R$libdir' + ;; + *) + archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='${wl}-rpath,$libdir' + ;; + esac + fi + ;; + + os2*) + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + allow_undefined_flag=unsupported + archive_cmds='$echo "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$echo "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~$echo DATA >> $output_objdir/$libname.def~$echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~$echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def' + old_archive_from_new_cmds='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def' + ;; + + osf3*) + if test "$GCC" = yes; then + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + else + allow_undefined_flag=' -expect_unresolved \*' + archive_cmds='$LD -shared${allow_undefined_flag} $libobjs $deplibs $linker_flags -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib' + fi + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + ;; + + osf4* | osf5*) # as osf3* with the addition of -msym flag + if test "$GCC" = yes; then + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + else + allow_undefined_flag=' -expect_unresolved \*' + archive_cmds='$LD -shared${allow_undefined_flag} $libobjs $deplibs $linker_flags -msym -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib' + archive_expsym_cmds='for i in `cat $export_symbols`; do printf "-exported_symbol " >> $lib.exp; echo "\$i" >> $lib.exp; done; echo "-hidden">> $lib.exp~ + $LD -shared${allow_undefined_flag} -input $lib.exp $linker_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${objdir}/so_locations -o $lib~$rm $lib.exp' + + #Both c and cxx compiler support -rpath directly + hardcode_libdir_flag_spec='-rpath $libdir' + fi + hardcode_libdir_separator=: + ;; + + sco3.2v5*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + runpath_var=LD_RUN_PATH + hardcode_runpath_var=yes + export_dynamic_flag_spec='${wl}-Bexport' + ;; + + solaris*) + # gcc --version < 3.0 without binutils cannot create self contained + # shared libraries reliably, requiring libgcc.a to resolve some of + # the object symbols generated in some cases. Libraries that use + # assert need libgcc.a to resolve __eprintf, for example. Linking + # a copy of libgcc.a into every shared library to guarantee resolving + # such symbols causes other problems: According to Tim Van Holder + # , C++ libraries end up with a separate + # (to the application) exception stack for one thing. + no_undefined_flag=' -z defs' + if test "$GCC" = yes; then + case `$CC --version 2>/dev/null` in + [[12]].*) + cat <&2 + +*** Warning: Releases of GCC earlier than version 3.0 cannot reliably +*** create self contained shared libraries on Solaris systems, without +*** introducing a dependency on libgcc.a. Therefore, libtool is disabling +*** -no-undefined support, which will at least allow you to build shared +*** libraries. However, you may find that when you link such libraries +*** into an application without using GCC, you have to manually add +*** \`gcc --print-libgcc-file-name\` to the link command. We urge you to +*** upgrade to a newer version of GCC. Another option is to rebuild your +*** current GCC to use the GNU linker from GNU binutils 2.9.1 or newer. + +EOF + no_undefined_flag= + ;; + esac + fi + # $CC -shared without GNU ld will not create a library from C++ + # object files and a static libstdc++, better avoid it by now + archive_cmds='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags' + archive_expsym_cmds='$echo "{ global:" > $lib.exp~cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~ + $LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$rm $lib.exp' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_shlibpath_var=no + case $host_os in + solaris2.[[0-5]] | solaris2.[[0-5]].*) ;; + *) # Supported since Solaris 2.6 (maybe 2.5.1?) + whole_archive_flag_spec='-z allextract$convenience -z defaultextract' ;; + esac + link_all_deplibs=yes + ;; + + sunos4*) + if test "x$host_vendor" = xsequent; then + # Use $CC to link under sequent, because it throws in some extra .o + # files that make .init and .fini sections work. + archive_cmds='$CC -G ${wl}-h $soname -o $lib $libobjs $deplibs $compiler_flags' + else + archive_cmds='$LD -assert pure-text -Bstatic -o $lib $libobjs $deplibs $linker_flags' + fi + hardcode_libdir_flag_spec='-L$libdir' + hardcode_direct=yes + hardcode_minus_L=yes + hardcode_shlibpath_var=no + ;; + + sysv4) + if test "x$host_vendor" = xsno; then + archive_cmds='$LD -G -Bsymbolic -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes # is this really true??? + else + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=no #Motorola manual says yes, but my tests say they lie + fi + runpath_var='LD_RUN_PATH' + hardcode_shlibpath_var=no + ;; + + sysv4.3*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + export_dynamic_flag_spec='-Bexport' + ;; + + sysv5*) + no_undefined_flag=' -z text' + # $CC -shared without GNU ld will not create a library from C++ + # object files and a static libstdc++, better avoid it by now + archive_cmds='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags' + archive_expsym_cmds='$echo "{ global:" > $lib.exp~cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~ + $LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$rm $lib.exp' + hardcode_libdir_flag_spec= + hardcode_shlibpath_var=no + runpath_var='LD_RUN_PATH' + ;; + + uts4*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_shlibpath_var=no + ;; + + dgux*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_shlibpath_var=no + ;; + + sysv4*MP*) + if test -d /usr/nec; then + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + runpath_var=LD_RUN_PATH + hardcode_runpath_var=yes + ld_shlibs=yes + fi + ;; + + sysv4.2uw2*) + archive_cmds='$LD -G -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_minus_L=no + hardcode_shlibpath_var=no + hardcode_runpath_var=yes + runpath_var=LD_RUN_PATH + ;; + + sysv5uw7* | unixware7*) + no_undefined_flag='${wl}-z ${wl}text' + if test "$GCC" = yes; then + archive_cmds='$CC -shared ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' + else + archive_cmds='$CC -G ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' + fi + runpath_var='LD_RUN_PATH' + hardcode_shlibpath_var=no + ;; + + *) + ld_shlibs=no + ;; + esac +fi +AC_MSG_RESULT([$ld_shlibs]) +test "$ld_shlibs" = no && can_build_shared=no + +# Check hardcoding attributes. +AC_MSG_CHECKING([how to hardcode library paths into programs]) +hardcode_action= +if test -n "$hardcode_libdir_flag_spec" || \ + test -n "$runpath_var"; then + + # We can hardcode non-existant directories. + if test "$hardcode_direct" != no && + # If the only mechanism to avoid hardcoding is shlibpath_var, we + # have to relink, otherwise we might link with an installed library + # when we should be linking with a yet-to-be-installed one + ## test "$hardcode_shlibpath_var" != no && + test "$hardcode_minus_L" != no; then + # Linking always hardcodes the temporary library directory. + hardcode_action=relink + else + # We can link without hardcoding, and we can hardcode nonexisting dirs. + hardcode_action=immediate + fi +else + # We cannot hardcode anything, or else we can only hardcode existing + # directories. + hardcode_action=unsupported +fi +AC_MSG_RESULT([$hardcode_action]) + +striplib= +old_striplib= +AC_MSG_CHECKING([whether stripping libraries is possible]) +if test -n "$STRIP" && $STRIP -V 2>&1 | grep "GNU strip" >/dev/null; then + test -z "$old_striplib" && old_striplib="$STRIP --strip-debug" + test -z "$striplib" && striplib="$STRIP --strip-unneeded" + AC_MSG_RESULT([yes]) +else + AC_MSG_RESULT([no]) +fi + +reload_cmds='$LD$reload_flag -o $output$reload_objs' +test -z "$deplibs_check_method" && deplibs_check_method=unknown + +# PORTME Fill in your ld.so characteristics +AC_MSG_CHECKING([dynamic linker characteristics]) +library_names_spec= +libname_spec='lib$name' +soname_spec= +postinstall_cmds= +postuninstall_cmds= +finish_cmds= +finish_eval= +shlibpath_var= +shlibpath_overrides_runpath=unknown +version_type=none +dynamic_linker="$host_os ld.so" +sys_lib_dlsearch_path_spec="/lib /usr/lib" +sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib" + +case $host_os in +aix3*) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix $libname.a' + shlibpath_var=LIBPATH + + # AIX has no versioning support, so we append a major version to the name. + soname_spec='${libname}${release}.so$major' + ;; + +aix4* | aix5*) + version_type=linux + if test "$host_cpu" = ia64; then + # AIX 5 supports IA64 + library_names_spec='${libname}${release}.so$major ${libname}${release}.so$versuffix $libname.so' + shlibpath_var=LD_LIBRARY_PATH + else + # With GCC up to 2.95.x, collect2 would create an import file + # for dependence libraries. The import file would start with + # the line `#! .'. This would cause the generated library to + # depend on `.', always an invalid library. This was fixed in + # development snapshots of GCC prior to 3.0. + case $host_os in + aix4 | aix4.[[01]] | aix4.[[01]].*) + if { echo '#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 97)' + echo ' yes ' + echo '#endif'; } | ${CC} -E - | grep yes > /dev/null; then + : + else + can_build_shared=no + fi + ;; + esac + # AIX (on Power*) has no versioning support, so currently we can + # not hardcode correct soname into executable. Probably we can + # add versioning support to collect2, so additional links can + # be useful in future. + if test "$aix_use_runtimelinking" = yes; then + # If using run time linking (on AIX 4.2 or later) use lib.so + # instead of lib.a to let people know that these are not + # typical AIX shared libraries. + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + else + # We preserve .a as extension for shared libraries through AIX4.2 + # and later when we are not doing run time linking. + library_names_spec='${libname}${release}.a $libname.a' + soname_spec='${libname}${release}.so$major' + fi + shlibpath_var=LIBPATH + fi + ;; + +amigaos*) + library_names_spec='$libname.ixlibrary $libname.a' + # Create ${libname}_ixlibrary.a entries in /sys/libs. + finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`$echo "X$lib" | $Xsed -e '\''s%^.*/\([[^/]]*\)\.ixlibrary$%\1%'\''`; test $rm /sys/libs/${libname}_ixlibrary.a; $show "(cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a)"; (cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a) || exit 1; done' + ;; + +beos*) + library_names_spec='${libname}.so' + dynamic_linker="$host_os ld.so" + shlibpath_var=LIBRARY_PATH + ;; + +bsdi4*) + version_type=linux + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + finish_cmds='PATH="\$PATH:/sbin" ldconfig $libdir' + shlibpath_var=LD_LIBRARY_PATH + sys_lib_search_path_spec="/shlib /usr/lib /usr/X11/lib /usr/contrib/lib /lib /usr/local/lib" + sys_lib_dlsearch_path_spec="/shlib /usr/lib /usr/local/lib" + export_dynamic_flag_spec=-rdynamic + # the default ld.so.conf also contains /usr/contrib/lib and + # /usr/X11R6/lib (/usr/X11 is a link to /usr/X11R6), but let us allow + # libtool to hard-code these into programs + ;; + +cygwin* | mingw* | pw32*) + version_type=windows + need_version=no + need_lib_prefix=no + case $GCC,$host_os in + yes,cygwin*) + library_names_spec='$libname.dll.a' + soname_spec='`echo ${libname} | sed -e 's/^lib/cyg/'``echo ${release} | sed -e 's/[[.]]/-/g'`${versuffix}.dll' + postinstall_cmds='dlpath=`bash 2>&1 -c '\''. $dir/${file}i;echo \$dlname'\''`~ + dldir=$destdir/`dirname \$dlpath`~ + test -d \$dldir || mkdir -p \$dldir~ + $install_prog .libs/$dlname \$dldir/$dlname' + postuninstall_cmds='dldll=`bash 2>&1 -c '\''. $file; echo \$dlname'\''`~ + dlpath=$dir/\$dldll~ + $rm \$dlpath' + ;; + yes,mingw*) + library_names_spec='${libname}`echo ${release} | sed -e 's/[[.]]/-/g'`${versuffix}.dll' + sys_lib_search_path_spec=`$CC -print-search-dirs | grep "^libraries:" | sed -e "s/^libraries://" -e "s/;/ /g"` + ;; + yes,pw32*) + library_names_spec='`echo ${libname} | sed -e 's/^lib/pw/'``echo ${release} | sed -e 's/[.]/-/g'`${versuffix}.dll' + ;; + *) + library_names_spec='${libname}`echo ${release} | sed -e 's/[[.]]/-/g'`${versuffix}.dll $libname.lib' + ;; + esac + dynamic_linker='Win32 ld.exe' + # FIXME: first we should search . and the directory the executable is in + shlibpath_var=PATH + ;; + +darwin* | rhapsody*) + dynamic_linker="$host_os dyld" + version_type=darwin + need_lib_prefix=no + need_version=no + # FIXME: Relying on posixy $() will cause problems for + # cross-compilation, but unfortunately the echo tests do not + # yet detect zsh echo's removal of \ escapes. + library_names_spec='${libname}${release}${versuffix}.$(test .$module = .yes && echo so || echo dylib) ${libname}${release}${major}.$(test .$module = .yes && echo so || echo dylib) ${libname}.$(test .$module = .yes && echo so || echo dylib)' + soname_spec='${libname}${release}${major}.$(test .$module = .yes && echo so || echo dylib)' + shlibpath_overrides_runpath=yes + shlibpath_var=DYLD_LIBRARY_PATH + ;; + +freebsd1*) + dynamic_linker=no + ;; + +freebsd*) + objformat=`test -x /usr/bin/objformat && /usr/bin/objformat || echo aout` + version_type=freebsd-$objformat + case $version_type in + freebsd-elf*) + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so $libname.so' + need_version=no + need_lib_prefix=no + ;; + freebsd-*) + library_names_spec='${libname}${release}.so$versuffix $libname.so$versuffix' + need_version=yes + ;; + esac + shlibpath_var=LD_LIBRARY_PATH + case $host_os in + freebsd2*) + shlibpath_overrides_runpath=yes + ;; + *) + shlibpath_overrides_runpath=no + hardcode_into_libs=yes + ;; + esac + ;; + +gnu*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so${major} ${libname}.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + hardcode_into_libs=yes + ;; + +hpux9* | hpux10* | hpux11*) + # Give a soname corresponding to the major version so that dld.sl refuses to + # link against other versions. + dynamic_linker="$host_os dld.sl" + version_type=sunos + need_lib_prefix=no + need_version=no + shlibpath_var=SHLIB_PATH + shlibpath_overrides_runpath=no # +s is required to enable SHLIB_PATH + library_names_spec='${libname}${release}.sl$versuffix ${libname}${release}.sl$major $libname.sl' + soname_spec='${libname}${release}.sl$major' + # HP-UX runs *really* slowly unless shared libraries are mode 555. + postinstall_cmds='chmod 555 $lib' + ;; + +irix5* | irix6* | nonstopux*) + case $host_os in + nonstopux*) version_type=nonstopux ;; + *) version_type=irix ;; + esac + need_lib_prefix=no + need_version=no + soname_spec='${libname}${release}.so$major' + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major ${libname}${release}.so $libname.so' + case $host_os in + irix5* | nonstopux*) + libsuff= shlibsuff= + ;; + *) + case $LD in # libtool.m4 will add one of these switches to LD + *-32|*"-32 ") libsuff= shlibsuff= libmagic=32-bit;; + *-n32|*"-n32 ") libsuff=32 shlibsuff=N32 libmagic=N32;; + *-64|*"-64 ") libsuff=64 shlibsuff=64 libmagic=64-bit;; + *) libsuff= shlibsuff= libmagic=never-match;; + esac + ;; + esac + shlibpath_var=LD_LIBRARY${shlibsuff}_PATH + shlibpath_overrides_runpath=no + sys_lib_search_path_spec="/usr/lib${libsuff} /lib${libsuff} /usr/local/lib${libsuff}" + sys_lib_dlsearch_path_spec="/usr/lib${libsuff} /lib${libsuff}" + ;; + +# No shared lib support for Linux oldld, aout, or coff. +linux-gnuoldld* | linux-gnuaout* | linux-gnucoff*) + dynamic_linker=no + ;; + +# This must be Linux ELF. +linux-gnu*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=no + # This implies no fast_install, which is unacceptable. + # Some rework will be needed to allow for fast_install + # before this can be enabled. + hardcode_into_libs=yes + + # We used to test for /lib/ld.so.1 and disable shared libraries on + # powerpc, because MkLinux only supported shared libraries with the + # GNU dynamic linker. Since this was broken with cross compilers, + # most powerpc-linux boxes support dynamic linking these days and + # people can always --disable-shared, the test was removed, and we + # assume the GNU/Linux dynamic linker is in use. + dynamic_linker='GNU/Linux ld.so' + ;; + +netbsd*) + version_type=sunos + need_lib_prefix=no + need_version=no + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + library_names_spec='${libname}${release}.so$versuffix ${libname}.so$versuffix' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' + dynamic_linker='NetBSD (a.out) ld.so' + else + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major ${libname}${release}.so ${libname}.so' + soname_spec='${libname}${release}.so$major' + dynamic_linker='NetBSD ld.elf_so' + fi + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + ;; + +newsos6) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + ;; + +openbsd*) + version_type=sunos + need_lib_prefix=no + need_version=no + if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + case "$host_os" in + openbsd2.[[89]] | openbsd2.[[89]].*) + shlibpath_overrides_runpath=no + ;; + *) + shlibpath_overrides_runpath=yes + ;; + esac + else + shlibpath_overrides_runpath=yes + fi + library_names_spec='${libname}${release}.so$versuffix ${libname}.so$versuffix' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' + shlibpath_var=LD_LIBRARY_PATH + ;; + +os2*) + libname_spec='$name' + need_lib_prefix=no + library_names_spec='$libname.dll $libname.a' + dynamic_linker='OS/2 ld.exe' + shlibpath_var=LIBPATH + ;; + +osf3* | osf4* | osf5*) + version_type=osf + need_version=no + soname_spec='${libname}${release}.so' + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so $libname.so' + shlibpath_var=LD_LIBRARY_PATH + sys_lib_search_path_spec="/usr/shlib /usr/ccs/lib /usr/lib/cmplrs/cc /usr/lib /usr/local/lib /var/shlib" + sys_lib_dlsearch_path_spec="$sys_lib_search_path_spec" + ;; + +sco3.2v5*) + version_type=osf + soname_spec='${libname}${release}.so$major' + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + shlibpath_var=LD_LIBRARY_PATH + ;; + +solaris*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + # ldd complains unless libraries are executable + postinstall_cmds='chmod +x $lib' + ;; + +sunos4*) + version_type=sunos + library_names_spec='${libname}${release}.so$versuffix ${libname}.so$versuffix' + finish_cmds='PATH="\$PATH:/usr/etc" ldconfig $libdir' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + if test "$with_gnu_ld" = yes; then + need_lib_prefix=no + fi + need_version=yes + ;; + +sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + case $host_vendor in + sni) + shlibpath_overrides_runpath=no + ;; + motorola) + need_lib_prefix=no + need_version=no + shlibpath_overrides_runpath=no + sys_lib_search_path_spec='/lib /usr/lib /usr/ccs/lib' + ;; + esac + ;; + +uts4*) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + ;; + +dgux*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + ;; + +sysv4*MP*) + if test -d /usr/nec ;then + version_type=linux + library_names_spec='$libname.so.$versuffix $libname.so.$major $libname.so' + soname_spec='$libname.so.$major' + shlibpath_var=LD_LIBRARY_PATH + fi + ;; + +*) + dynamic_linker=no + ;; +esac +AC_MSG_RESULT([$dynamic_linker]) +test "$dynamic_linker" = no && can_build_shared=no + +# Report the final consequences. +AC_MSG_CHECKING([if libtool supports shared libraries]) +AC_MSG_RESULT([$can_build_shared]) + +AC_MSG_CHECKING([whether to build shared libraries]) +test "$can_build_shared" = "no" && enable_shared=no + +# On AIX, shared libraries and static libraries use the same namespace, and +# are all built from PIC. +case "$host_os" in +aix3*) + test "$enable_shared" = yes && enable_static=no + if test -n "$RANLIB"; then + archive_cmds="$archive_cmds~\$RANLIB \$lib" + postinstall_cmds='$RANLIB $lib' + fi + ;; + +aix4*) + if test "$host_cpu" != ia64 && test "$aix_use_runtimelinking" = no ; then + test "$enable_shared" = yes && enable_static=no + fi + ;; +esac +AC_MSG_RESULT([$enable_shared]) + +AC_MSG_CHECKING([whether to build static libraries]) +# Make sure either enable_shared or enable_static is yes. +test "$enable_shared" = yes || enable_static=yes +AC_MSG_RESULT([$enable_static]) + +if test "$hardcode_action" = relink; then + # Fast installation is not supported + enable_fast_install=no +elif test "$shlibpath_overrides_runpath" = yes || + test "$enable_shared" = no; then + # Fast installation is not necessary + enable_fast_install=needless +fi + +variables_saved_for_relink="PATH $shlibpath_var $runpath_var" +if test "$GCC" = yes; then + variables_saved_for_relink="$variables_saved_for_relink GCC_EXEC_PREFIX COMPILER_PATH LIBRARY_PATH" +fi + +AC_LIBTOOL_DLOPEN_SELF + +if test "$enable_shared" = yes && test "$GCC" = yes; then + case $archive_cmds in + *'~'*) + # FIXME: we may have to deal with multi-command sequences. + ;; + '$CC '*) + # Test whether the compiler implicitly links with -lc since on some + # systems, -lgcc has to come before -lc. If gcc already passes -lc + # to ld, don't add -lc before -lgcc. + AC_MSG_CHECKING([whether -lc should be explicitly linked in]) + AC_CACHE_VAL([lt_cv_archive_cmds_need_lc], + [$rm conftest* + echo 'static int dummy;' > conftest.$ac_ext + + if AC_TRY_EVAL(ac_compile); then + soname=conftest + lib=conftest + libobjs=conftest.$ac_objext + deplibs= + wl=$lt_cv_prog_cc_wl + compiler_flags=-v + linker_flags=-v + verstring= + output_objdir=. + libname=conftest + save_allow_undefined_flag=$allow_undefined_flag + allow_undefined_flag= + if AC_TRY_EVAL(archive_cmds 2\>\&1 \| grep \" -lc \" \>/dev/null 2\>\&1) + then + lt_cv_archive_cmds_need_lc=no + else + lt_cv_archive_cmds_need_lc=yes + fi + allow_undefined_flag=$save_allow_undefined_flag + else + cat conftest.err 1>&5 + fi]) + AC_MSG_RESULT([$lt_cv_archive_cmds_need_lc]) + ;; + esac +fi +need_lc=${lt_cv_archive_cmds_need_lc-yes} + +# The second clause should only fire when bootstrapping the +# libtool distribution, otherwise you forgot to ship ltmain.sh +# with your package, and you will get complaints that there are +# no rules to generate ltmain.sh. +if test -f "$ltmain"; then + : +else + # If there is no Makefile yet, we rely on a make rule to execute + # `config.status --recheck' to rerun these tests and create the + # libtool script then. + test -f Makefile && make "$ltmain" +fi + +if test -f "$ltmain"; then + trap "$rm \"${ofile}T\"; exit 1" 1 2 15 + $rm -f "${ofile}T" + + echo creating $ofile + + # Now quote all the things that may contain metacharacters while being + # careful not to overquote the AC_SUBSTed values. We take copies of the + # variables and quote the copies for generation of the libtool script. + for var in echo old_CC old_CFLAGS \ + AR AR_FLAGS CC LD LN_S NM SHELL \ + reload_flag reload_cmds wl \ + pic_flag link_static_flag no_builtin_flag export_dynamic_flag_spec \ + thread_safe_flag_spec whole_archive_flag_spec libname_spec \ + library_names_spec soname_spec \ + RANLIB old_archive_cmds old_archive_from_new_cmds old_postinstall_cmds \ + old_postuninstall_cmds archive_cmds archive_expsym_cmds postinstall_cmds \ + postuninstall_cmds extract_expsyms_cmds old_archive_from_expsyms_cmds \ + old_striplib striplib file_magic_cmd export_symbols_cmds \ + deplibs_check_method allow_undefined_flag no_undefined_flag \ + finish_cmds finish_eval global_symbol_pipe global_symbol_to_cdecl \ + global_symbol_to_c_name_address \ + hardcode_libdir_flag_spec hardcode_libdir_separator \ + sys_lib_search_path_spec sys_lib_dlsearch_path_spec \ + compiler_c_o compiler_o_lo need_locks exclude_expsyms include_expsyms; do + + case $var in + reload_cmds | old_archive_cmds | old_archive_from_new_cmds | \ + old_postinstall_cmds | old_postuninstall_cmds | \ + export_symbols_cmds | archive_cmds | archive_expsym_cmds | \ + extract_expsyms_cmds | old_archive_from_expsyms_cmds | \ + postinstall_cmds | postuninstall_cmds | \ + finish_cmds | sys_lib_search_path_spec | sys_lib_dlsearch_path_spec) + # Double-quote double-evaled strings. + eval "lt_$var=\\\"\`\$echo \"X\$$var\" | \$Xsed -e \"\$double_quote_subst\" -e \"\$sed_quote_subst\" -e \"\$delay_variable_subst\"\`\\\"" + ;; + *) + eval "lt_$var=\\\"\`\$echo \"X\$$var\" | \$Xsed -e \"\$sed_quote_subst\"\`\\\"" + ;; + esac + done + + cat <<__EOF__ > "${ofile}T" +#! $SHELL + +# `$echo "$ofile" | sed 's%^.*/%%'` - Provide generalized library-building support services. +# Generated automatically by $PROGRAM (GNU $PACKAGE $VERSION$TIMESTAMP) +# NOTE: Changes made to this file will be lost: look at ltmain.sh. +# +# Copyright (C) 1996-2000 Free Software Foundation, Inc. +# Originally by Gordon Matzigkeit , 1996 +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + +# Sed that helps us avoid accidentally triggering echo(1) options like -n. +Xsed="sed -e s/^X//" + +# The HP-UX ksh and POSIX shell print the target directory to stdout +# if CDPATH is set. +if test "X\${CDPATH+set}" = Xset; then CDPATH=:; export CDPATH; fi + +# ### BEGIN LIBTOOL CONFIG + +# Libtool was configured on host `(hostname || uname -n) 2>/dev/null | sed 1q`: + +# Shell to use when invoking shell scripts. +SHELL=$lt_SHELL + +# Whether or not to build shared libraries. +build_libtool_libs=$enable_shared + +# Whether or not to build static libraries. +build_old_libs=$enable_static + +# Whether or not to add -lc for building shared libraries. +build_libtool_need_lc=$need_lc + +# Whether or not to optimize for fast installation. +fast_install=$enable_fast_install + +# The host system. +host_alias=$host_alias +host=$host + +# An echo program that does not interpret backslashes. +echo=$lt_echo + +# The archiver. +AR=$lt_AR +AR_FLAGS=$lt_AR_FLAGS + +# The default C compiler. +CC=$lt_CC + +# Is the compiler the GNU C compiler? +with_gcc=$GCC + +# The linker used to build libraries. +LD=$lt_LD + +# Whether we need hard or soft links. +LN_S=$lt_LN_S + +# A BSD-compatible nm program. +NM=$lt_NM + +# A symbol stripping program +STRIP=$STRIP + +# Used to examine libraries when file_magic_cmd begins "file" +MAGIC_CMD=$MAGIC_CMD + +# Used on cygwin: DLL creation program. +DLLTOOL="$DLLTOOL" + +# Used on cygwin: object dumper. +OBJDUMP="$OBJDUMP" + +# Used on cygwin: assembler. +AS="$AS" + +# The name of the directory that contains temporary libtool files. +objdir=$objdir + +# How to create reloadable object files. +reload_flag=$lt_reload_flag +reload_cmds=$lt_reload_cmds + +# How to pass a linker flag through the compiler. +wl=$lt_wl + +# Object file suffix (normally "o"). +objext="$ac_objext" + +# Old archive suffix (normally "a"). +libext="$libext" + +# Executable file suffix (normally ""). +exeext="$exeext" + +# Additional compiler flags for building library objects. +pic_flag=$lt_pic_flag +pic_mode=$pic_mode + +# Does compiler simultaneously support -c and -o options? +compiler_c_o=$lt_compiler_c_o + +# Can we write directly to a .lo ? +compiler_o_lo=$lt_compiler_o_lo + +# Must we lock files when doing compilation ? +need_locks=$lt_need_locks + +# Do we need the lib prefix for modules? +need_lib_prefix=$need_lib_prefix + +# Do we need a version for libraries? +need_version=$need_version + +# Whether dlopen is supported. +dlopen_support=$enable_dlopen + +# Whether dlopen of programs is supported. +dlopen_self=$enable_dlopen_self + +# Whether dlopen of statically linked programs is supported. +dlopen_self_static=$enable_dlopen_self_static + +# Compiler flag to prevent dynamic linking. +link_static_flag=$lt_link_static_flag + +# Compiler flag to turn off builtin functions. +no_builtin_flag=$lt_no_builtin_flag + +# Compiler flag to allow reflexive dlopens. +export_dynamic_flag_spec=$lt_export_dynamic_flag_spec + +# Compiler flag to generate shared objects directly from archives. +whole_archive_flag_spec=$lt_whole_archive_flag_spec + +# Compiler flag to generate thread-safe objects. +thread_safe_flag_spec=$lt_thread_safe_flag_spec + +# Library versioning type. +version_type=$version_type + +# Format of library name prefix. +libname_spec=$lt_libname_spec + +# List of archive names. First name is the real one, the rest are links. +# The last name is the one that the linker finds with -lNAME. +library_names_spec=$lt_library_names_spec + +# The coded name of the library, if different from the real name. +soname_spec=$lt_soname_spec + +# Commands used to build and install an old-style archive. +RANLIB=$lt_RANLIB +old_archive_cmds=$lt_old_archive_cmds +old_postinstall_cmds=$lt_old_postinstall_cmds +old_postuninstall_cmds=$lt_old_postuninstall_cmds + +# Create an old-style archive from a shared archive. +old_archive_from_new_cmds=$lt_old_archive_from_new_cmds + +# Create a temporary old-style archive to link instead of a shared archive. +old_archive_from_expsyms_cmds=$lt_old_archive_from_expsyms_cmds + +# Commands used to build and install a shared archive. +archive_cmds=$lt_archive_cmds +archive_expsym_cmds=$lt_archive_expsym_cmds +postinstall_cmds=$lt_postinstall_cmds +postuninstall_cmds=$lt_postuninstall_cmds + +# Commands to strip libraries. +old_striplib=$lt_old_striplib +striplib=$lt_striplib + +# Method to check whether dependent libraries are shared objects. +deplibs_check_method=$lt_deplibs_check_method + +# Command to use when deplibs_check_method == file_magic. +file_magic_cmd=$lt_file_magic_cmd + +# Flag that allows shared libraries with undefined symbols to be built. +allow_undefined_flag=$lt_allow_undefined_flag + +# Flag that forces no undefined symbols. +no_undefined_flag=$lt_no_undefined_flag + +# Commands used to finish a libtool library installation in a directory. +finish_cmds=$lt_finish_cmds + +# Same as above, but a single script fragment to be evaled but not shown. +finish_eval=$lt_finish_eval + +# Take the output of nm and produce a listing of raw symbols and C names. +global_symbol_pipe=$lt_global_symbol_pipe + +# Transform the output of nm in a proper C declaration +global_symbol_to_cdecl=$lt_global_symbol_to_cdecl + +# Transform the output of nm in a C name address pair +global_symbol_to_c_name_address=$lt_global_symbol_to_c_name_address + +# This is the shared library runtime path variable. +runpath_var=$runpath_var + +# This is the shared library path variable. +shlibpath_var=$shlibpath_var + +# Is shlibpath searched before the hard-coded library search path? +shlibpath_overrides_runpath=$shlibpath_overrides_runpath + +# How to hardcode a shared library path into an executable. +hardcode_action=$hardcode_action + +# Whether we should hardcode library paths into libraries. +hardcode_into_libs=$hardcode_into_libs + +# Flag to hardcode \$libdir into a binary during linking. +# This must work even if \$libdir does not exist. +hardcode_libdir_flag_spec=$lt_hardcode_libdir_flag_spec + +# Whether we need a single -rpath flag with a separated argument. +hardcode_libdir_separator=$lt_hardcode_libdir_separator + +# Set to yes if using DIR/libNAME.so during linking hardcodes DIR into the +# resulting binary. +hardcode_direct=$hardcode_direct + +# Set to yes if using the -LDIR flag during linking hardcodes DIR into the +# resulting binary. +hardcode_minus_L=$hardcode_minus_L + +# Set to yes if using SHLIBPATH_VAR=DIR during linking hardcodes DIR into +# the resulting binary. +hardcode_shlibpath_var=$hardcode_shlibpath_var + +# Variables whose values should be saved in libtool wrapper scripts and +# restored at relink time. +variables_saved_for_relink="$variables_saved_for_relink" + +# Whether libtool must link a program against all its dependency libraries. +link_all_deplibs=$link_all_deplibs + +# Compile-time system search path for libraries +sys_lib_search_path_spec=$lt_sys_lib_search_path_spec + +# Run-time system search path for libraries +sys_lib_dlsearch_path_spec=$lt_sys_lib_dlsearch_path_spec + +# Fix the shell variable \$srcfile for the compiler. +fix_srcfile_path="$fix_srcfile_path" + +# Set to yes if exported symbols are required. +always_export_symbols=$always_export_symbols + +# The commands to list exported symbols. +export_symbols_cmds=$lt_export_symbols_cmds + +# The commands to extract the exported symbol list from a shared archive. +extract_expsyms_cmds=$lt_extract_expsyms_cmds + +# Symbols that should not be listed in the preloaded symbols. +exclude_expsyms=$lt_exclude_expsyms + +# Symbols that must always be exported. +include_expsyms=$lt_include_expsyms + +# ### END LIBTOOL CONFIG + +__EOF__ + + case $host_os in + aix3*) + cat <<\EOF >> "${ofile}T" + +# AIX sometimes has problems with the GCC collect2 program. For some +# reason, if we set the COLLECT_NAMES environment variable, the problems +# vanish in a puff of smoke. +if test "X${COLLECT_NAMES+set}" != Xset; then + COLLECT_NAMES= + export COLLECT_NAMES +fi +EOF + ;; + esac + + case $host_os in + cygwin* | mingw* | pw32* | os2*) + cat <<'EOF' >> "${ofile}T" + # This is a source program that is used to create dlls on Windows + # Don't remove nor modify the starting and closing comments +# /* ltdll.c starts here */ +# #define WIN32_LEAN_AND_MEAN +# #include +# #undef WIN32_LEAN_AND_MEAN +# #include +# +# #ifndef __CYGWIN__ +# # ifdef __CYGWIN32__ +# # define __CYGWIN__ __CYGWIN32__ +# # endif +# #endif +# +# #ifdef __cplusplus +# extern "C" { +# #endif +# BOOL APIENTRY DllMain (HINSTANCE hInst, DWORD reason, LPVOID reserved); +# #ifdef __cplusplus +# } +# #endif +# +# #ifdef __CYGWIN__ +# #include +# DECLARE_CYGWIN_DLL( DllMain ); +# #endif +# HINSTANCE __hDllInstance_base; +# +# BOOL APIENTRY +# DllMain (HINSTANCE hInst, DWORD reason, LPVOID reserved) +# { +# __hDllInstance_base = hInst; +# return TRUE; +# } +# /* ltdll.c ends here */ + # This is a source program that is used to create import libraries + # on Windows for dlls which lack them. Don't remove nor modify the + # starting and closing comments +# /* impgen.c starts here */ +# /* Copyright (C) 1999-2000 Free Software Foundation, Inc. +# +# This file is part of GNU libtool. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# */ +# +# #include /* for printf() */ +# #include /* for open(), lseek(), read() */ +# #include /* for O_RDONLY, O_BINARY */ +# #include /* for strdup() */ +# +# /* O_BINARY isn't required (or even defined sometimes) under Unix */ +# #ifndef O_BINARY +# #define O_BINARY 0 +# #endif +# +# static unsigned int +# pe_get16 (fd, offset) +# int fd; +# int offset; +# { +# unsigned char b[2]; +# lseek (fd, offset, SEEK_SET); +# read (fd, b, 2); +# return b[0] + (b[1]<<8); +# } +# +# static unsigned int +# pe_get32 (fd, offset) +# int fd; +# int offset; +# { +# unsigned char b[4]; +# lseek (fd, offset, SEEK_SET); +# read (fd, b, 4); +# return b[0] + (b[1]<<8) + (b[2]<<16) + (b[3]<<24); +# } +# +# static unsigned int +# pe_as32 (ptr) +# void *ptr; +# { +# unsigned char *b = ptr; +# return b[0] + (b[1]<<8) + (b[2]<<16) + (b[3]<<24); +# } +# +# int +# main (argc, argv) +# int argc; +# char *argv[]; +# { +# int dll; +# unsigned long pe_header_offset, opthdr_ofs, num_entries, i; +# unsigned long export_rva, export_size, nsections, secptr, expptr; +# unsigned long name_rvas, nexp; +# unsigned char *expdata, *erva; +# char *filename, *dll_name; +# +# filename = argv[1]; +# +# dll = open(filename, O_RDONLY|O_BINARY); +# if (dll < 1) +# return 1; +# +# dll_name = filename; +# +# for (i=0; filename[i]; i++) +# if (filename[i] == '/' || filename[i] == '\\' || filename[i] == ':') +# dll_name = filename + i +1; +# +# pe_header_offset = pe_get32 (dll, 0x3c); +# opthdr_ofs = pe_header_offset + 4 + 20; +# num_entries = pe_get32 (dll, opthdr_ofs + 92); +# +# if (num_entries < 1) /* no exports */ +# return 1; +# +# export_rva = pe_get32 (dll, opthdr_ofs + 96); +# export_size = pe_get32 (dll, opthdr_ofs + 100); +# nsections = pe_get16 (dll, pe_header_offset + 4 +2); +# secptr = (pe_header_offset + 4 + 20 + +# pe_get16 (dll, pe_header_offset + 4 + 16)); +# +# expptr = 0; +# for (i = 0; i < nsections; i++) +# { +# char sname[8]; +# unsigned long secptr1 = secptr + 40 * i; +# unsigned long vaddr = pe_get32 (dll, secptr1 + 12); +# unsigned long vsize = pe_get32 (dll, secptr1 + 16); +# unsigned long fptr = pe_get32 (dll, secptr1 + 20); +# lseek(dll, secptr1, SEEK_SET); +# read(dll, sname, 8); +# if (vaddr <= export_rva && vaddr+vsize > export_rva) +# { +# expptr = fptr + (export_rva - vaddr); +# if (export_rva + export_size > vaddr + vsize) +# export_size = vsize - (export_rva - vaddr); +# break; +# } +# } +# +# expdata = (unsigned char*)malloc(export_size); +# lseek (dll, expptr, SEEK_SET); +# read (dll, expdata, export_size); +# erva = expdata - export_rva; +# +# nexp = pe_as32 (expdata+24); +# name_rvas = pe_as32 (expdata+32); +# +# printf ("EXPORTS\n"); +# for (i = 0; i> "${ofile}T" || (rm -f "${ofile}T"; exit 1) + + mv -f "${ofile}T" "$ofile" || \ + (rm -f "$ofile" && cp "${ofile}T" "$ofile" && rm -f "${ofile}T") + chmod +x "$ofile" +fi + +])# _LT_AC_LTCONFIG_HACK + +# AC_LIBTOOL_DLOPEN - enable checks for dlopen support +AC_DEFUN([AC_LIBTOOL_DLOPEN], [AC_BEFORE([$0],[AC_LIBTOOL_SETUP])]) + +# AC_LIBTOOL_WIN32_DLL - declare package support for building win32 dll's +AC_DEFUN([AC_LIBTOOL_WIN32_DLL], [AC_BEFORE([$0], [AC_LIBTOOL_SETUP])]) + +# AC_ENABLE_SHARED - implement the --enable-shared flag +# Usage: AC_ENABLE_SHARED[(DEFAULT)] +# Where DEFAULT is either `yes' or `no'. If omitted, it defaults to +# `yes'. +AC_DEFUN([AC_ENABLE_SHARED], +[define([AC_ENABLE_SHARED_DEFAULT], ifelse($1, no, no, yes))dnl +AC_ARG_ENABLE(shared, +changequote(<<, >>)dnl +<< --enable-shared[=PKGS] build shared libraries [default=>>AC_ENABLE_SHARED_DEFAULT], +changequote([, ])dnl +[p=${PACKAGE-default} +case $enableval in +yes) enable_shared=yes ;; +no) enable_shared=no ;; +*) + enable_shared=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_shared=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac], +enable_shared=AC_ENABLE_SHARED_DEFAULT)dnl +]) + +# AC_DISABLE_SHARED - set the default shared flag to --disable-shared +AC_DEFUN([AC_DISABLE_SHARED], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl +AC_ENABLE_SHARED(no)]) + +# AC_ENABLE_STATIC - implement the --enable-static flag +# Usage: AC_ENABLE_STATIC[(DEFAULT)] +# Where DEFAULT is either `yes' or `no'. If omitted, it defaults to +# `yes'. +AC_DEFUN([AC_ENABLE_STATIC], +[define([AC_ENABLE_STATIC_DEFAULT], ifelse($1, no, no, yes))dnl +AC_ARG_ENABLE(static, +changequote(<<, >>)dnl +<< --enable-static[=PKGS] build static libraries [default=>>AC_ENABLE_STATIC_DEFAULT], +changequote([, ])dnl +[p=${PACKAGE-default} +case $enableval in +yes) enable_static=yes ;; +no) enable_static=no ;; +*) + enable_static=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_static=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac], +enable_static=AC_ENABLE_STATIC_DEFAULT)dnl +]) + +# AC_DISABLE_STATIC - set the default static flag to --disable-static +AC_DEFUN([AC_DISABLE_STATIC], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl +AC_ENABLE_STATIC(no)]) + + +# AC_ENABLE_FAST_INSTALL - implement the --enable-fast-install flag +# Usage: AC_ENABLE_FAST_INSTALL[(DEFAULT)] +# Where DEFAULT is either `yes' or `no'. If omitted, it defaults to +# `yes'. +AC_DEFUN([AC_ENABLE_FAST_INSTALL], +[define([AC_ENABLE_FAST_INSTALL_DEFAULT], ifelse($1, no, no, yes))dnl +AC_ARG_ENABLE(fast-install, +changequote(<<, >>)dnl +<< --enable-fast-install[=PKGS] optimize for fast installation [default=>>AC_ENABLE_FAST_INSTALL_DEFAULT], +changequote([, ])dnl +[p=${PACKAGE-default} +case $enableval in +yes) enable_fast_install=yes ;; +no) enable_fast_install=no ;; +*) + enable_fast_install=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_fast_install=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac], +enable_fast_install=AC_ENABLE_FAST_INSTALL_DEFAULT)dnl +]) + +# AC_DISABLE_FAST_INSTALL - set the default to --disable-fast-install +AC_DEFUN([AC_DISABLE_FAST_INSTALL], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl +AC_ENABLE_FAST_INSTALL(no)]) + +# AC_LIBTOOL_PICMODE - implement the --with-pic flag +# Usage: AC_LIBTOOL_PICMODE[(MODE)] +# Where MODE is either `yes' or `no'. If omitted, it defaults to +# `both'. +AC_DEFUN([AC_LIBTOOL_PICMODE], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl +pic_mode=ifelse($#,1,$1,default)]) + + +# AC_PATH_TOOL_PREFIX - find a file program which can recognise shared library +AC_DEFUN([AC_PATH_TOOL_PREFIX], +[AC_MSG_CHECKING([for $1]) +AC_CACHE_VAL(lt_cv_path_MAGIC_CMD, +[case $MAGIC_CMD in + /*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a path. + ;; + ?:/*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a dos path. + ;; + *) + ac_save_MAGIC_CMD="$MAGIC_CMD" + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" +dnl $ac_dummy forces splitting on constant user-supplied paths. +dnl POSIX.2 word splitting is done only on the output of word expansions, +dnl not every word. This closes a longstanding sh security hole. + ac_dummy="ifelse([$2], , $PATH, [$2])" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$1; then + lt_cv_path_MAGIC_CMD="$ac_dir/$1" + if test -n "$file_magic_test_file"; then + case $deplibs_check_method in + "file_magic "*) + file_magic_regex="`expr \"$deplibs_check_method\" : \"file_magic \(.*\)\"`" + MAGIC_CMD="$lt_cv_path_MAGIC_CMD" + if eval $file_magic_cmd \$file_magic_test_file 2> /dev/null | + egrep "$file_magic_regex" > /dev/null; then + : + else + cat <&2 + +*** Warning: the command libtool uses to detect shared libraries, +*** $file_magic_cmd, produces output that libtool cannot recognize. +*** The result is that libtool may fail to recognize shared libraries +*** as such. This will affect the creation of libtool libraries that +*** depend on shared libraries, but programs linked with such libtool +*** libraries will work regardless of this problem. Nevertheless, you +*** may want to report the problem to your system manager and/or to +*** bug-libtool@gnu.org + +EOF + fi ;; + esac + fi + break + fi + done + IFS="$ac_save_ifs" + MAGIC_CMD="$ac_save_MAGIC_CMD" + ;; +esac]) +MAGIC_CMD="$lt_cv_path_MAGIC_CMD" +if test -n "$MAGIC_CMD"; then + AC_MSG_RESULT($MAGIC_CMD) +else + AC_MSG_RESULT(no) +fi +]) + + +# AC_PATH_MAGIC - find a file program which can recognise a shared library +AC_DEFUN([AC_PATH_MAGIC], +[AC_REQUIRE([AC_CHECK_TOOL_PREFIX])dnl +AC_PATH_TOOL_PREFIX(${ac_tool_prefix}file, /usr/bin:$PATH) +if test -z "$lt_cv_path_MAGIC_CMD"; then + if test -n "$ac_tool_prefix"; then + AC_PATH_TOOL_PREFIX(file, /usr/bin:$PATH) + else + MAGIC_CMD=: + fi +fi +]) + + +# AC_PROG_LD - find the path to the GNU or non-GNU linker +AC_DEFUN([AC_PROG_LD], +[AC_ARG_WITH(gnu-ld, +[ --with-gnu-ld assume the C compiler uses GNU ld [default=no]], +test "$withval" = no || with_gnu_ld=yes, with_gnu_ld=no) +AC_REQUIRE([AC_PROG_CC])dnl +AC_REQUIRE([AC_CANONICAL_HOST])dnl +AC_REQUIRE([AC_CANONICAL_BUILD])dnl +AC_REQUIRE([_LT_AC_LIBTOOL_SYS_PATH_SEPARATOR])dnl +ac_prog=ld +if test "$GCC" = yes; then + # Check if gcc -print-prog-name=ld gives a path. + AC_MSG_CHECKING([for ld used by GCC]) + case $host in + *-*-mingw*) + # gcc leaves a trailing carriage return which upsets mingw + ac_prog=`($CC -print-prog-name=ld) 2>&5 | tr -d '\015'` ;; + *) + ac_prog=`($CC -print-prog-name=ld) 2>&5` ;; + esac + case $ac_prog in + # Accept absolute paths. + [[\\/]]* | [[A-Za-z]]:[[\\/]]*) + re_direlt='/[[^/]][[^/]]*/\.\./' + # Canonicalize the path of ld + ac_prog=`echo $ac_prog| sed 's%\\\\%/%g'` + while echo $ac_prog | grep "$re_direlt" > /dev/null 2>&1; do + ac_prog=`echo $ac_prog| sed "s%$re_direlt%/%"` + done + test -z "$LD" && LD="$ac_prog" + ;; + "") + # If it fails, then pretend we aren't using GCC. + ac_prog=ld + ;; + *) + # If it is relative, then search for the first ld in PATH. + with_gnu_ld=unknown + ;; + esac +elif test "$with_gnu_ld" = yes; then + AC_MSG_CHECKING([for GNU ld]) +else + AC_MSG_CHECKING([for non-GNU ld]) +fi +AC_CACHE_VAL(lt_cv_path_LD, +[if test -z "$LD"; then + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for ac_dir in $PATH; do + test -z "$ac_dir" && ac_dir=. + if test -f "$ac_dir/$ac_prog" || test -f "$ac_dir/$ac_prog$ac_exeext"; then + lt_cv_path_LD="$ac_dir/$ac_prog" + # Check to see if the program is GNU ld. I'd rather use --version, + # but apparently some GNU ld's only accept -v. + # Break only if it was the GNU/non-GNU ld that we prefer. + if "$lt_cv_path_LD" -v 2>&1 < /dev/null | egrep '(GNU|with BFD)' > /dev/null; then + test "$with_gnu_ld" != no && break + else + test "$with_gnu_ld" != yes && break + fi + fi + done + IFS="$ac_save_ifs" +else + lt_cv_path_LD="$LD" # Let the user override the test with a path. +fi]) +LD="$lt_cv_path_LD" +if test -n "$LD"; then + AC_MSG_RESULT($LD) +else + AC_MSG_RESULT(no) +fi +test -z "$LD" && AC_MSG_ERROR([no acceptable ld found in \$PATH]) +AC_PROG_LD_GNU +]) + +# AC_PROG_LD_GNU - +AC_DEFUN([AC_PROG_LD_GNU], +[AC_CACHE_CHECK([if the linker ($LD) is GNU ld], lt_cv_prog_gnu_ld, +[# I'd rather use --version here, but apparently some GNU ld's only accept -v. +if $LD -v 2>&1 &5; then + lt_cv_prog_gnu_ld=yes +else + lt_cv_prog_gnu_ld=no +fi]) +with_gnu_ld=$lt_cv_prog_gnu_ld +]) + +# AC_PROG_LD_RELOAD_FLAG - find reload flag for linker +# -- PORTME Some linkers may need a different reload flag. +AC_DEFUN([AC_PROG_LD_RELOAD_FLAG], +[AC_CACHE_CHECK([for $LD option to reload object files], lt_cv_ld_reload_flag, +[lt_cv_ld_reload_flag='-r']) +reload_flag=$lt_cv_ld_reload_flag +test -n "$reload_flag" && reload_flag=" $reload_flag" +]) + +# AC_DEPLIBS_CHECK_METHOD - how to check for library dependencies +# -- PORTME fill in with the dynamic library characteristics +AC_DEFUN([AC_DEPLIBS_CHECK_METHOD], +[AC_CACHE_CHECK([how to recognise dependant libraries], +lt_cv_deplibs_check_method, +[lt_cv_file_magic_cmd='$MAGIC_CMD' +lt_cv_file_magic_test_file= +lt_cv_deplibs_check_method='unknown' +# Need to set the preceding variable on all platforms that support +# interlibrary dependencies. +# 'none' -- dependencies not supported. +# `unknown' -- same as none, but documents that we really don't know. +# 'pass_all' -- all dependencies passed with no checks. +# 'test_compile' -- check by making test program. +# 'file_magic [[regex]]' -- check by looking for files in library path +# which responds to the $file_magic_cmd with a given egrep regex. +# If you have `file' or equivalent on your system and you're not sure +# whether `pass_all' will *always* work, you probably want this one. + +case $host_os in +aix4* | aix5*) + lt_cv_deplibs_check_method=pass_all + ;; + +beos*) + lt_cv_deplibs_check_method=pass_all + ;; + +bsdi4*) + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (shared object|dynamic lib)' + lt_cv_file_magic_cmd='/usr/bin/file -L' + lt_cv_file_magic_test_file=/shlib/libc.so + ;; + +cygwin* | mingw* | pw32*) + lt_cv_deplibs_check_method='file_magic file format pei*-i386(.*architecture: i386)?' + lt_cv_file_magic_cmd='$OBJDUMP -f' + ;; + +darwin* | rhapsody*) + lt_cv_deplibs_check_method='file_magic Mach-O dynamically linked shared library' + lt_cv_file_magic_cmd='/usr/bin/file -L' + case "$host_os" in + rhapsody* | darwin1.[[012]]) + lt_cv_file_magic_test_file=`echo /System/Library/Frameworks/System.framework/Versions/*/System | head -1` + ;; + *) # Darwin 1.3 on + lt_cv_file_magic_test_file='/usr/lib/libSystem.dylib' + ;; + esac + ;; + +freebsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ > /dev/null; then + case $host_cpu in + i*86 ) + # Not sure whether the presence of OpenBSD here was a mistake. + # Let's accept both of them until this is cleared up. + lt_cv_deplibs_check_method='file_magic (FreeBSD|OpenBSD)/i[[3-9]]86 (compact )?demand paged shared library' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` + ;; + esac + else + lt_cv_deplibs_check_method=pass_all + fi + ;; + +gnu*) + lt_cv_deplibs_check_method=pass_all + ;; + +hpux10.20*|hpux11*) + lt_cv_deplibs_check_method='file_magic (s[[0-9]][[0-9]][[0-9]]|PA-RISC[[0-9]].[[0-9]]) shared library' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=/usr/lib/libc.sl + ;; + +irix5* | irix6* | nonstopux*) + case $host_os in + irix5* | nonstopux*) + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method="file_magic ELF 32-bit MSB dynamic lib MIPS - version 1" + ;; + *) + case $LD in + *-32|*"-32 ") libmagic=32-bit;; + *-n32|*"-n32 ") libmagic=N32;; + *-64|*"-64 ") libmagic=64-bit;; + *) libmagic=never-match;; + esac + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method="file_magic ELF ${libmagic} MSB mips-[[1234]] dynamic lib MIPS - version 1" + ;; + esac + lt_cv_file_magic_test_file=`echo /lib${libsuff}/libc.so*` + lt_cv_deplibs_check_method=pass_all + ;; + +# This must be Linux ELF. +linux-gnu*) + case $host_cpu in + alpha* | hppa* | i*86 | powerpc* | sparc* | ia64* ) + lt_cv_deplibs_check_method=pass_all ;; + *) + # glibc up to 2.1.1 does not perform some relocations on ARM + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB (shared object|dynamic lib )' ;; + esac + lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so` + ;; + +netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ > /dev/null; then + lt_cv_deplibs_check_method='match_pattern /lib[[^/\.]]+\.so\.[[0-9]]+\.[[0-9]]+$' + else + lt_cv_deplibs_check_method='match_pattern /lib[[^/\.]]+\.so$' + fi + ;; + +newos6*) + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (executable|dynamic lib)' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=/usr/lib/libnls.so + ;; + +openbsd*) + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` + if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB shared object' + else + lt_cv_deplibs_check_method='file_magic OpenBSD.* shared library' + fi + ;; + +osf3* | osf4* | osf5*) + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method='file_magic COFF format alpha shared library' + lt_cv_file_magic_test_file=/shlib/libc.so + lt_cv_deplibs_check_method=pass_all + ;; + +sco3.2v5*) + lt_cv_deplibs_check_method=pass_all + ;; + +solaris*) + lt_cv_deplibs_check_method=pass_all + lt_cv_file_magic_test_file=/lib/libc.so + ;; + +sysv5uw[[78]]* | sysv4*uw2*) + lt_cv_deplibs_check_method=pass_all + ;; + +sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + case $host_vendor in + motorola) + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (shared object|dynamic lib) M[[0-9]][[0-9]]* Version [[0-9]]' + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so*` + ;; + ncr) + lt_cv_deplibs_check_method=pass_all + ;; + sequent) + lt_cv_file_magic_cmd='/bin/file' + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB (shared object|dynamic lib )' + ;; + sni) + lt_cv_file_magic_cmd='/bin/file' + lt_cv_deplibs_check_method="file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB dynamic lib" + lt_cv_file_magic_test_file=/lib/libc.so + ;; + esac + ;; +esac +]) +file_magic_cmd=$lt_cv_file_magic_cmd +deplibs_check_method=$lt_cv_deplibs_check_method +]) + + +# AC_PROG_NM - find the path to a BSD-compatible name lister +AC_DEFUN([AC_PROG_NM], +[AC_REQUIRE([_LT_AC_LIBTOOL_SYS_PATH_SEPARATOR])dnl +AC_MSG_CHECKING([for BSD-compatible nm]) +AC_CACHE_VAL(lt_cv_path_NM, +[if test -n "$NM"; then + # Let the user override the test. + lt_cv_path_NM="$NM" +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for ac_dir in $PATH /usr/ccs/bin /usr/ucb /bin; do + test -z "$ac_dir" && ac_dir=. + tmp_nm=$ac_dir/${ac_tool_prefix}nm + if test -f $tmp_nm || test -f $tmp_nm$ac_exeext ; then + # Check to see if the nm accepts a BSD-compat flag. + # Adding the `sed 1q' prevents false positives on HP-UX, which says: + # nm: unknown option "B" ignored + # Tru64's nm complains that /dev/null is an invalid object file + if ($tmp_nm -B /dev/null 2>&1 | sed '1q'; exit 0) | egrep '(/dev/null|Invalid file or object type)' >/dev/null; then + lt_cv_path_NM="$tmp_nm -B" + break + elif ($tmp_nm -p /dev/null 2>&1 | sed '1q'; exit 0) | egrep /dev/null >/dev/null; then + lt_cv_path_NM="$tmp_nm -p" + break + else + lt_cv_path_NM=${lt_cv_path_NM="$tmp_nm"} # keep the first match, but + continue # so that we can try to find one that supports BSD flags + fi + fi + done + IFS="$ac_save_ifs" + test -z "$lt_cv_path_NM" && lt_cv_path_NM=nm +fi]) +NM="$lt_cv_path_NM" +AC_MSG_RESULT([$NM]) +]) + +# AC_CHECK_LIBM - check for math library +AC_DEFUN([AC_CHECK_LIBM], +[AC_REQUIRE([AC_CANONICAL_HOST])dnl +LIBM= +case $host in +*-*-beos* | *-*-cygwin* | *-*-pw32*) + # These system don't have libm + ;; +*-ncr-sysv4.3*) + AC_CHECK_LIB(mw, _mwvalidcheckl, LIBM="-lmw") + AC_CHECK_LIB(m, main, LIBM="$LIBM -lm") + ;; +*) + AC_CHECK_LIB(m, main, LIBM="-lm") + ;; +esac +]) + +# AC_LIBLTDL_CONVENIENCE[(dir)] - sets LIBLTDL to the link flags for +# the libltdl convenience library and LTDLINCL to the include flags for +# the libltdl header and adds --enable-ltdl-convenience to the +# configure arguments. Note that LIBLTDL and LTDLINCL are not +# AC_SUBSTed, nor is AC_CONFIG_SUBDIRS called. If DIR is not +# provided, it is assumed to be `libltdl'. LIBLTDL will be prefixed +# with '${top_builddir}/' and LTDLINCL will be prefixed with +# '${top_srcdir}/' (note the single quotes!). If your package is not +# flat and you're not using automake, define top_builddir and +# top_srcdir appropriately in the Makefiles. +AC_DEFUN([AC_LIBLTDL_CONVENIENCE], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl + case $enable_ltdl_convenience in + no) AC_MSG_ERROR([this package needs a convenience libltdl]) ;; + "") enable_ltdl_convenience=yes + ac_configure_args="$ac_configure_args --enable-ltdl-convenience" ;; + esac + LIBLTDL='${top_builddir}/'ifelse($#,1,[$1],['libltdl'])/libltdlc.la + LTDLINCL='-I${top_srcdir}/'ifelse($#,1,[$1],['libltdl']) + # For backwards non-gettext consistent compatibility... + INCLTDL="$LTDLINCL" +]) + +# AC_LIBLTDL_INSTALLABLE[(dir)] - sets LIBLTDL to the link flags for +# the libltdl installable library and LTDLINCL to the include flags for +# the libltdl header and adds --enable-ltdl-install to the configure +# arguments. Note that LIBLTDL and LTDLINCL are not AC_SUBSTed, nor is +# AC_CONFIG_SUBDIRS called. If DIR is not provided and an installed +# libltdl is not found, it is assumed to be `libltdl'. LIBLTDL will +# be prefixed with '${top_builddir}/' and LTDLINCL will be prefixed +# with '${top_srcdir}/' (note the single quotes!). If your package is +# not flat and you're not using automake, define top_builddir and +# top_srcdir appropriately in the Makefiles. +# In the future, this macro may have to be called after AC_PROG_LIBTOOL. +AC_DEFUN([AC_LIBLTDL_INSTALLABLE], +[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl + AC_CHECK_LIB(ltdl, main, + [test x"$enable_ltdl_install" != xyes && enable_ltdl_install=no], + [if test x"$enable_ltdl_install" = xno; then + AC_MSG_WARN([libltdl not installed, but installation disabled]) + else + enable_ltdl_install=yes + fi + ]) + if test x"$enable_ltdl_install" = x"yes"; then + ac_configure_args="$ac_configure_args --enable-ltdl-install" + LIBLTDL='${top_builddir}/'ifelse($#,1,[$1],['libltdl'])/libltdl.la + LTDLINCL='-I${top_srcdir}/'ifelse($#,1,[$1],['libltdl']) + else + ac_configure_args="$ac_configure_args --enable-ltdl-install=no" + LIBLTDL="-lltdl" + LTDLINCL= + fi + # For backwards non-gettext consistent compatibility... + INCLTDL="$LTDLINCL" +]) + +# old names +AC_DEFUN([AM_PROG_LIBTOOL], [AC_PROG_LIBTOOL]) +AC_DEFUN([AM_ENABLE_SHARED], [AC_ENABLE_SHARED($@)]) +AC_DEFUN([AM_ENABLE_STATIC], [AC_ENABLE_STATIC($@)]) +AC_DEFUN([AM_DISABLE_SHARED], [AC_DISABLE_SHARED($@)]) +AC_DEFUN([AM_DISABLE_STATIC], [AC_DISABLE_STATIC($@)]) +AC_DEFUN([AM_PROG_LD], [AC_PROG_LD]) +AC_DEFUN([AM_PROG_NM], [AC_PROG_NM]) + +# This is just to silence aclocal about the macro not being used +ifelse([AC_DISABLE_FAST_INSTALL]) + +# serial 5 AC_LIB_LTDL + +# AC_WITH_LTDL +# ------------ +# Clients of libltdl can use this macro to allow the installer to +# choose between a shipped copy of the ltdl sources or a preinstalled +# version of the library. +AC_DEFUN([AC_WITH_LTDL], +[AC_REQUIRE([AC_LIB_LTDL]) +AC_SUBST([LIBLTDL]) +AC_SUBST([INCLTDL]) + +# Unless the user asks us to check, assume no installed ltdl exists. +use_installed_libltdl=no + +AC_ARG_WITH([included_ltdl], + [ --with-included-ltdl use the GNU ltdl sources included here]) + +if test "x$with_included_ltdl" != xyes; then + # We are not being forced to use the included libltdl sources, so + # decide whether there is a useful installed version we can use. + AC_CHECK_HEADER([ltdl.h], + [AC_CHECK_LIB([ltdl], [lt_dlcaller_register], + [with_included_ltdl=no], + [with_included_ltdl=yes]) + ]) +fi + +if test "x$enable_ltdl_install" != xyes; then + # If the user did not specify an installable libltdl, then default + # to a convenience lib. + AC_LIBLTDL_CONVENIENCE +fi + +if test "x$with_included_ltdl" = xno; then + # If the included ltdl is not to be used. then Use the + # preinstalled libltdl we found. + AC_DEFINE([HAVE_LTDL], 1, + [Define this if a modern libltdl is already installed]) + LIBLTDL=-lltdl +fi + +# Report our decision... +AC_MSG_CHECKING([whether to use included libltdl]) +AC_MSG_RESULT([$with_included_ltdl]) + +AC_CONFIG_SUBDIRS([libltdl]) +])# AC_WITH_LTDL + + +# AC_LIB_LTDL +# ----------- +# Perform all the checks necessary for compilation of the ltdl objects +# -- including compiler checks and header checks. +AC_DEFUN(AC_LIB_LTDL, +[AC_PREREQ(2.13) +AC_REQUIRE([AC_PROG_CC]) +AC_REQUIRE([AC_C_CONST]) +AC_REQUIRE([AC_HEADER_STDC]) +AC_REQUIRE([AC_HEADER_DIRENT]) +AC_REQUIRE([AC_LIBTOOL_HEADER_ASSERT]) +AC_REQUIRE([_LT_AC_CHECK_DLFCN]) +AC_REQUIRE([AC_LTDL_ENABLE_INSTALL]) +AC_REQUIRE([AC_LTDL_SHLIBEXT]) +AC_REQUIRE([AC_LTDL_SHLIBPATH]) +AC_REQUIRE([AC_LTDL_SYSSEARCHPATH]) +AC_REQUIRE([AC_LTDL_OBJDIR]) +AC_REQUIRE([AC_LTDL_DLPREOPEN]) +AC_REQUIRE([AC_LTDL_DLLIB]) +AC_REQUIRE([AC_LTDL_SYMBOL_USCORE]) +AC_REQUIRE([AC_LTDL_DLSYM_USCORE]) +AC_REQUIRE([AC_LTDL_SYS_DLOPEN_DEPLIBS]) +AC_REQUIRE([AC_LTDL_FUNC_ARGZ]) + +AC_CHECK_HEADERS([errno.h malloc.h memory.h stdlib.h stdio.h ctype.h unistd.h]) +AC_CHECK_HEADERS([dl.h sys/dl.h dld.h]) +AC_CHECK_HEADERS([string.h strings.h], break) + +AC_CHECK_FUNCS([strchr index], break) +AC_CHECK_FUNCS([strrchr rindex], break) +AC_CHECK_FUNCS([memcpy bcopy], break) +AC_CHECK_FUNCS([memmove strcmp]) + +])# AC_LIB_LTDL + +# AC_LTDL_ENABLE_INSTALL +# ---------------------- +AC_DEFUN(AC_LTDL_ENABLE_INSTALL, +[AC_ARG_ENABLE(ltdl-install, +[ --enable-ltdl-install install libltdl]) + +AM_CONDITIONAL(INSTALL_LTDL, test x"${enable_ltdl_install-no}" != xno) +AM_CONDITIONAL(CONVENIENCE_LTDL, test x"${enable_ltdl_convenience-no}" != xno) +])])# AC_LTDL_ENABLE_INSTALL + +# AC_LTDL_SYS_DLOPEN_DEPLIBS +# -------------------------- +AC_DEFUN(AC_LTDL_SYS_DLOPEN_DEPLIBS, +[AC_REQUIRE([AC_CANONICAL_HOST]) +AC_CACHE_CHECK([whether deplibs are loaded by dlopen], + libltdl_cv_sys_dlopen_deplibs, [dnl + # PORTME does your system automatically load deplibs for dlopen()? + libltdl_cv_sys_dlopen_deplibs=unknown + case "$host_os" in + linux*) + libltdl_cv_sys_dlopen_deplibs=yes + ;; + netbsd*) + libltdl_cv_sys_dlopen_deplibs=yes + ;; + openbsd*) + libltdl_cv_sys_dlopen_deplibs=yes + ;; + solaris*) + libltdl_cv_sys_dlopen_deplibs=yes + ;; + esac +]) +if test "$libltdl_cv_sys_dlopen_deplibs" != yes; then + AC_DEFINE(LTDL_DLOPEN_DEPLIBS, 1, + [Define if the OS needs help to load dependent libraries for dlopen(). ]) +fi +])# AC_LTDL_SYS_DLOPEN_DEPLIBS + +# AC_LTDL_SHLIBEXT +# ---------------- +AC_DEFUN(AC_LTDL_SHLIBEXT, +[AC_REQUIRE([_LT_AC_LTCONFIG_HACK]) +AC_CACHE_CHECK([which extension is used for shared libraries], + libltdl_cv_shlibext, +[ac_last= + for ac_spec in $library_names_spec; do + ac_last="$ac_spec" + done + echo "$ac_last" | [sed 's/\[.*\]//;s/^[^.]*//;s/\$.*$//;s/\.$//'] > conftest +libltdl_cv_shlibext=`cat conftest` +rm -f conftest +]) +if test -n "$libltdl_cv_shlibext"; then + AC_DEFINE_UNQUOTED(LTDL_SHLIB_EXT, "$libltdl_cv_shlibext", + [Define to the extension used for shared libraries, say, ".so". ]) +fi +])# AC_LTDL_SHLIBEXT + +# AC_LTDL_SHLIBPATH +# ----------------- +AC_DEFUN(AC_LTDL_SHLIBPATH, +[AC_REQUIRE([_LT_AC_LTCONFIG_HACK]) +AC_CACHE_CHECK([which variable specifies run-time library path], + libltdl_cv_shlibpath_var, [libltdl_cv_shlibpath_var="$shlibpath_var"]) +if test -n "$libltdl_cv_shlibpath_var"; then + AC_DEFINE_UNQUOTED(LTDL_SHLIBPATH_VAR, "$libltdl_cv_shlibpath_var", + [Define to the name of the environment variable that determines the dynamic library search path. ]) +fi +])# AC_LTDL_SHLIBPATH + +# AC_LTDL_SYSSEARCHPATH +# --------------------- +AC_DEFUN(AC_LTDL_SYSSEARCHPATH, +[AC_REQUIRE([_LT_AC_LTCONFIG_HACK]) +AC_CACHE_CHECK([for the default library search path], + libltdl_cv_sys_search_path, [libltdl_cv_sys_search_path="$sys_lib_dlsearch_path_spec"]) +if test -n "$libltdl_cv_sys_search_path"; then + case "$host" in + *-*-mingw*) pathsep=";" ;; + *) pathsep=":" ;; + esac + sys_search_path= + for dir in $libltdl_cv_sys_search_path; do + if test -z "$sys_search_path"; then + sys_search_path="$dir" + else + sys_search_path="$sys_search_path$pathsep$dir" + fi + done + AC_DEFINE_UNQUOTED(LTDL_SYSSEARCHPATH, "$sys_search_path", + [Define to the system default library search path. ]) +fi +])# AC_LTDL_SYSSEARCHPATH + +# AC_LTDL_OBJDIR +# -------------- +AC_DEFUN(AC_LTDL_OBJDIR, +[AC_CACHE_CHECK([for objdir], + libltdl_cv_objdir, [libltdl_cv_objdir="$objdir" +if test -n "$objdir"; then + : +else + rm -f .libs 2>/dev/null + mkdir .libs 2>/dev/null + if test -d .libs; then + libltdl_cv_objdir=.libs + else + # MS-DOS does not allow filenames that begin with a dot. + libltdl_cv_objdir=_libs + fi +rmdir .libs 2>/dev/null +fi]) +AC_DEFINE_UNQUOTED(LTDL_OBJDIR, "$libltdl_cv_objdir/", + [Define to the sub-directory in which libtool stores uninstalled libraries. ]) +])# AC_LTDL_OBJDIR + +# AC_LTDL_DLPREOPEN +# ----------------- +AC_DEFUN(AC_LTDL_DLPREOPEN, +[AC_REQUIRE([AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE])dnl +AC_CACHE_CHECK([whether libtool supports -dlopen/-dlpreopen], + libltdl_cv_preloaded_symbols, [dnl + if test -n "$global_symbol_pipe"; then + libltdl_cv_preloaded_symbols=yes + else + libltdl_cv_preloaded_symbols=no + fi +]) +if test x"$libltdl_cv_preloaded_symbols" = x"yes"; then + AC_DEFINE(HAVE_PRELOADED_SYMBOLS, 1, + [Define if libtool can extract symbol lists from object files. ]) +fi +])# AC_LTDL_DLPREOPEN + +# AC_LTDL_DLLIB +# ------------- +AC_DEFUN(AC_LTDL_DLLIB, +[LIBADD_DL= +AC_SUBST(LIBADD_DL) + +AC_CHECK_FUNC([shl_load], + [AC_DEFINE([HAVE_SHL_LOAD], [1], + [Define if you have the shl_load function.])], + [AC_CHECK_LIB([dld], [shl_load], + [AC_DEFINE([HAVE_SHL_LOAD], [1], + [Define if you have the shl_load function.]) + LIBADD_DL="$LIBADD_DL -ldld"], + [AC_CHECK_LIB([dl], [dlopen], + [AC_DEFINE([HAVE_LIBDL], [1], + [Define if you have the libdl library or equivalent.]) + LIBADD_DL="-ldl"], + [AC_TRY_LINK([#if HAVE_DLFCN_H +# include +#endif + ], + [dlopen(0, 0);], + [AC_DEFINE([HAVE_LIBDL], [1], + [Define if you have the libdl library or equivalent.])], + [AC_CHECK_LIB([svld], [dlopen], + [AC_DEFINE([HAVE_LIBDL], [1], + [Define if you have the libdl library or equivalent.]) + LIBADD_DL="-lsvld"], + [AC_CHECK_LIB([dld], [dld_link], + [AC_DEFINE([HAVE_DLD], [1], + [Define if you have the GNU dld library.]) + LIBADD_DL="$LIBADD_DL -ldld" + ]) + ]) + ]) + ]) + ]) +]) + +if test "x$ac_cv_func_dlopen" = xyes || test "x$ac_cv_lib_dl_dlopen" = xyes; then + LIBS_SAVE="$LIBS" + LIBS="$LIBS $LIBADD_DL" + AC_CHECK_FUNCS(dlerror) + LIBS="$LIBS_SAVE" +fi +])# AC_LTDL_DLLIB + +# AC_LTDL_SYMBOL_USCORE +# --------------------- +AC_DEFUN(AC_LTDL_SYMBOL_USCORE, +[dnl does the compiler prefix global symbols with an underscore? +AC_REQUIRE([AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE])dnl +AC_MSG_CHECKING([for _ prefix in compiled symbols]) +AC_CACHE_VAL(ac_cv_sys_symbol_underscore, +[ac_cv_sys_symbol_underscore=no +cat > conftest.$ac_ext < $ac_nlist) && test -s "$ac_nlist"; then + # See whether the symbols have a leading underscore. + if egrep '^. _nm_test_func' "$ac_nlist" >/dev/null; then + ac_cv_sys_symbol_underscore=yes + else + if egrep '^. nm_test_func ' "$ac_nlist" >/dev/null; then + : + else + echo "configure: cannot find nm_test_func in $ac_nlist" >&AC_FD_CC + fi + fi + else + echo "configure: cannot run $global_symbol_pipe" >&AC_FD_CC + fi +else + echo "configure: failed program was:" >&AC_FD_CC + cat conftest.c >&AC_FD_CC +fi +rm -rf conftest* +]) +AC_MSG_RESULT($ac_cv_sys_symbol_underscore) +])# AC_LTDL_SYMBOL_USCORE + + +# AC_LTDL_DLSYM_USCORE +# -------------------- +AC_DEFUN(AC_LTDL_DLSYM_USCORE, +[AC_REQUIRE([AC_LTDL_SYMBOL_USCORE])dnl +if test x"$ac_cv_sys_symbol_underscore" = xyes; then + if test x"$ac_cv_func_dlopen" = xyes || + test x"$ac_cv_lib_dl_dlopen" = xyes ; then + AC_CACHE_CHECK([whether we have to add an underscore for dlsym], + libltdl_cv_need_uscore, [dnl + libltdl_cv_need_uscore=unknown + save_LIBS="$LIBS" + LIBS="$LIBS $LIBADD_DL" + _LT_AC_TRY_DLOPEN_SELF( + libltdl_cv_need_uscore=no, libltdl_cv_need_uscore=yes, + [], libltdl_cv_need_uscore=cross) + LIBS="$save_LIBS" + ]) + fi +fi + +if test x"$libltdl_cv_need_uscore" = xyes; then + AC_DEFINE(NEED_USCORE, 1, + [Define if dlsym() requires a leading underscore in symbol names. ]) +fi +])# AC_LTDL_DLSYM_USCORE + + +# AC_CHECK_TYPES(TYPES, [ACTION-IF-FOUND], [ACTION-IF-NOT-FOUND], +# [INCLUDES]) +# --------------------------------------------------------------- +# This macro did not exist in Autoconf 2.13, which we do still support +ifdef([AC_CHECK_TYPES], [], +[define([AC_CHECK_TYPES], + [AC_CACHE_CHECK([for $1], ac_Type, + [AC_TRY_LINK([$4], + [if (($1 *) 0) + return 0; + if (sizeof ($1)) + return 0;], + [ac_Type=yes], + [ac_Type=no])]) + if test "x$ac_Type" = xyes; then + ifelse([$2], [], [:], [$2]) + else + ifelse([$3], [], [:], [$3]) + fi]) +])# AC_CHECK_TYPES + + +# AC_LTDL_FUNC_ARGZ +# ----------------- +AC_DEFUN([AC_LTDL_FUNC_ARGZ], +[AC_CHECK_HEADERS([argz.h]) + +AC_CHECK_TYPES([error_t], + [], + [AC_DEFINE([error_t], [int], + [Define to a type to use for \`error_t' if it is not otherwise available.])], + [#if HAVE_ARGZ_H +# include +#endif]) + +AC_CHECK_FUNCS([argz_append argz_create_sep argz_insert argz_next argz_stringify]) +])# AC_LTDL_FUNC_ARGZ + +# serial 3 + +# AM_CONDITIONAL(NAME, SHELL-CONDITION) +# ------------------------------------- +# Define a conditional. +# +# FIXME: Once using 2.50, use this: +# m4_match([$1], [^TRUE\|FALSE$], [AC_FATAL([$0: invalid condition: $1])])dnl +AC_DEFUN([AM_CONDITIONAL], +[ifelse([$1], [TRUE], + [errprint(__file__:__line__: [$0: invalid condition: $1 +])dnl +m4exit(1)])dnl +ifelse([$1], [FALSE], + [errprint(__file__:__line__: [$0: invalid condition: $1 +])dnl +m4exit(1)])dnl +AC_SUBST([$1_TRUE]) +AC_SUBST([$1_FALSE]) +if $2; then + $1_TRUE= + $1_FALSE='#' +else + $1_TRUE='#' + $1_FALSE= +fi]) + +# Do all the work for Automake. This macro actually does too much -- +# some checks are only needed if your package does certain things. +# But this isn't really a big deal. + +# serial 5 + +# There are a few dirty hacks below to avoid letting `AC_PROG_CC' be +# written in clear, in which case automake, when reading aclocal.m4, +# will think it sees a *use*, and therefore will trigger all it's +# C support machinery. Also note that it means that autoscan, seeing +# CC etc. in the Makefile, will ask for an AC_PROG_CC use... + + +# We require 2.13 because we rely on SHELL being computed by configure. +AC_PREREQ([2.13]) + +# AC_PROVIDE_IFELSE(MACRO-NAME, IF-PROVIDED, IF-NOT-PROVIDED) +# ----------------------------------------------------------- +# If MACRO-NAME is provided do IF-PROVIDED, else IF-NOT-PROVIDED. +# The purpose of this macro is to provide the user with a means to +# check macros which are provided without letting her know how the +# information is coded. +# If this macro is not defined by Autoconf, define it here. +ifdef([AC_PROVIDE_IFELSE], + [], + [define([AC_PROVIDE_IFELSE], + [ifdef([AC_PROVIDE_$1], + [$2], [$3])])]) + + +# AM_INIT_AUTOMAKE(PACKAGE,VERSION, [NO-DEFINE]) +# ---------------------------------------------- +AC_DEFUN([AM_INIT_AUTOMAKE], +[AC_REQUIRE([AC_PROG_INSTALL])dnl +# test to see if srcdir already configured +if test "`CDPATH=:; cd $srcdir && pwd`" != "`pwd`" && + test -f $srcdir/config.status; then + AC_MSG_ERROR([source directory already configured; run \"make distclean\" there first]) +fi + +# Define the identity of the package. +PACKAGE=$1 +AC_SUBST(PACKAGE)dnl +VERSION=$2 +AC_SUBST(VERSION)dnl +ifelse([$3],, +[AC_DEFINE_UNQUOTED(PACKAGE, "$PACKAGE", [Name of package]) +AC_DEFINE_UNQUOTED(VERSION, "$VERSION", [Version number of package])]) + +# Autoconf 2.50 wants to disallow AM_ names. We explicitly allow +# the ones we care about. +ifdef([m4_pattern_allow], + [m4_pattern_allow([^AM_[A-Z]+FLAGS])])dnl + +# Autoconf 2.50 always computes EXEEXT. However we need to be +# compatible with 2.13, for now. So we always define EXEEXT, but we +# don't compute it. +AC_SUBST(EXEEXT) +# Similar for OBJEXT -- only we only use OBJEXT if the user actually +# requests that it be used. This is a bit dumb. +: ${OBJEXT=o} +AC_SUBST(OBJEXT) + +# Some tools Automake needs. +AC_REQUIRE([AM_SANITY_CHECK])dnl +AC_REQUIRE([AC_ARG_PROGRAM])dnl +AM_MISSING_PROG(ACLOCAL, aclocal) +AM_MISSING_PROG(AUTOCONF, autoconf) +AM_MISSING_PROG(AUTOMAKE, automake) +AM_MISSING_PROG(AUTOHEADER, autoheader) +AM_MISSING_PROG(MAKEINFO, makeinfo) +AM_MISSING_PROG(AMTAR, tar) +AM_PROG_INSTALL_SH +AM_PROG_INSTALL_STRIP +# We need awk for the "check" target. The system "awk" is bad on +# some platforms. +AC_REQUIRE([AC_PROG_AWK])dnl +AC_REQUIRE([AC_PROG_MAKE_SET])dnl +AC_REQUIRE([AM_DEP_TRACK])dnl +AC_REQUIRE([AM_SET_DEPDIR])dnl +AC_PROVIDE_IFELSE([AC_PROG_][CC], + [_AM_DEPENDENCIES(CC)], + [define([AC_PROG_][CC], + defn([AC_PROG_][CC])[_AM_DEPENDENCIES(CC)])])dnl +AC_PROVIDE_IFELSE([AC_PROG_][CXX], + [_AM_DEPENDENCIES(CXX)], + [define([AC_PROG_][CXX], + defn([AC_PROG_][CXX])[_AM_DEPENDENCIES(CXX)])])dnl +]) + +# +# Check to make sure that the build environment is sane. +# + +# serial 3 + +# AM_SANITY_CHECK +# --------------- +AC_DEFUN([AM_SANITY_CHECK], +[AC_MSG_CHECKING([whether build environment is sane]) +# Just in case +sleep 1 +echo timestamp > conftest.file +# Do `set' in a subshell so we don't clobber the current shell's +# arguments. Must try -L first in case configure is actually a +# symlink; some systems play weird games with the mod time of symlinks +# (eg FreeBSD returns the mod time of the symlink's containing +# directory). +if ( + set X `ls -Lt $srcdir/configure conftest.file 2> /dev/null` + if test "$[*]" = "X"; then + # -L didn't work. + set X `ls -t $srcdir/configure conftest.file` + fi + rm -f conftest.file + if test "$[*]" != "X $srcdir/configure conftest.file" \ + && test "$[*]" != "X conftest.file $srcdir/configure"; then + + # If neither matched, then we have a broken ls. This can happen + # if, for instance, CONFIG_SHELL is bash and it inherits a + # broken ls alias from the environment. This has actually + # happened. Such a system could not be considered "sane". + AC_MSG_ERROR([ls -t appears to fail. Make sure there is not a broken +alias in your environment]) + fi + + test "$[2]" = conftest.file + ) +then + # Ok. + : +else + AC_MSG_ERROR([newly created file is older than distributed files! +Check your system clock]) +fi +AC_MSG_RESULT(yes)]) + + +# serial 2 + +# AM_MISSING_PROG(NAME, PROGRAM) +# ------------------------------ +AC_DEFUN([AM_MISSING_PROG], +[AC_REQUIRE([AM_MISSING_HAS_RUN]) +$1=${$1-"${am_missing_run}$2"} +AC_SUBST($1)]) + + +# AM_MISSING_HAS_RUN +# ------------------ +# Define MISSING if not defined so far and test if it supports --run. +# If it does, set am_missing_run to use it, otherwise, to nothing. +AC_DEFUN([AM_MISSING_HAS_RUN], +[AC_REQUIRE([AM_AUX_DIR_EXPAND])dnl +test x"${MISSING+set}" = xset || MISSING="\${SHELL} $am_aux_dir/missing" +# Use eval to expand $SHELL +if eval "$MISSING --run true"; then + am_missing_run="$MISSING --run " +else + am_missing_run= + am_backtick='`' + AC_MSG_WARN([${am_backtick}missing' script is too old or missing]) +fi +]) + +# AM_AUX_DIR_EXPAND + +# For projects using AC_CONFIG_AUX_DIR([foo]), Autoconf sets +# $ac_aux_dir to `$srcdir/foo'. In other projects, it is set to +# `$srcdir', `$srcdir/..', or `$srcdir/../..'. +# +# Of course, Automake must honor this variable whenever it calls a +# tool from the auxiliary directory. The problem is that $srcdir (and +# therefore $ac_aux_dir as well) can be either absolute or relative, +# depending on how configure is run. This is pretty annoying, since +# it makes $ac_aux_dir quite unusable in subdirectories: in the top +# source directory, any form will work fine, but in subdirectories a +# relative path needs to be adjusted first. +# +# $ac_aux_dir/missing +# fails when called from a subdirectory if $ac_aux_dir is relative +# $top_srcdir/$ac_aux_dir/missing +# fails if $ac_aux_dir is absolute, +# fails when called from a subdirectory in a VPATH build with +# a relative $ac_aux_dir +# +# The reason of the latter failure is that $top_srcdir and $ac_aux_dir +# are both prefixed by $srcdir. In an in-source build this is usually +# harmless because $srcdir is `.', but things will broke when you +# start a VPATH build or use an absolute $srcdir. +# +# So we could use something similar to $top_srcdir/$ac_aux_dir/missing, +# iff we strip the leading $srcdir from $ac_aux_dir. That would be: +# am_aux_dir='\$(top_srcdir)/'`expr "$ac_aux_dir" : "$srcdir//*\(.*\)"` +# and then we would define $MISSING as +# MISSING="\${SHELL} $am_aux_dir/missing" +# This will work as long as MISSING is not called from configure, because +# unfortunately $(top_srcdir) has no meaning in configure. +# However there are other variables, like CC, which are often used in +# configure, and could therefore not use this "fixed" $ac_aux_dir. +# +# Another solution, used here, is to always expand $ac_aux_dir to an +# absolute PATH. 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Generated automatically from configure.in by autoheader 2.13. */ + +/* Define to empty if the keyword does not work. */ +#undef const + +/* Define as __inline if that's what the C compiler calls it. */ +#undef inline + +/* Define if you have the ANSI C header files. */ +#undef STDC_HEADERS + +/* Define if you have the argz_append function. */ +#undef HAVE_ARGZ_APPEND + +/* Define if you have the argz_create_sep function. */ +#undef HAVE_ARGZ_CREATE_SEP + +/* Define if you have the argz_insert function. */ +#undef HAVE_ARGZ_INSERT + +/* Define if you have the argz_next function. */ +#undef HAVE_ARGZ_NEXT + +/* Define if you have the argz_stringify function. */ +#undef HAVE_ARGZ_STRINGIFY + +/* Define if you have the bcopy function. */ +#undef HAVE_BCOPY + +/* Define if you have the dlerror function. */ +#undef HAVE_DLERROR + +/* Define if you have the index function. */ +#undef HAVE_INDEX + +/* Define if you have the memcpy function. */ +#undef HAVE_MEMCPY + +/* Define if you have the memmove function. */ +#undef HAVE_MEMMOVE + +/* Define if you have the rindex function. */ +#undef HAVE_RINDEX + +/* Define if you have the strchr function. */ +#undef HAVE_STRCHR + +/* Define if you have the strcmp function. */ +#undef HAVE_STRCMP + +/* Define if you have the strrchr function. */ +#undef HAVE_STRRCHR + +/* Define if you have the header file. */ +#undef HAVE_ARGZ_H + +/* Define if you have the header file. */ +#undef HAVE_ASSERT_H + +/* Define if you have the header file. */ +#undef HAVE_CTYPE_H + +/* Define if you have the header file. */ +#undef HAVE_DIRENT_H + +/* Define if you have the header file. */ +#undef HAVE_DL_H + +/* Define if you have the header file. */ +#undef HAVE_DLD_H + +/* Define if you have the header file. */ +#undef HAVE_DLFCN_H + +/* Define if you have the header file. */ +#undef HAVE_ERRNO_H + +/* Define if you have the header file. */ +#undef HAVE_MALLOC_H + +/* Define if you have the header file. */ +#undef HAVE_MEMORY_H + +/* Define if you have the header file. */ +#undef HAVE_NDIR_H + +/* Define if you have the header file. */ +#undef HAVE_STDIO_H + +/* Define if you have the header file. */ +#undef HAVE_STDLIB_H + +/* Define if you have the header file. */ +#undef HAVE_STRING_H + +/* Define if you have the header file. */ +#undef HAVE_STRINGS_H + +/* Define if you have the header file. */ +#undef HAVE_SYS_DIR_H + +/* Define if you have the header file. */ +#undef HAVE_SYS_DL_H + +/* Define if you have the header file. */ +#undef HAVE_SYS_NDIR_H + +/* Define if you have the header file. */ +#undef HAVE_UNISTD_H + +/* Define to the extension used for shared libraries, say, .so. */ +#undef LTDL_SHLIB_EXT + +/* Define to the name of the environment variable that determines the dynamic library search path. */ +#undef LTDL_SHLIBPATH_VAR + +/* Define to the system default library search path. */ +#undef LTDL_SYSSEARCHPATH + +/* Define to the sub-directory in which libtool stores uninstalled libraries. */ +#undef LTDL_OBJDIR + +/* Define if libtool can extract symbol lists from object files. */ +#undef HAVE_PRELOADED_SYMBOLS + +/* Define if you have the shl_load function. */ +#undef HAVE_SHL_LOAD + +/* Define if you have the shl_load function. */ +#undef HAVE_SHL_LOAD + +/* Define if you have the libdl library or equivalent. */ +#undef HAVE_LIBDL + +/* Define if you have the libdl library or equivalent. */ +#undef HAVE_LIBDL + +/* Define if you have the libdl library or equivalent. */ +#undef HAVE_LIBDL + +/* Define if you have the GNU dld library. */ +#undef HAVE_DLD + +/* Define if dlsym() requires a leading underscore in symbol names. */ +#undef NEED_USCORE + +/* Define if the OS needs help to load dependent libraries for dlopen(). */ +#undef LTDL_DLOPEN_DEPLIBS + +/* Define to a type to use for `error_t' if it is not otherwise available. */ +#undef error_t + diff --git a/sim/ucsim/libltdl/configure b/sim/ucsim/libltdl/configure new file mode 100755 index 0000000..042a88f --- /dev/null +++ b/sim/ucsim/libltdl/configure @@ -0,0 +1,7784 @@ +#! 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then + echo "configure: warning: $ac_option: invalid host type" 1>&2 + fi + if test "x$nonopt" != xNONE; then + { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } + fi + nonopt="$ac_option" + ;; + + esac +done + +if test -n "$ac_prev"; then + { echo "configure: error: missing argument to --`echo $ac_prev | sed 's/_/-/g'`" 1>&2; exit 1; } +fi + +trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15 + +# File descriptor usage: +# 0 standard input +# 1 file creation +# 2 errors and warnings +# 3 some systems may open it to /dev/tty +# 4 used on the Kubota Titan +# 6 checking for... messages and results +# 5 compiler messages saved in config.log +if test "$silent" = yes; then + exec 6>/dev/null +else + exec 6>&1 +fi +exec 5>./config.log + +echo "\ +This file contains any messages produced by compilers while +running configure, to aid debugging if configure makes a mistake. +" 1>&5 + +# Strip out --no-create and --no-recursion so they do not pile up. +# Also quote any args containing shell metacharacters. +ac_configure_args= +for ac_arg +do + case "$ac_arg" in + -no-create | --no-create | --no-creat | --no-crea | --no-cre \ + | --no-cr | --no-c) ;; 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But avoid the broken or +# incompatible versions: +# SysV /etc/install, /usr/sbin/install +# SunOS /usr/etc/install +# IRIX /sbin/install +# AIX /bin/install +# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag +# AFS /usr/afsws/bin/install, which mishandles nonexistent args +# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" +# ./install, which can be erroneously created by make from ./install.sh. +echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6 +echo "configure:780: checking for a BSD compatible install" >&5 +if test -z "$INSTALL"; then +if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":" + for ac_dir in $PATH; do + # Account for people who put trailing slashes in PATH elements. + case "$ac_dir/" in + /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;; + *) + # OSF1 and SCO ODT 3.0 have their own names for install. + # Don't use installbsd from OSF since it installs stuff as root + # by default. + for ac_prog in ginstall scoinst install; do + if test -f $ac_dir/$ac_prog; then + if test $ac_prog = install && + grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then + # AIX install. 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We don't cache a + # path for INSTALL within a source directory, because that will + # break other packages using the cache if that directory is + # removed, or if the path is relative. + INSTALL="$ac_install_sh" + fi +fi +echo "$ac_t""$INSTALL" 1>&6 + +# Use test -z because SunOS4 sh mishandles braces in ${var-val}. +# It thinks the first close brace ends the variable substitution. +test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}' + +test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}' + +test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' + +echo $ac_n "checking whether build environment is sane""... $ac_c" 1>&6 +echo "configure:833: checking whether build environment is sane" >&5 +# Just in case +sleep 1 +echo timestamp > conftest.file +# Do `set' in a subshell so we don't clobber the current shell's +# arguments. Must try -L first in case configure is actually a +# symlink; some systems play weird games with the mod time of symlinks +# (eg FreeBSD returns the mod time of the symlink's containing +# directory). +if ( + set X `ls -Lt $srcdir/configure conftest.file 2> /dev/null` + if test "$*" = "X"; then + # -L didn't work. + set X `ls -t $srcdir/configure conftest.file` + fi + rm -f conftest.file + if test "$*" != "X $srcdir/configure conftest.file" \ + && test "$*" != "X conftest.file $srcdir/configure"; then + + # If neither matched, then we have a broken ls. This can happen + # if, for instance, CONFIG_SHELL is bash and it inherits a + # broken ls alias from the environment. This has actually + # happened. Such a system could not be considered "sane". + { echo "configure: error: ls -t appears to fail. Make sure there is not a broken +alias in your environment" 1>&2; exit 1; } + fi + + test "$2" = conftest.file + ) +then + # Ok. + : +else + { echo "configure: error: newly created file is older than distributed files! +Check your system clock" 1>&2; exit 1; } +fi +echo "$ac_t""yes" 1>&6 +if test "$program_transform_name" = s,x,x,; then + program_transform_name= +else + # Double any \ or $. echo might interpret backslashes. + cat <<\EOF_SED > conftestsed +s,\\,\\\\,g; s,\$,$$,g +EOF_SED + program_transform_name="`echo $program_transform_name|sed -f conftestsed`" + rm -f conftestsed +fi +test "$program_prefix" != NONE && + program_transform_name="s,^,${program_prefix},; $program_transform_name" +# Use a double $ so make ignores it. +test "$program_suffix" != NONE && + program_transform_name="s,\$\$,${program_suffix},; $program_transform_name" + +# sed with no file args requires a program. +test "$program_transform_name" = "" && program_transform_name="s,x,x," + +test x"${MISSING+set}" = xset || MISSING="\${SHELL} $am_aux_dir/missing" +# Use eval to expand $SHELL +if eval "$MISSING --run true"; then + am_missing_run="$MISSING --run " +else + am_missing_run= + am_backtick='`' + echo "configure: warning: ${am_backtick}missing' script is too old or missing" 1>&2 +fi + +for ac_prog in mawk gawk nawk awk +do +# Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:904: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_AWK'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$AWK"; then + ac_cv_prog_AWK="$AWK" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_AWK="$ac_prog" + break + fi + done + IFS="$ac_save_ifs" +fi +fi +AWK="$ac_cv_prog_AWK" +if test -n "$AWK"; then + echo "$ac_t""$AWK" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + +test -n "$AWK" && break +done + +echo $ac_n "checking whether ${MAKE-make} sets \${MAKE}""... $ac_c" 1>&6 +echo "configure:934: checking whether ${MAKE-make} sets \${MAKE}" >&5 +set dummy ${MAKE-make}; ac_make=`echo "$2" | sed 'y%./+-%__p_%'` +if eval "test \"`echo '$''{'ac_cv_prog_make_${ac_make}_set'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftestmake <<\EOF +all: + @echo 'ac_maketemp="${MAKE}"' +EOF +# GNU make sometimes prints "make[1]: Entering...", which would confuse us. +eval `${MAKE-make} -f conftestmake 2>/dev/null | grep temp=` +if test -n "$ac_maketemp"; then + eval ac_cv_prog_make_${ac_make}_set=yes +else + eval ac_cv_prog_make_${ac_make}_set=no +fi +rm -f conftestmake +fi +if eval "test \"`echo '$ac_cv_prog_make_'${ac_make}_set`\" = yes"; then + echo "$ac_t""yes" 1>&6 + SET_MAKE= +else + echo "$ac_t""no" 1>&6 + SET_MAKE="MAKE=${MAKE-make}" +fi + +# Check whether --enable-dependency-tracking or --disable-dependency-tracking was given. +if test "${enable_dependency_tracking+set}" = set; then + enableval="$enable_dependency_tracking" + : +fi + +if test "x$enable_dependency_tracking" != xno; then + am_depcomp="$ac_aux_dir/depcomp" + AMDEPBACKSLASH='\' +fi + + +if test "x$enable_dependency_tracking" != xno; then + AMDEP_TRUE= + AMDEP_FALSE='#' +else + AMDEP_TRUE='#' + AMDEP_FALSE= +fi + + + + +rm -f .deps 2>/dev/null +mkdir .deps 2>/dev/null +if test -d .deps; then + DEPDIR=.deps +else + # MS-DOS does not allow filenames that begin with a dot. + DEPDIR=_deps +fi +rmdir .deps 2>/dev/null + + +# test to see if srcdir already configured +if test "`CDPATH=:; cd $srcdir && pwd`" != "`pwd`" && + test -f $srcdir/config.status; then + { echo "configure: error: source directory already configured; run \"make distclean\" there first" 1>&2; exit 1; } +fi + +# Define the identity of the package. +PACKAGE=libltdl +VERSION=1.2 + + +# Autoconf 2.50 wants to disallow AM_ names. We explicitly allow +# the ones we care about. + +# Autoconf 2.50 always computes EXEEXT. However we need to be +# compatible with 2.13, for now. So we always define EXEEXT, but we +# don't compute it. + +# Similar for OBJEXT -- only we only use OBJEXT if the user actually +# requests that it be used. This is a bit dumb. +: ${OBJEXT=o} + + +# Some tools Automake needs. + +ACLOCAL=${ACLOCAL-"${am_missing_run}aclocal"} + + +AUTOCONF=${AUTOCONF-"${am_missing_run}autoconf"} + + +AUTOMAKE=${AUTOMAKE-"${am_missing_run}automake"} + + +AUTOHEADER=${AUTOHEADER-"${am_missing_run}autoheader"} + + +MAKEINFO=${MAKEINFO-"${am_missing_run}makeinfo"} + + +AMTAR=${AMTAR-"${am_missing_run}tar"} + +install_sh=${install_sh-"$am_aux_dir/install-sh"} + +INSTALL_STRIP_PROGRAM="\${SHELL} \$(install_sh) -c -s" + +# We need awk for the "check" target. The system "awk" is bad on +# some platforms. + + + + +echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6 +echo "configure:1047: checking whether to enable maintainer-specific portions of Makefiles" >&5 + # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given. +if test "${enable_maintainer_mode+set}" = set; then + enableval="$enable_maintainer_mode" + USE_MAINTAINER_MODE=$enableval +else + USE_MAINTAINER_MODE=no +fi + + echo "$ac_t""$USE_MAINTAINER_MODE" 1>&6 + + +if test $USE_MAINTAINER_MODE = yes; then + MAINTAINER_MODE_TRUE= + MAINTAINER_MODE_FALSE='#' +else + MAINTAINER_MODE_TRUE='#' + MAINTAINER_MODE_FALSE= +fi + MAINT=$MAINTAINER_MODE_TRUE + + + +# Extract the first word of "gcc", so it can be a program name with args. +set dummy gcc; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:1073: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_CC="gcc" + break + fi + done + IFS="$ac_save_ifs" +fi +fi +CC="$ac_cv_prog_CC" +if test -n "$CC"; then + echo "$ac_t""$CC" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + +if test -z "$CC"; then + # Extract the first word of "cc", so it can be a program name with args. +set dummy cc; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:1103: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_prog_rejected=no + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then + ac_prog_rejected=yes + continue + fi + ac_cv_prog_CC="cc" + break + fi + done + IFS="$ac_save_ifs" +if test $ac_prog_rejected = yes; then + # We found a bogon in the path, so make sure we never use it. + set dummy $ac_cv_prog_CC + shift + if test $# -gt 0; then + # We chose a different compiler from the bogus one. + # However, it has the same basename, so the bogon will be chosen + # first if we set CC to just the basename; use the full file name. + shift + set dummy "$ac_dir/$ac_word" "$@" + shift + ac_cv_prog_CC="$@" + fi +fi +fi +fi +CC="$ac_cv_prog_CC" +if test -n "$CC"; then + echo "$ac_t""$CC" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + + if test -z "$CC"; then + case "`uname -s`" in + *win32* | *WIN32*) + # Extract the first word of "cl", so it can be a program name with args. +set dummy cl; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:1154: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_CC="cl" + break + fi + done + IFS="$ac_save_ifs" +fi +fi +CC="$ac_cv_prog_CC" +if test -n "$CC"; then + echo "$ac_t""$CC" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + ;; + esac + fi + test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; } +fi + +echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6 +echo "configure:1186: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 + +ac_ext=c +# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. +ac_cpp='$CPP $CPPFLAGS' +ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5' +ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5' +cross_compiling=$ac_cv_prog_cc_cross + +cat > conftest.$ac_ext << EOF + +#line 1197 "configure" +#include "confdefs.h" + +main(){return(0);} +EOF +if { (eval echo configure:1202: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + ac_cv_prog_cc_works=yes + # If we can't run a trivial program, we are probably using a cross compiler. + if (./conftest; exit) 2>/dev/null; then + ac_cv_prog_cc_cross=no + else + ac_cv_prog_cc_cross=yes + fi +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + ac_cv_prog_cc_works=no +fi +rm -fr conftest* +ac_ext=c +# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. +ac_cpp='$CPP $CPPFLAGS' +ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5' +ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5' +cross_compiling=$ac_cv_prog_cc_cross + +echo "$ac_t""$ac_cv_prog_cc_works" 1>&6 +if test $ac_cv_prog_cc_works = no; then + { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; } +fi +echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6 +echo "configure:1228: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 +echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6 +cross_compiling=$ac_cv_prog_cc_cross + +echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 +echo "configure:1233: checking whether we are using GNU C" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.c <&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then + ac_cv_prog_gcc=yes +else + ac_cv_prog_gcc=no +fi +fi + +echo "$ac_t""$ac_cv_prog_gcc" 1>&6 + +if test $ac_cv_prog_gcc = yes; then + GCC=yes +else + GCC= +fi + +ac_test_CFLAGS="${CFLAGS+set}" +ac_save_CFLAGS="$CFLAGS" +CFLAGS= +echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 +echo "configure:1261: checking whether ${CC-cc} accepts -g" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + echo 'void f(){}' > conftest.c +if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then + ac_cv_prog_cc_g=yes +else + ac_cv_prog_cc_g=no +fi +rm -f conftest* + +fi + +echo "$ac_t""$ac_cv_prog_cc_g" 1>&6 +if test "$ac_test_CFLAGS" = set; then + CFLAGS="$ac_save_CFLAGS" +elif test $ac_cv_prog_cc_g = yes; then + if test "$GCC" = yes; then + CFLAGS="-g -O2" + else + CFLAGS="-g" + fi +else + if test "$GCC" = yes; then + CFLAGS="-O2" + else + CFLAGS= + fi +fi + + +am_make=${MAKE-make} +cat > confinc << 'END' +doit: + @echo done +END +# If we don't find an include directive, just comment out the code. +echo $ac_n "checking for style of include used by $am_make""... $ac_c" 1>&6 +echo "configure:1300: checking for style of include used by $am_make" >&5 +am__include='#' +am__quote= +_am_result=none +# First try GNU make style include. +echo "include confinc" > confmf +# We grep out `Entering directory' and `Leaving directory' +# messages which can occur if `w' ends up in MAKEFLAGS. +# In particular we don't look at `^make:' because GNU make might +# be invoked under some other name (usually "gmake"), in which +# case it prints its new name instead of `make'. +if test "`$am_make -s -f confmf 2> /dev/null | fgrep -v 'ing directory'`" = "done"; then + am__include=include + am__quote= + _am_result=GNU +fi +# Now try BSD make style include. +if test "$am__include" = "#"; then + echo '.include "confinc"' > confmf + if test "`$am_make -s -f confmf 2> /dev/null`" = "done"; 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+ *) cat >> confdefs.h </dev/null`} + case X$UNAME in + *-DOS) lt_cv_sys_path_separator=';' ;; + *) lt_cv_sys_path_separator=':' ;; + esac + PATH_SEPARATOR=$lt_cv_sys_path_separator +fi + +echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6 +echo "configure:1529: checking for Cygwin environment" >&5 +if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext <&5; (eval $ac_compile) 2>&5; }; then + rm -rf conftest* + ac_cv_cygwin=yes +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + ac_cv_cygwin=no +fi +rm -f conftest* +rm -f conftest* +fi + +echo "$ac_t""$ac_cv_cygwin" 1>&6 +CYGWIN= +test "$ac_cv_cygwin" = yes && CYGWIN=yes +echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6 +echo "configure:1562: checking for mingw32 environment" >&5 +if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext <&5; (eval $ac_compile) 2>&5; }; then + rm -rf conftest* + ac_cv_mingw32=yes +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + ac_cv_mingw32=no +fi +rm -f conftest* +rm -f conftest* +fi + +echo "$ac_t""$ac_cv_mingw32" 1>&6 +MINGW32= +test "$ac_cv_mingw32" = yes && MINGW32=yes +echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6 +echo "configure:1591: checking how to run the C preprocessor" >&5 +# On Suns, sometimes $CPP names a directory. +if test -n "$CPP" && test -d "$CPP"; then + CPP= +fi +if test -z "$CPP"; then +if eval "test \"`echo '$''{'ac_cv_prog_CPP'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + # This must be in double quotes, not single quotes, because CPP may get + # substituted into the Makefile and "${CC-cc}" will confuse make. + CPP="${CC-cc} -E" + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. + cat > conftest.$ac_ext < +Syntax Error +EOF +ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" +{ (eval echo configure:1612: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` +if test -z "$ac_err"; then + : +else + echo "$ac_err" >&5 + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + CPP="${CC-cc} -E -traditional-cpp" + cat > conftest.$ac_ext < +Syntax Error +EOF +ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" +{ (eval echo configure:1629: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` +if test -z "$ac_err"; then + : +else + echo "$ac_err" >&5 + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + CPP="${CC-cc} -nologo -E" + cat > conftest.$ac_ext < +Syntax Error +EOF +ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" +{ (eval echo configure:1646: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` +if test -z "$ac_err"; then + : +else + echo "$ac_err" >&5 + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + CPP=/lib/cpp +fi +rm -f conftest* +fi +rm -f conftest* +fi +rm -f conftest* + ac_cv_prog_CPP="$CPP" +fi + CPP="$ac_cv_prog_CPP" +else + ac_cv_prog_CPP="$CPP" +fi +echo "$ac_t""$CPP" 1>&6 + +# Check whether --enable-shared or --disable-shared was given. +if test "${enable_shared+set}" = set; then + enableval="$enable_shared" + p=${PACKAGE-default} +case $enableval in +yes) enable_shared=yes ;; +no) enable_shared=no ;; +*) + enable_shared=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_shared=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac +else + enable_shared=yes +fi + +# Check whether --enable-static or --disable-static was given. +if test "${enable_static+set}" = set; then + enableval="$enable_static" + p=${PACKAGE-default} +case $enableval in +yes) enable_static=yes ;; +no) enable_static=no ;; +*) + enable_static=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_static=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac +else + enable_static=yes +fi + +# Check whether --enable-fast-install or --disable-fast-install was given. +if test "${enable_fast_install+set}" = set; then + enableval="$enable_fast_install" + p=${PACKAGE-default} +case $enableval in +yes) enable_fast_install=yes ;; +no) enable_fast_install=no ;; +*) + enable_fast_install=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_fast_install=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac +else + enable_fast_install=yes +fi + + +# Make sure we can run config.sub. +if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then : +else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; } +fi + +echo $ac_n "checking host system type""... $ac_c" 1>&6 +echo "configure:1746: checking host system type" >&5 + +host_alias=$host +case "$host_alias" in +NONE) + case $nonopt in + NONE) + if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then : + else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; } + fi ;; + *) host_alias=$nonopt ;; + esac ;; +esac + +host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias` +host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'` +host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'` +host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` +echo "$ac_t""$host" 1>&6 + +echo $ac_n "checking build system type""... $ac_c" 1>&6 +echo "configure:1767: checking build system type" >&5 + +build_alias=$build +case "$build_alias" in +NONE) + case $nonopt in + NONE) build_alias=$host_alias ;; + *) build_alias=$nonopt ;; + esac ;; +esac + +build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias` +build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'` +build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'` +build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` +echo "$ac_t""$build" 1>&6 + +# Check whether --with-gnu-ld or --without-gnu-ld was given. +if test "${with_gnu_ld+set}" = set; then + withval="$with_gnu_ld" + test "$withval" = no || with_gnu_ld=yes +else + with_gnu_ld=no +fi + +ac_prog=ld +if test "$GCC" = yes; then + # Check if gcc -print-prog-name=ld gives a path. + echo $ac_n "checking for ld used by GCC""... $ac_c" 1>&6 +echo "configure:1796: checking for ld used by GCC" >&5 + case $host in + *-*-mingw*) + # gcc leaves a trailing carriage return which upsets mingw + ac_prog=`($CC -print-prog-name=ld) 2>&5 | tr -d '\015'` ;; + *) + ac_prog=`($CC -print-prog-name=ld) 2>&5` ;; + esac + case $ac_prog in + # Accept absolute paths. + [\\/]* | [A-Za-z]:[\\/]*) + re_direlt='/[^/][^/]*/\.\./' + # Canonicalize the path of ld + ac_prog=`echo $ac_prog| sed 's%\\\\%/%g'` + while echo $ac_prog | grep "$re_direlt" > /dev/null 2>&1; do + ac_prog=`echo $ac_prog| sed "s%$re_direlt%/%"` + done + test -z "$LD" && LD="$ac_prog" + ;; + "") + # If it fails, then pretend we aren't using GCC. + ac_prog=ld + ;; + *) + # If it is relative, then search for the first ld in PATH. + with_gnu_ld=unknown + ;; + esac +elif test "$with_gnu_ld" = yes; then + echo $ac_n "checking for GNU ld""... $ac_c" 1>&6 +echo "configure:1826: checking for GNU ld" >&5 +else + echo $ac_n "checking for non-GNU ld""... $ac_c" 1>&6 +echo "configure:1829: checking for non-GNU ld" >&5 +fi +if eval "test \"`echo '$''{'lt_cv_path_LD'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -z "$LD"; then + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for ac_dir in $PATH; do + test -z "$ac_dir" && ac_dir=. + if test -f "$ac_dir/$ac_prog" || test -f "$ac_dir/$ac_prog$ac_exeext"; then + lt_cv_path_LD="$ac_dir/$ac_prog" + # Check to see if the program is GNU ld. I'd rather use --version, + # but apparently some GNU ld's only accept -v. + # Break only if it was the GNU/non-GNU ld that we prefer. + if "$lt_cv_path_LD" -v 2>&1 < /dev/null | egrep '(GNU|with BFD)' > /dev/null; then + test "$with_gnu_ld" != no && break + else + test "$with_gnu_ld" != yes && break + fi + fi + done + IFS="$ac_save_ifs" +else + lt_cv_path_LD="$LD" # Let the user override the test with a path. +fi +fi + +LD="$lt_cv_path_LD" +if test -n "$LD"; then + echo "$ac_t""$LD" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi +test -z "$LD" && { echo "configure: error: no acceptable ld found in \$PATH" 1>&2; exit 1; } +echo $ac_n "checking if the linker ($LD) is GNU ld""... $ac_c" 1>&6 +echo "configure:1864: checking if the linker ($LD) is GNU ld" >&5 +if eval "test \"`echo '$''{'lt_cv_prog_gnu_ld'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + # I'd rather use --version here, but apparently some GNU ld's only accept -v. +if $LD -v 2>&1 &5; then + lt_cv_prog_gnu_ld=yes +else + lt_cv_prog_gnu_ld=no +fi +fi + +echo "$ac_t""$lt_cv_prog_gnu_ld" 1>&6 +with_gnu_ld=$lt_cv_prog_gnu_ld + + +echo $ac_n "checking for $LD option to reload object files""... $ac_c" 1>&6 +echo "configure:1881: checking for $LD option to reload object files" >&5 +if eval "test \"`echo '$''{'lt_cv_ld_reload_flag'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + lt_cv_ld_reload_flag='-r' +fi + +echo "$ac_t""$lt_cv_ld_reload_flag" 1>&6 +reload_flag=$lt_cv_ld_reload_flag +test -n "$reload_flag" && reload_flag=" $reload_flag" + +echo $ac_n "checking for BSD-compatible nm""... $ac_c" 1>&6 +echo "configure:1893: checking for BSD-compatible nm" >&5 +if eval "test \"`echo '$''{'lt_cv_path_NM'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$NM"; then + # Let the user override the test. + lt_cv_path_NM="$NM" +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for ac_dir in $PATH /usr/ccs/bin /usr/ucb /bin; do + test -z "$ac_dir" && ac_dir=. + tmp_nm=$ac_dir/${ac_tool_prefix}nm + if test -f $tmp_nm || test -f $tmp_nm$ac_exeext ; then + # Check to see if the nm accepts a BSD-compat flag. + # Adding the `sed 1q' prevents false positives on HP-UX, which says: + # nm: unknown option "B" ignored + # Tru64's nm complains that /dev/null is an invalid object file + if ($tmp_nm -B /dev/null 2>&1 | sed '1q'; exit 0) | egrep '(/dev/null|Invalid file or object type)' >/dev/null; then + lt_cv_path_NM="$tmp_nm -B" + break + elif ($tmp_nm -p /dev/null 2>&1 | sed '1q'; exit 0) | egrep /dev/null >/dev/null; then + lt_cv_path_NM="$tmp_nm -p" + break + else + lt_cv_path_NM=${lt_cv_path_NM="$tmp_nm"} # keep the first match, but + continue # so that we can try to find one that supports BSD flags + fi + fi + done + IFS="$ac_save_ifs" + test -z "$lt_cv_path_NM" && lt_cv_path_NM=nm +fi +fi + +NM="$lt_cv_path_NM" +echo "$ac_t""$NM" 1>&6 + +echo $ac_n "checking whether ln -s works""... $ac_c" 1>&6 +echo "configure:1931: checking whether ln -s works" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_LN_S'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + rm -f conftestdata +if ln -s X conftestdata 2>/dev/null +then + rm -f conftestdata + ac_cv_prog_LN_S="ln -s" +else + ac_cv_prog_LN_S=ln +fi +fi +LN_S="$ac_cv_prog_LN_S" +if test "$ac_cv_prog_LN_S" = "ln -s"; then + echo "$ac_t""yes" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + +echo $ac_n "checking how to recognise dependant libraries""... $ac_c" 1>&6 +echo "configure:1952: checking how to recognise dependant libraries" >&5 +if eval "test \"`echo '$''{'lt_cv_deplibs_check_method'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + lt_cv_file_magic_cmd='$MAGIC_CMD' +lt_cv_file_magic_test_file= +lt_cv_deplibs_check_method='unknown' +# Need to set the preceding variable on all platforms that support +# interlibrary dependencies. +# 'none' -- dependencies not supported. +# `unknown' -- same as none, but documents that we really don't know. +# 'pass_all' -- all dependencies passed with no checks. +# 'test_compile' -- check by making test program. +# 'file_magic [[regex]]' -- check by looking for files in library path +# which responds to the $file_magic_cmd with a given egrep regex. +# If you have `file' or equivalent on your system and you're not sure +# whether `pass_all' will *always* work, you probably want this one. + +case $host_os in +aix4* | aix5*) + lt_cv_deplibs_check_method=pass_all + ;; + +beos*) + lt_cv_deplibs_check_method=pass_all + ;; + +bsdi4*) + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (shared object|dynamic lib)' + lt_cv_file_magic_cmd='/usr/bin/file -L' + lt_cv_file_magic_test_file=/shlib/libc.so + ;; + +cygwin* | mingw* | pw32*) + lt_cv_deplibs_check_method='file_magic file format pei*-i386(.*architecture: i386)?' + lt_cv_file_magic_cmd='$OBJDUMP -f' + ;; + +darwin* | rhapsody*) + lt_cv_deplibs_check_method='file_magic Mach-O dynamically linked shared library' + lt_cv_file_magic_cmd='/usr/bin/file -L' + case "$host_os" in + rhapsody* | darwin1.[012]) + lt_cv_file_magic_test_file=`echo /System/Library/Frameworks/System.framework/Versions/*/System | head -1` + ;; + *) # Darwin 1.3 on + lt_cv_file_magic_test_file='/usr/lib/libSystem.dylib' + ;; + esac + ;; + +freebsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ > /dev/null; then + case $host_cpu in + i*86 ) + # Not sure whether the presence of OpenBSD here was a mistake. + # Let's accept both of them until this is cleared up. + lt_cv_deplibs_check_method='file_magic (FreeBSD|OpenBSD)/i[3-9]86 (compact )?demand paged shared library' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` + ;; + esac + else + lt_cv_deplibs_check_method=pass_all + fi + ;; + +gnu*) + lt_cv_deplibs_check_method=pass_all + ;; + +hpux10.20*|hpux11*) + lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9].[0-9]) shared library' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=/usr/lib/libc.sl + ;; + +irix5* | irix6* | nonstopux*) + case $host_os in + irix5* | nonstopux*) + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method="file_magic ELF 32-bit MSB dynamic lib MIPS - version 1" + ;; + *) + case $LD in + *-32|*"-32 ") libmagic=32-bit;; + *-n32|*"-n32 ") libmagic=N32;; + *-64|*"-64 ") libmagic=64-bit;; + *) libmagic=never-match;; + esac + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method="file_magic ELF ${libmagic} MSB mips-[1234] dynamic lib MIPS - version 1" + ;; + esac + lt_cv_file_magic_test_file=`echo /lib${libsuff}/libc.so*` + lt_cv_deplibs_check_method=pass_all + ;; + +# This must be Linux ELF. +linux-gnu*) + case $host_cpu in + alpha* | hppa* | i*86 | powerpc* | sparc* | ia64* ) + lt_cv_deplibs_check_method=pass_all ;; + *) + # glibc up to 2.1.1 does not perform some relocations on ARM + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' ;; + esac + lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so` + ;; + +netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ > /dev/null; then + lt_cv_deplibs_check_method='match_pattern /lib[^/\.]+\.so\.[0-9]+\.[0-9]+$' + else + lt_cv_deplibs_check_method='match_pattern /lib[^/\.]+\.so$' + fi + ;; + +newos6*) + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (executable|dynamic lib)' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=/usr/lib/libnls.so + ;; + +openbsd*) + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` + if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB shared object' + else + lt_cv_deplibs_check_method='file_magic OpenBSD.* shared library' + fi + ;; + +osf3* | osf4* | osf5*) + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method='file_magic COFF format alpha shared library' + lt_cv_file_magic_test_file=/shlib/libc.so + lt_cv_deplibs_check_method=pass_all + ;; + +sco3.2v5*) + lt_cv_deplibs_check_method=pass_all + ;; + +solaris*) + lt_cv_deplibs_check_method=pass_all + lt_cv_file_magic_test_file=/lib/libc.so + ;; + +sysv5uw[78]* | sysv4*uw2*) + lt_cv_deplibs_check_method=pass_all + ;; + +sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + case $host_vendor in + motorola) + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (shared object|dynamic lib) M[0-9][0-9]* Version [0-9]' + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so*` + ;; + ncr) + lt_cv_deplibs_check_method=pass_all + ;; + sequent) + lt_cv_file_magic_cmd='/bin/file' + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' + ;; + sni) + lt_cv_file_magic_cmd='/bin/file' + lt_cv_deplibs_check_method="file_magic ELF [0-9][0-9]*-bit [LM]SB dynamic lib" + lt_cv_file_magic_test_file=/lib/libc.so + ;; + esac + ;; +esac + +fi + +echo "$ac_t""$lt_cv_deplibs_check_method" 1>&6 +file_magic_cmd=$lt_cv_file_magic_cmd +deplibs_check_method=$lt_cv_deplibs_check_method + +echo $ac_n "checking for object suffix""... $ac_c" 1>&6 +echo "configure:2135: checking for object suffix" >&5 +if eval "test \"`echo '$''{'ac_cv_objext'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + rm -f conftest* +echo 'int i = 1;' > conftest.$ac_ext +if { (eval echo configure:2141: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then + for ac_file in conftest.*; do + case $ac_file in + *.c) ;; + *) ac_cv_objext=`echo $ac_file | sed -e s/conftest.//` ;; + esac + done +else + { echo "configure: error: installation or configuration problem; compiler does not work" 1>&2; exit 1; } +fi +rm -f conftest* +fi + +echo "$ac_t""$ac_cv_objext" 1>&6 +OBJEXT=$ac_cv_objext +ac_objext=$ac_cv_objext + + + +echo $ac_n "checking for executable suffix""... $ac_c" 1>&6 +echo "configure:2161: checking for executable suffix" >&5 +if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test "$CYGWIN" = yes || test "$MINGW32" = yes; then + ac_cv_exeext=.exe +else + rm -f conftest* + echo 'int main () { return 0; }' > conftest.$ac_ext + ac_cv_exeext= + if { (eval echo configure:2171: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then + for file in conftest.*; do + case $file in + *.c | *.o | *.obj) ;; + *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;; + esac + done + else + { echo "configure: error: installation or configuration problem: compiler cannot create executables." 1>&2; exit 1; } + fi + rm -f conftest* + test x"${ac_cv_exeext}" = x && ac_cv_exeext=no +fi +fi + +EXEEXT="" +test x"${ac_cv_exeext}" != xno && EXEEXT=${ac_cv_exeext} +echo "$ac_t""${ac_cv_exeext}" 1>&6 +ac_exeext=$EXEEXT + +if test $host != $build; then + ac_tool_prefix=${host_alias}- +else + ac_tool_prefix= +fi + + + + +# Check for command to grab the raw symbol name followed by C symbol from nm. +echo $ac_n "checking command to parse $NM output""... $ac_c" 1>&6 +echo "configure:2202: checking command to parse $NM output" >&5 +if eval "test \"`echo '$''{'lt_cv_sys_global_symbol_pipe'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + +# These are sane defaults that work on at least a few old systems. +# [They come from Ultrix. What could be older than Ultrix?!! ;)] + +# Character class describing NM global symbol codes. +symcode='[BCDEGRST]' + +# Regexp to match symbols that can be accessed directly from C. +sympat='\([_A-Za-z][_A-Za-z0-9]*\)' + +# Transform the above into a raw symbol and a C symbol. +symxfrm='\1 \2\3 \3' + +# Transform an extracted symbol line into a proper C declaration +lt_cv_global_symbol_to_cdecl="sed -n -e 's/^. .* \(.*\)$/extern char \1;/p'" + +# Transform an extracted symbol line into symbol name and symbol address +lt_cv_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\) $/ {\\\"\1\\\", (lt_ptr) 0},/p' -e 's/^$symcode \([^ ]*\) \([^ ]*\)$/ {\"\2\", (lt_ptr) \&\2},/p'" + +# Define system-specific variables. +case $host_os in +aix*) + symcode='[BCDT]' + ;; +cygwin* | mingw* | pw32*) + symcode='[ABCDGISTW]' + ;; +hpux*) # Its linker distinguishes data from code symbols + lt_cv_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern char \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'" + lt_cv_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\) $/ {\\\"\1\\\", (lt_ptr) 0},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/ {\"\2\", (lt_ptr) \&\2},/p'" + ;; +irix* | nonstopux*) + symcode='[BCDEGRST]' + ;; +solaris* | sysv5*) + symcode='[BDT]' + ;; +sysv4) + symcode='[DFNSTU]' + ;; +esac + +# Handle CRLF in mingw tool chain +opt_cr= +case $host_os in +mingw*) + opt_cr=`echo 'x\{0,1\}' | tr x '\015'` # option cr in regexp + ;; +esac + +# If we're using GNU nm, then use its standard symbol codes. +if $NM -V 2>&1 | egrep '(GNU|with BFD)' > /dev/null; then + symcode='[ABCDGISTW]' +fi + +# Try without a prefix undercore, then with it. +for ac_symprfx in "" "_"; do + + # Write the raw and C identifiers. +lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[ ]\($symcode$symcode*\)[ ][ ]*\($ac_symprfx\)$sympat$opt_cr$/$symxfrm/p'" + + # Check to see that the pipe works correctly. + pipe_works=no + rm -f conftest* + cat > conftest.$ac_ext <&5; (eval $ac_compile) 2>&5; }; then + # Now try to grab the symbols. + nlist=conftest.nm + if { (eval echo configure:2285: \"$NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist\") 1>&5; (eval $NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist) 2>&5; } && test -s "$nlist"; then + # Try sorting and uniquifying the output. + if sort "$nlist" | uniq > "$nlist"T; then + mv -f "$nlist"T "$nlist" + else + rm -f "$nlist"T + fi + + # Make sure that we snagged all the symbols we need. + if egrep ' nm_test_var$' "$nlist" >/dev/null; then + if egrep ' nm_test_func$' "$nlist" >/dev/null; then + cat < conftest.$ac_ext +#ifdef __cplusplus +extern "C" { +#endif + +EOF + # Now generate the symbol file. + eval "$lt_cv_global_symbol_to_cdecl"' < "$nlist" >> conftest.$ac_ext' + + cat <> conftest.$ac_ext +#if defined (__STDC__) && __STDC__ +# define lt_ptr void * +#else +# define lt_ptr char * +# define const +#endif + +/* The mapping between symbol names and symbols. */ +const struct { + const char *name; + lt_ptr address; +} +lt_preloaded_symbols[] = +{ +EOF + sed "s/^$symcode$symcode* \(.*\) \(.*\)$/ {\"\2\", (lt_ptr) \&\2},/" < "$nlist" >> conftest.$ac_ext + cat <<\EOF >> conftest.$ac_ext + {0, (lt_ptr) 0} +}; + +#ifdef __cplusplus +} +#endif +EOF + # Now try linking the two files. + mv conftest.$ac_objext conftstm.$ac_objext + save_LIBS="$LIBS" + save_CFLAGS="$CFLAGS" + LIBS="conftstm.$ac_objext" + CFLAGS="$CFLAGS$no_builtin_flag" + if { (eval echo configure:2336: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then + pipe_works=yes + fi + LIBS="$save_LIBS" + CFLAGS="$save_CFLAGS" + else + echo "cannot find nm_test_func in $nlist" >&5 + fi + else + echo "cannot find nm_test_var in $nlist" >&5 + fi + else + echo "cannot run $lt_cv_sys_global_symbol_pipe" >&5 + fi + else + echo "$progname: failed program was:" >&5 + cat conftest.$ac_ext >&5 + fi + rm -f conftest* conftst* + + # Do not use the global_symbol_pipe unless it works. + if test "$pipe_works" = yes; then + break + else + lt_cv_sys_global_symbol_pipe= + fi +done + +fi + +global_symbol_pipe="$lt_cv_sys_global_symbol_pipe" +if test -z "$lt_cv_sys_global_symbol_pipe"; then + global_symbol_to_cdecl= + global_symbol_to_c_name_address= +else + global_symbol_to_cdecl="$lt_cv_global_symbol_to_cdecl" + global_symbol_to_c_name_address="$lt_cv_global_symbol_to_c_name_address" +fi +if test -z "$global_symbol_pipe$global_symbol_to_cdec$global_symbol_to_c_name_address"; +then + echo "$ac_t""failed" 1>&6 +else + echo "$ac_t""ok" 1>&6 +fi + +for ac_hdr in dlfcn.h +do +ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` +echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 +echo "configure:2385: checking for $ac_hdr" >&5 +if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +EOF +ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" +{ (eval echo configure:2395: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` +if test -z "$ac_err"; then + rm -rf conftest* + eval "ac_cv_header_$ac_safe=yes" +else + echo "$ac_err" >&5 + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_header_$ac_safe=no" +fi +rm -f conftest* +fi +if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then + echo "$ac_t""yes" 1>&6 + ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'` + cat >> confdefs.h <&6 +fi +done + + + + + +# Only perform the check for file, if the check method requires it +case $deplibs_check_method in +file_magic*) + if test "$file_magic_cmd" = '$MAGIC_CMD'; then + echo $ac_n "checking for ${ac_tool_prefix}file""... $ac_c" 1>&6 +echo "configure:2430: checking for ${ac_tool_prefix}file" >&5 +if eval "test \"`echo '$''{'lt_cv_path_MAGIC_CMD'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + case $MAGIC_CMD in + /*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a path. + ;; + ?:/*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a dos path. + ;; + *) + ac_save_MAGIC_CMD="$MAGIC_CMD" + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="/usr/bin:$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/${ac_tool_prefix}file; then + lt_cv_path_MAGIC_CMD="$ac_dir/${ac_tool_prefix}file" + if test -n "$file_magic_test_file"; then + case $deplibs_check_method in + "file_magic "*) + file_magic_regex="`expr \"$deplibs_check_method\" : \"file_magic \(.*\)\"`" + MAGIC_CMD="$lt_cv_path_MAGIC_CMD" + if eval $file_magic_cmd \$file_magic_test_file 2> /dev/null | + egrep "$file_magic_regex" > /dev/null; then + : + else + cat <&2 + +*** Warning: the command libtool uses to detect shared libraries, +*** $file_magic_cmd, produces output that libtool cannot recognize. +*** The result is that libtool may fail to recognize shared libraries +*** as such. This will affect the creation of libtool libraries that +*** depend on shared libraries, but programs linked with such libtool +*** libraries will work regardless of this problem. Nevertheless, you +*** may want to report the problem to your system manager and/or to +*** bug-libtool@gnu.org + +EOF + fi ;; + esac + fi + break + fi + done + IFS="$ac_save_ifs" + MAGIC_CMD="$ac_save_MAGIC_CMD" + ;; +esac +fi + +MAGIC_CMD="$lt_cv_path_MAGIC_CMD" +if test -n "$MAGIC_CMD"; then + echo "$ac_t""$MAGIC_CMD" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + +if test -z "$lt_cv_path_MAGIC_CMD"; then + if test -n "$ac_tool_prefix"; then + echo $ac_n "checking for file""... $ac_c" 1>&6 +echo "configure:2492: checking for file" >&5 +if eval "test \"`echo '$''{'lt_cv_path_MAGIC_CMD'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + case $MAGIC_CMD in + /*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a path. + ;; + ?:/*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a dos path. + ;; + *) + ac_save_MAGIC_CMD="$MAGIC_CMD" + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="/usr/bin:$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/file; then + lt_cv_path_MAGIC_CMD="$ac_dir/file" + if test -n "$file_magic_test_file"; then + case $deplibs_check_method in + "file_magic "*) + file_magic_regex="`expr \"$deplibs_check_method\" : \"file_magic \(.*\)\"`" + MAGIC_CMD="$lt_cv_path_MAGIC_CMD" + if eval $file_magic_cmd \$file_magic_test_file 2> /dev/null | + egrep "$file_magic_regex" > /dev/null; then + : + else + cat <&2 + +*** Warning: the command libtool uses to detect shared libraries, +*** $file_magic_cmd, produces output that libtool cannot recognize. +*** The result is that libtool may fail to recognize shared libraries +*** as such. This will affect the creation of libtool libraries that +*** depend on shared libraries, but programs linked with such libtool +*** libraries will work regardless of this problem. Nevertheless, you +*** may want to report the problem to your system manager and/or to +*** bug-libtool@gnu.org + +EOF + fi ;; + esac + fi + break + fi + done + IFS="$ac_save_ifs" + MAGIC_CMD="$ac_save_MAGIC_CMD" + ;; +esac +fi + +MAGIC_CMD="$lt_cv_path_MAGIC_CMD" +if test -n "$MAGIC_CMD"; then + echo "$ac_t""$MAGIC_CMD" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + + else + MAGIC_CMD=: + fi +fi + + fi + ;; +esac + +# Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. +set dummy ${ac_tool_prefix}ranlib; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:2563: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$RANLIB"; then + ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" + break + fi + done + IFS="$ac_save_ifs" +fi +fi +RANLIB="$ac_cv_prog_RANLIB" +if test -n "$RANLIB"; then + echo "$ac_t""$RANLIB" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + + +if test -z "$ac_cv_prog_RANLIB"; then +if test -n "$ac_tool_prefix"; then + # Extract the first word of "ranlib", so it can be a program name with args. +set dummy ranlib; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:2595: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$RANLIB"; then + ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_RANLIB="ranlib" + break + fi + done + IFS="$ac_save_ifs" + test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":" +fi +fi +RANLIB="$ac_cv_prog_RANLIB" +if test -n "$RANLIB"; then + echo "$ac_t""$RANLIB" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + +else + RANLIB=":" +fi +fi + +# Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args. +set dummy ${ac_tool_prefix}strip; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:2630: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_STRIP'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$STRIP"; then + ac_cv_prog_STRIP="$STRIP" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_STRIP="${ac_tool_prefix}strip" + break + fi + done + IFS="$ac_save_ifs" +fi +fi +STRIP="$ac_cv_prog_STRIP" +if test -n "$STRIP"; then + echo "$ac_t""$STRIP" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + + +if test -z "$ac_cv_prog_STRIP"; then +if test -n "$ac_tool_prefix"; then + # Extract the first word of "strip", so it can be a program name with args. +set dummy strip; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:2662: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_STRIP'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$STRIP"; then + ac_cv_prog_STRIP="$STRIP" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_STRIP="strip" + break + fi + done + IFS="$ac_save_ifs" + test -z "$ac_cv_prog_STRIP" && ac_cv_prog_STRIP=":" +fi +fi +STRIP="$ac_cv_prog_STRIP" +if test -n "$STRIP"; then + echo "$ac_t""$STRIP" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + +else + STRIP=":" +fi +fi + + +enable_dlopen=no +enable_win32_dll=yes + +# Check whether --enable-libtool-lock or --disable-libtool-lock was given. +if test "${enable_libtool_lock+set}" = set; then + enableval="$enable_libtool_lock" + : +fi + +test "x$enable_libtool_lock" != xno && enable_libtool_lock=yes + +# Some flags need to be propagated to the compiler or linker for good +# libtool support. +case $host in +*-*-irix6*) + # Find out which ABI we are using. + echo '#line 2711 "configure"' > conftest.$ac_ext + if { (eval echo configure:2712: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then + case `/usr/bin/file conftest.$ac_objext` in + *32-bit*) + LD="${LD-ld} -32" + ;; + *N32*) + LD="${LD-ld} -n32" + ;; + *64-bit*) + LD="${LD-ld} -64" + ;; + esac + fi + rm -rf conftest* + ;; + +*-*-sco3.2v5*) + # On SCO OpenServer 5, we need -belf to get full-featured binaries. + SAVE_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -belf" + echo $ac_n "checking whether the C compiler needs -belf""... $ac_c" 1>&6 +echo "configure:2733: checking whether the C compiler needs -belf" >&5 +if eval "test \"`echo '$''{'lt_cv_cc_needs_belf'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + + ac_ext=c +# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. +ac_cpp='$CPP $CPPFLAGS' +ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5' +ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5' +cross_compiling=$ac_cv_prog_cc_cross + + cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + lt_cv_cc_needs_belf=yes +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + lt_cv_cc_needs_belf=no +fi +rm -f conftest* + ac_ext=c +# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. +ac_cpp='$CPP $CPPFLAGS' +ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5' +ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5' +cross_compiling=$ac_cv_prog_cc_cross + +fi + +echo "$ac_t""$lt_cv_cc_needs_belf" 1>&6 + if test x"$lt_cv_cc_needs_belf" != x"yes"; then + # this is probably gcc 2.8.0, egcs 1.0 or newer; no need for -belf + CFLAGS="$SAVE_CFLAGS" + fi + ;; + +*-*-cygwin* | *-*-mingw* | *-*-pw32*) + # Extract the first word of "${ac_tool_prefix}dlltool", so it can be a program name with args. +set dummy ${ac_tool_prefix}dlltool; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:2783: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$DLLTOOL"; then + ac_cv_prog_DLLTOOL="$DLLTOOL" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_DLLTOOL="${ac_tool_prefix}dlltool" + break + fi + done + IFS="$ac_save_ifs" +fi +fi +DLLTOOL="$ac_cv_prog_DLLTOOL" +if test -n "$DLLTOOL"; then + echo "$ac_t""$DLLTOOL" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + + +if test -z "$ac_cv_prog_DLLTOOL"; then +if test -n "$ac_tool_prefix"; then + # Extract the first word of "dlltool", so it can be a program name with args. +set dummy dlltool; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:2815: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$DLLTOOL"; then + ac_cv_prog_DLLTOOL="$DLLTOOL" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_DLLTOOL="dlltool" + break + fi + done + IFS="$ac_save_ifs" + test -z "$ac_cv_prog_DLLTOOL" && ac_cv_prog_DLLTOOL="false" +fi +fi +DLLTOOL="$ac_cv_prog_DLLTOOL" +if test -n "$DLLTOOL"; then + echo "$ac_t""$DLLTOOL" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + +else + DLLTOOL="false" +fi +fi + + # Extract the first word of "${ac_tool_prefix}as", so it can be a program name with args. +set dummy ${ac_tool_prefix}as; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:2850: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_AS'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$AS"; then + ac_cv_prog_AS="$AS" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_AS="${ac_tool_prefix}as" + break + fi + done + IFS="$ac_save_ifs" +fi +fi +AS="$ac_cv_prog_AS" +if test -n "$AS"; then + echo "$ac_t""$AS" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + + +if test -z "$ac_cv_prog_AS"; then +if test -n "$ac_tool_prefix"; then + # Extract the first word of "as", so it can be a program name with args. +set dummy as; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:2882: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_AS'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$AS"; then + ac_cv_prog_AS="$AS" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_AS="as" + break + fi + done + IFS="$ac_save_ifs" + test -z "$ac_cv_prog_AS" && ac_cv_prog_AS="false" +fi +fi +AS="$ac_cv_prog_AS" +if test -n "$AS"; then + echo "$ac_t""$AS" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + +else + AS="false" +fi +fi + + # Extract the first word of "${ac_tool_prefix}objdump", so it can be a program name with args. +set dummy ${ac_tool_prefix}objdump; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:2917: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$OBJDUMP"; then + ac_cv_prog_OBJDUMP="$OBJDUMP" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_OBJDUMP="${ac_tool_prefix}objdump" + break + fi + done + IFS="$ac_save_ifs" +fi +fi +OBJDUMP="$ac_cv_prog_OBJDUMP" +if test -n "$OBJDUMP"; then + echo "$ac_t""$OBJDUMP" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + + +if test -z "$ac_cv_prog_OBJDUMP"; then +if test -n "$ac_tool_prefix"; then + # Extract the first word of "objdump", so it can be a program name with args. +set dummy objdump; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:2949: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$OBJDUMP"; then + ac_cv_prog_OBJDUMP="$OBJDUMP" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" + ac_dummy="$PATH" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_OBJDUMP="objdump" + break + fi + done + IFS="$ac_save_ifs" + test -z "$ac_cv_prog_OBJDUMP" && ac_cv_prog_OBJDUMP="false" +fi +fi +OBJDUMP="$ac_cv_prog_OBJDUMP" +if test -n "$OBJDUMP"; then + echo "$ac_t""$OBJDUMP" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + +else + OBJDUMP="false" +fi +fi + + + # recent cygwin and mingw systems supply a stub DllMain which the user + # can override, but on older systems we have to supply one + echo $ac_n "checking if libtool should supply DllMain function""... $ac_c" 1>&6 +echo "configure:2985: checking if libtool should supply DllMain function" >&5 +if eval "test \"`echo '$''{'lt_cv_need_dllmain'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + lt_cv_need_dllmain=no +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + lt_cv_need_dllmain=yes +fi +rm -f conftest* +fi + +echo "$ac_t""$lt_cv_need_dllmain" 1>&6 + + case $host/$CC in + *-*-cygwin*/gcc*-mno-cygwin*|*-*-mingw*) + # old mingw systems require "-dll" to link a DLL, while more recent ones + # require "-mdll" + SAVE_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -mdll" + echo $ac_n "checking how to link DLLs""... $ac_c" 1>&6 +echo "configure:3019: checking how to link DLLs" >&5 +if eval "test \"`echo '$''{'lt_cv_cc_dll_switch'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + lt_cv_cc_dll_switch=-mdll +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + lt_cv_cc_dll_switch=-dll +fi +rm -f conftest* +fi + +echo "$ac_t""$lt_cv_cc_dll_switch" 1>&6 + CFLAGS="$SAVE_CFLAGS" ;; + *-*-cygwin* | *-*-pw32*) + # cygwin systems need to pass --dll to the linker, and not link + # crt.o which will require a WinMain@16 definition. + lt_cv_cc_dll_switch="-Wl,--dll -nostartfiles" ;; + esac + ;; + +esac + +# Sed substitution that helps us do robust quoting. It backslashifies +# metacharacters that are still active within double-quoted strings. +Xsed='sed -e s/^X//' +sed_quote_subst='s/\([\\"\\`$\\\\]\)/\\\1/g' + +# Same as above, but do not quote variable references. +double_quote_subst='s/\([\\"\\`\\\\]\)/\\\1/g' + +# Sed substitution to delay expansion of an escaped shell variable in a +# double_quote_subst'ed string. +delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g' + +# Constants: +rm="rm -f" + +# Global variables: +default_ofile=libtool +can_build_shared=yes + +# All known linkers require a `.a' archive for static linking (except M$VC, +# which needs '.lib'). +libext=a +ltmain="$ac_aux_dir/ltmain.sh" +ofile="$default_ofile" +with_gnu_ld="$lt_cv_prog_gnu_ld" +need_locks="$enable_libtool_lock" + +old_CC="$CC" +old_CFLAGS="$CFLAGS" + +# Set sane defaults for various variables +test -z "$AR" && AR=ar +test -z "$AR_FLAGS" && AR_FLAGS=cru +test -z "$AS" && AS=as +test -z "$CC" && CC=cc +test -z "$DLLTOOL" && DLLTOOL=dlltool +test -z "$LD" && LD=ld +test -z "$LN_S" && LN_S="ln -s" +test -z "$MAGIC_CMD" && MAGIC_CMD=file +test -z "$NM" && NM=nm +test -z "$OBJDUMP" && OBJDUMP=objdump +test -z "$RANLIB" && RANLIB=: +test -z "$STRIP" && STRIP=: +test -z "$ac_objext" && ac_objext=o + +if test x"$host" != x"$build"; then + ac_tool_prefix=${host_alias}- +else + ac_tool_prefix= +fi + +# Transform linux* to *-*-linux-gnu*, to support old configure scripts. +case $host_os in +linux-gnu*) ;; +linux*) host=`echo $host | sed 's/^\(.*-.*-linux\)\(.*\)$/\1-gnu\2/'` +esac + +case $host_os in +aix3*) + # AIX sometimes has problems with the GCC collect2 program. For some + # reason, if we set the COLLECT_NAMES environment variable, the problems + # vanish in a puff of smoke. + if test "X${COLLECT_NAMES+set}" != Xset; then + COLLECT_NAMES= + export COLLECT_NAMES + fi + ;; +esac + +# Determine commands to create old-style static archives. +old_archive_cmds='$AR $AR_FLAGS $oldlib$oldobjs$old_deplibs' +old_postinstall_cmds='chmod 644 $oldlib' +old_postuninstall_cmds= + +if test -n "$RANLIB"; then + case $host_os in + openbsd*) + old_postinstall_cmds="\$RANLIB -t \$oldlib~$old_postinstall_cmds" + ;; + *) + old_postinstall_cmds="\$RANLIB \$oldlib~$old_postinstall_cmds" + ;; + esac + old_archive_cmds="$old_archive_cmds~\$RANLIB \$oldlib" +fi + +# Allow CC to be a program name with arguments. +set dummy $CC +compiler="$2" + +echo $ac_n "checking for objdir""... $ac_c" 1>&6 +echo "configure:3145: checking for objdir" >&5 +rm -f .libs 2>/dev/null +mkdir .libs 2>/dev/null +if test -d .libs; then + objdir=.libs +else + # MS-DOS does not allow filenames that begin with a dot. + objdir=_libs +fi +rmdir .libs 2>/dev/null +echo "$ac_t""$objdir" 1>&6 + + +# Check whether --with-pic or --without-pic was given. +if test "${with_pic+set}" = set; then + withval="$with_pic" + pic_mode="$withval" +else + pic_mode=default +fi + +test -z "$pic_mode" && pic_mode=default + +# We assume here that the value for lt_cv_prog_cc_pic will not be cached +# in isolation, and that seeing it set (from the cache) indicates that +# the associated values are set (in the cache) correctly too. +echo $ac_n "checking for $compiler option to produce PIC""... $ac_c" 1>&6 +echo "configure:3172: checking for $compiler option to produce PIC" >&5 +if eval "test \"`echo '$''{'lt_cv_prog_cc_pic'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + lt_cv_prog_cc_pic= + lt_cv_prog_cc_shlib= + lt_cv_prog_cc_wl= + lt_cv_prog_cc_static= + lt_cv_prog_cc_no_builtin= + lt_cv_prog_cc_can_build_shared=$can_build_shared + + if test "$GCC" = yes; then + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static='-static' + + case $host_os in + aix*) + # Below there is a dirty hack to force normal static linking with -ldl + # The problem is because libdl dynamically linked with both libc and + # libC (AIX C++ library), which obviously doesn't included in libraries + # list by gcc. This cause undefined symbols with -static flags. + # This hack allows C programs to be linked with "-static -ldl", but + # not sure about C++ programs. + lt_cv_prog_cc_static="$lt_cv_prog_cc_static ${lt_cv_prog_cc_wl}-lC" + ;; + amigaos*) + # FIXME: we need at least 68020 code to build shared libraries, but + # adding the `-m68020' flag to GCC prevents building anything better, + # like `-m68040'. + lt_cv_prog_cc_pic='-m68020 -resident32 -malways-restore-a4' + ;; + beos* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*) + # PIC is the default for these OSes. + ;; + darwin* | rhapsody*) + # PIC is the default on this platform + # Common symbols not allowed in MH_DYLIB files + lt_cv_prog_cc_pic='-fno-common' + ;; + cygwin* | mingw* | pw32* | os2*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + lt_cv_prog_cc_pic='-DDLL_EXPORT' + ;; + sysv4*MP*) + if test -d /usr/nec; then + lt_cv_prog_cc_pic=-Kconform_pic + fi + ;; + *) + lt_cv_prog_cc_pic='-fPIC' + ;; + esac + else + # PORTME Check for PIC flags for the system compiler. + case $host_os in + aix3* | aix4* | aix5*) + lt_cv_prog_cc_wl='-Wl,' + # All AIX code is PIC. + if test "$host_cpu" = ia64; then + # AIX 5 now supports IA64 processor + lt_cv_prog_cc_static='-Bstatic' + else + lt_cv_prog_cc_static='-bnso -bI:/lib/syscalls.exp' + fi + ;; + + hpux9* | hpux10* | hpux11*) + # Is there a better lt_cv_prog_cc_static that works with the bundled CC? + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static="${lt_cv_prog_cc_wl}-a ${lt_cv_prog_cc_wl}archive" + lt_cv_prog_cc_pic='+Z' + ;; + + irix5* | irix6* | nonstopux*) + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static='-non_shared' + # PIC (with -KPIC) is the default. + ;; + + cygwin* | mingw* | pw32* | os2*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + lt_cv_prog_cc_pic='-DDLL_EXPORT' + ;; + + newsos6) + lt_cv_prog_cc_pic='-KPIC' + lt_cv_prog_cc_static='-Bstatic' + ;; + + osf3* | osf4* | osf5*) + # All OSF/1 code is PIC. + lt_cv_prog_cc_wl='-Wl,' + lt_cv_prog_cc_static='-non_shared' + ;; + + sco3.2v5*) + lt_cv_prog_cc_pic='-Kpic' + lt_cv_prog_cc_static='-dn' + lt_cv_prog_cc_shlib='-belf' + ;; + + solaris*) + lt_cv_prog_cc_pic='-KPIC' + lt_cv_prog_cc_static='-Bstatic' + lt_cv_prog_cc_wl='-Wl,' + ;; + + sunos4*) + lt_cv_prog_cc_pic='-PIC' + lt_cv_prog_cc_static='-Bstatic' + lt_cv_prog_cc_wl='-Qoption ld ' + ;; + + sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + lt_cv_prog_cc_pic='-KPIC' + lt_cv_prog_cc_static='-Bstatic' + if test "x$host_vendor" = xsni; then + lt_cv_prog_cc_wl='-LD' + else + lt_cv_prog_cc_wl='-Wl,' + fi + ;; + + uts4*) + lt_cv_prog_cc_pic='-pic' + lt_cv_prog_cc_static='-Bstatic' + ;; + + sysv4*MP*) + if test -d /usr/nec ;then + lt_cv_prog_cc_pic='-Kconform_pic' + lt_cv_prog_cc_static='-Bstatic' + fi + ;; + + *) + lt_cv_prog_cc_can_build_shared=no + ;; + esac + fi + +fi + +if test -z "$lt_cv_prog_cc_pic"; then + echo "$ac_t""none" 1>&6 +else + echo "$ac_t""$lt_cv_prog_cc_pic" 1>&6 + + # Check to make sure the pic_flag actually works. + echo $ac_n "checking if $compiler PIC flag $lt_cv_prog_cc_pic works""... $ac_c" 1>&6 +echo "configure:3324: checking if $compiler PIC flag $lt_cv_prog_cc_pic works" >&5 + if eval "test \"`echo '$''{'lt_cv_prog_cc_pic_works'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + save_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS $lt_cv_prog_cc_pic -DPIC" + cat > conftest.$ac_ext <&5; (eval $ac_compile) 2>&5; }; then + rm -rf conftest* + case $host_os in + hpux9* | hpux10* | hpux11*) + # On HP-UX, both CC and GCC only warn that PIC is supported... then + # they create non-PIC objects. So, if there were any warnings, we + # assume that PIC is not supported. + if test -s conftest.err; then + lt_cv_prog_cc_pic_works=no + else + lt_cv_prog_cc_pic_works=yes + fi + ;; + *) + lt_cv_prog_cc_pic_works=yes + ;; + esac + +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + lt_cv_prog_cc_pic_works=no + +fi +rm -f conftest* + CFLAGS="$save_CFLAGS" + +fi + + + if test "X$lt_cv_prog_cc_pic_works" = Xno; then + lt_cv_prog_cc_pic= + lt_cv_prog_cc_can_build_shared=no + else + lt_cv_prog_cc_pic=" $lt_cv_prog_cc_pic" + fi + + echo "$ac_t""$lt_cv_prog_cc_pic_works" 1>&6 +fi + +# Check for any special shared library compilation flags. +if test -n "$lt_cv_prog_cc_shlib"; then + echo "configure: warning: \`$CC' requires \`$lt_cv_prog_cc_shlib' to build shared libraries" 1>&2 + if echo "$old_CC $old_CFLAGS " | egrep -e "[ ]$lt_cv_prog_cc_shlib[ ]" >/dev/null; then : + else + echo "configure: warning: add \`$lt_cv_prog_cc_shlib' to the CC or CFLAGS env variable and reconfigure" 1>&2 + lt_cv_prog_cc_can_build_shared=no + fi +fi + +echo $ac_n "checking if $compiler static flag $lt_cv_prog_cc_static works""... $ac_c" 1>&6 +echo "configure:3390: checking if $compiler static flag $lt_cv_prog_cc_static works" >&5 +if eval "test \"`echo '$''{'lt_cv_prog_cc_static_works'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + lt_cv_prog_cc_static_works=no + save_LDFLAGS="$LDFLAGS" + LDFLAGS="$LDFLAGS $lt_cv_prog_cc_static" + cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + lt_cv_prog_cc_static_works=yes +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 +fi +rm -f conftest* + LDFLAGS="$save_LDFLAGS" + +fi + + +# Belt *and* braces to stop my trousers falling down: +test "X$lt_cv_prog_cc_static_works" = Xno && lt_cv_prog_cc_static= +echo "$ac_t""$lt_cv_prog_cc_static_works" 1>&6 + +pic_flag="$lt_cv_prog_cc_pic" +special_shlib_compile_flags="$lt_cv_prog_cc_shlib" +wl="$lt_cv_prog_cc_wl" +link_static_flag="$lt_cv_prog_cc_static" +no_builtin_flag="$lt_cv_prog_cc_no_builtin" +can_build_shared="$lt_cv_prog_cc_can_build_shared" + + +# Check to see if options -o and -c are simultaneously supported by compiler +echo $ac_n "checking if $compiler supports -c -o file.$ac_objext""... $ac_c" 1>&6 +echo "configure:3432: checking if $compiler supports -c -o file.$ac_objext" >&5 +if eval "test \"`echo '$''{'lt_cv_compiler_c_o'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + +$rm -r conftest 2>/dev/null +mkdir conftest +cd conftest +echo "int some_variable = 0;" > conftest.$ac_ext +mkdir out +# According to Tom Tromey, Ian Lance Taylor reported there are C compilers +# that will create temporary files in the current directory regardless of +# the output directory. Thus, making CWD read-only will cause this test +# to fail, enabling locking or at least warning the user not to do parallel +# builds. +chmod -w . +save_CFLAGS="$CFLAGS" +CFLAGS="$CFLAGS -o out/conftest2.$ac_objext" +compiler_c_o=no +if { (eval echo configure:3451: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>out/conftest.err; } && test -s out/conftest2.$ac_objext; then + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s out/conftest.err; then + lt_cv_compiler_c_o=no + else + lt_cv_compiler_c_o=yes + fi +else + # Append any errors to the config.log. + cat out/conftest.err 1>&5 + lt_cv_compiler_c_o=no +fi +CFLAGS="$save_CFLAGS" +chmod u+w . +$rm conftest* out/* +rmdir out +cd .. +rmdir conftest +$rm -r conftest 2>/dev/null + +fi + +compiler_c_o=$lt_cv_compiler_c_o +echo "$ac_t""$compiler_c_o" 1>&6 + +if test x"$compiler_c_o" = x"yes"; then + # Check to see if we can write to a .lo + echo $ac_n "checking if $compiler supports -c -o file.lo""... $ac_c" 1>&6 +echo "configure:3480: checking if $compiler supports -c -o file.lo" >&5 + if eval "test \"`echo '$''{'lt_cv_compiler_o_lo'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + + lt_cv_compiler_o_lo=no + save_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -c -o conftest.lo" + save_objext="$ac_objext" + ac_objext=lo + cat > conftest.$ac_ext <&5; (eval $ac_compile) 2>&5; }; then + rm -rf conftest* + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s conftest.err; then + lt_cv_compiler_o_lo=no + else + lt_cv_compiler_o_lo=yes + fi + +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 +fi +rm -f conftest* + ac_objext="$save_objext" + CFLAGS="$save_CFLAGS" + +fi + + compiler_o_lo=$lt_cv_compiler_o_lo + echo "$ac_t""$compiler_o_lo" 1>&6 +else + compiler_o_lo=no +fi + +# Check to see if we can do hard links to lock some files if needed +hard_links="nottested" +if test "$compiler_c_o" = no && test "$need_locks" != no; then + # do not overwrite the value of need_locks provided by the user + echo $ac_n "checking if we can lock with hard links""... $ac_c" 1>&6 +echo "configure:3529: checking if we can lock with hard links" >&5 + hard_links=yes + $rm conftest* + ln conftest.a conftest.b 2>/dev/null && hard_links=no + touch conftest.a + ln conftest.a conftest.b 2>&5 || hard_links=no + ln conftest.a conftest.b 2>/dev/null && hard_links=no + echo "$ac_t""$hard_links" 1>&6 + if test "$hard_links" = no; then + echo "configure: warning: \`$CC' does not support \`-c -o', so \`make -j' may be unsafe" 1>&2 + need_locks=warn + fi +else + need_locks=no +fi + +if test "$GCC" = yes; then + # Check to see if options -fno-rtti -fno-exceptions are supported by compiler + echo $ac_n "checking if $compiler supports -fno-rtti -fno-exceptions""... $ac_c" 1>&6 +echo "configure:3548: checking if $compiler supports -fno-rtti -fno-exceptions" >&5 + echo "int some_variable = 0;" > conftest.$ac_ext + save_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -fno-rtti -fno-exceptions -c conftest.$ac_ext" + compiler_rtti_exceptions=no + cat > conftest.$ac_ext <&5; (eval $ac_compile) 2>&5; }; then + rm -rf conftest* + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s conftest.err; then + compiler_rtti_exceptions=no + else + compiler_rtti_exceptions=yes + fi + +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 +fi +rm -f conftest* + CFLAGS="$save_CFLAGS" + echo "$ac_t""$compiler_rtti_exceptions" 1>&6 + + if test "$compiler_rtti_exceptions" = "yes"; then + no_builtin_flag=' -fno-builtin -fno-rtti -fno-exceptions' + else + no_builtin_flag=' -fno-builtin' + fi +fi + +# See if the linker supports building shared libraries. +echo $ac_n "checking whether the linker ($LD) supports shared libraries""... $ac_c" 1>&6 +echo "configure:3588: checking whether the linker ($LD) supports shared libraries" >&5 + +allow_undefined_flag= +no_undefined_flag= +need_lib_prefix=unknown +need_version=unknown +# when you set need_version to no, make sure it does not cause -set_version +# flags to be left without arguments +archive_cmds= +archive_expsym_cmds= +old_archive_from_new_cmds= +old_archive_from_expsyms_cmds= +export_dynamic_flag_spec= +whole_archive_flag_spec= +thread_safe_flag_spec= +hardcode_into_libs=no +hardcode_libdir_flag_spec= +hardcode_libdir_separator= +hardcode_direct=no +hardcode_minus_L=no +hardcode_shlibpath_var=unsupported +runpath_var= +link_all_deplibs=unknown +always_export_symbols=no +export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | sed '\''s/.* //'\'' | sort | uniq > $export_symbols' +# include_expsyms should be a list of space-separated symbols to be *always* +# included in the symbol list +include_expsyms= +# exclude_expsyms can be an egrep regular expression of symbols to exclude +# it will be wrapped by ` (' and `)$', so one must not match beginning or +# end of line. Example: `a|bc|.*d.*' will exclude the symbols `a' and `bc', +# as well as any symbol that contains `d'. +exclude_expsyms="_GLOBAL_OFFSET_TABLE_" +# Although _GLOBAL_OFFSET_TABLE_ is a valid symbol C name, most a.out +# platforms (ab)use it in PIC code, but their linkers get confused if +# the symbol is explicitly referenced. Since portable code cannot +# rely on this symbol name, it's probably fine to never include it in +# preloaded symbol tables. +extract_expsyms_cmds= + +case $host_os in +cygwin* | mingw* | pw32*) + # FIXME: the MSVC++ port hasn't been tested in a loooong time + # When not using gcc, we currently assume that we are using + # Microsoft Visual C++. + if test "$GCC" != yes; then + with_gnu_ld=no + fi + ;; +openbsd*) + with_gnu_ld=no + ;; +esac + +ld_shlibs=yes +if test "$with_gnu_ld" = yes; then + # If archive_cmds runs LD, not CC, wlarc should be empty + wlarc='${wl}' + + # See if GNU ld supports shared libraries. + case $host_os in + aix3* | aix4* | aix5*) + # On AIX, the GNU linker is very broken + # Note:Check GNU linker on AIX 5-IA64 when/if it becomes available. + ld_shlibs=no + cat <&2 + +*** Warning: the GNU linker, at least up to release 2.9.1, is reported +*** to be unable to reliably create shared libraries on AIX. +*** Therefore, libtool is disabling shared libraries support. If you +*** really care for shared libraries, you may want to modify your PATH +*** so that a non-GNU linker is found, and then restart. + +EOF + ;; + + amigaos*) + archive_cmds='$rm $output_objdir/a2ixlibrary.data~$echo "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$echo "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$echo "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$echo "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + + # Samuel A. Falvo II reports + # that the semantics of dynamic libraries on AmigaOS, at least up + # to version 4, is to share data among multiple programs linked + # with the same dynamic library. Since this doesn't match the + # behavior of shared libraries on other platforms, we can use + # them. + ld_shlibs=no + ;; + + beos*) + if $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + allow_undefined_flag=unsupported + # Joseph Beckenbach says some releases of gcc + # support --undefined. This deserves some investigation. FIXME + archive_cmds='$CC -nostart $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + else + ld_shlibs=no + fi + ;; + + cygwin* | mingw* | pw32*) + # hardcode_libdir_flag_spec is actually meaningless, as there is + # no search path for DLLs. + hardcode_libdir_flag_spec='-L$libdir' + allow_undefined_flag=unsupported + always_export_symbols=yes + + extract_expsyms_cmds='test -f $output_objdir/impgen.c || \ + sed -e "/^# \/\* impgen\.c starts here \*\//,/^# \/\* impgen.c ends here \*\// { s/^# //;s/^# *$//; p; }" -e d < $''0 > $output_objdir/impgen.c~ + test -f $output_objdir/impgen.exe || (cd $output_objdir && \ + if test "x$HOST_CC" != "x" ; then $HOST_CC -o impgen impgen.c ; \ + else $CC -o impgen impgen.c ; fi)~ + $output_objdir/impgen $dir/$soroot > $output_objdir/$soname-def' + + old_archive_from_expsyms_cmds='$DLLTOOL --as=$AS --dllname $soname --def $output_objdir/$soname-def --output-lib $output_objdir/$newlib' + + # cygwin and mingw dlls have different entry points and sets of symbols + # to exclude. + # FIXME: what about values for MSVC? + dll_entry=__cygwin_dll_entry@12 + dll_exclude_symbols=DllMain@12,_cygwin_dll_entry@12,_cygwin_noncygwin_dll_entry@12~ + case $host_os in + mingw*) + # mingw values + dll_entry=_DllMainCRTStartup@12 + dll_exclude_symbols=DllMain@12,DllMainCRTStartup@12,DllEntryPoint@12~ + ;; + esac + + # mingw and cygwin differ, and it's simplest to just exclude the union + # of the two symbol sets. + dll_exclude_symbols=DllMain@12,_cygwin_dll_entry@12,_cygwin_noncygwin_dll_entry@12,DllMainCRTStartup@12,DllEntryPoint@12 + + # recent cygwin and mingw systems supply a stub DllMain which the user + # can override, but on older systems we have to supply one (in ltdll.c) + if test "x$lt_cv_need_dllmain" = "xyes"; then + ltdll_obj='$output_objdir/$soname-ltdll.'"$ac_objext " + ltdll_cmds='test -f $output_objdir/$soname-ltdll.c || sed -e "/^# \/\* ltdll\.c starts here \*\//,/^# \/\* ltdll.c ends here \*\// { s/^# //; p; }" -e d < $''0 > $output_objdir/$soname-ltdll.c~ + test -f $output_objdir/$soname-ltdll.$ac_objext || (cd $output_objdir && $CC -c $soname-ltdll.c)~' + else + ltdll_obj= + ltdll_cmds= + fi + + # Extract the symbol export list from an `--export-all' def file, + # then regenerate the def file from the symbol export list, so that + # the compiled dll only exports the symbol export list. + # Be careful not to strip the DATA tag left be newer dlltools. + export_symbols_cmds="$ltdll_cmds"' + $DLLTOOL --export-all --exclude-symbols '$dll_exclude_symbols' --output-def $output_objdir/$soname-def '$ltdll_obj'$libobjs $convenience~ + sed -e "1,/EXPORTS/d" -e "s/ @ [0-9]*//" -e "s/ *;.*$//" < $output_objdir/$soname-def > $export_symbols' + + # If the export-symbols file already is a .def file (1st line + # is EXPORTS), use it as is. + # If DATA tags from a recent dlltool are present, honour them! + archive_expsym_cmds='if test "x`head -1 $export_symbols`" = xEXPORTS; then + cp $export_symbols $output_objdir/$soname-def; + else + echo EXPORTS > $output_objdir/$soname-def; + _lt_hint=1; + cat $export_symbols | while read symbol; do + set dummy \$symbol; + case \$# in + 2) echo " \$2 @ \$_lt_hint ; " >> $output_objdir/$soname-def;; + *) echo " \$2 @ \$_lt_hint \$3 ; " >> $output_objdir/$soname-def;; + esac; + _lt_hint=`expr 1 + \$_lt_hint`; + done; + fi~ + '"$ltdll_cmds"' + $CC -Wl,--base-file,$output_objdir/$soname-base '$lt_cv_cc_dll_switch' -Wl,-e,'$dll_entry' -o $output_objdir/$soname '$ltdll_obj'$libobjs $deplibs $compiler_flags~ + $DLLTOOL --as=$AS --dllname $soname --exclude-symbols '$dll_exclude_symbols' --def $output_objdir/$soname-def --base-file $output_objdir/$soname-base --output-exp $output_objdir/$soname-exp~ + $CC -Wl,--base-file,$output_objdir/$soname-base $output_objdir/$soname-exp '$lt_cv_cc_dll_switch' -Wl,-e,'$dll_entry' -o $output_objdir/$soname '$ltdll_obj'$libobjs $deplibs $compiler_flags~ + $DLLTOOL --as=$AS --dllname $soname --exclude-symbols '$dll_exclude_symbols' --def $output_objdir/$soname-def --base-file $output_objdir/$soname-base --output-exp $output_objdir/$soname-exp --output-lib $output_objdir/$libname.dll.a~ + $CC $output_objdir/$soname-exp '$lt_cv_cc_dll_switch' -Wl,-e,'$dll_entry' -o $output_objdir/$soname '$ltdll_obj'$libobjs $deplibs $compiler_flags' + ;; + + netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + archive_cmds='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib' + wlarc= + else + archive_cmds='$CC -shared -nodefaultlibs $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared -nodefaultlibs $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + fi + ;; + + solaris* | sysv5*) + if $LD -v 2>&1 | egrep 'BFD 2\.8' > /dev/null; then + ld_shlibs=no + cat <&2 + +*** Warning: The releases 2.8.* of the GNU linker cannot reliably +*** create shared libraries on Solaris systems. Therefore, libtool +*** is disabling shared libraries support. We urge you to upgrade GNU +*** binutils to release 2.9.1 or newer. Another option is to modify +*** your PATH or compiler configuration so that the native linker is +*** used, and then restart. + +EOF + elif $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + ld_shlibs=no + fi + ;; + + sunos4*) + archive_cmds='$LD -assert pure-text -Bshareable -o $lib $libobjs $deplibs $linker_flags' + wlarc= + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + *) + if $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + ld_shlibs=no + fi + ;; + esac + + if test "$ld_shlibs" = yes; then + runpath_var=LD_RUN_PATH + hardcode_libdir_flag_spec='${wl}--rpath ${wl}$libdir' + export_dynamic_flag_spec='${wl}--export-dynamic' + case $host_os in + cygwin* | mingw* | pw32*) + # dlltool doesn't understand --whole-archive et. al. + whole_archive_flag_spec= + ;; + *) + # ancient GNU ld didn't support --whole-archive et. al. + if $LD --help 2>&1 | egrep 'no-whole-archive' > /dev/null; then + whole_archive_flag_spec="$wlarc"'--whole-archive$convenience '"$wlarc"'--no-whole-archive' + else + whole_archive_flag_spec= + fi + ;; + esac + fi +else + # PORTME fill in a description of your system's linker (not GNU ld) + case $host_os in + aix3*) + allow_undefined_flag=unsupported + always_export_symbols=yes + archive_expsym_cmds='$LD -o $output_objdir/$soname $libobjs $deplibs $linker_flags -bE:$export_symbols -T512 -H512 -bM:SRE~$AR $AR_FLAGS $lib $output_objdir/$soname' + # Note: this linker hardcodes the directories in LIBPATH if there + # are no directories specified by -L. + hardcode_minus_L=yes + if test "$GCC" = yes && test -z "$link_static_flag"; then + # Neither direct hardcoding nor static linking is supported with a + # broken collect2. + hardcode_direct=unsupported + fi + ;; + + aix4* | aix5*) + if test "$host_cpu" = ia64; then + # On IA64, the linker does run time linking by default, so we don't + # have to do anything special. + aix_use_runtimelinking=no + exp_sym_flag='-Bexport' + no_entry_flag="" + else + aix_use_runtimelinking=no + + # Test if we are trying to use run time linking or normal + # AIX style linking. If -brtl is somewhere in LDFLAGS, we + # need to do runtime linking. + case $host_os in aix4.[23]|aix4.[23].*|aix5*) + for ld_flag in $LDFLAGS; do + if (test $ld_flag = "-brtl" || test $ld_flag = "-Wl,-brtl"); then + aix_use_runtimelinking=yes + break + fi + done + esac + + exp_sym_flag='-bexport' + no_entry_flag='-bnoentry' + fi + + # When large executables or shared objects are built, AIX ld can + # have problems creating the table of contents. If linking a library + # or program results in "error TOC overflow" add -mminimal-toc to + # CXXFLAGS/CFLAGS for g++/gcc. In the cases where that is not + # enough to fix the problem, add -Wl,-bbigtoc to LDFLAGS. + + hardcode_direct=yes + archive_cmds='' + hardcode_libdir_separator=':' + if test "$GCC" = yes; then + case $host_os in aix4.[012]|aix4.[012].*) + collect2name=`${CC} -print-prog-name=collect2` + if test -f "$collect2name" && \ + strings "$collect2name" | grep resolve_lib_name >/dev/null + then + # We have reworked collect2 + hardcode_direct=yes + else + # We have old collect2 + hardcode_direct=unsupported + # It fails to find uninstalled libraries when the uninstalled + # path is not listed in the libpath. Setting hardcode_minus_L + # to unsupported forces relinking + hardcode_minus_L=yes + hardcode_libdir_flag_spec='-L$libdir' + hardcode_libdir_separator= + fi + esac + + shared_flag='-shared' + else + # not using gcc + if test "$host_cpu" = ia64; then + shared_flag='${wl}-G' + else + if test "$aix_use_runtimelinking" = yes; then + shared_flag='${wl}-G' + else + shared_flag='${wl}-bM:SRE' + fi + fi + fi + + # It seems that -bexpall can do strange things, so it is better to + # generate a list of symbols to export. + always_export_symbols=yes + if test "$aix_use_runtimelinking" = yes; then + # Warning - without using the other runtime loading flags (-brtl), + # -berok will link without error, but may produce a broken library. + allow_undefined_flag='-berok' + hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:/usr/lib:/lib' + archive_expsym_cmds="\$CC"' -o $output_objdir/$soname $libobjs $deplibs $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then echo "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols $shared_flag" + else + if test "$host_cpu" = ia64; then + hardcode_libdir_flag_spec='${wl}-R $libdir:/usr/lib:/lib' + allow_undefined_flag="-z nodefs" + archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname ${wl}-h$soname $libobjs $deplibs $compiler_flags ${wl}${allow_undefined_flag} '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols" + else + hardcode_libdir_flag_spec='${wl}-bnolibpath ${wl}-blibpath:$libdir:/usr/lib:/lib' + # Warning - without using the other run time loading flags, + # -berok will link without error, but may produce a broken library. + allow_undefined_flag='${wl}-berok' + # This is a bit strange, but is similar to how AIX traditionally builds + # it's shared libraries. + archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs $compiler_flags ${allow_undefined_flag} '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols"' ~$AR -crlo $objdir/$libname$release.a $objdir/$soname' + fi + fi + ;; + + amigaos*) + archive_cmds='$rm $output_objdir/a2ixlibrary.data~$echo "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$echo "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$echo "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$echo "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + # see comment about different semantics on the GNU ld section + ld_shlibs=no + ;; + + cygwin* | mingw* | pw32*) + # When not using gcc, we currently assume that we are using + # Microsoft Visual C++. + # hardcode_libdir_flag_spec is actually meaningless, as there is + # no search path for DLLs. + hardcode_libdir_flag_spec=' ' + allow_undefined_flag=unsupported + # Tell ltmain to make .lib files, not .a files. + libext=lib + # FIXME: Setting linknames here is a bad hack. + archive_cmds='$CC -o $lib $libobjs $compiler_flags `echo "$deplibs" | sed -e '\''s/ -lc$//'\''` -link -dll~linknames=' + # The linker will automatically build a .lib file if we build a DLL. + old_archive_from_new_cmds='true' + # FIXME: Should let the user specify the lib program. + old_archive_cmds='lib /OUT:$oldlib$oldobjs$old_deplibs' + fix_srcfile_path='`cygpath -w "$srcfile"`' + ;; + + darwin* | rhapsody*) + case "$host_os" in + rhapsody* | darwin1.[012]) + allow_undefined_flag='-undefined suppress' + ;; + *) # Darwin 1.3 on + allow_undefined_flag='-flat_namespace -undefined suppress' + ;; + esac + # FIXME: Relying on posixy $() will cause problems for + # cross-compilation, but unfortunately the echo tests do not + # yet detect zsh echo's removal of \ escapes. Also zsh mangles + # `"' quotes if we put them in here... so don't! + archive_cmds='$nonopt $(test .$module = .yes && echo -bundle || echo -dynamiclib) $allow_undefined_flag -o $lib $libobjs $deplibs$linker_flags -install_name $rpath/$soname $verstring' + # We need to add '_' to the symbols in $export_symbols first + #archive_expsym_cmds="$archive_cmds"' && strip -s $export_symbols' + hardcode_direct=yes + hardcode_shlibpath_var=no + whole_archive_flag_spec='-all_load $convenience' + ;; + + freebsd1*) + ld_shlibs=no + ;; + + # FreeBSD 2.2.[012] allows us to include c++rt0.o to get C++ constructor + # support. Future versions do this automatically, but an explicit c++rt0.o + # does not break anything, and helps significantly (at the cost of a little + # extra space). + freebsd2.2*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags /usr/lib/c++rt0.o' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + # Unfortunately, older versions of FreeBSD 2 do not have this feature. + freebsd2*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_minus_L=yes + hardcode_shlibpath_var=no + ;; + + # FreeBSD 3 and greater uses gcc -shared to do shared libraries. + freebsd*) + archive_cmds='$CC -shared -o $lib $libobjs $deplibs $compiler_flags' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + hpux9* | hpux10* | hpux11*) + case $host_os in + hpux9*) archive_cmds='$rm $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib' ;; + *) archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags' ;; + esac + hardcode_libdir_flag_spec='${wl}+b ${wl}$libdir' + hardcode_libdir_separator=: + hardcode_direct=yes + hardcode_minus_L=yes # Not in the search PATH, but as the default + # location of the library. + export_dynamic_flag_spec='${wl}-E' + ;; + + irix5* | irix6* | nonstopux*) + if test "$GCC" = yes; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + else + archive_cmds='$LD -shared $libobjs $deplibs $linker_flags -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib' + fi + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + link_all_deplibs=yes + ;; + + netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' # a.out + else + archive_cmds='$LD -shared -o $lib $libobjs $deplibs $linker_flags' # ELF + fi + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + newsos6) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + hardcode_shlibpath_var=no + ;; + + openbsd*) + hardcode_direct=yes + hardcode_shlibpath_var=no + if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='${wl}-rpath,$libdir' + export_dynamic_flag_spec='${wl}-E' + else + case "$host_os" in + openbsd[01].* | openbsd2.[0-7] | openbsd2.[0-7].*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-R$libdir' + ;; + *) + archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='${wl}-rpath,$libdir' + ;; + esac + fi + ;; + + os2*) + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + allow_undefined_flag=unsupported + archive_cmds='$echo "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$echo "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~$echo DATA >> $output_objdir/$libname.def~$echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~$echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def' + old_archive_from_new_cmds='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def' + ;; + + osf3*) + if test "$GCC" = yes; then + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + else + allow_undefined_flag=' -expect_unresolved \*' + archive_cmds='$LD -shared${allow_undefined_flag} $libobjs $deplibs $linker_flags -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib' + fi + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + ;; + + osf4* | osf5*) # as osf3* with the addition of -msym flag + if test "$GCC" = yes; then + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + else + allow_undefined_flag=' -expect_unresolved \*' + archive_cmds='$LD -shared${allow_undefined_flag} $libobjs $deplibs $linker_flags -msym -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib' + archive_expsym_cmds='for i in `cat $export_symbols`; do printf "-exported_symbol " >> $lib.exp; echo "\$i" >> $lib.exp; done; echo "-hidden">> $lib.exp~ + $LD -shared${allow_undefined_flag} -input $lib.exp $linker_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${objdir}/so_locations -o $lib~$rm $lib.exp' + + #Both c and cxx compiler support -rpath directly + hardcode_libdir_flag_spec='-rpath $libdir' + fi + hardcode_libdir_separator=: + ;; + + sco3.2v5*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + runpath_var=LD_RUN_PATH + hardcode_runpath_var=yes + export_dynamic_flag_spec='${wl}-Bexport' + ;; + + solaris*) + # gcc --version < 3.0 without binutils cannot create self contained + # shared libraries reliably, requiring libgcc.a to resolve some of + # the object symbols generated in some cases. Libraries that use + # assert need libgcc.a to resolve __eprintf, for example. Linking + # a copy of libgcc.a into every shared library to guarantee resolving + # such symbols causes other problems: According to Tim Van Holder + # , C++ libraries end up with a separate + # (to the application) exception stack for one thing. + no_undefined_flag=' -z defs' + if test "$GCC" = yes; then + case `$CC --version 2>/dev/null` in + [12].*) + cat <&2 + +*** Warning: Releases of GCC earlier than version 3.0 cannot reliably +*** create self contained shared libraries on Solaris systems, without +*** introducing a dependency on libgcc.a. Therefore, libtool is disabling +*** -no-undefined support, which will at least allow you to build shared +*** libraries. However, you may find that when you link such libraries +*** into an application without using GCC, you have to manually add +*** \`gcc --print-libgcc-file-name\` to the link command. We urge you to +*** upgrade to a newer version of GCC. Another option is to rebuild your +*** current GCC to use the GNU linker from GNU binutils 2.9.1 or newer. + +EOF + no_undefined_flag= + ;; + esac + fi + # $CC -shared without GNU ld will not create a library from C++ + # object files and a static libstdc++, better avoid it by now + archive_cmds='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags' + archive_expsym_cmds='$echo "{ global:" > $lib.exp~cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~ + $LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$rm $lib.exp' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_shlibpath_var=no + case $host_os in + solaris2.[0-5] | solaris2.[0-5].*) ;; + *) # Supported since Solaris 2.6 (maybe 2.5.1?) + whole_archive_flag_spec='-z allextract$convenience -z defaultextract' ;; + esac + link_all_deplibs=yes + ;; + + sunos4*) + if test "x$host_vendor" = xsequent; then + # Use $CC to link under sequent, because it throws in some extra .o + # files that make .init and .fini sections work. + archive_cmds='$CC -G ${wl}-h $soname -o $lib $libobjs $deplibs $compiler_flags' + else + archive_cmds='$LD -assert pure-text -Bstatic -o $lib $libobjs $deplibs $linker_flags' + fi + hardcode_libdir_flag_spec='-L$libdir' + hardcode_direct=yes + hardcode_minus_L=yes + hardcode_shlibpath_var=no + ;; + + sysv4) + if test "x$host_vendor" = xsno; then + archive_cmds='$LD -G -Bsymbolic -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes # is this really true??? + else + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=no #Motorola manual says yes, but my tests say they lie + fi + runpath_var='LD_RUN_PATH' + hardcode_shlibpath_var=no + ;; + + sysv4.3*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + export_dynamic_flag_spec='-Bexport' + ;; + + sysv5*) + no_undefined_flag=' -z text' + # $CC -shared without GNU ld will not create a library from C++ + # object files and a static libstdc++, better avoid it by now + archive_cmds='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags' + archive_expsym_cmds='$echo "{ global:" > $lib.exp~cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~ + $LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$rm $lib.exp' + hardcode_libdir_flag_spec= + hardcode_shlibpath_var=no + runpath_var='LD_RUN_PATH' + ;; + + uts4*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_shlibpath_var=no + ;; + + dgux*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_shlibpath_var=no + ;; + + sysv4*MP*) + if test -d /usr/nec; then + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + runpath_var=LD_RUN_PATH + hardcode_runpath_var=yes + ld_shlibs=yes + fi + ;; + + sysv4.2uw2*) + archive_cmds='$LD -G -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_minus_L=no + hardcode_shlibpath_var=no + hardcode_runpath_var=yes + runpath_var=LD_RUN_PATH + ;; + + sysv5uw7* | unixware7*) + no_undefined_flag='${wl}-z ${wl}text' + if test "$GCC" = yes; then + archive_cmds='$CC -shared ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' + else + archive_cmds='$CC -G ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' + fi + runpath_var='LD_RUN_PATH' + hardcode_shlibpath_var=no + ;; + + *) + ld_shlibs=no + ;; + esac +fi +echo "$ac_t""$ld_shlibs" 1>&6 +test "$ld_shlibs" = no && can_build_shared=no + +# Check hardcoding attributes. +echo $ac_n "checking how to hardcode library paths into programs""... $ac_c" 1>&6 +echo "configure:4273: checking how to hardcode library paths into programs" >&5 +hardcode_action= +if test -n "$hardcode_libdir_flag_spec" || \ + test -n "$runpath_var"; then + + # We can hardcode non-existant directories. + if test "$hardcode_direct" != no && + # If the only mechanism to avoid hardcoding is shlibpath_var, we + # have to relink, otherwise we might link with an installed library + # when we should be linking with a yet-to-be-installed one + ## test "$hardcode_shlibpath_var" != no && + test "$hardcode_minus_L" != no; then + # Linking always hardcodes the temporary library directory. + hardcode_action=relink + else + # We can link without hardcoding, and we can hardcode nonexisting dirs. + hardcode_action=immediate + fi +else + # We cannot hardcode anything, or else we can only hardcode existing + # directories. + hardcode_action=unsupported +fi +echo "$ac_t""$hardcode_action" 1>&6 + +striplib= +old_striplib= +echo $ac_n "checking whether stripping libraries is possible""... $ac_c" 1>&6 +echo "configure:4301: checking whether stripping libraries is possible" >&5 +if test -n "$STRIP" && $STRIP -V 2>&1 | grep "GNU strip" >/dev/null; then + test -z "$old_striplib" && old_striplib="$STRIP --strip-debug" + test -z "$striplib" && striplib="$STRIP --strip-unneeded" + echo "$ac_t""yes" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + +reload_cmds='$LD$reload_flag -o $output$reload_objs' +test -z "$deplibs_check_method" && deplibs_check_method=unknown + +# PORTME Fill in your ld.so characteristics +echo $ac_n "checking dynamic linker characteristics""... $ac_c" 1>&6 +echo "configure:4315: checking dynamic linker characteristics" >&5 +library_names_spec= +libname_spec='lib$name' +soname_spec= +postinstall_cmds= +postuninstall_cmds= +finish_cmds= +finish_eval= +shlibpath_var= +shlibpath_overrides_runpath=unknown +version_type=none +dynamic_linker="$host_os ld.so" +sys_lib_dlsearch_path_spec="/lib /usr/lib" +sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib" + +case $host_os in +aix3*) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix $libname.a' + shlibpath_var=LIBPATH + + # AIX has no versioning support, so we append a major version to the name. + soname_spec='${libname}${release}.so$major' + ;; + +aix4* | aix5*) + version_type=linux + if test "$host_cpu" = ia64; then + # AIX 5 supports IA64 + library_names_spec='${libname}${release}.so$major ${libname}${release}.so$versuffix $libname.so' + shlibpath_var=LD_LIBRARY_PATH + else + # With GCC up to 2.95.x, collect2 would create an import file + # for dependence libraries. The import file would start with + # the line `#! .'. This would cause the generated library to + # depend on `.', always an invalid library. This was fixed in + # development snapshots of GCC prior to 3.0. + case $host_os in + aix4 | aix4.[01] | aix4.[01].*) + if { echo '#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 97)' + echo ' yes ' + echo '#endif'; } | ${CC} -E - | grep yes > /dev/null; then + : + else + can_build_shared=no + fi + ;; + esac + # AIX (on Power*) has no versioning support, so currently we can + # not hardcode correct soname into executable. Probably we can + # add versioning support to collect2, so additional links can + # be useful in future. + if test "$aix_use_runtimelinking" = yes; then + # If using run time linking (on AIX 4.2 or later) use lib.so + # instead of lib.a to let people know that these are not + # typical AIX shared libraries. + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + else + # We preserve .a as extension for shared libraries through AIX4.2 + # and later when we are not doing run time linking. + library_names_spec='${libname}${release}.a $libname.a' + soname_spec='${libname}${release}.so$major' + fi + shlibpath_var=LIBPATH + fi + ;; + +amigaos*) + library_names_spec='$libname.ixlibrary $libname.a' + # Create ${libname}_ixlibrary.a entries in /sys/libs. + finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`$echo "X$lib" | $Xsed -e '\''s%^.*/\([^/]*\)\.ixlibrary$%\1%'\''`; test $rm /sys/libs/${libname}_ixlibrary.a; $show "(cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a)"; (cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a) || exit 1; done' + ;; + +beos*) + library_names_spec='${libname}.so' + dynamic_linker="$host_os ld.so" + shlibpath_var=LIBRARY_PATH + ;; + +bsdi4*) + version_type=linux + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + finish_cmds='PATH="\$PATH:/sbin" ldconfig $libdir' + shlibpath_var=LD_LIBRARY_PATH + sys_lib_search_path_spec="/shlib /usr/lib /usr/X11/lib /usr/contrib/lib /lib /usr/local/lib" + sys_lib_dlsearch_path_spec="/shlib /usr/lib /usr/local/lib" + export_dynamic_flag_spec=-rdynamic + # the default ld.so.conf also contains /usr/contrib/lib and + # /usr/X11R6/lib (/usr/X11 is a link to /usr/X11R6), but let us allow + # libtool to hard-code these into programs + ;; + +cygwin* | mingw* | pw32*) + version_type=windows + need_version=no + need_lib_prefix=no + case $GCC,$host_os in + yes,cygwin*) + library_names_spec='$libname.dll.a' + soname_spec='`echo ${libname} | sed -e 's/^lib/cyg/'``echo ${release} | sed -e 's/[.]/-/g'`${versuffix}.dll' + postinstall_cmds='dlpath=`bash 2>&1 -c '\''. $dir/${file}i;echo \$dlname'\''`~ + dldir=$destdir/`dirname \$dlpath`~ + test -d \$dldir || mkdir -p \$dldir~ + $install_prog .libs/$dlname \$dldir/$dlname' + postuninstall_cmds='dldll=`bash 2>&1 -c '\''. $file; echo \$dlname'\''`~ + dlpath=$dir/\$dldll~ + $rm \$dlpath' + ;; + yes,mingw*) + library_names_spec='${libname}`echo ${release} | sed -e 's/[.]/-/g'`${versuffix}.dll' + sys_lib_search_path_spec=`$CC -print-search-dirs | grep "^libraries:" | sed -e "s/^libraries://" -e "s/;/ /g"` + ;; + yes,pw32*) + library_names_spec='`echo ${libname} | sed -e 's/^lib/pw/'``echo ${release} | sed -e 's/./-/g'`${versuffix}.dll' + ;; + *) + library_names_spec='${libname}`echo ${release} | sed -e 's/[.]/-/g'`${versuffix}.dll $libname.lib' + ;; + esac + dynamic_linker='Win32 ld.exe' + # FIXME: first we should search . and the directory the executable is in + shlibpath_var=PATH + ;; + +darwin* | rhapsody*) + dynamic_linker="$host_os dyld" + version_type=darwin + need_lib_prefix=no + need_version=no + # FIXME: Relying on posixy $() will cause problems for + # cross-compilation, but unfortunately the echo tests do not + # yet detect zsh echo's removal of \ escapes. + library_names_spec='${libname}${release}${versuffix}.$(test .$module = .yes && echo so || echo dylib) ${libname}${release}${major}.$(test .$module = .yes && echo so || echo dylib) ${libname}.$(test .$module = .yes && echo so || echo dylib)' + soname_spec='${libname}${release}${major}.$(test .$module = .yes && echo so || echo dylib)' + shlibpath_overrides_runpath=yes + shlibpath_var=DYLD_LIBRARY_PATH + ;; + +freebsd1*) + dynamic_linker=no + ;; + +freebsd*) + objformat=`test -x /usr/bin/objformat && /usr/bin/objformat || echo aout` + version_type=freebsd-$objformat + case $version_type in + freebsd-elf*) + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so $libname.so' + need_version=no + need_lib_prefix=no + ;; + freebsd-*) + library_names_spec='${libname}${release}.so$versuffix $libname.so$versuffix' + need_version=yes + ;; + esac + shlibpath_var=LD_LIBRARY_PATH + case $host_os in + freebsd2*) + shlibpath_overrides_runpath=yes + ;; + *) + shlibpath_overrides_runpath=no + hardcode_into_libs=yes + ;; + esac + ;; + +gnu*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so${major} ${libname}.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + hardcode_into_libs=yes + ;; + +hpux9* | hpux10* | hpux11*) + # Give a soname corresponding to the major version so that dld.sl refuses to + # link against other versions. + dynamic_linker="$host_os dld.sl" + version_type=sunos + need_lib_prefix=no + need_version=no + shlibpath_var=SHLIB_PATH + shlibpath_overrides_runpath=no # +s is required to enable SHLIB_PATH + library_names_spec='${libname}${release}.sl$versuffix ${libname}${release}.sl$major $libname.sl' + soname_spec='${libname}${release}.sl$major' + # HP-UX runs *really* slowly unless shared libraries are mode 555. + postinstall_cmds='chmod 555 $lib' + ;; + +irix5* | irix6* | nonstopux*) + case $host_os in + nonstopux*) version_type=nonstopux ;; + *) version_type=irix ;; + esac + need_lib_prefix=no + need_version=no + soname_spec='${libname}${release}.so$major' + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major ${libname}${release}.so $libname.so' + case $host_os in + irix5* | nonstopux*) + libsuff= shlibsuff= + ;; + *) + case $LD in # libtool.m4 will add one of these switches to LD + *-32|*"-32 ") libsuff= shlibsuff= libmagic=32-bit;; + *-n32|*"-n32 ") libsuff=32 shlibsuff=N32 libmagic=N32;; + *-64|*"-64 ") libsuff=64 shlibsuff=64 libmagic=64-bit;; + *) libsuff= shlibsuff= libmagic=never-match;; + esac + ;; + esac + shlibpath_var=LD_LIBRARY${shlibsuff}_PATH + shlibpath_overrides_runpath=no + sys_lib_search_path_spec="/usr/lib${libsuff} /lib${libsuff} /usr/local/lib${libsuff}" + sys_lib_dlsearch_path_spec="/usr/lib${libsuff} /lib${libsuff}" + ;; + +# No shared lib support for Linux oldld, aout, or coff. +linux-gnuoldld* | linux-gnuaout* | linux-gnucoff*) + dynamic_linker=no + ;; + +# This must be Linux ELF. +linux-gnu*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=no + # This implies no fast_install, which is unacceptable. + # Some rework will be needed to allow for fast_install + # before this can be enabled. + hardcode_into_libs=yes + + # We used to test for /lib/ld.so.1 and disable shared libraries on + # powerpc, because MkLinux only supported shared libraries with the + # GNU dynamic linker. Since this was broken with cross compilers, + # most powerpc-linux boxes support dynamic linking these days and + # people can always --disable-shared, the test was removed, and we + # assume the GNU/Linux dynamic linker is in use. + dynamic_linker='GNU/Linux ld.so' + ;; + +netbsd*) + version_type=sunos + need_lib_prefix=no + need_version=no + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + library_names_spec='${libname}${release}.so$versuffix ${libname}.so$versuffix' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' + dynamic_linker='NetBSD (a.out) ld.so' + else + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major ${libname}${release}.so ${libname}.so' + soname_spec='${libname}${release}.so$major' + dynamic_linker='NetBSD ld.elf_so' + fi + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + ;; + +newsos6) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + ;; + +openbsd*) + version_type=sunos + need_lib_prefix=no + need_version=no + if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + case "$host_os" in + openbsd2.[89] | openbsd2.[89].*) + shlibpath_overrides_runpath=no + ;; + *) + shlibpath_overrides_runpath=yes + ;; + esac + else + shlibpath_overrides_runpath=yes + fi + library_names_spec='${libname}${release}.so$versuffix ${libname}.so$versuffix' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' + shlibpath_var=LD_LIBRARY_PATH + ;; + +os2*) + libname_spec='$name' + need_lib_prefix=no + library_names_spec='$libname.dll $libname.a' + dynamic_linker='OS/2 ld.exe' + shlibpath_var=LIBPATH + ;; + +osf3* | osf4* | osf5*) + version_type=osf + need_version=no + soname_spec='${libname}${release}.so' + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so $libname.so' + shlibpath_var=LD_LIBRARY_PATH + sys_lib_search_path_spec="/usr/shlib /usr/ccs/lib /usr/lib/cmplrs/cc /usr/lib /usr/local/lib /var/shlib" + sys_lib_dlsearch_path_spec="$sys_lib_search_path_spec" + ;; + +sco3.2v5*) + version_type=osf + soname_spec='${libname}${release}.so$major' + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + shlibpath_var=LD_LIBRARY_PATH + ;; + +solaris*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + # ldd complains unless libraries are executable + postinstall_cmds='chmod +x $lib' + ;; + +sunos4*) + version_type=sunos + library_names_spec='${libname}${release}.so$versuffix ${libname}.so$versuffix' + finish_cmds='PATH="\$PATH:/usr/etc" ldconfig $libdir' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + if test "$with_gnu_ld" = yes; then + need_lib_prefix=no + fi + need_version=yes + ;; + +sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + case $host_vendor in + sni) + shlibpath_overrides_runpath=no + ;; + motorola) + need_lib_prefix=no + need_version=no + shlibpath_overrides_runpath=no + sys_lib_search_path_spec='/lib /usr/lib /usr/ccs/lib' + ;; + esac + ;; + +uts4*) + version_type=linux + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + ;; + +dgux*) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}.so$versuffix ${libname}${release}.so$major $libname.so' + soname_spec='${libname}${release}.so$major' + shlibpath_var=LD_LIBRARY_PATH + ;; + +sysv4*MP*) + if test -d /usr/nec ;then + version_type=linux + library_names_spec='$libname.so.$versuffix $libname.so.$major $libname.so' + soname_spec='$libname.so.$major' + shlibpath_var=LD_LIBRARY_PATH + fi + ;; + +*) + dynamic_linker=no + ;; +esac +echo "$ac_t""$dynamic_linker" 1>&6 +test "$dynamic_linker" = no && can_build_shared=no + +# Report the final consequences. +echo $ac_n "checking if libtool supports shared libraries""... $ac_c" 1>&6 +echo "configure:4715: checking if libtool supports shared libraries" >&5 +echo "$ac_t""$can_build_shared" 1>&6 + +echo $ac_n "checking whether to build shared libraries""... $ac_c" 1>&6 +echo "configure:4719: checking whether to build shared libraries" >&5 +test "$can_build_shared" = "no" && enable_shared=no + +# On AIX, shared libraries and static libraries use the same namespace, and +# are all built from PIC. +case "$host_os" in +aix3*) + test "$enable_shared" = yes && enable_static=no + if test -n "$RANLIB"; then + archive_cmds="$archive_cmds~\$RANLIB \$lib" + postinstall_cmds='$RANLIB $lib' + fi + ;; + +aix4*) + if test "$host_cpu" != ia64 && test "$aix_use_runtimelinking" = no ; then + test "$enable_shared" = yes && enable_static=no + fi + ;; +esac +echo "$ac_t""$enable_shared" 1>&6 + +echo $ac_n "checking whether to build static libraries""... $ac_c" 1>&6 +echo "configure:4742: checking whether to build static libraries" >&5 +# Make sure either enable_shared or enable_static is yes. +test "$enable_shared" = yes || enable_static=yes +echo "$ac_t""$enable_static" 1>&6 + +if test "$hardcode_action" = relink; then + # Fast installation is not supported + enable_fast_install=no +elif test "$shlibpath_overrides_runpath" = yes || + test "$enable_shared" = no; then + # Fast installation is not necessary + enable_fast_install=needless +fi + +variables_saved_for_relink="PATH $shlibpath_var $runpath_var" +if test "$GCC" = yes; then + variables_saved_for_relink="$variables_saved_for_relink GCC_EXEC_PREFIX COMPILER_PATH LIBRARY_PATH" +fi + +if test "x$enable_dlopen" != xyes; then + enable_dlopen=unknown + enable_dlopen_self=unknown + enable_dlopen_self_static=unknown +else + lt_cv_dlopen=no + lt_cv_dlopen_libs= + + case $host_os in + beos*) + lt_cv_dlopen="load_add_on" + lt_cv_dlopen_libs= + lt_cv_dlopen_self=yes + ;; + + cygwin* | mingw* | pw32*) + lt_cv_dlopen="LoadLibrary" + lt_cv_dlopen_libs= + ;; + + *) + echo $ac_n "checking for shl_load""... $ac_c" 1>&6 +echo "configure:4783: checking for shl_load" >&5 +if eval "test \"`echo '$''{'ac_cv_func_shl_load'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +/* Override any gcc2 internal prototype to avoid an error. */ +/* We use char because int might match the return type of a gcc2 + builtin and then its argument prototype would still apply. */ +char shl_load(); + +int main() { + +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined (__stub_shl_load) || defined (__stub___shl_load) +choke me +#else +shl_load(); +#endif + +; return 0; } +EOF +if { (eval echo configure:4811: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_func_shl_load=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_func_shl_load=no" +fi +rm -f conftest* +fi + +if eval "test \"`echo '$ac_cv_func_'shl_load`\" = yes"; then + echo "$ac_t""yes" 1>&6 + lt_cv_dlopen="shl_load" +else + echo "$ac_t""no" 1>&6 +echo $ac_n "checking for shl_load in -ldld""... $ac_c" 1>&6 +echo "configure:4829: checking for shl_load in -ldld" >&5 +ac_lib_var=`echo dld'_'shl_load | sed 'y%./+-%__p_%'` +if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + ac_save_LIBS="$LIBS" +LIBS="-ldld $LIBS" +cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=no" +fi +rm -f conftest* +LIBS="$ac_save_LIBS" + +fi +if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then + echo "$ac_t""yes" 1>&6 + lt_cv_dlopen="shl_load" lt_cv_dlopen_libs="-dld" +else + echo "$ac_t""no" 1>&6 +echo $ac_n "checking for dlopen""... $ac_c" 1>&6 +echo "configure:4867: checking for dlopen" >&5 +if eval "test \"`echo '$''{'ac_cv_func_dlopen'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +/* Override any gcc2 internal prototype to avoid an error. */ +/* We use char because int might match the return type of a gcc2 + builtin and then its argument prototype would still apply. */ +char dlopen(); + +int main() { + +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined (__stub_dlopen) || defined (__stub___dlopen) +choke me +#else +dlopen(); +#endif + +; return 0; } +EOF +if { (eval echo configure:4895: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_func_dlopen=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_func_dlopen=no" +fi +rm -f conftest* +fi + +if eval "test \"`echo '$ac_cv_func_'dlopen`\" = yes"; then + echo "$ac_t""yes" 1>&6 + lt_cv_dlopen="dlopen" +else + echo "$ac_t""no" 1>&6 +echo $ac_n "checking for dlopen in -ldl""... $ac_c" 1>&6 +echo "configure:4913: checking for dlopen in -ldl" >&5 +ac_lib_var=`echo dl'_'dlopen | sed 'y%./+-%__p_%'` +if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + ac_save_LIBS="$LIBS" +LIBS="-ldl $LIBS" +cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=no" +fi +rm -f conftest* +LIBS="$ac_save_LIBS" + +fi +if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then + echo "$ac_t""yes" 1>&6 + lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-ldl" +else + echo "$ac_t""no" 1>&6 +echo $ac_n "checking for dlopen in -lsvld""... $ac_c" 1>&6 +echo "configure:4951: checking for dlopen in -lsvld" >&5 +ac_lib_var=`echo svld'_'dlopen | sed 'y%./+-%__p_%'` +if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + ac_save_LIBS="$LIBS" +LIBS="-lsvld $LIBS" +cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=no" +fi +rm -f conftest* +LIBS="$ac_save_LIBS" + +fi +if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then + echo "$ac_t""yes" 1>&6 + lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-lsvld" +else + echo "$ac_t""no" 1>&6 +echo $ac_n "checking for dld_link in -ldld""... $ac_c" 1>&6 +echo "configure:4989: checking for dld_link in -ldld" >&5 +ac_lib_var=`echo dld'_'dld_link | sed 'y%./+-%__p_%'` +if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + ac_save_LIBS="$LIBS" +LIBS="-ldld $LIBS" +cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=no" +fi +rm -f conftest* +LIBS="$ac_save_LIBS" + +fi +if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then + echo "$ac_t""yes" 1>&6 + lt_cv_dlopen="dld_link" lt_cv_dlopen_libs="-dld" +else + echo "$ac_t""no" 1>&6 +fi + + +fi + + +fi + + +fi + + +fi + + +fi + + ;; + esac + + if test "x$lt_cv_dlopen" != xno; then + enable_dlopen=yes + else + enable_dlopen=no + fi + + case $lt_cv_dlopen in + dlopen) + save_CPPFLAGS="$CPPFLAGS" + test "x$ac_cv_header_dlfcn_h" = xyes && CPPFLAGS="$CPPFLAGS -DHAVE_DLFCN_H" + + save_LDFLAGS="$LDFLAGS" + eval LDFLAGS=\"\$LDFLAGS $export_dynamic_flag_spec\" + + save_LIBS="$LIBS" + LIBS="$lt_cv_dlopen_libs $LIBS" + + echo $ac_n "checking whether a program can dlopen itself""... $ac_c" 1>&6 +echo "configure:5064: checking whether a program can dlopen itself" >&5 +if eval "test \"`echo '$''{'lt_cv_dlopen_self'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test "$cross_compiling" = yes; then : + lt_cv_dlopen_self=cross +else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext < +#endif + +#include + +#ifdef RTLD_GLOBAL +# define LT_DLGLOBAL RTLD_GLOBAL +#else +# ifdef DL_GLOBAL +# define LT_DLGLOBAL DL_GLOBAL +# else +# define LT_DLGLOBAL 0 +# endif +#endif + +/* We may have to define LT_DLLAZY_OR_NOW in the command line if we + find out it does not work in some platform. */ +#ifndef LT_DLLAZY_OR_NOW +# ifdef RTLD_LAZY +# define LT_DLLAZY_OR_NOW RTLD_LAZY +# else +# ifdef DL_LAZY +# define LT_DLLAZY_OR_NOW DL_LAZY +# else +# ifdef RTLD_NOW +# define LT_DLLAZY_OR_NOW RTLD_NOW +# else +# ifdef DL_NOW +# define LT_DLLAZY_OR_NOW DL_NOW +# else +# define LT_DLLAZY_OR_NOW 0 +# endif +# endif +# endif +# endif +#endif + +#ifdef __cplusplus +extern "C" void exit (int); +#endif + +void fnord() { int i=42;} +int main () +{ + void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); + int status = $lt_dlunknown; + + if (self) + { + if (dlsym (self,"fnord")) status = $lt_dlno_uscore; + else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; + /* dlclose (self); */ + } + + exit (status); +} +EOF + if { (eval echo configure:5135: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} 2>/dev/null; then + (./conftest; exit; ) 2>/dev/null + lt_status=$? + case x$lt_status in + x$lt_dlno_uscore) lt_cv_dlopen_self=yes ;; + x$lt_dlneed_uscore) lt_cv_dlopen_self=yes ;; + x$lt_unknown|x*) lt_cv_dlopen_self=no ;; + esac + else : + # compilation failed + lt_cv_dlopen_self=no + fi +fi +rm -fr conftest* + + +fi + +echo "$ac_t""$lt_cv_dlopen_self" 1>&6 + + if test "x$lt_cv_dlopen_self" = xyes; then + LDFLAGS="$LDFLAGS $link_static_flag" + echo $ac_n "checking whether a statically linked program can dlopen itself""... $ac_c" 1>&6 +echo "configure:5158: checking whether a statically linked program can dlopen itself" >&5 +if eval "test \"`echo '$''{'lt_cv_dlopen_self_static'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test "$cross_compiling" = yes; then : + lt_cv_dlopen_self_static=cross +else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext < +#endif + +#include + +#ifdef RTLD_GLOBAL +# define LT_DLGLOBAL RTLD_GLOBAL +#else +# ifdef DL_GLOBAL +# define LT_DLGLOBAL DL_GLOBAL +# else +# define LT_DLGLOBAL 0 +# endif +#endif + +/* We may have to define LT_DLLAZY_OR_NOW in the command line if we + find out it does not work in some platform. */ +#ifndef LT_DLLAZY_OR_NOW +# ifdef RTLD_LAZY +# define LT_DLLAZY_OR_NOW RTLD_LAZY +# else +# ifdef DL_LAZY +# define LT_DLLAZY_OR_NOW DL_LAZY +# else +# ifdef RTLD_NOW +# define LT_DLLAZY_OR_NOW RTLD_NOW +# else +# ifdef DL_NOW +# define LT_DLLAZY_OR_NOW DL_NOW +# else +# define LT_DLLAZY_OR_NOW 0 +# endif +# endif +# endif +# endif +#endif + +#ifdef __cplusplus +extern "C" void exit (int); +#endif + +void fnord() { int i=42;} +int main () +{ + void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); + int status = $lt_dlunknown; + + if (self) + { + if (dlsym (self,"fnord")) status = $lt_dlno_uscore; + else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; + /* dlclose (self); */ + } + + exit (status); +} +EOF + if { (eval echo configure:5229: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} 2>/dev/null; then + (./conftest; exit; ) 2>/dev/null + lt_status=$? + case x$lt_status in + x$lt_dlno_uscore) lt_cv_dlopen_self_static=yes ;; + x$lt_dlneed_uscore) lt_cv_dlopen_self_static=yes ;; + x$lt_unknown|x*) lt_cv_dlopen_self_static=no ;; + esac + else : + # compilation failed + lt_cv_dlopen_self_static=no + fi +fi +rm -fr conftest* + + +fi + +echo "$ac_t""$lt_cv_dlopen_self_static" 1>&6 + fi + + CPPFLAGS="$save_CPPFLAGS" + LDFLAGS="$save_LDFLAGS" + LIBS="$save_LIBS" + ;; + esac + + case $lt_cv_dlopen_self in + yes|no) enable_dlopen_self=$lt_cv_dlopen_self ;; + *) enable_dlopen_self=unknown ;; + esac + + case $lt_cv_dlopen_self_static in + yes|no) enable_dlopen_self_static=$lt_cv_dlopen_self_static ;; + *) enable_dlopen_self_static=unknown ;; + esac +fi + + +if test "$enable_shared" = yes && test "$GCC" = yes; then + case $archive_cmds in + *'~'*) + # FIXME: we may have to deal with multi-command sequences. + ;; + '$CC '*) + # Test whether the compiler implicitly links with -lc since on some + # systems, -lgcc has to come before -lc. If gcc already passes -lc + # to ld, don't add -lc before -lgcc. + echo $ac_n "checking whether -lc should be explicitly linked in""... $ac_c" 1>&6 +echo "configure:5278: checking whether -lc should be explicitly linked in" >&5 + if eval "test \"`echo '$''{'lt_cv_archive_cmds_need_lc'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + $rm conftest* + echo 'static int dummy;' > conftest.$ac_ext + + if { (eval echo configure:5285: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then + soname=conftest + lib=conftest + libobjs=conftest.$ac_objext + deplibs= + wl=$lt_cv_prog_cc_wl + compiler_flags=-v + linker_flags=-v + verstring= + output_objdir=. + libname=conftest + save_allow_undefined_flag=$allow_undefined_flag + allow_undefined_flag= + if { (eval echo configure:5298: \"$archive_cmds 2\>\&1 \| grep \" -lc \" \>/dev/null 2\>\&1\") 1>&5; (eval $archive_cmds 2\>\&1 \| grep \" -lc \" \>/dev/null 2\>\&1) 2>&5; } + then + lt_cv_archive_cmds_need_lc=no + else + lt_cv_archive_cmds_need_lc=yes + fi + allow_undefined_flag=$save_allow_undefined_flag + else + cat conftest.err 1>&5 + fi +fi + + echo "$ac_t""$lt_cv_archive_cmds_need_lc" 1>&6 + ;; + esac +fi +need_lc=${lt_cv_archive_cmds_need_lc-yes} + +# The second clause should only fire when bootstrapping the +# libtool distribution, otherwise you forgot to ship ltmain.sh +# with your package, and you will get complaints that there are +# no rules to generate ltmain.sh. +if test -f "$ltmain"; then + : +else + # If there is no Makefile yet, we rely on a make rule to execute + # `config.status --recheck' to rerun these tests and create the + # libtool script then. + test -f Makefile && make "$ltmain" +fi + +if test -f "$ltmain"; then + trap "$rm \"${ofile}T\"; exit 1" 1 2 15 + $rm -f "${ofile}T" + + echo creating $ofile + + # Now quote all the things that may contain metacharacters while being + # careful not to overquote the AC_SUBSTed values. We take copies of the + # variables and quote the copies for generation of the libtool script. + for var in echo old_CC old_CFLAGS \ + AR AR_FLAGS CC LD LN_S NM SHELL \ + reload_flag reload_cmds wl \ + pic_flag link_static_flag no_builtin_flag export_dynamic_flag_spec \ + thread_safe_flag_spec whole_archive_flag_spec libname_spec \ + library_names_spec soname_spec \ + RANLIB old_archive_cmds old_archive_from_new_cmds old_postinstall_cmds \ + old_postuninstall_cmds archive_cmds archive_expsym_cmds postinstall_cmds \ + postuninstall_cmds extract_expsyms_cmds old_archive_from_expsyms_cmds \ + old_striplib striplib file_magic_cmd export_symbols_cmds \ + deplibs_check_method allow_undefined_flag no_undefined_flag \ + finish_cmds finish_eval global_symbol_pipe global_symbol_to_cdecl \ + global_symbol_to_c_name_address \ + hardcode_libdir_flag_spec hardcode_libdir_separator \ + sys_lib_search_path_spec sys_lib_dlsearch_path_spec \ + compiler_c_o compiler_o_lo need_locks exclude_expsyms include_expsyms; do + + case $var in + reload_cmds | old_archive_cmds | old_archive_from_new_cmds | \ + old_postinstall_cmds | old_postuninstall_cmds | \ + export_symbols_cmds | archive_cmds | archive_expsym_cmds | \ + extract_expsyms_cmds | old_archive_from_expsyms_cmds | \ + postinstall_cmds | postuninstall_cmds | \ + finish_cmds | sys_lib_search_path_spec | sys_lib_dlsearch_path_spec) + # Double-quote double-evaled strings. + eval "lt_$var=\\\"\`\$echo \"X\$$var\" | \$Xsed -e \"\$double_quote_subst\" -e \"\$sed_quote_subst\" -e \"\$delay_variable_subst\"\`\\\"" + ;; + *) + eval "lt_$var=\\\"\`\$echo \"X\$$var\" | \$Xsed -e \"\$sed_quote_subst\"\`\\\"" + ;; + esac + done + + cat <<__EOF__ > "${ofile}T" +#! $SHELL + +# `$echo "$ofile" | sed 's%^.*/%%'` - Provide generalized library-building support services. +# Generated automatically by $PROGRAM (GNU $PACKAGE $VERSION$TIMESTAMP) +# NOTE: Changes made to this file will be lost: look at ltmain.sh. +# +# Copyright (C) 1996-2000 Free Software Foundation, Inc. +# Originally by Gordon Matzigkeit , 1996 +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + +# Sed that helps us avoid accidentally triggering echo(1) options like -n. +Xsed="sed -e s/^X//" + +# The HP-UX ksh and POSIX shell print the target directory to stdout +# if CDPATH is set. +if test "X\${CDPATH+set}" = Xset; then CDPATH=:; export CDPATH; fi + +# ### BEGIN LIBTOOL CONFIG + +# Libtool was configured on host `(hostname || uname -n) 2>/dev/null | sed 1q`: + +# Shell to use when invoking shell scripts. +SHELL=$lt_SHELL + +# Whether or not to build shared libraries. +build_libtool_libs=$enable_shared + +# Whether or not to build static libraries. +build_old_libs=$enable_static + +# Whether or not to add -lc for building shared libraries. +build_libtool_need_lc=$need_lc + +# Whether or not to optimize for fast installation. +fast_install=$enable_fast_install + +# The host system. +host_alias=$host_alias +host=$host + +# An echo program that does not interpret backslashes. +echo=$lt_echo + +# The archiver. +AR=$lt_AR +AR_FLAGS=$lt_AR_FLAGS + +# The default C compiler. +CC=$lt_CC + +# Is the compiler the GNU C compiler? +with_gcc=$GCC + +# The linker used to build libraries. +LD=$lt_LD + +# Whether we need hard or soft links. +LN_S=$lt_LN_S + +# A BSD-compatible nm program. +NM=$lt_NM + +# A symbol stripping program +STRIP=$STRIP + +# Used to examine libraries when file_magic_cmd begins "file" +MAGIC_CMD=$MAGIC_CMD + +# Used on cygwin: DLL creation program. +DLLTOOL="$DLLTOOL" + +# Used on cygwin: object dumper. +OBJDUMP="$OBJDUMP" + +# Used on cygwin: assembler. +AS="$AS" + +# The name of the directory that contains temporary libtool files. +objdir=$objdir + +# How to create reloadable object files. +reload_flag=$lt_reload_flag +reload_cmds=$lt_reload_cmds + +# How to pass a linker flag through the compiler. +wl=$lt_wl + +# Object file suffix (normally "o"). +objext="$ac_objext" + +# Old archive suffix (normally "a"). +libext="$libext" + +# Executable file suffix (normally ""). +exeext="$exeext" + +# Additional compiler flags for building library objects. +pic_flag=$lt_pic_flag +pic_mode=$pic_mode + +# Does compiler simultaneously support -c and -o options? +compiler_c_o=$lt_compiler_c_o + +# Can we write directly to a .lo ? +compiler_o_lo=$lt_compiler_o_lo + +# Must we lock files when doing compilation ? +need_locks=$lt_need_locks + +# Do we need the lib prefix for modules? +need_lib_prefix=$need_lib_prefix + +# Do we need a version for libraries? +need_version=$need_version + +# Whether dlopen is supported. +dlopen_support=$enable_dlopen + +# Whether dlopen of programs is supported. +dlopen_self=$enable_dlopen_self + +# Whether dlopen of statically linked programs is supported. +dlopen_self_static=$enable_dlopen_self_static + +# Compiler flag to prevent dynamic linking. +link_static_flag=$lt_link_static_flag + +# Compiler flag to turn off builtin functions. +no_builtin_flag=$lt_no_builtin_flag + +# Compiler flag to allow reflexive dlopens. +export_dynamic_flag_spec=$lt_export_dynamic_flag_spec + +# Compiler flag to generate shared objects directly from archives. +whole_archive_flag_spec=$lt_whole_archive_flag_spec + +# Compiler flag to generate thread-safe objects. +thread_safe_flag_spec=$lt_thread_safe_flag_spec + +# Library versioning type. +version_type=$version_type + +# Format of library name prefix. +libname_spec=$lt_libname_spec + +# List of archive names. First name is the real one, the rest are links. +# The last name is the one that the linker finds with -lNAME. +library_names_spec=$lt_library_names_spec + +# The coded name of the library, if different from the real name. +soname_spec=$lt_soname_spec + +# Commands used to build and install an old-style archive. +RANLIB=$lt_RANLIB +old_archive_cmds=$lt_old_archive_cmds +old_postinstall_cmds=$lt_old_postinstall_cmds +old_postuninstall_cmds=$lt_old_postuninstall_cmds + +# Create an old-style archive from a shared archive. +old_archive_from_new_cmds=$lt_old_archive_from_new_cmds + +# Create a temporary old-style archive to link instead of a shared archive. +old_archive_from_expsyms_cmds=$lt_old_archive_from_expsyms_cmds + +# Commands used to build and install a shared archive. +archive_cmds=$lt_archive_cmds +archive_expsym_cmds=$lt_archive_expsym_cmds +postinstall_cmds=$lt_postinstall_cmds +postuninstall_cmds=$lt_postuninstall_cmds + +# Commands to strip libraries. +old_striplib=$lt_old_striplib +striplib=$lt_striplib + +# Method to check whether dependent libraries are shared objects. +deplibs_check_method=$lt_deplibs_check_method + +# Command to use when deplibs_check_method == file_magic. +file_magic_cmd=$lt_file_magic_cmd + +# Flag that allows shared libraries with undefined symbols to be built. +allow_undefined_flag=$lt_allow_undefined_flag + +# Flag that forces no undefined symbols. +no_undefined_flag=$lt_no_undefined_flag + +# Commands used to finish a libtool library installation in a directory. +finish_cmds=$lt_finish_cmds + +# Same as above, but a single script fragment to be evaled but not shown. +finish_eval=$lt_finish_eval + +# Take the output of nm and produce a listing of raw symbols and C names. +global_symbol_pipe=$lt_global_symbol_pipe + +# Transform the output of nm in a proper C declaration +global_symbol_to_cdecl=$lt_global_symbol_to_cdecl + +# Transform the output of nm in a C name address pair +global_symbol_to_c_name_address=$lt_global_symbol_to_c_name_address + +# This is the shared library runtime path variable. +runpath_var=$runpath_var + +# This is the shared library path variable. +shlibpath_var=$shlibpath_var + +# Is shlibpath searched before the hard-coded library search path? +shlibpath_overrides_runpath=$shlibpath_overrides_runpath + +# How to hardcode a shared library path into an executable. +hardcode_action=$hardcode_action + +# Whether we should hardcode library paths into libraries. +hardcode_into_libs=$hardcode_into_libs + +# Flag to hardcode \$libdir into a binary during linking. +# This must work even if \$libdir does not exist. +hardcode_libdir_flag_spec=$lt_hardcode_libdir_flag_spec + +# Whether we need a single -rpath flag with a separated argument. +hardcode_libdir_separator=$lt_hardcode_libdir_separator + +# Set to yes if using DIR/libNAME.so during linking hardcodes DIR into the +# resulting binary. +hardcode_direct=$hardcode_direct + +# Set to yes if using the -LDIR flag during linking hardcodes DIR into the +# resulting binary. +hardcode_minus_L=$hardcode_minus_L + +# Set to yes if using SHLIBPATH_VAR=DIR during linking hardcodes DIR into +# the resulting binary. +hardcode_shlibpath_var=$hardcode_shlibpath_var + +# Variables whose values should be saved in libtool wrapper scripts and +# restored at relink time. +variables_saved_for_relink="$variables_saved_for_relink" + +# Whether libtool must link a program against all its dependency libraries. +link_all_deplibs=$link_all_deplibs + +# Compile-time system search path for libraries +sys_lib_search_path_spec=$lt_sys_lib_search_path_spec + +# Run-time system search path for libraries +sys_lib_dlsearch_path_spec=$lt_sys_lib_dlsearch_path_spec + +# Fix the shell variable \$srcfile for the compiler. +fix_srcfile_path="$fix_srcfile_path" + +# Set to yes if exported symbols are required. +always_export_symbols=$always_export_symbols + +# The commands to list exported symbols. +export_symbols_cmds=$lt_export_symbols_cmds + +# The commands to extract the exported symbol list from a shared archive. +extract_expsyms_cmds=$lt_extract_expsyms_cmds + +# Symbols that should not be listed in the preloaded symbols. +exclude_expsyms=$lt_exclude_expsyms + +# Symbols that must always be exported. +include_expsyms=$lt_include_expsyms + +# ### END LIBTOOL CONFIG + +__EOF__ + + case $host_os in + aix3*) + cat <<\EOF >> "${ofile}T" + +# AIX sometimes has problems with the GCC collect2 program. For some +# reason, if we set the COLLECT_NAMES environment variable, the problems +# vanish in a puff of smoke. +if test "X${COLLECT_NAMES+set}" != Xset; then + COLLECT_NAMES= + export COLLECT_NAMES +fi +EOF + ;; + esac + + case $host_os in + cygwin* | mingw* | pw32* | os2*) + cat <<'EOF' >> "${ofile}T" + # This is a source program that is used to create dlls on Windows + # Don't remove nor modify the starting and closing comments +# /* ltdll.c starts here */ +# #define WIN32_LEAN_AND_MEAN +# #include +# #undef WIN32_LEAN_AND_MEAN +# #include +# +# #ifndef __CYGWIN__ +# # ifdef __CYGWIN32__ +# # define __CYGWIN__ __CYGWIN32__ +# # endif +# #endif +# +# #ifdef __cplusplus +# extern "C" { +# #endif +# BOOL APIENTRY DllMain (HINSTANCE hInst, DWORD reason, LPVOID reserved); +# #ifdef __cplusplus +# } +# #endif +# +# #ifdef __CYGWIN__ +# #include +# DECLARE_CYGWIN_DLL( DllMain ); +# #endif +# HINSTANCE __hDllInstance_base; +# +# BOOL APIENTRY +# DllMain (HINSTANCE hInst, DWORD reason, LPVOID reserved) +# { +# __hDllInstance_base = hInst; +# return TRUE; +# } +# /* ltdll.c ends here */ + # This is a source program that is used to create import libraries + # on Windows for dlls which lack them. Don't remove nor modify the + # starting and closing comments +# /* impgen.c starts here */ +# /* Copyright (C) 1999-2000 Free Software Foundation, Inc. +# +# This file is part of GNU libtool. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# */ +# +# #include /* for printf() */ +# #include /* for open(), lseek(), read() */ +# #include /* for O_RDONLY, O_BINARY */ +# #include /* for strdup() */ +# +# /* O_BINARY isn't required (or even defined sometimes) under Unix */ +# #ifndef O_BINARY +# #define O_BINARY 0 +# #endif +# +# static unsigned int +# pe_get16 (fd, offset) +# int fd; +# int offset; +# { +# unsigned char b[2]; +# lseek (fd, offset, SEEK_SET); +# read (fd, b, 2); +# return b[0] + (b[1]<<8); +# } +# +# static unsigned int +# pe_get32 (fd, offset) +# int fd; +# int offset; +# { +# unsigned char b[4]; +# lseek (fd, offset, SEEK_SET); +# read (fd, b, 4); +# return b[0] + (b[1]<<8) + (b[2]<<16) + (b[3]<<24); +# } +# +# static unsigned int +# pe_as32 (ptr) +# void *ptr; +# { +# unsigned char *b = ptr; +# return b[0] + (b[1]<<8) + (b[2]<<16) + (b[3]<<24); +# } +# +# int +# main (argc, argv) +# int argc; +# char *argv[]; +# { +# int dll; +# unsigned long pe_header_offset, opthdr_ofs, num_entries, i; +# unsigned long export_rva, export_size, nsections, secptr, expptr; +# unsigned long name_rvas, nexp; +# unsigned char *expdata, *erva; +# char *filename, *dll_name; +# +# filename = argv[1]; +# +# dll = open(filename, O_RDONLY|O_BINARY); +# if (dll < 1) +# return 1; +# +# dll_name = filename; +# +# for (i=0; filename[i]; i++) +# if (filename[i] == '/' || filename[i] == '\\' || filename[i] == ':') +# dll_name = filename + i +1; +# +# pe_header_offset = pe_get32 (dll, 0x3c); +# opthdr_ofs = pe_header_offset + 4 + 20; +# num_entries = pe_get32 (dll, opthdr_ofs + 92); +# +# if (num_entries < 1) /* no exports */ +# return 1; +# +# export_rva = pe_get32 (dll, opthdr_ofs + 96); +# export_size = pe_get32 (dll, opthdr_ofs + 100); +# nsections = pe_get16 (dll, pe_header_offset + 4 +2); +# secptr = (pe_header_offset + 4 + 20 + +# pe_get16 (dll, pe_header_offset + 4 + 16)); +# +# expptr = 0; +# for (i = 0; i < nsections; i++) +# { +# char sname[8]; +# unsigned long secptr1 = secptr + 40 * i; +# unsigned long vaddr = pe_get32 (dll, secptr1 + 12); +# unsigned long vsize = pe_get32 (dll, secptr1 + 16); +# unsigned long fptr = pe_get32 (dll, secptr1 + 20); +# lseek(dll, secptr1, SEEK_SET); +# read(dll, sname, 8); +# if (vaddr <= export_rva && vaddr+vsize > export_rva) +# { +# expptr = fptr + (export_rva - vaddr); +# if (export_rva + export_size > vaddr + vsize) +# export_size = vsize - (export_rva - vaddr); +# break; +# } +# } +# +# expdata = (unsigned char*)malloc(export_size); +# lseek (dll, expptr, SEEK_SET); +# read (dll, expdata, export_size); +# erva = expdata - export_rva; +# +# nexp = pe_as32 (expdata+24); +# name_rvas = pe_as32 (expdata+32); +# +# printf ("EXPORTS\n"); +# for (i = 0; i> "${ofile}T" || (rm -f "${ofile}T"; exit 1) + + mv -f "${ofile}T" "$ofile" || \ + (rm -f "$ofile" && cp "${ofile}T" "$ofile" && rm -f "${ofile}T") + chmod +x "$ofile" +fi + + + + + +# This can be used to rebuild libtool when needed +LIBTOOL_DEPS="$ac_aux_dir/ltmain.sh" + +# Always use our own libtool. +LIBTOOL='$(SHELL) $(top_builddir)/libtool' + +# Prevent multiple expansion + + + + +echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6 +echo "configure:5882: checking for ANSI C header files" >&5 +if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +#include +#include +#include +EOF +ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" +{ (eval echo configure:5895: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` +if test -z "$ac_err"; then + rm -rf conftest* + ac_cv_header_stdc=yes +else + echo "$ac_err" >&5 + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + ac_cv_header_stdc=no +fi +rm -f conftest* + +if test $ac_cv_header_stdc = yes; then + # SunOS 4.x string.h does not declare mem*, contrary to ANSI. +cat > conftest.$ac_ext < +EOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + egrep "memchr" >/dev/null 2>&1; then + : +else + rm -rf conftest* + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. +cat > conftest.$ac_ext < +EOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + egrep "free" >/dev/null 2>&1; then + : +else + rm -rf conftest* + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. +if test "$cross_compiling" = yes; then + : +else + cat > conftest.$ac_ext < +#define ISLOWER(c) ('a' <= (c) && (c) <= 'z') +#define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c)) +#define XOR(e, f) (((e) && !(f)) || (!(e) && (f))) +int main () { int i; for (i = 0; i < 256; i++) +if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2); +exit (0); } + +EOF +if { (eval echo configure:5962: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +then + : +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -fr conftest* + ac_cv_header_stdc=no +fi +rm -fr conftest* +fi + +fi +fi + +echo "$ac_t""$ac_cv_header_stdc" 1>&6 +if test $ac_cv_header_stdc = yes; then + cat >> confdefs.h <<\EOF +#define STDC_HEADERS 1 +EOF + +fi + +ac_header_dirent=no +for ac_hdr in dirent.h sys/ndir.h sys/dir.h ndir.h +do +ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` +echo $ac_n "checking for $ac_hdr that defines DIR""... $ac_c" 1>&6 +echo "configure:5990: checking for $ac_hdr that defines DIR" >&5 +if eval "test \"`echo '$''{'ac_cv_header_dirent_$ac_safe'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +#include <$ac_hdr> +int main() { +DIR *dirp = 0; +; return 0; } +EOF +if { (eval echo configure:6003: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then + rm -rf conftest* + eval "ac_cv_header_dirent_$ac_safe=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_header_dirent_$ac_safe=no" +fi +rm -f conftest* +fi +if eval "test \"`echo '$ac_cv_header_dirent_'$ac_safe`\" = yes"; then + echo "$ac_t""yes" 1>&6 + ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'` + cat >> confdefs.h <&6 +fi +done +# Two versions of opendir et al. are in -ldir and -lx on SCO Xenix. +if test $ac_header_dirent = dirent.h; then +echo $ac_n "checking for opendir in -ldir""... $ac_c" 1>&6 +echo "configure:6028: checking for opendir in -ldir" >&5 +ac_lib_var=`echo dir'_'opendir | sed 'y%./+-%__p_%'` +if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + ac_save_LIBS="$LIBS" +LIBS="-ldir $LIBS" +cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=no" +fi +rm -f conftest* +LIBS="$ac_save_LIBS" + +fi +if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then + echo "$ac_t""yes" 1>&6 + LIBS="$LIBS -ldir" +else + echo "$ac_t""no" 1>&6 +fi + +else +echo $ac_n "checking for opendir in -lx""... $ac_c" 1>&6 +echo "configure:6069: checking for opendir in -lx" >&5 +ac_lib_var=`echo x'_'opendir | sed 'y%./+-%__p_%'` +if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + ac_save_LIBS="$LIBS" +LIBS="-lx $LIBS" +cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=no" +fi +rm -f conftest* +LIBS="$ac_save_LIBS" + +fi +if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then + echo "$ac_t""yes" 1>&6 + LIBS="$LIBS -lx" +else + echo "$ac_t""no" 1>&6 +fi + +fi + +echo $ac_n "checking whether $CC supports assert without backlinking""... $ac_c" 1>&6 +echo "configure:6111: checking whether $CC supports assert without backlinking" >&5 +if eval "test \"`echo '$''{'lt_cv_func_assert_works'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + case $host in + *-*-solaris*) + if test "$GCC" = yes && test "$with_gnu_ld" != yes; then + case `$CC --version 2>/dev/null` in + [12].*) lt_cv_func_assert_works=no ;; + *) lt_cv_func_assert_works=yes ;; + esac + fi + ;; + esac +fi + +echo "$ac_t""$lt_cv_func_assert_works" 1>&6 + +if test "x$lt_cv_func_assert_works" = xyes; then + for ac_hdr in assert.h +do +ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` +echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 +echo "configure:6134: checking for $ac_hdr" >&5 +if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +EOF +ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" +{ (eval echo configure:6144: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` +if test -z "$ac_err"; then + rm -rf conftest* + eval "ac_cv_header_$ac_safe=yes" +else + echo "$ac_err" >&5 + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_header_$ac_safe=no" +fi +rm -f conftest* +fi +if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then + echo "$ac_t""yes" 1>&6 + ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'` + cat >> confdefs.h <&6 +fi +done + +fi + +# Check whether --enable-ltdl-install or --disable-ltdl-install was given. +if test "${enable_ltdl_install+set}" = set; then + enableval="$enable_ltdl_install" + : +fi + + + + +if test x"${enable_ltdl_install-no}" != xno; then + INSTALL_LTDL_TRUE= + INSTALL_LTDL_FALSE='#' +else + INSTALL_LTDL_TRUE='#' + INSTALL_LTDL_FALSE= +fi + + +if test x"${enable_ltdl_convenience-no}" != xno; then + CONVENIENCE_LTDL_TRUE= + CONVENIENCE_LTDL_FALSE='#' +else + CONVENIENCE_LTDL_TRUE='#' + CONVENIENCE_LTDL_FALSE= +fi + + +echo $ac_n "checking which extension is used for shared libraries""... $ac_c" 1>&6 +echo "configure:6200: checking which extension is used for shared libraries" >&5 +if eval "test \"`echo '$''{'libltdl_cv_shlibext'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + ac_last= + for ac_spec in $library_names_spec; do + ac_last="$ac_spec" + done + echo "$ac_last" | sed 's/\[.*\]//;s/^[^.]*//;s/\$.*$//;s/\.$//' > conftest +libltdl_cv_shlibext=`cat conftest` +rm -f conftest + +fi + +echo "$ac_t""$libltdl_cv_shlibext" 1>&6 +if test -n "$libltdl_cv_shlibext"; then + cat >> confdefs.h <&6 +echo "configure:6224: checking which variable specifies run-time library path" >&5 +if eval "test \"`echo '$''{'libltdl_cv_shlibpath_var'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + libltdl_cv_shlibpath_var="$shlibpath_var" +fi + +echo "$ac_t""$libltdl_cv_shlibpath_var" 1>&6 +if test -n "$libltdl_cv_shlibpath_var"; then + cat >> confdefs.h <&6 +echo "configure:6241: checking for the default library search path" >&5 +if eval "test \"`echo '$''{'libltdl_cv_sys_search_path'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + libltdl_cv_sys_search_path="$sys_lib_dlsearch_path_spec" +fi + +echo "$ac_t""$libltdl_cv_sys_search_path" 1>&6 +if test -n "$libltdl_cv_sys_search_path"; then + case "$host" in + *-*-mingw*) pathsep=";" ;; + *) pathsep=":" ;; + esac + sys_search_path= + for dir in $libltdl_cv_sys_search_path; do + if test -z "$sys_search_path"; then + sys_search_path="$dir" + else + sys_search_path="$sys_search_path$pathsep$dir" + fi + done + cat >> confdefs.h <&6 +echo "configure:6269: checking for objdir" >&5 +if eval "test \"`echo '$''{'libltdl_cv_objdir'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + libltdl_cv_objdir="$objdir" +if test -n "$objdir"; then + : +else + rm -f .libs 2>/dev/null + mkdir .libs 2>/dev/null + if test -d .libs; then + libltdl_cv_objdir=.libs + else + # MS-DOS does not allow filenames that begin with a dot. + libltdl_cv_objdir=_libs + fi +rmdir .libs 2>/dev/null +fi +fi + +echo "$ac_t""$libltdl_cv_objdir" 1>&6 +cat >> confdefs.h <&6 +echo "configure:6296: checking whether libtool supports -dlopen/-dlpreopen" >&5 +if eval "test \"`echo '$''{'libltdl_cv_preloaded_symbols'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$global_symbol_pipe"; then + libltdl_cv_preloaded_symbols=yes + else + libltdl_cv_preloaded_symbols=no + fi + +fi + +echo "$ac_t""$libltdl_cv_preloaded_symbols" 1>&6 +if test x"$libltdl_cv_preloaded_symbols" = x"yes"; then + cat >> confdefs.h <<\EOF +#define HAVE_PRELOADED_SYMBOLS 1 +EOF + +fi + +LIBADD_DL= + + +echo $ac_n "checking for shl_load""... $ac_c" 1>&6 +echo "configure:6320: checking for shl_load" >&5 +if eval "test \"`echo '$''{'ac_cv_func_shl_load'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +/* Override any gcc2 internal prototype to avoid an error. */ +/* We use char because int might match the return type of a gcc2 + builtin and then its argument prototype would still apply. */ +char shl_load(); + +int main() { + +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined (__stub_shl_load) || defined (__stub___shl_load) +choke me +#else +shl_load(); +#endif + +; return 0; } +EOF +if { (eval echo configure:6348: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_func_shl_load=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_func_shl_load=no" +fi +rm -f conftest* +fi + +if eval "test \"`echo '$ac_cv_func_'shl_load`\" = yes"; then + echo "$ac_t""yes" 1>&6 + cat >> confdefs.h <<\EOF +#define HAVE_SHL_LOAD 1 +EOF + +else + echo "$ac_t""no" 1>&6 +echo $ac_n "checking for shl_load in -ldld""... $ac_c" 1>&6 +echo "configure:6369: checking for shl_load in -ldld" >&5 +ac_lib_var=`echo dld'_'shl_load | sed 'y%./+-%__p_%'` +if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + ac_save_LIBS="$LIBS" +LIBS="-ldld $LIBS" +cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=no" +fi +rm -f conftest* +LIBS="$ac_save_LIBS" + +fi +if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then + echo "$ac_t""yes" 1>&6 + cat >> confdefs.h <<\EOF +#define HAVE_SHL_LOAD 1 +EOF + + LIBADD_DL="$LIBADD_DL -ldld" +else + echo "$ac_t""no" 1>&6 +echo $ac_n "checking for dlopen in -ldl""... $ac_c" 1>&6 +echo "configure:6411: checking for dlopen in -ldl" >&5 +ac_lib_var=`echo dl'_'dlopen | sed 'y%./+-%__p_%'` +if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + ac_save_LIBS="$LIBS" +LIBS="-ldl $LIBS" +cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=no" +fi +rm -f conftest* +LIBS="$ac_save_LIBS" + +fi +if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then + echo "$ac_t""yes" 1>&6 + cat >> confdefs.h <<\EOF +#define HAVE_LIBDL 1 +EOF + + LIBADD_DL="-ldl" +else + echo "$ac_t""no" 1>&6 +cat > conftest.$ac_ext < +#endif + +int main() { +dlopen(0, 0); +; return 0; } +EOF +if { (eval echo configure:6463: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + cat >> confdefs.h <<\EOF +#define HAVE_LIBDL 1 +EOF + +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + echo $ac_n "checking for dlopen in -lsvld""... $ac_c" 1>&6 +echo "configure:6474: checking for dlopen in -lsvld" >&5 +ac_lib_var=`echo svld'_'dlopen | sed 'y%./+-%__p_%'` +if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + ac_save_LIBS="$LIBS" +LIBS="-lsvld $LIBS" +cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=no" +fi +rm -f conftest* +LIBS="$ac_save_LIBS" + +fi +if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then + echo "$ac_t""yes" 1>&6 + cat >> confdefs.h <<\EOF +#define HAVE_LIBDL 1 +EOF + + LIBADD_DL="-lsvld" +else + echo "$ac_t""no" 1>&6 +echo $ac_n "checking for dld_link in -ldld""... $ac_c" 1>&6 +echo "configure:6516: checking for dld_link in -ldld" >&5 +ac_lib_var=`echo dld'_'dld_link | sed 'y%./+-%__p_%'` +if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + ac_save_LIBS="$LIBS" +LIBS="-ldld $LIBS" +cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_lib_$ac_lib_var=no" +fi +rm -f conftest* +LIBS="$ac_save_LIBS" + +fi +if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then + echo "$ac_t""yes" 1>&6 + cat >> confdefs.h <<\EOF +#define HAVE_DLD 1 +EOF + + LIBADD_DL="$LIBADD_DL -ldld" + +else + echo "$ac_t""no" 1>&6 +fi + + +fi + + +fi +rm -f conftest* + +fi + + +fi + + +fi + + +if test "x$ac_cv_func_dlopen" = xyes || test "x$ac_cv_lib_dl_dlopen" = xyes; then + LIBS_SAVE="$LIBS" + LIBS="$LIBS $LIBADD_DL" + for ac_func in dlerror +do +echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 +echo "configure:6582: checking for $ac_func" >&5 +if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +/* Override any gcc2 internal prototype to avoid an error. */ +/* We use char because int might match the return type of a gcc2 + builtin and then its argument prototype would still apply. */ +char $ac_func(); + +int main() { + +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined (__stub_$ac_func) || defined (__stub___$ac_func) +choke me +#else +$ac_func(); +#endif + +; return 0; } +EOF +if { (eval echo configure:6610: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_func_$ac_func=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_func_$ac_func=no" +fi +rm -f conftest* +fi + +if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then + echo "$ac_t""yes" 1>&6 + ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'` + cat >> confdefs.h <&6 +fi +done + + LIBS="$LIBS_SAVE" +fi + +echo $ac_n "checking for _ prefix in compiled symbols""... $ac_c" 1>&6 +echo "configure:6638: checking for _ prefix in compiled symbols" >&5 +if eval "test \"`echo '$''{'ac_cv_sys_symbol_underscore'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + ac_cv_sys_symbol_underscore=no +cat > conftest.$ac_ext <&5; (eval $ac_compile) 2>&5; }; then + # Now try to grab the symbols. + ac_nlist=conftest.nm + if { (eval echo configure:6650: \"$NM conftest.$ac_objext \| $global_symbol_pipe \> $ac_nlist\") 1>&5; (eval $NM conftest.$ac_objext \| $global_symbol_pipe \> $ac_nlist) 2>&5; } && test -s "$ac_nlist"; then + # See whether the symbols have a leading underscore. + if egrep '^. _nm_test_func' "$ac_nlist" >/dev/null; then + ac_cv_sys_symbol_underscore=yes + else + if egrep '^. nm_test_func ' "$ac_nlist" >/dev/null; then + : + else + echo "configure: cannot find nm_test_func in $ac_nlist" >&5 + fi + fi + else + echo "configure: cannot run $global_symbol_pipe" >&5 + fi +else + echo "configure: failed program was:" >&5 + cat conftest.c >&5 +fi +rm -rf conftest* + +fi + +echo "$ac_t""$ac_cv_sys_symbol_underscore" 1>&6 + +if test x"$ac_cv_sys_symbol_underscore" = xyes; then + if test x"$ac_cv_func_dlopen" = xyes || + test x"$ac_cv_lib_dl_dlopen" = xyes ; then + echo $ac_n "checking whether we have to add an underscore for dlsym""... $ac_c" 1>&6 +echo "configure:6678: checking whether we have to add an underscore for dlsym" >&5 +if eval "test \"`echo '$''{'libltdl_cv_need_uscore'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + libltdl_cv_need_uscore=unknown + save_LIBS="$LIBS" + LIBS="$LIBS $LIBADD_DL" + if test "$cross_compiling" = yes; then : + libltdl_cv_need_uscore=cross +else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext < +#endif + +#include + +#ifdef RTLD_GLOBAL +# define LT_DLGLOBAL RTLD_GLOBAL +#else +# ifdef DL_GLOBAL +# define LT_DLGLOBAL DL_GLOBAL +# else +# define LT_DLGLOBAL 0 +# endif +#endif + +/* We may have to define LT_DLLAZY_OR_NOW in the command line if we + find out it does not work in some platform. */ +#ifndef LT_DLLAZY_OR_NOW +# ifdef RTLD_LAZY +# define LT_DLLAZY_OR_NOW RTLD_LAZY +# else +# ifdef DL_LAZY +# define LT_DLLAZY_OR_NOW DL_LAZY +# else +# ifdef RTLD_NOW +# define LT_DLLAZY_OR_NOW RTLD_NOW +# else +# ifdef DL_NOW +# define LT_DLLAZY_OR_NOW DL_NOW +# else +# define LT_DLLAZY_OR_NOW 0 +# endif +# endif +# endif +# endif +#endif + +#ifdef __cplusplus +extern "C" void exit (int); +#endif + +void fnord() { int i=42;} +int main () +{ + void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); + int status = $lt_dlunknown; + + if (self) + { + if (dlsym (self,"fnord")) status = $lt_dlno_uscore; + else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; + /* dlclose (self); */ + } + + exit (status); +} +EOF + if { (eval echo configure:6752: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} 2>/dev/null; then + (./conftest; exit; ) 2>/dev/null + lt_status=$? + case x$lt_status in + x$lt_dlno_uscore) libltdl_cv_need_uscore=no ;; + x$lt_dlneed_uscore) libltdl_cv_need_uscore=yes ;; + x$lt_unknown|x*) ;; + esac + else : + # compilation failed + + fi +fi +rm -fr conftest* + + LIBS="$save_LIBS" + +fi + +echo "$ac_t""$libltdl_cv_need_uscore" 1>&6 + fi +fi + +if test x"$libltdl_cv_need_uscore" = xyes; then + cat >> confdefs.h <<\EOF +#define NEED_USCORE 1 +EOF + +fi + + +echo $ac_n "checking whether deplibs are loaded by dlopen""... $ac_c" 1>&6 +echo "configure:6784: checking whether deplibs are loaded by dlopen" >&5 +if eval "test \"`echo '$''{'libltdl_cv_sys_dlopen_deplibs'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + # PORTME does your system automatically load deplibs for dlopen()? + libltdl_cv_sys_dlopen_deplibs=unknown + case "$host_os" in + linux*) + libltdl_cv_sys_dlopen_deplibs=yes + ;; + netbsd*) + libltdl_cv_sys_dlopen_deplibs=yes + ;; + openbsd*) + libltdl_cv_sys_dlopen_deplibs=yes + ;; + solaris*) + libltdl_cv_sys_dlopen_deplibs=yes + ;; + esac + +fi + +echo "$ac_t""$libltdl_cv_sys_dlopen_deplibs" 1>&6 +if test "$libltdl_cv_sys_dlopen_deplibs" != yes; then + cat >> confdefs.h <<\EOF +#define LTDL_DLOPEN_DEPLIBS 1 +EOF + +fi + +for ac_hdr in argz.h +do +ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` +echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 +echo "configure:6819: checking for $ac_hdr" >&5 +if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +EOF +ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" +{ (eval echo configure:6829: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` +if test -z "$ac_err"; then + rm -rf conftest* + eval "ac_cv_header_$ac_safe=yes" +else + echo "$ac_err" >&5 + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_header_$ac_safe=no" +fi +rm -f conftest* +fi +if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then + echo "$ac_t""yes" 1>&6 + ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'` + cat >> confdefs.h <&6 +fi +done + + +echo $ac_n "checking for error_t""... $ac_c" 1>&6 +echo "configure:6857: checking for error_t" >&5 +if eval "test \"`echo '$''{'ac_Type'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +#endif +int main() { +if ((error_t *) 0) + return 0; + if (sizeof (error_t)) + return 0; +; return 0; } +EOF +if { (eval echo configure:6874: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + ac_Type=yes +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + ac_Type=no +fi +rm -f conftest* +fi + +echo "$ac_t""$ac_Type" 1>&6 + if test "x$ac_Type" = xyes; then + : + else + cat >> confdefs.h <<\EOF +#define error_t int +EOF + + fi + +for ac_func in argz_append argz_create_sep argz_insert argz_next argz_stringify +do +echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 +echo "configure:6899: checking for $ac_func" >&5 +if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +/* Override any gcc2 internal prototype to avoid an error. */ +/* We use char because int might match the return type of a gcc2 + builtin and then its argument prototype would still apply. */ +char $ac_func(); + +int main() { + +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined (__stub_$ac_func) || defined (__stub___$ac_func) +choke me +#else +$ac_func(); +#endif + +; return 0; } +EOF +if { (eval echo configure:6927: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_func_$ac_func=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_func_$ac_func=no" +fi +rm -f conftest* +fi + +if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then + echo "$ac_t""yes" 1>&6 + ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'` + cat >> confdefs.h <&6 +fi +done + + + + + + + + + + + + + + + + + + + + + +for ac_hdr in errno.h malloc.h memory.h stdlib.h stdio.h ctype.h unistd.h +do +ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` +echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 +echo "configure:6975: checking for $ac_hdr" >&5 +if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +EOF +ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" +{ (eval echo configure:6985: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` +if test -z "$ac_err"; then + rm -rf conftest* + eval "ac_cv_header_$ac_safe=yes" +else + echo "$ac_err" >&5 + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_header_$ac_safe=no" +fi +rm -f conftest* +fi +if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then + echo "$ac_t""yes" 1>&6 + ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'` + cat >> confdefs.h <&6 +fi +done + +for ac_hdr in dl.h sys/dl.h dld.h +do +ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` +echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 +echo "configure:7015: checking for $ac_hdr" >&5 +if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +EOF +ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" +{ (eval echo configure:7025: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` +if test -z "$ac_err"; then + rm -rf conftest* + eval "ac_cv_header_$ac_safe=yes" +else + echo "$ac_err" >&5 + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_header_$ac_safe=no" +fi +rm -f conftest* +fi +if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then + echo "$ac_t""yes" 1>&6 + ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'` + cat >> confdefs.h <&6 +fi +done + +for ac_hdr in string.h strings.h +do +ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` +echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 +echo "configure:7055: checking for $ac_hdr" >&5 +if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +EOF +ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" +{ (eval echo configure:7065: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` +if test -z "$ac_err"; then + rm -rf conftest* + eval "ac_cv_header_$ac_safe=yes" +else + echo "$ac_err" >&5 + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_header_$ac_safe=no" +fi +rm -f conftest* +fi +if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then + echo "$ac_t""yes" 1>&6 + ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'` + cat >> confdefs.h <&6 +fi +done + + +for ac_func in strchr index +do +echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 +echo "configure:7095: checking for $ac_func" >&5 +if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +/* Override any gcc2 internal prototype to avoid an error. */ +/* We use char because int might match the return type of a gcc2 + builtin and then its argument prototype would still apply. */ +char $ac_func(); + +int main() { + +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined (__stub_$ac_func) || defined (__stub___$ac_func) +choke me +#else +$ac_func(); +#endif + +; return 0; } +EOF +if { (eval echo configure:7123: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_func_$ac_func=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_func_$ac_func=no" +fi +rm -f conftest* +fi + +if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then + echo "$ac_t""yes" 1>&6 + ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'` + cat >> confdefs.h <&6 +fi +done + +for ac_func in strrchr rindex +do +echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 +echo "configure:7150: checking for $ac_func" >&5 +if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +/* Override any gcc2 internal prototype to avoid an error. */ +/* We use char because int might match the return type of a gcc2 + builtin and then its argument prototype would still apply. */ +char $ac_func(); + +int main() { + +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined (__stub_$ac_func) || defined (__stub___$ac_func) +choke me +#else +$ac_func(); +#endif + +; return 0; } +EOF +if { (eval echo configure:7178: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_func_$ac_func=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_func_$ac_func=no" +fi +rm -f conftest* +fi + +if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then + echo "$ac_t""yes" 1>&6 + ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'` + cat >> confdefs.h <&6 +fi +done + +for ac_func in memcpy bcopy +do +echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 +echo "configure:7205: checking for $ac_func" >&5 +if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +/* Override any gcc2 internal prototype to avoid an error. */ +/* We use char because int might match the return type of a gcc2 + builtin and then its argument prototype would still apply. */ +char $ac_func(); + +int main() { + +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined (__stub_$ac_func) || defined (__stub___$ac_func) +choke me +#else +$ac_func(); +#endif + +; return 0; } +EOF +if { (eval echo configure:7233: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_func_$ac_func=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_func_$ac_func=no" +fi +rm -f conftest* +fi + +if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then + echo "$ac_t""yes" 1>&6 + ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'` + cat >> confdefs.h <&6 +fi +done + +for ac_func in memmove strcmp +do +echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 +echo "configure:7260: checking for $ac_func" >&5 +if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +/* Override any gcc2 internal prototype to avoid an error. */ +/* We use char because int might match the return type of a gcc2 + builtin and then its argument prototype would still apply. */ +char $ac_func(); + +int main() { + +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined (__stub_$ac_func) || defined (__stub___$ac_func) +choke me +#else +$ac_func(); +#endif + +; return 0; } +EOF +if { (eval echo configure:7288: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_func_$ac_func=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_func_$ac_func=no" +fi +rm -f conftest* +fi + +if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then + echo "$ac_t""yes" 1>&6 + ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'` + cat >> confdefs.h <&6 +fi +done + + + + +trap '' 1 2 15 +cat > confcache <<\EOF +# This file is a shell script that caches the results of configure +# tests run on this system so they can be shared between configure +# scripts and configure runs. It is not useful on other systems. +# If it contains results you don't want to keep, you may remove or edit it. +# +# By default, configure uses ./config.cache as the cache file, +# creating it if it does not exist already. You can give configure +# the --cache-file=FILE option to use a different cache file; that is +# what configure does when it calls configure scripts in +# subdirectories, so they share the cache. +# Giving --cache-file=/dev/null disables caching, for debugging configure. +# config.status only pays attention to the cache file if you give it the +# --recheck option to rerun configure. +# +EOF +# The following way of writing the cache mishandles newlines in values, +# but we know of no workaround that is simple, portable, and efficient. +# So, don't put newlines in cache variables' values. +# Ultrix sh set writes to stderr and can't be redirected directly, +# and sets the high bit in the cache file unless we assign to the vars. +(set) 2>&1 | + case `(ac_space=' '; set | grep ac_space) 2>&1` in + *ac_space=\ *) + # `set' does not quote correctly, so add quotes (double-quote substitution + # turns \\\\ into \\, and sed turns \\ into \). + sed -n \ + -e "s/'/'\\\\''/g" \ + -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p" + ;; + *) + # `set' quotes correctly as required by POSIX, so do not add quotes. + sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p' + ;; + esac >> confcache +if cmp -s $cache_file confcache; then + : +else + if test -w $cache_file; then + echo "updating cache $cache_file" + cat confcache > $cache_file + else + echo "not updating unwritable cache $cache_file" + fi +fi +rm -f confcache + +trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15 + +test "x$prefix" = xNONE && prefix=$ac_default_prefix +# Let make expand exec_prefix. +test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + +# Any assignment to VPATH causes Sun make to only execute +# the first set of double-colon rules, so remove it if not needed. +# If there is a colon in the path, we need to keep it. +if test "x$srcdir" = x.; then + ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d' +fi + +trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15 + +DEFS=-DHAVE_CONFIG_H + +# Without the "./", some shells look in PATH for config.status. +: ${CONFIG_STATUS=./config.status} + +echo creating $CONFIG_STATUS +rm -f $CONFIG_STATUS +cat > $CONFIG_STATUS </dev/null | sed 1q`: +# +# $0 $ac_configure_args +# +# Compiler output produced by configure, useful for debugging +# configure, is in ./config.log if it exists. + +ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]" +for ac_option +do + case "\$ac_option" in + -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r) + echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion" + exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;; + -version | --version | --versio | --versi | --vers | --ver | --ve | --v) + echo "$CONFIG_STATUS generated by autoconf version 2.13" + exit 0 ;; + -help | --help | --hel | --he | --h) + echo "\$ac_cs_usage"; exit 0 ;; + *) echo "\$ac_cs_usage"; exit 1 ;; + esac +done + +ac_given_srcdir=$srcdir +ac_given_INSTALL="$INSTALL" + +trap 'rm -fr `echo "Makefile config.h:config-h.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15 +EOF +cat >> $CONFIG_STATUS < conftest.subs <<\\CEOF +$ac_vpsub +$extrasub +s%@SHELL@%$SHELL%g +s%@CFLAGS@%$CFLAGS%g +s%@CPPFLAGS@%$CPPFLAGS%g +s%@CXXFLAGS@%$CXXFLAGS%g +s%@FFLAGS@%$FFLAGS%g +s%@DEFS@%$DEFS%g +s%@LDFLAGS@%$LDFLAGS%g +s%@LIBS@%$LIBS%g +s%@exec_prefix@%$exec_prefix%g +s%@prefix@%$prefix%g +s%@program_transform_name@%$program_transform_name%g +s%@bindir@%$bindir%g +s%@sbindir@%$sbindir%g +s%@libexecdir@%$libexecdir%g +s%@datadir@%$datadir%g +s%@sysconfdir@%$sysconfdir%g +s%@sharedstatedir@%$sharedstatedir%g +s%@localstatedir@%$localstatedir%g +s%@libdir@%$libdir%g +s%@includedir@%$includedir%g +s%@oldincludedir@%$oldincludedir%g +s%@infodir@%$infodir%g +s%@mandir@%$mandir%g +s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g +s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g +s%@INSTALL_DATA@%$INSTALL_DATA%g +s%@PACKAGE@%$PACKAGE%g +s%@VERSION@%$VERSION%g +s%@EXEEXT@%$EXEEXT%g +s%@OBJEXT@%$OBJEXT%g +s%@ACLOCAL@%$ACLOCAL%g +s%@AUTOCONF@%$AUTOCONF%g +s%@AUTOMAKE@%$AUTOMAKE%g +s%@AUTOHEADER@%$AUTOHEADER%g +s%@MAKEINFO@%$MAKEINFO%g +s%@AMTAR@%$AMTAR%g +s%@install_sh@%$install_sh%g +s%@INSTALL_STRIP_PROGRAM@%$INSTALL_STRIP_PROGRAM%g +s%@AWK@%$AWK%g +s%@SET_MAKE@%$SET_MAKE%g +s%@AMDEP_TRUE@%$AMDEP_TRUE%g +s%@AMDEP_FALSE@%$AMDEP_FALSE%g +s%@AMDEPBACKSLASH@%$AMDEPBACKSLASH%g +s%@DEPDIR@%$DEPDIR%g +s%@MAINTAINER_MODE_TRUE@%$MAINTAINER_MODE_TRUE%g +s%@MAINTAINER_MODE_FALSE@%$MAINTAINER_MODE_FALSE%g +s%@MAINT@%$MAINT%g +s%@CC@%$CC%g +s%@am__include@%$am__include%g +s%@am__quote@%$am__quote%g +s%@CCDEPMODE@%$CCDEPMODE%g +s%@host@%$host%g +s%@host_alias@%$host_alias%g +s%@host_cpu@%$host_cpu%g +s%@host_vendor@%$host_vendor%g +s%@host_os@%$host_os%g +s%@build@%$build%g +s%@build_alias@%$build_alias%g +s%@build_cpu@%$build_cpu%g +s%@build_vendor@%$build_vendor%g +s%@build_os@%$build_os%g +s%@LN_S@%$LN_S%g +s%@ECHO@%$ECHO%g +s%@RANLIB@%$RANLIB%g +s%@STRIP@%$STRIP%g +s%@DLLTOOL@%$DLLTOOL%g +s%@AS@%$AS%g +s%@OBJDUMP@%$OBJDUMP%g +s%@CPP@%$CPP%g +s%@LIBTOOL@%$LIBTOOL%g +s%@LIBTOOL_DEPS@%$LIBTOOL_DEPS%g +s%@INSTALL_LTDL_TRUE@%$INSTALL_LTDL_TRUE%g +s%@INSTALL_LTDL_FALSE@%$INSTALL_LTDL_FALSE%g +s%@CONVENIENCE_LTDL_TRUE@%$CONVENIENCE_LTDL_TRUE%g +s%@CONVENIENCE_LTDL_FALSE@%$CONVENIENCE_LTDL_FALSE%g +s%@LIBADD_DL@%$LIBADD_DL%g + +CEOF +EOF + +cat >> $CONFIG_STATUS <<\EOF + +# Split the substitutions into bite-sized pieces for seds with +# small command number limits, like on Digital OSF/1 and HP-UX. +ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script. +ac_file=1 # Number of current file. +ac_beg=1 # First line for current file. +ac_end=$ac_max_sed_cmds # Line after last line for current file. +ac_more_lines=: +ac_sed_cmds="" +while $ac_more_lines; do + if test $ac_beg -gt 1; then + sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file + else + sed "${ac_end}q" conftest.subs > conftest.s$ac_file + fi + if test ! -s conftest.s$ac_file; then + ac_more_lines=false + rm -f conftest.s$ac_file + else + if test -z "$ac_sed_cmds"; then + ac_sed_cmds="sed -f conftest.s$ac_file" + else + ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file" + fi + ac_file=`expr $ac_file + 1` + ac_beg=$ac_end + ac_end=`expr $ac_end + $ac_max_sed_cmds` + fi +done +if test -z "$ac_sed_cmds"; then + ac_sed_cmds=cat +fi +EOF + +cat >> $CONFIG_STATUS <> $CONFIG_STATUS <<\EOF +for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then + # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in". + case "$ac_file" in + *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'` + ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;; + *) ac_file_in="${ac_file}.in" ;; + esac + + # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories. + + # Remove last slash and all that follows it. Not all systems have dirname. + ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'` + if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then + # The file is in a subdirectory. + test ! -d "$ac_dir" && mkdir "$ac_dir" + ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`" + # A "../" for each directory in $ac_dir_suffix. + ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'` + else + ac_dir_suffix= ac_dots= + fi + + case "$ac_given_srcdir" in + .) srcdir=. + if test -z "$ac_dots"; then top_srcdir=. + else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;; + /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;; + *) # Relative path. + srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix" + top_srcdir="$ac_dots$ac_given_srcdir" ;; + esac + + case "$ac_given_INSTALL" in + [/$]*) INSTALL="$ac_given_INSTALL" ;; + *) INSTALL="$ac_dots$ac_given_INSTALL" ;; + esac + + echo creating "$ac_file" + rm -f "$ac_file" + configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure." + case "$ac_file" in + *Makefile*) ac_comsub="1i\\ +# $configure_input" ;; + *) ac_comsub= ;; + esac + + ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"` + sed -e "$ac_comsub +s%@configure_input@%$configure_input%g +s%@srcdir@%$srcdir%g +s%@top_srcdir@%$top_srcdir%g +s%@INSTALL@%$INSTALL%g +" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file +fi; done +rm -f conftest.s* + +# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where +# NAME is the cpp macro being defined and VALUE is the value it is being given. +# +# ac_d sets the value in "#define NAME VALUE" lines. +ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)' +ac_dB='\([ ][ ]*\)[^ ]*%\1#\2' +ac_dC='\3' +ac_dD='%g' +# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE". +ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)' +ac_uB='\([ ]\)%\1#\2define\3' +ac_uC=' ' +ac_uD='\4%g' +# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE". +ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)' +ac_eB='$%\1#\2define\3' +ac_eC=' ' +ac_eD='%g' + +if test "${CONFIG_HEADERS+set}" != set; then +EOF +cat >> $CONFIG_STATUS <> $CONFIG_STATUS <<\EOF +fi +for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then + # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in". + case "$ac_file" in + *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'` + ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;; + *) ac_file_in="${ac_file}.in" ;; + esac + + echo creating $ac_file + + rm -f conftest.frag conftest.in conftest.out + ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"` + cat $ac_file_inputs > conftest.in + +EOF + +# Transform confdefs.h into a sed script conftest.vals that substitutes +# the proper values into config.h.in to produce config.h. And first: +# Protect against being on the right side of a sed subst in config.status. +# Protect against being in an unquoted here document in config.status. +rm -f conftest.vals +cat > conftest.hdr <<\EOF +s/[\\&%]/\\&/g +s%[\\$`]%\\&%g +s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp +s%ac_d%ac_u%gp +s%ac_u%ac_e%gp +EOF +sed -n -f conftest.hdr confdefs.h > conftest.vals +rm -f conftest.hdr + +# This sed command replaces #undef with comments. This is necessary, for +# example, in the case of _POSIX_SOURCE, which is predefined and required +# on some systems where configure will not decide to define it. +cat >> conftest.vals <<\EOF +s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */% +EOF + +# Break up conftest.vals because some shells have a limit on +# the size of here documents, and old seds have small limits too. + +rm -f conftest.tail +while : +do + ac_lines=`grep -c . conftest.vals` + # grep -c gives empty output for an empty file on some AIX systems. + if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi + # Write a limited-size here document to conftest.frag. + echo ' cat > conftest.frag <> $CONFIG_STATUS + sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS + echo 'CEOF + sed -f conftest.frag conftest.in > conftest.out + rm -f conftest.in + mv conftest.out conftest.in +' >> $CONFIG_STATUS + sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail + rm -f conftest.vals + mv conftest.tail conftest.vals +done +rm -f conftest.vals + +cat >> $CONFIG_STATUS <<\EOF + rm -f conftest.frag conftest.h + echo "/* $ac_file. Generated automatically by configure. */" > conftest.h + cat conftest.in >> conftest.h + rm -f conftest.in + if cmp -s $ac_file conftest.h 2>/dev/null; then + echo "$ac_file is unchanged" + rm -f conftest.h + else + # Remove last slash and all that follows it. Not all systems have dirname. + ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'` + if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then + # The file is in a subdirectory. + test ! -d "$ac_dir" && mkdir "$ac_dir" + fi + rm -f $ac_file + mv conftest.h $ac_file + fi +fi; done + +EOF +cat >> $CONFIG_STATUS < "\$am_dir"stamp-h\$am_indx + ;; + esac + am_indx=\`expr \$am_indx + 1\` +done +AMDEP_TRUE="$AMDEP_TRUE" +ac_aux_dir="$ac_aux_dir" + +EOF +cat >> $CONFIG_STATUS <<\EOF +test -z "$CONFIG_HEADERS" || echo timestamp > stamp-h + +test x"$AMDEP_TRUE" != x"" || +for mf in $CONFIG_FILES; do + case "$mf" in + Makefile) dirpart=.;; + */Makefile) dirpart=`echo "$mf" | sed -e 's|/[^/]*$||'`;; + *) continue;; + esac + grep '^DEP_FILES *= *[^ #]' < "$mf" > /dev/null || continue + # Extract the definition of DEP_FILES from the Makefile without + # running `make'. + DEPDIR=`sed -n -e '/^DEPDIR = / s///p' < "$mf"` + test -z "$DEPDIR" && continue + # When using ansi2knr, U may be empty or an underscore; expand it + U=`sed -n -e '/^U = / s///p' < "$mf"` + test -d "$dirpart/$DEPDIR" || mkdir "$dirpart/$DEPDIR" + # We invoke sed twice because it is the simplest approach to + # changing $(DEPDIR) to its actual value in the expansion. + for file in `sed -n -e ' + /^DEP_FILES = .*\\\\$/ { + s/^DEP_FILES = // + :loop + s/\\\\$// + p + n + /\\\\$/ b loop + p + } + /^DEP_FILES = / s/^DEP_FILES = //p' < "$mf" | \ + sed -e 's/\$(DEPDIR)/'"$DEPDIR"'/g' -e 's/\$U/'"$U"'/g'`; do + # Make sure the directory exists. + test -f "$dirpart/$file" && continue + fdir=`echo "$file" | sed -e 's|/[^/]*$||'` + $ac_aux_dir/mkinstalldirs "$dirpart/$fdir" > /dev/null 2>&1 + # echo "creating $dirpart/$file" + echo '# dummy' > "$dirpart/$file" + done +done + + +exit 0 +EOF +chmod +x $CONFIG_STATUS +rm -fr confdefs* $ac_clean_files +test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1 + + +# Local Variables: +# mode:shell-script +# sh-indentation:2 +# End: diff --git a/sim/ucsim/libltdl/configure.in b/sim/ucsim/libltdl/configure.in new file mode 100644 index 0000000..c4a0709 --- /dev/null +++ b/sim/ucsim/libltdl/configure.in @@ -0,0 +1,44 @@ +dnl Process this file with autoconf to create configure. + +AC_INIT(ltdl.c) + +dnl We shouldn't be using these internal macros of autoconf, +dnl but CONFIG_AUX_DIR($with_auxdir) breaks automake. +AC_ARG_WITH(auxdir, +[ --with-auxdir=DIR path to autoconf auxiliary files], +[AC_CONFIG_AUX_DIRS($with_auxdir)], +[AC_CONFIG_AUX_DIR_DEFAULT]) + +if test -z "$enable_ltdl_install$enable_ltdl_convenience"; then + if test -f ${srcdir}/ltmain.sh; then + # if libltdl is libtoolized, it is assumed to be stand-alone and + # installed unless the command line overrides it (tested above) + enable_ltdl_install=yes + else + AC_MSG_WARN([*** The top-level configure must select either]) + AC_MSG_WARN([*** [A""C_LIBLTDL_INSTALLABLE] or [A""C_LIBLTDL_CONVENIENCE].]) + AC_MSG_ERROR([*** Maybe you want to --enable-ltdl-install?]) + fi +fi + +AM_INIT_AUTOMAKE(libltdl,1.2,-) +AM_CONFIG_HEADER(config.h:config-h.in) +AM_MAINTAINER_MODE + +AC_PROG_CC +AC_C_CONST +AC_C_INLINE + +AC_LIBTOOL_WIN32_DLL +AM_PROG_LIBTOOL +AC_SUBST(LIBTOOL_DEPS) + +AC_LIB_LTDL + +dnl Output the makefile +AC_OUTPUT(Makefile) + +# Local Variables: +# mode:shell-script +# sh-indentation:2 +# End: diff --git a/sim/ucsim/libltdl/ltdl.c b/sim/ucsim/libltdl/ltdl.c new file mode 100644 index 0000000..14f1c12 --- /dev/null +++ b/sim/ucsim/libltdl/ltdl.c @@ -0,0 +1,3999 @@ +/* ltdl.c -- system independent dlopen wrapper + Copyright (C) 1998, 1999, 2000 Free Software Foundation, Inc. + Originally by Thomas Tanner + This file is part of GNU Libtool. + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2 of the License, or (at your option) any later version. + +As a special exception to the GNU Lesser General Public License, +if you distribute this file as part of a program or library that +is built using GNU libtool, you may include it under the same +distribution terms that you use for the rest of that program. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, write to the Free Software +Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA +02111-1307 USA + +*/ + +#if HAVE_CONFIG_H +# include +#endif + +#if HAVE_UNISTD_H +# include +#endif + +#if HAVE_STDIO_H +# include +#endif + +#if HAVE_STDLIB_H +# include +#endif + +#if HAVE_STRING_H +# include +#else +# if HAVE_STRINGS_H +# include +# endif +#endif + +#if HAVE_CTYPE_H +# include +#endif + +#if HAVE_MALLOC_H +# include +#endif + +#if HAVE_MEMORY_H +# include +#endif + +#if HAVE_ERRNO_H +# include +#endif + +#if HAVE_DIRENT_H +# include +# define LT_D_NAMLEN(dirent) (strlen((dirent)->d_name)) +#else +# define dirent direct +# define LT_D_NAMLEN(dirent) ((dirent)->d_namlen) +# if HAVE_SYS_NDIR_H +# include +# endif +# if HAVE_SYS_DIR_H +# include +# endif +# if HAVE_NDIR_H +# include +# endif +#endif + +#if HAVE_ARGZ_H +# include +#endif + +#if HAVE_ASSERT_H +# include +#else +# define assert(arg) ((void) 0) +#endif + +#include "ltdl.h" + +#if WITH_DMALLOC +# include +#endif + + + + +/* --- WINDOWS SUPPORT --- */ + + +#ifdef DLL_EXPORT +# define LT_GLOBAL_DATA __declspec(dllexport) +#else +# define LT_GLOBAL_DATA +#endif + +/* fopen() mode flags for reading a text file */ +#undef LT_READTEXT_MODE +#ifdef __WINDOWS__ +# define LT_READTEXT_MODE "rt" +#else +# define LT_READTEXT_MODE "r" +#endif + + + + +/* --- MANIFEST CONSTANTS --- */ + + +/* Standard libltdl search path environment variable name */ +#undef LTDL_SEARCHPATH_VAR +#define LTDL_SEARCHPATH_VAR "LTDL_LIBRARY_PATH" + +/* Standard libtool archive file extension. */ +#undef LTDL_ARCHIVE_EXT +#define LTDL_ARCHIVE_EXT ".la" + +/* max. filename length */ +#ifndef LT_FILENAME_MAX +# define LT_FILENAME_MAX 1024 +#endif + +/* This is the maximum symbol size that won't require malloc/free */ +#undef LT_SYMBOL_LENGTH +#define LT_SYMBOL_LENGTH 128 + +/* This accounts for the _LTX_ separator */ +#undef LT_SYMBOL_OVERHEAD +#define LT_SYMBOL_OVERHEAD 5 + + + + +/* --- MEMORY HANDLING --- */ + + +/* These are the functions used internally. In addition to making + use of the associated function pointers above, they also perform + error handling. */ +static char *lt_estrdup LT_PARAMS((const char *str)); +static lt_ptr lt_emalloc LT_PARAMS((size_t size)); +static lt_ptr lt_erealloc LT_PARAMS((lt_ptr addr, size_t size)); + +static lt_ptr rpl_realloc LT_PARAMS((lt_ptr ptr, size_t size)); + +/* These are the pointers that can be changed by the caller: */ +LT_GLOBAL_DATA lt_ptr (*lt_dlmalloc) LT_PARAMS((size_t size)) + = (lt_ptr (*) LT_PARAMS((size_t))) malloc; +LT_GLOBAL_DATA lt_ptr (*lt_dlrealloc) LT_PARAMS((lt_ptr ptr, size_t size)) + = (lt_ptr (*) LT_PARAMS((lt_ptr, size_t))) rpl_realloc; +LT_GLOBAL_DATA void (*lt_dlfree) LT_PARAMS((lt_ptr ptr)) + = (void (*) LT_PARAMS((lt_ptr))) free; + +/* The following macros reduce the amount of typing needed to cast + assigned memory. */ +#if WITH_DMALLOC + +#define LT_DLMALLOC(tp, n) ((tp *) xmalloc ((n) * sizeof(tp))) +#define LT_DLREALLOC(tp, p, n) ((tp *) xrealloc ((p), (n) * sizeof(tp))) +#define LT_DLFREE(p) \ + LT_STMT_START { if (p) (p) = (xfree (p), (lt_ptr) 0); } LT_STMT_END + +#define LT_EMALLOC(tp, n) ((tp *) xmalloc ((n) * sizeof(tp))) +#define LT_EREALLOC(tp, p, n) ((tp *) xrealloc ((p), (n) * sizeof(tp))) + +#else + +#define LT_DLMALLOC(tp, n) ((tp *) lt_dlmalloc ((n) * sizeof(tp))) +#define LT_DLREALLOC(tp, p, n) ((tp *) rpl_realloc ((p), (n) * sizeof(tp))) +#define LT_DLFREE(p) \ + LT_STMT_START { if (p) (p) = (lt_dlfree (p), (lt_ptr) 0); } LT_STMT_END + +#define LT_EMALLOC(tp, n) ((tp *) lt_emalloc ((n) * sizeof(tp))) +#define LT_EREALLOC(tp, p, n) ((tp *) lt_erealloc ((p), (n) * sizeof(tp))) + +#endif + +#define LT_DLMEM_REASSIGN(p, q) LT_STMT_START { \ + if ((p) != (q)) { if (p) lt_dlfree (p); (p) = (q); (q) = 0; } \ + } LT_STMT_END + + +/* --- REPLACEMENT FUNCTIONS --- */ + + +#undef strdup +#define strdup rpl_strdup + +static char *strdup LT_PARAMS((const char *str)); + +static char * +strdup(str) + const char *str; +{ + char *tmp = 0; + + if (str) + { + tmp = LT_DLMALLOC (char, 1+ strlen (str)); + if (tmp) + { + strcpy(tmp, str); + } + } + + return tmp; +} + + +#if ! HAVE_STRCMP + +#undef strcmp +#define strcmp rpl_strcmp + +static int strcmp LT_PARAMS((const char *str1, const char *str2)); + +static int +strcmp (str1, str2) + const char *str1; + const char *str2; +{ + if (str1 == str2) + return 0; + if (str1 == 0) + return -1; + if (str2 == 0) + return 1; + + for (;*str1 && *str2; ++str1, ++str2) + { + if (*str1 != *str2) + break; + } + + return (int)(*str1 - *str2); +} +#endif + + +#if ! HAVE_STRCHR + +# if HAVE_INDEX +# define strchr index +# else +# define strchr rpl_strchr + +static const char *strchr LT_PARAMS((const char *str, int ch)); + +static const char* +strchr(str, ch) + const char *str; + int ch; +{ + const char *p; + + for (p = str; *p != (char)ch && *p != LT_EOS_CHAR; ++p) + /*NOWORK*/; + + return (*p == (char)ch) ? p : 0; +} + +# endif +#endif /* !HAVE_STRCHR */ + + +#if ! HAVE_STRRCHR + +# if HAVE_RINDEX +# define strrchr rindex +# else +# define strrchr rpl_strrchr + +static const char *strrchr LT_PARAMS((const char *str, int ch)); + +static const char* +strrchr(str, ch) + const char *str; + int ch; +{ + const char *p, *q = 0; + + for (p = str; *p != LT_EOS_CHAR; ++p) + { + if (*p == (char) ch) + { + q = p; + } + } + + return q; +} + +# endif +#endif + +/* NOTE: Neither bcopy nor the memcpy implementation below can + reliably handle copying in overlapping areas of memory. Use + memmove (for which there is a fallback implmentation below) + if you need that behaviour. */ +#if ! HAVE_MEMCPY + +# if HAVE_BCOPY +# define memcpy(dest, src, size) bcopy (src, dest, size) +# else +# define memcpy rpl_memcpy + +static lt_ptr memcpy LT_PARAMS((lt_ptr dest, const lt_ptr src, size_t size)); + +static lt_ptr +memcpy (dest, src, size) + lt_ptr dest; + const lt_ptr src; + size_t size; +{ + size_t i = 0; + + for (i = 0; i < size; ++i) + { + dest[i] = src[i]; + } + + return dest; +} + +# endif /* !HAVE_BCOPY */ +#endif /* !HAVE_MEMCPY */ + +#if ! HAVE_MEMMOVE +# define memmove rpl_memmove + +static lt_ptr memmove LT_PARAMS((lt_ptr dest, const lt_ptr src, size_t size)); + +static lt_ptr +memmove (dest, src, size) + lt_ptr dest; + const lt_ptr src; + size_t size; +{ + size_t i; + + if (dest < src) + for (i = 0; i < size; ++i) + { + dest[i] = src[i]; + } + else if (dest > src) + for (i = size -1; i >= 0; --i) + { + dest[i] = src[i]; + } + + return dest; +} + +#endif /* !HAVE_MEMMOVE */ + + +/* According to Alexandre Oliva , + ``realloc is not entirely portable'' + In any case we want to use the allocator supplied by the user without + burdening them with an lt_dlrealloc function pointer to maintain. + Instead implement our own version (with known boundary conditions) + using lt_dlmalloc and lt_dlfree. */ + +#undef realloc +#define realloc rpl_realloc + +static lt_ptr +realloc (ptr, size) + lt_ptr ptr; + size_t size; +{ + if (size == 0) + { + /* For zero or less bytes, free the original memory */ + if (ptr != 0) + { + lt_dlfree (ptr); + } + + return (lt_ptr) 0; + } + else if (ptr == 0) + { + /* Allow reallocation of a NULL pointer. */ + return lt_dlmalloc (size); + } + else + { + /* Allocate a new block, copy and free the old block. */ + lt_ptr mem = lt_dlmalloc (size); + + if (mem) + { + memcpy (mem, ptr, size); + lt_dlfree (ptr); + } + + /* Note that the contents of PTR are not damaged if there is + insufficient memory to realloc. */ + return mem; + } +} + + +#if ! HAVE_ARGZ_APPEND +# define argz_append rpl_argz_append + +static error_t argz_append LT_PARAMS((char **pargz, size_t *pargz_len, + const char *buf, size_t buf_len)); + +static error_t +argz_append (pargz, pargz_len, buf, buf_len) + char **pargz; + size_t *pargz_len; + const char *buf; + size_t buf_len; +{ + size_t argz_len; + char *argz; + + assert (pargz); + assert (pargz_len); + assert ((*pargz && *pargz_len) || (!*pargz && !*pargz_len)); + + /* If nothing needs to be appended, no more work is required. */ + if (buf_len == 0) + return 0; + + /* Ensure there is enough room to append BUF_LEN. */ + argz_len = *pargz_len + buf_len; + argz = LT_DLREALLOC (char, *pargz, argz_len); + if (!argz) + return ENOMEM; + + /* Copy characters from BUF after terminating '\0' in ARGZ. */ + memcpy (argz + *pargz_len, buf, buf_len); + + /* Assign new values. */ + *pargz = argz; + *pargz_len = argz_len; + + return 0; +} +#endif /* !HAVE_ARGZ_APPEND */ + + +#if ! HAVE_ARGZ_CREATE_SEP +# define argz_create_sep rpl_argz_create_sep + +static error_t argz_create_sep LT_PARAMS((const char *str, int delim, + char **pargz, size_t *pargz_len)); + +static error_t +argz_create_sep (str, delim, pargz, pargz_len) + const char *str; + int delim; + char **pargz; + size_t *pargz_len; +{ + size_t argz_len; + char *argz = 0; + + assert (str); + assert (pargz); + assert (pargz_len); + + /* Make a copy of STR, but replacing each occurence of + DELIM with '\0'. */ + argz_len = 1+ LT_STRLEN (str); + if (argz_len) + { + const char *p; + char *q; + + argz = LT_DLMALLOC (char, argz_len); + if (!argz) + return ENOMEM; + + for (p = str, q = argz; *p != LT_EOS_CHAR; ++p) + { + if (*p == delim) + { + /* Ignore leading delimiters, and fold consecutive + delimiters in STR into a single '\0' in ARGZ. */ + if ((q > argz) && (q[-1] != LT_EOS_CHAR)) + *q++ = LT_EOS_CHAR; + else + --argz_len; + } + else + *q++ = *p; + } + /* Copy terminating LT_EOS_CHAR. */ + *q = *p; + } + + /* If ARGZ_LEN has shrunk to nothing, release ARGZ's memory. */ + if (!argz_len) + LT_DLFREE (argz); + + /* Assign new values. */ + *pargz = argz; + *pargz_len = argz_len; + + return 0; +} +#endif /* !HAVE_ARGZ_CREATE_SEP */ + + +#if ! HAVE_ARGZ_INSERT +# define argz_insert rpl_argz_insert + +static error_t argz_insert LT_PARAMS((char **pargz, size_t *pargz_len, + char *before, const char *entry)); + +static error_t +argz_insert (pargz, pargz_len, before, entry) + char **pargz; + size_t *pargz_len; + char *before; + const char *entry; +{ + assert (pargz); + assert (pargz_len); + assert (entry && *entry); + + /* Either PARGZ/PARGZ_LEN is empty and BEFORE is NULL, + or BEFORE points into an address within the ARGZ vector. */ + assert ((!*pargz && !*pargz_len && !before) + || ((*pargz <= before) && (before < (*pargz + *pargz_len)))); + + /* No BEFORE address indicates ENTRY should be inserted after the + current last element. */ + if (!before) + return argz_append (pargz, pargz_len, entry, 1+ LT_STRLEN (entry)); + + /* This probably indicates a programmer error, but to preserve + semantics, scan back to the start of an entry if BEFORE points + into the middle of it. */ + while ((before >= *pargz) && (before[-1] != LT_EOS_CHAR)) + --before; + + { + size_t entry_len = 1+ LT_STRLEN (entry); + size_t argz_len = *pargz_len + entry_len; + size_t offset = before - *pargz; + char *argz = LT_DLREALLOC (char, *pargz, argz_len); + + if (!argz) + return ENOMEM; + + /* Make BEFORE point to the equivalent offset in ARGZ that it + used to have in *PARGZ incase realloc() moved the block. */ + before = argz + offset; + + /* Move the ARGZ entries starting at BEFORE up into the new + space at the end -- making room to copy ENTRY into the + resulting gap. */ + memmove (before + entry_len, before, *pargz_len - offset); + memcpy (before, entry, entry_len); + + /* Assign new values. */ + *pargz = argz; + *pargz_len = argz_len; + } + + return 0; +} +#endif /* !HAVE_ARGZ_INSERT */ + + +#if ! HAVE_ARGZ_NEXT +# define argz_next rpl_argz_next + +static char *argz_next LT_PARAMS((char *argz, size_t argz_len, + const char *entry)); + +static char * +argz_next (argz, argz_len, entry) + char *argz; + size_t argz_len; + const char *entry; +{ + assert ((argz && argz_len) || (!argz && !argz_len)); + + if (entry) + { + /* Either ARGZ/ARGZ_LEN is empty, or ENTRY points into an address + within the ARGZ vector. */ + assert ((!argz && !argz_len) + || ((argz <= entry) && (entry < (argz + argz_len)))); + + /* Move to the char immediately after the terminating + '\0' of ENTRY. */ + entry = 1+ strchr (entry, LT_EOS_CHAR); + + /* Return either the new ENTRY, or else NULL if ARGZ is + exhausted. */ + return (entry >= argz + argz_len) ? 0 : (char *) entry; + } + else + { + /* This should probably be flagged as a programmer error, + since starting an argz_next loop with the iterator set + to ARGZ is safer. To preserve semantics, handle the NULL + case by returning the start of ARGZ (if any). */ + if (argz_len > 0) + return argz; + else + return 0; + } +} +#endif /* !HAVE_ARGZ_NEXT */ + + + +#if ! HAVE_ARGZ_STRINGIFY +# define argz_stringify rpl_argz_stringify + +static void argz_stringify LT_PARAMS((char *argz, size_t argz_len, + int sep)); + +static void +argz_stringify (argz, argz_len, sep) + char *argz; + size_t argz_len; + int sep; +{ + assert ((argz && argz_len) || (!argz && !argz_len)); + + if (sep) + { + --argz_len; /* don't stringify the terminating EOS */ + while (--argz_len > 0) + { + if (argz[argz_len] == LT_EOS_CHAR) + argz[argz_len] = sep; + } + } +} +#endif /* !HAVE_ARGZ_STRINGIFY */ + + + + +/* --- TYPE DEFINITIONS -- */ + + +/* This type is used for the array of caller data sets in each handler. */ +typedef struct { + lt_dlcaller_id key; + lt_ptr data; +} lt_caller_data; + + + + +/* --- OPAQUE STRUCTURES DECLARED IN LTDL.H --- */ + + +/* Extract the diagnostic strings from the error table macro in the same + order as the enumerated indices in ltdl.h. */ + +static const char *lt_dlerror_strings[] = + { +#define LT_ERROR(name, diagnostic) (diagnostic), + lt_dlerror_table +#undef LT_ERROR + + 0 + }; + +/* This structure is used for the list of registered loaders. */ +struct lt_dlloader { + struct lt_dlloader *next; + const char *loader_name; /* identifying name for each loader */ + const char *sym_prefix; /* prefix for symbols */ + lt_module_open *module_open; + lt_module_close *module_close; + lt_find_sym *find_sym; + lt_dlloader_exit *dlloader_exit; + lt_user_data dlloader_data; +}; + +struct lt_dlhandle_struct { + struct lt_dlhandle_struct *next; + lt_dlloader *loader; /* dlopening interface */ + lt_dlinfo info; + int depcount; /* number of dependencies */ + lt_dlhandle *deplibs; /* dependencies */ + lt_module module; /* system module handle */ + lt_ptr system; /* system specific data */ + lt_caller_data *caller_data; /* per caller associated data */ + int flags; /* various boolean stats */ +}; + +/* Various boolean flags can be stored in the flags field of an + lt_dlhandle_struct... */ +#define LT_DLGET_FLAG(handle, flag) (((handle)->flags & (flag)) == (flag)) +#define LT_DLSET_FLAG(handle, flag) ((handle)->flags |= (flag)) + +#define LT_DLRESIDENT_FLAG (0x01 << 0) +/* ...add more flags here... */ + +#define LT_DLIS_RESIDENT(handle) LT_DLGET_FLAG(handle, LT_DLRESIDENT_FLAG) + + +#define LT_DLSTRERROR(name) lt_dlerror_strings[LT_CONC(LT_ERROR_,name)] + +static const char objdir[] = LTDL_OBJDIR; +static const char archive_ext[] = LTDL_ARCHIVE_EXT; +#ifdef LTDL_SHLIB_EXT +static const char shlib_ext[] = LTDL_SHLIB_EXT; +#endif +#ifdef LTDL_SYSSEARCHPATH +static const char sys_search_path[] = LTDL_SYSSEARCHPATH; +#endif + + + + +/* --- MUTEX LOCKING --- */ + + +/* Macros to make it easier to run the lock functions only if they have + been registered. The reason for the complicated lock macro is to + ensure that the stored error message from the last error is not + accidentally erased if the current function doesn't generate an + error of its own. */ +#define LT_DLMUTEX_LOCK() LT_STMT_START { \ + if (lt_dlmutex_lock_func) (*lt_dlmutex_lock_func)(); \ + } LT_STMT_END +#define LT_DLMUTEX_UNLOCK() LT_STMT_START { \ + if (lt_dlmutex_unlock_func) (*lt_dlmutex_unlock_func)();\ + } LT_STMT_END +#define LT_DLMUTEX_SETERROR(errormsg) LT_STMT_START { \ + if (lt_dlmutex_seterror_func) \ + (*lt_dlmutex_seterror_func) (errormsg); \ + else lt_dllast_error = (errormsg); } LT_STMT_END +#define LT_DLMUTEX_GETERROR(errormsg) LT_STMT_START { \ + if (lt_dlmutex_seterror_func) \ + (errormsg) = (*lt_dlmutex_geterror_func) (); \ + else (errormsg) = lt_dllast_error; } LT_STMT_END + +/* The mutex functions stored here are global, and are necessarily the + same for all threads that wish to share access to libltdl. */ +static lt_dlmutex_lock *lt_dlmutex_lock_func = 0; +static lt_dlmutex_unlock *lt_dlmutex_unlock_func = 0; +static lt_dlmutex_seterror *lt_dlmutex_seterror_func = 0; +static lt_dlmutex_geterror *lt_dlmutex_geterror_func = 0; +static const char *lt_dllast_error = 0; + + +/* Either set or reset the mutex functions. Either all the arguments must + be valid functions, or else all can be NULL to turn off locking entirely. + The registered functions should be manipulating a static global lock + from the lock() and unlock() callbacks, which needs to be reentrant. */ +int +lt_dlmutex_register (lock, unlock, seterror, geterror) + lt_dlmutex_lock *lock; + lt_dlmutex_unlock *unlock; + lt_dlmutex_seterror *seterror; + lt_dlmutex_geterror *geterror; +{ + lt_dlmutex_unlock *old_unlock = unlock; + int errors = 0; + + /* Lock using the old lock() callback, if any. */ + LT_DLMUTEX_LOCK (); + + if ((lock && unlock && seterror && geterror) + || !(lock || unlock || seterror || geterror)) + { + lt_dlmutex_lock_func = lock; + lt_dlmutex_unlock_func = unlock; + lt_dlmutex_geterror_func = geterror; + } + else + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (INVALID_MUTEX_ARGS)); + ++errors; + } + + /* Use the old unlock() callback we saved earlier, if any. Otherwise + record any errors using internal storage. */ + if (old_unlock) + (*old_unlock) (); + + /* Return the number of errors encountered during the execution of + this function. */ + return errors; +} + + + + +/* --- ERROR HANDLING --- */ + + +static const char **user_error_strings = 0; +static int errorcount = LT_ERROR_MAX; + +int +lt_dladderror (diagnostic) + const char *diagnostic; +{ + int errindex = 0; + int result = -1; + const char **temp = (const char **) 0; + + assert (diagnostic); + + LT_DLMUTEX_LOCK (); + + errindex = errorcount - LT_ERROR_MAX; + temp = LT_EREALLOC (const char *, user_error_strings, 1 + errindex); + if (temp) + { + user_error_strings = temp; + user_error_strings[errindex] = diagnostic; + result = errorcount++; + } + + LT_DLMUTEX_UNLOCK (); + + return result; +} + +int +lt_dlseterror (errindex) + int errindex; +{ + int errors = 0; + + LT_DLMUTEX_LOCK (); + + if (errindex >= errorcount || errindex < 0) + { + /* Ack! Error setting the error message! */ + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (INVALID_ERRORCODE)); + ++errors; + } + else if (errindex < LT_ERROR_MAX) + { + /* No error setting the error message! */ + LT_DLMUTEX_SETERROR (lt_dlerror_strings[errindex]); + } + else + { + /* No error setting the error message! */ + LT_DLMUTEX_SETERROR (user_error_strings[errindex - LT_ERROR_MAX]); + } + + LT_DLMUTEX_UNLOCK (); + + return errors; +} + +static lt_ptr +lt_emalloc (size) + size_t size; +{ + lt_ptr mem = lt_dlmalloc (size); + if (size && !mem) + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (NO_MEMORY)); + return mem; +} + +static lt_ptr +lt_erealloc (addr, size) + lt_ptr addr; + size_t size; +{ + lt_ptr mem = realloc (addr, size); + if (size && !mem) + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (NO_MEMORY)); + return mem; +} + +static char * +lt_estrdup (str) + const char *str; +{ + char *copy = strdup (str); + if (LT_STRLEN (str) && !copy) + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (NO_MEMORY)); + return copy; +} + + + + +/* --- DLOPEN() INTERFACE LOADER --- */ + + +/* The Cygwin dlopen implementation prints a spurious error message to + stderr if its call to LoadLibrary() fails for any reason. We can + mitigate this by not using the Cygwin implementation, and falling + back to our own LoadLibrary() wrapper. */ +#if HAVE_LIBDL && !defined(__CYGWIN__) + +/* dynamic linking with dlopen/dlsym */ + +#if HAVE_DLFCN_H +# include +#endif + +#if HAVE_SYS_DL_H +# include +#endif + +#ifdef RTLD_GLOBAL +# define LT_GLOBAL RTLD_GLOBAL +#else +# ifdef DL_GLOBAL +# define LT_GLOBAL DL_GLOBAL +# endif +#endif /* !RTLD_GLOBAL */ +#ifndef LT_GLOBAL +# define LT_GLOBAL 0 +#endif /* !LT_GLOBAL */ + +/* We may have to define LT_LAZY_OR_NOW in the command line if we + find out it does not work in some platform. */ +#ifndef LT_LAZY_OR_NOW +# ifdef RTLD_LAZY +# define LT_LAZY_OR_NOW RTLD_LAZY +# else +# ifdef DL_LAZY +# define LT_LAZY_OR_NOW DL_LAZY +# endif +# endif /* !RTLD_LAZY */ +#endif +#ifndef LT_LAZY_OR_NOW +# ifdef RTLD_NOW +# define LT_LAZY_OR_NOW RTLD_NOW +# else +# ifdef DL_NOW +# define LT_LAZY_OR_NOW DL_NOW +# endif +# endif /* !RTLD_NOW */ +#endif +#ifndef LT_LAZY_OR_NOW +# define LT_LAZY_OR_NOW 0 +#endif /* !LT_LAZY_OR_NOW */ + +#if HAVE_DLERROR +# define DLERROR(arg) dlerror () +#else +# define DLERROR(arg) LT_DLSTRERROR (arg) +#endif + +static lt_module +sys_dl_open (loader_data, filename) + lt_user_data loader_data; + const char *filename; +{ + lt_module module = dlopen (filename, LT_GLOBAL | LT_LAZY_OR_NOW); + + if (!module) + { + LT_DLMUTEX_SETERROR (DLERROR (CANNOT_OPEN)); + } + + return module; +} + +static int +sys_dl_close (loader_data, module) + lt_user_data loader_data; + lt_module module; +{ + int errors = 0; + + if (dlclose (module) != 0) + { + LT_DLMUTEX_SETERROR (DLERROR (CANNOT_CLOSE)); + ++errors; + } + + return errors; +} + +static lt_ptr +sys_dl_sym (loader_data, module, symbol) + lt_user_data loader_data; + lt_module module; + const char *symbol; +{ + lt_ptr address = dlsym (module, symbol); + + if (!address) + { + LT_DLMUTEX_SETERROR (DLERROR (SYMBOL_NOT_FOUND)); + } + + return address; +} + +static struct lt_user_dlloader sys_dl = + { +# ifdef NEED_USCORE + "_", +# else + 0, +# endif + sys_dl_open, sys_dl_close, sys_dl_sym, 0, 0 }; + + +#endif /* HAVE_LIBDL */ + + + +/* --- SHL_LOAD() INTERFACE LOADER --- */ + +#if HAVE_SHL_LOAD + +/* dynamic linking with shl_load (HP-UX) (comments from gmodule) */ + +#ifdef HAVE_DL_H +# include +#endif + +/* some flags are missing on some systems, so we provide + * harmless defaults. + * + * Mandatory: + * BIND_IMMEDIATE - Resolve symbol references when the library is loaded. + * BIND_DEFERRED - Delay code symbol resolution until actual reference. + * + * Optionally: + * BIND_FIRST - Place the library at the head of the symbol search + * order. + * BIND_NONFATAL - The default BIND_IMMEDIATE behavior is to treat all + * unsatisfied symbols as fatal. This flag allows + * binding of unsatisfied code symbols to be deferred + * until use. + * [Perl: For certain libraries, like DCE, deferred + * binding often causes run time problems. Adding + * BIND_NONFATAL to BIND_IMMEDIATE still allows + * unresolved references in situations like this.] + * BIND_NOSTART - Do not call the initializer for the shared library + * when the library is loaded, nor on a future call to + * shl_unload(). + * BIND_VERBOSE - Print verbose messages concerning possible + * unsatisfied symbols. + * + * hp9000s700/hp9000s800: + * BIND_RESTRICTED - Restrict symbols visible by the library to those + * present at library load time. + * DYNAMIC_PATH - Allow the loader to dynamically search for the + * library specified by the path argument. + */ + +#ifndef DYNAMIC_PATH +# define DYNAMIC_PATH 0 +#endif +#ifndef BIND_RESTRICTED +# define BIND_RESTRICTED 0 +#endif + +#define LT_BIND_FLAGS (BIND_IMMEDIATE | BIND_NONFATAL | DYNAMIC_PATH) + +static lt_module +sys_shl_open (loader_data, filename) + lt_user_data loader_data; + const char *filename; +{ + static shl_t self = (shl_t) 0; + lt_module module = shl_load (filename, LT_BIND_FLAGS, 0L); + + /* Since searching for a symbol against a NULL module handle will also + look in everything else that was already loaded and exported with + the -E compiler flag, we always cache a handle saved before any + modules are loaded. */ + if (!self) + { + lt_ptr address; + shl_findsym (&self, "main", TYPE_UNDEFINED, &address); + } + + if (!filename) + { + module = self; + } + else + { + module = shl_load (filename, LT_BIND_FLAGS, 0L); + + if (!module) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (CANNOT_OPEN)); + } + } + + return module; +} + +static int +sys_shl_close (loader_data, module) + lt_user_data loader_data; + lt_module module; +{ + int errors = 0; + + if (module && (shl_unload ((shl_t) (module)) != 0)) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (CANNOT_CLOSE)); + ++errors; + } + + return errors; +} + +static lt_ptr +sys_shl_sym (loader_data, module, symbol) + lt_user_data loader_data; + lt_module module; + const char *symbol; +{ + lt_ptr address = 0; + + /* sys_shl_open should never return a NULL module handle */ + if (module == (lt_module) 0) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (INVALID_HANDLE)); + } + else if (!shl_findsym((shl_t*) &module, symbol, TYPE_UNDEFINED, &address)) + { + if (!address) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (SYMBOL_NOT_FOUND)); + } + } + + return address; +} + +static struct lt_user_dlloader sys_shl = { + 0, sys_shl_open, sys_shl_close, sys_shl_sym, 0, 0 +}; + +#endif /* HAVE_SHL_LOAD */ + + + + +/* --- LOADLIBRARY() INTERFACE LOADER --- */ + +#ifdef __WINDOWS__ + +/* dynamic linking for Win32 */ + +#include + +/* Forward declaration; required to implement handle search below. */ +static lt_dlhandle handles; + +static lt_module +sys_wll_open (loader_data, filename) + lt_user_data loader_data; + const char *filename; +{ + lt_dlhandle cur; + lt_module module = 0; + const char *errormsg = 0; + char *searchname = 0; + char *ext; + char self_name_buf[MAX_PATH]; + + if (!filename) + { + /* Get the name of main module */ + *self_name_buf = 0; + GetModuleFileName (NULL, self_name_buf, sizeof (self_name_buf)); + filename = ext = self_name_buf; + } + else + { + ext = strrchr (filename, '.'); + } + + if (ext) + { + /* FILENAME already has an extension. */ + searchname = lt_estrdup (filename); + } + else + { + /* Append a `.' to stop Windows from adding an + implicit `.dll' extension. */ + searchname = LT_EMALLOC (char, 2+ LT_STRLEN (filename)); + if (searchname) + sprintf (searchname, "%s.", filename); + } + if (!searchname) + return 0; + +#if __CYGWIN__ + { + char wpath[MAX_PATH]; + cygwin_conv_to_full_win32_path(searchname, wpath); + module = LoadLibrary(wpath); + } +#else + module = LoadLibrary (searchname); +#endif + LT_DLFREE (searchname); + + /* libltdl expects this function to fail if it is unable + to physically load the library. Sadly, LoadLibrary + will search the loaded libraries for a match and return + one of them if the path search load fails. + + We check whether LoadLibrary is returning a handle to + an already loaded module, and simulate failure if we + find one. */ + LT_DLMUTEX_LOCK (); + cur = handles; + while (cur) + { + if (!cur->module) + { + cur = 0; + break; + } + + if (cur->module == module) + { + break; + } + + cur = cur->next; + } + LT_DLMUTEX_UNLOCK (); + + if (cur || !module) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (CANNOT_OPEN)); + module = 0; + } + + return module; +} + +static int +sys_wll_close (loader_data, module) + lt_user_data loader_data; + lt_module module; +{ + int errors = 0; + + if (FreeLibrary(module) == 0) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (CANNOT_CLOSE)); + ++errors; + } + + return errors; +} + +static lt_ptr +sys_wll_sym (loader_data, module, symbol) + lt_user_data loader_data; + lt_module module; + const char *symbol; +{ + lt_ptr address = GetProcAddress (module, symbol); + + if (!address) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (SYMBOL_NOT_FOUND)); + } + + return address; +} + +static struct lt_user_dlloader sys_wll = { + 0, sys_wll_open, sys_wll_close, sys_wll_sym, 0, 0 +}; + +#endif /* __WINDOWS__ */ + + + + +/* --- LOAD_ADD_ON() INTERFACE LOADER --- */ + + +#ifdef __BEOS__ + +/* dynamic linking for BeOS */ + +#include + +static lt_module +sys_bedl_open (loader_data, filename) + lt_user_data loader_data; + const char *filename; +{ + image_id image = 0; + + if (filename) + { + image = load_add_on (filename); + } + else + { + image_info info; + int32 cookie = 0; + if (get_next_image_info (0, &cookie, &info) == B_OK) + image = load_add_on (info.name); + } + + if (image <= 0) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (CANNOT_OPEN)); + image = 0; + } + + return (lt_module) image; +} + +static int +sys_bedl_close (loader_data, module) + lt_user_data loader_data; + lt_module module; +{ + int errors = 0; + + if (unload_add_on ((image_id) module) != B_OK) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (CANNOT_CLOSE)); + ++errors; + } + + return errors; +} + +static lt_ptr +sys_bedl_sym (loader_data, module, symbol) + lt_user_data loader_data; + lt_module module; + const char *symbol; +{ + lt_ptr address = 0; + image_id image = (image_id) module; + + if (get_image_symbol (image, symbol, B_SYMBOL_TYPE_ANY, address) != B_OK) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (SYMBOL_NOT_FOUND)); + address = 0; + } + + return address; +} + +static struct lt_user_dlloader sys_bedl = { + 0, sys_bedl_open, sys_bedl_close, sys_bedl_sym, 0, 0 +}; + +#endif /* __BEOS__ */ + + + + +/* --- DLD_LINK() INTERFACE LOADER --- */ + + +#if HAVE_DLD + +/* dynamic linking with dld */ + +#if HAVE_DLD_H +#include +#endif + +static lt_module +sys_dld_open (loader_data, filename) + lt_user_data loader_data; + const char *filename; +{ + lt_module module = strdup (filename); + + if (dld_link (filename) != 0) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (CANNOT_OPEN)); + LT_DLFREE (module); + module = 0; + } + + return module; +} + +static int +sys_dld_close (loader_data, module) + lt_user_data loader_data; + lt_module module; +{ + int errors = 0; + + if (dld_unlink_by_file ((char*)(module), 1) != 0) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (CANNOT_CLOSE)); + ++errors; + } + else + { + LT_DLFREE (module); + } + + return errors; +} + +static lt_ptr +sys_dld_sym (loader_data, module, symbol) + lt_user_data loader_data; + lt_module module; + const char *symbol; +{ + lt_ptr address = dld_get_func (symbol); + + if (!address) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (SYMBOL_NOT_FOUND)); + } + + return address; +} + +static struct lt_user_dlloader sys_dld = { + 0, sys_dld_open, sys_dld_close, sys_dld_sym, 0, 0 +}; + +#endif /* HAVE_DLD */ + + + + +/* --- DLPREOPEN() INTERFACE LOADER --- */ + + +/* emulate dynamic linking using preloaded_symbols */ + +typedef struct lt_dlsymlists_t +{ + struct lt_dlsymlists_t *next; + const lt_dlsymlist *syms; +} lt_dlsymlists_t; + +static const lt_dlsymlist *default_preloaded_symbols = 0; +static lt_dlsymlists_t *preloaded_symbols = 0; + +static int +presym_init (loader_data) + lt_user_data loader_data; +{ + int errors = 0; + + LT_DLMUTEX_LOCK (); + + preloaded_symbols = 0; + if (default_preloaded_symbols) + { + errors = lt_dlpreload (default_preloaded_symbols); + } + + LT_DLMUTEX_UNLOCK (); + + return errors; +} + +static int +presym_free_symlists () +{ + lt_dlsymlists_t *lists; + + LT_DLMUTEX_LOCK (); + + lists = preloaded_symbols; + while (lists) + { + lt_dlsymlists_t *tmp = lists; + + lists = lists->next; + LT_DLFREE (tmp); + } + preloaded_symbols = 0; + + LT_DLMUTEX_UNLOCK (); + + return 0; +} + +static int +presym_exit (loader_data) + lt_user_data loader_data; +{ + presym_free_symlists (); + return 0; +} + +static int +presym_add_symlist (preloaded) + const lt_dlsymlist *preloaded; +{ + lt_dlsymlists_t *tmp; + lt_dlsymlists_t *lists; + int errors = 0; + + LT_DLMUTEX_LOCK (); + + lists = preloaded_symbols; + while (lists) + { + if (lists->syms == preloaded) + { + goto done; + } + lists = lists->next; + } + + tmp = LT_EMALLOC (lt_dlsymlists_t, 1); + if (tmp) + { + memset (tmp, 0, sizeof(lt_dlsymlists_t)); + tmp->syms = preloaded; + tmp->next = preloaded_symbols; + preloaded_symbols = tmp; + } + else + { + ++errors; + } + + done: + LT_DLMUTEX_UNLOCK (); + return errors; +} + +static lt_module +presym_open (loader_data, filename) + lt_user_data loader_data; + const char *filename; +{ + lt_dlsymlists_t *lists; + lt_module module = (lt_module) 0; + + LT_DLMUTEX_LOCK (); + lists = preloaded_symbols; + + if (!lists) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (NO_SYMBOLS)); + goto done; + } + + /* Can't use NULL as the reflective symbol header, as NULL is + used to mark the end of the entire symbol list. Self-dlpreopened + symbols follow this magic number, chosen to be an unlikely + clash with a real module name. */ + if (!filename) + { + filename = "@PROGRAM@"; + } + + while (lists) + { + const lt_dlsymlist *syms = lists->syms; + + while (syms->name) + { + if (!syms->address && strcmp(syms->name, filename) == 0) + { + module = (lt_module) syms; + goto done; + } + ++syms; + } + + lists = lists->next; + } + + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (FILE_NOT_FOUND)); + + done: + LT_DLMUTEX_UNLOCK (); + return module; +} + +static int +presym_close (loader_data, module) + lt_user_data loader_data; + lt_module module; +{ + /* Just to silence gcc -Wall */ + module = 0; + return 0; +} + +static lt_ptr +presym_sym (loader_data, module, symbol) + lt_user_data loader_data; + lt_module module; + const char *symbol; +{ + lt_dlsymlist *syms = (lt_dlsymlist*) module; + + ++syms; + while (syms->address) + { + if (strcmp(syms->name, symbol) == 0) + { + return syms->address; + } + + ++syms; + } + + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (SYMBOL_NOT_FOUND)); + + return 0; +} + +static struct lt_user_dlloader presym = { + 0, presym_open, presym_close, presym_sym, presym_exit, 0 +}; + + + + + +/* --- DYNAMIC MODULE LOADING --- */ + + +/* The type of a function used at each iteration of foreach_dirinpath(). */ +typedef int foreach_callback_func LT_PARAMS((char *filename, lt_ptr data1, + lt_ptr data2)); + +static int foreach_dirinpath LT_PARAMS((const char *search_path, + const char *base_name, + foreach_callback_func *func, + lt_ptr data1, lt_ptr data2)); + +static int find_file_callback LT_PARAMS((char *filename, lt_ptr data, + lt_ptr ignored)); +static int find_handle_callback LT_PARAMS((char *filename, lt_ptr data, + lt_ptr ignored)); +static int foreachfile_callback LT_PARAMS((char *filename, lt_ptr data1, + lt_ptr data2)); + + +static int canonicalize_path LT_PARAMS((const char *path, + char **pcanonical)); +static int argzize_path LT_PARAMS((const char *path, + char **pargz, + size_t *pargz_len)); +static FILE *find_file LT_PARAMS((const char *search_path, + const char *base_name, + char **pdir)); +static lt_dlhandle *find_handle LT_PARAMS((const char *search_path, + const char *base_name, + lt_dlhandle *handle)); +static int find_module LT_PARAMS((lt_dlhandle *handle, + const char *dir, + const char *libdir, + const char *dlname, + const char *old_name, + int installed)); +static int free_vars LT_PARAMS((char *dlname, char *oldname, + char *libdir, char *deplibs)); +static int load_deplibs LT_PARAMS((lt_dlhandle handle, + char *deplibs)); +static int trim LT_PARAMS((char **dest, + const char *str)); +static int try_dlopen LT_PARAMS((lt_dlhandle *handle, + const char *filename)); +static int tryall_dlopen LT_PARAMS((lt_dlhandle *handle, + const char *filename)); +static int unload_deplibs LT_PARAMS((lt_dlhandle handle)); +static int lt_argz_insert LT_PARAMS((char **pargz, + size_t *pargz_len, + char *before, + const char *entry)); +static int lt_argz_insertinorder LT_PARAMS((char **pargz, + size_t *pargz_len, + const char *entry)); +static int lt_argz_insertdir LT_PARAMS((char **pargz, + size_t *pargz_len, + const char *dirnam, + struct dirent *dp)); +static int lt_dlpath_insertdir LT_PARAMS((char **ppath, + char *before, + const char *dir)); +static int list_files_by_dir LT_PARAMS((const char *dirnam, + char **pargz, + size_t *pargz_len)); +static int file_not_found LT_PARAMS((void)); + +static char *user_search_path= 0; +static lt_dlloader *loaders = 0; +static lt_dlhandle handles = 0; +static int initialized = 0; + +/* Initialize libltdl. */ +int +lt_dlinit () +{ + int errors = 0; + + LT_DLMUTEX_LOCK (); + + /* Initialize only at first call. */ + if (++initialized == 1) + { + handles = 0; + user_search_path = 0; /* empty search path */ + +#if HAVE_LIBDL && !defined(__CYGWIN__) + errors += lt_dlloader_add (lt_dlloader_next (0), &sys_dl, "dlopen"); +#endif +#if HAVE_SHL_LOAD + errors += lt_dlloader_add (lt_dlloader_next (0), &sys_shl, "dlopen"); +#endif +#ifdef __WINDOWS__ + errors += lt_dlloader_add (lt_dlloader_next (0), &sys_wll, "dlopen"); +#endif +#ifdef __BEOS__ + errors += lt_dlloader_add (lt_dlloader_next (0), &sys_bedl, "dlopen"); +#endif +#if HAVE_DLD + errors += lt_dlloader_add (lt_dlloader_next (0), &sys_dld, "dld"); +#endif + errors += lt_dlloader_add (lt_dlloader_next (0), &presym, "dlpreload"); + + if (presym_init (presym.dlloader_data)) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (INIT_LOADER)); + ++errors; + } + else if (errors != 0) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (DLOPEN_NOT_SUPPORTED)); + ++errors; + } + } + + LT_DLMUTEX_UNLOCK (); + + return errors; +} + +int +lt_dlpreload (preloaded) + const lt_dlsymlist *preloaded; +{ + int errors = 0; + + if (preloaded) + { + errors = presym_add_symlist (preloaded); + } + else + { + presym_free_symlists(); + + LT_DLMUTEX_LOCK (); + if (default_preloaded_symbols) + { + errors = lt_dlpreload (default_preloaded_symbols); + } + LT_DLMUTEX_UNLOCK (); + } + + return errors; +} + +int +lt_dlpreload_default (preloaded) + const lt_dlsymlist *preloaded; +{ + LT_DLMUTEX_LOCK (); + default_preloaded_symbols = preloaded; + LT_DLMUTEX_UNLOCK (); + return 0; +} + +int +lt_dlexit () +{ + /* shut down libltdl */ + lt_dlloader *loader; + int errors = 0; + + LT_DLMUTEX_LOCK (); + loader = loaders; + + if (!initialized) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (SHUTDOWN)); + ++errors; + goto done; + } + + /* shut down only at last call. */ + if (--initialized == 0) + { + int level; + + while (handles && LT_DLIS_RESIDENT (handles)) + { + handles = handles->next; + } + + /* close all modules */ + for (level = 1; handles; ++level) + { + lt_dlhandle cur = handles; + int saw_nonresident = 0; + + while (cur) + { + lt_dlhandle tmp = cur; + cur = cur->next; + if (!LT_DLIS_RESIDENT (tmp)) + saw_nonresident = 1; + if (!LT_DLIS_RESIDENT (tmp) && tmp->info.ref_count <= level) + { + if (lt_dlclose (tmp)) + { + ++errors; + } + } + } + /* done if only resident modules are left */ + if (!saw_nonresident) + break; + } + + /* close all loaders */ + while (loader) + { + lt_dlloader *next = loader->next; + lt_user_data data = loader->dlloader_data; + if (loader->dlloader_exit && loader->dlloader_exit (data)) + { + ++errors; + } + + LT_DLMEM_REASSIGN (loader, next); + } + loaders = 0; + } + + done: + LT_DLMUTEX_UNLOCK (); + return errors; +} + +static int +tryall_dlopen (handle, filename) + lt_dlhandle *handle; + const char *filename; +{ + lt_dlhandle cur; + lt_dlloader *loader; + const char *saved_error; + int errors = 0; + + LT_DLMUTEX_GETERROR (saved_error); + LT_DLMUTEX_LOCK (); + + cur = handles; + loader = loaders; + + /* check whether the module was already opened */ + while (cur) + { + /* try to dlopen the program itself? */ + if (!cur->info.filename && !filename) + { + break; + } + + if (cur->info.filename && filename + && strcmp (cur->info.filename, filename) == 0) + { + break; + } + + cur = cur->next; + } + + if (cur) + { + ++cur->info.ref_count; + *handle = cur; + goto done; + } + + cur = *handle; + if (filename) + { + cur->info.filename = lt_estrdup (filename); + if (!cur->info.filename) + { + ++errors; + goto done; + } + } + else + { + cur->info.filename = 0; + } + + while (loader) + { + lt_user_data data = loader->dlloader_data; + + cur->module = loader->module_open (data, filename); + + if (cur->module != 0) + { + break; + } + loader = loader->next; + } + + if (!loader) + { + LT_DLFREE (cur->info.filename); + ++errors; + goto done; + } + + cur->loader = loader; + LT_DLMUTEX_SETERROR (saved_error); + + done: + LT_DLMUTEX_UNLOCK (); + + return errors; +} + +static int +tryall_dlopen_module (handle, prefix, dirname, dlname) + lt_dlhandle *handle; + const char *prefix; + const char *dirname; + const char *dlname; +{ + int error = 0; + char *filename = 0; + size_t filename_len = 0; + size_t dirname_len = LT_STRLEN (dirname); + + assert (handle); + assert (dirname); + assert (dlname); +#ifdef LT_DIRSEP_CHAR + /* Only canonicalized names (i.e. with DIRSEP chars already converted) + should make it into this function: */ + assert (strchr (dirname, LT_DIRSEP_CHAR) == 0); +#endif + + if (dirname[dirname_len -1] == '/') + --dirname_len; + filename_len = dirname_len + 1 + LT_STRLEN (dlname); + + /* Allocate memory, and combine DIRNAME and MODULENAME into it. + The PREFIX (if any) is handled below. */ + filename = LT_EMALLOC (char, dirname_len + 1 + filename_len + 1); + if (!filename) + return 1; + + sprintf (filename, "%.*s/%s", (int) dirname_len, dirname, dlname); + + /* Now that we have combined DIRNAME and MODULENAME, if there is + also a PREFIX to contend with, simply recurse with the arguments + shuffled. Otherwise, attempt to open FILENAME as a module. */ + if (prefix) + { + error += tryall_dlopen_module (handle, + (const char *) 0, prefix, filename); + } + else if (tryall_dlopen (handle, filename) != 0) + { + ++error; + } + + LT_DLFREE (filename); + return error; +} + +static int +find_module (handle, dir, libdir, dlname, old_name, installed) + lt_dlhandle *handle; + const char *dir; + const char *libdir; + const char *dlname; + const char *old_name; + int installed; +{ + /* Try to open the old library first; if it was dlpreopened, + we want the preopened version of it, even if a dlopenable + module is available. */ + if (old_name && tryall_dlopen (handle, old_name) == 0) + { + return 0; + } + + /* Try to open the dynamic library. */ + if (dlname) + { + /* try to open the installed module */ + if (installed && libdir) + { + if (tryall_dlopen_module (handle, + (const char *) 0, libdir, dlname) == 0) + return 0; + } + + /* try to open the not-installed module */ + if (!installed) + { + if (tryall_dlopen_module (handle, dir, objdir, dlname) == 0) + return 0; + } + + /* maybe it was moved to another directory */ + { + if (tryall_dlopen_module (handle, + (const char *) 0, dir, dlname) == 0) + return 0; + } + } + + return 1; +} + + +static int +canonicalize_path (path, pcanonical) + const char *path; + char **pcanonical; +{ + char *canonical = 0; + + assert (path && *path); + assert (pcanonical); + + canonical = LT_EMALLOC (char, 1+ LT_STRLEN (path)); + if (!canonical) + return 1; + + { + size_t dest = 0; + size_t src; + for (src = 0; path[src] != LT_EOS_CHAR; ++src) + { + /* Path separators are not copied to the beginning or end of + the destination, or if another separator would follow + immediately. */ + if (path[src] == LT_PATHSEP_CHAR) + { + if ((dest == 0) + || (path[1+ src] == LT_PATHSEP_CHAR) + || (path[1+ src] == LT_EOS_CHAR)) + continue; + } + + /* Anything other than a directory separator is copied verbatim. */ + if ((path[src] != '/') +#ifdef LT_DIRSEP_CHAR + && (path[src] != LT_DIRSEP_CHAR) +#endif + ) + { + canonical[dest++] = path[src]; + } + /* Directory separators are converted and copied only if they are + not at the end of a path -- i.e. before a path separator or + NULL terminator. */ + else if ((path[1+ src] != LT_PATHSEP_CHAR) + && (path[1+ src] != LT_EOS_CHAR) +#ifdef LT_DIRSEP_CHAR + && (path[1+ src] != LT_DIRSEP_CHAR) +#endif + && (path[1+ src] != '/')) + { + canonical[dest++] = '/'; + } + } + + /* Add an end-of-string marker at the end. */ + canonical[dest] = LT_EOS_CHAR; + } + + /* Assign new value. */ + *pcanonical = canonical; + + return 0; +} + +static int +argzize_path (path, pargz, pargz_len) + const char *path; + char **pargz; + size_t *pargz_len; +{ + error_t error; + + assert (path); + assert (pargz); + assert (pargz_len); + + if ((error = argz_create_sep (path, LT_PATHSEP_CHAR, pargz, pargz_len))) + { + switch (error) + { + case ENOMEM: + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (NO_MEMORY)); + break; + default: + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (UNKNOWN)); + break; + } + + return 1; + } + + return 0; +} + +/* Repeatedly call FUNC with each LT_PATHSEP_CHAR delimited element + of SEARCH_PATH and references to DATA1 and DATA2, until FUNC returns + non-zero or all elements are exhausted. If BASE_NAME is non-NULL, + it is appended to each SEARCH_PATH element before FUNC is called. */ +static int +foreach_dirinpath (search_path, base_name, func, data1, data2) + const char *search_path; + const char *base_name; + foreach_callback_func *func; + lt_ptr data1; + lt_ptr data2; +{ + int result = 0; + int filenamesize = 0; + size_t lenbase = LT_STRLEN (base_name); + size_t argz_len = 0; + char *argz = 0; + char *filename = 0; + char *canonical = 0; + + LT_DLMUTEX_LOCK (); + + if (!search_path || !*search_path) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (FILE_NOT_FOUND)); + goto cleanup; + } + + if (canonicalize_path (search_path, &canonical) != 0) + goto cleanup; + + if (argzize_path (canonical, &argz, &argz_len) != 0) + goto cleanup; + + { + char *dir_name = 0; + while ((dir_name = argz_next (argz, argz_len, dir_name))) + { + size_t lendir = LT_STRLEN (dir_name); + + if (lendir +1 +lenbase >= filenamesize) + { + LT_DLFREE (filename); + filenamesize = lendir +1 +lenbase +1; /* "/d" + '/' + "f" + '\0' */ + filename = LT_EMALLOC (char, filenamesize); + if (!filename) + goto cleanup; + } + + strncpy (filename, dir_name, lendir); + if (base_name && *base_name) + { + if (filename[lendir -1] != '/') + filename[lendir++] = '/'; + strcpy (filename +lendir, base_name); + } + + if ((result = (*func) (filename, data1, data2))) + { + break; + } + } + } + + cleanup: + LT_DLFREE (argz); + LT_DLFREE (canonical); + LT_DLFREE (filename); + + LT_DLMUTEX_UNLOCK (); + + return result; +} + +/* If FILEPATH can be opened, store the name of the directory component + in DATA1, and the opened FILE* structure address in DATA2. Otherwise + DATA1 is unchanged, but DATA2 is set to a pointer to NULL. */ +static int +find_file_callback (filename, data1, data2) + char *filename; + lt_ptr data1; + lt_ptr data2; +{ + char **pdir = (char **) data1; + FILE **pfile = (FILE **) data2; + int is_done = 0; + + assert (filename && *filename); + assert (pdir); + assert (pfile); + + if ((*pfile = fopen (filename, LT_READTEXT_MODE))) + { + char *dirend = strrchr (filename, '/'); + + if (dirend > filename) + *dirend = LT_EOS_CHAR; + + LT_DLFREE (*pdir); + *pdir = lt_estrdup (filename); + is_done = (*pdir == 0) ? -1 : 1; + } + + return is_done; +} + +static FILE * +find_file (search_path, base_name, pdir) + const char *search_path; + const char *base_name; + char **pdir; +{ + FILE *file = 0; + + foreach_dirinpath (search_path, base_name, find_file_callback, pdir, &file); + + return file; +} + +static int +find_handle_callback (filename, data, ignored) + char *filename; + lt_ptr data; + lt_ptr ignored; +{ + lt_dlhandle *handle = (lt_dlhandle *) data; + int found = access (filename, R_OK); + + /* Bail out if file cannot be read... */ + if (!found) + return 0; + + /* Try to dlopen the file, but do not continue searching in any + case. */ + if (tryall_dlopen (handle, filename) != 0) + *handle = 0; + + return 1; +} + +/* If HANDLE was found return it, otherwise return 0. If HANDLE was + found but could not be opened, *HANDLE will be set to 0. */ +static lt_dlhandle * +find_handle (search_path, base_name, handle) + const char *search_path; + const char *base_name; + lt_dlhandle *handle; +{ + if (!search_path) + return 0; + + if (!foreach_dirinpath (search_path, base_name, find_handle_callback, + handle, 0)) + return 0; + + return handle; +} + +static int +load_deplibs (handle, deplibs) + lt_dlhandle handle; + char *deplibs; +{ +#if LTDL_DLOPEN_DEPLIBS + char *p, *save_search_path = 0; + int depcount = 0; + int i; + char **names = 0; +#endif + int errors = 0; + + handle->depcount = 0; + +#if LTDL_DLOPEN_DEPLIBS + if (!deplibs) + { + return errors; + } + ++errors; + + LT_DLMUTEX_LOCK (); + if (user_search_path) + { + save_search_path = lt_estrdup (user_search_path); + if (!save_search_path) + goto cleanup; + } + + /* extract search paths and count deplibs */ + p = deplibs; + while (*p) + { + if (!isspace ((int) *p)) + { + char *end = p+1; + while (*end && !isspace((int) *end)) + { + ++end; + } + + if (strncmp(p, "-L", 2) == 0 || strncmp(p, "-R", 2) == 0) + { + char save = *end; + *end = 0; /* set a temporary string terminator */ + if (lt_dladdsearchdir(p+2)) + { + goto cleanup; + } + *end = save; + } + else + { + ++depcount; + } + + p = end; + } + else + { + ++p; + } + } + + /* restore the old search path */ + LT_DLFREE (user_search_path); + user_search_path = save_search_path; + + LT_DLMUTEX_UNLOCK (); + + if (!depcount) + { + errors = 0; + goto cleanup; + } + + names = LT_EMALLOC (char *, depcount * sizeof (char*)); + if (!names) + goto cleanup; + + /* now only extract the actual deplibs */ + depcount = 0; + p = deplibs; + while (*p) + { + if (isspace ((unsigned char) *p)) + { + ++p; + } + else + { + char *end = p+1; + while (*end && !isspace ((unsigned char) *end)) + { + ++end; + } + + if (strncmp(p, "-L", 2) != 0 && strncmp(p, "-R", 2) != 0) + { + char *name; + char save = *end; + *end = 0; /* set a temporary string terminator */ + if (strncmp(p, "-l", 2) == 0) + { + size_t name_len = 3+ /* "lib" */ LT_STRLEN (p + 2); + name = LT_EMALLOC (char, 1+ name_len); + if (name) + sprintf (name, "lib%s", p+2); + } + else + name = lt_estrdup(p); + + if (!name) + goto cleanup_names; + + names[depcount++] = name; + *end = save; + } + p = end; + } + } + + /* load the deplibs (in reverse order) + At this stage, don't worry if the deplibs do not load correctly, + they may already be statically linked into the loading application + for instance. There will be a more enlightening error message + later on if the loaded module cannot resolve all of its symbols. */ + if (depcount) + { + int j = 0; + + handle->deplibs = (lt_dlhandle*) LT_EMALLOC (lt_dlhandle *, depcount); + if (!handle->deplibs) + goto cleanup; + + for (i = 0; i < depcount; ++i) + { + handle->deplibs[j] = lt_dlopenext(names[depcount-1-i]); + if (handle->deplibs[j]) + { + ++j; + } + } + + handle->depcount = j; /* Number of successfully loaded deplibs */ + errors = 0; + } + + cleanup_names: + for (i = 0; i < depcount; ++i) + { + LT_DLFREE (names[i]); + } + + cleanup: + LT_DLFREE (names); +#endif + + return errors; +} + +static int +unload_deplibs (handle) + lt_dlhandle handle; +{ + int i; + int errors = 0; + + if (handle->depcount) + { + for (i = 0; i < handle->depcount; ++i) + { + if (!LT_DLIS_RESIDENT (handle->deplibs[i])) + { + errors += lt_dlclose (handle->deplibs[i]); + } + } + } + + return errors; +} + +static int +trim (dest, str) + char **dest; + const char *str; +{ + /* remove the leading and trailing "'" from str + and store the result in dest */ + const char *end = strrchr (str, '\''); + size_t len = LT_STRLEN (str); + char *tmp; + + LT_DLFREE (*dest); + + if (len > 3 && str[0] == '\'') + { + tmp = LT_EMALLOC (char, end - str); + if (!tmp) + return 1; + + strncpy(tmp, &str[1], (end - str) - 1); + tmp[len-3] = LT_EOS_CHAR; + *dest = tmp; + } + else + { + *dest = 0; + } + + return 0; +} + +static int +free_vars (dlname, oldname, libdir, deplibs) + char *dlname; + char *oldname; + char *libdir; + char *deplibs; +{ + LT_DLFREE (dlname); + LT_DLFREE (oldname); + LT_DLFREE (libdir); + LT_DLFREE (deplibs); + + return 0; +} + +static int +try_dlopen (phandle, filename) + lt_dlhandle *phandle; + const char *filename; +{ + const char * ext = 0; + const char * saved_error = 0; + char * canonical = 0; + char * base_name = 0; + char * dir = 0; + char * name = 0; + int errors = 0; + lt_dlhandle newhandle; + + assert (phandle); + assert (*phandle == 0); + + LT_DLMUTEX_GETERROR (saved_error); + + /* dlopen self? */ + if (!filename) + { + *phandle = (lt_dlhandle) LT_EMALLOC (struct lt_dlhandle_struct, 1); + if (*phandle == 0) + return 1; + + memset (*phandle, 0, sizeof(struct lt_dlhandle_struct)); + newhandle = *phandle; + + /* lt_dlclose()ing yourself is very bad! Disallow it. */ + LT_DLSET_FLAG (*phandle, LT_DLRESIDENT_FLAG); + + if (tryall_dlopen (&newhandle, 0) != 0) + { + LT_DLFREE (*phandle); + return 1; + } + + goto register_handle; + } + + assert (filename && *filename); + + /* Doing this immediately allows internal functions to safely + assume only canonicalized paths are passed. */ + if (canonicalize_path (filename, &canonical) != 0) + { + ++errors; + goto cleanup; + } + + /* If the canonical module name is a path (relative or absolute) + then split it into a directory part and a name part. */ + base_name = strrchr (canonical, '/'); + if (base_name) + { + size_t dirlen = (1+ base_name) - canonical; + + dir = LT_EMALLOC (char, 1+ dirlen); + if (!dir) + { + ++errors; + goto cleanup; + } + + strncpy (dir, canonical, dirlen); + dir[dirlen] = LT_EOS_CHAR; + + ++base_name; + } + else + LT_DLMEM_REASSIGN (base_name, canonical); + + assert (base_name && *base_name); + + /* Check whether we are opening a libtool module (.la extension). */ + ext = strrchr (base_name, '.'); + if (ext && strcmp (ext, archive_ext) == 0) + { + /* this seems to be a libtool module */ + FILE * file = 0; + char * dlname = 0; + char * old_name = 0; + char * libdir = 0; + char * deplibs = 0; + char * line = 0; + size_t line_len; + + /* if we can't find the installed flag, it is probably an + installed libtool archive, produced with an old version + of libtool */ + int installed = 1; + + /* extract the module name from the file name */ + name = LT_EMALLOC (char, ext - base_name + 1); + if (!name) + { + ++errors; + goto cleanup; + } + + /* canonicalize the module name */ + { + size_t i; + for (i = 0; i < ext - base_name; ++i) + { + if (isalnum ((unsigned char)(base_name[i]))) + { + name[i] = base_name[i]; + } + else + { + name[i] = '_'; + } + } + name[ext - base_name] = LT_EOS_CHAR; + } + + /* Now try to open the .la file. If there is no directory name + component, try to find it first in user_search_path and then other + prescribed paths. Otherwise (or in any case if the module was not + yet found) try opening just the module name as passed. */ + if (!dir) + { + const char *search_path; + + LT_DLMUTEX_LOCK (); + search_path = user_search_path; + if (search_path) + file = find_file (user_search_path, base_name, &dir); + LT_DLMUTEX_UNLOCK (); + + if (!file) + { + search_path = getenv (LTDL_SEARCHPATH_VAR); + if (search_path) + file = find_file (search_path, base_name, &dir); + } + +#ifdef LTDL_SHLIBPATH_VAR + if (!file) + { + search_path = getenv (LTDL_SHLIBPATH_VAR); + if (search_path) + file = find_file (search_path, base_name, &dir); + } +#endif +#ifdef LTDL_SYSSEARCHPATH + if (!file && sys_search_path) + { + file = find_file (sys_search_path, base_name, &dir); + } +#endif + } + if (!file) + { + file = fopen (filename, LT_READTEXT_MODE); + } + + /* If we didn't find the file by now, it really isn't there. Set + the status flag, and bail out. */ + if (!file) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (FILE_NOT_FOUND)); + ++errors; + goto cleanup; + } + + line_len = LT_FILENAME_MAX; + line = LT_EMALLOC (char, line_len); + if (!line) + { + fclose (file); + ++errors; + goto cleanup; + } + + /* read the .la file */ + while (!feof (file)) + { + if (!fgets (line, (int) line_len, file)) + { + break; + } + + /* Handle the case where we occasionally need to read a line + that is longer than the initial buffer size. */ + while (line[LT_STRLEN(line) -1] != '\n') + { + line = LT_DLREALLOC (char, line, line_len *2); + if (!fgets (&line[line_len -1], (int) line_len +1, file)) + { + break; + } + line_len *= 2; + } + + if (line[0] == '\n' || line[0] == '#') + { + continue; + } + +#undef STR_DLNAME +#define STR_DLNAME "dlname=" + if (strncmp (line, STR_DLNAME, sizeof (STR_DLNAME) - 1) == 0) + { + errors += trim (&dlname, &line[sizeof (STR_DLNAME) - 1]); + } + +#undef STR_OLD_LIBRARY +#define STR_OLD_LIBRARY "old_library=" + else if (strncmp (line, STR_OLD_LIBRARY, + sizeof (STR_OLD_LIBRARY) - 1) == 0) + { + errors += trim (&old_name, &line[sizeof (STR_OLD_LIBRARY) - 1]); + } +#undef STR_LIBDIR +#define STR_LIBDIR "libdir=" + else if (strncmp (line, STR_LIBDIR, sizeof (STR_LIBDIR) - 1) == 0) + { + errors += trim (&libdir, &line[sizeof(STR_LIBDIR) - 1]); + } + +#undef STR_DL_DEPLIBS +#define STR_DL_DEPLIBS "dependency_libs=" + else if (strncmp (line, STR_DL_DEPLIBS, + sizeof (STR_DL_DEPLIBS) - 1) == 0) + { + errors += trim (&deplibs, &line[sizeof (STR_DL_DEPLIBS) - 1]); + } + else if (strcmp (line, "installed=yes\n") == 0) + { + installed = 1; + } + else if (strcmp (line, "installed=no\n") == 0) + { + installed = 0; + } + +#undef STR_LIBRARY_NAMES +#define STR_LIBRARY_NAMES "library_names=" + else if (! dlname && strncmp (line, STR_LIBRARY_NAMES, + sizeof (STR_LIBRARY_NAMES) - 1) == 0) + { + char *last_libname; + errors += trim (&dlname, &line[sizeof (STR_LIBRARY_NAMES) - 1]); + if (!errors + && dlname + && (last_libname = strrchr (dlname, ' ')) != 0) + { + last_libname = lt_estrdup (last_libname + 1); + if (!last_libname) + { + ++errors; + goto cleanup; + } + LT_DLMEM_REASSIGN (dlname, last_libname); + } + } + + if (errors) + break; + } + + fclose (file); + LT_DLFREE (line); + + /* allocate the handle */ + *phandle = (lt_dlhandle) LT_EMALLOC (struct lt_dlhandle_struct, 1); + if (*phandle == 0) + ++errors; + + if (errors) + { + free_vars (dlname, old_name, libdir, deplibs); + LT_DLFREE (*phandle); + goto cleanup; + } + + assert (*phandle); + + memset (*phandle, 0, sizeof(struct lt_dlhandle_struct)); + if (load_deplibs (*phandle, deplibs) == 0) + { + newhandle = *phandle; + /* find_module may replace newhandle */ + if (find_module (&newhandle, dir, libdir, dlname, old_name, installed)) + { + unload_deplibs (*phandle); + ++errors; + } + } + else + { + ++errors; + } + + free_vars (dlname, old_name, libdir, deplibs); + if (errors) + { + LT_DLFREE (*phandle); + goto cleanup; + } + + if (*phandle != newhandle) + { + unload_deplibs (*phandle); + } + } + else + { + /* not a libtool module */ + *phandle = (lt_dlhandle) LT_EMALLOC (struct lt_dlhandle_struct, 1); + if (*phandle == 0) + { + ++errors; + goto cleanup; + } + + memset (*phandle, 0, sizeof (struct lt_dlhandle_struct)); + newhandle = *phandle; + + /* If the module has no directory name component, try to find it + first in user_search_path and then other prescribed paths. + Otherwise (or in any case if the module was not yet found) try + opening just the module name as passed. */ + if ((dir || (!find_handle (user_search_path, base_name, &newhandle) + && !find_handle (getenv (LTDL_SEARCHPATH_VAR), base_name, + &newhandle) +#ifdef LTDL_SHLIBPATH_VAR + && !find_handle (getenv (LTDL_SHLIBPATH_VAR), base_name, + &newhandle) +#endif +#ifdef LTDL_SYSSEARCHPATH + && !find_handle (sys_search_path, base_name, &newhandle) +#endif + ))) + { + tryall_dlopen (&newhandle, filename); + } + + if (!newhandle) + { + LT_DLFREE (*phandle); + ++errors; + goto cleanup; + } + } + + register_handle: + LT_DLMEM_REASSIGN (*phandle, newhandle); + + if ((*phandle)->info.ref_count == 0) + { + (*phandle)->info.ref_count = 1; + LT_DLMEM_REASSIGN ((*phandle)->info.name, name); + + LT_DLMUTEX_LOCK (); + (*phandle)->next = handles; + handles = *phandle; + LT_DLMUTEX_UNLOCK (); + } + + LT_DLMUTEX_SETERROR (saved_error); + + cleanup: + LT_DLFREE (dir); + LT_DLFREE (name); + LT_DLFREE (canonical); + + return errors; +} + +lt_dlhandle +lt_dlopen (filename) + const char *filename; +{ + lt_dlhandle handle = 0; + + /* Just incase we missed a code path in try_dlopen() that reports + an error, but forgets to reset handle... */ + if (try_dlopen (&handle, filename) != 0) + return 0; + + return handle; +} + +/* If the last error messge store was `FILE_NOT_FOUND', then return + non-zero. */ +static int +file_not_found () +{ + const char *error = 0; + + LT_DLMUTEX_GETERROR (error); + if (error == LT_DLSTRERROR (FILE_NOT_FOUND)) + return 1; + + return 0; +} + +/* If FILENAME has an ARCHIVE_EXT or SHLIB_EXT extension, try to + open the FILENAME as passed. Otherwise try appending ARCHIVE_EXT, + and if a file is still not found try again with SHLIB_EXT appended + instead. */ +lt_dlhandle +lt_dlopenext (filename) + const char *filename; +{ + lt_dlhandle handle = 0; + char * tmp = 0; + char * ext = 0; + size_t len; + int errors = 0; + + if (!filename) + { + return lt_dlopen (filename); + } + + assert (filename); + + len = LT_STRLEN (filename); + ext = strrchr (filename, '.'); + + /* If FILENAME already bears a suitable extension, there is no need + to try appending additional extensions. */ + if (ext && ((strcmp (ext, archive_ext) == 0) +#ifdef LTDL_SHLIB_EXT + || (strcmp (ext, shlib_ext) == 0) +#endif + )) + { + return lt_dlopen (filename); + } + + /* First try appending ARCHIVE_EXT. */ + tmp = LT_EMALLOC (char, len + LT_STRLEN (archive_ext) + 1); + if (!tmp) + return 0; + + strcpy (tmp, filename); + strcat (tmp, archive_ext); + errors = try_dlopen (&handle, tmp); + + /* If we found FILENAME, stop searching -- whether we were able to + load the file as a module or not. If the file exists but loading + failed, it is better to return an error message here than to + report FILE_NOT_FOUND when the alternatives (foo.so etc) are not + in the module search path. */ + if (handle || ((errors > 0) && file_not_found ())) + { + LT_DLFREE (tmp); + return handle; + } + +#ifdef LTDL_SHLIB_EXT + /* Try appending SHLIB_EXT. */ + if (LT_STRLEN (shlib_ext) > LT_STRLEN (archive_ext)) + { + LT_DLFREE (tmp); + tmp = LT_EMALLOC (char, len + LT_STRLEN (shlib_ext) + 1); + if (!tmp) + return 0; + + strcpy (tmp, filename); + } + else + { + tmp[len] = LT_EOS_CHAR; + } + + strcat(tmp, shlib_ext); + errors = try_dlopen (&handle, tmp); + + /* As before, if the file was found but loading failed, return now + with the current error message. */ + if (handle || ((errors > 0) && file_not_found ())) + { + LT_DLFREE (tmp); + return handle; + } +#endif + + /* Still here? Then we really did fail to locate any of the file + names we tried. */ + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (FILE_NOT_FOUND)); + LT_DLFREE (tmp); + return 0; +} + + +static int +lt_argz_insert (pargz, pargz_len, before, entry) + char **pargz; + size_t *pargz_len; + char *before; + const char *entry; +{ + error_t error; + + if ((error = argz_insert (pargz, pargz_len, before, entry))) + { + switch (error) + { + case ENOMEM: + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (NO_MEMORY)); + break; + default: + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (UNKNOWN)); + break; + } + return 1; + } + + return 0; +} + +static int +lt_argz_insertinorder (pargz, pargz_len, entry) + char **pargz; + size_t *pargz_len; + const char *entry; +{ + char *before = 0; + + assert (pargz); + assert (pargz_len); + assert (entry && *entry); + + if (*pargz) + while ((before = argz_next (*pargz, *pargz_len, before))) + { + int cmp = strcmp (entry, before); + + if (cmp < 0) break; + if (cmp == 0) return 0; /* No duplicates! */ + } + + return lt_argz_insert (pargz, pargz_len, before, entry); +} + +static int +lt_argz_insertdir (pargz, pargz_len, dirnam, dp) + char **pargz; + size_t *pargz_len; + const char *dirnam; + struct dirent *dp; +{ + char *buf = 0; + size_t buf_len = 0; + char *end = 0; + size_t end_offset = 0; + size_t dir_len = 0; + int errors = 0; + + assert (pargz); + assert (pargz_len); + assert (dp); + + dir_len = LT_STRLEN (dirnam); + end = dp->d_name + LT_D_NAMLEN(dp); + + /* Ignore version numbers. */ + { + char *p; + for (p = end; p -1 > dp->d_name; --p) + if (strchr (".0123456789", p[-1]) == 0) + break; + + if (*p == '.') + end = p; + } + + /* Ignore filename extension. */ + { + char *p; + for (p = end -1; p > dp->d_name; --p) + if (*p == '.') + { + end = p; + break; + } + } + + /* Prepend the directory name. */ + end_offset = end - dp->d_name; + buf_len = dir_len + 1+ end_offset; + buf = LT_EMALLOC (char, 1+ buf_len); + if (!buf) + return ++errors; + + assert (buf); + + strcpy (buf, dirnam); + strcat (buf, "/"); + strncat (buf, dp->d_name, end_offset); + buf[buf_len] = LT_EOS_CHAR; + + /* Try to insert (in order) into ARGZ/ARGZ_LEN. */ + if (lt_argz_insertinorder (pargz, pargz_len, buf) != 0) + ++errors; + + LT_DLFREE (buf); + + return errors; +} + +static int +list_files_by_dir (dirnam, pargz, pargz_len) + const char *dirnam; + char **pargz; + size_t *pargz_len; +{ + DIR *dirp = 0; + int errors = 0; + + assert (dirnam && *dirnam); + assert (pargz); + assert (pargz_len); + assert (dirnam[LT_STRLEN(dirnam) -1] != '/'); + + dirp = opendir (dirnam); + if (dirp) + { + struct dirent *dp = 0; + + while ((dp = readdir (dirp))) + if (dp->d_name[0] != '.') + if (lt_argz_insertdir (pargz, pargz_len, dirnam, dp)) + { + ++errors; + break; + } + + closedir (dirp); + } + else + ++errors; + + return errors; +} + + +/* If there are any files in DIRNAME, call the function passed in + DATA1 (with the name of each file and DATA2 as arguments). */ +static int +foreachfile_callback (dirname, data1, data2) + char *dirname; + lt_ptr data1; + lt_ptr data2; +{ + int (*func) LT_PARAMS((const char *filename, lt_ptr data)) + = (int (*) LT_PARAMS((const char *filename, lt_ptr data))) data1; + + int is_done = 0; + char *argz = 0; + size_t argz_len = 0; + + if (list_files_by_dir (dirname, &argz, &argz_len) != 0) + goto cleanup; + if (!argz) + goto cleanup; + + { + char *filename = 0; + while ((filename = argz_next (argz, argz_len, filename))) + if ((is_done = (*func) (filename, data2))) + break; + } + + cleanup: + LT_DLFREE (argz); + + return is_done; +} + + +/* Call FUNC for each unique extensionless file in SEARCH_PATH, along + with DATA. The filenames passed to FUNC would be suitable for + passing to lt_dlopenext. The extensions are stripped so that + individual modules do not generate several entries (e.g. libfoo.la, + libfoo.so, libfoo.so.1, libfoo.so.1.0.0). If SEARCH_PATH is NULL, + then the same directories that lt_dlopen would search are examined. */ +int +lt_dlforeachfile (search_path, func, data) + const char *search_path; + int (*func) LT_PARAMS ((const char *filename, lt_ptr data)); + lt_ptr data; +{ + int is_done = 0; + + if (search_path) + { + /* If a specific path was passed, search only the directories + listed in it. */ + is_done = foreach_dirinpath (search_path, 0, + foreachfile_callback, func, data); + } + else + { + /* Otherwise search the default paths. */ + is_done = foreach_dirinpath (user_search_path, 0, + foreachfile_callback, func, data); + if (!is_done) + { + is_done = foreach_dirinpath (getenv("LTDL_LIBRARY_PATH"), 0, + foreachfile_callback, func, data); + } + +#ifdef LTDL_SHLIBPATH_VAR + if (!is_done) + { + is_done = foreach_dirinpath (getenv(LTDL_SHLIBPATH_VAR), 0, + foreachfile_callback, func, data); + } +#endif +#ifdef LTDL_SYSSEARCHPATH + if (!is_done) + { + is_done = foreach_dirinpath (getenv(LTDL_SYSSEARCHPATH), 0, + foreachfile_callback, func, data); + } +#endif + } + + return is_done; +} + +int +lt_dlclose (handle) + lt_dlhandle handle; +{ + lt_dlhandle cur, last; + int errors = 0; + + LT_DLMUTEX_LOCK (); + + /* check whether the handle is valid */ + last = cur = handles; + while (cur && handle != cur) + { + last = cur; + cur = cur->next; + } + + if (!cur) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (INVALID_HANDLE)); + ++errors; + goto done; + } + + handle->info.ref_count--; + + /* Note that even with resident modules, we must track the ref_count + correctly incase the user decides to reset the residency flag + later (even though the API makes no provision for that at the + moment). */ + if (handle->info.ref_count <= 0 && !LT_DLIS_RESIDENT (handle)) + { + lt_user_data data = handle->loader->dlloader_data; + + if (handle != handles) + { + last->next = handle->next; + } + else + { + handles = handle->next; + } + + errors += handle->loader->module_close (data, handle->module); + errors += unload_deplibs(handle); + + /* It is up to the callers to free the data itself. */ + LT_DLFREE (handle->caller_data); + + LT_DLFREE (handle->info.filename); + LT_DLFREE (handle->info.name); + LT_DLFREE (handle); + + goto done; + } + + if (LT_DLIS_RESIDENT (handle)) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (CLOSE_RESIDENT_MODULE)); + ++errors; + } + + done: + LT_DLMUTEX_UNLOCK (); + + return errors; +} + +lt_ptr +lt_dlsym (handle, symbol) + lt_dlhandle handle; + const char *symbol; +{ + size_t lensym; + char lsym[LT_SYMBOL_LENGTH]; + char *sym; + lt_ptr address; + lt_user_data data; + + if (!handle) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (INVALID_HANDLE)); + return 0; + } + + if (!symbol) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (SYMBOL_NOT_FOUND)); + return 0; + } + + lensym = LT_STRLEN (symbol) + LT_STRLEN (handle->loader->sym_prefix) + + LT_STRLEN (handle->info.name); + + if (lensym + LT_SYMBOL_OVERHEAD < LT_SYMBOL_LENGTH) + { + sym = lsym; + } + else + { + sym = LT_EMALLOC (char, lensym + LT_SYMBOL_OVERHEAD + 1); + if (!sym) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (BUFFER_OVERFLOW)); + return 0; + } + } + + data = handle->loader->dlloader_data; + if (handle->info.name) + { + const char *saved_error; + + LT_DLMUTEX_GETERROR (saved_error); + + /* this is a libtool module */ + if (handle->loader->sym_prefix) + { + strcpy(sym, handle->loader->sym_prefix); + strcat(sym, handle->info.name); + } + else + { + strcpy(sym, handle->info.name); + } + + strcat(sym, "_LTX_"); + strcat(sym, symbol); + + /* try "modulename_LTX_symbol" */ + address = handle->loader->find_sym (data, handle->module, sym); + if (address) + { + if (sym != lsym) + { + LT_DLFREE (sym); + } + return address; + } + LT_DLMUTEX_SETERROR (saved_error); + } + + /* otherwise try "symbol" */ + if (handle->loader->sym_prefix) + { + strcpy(sym, handle->loader->sym_prefix); + strcat(sym, symbol); + } + else + { + strcpy(sym, symbol); + } + + address = handle->loader->find_sym (data, handle->module, sym); + if (sym != lsym) + { + LT_DLFREE (sym); + } + + return address; +} + +const char * +lt_dlerror () +{ + const char *error; + + LT_DLMUTEX_GETERROR (error); + LT_DLMUTEX_SETERROR (0); + + return error ? error : LT_DLSTRERROR (UNKNOWN); +} + +static int +lt_dlpath_insertdir (ppath, before, dir) + char **ppath; + char *before; + const char *dir; +{ + int errors = 0; + char *canonical = 0; + char *argz = 0; + size_t argz_len = 0; + + assert (ppath); + assert (dir && *dir); + + if (canonicalize_path (dir, &canonical) != 0) + { + ++errors; + goto cleanup; + } + + assert (canonical && *canonical); + + /* If *PPATH is empty, set it to DIR. */ + if (*ppath == 0) + { + assert (!before); /* BEFORE cannot be set without PPATH. */ + assert (dir); /* Without DIR, don't call this function! */ + + *ppath = lt_estrdup (dir); + if (*ppath == 0) + ++errors; + + return errors; + } + + assert (ppath && *ppath); + + if (argzize_path (*ppath, &argz, &argz_len) != 0) + { + ++errors; + goto cleanup; + } + + /* Convert BEFORE into an equivalent offset into ARGZ. This only works + if *PPATH is already canonicalized, and hence does not change length + with respect to ARGZ. We canonicalize each entry as it is added to + the search path, and don't call this function with (uncanonicalized) + user paths, so this is a fair assumption. */ + if (before) + { + assert (*ppath <= before); + assert (before - *ppath <= strlen (*ppath)); + + before = before - *ppath + argz; + } + + if (lt_argz_insert (&argz, &argz_len, before, dir) != 0) + { + ++errors; + goto cleanup; + } + + argz_stringify (argz, argz_len, LT_PATHSEP_CHAR); + LT_DLMEM_REASSIGN (*ppath, argz); + + cleanup: + LT_DLFREE (canonical); + LT_DLFREE (argz); + + return errors; +} + +int +lt_dladdsearchdir (search_dir) + const char *search_dir; +{ + int errors = 0; + + if (search_dir && *search_dir) + { + LT_DLMUTEX_LOCK (); + if (lt_dlpath_insertdir (&user_search_path, 0, search_dir) != 0) + ++errors; + LT_DLMUTEX_UNLOCK (); + } + + return errors; +} + +int +lt_dlinsertsearchdir (before, search_dir) + const char *before; + const char *search_dir; +{ + int errors = 0; + + if (before) + { + LT_DLMUTEX_LOCK (); + if ((before < user_search_path) + || (before >= user_search_path + LT_STRLEN (user_search_path))) + { + LT_DLMUTEX_UNLOCK (); + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (INVALID_POSITION)); + return 1; + } + LT_DLMUTEX_UNLOCK (); + } + + if (search_dir && *search_dir) + { + LT_DLMUTEX_LOCK (); + if (lt_dlpath_insertdir (&user_search_path, + (char *) before, search_dir) != 0) + { + ++errors; + } + LT_DLMUTEX_UNLOCK (); + } + + return errors; +} + +int +lt_dlsetsearchpath (search_path) + const char *search_path; +{ + int errors = 0; + + LT_DLMUTEX_LOCK (); + LT_DLFREE (user_search_path); + LT_DLMUTEX_UNLOCK (); + + if (!search_path || !LT_STRLEN (search_path)) + { + return errors; + } + + LT_DLMUTEX_LOCK (); + if (canonicalize_path (search_path, &user_search_path) != 0) + ++errors; + LT_DLMUTEX_UNLOCK (); + + return errors; +} + +const char * +lt_dlgetsearchpath () +{ + const char *saved_path; + + LT_DLMUTEX_LOCK (); + saved_path = user_search_path; + LT_DLMUTEX_UNLOCK (); + + return saved_path; +} + +int +lt_dlmakeresident (handle) + lt_dlhandle handle; +{ + int errors = 0; + + if (!handle) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (INVALID_HANDLE)); + ++errors; + } + else + { + LT_DLSET_FLAG (handle, LT_DLRESIDENT_FLAG); + } + + return errors; +} + +int +lt_dlisresident (handle) + lt_dlhandle handle; +{ + if (!handle) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (INVALID_HANDLE)); + return -1; + } + + return LT_DLIS_RESIDENT (handle); +} + + + + +/* --- MODULE INFORMATION --- */ + +const lt_dlinfo * +lt_dlgetinfo (handle) + lt_dlhandle handle; +{ + if (!handle) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (INVALID_HANDLE)); + return 0; + } + + return &(handle->info); +} + +lt_dlhandle +lt_dlhandle_next (place) + lt_dlhandle place; +{ + return place ? place->next : handles; +} + +int +lt_dlforeach (func, data) + int (*func) LT_PARAMS((lt_dlhandle handle, lt_ptr data)); + lt_ptr data; +{ + int errors = 0; + lt_dlhandle cur; + + LT_DLMUTEX_LOCK (); + + cur = handles; + while (cur) + { + lt_dlhandle tmp = cur; + + cur = cur->next; + if ((*func) (tmp, data)) + { + ++errors; + break; + } + } + + LT_DLMUTEX_UNLOCK (); + + return errors; +} + +lt_dlcaller_id +lt_dlcaller_register () +{ + static lt_dlcaller_id last_caller_id = 0; + int result; + + LT_DLMUTEX_LOCK (); + result = ++last_caller_id; + LT_DLMUTEX_UNLOCK (); + + return result; +} + +lt_ptr +lt_dlcaller_set_data (key, handle, data) + lt_dlcaller_id key; + lt_dlhandle handle; + lt_ptr data; +{ + int n_elements = 0; + lt_ptr stale = (lt_ptr) 0; + int i; + + /* This needs to be locked so that the caller data can be updated + simultaneously by different threads. */ + LT_DLMUTEX_LOCK (); + + if (handle->caller_data) + while (handle->caller_data[n_elements].key) + ++n_elements; + + for (i = 0; i < n_elements; ++i) + { + if (handle->caller_data[i].key == key) + { + stale = handle->caller_data[i].data; + break; + } + } + + /* Ensure that there is enough room in this handle's caller_data + array to accept a new element (and an empty end marker). */ + if (i == n_elements) + { + lt_caller_data *temp + = LT_DLREALLOC (lt_caller_data, handle->caller_data, 2+ n_elements); + + if (!temp) + { + stale = 0; + goto done; + } + + handle->caller_data = temp; + + /* We only need this if we needed to allocate a new caller_data. */ + handle->caller_data[i].key = key; + handle->caller_data[1+ i].key = 0; + } + + handle->caller_data[i].data = data; + + done: + LT_DLMUTEX_UNLOCK (); + + return stale; +} + +lt_ptr +lt_dlcaller_get_data (key, handle) + lt_dlcaller_id key; + lt_dlhandle handle; +{ + lt_ptr result = (lt_ptr) 0; + + /* This needs to be locked so that the caller data isn't updated by + another thread part way through this function. */ + LT_DLMUTEX_LOCK (); + + /* Locate the index of the element with a matching KEY. */ + { + int i; + for (i = 0; handle->caller_data[i].key; ++i) + { + if (handle->caller_data[i].key == key) + { + result = handle->caller_data[i].data; + break; + } + } + } + + LT_DLMUTEX_UNLOCK (); + + return result; +} + + + +/* --- USER MODULE LOADER API --- */ + + +int +lt_dlloader_add (place, dlloader, loader_name) + lt_dlloader *place; + const struct lt_user_dlloader *dlloader; + const char *loader_name; +{ + int errors = 0; + lt_dlloader *node = 0, *ptr = 0; + + if ((dlloader == 0) /* diagnose null parameters */ + || (dlloader->module_open == 0) + || (dlloader->module_close == 0) + || (dlloader->find_sym == 0)) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (INVALID_LOADER)); + return 1; + } + + /* Create a new dlloader node with copies of the user callbacks. */ + node = LT_EMALLOC (lt_dlloader, 1); + if (!node) + return 1; + + node->next = 0; + node->loader_name = loader_name; + node->sym_prefix = dlloader->sym_prefix; + node->dlloader_exit = dlloader->dlloader_exit; + node->module_open = dlloader->module_open; + node->module_close = dlloader->module_close; + node->find_sym = dlloader->find_sym; + node->dlloader_data = dlloader->dlloader_data; + + LT_DLMUTEX_LOCK (); + if (!loaders) + { + /* If there are no loaders, NODE becomes the list! */ + loaders = node; + } + else if (!place) + { + /* If PLACE is not set, add NODE to the end of the + LOADERS list. */ + for (ptr = loaders; ptr->next; ptr = ptr->next) + { + /*NOWORK*/; + } + + ptr->next = node; + } + else if (loaders == place) + { + /* If PLACE is the first loader, NODE goes first. */ + node->next = place; + loaders = node; + } + else + { + /* Find the node immediately preceding PLACE. */ + for (ptr = loaders; ptr->next != place; ptr = ptr->next) + { + /*NOWORK*/; + } + + if (ptr->next != place) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (INVALID_LOADER)); + ++errors; + } + else + { + /* Insert NODE between PTR and PLACE. */ + node->next = place; + ptr->next = node; + } + } + + LT_DLMUTEX_UNLOCK (); + + return errors; +} + +int +lt_dlloader_remove (loader_name) + const char *loader_name; +{ + lt_dlloader *place = lt_dlloader_find (loader_name); + lt_dlhandle handle; + int errors = 0; + + if (!place) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (INVALID_LOADER)); + return 1; + } + + LT_DLMUTEX_LOCK (); + + /* Fail if there are any open modules which use this loader. */ + for (handle = handles; handle; handle = handle->next) + { + if (handle->loader == place) + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (REMOVE_LOADER)); + ++errors; + goto done; + } + } + + if (place == loaders) + { + /* PLACE is the first loader in the list. */ + loaders = loaders->next; + } + else + { + /* Find the loader before the one being removed. */ + lt_dlloader *prev; + for (prev = loaders; prev->next; prev = prev->next) + { + if (!strcmp (prev->next->loader_name, loader_name)) + { + break; + } + } + + place = prev->next; + prev->next = prev->next->next; + } + + if (place->dlloader_exit) + { + errors = place->dlloader_exit (place->dlloader_data); + } + + LT_DLFREE (place); + + done: + LT_DLMUTEX_UNLOCK (); + + return errors; +} + +lt_dlloader * +lt_dlloader_next (place) + lt_dlloader *place; +{ + lt_dlloader *next; + + LT_DLMUTEX_LOCK (); + next = place ? place->next : loaders; + LT_DLMUTEX_UNLOCK (); + + return next; +} + +const char * +lt_dlloader_name (place) + lt_dlloader *place; +{ + const char *name = 0; + + if (place) + { + LT_DLMUTEX_LOCK (); + name = place ? place->loader_name : 0; + LT_DLMUTEX_UNLOCK (); + } + else + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (INVALID_LOADER)); + } + + return name; +} + +lt_user_data * +lt_dlloader_data (place) + lt_dlloader *place; +{ + lt_user_data *data = 0; + + if (place) + { + LT_DLMUTEX_LOCK (); + data = place ? &(place->dlloader_data) : 0; + LT_DLMUTEX_UNLOCK (); + } + else + { + LT_DLMUTEX_SETERROR (LT_DLSTRERROR (INVALID_LOADER)); + } + + return data; +} + +lt_dlloader * +lt_dlloader_find (loader_name) + const char *loader_name; +{ + lt_dlloader *place = 0; + + LT_DLMUTEX_LOCK (); + for (place = loaders; place; place = place->next) + { + if (strcmp (place->loader_name, loader_name) == 0) + { + break; + } + } + LT_DLMUTEX_UNLOCK (); + + return place; +} diff --git a/sim/ucsim/libltdl/ltdl.h b/sim/ucsim/libltdl/ltdl.h new file mode 100644 index 0000000..2bbfa30 --- /dev/null +++ b/sim/ucsim/libltdl/ltdl.h @@ -0,0 +1,361 @@ +/* ltdl.h -- generic dlopen functions + Copyright (C) 1998-2000 Free Software Foundation, Inc. + Originally by Thomas Tanner + This file is part of GNU Libtool. + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2 of the License, or (at your option) any later version. + +As a special exception to the GNU Lesser General Public License, +if you distribute this file as part of a program or library that +is built using GNU libtool, you may include it under the same +distribution terms that you use for the rest of that program. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, write to the Free +Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA +02111-1307 USA +*/ + +/* Only include this header file once. */ +#ifndef LTDL_H +#define LTDL_H 1 + +#include /* for size_t declaration */ + + +/* --- MACROS FOR PORTABILITY --- */ + + +/* Saves on those hard to debug '\0' typos.... */ +#define LT_EOS_CHAR '\0' + +/* LTDL_BEGIN_C_DECLS should be used at the beginning of your declarations, + so that C++ compilers don't mangle their names. Use LTDL_END_C_DECLS at + the end of C declarations. */ +#ifdef __cplusplus +# define LT_BEGIN_C_DECLS extern "C" { +# define LT_END_C_DECLS } +#else +# define LT_BEGIN_C_DECLS /* empty */ +# define LT_END_C_DECLS /* empty */ +#endif + +LT_BEGIN_C_DECLS + + +/* LT_PARAMS is a macro used to wrap function prototypes, so that compilers + that don't understand ANSI C prototypes still work, and ANSI C + compilers can issue warnings about type mismatches. */ +#if defined (__STDC__) || defined (_AIX) || (defined (__mips) && defined (_SYSTYPE_SVR4)) || defined(WIN32) || defined(__cplusplus) +# define LT_PARAMS(protos) protos +# define lt_ptr void* +#else +# define LT_PARAMS(protos) () +# define lt_ptr char* +#endif + +/* LT_STMT_START/END are used to create macros which expand to a + a single compound statement in a portable way. */ +#if defined (__GNUC__) && !defined (__STRICT_ANSI__) && !defined (__cplusplus) +# define LT_STMT_START (void)( +# define LT_STMT_END ) +#else +# if (defined (sun) || defined (__sun__)) +# define LT_STMT_START if (1) +# define LT_STMT_END else (void)0 +# else +# define LT_STMT_START do +# define LT_STMT_END while (0) +# endif +#endif + +/* LT_CONC creates a new concatenated symbol for the compiler + in a portable way. */ +#if defined(__STDC__) || defined(__cplusplus) +# define LT_CONC(s,t) s##t +#else +# define LT_CONC(s,t) s/**/t +#endif + +/* LT_STRLEN can be used safely on NULL pointers. */ +#define LT_STRLEN(s) (((s) && (s)[0]) ? strlen (s) : 0) + + + +/* --- WINDOWS SUPPORT --- */ + + +/* Canonicalise Windows and Cygwin recognition macros. */ +#ifdef __CYGWIN32__ +# ifndef __CYGWIN__ +# define __CYGWIN__ __CYGWIN32__ +# endif +#endif +#if defined(_WIN32) || defined(WIN32) +# ifndef __WINDOWS__ +# ifdef _WIN32 +# define __WINDOWS__ _WIN32 +# else +# ifdef WIN32 +# define __WINDOWS__ WIN32 +# endif +# endif +# endif +#endif + +#ifdef __WINDOWS__ +# ifndef __CYGWIN__ +/* LT_DIRSEP_CHAR is accepted *in addition* to '/' as a directory + separator when it is set. */ +# define LT_DIRSEP_CHAR '\\' +# define LT_PATHSEP_CHAR ';' +# endif +#endif +#ifndef LT_PATHSEP_CHAR +# define LT_PATHSEP_CHAR ':' +#endif + +/* DLL building support on win32 hosts; mostly to workaround their + ridiculous implementation of data symbol exporting. */ +#ifndef LT_SCOPE +# ifdef __WINDOWS__ +# ifdef DLL_EXPORT /* defined by libtool (if required) */ +# define LT_SCOPE __declspec(dllexport) +# endif +# ifdef LIBLTDL_DLL_IMPORT /* define if linking with this dll */ +# define LT_SCOPE extern __declspec(dllimport) +# endif +# endif +# ifndef LT_SCOPE /* static linking or !__WINDOWS__ */ +# define LT_SCOPE extern +# endif +#endif + + + + +/* --- DYNAMIC MODULE LOADING API --- */ + + +typedef struct lt_dlhandle_struct *lt_dlhandle; /* A loaded module. */ + +/* Initialisation and finalisation functions for libltdl. */ +extern int lt_dlinit LT_PARAMS((void)); +extern int lt_dlexit LT_PARAMS((void)); + +/* Module search path manipulation. */ +extern int lt_dladdsearchdir LT_PARAMS((const char *search_dir)); +extern int lt_dlinsertsearchdir LT_PARAMS((const char *before, + const char *search_dir)); +extern int lt_dlsetsearchpath LT_PARAMS((const char *search_path)); +extern const char *lt_dlgetsearchpath LT_PARAMS((void)); +extern int lt_dlforeachfile LT_PARAMS(( + const char *search_path, + int (*func) (const char *filename, lt_ptr data), + lt_ptr data)); + +/* Portable libltdl versions of the system dlopen() API. */ +extern lt_dlhandle lt_dlopen LT_PARAMS((const char *filename)); +extern lt_dlhandle lt_dlopenext LT_PARAMS((const char *filename)); +extern lt_ptr lt_dlsym LT_PARAMS((lt_dlhandle handle, + const char *name)); +extern const char *lt_dlerror LT_PARAMS((void)); +extern int lt_dlclose LT_PARAMS((lt_dlhandle handle)); + +/* Module residency management. */ +extern int lt_dlmakeresident LT_PARAMS((lt_dlhandle handle)); +extern int lt_dlisresident LT_PARAMS((lt_dlhandle handle)); + + + + +/* --- MUTEX LOCKING --- */ + + +typedef void lt_dlmutex_lock LT_PARAMS((void)); +typedef void lt_dlmutex_unlock LT_PARAMS((void)); +typedef void lt_dlmutex_seterror LT_PARAMS((const char *errmsg)); +typedef const char *lt_dlmutex_geterror LT_PARAMS((void)); + +extern int lt_dlmutex_register LT_PARAMS((lt_dlmutex_lock *lock, + lt_dlmutex_unlock *unlock, + lt_dlmutex_seterror *seterror, + lt_dlmutex_geterror *geterror)); + + + + +/* --- MEMORY HANDLING --- */ + + +/* By default, the realloc function pointer is set to our internal + realloc implementation which iself uses lt_dlmalloc and lt_dlfree. + libltdl relies on a featureful realloc, but if you are sure yours + has the right semantics then you can assign it directly. Generally, + it is safe to assign just a malloc() and a free() function. */ +LT_SCOPE lt_ptr (*lt_dlmalloc) LT_PARAMS((size_t size)); +LT_SCOPE lt_ptr (*lt_dlrealloc) LT_PARAMS((lt_ptr ptr, size_t size)); +LT_SCOPE void (*lt_dlfree) LT_PARAMS((lt_ptr ptr)); + + + + +/* --- PRELOADED MODULE SUPPORT --- */ + + +/* A preopened symbol. Arrays of this type comprise the exported + symbols for a dlpreopened module. */ +typedef struct { + const char *name; + lt_ptr address; +} lt_dlsymlist; + +extern int lt_dlpreload LT_PARAMS((const lt_dlsymlist *preloaded)); +extern int lt_dlpreload_default + LT_PARAMS((const lt_dlsymlist *preloaded)); + +#define LTDL_SET_PRELOADED_SYMBOLS() LT_STMT_START{ \ + extern const lt_dlsymlist lt_preloaded_symbols[]; \ + lt_dlpreload_default(lt_preloaded_symbols); \ + }LT_STMT_END + + + + +/* --- MODULE INFORMATION --- */ + + +/* Read only information pertaining to a loaded module. */ +typedef struct { + char *filename; /* file name */ + char *name; /* module name */ + int ref_count; /* number of times lt_dlopened minus + number of times lt_dlclosed. */ +} lt_dlinfo; + +extern const lt_dlinfo *lt_dlgetinfo LT_PARAMS((lt_dlhandle handle)); +extern lt_dlhandle lt_dlhandle_next LT_PARAMS((lt_dlhandle place)); +extern int lt_dlforeach LT_PARAMS(( + int (*func) (lt_dlhandle handle, lt_ptr data), + lt_ptr data)); + +/* Associating user data with loaded modules. */ +typedef unsigned lt_dlcaller_id; + +extern lt_dlcaller_id lt_dlcaller_register LT_PARAMS((void)); +extern lt_ptr lt_dlcaller_set_data LT_PARAMS((lt_dlcaller_id key, + lt_dlhandle handle, + lt_ptr data)); +extern lt_ptr lt_dlcaller_get_data LT_PARAMS((lt_dlcaller_id key, + lt_dlhandle handle)); + + + +/* --- USER MODULE LOADER API --- */ + + +typedef struct lt_dlloader lt_dlloader; +typedef lt_ptr lt_user_data; +typedef lt_ptr lt_module; + +/* Function pointer types for creating user defined module loaders. */ +typedef lt_module lt_module_open LT_PARAMS((lt_user_data loader_data, + const char *filename)); +typedef int lt_module_close LT_PARAMS((lt_user_data loader_data, + lt_module handle)); +typedef lt_ptr lt_find_sym LT_PARAMS((lt_user_data loader_data, + lt_module handle, + const char *symbol)); +typedef int lt_dlloader_exit LT_PARAMS((lt_user_data loader_data)); + +struct lt_user_dlloader { + const char *sym_prefix; + lt_module_open *module_open; + lt_module_close *module_close; + lt_find_sym *find_sym; + lt_dlloader_exit *dlloader_exit; + lt_user_data dlloader_data; +}; + +extern lt_dlloader *lt_dlloader_next LT_PARAMS((lt_dlloader *place)); +extern lt_dlloader *lt_dlloader_find LT_PARAMS(( + const char *loader_name)); +extern const char *lt_dlloader_name LT_PARAMS((lt_dlloader *place)); +extern lt_user_data *lt_dlloader_data LT_PARAMS((lt_dlloader *place)); +extern int lt_dlloader_add LT_PARAMS((lt_dlloader *place, + const struct lt_user_dlloader *dlloader, + const char *loader_name)); +extern int lt_dlloader_remove LT_PARAMS(( + const char *loader_name)); + + + +/* --- ERROR MESSAGE HANDLING --- */ + + +/* Defining error strings alongside their symbolic names in a macro in + this way allows us to expand the macro in different contexts with + confidence that the enumeration of symbolic names will map correctly + onto the table of error strings. */ +#define lt_dlerror_table \ + LT_ERROR(UNKNOWN, "unknown error") \ + LT_ERROR(DLOPEN_NOT_SUPPORTED, "dlopen support not available") \ + LT_ERROR(INVALID_LOADER, "invalid loader") \ + LT_ERROR(INIT_LOADER, "loader initialization failed") \ + LT_ERROR(REMOVE_LOADER, "loader removal failed") \ + LT_ERROR(FILE_NOT_FOUND, "file not found") \ + LT_ERROR(DEPLIB_NOT_FOUND, "dependency library not found") \ + LT_ERROR(NO_SYMBOLS, "no symbols defined") \ + LT_ERROR(CANNOT_OPEN, "can't open the module") \ + LT_ERROR(CANNOT_CLOSE, "can't close the module") \ + LT_ERROR(SYMBOL_NOT_FOUND, "symbol not found") \ + LT_ERROR(NO_MEMORY, "not enough memory") \ + LT_ERROR(INVALID_HANDLE, "invalid module handle") \ + LT_ERROR(BUFFER_OVERFLOW, "internal buffer overflow") \ + LT_ERROR(INVALID_ERRORCODE, "invalid errorcode") \ + LT_ERROR(SHUTDOWN, "library already shutdown") \ + LT_ERROR(CLOSE_RESIDENT_MODULE, "can't close resident module") \ + LT_ERROR(INVALID_MUTEX_ARGS, "invalid mutex handler registration") \ + LT_ERROR(INVALID_POSITION, "invalid search path insert position") + +/* Enumerate the symbolic error names. */ +enum { +#define LT_ERROR(name, diagnostic) LT_CONC(LT_ERROR_, name), + lt_dlerror_table +#undef LT_ERROR + + LT_ERROR_MAX +}; + +/* These functions are only useful from inside custom module loaders. */ +extern int lt_dladderror LT_PARAMS((const char *diagnostic)); +extern int lt_dlseterror LT_PARAMS((int errorcode)); + + + + +/* --- SOURCE COMPATIBILITY WITH OLD LIBLTDL --- */ + + +#ifdef LT_NON_POSIX_NAMESPACE +# define lt_ptr_t lt_ptr +# define lt_module_t lt_module +# define lt_module_open_t lt_module_open +# define lt_module_close_t lt_module_close +# define lt_find_sym_t lt_find_sym +# define lt_dlloader_exit_t lt_dlloader_exit +# define lt_dlloader_t lt_dlloader +# define lt_dlloader_data_t lt_user_data +#endif + +LT_END_C_DECLS + +#endif /* !LTDL_H */ diff --git a/sim/ucsim/libltdl/stamp-h.in b/sim/ucsim/libltdl/stamp-h.in new file mode 100644 index 0000000..9788f70 --- /dev/null +++ b/sim/ucsim/libltdl/stamp-h.in @@ -0,0 +1 @@ +timestamp diff --git a/sim/ucsim/ltmain.sh b/sim/ucsim/ltmain.sh new file mode 100644 index 0000000..a926477 --- /dev/null +++ b/sim/ucsim/ltmain.sh @@ -0,0 +1,5029 @@ +# ltmain.sh - Provide generalized library-building support services. +# NOTE: Changing this file will not affect anything until you rerun configure. +# +# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001 +# Free Software Foundation, Inc. +# Originally by Gordon Matzigkeit , 1996 +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + +# Check that we have a working $echo. +if test "X$1" = X--no-reexec; then + # Discard the --no-reexec flag, and continue. + shift +elif test "X$1" = X--fallback-echo; then + # Avoid inline document here, it may be left over + : +elif test "X`($echo '\t') 2>/dev/null`" = 'X\t'; then + # Yippee, $echo works! + : +else + # Restart under the correct shell, and then maybe $echo will work. + exec $SHELL "$0" --no-reexec ${1+"$@"} +fi + +if test "X$1" = X--fallback-echo; then + # used as fallback echo + shift + cat <&2 + echo "Fatal configuration error. See the $PACKAGE docs for more information." 1>&2 + exit 1 +fi + +# Global variables. +mode=$default_mode +nonopt= +prev= +prevopt= +run= +show="$echo" +show_help= +execute_dlfiles= +lo2o="s/\\.lo\$/.${objext}/" +o2lo="s/\\.${objext}\$/.lo/" + +# Parse our command line options once, thoroughly. +while test $# -gt 0 +do + arg="$1" + shift + + case $arg in + -*=*) optarg=`$echo "X$arg" | $Xsed -e 's/[-_a-zA-Z0-9]*=//'` ;; + *) optarg= ;; + esac + + # If the previous option needs an argument, assign it. + if test -n "$prev"; then + case $prev in + execute_dlfiles) + execute_dlfiles="$execute_dlfiles $arg" + ;; + *) + eval "$prev=\$arg" + ;; + esac + + prev= + prevopt= + continue + fi + + # Have we seen a non-optional argument yet? + case $arg in + --help) + show_help=yes + ;; + + --version) + echo "$PROGRAM (GNU $PACKAGE) $VERSION$TIMESTAMP" + exit 0 + ;; + + --config) + sed -e '1,/^# ### BEGIN LIBTOOL CONFIG/d' -e '/^# ### END LIBTOOL CONFIG/,$d' $0 + exit 0 + ;; + + --debug) + echo "$progname: enabling shell trace mode" + set -x + ;; + + --dry-run | -n) + run=: + ;; + + --features) + echo "host: $host" + if test "$build_libtool_libs" = yes; then + echo "enable shared libraries" + else + echo "disable shared libraries" + fi + if test "$build_old_libs" = yes; then + echo "enable static libraries" + else + echo "disable static libraries" + fi + exit 0 + ;; + + --finish) mode="finish" ;; + + --mode) prevopt="--mode" prev=mode ;; + --mode=*) mode="$optarg" ;; + + --preserve-dup-deps) duplicate_deps="yes" ;; + + --quiet | --silent) + show=: + ;; + + -dlopen) + prevopt="-dlopen" + prev=execute_dlfiles + ;; + + -*) + $echo "$modename: unrecognized option \`$arg'" 1>&2 + $echo "$help" 1>&2 + exit 1 + ;; + + *) + nonopt="$arg" + break + ;; + esac +done + +if test -n "$prevopt"; then + $echo "$modename: option \`$prevopt' requires an argument" 1>&2 + $echo "$help" 1>&2 + exit 1 +fi + +# If this variable is set in any of the actions, the command in it +# will be execed at the end. This prevents here-documents from being +# left over by shells. +exec_cmd= + +if test -z "$show_help"; then + + # Infer the operation mode. + if test -z "$mode"; then + case $nonopt in + *cc | *++ | gcc* | *-gcc*) + mode=link + for arg + do + case $arg in + -c) + mode=compile + break + ;; + esac + done + ;; + *db | *dbx | *strace | *truss) + mode=execute + ;; + *install*|cp|mv) + mode=install + ;; + *rm) + mode=uninstall + ;; + *) + # If we have no mode, but dlfiles were specified, then do execute mode. + test -n "$execute_dlfiles" && mode=execute + + # Just use the default operation mode. + if test -z "$mode"; then + if test -n "$nonopt"; then + $echo "$modename: warning: cannot infer operation mode from \`$nonopt'" 1>&2 + else + $echo "$modename: warning: cannot infer operation mode without MODE-ARGS" 1>&2 + fi + fi + ;; + esac + fi + + # Only execute mode is allowed to have -dlopen flags. + if test -n "$execute_dlfiles" && test "$mode" != execute; then + $echo "$modename: unrecognized option \`-dlopen'" 1>&2 + $echo "$help" 1>&2 + exit 1 + fi + + # Change the help message to a mode-specific one. + generic_help="$help" + help="Try \`$modename --help --mode=$mode' for more information." + + # These modes are in order of execution frequency so that they run quickly. + case $mode in + # libtool compile mode + compile) + modename="$modename: compile" + # Get the compilation command and the source file. + base_compile= + prev= + lastarg= + srcfile="$nonopt" + suppress_output= + + user_target=no + for arg + do + case $prev in + "") ;; + xcompiler) + # Aesthetically quote the previous argument. + prev= + lastarg=`$echo "X$arg" | $Xsed -e "$sed_quote_subst"` + + case $arg in + # Double-quote args containing other shell metacharacters. + # Many Bourne shells cannot handle close brackets correctly + # in scan sets, so we specify it separately. + *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*|"") + arg="\"$arg\"" + ;; + esac + + # Add the previous argument to base_compile. + if test -z "$base_compile"; then + base_compile="$lastarg" + else + base_compile="$base_compile $lastarg" + fi + continue + ;; + esac + + # Accept any command-line options. + case $arg in + -o) + if test "$user_target" != "no"; then + $echo "$modename: you cannot specify \`-o' more than once" 1>&2 + exit 1 + fi + user_target=next + ;; + + -static) + build_old_libs=yes + continue + ;; + + -prefer-pic) + pic_mode=yes + continue + ;; + + -prefer-non-pic) + pic_mode=no + continue + ;; + + -Xcompiler) + prev=xcompiler + continue + ;; + + -Wc,*) + args=`$echo "X$arg" | $Xsed -e "s/^-Wc,//"` + lastarg= + save_ifs="$IFS"; IFS=',' + for arg in $args; do + IFS="$save_ifs" + + # Double-quote args containing other shell metacharacters. + # Many Bourne shells cannot handle close brackets correctly + # in scan sets, so we specify it separately. + case $arg in + *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*|"") + arg="\"$arg\"" + ;; + esac + lastarg="$lastarg $arg" + done + IFS="$save_ifs" + lastarg=`$echo "X$lastarg" | $Xsed -e "s/^ //"` + + # Add the arguments to base_compile. + if test -z "$base_compile"; then + base_compile="$lastarg" + else + base_compile="$base_compile $lastarg" + fi + continue + ;; + esac + + case $user_target in + next) + # The next one is the -o target name + user_target=yes + continue + ;; + yes) + # We got the output file + user_target=set + libobj="$arg" + continue + ;; + esac + + # Accept the current argument as the source file. + lastarg="$srcfile" + srcfile="$arg" + + # Aesthetically quote the previous argument. + + # Backslashify any backslashes, double quotes, and dollar signs. + # These are the only characters that are still specially + # interpreted inside of double-quoted scrings. + lastarg=`$echo "X$lastarg" | $Xsed -e "$sed_quote_subst"` + + # Double-quote args containing other shell metacharacters. + # Many Bourne shells cannot handle close brackets correctly + # in scan sets, so we specify it separately. + case $lastarg in + *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*|"") + lastarg="\"$lastarg\"" + ;; + esac + + # Add the previous argument to base_compile. + if test -z "$base_compile"; then + base_compile="$lastarg" + else + base_compile="$base_compile $lastarg" + fi + done + + case $user_target in + set) + ;; + no) + # Get the name of the library object. + libobj=`$echo "X$srcfile" | $Xsed -e 's%^.*/%%'` + ;; + *) + $echo "$modename: you must specify a target with \`-o'" 1>&2 + exit 1 + ;; + esac + + # Recognize several different file suffixes. + # If the user specifies -o file.o, it is replaced with file.lo + xform='[cCFSfmso]' + case $libobj in + *.ada) xform=ada ;; + *.adb) xform=adb ;; + *.ads) xform=ads ;; + *.asm) xform=asm ;; + *.c++) xform=c++ ;; + *.cc) xform=cc ;; + *.cpp) xform=cpp ;; + *.cxx) xform=cxx ;; + *.f90) xform=f90 ;; + *.for) xform=for ;; + esac + + libobj=`$echo "X$libobj" | $Xsed -e "s/\.$xform$/.lo/"` + + case $libobj in + *.lo) obj=`$echo "X$libobj" | $Xsed -e "$lo2o"` ;; + *) + $echo "$modename: cannot determine name of library object from \`$libobj'" 1>&2 + exit 1 + ;; + esac + + if test -z "$base_compile"; then + $echo "$modename: you must specify a compilation command" 1>&2 + $echo "$help" 1>&2 + exit 1 + fi + + # Delete any leftover library objects. + if test "$build_old_libs" = yes; then + removelist="$obj $libobj" + else + removelist="$libobj" + fi + + $run $rm $removelist + trap "$run $rm $removelist; exit 1" 1 2 15 + + # On Cygwin there's no "real" PIC flag so we must build both object types + case $host_os in + cygwin* | mingw* | pw32* | os2*) + pic_mode=default + ;; + esac + if test $pic_mode = no && test "$deplibs_check_method" != pass_all; then + # non-PIC code in shared libraries is not supported + pic_mode=default + fi + + # Calculate the filename of the output object if compiler does + # not support -o with -c + if test "$compiler_c_o" = no; then + output_obj=`$echo "X$srcfile" | $Xsed -e 's%^.*/%%' -e 's%\.[^.]*$%%'`.${objext} + lockfile="$output_obj.lock" + removelist="$removelist $output_obj $lockfile" + trap "$run $rm $removelist; exit 1" 1 2 15 + else + need_locks=no + lockfile= + fi + + # Lock this critical section if it is needed + # We use this script file to make the link, it avoids creating a new file + if test "$need_locks" = yes; then + until $run ln "$0" "$lockfile" 2>/dev/null; do + $show "Waiting for $lockfile to be removed" + sleep 2 + done + elif test "$need_locks" = warn; then + if test -f "$lockfile"; then + echo "\ +*** ERROR, $lockfile exists and contains: +`cat $lockfile 2>/dev/null` + +This indicates that another process is trying to use the same +temporary object file, and libtool could not work around it because +your compiler does not support \`-c' and \`-o' together. If you +repeat this compilation, it may succeed, by chance, but you had better +avoid parallel builds (make -j) in this platform, or get a better +compiler." + + $run $rm $removelist + exit 1 + fi + echo $srcfile > "$lockfile" + fi + + if test -n "$fix_srcfile_path"; then + eval srcfile=\"$fix_srcfile_path\" + fi + + # Only build a PIC object if we are building libtool libraries. + if test "$build_libtool_libs" = yes; then + # Without this assignment, base_compile gets emptied. + fbsd_hideous_sh_bug=$base_compile + + if test "$pic_mode" != no; then + # All platforms use -DPIC, to notify preprocessed assembler code. + command="$base_compile $srcfile $pic_flag -DPIC" + else + # Don't build PIC code + command="$base_compile $srcfile" + fi + if test "$build_old_libs" = yes; then + lo_libobj="$libobj" + dir=`$echo "X$libobj" | $Xsed -e 's%/[^/]*$%%'` + if test "X$dir" = "X$libobj"; then + dir="$objdir" + else + dir="$dir/$objdir" + fi + libobj="$dir/"`$echo "X$libobj" | $Xsed -e 's%^.*/%%'` + + if test -d "$dir"; then + $show "$rm $libobj" + $run $rm $libobj + else + $show "$mkdir $dir" + $run $mkdir $dir + status=$? + if test $status -ne 0 && test ! -d $dir; then + exit $status + fi + fi + fi + if test "$compiler_o_lo" = yes; then + output_obj="$libobj" + command="$command -o $output_obj" + elif test "$compiler_c_o" = yes; then + output_obj="$obj" + command="$command -o $output_obj" + fi + + $run $rm "$output_obj" + $show "$command" + if $run eval "$command"; then : + else + test -n "$output_obj" && $run $rm $removelist + exit 1 + fi + + if test "$need_locks" = warn && + test x"`cat $lockfile 2>/dev/null`" != x"$srcfile"; then + echo "\ +*** ERROR, $lockfile contains: +`cat $lockfile 2>/dev/null` + +but it should contain: +$srcfile + +This indicates that another process is trying to use the same +temporary object file, and libtool could not work around it because +your compiler does not support \`-c' and \`-o' together. If you +repeat this compilation, it may succeed, by chance, but you had better +avoid parallel builds (make -j) in this platform, or get a better +compiler." + + $run $rm $removelist + exit 1 + fi + + # Just move the object if needed, then go on to compile the next one + if test x"$output_obj" != x"$libobj"; then + $show "$mv $output_obj $libobj" + if $run $mv $output_obj $libobj; then : + else + error=$? + $run $rm $removelist + exit $error + fi + fi + + # If we have no pic_flag, then copy the object into place and finish. + if (test -z "$pic_flag" || test "$pic_mode" != default) && + test "$build_old_libs" = yes; then + # Rename the .lo from within objdir to obj + if test -f $obj; then + $show $rm $obj + $run $rm $obj + fi + + $show "$mv $libobj $obj" + if $run $mv $libobj $obj; then : + else + error=$? + $run $rm $removelist + exit $error + fi + + xdir=`$echo "X$obj" | $Xsed -e 's%/[^/]*$%%'` + if test "X$xdir" = "X$obj"; then + xdir="." + else + xdir="$xdir" + fi + baseobj=`$echo "X$obj" | $Xsed -e "s%.*/%%"` + libobj=`$echo "X$baseobj" | $Xsed -e "$o2lo"` + # Now arrange that obj and lo_libobj become the same file + $show "(cd $xdir && $LN_S $baseobj $libobj)" + if $run eval '(cd $xdir && $LN_S $baseobj $libobj)'; then + # Unlock the critical section if it was locked + if test "$need_locks" != no; then + $run $rm "$lockfile" + fi + exit 0 + else + error=$? + $run $rm $removelist + exit $error + fi + fi + + # Allow error messages only from the first compilation. + suppress_output=' >/dev/null 2>&1' + fi + + # Only build a position-dependent object if we build old libraries. + if test "$build_old_libs" = yes; then + if test "$pic_mode" != yes; then + # Don't build PIC code + command="$base_compile $srcfile" + else + # All platforms use -DPIC, to notify preprocessed assembler code. + command="$base_compile $srcfile $pic_flag -DPIC" + fi + if test "$compiler_c_o" = yes; then + command="$command -o $obj" + output_obj="$obj" + fi + + # Suppress compiler output if we already did a PIC compilation. + command="$command$suppress_output" + $run $rm "$output_obj" + $show "$command" + if $run eval "$command"; then : + else + $run $rm $removelist + exit 1 + fi + + if test "$need_locks" = warn && + test x"`cat $lockfile 2>/dev/null`" != x"$srcfile"; then + echo "\ +*** ERROR, $lockfile contains: +`cat $lockfile 2>/dev/null` + +but it should contain: +$srcfile + +This indicates that another process is trying to use the same +temporary object file, and libtool could not work around it because +your compiler does not support \`-c' and \`-o' together. If you +repeat this compilation, it may succeed, by chance, but you had better +avoid parallel builds (make -j) in this platform, or get a better +compiler." + + $run $rm $removelist + exit 1 + fi + + # Just move the object if needed + if test x"$output_obj" != x"$obj"; then + $show "$mv $output_obj $obj" + if $run $mv $output_obj $obj; then : + else + error=$? + $run $rm $removelist + exit $error + fi + fi + + # Create an invalid libtool object if no PIC, so that we do not + # accidentally link it into a program. + if test "$build_libtool_libs" != yes; then + $show "echo timestamp > $libobj" + $run eval "echo timestamp > \$libobj" || exit $? + else + # Move the .lo from within objdir + $show "$mv $libobj $lo_libobj" + if $run $mv $libobj $lo_libobj; then : + else + error=$? + $run $rm $removelist + exit $error + fi + fi + fi + + # Unlock the critical section if it was locked + if test "$need_locks" != no; then + $run $rm "$lockfile" + fi + + exit 0 + ;; + + # libtool link mode + link | relink) + modename="$modename: link" + case $host in + *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2*) + # It is impossible to link a dll without this setting, and + # we shouldn't force the makefile maintainer to figure out + # which system we are compiling for in order to pass an extra + # flag for every libtool invokation. + # allow_undefined=no + + # FIXME: Unfortunately, there are problems with the above when trying + # to make a dll which has undefined symbols, in which case not + # even a static library is built. For now, we need to specify + # -no-undefined on the libtool link line when we can be certain + # that all symbols are satisfied, otherwise we get a static library. + allow_undefined=yes + ;; + *) + allow_undefined=yes + ;; + esac + libtool_args="$nonopt" + compile_command="$nonopt" + finalize_command="$nonopt" + + compile_rpath= + finalize_rpath= + compile_shlibpath= + finalize_shlibpath= + convenience= + old_convenience= + deplibs= + old_deplibs= + compiler_flags= + linker_flags= + dllsearchpath= + lib_search_path=`pwd` + + avoid_version=no + dlfiles= + dlprefiles= + dlself=no + export_dynamic=no + export_symbols= + export_symbols_regex= + generated= + libobjs= + ltlibs= + module=no + no_install=no + objs= + prefer_static_libs=no + preload=no + prev= + prevarg= + release= + rpath= + xrpath= + perm_rpath= + temp_rpath= + thread_safe=no + vinfo= + + # We need to know -static, to get the right output filenames. + for arg + do + case $arg in + -all-static | -static) + if test "X$arg" = "X-all-static"; then + if test "$build_libtool_libs" = yes && test -z "$link_static_flag"; then + $echo "$modename: warning: complete static linking is impossible in this configuration" 1>&2 + fi + if test -n "$link_static_flag"; then + dlopen_self=$dlopen_self_static + fi + else + if test -z "$pic_flag" && test -n "$link_static_flag"; then + dlopen_self=$dlopen_self_static + fi + fi + build_libtool_libs=no + build_old_libs=yes + prefer_static_libs=yes + break + ;; + esac + done + + # See if our shared archives depend on static archives. + test -n "$old_archive_from_new_cmds" && build_old_libs=yes + + # Go through the arguments, transforming them on the way. + while test $# -gt 0; do + arg="$1" + shift + case $arg in + *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*|"") + qarg=\"`$echo "X$arg" | $Xsed -e "$sed_quote_subst"`\" ### testsuite: skip nested quoting test + ;; + *) qarg=$arg ;; + esac + libtool_args="$libtool_args $qarg" + + # If the previous option needs an argument, assign it. + if test -n "$prev"; then + case $prev in + output) + compile_command="$compile_command @OUTPUT@" + finalize_command="$finalize_command @OUTPUT@" + ;; + esac + + case $prev in + dlfiles|dlprefiles) + if test "$preload" = no; then + # Add the symbol object into the linking commands. + compile_command="$compile_command @SYMFILE@" + finalize_command="$finalize_command @SYMFILE@" + preload=yes + fi + case $arg in + *.la | *.lo) ;; # We handle these cases below. + force) + if test "$dlself" = no; then + dlself=needless + export_dynamic=yes + fi + prev= + continue + ;; + self) + if test "$prev" = dlprefiles; then + dlself=yes + elif test "$prev" = dlfiles && test "$dlopen_self" != yes; then + dlself=yes + else + dlself=needless + export_dynamic=yes + fi + prev= + continue + ;; + *) + if test "$prev" = dlfiles; then + dlfiles="$dlfiles $arg" + else + dlprefiles="$dlprefiles $arg" + fi + prev= + continue + ;; + esac + ;; + expsyms) + export_symbols="$arg" + if test ! -f "$arg"; then + $echo "$modename: symbol file \`$arg' does not exist" + exit 1 + fi + prev= + continue + ;; + expsyms_regex) + export_symbols_regex="$arg" + prev= + continue + ;; + release) + release="-$arg" + prev= + continue + ;; + rpath | xrpath) + # We need an absolute path. + case $arg in + [\\/]* | [A-Za-z]:[\\/]*) ;; + *) + $echo "$modename: only absolute run-paths are allowed" 1>&2 + exit 1 + ;; + esac + if test "$prev" = rpath; then + case "$rpath " in + *" $arg "*) ;; + *) rpath="$rpath $arg" ;; + esac + else + case "$xrpath " in + *" $arg "*) ;; + *) xrpath="$xrpath $arg" ;; + esac + fi + prev= + continue + ;; + xcompiler) + compiler_flags="$compiler_flags $qarg" + prev= + compile_command="$compile_command $qarg" + finalize_command="$finalize_command $qarg" + continue + ;; + xlinker) + linker_flags="$linker_flags $qarg" + compiler_flags="$compiler_flags $wl$qarg" + prev= + compile_command="$compile_command $wl$qarg" + finalize_command="$finalize_command $wl$qarg" + continue + ;; + *) + eval "$prev=\"\$arg\"" + prev= + continue + ;; + esac + fi # test -n $prev + + prevarg="$arg" + + case $arg in + -all-static) + if test -n "$link_static_flag"; then + compile_command="$compile_command $link_static_flag" + finalize_command="$finalize_command $link_static_flag" + fi + continue + ;; + + -allow-undefined) + # FIXME: remove this flag sometime in the future. + $echo "$modename: \`-allow-undefined' is deprecated because it is the default" 1>&2 + continue + ;; + + -avoid-version) + avoid_version=yes + continue + ;; + + -dlopen) + prev=dlfiles + continue + ;; + + -dlpreopen) + prev=dlprefiles + continue + ;; + + -export-dynamic) + export_dynamic=yes + continue + ;; + + -export-symbols | -export-symbols-regex) + if test -n "$export_symbols" || test -n "$export_symbols_regex"; then + $echo "$modename: more than one -exported-symbols argument is not allowed" + exit 1 + fi + if test "X$arg" = "X-export-symbols"; then + prev=expsyms + else + prev=expsyms_regex + fi + continue + ;; + + # The native IRIX linker understands -LANG:*, -LIST:* and -LNO:* + # so, if we see these flags be careful not to treat them like -L + -L[A-Z][A-Z]*:*) + case $with_gcc/$host in + no/*-*-irix* | no/*-*-nonstopux*) + compile_command="$compile_command $arg" + finalize_command="$finalize_command $arg" + ;; + esac + continue + ;; + + -L*) + dir=`$echo "X$arg" | $Xsed -e 's/^-L//'` + # We need an absolute path. + case $dir in + [\\/]* | [A-Za-z]:[\\/]*) ;; + *) + absdir=`cd "$dir" && pwd` + if test -z "$absdir"; then + $echo "$modename: cannot determine absolute directory name of \`$dir'" 1>&2 + exit 1 + fi + dir="$absdir" + ;; + esac + case "$deplibs " in + *" -L$dir "*) ;; + *) + deplibs="$deplibs -L$dir" + lib_search_path="$lib_search_path $dir" + ;; + esac + case $host in + *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2*) + case :$dllsearchpath: in + *":$dir:"*) ;; + *) dllsearchpath="$dllsearchpath:$dir";; + esac + ;; + esac + continue + ;; + + -l*) + if test "X$arg" = "X-lc" || test "X$arg" = "X-lm"; then + case $host in + *-*-cygwin* | *-*-pw32* | *-*-beos*) + # These systems don't actually have a C or math library (as such) + continue + ;; + *-*-mingw* | *-*-os2*) + # These systems don't actually have a C library (as such) + test "X$arg" = "X-lc" && continue + ;; + *-*-openbsd* | *-*-freebsd*) + # Do not include libc due to us having libc/libc_r. + test "X$arg" = "X-lc" && continue + ;; + esac + elif test "X$arg" = "X-lc_r"; then + case $host in + *-*-openbsd* | *-*-freebsd*) + # Do not include libc_r directly, use -pthread flag. + continue + ;; + esac + fi + deplibs="$deplibs $arg" + continue + ;; + + -module) + module=yes + continue + ;; + + -no-fast-install) + fast_install=no + continue + ;; + + -no-install) + case $host in + *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2*) + # The PATH hackery in wrapper scripts is required on Windows + # in order for the loader to find any dlls it needs. + $echo "$modename: warning: \`-no-install' is ignored for $host" 1>&2 + $echo "$modename: warning: assuming \`-no-fast-install' instead" 1>&2 + fast_install=no + ;; + *) no_install=yes ;; + esac + continue + ;; + + -no-undefined) + allow_undefined=no + continue + ;; + + -o) prev=output ;; + + -release) + prev=release + continue + ;; + + -rpath) + prev=rpath + continue + ;; + + -R) + prev=xrpath + continue + ;; + + -R*) + dir=`$echo "X$arg" | $Xsed -e 's/^-R//'` + # We need an absolute path. + case $dir in + [\\/]* | [A-Za-z]:[\\/]*) ;; + *) + $echo "$modename: only absolute run-paths are allowed" 1>&2 + exit 1 + ;; + esac + case "$xrpath " in + *" $dir "*) ;; + *) xrpath="$xrpath $dir" ;; + esac + continue + ;; + + -static) + # The effects of -static are defined in a previous loop. + # We used to do the same as -all-static on platforms that + # didn't have a PIC flag, but the assumption that the effects + # would be equivalent was wrong. It would break on at least + # Digital Unix and AIX. + continue + ;; + + -thread-safe) + thread_safe=yes + continue + ;; + + -version-info) + prev=vinfo + continue + ;; + + -Wc,*) + args=`$echo "X$arg" | $Xsed -e "$sed_quote_subst" -e 's/^-Wc,//'` + arg= + save_ifs="$IFS"; IFS=',' + for flag in $args; do + IFS="$save_ifs" + case $flag in + *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*|"") + flag="\"$flag\"" + ;; + esac + arg="$arg $wl$flag" + compiler_flags="$compiler_flags $flag" + done + IFS="$save_ifs" + arg=`$echo "X$arg" | $Xsed -e "s/^ //"` + ;; + + -Wl,*) + args=`$echo "X$arg" | $Xsed -e "$sed_quote_subst" -e 's/^-Wl,//'` + arg= + save_ifs="$IFS"; IFS=',' + for flag in $args; do + IFS="$save_ifs" + case $flag in + *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*|"") + flag="\"$flag\"" + ;; + esac + arg="$arg $wl$flag" + compiler_flags="$compiler_flags $wl$flag" + linker_flags="$linker_flags $flag" + done + IFS="$save_ifs" + arg=`$echo "X$arg" | $Xsed -e "s/^ //"` + ;; + + -Xcompiler) + prev=xcompiler + continue + ;; + + -Xlinker) + prev=xlinker + continue + ;; + + # Some other compiler flag. + -* | +*) + # Unknown arguments in both finalize_command and compile_command need + # to be aesthetically quoted because they are evaled later. + arg=`$echo "X$arg" | $Xsed -e "$sed_quote_subst"` + case $arg in + *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*|"") + arg="\"$arg\"" + ;; + esac + ;; + + *.lo | *.$objext) + # A library or standard object. + if test "$prev" = dlfiles; then + # This file was specified with -dlopen. + if test "$build_libtool_libs" = yes && test "$dlopen_support" = yes; then + dlfiles="$dlfiles $arg" + prev= + continue + else + # If libtool objects are unsupported, then we need to preload. + prev=dlprefiles + fi + fi + + if test "$prev" = dlprefiles; then + # Preload the old-style object. + dlprefiles="$dlprefiles "`$echo "X$arg" | $Xsed -e "$lo2o"` + prev= + else + case $arg in + *.lo) libobjs="$libobjs $arg" ;; + *) objs="$objs $arg" ;; + esac + fi + ;; + + *.$libext) + # An archive. + deplibs="$deplibs $arg" + old_deplibs="$old_deplibs $arg" + continue + ;; + + *.la) + # A libtool-controlled library. + + if test "$prev" = dlfiles; then + # This library was specified with -dlopen. + dlfiles="$dlfiles $arg" + prev= + elif test "$prev" = dlprefiles; then + # The library was specified with -dlpreopen. + dlprefiles="$dlprefiles $arg" + prev= + else + deplibs="$deplibs $arg" + fi + continue + ;; + + # Some other compiler argument. + *) + # Unknown arguments in both finalize_command and compile_command need + # to be aesthetically quoted because they are evaled later. + arg=`$echo "X$arg" | $Xsed -e "$sed_quote_subst"` + case $arg in + *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*|"") + arg="\"$arg\"" + ;; + esac + ;; + esac # arg + + # Now actually substitute the argument into the commands. + if test -n "$arg"; then + compile_command="$compile_command $arg" + finalize_command="$finalize_command $arg" + fi + done # argument parsing loop + + if test -n "$prev"; then + $echo "$modename: the \`$prevarg' option requires an argument" 1>&2 + $echo "$help" 1>&2 + exit 1 + fi + + if test "$export_dynamic" = yes && test -n "$export_dynamic_flag_spec"; then + eval arg=\"$export_dynamic_flag_spec\" + compile_command="$compile_command $arg" + finalize_command="$finalize_command $arg" + fi + + # calculate the name of the file, without its directory + outputname=`$echo "X$output" | $Xsed -e 's%^.*/%%'` + libobjs_save="$libobjs" + + if test -n "$shlibpath_var"; then + # get the directories listed in $shlibpath_var + eval shlib_search_path=\`\$echo \"X\${$shlibpath_var}\" \| \$Xsed -e \'s/:/ /g\'\` + else + shlib_search_path= + fi + eval sys_lib_search_path=\"$sys_lib_search_path_spec\" + eval sys_lib_dlsearch_path=\"$sys_lib_dlsearch_path_spec\" + + output_objdir=`$echo "X$output" | $Xsed -e 's%/[^/]*$%%'` + if test "X$output_objdir" = "X$output"; then + output_objdir="$objdir" + else + output_objdir="$output_objdir/$objdir" + fi + # Create the object directory. + if test ! -d $output_objdir; then + $show "$mkdir $output_objdir" + $run $mkdir $output_objdir + status=$? + if test $status -ne 0 && test ! -d $output_objdir; then + exit $status + fi + fi + + # Determine the type of output + case $output in + "") + $echo "$modename: you must specify an output file" 1>&2 + $echo "$help" 1>&2 + exit 1 + ;; + *.$libext) linkmode=oldlib ;; + *.lo | *.$objext) linkmode=obj ;; + *.la) linkmode=lib ;; + *) linkmode=prog ;; # Anything else should be a program. + esac + + specialdeplibs= + libs= + # Find all interdependent deplibs by searching for libraries + # that are linked more than once (e.g. -la -lb -la) + for deplib in $deplibs; do + if test "X$duplicate_deps" = "Xyes" ; then + case "$libs " in + *" $deplib "*) specialdeplibs="$specialdeplibs $deplib" ;; + esac + fi + libs="$libs $deplib" + done + deplibs= + newdependency_libs= + newlib_search_path= + need_relink=no # whether we're linking any uninstalled libtool libraries + notinst_deplibs= # not-installed libtool libraries + notinst_path= # paths that contain not-installed libtool libraries + case $linkmode in + lib) + passes="conv link" + for file in $dlfiles $dlprefiles; do + case $file in + *.la) ;; + *) + $echo "$modename: libraries can \`-dlopen' only libtool libraries: $file" 1>&2 + exit 1 + ;; + esac + done + ;; + prog) + compile_deplibs= + finalize_deplibs= + alldeplibs=no + newdlfiles= + newdlprefiles= + passes="conv scan dlopen dlpreopen link" + ;; + *) passes="conv" + ;; + esac + for pass in $passes; do + if test $linkmode = prog; then + # Determine which files to process + case $pass in + dlopen) + libs="$dlfiles" + save_deplibs="$deplibs" # Collect dlpreopened libraries + deplibs= + ;; + dlpreopen) libs="$dlprefiles" ;; + link) libs="$deplibs %DEPLIBS% $dependency_libs" ;; + esac + fi + for deplib in $libs; do + lib= + found=no + case $deplib in + -l*) + if test $linkmode = oldlib && test $linkmode = obj; then + $echo "$modename: warning: \`-l' is ignored for archives/objects: $deplib" 1>&2 + continue + fi + if test $pass = conv; then + deplibs="$deplib $deplibs" + continue + fi + name=`$echo "X$deplib" | $Xsed -e 's/^-l//'` + for searchdir in $newlib_search_path $lib_search_path $sys_lib_search_path $shlib_search_path; do + # Search the libtool library + lib="$searchdir/lib${name}.la" + if test -f "$lib"; then + found=yes + break + fi + done + if test "$found" != yes; then + # deplib doesn't seem to be a libtool library + if test "$linkmode,$pass" = "prog,link"; then + compile_deplibs="$deplib $compile_deplibs" + finalize_deplibs="$deplib $finalize_deplibs" + else + deplibs="$deplib $deplibs" + test $linkmode = lib && newdependency_libs="$deplib $newdependency_libs" + fi + continue + fi + ;; # -l + -L*) + case $linkmode in + lib) + deplibs="$deplib $deplibs" + test $pass = conv && continue + newdependency_libs="$deplib $newdependency_libs" + newlib_search_path="$newlib_search_path "`$echo "X$deplib" | $Xsed -e 's/^-L//'` + ;; + prog) + if test $pass = conv; then + deplibs="$deplib $deplibs" + continue + fi + if test $pass = scan; then + deplibs="$deplib $deplibs" + newlib_search_path="$newlib_search_path "`$echo "X$deplib" | $Xsed -e 's/^-L//'` + else + compile_deplibs="$deplib $compile_deplibs" + finalize_deplibs="$deplib $finalize_deplibs" + fi + ;; + *) + $echo "$modename: warning: \`-L' is ignored for archives/objects: $deplib" 1>&2 + ;; + esac # linkmode + continue + ;; # -L + -R*) + if test $pass = link; then + dir=`$echo "X$deplib" | $Xsed -e 's/^-R//'` + # Make sure the xrpath contains only unique directories. + case "$xrpath " in + *" $dir "*) ;; + *) xrpath="$xrpath $dir" ;; + esac + fi + deplibs="$deplib $deplibs" + continue + ;; + *.la) lib="$deplib" ;; + *.$libext) + if test $pass = conv; then + deplibs="$deplib $deplibs" + continue + fi + case $linkmode in + lib) + if test "$deplibs_check_method" != pass_all; then + echo + echo "*** Warning: Trying to link with static lib archive $deplib." + echo "*** I have the capability to make that library automatically link in when" + echo "*** you link to this library. But I can only do this if you have a" + echo "*** shared version of the library, which you do not appear to have" + echo "*** because the file extensions .$libext of this argument makes me believe" + echo "*** that it is just a static archive that I should not used here." + else + echo + echo "*** Warning: Linking the shared library $output against the" + echo "*** static library $deplib is not portable!" + deplibs="$deplib $deplibs" + fi + continue + ;; + prog) + if test $pass != link; then + deplibs="$deplib $deplibs" + else + compile_deplibs="$deplib $compile_deplibs" + finalize_deplibs="$deplib $finalize_deplibs" + fi + continue + ;; + esac # linkmode + ;; # *.$libext + *.lo | *.$objext) + if test $pass = dlpreopen || test "$dlopen_support" != yes || test "$build_libtool_libs" = no; then + # If there is no dlopen support or we're linking statically, + # we need to preload. + newdlprefiles="$newdlprefiles $deplib" + compile_deplibs="$deplib $compile_deplibs" + finalize_deplibs="$deplib $finalize_deplibs" + else + newdlfiles="$newdlfiles $deplib" + fi + continue + ;; + %DEPLIBS%) + alldeplibs=yes + continue + ;; + esac # case $deplib + if test $found = yes || test -f "$lib"; then : + else + $echo "$modename: cannot find the library \`$lib'" 1>&2 + exit 1 + fi + + # Check to see that this really is a libtool archive. + if (sed -e '2q' $lib | egrep "^# Generated by .*$PACKAGE") >/dev/null 2>&1; then : + else + $echo "$modename: \`$lib' is not a valid libtool archive" 1>&2 + exit 1 + fi + + ladir=`$echo "X$lib" | $Xsed -e 's%/[^/]*$%%'` + test "X$ladir" = "X$lib" && ladir="." + + dlname= + dlopen= + dlpreopen= + libdir= + library_names= + old_library= + # If the library was installed with an old release of libtool, + # it will not redefine variable installed. + installed=yes + + # Read the .la file + case $lib in + */* | *\\*) . $lib ;; + *) . ./$lib ;; + esac + + if test "$linkmode,$pass" = "lib,link" || + test "$linkmode,$pass" = "prog,scan" || + { test $linkmode = oldlib && test $linkmode = obj; }; then + # Add dl[pre]opened files of deplib + test -n "$dlopen" && dlfiles="$dlfiles $dlopen" + test -n "$dlpreopen" && dlprefiles="$dlprefiles $dlpreopen" + fi + + if test $pass = conv; then + # Only check for convenience libraries + deplibs="$lib $deplibs" + if test -z "$libdir"; then + if test -z "$old_library"; then + $echo "$modename: cannot find name of link library for \`$lib'" 1>&2 + exit 1 + fi + # It is a libtool convenience library, so add in its objects. + convenience="$convenience $ladir/$objdir/$old_library" + old_convenience="$old_convenience $ladir/$objdir/$old_library" + tmp_libs= + for deplib in $dependency_libs; do + deplibs="$deplib $deplibs" + if test "X$duplicate_deps" = "Xyes" ; then + case "$tmp_libs " in + *" $deplib "*) specialdeplibs="$specialdeplibs $deplib" ;; + esac + fi + tmp_libs="$tmp_libs $deplib" + done + elif test $linkmode != prog && test $linkmode != lib; then + $echo "$modename: \`$lib' is not a convenience library" 1>&2 + exit 1 + fi + continue + fi # $pass = conv + + # Get the name of the library we link against. + linklib= + for l in $old_library $library_names; do + linklib="$l" + done + if test -z "$linklib"; then + $echo "$modename: cannot find name of link library for \`$lib'" 1>&2 + exit 1 + fi + + # This library was specified with -dlopen. + if test $pass = dlopen; then + if test -z "$libdir"; then + $echo "$modename: cannot -dlopen a convenience library: \`$lib'" 1>&2 + exit 1 + fi + if test -z "$dlname" || test "$dlopen_support" != yes || test "$build_libtool_libs" = no; then + # If there is no dlname, no dlopen support or we're linking + # statically, we need to preload. + dlprefiles="$dlprefiles $lib" + else + newdlfiles="$newdlfiles $lib" + fi + continue + fi # $pass = dlopen + + # We need an absolute path. + case $ladir in + [\\/]* | [A-Za-z]:[\\/]*) abs_ladir="$ladir" ;; + *) + abs_ladir=`cd "$ladir" && pwd` + if test -z "$abs_ladir"; then + $echo "$modename: warning: cannot determine absolute directory name of \`$ladir'" 1>&2 + $echo "$modename: passing it literally to the linker, although it might fail" 1>&2 + abs_ladir="$ladir" + fi + ;; + esac + laname=`$echo "X$lib" | $Xsed -e 's%^.*/%%'` + + # Find the relevant object directory and library name. + if test "X$installed" = Xyes; then + if test ! -f "$libdir/$linklib" && test -f "$abs_ladir/$linklib"; then + $echo "$modename: warning: library \`$lib' was moved." 1>&2 + dir="$ladir" + absdir="$abs_ladir" + libdir="$abs_ladir" + else + dir="$libdir" + absdir="$libdir" + fi + else + dir="$ladir/$objdir" + absdir="$abs_ladir/$objdir" + # Remove this search path later + notinst_path="$notinst_path $abs_ladir" + fi # $installed = yes + name=`$echo "X$laname" | $Xsed -e 's/\.la$//' -e 's/^lib//'` + + # This library was specified with -dlpreopen. + if test $pass = dlpreopen; then + if test -z "$libdir"; then + $echo "$modename: cannot -dlpreopen a convenience library: \`$lib'" 1>&2 + exit 1 + fi + # Prefer using a static library (so that no silly _DYNAMIC symbols + # are required to link). + if test -n "$old_library"; then + newdlprefiles="$newdlprefiles $dir/$old_library" + # Otherwise, use the dlname, so that lt_dlopen finds it. + elif test -n "$dlname"; then + newdlprefiles="$newdlprefiles $dir/$dlname" + else + newdlprefiles="$newdlprefiles $dir/$linklib" + fi + fi # $pass = dlpreopen + + if test -z "$libdir"; then + # Link the convenience library + if test $linkmode = lib; then + deplibs="$dir/$old_library $deplibs" + elif test "$linkmode,$pass" = "prog,link"; then + compile_deplibs="$dir/$old_library $compile_deplibs" + finalize_deplibs="$dir/$old_library $finalize_deplibs" + else + deplibs="$lib $deplibs" + fi + continue + fi + + if test $linkmode = prog && test $pass != link; then + newlib_search_path="$newlib_search_path $ladir" + deplibs="$lib $deplibs" + + linkalldeplibs=no + if test "$link_all_deplibs" != no || test -z "$library_names" || + test "$build_libtool_libs" = no; then + linkalldeplibs=yes + fi + + tmp_libs= + for deplib in $dependency_libs; do + case $deplib in + -L*) newlib_search_path="$newlib_search_path "`$echo "X$deplib" | $Xsed -e 's/^-L//'`;; ### testsuite: skip nested quoting test + esac + # Need to link against all dependency_libs? + if test $linkalldeplibs = yes; then + deplibs="$deplib $deplibs" + else + # Need to hardcode shared library paths + # or/and link against static libraries + newdependency_libs="$deplib $newdependency_libs" + fi + if test "X$duplicate_deps" = "Xyes" ; then + case "$tmp_libs " in + *" $deplib "*) specialdeplibs="$specialdeplibs $deplib" ;; + esac + fi + tmp_libs="$tmp_libs $deplib" + done # for deplib + continue + fi # $linkmode = prog... + + link_static=no # Whether the deplib will be linked statically + if test -n "$library_names" && + { test "$prefer_static_libs" = no || test -z "$old_library"; }; then + # Link against this shared library + + if test "$linkmode,$pass" = "prog,link" || + { test $linkmode = lib && test $hardcode_into_libs = yes; }; then + # Hardcode the library path. + # Skip directories that are in the system default run-time + # search path. + case " $sys_lib_dlsearch_path " in + *" $absdir "*) ;; + *) + case "$compile_rpath " in + *" $absdir "*) ;; + *) compile_rpath="$compile_rpath $absdir" + esac + ;; + esac + case " $sys_lib_dlsearch_path " in + *" $libdir "*) ;; + *) + case "$finalize_rpath " in + *" $libdir "*) ;; + *) finalize_rpath="$finalize_rpath $libdir" + esac + ;; + esac + if test $linkmode = prog; then + # We need to hardcode the library path + if test -n "$shlibpath_var"; then + # Make sure the rpath contains only unique directories. + case "$temp_rpath " in + *" $dir "*) ;; + *" $absdir "*) ;; + *) temp_rpath="$temp_rpath $dir" ;; + esac + fi + fi + fi # $linkmode,$pass = prog,link... + + if test "$alldeplibs" = yes && + { test "$deplibs_check_method" = pass_all || + { test "$build_libtool_libs" = yes && + test -n "$library_names"; }; }; then + # We only need to search for static libraries + continue + fi + + if test "$installed" = no; then + notinst_deplibs="$notinst_deplibs $lib" + need_relink=yes + fi + + if test -n "$old_archive_from_expsyms_cmds"; then + # figure out the soname + set dummy $library_names + realname="$2" + shift; shift + libname=`eval \\$echo \"$libname_spec\"` + # use dlname if we got it. it's perfectly good, no? + if test -n "$dlname"; then + soname="$dlname" + elif test -n "$soname_spec"; then + # bleh windows + case $host in + *cygwin*) + major=`expr $current - $age` + versuffix="-$major" + ;; + esac + eval soname=\"$soname_spec\" + else + soname="$realname" + fi + + # Make a new name for the extract_expsyms_cmds to use + soroot="$soname" + soname=`echo $soroot | sed -e 's/^.*\///'` + newlib="libimp-`echo $soname | sed 's/^lib//;s/\.dll$//'`.a" + + # If the library has no export list, then create one now + if test -f "$output_objdir/$soname-def"; then : + else + $show "extracting exported symbol list from \`$soname'" + save_ifs="$IFS"; IFS='~' + eval cmds=\"$extract_expsyms_cmds\" + for cmd in $cmds; do + IFS="$save_ifs" + $show "$cmd" + $run eval "$cmd" || exit $? + done + IFS="$save_ifs" + fi + + # Create $newlib + if test -f "$output_objdir/$newlib"; then :; else + $show "generating import library for \`$soname'" + save_ifs="$IFS"; IFS='~' + eval cmds=\"$old_archive_from_expsyms_cmds\" + for cmd in $cmds; do + IFS="$save_ifs" + $show "$cmd" + $run eval "$cmd" || exit $? + done + IFS="$save_ifs" + fi + # make sure the library variables are pointing to the new library + dir=$output_objdir + linklib=$newlib + fi # test -n $old_archive_from_expsyms_cmds + + if test $linkmode = prog || test "$mode" != relink; then + add_shlibpath= + add_dir= + add= + lib_linked=yes + case $hardcode_action in + immediate | unsupported) + if test "$hardcode_direct" = no; then + add="$dir/$linklib" + elif test "$hardcode_minus_L" = no; then + case $host in + *-*-sunos*) add_shlibpath="$dir" ;; + esac + add_dir="-L$dir" + add="-l$name" + elif test "$hardcode_shlibpath_var" = no; then + add_shlibpath="$dir" + add="-l$name" + else + lib_linked=no + fi + ;; + relink) + if test "$hardcode_direct" = yes; then + add="$dir/$linklib" + elif test "$hardcode_minus_L" = yes; then + add_dir="-L$dir" + add="-l$name" + elif test "$hardcode_shlibpath_var" = yes; then + add_shlibpath="$dir" + add="-l$name" + else + lib_linked=no + fi + ;; + *) lib_linked=no ;; + esac + + if test "$lib_linked" != yes; then + $echo "$modename: configuration error: unsupported hardcode properties" + exit 1 + fi + + if test -n "$add_shlibpath"; then + case :$compile_shlibpath: in + *":$add_shlibpath:"*) ;; + *) compile_shlibpath="$compile_shlibpath$add_shlibpath:" ;; + esac + fi + if test $linkmode = prog; then + test -n "$add_dir" && compile_deplibs="$add_dir $compile_deplibs" + test -n "$add" && compile_deplibs="$add $compile_deplibs" + else + test -n "$add_dir" && deplibs="$add_dir $deplibs" + test -n "$add" && deplibs="$add $deplibs" + if test "$hardcode_direct" != yes && \ + test "$hardcode_minus_L" != yes && \ + test "$hardcode_shlibpath_var" = yes; then + case :$finalize_shlibpath: in + *":$libdir:"*) ;; + *) finalize_shlibpath="$finalize_shlibpath$libdir:" ;; + esac + fi + fi + fi + + if test $linkmode = prog || test "$mode" = relink; then + add_shlibpath= + add_dir= + add= + # Finalize command for both is simple: just hardcode it. + if test "$hardcode_direct" = yes; then + add="$libdir/$linklib" + elif test "$hardcode_minus_L" = yes; then + add_dir="-L$libdir" + add="-l$name" + elif test "$hardcode_shlibpath_var" = yes; then + case :$finalize_shlibpath: in + *":$libdir:"*) ;; + *) finalize_shlibpath="$finalize_shlibpath$libdir:" ;; + esac + add="-l$name" + else + # We cannot seem to hardcode it, guess we'll fake it. + add_dir="-L$libdir" + add="-l$name" + fi + + if test $linkmode = prog; then + test -n "$add_dir" && finalize_deplibs="$add_dir $finalize_deplibs" + test -n "$add" && finalize_deplibs="$add $finalize_deplibs" + else + test -n "$add_dir" && deplibs="$add_dir $deplibs" + test -n "$add" && deplibs="$add $deplibs" + fi + fi + elif test $linkmode = prog; then + if test "$alldeplibs" = yes && + { test "$deplibs_check_method" = pass_all || + { test "$build_libtool_libs" = yes && + test -n "$library_names"; }; }; then + # We only need to search for static libraries + continue + fi + + # Try to link the static library + # Here we assume that one of hardcode_direct or hardcode_minus_L + # is not unsupported. This is valid on all known static and + # shared platforms. + if test "$hardcode_direct" != unsupported; then + test -n "$old_library" && linklib="$old_library" + compile_deplibs="$dir/$linklib $compile_deplibs" + finalize_deplibs="$dir/$linklib $finalize_deplibs" + else + compile_deplibs="-l$name -L$dir $compile_deplibs" + finalize_deplibs="-l$name -L$dir $finalize_deplibs" + fi + elif test "$build_libtool_libs" = yes; then + # Not a shared library + if test "$deplibs_check_method" != pass_all; then + # We're trying link a shared library against a static one + # but the system doesn't support it. + + # Just print a warning and add the library to dependency_libs so + # that the program can be linked against the static library. + echo + echo "*** Warning: This system can not link to static lib archive $lib." + echo "*** I have the capability to make that library automatically link in when" + echo "*** you link to this library. But I can only do this if you have a" + echo "*** shared version of the library, which you do not appear to have." + if test "$module" = yes; then + echo "*** But as you try to build a module library, libtool will still create " + echo "*** a static module, that should work as long as the dlopening application" + echo "*** is linked with the -dlopen flag to resolve symbols at runtime." + if test -z "$global_symbol_pipe"; then + echo + echo "*** However, this would only work if libtool was able to extract symbol" + echo "*** lists from a program, using \`nm' or equivalent, but libtool could" + echo "*** not find such a program. So, this module is probably useless." + echo "*** \`nm' from GNU binutils and a full rebuild may help." + fi + if test "$build_old_libs" = no; then + build_libtool_libs=module + build_old_libs=yes + else + build_libtool_libs=no + fi + fi + else + convenience="$convenience $dir/$old_library" + old_convenience="$old_convenience $dir/$old_library" + deplibs="$dir/$old_library $deplibs" + link_static=yes + fi + fi # link shared/static library? + + if test $linkmode = lib; then + if test -n "$dependency_libs" && + { test $hardcode_into_libs != yes || test $build_old_libs = yes || + test $link_static = yes; }; then + # Extract -R from dependency_libs + temp_deplibs= + for libdir in $dependency_libs; do + case $libdir in + -R*) temp_xrpath=`$echo "X$libdir" | $Xsed -e 's/^-R//'` + case " $xrpath " in + *" $temp_xrpath "*) ;; + *) xrpath="$xrpath $temp_xrpath";; + esac;; + *) temp_deplibs="$temp_deplibs $libdir";; + esac + done + dependency_libs="$temp_deplibs" + fi + + newlib_search_path="$newlib_search_path $absdir" + # Link against this library + test "$link_static" = no && newdependency_libs="$abs_ladir/$laname $newdependency_libs" + # ... and its dependency_libs + tmp_libs= + for deplib in $dependency_libs; do + newdependency_libs="$deplib $newdependency_libs" + if test "X$duplicate_deps" = "Xyes" ; then + case "$tmp_libs " in + *" $deplib "*) specialdeplibs="$specialdeplibs $deplib" ;; + esac + fi + tmp_libs="$tmp_libs $deplib" + done + + if test $link_all_deplibs != no; then + # Add the search paths of all dependency libraries + for deplib in $dependency_libs; do + case $deplib in + -L*) path="$deplib" ;; + *.la) + dir=`$echo "X$deplib" | $Xsed -e 's%/[^/]*$%%'` + test "X$dir" = "X$deplib" && dir="." + # We need an absolute path. + case $dir in + [\\/]* | [A-Za-z]:[\\/]*) absdir="$dir" ;; + *) + absdir=`cd "$dir" && pwd` + if test -z "$absdir"; then + $echo "$modename: warning: cannot determine absolute directory name of \`$dir'" 1>&2 + absdir="$dir" + fi + ;; + esac + if grep "^installed=no" $deplib > /dev/null; then + path="-L$absdir/$objdir" + else + eval libdir=`sed -n -e 's/^libdir=\(.*\)$/\1/p' $deplib` + if test -z "$libdir"; then + $echo "$modename: \`$deplib' is not a valid libtool archive" 1>&2 + exit 1 + fi + if test "$absdir" != "$libdir"; then + $echo "$modename: warning: \`$deplib' seems to be moved" 1>&2 + fi + path="-L$absdir" + fi + ;; + *) continue ;; + esac + case " $deplibs " in + *" $path "*) ;; + *) deplibs="$deplibs $path" ;; + esac + done + fi # link_all_deplibs != no + fi # linkmode = lib + done # for deplib in $libs + if test $pass = dlpreopen; then + # Link the dlpreopened libraries before other libraries + for deplib in $save_deplibs; do + deplibs="$deplib $deplibs" + done + fi + if test $pass != dlopen; then + test $pass != scan && dependency_libs="$newdependency_libs" + if test $pass != conv; then + # Make sure lib_search_path contains only unique directories. + lib_search_path= + for dir in $newlib_search_path; do + case "$lib_search_path " in + *" $dir "*) ;; + *) lib_search_path="$lib_search_path $dir" ;; + esac + done + newlib_search_path= + fi + + if test "$linkmode,$pass" != "prog,link"; then + vars="deplibs" + else + vars="compile_deplibs finalize_deplibs" + fi + for var in $vars dependency_libs; do + # Add libraries to $var in reverse order + eval tmp_libs=\"\$$var\" + new_libs= + for deplib in $tmp_libs; do + case $deplib in + -L*) new_libs="$deplib $new_libs" ;; + *) + case " $specialdeplibs " in + *" $deplib "*) new_libs="$deplib $new_libs" ;; + *) + case " $new_libs " in + *" $deplib "*) ;; + *) new_libs="$deplib $new_libs" ;; + esac + ;; + esac + ;; + esac + done + tmp_libs= + for deplib in $new_libs; do + case $deplib in + -L*) + case " $tmp_libs " in + *" $deplib "*) ;; + *) tmp_libs="$tmp_libs $deplib" ;; + esac + ;; + *) tmp_libs="$tmp_libs $deplib" ;; + esac + done + eval $var=\"$tmp_libs\" + done # for var + fi + if test "$pass" = "conv" && + { test "$linkmode" = "lib" || test "$linkmode" = "prog"; }; then + libs="$deplibs" # reset libs + deplibs= + fi + done # for pass + if test $linkmode = prog; then + dlfiles="$newdlfiles" + dlprefiles="$newdlprefiles" + fi + + case $linkmode in + oldlib) + if test -n "$dlfiles$dlprefiles" || test "$dlself" != no; then + $echo "$modename: warning: \`-dlopen' is ignored for archives" 1>&2 + fi + + if test -n "$rpath"; then + $echo "$modename: warning: \`-rpath' is ignored for archives" 1>&2 + fi + + if test -n "$xrpath"; then + $echo "$modename: warning: \`-R' is ignored for archives" 1>&2 + fi + + if test -n "$vinfo"; then + $echo "$modename: warning: \`-version-info' is ignored for archives" 1>&2 + fi + + if test -n "$release"; then + $echo "$modename: warning: \`-release' is ignored for archives" 1>&2 + fi + + if test -n "$export_symbols" || test -n "$export_symbols_regex"; then + $echo "$modename: warning: \`-export-symbols' is ignored for archives" 1>&2 + fi + + # Now set the variables for building old libraries. + build_libtool_libs=no + oldlibs="$output" + objs="$objs$old_deplibs" + ;; + + lib) + # Make sure we only generate libraries of the form `libNAME.la'. + case $outputname in + lib*) + name=`$echo "X$outputname" | $Xsed -e 's/\.la$//' -e 's/^lib//'` + eval libname=\"$libname_spec\" + ;; + *) + if test "$module" = no; then + $echo "$modename: libtool library \`$output' must begin with \`lib'" 1>&2 + $echo "$help" 1>&2 + exit 1 + fi + if test "$need_lib_prefix" != no; then + # Add the "lib" prefix for modules if required + name=`$echo "X$outputname" | $Xsed -e 's/\.la$//'` + eval libname=\"$libname_spec\" + else + libname=`$echo "X$outputname" | $Xsed -e 's/\.la$//'` + fi + ;; + esac + + if test -n "$objs"; then + if test "$deplibs_check_method" != pass_all; then + $echo "$modename: cannot build libtool library \`$output' from non-libtool objects on this host:$objs" 2>&1 + exit 1 + else + echo + echo "*** Warning: Linking the shared library $output against the non-libtool" + echo "*** objects $objs is not portable!" + libobjs="$libobjs $objs" + fi + fi + + if test "$dlself" != no; then + $echo "$modename: warning: \`-dlopen self' is ignored for libtool libraries" 1>&2 + fi + + set dummy $rpath + if test $# -gt 2; then + $echo "$modename: warning: ignoring multiple \`-rpath's for a libtool library" 1>&2 + fi + install_libdir="$2" + + oldlibs= + if test -z "$rpath"; then + if test "$build_libtool_libs" = yes; then + # Building a libtool convenience library. + libext=al + oldlibs="$output_objdir/$libname.$libext $oldlibs" + build_libtool_libs=convenience + build_old_libs=yes + fi + + if test -n "$vinfo"; then + $echo "$modename: warning: \`-version-info' is ignored for convenience libraries" 1>&2 + fi + + if test -n "$release"; then + $echo "$modename: warning: \`-release' is ignored for convenience libraries" 1>&2 + fi + else + + # Parse the version information argument. + save_ifs="$IFS"; IFS=':' + set dummy $vinfo 0 0 0 + IFS="$save_ifs" + + if test -n "$8"; then + $echo "$modename: too many parameters to \`-version-info'" 1>&2 + $echo "$help" 1>&2 + exit 1 + fi + + current="$2" + revision="$3" + age="$4" + + # Check that each of the things are valid numbers. + case $current in + 0 | [1-9] | [1-9][0-9] | [1-9][0-9][0-9]) ;; + *) + $echo "$modename: CURRENT \`$current' is not a nonnegative integer" 1>&2 + $echo "$modename: \`$vinfo' is not valid version information" 1>&2 + exit 1 + ;; + esac + + case $revision in + 0 | [1-9] | [1-9][0-9] | [1-9][0-9][0-9]) ;; + *) + $echo "$modename: REVISION \`$revision' is not a nonnegative integer" 1>&2 + $echo "$modename: \`$vinfo' is not valid version information" 1>&2 + exit 1 + ;; + esac + + case $age in + 0 | [1-9] | [1-9][0-9] | [1-9][0-9][0-9]) ;; + *) + $echo "$modename: AGE \`$age' is not a nonnegative integer" 1>&2 + $echo "$modename: \`$vinfo' is not valid version information" 1>&2 + exit 1 + ;; + esac + + if test $age -gt $current; then + $echo "$modename: AGE \`$age' is greater than the current interface number \`$current'" 1>&2 + $echo "$modename: \`$vinfo' is not valid version information" 1>&2 + exit 1 + fi + + # Calculate the version variables. + major= + versuffix= + verstring= + case $version_type in + none) ;; + + darwin) + # Like Linux, but with the current version available in + # verstring for coding it into the library header + major=.`expr $current - $age` + versuffix="$major.$age.$revision" + # Darwin ld doesn't like 0 for these options... + minor_current=`expr $current + 1` + verstring="-compatibility_version $minor_current -current_version $minor_current.$revision" + ;; + + freebsd-aout) + major=".$current" + versuffix=".$current.$revision"; + ;; + + freebsd-elf) + major=".$current" + versuffix=".$current"; + ;; + + irix | nonstopux) + case $version_type in + nonstopux) verstring_prefix=nonstopux ;; + *) verstring_prefix=sgi ;; + esac + verstring="$verstring_prefix$major.$revision" + + major=`expr $current - $age + 1` + + # Add in all the interfaces that we are compatible with. + loop=$revision + while test $loop != 0; do + iface=`expr $revision - $loop` + loop=`expr $loop - 1` + verstring="$verstring_prefix$major.$iface:$verstring" + done + + # Before this point, $major must not contain `.'. + major=.$major + versuffix="$major.$revision" + ;; + + linux) + major=.`expr $current - $age` + versuffix="$major.$age.$revision" + ;; + + osf) + major=`expr $current - $age` + versuffix=".$current.$age.$revision" + verstring="$current.$age.$revision" + + # Add in all the interfaces that we are compatible with. + loop=$age + while test $loop != 0; do + iface=`expr $current - $loop` + loop=`expr $loop - 1` + verstring="$verstring:${iface}.0" + done + + # Make executables depend on our current version. + verstring="$verstring:${current}.0" + ;; + + sunos) + major=".$current" + versuffix=".$current.$revision" + ;; + + windows) + # Use '-' rather than '.', since we only want one + # extension on DOS 8.3 filesystems. + major=`expr $current - $age` + versuffix="-$major" + ;; + + *) + $echo "$modename: unknown library version type \`$version_type'" 1>&2 + echo "Fatal configuration error. See the $PACKAGE docs for more information." 1>&2 + exit 1 + ;; + esac + + # Clear the version info if we defaulted, and they specified a release. + if test -z "$vinfo" && test -n "$release"; then + major= + verstring="0.0" + case $version_type in + darwin) + # we can't check for "0.0" in archive_cmds due to quoting + # problems, so we reset it completely + verstring="" + ;; + *) + verstring="0.0" + ;; + esac + if test "$need_version" = no; then + versuffix= + else + versuffix=".0.0" + fi + fi + + # Remove version info from name if versioning should be avoided + if test "$avoid_version" = yes && test "$need_version" = no; then + major= + versuffix= + verstring="" + fi + + # Check to see if the archive will have undefined symbols. + if test "$allow_undefined" = yes; then + if test "$allow_undefined_flag" = unsupported; then + $echo "$modename: warning: undefined symbols not allowed in $host shared libraries" 1>&2 + build_libtool_libs=no + build_old_libs=yes + fi + else + # Don't allow undefined symbols. + allow_undefined_flag="$no_undefined_flag" + fi + fi + + if test "$mode" != relink; then + # Remove our outputs. + $show "${rm}r $output_objdir/$outputname $output_objdir/$libname.* $output_objdir/${libname}${release}.*" + $run ${rm}r $output_objdir/$outputname $output_objdir/$libname.* $output_objdir/${libname}${release}.* + fi + + # Now set the variables for building old libraries. + if test "$build_old_libs" = yes && test "$build_libtool_libs" != convenience ; then + oldlibs="$oldlibs $output_objdir/$libname.$libext" + + # Transform .lo files to .o files. + oldobjs="$objs "`$echo "X$libobjs" | $SP2NL | $Xsed -e '/\.'${libext}'$/d' -e "$lo2o" | $NL2SP` + fi + + # Eliminate all temporary directories. + for path in $notinst_path; do + lib_search_path=`echo "$lib_search_path " | sed -e 's% $path % %g'` + deplibs=`echo "$deplibs " | sed -e 's% -L$path % %g'` + dependency_libs=`echo "$dependency_libs " | sed -e 's% -L$path % %g'` + done + + if test -n "$xrpath"; then + # If the user specified any rpath flags, then add them. + temp_xrpath= + for libdir in $xrpath; do + temp_xrpath="$temp_xrpath -R$libdir" + case "$finalize_rpath " in + *" $libdir "*) ;; + *) finalize_rpath="$finalize_rpath $libdir" ;; + esac + done + if test $hardcode_into_libs != yes || test $build_old_libs = yes; then + dependency_libs="$temp_xrpath $dependency_libs" + fi + fi + + # Make sure dlfiles contains only unique files that won't be dlpreopened + old_dlfiles="$dlfiles" + dlfiles= + for lib in $old_dlfiles; do + case " $dlprefiles $dlfiles " in + *" $lib "*) ;; + *) dlfiles="$dlfiles $lib" ;; + esac + done + + # Make sure dlprefiles contains only unique files + old_dlprefiles="$dlprefiles" + dlprefiles= + for lib in $old_dlprefiles; do + case "$dlprefiles " in + *" $lib "*) ;; + *) dlprefiles="$dlprefiles $lib" ;; + esac + done + + if test "$build_libtool_libs" = yes; then + if test -n "$rpath"; then + case $host in + *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-*-beos*) + # these systems don't actually have a c library (as such)! + ;; + *-*-rhapsody* | *-*-darwin1.[012]) + # Rhapsody C library is in the System framework + deplibs="$deplibs -framework System" + ;; + *-*-netbsd*) + # Don't link with libc until the a.out ld.so is fixed. + ;; + *-*-openbsd* | *-*-freebsd*) + # Do not include libc due to us having libc/libc_r. + ;; + *) + # Add libc to deplibs on all other systems if necessary. + if test $build_libtool_need_lc = "yes"; then + deplibs="$deplibs -lc" + fi + ;; + esac + fi + + # Transform deplibs into only deplibs that can be linked in shared. + name_save=$name + libname_save=$libname + release_save=$release + versuffix_save=$versuffix + major_save=$major + # I'm not sure if I'm treating the release correctly. I think + # release should show up in the -l (ie -lgmp5) so we don't want to + # add it in twice. Is that correct? + release="" + versuffix="" + major="" + newdeplibs= + droppeddeps=no + case $deplibs_check_method in + pass_all) + # Don't check for shared/static. Everything works. + # This might be a little naive. We might want to check + # whether the library exists or not. But this is on + # osf3 & osf4 and I'm not really sure... Just + # implementing what was already the behaviour. + newdeplibs=$deplibs + ;; + test_compile) + # This code stresses the "libraries are programs" paradigm to its + # limits. Maybe even breaks it. We compile a program, linking it + # against the deplibs as a proxy for the library. Then we can check + # whether they linked in statically or dynamically with ldd. + $rm conftest.c + cat > conftest.c </dev/null` + for potent_lib in $potential_libs; do + # Follow soft links. + if ls -lLd "$potent_lib" 2>/dev/null \ + | grep " -> " >/dev/null; then + continue + fi + # The statement above tries to avoid entering an + # endless loop below, in case of cyclic links. + # We might still enter an endless loop, since a link + # loop can be closed while we follow links, + # but so what? + potlib="$potent_lib" + while test -h "$potlib" 2>/dev/null; do + potliblink=`ls -ld $potlib | sed 's/.* -> //'` + case $potliblink in + [\\/]* | [A-Za-z]:[\\/]*) potlib="$potliblink";; + *) potlib=`$echo "X$potlib" | $Xsed -e 's,[^/]*$,,'`"$potliblink";; + esac + done + if eval $file_magic_cmd \"\$potlib\" 2>/dev/null \ + | sed 10q \ + | egrep "$file_magic_regex" > /dev/null; then + newdeplibs="$newdeplibs $a_deplib" + a_deplib="" + break 2 + fi + done + done + if test -n "$a_deplib" ; then + droppeddeps=yes + echo + echo "*** Warning: linker path does not have real file for library $a_deplib." + echo "*** I have the capability to make that library automatically link in when" + echo "*** you link to this library. But I can only do this if you have a" + echo "*** shared version of the library, which you do not appear to have" + echo "*** because I did check the linker path looking for a file starting" + if test -z "$potlib" ; then + echo "*** with $libname but no candidates were found. (...for file magic test)" + else + echo "*** with $libname and none of the candidates passed a file format test" + echo "*** using a file magic. Last file checked: $potlib" + fi + fi + else + # Add a -L argument. + newdeplibs="$newdeplibs $a_deplib" + fi + done # Gone through all deplibs. + ;; + match_pattern*) + set dummy $deplibs_check_method + match_pattern_regex=`expr "$deplibs_check_method" : "$2 \(.*\)"` + for a_deplib in $deplibs; do + name="`expr $a_deplib : '-l\(.*\)'`" + # If $name is empty we are operating on a -L argument. + if test -n "$name" && test "$name" != "0"; then + libname=`eval \\$echo \"$libname_spec\"` + for i in $lib_search_path $sys_lib_search_path $shlib_search_path; do + potential_libs=`ls $i/$libname[.-]* 2>/dev/null` + for potent_lib in $potential_libs; do + potlib="$potent_lib" # see symlink-check below in file_magic test + if eval echo \"$potent_lib\" 2>/dev/null \ + | sed 10q \ + | egrep "$match_pattern_regex" > /dev/null; then + newdeplibs="$newdeplibs $a_deplib" + a_deplib="" + break 2 + fi + done + done + if test -n "$a_deplib" ; then + droppeddeps=yes + echo + echo "*** Warning: linker path does not have real file for library $a_deplib." + echo "*** I have the capability to make that library automatically link in when" + echo "*** you link to this library. But I can only do this if you have a" + echo "*** shared version of the library, which you do not appear to have" + echo "*** because I did check the linker path looking for a file starting" + if test -z "$potlib" ; then + echo "*** with $libname but no candidates were found. (...for regex pattern test)" + else + echo "*** with $libname and none of the candidates passed a file format test" + echo "*** using a regex pattern. Last file checked: $potlib" + fi + fi + else + # Add a -L argument. + newdeplibs="$newdeplibs $a_deplib" + fi + done # Gone through all deplibs. + ;; + none | unknown | *) + newdeplibs="" + if $echo "X $deplibs" | $Xsed -e 's/ -lc$//' \ + -e 's/ -[LR][^ ]*//g' -e 's/[ ]//g' | + grep . >/dev/null; then + echo + if test "X$deplibs_check_method" = "Xnone"; then + echo "*** Warning: inter-library dependencies are not supported in this platform." + else + echo "*** Warning: inter-library dependencies are not known to be supported." + fi + echo "*** All declared inter-library dependencies are being dropped." + droppeddeps=yes + fi + ;; + esac + versuffix=$versuffix_save + major=$major_save + release=$release_save + libname=$libname_save + name=$name_save + + case $host in + *-*-rhapsody* | *-*-darwin1.[012]) + # On Rhapsody replace the C library is the System framework + newdeplibs=`$echo "X $newdeplibs" | $Xsed -e 's/ -lc / -framework System /'` + ;; + esac + + if test "$droppeddeps" = yes; then + if test "$module" = yes; then + echo + echo "*** Warning: libtool could not satisfy all declared inter-library" + echo "*** dependencies of module $libname. Therefore, libtool will create" + echo "*** a static module, that should work as long as the dlopening" + echo "*** application is linked with the -dlopen flag." + if test -z "$global_symbol_pipe"; then + echo + echo "*** However, this would only work if libtool was able to extract symbol" + echo "*** lists from a program, using \`nm' or equivalent, but libtool could" + echo "*** not find such a program. So, this module is probably useless." + echo "*** \`nm' from GNU binutils and a full rebuild may help." + fi + if test "$build_old_libs" = no; then + oldlibs="$output_objdir/$libname.$libext" + build_libtool_libs=module + build_old_libs=yes + else + build_libtool_libs=no + fi + else + echo "*** The inter-library dependencies that have been dropped here will be" + echo "*** automatically added whenever a program is linked with this library" + echo "*** or is declared to -dlopen it." + + if test $allow_undefined = no; then + echo + echo "*** Since this library must not contain undefined symbols," + echo "*** because either the platform does not support them or" + echo "*** it was explicitly requested with -no-undefined," + echo "*** libtool will only create a static version of it." + if test "$build_old_libs" = no; then + oldlibs="$output_objdir/$libname.$libext" + build_libtool_libs=module + build_old_libs=yes + else + build_libtool_libs=no + fi + fi + fi + fi + # Done checking deplibs! + deplibs=$newdeplibs + fi + + # All the library-specific variables (install_libdir is set above). + library_names= + old_library= + dlname= + + # Test again, we may have decided not to build it any more + if test "$build_libtool_libs" = yes; then + if test $hardcode_into_libs = yes; then + # Hardcode the library paths + hardcode_libdirs= + dep_rpath= + rpath="$finalize_rpath" + test "$mode" != relink && rpath="$compile_rpath$rpath" + for libdir in $rpath; do + if test -n "$hardcode_libdir_flag_spec"; then + if test -n "$hardcode_libdir_separator"; then + if test -z "$hardcode_libdirs"; then + hardcode_libdirs="$libdir" + else + # Just accumulate the unique libdirs. + case $hardcode_libdir_separator$hardcode_libdirs$hardcode_libdir_separator in + *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*) + ;; + *) + hardcode_libdirs="$hardcode_libdirs$hardcode_libdir_separator$libdir" + ;; + esac + fi + else + eval flag=\"$hardcode_libdir_flag_spec\" + dep_rpath="$dep_rpath $flag" + fi + elif test -n "$runpath_var"; then + case "$perm_rpath " in + *" $libdir "*) ;; + *) perm_rpath="$perm_rpath $libdir" ;; + esac + fi + done + # Substitute the hardcoded libdirs into the rpath. + if test -n "$hardcode_libdir_separator" && + test -n "$hardcode_libdirs"; then + libdir="$hardcode_libdirs" + eval dep_rpath=\"$hardcode_libdir_flag_spec\" + fi + if test -n "$runpath_var" && test -n "$perm_rpath"; then + # We should set the runpath_var. + rpath= + for dir in $perm_rpath; do + rpath="$rpath$dir:" + done + eval "$runpath_var='$rpath\$$runpath_var'; export $runpath_var" + fi + test -n "$dep_rpath" && deplibs="$dep_rpath $deplibs" + fi + + shlibpath="$finalize_shlibpath" + test "$mode" != relink && shlibpath="$compile_shlibpath$shlibpath" + if test -n "$shlibpath"; then + eval "$shlibpath_var='$shlibpath\$$shlibpath_var'; export $shlibpath_var" + fi + + # Get the real and link names of the library. + eval library_names=\"$library_names_spec\" + set dummy $library_names + realname="$2" + shift; shift + + if test -n "$soname_spec"; then + eval soname=\"$soname_spec\" + else + soname="$realname" + fi + test -z "$dlname" && dlname=$soname + + lib="$output_objdir/$realname" + for link + do + linknames="$linknames $link" + done + + # Ensure that we have .o objects for linkers which dislike .lo + # (e.g. aix) in case we are running --disable-static + for obj in $libobjs; do + xdir=`$echo "X$obj" | $Xsed -e 's%/[^/]*$%%'` + if test "X$xdir" = "X$obj"; then + xdir="." + else + xdir="$xdir" + fi + baseobj=`$echo "X$obj" | $Xsed -e 's%^.*/%%'` + oldobj=`$echo "X$baseobj" | $Xsed -e "$lo2o"` + if test ! -f $xdir/$oldobj; then + $show "(cd $xdir && ${LN_S} $baseobj $oldobj)" + $run eval '(cd $xdir && ${LN_S} $baseobj $oldobj)' || exit $? + fi + done + + # Use standard objects if they are pic + test -z "$pic_flag" && libobjs=`$echo "X$libobjs" | $SP2NL | $Xsed -e "$lo2o" | $NL2SP` + + # Prepare the list of exported symbols + if test -z "$export_symbols"; then + if test "$always_export_symbols" = yes || test -n "$export_symbols_regex"; then + $show "generating symbol list for \`$libname.la'" + export_symbols="$output_objdir/$libname.exp" + $run $rm $export_symbols + eval cmds=\"$export_symbols_cmds\" + save_ifs="$IFS"; IFS='~' + for cmd in $cmds; do + IFS="$save_ifs" + $show "$cmd" + $run eval "$cmd" || exit $? + done + IFS="$save_ifs" + if test -n "$export_symbols_regex"; then + $show "egrep -e \"$export_symbols_regex\" \"$export_symbols\" > \"${export_symbols}T\"" + $run eval 'egrep -e "$export_symbols_regex" "$export_symbols" > "${export_symbols}T"' + $show "$mv \"${export_symbols}T\" \"$export_symbols\"" + $run eval '$mv "${export_symbols}T" "$export_symbols"' + fi + fi + fi + + if test -n "$export_symbols" && test -n "$include_expsyms"; then + $run eval '$echo "X$include_expsyms" | $SP2NL >> "$export_symbols"' + fi + + if test -n "$convenience"; then + if test -n "$whole_archive_flag_spec"; then + eval libobjs=\"\$libobjs $whole_archive_flag_spec\" + else + gentop="$output_objdir/${outputname}x" + $show "${rm}r $gentop" + $run ${rm}r "$gentop" + $show "mkdir $gentop" + $run mkdir "$gentop" + status=$? + if test $status -ne 0 && test ! -d "$gentop"; then + exit $status + fi + generated="$generated $gentop" + + for xlib in $convenience; do + # Extract the objects. + case $xlib in + [\\/]* | [A-Za-z]:[\\/]*) xabs="$xlib" ;; + *) xabs=`pwd`"/$xlib" ;; + esac + xlib=`$echo "X$xlib" | $Xsed -e 's%^.*/%%'` + xdir="$gentop/$xlib" + + $show "${rm}r $xdir" + $run ${rm}r "$xdir" + $show "mkdir $xdir" + $run mkdir "$xdir" + status=$? + if test $status -ne 0 && test ! -d "$xdir"; then + exit $status + fi + $show "(cd $xdir && $AR x $xabs)" + $run eval "(cd \$xdir && $AR x \$xabs)" || exit $? + + libobjs="$libobjs "`find $xdir -name \*.o -print -o -name \*.lo -print | $NL2SP` + done + fi + fi + + if test "$thread_safe" = yes && test -n "$thread_safe_flag_spec"; then + eval flag=\"$thread_safe_flag_spec\" + linker_flags="$linker_flags $flag" + fi + + # Make a backup of the uninstalled library when relinking + if test "$mode" = relink; then + $run eval '(cd $output_objdir && $rm ${realname}U && $mv $realname ${realname}U)' || exit $? + fi + + # Do each of the archive commands. + if test -n "$export_symbols" && test -n "$archive_expsym_cmds"; then + eval cmds=\"$archive_expsym_cmds\" + else + eval cmds=\"$archive_cmds\" + fi + save_ifs="$IFS"; IFS='~' + for cmd in $cmds; do + IFS="$save_ifs" + $show "$cmd" + $run eval "$cmd" || exit $? + done + IFS="$save_ifs" + + # Restore the uninstalled library and exit + if test "$mode" = relink; then + $run eval '(cd $output_objdir && $rm ${realname}T && $mv $realname ${realname}T && $mv "$realname"U $realname)' || exit $? + exit 0 + fi + + # Create links to the real library. + for linkname in $linknames; do + if test "$realname" != "$linkname"; then + $show "(cd $output_objdir && $rm $linkname && $LN_S $realname $linkname)" + $run eval '(cd $output_objdir && $rm $linkname && $LN_S $realname $linkname)' || exit $? + fi + done + + # If -module or -export-dynamic was specified, set the dlname. + if test "$module" = yes || test "$export_dynamic" = yes; then + # On all known operating systems, these are identical. + dlname="$soname" + fi + fi + ;; + + obj) + if test -n "$deplibs"; then + $echo "$modename: warning: \`-l' and \`-L' are ignored for objects" 1>&2 + fi + + if test -n "$dlfiles$dlprefiles" || test "$dlself" != no; then + $echo "$modename: warning: \`-dlopen' is ignored for objects" 1>&2 + fi + + if test -n "$rpath"; then + $echo "$modename: warning: \`-rpath' is ignored for objects" 1>&2 + fi + + if test -n "$xrpath"; then + $echo "$modename: warning: \`-R' is ignored for objects" 1>&2 + fi + + if test -n "$vinfo"; then + $echo "$modename: warning: \`-version-info' is ignored for objects" 1>&2 + fi + + if test -n "$release"; then + $echo "$modename: warning: \`-release' is ignored for objects" 1>&2 + fi + + case $output in + *.lo) + if test -n "$objs$old_deplibs"; then + $echo "$modename: cannot build library object \`$output' from non-libtool objects" 1>&2 + exit 1 + fi + libobj="$output" + obj=`$echo "X$output" | $Xsed -e "$lo2o"` + ;; + *) + libobj= + obj="$output" + ;; + esac + + # Delete the old objects. + $run $rm $obj $libobj + + # Objects from convenience libraries. This assumes + # single-version convenience libraries. Whenever we create + # different ones for PIC/non-PIC, this we'll have to duplicate + # the extraction. + reload_conv_objs= + gentop= + # reload_cmds runs $LD directly, so let us get rid of + # -Wl from whole_archive_flag_spec + wl= + + if test -n "$convenience"; then + if test -n "$whole_archive_flag_spec"; then + eval reload_conv_objs=\"\$reload_objs $whole_archive_flag_spec\" + else + gentop="$output_objdir/${obj}x" + $show "${rm}r $gentop" + $run ${rm}r "$gentop" + $show "mkdir $gentop" + $run mkdir "$gentop" + status=$? + if test $status -ne 0 && test ! -d "$gentop"; then + exit $status + fi + generated="$generated $gentop" + + for xlib in $convenience; do + # Extract the objects. + case $xlib in + [\\/]* | [A-Za-z]:[\\/]*) xabs="$xlib" ;; + *) xabs=`pwd`"/$xlib" ;; + esac + xlib=`$echo "X$xlib" | $Xsed -e 's%^.*/%%'` + xdir="$gentop/$xlib" + + $show "${rm}r $xdir" + $run ${rm}r "$xdir" + $show "mkdir $xdir" + $run mkdir "$xdir" + status=$? + if test $status -ne 0 && test ! -d "$xdir"; then + exit $status + fi + $show "(cd $xdir && $AR x $xabs)" + $run eval "(cd \$xdir && $AR x \$xabs)" || exit $? + + reload_conv_objs="$reload_objs "`find $xdir -name \*.o -print -o -name \*.lo -print | $NL2SP` + done + fi + fi + + # Create the old-style object. + reload_objs="$objs$old_deplibs "`$echo "X$libobjs" | $SP2NL | $Xsed -e '/\.'${libext}$'/d' -e '/\.lib$/d' -e "$lo2o" | $NL2SP`" $reload_conv_objs" ### testsuite: skip nested quoting test + + output="$obj" + eval cmds=\"$reload_cmds\" + save_ifs="$IFS"; IFS='~' + for cmd in $cmds; do + IFS="$save_ifs" + $show "$cmd" + $run eval "$cmd" || exit $? + done + IFS="$save_ifs" + + # Exit if we aren't doing a library object file. + if test -z "$libobj"; then + if test -n "$gentop"; then + $show "${rm}r $gentop" + $run ${rm}r $gentop + fi + + exit 0 + fi + + if test "$build_libtool_libs" != yes; then + if test -n "$gentop"; then + $show "${rm}r $gentop" + $run ${rm}r $gentop + fi + + # Create an invalid libtool object if no PIC, so that we don't + # accidentally link it into a program. + $show "echo timestamp > $libobj" + $run eval "echo timestamp > $libobj" || exit $? + exit 0 + fi + + if test -n "$pic_flag" || test "$pic_mode" != default; then + # Only do commands if we really have different PIC objects. + reload_objs="$libobjs $reload_conv_objs" + output="$libobj" + eval cmds=\"$reload_cmds\" + save_ifs="$IFS"; IFS='~' + for cmd in $cmds; do + IFS="$save_ifs" + $show "$cmd" + $run eval "$cmd" || exit $? + done + IFS="$save_ifs" + else + # Just create a symlink. + $show $rm $libobj + $run $rm $libobj + xdir=`$echo "X$libobj" | $Xsed -e 's%/[^/]*$%%'` + if test "X$xdir" = "X$libobj"; then + xdir="." + else + xdir="$xdir" + fi + baseobj=`$echo "X$libobj" | $Xsed -e 's%^.*/%%'` + oldobj=`$echo "X$baseobj" | $Xsed -e "$lo2o"` + $show "(cd $xdir && $LN_S $oldobj $baseobj)" + $run eval '(cd $xdir && $LN_S $oldobj $baseobj)' || exit $? + fi + + if test -n "$gentop"; then + $show "${rm}r $gentop" + $run ${rm}r $gentop + fi + + exit 0 + ;; + + prog) + case $host in + *cygwin*) output=`echo $output | sed -e 's,.exe$,,;s,$,.exe,'` ;; + esac + if test -n "$vinfo"; then + $echo "$modename: warning: \`-version-info' is ignored for programs" 1>&2 + fi + + if test -n "$release"; then + $echo "$modename: warning: \`-release' is ignored for programs" 1>&2 + fi + + if test "$preload" = yes; then + if test "$dlopen_support" = unknown && test "$dlopen_self" = unknown && + test "$dlopen_self_static" = unknown; then + $echo "$modename: warning: \`AC_LIBTOOL_DLOPEN' not used. Assuming no dlopen support." + fi + fi + + case $host in + *-*-rhapsody* | *-*-darwin1.[012]) + # On Rhapsody replace the C library is the System framework + compile_deplibs=`$echo "X $compile_deplibs" | $Xsed -e 's/ -lc / -framework System /'` + finalize_deplibs=`$echo "X $finalize_deplibs" | $Xsed -e 's/ -lc / -framework System /'` + ;; + esac + + compile_command="$compile_command $compile_deplibs" + finalize_command="$finalize_command $finalize_deplibs" + + if test -n "$rpath$xrpath"; then + # If the user specified any rpath flags, then add them. + for libdir in $rpath $xrpath; do + # This is the magic to use -rpath. + case "$finalize_rpath " in + *" $libdir "*) ;; + *) finalize_rpath="$finalize_rpath $libdir" ;; + esac + done + fi + + # Now hardcode the library paths + rpath= + hardcode_libdirs= + for libdir in $compile_rpath $finalize_rpath; do + if test -n "$hardcode_libdir_flag_spec"; then + if test -n "$hardcode_libdir_separator"; then + if test -z "$hardcode_libdirs"; then + hardcode_libdirs="$libdir" + else + # Just accumulate the unique libdirs. + case $hardcode_libdir_separator$hardcode_libdirs$hardcode_libdir_separator in + *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*) + ;; + *) + hardcode_libdirs="$hardcode_libdirs$hardcode_libdir_separator$libdir" + ;; + esac + fi + else + eval flag=\"$hardcode_libdir_flag_spec\" + rpath="$rpath $flag" + fi + elif test -n "$runpath_var"; then + case "$perm_rpath " in + *" $libdir "*) ;; + *) perm_rpath="$perm_rpath $libdir" ;; + esac + fi + case $host in + *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2*) + case :$dllsearchpath: in + *":$libdir:"*) ;; + *) dllsearchpath="$dllsearchpath:$libdir";; + esac + ;; + esac + done + # Substitute the hardcoded libdirs into the rpath. + if test -n "$hardcode_libdir_separator" && + test -n "$hardcode_libdirs"; then + libdir="$hardcode_libdirs" + eval rpath=\" $hardcode_libdir_flag_spec\" + fi + compile_rpath="$rpath" + + rpath= + hardcode_libdirs= + for libdir in $finalize_rpath; do + if test -n "$hardcode_libdir_flag_spec"; then + if test -n "$hardcode_libdir_separator"; then + if test -z "$hardcode_libdirs"; then + hardcode_libdirs="$libdir" + else + # Just accumulate the unique libdirs. + case $hardcode_libdir_separator$hardcode_libdirs$hardcode_libdir_separator in + *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*) + ;; + *) + hardcode_libdirs="$hardcode_libdirs$hardcode_libdir_separator$libdir" + ;; + esac + fi + else + eval flag=\"$hardcode_libdir_flag_spec\" + rpath="$rpath $flag" + fi + elif test -n "$runpath_var"; then + case "$finalize_perm_rpath " in + *" $libdir "*) ;; + *) finalize_perm_rpath="$finalize_perm_rpath $libdir" ;; + esac + fi + done + # Substitute the hardcoded libdirs into the rpath. + if test -n "$hardcode_libdir_separator" && + test -n "$hardcode_libdirs"; then + libdir="$hardcode_libdirs" + eval rpath=\" $hardcode_libdir_flag_spec\" + fi + finalize_rpath="$rpath" + + if test -n "$libobjs" && test "$build_old_libs" = yes; then + # Transform all the library objects into standard objects. + compile_command=`$echo "X$compile_command" | $SP2NL | $Xsed -e "$lo2o" | $NL2SP` + finalize_command=`$echo "X$finalize_command" | $SP2NL | $Xsed -e "$lo2o" | $NL2SP` + fi + + dlsyms= + if test -n "$dlfiles$dlprefiles" || test "$dlself" != no; then + if test -n "$NM" && test -n "$global_symbol_pipe"; then + dlsyms="${outputname}S.c" + else + $echo "$modename: not configured to extract global symbols from dlpreopened files" 1>&2 + fi + fi + + if test -n "$dlsyms"; then + case $dlsyms in + "") ;; + *.c) + # Discover the nlist of each of the dlfiles. + nlist="$output_objdir/${outputname}.nm" + + $show "$rm $nlist ${nlist}S ${nlist}T" + $run $rm "$nlist" "${nlist}S" "${nlist}T" + + # Parse the name list into a source file. + $show "creating $output_objdir/$dlsyms" + + test -z "$run" && $echo > "$output_objdir/$dlsyms" "\ +/* $dlsyms - symbol resolution table for \`$outputname' dlsym emulation. */ +/* Generated by $PROGRAM - GNU $PACKAGE $VERSION$TIMESTAMP */ + +#ifdef __cplusplus +extern \"C\" { +#endif + +/* Prevent the only kind of declaration conflicts we can make. */ +#define lt_preloaded_symbols some_other_symbol + +/* External symbol declarations for the compiler. */\ +" + + if test "$dlself" = yes; then + $show "generating symbol list for \`$output'" + + test -z "$run" && $echo ': @PROGRAM@ ' > "$nlist" + + # Add our own program objects to the symbol list. + progfiles=`$echo "X$objs$old_deplibs" | $SP2NL | $Xsed -e "$lo2o" | $NL2SP` + for arg in $progfiles; do + $show "extracting global C symbols from \`$arg'" + $run eval "$NM $arg | $global_symbol_pipe >> '$nlist'" + done + + if test -n "$exclude_expsyms"; then + $run eval 'egrep -v " ($exclude_expsyms)$" "$nlist" > "$nlist"T' + $run eval '$mv "$nlist"T "$nlist"' + fi + + if test -n "$export_symbols_regex"; then + $run eval 'egrep -e "$export_symbols_regex" "$nlist" > "$nlist"T' + $run eval '$mv "$nlist"T "$nlist"' + fi + + # Prepare the list of exported symbols + if test -z "$export_symbols"; then + export_symbols="$output_objdir/$output.exp" + $run $rm $export_symbols + $run eval "sed -n -e '/^: @PROGRAM@$/d' -e 's/^.* \(.*\)$/\1/p' "'< "$nlist" > "$export_symbols"' + else + $run eval "sed -e 's/\([][.*^$]\)/\\\1/g' -e 's/^/ /' -e 's/$/$/'"' < "$export_symbols" > "$output_objdir/$output.exp"' + $run eval 'grep -f "$output_objdir/$output.exp" < "$nlist" > "$nlist"T' + $run eval 'mv "$nlist"T "$nlist"' + fi + fi + + for arg in $dlprefiles; do + $show "extracting global C symbols from \`$arg'" + name=`echo "$arg" | sed -e 's%^.*/%%'` + $run eval 'echo ": $name " >> "$nlist"' + $run eval "$NM $arg | $global_symbol_pipe >> '$nlist'" + done + + if test -z "$run"; then + # Make sure we have at least an empty file. + test -f "$nlist" || : > "$nlist" + + if test -n "$exclude_expsyms"; then + egrep -v " ($exclude_expsyms)$" "$nlist" > "$nlist"T + $mv "$nlist"T "$nlist" + fi + + # Try sorting and uniquifying the output. + if grep -v "^: " < "$nlist" | sort +2 | uniq > "$nlist"S; then + : + else + grep -v "^: " < "$nlist" > "$nlist"S + fi + + if test -f "$nlist"S; then + eval "$global_symbol_to_cdecl"' < "$nlist"S >> "$output_objdir/$dlsyms"' + else + echo '/* NONE */' >> "$output_objdir/$dlsyms" + fi + + $echo >> "$output_objdir/$dlsyms" "\ + +#undef lt_preloaded_symbols + +#if defined (__STDC__) && __STDC__ +# define lt_ptr void * +#else +# define lt_ptr char * +# define const +#endif + +/* The mapping between symbol names and symbols. */ +const struct { + const char *name; + lt_ptr address; +} +lt_preloaded_symbols[] = +{\ +" + + eval "$global_symbol_to_c_name_address" < "$nlist" >> "$output_objdir/$dlsyms" + + $echo >> "$output_objdir/$dlsyms" "\ + {0, (lt_ptr) 0} +}; + +/* This works around a problem in FreeBSD linker */ +#ifdef FREEBSD_WORKAROUND +static const void *lt_preloaded_setup() { + return lt_preloaded_symbols; +} +#endif + +#ifdef __cplusplus +} +#endif\ +" + fi + + pic_flag_for_symtable= + case $host in + # compiling the symbol table file with pic_flag works around + # a FreeBSD bug that causes programs to crash when -lm is + # linked before any other PIC object. But we must not use + # pic_flag when linking with -static. The problem exists in + # FreeBSD 2.2.6 and is fixed in FreeBSD 3.1. + *-*-freebsd2*|*-*-freebsd3.0*|*-*-freebsdelf3.0*) + case "$compile_command " in + *" -static "*) ;; + *) pic_flag_for_symtable=" $pic_flag -DPIC -DFREEBSD_WORKAROUND";; + esac;; + *-*-hpux*) + case "$compile_command " in + *" -static "*) ;; + *) pic_flag_for_symtable=" $pic_flag -DPIC";; + esac + esac + + # Now compile the dynamic symbol file. + $show "(cd $output_objdir && $CC -c$no_builtin_flag$pic_flag_for_symtable \"$dlsyms\")" + $run eval '(cd $output_objdir && $CC -c$no_builtin_flag$pic_flag_for_symtable "$dlsyms")' || exit $? + + # Clean up the generated files. + $show "$rm $output_objdir/$dlsyms $nlist ${nlist}S ${nlist}T" + $run $rm "$output_objdir/$dlsyms" "$nlist" "${nlist}S" "${nlist}T" + + # Transform the symbol file into the correct name. + compile_command=`$echo "X$compile_command" | $Xsed -e "s%@SYMFILE@%$output_objdir/${outputname}S.${objext}%"` + finalize_command=`$echo "X$finalize_command" | $Xsed -e "s%@SYMFILE@%$output_objdir/${outputname}S.${objext}%"` + ;; + *) + $echo "$modename: unknown suffix for \`$dlsyms'" 1>&2 + exit 1 + ;; + esac + else + # We keep going just in case the user didn't refer to + # lt_preloaded_symbols. The linker will fail if global_symbol_pipe + # really was required. + + # Nullify the symbol file. + compile_command=`$echo "X$compile_command" | $Xsed -e "s% @SYMFILE@%%"` + finalize_command=`$echo "X$finalize_command" | $Xsed -e "s% @SYMFILE@%%"` + fi + + if test $need_relink = no || test "$build_libtool_libs" != yes; then + # Replace the output file specification. + compile_command=`$echo "X$compile_command" | $Xsed -e 's%@OUTPUT@%'"$output"'%g'` + link_command="$compile_command$compile_rpath" + + # We have no uninstalled library dependencies, so finalize right now. + $show "$link_command" + $run eval "$link_command" + status=$? + + # Delete the generated files. + if test -n "$dlsyms"; then + $show "$rm $output_objdir/${outputname}S.${objext}" + $run $rm "$output_objdir/${outputname}S.${objext}" + fi + + exit $status + fi + + if test -n "$shlibpath_var"; then + # We should set the shlibpath_var + rpath= + for dir in $temp_rpath; do + case $dir in + [\\/]* | [A-Za-z]:[\\/]*) + # Absolute path. + rpath="$rpath$dir:" + ;; + *) + # Relative path: add a thisdir entry. + rpath="$rpath\$thisdir/$dir:" + ;; + esac + done + temp_rpath="$rpath" + fi + + if test -n "$compile_shlibpath$finalize_shlibpath"; then + compile_command="$shlibpath_var=\"$compile_shlibpath$finalize_shlibpath\$$shlibpath_var\" $compile_command" + fi + if test -n "$finalize_shlibpath"; then + finalize_command="$shlibpath_var=\"$finalize_shlibpath\$$shlibpath_var\" $finalize_command" + fi + + compile_var= + finalize_var= + if test -n "$runpath_var"; then + if test -n "$perm_rpath"; then + # We should set the runpath_var. + rpath= + for dir in $perm_rpath; do + rpath="$rpath$dir:" + done + compile_var="$runpath_var=\"$rpath\$$runpath_var\" " + fi + if test -n "$finalize_perm_rpath"; then + # We should set the runpath_var. + rpath= + for dir in $finalize_perm_rpath; do + rpath="$rpath$dir:" + done + finalize_var="$runpath_var=\"$rpath\$$runpath_var\" " + fi + fi + + if test "$no_install" = yes; then + # We don't need to create a wrapper script. + link_command="$compile_var$compile_command$compile_rpath" + # Replace the output file specification. + link_command=`$echo "X$link_command" | $Xsed -e 's%@OUTPUT@%'"$output"'%g'` + # Delete the old output file. + $run $rm $output + # Link the executable and exit + $show "$link_command" + $run eval "$link_command" || exit $? + exit 0 + fi + + if test "$hardcode_action" = relink; then + # Fast installation is not supported + link_command="$compile_var$compile_command$compile_rpath" + relink_command="$finalize_var$finalize_command$finalize_rpath" + + $echo "$modename: warning: this platform does not like uninstalled shared libraries" 1>&2 + $echo "$modename: \`$output' will be relinked during installation" 1>&2 + else + if test "$fast_install" != no; then + link_command="$finalize_var$compile_command$finalize_rpath" + if test "$fast_install" = yes; then + relink_command=`$echo "X$compile_var$compile_command$compile_rpath" | $Xsed -e 's%@OUTPUT@%\$progdir/\$file%g'` + else + # fast_install is set to needless + relink_command= + fi + else + link_command="$compile_var$compile_command$compile_rpath" + relink_command="$finalize_var$finalize_command$finalize_rpath" + fi + fi + + # Replace the output file specification. + link_command=`$echo "X$link_command" | $Xsed -e 's%@OUTPUT@%'"$output_objdir/$outputname"'%g'` + + # Delete the old output files. + $run $rm $output $output_objdir/$outputname $output_objdir/lt-$outputname + + $show "$link_command" + $run eval "$link_command" || exit $? + + # Now create the wrapper script. + $show "creating $output" + + # Quote the relink command for shipping. + if test -n "$relink_command"; then + # Preserve any variables that may affect compiler behavior + for var in $variables_saved_for_relink; do + if eval test -z \"\${$var+set}\"; then + relink_command="{ test -z \"\${$var+set}\" || unset $var || { $var=; export $var; }; }; $relink_command" + elif eval var_value=\$$var; test -z "$var_value"; then + relink_command="$var=; export $var; $relink_command" + else + var_value=`$echo "X$var_value" | $Xsed -e "$sed_quote_subst"` + relink_command="$var=\"$var_value\"; export $var; $relink_command" + fi + done + relink_command="(cd `pwd`; $relink_command)" + relink_command=`$echo "X$relink_command" | $Xsed -e "$sed_quote_subst"` + fi + + # Quote $echo for shipping. + if test "X$echo" = "X$SHELL $0 --fallback-echo"; then + case $0 in + [\\/]* | [A-Za-z]:[\\/]*) qecho="$SHELL $0 --fallback-echo";; + *) qecho="$SHELL `pwd`/$0 --fallback-echo";; + esac + qecho=`$echo "X$qecho" | $Xsed -e "$sed_quote_subst"` + else + qecho=`$echo "X$echo" | $Xsed -e "$sed_quote_subst"` + fi + + # Only actually do things if our run command is non-null. + if test -z "$run"; then + # win32 will think the script is a binary if it has + # a .exe suffix, so we strip it off here. + case $output in + *.exe) output=`echo $output|sed 's,.exe$,,'` ;; + esac + # test for cygwin because mv fails w/o .exe extensions + case $host in + *cygwin*) exeext=.exe ;; + *) exeext= ;; + esac + $rm $output + trap "$rm $output; exit 1" 1 2 15 + + $echo > $output "\ +#! $SHELL + +# $output - temporary wrapper script for $objdir/$outputname +# Generated by $PROGRAM - GNU $PACKAGE $VERSION$TIMESTAMP +# +# The $output program cannot be directly executed until all the libtool +# libraries that it depends on are installed. +# +# This wrapper script should never be moved out of the build directory. +# If it is, it will not operate correctly. + +# Sed substitution that helps us do robust quoting. It backslashifies +# metacharacters that are still active within double-quoted strings. +Xsed='sed -e 1s/^X//' +sed_quote_subst='$sed_quote_subst' + +# The HP-UX ksh and POSIX shell print the target directory to stdout +# if CDPATH is set. +if test \"\${CDPATH+set}\" = set; then CDPATH=:; export CDPATH; fi + +relink_command=\"$relink_command\" + +# This environment variable determines our operation mode. +if test \"\$libtool_install_magic\" = \"$magic\"; then + # install mode needs the following variable: + notinst_deplibs='$notinst_deplibs' +else + # When we are sourced in execute mode, \$file and \$echo are already set. + if test \"\$libtool_execute_magic\" != \"$magic\"; then + echo=\"$qecho\" + file=\"\$0\" + # Make sure echo works. + if test \"X\$1\" = X--no-reexec; then + # Discard the --no-reexec flag, and continue. + shift + elif test \"X\`(\$echo '\t') 2>/dev/null\`\" = 'X\t'; then + # Yippee, \$echo works! + : + else + # Restart under the correct shell, and then maybe \$echo will work. + exec $SHELL \"\$0\" --no-reexec \${1+\"\$@\"} + fi + fi\ +" + $echo >> $output "\ + + # Find the directory that this script lives in. + thisdir=\`\$echo \"X\$file\" | \$Xsed -e 's%/[^/]*$%%'\` + test \"x\$thisdir\" = \"x\$file\" && thisdir=. + + # Follow symbolic links until we get to the real thisdir. + file=\`ls -ld \"\$file\" | sed -n 's/.*-> //p'\` + while test -n \"\$file\"; do + destdir=\`\$echo \"X\$file\" | \$Xsed -e 's%/[^/]*\$%%'\` + + # If there was a directory component, then change thisdir. + if test \"x\$destdir\" != \"x\$file\"; then + case \"\$destdir\" in + [\\\\/]* | [A-Za-z]:[\\\\/]*) thisdir=\"\$destdir\" ;; + *) thisdir=\"\$thisdir/\$destdir\" ;; + esac + fi + + file=\`\$echo \"X\$file\" | \$Xsed -e 's%^.*/%%'\` + file=\`ls -ld \"\$thisdir/\$file\" | sed -n 's/.*-> //p'\` + done + + # Try to get the absolute directory name. + absdir=\`cd \"\$thisdir\" && pwd\` + test -n \"\$absdir\" && thisdir=\"\$absdir\" +" + + if test "$fast_install" = yes; then + echo >> $output "\ + program=lt-'$outputname'$exeext + progdir=\"\$thisdir/$objdir\" + + if test ! -f \"\$progdir/\$program\" || \\ + { file=\`ls -1dt \"\$progdir/\$program\" \"\$progdir/../\$program\" 2>/dev/null | sed 1q\`; \\ + test \"X\$file\" != \"X\$progdir/\$program\"; }; then + + file=\"\$\$-\$program\" + + if test ! -d \"\$progdir\"; then + $mkdir \"\$progdir\" + else + $rm \"\$progdir/\$file\" + fi" + + echo >> $output "\ + + # relink executable if necessary + if test -n \"\$relink_command\"; then + if relink_command_output=\`eval \$relink_command 2>&1\`; then : + else + $echo \"\$relink_command_output\" >&2 + $rm \"\$progdir/\$file\" + exit 1 + fi + fi + + $mv \"\$progdir/\$file\" \"\$progdir/\$program\" 2>/dev/null || + { $rm \"\$progdir/\$program\"; + $mv \"\$progdir/\$file\" \"\$progdir/\$program\"; } + $rm \"\$progdir/\$file\" + fi" + else + echo >> $output "\ + program='$outputname' + progdir=\"\$thisdir/$objdir\" +" + fi + + echo >> $output "\ + + if test -f \"\$progdir/\$program\"; then" + + # Export our shlibpath_var if we have one. + if test "$shlibpath_overrides_runpath" = yes && test -n "$shlibpath_var" && test -n "$temp_rpath"; then + $echo >> $output "\ + # Add our own library path to $shlibpath_var + $shlibpath_var=\"$temp_rpath\$$shlibpath_var\" + + # Some systems cannot cope with colon-terminated $shlibpath_var + # The second colon is a workaround for a bug in BeOS R4 sed + $shlibpath_var=\`\$echo \"X\$$shlibpath_var\" | \$Xsed -e 's/::*\$//'\` + + export $shlibpath_var +" + fi + + # fixup the dll searchpath if we need to. + if test -n "$dllsearchpath"; then + $echo >> $output "\ + # Add the dll search path components to the executable PATH + PATH=$dllsearchpath:\$PATH +" + fi + + $echo >> $output "\ + if test \"\$libtool_execute_magic\" != \"$magic\"; then + # Run the actual program with our arguments. +" + case $host in + # win32 systems need to use the prog path for dll + # lookup to work + *-*-cygwin* | *-*-pw32*) + $echo >> $output "\ + exec \$progdir/\$program \${1+\"\$@\"} +" + ;; + + # Backslashes separate directories on plain windows + *-*-mingw | *-*-os2*) + $echo >> $output "\ + exec \$progdir\\\\\$program \${1+\"\$@\"} +" + ;; + + *) + $echo >> $output "\ + # Export the path to the program. + PATH=\"\$progdir:\$PATH\" + export PATH + + exec \$program \${1+\"\$@\"} +" + ;; + esac + $echo >> $output "\ + \$echo \"\$0: cannot exec \$program \${1+\"\$@\"}\" + exit 1 + fi + else + # The program doesn't exist. + \$echo \"\$0: error: \$progdir/\$program does not exist\" 1>&2 + \$echo \"This script is just a wrapper for \$program.\" 1>&2 + echo \"See the $PACKAGE documentation for more information.\" 1>&2 + exit 1 + fi +fi\ +" + chmod +x $output + fi + exit 0 + ;; + esac + + # See if we need to build an old-fashioned archive. + for oldlib in $oldlibs; do + + if test "$build_libtool_libs" = convenience; then + oldobjs="$libobjs_save" + addlibs="$convenience" + build_libtool_libs=no + else + if test "$build_libtool_libs" = module; then + oldobjs="$libobjs_save" + build_libtool_libs=no + else + oldobjs="$objs$old_deplibs "`$echo "X$libobjs_save" | $SP2NL | $Xsed -e '/\.'${libext}'$/d' -e '/\.lib$/d' -e "$lo2o" | $NL2SP` + fi + addlibs="$old_convenience" + fi + + if test -n "$addlibs"; then + gentop="$output_objdir/${outputname}x" + $show "${rm}r $gentop" + $run ${rm}r "$gentop" + $show "mkdir $gentop" + $run mkdir "$gentop" + status=$? + if test $status -ne 0 && test ! -d "$gentop"; then + exit $status + fi + generated="$generated $gentop" + + # Add in members from convenience archives. + for xlib in $addlibs; do + # Extract the objects. + case $xlib in + [\\/]* | [A-Za-z]:[\\/]*) xabs="$xlib" ;; + *) xabs=`pwd`"/$xlib" ;; + esac + xlib=`$echo "X$xlib" | $Xsed -e 's%^.*/%%'` + xdir="$gentop/$xlib" + + $show "${rm}r $xdir" + $run ${rm}r "$xdir" + $show "mkdir $xdir" + $run mkdir "$xdir" + status=$? + if test $status -ne 0 && test ! -d "$xdir"; then + exit $status + fi + $show "(cd $xdir && $AR x $xabs)" + $run eval "(cd \$xdir && $AR x \$xabs)" || exit $? + + oldobjs="$oldobjs "`find $xdir -name \*.${objext} -print -o -name \*.lo -print | $NL2SP` + done + fi + + # Do each command in the archive commands. + if test -n "$old_archive_from_new_cmds" && test "$build_libtool_libs" = yes; then + eval cmds=\"$old_archive_from_new_cmds\" + else + # Ensure that we have .o objects in place in case we decided + # not to build a shared library, and have fallen back to building + # static libs even though --disable-static was passed! + for oldobj in $oldobjs; do + if test ! -f $oldobj; then + xdir=`$echo "X$oldobj" | $Xsed -e 's%/[^/]*$%%'` + if test "X$xdir" = "X$oldobj"; then + xdir="." + else + xdir="$xdir" + fi + baseobj=`$echo "X$oldobj" | $Xsed -e 's%^.*/%%'` + obj=`$echo "X$baseobj" | $Xsed -e "$o2lo"` + $show "(cd $xdir && ${LN_S} $obj $baseobj)" + $run eval '(cd $xdir && ${LN_S} $obj $baseobj)' || exit $? + fi + done + + eval cmds=\"$old_archive_cmds\" + fi + save_ifs="$IFS"; IFS='~' + for cmd in $cmds; do + IFS="$save_ifs" + $show "$cmd" + $run eval "$cmd" || exit $? + done + IFS="$save_ifs" + done + + if test -n "$generated"; then + $show "${rm}r$generated" + $run ${rm}r$generated + fi + + # Now create the libtool archive. + case $output in + *.la) + old_library= + test "$build_old_libs" = yes && old_library="$libname.$libext" + $show "creating $output" + + # Preserve any variables that may affect compiler behavior + for var in $variables_saved_for_relink; do + if eval test -z \"\${$var+set}\"; then + relink_command="{ test -z \"\${$var+set}\" || unset $var || { $var=; export $var; }; }; $relink_command" + elif eval var_value=\$$var; test -z "$var_value"; then + relink_command="$var=; export $var; $relink_command" + else + var_value=`$echo "X$var_value" | $Xsed -e "$sed_quote_subst"` + relink_command="$var=\"$var_value\"; export $var; $relink_command" + fi + done + # Quote the link command for shipping. + relink_command="(cd `pwd`; $SHELL $0 --mode=relink $libtool_args)" + relink_command=`$echo "X$relink_command" | $Xsed -e "$sed_quote_subst"` + + # Only create the output if not a dry run. + if test -z "$run"; then + for installed in no yes; do + if test "$installed" = yes; then + if test -z "$install_libdir"; then + break + fi + output="$output_objdir/$outputname"i + # Replace all uninstalled libtool libraries with the installed ones + newdependency_libs= + for deplib in $dependency_libs; do + case $deplib in + *.la) + name=`$echo "X$deplib" | $Xsed -e 's%^.*/%%'` + eval libdir=`sed -n -e 's/^libdir=\(.*\)$/\1/p' $deplib` + if test -z "$libdir"; then + $echo "$modename: \`$deplib' is not a valid libtool archive" 1>&2 + exit 1 + fi + newdependency_libs="$newdependency_libs $libdir/$name" + ;; + *) newdependency_libs="$newdependency_libs $deplib" ;; + esac + done + dependency_libs="$newdependency_libs" + newdlfiles= + for lib in $dlfiles; do + name=`$echo "X$lib" | $Xsed -e 's%^.*/%%'` + eval libdir=`sed -n -e 's/^libdir=\(.*\)$/\1/p' $lib` + if test -z "$libdir"; then + $echo "$modename: \`$lib' is not a valid libtool archive" 1>&2 + exit 1 + fi + newdlfiles="$newdlfiles $libdir/$name" + done + dlfiles="$newdlfiles" + newdlprefiles= + for lib in $dlprefiles; do + name=`$echo "X$lib" | $Xsed -e 's%^.*/%%'` + eval libdir=`sed -n -e 's/^libdir=\(.*\)$/\1/p' $lib` + if test -z "$libdir"; then + $echo "$modename: \`$lib' is not a valid libtool archive" 1>&2 + exit 1 + fi + newdlprefiles="$newdlprefiles $libdir/$name" + done + dlprefiles="$newdlprefiles" + fi + $rm $output + # place dlname in correct position for cygwin + tdlname=$dlname + case $host,$output,$installed,$module,$dlname in + *cygwin*,*lai,yes,no,*.dll) tdlname=../bin/$dlname ;; + esac + $echo > $output "\ +# $outputname - a libtool library file +# Generated by $PROGRAM - GNU $PACKAGE $VERSION$TIMESTAMP +# +# Please DO NOT delete this file! +# It is necessary for linking the library. + +# The name that we can dlopen(3). +dlname='$tdlname' + +# Names of this library. +library_names='$library_names' + +# The name of the static archive. +old_library='$old_library' + +# Libraries that this one depends upon. +dependency_libs='$dependency_libs' + +# Version information for $libname. +current=$current +age=$age +revision=$revision + +# Is this an already installed library? +installed=$installed + +# Files to dlopen/dlpreopen +dlopen='$dlfiles' +dlpreopen='$dlprefiles' + +# Directory that this library needs to be installed in: +libdir='$install_libdir'" + if test "$installed" = no && test $need_relink = yes; then + $echo >> $output "\ +relink_command=\"$relink_command\"" + fi + done + fi + + # Do a symbolic link so that the libtool archive can be found in + # LD_LIBRARY_PATH before the program is installed. + $show "(cd $output_objdir && $rm $outputname && $LN_S ../$outputname $outputname)" + $run eval '(cd $output_objdir && $rm $outputname && $LN_S ../$outputname $outputname)' || exit $? + ;; + esac + exit 0 + ;; + + # libtool install mode + install) + modename="$modename: install" + + # There may be an optional sh(1) argument at the beginning of + # install_prog (especially on Windows NT). + if test "$nonopt" = "$SHELL" || test "$nonopt" = /bin/sh || + # Allow the use of GNU shtool's install command. + $echo "X$nonopt" | $Xsed | grep shtool > /dev/null; then + # Aesthetically quote it. + arg=`$echo "X$nonopt" | $Xsed -e "$sed_quote_subst"` + case $arg in + *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*) + arg="\"$arg\"" + ;; + esac + install_prog="$arg " + arg="$1" + shift + else + install_prog= + arg="$nonopt" + fi + + # The real first argument should be the name of the installation program. + # Aesthetically quote it. + arg=`$echo "X$arg" | $Xsed -e "$sed_quote_subst"` + case $arg in + *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*) + arg="\"$arg\"" + ;; + esac + install_prog="$install_prog$arg" + + # We need to accept at least all the BSD install flags. + dest= + files= + opts= + prev= + install_type= + isdir=no + stripme= + for arg + do + if test -n "$dest"; then + files="$files $dest" + dest="$arg" + continue + fi + + case $arg in + -d) isdir=yes ;; + -f) prev="-f" ;; + -g) prev="-g" ;; + -m) prev="-m" ;; + -o) prev="-o" ;; + -s) + stripme=" -s" + continue + ;; + -*) ;; + + *) + # If the previous option needed an argument, then skip it. + if test -n "$prev"; then + prev= + else + dest="$arg" + continue + fi + ;; + esac + + # Aesthetically quote the argument. + arg=`$echo "X$arg" | $Xsed -e "$sed_quote_subst"` + case $arg in + *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*) + arg="\"$arg\"" + ;; + esac + install_prog="$install_prog $arg" + done + + if test -z "$install_prog"; then + $echo "$modename: you must specify an install program" 1>&2 + $echo "$help" 1>&2 + exit 1 + fi + + if test -n "$prev"; then + $echo "$modename: the \`$prev' option requires an argument" 1>&2 + $echo "$help" 1>&2 + exit 1 + fi + + if test -z "$files"; then + if test -z "$dest"; then + $echo "$modename: no file or destination specified" 1>&2 + else + $echo "$modename: you must specify a destination" 1>&2 + fi + $echo "$help" 1>&2 + exit 1 + fi + + # Strip any trailing slash from the destination. + dest=`$echo "X$dest" | $Xsed -e 's%/$%%'` + + # Check to see that the destination is a directory. + test -d "$dest" && isdir=yes + if test "$isdir" = yes; then + destdir="$dest" + destname= + else + destdir=`$echo "X$dest" | $Xsed -e 's%/[^/]*$%%'` + test "X$destdir" = "X$dest" && destdir=. + destname=`$echo "X$dest" | $Xsed -e 's%^.*/%%'` + + # Not a directory, so check to see that there is only one file specified. + set dummy $files + if test $# -gt 2; then + $echo "$modename: \`$dest' is not a directory" 1>&2 + $echo "$help" 1>&2 + exit 1 + fi + fi + case $destdir in + [\\/]* | [A-Za-z]:[\\/]*) ;; + *) + for file in $files; do + case $file in + *.lo) ;; + *) + $echo "$modename: \`$destdir' must be an absolute directory name" 1>&2 + $echo "$help" 1>&2 + exit 1 + ;; + esac + done + ;; + esac + + # This variable tells wrapper scripts just to set variables rather + # than running their programs. + libtool_install_magic="$magic" + + staticlibs= + future_libdirs= + current_libdirs= + for file in $files; do + + # Do each installation. + case $file in + *.$libext) + # Do the static libraries later. + staticlibs="$staticlibs $file" + ;; + + *.la) + # Check to see that this really is a libtool archive. + if (sed -e '2q' $file | egrep "^# Generated by .*$PACKAGE") >/dev/null 2>&1; then : + else + $echo "$modename: \`$file' is not a valid libtool archive" 1>&2 + $echo "$help" 1>&2 + exit 1 + fi + + library_names= + old_library= + relink_command= + # If there is no directory component, then add one. + case $file in + */* | *\\*) . $file ;; + *) . ./$file ;; + esac + + # Add the libdir to current_libdirs if it is the destination. + if test "X$destdir" = "X$libdir"; then + case "$current_libdirs " in + *" $libdir "*) ;; + *) current_libdirs="$current_libdirs $libdir" ;; + esac + else + # Note the libdir as a future libdir. + case "$future_libdirs " in + *" $libdir "*) ;; + *) future_libdirs="$future_libdirs $libdir" ;; + esac + fi + + dir=`$echo "X$file" | $Xsed -e 's%/[^/]*$%%'`/ + test "X$dir" = "X$file/" && dir= + dir="$dir$objdir" + + if test -n "$relink_command"; then + $echo "$modename: warning: relinking \`$file'" 1>&2 + $show "$relink_command" + if $run eval "$relink_command"; then : + else + $echo "$modename: error: relink \`$file' with the above command before installing it" 1>&2 + continue + fi + fi + + # See the names of the shared library. + set dummy $library_names + if test -n "$2"; then + realname="$2" + shift + shift + + srcname="$realname" + test -n "$relink_command" && srcname="$realname"T + + # Install the shared library and build the symlinks. + $show "$install_prog $dir/$srcname $destdir/$realname" + $run eval "$install_prog $dir/$srcname $destdir/$realname" || exit $? + if test -n "$stripme" && test -n "$striplib"; then + $show "$striplib $destdir/$realname" + $run eval "$striplib $destdir/$realname" || exit $? + fi + + if test $# -gt 0; then + # Delete the old symlinks, and create new ones. + for linkname + do + if test "$linkname" != "$realname"; then + $show "(cd $destdir && $rm $linkname && $LN_S $realname $linkname)" + $run eval "(cd $destdir && $rm $linkname && $LN_S $realname $linkname)" + fi + done + fi + + # Do each command in the postinstall commands. + lib="$destdir/$realname" + eval cmds=\"$postinstall_cmds\" + save_ifs="$IFS"; IFS='~' + for cmd in $cmds; do + IFS="$save_ifs" + $show "$cmd" + $run eval "$cmd" || exit $? + done + IFS="$save_ifs" + fi + + # Install the pseudo-library for information purposes. + name=`$echo "X$file" | $Xsed -e 's%^.*/%%'` + instname="$dir/$name"i + $show "$install_prog $instname $destdir/$name" + $run eval "$install_prog $instname $destdir/$name" || exit $? + + # Maybe install the static library, too. + test -n "$old_library" && staticlibs="$staticlibs $dir/$old_library" + ;; + + *.lo) + # Install (i.e. copy) a libtool object. + + # Figure out destination file name, if it wasn't already specified. + if test -n "$destname"; then + destfile="$destdir/$destname" + else + destfile=`$echo "X$file" | $Xsed -e 's%^.*/%%'` + destfile="$destdir/$destfile" + fi + + # Deduce the name of the destination old-style object file. + case $destfile in + *.lo) + staticdest=`$echo "X$destfile" | $Xsed -e "$lo2o"` + ;; + *.$objext) + staticdest="$destfile" + destfile= + ;; + *) + $echo "$modename: cannot copy a libtool object to \`$destfile'" 1>&2 + $echo "$help" 1>&2 + exit 1 + ;; + esac + + # Install the libtool object if requested. + if test -n "$destfile"; then + $show "$install_prog $file $destfile" + $run eval "$install_prog $file $destfile" || exit $? + fi + + # Install the old object if enabled. + if test "$build_old_libs" = yes; then + # Deduce the name of the old-style object file. + staticobj=`$echo "X$file" | $Xsed -e "$lo2o"` + + $show "$install_prog $staticobj $staticdest" + $run eval "$install_prog \$staticobj \$staticdest" || exit $? + fi + exit 0 + ;; + + *) + # Figure out destination file name, if it wasn't already specified. + if test -n "$destname"; then + destfile="$destdir/$destname" + else + destfile=`$echo "X$file" | $Xsed -e 's%^.*/%%'` + destfile="$destdir/$destfile" + fi + + # Do a test to see if this is really a libtool program. + case $host in + *cygwin*|*mingw*) + wrapper=`echo $file | sed -e 's,.exe$,,'` + ;; + *) + wrapper=$file + ;; + esac + if (sed -e '4q' $wrapper | egrep "^# Generated by .*$PACKAGE")>/dev/null 2>&1; then + notinst_deplibs= + relink_command= + + # If there is no directory component, then add one. + case $file in + */* | *\\*) . $wrapper ;; + *) . ./$wrapper ;; + esac + + # Check the variables that should have been set. + if test -z "$notinst_deplibs"; then + $echo "$modename: invalid libtool wrapper script \`$wrapper'" 1>&2 + exit 1 + fi + + finalize=yes + for lib in $notinst_deplibs; do + # Check to see that each library is installed. + libdir= + if test -f "$lib"; then + # If there is no directory component, then add one. + case $lib in + */* | *\\*) . $lib ;; + *) . ./$lib ;; + esac + fi + libfile="$libdir/"`$echo "X$lib" | $Xsed -e 's%^.*/%%g'` ### testsuite: skip nested quoting test + if test -n "$libdir" && test ! -f "$libfile"; then + $echo "$modename: warning: \`$lib' has not been installed in \`$libdir'" 1>&2 + finalize=no + fi + done + + relink_command= + # If there is no directory component, then add one. + case $file in + */* | *\\*) . $wrapper ;; + *) . ./$wrapper ;; + esac + + outputname= + if test "$fast_install" = no && test -n "$relink_command"; then + if test "$finalize" = yes && test -z "$run"; then + tmpdir="/tmp" + test -n "$TMPDIR" && tmpdir="$TMPDIR" + tmpdir="$tmpdir/libtool-$$" + if $mkdir -p "$tmpdir" && chmod 700 "$tmpdir"; then : + else + $echo "$modename: error: cannot create temporary directory \`$tmpdir'" 1>&2 + continue + fi + file=`$echo "X$file" | $Xsed -e 's%^.*/%%'` + outputname="$tmpdir/$file" + # Replace the output file specification. + relink_command=`$echo "X$relink_command" | $Xsed -e 's%@OUTPUT@%'"$outputname"'%g'` + + $show "$relink_command" + if $run eval "$relink_command"; then : + else + $echo "$modename: error: relink \`$file' with the above command before installing it" 1>&2 + ${rm}r "$tmpdir" + continue + fi + file="$outputname" + else + $echo "$modename: warning: cannot relink \`$file'" 1>&2 + fi + else + # Install the binary that we compiled earlier. + file=`$echo "X$file" | $Xsed -e "s%\([^/]*\)$%$objdir/\1%"` + fi + fi + + # remove .exe since cygwin /usr/bin/install will append another + # one anyways + case $install_prog,$host in + /usr/bin/install*,*cygwin*) + case $file:$destfile in + *.exe:*.exe) + # this is ok + ;; + *.exe:*) + destfile=$destfile.exe + ;; + *:*.exe) + destfile=`echo $destfile | sed -e 's,.exe$,,'` + ;; + esac + ;; + esac + $show "$install_prog$stripme $file $destfile" + $run eval "$install_prog\$stripme \$file \$destfile" || exit $? + test -n "$outputname" && ${rm}r "$tmpdir" + ;; + esac + done + + for file in $staticlibs; do + name=`$echo "X$file" | $Xsed -e 's%^.*/%%'` + + # Set up the ranlib parameters. + oldlib="$destdir/$name" + + $show "$install_prog $file $oldlib" + $run eval "$install_prog \$file \$oldlib" || exit $? + + if test -n "$stripme" && test -n "$striplib"; then + $show "$old_striplib $oldlib" + $run eval "$old_striplib $oldlib" || exit $? + fi + + # Do each command in the postinstall commands. + eval cmds=\"$old_postinstall_cmds\" + save_ifs="$IFS"; IFS='~' + for cmd in $cmds; do + IFS="$save_ifs" + $show "$cmd" + $run eval "$cmd" || exit $? + done + IFS="$save_ifs" + done + + if test -n "$future_libdirs"; then + $echo "$modename: warning: remember to run \`$progname --finish$future_libdirs'" 1>&2 + fi + + if test -n "$current_libdirs"; then + # Maybe just do a dry run. + test -n "$run" && current_libdirs=" -n$current_libdirs" + exec_cmd='$SHELL $0 --finish$current_libdirs' + else + exit 0 + fi + ;; + + # libtool finish mode + finish) + modename="$modename: finish" + libdirs="$nonopt" + admincmds= + + if test -n "$finish_cmds$finish_eval" && test -n "$libdirs"; then + for dir + do + libdirs="$libdirs $dir" + done + + for libdir in $libdirs; do + if test -n "$finish_cmds"; then + # Do each command in the finish commands. + eval cmds=\"$finish_cmds\" + save_ifs="$IFS"; IFS='~' + for cmd in $cmds; do + IFS="$save_ifs" + $show "$cmd" + $run eval "$cmd" || admincmds="$admincmds + $cmd" + done + IFS="$save_ifs" + fi + if test -n "$finish_eval"; then + # Do the single finish_eval. + eval cmds=\"$finish_eval\" + $run eval "$cmds" || admincmds="$admincmds + $cmds" + fi + done + fi + + # Exit here if they wanted silent mode. + test "$show" = ":" && exit 0 + + echo "----------------------------------------------------------------------" + echo "Libraries have been installed in:" + for libdir in $libdirs; do + echo " $libdir" + done + echo + echo "If you ever happen to want to link against installed libraries" + echo "in a given directory, LIBDIR, you must either use libtool, and" + echo "specify the full pathname of the library, or use the \`-LLIBDIR'" + echo "flag during linking and do at least one of the following:" + if test -n "$shlibpath_var"; then + echo " - add LIBDIR to the \`$shlibpath_var' environment variable" + echo " during execution" + fi + if test -n "$runpath_var"; then + echo " - add LIBDIR to the \`$runpath_var' environment variable" + echo " during linking" + fi + if test -n "$hardcode_libdir_flag_spec"; then + libdir=LIBDIR + eval flag=\"$hardcode_libdir_flag_spec\" + + echo " - use the \`$flag' linker flag" + fi + if test -n "$admincmds"; then + echo " - have your system administrator run these commands:$admincmds" + fi + if test -f /etc/ld.so.conf; then + echo " - have your system administrator add LIBDIR to \`/etc/ld.so.conf'" + fi + echo + echo "See any operating system documentation about shared libraries for" + echo "more information, such as the ld(1) and ld.so(8) manual pages." + echo "----------------------------------------------------------------------" + exit 0 + ;; + + # libtool execute mode + execute) + modename="$modename: execute" + + # The first argument is the command name. + cmd="$nonopt" + if test -z "$cmd"; then + $echo "$modename: you must specify a COMMAND" 1>&2 + $echo "$help" + exit 1 + fi + + # Handle -dlopen flags immediately. + for file in $execute_dlfiles; do + if test ! -f "$file"; then + $echo "$modename: \`$file' is not a file" 1>&2 + $echo "$help" 1>&2 + exit 1 + fi + + dir= + case $file in + *.la) + # Check to see that this really is a libtool archive. + if (sed -e '2q' $file | egrep "^# Generated by .*$PACKAGE") >/dev/null 2>&1; then : + else + $echo "$modename: \`$lib' is not a valid libtool archive" 1>&2 + $echo "$help" 1>&2 + exit 1 + fi + + # Read the libtool library. + dlname= + library_names= + + # If there is no directory component, then add one. + case $file in + */* | *\\*) . $file ;; + *) . ./$file ;; + esac + + # Skip this library if it cannot be dlopened. + if test -z "$dlname"; then + # Warn if it was a shared library. + test -n "$library_names" && $echo "$modename: warning: \`$file' was not linked with \`-export-dynamic'" + continue + fi + + dir=`$echo "X$file" | $Xsed -e 's%/[^/]*$%%'` + test "X$dir" = "X$file" && dir=. + + if test -f "$dir/$objdir/$dlname"; then + dir="$dir/$objdir" + else + $echo "$modename: cannot find \`$dlname' in \`$dir' or \`$dir/$objdir'" 1>&2 + exit 1 + fi + ;; + + *.lo) + # Just add the directory containing the .lo file. + dir=`$echo "X$file" | $Xsed -e 's%/[^/]*$%%'` + test "X$dir" = "X$file" && dir=. + ;; + + *) + $echo "$modename: warning \`-dlopen' is ignored for non-libtool libraries and objects" 1>&2 + continue + ;; + esac + + # Get the absolute pathname. + absdir=`cd "$dir" && pwd` + test -n "$absdir" && dir="$absdir" + + # Now add the directory to shlibpath_var. + if eval "test -z \"\$$shlibpath_var\""; then + eval "$shlibpath_var=\"\$dir\"" + else + eval "$shlibpath_var=\"\$dir:\$$shlibpath_var\"" + fi + done + + # This variable tells wrapper scripts just to set shlibpath_var + # rather than running their programs. + libtool_execute_magic="$magic" + + # Check if any of the arguments is a wrapper script. + args= + for file + do + case $file in + -*) ;; + *) + # Do a test to see if this is really a libtool program. + if (sed -e '4q' $file | egrep "^# Generated by .*$PACKAGE") >/dev/null 2>&1; then + # If there is no directory component, then add one. + case $file in + */* | *\\*) . $file ;; + *) . ./$file ;; + esac + + # Transform arg to wrapped name. + file="$progdir/$program" + fi + ;; + esac + # Quote arguments (to preserve shell metacharacters). + file=`$echo "X$file" | $Xsed -e "$sed_quote_subst"` + args="$args \"$file\"" + done + + if test -z "$run"; then + if test -n "$shlibpath_var"; then + # Export the shlibpath_var. + eval "export $shlibpath_var" + fi + + # Restore saved enviroment variables + if test "${save_LC_ALL+set}" = set; then + LC_ALL="$save_LC_ALL"; export LC_ALL + fi + if test "${save_LANG+set}" = set; then + LANG="$save_LANG"; export LANG + fi + + # Now prepare to actually exec the command. + exec_cmd="\$cmd$args" + else + # Display what would be done. + if test -n "$shlibpath_var"; then + eval "\$echo \"\$shlibpath_var=\$$shlibpath_var\"" + $echo "export $shlibpath_var" + fi + $echo "$cmd$args" + exit 0 + fi + ;; + + # libtool clean and uninstall mode + clean | uninstall) + modename="$modename: $mode" + rm="$nonopt" + files= + rmforce= + exit_status=0 + + # This variable tells wrapper scripts just to set variables rather + # than running their programs. + libtool_install_magic="$magic" + + for arg + do + case $arg in + -f) rm="$rm $arg"; rmforce=yes ;; + -*) rm="$rm $arg" ;; + *) files="$files $arg" ;; + esac + done + + if test -z "$rm"; then + $echo "$modename: you must specify an RM program" 1>&2 + $echo "$help" 1>&2 + exit 1 + fi + + rmdirs= + + for file in $files; do + dir=`$echo "X$file" | $Xsed -e 's%/[^/]*$%%'` + if test "X$dir" = "X$file"; then + dir=. + objdir="$objdir" + else + objdir="$dir/$objdir" + fi + name=`$echo "X$file" | $Xsed -e 's%^.*/%%'` + test $mode = uninstall && objdir="$dir" + + # Remember objdir for removal later, being careful to avoid duplicates + if test $mode = clean; then + case " $rmdirs " in + *" $objdir "*) ;; + *) rmdirs="$rmdirs $objdir" ;; + esac + fi + + # Don't error if the file doesn't exist and rm -f was used. + if (test -L "$file") >/dev/null 2>&1 \ + || (test -h "$file") >/dev/null 2>&1 \ + || test -f "$file"; then + : + elif test -d "$file"; then + exit_status=1 + continue + elif test "$rmforce" = yes; then + continue + fi + + rmfiles="$file" + + case $name in + *.la) + # Possibly a libtool archive, so verify it. + if (sed -e '2q' $file | egrep "^# Generated by .*$PACKAGE") >/dev/null 2>&1; then + . $dir/$name + + # Delete the libtool libraries and symlinks. + for n in $library_names; do + rmfiles="$rmfiles $objdir/$n" + done + test -n "$old_library" && rmfiles="$rmfiles $objdir/$old_library" + test $mode = clean && rmfiles="$rmfiles $objdir/$name $objdir/${name}i" + + if test $mode = uninstall; then + if test -n "$library_names"; then + # Do each command in the postuninstall commands. + eval cmds=\"$postuninstall_cmds\" + save_ifs="$IFS"; IFS='~' + for cmd in $cmds; do + IFS="$save_ifs" + $show "$cmd" + $run eval "$cmd" + if test $? != 0 && test "$rmforce" != yes; then + exit_status=1 + fi + done + IFS="$save_ifs" + fi + + if test -n "$old_library"; then + # Do each command in the old_postuninstall commands. + eval cmds=\"$old_postuninstall_cmds\" + save_ifs="$IFS"; IFS='~' + for cmd in $cmds; do + IFS="$save_ifs" + $show "$cmd" + $run eval "$cmd" + if test $? != 0 && test "$rmforce" != yes; then + exit_status=1 + fi + done + IFS="$save_ifs" + fi + # FIXME: should reinstall the best remaining shared library. + fi + fi + ;; + + *.lo) + if test "$build_old_libs" = yes; then + oldobj=`$echo "X$name" | $Xsed -e "$lo2o"` + rmfiles="$rmfiles $dir/$oldobj" + fi + ;; + + *) + # Do a test to see if this is a libtool program. + if test $mode = clean && + (sed -e '4q' $file | egrep "^# Generated by .*$PACKAGE") >/dev/null 2>&1; then + relink_command= + . $dir/$file + + rmfiles="$rmfiles $objdir/$name $objdir/${name}S.${objext}" + if test "$fast_install" = yes && test -n "$relink_command"; then + rmfiles="$rmfiles $objdir/lt-$name" + fi + fi + ;; + esac + $show "$rm $rmfiles" + $run $rm $rmfiles || exit_status=1 + done + + # Try to remove the ${objdir}s in the directories where we deleted files + for dir in $rmdirs; do + if test -d "$dir"; then + $show "rmdir $dir" + $run rmdir $dir >/dev/null 2>&1 + fi + done + + exit $exit_status + ;; + + "") + $echo "$modename: you must specify a MODE" 1>&2 + $echo "$generic_help" 1>&2 + exit 1 + ;; + esac + + if test -z "$exec_cmd"; then + $echo "$modename: invalid operation mode \`$mode'" 1>&2 + $echo "$generic_help" 1>&2 + exit 1 + fi +fi # test -z "$show_help" + +if test -n "$exec_cmd"; then + eval exec $exec_cmd + exit 1 +fi + +# We need to display help for each of the modes. +case $mode in +"") $echo \ +"Usage: $modename [OPTION]... [MODE-ARG]... + +Provide generalized library-building support services. + + --config show all configuration variables + --debug enable verbose shell tracing +-n, --dry-run display commands without modifying any files + --features display basic configuration information and exit + --finish same as \`--mode=finish' + --help display this help message and exit + --mode=MODE use operation mode MODE [default=inferred from MODE-ARGS] + --quiet same as \`--silent' + --silent don't print informational messages + --version print version information + +MODE must be one of the following: + + clean remove files from the build directory + compile compile a source file into a libtool object + execute automatically set library path, then run a program + finish complete the installation of libtool libraries + install install libraries or executables + link create a library or an executable + uninstall remove libraries from an installed directory + +MODE-ARGS vary depending on the MODE. Try \`$modename --help --mode=MODE' for +a more detailed description of MODE." + exit 0 + ;; + +clean) + $echo \ +"Usage: $modename [OPTION]... --mode=clean RM [RM-OPTION]... FILE... + +Remove files from the build directory. + +RM is the name of the program to use to delete files associated with each FILE +(typically \`/bin/rm'). RM-OPTIONS are options (such as \`-f') to be passed +to RM. + +If FILE is a libtool library, object or program, all the files associated +with it are deleted. Otherwise, only FILE itself is deleted using RM." + ;; + +compile) + $echo \ +"Usage: $modename [OPTION]... --mode=compile COMPILE-COMMAND... SOURCEFILE + +Compile a source file into a libtool library object. + +This mode accepts the following additional options: + + -o OUTPUT-FILE set the output file name to OUTPUT-FILE + -prefer-pic try to building PIC objects only + -prefer-non-pic try to building non-PIC objects only + -static always build a \`.o' file suitable for static linking + +COMPILE-COMMAND is a command to be used in creating a \`standard' object file +from the given SOURCEFILE. + +The output file name is determined by removing the directory component from +SOURCEFILE, then substituting the C source code suffix \`.c' with the +library object suffix, \`.lo'." + ;; + +execute) + $echo \ +"Usage: $modename [OPTION]... --mode=execute COMMAND [ARGS]... + +Automatically set library path, then run a program. + +This mode accepts the following additional options: + + -dlopen FILE add the directory containing FILE to the library path + +This mode sets the library path environment variable according to \`-dlopen' +flags. + +If any of the ARGS are libtool executable wrappers, then they are translated +into their corresponding uninstalled binary, and any of their required library +directories are added to the library path. + +Then, COMMAND is executed, with ARGS as arguments." + ;; + +finish) + $echo \ +"Usage: $modename [OPTION]... --mode=finish [LIBDIR]... + +Complete the installation of libtool libraries. + +Each LIBDIR is a directory that contains libtool libraries. + +The commands that this mode executes may require superuser privileges. Use +the \`--dry-run' option if you just want to see what would be executed." + ;; + +install) + $echo \ +"Usage: $modename [OPTION]... --mode=install INSTALL-COMMAND... + +Install executables or libraries. + +INSTALL-COMMAND is the installation command. The first component should be +either the \`install' or \`cp' program. + +The rest of the components are interpreted as arguments to that command (only +BSD-compatible install options are recognized)." + ;; + +link) + $echo \ +"Usage: $modename [OPTION]... --mode=link LINK-COMMAND... + +Link object files or libraries together to form another library, or to +create an executable program. + +LINK-COMMAND is a command using the C compiler that you would use to create +a program from several object files. + +The following components of LINK-COMMAND are treated specially: + + -all-static do not do any dynamic linking at all + -avoid-version do not add a version suffix if possible + -dlopen FILE \`-dlpreopen' FILE if it cannot be dlopened at runtime + -dlpreopen FILE link in FILE and add its symbols to lt_preloaded_symbols + -export-dynamic allow symbols from OUTPUT-FILE to be resolved with dlsym(3) + -export-symbols SYMFILE + try to export only the symbols listed in SYMFILE + -export-symbols-regex REGEX + try to export only the symbols matching REGEX + -LLIBDIR search LIBDIR for required installed libraries + -lNAME OUTPUT-FILE requires the installed library libNAME + -module build a library that can dlopened + -no-fast-install disable the fast-install mode + -no-install link a not-installable executable + -no-undefined declare that a library does not refer to external symbols + -o OUTPUT-FILE create OUTPUT-FILE from the specified objects + -release RELEASE specify package release information + -rpath LIBDIR the created library will eventually be installed in LIBDIR + -R[ ]LIBDIR add LIBDIR to the runtime path of programs and libraries + -static do not do any dynamic linking of libtool libraries + -version-info CURRENT[:REVISION[:AGE]] + specify library version info [each variable defaults to 0] + +All other options (arguments beginning with \`-') are ignored. + +Every other argument is treated as a filename. Files ending in \`.la' are +treated as uninstalled libtool libraries, other files are standard or library +object files. + +If the OUTPUT-FILE ends in \`.la', then a libtool library is created, +only library objects (\`.lo' files) may be specified, and \`-rpath' is +required, except when creating a convenience library. + +If OUTPUT-FILE ends in \`.a' or \`.lib', then a standard library is created +using \`ar' and \`ranlib', or on Windows using \`lib'. + +If OUTPUT-FILE ends in \`.lo' or \`.${objext}', then a reloadable object file +is created, otherwise an executable program is created." + ;; + +uninstall) + $echo \ +"Usage: $modename [OPTION]... --mode=uninstall RM [RM-OPTION]... FILE... + +Remove libraries from an installation directory. + +RM is the name of the program to use to delete files associated with each FILE +(typically \`/bin/rm'). RM-OPTIONS are options (such as \`-f') to be passed +to RM. + +If FILE is a libtool library, all the files associated with it are deleted. +Otherwise, only FILE itself is deleted using RM." + ;; + +*) + $echo "$modename: invalid operation mode \`$mode'" 1>&2 + $echo "$help" 1>&2 + exit 1 + ;; +esac + +echo +$echo "Try \`$modename --help' for more information about other modes." + +exit 0 + +# Local Variables: +# mode:shell-script +# sh-indentation:2 +# End: diff --git a/sim/ucsim/main_in.mk b/sim/ucsim/main_in.mk new file mode 100644 index 0000000..ea45c8e --- /dev/null +++ b/sim/ucsim/main_in.mk @@ -0,0 +1,143 @@ +# +# S51 main.mk +# +# (c) Drotos Daniel, Talker Bt. 1997,99 +# + +STARTYEAR = 1997 + +SHELL = /bin/sh +CXX = @CXX@ +#CPP = @CPP@ +CXXCPP = @CXXCPP@ +RANLIB = @RANLIB@ +INSTALL = @INSTALL@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ +SIMDIR = sim.src +CMDDIR = cmd.src +GUIDIR = gui.src + +DEFS = $(subs -DHAVE_CONFIG_H,,@DEFS@) +# FIXME: -Imcs51 must be removed!!! +CPPFLAGS = @CPPFLAGS@ -I$(top_builddir) -I$(srcdir) \ + -I$(top_srcdir)/$(SIMDIR) \ + -I$(top_srcdir)/$(CMDDIR) -I$(top_srcdir)/$(GUIDIR) +CFLAGS = @CFLAGS@ -I$(top_builddir) -Wall +CXXFLAGS = @CXXFLAGS@ -I$(top_builddir) -Wall +M_OR_MM = @M_OR_MM@ + +EXEEXT = @EXEEXT@ + +LIB_LIST = ucsimutil cmd sim +UCSIM_LIBS = -Wl,--start-group $(patsubst %,-l%,$(LIB_LIST)) -Wl,--end-group +UCSIM_LIB_FILES = $(patsubst %,lib%.a,$(LIB_LIST)) + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @infodir@ +srcdir = @srcdir@ +VPATH = @srcdir@ + +OBJECTS = pobj.o globals.o utils.o error.o app.o option.o +SOURCES = $(patsubst %.o,%.cc,$(OBJECTS)) +UCSIM_OBJECTS = ucsim.o +UCSIM_SOURCES = $(patsubst %.o,%.cc,$(UCSIM_OBJECTS)) +ALL_SOURCES = $(SOURCES) $(UCSIM_SOURCES) + +enable_ucsim = @enable_ucsim@ + + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf libs + +libs: libucsimutil.a + +main_app: checkconf ucsim_app + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: all installdirs + + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(DESTDIR)$(bindir)/s51$(EXEEXT) + rm -f $(DESTDIR)$(bindir)/savr$(EXEEXT) + rm -f $(DESTDIR)$(bindir)/serialview$(EXEEXT) + rm -f $(DESTDIR)$(bindir)/portmon$(EXEEXT) + + +# Performing self-test +# -------------------- +check: + +test: + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + + +# Creating dependencies +# --------------------- +dep: main.dep + +main.dep: $(ALL_SOURCES) *.h $(srcdir)/*.h + $(CXXCPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.cc,$^) >main.dep + +-include main.dep +include $(srcdir)/clean.mk + +#parser.cc: parser.y + +#plex.cc: plex.l + +# My rules +# -------- +libucsimutil.a: $(OBJECTS) + ar -rcu $*.a $(OBJECTS) + $(RANLIB) $*.a + + +ifeq ($(enable_ucsim),yes) +ucsim_app: libs ucsim +else +ucsim_app: +endif + +ucsim: $(UCSIM_OBJECTS) $(UCSIM_LIB_FILES) + echo $(UCSIM_LIB_FILES) + $(CXX) $(CXXFLAGS) -o $@ $< -L$(top_builddir) $(UCSIM_LIBS) + +ptt: ptt.o + $(CXX) $(CXXFLAGS) -o $@ $< -lpthread +.cc.o: + $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c $< -o $@ + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f devel ]; then\ + $(top_srcdir)/mkecho $(top_builddir) "MAIN.MK checkconf";\ + $(MAKE) -f conf.mk srcdir="$(srcdir)" freshconf;\ + fi + +# End of main_in.mk/main.mk diff --git a/sim/ucsim/mkecho b/sim/ucsim/mkecho new file mode 100755 index 0000000..91ac1aa --- /dev/null +++ b/sim/ucsim/mkecho @@ -0,0 +1,8 @@ +#!/bin/sh + +if [ -f ${1}/devel ]; then + shift + echo "$@" +fi + +# End of mkecho diff --git a/sim/ucsim/option.cc b/sim/ucsim/option.cc new file mode 100644 index 0000000..83bccf7 --- /dev/null +++ b/sim/ucsim/option.cc @@ -0,0 +1,837 @@ +/* + * Simulator of microcontrollers (option.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* + This file is part of microcontroller simulator: ucsim. + + UCSIM is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + UCSIM is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with UCSIM; see the file COPYING. If not, write to the Free + Software Foundation, 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. +*/ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include +#include +#include "i_string.h" + + // local, prj +#include "stypes.h" +#include "optioncl.h" +#include "globals.h" +#include "utils.h" + + // sim.src +#include "simcl.h" + + +/*struct id_element option_type_names[]= { + { non_opt , "non" }, + { integer_opt , "integer" }, + { float_opt , "float" }, + { bool_opt , "boolean" }, + { string_opt , "string" }, + { pointer_opt , "pointer" }, + { 0, 0 } + };*/ + +/* + * Base class for option's objects + *____________________________________________________________________________ + * + */ + +cl_option::cl_option(class cl_base *the_creator, const char *aname, const char *Ihelp): + cl_base() +{ + creator= the_creator; + set_name(aname); + help= strdup(Ihelp); + char *s= (char*)malloc(strlen(aname)+100); + sprintf(s, "users of option \"%s\"", aname); + users= new cl_list(2, 2, s); + free(s); + memset(&value, 0, sizeof(value)); + show(); +} + +class cl_option & +cl_option::operator=(class cl_option &o) +{ + //memcpy(&value, &(o.value), sizeof(union option_value)); + //fprintf(stderr,"opt%p\"%s\"=%p\"%s\"\nold=%p\n",this,object_name(this),&o,object_name(&o),value.sval); + value= o.value; + //fprintf(stderr,"new=%p\n",value.sval); + inform_users(); + return(*this); +} + +cl_option::~cl_option(void) +{ + users->disconn_all(); + delete users; + free(help); +} + +void +cl_option::pre_remove(void) +{ + int i; + + for (i= 0; i < users->count; i++) + { + class cl_optref *user= (class cl_optref *)(users->at(i)); + user->option_removing(); + } +} + +void +cl_option::new_reference(class cl_optref *ref) +{ + users->add(ref); +} + +void +cl_option::del_reference(class cl_optref *ref) +{ + users->disconn(ref); +} + +void +cl_option::inform_users(void) +{ + int i; + + for (i= 0; i < users->count; i++) + { + class cl_optref *user= (class cl_optref *)(users->at(i)); + //fprintf(stderr,"%p\"%s\" informs user %p\"%s\"\n",this,object_name(this),user,object_name(user)); + user->option_changed(); + } +} + + +void +cl_option::get_value(bool *val) +{ + if (val) + *val= value.bval; +} + +void +cl_option::set_value(bool opt) +{ + value.bval= opt; + inform_users(); +} + + +void +cl_option::get_value(char **val) +{ + if (val) + *val= value.sval; +} + +void +cl_option::set_value(char *opt) +{ + //fprintf(stderr,"set_string_value (%s) to %p\"%s\"\n",opt,this,object_name(this)); + //fprintf(stderr,"old value=%p\"%s\"\n",value.sval,value.sval); + if (value.sval) + free(value.sval); + if (opt && + *opt) + value.sval= strdup(opt); + else + value.sval= strdup(""); + //fprintf(stderr,"new value=%p\"%s\"\n",value.sval,value.sval); + inform_users(); +} + + +void +cl_option::get_value(void **val) +{ + if (val) + *val= value.pval; +} + +void +cl_option::set_value(void *opt) +{ + value.pval= opt; + inform_users(); +} + + +void +cl_option::get_value(long *val) +{ + if (val) + *val= value.ival; +} + +void +cl_option::set_value(long opt) +{ + value.ival= opt; + inform_users(); +} + + +void +cl_option::get_value(double *val) +{ + if (val) + *val= value.fval; +} + +void +cl_option::set_value(double opt) +{ + value.fval= opt; + inform_users(); +} + + +/* + * List of options + */ + +const void * +cl_options::key_of(void *item) +{ + return(((class cl_base *)item)->get_name()); +} + +int +cl_options::compare(const void *key1, const void *key2) +{ + return(strcmp(static_cast(key1), static_cast(key2))); +} + +void +cl_options::new_option(class cl_option *opt) +{ + add(opt); +} + +void +cl_options::del_option(class cl_option *opt) +{ + opt->pre_remove(); + disconn(opt); + delete opt; +} + +class cl_option * +cl_options::get_option(const char *the_name) +{ + t_index idx; + + if (search(the_name, idx)) + return((class cl_option *)(at(idx))); + return(0); +} + +class cl_option * +cl_options::get_option(const char *the_name, class cl_base *creator) +{ + t_index idx; + class cl_option *o; + + if (!search(the_name, idx)) + return(0); + if (idx > 0) + { + idx--; + o= (class cl_option *)(at(idx)); + while (compare(the_name, key_of(o)) == 0 && + idx > 0) + { + idx--; + o= (class cl_option *)(at(idx)); + } + if (compare(the_name, key_of(o)) != 0) + idx++; + } + o= (class cl_option *)(at(idx)); + while (compare(the_name, key_of(o)) == 0 && + o->get_creator() != creator && + idx < count) + { + idx++; + o= (class cl_option *)(at(idx)); + if (compare(the_name, key_of(o)) == 0 && + o->get_creator() == creator) + return(o); + } + if (compare(the_name, key_of(o)) == 0 && + o->get_creator() == creator) + return(o); + return(0); +} + +class cl_option * +cl_options::get_option(const char *the_name, char *creator) +{ + t_index idx; + class cl_option *o; + + if (!search(the_name, idx)) + return(0); + if (idx > 0) + { + idx--; + o= (class cl_option *)(at(idx)); + while (compare(the_name, key_of(o)) == 0 && + idx > 0) + { + idx--; + o= (class cl_option *)(at(idx)); + } + if (compare(the_name, key_of(o)) != 0) + idx++; + } + o= (class cl_option *)(at(idx)); + while (compare(the_name, key_of(o)) == 0 && + strcmp(object_name(o->get_creator()), creator) != 0 && + idx < count) + { + idx++; + o= (class cl_option *)(at(idx)); + if (compare(the_name, key_of(o)) == 0 && + strcmp(object_name(o->get_creator()), creator) == 0) + return(o); + } + if (compare(the_name, key_of(o)) == 0 && + strcmp(object_name(o->get_creator()), creator) == 0) + return(o); + return(0); +} + +class cl_option * +cl_options::get_option(int idx) +{ + if (idx >= count) + return(0); + return((class cl_option *)(at(idx))); +} + +int +cl_options::nuof_options(char *the_name) +{ + int i, n= 0; + + for (i= 0; i < count; i++) + { + class cl_option *o= (class cl_option *)(at(i)); + if (strcmp(the_name, o->get_name()) == 0) + n++; + } + return(n); +} + +int +cl_options::nuof_options(char *the_name, char *creator) +{ + int i, n= 0; + + for (i= 0; i < count; i++) + { + class cl_option *o= (class cl_option *)(at(i)); + if (strcmp(the_name, o->get_name()) == 0 && + strcmp(creator, object_name(o->get_creator())) == 0) + n++; + } + return(n); +} + +class cl_option * +cl_options::set_value(const char *the_name, cl_base *creator, bool value) +{ + class cl_option *o= get_option(the_name, creator); + + if (o) + o->set_value(value); + return(o); +} + +class cl_option * +cl_options::set_value(const char *the_name, cl_base *creator, char *value) +{ + class cl_option *o= get_option(the_name, creator); + + if (o) + o->set_value(value); + return(o); +} + +class cl_option * +cl_options::set_value(const char *the_name, cl_base *creator, void *value) +{ + class cl_option *o= get_option(the_name, creator); + + if (o) + o->set_value(value); + return(o); +} + +class cl_option * +cl_options::set_value(const char *the_name, cl_base *creator, long value) +{ + class cl_option *o= get_option(the_name, creator); + + if (o) + o->set_value(value); + return(o); +} + +class cl_option * +cl_options::set_value(const char *the_name, cl_base *creator, double value) +{ + class cl_option *o= get_option(the_name, creator); + + if (o) + o->set_value(value); + return(o); +} + + +/* + * Reference to an option + */ + +cl_optref::cl_optref(class cl_base *the_owner) +{ + option =0; + owner= the_owner; +} + +cl_optref::cl_optref(class cl_base *the_owner, class cl_option *new_option) +{ + owner= the_owner; + option= new_option; + application->options->new_option(option); + if (option) + { + option->new_reference(this); + set_name(option->get_name()); + } +} + +cl_optref::~cl_optref(void) +{ + if (option) + { + option->del_reference(this); + if (option->get_creator() == owner) + application->options->del_option(option); + } +} + +class cl_option * +cl_optref::create(class cl_base *creator, + enum option_type type, + const char *the_name, const char *help) +{ + if (option) + option->del_reference(this); + switch (type) + { + case non_opt: + option= 0; + break; + case integer_opt: + option= new cl_number_option(creator, the_name, help); + break; + case float_opt: + option= new cl_float_option(creator, the_name, help); + break; + case bool_opt: + option= new cl_bool_option(creator, the_name, help); + break; + case string_opt: + option= new cl_string_option(creator, the_name, help); + break; + case pointer_opt: + option= new cl_pointer_option(creator, the_name, help); + break; + default: + option= 0; + break; + } + if (option) + { + application->options->new_option(option); + option->new_reference(this); + set_name(option->get_name()); + } + + return(option); +} + +void +cl_optref::default_option(const char *the_name) +{ + class cl_option *o= application->options->get_option(the_name, application); + + if (o && + option) + { + //memcpy(option->get_value(), o->get_value(), sizeof(union option_value)); + *option= *o; + option->inform_users(); + } + /*else + fprintf(stderr,"can not set opt from default, option=%p, o=%p\n",option,o);*/ +} + +class cl_option * +cl_optref::use(void) +{ + if (option) + { + option->del_reference(this); + option->new_reference(this); + } + return(option); +} + +class cl_option * +cl_optref::use(const char *the_name) +{ + if (option) + option->del_reference(this); + option= application->options->get_option(the_name); + if (option) + { + option->new_reference(this); + set_name(option->get_name()); + } + return(option); +} + +void +cl_optref::option_removing(void) +{ + option= 0; +} + +bool +cl_optref::get_value(bool) +{ + if (!option) + { + fprintf(stderr, "Warning: \"%s\" is sdereferencing a non-existent " + "bool option: %s\n", object_name(owner), get_name()); + return(DD_FALSE); + } + else + { + bool v; + option->get_value(&v); + return(v); + } +} + +char * +cl_optref::get_value(const char *) +{ + if (!option) + { + fprintf(stderr, "Warning: \"%s\" is sdereferencing a non-existent " + "string option: %s\n", object_name(owner), get_name()); + return(0); + } + else + { + char *s= 0; + option->get_value(&s); + return(s); + } +} + +void * +cl_optref::get_value(void *) +{ + if (!option) + { + fprintf(stderr, "Warning: \"%s\" is sdereferencing a non-existent " + "pointer option: %s\n", object_name(owner), get_name()); + return(NIL); + } + else + { + void *p= NIL; + option->get_value(&p); + return(p); + } +} + +long +cl_optref::get_value(long) +{ + if (!option) + { + fprintf(stderr, "Warning: \"%s\" is sdereferencing a non-existent " + "number option: %s\n", object_name(owner), get_name()); + return(0); + } + else + { + long l= 0; + option->get_value(&l); + return(l); + } +} + +double +cl_optref::get_value(double) +{ + if (!option) + { + fprintf(stderr, "Warning: \"%s\" is sdereferencing a non-existent " + "float option: %s\n", object_name(owner), get_name()); + return(0); + } + else + { + double d= 0; + option->get_value(&d); + return(d); + } +} + + +/* + * BOOL type of option + *____________________________________________________________________________ + * + */ + +cl_bool_option::cl_bool_option(class cl_base *the_creator, + const char *aname, const char *Ihelp): + cl_option(the_creator, aname, Ihelp) +{} + +void +cl_bool_option::print(class cl_console_base *con) +{ + if (/**(bool *)option*/value.bval) + con->dd_printf("TRUE"); + else + con->dd_printf("FALSE"); +} + +void +cl_bool_option::set_value(char *s) +{ + char c; + + if (s) + { + c= toupper(*s); + if (c == '1' || + c == 'T' || + c == 'Y') + /**(bool *)option=*/ value.bval= DD_TRUE; + else + /**(bool *)option=*/ value.bval= DD_FALSE; + } + inform_users(); +} + + +/* + * STRING type of option + *____________________________________________________________________________ + * + */ + +cl_string_option::cl_string_option(class cl_base *the_creator, + const char *aname, const char *Ihelp): + cl_option(the_creator, aname, Ihelp) +{} + +class cl_option & +cl_string_option::operator=(class cl_option &o) +{ + //fprintf(stderr,"string=otheropt%p\"%s\"\nold=%p\"%s\"\n",&o,object_name(&o),value.sval,value.sval); + set_value((o.get_value())->sval); + //fprintf(stderr,"new=%p\"%s\"\n",value.sval,value.sval); + return(*this); +} + +void +cl_string_option::print(class cl_console_base *con) +{ + if (/**(bool *)option*/value.sval) + con->dd_printf("\"%s\"", value.sval); + else + con->dd_printf("(null)"); +} + + +/* + * PONITER type of option + *____________________________________________________________________________ + * + */ + +cl_pointer_option::cl_pointer_option(class cl_base *the_creator, + const char *aname, const char *Ihelp): + cl_option(the_creator, aname, Ihelp) +{} + +class cl_option & +cl_pointer_option::operator=(class cl_option &o) +{ + set_value((o.get_value())->pval); + return(*this); +} + +void +cl_pointer_option::print(class cl_console_base *con) +{ + if (value.pval) + con->dd_printf("\"%p\"", value.pval); + else + con->dd_printf("(null)"); +} + + +/* + * Debug on console + */ +/* +cl_cons_debug_opt::cl_cons_debug_opt(class cl_app *the_app, + char *Iid, + char *Ihelp): + cl_option(0, Iid, Ihelp) +{ + app= the_app; +} + +void +cl_cons_debug_opt::print(class cl_console_base *con) +{ + if (con->flags & CONS_DEBUG) + con->dd_printf("TRUE"); + else + con->dd_printf("FALSE"); +} + +void +cl_cons_debug_opt::get_value(bool *val) +{ + if (val) + *val= app->get_commander()->actual_console? + (app->get_commander()->actual_console->flags & CONS_DEBUG):0; +} + +void +cl_cons_debug_opt::set_value(bool opt) +{ + if (app->get_commander()->actual_console) + { + if (opt) + app->get_commander()->actual_console->flags|= CONS_DEBUG; + else + app->get_commander()->actual_console->flags&= ~CONS_DEBUG; + } + inform_users(); +} + +void +cl_cons_debug_opt::set_value(char *s) +{ + char c; + + if (s && + app->get_commander()->actual_console) + { + c= toupper(*s); + if (c == '1' || + c == 'T' || + c == 'Y') + set_value(1); + else + set_value(0); + } +} +*/ + +/* + * NUMBER type of option + *____________________________________________________________________________ + * + */ + +cl_number_option::cl_number_option(class cl_base *the_creator, + const char *aname, const char *Ihelp): + cl_option(the_creator, aname, Ihelp) +{} + +void +cl_number_option::print(class cl_console_base *con) +{ + con->dd_printf("%ld", value.ival); +} + +void +cl_number_option::set_value(char *s) +{ + if (s) + value.ival= strtol(s, NIL, 0); + inform_users(); +} + + +/* + * FLOAT type of option + *____________________________________________________________________________ + * + */ + +cl_float_option::cl_float_option(class cl_base *the_creator, + const char *aname, const char *Ihelp): + cl_option(the_creator, aname, Ihelp) +{} + +void +cl_float_option::print(class cl_console_base *con) +{ + con->dd_printf("%.3f", value.fval); +} + +void +cl_float_option::set_value(char *s) +{ + if (s) + value.fval= strtod(s, NIL); + inform_users(); +} + + +/* End of option.cc */ diff --git a/sim/ucsim/optioncl.h b/sim/ucsim/optioncl.h new file mode 100644 index 0000000..2e8ad8a --- /dev/null +++ b/sim/ucsim/optioncl.h @@ -0,0 +1,227 @@ +/* + * Simulator of microcontrollers (sim.src/optioncl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef SIM_OPTIONCL_HEADER +#define SIM_OPTIONCL_HEADER + +#include "ddconfig.h" + +#include + +#include "pobjcl.h" +#include "stypes.h" + + +enum option_type { + non_opt, + integer_opt, + float_opt, + bool_opt, + string_opt, + pointer_opt +}; + +// forward +class cl_optref; + +union option_value { + long ival; + double fval; + bool bval; + char *sval; + void *pval; +}; + +class cl_option: public cl_base +{ +protected: + //enum opt_type type; + void *option; + union option_value value; + class cl_base *creator; +public: + class cl_list *users; // cl_optref + //char *name; + char *help; + bool hidden; + +public: + cl_option(class cl_base *the_creator, const char *aname, const char *Ihelp); + virtual class cl_option &operator=(class cl_option &o); + virtual ~cl_option(void); + virtual void pre_remove(void); + + virtual class cl_base *get_creator(void) { return(creator); } + virtual void hide(void) { hidden= DD_TRUE; } + virtual void show(void) { hidden= DD_FALSE; } + + virtual void print(class cl_console_base *con) {} + virtual const char *get_type_name(void) { return("non"); } + + virtual union option_value *get_value(void) { return(&value); } + virtual void get_value(bool *val); + virtual void get_value(char **val); + virtual void get_value(void **val); + virtual void get_value(long *val); + virtual void get_value(double *val); + virtual void set_value(bool opt); + virtual void set_value(char *opt); + virtual void set_value(void *opt); + virtual void set_value(long opt); + virtual void set_value(double opt); + + virtual void new_reference(class cl_optref *ref); + virtual void del_reference(class cl_optref *ref); + virtual void inform_users(void); +}; + + +class cl_options: public cl_sorted_list +{ +public: + cl_options(void): cl_sorted_list(2, 2, "options") { Duplicates= DD_TRUE; } + virtual const void *key_of(void *item); + virtual int compare(const void *key1, const void *key2); + virtual void new_option(class cl_option *opt); + virtual void del_option(class cl_option *opt); + virtual class cl_option *get_option(const char *the_name); + virtual class cl_option *get_option(const char *the_name, class cl_base *creator); + virtual class cl_option *get_option(const char *the_name, char *creator); + virtual class cl_option *get_option(int idx); + virtual int nuof_options(char *the_name); + virtual int nuof_options(char *the_name, char *creator); + + virtual class cl_option *set_value(const char *the_name, cl_base *creator, + bool value); + virtual class cl_option *set_value(const char *the_name, cl_base *creator, + char *value); + virtual class cl_option *set_value(const char *the_name, cl_base *creator, + void *value); + virtual class cl_option *set_value(const char *the_name, cl_base *creator, + long value); + virtual class cl_option *set_value(const char *the_name, cl_base *creator, + double value); +}; + + +class cl_optref: public cl_base +{ +protected: + class cl_option *option; + class cl_base *owner; +public: + cl_optref(class cl_base *the_owner); + cl_optref(class cl_base *the_owner, class cl_option *new_option); + virtual ~cl_optref(void); + + virtual class cl_option *create(class cl_base *creator, + enum option_type type, + const char *the_name, const char *help); + virtual void default_option(const char *the_name); + virtual class cl_option *use(void); + virtual class cl_option *use(const char *the_name); + virtual void option_changed(void) {} + virtual void option_removing(void); + virtual class cl_base *get_owner(void) { return(owner); } + + virtual bool get_value(bool); + virtual char *get_value(const char *); + virtual void *get_value(void *); + virtual long get_value(long); + virtual double get_value(double); +}; + + +class cl_bool_option: public cl_option +{ +public: + cl_bool_option(class cl_base *the_creator, const char *aname, const char *Ihelp); + virtual void print(class cl_console_base *con); + virtual const char *get_type_name(void) { return("boolean"); } + virtual void set_value(char *s); +}; + + +class cl_string_option: public cl_option +{ +public: + cl_string_option(class cl_base *the_creator, const char *aname, const char *Ihelp); + virtual class cl_option &operator=(class cl_option &o); + virtual void print(class cl_console_base *con); + virtual const char *get_type_name(void) { return("string"); } +}; + + +class cl_pointer_option: public cl_option +{ +public: + cl_pointer_option(class cl_base *the_creator, const char *aname, const char *Ihelp); + virtual class cl_option &operator=(class cl_option &o); + virtual void print(class cl_console_base *con); + virtual const char *get_type_name(void) { return("pointer"); } +}; + + +class cl_number_option: public cl_option +{ +public: + cl_number_option(class cl_base *the_creator, const char *aname, const char *Ihelp); + virtual void print(class cl_console_base *con); + virtual const char *get_type_name(void) { return("integer"); } + virtual void set_value(char *s); +}; + + +class cl_float_option: public cl_option +{ +public: + cl_float_option(class cl_base *the_creator, const char *aname, const char *Ihelp); + virtual void print(class cl_console_base *con); + virtual const char *get_type_name(void) { return("float"); } + virtual void set_value(char *s); +}; + + +/*class cl_cons_debug_opt: public cl_option +{ +public: + class cl_app *app; +public: + cl_cons_debug_opt(class cl_app *the_app, char *Iid, char *Ihelp); + + virtual void print(class cl_console_base *con); + + virtual void get_value(bool *val); + + virtual void set_value(bool); + virtual void set_value(char *s); +};*/ + + +#endif + +/* End of optioncl.h */ diff --git a/sim/ucsim/packages_in.mk b/sim/ucsim/packages_in.mk new file mode 100644 index 0000000..60e192a --- /dev/null +++ b/sim/ucsim/packages_in.mk @@ -0,0 +1,42 @@ +EXEEXT = @EXEEXT@ + +enable_51 = @enable_51@ +enable_avr = @enable_avr@ +enable_z80 = @enable_z80@ +enable_xa = @enable_xa@ +enable_hc08 = @enable_hc08@ + +ifeq ($(enable_51),yes) +S51 = s51.src +else +S51 = +endif + +ifeq ($(enable_avr),yes) +SAVR = avr.src +else +SAVR = +endif + +ifeq ($(enable_z80),yes) +SZ80 = z80.src +else +SZ80 = +endif + +ifeq ($(enable_hc08),yes) +SHC08 = hc08.src +else +SHC08 = +endif + +ifeq ($(enable_xa),yes) +XA = xa.src +else +XA = +endif + +PKGS = cmd.src sim.src gui.src $(S51) $(SAVR) $(SZ80) $(XA) \ + $(SHC08) doc +PKGS_ALL = cmd.src sim.src gui.src s51.src avr.src z80.src xa.src \ + hc08.src doc diff --git a/sim/ucsim/pobj.cc b/sim/ucsim/pobj.cc new file mode 100644 index 0000000..e32deed --- /dev/null +++ b/sim/ucsim/pobj.cc @@ -0,0 +1,878 @@ +/* + * Simulator of microcontrollers (pobj.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include + +#include "pstr.h" +/*#include "pobjt.h"*/ +#include "pobjcl.h" + + +/* * + ==========================================================================* + cl_base * + ==========================================================================* + * +*/ + +/* + * Initializing the object + */ + +cl_base::cl_base(void) +{ + name= 0; + parent= 0; + children= 0; +} + + +/* + * Destructing the object: calling hte virtual Done method + */ + +cl_base::~cl_base(void) +{ + if (name) + free(name); + if (children) + { + int i; + for (i= 0; i < children->count; i++) + { + } + children->disconn_all(); + delete children; + } + parent= 0; +} + +int cl_base::init(void) {return(0);} + +const char * +cl_base::get_name(const char *def) +{ + if (!name) + return(def); + return(name); +} + +const char * +cl_base::set_name(const char *new_name) +{ + if (name) + free(name); + if (!new_name) + name= 0; + else if (*new_name) + name= strdup(new_name); + else + name= strdup(""); + return(name); +} + +const char * +cl_base::set_name(const char *new_name, const char *def_name) +{ + char *def; + + if (!def_name || + *def_name == '\0') + def= strdup(""); + else + def= strdup(def_name); + if (name) + free(name); + if (!new_name) + name= def; + else if (*new_name) + name= strdup(new_name); + else + name= def; + return(name); +} + +bool +cl_base::is_named(const char *the_name) +{ + if (!name || + !*name || + !the_name || + !*the_name) + return(DD_FALSE); + return(strcmp(name, the_name) == 0); +} + +bool +cl_base::is_inamed(const char *the_name) +{ + if (!name || + !*name || + !the_name || + !*the_name) + return(DD_FALSE); + return(strcasecmp(name, the_name) == 0); +} + + +int +cl_base::nuof_children(void) +{ + if (!children) + return(0); + return(children->count); +} + +void +cl_base::add_child(class cl_base *child) +{ + if (!children) + { + char *s; + s= (char*)malloc(strlen(get_name("?"))+100); + sprintf(s, "childs of %s", get_name("?")); + children= new cl_list(1, 1, s); + free(s); + } + if (child) + { + children->add(child); + child->parent= this; + } +} + +void +cl_base::remove_child(class cl_base *child) +{ + if (child && + children) + { + child->unlink(); + children->disconn(child); + } +} + +void +cl_base::remove_from_chain(void) +{ + if (parent) + parent->remove_child(this); +} + +void +cl_base::unlink(void) +{ + parent= 0; +} + +class cl_base * +cl_base::first_child(void) +{ + if (!children || + children->count == 0) + return(0); + return(dynamic_cast(children->object_at(0))); +} + +class cl_base * +cl_base::next_child(class cl_base *child) +{ + if (!children || + !child) + return(0); + return((class cl_base *)(children->next(child))); +} + + +bool +cl_base::handle_event(class cl_event &event) +{ + return(pass_event_down(event)); +} + +bool +cl_base::pass_event_down(class cl_event &event) +{ + int i; + if (!children) + return(DD_FALSE); + for (i= 0; i < children->count; i++) + { + class cl_base *child= + dynamic_cast(children->object_at(i)); + if (child) + { + child->handle_event(event); + if (event.is_handled()) + return(DD_TRUE); + } + } + return(DD_FALSE); +} + + +/* + * Event + */ + +cl_event::cl_event(enum event what_event): + cl_base() +{ + handled= DD_FALSE; + what= what_event; +} + +cl_event::~cl_event(void) +{ +} + + +/* * + ==========================================================================* + cl_list * + ==========================================================================* + * +*/ + +/* + * Initializing a collection + */ + +cl_list::cl_list(t_index alimit, t_index adelta, const char *aname): + cl_base() +{ + count= 0; + Items= 0; + Limit= 0; + Delta= adelta; + set_limit(alimit); + set_name(aname, "unnamed list"); +} + + +/* + * Disposing object's variables + */ + +cl_list::~cl_list(void) +{ + //delete Items; + free(Items); +} + + +/* + * Get indexed item from the collection + */ + +void * +cl_list::at(t_index index) +{ + if (index < 0 || + index >= count) + error(1, index); + return(Items[index]); +} + +class cl_base * +cl_list::object_at(t_index index) +{ + if (index < 0 || + index >= count) + error(1, index); + return((class cl_base *)(Items[index])); +} + +/*void * +cl_list::operator[](t_index index) +{ + if (index < 0 || + index >= count) + error(1, 0); + return(Items[index]); +}*/ + + +/* + * Deleting the indexed item from the collection + */ +#include "globals.h" +void +cl_list::disconn_at(t_index index) +{ + if (index < 0 || + index >= count) + error(1, 0); + count--; + /*{ char s[1000]; + s[0]='\0'; + sprintf(s, "disconn_at(%d) PC=0x%x", index, + application? + ((application->sim)? + ((application->sim->uc)?(application->sim->uc->PC): + -3): + -1): + -2); + strcat(s,"\n");}*/ + memmove(&Items[index], &Items[index+1], (count-index)*sizeof(void *)); +} + + +/* + * Deleting an item from the collection but not disposing it + */ + +void +cl_list::disconn(void *item) +{ + t_index i; + + if (index_of(item, &i)) + disconn_at(i); +} + + +/* + * Deleting all the items from the collection but not disposing them + */ + +void +cl_list::disconn_all(void) +{ + count= 0; +} + + +/* + * Deleting the indexed item from the collection and disposing it + */ + +void +cl_list::free_at(t_index index) +{ + void *Item= at(index); + + disconn_at(index); + free_item(Item); +} + +void +cl_list::free_all(void) +{ + t_index i; + + if (count) + { + for (i= count-1; i; i--) + free_at(i); + free_at(0); + } +} + + +/* + * Inserting a new item to the exact position + */ + +void +cl_list::add_at(t_index index, void *item) +{ + if (index < 0 ) + error(1, 0); + if (count == Limit) + set_limit(count + Delta); + + { char s[1000]; + s[0]='\0'; + sprintf(s, "%s add_at(%d,%p) PC=0x%x (count=%d)", get_name("?"), index, item, + application? + ((application->sim)? + ((application->sim->uc)?(application->sim->uc->PC): + -3): + -1): + -2, count); + strcat(s,"\n");} + memmove(&Items[index+1], &Items[index], (count-index)*sizeof(void *)); + count++; + + Items[index]= item; +} + + +/* + * Put a new item to the collection. This function replaces an existing + * item with a new one but it does not delete or dispose the old item! + */ + +void +cl_list::put_at(t_index index, void *item) +{ + if (index >= count) + error(1, 0); + Items[index]= item; +} + + +/* + * Action taken when an error occure + */ + +void +cl_list::error(t_index code, t_index info) +{ + fprintf(stderr, + "Collection index error. Code= %d, Info= %d.\n", + code, info); + exit(code); +} + + +/* + * Iterator method. This function calls 'Test' using every items as Test's + * argument until Test returns TRUE. + */ + +void * +cl_list::first_that(match_func test, const void *arg) +{ + for (t_index i= 0; i < count; i++) + { + if (test(Items[i], arg)) return(Items[i]); + } + return(0); +} + + +/* + * Iterator method. This function calls 'Action' using every items as + * Action's argument. + */ + +void +cl_list::for_each(iterator_func action, void *arg) +{ + for(t_index i= 0; i < count; i++) + action(Items[i], arg); +} + + +/* + * Disposing an item. + */ + +void +cl_list::free_item(void *item) +{ + delete (class cl_base*)item; +} + + +/* + * Get the number of collected items. + */ + +int +cl_list::get_count(void) +{ + return(count); +} + +void * +cl_list::pop(void) +{ + void *i; + + if (!count) + return(0); + i= Items[0]; + disconn_at(0); + return(i); +} + +void * +cl_list::top(void) +{ + if (!count) + return(0); + return(Items[0]); +} + + +/* + * Returning the index of an item. + */ + +t_index +cl_list::index_of(void *item) +{ + for (t_index i= 0; i < count; i++) + if (item == Items[i]) + return(i); + error(1, 0); + return(0); /* Needed by Sun! */ +} + +bool +cl_list::index_of(void *item, t_index *idx) +{ + for (t_index i= 0; i < count; i++) + if (item == Items[i]) + { + if (idx) + *idx= i; + return(DD_TRUE); + } + return(DD_FALSE); +} + +void * +cl_list::next(void *item) +{ + for (t_index i= 0; i < count; i++) + if (item == Items[i]) + { + if (count >= 2 && + i < count-1) + return(Items[i+1]); + } + return(0); +} + + +/* + * Inserting a new item to the collection. + */ + +t_index +cl_list::add(void *item) +{ + t_index loc= count; + + add_at(count, item); + return(loc); +} + +t_index +cl_list::add(class cl_base *item, class cl_base *parent) +{ + if (parent && item) + parent->add_child(item); + return(add(item)); +} + +void +cl_list::push(void *item) +{ + if (count) + add_at(0, item); + else + add(item); +} + + +/* + * Iterator method. This function calls 'Test' using every items + * (in reversed order) as Test's argument until Test returns TRUE. + */ + +void * +cl_list::last_that(match_func test, void *arg) +{ + for(t_index i= count; i > 0; i--) + if (test(Items[i-1], arg)) + return(Items[i-1]); + return(0); +} + + +/* + * ??? + */ + +/*void +cl_list::pack(void) +{ + void **CurDst= Items; + void **CurSrc= Items; + void **Last = Items + count; + + while (CurSrc < Last) + { + if (*CurSrc != 0) + *CurDst++= *CurSrc; + *CurSrc++; + } +}*/ + + +/* + * Setting up the maximum number of items. This function may expand + * the size of the collection. + */ + +void +cl_list::set_limit(t_index alimit) +{ + void **AItems; + + if (alimit < count) + alimit= count; + if (alimit > (int)max_list_size) + alimit= max_list_size; + if (alimit != Limit) + { + if (alimit == 0) + AItems= 0; + else + { + //AItems = new void *[alimit]; + int i= alimit*(sizeof(void *)); + AItems= (void **)malloc(i); + if (count) + memcpy(AItems, Items, count*sizeof(void *)); + } + //delete Items; + free(Items); + Items= AItems; + Limit= alimit; + } +} + + +/* * + ==========================================================================* + cl_sorted_list * + ==========================================================================* + * +*/ + +/* + * Initilizing the sorted collection + */ + +cl_sorted_list::cl_sorted_list(t_index alimit, t_index adelta, const char *aname): + cl_list(alimit, adelta, aname) +{ + Duplicates= DD_FALSE; +} + + +cl_sorted_list::~cl_sorted_list(void) {} + + +/* + * Get the address of the key field in an item. + */ + +const void * +cl_sorted_list::key_of(void *item) +{ + return(item); +} + + +/* + * Get index of an item. + */ + +t_index +cl_sorted_list::index_of(void *item) +{ + t_index i; + + if (search(key_of(item), i) == 0) + return(ccNotFound); + else + { + if (Duplicates) + while (i < count && + item != Items[i]) + i++; + if (i < count) + return(i); + else + return(ccNotFound); + } +} + + +/* + * Inserting a new item to the collection + */ + +t_index +cl_sorted_list::add(void *item) +{ + t_index i; + + if (search(key_of(item), i) == 0 || + Duplicates) // order dependency! + add_at(i, item); // must do Search + // before calling + // AtInsert + return(i); +} + + +/* + * Searching an item using binary search. + */ + +bool +cl_sorted_list::search(const void *key, t_index &index) +{ + t_index l = 0; + t_index h = count - 1; + bool res= DD_FALSE; + + while (l <= h) + { + t_index i= (l + h) >> 1; + t_index c= compare(key_of(Items[i]), key); + if (c < 0) l= i + 1; + else + { + h= i - 1; + if (c == 0) + { + res= DD_TRUE; + if (!Duplicates) + l= i; + } + } + } + index= l; + return(res); +} + + +/* * + ==========================================================================* + cl_strings * + ==========================================================================* + * +*/ + +/* + * Initilizing the string collection + */ + +cl_strings::cl_strings(t_index alimit, t_index adelta, const char *aname): + cl_sorted_list(alimit, adelta, aname) +{ + Duplicates= DD_TRUE; +} + + +cl_strings::~cl_strings(void) {} + + +/* + * Comapare two string from the collection + */ + +int +cl_strings::compare(const void *key1, const void *key2) +{ + return(strcmp(static_cast(key1), static_cast(key2))); +} + + +/* + * Deallocate string item of the collection + */ + +void +cl_strings::free_item(void* item) +{ + delete (class cl_base*)item; +} + + +/* * + ==========================================================================* + cl_ustrings * + ==========================================================================* + * +*/ + +/* + * Initilizing the unsorted string collection + */ + +cl_ustrings::cl_ustrings(t_index alimit, t_index adelta, const char *aname): + cl_strings(alimit, adelta, aname) +{} + + +cl_ustrings::~cl_ustrings(void) {} + + +/* + * Comapare two string from the collection + */ + +int +cl_ustrings::compare(const void *key1, const void *key2) +{ + return(-1); +} + + +/* + * Searching an item using linear search. + */ + +bool +cl_ustrings::search(const void *key, t_index& index) +{ + t_index i = 0; + bool found= DD_FALSE; + const void *Actual; + + if ((count) && key) + { + while (!found && (i < count)) + { + Actual= key_of(at(i)); + found = (Actual != 0) && + (compare(key, Actual) == 0); + i++; + } + } + if (found) + index= i-1; + else + index= count; + + return(found); +} + +/* End of pobj.cc */ diff --git a/sim/ucsim/pobjcl.h b/sim/ucsim/pobjcl.h new file mode 100644 index 0000000..692eb73 --- /dev/null +++ b/sim/ucsim/pobjcl.h @@ -0,0 +1,222 @@ +/* + * Simulator of microcontrollers (pobjcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* + This file is part of microcontroller simulator: ucsim. + + UCSIM is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + UCSIM is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with UCSIM; see the file COPYING. If not, write to the Free + Software Foundation, 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. +*/ +/*@1@*/ + +#ifndef POBJ_HEADER +#define POBJ_HEADER + +#include "ddconfig.h" + +#include "pobjt.h" + +#include "eventcl.h" + + +/* # + ==========================================================================# + cl_base # + ==========================================================================# + # +*/ + +class cl_list; +class cl_event; + +class cl_base +{ +private: + char *name; + class cl_base *parent; + class cl_list *children; +public: + cl_base(void); + virtual ~cl_base(void); + + virtual int init(void); + virtual const char *get_name(void) { return(name); } + virtual const char *get_name(const char *def); + virtual bool have_name(void) { return(name != 0); } + virtual bool have_real_name(void) { return(name != 0 && *name != '\0'); } + const char *set_name(const char *new_name); + const char *set_name(const char *new_name, const char *def_name); + bool is_named(const char *the_name); + bool is_inamed(const char *the_name); + + class cl_base *get_parent(void) { return(parent); } + int nuof_children(void); + + virtual void add_child(class cl_base *child); + virtual void remove_child(class cl_base *child); + virtual void remove_from_chain(void); + virtual void unlink(void); + virtual class cl_base *first_child(void); + virtual class cl_base *next_child(class cl_base *child); + + virtual bool handle_event(class cl_event &event); + virtual bool pass_event_down(class cl_event &event); +}; + + +/* + * Event + */ + +class cl_event: public cl_base +{ +protected: + bool handled; +public: + enum event what; +public: + cl_event(enum event what_event); + virtual ~cl_event(void); + + bool is_handled(void) { return(handled); } + virtual void handle(void) { handled= DD_TRUE; } +}; + + +/* # + ==========================================================================# + cl_list # + ==========================================================================# + # +*/ + +class cl_list: public cl_base +{ +public: + t_index count; +protected: + void **Items; + t_index Limit; + t_index Delta; + +public: + cl_list(t_index alimit, t_index adelta, const char *aname); + virtual ~cl_list(void); + + void *at(t_index index); + class cl_base *object_at(t_index index); + virtual t_index index_of(void *item); + virtual bool index_of(void *item, t_index *idx); + virtual void *next(void *item); + int get_count(void); + virtual void *pop(void); + virtual void *top(void); + + //void pack(void); + virtual void set_limit(t_index alimit); + + void free_at(t_index index); + void free_all(void); + void disconn_at(t_index index); + void disconn(void *item); + void disconn_all(void); + + void add_at(t_index index, void *item); + void put_at(t_index index, void *item); + virtual t_index add(void *item); + virtual t_index add(class cl_base *item, class cl_base *parent); + virtual void push(void *item); + + void *first_that(match_func test, const void *arg); + void *last_that(match_func test, void *arg); + void for_each(iterator_func action, void *arg); + + void error(t_index code, t_index info); +private: + virtual void free_item(void *item); +}; + + +/* # + ==========================================================================# + cl_sorted_list # + ==========================================================================# + # +*/ + +class cl_sorted_list: public cl_list +{ +public: + bool Duplicates; +public: + cl_sorted_list(t_index alimit, t_index adelta, const char *aname); + virtual ~cl_sorted_list(void); + + virtual bool search(const void *key, t_index& index); + virtual t_index index_of(void *item); + virtual t_index add(void *item); + virtual const void *key_of(void *item); +private: + virtual int compare(const void *key1, const void *key2)= 0; +}; + + +/* # + ==========================================================================# + cl_strings # + ==========================================================================# + # +*/ + +class cl_strings: public cl_sorted_list +{ +public: + cl_strings(t_index alimit, t_index adelta, const char *aname); + virtual ~cl_strings(void); + +private: + virtual int compare(const void *key1, const void *key2); + virtual void free_item(void *item); +}; + + +/* # + ==========================================================================# + cl_ustrings # + ==========================================================================# + # +*/ + +class cl_ustrings: public cl_strings +{ +public: + cl_ustrings(t_index alimit, t_index adelta, const char *aname); + virtual ~cl_ustrings(void); + +private: + virtual int compare(const void *key1, const void *key2); + virtual bool search(const void *key, t_index &index); +}; + + +#endif + +/* End of pobj.h */ diff --git a/sim/ucsim/pobjt.h b/sim/ucsim/pobjt.h new file mode 100644 index 0000000..45e7e61 --- /dev/null +++ b/sim/ucsim/pobjt.h @@ -0,0 +1,48 @@ +/* + * Simulator of microcontrollers (pobjt.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef POBJT_HEADER +#define POBJT_HEADER + +#include "ddconfig.h" + +#ifndef MyTypesHeader +#define DD_TRUE 1 +#define DD_FALSE 0 +#define bool int +#endif + +typedef int t_index; +typedef int (*match_func)(void *, const void *); +typedef void (*iterator_func)(void *, void *); + +#define max_list_size (0x10000/sizeof(void *)) +#define ccNotFound -1 + +#endif + +/* End of pobjt.h */ diff --git a/sim/ucsim/pstr.h b/sim/ucsim/pstr.h new file mode 100644 index 0000000..caee6e2 --- /dev/null +++ b/sim/ucsim/pstr.h @@ -0,0 +1,44 @@ +/* + * Simulator of microcontrollers (pstr.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef PSTR_HEADER +#define PSTR_HEADER + +#include "ddconfig.h" + +#ifdef STDC_HEADERS +# include +#else +# include "predefs.h" +# ifdef PUtilsNeeded +# include "putils.h" +# endif +#endif + +#endif + +/* End of pstr.h */ diff --git a/sim/ucsim/ptt.cc b/sim/ucsim/ptt.cc new file mode 100644 index 0000000..8138260 --- /dev/null +++ b/sim/ucsim/ptt.cc @@ -0,0 +1,232 @@ +#include +#include + +// simulated system +struct app { + long PC; + bool simulating; +} sys; + +// locks +pthread_mutex_t simulation_lock; +pthread_mutex_t application_lock; + + +pthread_t sim_th; + +struct sim_args { + long int steps2go; +}; + +void +step_start(void) +{ + pthread_mutex_lock(&application_lock); +} + +void +step_end(void) +{ + pthread_mutex_unlock(&application_lock); +} + +void * +sim_thread(void *arg) +{ + printf("Sim: thread started, now trying lock...\n"); + pthread_mutex_lock(&simulation_lock); + printf("Sim: got lock, now run\n"); + struct sim_args *args= (struct sim_args *)arg; + bool done= 0; + long steps2go= args->steps2go, steps= steps2go; + while (!done) + { + step_start(); + sys.PC++; + if (steps2go > 0) + { + steps--; + if (done= steps == 0) + printf("Sim: %s steps done\n", steps2go); + } + else if (steps2go == 0) + { + } + /*else if (steps2go < 0) + {*/ + if (done= !sys.simulating) + printf("Sim: requested to stop\n"); + /*}*/ + step_end(); + } + printf("Sim: finished, releasing lock...\n"); + pthread_mutex_unlock(&simulation_lock); + printf("Sim: done\n"); + return(NULL); +} + + +void +start_command(void) +{ + pthread_mutex_lock(&application_lock); +} + +void +end_command(void) +{ + pthread_mutex_unlock(&application_lock); +} + + +void +g_cmd(FILE *fin, FILE *fout) +{ + start_command(); + fprintf(fout, "PC=%ld, simulating=%d\n", sys.PC, sys.simulating); + end_command(); +} + +void +s_cmd(FILE *fin, FILE *fout) +{ + start_command(); + fscanf(fin, " %ld", &sys.PC); + fprintf(fout, "PC=%ld\n", sys.PC); + end_command(); +} + +void +start_simulation(int steps) +{ + struct sim_args sargs; + sargs.steps2go= steps; + sys.simulating= 1; + pthread_attr_t ta; + pthread_attr_init(&ta); + pthread_attr_setdetachstate(&ta, PTHREAD_CREATE_DETACHED); + pthread_create(&sim_th, &ta, sim_thread, &sargs); + pthread_attr_destroy(&ta); +} + +void +r_cmd(FILE *fin, FILE *fout) +{ + start_command(); + if (pthread_mutex_trylock(&simulation_lock) != 0) + { + fprintf(fout, "Simulation already runing\n"); + } + else + { + fprintf(fout, "Run from PC=%ld\n", sys.PC); + start_simulation(-1); + pthread_mutex_unlock(&simulation_lock); + } + end_command(); +} + +void +S_cmd(FILE *fin, FILE *fout) +{ + fprintf(fout, "Trying to get app lock...\n"); + start_command(); + fprintf(fout, "OK, lock is ours, set stopper flag...\n"); + sys.simulating= 0; + fprintf(fout, "Release lock, to give chance of stop\n"); + end_command(); + fprintf(fout, "Wait for stop...\n"); + pthread_mutex_lock(&simulation_lock); + fprintf(fout, "We got sim lock, so it stopped\n"); + pthread_mutex_unlock(&simulation_lock); + fprintf(fout, "Stopped at PC=%ld\n", sys.PC); +} + + +struct input_args { + int nr; + char *fin_name; + char *fout_name; +}; + +void * +input_thread(void *arg) +{ + struct input_args *args= (struct input_args *)arg; + FILE *fin, *fout; + if (args->fin_name) + fin= fopen(args->fin_name, "r"); + else + fin= stdin; + if (args->fout_name) + fout= fopen(args->fout_name, "w"); + else + fout= stdout; + bool done= 0; + while (!done) + { + char cmd[100]; + fprintf(fout, "%d> ", args->nr); fflush(fout); + fscanf(fin, " %99s", &cmd[0]); + fprintf(fout, "%d Got command: %c\n", args->nr, cmd[0]); + switch (cmd[0]) + { + case 'q': + done= 1; + break; + case 'g': + g_cmd(fin, fout); + break; + case 's': + s_cmd(fin, fout); + break; + case 'r': + r_cmd(fin, fout); + break; + case 'S': + S_cmd(fin, fout); + break; + default: + fprintf(fout, "%d Unknown command\n", args->nr); + break; + } + } + fprintf(fout, "%d Console finished\n", args->nr); + fclose(fin); + fclose(fout); + return(NULL); +} + + +int +main(int argc, char *argv[]) +{ + pthread_t input_th[3]; + int threads= 0; + + pthread_mutex_init(&simulation_lock, NULL); + pthread_mutex_init(&application_lock, NULL); + + struct input_args iargs= { 0, NULL, NULL }; + pthread_create(&input_th[0], NULL, input_thread, &iargs); + threads++; + if (argc > 1) + { + struct input_args iargs= { 1, argv[1], argv[1] }; + pthread_create(&input_th[1], NULL, input_thread, &iargs); + threads++; + } + if (argc > 2) + { + struct input_args iargs= { 2, argv[2], argv[2] }; + pthread_create(&input_th[2], NULL, input_thread, &iargs); + threads++; + } + int i; + for (i= 0; i < threads; i++) + { + void *ret; + pthread_join(input_th[i], &ret); + } + return(0); +} diff --git a/sim/ucsim/put(c) b/sim/ucsim/put(c) new file mode 100755 index 0000000..bd6aa0a --- /dev/null +++ b/sim/ucsim/put(c) @@ -0,0 +1,82 @@ +#!/bin/sh + +# Functions + +debug() +{ + if [ "$DEBUG" = "yes" ]; then + echo $* + fi +} + + +# Parsing options + +DEBUG=no +STARTYEAR=`date +%Y` +YEAR=`date +%y` +FILES="" + +while [ "$1" != "" ]; do +case $1 in + "-s") + shift + STARTYEAR=$1 + ;; + "-V") + DEBUG=yes + ;; + *) + if [ "$FILES" = "" ]; then + FILES=$1 + else + FILES="${FILES} ${1}" + fi + ;; +esac +shift +done + +debug "STARTYEAR= ${STARTYEAR}" +debug "FILES= ${FILES}" + + + +# Doing the job + +putit() +{ + sed -n '/^\/\*@1@\*\//,$p' $1 >${1}.tmp + if [ -f '(c).1' ]; then + (sed 's/@@F@@/'${1}'/g + s/@@S@@/'${STARTYEAR}'/g + s/@@Y@@/'${YEAR}'/g' '(c).1' + cat ${1}.tmp) >$1 + else + (cat <$1 + fi + rm -f ${1}.tmp +} + +for FILE in ${FILES}; do + debug "Checking ${FILE}..." + if grep '^/\*@1@\*/' $FILE >/dev/null; then + # can do + debug "/*@1@*/ marker found in ${FILE}" + putit $FILE + else + # can not + debug "/*@1@*/ marker not found in ${FILE}" + fi +done + + +# End of putcopyright diff --git a/sim/ucsim/s51.src/(c).1 b/sim/ucsim/s51.src/(c).1 new file mode 100644 index 0000000..d673f9f --- /dev/null +++ b/sim/ucsim/s51.src/(c).1 @@ -0,0 +1,25 @@ +/* + * Simulator of microcontrollers (@@F@@) + * + * Copyright (C) @@S@@,@@Y@@ Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ diff --git a/sim/ucsim/s51.src/Makefile.in b/sim/ucsim/s51.src/Makefile.in new file mode 100644 index 0000000..2c846bc --- /dev/null +++ b/sim/ucsim/s51.src/Makefile.in @@ -0,0 +1,160 @@ +# +# uCsim s51.src/Makefile +# +# (c) Drotos Daniel, Talker Bt. 1997 +# + +STARTYEAR = 1997 + +SHELL = /bin/sh +CXX = @CXX@ +CPP = @CPP@ +CXXCPP = @CXXCPP@ +RANLIB = @RANLIB@ +INSTALL = @INSTALL@ +STRIP = @STRIP@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +DEFS = $(subs -DHAVE_CONFIG_H,,@DEFS@) +CPPFLAGS = @CPPFLAGS@ -I$(srcdir) -I$(top_srcdir) -I$(top_builddir) \ + -I$(top_srcdir)/cmd.src -I$(top_srcdir)/sim.src \ + -I$(top_srcdir)/gui.src +CFLAGS = @CFLAGS@ -Wall +CXXFLAGS = @CXXFLAGS@ -Wall +LDFLAGS = @LDFLAGS@ +M_OR_MM = @M_OR_MM@ +PICOPT = @PICOPT@ +SHAREDLIB = @SHAREDLIB@ + +SDCC = sdcc +SDCFLAGS = --debug --stack-after-data --model-small +SDCPPFLAGS = + +LIBS = -L$(top_builddir) -lsim -lucsimutil -lguiucsim -lcmd -lsim @LIBS@ +DL = @DL@ +dl_ok = @dl_ok@ + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @infodir@ +srcdir = @srcdir@ +VPATH = @srcdir@ + +EXEEXT = @EXEEXT@ + +OBJECTS_SHARED = glob.o sim51.o \ + inc.o jmp.o mov.o logic.o arith.o bit.o \ + timer0.o timer1.o timer2.o serial.o port.o interrupt.o \ + wdt.o pca.o \ + uc51.o uc52.o uc51r.o uc89c51r.o uc251.o \ + uc390.o uc390hw.o +OBJECTS_EXE = s51.o +OBJECTS = $(OBJECTS_SHARED) $(OBJECTS_EXE) + +enable_dlso = @enable_dlso@ +dlso_ok = @dlso_ok@ + + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf otherlibs s51.src + + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: all installdirs + $(INSTALL) s51$(EXEEXT) $(DESTDIR)$(bindir)/s51$(EXEEXT) + $(STRIP) $(DESTDIR)$(bindir)/s51$(EXEEXT) + + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(DESTDIR)$(bindir)/s51$(EXEEXT) + + +# Performing self-test +# -------------------- +check: test + +test: test_ser.ihx + +test_ser.ihx: test_ser.rel + $(SDCC) $(SDCFLAGS) $< + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + test -d $(DESTDIR)$(bindir) || $(INSTALL) -d $(DESTDIR)$(bindir) + + +# Creating dependencies +# --------------------- +dep: Makefile.dep + +Makefile.dep: $(srcdir)/*.cc $(srcdir)/*.h + $(CXXCPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.cc,$^) >Makefile.dep + +-include Makefile.dep +include $(srcdir)/clean.mk + +#parser.cc: parser.y + +#plex.cc: plex.l + +# My rules +# -------- +.SUFFIXES: .rel + +s51.src: s51$(EXEEXT) shared_lib + +s51$(EXEEXT): $(OBJECTS) $(top_builddir)/*.a + $(CXX) $(CXXFLAGS) $(LDFLAGS) $(OBJECTS) $(LIBS) -o $@ + +ifeq ($(dlso_ok),yes) +shared_lib: $(top_builddir)/s51.so +else +shared_lib: + @$(top_srcdir)/mkecho $(top_builddir) "No 51 shared lib made." + @$(top_srcdir)/mkecho $(top_builddir) "(SHAREDLIB="$(SHAREDLIB)",dl_ok="$(dl_ok)",enable_dlso="$(enable_dlso)")" +endif + +$(top_builddir)/s51.so: $(OBJECTS_SHARED) + $(CXX) -shared $(LDFLAGS) $(OBJECTS_SHARED) -o $@ + +otherlibs: + $(MAKE) -C $(top_builddir) libs + $(MAKE) -C $(top_builddir)/cmd.src all + $(MAKE) -C $(top_builddir)/sim.src all + $(MAKE) -C $(top_builddir)/gui.src checkconf ucsim_lib + +.cc.o: + $(CXX) $(CXXFLAGS) $(PICOPT) $(CPPFLAGS) -c $< -o $@ + +.c.rel: + $(SDCC) $(SDCFLAGS) $(SDCPPFLAGS) -c $< + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" freshconf;\ + fi + +# End of s51.src/Makefile.in diff --git a/sim/ucsim/s51.src/arith.cc b/sim/ucsim/s51.src/arith.cc new file mode 100644 index 0000000..7e8da88 --- /dev/null +++ b/sim/ucsim/s51.src/arith.cc @@ -0,0 +1,532 @@ +/* + * Simulator of microcontrollers (arith.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include + +// local +#include "uc51cl.h" +#include "regs51.h" +#include "types51.h" + + +/* + * 0x03 1 12 RR A + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_rr(uchar code) +{ + uchar ac; + + ac= acc->read(); + if (ac & 0x01) + acc->write((ac >> 1) | 0x80); + else + acc->write(ac >> 1); + return(resGO); +} + + +/* + * 0x13 1 12 RRC A + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_rrc(uchar code) +{ + bool cy; + uchar ac; + + cy= SFR_GET_C; + SFR_SET_C((ac= acc->read()) & 0x01); + ac>>= 1; + if (cy) + ac|= 0x80; + sfr->write(ACC, ac); + return(resGO); +} + + +/* + * 0x23 1 12 RL A + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_rl(uchar code) +{ + uchar ac; + + ac= acc->read(); + if (ac & 0x80) + acc->write((ac << 1 ) | 0x01); + else + acc->write(ac << 1); + return(resGO); +} + + +/* + * 0x24 2 12 ADD A,#data + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_add_a_Sdata(uchar code) +{ + uchar data, ac; + bool newC, newA, c6; + + data= fetch(); + ac = acc->read(); + newC= (((uint)ac+(uint)(data)) > 255)?0x80:0; + newA= ((ac&0x0f)+(data&0x0f)) & 0xf0; + c6 = ((ac&0x7f)+(data&0x7f)) & 0x80; + acc->write(ac+data); + SFR_SET_C(newC); + SFR_SET_BIT(newC ^ c6, PSW, bmOV); + SFR_SET_BIT(newA, PSW, bmAC); + return(resGO); +} + + +/* + * 0x25 2 12 ADD A,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_add_a_addr(uchar code) +{ + uchar data, ac; + bool newC, newA, c6; + class cl_memory_cell *cell; + t_addr a; + + cell= get_direct(a= fetch()); + data= cell->read(); + ac = acc->get(); + newC= (((uint)ac+(uint)(data)) > 255)?0x80:0; + newA= ((ac&0x0f)+(data&0x0f)) & 0xf0; + c6 = ((ac&0x7f)+(data&0x7f)) & 0x80; + acc->write(ac+data); + SFR_SET_C(newC); + SFR_SET_BIT(newC ^ c6, PSW, bmOV); + SFR_SET_BIT(newA, PSW, bmAC); + return(resGO); +} + + +/* + * 0x26-0x27 1 12 ADD A,@Ri + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_add_a_Sri(uchar code) +{ + uchar data, ac; + bool newC, newA, c6; + class cl_memory_cell *cell; + + cell= iram->get_cell(get_reg(code & 0x01)->read()); + ac = acc->get(); + data= cell->read(); + newC= (((uint)ac+(uint)data) > 255)?0x80:0; + newA= ((ac&0x0f)+(data&0x0f)) & 0xf0; + c6 = ((ac&0x7f)+(data&0x7f)) & 0x80; + acc->write(ac+data); + SFR_SET_C(newC); + SFR_SET_BIT(newC ^ c6, PSW, bmOV); + SFR_SET_BIT(newA, PSW, bmAC); + return(resGO); +} + + +/* + * 0x28-0x2f 1 12 ADD A,Rn + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_add_a_rn(uchar code) +{ + uchar data, ac; + bool newC, newA, c6; + + data= get_reg(code & 0x07)->read(); + ac = acc->get(); + newC= (((uint)ac+(uint)data) > 255)?0x80:0; + newA= ((ac&0x0f)+(data&0x0f)) & 0xf0; + c6 = ((ac&0x7f)+(data&0x7f)) & 0x80; + acc->write(ac+data); + SFR_SET_C(newC); + SFR_SET_BIT(newC ^ c6, PSW, bmOV); + SFR_SET_BIT(newA, PSW, bmAC); + return(resGO); +} + + +/* + * 0x33 1 12 RLC A + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_rlc(uchar code) +{ + bool cy; + uchar ac; + + cy= SFR_GET_C; + SFR_SET_C((ac= acc->get()) & 0x80); + ac<<= 1; + if (cy) + ac|= 0x01; + acc->write(ac); + return(resGO); +} + + +/* + * 0x34 2 12 ADDC A,#data + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_addc_a_Sdata(uchar code) +{ + uchar data, ac; + bool orgC, newC, newA, c6; + + data= fetch(); + ac = acc->get(); + newC= (((uint)ac+(uint)data+((orgC= SFR_GET_C)?1:0)) > 255)?0x80:0; + newA= ((ac&0x0f)+(data&0x0f)+(orgC?1:0)) & 0xf0; + c6 = ((ac&0x7f)+(data&0x7f)+(orgC?1:0)) & 0x80; + acc->write(ac + data + (orgC?1:0)); + SFR_SET_C(newC); + SFR_SET_BIT(newC ^ c6, PSW, bmOV); + SFR_SET_BIT(newA, PSW, bmAC); + return(resGO); +} + + +/* + * 0x35 2 12 ADDC A,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_addc_a_addr(uchar code) +{ + uchar data, ac; + bool orgC, newC, newA, c6; + class cl_memory_cell *cell; + t_addr a; + + cell= get_direct(a= fetch()); + data= cell->read(); + ac = acc->get(); + newC= (((uint)ac+(uint)data+((orgC= SFR_GET_C)?1:0)) > 255)?0x80:0; + newA= ((ac&0x0f)+(data&0x0f)+(orgC?1:0)) & 0xf0; + c6 = ((ac&0x7f)+(data&0x7f)+(orgC?1:0)) & 0x80; + acc->write(ac + data + (orgC?1:0)); + SFR_SET_C(newC); + SFR_SET_BIT(newC ^ c6, PSW, bmOV); + SFR_SET_BIT(newA, PSW, bmAC); + return(resGO); +} + + +/* + * 0x36-0x37 1 12 ADDC A,@Ri + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_addc_a_Sri(uchar code) +{ + uchar data, ac; + bool orgC, newC, newA, c6; + class cl_memory_cell *cell; + + cell= iram->get_cell(get_reg(code & 0x01)->read()); + ac = acc->get(); + data= cell->read(); + newC= (((uint)ac+(uint)data+((orgC= SFR_GET_C)?1:0)) > 255)?0x80:0; + newA= ((ac&0x0f)+(data&0x0f)+(orgC?1:0)) & 0xf0; + c6 = ((ac&0x7f)+(data&0x7f)+(orgC?1:0)) & 0x80; + acc->write(ac + data + (orgC?1:0)); + SFR_SET_C(newC); + SFR_SET_BIT(newC ^ c6, PSW, bmOV); + SFR_SET_BIT(newA, PSW, bmAC); + return(resGO); +} + + +/* + * 0x38-0x3f 1 12 ADDC A,Rn + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_addc_a_rn(uchar code) +{ + uchar data, ac; + bool orgC, newC, newA, c6; + + data= get_reg(code & 0x07)->read(); + ac = acc->get(); + newC= (((uint)ac+(uint)data+((orgC= SFR_GET_C)?1:0)) > 255)?0x80:0; + newA= ((ac&0x0f)+(data&0x0f)+(orgC?1:0)) & 0xf0; + c6 = ((ac&0x7f)+(data&0x7f)+(orgC?1:0)) & 0x80; + acc->write(ac + data + (orgC?1:0)); + SFR_SET_C(newC); + SFR_SET_BIT(newC ^ c6, PSW, bmOV); + SFR_SET_BIT(newA, PSW, bmAC); + return(resGO); +} + + +/* + * 0x84 1 48 DIV AB + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_div_ab(uchar code) +{ + uchar temp, pw, b, ac; + + pw= psw->get(); + pw&= ~bmCY; + if (!(b= sfr->get(B))) + pw|= bmOV; + else + { + pw&= ~bmOV; + temp= (ac= acc->get()) / b; + sfr->write(B, ac % b); + acc->write(temp); + } + psw->write(pw); + tick(3); + return(resGO); +} + + +/* + * 0x94 2 12 SUBB A,#data + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_subb_a_Sdata(uchar code) +{ + uchar data, ac, result, pw, c; + + data= fetch(); + ac = acc->get(); + result= ac-data; + pw= psw->get(); + if ((c= (pw & bmCY)?1:0)) + result--; + acc->write(result); + psw->write((pw & ~(bmCY|bmOV|bmAC)) | + (((unsigned int)ac < (unsigned int)(data+c))?bmCY:0) | + (((ac<0x80 && data>0x7f && result>0x7f) || + (ac>0x7f && data<0x80 && result<0x80))?bmOV:0) | + (((ac&0x0f) < ((data+c)&0x0f) || + (c && ((data&0x0f)==0x0f)))?bmAC:0)); + return(resGO); +} + + +/* + * 0x95 2 12 SUBB A,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_subb_a_addr(uchar code) +{ + uchar data, ac, result, pw, c; + class cl_memory_cell *cell; + + cell= get_direct(fetch()); + ac = acc->get(); + data= cell->read(); + result= ac-data; + pw= psw->get(); + if ((c= (pw & bmCY)?1:0)) + result--; + acc->write(result); + psw->set((pw & ~(bmCY|bmOV|bmAC)) | + (((unsigned int)ac < (unsigned int)(data+c))?bmCY:0) | + (((ac<0x80 && data>0x7f && result>0x7f) || + (ac>0x7f && data<0x80 && result<0x80))?bmOV:0) | + (((ac&0x0f) < ((data+c)&0x0f) || + (c && ((data&0x0f)==0x0f)))?bmAC:0)); + return(resGO); +} + + +/* + * 0x96-0x97 1 12 SUBB A,@Ri + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_subb_a_Sri(uchar code) +{ + uchar data, ac, result, pw, c; + class cl_memory_cell *cell; + + cell= iram->get_cell(get_reg(code & 0x01)->read()); + data= cell->read(); + ac = acc->get(); + result= ac-data; + pw= psw->get(); + if ((c= (pw & bmCY)?1:0)) + result--; + acc->write(result); + psw->write((pw & ~(bmCY|bmOV|bmAC)) | + (((unsigned int)ac < (unsigned int)(data+c))?bmCY:0) | + (((ac<0x80 && data>0x7f && result>0x7f) || + (ac>0x7f && data<0x80 && result<0x80))?bmOV:0) | + (((ac&0x0f) < ((data+c)&0x0f) || + (c && ((data&0x0f)==0x0f)))?bmAC:0)); + return(resGO); +} + + +/* + * 0x98-0x9f 1 12 SUBB A,Rn + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_subb_a_rn(uchar code) +{ + uchar data, ac, result, pw, c; + + data= get_reg(code & 0x07)->read(); + ac = acc->get(); + result= ac-data; + pw= psw->get(); + if ((c= (pw & bmCY)?1:0)) + result--; + acc->write(result); + psw->write((pw & ~(bmCY|bmOV|bmAC)) | + (((unsigned int)ac < (unsigned int)(data+c))?bmCY:0) | + (((ac<0x80 && data>0x7f && result>0x7f) || + (ac>0x7f && data<0x80 && result<0x80))?bmOV:0) | + (((ac&0x0f) < ((data+c)&0x0f) || + (c && ((data&0x0f)==0x0f)))?bmAC:0)); + return(resGO); +} + + +/* + * 0xa4 1 48 MUL AB + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mul_ab(uchar code) +{ + uint temp, pw, ac, b, x; + + pw= psw->get(); + pw&= ~bmCY; + temp= (ac= acc->read()) * (b= sfr->get(B)); + acc->write(temp & 0xff); + x= sfr->write(B, (temp >> 8) & 0xff); + SFR_SET_BIT(x/*sfr->get(B)*/, PSW, bmOV); + SFR_SET_BIT(0, PSW, bmCY); + tick(3); + return(resGO); +} + + +/* + * 0xd4 1 12 DA A + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_da_a(uchar code) +{ + uchar ac, pw; + + ac= acc->get(); + pw= psw->get(); + if ((ac & 0x0f) > 9 || + (pw & bmAC)) + { + if (((uint)ac+(uint)0x06) > 255) + pw|= bmCY; + ac+= 0x06; + } + if ((ac & 0xf0) > 0x90 || + (pw & bmCY)) + { + if (((uint)ac+(uint)0x60) > 255) + pw|= bmCY; + ac+= 0x60; + } + acc->write(ac); + psw->write(pw); + return(resGO); +} + + +/* End of s51.src/arith.cc */ diff --git a/sim/ucsim/s51.src/bit.cc b/sim/ucsim/s51.src/bit.cc new file mode 100644 index 0000000..7b55a33 --- /dev/null +++ b/sim/ucsim/s51.src/bit.cc @@ -0,0 +1,266 @@ +/* + * Simulator of microcontrollers (bit.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +// local +#include "uc51cl.h" +#include "regs51.h" +#include "types51.h" + + +/* + * 0x72 2 24 ORL C,bit + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_orl_c_bit(uchar code) +{ + uchar bitaddr; + + t_addr a; + t_mem m; + class cl_address_space *mem; + mem= bit2mem(bitaddr= fetch(), &a, &m); + SFR_SET_C(SFR_GET_C || + (mem->read(a) & m)); + tick(1); + return(resGO); +} + + +/* + * 0x82 2 24 ANL C,bit + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_anl_c_bit(uchar code) +{ + t_mem m; + t_addr a; + class cl_address_space *mem; + + mem= bit2mem(fetch(), &a, &m); + SFR_SET_C(SFR_GET_C && + (mem->read(a) & m)); + tick(1); + return(resGO); +} + + +/* + * 0x92 2 24 MOV bit,C + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_bit_c(uchar code) +{ + t_addr a; + t_mem m, d; + class cl_address_space *mem; + + mem= bit2mem(fetch(), &a, &m); + d= mem->read(a, HW_PORT); + if (SFR_GET_C) + mem->write(a, d|m); + else + mem->write(a, d&~m); + tick(1); + return(resGO); +} + + +/* + * 0xa2 2 12 MOV C,bit + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_c_bit(uchar code) +{ + t_addr a; + t_mem m; + class cl_address_space *mem; + + mem= bit2mem(fetch(), &a, &m); + SFR_SET_C(mem->read(a) & m); + return(resGO); +} + + +/* + * 0xa0 2 24 ORL C,/bit + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_orl_c_Sbit(uchar code) +{ + t_mem m; + t_addr a; + class cl_address_space *mem; + + mem= bit2mem(fetch(), &a, &m); + SFR_SET_C(SFR_GET_C || + !(mem->read(a) & m)); + tick(1); + return(resGO); +} + + +/* + * 0xb0 2 24 ANL C,/bit + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_anl_c_Sbit(uchar code) +{ + t_mem m; + t_addr a; + class cl_address_space *mem; + + mem= bit2mem(fetch(), &a, &m); + SFR_SET_C(SFR_GET_C && + !(mem->read(a) & m)); + tick(1); + return(resGO); +} + + +/* + * 0xb2 2 12 CPL bit + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_cpl_bit(uchar code) +{ + t_addr a; + t_mem m, d; + class cl_address_space *mem; + + mem= bit2mem(fetch(), &a, &m); + d= mem->read(a, HW_PORT); + mem->write(a, d^m); + return(resGO); +} + + +/* + * 0xb3 1 12 CPL C + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_cpl_c(uchar code) +{ + psw->write(psw->read() ^ bmCY); + return(resGO); +} + + +/* + * 0xc2 2 12 CLR bit + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_clr_bit(uchar code) +{ + t_addr a; + t_mem m; + class cl_address_space *mem; + + mem= bit2mem(fetch(), &a, &m); + t_mem d= mem->read(a, HW_PORT); + mem->write(a, d&~m); + return(resGO); +} + + +/* + * 0xc3 1 12 CLR C + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_clr_c(uchar code) +{ + psw->write(psw->read() & ~bmCY); + return(resGO); +} + + +/* + * 0xd2 2 12 SETB bit + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_setb_bit(uchar code) +{ + t_addr a; + t_mem m, d; + class cl_address_space *mem; + + mem= bit2mem(fetch(), &a, &m); + d= mem->read(a, HW_PORT); + mem->write(a, d|m); + return(resGO); +} + + +/* + * 0xd3 1 12 SETB C + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_setb_c(uchar code) +{ + psw->write(psw->read() | bmCY); + return(resGO); +} + + +/* End of s51.src/bit.cc */ diff --git a/sim/ucsim/s51.src/clean.mk b/sim/ucsim/s51.src/clean.mk new file mode 100644 index 0000000..72a866e --- /dev/null +++ b/sim/ucsim/s51.src/clean.mk @@ -0,0 +1,29 @@ +# uCsim s51.src/clean.mk + +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] + rm -f test_*.??* '(null).cdb' *.lnk *.ihx + rm -f .[a-z]*~ + rm -f s51$(EXEEXT) + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f config.cache config.log config.status + rm -f Makefile *.dep + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean + +# End of s51.src/clean.mk diff --git a/sim/ucsim/s51.src/conf.mk b/sim/ucsim/s51.src/conf.mk new file mode 100644 index 0000000..ca9aeb9 --- /dev/null +++ b/sim/ucsim/s51.src/conf.mk @@ -0,0 +1,11 @@ +# uCsim s51.src/conf.mk +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_builddir) && $(SHELL) ./config.status + +# End of s51.src/conf.mk diff --git a/sim/ucsim/s51.src/debugger b/sim/ucsim/s51.src/debugger new file mode 100755 index 0000000..4a30ac9 --- /dev/null +++ b/sim/ucsim/s51.src/debugger @@ -0,0 +1 @@ +sdcdb -s /dev/ttyp1 "$@" diff --git a/sim/ucsim/s51.src/glob.cc b/sim/ucsim/s51.src/glob.cc new file mode 100644 index 0000000..f09e8f2 --- /dev/null +++ b/sim/ucsim/s51.src/glob.cc @@ -0,0 +1,596 @@ +/* + * Simulator of microcontrollers (glob.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + + +#include + +#include "stypes.h" + + +/* + * Names of instructions + */ + +struct dis_entry disass_51[]= { + { 0x00, 0xff, ' ', 1, "NOP"}, + { 0x01, 0xff, 'A', 2, "AJMP %A"}, + { 0x02, 0xff, 'L', 3, "LJMP %l"}, + { 0x03, 0xff, ' ', 1, "RR A"}, + { 0x04, 0xff, ' ', 1, "INC A"}, + { 0x05, 0xff, ' ', 2, "INC %a"}, + { 0x06, 0xff, ' ', 1, "INC @R0"}, + { 0x07, 0xff, ' ', 1, "INC @R1"}, + { 0x08, 0xff, ' ', 1, "INC R0"}, + { 0x09, 0xff, ' ', 1, "INC R1"}, + { 0x0a, 0xff, ' ', 1, "INC R2"}, + { 0x0b, 0xff, ' ', 1, "INC R3"}, + { 0x0c, 0xff, ' ', 1, "INC R4"}, + { 0x0d, 0xff, ' ', 1, "INC R5"}, + { 0x0e, 0xff, ' ', 1, "INC R6"}, + { 0x0f, 0xff, ' ', 1, "INC R7"}, + { 0x10, 0xff, 'R', 3, "JBC %b,%R"}, + { 0x11, 0xff, 'a', 2, "ACALL %A"}, + { 0x12, 0xff, 'l', 3, "LCALL %l"}, + { 0x13, 0xff, ' ', 1, "RRC A"}, + { 0x14, 0xff, ' ', 1, "DEC A"}, + { 0x15, 0xff, ' ', 2, "DEC %a"}, + { 0x16, 0xff, ' ', 1, "DEC @R0"}, + { 0x17, 0xff, ' ', 1, "DEC @R1"}, + { 0x18, 0xff, ' ', 1, "DEC R0"}, + { 0x19, 0xff, ' ', 1, "DEC R1"}, + { 0x1a, 0xff, ' ', 1, "DEC R2"}, + { 0x1b, 0xff, ' ', 1, "DEC R3"}, + { 0x1c, 0xff, ' ', 1, "DEC R4"}, + { 0x1d, 0xff, ' ', 1, "DEC R5"}, + { 0x1e, 0xff, ' ', 1, "DEC R6"}, + { 0x1f, 0xff, ' ', 1, "DEC R7"}, + { 0x20, 0xff, 'R', 3, "JB %b,%R"}, + { 0x21, 0xff, 'A', 2, "AJMP %A"}, + { 0x22, 0xff, '_', 1, "RET"}, + { 0x23, 0xff, ' ', 1, "RL A"}, + { 0x24, 0xff, ' ', 2, "ADD A,#%d"}, + { 0x25, 0xff, ' ', 2, "ADD A,%a"}, + { 0x26, 0xff, ' ', 1, "ADD A,@R0"}, + { 0x27, 0xff, ' ', 1, "ADD A,@R1"}, + { 0x28, 0xff, ' ', 1, "ADD A,R0"}, + { 0x29, 0xff, ' ', 1, "ADD A,R1"}, + { 0x2a, 0xff, ' ', 1, "ADD A,R2"}, + { 0x2b, 0xff, ' ', 1, "ADD A,R3"}, + { 0x2c, 0xff, ' ', 1, "ADD A,R4"}, + { 0x2d, 0xff, ' ', 1, "ADD A,R5"}, + { 0x2e, 0xff, ' ', 1, "ADD A,R6"}, + { 0x2f, 0xff, ' ', 1, "ADD A,R7"}, + { 0x30, 0xff, 'R', 3, "JNB %b,%R"}, + { 0x31, 0xff, 'a', 2, "ACALL %A"}, + { 0x32, 0xff, '_', 1, "RETI"}, + { 0x33, 0xff, ' ', 1, "RLC A"}, + { 0x34, 0xff, ' ', 2, "ADDC A,#%d"}, + { 0x35, 0xff, ' ', 2, "ADDC A,%a"}, + { 0x36, 0xff, ' ', 1, "ADDC A,@R0"}, + { 0x37, 0xff, ' ', 1, "ADDC A,@R1"}, + { 0x38, 0xff, ' ', 1, "ADDC A,R0"}, + { 0x39, 0xff, ' ', 1, "ADDC A,R1"}, + { 0x3a, 0xff, ' ', 1, "ADDC A,R2"}, + { 0x3b, 0xff, ' ', 1, "ADDC A,R3"}, + { 0x3c, 0xff, ' ', 1, "ADDC A,R4"}, + { 0x3d, 0xff, ' ', 1, "ADDC A,R5"}, + { 0x3e, 0xff, ' ', 1, "ADDC A,R6"}, + { 0x3f, 0xff, ' ', 1, "ADDC A,R7"}, + { 0x40, 0xff, 'r', 2, "JC %r"}, + { 0x41, 0xff, 'A', 2, "AJMP %A"}, + { 0x42, 0xff, ' ', 2, "ORL %a,A"}, + { 0x43, 0xff, ' ', 3, "ORL %a,#%D"}, + { 0x44, 0xff, ' ', 2, "ORL A,#%d"}, + { 0x45, 0xff, ' ', 2, "ORL A,%a"}, + { 0x46, 0xff, ' ', 1, "ORL A,@R0"}, + { 0x47, 0xff, ' ', 1, "ORL A,@R1"}, + { 0x48, 0xff, ' ', 1, "ORL A,R0"}, + { 0x49, 0xff, ' ', 1, "ORL A,R1"}, + { 0x4a, 0xff, ' ', 1, "ORL A,R2"}, + { 0x4b, 0xff, ' ', 1, "ORL A,R3"}, + { 0x4c, 0xff, ' ', 1, "ORL A,R4"}, + { 0x4d, 0xff, ' ', 1, "ORL A,R5"}, + { 0x4e, 0xff, ' ', 1, "ORL A,R6"}, + { 0x4f, 0xff, ' ', 1, "ORL A,R7"}, + { 0x50, 0xff, 'r', 2, "JNC %r"}, + { 0x51, 0xff, 'a', 2, "ACALL %A"}, + { 0x52, 0xff, ' ', 2, "ANL %a,A"}, + { 0x53, 0xff, ' ', 3, "ANL %a,#%D"}, + { 0x54, 0xff, ' ', 2, "ANL A,#%d"}, + { 0x55, 0xff, ' ', 2, "ANL A,%a"}, + { 0x56, 0xff, ' ', 1, "ANL A,@R0"}, + { 0x57, 0xff, ' ', 1, "ANL A,@R1"}, + { 0x58, 0xff, ' ', 1, "ANL A,R0"}, + { 0x59, 0xff, ' ', 1, "ANL A,R1"}, + { 0x5a, 0xff, ' ', 1, "ANL A,R2"}, + { 0x5b, 0xff, ' ', 1, "ANL A,R3"}, + { 0x5c, 0xff, ' ', 1, "ANL A,R4"}, + { 0x5d, 0xff, ' ', 1, "ANL A,R5"}, + { 0x5e, 0xff, ' ', 1, "ANL A,R6"}, + { 0x5f, 0xff, ' ', 1, "ANL A,R7"}, + { 0x60, 0xff, 'r', 2, "JZ %r"}, + { 0x61, 0xff, 'A', 2, "AJMP %A"}, + { 0x62, 0xff, ' ', 2, "XRL %a,A"}, + { 0x63, 0xff, ' ', 3, "XRL %a,#%D"}, + { 0x64, 0xff, ' ', 2, "XRL A,#%d"}, + { 0x65, 0xff, ' ', 2, "XRL A,%a"}, + { 0x66, 0xff, ' ', 1, "XRL A,@R0"}, + { 0x67, 0xff, ' ', 1, "XRL A,@R1"}, + { 0x68, 0xff, ' ', 1, "XRL A,R0"}, + { 0x69, 0xff, ' ', 1, "XRL A,R1"}, + { 0x6a, 0xff, ' ', 1, "XRL A,R2"}, + { 0x6b, 0xff, ' ', 1, "XRL A,R3"}, + { 0x6c, 0xff, ' ', 1, "XRL A,R4"}, + { 0x6d, 0xff, ' ', 1, "XRL A,R5"}, + { 0x6e, 0xff, ' ', 1, "XRL A,R6"}, + { 0x6f, 0xff, ' ', 1, "XRL A,R7"}, + { 0x70, 0xff, 'r', 2, "JNZ %r"}, + { 0x71, 0xff, 'a', 2, "ACALL %A"}, + { 0x72, 0xff, ' ', 2, "ORL C,%b"}, + { 0x73, 0xff, '_', 1, "JMP @A+DPTR"}, + { 0x74, 0xff, ' ', 2, "MOV A,#%d"}, + { 0x75, 0xff, ' ', 3, "MOV %a,#%D"}, + { 0x76, 0xff, ' ', 2, "MOV @R0,#%d"}, + { 0x77, 0xff, ' ', 2, "MOV @R1,#%d"}, + { 0x78, 0xff, ' ', 2, "MOV R0,#%d"}, + { 0x79, 0xff, ' ', 2, "MOV R1,#%d"}, + { 0x7a, 0xff, ' ', 2, "MOV R2,#%d"}, + { 0x7b, 0xff, ' ', 2, "MOV R3,#%d"}, + { 0x7c, 0xff, ' ', 2, "MOV R4,#%d"}, + { 0x7d, 0xff, ' ', 2, "MOV R5,#%d"}, + { 0x7e, 0xff, ' ', 2, "MOV R6,#%d"}, + { 0x7f, 0xff, ' ', 2, "MOV R7,#%d"}, + { 0x80, 0xff, 's', 2, "SJMP %r"}, + { 0x81, 0xff, 'A', 2, "AJMP %A"}, + { 0x82, 0xff, ' ', 2, "ANL C,%b"}, + { 0x83, 0xff, ' ', 1, "MOVC A,@A+PC"}, + { 0x84, 0xff, ' ', 1, "DIV AB"}, + { 0x85, 0xff, ' ', 3, "MOV %8,%a"}, + { 0x86, 0xff, ' ', 2, "MOV %a,@R0"}, + { 0x87, 0xff, ' ', 2, "MOV %a,@R1"}, + { 0x88, 0xff, ' ', 2, "MOV %a,R0"}, + { 0x89, 0xff, ' ', 2, "MOV %a,R1"}, + { 0x8a, 0xff, ' ', 2, "MOV %a,R2"}, + { 0x8b, 0xff, ' ', 2, "MOV %a,R3"}, + { 0x8c, 0xff, ' ', 2, "MOV %a,R4"}, + { 0x8d, 0xff, ' ', 2, "MOV %a,R5"}, + { 0x8e, 0xff, ' ', 2, "MOV %a,R6"}, + { 0x8f, 0xff, ' ', 2, "MOV %a,R7"}, + { 0x90, 0xff, ' ', 3, "MOV DPTR,#%6"}, + { 0x91, 0xff, 'a', 2, "ACALL %A"}, + { 0x92, 0xff, ' ', 2, "MOV %b,C"}, + { 0x93, 0xff, ' ', 1, "MOVC A,@A+DPTR"}, + { 0x94, 0xff, ' ', 2, "SUBB A,#%d"}, + { 0x95, 0xff, ' ', 2, "SUBB A,%a"}, + { 0x96, 0xff, ' ', 1, "SUBB A,@R0"}, + { 0x97, 0xff, ' ', 1, "SUBB A,@R1"}, + { 0x98, 0xff, ' ', 1, "SUBB A,R0"}, + { 0x99, 0xff, ' ', 1, "SUBB A,R1"}, + { 0x9a, 0xff, ' ', 1, "SUBB A,R2"}, + { 0x9b, 0xff, ' ', 1, "SUBB A,R3"}, + { 0x9c, 0xff, ' ', 1, "SUBB A,R4"}, + { 0x9d, 0xff, ' ', 1, "SUBB A,R5"}, + { 0x9e, 0xff, ' ', 1, "SUBB A,R6"}, + { 0x9f, 0xff, ' ', 1, "SUBB A,R7"}, + { 0xa0, 0xff, ' ', 2, "ORL C,/%b"}, + { 0xa1, 0xff, 'A', 2, "AJMP %A"}, + { 0xa2, 0xff, ' ', 2, "MOV C,%b"}, + { 0xa3, 0xff, ' ', 1, "INC DPTR"}, + { 0xa4, 0xff, ' ', 1, "MUL AB"}, + { 0xa5, 0xff, '_', 1, "-"}, + { 0xa6, 0xff, ' ', 2, "MOV @R0,%a"}, + { 0xa7, 0xff, ' ', 2, "MOV @R1,%a"}, + { 0xa8, 0xff, ' ', 2, "MOV R0,%a"}, + { 0xa9, 0xff, ' ', 2, "MOV R1,%a"}, + { 0xaa, 0xff, ' ', 2, "MOV R2,%a"}, + { 0xab, 0xff, ' ', 2, "MOV R3,%a"}, + { 0xac, 0xff, ' ', 2, "MOV R4,%a"}, + { 0xad, 0xff, ' ', 2, "MOV R5,%a"}, + { 0xae, 0xff, ' ', 2, "MOV R6,%a"}, + { 0xaf, 0xff, ' ', 2, "MOV R7,%a"}, + { 0xb0, 0xff, ' ', 2, "ANL C,/%b"}, + { 0xb1, 0xff, 'a', 2, "ACALL %A"}, + { 0xb2, 0xff, ' ', 2, "CPL %b"}, + { 0xb3, 0xff, ' ', 1, "CPL C"}, + { 0xb4, 0xff, 'R', 3, "CJNE A,#%d,%R"}, + { 0xb5, 0xff, 'R', 3, "CJNE A,%a,%R"}, + { 0xb6, 0xff, 'R', 3, "CJNE @R0,#%d,%R"}, + { 0xb7, 0xff, 'R', 3, "CJNE @R1,#%d,%R"}, + { 0xb8, 0xff, 'R', 3, "CJNE R0,#%d,%R"}, + { 0xb9, 0xff, 'R', 3, "CJNE R1,#%d,%R"}, + { 0xba, 0xff, 'R', 3, "CJNE R2,#%d,%R"}, + { 0xbb, 0xff, 'R', 3, "CJNE R3,#%d,%R"}, + { 0xbc, 0xff, 'R', 3, "CJNE R4,#%d,%R"}, + { 0xbd, 0xff, 'R', 3, "CJNE R5,#%d,%R"}, + { 0xbe, 0xff, 'R', 3, "CJNE R6,#%d,%R"}, + { 0xbf, 0xff, 'R', 3, "CJNE R7,#%d,%R"}, + { 0xc0, 0xff, ' ', 2, "PUSH %a"}, + { 0xc1, 0xff, 'A', 2, "AJMP %A"}, + { 0xc2, 0xff, ' ', 2, "CLR %b"}, + { 0xc3, 0xff, ' ', 1, "CLR C"}, + { 0xc4, 0xff, ' ', 1, "SWAP A"}, + { 0xc5, 0xff, ' ', 2, "XCH A,%a"}, + { 0xc6, 0xff, ' ', 1, "XCH A,@R0"}, + { 0xc7, 0xff, ' ', 1, "XCH A,@R1"}, + { 0xc8, 0xff, ' ', 1, "XCH A,R0"}, + { 0xc9, 0xff, ' ', 1, "XCH A,R1"}, + { 0xca, 0xff, ' ', 1, "XCH A,R2"}, + { 0xcb, 0xff, ' ', 1, "XCH A,R3"}, + { 0xcc, 0xff, ' ', 1, "XCH A,R4"}, + { 0xcd, 0xff, ' ', 1, "XCH A,R5"}, + { 0xce, 0xff, ' ', 1, "XCH A,R6"}, + { 0xcf, 0xff, ' ', 1, "XCH A,R7"}, + { 0xd0, 0xff, ' ', 2, "POP %a"}, + { 0xd1, 0xff, 'a', 2, "ACALL %A"}, + { 0xd2, 0xff, ' ', 2, "SETB %b"}, + { 0xd3, 0xff, ' ', 1, "SETB C"}, + { 0xd4, 0xff, ' ', 1, "DA A"}, + { 0xd5, 0xff, 'R', 3, "DJNZ %a,%R"}, + { 0xd6, 0xff, ' ', 1, "XCHD A,@R0"}, + { 0xd7, 0xff, ' ', 1, "XCHD A,@R1"}, + { 0xd8, 0xff, 'r', 2, "DJNZ R0,%r"}, + { 0xd9, 0xff, 'r', 2, "DJNZ R1,%r"}, + { 0xda, 0xff, 'r', 2, "DJNZ R2,%r"}, + { 0xdb, 0xff, 'r', 2, "DJNZ R3,%r"}, + { 0xdc, 0xff, 'r', 2, "DJNZ R4,%r"}, + { 0xdd, 0xff, 'r', 2, "DJNZ R5,%r"}, + { 0xde, 0xff, 'r', 2, "DJNZ R6,%r"}, + { 0xdf, 0xff, 'r', 2, "DJNZ R7,%r"}, + { 0xe0, 0xff, ' ', 1, "MOVX A,@DPTR"}, + { 0xe1, 0xff, 'A', 2, "AJMP %A"}, + { 0xe2, 0xff, ' ', 1, "MOVX A,@R0"}, + { 0xe3, 0xff, ' ', 1, "MOVX A,@R1"}, + { 0xe4, 0xff, ' ', 1, "CLR A"}, + { 0xe5, 0xff, ' ', 2, "MOV A,%a"}, + { 0xe6, 0xff, ' ', 1, "MOV A,@R0"}, + { 0xe7, 0xff, ' ', 1, "MOV A,@R1"}, + { 0xe8, 0xff, ' ', 1, "MOV A,R0"}, + { 0xe9, 0xff, ' ', 1, "MOV A,R1"}, + { 0xea, 0xff, ' ', 1, "MOV A,R2"}, + { 0xeb, 0xff, ' ', 1, "MOV A,R3"}, + { 0xec, 0xff, ' ', 1, "MOV A,R4"}, + { 0xed, 0xff, ' ', 1, "MOV A,R5"}, + { 0xee, 0xff, ' ', 1, "MOV A,R6"}, + { 0xef, 0xff, ' ', 1, "MOV A,R7"}, + { 0xf0, 0xff, ' ', 1, "MOVX @DPTR,A"}, + { 0xf1, 0xff, 'a', 2, "ACALL %A"}, + { 0xf2, 0xff, ' ', 1, "MOVX @R0,A"}, + { 0xf3, 0xff, ' ', 1, "MOVX @R1,A"}, + { 0xf4, 0xff, ' ', 1, "CPL A"}, + { 0xf5, 0xff, ' ', 2, "MOV %a,A"}, + { 0xf6, 0xff, ' ', 1, "MOV @R0,A"}, + { 0xf7, 0xff, ' ', 1, "MOV @R1,A"}, + { 0xf8, 0xff, ' ', 1, "MOV R0,A"}, + { 0xf9, 0xff, ' ', 1, "MOV R1,A"}, + { 0xfa, 0xff, ' ', 1, "MOV R2,A"}, + { 0xfb, 0xff, ' ', 1, "MOV R3,A"}, + { 0xfc, 0xff, ' ', 1, "MOV R4,A"}, + { 0xfd, 0xff, ' ', 1, "MOV R5,A"}, + { 0xfe, 0xff, ' ', 1, "MOV R6,A"}, + { 0xff, 0xff, ' ', 1, "MOV R7,A"}, + { 0, 0, 0, 0, NULL } +}; + + +/* + * Names of SFR cells + */ + +struct name_entry sfr_tab51[]= +{ + {CPU_251, 0x84, "DPXL"}, + {CPU_251|CPU_DS390|CPU_DS390F, 0x93, "DPX"}, + {CPU_251, 0xa8, "IE0"}, + {CPU_251, 0xb7, "IPH0"}, + {CPU_251, 0xb8, "IPL0"}, + {CPU_251, 0xbd, "SPH"}, + {CPU_251, 0xd1, "PSW1"}, + + {CPU_DS390|CPU_DS390F, 0x80, "P4"}, + {CPU_DS390|CPU_DS390F, 0x84, "DPL1"}, + {CPU_DS390|CPU_DS390F, 0x85, "DPH1"}, + {CPU_DS390|CPU_DS390F, 0x86, "DPS"}, + {CPU_DS390|CPU_DS390F, 0x8e, "CKCON"}, + {CPU_DS390|CPU_DS390F, 0x91, "EXIF"}, + {CPU_DS390|CPU_DS390F, 0x92, "P4CNT"}, + {CPU_DS390|CPU_DS390F, 0x95, "DPX1"}, + {CPU_DS390|CPU_DS390F, 0x96, "C0RMS0"}, + {CPU_DS390|CPU_DS390F, 0x97, "C0RMS1"}, + {CPU_DS390|CPU_DS390F, 0x98, "SCON0"}, + {CPU_DS390|CPU_DS390F, 0x99, "SBUF0"}, + {CPU_DS390|CPU_DS390F, 0x9b, "ESP"}, + {CPU_DS390|CPU_DS390F, 0x9c, "AP"}, + {CPU_DS390|CPU_DS390F, 0x9d, "ACON"}, + {CPU_DS390|CPU_DS390F, 0x9e, "C0TMA0"}, + {CPU_DS390|CPU_DS390F, 0x9f, "C0TMA1"}, + {CPU_DS390|CPU_DS390F, 0xa1, "P5"}, + {CPU_DS390|CPU_DS390F, 0xa2, "P5CNT"}, + {CPU_DS390|CPU_DS390F, 0xa3, "C0C"}, + {CPU_DS390|CPU_DS390F, 0xa4, "C0S"}, + {CPU_DS390|CPU_DS390F, 0xa5, "C0IR"}, + {CPU_DS390|CPU_DS390F, 0xa6, "C0TE"}, + {CPU_DS390|CPU_DS390F, 0xa7, "C0RE"}, + {CPU_DS390|CPU_DS390F, 0xa9, "SADDR0"}, + {CPU_DS390|CPU_DS390F, 0xaa, "SADDR1"}, + {CPU_DS390|CPU_DS390F, 0xab, "C0M1C"}, + {CPU_DS390|CPU_DS390F, 0xac, "C0M2C"}, + {CPU_DS390|CPU_DS390F, 0xad, "C0M3C"}, + {CPU_DS390|CPU_DS390F, 0xae, "C0M4C"}, + {CPU_DS390|CPU_DS390F, 0xaf, "C0M5C"}, + {CPU_DS390|CPU_DS390F, 0xb3, "C0M6C"}, + {CPU_DS390|CPU_DS390F, 0xb4, "C0M7C"}, + {CPU_DS390|CPU_DS390F, 0xb5, "C0M8C"}, + {CPU_DS390|CPU_DS390F, 0xb6, "C0M9C"}, + {CPU_DS390|CPU_DS390F, 0xb7, "C0M10C"}, + {CPU_DS390|CPU_DS390F, 0xb9, "SADEN0"}, + {CPU_DS390|CPU_DS390F, 0xba, "SADEN1"}, + {CPU_DS390|CPU_DS390F, 0xbb, "C0M11C"}, + {CPU_DS390|CPU_DS390F, 0xbc, "C0M12C"}, + {CPU_DS390|CPU_DS390F, 0xbd, "C0M13C"}, + {CPU_DS390|CPU_DS390F, 0xbe, "C0M14C"}, + {CPU_DS390|CPU_DS390F, 0xbf, "C0M15C"}, + {CPU_DS390|CPU_DS390F, 0xc0, "SCON1"}, + {CPU_DS390|CPU_DS390F, 0xc1, "SBUF1"}, + {CPU_DS390|CPU_DS390F, 0xc4, "PMR"}, + {CPU_DS390|CPU_DS390F, 0xc5, "STATUS"}, + {CPU_DS390|CPU_DS390F, 0xc6, "MCON"}, + {CPU_DS390|CPU_DS390F, 0xc7, "TA"}, + {CPU_DS390|CPU_DS390F, 0xce, "COR"}, + {CPU_DS390|CPU_DS390F, 0xd1, "MCNT0"}, + {CPU_DS390|CPU_DS390F, 0xd2, "MCNT1"}, + {CPU_DS390|CPU_DS390F, 0xd3, "MA"}, + {CPU_DS390|CPU_DS390F, 0xd4, "MB"}, + {CPU_DS390|CPU_DS390F, 0xd5, "MC"}, + {CPU_DS390|CPU_DS390F, 0xd6, "C1RMS0"}, + {CPU_DS390|CPU_DS390F, 0xd7, "C1RMS1"}, + {CPU_DS390|CPU_DS390F, 0xd8, "WDCON"}, + {CPU_DS390|CPU_DS390F, 0xde, "C1TMA0"}, + {CPU_DS390|CPU_DS390F, 0xdf, "C1TMA1"}, + {CPU_DS390|CPU_DS390F, 0xe3, "C1C"}, + {CPU_DS390|CPU_DS390F, 0xe4, "C1S"}, + {CPU_DS390|CPU_DS390F, 0xe5, "C11R"}, + {CPU_DS390|CPU_DS390F, 0xe6, "C1TE"}, + {CPU_DS390|CPU_DS390F, 0xe7, "C1RE"}, + {CPU_DS390|CPU_DS390F, 0xe8, "EIE"}, + {CPU_DS390|CPU_DS390F, 0xea, "MXAX"}, + {CPU_DS390|CPU_DS390F, 0xeb, "C1M1C"}, + {CPU_DS390|CPU_DS390F, 0xec, "C1M2C"}, + {CPU_DS390|CPU_DS390F, 0xed, "C1M3C"}, + {CPU_DS390|CPU_DS390F, 0xee, "C1M4C"}, + {CPU_DS390|CPU_DS390F, 0xef, "C1M5C"}, + {CPU_DS390|CPU_DS390F, 0xf3, "C1M6C"}, + {CPU_DS390|CPU_DS390F, 0xf4, "C1M7C"}, + {CPU_DS390|CPU_DS390F, 0xf5, "C1M8C"}, + {CPU_DS390|CPU_DS390F, 0xf6, "C1M9C"}, + {CPU_DS390|CPU_DS390F, 0xf7, "C1M10C"}, + {CPU_DS390|CPU_DS390F, 0xfb, "C1M11C"}, + {CPU_DS390|CPU_DS390F, 0xfc, "C1M12C"}, + {CPU_DS390|CPU_DS390F, 0xfd, "C1M13C"}, + {CPU_DS390|CPU_DS390F, 0xfe, "C1M14C"}, + {CPU_DS390|CPU_DS390F, 0xff, "C1M15C"}, + + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x80, "P0"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x81, "SP"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x82, "DPL"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x83, "DPH"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x87, "PCON"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x88, "TCON"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x89, "TMOD"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x8a, "TL0"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x8b, "TL1"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x8c, "TH0"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x8d, "TH1"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x90, "P1"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x98, "SCON"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x99, "SBUF"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xa0, "P2"}, + {CPU_ALL_51|CPU_ALL_52, 0xa8, "IE"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xb0, "P3"}, + {CPU_ALL_51|CPU_ALL_52, 0xb8, "IP"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xd0, "PSW"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xe0, "ACC"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xf0, "B"}, + + {CPU_ALL_52|CPU_251, 0xc8, "T2CON"}, + {CPU_ALL_52|CPU_251, 0xca, "RCAP2L"}, + {CPU_ALL_52|CPU_251, 0xcb, "RCAP2H"}, + {CPU_ALL_52|CPU_251, 0xcc, "TL2"}, + {CPU_ALL_52|CPU_251, 0xcd, "TH2"}, + + {CPU_51R|CPU_89C51R, 0x8e, "AUXR"}, + {CPU_51R|CPU_89C51R|CPU_251, 0xa6, "WDTRST"}, + {CPU_51R|CPU_89C51R|CPU_251, 0xa9, "SADDR"}, + {CPU_51R|CPU_89C51R, 0xb7, "IPH"}, + {CPU_51R|CPU_89C51R|CPU_251, 0xb9, "SADEN"}, + {CPU_51R|CPU_89C51R|CPU_251|\ + CPU_DS390|CPU_DS390F, 0xc9, "T2MOD"}, /* fixme: isn't that CPU_ALL_52? */ + + {CPU_89C51R, 0xa2, "AUXR1"}, + {CPU_89C51R|CPU_251, 0xd8, "CCON"}, + {CPU_89C51R|CPU_251, 0xd9, "CMOD"}, + {CPU_89C51R|CPU_251, 0xda, "CCAPM0"}, + {CPU_89C51R|CPU_251, 0xdb, "CCAPM1"}, + {CPU_89C51R|CPU_251, 0xdc, "CCAPM2"}, + {CPU_89C51R|CPU_251, 0xdd, "CCAPM3"}, + {CPU_89C51R|CPU_251, 0xde, "CCAPM4"}, + {CPU_89C51R|CPU_251, 0xe9, "CL"}, + {CPU_89C51R|CPU_251, 0xea, "CCAP0L"}, + {CPU_89C51R|CPU_251, 0xeb, "CCAP1L"}, + {CPU_89C51R|CPU_251, 0xec, "CCAP2L"}, + {CPU_89C51R|CPU_251, 0xed, "CCAP3L"}, + {CPU_89C51R|CPU_251, 0xee, "CCAP4L"}, + {CPU_89C51R|CPU_251, 0xf9, "CH"}, + {CPU_89C51R|CPU_251, 0xfa, "CCAP0H"}, + {CPU_89C51R|CPU_251, 0xfb, "CCAP1H"}, + {CPU_89C51R|CPU_251, 0xfc, "CCAP2H"}, + {CPU_89C51R|CPU_251, 0xfd, "CCAP3H"}, + {CPU_89C51R|CPU_251, 0xfe, "CCAP4H"}, + + {0, 0, NULL} +}; + + +/* + * Names of bits + */ + +struct name_entry bit_tab51[]= +{ + /* PSW */ + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xd7, "CY"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xd6, "AC"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xd5, "F0"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xd4, "RS1"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xd3, "RS0"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xd2, "OV"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xd1, "F1"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xd0, "P"}, + /* TCON */ + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x8f, "TF1"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x8e, "TR1"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x8d, "TF0"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x8c, "TR0"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x8b, "IE1"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x8a, "IT1"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x89, "IE0"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x88, "IT0"}, + /* IE */ + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xaf, "EA"}, + {CPU_DS390|CPU_DS390F, 0xae, "ES1"}, + {CPU_89C51R|CPU_251, 0xae, "EC"}, + {CPU_ALL_52|CPU_251, 0xad, "ET2"}, + {CPU_DS390|CPU_DS390F, 0xac, "ES0"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xac, "ES"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xab, "ET1"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xaa, "EX1"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xa9, "ET0"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0xa8, "EX0"}, + /* IP */ + {CPU_89C51R|CPU_251, 0xbe, "PPC"}, + {CPU_DS390|CPU_DS390F, 0xbe, "PS1"}, + {CPU_ALL_52, 0xbd, "PT2"}, + {CPU_DS390|CPU_DS390F, 0xbc, "PS0"}, + {CPU_ALL_51|CPU_ALL_52, 0xbc, "PS"}, + {CPU_ALL_51|CPU_ALL_52, 0xbb, "PT1"}, + {CPU_ALL_51|CPU_ALL_52, 0xba, "PX1"}, + {CPU_ALL_51|CPU_ALL_52, 0xb9, "PT0"}, + {CPU_ALL_51|CPU_ALL_52, 0xb8, "PX0"}, + /* IPL0 */ + {CPU_251, 0xbe, "IPL0.6"}, + {CPU_251, 0xbd, "IPL0.5"}, + {CPU_251, 0xbc, "IPL0.4"}, + {CPU_251, 0xbb, "IPL0.3"}, + {CPU_251, 0xba, "IPL0.2"}, + {CPU_251, 0xb9, "IPL0.1"}, + {CPU_251, 0xb8, "IPL0.0"}, + /* SCON */ + {CPU_DS390|CPU_DS390F, 0x9f, "SM0/FE_0"}, + {CPU_DS390|CPU_DS390F, 0x9e, "SM1_0"}, + {CPU_DS390|CPU_DS390F, 0x9d, "SM2_0"}, + {CPU_DS390|CPU_DS390F, 0x9c, "REN_0"}, + {CPU_DS390|CPU_DS390F, 0x9b, "TB8_0"}, + {CPU_DS390|CPU_DS390F, 0x9a, "RB8_0"}, + {CPU_DS390|CPU_DS390F, 0x99, "TI_0"}, + {CPU_DS390|CPU_DS390F, 0x98, "RI_0"}, + + {CPU_51R|CPU_89C51R|CPU_251, 0x9f, "FE/SM0"}, + {CPU_ALL_51|CPU_ALL_52, 0x9f, "SM0"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x9e, "SM1"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x9d, "SM2"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x9c, "REN"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x9b, "TB8"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x9a, "RB8"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x99, "TI"}, + {CPU_ALL_51|CPU_ALL_52|CPU_251, 0x98, "RI"}, + /* SCON 1 */ + {CPU_DS390|CPU_DS390F, 0xc7, "SM0/FE_1"}, + {CPU_DS390|CPU_DS390F, 0xc6, "SM1_1"}, + {CPU_DS390|CPU_DS390F, 0xc5, "SM2_1"}, + {CPU_DS390|CPU_DS390F, 0xc4, "REN_1"}, + {CPU_DS390|CPU_DS390F, 0xc3, "TB8_1"}, + {CPU_DS390|CPU_DS390F, 0xc2, "RB8_1"}, + {CPU_DS390|CPU_DS390F, 0xc1, "TI_1"}, + {CPU_DS390|CPU_DS390F, 0xc0, "RI_1"}, + /* T2CON */ + {CPU_ALL_52|CPU_251, 0xcf, "TF2"}, + {CPU_ALL_52|CPU_251, 0xce, "EXF2"}, + {CPU_ALL_52|CPU_251, 0xcd, "RCLK"}, + {CPU_ALL_52|CPU_251, 0xcc, "TCLK"}, + {CPU_ALL_52|CPU_251, 0xcb, "EXEN2"}, + {CPU_ALL_52|CPU_251, 0xca, "TR2"}, + {CPU_ALL_52|CPU_251, 0xc9, "C/T2"}, + {CPU_ALL_52|CPU_251, 0xc8, "CP/RL2"}, + /* CCON */ + {CPU_89C51R|CPU_251, 0xdf, "CF"}, + {CPU_89C51R|CPU_251, 0xde, "CR"}, + {CPU_89C51R|CPU_251, 0xdc, "CCF4"}, + {CPU_89C51R|CPU_251, 0xdb, "CCF3"}, + {CPU_89C51R|CPU_251, 0xda, "CCF2"}, + {CPU_89C51R|CPU_251, 0xd9, "CCF1"}, + {CPU_89C51R|CPU_251, 0xd8, "CCF0"}, + /* P1 */ + {CPU_89C51R|CPU_251, 0x97, "CEX4"}, + {CPU_89C51R|CPU_251, 0x96, "CEX3"}, + {CPU_89C51R|CPU_251, 0x95, "CEX2"}, + {CPU_89C51R|CPU_251, 0x94, "CEX1"}, + {CPU_89C51R|CPU_251, 0x93, "CEX0"}, + {CPU_89C51R|CPU_251, 0x92, "EXI"}, + {CPU_89C51R|CPU_251, 0x91, "T2EX"}, + {CPU_89C51R|CPU_251, 0x90, "T2"}, + /* WDCON */ + {CPU_DS390|CPU_DS390F, 0xdf, "SMOD_1"}, + {CPU_DS390|CPU_DS390F, 0xde, "POR,"}, + {CPU_DS390|CPU_DS390F, 0xdd, "EPF1"}, + {CPU_DS390|CPU_DS390F, 0xdc, "PF1"}, + {CPU_DS390|CPU_DS390F, 0xdb, "WDIF"}, + {CPU_DS390|CPU_DS390F, 0xda, "WTRF"}, + {CPU_DS390|CPU_DS390F, 0xd9, "EWT"}, + {CPU_DS390|CPU_DS390F, 0xd8, "RWT"}, + /* EIE */ + {CPU_DS390|CPU_DS390F, 0xef, "CANBIE"}, + {CPU_DS390|CPU_DS390F, 0xee, "C0IE"}, + {CPU_DS390|CPU_DS390F, 0xed, "C1IE"}, + {CPU_DS390|CPU_DS390F, 0xec, "EWDI"}, + {CPU_DS390|CPU_DS390F, 0xeb, "EX5"}, + {CPU_DS390|CPU_DS390F, 0xea, "EX4"}, + {CPU_DS390|CPU_DS390F, 0xe9, "EX3"}, + {CPU_DS390|CPU_DS390F, 0xe8, "EX2"}, + /* EIP */ + {CPU_DS390|CPU_DS390F, 0xef, "CANBIP"}, + {CPU_DS390|CPU_DS390F, 0xee, "C0IP"}, + {CPU_DS390|CPU_DS390F, 0xed, "C1IP"}, + {CPU_DS390|CPU_DS390F, 0xec, "PWDI"}, + {CPU_DS390|CPU_DS390F, 0xeb, "PX5"}, + {CPU_DS390|CPU_DS390F, 0xea, "PX4"}, + {CPU_DS390|CPU_DS390F, 0xe9, "PX3"}, + {CPU_DS390|CPU_DS390F, 0xe8, "PX2"}, + + {0, 0, NULL} +}; + + +/* End of s51.src/glob.cc */ diff --git a/sim/ucsim/s51.src/glob.h b/sim/ucsim/s51.src/glob.h new file mode 100644 index 0000000..4e4a806 --- /dev/null +++ b/sim/ucsim/s51.src/glob.h @@ -0,0 +1,39 @@ +/* + * Simulator of microcontrollers (glob.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef GLOB_HEADER +#define GLOB_HEADER + + +extern struct dis_entry disass_51[]; +extern struct name_entry sfr_tab51[]; +extern struct name_entry bit_tab51[]; + + +#endif + +/* End of s51.src/glob.h */ diff --git a/sim/ucsim/s51.src/inc.cc b/sim/ucsim/s51.src/inc.cc new file mode 100644 index 0000000..23d3564 --- /dev/null +++ b/sim/ucsim/s51.src/inc.cc @@ -0,0 +1,184 @@ +/* + * Simulator of microcontrollers (inc.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +// local +#include "uc51cl.h" +#include "regs51.h" + + +/* + * 0x04 1 12 INC A + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_inc_a(uchar code) +{ + acc->wadd(1); + return(resGO); +} + + +/* + * 0x05 2 12 INC addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_inc_addr(uchar code) +{ + class cl_memory_cell *cell= get_direct(fetch()); + + t_mem d= cell->read(HW_PORT); + cell->write(d+1); + return(resGO); +} + + +/* + * 0x06-0x07 1 12 INC @Ri + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_inc_Sri(uchar code) +{ + class cl_memory_cell *cell; + + cell= iram->get_cell(get_reg(code & 0x01)->read()); + cell->wadd(1); + return(resGO); +} + + +/* + * 0x08-0x0f 1 12 INC Rn + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_inc_rn(uchar code) +{ + class cl_memory_cell *reg= get_reg(code & 0x07); + + reg->wadd(1); + return(resGO); +} + + +/* + * 0x14 1 12 DEC A + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_dec_a(uchar code) +{ + acc->wadd(-1); + + return(resGO); +} + + +/* + * 0x15 2 12 DEC addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_dec_addr(uchar code) +{ + class cl_memory_cell *cell; + + cell= get_direct(fetch()); + t_mem d= cell->read(HW_PORT); + cell->write(d-1); + return(resGO); +} + + +/* + * 0x16-0x17 1 12 DEC @Ri + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_dec_Sri(uchar code) +{ + class cl_memory_cell *cell; + + cell= iram->get_cell(get_reg(code & 0x01)->read()); + cell->add(-1); + return(resGO); +} + + +/* + * 0x18-0x1f 1 12 DEC Rn + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_dec_rn(uchar code) +{ + class cl_memory_cell *reg= get_reg(code & 0x07); + + reg->wadd(-1); + return(resGO); +} + + +/* + * 0xa3 1 24 INC DPTR + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_inc_dptr(uchar code) +{ + uint dptr; + + dptr= sfr->read(DPH)*256 + sfr->read(DPL) + 1; + sfr->write(DPH, (dptr >> 8) & 0xff); + sfr->write(DPL, dptr & 0xff); + tick(1); + return(resGO); +} + + +/* End of s51.src/inc.cc */ diff --git a/sim/ucsim/s51.src/inst.list b/sim/ucsim/s51.src/inst.list new file mode 100644 index 0000000..99286e4 --- /dev/null +++ b/sim/ucsim/s51.src/inst.list @@ -0,0 +1,256 @@ +0x00 NOP 1 12 +0x01 AJMP addr 2 24 +0x02 LJMP addr 3 24 +0x03 RR A 1 12 +0x04 INC A 1 12 +0x05 INC addr 2 12 +0x06 INC @R0 1 12 +0x07 INC @R1 1 12 +0x08 INC R0 1 12 +0x09 INC R1 1 12 +0x0a INC R2 1 12 +0x0b INC R3 1 12 +0x0c INC R4 1 12 +0x0d INC R5 1 12 +0x0e INC R6 1 12 +0x0f INC R7 1 12 +0x10 JBC bit,addr 3 12 +0x11 ACALL addr 2 24 +0x12 LCALL addr 3 24 +0x13 RRC A 1 12 +0x14 DEC A 1 12 +0x15 DEC addr 2 12 +0x16 DEC @R0 1 12 +0x17 DEC @R1 1 12 +0x18 DEC R0 1 12 +0x19 DEC R1 1 12 +0x1a DEC R2 1 12 +0x1b DEC R3 1 12 +0x1c DEC R4 1 12 +0x1d DEC R5 1 12 +0x1e DEC R6 1 12 +0x1f DEC R7 1 12 +0x20 JB bit,addr 3 24 +0x21 AJMP addr 2 24 +0x22 RET 1 24 +0x23 RL A 1 12 +0x24 ADD A,#data 2 12 +0x25 ADD A,addr 2 12 +0x26 ADD A,@R0 1 12 +0x27 ADD A,@R1 1 12 +0x28 ADD A,R0 1 12 +0x29 ADD A,R1 1 12 +0x2a ADD A,R2 1 12 +0x2b ADD A,R3 1 12 +0x2c ADD A,R4 1 12 +0x2d ADD A,R5 1 12 +0x2e ADD A,R6 1 12 +0x2f ADD A,R7 1 12 +0x30 JNB bit,addr 3 12(?) +0x31 ACALL addr 2 24 +0x32 RETI 1 24 +0x33 RLC A 1 12 +0x34 ADDC A,#data 2 12 +0x35 ADDC A,addr 2 12 +0x36 ADDC A,@R0 1 12 +0x37 ADDC A,@R1 1 12 +0x38 ADDC A,R0 1 12 +0x39 ADDC A,R1 1 12 +0x3a ADDC A,R2 1 12 +0x3b ADDC A,R3 1 12 +0x3c ADDC A,R4 1 12 +0x3d ADDC A,R5 1 12 +0x3e ADDC A,R6 1 12 +0x3f ADDC A,R7 1 12 +0x40 JC addr 2 24 +0x41 AJMP addr 2 24 +0x42 ORL addr,A 2 12 +0x43 ORL addr,#data 3 24 +0x44 ORL A,#data 2 12 +0x45 ORL A,addr 2 12 +0x46 ORL A,@R0 1 12 +0x47 ORL A,@R1 1 12 +0x48 ORL A,R0 1 12 +0x49 ORL A,R1 1 12 +0x4a ORL A,R2 1 12 +0x4b ORL A,R3 1 12 +0x4c ORL A,R4 1 12 +0x4d ORL A,R5 1 12 +0x4e ORL A,R6 1 12 +0x4f ORL A,R7 1 12 +0x50 JNC addr 2 24 +0x51 ACALL addr 2 24 +0x52 ANL addr,A 2 12 +0x53 ANL addr,#data 3 24 +0x54 ANL A,#data 2 12 +0x55 ANL A,addr 2 12 +0x56 ANL A,@R0 1 12 +0x57 ANL A,@R1 1 12 +0x58 ANL A,R0 1 12 +0x59 ANL A,R1 1 12 +0x5a ANL A,R2 1 12 +0x5b ANL A,R3 1 12 +0x5c ANL A,R4 1 12 +0x5d ANL A,R5 1 12 +0x5e ANL A,R6 1 12 +0x5f ANL A,R7 1 12 +0x60 JZ addr 2 24 +0x61 AJMP addr 2 24 +0x62 XRL addr,A 2 12 +0x63 XRL addr,#data 3 24 +0x64 XRL A,#data 2 12 +0x65 XRL A,addr 2 12 +0x66 XRL A,@R0 1 12 +0x67 XRL A,@R1 1 12 +0x68 XRL A,R0 1 12 +0x69 XRL A,R1 1 12 +0x6a XRL A,R2 1 12 +0x6b XRL A,R3 1 12 +0x6c XRL A,R4 1 12 +0x6d XRL A,R5 1 12 +0x6e XRL A,R6 1 12 +0x6f XRL A,R7 1 12 +0x70 JNZ addr 2 24 +0x71 ACALL addr 2 24 +0x72 ORL C,addr 2 24 +0x73 JMP @A+DPTR 1 24 +0x74 MOV A,#data 2 12 +0x75 MOV addr,#data 3 24 +0x76 MOV @R0,#data 2 12 +0x77 MOV @R1,#data 2 12 +0x78 MOV R0,#data 2 12 +0x79 MOV R1,#data 2 12 +0x7a MOV R2,#data 2 12 +0x7b MOV R3,#data 2 12 +0x7c MOV R4,#data 2 12 +0x7d MOV R5,#data 2 12 +0x7e MOV R6,#data 2 12 +0x7f MOV R7,#data 2 12 +0x80 SJMP addr 2 24 +0x81 AJMP addr 2 24 +0x82 ANL C,addr 2 24 +0x83 MOVC A,@A+PC 1 24 +0x84 DIV AB 1 48 +0x85 MOV addr,addr 3 24 +0x86 MOV addr,@R0 2 24 +0x87 MOV addr,@R1 2 24 +0x88 MOV addr,R0 2 24 +0x89 MOV addr,R1 2 24 +0x8a MOV addr,R2 2 24 +0x8b MOV addr,R3 2 24 +0x8c MOV addr,R4 2 24 +0x8d MOV addr,R5 2 24 +0x8e MOV addr,R6 2 24 +0x8f MOV addr,R7 2 24 +0x90 MOV DPTR,#data 3 24 +0x91 ACALL addr 2 24 +0x92 MOV addr,C 2 24 +0x93 MOVC A,@A+DPTR 1 24 +0x94 SUBB A,#data 2 12 +0x95 SUBB A,addr 2 12 +0x96 SUBB A,@R0 1 12 +0x97 SUBB A,@R1 1 12 +0x98 SUBB A,R0 1 12 +0x99 SUBB A,R1 1 12 +0x9a SUBB A,R2 1 12 +0x9b SUBB A,R3 1 12 +0x9c SUBB A,R4 1 12 +0x9d SUBB A,R5 1 12 +0x9e SUBB A,R6 1 12 +0x9f SUBB A,R7 1 12 +0xa0 ORL C,/addr 2 24 +0xa1 AJMP addr 2 24 +0xa2 MOV C,addr 2 12 +0xa3 INC DPTR 1 24 +0xa4 MUL AB 1 48 +0xa5 ****************Breakpoint +0xa6 MOV @R0,addr 2 24 +0xa7 MOV @R1,addr 2 24 +0xa8 MOV R0,addr 2 24 +0xa9 MOV R1,addr 2 24 +0xaa MOV R2,addr 2 24 +0xab MOV R3,addr 2 24 +0xac MOV R4,addr 2 24 +0xad MOV R5,addr 2 24 +0xae MOV R6,addr 2 24 +0xaf MOV R7,addr 2 24 +0xb0 ANL C,/addr 2 24 +0xb1 ACALL addr 2 24 +0xb2 CPL bitaddr 2 12 +0xb3 CPL C 1 12 +0xb4 CJNE A,#data,addr 3 24 +0xb5 CJNE A,addr,addr 3 24 +0xb6 CJNE @R0,#data,addr 3 24 +0xb7 CJNE @R1,#data,addr 3 24 +0xb8 CJNE R0,#data,addr 3 24 +0xb9 CJNE R1,#data,addr 3 24 +0xba CJNE R2,#data,addr 3 24 +0xbb CJNE R3,#data,addr 3 24 +0xbc CJNE R4,#data,addr 3 24 +0xbd CJNE R5,#data,addr 3 24 +0xbe CJNE R6,#data,addr 3 24 +0xbf CJNE R7,#data,addr 3 24 +0xc0 PUSH addr 2 24 +0xc1 AJMP addr 2 24 +0xc2 CLR bitaddr 2 12 +0xc3 CLR C 1 12 +0xc4 SWAP A 1 12 +0xc5 XCH A,addr 2 12 +0xc6 XCH A,@R0 1 12 +0xc7 XCH A,@R1 1 12 +0xc8 XCH A,R0 1 12 +0xc9 XCH A,R1 1 12 +0xca XCH A,R2 1 12 +0xcb XCH A,R3 1 12 +0xcc XCH A,R4 1 12 +0xcd XCH A,R5 1 12 +0xce XCH A,R6 1 12 +0xcf XCH A,R7 1 12 +0xd0 POP addr 2 24 +0xd1 ACALL addr 2 24 +0xd2 SETB addr 2 12 +0xd3 SETB C 1 12 +0xd4 DA A 1 12 +0xd5 DJNZ addr,addr 3 24 +0xd6 XCHD A,@R0 1 12 +0xd7 XCHD A,@R1 1 12 +0xd8 DJNZ R0,addr 2 24 +0xd9 DJNZ R1,addr 2 24 +0xda DJNZ R2,addr 2 24 +0xdb DJNZ R3,addr 2 24 +0xdc DJNZ R4,addr 2 24 +0xdd DJNZ R5,addr 2 24 +0xde DJNZ R6,addr 2 24 +0xdf DJNZ R7,addr 2 24 +0xe0 MOVX A,@DPTR 1 24 +0xe1 AJMP addr 2 24 +0xe2 MOVX A,@R0 1 24 +0xe3 MOVX A,@R1 1 24 +0xe4 CLR A 1 12 +0xe5 MOV A,addr 2 12 +0xe6 MOV A,@R0 1 12 +0xe7 MOV A,@R1 1 12 +0xe8 MOV A,R0 1 12 +0xe9 MOV A,R1 1 12 +0xea MOV A,R2 1 12 +0xeb MOV A,R3 1 12 +0xec MOV A,R4 1 12 +0xed MOV A,R5 1 12 +0xee MOV A,R6 1 12 +0xef MOV A,R7 1 12 +0xf0 MOVX @DPTR,A 1 24 +0xf1 ACALL addr 2 24 +0xf2 MOVX @R0,A 1 24 +0xf3 MOVX @R1,A 1 24 +0xf4 CPL A 1 12 +0xf5 MOV addr,A 2 12 +0xf6 MOV @R0,A 1 12 +0xf7 MOV @R1,A 1 12 +0xf8 MOV R0,A 1 12 +0xf9 MOV R1,A 1 12 +0xfa MOV R2,A 1 12 +0xfb MOV R3,A 1 12 +0xfc MOV R4,A 1 12 +0xfd MOV R5,A 1 12 +0xfe MOV R6,A 1 12 +0xff MOV R7,A 1 12 diff --git a/sim/ucsim/s51.src/interrupt.cc b/sim/ucsim/s51.src/interrupt.cc new file mode 100644 index 0000000..f8a8f8d --- /dev/null +++ b/sim/ucsim/s51.src/interrupt.cc @@ -0,0 +1,170 @@ +/* + * Simulator of microcontrollers (interrupt.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +// prj +#include "utils.h" + +// sim +#include "itsrccl.h" + +// local +#include "interruptcl.h" +#include "regs51.h" +//#include "uc51cl.h" +#include "types51.h" + + +cl_interrupt::cl_interrupt(class cl_uc *auc): + cl_hw(auc, HW_INTERRUPT, 0, "irq") +{ + was_reti= DD_FALSE; +} + +int +cl_interrupt::init(void) +{ + sfr= uc->address_space(MEM_SFR_ID); + if (sfr) + { + //sfr->register_hw(IE, this, 0); + register_cell(sfr, IE, 0, wtd_restore); + register_cell(sfr, TCON, &cell_tcon, wtd_restore_write); + bit_INT0= sfr->read(P3) & bm_INT0; + bit_INT1= sfr->read(P3) & bm_INT1; + } + return(0); +} + +void +cl_interrupt::added_to_uc(void) +{ + uc->it_sources->add(new cl_it_src(bmEX0, TCON, bmIE0, 0x0003, true, + "external #0", 1)); + uc->it_sources->add(new cl_it_src(bmEX1, TCON, bmIE1, 0x0013, true, + "external #1", 3)); +} + +void +cl_interrupt::write(class cl_memory_cell *cell, t_mem *val) +{ + if (cell == cell_tcon) + { + bit_IT0= *val & bmIT0; + bit_IT1= *val & bmIT1; + } + else + // IE register + was_reti= DD_TRUE; +} + +/*void +cl_interrupt::mem_cell_changed(class cl_m *mem, t_addr addr) +{ +}*/ + +int +cl_interrupt::tick(int cycles) +{ + if (!bit_IT0 && !bit_INT0) + cell_tcon->set_bit1(bmIE0); + if (!bit_IT1 && !bit_INT1) + cell_tcon->set_bit1(bmIE1); + return(resGO); +} + +void +cl_interrupt::reset(void) +{ + was_reti= DD_FALSE; +} + +void +cl_interrupt::happen(class cl_hw *where, enum hw_event he, void *params) +{ + struct ev_port_changed *ep= (struct ev_port_changed *)params; + + if (where->cathegory == HW_PORT && + he == EV_PORT_CHANGED && + ep->id == 3) + { + t_mem p3n= ep->new_pins & ep->new_value; + t_mem p3o= ep->pins & ep->prev_value; + if (bit_IT0 && + !(p3n & bm_INT0) && + (p3o & bm_INT0)) + cell_tcon->set_bit1(bmIE0); + if (bit_IT1 && + !(p3n & bm_INT1) && + (p3o & bm_INT1)) + cell_tcon->set_bit1(bmIE1); + bit_INT0= p3n & bm_INT0; + bit_INT1= p3n & bm_INT1; + } +} + + +void +cl_interrupt::print_info(class cl_console_base *con) +{ + int ie= sfr->get(IE); + int i; + + con->dd_printf("Interrupts are %s. Interrupt sources:\n", + (ie&bmEA)?"enabled":"disabled"); + con->dd_printf(" Handler En Pr Req Act Name\n"); + for (i= 0; i < uc->it_sources->count; i++) + { + class cl_it_src *is= (class cl_it_src *)(uc->it_sources->at(i)); + con->dd_printf(" 0x%06x", is->addr); + con->dd_printf(" %-3s", (ie&(is->ie_mask))?"en":"dis"); + con->dd_printf(" %2d", uc->it_priority(is->ie_mask)); + con->dd_printf(" %-3s", + (sfr->get(is->src_reg)&(is->src_mask))? + "YES":"no"); + con->dd_printf(" %-3s", (is->active)?"act":"no"); + con->dd_printf(" %s", object_name(is)); + con->dd_printf("\n"); + } + con->dd_printf("Active interrupt service(s):\n"); + con->dd_printf(" Pr Handler PC Source\n"); + for (i= 0; i < uc->it_levels->count; i++) + { + class it_level *il= (class it_level *)(uc->it_levels->at(i)); + if (il->level >= 0) + { + con->dd_printf(" %2d", il->level); + con->dd_printf(" 0x%06x", il->addr); + con->dd_printf(" 0x%06x", il->PC); + con->dd_printf(" %s", (il->source)?(object_name(il->source)): + "nothing"); + con->dd_printf("\n"); + } + } +} + + +/* End of s51.src/interrupt.cc */ diff --git a/sim/ucsim/s51.src/interruptcl.h b/sim/ucsim/s51.src/interruptcl.h new file mode 100644 index 0000000..ebc5257 --- /dev/null +++ b/sim/ucsim/s51.src/interruptcl.h @@ -0,0 +1,65 @@ +/* + * Simulator of microcontrollers (interruptcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef INTERRUPTCL_HEADER +#define INTERRUPTCL_HEADER + +#include "stypes.h" +#include "pobjcl.h" +#include "uccl.h" + +#include "newcmdcl.h" + + +class cl_interrupt: public cl_hw +{ +public: + class cl_address_space *sfr; + bool was_reti, bit_IT0, bit_IT1, bit_INT0, bit_INT1; + class cl_memory_cell *cell_tcon; +public: + cl_interrupt(class cl_uc *auc); + virtual int init(void); + + virtual void added_to_uc(void); + + //virtual t_mem read(class cl_memory_cell *cell); + virtual void write(class cl_memory_cell *cell, t_mem *val); + + //virtual void mem_cell_changed(class cl_m *mem, t_addr addr); + + virtual int tick(int cycles); + virtual void reset(void); + virtual void happen(class cl_hw *where, enum hw_event he, void *params); + + virtual void print_info(class cl_console_base *con); +}; + + +#endif + +/* End of s51.src/interruptcl.h */ diff --git a/sim/ucsim/s51.src/jmp.cc b/sim/ucsim/s51.src/jmp.cc new file mode 100644 index 0000000..ed6f114 --- /dev/null +++ b/sim/ucsim/s51.src/jmp.cc @@ -0,0 +1,550 @@ +/* + * Simulator of microcontrollers (jmp.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +/* Bugs fixed by Sandeep Dutta: + * relative<->absolute jump in "jmp @a+dptr" + */ + +#include "ddconfig.h" + +#include +#include + +// local +#include "uc51cl.h" +#include "regs51.h" +#include "types51.h" +#include "interruptcl.h" + + +/* + * 0x[02468ace]1 2 24 AJMP addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_ajmp_addr(uchar code) +{ + uchar h, l; + + h= (code >> 5) & 0x07; + l= fetch(); + tick(1); + PC= (PC & 0xf800) | (h*256 + l); + return(resGO); +} + + +/* + * 0x10 3 12 JBC bit,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_jbc_bit_addr(uchar code) +{ + uchar bitaddr, jaddr; + + bitaddr= fetch(); + jaddr = fetch(); + t_addr a; + t_mem m; + class cl_address_space *mem; + if ((mem= bit2mem(bitaddr, &a, &m)) == 0) + return(resBITADDR); + t_mem d= mem->read(a, HW_PORT); + mem->write(a, d & ~m); + if (d & m) + PC= rom->validate_address(PC + (signed char)jaddr); + tick(1); + return(resGO); +} + + +/* + * 0x02 3 24 LJMP addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_ljmp(uchar code) +{ + PC= fetch()*256 + fetch(); + tick(1); + return(resGO); +} + + +/* + * 0x[13579bdf]1 2 24 ACALL addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_acall_addr(uchar code) +{ + uchar h, l; + class cl_memory_cell *stck; + t_mem sp, sp_before/*, sp_after*/; + + h= (code >> 5) & 0x07; + l= fetch(); + sp_before= sfr->get(SP); + sp= sfr->wadd(SP, 1); + //proc_write_sp(sp); + stck= iram->get_cell(sp); + stck->write(PC & 0xff); // push low byte + tick(1); + + sp= /*sp_after*= */sfr->wadd(SP, 1); + //proc_write_sp(sp); + stck= iram->get_cell(sp); + stck->write((PC >> 8) & 0xff); // push high byte + t_mem pushed= PC; + PC= (PC & 0xf800) | (h*256 + l); + class cl_stack_op *so= new cl_stack_call(instPC, PC, pushed, sp_before, sp); + so->init(); + stack_write(so); + return(resGO); +} + + +/* + * 0x12 3 24 LCALL addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_lcall(uchar code, uint addr, bool intr) +{ + uchar h= 0, l= 0; + t_mem sp, sp_before/*, sp_after*/; + class cl_memory_cell *stck; + + if (!addr) + { + h= fetch(); + l= fetch(); + } + sp_before= sfr->get(SP); + sp= sfr->wadd(SP, 1); + //proc_write_sp(sp); + stck= iram->get_cell(sp); + stck->write(PC & 0xff); // push low byte + if (!addr) + tick(1); + + sp= sfr->wadd(SP, 1); + //proc_write_sp(sp); + stck= iram->get_cell(sp); + stck->write((PC >> 8) & 0xff); // push high byte + t_mem pushed= PC; + if (addr) + PC= addr; + else + PC= h*256 + l; + class cl_stack_op *so; + if (intr) + so= new cl_stack_intr(instPC, PC, pushed, sp_before, sp/*_after*/); + else + so= new cl_stack_call(instPC, PC, pushed, sp_before, sp/*_after*/); + so->init(); + stack_write(so); + return(resGO); +} + + +/* + * 0x20 3 24 JB bit,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_jb_bit_addr(uchar code) +{ + uchar bitaddr, jaddr; + t_addr a; + t_mem m; + + class cl_address_space *mem; + if ((mem= bit2mem(bitaddr= fetch(), &a, &m)) == 0) + return(resBITADDR); + tick(1); + jaddr= fetch(); + if (mem->read(a) & m) + PC= rom->validate_address(PC + (signed char)jaddr); + return(resGO); +} + + +/* + * 0x22 1 24 RET + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_ret(uchar code) +{ + uchar h= 0, l= 0; + t_mem sp, sp_before/*, sp_after*/; + class cl_memory_cell *stck; + + sp= sp_before= sfr->read(SP); + stck= iram->get_cell(sp); + h= stck->read(); + sp= sfr->wadd(SP, -1); + tick(1); + + stck= iram->get_cell(sp); + l= stck->read(); + sp= sfr->wadd(SP, -1); + PC= h*256 + l; + class cl_stack_op *so= new cl_stack_ret(instPC, PC, sp_before, sp/*_after*/); + so->init(); + stack_read(so); + return(resGO); +} + + +/* + * 0x30 3 24 JNB bit,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_jnb_bit_addr(uchar code) +{ + uchar bitaddr, jaddr; + t_mem m; + t_addr a; + class cl_address_space *mem; + + if ((mem= bit2mem(bitaddr= fetch(), &a, &m)) == 0) + return(resBITADDR); + tick(1); + jaddr= fetch(); + if (!(mem->read(a) & m)) + PC= rom->validate_address(PC + (signed char)jaddr); + return(resGO); +} + + +/* + * 0x32 1 24 RETI + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_reti(uchar code) +{ + uchar h= 0, l= 0; + t_mem sp, sp_before, sp_after; + class cl_memory_cell *stck; + + sp= sp_before= sfr->read(SP); + stck= iram->get_cell(sp); + h= stck->read(); + sp= sfr->wadd(SP, -1); + tick(1); + + stck= iram->get_cell(sp); + l= stck->read(); + sp= sp_after= sfr->wadd(SP, -1); + PC= h*256 + l; + + interrupt->was_reti= DD_TRUE; + class it_level *il= (class it_level *)(it_levels->top()); + if (il && + il->level >= 0) + { + il= (class it_level *)(it_levels->pop()); + delete il; + } + class cl_stack_op *so= + new cl_stack_iret(instPC, PC, sp_before, sp_after); + so->init(); + stack_read(so); + return(resGO); +} + + +/* + * 0x40 2 24 JC addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_jc_addr(uchar code) +{ + uchar jaddr; + + jaddr= fetch(); + tick(1); + if (SFR_GET_C) + PC= rom->validate_address(PC + (signed char)jaddr); + return(resGO); +} + + +/* + * 0x50 2 24 JNC addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_jnc_addr(uchar code) +{ + uchar jaddr; + + jaddr= fetch(); + tick(1); + if (!SFR_GET_C) + PC= rom->validate_address(PC + (signed char)jaddr); + return(resGO); +} + + +/* + * 0x60 2 24 JZ addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_jz_addr(uchar code) +{ + uchar jaddr; + + jaddr= fetch(); + tick(1); + if (!acc->read()) + PC= rom->validate_address(PC + (signed char)jaddr); + return(resGO); +} + + +/* + * 0x70 2 24 JNZ addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_jnz_addr(uchar code) +{ + uchar jaddr; + + jaddr= fetch(); + tick(1); + if (acc->read()) + PC= rom->validate_address(PC + (signed char)jaddr); + return(resGO); +} + + +/* + * 0x73 1 24 JMP @A+DPTR + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_jmp_Sa_dptr(uchar code) +{ + PC= rom->validate_address(sfr->read(DPH)*256 + sfr->read(DPL) + acc->read()); + tick(1); + return(resGO); +} + + +/* + * 0x80 2 24 SJMP addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_sjmp(uchar code) +{ + signed char target= fetch(); + + PC= rom->validate_address(PC + target); + tick(1); + return(resGO); +} + + +/* + * 0xb4 3 24 CJNE A,#data,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_cjne_a_Sdata_addr(uchar code) +{ + uchar data, jaddr, ac; + + data = fetch(); + jaddr= fetch(); + tick(1); + SFR_SET_C((ac= acc->read()) < data); + if (ac != data) + PC= rom->validate_address(PC + (signed char)jaddr); + return(resGO); +} + + +/* + * 0xb5 3 24 CJNE A,addr,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_cjne_a_addr_addr(uchar code) +{ + uchar data, jaddr; + t_addr a; + class cl_memory_cell *cell; + + cell= get_direct(a= fetch()); + jaddr= fetch(); + tick(1); + data= cell->read(); + SFR_SET_C(acc->get() < data); + if (acc->read() != data) + PC= rom->validate_address(PC + (signed char)jaddr); + return(resGO); +} + + +/* + * 0xb6-0xb7 3 24 CJNE @Ri,#data,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_cjne_Sri_Sdata_addr(uchar code) +{ + uchar data, jaddr; + class cl_memory_cell *cell; + + cell= iram->get_cell(get_reg(code & 0x01)->read()); + data = fetch(); + jaddr= fetch(); + tick(1); + t_mem d; + SFR_SET_C((d= cell->read()) < data); + if (d != data) + PC= rom->validate_address(PC + (signed char)jaddr); + return(resGO); +} + + +/* + * 0xb8-0xbf 3 24 CJNE Rn,#data,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_cjne_rn_Sdata_addr(uchar code) +{ + uchar data, jaddr; + class cl_memory_cell *reg; + + reg = get_reg(code & 0x07); + data = fetch(); + jaddr= fetch(); + tick(1); + t_mem r; + SFR_SET_C((r= reg->read()) < data); + if (r != data) + PC= rom->validate_address(PC + (signed char)jaddr); + return(resGO); +} + + +/* + * 0xd5 3 24 DJNZ addr,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_djnz_addr_addr(uchar code) +{ + uchar jaddr; + class cl_memory_cell *cell; + + cell = get_direct(fetch()); + jaddr= fetch(); + tick(1); + t_mem d= cell->read(HW_PORT);//cell->wadd(-1); + d= cell->write(d-1); + if (d) + PC= rom->validate_address(PC + (signed char)jaddr); + return(resGO); +} + + +/* + * 0xd8-0xdf 2 24 DJNZ Rn,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_djnz_rn_addr(uchar code) +{ + uchar jaddr; + class cl_memory_cell *reg; + + reg = get_reg(code & 0x07); + jaddr= fetch(); + tick(1); + t_mem r= reg->wadd(-1); + if (r) + PC= rom->validate_address(PC + (signed char)jaddr); + return(resGO); +} + + +/* End of s51.src/jmp.cc */ diff --git a/sim/ucsim/s51.src/logic.cc b/sim/ucsim/s51.src/logic.cc new file mode 100644 index 0000000..229f80c --- /dev/null +++ b/sim/ucsim/s51.src/logic.cc @@ -0,0 +1,377 @@ +/* + * Simulator of microcontrollers (logic.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +// prj +#include "stypes.h" + +// local +#include "uc51cl.h" +#include "regs51.h" + + +/* + * 0x42 2 12 ORL addr,A + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_orl_addr_a(uchar code) +{ + class cl_memory_cell *cell; + + cell= get_direct(fetch()); + cell->write(cell->read(HW_PORT) | acc->read()); + return(resGO); +} + + +/* + * 0x43 3 24 ORL addr,#data + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_orl_addr_Sdata(uchar code) +{ + class cl_memory_cell *cell; + int res= resGO; + + cell= get_direct(fetch()); + t_mem d= fetch(); + cell->write(cell->read(HW_PORT) | d); + tick(1); + return(res); +} + + +/* + * 0x44 2 12 ORL A,#data + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_orl_a_Sdata(uchar code) +{ + uchar d; + + d= acc->read(); + acc->write(d|= fetch()); + return(resGO); +} + + +/* + * 0x45 2 12 ORL A,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_orl_a_addr(uchar code) +{ + t_mem d; + class cl_memory_cell *cell; + + cell= get_direct(fetch()); + d= acc->read(); + acc->write(d|= cell->read()); + return(resGO); +} + + +/* + * 0x46-0x47 1 12 ORL A,@Ri + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_orl_a_Sri(uchar code) +{ + t_mem d; + class cl_memory_cell *cell; + + cell= iram->get_cell(get_reg(code & 0x01)->read()); + d= acc->read(); + acc->write(d|= cell->read()); + return(resGO); +} + + +/* + * 0x48-0x4f 1 12 ORL A,Rn + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_orl_a_rn(uchar code) +{ + t_mem d; + + d= acc->read(); + acc->write(d|= get_reg(code & 0x07)->read()); + return(resGO); +} + + +/* + * 0x52 2 12 ANL addr,A + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_anl_addr_a(uchar code) +{ + class cl_memory_cell *cell; + + cell= get_direct(fetch()); + cell->write(cell->read(HW_PORT) & acc->read()); + return(resGO); +} + + +/* + * 0x53 3 24 ANL addr,#data + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_anl_addr_Sdata(uchar code) +{ + class cl_memory_cell *cell; + t_mem d; + + cell= get_direct(fetch()); + d= fetch(); + cell->write(cell->read(HW_PORT) & d); + tick(1); + return(resGO); +} + + +/* + * 0x54 2 12 ANL A,#data + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_anl_a_Sdata(uchar code) +{ + uchar d; + + d= acc->read(); + acc->write(d & fetch()); + return(resGO); +} + + +/* + * 0x55 2 12 ANL A,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_anl_a_addr(uchar code) +{ + t_mem d; + class cl_memory_cell *cell; + + cell= get_direct(fetch()); + d= acc->read(); + acc->write(d & cell->read()); + return(resGO); +} + + +/* + * 0x56-0x57 1 12 ANL A,@Ri + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_anl_a_Sri(uchar code) +{ + t_mem d; + class cl_memory_cell *cell; + + cell= iram->get_cell(get_reg(code & 0x01)->read()); + d= acc->read(); + acc->write(d & cell->read()); + return(resGO); +} + + +/* + * 0x58-0x5f 1 12 ANL A,Rn + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_anl_a_rn(uchar code) +{ + uchar d; + + d= acc->read(); + acc->write(d & get_reg(code & 0x07)->read()); + return(resGO); +} + + +/* + * 0x62 2 12 XRL addr,A + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_xrl_addr_a(uchar code) +{ + class cl_memory_cell *cell; + + cell= get_direct(fetch()); + cell->write(cell->read(HW_PORT) ^ acc->read()); + return(resGO); +} + + +/* + * 0x63 3 24 XRL addr,#data + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_xrl_addr_Sdata(uchar code) +{ + class cl_memory_cell *cell; + + cell= get_direct(fetch()); + cell->write(cell->read(HW_PORT) ^ fetch()); + tick(1); + return(resGO); +} + + +/* + * 0x64 2 12 XRL A,#data + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_xrl_a_Sdata(uchar code) +{ + uchar d; + + d= acc->read(); + acc->write(d ^ fetch()); + return(resGO); +} + + +/* + * 0x65 2 12 XRL A,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_xrl_a_addr(uchar code) +{ + t_mem d; + class cl_memory_cell *cell; + + cell= get_direct(fetch()); + d= acc->read(); + acc->write(d ^ cell->read()); + return(resGO); +} + + +/* + * 0x66-0x67 1 12 XRL A,@Ri + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_xrl_a_Sri(uchar code) +{ + t_mem d; + class cl_memory_cell *cell; + + cell= iram->get_cell(get_reg(code & 0x01)->read()); + d= acc->read(); + acc->write(d ^ cell->read()); + return(resGO); +} + + +/* + * 0x68-0x6f 1 12 XRL A,Rn + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_xrl_a_rn(uchar code) +{ + t_mem d; + + d= acc->read(); + acc->write(d ^ get_reg(code & 0x07)->read()); + return(resGO); +} + + +/* + * 0xf4 1 12 CPL A + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_cpl_a(uchar code) +{ + acc->write(~(acc->read())); + return(resGO); +} + + +/* End of s51.src/logic.cc */ diff --git a/sim/ucsim/s51.src/lst2ls b/sim/ucsim/s51.src/lst2ls new file mode 100755 index 0000000..2bd2752 --- /dev/null +++ b/sim/ucsim/s51.src/lst2ls @@ -0,0 +1,23 @@ +FNAME=$1 + +awk -v FNAME=$FNAME 'BEGIN { + cfname= FNAME ".c"; + i= 1; + while (getline csrc[i] ${FNAME}.ls + +# End of lst2ls + diff --git a/sim/ucsim/s51.src/monitor1-2 b/sim/ucsim/s51.src/monitor1-2 new file mode 100755 index 0000000..1c3685d --- /dev/null +++ b/sim/ucsim/s51.src/monitor1-2 @@ -0,0 +1,5 @@ +#!/bin/sh + +cat 1_tee|tee /dev/tty >tee_2 + +# End of monitor1-2 diff --git a/sim/ucsim/s51.src/monitor2-1 b/sim/ucsim/s51.src/monitor2-1 new file mode 100755 index 0000000..07def21 --- /dev/null +++ b/sim/ucsim/s51.src/monitor2-1 @@ -0,0 +1,5 @@ +#!/bin/sh + +cat 2_tee|tee /dev/tty >tee_1 + +# End of monitor2-1 diff --git a/sim/ucsim/s51.src/mov.cc b/sim/ucsim/s51.src/mov.cc new file mode 100644 index 0000000..a932e9d --- /dev/null +++ b/sim/ucsim/s51.src/mov.cc @@ -0,0 +1,563 @@ +/* + * Simulator of microcontrollers (mov.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +/* Bugs fixed by Sandeep Dutta: + * source<->dest bug in "mov direct,direct" + * get register in "mov @ri,address" + */ + +#include "ddconfig.h" + +#include + +// sim +#include "memcl.h" + +// local +#include "uc51cl.h" +#include "regs51.h" + + +/* + * 0x74 2 12 MOV A,#data + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_a_Sdata(uchar code) +{ + acc->write(fetch()); + return(resGO); +} + + +/* + * 0x75 3 24 MOV addr,#data + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_addr_Sdata(uchar code) +{ + class cl_memory_cell *cell; + + cell= get_direct(fetch()); + cell->write(fetch()); + tick(1); + return(resGO); +} + + +/* + * 0x76-0x77 2 12 MOV @Ri,#data + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_Sri_Sdata(uchar code) +{ + class cl_memory_cell *cell; + + cell= iram->get_cell(get_reg(code & 0x01)->read()); + t_mem d= fetch(); + cell->write(d); + return(resGO); +} + + +/* + * 0x78-0x7f 2 12 MOV Rn,#data + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_rn_Sdata(uchar code) +{ + class cl_memory_cell *reg; + + reg= get_reg(code & 0x07); + reg->write(fetch()); + return(resGO); +} + + +/* + * 0x93 1 24 MOVC A,@A+DPTR + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_movc_a_Sa_pc(uchar code) +{ + acc->write(rom->read(PC + acc->read())); + tick(1); + return(resGO); +} + + +/* + * 0x85 3 24 MOV addr,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_addr_addr(uchar code) +{ + class cl_memory_cell *d, *s; + + /* SD reversed s & d here */ + s= get_direct(fetch()); + d= get_direct(fetch()); + d->write(s->read()); + tick(1); + return(resGO); +} + + +/* + * 0x86-0x87 2 24 MOV addr,@Ri + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_addr_Sri(uchar code) +{ + class cl_memory_cell *d, *s; + + d= get_direct(fetch()); + s= iram->get_cell(get_reg(code & 0x01)->read()); + d->write(s->read()); + tick(1); + return(resGO); +} + + +/* + * 0x88-0x8f 2 24 MOV addr,Rn + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_addr_rn(uchar code) +{ + class cl_memory_cell *cell; + + cell= get_direct(fetch()); + cell->write(get_reg(code & 0x07)->read()); + tick(1); + return(resGO); +} + + +/* + * 0x90 3 24 MOV DPTR,#data + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_dptr_Sdata(uchar code) +{ + sfr->write(DPH, fetch()); + sfr->write(DPL, fetch()); + tick(1); + return(resGO); +} + + +/* + * 0x93 1 24 MOVC A,@A+DPTR + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_movc_a_Sa_dptr(uchar code) +{ + acc->write(rom->read(sfr->read(DPH)*256+sfr->read(DPL) + acc->read())); + tick(1); + return(resGO); +} + + +/* + * 0xa6-0xa7 2 24 MOV @Ri,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_Sri_addr(uchar code) +{ + class cl_memory_cell *d, *s; + + d= iram->get_cell(get_reg(code & 0x01)->read()); + s= get_direct(fetch()); + d->write(s->read()); + tick(1); + return(resGO); +} + + +/* + * 0xa8-0xaf 2 24 MOV Rn,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_rn_addr(uchar code) +{ + class cl_memory_cell *reg, *cell; + + reg = get_reg(code & 0x07); + cell= get_direct(fetch()); + reg->write(cell->read()); + tick(1); + return(resGO); +} + + +/* + * 0xc0 2 24 PUSH addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_push(uchar code) +{ + t_addr sp, sp_before/*, sp_after*/; + t_mem data; + class cl_memory_cell *stck, *cell; + + cell= get_direct(fetch()); + sp_before= sfr->get(SP); + sp= /*sp_after= */sfr->wadd(SP, 1); + stck= iram->get_cell(sp); + stck->write(data= cell->read()); + class cl_stack_op *so= + new cl_stack_push(instPC, data, sp_before, sp/*_after*/); + so->init(); + stack_write(so); + tick(1); + return(resGO); +} + + +/* + * 0xc5 2 12 XCH A,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_xch_a_addr(uchar code) +{ + t_mem temp; + class cl_memory_cell *cell; + + cell= get_direct(fetch()); + temp= acc->read(); + acc->write(cell->read()); + cell->write(temp); + return(resGO); +} + + +/* + * 0xc6-0xc7 1 12 XCH A,@Ri + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_xch_a_Sri(uchar code) +{ + t_mem temp; + class cl_memory_cell *cell; + + cell= iram->get_cell(get_reg(code & 0x01)->read()); + temp= acc->read(); + acc->write(cell->read()); + cell->write(temp); + return(resGO); +} + + +/* + * 0xc8-0xcf 1 12 XCH A,Rn + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_xch_a_rn(uchar code) +{ + t_mem temp; + class cl_memory_cell *reg; + + reg = get_reg(code & 0x07); + temp= acc->read(); + acc->write(reg->read()); + reg->write(temp); + return(resGO); +} + + +/* + * 0xd0 2 24 POP addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_pop(uchar code) +{ + t_addr sp, sp_before/*, sp_after*/; + t_mem data; + class cl_memory_cell *cell, *stck; + + sp_before= sfr->get(SP); + cell= get_direct(fetch()); + stck= iram->get_cell(sfr->get(SP)); + cell->write(data= stck->read()); + sp= /*sp_after= */sfr->wadd(SP, -1); + tick(1); + class cl_stack_op *so= + new cl_stack_pop(instPC, data, sp_before, sp/*_after*/); + so->init(); + stack_read(so); + return(resGO); +} + + +/* + * 0xd6-0xd7 1 12 XCHD A,@Ri + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_xchd_a_Sri(uchar code) +{ + t_mem temp, d; + class cl_memory_cell *cell; + + cell= iram->get_cell(get_reg(code & 0x01)->read()); + temp= (d= cell->read()) & 0x0f; + cell->write((d & 0xf0) | (acc->read() & 0x0f)); + acc->write((acc->get() & 0xf0) | temp); + return(resGO); +} + + +/* + * 0xe0 1 24 MOVX A,@DPTR + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_movx_a_Sdptr(uchar code) +{ + acc->write(xram->read(sfr->read(DPH)*256 + sfr->read(DPL))); + tick(1); + return(resGO); +} + + +/* + * 0xe2-0xe3 1 24 MOVX A,@Ri + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_movx_a_Sri(uchar code) +{ + t_mem d; + + d= get_reg(code & 0x01)->read(); + acc->write(xram->read(sfr->read(P2)*256 + d)); + tick(1); + return(resGO); +} + + +/* + * 0xe5 2 12 MOV A,addr + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_a_addr(uchar code) +{ + class cl_memory_cell *cell; + t_addr address= fetch(); + + /* If this is ACC, it is an invalid instruction */ + if (address == ACC) + { + //sim->app->get_commander()-> + //debug("Invalid Instruction : E5 E0 MOV A,ACC at %06x\n", PC); + inst_unknown(); + } + else + { + cell= get_direct(address); + acc->write(cell->read()); + } + return(resGO); +} + + +/* + * 0xe6-0xe7 1 12 MOV A,@Ri + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_a_Sri(uchar code) +{ + class cl_memory_cell *cell; + + cell= iram->get_cell(get_reg(code & 0x01)->read()); + acc->write(cell->read()); + return(resGO); +} + + +/* + * 0xe8-0xef 1 12 MOV A,Rn + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_a_rn(uchar code) +{ + acc->write(get_reg(code & 0x07)->read()); + return(resGO); +} + + +/* + * 0xf0 1 24 MOVX @DPTR,A + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_movx_Sdptr_a(uchar code) +{ + xram->write(sfr->read(DPH)*256 + sfr->read(DPL), acc->read()); + tick(1); + return(resGO); +} + + +/* + * 0xf2-0xf3 1 24 MOVX @Ri,A + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_movx_Sri_a(uchar code) +{ + t_mem d; + + d= get_reg(code & 0x01)->read(); + xram->write(sfr->read(P2)*256 + d, acc->read()); + tick(1); + return(resGO); +} + + +/* + * 0xf5 2 12 MOV addr,A + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_addr_a(uchar code) +{ + class cl_memory_cell *cell; + + cell= get_direct(fetch()); + cell->write(acc->read()); + return(resGO); +} + + +/* + * 0xf6-0xf7 1 12 MOV @Ri,A + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_Sri_a(uchar code) +{ + class cl_memory_cell *cell; + + cell= iram->get_cell(get_reg(code & 0x01)->read()); + cell->write(acc->read()); + return(resGO); +} + + +/* + * 0xf8-0xff 1 12 MOV Rn,A + *____________________________________________________________________________ + * + */ + +int +cl_51core::inst_mov_rn_a(uchar code) +{ + class cl_memory_cell *reg; + + reg= get_reg(code &0x07); + reg->write(acc->read()); + return(resGO); +} + + +/* End of s51.src/mov.cc */ diff --git a/sim/ucsim/s51.src/pca.cc b/sim/ucsim/s51.src/pca.cc new file mode 100644 index 0000000..b9eeef3 --- /dev/null +++ b/sim/ucsim/s51.src/pca.cc @@ -0,0 +1,330 @@ +/* + * Simulator of microcontrollers (pca.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include + +// sim.src +#include "itsrccl.h" + +// local +#include "pcacl.h" +#include "regs51.h" +#include "types51.h" + + +cl_pca::cl_pca(class cl_uc *auc, int aid): + cl_hw(auc, HW_PCA, aid, "pca") +{ + t0_overflows= ECI_edge= 0; + int i; + for (i= 0; i < 5; cex_pos[i]= cex_neg[i]= DD_FALSE, i++) ; +} + +int +cl_pca::init(void) +{ + sfr= uc->address_space(MEM_SFR_ID); + //t_addr CCAPL[5]= {CCAPL[0], CCAPL[1], CCAPL[2], CCAPL[3], CCAPL[4]}; + //t_addr CCAPH[5]= {CCAPH[0], CCAPH[1], CCAPH[2], CCAPH[3], CCAPH[4]}; + //t_addr CCAPM[5]= {CCAPM[0], CCAPM[1], CCAPM[2], CCAPM[3], CCAPM[4]}; + t_addr CCAPL[5]= {CCAP0L, CCAP1L, CCAP2L, CCAP3L, CCAP4L}; + t_addr CCAPH[5]= {CCAP0H, CCAP1H, CCAP2H, CCAP3H, CCAP4H}; + t_addr CCAPM[5]= {CCAPM0, CCAPM1, CCAPM2, CCAPM3, CCAPM4}; + int i; + + if (!sfr) + { + fprintf(stderr, "No SFR to register PCA[%d] into\n", id); + } + register_cell(sfr, CMOD, &cell_cmod, wtd_restore_write); + register_cell(sfr, CCON, &cell_ccon, wtd_restore_write); + for (i= 0; i < 5; i++) + { + use_cell(sfr, CCAPL[i], &cell_ccapl[i], wtd_restore); + use_cell(sfr, CCAPH[i], &cell_ccaph[i], wtd_restore); + register_cell(sfr, CCAPM[i], &cell_ccapm[i], wtd_restore_write); + } + use_cell(sfr, CL, &cell_cl, wtd_restore); + use_cell(sfr, CH, &cell_ch, wtd_restore); + return(0); +} + +void +cl_pca::added_to_uc(void) +{ + uc->it_sources->add_at(4, new cl_it_src(bmEC, CCON, bmCCF4, 0x0033, false, + "PCA module #4", 5)); + uc->it_sources->add_at(4, new cl_it_src(bmEC, CCON, bmCCF3, 0x0033, false, + "PCA module #3", 5)); + uc->it_sources->add_at(4, new cl_it_src(bmEC, CCON, bmCCF2, 0x0033, false, + "PCA module #2", 5)); + uc->it_sources->add_at(4, new cl_it_src(bmEC, CCON, bmCCF1, 0x0033, false, + "PCA module #1", 5)); + uc->it_sources->add_at(4, new cl_it_src(bmEC, CCON, bmCCF0, 0x0033, false, + "PCA module #0", 5)); + uc->it_sources->add_at(4, new cl_it_src(bmEC, CCON, bmCF, 0x0033, false, + "PCA counter", 5)); +} + +void +cl_pca::write(class cl_memory_cell *cell, t_mem *val) +{ + //uchar bmCEX[5]= {bmCEX0, bmCEX1, bmCEX2, bmCEX3, bmCEX4}; + //uchar bmCCF[5]= {bmCCF0, bmCCF1, bmCCF2, bmCCF3, bmCCF4}; + + if (cell == cell_cmod) + { + bit_CIDL= *val & bmCIDL; + bit_WDTE= *val & bmWDTE; + bit_ECF = *val & bmECF; + t_mem o= clk_source; + if ((clk_source= *val & (bmCPS1|bmCPS0)) != o) + t0_overflows= ECI_edge= 0; + } + else if (cell == cell_ccon) + { + bit_CR= *val & bmCR; + } + else + { + int i; + for (i= 0; i < 5; i++) + { + if (cell == cell_ccapm[i]) + { + t_mem o= ccapm[i]; + ccapm[i]= *val & 0xff; + if (o != ccapm[i]) + cex_neg[i]= cex_pos[i]= DD_FALSE; + } + else + { + if (ccapm[i] & (bmMAT|bmTOG)) + { + if (cell == cell_ccapl[i]) + { + cell_ccapm[i]->set_bit0(bmECOM); + ccapm[i]= cell_ccapm[i]->get(); + } + else if (cell == cell_ccaph[i]) + { + cell_ccapm[i]->set_bit1(bmECOM); + ccapm[i]= cell_ccapm[i]->get(); + } + } + } + } + } +} + +/*void +cl_pca::mem_cell_changed(class cl_m *mem, t_addr addr) +{ + class cl_m *sfr= uc->mem(MEM_SFR); + + if (mem && sfr && mem == sfr) + { + if (addr == addr_ccapXl) + ccapXl= sfr->get_cell(addr_ccapXl); + else if (addr == addr_ccapXh) + ccapXh= sfr->get_cell(addr_ccapXh); + else if (addr == addr_ccapmX) + ccapmX= sfr->get_cell(addr_ccapmX); + } +}*/ + +int +cl_pca::tick(int cycles) +{ + int ret= resGO; + + if (!bit_CR) + return(resGO); + if (uc->state == stIDLE && + bit_CIDL) + return(resGO); + + switch (clk_source) + { + case 0: + do_pca_counter(cycles); + break; + case bmCPS0: + do_pca_counter(cycles*3); + break; + case bmCPS1: + do_pca_counter(t0_overflows); + t0_overflows= 0; + break; + case (bmCPS0|bmCPS1): + do_pca_counter(ECI_edge); + ECI_edge= 0; + break; + } + return(ret); +} + +void +cl_pca::do_pca_counter(int cycles) +{ + //class cl_m *sfr= uc->mem(MEM_SFR); + + while (cycles--) + { + if (cell_cl->add(1) == 0) + { + int i; + for (i= 0; i < 5; i++) + if (ccapm[i] & bmPWM) + cell_ccapl[i]->set(cell_ccaph[i]->get()); + if (cell_ch->add(1) == 0) + { + // CH,CL overflow + cell_ccon->set_bit1(bmCF); + do_pca_module(0); + do_pca_module(1); + do_pca_module(2); + do_pca_module(3); + do_pca_module(4); + } + } + } +} + +void +cl_pca::do_pca_module(int nr) +{ + uchar bmCEX[5]= {bmCEX0, bmCEX1, bmCEX2, bmCEX3, bmCEX4}; + uchar bmCCF[5]= {bmCCF0, bmCCF1, bmCCF2, bmCCF3, bmCCF4}; + //uint p1= sfr->get(P1); + + bool capture= DD_FALSE; + if ((ccapm[nr] & bmCAPP) && + cex_pos[nr]) + { + capture= DD_TRUE; + cex_pos[nr]= DD_FALSE; + } + if ((ccapm[nr] & bmCAPN) && + cex_neg[nr]) + { + capture= DD_TRUE; + cex_pos[nr]= DD_FALSE; + } + if (capture) + { + // Capture + cell_ccapl[nr]->set(cell_cl->get()); + cell_ccaph[nr]->set(cell_ch->get()); + cell_ccon->set_bit1(bmCCF[nr]); + } + + if (ccapm[nr] & bmECOM) + { + // Comparator enabled + if (cell_cl->get() == cell_ccapl[nr]->get() && + cell_ch->get() == cell_ccaph[nr]->get()) + { + // Match + if (nr == 4 && + (bit_WDTE)) + { + reset(); + return; + } + cell_ccon->set_bit1(bmCCF[nr]); + if (ccapm[nr] & bmTOG) + { + // Toggle + sfr->set(P1, sfr->get(P1) ^ bmCEX[nr]); + } + } + if (ccapm[nr] & bmPWM) + { + // PWM + /*if (cell_cl->get() == 0) + cell_ccapl[nr]->set(cell_ccaph[nr]->get());*/ + if (cell_cl->get() < cell_ccapl[nr]->get()) + //sfr->set(P1, sfr->get(P1) & ~(bmCEX[nr])); + sfr->set_bit1(P1, bmCEX[nr]); + else + sfr->set_bit1(P1, bmCEX[nr]); + } + } +} + +void +cl_pca::reset(void) +{ + t0_overflows= ECI_edge= 0; + int i; + for (i= 0; i < 5; cex_pos[i]= cex_neg[i]= DD_FALSE, i++) ; +} + +void +cl_pca::happen(class cl_hw *where, enum hw_event he, void *params) +{ + struct ev_port_changed *ep= (struct ev_port_changed *)params; + uchar bmCEX[5]= {bmCEX0, bmCEX1, bmCEX2, bmCEX3, bmCEX4}; + + if (where->cathegory == HW_PORT && + he == EV_PORT_CHANGED && + ep->id == 1) + { + t_mem p1n= ep->new_pins & ep->new_value; + t_mem p1o= ep->pins & ep->prev_value; + if (!(p1n & bmECI) && + (p1o & bmECI)) + ECI_edge++; + int i; + for (i= 0; i < 5; i++) + { + if (!(p1n & bmCEX[i]) && + (p1o & bmCEX[i])) + cex_neg[i]= DD_TRUE; + else if ((p1n & bmCEX[i]) && + !(p1o & bmCEX[i])) + cex_pos[i]= DD_TRUE; + } + } + else if (where->cathegory == HW_TIMER && + he == EV_OVERFLOW && + where->id == 0) + { + t0_overflows++; + } +} + + +void +cl_pca::print_info(class cl_console_base *con) +{ + con->dd_printf("%s[%d] FIXME\n", id_string, id); +} + + +/* End of s51.src/pca.cc */ diff --git a/sim/ucsim/s51.src/pcacl.h b/sim/ucsim/s51.src/pcacl.h new file mode 100644 index 0000000..dcbab4e --- /dev/null +++ b/sim/ucsim/s51.src/pcacl.h @@ -0,0 +1,76 @@ +/* + * Simulator of microcontrollers (pcacl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef PORTCL_HEADER +#define PORTCL_HEADER + +// sim.src +//#include "stypes.h" +//#include "pobjcl.h" +#include "uccl.h" + +// local +//#include "newcmdcl.h" + + +class cl_pca: public cl_hw +{ +public: + class cl_address_space *sfr; + class cl_memory_cell *cell_cl, *cell_ch; + class cl_memory_cell *cell_ccapl[5], *cell_ccaph[5], *cell_ccapm[5]; + t_mem ccapm[5]; + class cl_memory_cell *cell_cmod, *cell_ccon; + long t0_overflows, ECI_edge; + t_mem clk_source; + bool bit_CIDL, bit_WDTE, bit_ECF, bit_CR; + bool cex_pos[5], cex_neg[5]; +public: + cl_pca(class cl_uc *auc, int aid); + virtual int init(void); + + virtual void added_to_uc(void); + + //virtual t_mem read(class cl_memory_cell *cell); + virtual void write(class cl_memory_cell *cell, t_mem *val); + + //virtual t_mem set_cmd(t_mem value); + //virtual void mem_cell_changed(class cl_m *mem, t_addr addr); + + virtual int tick(int cycles); + virtual void do_pca_counter(int cycles); + virtual void do_pca_module(int nr); + virtual void reset(void); + virtual void happen(class cl_hw *where, enum hw_event he, void *params); + + virtual void print_info(class cl_console_base *con); +}; + + +#endif + +/* End of s51.src/pcacl.h */ diff --git a/sim/ucsim/s51.src/port.cc b/sim/ucsim/s51.src/port.cc new file mode 100644 index 0000000..b9f0a47 --- /dev/null +++ b/sim/ucsim/s51.src/port.cc @@ -0,0 +1,174 @@ +/* + * Simulator of microcontrollers (port.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include + +#include "portcl.h" +#include "regs51.h" +#include "types51.h" + + +cl_port::cl_port(class cl_uc *auc, int aid): + cl_hw(auc, HW_PORT, aid, "port") +{ + port_pins= 0xff; +} + +int +cl_port::init(void) +{ + switch (id) + { + case 0: addr_p= P0; break; + case 1: + { + addr_p= P1; + /*class cl_hw *hw; + if ((hw= uc->get_hw(HW_TIMER, 2, 0))) + hws_to_inform->add(hw);*/ + make_partner(HW_TIMER, 2); + make_partner(HW_PCA, 0); + break; + } + case 2: addr_p= P2; break; + case 3: + { + addr_p= P3; + //class cl_hw *hw; + /*if ((hw= uc->get_hw(HW_TIMER, 0, 0))) + hws_to_inform->add(hw); + if ((hw= uc->get_hw(HW_TIMER, 1, 0))) + hws_to_inform->add(hw); + if ((hw= uc->get_hw(HW_DUMMY, 0, 0))) + hws_to_inform->add(hw);*/ + make_partner(HW_TIMER, 0); + make_partner(HW_TIMER, 1); + make_partner(HW_INTERRUPT, 0); + make_partner(HW_DUMMY, 0); + break; + } + default: addr_p= P0; return(1); + } + class cl_address_space *sfr= uc->address_space(MEM_SFR_ID); + if (!sfr) + { + fprintf(stderr, "No SFR to register port into\n"); + } + //cell_p= sfr->register_hw(addr_p, this, (int*)0); + register_cell(sfr, addr_p, &cell_p, wtd_restore_write); + prev= cell_p->get(); + return(0); +} + +t_mem +cl_port::read(class cl_memory_cell *cell) +{ + //printf("port[%d] read\n",id); + return(cell->get() & port_pins); +} + +void +cl_port::write(class cl_memory_cell *cell, t_mem *val) +{ + struct ev_port_changed ep; + + (*val)&= 0xff; // 8 bit port + ep.id= id; + ep.addr= addr_p; + ep.prev_value= cell_p->get(); + ep.new_value= *val; + ep.pins= ep.new_pins= port_pins; + if (ep.prev_value != ep.new_value) + inform_partners(EV_PORT_CHANGED, &ep); + prev= cell_p->get(); + //printf("port[%d] write 0x%x\n",id,val); +} + +void +cl_port::set_cmd(class cl_cmdline *cmdline, class cl_console_base *con) +{ + struct ev_port_changed ep; + class cl_cmd_arg *params[1]= { cmdline->param(0) }; + long value; + + if (cmdline->syntax_match(uc, NUMBER)) + { + value= params[0]->value.number & 0xff; + + ep.id= id; + ep.addr= addr_p; + ep.pins= port_pins; + port_pins= value; + ep.prev_value= cell_p->get(); + ep.new_value= cell_p->get(); + ep.new_pins= port_pins; + if (ep.pins != ep.new_pins) + inform_partners(EV_PORT_CHANGED, &ep); + } + else + { + con->dd_printf("set hardware port[%d] pins_value\n Set port pins\n", + id); + value= 0; + } +} + +/*void +cl_port::mem_cell_changed(class cl_m *mem, t_addr addr) +{ + cl_hw::mem_cell_changed(mem, addr); + t_mem d= sfr->get(); + write(sfr, &d); +}*/ + +void +cl_port::print_info(class cl_console_base *con) +{ + uchar data; + + con->dd_printf("%s[%d]\n", id_string, id); + data= cell_p->get(); + con->dd_printf("P%d ", id); + con->print_bin(data, 8); + con->dd_printf(" 0x%02x %3d %c (Value in SFR register)\n", + data, data, isprint(data)?data:'.'); + + data= /*uc->*/port_pins/*[id]*/; + con->dd_printf("Pin%d ", id); + con->print_bin(data, 8); + con->dd_printf(" 0x%02x %3d %c (Output of outside circuits)\n", + data, data, isprint(data)?data:'.'); + + data= cell_p->read(); + con->dd_printf("Port%d ", id); + con->print_bin(data, 8); + con->dd_printf(" 0x%02x %3d %c (Value on the port pins)\n", + data, data, isprint(data)?data:'.'); +} + + +/* End of s51.src/port.cc */ diff --git a/sim/ucsim/s51.src/portcl.h b/sim/ucsim/s51.src/portcl.h new file mode 100644 index 0000000..3566dd7 --- /dev/null +++ b/sim/ucsim/s51.src/portcl.h @@ -0,0 +1,62 @@ +/* + * Simulator of microcontrollers (portcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef PORTCL_HEADER +#define PORTCL_HEADER + +#include "stypes.h" +#include "pobjcl.h" +#include "uccl.h" + +#include "newcmdcl.h" + + +class cl_port: public cl_hw +{ +public: + t_addr addr_p; + class cl_memory_cell *cell_p; + t_mem port_pins; + t_mem prev; +public: + cl_port(class cl_uc *auc, int aid); + virtual int init(void); + + virtual t_mem read(class cl_memory_cell *cell); + virtual void write(class cl_memory_cell *cell, t_mem *val); + + virtual void set_cmd(class cl_cmdline *cmdline, class cl_console_base *con); + //virtual void mem_cell_changed(class cl_m *mem, t_addr addr); + + //virtual int tick(int cycles); + virtual void print_info(class cl_console_base *con); +}; + + +#endif + +/* End of s51.src/portcl.h */ diff --git a/sim/ucsim/s51.src/regs51.h b/sim/ucsim/s51.src/regs51.h new file mode 100644 index 0000000..60feafe --- /dev/null +++ b/sim/ucsim/s51.src/regs51.h @@ -0,0 +1,347 @@ +/* + * Simulator of microcontrollers (regs51.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef REGS51_HEADER +#define REGS51_HEADER + + +/* Address of SFR registers */ + +#define ACC 0xe0 /* Accumulator */ +#define B 0xf0 /* B register (scondary accumulator) */ +#define PSW 0xd0 /* Program Status Word */ +#define SP 0x81 /* Stack Pointer */ +#define DPL 0x82 /* Data Pointer Low byte */ +#define DPH 0x83 /* Data Pointer High byte */ +#define DPL1 0x84 /* 2nd Data Pointer Low byte */ +#define DPH1 0x85 /* 2nd Data Pointer High byte */ +#define DPS 0x86 /* DPS 1H=DPTR is DPL1/DPH1, 2H=AUTO DPTR INCR */ +#define P0 0x80 /* Port #0 */ +#define P1 0x90 /* Port #1 */ +#define P2 0xa0 /* Port #2 */ +#define P3 0xb0 /* Port #3 */ +#define IP 0xb8 /* Intrrupt Priority */ +#define IE 0xa8 /* Interrupt Enable */ +#define TMOD 0x89 /* Timer MODe */ +#define TCON 0x88 /* Timer CONtrol */ +#define T2CON 0xc8 /* Timer #2 CONtrol */ +#define TH0 0x8c /* Timer #0 High byte */ +#define TL0 0x8a /* Timer #0 Low byte */ +#define TH1 0x8d /* Timer #1 High byte */ +#define TL1 0x8b /* Timer #1 Low byte */ +#define SCON 0x98 /* Serial line CONtrol */ +#define TH2 0xcd /* Timer #2 High byte */ +#define TL2 0xcc /* Timer #2 Low byte */ +#define RCAP2H 0xcb /* Capture Register of Timer #2 High byte */ +#define RCAP2L 0xca /* Capture Register of Timer #2 Low byte */ +#define SBUF 0x99 /* Serial line BUFfer */ +#define PCON 0x87 /* Power CONtrol */ + +#define AUXR 0x8e /* Auxiliary Register */ +#define AUXR1 0xa2 /* Secondary Aux Register */ + +#define P4 0x80 +#define DPXL 0x84 /* */ +#define DPL1 0x84 /* 2nd Data Pointer Low byte */ +#define DPH1 0x85 /* 2nd Data Pointer High byte */ +#define DPS 0x86 /* DPS 1H=DPTR is DPL1/DPH1,... */ +#define EXIF 0x91 /* */ +#define P4CNT 0x92 /* */ +#define DPX 0x93 /* Data Pointer HHigh byte */ +#define DPX1 0x95 /* Data Pointer HHigh byte */ +#define ESP 0x9b /* Extended Stack Pointer */ +#define ACON 0x9d /* */ +#define P5 0xa1 +#define P5CNT 0xa2 /* */ +#define C0C 0xa3 /* */ +#define WDTRST 0xa6 /* */ +#define IE0 0xa8 /* */ +#define SADDR 0xa9 /* */ +#define IPH0 0xb7 /* */ +#define IPH 0xb7 +#define IPL0 0xb8 /* */ +#define SADEN 0xb9 /* */ +#define SPH 0xbd /* */ +#define PMR 0xc4 /* */ +#define MCON 0xc6 /* */ +#define TA 0xc7 /* */ +#define T2MOD 0xc9 /* */ +#define COR 0xce /* */ +#define PSW1 0xd1 /* */ +#define MCNT0 0xd1 +#define MCNT1 0xd2 +#define MA 0xd3 /* MA register from math accelerator */ +#define MB 0xd4 /* MB register from math accelerator */ +#define MC 0xd5 /* MC register from math accelerator */ +#define CCON 0xd8 /* */ +#define CMOD 0xd9 /* */ +#define WDCON 0xd8 /* */ +#define CCAPM0 0xda /* */ +#define CCAPM1 0xdb /* */ +#define CCAPM2 0xdc /* */ +#define CCAPM3 0xdd /* */ +#define CCAPM4 0xde /* */ +#define C1C 0xe3 /* */ +#define CL 0xe9 /* */ +#define CCAP0L 0xea /* */ +#define CCAP1L 0xeb /* */ +#define CCAP2L 0xec /* */ +#define CCAP3L 0xed /* */ +#define CCAP4L 0xee /* */ +#define CH 0xf9 /* */ +#define CCAP0H 0xfa /* */ +#define CCAP1H 0xfb /* */ +#define CCAP2H 0xfc /* */ +#define CCAP3H 0xfd /* */ +#define CCAP4H 0xfe /* */ + +/* Bit masks of flag bits in PSW (0xd0)*/ + +#define bmCY 0x80 /* carry */ +#define bmAC 0x40 /* acarry */ +#define bmF0 0x20 /* flag 0 */ +#define bmRS1 0x10 /* register select 1 */ +#define bmRS0 0x08 /* register select 0 */ +#define bmOV 0x04 /* arithmetic overflow */ +#define bmP 0x01 /* parity, set by hardware */ + +/* Bit masks in PCON (0x87) */ + +#define bmSMOD1 0x80 +#define bmSMOD 0x80 +#define bmSMOD0 0x40 +#define bmPOF 0x10 +#define bmGF1 0x08 +#define bmGF0 0x04 +#define bmPD 0x02 +#define bmIDL 0x01 + +/* Bit masks in IE (0xa8) */ + +#define bmEA 0x80 +#define bmEC 0x40 +#define bmET2 0x20 +#define bmES 0x10 +#define bmET1 0x08 +#define bmEX1 0x04 +#define bmET0 0x02 +#define bmEX0 0x01 + +/* Bit masks in IP (0xb8) */ + +#define bmPPC 0x40 +#define bmPT2 0x20 +#define bmPS 0x10 +#define bmPT1 0x08 +#define bmPX1 0x04 +#define bmPT0 0x02 +#define bmPX0 0x01 + +/* Bit masks in IPL0 (0xb8) */ + +#define bmIPL0_6 0x40 +#define bmIPL0_5 0x20 +#define bmIPL0_4 0x10 +#define bmIPL0_3 0x08 +#define bmIPL0_2 0x04 +#define bmIPL0_1 0x02 +#define bmIPL0_0 0x01 + +/* Bit masks in IPH0 (0xb7) */ + +#define bmIPH0_6 0x40 +#define bmIPH0_5 0x20 +#define bmIPH0_4 0x10 +#define bmIPH0_3 0x08 +#define bmIPH0_2 0x04 +#define bmIPH0_1 0x02 +#define bmIPH0_0 0x01 + +/* Bit masks in P1 (0x90) */ + +#define bmCEX4 0x80 +#define bmCEX3 0x40 +#define bmCEX2 0x20 +#define bmCEX1 0x10 +#define bmCEX0 0x08 +#define bmECI 0x04 +#define bmT2EX 0x02 +#define bmT2 0x01 + +/* Bit masks in P3 (0xb0) */ + +#define bmRXD 0x01 +#define bmTXD 0x02 +#define bm_INT0 0x04 +#define bm_INT1 0x08 +#define bmT0 0x10 +#define bmT1 0x20 +#define bm_WR 0x40 +#define bm_RD 0x80 + +/* Bit masks in TMOD (0x89) */ + +#define bmGATE1 0x80 +#define bmC_T1 0x40 +#define bmM11 0x20 +#define bmM01 0x10 +#define bmGATE0 0x08 +#define bmC_T0 0x04 +#define bmM10 0x02 +#define bmM00 0x01 + +/* Bit masks in TCON (0x88) */ + +#define bmTF1 0x80 +#define bmTR1 0x40 +#define bmTF0 0x20 +#define bmTR0 0x10 +#define bmIE1 0x08 +#define bmIT1 0x04 +#define bmIE0 0x02 +#define bmIT0 0x01 + +/* Bit masks in AUXR (0x8e) */ + +#define bmEXTRAM 0x02 +#define bmDISABLE 0x01 + +/* Bit masks in AUXR1 (0xa2) */ + +#define bmENBOOT 0x20 +#define bmGF2 0x08 +#define bmDPS 0x01 + +/* Bit masks in T2CON (0xc8) */ + +#define bmTF2 0x80 +#define bmEXF2 0x40 +#define bmRCLK 0x20 +#define bmTCLK 0x10 +#define bmEXEN2 0x08 +#define bmTR2 0x04 +#define bmC_T2 0x02 +#define bmCP_RL2 0x01 + +/* Bit masks in SCON (0x98) */ + +#define bmFE_SM0 0x80 +#define bmFE 0x80 +#define bmSM0 0x80 +#define bmSM1 0x40 +#define bmSM2 0x20 +#define bmREN 0x10 +#define bmTB8 0x08 +#define bmRB8 0x04 +#define bmTI 0x02 +#define bmRI 0x01 + +/* Bit masks in T2MOD (0xc9) */ + +#define bmT2OE 0x02 +#define bmDCEN 0x01 + +/* Bit masks in CMOD (0xd9) */ + +#define bmCIDL 0x80 +#define bmWDTE 0x40 +#define bmCPS1 0x04 +#define bmCPS0 0x02 +#define bmECF 0x01 + +/* Bit masks in CCON (0xd8) */ + +#define bmCF 0x80 +#define bmCR 0x40 +#define bmCCF4 0x10 +#define bmCCF3 0x08 +#define bmCCF2 0x04 +#define bmCCF1 0x02 +#define bmCCF0 0x01 + +/* Bit masks in CCAPM0 (0xda) */ + +#define bmECOM0 0x40 +#define bmCAPP0 0x20 +#define bmCAPN0 0x10 +#define bmMAT0 0x08 +#define bmTOG0 0x04 +#define bmPWM0 0x02 +#define bmECCF0 0x01 + +/* Bit masks in CCAPM1 (0xdb) */ + +#define bmECOM1 0x40 +#define bmCAPP1 0x20 +#define bmCAPN1 0x10 +#define bmMAT1 0x08 +#define bmTOG1 0x04 +#define bmPWM1 0x02 +#define bmECCF1 0x01 + +/* Bit masks in CCAPM2 (0xdc) */ + +#define bmECOM2 0x40 +#define bmCAPP2 0x20 +#define bmCAPN2 0x10 +#define bmMAT2 0x08 +#define bmTOG2 0x04 +#define bmPWM2 0x02 +#define bmECCF2 0x01 + +/* Bit masks in CCAPM3 (0xdd) */ + +#define bmECOM3 0x40 +#define bmCAPP3 0x20 +#define bmCAPN3 0x10 +#define bmMAT3 0x08 +#define bmTOG3 0x04 +#define bmPWM3 0x02 +#define bmECCF3 0x01 + +/* Bit masks in CCAPM4 (0xde) */ + +#define bmECOM4 0x40 +#define bmCAPP4 0x20 +#define bmCAPN4 0x10 +#define bmMAT4 0x08 +#define bmTOG4 0x04 +#define bmPWM4 0x02 +#define bmECCF4 0x01 + +#define bmECOM 0x40 +#define bmCAPP 0x20 +#define bmCAPN 0x10 +#define bmMAT 0x08 +#define bmTOG 0x04 +#define bmPWM 0x02 +#define bmEDDF 0x01 + + +#endif + +/* End of s51.src/regs51.h */ diff --git a/sim/ucsim/s51.src/s51.cc b/sim/ucsim/s51.src/s51.cc new file mode 100644 index 0000000..207f5de --- /dev/null +++ b/sim/ucsim/s51.src/s51.cc @@ -0,0 +1,64 @@ +/* + * Simulator of microcontrollers (s51.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +// prj +#include "globals.h" + +// sim.src +#include "appcl.h" + +// local +#include "sim51cl.h" + + +/* + * Main function of the Simulator of MCS51. Everything starts here. + */ + +int +main(int argc, char *argv[]) +{ + int retval; + //class cl_app *app; + class cl_sim *sim; + + cpus= cpus_51; + application= new cl_app(); + application->init(argc, argv); + sim= new cl_sim51(application); + if (sim->init()) + return(1); + application->set_simulator(sim); + retval= /*sim->main()*/application->run(); + delete application; + + return(retval); +} + +/* End of s51.src/s51.cc */ diff --git a/sim/ucsim/s51.src/serial.cc b/sim/ucsim/s51.src/serial.cc new file mode 100644 index 0000000..e36fb42 --- /dev/null +++ b/sim/ucsim/s51.src/serial.cc @@ -0,0 +1,487 @@ +/* + * Simulator of microcontrollers (serial.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include +#include +#ifdef HAVE_TERMIOS_H +#include +#endif +#ifdef HAVE_UNISTD_H +#include +#endif +#include +#include +#include +#include +#include + +// prj +#include "globals.h" + +// local +#include "serialcl.h" +#include "regs51.h" +#include "uc51cl.h" +#include "cmdutil.h" + + +cl_serial::cl_serial(class cl_uc *auc): + cl_hw(auc, HW_UART, 0, "uart") +{ + serial_in= serial_out= NIL; +} + +cl_serial::~cl_serial(void) +{ + if (serial_in != serial_out && serial_in) + { +#ifdef HAVE_TERMIOS_H + if (isatty(fileno(serial_in))) + tcsetattr(fileno(serial_in), TCSANOW, &saved_attributes_in); +#endif + fclose(serial_in); + } + if (serial_out) + { +#ifdef HAVE_TERMIOS_H + if (isatty(fileno(serial_out))) + tcsetattr(fileno(serial_out), TCSANOW, &saved_attributes_out); +#endif + fclose(serial_out); + } + delete serial_in_file_option; + delete serial_out_file_option; +} + +int +cl_serial::init(void) +{ +#ifdef HAVE_TERMIOS_H + int i; + struct termios tattr; +#endif + + set_name("mcs51_uart"); + sfr= uc->address_space(MEM_SFR_ID); + if (sfr) + { + //sbuf= sfr->register_hw(SBUF, this, 0); + //pcon= sfr->register_hw(PCON, this, 0); + //scon= sfr->register_hw(SCON, this, 0); + register_cell(sfr, SBUF, &sbuf, wtd_restore_write); + register_cell(sfr, PCON, &pcon, wtd_restore_write); + register_cell(sfr, SCON, &scon, wtd_restore_write); + } + + serial_in_file_option= new cl_optref(this); + serial_in_file_option->init(); + serial_in_file_option->use("serial_in_file"); + serial_out_file_option= new cl_optref(this); + serial_out_file_option->init(); + serial_out_file_option->use("serial_out_file"); + + //char *fni, *fno; + /*if ((fni= serial_in_file_option->get_value((char*)0))) + serial_in= fopen(fni, "r"); + if ((fno= serial_out_file_option->get_value((char*)0))) + serial_out= fopen(fno, "w");*/ + + //serial_in = (FILE*)application->args->get_parg(0, "Ser_in"); + //serial_out= (FILE*)application->args->get_parg(0, "Ser_out"); + serial_in = (FILE*)serial_in_file_option->get_value((void*)0); + serial_out= (FILE*)serial_out_file_option->get_value((void*)0); + + if (serial_in != serial_out && serial_in) + { + // making `serial' unbuffered + if (setvbuf(serial_in, NULL, _IONBF, 0)) + perror("Unbuffer serial input channel"); +#ifdef _WIN32 + if (CH_SERIAL != get_handle_type((HANDLE)_get_osfhandle(fileno(serial_in)))) +#elif defined HAVE_TERMIOS_H + // setting O_NONBLOCK + if ((i= fcntl(fileno(serial_in), F_GETFL, 0)) < 0) + perror("Get flags of serial input"); + i|= O_NONBLOCK; + if (fcntl(fileno(serial_in), F_SETFL, i) < 0) + perror("Set flags of serial input"); + // switching terminal to noncanonical mode + if (isatty(fileno(serial_in))) + { + tcgetattr(fileno(serial_in), &saved_attributes_in); + tcgetattr(fileno(serial_in), &tattr); + tattr.c_lflag&= ~(ICANON|ECHO); + tattr.c_cc[VMIN] = 1; + tattr.c_cc[VTIME]= 0; + tcsetattr(fileno(serial_in), TCSAFLUSH, &tattr); + } + else +#endif + fprintf(stderr, "Warning: serial input interface connected to a " + "non-terminal file.\n"); + } + if (serial_out) + { + // making `serial' unbuffered + if (setvbuf(serial_out, NULL, _IONBF, 0)) + perror("Unbuffer serial output channel"); +#ifdef _WIN32 + if (CH_SERIAL != get_handle_type((HANDLE)_get_osfhandle(fileno(serial_out)))) +#elif defined HAVE_TERMIOS_H + // setting O_NONBLOCK + if ((i= fcntl(fileno(serial_out), F_GETFL, 0)) < 0) + perror("Get flags of serial output"); + i|= O_NONBLOCK; + if (fcntl(fileno(serial_out), F_SETFL, i) < 0) + perror("Set flags of serial output"); + // switching terminal to noncanonical mode + if (isatty(fileno(serial_out))) + { + tcgetattr(fileno(serial_out), &saved_attributes_out); + tcgetattr(fileno(serial_out), &tattr); + tattr.c_lflag&= ~(ICANON|ECHO); + tattr.c_cc[VMIN] = 1; + tattr.c_cc[VTIME]= 0; + tcsetattr(fileno(serial_out), TCSAFLUSH, &tattr); + } + else +#endif + fprintf(stderr, "Warning: serial output interface connected to a " + "non-terminal file.\n"); + } + + class cl_hw *t2= uc->get_hw(HW_TIMER, 2, 0); + if ((there_is_t2= t2 != 0)) + { + t_mem d= sfr->get(T2CON); + t2_baud= d & (bmRCLK | bmTCLK); + } + else + t2_baud= DD_FALSE; + + return(0); +} + +void +cl_serial::new_hw_added(class cl_hw *new_hw) +{ + if (new_hw->cathegory == HW_TIMER && + new_hw->id == 2) + { + there_is_t2= DD_TRUE; + t_mem d= sfr->get(T2CON); + t2_baud= d & (bmRCLK | bmTCLK); + } +} + +void +cl_serial::added_to_uc(void) +{ + uc->it_sources->add(new cl_it_src(bmES , SCON, bmTI , 0x0023, false, + "serial transmit", 6)); + uc->it_sources->add(new cl_it_src(bmES , SCON, bmRI , 0x0023, false, + "serial receive", 6)); +} + +t_mem +cl_serial::read(class cl_memory_cell *cell) +{ + if (cell == sbuf) + return(s_in); + else + return(cell->get()); +} + +void +cl_serial::write(class cl_memory_cell *cell, t_mem *val) +{ + if (cell == sbuf) + { + s_out= *val; + s_sending= DD_TRUE; + s_tr_bit = 0; + s_tr_tick= 0; + s_tr_t1= 0; + } + if (cell == scon) + { + _mode= *val >> 6; + _bmREN= *val & bmREN; + _bits= 8; + switch (_mode) + { + case 0: + _bits= 8; + _divby= 12; + break; + case 1: + _bits= 10; + _divby= _bmSMOD?16:32; + break; + case 2: + _bits= 11; + _divby= _bmSMOD?16:32; + break; + case 3: + _bits= 11; + _divby= _bmSMOD?16:32; + break; + } + } + else if (cell == pcon) + { + _bmSMOD= *val & bmSMOD; + /*switch (_mode) + { + case 1: + _divby= _bmSMOD?16:32; + break; + case 2: + _divby= _bmSMOD?16:32; + break; + case 3: + _divby= _bmSMOD?16:32; + break; + }*/ + if (_mode) + _divby= _bmSMOD?16:32; + } +} + +/*void +cl_serial::mem_cell_changed(class cl_m *mem, t_addr addr) +{ + t_mem d; + + d= sbuf->get(); + write(sbuf, &d); + d= pcon->get(); + write(pcon, &d); + d= scon->get(); + write(scon, &d); +}*/ + +int +cl_serial::serial_bit_cnt(void) +{ + //int divby= 12; + int *tr_src= 0, *rec_src= 0; + + switch (_mode) + { + case 0: + //divby = 12; + tr_src = &s_tr_tick; + rec_src= &s_rec_tick; + break; + case 1: + case 3: + //divby = (/*pcon->get()&bmSMOD*/_bmSMOD)?16:32; + tr_src = &s_tr_t1; + rec_src= &s_rec_t1; + break; + case 2: + //divby = (/*pcon->get()&bmSMOD*/_bmSMOD)?16:32; + tr_src = &s_tr_tick; + rec_src= &s_rec_tick; + break; + } + if (t2_baud) + _divby= 16; + if (s_sending) + { + while (*tr_src >= _divby) + { + (*tr_src)-= _divby; + s_tr_bit++; + //printf("serial bit sent %d\n",uc->ticks->ticks); + } + } + if (s_receiving) + { + while (*rec_src >= _divby) + { + (*rec_src)-= _divby; + s_rec_bit++; + } + } + return(0); +} + +int +cl_serial::tick(int cycles) +{ + char c; + + serial_bit_cnt(/*_mode*/); + if (s_sending && + (s_tr_bit >= _bits)) + { + s_sending= DD_FALSE; + scon->set_bit1(bmTI); + if (serial_out) + { + putc(s_out, serial_out); + fflush(serial_out); + } + s_tr_bit-= _bits; + //printf("serial out %d bit rems %d\n",s_tr_bit,uc->ticks->ticks); + } + if ((/*scn & bmREN*/_bmREN) && + serial_in && + !s_receiving) + { +#ifdef _WIN32 + HANDLE handle = (HANDLE)_get_osfhandle(fileno(serial_in)); + assert(INVALID_HANDLE_VALUE != handle); + + if (input_avail(handle)) +#else + if (input_avail(fileno(serial_in))) +#endif + { + s_receiving= DD_TRUE; + s_rec_bit= 0; + s_rec_tick= /*uc51->*/s_rec_t1= 0; + } + } + if (s_receiving && + (s_rec_bit >= _bits)) + { + if (::read(fileno(serial_in), &c, 1) == 1) + { + s_in= c; + sbuf->set(s_in); + received(c); + } + s_receiving= DD_FALSE; + s_rec_bit-= _bits; + } + + int l; + s_tr_tick+= (l= cycles * uc->clock_per_cycle()); + s_rec_tick+= l; + return(0); +} + +void +cl_serial::received(int c) +{ + scon->set_bit1(bmRI); +} + +void +cl_serial::reset(void) +{ + s_tr_t1 = 0; + s_rec_t1 = 0; + s_tr_tick = 0; + s_rec_tick = 0; + s_in = 0; + s_out = 0; + s_sending = DD_FALSE; + s_receiving= DD_FALSE; + s_rec_bit = 0; + s_tr_bit = 0; +} + +void +cl_serial::happen(class cl_hw *where, enum hw_event he, void *params) +{ + if (where->cathegory == HW_TIMER) + { + if (where->id == 1) + { + //printf("serial: timer overflowed %ld\n", uc->ticks->ticks); + s_rec_t1++; + s_tr_t1++; + } + if (where->id == 2 /*&& there_is_t2*/) + { + switch (he) + { + case EV_T2_MODE_CHANGED: + { + if (!t2_baud) + s_rec_t1= s_tr_t1= 0; + t_mem *d= (t_mem *)params; + t2_baud= *d & (bmRCLK | bmTCLK); + break; + } + case EV_OVERFLOW: + //printf("T2 baud ov r%d t%d\n",s_rec_t1,s_tr_t1); + s_rec_t1++; + s_tr_t1++; + break; + default: break; + } + } + } +} + +void +cl_serial::print_info(class cl_console_base *con) +{ + const char *modes[]= { "Shift, fixed clock", + "8 bit UART timer clocked", + "9 bit UART fixed clock", + "9 bit UART timer clocked" }; + int sc= scon->get(); + + con->dd_printf("%s[%d]", id_string, id); + int mode= (sc&(bmSM0|bmSM1))>>6; + con->dd_printf(" %s", modes[mode]); + if (mode == 1 || mode == 2) + con->dd_printf(" (timer%d)", (t2_baud)?2:1); + con->dd_printf(" MultiProc=%s", + (mode&2)?((sc&bmSM2)?"ON":"OFF"):"none"); + con->dd_printf(" irq=%s", (sfr->get(IE)&bmES)?"en":"dis"); + con->dd_printf(" prio=%d", uc->it_priority(bmPS)); + con->dd_printf("\n"); + + con->dd_printf("Receiver"); + con->dd_printf(" %s", (sc&bmREN)?"ON":"OFF"); + con->dd_printf(" RB8=%c", (sc&bmRB8)?'1':'0'); + con->dd_printf(" irq=%c", (sc&bmRI)?'1':'0'); + con->dd_printf("\n"); + + con->dd_printf("Transmitter"); + con->dd_printf(" TB8=%c", (sc&bmTB8)?'1':'0'); + con->dd_printf(" irq=%c", (sc&bmTI)?'1':'0'); + con->dd_printf("\n"); + /*con->dd_printf("s_rec_t1=%d s_rec_bit=%d s_rec_tick=%d\n", + s_rec_t1, s_rec_bit, s_rec_tick); + con->dd_printf("s_tr_t1=%d s_tr_bit=%d s_tr_tick=%d\n", + s_tr_t1, s_tr_bit, s_tr_tick); + con->dd_printf("divby=%d bits=%d\n", _divby, _bits);*/ +} + + +/* End of s51.src/serial.cc */ diff --git a/sim/ucsim/s51.src/serialcl.h b/sim/ucsim/s51.src/serialcl.h new file mode 100644 index 0000000..859d618 --- /dev/null +++ b/sim/ucsim/s51.src/serialcl.h @@ -0,0 +1,92 @@ +/* + * Simulator of microcontrollers (serialcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef SERIALCL_HEADER +#define SERIALCL_HEADER + +#include "stypes.h" +#include "pobjcl.h" +#include "uccl.h" + +//#include "newcmdcl.h" + + +class cl_serial: public cl_hw +{ +protected: + class cl_address_space *sfr; + bool there_is_t2, t2_baud; + class cl_memory_cell *sbuf, *pcon, *scon; +#ifdef HAVE_TERMIOS_H + struct termios saved_attributes_in; // Attributes of serial interface + struct termios saved_attributes_out; +#endif + class cl_optref *serial_in_file_option; + class cl_optref *serial_out_file_option; + FILE *serial_in; // Serial line input + FILE *serial_out; // Serial line output + uchar s_in; // Serial channel input reg + uchar s_out; // Serial channel output reg + bool s_sending; // Transmitter is working + bool s_receiving; // Receiver is working + int s_rec_bit; // Bit counter of receiver + int s_tr_bit; // Bit counter of transmitter + int s_rec_t1; // T1 overflows for receiving + int s_tr_t1; // T1 overflows for sending + int s_rec_tick; // Machine cycles for receiving + int s_tr_tick; // Machine cycles for sending + uchar _mode; + uchar _bmREN; + uchar _bmSMOD; + uchar _bits; + uchar _divby; +public: + cl_serial(class cl_uc *auc); + virtual ~cl_serial(void); + virtual int init(void); + + virtual void new_hw_added(class cl_hw *new_hw); + virtual void added_to_uc(void); + virtual t_mem read(class cl_memory_cell *cell); + virtual void write(class cl_memory_cell *cell, t_mem *val); + + //virtual void mem_cell_changed(class cl_m *mem, t_addr addr); + + virtual int serial_bit_cnt(void); + virtual void received(int c); + + virtual int tick(int cycles); + virtual void reset(void); + virtual void happen(class cl_hw *where, enum hw_event he, void *params); + + virtual void print_info(class cl_console_base *con); +}; + + +#endif + +/* End of s51.src/serialcl.h */ diff --git a/sim/ucsim/s51.src/sim51.cc b/sim/ucsim/s51.src/sim51.cc new file mode 100644 index 0000000..f929aec --- /dev/null +++ b/sim/ucsim/s51.src/sim51.cc @@ -0,0 +1,96 @@ +/* + * Simulator of microcontrollers (sim51.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include +#include +#include +#include "i_string.h" + +#include "globals.h" +#include "utils.h" +#include "cmdutil.h" + +#include "sim51cl.h" +//#include "cmd51cl.h" +#include "uc51cl.h" +#include "uc52cl.h" +#include "uc51rcl.h" +#include "uc89c51rcl.h" +#include "uc251cl.h" +#include "uc390cl.h" +#include "glob.h" + + +cl_sim51::cl_sim51(class cl_app *the_app): + cl_sim(the_app) +{} + + +class cl_uc * +cl_sim51::mk_controller(void) +{ + int i; + const char *typ= NIL; + class cl_optref type_option(this); + + type_option.init(); + type_option.use("cpu_type"); + i= 0; + if ((typ= type_option.get_value(typ)) == NIL) + typ= "C51"; + while ((cpus_51[i].type_str != NULL) && + (strcmp(typ, cpus_51[i].type_str) != 0)) + i++; + if (cpus_51[i].type_str == NULL) + { + fprintf(stderr, "Unknown processor type. " + "Use -H option to see known types.\n"); + return(NULL); + } + switch (cpus_51[i].type) + { + case CPU_51: case CPU_31: + return(new cl_51core(cpus_51[i].type, cpus_51[i].technology, this)); + case CPU_52: case CPU_32: + return(new cl_uc52(cpus_51[i].type, cpus_51[i].technology, this)); + case CPU_51R: + return(new cl_uc51r(cpus_51[i].type, cpus_51[i].technology, this)); + case CPU_89C51R: + return(new cl_uc89c51r(cpus_51[i].type, cpus_51[i].technology, this)); + case CPU_251: + return(new cl_uc251(cpus_51[i].type, cpus_51[i].technology, this)); + case CPU_DS390: case CPU_DS390F: + return(new cl_uc390(cpus_51[i].type, cpus_51[i].technology, this)); + } + return(NULL); +} + + +/* End of s51.src/sim51.cc */ diff --git a/sim/ucsim/s51.src/sim51cl.h b/sim/ucsim/s51.src/sim51cl.h new file mode 100644 index 0000000..8a3d0db --- /dev/null +++ b/sim/ucsim/s51.src/sim51cl.h @@ -0,0 +1,45 @@ +/* + * Simulator of microcontrollers (sim51cl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef SIM51CL_HEADER +#define SIM51CL_HEADER + +#include "simcl.h" + + +class cl_sim51: public cl_sim +{ +public: + cl_sim51(class cl_app *the_app); + //virtual int proc_arg(char optopt, char *optarg); + virtual class cl_uc *mk_controller(void); +}; + + +#endif + +/* End of s51.src/sim51cl.h */ diff --git a/sim/ucsim/s51.src/start1 b/sim/ucsim/s51.src/start1 new file mode 100755 index 0000000..8bdf6aa --- /dev/null +++ b/sim/ucsim/s51.src/start1 @@ -0,0 +1,5 @@ +#!/bin/sh + +s51 -Sin=tee_1,out=1_tee "$@" + +# End of start1 diff --git a/sim/ucsim/s51.src/start2 b/sim/ucsim/s51.src/start2 new file mode 100755 index 0000000..15a0811 --- /dev/null +++ b/sim/ucsim/s51.src/start2 @@ -0,0 +1,5 @@ +#!/bin/sh + +s51 -Sin=tee_2,out=2_tee "$@" + +# End of start2 diff --git a/sim/ucsim/s51.src/test_extit.c b/sim/ucsim/s51.src/test_extit.c new file mode 100644 index 0000000..f61fd41 --- /dev/null +++ b/sim/ucsim/s51.src/test_extit.c @@ -0,0 +1,15 @@ +#include + +sfr at 0xa6 WDTRST; + +void jaj() interrupt 0 { P2= P0; P0++; } + +void main() +{ + IT0=0; /* low level triggered */ + IT0=1; /* falling edge triggered */ + EX0=1; /* enable ex #0 */ + EA=1; + P0=0; + for(;;); +} diff --git a/sim/ucsim/s51.src/test_idlepd.c b/sim/ucsim/s51.src/test_idlepd.c new file mode 100644 index 0000000..56b6aaa --- /dev/null +++ b/sim/ucsim/s51.src/test_idlepd.c @@ -0,0 +1,35 @@ +#include + +sfr at 0xa6 WDTRST; + +void jaj_ex0() interrupt 0 { P2= P0; } + +void jaj_t0() interrupt 1 { P2= P0; } + +void main() +{ + TH0= 0x80; + TL0= 0x80; + TMOD= 0x02; + + IT0=0; /* low level triggered */ + IT0=1; /* falling edge triggered */ + EX0=1; /* enable ex #0 */ + ET0=1; /* en t0 */ + + TR0= 1; + + EA=1; + P0=0; + while (1) + { + P0= 0; + PCON|= 1;/*idle*/ + P0++; + P0++; + P0++; + } + WDTRST= 0x1e; + WDTRST= 0xe1; + PCON|= 2;/*pd*/ +} diff --git a/sim/ucsim/s51.src/test_ser.c b/sim/ucsim/s51.src/test_ser.c new file mode 100644 index 0000000..1af12ab --- /dev/null +++ b/sim/ucsim/s51.src/test_ser.c @@ -0,0 +1,114 @@ +#include + +#define BUFSIZE 16 +#define T0H 0xfc +#define T0L 0x67 + +unsigned char buf[BUFSIZE]; +unsigned char first_free= 0, last_occupied= 0; +bit transmitting, overflow; +volatile int t0cnt; + +void ser_it(void) interrupt 4 +{ + unsigned char temp; + if (RI) { + buf[first_free]= SBUF; + first_free= ((temp= first_free)+1) % BUFSIZE; + if (first_free == last_occupied) { + first_free= temp; + overflow= 1; + } + RI= 0; + } + if (TI) { + transmitting= 0; + TI= 0; + } +} + +void t0_it(void) interrupt 1 +{ + TL0= T0L; + TH0= T0H; + if (t0cnt) + t0cnt--; +} + +char empty(void) +{ + return(first_free == last_occupied); +} + +unsigned char get_ch(void) +{ + unsigned char c; + c= buf[last_occupied]; + last_occupied= (last_occupied+1) % BUFSIZE; + overflow= 0; + return(c); +} + +void send_ch(unsigned char c) +{ + while (transmitting) ; + transmitting= 1; + SBUF= c; +} + +void send_str(char *str) +{ + while (*str) { + send_ch(*str); + str++; + } +} + +void process(void) +{ + unsigned char c; + c= get_ch(); + if ((c >= 'a' && c <= 'z') || + (c >= 'A' && c <= 'Z')) + c^= 0x20; + send_ch(c); +} + +void wait(int delay) +{ + t0cnt= delay; + while (t0cnt) + PCON|= 1; +} + +char test(char c) +{ + return(c+1); +} + +void main(void) +{ + t0cnt= 0; + transmitting= overflow= 0; + SCON= 0x7c; + TL1= TH1= 250; /* 9600 baud */ + TH0= T0H; + TL0= T0L; + TMOD= 0x21; + TR0= TR1= 1; + ES= ET0= 1; + EA= 1; + send_str("\nOK\n"); + test(0); + wait(1000); + test(1); + send_str("delay off\n"); + for (;;) { + if (!empty()) { + if (overflow) { + send_str("Overflow!\n"); + } + process(); + } + } +} diff --git a/sim/ucsim/s51.src/test_stack.c b/sim/ucsim/s51.src/test_stack.c new file mode 100644 index 0000000..25ba88d --- /dev/null +++ b/sim/ucsim/s51.src/test_stack.c @@ -0,0 +1,9 @@ +void jaj(void) +{ + jaj(); +} + +void main(void) +{ + jaj(); +} diff --git a/sim/ucsim/s51.src/timer0.cc b/sim/ucsim/s51.src/timer0.cc new file mode 100644 index 0000000..5024c9e --- /dev/null +++ b/sim/ucsim/s51.src/timer0.cc @@ -0,0 +1,400 @@ +/* + * Simulator of microcontrollers (timer0.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "timer0cl.h" +#include "regs51.h" +#include "types51.h" + + +cl_timer0::cl_timer0(class cl_uc *auc, int aid, const char *aid_string): + cl_hw(auc, HW_TIMER, aid, aid_string) +{ + cell_tmod= cell_tcon= 0; + if (aid == 0) + { + mask_M0 = bmM00; + mask_M1 = bmM10; + mask_C_T = bmC_T0; + mask_GATE= bmGATE0; + mask_TR = bmTR0; + mask_INT = bm_INT0; + mask_TF = bmTF0; + mask_T = bmT0; + addr_tl = TL0; + addr_th = TH0; + } + else if (aid == 1) + { + mask_M0 = bmM01; + mask_M1 = bmM11; + mask_C_T = bmC_T1; + mask_GATE= bmGATE1; + mask_TR = bmTR1; + mask_INT = bm_INT1; + mask_TF = bmTF1; + mask_T = bmT1; + addr_tl = TL1; + addr_th = TH1; + } + else if (aid == 2) + { + addr_tl = TL2; + addr_th = TH2; + mask_T = bmT2; + mask_C_T = bmC_T2; + mask_TR = bmTR2; + mask_TF = bmTF2; + mask_M0= mask_M1= mask_GATE= mask_INT= 0; + } + else {} + make_partner(HW_PCA, 0); + make_partner(HW_PCA, 1); + make_partner(HW_PCA, 2); + make_partner(HW_PCA, 3); + make_partner(HW_PCA, 4); +} + +int +cl_timer0::init(void) +{ + class cl_address_space *sfr= uc->address_space(MEM_SFR_ID); + + if (sfr) + { + //t_mem d; + if (id == 0 || id == 1) + { + //cell_tmod= sfr->register_hw(TMOD, this, 0); + register_cell(sfr, TMOD, &cell_tmod, wtd_restore_write); + //d= cell_tmod->get(); write(cell_tmod, &d); + //cell_tcon= sfr->register_hw(TCON, this, 0); + register_cell(sfr, TCON, &cell_tcon, wtd_restore_write); + //d= cell_tcon->get(); write(cell_tcon, &d); + INT= sfr->read(P3) & mask_INT; + } + else if (id == 2) + { + cell_tmod= 0; + //cell_tcon= sfr->register_hw(T2CON, this, 0); + register_cell(sfr, T2CON, &cell_tcon, wtd_restore_write); + //d= cell_tcon->get(); write(cell_tcon, &d); + } + //cell_tl= sfr->get_cell(addr_tl); + //cell_th= sfr->get_cell(addr_th); + use_cell(sfr, addr_tl, &cell_tl, wtd_restore); + use_cell(sfr, addr_th, &cell_th, wtd_restore); + } + return(0); +} + +void +cl_timer0::added_to_uc(void) +{ + if (id == 0) + uc->it_sources->add(new cl_it_src(bmET0, TCON, bmTF0, 0x000b, true, + "timer #0", 2)); + else if (id == 1) + uc->it_sources->add(new cl_it_src(bmET1, TCON, bmTF1, 0x001b, true, + "timer #1", 4)); +} + +/*t_mem +cl_timer0::read(class cl_cell *cell) +{ + return(cell->get()); +}*/ + +void +cl_timer0::write(class cl_memory_cell *cell, t_mem *val) +{ + if (cell == cell_tmod) + { + t_mem md= *val & (mask_M0|mask_M1); + if (md == mask_M0) + mode= 1; + else if (md == mask_M1) + mode= 2; + else if (md == (mask_M0|mask_M1)) + mode= 3; + else + mode= 0; + GATE= *val & mask_GATE; + C_T = *val & mask_C_T; + T_edge= 0; + } + else if (cell == cell_tcon) + { + TR= *val & mask_TR; + T_edge= 0; + } +} + +/*void +cl_timer0::mem_cell_changed(class cl_m *mem, t_addr addr) +{ + //class cl_m *sfr= uc->mem(MEM_SFR); + //t_mem d; + + cl_hw::mem_cell_changed(mem, addr); + + //d= cell_tmod->get(); + //write(cell_tmod, &d); + //d= cell_tcon->get(); + //write(cell_tcon, &d); + //if (addr == addr_tl) cell_tl= sfr->get_cell(addr_tl); + //if (addr == addr_th) cell_th= sfr->get_cell(addr_th); +}*/ + +int +cl_timer0::tick(int cycles) +{ + switch (mode) + { + case 0: do_mode0(cycles); break; + case 1: do_mode1(cycles); break; + case 2: do_mode2(cycles); break; + case 3: do_mode3(cycles); break; + } + return(resGO); +} + +int +cl_timer0::do_mode0(int cycles) +{ + if (!TR) + return(0); + + //t_mem p3= uc->mem(MEM_SFR)->get(P3); + if (GATE) + { + if ((/*p3 & mask_*/INT) == 0) + return(0); + } + + if (C_T) + { + /*cycles= 0; + if ((uc51->prev_p3 & mask_T) && + !(p3 & uc51->port_pins[3] & mask_T)) + cycles= 1;*/ + cycles= T_edge; + T_edge= 0; + } + while (cycles--) + { + // mod 0, TH= 8 bit t/c, TL= 5 bit precounter + t_mem tl= cell_tl->add(1); + if ((tl & 0x1f) == 0) + { + cell_tl->set(0); + if (!cell_th->add(1)) + { + cell_tcon->set_bit1(mask_TF); + overflow(); + } + } + } + + return(0); +} + +int +cl_timer0::do_mode1(int cycles) +{ + if (!TR) + return(0); + + //t_mem p3= uc->mem(MEM_SFR)->get(P3); + if (GATE) + { + if ((/*p3 & mask_*/INT) == 0) + return(0); + } + + if (C_T) + { + /*cycles= 0; + if ((uc51->prev_p3 & mask_T) && + !(p3 & uc51->port_pins[3] & mask_T)) + cycles= 1;*/ + cycles= T_edge; + T_edge= 0; + } + + while (cycles--) + { + // mod 1 TH+TL= 16 bit t/c + if (!cell_tl->add(1)) + { + if (!cell_th->add(1)) + { + cell_tcon->set_bit1(mask_TF); + overflow(); + } + } + } + + return(0); +} + +int +cl_timer0::do_mode2(int cycles) +{ + if (!TR) + return(0); + + //t_mem p3= uc->mem(MEM_SFR)->get(P3); + if (GATE) + { + if ((/*p3 & mask_*/INT) == 0) + return(0); + } + + if (C_T) + { + /*cycles= 0; + if ((uc51->prev_p3 & mask_T) && + !(p3 & uc51->port_pins[3] & mask_T)) + cycles= 1;*/ + cycles= T_edge; + T_edge= 0; + } + + //unsigned long startt= uc->ticks->ticks-(cycles*12);int i=0; + while (cycles--) + { + // mod 2 TL= 8 bit t/c auto reload from TH + if (!cell_tl->add(1)) + { + cell_tl->set(cell_th->get()); + cell_tcon->set_bit1(mask_TF); + //printf("timer%d overflow %d (%d) %d\n",id,uc->ticks->ticks,i,startt+(i*12)); + overflow(); + } + //i++; + } + return(0); +} + +int +cl_timer0::do_mode3(int cycles) +{ + int cyc= cycles; + //t_mem p3= uc->mem(MEM_SFR)->get(P3); + + if (!TR) + goto do_th; + + if (GATE) + { + if ((/*p3 & mask_*/INT) == 0) + goto do_th; + } + + if (C_T) + { + /*cycles= 0; + if ((uc51->prev_p3 & mask_T) && + !(p3 & uc51->port_pins[3] & mask_T)) + cycles= 1;*/ + cycles= T_edge; + T_edge= 0; + } + + while (cycles--) + { + if (!cell_tl->add(1)) + { + cell_tcon->set_bit1(mask_TF); + overflow(); + } + } + + do_th: + if ((cell_tcon->get() & bmTR1) != 0) + while (cyc--) + { + if (!cell_th->add(1)) + cell_tcon->set_bit1(bmTF1); + } + return(0); +} + +void +cl_timer0::overflow(void) +{ + inform_partners(EV_OVERFLOW, 0); +} + +void +cl_timer0::happen(class cl_hw *where, enum hw_event he, void *params) +{ + struct ev_port_changed *ep= (struct ev_port_changed *)params; + + if (where->cathegory == HW_PORT && + he == EV_PORT_CHANGED && + ep->id == 3) + { + t_mem p3n= ep->new_pins & ep->new_value; + t_mem p3o= ep->pins & ep->prev_value; + if ((p3n & mask_T) && + !(p3o & mask_T)) + T_edge++; + INT= p3n & mask_INT; + //printf("timer%d p%dchanged (%02x,%02x->%02x,%02x) INT=%d(%02x) edge=%d(%02x)\n",id,where->id,ep->prev_value,ep->pins,ep->new_value,ep->new_pins,INT,mask_INT,T_edge,mask_T); + } +} + +void +cl_timer0::print_info(class cl_console_base *con) +{ + const char *modes[]= { "13 bit", "16 bit", "8 bit autoreload", "2x8 bit" }; + //t_mem tmod= cell_tmod->get(); + int on; + class cl_address_space *sfr= uc->address_space(MEM_SFR_ID); + + con->dd_printf("%s[%d] 0x%04x", id_string, id, + 256*cell_th->get()+cell_tl->get()); + //int mode= tmod & (bmM00|bmM10); + con->dd_printf(" %s", modes[mode]); + con->dd_printf(" %s", (/*tmod&bm*/C_T/*0*/)?"counter":"timer"); + if (/*tmod&bm*/GATE/*0*/) + { + con->dd_printf(" gated"); + on= INT; + } + else + on= TR; + con->dd_printf(" %s", on?"ON":"OFF"); + con->dd_printf(" irq=%c", (cell_tcon->get()&mask_TF)?'1':'0'); + con->dd_printf(" %s", sfr?"?":((sfr->get(IE)&bmET0)?"en":"dis")); + con->dd_printf(" prio=%d", uc->it_priority(bmPT0)); + con->dd_printf("\n"); +} + + +/* End of s51.src/timer0.cc */ diff --git a/sim/ucsim/s51.src/timer0cl.h b/sim/ucsim/s51.src/timer0cl.h new file mode 100644 index 0000000..a34846e --- /dev/null +++ b/sim/ucsim/s51.src/timer0cl.h @@ -0,0 +1,73 @@ +/* + * Simulator of microcontrollers (timer0cl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef TIMER0CL_HEADER +#define TIMER0CL_HEADER + +#include "stypes.h" +#include "pobjcl.h" +#include "uccl.h" + +#include "newcmdcl.h" + +#include "uc51cl.h" + + +class cl_timer0: public cl_hw +{ +protected: + class cl_memory_cell *cell_tmod, *cell_tcon, *cell_tl, *cell_th; + t_mem mask_M0, mask_M1, mask_C_T, mask_GATE, mask_TR, mask_INT, + mask_T, mask_TF; + t_addr addr_tl, addr_th; + int mode, GATE, C_T, TR, INT, T_edge; +public: + cl_timer0(class cl_uc *auc, int aid, const char *aid_string); + virtual int init(void); + + virtual void added_to_uc(void); + + //virtual t_mem read(class cl_cell *cell); + virtual void write(class cl_memory_cell *cell, t_mem *val); + + //virtual void mem_cell_changed(class cl_mem *mem, t_addr addr); + + virtual int tick(int cycles); + virtual int do_mode0(int cycles); + virtual int do_mode1(int cycles); + virtual int do_mode2(int cycles); + virtual int do_mode3(int cycles); + virtual void overflow(void); + virtual void happen(class cl_hw *where, enum hw_event he, void *params); + + virtual void print_info(class cl_console_base *con); +}; + + +#endif + +/* End of s51.src/timer0cl.h */ diff --git a/sim/ucsim/s51.src/timer1.cc b/sim/ucsim/s51.src/timer1.cc new file mode 100644 index 0000000..54739aa --- /dev/null +++ b/sim/ucsim/s51.src/timer1.cc @@ -0,0 +1,91 @@ +/* + * Simulator of microcontrollers (s51.src/timer1.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "timer1cl.h" +#include "regs51.h" + + +cl_timer1::cl_timer1(class cl_uc *auc, int aid, const char *aid_string): + cl_timer0(auc, aid, aid_string) +{ + make_partner(HW_UART, 0); +} + +/*int +cl_timer1::init(void) +{ + return(0); +}*/ + +/*void +cl_timer1::added(class cl_hw *new_hw) +{ + if (new_hw->cathegory == HW_UART) + hws_to_inform->add(new_hw); +}*/ + +int +cl_timer1::do_mode3(int cycles) +{ + return(0); +} + +/*void +cl_timer1::overflow(void) +{ + inform_partners(EV_OVERFLOW, 0); +}*/ + +void +cl_timer1::print_info(class cl_console_base *con) +{ + const char *modes[]= { "13 bit", "16 bit", "8 bit autoreload", "stop" }; + //int tmod= cell_tmod->get(); + int on; + class cl_address_space *sfr= uc->address_space(MEM_SFR_ID); + + con->dd_printf("%s[%d] 0x%04x", id_string, id, + 256*cell_th->get()+cell_tl->get()); + //int mode= (tmod & (bmM11|bmM01)) >> 4; + con->dd_printf(" %s", modes[mode]); + con->dd_printf(" %s", (/*tmod&bm*/C_T/*1*/)?"counter":"timer"); + if (/*tmod&bm*/GATE/*1*/) + { + con->dd_printf(" gated"); + on= INT; + } + else + on= cell_tcon->get() & mask_TR; + con->dd_printf(" %s", on?"ON":"OFF"); + con->dd_printf(" irq=%c", (cell_tcon->get()&mask_TF)?'1':'0'); + con->dd_printf(" %s", sfr?"?":((sfr->get(IE)&bmET1)?"en":"dis")); + con->dd_printf(" prio=%d", uc->it_priority(bmPT1)); + con->dd_printf("\n"); +} + + +/* End of s51.src/timer1.cc */ diff --git a/sim/ucsim/s51.src/timer1cl.h b/sim/ucsim/s51.src/timer1cl.h new file mode 100644 index 0000000..33c6e09 --- /dev/null +++ b/sim/ucsim/s51.src/timer1cl.h @@ -0,0 +1,59 @@ +/* + * Simulator of microcontrollers (timer1cl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef TIMER1CL_HEADER +#define TIMER1CL_HEADER + +#include "stypes.h" +#include "pobjcl.h" +#include "uccl.h" + +#include "newcmdcl.h" + +#include "timer0cl.h" + +class cl_timer1: public cl_timer0 +{ +public: + cl_timer1(class cl_uc *auc, int aid, const char *aid_string); + //virtual int init(void); + + //virtual void new_hw_added(class cl_hw *new_hw); + //virtual ulong read(class cl_mem *mem, long addr); + //virtual void write(class cl_mem *mem, long addr, ulong *val); + + //virtual int tick(int cycles); + virtual int do_mode3(int cycles); + //virtual void overflow(void); + + virtual void print_info(class cl_console_base *con); +}; + + +#endif + +/* End of s51.src/timer1cl.h */ diff --git a/sim/ucsim/s51.src/timer2.cc b/sim/ucsim/s51.src/timer2.cc new file mode 100644 index 0000000..1f8399e --- /dev/null +++ b/sim/ucsim/s51.src/timer2.cc @@ -0,0 +1,419 @@ +/* + * Simulator of microcontrollers (timer2.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "timer2cl.h" +#include "regs51.h" +#include "types51.h" + + +cl_timer2::cl_timer2(class cl_uc *auc, int aid, const char *aid_string, + int afeatures): + cl_timer0(auc, /*2*/aid, /*"timer2"*/aid_string) +{ + features= afeatures; + exf2it= 0; + mask_RCLK= bmRCLK; + mask_TCLK= bmTCLK; + mask_CP_RL2= bmCP_RL2; + make_partner(HW_UART, 0); + sfr= uc->address_space(MEM_SFR_ID); + if (features & (t2_down|t2_clock_out)) + { + register_cell(sfr, T2MOD, &cell_t2mod, + wtd_restore_write); + } +} + +int +cl_timer2::init(void) +{ + cl_timer0::init(); + //cell_rcap2l= uc->mem(MEM_SFR)->get_cell(RCAP2L); + //cell_rcap2h= uc->mem(MEM_SFR)->get_cell(RCAP2H); + use_cell(sfr, RCAP2L, &cell_rcap2l, wtd_restore); + use_cell(sfr, RCAP2H, &cell_rcap2h, wtd_restore); + if (sfr) + bit_t2ex= sfr->read(P1) & bmT2EX; + return(0); +} + +void +cl_timer2::added_to_uc(void) +{ + uc->it_sources->add(new cl_it_src(bmET2, T2CON, bmTF2, 0x002b, false, + "timer #2 TF2", 7)); + exf2it= new cl_it_src(bmET2, T2CON, bmEXF2, 0x002b, false, + "timer #2 EXF2", 7); + uc->it_sources->add(exf2it); +} + +/*void +cl_timer2::mem_cell_changed(class cl_mem *mem, t_addr addr) +{ + class cl_mem *sfr= uc->mem(MEM_SFR); + class cl_cell *c= 0; + + if (mem && sfr && mem == sfr) + { + switch (addr) + { + case T2CON: + c= cell_tcon= sfr->get_cell(T2CON); + break; + } + if (c) + { + t_mem d= c->get(); + write(c, &d); + } + if (addr == addr_tl) + cell_tl= sfr->get_cell(addr_tl); + if (addr == addr_th) + cell_th= sfr->get_cell(addr_th); + cell_rcap2l= sfr->get_cell(RCAP2L); + cell_rcap2h= sfr->get_cell(RCAP2H); + } +}*/ + +/*void +cl_timer2::added(class cl_hw *new_hw) +{ + if (new_hw->cathegory == HW_UART) + hws_to_inform->add(new_hw); +}*/ + +void +cl_timer2::write(class cl_memory_cell *cell, t_mem *val) +{ + int oldmode= mode; + bool oldtr= TR; + + if (exf2it) + exf2it->activate(); + if (cell == cell_tcon) + { + C_T = *val & mask_C_T; + TR = *val & mask_TR; + RCLK= *val & mask_RCLK; + TCLK= *val & mask_TCLK; + CP_RL2= *val & mask_CP_RL2; + EXEN2 = *val & bmEXEN2; + if (!(RCLK || TCLK) && + !CP_RL2) + mode= T2MODE_RELOAD; + else if (!(RCLK || TCLK) && + CP_RL2) + mode= T2MODE_CAPTURE; + else if (RCLK || TCLK) + mode= T2MODE_BAUDRATE; + else + mode= T2MODE_OFF; + if (mode != oldmode) + inform_partners(EV_T2_MODE_CHANGED, val); + } + else if (cell == cell_t2mod) + { + bit_dcen= (*val & bmDCEN) != 0; + bit_t2oe= (*val & bmT2OE) != 0; + if ((features & t2_down) && + bit_dcen && + mode == T2MODE_RELOAD) + { + mode= T2MODE_DOWN; + if (exf2it) + exf2it->deactivate(); + } + if ((features & t2_clock_out) && + bit_t2oe) + mode= T2MODE_CLKOUT; + } + if ((mode != oldmode) || + (TR && !oldtr) || + (!TR && oldtr)) + T_edge= t2ex_edge= 0; +} + +int +cl_timer2::tick(int cycles) +{ + switch (mode) + { + case T2MODE_BAUDRATE: + do_t2_baud(cycles); + break; + case T2MODE_CAPTURE: + do_t2_capture(cycles); + break; + case T2MODE_RELOAD: + do_t2_reload(cycles); + break; + case T2MODE_DOWN: + do_t2_down(cycles); + break; + case T2MODE_CLKOUT: + do_t2_clock_out(cycles); + break; + default: break; + } + + return(resGO); +} + +/* + * Baud rate generator mode of Timer #2 + */ + +int +cl_timer2::do_t2_baud(int cycles) +{ + if (EXEN2 && t2ex_edge) + { + cell_tcon->set_bit1(bmEXF2); + t2ex_edge= 0; + } + + if (!TR) + return(0); + + if (C_T) + (cycles= T_edge), T_edge= 0; + else + cycles*= 6; + + while (cycles--) + { + if (!cell_tl->add(1)) + if (!cell_th->add(1)) + { + cell_th->set(cell_rcap2h->get()); + cell_tl->set(cell_rcap2l->get()); + inform_partners(EV_OVERFLOW, 0); + } + } + return(resGO); +} + + +/* + * Capture function of Timer #2 + */ + +void +cl_timer2::do_t2_capture(int cycles) +{ + if (EXEN2 && t2ex_edge) + { + cell_tcon->set_bit1(bmEXF2); + cell_rcap2h->set(cell_th->get()); + cell_rcap2l->set(cell_tl->get()); + t2ex_edge= 0; + } + + if (!TR) + return; + + if (C_T) + (cycles= T_edge), T_edge= 0; + + if (!cell_tl->add(1)) + { + if (!cell_th->add(1)) + cell_tcon->set_bit1(bmTF2); + } +} + + +/* + * Auto Reload mode of Timer #2, counting UP + */ + +void +cl_timer2::do_t2_reload(int cycles) +{ + if (EXEN2 && t2ex_edge) + { + cell_tcon->set_bit1(bmEXF2); + cell_th->set(cell_rcap2h->get()); + cell_tl->set(cell_rcap2l->get()); + t2ex_edge= 0; + } + + if (!TR) + return; + + if (C_T) + (cycles= T_edge), T_edge= 0; + + if (!cell_tl->add(1)) + { + if (!cell_th->add(1)) + { + cell_tcon->set_bit1(mask_TF); + cell_th->set(cell_rcap2h->get()); + cell_tl->set(cell_rcap2l->get()); + } + } +} + +void +cl_timer2::do_t2_down(int cycles) +{ + bool toggle= DD_FALSE; + + if (!TR) + return; + + if (C_T) + (cycles= T_edge), T_edge= 0; + + if (bit_t2ex) + // UP + while (cycles--) + if (!cell_tl->add(1)) + { + if (!cell_th->add(1)) + { + cell_tcon->set_bit1(mask_TF); + cell_th->set(cell_rcap2h->get()); + cell_tl->set(cell_rcap2l->get()); + toggle= DD_TRUE; + } + } + else + // DOWN + while (cycles--) + { + t_mem l, h; + if ((l= cell_tl->add(-1)) == 0xff) + h= cell_th->add(-1); + else + h= cell_th->get(); + if ((TYPE_UWORD)(h*256+l) < + (TYPE_UWORD)(cell_rcap2h->get()*256+cell_rcap2l->get())) + { + cell_tcon->set_bit1(mask_TF); + cell_th->set(0xff); + cell_tl->set(0xff); + toggle= DD_TRUE; + } + } + if (toggle && + sfr) + { + class cl_memory_cell *p1= sfr->get_cell(P1); + if (p1) + p1->set(p1->get() ^ bmEXF2); + } +} + +void +cl_timer2::do_t2_clock_out(int cycles) +{ + if (EXEN2 && t2ex_edge) + { + cell_tcon->set_bit1(bmEXF2); + t2ex_edge= 0; + } + + if (!TR) + return; + + if (C_T) + (cycles= T_edge), T_edge= 0; + else + cycles*= 6; + + while (cycles--) + { + if (!cell_tl->add(1)) + if (!cell_th->add(1)) + { + cell_th->set(cell_rcap2h->get()); + cell_tl->set(cell_rcap2l->get()); + inform_partners(EV_OVERFLOW, 0); + if (!C_T && + sfr) + { + // toggle T2 on P1 + class cl_memory_cell *p1= sfr->get_cell(P1); + if (p1) + p1->set(p1->get() ^ bmT2); + } + } + } +} + +void +cl_timer2::happen(class cl_hw *where, enum hw_event he, void *params) +{ + struct ev_port_changed *ep= (struct ev_port_changed *)params; + + if (where->cathegory == HW_PORT && + he == EV_PORT_CHANGED && + ep->id == 1) + { + t_mem p1n= ep->new_pins & ep->new_value; + t_mem p1o= ep->pins & ep->prev_value; + if (!(p1n & mask_T) && + (p1o & mask_T)) + T_edge++; + if (!(p1n & bmT2EX) && + (p1o & bmT2EX)) + t2ex_edge++; + bit_t2ex= p1n & bmT2EX; + } +} + +void +cl_timer2::print_info(class cl_console_base *con) +{ + int t2con= cell_tcon->get(); + + con->dd_printf("%s[%d] 0x%04x", id_string, id, + 256*cell_th->get()+cell_tl->get()); + if (RCLK || TCLK) + { + con->dd_printf(" baud"); + if (RCLK) + con->dd_printf(" RCLK"); + if (TCLK) + con->dd_printf(" TCLK"); + } + else + con->dd_printf(" %s", (CP_RL2)?"capture":"reload"); + con->dd_printf(" 0x%04x", + 256*cell_rcap2h->get()+cell_rcap2l->get()); + con->dd_printf(" %s", (C_T)?"counter":"timer"); + con->dd_printf(" %s", (TR)?"ON":"OFF"); + con->dd_printf(" irq=%c", (t2con&bmTF2)?'1':'0'); + con->dd_printf(" %s", sfr?"?":((sfr->get(IE)&bmET2)?"en":"dis")); + con->dd_printf(" prio=%d", uc->it_priority(bmPT2)); + con->dd_printf("\n"); +} + + +/* End of s51.src/timer2.cc */ diff --git a/sim/ucsim/s51.src/timer2cl.h b/sim/ucsim/s51.src/timer2cl.h new file mode 100644 index 0000000..b0cd339 --- /dev/null +++ b/sim/ucsim/s51.src/timer2cl.h @@ -0,0 +1,91 @@ +/* + * Simulator of microcontrollers (timer2cl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef TIMER2CL_HEADER +#define TIMER2CL_HEADER + +#include "stypes.h" +#include "pobjcl.h" +#include "uccl.h" + +#include "newcmdcl.h" + +#include "timer0cl.h" + + +#define T2MODE_RELOAD 0 +#define T2MODE_CAPTURE 1 +#define T2MODE_BAUDRATE 2 +#define T2MODE_OFF 3 +#define T2MODE_DOWN 4 +#define T2MODE_CLKOUT 5 + +enum t2_features { + t2_default = 0x01, + t2_down = 0x02, + t2_clock_out = 0x04 +}; + + +class cl_timer2: public cl_timer0 +{ +protected: + class cl_address_space *sfr; + int features; + class cl_it_src *exf2it; + t_mem mask_RCLK, mask_TCLK, mask_CP_RL2; + t_mem RCLK, TCLK, CP_RL2, EXEN2; + long t2ex_edge; + class cl_memory_cell *cell_rcap2l, *cell_rcap2h, *cell_t2mod; + bool bit_dcen, bit_t2oe, bit_t2ex; +public: + cl_timer2(class cl_uc *auc, int aid, const char *aid_string, int afeautres); + virtual int init(void); + + virtual void added_to_uc(void); + //virtual void new_hw_added(class cl_hw *new_hw); + + //virtual ulong read(class cl_mem *mem, long addr); + virtual void write(class cl_memory_cell *cell, t_mem *val); + + //virtual void mem_cell_changed(class cl_mem *mem, t_addr addr); + + virtual int tick(int cycles); + virtual int do_t2_baud(int cycles); + virtual void do_t2_capture(int cycles); + virtual void do_t2_reload(int cycles); + virtual void do_t2_down(int cycles); + virtual void do_t2_clock_out(int cycles); + virtual void happen(class cl_hw *where, enum hw_event he, void *params); + + virtual void print_info(class cl_console_base *con); +}; + + +#endif + +/* End of s51.src/timer2cl.h */ diff --git a/sim/ucsim/s51.src/types51.h b/sim/ucsim/s51.src/types51.h new file mode 100644 index 0000000..964dacc --- /dev/null +++ b/sim/ucsim/s51.src/types51.h @@ -0,0 +1,59 @@ +/* + * Simulator of microcontrollers (types51.h) + * + * Copyright (C) 2002,02 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef TYPES51_HEADER +#define TYPES51_HEADER + +#include "ddconfig.h" + + +#define SET_BIT(newbit, reg, bitmask) \ +if (newbit) \ + (mem(MEM_SFR))->set_bit1((reg), (bitmask)); \ +else \ + (mem(MEM_SFR))->set_bit0((reg), (bitmask)); +#define SFR_SET_BIT(newbit, reg, bitmask) \ +if (newbit) \ + sfr->set_bit1((reg), (bitmask)); \ +else \ + sfr->set_bit0((reg), (bitmask)); +#define GET_C (get_mem(MEM_SFR, PSW) & bmCY) +#define SFR_GET_C (sfr->get(PSW) & bmCY) +#define SET_C(newC) SET_BIT((newC), PSW, bmCY) +#define SFR_SET_C(newC) SFR_SET_BIT((newC), PSW, bmCY) + + +/* Event parameters */ +struct ev_port_changed { + int id; + t_addr addr; + t_mem prev_value, new_value, pins, new_pins; +}; + +#endif + +/* End of s51.src/types51.h */ diff --git a/sim/ucsim/s51.src/uc251.cc b/sim/ucsim/s51.src/uc251.cc new file mode 100644 index 0000000..3694bac --- /dev/null +++ b/sim/ucsim/s51.src/uc251.cc @@ -0,0 +1,45 @@ +/* + * Simulator of microcontrollers (uc251.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include + +#include "uc251cl.h" + + +/* + * Making an 251 CPU object + */ + +cl_uc251::cl_uc251(int Itype, int Itech, class cl_sim *asim): + cl_uc89c51r(Itype, Itech, asim) +{ +} + + +/* End of s51.src/uc251.cc */ diff --git a/sim/ucsim/s51.src/uc251cl.h b/sim/ucsim/s51.src/uc251cl.h new file mode 100644 index 0000000..931e988 --- /dev/null +++ b/sim/ucsim/s51.src/uc251cl.h @@ -0,0 +1,45 @@ +/* + * Simulator of microcontrollers (uc251cl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef UC251CL_HEADER +#define UC251CL_HEADER + +#include "ddconfig.h" + +#include "uc89c51rcl.h" + + +class cl_uc251: public cl_uc89c51r +{ +public: + cl_uc251(int Itype, int Itech, class cl_sim *asim); +}; + + +#endif + +/* End of s51.src/uc251cl.h */ diff --git a/sim/ucsim/s51.src/uc390.cc b/sim/ucsim/s51.src/uc390.cc new file mode 100644 index 0000000..a81420d --- /dev/null +++ b/sim/ucsim/s51.src/uc390.cc @@ -0,0 +1,1251 @@ +/* + * Simulator of microcontrollers (uc390.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + * uc390.cc - module created by Karl Bongers 2001, karl@turbobit.com + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +// Bernhard's ToDo list: + +// - implement math accelerator +// - consider ACON bits +// - buy some memory to run s51 with 2*4 Meg ROM/XRAM + +// strcpy (mem(MEM_ROM) ->addr_format, "0x%06x"); +// strcpy (mem(MEM_XRAM)->addr_format, "0x%06x"); + +#include "ddconfig.h" + +#include +#include +#include +#include "i_string.h" + +#include "glob.h" +#include "uc390cl.h" +#include "regs51.h" +#include "uc390hwcl.h" + + +#include "uc52cl.h" +#include "regs51.h" +#include "timer2cl.h" + +/* + * Names of instructions + */ + +struct dis_entry disass_390f[] = { + { 0x00, 0xff, ' ', 1, "NOP"}, + { 0x01, 0xff, 'A', 3, "AJMP %A"}, + { 0x02, 0xff, 'L', 4, "LJMP %l"}, + { 0x03, 0xff, ' ', 1, "RR A"}, + { 0x04, 0xff, ' ', 1, "INC A"}, + { 0x05, 0xff, ' ', 2, "INC %a"}, + { 0x06, 0xff, ' ', 1, "INC @R0"}, + { 0x07, 0xff, ' ', 1, "INC @R1"}, + { 0x08, 0xff, ' ', 1, "INC R0"}, + { 0x09, 0xff, ' ', 1, "INC R1"}, + { 0x0a, 0xff, ' ', 1, "INC R2"}, + { 0x0b, 0xff, ' ', 1, "INC R3"}, + { 0x0c, 0xff, ' ', 1, "INC R4"}, + { 0x0d, 0xff, ' ', 1, "INC R5"}, + { 0x0e, 0xff, ' ', 1, "INC R6"}, + { 0x0f, 0xff, ' ', 1, "INC R7"}, + { 0x10, 0xff, 'R', 3, "JBC %b,%R"}, + { 0x11, 0xff, 'a', 3, "ACALL %A"}, + { 0x12, 0xff, 'l', 4, "LCALL %l"}, + { 0x13, 0xff, ' ', 1, "RRC A"}, + { 0x14, 0xff, ' ', 1, "DEC A"}, + { 0x15, 0xff, ' ', 2, "DEC %a"}, + { 0x16, 0xff, ' ', 1, "DEC @R0"}, + { 0x17, 0xff, ' ', 1, "DEC @R1"}, + { 0x18, 0xff, ' ', 1, "DEC R0"}, + { 0x19, 0xff, ' ', 1, "DEC R1"}, + { 0x1a, 0xff, ' ', 1, "DEC R2"}, + { 0x1b, 0xff, ' ', 1, "DEC R3"}, + { 0x1c, 0xff, ' ', 1, "DEC R4"}, + { 0x1d, 0xff, ' ', 1, "DEC R5"}, + { 0x1e, 0xff, ' ', 1, "DEC R6"}, + { 0x1f, 0xff, ' ', 1, "DEC R7"}, + { 0x20, 0xff, 'R', 3, "JB %b,%R"}, + { 0x21, 0xff, 'A', 3, "AJMP %A"}, + { 0x22, 0xff, '_', 1, "RET"}, + { 0x23, 0xff, ' ', 1, "RL A"}, + { 0x24, 0xff, ' ', 2, "ADD A,#%d"}, + { 0x25, 0xff, ' ', 2, "ADD A,%a"}, + { 0x26, 0xff, ' ', 1, "ADD A,@R0"}, + { 0x27, 0xff, ' ', 1, "ADD A,@R1"}, + { 0x28, 0xff, ' ', 1, "ADD A,R0"}, + { 0x29, 0xff, ' ', 1, "ADD A,R1"}, + { 0x2a, 0xff, ' ', 1, "ADD A,R2"}, + { 0x2b, 0xff, ' ', 1, "ADD A,R3"}, + { 0x2c, 0xff, ' ', 1, "ADD A,R4"}, + { 0x2d, 0xff, ' ', 1, "ADD A,R5"}, + { 0x2e, 0xff, ' ', 1, "ADD A,R6"}, + { 0x2f, 0xff, ' ', 1, "ADD A,R7"}, + { 0x30, 0xff, 'R', 3, "JNB %b,%R"}, + { 0x31, 0xff, 'a', 3, "ACALL %A"}, + { 0x32, 0xff, '_', 1, "RETI"}, + { 0x33, 0xff, ' ', 1, "RLC A"}, + { 0x34, 0xff, ' ', 2, "ADDC A,#%d"}, + { 0x35, 0xff, ' ', 2, "ADDC A,%a"}, + { 0x36, 0xff, ' ', 1, "ADDC A,@R0"}, + { 0x37, 0xff, ' ', 1, "ADDC A,@R1"}, + { 0x38, 0xff, ' ', 1, "ADDC A,R0"}, + { 0x39, 0xff, ' ', 1, "ADDC A,R1"}, + { 0x3a, 0xff, ' ', 1, "ADDC A,R2"}, + { 0x3b, 0xff, ' ', 1, "ADDC A,R3"}, + { 0x3c, 0xff, ' ', 1, "ADDC A,R4"}, + { 0x3d, 0xff, ' ', 1, "ADDC A,R5"}, + { 0x3e, 0xff, ' ', 1, "ADDC A,R6"}, + { 0x3f, 0xff, ' ', 1, "ADDC A,R7"}, + { 0x40, 0xff, 'r', 2, "JC %r"}, + { 0x41, 0xff, 'A', 3, "AJMP %A"}, + { 0x42, 0xff, ' ', 2, "ORL %a,A"}, + { 0x43, 0xff, ' ', 3, "ORL %a,#%D"}, + { 0x44, 0xff, ' ', 2, "ORL A,#%d"}, + { 0x45, 0xff, ' ', 2, "ORL A,%a"}, + { 0x46, 0xff, ' ', 1, "ORL A,@R0"}, + { 0x47, 0xff, ' ', 1, "ORL A,@R1"}, + { 0x48, 0xff, ' ', 1, "ORL A,R0"}, + { 0x49, 0xff, ' ', 1, "ORL A,R1"}, + { 0x4a, 0xff, ' ', 1, "ORL A,R2"}, + { 0x4b, 0xff, ' ', 1, "ORL A,R3"}, + { 0x4c, 0xff, ' ', 1, "ORL A,R4"}, + { 0x4d, 0xff, ' ', 1, "ORL A,R5"}, + { 0x4e, 0xff, ' ', 1, "ORL A,R6"}, + { 0x4f, 0xff, ' ', 1, "ORL A,R7"}, + { 0x50, 0xff, 'r', 2, "JNC %r"}, + { 0x51, 0xff, 'a', 3, "ACALL %A"}, + { 0x52, 0xff, ' ', 2, "ANL %a,A"}, + { 0x53, 0xff, ' ', 3, "ANL %a,#%D"}, + { 0x54, 0xff, ' ', 2, "ANL A,#%d"}, + { 0x55, 0xff, ' ', 2, "ANL A,%a"}, + { 0x56, 0xff, ' ', 1, "ANL A,@R0"}, + { 0x57, 0xff, ' ', 1, "ANL A,@R1"}, + { 0x58, 0xff, ' ', 1, "ANL A,R0"}, + { 0x59, 0xff, ' ', 1, "ANL A,R1"}, + { 0x5a, 0xff, ' ', 1, "ANL A,R2"}, + { 0x5b, 0xff, ' ', 1, "ANL A,R3"}, + { 0x5c, 0xff, ' ', 1, "ANL A,R4"}, + { 0x5d, 0xff, ' ', 1, "ANL A,R5"}, + { 0x5e, 0xff, ' ', 1, "ANL A,R6"}, + { 0x5f, 0xff, ' ', 1, "ANL A,R7"}, + { 0x60, 0xff, 'r', 2, "JZ %r"}, + { 0x61, 0xff, 'A', 3, "AJMP %A"}, + { 0x62, 0xff, ' ', 2, "XRL %a,A"}, + { 0x63, 0xff, ' ', 3, "XRL %a,#%D"}, + { 0x64, 0xff, ' ', 2, "XRL A,#%d"}, + { 0x65, 0xff, ' ', 2, "XRL A,%a"}, + { 0x66, 0xff, ' ', 1, "XRL A,@R0"}, + { 0x67, 0xff, ' ', 1, "XRL A,@R1"}, + { 0x68, 0xff, ' ', 1, "XRL A,R0"}, + { 0x69, 0xff, ' ', 1, "XRL A,R1"}, + { 0x6a, 0xff, ' ', 1, "XRL A,R2"}, + { 0x6b, 0xff, ' ', 1, "XRL A,R3"}, + { 0x6c, 0xff, ' ', 1, "XRL A,R4"}, + { 0x6d, 0xff, ' ', 1, "XRL A,R5"}, + { 0x6e, 0xff, ' ', 1, "XRL A,R6"}, + { 0x6f, 0xff, ' ', 1, "XRL A,R7"}, + { 0x70, 0xff, 'r', 2, "JNZ %r"}, + { 0x71, 0xff, 'a', 3, "ACALL %A"}, + { 0x72, 0xff, ' ', 2, "ORL C,%b"}, + { 0x73, 0xff, '_', 1, "JMP @A+DPTR"}, + { 0x74, 0xff, ' ', 2, "MOV A,#%d"}, + { 0x75, 0xff, ' ', 3, "MOV %a,#%D"}, + { 0x76, 0xff, ' ', 2, "MOV @R0,#%d"}, + { 0x77, 0xff, ' ', 2, "MOV @R1,#%d"}, + { 0x78, 0xff, ' ', 2, "MOV R0,#%d"}, + { 0x79, 0xff, ' ', 2, "MOV R1,#%d"}, + { 0x7a, 0xff, ' ', 2, "MOV R2,#%d"}, + { 0x7b, 0xff, ' ', 2, "MOV R3,#%d"}, + { 0x7c, 0xff, ' ', 2, "MOV R4,#%d"}, + { 0x7d, 0xff, ' ', 2, "MOV R5,#%d"}, + { 0x7e, 0xff, ' ', 2, "MOV R6,#%d"}, + { 0x7f, 0xff, ' ', 2, "MOV R7,#%d"}, + { 0x80, 0xff, 's', 2, "SJMP %r"}, + { 0x81, 0xff, 'A', 3, "AJMP %A"}, + { 0x82, 0xff, ' ', 2, "ANL C,%b"}, + { 0x83, 0xff, ' ', 1, "MOVC A,@A+PC"}, + { 0x84, 0xff, ' ', 1, "DIV AB"}, + { 0x85, 0xff, ' ', 3, "MOV %8,%a"}, + { 0x86, 0xff, ' ', 2, "MOV %a,@R0"}, + { 0x87, 0xff, ' ', 2, "MOV %a,@R1"}, + { 0x88, 0xff, ' ', 2, "MOV %a,R0"}, + { 0x89, 0xff, ' ', 2, "MOV %a,R1"}, + { 0x8a, 0xff, ' ', 2, "MOV %a,R2"}, + { 0x8b, 0xff, ' ', 2, "MOV %a,R3"}, + { 0x8c, 0xff, ' ', 2, "MOV %a,R4"}, + { 0x8d, 0xff, ' ', 2, "MOV %a,R5"}, + { 0x8e, 0xff, ' ', 2, "MOV %a,R6"}, + { 0x8f, 0xff, ' ', 2, "MOV %a,R7"}, + { 0x90, 0xff, ' ', 4, "MOV DPTR,#%l"}, + { 0x91, 0xff, 'a', 3, "ACALL %A"}, + { 0x92, 0xff, ' ', 2, "MOV %b,C"}, + { 0x93, 0xff, ' ', 1, "MOVC A,@A+DPTR"}, + { 0x94, 0xff, ' ', 2, "SUBB A,#%d"}, + { 0x95, 0xff, ' ', 2, "SUBB A,%a"}, + { 0x96, 0xff, ' ', 1, "SUBB A,@R0"}, + { 0x97, 0xff, ' ', 1, "SUBB A,@R1"}, + { 0x98, 0xff, ' ', 1, "SUBB A,R0"}, + { 0x99, 0xff, ' ', 1, "SUBB A,R1"}, + { 0x9a, 0xff, ' ', 1, "SUBB A,R2"}, + { 0x9b, 0xff, ' ', 1, "SUBB A,R3"}, + { 0x9c, 0xff, ' ', 1, "SUBB A,R4"}, + { 0x9d, 0xff, ' ', 1, "SUBB A,R5"}, + { 0x9e, 0xff, ' ', 1, "SUBB A,R6"}, + { 0x9f, 0xff, ' ', 1, "SUBB A,R7"}, + { 0xa0, 0xff, ' ', 2, "ORL C,/%b"}, + { 0xa1, 0xff, 'A', 3, "AJMP %A"}, + { 0xa2, 0xff, ' ', 2, "MOV C,%b"}, + { 0xa3, 0xff, ' ', 1, "INC DPTR"}, + { 0xa4, 0xff, ' ', 1, "MUL AB"}, + { 0xa5, 0xff, '_', 1, "-"}, + { 0xa6, 0xff, ' ', 2, "MOV @R0,%a"}, + { 0xa7, 0xff, ' ', 2, "MOV @R1,%a"}, + { 0xa8, 0xff, ' ', 2, "MOV R0,%a"}, + { 0xa9, 0xff, ' ', 2, "MOV R1,%a"}, + { 0xaa, 0xff, ' ', 2, "MOV R2,%a"}, + { 0xab, 0xff, ' ', 2, "MOV R3,%a"}, + { 0xac, 0xff, ' ', 2, "MOV R4,%a"}, + { 0xad, 0xff, ' ', 2, "MOV R5,%a"}, + { 0xae, 0xff, ' ', 2, "MOV R6,%a"}, + { 0xaf, 0xff, ' ', 2, "MOV R7,%a"}, + { 0xb0, 0xff, ' ', 2, "ANL C,/%b"}, + { 0xb1, 0xff, 'a', 3, "ACALL %A"}, + { 0xb2, 0xff, ' ', 2, "CPL %b"}, + { 0xb3, 0xff, ' ', 1, "CPL C"}, + { 0xb4, 0xff, 'R', 3, "CJNE A,#%d,%R"}, + { 0xb5, 0xff, 'R', 3, "CJNE A,%a,%R"}, + { 0xb6, 0xff, 'R', 3, "CJNE @R0,#%d,%R"}, + { 0xb7, 0xff, 'R', 3, "CJNE @R1,#%d,%R"}, + { 0xb8, 0xff, 'R', 3, "CJNE R0,#%d,%R"}, + { 0xb9, 0xff, 'R', 3, "CJNE R1,#%d,%R"}, + { 0xba, 0xff, 'R', 3, "CJNE R2,#%d,%R"}, + { 0xbb, 0xff, 'R', 3, "CJNE R3,#%d,%R"}, + { 0xbc, 0xff, 'R', 3, "CJNE R4,#%d,%R"}, + { 0xbd, 0xff, 'R', 3, "CJNE R5,#%d,%R"}, + { 0xbe, 0xff, 'R', 3, "CJNE R6,#%d,%R"}, + { 0xbf, 0xff, 'R', 3, "CJNE R7,#%d,%R"}, + { 0xc0, 0xff, ' ', 2, "PUSH %a"}, + { 0xc1, 0xff, 'A', 3, "AJMP %A"}, + { 0xc2, 0xff, ' ', 2, "CLR %b"}, + { 0xc3, 0xff, ' ', 1, "CLR C"}, + { 0xc4, 0xff, ' ', 1, "SWAP A"}, + { 0xc5, 0xff, ' ', 2, "XCH A,%a"}, + { 0xc6, 0xff, ' ', 1, "XCH A,@R0"}, + { 0xc7, 0xff, ' ', 1, "XCH A,@R1"}, + { 0xc8, 0xff, ' ', 1, "XCH A,R0"}, + { 0xc9, 0xff, ' ', 1, "XCH A,R1"}, + { 0xca, 0xff, ' ', 1, "XCH A,R2"}, + { 0xcb, 0xff, ' ', 1, "XCH A,R3"}, + { 0xcc, 0xff, ' ', 1, "XCH A,R4"}, + { 0xcd, 0xff, ' ', 1, "XCH A,R5"}, + { 0xce, 0xff, ' ', 1, "XCH A,R6"}, + { 0xcf, 0xff, ' ', 1, "XCH A,R7"}, + { 0xd0, 0xff, ' ', 2, "POP %a"}, + { 0xd1, 0xff, 'a', 3, "ACALL %A"}, + { 0xd2, 0xff, ' ', 2, "SETB %b"}, + { 0xd3, 0xff, ' ', 1, "SETB C"}, + { 0xd4, 0xff, ' ', 1, "DA A"}, + { 0xd5, 0xff, 'R', 3, "DJNZ %a,%R"}, + { 0xd6, 0xff, ' ', 1, "XCHD A,@R0"}, + { 0xd7, 0xff, ' ', 1, "XCHD A,@R1"}, + { 0xd8, 0xff, 'r', 2, "DJNZ R0,%r"}, + { 0xd9, 0xff, 'r', 2, "DJNZ R1,%r"}, + { 0xda, 0xff, 'r', 2, "DJNZ R2,%r"}, + { 0xdb, 0xff, 'r', 2, "DJNZ R3,%r"}, + { 0xdc, 0xff, 'r', 2, "DJNZ R4,%r"}, + { 0xdd, 0xff, 'r', 2, "DJNZ R5,%r"}, + { 0xde, 0xff, 'r', 2, "DJNZ R6,%r"}, + { 0xdf, 0xff, 'r', 2, "DJNZ R7,%r"}, + { 0xe0, 0xff, ' ', 1, "MOVX A,@DPTR"}, + { 0xe1, 0xff, 'A', 3, "AJMP %A"}, + { 0xe2, 0xff, ' ', 1, "MOVX A,@R0"}, + { 0xe3, 0xff, ' ', 1, "MOVX A,@R1"}, + { 0xe4, 0xff, ' ', 1, "CLR A"}, + { 0xe5, 0xff, ' ', 2, "MOV A,%a"}, + { 0xe6, 0xff, ' ', 1, "MOV A,@R0"}, + { 0xe7, 0xff, ' ', 1, "MOV A,@R1"}, + { 0xe8, 0xff, ' ', 1, "MOV A,R0"}, + { 0xe9, 0xff, ' ', 1, "MOV A,R1"}, + { 0xea, 0xff, ' ', 1, "MOV A,R2"}, + { 0xeb, 0xff, ' ', 1, "MOV A,R3"}, + { 0xec, 0xff, ' ', 1, "MOV A,R4"}, + { 0xed, 0xff, ' ', 1, "MOV A,R5"}, + { 0xee, 0xff, ' ', 1, "MOV A,R6"}, + { 0xef, 0xff, ' ', 1, "MOV A,R7"}, + { 0xf0, 0xff, ' ', 1, "MOVX @DPTR,A"}, + { 0xf1, 0xff, 'a', 3, "ACALL %A"}, + { 0xf2, 0xff, ' ', 1, "MOVX @R0,A"}, + { 0xf3, 0xff, ' ', 1, "MOVX @R1,A"}, + { 0xf4, 0xff, ' ', 1, "CPL A"}, + { 0xf5, 0xff, ' ', 2, "MOV %a,A"}, + { 0xf6, 0xff, ' ', 1, "MOV @R0,A"}, + { 0xf7, 0xff, ' ', 1, "MOV @R1,A"}, + { 0xf8, 0xff, ' ', 1, "MOV R0,A"}, + { 0xf9, 0xff, ' ', 1, "MOV R1,A"}, + { 0xfa, 0xff, ' ', 1, "MOV R2,A"}, + { 0xfb, 0xff, ' ', 1, "MOV R3,A"}, + { 0xfc, 0xff, ' ', 1, "MOV R4,A"}, + { 0xfd, 0xff, ' ', 1, "MOV R5,A"}, + { 0xfe, 0xff, ' ', 1, "MOV R6,A"}, + { 0xff, 0xff, ' ', 1, "MOV R7,A"}, + { 0, 0, 0, 0, NULL } +}; + +/* + * Making an 390 CPU object + */ + +cl_uc390::cl_uc390 (int Itype, int Itech, class cl_sim *asim): + cl_uc52 (Itype, Itech, asim) +{ + if (Itype == CPU_DS390F) + { + printf ("24-bit flat mode, warning: lots of sfr-functions not implemented!\n"); + flat24_flag = 1; + } + // todo: add interrupt sources +} + +void +cl_uc390::mk_hw_elements (void) +{ + class cl_hw *h; + + cl_uc52::mk_hw_elements(); + hws->add (h = new cl_uc390_hw (this)); + h->init(); +} + +void +cl_uc390::make_memories(void) +{ + class cl_address_space *as; + + rom= as= new cl_address_space(MEM_ROM_ID, 0, 0x20000, 8); + as->init(); + address_spaces->add(as); + iram= as= new cl_address_space(MEM_IRAM_ID, 0, 0x100, 8); + as->init(); + address_spaces->add(as); + sfr= as= new cl_address_space(MEM_SFR_ID, 0x80, 0x80, 8); + as->init(); + address_spaces->add(as); + xram= as= new cl_address_space(MEM_XRAM_ID, 0, 0x100000+128, 8); + as->init(); + address_spaces->add(as); + as= new cl_address_space(MEM_IXRAM_ID, 0, 0x1000, 8); + as->init(); + address_spaces->add(as); + + class cl_address_decoder *ad; + class cl_memory_chip *chip; + + chip= new cl_memory_chip("rom_chip", 0x20000, 8, 0xff); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= rom, chip, 0, 0x1ffff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + chip= new cl_memory_chip("iram_chip", 0x100, 8, 0); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= iram, chip, 0, 0xff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + chip= new cl_memory_chip("xram_chip", 0x100000+128, 8, 0); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= xram, chip, 0, 0x10007f, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + chip= new cl_memory_chip("ixram_chip", 0x1000, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= address_space(MEM_IXRAM_ID), + chip, 0, 0xfff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + chip= new cl_memory_chip("sfr_chip", 0x80, 8, 0); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= sfr, chip, 0x80, 0xff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + acc= sfr->get_cell(ACC); + psw= sfr->get_cell(PSW); +} + + +/* + * Setting up SFR area to reset value + */ + +void +cl_uc390::clear_sfr(void) +{ + cl_uc52::clear_sfr(); + /* SFR value */ + sfr->write(0x80, 0xff); /* P4 */ + sfr->write(0x81, 0x07); /* SP */ + sfr->write(0x86, 0x04); /* DPS */ + sfr->write(0x90, 0xff); /* P1 */ + sfr->write(0x92, 0xbf); /* P4CNT */ + sfr->write(0x9b, 0xfc); /* ESP */ + if (flat24_flag) + sfr->/*write*/set(ACON, 0xfa); /* ACON; AM1 set: 24-bit flat */ + else + sfr->/*write*/set(ACON, 0xf8); /* ACON */ + sfr->write(0xa0, 0xff); /* P2 */ + sfr->write(0xa1, 0xff); /* P5 */ + sfr->write(0xa3, 0x09); /* COC */ + sfr->write(0xb0, 0xff); /* P3 */ + sfr->write(0xb8, 0x80); /* IP */ + sfr->write(0xc5, 0x10); /* STATUS */ + sfr->write(0xc6, 0x10); /* MCON */ + sfr->write(0xc7, 0xff); /* TA */ + sfr->write(0xc9, 0xe4); /* T2MOD */ + sfr->write(0xd2, 0x2f); /* MCNT1 */ + sfr->write(0xe3, 0x09); /* C1C */ +} + + +t_mem +cl_uc390::read_mem(const char *id/*enum mem_class type*/, t_addr addr) +{ + + if (strcmp(/*type*/id,/* == */MEM_XRAM_ID)==0 && + addr >= 0x400000 && + (sfr->get (ACON) & 0x02)) /* AM1 set: 24-bit flat? */ + { + addr -= 0x400000; + id/*type*/ = MEM_IXRAM_ID; + } + return cl_51core::read_mem(id/*type*/, addr); /* 24 bit */ +} + +t_mem +cl_uc390::get_mem (const char *id/*enum mem_class type*/, t_addr addr) +{ + if (strcmp(/*type*/id/* == */,MEM_XRAM_ID)==0 && + addr >= 0x400000 && + (sfr->get (ACON) & 0x02)) /* AM1 set: 24-bit flat? */ + { + addr -= 0x400000; + /*type*/id = MEM_IXRAM_ID; + } + return cl_51core::get_mem (/*type*/id, addr); +} + +void +cl_uc390::write_mem (const char *id/*enum mem_class type*/, t_addr addr, t_mem val) +{ + if (strcmp(/*type ==*/id, MEM_XRAM_ID)==0 && + addr >= 0x400000 && + (sfr->get (ACON) & 0x02)) /* AM1 set: 24-bit flat? */ + { + addr -= 0x400000; + /*type*/id = MEM_IXRAM_ID; + } + cl_51core::write_mem (/*type*/id, addr, val); +} + +void +cl_uc390::set_mem (/*enum mem_class type*/const char *id, t_addr addr, t_mem val) +{ + if (/*type == */strcmp(id,MEM_XRAM_ID)==0 && + addr >= 0x400000 && + (sfr->get (ACON) & 0x02)) /* AM1 set: 24-bit flat? */ + { + addr -= 0x400000; + /*type*/id = MEM_IXRAM_ID; + } + cl_51core::set_mem (id/*type*/, addr, val); +} + +/* + *____________________________________________________________________________ + */ + +void +cl_uc390::push_byte (t_mem uc) +{ + t_addr sp; + + sp = sfr->wadd (SP, 1); + if (sfr->get (ACON) & 0x04) /* SA: 10 bit stack */ + { + if (sp == 0) /* overflow SP */ + sfr->wadd (ESP, 1); + sp += (sfr->read (ESP) & 0x3) * 256; + write_mem (MEM_IXRAM_ID, sp, uc); // fixme + } + else + { + class cl_memory_cell *stck; + + stck = iram->get_cell (sp); + stck->write (uc); + } +} + +t_mem +cl_uc390::pop_byte (void) +{ + t_mem temp; + t_addr sp; + + if (sfr->get (ACON) & 0x04) /* SA: 10 bit stack */ + { + sp = sfr->read (SP); + sp += (sfr->read (ESP) & 0x3) * 256; + temp = read_mem (MEM_IXRAM_ID, sp); // fixme + sp = sfr->wadd (SP, -1); + if (sp == 0xff) /* underflow SP */ + sfr->wadd (ESP, -1); + return temp; + } + else + { + class cl_memory_cell *stck; + + stck = iram->get_cell (sfr->get (SP)); + temp = stck->read(); + sp = sfr->wadd (SP, -1); + return temp; + } +} + +/* + * 0xa3 1 24 INC DPTR + *____________________________________________________________________________ + * + */ + +int +cl_uc390::inst_inc_dptr (uchar code) +{ + ulong dptr; + + uchar pl, ph, px, dps; + + dps = sfr->get (DPS); + if (dps & 0x01) + { + pl = DPL1; + ph = DPH1; + px = DPX1; + } + else + { + pl = DPL; + ph = DPH; + px = DPX; + } + + dptr = sfr->read (ph) * 256 + sfr->read (pl); + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + dptr += sfr->read (px) *256*256; + if (dps & 0x80) /* decr set */ + dptr--; + else + dptr++; + + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + sfr->write (px, (dptr >> 16) & 0xff); + sfr->write (ph, (dptr >> 8) & 0xff); + sfr->write (pl, dptr & 0xff); + + if (dps & 0x20) /* auto-switch dptr */ + sfr->write (DPS, dps ^ 1); /* toggle dual-dptr switch */ + tick (1); + return resGO; +} + +/* + * 0x73 1 24 JMP @A+DPTR + *____________________________________________________________________________ + * + */ + +int +cl_uc390::inst_jmp_Sa_dptr (uchar code) +{ + uchar pl, ph, px, dps; + + dps = sfr->get (DPS); + if (dps & 0x01) + { + pl = DPL1; + ph = DPH1; + px = DPX1; + } + else + { + pl = DPL; + ph = DPH; + px = DPX; + } + + PC = rom->validate_address(sfr->read (ph) * 256 + sfr->read (pl) + + acc->read()); + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + PC += sfr->read (px) * 256*256; + + tick (1); + return resGO; +} + +/* + * 0x90 3 24 MOV DPTR,#data + *____________________________________________________________________________ + * + */ + +int +cl_uc390::inst_mov_dptr_Sdata (uchar code) +{ + uchar pl, ph, px, dps; + + dps = sfr->get (DPS); + if (dps & 0x01) + { + pl = DPL1; + ph = DPH1; + px = DPX1; + } + else + { + pl = DPL; + ph = DPH; + px = DPX; + } + + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + sfr->write (px, fetch ()); + sfr->write (ph, fetch ()); + sfr->write (pl, fetch ()); + + if (dps & 0x20) /* auto-switch dptr */ + sfr->write (DPS, dps ^ 1); /* toggle dual-dptr switch */ + + tick (1); + return resGO; +} + + +/* + * 0x93 1 24 MOVC A,@A+DPTR + *____________________________________________________________________________ + * + */ + +int +cl_uc390::inst_movc_a_Sa_dptr (uchar code) +{ + uchar pl, ph, px, dps; + + dps = sfr->get (DPS); + if (dps & 0x01) + { + pl = DPL1; + ph = DPH1; + px = DPX1; + } + else + { + pl = DPL; + ph = DPH; + px = DPX; + } + + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + acc->write (rom->read ((sfr->read (px) * 256*256 + + sfr->read (ph) * 256 + sfr->read (pl) + + acc->read()))); + else + acc->write (rom->read ((sfr->read (ph) * 256 + sfr->read (pl) + + acc->read()))); + + if (dps & 0x20) /* auto-switch dptr */ + sfr->write (DPS, dps ^ 1); /* toggle dual-dptr switch */ + + tick (1); + return resGO; +} + +/* + * 0xc0 2 24 PUSH addr + *____________________________________________________________________________ + * + */ + +int +cl_uc390::inst_push (uchar code) +{ + class cl_memory_cell *cell; + + cell = get_direct(fetch()); + t_addr sp_before= sfr->get(SP); + t_mem data; + push_byte (data= cell->read()); + class cl_stack_op *so= + new cl_stack_push(instPC, data, sp_before, sfr->get(SP)); + so->init(); + stack_write(so); + tick (1); + return resGO; +} + + +/* + * 0xd0 2 24 POP addr + *____________________________________________________________________________ + * + */ + +int +cl_uc390::inst_pop (uchar code) +{ + class cl_memory_cell *cell; + + t_addr sp_before= sfr->get(SP); + t_mem data; + cell = get_direct (fetch()); + cell->write (data= pop_byte()); + class cl_stack_op *so= + new cl_stack_pop(instPC, data, sp_before, sfr->get(SP)); + so->init(); + stack_read(so); + tick (1); + return resGO; +} + + +/* + * 0xe0 1 24 MOVX A,@DPTR + *____________________________________________________________________________ + * + */ + +int +cl_uc390::inst_movx_a_Sdptr (uchar code) +{ + uchar pl, ph, px, dps; + + dps = sfr->get (DPS); + if (dps & 0x01) + { + pl = DPL1; + ph = DPH1; + px = DPX1; + } + else + { + pl = DPL; + ph = DPH; + px = DPX; + } + + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + acc->write (read_mem (MEM_XRAM_ID, + sfr->read (px) * 256*256 + sfr->read (ph) * 256 + sfr->read (pl))); + else + acc->write (read_mem (MEM_XRAM_ID, + sfr->read (ph) * 256 + sfr->read (pl))); + + if (dps & 0x20) /* auto-switch dptr */ + sfr->write (DPS, dps ^ 1); /* toggle dual-dptr switch */ + + tick (1); + return resGO; +} + +/* + * 0xf0 1 24 MOVX @DPTR,A + *____________________________________________________________________________ + * + */ + +int +cl_uc390::inst_movx_Sdptr_a (uchar code) +{ + uchar pl, ph, px, dps; + + dps = sfr->get (DPS); + if (dps & 0x01) + { + pl = DPL1; + ph = DPH1; + px = DPX1; + } + else + { + pl = DPL; + ph = DPH; + px = DPX; + } + + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + write_mem (MEM_XRAM_ID, + sfr->read (px) * 256*256 + sfr->read (ph) * 256 + sfr->read (pl), + acc->read()); + else + write_mem (MEM_XRAM_ID, + sfr->read (ph) * 256 + sfr->read (pl), + acc->read()); + + if (dps & 0x20) /* auto-switch dptr */ + sfr->write (DPS, dps ^ 1); /* toggle dual-dptr switch */ + + tick (1); + return resGO; +} + +/* + * 0x[02468ace]1 2 24 AJMP addr + *____________________________________________________________________________ + * + */ + +int +cl_uc390::inst_ajmp_addr (uchar code) +{ + uchar x, h, l; + + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + { + x = (code >> 5) & 0x07; + h = fetch (); + l = fetch (); + PC = (PC & 0xf800) | (x * 256*256 + h * 256 + l); + } + else + { + h = (code >> 5) & 0x07; + l = fetch (); + PC = (PC & 0xf800) | (h * 256 + l); + } + tick (1); + return resGO; +} + +/* + * 0x02 3 24 LJMP addr + *____________________________________________________________________________ + * + */ + +int +cl_uc390::inst_ljmp (uchar code) +{ + uchar x, h, l; + + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + { + x = fetch (); + h = fetch (); + l = fetch (); + PC = x * 256*256 + h * 256 + l; + } + else + { + h = fetch (); + l = fetch (); + PC = h * 256 + l; + } + tick (1); + return resGO; +} + +/* + * 0x[13579bdf]1 2 24 ACALL addr + *____________________________________________________________________________ + * + */ + +int +cl_uc390::inst_acall_addr (uchar code) +{ + uchar x, h, l; + + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + { + x = (code >> 5) & 0x07; + h = fetch (); + l = fetch (); + + push_byte ( PC & 0xff); /* push low byte */ + push_byte ((PC >> 8) & 0xff); /* push high byte */ + push_byte ((PC >> 16) & 0xff); /* push x byte */ + + PC = (PC & 0xf800) | (x * 256*256 + h * 256 + l); + } + else + { + /* stock mcs51 mode */ + class cl_memory_cell *stck; + t_mem sp; + + h = (code >> 5) & 0x07; + l = fetch(); + sp = sfr->wadd (SP, 1); + stck = iram->get_cell (sp); + stck->write (PC & 0xff); // push low byte + + sp = sfr->wadd (SP, 1); + stck = iram->get_cell (sp); + stck->write ((PC >> 8) & 0xff); // push high byte + PC = (PC & 0xf800) | (h*256 + l); + } + tick (1); + return resGO; +} + + +/* + * 0x12 3 24 LCALL + *____________________________________________________________________________ + * + */ + +int +cl_uc390::inst_lcall (uchar code, uint addr, bool intr) +{ + uchar x = 0, h = 0, l = 0; + + if (!intr) + { /* this is a normal lcall */ + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + x = fetch (); + h = fetch (); + l = fetch (); + } + /* else, this is interrupt processing */ + + t_addr sp_before= sfr->get(SP); + push_byte ( PC & 0xff); /* push low byte */ + push_byte ((PC >> 8) & 0xff); /* push high byte */ + + t_mem pushed= PC; + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + { + push_byte ((PC >> 16) & 0xff); /* push x byte */ + if (addr) + PC = addr & 0xfffful; /* if interrupt: x-Byte is 0 */ + else + PC = x * 256*256 + h * 256 + l; + } + else + { + class cl_stack_op *so; + if (addr) + { + PC = addr; + so= new cl_stack_intr(instPC, PC, pushed, sp_before, sfr->get(SP)); + } + else + { + PC = h * 256 + l; + so= new cl_stack_call(instPC, PC, pushed, sp_before, sfr->get(SP)); + } + so->init(); + stack_write(so); + } + return resGO; +} + +/* + * 0x22 1 24 RET + *____________________________________________________________________________ + * + */ + +int +cl_uc390::inst_ret (uchar code) +{ + uchar x = 0, h, l; + + t_addr sp_before= sfr->get(SP); + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + x = pop_byte (); + h = pop_byte (); + l = pop_byte (); + + tick (1); + + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + { + tick (1); + PC = x * 256*256 + h * 256 + l; + } + else + PC = h * 256 + l; + + class cl_stack_op *so= new cl_stack_ret(instPC, PC, sp_before, sfr->get(SP)); + so->init(); + stack_read(so); + return resGO; +} + +/* + * 0x32 1 24 RETI + *____________________________________________________________________________ + * + */ + +int +cl_uc390::inst_reti (uchar code) +{ + uchar x = 0, h, l; + + t_addr sp_before= sfr->get(SP); + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + x = pop_byte (); + h = pop_byte (); + l = pop_byte (); + tick (1); + + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + { + tick (1); + PC = x * 256*256 + h * 256 + l; + } + else + PC = h * 256 + l; + + interrupt->was_reti = DD_TRUE; + class it_level *il = (class it_level *) (it_levels->top ()); + if (il && + il->level >= 0) + { + il = (class it_level *) (it_levels->pop ()); + delete il; + } + + class cl_stack_op *so= + new cl_stack_iret(instPC, PC, sp_before, sfr->get(SP)); + so->init(); + stack_read(so); + return resGO; +} + + +/* + * Disassembling an instruction + */ + +struct dis_entry * +cl_uc390::dis_tbl (void) +{ + if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */ + return disass_390f; + else + return disass_51; + //t_uc51::dis_tbl (); + +} + +const char * +cl_uc390::disass (t_addr addr, const char *sep) +{ + char work[256], temp[20], c[2]; + const char *b; + char *buf, *p, *t; + t_mem code; + + if (! (sfr->get (ACON) & 0x02)) /* AM1 set: 24-bit flat? */ + return cl_51core::disass (addr, sep); + code = rom->get(addr); + + p = work; + b = dis_tbl()[code].mnemonic; + while (*b) + { + if (*b == '%') + { + b++; + switch (*(b++)) + { + case 'A': // absolute address + // stock: + // sprintf (temp, "%04lx", + // (addr & 0xf800)| + // (((code >> 5) & 0x07) * 256 + + // rom->get (addr + 1))); + + sprintf (temp, "%06lx", + (addr & 0xf80000L) | + (((code >> 5) & 0x07) * (256 * 256) + + (rom->get (addr + 1) * 256) + + rom->get (addr + 2))); + break; + case 'l': // long address + sprintf (temp, "%06lx", + rom->get (addr + 1) * (256*256L) + + rom->get (addr + 2) * 256 + + rom->get (addr + 3)); + // rom->get (addr + 1) * 256 + rom->get (addr + 2)); + break; + case 'a': // addr8 (direct address) at 2nd byte + if (!get_name (rom->get (addr + 1), sfr_tbl (), temp)) + sprintf (temp, "%02"_M_"x", rom->get (addr + 1)); + break; + case '8': // addr8 (direct address) at 3rd byte + if (!get_name (rom->get (addr + 2), sfr_tbl (), temp)) + sprintf (temp, "%02"_M_"x", rom->get (addr + 2)); + break; + case 'b': // bitaddr at 2nd byte + { + t_addr ba = rom->get (addr+1); + if (get_name (ba, bit_tbl(), temp)) + break; + if (get_name ((ba<128) ? ((ba/8)+32) : (ba&0xf8), sfr_tbl(), temp)) + { + strcat (temp, "."); + sprintf (c, "%1"_M_"d", ba & 0x07); + strcat (temp, c); + break; + } + sprintf (temp, "%02x.%"_M_"d", (ba<128) ? ((ba/8)+32) : (ba&0xf8), + ba & 0x07); + break; + } + case 'r': // rel8 address at 2nd byte + sprintf (temp, "%04"_A_"x", + t_addr (addr + 2 + (signed char) (rom->get (addr + 1)))); + break; + case 'R': // rel8 address at 3rd byte + sprintf (temp, "%04"_A_"x", + t_addr (addr + 3 + (signed char) (rom->get (addr + 2)))); + break; + case 'd': // data8 at 2nd byte + sprintf (temp, "%02"_M_"x", rom->get (addr + 1)); + break; + case 'D': // data8 at 3rd byte + sprintf (temp, "%02"_M_"x", rom->get (addr + 2)); + break; + default: + strcpy (temp, "?"); + break; + } + t = temp; + while (*t) + *p++ = *t++; + } + else + *p++ = *b++; + } + *p = '\0'; + + p = strchr (work, ' '); + if (!p) + { + buf = strdup (work); + return buf; + } + if (sep == NULL) + buf = (char *) malloc (6 + strlen (p) + 1); + else + buf = (char *) malloc ((p - work) + strlen (sep) + strlen (p) + 1); + for (p = work, t = buf; *p != ' '; p++, t++) + *t = *p; + p++; + *t = '\0'; + if (sep == NULL) + while (strlen (buf) < 6) + strcat (buf, " "); + else + strcat (buf, sep); + strcat (buf, p); + return buf; +} + +void +cl_uc390::print_regs (class cl_console_base *con) +{ + t_addr start; + t_mem data; + + if (! (sfr->get (ACON) & 0x02)) /* AM1 set: 24-bit flat? */ + { + cl_51core::print_regs (con); + return; + } + start = sfr->get (PSW) & 0x18; + //dump_memory(iram, &start, start+7, 8, /*sim->cmd_out()*/con, sim); + iram->dump (start, start + 7, 8, con); + start = sfr->get (PSW) & 0x18; + data = iram->get (iram->get (start)); + con->dd_printf("%06x %02x %c", + iram->get (start), data, isprint (data) ? data : '.'); + con->dd_printf(" ACC= 0x%02x %3d %c B= 0x%02x", + sfr->get (ACC), sfr->get (ACC), + isprint (sfr->get (ACC)) ? + (sfr->get (ACC)) : '.', sfr->get (B)); + eram2xram (); + data = get_mem (MEM_XRAM_ID, + sfr->get (DPX) * 256*256 + sfr->get (DPH) * 256 + sfr->get (DPL)); + con->dd_printf (" DPTR= 0x%02x%02x%02x @DPTR= 0x%02x %3d %c\n", + sfr->get (DPX), sfr->get (DPH), sfr->get (DPL), + data, data, isprint (data) ? data : '.'); + data = iram->get (iram->get (start + 1)); + con->dd_printf ("%06x %02x %c", iram->get (start + 1), data, + isprint (data) ? data : '.'); + data= sfr->get (PSW); + con->dd_printf (" PSW= 0x%02x CY=%c AC=%c OV=%c P=%c ", + data, + (data & bmCY) ? '1' : '0', (data & bmAC) ? '1' : '0', + (data & bmOV) ? '1' : '0', (data & bmP ) ? '1' : '0' + ); + /* show stack pointer */ + if (sfr->get (ACON) & 0x04) + /* SA: 10 bit stack */ + con->dd_printf ("SP10 0x%03x %3d\n", + (sfr->get (ESP) & 3) * 256 + sfr->get (SP), + get_mem (MEM_IXRAM_ID, (sfr->get (ESP) & 3) * 256 + sfr->get (SP)) + ); + else + con->dd_printf ("SP 0x%02x %3d\n", + sfr->get (SP), + iram->get (sfr->get (SP)) + ); + print_disass (PC, con); +} + + +/* End of s51.src/uc390.cc */ diff --git a/sim/ucsim/s51.src/uc390cl.h b/sim/ucsim/s51.src/uc390cl.h new file mode 100644 index 0000000..20b4736 --- /dev/null +++ b/sim/ucsim/s51.src/uc390cl.h @@ -0,0 +1,87 @@ +/* + * Simulator of microcontrollers (uc390cl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + * uc390cl.h - implemented by Karl Bongers, karl@turbobit.com + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef UC390CL_HEADER +#define UC390CL_HEADER + +#include "ddconfig.h" + +#include "uc52cl.h" + +class cl_uc390: public cl_uc52 +{ +public: + cl_uc390(int Itype, int Itech, class cl_sim *asim); + virtual void mk_hw_elements (void); + virtual void make_memories(void); + + virtual void clear_sfr (void); + + // making objects + //virtual t_addr get_mem_size (enum mem_class type); + + // manipulating memories + virtual t_mem read_mem (const char *id/*enum mem_class type*/, t_addr addr); + virtual t_mem get_mem (const char *id/*enum mem_class type*/, t_addr addr); + virtual void write_mem (const char *id/*enum mem_class type*/, t_addr addr, t_mem val); + virtual void set_mem (const char *id/*enum mem_class type*/, t_addr addr, t_mem val); + + /* mods for dual-dptr */ + virtual int inst_inc_dptr(uchar code); + virtual int inst_jmp_Sa_dptr(uchar code); + virtual int inst_mov_dptr_Sdata(uchar code); + virtual int inst_movc_a_Sa_dptr(uchar code); + virtual int inst_movx_a_Sdptr(uchar code); + virtual int inst_movx_Sdptr_a(uchar code); + + /* mods for flat24 */ + virtual int inst_ajmp_addr(uchar code); + virtual int inst_ljmp(uchar code); + virtual int inst_acall_addr(uchar code); + virtual int inst_lcall(uchar code, uint addr, bool intr);/* 12 */ + virtual int inst_ret(uchar code); + virtual int inst_reti(uchar code); + + /* mods for 10 bit stack */ + virtual int inst_push (uchar code); + virtual int inst_pop (uchar code); + + /* mods for disassembly of flat24 */ + virtual struct dis_entry *dis_tbl(void); + virtual const char * disass(t_addr addr, const char *sep); + virtual void print_regs(class cl_console_base *con); + +protected: + int flat24_flag; /* true if processor == ds390f */ + virtual void push_byte (t_mem uc); + virtual t_mem pop_byte (void); +}; + +/* End of s51.src/uc390cl.h */ + +#endif diff --git a/sim/ucsim/s51.src/uc390hw.cc b/sim/ucsim/s51.src/uc390hw.cc new file mode 100644 index 0000000..a715590 --- /dev/null +++ b/sim/ucsim/s51.src/uc390hw.cc @@ -0,0 +1,311 @@ +/* + * Simulator of microcontrollers (serial.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include + +// local +#include "uc390hwcl.h" +#include "regs51.h" +#include "uc51cl.h" + + +cl_uc390_hw::cl_uc390_hw (class cl_uc *auc): + cl_hw (auc, HW_DUMMY, 0, "ds390hw") +{ + uc390 = (class cl_uc390 *) uc; +} + +int +cl_uc390_hw::init(void) +{ + sfr = uc->address_space(MEM_SFR_ID); + if (sfr) + { + /*cell_dps = sfr->register_hw (DPS , this, 0); + cell_p4cnt = sfr->register_hw (P4CNT, this, 0); + cell_exif = sfr->register_hw (EXIF , this, 0); + cell_acon = sfr->register_hw (ACON , this, 0); + cell_p5cnt = sfr->register_hw (P5CNT, this, 0); + cell_c0c = sfr->register_hw (C0C , this, 0); + cell_pmr = sfr->register_hw (PMR , this, 0); + cell_mcon = sfr->register_hw (MCON , this, 0); + cell_ta = sfr->register_hw (TA , this, 0); + cell_cor = sfr->register_hw (COR , this, 0); + cell_mcnt0 = sfr->register_hw (MCNT0, this, 0); + cell_mcnt1 = sfr->register_hw (MCNT1, this, 0); + cell_ma = sfr->register_hw (MA , this, 0); + cell_mb = sfr->register_hw (MB , this, 0); + cell_mc = sfr->register_hw (MC , this, 0); + cell_wdcon = sfr->register_hw (WDCON, this, 0); + cell_c1c = sfr->register_hw (C1C , this, 0);*/ + register_cell (sfr, DPS , &cell_dps , wtd_restore); + register_cell (sfr, P4CNT, &cell_p4cnt, wtd_restore); + register_cell (sfr, EXIF , &cell_exif , wtd_restore); + register_cell (sfr, ACON , &cell_acon , wtd_restore); + register_cell (sfr, P5CNT, &cell_p5cnt, wtd_restore); + register_cell (sfr, C0C , &cell_c0c , wtd_restore); + register_cell (sfr, PMR , &cell_pmr , wtd_restore); + register_cell (sfr, MCON , &cell_mcon , wtd_restore); + register_cell (sfr, TA , &cell_ta , wtd_restore); + register_cell (sfr, COR , &cell_cor , wtd_restore); + register_cell (sfr, MCNT0, &cell_mcnt0, wtd_restore); + register_cell (sfr, MCNT1, &cell_mcnt1, wtd_restore); + register_cell (sfr, MA , &cell_ma , wtd_restore); + register_cell (sfr, MB , &cell_mb , wtd_restore); + register_cell (sfr, MC , &cell_mc , wtd_restore); + register_cell (sfr, WDCON, &cell_wdcon, wtd_restore); + register_cell (sfr, C1C , &cell_c1c , wtd_restore); + } + return 0; +} + +t_mem +cl_uc390_hw::read (class cl_memory_cell *cell) +{ + if (cell == cell_exif) + { + if (ctm_ticks && + uc390->ticks->ticks >= ctm_ticks + 50 /*65535*/) + { + ctm_ticks = 0; + cell->set (cell->get() | 0x08); /* set CKRDY */ + } + } + return cell->get(); +} + +void +cl_uc390_hw::write (class cl_memory_cell *cell, t_mem *val) +{ + if (cell == cell_dps) + *val = (*val & 0xe5) | 0x04; + else if (cell == cell_exif) + { + /* Bit 0 (BGS) is TA-protected */ + if (timed_access_state != 2 || + timed_access_ticks + 2*12 < uc390->ticks->ticks) // fixme: 3 cycles + *val = (*val & ~0x01) | (cell_exif->get() & 0x01); + + /* CKRDY and RGMD are read-only */ + *val = (*val & 0x0c) | (*val & ~0x0c); + } + else if (cell == cell_p4cnt) + { + /* P4CNT is TA-protected */ + if (timed_access_state != 2 || + timed_access_ticks + 2*12 < uc390->ticks->ticks) // fixme: 3 cycles + *val = cell_p4cnt->get(); + *val |= 0x80; /* always 1 */ + } + else if (cell == cell_acon) + { + /* ACON is TA-protected */ + if (timed_access_state != 2 || + timed_access_ticks + 2*12 < uc390->ticks->ticks) // fixme: 3 cycles + *val = cell_acon->get(); + else + { + + /* lockout: IDM1:IDM0 and SA can't be set at the same time */ + if ((cell_mcon->get() & 0xc0) == 0xc0) /* IDM1 and IDM0 set? */ + *val &= ~0x04; /* lockout SA */ + } + *val |= 0xf8; /* always 1 */ + } + else if (cell == cell_p5cnt) + { + /* Bits 0...2 are TA-protected */ + if (timed_access_state != 2 || + timed_access_ticks + 2*12 < uc390->ticks->ticks) // fixme: 3 cycles + *val = (*val & ~0x07) | (cell_p5cnt->get() & 0x07); + } + else if (cell == cell_c0c) + { + /* Bit 3 (CRST) is TA-protected */ + if (timed_access_state != 2 || + timed_access_ticks + 2*12 < uc390->ticks->ticks) // fixme: 3 cycles + *val = (*val & ~0x08) | (cell_c0c->get() & 0x08); + } + else if (cell == cell_pmr) + { + /* fixme: check previous state */ + if ((*val & 0xd0) == 0x90) /* CD1:CD0 set to 10, CTM set */ + { + ctm_ticks = uc390->ticks->ticks; + cell_exif->set (cell_exif->get() & ~0x08); /* clear CKRDY */ + } + else + ctm_ticks = 0; + *val |= 0x03; /* always 1 */ + } + else if (cell == cell_mcon) + { + /* MCON is TA-protected */ + if (timed_access_state != 2 || + timed_access_ticks + 2*12 < uc390->ticks->ticks) // fixme: 3 cycles + *val = cell_mcon->get(); + else + /* lockout: IDM1:IDM0 and SA can't be set at the same time */ + if ((cell_acon->get() & 0x04) == 0x04) /* SA set? */ + *val &= ~0xc0; /* lockout IDM1:IDM0 */ + *val |= 0x10; /* always 1 */ + } + else if (cell == cell_ta) + { + if (*val == 0xAA) + { + timed_access_state = 1; + timed_access_ticks = uc390->ticks->ticks; + } + else if (*val == 0x55 && + timed_access_state == 1 && + timed_access_ticks + 2*12 >= uc390->ticks->ticks) // fixme: 3 cycles + { + timed_access_state = 2; + timed_access_ticks = uc390->ticks->ticks; + } + else + timed_access_state = 0; + } + else if (cell == cell_cor) + { + /* COR is TA-protected */ + if (timed_access_state != 2 || + timed_access_ticks + 2*12 < uc390->ticks->ticks) // fixme: 3 cycles + *val = cell_cor->get(); + } + else if (cell == cell_mcnt0) + { + ; + } + else if (cell == cell_mcnt1) + { + *val |= 0x0f; /* always 1 */ + } + else if (cell == cell_ma) + { + ; + } + else if (cell == cell_mb) + { + ; + } + else if (cell == cell_mc) + { + ; + } + else if (cell == cell_wdcon) + { + /* Bits 0, 1, 3 and 6 are TA-protected */ + if (timed_access_state != 2 || + timed_access_ticks + 2*12 < uc390->ticks->ticks) // fixme: 3 cycles + *val = (*val & ~0x4b) | (cell_wdcon->get() & 0x4b); + } + else if (cell == cell_c1c) + { + /* Bit 3 (CRST) is TA-protected */ + if (timed_access_state != 2 || + timed_access_ticks + 2*12 < uc390->ticks->ticks) // fixme: 3 cycles + *val = (*val & ~0x08) | (cell_c1c->get() & 0x08); + } +} + +/*void +cl_uc390_hw::mem_cell_changed (class cl_m *mem, t_addr addr) +{ + class cl_m *sfr = uc->mem (MEM_SFR); + + if (mem && sfr && mem == sfr) + switch (addr) + { + case DPS: cell_dps = sfr->get_cell (DPS); break; + case P4CNT: cell_p4cnt = sfr->get_cell (P4CNT); break; + case EXIF: cell_exif = sfr->get_cell (EXIF); break; + case ACON: cell_acon = sfr->get_cell (ACON); break; + case P5CNT: cell_p5cnt = sfr->get_cell (P5CNT); break; + case C0C: cell_c0c = sfr->get_cell (C0C); break; + case PMR: cell_pmr = sfr->get_cell (PMR); break; + case MCON: cell_mcon = sfr->get_cell (MCON); break; + case TA: cell_ta = sfr->get_cell (TA); break; + case COR: cell_cor = sfr->get_cell (COR); break; + case MCNT0: cell_mcnt0 = sfr->get_cell (MCNT0); break; + case MCNT1: cell_mcnt1 = sfr->get_cell (MCNT1); break; + case MA: cell_ma = sfr->get_cell (MA); break; + case MB: cell_mb = sfr->get_cell (MB); break; + case MC: cell_mc = sfr->get_cell (MC); break; + case WDCON: cell_wdcon = sfr->get_cell (WDCON); break; + case C1C: cell_c1c = sfr->get_cell (C1C); break; + } +}*/ + +void +cl_uc390_hw::reset(void) +{ + ctm_ticks = 0; + timed_access_state = 0; +} + +void +cl_uc390_hw::print_info(class cl_console_base *con) +{ + int i; + long l; + + i = sfr->get (EXIF); + con->dd_printf ("%s" + " EXIF 0x%02x: IE5 %c IE4 %c IE3 %c IE2 %c CKRDY %c RGMD %c RGSL %c BGS %c\n", + id_string, + i, + (i & 0x80) ? '1' : '0', + (i & 0x40) ? '1' : '0', + (i & 0x20) ? '1' : '0', + (i & 0x10) ? '1' : '0', + (i & 0x08) ? '1' : '0', + (i & 0x04) ? '1' : '0', + (i & 0x02) ? '1' : '0', + (i & 0x01) ? '1' : '0'); + i = sfr->get (DPS); + con->dd_printf ("\tDPS 0x%02x: ID1 %c ID0 %c TSL %c SEL %c\n", + i, + (i & 0x80) ? '1' : '0', + (i & 0x40) ? '1' : '0', + (i & 0x20) ? '1' : '0', + (i & 0x01) ? '1' : '0'); + l = sfr->get (DPX) * 256*256 + + sfr->get (DPH) * 256 + + sfr->get (DPL); + con->dd_printf ("\tDPTR 0x%06x\n", l); + l = sfr->get (DPX1) * 256*256 + + sfr->get (DPH1) * 256 + + sfr->get (DPL1); + con->dd_printf ("\tDPTR1 0x%06x\n", l); +} + +/* End of s51.src/uc390hw.cc */ diff --git a/sim/ucsim/s51.src/uc390hwcl.h b/sim/ucsim/s51.src/uc390hwcl.h new file mode 100644 index 0000000..0f4f125 --- /dev/null +++ b/sim/ucsim/s51.src/uc390hwcl.h @@ -0,0 +1,64 @@ +/* + * Simulator of microcontrollers (serialcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef UC390HWCL_HEADER +#define UC390HWCL_HEADER + +#include "uccl.h" + +#include "uc390cl.h" + + +class cl_uc390_hw: public cl_hw +{ +protected: + class cl_address_space *sfr; + class cl_memory_cell *cell_dps, *cell_exif, *cell_p4cnt, *cell_acon, + *cell_p5cnt, *cell_c0c, *cell_pmr, *cell_mcon, + *cell_ta, *cell_cor, *cell_mcnt0, *cell_mcnt1, + *cell_ma, *cell_mb, *cell_mc, *cell_wdcon, *cell_c1c; + class cl_uc390 *uc390; + unsigned long ctm_ticks; /* mini-state-machine for "crystal multiplier" */ + unsigned long timed_access_ticks; + int timed_access_state; /* 0: idle; 1: $aa written; 2: $55 written */ +public: + cl_uc390_hw (class cl_uc *auc); + virtual int init (void); + + virtual t_mem read (class cl_memory_cell *cell); + virtual void write (class cl_memory_cell *cell, t_mem *val); + + //virtual void mem_cell_changed (class cl_mem *mem, t_addr addr); + + virtual void reset (void); + virtual void print_info (class cl_console_base *con); +}; + + +#endif + +/* End of s51.src/serialcl.h */ diff --git a/sim/ucsim/s51.src/uc51.cc b/sim/ucsim/s51.src/uc51.cc new file mode 100644 index 0000000..1bb4eb6 --- /dev/null +++ b/sim/ucsim/s51.src/uc51.cc @@ -0,0 +1,1296 @@ +/* + * Simulator of microcontrollers (uc51.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include +#include +#ifdef HAVE_UNISTD_H +#include +#endif +#include +#include +#include +#include +#if FD_HEADER_OK +# include HEADER_FD +#endif +#include "i_string.h" + +// prj +#include "utils.h" +#include "globals.h" + +// sim +#include "optioncl.h" + +//cmd.src +#include "cmduccl.h" + +// local +#include "uc51cl.h" +#include "glob.h" +#include "regs51.h" +#include "timer0cl.h" +#include "timer1cl.h" +#include "serialcl.h" +#include "portcl.h" +#include "interruptcl.h" +#include "types51.h" + + +/* + * Options of uc51 + */ + +cl_irq_stop_option::cl_irq_stop_option(class cl_51core *the_uc51): + cl_optref(the_uc51) +{ + uc51= the_uc51; +} + +int +cl_irq_stop_option::init(void) +{ + cl_optref::init(); + create(uc51, bool_opt, "irq_stop", "Stop when IRQ accepted"); + return(0); +} + +void +cl_irq_stop_option::option_changed(void) +{ + if (!uc51) + return; + bool b; + option->get_value(&b); + uc51->stop_at_it= b; +} + + +/* + * Making a new micro-controller and reset it + */ + +cl_51core::cl_51core(int Itype, int Itech, class cl_sim *asim): + cl_uc(asim) +{ + type= Itype; + technology= Itech; + + irq_stop_option= new cl_irq_stop_option(this); + stop_at_it= DD_FALSE; +} + + +/* + * Initializing. Virtual calls go here + * This method must be called first after object creation. + */ + +int +cl_51core::init(void) +{ + irq_stop_option->init(); + cl_uc::init(); + set_name("mcs51_controller"); + reset(); + return(0); +} + +const char * +cl_51core::id_string(void) +{ + static char id_string_51[100]; + int i; + + for (i= 0; cpus_51[i].type_str != NULL && cpus_51[i].type != type; i++) ; + sprintf(id_string_51, "%s %s", + cpus_51[i].type_str?cpus_51[i].type_str:"51", + (technology==CPU_HMOS)?"HMOS":"CMOS"); + return(id_string_51); +} + +void +cl_51core::mk_hw_elements(void) +{ + class cl_hw *h; + + acc= sfr->get_cell(ACC); + psw= sfr->get_cell(PSW); + + hws->add(h= new cl_timer0(this, 0, "timer0")); + h->init(); + hws->add(h= new cl_timer1(this, 1, "timer1")); + h->init(); + hws->add(h= new cl_serial(this)); + h->init(); + hws->add(h= new cl_port(this, 0)); + h->init(); + hws->add(h= new cl_port(this, 1)); + h->init(); + hws->add(h= new cl_port(this, 2)); + h->init(); + hws->add(h= new cl_port(this, 3)); + h->init(); + hws->add(interrupt= new cl_interrupt(this)); + interrupt->init(); + hws->add(h= new cl_uc51_dummy_hw(this)); + h->init(); + /* + acc= sfr->get_cell(ACC); + psw= sfr->get_cell(PSW); + */ +} + +void +cl_51core::build_cmdset(class cl_cmdset *cmdset) +{ + class cl_cmd *cmd; + //class cl_super_cmd *super_cmd; + //class cl_cmdset *cset; + + cl_uc::build_cmdset(cmdset); + + cmdset->add(cmd= new cl_di_cmd("di", DD_TRUE, +"di [start [stop]] Dump Internal RAM", +"long help of di")); + cmd->init(); + + cmdset->add(cmd= new cl_dx_cmd("dx", DD_TRUE, +"dx [start [stop]] Dump External RAM", +"long help of dx")); + cmd->init(); + + cmdset->add(cmd= new cl_ds_cmd("ds", DD_TRUE, +"ds [start [stop]] Dump SFR", +"long help of ds")); + cmd->init(); +} + +/* +class cl_m * +cl_51core::mk_mem(enum mem_class type, char *class_name) +{ + class cl_address_space *m= cl_uc::mk_mem(type, class_name); + if (type == MEM_SFR) + sfr= m; + if (type == MEM_IRAM) + iram= m; + return(m); +} +*/ + +void +cl_51core::make_memories(void) +{ + class cl_address_space *as; + + rom= as= new cl_address_space(MEM_ROM_ID/*"rom"*/, 0, 0x10000, 8); + as->init(); + address_spaces->add(as); + iram= as= new cl_address_space(MEM_IRAM_ID/*"iram"*/, 0, 0x80, 8); + as->init(); + address_spaces->add(as); + sfr= as= new cl_address_space(MEM_SFR_ID/*"sfr"*/, 0x80, 0x80, 8); + as->init(); + address_spaces->add(as); + xram= as= new cl_address_space(MEM_XRAM_ID/*"xram"*/, 0, 0x10000, 8); + as->init(); + address_spaces->add(as); + + class cl_address_decoder *ad; + class cl_memory_chip *chip; + + chip= new cl_memory_chip("rom_chip", 0x10000, 8/*, 0xff*/); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= rom/*address_space(MEM_ROM_ID)*/, + chip, 0, 0xffff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + chip= new cl_memory_chip("iram_chip", 0x80, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= iram/*address_space(MEM_IRAM_ID)*/, + chip, 0, 0x7f, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + chip= new cl_memory_chip("xram_chip", 0x10000, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= xram/*address_space(MEM_XRAM_ID)*/, + chip, 0, 0xffff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + chip= new cl_memory_chip("sfr_chip", 0x80, 8, 0); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= sfr/*address_space(MEM_SFR_ID)*/, + chip, 0x80, 0xff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + acc= sfr->get_cell(ACC); + psw= sfr->get_cell(PSW); +} + + +/* + * Destroying the micro-controller object + */ + +cl_51core::~cl_51core(void) +{ + /* + if (serial_out) + { + if (isatty(fileno(serial_out))) + tcsetattr(fileno(serial_out), TCSANOW, &saved_attributes_out); + fclose(serial_out); + } + if (serial_in) + { + if (isatty(fileno(serial_in))) + tcsetattr(fileno(serial_in), TCSANOW, &saved_attributes_in); + fclose(serial_in); + } + */ + delete irq_stop_option; +} + + +/* + * Disassembling an instruction + */ + +struct dis_entry * +cl_51core::dis_tbl(void) +{ + return(disass_51); +} + +struct name_entry * +cl_51core::sfr_tbl(void) +{ + return(sfr_tab51); +} + +struct name_entry * +cl_51core::bit_tbl(void) +{ + return(bit_tab51); +} + +const char * +cl_51core::disass(t_addr addr, const char *sep) +{ + char work[256], temp[20], c[2]; + const char *b; + char *buf, *p, *t; + t_mem code= rom->get(addr); + + p= work; + b= dis_tbl()[code].mnemonic; + while (*b) + { + if (*b == '%') + { + b++; + switch (*(b++)) + { + case 'A': // absolute address + sprintf(temp, "%04"_A_"x", + t_addr((addr&0xf800)| + (((code>>5)&0x07)*256 + + rom->get(addr+1)))); + break; + case 'l': // long address + sprintf(temp, "%04"_A_"x", + t_addr(rom->get(addr+1)*256 + + rom->get(addr+2))); + break; + case 'a': // addr8 (direct address) at 2nd byte + if (!get_name(rom->get(addr+1), sfr_tbl(), temp)) + sprintf(temp, "%02"_M_"x", rom->get(addr+1)); + break; + case '8': // addr8 (direct address) at 3rd byte + if (!get_name(rom->get(addr+2), sfr_tbl(), temp)) + sprintf(temp, "%02"_M_"x", rom->get(addr+2)); + //sprintf(temp, "%02"_M_"x", rom->get(addr+2)); + break; + case 'b': // bitaddr at 2nd byte + { + t_addr ba= rom->get(addr+1); + if (get_name(ba, bit_tbl(), temp)) + break; + if (get_name((ba<128)?((ba/8)+32):(ba&0xf8), sfr_tbl(), temp)) + { + strcat(temp, "."); + sprintf(c, "%1"_M_"d", ba & 0x07); + strcat(temp, c); + break; + } + sprintf(temp, "%02x.%"_M_"d", (ba<128)?((ba/8)+32):(ba&0xf8), + ba & 0x07); + break; + } + case 'r': // rel8 address at 2nd byte + sprintf(temp, "%04"_A_"x", + t_addr(addr+2+(signed char)(rom->get(addr+1)))); + break; + case 'R': // rel8 address at 3rd byte + sprintf(temp, "%04"_A_"x", + t_addr(addr+3+(signed char)(rom->get(addr+2)))); + break; + case 'd': // data8 at 2nd byte + sprintf(temp, "%02"_M_"x", rom->get(addr+1)); + break; + case 'D': // data8 at 3rd byte + sprintf(temp, "%02"_M_"x", rom->get(addr+2)); + break; + case '6': // data16 at 2nd(H)-3rd(L) byte + sprintf(temp, "%04"_A_"x", + t_addr(rom->get(addr+1)*256 + + rom->get(addr+2))); + break; + default: + strcpy(temp, "?"); + break; + } + t= temp; + while (*t) + *(p++)= *(t++); + } + else + *(p++)= *(b++); + } + *p= '\0'; + + p= strchr(work, ' '); + if (!p) + { + buf= strdup(work); + return(buf); + } + if (sep == NULL) + buf= (char *)malloc(6+strlen(p)+1); + else + buf= (char *)malloc((p-work)+strlen(sep)+strlen(p)+1); + for (p= work, t= buf; *p != ' '; p++, t++) + *t= *p; + p++; + *t= '\0'; + if (sep == NULL) + { + while (strlen(buf) < 6) + strcat(buf, " "); + } + else + strcat(buf, sep); + strcat(buf, p); + return(buf); +} + + +void +cl_51core::print_regs(class cl_console_base *con) +{ + t_addr start; + uchar data; + + start= psw->get() & 0x18; + //dump_memory(iram, &start, start+7, 8, /*sim->cmd_out()*/con, sim); + iram->dump(start, start+7, 8, con); + start= psw->get() & 0x18; + data= iram->get(iram->get(start)); + con->dd_printf("%06x %02x %c", + iram->get(start), data, isprint(data)?data:'.'); + + con->dd_printf(" ACC= 0x%02x %3d %c B= 0x%02x", sfr->get(ACC), sfr->get(ACC), + isprint(sfr->get(ACC))?(sfr->get(ACC)):'.', sfr->get(B)); + //eram2xram(); + data= xram->get(sfr->get(DPH)*256+sfr->get(DPL)); + con->dd_printf(" DPTR= 0x%02x%02x @DPTR= 0x%02x %3d %c\n", sfr->get(DPH), + sfr->get(DPL), data, data, isprint(data)?data:'.'); + + data= iram->get(iram->get(start+1)); + con->dd_printf("%06x %02x %c", iram->get(start+1), data, + isprint(data)?data:'.'); + data= psw->get(); + con->dd_printf(" PSW= 0x%02x CY=%c AC=%c OV=%c P=%c\n", data, + (data&bmCY)?'1':'0', (data&bmAC)?'1':'0', + (data&bmOV)?'1':'0', (data&bmP)?'1':'0'); + + print_disass(PC, con); +} + + +/* + * Converting bit address into real memory + */ + +class cl_address_space * +cl_51core::bit2mem(t_addr bitaddr, t_addr *memaddr, t_mem *bitmask) +{ + class cl_address_space *m; + t_addr ma; + + bitaddr&= 0xff; + if (bitaddr < 128) + { + m= iram; + ma= bitaddr/8 + 0x20; + } + else + { + m= sfr; + ma= bitaddr & 0xf8; + } + if (memaddr) + *memaddr= ma; + if (bitmask) + *bitmask= 1 << (bitaddr & 0x7); + return(m); +} + +t_addr +cl_51core::bit_address(class cl_memory *mem, + t_addr mem_address, int bit_number) +{ + if (bit_number < 0 || + bit_number > 7 || + mem_address < 0) + return(-1); + class cl_memory *sfrchip= memory("sfr_chip"); + if (mem == sfrchip) + { + mem= sfr; + mem_address+= sfr->start_address; + } + if (mem == sfr) + { + if (mem_address < 128 || + mem_address % 8 != 0 || + mem_address > 255) + return(-1); + return(128 + (mem_address-128) + bit_number); + } + if (mem == iram) + { + if (mem_address < 0x20 || + mem_address >= 0x20+32) + return(-1); + return((mem_address-0x20)*8 + bit_number); + } + return(-1); +} + + +/* + * Resetting the micro-controller + */ + +void +cl_51core::reset(void) +{ + cl_uc::reset(); + + clear_sfr(); + + result= resGO; + + //was_reti= DD_FALSE; +} + + +/* + * Setting up SFR area to reset value + */ + +void +cl_51core::clear_sfr(void) +{ + int i; + + for (i= 0x80; i <= 0xff; i++) + sfr->set(i, 0); + sfr->/*set*/write(P0, 0xff); + sfr->/*set*/write(P1, 0xff); + sfr->/*set*/write(P2, 0xff); + sfr->/*set*/write(P3, 0xff); + prev_p1= /*port_pins[1] &*/ sfr->/*get*/read(P1); + prev_p3= /*port_pins[3] &*/ sfr->/*get*/read(P3); + sfr->write(ACC, 0); + sfr->write(B, 0); + sfr->write(PSW, 0); + sfr->write(SP, 7); + sfr->write(DPL, 0); + sfr->write(DPH, 0); + sfr->write(IP, 0); + sfr->write(IE, 0); + sfr->write(TMOD, 0); + sfr->write(TCON, 0); + sfr->write(TH0, 0); + sfr->write(TL0, 0); + sfr->write(TH1, 0); + sfr->write(TL1, 0); + sfr->write(SCON, 0); + sfr->write(PCON, 0); + + sfr->set_nuof_writes(0); + sfr->set_nuof_reads(0); +} + + +/* + * Analyzing code and settig up instruction map + */ + +void +cl_51core::analyze(t_addr addr) +{ + uint code; + struct dis_entry *tabl; + + code= rom->get(addr); + tabl= &(dis_tbl()[code]); + while (!inst_at(addr) && + code != 0xa5 /* break point */) + { + set_inst_at(addr); + switch (tabl->branch) + { + case 'a': // acall + analyze((addr & 0xf800)| + ((rom->get(addr+1)&0x07)*256+ + rom->get(addr+2))); + analyze(addr+tabl->length); + break; + case 'A': // ajmp + addr= (addr & 0xf800)| + ((rom->get(addr+1) & 0x07)*256 + rom->get(addr+2)); + break; + case 'l': // lcall + analyze(rom->get(addr+1)*256 + rom->get(addr+2)); + analyze(addr+tabl->length); + break; + case 'L': // ljmp + addr= rom->get(addr+1)*256 + rom->get(addr+2); + break; + case 'r': // reljmp (2nd byte) + analyze(rom->validate_address(addr+(signed char)(rom->get(addr+1)))); + analyze(addr+tabl->length); + break; + case 'R': // reljmp (3rd byte) + analyze(rom->validate_address(addr+(signed char)(rom->get(addr+2)))); + analyze(addr+tabl->length); + break; + case 's': // sjmp + { + signed char target; + target= rom->get(addr+1); + addr+= 2; + addr= rom->validate_address(addr+target); + break; + } + case '_': + return; + default: + addr= rom->validate_address(addr+tabl->length); + break; + } + code= rom->get(addr); + tabl= &(dis_tbl()[code]); + } +} + + +/* + * Inform hardware elements that `cycles' machine cycles have elapsed + */ + +/*int +cl_51core::tick_hw(int cycles) +{ + cl_uc::tick_hw(cycles); + //do_hardware(cycles); + return(0); +}*/ + +/*int +cl_51core::tick(int cycles) +{ + cl_uc::tick(cycles); + //do_hardware(cycles); + return(0); +}*/ + + +/* + * Correcting direct address + * + * This function returns address of addressed element which can be an IRAM + * or an SFR. + */ + +class cl_memory_cell * +cl_51core::get_direct(t_mem addr) +{ + if (addr < sfr->start_address) + return(iram->get_cell(addr)); + else + return(sfr->get_cell(addr)); +} + + +/* + * Calculating address of specified register cell in IRAM + */ + +class cl_memory_cell * +cl_51core::get_reg(uchar regnum) +{ + t_addr a= (psw->get() & (bmRS0|bmRS1)) | (regnum & 0x07); + return(iram->get_cell(a)); +} + + +/* + * Fetching one instruction and executing it + */ + +int +cl_51core::exec_inst(void) +{ + t_mem code; + int res= resGO; + + //pr_inst(); + instPC= PC; + if (fetch(&code)) + return(resBREAKPOINT); + //tick_hw(1); + tick(1); + switch (code) + { + case 0x00: res= inst_nop(code); break; + case 0x01: case 0x21: case 0x41: case 0x61: + case 0x81: case 0xa1: case 0xc1: case 0xe1:res=inst_ajmp_addr(code);break; + case 0x02: res= inst_ljmp(code); break; + case 0x03: res= inst_rr(code); break; + case 0x04: res= inst_inc_a(code); break; + case 0x05: res= inst_inc_addr(code); break; + case 0x06: case 0x07: res= inst_inc_Sri(code); break; + case 0x08: case 0x09: case 0x0a: case 0x0b: + case 0x0c: case 0x0d: case 0x0e: case 0x0f: res= inst_inc_rn(code); break; + case 0x10: res= inst_jbc_bit_addr(code); break; + case 0x11: case 0x31: case 0x51: case 0x71: + case 0x91: case 0xb1: case 0xd1: case 0xf1:res=inst_acall_addr(code);break; + case 0x12: res= inst_lcall(code, 0, DD_FALSE); break; + case 0x13: res= inst_rrc(code); break; + case 0x14: res= inst_dec_a(code); break; + case 0x15: res= inst_dec_addr(code); break; + case 0x16: case 0x17: res= inst_dec_Sri(code); break; + case 0x18: case 0x19: case 0x1a: case 0x1b: + case 0x1c: case 0x1d: case 0x1e: case 0x1f: res= inst_dec_rn(code); break; + case 0x20: res= inst_jb_bit_addr(code); break; + case 0x22: res= inst_ret(code); break; + case 0x23: res= inst_rl(code); break; + case 0x24: res= inst_add_a_Sdata(code); break; + case 0x25: res= inst_add_a_addr(code); break; + case 0x26: case 0x27: res= inst_add_a_Sri(code); break; + case 0x28: case 0x29: case 0x2a: case 0x2b: + case 0x2c: case 0x2d: case 0x2e: case 0x2f:res= inst_add_a_rn(code);break; + case 0x30: res= inst_jnb_bit_addr(code); break; + case 0x32: res= inst_reti(code); break; + case 0x33: res= inst_rlc(code); break; + case 0x34: res= inst_addc_a_Sdata(code); break; + case 0x35: res= inst_addc_a_addr(code); break; + case 0x36: case 0x37: res= inst_addc_a_Sri(code); break; + case 0x38: case 0x39: case 0x3a: case 0x3b: + case 0x3c: case 0x3d: case 0x3e: case 0x3f:res= inst_addc_a_rn(code);break; + case 0x40: res= inst_jc_addr(code); break; + case 0x42: res= inst_orl_addr_a(code); break; + case 0x43: res= inst_orl_addr_Sdata(code); break; + case 0x44: res= inst_orl_a_Sdata(code); break; + case 0x45: res= inst_orl_a_addr(code); break; + case 0x46: case 0x47: res= inst_orl_a_Sri(code); break; + case 0x48: case 0x49: case 0x4a: case 0x4b: + case 0x4c: case 0x4d: case 0x4e: case 0x4f: res= inst_orl_a_rn(code);break; + case 0x50: res= inst_jnc_addr(code); break; + case 0x52: res= inst_anl_addr_a(code); break; + case 0x53: res= inst_anl_addr_Sdata(code); break; + case 0x54: res= inst_anl_a_Sdata(code); break; + case 0x55: res= inst_anl_a_addr(code); break; + case 0x56: case 0x57: res= inst_anl_a_Sri(code); break; + case 0x58: case 0x59: case 0x5a: case 0x5b: + case 0x5c: case 0x5d: case 0x5e: case 0x5f: res= inst_anl_a_rn(code);break; + case 0x60: res= inst_jz_addr(code); break; + case 0x62: res= inst_xrl_addr_a(code); break; + case 0x63: res= inst_xrl_addr_Sdata(code); break; + case 0x64: res= inst_xrl_a_Sdata(code); break; + case 0x65: res= inst_xrl_a_addr(code); break; + case 0x66: case 0x67: res= inst_xrl_a_Sri(code); break; + case 0x68: case 0x69: case 0x6a: case 0x6b: + case 0x6c: case 0x6d: case 0x6e: case 0x6f: res= inst_xrl_a_rn(code);break; + case 0x70: res= inst_jnz_addr(code); break; + case 0x72: res= inst_orl_c_bit(code); break; + case 0x73: res= inst_jmp_Sa_dptr(code); break; + case 0x74: res= inst_mov_a_Sdata(code); break; + case 0x75: res= inst_mov_addr_Sdata(code); break; + case 0x76: case 0x77: res= inst_mov_Sri_Sdata(code); break; + case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: + case 0x7d: case 0x7e: case 0x7f: res=inst_mov_rn_Sdata(code); break; + case 0x80: res= inst_sjmp(code); break; + case 0x82: res= inst_anl_c_bit(code); break; + case 0x83: res= inst_movc_a_Sa_pc(code); break; + case 0x84: res= inst_div_ab(code); break; + case 0x85: res= inst_mov_addr_addr(code); break; + case 0x86: case 0x87: res= inst_mov_addr_Sri(code); break; + case 0x88: case 0x89: case 0x8a: case 0x8b: + case 0x8c: case 0x8d: case 0x8e: case 0x8f:res=inst_mov_addr_rn(code);break; + case 0x90: res= inst_mov_dptr_Sdata(code); break; + case 0x92: res= inst_mov_bit_c(code); break; + case 0x93: res= inst_movc_a_Sa_dptr(code); break; + case 0x94: res= inst_subb_a_Sdata(code); break; + case 0x95: res= inst_subb_a_addr(code); break; + case 0x96: case 0x97: res= inst_subb_a_Sri(code); break; + case 0x98: case 0x99: case 0x9a: case 0x9b: + case 0x9c: case 0x9d: case 0x9e: case 0x9f:res= inst_subb_a_rn(code);break; + case 0xa0: res= inst_orl_c_Sbit(code); break; + case 0xa2: res= inst_mov_c_bit(code); break; + case 0xa3: res= inst_inc_dptr(code); break; + case 0xa4: res= inst_mul_ab(code); break; + case 0xa5: res= inst_unknown(); break; + case 0xa6: case 0xa7: res= inst_mov_Sri_addr(code); break; + case 0xa8: case 0xa9: case 0xaa: case 0xab: + case 0xac: case 0xad: case 0xae: case 0xaf:res=inst_mov_rn_addr(code);break; + case 0xb0: res= inst_anl_c_Sbit(code); break; + case 0xb2: res= inst_cpl_bit(code); break; + case 0xb3: res= inst_cpl_c(code); break; + case 0xb4: res= inst_cjne_a_Sdata_addr(code); break; + case 0xb5: res= inst_cjne_a_addr_addr(code); break; + case 0xb6: case 0xb7: res= inst_cjne_Sri_Sdata_addr(code); break; + case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: + case 0xbd: case 0xbe: case 0xbf: res=inst_cjne_rn_Sdata_addr(code); break; + case 0xc0: res= inst_push(code); break; + case 0xc2: res= inst_clr_bit(code); break; + case 0xc3: res= inst_clr_c(code); break; + case 0xc4: res= inst_swap(code); break; + case 0xc5: res= inst_xch_a_addr(code); break; + case 0xc6: case 0xc7: res= inst_xch_a_Sri(code); break; + case 0xc8: case 0xc9: case 0xca: case 0xcb: + case 0xcc: case 0xcd: case 0xce: case 0xcf: res= inst_xch_a_rn(code);break; + case 0xd0: res= inst_pop(code); break; + case 0xd2: res= inst_setb_bit(code); break; + case 0xd3: res= inst_setb_c(code); break; + case 0xd4: res= inst_da_a(code); break; + case 0xd5: res= inst_djnz_addr_addr(code); break; + case 0xd6: case 0xd7: res= inst_xchd_a_Sri(code); break; + case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: + case 0xdd: case 0xde: case 0xdf: res=inst_djnz_rn_addr(code); break; + case 0xe0: res= inst_movx_a_Sdptr(code); break; + case 0xe2: case 0xe3: res= inst_movx_a_Sri(code); break; + case 0xe4: res= inst_clr_a(code); break; + case 0xe5: res= inst_mov_a_addr(code); break; + case 0xe6: case 0xe7: res= inst_mov_a_Sri(code); break; + case 0xe8: case 0xe9: case 0xea: case 0xeb: + case 0xec: case 0xed: case 0xee: case 0xef: res= inst_mov_a_rn(code);break; + case 0xf0: res= inst_movx_Sdptr_a(code); break; + case 0xf2: case 0xf3: res= inst_movx_Sri_a(code); break; + case 0xf4: res= inst_cpl_a(code); break; + case 0xf5: res= inst_mov_addr_a(code); break; + case 0xf6: case 0xf7: res= inst_mov_Sri_a(code); break; + case 0xf8: case 0xf9: case 0xfa: case 0xfb: + case 0xfc: case 0xfd: case 0xfe: case 0xff: res= inst_mov_rn_a(code);break; + default: + res= inst_unknown(); + break; + } + //post_inst(); + return(res); +} + + +/* + * Simulating execution of next instruction + * + * This is an endless loop if requested number of steps is negative. + * In this case execution is stopped if an instruction results other + * status than GO. Execution can be stopped if `cmd_in' is not NULL + * and there is input available on that file. It is usefull if the + * command console is on a terminal. If input is available then a + * complete line is read and dropped out because input is buffered + * (inp_avail will be TRUE if ENTER is pressed) and it can confuse + * command interepter. + */ +//static class cl_console_base *c= NULL; +int +cl_51core::do_inst(int step) +{ + result= resGO; + while ((result == resGO) && + (state != stPD) && + (step != 0)) + { + if (step > 0) + step--; + if (state == stGO) + { + interrupt->was_reti= DD_FALSE; + pre_inst(); + result= exec_inst(); + post_inst(); + /* + { + if (c) + print_regs(c); + else + { + if (sim->app->get_commander()==NULL) + printf("no commander PC=0x%x\n",PC); + else + if (sim->app->get_commander()->frozen_console==NULL) + printf("no frozen console PC=0x%x\n",PC); + else + c= sim->app->get_commander()->frozen_console; + if (c) + print_regs(c); + else + printf("no console PC=0x%x\n",PC); + } + } + */ + /*if (result == resGO) + result= check_events();*/ + } + else + { + // tick hw in idle state + inst_ticks= 1; + post_inst(); + tick(1); + } + if (result == resGO) + { + int res; + if ((res= do_interrupt()) != resGO) + result= res; + else + result= idle_pd(); + } + if ((step < 0) && + ((ticks->ticks % 100000) < 50)) + { + if (sim->app->get_commander()->input_avail_on_frozen()) + { + result= resUSER; + } + else + if (sim->app->get_commander()->input_avail()) + break; + } + if (((result == resINTERRUPT) && + stop_at_it) || + result >= resSTOP) + { + sim->stop(result); + break; + } + } + if (state == stPD) + { + //FIXME: tick outsiders eg. watchdog + if (sim->app->get_commander()->input_avail_on_frozen()) + { + //fprintf(stderr,"uc: inp avail in PD mode, user stop\n"); + result= resUSER; + sim->stop(result); + } + } + return(result); +} + +/*void +cl_51core::post_inst(void) +{*/ + //uint tcon= sfr->get(TCON); + //uint p3= sfr->read(P3); + + //cl_uc::post_inst(); + //set_p_flag(); + + // Setting up external interrupt request bits (IEx) + /*if ((tcon & bmIT0)) + { + // IE0 edge triggered + if (p3_int0_edge) + { + // falling edge on INT0 + sim->app->get_commander()-> + debug("%g sec (%d clks): Falling edge detected on INT0 (P3.2)\n", + get_rtime(), ticks->ticks); + sfr->set_bit1(TCON, bmIE0); + p3_int0_edge= 0; + } + } + else + { + // IE0 level triggered + if (p3 & bm_INT0) + sfr->set_bit0(TCON, bmIE0); + else + sfr->set_bit1(TCON, bmIE0); + } + if ((tcon & bmIT1)) + { + // IE1 edge triggered + if (p3_int1_edge) + { + // falling edge on INT1 + sfr->set_bit1(TCON, bmIE1); + p3_int1_edge= 0; + } + } + else + { + // IE1 level triggered + if (p3 & bm_INT1) + sfr->set_bit0(TCON, bmIE1); + else + sfr->set_bit1(TCON, bmIE1); + }*/ + //prev_p3= p3 & port_pins[3]; + //prev_p1= p3 & port_pins[1]; +//} + + +/* + * Abstract method to handle WDT + */ + +/*int +cl_51core::do_wdt(int cycles) +{ + return(resGO); +}*/ + + +/* + * Checking for interrupt requests and accept one if needed + */ + +int +cl_51core::do_interrupt(void) +{ + int i, ie= 0; + + if (interrupt->was_reti) + { + interrupt->was_reti= DD_FALSE; + return(resGO); + } + if (!((ie= sfr->get(IE)) & bmEA)) + return(resGO); + class it_level *il= (class it_level *)(it_levels->top()), *IL= 0; + for (i= 0; i < it_sources->count; i++) + { + class cl_it_src *is= (class cl_it_src *)(it_sources->at(i)); + if (is->is_active() && + (ie & is->ie_mask) && + (sfr->get(is->src_reg) & is->src_mask)) + { + int pr= it_priority(is->ie_mask); + if (il->level >= 0 && + pr <= il->level) + continue; + if (state == stIDLE) + { + state= stGO; + sfr->set_bit0(PCON, bmIDL); + interrupt->was_reti= DD_TRUE; + return(resGO); + } + if (is->clr_bit) + sfr->set_bit0(is->src_reg, is->src_mask); + sim->app->get_commander()-> + debug("%g sec (%d clks): Accepting interrupt `%s' PC= 0x%06x\n", + get_rtime(), ticks->ticks, object_name(is), PC); + IL= new it_level(pr, is->addr, PC, is); + return(accept_it(IL)); + } + } + return(resGO); +} + +int +cl_51core::it_priority(uchar ie_mask) +{ + if (sfr->get(IP) & ie_mask) + return(1); + return(0); +} + + +/* + * Accept an interrupt + */ + +int +cl_51core::accept_it(class it_level *il) +{ + state= stGO; + sfr->set_bit0(PCON, bmIDL); + it_levels->push(il); + tick(1); + int res= inst_lcall(0, il->addr, DD_TRUE); + if (res != resGO) + return(res); + else + return(resINTERRUPT); +} + + +/* + * Checking if Idle or PowerDown mode should be activated + */ + +int +cl_51core::idle_pd(void) +{ + uint pcon= sfr->get(PCON); + + if (technology != CPU_CMOS) + return(resGO); + if (pcon & bmIDL) + { + if (state != stIDLE) + sim->app->get_commander()-> + debug("%g sec (%d clks): CPU in Idle mode (PC=0x%x, PCON=0x%x)\n", + get_rtime(), ticks->ticks, PC, pcon); + state= stIDLE; + //was_reti= 1; + } + if (pcon & bmPD) + { + if (state != stPD) + sim->app->get_commander()-> + debug("%g sec (%d clks): CPU in PowerDown mode\n", + get_rtime(), ticks->ticks); + state= stPD; + } + return(resGO); +} + + +/* + * Checking if EVENT break happened + */ + +/*int +cl_51core::check_events(void) +{ + int i; + class cl_ev_brk *eb; + + if (!ebrk->count) + return(resGO); + for (i= 0; i < ebrk->count; i++) + { + eb= (class cl_ev_brk *)(ebrk->at(i)); + if (eb->match(&event_at)) + return(resBREAKPOINT); + } + return(resGO); +}*/ + + +/* + */ + +/* +void +cl_51core::mem_cell_changed(class cl_m *mem, t_addr addr) +{ + if (mem == sfr) + switch (addr) + { + case ACC: acc= mem->get_cell(ACC); break; + case PSW: psw= mem->get_cell(PSW); break; + } + cl_uc::mem_cell_changed(mem, addr); +} +*/ + + +/* + * Simulating an unknown instruction + * + * Normally this function is called for unimplemented instructions, because + * every instruction must be known! + */ + +int +cl_51core::inst_unknown(void) +{ + //PC--; + class cl_error_unknown_code *e= new cl_error_unknown_code(this); + error(e); + return(resGO); +} + + +/* + * 0x00 1 12 NOP + */ + +int +cl_51core::inst_nop(uchar code) +{ + return(resGO); +} + + +/* + * 0xe4 1 12 CLR A + */ + +int +cl_51core::inst_clr_a(uchar code) +{ + acc->write(0); + return(resGO); +} + + +/* + * 0xc4 1 1 SWAP A + */ + +int +cl_51core::inst_swap(uchar code) +{ + uchar temp; + + temp= (acc->read() >> 4) & 0x0f; + sfr->write(ACC, (acc->get() << 4) | temp); + return(resGO); +} + + +/* + */ + +cl_uc51_dummy_hw::cl_uc51_dummy_hw(class cl_uc *auc): + cl_hw(auc, HW_DUMMY, 0, "_51_dummy") +{ + //uc51= (class cl_51core *)uc; +} + +int +cl_uc51_dummy_hw::init(void) +{ + class cl_address_space *sfr= uc->address_space(MEM_SFR_ID); + if (!sfr) + { + fprintf(stderr, "No SFR to register %s[%d] into\n", id_string, id); + } + //acc= sfr->register_hw(ACC, this, 0); + //sp = sfr->register_hw(SP , this, 0); + use_cell(sfr, PSW, &cell_psw, wtd_restore); + register_cell(sfr, ACC, &cell_acc, wtd_restore_write); + register_cell(sfr, SP , &cell_sp , wtd_restore); + //register_cell(sfr, PCON, &cell_pcon, wtd_restore); + return(0); +} + +void +cl_uc51_dummy_hw::write(class cl_memory_cell *cell, t_mem *val) +{ + if (cell == cell_acc) + { + bool p; + int i; + uchar uc; + + p = DD_FALSE; + uc= *val; + for (i= 0; i < 8; i++) + { + if (uc & 1) + p= !p; + uc>>= 1; + } + if (p) + cell_psw->set_bit1(bmP); + else + cell_psw->set_bit0(bmP); + } + else if (cell == cell_sp) + { + if (*val > uc->sp_max) + uc->sp_max= *val; + uc->sp_avg= (uc->sp_avg+(*val))/2; + } + /*else if (cell == cell_pcon) + { + printf("PCON write 0x%x (PC=0x%x)\n", *val, uc->PC); + uc->sim->stop(0); + }*/ +} + +/*void +cl_uc51_dummy_hw::happen(class cl_hw *where, enum hw_event he, void *params) +{ + struct ev_port_changed *ep= (struct ev_port_changed *)params; + + if (where->cathegory == HW_PORT && + he == EV_PORT_CHANGED && + ep->id == 3) + { + t_mem p3o= ep->pins & ep->prev_value; + t_mem p3n= ep->new_pins & ep->new_value; + if ((p3o & bm_INT0) && + !(p3n & bm_INT0)) + uc51->p3_int0_edge++; + if ((p3o & bm_INT1) && + !(p3n & bm_INT1)) + uc51->p3_int1_edge++; + } +}*/ + + +/* End of s51.src/uc51.cc */ diff --git a/sim/ucsim/s51.src/uc51cl.h b/sim/ucsim/s51.src/uc51cl.h new file mode 100644 index 0000000..aeaa23e --- /dev/null +++ b/sim/ucsim/s51.src/uc51cl.h @@ -0,0 +1,260 @@ +/* + * Simulator of microcontrollers (uc51cl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* + This file is part of microcontroller simulator: ucsim. + + UCSIM is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + UCSIM is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with UCSIM; see the file COPYING. If not, write to the Free + Software Foundation, 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. +*/ +/*@1@*/ + +#ifndef UC51CL_HEADER +#define UC51CL_HEADER + +#include +#ifdef HAVE_TERMIOS_H +#include +#endif + +#include "pobjcl.h" + +#include "simcl.h" +#include "memcl.h" +#include "uccl.h" +#include "itsrccl.h" +#include "brkcl.h" +#include "stypes.h" + +#include "interruptcl.h" + + +class t_uc51; + +class cl_irq_stop_option: public cl_optref +{ +protected: + class cl_51core *uc51; +public: + cl_irq_stop_option(class cl_51core *the_uc51); + virtual int init(void); + virtual void option_changed(void); +}; + +class cl_51core: public cl_uc +{ +public: + // Options + //bool debug; + class cl_irq_stop_option *irq_stop_option; + bool stop_at_it; + + // memories and cells for faster access + class cl_address_space *sfr, *iram, *xram; + class cl_memory_cell *acc, *psw; + +public: + // Help to detect external it requests (falling edge) + uchar prev_p1; // Prev state of P1 + uchar prev_p3; // Prev state of P3 + int p3_int0_edge, p3_int1_edge; + +public: + // Simulation of interrupt system + class cl_interrupt *interrupt; + //bool was_reti; // Instruction had an effect on IE + +public: + int result; // result of instruction execution + + cl_51core(int Itype, int Itech, class cl_sim *asim); + virtual ~cl_51core(void); + virtual int init(void); + virtual const char *id_string(void); + virtual void mk_hw_elements(void); + virtual void build_cmdset(class cl_cmdset *cmdset); + //virtual class cl_m *mk_mem(enum mem_class type, char *class_name); + virtual void make_memories(void); + + virtual int clock_per_cycle(void) { return(12); } + virtual struct dis_entry *dis_tbl(void); + virtual struct name_entry *sfr_tbl(void); + virtual struct name_entry *bit_tbl(void); + virtual const char *disass(t_addr addr, const char *sep); + virtual void print_regs(class cl_console_base *con); + virtual class cl_address_space *bit2mem(t_addr bitaddr, + t_addr *memaddr, t_mem *bitmask); + virtual t_addr bit_address(class cl_memory *mem, + t_addr mem_address, + int bit_number); + virtual void reset(void); + virtual void clear_sfr(void); + virtual void analyze(t_addr addr); + virtual int it_priority(uchar ie_mask); + + virtual int do_inst(int step); + + //virtual void mem_cell_changed(class cl_m *mem, t_addr addr); + +protected: + virtual int do_interrupt(void); + virtual int accept_it(class it_level *il); +protected: + virtual int idle_pd(void); + + virtual class cl_memory_cell *get_direct(t_mem addr); + virtual class cl_memory_cell *get_reg(uchar regnum); + + virtual int exec_inst(void); + //virtual void post_inst(void); + + virtual int inst_unknown(void); + virtual int inst_nop(uchar code); /* 00 */ + virtual int inst_ajmp_addr(uchar code); /* [02468ace]1 */ + virtual int inst_ljmp(uchar code); /* 02 */ + virtual int inst_rr(uchar code); /* 03 */ + virtual int inst_inc_a(uchar code); /* 04 */ + virtual int inst_inc_addr(uchar code); /* 05 */ + virtual int inst_inc_Sri(uchar code); /* 06,07 */ + virtual int inst_inc_rn(uchar code); /* 08-0f */ + virtual int inst_jbc_bit_addr(uchar code); /* 10 */ + virtual int inst_acall_addr(uchar code); /* [13579bdf]1 */ + virtual int inst_lcall(uchar code, uint addr, bool intr);/* 12 */ + virtual int inst_rrc(uchar code); /* 13 */ + virtual int inst_dec_a(uchar code); /* 14 */ + virtual int inst_dec_addr(uchar code); /* 15 */ + virtual int inst_dec_Sri(uchar code); /* 16,17 */ + virtual int inst_dec_rn(uchar code); /* 18-1f */ + virtual int inst_jb_bit_addr(uchar code); /* 20 */ + virtual int inst_ret(uchar code); /* 22 */ + virtual int inst_rl(uchar code); /* 23 */ + virtual int inst_add_a_Sdata(uchar code); /* 24 */ + virtual int inst_add_a_addr(uchar code); /* 25 */ + virtual int inst_add_a_Sri(uchar code); /* 26,27 */ + virtual int inst_add_a_rn(uchar code); /* 28-2f */ + virtual int inst_jnb_bit_addr(uchar code); /* 30 */ + virtual int inst_reti(uchar code); /* 32 */ + virtual int inst_rlc(uchar code); /* 33 */ + virtual int inst_addc_a_Sdata(uchar code); /* 34 */ + virtual int inst_addc_a_addr(uchar code); /* 35 */ + virtual int inst_addc_a_Sri(uchar code); /* 36,37 */ + virtual int inst_addc_a_rn(uchar code); /* 38-3f */ + virtual int inst_jc_addr(uchar code); /* 40 */ + virtual int inst_orl_addr_a(uchar code); /* 42 */ + virtual int inst_orl_addr_Sdata(uchar code); /* 43 */ + virtual int inst_orl_a_Sdata(uchar code); /* 44 */ + virtual int inst_orl_a_addr(uchar code); /* 45 */ + virtual int inst_orl_a_Sri(uchar code); /* 46,47 */ + virtual int inst_orl_a_rn(uchar code); /* 48-4f */ + virtual int inst_jnc_addr(uchar code); /* 50 */ + virtual int inst_anl_addr_a(uchar code); /* 52 */ + virtual int inst_anl_addr_Sdata(uchar code); /* 53 */ + virtual int inst_anl_a_Sdata(uchar code); /* 54 */ + virtual int inst_anl_a_addr(uchar code); /* 55 */ + virtual int inst_anl_a_Sri(uchar code); /* 56,57 */ + virtual int inst_anl_a_rn(uchar code); /* 58-5f */ + virtual int inst_jz_addr(uchar code); /* 60 */ + virtual int inst_xrl_addr_a(uchar code); /* 62 */ + virtual int inst_xrl_addr_Sdata(uchar code); /* 63 */ + virtual int inst_xrl_a_Sdata(uchar code); /* 64 */ + virtual int inst_xrl_a_addr(uchar code); /* 65 */ + virtual int inst_xrl_a_Sri(uchar code); /* 66,67 */ + virtual int inst_xrl_a_rn(uchar code); /* 68-6f */ + virtual int inst_jnz_addr(uchar code); /* 70 */ + virtual int inst_orl_c_bit(uchar code); /* 72 */ + virtual int inst_jmp_Sa_dptr(uchar code); /* 73 */ + virtual int inst_mov_a_Sdata(uchar code); /* 74 */ + virtual int inst_mov_addr_Sdata(uchar code); /* 75 */ + virtual int inst_mov_Sri_Sdata(uchar code); /* 76,77 */ + virtual int inst_mov_rn_Sdata(uchar code); /* 78-7f */ + virtual int inst_sjmp(uchar code); /* 80 */ + virtual int inst_anl_c_bit(uchar code); /* 82 */ + virtual int inst_movc_a_Sa_pc(uchar code); /* 83 */ + virtual int inst_div_ab(uchar code); /* 84 */ + virtual int inst_mov_addr_addr(uchar code); /* 85 */ + virtual int inst_mov_addr_Sri(uchar code); /* 86,87 */ + virtual int inst_mov_addr_rn(uchar code); /* 88-8f */ + virtual int inst_mov_dptr_Sdata(uchar code); /* 90 */ + virtual int inst_mov_bit_c(uchar code); /* 92 */ + virtual int inst_movc_a_Sa_dptr(uchar code); /* 93 */ + virtual int inst_subb_a_Sdata(uchar code); /* 94 */ + virtual int inst_subb_a_addr(uchar code); /* 95 */ + virtual int inst_subb_a_Sri(uchar code); /* 96,97 */ + virtual int inst_subb_a_rn(uchar code); /* 98-9f */ + virtual int inst_orl_c_Sbit(uchar code); /* a0 */ + virtual int inst_mov_c_bit(uchar code); /* a2 */ + virtual int inst_inc_dptr(uchar code); /* a3 */ + virtual int inst_mul_ab(uchar code); /* a4 */ + virtual int inst_mov_Sri_addr(uchar code); /* a6,a7 */ + virtual int inst_mov_rn_addr(uchar code); /* a8-af */ + virtual int inst_anl_c_Sbit(uchar code); /* b0 */ + virtual int inst_cpl_bit(uchar code); /* b2 */ + virtual int inst_cpl_c(uchar code); /* b3 */ + virtual int inst_cjne_a_Sdata_addr(uchar code); /* b4 */ + virtual int inst_cjne_a_addr_addr(uchar code); /* b5 */ + virtual int inst_cjne_Sri_Sdata_addr(uchar code); /* b6,b7 */ + virtual int inst_cjne_rn_Sdata_addr(uchar code); /* b8-bf */ + virtual int inst_push(uchar code); /* c0 */ + virtual int inst_clr_bit(uchar code); /* c2 */ + virtual int inst_clr_c(uchar code); /* c3*/ + virtual int inst_swap(uchar code); /* c4 */ + virtual int inst_xch_a_addr(uchar code); /* c5 */ + virtual int inst_xch_a_Sri(uchar code); /* c6,c7 */ + virtual int inst_xch_a_rn(uchar code); /* c8-cf */ + virtual int inst_pop(uchar code); /* d0 */ + virtual int inst_setb_bit(uchar code); /* d2 */ + virtual int inst_setb_c(uchar code); /* d3 */ + virtual int inst_da_a(uchar code); /* d4 */ + virtual int inst_djnz_addr_addr(uchar code); /* d5 */ + virtual int inst_xchd_a_Sri(uchar code); /* d6,d7 */ + virtual int inst_djnz_rn_addr(uchar code); /* d8-df */ + virtual int inst_movx_a_Sdptr(uchar code); /* e0 */ + virtual int inst_movx_a_Sri(uchar code); /* e2,e3 */ + virtual int inst_clr_a(uchar code); /* e4 */ + virtual int inst_mov_a_addr(uchar code); /* e5 */ + virtual int inst_mov_a_Sri(uchar code); /* e6,e7 */ + virtual int inst_mov_a_rn(uchar code); /* e8-ef */ + virtual int inst_movx_Sdptr_a(uchar code); /* f0 */ + virtual int inst_movx_Sri_a(uchar code); /* f2,f3 */ + virtual int inst_cpl_a(uchar code); /* f4 */ + virtual int inst_mov_addr_a(uchar code); /* f5 */ + virtual int inst_mov_Sri_a(uchar code); /* f6,f7 */ + virtual int inst_mov_rn_a(uchar code); /* f8-ff */ +}; + + +class cl_uc51_dummy_hw: public cl_hw +{ +protected: + //class t_uc51 *uc51; + class cl_memory_cell *cell_acc, *cell_sp, *cell_psw/*, *cell_pcon*/; +public: + cl_uc51_dummy_hw(class cl_uc *auc); + virtual int init(void); + + virtual void write(class cl_memory_cell *cell, t_mem *val); + //virtual void happen(class cl_hw *where, enum hw_event he, void *params); +}; + + +#endif + +/* End of s51.src/uc51cl.h */ diff --git a/sim/ucsim/s51.src/uc51r.cc b/sim/ucsim/s51.src/uc51r.cc new file mode 100644 index 0000000..cecb246 --- /dev/null +++ b/sim/ucsim/s51.src/uc51r.cc @@ -0,0 +1,243 @@ +/* + * Simulator of microcontrollers (uc51r.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include + +// local +#include "uc51rcl.h" +#include "regs51.h" +#include "types51.h" +#include "wdtcl.h" + + +/* + * Making an 8051r CPU object + */ + +cl_uc51r::cl_uc51r(int Itype, int Itech, class cl_sim *asim): + cl_uc52(Itype, Itech, asim) +{ + /* int i; + for (i= 0; i < ERAM_SIZE; i++) + ERAM[i]= 0;*/ + clock_out= 0; +} + + +void +cl_uc51r::mk_hw_elements(void) +{ + class cl_hw *h; + + cl_uc52::mk_hw_elements(); + hws->add(h= new cl_wdt(this, 0x3fff)); + h->init(); + hws->add(h= new cl_uc51r_dummy_hw(this)); + h->init(); +} + + +void +cl_uc51r::make_memories(void) +{ + class cl_address_space *as; + + rom= as= new cl_address_space("rom", 0, 0x10000, 8); + as->init(); + address_spaces->add(as); + iram= as= new cl_address_space("iram", 0, 0x100, 8); + as->init(); + address_spaces->add(as); + sfr= as= new cl_address_space("sfr", 0x80, 0x80, 8); + as->init(); + address_spaces->add(as); + xram= as= new cl_address_space("xram", 0, 0x10000, 8); + as->init(); + address_spaces->add(as); + + class cl_address_decoder *ad; + class cl_memory_chip *chip; + + chip= new cl_memory_chip("rom_chip", 0x10000, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= address_space("rom"), chip, 0, 0xffff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + chip= new cl_memory_chip("iram_chip", 0x100, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= address_space("iram"), chip, 0, 0xff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + chip= new cl_memory_chip("xram_chip", 0x10000, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= address_space("xram"), chip, 0, 0xffff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + chip= new cl_memory_chip("eram_chip", 0x100, 8); + chip->init(); + memchips->add(chip); + + chip= new cl_memory_chip("sfr_chip", 0x80, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= address_space("sfr"), chip, 0x80, 0xff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + acc= sfr->get_cell(ACC); + psw= sfr->get_cell(PSW); +} + + +/* + * Resetting of the microcontroller + * + * Original method is extended with handling of WDT. + */ + +void +cl_uc51r::reset(void) +{ + cl_uc52::reset(); + sfr->write(SADDR, 0); + sfr->write(SADEN, 0); + sfr->write(AUXR, 0); +} + +void +cl_uc51r::clear_sfr(void) +{ + cl_uc52::clear_sfr(); + sfr->write(SADDR, 0); + sfr->write(SADEN, 0); + sfr->write(AUXR, 0); + sfr->write(IPH, 0); +} + + +void +cl_uc51r::received(int c) +{ + t_mem br= sfr->get(SADDR) | sfr->get(SADEN); + int scon= sfr->get(SCON); + + if ((0 < scon >> 6) && + (scon & bmSM2)) + { + if (/* Check for individual address */ + ((sfr->get(SADDR) & sfr->get(SADEN)) == (c & sfr->get(SADEN))) + || + /* Check for broadcast address */ + (br == (br & c))) + sfr->set_bit1(SCON, bmRI); + return; + } + sfr->set_bit1(SCON, bmRI); +} + + +/* + */ + +cl_uc51r_dummy_hw::cl_uc51r_dummy_hw(class cl_uc *auc): + cl_hw(auc, HW_DUMMY, 0, "_51r_dummy") +{} + +int +cl_uc51r_dummy_hw::init(void) +{ + class cl_address_space *sfr= uc->address_space(MEM_SFR_ID); + if (!sfr) + { + fprintf(stderr, "No SFR to register %s[%d] into\n", id_string, id); + } + //use_cell(sfr, PSW, &cell_psw, wtd_restore); + register_cell(sfr, AUXR, &cell_auxr, wtd_restore); + return(0); +} + +void +cl_uc51r_dummy_hw::write(class cl_memory_cell *cell, t_mem *val) +{ + if (cell == cell_auxr) + { + class cl_address_space *xram= uc->address_space(MEM_XRAM_ID); + class cl_memory_chip *eram= + dynamic_cast(uc->memory("eram_chip")); + class cl_address_decoder *d; + if (eram && + xram) + { + if (*val & bmEXTRAM) + d= new cl_address_decoder(xram, uc->memory("xram_chip"), 0,0xff,0); + else + d= new cl_address_decoder(xram, eram, 0, 0xff, 0); + d->init(); + xram->decoders->add(d); + d->activate(0); + } + } + /*else if (cell == cell_pcon) + { + printf("PCON write 0x%x (PC=0x%x)\n", *val, uc->PC); + uc->sim->stop(0); + }*/ +} + +/*void +cl_uc51r_dummy_hw::happen(class cl_hw *where, enum hw_event he, void *params) +{ + struct ev_port_changed *ep= (struct ev_port_changed *)params; + + if (where->cathegory == HW_PORT && + he == EV_PORT_CHANGED && + ep->id == 3) + { + t_mem p3o= ep->pins & ep->prev_value; + t_mem p3n= ep->new_pins & ep->new_value; + if ((p3o & bm_INT0) && + !(p3n & bm_INT0)) + uc51->p3_int0_edge++; + if ((p3o & bm_INT1) && + !(p3n & bm_INT1)) + uc51->p3_int1_edge++; + } +}*/ + + +/* End of s51.src/uc51r.cc */ diff --git a/sim/ucsim/s51.src/uc51rcl.h b/sim/ucsim/s51.src/uc51rcl.h new file mode 100644 index 0000000..1518bfc --- /dev/null +++ b/sim/ucsim/s51.src/uc51rcl.h @@ -0,0 +1,82 @@ +/* + * Simulator of microcontrollers (uc51rcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef UC51RCL_HEADER +#define UC51RCL_HEADER + +#include "ddconfig.h" + +#include "uc52cl.h" +#include "itsrccl.h" + + +class cl_uc51r: public cl_uc52 +{ +public: + int clock_out; + +public: + //uchar ERAM[ERAM_SIZE]; + +public: + cl_uc51r(int Itype, int Itech, class cl_sim *asim); + virtual void mk_hw_elements(void); + virtual void make_memories(void); + + virtual void reset(void); + virtual void clear_sfr(void); + + //virtual void eram2xram(void); + //virtual void xram2eram(void); + + //virtual void proc_write(t_addr addr); + + virtual void received(int c); + + //virtual int inst_movx_a_Sdptr(uchar code); /* e0 */ + //virtual int inst_movx_a_Sri(uchar code); /* e2,e3 */ + //virtual int inst_movx_Sdptr_a(uchar code); /* f0 */ + //virtual int inst_movx_Sri_a(uchar code); /* f2,f3 */ +}; + + +class cl_uc51r_dummy_hw: public cl_hw +{ +protected: + class cl_memory_cell *cell_auxr; +public: + cl_uc51r_dummy_hw(class cl_uc *auc); + virtual int init(void); + + virtual void write(class cl_memory_cell *cell, t_mem *val); + //virtual void happen(class cl_hw *where, enum hw_event he, void *params); +}; + + +#endif + +/* End of s51.src/uc52cl.h */ diff --git a/sim/ucsim/s51.src/uc52.cc b/sim/ucsim/s51.src/uc52.cc new file mode 100644 index 0000000..4105395 --- /dev/null +++ b/sim/ucsim/s51.src/uc52.cc @@ -0,0 +1,141 @@ +/* + * Simulator of microcontrollers (uc52.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include + +// local +#include "uc52cl.h" +#include "regs51.h" +#include "timer2cl.h" + + +/* + * Making an 8052 CPU object + */ + +cl_uc52::cl_uc52(int Itype, int Itech, class cl_sim *asim): + cl_51core(Itype, Itech, asim) +{ +} + + +void +cl_uc52::mk_hw_elements(void) +{ + class cl_hw *h; + + cl_51core::mk_hw_elements(); + hws->add(h= new cl_timer2(this, 2, "timer2", t2_default|t2_down)); + h->init(); +} + +void +cl_uc52::make_memories(void) +{ + class cl_address_space *as; + + rom= as= new cl_address_space("rom", 0, 0x10000, 8); + as->init(); + address_spaces->add(as); + iram= as= new cl_address_space("iram", 0, 0x100, 8); + as->init(); + address_spaces->add(as); + sfr= as= new cl_address_space("sfr", 0x80, 0x80, 8); + as->init(); + address_spaces->add(as); + xram= as= new cl_address_space("xram", 0, 0x10000, 8); + as->init(); + address_spaces->add(as); + + class cl_address_decoder *ad; + class cl_memory_chip *chip; + + chip= new cl_memory_chip("rom_chip", 0x10000, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= address_space("rom"), chip, 0, 0xffff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + chip= new cl_memory_chip("iram_chip", 0x100, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= address_space("iram"), chip, 0, 0xff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + chip= new cl_memory_chip("xram_chip", 0x10000, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= address_space("xram"), chip, 0, 0xffff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + chip= new cl_memory_chip("sfr_chip", 0x80, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= address_space("sfr"), chip, 0x80, 0xff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + acc= sfr->get_cell(ACC); + psw= sfr->get_cell(PSW); +} + + +void +cl_uc52::clear_sfr(void) +{ + cl_51core::clear_sfr(); + sfr->write(T2CON, 0); + sfr->write(TH2, 0); + sfr->write(TL2, 0); + sfr->write(RCAP2L, 0); + sfr->write(RCAP2H, 0); +} + + +/* + * Calculating address of indirectly addressed IRAM cell + * + */ + +class cl_memory_cell * +cl_uc52::get_indirect(uchar addr, int *res) +{ + *res= resGO; + return(iram->get_cell(addr)); +} + + +/* End of s51.src/uc52.cc */ diff --git a/sim/ucsim/s51.src/uc52cl.h b/sim/ucsim/s51.src/uc52cl.h new file mode 100644 index 0000000..b0890a8 --- /dev/null +++ b/sim/ucsim/s51.src/uc52cl.h @@ -0,0 +1,65 @@ +/* + * Simulator of microcontrollers (uc52cl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef UC52CL_HEADER +#define UC52CL_HEADER + +#include "ddconfig.h" + +#include "uc51cl.h" +#include "itsrccl.h" + + +class cl_uc52: public cl_51core +{ +protected: + //class cl_it_src *exf2it; + //int s_rec_t2; // T2 overflows for receiving + //int s_tr_t2; // T2 overflows for sending + +public: + cl_uc52(int Itype, int Itech, class cl_sim *asim); + virtual void mk_hw_elements(void); + virtual void make_memories(void); + + virtual void clear_sfr(void); + + virtual class cl_memory_cell *get_indirect(uchar addr, int *res); + //virtual t_addr get_mem_size(enum mem_class type); + + /*virtual void do_extra_hw(int cycles); + virtual int do_timer2(int cycles); + virtual int do_t2_baud(int cycles); + virtual void do_t2_capture(int *cycles, bool nocount); + virtual void do_t2_reload(int *cycles, bool nocount); + virtual int serial_bit_cnt(int mode);*/ +}; + + +#endif + +/* End of s51.src/uc52cl.h */ diff --git a/sim/ucsim/s51.src/uc89c51r.cc b/sim/ucsim/s51.src/uc89c51r.cc new file mode 100644 index 0000000..0d00ac9 --- /dev/null +++ b/sim/ucsim/s51.src/uc89c51r.cc @@ -0,0 +1,214 @@ +/* + * Simulator of microcontrollers (uc89c51r.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include + +// local +#include "uc89c51rcl.h" +#include "regs51.h" +#include "pcacl.h" +#include "wdtcl.h" + + +cl_uc89c51r::cl_uc89c51r(int Itype, int Itech, class cl_sim *asim): + cl_uc51r(Itype, Itech, asim) +{ +} + + +void +cl_uc89c51r::mk_hw_elements(void) +{ + class cl_hw *h; + + cl_uc52::mk_hw_elements(); + hws->add(h= new cl_wdt(this, 0x3fff)); + h->init(); + hws->add(h= new cl_pca(this, 0)); + h->init(); + hws->add(h= new cl_89c51r_dummy_hw(this)); + h->init(); +} + +void +cl_uc89c51r::make_memories(void) +{ + cl_uc52::make_memories(); +} + + +void +cl_uc89c51r::reset(void) +{ + cl_uc51r::reset(); + sfr->set_bit1(CCAPM0, bmECOM); + sfr->set_bit1(CCAPM1, bmECOM); + sfr->set_bit1(CCAPM2, bmECOM); + sfr->set_bit1(CCAPM3, bmECOM); + sfr->set_bit1(CCAPM4, bmECOM); + //t0_overflows= 0; + dpl0= dph0= dpl1= dph1= 0; + sfr->write(IPH, 0); +} + +int +cl_uc89c51r::it_priority(uchar ie_mask) +{ + uchar l, h; + + l= sfr->get(IP) & ie_mask; + h= sfr->get(IPH) & ie_mask; + if (!h && !l) + return(0); + if (!h && l) + return(1); + if (h && !l) + return(2); + if (h && l) + return(3); + return(0); +} + +void +cl_uc89c51r::pre_inst(void) +{ + //printf("pre dptr0:%02X%02X dptr1:%02X%02X\n", dph0, dpl0, dph1, dpl1); + dps = (sfr->get(AUXR1) & bmDPS); + if (dps) + { + sfr->set(DPL, dpl1); + sfr->set(DPH, dph1); + } + else + { + sfr->set(DPL, dpl0); + sfr->set(DPH, dph0); + } + cl_uc51r::pre_inst(); +} + +void +cl_uc89c51r::post_inst(void) +{ + if (dps) + { + dpl1= sfr->get(DPL); + dph1= sfr->get(DPH); + } + else + { + dpl0= sfr->get(DPL); + dph0= sfr->get(DPH); + } + dps = (sfr->get(AUXR1) & bmDPS); + if (dps) + { + sfr->set(DPL, dpl1); + sfr->set(DPH, dph1); + } + else + { + sfr->set(DPL, dpl0); + sfr->set(DPH, dph0); + } + //printf("post dptr0:%02X%02X dptr1:%02X%02X\n", dph0, dpl0, dph1, dpl1); + cl_uc51r::post_inst(); +} + + +void +cl_uc89c51r::print_regs(class cl_console_base *con) +{ + t_addr start; + uchar data, acc, dps; + + start= psw->get() & 0x18; + //dump_memory(iram, &start, start+7, 8, /*sim->cmd_out()*/con, sim); + iram->dump(start, start+7, 8, con); + start= psw->get() & 0x18; + data= iram->get(iram->get(start)); + con->dd_printf("%06x %02x %c", + iram->get(start), data, isprint(data)?data:'.'); + + acc= sfr->get(ACC); + con->dd_printf(" ACC= 0x%02x %3d %c B= 0x%02x", acc, acc, + isprint(acc)?(acc):'.', sfr->get(B)); + //eram2xram(); + dps = sfr->get(AUXR1) & bmDPS; + data= xram->get(dph0*256+dpl0); + con->dd_printf(" %cDPTR0= 0x%02x%02x @DPTR0= 0x%02x %3d %c", + dps?' ':'*', dph0, dpl0, + data, data, isprint(data)?data:'.'); + data= xram->get(dph1*256+dpl1); + con->dd_printf(" %cDPTR1= 0x%02x%02x @DPTR1= 0x%02x %3d %c\n", + dps?'*':' ', dph1, dpl1, + data, data, isprint(data)?data:'.'); + + data= iram->get(iram->get(start+1)); + con->dd_printf("%06x %02x %c", iram->get(start+1), data, + isprint(data)?data:'.'); + data= psw->get(); + con->dd_printf(" PSW= 0x%02x CY=%c AC=%c OV=%c P=%c\n", data, + (data&bmCY)?'1':'0', (data&bmAC)?'1':'0', + (data&bmOV)?'1':'0', (data&bmP)?'1':'0'); + + print_disass(PC, con); +} + + +/* + */ + +cl_89c51r_dummy_hw::cl_89c51r_dummy_hw(class cl_uc *auc): + cl_hw(auc, HW_DUMMY, 0, "_89c51r_dummy") +{} + +int +cl_89c51r_dummy_hw::init(void) +{ + class cl_address_space *sfr= uc->address_space(MEM_SFR_ID); + if (!sfr) + { + fprintf(stderr, "No SFR to register %s[%d] into\n", id_string, id); + } + //auxr= sfr->register_hw(AUXR, this, 0); + register_cell(sfr, AUXR1, &auxr1, wtd_restore); + return(0); +} + +void +cl_89c51r_dummy_hw::write(class cl_memory_cell *cell, t_mem *val) +{ + if (cell == auxr1) + auxr1->set_bit0(0x04); +} + + +/* End of s51.src/uc89c51r.cc */ diff --git a/sim/ucsim/s51.src/uc89c51rcl.h b/sim/ucsim/s51.src/uc89c51rcl.h new file mode 100644 index 0000000..0661860 --- /dev/null +++ b/sim/ucsim/s51.src/uc89c51rcl.h @@ -0,0 +1,75 @@ +/* + * Simulator of microcontrollers (uc89c51rcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef UC89C51RCL_HEADER +#define UC89C51RCL_HEADER + +#include "ddconfig.h" + +#include "uc51rcl.h" + + +class cl_uc89c51r: public cl_uc51r +{ +public: + //int t0_overflows; + uchar dpl0, dph0; + uchar dpl1, dph1; + uchar dps; + +public: + cl_uc89c51r(int Itype, int Itech, class cl_sim *asim); + virtual void mk_hw_elements(void); + virtual void make_memories(void); + + virtual void reset(void); + virtual void pre_inst(void); + virtual void post_inst(void); + virtual int it_priority(uchar ie_mask); + virtual void print_regs(class cl_console_base *con); + + //virtual void do_extra_hw(int cycles); + //virtual int t0_overflow(void); + /*virtual int do_pca(int cycles); + virtual int do_pca_counter(int cycles); + virtual int do_pca_module(int nr);*/ +}; + +class cl_89c51r_dummy_hw: public cl_hw +{ +protected: + class cl_memory_cell *auxr1; +public: + cl_89c51r_dummy_hw(class cl_uc *auc); + virtual int init(void); + + virtual void write(class cl_memory_cell *cell, t_mem *val); +}; + +#endif + +/* End of s51.src/uc89c51rcl.h */ diff --git a/sim/ucsim/s51.src/wdt.cc b/sim/ucsim/s51.src/wdt.cc new file mode 100644 index 0000000..d62b527 --- /dev/null +++ b/sim/ucsim/s51.src/wdt.cc @@ -0,0 +1,106 @@ +/* + * Simulator of microcontrollers (wdt.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include + +// local +#include "wdtcl.h" +#include "regs51.h" + + +cl_wdt::cl_wdt(class cl_uc *auc, long resetvalue): + cl_hw(auc, HW_WDT, 0, "wdt") +{ + reset_value= resetvalue; + wdt= -1; + written_since_reset= DD_FALSE; +} + +int +cl_wdt::init(void) +{ + class cl_address_space *sfr= uc->address_space(MEM_SFR_ID); + + if (!sfr) + { + fprintf(stderr, "No SFR to register WDT into\n"); + } + //wdtrst= sfr->register_hw(WDTRST, this, (int*)0); + register_cell(sfr, WDTRST, &wdtrst, wtd_restore); + return(0); +} + +void +cl_wdt::write(class cl_memory_cell *cell, t_mem *val) +{ + if (cell == wdtrst && + (((*val)&0xff) == 0xe1) && + (wdtrst->get() == 0x1e) && + written_since_reset) + { + wdt= 0; + /*uc->sim->app->get_commander()-> + debug("%g sec (%d tick): Watchdog timer enabled/reset PC= 0x%06x" + "\n", uc->get_rtime(), uc->ticks->ticks, uc51r->PC);*/ + } + written_since_reset= DD_TRUE; +} + +int +cl_wdt::tick(int cycles) +{ + if (wdt >= 0) + { + wdt+= cycles; + if (wdt > reset_value) + { + /*sim->app->get_commander()-> + debug("%g sec (%d ticks): Watchdog timer resets the CPU, " + "PC= 0x%06x\n", get_rtime(), ticks->ticks, PC);*/ + uc->reset(); + //return(resWDTRESET); + } + } + return(0); +} + +void +cl_wdt::reset(void) +{ + written_since_reset= DD_FALSE; + wdt= -1; +} + +void +cl_wdt::print_info(class cl_console_base *con) +{ + con->dd_printf("%s[%d] %s counter=%d (remains=%d)\n", id_string, id, + (wdt>=0)?"ON":"OFF", wdt, (wdt>=0)?(reset_value-wdt):0); +} + + +/* End of s51.src/wdt.cc */ diff --git a/sim/ucsim/s51.src/wdtcl.h b/sim/ucsim/s51.src/wdtcl.h new file mode 100644 index 0000000..dc8f87a --- /dev/null +++ b/sim/ucsim/s51.src/wdtcl.h @@ -0,0 +1,65 @@ +/* + * Simulator of microcontrollers (wdtcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef S51_WDTCL_HEADER +#define S51_WDTCL_HEADER + +// sim.src +//#include "stypes.h" +//#include "pobjcl.h" +#include "uccl.h" + +// local +//#include "newcmdcl.h" +#include "uc51rcl.h" + + +class cl_wdt: public cl_hw +{ +protected: + long wdt, reset_value; + class cl_memory_cell *wdtrst; + bool written_since_reset; +public: + cl_wdt(class cl_uc *auc, long resetvalue); + virtual int init(void); + + //virtual t_mem read(class cl_memory_cell *cell); + virtual void write(class cl_memory_cell *cell, t_mem *val); + + //virtual t_mem set_cmd(t_mem value); + + virtual int tick(int cycles); + virtual void reset(void); + + virtual void print_info(class cl_console_base *con); +}; + + +#endif + +/* End of s51.src/wdtcl.h */ diff --git a/sim/ucsim/sim.src/(c).1 b/sim/ucsim/sim.src/(c).1 new file mode 100644 index 0000000..ce02b92 --- /dev/null +++ b/sim/ucsim/sim.src/(c).1 @@ -0,0 +1,27 @@ +/* + * Simulator of microcontrollers (sim.src/@@F@@) + * + * Copyright (C) @@S@@,@@Y@@ Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* + This file is part of microcontroller simulator: ucsim. + + UCSIM is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + UCSIM is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with UCSIM; see the file COPYING. If not, write to the Free + Software Foundation, 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. +*/ diff --git a/sim/ucsim/sim.src/Makefile.in b/sim/ucsim/sim.src/Makefile.in new file mode 100644 index 0000000..0a420a2 --- /dev/null +++ b/sim/ucsim/sim.src/Makefile.in @@ -0,0 +1,125 @@ +# +# S51 sim.src/Makefile +# +# (c) Drotos Daniel, Talker Bt. 1997,99 +# + +STARTYEAR = 1997 + +SHELL = /bin/sh +CXX = @CXX@ +CPP = @CPP@ +CXXCPP = @CXXCPP@ +RANLIB = @RANLIB@ +INSTALL = @INSTALL@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +DEFS = $(subs -DHAVE_CONFIG_H,,@DEFS@) +CPPFLAGS = @CPPFLAGS@ -I$(srcdir) -I$(top_srcdir) -I$(top_builddir) \ + -I$(top_srcdir)/cmd.src -I$(top_srcdir)/gui.src +CFLAGS = @CFLAGS@ -Wall +CXXFLAGS = @CXXFLAGS@ -Wall +M_OR_MM = @M_OR_MM@ + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @infodir@ +srcdir = @srcdir@ +VPATH = @srcdir@ + +OBJECTS = stack.o mem.o sim.o itsrc.o brk.o arg.o \ + guiobj.o uc.o hw.o + + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf sim_lib + +test_mem_speed: $(top_builddir)/lib*.a test_mem_speed.o + $(CXX) -o $@ test_mem_speed.o -L$(top_builddir) -Wl,--start-group -lsim -lucsimutil -lcmd -Wl,--end-group + +sim.src: all + + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: all installdirs + + +# Deleting all the installed files +# -------------------------------- +uninstall: + + +# Performing self-test +# -------------------- +check: test + ./test_mem_speed + +test: test_mem_speed + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + + +# Creating dependencies +# --------------------- +dep: main.dep + +Makefile.dep: $(srcdir)/*.cc $(srcdir)/*.h + $(CXXCPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.cc,$^) >Makefile.dep + +-include Makefile.dep +include $(srcdir)/clean.mk + +#parser.cc: parser.y + +#plex.cc: plex.l + +# My rules +# -------- + +sim_lib: $(top_builddir)/libsim.a + +$(top_builddir)/libsim.a: $(OBJECTS) + ar -rcu $*.a $(OBJECTS) + $(RANLIB) $*.a + +.cc.o: + $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c $< -o $@ + +.y.cc: + rm -f $*.cc $*.h + $(YACC) -d $< + mv y.tab.c $*.cc + mv y.tab.h $*.h + +.l.cc: + rm -f $*.cc + $(LEX) -t $< >$*.cc + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" freshconf;\ + fi + +# End of sim.src/Makefile diff --git a/sim/ucsim/sim.src/arg.cc b/sim/ucsim/sim.src/arg.cc new file mode 100644 index 0000000..816d54d --- /dev/null +++ b/sim/ucsim/sim.src/arg.cc @@ -0,0 +1,575 @@ +/* + * Simulator of microcontrollers (arg.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include +#include "i_string.h" + +// prj +#include "globals.h" + +// sim +#include "simcl.h" + +// cmd +#include "cmdutil.h" + +// local +#include "argcl.h" + + +/* + * Making the argument + */ + +cl_arg::cl_arg(long lv): + cl_base() +{ + i_value= lv; + s_value= 0; +} + +cl_arg::cl_arg(const char *sv): + cl_base() +{ + s_value= sv?strdup(sv):0; +} + +cl_arg::cl_arg(double fv): + cl_base() +{ + f_value= fv; + s_value= 0; +} + +cl_arg::cl_arg(void *pv): + cl_base() +{ + p_value= pv; + s_value= 0; +} + +cl_arg::~cl_arg(void) +{ + if (s_value) + free(s_value); +} + + +/* + * Getting value of the argument + */ + +bool +cl_arg::get_ivalue(long *value) +{ + if (value) + *value= i_value; + return(DD_TRUE); +} + +char * +cl_arg::get_svalue(void) +{ + return(s_value); +} + +double +cl_arg::get_fvalue(void) +{ + return(f_value); +} + +void * +cl_arg::get_pvalue(void) +{ + return(p_value); +} + + +/* + * Command parameters + *---------------------------------------------------------------------------- + */ + +cl_cmd_arg::~cl_cmd_arg(void) +{ + if (interpreted_as_string) + { + if (value.string.string) + free(value.string.string); + } +} + +bool +cl_cmd_arg::as_address(class cl_uc *uc) +{ + return(get_address(uc, &(value.address))); +} + +bool +cl_cmd_arg::as_number(void) +{ + return(get_ivalue(&(value.number))); +} + +bool +cl_cmd_arg::as_data(void) +{ + long l; + bool ret= get_ivalue(&l); + value.data= l; + return(ret); +} + +bool +cl_cmd_arg::as_memory(class cl_uc *uc) +{ + value.memory.memory= uc->memory(s_value); + value.memory.address_space= 0; + value.memory.memchip= 0; + if (value.memory.memory) + { + if (value.memory.memory->is_chip()) + value.memory.memchip= + dynamic_cast(value.memory.memory); + if (value.memory.memory->is_address_space()) + value.memory.address_space= + dynamic_cast(value.memory.memory); + } + return(value.memory.memory != 0); +} + +bool +cl_cmd_arg::as_hw(class cl_uc *uc) +{ + return(DD_FALSE); +} + +bool +cl_cmd_arg::as_string(void) +{ + char *s= get_svalue(); + if (!s) + return(DD_FALSE); + if (is_string()) + value.string.string= proc_escape(s, &value.string.len); + else + { + value.string.string= strdup(s); + value.string.len= strlen(s); + } + return(interpreted_as_string= value.string.string != NULL); +} + +bool +cl_cmd_arg::as_bit(class cl_uc *uc) +{ + return(get_bit_address(uc, + &(value.bit.mem), + &(value.bit.mem_address), + &(value.bit.mask))); +} + + +/* Interger number */ + +cl_cmd_int_arg::cl_cmd_int_arg(/*class cl_uc *iuc,*/ long addr): + cl_cmd_arg(/*iuc,*/ addr) +{} + +bool +cl_cmd_int_arg::get_address(class cl_uc *uc, t_addr *addr) +{ + long iv; + + bool b= get_ivalue(&iv); + if (addr) + *addr= iv; + return(b); +} + +bool +cl_cmd_int_arg::get_bit_address(class cl_uc *uc, // input + class cl_address_space **mem, // outputs + t_addr *mem_addr, + t_mem *bit_mask) +{ + t_addr bit_addr; + + if (!get_address(uc, &bit_addr)) + return(DD_FALSE); + + if (mem) + *mem= uc->bit2mem(bit_addr, mem_addr, bit_mask); + return(mem && *mem); +} + +bool +cl_cmd_int_arg::as_string(void) +{ + value.string.string= (char*)malloc(100); + sprintf(value.string.string, "%ld", i_value); + value.string.len= strlen(value.string.string); + return(interpreted_as_string= value.string.string != NULL); +} + + +/* Symbol */ + +cl_cmd_sym_arg::cl_cmd_sym_arg(/*class cl_uc *iuc,*/ const char *sym): + cl_cmd_arg(/*iuc,*/ sym) +{} + +bool +cl_cmd_sym_arg::as_string(void) +{ + char *s= get_svalue(); + if (!s) + return(DD_FALSE); + value.string.string= strdup(s); + value.string.len= strlen(s); + return(interpreted_as_string= value.string.string != NULL); +} + +bool +cl_cmd_sym_arg::get_address(class cl_uc *uc, t_addr *addr) +{ + struct name_entry *ne; + + if ((ne= get_name_entry(uc->sfr_tbl(), + get_svalue(), + uc)) != NULL) + { + if (addr) + *addr= ne->addr; + return(1); + } + return(0); +} + +bool +cl_cmd_sym_arg::get_bit_address(class cl_uc *uc, // input + class cl_address_space **mem, // outputs + t_addr *mem_addr, + t_mem *bit_mask) +{ + struct name_entry *ne; + + ne= get_name_entry(uc->bit_tbl(), get_svalue(), uc); + if (ne == NULL) + return(DD_FALSE); + if (mem) + *mem= uc->bit2mem(ne->addr, mem_addr, bit_mask); + return(mem && *mem); +} + +bool +cl_cmd_sym_arg::as_address(class cl_uc *uc) +{ + struct name_entry *ne; + //printf("SYM %s as addr?\n",get_svalue()); + if ((ne= get_name_entry(uc->sfr_tbl(), get_svalue(), uc)) != NULL) + { + value.address= ne->addr; + return(DD_TRUE); + } + return(DD_FALSE); +} + +bool +cl_cmd_sym_arg::as_hw(class cl_uc *uc) +{ + cl_hw *hw, *found; + int i= 0; + + hw= found= uc->get_hw(get_svalue(), &i); + if (!hw) + return(DD_FALSE); + i++; + found= uc->get_hw(get_svalue(), &i); + if (found) + return(DD_FALSE); + value.hw= hw; + return(DD_TRUE); +} + + +/* String */ + +cl_cmd_str_arg::cl_cmd_str_arg(/*class cl_uc *iuc,*/ const char *str): + cl_cmd_arg(/*iuc,*/ str) +{ +} + + +/* Bit */ + +cl_cmd_bit_arg::cl_cmd_bit_arg(/*class cl_uc *iuc,*/ + class cl_cmd_arg *asfr, class cl_cmd_arg *abit): + cl_cmd_arg(/*iuc,*/ (long)0) +{ + sfr= asfr; + bit= abit; +} + +cl_cmd_bit_arg::~cl_cmd_bit_arg(void) +{ + if (sfr) + delete sfr; + if (bit) + delete bit; +} + +bool +cl_cmd_bit_arg::get_address(class cl_uc *uc, t_addr *addr) +{ + if (sfr) + return(sfr->get_address(uc, addr)); + return(0); +} + +bool +cl_cmd_bit_arg::get_bit_address(class cl_uc *uc, // input + class cl_address_space **mem, // outputs + t_addr *mem_addr, + t_mem *bit_mask) +{ + if (mem) + { + *mem= uc->address_space(MEM_SFR_ID); + if (!*mem) + return(DD_FALSE); + } + if (mem_addr) + { + if (!sfr || + !sfr->get_address(uc, mem_addr)) + return(DD_FALSE); + } + if (bit_mask) + { + if (!bit) + return(DD_FALSE); + long l; + if (!bit->get_ivalue(&l) || + l > 7) + return(DD_FALSE); + *bit_mask= 1 << l; + } + return(DD_TRUE); +} + + +/* Array */ + +cl_cmd_array_arg::cl_cmd_array_arg(/*class cl_uc *iuc,*/ + class cl_cmd_arg *aname, + class cl_cmd_arg *aindex): + cl_cmd_arg(/*iuc,*/ (long)0) +{ + name_arg= aname; + index= aindex; +} + +cl_cmd_array_arg::~cl_cmd_array_arg(void) +{ + if (name_arg) + delete name_arg; + if (index) + delete index; +} + +bool +cl_cmd_array_arg::as_hw(class cl_uc *uc) +{ + char *n; + t_addr a; + + if (name_arg == 0 || + index == 0 || + (n= name_arg->get_svalue()) == NULL || + !index->get_address(uc, &a)) + return(DD_FALSE); + + value.hw= uc->get_hw(n, a, NULL); + return(value.hw != NULL); +} + + +/* + * Program arguments + *---------------------------------------------------------------------------- + */ +/* +cl_prg_arg::cl_prg_arg(char sn, char *ln, long lv): + cl_arg(lv) +{ + short_name= sn; + long_name = ln?strdup(ln):0; +} + +cl_prg_arg::cl_prg_arg(char sn, char *ln, char *sv): + cl_arg(sv) +{ + short_name= sn; + long_name = ln?strdup(ln):0; +} + +cl_prg_arg::cl_prg_arg(char sn, char *ln, double fv): + cl_arg(fv) +{ + short_name= sn; + long_name = ln?strdup(ln):0; +} + +cl_prg_arg::cl_prg_arg(char sn, char *ln, void *pv): + cl_arg(pv) +{ + short_name= sn; + long_name = ln?strdup(ln):0; +} + +cl_prg_arg::~cl_prg_arg(void) +{ + if (long_name) + free(long_name); +} +*/ + +/* + * List of arguments + *---------------------------------------------------------------------------- + */ +/* +int +cl_arguments::arg_avail(char nam) +{ + class cl_prg_arg *a; + int i; + + for (i= 0; i < count; i++) + { + a= (class cl_prg_arg *)(at(i)); + if (a->short_name == nam) + return(1); + } + return(0); +} + +int +cl_arguments::arg_avail(char *nam) +{ + class cl_prg_arg *a; + int i; + + for (i= 0; i < count; i++) + { + a= (class cl_prg_arg *)(at(i)); + if (a->long_name && + strcmp(a->long_name, nam) == 0) + return(1); + } + return(0); +} + +long +cl_arguments::get_iarg(char sname, char *lname) +{ + class cl_prg_arg *a; + int i; + + for (i= 0; i < count; i++) + { + a= (class cl_prg_arg *)(at(i)); + if ((sname && a->short_name == sname) || + (lname && a->long_name && strcmp(a->long_name, lname) == 0)) + { + long iv; + if (a->get_ivalue(&iv)) + return(iv); + else + //FIXME + return(0); + } + } + return(0); +} + +char * +cl_arguments::get_sarg(char sname, char *lname) +{ + class cl_prg_arg *a; + int i; + + for (i= 0; i < count; i++) + { + a= (class cl_prg_arg *)(at(i)); + if ((sname && a->short_name == sname) || + (lname && a->long_name && strcmp(a->long_name, lname) == 0)) + return(a->get_svalue()); + } + return(0); +} + + +double +cl_arguments::get_farg(char sname, char *lname) +{ + class cl_prg_arg *a; + int i; + + for (i= 0; i < count; i++) + { + a= (class cl_prg_arg *)(at(i)); + if ((sname && a->short_name == sname) || + (lname && a->long_name && strcmp(a->long_name, lname) == 0)) + return(a->get_fvalue()); + } + return(0); +} + +void * +cl_arguments::get_parg(char sname, char *lname) +{ + class cl_prg_arg *a; + int i; + + for (i= 0; i < count; i++) + { + a= (class cl_prg_arg *)(at(i)); + if ((sname && a->short_name == sname) || + (lname && a->long_name && strcmp(a->long_name, lname) == 0)) + return(a->get_pvalue()); + } + return(0); +} +*/ + +/* End of arg.cc */ diff --git a/sim/ucsim/sim.src/argcl.h b/sim/ucsim/sim.src/argcl.h new file mode 100644 index 0000000..4b7d136 --- /dev/null +++ b/sim/ucsim/sim.src/argcl.h @@ -0,0 +1,227 @@ +/* + * Simulator of microcontrollers (sim.src/argcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef SIM_ARGCL_HEADER +#define SIM_ARGCL_HEADER + +// prj +#include "pobjcl.h" +#include "stypes.h" + + +/* + * Base type of arguments/parameters + */ + +class cl_arg: public cl_base +{ +public: + union { + long i_value; + double f_value; + void *p_value; + }; + char *s_value; + +public: + cl_arg(long lv); + cl_arg(const char *lv); + cl_arg(double fv); + cl_arg(void *pv); + virtual ~cl_arg(void); + + virtual bool get_ivalue(long *value); + virtual char *get_svalue(void); + virtual double get_fvalue(void); + virtual void *get_pvalue(void); + virtual bool get_bit_address(class cl_uc *uc, // input + class cl_address_space **mem, // outputs + t_addr *mem_addr, + t_mem *bit_mask) { return(DD_FALSE); } +}; + + +/* + * Command parameters + */ + +class cl_cmd_arg: public cl_arg +{ +public: + //class cl_uc *uc; + bool interpreted_as_string; + union { + long number; + t_addr address; + t_mem data; + struct { + class cl_memory *memory; + class cl_address_space *address_space; + class cl_memory_chip *memchip; + } memory; + class cl_hw *hw; + struct { + int len; + char *string; + } string; + struct { + t_mem *array; + int len; + } data_list; + struct { + class cl_address_space *mem; + t_addr mem_address; + t_mem mask; + } bit; + } value; + +public: + cl_cmd_arg(/*class cl_uc *iuc,*/ long i): cl_arg(i) + { /*uc= iuc;*/ interpreted_as_string= DD_FALSE; } + cl_cmd_arg(/*class cl_uc *iuc,*/ const char *s): cl_arg(s) + { /*uc= iuc;*/ interpreted_as_string= DD_FALSE; } + virtual ~cl_cmd_arg(void); + + virtual int is_string(void) { return(DD_FALSE); } + virtual bool get_address(class cl_uc *uc, t_addr *addr) { return(DD_FALSE); } + virtual bool as_address(class cl_uc *uc); + virtual bool as_number(void); + virtual bool as_data(void); + virtual bool as_string(void); + virtual bool as_memory(class cl_uc *uc); + virtual bool as_hw(class cl_uc *uc); + virtual bool as_bit(class cl_uc *uc); +}; + +class cl_cmd_int_arg: public cl_cmd_arg +{ +public: + cl_cmd_int_arg(/*class cl_uc *iuc,*/ long addr); + + virtual bool get_address(class cl_uc *uc, t_addr *addr); + virtual bool get_bit_address(class cl_uc *uc, // input + class cl_address_space **mem, // outputs + t_addr *mem_addr, + t_mem *bit_mask); + virtual bool as_string(void); +}; + +class cl_cmd_sym_arg: public cl_cmd_arg +{ +public: + cl_cmd_sym_arg(/*class cl_uc *iuc,*/ const char *sym); + + virtual bool get_address(class cl_uc *uc, t_addr *addr); + virtual bool get_bit_address(class cl_uc *uc, // input + class cl_address_space **mem, // outputs + t_addr *mem_addr, + t_mem *bit_mask); + virtual bool as_address(class cl_uc *uc); + virtual bool as_number(void) { return(DD_FALSE); } + virtual bool as_string(void); + virtual bool as_hw(class cl_uc *uc); +}; + +class cl_cmd_str_arg: public cl_cmd_arg +{ +public: + cl_cmd_str_arg(/*class cl_uc *iuc,*/ const char *str); + + virtual int is_string(void) { return(1); } + virtual bool as_number(void) { return(DD_FALSE); } +}; + +class cl_cmd_bit_arg: public cl_cmd_arg +{ +public: + class cl_cmd_arg *sfr, *bit; + +public: + cl_cmd_bit_arg(/*class cl_uc *iuc,*/ + class cl_cmd_arg *asfr, class cl_cmd_arg *abit); + virtual ~cl_cmd_bit_arg(void); + + virtual bool get_address(class cl_uc *uc, t_addr *addr); + virtual bool get_bit_address(class cl_uc *uc, // input + class cl_address_space **mem, // outputs + t_addr *mem_addr, + t_mem *bit_mask); +}; + +class cl_cmd_array_arg: public cl_cmd_arg +{ +public: + class cl_cmd_arg *name_arg, *index; + +public: + cl_cmd_array_arg(/*class cl_uc *iuc,*/ + class cl_cmd_arg *aname, class cl_cmd_arg *aindex); + virtual ~cl_cmd_array_arg(void); + virtual bool as_hw(class cl_uc *uc); +}; + + +/* + * Program arguments + */ + +/*class cl_prg_arg: public cl_arg +{ +public: + char short_name; + char *long_name; + +public: + cl_prg_arg(char sn, char *ln, long lv); + cl_prg_arg(char sn, char *ln, char *lv); + cl_prg_arg(char sn, char *ln, double fv); + cl_prg_arg(char sn, char *ln, void *pv); + virtual ~cl_prg_arg(void); +};*/ + + +/* + * List of arguments + */ + +/*class cl_arguments: public cl_list +{ +public: + cl_arguments(void): cl_list(5, 5) {} + + int arg_avail(char nam); + int arg_avail(char *nam); + virtual long get_iarg(char sname, char *lname); + virtual char *get_sarg(char sname, char *lname); + virtual double get_farg(char sname, char *lname); + virtual void *get_parg(char sname, char *lname); +};*/ + + +#endif + +/* End of argcl.h */ diff --git a/sim/ucsim/sim.src/brk.cc b/sim/ucsim/sim.src/brk.cc new file mode 100644 index 0000000..12b87d6 --- /dev/null +++ b/sim/ucsim/sim.src/brk.cc @@ -0,0 +1,302 @@ +/* + * Simulator of microcontrollers (brk.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include + +#include "pobjcl.h" +#include "brkcl.h" + + +/* + * Base object of breakpoints + */ + +cl_brk::cl_brk(class cl_address_space *imem, int inr, t_addr iaddr, + enum brk_perm iperm, int ihit): + cl_base() +{ + mem = imem; + nr = inr; + addr = iaddr; + perm = iperm; + hit = ihit; + cnt = ihit; +} + +cl_brk::~cl_brk(void) +{} + +void +cl_brk::activate(void) +{ + if (mem) + mem->set_brk(addr, this); +} + +void +cl_brk::inactivate(void) +{ + if (mem) + mem->del_brk(addr, this); +} + +bool +cl_brk::do_hit(void) +{ + cnt--; + if (cnt <= 0) + { + cnt= hit; + return(1); + } + return(0); +} + + +/* + * FETCH type of breakpoint + */ + +cl_fetch_brk::cl_fetch_brk(class cl_address_space *imem, int inr, t_addr iaddr, + enum brk_perm iperm, int ihit): + cl_brk(imem, inr, iaddr, iperm, ihit) +{ + code = 0; +} + +enum brk_type +cl_fetch_brk::type(void) +{ + return(brkFETCH); +} + + +/* + * Base of EVENT type of breakpoints + */ + +cl_ev_brk::cl_ev_brk(class cl_address_space *imem, int inr, t_addr iaddr, + enum brk_perm iperm, int ihit, + enum brk_event ievent, const char *iid): + cl_brk(imem, inr, iaddr, iperm, ihit) +{ + event= ievent; + id = iid; + mem = imem; +} + +cl_ev_brk::cl_ev_brk(class cl_address_space *imem, int inr, t_addr iaddr, + enum brk_perm iperm, int ihit, char op): + cl_brk(imem, inr, iaddr, iperm, ihit) +{ + mem = imem; + if ((op= toupper(op)) == 'R') + { + event= brkREAD; + id= "read"; + } + else if (op == 'W') + { + event= brkWRITE; + id= "write"; + } + else + { + event= brkACCESS; + id= "access"; + } +} + +enum brk_type +cl_ev_brk::type(void) +{ + return(brkEVENT); +} + +bool +cl_ev_brk::match(struct event_rec *ev) +{ + return(DD_FALSE); +} + + +/* + * Collection of break-points + * + * This is a sorted collection, sorted by nr field of brk items. + */ + +brk_coll::brk_coll(t_index alimit, t_index adelta, + class cl_address_space *arom): + cl_sorted_list(alimit, adelta, "breakpoints") +{ + rom= arom; +} + +const void * +brk_coll::key_of(void *item) +{ + return((void *)&(((class cl_brk *)(item))->nr)); +} + + +int +brk_coll::compare(const void *key1, const void *key2) +{ + int k1, k2; + + k1= *(int *)key1; + k2= *(int *)key2; + + if (k1 == k2) + return(0); + else + if (k1 < k2) + return(-1); + else + return(+1); +} + + +/* + * Checking if there is an event breakpoint for the specified event + */ + +bool +brk_coll::there_is_event(enum brk_event ev) +{ + class cl_brk *b; + int i; + + for (i= 0; i < count; i++) + { + b= (class cl_brk *)at(i); + if (b->type() == brkEVENT && + ((class cl_ev_brk *)b)->event == ev) + return(DD_TRUE); + } + return(DD_FALSE); +} + +/*int +brk_coll::make_new_nr(void) +{ + if (count == 0) + return(1); + class cl_brk *b= (class cl_brk *)(at(count-1)); + return(b->nr+1); +}*/ + +void +brk_coll::add_bp(class cl_brk *bp) +{ + add(bp); + bp->activate(); + return; + /*if (rom && + bp->addr < rom->size) + / *rom->bp_map->set(bp->addr)* /rom->set_brk(bp->addr, bp);*/ +} + +void +brk_coll::del_bp(t_addr addr) +{ + int idx; + class cl_brk *bp; + + if ((bp= get_bp(addr, &idx))) + { + bp->inactivate(); + free_at(idx); + } + return; + /*if (rom && + addr < rom->size) + { + fprintf(stderr, "brk_coll::del_bp(0x%"_A_"x\n", addr);//FIXME + //rom->bp_map->clear(addr); + }*/ +} + +void +brk_coll::del_bp(t_index idx, int /*dummy*/) +{ + class cl_brk *bp; + + if (idx >= count) + return; + bp= (class cl_brk *)(at(idx)); + if (!bp) + return; + bp->inactivate(); + free_at(idx); +} + +class cl_brk * +brk_coll::get_bp(t_addr addr, int *idx) +{ + if (rom && + rom->valid_address(addr) && + rom->get_cell_flag(addr, CELL_FETCH_BRK)) + { + for (*idx= 0; *idx < count; (*idx)++) + { + class cl_brk *b= (class cl_brk *)(at(*idx)); + if (b->addr == addr) + return(b); + } + } + return(0); +} + +class cl_brk * +brk_coll::get_bp(int nr) +{ + int i; + + for (i= 0; i < count; i++) + { + class cl_brk *bp= (class cl_brk *)(at(i)); + if (bp->nr == nr) + return(bp); + } + return(0); +} + +bool +brk_coll::bp_at(t_addr addr) +{ + return(rom && + rom->valid_address(addr) && + rom->get_cell_flag(addr, CELL_FETCH_BRK)); +} + + +/* End of brk.cc */ diff --git a/sim/ucsim/sim.src/brkcl.h b/sim/ucsim/sim.src/brkcl.h new file mode 100644 index 0000000..aa77388 --- /dev/null +++ b/sim/ucsim/sim.src/brkcl.h @@ -0,0 +1,136 @@ +/* + * Simulator of microcontrollers (sim.src/brkcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef SIM_BRKCL_HEADER +#define SIM_BRKCL_HEADER + +#include "ddconfig.h" + +// prj +#include "pobjcl.h" +#include "stypes.h" + +// sim +#include "memcl.h" + + +/* + * Base object of breakpoints + */ + +class cl_brk: public cl_base +{ +protected: + class cl_address_space *mem; +public: + int nr; + t_addr addr; + enum brk_perm perm; // permanency (FIX,DYNAMIC) + int hit; + int cnt; + + cl_brk(class cl_address_space *imem, int inr, t_addr iaddr, + enum brk_perm iperm, int ihit); + virtual ~cl_brk(void); + + class cl_address_space *get_mem(void) { return(mem); } + + virtual void activate(void); + virtual void inactivate(void); + virtual enum brk_type type(void)= 0; + virtual enum brk_event get_event(void)= 0; + virtual bool do_hit(void); +}; + + +/* + * FETCH type of breakpoints + */ + +class cl_fetch_brk: public cl_brk +{ +public: + uchar code; + + cl_fetch_brk(class cl_address_space *imem, int inr, t_addr iaddr, + enum brk_perm iperm, int ihit); + + virtual enum brk_type type(void); + virtual enum brk_event get_event(void) { return(brkNONE); } +}; + + +/* + * Base of EVENT type of breakpoints + */ + +class cl_ev_brk: public cl_brk +{ +public: + cl_ev_brk(class cl_address_space *imem, int inr, t_addr iaddr, + enum brk_perm iperm, + int ihit, enum brk_event ievent, const char *iid); + cl_ev_brk(class cl_address_space *imem, int inr, t_addr iaddr, + enum brk_perm iperm, + int ihit, char op); + enum brk_event event; + const char *id; + + virtual enum brk_type type(void); + virtual enum brk_event get_event(void) { return(event); } + virtual bool match(struct event_rec *ev); +}; + + +/* + * Collection of breakpoint sorted by address + */ + +class brk_coll: public cl_sorted_list +{ +public: + class cl_address_space/*rom*/ *rom; +public: + brk_coll(t_index alimit, t_index adelta, class cl_address_space/*rom*/*arom); + virtual const void *key_of(void *item); + virtual int compare(const void *key1, const void *key2); + + virtual bool there_is_event(enum brk_event ev); + //virtual int make_new_nr(void); + + virtual void add_bp(class cl_brk *bp); + virtual void del_bp(t_addr addr); + virtual void del_bp(t_index idx, int /*dummy*/); + virtual class cl_brk *get_bp(t_addr addr, int *idx); + virtual class cl_brk *get_bp(int nr); + virtual bool bp_at(t_addr addr); +}; + + +#endif + +/* End of brkcl.h */ diff --git a/sim/ucsim/sim.src/clean.mk b/sim/ucsim/sim.src/clean.mk new file mode 100644 index 0000000..89e5433 --- /dev/null +++ b/sim/ucsim/sim.src/clean.mk @@ -0,0 +1,22 @@ +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] test_mem_speed + rm -f .[a-z]*~ + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f Makefile *.dep + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean diff --git a/sim/ucsim/sim.src/conf.mk b/sim/ucsim/sim.src/conf.mk new file mode 100644 index 0000000..1d54f82 --- /dev/null +++ b/sim/ucsim/sim.src/conf.mk @@ -0,0 +1,10 @@ +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_builddir)/configure.in + cd $(top_builddir) && $(SHELL) ./config.status + +# End of conf.mk diff --git a/sim/ucsim/sim.src/guiobj.cc b/sim/ucsim/sim.src/guiobj.cc new file mode 100644 index 0000000..6019bc2 --- /dev/null +++ b/sim/ucsim/sim.src/guiobj.cc @@ -0,0 +1,37 @@ +/* + * Simulator of microcontrollers (guiobj.cc) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "guiobjcl.h" + + +cl_guiobj::cl_guiobj(void): + cl_base() +{ +} + + +/* End of gui.src/guiobj.cc */ diff --git a/sim/ucsim/sim.src/guiobjcl.h b/sim/ucsim/sim.src/guiobjcl.h new file mode 100644 index 0000000..e01dbce --- /dev/null +++ b/sim/ucsim/sim.src/guiobjcl.h @@ -0,0 +1,45 @@ +/* + * Simulator of microcontrollers (sim.src/guiobjcl.h) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef SIM_GUIOBJCL_HEADER +#define SIM_GUIOBJCL_HEADER + +#include "ddconfig.h" + +#include "pobjcl.h" + + +class cl_guiobj: public cl_base +{ +public: + cl_guiobj(void); +}; + + +#endif + +/* End of sim.src/guiobjcl.h */ diff --git a/sim/ucsim/sim.src/hw.cc b/sim/ucsim/sim.src/hw.cc new file mode 100644 index 0000000..143e9b9 --- /dev/null +++ b/sim/ucsim/sim.src/hw.cc @@ -0,0 +1,405 @@ +/* + * Simulator of microcontrollers (hw.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include "i_string.h" + +#include "stypes.h" +#include "hwcl.h" + + +/* + *____________________________________________________________________________ + */ + +cl_watched_cell::cl_watched_cell(class cl_address_space *amem, t_addr aaddr, + class cl_memory_cell **astore, + enum what_to_do_on_cell_change awtd) +{ + mem= amem; + addr= aaddr; + store= astore; + wtd= awtd; + if (mem) + { + cell= mem->get_cell(addr); + if (store) + *store= cell; + } +} + +void +cl_watched_cell::mem_cell_changed(class cl_address_space *amem, t_addr aaddr, + class cl_hw *hw) +{ + if (mem && + mem == amem && + addr == aaddr) + { + cell= mem->get_cell(addr); + if (store && + (wtd & WTD_RESTORE)) + *store= cell; + if (wtd & WTD_WRITE) + { + t_mem d= cell->get(); + hw->write(cell, &d); + } + } +} + +void +cl_watched_cell::address_space_added(class cl_address_space *amem, + class cl_hw *hw) +{ +} + +void +cl_used_cell::mem_cell_changed(class cl_address_space *amem, t_addr aaddr, +class cl_hw *hw) +{ + if (mem && + mem == amem && + addr == aaddr) + { + cell= mem->get_cell(addr); + if (store && + (wtd & WTD_RESTORE)) + *store= cell; + if (wtd & WTD_WRITE) + { + t_mem d= cell->get(); + hw->write(cell, &d); + } + } +} + +void +cl_used_cell::address_space_added(class cl_address_space *amem, + class cl_hw *hw) +{ +} + + +/* + *____________________________________________________________________________ + */ + +cl_hw::cl_hw(class cl_uc *auc, enum hw_cath cath, int aid, const char *aid_string): + cl_guiobj() +{ + flags= HWF_INSIDE; + uc= auc; + cathegory= cath; + id= aid; + if (aid_string && + *aid_string) + id_string= strdup(aid_string); + else + id_string= strdup("unknown hw element"); + char *s= (char*)malloc(strlen(get_name("hw"))+100); + sprintf(s, "partners of %s", get_name("hw")); + partners= new cl_list(2, 2, s); + sprintf(s, "watched cells of %s", get_name("hw")); + watched_cells= new cl_list(2, 2, s); + free(s); +} + +cl_hw::~cl_hw(void) +{ + free(id_string); + //hws_to_inform->disconn_all(); + delete partners; + delete watched_cells; +} + + +void +cl_hw::new_hw_adding(class cl_hw *new_hw) +{ +} + +void +cl_hw::new_hw_added(class cl_hw *new_hw) +{ + int i; + + for (i= 0; i < partners->count; i++) + { + class cl_partner_hw *ph= (class cl_partner_hw *)(partners->at(i)); + ph->refresh(new_hw); + } +} + +class cl_hw * +cl_hw::make_partner(enum hw_cath cath, int id) +{ + class cl_partner_hw *ph; + class cl_hw *hw; + + ph= new cl_partner_hw(uc, cath, id); + partners->add(ph); + hw= ph->get_partner(); + return(hw); +} + + +/* + * Callback functions for changing memory locations + */ + +/*t_mem +cl_hw::read(class cl_m *mem, t_addr addr) +{ + // Simply return the value + return(mem->get(addr)); +}*/ + +/*void +cl_hw::write(class cl_m *mem, t_addr addr, t_mem *val) +{ + // Do not change *val by default +}*/ + +void +cl_hw::set_cmd(class cl_cmdline *cmdline, class cl_console_base *con) +{ + con->dd_printf("Nothing to do\n"); +} + +class cl_memory_cell * +cl_hw::register_cell(class cl_address_space *mem, t_addr addr, + class cl_memory_cell **store, + enum what_to_do_on_cell_change awtd) +{ + class cl_watched_cell *wc; + class cl_memory_cell *cell; + + if (mem) + mem->register_hw(addr, this, (int*)0, DD_FALSE); + else + printf("regcell JAJ no mem\n"); + wc= new cl_watched_cell(mem, addr, &cell, awtd); + if (store) + *store= cell; + watched_cells->add(wc); + // announce + //uc->sim->mem_cell_changed(mem, addr); + return(cell); +} + +class cl_memory_cell * +cl_hw::use_cell(class cl_address_space *mem, t_addr addr, + class cl_memory_cell **store, + enum what_to_do_on_cell_change awtd) +{ + class cl_watched_cell *wc; + class cl_memory_cell *cell; + + wc= new cl_used_cell(mem, addr, &cell, awtd); + if (store) + *store= cell; + watched_cells->add(wc); + return(cell); +} + +void +cl_hw::mem_cell_changed(class cl_address_space *mem, t_addr addr) +{ + int i; + + for (i= 0; i < watched_cells->count; i++) + { + class cl_watched_cell *wc= + (class cl_watched_cell *)(watched_cells->at(i)); + wc->mem_cell_changed(mem, addr, this); + } +} + +void +cl_hw::address_space_added(class cl_address_space *as) +{ + int i; + + for (i= 0; i < watched_cells->count; i++) + { + class cl_watched_cell *wc= + dynamic_cast(watched_cells->object_at(i)); + wc->address_space_added(as, this); + } +} + + +/* + * Simulating `cycles' number of machine cycle + */ + +int +cl_hw::tick(int cycles) +{ + return(0); +} + +void +cl_hw::inform_partners(enum hw_event he, void *params) +{ + int i; + + for (i= 0; i < partners->count; i++) + { + class cl_partner_hw *ph= (class cl_partner_hw *)(partners->at(i)); + ph->happen(this, he, params); + } +} + + +void +cl_hw::print_info(class cl_console_base *con) +{ + con->dd_printf("%s[%d]\n", id_string, id); +} + + +t_index +cl_hws::add(void *item) +{ + int i; + t_index res; + + // pre-add + for (i= 0; i < count; i++) + { + class cl_hw *hw= (class cl_hw *)(at(i)); + hw->new_hw_adding((class cl_hw *)item); + } + // add + res= cl_list::add(item); + // post-add + for (i= 0; i < count; i++) + { + class cl_hw *hw= (class cl_hw *)(at(i)); + hw->new_hw_added((class cl_hw *)item); + } + ((class cl_hw *)item)->added_to_uc(); + return(res); +} + + +void +cl_hws::mem_cell_changed(class cl_address_space *mem, t_addr addr) +{ + int i; + + for (i= 0; i < count; i++) + { + class cl_hw *hw= (class cl_hw *)(at(i)); + hw->mem_cell_changed(mem, addr); + } +} + +void +cl_hws::address_space_added(class cl_address_space *mem) +{ + int i; + + for (i= 0; i < count; i++) + { + class cl_hw *hw= (class cl_hw *)(at(i)); + hw->address_space_added(mem); + } +} + + +/* + *____________________________________________________________________________ + */ + +cl_partner_hw::cl_partner_hw(class cl_uc *auc, enum hw_cath cath, int aid): + cl_base() +{ + uc= auc; + cathegory= cath; + id= aid; + partner= uc->get_hw(cathegory, id, 0); +} + +class cl_hw * +cl_partner_hw::get_partner(void) +{ + return(partner); +} + +void +cl_partner_hw::refresh(void) +{ + class cl_hw *hw= uc->get_hw(cathegory, id, 0); + + if (!hw) + return; + if (partner) + { + // partner is already set + if (partner != hw) + { + // partner changed? + partner= hw; + } + else + partner= hw; + } + partner= hw; +} + +void +cl_partner_hw::refresh(class cl_hw *new_hw) +{ + if (!new_hw) + return; + if (cathegory == new_hw->cathegory && + id == new_hw->id) + { + if (partner) + { + // partner changed? + partner= new_hw; + } + else + partner= new_hw; + } +} + +void +cl_partner_hw::happen(class cl_hw *where, enum hw_event he, void *params) +{ + if (partner) + partner->happen(where, he, params); +} + + +/* End of hw.cc */ diff --git a/sim/ucsim/sim.src/hwcl.h b/sim/ucsim/sim.src/hwcl.h new file mode 100644 index 0000000..70917db --- /dev/null +++ b/sim/ucsim/sim.src/hwcl.h @@ -0,0 +1,166 @@ +/* + * Simulator of microcontrollers (sim.src/hwcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +/* Abstract hw element. It can be a timer, serial line or whatever */ + +#ifndef SIM_HWCL_HEADER +#define SIM_HWCL_HEADER + +#include "stypes.h" +#include "pobjcl.h" +#include "guiobjcl.h" + +// cmd.src +#include "newcmdcl.h" + +// local +#include "memcl.h" +#include "uccl.h" + + +enum what_to_do_on_cell_change { + wtd_none = 0x01, + wtd_write = 0x02, + wtd_restore = 0x04, + wtd_restore_write = 0x08 +}; + +#define WTD_WRITE (wtd_write|wtd_restore_write) +#define WTD_RESTORE (wtd_restore|wtd_restore_write) + +class cl_hw; // forward + +class cl_watched_cell: public cl_base +{ +protected: + class cl_address_space *mem; + t_addr addr; + class cl_memory_cell *cell; + class cl_memory_cell **store; +public: + enum what_to_do_on_cell_change wtd; +public: + cl_watched_cell(class cl_address_space *amem, t_addr aaddr, + class cl_memory_cell **astore, + enum what_to_do_on_cell_change awtd); + + virtual void mem_cell_changed(class cl_address_space *amem, t_addr aaddr, + class cl_hw *hw); + virtual void address_space_added(class cl_address_space *amem, + class cl_hw *hw); +}; + +class cl_used_cell: public cl_watched_cell +{ +public: + cl_used_cell(class cl_address_space *amem, t_addr aaddr, + class cl_memory_cell **astore, + enum what_to_do_on_cell_change awtd): + cl_watched_cell(amem, aaddr, astore, awtd) {} + + virtual void mem_cell_changed(class cl_address_space *amem, t_addr aaddr, + class cl_hw *hw); + virtual void address_space_added(class cl_address_space *amem, + class cl_hw *hw); +}; + +class cl_hw: public cl_guiobj +{ +public: + int flags; + class cl_uc *uc; + enum hw_cath cathegory; + int id; + char *id_string; +protected: + class cl_list *partners; + class cl_list *watched_cells; +public: + cl_hw(class cl_uc *auc, enum hw_cath cath, int aid, const char *aid_string); + virtual ~cl_hw(void); + + virtual void new_hw_adding(class cl_hw *new_hw); + virtual void new_hw_added(class cl_hw *new_hw); + virtual void added_to_uc(void) {} + virtual class cl_hw *make_partner(enum hw_cath cath, int id); + + virtual t_mem read(class cl_memory_cell *cell) { return(cell->get()); } + virtual void write(class cl_memory_cell * /*cell*/, t_mem * /*val*/) {} + + virtual void set_cmd(class cl_cmdline *cmdline, class cl_console_base *con); + virtual class cl_memory_cell *register_cell(class cl_address_space *mem, + t_addr addr, + class cl_memory_cell **store, + enum what_to_do_on_cell_change + awtd); + virtual class cl_memory_cell *use_cell(class cl_address_space *mem, + t_addr addr, + class cl_memory_cell **store, + enum what_to_do_on_cell_change awtd); + virtual void mem_cell_changed(class cl_address_space *mem, t_addr addr); + virtual void address_space_added(class cl_address_space *as); + + virtual int tick(int cycles); + virtual void reset(void) {} + virtual void happen(class cl_hw * /*where*/, enum hw_event /*he*/, + void * /*params*/) {} + virtual void inform_partners(enum hw_event he, void *params); + + virtual void print_info(class cl_console_base *con); +}; + +class cl_hws: public cl_list +{ +public: + cl_hws(void): cl_list(2, 2, "hws") {} + virtual t_index add(void *item); + virtual void mem_cell_changed(class cl_address_space *mem, t_addr addr); + virtual void address_space_added(class cl_address_space *as); +}; + + +class cl_partner_hw: public cl_base +{ +protected: + class cl_uc *uc; + enum hw_cath cathegory; + int id; + class cl_hw *partner; +public: + cl_partner_hw(class cl_uc *auc, enum hw_cath cath, int aid); + + virtual class cl_hw *get_partner(void); + virtual void refresh(void); + virtual void refresh(class cl_hw *new_hw); + + virtual void happen(class cl_hw *where, enum hw_event he, void *params); +}; + + +#endif + +/* End of hwcl.h */ diff --git a/sim/ucsim/sim.src/itsrc.cc b/sim/ucsim/sim.src/itsrc.cc new file mode 100644 index 0000000..32fc695 --- /dev/null +++ b/sim/ucsim/sim.src/itsrc.cc @@ -0,0 +1,138 @@ +/* + * Simulator of microcontrollers (itsrc.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include +#include "i_string.h" + +#include "itsrccl.h" +#include "pobjcl.h" +#include "stypes.h" + + +/* + * Interrupt source + ****************************************************************************** + */ + +cl_it_src::cl_it_src(uchar Iie_mask, + uchar Isrc_reg, + uchar Isrc_mask, + uint Iaddr, + bool Iclr_bit, + const char *Iname, + int apoll_priority): + cl_base() +{ + poll_priority= apoll_priority; + ie_mask = Iie_mask; + src_reg = Isrc_reg; + src_mask= Isrc_mask; + addr = Iaddr; + clr_bit = Iclr_bit; + if (Iname != NULL) + set_name(Iname); + else + set_name("unknown"); + active= DD_TRUE; +} + +cl_it_src::~cl_it_src(void) {} + +bool +cl_it_src::is_active(void) +{ + return(active); +} + +void +cl_it_src::set_active_status(bool Aactive) +{ + active= Aactive; +} + +void +cl_it_src::activate(void) +{ + set_active_status(DD_TRUE); +} + +void +cl_it_src::deactivate(void) +{ + set_active_status(DD_FALSE); +} + + +/* + */ + +cl_irqs::cl_irqs(t_index alimit, t_index adelta): + cl_sorted_list(alimit, adelta, "irqs") +{ + Duplicates= DD_TRUE; +} + +const void * +cl_irqs::key_of(void *item) +{ + class cl_it_src *itsrc= (class cl_it_src *)item; + return(&itsrc->poll_priority); +} + +int +cl_irqs::compare(const void *key1, const void *key2) +{ + const int k1= *static_cast(key1), k2= *static_cast(key2); + + if (k1 == k2) + return(0); + else if (k1 < k2) + return(-1); + return(1); +} + + +/* + * Interrupt level + ****************************************************************************** + */ + +it_level::it_level(int alevel, uint aaddr, uint aPC, class cl_it_src *is): + cl_base() +{ + level = alevel; + addr = aaddr; + PC = aPC; + source= is; +} + + + +/* End of itsrc.cc */ diff --git a/sim/ucsim/sim.src/itsrccl.h b/sim/ucsim/sim.src/itsrccl.h new file mode 100644 index 0000000..673a96e --- /dev/null +++ b/sim/ucsim/sim.src/itsrccl.h @@ -0,0 +1,95 @@ +/* + * Simulator of microcontrollers (sim.src/itsrccl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef SIM_ITSRCCL_HEADER +#define SIM_ITSRCCL_HEADER + +#include "pobjcl.h" +#include "stypes.h" + + +/* + * Represents source of interrupt + */ + +class cl_it_src: public cl_base +{ +public: + int poll_priority; + uchar ie_mask; // Mask in IE register + uchar src_reg; // Register in SFR of source + uchar src_mask; // Mask of source bit in src_reg + uint addr; // Address of service routine + bool clr_bit; // Request bit must be cleared when IT accepted + //char *name; // For debug + bool active; // Acceptance can be disabled + + cl_it_src(uchar Iie_mask, + uchar Isrc_reg, + uchar Isrc_mask, + uint Iaddr, + bool Iclr_bit, + const char *Iname, + int apoll_priority); + virtual ~cl_it_src(void); + + bool is_active(void); + virtual void set_active_status(bool Aactive); + virtual void activate(void); + virtual void deactivate(void); +}; + + +class cl_irqs: public cl_sorted_list +{ +public: + cl_irqs(t_index alimit, t_index adelta); + virtual const void *key_of(void *item); + virtual int compare(const void *key1, const void *key2); +}; + + +/* + * This class is used to follow levels of accepted interrupts + * It used on a stack of active interrupt services (it_levels of cl_uc) + */ + +class it_level: public cl_base +{ +public: + int level; + uint addr; + uint PC; + class cl_it_src *source; +public: + it_level(int alevel, uint aaddr, uint aPC, class cl_it_src *is); +}; + + +#endif + +/* End of itsrccl.h */ diff --git a/sim/ucsim/sim.src/mem.cc b/sim/ucsim/sim.src/mem.cc new file mode 100644 index 0000000..a3508cf --- /dev/null +++ b/sim/ucsim/sim.src/mem.cc @@ -0,0 +1,1394 @@ +/* + * Simulator of microcontrollers (mem.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* + This file is part of microcontroller simulator: ucsim. + + UCSIM is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + UCSIM is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with UCSIM; see the file COPYING. If not, write to the Free + Software Foundation, 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. +*/ +/*@1@*/ + +#include +#include +#include +#include "i_string.h" + +// prj +#include "utils.h" +#include "globals.h" + +// sim +#include "simcl.h" + +// cmd +#include "newcmdcl.h" +#include "cmdutil.h" + +// local +#include "memcl.h" +#include "hwcl.h" + + +static class cl_mem_error_registry mem_error_registry; + +/* + * 3rd version of memory system + */ + +cl_memory::cl_memory(const char *id, t_addr asize, int awidth): + cl_base() +{ + size= asize; + set_name(id); + addr_format= data_format= 0; + width= awidth; + start_address= 0; + uc= 0; +} + +cl_memory::~cl_memory(void) +{ + if (addr_format) + free(addr_format); + if (data_format) + free(data_format); +} + +int +cl_memory::init(void) +{ + addr_format= (char *)malloc(10); + sprintf(addr_format, "0x%%0%dx", + size-1<=0xf?1: + (size-1<=0xff?2: + (size-1<=0xfff?3: + (size-1<=0xffff?4: + (size-1<=0xfffff?5: + (size-1<=0xffffff?6:12)))))); + data_format= (char *)malloc(10); + sprintf(data_format, "%%0%dx", width/4+((width%4)?1:0)); + data_mask= 1; + int w= width; + for (--w; w; w--) + { + data_mask<<= 1; + data_mask|= 1; + } + dump_finished= start_address; + return(0); +} + + +bool +cl_memory::valid_address(t_addr addr) +{ + return(addr >= start_address && + addr < start_address+size); +} + +t_addr +cl_memory::inc_address(t_addr addr, int val) +{ + if (!start_address) + return(((signed)addr+val)%size); + addr-= start_address; + addr+= val; + addr%= size; + addr+= start_address; + return(addr); +} + +t_addr +cl_memory::inc_address(t_addr addr) +{ + if (!start_address) + return(((signed)addr+1)%size); + addr-= start_address; + addr++; + addr%= size; + addr+= start_address; + return(addr); +} + +t_addr +cl_memory::validate_address(t_addr addr) +{ + while (addr < start_address) + addr+= size; + if (addr > start_address+size) + { + addr-= start_address; + addr%= size; + addr+= start_address; + } + return(addr); +} + + +void +cl_memory::err_inv_addr(t_addr addr) +{ + if (!uc) + return; + class cl_error *e= new cl_error_mem_invalid_address(this, addr); + uc->error(e); +} + +void +cl_memory::err_non_decoded(t_addr addr) +{ + if (!uc) + return; + class cl_error *e= new cl_error_mem_non_decoded(this, addr); + uc->error(e); +} + + +t_addr +cl_memory::dump(t_addr start, t_addr stop, int bpl, class cl_console_base *con) +{ + int i; + t_addr lva= lowest_valid_address(); + t_addr hva= highest_valid_address(); + + if (start < lva) + start= lva; + if (stop > hva) + stop= hva; + while ((start <= stop) && + (start <= hva)) + { + con->dd_printf(addr_format, start); con->dd_printf(" "); + for (i= 0; + (i < bpl) && + (start+i <= hva) && + (start+i <= stop); + i++) + { + con->dd_printf(data_format, /*read*/get(start+i)); con->dd_printf(" "); + } + while (i < bpl) + { + int j; + j= width/4 + ((width%4)?1:0) + 1; + while (j) + { + con->dd_printf(" "); + j--; + } + i++; + } + for (i= 0; (i < bpl) && + (start+i <= hva) && + (start+i <= stop); + i++) + { + long c= read(start+i); + con->dd_printf("%c", isprint(255&c)?(255&c):'.'); + if (width > 8) + con->dd_printf("%c", isprint(255&(c>>8))?(255&(c>>8)):'.'); + if (width > 16) + con->dd_printf("%c", isprint(255&(c>>16))?(255&(c>>16)):'.'); + if (width > 24) + con->dd_printf("%c", isprint(255&(c>>24))?(255&(c>>24)):'.'); + } + con->dd_printf("\n"); + dump_finished= start+i; + start+= bpl; + } + return(dump_finished); +} + +t_addr +cl_memory::dump(class cl_console_base *con) +{ + return(dump(dump_finished, dump_finished+10*8-1, 8, con)); +} + +bool +cl_memory::search_next(bool case_sensitive, + t_mem *array, int len, t_addr *addr) +{ + t_addr a; + int i; + bool found; + + if (addr == NULL) + a= 0; + else + a= *addr; + + if (a+len > size) + return(DD_FALSE); + + found= DD_FALSE; + while (!found && + a+len <= size) + { + bool match= DD_TRUE; + for (i= 0; i < len && match; i++) + { + t_mem d1, d2; + d1= get(a+i); + d2= array[i]; + if (!case_sensitive) + { + if (/*d1 < 128*/isalpha(d1)) + d1= toupper(d1); + if (/*d2 < 128*/isalpha(d2)) + d2= toupper(d2); + } + match= d1 == d2; + } + found= match; + if (!found) + a++; + } + + if (addr) + *addr= a; + return(found); +} + + +/* + * Memory operators + */ + +cl_memory_operator::cl_memory_operator(class cl_memory_cell *acell, + t_addr addr): + cl_base() +{ + cell= acell; + data= 0; + mask= ~0; + next_operator= 0; + address= addr; +} + +cl_memory_operator::cl_memory_operator(class cl_memory_cell *acell, + t_addr addr, + t_mem *data_place, t_mem the_mask): + cl_base() +{ + cell= acell; + data= data_place; + mask= the_mask; + next_operator= 0; + address= addr; +} + +void +cl_memory_operator::set_data(t_mem *data_place, t_mem the_mask) +{ + data= data_place; + mask= the_mask; +} + + +t_mem +cl_memory_operator::read(void) +{ + if (next_operator) + return(next_operator->read()); + else + return(*data); +} + +t_mem +cl_memory_operator::write(t_mem val) +{ + if (next_operator) + return(next_operator->write(val)); + else + return(*data= (val & mask)); +} + + +/* Memory operator for hw callbacks */ + +cl_hw_operator::cl_hw_operator(class cl_memory_cell *acell, t_addr addr, + t_mem *data_place, t_mem the_mask, + class cl_hw *ahw): + cl_memory_operator(acell, addr, data_place, the_mask) +{ + hw= ahw; +} + + +t_mem +cl_hw_operator::read(void) +{ + t_mem d= 0; + + if (hw) + d= hw->read(cell); + + if (next_operator) + next_operator->read(); + + return(d); +} + +t_mem +cl_hw_operator::read(enum hw_cath skip) +{ + t_mem d= *data; + + if (hw && + hw->cathegory != skip) + d= hw->read(cell); + + if (next_operator) + next_operator->read(); + + return(d); +} + +t_mem +cl_hw_operator::write(t_mem val) +{ + if (hw) + hw->write(cell, &val); + if (next_operator) + val= next_operator->write(val); + return(*data= (val & mask)); +} + + +/* Write event break on cell */ + +cl_write_operator::cl_write_operator(class cl_memory_cell *acell, t_addr addr, + t_mem *data_place, t_mem the_mask, + class cl_uc *auc, class cl_brk *the_bp): + cl_event_break_operator(acell, addr, data_place, the_mask, auc, the_bp) +{ + uc= auc; + bp= the_bp; +} + +t_mem +cl_write_operator::write(t_mem val) +{ + //printf("write event at 0x%x bp=%p\n",address,bp); + uc->events->add(bp); + if (next_operator) + return(next_operator->write(val)); + else + return(*data= (val & mask)); +} + + +/* Read event break on cell */ + +cl_read_operator::cl_read_operator(class cl_memory_cell *acell, t_addr addr, + t_mem *data_place, t_mem the_mask, + class cl_uc *auc, class cl_brk *the_bp): + cl_event_break_operator(acell, addr, data_place, the_mask, auc, the_bp) +{ + uc= auc; + bp= the_bp; +} + +t_mem +cl_read_operator::read(void) +{ + //printf("read event at 0x%x bp=%p\n",address,bp); + uc->events->add(bp); + if (next_operator) + return(next_operator->read()); + else + return(*data); +} + + +/* + * Memory cell + */ + +cl_memory_cell::cl_memory_cell(void): + cl_base() +{ + data= (t_mem *)malloc(sizeof(t_mem)); + flags= CELL_NON_DECODED; + width= 8; + *data= 0; + operators= NULL; + +#ifdef STATISTIC + nuof_writes= nuof_reads= 0; +#endif + + mask= 1; + int w= width; + for (--w; w; w--) + { + mask<<= 1; + mask|= 1; + } +} + +cl_memory_cell::~cl_memory_cell(void) +{ + if ((flags & CELL_NON_DECODED) && + data) + free(data); +} + +int +cl_memory_cell::init(void) +{ + cl_base::init(); + set(0/*rand()*/); + return(0); +} + + +TYPE_UBYTE +cl_memory_cell::get_flags(void) +{ + return(flags); +} + +bool +cl_memory_cell::get_flag(enum cell_flag flag) +{ + return(flags & flag); +} + +void +cl_memory_cell::set_flags(TYPE_UBYTE what) +{ + flags= what; +} + +void +cl_memory_cell::set_flag(enum cell_flag flag, bool val) +{ + if (val) + flags|= flag; + else + flags&= ~(flag); +} + + +void +cl_memory_cell::un_decode(void) +{ + if ((flags & CELL_NON_DECODED) == 0) + { + data= (t_mem *)malloc(sizeof(t_mem)); + flags|= CELL_NON_DECODED; + } +} + +void +cl_memory_cell::decode(class cl_memory_chip *chip, t_addr addr) +{ + if (flags & CELL_NON_DECODED) + free(data); + data= chip->get_slot(addr); + if (!data) + { + data= (t_mem *)malloc(sizeof(t_mem)); + flags|= CELL_NON_DECODED; + } + else + flags&= ~(CELL_NON_DECODED); +} + + +t_mem +cl_memory_cell::read(void) +{ +#ifdef STATISTIC + nuof_reads++; +#endif + if (operators) + return(operators->read()); + return(*data); +} + +t_mem +cl_memory_cell::read(enum hw_cath skip) +{ +#ifdef STATISTIC + nuof_reads++; +#endif + if (operators) + return(operators->read(skip)); + return(*data); +} + +t_mem +cl_memory_cell::get(void) +{ + return(*data); +} + +t_mem +cl_memory_cell::write(t_mem val) +{ +#ifdef STATISTIC + nuof_writes++; +#endif + if (operators) + return(operators->write(val)); + *data= val & mask; + return(*data); +} + +t_mem +cl_memory_cell::set(t_mem val) +{ + *data= val & mask; + return(*data); +} + + + +t_mem +cl_memory_cell::add(long what) +{ + *data= (*data + what) & mask; + return(*data); +} + +t_mem +cl_memory_cell::wadd(long what) +{ + t_mem d= (*data + what) & mask; + return(write(d)); +} + +void +cl_memory_cell::set_bit1(t_mem bits) +{ + bits&= mask; + (*data)|= bits; +} + +void +cl_memory_cell::set_bit0(t_mem bits) +{ + bits&= mask; + (*data)&= ~bits; +} + + +void +cl_memory_cell::append_operator(class cl_memory_operator *op) +{ + if (!operators) + operators= op; + else + { + class cl_memory_operator *o= operators, *n; + n= o->get_next(); + while (n) + { + o= n; + n= o->get_next(); + } + o->set_next(op); + } +} + +void +cl_memory_cell::prepend_operator(class cl_memory_operator *op) +{ + if (op) + { + op->set_next(operators); + operators= op; + } +} + +void +cl_memory_cell::del_operator(class cl_brk *brk) +{ + if (!operators) + return; + class cl_memory_operator *op= operators; + if (operators->match(brk)) + { + operators= op->get_next(); + delete op; + } + else + { + while (op->get_next() && + !op->get_next()->match(brk)) + op= op->get_next(); + if (op->get_next()) + { + class cl_memory_operator *m= op->get_next(); + op->set_next(m->get_next());; + delete m; + } + } +} + + +class cl_memory_cell * +cl_memory_cell::add_hw(class cl_hw *hw, int *ith, t_addr addr) +{ + class cl_hw_operator *o= new cl_hw_operator(this, addr, data, mask, hw); + append_operator(o); + return(this); +} + +/*class cl_hw * +cl_memory_cell::get_hw(int ith) +{ + return(0); +}*/ + +class cl_event_handler * +cl_memory_cell::get_event_handler(void) +{ + return(0); +} + + +/* + * Dummy cell for non-existent addresses + */ + +t_mem +cl_dummy_cell::write(t_mem val) +{ +#ifdef STATISTIC + nuof_writes++; +#endif + *data= rand() & mask; + return(*data); +} + +t_mem +cl_dummy_cell::set(t_mem val) +{ + *data= rand() & mask; + return(*data); +} + + +/* + * Address space + */ + +cl_address_space::cl_address_space(const char *id, + t_addr astart, t_addr asize, int awidth): + cl_memory(id, asize, awidth) +{ + start_address= astart; + decoders= new cl_decoder_list(2, 2, DD_FALSE); + cells= (class cl_memory_cell **)calloc(size, sizeof(class cl_memory_cell*)); + + dummy= new cl_dummy_cell(); +} + +cl_address_space::~cl_address_space(void) +{ + delete decoders; + int i; + for (i= 0; i < size; i++) + if (cells[i]) + delete cells[i]; + delete dummy; +} + + +t_mem +cl_address_space::read(t_addr addr) +{ + return get_cell(addr)->read(); +} + +t_mem +cl_address_space::read(t_addr addr, enum hw_cath skip) +{ + cl_memory_cell *cell = get_cell(addr); + if (cell == dummy) + { + return dummy->read(); + } + return cell->read(skip); +} + +t_mem +cl_address_space::get(t_addr addr) +{ + return get_cell(addr)->get(); +} + +t_mem +cl_address_space::write(t_addr addr, t_mem val) +{ + return get_cell(addr)->write(val); +} + +void +cl_address_space::set(t_addr addr, t_mem val) +{ + get_cell(addr)->set(val); +} + +t_mem +cl_address_space::wadd(t_addr addr, long what) +{ + return get_cell(addr)->wadd(what); +} + +/* Set or clear bits, without callbacks */ + +void +cl_address_space::set_bit1(t_addr addr, t_mem bits) +{ + cl_memory_cell *cell = get_cell(addr); + if (cell == dummy) + { + return; + } + cell->set_bit1(bits); +} + +void +cl_address_space::set_bit0(t_addr addr, t_mem bits) +{ + cl_memory_cell *cell = get_cell(addr); + if (cell == dummy) + { + return; + } + cell->set_bit0(bits); +} + +class cl_address_decoder * +cl_address_space::get_decoder(t_addr addr) +{ + int i; + for (i= 0; i < decoders->count; i++) + { + class cl_address_decoder *d= + dynamic_cast(decoders->object_at(i)); + if (!d) + continue; + if (d->covers(addr, addr)) + { + return d; + } + } + return NULL; +} + +class cl_memory_cell * +cl_address_space::get_cell(t_addr addr) +{ + t_addr idx= addr-start_address; + if (idx >= size || + addr < start_address) + { + err_inv_addr(addr); + return(dummy); + } + if (cells[idx] == NULL) + { + cells[idx]= new cl_memory_cell(); + cells[idx]->init(); + class cl_address_decoder *decoder; + decoder = get_decoder(addr); + if (decoder && decoder->activated) + { + decode_cell(addr, decoder->memchip, + addr - decoder->as_begin + decoder->chip_begin); + } + } + return(cells[idx]); +} + + +int +cl_address_space::get_cell_flag(t_addr addr) +{ + return get_cell(addr)->get_flags(); +} + +bool +cl_address_space::get_cell_flag(t_addr addr, enum cell_flag flag) +{ + return get_cell(addr)->get_flag(flag); +} + +void +cl_address_space::set_cell_flag(t_addr addr, bool set_to, enum cell_flag flag) +{ + get_cell(addr)->set_flag(flag, set_to); +} + + +bool +cl_address_space::decode_cell(t_addr addr, + class cl_memory_chip *chip, t_addr chipaddr) +{ + cl_memory_cell *cell = get_cell(addr); + if (cell == dummy) + { + return(DD_FALSE); + } + + if (!cell->get_flag(CELL_NON_DECODED)) + { + // un-decode first! + cell->un_decode(); + } + cell->decode(chip, chipaddr); + + return(!cell->get_flag(CELL_NON_DECODED)); +} + +void +cl_address_space::undecode_cell(t_addr addr) +{ + t_addr idx= addr-start_address; + if (idx >= size || + addr < start_address) + { + err_inv_addr(addr); + return; + } + if (cells[idx] == NULL) + { + return; + } + cells[idx]->un_decode(); +} + +void +cl_address_space::undecode_area(class cl_address_decoder *skip, + t_addr begin, t_addr end,class cl_console_base *con) +{ +#define D if (con) con->debug + D("Undecoding area 0x%x-0x%x of %s\n", begin, end, get_name()); + int i; + for (i= 0; i < decoders->count; i++) + { + class cl_address_decoder *d= + dynamic_cast(decoders->object_at(i)); + if (!d || + d == skip) + continue; + D(" Checking decoder 0x%x-0x%x -> %s[0x%x]\n", + d->as_begin, d->as_end, d->memchip->get_name(), d->chip_begin); + if (d->fully_covered_by(begin, end)) + { + // decoder can be removed + D(" Can be removed\n"); + decoders->disconn(d); + i--; + delete d; + if (decoders->count == 0) + break; + } + else if (d->covers(begin, end)) + { + // decoder must be split + D(" Must be split\n"); + class cl_address_decoder *nd= d->split(begin, end); + D(" After split:\n"); + D(" 0x%x-0x%x -> %s[0x%x]\n", + d->as_begin, d->as_end, d->memchip->get_name(), d->chip_begin); + if (nd) + { + decoders->add(nd); + D(" 0x%x-0x%x -> %s[0x%x]\n", + nd->as_begin, nd->as_end, nd->memchip->get_name(), nd->chip_begin); + nd->activate(con); + } + } + else if (d->is_in(begin, end)) + { + // decoder sould shrink + D(" Sould shrink\n"); + if (d->shrink_out_of(begin, end)) + { + D(" Can be removed after shrink\n"); + decoders->disconn(d); + i--; + delete d; + if (decoders->count == 0) + break; + } + else + { + D(" Shrinked to 0x%x-0x%x -> %s[0x%x]\n", + d->as_begin, d->as_end, d->memchip->get_name(), d->chip_begin); + } + } + } +#undef D +} + + +class cl_memory_cell * +cl_address_space::register_hw(t_addr addr, class cl_hw *hw, + int *ith, + bool announce) +{ + cl_memory_cell *cell = get_cell(addr); + if (cell == dummy) + { + return(NULL); + } + cell->add_hw(hw, ith, addr); + //printf("adding hw %s to cell 0x%x(%d) of %s\n", hw->id_string, addr, idx, get_name("as")); + if (announce) + ;//uc->sim->/*app->*/mem_cell_changed(this, addr);//FIXME + return(cell); +} + + +void +cl_address_space::set_brk(t_addr addr, class cl_brk *brk) +{ + cl_memory_cell *cell = get_cell(addr); + if (cell == dummy) + { + return; + } + + class cl_memory_operator *op; + + switch (brk->get_event()) + { + case brkWRITE: case brkWXRAM: case brkWIRAM: case brkWSFR: + //e= 'W'; + op= new cl_write_operator(cell, addr, cell->get_data(), cell->get_mask(), + uc, brk); + break; + case brkREAD: case brkRXRAM: case brkRCODE: case brkRIRAM: case brkRSFR: + //e= 'R'; + op= new cl_read_operator(cell, addr, cell->get_data(), cell->get_mask(), + uc, brk); + break; + case brkNONE: + set_cell_flag(addr, DD_TRUE, CELL_FETCH_BRK); + return; + break; + default: + //e= '.'; + op= 0; + break; + } + if (op) + cell->append_operator(op); +} + +void +cl_address_space::del_brk(t_addr addr, class cl_brk *brk) +{ + cl_memory_cell *cell = get_cell(addr); + if (cell == dummy) + { + return; + } + + switch (brk->get_event()) + { + case brkWRITE: case brkWXRAM: case brkWIRAM: case brkWSFR: + case brkREAD: case brkRXRAM: case brkRCODE: case brkRIRAM: case brkRSFR: + cell->del_operator(brk); + break; + case brkNONE: + set_cell_flag(addr, DD_FALSE, CELL_FETCH_BRK); + return; + break; + default: + break; + } +} + + +/* + * List of address spaces + */ + +cl_address_space_list::cl_address_space_list(class cl_uc *the_uc): + cl_list(2, 2, "address spaces") +{ + uc= the_uc; +} + +t_index +cl_address_space_list::add(class cl_address_space *mem) +{ + mem->set_uc(uc); + t_index ret= cl_list::add(mem); + if (uc) + { + class cl_event_address_space_added e(mem); + uc->handle_event(e); + } + return(ret); +} + + +/* + * Memory chip + */ + +cl_memory_chip::cl_memory_chip(const char *id, int asize, int awidth, int initial): + cl_memory(id, asize, awidth) +{ + array= (t_mem *)malloc(size * sizeof(t_mem)); + init_value= initial; +} + +cl_memory_chip::~cl_memory_chip(void) +{ + if (array) + free(array); +} + +int +cl_memory_chip::init(void) +{ + cl_memory::init(); + int i; + for (i= 0; i < size; i++) + set(i, + (init_value<0)?rand():(init_value)); + return(0); +} + + +t_mem * +cl_memory_chip::get_slot(t_addr addr) +{ + if (!array || + size <= addr) + return(0); + return(&array[addr]); +} + + +t_mem +cl_memory_chip::get(t_addr addr) +{ + if (!array || + size <= addr) + return(0); + return(array[addr]); +} + +void +cl_memory_chip::set(t_addr addr, t_mem val) +{ + if (!array || + size <= addr) + return; + array[addr]= val & data_mask; +} + +void +cl_memory_chip::set_bit1(t_addr addr, t_mem bits) +{ + if (!array || + size <= addr) + return; + array[addr]|= (bits & data_mask); +} + +void +cl_memory_chip::set_bit0(t_addr addr, t_mem bits) +{ + if (!array || + size <= addr) + return; + array[addr]&= ((~bits) & data_mask); +} + + +/* + * Address decoder + */ + +cl_address_decoder::cl_address_decoder(class cl_memory *as, + class cl_memory *chip, + t_addr asb, t_addr ase, t_addr cb) +{ + if (as->is_address_space()) + address_space= (class cl_address_space *)as; + else + address_space= 0; + if (chip->is_chip()) + memchip= (class cl_memory_chip *)chip; + else + memchip= 0; + as_begin= asb; + as_end= ase; + chip_begin= cb; + activated= DD_FALSE; +} + +cl_address_decoder::~cl_address_decoder(void) +{ + t_addr a; + if (address_space) + for (a= as_begin; a <= as_end; a++) + address_space->undecode_cell(a); +} + +int +cl_address_decoder::init(void) +{ + return(0); +} + + +bool +cl_address_decoder::activate(class cl_console_base *con) +{ +#define D if (con) con->debug + D("Activation of an address decoder\n"); + if (activated) + { + D("Already activated\n"); + return(DD_FALSE); + } + if (!address_space || + !address_space->is_address_space()) + { + D("No or non address space\n"); + return(DD_FALSE); + } + if (!memchip || + !memchip->is_chip()) + { + D("No or non memory chip\n"); + return(DD_FALSE); + } + if (as_begin > as_end) + { + D("Wrong address area specification\n"); + return(DD_FALSE); + } + if (chip_begin >= memchip->get_size()) + { + D("Wrong chip area specification\n"); + return(DD_FALSE); + } + if (as_begin < address_space->start_address || + as_end >= address_space->start_address + address_space->get_size()) + { + D("Specified area is out of address space\n"); + return(DD_FALSE); + } + if (as_end-as_begin > memchip->get_size()-chip_begin) + { + D("Specified area is out of chip size\n"); + return(DD_FALSE); + } + + address_space->undecode_area(this, as_begin, as_end, con); + + activated= DD_TRUE; + +#undef D + return(activated); +} + + +bool +cl_address_decoder::fully_covered_by(t_addr begin, t_addr end) +{ + if (begin <= as_begin && + end >= as_end) + return(DD_TRUE); + return(DD_FALSE); +} + +bool +cl_address_decoder::is_in(t_addr begin, t_addr end) +{ + if (begin >= as_begin && + begin <= as_end) + return(DD_TRUE); + if (end >= as_begin && + end <= as_end) + return(DD_TRUE); + return(DD_FALSE); +} + +bool +cl_address_decoder::covers(t_addr begin, t_addr end) +{ + if (begin > as_begin && + end < as_end) + return(DD_TRUE); + return(DD_FALSE); +} + + +/* Returns TRUE if shrunken decoder is unnecessary */ + +bool +cl_address_decoder::shrink_out_of(t_addr begin, t_addr end) +{ + t_addr a= as_begin; + + if (!address_space) + return(DD_TRUE); + if (begin > a) + a= begin; + while (a <= end && + a <= as_end) + { + address_space->undecode_cell(a); + a++; + } + if (begin > as_begin) + as_end= begin-1; + if (as_end > end) + { + chip_begin+= (end-as_begin+1); + as_begin= end+1; + } + if (as_end < as_begin) + return(DD_TRUE); + return(DD_FALSE); +} + +class cl_address_decoder * +cl_address_decoder::split(t_addr begin, t_addr end) +{ + class cl_address_decoder *nd= 0; + if (begin > as_begin) + { + if (as_end > end) + nd= new cl_address_decoder(address_space, memchip, + end+1, as_end, chip_begin+(end-as_begin)+1); + shrink_out_of(begin, as_end); + } + else if (end < as_end) + { + if (as_begin < begin) + nd= new cl_address_decoder(address_space, memchip, + as_begin, begin-1, chip_begin); + shrink_out_of(end+1, as_end); + } + if (nd) + nd->init(); + return(nd); +} + + +/* + * List of address decoders + */ + +cl_decoder_list::cl_decoder_list(t_index alimit, t_index adelta, bool bychip): + cl_sorted_list(alimit, adelta, "decoder list") +{ + Duplicates= DD_TRUE; + by_chip= bychip; +} + +const void * +cl_decoder_list::key_of(void *item) +{ + class cl_address_decoder *d= (class cl_address_decoder *)item; + if (by_chip) + return(&(d->chip_begin)); + else + return(&(d->as_begin)); +} + +int +cl_decoder_list::compare(const void *key1, const void *key2) +{ + const t_addr k1= *(static_cast(key1)), k2= *(static_cast(key2)); + if (k1 == k2) + return(0); + else if (k1 > k2) + return(1); + return(-1); +} + + +/* + * Errors in memory handling + */ + +/* All of memory errors */ + +cl_error_mem::cl_error_mem(class cl_memory *amem, t_addr aaddr) +{ + mem= amem; + addr= aaddr; + classification= mem_error_registry.find("memory"); +} + +/* Invalid address in memory access */ + +cl_error_mem_invalid_address:: +cl_error_mem_invalid_address(class cl_memory *amem, t_addr aaddr): + cl_error_mem(amem, aaddr) +{ + classification= mem_error_registry.find("invalid_address"); +} + +void +cl_error_mem_invalid_address::print(class cl_commander_base *c) +{ + c->dd_printf("%s: invalid address ", get_type_name()); + c->dd_printf(mem->addr_format, addr); + c->dd_printf(" in memory %s.\n", mem->get_name()); +} + +/* Non-decoded address space access */ + +cl_error_mem_non_decoded:: +cl_error_mem_non_decoded(class cl_memory *amem, t_addr aaddr): + cl_error_mem(amem, aaddr) +{ + classification= mem_error_registry.find("non_decoded"); +} + +void +cl_error_mem_non_decoded::print(class cl_commander_base *c) +{ + c->dd_printf("%s: access of non-decoded address ", get_type_name()); + c->dd_printf(mem->addr_format, addr); + c->dd_printf(" in memory %s.\n", mem->get_name()); +} + +cl_mem_error_registry::cl_mem_error_registry(void) +{ + class cl_error_class *prev = mem_error_registry.find("non-classified"); + prev = register_error(new cl_error_class(err_error, "memory", prev, ERROR_OFF)); + prev = register_error(new cl_error_class(err_error, "invalid_address", prev)); + prev = register_error(new cl_error_class(err_error, "non_decoded", prev)); +} + + +/* End of mem.cc */ diff --git a/sim/ucsim/sim.src/memcl.h b/sim/ucsim/sim.src/memcl.h new file mode 100644 index 0000000..9ebf3c1 --- /dev/null +++ b/sim/ucsim/sim.src/memcl.h @@ -0,0 +1,459 @@ +/* + * Simulator of microcontrollers (sim.src/memcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef SIM_MEMCL_HEADER +#define SIM_MEMCL_HEADER + +#include "ddconfig.h" + +// prj +#include "stypes.h" +#include "pobjcl.h" + +// gui.src +#include "guiobjcl.h" + + +class cl_event_handler; + + +// Cell types +#define CELL_NORMAL 0x00 /* Nothing special */ +#define CELL_HW_READ 0x01 /* Hw handles read */ +#define CELL_HW_WRITE 0x02 /* Hw catches write */ +//#define CELL_INST 0x04 /* Marked as instruction */ +//#define CELL_FETCH_BRK 0x08 /* Fetch breakpoint */ +#define CELL_READ_BRK 0x10 /* Read event breakpoint */ +#define CELL_WRITE_BRK 0x20 /* Write event breakpoint */ + +// Cell flags +enum cell_flag { + CELL_NONE = 0x00, + CELL_INST = 0x04, /* Marked as instruction */ + CELL_FETCH_BRK = 0x08, /* Fetch breakpoint */ + CELL_NON_DECODED = 0x40 /* Cell is not decoded (yet) */ +}; + +#define CELL_GENERAL (CELL_NORMAL|CELL_INST|CELL_FETCH_BRK) + + +/* + * 3rd version of memory system + */ + +class cl_memory: public cl_base +{ +public: + t_addr start_address; +protected: + class cl_uc *uc; + t_addr size; +public: + char *addr_format, *data_format; + int width; // in bits + t_mem data_mask; + + //char *class_name; // used by cl_m!! +protected: + t_addr dump_finished; +public: + cl_memory(const char *id, t_addr asize, int awidth); + virtual ~cl_memory(void); + virtual int init(void); + + t_addr get_start_address(void) { return(start_address); } + t_addr get_size(void) { return(size); } + virtual void set_uc(class cl_uc *auc) { uc= auc; } + virtual bool valid_address(t_addr addr); + virtual t_addr inc_address(t_addr addr, int val); + virtual t_addr inc_address(t_addr addr); + virtual t_addr validate_address(t_addr addr); + + virtual bool is_chip(void) { return(DD_FALSE); } + virtual bool is_address_space(void) { return(DD_FALSE); } + + virtual void err_inv_addr(t_addr addr); + virtual void err_non_decoded(t_addr addr); + + virtual t_addr dump(t_addr start, t_addr stop, int bpl, + class cl_console_base *con); + virtual t_addr dump(class cl_console_base *con); + virtual bool search_next(bool case_sensitive, + t_mem *array, int len, t_addr *addr); + + + virtual t_addr lowest_valid_address(void) { return(start_address); } + virtual t_addr highest_valid_address(void) { return(start_address+size-1); } + + + virtual t_mem read(t_addr addr)=0; + virtual t_mem read(t_addr addr, enum hw_cath skip)=0; + virtual t_mem get(t_addr addr)=0; + virtual t_mem write(t_addr addr, t_mem val)=0; + virtual void set(t_addr addr, t_mem val)=0; + virtual void set_bit1(t_addr addr, t_mem bits)=0; + virtual void set_bit0(t_addr addr, t_mem bits)=0; +}; + + +/* + * Operators for memory cells + */ + +class cl_memory_operator: public cl_base +{ +protected: + t_addr address; + t_mem *data; + t_mem mask; + class cl_memory_operator *next_operator; + class cl_memory_cell *cell; +public: + cl_memory_operator(class cl_memory_cell *acell, t_addr addr); + cl_memory_operator(class cl_memory_cell *acell, t_addr addr, + t_mem *data_place, t_mem the_mask); + + virtual void set_data(t_mem *data_place, t_mem the_mask); + virtual class cl_memory_operator *get_next(void) { return(next_operator); } + virtual void set_next(class cl_memory_operator *next) { next_operator= next;} + + virtual bool match(class cl_hw *the_hw) { return(DD_FALSE); } + virtual bool match(class cl_brk *brk) { return(DD_FALSE); } + + virtual t_mem read(void); + virtual t_mem read(enum hw_cath skip) { return(read()); } + virtual t_mem write(t_mem val); +}; + +class cl_hw_operator: public cl_memory_operator +{ +protected: + class cl_hw *hw; +public: + cl_hw_operator(class cl_memory_cell *acell, t_addr addr, + t_mem *data_place, t_mem the_mask, class cl_hw *ahw); + + virtual bool match(class cl_hw *the_hw) { return(hw == the_hw); } + + virtual t_mem read(void); + virtual t_mem read(enum hw_cath skip); + virtual t_mem write(t_mem val); +}; + +class cl_event_break_operator: public cl_memory_operator +{ +protected: + class cl_uc *uc; + class cl_brk *bp; +public: + cl_event_break_operator(class cl_memory_cell *acell, t_addr addr, + t_mem *data_place, t_mem the_mask, + class cl_uc *auc, class cl_brk *the_bp): + cl_memory_operator(acell, addr, data_place, the_mask) + { + uc= auc; + bp= the_bp; + } + + virtual bool match(class cl_brk *brk) { return(bp == brk); } +}; + +class cl_write_operator: public cl_event_break_operator +{ +public: + cl_write_operator(class cl_memory_cell *acell, t_addr addr, + t_mem *data_place, t_mem the_mask, + class cl_uc *auc, class cl_brk *the_bp); + + virtual t_mem write(t_mem val); +}; + +class cl_read_operator: public cl_event_break_operator +{ +public: + cl_read_operator(class cl_memory_cell *acell, t_addr addr, + t_mem *data_place, t_mem the_mask, + class cl_uc *auc, class cl_brk *the_bp); + + virtual t_mem read(void); +}; + + +/* + * version 3 of cell + */ + +class cl_memory_cell: public cl_base +{ +#ifdef STATISTIC +public: + unsigned long nuof_writes, nuof_reads; +#endif +protected: + t_mem *data; + t_mem mask; + uchar width; + TYPE_UBYTE flags; + class cl_memory_operator *operators; +public: + cl_memory_cell(void); + virtual ~cl_memory_cell(void); + virtual int init(void); + + virtual t_mem *get_data(void) { return(data); } + virtual t_mem get_mask(void) { return(mask); } + virtual TYPE_UBYTE get_flags(void); + virtual bool get_flag(enum cell_flag flag); + virtual void set_flags(TYPE_UBYTE what); + virtual void set_flag(enum cell_flag flag, bool val); + + virtual void un_decode(void); + virtual void decode(class cl_memory_chip *chip, t_addr addr); + + virtual t_mem read(void); + virtual t_mem read(enum hw_cath skip); + virtual t_mem get(void); + virtual t_mem write(t_mem val); + virtual t_mem set(t_mem val); + + virtual t_mem add(long what); + virtual t_mem wadd(long what); + + virtual void set_bit1(t_mem bits); + virtual void set_bit0(t_mem bits); + + virtual void append_operator(class cl_memory_operator *op); + virtual void prepend_operator(class cl_memory_operator *op); + virtual void del_operator(class cl_brk *brk); + + virtual class cl_memory_cell *add_hw(class cl_hw *hw, int *ith, t_addr addr); + //virtual class cl_hw *get_hw(int ith); + virtual class cl_event_handler *get_event_handler(void); +}; + +class cl_dummy_cell: public cl_memory_cell +{ +public: + cl_dummy_cell(void): cl_memory_cell() {} + + virtual t_mem write(t_mem val); + virtual t_mem set(t_mem val); +}; + + +/* + * Address space + */ + +class cl_memory_chip; + +class cl_address_space: public cl_memory +{ +protected: + class cl_memory_cell **cells, *dummy; +public: + class cl_decoder_list *decoders; +public: + cl_address_space(const char *id, t_addr astart, t_addr asize, int awidth); + virtual ~cl_address_space(void); + + virtual bool is_address_space(void) { return(DD_TRUE); } + + virtual t_mem read(t_addr addr); + virtual t_mem read(t_addr addr, enum hw_cath skip); + virtual t_mem get(t_addr addr); + virtual t_mem write(t_addr addr, t_mem val); + virtual void set(t_addr addr, t_mem val); + virtual t_mem wadd(t_addr addr, long what); + virtual void set_bit1(t_addr addr, t_mem bits); + virtual void set_bit0(t_addr addr, t_mem bits); + + virtual class cl_address_decoder *get_decoder(t_addr addr); + + virtual class cl_memory_cell *get_cell(t_addr addr); + virtual int get_cell_flag(t_addr addr); + virtual bool get_cell_flag(t_addr addr, enum cell_flag flag); + virtual void set_cell_flag(t_addr addr, bool set_to, enum cell_flag flag); + + virtual bool decode_cell(t_addr addr, + class cl_memory_chip *chip, t_addr chipaddr); + virtual void undecode_cell(t_addr addr); + virtual void undecode_area(class cl_address_decoder *skip, + t_addr begin, t_addr end, class cl_console_base *con); + + virtual class cl_memory_cell *register_hw(t_addr addr, class cl_hw *hw, + int *ith, + bool announce); + + virtual void set_brk(t_addr addr, class cl_brk *brk); + virtual void del_brk(t_addr addr, class cl_brk *brk); + +#ifdef STATISTIC + virtual unsigned long get_nuof_reads(void) { return(0); } + virtual unsigned long get_nuof_writes(void) { return(0); } + virtual void set_nuof_reads(unsigned long value) {} + virtual void set_nuof_writes(unsigned long value) {} +#endif +}; + +class cl_address_space_list: public cl_list +{ +protected: + class cl_uc *uc; +public: + cl_address_space_list(class cl_uc *the_uc); + virtual t_index add(class cl_address_space *mem); +}; + + +/* + * Memory chip (storage) + */ + +class cl_memory_chip: public cl_memory +{ +protected: + t_mem *array; + int init_value; +public: + cl_memory_chip(const char *id, int asize, int awidth, int initial= -1); + virtual ~cl_memory_chip(void); + virtual int init(void); + + virtual bool is_chip(void) { return(DD_TRUE); } + + virtual t_mem *get_slot(t_addr addr); + + virtual t_mem read(t_addr addr) { return(get(addr)); } + virtual t_mem read(t_addr addr, enum hw_cath skip) { return(get(addr)); } + virtual t_mem get(t_addr addr); + virtual t_mem write(t_addr addr, t_mem val) { set(addr, val); return(val); } + virtual void set(t_addr addr, t_mem val); + virtual void set_bit1(t_addr addr, t_mem bits); + virtual void set_bit0(t_addr addr, t_mem bits); +}; + + +/* + * Address decoder + */ + +class cl_address_decoder: public cl_base +{ +public: + class cl_address_space *address_space; + class cl_memory_chip *memchip; + t_addr as_begin, as_end; + t_addr chip_begin; + bool activated; +public: + cl_address_decoder(class cl_memory *as, class cl_memory *chip, + t_addr asb, t_addr ase, t_addr cb); + virtual ~cl_address_decoder(void); + virtual int init(void); + + virtual bool activate(class cl_console_base *con); + + virtual bool fully_covered_by(t_addr begin, t_addr end); + virtual bool is_in(t_addr begin, t_addr end); + virtual bool covers(t_addr begin, t_addr end); + + virtual bool shrink_out_of(t_addr begin, t_addr end); + virtual class cl_address_decoder *split(t_addr begin, t_addr end); +}; + +/* List of address decoders */ + +class cl_decoder_list: public cl_sorted_list +{ +protected: + bool by_chip; +public: + cl_decoder_list(t_index alimit, t_index adelta, bool bychip); + + virtual const void *key_of(void *item); + virtual int compare(const void *key1, const void *key2); +}; + + +/* + * Messages + */ + +#include "eventcl.h" + +class cl_event_address_space_added: public cl_event +{ +public: + class cl_address_space *as; + cl_event_address_space_added(class cl_address_space *the_as): + cl_event(ev_address_space_added) + { as= the_as; } +}; + + +/* + * Errors in memory handling + */ + +#include "errorcl.h" + +class cl_error_mem: public cl_error +{ +protected: + class cl_memory *mem; + t_addr addr; +public: + cl_error_mem(class cl_memory *amem, t_addr aaddr); +}; + +class cl_error_mem_invalid_address: public cl_error_mem +{ +public: + cl_error_mem_invalid_address(class cl_memory *amem, t_addr aaddr); + + virtual void print(class cl_commander_base *c); +}; + +class cl_error_mem_non_decoded: public cl_error_mem +{ +public: + cl_error_mem_non_decoded(class cl_memory *amem, t_addr aaddr); + + virtual void print(class cl_commander_base *c); +}; + +class cl_mem_error_registry: public cl_error_registry +{ +public: + cl_mem_error_registry(void); +}; + +#endif + + +/* End of memcl.h */ diff --git a/sim/ucsim/sim.src/obsolete.cc b/sim/ucsim/sim.src/obsolete.cc new file mode 100644 index 0000000..ef9a2c1 --- /dev/null +++ b/sim/ucsim/sim.src/obsolete.cc @@ -0,0 +1,1359 @@ +/* + * Memory location handled specially by a hw element + */ + +/*cl_memloc::cl_memloc(t_addr addr): + cl_base() +{ + address= addr; + hws= new cl_list(2, 2); + hws->init(); +}*/ + +/*cl_memloc::~cl_memloc(void) +{ + hws->disconn_all(); + delete hws; +}*/ + +/*ulong +cl_memloc::read(class cl_mem *mem) +{ + uchar ret= 0; + class cl_hw *hw; + + if (!hws || + hws->count == 0) + return(ret); + if ((hw= (class cl_hw *)(hws->at(0)))) + ret= hw->read(mem, address); + return(ret); +}*/ + +/*void +cl_memloc::write(class cl_mem *mem, t_addr addr, t_mem *val) +{ + class cl_hw *hw; + int i; + + if (!hws) + return; + for (i= 0; i < hws->count; i++) + { + hw= (class cl_hw *)hws->at(0); + hw->write(mem, addr, val); + } +}*/ + + +/* Sorted collection of memory locations */ + +/*cl_memloc_coll::cl_memloc_coll(void): + cl_sorted_list(2, 2) +{ + Duplicates= DD_FALSE; +}*/ + +/*void * +cl_memloc_coll::key_of(void *item) +{ + return(&(((class cl_memloc *)item)->address)); +}*/ + +/*int +cl_memloc_coll::compare(void *key1, void *key2) +{ + if (*(long*)key1 > *(long*)key2) + return(1); + else + if (*(long*)key1 < *(long*)key2) + return(-1); + else + return(0); +}*/ + +/*class cl_memloc * +cl_memloc_coll::get_loc(t_addr address) +{ + t_index i; + + if (search(&address, i)) + return((class cl_memloc*)(at(i))); + return(0); +}*/ + + +/* + * Memory + ****************************************************************************** + */ + +/* + * Bitmap + */ + +/*cl_bitmap::cl_bitmap(t_addr asize): + cl_base() +{ + map= (uchar*)malloc(size= asize/(8*SIZEOF_CHAR)); + memset(map, 0, size); +} + +cl_bitmap::~cl_bitmap(void) +{ + free(map); +} + +void +cl_bitmap::set(t_addr pos) +{ + int i; + + if ((i= pos/(8*SIZEOF_CHAR)) < size) + map[i]|= (1 << (pos & ((8*SIZEOF_CHAR)-1))); +} + +void +cl_bitmap::clear(t_addr pos) +{ + int i; + + if ((i= pos/(8*SIZEOF_CHAR)) < size) + map[i]&= ~(1 << (pos & ((8*SIZEOF_CHAR)-1))); +} + +bool +cl_bitmap::get(t_addr pos) +{ + return(map[pos/(8*SIZEOF_CHAR)] & (1 << (pos & ((8*SIZEOF_CHAR)-1)))); +} + +bool +cl_bitmap::empty(void) +{ + int i; + + for (i= 0; i < size && map[i] == 0; i++) ; + return(i == size); +}*/ + +/* + * Special memory for code (ROM) + */ + +/*cl_rom::cl_rom(t_addr asize, int awidth, class cl_uc *auc): + cl_mem(MEM_ROM, get_id_string(mem_classes, MEM_ROM), asize, awidth, auc) +{ + bp_map= new cl_bitmap(asize); + inst_map= new cl_bitmap(asize); +} + +cl_rom::~cl_rom(void) +{ + delete bp_map; + delete inst_map; +}*/ + + +cl_mem::cl_mem(enum mem_class atype, char *aclass_name, + t_addr asize, int awidth, class cl_uc *auc): + cl_guiobj() +{ + int i; + + uc= auc; + type= atype; + class_name= aclass_name; + width= awidth; + size= asize; + mem= 0; + for (i= width, mask= 0; i; i--) + mask= (mask<<1) | 1; + if (width == 0 || + size == 0) + mem= 0; + else if (width <= 8) + mem= (TYPE_UBYTE *)malloc(size); + else if (width <= 16) + mem= (TYPE_UWORD *)malloc(size*sizeof(TYPE_WORD)); + else + mem= (TYPE_UDWORD *)malloc(size*sizeof(TYPE_DWORD)); + //read_locs= new cl_memloc_coll(); + //write_locs= new cl_memloc_coll(); + dump_finished= 0; + addr_format= data_format= 0; +} + +cl_mem::~cl_mem(void) +{ + if (mem) + free(mem); + if (addr_format) + free(addr_format); + if (data_format) + free(data_format); + //delete read_locs; + //delete write_locs; +} + +int +cl_mem::init(void) +{ + t_addr i; + + addr_format= (char *)malloc(10); + sprintf(addr_format, "0x%%0%dx", + size-1<=0xf?1: + (size-1<=0xff?2: + (size-1<=0xfff?3: + (size-1<=0xffff?4: + (size-1<=0xfffff?5: + (size-1<=0xffffff?6:12)))))); + data_format= (char *)malloc(10); + sprintf(data_format, "%%0%dx", width/4+((width%4)?1:0)); + + for (i= 0; i < size; i++) + set(i, (type==MEM_ROM)?(-1):0); + return(0); +} + +char * +cl_mem::id_string(void) +{ + char *s= get_id_string(mem_ids, type); + + return(s?s:(char*)"NONE"); +} + +t_mem +cl_mem::read(t_addr addr) +{ + //class cl_memloc *loc; + + if (addr >= size) + { + //FIXME + fprintf(stderr, "Address 0x%06"_A_"x is over 0x%06"_A_"x\n", addr, size); + return(0); + } + /*if ((loc= read_locs->get_loc(addr))) + return(loc->read(this));*/ + if (width <= 8) + return((((TYPE_UBYTE*)mem)[addr])&mask); + else if (width <= 16) + return((((TYPE_UWORD*)mem)[addr])&mask); + else + return((((TYPE_UDWORD*)mem)[addr])&mask); +} + +t_mem +cl_mem::get(t_addr addr) +{ + if (addr >= size) + return(0); + if (width <= 8) + return((((TYPE_UBYTE*)mem)[addr])&mask); + else if (width <= 16) + return((((TYPE_UWORD*)mem)[addr])&mask); + else + return((((TYPE_UDWORD*)mem)[addr])&mask); +} + + +/* + * Modify memory location + */ + +/* Write calls callbacks of HW elements */ + +t_mem +cl_mem::write(t_addr addr, t_mem val) +{ + /* class cl_memloc *loc; + + if (addr >= size) + return; + if ((loc= write_locs->get_loc(addr))) + loc->write(this, addr, val); + if (width <= 8) + ((TYPE_UBYTE*)mem)[addr]= (*val)&mask; + else if (width <= 16) + ((TYPE_UWORD*)mem)[addr]= (*val)&mask; + else + ((TYPE_UDWORD*)mem)[addr]= (*val)&mask;*/ + fprintf(stderr, "FIXME cl_mem::write(0x%06"_A_"x, 0x%04"_M_"x)\n", + addr, val); + return(0); +} + +/* Set doesn't call callbacks */ + +void +cl_mem::set(t_addr addr, t_mem val) +{ + if (addr >= size) + return; + if (width <= 8) + ((TYPE_UBYTE*)mem)[addr]= val&mask; + else if (width <= 16) + ((TYPE_UWORD*)mem)[addr]= val&mask; + else + ((TYPE_UDWORD*)mem)[addr]= val&mask; +} + +t_mem +cl_mem::add(t_addr addr, long what) +{ + if (addr >= size) + return(0); + if (width <= 8) + { + ((TYPE_UBYTE*)mem)[addr]= ((TYPE_UBYTE*)mem)[addr] + what; + return(((TYPE_UBYTE*)mem)[addr]); + } + else if (width <= 16) + { + ((TYPE_UWORD*)mem)[addr]= ((TYPE_UWORD*)mem)[addr] + what; + return(((TYPE_UWORD*)mem)[addr]); + } + else + { + ((TYPE_UDWORD*)mem)[addr]= ((TYPE_UDWORD*)mem)[addr] + what; + return(((TYPE_UDWORD*)mem)[addr]); + } +} + +t_addr +cl_mem::dump(t_addr start, t_addr stop, int bpl, class cl_console_base *con) +{ + int i; + + while ((start <= stop) && + (start < size)) + { + con->dd_printf(addr_format, start); con->dd_printf(" "); + for (i= 0; + (i < bpl) && + (start+i < size) && + (start+i <= stop); + i++) + { + con->dd_printf(data_format, /*read*/get(start+i)); con->dd_printf(" "); + } + while (i < bpl) + { + int j; + j= width/4 + ((width%4)?1:0) + 1; + while (j) + { + con->dd_printf(" "); + j--; + } + i++; + } + for (i= 0; (i < bpl) && + (start+i < size) && + (start+i <= stop); + i++) + { + long c= get(start+i); + con->dd_printf("%c", isprint(255&c)?(255&c):'.'); + if (width > 8) + con->dd_printf("%c", isprint(255&(c>>8))?(255&(c>>8)):'.'); + if (width > 16) + con->dd_printf("%c", isprint(255&(c>>16))?(255&(c>>16)):'.'); + if (width > 24) + con->dd_printf("%c", isprint(255&(c>>24))?(255&(c>>24)):'.'); + } + con->dd_printf("\n"); + dump_finished= start+i; + start+= bpl; + } + return(dump_finished); +} + +t_addr +cl_mem::dump(class cl_console_base *con) +{ + return(dump(dump_finished, dump_finished+10*8-1, 8, con)); +} + + + +/* + */ +/* +cl_mapped_cell::cl_mapped_cell(class cl_cell *realcell) +{ + real_cell= realcell; +} + +cl_mapped_cell::~cl_mapped_cell(void) +{} + +t_mem +cl_mapped_cell::read(void) +{ + return(real_cell->read()); +} + +t_mem +cl_mapped_cell::read(enum hw_cath skip) +{ + return(real_cell->read(skip)); +} + +t_mem +cl_mapped_cell::get(void) +{ + return(real_cell->get()); +} + +t_mem +cl_mapped_cell::write(t_mem val) +{ + return(real_cell->write(val)); +} + +t_mem +cl_mapped_cell::set(t_mem val) +{ + return(real_cell->set(val)); +} + +t_mem +cl_mapped_cell::add(long what) +{ + return(real_cell->add(what)); +} + +t_mem +cl_mapped_cell::wadd(long what) +{ + return(real_cell->wadd(what)); +} + +void +cl_mapped_cell::set_bit1(t_mem bits) +{ + return(real_cell->set_bit1(bits)); +} + +void +cl_mapped_cell::set_bit0(t_mem bits) +{ + return(real_cell->set_bit0(bits)); +} + +class cl_cell * +cl_mapped_cell::add_hw(class cl_hw *hw, int *ith) +{ + return(real_cell->add_hw(hw, ith)); +} + +class cl_hw * +cl_mapped_cell::get_hw(int ith) +{ + return(real_cell->get_hw(ith)); +} + +class cl_event_handler * +cl_mapped_cell::get_event_handler(void) +{ + return(real_cell->get_event_handler()); +} +*/ + +/* + */ + +cl_m::cl_m(enum mem_class atype, char *aclass_name, t_addr asize, int awidth, + class cl_uc *auc): + cl_memory(aclass_name, asize, awidth) + //cl_mem(atype, aclass_name, 0, awidth, auc) +{ + t_addr a; + + //size= asize; + width= awidth; + set_name(aclass_name); + uc= auc; + type= atype; + + array= (class cl_cell **)calloc(size, sizeof(class cl_cell *)); + for (a= 0; a < size; a++) + array[a]= new cl_normal_cell(width); + bus_mask= 0; + t_addr i; + for (i= 1; i < size; i<<=1) + bus_mask= (bus_mask<<1)|1; + dummy= new cl_normal_cell(width); + //mk_cell(size, 0); +} + +cl_m::~cl_m(void) +{ + t_addr a; + + for (a= 0; a < size; a++) + delete array[a]; + free(array); + delete dummy; +} + +int +cl_m::init(void) +{ + t_addr i; + + cl_memory::init(); + + for (i= 0; i < size; i++) + set(i, (type==MEM_ROM)?(-1):0); + return(0); +} + +char * +cl_m::id_string(void) +{ + char *s= get_id_string(mem_ids, type); + + return(s?s:(char*)"NONE"); +} + +/*void +cl_m::mk_cell(t_addr addr, class cl_cell *cell) +{ + if (!cell) + cell= new cl_cell(width); + class cl_cell *p; + if (addr >= size) + p= dummy; + else + p= array[addr]; + if (p == 0) + { + p= (class cl_cell *)calloc(1, sizeof(*cell)); + } + else + { + p->destroy(); + p= (class cl_cell *)realloc(p, sizeof(cell)); + } + memcpy(p, cell, sizeof(*cell)); + cell->destroy(); + delete cell; +}*/ + +t_mem +cl_m::read(t_addr addr) +{ + //addr&= bus_mask; + if (addr >= size) + { + err_inv_addr(addr); + return(dummy->read()); + } + return(array[addr]->read()); +} + +t_mem +cl_m::read(t_addr addr, enum hw_cath skip) +{ + //addr&= bus_mask; + if (addr >= size) + { + err_inv_addr(addr); + return(dummy->read(skip)); + } + return(array[addr]->read(skip)); +} + +t_mem +cl_m::get(t_addr addr) +{ + addr&= bus_mask; + if (addr >= size) + { + err_inv_addr(addr); + return(dummy->get()); + } + return(array[addr]->get()); +} + +t_mem +cl_m::write(t_addr addr, t_mem val) +{ + //addr&= bus_mask; + if (addr >= size) + { + err_inv_addr(addr); + return(dummy->write(val)); + } + return(array[addr]->write(val)); +} + +void +cl_m::set(t_addr addr, t_mem val) +{ + if (addr >= size) + { + err_inv_addr(addr); + //addr&= bus_mask; + dummy->set(val); + return; + } + //addr&= bus_mask; + array[addr]->set(val); +} + +class cl_cell * +cl_m::get_cell(t_addr addr) +{ + //addr&= bus_mask; + if (addr >= size) + { + err_inv_addr(addr); + return(dummy); + } + return(array[addr]); +} + + +/* Set or clear bits, without callbacks */ + +void +cl_m::set_bit1(t_addr addr, t_mem bits) +{ + class cl_cell *cell; + + addr&= bus_mask; + if (addr >= size) + { + err_inv_addr(addr); + cell= dummy; + } + else + cell= array[addr]; + bits&= cell->get_mask(); + cell->set(cell->get() | bits); +} + +void +cl_m::write_bit1(t_addr addr, t_mem bits) +{ + class cl_cell *cell; + + addr&= bus_mask; + if (addr >= size) + { + err_inv_addr(addr); + cell= dummy; + } + else + cell= array[addr]; + bits&= cell->get_mask(); + cell->write(cell->get() | bits); +} + +void +cl_m::set_bit0(t_addr addr, t_mem bits) +{ + class cl_cell *cell; + + addr&= bus_mask; + if (addr >= size) + { + err_inv_addr(addr); + cell= dummy; + } + else + cell= array[addr]; + bits&= cell->get_mask(); + cell->set(cell->get() & ~bits); +} + +void +cl_m::write_bit0(t_addr addr, t_mem bits) +{ + class cl_cell *cell; + + addr&= bus_mask; + if (addr >= size) + { + err_inv_addr(addr); + cell =dummy; + } + else + cell= array[addr]; + bits&= cell->get_mask(); + cell->write(cell->get() & ~bits); +} + +t_mem +cl_m::add(t_addr addr, long what) +{ + addr&= bus_mask; + if (addr >= size) + { + err_inv_addr(addr); + return(dummy->add(what)); + } + return(array[addr]->add(what)); +} + +t_mem +cl_m::wadd(t_addr addr, long what) +{ + addr&= bus_mask; + if (addr >= size) + { + err_inv_addr(addr); + return(dummy->wadd(what)); + } + return(array[addr]->wadd(what)); +} + +bool +cl_m::search_next(bool case_sensitive, t_mem *array, int len, t_addr *addr) +{ + t_addr a; + int i; + bool found; + + if (addr == NULL) + a= 0; + else + a= *addr; + + if (a+len > size) + return(DD_FALSE); + + found= DD_FALSE; + while (!found && + a+len <= size) + { + bool match= DD_TRUE; + for (i= 0; i < len && match; i++) + { + t_mem d1, d2; + d1= get(a+i); + d2= array[i]; + if (!case_sensitive) + { + if (/*d1 < 128*/isalpha(d1)) + d1= toupper(d1); + if (/*d2 < 128*/isalpha(d2)) + d2= toupper(d2); + } + match= d1 == d2; + } + found= match; + if (!found) + a++; + } + + if (addr) + *addr= a; + return(found); +} + +class cl_cell * +cl_m::register_hw(t_addr addr, class cl_hw *hw, int *ith, bool announce) +{ + class cl_cell *cell, *nc; + + addr&= bus_mask; + if (addr >= size) + cell= dummy; + else + cell= array[addr]; + + if (cell->get_type() & (CELL_HW_READ | CELL_HW_WRITE)) + { + /* Already registered */ + return(cell->add_hw(hw, ith)); + } + else if (cell->get_type() & (CELL_READ_BRK | CELL_WRITE_BRK)) + { + /* Event break is set on it, now register hw */ + nc= new cl_ev_reg_cell(width, uc); + nc->set(cell->get()); + nc->set_type(nc->get_type() & + ~(CELL_GENERAL|CELL_READ_BRK|CELL_WRITE_BRK)); + nc->set_type(nc->get_type() | (cell->get_type() & CELL_GENERAL)); + class cl_event_handler *eh= nc->get_event_handler(); + if (eh) + nc->set_type(nc->get_type() | eh->copy_from(cell->get_event_handler())); + nc->add_hw(hw, ith); + } + else + { + /* Normal cell, register hw */ + nc= new cl_registered_cell(width); + nc->set(cell->get()); + nc->set_type(nc->get_type() & ~CELL_GENERAL); + nc->set_type(nc->get_type() | (cell->get_type() & CELL_GENERAL)); + nc->add_hw(hw, ith); + } + + if (addr >= size) + { + delete dummy; + dummy= nc; + } + else + { + delete array[addr]; + array[addr]= nc; + } + if (announce) + uc->sim->/*app->*/mem_cell_changed(this, addr); + return(nc); +} + +void +cl_m::set_brk(t_addr addr, class cl_brk *brk) +{ + class cl_cell *cell, *nc; + char e= '_'; + + addr&= bus_mask; + if (addr >= size) + cell= dummy; + else + cell= array[addr]; + + switch (brk->get_event()) + { + case brkWRITE: case brkWXRAM: case brkWIRAM: case brkWSFR: + e= 'W'; + break; + case brkREAD: case brkRXRAM: case brkRCODE: case brkRIRAM: case brkRSFR: + e= 'R'; + break; + case brkNONE: + set_cell_flag(addr, DD_TRUE, CELL_FETCH_BRK); + return; + break; + default: e= '.'; break; + } + + if (cell->get_type() & (CELL_HW_READ | CELL_HW_WRITE)) + { + /* Hw is registered on it, now set event break */ + nc= new cl_ev_reg_cell(width, uc); + nc->set(cell->get()); + nc->set_type(nc->get_type() & ~CELL_GENERAL); + nc->set_type(nc->get_type() | (cell->get_type() & CELL_GENERAL)); + int i= 0; + class cl_hw *hw; + while ((hw= cell->get_hw(i)) != 0) + { + nc->add_hw(hw, 0); + i++; + } + if (((class cl_registered_cell *)cell)->hardwares) + { + free(((class cl_registered_cell *)cell)->hardwares); + ((class cl_registered_cell *)cell)->hardwares= 0; + } + class cl_event_handler *eh; + if ((eh= nc->get_event_handler())) + nc->set_type(nc->get_type() | eh->add_bp(brk)); + } + else if (cell->get_type() & (CELL_READ_BRK | CELL_WRITE_BRK)) + { + /* Break is already set on it */ + class cl_event_handler *eh; + if ((eh= cell->get_event_handler())) + cell->set_type(cell->get_type() | eh->add_bp(brk)); + return; + } + else + { + /* Normal cell, set event break */ + nc= new cl_event_cell(width, uc); + nc->set(cell->get()); + nc->set_type(nc->get_type() & ~CELL_GENERAL); + nc->set_type(nc->get_type() | (cell->get_type() & CELL_GENERAL)); + class cl_event_handler *eh; + if ((eh= nc->get_event_handler())) + nc->set_type(nc->get_type() | eh->add_bp(brk)); + } + + if (addr >= size) + { + delete dummy; + dummy= nc; + } + else + { + delete array[addr]; + array[addr]= nc; + } + uc->sim->/*app->*/mem_cell_changed(this, addr); +} + +void +cl_m::del_brk(t_addr addr, class cl_brk *brk) +{ + class cl_cell *cell, *nc; + char e= '_'; + + addr&= bus_mask; + if (addr >= size) + cell= dummy; + else + cell= array[addr]; + + switch (brk->get_event()) + { + case brkWRITE: case brkWXRAM: case brkWIRAM: case brkWSFR: e= 'W'; break; + case brkREAD: case brkRXRAM: case brkRCODE: case brkRIRAM: case brkRSFR: + e= 'R'; + break; + case brkNONE: + set_cell_flag(addr, DD_FALSE, CELL_FETCH_BRK); + return; + break; + default: e= '.'; break; + } + + if (cell->get_type() & (CELL_HW_READ | CELL_HW_WRITE)) + { + /* Hw is registered on it, delete event break */ + class cl_event_handler *eh; + int t= CELL_NORMAL; + if ((eh= cell->get_event_handler())) + t= eh->del_bp(brk); + if (t & (CELL_READ_BRK|CELL_WRITE_BRK)) + { + cell->set_type(cell->get_type() & ~(CELL_READ_BRK|CELL_WRITE_BRK)); + cell->set_type(cell->get_type() | t); + return; + } + nc= new cl_registered_cell(width); + nc->set(cell->get()); + nc->set_type(cell->get_type() & ~CELL_GENERAL); + nc->set_type(cell->get_type() | (cell->get_type() & CELL_GENERAL)); + int i= 0; + class cl_hw *hw; + while ((hw= cell->get_hw(i)) != 0) + { + nc->add_hw(hw, 0); + i++; + } + if (((class cl_registered_cell *)cell)->hardwares) + free(((class cl_registered_cell *)cell)->hardwares); + } + else if (cell->get_type() & (CELL_READ_BRK | CELL_WRITE_BRK)) + { + /* Break already set on it, delete brk */ + class cl_event_handler *eh; + int t= CELL_NORMAL; + if ((eh= cell->get_event_handler())) + t= eh->del_bp(brk); + if (t & (CELL_READ_BRK|CELL_WRITE_BRK)) + { + cell->set_type(cell->get_type() & ~(CELL_READ_BRK|CELL_WRITE_BRK)); + cell->set_type(cell->get_type() | t); + return; + } + nc= new cl_normal_cell(width); + nc->set(cell->get()); + nc->set_type(cell->get_type() & ~CELL_GENERAL); + nc->set_type(cell->get_type() | (cell->get_type() & CELL_GENERAL)); + return; + } + else + { + /* Normal cell */ + return; + } + + if (addr >= size) + { + delete dummy; + dummy= nc; + } + else + { + delete array[addr]; + array[addr]= nc; + } + uc->sim->/*app->*/mem_cell_changed(this, addr); +} + + +#ifdef STATISTIC +unsigned long +cl_m::get_nuof_reads(void) +{ + unsigned long res= 0; + t_addr i; + for (i= 0; i < size; i++) + res+= array[i]->nuof_reads; + return(res); +} + +unsigned long +cl_m::get_nuof_writes(void) +{ + unsigned long res= 0; + t_addr i; + for (i= 0; i < size; i++) + res+= array[i]->nuof_writes; + return(res); +} + +void +cl_m::set_nuof_reads(unsigned long value) +{ + t_addr i; + for (i= 0; i < size; i++) + array[i]->nuof_reads= value; + dummy->nuof_reads= value; +} + +void +cl_m::set_nuof_writes(unsigned long value) +{ + t_addr i; + for (i= 0; i < size; i++) + array[i]->nuof_writes= value; + dummy->nuof_writes= value; +} +#endif + + +cl_normal_cell::cl_normal_cell(uchar awidth): + cl_cell() +{ + type= CELL_NORMAL; + data= 0; + mask= 1; + width= awidth; + for (--awidth; awidth; awidth--) + { + mask<<= 1; + mask|= 1; + } +} + +t_mem +cl_normal_cell::add(long what) +{ + t_mem d; + + if (width <= 8) + d= TYPE_BYTE(data) + what; + else if (width <= 16) + d= TYPE_WORD(data) + what; + else + d= TYPE_DWORD(data) + what; + return(data= d & mask); +} + +t_mem +cl_normal_cell::wadd(long what) +{ + t_mem d; + + if (width <= 8) + d= TYPE_BYTE(data) + what; + else if (width <= 16) + d= TYPE_WORD(data) + what; + else + d= TYPE_DWORD(data) + what; + return(write(d)); +} + +void +cl_normal_cell::set_bit1(t_mem bits) +{ + bits&= mask; + data|= bits; +} + +void +cl_normal_cell::set_bit0(t_mem bits) +{ + bits&= mask; + data&= ~bits; +} + + +/* + */ + +cl_registered_cell::cl_registered_cell(uchar awidth): + cl_normal_cell(awidth) +{ + type= CELL_HW_READ | CELL_HW_WRITE; + //hws= new cl_list(1, 1); + hardwares= 0; + nuof_hws= 0; +} + +cl_registered_cell::~cl_registered_cell(void) +{ + if (hardwares) + free(hardwares); +} + +/*void +cl_registered_cell::destroy(void) +{ + hardwares= 0; + nuof_hws= 0; +}*/ + +t_mem +cl_registered_cell::read(void) +{ + int i; + t_mem d= data; + + if (nuof_hws) + for (i= 0; i < nuof_hws; i++) + { + d= hardwares[i]->read(this); + ; + } +#ifdef STATISTIC + nuof_reads++; +#endif + return(d & mask); +} + +t_mem +cl_registered_cell::read(enum hw_cath skip) +{ + int i; + t_mem d= data; + + if (nuof_hws) + for (i= 0; i < nuof_hws; i++) + { + if ((skip & hardwares[i]->cathegory) == 0) + d= hardwares[i]->read(this); + ; + } +#ifdef STATISTIC + nuof_reads++; +#endif + return(d & mask); +} + +t_mem +cl_registered_cell::write(t_mem val) +{ + int i; + + val&= mask; + if (nuof_hws) + for (i= 0; i < nuof_hws; i++) + { + hardwares[i]->write(this, &val); + ; + } +#ifdef STATISTIC + nuof_writes++; +#endif + return(data= val & mask); +} + +class cl_cell * +cl_registered_cell::add_hw(class cl_hw *hw, int *ith) +{ + if (!hw) + { + /* Whatta hell!? */ + return(0); + } + if (!hardwares) + hardwares= (class cl_hw **)malloc(sizeof(class cl_hw *)); + else + hardwares= (class cl_hw **)realloc(hardwares, + sizeof(class c_hw *) * (nuof_hws+1)); + hardwares[nuof_hws]= hw; + nuof_hws++; + if (ith) + *ith= nuof_hws-1; + return(this); +} + +class cl_hw * +cl_registered_cell::get_hw(int ith) +{ + if (ith >= nuof_hws) + return(0); + return(hardwares[ith]); +} + + +/* + */ + +cl_event_cell::cl_event_cell(uchar awidth, class cl_uc *auc): + cl_normal_cell(awidth) +{ + eh= new cl_event_handler(auc); +} + +cl_event_cell::~cl_event_cell(void) +{ + delete eh; +} + +t_mem +cl_event_cell::read(void) +{ + if (type & CELL_READ_BRK) + eh->read(); + return(cl_normal_cell::read()); +} + +t_mem +cl_event_cell::write(t_mem val) +{ + if (type & CELL_WRITE_BRK) + eh->write(); + return(cl_normal_cell::write(val)); +} + + +/* + */ + +cl_ev_reg_cell::cl_ev_reg_cell(uchar awidth, class cl_uc *auc): + cl_registered_cell(awidth) +{ + eh= new cl_event_handler(auc); +} + +cl_ev_reg_cell::~cl_ev_reg_cell(void) +{} + +t_mem +cl_ev_reg_cell::read(void) +{ + if (type & CELL_READ_BRK) + eh->read(); + return(cl_registered_cell::read()); +} + +t_mem +cl_ev_reg_cell::write(t_mem val) +{ + if (type & CELL_WRITE_BRK) + eh->write(); + return(cl_registered_cell::write(val)); +} + + +/* + */ + +cl_event_handler::cl_event_handler(class cl_uc *auc): + cl_base() +{ + uc= auc; + read_bps= new cl_list(1, 1); + write_bps= new cl_list(1, 1); +} + +cl_event_handler::~cl_event_handler(void) +{ + read_bps->disconn_all(); + write_bps->disconn_all(); + delete read_bps; + delete write_bps; +} + +void +cl_event_handler::write(void) +{ + int i; + + for (i= 0; i < write_bps->count; i++) + { + class cl_brk *bp= (class cl_brk *)(write_bps->at(i)); + uc->events->add(bp); + } +} + +void +cl_event_handler::read(void) +{ + int i; + + for (i= 0; i < read_bps->count; i++) + { + class cl_brk *bp= (class cl_brk *)(read_bps->at(i)); + uc->events->add(bp); + } +} + +int +cl_event_handler::add_bp(class cl_brk *bp) +{ + int t= CELL_NORMAL; + + if (!bp) + return(CELL_NORMAL); + switch (bp->get_event()) + { + case brkWRITE: case brkWXRAM: case brkWIRAM: case brkWSFR: + t|= CELL_WRITE_BRK; + write_bps->add(bp); + break; + case brkREAD: case brkRXRAM: case brkRCODE: case brkRIRAM: case brkRSFR: + t|= CELL_READ_BRK; + read_bps->add(bp); + break; + default: + t|= CELL_READ_BRK | CELL_WRITE_BRK; + read_bps->add(bp); + write_bps->add(bp); + break; + } + return(t); +} + +int +cl_event_handler::copy_from(class cl_event_handler *eh) +{ + int i, t= CELL_NORMAL; + + if (!eh) + return(t); + for (i= 0; i < eh->read_bps->count; i++) + { + class cl_brk *bp= (class cl_brk *)(eh->read_bps->at(i)); + t|= add_bp(bp); + } + for (i= 0; i < eh->write_bps->count; i++) + { + class cl_brk *bp= (class cl_brk *)(eh->write_bps->at(i)); + t|= add_bp(bp); + } + return(t); +} + +int +cl_event_handler::del_bp(class cl_brk *bp) +{ + int t= CELL_NORMAL; + + write_bps->disconn(bp); + read_bps->disconn(bp); + if (write_bps->count) + t|= CELL_WRITE_BRK; + if (read_bps->count) + t|= CELL_READ_BRK; + return(t); +} + + diff --git a/sim/ucsim/sim.src/obsolete.h b/sim/ucsim/sim.src/obsolete.h new file mode 100644 index 0000000..fd12bda --- /dev/null +++ b/sim/ucsim/sim.src/obsolete.h @@ -0,0 +1,286 @@ +/* +class cl_mem: public cl_guiobj +{ +public: + char *addr_format, *data_format; + ulong mask; + enum mem_class type; + char *class_name; + union { + void *mem; + uchar *umem8; + }; + //class cl_memloc_coll *read_locs, *write_locs; + t_addr size; + int width; // in bits + class cl_uc *uc; + t_addr dump_finished; + +public: + cl_mem(enum mem_class atype, char *aclass_name, t_addr asize, int awidth, + class cl_uc *auc); + virtual ~cl_mem(void); + virtual int init(void); + virtual char *id_string(void); + virtual int get_cell_flag(t_addr //addr + ) { return(CELL_NORMAL); } + virtual bool get_cell_flag(t_addr //addr + , int //flag + ) + { return(DD_FALSE); } + virtual void set_cell_flag(t_addr addr, bool set_to, int flag) {} + + virtual t_mem read(t_addr addr); + virtual t_mem read(t_addr addr, enum hw_cath //skip + ) {return(read(addr));} + virtual t_mem get(t_addr addr); + virtual t_mem write(t_addr addr, t_mem val); + virtual void set(t_addr addr, t_mem val); + virtual void set_bit1(t_addr addr, t_mem bits); + virtual void set_bit0(t_addr addr, t_mem bits); + virtual void write_bit1(t_addr addr, t_mem bits) { set_bit1(addr, bits); } + virtual void write_bit0(t_addr addr, t_mem bits) { set_bit0(addr, bits); } + virtual t_mem add(t_addr addr, long what); + virtual t_mem wadd(t_addr addr, long what) { return(add(addr, what)); } + virtual t_addr dump(t_addr start, t_addr stop, int bpl, + class cl_console_base *con); + virtual t_addr dump(class cl_console_base *con); + virtual bool search_next(bool case_sensitive, + t_mem *array, int len, t_addr *addr); + + virtual class cl_cell *get_cell(t_addr addr) {return(0);} + virtual class cl_cell *register_hw(t_addr addr, class cl_hw *hw, int *ith, + bool announce) + { return(0); } + virtual void set_brk(t_addr //addr + , class cl_brk *//brk + ) {} + virtual void del_brk(t_addr addr, class cl_brk *brk) {} +#ifdef STATISTIC + virtual unsigned long get_nuof_reads(void) {return(0);} + virtual unsigned long get_nuof_writes(void) {return(0);} + virtual void set_nuof_reads(unsigned long value) {} + virtual void set_nuof_writes(unsigned long value) {} +#endif +}; +*/ + +/* +class cl_mapped_cell: public cl_cell +{ +protected: + class cl_cell *real_cell; +public: + cl_mapped_cell(class cl_cell *realcell); + virtual ~cl_mapped_cell(void); + + virtual t_mem read(void); + virtual t_mem read(enum hw_cath skip); + virtual t_mem get(void); + virtual t_mem write(t_mem val); + virtual t_mem set(t_mem val); + virtual t_mem add(long what); + virtual t_mem wadd(long what); + + virtual void set_bit1(t_mem bits); + virtual void set_bit0(t_mem bits); + + virtual class cl_cell *add_hw(class cl_hw *hw, int *ith); + virtual class cl_hw *get_hw(int ith); + virtual class cl_event_handler *get_event_handler(void); +}; +*/ + + +class cl_m: public cl_memory +{ +protected: + class cl_cell **array; + class cl_cell *dummy; + t_addr bus_mask; +public: + //t_addr size; + enum mem_class type; + +public: + cl_m(enum mem_class atype, char *aclass_name, t_addr asize, int awidth, + class cl_uc *auc); + cl_m(t_addr asize, int awidth); + virtual ~cl_m(void); + virtual int init(void); + virtual char *id_string(void); + + virtual int get_cell_flag(t_addr addr); + virtual bool get_cell_flag(t_addr addr, int flag); + virtual void set_cell_flag(t_addr addr, bool set_to, int flag); + + virtual t_mem read(t_addr addr); + virtual t_mem read(t_addr addr, enum hw_cath skip); + virtual t_mem get(t_addr addr); + virtual t_mem write(t_addr addr, t_mem val); + virtual void set(t_addr addr, t_mem val); + virtual class cl_cell *get_cell(t_addr addr); + + virtual void set_bit1(t_addr addr, t_mem bits); + virtual void set_bit0(t_addr addr, t_mem bits); + virtual void write_bit1(t_addr addr, t_mem bits); + virtual void write_bit0(t_addr addr, t_mem bits); + virtual t_mem add(t_addr addr, long what); + virtual t_mem wadd(t_addr addr, long what); + + virtual bool search_next(bool case_sensitive, + t_mem *array, int len, t_addr *addr); + + virtual class cl_cell *register_hw(t_addr addr, class cl_hw *hw, int *ith, + bool announce); + virtual void set_brk(t_addr addr, class cl_brk *brk); + virtual void del_brk(t_addr addr, class cl_brk *brk); + +#ifdef STATISTIC + virtual unsigned long get_nuof_reads(void); + virtual unsigned long get_nuof_writes(void); + virtual void set_nuof_reads(unsigned long value); + virtual void set_nuof_writes(unsigned long value); +#endif +}; + + +class cl_normal_cell: public cl_cell +{ +public: + t_mem data; + TYPE_UBYTE type; // See CELL_XXXX + //protected: + +public: + cl_normal_cell(uchar awidth); + //virtual void destroy(void) {} + + virtual TYPE_UBYTE get_type(void) { return(type); } + virtual void set_type(TYPE_UBYTE what) { type= what; } + + virtual t_mem read(void) { +#ifdef STATISTIC + nuof_reads++; +#endif + return(data); + } + virtual t_mem read(enum hw_cath skip) { return(data); } + virtual t_mem get(void) { return(data); } + virtual t_mem write(t_mem val) { + data= val & mask; +#ifdef STATISTIC + nuof_writes++; +#endif + return(data); + } + virtual t_mem set(t_mem val) { return(data= val & mask); } + virtual t_mem add(long what); + virtual t_mem wadd(long what); + + virtual void set_bit1(t_mem bits); + virtual void set_bit0(t_mem bits); + + virtual class cl_cell *add_hw(class cl_hw *hw, int *ith) + { return(0); } + virtual class cl_hw *get_hw(int ith) { return(0); } + //virtual class cl_brk *get_brk(void) { return(0); } + virtual class cl_event_handler *get_event_handler(void) { return(0); } +}; + +class cl_registered_cell: public cl_memory_cell +{ +public: + //class cl_list *hws; + class cl_hw **hardwares; + int nuof_hws; +public: + cl_registered_cell(uchar awidth); + virtual ~cl_registered_cell(void); + //virtual void destroy(void); + + virtual t_mem read(void); + virtual t_mem read(enum hw_cath skip); + virtual t_mem write(t_mem val); + + virtual class cl_cell *add_hw(class cl_hw *hw, int *ith); + virtual class cl_hw *get_hw(int ith); +}; + +class cl_event_cell: public cl_normal_cell +{ +protected: + class cl_event_handler *eh; +public: + cl_event_cell(uchar awidth, class cl_uc *auc); + virtual ~cl_event_cell(void); + + virtual t_mem read(void); + virtual t_mem write(t_mem val); + //virtual void event(void); + + //virtual class cl_brk *get_brk(void) { return(brk); } + virtual class cl_event_handler *get_event_handler(void) { return(eh); } +}; + +class cl_ev_reg_cell: public cl_registered_cell +{ +protected: + class cl_event_handler *eh; +public: + cl_ev_reg_cell(uchar awidth, class cl_uc *auc); + virtual ~cl_ev_reg_cell(void); + + virtual t_mem read(void); + virtual t_mem write(t_mem val); + //virtual void event(void); + + //virtual class cl_brk *get_brk(void) { return(brk); } + virtual class cl_event_handler *get_event_handler(void) { return(eh); } +}; + +/* + * 2nd version memory system + */ +class cl_cell: public cl_base +{ +public: + cl_cell(void); +public: + + virtual t_mem read(void)= 0; + virtual t_mem read(enum hw_cath skip)=0; + virtual t_mem get(void)=0; + virtual t_mem write(t_mem val)=0; + virtual t_mem set(t_mem val)=0; + virtual t_mem add(long what)=0; + virtual t_mem wadd(long what)=0; + + virtual void set_bit1(t_mem bits)=0; + virtual void set_bit0(t_mem bits)=0; + + virtual class cl_cell *add_hw(class cl_hw *hw, int *ith)=0; + virtual class cl_hw *get_hw(int ith)=0; + virtual class cl_event_handler *get_event_handler(void)=0; +}; + +/* + */ +class cl_event_handler: public cl_base +{ +public: + class cl_list *read_bps, *write_bps; + class cl_uc *uc; +public: + cl_event_handler(class cl_uc *auc); + virtual ~cl_event_handler(void); + + virtual void write(void); + virtual void read(void); + + virtual int add_bp(class cl_brk *bp); + virtual int copy_from(class cl_event_handler *eh); + virtual bool del_bp(class cl_brk *bp); +}; + + diff --git a/sim/ucsim/sim.src/sim.cc b/sim/ucsim/sim.src/sim.cc new file mode 100644 index 0000000..248ca31 --- /dev/null +++ b/sim/ucsim/sim.src/sim.cc @@ -0,0 +1,305 @@ +/* + * Simulator of microcontrollers (sim.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include +#include +#include "i_string.h" + +// prj +#include "globals.h" + +// cmd +#include "cmdsetcl.h" +#include "cmdguicl.h" + +// local, sim.src +#include "simcl.h" +#include "appcl.h" + + +/* + * Simulator + */ + +cl_sim::cl_sim(class cl_app *the_app): + cl_base() +{ + app= the_app; + uc= 0; + //arguments= new cl_list(2, 2); + //accept_args= more_args?strdup(more_args):0; + gui= new cl_gui(this); + + state = SIM_QUIT; + argc = 0; + argv = 0; +} + +int +cl_sim::init(void) +{ + cl_base::init(); + build_cmdset(app->get_commander()->cmdset); + if (!(uc= mk_controller())) + return(1); + uc->init(); + return(0); +} + +cl_sim::~cl_sim(void) +{ + if (uc) + delete uc; +} + +class cl_uc * +cl_sim::mk_controller(void) +{ + return(new cl_uc(this)); +} + + +/* + * Main cycle of the simulator + */ + +int +cl_sim::main(void) +{ + int done= 0; + + while (!done && + (state & SIM_QUIT) == 0) + { + if (state & SIM_GO) + { + uc->do_inst(-1); + if (app->get_commander()->input_avail()) + { + done= app->get_commander()->proc_input(); + } + } + else + { + app->get_commander()->wait_input(); + done= app->get_commander()->proc_input(); + } + } + return(0); +} + +int +cl_sim::step(void) +{ + if (state & SIM_GO) + uc->do_inst(1); + return(0); +} + +/*int +cl_sim::do_cmd(char *cmdstr, class cl_console_base *console) +{ + class cl_cmdline *cmdline; + class cl_cmd *cm; + int retval= 0; + + cmdline= new cl_cmdline(cmdstr, console); + cmdline->init(); + cm= cmd->cmdset->get_cmd(cmdline); + if (cm) + retval= cm->work(cmdline, console); + delete cmdline; + if (cm) + return(retval); + return(console->interpret(cmdstr)); +}*/ + +void +cl_sim::start(class cl_console_base *con) +{ + state|= SIM_GO; + con->flags|= CONS_FROZEN; + app->get_commander()->frozen_console= con; + app->get_commander()->set_fd_set(); +} + +void +cl_sim::stop(int reason) +{ + class cl_commander_base *cmd= app->get_commander(); + + state&= ~SIM_GO; + if (cmd->frozen_console) + { + if (reason == resUSER && + cmd->frozen_console->input_avail()) + cmd->frozen_console->read_line(); + cmd->frozen_console->dd_printf("Stop at 0x%06x: (%d) ", uc->PC, reason); + switch (reason) + { + case resHALT: + cmd->frozen_console->dd_printf("Halted\n"); + break; + case resINV_ADDR: + cmd->frozen_console->dd_printf("Invalid address\n"); + break; + case resSTACK_OV: + cmd->frozen_console->dd_printf("Stack overflow\n"); + break; + case resBREAKPOINT: + cmd->frozen_console->dd_printf("Breakpoint\n"); + uc->print_regs(cmd->frozen_console); + break; + case resINTERRUPT: + cmd->frozen_console->dd_printf("Interrupt\n"); + break; + case resWDTRESET: + cmd->frozen_console->dd_printf("Watchdog reset\n"); + break; + case resUSER: + cmd->frozen_console->dd_printf("User stopped\n"); + break; + case resINV_INST: + { + cmd->frozen_console->dd_printf("Invalid instruction"); + if (uc->rom) + cmd->frozen_console->dd_printf(" 0x%04x\n", + uc->rom->get(uc->PC)); + } + break; + case resERROR: + // uc::check_error prints error messages... + break; + default: + cmd->frozen_console->dd_printf("Unknown reason\n"); + break; + } + cmd->frozen_console->dd_printf("F 0x%06x\n", uc->PC); // for sdcdb + //if (cmd->actual_console != cmd->frozen_console) + cmd->frozen_console->flags&= ~CONS_FROZEN; + cmd->frozen_console->print_prompt(); + cmd->frozen_console= 0; + } + cmd->set_fd_set(); +} + +void +cl_sim::stop(class cl_ev_brk *brk) +{ + class cl_commander_base *cmd= app->get_commander(); + + state&= ~SIM_GO; + if (cmd->frozen_console) + { + class cl_console_base *con= cmd->frozen_console; + /* + if (reason == resUSER && + cmd->frozen_console->input_avail()) + cmd->frozen_console->read_line(); + */ + //con->dd_printf("Stop at 0x%06x\n", uc->PC); + con->dd_printf("Event `%s' at %s[0x%"_A_"x]: 0x%"_A_"x %s\n", + brk->id, brk->get_mem()->get_name(), brk->addr, + uc->instPC, + uc->disass(uc->instPC, " ")); + //con->flags&= ~CONS_FROZEN; + //con->print_prompt(); + //cmd->frozen_console= 0; + } +} + + +/* + */ + +void +cl_sim::build_cmdset(class cl_cmdset *cmdset) +{ + class cl_cmd *cmd; + class cl_cmdset *cset; + + cmdset->add(cmd= new cl_run_cmd("run", 0, +"run [start [stop]] Go", +"long help of run")); + cmd->init(); + cmd->add_name("go"); + cmd->add_name("r"); + + cmdset->add(cmd= new cl_stop_cmd("stop", 0, +"stop Stop", +"long help of stop")); + cmd->init(); + + cmdset->add(cmd= new cl_step_cmd("step", DD_TRUE, +"step Step", +"long help of step")); + cmd->init(); + cmd->add_name("s"); + + cmdset->add(cmd= new cl_next_cmd("next", DD_TRUE, +"next Next", +"long help of next")); + cmd->init(); + cmd->add_name("n"); + + { + cset= new cl_cmdset(); + cset->init(); + cset->add(cmd= new cl_gui_start_cmd("start", 0, +"gui start Start interfacing with GUI tool", +"long help of gui start")); + cmd->init(); + cset->add(cmd= new cl_gui_stop_cmd("stop", 0, +"gui stop Stop interfacing with GUI tool", +"long help of gui stop")); + cmd->init(); + } + cmdset->add(cmd= new cl_super_cmd("gui", 0, +"gui subcommand Operations to support GUI tools", +"long help of gui", cset)); + cmd->init(); +} + + +/* + * Messages to broadcast + */ +/* +void +cl_sim::mem_cell_changed(class cl_address_space *mem, t_addr addr) +{ + if (uc) + uc->mem_cell_changed(mem, addr); + else + printf("JAJ sim\n"); +} +*/ + +/* End of sim.src/sim.cc */ diff --git a/sim/ucsim/sim.src/simcl.h b/sim/ucsim/sim.src/simcl.h new file mode 100644 index 0000000..7dc2b79 --- /dev/null +++ b/sim/ucsim/sim.src/simcl.h @@ -0,0 +1,84 @@ +/* + * Simulator of microcontrollers (sim.src/simcl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef SIM_SIMCL_HEADER +#define SIM_SIMCL_HEADER + +#include + +// prj +#include "pobjcl.h" + +// cmd +#include "newcmdcl.h" + +// gui +#include "guicl.h" + +// local +#include "uccl.h" +#include "argcl.h" + + +class cl_sim: public cl_base +{ +public: + class cl_app *app; + int state; // See SIM_XXXX + int argc; char **argv; + + //class cl_commander_base *cmd; + class cl_uc *uc; + class cl_gui *gui; + + //char *accept_args; + //class cl_list *arguments; + +public: + cl_sim(class cl_app *the_app); + virtual ~cl_sim(void); + virtual int init(void); + + virtual class cl_uc *mk_controller(void); + virtual void build_cmdset(class cl_cmdset *cmdset); + + virtual class cl_uc *get_uc(void) { return(uc); } + + // messages from app to handle and broadcast + //virtual void mem_cell_changed(class cl_address_space *m, t_addr addr); + + virtual int main(void); + virtual void start(class cl_console_base *con); + virtual void stop(int reason); + virtual void stop(class cl_ev_brk *brk); + virtual int step(void); +}; + + +#endif + +/* End of simcl.h */ diff --git a/sim/ucsim/sim.src/stack.cc b/sim/ucsim/sim.src/stack.cc new file mode 100644 index 0000000..60e13ad --- /dev/null +++ b/sim/ucsim/sim.src/stack.cc @@ -0,0 +1,540 @@ +/* + * Simulator of microcontrollers (stack.cc) + * + * Copyright (C) 2000,00 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include + +// cmd.src +#include "newcmdcl.h" + +// sim.src +#include "stackcl.h" + + +static class cl_stack_error_registry stack_error_registry; + +cl_stack_op::cl_stack_op(enum stack_op op, + t_addr iPC, + t_addr iSP_before, t_addr iSP_after): + cl_base() +{ + operation= op; + PC= iPC; + //addr= iaddr; + //data= idata; + SP_before= iSP_before; + SP_after= iSP_after; +} + +cl_stack_op::~cl_stack_op(void) +{ +} + + +class cl_stack_op * +cl_stack_op::mk_copy(void) +{ + class cl_stack_op *so= new cl_stack_op(*this); + return(so); +} + +void +cl_stack_op::info_head(class cl_console_base *con) +{ + con->dd_printf("OP SP before-after L DATA/ADDR INSTRUCTION\n"); +} + +void +cl_stack_op::info(class cl_console_base *con, class cl_uc *uc) +{ + con->dd_printf("%-4s 0x%06"_A_"x-0x%06"_A_"x %d ", + get_op_name(), SP_before, SP_after, abs(SP_before-SP_after)); + print_info(con); + con->dd_printf(" "); + uc->print_disass(PC, con); + //con->dd_printf("\n"); +} + +const char * +cl_stack_op::get_op_name(void) +{ + return("op"); +} + +void +cl_stack_op::print_info(class cl_console_base *con) +{ + con->dd_printf("-"); +} + +bool +cl_stack_op::sp_increased(void) +{ + if (operation & stack_write_operation) + return(SP_after > SP_before); + else // read operation + return(SP_after < SP_before); +} + +int +cl_stack_op::data_size(void) +{ + int r= SP_after - SP_before; + + return(r<0?-r:r); +} + +int +cl_stack_op::match(class cl_stack_op *op) +{ + return(DD_FALSE); +} + +bool +cl_stack_op::can_removed(class cl_stack_op *op) +{ + bool incr= sp_increased(); // FIXME + bool op_incr= op->sp_increased(); // FIXME + + if ((incr && !op_incr) || + (!incr && op_incr)) + { + printf("BIGBIG ERROR!\n"); + return(DD_FALSE); + } + if (incr) + { + t_mem opa= op->get_after(); + return(SP_before >= opa); + } + else + { + t_mem opa= op->get_after(); + return(SP_before <= opa); + } +} + + +/* + * CALL operation on stack + */ + +cl_stack_call::cl_stack_call(t_addr iPC, t_addr called, t_addr pushed, + t_addr iSP_before, t_addr iSP_after): + cl_stack_op(stack_call, iPC, iSP_before, iSP_after) +{ + called_addr= called; + pushed_addr= pushed; +} + +class cl_stack_op * +cl_stack_call::mk_copy(void) +{ + class cl_stack_call *so= new cl_stack_call(*this); + return(so); +} + +const char * +cl_stack_call::get_op_name(void) +{ + return("call"); +} + +void +cl_stack_call::print_info(class cl_console_base *con) +{ + con->dd_printf("0x%06"_A_"x", called_addr); +} + +const char * +cl_stack_call::get_matching_name(void) +{ + return("ret"); +} + +enum stack_op +cl_stack_call::get_matching_op(void) +{ + return(stack_ret); +} + +bool +cl_stack_call::match(class cl_stack_op *op) +{ + return(op->get_op() == stack_ret); +} + + +/* + * INTERRUPT operation (call) on stack + */ + +cl_stack_intr::cl_stack_intr(t_addr iPC, t_addr called, t_addr pushed, + t_addr iSP_before, t_addr iSP_after): + cl_stack_call(iPC, called, pushed, iSP_before, iSP_after) +{ + //called_addr= called; + //pushed_addr= pushed; + operation= stack_intr; +} + +class cl_stack_op * +cl_stack_intr::mk_copy(void) +{ + class cl_stack_intr *so= new cl_stack_intr(*this); + return(so); +} + +const char * +cl_stack_intr::get_op_name(void) +{ + return("intr"); +} + +void +cl_stack_intr::print_info(class cl_console_base *con) +{ + con->dd_printf("0x%06"_A_"x", called_addr); +} + +const char * +cl_stack_intr::get_matching_name(void) +{ + return("iret"); +} + +enum stack_op +cl_stack_intr::get_matching_op(void) +{ + return(stack_iret); +} + +int +cl_stack_intr::match(class cl_stack_op *op) +{ + return(op->get_op() == stack_iret); +} + + +/* + * PUSH operation on stack + */ + +cl_stack_push::cl_stack_push(t_addr iPC, t_mem idata, + t_addr iSP_before, t_addr iSP_after): + cl_stack_op(stack_push, iPC, iSP_before, iSP_after) +{ + data= idata; +} + +class cl_stack_op * +cl_stack_push::mk_copy(void) +{ + class cl_stack_push *so= new cl_stack_push(*this); + return(so); +} + +const char * +cl_stack_push::get_op_name(void) +{ + return("push"); +} + +const char * +cl_stack_push::get_matching_name(void) +{ + return("pop"); +} + +enum stack_op +cl_stack_push::get_matching_op(void) +{ + return(stack_pop); +} + +void +cl_stack_push::print_info(class cl_console_base *con) +{ + t_addr d= data; + con->dd_printf("0x%06"_A_"x", d); +} + +int +cl_stack_push::match(class cl_stack_op *op) +{ + return(op->get_op() == stack_pop); +} + + +/* + * RETURN operation on stack + */ + +cl_stack_ret::cl_stack_ret(t_addr iPC, t_addr iaddr, + t_addr iSP_before, t_addr iSP_after): + cl_stack_call(iPC, iaddr, 0, iSP_before, iSP_after) +{ + operation= stack_ret; +} + +class cl_stack_op * +cl_stack_ret::mk_copy(void) +{ + class cl_stack_ret *so= new cl_stack_ret(*this); + return(so); +} + +const char * +cl_stack_ret::get_op_name(void) +{ + return("ret"); +} + +const char * +cl_stack_ret::get_matching_name(void) +{ + return("call"); +} + +enum stack_op +cl_stack_ret::get_matching_op(void) +{ + return(stack_call); +} + +int +cl_stack_ret::match(class cl_stack_op *op) +{ + return(op->get_op() == stack_call); +} + + +/* + * RETURN from interrupt operation on stack + */ + +cl_stack_iret::cl_stack_iret(t_addr iPC, t_addr iaddr, + t_addr iSP_before, t_addr iSP_after): + cl_stack_ret(iPC, iaddr, iSP_before, iSP_after) +{ + operation= stack_iret; +} + +class cl_stack_op * +cl_stack_iret::mk_copy(void) +{ + class cl_stack_iret *so= new cl_stack_iret(*this); + return(so); +} + +const char * +cl_stack_iret::get_op_name(void) +{ + return("iret"); +} + +const char * +cl_stack_iret::get_matching_name(void) +{ + return("intr"); +} + +enum stack_op +cl_stack_iret::get_matching_op(void) +{ + return(stack_intr); +} + +int +cl_stack_iret::match(class cl_stack_op *op) +{ + return(op->get_op() == stack_intr); +} + + +/* + * POP operation on stack + */ + +cl_stack_pop::cl_stack_pop(t_addr iPC, t_mem idata, + t_addr iSP_before, t_addr iSP_after): + cl_stack_push(iPC, idata, iSP_before, iSP_after) +{ + operation= stack_pop; +} + +class cl_stack_op * +cl_stack_pop::mk_copy(void) +{ + class cl_stack_pop *so= new cl_stack_pop(*this); + return(so); +} + +const char * +cl_stack_pop::get_op_name(void) +{ + return("pop"); +} + +const char * +cl_stack_pop::get_matching_name(void) +{ + return("push"); +} + +enum stack_op +cl_stack_pop::get_matching_op(void) +{ + return(stack_push); +} + +int +cl_stack_pop::match(class cl_stack_op *op) +{ + return(op->get_op() == stack_push); +} + + +/* + * Stack Errors + */ + +cl_error_stack::cl_error_stack(void) +{ + classification = stack_error_registry.find("stack"); +} + +/* Stack Tracker Errors */ + +cl_error_stack_tracker::cl_error_stack_tracker(void) +{ + classification = stack_error_registry.find("stack_tracker"); +} + +/* Stack Tracker: wrong handle */ + +cl_error_stack_tracker_wrong_handle::cl_error_stack_tracker_wrong_handle(bool write_op): + cl_error_stack_tracker() +{ + write_operation= write_op; + classification = stack_error_registry.find("stack_tracker_wrong_handle"); +} + +void +cl_error_stack_tracker_wrong_handle::print(class cl_commander_base *c) +{ + c->dd_printf("%s: wrong stack tracker handle called for %s operation\n", + get_type_name(), write_operation?"write":"read"); +} + +/* Stack Tracker: operation on empty stack */ + +cl_error_stack_tracker_empty:: +cl_error_stack_tracker_empty(class cl_stack_op *op): + cl_error_stack_tracker() +{ + operation= op->mk_copy(); + classification = stack_error_registry.find("operation_on_empty_stack"); +} + +cl_error_stack_tracker_empty::~cl_error_stack_tracker_empty(void) +{ + delete operation; +} + +void +cl_error_stack_tracker_empty::print(class cl_commander_base *c) +{ + c->dd_printf("%s(0x%06"_A_"x: %s on empty stack, PC=" + "0x06"_A_"x, SP=0x%06"_A_"x->0x%06"_A_"x\n", + get_type_name(), operation->get_pc(), operation->get_op_name(), + operation->get_before(), operation->get_after()); +} + +/* Stack Tracker: operation on empty stack */ + +cl_error_stack_tracker_unmatch:: +cl_error_stack_tracker_unmatch(class cl_stack_op *Top, class cl_stack_op *op): + cl_error_stack_tracker() +{ + top= Top->mk_copy(); + operation= op->mk_copy(); + classification = stack_error_registry.find("stack_operation_unmatched_to_top_of_stack"); +} + +cl_error_stack_tracker_unmatch::~cl_error_stack_tracker_unmatch(void) +{ + delete operation; + delete top; +} + +void +cl_error_stack_tracker_unmatch::print(class cl_commander_base *c) +{ + c->dd_printf("%s(0x%06"_A_"x): %s when %s expected, " + "SP=0x%06"_A_"x->0x%06"_A_"x\n", + get_type_name(), operation->get_pc(), + operation->get_op_name(), top->get_matching_name(), + operation->get_before(), operation->get_after()); +} + +/* Stack Tracker: stack is inconsistent */ + +cl_error_stack_tracker_inconsistent:: +cl_error_stack_tracker_inconsistent(class cl_stack_op *op, + int the_unread_data_size) +{ + operation= op->mk_copy(); + unread_data_size= the_unread_data_size; + classification = stack_error_registry.find("stack_looks_corrupted"); +} + +cl_error_stack_tracker_inconsistent::~cl_error_stack_tracker_inconsistent(void) +{ + delete operation; +} + +void +cl_error_stack_tracker_inconsistent::print(class cl_commander_base *c) +{ + c->dd_printf("%s(0x%06"_A_"x): %d byte(s) unread from the stack\n", + get_type_name(), operation->get_pc(), + unread_data_size); +} + +cl_stack_error_registry::cl_stack_error_registry(void) +{ + class cl_error_class *prev = stack_error_registry.find("non-classified"); + prev = register_error(new cl_error_class(err_error, "stack", prev, ERROR_OFF)); + prev = register_error(new cl_error_class(err_error, "stack_tracker", prev)); + prev = register_error(new cl_error_class(err_error, "stack_tracker_wrong_handle", prev)); + prev = register_error(new cl_error_class(err_error, "operation_on_empty_stack", prev)); + prev = register_error(new cl_error_class(err_warning, "stack_operation_unmatched_to_top_of_stack", prev)); + prev = register_error(new cl_error_class(err_warning, "stack_looks_corrupted", prev)); +} + + +/* End of sim.src/stack.cc */ diff --git a/sim/ucsim/sim.src/stackcl.h b/sim/ucsim/sim.src/stackcl.h new file mode 100644 index 0000000..bd2f357 --- /dev/null +++ b/sim/ucsim/sim.src/stackcl.h @@ -0,0 +1,248 @@ +/* + * Simulator of microcontrollers (sim.src/stackcl.h) + * + * Copyright (C) 2000,00 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef SIM_STACKCL_HEADER +#define SIM_STACKCL_HEADER + +#include "stypes.h" +#include "pobjcl.h" + + +enum stack_op { + stack_call = 0x01, + stack_intr = 0x02, + stack_push = 0x04, + stack_ret = 0x08, + stack_iret = 0x10, + stack_pop = 0x20 +}; + +const int stack_write_operation= (stack_call|stack_intr|stack_push); +const int stack_read_operation = (stack_ret|stack_iret|stack_pop); + +/* Abstraction of a stack operation */ +class cl_stack_op: public cl_base +{ +protected: + enum stack_op operation; + t_addr PC; // of instruction + t_addr SP_before; + t_addr SP_after; +public: + cl_stack_op(enum stack_op op, + t_addr iPC, t_addr iSP_before, t_addr iSP_after); + virtual ~cl_stack_op(void); + virtual class cl_stack_op *mk_copy(void); + static void info_head(class cl_console_base *con); + virtual void info(class cl_console_base *con, class cl_uc *uc); +protected: + virtual void print_info(class cl_console_base *con); +public: + virtual const char *get_op_name(void); + virtual const char *get_matching_name(void) { return("unknown"); } + virtual bool sp_increased(void); + virtual int data_size(void); + virtual bool match(class cl_stack_op *op); + virtual enum stack_op get_op(void) { return(operation); } + virtual enum stack_op get_matching_op(void) { return(operation); } + virtual t_addr get_after(void) { return(SP_after); } + virtual t_addr get_before(void) { return(SP_before); } + virtual t_addr get_pc(void) { return(PC); } + virtual bool can_removed(class cl_stack_op *op); +}; + +/* Call of a subrutine, must match with RET */ +class cl_stack_call: public cl_stack_op +{ +protected: + t_addr called_addr; // called routine + t_addr pushed_addr; +public: + cl_stack_call(t_addr iPC, t_addr called, t_addr pushed, + t_addr iSP_before, t_addr iSP_after); + virtual class cl_stack_op *mk_copy(void); +protected: + virtual const char *get_op_name(void); + virtual void print_info(class cl_console_base *con); +public: + virtual const char *get_matching_name(void); + virtual enum stack_op get_matching_op(void); + virtual bool match(class cl_stack_op *op); +}; + +/* Call of an ISR, must match with IRET */ +class cl_stack_intr: public cl_stack_call +{ +public: + cl_stack_intr(t_addr iPC, t_addr called, t_addr pushed, + t_addr iSP_before, t_addr iSP_after); + virtual class cl_stack_op *mk_copy(void); +protected: + virtual const char *get_op_name(void); + virtual void print_info(class cl_console_base *con); +public: + virtual const char *get_matching_name(void); + virtual enum stack_op get_matching_op(void); + virtual bool match(class cl_stack_op *op); +}; + +/* Push data to stack, must match with POP */ +class cl_stack_push: public cl_stack_op +{ +protected: + t_mem data; // pushed data +public: + cl_stack_push(t_addr iPC, t_mem idata, t_addr iSP_before, t_addr iSP_after); + virtual class cl_stack_op *mk_copy(void); +protected: + virtual const char *get_op_name(void); + virtual void print_info(class cl_console_base *con); +public: + virtual const char *get_matching_name(void); + virtual enum stack_op get_matching_op(void); + virtual bool match(class cl_stack_op *op); +}; + +/* Returning from a subroutine, tos must be CALL */ +class cl_stack_ret: public cl_stack_call +{ +public: + cl_stack_ret(t_addr iPC, t_addr iaddr, t_addr iSP_before, t_addr iSP_after); + virtual class cl_stack_op *mk_copy(void); +protected: + virtual const char *get_op_name(void); +public: + virtual const char *get_matching_name(void); + virtual enum stack_op get_matching_op(void); + virtual bool match(class cl_stack_op *op); +}; + +/* Returning from an ISR, yos must be INTR */ +class cl_stack_iret: public cl_stack_ret +{ +public: + cl_stack_iret(t_addr iPC, t_addr iaddr, t_addr iSP_before, t_addr iSP_after); + virtual class cl_stack_op *mk_copy(void); +protected: + virtual const char *get_op_name(void); +public: + virtual const char *get_matching_name(void); + virtual enum stack_op get_matching_op(void); + virtual bool match(class cl_stack_op *op); +}; + +/* Pop out data from stack, tos must be PUSH */ +class cl_stack_pop: public cl_stack_push +{ +public: + cl_stack_pop(t_addr iPC, t_mem idata, t_addr iSP_before, t_addr iSP_after); + virtual class cl_stack_op *mk_copy(void); +protected: + virtual const char *get_op_name(void); +public: + virtual const char *get_matching_name(void); + virtual enum stack_op get_matching_op(void); + virtual bool match(class cl_stack_op *op); +}; + + +/* + * All kind of stack errors + */ +class cl_error_stack: public cl_error +{ +private: + static class cl_error_class *error_stack_class; +public: + cl_error_stack(void); +}; + +/* + * All kind of stack tracker errors + */ +class cl_error_stack_tracker: public cl_error_stack +{ +public: + cl_error_stack_tracker(void); +}; + +class cl_error_stack_tracker_wrong_handle: public cl_error_stack_tracker +{ +public: + bool write_operation; +public: + cl_error_stack_tracker_wrong_handle(bool write_op); + + virtual void print(class cl_commander_base *c); +}; + +class cl_error_stack_tracker_empty: public cl_error_stack_tracker +{ +protected: + class cl_stack_op *operation; +public: + cl_error_stack_tracker_empty(class cl_stack_op *op); + virtual ~cl_error_stack_tracker_empty(void); + + virtual void print(class cl_commander_base *c); +}; + +class cl_error_stack_tracker_unmatch: public cl_error_stack_tracker +{ +protected: + class cl_stack_op *top, *operation; +public: + cl_error_stack_tracker_unmatch(class cl_stack_op *Top, + class cl_stack_op *op); + virtual ~cl_error_stack_tracker_unmatch(void); + + virtual void print(class cl_commander_base *c); +}; + +class cl_error_stack_tracker_inconsistent: public cl_error_stack_tracker +{ +protected: + class cl_stack_op *operation; + int unread_data_size; +public: + cl_error_stack_tracker_inconsistent(class cl_stack_op *op, + int the_unread_data_size); + virtual ~cl_error_stack_tracker_inconsistent(void); + + virtual void print(class cl_commander_base *c); +}; + +class cl_stack_error_registry: public cl_error_registry +{ +public: + cl_stack_error_registry(void); +}; + +#endif + + +/* End of sim.src/stackcl.h */ diff --git a/sim/ucsim/sim.src/test_mem_speed.cc b/sim/ucsim/sim.src/test_mem_speed.cc new file mode 100644 index 0000000..8290b93 --- /dev/null +++ b/sim/ucsim/sim.src/test_mem_speed.cc @@ -0,0 +1,99 @@ +#include +#include +#include + +#include "memcl.h" +#include "hwcl.h" + +#include "newcmdcl.h" + +static int go; + +static void +alarmed(int sig) +{ + go= 0; + signal(sig, alarmed); +} + +class cl_hw_test: public cl_hw +{ +public: + cl_hw_test(void): cl_hw(0, HW_PORT, 0, "0") {} + virtual t_mem r(class cl_cell *cell, t_addr addr); + virtual void write(class cl_mem *mem, t_addr addr, t_mem *val); +}; + +t_mem +cl_hw_test::r(class cl_cell *cell, t_addr addr) +{ + return(cell->get()); +} + +void +cl_hw_test::write(class cl_mem *mem, t_addr addr, t_mem *val) +{ +} + +double +do_rw_test(class cl_mem *mem, int time) +{ + double counter; + t_addr a; + t_mem d; + + go= 1; + counter= 0; + alarm(time); + while (go) + for (a= 0; go && a < mem->size; a++) + { + t_mem d2; + for (d2= 0; go && d2 <= 255; d2++) + { + d2= mem->write(a, d2); + d= mem->read(a); + if (d != d2) + printf("%"_M_"d written to mem and %"_M_"d read back!\n", d2, d); + counter+= 1; + } + } + return(counter); +} + +int +main(void) +{ + int i; + class cl_mem *mem; + class cl_m *m2; + class cl_console_base *con; + + signal(SIGALRM, alarmed); + con= new cl_console_base(stdin, stdout, 0); + + mem= new cl_mem(MEM_SFR, "egy", 0x10000, 8, 0); + mem->init(); + printf("%g operations on classic memory within 5 sec\n", + do_rw_test(mem, 5)); + //mem->dump(con); + + m2= new cl_m(MEM_TYPES, "test", 0x10000, 8, 0); + m2->init(); + printf("%g operations on new memory within 5 sec\n", + do_rw_test(m2, 5)); + + class cl_hw_test *hw= new cl_hw_test(); + for (i= 0; i < 0x10000; i++) + { + class cl_cell *c= m2->get_cell(i); + int dummy; + if (c) + c->add_hw(hw, &dummy); + } + printf("%g operations on new memory within 5 sec with hw read\n", + do_rw_test(m2, 5)); + //m2->dump(con); + + return(0); +} diff --git a/sim/ucsim/sim.src/uc.cc b/sim/ucsim/sim.src/uc.cc new file mode 100644 index 0000000..2361bf4 --- /dev/null +++ b/sim/ucsim/sim.src/uc.cc @@ -0,0 +1,1888 @@ +/* + * Simulator of microcontrollers (uc.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include +#include +#include +#include "i_string.h" + +// prj +#include "globals.h" +#include "utils.h" + +// cmd.src +#include "newcmdcl.h" +#include "cmduccl.h" +#include "bpcl.h" +#include "getcl.h" +#include "setcl.h" +#include "infocl.h" +#include "timercl.h" +#include "cmdstatcl.h" +#include "cmdmemcl.h" +#include "cmdutil.h" + +// local, sim.src +#include "uccl.h" +#include "hwcl.h" +#include "memcl.h" +#include "simcl.h" +#include "itsrccl.h" + +static class cl_uc_error_registry uc_error_registry; + +/* + * Clock counter + */ + +cl_ticker::cl_ticker(int adir, int in_isr, const char *aname) +{ + options= TICK_RUN; + if (in_isr) + options|= TICK_INISR; + dir= adir; + ticks= 0; + set_name(aname); +} + +cl_ticker::~cl_ticker(void) {} + +int +cl_ticker::tick(int nr) +{ + if (options&TICK_RUN) + ticks+= dir*nr; + return(ticks); +} + +double +cl_ticker::get_rtime(double xtal) +{ + double d; + + d= (double)ticks/xtal; + return(d); +} + +void +cl_ticker::dump(int nr, double xtal, class cl_console_base *con) +{ + con->dd_printf("timer #%d(\"%s\") %s%s: %g sec (%lu clks)\n", + nr, get_name("unnamed"), + (options&TICK_RUN)?"ON":"OFF", + (options&TICK_INISR)?",ISR":"", + get_rtime(xtal), ticks); +} + + +/* + * Options of uc + */ + +cl_xtal_option::cl_xtal_option(class cl_uc *the_uc): + cl_optref(the_uc) +{ + uc= the_uc; +} + +void +cl_xtal_option::option_changed(void) +{ + if (!uc) + return; + double d; + option->get_value(&d); + uc->xtal= d; +} + + +/* + * Abstract microcontroller + ****************************************************************************** + */ + +cl_uc::cl_uc(class cl_sim *asim): + cl_base() +{ + //int i; + sim = asim; + //mems= new cl_list(MEM_TYPES, 1); + memchips= new cl_list(2, 2, "memchips"); + address_spaces= new cl_address_space_list(this); + //address_decoders= new cl_list(2, 2); + rom= 0; + + hws = new cl_hws(); + //options= new cl_list(2, 2); + //for (i= MEM_ROM; i < MEM_TYPES; i++) mems->add(0); + xtal_option= new cl_xtal_option(this); + xtal_option->init(); + ticks= new cl_ticker(+1, 0, "time"); + isr_ticks= new cl_ticker(+1, TICK_INISR, "isr"); + idle_ticks= new cl_ticker(+1, TICK_IDLE, "idle"); + counters= new cl_list(2, 2, "counters"); + it_levels= new cl_list(2, 2, "it levels"); + it_sources= new cl_irqs(2, 2); + class it_level *il= new it_level(-1, 0, 0, 0); + it_levels->push(il); + stack_ops= new cl_list(2, 2, "stack operations"); + errors= new cl_list(2, 2, "errors in uc"); + events= new cl_list(2, 2, "events in uc"); + sp_max= 0; + sp_avg= 0; + inst_exec= DD_FALSE; +} + + +cl_uc::~cl_uc(void) +{ + //delete mems; + delete hws; + //delete options; + delete ticks; + delete isr_ticks; + delete idle_ticks; + delete counters; + events->disconn_all(); + delete events; + delete fbrk; + delete ebrk; + delete it_levels; + delete it_sources; + delete stack_ops; + errors->free_all(); + delete errors; + delete xtal_option; + delete address_spaces; + delete memchips; + //delete address_decoders; +} + + +int +cl_uc::init(void) +{ + int i; + + set_name("controller"); + cl_base::init(); + if (xtal_option->use("xtal")) + xtal= xtal_option->get_value(xtal); + else + xtal= 11059200; + make_memories(); + rom= address_space(MEM_ROM_ID); + ebrk= new brk_coll(2, 2, rom); + fbrk= new brk_coll(2, 2, rom); + fbrk->Duplicates= DD_FALSE; + brk_counter= 0; + mk_hw_elements(); + reset(); + class cl_cmdset *cs= sim->app->get_commander()->cmdset; + build_cmdset(cs); + + for (i= 0; i < sim->app->in_files->count; i++) + { + char *fname= (char *)(sim->app->in_files->at(i)); + long l; + if ((l= read_hex_file(fname)) >= 0) + { + sim->app->get_commander()->all_printf("%ld words read from %s\n", + l, fname); + } + } + return(0); +} + +const char * +cl_uc::id_string(void) +{ + return("unknown microcontroller"); +} + +void +cl_uc::reset(void) +{ + class it_level *il; + + instPC= PC= 0; + state = stGO; + ticks->ticks= 0; + isr_ticks->ticks= 0; + idle_ticks->ticks= 0; + /*FIXME should we clear user counters?*/ + il= (class it_level *)(it_levels->top()); + while (il && + il->level >= 0) + { + il= (class it_level *)(it_levels->pop()); + delete il; + il= (class it_level *)(it_levels->top()); + } + sp_max= 0; + sp_avg= 0; + + stack_ops->free_all(); + + int i; + for (i= 0; i < hws->count; i++) + { + class cl_hw *hw= (class cl_hw *)(hws->at(i)); + hw->reset(); + } +} + +/* + * Making elements + */ + +void +cl_uc::make_memories(void) +{} + +/*t_addr +cl_uc::get_mem_size(char *id) +{ + class cl_memory *m= memory(id); + return(m?(m->get_size()):0); +} + +int +cl_uc::get_mem_width(char *id) +{ + class cl_memory *m= memory(id); + return(m?(m->width):8); +} +*/ +void +cl_uc::mk_hw_elements(void) +{ +} + +void +cl_uc::build_cmdset(class cl_cmdset *cmdset) +{ + class cl_cmd *cmd; + class cl_super_cmd *super_cmd; + class cl_cmdset *cset; + + cmdset->add(cmd= new cl_state_cmd("state", 0, +"state State of microcontroller", +"long help of state")); + cmd->init(); + +#ifdef STATISTIC + cmdset->add(cmd= new cl_statistic_cmd("statistic", 0, +"statistic [mem [startaddr [endaddr]]]\n" +" Statistic of memory accesses", +"long help of statistic")); + cmd->init(); +#endif + + cmdset->add(cmd= new cl_file_cmd("file", 0, +"file \"FILE\" Load FILE into ROM", +"long help of file")); + cmd->init(); + cmd->add_name("load"); + + cmdset->add(cmd= new cl_dl_cmd("download", 0, +"download Load (intel.hex) data", +"long help of download")); + cmd->init(); + cmd->add_name("dl"); + + cmdset->add(cmd= new cl_pc_cmd("pc", 0, +"pc [addr] Set/get PC", +"long help of pc")); + cmd->init(); + + cmdset->add(cmd= new cl_reset_cmd("reset", 0, +"reset Reset", +"long help of reset")); + cmd->init(); + + cmdset->add(cmd= new cl_dump_cmd("dump", DD_TRUE, +"dump memory_type [start [stop [bytes_per_line]]]\n" +" Dump memory of specified type\n" +"dump bit... Dump bits", +"long help of dump")); + cmd->init(); + + cmdset->add(cmd= new cl_dch_cmd("dch", DD_TRUE, +"dch [start [stop]] Dump code in hex form", +"long help of dch")); + cmd->init(); + + cmdset->add(cmd= new cl_dc_cmd("dc", DD_TRUE, +"dc [start [stop]] Dump code in disass form", +"long help of dc")); + cmd->init(); + + cmdset->add(cmd= new cl_disassemble_cmd("disassemble", DD_TRUE, +"disassemble [start [offset [lines]]]\n" +" Disassemble code", +"long help of disassemble")); + cmd->init(); + + cmdset->add(cmd= new cl_fill_cmd("fill", 0, +"fill memory_type start end data\n" +" Fill memory region with data", +"long help of fill")); + cmd->init(); + + cmdset->add(cmd= new cl_where_cmd("where", 0, +"where memory_type data...\n" +" Case unsensitive search for data", +"long help of where")); + cmd->init(); + + cmdset->add(cmd= new cl_Where_cmd("Where", 0, +"Where memory_type data...\n" +" Case sensitive search for data", +"long help of Where")); + cmd->init(); + + cmdset->add(cmd= new cl_break_cmd("break", 0, +"break addr [hit] Set fix breakpoint\n" +"break mem_type r|w addr [hit]\n" +" Set fix event breakpoint", +"long help of break")); + cmd->init(); + + cmdset->add(cmd= new cl_tbreak_cmd("tbreak", 0, +"tbreak addr [hit] Set temporary breakpoint\n" +"tbreak mem_type r|w addr [hit]\n" +" Set temporary event breakpoint", +"long help of tbreak")); + cmd->init(); + + cmdset->add(cmd= new cl_clear_cmd("clear", 0, +"clear [addr...] Clear fix breakpoint", +"long help of clear")); + cmd->init(); + + cmdset->add(cmd= new cl_delete_cmd("delete", 0, +"delete [nr...] Delete breakpoint(s)", +"long help of clear")); + cmd->init(); + + { + super_cmd= (class cl_super_cmd *)(cmdset->get_cmd("get")); + if (super_cmd) + cset= super_cmd->commands; + else { + cset= new cl_cmdset(); + cset->init(); + } + cset->add(cmd= new cl_get_sfr_cmd("sfr", 0, +"get sfr address...\n" +" Get value of addressed SFRs", +"long help of get sfr")); + cmd->init(); + /*cset->add(cmd= new cl_get_option_cmd("option", 0, +"get option name\n" +" Get value of an option", +"long help of get option")); +cmd->init();*/ + } + if (!super_cmd) + { + cmdset->add(cmd= new cl_super_cmd("get", 0, +"get subcommand Get, see `get' command for more help", +"long help of get", cset)); + cmd->init(); + } + + { + super_cmd= (class cl_super_cmd *)(cmdset->get_cmd("set")); + if (super_cmd) + cset= super_cmd->commands; + else { + cset= new cl_cmdset(); + cset->init(); + } + cset->add(cmd= new cl_set_mem_cmd("memory", 0, +"set memory memory_type address data...\n" +" Place list of data into memory", +"long help of set memory")); + cmd->init(); + cset->add(cmd= new cl_set_bit_cmd("bit", 0, +"set bit addr 0|1 Set specified bit to 0 or 1", +"long help of set bit")); + cmd->init(); + cset->add(cmd= new cl_set_hw_cmd("hardware", 0, +"set hardware cathegory params...\n" +" Set parameters of specified hardware element", +"long help of set hardware")); + cmd->add_name("hw"); + cmd->init(); + } + if (!super_cmd) + { + cmdset->add(cmd= new cl_super_cmd("set", 0, +"set subcommand Set, see `set' command for more help", +"long help of set", cset)); + cmd->init(); + } + + { // info + super_cmd= (class cl_super_cmd *)(cmdset->get_cmd("info")); + if (super_cmd) + cset= super_cmd->get_subcommands(); + else { + cset= new cl_cmdset(); + cset->init(); + } + cset->add(cmd= new cl_info_bp_cmd("breakpoints", 0, +"info breakpoints Status of user-settable breakpoints", +"long help of info breakpoints")); + cmd->add_name("bp"); + cmd->init(); + cset->add(cmd= new cl_info_reg_cmd("registers", 0, +"info registers List of integer registers and their contents", +"long help of info registers")); + cmd->init(); + cset->add(cmd= new cl_info_hw_cmd("hardware", 0, +"info hardware cathegory\n" +" Status of hardware elements of the CPU", +"long help of info hardware")); + cmd->add_name("hw"); + cmd->init(); + cset->add(cmd= new cl_info_stack_cmd("stack", 0, +"info stack Status of stack of the CPU", +"long help of info stack")); + cmd->init(); + cset->add(cmd= new cl_info_memory_cmd("memory", 0, +"info memory Information about memory system", +"long help of info memory")); + cmd->init(); + } + if (!super_cmd) { + cmdset->add(cmd= new cl_super_cmd("info", 0, +"info subcommand Information, see `info' command for more help", +"long help of info", cset)); + cmd->init(); + } + + { + super_cmd= (class cl_super_cmd *)(cmdset->get_cmd("timer")); + if (super_cmd) + cset= super_cmd->get_subcommands(); + else { + cset= new cl_cmdset(); + cset->init(); + } + cset->add(cmd= new cl_timer_add_cmd("add", 0, +"timer add id [direction [in_isr]]\n" +" Create a clock counter (timer)", +"log help of timer add")); + cmd->init(); + cmd->add_name("create"); + cmd->add_name("make"); + cset->add(cmd= new cl_timer_delete_cmd("delete", 0, +"timer delete id Delete a timer", +"long help of timer delete")); + cmd->init(); + cmd->add_name("remove"); + cset->add(cmd= new cl_timer_get_cmd("get", 0, +"timer get [id] Get value of a timer, or all", +"long help of timer get")); + cmd->init(); + cset->add(cmd= new cl_timer_run_cmd("run", 0, +"timer start id Start a timer", +"long help of timer run")); + cmd->init(); + cmd->add_name("start"); + cset->add(cmd= new cl_timer_stop_cmd("stop", 0, +"timer stop id Stop a timer", +"long help of timer stop")); + cmd->init(); + cset->add(cmd= new cl_timer_value_cmd("set", 0, +"timer set id value\n" +" Set a timer value", +"long help of timer set")); + cmd->init(); + cmd->add_name("value"); + } + if (!super_cmd) { + cmdset->add(cmd= new cl_super_cmd("timer", 0, +"timer subcommand Manage timers", +"long help of timer", cset)); + cmd->init(); + } + + { + super_cmd= (class cl_super_cmd *)(cmdset->get_cmd("memory")); + if (super_cmd) + cset= super_cmd->get_subcommands(); + else { + cset= new cl_cmdset(); + cset->init(); + } + /* + cset->add(cmd= new cl_memory_cmd("_no_parameters_", 0, +"memory Information about memory system", +"long help of memory")); + cmd->init(); + */ + cset->add(cmd= new cl_memory_createchip_cmd("createchip", 0, +"memory createchip id size cellsize\n" +" Create a new memory chip", +"long help of memory createchip")); + cmd->init(); + cmd->add_name("cchip"); + cset->add(cmd= new cl_memory_createaddressspace_cmd("createaddressspace", 0, +"memory createaddressspace id startaddr size\n" +" Create address space", +"long help of memory createaddressspace")); + cmd->init(); + cmd->add_name("createaddrspace"); + cmd->add_name("createaspace"); + cmd->add_name("caddressspace"); + cmd->add_name("caddrspace"); + cmd->add_name("caspace"); + cset->add(cmd= new cl_memory_createaddressdecoder_cmd("createaddressdecoder", 0, +"memory createaddressdecoder addressspace begin end chip begin\n" +" Create address decoder", +"long help of memory createaddressdecoder")); + cmd->init(); + cmd->add_name("createaddrdecoder"); + cmd->add_name("createadecoder"); + cmd->add_name("caddressdecoder"); + cmd->add_name("caddrdecoder"); + cmd->add_name("cadecoder"); + } + if (!super_cmd) { + cmdset->add(cmd= new cl_super_cmd("memory", 0, +"memory subcommand Manage memory chips and address spaces", +"long help of memory", cset)); + cmd->init(); + } +} + + +/* + * Read/write simulated memory + */ + +t_mem +cl_uc::read_mem(const char *id, t_addr addr) +{ + class cl_address_space *m= address_space(id); + + return(m?(m->read(addr)):0); +} + +t_mem +cl_uc::get_mem(const char *id, t_addr addr) +{ + class cl_address_space *m= address_space(id); + + return(m?(m->get(addr)):0); +} + +void +cl_uc::write_mem(const char *id, t_addr addr, t_mem val) +{ + class cl_address_space *m= address_space(id); + + if (m) + m->write(addr, val); +} + +void +cl_uc::set_mem(const char *id, t_addr addr, t_mem val) +{ + class cl_address_space *m= address_space(id); + + if(m) + m->set(addr, val); +} + + +/* +class cl_memory * +cl_uc::mem(enum mem_class type) +{ + class cl_m *m; + + if (mems->count < type) + m= (class cl_m *)(mems->at(MEM_DUMMY)); + else + m= (class cl_m *)(mems->at(type)); + return(m); +} +*/ + +class cl_address_space * +cl_uc::address_space(const char *id) +{ + int i; + + if (!id || + !(*id)) + return(0); + for (i= 0; i < address_spaces->count; i++) + { + class cl_address_space *m= (cl_address_space *)(address_spaces->at(i)); + if (!m || + !m->have_real_name()) + continue; + if (m->is_inamed(id)) + return(m); + } + return(0); +} + +class cl_memory * +cl_uc::memory(const char *id) +{ + int i; + + if (!id || + !(*id)) + return(0); + for (i= 0; i < address_spaces->count; i++) + { + class cl_memory *m= (cl_memory *)(address_spaces->at(i)); + if (!m || + !m->have_real_name()) + continue; + if (m->is_inamed(id)) + return(m); + } + for (i= 0; i < memchips->count; i++) + { + class cl_memory *m= (cl_memory *)(memchips->at(i)); + if (!m || + !m->have_real_name()) + continue; + if (m->is_inamed(id)) + return(m); + } + return(0); +} + + +static long +ReadInt(FILE *f, bool *ok, int bytes) +{ + char s2[3]; + long l= 0; + + *ok= DD_FALSE; + while (bytes) + { + if (fscanf(f, "%2c", &s2[0]) == EOF) + return(0); + s2[2]= '\0'; + l= l*256 + strtol(s2, NULL, 16); + bytes--; + } + *ok= DD_TRUE; + return(l); +} + + +/* + * Reading intel hexa file into EROM + *____________________________________________________________________________ + * + * If parameter is a NULL pointer, this function reads data from `cmd_in' + * + */ + +long +cl_uc::read_hex_file(const char *nam) +{ + FILE *f; + int c; + long written= 0, recnum= 0; + + uchar dnum; // data number + uchar rtyp=0; // record type + uint addr= 0; // address + uchar rec[300]; // data record + uchar sum ; // checksum + uchar chk ; // check + int i; + bool ok, get_low= 1; + uchar low= 0, high; + + if (!rom) + { + sim->app->get_commander()-> + dd_printf("No ROM address space to read in.\n"); + return(-1); + } + + if (!nam) + { + sim->app->get_commander()-> + dd_printf("cl_uc::read_hex_file File name not specified\n"); + return(-1); + } + else + if ((f= fopen(nam, "r")) == NULL) + { + fprintf(stderr, "Can't open `%s': %s\n", nam, strerror(errno)); + return(-1); + } + + //memset(inst_map, '\0', sizeof(inst_map)); + ok= DD_TRUE; + while (ok && + rtyp != 1) + { + while (((c= getc(f)) != ':') && + (c != EOF)) ; + if (c != ':') + {fprintf(stderr, ": not found\n");break;} + recnum++; + dnum= ReadInt(f, &ok, 1);//printf("dnum=%02x",dnum); + chk = dnum; + addr= ReadInt(f, &ok, 2);//printf("addr=%04x",addr); + chk+= (addr & 0xff); + chk+= ((addr >> 8) & 0xff); + rtyp= ReadInt(f, &ok, 1);//printf("rtyp=%02x ",rtyp); + chk+= rtyp; + for (i= 0; ok && (i < dnum); i++) + { + rec[i]= ReadInt(f, &ok, 1);//printf("%02x",rec[i]); + chk+= rec[i]; + } + if (ok) + { + sum= ReadInt(f, &ok, 1);//printf(" sum=%02x\n",sum); + if (ok) + { + if (((sum + chk) & 0xff) == 0) + { + if (rtyp == 0) + { + if (rom->width > 8) + addr/= 2; + for (i= 0; i < dnum; i++) + { + if (rom->width <= 8) + { + rom->set(addr, rec[i]); + addr++; + written++; + } + else if (rom->width <= 16) + { + if (get_low) + { + low= rec[i]; + get_low= 0; + } + else + { + high= rec[i]; + rom->set(addr, (high*256)+low); + addr++; + written++; + get_low= 1; + } + } + } + } + else + if (rtyp != 1) + application->debug("Unknown record type %d(0x%x)\n", + rtyp, rtyp); + } + else + application->debug("Checksum error (%x instead of %x) in " + "record %ld.\n", chk, sum, recnum); + } + else + application->debug("Read error in record %ld.\n", recnum); + } + } + if (rom->width > 8 && + !get_low) + rom->set(addr, low); + + if (nam) + fclose(f); + application->debug("%ld records have been read\n", recnum); + analyze(0); + return(written); +} + + +/* + * Handling instruction map + * + * `inst_at' is checking if the specified address is in instruction + * map and `set_inst_at' marks the address in the map and + * `del_inst_at' deletes the mark. `there_is_inst' cheks if there is + * any mark in the map + */ + +bool +cl_uc::inst_at(t_addr addr) +{ + if (!rom) + return(0); + return(rom->get_cell_flag(addr, CELL_INST)); +} + +void +cl_uc::set_inst_at(t_addr addr) +{ + if (rom) + rom->set_cell_flag(addr, DD_TRUE, CELL_INST); +} + +void +cl_uc::del_inst_at(t_addr addr) +{ + if (rom) + rom->set_cell_flag(addr, DD_FALSE, CELL_INST); +} + +bool +cl_uc::there_is_inst(void) +{ + if (!rom) + return(0); + bool got= DD_FALSE; + t_addr addr; + for (addr= 0; rom->valid_address(addr) && !got; addr++) + got= rom->get_cell_flag(addr, CELL_INST); + return(got); +} + + +/* + * Manipulating HW elements of the CPU + ***************************************************************************** + */ + +/* Register callback hw objects for mem read/write */ + +/*void +cl_uc::register_hw_read(enum mem_class type, t_addr addr, class cl_hw *hw) +{ + class cl_m *m; + class cl_memloc *l; + + if ((m= (class cl_m*)mems->at(type))) + { + if ((l= m->read_locs->get_loc(addr)) == 0) + { + l= new cl_memloc(addr); + l->init(); + m->read_locs->add(l); + } + l->hws->add(hw); + } + else + printf("cl_uc::register_hw_read TROUBLE\n"); +}*/ + +/*void +cl_uc::register_hw_write(enum mem_class type, t_addr addr, class cl_hw *hw) +{ +}*/ + +/* Looking for a specific HW element */ + +class cl_hw * +cl_uc::get_hw(enum hw_cath cath, int *idx) +{ + class cl_hw *hw= 0; + int i= 0; + + if (idx) + i= *idx; + for (; i < hws->count; i++) + { + hw= (class cl_hw *)(hws->at(i)); + if (hw->cathegory == cath) + break; + } + if (i >= hws->count) + return(0); + if (idx) + *idx= i; + return(hw); +} + +class cl_hw * +cl_uc::get_hw(char *id_string, int *idx) +{ + class cl_hw *hw= 0; + int i= 0; + + if (idx) + i= *idx; + for (; i < hws->count; i++) + { + hw= (class cl_hw *)(hws->at(i)); + if (strstr(hw->id_string, id_string) == hw->id_string) + break; + } + if (i >= hws->count) + return(0); + if (idx) + *idx= i; + return(hw); +} + +class cl_hw * +cl_uc::get_hw(enum hw_cath cath, int hwid, int *idx) +{ + class cl_hw *hw; + int i= 0; + + if (idx) + i= *idx; + hw= get_hw(cath, &i); + while (hw && + hw->id != hwid) + { + i++; + hw= get_hw(cath, &i); + } + if (hw && + idx) + *idx= i; + return(hw); +} + +class cl_hw * +cl_uc::get_hw(char *id_string, int hwid, int *idx) +{ + class cl_hw *hw; + int i= 0; + + if (idx) + i= *idx; + hw= get_hw(id_string, &i); + while (hw && + hw->id != hwid) + { + i++; + hw= get_hw(id_string, &i); + } + if (hw && + idx) + *idx= i; + return(hw); +} + + +/* + * Help of the command interpreter + */ + +struct dis_entry * +cl_uc::dis_tbl(void) +{ + static struct dis_entry empty= { 0, 0, 0, 0, NULL }; + return(&empty); +} + +struct name_entry * +cl_uc::sfr_tbl(void) +{ + static struct name_entry empty= { 0, 0 }; + return(&empty); +} + +struct name_entry * +cl_uc::bit_tbl(void) +{ + static struct name_entry empty= { 0, 0 }; + return(&empty); +} + +const char * +cl_uc::disass(t_addr addr, const char *sep) +{ + char *buf; + + buf= (char*)malloc(100); + strcpy(buf, "uc::disass() unimplemented\n"); + return(buf); +} + +void +cl_uc::print_disass(t_addr addr, class cl_console_base *con) +{ + const char *dis; + class cl_brk *b; + int i; + + if (!rom) + return; + + t_mem code= rom->get(addr); + b= fbrk_at(addr); + dis= disass(addr, NULL); + if (b) + con->dd_printf("%c", (b->perm == brkFIX)?'F':'D'); + else + con->dd_printf(" "); + con->dd_printf("%c ", inst_at(addr)?' ':'?'); + con->dd_printf(rom->addr_format, addr); con->dd_printf(" "); + con->dd_printf(rom->data_format, code); + for (i= 1; i < inst_length(addr); i++) + { + con->dd_printf(" "); + con->dd_printf(rom->data_format, rom->get(addr+i)); + } + int li= longest_inst(); + while (i < li) + { + int j; + j= rom->width/4 + ((rom->width%4)?1:0) + 1; + while (j) + con->dd_printf(" "), j--; + i++; + } + con->dd_printf(" %s\n", dis); + free((char *)dis); +} + +void +cl_uc::print_regs(class cl_console_base *con) +{ + con->dd_printf("No registers\n"); +} + +int +cl_uc::inst_length(t_addr addr) +{ + struct dis_entry *tabl= dis_tbl(); + int i; + t_mem code; + + if (!rom) + return(0); + + code = rom->get(addr); + for (i= 0; tabl[i].mnemonic && (code & tabl[i].mask) != tabl[i].code; i++) ; + return(tabl[i].mnemonic?tabl[i].length:1); +} + +int +cl_uc::inst_branch(t_addr addr) +{ + struct dis_entry *tabl= dis_tbl(); + int i; + t_mem code; + + if (!rom) + return(0); + + code = rom->get(addr); + for (i= 0; tabl[i].mnemonic && (code & tabl[i].mask) != tabl[i].code; i++) + ; + return tabl[i].branch; +} + +int +cl_uc::longest_inst(void) +{ + struct dis_entry *de= dis_tbl(); + int max= 0; + + while (de && + de->mnemonic) + { + if (de->length > max) + max= de->length; + de++; + } + return(max); +} + +bool +cl_uc::get_name(t_addr addr, struct name_entry tab[], char *buf) +{ + int i; + + i= 0; + while (tab[i].name && + (!(tab[i].cpu_type & type) || + (tab[i].addr != addr))) + i++; + if (tab[i].name) + strcpy(buf, tab[i].name); + return(tab[i].name != NULL); +} + +bool +cl_uc::symbol2address(char *sym, struct name_entry tab[], + t_addr *addr) +{ + int i; + + if (!sym || + !*sym) + return(DD_FALSE); + i= 0; + while (tab[i].name && + (!(tab[i].cpu_type & type) || + strcasecmp(sym, tab[i].name) != 0)) + i++; + if (tab[i].name) + { + if (addr) + *addr= tab[i].addr; + return(DD_TRUE); + } + return(DD_FALSE); +} + +char * +cl_uc::symbolic_bit_name(t_addr bit_address, + class cl_memory *mem, + t_addr mem_addr, + t_mem bit_mask) +{ + char *sym_name= 0; + int i; + + i= 0; + while (bit_tbl()[i].name && + (bit_tbl()[i].addr != bit_address)) + i++; + if (bit_tbl()[i].name) + { + sym_name= strdup(bit_tbl()[i].name); + return(sym_name); + } + + if (mem && + mem->have_real_name() && + strstr(mem->get_name(), "sfr") == mem->get_name()) + { + i= 0; + while (sfr_tbl()[i].name && + (sfr_tbl()[i].addr != mem_addr)) + i++; + if (sfr_tbl()[i].name) + sym_name= strdup(sfr_tbl()[i].name); + else + sym_name= 0; + } + if (!sym_name) + { + sym_name= (char *)malloc(16); + sprintf(sym_name, mem?(mem->addr_format):"0x%06x", mem_addr); + } + sym_name= (char *)realloc(sym_name, strlen(sym_name)+2); + strcat(sym_name, "."); + i= 0; + while (bit_mask > 1) + { + bit_mask>>=1; + i++; + } + char bitnumstr[10]; + sprintf(bitnumstr, "%1d", i); + strcat(sym_name, bitnumstr); + return(sym_name); +} + + +/* + * Messages to broadcast + */ + +bool +cl_uc::handle_event(class cl_event &event) +{ + switch (event.what) + { + case ev_address_space_added: + { + try { + class cl_event_address_space_added &e= + dynamic_cast(event); + address_space_added(e.as); + e.handle(); + } + catch (...) + { break; } + break; + } + default: + return(pass_event_down(event)); + break; + } + return(DD_FALSE); +} + +/* +void +cl_uc::mem_cell_changed(class cl_address_space *mem, t_addr addr) +{ + if (hws) + hws->mem_cell_changed(mem, addr); + else + printf("JAJ uc\n");//FIXME + if (mems && + mems->count) + { + int i; + for (i= 0; i < mems->count; i++) + { + } + } +} +*/ + +void +cl_uc::address_space_added(class cl_address_space *as) +{ + if (hws) + hws->address_space_added(as); + else + printf("JAJ uc\n");//FIXME +} + + +/* + * Error handling + */ + +void +cl_uc::error(class cl_error *error) +{ + errors->add(error); + if ((error->inst= inst_exec)) + error->PC= instPC; +} + +void +cl_uc::check_errors(void) +{ + int i; + class cl_commander_base *c= sim->app->get_commander(); + bool must_stop= DD_FALSE; + + if (c) + { + for (i= 0; i < errors->count; i++) + { + class cl_error *error= (class cl_error *)(errors->at(i)); + if (!error->is_on()) + continue; + error->print(c); + must_stop= must_stop || (error->get_type() & err_stop); + if (error->inst) + { + class cl_console_base *con; + con= c->actual_console; + if (!con) + con= c->frozen_console; + if (con) + { + con->dd_printf("Erronouse instruction: "); + print_disass(error->PC, con); + } + } + } + errors->free_all(); + } + else + fprintf(stderr, "no actual console, %d errors\n", errors->count); + if (must_stop) + sim->stop(resERROR); +} + + +/* + * Converting bit address into real memory + */ + +class cl_address_space * +cl_uc::bit2mem(t_addr bitaddr, t_addr *memaddr, t_mem *bitmask) +{ + if (memaddr) + *memaddr= bitaddr; + if (bitmask) + *bitmask= 1 << (bitaddr & 0x7); + return(0); // abstract... +} + + +/* + * Execution + */ + +int +cl_uc::tick_hw(int cycles) +{ + class cl_hw *hw; + int i;//, cpc= clock_per_cycle(); + + // tick hws + for (i= 0; i < hws->count; i++) + { + hw= (class cl_hw *)(hws->at(i)); + if (hw->flags & HWF_INSIDE) + hw->tick(cycles); + } + do_extra_hw(cycles); + return(0); +} + +void +cl_uc::do_extra_hw(int cycles) +{} + +int +cl_uc::tick(int cycles) +{ + //class cl_hw *hw; + int i, cpc= clock_per_cycle(); + + // increase time + ticks->tick(cycles * cpc); + class it_level *il= (class it_level *)(it_levels->top()); + if (il->level >= 0) + isr_ticks->tick(cycles * cpc); + if (state == stIDLE) + idle_ticks->tick(cycles * cpc); + for (i= 0; i < counters->count; i++) + { + class cl_ticker *t= (class cl_ticker *)(counters->at(i)); + if (t) + { + if ((t->options&TICK_INISR) || + il->level < 0) + t->tick(cycles * cpc); + } + } + + // tick for hardwares + inst_ticks+= cycles; + return(0); +} + +class cl_ticker * +cl_uc::get_counter(int nr) +{ + if (nr >= counters->count) + return(0); + return((class cl_ticker *)(counters->at(nr))); +} + +class cl_ticker * +cl_uc::get_counter(char *nam) +{ + int i; + + if (!nam) + return(0); + for (i= 0; i < counters->count; i++) + { + class cl_ticker *t= (class cl_ticker *)(counters->at(i)); + if (t && + t->get_name() && + strcmp(t->get_name(), nam) == 0) + return(t); + } + return(0); +} + +void +cl_uc::add_counter(class cl_ticker *ticker, int nr) +{ + while (counters->count <= nr) + counters->add(0); + counters->put_at(nr, ticker); +} + +void +cl_uc::add_counter(class cl_ticker *ticker, char */*nam*/) +{ + int i; + + if (counters->count < 1) + counters->add(0); + for (i= 1; i < counters->count; i++) + { + class cl_ticker *t= (class cl_ticker *)(counters->at(i)); + if (!t) + { + counters->put_at(i, ticker); + return; + } + } + counters->add(ticker); +} + +void +cl_uc::del_counter(int nr) +{ + class cl_ticker *t; + + if (nr >= counters->count) + return; + if ((t= (class cl_ticker *)(counters->at(0))) != 0) + delete t; + counters->put_at(nr, 0); +} + +void +cl_uc::del_counter(char *nam) +{ + int i; + + if (!nam) + return; + for (i= 0; i < counters->count; i++) + { + class cl_ticker *t= (class cl_ticker *)(counters->at(i)); + if (t && + t->get_name() && + strcmp(t->get_name(), nam) == 0) + { + delete t; + counters->put_at(i, 0); + return; + } + } +} + +/* + * Fetch without checking for breakpoint hit + */ + +t_mem +cl_uc::fetch(void) +{ + ulong code; + + if (!rom) + return(0); + + code= rom->read(PC); + PC= rom->inc_address(PC); + return(code); +} + +/* + * Fetch but checking for breakpoint hit first, returns TRUE if + * a breakpoint is hit + */ + +bool +cl_uc::fetch(t_mem *code) +{ + class cl_brk *brk; + int idx; + + if (!code) + return(0); + if ((sim->state & SIM_GO) && + rom) + { + if (rom->get_cell_flag(PC, CELL_FETCH_BRK) && + (brk= fbrk->get_bp(PC, &idx)) && + (brk->do_hit())) + { + if (brk->perm == brkDYNAMIC) + fbrk->del_bp(PC); + return(1); + } + } + *code= fetch(); + return(0); +} + +int +cl_uc::do_inst(int step) +{ + int res= resGO; + + if (step < 0) + step= 1; + while (step-- && + res == resGO) + { + pre_inst(); + res= exec_inst(); + post_inst(); + } + if (res != resGO) + sim->stop(res); + return(res); +} + +void +cl_uc::pre_inst(void) +{ + inst_exec= DD_TRUE; + inst_ticks= 0; + events->disconn_all(); +} + +int +cl_uc::exec_inst(void) +{ + instPC= PC; + return(resGO); +} + +void +cl_uc::post_inst(void) +{ + tick_hw(inst_ticks); + if (errors->count) + check_errors(); + if (events->count) + check_events(); + inst_exec= DD_FALSE; +} + + +/* + * Time related functions + */ + +double +cl_uc::get_rtime(void) +{ + /* double d; + + d= (double)ticks/xtal; + return(d);*/ + return(ticks->get_rtime(xtal)); +} + +int +cl_uc::clock_per_cycle(void) +{ + return(1); +} + + +/* + * Stack tracking system + */ + +void +cl_uc::stack_write(class cl_stack_op *op) +{ + if (op->get_op() & stack_read_operation) + { + class cl_error_stack_tracker_wrong_handle *e= new + cl_error_stack_tracker_wrong_handle(DD_FALSE); + //fprintf(stderr, "%06"_A_"x cl_uc::stack_read() should be called for " + //"%s\n", op->get_pc(), op->get_op_name()); + e->init(); + error(e); + return; + } + stack_ops->push(op); +} + +void +cl_uc::stack_read(class cl_stack_op *op) +{ + class cl_stack_op *top= (class cl_stack_op *)(stack_ops->top()); + + if (op->get_op() & stack_write_operation) + { + class cl_error_stack_tracker_wrong_handle *e= new + cl_error_stack_tracker_wrong_handle(DD_TRUE); + e->init(); + error(e); + //fprintf(stderr, "%06"_A_"x cl_uc::stack_write() should be called for " + //"%s\n", op->get_pc(), op->get_op_name()); + return; + } + if (!top) + { + class cl_error *e= new cl_error_stack_tracker_empty(op); + /*printf("0x%06"_A_"x %s operation on stack but no operation was before\n + ", + op->get_pc(), op->get_op_name());*/ + e->init(); + error(e); + return; + } + + if (top) + { + if (!top->match(op)) + { + class cl_error *e= new cl_error_stack_tracker_unmatch(top, op); + e->init(); + error(e); + /*printf("0x%06"_A_"x %s operation on stack but last was %s\n", + op->get_pc(), op->get_op_name(), top->get_op_name());*/ + } + int top_size= top->data_size(), op_size= op->data_size(); + if (top_size != op_size) + { + application->debug("0x%06"_A_"x %d bytes to read out of stack " + "but %d was pushed in last operation\n", + op->get_pc(), op_size, top_size); + } + } + + int removed= 0; + while (top && + top->can_removed(op)) + { + top= (class cl_stack_op *)stack_ops->pop(); + delete top; + top= (class cl_stack_op *)stack_ops->top(); + removed++; + } + if (removed != 1) + { + application->debug("0x%06"_A_"x %d ops removed from stack-tracker " + "when %s happened, top pc=0x%06"_A_"x " + "top before=0x%06"_A_"x op after=0x%06"_A_"x\n", + op->get_pc(), removed, op->get_op_name(), + top?(top->get_pc()):0, top?(top->get_before()):0, + op->get_after()); + } + + if (top) + { + int ta= top->get_after(), oa= op->get_after(); + if (ta != oa) + { + application->debug("0x%06"_A_"x stack still inconsistent after %s, " + "%d byte(s) should be read out; top after" + "=0x%06"_A_"x op after=0x%06"_A_"x\n", + op->get_pc(), op->get_op_name(), abs(ta-oa), + ta, oa); + class cl_error *e= + new cl_error_stack_tracker_inconsistent(op, abs(ta-oa)); + e->init(); + error(e); + } + } + + delete op; +} + + +/* + * Breakpoint handling + */ + +class cl_fetch_brk * +cl_uc::fbrk_at(t_addr addr) +{ + int idx; + + return((class cl_fetch_brk *)(fbrk->get_bp(addr, &idx))); +} + +class cl_ev_brk * +cl_uc::ebrk_at(t_addr addr, char *id) +{ + int i; + class cl_ev_brk *eb; + + for (i= 0; i < ebrk->count; i++) + { + eb= (class cl_ev_brk *)(ebrk->at(i)); + if (eb->addr == addr && + !strcmp(eb->id, id)) + return(eb); + } + return(0); +} + +/*void +cl_uc::rm_fbrk(long addr) +{ + fbrk->del_bp(addr); +}*/ + +/* Get a breakpoint specified by its number */ + +class cl_brk * +cl_uc::brk_by_nr(int nr) +{ + class cl_brk *bp; + + if ((bp= fbrk->get_bp(nr))) + return(bp); + if ((bp= ebrk->get_bp(nr))) + return(bp); + return(0); +} + +/* Get a breakpoint from the specified collection by its number */ + +class cl_brk * +cl_uc::brk_by_nr(class brk_coll *bpcoll, int nr) +{ + class cl_brk *bp; + + if ((bp= bpcoll->get_bp(nr))) + return(bp); + return(0); +} + +/* Remove an event breakpoint specified by its address and id */ + +void +cl_uc::rm_ebrk(t_addr addr, char *id) +{ + int i; + class cl_ev_brk *eb; + + for (i= 0; i < ebrk->count; i++) + { + eb= (class cl_ev_brk *)(ebrk->at(i)); + if (eb->addr == addr && + !strcmp(eb->id, id)) + ebrk->del_bp(i, 0); + } +} + +/* Remove a breakpoint specified by its number */ + +bool +cl_uc::rm_brk(int nr) +{ + class cl_brk *bp; + + if ((bp= brk_by_nr(fbrk, nr))) + { + fbrk->del_bp(bp->addr); + return(DD_TRUE); + } + else if ((bp= brk_by_nr(ebrk, nr))) + { + ebrk->del_bp(ebrk->index_of(bp), 0); + return(DD_TRUE); + } + return(DD_FALSE); +} + +void +cl_uc::put_breaks(void) +{} + +/* Remove all fetch and event breakpoints */ + +void +cl_uc::remove_all_breaks(void) +{ + while (fbrk->count) + { + class cl_brk *brk= (class cl_brk *)(fbrk->at(0)); + fbrk->del_bp(brk->addr); + } + while (ebrk->count) + ebrk->del_bp(ebrk->count-1, 0); +} + +int +cl_uc::make_new_brknr(void) +{ + if (brk_counter == 0) + return(brk_counter= 1); + if (fbrk->count == 0 && + ebrk->count == 0) + return(brk_counter= 1); + return(++brk_counter); +} + +class cl_ev_brk * +cl_uc::mk_ebrk(enum brk_perm perm, class cl_address_space *mem, + char op, t_addr addr, int hit) +{ + class cl_ev_brk *b; + op= toupper(op); + + b= new cl_ev_brk(mem, make_new_brknr(), addr, perm, hit, op); + b->init(); + return(b); +} + +void +cl_uc::check_events(void) +{ + int i; + for (i= 0; i < events->count; i++) + { + class cl_ev_brk *brk= + dynamic_cast(events->object_at(i)); + sim->stop(brk); + } + sim->stop(resBREAKPOINT); +} + + +/* + * Errors + *---------------------------------------------------------------------------- + */ + +cl_error_unknown_code::cl_error_unknown_code(class cl_uc *the_uc) +{ + uc= the_uc; + classification= uc_error_registry.find("unknown_code"); +} + +void +cl_error_unknown_code::print(class cl_commander_base *c) +{ + c->dd_printf("%s: unknown instruction code at ", get_type_name()); + if (uc->rom) + { + c->dd_printf(uc->rom->addr_format, PC); + c->dd_printf(" ("); + c->dd_printf(uc->rom->data_format, uc->rom->get(PC)); + c->dd_printf(")"); + } + else + c->dd_printf("0x%06x", PC); + c->dd_printf("\n"); +} + +cl_uc_error_registry::cl_uc_error_registry(void) +{ + class cl_error_class *prev = uc_error_registry.find("non-classified"); + prev = register_error(new cl_error_class(err_error, "unknown_code", prev, ERROR_OFF)); +} + + +/* End of uc.cc */ diff --git a/sim/ucsim/sim.src/uccl.h b/sim/ucsim/sim.src/uccl.h new file mode 100644 index 0000000..d39622b --- /dev/null +++ b/sim/ucsim/sim.src/uccl.h @@ -0,0 +1,267 @@ +/* + * Simulator of microcontrollers (sim.src/uccl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef SIM_UCCL_HEADER +#define SIM_UCCL_HEADER + +// prj +#include "stypes.h" +#include "pobjcl.h" + +// sim +#include "hwcl.h" +#include "memcl.h" +#include "brkcl.h" +#include "stackcl.h" + + +/* Counter to count clock ticks */ + +#define TICK_RUN 0x01 +#define TICK_INISR 0x02 +#define TICK_IDLE 0x03 + +class cl_ticker: public cl_base +{ +public: + unsigned long ticks; + int options; // see TICK_XXX above + int dir; + //char *name; + + cl_ticker(int adir, int in_isr, const char *aname); + virtual ~cl_ticker(void); + + virtual int tick(int nr); + virtual double get_rtime(double xtal); + virtual void dump(int nr, double xtal, class cl_console_base *con); +}; + + +/* Options of the microcontroller */ +class cl_xtal_option: public cl_optref +{ +protected: + class cl_uc *uc; +public: + cl_xtal_option(class cl_uc *the_uc); + virtual void option_changed(void); +}; + +/* Abstract microcontroller */ + +class cl_uc: public cl_base +{ +public: + int type; // CPU family + int technology; // CMOS, HMOS + int state; // GO, IDLE, PD + //class cl_list *options; + class cl_xtal_option *xtal_option; + + t_addr PC, instPC; // Program Counter + bool inst_exec; // Instruction is executed + class cl_ticker *ticks; // Nr of XTAL clocks + class cl_ticker *isr_ticks; // Time in ISRs + class cl_ticker *idle_ticks; // Time in idle mode + class cl_list *counters; // User definable timers (tickers) + int inst_ticks; // ticks of an instruction + double xtal; // Clock speed + + int brk_counter; // Number of breakpoints + class brk_coll *fbrk; // Collection of FETCH break-points + class brk_coll *ebrk; // Collection of EVENT breakpoints + class cl_sim *sim; + //class cl_list *mems; + class cl_hws *hws; + + class cl_list *memchips; // v3 + class cl_address_space_list *address_spaces; + class cl_address_space *rom; // Required for almost every uc + + //class cl_list *address_decoders; + + class cl_irqs *it_sources; // Sources of interrupts + class cl_list *it_levels; // Follow interrupt services + class cl_list *stack_ops; // Track stack operations + + class cl_list *errors; // Errors of instruction execution + class cl_list *events; // Events happened during inst exec + + t_addr sp_max; + t_addr sp_avg; + +public: + cl_uc(class cl_sim *asim); + virtual ~cl_uc(void); + virtual int init(void); + virtual const char *id_string(void); + virtual void reset(void); + + // making objects + //virtual class cl_m *mk_mem(enum mem_class type, char *class_name); + virtual void make_memories(void); + //virtual t_addr get_mem_size(char *id); + //virtual int get_mem_width(char *id); + virtual void mk_hw_elements(void); + virtual void build_cmdset(class cl_cmdset *cmdset); + + // manipulating memories + virtual t_mem read_mem(const char *id, t_addr addr); + virtual t_mem get_mem(const char *id, t_addr addr); + virtual void write_mem(const char *id, t_addr addr, t_mem val); + virtual void set_mem(const char *id, t_addr addr, t_mem val); + virtual class cl_address_space *address_space(const char *id); + virtual class cl_memory *memory(const char *id); + + // file handling + virtual long read_hex_file(const char *nam); + + // instructions, code analyzer + virtual void analyze(t_addr addr) {} + virtual bool inst_at(t_addr addr); + virtual void set_inst_at(t_addr addr); + virtual void del_inst_at(t_addr addr); + virtual bool there_is_inst(void); + + // manipulating hw elements + virtual class cl_hw *get_hw(enum hw_cath cath, int *idx); + virtual class cl_hw *get_hw(char *id_string, int *idx); + virtual class cl_hw *get_hw(enum hw_cath cath, int hwid, int *idx); + virtual class cl_hw *get_hw(char *id_string, int hwid, int *idx); + + // "virtual" timers + virtual int tick_hw(int cycles); + virtual void do_extra_hw(int cycles); + virtual int tick(int cycles); + virtual class cl_ticker *get_counter(int nr); + virtual class cl_ticker *get_counter(char *nam); + virtual void add_counter(class cl_ticker *ticker, int nr); + virtual void add_counter(class cl_ticker *ticker, char *nam); + virtual void del_counter(int nr); + virtual void del_counter(char *nam); + virtual double get_rtime(void); + virtual int clock_per_cycle(void); + + // execution + virtual t_mem fetch(void); + virtual bool fetch(t_mem *code); + virtual int do_inst(int step); + virtual void pre_inst(void); + virtual int exec_inst(void); + virtual void post_inst(void); + + virtual int it_priority(uchar ie_mask) {return(0);} + + // stack tracking + virtual void stack_write(class cl_stack_op *op); + virtual void stack_read(class cl_stack_op *op); + + // breakpoints + virtual class cl_fetch_brk *fbrk_at(t_addr addr); + virtual class cl_ev_brk *ebrk_at(t_addr addr, char *id); + virtual class cl_brk *brk_by_nr(int nr); + virtual class cl_brk *brk_by_nr(class brk_coll *bpcoll, int nr); + virtual void rm_ebrk(t_addr addr, char *id); + virtual bool rm_brk(int nr); + virtual void put_breaks(void); + virtual void remove_all_breaks(void); + virtual int make_new_brknr(void); + virtual class cl_ev_brk *mk_ebrk(enum brk_perm perm, + class cl_address_space *mem, + char op, t_addr addr, int hit); + virtual void check_events(void); + + // disassembling and symbol recognition + virtual const char *disass(t_addr addr, const char *sep); + virtual struct dis_entry *dis_tbl(void); + virtual struct name_entry *sfr_tbl(void); + virtual struct name_entry *bit_tbl(void); + virtual void print_disass(t_addr addr, class cl_console_base *con); + virtual void print_regs(class cl_console_base *con); + virtual int inst_length(t_addr addr); + virtual int inst_branch(t_addr addr); + virtual int longest_inst(void); + virtual bool get_name(t_addr addr, struct name_entry tab[], char *buf); + virtual bool symbol2address(char *sym, struct name_entry tab[], + t_addr *addr); + virtual char *symbolic_bit_name(t_addr bit_address, + class cl_memory *mem, + t_addr mem_addr, + t_mem bit_mask); + + /* Converting abstract address spaces into real ones */ + virtual class cl_address_space *bit2mem(t_addr bitaddr, + t_addr *memaddr, + t_mem *bitmask); + virtual t_addr bit_address(class cl_memory *mem, + t_addr mem_address, + int bit_number) { return(-1); } + + // messages from app to handle and broadcast + virtual bool handle_event(class cl_event &event); + //virtual void mem_cell_changed(class cl_address_space *mem, t_addr addr); + virtual void address_space_added(class cl_address_space *as); + + // Error handling + virtual void error(class cl_error *error); + virtual void check_errors(void); + + /* Following fields and virtual methods defined in uc51 I don't have + energy to redesign them:-( */ +public: + virtual void eram2xram(void) {} // Dirty hack for 51R + virtual void xram2eram(void) {} +}; + + +/* + * Errors + */ + +#include "errorcl.h" + +class cl_error_unknown_code: public cl_error +{ +protected: + class cl_uc *uc; +public: + cl_error_unknown_code(class cl_uc *the_uc); + + virtual void print(class cl_commander_base *c); +}; + +class cl_uc_error_registry: public cl_error_registry +{ +public: + cl_uc_error_registry(void); +}; + +#endif + + +/* End of uccl.h */ diff --git a/sim/ucsim/stypes.h b/sim/ucsim/stypes.h new file mode 100644 index 0000000..f738060 --- /dev/null +++ b/sim/ucsim/stypes.h @@ -0,0 +1,237 @@ +/* + * Simulator of microcontrollers (stypes.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef STYPES_HEADER +#define STYPES_HEADER + +#include "ddconfig.h" + + +typedef unsigned char uchar; +typedef unsigned int uint; +typedef unsigned long ulong; +typedef TYPE_DWORD t_addr; /* 32 bit max */ +typedef TYPE_UWORD t_mem; /* 16 bit max */ +typedef TYPE_WORD t_smem; /* signed 16 bit memory */ + +struct id_element +{ + int id; + const char *id_string; +}; + +enum error_type { + err_unknown = 0x01, + err_error = 0x02, + err_warning = 0x04 +}; + +// table of dissassembled instructions +struct dis_entry +{ + uint code, mask; + char branch; + uchar length; + const char *mnemonic; +}; + +// table entry of SFR and BIT names +struct name_entry +{ + int cpu_type; + t_addr addr; + const char *name; +}; + + +struct cpu_entry +{ + const char *type_str; + int type; + int technology; +}; + +#define CPU_51 0x0001 +#define CPU_31 0x0002 +#define CPU_52 0x0004 +#define CPU_32 0x0008 +#define CPU_51R 0x0010 +#define CPU_89C51R 0x0020 +#define CPU_251 0x0040 +#define CPU_DS390 0x0080 +#define CPU_DS390F 0x0100 +#define CPU_ALL_51 (CPU_51|CPU_31) +#define CPU_ALL_52 (CPU_52|CPU_32|CPU_51R|CPU_89C51R|CPU_251|CPU_DS390|CPU_DS390F) + +#define CPU_AVR 0x0001 +#define CPU_ALL_AVR (CPU_AVR) + +#define CPU_Z80 0x0001 +#define CPU_ALL_Z80 (CPU_Z80) + +#define CPU_XA 0x0001 +#define CPU_ALL_XA (CPU_XA) + +#define CPU_HC08 0x0001 +#define CPU_ALL_HC08 (CPU_HC08) + +#define CPU_CMOS 0x0001 +#define CPU_HMOS 0x0002 + +/* Classes of memories, this is index on the list */ +enum mem_class +{ + MEM_ROM= 0, + MEM_XRAM, + MEM_IRAM, + MEM_SFR, + MEM_DUMMY, + MEM_IXRAM, + MEM_TYPES +}; + +#define MEM_ROM_ID "rom" +#define MEM_SFR_ID "sfr" +#define MEM_XRAM_ID "xram" +#define MEM_IXRAM_ID "ixram" +#define MEM_IRAM_ID "iram" + +// States of simulator +#define SIM_NONE 0 +#define SIM_GO 0x01 // Processor is running +#define SIM_QUIT 0x02 // Program must exit + +/* States of CPU */ +#define stGO 0 /* Normal state */ +#define stIDLE 1 /* Idle mode is active */ +#define stPD 2 /* Power Down mode is active */ + +/* Result of instruction simulation */ +#define resGO 0 /* OK, go on */ +#define resWDTRESET 1 /* Reseted by WDT */ +#define resINTERRUPT 2 /* Interrupt accepted */ +#define resSTOP 100 /* Stop if result greather then this */ +#define resHALT 101 /* Serious error, halt CPU */ +#define resINV_ADDR 102 /* Invalid indirect address */ +#define resSTACK_OV 103 /* Stack overflow */ +#define resBREAKPOINT 104 /* Breakpoint */ +#define resUSER 105 /* Stopped by user */ +#define resINV_INST 106 /* Invalid instruction */ +#define resBITADDR 107 /* Bit address is uninterpretable */ +#define resERROR 108 /* Error happened during instruction exec */ + +#define BIT_MASK(bitaddr) (1 << (bitaddr & 0x07)) + +//#define IRAM_SIZE 256 /* Size of Internal RAM */ +//#define SFR_SIZE 256 /* Size of SFR area */ +//#define SFR_START 128 /* Start address of SFR area */ +//#define ERAM_SIZE 256 /* Size of ERAM in 51R */ +//#define XRAM_SIZE 0x10000 /* Size of External RAM */ +//#define IROM_SIZE 0x1000 /* Size of Internal ROM */ +//#define EROM_SIZE 0x10000 /* Size of External ROM */ + + +/* Type of breakpoints */ +enum brk_perm +{ + brkFIX, /* f */ + brkDYNAMIC /* d */ +}; + +enum brk_type +{ + brkFETCH, /* f */ + brkEVENT /* e */ +}; + +enum brk_event +{ + brkNONE, + brkWXRAM, /* wx */ + brkRXRAM, /* rx */ + brkRCODE, /* rc */ + brkWIRAM, /* wi */ + brkRIRAM, /* ri */ + brkWSFR, /* ws */ + brkRSFR, /* rs */ + brkREAD, + brkWRITE, + brkACCESS +}; + +//struct event_rec +//{ +// t_addr wx; /* write to XRAM at this address, else -1 */ +// t_addr rx; /* read from XRAM at this address, else -1 */ +// t_addr wi; /* write to IRAM at this address, else -1 */ +// t_addr ri; /* read from IRAM at this address, else -1 */ +// t_addr ws; /* write to SFR at this address, else -1 */ +// t_addr rs; /* read from SFR at this address, else -1 */ +// t_addr rc; /* read from ROM at this address, else -1 */ +//}; + +/* Interrupt levels */ +//#define IT_NO -1 /* not in interroupt service */ +#define IT_LOW 1 /* low level interrupt service */ +#define IT_HIGH 2 /* service of high priority interrupt */ + +/* cathegories of hw elements (peripherials) */ +enum hw_cath { + HW_DUMMY = 0x0000, + HW_TIMER = 0x0002, + HW_UART = 0x0004, + HW_PORT = 0x0008, + HW_PCA = 0x0010, + HW_INTERRUPT = 0x0020, + HW_WDT = 0x0040 +}; + +// Events that can happen in peripherals +enum hw_event { + EV_OVERFLOW, + EV_PORT_CHANGED, + EV_T2_MODE_CHANGED +}; + +// flags of hw units +#define HWF_NONE 0 +#define HWF_INSIDE 0x0001 +#define HWF_OUTSIDE 0x0002 +#define HWF_MISC 0x0004 + + +/* Letter cases */ +enum letter_case { + case_upper, /* all is upper case */ + case_lower, /* all is lower case */ + case_case /* first letter is upper, others are lower case */ +}; + + +#endif + +/* End of stypes.h */ diff --git a/sim/ucsim/ucsim.cc b/sim/ucsim/ucsim.cc new file mode 100644 index 0000000..bcb46c3 --- /dev/null +++ b/sim/ucsim/ucsim.cc @@ -0,0 +1,44 @@ +/* + * Simulator of microcontrollers (ucsim.cc) + * + * Copyright (C) 2001,01 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +// prj +#include "globals.h" +#include "appcl.h" + +int +main(int argc, char *argv[]) +{ + int ret; + + application= new cl_app(); + application->init(argc, argv); + ret= application->run(); + application->done(); + return(ret); +} + +/* End of sim.src/ucsim.cc */ diff --git a/sim/ucsim/utils.cc b/sim/ucsim/utils.cc new file mode 100644 index 0000000..eb648e7 --- /dev/null +++ b/sim/ucsim/utils.cc @@ -0,0 +1,198 @@ +/* + * Simulator of microcontrollers (utils.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include +#include +#include +#include +#include "i_string.h" + + // prj +#include "stypes.h" +#include "pobjcl.h" + + +int +get_sub_opt(char **option, const char * const *tokens, char **valuep) +{ + char *end, *equ; + int i; + + if (!(end= strchr(*option, ','))) + end= *option + strlen(*option); + else + *end++= '\0'; + if ((equ= strchr(*option, '='))) + { + *valuep= equ+1; + *equ= '\0'; + } + else + *valuep= 0; + i= 0; + while (tokens[i] && + strcmp(*option, tokens[i])) + i++; + if (!tokens[i]) + *valuep= *option; + *option= end; + return tokens[i]?i:-1; +} + + +const char * +get_id_string(struct id_element *ids, int id) +{ + int i= 0; + + while (ids[i].id_string && id != ids[i].id) + i++; + return(ids[i].id_string); +} + +const char * +get_id_string(struct id_element *ids, int id, const char *def) +{ + const char *s= get_id_string(ids, id); + + return(s?s:def); +} + +int +get_string_id(struct id_element *ids, const char *str) +{ + int i= 0; + + while (ids[i].id_string && strcmp(ids[i].id_string, str) != 0) + i++; + return(ids[i].id); +} + +int +get_string_id(struct id_element *ids, const char *str, int def) +{ + int i= 0; + + while (ids[i].id_string && strcmp(ids[i].id_string, str) != 0) + i++; + return(ids[i].id_string?ids[i].id:def); +} + + +extern "C" int vasprintf(char **strp, const char *format, va_list ap); +extern "C" int vsnprintf(char *str, size_t size,const char *format,va_list ap); + +char * +format_string(const char *format, ...) +{ + va_list ap; + + va_start(ap, format); +#ifdef HAVE_VASPRINTF + char *msg= NULL; + vasprintf(&msg, format, ap); + return(msg); +#elif defined HAVE_VSNPRINTF + char *msg= (char*)malloc(80*25); + vsnprintf(msg, 80*25, format, ap); + return(msg); +#elif defined HAVE__VSNPRINTF + char *msg= (char*)malloc(80*25); + _vsnprintf(msg, 80*25, format, ap); + return(msg); +#else +#error No vasprintf or vsnprintf +#endif + va_end(ap); + return(msg); +} + + +const char * +object_name(class cl_base *o) +{ + const char *name= 0; + + if (o) + name= o->get_name(); + if (name && *name) + return(name); + return("(unkown)"); +} + + +char * +case_string(enum letter_case lcase, const char *str) +{ + char *p= strdup(str); + char *s= p; + + switch (lcase) + { + case case_upper: + while (p && *p) + { + *p= toupper(*p); + p++; + } + break; + case case_lower: + while (p && *p) + { + *p= tolower(*p); + p++; + } + break; + case case_case: + if (!p || *p == '\0') + break; + while (isspace(*p)) + p++; + if (*p) + *p= toupper(*p); + break; + } + return(s); +} + +/*const char * +case_string(enum letter_case lcase, const char *str) +{ + char *p= NIL; + + if (!str || + !*str) + return(NIL); + p= strdup(str); + return case_string(lcase, p); +}*/ + + +/* End of utils.cc */ diff --git a/sim/ucsim/utils.h b/sim/ucsim/utils.h new file mode 100644 index 0000000..796654d --- /dev/null +++ b/sim/ucsim/utils.h @@ -0,0 +1,53 @@ +/* + * Simulator of microcontrollers (utils.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef UTILS_HEADER +#define UTILS_HEADER + +#include + +// prj +#include "stypes.h" + + +//#define TRACE printf +#define TRACE 1 ? (void)0 : (*(void (*)(const char *, ...))0) + + +extern int get_sub_opt(char **option, const char * const *tokens, char **valuep); +extern const char *get_id_string(struct id_element *ids, int id); +extern const char *get_id_string(struct id_element *ids, int id, const char *def); +extern int get_string_id(struct id_element *ids, const char *str); +extern int get_string_id(struct id_element *ids, const char *str, int def); +extern char *format_string(const char *format, ...); +extern const char *object_name(class cl_base *o); +extern char *case_string(enum letter_case lcase, const char *str); + + +#endif + +/* End of utils.h */ diff --git a/sim/ucsim/xa.src/(c).1 b/sim/ucsim/xa.src/(c).1 new file mode 100644 index 0000000..d673f9f --- /dev/null +++ b/sim/ucsim/xa.src/(c).1 @@ -0,0 +1,25 @@ +/* + * Simulator of microcontrollers (@@F@@) + * + * Copyright (C) @@S@@,@@Y@@ Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ diff --git a/sim/ucsim/xa.src/Makefile.in b/sim/ucsim/xa.src/Makefile.in new file mode 100644 index 0000000..90529f2 --- /dev/null +++ b/sim/ucsim/xa.src/Makefile.in @@ -0,0 +1,129 @@ +# +# uCsim xa.src/Makefile +# +# (c) Drotos Daniel, Talker Bt. 1997 +# + +STARTYEAR = 1997 + +SHELL = /bin/sh +CXX = @CXX@ +CPP = @CPP@ +CXXCPP = @CXXCPP@ +RANLIB = @RANLIB@ +INSTALL = @INSTALL@ +STRIP = @STRIP@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +EXEEXT = @EXEEXT@ + +DEFS = $(subs -DHAVE_CONFIG_H,,@DEFS@) +CPPFLAGS = @CPPFLAGS@ -I$(srcdir) -I$(top_srcdir) -I$(top_builddir) \ + -I$(top_srcdir)/cmd.src -I$(top_srcdir)/sim.src \ + -I$(top_srcdir)/gui.src +CFLAGS = @CFLAGS@ -Wall +CXXFLAGS = @CXXFLAGS@ -Wall +LDFLAGS = @LDFLAGS@ +M_OR_MM = @M_OR_MM@ + +LIBS = @LIBS@ -L$(top_builddir) -lsim -lucsimutil -lguiucsim -lcmd -lsim + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @infodir@ +srcdir = @srcdir@ +VPATH = @srcdir@ + +OBJECTS = sxa.o glob.o \ + inst.o \ + simxa.o xa.o + +XAASM = +#TEST_OBJ = test_bit.hex test_dis.hex test_mov.hex test_jmp.hex \ +# test_arith.hex + + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf otherlibs xa.src tests + +tests: $(TEST_OBJ) + + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: all installdirs + $(INSTALL) sxa$(EXEEXT) $(DESTDIR)$(bindir)/sxa$(EXEEXT) + $(STRIP) $(DESTDIR)$(bindir)/sxa$(EXEEXT) + + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(DESTDIR)$(bindir)/sxa$(EXEEXT) + + +# Performing self-test +# -------------------- +check: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + test -d $(DESTDIR)$(bindir) || $(INSTALL) -d $(DESTDIR)$(bindir) + + +# Creating dependencies +# --------------------- +dep: Makefile.dep + +Makefile.dep: $(srcdir)/*.cc $(srcdir)/*.h + $(CXXCPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.cc,$^) >Makefile.dep + +-include Makefile.dep +include $(srcdir)/clean.mk + +# My rules +# -------- +.SUFFIXES: .asm .hex + +xa.src: sxa$(EXEEXT) + +sxa$(EXEEXT): $(OBJECTS) $(top_builddir)/*.a + $(CXX) $(CXXFLAGS) $(LDFLAGS) -o $@ $(OBJECTS) $(LIBS) + +otherlibs: + $(MAKE) -C $(top_builddir)/cmd.src all + $(MAKE) -C $(top_builddir)/sim.src all + +.cc.o: + $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c $< -o $@ + +.asm.hex: + $(XAASM) -l $< -o $@ -e $<.lst + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f $(srcdir)/conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" freshconf;\ + fi + +# End of xa.src/Makefile.in diff --git a/sim/ucsim/xa.src/clean.mk b/sim/ucsim/xa.src/clean.mk new file mode 100644 index 0000000..f7f2416 --- /dev/null +++ b/sim/ucsim/xa.src/clean.mk @@ -0,0 +1,26 @@ +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + rm -f sxa$(EXEEXT) + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f config.cache config.log config.status + rm -f Makefile *.dep + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean + +# End of xa.src/clean.mk diff --git a/sim/ucsim/xa.src/conf.mk b/sim/ucsim/xa.src/conf.mk new file mode 100644 index 0000000..e6db37c --- /dev/null +++ b/sim/ucsim/xa.src/conf.mk @@ -0,0 +1,10 @@ +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_builddir) && $(SHELL) ./config.status + +# End of xa.src/conf.mk diff --git a/sim/ucsim/xa.src/glob.cc b/sim/ucsim/xa.src/glob.cc new file mode 100644 index 0000000..e17c6b5 --- /dev/null +++ b/sim/ucsim/xa.src/glob.cc @@ -0,0 +1,469 @@ +/* + * Simulator of microcontrollers (glob.cc) + * + * Copyright (C) 1999,2002 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * Other contributors include: + * Karl Bongers karl@turbobit.com, + * Johan Knol johan.knol@iduna.nl + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include + +#include "stypes.h" +#include "glob.h" + +/* this needs to match enum definition in glob.h */ +char *op_mnemonic_str[] = { +"BAD_OPCODE", +"ADD", +"ADDC", +"ADDS", +"AND", +"ANL", +"ASL", +"ASR", +"BCC", +"BCS", +"BEQ", +"BG", +"BGE", +"BGT", +"BKPT", +"BL", +"BLE", +"BLT", +"BMI", +"BNE", +"BNV", +"BOV", +"BPL", +"BR", +"CALL", +"CJNE", +"CLR", +"CMP", +"CPL", +"DA", +"DIV_w", +"DIV_d", +"DIVU_b", +"DIVU_w", +"DIVU_d", +"DJNZ", +"FCALL", +"FJMP", +"JB", +"JBC", +"JMP", +"JNB", +"JNZ", +"JZ", +"LEA", +"LSR", +"MOV", +"MOVC", +"MOVS", +"MOVX", +"MUL_w", +"MULU_b", +"MULU_w", +"NEG", +"NOP", +"NORM", +"OR", +"ORL", +"POP", +"POPU", +"PUSH", +"PUSHU", +"RESET", +"RET", +"RETI", +"RL", +"RLC", +"RR", +"RRC", +"SETB", +"SEXT", +"SUB", +"SUBB", +"TRAP", +"XCH", +"XOR", +}; + +/* this is junk, but we need to keep it until main ucSim code + is cleaned of dis_entry[] references. */ +struct dis_entry glob_disass_xa[]= { + { 0x0000, 0x00ff, ' ', 1, "nop" }, + { 0x0000, 0x00, 0, 0, NULL} +}; + +/* plan: keep this list in same order as in User Guide(pg 106) + until all op-codes are defined. Figure out how to make simulation + lookup fast later. */ +struct xa_dis_entry disass_xa[]= { + {0,0x0100,0xf700,' ',2,ADD, REG_REG }, // ADD Rd, Rs 0 0 0 0 S 0 0 1 d d d d s s s s + {0,0x0200,0xf708,' ',2,ADD, REG_IREG }, // ADD Rd, [Rs] 0 0 0 0 S 0 1 0 d d d d 0 s s s + {0,0x0208,0xf708,' ',2,ADD, IREG_REG }, // ADD [Rd], Rs 0 0 0 0 S 0 1 0 s s s s 1 d d d + {0,0x0400,0xf708,' ',3,ADD, REG_IREGOFF8 }, // ADD Rd, [Rs+offset8] 0 0 0 0 S 1 0 0 d d d d 0 s s s + {0,0x0408,0xf708,' ',3,ADD, IREGOFF8_REG }, // ADD [Rd+offset8], Rs 0 0 0 0 S 1 0 0 s s s s 1 d d d + {0,0x0500,0xf708,' ',4,ADD, REG_IREGOFF16 }, // ADD Rd, [Rs+offset16] 0 0 0 0 S 1 0 1 d d d d 0 s s s + {0,0x0508,0xf708,' ',4,ADD, IREGOFF16_REG }, // ADD [Rd+offset16], Rs 0 0 0 0 S 1 0 1 s s s s 1 d d d + {0,0x0300,0xf708,' ',2,ADD, REG_IREGINC }, // ADD Rd, [Rs+] 0 0 0 0 S 0 1 1 d d d d 0 s s s + {0,0x0308,0xf708,' ',2,ADD, IREGINC_REG }, // ADD [Rd+], Rs 0 0 0 0 S 0 1 1 s s s s 1 d d d + {0,0x0608,0xf708,' ',3,ADD, DIRECT_REG }, // ADD direct, Rs 0 0 0 0 S 1 1 0 s s s s 1 x x x + {0,0x0600,0xf708,' ',3,ADD, REG_DIRECT }, // ADD Rd, direct 0 0 0 0 S 1 1 0 d d d d 0 x x x + {0,0x9100,0xff0f,' ',3,ADD, REG_DATA8 }, // ADD Rd, #data8 1 0 0 1 0 0 0 1 d d d d 0 0 0 0 + {0,0x9900,0xff0f,' ',4,ADD, REG_DATA16 }, // ADD Rd, #data16 1 0 0 1 1 0 0 1 d d d d 0 0 0 0 + {0,0x9200,0xff8f,' ',3,ADD, IREG_DATA8 }, // ADD [Rd], #data8 1 0 0 1 0 0 1 0 0 d d d 0 0 0 0 + {0,0x9a00,0xff8f,' ',4,ADD, IREG_DATA16 }, // ADD [Rd], #data16 1 0 0 1 1 0 1 0 0 d d d 0 0 0 0 + {0,0x9300,0xff8f,' ',3,ADD, IREGINC_DATA8 }, // ADD [Rd+], #data8 1 0 0 1 0 0 1 1 0 d d d 0 0 0 0 + {0,0x9b00,0xff8f,' ',4,ADD, IREGINC_DATA16 }, // ADD [Rd+], #data16 1 0 0 1 1 0 1 1 0 d d d 0 0 0 0 + {0,0x9400,0xff8f,' ',4,ADD, IREGOFF8_DATA8 }, // ADD [Rd+offset8], #data8 1 0 0 1 0 1 0 0 0 d d d 0 0 0 0 + {0,0x9c00,0xff8f,' ',5,ADD, IREGOFF8_DATA16 }, // ADD [Rd+offset8], #data16 1 0 0 1 1 1 0 0 0 d d d 0 0 0 0 + {0,0x9500,0xff8f,' ',5,ADD, IREGOFF16_DATA8 }, // ADD [Rd+offset16], #data8 1 0 0 1 0 1 0 1 0 d d d 0 0 0 0 + {0,0x9d00,0xff8f,' ',6,ADD, IREGOFF16_DATA16}, // ADD [Rd+offset16], #data16 1 0 0 1 1 1 0 1 0 d d d 0 0 0 0 + {0,0x9600,0xff8f,' ',4,ADD, DIRECT_DATA8 }, // ADD direct, #data8 1 0 0 1 0 1 1 0 0 b b b 0 0 0 0 + {0,0x9e00,0xff8f,' ',5,ADD, DIRECT_DATA16 }, // ADD direct, #data16 1 0 0 1 1 1 1 0 0 b b b 0 0 0 0 + + {0,0x1100,0xf700,' ',2,ADDC,REG_REG }, //ADDC Rd, Rs 0 0 0 1 S 0 0 1 d d d d s s s s + {0,0x1200,0xf708,' ',2,ADDC,REG_IREG }, //ADDC Rd, [Rs] 0 0 0 1 S 0 1 0 d d d d 0 s s s + {0,0x1208,0xf708,' ',2,ADDC,IREG_REG }, //ADDC [Rd], Rs 0 0 0 1 S 0 1 0 s s s s 1 d d d + {0,0x1400,0xf708,' ',3,ADDC,REG_IREGOFF8 }, //ADDC Rd, [Rs+offset8] 0 0 0 1 S 1 0 0 d d d d 0 s s s + {0,0x1408,0xf708,' ',3,ADDC,IREGOFF8_REG }, //ADDC [Rd+offset8], Rs 0 0 0 1 S 1 0 0 s s s s 1 d d d + {0,0x1500,0xf708,' ',4,ADDC,REG_IREGOFF16 }, //ADDC Rd, [Rs+offset16] 0 0 0 1 S 1 0 1 d d d d 0 s s s + {0,0x1508,0xf708,' ',4,ADDC,IREGOFF16_REG }, //ADDC [Rd+offset16], Rs 0 0 0 1 S 1 0 1 s s s s 1 d d d + {0,0x1300,0xf708,' ',2,ADDC,REG_IREGINC }, //ADDC Rd, [Rs+] 0 0 0 1 S 0 1 1 d d d d 0 s s s + {0,0x1308,0xf708,' ',2,ADDC,IREGINC_REG }, //ADDC [Rd+], Rs 0 0 0 1 S 0 1 1 s s s s 1 d d d + {0,0x1608,0xf708,' ',3,ADDC,DIRECT_REG }, //ADDC direct, Rs 0 0 0 1 S 1 1 0 s s s s 1 x x x + {0,0x1600,0xf708,' ',3,ADDC,REG_DIRECT }, //ADDC Rd, direct 0 0 0 1 S 1 1 0 d d d d 0 x x x + {0,0x9101,0xff0f,' ',3,ADDC,REG_DATA8 }, //ADDC Rd, #data8 1 0 0 1 0 0 0 1 d d d d 0 0 0 1 + {0,0x9901,0xff0f,' ',4,ADDC,REG_DATA16 }, //ADDC Rd, #data16 1 0 0 1 1 0 0 1 d d d d 0 0 0 1 + {0,0x9201,0xff8f,' ',3,ADDC,IREG_DATA8 }, //ADDC [Rd], #data8 1 0 0 1 0 0 1 0 0 d d d 0 0 0 1 + {0,0x9a01,0xff8f,' ',4,ADDC,IREG_DATA16 }, //ADDC [Rd], #data16 1 0 0 1 1 0 1 0 0 d d d 0 0 0 1 + {0,0x9301,0xff8f,' ',3,ADDC,IREGINC_DATA8 }, //ADDC [Rd+], #data8 1 0 0 1 0 0 1 1 0 d d d 0 0 0 1 + {0,0x9b01,0xff8f,' ',4,ADDC,IREGINC_DATA16 }, //ADDC [Rd+], #data16 1 0 0 1 1 0 1 1 0 d d d 0 0 0 1 + {0,0x9401,0xff8f,' ',4,ADDC,IREGOFF8_DATA8 }, //ADDC [Rd+offset8], #data8 1 0 0 1 0 1 0 0 0 d d d 0 0 0 1 + {0,0x9c01,0xff8f,' ',5,ADDC,IREGOFF8_DATA16 }, //ADDC [Rd+offset8], #data16 1 0 0 1 1 1 0 0 0 d d d 0 0 0 1 + {0,0x9501,0xff8f,' ',5,ADDC,IREGOFF16_DATA8 }, //ADDC [Rd+offset16], #data8 1 0 0 1 0 1 0 1 0 d d d 0 0 0 1 + {0,0x9d01,0xff8f,' ',6,ADDC,IREGOFF16_DATA16}, //ADDC [Rd+offset16], #data16 1 0 0 1 1 1 0 1 0 d d d 0 0 0 1 + {0,0x9601,0xff8f,' ',4,ADDC,DIRECT_DATA8 }, //ADDC direct, #data8 1 0 0 1 0 1 1 0 0 b b b 0 0 0 1 + {0,0x9e01,0xff8f,' ',5,ADDC,DIRECT_DATA16 }, //ADDC direct, #data16 1 0 0 1 1 1 1 0 0 b b b 0 0 0 1 + + {0,0x1408,0xf780,' ',2,ADDS, REG_DATA4 }, // ADDS Rd, #data4 1 0 1 0 S 0 0 1 d d d d #data4 + {0,0x1408,0xf780,' ',2,ADDS, IREG_DATA4 }, // ADDS [Rd], #data4 1 0 1 0 S 0 1 0 0 d d d #data4 + {0,0x1408,0xf780,' ',2,ADDS, IREGINC_DATA4 }, // ADDS [Rd+], #data4 1 0 1 0 S 0 1 1 0 d d d #data4 + {0,0x1408,0xf780,' ',3,ADDS, IREGOFF8_DATA4 }, // ADDS [Rd+offset8], #data4 1 0 1 0 S 1 0 0 0 d d d #data4 + {0,0x1408,0xf780,' ',4,ADDS, IREGOFF16_DATA4}, // ADDS [Rd+offset16], #data4 1 0 1 0 S 1 0 1 0 d d d #data4 + {0,0x1408,0xf780,' ',3,ADDS, DIRECT_DATA4 }, // ADDS direct, #data4 1 0 1 0 S 1 1 0 0 x x x #data4 + + {0,0x5100,0xf700,' ',2, AND,REG_REG }, // AND Rd, Rs 0 1 0 1 S 0 0 1 d d d d s s s s + {0,0x5200,0xf708,' ',2, AND,REG_IREG }, // AND Rd, [Rs] 0 1 0 1 S 0 1 0 d d d d 0 s s s + {0,0x5208,0xf708,' ',2, AND,IREG_REG }, // AND [Rd], Rs 0 1 0 1 S 0 1 0 s s s s 1 d d d + {0,0x5400,0xf708,' ',3, AND,REG_IREGOFF8 }, // AND Rd, [Rs+offset8] 0 1 0 1 S 1 0 0 d d d d 0 s s s + {0,0x5408,0xf708,' ',3, AND,IREGOFF8_REG }, // AND [Rd+offset8], Rs 0 1 0 1 S 1 0 0 s s s s 1 d d d + {0,0x5500,0xf708,' ',4, AND,REG_IREGOFF16 }, // AND Rd, [Rs+offset16] 0 1 0 1 S 1 0 1 d d d d 0 s s s + {0,0x5508,0xf708,' ',4, AND,IREGOFF16_REG }, // AND [Rd+offset16], Rs 0 1 0 1 S 1 0 1 s s s s 1 d d d + {0,0x5300,0xf708,' ',2, AND,REG_IREGINC }, // AND Rd, [Rs+] 0 1 0 1 S 0 1 1 d d d d 0 s s s + {0,0x5308,0xf708,' ',2, AND,IREGINC_REG }, // AND [Rd+], Rs 0 1 0 1 S 0 1 1 s s s s 1 d d d + {0,0x5608,0xf708,' ',3, AND,DIRECT_REG }, // AND direct, Rs 0 1 0 1 S 1 1 0 s s s s 1 x x x + {0,0x5600,0xf708,' ',3, AND,REG_DIRECT }, // AND Rd, direct 0 1 0 1 S 1 1 0 d d d d 0 x x x + {0,0x9105,0xff0f,' ',3, AND,REG_DATA8 }, // AND Rd, #data8 1 0 0 1 0 0 0 1 d d d d 0 1 0 1 + {0,0x9905,0xff0f,' ',4, AND,REG_DATA16 }, // AND Rd, #data16 1 0 0 1 1 0 0 1 d d d d 0 1 0 1 + {0,0x9205,0xff8f,' ',3, AND,IREG_DATA8 }, // AND [Rd], #data8 1 0 0 1 0 0 1 0 0 d d d 0 1 0 1 + {0,0x9a05,0xff8f,' ',4, AND,IREG_DATA16 }, // AND [Rd], #data16 1 0 0 1 1 0 1 0 0 d d d 0 1 0 1 + {0,0x9305,0xff8f,' ',3, AND,IREGINC_DATA8 }, // AND [Rd+], #data8 1 0 0 1 0 0 1 1 0 d d d 0 1 0 1 + {0,0x9b05,0xff8f,' ',4, AND,IREGINC_DATA16 }, // AND [Rd+], #data16 1 0 0 1 1 0 1 1 0 d d d 0 1 0 1 + {0,0x9405,0xff8f,' ',4, AND,IREGOFF8_DATA8 }, // AND [Rd+offset8], #data8 1 0 0 1 0 1 0 0 0 d d d 0 1 0 1 + {0,0x9c05,0xff8f,' ',5, AND,IREGOFF8_DATA16 }, // AND [Rd+offset8], #data16 1 0 0 1 1 1 0 0 0 d d d 0 1 0 1 + {0,0x9505,0xff8f,' ',5, AND,IREGOFF16_DATA8 }, // AND [Rd+offset16], #data8 1 0 0 1 0 1 0 1 0 d d d 0 1 0 1 + {0,0x9d05,0xff8f,' ',6, AND,IREGOFF16_DATA16}, // AND [Rd+offset16], #data16 1 0 0 1 1 1 0 1 0 d d d 0 1 0 1 + {0,0x9605,0xff8f,' ',4, AND,DIRECT_DATA8 }, // AND direct, #data8 1 0 0 1 0 1 1 0 0 b b b 0 1 0 1 + {0,0x9e05,0xff8f,' ',5, AND,DIRECT_DATA16 }, // AND direct, #data16 1 0 0 1 0 1 1 0 1 b b b 0 1 0 1 + + {0,0x0840,0xfffc,' ',3,ANL, CY_BIT }, // ANL C, bit 0 0 0 0 1 0 0 0 0 1 0 0 0 0 b b lsbbit + {0,0x0850,0xfffc,' ',3,ANL, CY_NOTBIT }, // ANL C, /bit 0 0 0 0 1 0 0 0 0 1 0 1 0 0 b b lsbbit + {0,0xc150,0xf300,' ',2,ASL, REG_REG }, // ASL Rd, Rs 1 1 0 0 S S 0 1 d d d d s s s s + {0,0xdd00,0xff00,' ',2,ASL, REG_DATA5 }, // ASL Rd, #data5 (dword) 1 1 0 1 1 1 0 1 d d d #data5 + {0,0xd100,0xf700,' ',2,ASL, REG_DATA4 }, // ASL Rd, #data4 1 1 0 1 S S 0 1 d d d d #data4 + {0,0xc250,0xf300,' ',2,ASR, REG_REG }, // ASR Rd, Rs 1 1 0 0 S S 1 0 d d d d s s s s + {0,0xde00,0xff00,' ',2,ASR, REG_DATA5 }, // ASR Rd, #data5 (dword) 1 1 0 1 1 1 1 0 d d d #data5 + {0,0xd200,0xf700,' ',2,ASR, REG_DATA4 }, // ASR Rd, #data4 1 1 0 1 S S 1 0 d d d d #data4 + {1,0xf000,0xff00,' ',2,BCC, REL8 }, // BCC rel8 1 1 1 1 0 0 0 0 rel8 + {1,0xf100,0xff00,' ',2,BCS, REL8 }, // BCS rel8 1 1 1 1 0 0 0 1 rel8 + {1,0xf300,0xff00,' ',2,BEQ, REL8 }, // BEQ rel8 1 1 1 1 0 0 1 1 rel8 + {1,0xf800,0xff00,' ',2,BG, REL8 }, // BG rel8 1 1 1 1 1 0 0 0 rel8 + {1,0xfa00,0xff00,' ',2,BGE, REL8 }, // BGE rel8 1 1 1 1 1 0 1 0 rel8 + {1,0xfc00,0xff00,' ',2,BGT, REL8 }, // BGT rel8 1 1 1 1 1 1 0 0 rel8 + + {1,0xff00,0xff00,' ',1,BKPT, NO_OPERANDS }, // BKPT 1 1 1 1 1 1 1 1 + + {1,0xf900,0xff00,' ',2,BL, REL8 }, // BL rel8 1 1 1 1 1 0 0 1 rel8 + {1,0xfd00,0xff00,' ',2,BLE, REL8 }, // BLE rel8 1 1 1 1 1 1 0 1 rel8 + {1,0xfb00,0xff00,' ',2,BLT, REL8 }, // BLT rel8 1 1 1 1 1 0 1 1 rel8 + {1,0xf700,0xff00,' ',2,BMI, REL8 }, // BMI rel8 1 1 1 1 0 1 1 1 rel8 + {1,0xf200,0xff00,' ',2,BNE, REL8 }, // BNE rel8 1 1 1 1 0 0 1 0 rel8 + {1,0xf400,0xff00,' ',2,BNV, REL8 }, // BNV rel8 1 1 1 1 0 1 0 0 rel8 + {1,0xf500,0xff00,' ',2,BOV, REL8 }, // BOV rel8 1 1 1 1 0 1 0 1 rel8 + {1,0xf600,0xff00,' ',2,BPL, REL8 }, // BPL rel8 1 1 1 1 0 1 1 0 rel8 + {1,0xfe00,0xff00,' ',2,BR, REL8 }, // BR rel8 1 1 1 1 1 1 1 0 rel8 + + {1,0xc500,0xff00,'a',3,CALL, REL16 }, // CALL rel16 1 1 0 0 0 1 0 1 rel16 + {0,0xc600,0xfff8,'a',2,CALL, IREG }, // CALL [Rs] 1 1 0 0 0 1 1 0 0 0 0 0 0 s s s + + {0,0xe200,0xf708,' ',4,CJNE, REG_DIRECT_REL8}, // CJNE Rd, direct, rel8 1 1 1 0 S 0 1 0 d d d d 0 x x x + {0,0xe300,0xff0f,' ',4,CJNE, REG_DATA8_REL8}, // CJNE Rd, data8, rel8 1 1 1 0 0 0 1 1 d d d d 0 0 0 0 + {0,0xeb00,0xff0f,' ',5,CJNE, REG_DATA16_REL8}, // CJNE Rd, data16, rel8 1 1 1 0 1 0 1 1 d d d d 0 0 0 0 + {0,0xe308,0xff8f,' ',4,CJNE, IREG_DATA8_REL8}, // CJNE [Rd], data8, rel8 1 1 1 0 0 0 1 1 0 d d d 1 0 0 0 + {0,0xeb08,0xff8f,' ',5,CJNE, IREG_DATA16_REL8},// CJNE [Rd], data16, rel8 1 1 1 0 1 0 1 1 0 d d d 1 0 0 0 + + {0,0x0800,0xfffc,' ',3,CLR, BIT_ALONE }, // CLR bit 0 0 0 0 1 0 0 0 0 0 0 0 0 0 b b + {0,0x4100,0xf700,' ',2,CMP, REG_REG }, // CMP Rd, Rs 0 1 0 0 S 0 0 1 d d d d s s s s + {0,0x4200,0xf708,' ',2,CMP, REG_IREG }, // CMP Rd, [Rs] 0 1 0 0 S 0 1 0 d d d d 0 s s s + {0,0x4208,0xf708,' ',2,CMP, IREG_REG }, // CMP [Rd], Rs 0 1 0 0 S 0 1 0 s s s s 1 d d d + {0,0x4400,0xf708,' ',3,CMP, REG_IREGOFF8 }, // CMP Rd, [Rs+offset8] 0 1 0 0 S 1 0 0 d d d d 0 s s s + {0,0x4408,0xf708,' ',3,CMP, IREGOFF8_REG }, // CMP [Rd+offset8], Rs 0 1 0 0 S 1 0 0 s s s s 1 d d d + {0,0x4500,0xf708,' ',4,CMP, REG_IREGOFF16 }, // CMP Rd, [Rs+offset16] 0 1 0 0 S 1 0 1 d d d d 0 s s s + {0,0x4508,0xf708,' ',4,CMP, IREGOFF16_REG }, // CMP [Rd+offset16], Rs 0 1 0 0 S 1 0 1 s s s s 1 d d d + {0,0x4300,0xf708,' ',2,CMP, REG_IREGINC }, // CMP Rd, [Rs+] 0 1 0 0 S 0 1 1 d d d d 0 s s s + {0,0x4308,0xf708,' ',2,CMP, IREGINC_REG }, // CMP [Rd+], Rs 0 1 0 0 S 0 1 1 s s s s 1 d d d + {0,0x4608,0xf708,' ',3,CMP, DIRECT_REG }, // CMP direct, Rs 0 1 0 0 S 1 1 0 s s s s 1 x x x + {0,0x4600,0xf708,' ',3,CMP, REG_DIRECT }, // CMP Rd, direct 0 1 0 0 S 1 1 0 d d d d 0 x x x + {0,0x9104,0xff0f,' ',3,CMP, REG_DATA8 }, // CMP Rd, #data8 1 0 0 1 0 0 0 1 d d d d 0 1 0 0 + {0,0x9904,0xff0f,' ',4,CMP, REG_DATA16 }, // CMP Rd, #data16 1 0 0 1 1 0 0 1 d d d d 0 1 0 0 + {0,0x9204,0xff8f,' ',3,CMP, IREG_DATA8 }, // CMP [Rd], #data8 1 0 0 1 0 0 1 0 0 d d d 0 1 0 0 + {0,0x9a04,0xff8f,' ',4,CMP, IREG_DATA16 }, // CMP [Rd], #data16 1 0 0 1 1 0 1 0 0 d d d 0 1 0 0 + {0,0x9304,0xff8f,' ',3,CMP, IREGINC_DATA8 }, // CMP [Rd+], #data8 1 0 0 1 0 0 1 1 0 d d d 0 1 0 0 + {0,0x9b04,0xff8f,' ',4,CMP, IREGINC_DATA16 }, // CMP [Rd+], #data16 1 0 0 1 1 0 1 1 0 d d d 0 1 0 0 + {0,0x9404,0xff8f,' ',4,CMP, IREGOFF8_DATA8 }, // CMP [Rd+offset8], #data8 1 0 0 1 0 1 0 0 0 d d d 0 1 0 0 + {0,0x9c04,0xff8f,' ',5,CMP, IREGOFF8_DATA16 }, // CMP [Rd+offset8], #data16 1 0 0 1 1 1 0 0 0 d d d 0 1 0 0 + {0,0x9504,0xff8f,' ',5,CMP, IREGOFF16_DATA8 }, // CMP [Rd+offset16], #data8 1 0 0 1 0 1 0 1 0 d d d 0 1 0 0 + {0,0x9d04,0xff8f,' ',6,CMP, IREGOFF16_DATA16}, // CMP [Rd+offset16], #data16 1 0 0 1 1 1 0 1 0 d d d 0 1 0 0 + {0,0x9604,0xff8f,' ',4,CMP, DIRECT_DATA8 }, // CMP direct, #data8 1 0 0 1 0 1 1 0 0 b b b 0 1 0 0 + {0,0x9e04,0xff8f,' ',5,CMP, DIRECT_DATA16 }, // CMP direct, #data16 1 0 0 1 0 1 1 0 0 b b b 0 1 0 0 + {0,0x900c,0xf70f,' ',2,CPL, REG }, // CPL Rd 1 0 0 1 S 0 0 0 d d d d 1 0 1 0 + {0,0x9008,0xff0f,' ',2,DA, REG }, // DA Rd 1 0 0 1 0 0 0 0 d d d d 1 0 0 0 + {0,0xe708,0xff00,' ',2,DIV_w, REG_REG }, // DIV.w Rd, Rs 1 1 1 0 0 1 1 1 d d d d s s s s + {0,0xe80b,0xff0f,' ',3,DIV_w, REG_DATA8 }, // DIV.w Rd, #data8 1 1 1 0 1 0 0 0 d d d d 1 0 1 1 + {0,0xef00,0xff10,' ',2,DIV_d, REG_REG }, // DIV.d Rd, Rs 1 1 1 0 1 1 1 1 d d d 0 s s s s + {0,0xe909,0xff1f,' ',4,DIV_d, REG_DATA16 }, // DIV.d Rd, #data16 1 1 1 0 1 0 0 1 d d d 0 1 0 0 1 + {0,0xe101,0xff00,' ',3,DIVU_b, REG_REG }, // DIVU.b Rd, Rs 1 1 1 0 0 0 0 1 d d d d s s s s + {0,0xe801,0xff0f,' ',3,DIVU_b, REG_DATA8 }, // DIVU.b Rd, #data8 1 1 1 0 1 0 0 0 d d d d 0 0 0 1 + {0,0xe500,0xff00,' ',2,DIVU_w, REG_REG }, // DIVU.w Rd, Rs 1 1 1 0 0 1 0 1 d d d d s s s s + {0,0xe803,0xff0f,' ',3,DIVU_w, REG_DATA8 }, // DIVU.w Rd, #data8 1 1 1 0 1 0 0 0 d d d d 0 0 1 1 + {0,0xed00,0xff10,' ',2,DIVU_d, REG_REG }, // DIVU.d Rd, Rs 1 1 1 0 1 1 0 1 d d d 0 s s s s + {0,0xe901,0xff1f,' ',4,DIVU_d, REG_DATA16 }, // DIVU.d Rd, #data16 1 1 1 0 1 0 0 1 d d d 0 0 0 0 1 + + {0,0x8708,0xf70f,' ',3,DJNZ, REG_REL8 }, // DJNZ Rd, rel8 1 0 0 0 S 1 1 1 d d d d 1 0 0 0 + {0,0xe208,0xf7f8,' ',4,DJNZ, DIRECT_REL8 }, // DJNZ direct, rel8 1 1 1 0 S 0 1 0 0 0 0 0 1 x x x + + {1,0xc400,0xff00,' ',4,FCALL, ADDR24 }, // FCALL addr24 1 1 0 0 0 1 0 0 + {1,0xd400,0xff00,' ',4,FJMP, ADDR24 }, // FJMP addr24 1 1 0 1 0 1 0 0 + + {0,0x9780,0xfffc,' ',4, JB, BIT_REL8 }, // JB bit,rel8 1 0 0 1 0 1 1 1 1 0 0 0 0 0 b b + {0,0x97c0,0xfffc,' ',4, JBC, BIT_REL8 }, // JBC bit,rel8 1 0 0 1 0 1 1 1 1 1 0 0 0 0 b b + {1,0xd500,0xff00,' ',3, JMP, REL16 }, // JMP rel16 1 1 0 1 0 1 0 1 rel16 + {0,0xd670,0xfff8,' ',2, JMP, IREG }, // JMP [Rs] 1 1 0 1 0 1 1 0 0 1 1 1 0 s s s + {0,0xd646,0xffff,' ',2, JMP, A_PLUSDPTR }, // JMP [A+dptr] 1 1 0 1 0 1 1 0 0 1 0 0 0 1 1 0 + {0,0xd660,0xfff8,' ',2, JMP, IIREG }, // JMP [[Rs+]] 1 1 0 1 0 1 1 0 0 1 1 0 0 s s s + + {0,0x97a0,0xfffc,' ',4, JNB, BIT_REL8 }, // JNB bit,rel8 1 0 0 1 0 1 1 1 1 0 1 0 0 0 b b + {1,0xee00,0xff00,' ',2, JNZ, REL8 }, // JNZ rel8 1 1 1 0 1 1 1 0 rel8 + {1,0xec00,0xff00,' ',2, JZ, REL8 }, // JZ rel8 1 1 1 0 1 1 0 0 rel8 + {0,0x4000,0xff88,' ',3, LEA, REG_REGOFF8 }, // LEA Rd,Rs+offset8 0 1 0 0 0 0 0 0 0 d d d 0 s s s + {0,0x4800,0xff88,' ',3, LEA, REG_REGOFF16 }, // LEA Rd,Rs+offset16 0 1 0 0 0 0 0 0 0 d d d 0 s s s + /* LSR(3?) */ + + {0,0x8100,0xf700,' ',2,MOV, REG_REG }, // MOV Rd, Rs 1 0 0 0 S 0 0 1 d d d d s s s s + {0,0x8200,0xf708,' ',2,MOV, REG_IREG }, // MOV Rd, [Rs] 1 0 0 0 S 0 1 0 d d d d 0 s s s + {0,0x8208,0xf708,' ',2,MOV, IREG_REG }, // MOV [Rd], Rs 1 0 0 0 S 0 1 0 s s s s 1 d d d + {0,0x8400,0xf708,' ',3,MOV, REG_IREGOFF8 }, // MOV Rd, [Rs+offset8] 1 0 0 0 S 1 0 0 d d d d 0 s s s + {0,0x8408,0xf708,' ',3,MOV, IREGOFF8_REG }, // MOV [Rd+offset8], Rs 1 0 0 0 S 1 0 0 s s s s 1 d d d + {0,0x8500,0xf708,' ',4,MOV, REG_IREGOFF16 }, // MOV Rd, [Rs+offset16] 1 0 0 0 S 1 0 1 d d d d 0 s s s + {0,0x8508,0xf708,' ',4,MOV, IREGOFF16_REG }, // MOV [Rd+offset16], Rs 1 0 0 0 S 1 0 1 s s s s 1 d d d + {0,0x8300,0xf708,' ',2,MOV, REG_IREGINC }, // MOV Rd, [Rs+] 1 0 0 0 S 0 1 1 d d d d 0 s s s + {0,0x8308,0xf708,' ',2,MOV, IREGINC_REG }, // MOV [Rd+], Rs 1 0 0 0 S 0 1 1 s s s s 1 d d d + {0,0x8608,0xf708,' ',3,MOV, DIRECT_REG }, // MOV direct, Rs 1 0 0 0 S 1 1 0 s s s s 1 x x x + {0,0x8600,0xf708,' ',3,MOV, REG_DIRECT }, // MOV Rd, direct 1 0 0 0 S 1 1 0 d d d d 0 x x x + {0,0x9108,0xff0f,' ',3,MOV, REG_DATA8 }, // MOV Rd, #data8 1 0 0 1 0 0 0 1 d d d d 1 0 0 0 + {0,0x9908,0xff0f,' ',4,MOV, REG_DATA16 }, // MOV Rd, #data16 1 0 0 1 1 0 0 1 d d d d 1 0 0 0 + {0,0x9208,0xff8f,' ',3,MOV, IREG_DATA8 }, // MOV [Rd], #data8 1 0 0 1 0 0 1 0 0 d d d 1 0 0 0 + {0,0x9a08,0xff8f,' ',4,MOV, IREG_DATA16 }, // MOV [Rd], #data16 1 0 0 1 1 0 1 0 0 d d d 1 0 0 0 + {0,0x9308,0xff8f,' ',3,MOV, IREGINC_DATA8 }, // MOV [Rd+], #data8 1 0 0 1 0 0 1 1 0 d d d 1 0 0 0 + {0,0x9b08,0xff8f,' ',4,MOV, IREGINC_DATA16 }, // MOV [Rd+], #data16 1 0 0 1 1 0 1 1 0 d d d 1 0 0 0 + {0,0x9408,0xff8f,' ',4,MOV, IREGOFF8_DATA8 }, // MOV [Rd+offset8], #data8 1 0 0 1 0 1 0 0 0 d d d 1 0 0 0 + {0,0x9c08,0xff8f,' ',5,MOV, IREGOFF8_DATA16 }, // MOV [Rd+offset8], #data16 1 0 0 1 1 1 0 0 0 d d d 1 0 0 0 + {0,0x9508,0xff8f,' ',5,MOV, IREGOFF16_DATA8 }, // MOV [Rd+offset16], #data8 1 0 0 1 0 1 0 1 0 d d d 1 0 0 0 + {0,0x9d08,0xff8f,' ',6,MOV, IREGOFF16_DATA16}, // MOV [Rd+offset16], #data16 1 0 0 1 1 1 0 1 0 d d d 1 0 0 0 + {0,0x9608,0xff8f,' ',4,MOV, DIRECT_DATA8 }, // MOV direct, #data8 1 0 0 1 0 1 1 0 0 b b b 1 0 0 0 + {0,0x9e08,0xff8f,' ',5,MOV, DIRECT_DATA16 }, // MOV direct, #data16 1 0 0 1 0 1 1 0 0 b b b 1 0 0 0 + {0,0x9700,0xf788,' ',4,MOV, DIRECT_DIRECT }, // MOV direct, direct 1 0 0 1 S 1 1 1 0 d d d 0 d d d + {0,0x900f,0xff0f,' ',2,MOV, REG_USP }, // MOV Rd, USP 1 0 0 1 0 0 0 0 d d d d 1 1 1 1 + {0,0x980f,0xff0f,' ',2,MOV, USP_REG }, // MOV USP, RS 1 0 0 1 0 0 0 0 s s s s 1 1 1 1 + {0,0x0820,0xfffc,' ',3,MOV, CY_BIT }, // MOV C, bit 0 0 0 0 1 0 0 0 0 0 1 0 0 0 b b + {0,0x0830,0xfffc,' ',3,MOV, BIT_CY }, // MOV bit, C 0 0 0 0 1 0 0 0 0 0 1 1 0 0 b b + {0,0x8000,0xf308,' ',2,MOVC, REG_IREGINC }, // MOVC Rd,[Rs+] 1 0 0 0 S 0 0 0 d d d d 0 s s s + {0,0x904e,0xffff,' ',2,MOVC, A_APLUSDPTR }, // MOVC A,[A+DPTR] 1 0 0 1 0 0 0 0 0 1 0 0 1 1 1 0 + {0,0x904c,0xffff,' ',2,MOVC, A_APLUSPC }, // MOVC A,[A+PC] 1 0 0 1 0 0 0 0 0 1 0 0 1 1 0 0 + /* MOVS(6), MOVX(2), MUL.x(6) */ + + {0,0x900b,0xf70f,' ',2,NEG, REG }, // NEG Rd 1 0 0 1 S 0 0 0 d d d d 1 0 1 1 + {1,0x0000,0xff00,' ',1,NOP, NO_OPERANDS }, // NOP 0 0 0 0 0 0 0 0 + {0,0xc300,0xff00,' ',2,NORM, REG_REG }, // NORM Rd,Rs 1 1 0 0 S S 1 1 d d d d s s s s + {0,0x6100,0xf700,' ',2, OR, REG_REG }, // OR Rd, Rs 0 1 1 0 S 0 0 1 d d d d s s s s + {0,0x6200,0xf708,' ',2, OR, REG_IREG }, // OR Rd, [Rs] 0 1 1 0 S 0 1 0 d d d d 0 s s s + {0,0x6208,0xf708,' ',2, OR, IREG_REG }, // OR [Rd], Rs 0 1 1 0 S 0 1 0 s s s s 1 d d d + {0,0x6400,0xf708,' ',3, OR, REG_IREGOFF8 }, // OR Rd, [Rs+offset8] 0 1 1 0 S 1 0 0 d d d d 0 s s s + {0,0x6408,0xf708,' ',3, OR, IREGOFF8_REG }, // OR [Rd+offset8], Rs 0 1 1 0 S 1 0 0 s s s s 1 d d d + {0,0x6500,0xf708,' ',4, OR, REG_IREGOFF16 }, // OR Rd, [Rs+offset16] 0 1 1 0 S 1 0 1 d d d d 0 s s s + {0,0x6508,0xf708,' ',4, OR, IREGOFF16_REG }, // OR [Rd+offset16], Rs 0 1 1 0 S 1 0 1 s s s s 1 d d d + {0,0x6300,0xf708,' ',2, OR, REG_IREGINC }, // OR Rd, [Rs+] 0 1 1 0 S 0 1 1 d d d d 0 s s s + {0,0x6308,0xf708,' ',2, OR, IREGINC_REG }, // OR [Rd+], Rs 0 1 1 0 S 0 1 1 s s s s 1 d d d + {0,0x6608,0xf708,' ',3, OR, DIRECT_REG }, // OR direct, Rs 0 1 1 0 S 1 1 0 s s s s 1 x x x + {0,0x6600,0xf708,' ',3, OR, REG_DIRECT }, // OR Rd, direct 0 1 1 0 S 1 1 0 d d d d 0 x x x + {0,0x9106,0xff0f,' ',3, OR, REG_DATA8 }, // OR Rd, #data8 1 0 0 1 0 0 0 1 d d d d 0 1 1 0 + {0,0x9906,0xff0f,' ',4, OR, REG_DATA16 }, // OR Rd, #data16 1 0 0 1 1 0 0 1 d d d d 0 1 1 0 + {0,0x9206,0xff8f,' ',3, OR, IREG_DATA8 }, // OR [Rd], #data8 1 0 0 1 0 0 1 0 0 d d d 0 1 1 0 + {0,0x9a06,0xff8f,' ',4, OR, IREG_DATA16 }, // OR [Rd], #data16 1 0 0 1 1 0 1 0 0 d d d 0 1 1 0 + {0,0x9306,0xff8f,' ',3, OR, IREGINC_DATA8 }, // OR [Rd+], #data8 1 0 0 1 0 0 1 1 0 d d d 0 1 1 0 + {0,0x9b06,0xff8f,' ',4, OR, IREGINC_DATA16 }, // OR [Rd+], #data16 1 0 0 1 1 0 1 1 0 d d d 0 1 1 0 + {0,0x9406,0xff8f,' ',4, OR, IREGOFF8_DATA8 }, // OR [Rd+offset8], #data8 1 0 0 1 0 1 0 0 0 d d d 0 1 1 0 + {0,0x9c06,0xff8f,' ',5, OR, IREGOFF8_DATA16 }, // OR [Rd+offset8], #data16 1 0 0 1 1 1 0 0 0 d d d 0 1 1 0 + {0,0x9506,0xff8f,' ',5, OR, IREGOFF16_DATA8 }, // OR [Rd+offset16], #data8 1 0 0 1 0 1 0 1 0 d d d 0 1 1 0 + {0,0x9d06,0xff8f,' ',6, OR, IREGOFF16_DATA16}, // OR [Rd+offset16], #data16 1 0 0 1 1 1 0 1 0 d d d 0 1 1 0 + {0,0x9606,0xff8f,' ',4, OR, DIRECT_DATA8 }, // OR direct, #data8 1 0 0 1 0 1 1 0 0 b b b 0 1 1 0 + {0,0x9e06,0xff8f,' ',5, OR, DIRECT_DATA16 }, // OR direct, #data16 1 0 0 1 0 1 1 0 0 b b b 0 1 1 0 + {0,0x0860,0xfffc,' ',3, ORL, CY_BIT }, // ORL C, bit 0 0 0 0 1 0 0 0 0 1 1 0 0 0 b b + {0,0x0870,0xfffc,' ',3, ORL, CY_NOTBIT }, // ORL C, /bit 0 0 0 0 1 0 0 0 0 1 1 1 0 0 b b + {0,0x8710,0xf7f8,' ',3, POP, DIRECT }, // POP direct 1 0 0 0 S 1 1 1 0 0 0 1 0 d d d + {1,0x2700,0xb700,' ',2, POP, RLIST }, // POP Rlist 0 H 1 0 S 1 1 1 rlist + {0,0x8700,0xf7f8,' ',3, POPU, DIRECT }, // POPU direct 1 0 0 0 S 1 1 1 0 0 0 0 0 d d d + {1,0x3700,0xb700,' ',2, POPU, RLIST }, // POPU Rlist 0 H 1 1 S 1 1 1 rlist + {0,0x8730,0xf7f8,' ',3, PUSH, DIRECT }, // PUSH direct 1 0 0 0 S 1 1 1 0 0 1 1 0 d d d + {1,0x0700,0xb700,' ',2, PUSH, RLIST }, // PUSH Rlist 0 H 0 0 S 1 1 1 rlist + {0,0x8720,0xf7f8,' ',3, PUSHU, DIRECT }, // PUSHU direct 1 0 0 0 S 1 1 1 0 0 1 0 0 d d d + {1,0x1700,0xb700,' ',2, PUSHU, RLIST }, // PUSHU Rlist 0 H 0 1 S 1 1 1 rlist + + {0,0xd610,0xffff,' ',2, RESET, NO_OPERANDS }, // RESET 1 1 0 1 0 1 1 0 0 0 0 1 0 0 0 0 + {0,0xd680,0xffff,' ',2, RET, NO_OPERANDS }, // RET 1 1 0 1 0 1 1 0 1 0 0 0 0 0 0 0 + {0,0xd690,0xffff,' ',2, RETI, NO_OPERANDS }, // RETI 1 1 0 1 0 1 1 0 1 0 0 1 0 0 0 0 + /* RL, RLC, RR, RRC */ + {0,0x0810,0xfffc,' ',3, SETB, BIT_ALONE }, // SETB bit 0 0 0 0 1 0 0 0 0 0 0 1 0 0 b b + {0,0x9009,0xf70f,' ',2, SEXT, REG }, // SEXT Rd 1 0 0 1 S 0 0 0 d d d d 1 0 0 1 + {0,0x2100,0xf700,' ',2,SUB, REG_REG }, // SUB Rd, Rs 0 0 1 0 S 0 0 1 d d d d s s s s + {0,0x2200,0xf708,' ',2,SUB, REG_IREG }, // SUB Rd, [Rs] 0 0 1 0 S 0 1 0 d d d d 0 s s s + {0,0x2208,0xf708,' ',2,SUB, IREG_REG }, // SUB [Rd], Rs 0 0 1 0 S 0 1 0 s s s s 1 d d d + {0,0x2400,0xf708,' ',3,SUB, REG_IREGOFF8 }, // SUB Rd, [Rs+offset8] 0 0 1 0 S 1 0 0 d d d d 0 s s s + {0,0x2408,0xf708,' ',3,SUB, IREGOFF8_REG }, // SUB [Rd+offset8], Rs 0 0 1 0 S 1 0 0 s s s s 1 d d d + {0,0x2500,0xf708,' ',4,SUB, REG_IREGOFF16 }, // SUB Rd, [Rs+offset16] 0 0 1 0 S 1 0 1 d d d d 0 s s s + {0,0x2508,0xf708,' ',4,SUB, IREGOFF16_REG }, // SUB [Rd+offset16], Rs 0 0 1 0 S 1 0 1 s s s s 1 d d d + {0,0x2300,0xf708,' ',2,SUB, REG_IREGINC }, // SUB Rd, [Rs+] 0 0 1 0 S 0 1 1 d d d d 0 s s s + {0,0x2308,0xf708,' ',2,SUB, IREGINC_REG }, // SUB [Rd+], Rs 0 0 1 0 S 0 1 1 s s s s 1 d d d + {0,0x2608,0xf708,' ',3,SUB, DIRECT_REG }, // SUB direct, Rs 0 0 1 0 S 1 1 0 s s s s 1 x x x + {0,0x2600,0xf708,' ',3,SUB, REG_DIRECT }, // SUB Rd, direct 0 0 1 0 S 1 1 0 d d d d 0 x x x + {0,0x9102,0xff0f,' ',3,SUB, REG_DATA8 }, // SUB Rd, #data8 1 0 0 1 0 0 0 1 d d d d 0 0 1 0 + {0,0x9902,0xff0f,' ',4,SUB, REG_DATA16 }, // SUB Rd, #data16 1 0 0 1 1 0 0 1 d d d d 0 0 1 0 + {0,0x9202,0xff8f,' ',3,SUB, IREG_DATA8 }, // SUB [Rd], #data8 1 0 0 1 0 0 1 0 0 d d d 0 0 1 0 + {0,0x9a02,0xff8f,' ',4,SUB, IREG_DATA16 }, // SUB [Rd], #data16 1 0 0 1 1 0 1 0 0 d d d 0 0 1 0 + {0,0x9302,0xff8f,' ',3,SUB, IREGINC_DATA8 }, // SUB [Rd+], #data8 1 0 0 1 0 0 1 1 0 d d d 0 0 1 0 + {0,0x9b02,0xff8f,' ',4,SUB, IREGINC_DATA16 }, // SUB [Rd+], #data16 1 0 0 1 1 0 1 1 0 d d d 0 0 1 0 + {0,0x9402,0xff8f,' ',4,SUB, IREGOFF8_DATA8 }, // SUB [Rd+offset8], #data8 1 0 0 1 0 1 0 0 0 d d d 0 0 1 0 + {0,0x9c02,0xff8f,' ',5,SUB, IREGOFF8_DATA16 }, // SUB [Rd+offset8], #data16 1 0 0 1 1 1 0 0 0 d d d 0 0 1 0 + {0,0x9502,0xff8f,' ',5,SUB, IREGOFF16_DATA8 }, // SUB [Rd+offset16], #data8 1 0 0 1 0 1 0 1 0 d d d 0 0 1 0 + {0,0x9d02,0xff8f,' ',6,SUB, IREGOFF16_DATA16}, // SUB [Rd+offset16], #data16 1 0 0 1 1 1 0 1 0 d d d 0 0 1 0 + {0,0x9602,0xff8f,' ',4,SUB, DIRECT_DATA8 }, // SUB direct, #data8 1 0 0 1 0 1 1 0 0 b b b 0 0 1 0 + {0,0x9e02,0xff8f,' ',5,SUB, DIRECT_DATA16 }, // SUB direct, #data16 1 0 0 1 0 1 1 0 0 b b b 0 0 1 0 + + {0,0x3100,0xf700,' ',2,SUBB,REG_REG }, //SUBB Rd, Rs 0 0 1 1 S 0 0 1 d d d d s s s s + {0,0x3200,0xf708,' ',2,SUBB,REG_IREG }, //SUBB Rd, [Rs] 0 0 1 1 S 0 1 0 d d d d 0 s s s + {0,0x3208,0xf708,' ',2,SUBB,IREG_REG }, //SUBB [Rd], Rs 0 0 1 1 S 0 1 0 s s s s 1 d d d + {0,0x3400,0xf708,' ',3,SUBB,REG_IREGOFF8 }, //SUBB Rd, [Rs+offset8] 0 0 1 1 S 1 0 0 d d d d 0 s s s + {0,0x3408,0xf708,' ',3,SUBB,IREGOFF8_REG }, //SUBB [Rd+offset8], Rs 0 0 1 1 S 1 0 0 s s s s 1 d d d + {0,0x3500,0xf708,' ',4,SUBB,REG_IREGOFF16 }, //SUBB Rd, [Rs+offset16] 0 0 1 1 S 1 0 1 d d d d 0 s s s + {0,0x3508,0xf708,' ',4,SUBB,IREGOFF16_REG }, //SUBB [Rd+offset16], Rs 0 0 1 1 S 1 0 1 s s s s 1 d d d + {0,0x3300,0xf708,' ',2,SUBB,REG_IREGINC }, //SUBB Rd, [Rs+] 0 0 1 1 S 0 1 1 d d d d 0 s s s + {0,0x3308,0xf708,' ',2,SUBB,IREGINC_REG }, //SUBB [Rd+], Rs 0 0 1 1 S 0 1 1 s s s s 1 d d d + {0,0x3608,0xf708,' ',3,SUBB,DIRECT_REG }, //SUBB direct, Rs 0 0 1 1 S 1 1 0 s s s s 1 x x x + {0,0x3600,0xf708,' ',3,SUBB,REG_DIRECT }, //SUBB Rd, direct 0 0 1 1 S 1 1 0 d d d d 0 x x x + {0,0x9103,0xff0f,' ',3,SUBB,REG_DATA8 }, //SUBB Rd, #data8 1 0 0 1 0 0 0 1 d d d d 0 0 1 1 + {0,0x9903,0xff0f,' ',4,SUBB,REG_DATA16 }, //SUBB Rd, #data16 1 0 0 1 1 0 0 1 d d d d 0 0 1 1 + {0,0x9203,0xff8f,' ',3,SUBB,IREG_DATA8 }, //SUBB [Rd], #data8 1 0 0 1 0 0 1 0 0 d d d 0 0 1 1 + {0,0x9a03,0xff8f,' ',4,SUBB,IREG_DATA16 }, //SUBB [Rd], #data16 1 0 0 1 1 0 1 0 0 d d d 0 0 1 1 + {0,0x9303,0xff8f,' ',3,SUBB,IREGINC_DATA8 }, //SUBB [Rd+], #data8 1 0 0 1 0 0 1 1 0 d d d 0 0 1 1 + {0,0x9b03,0xff8f,' ',4,SUBB,IREGINC_DATA16 }, //SUBB [Rd+], #data16 1 0 0 1 1 0 1 1 0 d d d 0 0 1 1 + {0,0x9403,0xff8f,' ',4,SUBB,IREGOFF8_DATA8 }, //SUBB [Rd+offset8], #data8 1 0 0 1 0 1 0 0 0 d d d 0 0 1 1 + {0,0x9c03,0xff8f,' ',5,SUBB,IREGOFF8_DATA16 }, //SUBB [Rd+offset8], #data16 1 0 0 1 1 1 0 0 0 d d d 0 0 1 1 + {0,0x9503,0xff8f,' ',5,SUBB,IREGOFF16_DATA8 }, //SUBB [Rd+offset16], #data8 1 0 0 1 0 1 0 1 0 d d d 0 0 1 1 + {0,0x9d03,0xff8f,' ',6,SUBB,IREGOFF16_DATA16}, //SUBB [Rd+offset16], #data16 1 0 0 1 1 1 0 1 0 d d d 0 0 1 1 + {0,0x9603,0xff8f,' ',4,SUBB,DIRECT_DATA8 }, //SUBB direct, #data8 1 0 0 1 0 1 1 0 0 b b b 0 0 1 1 + {0,0x9e03,0xff8f,' ',5,SUBB,DIRECT_DATA16 }, //SUBB direct, #data16 1 0 0 1 0 1 1 0 0 b b b 0 0 1 1 + {0,0xd630,0xfff0,' ',2,TRAP,DATA4 }, //TRAP #data4 1 1 0 1 0 1 1 0 0 0 1 1 #data4 + /* XCH(3) */ + + {0,0x7100,0xf700,' ',2,XOR, REG_REG }, // XOR Rd, Rs 0 1 1 1 S 0 0 1 d d d d s s s s + {0,0x7200,0xf708,' ',2,XOR, REG_IREG }, // XOR Rd, [Rs] 0 1 1 1 S 0 1 0 d d d d 0 s s s + {0,0x7208,0xf708,' ',2,XOR, IREG_REG }, // XOR [Rd], Rs 0 1 1 1 S 0 1 0 s s s s 1 d d d + {0,0x7400,0xf708,' ',3,XOR, REG_IREGOFF8 }, // XOR Rd, [Rs+offset8] 0 1 1 1 S 1 0 0 d d d d 0 s s s + {0,0x7408,0xf708,' ',3,XOR, IREGOFF8_REG }, // XOR [Rd+offset8], Rs 0 1 1 1 S 1 0 0 s s s s 1 d d d + {0,0x7500,0xf708,' ',4,XOR, REG_IREGOFF16 }, // XOR Rd, [Rs+offset16] 0 1 1 1 S 1 0 1 d d d d 0 s s s + {0,0x7508,0xf708,' ',4,XOR, IREGOFF16_REG }, // XOR [Rd+offset16], Rs 0 1 1 1 S 1 0 1 s s s s 1 d d d + {0,0x7300,0xf708,' ',2,XOR, REG_IREGINC }, // XOR Rd, [Rs+] 0 1 1 1 S 0 1 1 d d d d 0 s s s + {0,0x7308,0xf708,' ',2,XOR, IREGINC_REG }, // XOR [Rd+], Rs 0 1 1 1 S 0 1 1 s s s s 1 d d d + {0,0x7608,0xf708,' ',3,XOR, DIRECT_REG }, // XOR direct, Rs 0 1 1 1 S 1 1 0 s s s s 1 x x x + {0,0x7600,0xf708,' ',3,XOR, REG_DIRECT }, // XOR Rd, direct 0 1 1 1 S 1 1 0 d d d d 0 x x x + {0,0x9107,0xff0f,' ',3,XOR, REG_DATA8 }, // XOR Rd, #data8 1 0 0 1 0 0 0 1 d d d d 0 1 1 1 + {0,0x9907,0xff0f,' ',4,XOR, REG_DATA16 }, // XOR Rd, #data16 1 0 0 1 1 0 0 1 d d d d 0 1 1 1 + {0,0x9207,0xff8f,' ',3,XOR, IREG_DATA8 }, // XOR [Rd], #data8 1 0 0 1 0 0 1 0 0 d d d 0 1 1 1 + {0,0x9a07,0xff8f,' ',4,XOR, IREG_DATA16 }, // XOR [Rd], #data16 1 0 0 1 1 0 1 0 0 d d d 0 1 1 1 + {0,0x9307,0xff8f,' ',3,XOR, IREGINC_DATA8 }, // XOR [Rd+], #data8 1 0 0 1 0 0 1 1 0 d d d 0 1 1 1 + {0,0x9b07,0xff8f,' ',4,XOR, IREGINC_DATA16 }, // XOR [Rd+], #data16 1 0 0 1 1 0 1 1 0 d d d 0 1 1 1 + {0,0x9407,0xff8f,' ',4,XOR, IREGOFF8_DATA8 }, // XOR [Rd+offset8], #data8 1 0 0 1 0 1 0 0 0 d d d 0 1 1 1 + {0,0x9c07,0xff8f,' ',5,XOR, IREGOFF8_DATA16 }, // XOR [Rd+offset8], #data16 1 0 0 1 1 1 0 0 0 d d d 0 1 1 1 + {0,0x9507,0xff8f,' ',5,XOR, IREGOFF16_DATA8 }, // XOR [Rd+offset16], #data8 1 0 0 1 0 1 0 1 0 d d d 0 1 1 1 + {0,0x9d07,0xff8f,' ',6,XOR, IREGOFF16_DATA16}, // XOR [Rd+offset16], #data16 1 0 0 1 1 1 0 1 0 d d d 0 1 1 1 + {0,0x9607,0xff8f,' ',4,XOR, DIRECT_DATA8 }, // XOR direct, #data8 1 0 0 1 0 1 1 0 0 b b b 0 1 1 1 + {0,0x9e07,0xff8f,' ',5,XOR, DIRECT_DATA16 }, // XOR direct, #data16 1 0 0 1 0 1 1 0 0 b b b 0 1 1 1 + + {0,0x0000,0x0000, 0,1,BAD_OPCODE, REG_REG} +}; + +/* + * Names of SFRs + */ + +struct name_entry sfr_tabXA51[]= +{ +#include "xa_sfr.cc" +}; + +/* + * Names of SBITs + */ + +struct name_entry bit_tabXA51[]= +{ +#include "xa_bit.cc" +}; + +/* End of xa.src/glob.cc */ diff --git a/sim/ucsim/xa.src/glob.h b/sim/ucsim/xa.src/glob.h new file mode 100644 index 0000000..be31e94 --- /dev/null +++ b/sim/ucsim/xa.src/glob.h @@ -0,0 +1,213 @@ +/* + * Simulator of microcontrollers (glob.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * Other contributors include: + * Karl Bongers karl@turbobit.com, + * Johan Knol johan.knol@iduna.nl + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef GLOB_HEADER +#define GLOB_HEADER + +#include "stypes.h" + +/* this needs to match char *op_mnemonic_str[] definition in glob.cc */ +enum { +BAD_OPCODE=0, +ADD, +ADDC, +ADDS, +AND, +ANL, +ASL, +ASR, +BCC, +BCS, +BEQ, +BG, +BGE, +BGT, +BKPT, +BL, +BLE, +BLT, +BMI, +BNE, +BNV, +BOV, +BPL, +BR, +CALL, +CJNE, +CLR, +CMP, +CPL, +DA, +DIV_w, +DIV_d, +DIVU_b, +DIVU_w, +DIVU_d, +DJNZ, +FCALL, +FJMP, +JB, +JBC, +JMP, +JNB, +JNZ, +JZ, +LEA, +LSR, +MOV, +MOVC, +MOVS, +MOVX, +MUL_w, +MULU_b, +MULU_w, +NEG, +NOP, +NORM, +OR, +ORL, +POP, +POPU, +PUSH, +PUSHU, +RESET, +RET, +RETI, +RL, +RLC, +RR, +RRC, +SETB, +SEXT, +SUB, +SUBB, +TRAP, +XCH, +XOR, +}; + +extern char *op_mnemonic_str[]; + +/* this classifies the operands and is used in the dissassembly + to print the operands. Its also used in the simulation to characterize + the op-code function. + */ +enum op_operands { + // the repeating parameter encoding for ADD, ADDC, SUB, SUBB, AND, XOR, ... + REG_REG , + REG_IREG , + IREG_REG , + REG_IREGOFF8 , + IREGOFF8_REG , + REG_IREGOFF16 , + IREGOFF16_REG , + REG_IREGINC , + IREGINC_REG , + DIRECT_REG , + REG_DIRECT , + REG_DATA8 , + REG_DATA16 , + IREG_DATA8 , + IREG_DATA16 , + IREGINC_DATA8 , + IREGINC_DATA16 , + IREGOFF8_DATA8 , + IREGOFF8_DATA16 , + IREGOFF16_DATA8 , + IREGOFF16_DATA16, + DIRECT_DATA8 , + DIRECT_DATA16 , + +// odd-ball ones + NO_OPERANDS, // for NOP + CY_BIT, + BIT_CY, + CY_NOTBIT, + DATA4, + REG_DATA4, + REG_DATA5, + IREG_DATA4, + IREGINC_DATA4, + IREGOFF8_DATA4, + IREGOFF16_DATA4, + DIRECT_DATA4, + + REG, + IREG, + BIT_ALONE, + DIRECT, + DIRECT_DIRECT, + RLIST, + ADDR24, + BIT_REL8, + REG_REL8, + DIRECT_REL8, + REG_REGOFF8, + REG_REGOFF16, + + REG_USP, + USP_REG, + + REL8, + REL16, + + REG_DIRECT_REL8, + REG_DATA8_REL8, + REG_DATA16_REL8, + IREG_DATA8_REL8, + IREG_DATA16_REL8, + + A_APLUSDPTR, + A_APLUSPC, + A_PLUSDPTR, + IIREG +}; + +// table of dissassembled instructions +struct xa_dis_entry +{ + uint is1byte; /* only grab 1 byte for table lookup(most are 2 bytes) */ + uint code; /* bits in opcode used to match table entry(with mask) */ + uint mask; /* mask used on .code to match up a common opcode */ + char branch; /* used by main app to implement "next" around calls */ + uchar length; /* total length of opcode, used by dissasembler and main app */ + int mnemonic; /* type of opcode(ADD, ADDC...) */ + int operands; /* unique classification of operands: Rd,Rs = REG_REG,... */ +}; + +extern struct dis_entry glob_disass_xa[]; + +extern struct xa_dis_entry disass_xa[]; + +extern struct name_entry sfr_tabXA51[]; +extern struct name_entry bit_tabXA51[]; +#endif + +/* End of xa.src/glob.h */ diff --git a/sim/ucsim/xa.src/inst.cc b/sim/ucsim/xa.src/inst.cc new file mode 100644 index 0000000..c9f7d08 --- /dev/null +++ b/sim/ucsim/xa.src/inst.cc @@ -0,0 +1,1191 @@ +/* + * Simulator of microcontrollers (inst.cc) + * + * Copyright (C) 1999,2002 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * Other contributors include: + * Karl Bongers karl@turbobit.com, + * Johan Knol johan.knol@iduna.nl + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include + +// local +#include "glob.h" +#include "xacl.h" +#include "regsxa.h" + +#define NOTDONE_ASSERT { printf("**********Instr not done at %d!\n", __LINE__); } + +void cl_xa::store1(t_addr addr, unsigned char val) +{ + if (addr < 0x2000) { + set_idata1(addr, val); + } else { + set_xdata1(addr, val); + } +} + +void cl_xa::store2(t_addr addr, unsigned short val) +{ + if (addr < 0x2000) { + set_idata2(addr, val); + } else { + set_xdata2(addr, val); + } +} + +unsigned char cl_xa::get1(t_addr addr) +{ + if (addr < 0x2000) { + return get_idata1(addr); + } else { + return get_xdata1(addr); + } +} + +unsigned short cl_xa::get2(t_addr addr) +{ + if (addr < 0x2000) { + return get_idata2(addr); + } else { + return get_xdata2(addr); + } +} + +int cl_xa::get_reg(int word_flag, unsigned int index) +{ + int result; + + if (word_flag) { + result = get_word_direct(index); + } + else { + result = get_byte_direct(index); + } + return result; +} + +bool cl_xa::get_bit(int bit) { + short offset=0; + unsigned char result; + + if (bit>=0x200) { + // in sfr space + bit-=0x200; + offset=0x400; + } + result = get_byte_direct(offset + (bit/8)) & (1 << (bit%8)); + return result; +} + +void cl_xa::set_bit(int bit, int value) { + int i; + short offset=0; + if (bit>=0x200) { + // in sfr space + bit-=0x200; + offset=0x400; + } + + i = get_byte_direct(offset + (bit/8)); + if (value) { + set_byte_direct(offset + (bit/8), i | (1 << (bit%8)) ); + } else { + set_byte_direct(offset + (bit/8), i & ~(1 << (bit%8)) ); + } +} + +#define RI_F0 ((code >> 4) & 0xf) +#define RI_70 ((code >> 4) & 0x7) +#define RI_0F (code & 0xf) +#define RI_07 (code & 0x7) + +int cl_xa::inst_ADD(uint code, int operands) +{ +#undef FUNC1 +#define FUNC1 add1 +#undef FUNC2 +#define FUNC2 add2 +#include "inst_gen.cc" + + return(resGO); +} + +int cl_xa::inst_ADDC(uint code, int operands) +{ +#undef FUNC1 +#define FUNC1 addc1 +#undef FUNC2 +#define FUNC2 addc2 +#include "inst_gen.cc" + + return(resGO); +} + +int cl_xa::inst_ADDS(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} + +int cl_xa::inst_AND(uint code, int operands) +{ +#undef FUNC1 +#define FUNC1 and1 +#undef FUNC2 +#define FUNC2 and2 +#include "inst_gen.cc" + return(resGO); +} + +/* logical AND bit with Carry flag */ +int cl_xa::inst_ANL(uint code, int operands) +{ + unsigned char flags; + unsigned short bitAddr = (code&0x03 << 8) + fetch(); + flags = get_psw(); + + if (flags & BIT_C) { + /* have work to do */ + switch(operands) { + case CY_BIT : + if (!get_bit(bitAddr)) { + set_psw(flags & ~BIT_C); + } + break; + + case CY_NOTBIT : + if (get_bit(bitAddr)) { + set_psw(flags & ~BIT_C); + } + break; + } + } + + return(resGO); +} + +/* arithmetic shift left */ +int cl_xa::inst_ASL(uint code, int operands) +{ + unsigned int dst, cnt; + unsigned char flags; + + /* ASL, dest, count + while (count != 0) + C = dest.80H; dest <<= 1; if sign chg then set V=1 + this is a confusing one... + */ + + flags = get_psw(); + flags &= ~BIT_ALL; /* clear these bits */ + + switch(operands) { + //{0,0xc150,0xf300,' ',2,ASL, REG_REG }, // ASL Rd, Rs 1 1 0 0 S S 0 1 d d d d s s s s + case REG_REG : + cnt = reg1(RI_0F) & 0x1f; + switch (code & 0xc00) { + case 0: // byte + dst = reg1(RI_F0); + dst <<= cnt; + set_reg1(RI_F0,dst); + if (dst & 0x100) + flags |= BIT_C; + if ((dst & 0xff) == 0) + flags |= BIT_Z; + break; + case 1: // word + dst = reg2(RI_F0); + dst <<= cnt; + set_reg2(RI_F0,dst); + if (dst & 0x10000) + flags |= BIT_C; + if ((dst & 0xffff) == 0) + flags |= BIT_Z; + break; + case 2: // ? + // not really sure about the encoding here.. + NOTDONE_ASSERT; + break; + case 3: // dword + //dst = reg4(RI_F0); + dst = reg2(RI_F0) | (reg2(RI_F0 + 2) << 16); + if ((cnt != 0) && (dst & (0x80000000 >> (cnt-1)))) { + flags |= BIT_C; + } + dst <<= cnt; + set_reg2(RI_F0,dst & 0xffff); + set_reg2(RI_F0+2, (dst>>16) & 0xffff); + if (dst == 0) + flags |= BIT_Z; + break; + } + break; + + case REG_DATA4 : + case REG_DATA5 : + switch (code & 0xc00) { + case 0: // byte + dst = reg1(RI_F0); + cnt = operands & 0x0f; + dst <<= cnt; + set_reg1(RI_F0,dst); + if (dst & 0x100) + flags |= BIT_C; + if ((dst & 0xff) == 0) + flags |= BIT_Z; + break; + case 1: // word + dst = reg2(RI_F0); + cnt = operands & 0x0f; + dst <<= cnt; + set_reg2(RI_F0,dst); + if (dst & 0x10000) + flags |= BIT_C; + if ((dst & 0xffff) == 0) + flags |= BIT_Z; + break; + case 2: // ? + // not really sure about the encoding here.. + NOTDONE_ASSERT; + break; + case 3: // dword + dst = reg1(RI_F0 & 0xe); + cnt = operands & 0x1f; + if ((cnt != 0) && (dst & (0x80000000 >> (cnt-1)))) { + flags |= BIT_C; + } + dst <<= cnt; + set_reg2(RI_F0,dst & 0xffff); + set_reg2(RI_F0+2, (dst>>16) & 0xffff); + if (dst == 0) + flags |= BIT_Z; + break; + } + break; + } + set_psw(flags); + + return(resGO); +} + +/* arithmetic shift right */ +int cl_xa::inst_ASR(uint code, int operands) +{ + unsigned int dst, cnt; + unsigned char flags; + + /* ASR, dest, count + while (count != 0) + C = dest.0; dest >>= 1; + this is a confusing one... + */ + + flags = get_psw(); + flags &= ~BIT_ALL; /* clear these bits */ + + switch(operands) { + case REG_REG : + cnt = reg1(RI_0F) & 0x1f; + switch (code & 0xc00) { + case 0: // byte + dst = reg1(RI_F0); + if ((cnt != 0) && (dst & (0x00000001 << (cnt-1)))) + flags |= BIT_C; + if (dst & 0x01) + flags |= BIT_C; + dst >>= cnt; + set_reg1(RI_F0,dst); + if ((dst & 0xff) == 0) + flags |= BIT_Z; + break; + case 1: // word + dst = reg2(RI_F0); + if ((cnt != 0) && (dst & (0x00000001 << (cnt-1)))) + flags |= BIT_C; + dst >>= cnt; + set_reg2(RI_F0,dst); + if ((dst & 0xffff) == 0) + flags |= BIT_Z; + break; + case 2: // ? + // not really sure about the encoding here.. + NOTDONE_ASSERT; + break; + case 3: // dword + dst = reg2(RI_F0) | (reg2(RI_F0 + 2) << 16); + if ((cnt != 0) && (dst & (0x00000001 << (cnt-1)))) + flags |= BIT_C; + dst >>= cnt; + set_reg2(RI_F0,dst & 0xffff); + set_reg2(RI_F0+2, (dst>>16) & 0xffff); + if (dst == 0) + flags |= BIT_Z; + break; + } + break; + + case REG_DATA4 : + case REG_DATA5 : + switch (code & 0xc00) { + case 0: // byte + dst = reg1(RI_F0); + cnt = operands & 0x0f; + if ((cnt != 0) && (dst & (0x00000001 << (cnt-1)))) + flags |= BIT_C; + dst >>= cnt; + set_reg1(RI_F0,dst); + if ((dst & 0xff) == 0) + flags |= BIT_Z; + break; + case 1: // word + dst = reg2(RI_F0); + cnt = operands & 0x0f; + if ((cnt != 0) && (dst & (0x00000001 << (cnt-1)))) + flags |= BIT_C; + dst >>= cnt; + set_reg2(RI_F0,dst); + if ((dst & 0xffff) == 0) + flags |= BIT_Z; + break; + case 2: // ? + // not really sure about the encoding here.. + NOTDONE_ASSERT; + break; + case 3: // dword + dst = reg1(RI_F0 & 0xe); + cnt = operands & 0x1f; + if ((cnt != 0) && (dst & (0x00000001 << (cnt-1)))) + flags |= BIT_C; + dst >>= cnt; + set_reg2(RI_F0,dst & 0xffff); + set_reg2(RI_F0+2, (dst>>16) & 0xffff); + if (dst == 0) + flags |= BIT_Z; + break; + } + break; + } + set_psw(flags); + + return(resGO); +} + +int cl_xa::inst_BCC(uint code, int operands) +{ + short jmpAddr = fetch1()*2; + if (!(get_psw() & BIT_C)) { + PC=(PC+jmpAddr)&0xfffffe; + } + return(resGO); +} + +int cl_xa::inst_BCS(uint code, int operands) +{ + short jmpAddr = fetch1()*2; + if (get_psw() & BIT_C) { + PC=(PC+jmpAddr)&0xfffffe; + } + return(resGO); +} + +int cl_xa::inst_BEQ(uint code, int operands) +{ + short jmpAddr = fetch1()*2; + if (get_psw() & BIT_Z) { + PC=(PC+jmpAddr)&0xfffffe; + } + return(resGO); +} + +int cl_xa::inst_BG(uint code, int operands) +{ + short jmpAddr = fetch1()*2; + short flags=get_psw(); + bool Z=flags&BIT_Z, C=flags&BIT_C; + if (!(Z|C)) { + PC=(PC+jmpAddr)&0xfffffe; + } + return(resGO); +} +int cl_xa::inst_BGE(uint code, int operands) +{ + short jmpAddr = fetch1()*2; + short flags=get_psw(); + bool N=flags&BIT_N, V=flags&BIT_V; + if (!(N^V)) { + PC=(PC+jmpAddr)&0xfffffe; + } + return(resGO); +} +int cl_xa::inst_BGT(uint code, int operands) +{ + short jmpAddr = fetch1()*2; + short flags=get_psw(); + bool Z=flags&BIT_Z, N=flags&BIT_N, V=flags&BIT_V; + if (!((Z|N)^V)) { + PC=(PC+jmpAddr)&0xfffffe; + } + return(resGO); +} +int cl_xa::inst_BKPT(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} +int cl_xa::inst_BL(uint code, int operands) +{ + short jmpAddr = fetch1()*2; + short flags=get_psw(); + bool Z=flags&BIT_Z, C=flags&BIT_C; + if (Z|C) { + PC=(PC+jmpAddr)&0xfffffe; + } + return(resGO); +} +int cl_xa::inst_BLE(uint code, int operands) +{ + short jmpAddr = fetch1()*2; + short flags=get_psw(); + bool Z=flags&BIT_Z, N=flags&BIT_N, V=flags&BIT_V; + if ((Z|N)^V) { + PC=(PC+jmpAddr)&0xfffffe; + } + return(resGO); +} +int cl_xa::inst_BLT(uint code, int operands) +{ + short jmpAddr = fetch1()*2; + short flags=get_psw(); + bool N=flags&BIT_N, V=flags&BIT_V; + if (N^V) { + PC=(PC+jmpAddr)&0xfffffe; + } + return(resGO); +} +int cl_xa::inst_BMI(uint code, int operands) +{ + short jmpAddr = fetch1()*2; + if (get_psw()&BIT_N) { + PC=(PC+jmpAddr)&0xfffffe; + } + return(resGO); +} +int cl_xa::inst_BNE(uint code, int operands) +{ + short jmpAddr = fetch1()*2; + if (!(get_psw()&BIT_Z)) { + PC=(PC+jmpAddr)&0xfffffe; + } + return(resGO); +} +int cl_xa::inst_BNV(uint code, int operands) +{ + short jmpAddr = fetch1()*2; + if (!(get_psw()&BIT_V)) { + PC=(PC+jmpAddr)&0xfffffe; + } + return(resGO); +} +int cl_xa::inst_BOV(uint code, int operands) +{ + short jmpAddr = fetch1()*2; + if (get_psw()&BIT_V) { + PC=(PC+jmpAddr)&0xfffffe; + } + return(resGO); +} +int cl_xa::inst_BPL(uint code, int operands) +{ + short jmpAddr = fetch1()*2; + if (!(get_psw()&BIT_N)) { + PC=(PC+jmpAddr)&0xfffffe; + } + return(resGO); +} + +int cl_xa::inst_BR(uint code, int operands) +{ + short jmpAddr = fetch1()*2; + PC=(PC+jmpAddr)&0xfffffe; + return(resGO); +} + +int cl_xa::inst_CALL(uint code, int operands) +{ + int jmpaddr; + unsigned int sp; + bool pageZero=get_scr()&1; + + switch(operands) { + case REL16: + { + jmpaddr = (signed short)fetch2(); + sp = get_sp() - (pageZero ? 2 : 4); + set_sp(sp); + store2(sp, PC&0xffff); + if (!pageZero) { + store2(sp+2, (PC>>16)&0xff); + } + jmpaddr *= 2; + PC = (PC + jmpaddr) & 0xfffffe; + } + break; + case IREG: + { + sp = get_sp() - (pageZero ? 2 : 4); + set_sp(sp); + store2(sp, PC&0xffff); + if (!pageZero) { + store2(sp+2, (PC>>16)&0xff); + } + jmpaddr = reg2(RI_07); + jmpaddr *= 2; + PC = (PC + jmpaddr) & 0xfffffe; + } + break; + } + return(resGO); +} + +int cl_xa::inst_CJNE(uint code, int operands) +{ + switch(operands) { + case REG_DIRECT_REL8: + { + // update C,N,Z + if (code & 0x800) { // word op + int result; + int src = get_word_direct( ((code & 0x7)<<4) | fetch1()); + int addr = (fetch1() * 2); + int dst = reg2(RI_F0); + unsigned char flags; + flags = get_psw(); + flags &= ~BIT_ALL; /* clear these bits */ + result = dst - src; + if (result == 0) flags |= BIT_Z; + if (result > 0xffff) flags |= BIT_C; + if (dst < src) flags |= BIT_N; + set_psw(flags); + if (flags & BIT_Z) + PC += addr; + } else { + int result; + int src = get_byte_direct( ((code & 0x7)<<4) | fetch1()); + int addr = (fetch1() * 2); + int dst = reg1(RI_F0); + unsigned char flags; + flags = get_psw(); + flags &= ~BIT_ALL; /* clear these bits */ + result = dst - src; + if (result == 0) flags |= BIT_Z; + if (result > 0xff) flags |= BIT_C; + if (dst < src) flags |= BIT_N; + set_psw(flags); + if (flags & BIT_Z) + PC += addr; + } + } + break; + + case DIRECT_REL8: + { + int daddr = ((code & 0x7) << 8) | fetch(); + int addr = fetch() * 2; + + if (code & 0x800) { // word op + unsigned short tmp = get_word_direct(daddr)-1; + set_word_direct(daddr, tmp); + if (tmp != 0) + PC += addr; + } else { + unsigned char tmp = get_word_direct(daddr)-1; + set_byte_direct(daddr, tmp); + if (tmp != 0) + PC += addr; + } + } + break; + } + return(resGO); +} + +int cl_xa::inst_CLR(uint code, int operands) +{ + unsigned short bitAddr = (code&0x03 << 8) + fetch(); + set_bit (bitAddr, 0); + return(resGO); +} + +int cl_xa::inst_CMP(uint code, int operands) +{ +#undef FUNC1 +#define FUNC1 cmp1 +#undef FUNC2 +#define FUNC2 cmp2 +#include "inst_gen.cc" + return(resGO); +} +int cl_xa::inst_CPL(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} +int cl_xa::inst_DA(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} +int cl_xa::inst_DIV(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} + +int cl_xa::inst_DJNZ(uint code, int operands) +{ + // update N Z flags. + switch(operands) { + case REG_REL8: + { + int addr = ( ((char)fetch1()) * 2); + if (code & 0x800) { // word op + unsigned short tmp = mov2(0, reg2(RI_F0)-1); + set_reg2(RI_F0, tmp); + if (tmp != 0) + PC = (PC + addr) & 0xfffffe; + } else { + unsigned char tmp = mov1(0, reg1(RI_F0)-1); + set_reg1(RI_F0, tmp); + if (tmp != 0) + PC = (PC + addr) & 0xfffffe; + } + } + break; + + case DIRECT_REL8: + { + int daddr = ((code & 0x7) << 8) | fetch(); + int addr = fetch() * 2; + + if (code & 0x800) { // word op + unsigned short tmp = get_word_direct(daddr)-1; + set_word_direct(daddr, tmp); + if (tmp != 0) + PC += addr; + } else { + unsigned char tmp = get_word_direct(daddr)-1; + set_byte_direct(daddr, tmp); + if (tmp != 0) + PC += addr; + } + } + break; + } + + return(resGO); +} + +int cl_xa::inst_FCALL(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} + +int cl_xa::inst_FJMP(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} + +int cl_xa::inst_JB(uint code, int operands) +{ + short bitAddr=((code&0x3)<<8) + fetch1(); + short jmpAddr = (fetch1() * 2); + if (get_bit(bitAddr)) { + PC = (PC+jmpAddr)&0xfffffe; + } + return(resGO); +} +int cl_xa::inst_JBC(uint code, int operands) +{ + short bitAddr=((code&0x3)<<8) + fetch1(); + short jmpAddr = (fetch1() * 2); + if (get_bit(bitAddr)) { + PC = (PC+jmpAddr)&0xfffffe; + } + set_bit(bitAddr,0); + return(resGO); +} +int cl_xa::inst_JNB(uint code, int operands) +{ + short bitAddr=((code&0x3)<<8) + fetch1(); + short jmpAddr = (fetch1() * 2); + if (!get_bit(bitAddr)) { + PC = (PC+jmpAddr)&0xfffffe; + } + return(resGO); +} +int cl_xa::inst_JMP(uint code, int operands) +{ + int jmpAddr; + + switch(operands) { + case REL16: + { + jmpAddr = (signed short)fetch2()*2; + PC = (PC + jmpAddr) & 0xfffffe; + } + break; + case IREG: + PC &= 0xff0000; + PC |= (reg2(RI_07) & 0xfffe); /* word aligned */ + break; + /* fixme 2 more... */ + } + return(resGO); +} +int cl_xa::inst_JNZ(uint code, int operands) +{ + short saddr = (fetch1() * 2); + /* reg1(8) = R4L, is ACC for MCS51 compatiblility */ + if (reg1(8)!=0) { + PC = (PC + saddr) & 0xfffffe; + } + return(resGO); +} +int cl_xa::inst_JZ(uint code, int operands) +{ + /* reg1(8) = R4L, is ACC for MCS51 compatiblility */ + short saddr = (fetch1() * 2); + if (reg1(8)==0) { + PC += saddr; + } + return(resGO); +} +int cl_xa::inst_LEA(uint code, int operands) +{ + switch (operands) { + case REG_REGOFF8: + { + char offset=fetch1(); + set_reg2(RI_70, reg2(RI_07)+offset); + break; + } + case REG_REGOFF16: + { + short offset=fetch2(); + set_reg2(RI_70, reg2(RI_07)+offset); + break; + } + } + return(resGO); +} +int cl_xa::inst_LSR(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} +int cl_xa::inst_MOV(uint code, int operands) +{ +#undef FUNC1 +#define FUNC1 mov1 +#undef FUNC2 +#define FUNC2 mov2 +#include "inst_gen.cc" + return(resGO); +} +int cl_xa::inst_MOVC(uint code, int operands) +{ + switch (operands) { + case REG_IREGINC: + { + short srcreg = reg2(RI_07); + if (code & 0x0800) { /* word op */ + set_reg2( RI_F0, + mov2( reg2(RI_F0), + getcode2(srcreg) + ) + ); + } else { + set_reg1( RI_F0, + mov1( reg1(RI_F0), + getcode1(srcreg) + ) + ); + } + if (operands == REG_IREGINC) { + set_reg2(RI_07, srcreg+1); + } + } + break; + case A_APLUSDPTR: + { /* R4l=ACC, R6=DPTR */ + unsigned int addr = (PC & 0xff0000) | (reg1(4) + reg2(6)); + unsigned short result; + unsigned char flags; + flags = get_psw(); + + flags &= ~(BIT_Z | BIT_N); /* clear these bits */ + result = getcode1(addr); + set_reg1( 4, result); + if (result == 0) flags |= BIT_Z; + if (result & 0x80) flags |= BIT_N; + set_psw(flags); + } + break; + case A_APLUSPC: + { /* R4l=ACC, R6=DPTR */ + unsigned int addr = (PC + reg1(4)); + unsigned short result; + unsigned char flags; + flags = get_psw(); + + flags &= ~(BIT_Z | BIT_N); /* clear these bits */ + result = getcode1(addr); + set_reg1( 4, result); + if (result == 0) flags |= BIT_Z; + if (result & 0x80) flags |= BIT_N; + set_psw(flags); + } + break; + } + return(resGO); +} +int cl_xa::inst_MOVS(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} +int cl_xa::inst_MOVX(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} +int cl_xa::inst_MUL(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} +int cl_xa::inst_NEG(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} +int cl_xa::inst_NOP(uint code, int operands) +{ + return(resGO); +} +int cl_xa::inst_NORM(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} +int cl_xa::inst_OR(uint code, int operands) +{ +#undef FUNC1 +#define FUNC1 or1 +#undef FUNC2 +#define FUNC2 or2 +#include "inst_gen.cc" + return(resGO); +} + +int cl_xa::inst_ORL(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} + +int cl_xa::inst_POP(uint code, int operands) +{ + unsigned short sp=get_sp(); + switch(operands) { + case DIRECT: + { + unsigned short direct_addr = ((operands & 0x7) << 8) | fetch(); + + if (code & 0x0800) { /* word op */ + set_word_direct(direct_addr, get2(sp) ); + } else { + set_byte_direct(direct_addr, get2(sp) & 0xff ); + } + set_sp(sp+2); + } + break; + + case RLIST: + { + unsigned char rlist = fetch(); + if (code & 0x0800) { // word op + if (code & 0x4000) { // R8-R15 + if (rlist&0x01) { set_reg2(8, get2(sp)); sp+=2; } + if (rlist&0x02) { set_reg2(9, get2(sp)); sp+=2; } + if (rlist&0x04) { set_reg2(10, get2(sp)); sp+=2; } + if (rlist&0x08) { set_reg2(11, get2(sp)); sp+=2; } + if (rlist&0x10) { set_reg2(12, get2(sp)); sp+=2; } + if (rlist&0x20) { set_reg2(13, get2(sp)); sp+=2; } + if (rlist&0x40) { set_reg2(14, get2(sp)); sp+=2; } + if (rlist&0x80) { set_reg2(15, get2(sp)); sp+=2; } + } else { // R0-R7 + if (rlist&0x01) { set_reg2(0, get2(sp)); sp+=2; } + if (rlist&0x02) { set_reg2(1, get2(sp)); sp+=2; } + if (rlist&0x04) { set_reg2(2, get2(sp)); sp+=2; } + if (rlist&0x08) { set_reg2(3, get2(sp)); sp+=2; } + if (rlist&0x10) { set_reg2(4, get2(sp)); sp+=2; } + if (rlist&0x20) { set_reg2(5, get2(sp)); sp+=2; } + if (rlist&0x40) { set_reg2(6, get2(sp)); sp+=2; } + if (rlist&0x80) { set_reg2(7, get2(sp)); sp+=2; } + } + } else { // byte op + if (code & 0x4000) { // R4l-R7h + if (rlist&0x01) { set_reg1(8, get1(sp)); sp+=2; } + if (rlist&0x02) { set_reg1(9, get1(sp)); sp+=2; } + if (rlist&0x04) { set_reg1(10, get1(sp)); sp+=2; } + if (rlist&0x08) { set_reg1(11, get1(sp)); sp+=2; } + if (rlist&0x10) { set_reg1(12, get1(sp)); sp+=2; } + if (rlist&0x20) { set_reg1(13, get1(sp)); sp+=2; } + if (rlist&0x40) { set_reg1(14, get1(sp)); sp+=2; } + if (rlist&0x80) { set_reg1(15, get1(sp)); sp+=2; } + } else { // R0l-R3h + if (rlist&0x01) { set_reg1(0, get1(sp)); sp+=2; } + if (rlist&0x02) { set_reg1(1, get1(sp)); sp+=2; } + if (rlist&0x04) { set_reg1(2, get1(sp)); sp+=2; } + if (rlist&0x08) { set_reg1(3, get1(sp)); sp+=2; } + if (rlist&0x10) { set_reg1(4, get1(sp)); sp+=2; } + if (rlist&0x20) { set_reg1(5, get1(sp)); sp+=2; } + if (rlist&0x40) { set_reg1(6, get1(sp)); sp+=2; } + if (rlist&0x80) { set_reg1(7, get1(sp)); sp+=2; } + } + } + } + break; + } + return(resGO); +} + +int cl_xa::inst_PUSH(uint code, int operands) +{ + switch(operands) { + case DIRECT: + { + unsigned short sp; + unsigned short direct_addr = ((operands & 0x7) << 8) | fetch(); + + sp = get_sp()-2; + set_sp(sp); + if (code & 0x0800) { /* word op */ + store2( sp, get_word_direct(direct_addr)); + } else { + store2( sp, get_byte_direct(direct_addr)); + } + } + break; + + case RLIST: + { + unsigned short sp=get_sp(); + unsigned char rlist = fetch(); + if (code & 0x0800) { // word op + if (code & 0x4000) { // R15-R8 + if (rlist&0x80) { sp-=2; store2(sp, reg2(15)); } + if (rlist&0x40) { sp-=2; store2(sp, reg2(14)); } + if (rlist&0x20) { sp-=2; store2(sp, reg2(13)); } + if (rlist&0x10) { sp-=2; store2(sp, reg2(12)); } + if (rlist&0x08) { sp-=2; store2(sp, reg2(11)); } + if (rlist&0x04) { sp-=2; store2(sp, reg2(10)); } + if (rlist&0x02) { sp-=2; store2(sp, reg2(9)); } + if (rlist&0x01) { sp-=2; store2(sp, reg2(8)); } + } else { // R7-R0 + if (rlist&0x80) { sp-=2; store2(sp, reg2(7)); } + if (rlist&0x40) { sp-=2; store2(sp, reg2(6)); } + if (rlist&0x20) { sp-=2; store2(sp, reg2(5)); } + if (rlist&0x10) { sp-=2; store2(sp, reg2(4)); } + if (rlist&0x08) { sp-=2; store2(sp, reg2(3)); } + if (rlist&0x04) { sp-=2; store2(sp, reg2(2)); } + if (rlist&0x02) { sp-=2; store2(sp, reg2(1)); } + if (rlist&0x01) { sp-=2; store2(sp, reg2(0)); } + } + } else { // byte op + if (code & 0x4000) { // R7h-R4l + if (rlist&0x80) { sp-=2; store2(sp, reg1(15)); } + if (rlist&0x40) { sp-=2; store2(sp, reg1(14)); } + if (rlist&0x20) { sp-=2; store2(sp, reg1(13)); } + if (rlist&0x10) { sp-=2; store2(sp, reg1(12)); } + if (rlist&0x08) { sp-=2; store2(sp, reg1(11)); } + if (rlist&0x04) { sp-=2; store2(sp, reg1(10)); } + if (rlist&0x02) { sp-=2; store2(sp, reg1(9)); } + if (rlist&0x01) { sp-=2; store2(sp, reg1(8)); } + } else { // R3h-R0l + if (rlist&0x80) { sp-=2; store2(sp, reg1(7)); } + if (rlist&0x40) { sp-=2; store2(sp, reg1(6)); } + if (rlist&0x20) { sp-=2; store2(sp, reg1(5)); } + if (rlist&0x10) { sp-=2; store2(sp, reg1(4)); } + if (rlist&0x08) { sp-=2; store2(sp, reg1(3)); } + if (rlist&0x04) { sp-=2; store2(sp, reg1(2)); } + if (rlist&0x02) { sp-=2; store2(sp, reg1(1)); } + if (rlist&0x01) { sp-=2; store2(sp, reg1(0)); } + } + } + set_sp(sp); + } + break; + } + return(resGO); +} +int cl_xa::inst_RESET(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} +int cl_xa::inst_RET(uint code, int operands) +{ + unsigned int retaddr; + unsigned short sp; + bool pageZero=get_scr()&1; + + sp = get_sp(); + retaddr = get2(sp); + if (!pageZero) { + retaddr |= get2(sp+2) << 16; + set_sp(sp+4); + } else { + set_sp(sp+2); + } + PC = retaddr; + return(resGO); +} +int cl_xa::inst_RETI(uint code, int operands) +{ + unsigned int retaddr; + unsigned short sp; + bool pageZero=get_scr()&1; + + sp = get_sp(); + set_psw(get2(sp)); + retaddr = get2(sp+2); + if (!pageZero) { + retaddr |= get2(sp+4) << 16; + set_sp(sp+6); + } else { + set_sp(sp+4); + } + PC = retaddr; + return(resGO); +} +int cl_xa::inst_RL(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} +int cl_xa::inst_RLC(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} +int cl_xa::inst_RR(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} +int cl_xa::inst_RRC(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} +int cl_xa::inst_SETB(uint code, int operands) +{ + unsigned short bitAddr = (code&0x03 << 8) + fetch(); + set_bit (bitAddr, 1); + return(resGO); +} + +int cl_xa::inst_SEXT(uint code, int operands) +{ + bool neg=get_psw()&BIT_N; + if (code & 0x0800) { // word op + set_reg2(RI_F0, neg ? 0xffff : 0); + } else { + set_reg1(RI_F0, neg ? 0xff : 0); + } + return(resGO); +} + +int cl_xa::inst_SUB(uint code, int operands) +{ +#undef FUNC1 +#define FUNC1 sub1 +#undef FUNC2 +#define FUNC2 sub2 +#include "inst_gen.cc" + return(resGO); +} + +int cl_xa::inst_SUBB(uint code, int operands) +{ +#undef FUNC1 +#define FUNC1 subb1 +#undef FUNC2 +#define FUNC2 subb2 +#include "inst_gen.cc" + return(resGO); +} + +int cl_xa::inst_TRAP(uint code, int operands) +{ + // steal a few opcodes for simulator only putchar() and exit() + // functions. Used in SDCC regression testing. + switch (code & 0x0f) { + case 0xe: + // implement a simulator putchar() routine + //printf("PUTCHAR-----> %xH\n", reg1(0)); + putchar(reg1(0)); + fflush(stdout); + break; + + case 0xf: + ::exit(0); + break; + } + return(resGO); +} + +int cl_xa::inst_XCH(uint code, int operands) +{ + NOTDONE_ASSERT; + return(resGO); +} +int cl_xa::inst_XOR(uint code, int operands) +{ +#undef FUNC1 +#define FUNC1 xor1 +#undef FUNC2 +#define FUNC2 xor2 +#include "inst_gen.cc" + return(resGO); +} + +/* End of xa.src/inst.cc */ diff --git a/sim/ucsim/xa.src/inst_gen.cc b/sim/ucsim/xa.src/inst_gen.cc new file mode 100644 index 0000000..76e3987 --- /dev/null +++ b/sim/ucsim/xa.src/inst_gen.cc @@ -0,0 +1,285 @@ +/* + * Simulator of microcontrollers (inst_gen.cc) + * this code pulled into various parts + of inst.cc with FUNC1 and FUNC2 defined as + various operations to implement ADD, ADDC, ... + * + * Copyright (C) 1999,2002 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * Other contributors include: + * Karl Bongers karl@turbobit.com, + * Johan Knol + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + + switch (operands) { + case REG_REG: + if (code & 0x0800) { /* word op */ + set_reg2( RI_F0, + FUNC2( reg2(RI_F0), reg2(RI_0F) ) + ); + } else { + set_reg1( RI_F0, + FUNC1( reg1(RI_F0), reg1(RI_0F) ) + ); + } + break; + case REG_IREGINC : + case REG_IREG: + { + short srcreg = reg2(RI_07); + if (code & 0x0800) { /* word op */ + set_reg2( RI_F0, + FUNC2( reg2(RI_F0), + get2(srcreg) + ) + ); + } else { + set_reg1( RI_F0, + FUNC1( reg1(RI_F0), + get1(srcreg) + ) + ); + } + if (operands == REG_IREGINC) { + set_reg2(RI_07, srcreg+1); + } + } + break; + case IREGINC_REG : + case IREG_REG : + { + short addr = reg2(RI_07); + if (code & 0x0800) { /* word op */ + unsigned short wtmp, wtotal; + wtmp = get2(addr); + wtotal = FUNC2( wtmp, reg2(RI_F0) ); + store2(addr, wtotal); + } else { + unsigned char total; + total = FUNC1( get1(addr), reg1(RI_F0) ); + store1(addr, total); + } + if (operands == IREGINC_REG) { + set_reg2(RI_07, addr+1); + } + } + break; + + case IREGOFF8_REG : + case IREGOFF16_REG : + { + int offset; + if (operands == IREGOFF8_REG) { + offset = (int)((char) fetch()); + } else { + offset = (int)((short)fetch2()); + } + if (code & 0x0800) { /* word op */ + t_mem addr = reg2(RI_07) + offset; + unsigned short wtotal; + wtotal = FUNC2( get2(addr), reg2(RI_F0) ); + store2(addr, wtotal); + } else { + t_mem addr = reg2(RI_07) + offset; + unsigned char total; + total = FUNC1( get1(addr), reg1(RI_F0) ); + store1(addr, total); + } + } + break; + + case REG_IREGOFF8 : + case REG_IREGOFF16 : + { + int offset; + if (operands == REG_IREGOFF8) { + offset = (int)((char) fetch()); + } else { + offset = (int)((short)fetch2()); + } + + if (code & 0x0800) { /* word op */ + set_reg2( RI_F0, + FUNC2( reg2(RI_F0), + get2(reg2(RI_07)+offset) + ) + ); + } else { + set_reg1( RI_F0, + FUNC1( reg1(RI_F0), + get1(reg2(RI_07)+offset) + ) + ); + } + } + break; + + case DIRECT_REG : + { + int addr = ((code & 0x7) << 8) | fetch(); + if (code & 0x0800) { /* word op */ + unsigned short wtmp = get_word_direct(addr); + set_word_direct( addr, + FUNC2( wtmp, reg2(RI_F0) ) + ); + } else { + unsigned char tmp = get_byte_direct(addr); + set_byte_direct( addr, + FUNC1( tmp, reg1(RI_F0) ) + ); + } + } + break; + + case REG_DIRECT : + { + int addr = ((code & 0x7) << 8) | fetch(); + if (code & 0x0800) { /* word op */ + set_reg2( RI_F0, + FUNC2( reg2(RI_F0), + get_word_direct(addr) + ) + ); + } else { + set_reg1( RI_F0, + FUNC1( reg1(RI_F0), + get_byte_direct(addr) + ) + ); + } + } + break; + + case REG_DATA8 : +#if 0 + { + unsigned char dat = fetch(); + unsigned char res; + res = FUNC1( reg1(RI_F0), dat); + set_reg1( RI_F0, res ); + printf("reg_data8 code=%x dat=%x, res=%x r=%x\n", code, dat, res, reg1( RI_F0) ); + } +#endif + set_reg1( RI_F0, FUNC1( reg1(RI_F0), fetch()) ); + break; + + case REG_DATA16 : + { + unsigned short dat = fetch2(); + set_reg2( RI_F0, FUNC2( reg2(RI_F0), dat) ); + } + break; + + case IREGINC_DATA8 : + case IREG_DATA8 : + { + unsigned char total; + unsigned char tmp; + t_mem addr = reg2(RI_70); + tmp = get1(addr); + total = FUNC1(tmp, fetch() ); + store1(addr, total); + if (operands == IREGINC_DATA8) { + set_reg2(RI_70, addr+1); + } + } + break; + + case IREGINC_DATA16 : + case IREG_DATA16 : + { + unsigned short total; + unsigned short tmp; + t_mem addr = reg2(RI_70); + tmp = get2(addr); + total = FUNC2(tmp, fetch2() ); + store2(addr, total); + if (operands == IREGINC_DATA16) { + set_reg2(RI_70, addr+1); + } + } + break; + + case IREGOFF8_DATA8 : + case IREGOFF16_DATA8 : + { + unsigned short addr; + int offset; + unsigned char tmp; + if (operands == IREGOFF8_DATA8) { + offset = (int)((char) fetch()); + } else { + offset = (int)((short)fetch2()); + } + tmp = fetch(); + addr = reg2(RI_70); + + store1( addr+offset, + FUNC1( tmp, + get1(addr+offset) + ) + ); + } + break; + + case IREGOFF8_DATA16 : + case IREGOFF16_DATA16 : + { + unsigned short addr; + int offset; + unsigned short tmp; + if (operands == IREGOFF8_DATA16) { + offset = (int)((char) fetch()); + } else { + offset = (int)((short)fetch2()); + } + tmp = fetch2(); + addr = reg2(RI_70); + + store2( addr+offset, + FUNC2( tmp, + get2(addr+offset) + ) + ); + } + break; + + case DIRECT_DATA8 : + { + int addr = ((code & 0x70) << 4) | fetch(); + unsigned char bdir = get_byte_direct(addr); + unsigned char bdat = fetch(); + set_byte_direct( addr, FUNC1( bdir, bdat) ); + } + break; + + case DIRECT_DATA16 : + { + int addr = ((code & 0x70) << 4) | fetch(); + unsigned short wdir = get_word_direct(addr); + unsigned short wdat = fetch2(); + set_word_direct( addr, FUNC2( wdir, wdat) ); + } + break; + } + diff --git a/sim/ucsim/xa.src/instcl.h b/sim/ucsim/xa.src/instcl.h new file mode 100644 index 0000000..a6a8267 --- /dev/null +++ b/sim/ucsim/xa.src/instcl.h @@ -0,0 +1,71 @@ +/* xa.src/instcl.h */ + + virtual int inst_ADD(uint code, int operands); + virtual int inst_ADDC(uint code, int operands); + virtual int inst_ADDS(uint code, int operands); + virtual int inst_AND(uint code, int operands); + virtual int inst_ANL(uint code, int operands); + virtual int inst_ASL(uint code, int operands); + virtual int inst_ASR(uint code, int operands); + virtual int inst_BCC(uint code, int operands); + virtual int inst_BCS(uint code, int operands); + virtual int inst_BEQ(uint code, int operands); + virtual int inst_BG(uint code, int operands); + virtual int inst_BGE(uint code, int operands); + virtual int inst_BGT(uint code, int operands); + virtual int inst_BKPT(uint code, int operands); + virtual int inst_BL(uint code, int operands); + virtual int inst_BLE(uint code, int operands); + virtual int inst_BLT(uint code, int operands); + virtual int inst_BMI(uint code, int operands); + virtual int inst_BNE(uint code, int operands); + virtual int inst_BNV(uint code, int operands); + virtual int inst_BOV(uint code, int operands); + virtual int inst_BPL(uint code, int operands); + virtual int inst_BR(uint code, int operands); + virtual int inst_CALL(uint code, int operands); + virtual int inst_CJNE(uint code, int operands); + virtual int inst_CLR(uint code, int operands); + virtual int inst_CMP(uint code, int operands); + virtual int inst_CPL(uint code, int operands); + virtual int inst_DA(uint code, int operands); + virtual int inst_DIV(uint code, int operands); + virtual int inst_DJNZ(uint code, int operands); + virtual int inst_FCALL(uint code, int operands); + virtual int inst_FJMP(uint code, int operands); + virtual int inst_JB(uint code, int operands); + virtual int inst_JBC(uint code, int operands); + virtual int inst_JNB(uint code, int operands); + virtual int inst_JMP(uint code, int operands); + virtual int inst_JNZ(uint code, int operands); + virtual int inst_JZ(uint code, int operands); + virtual int inst_LEA(uint code, int operands); + virtual int inst_LSR(uint code, int operands); + virtual int inst_MOV(uint code, int operands); + virtual int inst_MOVC(uint code, int operands); + virtual int inst_MOVS(uint code, int operands); + virtual int inst_MOVX(uint code, int operands); + virtual int inst_MUL(uint code, int operands); + virtual int inst_NEG(uint code, int operands); + virtual int inst_NOP(uint code, int operands); + virtual int inst_NORM(uint code, int operands); + virtual int inst_OR(uint code, int operands); + virtual int inst_ORL(uint code, int operands); + virtual int inst_POP(uint code, int operands); + virtual int inst_PUSH(uint code, int operands); + virtual int inst_RET(uint code, int operands); + virtual int inst_RETI(uint code, int operands); + virtual int inst_RESET(uint code, int operands); + virtual int inst_RL(uint code, int operands); + virtual int inst_RLC(uint code, int operands); + virtual int inst_RR(uint code, int operands); + virtual int inst_RRC(uint code, int operands); + virtual int inst_SETB(uint code, int operands); + virtual int inst_SEXT(uint code, int operands); + virtual int inst_SUB(uint code, int operands); + virtual int inst_SUBB(uint code, int operands); + virtual int inst_TRAP(uint code, int operands); + virtual int inst_XCH(uint code, int operands); + virtual int inst_XOR(uint code, int operands); + +/* End of xa.src/instcl.h */ diff --git a/sim/ucsim/xa.src/regsxa.h b/sim/ucsim/xa.src/regsxa.h new file mode 100644 index 0000000..363d16d --- /dev/null +++ b/sim/ucsim/xa.src/regsxa.h @@ -0,0 +1,281 @@ +/* + * Simulator of microcontrollers (regsxa.h) + * + * Copyright (C) 1999,2002 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * Other contributors include: + * Karl Bongers karl@turbobit.com, + * Johan Knol + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#define REGS_OFFSET 0x800 + +#ifndef REGSAVR_HEADER +#define REGSAVR_HEADER + +#include "ddconfig.h" + +struct t_regs +{ + int dummy; +}; + +/* these macros suck, what was I thinking? Try to make it go fast + at the our expense? Daniels going to hate me if I continue to + clutter up his nice C++ with old crusty C macros :) Karl. +*/ + +/* store to sfr */ +#define set_word_direct(addr, val) { sfr->set((t_addr) (addr), (val) & 0xff); \ + sfr->set((t_addr) (addr+1), ((val) >> 8) & 0xff); } +#define set_byte_direct(addr, val) sfr->set((t_addr) (addr), (val) ) + +/* get from sfr */ +#define get_byte_direct(addr) sfr->get((t_addr) (addr)) +#define get_word_direct(addr) (sfr->get((t_addr) (addr)) | (sfr->get((t_addr) (addr+1)) << 8) ) + +/* store to idata(onchip) ram */ +#define set_idata2(addr, val) { iram->set((t_addr) (addr), (val) & 0xff); \ + iram->set((t_addr) (addr+1), ((val) >> 8) & 0xff); } +#define set_idata1(addr, val) iram->set((t_addr) (addr), (val) ) + +/* get from idata(onchip) ram */ +#define get_idata1(addr) iram->get((t_addr) (addr)) +#define get_idata2(addr) (iram->get((t_addr) (addr)) | (iram->get((t_addr) (addr+1)) << 8) ) + +/* store to xdata(external) ram */ +#define set_xdata2(addr, val) { ram->set((t_addr) (addr), (val) & 0xff); \ + ram->set((t_addr) (addr+1), ((val) >> 8) & 0xff); } +#define set_xdata1(addr, val) ram->set((t_addr) (addr), val) + +/* get from xdata(external) ram */ +#define get_xdata1(addr) ram->get((t_addr) (addr)) +#define get_xdata2(addr) (ram->get((t_addr) (addr)) | (ram->get((t_addr) (addr+1)) << 8) ) + +/* get from code */ +#define getcode1(addr) rom->get((t_addr) (addr)) +#define getcode2(addr) (rom->get((t_addr) (addr)) | (rom->get((t_addr) (addr+1)) << 8) ) + +/* fetch from opcode code space */ +#define fetch2() ((fetch() << 8) | fetch()) +#define fetch1() fetch() + +/* get a 1 or 2 byte register */ +#define reg2(_index) get_reg(1, REGS_OFFSET + (_index<<1)) /* function in inst.cc */ +#define reg1(_index) (unsigned char)get_reg(0, REGS_OFFSET + (_index)) + +#define set_reg1(_index, _value) { \ + set_byte_direct((REGS_OFFSET+(_index)), _value); \ +} + +#define set_reg2(_index, _value) { \ + set_word_direct( (REGS_OFFSET+(_index<<1)), _value); \ +} + +#define set_reg(_word_flag, _index, _value) { \ + if (_word_flag) \ + { set_reg2((_index), _value) } \ + else \ + { set_reg1((_index), _value) } \ +} + +/* R7 mirrors 1 of 2 real SP's + note: we will probably need a real function here... + */ +#define set_sp(_value) { \ + { set_word_direct(REGS_OFFSET+(7*2), _value); } \ +} + +#define get_sp() ((TYPE_UWORD)(get_word_direct(REGS_OFFSET+(7*2)))) + +/* the program status word */ +#define PSW 0x400 +#define get_psw() ((TYPE_UWORD)(get_word_direct(PSW))) +#define set_psw(_flags) set_word_direct(PSW, _flags) + +/* the system configuration register */ +#define SCR 0x440 +#define get_scr() get_byte_direct(SCR) +#define set_scr(scr) set_byte_direct(SCR, scr) + +// PSW bits...(note: consider replacing with Bit defines used in s51.src code) +#define BIT_C 0x80 +#define BIT_AC 0x40 +#define BIT_V 0x04 +#define BIT_N 0x02 +#define BIT_Z 0x01 +#define BIT_ALL (BIT_C | BIT_AC | BIT_V | BIT_N | BIT_Z) + + +#if 0 +-------------------------------------------------------------------- +Developer Notes. + +This user guide has got the detailed information on the XA chip. + +http://www.semiconductors.philips.com/acrobat/various/XA_USER_GUIDE_1.pdf + +f: {unused slot(word accessable only) for R8-R15} +e: R7h,R7l Stack pointer, ptr to USP(PSW.SM=0), or SSP(PSW.SM=1) +c: R6h,R6l +a: R5h,R5l +8: R4h,R4l +below are the banked registers which mirror(B0..B3) depending on +PSW.(RS0,RS1) +6: R3h,R3l +4: R2h,R2l +2: R1h,R1l +0: R0h,R0l + +Registers are all bit addressable as: +2: bx1f,bx1e...b8(R0h) bx17,bx16..bx10(R0l) +0: bxf,bxe...b8(R0h) b7,b6..b0(R0l) + +Memory is little endian: +addr0: LSB +addr1: MSB + +Data word access limited to word boundaries. If non-word address used, +then will act as lesser word alignment used(addr b0=0). + +Internal memory takes precedence over external memory, unless +explicit movx used. + +64K segment memory layout, bank registers used include: +DS(data segment) and ES(extra segment) and forms high byte of +24 bit address. Stack is in DS, so ES typically used to access +user data. + +SFR(1K direct space) is above normal 1K direct address space(0-3FFH) +between 400H to 7FFH. + +Branch targets must reside on even boundaries + +MOVC instructions use either PC(SSEL.4=0) or CS(SSEL.4=1) register. + +Core SFRs: +PCON, SCR, SSEL, PSWH, PSWL, CS, ES, DS +(1K SFR space) +400H-43FH are bit or byte accesable. +400H-5FFH is for built in SFR hardware. +600H-7FFH is for external SFR hardware access. +SFR access is independent of segment regs. +SFR inacessable from indirect addressing(must use direct-addr in opcodes). + +Bit space: +0 to ffH - R0 to R15 +100H to 1ffH - 20h to 3fH(direct ram, relative to DS) +200H to 3FFH - 400H to 43FH(on board SFRs) + +PSW Flags: Carry(C), Aux Carry(AC), Overflow(V), Negative(N), Zero(Z). + +Stack ptr is pre-decremented, followed by load(word operation), +default SPs are set to 100H. So first PUSH would go to FEH-FFH. + +DIRECT MEMORY SPACE + +When we speak of direct memory space we refer to opcodes like +MOV Rd, direct +The "direct" part is always composed of 11 bits in the opcode. +So the total size of "direct" space is 2K bytes. + +1.) This direct memory space contains the SFRs starting at 0x400 offset. + +Internal onchip memory(SFRs and onchip RAM) always override +external memory. Read the specific Chip documentation for the +location of SFRs and RAM. + +The codes space is independent. + +The registers: 4 banks of 8 bytes(R0-R3), R4-R7 8 bytes, and stack +pointers are self contained and not part of any address space. +(The CS,ES,DS appear to reside in SFR space). + +This is still confusing, let take some examples. + +--------------------------- +XA-G49 chip has 2k bytes built in RAM. + +According to the XA-G49 datasheet: + +With the DS set to 0, then all indirect address references +between 0-7FFH reference the onchip 2K RAM. Direct address +references below 0x400 access onchip 2K RAM. + +With the DS not set to 0, then all indirect address references +between 0-7FFH reference external memory. Direct address +references below 0x400 access external memory. + +Any direct address references between 400H and 7FFH access the SFRs +regardless of the segment register contents. + +To access any external memory which overlaps the 2K onchip memory +ues the MOVX instruction. + +--------------------------- +Proposed segment layout use for SDCC/XA compiler: + +XDATA -> external memory(use indirect addressing, ignore direct + addressing, ignore any overlap with onchip memory). + +IDATA -> onchip memory(use indirect addressing, ignore direct + addressing, assume small model where DS,ES always 0). + +DATA -> SFR memory access using direct addressing. + +CODE -> Far calls/returns are available. + +(Johan, Im just trying to spell this out explicitly for +my own understanding.) + +--------------------------- +Proposed segment layout use for ucSim XA simulator. + +ram -> external memory. + +rom -> external/internal code. + +sfr -> SFR register space. Include registers/register banks here +in some unused location to provide a means to dump all the register +file contents using the "ds" command. Could make sfr memory larger +than 0x800, and use the space above 0x800 to hold registers/sp-s. + +idata -> onchip memory. + +I think we can determine the size of idata memory at run time, so +this could allow for various sized onchip memorys. So indirect +memory accesses like this: +set_indirect1(addr, value) { + if (addr < mem_size(idata)) { + set_idata(addr,value); + } else { + set_xdata(addr,value); + } +} + +---------------------------------------------- +#endif + + +#endif +/* End of xa.src/regsxa.h */ diff --git a/sim/ucsim/xa.src/simxa.cc b/sim/ucsim/xa.src/simxa.cc new file mode 100644 index 0000000..6120f2b --- /dev/null +++ b/sim/ucsim/xa.src/simxa.cc @@ -0,0 +1,45 @@ +/* + * Simulator of microcontrollers (simxa.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + + +// local +#include "simxacl.h" +#include "xacl.h" + + +cl_simxa::cl_simxa(class cl_app *the_app): + cl_sim(the_app) +{} + +class cl_uc * +cl_simxa::mk_controller(void) +{ + return(new cl_xa(this)); +} + + +/* End of xa.src/simxa.cc */ diff --git a/sim/ucsim/xa.src/simxacl.h b/sim/ucsim/xa.src/simxacl.h new file mode 100644 index 0000000..1a22c5b --- /dev/null +++ b/sim/ucsim/xa.src/simxacl.h @@ -0,0 +1,45 @@ +/* + * Simulator of microcontrollers (simxacl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef SIMXACL_HEADER +#define SIMXACL_HEADER + +#include "simcl.h" + + +class cl_simxa: public cl_sim +{ +public: + cl_simxa(class cl_app *the_app); + + virtual class cl_uc *mk_controller(void); +}; + + +#endif + +/* End of xa.src/simxacl.h */ diff --git a/sim/ucsim/xa.src/sxa.cc b/sim/ucsim/xa.src/sxa.cc new file mode 100644 index 0000000..5bd6493 --- /dev/null +++ b/sim/ucsim/xa.src/sxa.cc @@ -0,0 +1,54 @@ +/* + * Simulator of microcontrollers (sxa.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +// prj +#include "globals.h" + +// sim.src +#include "appcl.h" + +// local +#include "simxacl.h" + + +int +main(int argc, char *argv[]) +{ + class cl_sim *sim; + + application= new cl_app(); + application->init(argc, argv); + sim= new cl_simxa(application); + sim->init(); + application->set_simulator(sim); + application->run(); + delete application; + return(0); +} + + +/* End of xa.src/sxa.cc */ diff --git a/sim/ucsim/xa.src/xa.cc b/sim/ucsim/xa.src/xa.cc new file mode 100644 index 0000000..23fa5ea --- /dev/null +++ b/sim/ucsim/xa.src/xa.cc @@ -0,0 +1,1003 @@ +/* + * Simulator of microcontrollers (xa.cc) + * + * Copyright (C) 1999,2002 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * Other contributors include: + * Karl Bongers karl@turbobit.com, + * Johan Knol johan.knol@iduna.nl + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include +#include +#include +#include "i_string.h" + +// prj +#include "pobjcl.h" + +// sim +#include "simcl.h" + +// local +#include "xacl.h" +#include "glob.h" +#include "regsxa.h" + +/* + * Base type of xa controllers + */ + +cl_xa::cl_xa(class cl_sim *asim): + cl_uc(asim) +{ + type= CPU_XA; +} + +int +cl_xa::init(void) +{ + cl_uc::init(); /* Memories now exist */ + ram= address_space(MEM_XRAM_ID); + rom= address_space(MEM_ROM_ID); + + /* set SCR to osc/4, native XA mode, flat 24 */ + set_scr(0); + /* initialize SP to 100H */ + set_reg2(7, 0x100); + /* set PSW from reset vector */ + set_psw(getcode2(0)); + /* set PC from reset vector */ + PC = getcode2(2); + + printf("The XA Simulator is in development, UNSTABLE, DEVELOPERS ONLY!\n"); + + return(0); +} + +/* +class cl_m * +cl_xa::mk_mem(enum mem_class type, char *class_name) +{ + class cl_m *m= cl_uc::mk_mem(type, class_name); + if (type == MEM_SFR) + sfr= m; + if (type == MEM_IRAM) + iram= m; + return(m); +} +*/ + +char * +cl_xa::id_string(void) +{ + return("unspecified XA"); +} + + +/* + * Making elements of the controller + */ +/* +t_addr +cl_xa::get_mem_size(enum mem_class type) +{ + switch(type) + { + case MEM_IRAM: return(0x2000); + case MEM_SFR: return(0x2000); + case MEM_ROM: return(0x10000); + case MEM_XRAM: return(0x10000); + default: return(0); + } + return(cl_uc::get_mem_size(type)); +} +*/ + +void +cl_xa::mk_hw_elements(void) +{ + //class cl_base *o; + /* t_uc::mk_hw() does nothing */ +} + +void +cl_xa::make_memories(void) +{ + class cl_address_space *as; + + as= rom= new cl_address_space("rom", 0, 0x10000, 8); + as->init(); + address_spaces->add(as); + as= iram= new cl_address_space("iram", 0, 0x2000, 8); + as->init(); + address_spaces->add(as); + as= sfr= new cl_address_space("sfr", 0x0, 0x2000, 8); + as->init(); + address_spaces->add(as); + as= ram= new cl_address_space("xram", 0, 0x10000, 8); + as->init(); + address_spaces->add(as); + + class cl_address_decoder *ad; + class cl_memory_chip *chip; + + chip= new cl_memory_chip("rom_chip", 0x10000, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= address_space("rom"), chip, 0, 0xffff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + chip= new cl_memory_chip("iram_chip", 0x2000, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= address_space("iram"), chip, 0, 0x1fff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + chip= new cl_memory_chip("xram_chip", 0x10000, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= address_space("xram"), chip, 0, 0xffff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); + + chip= new cl_memory_chip("sfr_chip", 0x2000, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= address_space("sfr"), chip, 0x0, 0x1fff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); +} + + +/* + * Help command interpreter + */ + +struct dis_entry * +cl_xa::dis_tbl(void) +{ + // this should be unused, we need to make main prog code + // independent of any array thing. + printf("ERROR - Using disass[] table in XA sim code!\n"); + return(glob_disass_xa); +} + +struct name_entry *cl_xa::sfr_tbl(void) +{ + return(sfr_tabXA51); +} + +struct name_entry *cl_xa::bit_tbl(void) +{ + return(bit_tabXA51); +} + +int +cl_xa::inst_length(t_addr addr) +{ + int len = 0; + + get_disasm_info(addr, &len, NULL, NULL, NULL, NULL); + + return len; +} + +int +cl_xa::inst_branch(t_addr addr) +{ + int b; + + get_disasm_info(addr, NULL, &b, NULL, NULL, NULL); + + return b; +} + +int +cl_xa::longest_inst(void) +{ + return 6; +} + +static char dir_name[64]; +char *cl_xa::get_dir_name(short addr) { + if (!get_name(addr, sfr_tbl(), dir_name)) { + sprintf (dir_name, "0x%03x", addr); + } + return dir_name; +} + +static char bit_name[64]; +char *cl_xa::get_bit_name(short addr) { + if (!get_name(addr, bit_tbl(), bit_name)) { + sprintf (bit_name, "0x%03x", addr); + } + return bit_name; +} + +/*-------------------------------------------------------------------- +get_disasm_info - Given an address, return information about the opcode + which resides there. + addr - address of opcode we want information on. + ret_len - return length of opcode. + ret_branch - return a character which indicates if we are + a branching opcode. Used by main app to implement "Next" + function which steps over functions. + immed_offset - return a number which represents the number of bytes + offset to where any immediate data is(tail end of opcode). Used + for printing disassembly. + operands - return a key indicating the form of the operands, + used for printing the disassembly. + mnemonic - return a key indicating the mnemonic of the instruction. + + Return value: Return the operand code formed by either the single + byte opcode or 2 bytes of the opcode for multi-byte opcodes. + + Note: Any of the return pointer parameters can be set to NULL to + indicate the caller does not want the information. +|--------------------------------------------------------------------*/ +int +cl_xa::get_disasm_info(t_addr addr, + int *ret_len, + int *ret_branch, + int *immed_offset, + int *parms, + int *mnemonic) +{ + uint code; + int len = 0; + int immed_n = 0; + int i; + int start_addr = addr; + + code= get_mem(MEM_ROM_ID, addr++); + if (code == 0x00) { + i= 0; + while (disass_xa[i].mnemonic != NOP) + i++; + } else { + len = 2; + code = (code << 8) | get_mem(MEM_ROM_ID, addr++); + i= 0; + while ((code & disass_xa[i].mask) != disass_xa[i].code && + disass_xa[i].mnemonic != BAD_OPCODE) + i++; + } + + if (ret_len) + *ret_len = disass_xa[i].length; + if (ret_branch) + *ret_branch = disass_xa[i].branch; + if (immed_offset) { + if (immed_n > 0) + *immed_offset = immed_n; + else *immed_offset = (addr - start_addr); + } + if (parms) { + *parms = disass_xa[i].operands; + } + if (mnemonic) { + *mnemonic = disass_xa[i].mnemonic; + } + + return code; +} + +static char *w_reg_strs[] = { + "R0", "R1", + "R2", "R3", + "R4", "R5", + "R6", "R7", + "R8", "R9", + "R10", "R11", + "R12", "R13", + "R14", "R15"}; + +static char *b_reg_strs[] = { + "R0l", "R0h", + "R1l", "R1h", + "R2l", "R2h", + "R3l", "R3h", + "R4l", "R4h", + "R5l", "R5h", + "R6l", "R6h", + "R7l", "R7h"}; + +/*-------------------------------------------------------------------- +disass - Disassemble an opcode. + addr - address of opcode to disassemble/print. + sep - optionally points to string(tab) to use as separator. +|--------------------------------------------------------------------*/ +const char * +cl_xa::disass(t_addr addr, const char *sep) +{ + char work[256], parm_str[40]; + char *buf, *p, *b; + int code; + int len = 0; + int immed_offset = 0; + int operands; + int mnemonic; + char **reg_strs; + + p= work; + + code = get_disasm_info(addr, &len, NULL, &immed_offset, &operands, &mnemonic); + + if (mnemonic == BAD_OPCODE) { + buf= (char*)malloc(30); + strcpy(buf, "UNKNOWN/INVALID"); + return(buf); + } + + if (code & 0x0800) + reg_strs = w_reg_strs; + else + reg_strs = b_reg_strs; + + switch(operands) { + // the repeating common parameter encoding for ADD, ADDC, SUB, AND... + case REG_REG : + sprintf(parm_str, "%s,%s", + reg_strs[((code >> 4) & 0xf)], + reg_strs[(code & 0xf)]); + break; + case REG_IREG : + sprintf(parm_str, "%s,[%s]", + reg_strs[((code >> 4) & 0xf)], + w_reg_strs[(code & 0xf)]); + break; + case IREG_REG : + sprintf(parm_str, "[%s],%s", + w_reg_strs[(code & 0x7)], + reg_strs[((code >> 4) & 0xf)] ); + break; + case REG_IREGOFF8 : + sprintf(parm_str, "%s,[%s+%02x]", + reg_strs[((code >> 4) & 0xf)], + w_reg_strs[(code & 0x7)], + get_mem(MEM_ROM_ID, addr+immed_offset)); + ++immed_offset; + break; + case IREGOFF8_REG : + sprintf(parm_str, "[%s+%02x],%s", + w_reg_strs[(code & 0x7)], + get_mem(MEM_ROM_ID, addr+immed_offset), + reg_strs[((code >> 4) & 0xf)] ); + ++immed_offset; + break; + case REG_IREGOFF16 : + sprintf(parm_str, "%s,[%s+%04x]", + reg_strs[((code >> 4) & 0xf)], + w_reg_strs[(code & 0x7)], + (short)((get_mem(MEM_ROM_ID, addr+immed_offset+1)) | + (get_mem(MEM_ROM_ID, addr+immed_offset)<<8)) ); + ++immed_offset; + ++immed_offset; + break; + case IREGOFF16_REG : + sprintf(parm_str, "[%s+%04x],%s", + w_reg_strs[(code & 0x7)], + (short)((get_mem(MEM_ROM_ID, addr+immed_offset+1)) | + (get_mem(MEM_ROM_ID, addr+immed_offset)<<8)), + reg_strs[((code >> 4) & 0xf)] ); + ++immed_offset; + ++immed_offset; + break; + case REG_IREGINC : + sprintf(parm_str, "%s,[%s+]", + reg_strs[((code >> 4) & 0xf)], + w_reg_strs[(code & 0xf)]); + break; + case IREGINC_REG : + sprintf(parm_str, "[%s+],%s", + w_reg_strs[(code & 0x7)], + reg_strs[((code >> 4) & 0xf)] ); + break; + case DIRECT_REG : + sprintf(parm_str, "%s,%s", + get_dir_name(((code & 0x7) << 8) | + get_mem(MEM_ROM_ID, addr+immed_offset)), + reg_strs[((code >> 4) & 0xf)] ); + ++immed_offset; + break; + case REG_DIRECT : + sprintf(parm_str, "%s,%s", + reg_strs[((code >> 4) & 0xf)], + get_dir_name(((code & 0x7) << 8) | + get_mem(MEM_ROM_ID, addr+immed_offset))); + ++immed_offset; + break; + case REG_DATA8 : + sprintf(parm_str, "%s,#0x%02x", + b_reg_strs[((code >> 4) & 0xf)], + get_mem(MEM_ROM_ID, addr+immed_offset) ); + ++immed_offset; + break; + case REG_DATA16 : + sprintf(parm_str, "%s,#0x%04x", + reg_strs[((code >> 4) & 0xf)], + (short)((get_mem(MEM_ROM_ID, addr+immed_offset+1)) | + (get_mem(MEM_ROM_ID, addr+immed_offset)<<8)) ); + ++immed_offset; + ++immed_offset; + break; + case IREG_DATA8 : + sprintf(parm_str, "[%s], 0x%02x", + w_reg_strs[((code >> 4) & 0x7)], + get_mem(MEM_ROM_ID, addr+immed_offset) ); + ++immed_offset; + break; + case IREG_DATA16 : + sprintf(parm_str, "[%s], 0x%04x", + w_reg_strs[((code >> 4) & 0x7)], + (short)((get_mem(MEM_ROM_ID, addr+immed_offset+1)) | + (get_mem(MEM_ROM_ID, addr+immed_offset)<<8)) ); + ++immed_offset; + ++immed_offset; + break; + case IREGINC_DATA8 : + sprintf(parm_str, "[%s+], 0x%02x", + w_reg_strs[((code >> 4) & 0x7)], + get_mem(MEM_ROM_ID, addr+immed_offset) ); + ++immed_offset; + break; + case IREGINC_DATA16 : + sprintf(parm_str, "[%s+], 0x%04x", + w_reg_strs[((code >> 4) & 0x7)], + (short)((get_mem(MEM_ROM_ID, addr+immed_offset+1)) | + (get_mem(MEM_ROM_ID, addr+immed_offset)<<8)) ); + ++immed_offset; + ++immed_offset; + break; + case IREGOFF8_DATA8 : + sprintf(parm_str, "[%s+%02x], 0x%02x", + w_reg_strs[((code >> 4) & 0x7)], + get_mem(MEM_ROM_ID, addr+immed_offset), + get_mem(MEM_ROM_ID, addr+immed_offset+1) ); + immed_offset += 2; + break; + case IREGOFF8_DATA16 : + sprintf(parm_str, "[%s+%02x], 0x%04x", + w_reg_strs[((code >> 4) & 0x7)], + get_mem(MEM_ROM_ID, addr+immed_offset), + (short)((get_mem(MEM_ROM_ID, addr+immed_offset+2)) | + (get_mem(MEM_ROM_ID, addr+immed_offset+1)<<8)) ); + immed_offset += 3; + break; + case IREGOFF16_DATA8 : + sprintf(parm_str, "[%s+%04x], 0x%02x", + w_reg_strs[((code >> 4) & 0x7)], + (short)((get_mem(MEM_ROM_ID, addr+immed_offset+1)) | + (get_mem(MEM_ROM_ID, addr+immed_offset+0)<<8)), + get_mem(MEM_ROM_ID, addr+immed_offset+2) ); + immed_offset += 3; + break; + case IREGOFF16_DATA16 : + sprintf(parm_str, "[%s+%04x], 0x%04x", + w_reg_strs[((code >> 4) & 0x7)], + (short)((get_mem(MEM_ROM_ID, addr+immed_offset+1)) | + (get_mem(MEM_ROM_ID, addr+immed_offset+0)<<8)), + (short)((get_mem(MEM_ROM_ID, addr+immed_offset+3)) | + (get_mem(MEM_ROM_ID, addr+immed_offset+2)<<8)) ); + immed_offset += 4; + break; + case DIRECT_DATA8 : + sprintf(parm_str, "%s,#0x%02x", + get_dir_name(((code & 0x0070) << 4) | + get_mem(MEM_ROM_ID, addr+immed_offset)), + get_mem(MEM_ROM_ID, addr+immed_offset+1)); + immed_offset += 3; + break; + case DIRECT_DATA16 : + sprintf(parm_str, "%s,#0x%04x", + get_dir_name(((code & 0x0070) << 4) | + get_mem(MEM_ROM_ID, addr+immed_offset)), + get_mem(MEM_ROM_ID, addr+immed_offset+2) + + (get_mem(MEM_ROM_ID, addr+immed_offset+1)<<8)); + immed_offset += 3; + break; + +// odd-ball ones + case NO_OPERANDS : // for NOP + strcpy(parm_str, ""); + break; + case CY_BIT : + sprintf(parm_str, "C,%s", + get_bit_name(((code&0x0003)<<8) + get_mem(MEM_ROM_ID, addr+2))); + break; + case BIT_CY : + sprintf(parm_str, "%s,C", + get_bit_name(((code&0x0003)<<8) + get_mem(MEM_ROM_ID, addr+2))); + break; + case REG_DATA4 : + strcpy(parm_str, "REG_DATA4"); + break; + case REG_DATA5 : + strcpy(parm_str, "REG_DATA5"); + break; + case IREG_DATA4 : + strcpy(parm_str, "IREG_DATA4"); + break; + case IREGINC_DATA4 : + strcpy(parm_str, "IREGINC_DATA4"); + break; + case IREGOFF8_DATA4 : + strcpy(parm_str, "IREGOFF8_DATA4"); + break; + case IREGOFF16_DATA4 : + strcpy(parm_str, "IREGOFF16_DATA4"); + break; + case DIRECT_DATA4 : + sprintf(parm_str, "%s,#0x%x", + get_dir_name(((code & 0x70)<<4) | + get_mem(MEM_ROM_ID, addr+2)), + code&0x0f); + break; + case DIRECT : + sprintf(parm_str, "%s", + get_dir_name(((code & 0x007) << 4) + + get_mem(MEM_ROM_ID, addr+2))); + break; + case REG : + sprintf(parm_str, "%s", + reg_strs[((code >> 4) & 0xf)] ); + break; + case IREG : + sprintf(parm_str, "[%s]", + reg_strs[((code >> 4) & 0xf)] ); + break; + case BIT_ALONE : + sprintf(parm_str, "%s", + get_bit_name(((code&0x0003)<<8) + get_mem(MEM_ROM_ID, addr+2))); + break; + case BIT_REL8 : + sprintf(parm_str, "%s,0x%04x", + get_bit_name((code&0x0003)<<8) + get_mem(MEM_ROM_ID, addr+2), + ((signed char)get_mem(MEM_ROM_ID, addr+3)*2+addr+len)&0xfffe); + break; + case DATA4: + sprintf(parm_str, "#0x%02x", code&0x0f); + break; + case ADDR24 : + sprintf(parm_str, "0x%06x", + (get_mem(MEM_ROM_ID, addr+3)<<16) + + (get_mem(MEM_ROM_ID, addr+1)<<8) + + get_mem(MEM_ROM_ID, addr+2)); + break; + break; + case REG_REL8 : + sprintf(parm_str, "%s,0x%04x", + reg_strs[(code>>4) & 0xf], + ((signed char)get_mem(MEM_ROM_ID, addr+2)*2+addr+len)&0xfffe); + break; + case DIRECT_REL8 : + sprintf(parm_str, "%s,0x%04x", + get_dir_name(((code&0x07)<<8) + + get_mem(MEM_ROM_ID, addr+2)), + ((signed char)get_mem(MEM_ROM_ID, addr+2)*2+addr+len)&0xfffe); + break; + case REG_USP: + sprintf(parm_str, "REG_USP"); + break; + case USP_REG: + sprintf(parm_str, "USP_REG"); + break; + case REL8 : + sprintf(parm_str, "0x%04x", + ((signed char)get_mem(MEM_ROM_ID, addr+1)*2+addr+len)&0xfffe); + break; + case REL16 : + sprintf(parm_str, "0x%04x", + ((signed short)((get_mem(MEM_ROM_ID, addr+1)<<8) + get_mem(MEM_ROM_ID, addr+2))*2+addr+len)&0xfffe); + break; + + case RLIST : { + /* TODO: the list should be comma reperated + and maybe for POP the list should be reversed */ + unsigned char rlist=code&0xff; + parm_str[0]='\0'; + if (code&0x0800) { // word list + if (code&0x4000) { // R8-R15 + if (rlist&0x80) strcat (parm_str, "R15 "); + if (rlist&0x40) strcat (parm_str, "R14"); + if (rlist&0x20) strcat (parm_str, "R13 "); + if (rlist&0x10) strcat (parm_str, "R12 "); + if (rlist&0x08) strcat (parm_str, "R11 "); + if (rlist&0x04) strcat (parm_str, "R10 "); + if (rlist&0x02) strcat (parm_str, "R9 "); + if (rlist&0x01) strcat (parm_str, "R8 "); + } else { // R7-R0 + if (rlist&0x80) strcat (parm_str, "R7 "); + if (rlist&0x40) strcat (parm_str, "R6 "); + if (rlist&0x20) strcat (parm_str, "R5 "); + if (rlist&0x10) strcat (parm_str, "R4 "); + if (rlist&0x08) strcat (parm_str, "R3 "); + if (rlist&0x04) strcat (parm_str, "R2 "); + if (rlist&0x02) strcat (parm_str, "R1 "); + if (rlist&0x01) strcat (parm_str, "R0 "); + } + } else { // byte list + if (code&0x4000) { //R7h-R4l + if (rlist&0x80) strcat (parm_str, "R7h "); + if (rlist&0x40) strcat (parm_str, "R7l "); + if (rlist&0x20) strcat (parm_str, "R6h "); + if (rlist&0x10) strcat (parm_str, "R6l "); + if (rlist&0x08) strcat (parm_str, "R5h "); + if (rlist&0x04) strcat (parm_str, "R5l "); + if (rlist&0x02) strcat (parm_str, "R4h "); + if (rlist&0x01) strcat (parm_str, "R4l "); + } else { // R3h-R0l + if (rlist&0x80) strcat (parm_str, "R3h "); + if (rlist&0x40) strcat (parm_str, "R3l "); + if (rlist&0x20) strcat (parm_str, "R2h "); + if (rlist&0x10) strcat (parm_str, "R2l "); + if (rlist&0x08) strcat (parm_str, "R1h "); + if (rlist&0x04) strcat (parm_str, "R1l "); + if (rlist&0x02) strcat (parm_str, "R0h "); + if (rlist&0x01) strcat (parm_str, "R0l "); + } + } + } + break; + + case REG_DIRECT_REL8 : + sprintf(parm_str, "%s,%s,0x%02x", + reg_strs[((code >> 4) & 0xf)], + get_dir_name(((code & 0x7) << 8) + + get_mem(MEM_ROM_ID, addr+immed_offset)), + ((signed char) get_mem(MEM_ROM_ID, addr+immed_offset+1) * 2) & 0xfffe ); + break; + case REG_DATA8_REL8 : + sprintf(parm_str, "%s,#0x%02x,0x%02x", + reg_strs[((code >> 4) & 0xf)], + get_mem(MEM_ROM_ID, addr+immed_offset+1), + ((signed char)get_mem(MEM_ROM_ID, addr+immed_offset) * 2) & 0xfffe ); + break; + case REG_DATA16_REL8 : + sprintf(parm_str, "%s,#0x%04x,0x%02x", + w_reg_strs[(code >> 4) & 0xf], + get_mem(MEM_ROM_ID, addr+immed_offset+2) + + (get_mem(MEM_ROM_ID, addr+immed_offset+1)<<8), + ((signed char)get_mem(MEM_ROM_ID, addr+immed_offset) * 2) & 0xfffe ); + break; + case IREG_DATA8_REL8 : + sprintf(parm_str, "[%s],#0x%02x,0x%02x", + reg_strs[((code >> 4) & 0x7)], + get_mem(MEM_ROM_ID, addr+immed_offset+1), + ((signed char)get_mem(MEM_ROM_ID, addr+immed_offset) * 2) & 0xfffe ); + break; + case IREG_DATA16_REL8 : + sprintf(parm_str, "[%s],#0x%04x,0x%02x", + w_reg_strs[(code >> 4) & 0x7], + get_mem(MEM_ROM_ID, addr+immed_offset+2) + + (get_mem(MEM_ROM_ID, addr+immed_offset+1)<<8), + ((signed char)get_mem(MEM_ROM_ID, addr+immed_offset) * 2) & 0xfffe ); + break; + + case A_APLUSDPTR : + strcpy(parm_str, "A, [A+DPTR]"); + break; + + case A_APLUSPC : + strcpy(parm_str, "A, [A+PC]"); + break; + + case REG_REGOFF8 : + sprintf(parm_str, "%s,%s+0x%02x", + w_reg_strs[(code >> 4) & 0x7], + w_reg_strs[code & 0x7], + get_mem(MEM_ROM_ID, addr+immed_offset)); + break; + + case REG_REGOFF16 : + sprintf(parm_str, "%s,%s+0x%02x", + w_reg_strs[(code >> 4) & 0x7], + w_reg_strs[code & 0x7], + get_mem(MEM_ROM_ID, addr+immed_offset+1) + + (get_mem(MEM_ROM_ID, addr+immed_offset+0)<<8)); + break; + + case A_PLUSDPTR : + strcpy(parm_str, "[A+DPTR]"); + break; + + case IIREG : + sprintf(parm_str, "[[%s]]", + w_reg_strs[(code & 0x7)]); + break; + + default: + strcpy(parm_str, "???"); + break; + } + + sprintf(work, "%s %s", + op_mnemonic_str[ mnemonic ], + parm_str); + + p= strchr(work, ' '); + if (!p) + { + buf= strdup(work); + return(buf); + } + if (sep == NULL) + buf= (char *)malloc(6+strlen(p)+1); + else + buf= (char *)malloc((p-work)+strlen(sep)+strlen(p)+1); + + for (p= work, b= buf; *p != ' '; p++, b++) + *b= *p; + p++; + *b= '\0'; + if (sep == NULL) + { + while (strlen(buf) < 6) + strcat(buf, " "); + } + else + strcat(buf, sep); + strcat(buf, p); + return(buf); +} + +/*-------------------------------------------------------------------- + print_regs - Print the registers, flags and other useful information. + Used to print a status line while stepping through the code. +|--------------------------------------------------------------------*/ +void +cl_xa::print_regs(class cl_console_base *con) +{ + unsigned char flags; + + flags = get_psw(); + con->dd_printf("CA---VNZ | ", flags); + con->dd_printf("R0:%04x R1:%04x R2:%04x R3:%04x\n", + reg2(0), reg2(1), reg2(2), reg2(3)); + + con->dd_printf("%c%c---%c%c%c | ", + (flags & BIT_C)?'1':'0', + (flags & BIT_AC)?'1':'0', + (flags & BIT_V)?'1':'0', + (flags & BIT_N)?'1':'0', + (flags & BIT_Z)?'1':'0'); + + con->dd_printf("R4:%04x R5:%04x R6:%04x SP:%04x ES:%04x DS:%04x\n", + reg2(4), reg2(5), reg2(6), reg2(7), 0, 0); + + print_disass(PC, con); +} + + +/*-------------------------------------------------------------------- + exec_inst - Called to implement simulator execution of 1 instruction + at the current PC(program counter) address. +|--------------------------------------------------------------------*/ +int cl_xa::exec_inst(void) +{ + t_mem code1; + uint code; + int i; + int operands; + + if (fetch(&code1)) + return(resBREAKPOINT); + tick(1); + +/* the following lookups make for a slow simulation, we will + figure out how to make it fast later... */ + + /* scan to see if its a 1 byte-opcode */ + code = (code1 << 8); + i= 0; + while ( ((code & disass_xa[i].mask) != disass_xa[i].code || + (!disass_xa[i].is1byte)) /* not a one byte op code */ + && + disass_xa[i].mnemonic != BAD_OPCODE) + i++; + + if (disass_xa[i].mnemonic == BAD_OPCODE) { + /* hit the end of the list, must be a 2 or more byte opcode */ + /* fetch another code byte and search the list again */ + //if (fetch(&code2)) ?not sure if break allowed in middle of opcode? + // return(resBREAKPOINT); + code |= fetch(); /* add 2nd opcode */ + + i= 0; + while ((code & disass_xa[i].mask) != disass_xa[i].code && + disass_xa[i].mnemonic != BAD_OPCODE) + i++; + /* we should have found the opcode by now, if not invalid entry at eol */ + } + + operands = (int)(disass_xa[i].operands); + switch (disass_xa[i].mnemonic) + { + case ADD: + return inst_ADD(code, operands); + case ADDC: + return inst_ADDC(code, operands); + case ADDS: + return inst_ADDS(code, operands); + case AND: + return inst_AND(code, operands); + case ANL: + return inst_ANL(code, operands); + case ASL: + return inst_ASL(code, operands); + case ASR: + return inst_ASR(code, operands); + case BCC: + return inst_BCC(code, operands); + case BCS: + return inst_BCS(code, operands); + case BEQ: + return inst_BEQ(code, operands); + case BG: + return inst_BG(code, operands); + case BGE: + return inst_BGE(code, operands); + case BGT: + return inst_BGT(code, operands); + case BKPT: + return inst_BKPT(code, operands); + case BL: + return inst_BL(code, operands); + case BLE: + return inst_BLE(code, operands); + case BLT: + return inst_BLT(code, operands); + case BMI: + return inst_BMI(code, operands); + case BNE: + return inst_BNE(code, operands); + case BNV: + return inst_BNV(code, operands); + case BOV: + return inst_BOV(code, operands); + case BPL: + return inst_BPL(code, operands); + case BR: + return inst_BR(code, operands); + case CALL: + return inst_CALL(code, operands); + case CJNE: + return inst_CJNE(code, operands); + case CLR: + return inst_CLR(code, operands); + case CMP: + return inst_CMP(code, operands); + case CPL: + return inst_CPL(code, operands); + case DA: + return inst_DA(code, operands); + case DIV_w : + case DIV_d : + case DIVU_b: + case DIVU_w: + case DIVU_d: + return inst_DIV(code, operands); + case DJNZ: + return inst_DJNZ(code, operands); + case FCALL: + return inst_FCALL(code, operands); + case FJMP: + return inst_FJMP(code, operands); + case JB: + return inst_JB(code, operands); + case JBC: + return inst_JBC(code, operands); + case JMP: + return inst_JMP(code, operands); + case JNB: + return inst_JNB(code, operands); + case JNZ: + return inst_JNZ(code, operands); + case JZ: + return inst_JZ(code, operands); + case LEA: + return inst_LEA(code, operands); + case LSR: + return inst_LSR(code, operands); + case MOV: + return inst_MOV(code, operands); + case MOVC: + return inst_MOVC(code, operands); + case MOVS: + return inst_MOVS(code, operands); + case MOVX: + return inst_MOVX(code, operands); + case MUL_w: + case MULU_b: + case MULU_w: + return inst_MUL(code, operands); + case NEG: + return inst_NEG(code, operands); + case NOP: + return inst_NOP(code, operands); + case NORM: + return inst_NORM(code, operands); + case OR: + return inst_OR(code, operands); + case ORL: + return inst_ORL(code, operands); + case POP: + case POPU: + return inst_POP(code, operands); + case PUSH: + case PUSHU: + return inst_PUSH(code, operands); + case RESET: + return inst_RESET(code, operands); + case RET: + return inst_RET(code, operands); + case RETI: + return inst_RETI(code, operands); + case RL: + return inst_RL(code, operands); + case RLC: + return inst_RLC(code, operands); + case RR: + return inst_RR(code, operands); + case RRC: + return inst_RRC(code, operands); + case SETB: + return inst_SETB(code, operands); + case SEXT: + return inst_SEXT(code, operands); + case SUB: + return inst_SUB(code, operands); + case SUBB: + return inst_SUBB(code, operands); + case TRAP: + return inst_TRAP(code, operands); + case XCH: + return inst_XCH(code, operands); + case XOR: + return inst_XOR(code, operands); + + case BAD_OPCODE: + default: + break; + } + + /*if (PC) + PC--; + else + PC= get_mem_size(MEM_ROM_ID)-1;*/ + PC= rom->inc_address(PC, -1); + //tick(-clock_per_cycle()); + sim->stop(resINV_INST); + return(resINV_INST); +} + + +/* End of xa.src/xa.cc */ diff --git a/sim/ucsim/xa.src/xa_bit.cc b/sim/ucsim/xa.src/xa_bit.cc new file mode 100644 index 0000000..5ed3cc6 --- /dev/null +++ b/sim/ucsim/xa.src/xa_bit.cc @@ -0,0 +1,91 @@ +{CPU_XA, 0x33B, "ETI1"}, /* TX interrupt enable 1 */ +{CPU_XA, 0x33A, "ERI1"}, /* RX interrupt enable 1 */ +{CPU_XA, 0x339, "ETI0"}, /* TX interrupt enable 0 */ +{CPU_XA, 0x338, "ERI0"}, /* RX interrupt enable 0 */ +{CPU_XA, 0x337, "EA"}, /* global int. enable */ +{CPU_XA, 0x334, "ET2"}, /* timer 2 interrupt */ +{CPU_XA, 0x333, "ET1"}, /* timer 1 interrupt */ +{CPU_XA, 0x332, "EX1"}, /* external interrupt 1 */ +{CPU_XA, 0x331, "ET0"}, /* timer 0 interrupt */ +{CPU_XA, 0x330, "EX0"}, /* external interrupt 0 */ +{CPU_XA, 0x221, "PD"}, /* power down */ +{CPU_XA, 0x220, "IDL"}, +{CPU_XA, 0x20F, "SM"}, +{CPU_XA, 0x20E, "TM"}, +{CPU_XA, 0x20D, "RS1"}, +{CPU_XA, 0x20C, "RS0"}, +{CPU_XA, 0x20B, "IM3"}, +{CPU_XA, 0x20A, "IM2"}, +{CPU_XA, 0x209, "IM1"}, +{CPU_XA, 0x208, "IM0"}, +{CPU_XA, 0x307, "S0M0"}, +{CPU_XA, 0x306, "S0M1"}, +{CPU_XA, 0x305, "S0M2"}, +{CPU_XA, 0x304, "R0EN"}, +{CPU_XA, 0x303, "T0B8"}, +{CPU_XA, 0x302, "R0B8"}, +{CPU_XA, 0x301, "TI0"}, /* serial port 0 tx ready */ +{CPU_XA, 0x300, "RI0"}, /* serial port 0 rx ready */ +{CPU_XA, 0x30B, "FE0"}, +{CPU_XA, 0x30A, "BR0"}, +{CPU_XA, 0x309, "OE0"}, +{CPU_XA, 0x308, "STINT0"}, +{CPU_XA, 0x327, "S1M0"}, +{CPU_XA, 0x326, "S1M1"}, +{CPU_XA, 0x325, "S1M2"}, +{CPU_XA, 0x324, "R1EN"}, +{CPU_XA, 0x323, "T1B8"}, +{CPU_XA, 0x322, "R1B8"}, +{CPU_XA, 0x321, "TI1"}, /* serial port 0 tx ready */ +{CPU_XA, 0x320, "RI1"}, /* serial port 0 rx ready */ +{CPU_XA, 0x32B, "FE1"}, +{CPU_XA, 0x32A, "BR1"}, +{CPU_XA, 0x329, "OE1"}, +{CPU_XA, 0x328, "STINT1"}, +{CPU_XA, 0x356, "SWR7"}, +{CPU_XA, 0x355, "SWR6"}, +{CPU_XA, 0x354, "SWR5"}, +{CPU_XA, 0x353, "SWR4"}, +{CPU_XA, 0x352, "SWR3"}, +{CPU_XA, 0x351, "SWR2"}, +{CPU_XA, 0x350, "SWR1"}, +{CPU_XA, 0x2C7, "TF2"}, +{CPU_XA, 0x2C6, "EXF2"}, +{CPU_XA, 0x2C5, "RCLK0"}, +{CPU_XA, 0x2C4, "TCLK0"}, +{CPU_XA, 0x2CD, "RCLK1"}, +{CPU_XA, 0x2CC, "TCLK1"}, +{CPU_XA, 0x2C3, "EXEN2"}, +{CPU_XA, 0x2C2, "TR2"}, +{CPU_XA, 0x2C1, "CT2"}, +{CPU_XA, 0x2C0, "CPRL2"}, +{CPU_XA, 0x2C9, "T2OE"}, +{CPU_XA, 0x2C8, "DCEN"}, +{CPU_XA, 0x287, "TF1"}, +{CPU_XA, 0x286, "TR1"}, +{CPU_XA, 0x285, "TF0"}, +{CPU_XA, 0x284, "TR0"}, +{CPU_XA, 0x283, "IE1"}, +{CPU_XA, 0x282, "IT1"}, +{CPU_XA, 0x281, "IE0"}, +{CPU_XA, 0x280, "IT0"}, +{CPU_XA, 0x28A, "T1OE"}, +{CPU_XA, 0x288, "T0OE"}, +{CPU_XA, 0x2FF, "PRE2"}, +{CPU_XA, 0x2FE, "PRE1"}, +{CPU_XA, 0x2FD, "PRE0"}, +{CPU_XA, 0x2FA, "WDRUN"}, +{CPU_XA, 0x2F9, "WDTOF"}, +{CPU_XA, 0x2F8, "WDMOD"}, +{CPU_XA, 0x388, "WR1"}, +{CPU_XA, 0x38F, "T2EX"}, +{CPU_XA, 0x38C, "RXD1"}, +{CPU_XA, 0x38D, "TXD1"}, +{CPU_XA, 0x398, "RXD0"}, +{CPU_XA, 0x399, "TXD0"}, +{CPU_XA, 0x39A, "INT0"}, +{CPU_XA, 0x39B, "INT1"}, +{CPU_XA, 0x39C, "T0"}, +{CPU_XA, 0x39D, "T1"}, +{CPU_XA, 0x39E, "WR"}, +{CPU_XA, 0x39F, "RD"}, diff --git a/sim/ucsim/xa.src/xa_sfr.cc b/sim/ucsim/xa.src/xa_sfr.cc new file mode 100644 index 0000000..ec64164 --- /dev/null +++ b/sim/ucsim/xa.src/xa_sfr.cc @@ -0,0 +1,65 @@ +{CPU_XA, 0x400, "PSW"}, /* Program status word */ +{CPU_XA, 0x400, "PSWL"}, /* Program status word (low byte) */ +{CPU_XA, 0x401, "PSWH"}, /* Program status word (high byte) */ +{CPU_XA, 0x402, "PSW51"}, /* 80C51 compatible PSW */ +{CPU_XA, 0x403, "SSEL"}, /* Segment selection register */ +{CPU_XA, 0x404, "PCON"}, /* Power control register */ +{CPU_XA, 0x410, "TCON"}, /* Timer 0 and 1 control register */ +{CPU_XA, 0x411, "TSTAT"}, /* Timer 0 and 1 extended status */ +{CPU_XA, 0x418, "T2CON"}, /* Timer 2 control register */ +{CPU_XA, 0x419, "T2MOD"}, /* Timer 2 mode control */ +{CPU_XA, 0x41F, "WDCON"}, /* Watchdog control register */ +{CPU_XA, 0x420, "S0CON"}, /* Serial port 0 control register */ +{CPU_XA, 0x421, "S0STAT"}, /* Serial port 0 extended status */ +{CPU_XA, 0x424, "S1CON"}, /* Serial port 1 control register */ +{CPU_XA, 0x425, "S1STAT"}, /* Serial port 1 extended status */ +{CPU_XA, 0x426, "IEL"}, /* Interrupt enable low byte */ +{CPU_XA, 0x427, "IEH"}, /* Interrupt enable high byte */ +{CPU_XA, 0x42A, "SWR"}, /* Software Interrupt Request */ +{CPU_XA, 0x430, "P0"}, /* Port 0 */ +{CPU_XA, 0x431, "P1"}, /* Port 1 */ +{CPU_XA, 0x432, "P2"}, /* Port 2 */ +{CPU_XA, 0x433, "P3"}, /* Port3 */ +{CPU_XA, 0x440, "SCR"}, /* System configuration register */ +{CPU_XA, 0x441, "DS"}, /* Data segment */ +{CPU_XA, 0x442, "ES"}, /* Extra segment */ +{CPU_XA, 0x443, "CS"}, /* Code segment */ +{CPU_XA, 0x450, "TL0"}, /* Timer 0 low byte */ +{CPU_XA, 0x451, "TH0"}, /* Timer 0 high byte */ +{CPU_XA, 0x452, "TL1"}, /* Timer 1 low byte */ +{CPU_XA, 0x453, "TH1"}, /* Timer 1 high byte */ +{CPU_XA, 0x454, "RTL0"}, /* Timer 0 extended reload, low byte */ +{CPU_XA, 0x455, "RTH0"}, /* Timer 0 extended reload, high byte */ +{CPU_XA, 0x456, "RTL1"}, /* Timer 1 extended reload, low byte */ +{CPU_XA, 0x457, "RTH1"}, /* Timer 1 extended reload, high byte */ +{CPU_XA, 0x458, "TL2"}, /* Timer 2 low byte */ +{CPU_XA, 0x459, "TH2"}, /* Timer 2 high byte */ +{CPU_XA, 0x45A, "T2CAPL"}, /* Timer 2 capture register, low byte */ +{CPU_XA, 0x45B, "T2CAPH"}, /* Timer 2 capture register, high byte */ +{CPU_XA, 0x45C, "TMOD"}, /* Timer 0 and 1 mode register */ +{CPU_XA, 0x45D, "WFEED1"}, /* Watchdog feed 1 */ +{CPU_XA, 0x45E, "WFEED2"}, /* Watchdog feed 2 */ +{CPU_XA, 0x45F, "WDL"}, /* Watchdog timer reload */ +{CPU_XA, 0x460, "S0BUF"}, /* Serial port 0 buffer register */ +{CPU_XA, 0x461, "S0ADDR"}, /* Serial port 0 address register */ +{CPU_XA, 0x462, "S0ADEN"}, /* Serial port 0 address enable register */ +{CPU_XA, 0x464, "S1BUF"}, /* Serial port 1 buffer register */ +{CPU_XA, 0x465, "S1ADDR"}, /* Serial port 1 address register */ +{CPU_XA, 0x466, "S1ADEN"}, /* Serial port 1 address enable register */ +{CPU_XA, 0x468, "BTRL"}, /* Bus timing register high byte */ +{CPU_XA, 0x469, "BTRH"}, /* Bus timing register low byte */ +{CPU_XA, 0x46A, "BCR"}, /* Bus configuration register */ +{CPU_XA, 0x470, "P0CFGA"}, /* Port 0 configuration A */ +{CPU_XA, 0x471, "P1CFGA"}, /* Port 1 configuration A */ +{CPU_XA, 0x472, "P2CFGA"}, /* Port 2 configuration A */ +{CPU_XA, 0x473, "P3CFGA"}, /* Port 3 configuration A */ +{CPU_XA, 0x47A, "SWE"}, /* Software Interrupt Enable */ +{CPU_XA, 0x4A0, "IPA0"}, /* Interrupt priority 0 */ +{CPU_XA, 0x4A1, "IPA1"}, /* Interrupt priority 1 */ +{CPU_XA, 0x4A2, "IPA2"}, /* Interrupt priority 2 */ +{CPU_XA, 0x4A4, "IPA4"}, /* Interrupt priority 4 */ +{CPU_XA, 0x4A5, "IPA5"}, /* Interrupt priority 5 */ +{CPU_XA, 0x4F0, "P0CFGB"}, /* Port 0 configuration B */ +{CPU_XA, 0x4F1, "P1CFGB"}, /* Port 1 configuration B */ +{CPU_XA, 0x4F2, "P2CFGB"}, /* Port 2 configuration B */ +{CPU_XA, 0x4F3, "P3CFGB"}, /* Port 3 configuration B */ diff --git a/sim/ucsim/xa.src/xacl.h b/sim/ucsim/xa.src/xacl.h new file mode 100644 index 0000000..cc87243 --- /dev/null +++ b/sim/ucsim/xa.src/xacl.h @@ -0,0 +1,400 @@ +/* + * Simulator of microcontrollers (xacl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * Other contributors include: + * Karl Bongers karl@turbobit.com, + * Johan Knol johan.knol@iduna.nl + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef XACL_HEADER +#define XACL_HEADER + +#include "uccl.h" + +#include "regsxa.h" + +/* + * Base type of XA microcontrollers + */ + +class cl_xa: public cl_uc +{ +public: + class cl_address_space *ram; + class cl_address_space *rom; + struct t_regs regs; + + class cl_address_space *sfr, *iram; + + // for now make it as simple as possible +// TYPE_UBYTE mem_direct[1024*2]; +//#ifndef WORDS_BIGENDIAN +// TYPE_UWORD *wmem_direct; /* word pointer at mem_direct */ +//#endif + +public: + cl_xa(class cl_sim *asim); + virtual int init(void); + virtual char *id_string(void); + + //virtual class cl_m *mk_mem(enum mem_class type, char *class_name); + //virtual t_addr get_mem_size(enum mem_class type); + virtual void mk_hw_elements(void); + virtual void make_memories(void); + + virtual struct dis_entry *dis_tbl(void); + + virtual struct name_entry *sfr_tbl(void); + virtual struct name_entry *bit_tbl(void); + virtual char *get_dir_name(short); + virtual char *get_bit_name(short); + + virtual int inst_length(t_addr addr); + virtual int inst_branch(t_addr addr); + virtual int longest_inst(void); + + virtual int get_disasm_info(t_addr addr, + int *ret_len, + int *ret_branch, + int *immed_offset, + int *parms, + int *mnemonic); + + virtual const char *disass(t_addr addr, const char *sep); + virtual void print_regs(class cl_console_base *con); + + virtual int exec_inst(void); + virtual int get_reg(int word_flag, unsigned int index); + + virtual void store1(t_addr addr, unsigned char val); + virtual void store2(t_addr addr, unsigned short val); + virtual unsigned char get1(t_addr addr); + virtual unsigned short get2(t_addr addr); + + virtual bool get_bit(int bit); + virtual void set_bit(int bit, int value); + +#include "instcl.h" + + private : + + /* following are macros which get substituted for FUNC1() and FUNC2() + in the inst.cc to form the body of ADD,ADDC,SUB,XOR,... */ + /* can I put these in the .cc file and still have them do the inline thing? */ + /*------------------------------------- + add - flags changed:C,AC,V,N,Z. + |---------------------------------------*/ + inline unsigned char add1(unsigned char dst, unsigned char src) + { + unsigned int result; + unsigned char flags; + flags = get_psw(); + flags &= ~BIT_ALL; /* clear these bits */ + result = dst + src; + if (result == 0) flags |= BIT_Z; + if (result > 0xff) flags |= BIT_C; + if (result & 0x80) flags |= BIT_N; + /* fixme: do AC, V */ + set_psw(flags); + return (unsigned char) result; + } + + inline unsigned short add2(unsigned short dst, unsigned short src) + { + unsigned int result; + unsigned char flags; + flags = get_psw(); + flags &= ~BIT_ALL; /* clear these bits */ + result = dst + src; + if (result == 0) flags |= BIT_Z; + if (result > 0xff) flags |= BIT_C; + if (result & 0x80) flags |= BIT_N; + /* fixme: do AC, V */ + set_psw(flags); + return (unsigned short) result; + } + + /*------------------------------------- + addc - flags changed:C,AC,V,N,Z. + |---------------------------------------*/ + inline unsigned char addc1(unsigned char dst, unsigned char src) + { + unsigned int result; + unsigned char flags; + flags = get_psw(); + if (flags & BIT_C) { + flags &= ~BIT_ALL; /* clear these bits */ + result = dst + src + 1; + } else { + flags &= ~BIT_ALL; /* clear these bits */ + result = dst + src; + } + if (result == 0) flags |= BIT_Z; + if (result > 0xff) flags |= BIT_C; + if (result & 0x80) flags |= BIT_N; + /* fixme: do AC, V */ + set_psw(flags); + return (unsigned char) result; + } + + inline unsigned short addc2(unsigned short dst, unsigned short src) + { + unsigned int result; + unsigned char flags; + flags = get_psw(); + flags &= ~BIT_ALL; /* clear these bits */ + if (flags & BIT_C) { + flags &= ~BIT_ALL; /* clear these bits */ + result = dst + src + 1; + } else { + flags &= ~BIT_ALL; /* clear these bits */ + result = dst + src; + } + if (result == 0) flags |= BIT_Z; + if (result > 0xff) flags |= BIT_C; + if (result & 0x80) flags |= BIT_N; + /* fixme: do AC, V */ + set_psw(flags); + return (unsigned short) result; + } + + /*------------------------------------- + sub - flags changed:C,AC,V,N,Z. + |---------------------------------------*/ + inline unsigned char sub1(unsigned char dst, unsigned char src) + { + unsigned int result; + unsigned char flags; + flags = get_psw(); + flags &= ~BIT_ALL; /* clear these bits */ + result = dst - src; + if (result == 0) flags |= BIT_Z; + if (result > 0xff) flags |= BIT_C; + if (dst < src) flags |= BIT_N; + /* fixme: do AC, V */ + set_psw(flags); + return (unsigned char) result; + } + + inline unsigned short sub2(unsigned short dst, unsigned short src) + { + unsigned int result; + unsigned char flags; + flags = get_psw(); + flags &= ~BIT_ALL; /* clear these bits */ + result = dst - src; + if (result == 0) flags |= BIT_Z; + if (result > 0xff) flags |= BIT_C; + if (dst < src) flags |= BIT_N; + /* fixme: do AC, V */ + set_psw(flags); + return (unsigned short) result; + } + + /*------------------------------------- + subb - flags changed:C,AC,V,N,Z. + |---------------------------------------*/ + inline unsigned char subb1(unsigned char dst, unsigned char src) + { + unsigned int result; + unsigned char flags; + flags = get_psw(); + if (flags & BIT_C) { + flags &= ~BIT_ALL; /* clear these bits */ + result = dst - src - 1; + } else { + flags &= ~BIT_ALL; /* clear these bits */ + result = dst - src; + } + if (result == 0) flags |= BIT_Z; + if (result > 0xff) flags |= BIT_C; + if (dst < src) flags |= BIT_N; + /* fixme: do AC, V */ + set_psw(flags); + return (unsigned char) result; + } + + inline unsigned short subb2(unsigned short dst, unsigned short src) + { + unsigned int result; + unsigned char flags; + flags = get_psw(); + flags &= ~BIT_ALL; /* clear these bits */ + if (flags & BIT_C) { + flags &= ~BIT_ALL; /* clear these bits */ + result = dst - src - 1; + } else { + flags &= ~BIT_ALL; /* clear these bits */ + result = dst - src; + } + if (result == 0) flags |= BIT_Z; + if (result > 0xff) flags |= BIT_C; + if (dst < src) flags |= BIT_N; + /* fixme: do AC, V */ + set_psw(flags); + return (unsigned short) result; + } + + /*------------------------------------- + cmp - flags changed:C,AC,V,N,Z. + |---------------------------------------*/ + inline unsigned char cmp1(unsigned char dst, unsigned char src) + { + unsigned int result; + unsigned char flags; + flags = get_psw(); + flags &= ~BIT_ALL; /* clear these bits */ + result = dst - src; + if (result == 0) flags |= BIT_Z; + if (result > 0xff) flags |= BIT_C; + if (dst < src) flags |= BIT_N; + /* fixme: do AC, V */ + set_psw(flags); + return (unsigned char) dst; + } + + inline unsigned short cmp2(unsigned short dst, unsigned short src) + { + unsigned int result; + unsigned char flags; + flags = get_psw(); + flags &= ~BIT_ALL; /* clear these bits */ + result = dst - src; + if (result == 0) flags |= BIT_Z; + if (result > 0xff) flags |= BIT_C; + if (dst < src) flags |= BIT_N; + /* fixme: do AC, V */ + set_psw(flags); + return (unsigned short) dst; + } + + /*------------------------------------- + and - flags changed:N,Z. + |---------------------------------------*/ + inline unsigned char and1(unsigned char dst, unsigned char src) + { + unsigned int result; + unsigned char flags; + flags = get_psw() & ~(BIT_N | BIT_Z); /* clear these bits */ + result = dst & src; + if (result == 0) flags |= BIT_Z; + if (result & 0x80) flags |= BIT_N; + set_psw(flags); + return (unsigned char) result; + } + + inline unsigned short and2(unsigned short dst, unsigned short src) + { + unsigned int result; + unsigned char flags; + flags = get_psw() & ~(BIT_N | BIT_Z); /* clear these bits */ + result = dst & src; + if (result == 0) flags |= BIT_Z; + if (result & 0x80) flags |= BIT_N; + set_psw(flags); + return (unsigned short) result; + } + + /*------------------------------------- + or - flags changed:N,Z. + |---------------------------------------*/ + inline unsigned char or1(unsigned char dst, unsigned char src) + { + unsigned int result; + unsigned char flags; + flags = get_psw() & ~(BIT_N | BIT_Z); /* clear these bits */ + result = dst | src; + if (result == 0) flags |= BIT_Z; + if (result & 0x80) flags |= BIT_N; + set_psw(flags); + return (unsigned char) result; + } + + inline unsigned short or2(unsigned short dst, unsigned short src) + { + unsigned int result; + unsigned char flags; + flags = get_psw() & ~(BIT_N | BIT_Z); /* clear these bits */ + result = dst | src; + if (result == 0) flags |= BIT_Z; + if (result & 0x80) flags |= BIT_N; + set_psw(flags); + return (unsigned short) result; + } + + /*------------------------------------- + xor - flags changed:N,Z. + |---------------------------------------*/ + inline unsigned char xor1(unsigned char dst, unsigned char src) + { + unsigned char flags; + flags = get_psw() & ~(BIT_N | BIT_Z); /* clear these bits */ + dst ^= src; + if (dst == 0) flags |= BIT_Z; + if (dst & 0x80) flags |= BIT_N; + set_psw(flags); + return (unsigned char) dst; + } + + inline unsigned short xor2(unsigned short dst, unsigned short src) + { + unsigned char flags; + flags = get_psw() & ~(BIT_N | BIT_Z); /* clear these bits */ + dst ^= src; + if (dst == 0) flags |= BIT_Z; + if (dst & 0x8000) flags |= BIT_N; + set_psw(flags); + return (unsigned short) dst; + } + + /*------------------------------------- + mov - flags changed:N,Z. + |---------------------------------------*/ + inline unsigned char mov1(unsigned char dst, unsigned char src) + { + unsigned char flags; + flags = get_psw() & ~(BIT_N | BIT_Z); /* clear these bits */ + dst = src; + if (dst == 0) flags |= BIT_Z; + if (dst & 0x80) flags |= BIT_N; + set_psw(flags); + return (unsigned char) dst; + } + + inline unsigned short mov2(unsigned short dst, unsigned short src) + { + unsigned char flags; + flags = get_psw() & ~(BIT_N | BIT_Z); /* clear these bits */ + dst = src; + if (dst == 0) flags |= BIT_Z; + if (dst & 0x8000) flags |= BIT_N; + set_psw(flags); + return (unsigned short) dst; + } +}; + +#endif + +/* End of xa.src/xacl.h */ diff --git a/sim/ucsim/z80.src/(c).1 b/sim/ucsim/z80.src/(c).1 new file mode 100644 index 0000000..d673f9f --- /dev/null +++ b/sim/ucsim/z80.src/(c).1 @@ -0,0 +1,25 @@ +/* + * Simulator of microcontrollers (@@F@@) + * + * Copyright (C) @@S@@,@@Y@@ Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ diff --git a/sim/ucsim/z80.src/Makefile.in b/sim/ucsim/z80.src/Makefile.in new file mode 100644 index 0000000..cb105bf --- /dev/null +++ b/sim/ucsim/z80.src/Makefile.in @@ -0,0 +1,156 @@ +# +# uCsim z80.src/Makefile +# +# (c) Drotos Daniel, Talker Bt. 1997 +# + +STARTYEAR = 1997 + +SHELL = /bin/sh +CXX = @CXX@ +CPP = @CPP@ +CXXCPP = @CXXCPP@ +RANLIB = @RANLIB@ +INSTALL = @INSTALL@ +STRIP = @STRIP@ + +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +DEFS = $(subs -DHAVE_CONFIG_H,,@DEFS@) +CPPFLAGS = @CPPFLAGS@ -I$(srcdir) -I$(top_srcdir) -I$(top_builddir) \ + -I$(top_srcdir)/cmd.src -I$(top_srcdir)/sim.src \ + -I$(top_srcdir)/gui.src +CFLAGS = @CFLAGS@ -Wall +CXXFLAGS = @CXXFLAGS@ -Wall +LDFLAGS = @LDFLAGS@ +M_OR_MM = @M_OR_MM@ +PICOPT = @PICOPT@ +SHAREDLIB = @SHAREDLIB@ +EXEEXT = @EXEEXT@ + +LIBS = -L$(top_builddir) -lsim -lucsimutil -lguiucsim -lcmd -lsim @LIBS@ +DL = @DL@ +dl_ok = @dl_ok@ + +prefix = @prefix@ +exec_prefix = @exec_prefix@ +bindir = @bindir@ +libdir = @libdir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +includedir = @includedir@ +mandir = @mandir@ +man1dir = $(mandir)/man1 +man2dir = $(mandir)/man2 +infodir = @infodir@ +srcdir = @srcdir@ +VPATH = @srcdir@ + +OBJECTS_SHARED = glob.o \ + inst.o \ + inst_cb.o \ + inst_dd.o \ + inst_ed.o \ + inst_fd.o \ + inst_ddcb.o \ + inst_fdcb.o \ + simz80.o z80.o +OBJECTS_EXE = sz80.o +OBJECTS = $(OBJECTS_SHARED) $(OBJECTS_EXE) + +Z80ASM = + +enable_dlso = @enable_dlso@ +dlso_ok = @dlso_ok@ + +#TEST_OBJ = test_bit.hex test_dis.hex test_mov.hex test_jmp.hex \ +# test_arith.hex + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf otherlibs z80.src tests + +tests: $(TEST_OBJ) + + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: all installdirs + $(INSTALL) sz80$(EXEEXT) $(DESTDIR)$(bindir)/sz80$(EXEEXT) + $(STRIP) $(DESTDIR)$(bindir)/sz80$(EXEEXT) + + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(DESTDIR)$(bindir)/sz80$(EXEEXT) + + +# Performing self-test +# -------------------- +check: test + +test: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + test -d $(DESTDIR)$(bindir) || $(INSTALL) -d $(DESTDIR)$(bindir) + + +# Creating dependencies +# --------------------- +dep: Makefile.dep + +Makefile.dep: $(srcdir)/*.cc $(srcdir)/*.h + $(CXXCPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.cc,$^) >Makefile.dep + +-include Makefile.dep +include $(srcdir)/clean.mk + +# My rules +# -------- +.SUFFIXES: .asm .hex + +z80.src: sz80$(EXEEXT) shared_lib + +sz80$(EXEEXT): $(OBJECTS) $(top_builddir)/*.a + $(CXX) $(CXXFLAGS) $(LDFLAGS) -o $@ $(OBJECTS) $(LIBS) + +ifeq ($(dlso_ok),yes) +shared_lib: $(top_builddir)/sz80.so +else +shared_lib: + @$(top_srcdir)/mkecho $(top_builddir) "No z80 shared lib made." + @$(top_srcdir)/mkecho $(top_builddir) "(SHAREDLIB="$(SHAREDLIB)",dl_ok="$(dl_ok)",enable_dlso="$(enable_dlso)")" +endif + +$(top_builddir)/sz80.so: $(OBJECTS_SHARED) + $(CXX) -shared $(LDFLAGS) $(OBJECTS_SHARED) -o $(top_builddir)/sz80.so + +otherlibs: + $(MAKE) -C $(top_builddir)/cmd.src all + $(MAKE) -C $(top_builddir)/sim.src all + +.cc.o: + $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c $< -o $@ + +.asm.hex: + $(Z80ASM) -l $< -o $@ -e $<.lst + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" freshconf;\ + fi + +# End of z80.src/Makefile.in diff --git a/sim/ucsim/z80.src/clean.mk b/sim/ucsim/z80.src/clean.mk new file mode 100644 index 0000000..5781b8c --- /dev/null +++ b/sim/ucsim/z80.src/clean.mk @@ -0,0 +1,26 @@ +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] + rm -f .[a-z]*~ + rm -f sz80$(EXEEXT) + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f config.cache config.log config.status + rm -f Makefile *.dep + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean + +# End of z80.src/clean.mk diff --git a/sim/ucsim/z80.src/conf.mk b/sim/ucsim/z80.src/conf.mk new file mode 100644 index 0000000..728ec31 --- /dev/null +++ b/sim/ucsim/z80.src/conf.mk @@ -0,0 +1,10 @@ +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_builddir) && $(SHELL) ./config.status + +# End of z80.src/conf.mk diff --git a/sim/ucsim/z80.src/glob.cc b/sim/ucsim/z80.src/glob.cc new file mode 100644 index 0000000..85b2547 --- /dev/null +++ b/sim/ucsim/z80.src/glob.cc @@ -0,0 +1,1267 @@ +/* + * Simulator of microcontrollers (glob.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include + +#include "stypes.h" + + +/* +%d - signed compl.,byte jump +%w - 2-byte jump or imm. value +%b - byte imm. value + */ +/* uint code, mask; char branch; uchar length; char *mnemonic; */ +struct dis_entry disass_z80[]= { + { 0x0000, 0x00ff, ' ', 1, "NOP" }, + { 0x0001, 0x00ff, ' ', 3, "LD BC,%w" }, + { 0x0002, 0x00ff, ' ', 1, "LD (BC),A" }, + { 0x0003, 0x00ff, ' ', 1, "INC BC" }, + { 0x0004, 0x00ff, ' ', 1, "INC B" }, + { 0x0005, 0x00ff, ' ', 1, "DEC B" }, + { 0x0006, 0x00ff, ' ', 2, "LD b,%b" }, + { 0x0007, 0x00ff, ' ', 1, "RLCA" }, + + { 0x0008, 0x00ff, ' ', 1, "EX AF,AF'" }, + { 0x0009, 0x00ff, ' ', 1, "ADD HL,BC" }, + { 0x000a, 0x00ff, ' ', 1, "LD A,(BC)" }, + { 0x000b, 0x00ff, ' ', 1, "DEC BC" }, + { 0x000c, 0x00ff, ' ', 1, "INC C" }, + { 0x000d, 0x00ff, ' ', 1, "DEC C" }, + { 0x000e, 0x00ff, ' ', 2, "LD C,%b" }, + { 0x000f, 0x00ff, ' ', 1, "RRCA" }, + + { 0x0010, 0x00ff, 'R', 2, "DJNZ %d" }, + { 0x0011, 0x00ff, ' ', 3, "LD DE,%w" }, + { 0x0012, 0x00ff, ' ', 1, "LD (DE),A" }, + { 0x0013, 0x00ff, ' ', 1, "INC DE" }, + { 0x0014, 0x00ff, ' ', 1, "INC D" }, + { 0x0015, 0x00ff, ' ', 1, "DEC D" }, + { 0x0016, 0x00ff, ' ', 2, "LD D,%b" }, + { 0x0017, 0x00ff, ' ', 1, "RLA" }, + + { 0x0018, 0x00ff, 'R', 2, "JR %d" }, + { 0x0019, 0x00ff, ' ', 3, "ADD HL,DE" }, + { 0x001a, 0x00ff, ' ', 1, "LD A,DE" }, + { 0x001b, 0x00ff, ' ', 1, "DEC DE" }, + { 0x001c, 0x00ff, ' ', 1, "INC E" }, + { 0x001d, 0x00ff, ' ', 1, "DEC E" }, + { 0x001e, 0x00ff, ' ', 2, "LD E" }, + { 0x001f, 0x00ff, ' ', 1, "RRA" }, + + { 0x0020, 0x00ff, 'R', 2, "JR NZ,%d" }, + { 0x0021, 0x00ff, ' ', 3, "LD HL,%w" }, + { 0x0022, 0x00ff, ' ', 3, "LD (%w),HL" }, + { 0x0023, 0x00ff, ' ', 1, "INC HL" }, + { 0x0024, 0x00ff, ' ', 1, "INC H" }, + { 0x0025, 0x00ff, ' ', 1, "DEC H" }, + { 0x0026, 0x00ff, ' ', 2, "LD H,%b" }, + { 0x0027, 0x00ff, ' ', 1, "DAA" }, + + { 0x0028, 0x00ff, 'R', 2, "JR Z,%d" }, + { 0x0029, 0x00ff, ' ', 1, "ADD HL,HL" }, + { 0x002a, 0x00ff, ' ', 3, "LD HL,(%w)" }, + { 0x002b, 0x00ff, ' ', 1, "DEC HL" }, + { 0x002c, 0x00ff, ' ', 1, "INC L" }, + { 0x002d, 0x00ff, ' ', 1, "DEC L" }, + { 0x002e, 0x00ff, ' ', 2, "LD L, %b" }, + { 0x002f, 0x00ff, ' ', 1, "CPL" }, + + { 0x0030, 0x00ff, 'R', 2, "JR NC,%d" }, + { 0x0031, 0x00ff, ' ', 3, "LD SP,%w" }, + { 0x0032, 0x00ff, ' ', 3, "LD (%w),A" }, + { 0x0033, 0x00ff, ' ', 1, "INC SP" }, + { 0x0034, 0x00ff, ' ', 1, "INC HL" }, + { 0x0035, 0x00ff, ' ', 1, "DEC HL" }, + { 0x0036, 0x00ff, ' ', 2, "LD (HL),%b" }, + { 0x0037, 0x00ff, ' ', 1, "SCF" }, + + { 0x0038, 0x00ff, 'R', 2, "JR C,%d" }, + { 0x0039, 0x00ff, ' ', 1, "ADD HL,SP" }, + { 0x003a, 0x00ff, ' ', 3, "LD A,(%w)" }, + { 0x003b, 0x00ff, ' ', 1, "DEC SP" }, + { 0x003c, 0x00ff, ' ', 1, "INC A" }, + { 0x003d, 0x00ff, ' ', 1, "DEC A" }, + { 0x003e, 0x00ff, ' ', 2, "LD A,%b" }, + { 0x003f, 0x00ff, ' ', 1, "CCF" }, + + { 0x0040, 0x00ff, ' ', 1, "LD B,B" }, + { 0x0041, 0x00ff, ' ', 1, "LD B,C" }, + { 0x0042, 0x00ff, ' ', 1, "LD B,D" }, + { 0x0043, 0x00ff, ' ', 1, "LD B,E" }, + { 0x0044, 0x00ff, ' ', 1, "LD B,H" }, + { 0x0045, 0x00ff, ' ', 1, "LD B,L" }, + { 0x0046, 0x00ff, ' ', 1, "LD B,(HL)" }, + { 0x0047, 0x00ff, ' ', 1, "LD B,a" }, + + { 0x0048, 0x00ff, ' ', 1, "LD C,B" }, + { 0x0049, 0x00ff, ' ', 1, "LD C,C" }, + { 0x004a, 0x00ff, ' ', 1, "LD C,D" }, + { 0x004b, 0x00ff, ' ', 1, "LD C,E" }, + { 0x004c, 0x00ff, ' ', 1, "LD C,H" }, + { 0x004d, 0x00ff, ' ', 1, "LD C,L" }, + { 0x004e, 0x00ff, ' ', 1, "LD C,(HL)" }, + { 0x004f, 0x00ff, ' ', 1, "LD C,A" }, + + { 0x0050, 0x00ff, ' ', 1, "LD D,B" }, + { 0x0051, 0x00ff, ' ', 1, "LD D,C" }, + { 0x0052, 0x00ff, ' ', 1, "LD D,D" }, + { 0x0053, 0x00ff, ' ', 1, "LD D,E" }, + { 0x0054, 0x00ff, ' ', 1, "LD D,H" }, + { 0x0055, 0x00ff, ' ', 1, "LD D,L" }, + { 0x0056, 0x00ff, ' ', 1, "LD D,(HL)" }, + { 0x0057, 0x00ff, ' ', 1, "LD D,A" }, + + { 0x0058, 0x00ff, ' ', 1, "LD E,B" }, + { 0x0059, 0x00ff, ' ', 1, "LD E,C" }, + { 0x005a, 0x00ff, ' ', 1, "LD E,D" }, + { 0x005b, 0x00ff, ' ', 1, "LD E,E" }, + { 0x005c, 0x00ff, ' ', 1, "LD E,H" }, + { 0x005d, 0x00ff, ' ', 1, "LD E,L" }, + { 0x005e, 0x00ff, ' ', 1, "LD E,(HL)" }, + { 0x005f, 0x00ff, ' ', 1, "LD E,A" }, + + { 0x0060, 0x00ff, ' ', 1, "LD H,B" }, + { 0x0061, 0x00ff, ' ', 1, "LD H,C" }, + { 0x0062, 0x00ff, ' ', 1, "LD H,D" }, + { 0x0063, 0x00ff, ' ', 1, "LD H,E" }, + { 0x0064, 0x00ff, ' ', 1, "LD H,H" }, + { 0x0065, 0x00ff, ' ', 1, "LD H,L" }, + { 0x0066, 0x00ff, ' ', 1, "LD H,(HL)" }, + { 0x0067, 0x00ff, ' ', 1, "LD H,A" }, + + { 0x0068, 0x00ff, ' ', 1, "LD L,B" }, + { 0x0069, 0x00ff, ' ', 1, "LD L,C" }, + { 0x006a, 0x00ff, ' ', 1, "LD L,D" }, + { 0x006b, 0x00ff, ' ', 1, "LD L,E" }, + { 0x006c, 0x00ff, ' ', 1, "LD L,H" }, + { 0x006d, 0x00ff, ' ', 1, "LD L,L" }, + { 0x006e, 0x00ff, ' ', 1, "LD L,(HL)" }, + { 0x006f, 0x00ff, ' ', 1, "LD L,A" }, + + { 0x0070, 0x00ff, ' ', 1, "LD (HL),B" }, + { 0x0071, 0x00ff, ' ', 1, "LD (HL),C" }, + { 0x0072, 0x00ff, ' ', 1, "LD (HL),D" }, + { 0x0073, 0x00ff, ' ', 1, "LD (HL),E" }, + { 0x0074, 0x00ff, ' ', 1, "LD (HL),H" }, + { 0x0075, 0x00ff, ' ', 1, "LD (HL),L" }, + { 0x0076, 0x00ff, ' ', 1, "HALT" }, + { 0x0077, 0x00ff, ' ', 1, "LD (HL),A" }, + + { 0x0078, 0x00ff, ' ', 1, "LD A,B" }, + { 0x0079, 0x00ff, ' ', 1, "LD A,C" }, + { 0x007a, 0x00ff, ' ', 1, "LD A,D" }, + { 0x007b, 0x00ff, ' ', 1, "LD A,E" }, + { 0x007c, 0x00ff, ' ', 1, "LD A,H" }, + { 0x007d, 0x00ff, ' ', 1, "LD A,L" }, + { 0x007e, 0x00ff, ' ', 1, "LD A,(HL)" }, + { 0x007f, 0x00ff, ' ', 1, "LD A,A" }, + + { 0x0080, 0x00ff, ' ', 1, "ADD A,B" }, + { 0x0081, 0x00ff, ' ', 1, "ADD A,C" }, + { 0x0082, 0x00ff, ' ', 1, "ADD A,D" }, + { 0x0083, 0x00ff, ' ', 1, "ADD A,E" }, + { 0x0084, 0x00ff, ' ', 1, "ADD A,H" }, + { 0x0085, 0x00ff, ' ', 1, "ADD A,L" }, + { 0x0086, 0x00ff, ' ', 1, "ADD A,(HL)" }, + { 0x0087, 0x00ff, ' ', 1, "ADD A,A" }, + + { 0x0088, 0x00ff, ' ', 1, "ADC A,B" }, + { 0x0089, 0x00ff, ' ', 1, "ADC A,C" }, + { 0x008a, 0x00ff, ' ', 1, "ADC A,D" }, + { 0x008b, 0x00ff, ' ', 1, "ADC A,E" }, + { 0x008c, 0x00ff, ' ', 1, "ADC A,H" }, + { 0x008d, 0x00ff, ' ', 1, "ADC A,L" }, + { 0x008e, 0x00ff, ' ', 1, "ADC A,(HL)" }, + { 0x008f, 0x00ff, ' ', 1, "ADC A,A" }, + + { 0x0090, 0x00ff, ' ', 1, "SUB A,B"}, + { 0x0091, 0x00ff, ' ', 1, "SUB A,C"}, + { 0x0092, 0x00ff, ' ', 1, "SUB A,D"}, + { 0x0093, 0x00ff, ' ', 1, "SUB A,E"}, + { 0x0094, 0x00ff, ' ', 1, "SUB A,H"}, + { 0x0095, 0x00ff, ' ', 1, "SUB A,L"}, + { 0x0096, 0x00ff, ' ', 1, "SUB A,(HL)"}, + { 0x0097, 0x00ff, ' ', 1, "SUB A,A"}, + + { 0x0098, 0x00ff, ' ', 1, "SBC A,B" }, + { 0x0099, 0x00ff, ' ', 1, "SBC A,C" }, + { 0x009a, 0x00ff, ' ', 1, "SBC A,D" }, + { 0x009b, 0x00ff, ' ', 1, "SBC A,E" }, + { 0x009c, 0x00ff, ' ', 1, "SBC A,H" }, + { 0x009d, 0x00ff, ' ', 1, "SBC A,L" }, + { 0x009e, 0x00ff, ' ', 1, "SBC A,(HL)" }, + { 0x009f, 0x00ff, ' ', 1, "SBC A,A" }, + + { 0x00a0, 0x00ff, ' ', 1, "AND B" }, + { 0x00a1, 0x00ff, ' ', 1, "AND C" }, + { 0x00a2, 0x00ff, ' ', 1, "AND D" }, + { 0x00a3, 0x00ff, ' ', 1, "AND E" }, + { 0x00a4, 0x00ff, ' ', 1, "AND H" }, + { 0x00a5, 0x00ff, ' ', 1, "AND L" }, + { 0x00a6, 0x00ff, ' ', 1, "AND (HL)" }, + { 0x00a7, 0x00ff, ' ', 1, "AND A" }, + + { 0x00a8, 0x00ff, ' ', 1, "XOR B" }, + { 0x00a9, 0x00ff, ' ', 1, "XOR C" }, + { 0x00aa, 0x00ff, ' ', 1, "XOR D" }, + { 0x00ab, 0x00ff, ' ', 1, "XOR E" }, + { 0x00ac, 0x00ff, ' ', 1, "XOR H" }, + { 0x00ad, 0x00ff, ' ', 1, "XOR L" }, + { 0x00ae, 0x00ff, ' ', 1, "XOR (HL)" }, + { 0x00af, 0x00ff, ' ', 1, "XOR A" }, + + { 0x00b0, 0x00ff, ' ', 1, "OR B" }, + { 0x00b1, 0x00ff, ' ', 1, "OR C" }, + { 0x00b2, 0x00ff, ' ', 1, "OR D" }, + { 0x00b3, 0x00ff, ' ', 1, "OR E" }, + { 0x00b4, 0x00ff, ' ', 1, "OR H" }, + { 0x00b5, 0x00ff, ' ', 1, "OR L" }, + { 0x00b6, 0x00ff, ' ', 1, "OR (HL)" }, + { 0x00b7, 0x00ff, ' ', 1, "OR A" }, + + { 0x00b8, 0x00ff, ' ', 1, "CP B" }, + { 0x00b9, 0x00ff, ' ', 1, "CP C" }, + { 0x00ba, 0x00ff, ' ', 1, "CP D" }, + { 0x00bb, 0x00ff, ' ', 1, "CP E" }, + { 0x00bc, 0x00ff, ' ', 1, "CP H" }, + { 0x00bd, 0x00ff, ' ', 1, "CP L" }, + { 0x00be, 0x00ff, ' ', 1, "CP (HL)" }, + { 0x00bf, 0x00ff, ' ', 1, "CP A" }, + + { 0x00c0, 0x00ff, ' ', 1, "RET NZ" }, + { 0x00c1, 0x00ff, ' ', 1, "POP BC" }, + { 0x00c2, 0x00ff, 'A', 3, "JP NZ, %w" }, + { 0x00c3, 0x00ff, 'A', 3, "JP %w" }, + { 0x00c4, 0x00ff, 'l', 3, "CALL NZ,%w" }, + { 0x00c5, 0x00ff, ' ', 1, "PUSH BC" }, + { 0x00c6, 0x00ff, ' ', 2, "ADD A,%b" }, + { 0x00c7, 0x00ff, ' ', 1, "RST 0" }, + + { 0x00c8, 0x00ff, ' ', 1, "RET Z" }, + { 0x00c9, 0x00ff, ' ', 1, "RET" }, + { 0x00ca, 0x00ff, 'A', 3, "JP Z,%w" }, + { 0x00cb, 0x00ff, ' ', 2, "?cb?" }, /* ESC code to lots of op-codes, all 2-byte */ + { 0x00cc, 0x00ff, 'l', 3, "CALL Z,%w" }, + { 0x00cd, 0x00ff, 'l', 3, "CALL %w" }, + { 0x00ce, 0x00ff, ' ', 2, "ADC A,%b" }, + { 0x00cf, 0x00ff, ' ', 1, "RST 8" }, + + { 0x00d0, 0x00ff, ' ', 1, "RET NC" }, + { 0x00d1, 0x00ff, ' ', 1, "POP DE" }, + { 0x00d2, 0x00ff, 'A', 3, "JP NC,%w" }, + { 0x00d3, 0x00ff, ' ', 2, "OUT (%b),A" }, + { 0x00d4, 0x00ff, 'l', 3, "CALL NC,%w" }, + { 0x00d5, 0x00ff, ' ', 1, "PUSH DE" }, + { 0x00d6, 0x00ff, ' ', 2, "sub %b" }, + { 0x00d7, 0x00ff, ' ', 1, "RST 10H" }, + + { 0x00d8, 0x00ff, ' ', 1, "RET C" }, + { 0x00d9, 0x00ff, ' ', 1, "EXX" }, + { 0x00da, 0x00ff, 'A', 3, "JP C,%w" }, + { 0x00db, 0x00ff, ' ', 2, "IN A,(%b)" }, + { 0x00dc, 0x00ff, 'l', 3, "CALL C,%w" }, + + { 0x00dd, 0x00ff, ' ', 2, "?dd?" }, /* 0xdd - ESC codes,about 284, vary lengths, IX centric */ + { 0x00de, 0x00ff, ' ', 2, "SBC A,%b" }, + { 0x00df, 0x00ff, ' ', 1, "RST 18H" }, + + { 0x00e0, 0x00ff, ' ', 1, "RET PO" }, + { 0x00e1, 0x00ff, ' ', 1, "POP HL" }, + { 0x00e2, 0x00ff, 'A', 3, "JP PO,%w" }, + { 0x00e3, 0x00ff, ' ', 1, "EX (SP),HL" }, + { 0x00e4, 0x00ff, 'l', 3, "CALL PO,%w" }, + { 0x00e5, 0x00ff, ' ', 1, "PUSH HL" }, + { 0x00e6, 0x00ff, ' ', 2, "AND %b" }, + { 0x00e7, 0x00ff, ' ', 1, "RST 20H" }, + + { 0x00e8, 0x00ff, ' ', 1, "RET PE" }, + { 0x00e9, 0x00ff, 'A', 1, "JP (HL)" }, + { 0x00ea, 0x00ff, 'A', 3, "JP PE,%w" }, + { 0x00eb, 0x00ff, ' ', 1, "EX DE,HL" }, + { 0x00ec, 0x00ff, 'l', 3, "CALL PE, %w" }, + { 0x00ed, 0x00ff, ' ', 2, "?ed?" }, /* ESC code to about 80 opcodes of various lengths */ + { 0x00ee, 0x00ff, ' ', 2, "XOR %b" }, + { 0x00ef, 0x00ff, ' ', 1, "RST 28H" }, + + { 0x00f0, 0x00ff, ' ', 1, "RET P" }, + { 0x00f1, 0x00ff, ' ', 1, "POP AF" }, + { 0x00f2, 0x00ff, 'A', 3, "JP P,%w" }, + { 0x00f3, 0x00ff, ' ', 1, "DI" }, + { 0x00f4, 0x00ff, 'l', 3, "CALL P,%w" }, + { 0x00f5, 0x00ff, ' ', 1, "PUSH AF" }, + { 0x00f6, 0x00ff, ' ', 2, "OR %b" }, + { 0x00f7, 0x00ff, ' ', 1, "RST 30H" }, + + { 0x00f8, 0x00ff, ' ', 1, "RET M" }, + { 0x00f9, 0x00ff, ' ', 1, "LD SP,HL" }, + { 0x00fa, 0x00ff, ' ', 3, "JP M,%w" }, + { 0x00fb, 0x00ff, ' ', 1, "EI" }, + { 0x00fc, 0x00ff, 'l', 3, "CALL M,%w" }, + { 0x00fd, 0x00ff, ' ', 1, "?fd?" }, /* ESC codes,about 284, vary lengths, IY centric */ + { 0x00fe, 0x00ff, ' ', 2, "CP %b" }, + { 0x00ff, 0x00ff, ' ', 1, "RST 38H" }, + + { 0, 0, 0, 0, NULL } +}; + + +struct dis_entry disass_z80_ed[]= { + { 0x0000, 0x00ff, ' ', 1, "RLC B" }, + { 0x0040, 0x00ff, ' ', 1, "IN B,(C)" }, + { 0x0041, 0x00ff, ' ', 1, "OUT (C),B" }, + { 0x0042, 0x00ff, ' ', 1, "SBC HL,BC" }, + { 0x0043, 0x00ff, ' ', 1, "LD (nnnn),BC" }, + { 0x0044, 0x00ff, ' ', 1, "NEG" }, + { 0x0045, 0x00ff, ' ', 1, "RETN" }, + { 0x0046, 0x00ff, ' ', 1, "IM 0" }, + { 0x0047, 0x00ff, ' ', 1, "LD IV,A" }, + { 0x0048, 0x00ff, ' ', 1, "IN C,(C)" }, + { 0x0049, 0x00ff, ' ', 1, "OUT (C),C" }, + { 0x004A, 0x00ff, ' ', 1, "ADC HL,BC" }, + { 0x004B, 0x00ff, ' ', 1, "LD BC,(nnnn)" }, + { 0x004D, 0x00ff, ' ', 1, "RETI" }, + { 0x004F, 0x00ff, ' ', 1, "LD R,A" }, + { 0x0050, 0x00ff, ' ', 1, "IN D,(C)" }, + { 0x0051, 0x00ff, ' ', 1, "OUT (C),D" }, + { 0x0052, 0x00ff, ' ', 1, "SBC HL,DE" }, + { 0x0053, 0x00ff, ' ', 1, "LD (nnnn),DE" }, + { 0x0056, 0x00ff, ' ', 1, "IM 1" }, + { 0x0057, 0x00ff, ' ', 1, "LD A,IV" }, + { 0x0058, 0x00ff, ' ', 1, "IN E,(C)" }, + { 0x0059, 0x00ff, ' ', 1, "OUT (C),E" }, + { 0x005A, 0x00ff, ' ', 1, "ADC HL,DE" }, + { 0x005B, 0x00ff, ' ', 1, "LD DE,(nnnn)" }, + { 0x005E, 0x00ff, ' ', 1, "IM 2" }, + { 0x005F, 0x00ff, ' ', 1, "LD A,R" }, + { 0x0060, 0x00ff, ' ', 1, "IN H,(C)" }, + { 0x0061, 0x00ff, ' ', 1, "OUT (C),H" }, + { 0x0062, 0x00ff, ' ', 1, "SBC HL,HL" }, + { 0x0063, 0x00ff, ' ', 1, "LD (nnnn),HL" }, + { 0x0067, 0x00ff, ' ', 1, "RRD" }, + { 0x0068, 0x00ff, ' ', 1, "IN L,(C)" }, + { 0x0069, 0x00ff, ' ', 1, "OUT (C),L" }, + { 0x006A, 0x00ff, ' ', 1, "ADC HL,HL" }, + { 0x006B, 0x00ff, ' ', 1, "LD HL,(nnnn)" }, + { 0x006F, 0x00ff, ' ', 1, "RLD" }, + { 0x0070, 0x00ff, ' ', 1, "IN (C)" }, + { 0x0071, 0x00ff, ' ', 1, " OUT (C),0" }, + { 0x0072, 0x00ff, ' ', 1, "SBC HL,SP" }, + { 0x0073, 0x00ff, ' ', 1, "LD (nnnn),SP" }, + { 0x0078, 0x00ff, ' ', 1, "IN A,(C)" }, + { 0x0079, 0x00ff, ' ', 1, "OUT (C),A" }, + { 0x007A, 0x00ff, ' ', 1, "ADC HL,SP" }, + { 0x007B, 0x00ff, ' ', 1, "LD SP,(nnnn)" }, + { 0x00A0, 0x00ff, ' ', 1, "LDI" }, + { 0x00A1, 0x00ff, ' ', 1, "CPI" }, + { 0x00A2, 0x00ff, ' ', 1, "INI" }, + { 0x00A3, 0x00ff, ' ', 1, "OUTI" }, + { 0x00A8, 0x00ff, ' ', 1, "LDD" }, + { 0x00A9, 0x00ff, ' ', 1, "CPD" }, + { 0x00AA, 0x00ff, ' ', 1, "IND" }, + { 0x00AB, 0x00ff, ' ', 1, "OUTD" }, + { 0x00B0, 0x00ff, ' ', 1, "LDIR" }, + { 0x00B1, 0x00ff, ' ', 1, "CPIR" }, + { 0x00B2, 0x00ff, ' ', 1, "INIR" }, + { 0x00B3, 0x00ff, ' ', 1, "OTIR" }, + { 0x00B8, 0x00ff, ' ', 1, "LDDR" }, + { 0x00B9, 0x00ff, ' ', 1, "CPDR" }, + { 0x00BA, 0x00ff, ' ', 1, "INDR" }, + { 0x00BB, 0x00ff, ' ', 1, "OTDR" }, + { 0, 0, 0, 0, NULL } +}; + +struct dis_entry disass_z80_cb[]= { + { 0x0000, 0x00ff, ' ', 1, "RLC B" }, + { 0x0001, 0x00ff, ' ', 1, "RLC C" }, + { 0x0002, 0x00ff, ' ', 1, "RLC D" }, + { 0x0003, 0x00ff, ' ', 1, "RLC E" }, + { 0x0004, 0x00ff, ' ', 1, "RLC H" }, + { 0x0005, 0x00ff, ' ', 1, "RLC L" }, + { 0x0006, 0x00ff, ' ', 1, "RLC (HL)" }, + { 0x0007, 0x00ff, ' ', 1, "RLC A" }, + { 0x0008, 0x00ff, ' ', 1, "RRC B" }, + { 0x0009, 0x00ff, ' ', 1, "RRC C" }, + { 0x000A, 0x00ff, ' ', 1, "RRC D" }, + { 0x000B, 0x00ff, ' ', 1, "RRC E" }, + { 0x000C, 0x00ff, ' ', 1, "RRC H" }, + { 0x000D, 0x00ff, ' ', 1, "RRC L" }, + { 0x000E, 0x00ff, ' ', 1, "RRC (HL)" }, + { 0x000F, 0x00ff, ' ', 1, "RRC A" }, + { 0x0010, 0x00ff, ' ', 1, "RL B" }, + { 0x0011, 0x00ff, ' ', 1, "RL C" }, + { 0x0012, 0x00ff, ' ', 1, "RL D" }, + { 0x0013, 0x00ff, ' ', 1, "RL E" }, + { 0x0014, 0x00ff, ' ', 1, "RL H" }, + { 0x0015, 0x00ff, ' ', 1, "RL L" }, + { 0x0016, 0x00ff, ' ', 1, "RL (HL)" }, + { 0x0017, 0x00ff, ' ', 1, "RL A" }, + { 0x0018, 0x00ff, ' ', 1, "RR B" }, + { 0x0019, 0x00ff, ' ', 1, "RR C" }, + { 0x001A, 0x00ff, ' ', 1, "RR D" }, + { 0x001B, 0x00ff, ' ', 1, "RR E" }, + { 0x001C, 0x00ff, ' ', 1, "RR H" }, + { 0x001D, 0x00ff, ' ', 1, "RR L" }, + { 0x001E, 0x00ff, ' ', 1, "RR (HL)" }, + { 0x001F, 0x00ff, ' ', 1, "RR A" }, + { 0x0020, 0x00ff, ' ', 1, "SLA B" }, + { 0x0021, 0x00ff, ' ', 1, "SLA C" }, + { 0x0022, 0x00ff, ' ', 1, "SLA D" }, + { 0x0023, 0x00ff, ' ', 1, "SLA E" }, + { 0x0024, 0x00ff, ' ', 1, "SLA H" }, + { 0x0025, 0x00ff, ' ', 1, "SLA L" }, + { 0x0026, 0x00ff, ' ', 1, "SLA (HL)" }, + { 0x0027, 0x00ff, ' ', 1, "SLA A" }, + { 0x0028, 0x00ff, ' ', 1, "SRA B" }, + { 0x0029, 0x00ff, ' ', 1, "SRA C" }, + { 0x002A, 0x00ff, ' ', 1, "SRA D" }, + { 0x002B, 0x00ff, ' ', 1, "SRA E" }, + { 0x002C, 0x00ff, ' ', 1, "SRA H" }, + { 0x002D, 0x00ff, ' ', 1, "SRA L" }, + { 0x002E, 0x00ff, ' ', 1, "SRA (HL)" }, + { 0x002F, 0x00ff, ' ', 1, "SRA A" }, + { 0x0030, 0x00ff, ' ', 1, "SLIA B" }, + { 0x0031, 0x00ff, ' ', 1, "SLIA C" }, + { 0x0032, 0x00ff, ' ', 1, "SLIA D" }, + { 0x0033, 0x00ff, ' ', 1, "SLIA E" }, + { 0x0034, 0x00ff, ' ', 1, "SLIA H" }, + { 0x0035, 0x00ff, ' ', 1, "SLIA L" }, + { 0x0036, 0x00ff, ' ', 1, "SLIA (HL)" }, + { 0x0037, 0x00ff, ' ', 1, "SLIA A" }, + { 0x0038, 0x00ff, ' ', 1, "SRL B" }, + { 0x0039, 0x00ff, ' ', 1, "SRL C" }, + { 0x003A, 0x00ff, ' ', 1, "SRL D" }, + { 0x003B, 0x00ff, ' ', 1, "SRL E" }, + { 0x003C, 0x00ff, ' ', 1, "SRL H" }, + { 0x003D, 0x00ff, ' ', 1, "SRL L" }, + { 0x003E, 0x00ff, ' ', 1, "SRL (HL)" }, + { 0x003F, 0x00ff, ' ', 1, "SRL A" }, + { 0x0040, 0x00ff, ' ', 1, "BIT 0,B" }, + { 0x0041, 0x00ff, ' ', 1, "BIT 0,C" }, + { 0x0042, 0x00ff, ' ', 1, "BIT 0,D" }, + { 0x0043, 0x00ff, ' ', 1, "BIT 0,E" }, + { 0x0044, 0x00ff, ' ', 1, "BIT 0,H" }, + { 0x0045, 0x00ff, ' ', 1, "BIT 0,L" }, + { 0x0046, 0x00ff, ' ', 1, "BIT 0,(HL)" }, + { 0x0047, 0x00ff, ' ', 1, "BIT 0,A" }, + { 0x0048, 0x00ff, ' ', 1, "BIT 1,B" }, + { 0x0049, 0x00ff, ' ', 1, "BIT 1,C" }, + { 0x004A, 0x00ff, ' ', 1, "BIT 1,D" }, + { 0x004B, 0x00ff, ' ', 1, "BIT 1,E" }, + { 0x004C, 0x00ff, ' ', 1, "BIT 1,H" }, + { 0x004D, 0x00ff, ' ', 1, "BIT 1,L" }, + { 0x004E, 0x00ff, ' ', 1, "BIT 1,(HL)" }, + { 0x004F, 0x00ff, ' ', 1, "BIT 1,A" }, + { 0x0050, 0x00ff, ' ', 1, "BIT 2,B" }, + { 0x0051, 0x00ff, ' ', 1, "BIT 2,C" }, + { 0x0052, 0x00ff, ' ', 1, "BIT 2,D" }, + { 0x0053, 0x00ff, ' ', 1, "BIT 2,E" }, + { 0x0054, 0x00ff, ' ', 1, "BIT 2,H" }, + { 0x0055, 0x00ff, ' ', 1, "BIT 2,L" }, + { 0x0056, 0x00ff, ' ', 1, "BIT 2,(HL)" }, + { 0x0057, 0x00ff, ' ', 1, "BIT 2,A" }, + { 0x0058, 0x00ff, ' ', 1, "BIT 3,B" }, + { 0x0059, 0x00ff, ' ', 1, "BIT 3,C" }, + { 0x005A, 0x00ff, ' ', 1, "BIT 3,D" }, + { 0x005B, 0x00ff, ' ', 1, "BIT 3,E" }, + { 0x005C, 0x00ff, ' ', 1, "BIT 3,H" }, + { 0x005D, 0x00ff, ' ', 1, "BIT 3,L" }, + { 0x005E, 0x00ff, ' ', 1, "BIT 3,(HL)" }, + { 0x005F, 0x00ff, ' ', 1, "BIT 3,A" }, + { 0x0060, 0x00ff, ' ', 1, "BIT 4,B" }, + { 0x0061, 0x00ff, ' ', 1, "BIT 4,C" }, + { 0x0062, 0x00ff, ' ', 1, "BIT 4,D" }, + { 0x0063, 0x00ff, ' ', 1, "BIT 4,E" }, + { 0x0064, 0x00ff, ' ', 1, "BIT 4,H" }, + { 0x0065, 0x00ff, ' ', 1, "BIT 4,L" }, + { 0x0066, 0x00ff, ' ', 1, "BIT 4,(HL)" }, + { 0x0067, 0x00ff, ' ', 1, "BIT 4,A" }, + { 0x0068, 0x00ff, ' ', 1, "BIT 5,B" }, + { 0x0069, 0x00ff, ' ', 1, "BIT 5,C" }, + { 0x006A, 0x00ff, ' ', 1, "BIT 5,D" }, + { 0x006B, 0x00ff, ' ', 1, "BIT 5,E" }, + { 0x006C, 0x00ff, ' ', 1, "BIT 5,H" }, + { 0x006D, 0x00ff, ' ', 1, "BIT 5,L" }, + { 0x006E, 0x00ff, ' ', 1, "BIT 5,(HL)" }, + { 0x006F, 0x00ff, ' ', 1, "BIT 5,A" }, + { 0x0070, 0x00ff, ' ', 1, "BIT 6,B" }, + { 0x0071, 0x00ff, ' ', 1, "BIT 6,C" }, + { 0x0072, 0x00ff, ' ', 1, "BIT 6,D" }, + { 0x0073, 0x00ff, ' ', 1, "BIT 6,E" }, + { 0x0074, 0x00ff, ' ', 1, "BIT 6,H" }, + { 0x0075, 0x00ff, ' ', 1, "BIT 6,L" }, + { 0x0076, 0x00ff, ' ', 1, "BIT 6,(HL)" }, + { 0x0077, 0x00ff, ' ', 1, "BIT 6,A" }, + { 0x0078, 0x00ff, ' ', 1, "BIT 7,B" }, + { 0x0079, 0x00ff, ' ', 1, "BIT 7,C" }, + { 0x007A, 0x00ff, ' ', 1, "BIT 7,D" }, + { 0x007B, 0x00ff, ' ', 1, "BIT 7,E" }, + { 0x007C, 0x00ff, ' ', 1, "BIT 7,H" }, + { 0x007D, 0x00ff, ' ', 1, "BIT 7,L" }, + { 0x007E, 0x00ff, ' ', 1, "BIT 7,(HL)" }, + { 0x007F, 0x00ff, ' ', 1, "BIT 7,A" }, + { 0x0080, 0x00ff, ' ', 1, "RES 0,B" }, + { 0x0081, 0x00ff, ' ', 1, "RES 0,C" }, + { 0x0082, 0x00ff, ' ', 1, "RES 0,D" }, + { 0x0083, 0x00ff, ' ', 1, "RES 0,E" }, + { 0x0084, 0x00ff, ' ', 1, "RES 0,H" }, + { 0x0085, 0x00ff, ' ', 1, "RES 0,L" }, + { 0x0086, 0x00ff, ' ', 1, "RES 0,(HL)" }, + { 0x0087, 0x00ff, ' ', 1, "RES 0,A" }, + { 0x0088, 0x00ff, ' ', 1, "RES 1,B" }, + { 0x0089, 0x00ff, ' ', 1, "RES 1,C" }, + { 0x008A, 0x00ff, ' ', 1, "RES 1,D" }, + { 0x008B, 0x00ff, ' ', 1, "RES 1,E" }, + { 0x008C, 0x00ff, ' ', 1, "RES 1,H" }, + { 0x008D, 0x00ff, ' ', 1, "RES 1,L" }, + { 0x008E, 0x00ff, ' ', 1, "RES 1,(HL)" }, + { 0x008F, 0x00ff, ' ', 1, "RES 1,A" }, + { 0x0090, 0x00ff, ' ', 1, "RES 2,B" }, + { 0x0091, 0x00ff, ' ', 1, "RES 2,C" }, + { 0x0092, 0x00ff, ' ', 1, "RES 2,D" }, + { 0x0093, 0x00ff, ' ', 1, "RES 2,E" }, + { 0x0094, 0x00ff, ' ', 1, "RES 2,H" }, + { 0x0095, 0x00ff, ' ', 1, "RES 2,L" }, + { 0x0096, 0x00ff, ' ', 1, "RES 2,(HL)" }, + { 0x0097, 0x00ff, ' ', 1, "RES 2,A" }, + { 0x0098, 0x00ff, ' ', 1, "RES 3,B" }, + { 0x0099, 0x00ff, ' ', 1, "RES 3,C" }, + { 0x009A, 0x00ff, ' ', 1, "RES 3,D" }, + { 0x009B, 0x00ff, ' ', 1, "RES 3,E" }, + { 0x009C, 0x00ff, ' ', 1, "RES 3,H" }, + { 0x009D, 0x00ff, ' ', 1, "RES 3,L" }, + { 0x009E, 0x00ff, ' ', 1, "RES 3,(HL)" }, + { 0x009F, 0x00ff, ' ', 1, "RES 3,A" }, + { 0x00A0, 0x00ff, ' ', 1, "RES 4,B" }, + { 0x00A1, 0x00ff, ' ', 1, "RES 4,C" }, + { 0x00A2, 0x00ff, ' ', 1, "RES 4,D" }, + { 0x00A3, 0x00ff, ' ', 1, "RES 4,E" }, + { 0x00A4, 0x00ff, ' ', 1, "RES 4,H" }, + { 0x00A5, 0x00ff, ' ', 1, "RES 4,L" }, + { 0x00A6, 0x00ff, ' ', 1, "RES 4,(HL)" }, + { 0x00A7, 0x00ff, ' ', 1, "RES 4,A" }, + { 0x00A8, 0x00ff, ' ', 1, "RES 5,B" }, + { 0x00A9, 0x00ff, ' ', 1, "RES 5,C" }, + { 0x00AA, 0x00ff, ' ', 1, "RES 5,D" }, + { 0x00AB, 0x00ff, ' ', 1, "RES 5,E" }, + { 0x00AC, 0x00ff, ' ', 1, "RES 5,H" }, + { 0x00AD, 0x00ff, ' ', 1, "RES 5,L" }, + { 0x00AE, 0x00ff, ' ', 1, "RES 5,(HL)" }, + { 0x00AF, 0x00ff, ' ', 1, "RES 5,A" }, + { 0x00B0, 0x00ff, ' ', 1, "RES 6,B" }, + { 0x00B1, 0x00ff, ' ', 1, "RES 6,C" }, + { 0x00B2, 0x00ff, ' ', 1, "RES 6,D" }, + { 0x00B3, 0x00ff, ' ', 1, "RES 6,E" }, + { 0x00B4, 0x00ff, ' ', 1, "RES 6,H" }, + { 0x00B5, 0x00ff, ' ', 1, "RES 6,L" }, + { 0x00B6, 0x00ff, ' ', 1, "RES 6,(HL)" }, + { 0x00B7, 0x00ff, ' ', 1, "RES 6,A" }, + { 0x00B8, 0x00ff, ' ', 1, "RES 7,B" }, + { 0x00B9, 0x00ff, ' ', 1, "RES 7,C" }, + { 0x00BA, 0x00ff, ' ', 1, "RES 7,D" }, + { 0x00BB, 0x00ff, ' ', 1, "RES 7,E" }, + { 0x00BC, 0x00ff, ' ', 1, "RES 7,H" }, + { 0x00BD, 0x00ff, ' ', 1, "RES 7,L" }, + { 0x00BE, 0x00ff, ' ', 1, "RES 7,(HL)" }, + { 0x00BF, 0x00ff, ' ', 1, "RES 7,A" }, + { 0x00C0, 0x00ff, ' ', 1, "SET 0,B" }, + { 0x00C1, 0x00ff, ' ', 1, "SET 0,C" }, + { 0x00C2, 0x00ff, ' ', 1, "SET 0,D" }, + { 0x00C3, 0x00ff, ' ', 1, "SET 0,E" }, + { 0x00C4, 0x00ff, ' ', 1, "SET 0,H" }, + { 0x00C5, 0x00ff, ' ', 1, "SET 0,L" }, + { 0x00C6, 0x00ff, ' ', 1, "SET 0,(HL)" }, + { 0x00C7, 0x00ff, ' ', 1, "SET 0,A" }, + { 0x00C8, 0x00ff, ' ', 1, "SET 1,B" }, + { 0x00C9, 0x00ff, ' ', 1, "SET 1,C" }, + { 0x00CA, 0x00ff, ' ', 1, "SET 1,D" }, + { 0x00CB, 0x00ff, ' ', 1, "SET 1,E" }, + { 0x00CC, 0x00ff, ' ', 1, "SET 1,H" }, + { 0x00CD, 0x00ff, ' ', 1, "SET 1,L" }, + { 0x00CE, 0x00ff, ' ', 1, "SET 1,(HL)" }, + { 0x00CF, 0x00ff, ' ', 1, "SET 1,A" }, + { 0x00D0, 0x00ff, ' ', 1, "SET 2,B" }, + { 0x00D1, 0x00ff, ' ', 1, "SET 2,C" }, + { 0x00D2, 0x00ff, ' ', 1, "SET 2,D" }, + { 0x00D3, 0x00ff, ' ', 1, "SET 2,E" }, + { 0x00D4, 0x00ff, ' ', 1, "SET 2,H" }, + { 0x00D5, 0x00ff, ' ', 1, "SET 2,L" }, + { 0x00D6, 0x00ff, ' ', 1, "SET 2,(HL)" }, + { 0x00D7, 0x00ff, ' ', 1, "SET 2,A" }, + { 0x00D8, 0x00ff, ' ', 1, "SET 3,B" }, + { 0x00D9, 0x00ff, ' ', 1, "SET 3,C" }, + { 0x00DA, 0x00ff, ' ', 1, "SET 3,D" }, + { 0x00DB, 0x00ff, ' ', 1, "SET 3,E" }, + { 0x00DC, 0x00ff, ' ', 1, "SET 3,H" }, + { 0x00DD, 0x00ff, ' ', 1, "SET 3,L" }, + { 0x00DE, 0x00ff, ' ', 1, "SET 3,(HL)" }, + { 0x00DF, 0x00ff, ' ', 1, "SET 3,A" }, + { 0x00E0, 0x00ff, ' ', 1, "SET 4,B" }, + { 0x00E1, 0x00ff, ' ', 1, "SET 4,C" }, + { 0x00E2, 0x00ff, ' ', 1, "SET 4,D" }, + { 0x00E3, 0x00ff, ' ', 1, "SET 4,E" }, + { 0x00E4, 0x00ff, ' ', 1, "SET 4,H" }, + { 0x00E5, 0x00ff, ' ', 1, "SET 4,L" }, + { 0x00E6, 0x00ff, ' ', 1, "SET 4,(HL)" }, + { 0x00E7, 0x00ff, ' ', 1, "SET 4,A" }, + { 0x00E8, 0x00ff, ' ', 1, "SET 5,B" }, + { 0x00E9, 0x00ff, ' ', 1, "SET 5,C" }, + { 0x00EA, 0x00ff, ' ', 1, "SET 5,D" }, + { 0x00EB, 0x00ff, ' ', 1, "SET 5,E" }, + { 0x00EC, 0x00ff, ' ', 1, "SET 5,H" }, + { 0x00ED, 0x00ff, ' ', 1, "SET 5,L" }, + { 0x00EE, 0x00ff, ' ', 1, "SET 5,(HL)" }, + { 0x00EF, 0x00ff, ' ', 1, "SET 5,A" }, + { 0x00F0, 0x00ff, ' ', 1, "SET 6,B" }, + { 0x00F1, 0x00ff, ' ', 1, "SET 6,C" }, + { 0x00F2, 0x00ff, ' ', 1, "SET 6,D" }, + { 0x00F3, 0x00ff, ' ', 1, "SET 6,E" }, + { 0x00F4, 0x00ff, ' ', 1, "SET 6,H" }, + { 0x00F5, 0x00ff, ' ', 1, "SET 6,L" }, + { 0x00F6, 0x00ff, ' ', 1, "SET 6,(HL)" }, + { 0x00F7, 0x00ff, ' ', 1, "SET 6,A" }, + { 0x00F8, 0x00ff, ' ', 1, "SET 7,B" }, + { 0x00F9, 0x00ff, ' ', 1, "SET 7,C" }, + { 0x00FA, 0x00ff, ' ', 1, "SET 7,D" }, + { 0x00FB, 0x00ff, ' ', 1, "SET 7,E" }, + { 0x00FC, 0x00ff, ' ', 1, "SET 7,H" }, + { 0x00FD, 0x00ff, ' ', 1, "SET 7,L" }, + { 0x00FE, 0x00ff, ' ', 1, "SET 7,(HL)" }, + { 0x00FF, 0x00ff, ' ', 1, "SET 7,A" }, + { 0, 0, 0, 0, NULL } +}; + +struct dis_entry disass_z80_dd[]= { + { 0x0021, 0x00ff, ' ', 3, "LD IX,%w" }, + { 0x0022, 0x00ff, ' ', 3, "LD (%w),IX" }, + { 0x0026, 0x00ff, ' ', 2, "LD HX,%b" }, + { 0x002A, 0x00ff, ' ', 3, "LD IX,(%w)" }, + { 0x002E, 0x00ff, ' ', 2, "LD LX,%b" }, + { 0x0036, 0x00ff, ' ', 3, "LD (IX+%d),%b" }, + { 0x0044, 0x00ff, ' ', 1, "LD B,HX" }, + { 0x0045, 0x00ff, ' ', 1, "LD B,LX" }, + { 0x0046, 0x00ff, ' ', 2, "LD B,(IX+%d)" }, + { 0x004C, 0x00ff, ' ', 1, "LD C,HX" }, + { 0x004D, 0x00ff, ' ', 1, "LD C,LX" }, + { 0x004E, 0x00ff, ' ', 2, "LD C,(IX+%d)" }, + { 0x0054, 0x00ff, ' ', 1, "LD D,HX" }, + { 0x0055, 0x00ff, ' ', 1, "LD D,LX" }, + { 0x0056, 0x00ff, ' ', 2, "LD D,(IX+%d)" }, + { 0x005C, 0x00ff, ' ', 1, "LD E,H" }, + { 0x005D, 0x00ff, ' ', 1, "LD E,L" }, + { 0x005E, 0x00ff, ' ', 2, "LD E,(IX+%d)" }, + { 0x0060, 0x00ff, ' ', 1, "LD HX,B" }, + { 0x0061, 0x00ff, ' ', 1, "LD HX,C" }, + { 0x0062, 0x00ff, ' ', 1, "LD HX,D" }, + { 0x0063, 0x00ff, ' ', 1, "LD HX,E" }, + { 0x0064, 0x00ff, ' ', 1, "LD HX,HX" }, + { 0x0066, 0x00ff, ' ', 2, "LD H,(IX+%d)" }, + { 0x0067, 0x00ff, ' ', 1, "LD HX,A" }, + { 0x0068, 0x00ff, ' ', 1, "LD LX,B" }, + { 0x0069, 0x00ff, ' ', 1, "LD LX,C" }, + { 0x006A, 0x00ff, ' ', 1, "LD LX,D" }, + { 0x006B, 0x00ff, ' ', 1, "LD LX,E" }, + { 0x006C, 0x00ff, ' ', 1, "LD LX,HX" }, + { 0x006D, 0x00ff, ' ', 1, "LD LX,LX" }, + { 0x006E, 0x00ff, ' ', 2, "LD L,(IX+%d)" }, + { 0x006F, 0x00ff, ' ', 1, "LD LX,A" }, + { 0x0070, 0x00ff, ' ', 2, "LD (IX+%d),B" }, + { 0x0071, 0x00ff, ' ', 2, "LD (IX+%d),C" }, + { 0x0072, 0x00ff, ' ', 2, "LD (IX+%d),D" }, + { 0x0073, 0x00ff, ' ', 2, "LD (IX+%d),E" }, + { 0x0074, 0x00ff, ' ', 2, "LD (IX+%d),H" }, + { 0x0075, 0x00ff, ' ', 2, "LD (IX+%d),L" }, + { 0x0077, 0x00ff, ' ', 2, "LD (IX+%d),A" }, + { 0x007C, 0x00ff, ' ', 1, "LD A,HX" }, + { 0x007D, 0x00ff, ' ', 1, "LD A,LX" }, + { 0x007E, 0x00ff, ' ', 2, "LD A,(IX+%d)" }, + { 0x00F9, 0x00ff, ' ', 1, "LD SP,IX" }, + + { 0x0023, 0x00ff, ' ', 1, "INC IX" }, + { 0x0024, 0x00ff, ' ', 1, "INC HX" }, + { 0x002C, 0x00ff, ' ', 1, "INC LX" }, + { 0x0034, 0x00ff, ' ', 2, "INC (IX+%d)" }, + + { 0x0009, 0x00ff, ' ', 1, "ADD IX,BC" }, + { 0x0019, 0x00ff, ' ', 1, "ADD IX,DE" }, + { 0x0029, 0x00ff, ' ', 1, "ADD IX,IX" }, + { 0x0039, 0x00ff, ' ', 1, "ADD IX,SP" }, + { 0x0084, 0x00ff, ' ', 1, "ADD A,HX" }, + { 0x0085, 0x00ff, ' ', 1, "ADD A,LX" }, + { 0x0086, 0x00ff, ' ', 2, "ADD A,(IX+%d)" }, + + { 0x0025, 0x00ff, ' ', 1, "DEC HX" }, + { 0x002B, 0x00ff, ' ', 1, "DEC IX" }, + { 0x002D, 0x00ff, ' ', 1, "DEC LX" }, + { 0x0035, 0x00ff, ' ', 2, "DEC (IX+%d)" }, + + { 0x008C, 0x00ff, ' ', 1, "ADC A,HX" }, + { 0x008D, 0x00ff, ' ', 1, "ADC A,LX" }, + { 0x008E, 0x00ff, ' ', 2, "ADC A,(IX+%d)" }, + { 0x0094, 0x00ff, ' ', 1, "SUB HX" }, + { 0x0095, 0x00ff, ' ', 1, "SUB LX" }, + { 0x0096, 0x00ff, ' ', 2, "SUB (IX+%d)" }, + { 0x009C, 0x00ff, ' ', 1, "SBC A,HX" }, + { 0x009D, 0x00ff, ' ', 1, "SBC A,LX" }, + { 0x009E, 0x00ff, ' ', 2, "SBC A,(IX+%d)" }, + { 0x00A4, 0x00ff, ' ', 1, "AND HX" }, + { 0x00A5, 0x00ff, ' ', 1, "AND LX" }, + { 0x00A6, 0x00ff, ' ', 2, "AND (IX+%d)" }, + { 0x00AC, 0x00ff, ' ', 1, "XOR HX" }, + { 0x00AD, 0x00ff, ' ', 1, "XOR LX" }, + { 0x00AE, 0x00ff, ' ', 2, "XOR (IX+%d)" }, + { 0x00B4, 0x00ff, ' ', 1, "OR HX" }, + { 0x00B5, 0x00ff, ' ', 1, "OR LX" }, + { 0x00B6, 0x00ff, ' ', 2, "OR (IX+%d)" }, + { 0x00BC, 0x00ff, ' ', 1, "CP HX" }, + { 0x00BD, 0x00ff, ' ', 1, "CP LX" }, + { 0x00BE, 0x00ff, ' ', 2, "CP (IX+%d)" }, + { 0x00CB, 0x00ff, ' ', 1, "?cb?" }, + { 0x00E1, 0x00ff, ' ', 1, "POP IX" }, + { 0x00E3, 0x00ff, ' ', 1, "EX (SP),IX" }, + { 0x00E5, 0x00ff, ' ', 1, "PUSH IX" }, + { 0x00E9, 0x00ff, ' ', 1, "JP (IX)" }, + + { 0, 0, 0, 0, NULL } +}; + +struct dis_entry disass_z80_fd[]= { + { 0x0021, 0x00ff, ' ', 3, "LD IY,%w" }, + { 0x0022, 0x00ff, ' ', 3, "LD (%w),IY" }, + { 0x0026, 0x00ff, ' ', 2, "LD HX,%b" }, + { 0x002A, 0x00ff, ' ', 3, "LD IY,(%w)" }, + { 0x002E, 0x00ff, ' ', 2, "LD LX,%b" }, + { 0x0036, 0x00ff, ' ', 3, "LD (IY+%d),%b" }, + { 0x0044, 0x00ff, ' ', 1, "LD B,HX" }, + { 0x0045, 0x00ff, ' ', 1, "LD B,LX" }, + { 0x0046, 0x00ff, ' ', 2, "LD B,(IY+%d)" }, + { 0x004C, 0x00ff, ' ', 1, "LD C,HX" }, + { 0x004D, 0x00ff, ' ', 1, "LD C,LX" }, + { 0x004E, 0x00ff, ' ', 2, "LD C,(IY+%d)" }, + { 0x0054, 0x00ff, ' ', 1, "LD D,HX" }, + { 0x0055, 0x00ff, ' ', 1, "LD D,LX" }, + { 0x0056, 0x00ff, ' ', 2, "LD D,(IY+%d)" }, + { 0x005C, 0x00ff, ' ', 1, "LD E,H" }, + { 0x005D, 0x00ff, ' ', 1, "LD E,L" }, + { 0x005E, 0x00ff, ' ', 2, "LD E,(IY+%d)" }, + { 0x0060, 0x00ff, ' ', 1, "LD HX,B" }, + { 0x0061, 0x00ff, ' ', 1, "LD HX,C" }, + { 0x0062, 0x00ff, ' ', 1, "LD HX,D" }, + { 0x0063, 0x00ff, ' ', 1, "LD HX,E" }, + { 0x0064, 0x00ff, ' ', 1, "LD HX,HX" }, + { 0x0066, 0x00ff, ' ', 2, "LD H,(IY+%d)" }, + { 0x0067, 0x00ff, ' ', 1, "LD HX,A" }, + { 0x0068, 0x00ff, ' ', 1, "LD LX,B" }, + { 0x0069, 0x00ff, ' ', 1, "LD LX,C" }, + { 0x006A, 0x00ff, ' ', 1, "LD LX,D" }, + { 0x006B, 0x00ff, ' ', 1, "LD LX,E" }, + { 0x006C, 0x00ff, ' ', 1, "LD LX,HX" }, + { 0x006D, 0x00ff, ' ', 1, "LD LX,LX" }, + { 0x006E, 0x00ff, ' ', 2, "LD L,(IY+%d)" }, + { 0x006F, 0x00ff, ' ', 1, "LD LX,A" }, + { 0x0070, 0x00ff, ' ', 2, "LD (IY+%d),B" }, + { 0x0071, 0x00ff, ' ', 2, "LD (IY+%d),C" }, + { 0x0072, 0x00ff, ' ', 2, "LD (IY+%d),D" }, + { 0x0073, 0x00ff, ' ', 2, "LD (IY+%d),E" }, + { 0x0074, 0x00ff, ' ', 2, "LD (IY+%d),H" }, + { 0x0075, 0x00ff, ' ', 2, "LD (IY+%d),L" }, + { 0x0077, 0x00ff, ' ', 2, "LD (IY+%d),A" }, + { 0x007C, 0x00ff, ' ', 1, "LD A,HX" }, + { 0x007D, 0x00ff, ' ', 1, "LD A,LX" }, + { 0x007E, 0x00ff, ' ', 2, "LD A,(IY+%d)" }, + { 0x00F9, 0x00ff, ' ', 1, "LD SP,IY" }, + + { 0x0023, 0x00ff, ' ', 1, "INC IY" }, + { 0x0024, 0x00ff, ' ', 1, "INC HX" }, + { 0x002C, 0x00ff, ' ', 1, "INC LX" }, + { 0x0034, 0x00ff, ' ', 2, "INC (IY+%d)" }, + + { 0x0009, 0x00ff, ' ', 1, "ADD IY,BC" }, + { 0x0019, 0x00ff, ' ', 1, "ADD IY,DE" }, + { 0x0029, 0x00ff, ' ', 1, "ADD IY,IY" }, + { 0x0039, 0x00ff, ' ', 1, "ADD IY,SP" }, + { 0x0084, 0x00ff, ' ', 1, "ADD A,HX" }, + { 0x0085, 0x00ff, ' ', 1, "ADD A,LX" }, + { 0x0086, 0x00ff, ' ', 2, "ADD A,(IY+%d)" }, + + { 0x0025, 0x00ff, ' ', 1, "DEC HX" }, + { 0x002B, 0x00ff, ' ', 1, "DEC IY" }, + { 0x002D, 0x00ff, ' ', 1, "DEC LX" }, + { 0x0035, 0x00ff, ' ', 2, "DEC (IY+%d)" }, + + { 0x008C, 0x00ff, ' ', 1, "ADC A,HX" }, + { 0x008D, 0x00ff, ' ', 1, "ADC A,LX" }, + { 0x008E, 0x00ff, ' ', 2, "ADC A,(IY+%d)" }, + { 0x0094, 0x00ff, ' ', 1, "SUB HX" }, + { 0x0095, 0x00ff, ' ', 1, "SUB LX" }, + { 0x0096, 0x00ff, ' ', 2, "SUB (IY+%d)" }, + { 0x009C, 0x00ff, ' ', 1, "SBC A,HX" }, + { 0x009D, 0x00ff, ' ', 1, "SBC A,LX" }, + { 0x009E, 0x00ff, ' ', 2, "SBC A,(IY+%d)" }, + { 0x00A4, 0x00ff, ' ', 1, "AND HX" }, + { 0x00A5, 0x00ff, ' ', 1, "AND LX" }, + { 0x00A6, 0x00ff, ' ', 2, "AND (IY+%d)" }, + { 0x00AC, 0x00ff, ' ', 1, "XOR HX" }, + { 0x00AD, 0x00ff, ' ', 1, "XOR LX" }, + { 0x00AE, 0x00ff, ' ', 2, "XOR (IY+%d)" }, + { 0x00B4, 0x00ff, ' ', 1, "OR HX" }, + { 0x00B5, 0x00ff, ' ', 1, "OR LX" }, + { 0x00B6, 0x00ff, ' ', 2, "OR (IY+%d)" }, + { 0x00BC, 0x00ff, ' ', 1, "CP HX" }, + { 0x00BD, 0x00ff, ' ', 1, "CP LX" }, + { 0x00BE, 0x00ff, ' ', 2, "CP (IY+%d)" }, + { 0x00CB, 0x00ff, ' ', 1, "escape" }, + { 0x00E1, 0x00ff, ' ', 1, "POP IY" }, + { 0x00E3, 0x00ff, ' ', 1, "EX (SP),IY" }, + { 0x00E5, 0x00ff, ' ', 1, "PUSH IY" }, + { 0x00E9, 0x00ff, ' ', 1, "JP (IY)" }, + + { 0, 0, 0, 0, NULL } +}; + + +struct dis_entry disass_z80_ddcb[]= { + { 0x0000, 0x00ff, ' ', 2, "RLC (IX+%d)->B" }, + { 0x0001, 0x00ff, ' ', 2, "RLC (IX+%d)->C" }, + { 0x0002, 0x00ff, ' ', 2, "RLC (IX+%d)->D" }, + { 0x0003, 0x00ff, ' ', 2, "RLC (IX+%d)->E" }, + { 0x0004, 0x00ff, ' ', 2, "RLC (IX+%d)->H" }, + { 0x0005, 0x00ff, ' ', 2, "RLC (IX+%d)->L" }, + { 0x0006, 0x00ff, ' ', 2, "RLC (IX+%d)" }, + { 0x0007, 0x00ff, ' ', 2, "RLC (IX+%d)->A" }, + { 0x0008, 0x00ff, ' ', 2, "RRC (IX+%d)->B" }, + { 0x0009, 0x00ff, ' ', 2, "RRC (IX+%d)->C" }, + { 0x000A, 0x00ff, ' ', 2, "RRC (IX+%d)->D" }, + { 0x000B, 0x00ff, ' ', 2, "RRC (IX+%d)->E" }, + { 0x000C, 0x00ff, ' ', 2, "RRC (IX+%d)->H" }, + { 0x000D, 0x00ff, ' ', 2, "RRC (IX+%d)->L" }, + { 0x000E, 0x00ff, ' ', 2, "RRC (IX+%d)" }, + { 0x000F, 0x00ff, ' ', 2, "RRC (IX+%d)->A" }, + { 0x0010, 0x00ff, ' ', 2, "RL (IX+%d)->B" }, + { 0x0011, 0x00ff, ' ', 2, "RL (IX+%d)->C" }, + { 0x0012, 0x00ff, ' ', 2, "RL (IX+%d)->D" }, + { 0x0013, 0x00ff, ' ', 2, "RL (IX+%d)->E" }, + { 0x0014, 0x00ff, ' ', 2, "RL (IX+%d)->H" }, + { 0x0015, 0x00ff, ' ', 2, "RL (IX+%d)->L" }, + { 0x0016, 0x00ff, ' ', 2, "RL (IX+%d)" }, + { 0x0017, 0x00ff, ' ', 2, "RL (IX+%d)->A" }, + { 0x0018, 0x00ff, ' ', 2, "RR (IX+%d)->B" }, + { 0x0019, 0x00ff, ' ', 2, "RR (IX+%d)->C" }, + { 0x001A, 0x00ff, ' ', 2, "RR (IX+%d)->D" }, + { 0x001B, 0x00ff, ' ', 2, "RR (IX+%d)->E" }, + { 0x001C, 0x00ff, ' ', 2, "RR (IX+%d)->H" }, + { 0x001D, 0x00ff, ' ', 2, "RR (IX+%d)->L" }, + { 0x001E, 0x00ff, ' ', 2, "RR (IX+%d)" }, + { 0x001F, 0x00ff, ' ', 2, "RR (IX+%d)->A" }, + { 0x0020, 0x00ff, ' ', 2, "SLA (IX+%d)->B" }, + { 0x0021, 0x00ff, ' ', 2, "SLA (IX+%d)->C" }, + { 0x0022, 0x00ff, ' ', 2, "SLA (IX+%d)->D" }, + { 0x0023, 0x00ff, ' ', 2, "SLA (IX+%d)->E" }, + { 0x0024, 0x00ff, ' ', 2, "SLA (IX+%d)->H" }, + { 0x0025, 0x00ff, ' ', 2, "SLA (IX+%d)->L" }, + { 0x0026, 0x00ff, ' ', 2, "SLA (IX+%d)" }, + { 0x0027, 0x00ff, ' ', 2, "SLA (IX+%d)->A" }, + { 0x0028, 0x00ff, ' ', 2, "SRA (IX+%d)->B" }, + { 0x0029, 0x00ff, ' ', 2, "SRA (IX+%d)->C" }, + { 0x002A, 0x00ff, ' ', 2, "SRA (IX+%d)->D" }, + { 0x002B, 0x00ff, ' ', 2, "SRA (IX+%d)->E" }, + { 0x002C, 0x00ff, ' ', 2, "SRA (IX+%d)->H" }, + { 0x002D, 0x00ff, ' ', 2, "SRA (IX+%d)->L" }, + { 0x002E, 0x00ff, ' ', 2, "SRA (IX+%d)" }, + { 0x002F, 0x00ff, ' ', 2, "SRA (IX+%d)->A" }, + { 0x0030, 0x00ff, ' ', 2, "SLIA (IX+%d)->B" }, + { 0x0031, 0x00ff, ' ', 2, "SLIA (IX+%d)->C" }, + { 0x0032, 0x00ff, ' ', 2, "SLIA (IX+%d)->D" }, + { 0x0033, 0x00ff, ' ', 2, "SLIA (IX+%d)->E" }, + { 0x0034, 0x00ff, ' ', 2, "SLIA (IX+%d)->H" }, + { 0x0035, 0x00ff, ' ', 2, "SLIA (IX+%d)->L" }, + { 0x0036, 0x00ff, ' ', 2, "SLIA (IX+%d)" }, + { 0x0037, 0x00ff, ' ', 2, "SLIA (IX+%d)->A" }, + { 0x0038, 0x00ff, ' ', 2, "SRL (IX+%d)->B" }, + { 0x0039, 0x00ff, ' ', 2, "SRL (IX+%d)->C" }, + { 0x003A, 0x00ff, ' ', 2, "SRL (IX+%d)->D" }, + { 0x003B, 0x00ff, ' ', 2, "SRL (IX+%d)->E" }, + { 0x003C, 0x00ff, ' ', 2, "SRL (IX+%d)->H" }, + { 0x003D, 0x00ff, ' ', 2, "SRL (IX+%d)->L" }, + { 0x003E, 0x00ff, ' ', 2, "SRL (IX+%d)" }, + { 0x003F, 0x00ff, ' ', 2, "SRL A" }, + { 0x0040, 0x00ff, ' ', 2, "BIT (IX+%d)->0,B" }, + { 0x0041, 0x00ff, ' ', 2, "BIT (IX+%d)->0,C" }, + { 0x0042, 0x00ff, ' ', 2, "BIT (IX+%d)->0,D" }, + { 0x0043, 0x00ff, ' ', 2, "BIT (IX+%d)->0,E" }, + { 0x0044, 0x00ff, ' ', 2, "BIT (IX+%d)->0,H" }, + { 0x0045, 0x00ff, ' ', 2, "BIT (IX+%d)->0,L" }, + { 0x0046, 0x00ff, ' ', 2, "BIT 0,(IX+%d)" }, + { 0x004E, 0x00ff, ' ', 2, "BIT 1,(IX+%d)" }, + { 0x0056, 0x00ff, ' ', 2, "BIT 2,(IX+%d)" }, + { 0x005E, 0x00ff, ' ', 2, "BIT 3,(IX+%d)" }, + { 0x0066, 0x00ff, ' ', 2, "BIT 4,(IX+%d)" }, + { 0x006E, 0x00ff, ' ', 2, "BIT 5,(IX+%d)" }, + { 0x0076, 0x00ff, ' ', 2, "BIT 6,(IX+%d)" }, + { 0x007E, 0x00ff, ' ', 2, "BIT 7,(IX+%d)" }, + { 0x0080, 0x00ff, ' ', 2, "RES 0,(IX+%d)->B" }, + { 0x0081, 0x00ff, ' ', 2, "RES 0,(IX+%d)->C" }, + { 0x0082, 0x00ff, ' ', 2, "RES 0,(IX+%d)->D" }, + { 0x0083, 0x00ff, ' ', 2, "RES 0,(IX+%d)->E" }, + { 0x0084, 0x00ff, ' ', 2, "RES 0,(IX+%d)->H" }, + { 0x0085, 0x00ff, ' ', 2, "RES 0,(IX+%d)->L" }, + { 0x0086, 0x00ff, ' ', 2, "RES 0,(IX+%d)" }, + { 0x0087, 0x00ff, ' ', 2, "RES 0,(IX+%d)->A" }, + { 0x0088, 0x00ff, ' ', 2, "RES 1,(IX+%d)->B" }, + { 0x0089, 0x00ff, ' ', 2, "RES 1,(IX+%d)->C" }, + { 0x008A, 0x00ff, ' ', 2, "RES 1,(IX+%d)->D" }, + { 0x008B, 0x00ff, ' ', 2, "RES 1,(IX+%d)->E" }, + { 0x008C, 0x00ff, ' ', 2, "RES 1,(IX+%d)->H" }, + { 0x008D, 0x00ff, ' ', 2, "RES 1,(IX+%d)->L" }, + { 0x008E, 0x00ff, ' ', 2, "RES 1,(IX+%d)" }, + { 0x008F, 0x00ff, ' ', 2, "RES 1,(IX+%d)->A" }, + { 0x0090, 0x00ff, ' ', 2, "RES 2,(IX+%d)->B" }, + { 0x0091, 0x00ff, ' ', 2, "RES 2,(IX+%d)->C" }, + { 0x0092, 0x00ff, ' ', 2, "RES 2,(IX+%d)->D" }, + { 0x0093, 0x00ff, ' ', 2, "RES 2,(IX+%d)->E" }, + { 0x0094, 0x00ff, ' ', 2, "RES 2,(IX+%d)->H" }, + { 0x0095, 0x00ff, ' ', 2, "RES 2,(IX+%d)->L" }, + { 0x0096, 0x00ff, ' ', 2, "RES 2,(IX+%d)" }, + { 0x0097, 0x00ff, ' ', 2, "RES 2,(IX+%d)->A" }, + { 0x0098, 0x00ff, ' ', 2, "RES 3,(IX+%d)->B" }, + { 0x0099, 0x00ff, ' ', 2, "RES 3,(IX+%d)->C" }, + { 0x009A, 0x00ff, ' ', 2, "RES 3,(IX+%d)->D" }, + { 0x009B, 0x00ff, ' ', 2, "RES 3,(IX+%d)->E" }, + { 0x009C, 0x00ff, ' ', 2, "RES 3,(IX+%d)->H" }, + { 0x009D, 0x00ff, ' ', 2, "RES 3,(IX+%d)->L" }, + { 0x009E, 0x00ff, ' ', 2, "RES 3,(IX+%d)" }, + { 0x009F, 0x00ff, ' ', 2, "RES 3,(IX+%d)->A" }, + { 0x00A0, 0x00ff, ' ', 2, "RES 4,(IX+%d)->B" }, + { 0x00A1, 0x00ff, ' ', 2, "RES 4,(IX+%d)->C" }, + { 0x00A2, 0x00ff, ' ', 2, "RES 4,(IX+%d)->D" }, + { 0x00A3, 0x00ff, ' ', 2, "RES 4,(IX+%d)->E" }, + { 0x00A4, 0x00ff, ' ', 2, "RES 4,(IX+%d)->H" }, + { 0x00A5, 0x00ff, ' ', 2, "RES 4,(IX+%d)->L" }, + { 0x00A6, 0x00ff, ' ', 2, "RES 4,(IX+%d)" }, + { 0x00A7, 0x00ff, ' ', 2, "RES 4,(IX+%d)->A" }, + { 0x00A8, 0x00ff, ' ', 2, "RES 5,(IX+%d)->B" }, + { 0x00A9, 0x00ff, ' ', 2, "RES 5,(IX+%d)->C" }, + { 0x00AA, 0x00ff, ' ', 2, "RES 5,(IX+%d)->D" }, + { 0x00AB, 0x00ff, ' ', 2, "RES 5,(IX+%d)->E" }, + { 0x00AC, 0x00ff, ' ', 2, "RES 5,(IX+%d)->H" }, + { 0x00AD, 0x00ff, ' ', 2, "RES 5,(IX+%d)->L" }, + { 0x00AE, 0x00ff, ' ', 2, "RES 5,(IX+%d)" }, + { 0x00AF, 0x00ff, ' ', 2, "RES 5,(IX+%d)->A" }, + { 0x00B0, 0x00ff, ' ', 2, "RES 6,(IX+%d)->B" }, + { 0x00B1, 0x00ff, ' ', 2, "RES 6,(IX+%d)->C" }, + { 0x00B2, 0x00ff, ' ', 2, "RES 6,(IX+%d)->D" }, + { 0x00B3, 0x00ff, ' ', 2, "RES 6,(IX+%d)->E" }, + { 0x00B4, 0x00ff, ' ', 2, "RES 6,(IX+%d)->H" }, + { 0x00B5, 0x00ff, ' ', 2, "RES 6,(IX+%d)->L" }, + { 0x00B6, 0x00ff, ' ', 2, "RES 6,(IX+%d)" }, + { 0x00B7, 0x00ff, ' ', 2, "RES 6,(IX+%d)->A" }, + { 0x00B8, 0x00ff, ' ', 2, "RES 7,(IX+%d)->B" }, + { 0x00B9, 0x00ff, ' ', 2, "RES 7,(IX+%d)->C" }, + { 0x00BA, 0x00ff, ' ', 2, "RES 7,(IX+%d)->D" }, + { 0x00BB, 0x00ff, ' ', 2, "RES 7,(IX+%d)->E" }, + { 0x00BC, 0x00ff, ' ', 2, "RES 7,(IX+%d)->H" }, + { 0x00BD, 0x00ff, ' ', 2, "RES 7,(IX+%d)->L" }, + { 0x00BE, 0x00ff, ' ', 2, "RES 7,(IX+%d)" }, + { 0x00BF, 0x00ff, ' ', 2, "RES 7,(IX+%d)->A" }, + { 0x00C0, 0x00ff, ' ', 2, "SET 0,(IX+%d)->B" }, + { 0x00C1, 0x00ff, ' ', 2, "SET 0,(IX+%d)->C" }, + { 0x00C2, 0x00ff, ' ', 2, "SET 0,(IX+%d)->D" }, + { 0x00C3, 0x00ff, ' ', 2, "SET 0,(IX+%d)->E" }, + { 0x00C4, 0x00ff, ' ', 2, "SET 0,(IX+%d)->H" }, + { 0x00C5, 0x00ff, ' ', 2, "SET 0,(IX+%d)->L" }, + { 0x00C6, 0x00ff, ' ', 2, "SET 0,(IX+%d)" }, + { 0x00C7, 0x00ff, ' ', 2, "SET 0,(IX+%d)->A" }, + { 0x00C8, 0x00ff, ' ', 2, "SET 1,(IX+%d)->B" }, + { 0x00C9, 0x00ff, ' ', 2, "SET 1,(IX+%d)->C" }, + { 0x00CA, 0x00ff, ' ', 2, "SET 1,(IX+%d)->D" }, + { 0x00CB, 0x00ff, ' ', 2, "SET 1,(IX+%d)->E" }, + { 0x00CC, 0x00ff, ' ', 2, "SET 1,(IX+%d)->H" }, + { 0x00CD, 0x00ff, ' ', 2, "SET 1,(IX+%d)->L" }, + { 0x00CE, 0x00ff, ' ', 2, "SET 1,(IX+%d)" }, + { 0x00CF, 0x00ff, ' ', 2, "SET 1,(IX+%d)->A" }, + { 0x00D0, 0x00ff, ' ', 2, "SET 2,(IX+%d)->B" }, + { 0x00D1, 0x00ff, ' ', 2, "SET 2,(IX+%d)->C" }, + { 0x00D2, 0x00ff, ' ', 2, "SET 2,(IX+%d)->D" }, + { 0x00D3, 0x00ff, ' ', 2, "SET 2,(IX+%d)->E" }, + { 0x00D4, 0x00ff, ' ', 2, "SET 2,(IX+%d)->H" }, + { 0x00D5, 0x00ff, ' ', 2, "SET 2,(IX+%d)->L" }, + { 0x00D6, 0x00ff, ' ', 2, "SET 2,(IX+%d)" }, + { 0x00D7, 0x00ff, ' ', 2, "SET 2,(IX+%d)->A" }, + { 0x00D8, 0x00ff, ' ', 2, "SET 3,(IX+%d)->B" }, + { 0x00D9, 0x00ff, ' ', 2, "SET 3,(IX+%d)->C" }, + { 0x00DA, 0x00ff, ' ', 2, "SET 3,(IX+%d)->D" }, + { 0x00DB, 0x00ff, ' ', 2, "SET 3,(IX+%d)->E" }, + { 0x00DC, 0x00ff, ' ', 2, "SET 3,(IX+%d)->H" }, + { 0x00DD, 0x00ff, ' ', 2, "SET 3,(IX+%d)->L" }, + { 0x00DE, 0x00ff, ' ', 2, "SET 3,(IX+%d)" }, + { 0x00DF, 0x00ff, ' ', 2, "SET 3,(IX+%d)->A" }, + { 0x00E0, 0x00ff, ' ', 2, "SET 4,(IX+%d)->B" }, + { 0x00E1, 0x00ff, ' ', 2, "SET 4,(IX+%d)->C" }, + { 0x00E2, 0x00ff, ' ', 2, "SET 4,(IX+%d)->D" }, + { 0x00E3, 0x00ff, ' ', 2, "SET 4,(IX+%d)->E" }, + { 0x00E4, 0x00ff, ' ', 2, "SET 4,(IX+%d)->H" }, + { 0x00E5, 0x00ff, ' ', 2, "SET 4,(IX+%d)->L" }, + { 0x00E6, 0x00ff, ' ', 2, "SET 4,(IX+%d)" }, + { 0x00E7, 0x00ff, ' ', 2, "SET 4,(IX+%d)->A" }, + { 0x00E8, 0x00ff, ' ', 2, "SET 5,(IX+%d)->B" }, + { 0x00E9, 0x00ff, ' ', 2, "SET 5,(IX+%d)->C" }, + { 0x00EA, 0x00ff, ' ', 2, "SET 5,(IX+%d)->D" }, + { 0x00EB, 0x00ff, ' ', 2, "SET 5,(IX+%d)->E" }, + { 0x00EC, 0x00ff, ' ', 2, "SET 5,(IX+%d)->H" }, + { 0x00ED, 0x00ff, ' ', 2, "SET 5,(IX+%d)->L" }, + { 0x00EE, 0x00ff, ' ', 2, "SET 5,(IX+%d)" }, + { 0x00EF, 0x00ff, ' ', 2, "SET 5,(IX+%d)->A" }, + { 0x00F0, 0x00ff, ' ', 2, "SET 6,(IX+%d)->B" }, + { 0x00F1, 0x00ff, ' ', 2, "SET 6,(IX+%d)->C" }, + { 0x00F2, 0x00ff, ' ', 2, "SET 6,(IX+%d)->D" }, + { 0x00F3, 0x00ff, ' ', 2, "SET 6,(IX+%d)->E" }, + { 0x00F4, 0x00ff, ' ', 2, "SET 6,(IX+%d)->H" }, + { 0x00F5, 0x00ff, ' ', 2, "SET 6,(IX+%d)->L" }, + { 0x00F6, 0x00ff, ' ', 2, "SET 6,(IX+%d)" }, + { 0x00F7, 0x00ff, ' ', 2, "SET 6,(IX+%d)->A" }, + { 0x00F8, 0x00ff, ' ', 2, "SET 7,(IX+%d)->B" }, + { 0x00F9, 0x00ff, ' ', 2, "SET 7,(IX+%d)->C" }, + { 0x00FA, 0x00ff, ' ', 2, "SET 7,(IX+%d)->D" }, + { 0x00FB, 0x00ff, ' ', 2, "SET 7,(IX+%d)->E" }, + { 0x00FC, 0x00ff, ' ', 2, "SET 7,(IX+%d)->H" }, + { 0x00FD, 0x00ff, ' ', 2, "SET 7,(IX+%d)->L" }, + { 0x00FE, 0x00ff, ' ', 2, "SET 7,(IX+%d)" }, + { 0x00FF, 0x00ff, ' ', 2, "SET 7,(IX+%d)->A" }, + { 0, 0, 0, 0, NULL } +}; + +struct dis_entry disass_z80_fdcb[]= { + { 0x0000, 0x00ff, ' ', 2, "RLC (IY+%d)->B" }, + { 0x0001, 0x00ff, ' ', 2, "RLC (IY+%d)->C" }, + { 0x0002, 0x00ff, ' ', 2, "RLC (IY+%d)->D" }, + { 0x0003, 0x00ff, ' ', 2, "RLC (IY+%d)->E" }, + { 0x0004, 0x00ff, ' ', 2, "RLC (IY+%d)->H" }, + { 0x0005, 0x00ff, ' ', 2, "RLC (IY+%d)->L" }, + { 0x0006, 0x00ff, ' ', 2, "RLC (IY+%d)" }, + { 0x0007, 0x00ff, ' ', 2, "RLC (IY+%d)->A" }, + { 0x0008, 0x00ff, ' ', 2, "RRC (IY+%d)->B" }, + { 0x0009, 0x00ff, ' ', 2, "RRC (IY+%d)->C" }, + { 0x000A, 0x00ff, ' ', 2, "RRC (IY+%d)->D" }, + { 0x000B, 0x00ff, ' ', 2, "RRC (IY+%d)->E" }, + { 0x000C, 0x00ff, ' ', 2, "RRC (IY+%d)->H" }, + { 0x000D, 0x00ff, ' ', 2, "RRC (IY+%d)->L" }, + { 0x000E, 0x00ff, ' ', 2, "RRC (IY+%d)" }, + { 0x000F, 0x00ff, ' ', 2, "RRC (IY+%d)->A" }, + { 0x0010, 0x00ff, ' ', 2, "RL (IY+%d)->B" }, + { 0x0011, 0x00ff, ' ', 2, "RL (IY+%d)->C" }, + { 0x0012, 0x00ff, ' ', 2, "RL (IY+%d)->D" }, + { 0x0013, 0x00ff, ' ', 2, "RL (IY+%d)->E" }, + { 0x0014, 0x00ff, ' ', 2, "RL (IY+%d)->H" }, + { 0x0015, 0x00ff, ' ', 2, "RL (IY+%d)->L" }, + { 0x0016, 0x00ff, ' ', 2, "RL (IY+%d)" }, + { 0x0017, 0x00ff, ' ', 2, "RL (IY+%d)->A" }, + { 0x0018, 0x00ff, ' ', 2, "RR (IY+%d)->B" }, + { 0x0019, 0x00ff, ' ', 2, "RR (IY+%d)->C" }, + { 0x001A, 0x00ff, ' ', 2, "RR (IY+%d)->D" }, + { 0x001B, 0x00ff, ' ', 2, "RR (IY+%d)->E" }, + { 0x001C, 0x00ff, ' ', 2, "RR (IY+%d)->H" }, + { 0x001D, 0x00ff, ' ', 2, "RR (IY+%d)->L" }, + { 0x001E, 0x00ff, ' ', 2, "RR (IY+%d)" }, + { 0x001F, 0x00ff, ' ', 2, "RR (IY+%d)->A" }, + { 0x0020, 0x00ff, ' ', 2, "SLA (IY+%d)->B" }, + { 0x0021, 0x00ff, ' ', 2, "SLA (IY+%d)->C" }, + { 0x0022, 0x00ff, ' ', 2, "SLA (IY+%d)->D" }, + { 0x0023, 0x00ff, ' ', 2, "SLA (IY+%d)->E" }, + { 0x0024, 0x00ff, ' ', 2, "SLA (IY+%d)->H" }, + { 0x0025, 0x00ff, ' ', 2, "SLA (IY+%d)->L" }, + { 0x0026, 0x00ff, ' ', 2, "SLA (IY+%d)" }, + { 0x0027, 0x00ff, ' ', 2, "SLA (IY+%d)->A" }, + { 0x0028, 0x00ff, ' ', 2, "SRA (IY+%d)->B" }, + { 0x0029, 0x00ff, ' ', 2, "SRA (IY+%d)->C" }, + { 0x002A, 0x00ff, ' ', 2, "SRA (IY+%d)->D" }, + { 0x002B, 0x00ff, ' ', 2, "SRA (IY+%d)->E" }, + { 0x002C, 0x00ff, ' ', 2, "SRA (IY+%d)->H" }, + { 0x002D, 0x00ff, ' ', 2, "SRA (IY+%d)->L" }, + { 0x002E, 0x00ff, ' ', 2, "SRA (IY+%d)" }, + { 0x002F, 0x00ff, ' ', 2, "SRA (IY+%d)->A" }, + { 0x0030, 0x00ff, ' ', 2, "SLIA (IY+%d)->B" }, + { 0x0031, 0x00ff, ' ', 2, "SLIA (IY+%d)->C" }, + { 0x0032, 0x00ff, ' ', 2, "SLIA (IY+%d)->D" }, + { 0x0033, 0x00ff, ' ', 2, "SLIA (IY+%d)->E" }, + { 0x0034, 0x00ff, ' ', 2, "SLIA (IY+%d)->H" }, + { 0x0035, 0x00ff, ' ', 2, "SLIA (IY+%d)->L" }, + { 0x0036, 0x00ff, ' ', 2, "SLIA (IY+%d)" }, + { 0x0037, 0x00ff, ' ', 2, "SLIA (IY+%d)->A" }, + { 0x0038, 0x00ff, ' ', 2, "SRL (IY+%d)->B" }, + { 0x0039, 0x00ff, ' ', 2, "SRL (IY+%d)->C" }, + { 0x003A, 0x00ff, ' ', 2, "SRL (IY+%d)->D" }, + { 0x003B, 0x00ff, ' ', 2, "SRL (IY+%d)->E" }, + { 0x003C, 0x00ff, ' ', 2, "SRL (IY+%d)->H" }, + { 0x003D, 0x00ff, ' ', 2, "SRL (IY+%d)->L" }, + { 0x003E, 0x00ff, ' ', 2, "SRL (IY+%d)" }, + { 0x003F, 0x00ff, ' ', 2, "SRL A" }, + { 0x0040, 0x00ff, ' ', 2, "BIT (IY+%d)->0,B" }, + { 0x0041, 0x00ff, ' ', 2, "BIT (IY+%d)->0,C" }, + { 0x0042, 0x00ff, ' ', 2, "BIT (IY+%d)->0,D" }, + { 0x0043, 0x00ff, ' ', 2, "BIT (IY+%d)->0,E" }, + { 0x0044, 0x00ff, ' ', 2, "BIT (IY+%d)->0,H" }, + { 0x0045, 0x00ff, ' ', 2, "BIT (IY+%d)->0,L" }, + { 0x0046, 0x00ff, ' ', 2, "BIT 0,(IY+%d)" }, + { 0x004E, 0x00ff, ' ', 2, "BIT 1,(IY+%d)" }, + { 0x0056, 0x00ff, ' ', 2, "BIT 2,(IY+%d)" }, + { 0x005E, 0x00ff, ' ', 2, "BIT 3,(IY+%d)" }, + { 0x0066, 0x00ff, ' ', 2, "BIT 4,(IY+%d)" }, + { 0x006E, 0x00ff, ' ', 2, "BIT 5,(IY+%d)" }, + { 0x0076, 0x00ff, ' ', 2, "BIT 6,(IY+%d)" }, + { 0x007E, 0x00ff, ' ', 2, "BIT 7,(IY+%d)" }, + { 0x0080, 0x00ff, ' ', 2, "RES 0,(IY+%d)->B" }, + { 0x0081, 0x00ff, ' ', 2, "RES 0,(IY+%d)->C" }, + { 0x0082, 0x00ff, ' ', 2, "RES 0,(IY+%d)->D" }, + { 0x0083, 0x00ff, ' ', 2, "RES 0,(IY+%d)->E" }, + { 0x0084, 0x00ff, ' ', 2, "RES 0,(IY+%d)->H" }, + { 0x0085, 0x00ff, ' ', 2, "RES 0,(IY+%d)->L" }, + { 0x0086, 0x00ff, ' ', 2, "RES 0,(IY+%d)" }, + { 0x0087, 0x00ff, ' ', 2, "RES 0,(IY+%d)->A" }, + { 0x0088, 0x00ff, ' ', 2, "RES 1,(IY+%d)->B" }, + { 0x0089, 0x00ff, ' ', 2, "RES 1,(IY+%d)->C" }, + { 0x008A, 0x00ff, ' ', 2, "RES 1,(IY+%d)->D" }, + { 0x008B, 0x00ff, ' ', 2, "RES 1,(IY+%d)->E" }, + { 0x008C, 0x00ff, ' ', 2, "RES 1,(IY+%d)->H" }, + { 0x008D, 0x00ff, ' ', 2, "RES 1,(IY+%d)->L" }, + { 0x008E, 0x00ff, ' ', 2, "RES 1,(IY+%d)" }, + { 0x008F, 0x00ff, ' ', 2, "RES 1,(IY+%d)->A" }, + { 0x0090, 0x00ff, ' ', 2, "RES 2,(IY+%d)->B" }, + { 0x0091, 0x00ff, ' ', 2, "RES 2,(IY+%d)->C" }, + { 0x0092, 0x00ff, ' ', 2, "RES 2,(IY+%d)->D" }, + { 0x0093, 0x00ff, ' ', 2, "RES 2,(IY+%d)->E" }, + { 0x0094, 0x00ff, ' ', 2, "RES 2,(IY+%d)->H" }, + { 0x0095, 0x00ff, ' ', 2, "RES 2,(IY+%d)->L" }, + { 0x0096, 0x00ff, ' ', 2, "RES 2,(IY+%d)" }, + { 0x0097, 0x00ff, ' ', 2, "RES 2,(IY+%d)->A" }, + { 0x0098, 0x00ff, ' ', 2, "RES 3,(IY+%d)->B" }, + { 0x0099, 0x00ff, ' ', 2, "RES 3,(IY+%d)->C" }, + { 0x009A, 0x00ff, ' ', 2, "RES 3,(IY+%d)->D" }, + { 0x009B, 0x00ff, ' ', 2, "RES 3,(IY+%d)->E" }, + { 0x009C, 0x00ff, ' ', 2, "RES 3,(IY+%d)->H" }, + { 0x009D, 0x00ff, ' ', 2, "RES 3,(IY+%d)->L" }, + { 0x009E, 0x00ff, ' ', 2, "RES 3,(IY+%d)" }, + { 0x009F, 0x00ff, ' ', 2, "RES 3,(IY+%d)->A" }, + { 0x00A0, 0x00ff, ' ', 2, "RES 4,(IY+%d)->B" }, + { 0x00A1, 0x00ff, ' ', 2, "RES 4,(IY+%d)->C" }, + { 0x00A2, 0x00ff, ' ', 2, "RES 4,(IY+%d)->D" }, + { 0x00A3, 0x00ff, ' ', 2, "RES 4,(IY+%d)->E" }, + { 0x00A4, 0x00ff, ' ', 2, "RES 4,(IY+%d)->H" }, + { 0x00A5, 0x00ff, ' ', 2, "RES 4,(IY+%d)->L" }, + { 0x00A6, 0x00ff, ' ', 2, "RES 4,(IY+%d)" }, + { 0x00A7, 0x00ff, ' ', 2, "RES 4,(IY+%d)->A" }, + { 0x00A8, 0x00ff, ' ', 2, "RES 5,(IY+%d)->B" }, + { 0x00A9, 0x00ff, ' ', 2, "RES 5,(IY+%d)->C" }, + { 0x00AA, 0x00ff, ' ', 2, "RES 5,(IY+%d)->D" }, + { 0x00AB, 0x00ff, ' ', 2, "RES 5,(IY+%d)->E" }, + { 0x00AC, 0x00ff, ' ', 2, "RES 5,(IY+%d)->H" }, + { 0x00AD, 0x00ff, ' ', 2, "RES 5,(IY+%d)->L" }, + { 0x00AE, 0x00ff, ' ', 2, "RES 5,(IY+%d)" }, + { 0x00AF, 0x00ff, ' ', 2, "RES 5,(IY+%d)->A" }, + { 0x00B0, 0x00ff, ' ', 2, "RES 6,(IY+%d)->B" }, + { 0x00B1, 0x00ff, ' ', 2, "RES 6,(IY+%d)->C" }, + { 0x00B2, 0x00ff, ' ', 2, "RES 6,(IY+%d)->D" }, + { 0x00B3, 0x00ff, ' ', 2, "RES 6,(IY+%d)->E" }, + { 0x00B4, 0x00ff, ' ', 2, "RES 6,(IY+%d)->H" }, + { 0x00B5, 0x00ff, ' ', 2, "RES 6,(IY+%d)->L" }, + { 0x00B6, 0x00ff, ' ', 2, "RES 6,(IY+%d)" }, + { 0x00B7, 0x00ff, ' ', 2, "RES 6,(IY+%d)->A" }, + { 0x00B8, 0x00ff, ' ', 2, "RES 7,(IY+%d)->B" }, + { 0x00B9, 0x00ff, ' ', 2, "RES 7,(IY+%d)->C" }, + { 0x00BA, 0x00ff, ' ', 2, "RES 7,(IY+%d)->D" }, + { 0x00BB, 0x00ff, ' ', 2, "RES 7,(IY+%d)->E" }, + { 0x00BC, 0x00ff, ' ', 2, "RES 7,(IY+%d)->H" }, + { 0x00BD, 0x00ff, ' ', 2, "RES 7,(IY+%d)->L" }, + { 0x00BE, 0x00ff, ' ', 2, "RES 7,(IY+%d)" }, + { 0x00BF, 0x00ff, ' ', 2, "RES 7,(IY+%d)->A" }, + { 0x00C0, 0x00ff, ' ', 2, "SET 0,(IY+%d)->B" }, + { 0x00C1, 0x00ff, ' ', 2, "SET 0,(IY+%d)->C" }, + { 0x00C2, 0x00ff, ' ', 2, "SET 0,(IY+%d)->D" }, + { 0x00C3, 0x00ff, ' ', 2, "SET 0,(IY+%d)->E" }, + { 0x00C4, 0x00ff, ' ', 2, "SET 0,(IY+%d)->H" }, + { 0x00C5, 0x00ff, ' ', 2, "SET 0,(IY+%d)->L" }, + { 0x00C6, 0x00ff, ' ', 2, "SET 0,(IY+%d)" }, + { 0x00C7, 0x00ff, ' ', 2, "SET 0,(IY+%d)->A" }, + { 0x00C8, 0x00ff, ' ', 2, "SET 1,(IY+%d)->B" }, + { 0x00C9, 0x00ff, ' ', 2, "SET 1,(IY+%d)->C" }, + { 0x00CA, 0x00ff, ' ', 2, "SET 1,(IY+%d)->D" }, + { 0x00CB, 0x00ff, ' ', 2, "SET 1,(IY+%d)->E" }, + { 0x00CC, 0x00ff, ' ', 2, "SET 1,(IY+%d)->H" }, + { 0x00CD, 0x00ff, ' ', 2, "SET 1,(IY+%d)->L" }, + { 0x00CE, 0x00ff, ' ', 2, "SET 1,(IY+%d)" }, + { 0x00CF, 0x00ff, ' ', 2, "SET 1,(IY+%d)->A" }, + { 0x00D0, 0x00ff, ' ', 2, "SET 2,(IY+%d)->B" }, + { 0x00D1, 0x00ff, ' ', 2, "SET 2,(IY+%d)->C" }, + { 0x00D2, 0x00ff, ' ', 2, "SET 2,(IY+%d)->D" }, + { 0x00D3, 0x00ff, ' ', 2, "SET 2,(IY+%d)->E" }, + { 0x00D4, 0x00ff, ' ', 2, "SET 2,(IY+%d)->H" }, + { 0x00D5, 0x00ff, ' ', 2, "SET 2,(IY+%d)->L" }, + { 0x00D6, 0x00ff, ' ', 2, "SET 2,(IY+%d)" }, + { 0x00D7, 0x00ff, ' ', 2, "SET 2,(IY+%d)->A" }, + { 0x00D8, 0x00ff, ' ', 2, "SET 3,(IY+%d)->B" }, + { 0x00D9, 0x00ff, ' ', 2, "SET 3,(IY+%d)->C" }, + { 0x00DA, 0x00ff, ' ', 2, "SET 3,(IY+%d)->D" }, + { 0x00DB, 0x00ff, ' ', 2, "SET 3,(IY+%d)->E" }, + { 0x00DC, 0x00ff, ' ', 2, "SET 3,(IY+%d)->H" }, + { 0x00DD, 0x00ff, ' ', 2, "SET 3,(IY+%d)->L" }, + { 0x00DE, 0x00ff, ' ', 2, "SET 3,(IY+%d)" }, + { 0x00DF, 0x00ff, ' ', 2, "SET 3,(IY+%d)->A" }, + { 0x00E0, 0x00ff, ' ', 2, "SET 4,(IY+%d)->B" }, + { 0x00E1, 0x00ff, ' ', 2, "SET 4,(IY+%d)->C" }, + { 0x00E2, 0x00ff, ' ', 2, "SET 4,(IY+%d)->D" }, + { 0x00E3, 0x00ff, ' ', 2, "SET 4,(IY+%d)->E" }, + { 0x00E4, 0x00ff, ' ', 2, "SET 4,(IY+%d)->H" }, + { 0x00E5, 0x00ff, ' ', 2, "SET 4,(IY+%d)->L" }, + { 0x00E6, 0x00ff, ' ', 2, "SET 4,(IY+%d)" }, + { 0x00E7, 0x00ff, ' ', 2, "SET 4,(IY+%d)->A" }, + { 0x00E8, 0x00ff, ' ', 2, "SET 5,(IY+%d)->B" }, + { 0x00E9, 0x00ff, ' ', 2, "SET 5,(IY+%d)->C" }, + { 0x00EA, 0x00ff, ' ', 2, "SET 5,(IY+%d)->D" }, + { 0x00EB, 0x00ff, ' ', 2, "SET 5,(IY+%d)->E" }, + { 0x00EC, 0x00ff, ' ', 2, "SET 5,(IY+%d)->H" }, + { 0x00ED, 0x00ff, ' ', 2, "SET 5,(IY+%d)->L" }, + { 0x00EE, 0x00ff, ' ', 2, "SET 5,(IY+%d)" }, + { 0x00EF, 0x00ff, ' ', 2, "SET 5,(IY+%d)->A" }, + { 0x00F0, 0x00ff, ' ', 2, "SET 6,(IY+%d)->B" }, + { 0x00F1, 0x00ff, ' ', 2, "SET 6,(IY+%d)->C" }, + { 0x00F2, 0x00ff, ' ', 2, "SET 6,(IY+%d)->D" }, + { 0x00F3, 0x00ff, ' ', 2, "SET 6,(IY+%d)->E" }, + { 0x00F4, 0x00ff, ' ', 2, "SET 6,(IY+%d)->H" }, + { 0x00F5, 0x00ff, ' ', 2, "SET 6,(IY+%d)->L" }, + { 0x00F6, 0x00ff, ' ', 2, "SET 6,(IY+%d)" }, + { 0x00F7, 0x00ff, ' ', 2, "SET 6,(IY+%d)->A" }, + { 0x00F8, 0x00ff, ' ', 2, "SET 7,(IY+%d)->B" }, + { 0x00F9, 0x00ff, ' ', 2, "SET 7,(IY+%d)->C" }, + { 0x00FA, 0x00ff, ' ', 2, "SET 7,(IY+%d)->D" }, + { 0x00FB, 0x00ff, ' ', 2, "SET 7,(IY+%d)->E" }, + { 0x00FC, 0x00ff, ' ', 2, "SET 7,(IY+%d)->H" }, + { 0x00FD, 0x00ff, ' ', 2, "SET 7,(IY+%d)->L" }, + { 0x00FE, 0x00ff, ' ', 2, "SET 7,(IY+%d)" }, + { 0x00FF, 0x00ff, ' ', 2, "SET 7,(IY+%d)->A" }, + { 0, 0, 0, 0, NULL } +}; + +/* glob.cc */ diff --git a/sim/ucsim/z80.src/glob.h b/sim/ucsim/z80.src/glob.h new file mode 100644 index 0000000..5bfd9ff --- /dev/null +++ b/sim/ucsim/z80.src/glob.h @@ -0,0 +1,46 @@ +/* + * Simulator of microcontrollers (glob.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef GLOB_HEADER +#define GLOB_HEADER + +#include "stypes.h" + + +extern struct dis_entry disass_z80[]; + +extern struct dis_entry disass_z80_ed[]; +extern struct dis_entry disass_z80_cb[]; +extern struct dis_entry disass_z80_dd[]; +extern struct dis_entry disass_z80_fd[]; +extern struct dis_entry disass_z80_ddcb[]; +extern struct dis_entry disass_z80_fdcb[]; + + +#endif + +/* End of z80.src/glob.h */ diff --git a/sim/ucsim/z80.src/inst.cc b/sim/ucsim/z80.src/inst.cc new file mode 100644 index 0000000..3cb181d --- /dev/null +++ b/sim/ucsim/z80.src/inst.cc @@ -0,0 +1,1362 @@ +/* + * Simulator of microcontrollers (inst.cc) + * + * some z80 code base from Karl Bongers karl@turbobit.com + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include + +// local +#include "z80cl.h" +#include "regsz80.h" +#include "z80mac.h" + + +/* + * No Instruction + * NOP + * 0000 0000 0000 0000 + *---------------------------------------------------------------------------- + */ + +int +cl_z80::inst_nop(t_mem code) +{ + return(resGO); +} + +/* + * Load Instruction + * LD + * + *---------------------------------------------------------------------------- + */ + +int +cl_z80::inst_ld(t_mem code) +{ + switch(code) { + case 1: // LD BC,nnnn + regs.BC = fetch2(); + break; + case 2: // LD (BC),A + store1(regs.BC, regs.A); + break; + case 6: // LD B,nn + regs.bc.h = fetch(); + break; + case 0xa: // LD A,(BC) + regs.A = get1(regs.BC); + break; + case 0x0e: // LD C,nn + regs.bc.l = fetch(); + break; + case 0x11: // LD DE,nnnn + regs.DE = fetch2(); + break; + case 0x12: // LD (DE),A + store1(regs.DE, regs.A); + break; + case 0x16: // LD D,nn + regs.de.h = fetch(); + break; + case 0x1A: // LD A,(DE) + regs.A = get1(regs.DE); + break; + case 0x1E: // LD E,nn + regs.de.l = fetch(); + break; + case 0x21: // LD HL,nnnn + regs.HL = fetch2(); + break; + case 0x22: // LD (nnnn),HL + { + unsigned short tw; + tw = fetch2(); + store2(tw, regs.HL); + } + break; + case 0x26: // LD H,nn + regs.hl.h = fetch(); + break; + case 0x2A: // LD HL,(nnnn) + { + unsigned short tw; + tw = fetch2(); + regs.HL = get2(tw); + } + break; + case 0x2E: // LD L,nn + regs.hl.l = fetch(); + break; + case 0x31: // LD SP,nnnn + regs.SP = fetch2(); + break; + case 0x32: // LD (nnnn),A + { + unsigned short tw; + tw = fetch2(); + store1(tw, regs.A); + } + break; + case 0x36: // LD (HL),nn + store1(regs.HL, fetch()); + break; + case 0x3A: // LD A,(nnnn) + regs.A = get1(fetch2()); + break; + case 0x3E: // LD A,nn + regs.A = fetch(); + break; + case 0x40: // LD B,B + break; + case 0x41: // LD B,C + regs.bc.h = regs.bc.l; + break; + case 0x42: // LD B,D + regs.bc.h = regs.de.h; + break; + case 0x43: // LD B,E + regs.bc.h = regs.de.l; + break; + case 0x44: // LD B,H + regs.bc.h = regs.hl.h; + break; + case 0x45: // LD B,L + regs.bc.h = regs.hl.l; + break; + case 0x46: // LD B,(HL) + regs.bc.h = get1(regs.HL); + break; + case 0x47: // LD B,A + regs.bc.h = regs.A; + break; + case 0x48: // LD C,B + regs.bc.l = regs.bc.h; + break; + case 0x49: // LD C,C + break; + case 0x4A: // LD C,D + regs.bc.l = regs.de.h; + break; + case 0x4B: // LD C,E + regs.bc.l = regs.de.l; + break; + case 0x4C: // LD C,H + regs.bc.l = regs.hl.h; + break; + case 0x4D: // LD C,L + regs.bc.l = regs.hl.l; + break; + case 0x4E: // LD C,(HL) + regs.bc.l = get1(regs.HL); + break; + case 0x4F: // LD C,A + regs.bc.l = regs.A; + break; + case 0x50: // LD D,B + regs.de.h = regs.bc.h; + break; + case 0x51: // LD D,C + regs.de.h = regs.bc.l; + break; + case 0x52: // LD D,D + break; + case 0x53: // LD D,E + regs.de.h = regs.de.l; + break; + case 0x54: // LD D,H + regs.de.h = regs.hl.h; + break; + case 0x55: // LD D,L + regs.de.h = regs.hl.l; + break; + case 0x56: // LD D,(HL) + regs.de.h = get1(regs.HL); + break; + case 0x57: // LD D,A + regs.de.h = regs.A; + break; + case 0x58: // LD E,B + regs.de.l = regs.bc.h; + break; + case 0x59: // LD E,C + regs.de.l = regs.bc.l; + break; + case 0x5A: // LD E,D + regs.de.l = regs.de.h; + break; + case 0x5B: // LD E,E + break; + case 0x5C: // LD E,H + regs.de.l = regs.hl.h; + break; + case 0x5D: // LD E,L + regs.de.l = regs.hl.l; + break; + case 0x5E: // LD E,(HL) + regs.de.l = get1(regs.HL); + break; + case 0x5F: // LD E,A + regs.de.l = regs.A; + break; + case 0x60: // LD H,B + regs.hl.h = regs.bc.h; + break; + case 0x61: // LD H,C + regs.hl.h = regs.bc.l; + break; + case 0x62: // LD H,D + regs.hl.h = regs.de.h; + break; + case 0x63: // LD H,E + regs.hl.h = regs.de.l; + break; + case 0x64: // LD H,H + regs.hl.h = regs.hl.h; + break; + case 0x65: // LD H,L + regs.hl.h = regs.hl.l; + break; + case 0x66: // LD H,(HL) + regs.hl.h = get1(regs.HL); + break; + case 0x67: // LD H,A + regs.hl.h = regs.A; + break; + case 0x68: // LD L,B + regs.hl.l = regs.bc.h; + break; + case 0x69: // LD L,C + regs.hl.l = regs.bc.l; + break; + case 0x6A: // LD L,D + regs.hl.l = regs.de.h; + break; + case 0x6B: // LD L,E + regs.hl.l = regs.de.l; + break; + case 0x6C: // LD L,H + regs.hl.l = regs.hl.h; + break; + case 0x6D: // LD L,L + break; + case 0x6E: // LD L,(HL) + regs.hl.l = get1(regs.HL); + break; + case 0x6F: // LD L,A + regs.hl.l = regs.A; + break; + case 0x70: // LD (HL),B + store1(regs.HL, regs.bc.h); + break; + case 0x71: // LD (HL),C + store1(regs.HL, regs.bc.l); + break; + case 0x72: // LD (HL),D + store1(regs.HL, regs.de.h); + break; + case 0x73: // LD (HL),E + store1(regs.HL, regs.de.l); + break; + case 0x74: // LD (HL),H + store1(regs.HL, regs.hl.h); + break; + case 0x75: // LD (HL),L + store1(regs.HL, regs.hl.l); + break; + case 0x76: // HALT + return(resHALT); + + case 0x77: // LD (HL),A + store1(regs.HL, regs.A); + break; + case 0x78: // LD A,B + regs.A = regs.bc.h; + break; + case 0x79: // LD A,C + regs.A = regs.bc.l; + break; + case 0x7A: // LD A,D + regs.A = regs.de.h; + break; + case 0x7B: // LD A,E + regs.A = regs.de.l; + break; + case 0x7C: // LD A,H + regs.A = regs.hl.h; + break; + case 0x7D: // LD A,L + regs.A = regs.hl.l; + break; + case 0x7E: // LD A,(HL) + regs.A = get1(regs.HL); + break; + case 0x7F: // LD A,A + break; + case 0xF9: // LD SP,HL + regs.SP = regs.HL; + break; + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_inc(t_mem code) +{ + switch(code) { + case 0x03: // INC BC + ++regs.BC; + break; + case 0x04: // INC B + inc(regs.bc.h); + break; + case 0x0C: // INC C + inc(regs.bc.l); + break; + case 0x13: // INC DE + ++regs.DE; + break; + case 0x14: // INC D + inc(regs.de.h); + break; + case 0x1C: // INC E + inc(regs.de.l); + break; + case 0x23: // INC HL + ++regs.HL; + break; + case 0x24: // INC H + inc(regs.hl.h); + break; + case 0x2C: // INC L + inc(regs.hl.l); + break; + case 0x33: // INC SP + ++regs.SP; + break; + case 0x34: // INC (HL) + {unsigned char t=get1(regs.HL); + inc(t); + store1(regs.HL, t); + } + break; + case 0x3C: // INC A + inc(regs.A); + break; + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_dec(t_mem code) +{ + switch(code) { + case 0x05: // DEC B + dec(regs.bc.h); + break; + case 0x0B: // DEC BC + --regs.BC; + break; + case 0x0D: // DEC C + dec(regs.bc.l); + break; + case 0x15: // DEC D + dec(regs.de.h); + break; + case 0x1B: // DEC DE + --regs.DE; + break; + case 0x1D: // DEC E + dec(regs.de.l); + break; + case 0x25: // DEC H + dec(regs.hl.h); + break; + case 0x2B: // DEC HL + --regs.HL; + break; + case 0x2D: // DEC L + dec(regs.hl.l); + break; + case 0x35: // DEC (HL) + {unsigned char t=get1(regs.HL); + dec(t); + store1(regs.HL, t); + } + break; + case 0x3B: // DEC SP + --regs.SP; + break; + case 0x3D: // DEC A + dec(regs.A); + break; + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_rlca(t_mem code) +{ + rlc_byte(regs.A); + + return(resGO); +} + +int +cl_z80::inst_rrca(t_mem code) +{ + rrc_byte(regs.A); + return(resGO); +} + +int +cl_z80::inst_ex(t_mem code) +{ + /* 0x08 // EX AF,AF' */ + unsigned char tmp; + TYPE_UWORD tempw; + + switch (code) { + case 0x08: // EX AF,AF' + tmp = regs.aA; + regs.aA = regs.A; + regs.A = tmp; + + tmp = regs.aF; + regs.aF = regs.F; + regs.F = tmp; + break; + + case 0xE3: // EX (SP),HL + tempw = regs.HL; + regs.HL = get2(regs.SP); + store2(regs.SP, tempw); + break; + + case 0xEB: // EX DE,HL + tempw = regs.DE; + regs.DE = regs.HL; + regs.HL = tempw; + break; + + default: + return(resINV_INST); + break; + } + + return(resGO); +} + +int +cl_z80::inst_add(t_mem code) +{ +#define add_HL_Word(wr) { \ + unsigned int tmp; \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + tmp = (unsigned int)regs.HL + (unsigned int)(wr); \ + if (tmp > 0xffff) regs.F |= BIT_C; \ + regs.HL = (unsigned short) tmp; } + + switch(code) { + case 0x09: // ADD HL,BC + add_HL_Word(regs.BC); + break; + case 0x19: // ADD HL,DE + add_HL_Word(regs.DE); + break; + case 0x29: // ADD HL,HL + add_HL_Word(regs.HL); + break; + case 0x39: // ADD HL,SP + add_HL_Word(regs.SP); + break; + + case 0x80: // ADD A,B + add_A_bytereg(regs.bc.h); + break; + case 0x81: // ADD A,C + add_A_bytereg(regs.bc.l); + break; + case 0x82: // ADD A,D + add_A_bytereg(regs.de.h); + break; + case 0x83: // ADD A,E + add_A_bytereg(regs.de.l); + break; + case 0x84: // ADD A,H + add_A_bytereg(regs.hl.h); + break; + case 0x85: // ADD A,L + add_A_bytereg(regs.hl.l); + break; + + case 0x86: // ADD A,(HL) + { unsigned char utmp; + utmp = get1(regs.HL); + add_A_bytereg(utmp); + } + break; + + case 0x87: // ADD A,A + add_A_bytereg(regs.A); + break; + + case 0xC6: // ADD A,nn + { + unsigned char utmp1; + utmp1 = fetch(); + add_A_bytereg(utmp1); + } + break; + + default: + return(resINV_INST); + break; + } + + return(resGO); +} + +int +cl_z80::inst_djnz(t_mem code) +{ + signed char j; + + // 0x10: DJNZ dd + + j = fetch1(); + if ((--regs.bc.h != 0)) { + PC += j; + } else { + } + return(resGO); +} + +int +cl_z80::inst_rra(t_mem code) +{ + rr_byte(regs.A); + return(resGO); +} + +int +cl_z80::inst_rla(t_mem code) +{ + rl_byte(regs.A); + return(resGO); +} + +int +cl_z80::inst_jr(t_mem code) +{ + signed char j; + + j = fetch1(); + switch(code) { + case 0x18: // JR dd + PC += j; + break; + case 0x20: // JR NZ,dd + if (!(regs.F & BIT_Z)) { + PC += j; + } + break; + case 0x28: // JR Z,dd + if ((regs.F & BIT_Z)) { + PC += j; + } + break; + case 0x30: // JR NC,dd + if (!(regs.F & BIT_C)) { + PC += j; + } + break; + case 0x38: // JR C,dd + if ((regs.F & BIT_C)) { + PC += j; + } + break; + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_daa(t_mem code) +{ + /************* from MH's z80ops.c: + unsigned char incr=0, carry=cy; + if((f&0x10) || (a&0x0f)>9) incr=6; + if((f&1) || (a>>4)>9) incr|=0x60; + if(f&2)suba(incr,0); + else { + if(a>0x90 && (a&15)>9)incr|=0x60; + adda(incr,0); + } + f=((f|carry)&0xfb); + ********/ + /* I have not tried to understand this archaic bit of BCD logic(kpb), + taking the lazy way out for now and just transcribing MH's code. + */ + unsigned char incr; + if ((regs.F & BIT_A) || ((regs.A & 0x0f) > 9)) + incr = 6; + else incr = 0; + + if ((regs.F & BIT_C) || ((regs.A & 0xf0) > 0x90)) + incr |= 0x60; + + if (regs.F & BIT_N) { /* not addition */ + sub_A_bytereg(incr); + } else { + if ((regs.A > 0x90) && ((regs.A & 0x0f) >9)) incr |= 0x60; + add_A_bytereg(incr); + } + + return(resGO); +} + +int +cl_z80::inst_cpl(t_mem code) +{ + regs.F |= (BIT_A | BIT_N); + regs.A = ~regs.A; + return(resGO); +} + +int +cl_z80::inst_scf(t_mem code) +{ + /* Set Carry Flag */ + regs.F |= BIT_C; + return(resGO); +} + +int +cl_z80::inst_ccf(t_mem code) +{ + /* Compliment Carry Flag */ + regs.F ^= BIT_C; + return(resGO); +} + +int +cl_z80::inst_halt(t_mem code) +{ + return(resHALT); +} + +int +cl_z80::inst_adc(t_mem code) +{ + switch(code) { + case 0x88: // ADC A,B + adc_A_bytereg(regs.bc.h); + break; + case 0x89: // ADC A,C + adc_A_bytereg(regs.bc.l); + break; + case 0x8A: // ADC A,D + adc_A_bytereg(regs.de.h); + break; + case 0x8B: // ADC A,E + adc_A_bytereg(regs.de.l); + break; + case 0x8C: // ADC A,H + adc_A_bytereg(regs.hl.h); + break; + case 0x8D: // ADC A,L + adc_A_bytereg(regs.hl.l); + break; + case 0x8E: // ADC A,(HL) + { unsigned char utmp; + utmp = get1(regs.HL); + adc_A_bytereg(utmp); + } + break; + case 0x8F: // ADC A,A + adc_A_bytereg(regs.A); + break; + + case 0xCE: // ADC A,nn + { unsigned char utmp; + utmp = fetch(); + adc_A_bytereg(utmp); + } + break; + + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_sbc(t_mem code) +{ + switch(code) { + case 0x98: // SBC A,B + sbc_A_bytereg(regs.bc.h); + break; + case 0x99: // SBC A,C + sbc_A_bytereg(regs.bc.l); + break; + case 0x9A: // SBC A,D + sbc_A_bytereg(regs.de.h); + break; + case 0x9B: // SBC A,E + sbc_A_bytereg(regs.de.l); + break; + case 0x9C: // SBC A,H + sbc_A_bytereg(regs.hl.h); + break; + case 0x9D: // SBC A,L + sbc_A_bytereg(regs.hl.l); + break; + case 0x9E: // SBC A,(HL) + { unsigned char utmp; + utmp = get1(regs.HL); + sbc_A_bytereg(utmp); + } + break; + case 0x9F: // SBC A,A + sbc_A_bytereg(regs.A); + break; + case 0xDE: // SBC A,nn + { unsigned char utmp; + utmp = fetch(); + sbc_A_bytereg(utmp); + } + break; + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_and(t_mem code) +{ + switch(code) { + case 0xA0: // AND B + and_A_bytereg(regs.bc.h); + break; + case 0xA1: // AND C + and_A_bytereg(regs.bc.l); + break; + case 0xA2: // AND D + and_A_bytereg(regs.de.h); + break; + case 0xA3: // AND E + and_A_bytereg(regs.de.l); + break; + case 0xA4: // AND H + and_A_bytereg(regs.hl.h); + break; + case 0xA5: // AND L + and_A_bytereg(regs.hl.l); + break; + case 0xA6: // AND (HL) + { unsigned char utmp; + utmp = get1(regs.HL); + and_A_bytereg(utmp); + } + break; + case 0xA7: // AND A + and_A_bytereg(regs.A); + break; + case 0xE6: // AND nn + and_A_bytereg(fetch()); + break; + + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_xor(t_mem code) +{ + switch(code) { + case 0xA8: // XOR B + xor_A_bytereg(regs.bc.h); + break; + case 0xA9: // XOR C + xor_A_bytereg(regs.bc.l); + break; + case 0xAA: // XOR D + xor_A_bytereg(regs.de.h); + break; + case 0xAB: // XOR E + xor_A_bytereg(regs.de.l); + break; + case 0xAC: // XOR H + xor_A_bytereg(regs.hl.h); + break; + case 0xAD: // XOR L + xor_A_bytereg(regs.hl.l); + break; + case 0xAE: // XOR (HL) + { unsigned char utmp; + utmp = get1(regs.HL); + xor_A_bytereg(utmp); + } + break; + case 0xAF: // XOR A + xor_A_bytereg(regs.A); + break; + case 0xEE: // XOR nn + xor_A_bytereg(fetch()); + break; + + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_or(t_mem code) +{ + switch(code) { + case 0xB0: // OR B + or_A_bytereg(regs.bc.h); + break; + case 0xB1: // OR C + or_A_bytereg(regs.bc.l); + break; + case 0xB2: // OR D + or_A_bytereg(regs.de.h); + break; + case 0xB3: // OR E + or_A_bytereg(regs.de.l); + break; + case 0xB4: // OR H + or_A_bytereg(regs.hl.h); + break; + case 0xB5: // OR L + or_A_bytereg(regs.hl.l); + break; + case 0xB6: // OR (HL) + { unsigned char utmp; + utmp = get1(regs.HL); + or_A_bytereg(utmp); + } + break; + case 0xB7: // OR A + or_A_bytereg(regs.A); + break; + case 0xF6: // OR nn + or_A_bytereg(fetch()); + break; + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_cp(t_mem code) +{ + /* Compare with Accumulator - subtract and test, leave A unchanged */ + switch(code) { + case 0xB8: // CP B + cp_bytereg(regs.bc.h); + break; + case 0xB9: // CP C + cp_bytereg(regs.bc.l); + break; + case 0xBA: // CP D + cp_bytereg(regs.de.h); + break; + case 0xBB: // CP E + cp_bytereg(regs.de.l); + break; + case 0xBC: // CP H + cp_bytereg(regs.hl.h); + break; + case 0xBD: // CP L + cp_bytereg(regs.hl.l); + break; + case 0xBE: // CP (HL) + { unsigned char utmp; + utmp = get1(regs.HL); + cp_bytereg(utmp); + } + break; + case 0xBF: // CP A + cp_bytereg(regs.A); + break; + case 0xFE: // CP nn + { unsigned char utmp; + utmp = fetch(); + cp_bytereg(utmp); + } + break; + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_rst(t_mem code) +{ + switch(code) { + case 0xC7: // RST 0 + push2(PC+2); + PC = 0x0; + break; + case 0xCF: // RST 8 + //PC = 0x08; + switch (regs.A) { + case 0: + return(resBREAKPOINT); +// ::exit(0); + break; + + case 1: + //printf("PUTCHAR-----> %xH\n", regs.hl.l); + putchar(regs.hl.l); + fflush(stdout); + break; + } + break; + case 0xD7: // RST 10H + push2(PC+2); + PC = 0x10; + break; + case 0xDF: // RST 18H + push2(PC+2); + PC = 0x18; + break; + case 0xE7: // RST 20H + push2(PC+2); + PC = 0x20; + break; + case 0xEF: // RST 28H + push2(PC+2); + PC = 0x28; + break; + case 0xF7: // RST 30H + push2(PC+2); + PC = 0x30; + break; + case 0xFF: // RST 38H + push2(PC+2); + PC = 0x38; + break; + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_ret(t_mem code) +{ + switch(code) { + case 0xC0: // RET NZ + if (!(regs.F & BIT_Z)) { + pop2(PC); + } + break; + case 0xC8: // RET Z + if ((regs.F & BIT_Z)) { + pop2(PC); + } + break; + case 0xC9: // RET + pop2(PC); + break; + case 0xD0: // RET NC + if (!(regs.F & BIT_C)) { + pop2(PC); + } + break; + case 0xD8: // RET C + if ((regs.F & BIT_C)) { + pop2(PC); + } + break; + case 0xE0: // RET PO + if (!(regs.F & BIT_P)) { + pop2(PC); + } + break; + case 0xE8: // RET PE + if ((regs.F & BIT_P)) { + pop2(PC); + } + break; + case 0xF0: // RET P + if (!(regs.F & BIT_S)) { + pop2(PC); + } + break; + case 0xF8: // RET M + if ((regs.F & BIT_S)) { + pop2(PC); + } + break; + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_call(t_mem code) +{ + int jnk; + + switch(code) { + case 0xC4: // CALL NZ,nnnn + if (!(regs.F & BIT_Z)) { + push2(PC+2); + PC = fetch2(); + } else { + jnk = fetch2(); + } + break; + case 0xCC: // CALL Z,nnnn + if (regs.F & BIT_Z) { + push2(PC+2); + PC = fetch2(); + } else { + jnk = fetch2(); + } + break; + case 0xCD: // CALL nnnn + push2(PC+2); + PC = fetch2(); + break; + case 0xD4: // CALL NC,nnnn + if (!(regs.F & BIT_C)) { + push2(PC+2); + PC = fetch2(); + } else { + jnk = fetch2(); + } + break; + case 0xDC: // CALL C,nnnn + if (regs.F & BIT_C) { + push2(PC+2); + PC = fetch2(); + } else { + jnk = fetch2(); + } + break; + case 0xE4: // CALL PO,nnnn + if (!(regs.F & BIT_P)) { + push2(PC+2); + PC = fetch2(); + } else { + jnk = fetch2(); + } + break; + case 0xEC: // CALL PE,nnnn + if (regs.F & BIT_P) { + push2(PC+2); + PC = fetch2(); + } else { + jnk = fetch2(); + } + break; + case 0xF4: // CALL P,nnnn + if (!(regs.F & BIT_S)) { + push2(PC+2); + PC = fetch2(); + } else { + jnk = fetch2(); + } + break; + case 0xFC: // CALL M,nnnn + if (regs.F & BIT_S) { + push2(PC+2); + PC = fetch2(); + } else { + jnk = fetch2(); + } + break; + default: + return(resINV_INST); + break; + } + + return(resGO); +} + +int +cl_z80::inst_out(t_mem code) +{ + return(resGO); +} + +int +cl_z80::inst_push(t_mem code) +{ + switch(code) { + case 0xC5: // PUSH BC + push2(regs.BC); + break; + case 0xD5: // PUSH DE + push2(regs.DE); + break; + case 0xE5: // PUSH HL + push2(regs.HL); + break; + case 0xF5: // PUSH AF + push1(regs.A); + push1(regs.F); + break; + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_exx(t_mem code) +{ + /* case 0xD9: // EXX - swap BC,DE,HL with alternates */ + TYPE_UWORD tempw; + + tempw = regs.aBC; + regs.BC = regs.aBC; + regs.aBC = tempw; + + tempw = regs.aDE; + regs.DE = regs.aDE; + regs.aDE = tempw; + + tempw = regs.aDE; + regs.DE = regs.aDE; + regs.aDE = tempw; + + return(resGO); +} + +int +cl_z80::inst_in(t_mem code) +{ + return(resGO); +} + +int +cl_z80::inst_sub(t_mem code) +{ + switch(code) { + case 0x90: // SUB B + sub_A_bytereg(regs.bc.h); + break; + case 0x91: // SUB C + sub_A_bytereg(regs.bc.l); + break; + case 0x92: // SUB D + sub_A_bytereg(regs.de.h); + break; + case 0x93: // SUB E + sub_A_bytereg(regs.de.l); + break; + case 0x94: // SUB H + sub_A_bytereg(regs.hl.h); + break; + case 0x95: // SUB L + sub_A_bytereg(regs.hl.l); + break; + case 0x96: // SUB (HL) + { unsigned char tmp1; + tmp1 = get1(regs.HL); + sub_A_bytereg(tmp1); + } + break; + case 0x97: // SUB A + regs.A = 0; + break; + case 0xD6: // SUB nn + { unsigned char tmp1; + tmp1 = fetch(); + sub_A_bytereg(tmp1); + } + break; + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_pop(t_mem code) +{ + switch (code) { + case 0xC1: // POP BC + regs.BC = get2(regs.SP); + regs.SP+=2; + break; + case 0xD1: // POP DE + regs.DE = get2(regs.SP); + regs.SP+=2; + break; + case 0xE1: // POP HL + regs.HL = get2(regs.SP); + regs.SP+=2; + break; + case 0xF1: // POP AF + regs.F = get1(regs.SP++); + regs.A = get1(regs.SP++); + break; + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_jp(t_mem code) +{ + int jnk; + + switch (code) { + case 0xC2: // JP NZ,nnnn + if (!(regs.F & BIT_Z)) { + PC = fetch2(); + } else { + jnk = fetch2(); + } + break; + + case 0xC3: // JP nnnn + PC = fetch2(); + break; + + case 0xCA: // JP Z,nnnn + if (regs.F & BIT_Z) { + PC = fetch2(); + } else { + jnk = fetch2(); + } + break; + + case 0xD2: // JP NC,nnnn + if (!(regs.F & BIT_C)) { + PC = fetch2(); + } else { + jnk = fetch2(); + } + break; + + case 0xDA: // JP C,nnnn + if (regs.F & BIT_C) { + PC = fetch2(); + } else { + jnk = fetch2(); + } + break; + + case 0xE2: // JP PO,nnnn + if (regs.F & BIT_P) { + PC = fetch2(); + } else { + jnk = fetch2(); + } + break; + + case 0xE9: // JP (HL) + PC = regs.HL; + break; + + case 0xea: // JP PO,nnnn + if (!(regs.F & BIT_P)) { + PC = fetch2(); + } else { + jnk = fetch2(); + } + break; + + case 0xF2: // JP P,nnnn (positive) + if (!(regs.F & BIT_S)) { + PC = fetch2(); + } else { + jnk = fetch2(); + } + break; + + case 0xfa: // JP M,nnnn (sign negative) + if (regs.F & BIT_S) { + PC = fetch2(); + } else { + jnk = fetch2(); + } + break; + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_di(t_mem code) +{ + /* disable interrupts */ + return(resGO); +} + +int +cl_z80::inst_ei(t_mem code) +{ + /* enable interrupts */ + return(resGO); +} + +/* End of z80.src/inst.cc */ diff --git a/sim/ucsim/z80.src/inst_cb.cc b/sim/ucsim/z80.src/inst_cb.cc new file mode 100644 index 0000000..0ec12a5 --- /dev/null +++ b/sim/ucsim/z80.src/inst_cb.cc @@ -0,0 +1,705 @@ +/* + * Simulator of microcontrollers (inst.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +// local +#include "z80cl.h" +#include "regsz80.h" +#include "z80mac.h" + +int +cl_z80::inst_cb_rlc(t_mem code) +{ + switch(code) { + case 0x00: // RLC B + rlc_byte(regs.bc.h); + break; + case 0x01: // RLC C + rlc_byte(regs.bc.l); + break; + case 0x02: // RLC D + rlc_byte(regs.de.h); + break; + case 0x03: // RLC E + rlc_byte(regs.de.l); + break; + case 0x04: // RLC H + rlc_byte(regs.hl.h); + break; + case 0x05: // RLC L + rlc_byte(regs.hl.l); + break; + case 0x06: // RLC (HL) + { unsigned char tmp; + tmp = get1(regs.HL); + rlc_byte(tmp); + store1(regs.HL, tmp); + } + break; + case 0x07: // RLC A + rlc_byte(regs.A); + break; + } + return(resGO); +} + +int +cl_z80::inst_cb_rrc(t_mem code) +{ + switch(code) { + case 0x08: // RRC B + rrc_byte(regs.bc.h); + break; + case 0x09: // RRC C + rrc_byte(regs.bc.l); + break; + case 0x0A: // RRC D + rrc_byte(regs.de.h); + break; + case 0x0B: // RRC E + rrc_byte(regs.de.l); + break; + case 0x0C: // RRC H + rrc_byte(regs.hl.h); + break; + case 0x0D: // RRC L + rrc_byte(regs.hl.l); + break; + case 0x0E: // RRC (HL) + { unsigned char tmp; + tmp = get1(regs.HL); + rrc_byte(tmp); + store1(regs.HL, tmp); + } + break; + case 0x0F: // RRC A + rrc_byte(regs.A); + break; + } + return(resGO); +} + +int +cl_z80::inst_cb_rl(t_mem code) +{ + switch(code) { + case 0x10: // RL B + rl_byte(regs.bc.h); + break; + case 0x11: // RL C + rl_byte(regs.bc.l); + break; + case 0x12: // RL D + rl_byte(regs.de.h); + break; + case 0x13: // RL E + rl_byte(regs.de.l); + break; + case 0x14: // RL H + rl_byte(regs.hl.h); + break; + case 0x15: // RL L + rl_byte(regs.hl.l); + break; + case 0x16: // RL (HL) + { unsigned char tmp; + tmp = get1(regs.HL); + rl_byte(tmp); + store1(regs.HL, tmp); + } + break; + case 0x17: // RL A + rl_byte(regs.A); + break; + } + return(resGO); +} + +int +cl_z80::inst_cb_rr(t_mem code) +{ + switch(code) { + case 0x18: // RR B + rr_byte(regs.bc.h); + break; + case 0x19: // RR C + rr_byte(regs.bc.l); + break; + case 0x1A: // RR D + rr_byte(regs.de.h); + break; + case 0x1B: // RR E + rr_byte(regs.de.l); + break; + case 0x1C: // RR H + rr_byte(regs.hl.h); + break; + case 0x1D: // RR L + rr_byte(regs.hl.l); + break; + case 0x1E: // RR (HL) + { unsigned char tmp; + tmp = get1(regs.HL); + rr_byte(tmp); + store1(regs.HL, tmp); + } + break; + case 0x1F: // RR A + rr_byte(regs.A); + break; + } + return(resGO); +} + +int +cl_z80::inst_cb_sla(t_mem code) +{ + switch(code) { + case 0x20: // SLA B + sla_byte(regs.bc.h); + break; + case 0x21: // SLA C + sla_byte(regs.bc.l); + break; + case 0x22: // SLA D + sla_byte(regs.de.h); + break; + case 0x23: // SLA E + sla_byte(regs.de.l); + break; + case 0x24: // SLA H + sla_byte(regs.hl.h); + break; + case 0x25: // SLA L + sla_byte(regs.hl.l); + break; + case 0x26: // SLA (HL) + { unsigned char tmp; + tmp = get1(regs.HL); + sla_byte(tmp); + store1(regs.HL, tmp); + } + break; + case 0x27: // SLA A + sla_byte(regs.A); + break; + } + return(resGO); +} + +int +cl_z80::inst_cb_sra(t_mem code) +{ + switch(code) { + case 0x28: // SRA B + sra_byte(regs.bc.h); + break; + case 0x29: // SRA C + sra_byte(regs.bc.l); + break; + case 0x2A: // SRA D + sra_byte(regs.de.h); + break; + case 0x2B: // SRA E + sra_byte(regs.de.l); + break; + case 0x2C: // SRA H + sra_byte(regs.hl.h); + break; + case 0x2D: // SRA L + sra_byte(regs.hl.l); + break; + case 0x2E: // SRA (HL) + { unsigned char tmp; + tmp = get1(regs.HL); + sra_byte(tmp); + store1(regs.HL, tmp); + } + break; + case 0x2F: // SRA A + sra_byte(regs.A); + break; + } + return(resGO); +} + +int +cl_z80::inst_cb_slia(t_mem code) +{ + switch(code) { + case 0x30: // SLIA B (Shift Left Inverted Arithmetic) + slia_byte(regs.bc.h); + break; + case 0x31: // SLIA C like SLA, but shifts in a 1 bit + slia_byte(regs.bc.l); + break; + case 0x32: // SLIA D + slia_byte(regs.de.h); + break; + case 0x33: // SLIA E + slia_byte(regs.de.l); + break; + case 0x34: // SLIA H + slia_byte(regs.hl.h); + break; + case 0x35: // SLIA L + slia_byte(regs.hl.l); + break; + case 0x36: // SLIA (HL) + { unsigned char tmp; + tmp = get1(regs.HL); + slia_byte(tmp); + store1(regs.HL, tmp); + } + break; + case 0x37: // SLIA A + slia_byte(regs.A); + break; + } + return(resGO); +} + +int +cl_z80::inst_cb_srl(t_mem code) +{ + switch(code) { + case 0x38: // SRL B + srl_byte(regs.bc.h); + break; + case 0x39: // SRL C + srl_byte(regs.bc.l); + break; + case 0x3A: // SRL D + srl_byte(regs.de.h); + break; + case 0x3B: // SRL E + srl_byte(regs.de.l); + break; + case 0x3C: // SRL H + srl_byte(regs.hl.h); + break; + case 0x3D: // SRL L + srl_byte(regs.hl.l); + break; + case 0x3E: // SRL (HL) + { unsigned char tmp; + tmp = get1(regs.HL); + srl_byte(tmp); + store1(regs.HL, tmp); + } + break; + case 0x3F: // SRL A + srl_byte(regs.A); + break; + } + return(resGO); +} + + +int +cl_z80::inst_cb_bit(t_mem code) +{ +#define bit_bitnum ((code >> 3) & 7) + + switch(code & 7) { + case 0x0: // BIT x,B + bit_byte(regs.bc.h, bit_bitnum); break; + case 0x1: // BIT x,C + bit_byte(regs.bc.l, bit_bitnum); break; + case 0x2: // BIT x,D + bit_byte(regs.de.h, bit_bitnum); break; + case 0x3: // BIT x,E + bit_byte(regs.de.l, bit_bitnum); break; + case 0x4: // BIT x,H + bit_byte(regs.hl.h, bit_bitnum); break; + case 0x5: // BIT x,L + bit_byte(regs.hl.l, bit_bitnum); break; + case 0x6: // BIT x,(HL) + { unsigned char tmp; + tmp = get1(regs.HL); + bit_byte(tmp, bit_bitnum); + store1(regs.HL, tmp); + } + break; + case 0x7: // BIT x,A + bit_byte(regs.A, bit_bitnum); break; + break; + } + return(resGO); +} + +int +cl_z80::inst_cb_res(t_mem code) +{ +#define bit_bitnum ((code >> 3) & 7) + + switch(code & 0x7) { + case 0x0: // RES x,B + regs.bc.h &= ~(1 << bit_bitnum); break; + case 0x1: // RES x,C + regs.bc.l &= ~(1 << bit_bitnum); break; + case 0x2: // RES x,D + regs.de.h &= ~(1 << bit_bitnum); break; + case 0x3: // RES x,E + regs.de.l &= ~(1 << bit_bitnum); break; + case 0x4: // RES x,H + regs.hl.h &= ~(1 << bit_bitnum); break; + case 0x5: // RES x,L + regs.hl.l &= ~(1 << bit_bitnum); break; + case 0x6: // RES x,(HL) + { unsigned char tmp; + tmp = get1(regs.HL); + tmp &= ~(1 << bit_bitnum); + store1(regs.HL, tmp); + } + break; + case 0x7: // RES x,A + regs.A &= ~(bit_bitnum); break; + } + return(resGO); +} + +int +cl_z80::inst_cb_set(t_mem code) +{ +#define bit_bitnum ((code >> 3) & 7) + + switch(code) { + case 0x0: // SET x,B + regs.bc.h |= (1 << bit_bitnum); break; + case 0x1: // SET x,C + regs.bc.l |= (1 << bit_bitnum); break; + case 0x2: // SET x,D + regs.de.h |= (1 << bit_bitnum); break; + case 0x3: // SET x,E + regs.de.l |= (1 << bit_bitnum); break; + case 0x4: // SET x,H + regs.hl.h |= (1 << bit_bitnum); break; + case 0x5: // SET x,L + regs.hl.h |= (1 << bit_bitnum); break; + case 0x6: // SET x,(HL) + { unsigned char tmp; + tmp = get1(regs.HL); + tmp |= (1 << bit_bitnum); + store1(regs.HL, tmp); + } + break; + case 0x7: // SET x,A + regs.de.h |= (1 << bit_bitnum); break; + } + return(resGO); +} + +/******** start CB codes *****************/ +int +cl_z80::inst_cb(void) +{ + t_mem code; + + if (fetch(&code)) + return(resBREAKPOINT); + tick(1); + switch (code) + { + case 0x00: // RLC B + case 0x01: // RLC C + case 0x02: // RLC D + case 0x03: // RLC E + case 0x04: // RLC H + case 0x05: // RLC L + case 0x06: // RLC (HL) + case 0x07: // RLC A + return (inst_cb_rlc(code)); + case 0x08: // RRC B + case 0x09: // RRC C + case 0x0A: // RRC D + case 0x0B: // RRC E + case 0x0C: // RRC H + case 0x0D: // RRC L + case 0x0E: // RRC (HL) + case 0x0F: // RRC A + return (inst_cb_rrc(code)); + case 0x10: // RL B + case 0x11: // RL C + case 0x12: // RL D + case 0x13: // RL E + case 0x14: // RL H + case 0x15: // RL L + case 0x16: // RL (HL) + case 0x17: // RL A + return (inst_cb_rl(code)); + case 0x18: // RR B + case 0x19: // RR C + case 0x1A: // RR D + case 0x1B: // RR E + case 0x1C: // RR H + case 0x1D: // RR L + case 0x1E: // RR (HL) + case 0x1F: // RR A + return (inst_cb_rr(code)); + case 0x20: // SLA B + case 0x21: // SLA C + case 0x22: // SLA D + case 0x23: // SLA E + case 0x24: // SLA H + case 0x25: // SLA L + case 0x26: // SLA (HL) + case 0x27: // SLA A + return (inst_cb_sla(code)); + case 0x28: // SRA B + case 0x29: // SRA C + case 0x2A: // SRA D + case 0x2B: // SRA E + case 0x2C: // SRA H + case 0x2D: // SRA L + case 0x2E: // SRA (HL) + case 0x2F: // SRA A + return (inst_cb_sra(code)); + case 0x30: // SLIA B (Shift Left Inverted Arithmetic) + case 0x31: // SLIA C like SLA, but shifts in a 1 bit + case 0x32: // SLIA D + case 0x33: // SLIA E + case 0x34: // SLIA H + case 0x35: // SLIA L + case 0x36: // SLIA (HL) + case 0x37: // SLIA A + return (inst_cb_slia(code)); + case 0x38: // SRL B + case 0x39: // SRL C + case 0x3A: // SRL D + case 0x3B: // SRL E + case 0x3C: // SRL H + case 0x3D: // SRL L + case 0x3E: // SRL (HL) + case 0x3F: // SRL A + return (inst_cb_srl(code)); + case 0x40: // BIT 0,B + case 0x41: // BIT 0,C + case 0x42: // BIT 0,D + case 0x43: // BIT 0,E + case 0x44: // BIT 0,H + case 0x45: // BIT 0,L + case 0x46: // BIT 0,(HL) + case 0x47: // BIT 0,A + case 0x48: // BIT 1,B + case 0x49: // BIT 1,C + case 0x4A: // BIT 1,D + case 0x4B: // BIT 1,E + case 0x4C: // BIT 1,H + case 0x4D: // BIT 1,L + case 0x4E: // BIT 1,(HL) + case 0x4F: // BIT 1,A + case 0x50: // BIT 2,B + case 0x51: // BIT 2,C + case 0x52: // BIT 2,D + case 0x53: // BIT 2,E + case 0x54: // BIT 2,H + case 0x55: // BIT 2,L + case 0x56: // BIT 2,(HL) + case 0x57: // BIT 2,A + case 0x58: // BIT 3,B + case 0x59: // BIT 3,C + case 0x5A: // BIT 3,D + case 0x5B: // BIT 3,E + case 0x5C: // BIT 3,H + case 0x5D: // BIT 3,L + case 0x5E: // BIT 3,(HL) + case 0x5F: // BIT 3,A + case 0x60: // BIT 4,B + case 0x61: // BIT 4,C + case 0x62: // BIT 4,D + case 0x63: // BIT 4,E + case 0x64: // BIT 4,H + case 0x65: // BIT 4,L + case 0x66: // BIT 4,(HL) + case 0x67: // BIT 4,A + case 0x68: // BIT 5,B + case 0x69: // BIT 5,C + case 0x6A: // BIT 5,D + case 0x6B: // BIT 5,E + case 0x6C: // BIT 5,H + case 0x6D: // BIT 5,L + case 0x6E: // BIT 5,(HL) + case 0x6F: // BIT 5,A + case 0x70: // BIT 6,B + case 0x71: // BIT 6,C + case 0x72: // BIT 6,D + case 0x73: // BIT 6,E + case 0x74: // BIT 6,H + case 0x75: // BIT 6,L + case 0x76: // BIT 6,(HL) + case 0x77: // BIT 6,A + case 0x78: // BIT 7,B + case 0x79: // BIT 7,C + case 0x7A: // BIT 7,D + case 0x7B: // BIT 7,E + case 0x7C: // BIT 7,H + case 0x7D: // BIT 7,L + case 0x7E: // BIT 7,(HL) + case 0x7F: // BIT 7,A + return (inst_cb_bit(code)); + case 0x80: // RES 0,B + case 0x81: // RES 0,C + case 0x82: // RES 0,D + case 0x83: // RES 0,E + case 0x84: // RES 0,H + case 0x85: // RES 0,L + case 0x86: // RES 0,(HL) + case 0x87: // RES 0,A + case 0x88: // RES 1,B + case 0x89: // RES 1,C + case 0x8A: // RES 1,D + case 0x8B: // RES 1,E + case 0x8C: // RES 1,H + case 0x8D: // RES 1,L + case 0x8E: // RES 1,(HL) + case 0x8F: // RES 1,A + case 0x90: // RES 2,B + case 0x91: // RES 2,C + case 0x92: // RES 2,D + case 0x93: // RES 2,E + case 0x94: // RES 2,H + case 0x95: // RES 2,L + case 0x96: // RES 2,(HL) + case 0x97: // RES 2,A + case 0x98: // RES 3,B + case 0x99: // RES 3,C + case 0x9A: // RES 3,D + case 0x9B: // RES 3,E + case 0x9C: // RES 3,H + case 0x9D: // RES 3,L + case 0x9E: // RES 3,(HL) + case 0x9F: // RES 3,A + case 0xA0: // RES 4,B + case 0xA1: // RES 4,C + case 0xA2: // RES 4,D + case 0xA3: // RES 4,E + case 0xA4: // RES 4,H + case 0xA5: // RES 4,L + case 0xA6: // RES 4,(HL) + case 0xA7: // RES 4,A + case 0xA8: // RES 5,B + case 0xA9: // RES 5,C + case 0xAA: // RES 5,D + case 0xAB: // RES 5,E + case 0xAC: // RES 5,H + case 0xAD: // RES 5,L + case 0xAE: // RES 5,(HL) + case 0xAF: // RES 5,A + case 0xB0: // RES 6,B + case 0xB1: // RES 6,C + case 0xB2: // RES 6,D + case 0xB3: // RES 6,E + case 0xB4: // RES 6,H + case 0xB5: // RES 6,L + case 0xB6: // RES 6,(HL) + case 0xB7: // RES 6,A + case 0xB8: // RES 7,B + case 0xB9: // RES 7,C + case 0xBA: // RES 7,D + case 0xBB: // RES 7,E + case 0xBC: // RES 7,H + case 0xBD: // RES 7,L + case 0xBE: // RES 7,(HL) + case 0xBF: // RES 7,A + return (inst_cb_res(code)); + case 0xC0: // SET 0,B + case 0xC1: // SET 0,C + case 0xC2: // SET 0,D + case 0xC3: // SET 0,E + case 0xC4: // SET 0,H + case 0xC5: // SET 0,L + case 0xC6: // SET 0,(HL) + case 0xC7: // SET 0,A + case 0xC8: // SET 1,B + case 0xC9: // SET 1,C + case 0xCA: // SET 1,D + case 0xCB: // SET 1,E + case 0xCC: // SET 1,H + case 0xCD: // SET 1,L + case 0xCE: // SET 1,(HL) + case 0xCF: // SET 1,A + case 0xD0: // SET 2,B + case 0xD1: // SET 2,C + case 0xD2: // SET 2,D + case 0xD3: // SET 2,E + case 0xD4: // SET 2,H + case 0xD5: // SET 2,L + case 0xD6: // SET 2,(HL) + case 0xD7: // SET 2,A + case 0xD8: // SET 3,B + case 0xD9: // SET 3,C + case 0xDA: // SET 3,D + case 0xDB: // SET 3,E + case 0xDC: // SET 3,H + case 0xDD: // SET 3,L + case 0xDE: // SET 3,(HL) + case 0xDF: // SET 3,A + case 0xE0: // SET 4,B + case 0xE1: // SET 4,C + case 0xE2: // SET 4,D + case 0xE3: // SET 4,E + case 0xE4: // SET 4,H + case 0xE5: // SET 4,L + case 0xE6: // SET 4,(HL) + case 0xE7: // SET 4,A + case 0xE8: // SET 5,B + case 0xE9: // SET 5,C + case 0xEA: // SET 5,D + case 0xEB: // SET 5,E + case 0xEC: // SET 5,H + case 0xED: // SET 5,L + case 0xEE: // SET 5,(HL) + case 0xEF: // SET 5,A + case 0xF0: // SET 6,B + case 0xF1: // SET 6,C + case 0xF2: // SET 6,D + case 0xF3: // SET 6,E + case 0xF4: // SET 6,H + case 0xF5: // SET 6,L + case 0xF6: // SET 6,(HL) + case 0xF7: // SET 6,A + case 0xF8: // SET 7,B + case 0xF9: // SET 7,C + case 0xFA: // SET 7,D + case 0xFB: // SET 7,E + case 0xFC: // SET 7,H + case 0xFD: // SET 7,L + case 0xFE: // SET 7,(HL) + case 0xFF: // SET 7,A + return (inst_cb_set(code)); + } + /*if (PC) + PC--; + else + PC= get_mem_size(MEM_ROM_ID)-1;*/ + PC= rom->inc_address(PC, -1); + return(resINV_INST); +} + +/* End of z80.src/inst_cb.cc */ diff --git a/sim/ucsim/z80.src/inst_dd.cc b/sim/ucsim/z80.src/inst_dd.cc new file mode 100644 index 0000000..ba9cb83 --- /dev/null +++ b/sim/ucsim/z80.src/inst_dd.cc @@ -0,0 +1,52 @@ +/* + * Simulator of microcontrollers (inst_dd.cc) + * dd escaped multi-byte opcodes. + * + * some z80 code base from Karl Bongers karl@turbobit.com + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +// local +#include "z80cl.h" +#include "regsz80.h" +#include "z80mac.h" + +#define regs_iX_h regs.ix.h +#define regs_iX_l regs.ix.l +#define regs_IX_OR_IY regs.IX +#define inst_Xd_ld inst_dd_ld +#define inst_Xd_add inst_dd_add +#define inst_Xd_push inst_dd_push +#define inst_Xd_inc inst_dd_inc +#define inst_Xd_dec inst_dd_dec +#define inst_Xd_misc inst_dd_misc +#define inst_Xd inst_dd +#define inst_Xdcb inst_ddcb + +#include "inst_xd.cc" + +/* End of z80.src/inst_dd.cc */ diff --git a/sim/ucsim/z80.src/inst_ddcb.cc b/sim/ucsim/z80.src/inst_ddcb.cc new file mode 100644 index 0000000..4d04fb2 --- /dev/null +++ b/sim/ucsim/z80.src/inst_ddcb.cc @@ -0,0 +1,53 @@ +/* + * Simulator of microcontrollers (inst_ddcb.cc) + * DD CB escaped multi-byte opcodes for Z80. + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +// local +#include "z80cl.h" +#include "regsz80.h" +#include "z80mac.h" + + +#define regs_IX_OR_IY regs.IX +#define inst_XXcb_rlc inst_ddcb_rlc +#define inst_XXcb_rrc inst_ddcb_rrc +#define inst_XXcb_rl inst_ddcb_rl +#define inst_XXcb_rr inst_ddcb_rr +#define inst_XXcb_sla inst_ddcb_sla +#define inst_XXcb_sra inst_ddcb_sra +#define inst_XXcb_slia inst_ddcb_slia +#define inst_XXcb_srl inst_ddcb_srl +#define inst_XXcb_bit inst_ddcb_bit +#define inst_XXcb_res inst_ddcb_res +#define inst_XXcb_set inst_ddcb_set +#define inst_XXcb inst_ddcb + +#include "inst_xxcb.cc" + +/* End of z80.src/inst_ddcb.cc */ diff --git a/sim/ucsim/z80.src/inst_ed.cc b/sim/ucsim/z80.src/inst_ed.cc new file mode 100644 index 0000000..0687460 --- /dev/null +++ b/sim/ucsim/z80.src/inst_ed.cc @@ -0,0 +1,336 @@ +/* + * Simulator of microcontrollers (inst_ed.cc) + * ED escaped multi-byte opcodes for Z80. + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +// local +#include "z80cl.h" +#include "regsz80.h" +#include "z80mac.h" + + +int +cl_z80::inst_ed_(t_mem code) +{ + switch(code) { + } + return(resGO); +} + +/******** start CB codes *****************/ +int +cl_z80::inst_ed(void) +{ + t_mem code; + unsigned short tw; + + if (fetch(&code)) + return(resBREAKPOINT); + + switch (code) + { +#if 0 + case 0x40: // IN B,(C) + return(resGO); + case 0x41: // OUT (C),B + return(resGO); +#endif + case 0x42: // SBC HL,BC + sbc_HL_wordreg(regs.BC); + return(resGO); + case 0x43: // LD (nnnn),BC + tw = fetch2(); + store2(tw, regs.BC); + return(resGO); + case 0x44: // NEG + regs.F &= ~(BIT_ALL); /* clear these */ + regs.A -= regs.A; + regs.F |= BIT_N; /* not addition */ + if (regs.A == 0) regs.F |= BIT_Z; + if (regs.A & 0x80) regs.F |= BIT_S; + /* Skip BIT_A for now */ + return(resGO); + case 0x45: // RETN (return from non-maskable interrupt) + pop2(PC); + return(resGO); +#if 0 + case 0x46: // IM 0 + /* interrupt device puts opcode on data bus */ + return(resGO); +#endif + case 0x47: // LD IV,A + regs.iv = regs.A; + return(resGO); + + case 0x48: // IN C,(C) + return(resGO); + case 0x49: // OUT (C),C + return(resGO); + + case 0x4A: // ADC HL,BC + adc_HL_wordreg(regs.BC); + return(resGO); + case 0x4B: // LD BC,(nnnn) + tw = fetch2(); + regs.BC = get2(tw); + return(resGO); + case 0x4D: // RETI (return from interrupt) + pop2(PC); + return(resGO); + case 0x4F: // LD R,A + /* Load "refresh" register(whats that?) */ + return(resGO); + + case 0x50: // IN D,(C) + return(resGO); + case 0x51: // OUT (C),D + return(resGO); + + case 0x52: // SBC HL,DE + sbc_HL_wordreg(regs.DE); + return(resGO); + case 0x53: // LD (nnnn),DE + tw = fetch2(); + store2(tw, regs.DE); + return(resGO); +#if 0 + case 0x56: // IM 1 + return(resGO); +#endif + case 0x57: // LD A,IV + regs.A = regs.iv; + return(resGO); + + case 0x58: // IN E,(C) + return(resGO); + case 0x59: // OUT (C),E + return(resGO); + + case 0x5A: // ADC HL,DE + adc_HL_wordreg(regs.DE); + return(resGO); + case 0x5B: // LD DE,(nnnn) + tw = fetch2(); + regs.DE = get2(tw); + return(resGO); + +#if 0 + case 0x5E: // IM 2 + return(resGO); + case 0x5F: // LD A,R + return(resGO); + case 0x60: // IN H,(C) + return(resGO); + case 0x61: // OUT (C),H + return(resGO); +#endif + case 0x62: // SBC HL,HL + sbc_HL_wordreg(regs.HL); + return(resGO); + case 0x63: // LD (nnnn),HL opcode 22 does the same faster + tw = fetch2(); + store2(tw, regs.HL); + return(resGO); + +#if 0 + case 0x67: // RRD + return(resGO); +#endif + case 0x68: // IN L,(C) + return(resGO); + case 0x69: // OUT (C),L + return(resGO); + + case 0x6A: // ADC HL,HL + adc_HL_wordreg(regs.HL); + return(resGO); + case 0x6B: // LD HL,(nnnn) opcode 2A does the same faster + tw = fetch2(); + regs.HL = get2(tw); + return(resGO); + +#if 0 + case 0x6F: // RLD + /* rotate 1 bcd digit left between ACC and memory location */ + return(resGO); +#endif + + case 0x70: // IN (C) set flags only (TSTI) + return(resGO); + case 0x71: // OUT (C),0 + return(resGO); + + case 0x72: // SBC HL,SP + sbc_HL_wordreg(regs.SP); + return(resGO); + case 0x73: // LD (nnnn),SP + tw = fetch2(); + store2(tw, regs.SP); + return(resGO); + + case 0x78: // IN A,(C) + return(resGO); + case 0x79: // OUT (C),A + return(resGO); + + case 0x7A: // ADC HL,SP + adc_HL_wordreg(regs.SP); + return(resGO); + case 0x7B: // LD SP,(nnnn) + tw = fetch2(); + regs.SP = get2(tw); + return(resGO); + + case 0xA0: // LDI + // BC - count, sourc=HL, dest=DE. *DE++ = *HL++, --BC until zero + regs.F &= ~(BIT_P | BIT_N | BIT_A); /* clear these */ + store1(regs.DE, get1(regs.HL)); + ++regs.HL; + ++regs.DE; + --regs.BC; + if (regs.BC != 0) regs.F |= BIT_P; + return(resGO); + case 0xA1: // CPI + // compare acc with mem(HL), if ACC=0 set Z flag. Incr HL, decr BC. + { + unsigned char tmp; + tmp = get1(regs.HL); + cp_bytereg(tmp); + ++regs.HL; + --regs.BC; + if (regs.BC != 0) regs.F |= BIT_P; + } + return(resGO); + + case 0xA2: // INI + return(resGO); + case 0xA3: // OUTI + return(resGO); + + case 0xA8: // LDD + // BC - count, source=HL, dest=DE. *DE-- = *HL--, --BC until zero + regs.F &= ~(BIT_P | BIT_N | BIT_A); /* clear these */ + store1(regs.DE, get1(regs.HL)); + --regs.HL; + --regs.DE; + --regs.BC; + if (regs.BC != 0) regs.F |= BIT_P; + return(resGO); + case 0xA9: // CPD +/* fixme: checkme, compare to other emul. */ + + regs.F &= ~(BIT_ALL); /* clear these */ + if ((regs.A - get1(regs.HL)) == 0) { + regs.F |= (BIT_Z | BIT_P); + } + ++regs.HL; + --regs.BC; + if (regs.BC != 0) regs.F |= BIT_P; + + return(resGO); + + case 0xAA: // IND + return(resGO); + case 0xAB: // OUTD + return(resGO); + + case 0xB0: // LDIR + // BC - count, sourc=HL, dest=DE. *DE++ = *HL++, --BC until zero + regs.F &= ~(BIT_P | BIT_N | BIT_A); /* clear these */ + do { + store1(regs.DE, get1(regs.HL)); + ++regs.HL; + ++regs.DE; + --regs.BC; + } while (regs.BC != 0); + return(resGO); + + case 0xB1: // CPIR + // compare acc with mem(HL), if ACC=0 set Z flag. Incr HL, decr BC. + regs.F &= ~(BIT_P | BIT_A | BIT_Z | BIT_S); /* clear these */ + regs.F |= BIT_N; + do { + if((regs.A - get1(regs.HL)) == 0) + regs.F |= BIT_Z; + else + regs.F &= ~BIT_Z; + if((regs.A - get1(regs.HL)) & 0x80) + regs.F |= BIT_S; + else + regs.F &= ~BIT_S; +/* fixme: set BIT_A correctly. */ + ++regs.HL; + --regs.BC; + } while (regs.BC != 0 && (regs.F & BIT_Z) == 0); + if(regs.BC != 0) + regs.F |= BIT_P; + + return(resGO); +#if 0 + case 0xB2: // INIR + return(resGO); + case 0xB3: // OTIR + return(resGO); +#endif + case 0xB8: // LDDR + // BC - count, source=HL, dest=DE. *DE-- = *HL--, --BC until zero + regs.F &= ~(BIT_P | BIT_N | BIT_A); /* clear these */ + do { + store1(regs.DE, get1(regs.HL)); + --regs.HL; + --regs.DE; + --regs.BC; + } while (regs.BC != 0); + return(resGO); + case 0xB9: // CPDR + // compare acc with mem(HL), if ACC=0 set Z flag. Incr HL, decr BC. + regs.F &= ~(BIT_ALL); /* clear these */ + do { + if ((regs.A - get1(regs.HL)) == 0) { + regs.F |= (BIT_Z | BIT_P); + break; + } + --regs.HL; + --regs.BC; + } while (regs.BC != 0); + return(resGO); +#if 0 + case 0xBA: // INDR + return(resGO); + case 0xBB: // OTDR + return(resGO); +#endif + + default: + return(resINV_INST); + } + + return(resINV_INST); +} + +/* End of z80.src/inst_ed.cc */ diff --git a/sim/ucsim/z80.src/inst_fd.cc b/sim/ucsim/z80.src/inst_fd.cc new file mode 100644 index 0000000..417f8ed --- /dev/null +++ b/sim/ucsim/z80.src/inst_fd.cc @@ -0,0 +1,52 @@ +/* + * Simulator of microcontrollers (inst_fd.cc) + * FD escaped multi-byte opcodes. + * + * + * Copyright (C) 1999,2001 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + * some z80 code base from Karl Bongers karl@turbobit.com + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +// local +#include "z80cl.h" +#include "regsz80.h" +#include "z80mac.h" + +#define regs_iX_h regs.iy.h +#define regs_iX_l regs.iy.l +#define regs_IX_OR_IY regs.IY +#define inst_Xd_ld inst_fd_ld +#define inst_Xd_add inst_fd_add +#define inst_Xd_push inst_fd_push +#define inst_Xd_inc inst_fd_inc +#define inst_Xd_dec inst_fd_dec +#define inst_Xd_misc inst_fd_misc +#define inst_Xd inst_fd +#define inst_Xdcb inst_fdcb + +#include "inst_xd.cc" + +/* End of z80.src/inst_fd.cc */ diff --git a/sim/ucsim/z80.src/inst_fdcb.cc b/sim/ucsim/z80.src/inst_fdcb.cc new file mode 100644 index 0000000..cbd5e3d --- /dev/null +++ b/sim/ucsim/z80.src/inst_fdcb.cc @@ -0,0 +1,52 @@ +/* + * Simulator of microcontrollers (inst_fdcb.cc) + * FD CB escaped multi-byte opcodes for Z80. + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +// local +#include "z80cl.h" +#include "regsz80.h" +#include "z80mac.h" + +#define regs_IX_OR_IY regs.IY +#define inst_XXcb_rlc inst_fdcb_rlc +#define inst_XXcb_rrc inst_fdcb_rrc +#define inst_XXcb_rl inst_fdcb_rl +#define inst_XXcb_rr inst_fdcb_rr +#define inst_XXcb_sla inst_fdcb_sla +#define inst_XXcb_sra inst_fdcb_sra +#define inst_XXcb_slia inst_fdcb_slia +#define inst_XXcb_srl inst_fdcb_srl +#define inst_XXcb_bit inst_fdcb_bit +#define inst_XXcb_res inst_fdcb_res +#define inst_XXcb_set inst_fdcb_set +#define inst_XXcb inst_fdcb + +#include "inst_xxcb.cc" + +/* End of z80.src/inst_fdcb.cc */ diff --git a/sim/ucsim/z80.src/inst_xd.cc b/sim/ucsim/z80.src/inst_xd.cc new file mode 100644 index 0000000..e3c17d6 --- /dev/null +++ b/sim/ucsim/z80.src/inst_xd.cc @@ -0,0 +1,534 @@ +/* + * Simulator of microcontrollers (inst_xd.cc) + * dd or fd escaped multi-byte opcodes. + * + * This module gets pulled in and pre-processed to create + * two modules. DD prefixed opcodes reference + * IX register, while FD prefixes reference IY register. + * See inst_ddcb.cc and inst_fdcb.cc + * + * Copyright (C) 1999,2002 Drotos Daniel, Talker Bt. + * some z80 coding from Karl Bongers karl@turbobit.com + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +int +cl_z80::inst_Xd_ld(t_mem code) +{ + unsigned short tw; + + switch (code) { + case 0x21: // LD IX,nnnn + regs_IX_OR_IY = fetch2(); + return(resGO); + case 0x22: // LD (nnnn),IX + tw = fetch2(); + store2(tw, regs_IX_OR_IY); + return(resGO); + case 0x26: // LD HX,nn + regs_iX_h = fetch1(); + return(resGO); + case 0x2A: // LD IX,(nnnn) + tw = fetch2(); + regs_IX_OR_IY = get2(tw); + return(resGO); + case 0x2E: // LD LX,nn + regs_iX_l = fetch1(); + return(resGO); + case 0x36: // LD (IX+dd),nn + tw = add_u16_disp(regs_IX_OR_IY, fetch()); + store1(tw, fetch()); + return(resGO); + case 0x44: // LD B,HX + regs.bc.h = regs_iX_h; + return(resGO); + case 0x45: // LD B,LX + regs.bc.h = regs_iX_l; + return(resGO); + case 0x46: // LD B,(IX+dd) + regs.bc.h = get1(add_u16_disp(regs_IX_OR_IY,fetch())); + return(resGO); + case 0x4C: // LD C,HX + regs.bc.l = regs_iX_h; + return(resGO); + case 0x4D: // LD C,LX + regs.bc.l = regs_iX_l; + return(resGO); + case 0x4E: // LD C,(IX+dd) + regs.bc.l = get1(add_u16_disp(regs_IX_OR_IY,fetch())); + return(resGO); + case 0x54: // LD D,HX + regs.de.h = regs_iX_h; + return(resGO); + case 0x55: // LD D,LX + regs.de.h = regs_iX_l; + return(resGO); + case 0x56: // LD D,(IX+dd) + regs.de.h = get1(add_u16_disp(regs_IX_OR_IY,fetch())); + return(resGO); + case 0x5C: // LD E,H + regs.de.l = regs.hl.h; + return(resGO); + case 0x5D: // LD E,L + regs.de.l = regs.hl.l; + return(resGO); + case 0x5E: // LD E,(IX+dd) + regs.de.l = get1(add_u16_disp(regs_IX_OR_IY,fetch())); + return(resGO); + case 0x60: // LD HX,B + regs_iX_h = regs.bc.h; + return(resGO); + case 0x61: // LD HX,C + regs_iX_h = regs.bc.l; + return(resGO); + case 0x62: // LD HX,D + regs_iX_h = regs.de.h; + return(resGO); + case 0x63: // LD HX,E + regs_iX_h = regs.de.l; + return(resGO); + case 0x64: // LD HX,HX + return(resGO); + case 0x65: // LD HX,LX + regs_iX_h = regs_iX_l; + return(resGO); + case 0x66: // LD H,(IX+dd) + regs.hl.h = get1(add_u16_disp(regs_IX_OR_IY,fetch())); + return(resGO); + case 0x67: // LD HX,A + regs_iX_h = regs.A; + return(resGO); + case 0x68: // LD LX,B + regs_iX_l = regs.bc.h; + return(resGO); + case 0x69: // LD LX,C + regs_iX_l = regs.bc.l; + return(resGO); + case 0x6A: // LD LX,D + regs_iX_l = regs.de.h; + return(resGO); + case 0x6B: // LD LX,E + regs_iX_l = regs.de.l; + return(resGO); + case 0x6C: // LD LX,HX + regs_iX_l = regs.hl.h; + return(resGO); + case 0x6D: // LD LX,LX + return(resGO); + case 0x6E: // LD L,(IX+dd) + regs.hl.l = get1(add_u16_disp(regs_IX_OR_IY,fetch())); + return(resGO); + case 0x6F: // LD LX,A + regs_iX_l = regs.A; + return(resGO); + case 0x70: // LD (IX+dd),B + store1(add_u16_disp(regs_IX_OR_IY,fetch()), regs.bc.h); + return(resGO); + case 0x71: // LD (IX+dd),C + store1(add_u16_disp(regs_IX_OR_IY,fetch()), regs.bc.l); + return(resGO); + case 0x72: // LD (IX+dd),D + store1(add_u16_disp(regs_IX_OR_IY,fetch()), regs.de.h); + return(resGO); + case 0x73: // LD (IX+dd),E + store1(add_u16_disp(regs_IX_OR_IY,fetch()), regs.de.l); + return(resGO); + case 0x74: // LD (IX+dd),H + store1(add_u16_disp(regs_IX_OR_IY,fetch()), regs.hl.h); + return(resGO); + case 0x75: // LD (IX+dd),L + store1(add_u16_disp(regs_IX_OR_IY,fetch()), regs.hl.l); + return(resGO); + case 0x77: // LD (IX+dd),A + store1(add_u16_disp(regs_IX_OR_IY,fetch()), regs.A); + return(resGO); + case 0x7C: // LD A,HX + regs.A = regs_iX_h; + return(resGO); + case 0x7D: // LD A,LX + regs.A = regs_iX_l; + return(resGO); + case 0x7E: // LD A,(IX+dd) + regs.A = get1(add_u16_disp(regs_IX_OR_IY,fetch())); + return(resGO); + case 0xF9: // LD SP,IX + regs.SP = regs_IX_OR_IY; + return(resGO); + } + return(resINV_INST); +} + +int +cl_z80::inst_Xd_add(t_mem code) +{ +#define add_IX_Word(wr) { \ + unsigned int tmp; \ + regs.F &= ~(BIT_A | BIT_N | BIT_C); /* clear these */ \ + tmp = (unsigned int)regs_IX_OR_IY + (unsigned int)(wr); \ + if (tmp > 0xffff) regs.F |= BIT_C; \ + regs_IX_OR_IY = (unsigned short) tmp; } + + switch (code) { + case 0x09: // ADD IX,BC + add_IX_Word(regs.BC); + return(resGO); + case 0x19: // ADD IX,DE + add_IX_Word(regs.DE); + return(resGO); + case 0x29: // ADD IX,IX + add_IX_Word(regs_IX_OR_IY); + return(resGO); + case 0x39: // ADD IX,SP + add_IX_Word(regs.SP); + return(resGO); + case 0x84: // ADD A,HX + add_A_bytereg(regs_iX_h); + return(resGO); + case 0x85: // ADD A,LX + add_A_bytereg(regs_iX_l); + return(resGO); + case 0x86: // ADD A,(IX+dd) + { unsigned char ourtmp; + t_addr addr; + addr = add_u16_disp(regs_IX_OR_IY, fetch()); + ourtmp = get1(addr); + add_A_bytereg(ourtmp); + } + return(resGO); + } + return(resINV_INST); +} + +int +cl_z80::inst_Xd_push(t_mem code) +{ + switch (code) { + case 0xe5: // PUSH IX + push2(regs_IX_OR_IY); + return(resGO); + } + return(resINV_INST); +} + +int +cl_z80::inst_Xd_inc(t_mem code) +{ + switch(code) { + case 0x23: // INC IX + ++regs_IX_OR_IY; + break; + case 0x24: // INC HX + inc(regs_iX_h); + break; + case 0x2C: // INC LX + inc(regs_iX_l); + break; + case 0x34: // INC (IX+dd) + { + t_addr addr; + unsigned char tmp; + addr = add_u16_disp(regs_IX_OR_IY,fetch()); + tmp = get1(addr); + inc(tmp); + store1(addr, tmp); + } + break; + default: + return(resINV_INST); + break; + } + return(resGO); +} + +int +cl_z80::inst_Xd_dec(t_mem code) +{ + switch(code) { + case 0x25: // DEC HX + dec(regs_iX_h); + break; + case 0x2B: // DEC IX + --regs.IX; + break; + case 0x2D: // DEC LX + dec(regs_iX_l); + break; + case 0x35: // DEC (IX+dd) + { + t_addr addr; + unsigned char tmp; + addr = add_u16_disp(regs_IX_OR_IY,fetch()); + tmp = get1(addr); + dec(tmp); + store1(addr, tmp); + } + break; + default: + return(resINV_INST); + break; + } + return(resGO); +} + + +/* need ADC, SUB, SBC, AND, XOR, OR, CP */ +int +cl_z80::inst_Xd_misc(t_mem code) +{ + switch(code) { + case 0x8C: // ADC A,HX + adc_A_bytereg(regs_iX_h); + return(resGO); + case 0x8D: // ADC A,LX + adc_A_bytereg(regs_iX_l); + return(resGO); + case 0x8E: // ADC A,(IX+dd) + { unsigned char utmp; + t_addr addr; + addr = add_u16_disp(regs_IX_OR_IY, fetch()); + utmp = get1(addr); + adc_A_bytereg(utmp); + } + return(resGO); + + case 0x94: // SUB HX + sub_A_bytereg(regs_iX_h); + return(resGO); + case 0x95: // SUB LX + sub_A_bytereg(regs_iX_l); + return(resGO); + case 0x96: // SUB (IX+dd) + { unsigned char tmp1; + tmp1 = get1(add_u16_disp(regs_IX_OR_IY, fetch())); + sub_A_bytereg(tmp1); + } + return(resGO); + + case 0x9C: // SBC A,HX + sbc_A_bytereg(regs_iX_h); + return(resGO); + case 0x9D: // SBC A,LX + sbc_A_bytereg(regs_iX_l); + return(resGO); + case 0x9E: // SBC A,(IX+dd) + { unsigned char utmp; + utmp = get1(add_u16_disp(regs_IX_OR_IY, fetch())); + sbc_A_bytereg(utmp); + } + return(resGO); + + case 0xA4: // AND HX + and_A_bytereg(regs_iX_h); + return(resGO); + case 0xA5: // AND LX + and_A_bytereg(regs_iX_l); + return(resGO); + case 0xA6: // AND (IX+dd) + { unsigned char utmp; + utmp = get1(add_u16_disp(regs_IX_OR_IY, fetch())); + and_A_bytereg(utmp); + } + return(resGO); + + case 0xAC: // XOR HX + xor_A_bytereg(regs_iX_h); + return(resGO); + case 0xAD: // XOR LX + xor_A_bytereg(regs_iX_l); + return(resGO); + case 0xAE: // XOR (IX+dd) + { unsigned char utmp; + utmp = get1(add_u16_disp(regs_IX_OR_IY, fetch())); + xor_A_bytereg(utmp); + } + return(resGO); + + case 0xB4: // OR HX + or_A_bytereg(regs_iX_h); + return(resGO); + case 0xB5: // OR LX + or_A_bytereg(regs_iX_l); + return(resGO); + case 0xB6: // OR (IX+dd) + { unsigned char utmp; + utmp = get1(add_u16_disp(regs_IX_OR_IY, fetch())); + or_A_bytereg(utmp); + } + return(resGO); + + case 0xBC: // CP HX + cp_bytereg(regs_iX_h); + return(resGO); + case 0xBD: // CP LX + cp_bytereg(regs_iX_l); + return(resGO); + case 0xBE: // CP (IX+dd) + { unsigned char utmp; + utmp = get1(add_u16_disp(regs_IX_OR_IY, fetch())); + cp_bytereg(utmp); + } + return(resGO); + } + return(resINV_INST); +} + +int +cl_z80::inst_Xd(void) +{ + t_mem code; + + if (fetch(&code)) + return(resBREAKPOINT); + + switch (code) + { + case 0x21: // LD IX,nnnn + case 0x22: // LD (nnnn),IX + case 0x26: // LD HX,nn + case 0x2A: // LD IX,(nnnn) + case 0x2E: // LD LX,nn + case 0x36: // LD (IX+dd),nn + case 0x44: // LD B,HX + case 0x45: // LD B,LX + case 0x46: // LD B,(IX+dd) + case 0x4C: // LD C,HX + case 0x4D: // LD C,LX + case 0x4E: // LD C,(IX+dd) + case 0x54: // LD D,HX + case 0x55: // LD D,LX + case 0x56: // LD D,(IX+dd) + case 0x5C: // LD E,H + case 0x5D: // LD E,L + case 0x5E: // LD E,(IX+dd) + case 0x60: // LD HX,B + case 0x61: // LD HX,C + case 0x62: // LD HX,D + case 0x63: // LD HX,E + case 0x64: // LD HX,HX + case 0x66: // LD H,(IX+dd) + case 0x67: // LD HX,A + case 0x68: // LD LX,B + case 0x69: // LD LX,C + case 0x6A: // LD LX,D + case 0x6B: // LD LX,E + case 0x6C: // LD LX,HX + case 0x6D: // LD LX,LX + case 0x6E: // LD L,(IX+dd) + case 0x6F: // LD LX,A + case 0x70: // LD (IX+dd),B + case 0x71: // LD (IX+dd),C + case 0x72: // LD (IX+dd),D + case 0x73: // LD (IX+dd),E + case 0x74: // LD (IX+dd),H + case 0x75: // LD (IX+dd),L + case 0x77: // LD (IX+dd),A + case 0x7C: // LD A,HX + case 0x7D: // LD A,LX + case 0x7E: // LD A,(IX+dd) + case 0xF9: // LD SP,IX + return(inst_Xd_ld(code)); + + case 0x23: // INC IX + case 0x24: // INC HX + case 0x2C: // INC LX + case 0x34: // INC (IX+dd) + return(inst_Xd_inc(code)); + { + t_addr addr; + addr = add_u16_disp(regs_IX_OR_IY,fetch()); + store1(addr, get1(addr)+1); + } + + case 0x09: // ADD IX,BC + case 0x19: // ADD IX,DE + case 0x29: // ADD IX,IX + case 0x39: // ADD IX,SP + case 0x84: // ADD A,HX + case 0x85: // ADD A,LX + case 0x86: // ADD A,(IX) + return(inst_Xd_add(code)); + + case 0x25: // DEC HX + case 0x2B: // DEC IX + case 0x2D: // DEC LX + case 0x35: // DEC (IX+dd) + return(inst_Xd_dec(code)); + + case 0x8C: // ADC A,HX + case 0x8D: // ADC A,LX + case 0x8E: // ADC A,(IX) + case 0x94: // SUB HX + case 0x95: // SUB LX + case 0x96: // SUB (IX+dd) + case 0x9C: // SBC A,HX + case 0x9D: // SBC A,LX + case 0x9E: // SBC A,(IX+dd) + case 0xA4: // AND HX + case 0xA5: // AND LX + case 0xA6: // AND (IX+dd) + case 0xAC: // XOR HX + case 0xAD: // XOR LX + case 0xAE: // XOR (IX+dd) + case 0xB4: // OR HX + case 0xB5: // OR LX + case 0xB6: // OR (IX+dd) + case 0xBC: // CP HX + case 0xBD: // CP LX + case 0xBE: // CP (IX+dd) + return(inst_Xd_misc(code)); + break; + + case 0xCB: // escape, IX prefix to CB commands + return(inst_Xdcb()); /* see inst_ddcb.cc */ + break; + + case 0xE1: // POP IX + regs_IX_OR_IY = get2(regs.SP); + regs.SP+=2; + return(resGO); + + case 0xE3: // EX (SP),IX + { + TYPE_UWORD tempw; + + tempw = regs_IX_OR_IY; + regs_IX_OR_IY = get2(regs.SP); + store2(regs.SP, tempw); + } + return(resGO); + + case 0xE5: // PUSH IX + push2(regs_IX_OR_IY); + return(resGO); + + case 0xE9: // JP (IX) + PC = regs_IX_OR_IY; + return(resGO); + + default: + return(resINV_INST); + } + return(resINV_INST); +} + +/* End of z80.src/inst_xd.cc */ diff --git a/sim/ucsim/z80.src/inst_xxcb.cc b/sim/ucsim/z80.src/inst_xxcb.cc new file mode 100644 index 0000000..0b979b1 --- /dev/null +++ b/sim/ucsim/z80.src/inst_xxcb.cc @@ -0,0 +1,695 @@ +/* + * Simulator of microcontrollers (inst_xxcb.cc) + * DD CB or FD CB escaped multi-byte opcodes for Z80. + * + * This module gets pulled in and pre-processed to create + * two modules. DD CB prefixed opcodes reference + * IX register, while FD CB prefixes reference IY register. + * See inst_ddcb.cc and inst_fdcb.cc + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +static unsigned char n_offset; + +int +cl_z80::inst_XXcb_rlc(t_mem code) +{ + unsigned char tmp; + unsigned short addr; + + addr = add_u16_disp(regs_IX_OR_IY, n_offset); + tmp = get1(addr); + rlc_byte(tmp); + + switch(code) { + case 0x00: // RLC B + regs.bc.h = tmp; + break; + case 0x01: // RLC C + regs.bc.l = tmp; + break; + case 0x02: // RLC D + regs.de.h = tmp; + break; + case 0x03: // RLC E + regs.de.l = tmp; + break; + case 0x04: // RLC H + regs.hl.h = tmp; + break; + case 0x05: // RLC L + regs.hl.l = tmp; + break; + case 0x06: // RLC (HL) + break; + case 0x07: // RLC A + regs.A = tmp; + break; + default: + return(resINV_INST); + break; + } + store1(addr, tmp); + + return(resGO); +} + +int +cl_z80::inst_XXcb_rrc(t_mem code) +{ + unsigned char tmp; + unsigned short addr; + addr = add_u16_disp(regs_IX_OR_IY, n_offset); + tmp = get1(addr); + rrc_byte(tmp); + + switch(code) { + case 0x08: // RRC B + regs.bc.h = tmp; + break; + case 0x09: // RRC C + regs.bc.l = tmp; + break; + case 0x0A: // RRC D + regs.de.h = tmp; + break; + case 0x0B: // RRC E + regs.de.l = tmp; + break; + case 0x0C: // RRC H + regs.hl.h = tmp; + break; + case 0x0D: // RRC L + regs.hl.l = tmp; + break; + case 0x0E: // RRC (HL) + break; + case 0x0F: // RRC A + regs.A = tmp; + break; + default: + return(resINV_INST); + break; + } + store1(addr, tmp); + + return(resGO); +} + +int +cl_z80::inst_XXcb_rl(t_mem code) +{ + unsigned char tmp; + unsigned short addr; + addr = add_u16_disp(regs_IX_OR_IY, n_offset); + tmp = get1(addr); + rl_byte(tmp); + + switch(code) { + case 0x10: // RL B + regs.bc.h = tmp; + break; + case 0x11: // RL C + regs.bc.l = tmp; + break; + case 0x12: // RL D + regs.de.h = tmp; + break; + case 0x13: // RL E + regs.de.l = tmp; + break; + case 0x14: // RL H + regs.hl.h = tmp; + break; + case 0x15: // RL L + regs.hl.l = tmp; + break; + case 0x16: // RL (HL) + break; + case 0x17: // RL A + regs.A = tmp; + break; + default: + return(resINV_INST); + break; + } + store1(addr, tmp); + + return(resGO); +} + +int +cl_z80::inst_XXcb_rr(t_mem code) +{ + unsigned char tmp; + unsigned short addr; + addr = add_u16_disp(regs_IX_OR_IY, n_offset); + tmp = get1(addr); + rr_byte(tmp); + + switch(code) { + case 0x18: // RR B + regs.bc.h = tmp; + break; + case 0x19: // RR C + regs.bc.l = tmp; + break; + case 0x1A: // RR D + regs.de.h = tmp; + break; + case 0x1B: // RR E + regs.de.l = tmp; + break; + case 0x1C: // RR H + regs.hl.h = tmp; + break; + case 0x1D: // RR L + regs.hl.l = tmp; + break; + case 0x1E: // RR (HL) + break; + case 0x1F: // RR A + regs.A = tmp; + break; + default: + return(resINV_INST); + break; + } + store1(addr, tmp); + + return(resGO); +} + +int +cl_z80::inst_XXcb_sla(t_mem code) +{ + unsigned char tmp; + unsigned short addr; + addr = add_u16_disp(regs_IX_OR_IY, n_offset); + tmp = get1(addr); + sla_byte(tmp); + + switch(code) { + case 0x20: // SLA B + regs.bc.h = tmp; + break; + case 0x21: // SLA C + regs.bc.l = tmp; + break; + case 0x22: // SLA D + regs.de.h = tmp; + break; + case 0x23: // SLA E + regs.de.l = tmp; + break; + case 0x24: // SLA H + regs.hl.h = tmp; + break; + case 0x25: // SLA L + regs.hl.l = tmp; + break; + case 0x26: // SLA (HL) + break; + case 0x27: // SLA A + regs.A = tmp; + break; + default: + return(resINV_INST); + break; + } + store1(addr, tmp); + return(resGO); +} + +int +cl_z80::inst_XXcb_sra(t_mem code) +{ + unsigned char tmp; + unsigned short addr; + addr = add_u16_disp(regs_IX_OR_IY, n_offset); + tmp = get1(addr); + sra_byte(tmp); + + switch(code) { + case 0x28: // SRA B + regs.bc.h = tmp; + break; + case 0x29: // SRA C + regs.bc.l = tmp; + break; + case 0x2A: // SRA D + regs.de.h = tmp; + break; + case 0x2B: // SRA E + regs.de.l = tmp; + break; + case 0x2C: // SRA H + regs.hl.h = tmp; + break; + case 0x2D: // SRA L + regs.hl.l = tmp; + break; + case 0x2E: // SRA (HL) + break; + case 0x2F: // SRA A + regs.A = tmp; + break; + default: + return(resINV_INST); + break; + } + store1(addr, tmp); + return(resGO); +} + +int +cl_z80::inst_XXcb_slia(t_mem code) +{ + unsigned char tmp; + unsigned short addr; + addr = add_u16_disp(regs_IX_OR_IY, n_offset); + tmp = get1(addr); + slia_byte(tmp); + + switch(code) { + case 0x30: // SLIA B (Shift Left Inverted Arithmetic) + regs.bc.h = tmp; + break; + case 0x31: // SLIA C like SLA, but shifts in a 1 bit + regs.bc.l = tmp; + break; + case 0x32: // SLIA D + regs.de.h = tmp; + break; + case 0x33: // SLIA E + regs.de.l = tmp; + break; + case 0x34: // SLIA H + regs.hl.h = tmp; + break; + case 0x35: // SLIA L + regs.hl.l = tmp; + break; + case 0x36: // SLIA (HL) + break; + case 0x37: // SLIA A + regs.A = tmp; + break; + default: + return(resINV_INST); + break; + } + store1(addr, tmp); + return(resGO); +} + +int +cl_z80::inst_XXcb_srl(t_mem code) +{ + unsigned char tmp; + unsigned short addr; + addr = add_u16_disp(regs_IX_OR_IY, n_offset); + tmp = get1(addr); + srl_byte(tmp); + + switch(code) { + case 0x38: // SRL B + regs.bc.h = tmp; + break; + case 0x39: // SRL C + regs.bc.l = tmp; + break; + case 0x3A: // SRL D + regs.de.h = tmp; + break; + case 0x3B: // SRL E + regs.de.l = tmp; + break; + case 0x3C: // SRL H + regs.hl.h = tmp; + break; + case 0x3D: // SRL L + regs.hl.l = tmp; + break; + case 0x3E: // SRL (HL) + break; + case 0x3F: // SRL A + regs.A = tmp; + break; + default: + return(resINV_INST); + break; + } + store1(addr, tmp); + return(resGO); +} + + +int +cl_z80::inst_XXcb_bit(t_mem code) +{ + unsigned char tmp; + unsigned short addr; + +#define bit_bitnum ((code >> 3) & 7) + + addr = add_u16_disp(regs_IX_OR_IY, n_offset); + tmp = get1(addr); + bit_byte(tmp, bit_bitnum); + + store1(addr, tmp); + + return(resGO); +} + +int +cl_z80::inst_XXcb_res(t_mem code) +{ + unsigned char tmp; + unsigned short addr; + +#define bit_bitnum ((code >> 3) & 7) + + addr = add_u16_disp(regs_IX_OR_IY, n_offset); + tmp = get1(addr); + tmp &= ~(1 << bit_bitnum); + + switch(code & 0x7) { + case 0x0: // RES x,B + regs.bc.h = tmp; break; + case 0x1: // RES x,C + regs.bc.l = tmp; break; + case 0x2: // RES x,D + regs.de.h = tmp; break; + case 0x3: // RES x,E + regs.de.l = tmp; break; + case 0x4: // RES x,H + regs.hl.h = tmp; break; + case 0x5: // RES x,L + regs.hl.l = tmp; break; + case 0x6: // RES x,(HL) + break; + case 0x7: // RES x,A + regs.A = tmp; + break; + } + store1(addr, tmp); + return(resGO); +} + +int +cl_z80::inst_XXcb_set(t_mem code) +{ + unsigned char tmp; + unsigned short addr; + +#define bit_bitnum ((code >> 3) & 7) + + addr = add_u16_disp(regs_IX_OR_IY, n_offset); + tmp = get1(addr); + tmp |= (1 << bit_bitnum); + + switch(code) { + case 0x0: // SET x,B + regs.bc.h = tmp; break; + case 0x1: // SET x,C + regs.bc.l = tmp; break; + case 0x2: // SET x,D + regs.de.h = tmp; break; + case 0x3: // SET x,E + regs.de.l = tmp; break; + case 0x4: // SET x,H + regs.de.h = tmp; break; + case 0x5: // SET x,L + regs.de.h = tmp; break; + case 0x6: // SET x,(IX+dd) + break; + case 0x7: // SET x,A + regs.de.h = tmp; break; + break; + default: + return(resINV_INST); + break; + } + store1(addr, tmp); + return(resGO); +} + +/******** start CB codes *****************/ +int +cl_z80::inst_XXcb(void) +{ + t_mem code; + + // all DD CB escaped opcodes have a 3rd byte which is a displacement, + // 4th byte is opcode extension. + n_offset = fetch(); + + if (fetch(&code)) + return(resBREAKPOINT); + tick(1); + switch (code) + { + case 0x00: // RLC B + case 0x01: // RLC C + case 0x02: // RLC D + case 0x03: // RLC E + case 0x04: // RLC H + case 0x05: // RLC L + case 0x06: // RLC (HL) + case 0x07: // RLC A + return (inst_XXcb_rlc(code)); + case 0x08: // RRC B + case 0x09: // RRC C + case 0x0A: // RRC D + case 0x0B: // RRC E + case 0x0C: // RRC H + case 0x0D: // RRC L + case 0x0E: // RRC (HL) + case 0x0F: // RRC A + return (inst_XXcb_rrc(code)); + case 0x10: // RL B + case 0x11: // RL C + case 0x12: // RL D + case 0x13: // RL E + case 0x14: // RL H + case 0x15: // RL L + case 0x16: // RL (HL) + case 0x17: // RL A + return (inst_XXcb_rl(code)); + case 0x18: // RR B + case 0x19: // RR C + case 0x1A: // RR D + case 0x1B: // RR E + case 0x1C: // RR H + case 0x1D: // RR L + case 0x1E: // RR (HL) + case 0x1F: // RR A + return (inst_XXcb_rr(code)); + case 0x20: // SLA B + case 0x21: // SLA C + case 0x22: // SLA D + case 0x23: // SLA E + case 0x24: // SLA H + case 0x25: // SLA L + case 0x26: // SLA (HL) + case 0x27: // SLA A + return (inst_XXcb_sla(code)); + case 0x28: // SRA B + case 0x29: // SRA C + case 0x2A: // SRA D + case 0x2B: // SRA E + case 0x2C: // SRA H + case 0x2D: // SRA L + case 0x2E: // SRA (HL) + case 0x2F: // SRA A + return (inst_XXcb_sra(code)); + case 0x30: // SLIA B (Shift Left Inverted Arithmetic) + case 0x31: // SLIA C like SLA, but shifts in a 1 bit + case 0x32: // SLIA D + case 0x33: // SLIA E + case 0x34: // SLIA H + case 0x35: // SLIA L + case 0x36: // SLIA (HL) + case 0x37: // SLIA A + return (inst_XXcb_slia(code)); + case 0x38: // SRL B + case 0x39: // SRL C + case 0x3A: // SRL D + case 0x3B: // SRL E + case 0x3C: // SRL H + case 0x3D: // SRL L + case 0x3E: // SRL (HL) + case 0x3F: // SRL A + return (inst_XXcb_srl(code)); + case 0x46: // BIT 0,(HL) + case 0x4E: // BIT 1,(HL) + case 0x56: // BIT 2,(HL) + case 0x5E: // BIT 3,(HL) + case 0x66: // BIT 4,(HL) + case 0x6E: // BIT 5,(HL) + case 0x76: // BIT 6,(HL) + case 0x7E: // BIT 7,(HL) + return (inst_XXcb_bit(code)); + case 0x80: // RES 0,B + case 0x81: // RES 0,C + case 0x82: // RES 0,D + case 0x83: // RES 0,E + case 0x84: // RES 0,H + case 0x85: // RES 0,L + case 0x86: // RES 0,(HL) + case 0x87: // RES 0,A + case 0x88: // RES 1,B + case 0x89: // RES 1,C + case 0x8A: // RES 1,D + case 0x8B: // RES 1,E + case 0x8C: // RES 1,H + case 0x8D: // RES 1,L + case 0x8E: // RES 1,(HL) + case 0x8F: // RES 1,A + case 0x90: // RES 2,B + case 0x91: // RES 2,C + case 0x92: // RES 2,D + case 0x93: // RES 2,E + case 0x94: // RES 2,H + case 0x95: // RES 2,L + case 0x96: // RES 2,(HL) + case 0x97: // RES 2,A + case 0x98: // RES 3,B + case 0x99: // RES 3,C + case 0x9A: // RES 3,D + case 0x9B: // RES 3,E + case 0x9C: // RES 3,H + case 0x9D: // RES 3,L + case 0x9E: // RES 3,(HL) + case 0x9F: // RES 3,A + case 0xA0: // RES 4,B + case 0xA1: // RES 4,C + case 0xA2: // RES 4,D + case 0xA3: // RES 4,E + case 0xA4: // RES 4,H + case 0xA5: // RES 4,L + case 0xA6: // RES 4,(HL) + case 0xA7: // RES 4,A + case 0xA8: // RES 5,B + case 0xA9: // RES 5,C + case 0xAA: // RES 5,D + case 0xAB: // RES 5,E + case 0xAC: // RES 5,H + case 0xAD: // RES 5,L + case 0xAE: // RES 5,(HL) + case 0xAF: // RES 5,A + case 0xB0: // RES 6,B + case 0xB1: // RES 6,C + case 0xB2: // RES 6,D + case 0xB3: // RES 6,E + case 0xB4: // RES 6,H + case 0xB5: // RES 6,L + case 0xB6: // RES 6,(HL) + case 0xB7: // RES 6,A + case 0xB8: // RES 7,B + case 0xB9: // RES 7,C + case 0xBA: // RES 7,D + case 0xBB: // RES 7,E + case 0xBC: // RES 7,H + case 0xBD: // RES 7,L + case 0xBE: // RES 7,(HL) + case 0xBF: // RES 7,A + return (inst_XXcb_res(code)); + case 0xC0: // SET 0,B + case 0xC1: // SET 0,C + case 0xC2: // SET 0,D + case 0xC3: // SET 0,E + case 0xC4: // SET 0,H + case 0xC5: // SET 0,L + case 0xC6: // SET 0,(HL) + case 0xC7: // SET 0,A + case 0xC8: // SET 1,B + case 0xC9: // SET 1,C + case 0xCA: // SET 1,D + case 0xCB: // SET 1,E + case 0xCC: // SET 1,H + case 0xCD: // SET 1,L + case 0xCE: // SET 1,(HL) + case 0xCF: // SET 1,A + case 0xD0: // SET 2,B + case 0xD1: // SET 2,C + case 0xD2: // SET 2,D + case 0xD3: // SET 2,E + case 0xD4: // SET 2,H + case 0xD5: // SET 2,L + case 0xD6: // SET 2,(HL) + case 0xD7: // SET 2,A + case 0xD8: // SET 3,B + case 0xD9: // SET 3,C + case 0xDA: // SET 3,D + case 0xDB: // SET 3,E + case 0xDC: // SET 3,H + case 0xDD: // SET 3,L + case 0xDE: // SET 3,(HL) + case 0xDF: // SET 3,A + case 0xE0: // SET 4,B + case 0xE1: // SET 4,C + case 0xE2: // SET 4,D + case 0xE3: // SET 4,E + case 0xE4: // SET 4,H + case 0xE5: // SET 4,L + case 0xE6: // SET 4,(HL) + case 0xE7: // SET 4,A + case 0xE8: // SET 5,B + case 0xE9: // SET 5,C + case 0xEA: // SET 5,D + case 0xEB: // SET 5,E + case 0xEC: // SET 5,H + case 0xED: // SET 5,L + case 0xEE: // SET 5,(HL) + case 0xEF: // SET 5,A + case 0xF0: // SET 6,B + case 0xF1: // SET 6,C + case 0xF2: // SET 6,D + case 0xF3: // SET 6,E + case 0xF4: // SET 6,H + case 0xF5: // SET 6,L + case 0xF6: // SET 6,(HL) + case 0xF7: // SET 6,A + case 0xF8: // SET 7,B + case 0xF9: // SET 7,C + case 0xFA: // SET 7,D + case 0xFB: // SET 7,E + case 0xFC: // SET 7,H + case 0xFD: // SET 7,L + case 0xFE: // SET 7,(HL) + case 0xFF: // SET 7,A + return (inst_XXcb_set(code)); + } + /*if (PC) + PC--; + else + PC= get_mem_size(MEM_ROM_ID)-1;*/ + PC= rom->inc_address(PC, -1); + return(resINV_INST); +} + +/* End of z80.src/inst_xxcb.cc */ diff --git a/sim/ucsim/z80.src/instcl.h b/sim/ucsim/z80.src/instcl.h new file mode 100644 index 0000000..074ca41 --- /dev/null +++ b/sim/ucsim/z80.src/instcl.h @@ -0,0 +1,97 @@ +/* avr.src/instcl.h */ + + virtual int inst_nop(t_mem code); + virtual int inst_ld(t_mem code); + virtual int inst_inc(t_mem code); + virtual int inst_dec(t_mem code); + virtual int inst_rlca(t_mem code); + virtual int inst_rrca(t_mem code); + virtual int inst_ex(t_mem code); + virtual int inst_add(t_mem code); + virtual int inst_djnz(t_mem code); + virtual int inst_jr(t_mem code); + virtual int inst_rla(t_mem code); + virtual int inst_rra(t_mem code); + virtual int inst_daa(t_mem code); + virtual int inst_cpl(t_mem code); + virtual int inst_scf(t_mem code); + virtual int inst_ccf(t_mem code); + virtual int inst_halt(t_mem code); + virtual int inst_adc(t_mem code); + virtual int inst_sbc(t_mem code); + virtual int inst_and(t_mem code); + virtual int inst_xor(t_mem code); + virtual int inst_or(t_mem code); + virtual int inst_cp(t_mem code); + virtual int inst_rst(t_mem code); + virtual int inst_ret(t_mem code); + virtual int inst_call(t_mem code); + virtual int inst_out(t_mem code); + virtual int inst_push(t_mem code); + virtual int inst_exx(t_mem code); + virtual int inst_in(t_mem code); + virtual int inst_sub(t_mem code); + virtual int inst_pop(t_mem code); + virtual int inst_jp(t_mem code); + virtual int inst_di(t_mem code); + virtual int inst_ei(t_mem code); + + virtual int inst_fd(void); + virtual int inst_fd_ld(t_mem code); + virtual int inst_fd_add(t_mem code); + virtual int inst_fd_push(t_mem code); + virtual int inst_fd_inc(t_mem code); + virtual int inst_fd_dec(t_mem code); + virtual int inst_fd_misc(t_mem code); + + virtual int inst_dd(void); + virtual int inst_dd_ld(t_mem code); + virtual int inst_dd_add(t_mem code); + virtual int inst_dd_push(t_mem code); + virtual int inst_dd_inc(t_mem code); + virtual int inst_dd_dec(t_mem code); + virtual int inst_dd_misc(t_mem code); + + virtual int inst_ed(void); + virtual int inst_ed_(t_mem code); + + virtual int inst_cb(void); + virtual int inst_cb_rlc(t_mem code); + virtual int inst_cb_rrc(t_mem code); + virtual int inst_cb_rl(t_mem code); + virtual int inst_cb_rr(t_mem code); + virtual int inst_cb_sla(t_mem code); + virtual int inst_cb_sra(t_mem code); + virtual int inst_cb_slia(t_mem code); + virtual int inst_cb_srl(t_mem code); + virtual int inst_cb_bit(t_mem code); + virtual int inst_cb_res(t_mem code); + virtual int inst_cb_set(t_mem code); + + virtual int inst_ddcb(void); + virtual int inst_ddcb_rlc(t_mem code); + virtual int inst_ddcb_rrc(t_mem code); + virtual int inst_ddcb_rl(t_mem code); + virtual int inst_ddcb_rr(t_mem code); + virtual int inst_ddcb_sla(t_mem code); + virtual int inst_ddcb_sra(t_mem code); + virtual int inst_ddcb_slia(t_mem code); + virtual int inst_ddcb_srl(t_mem code); + virtual int inst_ddcb_bit(t_mem code); + virtual int inst_ddcb_res(t_mem code); + virtual int inst_ddcb_set(t_mem code); + + virtual int inst_fdcb(void); + virtual int inst_fdcb_rlc(t_mem code); + virtual int inst_fdcb_rrc(t_mem code); + virtual int inst_fdcb_rl(t_mem code); + virtual int inst_fdcb_rr(t_mem code); + virtual int inst_fdcb_sla(t_mem code); + virtual int inst_fdcb_sra(t_mem code); + virtual int inst_fdcb_slia(t_mem code); + virtual int inst_fdcb_srl(t_mem code); + virtual int inst_fdcb_bit(t_mem code); + virtual int inst_fdcb_res(t_mem code); + virtual int inst_fdcb_set(t_mem code); + +/* End of avr.src/instcl.h */ diff --git a/sim/ucsim/z80.src/regsz80.h b/sim/ucsim/z80.src/regsz80.h new file mode 100644 index 0000000..7f85f83 --- /dev/null +++ b/sim/ucsim/z80.src/regsz80.h @@ -0,0 +1,90 @@ +/* + * Simulator of microcontrollers (regsz80.h) + * + * some z80 code base from Karl Bongers karl@turbobit.com + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef REGSZ80_HEADER +#define REGSZ80_HEADER + +#include "ddconfig.h" + + +struct t_regpair +{ +#ifdef WORDS_BIGENDIAN + TYPE_UBYTE h; + TYPE_UBYTE l; +#else + TYPE_UBYTE l; + TYPE_UBYTE h; +#endif +}; + +#define DEF_REGPAIR(BIGNAME,smallname) \ + union { \ + TYPE_UWORD BIGNAME; \ + struct t_regpair smallname; \ + } + +struct t_regs +{ + TYPE_UBYTE A; + TYPE_UBYTE F; + DEF_REGPAIR(BC, bc); + DEF_REGPAIR(DE, de); + DEF_REGPAIR(HL, hl); + DEF_REGPAIR(IX, ix); + DEF_REGPAIR(IY, iy); + TYPE_UWORD SP; + /* there are alternate AF,BC,DE,HL register sets, and a few instructions + that swap one for the other */ + TYPE_UBYTE aA; + TYPE_UBYTE aF; + DEF_REGPAIR(aBC, a_bc); + DEF_REGPAIR(aDE, a_de); + DEF_REGPAIR(aHL, a_hl); + TYPE_UBYTE iv; /* interrupt vector, see ed 47 ld A,IV.. */ +}; + +#define BIT_C 0x01 // carry status(out of bit 7) +#define BIT_N 0x02 // Not addition: subtract status(1 after subtract). +#define BIT_P 0x04 // parity/overflow, 1=even, 0=odd parity. arith:1=overflow +#define BIT_A 0x10 // aux carry status(out of bit 3) +#define BIT_Z 0x40 // zero status, 1=zero, 0=nonzero +#define BIT_S 0x80 // sign status(value of bit 7) +#define BIT_ALL (BIT_C |BIT_N |BIT_P |BIT_A |BIT_Z |BIT_S) // all bits + +#define BITPOS_C 0 // 1 +#define BITPOS_SUB 1 // 2H +#define BITPOS_P 2 // 4H +#define BITPOS_A 4 // 10H +#define BITPOS_Z 6 // 40H +#define BITPOS_S 7 // 80H + +#endif + +/* End of z80.src/regsz80.h */ diff --git a/sim/ucsim/z80.src/simz80.cc b/sim/ucsim/z80.src/simz80.cc new file mode 100644 index 0000000..14f89cf --- /dev/null +++ b/sim/ucsim/z80.src/simz80.cc @@ -0,0 +1,45 @@ +/* + * Simulator of microcontrollers (simz80.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + + +// local +#include "simz80cl.h" +#include "z80cl.h" + + +cl_simz80::cl_simz80(class cl_app *the_app): + cl_sim(the_app) +{} + +class cl_uc * +cl_simz80::mk_controller(void) +{ + return(new cl_z80(this)); +} + + +/* End of z80.src/simz80.cc */ diff --git a/sim/ucsim/z80.src/simz80cl.h b/sim/ucsim/z80.src/simz80cl.h new file mode 100644 index 0000000..d9b7ea1 --- /dev/null +++ b/sim/ucsim/z80.src/simz80cl.h @@ -0,0 +1,45 @@ +/* + * Simulator of microcontrollers (simz80cl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef SIMZ80CL_HEADER +#define SIMZ80CL_HEADER + +#include "simcl.h" + + +class cl_simz80: public cl_sim +{ +public: + cl_simz80(class cl_app *the_app); + + virtual class cl_uc *mk_controller(void); +}; + + +#endif + +/* End of z80.src/simz80cl.h */ diff --git a/sim/ucsim/z80.src/sz80.cc b/sim/ucsim/z80.src/sz80.cc new file mode 100644 index 0000000..dec9bf3 --- /dev/null +++ b/sim/ucsim/z80.src/sz80.cc @@ -0,0 +1,54 @@ +/* + * Simulator of microcontrollers (sz80.cc) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +// prj +#include "globals.h" + +// sim.src +#include "appcl.h" + +// local +#include "simz80cl.h" + + +int +main(int argc, char *argv[]) +{ + class cl_sim *sim; + + application= new cl_app(); + application->init(argc, argv); + sim= new cl_simz80(application); + sim->init(); + application->set_simulator(sim); + application->run(); + delete application; + return(0); +} + + +/* End of z80.src/sz80.cc */ diff --git a/sim/ucsim/z80.src/z80.cc b/sim/ucsim/z80.src/z80.cc new file mode 100644 index 0000000..a13a6bb --- /dev/null +++ b/sim/ucsim/z80.src/z80.cc @@ -0,0 +1,627 @@ +/* + * Simulator of microcontrollers (z80.cc) + * + * some z80 code base from Karl Bongers karl@turbobit.com + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#include "ddconfig.h" + +#include /* for va_list */ +#include +#include +#include +#include "i_string.h" + +// prj +#include "pobjcl.h" + +// sim +#include "simcl.h" + +// local +#include "z80cl.h" +#include "glob.h" +#include "regsz80.h" + +#define uint32 t_addr +#define uint8 unsigned char + +/*******************************************************************/ + + +/* + * Base type of Z80 controllers + */ + +cl_z80::cl_z80(class cl_sim *asim): + cl_uc(asim) +{ + type= CPU_Z80; +} + +int +cl_z80::init(void) +{ + cl_uc::init(); /* Memories now exist */ + + rom= address_space(MEM_ROM_ID); +// ram= mem(MEM_XRAM); + ram= rom; + + // zero out ram(this is assumed in regression tests) + for (int i=0x8000; i<0x10000; i++) { + ram->set((t_addr) i, 0); + } + + return(0); +} + +const char * +cl_z80::id_string(void) +{ + return("unspecified Z80"); +} + + +/* + * Making elements of the controller + */ +/* +t_addr +cl_z80::get_mem_size(enum mem_class type) +{ + switch(type) + { + case MEM_ROM: return(0x10000); + case MEM_XRAM: return(0x10000); + default: return(0); + } + return(cl_uc::get_mem_size(type)); +} +*/ + +void +cl_z80::mk_hw_elements(void) +{ + //class cl_base *o; + /* t_uc::mk_hw() does nothing */ +} + +void +cl_z80::make_memories(void) +{ + class cl_address_space *as; + + as= new cl_address_space("rom", 0, 0x10000, 8); + as->init(); + address_spaces->add(as); + + class cl_address_decoder *ad; + class cl_memory_chip *chip; + + chip= new cl_memory_chip("rom_chip", 0x10000, 8); + chip->init(); + memchips->add(chip); + ad= new cl_address_decoder(as= address_space("rom"), chip, 0, 0xffff, 0); + ad->init(); + as->decoders->add(ad); + ad->activate(0); +} + + +/* + * Help command interpreter + */ + +struct dis_entry * +cl_z80::dis_tbl(void) +{ + return(disass_z80); +} + +/*struct name_entry * +cl_z80::sfr_tbl(void) +{ + return(0); +}*/ + +/*struct name_entry * +cl_z80::bit_tbl(void) +{ + //FIXME + return(0); +}*/ + +int +cl_z80::inst_length(t_addr addr) +{ + int len = 0; + + get_disasm_info(addr, &len, NULL, NULL); + + return len; +} + +int +cl_z80::inst_branch(t_addr addr) +{ + int b; + + get_disasm_info(addr, NULL, &b, NULL); + + return b; +} + +int +cl_z80::longest_inst(void) +{ + return 4; +} + + +const char * +cl_z80::get_disasm_info(t_addr addr, + int *ret_len, + int *ret_branch, + int *immed_offset) +{ + const char *b = NULL; + uint code; + int len = 0; + int immed_n = 0; + int i; + int start_addr = addr; + struct dis_entry *dis_e; + + code= get_mem(MEM_ROM_ID, addr++); + dis_e = NULL; + + switch(code) { + case 0xcb: /* ESC code to lots of op-codes, all 2-byte */ + code= get_mem(MEM_ROM_ID, addr++); + i= 0; + while ((code & disass_z80_cb[i].mask) != disass_z80_cb[i].code && + disass_z80_cb[i].mnemonic) + i++; + dis_e = &disass_z80_cb[i]; + b= disass_z80_cb[i].mnemonic; + if (b != NULL) + len += (disass_z80_cb[i].length + 1); + break; + + case 0xed: /* ESC code to about 80 opcodes of various lengths */ + code= get_mem(MEM_ROM_ID, addr++); + i= 0; + while ((code & disass_z80_ed[i].mask) != disass_z80_ed[i].code && + disass_z80_ed[i].mnemonic) + i++; + dis_e = &disass_z80_ed[i]; + b= disass_z80_ed[i].mnemonic; + if (b != NULL) + len += (disass_z80_ed[i].length + 1); + break; + + case 0xdd: /* ESC codes,about 284, vary lengths, IX centric */ + code= get_mem(MEM_ROM_ID, addr++); + if (code == 0xcb) { + immed_n = 2; + addr++; // pass up immed data + code= get_mem(MEM_ROM_ID, addr++); + i= 0; + while ((code & disass_z80_ddcb[i].mask) != disass_z80_ddcb[i].code && + disass_z80_ddcb[i].mnemonic) + i++; + dis_e = &disass_z80_ddcb[i]; + b= disass_z80_ddcb[i].mnemonic; + if (b != NULL) + len += (disass_z80_ddcb[i].length + 2); + } else { + i= 0; + while ((code & disass_z80_dd[i].mask) != disass_z80_dd[i].code && + disass_z80_dd[i].mnemonic) + i++; + dis_e = &disass_z80_dd[i]; + b= disass_z80_dd[i].mnemonic; + if (b != NULL) + len += (disass_z80_dd[i].length + 1); + } + break; + + case 0xfd: /* ESC codes,sme as dd but IY centric */ + code= get_mem(MEM_ROM_ID, addr++); + if (code == 0xcb) { + immed_n = 2; + addr++; // pass up immed data + code= get_mem(MEM_ROM_ID, addr++); + i= 0; + while ((code & disass_z80_fdcb[i].mask) != disass_z80_fdcb[i].code && + disass_z80_fdcb[i].mnemonic) + i++; + dis_e = &disass_z80_fdcb[i]; + b= disass_z80_fdcb[i].mnemonic; + if (b != NULL) + len += (disass_z80_fdcb[i].length + 2); + } else { + i= 0; + while ((code & disass_z80_fd[i].mask) != disass_z80_fd[i].code && + disass_z80_fd[i].mnemonic) + i++; + dis_e = &disass_z80_fd[i]; + b= disass_z80_fd[i].mnemonic; + if (b != NULL) + len += (disass_z80_fd[i].length + 1); + } + break; + + default: + i= 0; + while ((code & disass_z80[i].mask) != disass_z80[i].code && + disass_z80[i].mnemonic) + i++; + dis_e = &disass_z80[i]; + b= disass_z80[i].mnemonic; + if (b != NULL) + len += (disass_z80[i].length); + break; + } + + + if (ret_branch) { + *ret_branch = dis_e->branch; + } + + if (immed_offset) { + if (immed_n > 0) + *immed_offset = immed_n; + else *immed_offset = (addr - start_addr); + } + + if (len == 0) + len = 1; + + if (ret_len) + *ret_len = len; + + return b; +} + +const char * +cl_z80::disass(t_addr addr, const char *sep) +{ + char work[256], temp[20]; + const char *b; + char *buf, *p, *t; + int len = 0; + int immed_offset = 0; + + p= work; + + b = get_disasm_info(addr, &len, NULL, &immed_offset); + + if (b == NULL) { + buf= (char*)malloc(30); + strcpy(buf, "UNKNOWN/INVALID"); + return(buf); + } + + while (*b) + { + if (*b == '%') + { + b++; + switch (*(b++)) + { + case 'd': // d jump relative target, signed? byte immediate operand + sprintf(temp, "#%d", (char)get_mem(MEM_ROM_ID, addr+immed_offset)); + ++immed_offset; + break; + case 'w': // w word immediate operand + sprintf(temp, "#0x%04x", + (uint)((get_mem(MEM_ROM_ID, addr+immed_offset)) | + (get_mem(MEM_ROM_ID, addr+immed_offset+1)<<8)) ); + ++immed_offset; + ++immed_offset; + break; + case 'b': // b byte immediate operand + sprintf(temp, "#0x%02x", (uint)get_mem(MEM_ROM_ID, addr+immed_offset)); + ++immed_offset; + break; + default: + strcpy(temp, "?"); + break; + } + t= temp; + while (*t) + *(p++)= *(t++); + } + else + *(p++)= *(b++); + } + *p= '\0'; + + p= strchr(work, ' '); + if (!p) + { + buf= strdup(work); + return(buf); + } + if (sep == NULL) + buf= (char *)malloc(6+strlen(p)+1); + else + buf= (char *)malloc((p-work)+strlen(sep)+strlen(p)+1); + for (p= work, t= buf; *p != ' '; p++, t++) + *t= *p; + p++; + *t= '\0'; + if (sep == NULL) + { + while (strlen(buf) < 6) + strcat(buf, " "); + } + else + strcat(buf, sep); + strcat(buf, p); + return(buf); +} + + +void +cl_z80::print_regs(class cl_console_base *con) +{ + con->dd_printf("SZ-A--P-C Flags= 0x%02x %3d %c ", + regs.F, regs.F, isprint(regs.F)?regs.F:'.'); + con->dd_printf("A= 0x%02x %3d %c\n", + regs.A, regs.A, isprint(regs.A)?regs.A:'.'); + con->dd_printf("%c%c-%c--%c-%c\n", + (regs.F&BIT_S)?'1':'0', + (regs.F&BIT_Z)?'1':'0', + (regs.F&BIT_A)?'1':'0', + (regs.F&BIT_P)?'1':'0', + (regs.F&BIT_C)?'1':'0'); + con->dd_printf("BC= 0x%04x [BC]= %02x %3d %c ", + regs.BC, ram->get(regs.BC), ram->get(regs.BC), + isprint(ram->get(regs.BC))?ram->get(regs.BC):'.'); + con->dd_printf("DE= 0x%04x [DE]= %02x %3d %c ", + regs.DE, ram->get(regs.DE), ram->get(regs.DE), + isprint(ram->get(regs.DE))?ram->get(regs.DE):'.'); + con->dd_printf("HL= 0x%04x [HL]= %02x %3d %c\n", + regs.HL, ram->get(regs.HL), ram->get(regs.HL), + isprint(ram->get(regs.HL))?ram->get(regs.HL):'.'); + con->dd_printf("IX= 0x%04x [IX]= %02x %3d %c ", + regs.IX, ram->get(regs.IX), ram->get(regs.IX), + isprint(ram->get(regs.IX))?ram->get(regs.IX):'.'); + con->dd_printf("IY= 0x%04x [IY]= %02x %3d %c ", + regs.IY, ram->get(regs.IY), ram->get(regs.IY), + isprint(ram->get(regs.IY))?ram->get(regs.IY):'.'); + con->dd_printf("SP= 0x%04x [SP]= %02x %3d %c\n", + regs.SP, ram->get(regs.SP), ram->get(regs.SP), + isprint(ram->get(regs.SP))?ram->get(regs.SP):'.'); + + print_disass(PC, con); +} + +/* + * Execution + */ + +int +cl_z80::exec_inst(void) +{ + t_mem code; + + if (fetch(&code)) + return(resBREAKPOINT); + tick(1); + switch (code) + { + case 0x00: return(inst_nop(code)); + case 0x01: case 0x02: case 0x06: return(inst_ld(code)); + case 0x03: case 0x04: return(inst_inc(code)); + case 0x05: return(inst_dec(code)); + case 0x07: return(inst_rlca(code)); + + case 0x08: return(inst_ex(code)); + case 0x09: return(inst_add(code)); + case 0x0a: case 0x0e: return(inst_ld(code)); + case 0x0b: case 0x0d: return(inst_dec(code)); + case 0x0c: return(inst_inc(code)); + case 0x0f: return(inst_rrca(code)); + + + case 0x10: return(inst_djnz(code)); + case 0x11: case 0x12: case 0x16: return(inst_ld(code)); + case 0x13: case 0x14: return(inst_inc(code)); + case 0x15: return(inst_dec(code)); + case 0x17: return(inst_rla(code)); + + case 0x18: return(inst_jr(code)); + case 0x19: return(inst_add(code)); + case 0x1a: case 0x1e: return(inst_ld(code)); + case 0x1b: case 0x1d: return(inst_dec(code)); + case 0x1c: return(inst_inc(code)); + case 0x1f: return(inst_rra(code)); + + + case 0x20: return(inst_jr(code)); + case 0x21: case 0x22: case 0x26: return(inst_ld(code)); + case 0x23: case 0x24: return(inst_inc(code)); + case 0x25: return(inst_dec(code)); + case 0x27: return(inst_daa(code)); + + case 0x28: return(inst_jr(code)); + case 0x29: return(inst_add(code)); + case 0x2a: case 0x2e: return(inst_ld(code)); + case 0x2b: case 0x2d: return(inst_dec(code)); + case 0x2c: return(inst_inc(code)); + case 0x2f: return(inst_cpl(code)); + + + case 0x30: return(inst_jr(code)); + case 0x31: case 0x32: case 0x36: return(inst_ld(code)); + case 0x33: case 0x34: return(inst_inc(code)); + case 0x35: return(inst_dec(code)); + case 0x37: return(inst_scf(code)); + + case 0x38: return(inst_jr(code)); + case 0x39: return(inst_add(code)); + case 0x3a: case 0x3e: return(inst_ld(code)); + case 0x3b: case 0x3d: return(inst_dec(code)); + case 0x3c: return(inst_inc(code)); + case 0x3f: return(inst_ccf(code)); + + case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47: + case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f: + return(inst_ld(code)); + + case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57: + case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f: + return(inst_ld(code)); + + case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67: + case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f: + return(inst_ld(code)); + + case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x77: + case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f: + return(inst_ld(code)); + case 0x76: + return(inst_halt(code)); + + case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87: + return(inst_add(code)); + case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f: + return(inst_adc(code)); + + case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97: + return(inst_sub(code)); + case 0x98: case 0x99: case 0x9a: case 0x9b: case 0x9c: case 0x9d: case 0x9e: case 0x9f: + return(inst_sbc(code)); + + case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7: + return(inst_and(code)); + case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf: + return(inst_xor(code)); + + case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7: + return(inst_or(code)); + case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf: + return(inst_cp(code)); + + case 0xc0: return(inst_ret(code)); + case 0xc1: return(inst_pop(code)); + case 0xc2: case 0xc3: return(inst_jp(code)); + case 0xc4: return(inst_call(code)); + case 0xc5: return(inst_push(code)); + case 0xc6: return(inst_add(code)); + case 0xc7: return(inst_rst(code)); + + case 0xc8: case 0xc9: return(inst_ret(code)); + case 0xca: return(inst_jp(code)); + + /* CB escapes out to 2 byte opcodes(CB include), opcodes + to do register bit manipulations */ + case 0xcb: return(inst_cb()); + case 0xcc: case 0xcd: return(inst_call(code)); + case 0xce: return(inst_adc(code)); + case 0xcf: return(inst_rst(code)); + + + case 0xd0: return(inst_ret(code)); + case 0xd1: return(inst_pop(code)); + case 0xd2: return(inst_jp(code)); + case 0xd3: return(inst_out(code)); + case 0xd4: return(inst_call(code)); + case 0xd5: return(inst_push(code)); + case 0xd6: return(inst_sub(code)); + case 0xd7: return(inst_rst(code)); + + case 0xd8: return(inst_ret(code)); + case 0xd9: return(inst_exx(code)); + case 0xda: return(inst_jp(code)); + case 0xdb: return(inst_in(code)); + case 0xdc: return(inst_call(code)); + /* DD escapes out to 2 to 4 byte opcodes(DD included) + with a variety of uses. It can precede the CB escape + sequence to extend CB codes with IX+immed_byte */ + case 0xdd: return(inst_dd()); + case 0xde: return(inst_sbc(code)); + case 0xdf: return(inst_rst(code)); + + + case 0xe0: return(inst_ret(code)); + case 0xe1: return(inst_pop(code)); + case 0xe2: return(inst_jp(code)); + case 0xe3: return(inst_ex(code)); + case 0xe4: return(inst_call(code)); + case 0xe5: return(inst_push(code)); + case 0xe6: return(inst_and(code)); + case 0xe7: return(inst_rst(code)); + + case 0xe8: return(inst_ret(code)); + case 0xe9: return(inst_jp(code)); + case 0xea: return(inst_jp(code)); + case 0xeb: return(inst_ex(code)); + case 0xec: return(inst_call(code)); + /* ED escapes out to misc IN, OUT and other oddball opcodes */ + case 0xed: return(inst_ed()); + case 0xee: return(inst_xor(code)); + case 0xef: return(inst_rst(code)); + + + case 0xf0: return(inst_ret(code)); + case 0xf1: return(inst_pop(code)); + case 0xf2: return(inst_jp(code)); + case 0xf3: return(inst_di(code)); + case 0xf4: return(inst_call(code)); + case 0xf5: return(inst_push(code)); + case 0xf6: return(inst_or(code)); + case 0xf7: return(inst_rst(code)); + + case 0xf8: return(inst_ret(code)); + case 0xf9: return(inst_ld(code)); + case 0xfa: return(inst_jp(code)); + case 0xfb: return(inst_ei(code)); + case 0xfc: return(inst_call(code)); + /* DD escapes out to 2 to 4 byte opcodes(DD included) + with a variety of uses. It can precede the CB escape + sequence to extend CB codes with IX+immed_byte */ + case 0xfd: return(inst_fd()); + case 0xfe: return(inst_cp(code)); + case 0xff: return(inst_rst(code)); + } + + /*if (PC) + PC--; + else + PC= get_mem_size(MEM_ROM_ID)-1;*/ + PC= rom->inc_address(PC, -1); + + sim->stop(resINV_INST); + return(resINV_INST); +} + + +/* End of z80.src/z80.cc */ diff --git a/sim/ucsim/z80.src/z80.txt b/sim/ucsim/z80.src/z80.txt new file mode 100644 index 0000000..4b1be26 --- /dev/null +++ b/sim/ucsim/z80.src/z80.txt @@ -0,0 +1,1402 @@ + +Last week somebody asked for a list of opcodes. +Well, here is mine. Have fun! + +| Herbert Oppmann | email: htoppman@cip.informatik.uni-erlangen.de | +| irc: mtx | mail: Drausnickstrasse 29, D-8520 Erlangen | + +------------ 8< ---------- 8< --------------- +8080/Z80/HD64180 opcodes + +Legend: +HX, LX highbyte/lowbyte of IX +HY, LY dito IY + + 8080 subset +* Z80 only +/ "illegal" Z80 ++ HD 64180 (reacts with a trap to illegal Z80 opcodes) + +Hex Instruction Comment (applies to Z80 only) +----------------------------------------------- +00 NOP +01 nnnn LD BC,nnnn +02 LD (BC),A +03 INC BC +04 INC B +05 DEC B +06 nn LD B,nn +07 RLCA +08 * EX AF,AF' +09 ADD HL,BC +0A LD A,(BC) +0B DEC BC +0C INC C +0D DEC C +0E nn LD C,nn +0F RRCA +10 dd * DJNZ dd +11 nnnn LD DE,nnnn +12 LD (DE),A +13 INC DE +14 INC D +15 DEC D +16 nn LD D,nn +17 RLA +18 dd * JR dd +19 ADD HL,DE +1A LD A,(DE) +1B DEC DE +1C INC E +1D DEC E +1E nn LD E,nn +1F RRA +20 dd * JR NZ,dd +21 nnnn LD HL,nnnn +22 nnnn LD (nnnn),HL +23 INC HL +24 INC H +25 DEC H +26 nn LD H,nn +27 DAA +28 dd * JR Z,dd +29 ADD HL,HL +2A nnnn LD HL,(nnnn) +2B DEC HL +2C INC L +2D DEC L +2E nn LD L,nn +2F CPL +30 dd * JR NC,dd +31 nnnn LD SP,nnnn +32 nnnn LD (nnnn),A +33 INC SP +34 INC (HL) +35 DEC (HL) +36 nn LD (HL),nn +37 SCF +38 dd * JR C,dd +39 ADD HL,SP +3A nnnn LD A,(nnnn) +3B DEC SP +3C INC A +3D DEC A +3E nn LD A,nn +3F CCF +40 LD B,B +41 LD B,C +42 LD B,D +43 LD B,E +44 LD B,H +45 LD B,L +46 LD B,(HL) +47 LD B,A +48 LD C,B +49 LD C,C +4A LD C,D +4B LD C,E +4C LD C,H +4D LD C,L +4E LD C,(HL) +4F LD C,A +50 LD D,B +51 LD D,C +52 LD D,D +53 LD D,E +54 LD D,H +55 LD D,L +56 LD D,(HL) +57 LD D,A +58 LD E,B +59 LD E,C +5A LD E,D +5B LD E,E +5C LD E,H +5D LD E,L +5E LD E,(HL) +5F LD E,A +60 LD H,B +61 LD H,C +62 LD H,D +63 LD H,E +64 LD H,H +65 LD H,L +66 LD H,(HL) +67 LD H,A +68 LD L,B +69 LD L,C +6A LD L,D +6B LD L,E +6C LD L,H +6D LD L,L +6E LD L,(HL) +6F LD L,A +70 LD (HL),B +71 LD (HL),C +72 LD (HL),D +73 LD (HL),E +74 LD (HL),H +75 LD (HL),L +76 HALT +77 LD (HL),A +78 LD A,B +79 LD A,C +7A LD A,D +7B LD A,E +7C LD A,H +7D LD A,L +7E LD A,(HL) +7F LD A,A +80 ADD A,B +81 ADD A,C +82 ADD A,D +83 ADD A,E +84 ADD A,H +85 ADD A,L +86 ADD A,(HL) +87 ADD A,A +88 ADC A,B +89 ADC A,C +8A ADC A,D +8B ADC A,E +8C ADC A,H +8D ADC A,L +8E ADC A,(HL) +8F ADC A,A +90 SUB B +91 SUB C +92 SUB D +93 SUB E +94 SUB H +95 SUB L +96 SUB (HL) +97 SUB A +98 SBC A,B +99 SBC A,C +9A SBC A,D +9B SBC A,E +9C SBC A,H +9D SBC A,L +9E SBC A,(HL) +9F SBC A,A +A0 AND B +A1 AND C +A2 AND D +A3 AND E +A4 AND H +A5 AND L +A6 AND (HL) +A7 AND A +A8 XOR B +A9 XOR C +AA XOR D +AB XOR E +AC XOR H +AD XOR L +AE XOR (HL) +AF XOR A +B0 OR B +B1 OR C +B2 OR D +B3 OR E +B4 OR H +B5 OR L +B6 OR (HL) +B7 OR A +B8 CP B +B9 CP C +BA CP D +BB CP E +BC CP H +BD CP L +BE CP (HL) +BF CP A +C0 RET NZ +C1 POP BC +C2 nnnn JP NZ,nnnn +C3 nnnn JP nnnn +C4 nnnn CALL NZ,nnnn +C5 PUSH BC +C6 nn ADD A,nn +C7 RST 0 +C8 RET Z +C9 RET +CA nnnn JP Z,nnnn +CB 00 * RLC B +CB 01 * RLC C +CB 02 * RLC D +CB 03 * RLC E +CB 04 * RLC H +CB 05 * RLC L +CB 06 * RLC (HL) +CB 07 * RLC A +CB 08 * RRC B +CB 09 * RRC C +CB 0A * RRC D +CB 0B * RRC E +CB 0C * RRC H +CB 0D * RRC L +CB 0E * RRC (HL) +CB 0F * RRC A +CB 10 * RL B +CB 11 * RL C +CB 12 * RL D +CB 13 * RL E +CB 14 * RL H +CB 15 * RL L +CB 16 * RL (HL) +CB 17 * RL A +CB 18 * RR B +CB 19 * RR C +CB 1A * RR D +CB 1B * RR E +CB 1C * RR H +CB 1D * RR L +CB 1E * RR (HL) +CB 1F * RR A +CB 20 * SLA B +CB 21 * SLA C +CB 22 * SLA D +CB 23 * SLA E +CB 24 * SLA H +CB 25 * SLA L +CB 26 * SLA (HL) +CB 27 * SLA A +CB 28 * SRA B +CB 29 * SRA C +CB 2A * SRA D +CB 2B * SRA E +CB 2C * SRA H +CB 2D * SRA L +CB 2E * SRA (HL) +CB 2F * SRA A +CB 30 / SLIA B (Shift Left Inverted Arithmetic) +CB 31 / SLIA C like SLA, but shifts in a 1 bit +CB 32 / SLIA D +CB 33 / SLIA E +CB 34 / SLIA H +CB 35 / SLIA L +CB 36 / SLIA (HL) +CB 37 / SLIA A +CB 38 * SRL B +CB 39 * SRL C +CB 3A * SRL D +CB 3B * SRL E +CB 3C * SRL H +CB 3D * SRL L +CB 3E * SRL (HL) +CB 3F * SRL A +CB 40 * BIT 0,B +CB 41 * BIT 0,C +CB 42 * BIT 0,D +CB 43 * BIT 0,E +CB 44 * BIT 0,H +CB 45 * BIT 0,L +CB 46 * BIT 0,(HL) +CB 47 * BIT 0,A +CB 48 * BIT 1,B +CB 49 * BIT 1,C +CB 4A * BIT 1,D +CB 4B * BIT 1,E +CB 4C * BIT 1,H +CB 4D * BIT 1,L +CB 4E * BIT 1,(HL) +CB 4F * BIT 1,A +CB 50 * BIT 2,B +CB 51 * BIT 2,C +CB 52 * BIT 2,D +CB 53 * BIT 2,E +CB 54 * BIT 2,H +CB 55 * BIT 2,L +CB 56 * BIT 2,(HL) +CB 57 * BIT 2,A +CB 58 * BIT 3,B +CB 59 * BIT 3,C +CB 5A * BIT 3,D +CB 5B * BIT 3,E +CB 5C * BIT 3,H +CB 5D * BIT 3,L +CB 5E * BIT 3,(HL) +CB 5F * BIT 3,A +CB 60 * BIT 4,B +CB 61 * BIT 4,C +CB 62 * BIT 4,D +CB 63 * BIT 4,E +CB 64 * BIT 4,H +CB 65 * BIT 4,L +CB 66 * BIT 4,(HL) +CB 67 * BIT 4,A +CB 68 * BIT 5,B +CB 69 * BIT 5,C +CB 6A * BIT 5,D +CB 6B * BIT 5,E +CB 6C * BIT 5,H +CB 6D * BIT 5,L +CB 6E * BIT 5,(HL) +CB 6F * BIT 5,A +CB 70 * BIT 6,B +CB 71 * BIT 6,C +CB 72 * BIT 6,D +CB 73 * BIT 6,E +CB 74 * BIT 6,H +CB 75 * BIT 6,L +CB 76 * BIT 6,(HL) +CB 77 * BIT 6,A +CB 78 * BIT 7,B +CB 79 * BIT 7,C +CB 7A * BIT 7,D +CB 7B * BIT 7,E +CB 7C * BIT 7,H +CB 7D * BIT 7,L +CB 7E * BIT 7,(HL) +CB 7F * BIT 7,A +CB 80 * RES 0,B +CB 81 * RES 0,C +CB 82 * RES 0,D +CB 83 * RES 0,E +CB 84 * RES 0,H +CB 85 * RES 0,L +CB 86 * RES 0,(HL) +CB 87 * RES 0,A +CB 88 * RES 1,B +CB 89 * RES 1,C +CB 8A * RES 1,D +CB 8B * RES 1,E +CB 8C * RES 1,H +CB 8D * RES 1,L +CB 8E * RES 1,(HL) +CB 8F * RES 1,A +CB 90 * RES 2,B +CB 91 * RES 2,C +CB 92 * RES 2,D +CB 93 * RES 2,E +CB 94 * RES 2,H +CB 95 * RES 2,L +CB 96 * RES 2,(HL) +CB 97 * RES 2,A +CB 98 * RES 3,B +CB 99 * RES 3,C +CB 9A * RES 3,D +CB 9B * RES 3,E +CB 9C * RES 3,H +CB 9D * RES 3,L +CB 9E * RES 3,(HL) +CB 9F * RES 3,A +CB A0 * RES 4,B +CB A1 * RES 4,C +CB A2 * RES 4,D +CB A3 * RES 4,E +CB A4 * RES 4,H +CB A5 * RES 4,L +CB A6 * RES 4,(HL) +CB A7 * RES 4,A +CB A8 * RES 5,B +CB A9 * RES 5,C +CB AA * RES 5,D +CB AB * RES 5,E +CB AC * RES 5,H +CB AD * RES 5,L +CB AE * RES 5,(HL) +CB AF * RES 5,A +CB B0 * RES 6,B +CB B1 * RES 6,C +CB B2 * RES 6,D +CB B3 * RES 6,E +CB B4 * RES 6,H +CB B5 * RES 6,L +CB B6 * RES 6,(HL) +CB B7 * RES 6,A +CB B8 * RES 7,B +CB B9 * RES 7,C +CB BA * RES 7,D +CB BB * RES 7,E +CB BC * RES 7,H +CB BD * RES 7,L +CB BE * RES 7,(HL) +CB BF * RES 7,A +CB C0 * SET 0,B +CB C1 * SET 0,C +CB C2 * SET 0,D +CB C3 * SET 0,E +CB C4 * SET 0,H +CB C5 * SET 0,L +CB C6 * SET 0,(HL) +CB C7 * SET 0,A +CB C8 * SET 1,B +CB C9 * SET 1,C +CB CA * SET 1,D +CB CB * SET 1,E +CB CC * SET 1,H +CB CD * SET 1,L +CB CE * SET 1,(HL) +CB CF * SET 1,A +CB D0 * SET 2,B +CB D1 * SET 2,C +CB D2 * SET 2,D +CB D3 * SET 2,E +CB D4 * SET 2,H +CB D5 * SET 2,L +CB D6 * SET 2,(HL) +CB D7 * SET 2,A +CB D8 * SET 3,B +CB D9 * SET 3,C +CB DA * SET 3,D +CB DB * SET 3,E +CB DC * SET 3,H +CB DD * SET 3,L +CB DE * SET 3,(HL) +CB DF * SET 3,A +CB E0 * SET 4,B +CB E1 * SET 4,C +CB E2 * SET 4,D +CB E3 * SET 4,E +CB E4 * SET 4,H +CB E5 * SET 4,L +CB E6 * SET 4,(HL) +CB E7 * SET 4,A +CB E8 * SET 5,B +CB E9 * SET 5,C +CB EA * SET 5,D +CB EB * SET 5,E +CB EC * SET 5,H +CB ED * SET 5,L +CB EE * SET 5,(HL) +CB EF * SET 5,A +CB F0 * SET 6,B +CB F1 * SET 6,C +CB F2 * SET 6,D +CB F3 * SET 6,E +CB F4 * SET 6,H +CB F5 * SET 6,L +CB F6 * SET 6,(HL) +CB F7 * SET 6,A +CB F8 * SET 7,B +CB F9 * SET 7,C +CB FA * SET 7,D +CB FB * SET 7,E +CB FC * SET 7,H +CB FD * SET 7,L +CB FE * SET 7,(HL) +CB FF * SET 7,A +CC nnnn CALL Z,nnnn +CD nnnn CALL nnnn +CE nn ADC A,nn +CF RST 8 +D0 RET NC +D1 POP DE +D2 nnnn JP NC,nnnn +D3 nn OUT (nn),A +D4 nnnn CALL NC,nnnn +D5 PUSH DE +D6 nn SUB nn +D7 RST 10H +D8 RET C +D9 * EXX +DA nnnn JP C,nnnn +DB nn IN A,(nn) +DC nnnn CALL C,nnnn +All other DD combinations not listed below: + DD is ignored, all following bytes are treated as instructions +DD 09 * ADD IX,BC +DD 19 * ADD IX,DE +DD 21 nnnn * LD IX,nnnn +DD 22 nnnn * LD (nnnn),IX +DD 23 * INC IX +DD 24 / INC HX +DD 25 / DEC HX +DD 26 nn / LD HX,nn +DD 29 * ADD IX,IX +DD 2A nnnn * LD IX,(nnnn) +DD 2B * DEC IX +DD 2C / INC LX +DD 2D / DEC LX +DD 2E nn / LD LX,nn +DD 34 dd * INC (IX+dd) +DD 35 dd * DEC (IX+dd) +DD 36 dd nn * LD (IX+dd),nn +DD 39 * ADD IX,SP +DD 44 / LD B,HX +DD 45 / LD B,LX +DD 46 dd * LD B,(IX+dd) +DD 4C / LD C,HX +DD 4D / LD C,LX +DD 4E dd * LD C,(IX+dd) +DD 54 / LD D,HX +DD 55 / LD D,LX +DD 56 dd * LD D,(IX+dd) +DD 5C / LD E,H +DD 5D / LD E,L +DD 5E dd * LD E,(IX+dd) +DD 60 / LD HX,B +DD 61 / LD HX,C +DD 62 / LD HX,D +DD 63 / LD HX,E +DD 64 / LD HX,HX +DD 65 / LD HX,LX +DD 66 dd * LD H,(IX+dd) +DD 67 / LD HX,A +DD 68 / LD LX,B +DD 69 / LD LX,C +DD 6A / LD LX,D +DD 6B / LD LX,E +DD 6C / LD LX,HX +DD 6D / LD LX,LX +DD 6E dd * LD L,(IX+dd) +DD 6F / LD LX,A +DD 70 dd * LD (IX+dd),B +DD 71 dd * LD (IX+dd),C +DD 72 dd * LD (IX+dd),D +DD 73 dd * LD (IX+dd),E +DD 74 dd * LD (IX+dd),H +DD 75 dd * LD (IX+dd),L +DD 77 dd * LD (IX+dd),A +DD 7C / LD A,HX +DD 7D / LD A,LX +DD 7E dd * LD A,(IX+dd) +DD 84 / ADD A,HX +DD 85 / ADD A,LX +DD 86 dd * ADD A,(IX+dd) /* add +dd, kpb */ +DD 8C / ADC A,HX +DD 8D / ADC A,LX +DD 8E dd * ADC A,(IX+dd) /* add +dd, kpb */ +DD 94 / SUB HX +DD 95 / SUB LX +DD 96 dd * SUB (IX+dd) +DD 9C / SBC A,HX +DD 9D / SBC A,LX +DD 9E dd * SBC A,(IX+dd) +DD A4 / AND HX +DD A5 / AND LX +DD A6 dd * AND (IX+dd) +DD AC / XOR HX +DD AD / XOR LX +DD AE dd * XOR (IX+dd) +DD B4 / OR HX +DD B5 / OR LX +DD B6 dd * OR (IX+dd) +DD BC / CP HX +DD BD / CP LX +DD BE dd * CP (IX+dd) +DD CB dd 00 / RLC (IX+dd)->B result is placed in a register +DD CB dd 01 / RLC (IX+dd)->C additionally +DD CB dd 02 / RLC (IX+dd)->D +DD CB dd 03 / RLC (IX+dd)->E +DD CB dd 04 / RLC (IX+dd)->H +DD CB dd 05 / RLC (IX+dd)->L +DD CB dd 06 * RLC (IX+dd) +DD CB dd 07 / RLC (IX+dd)->A +DD CB dd 08 / RRC (IX+dd)->B +DD CB dd 09 / RRC (IX+dd)->C +DD CB dd 0A / RRC (IX+dd)->D +DD CB dd 0B / RRC (IX+dd)->E +DD CB dd 0C / RRC (IX+dd)->H +DD CB dd 0D / RRC (IX+dd)->L +DD CB dd 0E * RRC (IX+dd) +DD CB dd 0F / RRC (IX+dd)->A +DD CB dd 10 / RL (IX+dd)->B +DD CB dd 11 / RL (IX+dd)->C +DD CB dd 12 / RL (IX+dd)->D +DD CB dd 13 / RL (IX+dd)->E +DD CB dd 14 / RL (IX+dd)->H +DD CB dd 15 / RL (IX+dd)->L +DD CB dd 16 * RL (IX+dd) +DD CB dd 17 / RL (IX+dd)->A +DD CB dd 18 / RR (IX+dd)->B +DD CB dd 19 / RR (IX+dd)->C +DD CB dd 1A / RR (IX+dd)->D +DD CB dd 1B / RR (IX+dd)->E +DD CB dd 1C / RR (IX+dd)->H +DD CB dd 1D / RR (IX+dd)->L +DD CB dd 1E * RR (IX+dd) +DD CB dd 1F / RR (IX+dd)->A +DD CB dd 20 / SLA (IX+dd)->B +DD CB dd 21 / SLA (IX+dd)->C +DD CB dd 22 / SLA (IX+dd)->D +DD CB dd 23 / SLA (IX+dd)->E +DD CB dd 24 / SLA (IX+dd)->H +DD CB dd 25 / SLA (IX+dd)->L +DD CB dd 26 * SLA (IX+dd) +DD CB dd 27 / SLA (IX+dd)->A +DD CB dd 28 / SRA (IX+dd)->B +DD CB dd 29 / SRA (IX+dd)->C +DD CB dd 2A / SRA (IX+dd)->D +DD CB dd 2B / SRA (IX+dd)->E +DD CB dd 2C / SRA (IX+dd)->H +DD CB dd 2D / SRA (IX+dd)->L +DD CB dd 2E * SRA (IX+dd) +DD CB dd 2F / SRA (IX+dd)->A +DD CB dd 30 / SLIA (IX+dd)->B +DD CB dd 31 / SLIA (IX+dd)->C +DD CB dd 32 / SLIA (IX+dd)->D +DD CB dd 33 / SLIA (IX+dd)->E +DD CB dd 34 / SLIA (IX+dd)->H +DD CB dd 35 / SLIA (IX+dd)->L +DD CB dd 36 / SLIA (IX+dd) +DD CB dd 37 / SLIA (IX+dd)->A +DD CB dd 38 / SRL (IX+dd)->B +DD CB dd 39 / SRL (IX+dd)->C +DD CB dd 3A / SRL (IX+dd)->D +DD CB dd 3B / SRL (IX+dd)->E +DD CB dd 3C / SRL (IX+dd)->H +DD CB dd 3D / SRL (IX+dd)->L +DD CB dd 3E * SRL (IX+dd) +DD CB dd 3F / SRL (IX+dd)->A +DD CB dd 46 * BIT 0,(IX+dd) all other BIT combinations +DD CB dd 4E * BIT 1,(IX+dd) react like the documented ones +DD CB dd 56 * BIT 2,(IX+dd) because there is no write +DD CB dd 5E * BIT 3,(IX+dd) +DD CB dd 66 * BIT 4,(IX+dd) +DD CB dd 6E * BIT 5,(IX+dd) +DD CB dd 76 * BIT 6,(IX+dd) +DD CB dd 7E * BIT 7,(IX+dd) +DD CB dd 80 / RES 0,(IX+dd)->B +DD CB dd 81 / RES 0,(IX+dd)->C +DD CB dd 82 / RES 0,(IX+dd)->D +DD CB dd 83 / RES 0,(IX+dd)->E +DD CB dd 84 / RES 0,(IX+dd)->H +DD CB dd 85 / RES 0,(IX+dd)->L +DD CB dd 86 * RES 0,(IX+dd) +DD CB dd 87 / RES 0,(IX+dd)->A +DD CB dd 88 / RES 1,(IX+dd)->B +DD CB dd 89 / RES 1,(IX+dd)->C +DD CB dd 8A / RES 1,(IX+dd)->D +DD CB dd 8B / RES 1,(IX+dd)->E +DD CB dd 8C / RES 1,(IX+dd)->H +DD CB dd 8D / RES 1,(IX+dd)->L +DD CB dd 8E * RES 1,(IX+dd) +DD CB dd 8F / RES 1,(IX+dd)->A +DD CB dd 90 / RES 2,(IX+dd)->B +DD CB dd 91 / RES 2,(IX+dd)->C +DD CB dd 92 / RES 2,(IX+dd)->D +DD CB dd 93 / RES 2,(IX+dd)->E +DD CB dd 94 / RES 2,(IX+dd)->H +DD CB dd 95 / RES 2,(IX+dd)->L +DD CB dd 96 * RES 2,(IX+dd) +DD CB dd 97 / RES 2,(IX+dd)->A +DD CB dd 98 / RES 3,(IX+dd)->B +DD CB dd 99 / RES 3,(IX+dd)->C +DD CB dd 9A / RES 3,(IX+dd)->D +DD CB dd 9B / RES 3,(IX+dd)->E +DD CB dd 9C / RES 3,(IX+dd)->H +DD CB dd 9D / RES 3,(IX+dd)->L +DD CB dd 9E * RES 3,(IX+dd) +DD CB dd 9F / RES 3,(IX+dd)->A +DD CB dd A0 / RES 4,(IX+dd)->B +DD CB dd A1 / RES 4,(IX+dd)->C +DD CB dd A2 / RES 4,(IX+dd)->D +DD CB dd A3 / RES 4,(IX+dd)->E +DD CB dd A4 / RES 4,(IX+dd)->H +DD CB dd A5 / RES 4,(IX+dd)->L +DD CB dd A6 * RES 4,(IX+dd) +DD CB dd A7 / RES 4,(IX+dd)->A +DD CB dd A8 / RES 5,(IX+dd)->B +DD CB dd A9 / RES 5,(IX+dd)->C +DD CB dd AA / RES 5,(IX+dd)->D +DD CB dd AB / RES 5,(IX+dd)->E +DD CB dd AC / RES 5,(IX+dd)->H +DD CB dd AD / RES 5,(IX+dd)->L +DD CB dd AE * RES 5,(IX+dd) +DD CB dd AF / RES 5,(IX+dd)->A +DD CB dd B0 / RES 6,(IX+dd)->B +DD CB dd B1 / RES 6,(IX+dd)->C +DD CB dd B2 / RES 6,(IX+dd)->D +DD CB dd B3 / RES 6,(IX+dd)->E +DD CB dd B4 / RES 6,(IX+dd)->H +DD CB dd B5 / RES 6,(IX+dd)->L +DD CB dd B6 * RES 6,(IX+dd) +DD CB dd B7 / RES 6,(IX+dd)->A +DD CB dd B8 / RES 7,(IX+dd)->B +DD CB dd B9 / RES 7,(IX+dd)->C +DD CB dd BA / RES 7,(IX+dd)->D +DD CB dd BB / RES 7,(IX+dd)->E +DD CB dd BC / RES 7,(IX+dd)->H +DD CB dd BD / RES 7,(IX+dd)->L +DD CB dd BE * RES 7,(IX+dd) +DD CB dd BF / RES 7,(IX+dd)->A +DD CB dd C0 / SET 0,(IX+dd)->B +DD CB dd C1 / SET 0,(IX+dd)->C +DD CB dd C2 / SET 0,(IX+dd)->D +DD CB dd C3 / SET 0,(IX+dd)->E +DD CB dd C4 / SET 0,(IX+dd)->H +DD CB dd C5 / SET 0,(IX+dd)->L +DD CB dd C6 * SET 0,(IX+dd) +DD CB dd C7 / SET 0,(IX+dd)->A +DD CB dd C8 / SET 1,(IX+dd)->B +DD CB dd C9 / SET 1,(IX+dd)->C +DD CB dd CA / SET 1,(IX+dd)->D +DD CB dd CB / SET 1,(IX+dd)->E +DD CB dd CC / SET 1,(IX+dd)->H +DD CB dd CD / SET 1,(IX+dd)->L +DD CB dd CE * SET 1,(IX+dd) +DD CB dd CF / SET 1,(IX+dd)->A +DD CB dd D0 / SET 2,(IX+dd)->B +DD CB dd D1 / SET 2,(IX+dd)->C +DD CB dd D2 / SET 2,(IX+dd)->D +DD CB dd D3 / SET 2,(IX+dd)->E +DD CB dd D4 / SET 2,(IX+dd)->H +DD CB dd D5 / SET 2,(IX+dd)->L +DD CB dd D6 * SET 2,(IX+dd) +DD CB dd D7 / SET 2,(IX+dd)->A +DD CB dd D8 / SET 3,(IX+dd)->B +DD CB dd D9 / SET 3,(IX+dd)->C +DD CB dd DA / SET 3,(IX+dd)->D +DD CB dd DB / SET 3,(IX+dd)->E +DD CB dd DC / SET 3,(IX+dd)->H +DD CB dd DD / SET 3,(IX+dd)->L +DD CB dd DE * SET 3,(IX+dd) +DD CB dd DF / SET 3,(IX+dd)->A +DD CB dd E0 / SET 4,(IX+dd)->B +DD CB dd E1 / SET 4,(IX+dd)->C +DD CB dd E2 / SET 4,(IX+dd)->D +DD CB dd E3 / SET 4,(IX+dd)->E +DD CB dd E4 / SET 4,(IX+dd)->H +DD CB dd E5 / SET 4,(IX+dd)->L +DD CB dd E6 * SET 4,(IX+dd) +DD CB dd E7 / SET 4,(IX+dd)->A +DD CB dd E8 / SET 5,(IX+dd)->B +DD CB dd E9 / SET 5,(IX+dd)->C +DD CB dd EA / SET 5,(IX+dd)->D +DD CB dd EB / SET 5,(IX+dd)->E +DD CB dd EC / SET 5,(IX+dd)->H +DD CB dd ED / SET 5,(IX+dd)->L +DD CB dd EE * SET 5,(IX+dd) +DD CB dd EF / SET 5,(IX+dd)->A +DD CB dd F0 / SET 6,(IX+dd)->B +DD CB dd F1 / SET 6,(IX+dd)->C +DD CB dd F2 / SET 6,(IX+dd)->D +DD CB dd F3 / SET 6,(IX+dd)->E +DD CB dd F4 / SET 6,(IX+dd)->H +DD CB dd F5 / SET 6,(IX+dd)->L +DD CB dd F6 * SET 6,(IX+dd) +DD CB dd F7 / SET 6,(IX+dd)->A +DD CB dd F8 / SET 7,(IX+dd)->B +DD CB dd F9 / SET 7,(IX+dd)->C +DD CB dd FA / SET 7,(IX+dd)->D +DD CB dd FB / SET 7,(IX+dd)->E +DD CB dd FC / SET 7,(IX+dd)->H +DD CB dd FD / SET 7,(IX+dd)->L +DD CB dd FE * SET 7,(IX+dd) +DD CB dd FF / SET 7,(IX+dd)->A +DD E1 * POP IX +DD E3 * EX (SP),IX +DD E5 * PUSH IX +DD E9 * JP (IX) +DD F9 * LD SP,IX +DE nn SBC A,nn +DF RST 18H +E0 RET PO +E1 POP HL +E2 nnnn JP PO,nnnn +E3 EX (SP),HL +E4 nnnn CALL PO,nnnn +E5 PUSH HL +E6 nn AND nn +E7 RST 20H +E8 RET PE +E9 JP (HL) +EA nnnn JP PE,nnnn +EB EX DE,HL +EC nnnn CALL PE,nnnn +All other ED combinations not listed below: + in the range ED40 - ED7F: valid opcodes are mirrored + elsewhere: ED and the next byte is ignored, + all following bytes treated as instructions +ED 00 nn + IN0 B,(nn) +ED 01 nn + OUT0 (nn),B +ED 04 + TST B +ED 08 nn + IN0 C,(nn) +ED 09 nn + OUT0 (nn),C +ED 0C + TST C +ED 10 nn + IN0 D,(nn) +ED 11 nn + OUT0 (nn),D +ED 14 + TST D +ED 18 nn + IN0 E,(nn) +ED 19 nn + OUT0 (nn),E +ED 1C + TST E +ED 20 nn + IN0 H,(nn) +ED 21 nn + OUT0 (nn),H +ED 24 + TST H +ED 28 nn + IN0 L,(nn) +ED 29 nn + OUT0 (nn),L +ED 2C + TST L +ED 30 nn + IN0 (nn) set flags only +ED 34 + TST (HL) +ED 38 nn + IN0 A,(nn) +ED 39 nn + OUT0 (nn),A +ED 3C + TST A +ED 40 * IN B,(C) +ED 41 * OUT (C),B +ED 42 * SBC HL,BC +ED 43 nnnn * LD (nnnn),BC +ED 44 * NEG +ED 45 * RETN +ED 46 * IM 0 +ED 47 * LD I,A +ED 48 * IN C,(C) +ED 49 * OUT (C),C +ED 4A * ADC HL,BC +ED 4B nnnn * LD BC,(nnnn) +ED 4C + MULT BC +ED 4D * RETI +ED 4F * LD R,A +ED 50 * IN D,(C) +ED 51 * OUT (C),D +ED 52 * SBC HL,DE +ED 53 nnnn * LD (nnnn),DE +ED 56 * IM 1 +ED 57 * LD A,I +ED 58 * IN E,(C) +ED 59 * OUT (C),E +ED 5A * ADC HL,DE +ED 5B nnnn * LD DE,(nnnn) +ED 5C + MULT DE +ED 5E * IM 2 +ED 5F * LD A,R +ED 60 * IN H,(C) +ED 61 * OUT (C),H +ED 62 * SBC HL,HL +ED 63 nnnn * LD (nnnn),HL opcode 22 does the same faster +ED 64 nn + TST nn +ED 67 * RRD +ED 68 * IN L,(C) +ED 69 * OUT (C),L +ED 6A * ADC HL,HL +ED 6B nnnn * LD HL,(nnnn) opcode 2A does the same faster +ED 6C + MULT HL +ED 6F * RLD +ED 70 / IN (C) set flags only (TSTI) + ^--- can be viewed as *, because SGS manual and HD64180 + manual list this instruction as valid Z80 +ED 71 / OUT (C),0 +ED 72 * SBC HL,SP +ED 73 nnnn * LD (nnnn),SP +ED 74 nn + TSTIO nn +ED 76 + SLP +ED 78 * IN A,(C) +ED 79 * OUT (C),A +ED 7A * ADC HL,SP +ED 7B nnnn * LD SP,(nnnn) +ED 7C + MULT SP +ED 83 + OTIM +ED 8B + OTDM +ED 93 + OTIMR +ED 9B + OTDMR +ED A0 * LDI +ED A1 * CPI +ED A2 * INI +ED A3 * OUTI +ED A8 * LDD +ED A9 * CPD +ED AA * IND +ED AB * OUTD +ED B0 * LDIR +ED B1 * CPIR +ED B2 * INIR +ED B3 * OTIR +ED B8 * LDDR +ED B9 * CPDR +ED BA * INDR +ED BB * OTDR +EE nn XOR nn +EF RST 28H +F0 RET P +F1 POP AF +F2 nnnn JP P,nnnn +F3 DI +F4 nnnn CALL P,nnnn +F5 PUSH AF +F6 nn OR nn +F7 RST 30H +F8 RET M +F9 LD SP,HL +FA nnnn JP M,nnnn +FB EI +FC nnnn CALL M,nnnn +FD ... * like DD ..., with IY instead of IX +FE nn CP nn +FF RST 38H + + +From: peterm@maths.grace.cri.nz (Peter McGavin) +Newsgroups: comp.sys.sinclair +Subject: Re: Undocumented Z80 opcodes +Date: 05 Jan 1994 20:44:15 GMT +Organization: Applied Maths, Industrial Research Ltd, NZ +NNTP-Posting-Host: kea.grace.cri.nz +In-reply-to: agulbra@tigern.nvg.unit.no's message of 5 Jan 1994 17:47:59 +0100 + +In article, <2geqvv$nlq@tigern.nvg.unit.no>, +agulbra@tigern.nvg.unit.no (Arnt Gulbrandsen) wrote: +>I believe that list originally was written by from David Librik +>. David (with someone else, I think) +>reverse-engineered the Z80 and wrote a list of what he found, a list +>which I think I sent to Peter. + +Actually I got it from Simon Owen (S.N.Owen@newcastle.ac.uk). + +Here it is: (sorry it's a bit wide) +------------------------------------------------------------------------------ + +Key: + + Instruction is unchanged by index prefix + * Instruction thought of as 'undocumented' + +Notes: + + IM * - is either IM 0 or IM 1 (more likely IM 0), hard to decide which + + IN X,(C) reads into nowhere (not even (HL)) but affects the flags. + OUT (C),X performs OUT (C),0 + + *NOP indicated instruction has no effect on anything [ 2M cycles delay ? ] + + instructions with an ED prefix cannot have a preceding DD prefix as well. + + Instructions like LD B,RL (IX+d) perform RL (IX+d) and load B with the result + AS WELL AS affecting the contents of (IX+d). 2 for price of 1 ! + +List: + ++-------------------------------+-------------------+------------------+------------------+-------------------------+ +| Hex | Dec | Normal | DD Prefix | CB Prefix | ED Prefix | DDCB prefix | ++-------------------------------+-------------------+------------------+------------------+-------------------------+ +|[ 00 | 000 ] | NOP | +NOP | RLC B | *NOP | *LD B,RLC (IX+d) | +|[ 01 | 001 ] | LD BC,nn | +LD BC,nn | RLC C | *NOP | *LD C,RLC (IX+d) | +|[ 02 | 002 ] | LD (BC),A | +LD (BC),A | RLC D | *NOP | *LD D,RLC (IX+d) | +|[ 03 | 003 ] | INC BC | +INC BC | RLC E | *NOP | *LD E,RLC (IX+d) | +|[ 04 | 004 ] | INC B | +INC B | RLC H | *NOP | *LD H,RLC (IX+d) | +|[ 05 | 005 ] | DEC B | +DEC B | RLC L | *NOP | *LD L,RLC (IX+d) | +|[ 06 | 006 ] | LD B,n | +LD B,n | RLC (HL) | *NOP | RLC (IX+d) | +|[ 07 | 007 ] | RLCA | +RLCA | RLC A | *NOP | *LD A,RLC (IX+d) | +|[ 08 | 008 ] | EX AF,AF' | +EX AF,AF' | RRC B | *NOP | *LD B,RRC (IX+d) | +|[ 09 | 009 ] | ADD HL,BC | ADD IX,BC | RRC C | *NOP | *LD C,RRC (IX+d) | +|[ 0a | 010 ] | LD A,(BC) | +LD A,(BC) | RRC D | *NOP | *LD D,RRC (IX+d) | +|[ 0b | 011 ] | DEC BC | +DEC BC | RRC E | *NOP | *LD E,RRC (IX+d) | +|[ 0c | 012 ] | INC C | +INC C | RRC H | *NOP | *LD H,RRC (IX+d) | +|[ 0d | 013 ] | DEC C | +DEC C | RRC L | *NOP | *LD L,RRC (IX+d) | +|[ 0e | 014 ] | LD C,n | +LD C,n | RRC (HL) | *NOP | RRC (IX+d) | +|[ 0f | 015 ] | RRCA | +RRCA | RRC A | *NOP | *LD A,RRC (IX+d) | +|[ 10 | 016 ] | DJNZ d | +DJNZ d | RL B | *NOP | *LD B,RL (IX+d) | +|[ 11 | 017 ] | LD DE,nn | +LD DE,nn | RL C | *NOP | *LD C,RL (IX+d) | +|[ 12 | 018 ] | LD (DE),A | +LD (DE),A | RL D | *NOP | *LD D,RL (IX+d) | +|[ 13 | 019 ] | INC DE | +INC DE | RL E | *NOP | *LD E,RL (IX+d) | +|[ 14 | 020 ] | INC D | +INC D | RL H | *NOP | *LD H,RL (IX+d) | +|[ 15 | 021 ] | DEC D | +DEC D | RL L | *NOP | *LD L,RL (IX+d) | +|[ 16 | 022 ] | LD D,n | +LD D,n | RL (HL) | *NOP | RL (IX+d) | +|[ 17 | 023 ] | RLA | +RLA | RL A | *NOP | *LD A,RL (IX+d) | +|[ 18 | 024 ] | JR d | +JR d | RR B | *NOP | *LD B,RR (IX+d) | +|[ 19 | 025 ] | ADD HL,DE | ADD IX,DE | RR C | *NOP | *LD C,RR (IX+d) | +|[ 1a | 026 ] | LD A,(DE) | +LD A,(DE) | RR D | *NOP | *LD D,RR (IX+d) | +|[ 1b | 027 ] | DEC DE | +DEC DE | RR E | *NOP | *LD E,RR (IX+d) | +|[ 1c | 028 ] | INC E | +INC E | RR H | *NOP | *LD H,RR (IX+d) | +|[ 1d | 029 ] | DEC E | +DEC E | RR L | *NOP | *LD L,RR (IX+d) | +|[ 1e | 030 ] | LD E,n | +LD E,n | RR (HL) | *NOP | RR (IX+d) | +|[ 1f | 031 ] | RRA | +RRA | RR A | *NOP | *LD A,RR (IX+d) | +|[ 20 | 032 ] | JR NZ,d | +JR NZ,d | SLA B | *NOP | *LD B,SLA (IX+d) | +|[ 21 | 033 ] | LD HL,nn | LD IX,nn | SLA C | *NOP | *LD C,SLA (IX+d) | +|[ 22 | 034 ] | LD (nn),HL | LD (nn),IX | SLA D | *NOP | *LD D,SLA (IX+d) | +|[ 23 | 035 ] | INC HL | INC IX | SLA E | *NOP | *LD E,SLA (IX+d) | +|[ 24 | 036 ] | INC H | *INC IXh | SLA H | *NOP | *LD H,SLA (IX+d) | +|[ 25 | 037 ] | DEC H | *DEC IXh | SLA L | *NOP | *LD L,SLA (IX+d) | +|[ 26 | 038 ] | LD H,n | *LD IXh,n | SLA (HL) | *NOP | SLA (IX+d) | +|[ 27 | 039 ] | DAA | +DAA | SLA A | *NOP | *LD A,SLA (IX+d) | +|[ 28 | 040 ] | JR Z,d | +JR Z,d | SRA B | *NOP | *LD B,SRA (IX+d) | +|[ 29 | 041 ] | ADD HL,HL | ADD IX,IX | SRA C | *NOP | *LD C,SRA (IX+d) | +|[ 2a | 042 ] | LD HL,(nn) | LD IX,(nn) | SRA D | *NOP | *LD D,SRA (IX+d) | +|[ 2b | 043 ] | DEC HL | DEC IX | SRA E | *NOP | *LD E,SRA (IX+d) | +|[ 2c | 044 ] | INC L | *INC IXl | SRA H | *NOP | *LD H,SRA (IX+d) | +|[ 2d | 045 ] | DEC L | *DEC IXl | SRA L | *NOP | *LD L,SRA (IX+d) | +|[ 2e | 046 ] | LD L,n | *LD IXl,n | SRA (HL) | *NOP | SRA (IX+d) | +|[ 2f | 047 ] | CPL | +CPL | SRA A | *NOP | *LD A,SRA (IX+d) | +|[ 30 | 048 ] | JR NC,d | +JR NC,d | SLL B | *NOP | *LD B,SLL (IX+d) | +|[ 31 | 049 ] | LD SP,nn | +LD SP,nn | SLL C | *NOP | *LD C,SLL (IX+d) | +|[ 32 | 050 ] | LD (nn),A | +LD (nn),A | SLL D | *NOP | *LD D,SLL (IX+d) | +|[ 33 | 051 ] | INC SP | +INC SP | SLL E | *NOP | *LD E,SLL (IX+d) | +|[ 34 | 052 ] | INC (HL) | INC (IX+d) | SLL H | *NOP | *LD H,SLL (IX+d) | +|[ 35 | 053 ] | DEC (HL) | DEC (IX+d) | SLL L | *NOP | *LD L,SLL (IX+d) | +|[ 36 | 054 ] | LD (HL),n | LD (IX+d),n | SLL (HL) | *NOP | SLL (IX+d) | +|[ 37 | 055 ] | SCF | +SCF | SLL A | *NOP | *LD A,SLL (IX+d) | +|[ 38 | 056 ] | JR C,d | +JR C,d | SRL B | *NOP | *LD B,SRL (IX+d) | +|[ 39 | 057 ] | ADD HL,SP | ADD IX,SP | SRL C | *NOP | *LD C,SRL (IX+d) | +|[ 3a | 058 ] | LD A,(nn) | +LD A,(nn) | SRL D | *NOP | *LD D,SRL (IX+d) | +|[ 3b | 059 ] | DEC SP | +DEC SP | SRL E | *NOP | *LD E,SRL (IX+d) | +|[ 3c | 060 ] | INC A | +INC A | SRL H | *NOP | *LD H,SRL (IX+d) | +|[ 3d | 061 ] | DEC A | +DEC A | SRL L | *NOP | *LD L,SRL (IX+d) | +|[ 3e | 062 ] | LD A,n | +LD A,n | SRL (HL) | *NOP | SRL (IX+d) | +|[ 3f | 063 ] | CCF | +CCF | SRL A | *NOP | *LD A,SRL (IX+d) | +|[ 40 | 064 ] | LD B,B | +LD B,B | BIT 0,B | IN B,(C) | *BIT 0,(IX+d) | +|[ 41 | 065 ] | LD B,C | +LD B,C | BIT 0,C | OUT (C),B | *BIT 0,(IX+d) | +|[ 42 | 066 ] | LD B,D | +LD B,D | BIT 0,D | SBC HL,BC | *BIT 0,(IX+d) | +|[ 43 | 067 ] | LD B,E | +LD B,E | BIT 0,E | LD (nn),BC | *BIT 0,(IX+d) | +|[ 44 | 068 ] | LD B,H | *LD B,IXh | BIT 0,H | NEG | *BIT 0,(IX+d) | +|[ 45 | 069 ] | LD B,L | *LD B,IXl | BIT 0,L | RETN | *BIT 0,(IX+d) | +|[ 46 | 070 ] | LD B,(HL) | LD B,(IX+d) | BIT 0,(HL) | IM 0 | BIT 0,(IX+d) | +|[ 47 | 071 ] | LD B,A | +LD B,A | BIT 0,A | LD I,A | *BIT 0,(IX+d) | +|[ 48 | 072 ] | LD C,B | +LD C,B | BIT 1,B | IN C,(C) | *BIT 1,(IX+d) | +|[ 49 | 073 ] | LD C,C | +LD C,C | BIT 1,C | OUT (C),C | *BIT 1,(IX+d) | +|[ 4a | 074 ] | LD C,D | +LD C,D | BIT 1,D | ADC HL,BC | *BIT 1,(IX+d) | +|[ 4b | 075 ] | LD C,E | +LD C,E | BIT 1,E | LD BC,(nn) | *BIT 1,(IX+d) | +|[ 4c | 076 ] | LD C,H | *LD C,IXh | BIT 1,H | *NEG | *BIT 1,(IX+d) | +|[ 4d | 077 ] | LD C,L | *LD C,IXl | BIT 1,L | RETI | *BIT 1,(IX+d) | +|[ 4e | 078 ] | LD C,(HL) | LD C,(IX+d) | BIT 1,(HL) | *IM * (0?) | BIT 1,(IX+d) | +|[ 4f | 079 ] | LD C,A | +LD C,A | BIT 1,A | LD R,A | *BIT 1,(IX+d) | +|[ 50 | 080 ] | LD D,B | +LD D,B | BIT 2,B | IN D,(C) | *BIT 2,(IX+d) | +|[ 51 | 081 ] | LD D,C | +LD D,C | BIT 2,C | OUT (C),D | *BIT 2,(IX+d) | +|[ 52 | 082 ] | LD D,D | +LD D,D | BIT 2,D | SBC HL,DE | *BIT 2,(IX+d) | +|[ 53 | 083 ] | LD D,E | +LD D,E | BIT 2,E | LD (nn),DE | *BIT 2,(IX+d) | +|[ 54 | 084 ] | LD D,H | *LD D,IXh | BIT 2,H | *NEG | *BIT 2,(IX+d) | +|[ 55 | 085 ] | LD D,L | *LD D,IXl | BIT 2,L | *RETN | *BIT 2,(IX+d) | +|[ 56 | 086 ] | LD D,(HL) | LD D,(IX+d) | BIT 2,(HL) | IM 1 | BIT 2,(IX+d) | +|[ 57 | 087 ] | LD D,A | +LD D,A | BIT 2,A | LD A,I | *BIT 2,(IX+d) | +|[ 58 | 088 ] | LD E,B | +LD E,B | BIT 3,B | IN E,(C) | *BIT 3,(IX+d) | +|[ 59 | 089 ] | LD E,C | +LD E,C | BIT 3,C | OUT (C),E | *BIT 3,(IX+d) | +|[ 5a | 090 ] | LD E,D | +LD E,D | BIT 3,D | ADC HL,DE | *BIT 3,(IX+d) | +|[ 5b | 091 ] | LD E,E | +LD E,E | BIT 3,E | LD DE,(nn) | *BIT 3,(IX+d) | +|[ 5c | 092 ] | LD E,H | *LD E,IXh | BIT 3,H | *NEG | *BIT 3,(IX+d) | +|[ 5d | 093 ] | LD E,L | *LD E,IXl | BIT 3,L | *RETI | *BIT 3,(IX+d) | +|[ 5e | 094 ] | LD E,(HL) | LD E,(IX+d) | BIT 3,(HL) | IM 2 | BIT 3,(IX+d) | +|[ 5f | 095 ] | LD E,A | +LD E,A | BIT 3,A | LD A,R | *BIT 3,(IX+d) | +|[ 60 | 096 ] | LD H,B | *LD IXh,B | BIT 4,B | IN H,(C) | *BIT 4,(IX+d) | +|[ 61 | 097 ] | LD H,C | *LD IXh,C | BIT 4,C | OUT (C),H | *BIT 4,(IX+d) | +|[ 62 | 098 ] | LD H,D | *LD IXh,D | BIT 4,D | SBC HL,HL | *BIT 4,(IX+d) | +|[ 63 | 099 ] | LD H,E | *LD IXh,E | BIT 4,E | LD (nn),HL | *BIT 4,(IX+d) | +|[ 64 | 100 ] | LD H,H | *LD IXh,IXh | BIT 4,H | *NEG | *BIT 4,(IX+d) | +|[ 65 | 101 ] | LD H,L | *LD IXh,IXl | BIT 4,L | *RETN | *BIT 4,(IX+d) | +|[ 66 | 102 ] | LD H,(HL) | LD H,(IX+d) | BIT 4,(HL) | *IM 0 | BIT 4,(IX+d) | +|[ 67 | 103 ] | LD H,A | *LD IXh,A | BIT 4,A | RRD | *BIT 4,(IX+d) | +|[ 68 | 104 ] | LD L,B | *LD IXl,B | BIT 5,B | IN L,(C) | *BIT 5,(IX+d) | +|[ 69 | 105 ] | LD L,C | *LD IXl,C | BIT 5,C | OUT (C),L | *BIT 5,(IX+d) | +|[ 6a | 106 ] | LD L,D | *LD IXl,D | BIT 5,D | ADC HL,HL | *BIT 5,(IX+d) | +|[ 6b | 107 ] | LD L,E | *LD IXl,E | BIT 5,E | LD HL,(nn) | *BIT 5,(IX+d) | +|[ 6c | 108 ] | LD L,H | *LD IXl,IXh | BIT 5,H | *NEG | *BIT 5,(IX+d) | +|[ 6d | 109 ] | LD L,L | *LD IXl,IXl | BIT 5,L | *RETI | *BIT 5,(IX+d) | +|[ 6e | 110 ] | LD L,(HL) | LD L,(IX+d) | BIT 5,(HL) | *IM * (0?) | BIT 5,(IX+d) | +|[ 6f | 111 ] | LD L,A | *LD IXl,A | BIT 5,A | RLD | *BIT 5,(IX+d) | +|[ 70 | 112 ] | LD (HL),B | LD (IX+d),B | BIT 6,B | *IN X,(C) | *BIT 6,(IX+d) | +|[ 71 | 113 ] | LD (HL),C | LD (IX+d),C | BIT 6,C | *OUT (C),X(0)| *BIT 6,(IX+d) | +|[ 72 | 114 ] | LD (HL),D | LD (IX+d),D | BIT 6,D | SBC HL,SP | *BIT 6,(IX+d) | +|[ 73 | 115 ] | LD (HL),E | LD (IX+d),E | BIT 6,E | LD (nn),SP | *BIT 6,(IX+d) | +|[ 74 | 116 ] | LD (HL),H | LD (IX+d),H | BIT 6,H | *NEG | *BIT 6,(IX+d) | +|[ 75 | 117 ] | LD (HL),L | LD (IX+d),L | BIT 6,L | *RETN | *BIT 6,(IX+d) | +|[ 76 | 118 ] | HALT | +HALT | BIT 6,(HL) | *IM 1 | BIT 6,(IX+d) | +|[ 77 | 119 ] | LD (HL),A | LD (IX+d),A | BIT 6,A | *NOP | *BIT 6,(IX+d) | +|[ 78 | 120 ] | LD A,B | +LD A,B | BIT 7,B | IN A,(C) | *BIT 7,(IX+d) | +|[ 79 | 121 ] | LD A,C | +LD A,C | BIT 7,C | OUT (C),A | *BIT 7,(IX+d) | +|[ 7a | 122 ] | LD A,D | +LD A,D | BIT 7,D | ADC HL,SP | *BIT 7,(IX+d) | +|[ 7b | 123 ] | LD A,E | +LD A,E | BIT 7,E | LD SP,(nn) | *BIT 7,(IX+d) | +|[ 7c | 124 ] | LD A,H | *LD A,IXh | BIT 7,H | *NEG | *BIT 7,(IX+d) | +|[ 7d | 125 ] | LD A,L | *LD A,IXl | BIT 7,L | *RETI | *BIT 7,(IX+d) | +|[ 7e | 126 ] | LD A,(HL) | LD A,(IX+d) | BIT 7,(HL) | *IM 2 | BIT 7,(IX+d) | +|[ 7f | 127 ] | LD A,A | +LD A,A | BIT 7,A | *NOP | *BIT 7,(IX+d) | +|[ 80 | 128 ] | ADD A,B | +ADD A,B | RES 0,B | *NOP | *LD B,RES 0,(IX+d) | +|[ 81 | 129 ] | ADD A,C | +ADD A,C | RES 0,C | *NOP | *LD C,RES 0,(IX+d) | +|[ 82 | 130 ] | ADD A,D | +ADD A,D | RES 0,D | *NOP | *LD D,RES 0,(IX+d) | +|[ 83 | 131 ] | ADD A,E | +ADD A,E | RES 0,E | *NOP | *LD E,RES 0,(IX+d) | +|[ 84 | 132 ] | ADD A,H | *ADD A,IXh | RES 0,H | *NOP | *LD H,RES 0,(IX+d) | +|[ 85 | 133 ] | ADD A,L | *ADD A,IXl | RES 0,L | *NOP | *LD L,RES 0,(IX+d) | +|[ 86 | 134 ] | ADD A,(HL) | ADD A,(IX+d) | RES 0,(HL) | *NOP | RES 0,(IX+d) | +|[ 87 | 135 ] | ADD A,A | +ADD A,A | RES 0,A | *NOP | *LD A,RES 0,(IX+d) | +|[ 88 | 136 ] | ADC A,B | +ADC A,B | RES 1,B | *NOP | *LD B,RES 1,(IX+d) | +|[ 89 | 137 ] | ADC A,C | +ADC A,C | RES 1,C | *NOP | *LD C,RES 1,(IX+d) | +|[ 8a | 138 ] | ADC A,D | +ADC A,D | RES 1,D | *NOP | *LD D,RES 1,(IX+d) | +|[ 8b | 139 ] | ADC A,E | +ADC A,E | RES 1,E | *NOP | *LD E,RES 1,(IX+d) | +|[ 8c | 140 ] | ADC A,H | *ADC A,IXh | RES 1,H | *NOP | *LD H,RES 1,(IX+d) | +|[ 8d | 141 ] | ADC A,L | *ADC A,IXl | RES 1,L | *NOP | *LD L,RES 1,(IX+d) | +|[ 8e | 142 ] | ADC A,(HL) | ADC A,(IX+d) | RES 1,(HL) | *NOP | RES 1,(IX+d) | +|[ 8f | 143 ] | ADC A,A | +ADC A,A | RES 1,A | *NOP | *LD A,RES 1,(IX+d) | +|[ 90 | 144 ] | SUB B | +SUB B | RES 2,B | *NOP | *LD B,RES 2,(IX+d) | +|[ 91 | 145 ] | SUB C | +SUB C | RES 2,C | *NOP | *LD C,RES 2,(IX+d) | +|[ 92 | 146 ] | SUB D | +SUB D | RES 2,D | *NOP | *LD D,RES 2,(IX+d) | +|[ 93 | 147 ] | SUB E | +SUB E | RES 2,E | *NOP | *LD E,RES 2,(IX+d) | +|[ 94 | 148 ] | SUB H | *SUB IXh | RES 2,H | *NOP | *LD H,RES 2,(IX+d) | +|[ 95 | 149 ] | SUB L | *SUB IXl | RES 2,L | *NOP | *LD L,RES 2,(IX+d) | +|[ 96 | 150 ] | SUB (HL) | SUB (IX+d) | RES 2,(HL) | *NOP | RES 2,(IX+d) | +|[ 97 | 151 ] | SUB A | +SUB A | RES 2,A | *NOP | *LD A,RES 2,(IX+d) | +|[ 98 | 152 ] | SBC A,B | +SBC A,B | RES 3,B | *NOP | *LD B,RES 3,(IX+d) | +|[ 99 | 153 ] | SBC A,C | +SBC A,C | RES 3,C | *NOP | *LD C,RES 3,(IX+d) | +|[ 9a | 154 ] | SBC A,D | +SBC A,D | RES 3,D | *NOP | *LD D,RES 3,(IX+d) | +|[ 9b | 155 ] | SBC A,E | +SBC A,E | RES 3,E | *NOP | *LD E,RES 3,(IX+d) | +|[ 9c | 156 ] | SBC A,H | *SBC A,IXh | RES 3,H | *NOP | *LD H,RES 3,(IX+d) | +|[ 9d | 157 ] | SBC A,L | *SBC A,IXl | RES 3,L | *NOP | *LD L,RES 3,(IX+d) | +|[ 9e | 158 ] | SBC A,(HL) | SBC A,(IX+d) | RES 3,(HL) | *NOP | RES 3,(IX+d) | +|[ 9f | 159 ] | SBC A,A | +SBC A,A | RES 3,A | *NOP | *LD A,RES 3,(IX+d) | +|[ a0 | 160 ] | AND B | +AND B | RES 4,B | LDI | *LD B,RES 4,(IX+d) | +|[ a1 | 161 ] | AND C | +AND C | RES 4,C | CPI | *LD C,RES 4,(IX+d) | +|[ a2 | 162 ] | AND D | +AND D | RES 4,D | INI | *LD D,RES 4,(IX+d) | +|[ a3 | 163 ] | AND E | +AND E | RES 4,E | OUTI | *LD E,RES 4,(IX+d) | +|[ a4 | 164 ] | AND H | *AND IXh | RES 4,H | *NOP | *LD H,RES 4,(IX+d) | +|[ a5 | 165 ] | AND L | *AND IXl | RES 4,L | *NOP | *LD L,RES 4,(IX+d) | +|[ a6 | 166 ] | AND (HL) | AND (IX+d) | RES 4,(HL) | *NOP | RES 4,(IX+d) | +|[ a7 | 167 ] | AND A | +AND A | RES 4,A | *NOP | *LD A,RES 4,(IX+d) | +|[ a8 | 168 ] | XOR B | +XOR B | RES 5,B | LDD | *LD B,RES 5,(IX+d) | +|[ a9 | 169 ] | XOR C | +XOR C | RES 5,C | CPD | *LD C,RES 5,(IX+d) | +|[ aa | 170 ] | XOR D | +XOR D | RES 5,D | IND | *LD D,RES 5,(IX+d) | +|[ ab | 171 ] | XOR E | +XOR E | RES 5,E | OUTD | *LD E,RES 5,(IX+d) | +|[ ac | 172 ] | XOR H | *XOR IXh | RES 5,H | *NOP | *LD H,RES 5,(IX+d) | +|[ ad | 173 ] | XOR L | *XOR IXl | RES 5,L | *NOP | *LD L,RES 5,(IX+d) | +|[ ae | 174 ] | XOR (HL) | XOR (IX+d) | RES 5,(HL) | *NOP | RES 5,(IX+d) | +|[ af | 175 ] | XOR A | +XOR A | RES 5,A | *NOP | *LD A,RES 5,(IX+d) | +|[ b0 | 176 ] | OR B | +OR B | RES 6,B | LDIR | *LD B,RES 6,(IX+d) | +|[ b1 | 177 ] | OR C | +OR C | RES 6,C | CPIR | *LD C,RES 6,(IX+d) | +|[ b2 | 178 ] | OR D | +OR D | RES 6,D | INIR | *LD D,RES 6,(IX+d) | +|[ b3 | 179 ] | OR E | +OR E | RES 6,E | OTIR | *LD E,RES 6,(IX+d) | +|[ b4 | 180 ] | OR H | *OR IXh | RES 6,H | *NOP | *LD H,RES 6,(IX+d) | +|[ b5 | 181 ] | OR L | *OR IXl | RES 6,L | *NOP | *LD L,RES 6,(IX+d) | +|[ b6 | 182 ] | OR (HL) | OR (IX+d) | RES 6,(HL) | *NOP | RES 6,(IX+d) | +|[ b7 | 183 ] | OR A | +OR A | RES 6,A | *NOP | *LD A,RES 6,(IX+d) | +|[ b8 | 184 ] | CP B | +CP B | RES 7,B | LDDR | *LD B,RES 7,(IX+d) | +|[ b9 | 185 ] | CP C | +CP C | RES 7,C | CPDR | *LD C,RES 7,(IX+d) | +|[ ba | 186 ] | CP D | +CP D | RES 7,D | INDR | *LD D,RES 7,(IX+d) | +|[ bb | 187 ] | CP E | +CP E | RES 7,E | OTDR | *LD E,RES 7,(IX+d) | +|[ bc | 188 ] | CP H | *CP IXh | RES 7,H | *NOP | *LD H,RES 7,(IX+d) | +|[ bd | 189 ] | CP L | *CP IXl | RES 7,L | *NOP | *LD L,RES 7,(IX+d) | +|[ be | 190 ] | CP (HL) | CP (IX+d) | RES 7,(HL) | *NOP | RES 7,(IX+d) | +|[ bf | 191 ] | CP A | +CP A | RES 7,A | *NOP | *LD A,RES 7,(IX+d) | +|[ c0 | 192 ] | RET NZ | +RET NZ | SET 0,B | *NOP | *LD B,SET 0,(IX+d) | +|[ c1 | 193 ] | POP BC | +POP BC | SET 0,C | *NOP | *LD C,SET 0,(IX+d) | +|[ c2 | 194 ] | JP NZ,nn | +JP NZ,nn | SET 0,D | *NOP | *LD D,SET 0,(IX+d) | +|[ c3 | 195 ] | JP nn | +JP nn | SET 0,E | *NOP | *LD E,SET 0,(IX+d) | +|[ c4 | 196 ] | CALL NZ,nn | +CALL NZ,nn | SET 0,H | *NOP | *LD H,SET 0,(IX+d) | +|[ c5 | 197 ] | PUSH BC | +PUSH BC | SET 0,L | *NOP | *LD L,SET 0,(IX+d) | +|[ c6 | 198 ] | ADD A,n | +ADD A,n | SET 0,(HL) | *NOP | SET 0,(IX+d) | +|[ c7 | 199 ] | RST 0 | +RST 0 | SET 0,A | *NOP | *LD A,SET 0,(IX+d) | +|[ c8 | 100 ] | RET Z | +RET Z | SET 1,B | *NOP | *LD B,SET 1,(IX+d) | +|[ c9 | 201 ] | RET | +RET | SET 1,C | *NOP | *LD C,SET 1,(IX+d) | +|[ ca | 202 ] | JP Z,nn | +JP Z,nn | SET 1,D | *NOP | *LD D,SET 1,(IX+d) | +|[ cb | 203 ] | [Prefix] | *[See DDCB info]| SET 1,E | *NOP | *LD E,SET 1,(IX+d) | +|[ cc | 204 ] | CALL Z,nn | +CALL Z,nn | SET 1,H | *NOP | *LD H,SET 1,(IX+d) | +|[ cd | 205 ] | CALL nn | +CALL nn | SET 1,L | *NOP | *LD L,SET 1,(IX+d) | +|[ ce | 206 ] | ADC A,n | +ADC A,n | SET 1,(HL) | *NOP | SET 1,(IX+d) | +|[ cf | 207 ] | RST 8 | +RST 8 | SET 1,A | *NOP | *LD A,SET 1,(IX+d) | +|[ d0 | 208 ] | RET NC | +RET NC | SET 2,B | *NOP | *LD B,SET 2,(IX+d) | +|[ d1 | 209 ] | POP DE | +POP DE | SET 2,C | *NOP | *LD C,SET 2,(IX+d) | +|[ d2 | 210 ] | JP NC,nn | +JP NC,nn | SET 2,D | *NOP | *LD D,SET 2,(IX+d) | +|[ d3 | 211 ] | OUT (n),A | +OUT (n),A | SET 2,E | *NOP | *LD E,SET 2,(IX+d) | +|[ d4 | 212 ] | CALL NC,nn | +CALL NC,nn | SET 2,H | *NOP | *LD H,SET 2,(IX+d) | +|[ d5 | 213 ] | PUSH DE | +PUSH DE | SET 2,L | *NOP | *LD L,SET 2,(IX+d) | +|[ d6 | 214 ] | SUB n | +SUB n | SET 2,(HL) | *NOP | SET 2,(IX+d) | +|[ d7 | 215 ] | RST 10H | +RST 10H | SET 2,A | *NOP | *LD A,SET 2,(IX+d) | +|[ d8 | 216 ] | RET C | +RET C | SET 3,B | *NOP | *LD B,SET 3,(IX+d) | +|[ d9 | 217 ] | EXX | +EXX | SET 3,C | *NOP | *LD C,SET 3,(IX+d) | +|[ da | 218 ] | JP C,nn | +JP C,nn | SET 3,D | *NOP | *LD D,SET 3,(IX+d) | +|[ db | 219 ] | IN A,(n) | +IN A,(n) | SET 3,E | *NOP | *LD E,SET 3,(IX+d) | +|[ dc | 220 ] | CALL C,nn | +CALL C,nn | SET 3,H | *NOP | *LD H,SET 3,(IX+d) | +|[ dd | 221 ] | [IX Prefix] | +[IX Prefix] | SET 3,L | *NOP | *LD L,SET 3,(IX+d) | +|[ de | 222 ] | SBC A,n | +SBC A,n | SET 3,(HL) | *NOP | SET 3,(IX+d) | +|[ df | 223 ] | RST 18H | +RST 18H | SET 3,A | *NOP | *LD A,SET 3,(IX+d) | +|[ e0 | 224 ] | RET PO | +RET PO | SET 4,B | *NOP | *LD B,SET 4,(IX+d) | +|[ e1 | 225 ] | POP HL | POP IX | SET 4,C | *NOP | *LD C,SET 4,(IX+d) | +|[ e2 | 226 ] | JP PO,nn | +JP PO,nn | SET 4,D | *NOP | *LD D,SET 4,(IX+d) | +|[ e3 | 227 ] | EX (SP),HL | EX (SP),IX | SET 4,E | *NOP | *LD E,SET 4,(IX+d) | +|[ e4 | 228 ] | CALL PO,nn | +CALL PO,nn | SET 4,H | *NOP | *LD H,SET 4,(IX+d) | +|[ e5 | 229 ] | PUSH HL | PUSH IX | SET 4,L | *NOP | *LD L,SET 4,(IX+d) | +|[ e6 | 230 ] | AND n | +AND n | SET 4,(HL) | *NOP | SET 4,(IX+d) | +|[ e7 | 231 ] | RST 20H | +RST 20H | SET 4,A | *NOP | *LD A,SET 4,(IX+d) | +|[ e8 | 232 ] | RET PE | +RET PE | SET 5,B | *NOP | *LD B,SET 5,(IX+d) | +|[ e9 | 233 ] | JP (HL) | JP (IX) | SET 5,C | *NOP | *LD C,SET 5,(IX+d) | +|[ ea | 234 ] | JP PE,nn | +JP PE,nn | SET 5,D | *NOP | *LD D,SET 5,(IX+d) | +|[ eb | 235 ] | EX DE,HL | +EX DE,HL | SET 5,E | *NOP | *LD E,SET 5,(IX+d) | +|[ ec | 236 ] | CALL PE,nn | +CALL PE,nn | SET 5,H | *NOP | *LD H,SET 5,(IX+d) | +|[ ed | 237 ] | [Prefix] | +[Prefix] | SET 5,L | *NOP | *LD L,SET 5,(IX+d) | +|[ ee | 238 ] | XOR n | +XOR n | SET 5,(HL) | *NOP | SET 5,(IX+d) | +|[ ef | 239 ] | RST 28H | +RST 28H | SET 5,A | *NOP | *LD A,SET 5,(IX+d) | +|[ f0 | 240 ] | RET P | +RET P | SET 6,B | *NOP | *LD B,SET 6,(IX+d) | +|[ f1 | 241 ] | POP AF | +POP AF | SET 6,C | *NOP | *LD C,SET 6,(IX+d) | +|[ f2 | 242 ] | JP P,nn | +JP P,nn | SET 6,D | *NOP | *LD D,SET 6,(IX+d) | +|[ f3 | 243 ] | DI | +DI | SET 6,E | *NOP | *LD E,SET 6,(IX+d) | +|[ f4 | 244 ] | CALL P,nn | +CALL P,nn | SET 6,H | *NOP | *LD H,SET 6,(IX+d) | +|[ f5 | 245 ] | PUSH AF | +PUSH AF | SET 6,L | *NOP | *LD L,SET 6,(IX+d) | +|[ f6 | 246 ] | OR n | +OR n | SET 6,(HL) | *NOP | SET 6,(IX+d) | +|[ f7 | 247 ] | RST 30H | +RST 30H | SET 6,A | *NOP | *LD A,SET 6,(IX+d) | +|[ f8 | 248 ] | RET M | +RET M | SET 7,B | *NOP | *LD B,SET 7,(IX+d) | +|[ f9 | 249 ] | LD SP,HL | LD SP,IX | SET 7,C | *NOP | *LD C,SET 7,(IX+d) | +|[ fa | 250 ] | JP M,nn | +JP M,nn | SET 7,D | *NOP | *LD D,SET 7,(IX+d) | +|[ fb | 251 ] | EI | +EI | SET 7,E | *NOP | *LD E,SET 7,(IX+d) | +|[ fc | 252 ] | CALL M,nn | +CALL M,nn | SET 7,H | *NOP | *LD H,SET 7,(IX+d) | +|[ fd | 253 ] | [IY Prefix] | +[IY Prefix] | SET 7,L | *NOP | *LD L,SET 7,(IX+d) | +|[ fe | 254 ] | CP n | +CP n | SET 7,(HL) | *NOP | SET 7,(IX+d) | +|[ ff | 255 ] | RST 38H | +RST 38H | SET 7,A | *NOP | *LD A,SET 7,(IX+d) | ++-------------+-----------------+-------------------+------------------+------------------+-------------------------+ +-- +Peter McGavin. (peterm@maths.grace.cri.nz) + +From: agulbra@tigern.nvg.unit.no (Arnt Gulbrandsen) +Newsgroups: comp.sys.sinclair +Subject: Re: Undocumented Z80 opcodes +Date: 6 Jan 1994 13:31:44 +0100 +Organization: University of Trondheim, Norway +NNTP-Posting-Host: tigern.nvg.unit.no + +In article , +Peter McGavin wrote: +>In article, <2geqvv$nlq@tigern.nvg.unit.no>, +>agulbra@tigern.nvg.unit.no (Arnt Gulbrandsen) wrote: +>>I believe that list originally was written by from David Librik +>>. David (with someone else, I think) +>>reverse-engineered the Z80 and wrote a list of what he found, a list +>>which I think I sent to Peter. +> +>Actually I got it from Simon Owen (S.N.Owen@newcastle.ac.uk). +> +>Here it is: (sorry it's a bit wide) + +Not the same. Here's the big one. + +--Arnt + +Date: Fri, 19 Nov 1993 00:40:23 -0800 +From: David Librik +Message-Id: <199311190840.AAA06896@cory.EECS.Berkeley.EDU> +Subject: Undocumented Z-80 Instructions + + +Here is my article on undocumented Z-80 instructions. Please go over +your data and add anything you can to this list, and send it back to me. +Thanks! + +- David Librik +librik@cs.Berkeley.edu + + ------------------ + +There's been some discussion about the so-called "undocumented" opcodes +of the Z-80 microprocessor. These are officially-undefined machine- +language instructions that often have powerful and useful effects; +they are so often used by Z-80 system programmers that they are de-facto +"documented". Here is an article I posted a few years ago on another +computer system. + +By the way, the reason these instructions exist even though they were +not part of the original CPU design: the Z-80 was the most complex +microprocessor ever to be completely hard-wired (no microcode). As a +result -- as anyone who's ever taken a logic design course can tell +you -- it's much easier to have "undefined states" do whatever-comes- +easiest. + +* 2/28/88 2:37 pm librik / pega / cerl * + +The undocumented Z80 opcodes. While Zilog claims that +these should not be "trusted", I have yet to hear of a +Z80 that does not support them; and at least one operating +system uses them. + +* HX and LX instructions. These instructions manipulate + the high- and low-order 8 bits of the sixteen bit IX and + IY registers. (Here, I give the opcodes for HX and LX, + to get HY and LY, use FD instead of DD in the opcodes.) + +* SLL. This instruction shifts an 8-bit quantity left + (logical), then inserts 1 into the low-order bit. + +* Shift/Bit Set/Bit Reset with autocopy. These instructions + perform bit shifts (RLC, RRC, RL, RR, SLA, SRA, SLL, SRL), + bit set (SET) and bit reset (RES) operations on (IX+jj) + [and (IY+jj)], but also automatically copy the result + into an 8-bit register. + +* Null port accesses. IN and OUT without data. + +dd24 inc hx dd62 ld hx,d dd8c adc a,hx +dd25 dec hx dd63 ld hx,e dd8d adc a,lx +dd26nn ld hx,nn dd64 ld hx,hx dd94 sub hx +dd2c inc lx dd65 ld hx,lx dd95 sub lx +dd2d dec lx dd67 ld hx,a dd9c sbc a,hx +dd2enn ld lx,nn dd68 ld lx,b dd9d sbc a,lx +dd44 ld b,hx dd69 ld lx,c dda4 and hx +dd45 ld b,lx dd6a ld lx,d dda5 and lx +dd4c ld c,hx dd6b ld lx,e ddac xor hx +dd4d ld c,lx dd6c ld lx,hx ddad xor lx +dd54 ld d,hx dd6d ld lx,lx ddb4 or hx +dd55 ld d,lx dd6f ld lx,a ddb5 or lx +dd5c ld e,hx dd7c ld a,hx ddbc cp hx +dd5d ld e,lx dd7d ld a,lx ddbd cp lx +dd60 ld hx,b dd84 add a,hx +dd61 ld hx,c dd85 add a,lx + +The corresponding instructions for HY and LY may be obtained +by using FD in place of DD. + +cb30 sll b cb34 sll h +cb31 sll c cb35 sll l +cb32 sll d cb36 sll (hl) +cb33 sll e cb37 sll a + +* The following instructions perform the indicated operation +* on (ix+jj) and copy results into register 'r' (see below). +ddcbjj00-ddcbjj07 rlc r,(ix+jj) +ddcbjj08-ddcbjj0f rrc r,(ix+jj) +ddcbjj10-ddcbjj17 rl r,(ix+jj) +ddcbjj18-ddcbjj1f rr r,(ix+jj) +ddcbjj20-ddcbjj27 sla r,(ix+jj) +ddcbjj28-ddcbjj2f sra r,(ix+jj) +ddcbjj30-ddcbjj37 sll r,(ix+jj) +ddcbjj38-ddcbjj3f srl r,(ix+jj) + +ddcbjj80-ddcbjj87 res r,0,(ix+jj) +ddcbjj88-ddcbjj8f res r,1,(ix+jj) +ddcbjj90-ddcbjj97 res r,2,(ix+jj) +ddcbjj98-ddcbjj9f res r,3,(ix+jj) +ddcbjja0-ddcbjja7 res r,4,(ix+jj) +ddcbjja8-ddcbjjaf res r,5,(ix+jj) +ddcbjjb0-ddcbjjb7 res r,6,(ix+jj) +ddcbjjb8-ddcbjjbf res r,7,(ix+jj) + +ddcbjjc0-ddcbjjc7 set r,0,(ix+jj) +ddcbjjc8-ddcbjjcf set r,1,(ix+jj) +ddcbjjd0-ddcbjjd7 set r,2,(ix+jj) +ddcbjjd8-ddcbjjdf set r,3,(ix+jj) +ddcbjje0-ddcbjje7 set r,4,(ix+jj) +ddcbjje8-ddcbjjef set r,5,(ix+jj) +ddcbjjf0-ddcbjjf7 set r,6,(ix+jj) +ddcbjjf8-ddcbjjff set r,7,(ix+jj) + +In the last 3 tables, the corresponding instructions for +(IY+jj) may be obtained by using FD in place of DD. + +The value for 'r' is determined as follows: + Last digit of opcode: register 'r': + 0 or 8 B + 1 or 9 C + 2 or A D + 3 or B E + 4 or C H + 5 or D L + 6 or E (no effect) + 7 or F A + +* +ed70 in --,(c) +* gets input from port stored in (c), but does not store it. +* another reference claims this is: in (hl),(c) but I see no +* evidence for that, other than symmetry. +* +ed71 out (c),-- +* seems to send a 00 to port stored in (c). +* the same reference as as above calls this: out (hl),(c). + +A full article on this material is available upon request. +This information from NORTHERN BYTES, volume 5 number 8. + + -------- + +In addition to the information in the above article, I should mention +for completeness' sake all the other undefined opcodes and their +(generally redundant) effects. I shall list the ordinary Z-80 +instructions which they mimic. + +ed63nnnn ld (nnnn),hl +ed6bnnnn ld hl,(nnnn) +ed4c, ed54, ed5c, ed64, ed6c, ed74, ed7c neg + ed55, ed5d, ed65, ed6d, ed75, ed7d retn + +The following are no-ops: + +ed80-9f, eda4-a7, edac-af, edb4-b7, edbc-bf, ed00-3f, edc0-ff, +ed4e, ed66, ed6e, ed76, ed77, ed7e, ed7f + +Additional information from NANOS' Reference Card for the Z-80 microprocessor. + +David Librik +librik/pega/nova (on PLATO/NovaNET) + + diff --git a/sim/ucsim/z80.src/z80cl.h b/sim/ucsim/z80.src/z80cl.h new file mode 100644 index 0000000..c8544ee --- /dev/null +++ b/sim/ucsim/z80.src/z80cl.h @@ -0,0 +1,75 @@ +/* + * Simulator of microcontrollers (z80cl.h) + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +/* This file is part of microcontroller simulator: ucsim. + +UCSIM is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +UCSIM is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with UCSIM; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ +/*@1@*/ + +#ifndef Z80CL_HEADER +#define Z80CL_HEADER + +#include "uccl.h" + +#include "regsz80.h" + + +/* + * Base type of Z80 microcontrollers + */ + +class cl_z80: public cl_uc +{ +public: + class cl_memory *ram; + class cl_memory *rom; + struct t_regs regs; +public: + cl_z80(class cl_sim *asim); + virtual int init(void); + virtual const char *id_string(void); + + //virtual t_addr get_mem_size(enum mem_class type); + virtual void mk_hw_elements(void); + virtual void make_memories(void); + + virtual struct dis_entry *dis_tbl(void); + virtual int inst_length(t_addr addr); + virtual int inst_branch(t_addr addr); + virtual int longest_inst(void); + virtual const char *disass(t_addr addr, const char *sep); + virtual void print_regs(class cl_console_base *con); + + virtual int exec_inst(void); + + virtual const char *get_disasm_info(t_addr addr, + int *ret_len, + int *ret_branch, + int *immed_offset); + +#include "instcl.h" +}; + + +#endif + +/* End of z80.src/z80cl.h */ diff --git a/sim/ucsim/z80.src/z80mac.h b/sim/ucsim/z80.src/z80mac.h new file mode 100644 index 0000000..fa167ae --- /dev/null +++ b/sim/ucsim/z80.src/z80mac.h @@ -0,0 +1,266 @@ +/* + * Simulator of microcontrollers (z80mac.h) + * + * some z80 code base from Karl Bongers karl@turbobit.com + * + * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * + * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * + */ + +// shift positions +#define BITPOS_C 0 // 1 +#define BITPOS_P 2 // 4H +#define BITPOS_A 4 // 10H +#define BITPOS_Z 6 // 40H +#define BITPOS_S 7 // 80H + +#define store2(addr, val) { ram->set((t_addr) (addr), val & 0xff); \ + ram->set((t_addr) (addr+1), (val >> 8) & 0xff); } +#define store1(addr, val) ram->set((t_addr) (addr), val) +#define get1(addr) ram->get((t_addr) (addr)) +#define get2(addr) (ram->get((t_addr) (addr)) | (ram->get((t_addr) (addr+1)) << 8) ) +#define fetch2() (fetch() | (fetch() << 8)) +#define fetch1() fetch() +#define push2(val) {regs.SP-=2; store2(regs.SP,(val));} +#define push1(val) {regs.SP-=1; store1(regs.SP,(val));} +#define pop2(var) {var=get2(regs.SP),regs.SP+=2;} +//#define pop1(var) {var=get1(regs.SP),regs.SP+=1;} +#define add_u16_disp(_w, _d) (( (unsigned short)(_w) + (signed char)(_d) ) & 0xffff) + +#define sub_A_bytereg(br) { \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + if (regs.A < br) regs.F |= (BIT_C | BIT_P); \ + regs.A -= (br); \ + regs.F |= BIT_N; /* not addition */ \ + if (regs.A == 0) regs.F |= BIT_Z; \ + if (regs.A & 0x80) regs.F |= BIT_S; \ + /* Skip BIT_A for now */ \ + } + + +#define rr_byte(reg) { \ + if (regs.F & BIT_C) { \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + if (reg & 0x01) \ + regs.F |= BIT_C; \ + reg = (reg >> 1) | 0x80; \ + } else { \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + if (reg & 0x01) \ + regs.F |= BIT_C; \ + reg >>= 1; \ + } \ + if (reg == 0) regs.F |= BIT_Z; \ + if (reg & 0x80) regs.F |= BIT_S; \ + /* fixme: BIT_P(lookup table?) */ \ +} + +#define rl_byte(reg) { \ + if (regs.F & BIT_C) { \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + if (reg & 0x80) \ + regs.F |= BIT_C; \ + reg = (reg << 1) | 0x01; \ + } else { \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + if (reg & 0x80) \ + regs.F |= BIT_C; \ + reg = (reg << 1); \ + } \ + if (reg == 0) regs.F |= BIT_Z; \ + if (reg & 0x80) regs.F |= BIT_S; \ + /* fixme: BIT_P(lookup table?) */ \ +} + +#define rrc_byte(reg) { \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + if (reg & 0x01) { \ + regs.F |= BIT_C; \ + reg = (reg >> 1) | 0x80; \ + } \ + else \ + reg = (reg >> 1); \ + if (reg == 0) regs.F |= BIT_Z; \ + if (reg & 0x80) regs.F |= BIT_S; \ + /* fixme: BIT_P(lookup table?) */ \ +} + +#define rlc_byte(reg) { \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + if (reg & 0x80) { \ + regs.F |= BIT_C; \ + reg = (reg << 1) | 0x01; \ + } else \ + reg <<= 1; \ + if (reg == 0) regs.F |= BIT_Z; \ + if (reg & 0x80) regs.F |= BIT_S; \ + /* fixme: BIT_P(lookup table?) */ \ +} + +#define sla_byte(reg) { \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + if (reg & 0x80) \ + regs.F |= BIT_C; \ + reg <<= 1; \ + if (reg == 0) regs.F |= BIT_Z; \ + if (reg & 0x80) regs.F |= BIT_S; \ + /* fixme: BIT_P(lookup table?) */ \ +} + +#define sra_byte(reg) { \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + if (reg & 0x80) { \ + if (reg & 0x01) \ + regs.F |= BIT_C; \ + reg = (reg >> 1) | 0x80; \ + } else { \ + if (reg & 0x01) \ + regs.F |= BIT_C; \ + reg >>= 1; \ + } \ + if (reg == 0) regs.F |= BIT_Z; \ + if (reg & 0x80) regs.F |= BIT_S; \ + /* fixme: BIT_P(lookup table?) */ \ +} + +#define srl_byte(reg) { \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + if (reg & 0x01) \ + regs.F |= BIT_C; \ + reg >>= 1; \ + if (reg == 0) regs.F |= BIT_Z; \ + if (reg & 0x80) regs.F |= BIT_S; \ + /* fixme: BIT_P(lookup table?) */ \ +} + +/* following not in my book, best guess based on z80.txt comments */ +#define slia_byte(reg) { \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + if (reg & 0x80) \ + regs.F |= BIT_C; \ + reg = (reg << 1) | 1; \ + if (reg == 0) regs.F |= BIT_Z; \ + if (reg & 0x80) regs.F |= BIT_S; \ + /* fixme: BIT_P(lookup table?) */ \ +} + +#define bit_byte(reg, _bitnum) { \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + regs.F |= BIT_A; \ + if (!(reg & (1 << (_bitnum)))) \ + regs.F |= BIT_Z; \ + /* book shows BIT_S & BIT_P as unknown state */ \ +} + +#define add_A_bytereg(br) { \ + unsigned int tmp; \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + tmp = (unsigned short)regs.A + (unsigned short)(br); \ + regs.A = (unsigned short) tmp; \ + /* C Z S A */ \ + if (tmp > 0xff) regs.F |= (BIT_C | BIT_P); \ + if (regs.A == 0) regs.F |= BIT_Z; \ + if (regs.A & 0x80) regs.F |= BIT_S; \ + /* Skip BIT_A for now */ \ + } + +#define adc_A_bytereg(br) { \ + unsigned int tmp; \ + tmp = (unsigned short)regs.A + (unsigned short)(br); \ + if (regs.F & BIT_C) ++tmp; \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + regs.A = (unsigned char) tmp; \ + if (tmp > 0xff) regs.F |= (BIT_C | BIT_P); \ + if (regs.A == 0) regs.F |= BIT_Z; \ + if (regs.A & 0x80) regs.F |= BIT_S; \ + /* Skip BIT_A for now */ \ + } + +#define adc_HL_wordreg(reg) { \ + unsigned int tmp; \ + tmp = (unsigned int)regs.HL + (unsigned int)(reg); \ + if (regs.F & BIT_C) ++tmp; \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + regs.HL = (unsigned short) tmp; \ + if (tmp > 0xffff) regs.F |= (BIT_C | BIT_P); \ + if (regs.HL == 0) regs.F |= BIT_Z; \ + if (regs.HL & 0x8000) regs.F |= BIT_S; \ + /* Skip BIT_A for now */ \ + } + +#define sbc_A_bytereg(br) { \ + unsigned int tmp; \ + tmp = (unsigned short)regs.A - (unsigned short)(br); \ + if (regs.F & BIT_C) --tmp; \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + regs.A = (unsigned char) tmp; \ + if (tmp > 0xff) regs.F |= (BIT_C | BIT_P); \ + if (regs.A == 0) regs.F |= BIT_Z; \ + if (regs.A & 0x80) regs.F |= BIT_S; \ + regs.F |= BIT_N; \ + /* Skip BIT_A for now */ \ + } + +#define sbc_HL_wordreg(reg) { \ + unsigned int tmp; \ + tmp = (unsigned int)regs.HL - (unsigned int)(reg); \ + if (regs.F & BIT_C) --tmp; \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + regs.HL = (unsigned short) tmp; \ + if (tmp > 0xffff) regs.F |= (BIT_C | BIT_P); \ + if (regs.HL == 0) regs.F |= BIT_Z; \ + if (regs.HL & 0x8000) regs.F |= BIT_S; \ + regs.F |= BIT_N; \ + /* Skip BIT_A for now */ \ + } + +#define and_A_bytereg(br) { \ + regs.A &= (br); \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + if (regs.A == 0) regs.F |= BIT_Z; \ + if (regs.A & 0x80) regs.F |= BIT_S; \ + } + +#define xor_A_bytereg(br) { \ + regs.A ^= (br); \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + if (regs.A == 0) regs.F |= BIT_Z; \ + if (regs.A & 0x80) regs.F |= BIT_S; \ + } + +#define or_A_bytereg(br) { \ + regs.A |= (br); \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + if (regs.A == 0) regs.F |= BIT_Z; \ + if (regs.A & 0x80) regs.F |= BIT_S; \ + } + +#define cp_bytereg(br) { unsigned char _tmp1; \ + regs.F &= ~(BIT_ALL); /* clear these */ \ + if (regs.A < br) regs.F |= BIT_C; \ + _tmp1 = regs.A - (br); \ + regs.F |= BIT_N; /* not addition */ \ + if (_tmp1 == 0) regs.F |= BIT_Z; \ + if (_tmp1 & 0x80) regs.F |= BIT_S; \ + /* Skip BIT_A for now */ \ + } + +#define inc(var) /* 8-bit increment */ { var++; \ + regs.F &= ~(BIT_N |BIT_P |BIT_A |BIT_Z |BIT_S); /* clear these */ \ + if (var == 0) regs.F |= BIT_Z; \ + if (var & 0x80) regs.F |= BIT_S; \ + if ((var & 0x0f) == 0) regs.F |= BIT_A; \ + } + +#define dec(var) { \ + --var; \ + regs.F &= ~(BIT_N |BIT_P |BIT_A |BIT_Z |BIT_S); /* clear these */ \ + regs.F |= BIT_N; /* Not add */ \ + if (var == 0) regs.F |= BIT_Z; \ + if (var & 0x80) regs.F |= BIT_S; \ + if ((var & 0x0f) == 0) regs.F |= BIT_A; \ + } + + diff --git a/src/Makefile.bcc b/src/Makefile.bcc new file mode 100644 index 0000000..dc2cfe1 --- /dev/null +++ b/src/Makefile.bcc @@ -0,0 +1,68 @@ +# Makefile for Borlad C++ + +PRJDIR = .. + +!include $(PRJDIR)/Bcc.inc +CFLAGS = $(CFLAGS) -I$(PRJDIR) + +PORTS = mcs51 xa51 z80 avr ds390 pic +PORT_LIBS = mcs51/port.lib xa51/port.lib z80/port.lib avr/port.lib ds390/port.lib pic/port.lib + +OBJECTS = SDCCy.obj SDCClex.obj SDCChasht.obj SDCCmain.obj \ + SDCCsymt.obj SDCCopt.obj SDCCast.obj SDCCmem.obj SDCCval.obj \ + SDCCicode.obj SDCCbitv.obj SDCCset.obj SDCClabel.obj \ + SDCCBBlock.obj SDCCloop.obj SDCCcse.obj SDCCcflow.obj SDCCdflow.obj \ + SDCClrange.obj SDCCptropt.obj SDCCpeeph.obj SDCCglue.obj \ + SDCCasm.obj SDCCutil.obj SDCCmacro.obj SDCCdebug.obj cdbFile.obj SDCCerr.obj + +SLIBOBJS = $(SLIB)/NewAlloc.obj $(SLIB)/MySystem.obj $(SLIB)/BuildCmd.obj $(SLIB)/dbuf.obj + +TARGET = $(PRJDIR)/bin/sdcc.exe + +all: version.h $(TARGET) + +ports: $(PORT_LIBS) + +$(TARGET): $(OBJECTS) $(SLIBOBJS) ports + $(CC) -e$(TARGET) $(OBJECTS) $(SLIBOBJS) $(PORT_LIBS) $(LIBGC) + +version.h: ../ChangeLog + gawk -f version.awk $< > $@ + +mcs51/port.lib: + cd mcs51 + make -f Makefile.bcc + cd .. + +xa51/port.lib: + cd xa51 + make -f Makefile.bcc + cd .. + +z80/port.lib: + cd z80 + make -f Makefile.bcc + cd .. + +avr/port.lib: + cd avr + make -f Makefile.bcc + cd .. + +ds390/port.lib: + cd ds390 + make -f Makefile.bcc + cd .. + +pic/port.lib: + cd pic + make -f Makefile.bcc + cd .. + +SDCCy.h: SDCCy.c + +SDCCy.c: SDCC.y + $(YACC) -d -v -o $< SDCC.y + +SDCClex.c: SDCC.lex SDCCy.h + $(LEX) -o$< SDCC.lex diff --git a/src/Makefile.in b/src/Makefile.in new file mode 100644 index 0000000..b334928 --- /dev/null +++ b/src/Makefile.in @@ -0,0 +1,152 @@ +# +# +# + +srcdir = @srcdir@ +top_srcdir = @top_srcdir@ +top_builddir = @top_builddir@ +VPATH = @srcdir@ + +include $(top_builddir)/Makefile.common + +USE_ALT_LEX = 0 + +PORTS = $(shell cat ../ports.build) +ALLPORTS = $(shell cat ../ports.all) +PORT_LIBS = $(PORTS:%=%/port.a) + +LIBS = -lm @LIBS@ + +#CFLAGS += -Werror +CPPFLAGS += -I$(srcdir) +LDFLAGS = @LDFLAGS@ + +ifdef SDCC_SUB_VERSION +CFLAGS += -DSDCC_SUB_VERSION_STR=\"$(SDCC_SUB_VERSION)\" +endif + +SLIBOBJS = NewAlloc.o MySystem.o BuildCmd.o dbuf.o dbuf_string.o findme.o + +OBJECTS = SDCCy.o SDCChasht.o SDCCmain.o \ + SDCCsymt.o SDCCopt.o SDCCast.o SDCCmem.o SDCCval.o \ + SDCCicode.o SDCCbitv.o SDCCset.o SDCClabel.o \ + SDCCBBlock.o SDCCloop.o SDCCcse.o SDCCcflow.o SDCCdflow.o \ + SDCClrange.o SDCCptropt.o SDCCpeeph.o SDCCglue.o \ + SDCCasm.o SDCCmacro.o SDCCutil.o SDCCdebug.o cdbFile.o SDCCdwarf2.o\ + SDCCerr.o + +SPECIAL = SDCCy.h +ifeq ($(USE_ALT_LEX), 1) +OBJECTS += altlex.o +SPECIAL += reswords.h +else +OBJECTS += SDCClex.o +endif + +SLIBSOURCES = $(patsubst %.o,$(SLIB)/%.c,$(SLIBOBJS)) +SOURCES = $(patsubst %.o,%.c,$(OBJECTS)) + +TARGET = $(top_builddir)/bin/sdcc$(EXEEXT) + +# Compiling entire program or any subproject +# ------------------------------------------ +all: checkconf version.h $(TARGET) + +$(PORT_LIBS): FORCE + $(MAKE) -C $(dir $@) + +FORCE: + +$(top_builddir)/support/gc/libgc.a: + $(MAKE) -C $(top_builddir)/support/gc + +# Compiling and installing everything and runing test +# --------------------------------------------------- +install: all installdirs + $(INSTALL) $(TARGET) `echo $(DESTDIR)$(bindir)/sdcc$(EXEEXT)|sed '$(transform)'` + $(STRIP) `echo $(DESTDIR)$(bindir)/sdcc$(EXEEXT)|sed '$(transform)'` + + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(DESTDIR)$(bindir)/sdcc$(EXEEXT) + +# Performing self-test +# -------------------- +check: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + $(INSTALL) -d $(DESTDIR)$(bindir) + + +# Creating dependencies +# --------------------- +dep: version.h Makefile.dep + +Makefile.dep: version.h $(SOURCES) $(SLIBSOURCES) $(SPECIAL) + $(CPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.c,$^) >Makefile.dep + +# don't include Makefile.dep for the listed targets: +ifeq "$(findstring $(MAKECMDGOALS),uninstall check installcheck installdirs checkconf \ + clean distclean mostlyclean realclean)" "" + -include Makefile.dep +endif +include $(srcdir)/clean.mk + + +# My rules +# -------- +$(TARGET): $(SLIBOBJS) $(OBJECTS) $(PORT_LIBS) + $(CC) $(LDFLAGS) -o $@ $(SLIBOBJS) $(OBJECTS) $(PORT_LIBS) $(LIBDIRS) $(LIBS) + +.c.o: + $(CC) $(CFLAGS) $(CPPFLAGS) -c $< -o $@ + +$(SLIBOBJS):%.o:$(SLIB)/%.c + $(CC) $(CFLAGS) $(CPPFLAGS) -c $< -o $@ + +reswords.h: reswords.gperf Makefile + gperf -o -k1,2,4 -t -C -N is_reserved_word $< > $@ + +altlex.o: altlex.c SDCCy.h reswords.h + +SDCCy.h: SDCCy.c + +SDCCy.c: SDCC.y + $(YACC) -d -v -o $@ $< + +SDCClex.c: SDCC.lex SDCCy.h + $(LEX) -t $< >$@ + +version.h: ../ChangeLog + $(AWK) -f $(srcdir)/version.awk $< > $@ + +.y.c: + rm -f $*.cc $*.h + $(YACC) -d $< + mv y.tab.c $*.cc + mv y.tab.h $*.h + +.l.c: + rm -f $*.cc + $(LEX) -t $< >$*.cc + + +# Remaking configuration +# ---------------------- +checkconf: + @if [ -f $(top_builddir)/devel ]; then\ + $(MAKE) -f $(srcdir)/conf.mk srcdir="$(srcdir)" top_builddir="$(top_builddir)" \ + freshconf;\ + fi + +# End of main_in.mk/main.mk diff --git a/src/README b/src/README new file mode 100644 index 0000000..ac1f53d --- /dev/null +++ b/src/README @@ -0,0 +1,8 @@ +sdcc/src +-------- + +C compiler source. + +Everything shared is in this directory. Port specific files like the +code generator (gen.c), register allocator (ralloc.c) and support +functions are in the appropriate port directory (ie mcs51 for the 8051). diff --git a/src/SDCC.lex b/src/SDCC.lex new file mode 100644 index 0000000..0fc43d0 --- /dev/null +++ b/src/SDCC.lex @@ -0,0 +1,1151 @@ +/*----------------------------------------------------------------------- + SDCC.lex - lexical analyser for use with sdcc (free open source + compiler for 8/16 bit microcontrollers) + Written by : Sandeep Dutta . sandeep.dutta@usa.net (1997) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +B [0-1] +D [0-9] +L [a-zA-Z_$] +H [a-fA-F0-9] +E [Ee][+-]?{D}+ +FS (f|F|l|L) +IS (u|U|l|L)* + +%{ +#include +#include +#include +#include "common.h" +#include "newalloc.h" +#include "dbuf_string.h" + +#define TKEYWORD(token) return (isTargetKeyword(yytext) ? token :\ + check_type()) + +#define TKEYWORDSDCC(token) return (options.std_sdcc && isTargetKeyword(yytext)\ + ? token : check_type()) + +#define TKEYWORD99(token) return (options.std_c99 ? token : check_type()) + +extern char *filename; +extern int lineno; +int column = 0; /* current column */ + +/* global definitions */ +char *lexFilename; +int lexLineno = 1; + +/* local definitions */ +static struct dbuf_s asmbuff; /* reusable _asm buffer */ + +/* forward declarations */ +int yyerror(char *s); +static const char *stringLiteral(void); +static void count(void); +static void count_char(int); +static int process_pragma(const char *); +static int check_type(void); +static int isTargetKeyword(const char *s); +static int checkCurrFile(const char *s); +%} + +%x asm +%% +_?"_asm" { + count(); + if (!options.std_sdcc && yytext[1] != '_') + return check_type(); + if (asmbuff.buf == NULL) + dbuf_init(&asmbuff, INITIAL_INLINEASM); + else + dbuf_set_length(&asmbuff, 0); + + BEGIN(asm); +} +_?"_endasm" { + count(); + if (!options.std_sdcc && yytext[1] != '_') + { + dbuf_append_str(&asmbuff, yytext); + } + else + { + yylval.yyinline = dbuf_c_str(&asmbuff); + BEGIN(INITIAL); + return (INLINEASM); + } +} +\n { + count(); + dbuf_append_char(&asmbuff, *yytext); +} +. { + dbuf_append_char(&asmbuff, *yytext); +} +"at" { count(); TKEYWORDSDCC(AT); } +"__at" { count(); TKEYWORD(AT); } +"auto" { count(); return(AUTO); } +"bit" { count(); TKEYWORDSDCC(BIT); } +"__bit" { count(); TKEYWORD(BIT); } +"break" { count(); return(BREAK); } +"case" { count(); return(CASE); } +"char" { count(); return(CHAR); } +"code" { count(); TKEYWORDSDCC(CODE); } +"__code" { count(); TKEYWORD(CODE); } +"const" { count(); return(CONST); } +"continue" { count(); return(CONTINUE); } +"critical" { count(); TKEYWORDSDCC(CRITICAL); } +"__critical" { count(); TKEYWORD(CRITICAL); } +"data" { count(); TKEYWORDSDCC(DATA); } +"__data" { count(); TKEYWORD(DATA); } +"default" { count(); return(DEFAULT); } +"do" { count(); return(DO); } +"double" { count(); werror(W_DOUBLE_UNSUPPORTED);return(FLOAT); } +"else" { count(); return(ELSE); } +"enum" { count(); return(ENUM); } +"extern" { count(); return(EXTERN); } +"far" { count(); TKEYWORDSDCC(XDATA); } +"__far" { count(); TKEYWORD(XDATA); } +"eeprom" { count(); TKEYWORDSDCC(EEPROM); } +"__eeprom" { count(); TKEYWORD(EEPROM); } +"float" { count(); return(FLOAT); } +"fixed16x16" { count(); TKEYWORDSDCC(FIXED16X16); } +"__fixed16x16" { count(); TKEYWORD(FIXED16X16); } +"flash" { count(); TKEYWORDSDCC(CODE); } +"__flash" { count(); TKEYWORD(CODE); } +"for" { count(); return(FOR); } +"goto" { count(); return(GOTO); } +"idata" { count(); TKEYWORDSDCC(IDATA); } +"__idata" { count(); TKEYWORD(IDATA); } +"if" { count(); return(IF); } +"int" { count(); return(INT); } +"interrupt" { count(); TKEYWORDSDCC(INTERRUPT); } +"__interrupt" { count(); TKEYWORD(INTERRUPT); } +"nonbanked" { count(); TKEYWORDSDCC(NONBANKED); } +"__nonbanked" { count(); TKEYWORD(NONBANKED); } +"banked" { count(); TKEYWORDSDCC(BANKED); } +"__banked" { count(); TKEYWORD(BANKED); } +"long" { count(); return(LONG); } +"near" { count(); TKEYWORDSDCC(DATA); } +"__near" { count(); TKEYWORD(DATA); } +"pdata" { count(); TKEYWORDSDCC(PDATA); } +"__pdata" { count(); TKEYWORD(PDATA); } +"reentrant" { count(); TKEYWORDSDCC(REENTRANT); } +"__reentrant" { count(); TKEYWORD(REENTRANT); } +"shadowregs" { count(); TKEYWORDSDCC(SHADOWREGS); } +"__shadowregs" { count(); TKEYWORD(SHADOWREGS); } +"wparam" { count(); TKEYWORDSDCC(WPARAM); } +"__wparam" { count(); TKEYWORD(WPARAM); } +"register" { count(); return(REGISTER); } +"return" { count(); return(RETURN); } +"sfr" { count(); TKEYWORDSDCC(SFR); } +"__sfr" { count(); TKEYWORD(SFR); } +"sfr16" { count(); TKEYWORDSDCC(SFR16); } +"__sfr16" { count(); TKEYWORD(SFR16); } +"sfr32" { count(); TKEYWORDSDCC(SFR32); } +"__sfr32" { count(); TKEYWORD(SFR32); } +"sbit" { count(); TKEYWORDSDCC(SBIT); } +"__sbit" { count(); TKEYWORD(SBIT); } +"short" { count(); return(SHORT); } +"signed" { count(); return(SIGNED); } +"sizeof" { count(); return(SIZEOF); } +"sram" { count(); TKEYWORDSDCC(XDATA); } +"__sram" { count(); TKEYWORD(XDATA); } +"static" { count(); return(STATIC); } +"struct" { count(); return(STRUCT); } +"switch" { count(); return(SWITCH); } +"typedef" { count(); return(TYPEDEF); } +"union" { count(); return(UNION); } +"unsigned" { count(); return(UNSIGNED); } +"void" { count(); return(VOID); } +"volatile" { count(); return(VOLATILE); } +"using" { count(); TKEYWORDSDCC(USING); } +"__using" { count(); TKEYWORD(USING); } +"_naked" { count(); TKEYWORDSDCC(NAKED); } +"__naked" { count(); TKEYWORD(NAKED); } +"while" { count(); return(WHILE); } +"xdata" { count(); TKEYWORDSDCC(XDATA); } +"__xdata" { count(); TKEYWORD(XDATA); } +"..." { count(); return(VAR_ARGS); } +"__typeof" { count(); return TYPEOF; } +"_JavaNative" { count(); TKEYWORD(JAVANATIVE); } +"_overlay" { count(); TKEYWORDSDCC(OVERLAY); } +"__overlay" { count(); TKEYWORD(OVERLAY); } +"inline" { count(); TKEYWORD99(INLINE); } +"restrict" { count(); TKEYWORD99(RESTRICT); } +{L}({L}|{D})* { + if (!options.dollars_in_ident && strchr(yytext, '$')) + { + yyerror("stray '$' in program"); + } + count(); + return(check_type()); +} +0[bB]{B}+{IS}? { + if (!options.std_sdcc) + { + yyerror("binary (0b) constants are not allowed in ISO C"); + } + count(); + yylval.val = constVal(yytext); + return(CONSTANT); +} +0[xX]{H}+{IS}? { count(); yylval.val = constVal(yytext); return(CONSTANT); } +0[0-7]*{IS}? { count(); yylval.val = constVal(yytext); return(CONSTANT); } +[1-9]{D}*{IS}? { count(); yylval.val = constVal(yytext); return(CONSTANT); } +'(\\.|[^\\'])+' { count();yylval.val = charVal (yytext); return(CONSTANT); /* ' make syntax highliter happy */ } +{D}+{E}{FS}? { count(); yylval.val = constFloatVal(yytext);return(CONSTANT); } +{D}*"."{D}+({E})?{FS}? { count(); yylval.val = constFloatVal(yytext);return(CONSTANT); } +{D}+"."{D}*({E})?{FS}? { count(); yylval.val = constFloatVal(yytext);return(CONSTANT); } +\" { count(); yylval.val=strVal(stringLiteral()); return(STRING_LITERAL); } +">>=" { count(); yylval.yyint = RIGHT_ASSIGN ; return(RIGHT_ASSIGN); } +"<<=" { count(); yylval.yyint = LEFT_ASSIGN ; return(LEFT_ASSIGN); } +"+=" { count(); yylval.yyint = ADD_ASSIGN ; return(ADD_ASSIGN); } +"-=" { count(); yylval.yyint = SUB_ASSIGN ; return(SUB_ASSIGN); } +"*=" { count(); yylval.yyint = MUL_ASSIGN ; return(MUL_ASSIGN); } +"/=" { count(); yylval.yyint = DIV_ASSIGN ; return(DIV_ASSIGN); } +"%=" { count(); yylval.yyint = MOD_ASSIGN ; return(MOD_ASSIGN); } +"&=" { count(); yylval.yyint = AND_ASSIGN ; return(AND_ASSIGN); } +"^=" { count(); yylval.yyint = XOR_ASSIGN ; return(XOR_ASSIGN); } +"|=" { count(); yylval.yyint = OR_ASSIGN ; return(OR_ASSIGN); } +">>" { count(); return(RIGHT_OP); } +"<<" { count(); return(LEFT_OP); } +"++" { count(); return(INC_OP); } +"--" { count(); return(DEC_OP); } +"->" { count(); return(PTR_OP); } +"&&" { count(); return(AND_OP); } +"||" { count(); return(OR_OP); } +"<=" { count(); return(LE_OP); } +">=" { count(); return(GE_OP); } +"==" { count(); return(EQ_OP); } +"!=" { count(); return(NE_OP); } +";" { count(); return(';'); } +"{" { count(); NestLevel++ ; ignoreTypedefType = 0; return('{'); } +"}" { count(); NestLevel--; return('}'); } +"," { count(); return(','); } +":" { count(); return(':'); } +"=" { count(); return('='); } +"(" { count(); ignoreTypedefType = 0; return('('); } +")" { count(); return(')'); } +"[" { count(); return('['); } +"]" { count(); return(']'); } +"." { count(); return('.'); } +"&" { count(); return('&'); } +"!" { count(); return('!'); } +"~" { count(); return('~'); } +"-" { count(); return('-'); } +"+" { count(); return('+'); } +"*" { count(); return('*'); } +"/" { count(); return('/'); } +"%" { count(); return('%'); } +"<" { count(); return('<'); } +">" { count(); return('>'); } +"^" { count(); return('^'); } +"|" { count(); return('|'); } +"?" { count(); return('?'); } +^#pragma.*$ { count(); process_pragma(yytext); } +^(#line.*"\n")|(#.*"\n") { count(); checkCurrFile(yytext); } + +^[^(]+"("[0-9]+") : error"[^\n]+ { werror(E_PRE_PROC_FAILED, yytext); count(); } +^[^(]+"("[0-9]+") : warning"[^\n]+ { werror(W_PRE_PROC_WARNING, yytext); count(); } +"\r\n" { count(); } +"\n" { count(); } +[ \t\v\f] { count(); } +\\ { + int ch = input(); + + if (ch == '\n') + count_char(ch); + else + { + /* that could have been removed by the preprocessor anyway */ + werror (W_STRAY_BACKSLASH, column); + unput(ch); + } +} +. { count(); } +%% + +/* flex 2.5.31 undefines yytext_ptr, so we have to define it again */ +#ifndef yytext_ptr +#define yytext_ptr yytext +#endif + + +static int checkCurrFile (const char *s) +{ + int lNum; + char *tptr; + + /* skip '#' character */ + if (*s++ != '#') + return 0; + + /* check if this is a #line + this is not standard and can be removed in the future */ +#define LINE_STR "line" +#define LINE_LEN ((sizeof LINE_STR) - 1) + + if (strncmp(s, LINE_STR, LINE_LEN) == 0) + s += LINE_LEN; + + /* get the line number */ + lNum = strtol(s, &tptr, 10); + if (tptr == s || !isspace((unsigned char)*tptr)) + return 0; + s = tptr; + + /* adjust the line number */ + lineno = lexLineno = lNum; + + /* now see if we have a file name */ + while (*s != '"' && *s) + ++s; + + if (!*s) + { + /* no file name: return */ + return 0; + } + + /* skip the double quote */ + ++s; + + /* get the file name and see if it is different from current one. + in c1mode fullSrcFileName is NULL */ + if (fullSrcFileName && + strncmp(s, fullSrcFileName, strlen(fullSrcFileName)) == 0 && fullSrcFileName[strlen(fullSrcFileName) - 1] == '"') + { + lexFilename = fullSrcFileName; + } + else + { + const char *sb = s; + char *tmpFname; + + /* find the end of the file name */ + while (*s && *s != '"') + ++s; + + tmpFname = Safe_malloc(s - sb + 1); + memcpy(tmpFname, sb, s - sb); + tmpFname[s - sb] = '\0'; + + lexFilename = Safe_malloc(s - sb + 1); + copyStr(lexFilename, tmpFname); + } + filename = lexFilename; + + return 0; +} + +static void count_char(int ch) +{ + switch (ch) + { + case '\n': + column = 0; + lineno = ++lexLineno; + break; + + case '\t': + column += 8 - (column % 8); + break; + + default: + ++column; + break; + } +} + +static void count(void) +{ + const char *p; + + for (p = yytext; *p; ++p) + count_char(*p); +} + +static int check_type(void) +{ + symbol *sym = findSym(SymbolTab, NULL, yytext); + + strncpyz(yylval.yychar, yytext, SDCC_NAME_MAX); + + /* check if it is in the table as a typedef */ + if (!ignoreTypedefType && sym && IS_SPEC (sym->etype) + && SPEC_TYPEDEF (sym->etype) && findSym(TypedefTab, NULL, yytext)) + return (TYPE_NAME); + else + return(IDENTIFIER); +} + +/* + * Change by JTV 2001-05-19 to not concantenate strings + * to support ANSI hex and octal escape sequences in string literals + */ + +static const char *stringLiteral(void) +{ +#define STR_BUF_CHUNCK_LEN 1024 + int ch; + static struct dbuf_s dbuf; /* reusable string literal buffer */ + + if (dbuf.alloc == 0) + dbuf_init(&dbuf, STR_BUF_CHUNCK_LEN); + else + dbuf_set_length(&dbuf, 0); + + dbuf_append_char(&dbuf, '"'); + + /* put into the buffer till we hit the first \" */ + + for (; ; ) + { + ch = input(); + count_char(ch); + if (ch == EOF) + break; + + switch (ch) + { + case '\\': + /* if it is a \ then escape char's are allowed */ + ch = input(); + count_char(ch); + if (ch == '\n') + { + /* \ is a continuator */ + } + else + { + char buf[2]; + + if (ch == EOF) + goto out; + + buf[0] = '\\'; + buf[1] = ch; + dbuf_append(&dbuf, buf, 2); /* get the escape char, no further check */ + } + break; /* carry on */ + + case '\n': + /* if new line we have a new line break, which is illegal */ + werror(W_NEWLINE_IN_STRING); + dbuf_append_char(&dbuf, '\n'); + break; + + case '"': + /* if this is a quote then we have work to do */ + /* find the next non whitespace character */ + /* if that is a double quote then carry on */ + dbuf_append_char(&dbuf, '"'); /* Pass end of this string or substring to evaluator */ + while ((ch = input()) && (isspace(ch) || ch == '\\' || ch == '#')) + { + switch (ch) + { + case '\\': + count_char(ch); + if ((ch = input()) != '\n') + { + werror(W_STRAY_BACKSLASH, column); + if (ch != EOF) + unput(ch); + else + count_char(ch); + } + else + count_char(ch); + break; + + case '\n': + count_char(ch); + break; + + case '#': + if (column == 0) + { + /* # at the beginning of the line: collect the entire line */ + struct dbuf_s linebuf; + const char *line; + + count_char(ch); + + dbuf_init(&linebuf, STR_BUF_CHUNCK_LEN); + dbuf_append_char(&linebuf, '#'); + + while ((ch = input()) != EOF && ch != '\n') + dbuf_append_char(&linebuf, (char)ch); + + if (ch == '\n') + count_char(ch); + + line = dbuf_c_str(&linebuf); + + /* process the line */ + if (startsWith(line, "#pragma")) + process_pragma(line); + else + checkCurrFile(line); + + dbuf_destroy(&linebuf); + } + else + { + unput(ch); + goto out; + } + + default: + count_char(ch); + break; + } + } + + if (ch == EOF) + goto out; + + if (ch != '"') + { + unput(ch); + goto out; + } + count_char(ch); + break; + + default: + dbuf_append_char(&dbuf, (char)ch); /* Put next substring introducer into output string */ + } + } + +out: + return dbuf_c_str(&dbuf); +} + + +enum { + P_SAVE = 1, + P_RESTORE, + P_NOINDUCTION, + P_NOINVARIANT, + P_INDUCTION, + P_STACKAUTO, + P_NOJTBOUND, + P_NOOVERLAY, + P_LESSPEDANTIC, + P_NOGCSE, + P_CALLEE_SAVES, + P_EXCLUDE, + P_NOIV, + P_LOOPREV, + P_OVERLAY_, /* I had a strange conflict with P_OVERLAY while */ + /* cross-compiling for MINGW32 with gcc 3.2 */ + P_DISABLEWARN, + P_OPTCODESPEED, + P_OPTCODESIZE, + P_OPTCODEBALANCED, + P_STD_C89, + P_STD_C99, + P_STD_SDCC89, + P_STD_SDCC99, + P_CODESEG, + P_CONSTSEG +}; + + +/* SAVE/RESTORE stack */ +#define SAVE_RESTORE_SIZE 128 + +STACK_DCL(options_stack, struct options *, SAVE_RESTORE_SIZE) +STACK_DCL(optimize_stack, struct optimize *, SAVE_RESTORE_SIZE) +STACK_DCL(SDCCERRG_stack, struct SDCCERRG *, SAVE_RESTORE_SIZE) + +/* + * cloneXxx functions should be updated every time a new set is + * added to the options or optimize structure! + */ + +static struct options *cloneOptions(struct options *opt) +{ + struct options *new_opt; + + new_opt = Safe_malloc(sizeof (struct options)); + + /* clone scalar values */ + *new_opt = *opt; + + /* clone sets */ + new_opt->calleeSavesSet = setFromSetNonRev(opt->calleeSavesSet); + new_opt->excludeRegsSet = setFromSetNonRev(opt->excludeRegsSet); + /* not implemented yet: */ + /* new_opt->olaysSet = setFromSetNonRev(opt->olaysSet); */ + + return new_opt; +} + +static struct optimize *cloneOptimize(struct optimize *opt) +{ + struct optimize *new_opt; + + new_opt = Safe_malloc(sizeof (struct optimize)); + + /* clone scalar values */ + *new_opt = *opt; + + return new_opt; +} + +static struct SDCCERRG *cloneSDCCERRG (struct SDCCERRG *val) +{ + struct SDCCERRG *new_val; + + new_val = Safe_malloc(sizeof (struct SDCCERRG)); + + /* clone scalar values */ + *new_val = *val; + + return new_val; +} + +static void copyAndFreeOptions(struct options *dest, struct options *src) +{ + /* delete dest sets */ + deleteSet(&dest->calleeSavesSet); + deleteSet(&dest->excludeRegsSet); + /* not implemented yet: */ + /* deleteSet(&dest->olaysSet); */ + + /* copy src to dest */ + *dest = *src; + + Safe_free(src); +} + +static void copyAndFreeOptimize(struct optimize *dest, struct optimize *src) +{ + /* copy src to dest */ + *dest = *src; + + Safe_free(src); +} + +static void copyAndFreeSDCCERRG(struct SDCCERRG *dest, struct SDCCERRG *src) +{ + /* copy src to dest */ + *dest = *src; + + Safe_free(src); +} + +/* + * returns 1 if the pragma was processed, 0 if not + */ +static int doPragma(int id, const char *name, const char *cp) +{ + struct pragma_token_s token; + int err = 0; + int processed = 1; + + init_pragma_token(&token); + + switch (id) + { + case P_SAVE: + { + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + STACK_PUSH(options_stack, cloneOptions(&options)); + STACK_PUSH(optimize_stack, cloneOptimize(&optimize)); + STACK_PUSH(SDCCERRG_stack, cloneSDCCERRG(&_SDCCERRG)); + } + break; + + case P_RESTORE: + { + struct options *optionsp; + struct optimize *optimizep; + struct SDCCERRG *sdccerrgp; + + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + optionsp = STACK_POP(options_stack); + copyAndFreeOptions(&options, optionsp); + + optimizep = STACK_POP(optimize_stack); + copyAndFreeOptimize(&optimize, optimizep); + + sdccerrgp = STACK_POP(SDCCERRG_stack); + copyAndFreeSDCCERRG(&_SDCCERRG, sdccerrgp); + } + break; + + case P_NOINDUCTION: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + optimize.loopInduction = 0; + break; + + case P_NOINVARIANT: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + optimize.loopInvariant = 0; + break; + + case P_INDUCTION: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + optimize.loopInduction = 1; + break; + + case P_STACKAUTO: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + options.stackAuto = 1; + break; + + case P_NOJTBOUND: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + optimize.noJTabBoundary = 1; + break; + + case P_NOGCSE: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + optimize.global_cse = 0; + break; + + case P_NOOVERLAY: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + options.noOverlay = 1; + break; + + case P_LESSPEDANTIC: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + options.lessPedantic = 1; + setErrorLogLevel(ERROR_LEVEL_WARNING); + break; + + case P_CALLEE_SAVES: + /* append to the functions already listed + in callee-saves */ + setParseWithComma(&options.calleeSavesSet, cp); + err = -1; + break; + + case P_EXCLUDE: + { + deleteSet(&options.excludeRegsSet); + setParseWithComma(&options.excludeRegsSet, cp); + err = -1; + } + break; + + case P_NOIV: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + options.noiv = 1; + break; + + case P_LOOPREV: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + optimize.noLoopReverse = 1; + break; + + case P_OVERLAY_: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + break; /* notyet */ + + case P_DISABLEWARN: + { + int warn; + + cp = get_pragma_token(cp, &token); + if (TOKEN_INT != token.type) + { + err = 1; + break; + } + warn = token.val.int_val; + + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + if (warn < MAX_ERROR_WARNING) + setWarningDisabled(warn); + } + break; + + case P_OPTCODESPEED: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + optimize.codeSpeed = 1; + optimize.codeSize = 0; + break; + + case P_OPTCODESIZE: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + optimize.codeSpeed = 0; + optimize.codeSize = 1; + break; + + case P_OPTCODEBALANCED: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + optimize.codeSpeed = 0; + optimize.codeSize = 0; + break; + + case P_STD_C89: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + options.std_c99 = 0; + options.std_sdcc = 0; + break; + + case P_STD_C99: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + options.std_c99 = 1; + options.std_sdcc = 0; + break; + + case P_STD_SDCC89: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + options.std_c99 = 0; + options.std_sdcc = 1; + break; + + case P_STD_SDCC99: + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + options.std_c99 = 1; + options.std_sdcc = 1; + break; + + case P_CODESEG: + case P_CONSTSEG: + { + struct dbuf_s segname; + + cp = get_pragma_token(cp, &token); + if (token.type == TOKEN_EOL) + { + err = 1; + break; + } + + dbuf_init(&segname, 16); + dbuf_printf(&segname, "%-8s(CODE)", get_pragma_string(&token)); + + cp = get_pragma_token(cp, &token); + if (token.type != TOKEN_EOL) + { + dbuf_destroy(&segname); + err = 1; + break; + } + + if (id == P_CODESEG) + options.code_seg = dbuf_detach(&segname); + else + options.const_seg = dbuf_detach(&segname); + } + break; + + default: + processed = 0; + break; + } + + get_pragma_token(cp, &token); + + if (1 == err || (0 == err && token.type != TOKEN_EOL)) + werror(W_BAD_PRAGMA_ARGUMENTS, name); + + free_pragma_token(&token); + return processed; +} + +static struct pragma_s pragma_tbl[] = { + { "save", P_SAVE, 0, doPragma }, + { "restore", P_RESTORE, 0, doPragma }, + { "noinduction", P_NOINDUCTION, 0, doPragma }, + { "noinvariant", P_NOINVARIANT, 0, doPragma }, + { "noloopreverse", P_LOOPREV, 0, doPragma }, + { "induction", P_INDUCTION, 0, doPragma }, + { "stackauto", P_STACKAUTO, 0, doPragma }, + { "nojtbound", P_NOJTBOUND, 0, doPragma }, + { "nogcse", P_NOGCSE, 0, doPragma }, + { "nooverlay", P_NOOVERLAY, 0, doPragma }, + { "callee_saves", P_CALLEE_SAVES, 0, doPragma }, + { "exclude", P_EXCLUDE, 0, doPragma }, + { "noiv", P_NOIV, 0, doPragma }, + { "overlay", P_OVERLAY_, 0, doPragma }, + { "less_pedantic", P_LESSPEDANTIC, 0, doPragma }, + { "disable_warning",P_DISABLEWARN, 0, doPragma }, + { "opt_code_speed", P_OPTCODESPEED, 0, doPragma }, + { "opt_code_size", P_OPTCODESIZE, 0, doPragma }, + { "opt_code_balanced", P_OPTCODEBALANCED, 0, doPragma }, + { "std_c89", P_STD_C89, 0, doPragma }, + { "std_c99", P_STD_C99, 0, doPragma }, + { "std_sdcc89", P_STD_SDCC89, 0, doPragma }, + { "std_sdcc99", P_STD_SDCC99, 0, doPragma }, + { "codeseg", P_CODESEG, 0, doPragma }, + { "constseg", P_CONSTSEG, 0, doPragma }, + { NULL, 0, 0, NULL }, +}; + +/* + * returns 1 if the pragma was processed, 0 if not + */ +int +process_pragma_tbl(const struct pragma_s *pragma_tbl, const char *s) +{ + struct pragma_token_s token; + int i; + int ret = 0; + + init_pragma_token(&token); + + s = get_pragma_token(s, &token); + + /* skip separating whitespace */ + while ('\n' != *s && isspace((unsigned char)*s)) + s++; + + for (i = 0; NULL != pragma_tbl[i].name; ++i) + { + /* now compare and do what needs to be done */ + if (strcmp(get_pragma_string(&token), pragma_tbl[i].name) == 0) + { + if (pragma_tbl[i].deprecated != 0) + werror(W_DEPRECATED_PRAGMA, pragma_tbl[i].name); + + ret = (*pragma_tbl[i].func)(pragma_tbl[i].id, pragma_tbl[i].name, s); + break; + } + } + + free_pragma_token(&token); + return ret; +} + +static int process_pragma(const char *s) +{ + struct pragma_token_s token; + + init_pragma_token(&token); + + s = get_pragma_token(s, &token); + if (0 != strcmp("#pragma", get_pragma_string(&token))) + { + /* Oops, womething went totally wrong - internal error */ + wassertl(0, "pragma parser internal error"); + } + + /* skip spaces */ + while ('\n' != *s && isspace((unsigned char)*s)) + ++s; + + /* First give the port a chance */ + if (port->process_pragma && port->process_pragma(s)) + return 1; + + if (process_pragma_tbl(pragma_tbl, s)) + { + return 1; + } + else + { + werror(W_UNKNOWN_PRAGMA, s); + return 0; + } +} + +/* will return 1 if the string is a part + of a target specific keyword */ +static int isTargetKeyword(const char *s) +{ + int i; + + if (port->keywords == NULL) + return 0; + + if (s[0] == '_' && s[1] == '_') + { + /* Keywords in the port's array have either 0 or 1 underscore, */ + /* so skip over the appropriate number of chars when comparing */ + for (i = 0 ; port->keywords[i] ; i++ ) + { + if (port->keywords[i][0] == '_' && + strcmp(port->keywords[i],s+1) == 0) + return 1; + else if (strcmp(port->keywords[i],s+2) == 0) + return 1; + } + } + else + { + for (i = 0 ; port->keywords[i] ; i++ ) + { + if (strcmp(port->keywords[i],s) == 0) + return 1; + } + } + + return 0; +} + +int yywrap(void) +{ + if (!STACK_EMPTY(options_stack) || !STACK_EMPTY(optimize_stack)) + werror(W_SAVE_RESTORE); + + return 1; +} + +int yyerror(char *s) +{ + fflush(stdout); + + if(options.vc_err_style) + fprintf(stderr, "\n%s(%d) : %s: token -> '%s' ; column %d\n", + lexFilename, lexLineno, s, yytext, column); + else + fprintf(stderr, "\n%s:%d: %s: token -> '%s' ; column %d\n", + lexFilename, lexLineno, s ,yytext, column); + fatalError++; + + return 0; +} diff --git a/src/SDCC.y b/src/SDCC.y new file mode 100644 index 0000000..fa165ce --- /dev/null +++ b/src/SDCC.y @@ -0,0 +1,1734 @@ +/*----------------------------------------------------------------------- + + SDCC.y - parser definition file for sdcc : + Written By : Sandeep Dutta . sandeep.dutta@usa.net (1997) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +%{ +#include +#include +#include +#include "SDCCglobl.h" +#include "SDCCsymt.h" +#include "SDCChasht.h" +#include "SDCCval.h" +#include "SDCCmem.h" +#include "SDCCast.h" +#include "port.h" +#include "newalloc.h" +#include "SDCCerr.h" +#include "SDCCutil.h" + +extern int yyerror (char *); +extern FILE *yyin; +int NestLevel = 0 ; /* current NestLevel */ +int stackPtr = 1 ; /* stack pointer */ +int xstackPtr = 0 ; /* xstack pointer */ +int reentrant = 0 ; +int blockNo = 0 ; /* sequential block number */ +int currBlockno=0 ; +int inCritical= 0 ; +int seqPointNo= 1 ; /* sequence point number */ +int ignoreTypedefType=0; +extern int yylex(); +int yyparse(void); +extern int noLineno ; +char lbuff[1024]; /* local buffer */ + +/* break & continue stacks */ +STACK_DCL(continueStack ,symbol *,MAX_NEST_LEVEL) +STACK_DCL(breakStack ,symbol *,MAX_NEST_LEVEL) +STACK_DCL(forStack ,symbol *,MAX_NEST_LEVEL) +STACK_DCL(swStk ,ast *,MAX_NEST_LEVEL) +STACK_DCL(blockNum,int,MAX_NEST_LEVEL*3) + +value *cenum = NULL ; /* current enumeration type chain*/ +bool uselessDecl = TRUE; + +#define YYDEBUG 1 + +%} +%expect 6 + +%union { + symbol *sym ; /* symbol table pointer */ + structdef *sdef; /* structure definition */ + char yychar[SDCC_NAME_MAX+1]; + sym_link *lnk ; /* declarator or specifier */ + int yyint; /* integer value returned */ + value *val ; /* for integer constant */ + initList *ilist; /* initial list */ + const char *yyinline; /* inlined assembler code */ + ast *asts; /* expression tree */ +} + +%token IDENTIFIER TYPE_NAME +%token CONSTANT STRING_LITERAL +%token SIZEOF TYPEOF +%token PTR_OP INC_OP DEC_OP LEFT_OP RIGHT_OP LE_OP GE_OP EQ_OP NE_OP +%token AND_OP OR_OP +%token MUL_ASSIGN DIV_ASSIGN MOD_ASSIGN ADD_ASSIGN +%token SUB_ASSIGN LEFT_ASSIGN RIGHT_ASSIGN AND_ASSIGN +%token XOR_ASSIGN OR_ASSIGN +%token TYPEDEF EXTERN STATIC AUTO REGISTER CODE EEPROM INTERRUPT SFR SFR16 SFR32 +%token AT SBIT REENTRANT USING XDATA DATA IDATA PDATA VAR_ARGS CRITICAL +%token NONBANKED BANKED SHADOWREGS WPARAM +%token CHAR SHORT INT LONG SIGNED UNSIGNED FLOAT DOUBLE FIXED16X16 CONST VOLATILE VOID BIT +%token STRUCT UNION ENUM RANGE FAR +%token CASE DEFAULT IF ELSE SWITCH WHILE DO FOR GOTO CONTINUE BREAK RETURN +%token NAKED JAVANATIVE OVERLAY +%token INLINEASM +%token IFX ADDRESS_OF GET_VALUE_AT_ADDRESS SPIL UNSPIL GETHBIT GETABIT GETBYTE GETWORD +%token BITWISEAND UNARYMINUS IPUSH IPOP PCALL ENDFUNCTION JUMPTABLE +%token RRC RLC +%token CAST CALL PARAM NULLOP BLOCK LABEL RECEIVE SEND ARRAYINIT +%token DUMMY_READ_VOLATILE ENDCRITICAL SWAP INLINE RESTRICT + +%type Interrupt_storage +%type identifier declarator declarator2 declarator3 enumerator_list enumerator +%type struct_declarator function_declarator function_declarator2 +%type struct_declarator_list struct_declaration struct_declaration_list +%type declaration init_declarator_list init_declarator +%type declaration_list identifier_list +%type declarator2_function_attributes while do for critical +%type pointer type_specifier_list type_specifier type_name +%type storage_class_specifier struct_or_union_specifier function_specifier +%type declaration_specifiers sfr_reg_bit sfr_attributes type_specifier2 +%type function_attribute function_attributes enum_specifier +%type abstract_declarator abstract_declarator2 unqualified_pointer +%type parameter_type_list parameter_list parameter_declaration opt_assign_expr +%type stag opt_stag +%type primary_expr +%type postfix_expr unary_expr cast_expr multiplicative_expr +%type additive_expr shift_expr relational_expr equality_expr +%type and_expr exclusive_or_expr inclusive_or_expr logical_or_expr +%type logical_and_expr conditional_expr assignment_expr constant_expr +%type expr argument_expr_list function_definition expr_opt +%type statement_list statement labeled_statement compound_statement +%type expression_statement selection_statement iteration_statement +%type jump_statement function_body else_statement string_literal +%type critical_statement +%type initializer initializer_list +%type unary_operator assignment_operator struct_or_union + +%start file + +%% + +file + : /* empty */ + { if (!options.lessPedantic) + werror(W_EMPTY_SOURCE_FILE); + } + | program + ; + +program + : external_definition + | program external_definition + ; + +external_definition + : function_definition { + blockNo=0; + } + | declaration { + ignoreTypedefType = 0; + if ($1 && $1->type + && IS_FUNC($1->type)) + { + /* The only legal storage classes for + * a function prototype (declaration) + * are extern and static. extern is the + * default. Thus, if this function isn't + * explicitly marked static, mark it + * extern. + */ + if ($1->etype + && IS_SPEC($1->etype) + && !SPEC_STAT($1->etype)) + { + SPEC_EXTR($1->etype) = 1; + } + } + addSymChain (&$1); + allocVariables ($1) ; + cleanUpLevel (SymbolTab,1); + } + ; + +function_definition + : function_declarator function_body { /* function type not specified */ + /* assume it to be 'int' */ + addDecl($1,0,newIntLink()); + $$ = createFunction($1,$2); + } + | declaration_specifiers function_declarator function_body + { + pointerTypes($2->type,copyLinkChain($1)); + if (options.unsigned_char && SPEC_NOUN($1) == V_CHAR && !($1)->select.s.b_signed) + SPEC_USIGN($1) = 1; + addDecl($2,0,$1); + $$ = createFunction($2,$3); + } + ; + +function_attribute + : function_attributes + | function_attributes function_attribute { $$ = mergeSpec($1,$2,"function_attribute"); } + ; + +function_attributes + : USING constant_expr { + $$ = newLink(SPECIFIER) ; + FUNC_REGBANK($$) = (int) ulFromVal(constExprValue($2,TRUE)); + } + | REENTRANT { $$ = newLink (SPECIFIER); + FUNC_ISREENT($$)=1; + } + | CRITICAL { $$ = newLink (SPECIFIER); + FUNC_ISCRITICAL($$) = 1; + } + | NAKED { $$ = newLink (SPECIFIER); + FUNC_ISNAKED($$)=1; + } + | JAVANATIVE { $$ = newLink (SPECIFIER); + FUNC_ISJAVANATIVE($$)=1; + } + | OVERLAY { $$ = newLink (SPECIFIER); + FUNC_ISOVERLAY($$)=1; + } + | NONBANKED {$$ = newLink (SPECIFIER); + FUNC_NONBANKED($$) = 1; + if (FUNC_BANKED($$)) { + werror(W_BANKED_WITH_NONBANKED); + } + } + | SHADOWREGS {$$ = newLink (SPECIFIER); + FUNC_ISSHADOWREGS($$) = 1; + } + | WPARAM {$$ = newLink (SPECIFIER); + FUNC_ISWPARAM($$) = 1; + } + | BANKED {$$ = newLink (SPECIFIER); + FUNC_BANKED($$) = 1; + if (FUNC_NONBANKED($$)) { + werror(W_BANKED_WITH_NONBANKED); + } + if (SPEC_STAT($$)) { + werror(W_BANKED_WITH_STATIC); + } + } + | Interrupt_storage + { + $$ = newLink (SPECIFIER) ; + FUNC_INTNO($$) = $1 ; + FUNC_ISISR($$) = 1; + } + ; + +function_body + : compound_statement + | declaration_list compound_statement + { + werror(E_OLD_STYLE,($1 ? $1->name: "")) ; + exit(1); + } + ; + +primary_expr + : identifier { $$ = newAst_VALUE(symbolVal($1)); } + | CONSTANT { $$ = newAst_VALUE($1); } + | string_literal + | '(' expr ')' { $$ = $2 ; } + ; + +string_literal + : STRING_LITERAL { $$ = newAst_VALUE($1); } + ; + +postfix_expr + : primary_expr + | postfix_expr '[' expr ']' { $$ = newNode ('[', $1, $3) ; } + | postfix_expr '(' ')' { $$ = newNode (CALL,$1,NULL); + $$->left->funcName = 1;} + | postfix_expr '(' argument_expr_list ')' + { + $$ = newNode (CALL,$1,$3) ; $$->left->funcName = 1; + } + | postfix_expr '.' { ignoreTypedefType = 1; } identifier + { + ignoreTypedefType = 0; + $4 = newSymbol($4->name,NestLevel); + $4->implicit = 1; + $$ = newNode(PTR_OP,newNode('&',$1,NULL),newAst_VALUE(symbolVal($4))); +/* $$ = newNode('.',$1,newAst(EX_VALUE,symbolVal($4))) ; */ + } + | postfix_expr PTR_OP { ignoreTypedefType = 1; } identifier + { + ignoreTypedefType = 0; + $4 = newSymbol($4->name,NestLevel); + $4->implicit = 1; + $$ = newNode(PTR_OP,$1,newAst_VALUE(symbolVal($4))); + } + | postfix_expr INC_OP + { $$ = newNode(INC_OP,$1,NULL);} + | postfix_expr DEC_OP + { $$ = newNode(DEC_OP,$1,NULL); } + ; + +argument_expr_list + : assignment_expr + | assignment_expr ',' argument_expr_list { $$ = newNode(PARAM,$1,$3); } + ; + +unary_expr + : postfix_expr + | INC_OP unary_expr { $$ = newNode(INC_OP,NULL,$2); } + | DEC_OP unary_expr { $$ = newNode(DEC_OP,NULL,$2); } + | unary_operator cast_expr { $$ = newNode($1,$2,NULL) ; } + | SIZEOF unary_expr { $$ = newNode(SIZEOF,NULL,$2); } + | SIZEOF '(' type_name ')' { $$ = newAst_VALUE(sizeofOp($3)); } + | TYPEOF unary_expr { $$ = newNode(TYPEOF,NULL,$2); } + ; + +unary_operator + : '&' { $$ = '&' ;} + | '*' { $$ = '*' ;} + | '+' { $$ = '+' ;} + | '-' { $$ = '-' ;} + | '~' { $$ = '~' ;} + | '!' { $$ = '!' ;} + ; + +cast_expr + : unary_expr + | '(' type_name ')' cast_expr { $$ = newNode(CAST,newAst_LINK($2),$4); } + ; + +multiplicative_expr + : cast_expr + | multiplicative_expr '*' cast_expr { $$ = newNode('*',$1,$3);} + | multiplicative_expr '/' cast_expr { $$ = newNode('/',$1,$3);} + | multiplicative_expr '%' cast_expr { $$ = newNode('%',$1,$3);} + ; + +additive_expr + : multiplicative_expr + | additive_expr '+' multiplicative_expr { $$=newNode('+',$1,$3);} + | additive_expr '-' multiplicative_expr { $$=newNode('-',$1,$3);} + ; + +shift_expr + : additive_expr + | shift_expr LEFT_OP additive_expr { $$ = newNode(LEFT_OP,$1,$3); } + | shift_expr RIGHT_OP additive_expr { $$ = newNode(RIGHT_OP,$1,$3); } + ; + +relational_expr + : shift_expr + | relational_expr '<' shift_expr { $$ = newNode('<', $1,$3);} + | relational_expr '>' shift_expr { $$ = newNode('>', $1,$3);} + | relational_expr LE_OP shift_expr { $$ = newNode(LE_OP,$1,$3);} + | relational_expr GE_OP shift_expr { $$ = newNode(GE_OP,$1,$3);} + ; + +equality_expr + : relational_expr + | equality_expr EQ_OP relational_expr { $$ = newNode(EQ_OP,$1,$3);} + | equality_expr NE_OP relational_expr { $$ = newNode(NE_OP,$1,$3);} + ; + +and_expr + : equality_expr + | and_expr '&' equality_expr { $$ = newNode('&',$1,$3);} + ; + +exclusive_or_expr + : and_expr + | exclusive_or_expr '^' and_expr { $$ = newNode('^',$1,$3);} + ; + +inclusive_or_expr + : exclusive_or_expr + | inclusive_or_expr '|' exclusive_or_expr { $$ = newNode('|',$1,$3);} + ; + +logical_and_expr + : inclusive_or_expr + | logical_and_expr AND_OP { seqPointNo++;} inclusive_or_expr + { $$ = newNode(AND_OP,$1,$4);} + ; + +logical_or_expr + : logical_and_expr + | logical_or_expr OR_OP { seqPointNo++;} logical_and_expr + { $$ = newNode(OR_OP,$1,$4); } + ; + +conditional_expr + : logical_or_expr + | logical_or_expr '?' { seqPointNo++;} logical_or_expr ':' conditional_expr + { + $$ = newNode(':',$4,$6) ; + $$ = newNode('?',$1,$$) ; + } + ; + +assignment_expr + : conditional_expr + | cast_expr assignment_operator assignment_expr + { + + switch ($2) { + case '=': + $$ = newNode($2,$1,$3); + break; + case MUL_ASSIGN: + $$ = createRMW($1, '*', $3); + break; + case DIV_ASSIGN: + $$ = createRMW($1, '/', $3); + break; + case MOD_ASSIGN: + $$ = createRMW($1, '%', $3); + break; + case ADD_ASSIGN: + $$ = createRMW($1, '+', $3); + break; + case SUB_ASSIGN: + $$ = createRMW($1, '-', $3); + break; + case LEFT_ASSIGN: + $$ = createRMW($1, LEFT_OP, $3); + break; + case RIGHT_ASSIGN: + $$ = createRMW($1, RIGHT_OP, $3); + break; + case AND_ASSIGN: + $$ = createRMW($1, '&', $3); + break; + case XOR_ASSIGN: + $$ = createRMW($1, '^', $3); + break; + case OR_ASSIGN: +/* $$ = newNode('=',$1,newNode('|',removeIncDecOps(copyAst($1)),$3)); */ +/* $$ = newNode('=',removePostIncDecOps(copyAst($1)), + newNode('|',removePreIncDecOps(copyAst($1)),$3)); */ + $$ = createRMW($1, '|', $3); + break; + default : + $$ = NULL; + } + + } +; + +assignment_operator + : '=' { $$ = '=' ;} + | MUL_ASSIGN + | DIV_ASSIGN + | MOD_ASSIGN + | ADD_ASSIGN + | SUB_ASSIGN + | LEFT_ASSIGN + | RIGHT_ASSIGN + | AND_ASSIGN + | XOR_ASSIGN + | OR_ASSIGN + ; + +expr + : assignment_expr + | expr ',' { seqPointNo++;} assignment_expr { $$ = newNode(',',$1,$4);} + ; + +constant_expr + : conditional_expr + ; + +declaration + : declaration_specifiers ';' + { + if (uselessDecl) + werror(W_USELESS_DECL); + uselessDecl = TRUE; + $$ = NULL ; + } + | declaration_specifiers init_declarator_list ';' + { + /* add the specifier list to the id */ + symbol *sym , *sym1; + + for (sym1 = sym = reverseSyms($2);sym != NULL;sym = sym->next) { + sym_link *lnk = copyLinkChain($1); + if (options.unsigned_char && SPEC_NOUN(lnk) == V_CHAR && !lnk->select.s.b_signed) + SPEC_USIGN(lnk) = 1; + /* do the pointer stuff */ + pointerTypes(sym->type,lnk); + addDecl (sym,0,lnk) ; + } + + uselessDecl = TRUE; + $$ = sym1 ; + } + ; + +declaration_specifiers + : storage_class_specifier { $$ = $1; } + | storage_class_specifier declaration_specifiers { + /* if the decl $2 is not a specifier */ + /* find the spec and replace it */ + if ( !IS_SPEC($2)) { + sym_link *lnk = $2 ; + while (lnk && !IS_SPEC(lnk->next)) + lnk = lnk->next; + lnk->next = mergeSpec($1,lnk->next, "storage_class_specifier declaration_specifiers - skipped"); + $$ = $2 ; + } + else + $$ = mergeSpec($1,$2, "storage_class_specifier declaration_specifiers"); + } + | type_specifier { $$ = $1; } + | type_specifier declaration_specifiers { + /* if the decl $2 is not a specifier */ + /* find the spec and replace it */ + if ( !IS_SPEC($2)) { + sym_link *lnk = $2 ; + while (lnk && !IS_SPEC(lnk->next)) + lnk = lnk->next; + lnk->next = mergeSpec($1,lnk->next, "type_specifier declaration_specifiers - skipped"); + $$ = $2 ; + } + else + $$ = mergeSpec($1,$2, "type_specifier declaration_specifiers"); + } + | function_specifier { $$ = $1; } + | function_specifier declaration_specifiers { + /* if the decl $2 is not a specifier */ + /* find the spec and replace it */ + if ( !IS_SPEC($2)) { + sym_link *lnk = $2 ; + while (lnk && !IS_SPEC(lnk->next)) + lnk = lnk->next; + lnk->next = mergeSpec($1,lnk->next, "function_specifier declaration_specifiers - skipped"); + $$ = $2 ; + } + else + $$ = mergeSpec($1,$2, "function_specifier declaration_specifiers"); + } + ; + +init_declarator_list + : init_declarator + | init_declarator_list ',' init_declarator { $3->next = $1 ; $$ = $3;} + ; + +init_declarator + : declarator { $1->ival = NULL ; } + | declarator '=' initializer { $1->ival = $3 ; } + ; + + +storage_class_specifier + : TYPEDEF { + $$ = newLink (SPECIFIER) ; + SPEC_TYPEDEF($$) = 1 ; + } + | EXTERN { + $$ = newLink(SPECIFIER); + SPEC_EXTR($$) = 1 ; + } + | STATIC { + $$ = newLink (SPECIFIER); + SPEC_STAT($$) = 1 ; + } + | AUTO { + $$ = newLink (SPECIFIER) ; + SPEC_SCLS($$) = S_AUTO ; + } + | REGISTER { + $$ = newLink (SPECIFIER); + SPEC_SCLS($$) = S_REGISTER ; + } + ; + +function_specifier + : INLINE { + $$ = newLink (SPECIFIER) ; + SPEC_INLINE($$) = 1 ; + } + ; + +Interrupt_storage + : INTERRUPT { $$ = INTNO_UNSPEC ; } + | INTERRUPT constant_expr + { int intno = (int) ulFromVal(constExprValue($2,TRUE)); + if ((intno >= 0) && (intno <= INTNO_MAX)) + $$ = intno; + else + { + werror(E_INT_BAD_INTNO, intno); + $$ = INTNO_UNSPEC; + } + } + ; + +type_specifier + : type_specifier2 + | type_specifier2 AT constant_expr + { + /* add this to the storage class specifier */ + SPEC_ABSA($1) = 1; /* set the absolute addr flag */ + /* now get the abs addr from value */ + SPEC_ADDR($1) = (unsigned int) ulFromVal(constExprValue($3,TRUE)) ; + } + ; + +type_specifier2 + : CHAR { + $$=newLink(SPECIFIER); + SPEC_NOUN($$) = V_CHAR ; + ignoreTypedefType = 1; + } + | SHORT { + $$=newLink(SPECIFIER); + SPEC_SHORT($$) = 1 ; + ignoreTypedefType = 1; + } + | INT { + $$=newLink(SPECIFIER); + SPEC_NOUN($$) = V_INT ; + ignoreTypedefType = 1; + } + | LONG { + $$=newLink(SPECIFIER); + SPEC_LONG($$) = 1 ; + ignoreTypedefType = 1; + } + | SIGNED { + $$=newLink(SPECIFIER); + $$->select.s.b_signed = 1; + ignoreTypedefType = 1; + } + | UNSIGNED { + $$=newLink(SPECIFIER); + SPEC_USIGN($$) = 1 ; + ignoreTypedefType = 1; + } + | VOID { + $$=newLink(SPECIFIER); + SPEC_NOUN($$) = V_VOID ; + ignoreTypedefType = 1; + } + | CONST { + $$=newLink(SPECIFIER); + SPEC_CONST($$) = 1; + } + | VOLATILE { + $$=newLink(SPECIFIER); + SPEC_VOLATILE($$) = 1 ; + } + | RESTRICT { + $$=newLink(SPECIFIER); + SPEC_RESTRICT($$) = 1 ; + } + | FLOAT { + $$=newLink(SPECIFIER); + SPEC_NOUN($$) = V_FLOAT; + ignoreTypedefType = 1; + } + | FIXED16X16 { + $$=newLink(SPECIFIER); + SPEC_NOUN($$) = V_FIXED16X16; + ignoreTypedefType = 1; + } + | XDATA { + $$ = newLink (SPECIFIER); + SPEC_SCLS($$) = S_XDATA ; + } + | CODE { + $$ = newLink (SPECIFIER) ; + SPEC_SCLS($$) = S_CODE ; + } + | EEPROM { + $$ = newLink (SPECIFIER) ; + SPEC_SCLS($$) = S_EEPROM ; + } + | DATA { + $$ = newLink (SPECIFIER); + SPEC_SCLS($$) = S_DATA ; + } + | IDATA { + $$ = newLink (SPECIFIER); + SPEC_SCLS($$) = S_IDATA ; + } + | PDATA { + $$ = newLink (SPECIFIER); + SPEC_SCLS($$) = S_PDATA ; + } + | BIT { + $$=newLink(SPECIFIER); + SPEC_NOUN($$) = V_BIT ; + SPEC_SCLS($$) = S_BIT ; + SPEC_BLEN($$) = 1; + SPEC_BSTR($$) = 0; + ignoreTypedefType = 1; + } + + | struct_or_union_specifier { + uselessDecl = FALSE; + $$ = $1 ; + ignoreTypedefType = 1; + } + | enum_specifier { + cenum = NULL ; + uselessDecl = FALSE; + ignoreTypedefType = 1; + $$ = $1 ; + } + | TYPE_NAME + { + symbol *sym; + sym_link *p ; + sym = findSym(TypedefTab,NULL,$1) ; + $$ = p = copyLinkChain(sym ? sym->type : NULL); + SPEC_TYPEDEF(getSpec(p)) = 0; + ignoreTypedefType = 1; + } + | sfr_reg_bit + ; + +sfr_reg_bit + : SBIT { + $$ = newLink(SPECIFIER) ; + SPEC_NOUN($$) = V_SBIT; + SPEC_SCLS($$) = S_SBIT; + SPEC_BLEN($$) = 1; + SPEC_BSTR($$) = 0; + ignoreTypedefType = 1; + } + | sfr_attributes + ; + +sfr_attributes + : SFR { + $$ = newLink(SPECIFIER) ; + FUNC_REGBANK($$) = 0; + SPEC_NOUN($$) = V_CHAR; + SPEC_SCLS($$) = S_SFR ; + SPEC_USIGN($$) = 1 ; + ignoreTypedefType = 1; + } + | SFR BANKED { + $$ = newLink(SPECIFIER) ; + FUNC_REGBANK($$) = 1; + SPEC_NOUN($$) = V_CHAR; + SPEC_SCLS($$) = S_SFR ; + SPEC_USIGN($$) = 1 ; + ignoreTypedefType = 1; + } + ; + +sfr_attributes + : SFR16 { + $$ = newLink(SPECIFIER) ; + FUNC_REGBANK($$) = 0; + SPEC_NOUN($$) = V_INT; + SPEC_SCLS($$) = S_SFR; + SPEC_USIGN($$) = 1 ; + ignoreTypedefType = 1; + } + ; + +sfr_attributes + : SFR32 { + $$ = newLink(SPECIFIER) ; + FUNC_REGBANK($$) = 0; + SPEC_NOUN($$) = V_INT; + SPEC_SCLS($$) = S_SFR; + SPEC_LONG($$) = 1; + SPEC_USIGN($$) = 1; + ignoreTypedefType = 1; + } + ; + +struct_or_union_specifier + : struct_or_union opt_stag + { + if (!$2->type) + { + $2->type = $1; + } + else + { + if ($2->type != $1) + werror(E_BAD_TAG, $2->tag, $1==STRUCT ? "struct" : "union"); + } + + } + '{' struct_declaration_list '}' + { + structdef *sdef ; + symbol *sym, *dsym; + + // check for errors in structure members + for (sym=$5; sym; sym=sym->next) { + if (IS_ABSOLUTE(sym->etype)) { + werrorfl(sym->fileDef, sym->lineDef, E_NOT_ALLOWED, "'at'"); + SPEC_ABSA(sym->etype) = 0; + } + if (IS_SPEC(sym->etype) && SPEC_SCLS(sym->etype)) { + werrorfl(sym->fileDef, sym->lineDef, E_NOT_ALLOWED, "storage class"); + printTypeChainRaw (sym->type,NULL); + SPEC_SCLS(sym->etype) = 0; + } + for (dsym=sym->next; dsym; dsym=dsym->next) { + if (*dsym->name && strcmp(sym->name, dsym->name)==0) { + werrorfl(sym->fileDef, sym->lineDef, E_DUPLICATE_MEMBER, + $1==STRUCT ? "struct" : "union", sym->name); + werrorfl(dsym->fileDef, dsym->lineDef, E_PREVIOUS_DEF); + } + } + } + + /* Create a structdef */ + sdef = $2 ; + sdef->fields = reverseSyms($5) ; /* link the fields */ + sdef->size = compStructSize($1,sdef); /* update size of */ + promoteAnonStructs ($1, sdef); + + /* Create the specifier */ + $$ = newLink (SPECIFIER) ; + SPEC_NOUN($$) = V_STRUCT; + SPEC_STRUCT($$)= sdef ; + } + | struct_or_union stag + { + $$ = newLink(SPECIFIER) ; + SPEC_NOUN($$) = V_STRUCT; + SPEC_STRUCT($$) = $2; + + if (!$2->type) + { + $2->type = $1; + } + else + { + if ($2->type != $1) + werror(E_BAD_TAG, $2->tag, $1==STRUCT ? "struct" : "union"); + } + } + ; + +struct_or_union + : STRUCT { $$ = STRUCT ; } + | UNION { $$ = UNION ; } + ; + +opt_stag +: stag +| { /* synthesize a name add to structtable */ + $$ = newStruct(genSymName(NestLevel)) ; + $$->level = NestLevel ; + addSym (StructTab, $$, $$->tag,$$->level,currBlockno, 0); +}; + +stag +: identifier { /* add name to structure table */ + $$ = findSymWithBlock (StructTab,$1,currBlockno); + if (! $$ ) { + $$ = newStruct($1->name) ; + $$->level = NestLevel ; + addSym (StructTab, $$, $$->tag,$$->level,currBlockno,0); + } +}; + + +struct_declaration_list + : struct_declaration + | struct_declaration_list struct_declaration + { + symbol *sym=$2; + + /* go to the end of the chain */ + while (sym->next) sym=sym->next; + sym->next = $1 ; + + $$ = $2; + } + ; + +struct_declaration + : type_specifier_list struct_declarator_list ';' + { + /* add this type to all the symbols */ + symbol *sym ; + for ( sym = $2 ; sym != NULL ; sym = sym->next ) { + sym_link *btype = copyLinkChain($1); + if (options.unsigned_char && SPEC_NOUN(btype) == V_CHAR && !(btype)->select.s.b_signed) + SPEC_USIGN(btype) = 1; + + /* make the symbol one level up */ + sym->level-- ; + + pointerTypes(sym->type,btype); + if (!sym->type) { + sym->type = btype; + sym->etype = getSpec(sym->type); + } + else + addDecl (sym,0,btype); + /* make sure the type is complete and sane */ + checkTypeSanity(sym->etype, sym->name); + } + ignoreTypedefType = 0; + $$ = $2; + } + ; + +struct_declarator_list + : struct_declarator + | struct_declarator_list ',' struct_declarator + { + $3->next = $1 ; + $$ = $3 ; + } + ; + +struct_declarator + : declarator + | ':' constant_expr { + unsigned int bitsize; + $$ = newSymbol (genSymName(NestLevel),NestLevel) ; + bitsize = (unsigned int) ulFromVal(constExprValue($2,TRUE)); + if (bitsize > (port->s.int_size * 8)) { + bitsize = port->s.int_size * 8; + werror(E_BITFLD_SIZE, bitsize); + } + if (!bitsize) + bitsize = BITVAR_PAD; + $$->bitVar = bitsize; + $$->bitUnnamed = 1; + } + | declarator ':' constant_expr + { + unsigned int bitsize; + bitsize = (unsigned int) ulFromVal(constExprValue($3,TRUE)); + if (bitsize > (port->s.int_size * 8)) { + bitsize = port->s.int_size * 8; + werror(E_BITFLD_SIZE, bitsize); + } + if (!bitsize) { + $$ = newSymbol (genSymName(NestLevel),NestLevel) ; + $$->bitVar = BITVAR_PAD; + werror(W_BITFLD_NAMED); + } + else + $1->bitVar = bitsize; + } + | { $$ = newSymbol ("", NestLevel) ; } + + ; + +enum_specifier + : ENUM '{' enumerator_list '}' { + $$ = newEnumType ($3); //copyLinkChain(cenum->type); + SPEC_SCLS(getSpec($$)) = 0; + } + + | ENUM identifier '{' enumerator_list '}' { + symbol *csym ; + sym_link *enumtype; + + csym=findSym(enumTab,$2,$2->name); + if ((csym && csym->level == $2->level)) + { + werrorfl($2->fileDef, $2->lineDef, E_DUPLICATE_TYPEDEF,csym->name); + werrorfl(csym->fileDef, csym->lineDef, E_PREVIOUS_DEF); + } + + enumtype = newEnumType ($4); //copyLinkChain(cenum->type); + SPEC_SCLS(getSpec(enumtype)) = 0; + $2->type = enumtype; + + /* add this to the enumerator table */ + if (!csym) + addSym ( enumTab,$2,$2->name,$2->level,$2->block, 0); + $$ = copyLinkChain(enumtype); + } + | ENUM identifier { + symbol *csym ; + + /* check the enumerator table */ + if ((csym = findSym(enumTab,$2,$2->name))) + $$ = copyLinkChain(csym->type); + else { + $$ = newLink(SPECIFIER) ; + SPEC_NOUN($$) = V_INT ; + } + } + ; + +enumerator_list + : enumerator + | enumerator_list ',' + | enumerator_list ',' enumerator + { + $3->next = $1 ; + $$ = $3 ; + } + ; + +enumerator + : identifier opt_assign_expr + { + symbol *sym; + + /* make the symbol one level up */ + $1->level-- ; + // check if the symbol at the same level already exists + if ((sym = findSymWithLevel (SymbolTab, $1)) && + sym->level == $1->level) + { + werrorfl ($1->fileDef, $1->lineDef, E_DUPLICATE_MEMBER, "enum", $1->name); + werrorfl (sym->fileDef, sym->lineDef, E_PREVIOUS_DEF); + } + $1->type = copyLinkChain ($2->type); + $1->etype= getSpec ($1->type); + SPEC_ENUM ($1->etype) = 1; + $$ = $1 ; + // do this now, so we can use it for the next enums in the list + addSymChain (&$1); + } + ; + +opt_assign_expr + : '=' constant_expr { + value *val ; + + val = constExprValue($2,TRUE); + if (!IS_INT(val->type) && !IS_CHAR(val->type)) + { + werror(E_ENUM_NON_INTEGER); + SNPRINTF(lbuff, sizeof(lbuff), + "%d", (int) ulFromVal(val)); + val = constVal(lbuff); + } + $$ = cenum = val ; + } + | { + if (cenum) { + SNPRINTF(lbuff, sizeof(lbuff), + "%d", (int) ulFromVal(cenum)+1); + $$ = cenum = constVal(lbuff); + } + else { + $$ = cenum = constCharVal(0); + } + } + ; + +declarator + : declarator3 { $$ = $1 ; } + | pointer declarator3 + { + addDecl ($2,0,reverseLink($1)); + $$ = $2 ; + } + ; + +declarator3 + : declarator2_function_attributes { $$ = $1 ; } + | declarator2 { $$ = $1 ; } + ; + +function_declarator + : declarator2_function_attributes { $$ = $1; } + | pointer declarator2_function_attributes + { + addDecl ($2,0,reverseLink($1)); + $$ = $2 ; + } + ; + +declarator2_function_attributes + : function_declarator2 { $$ = $1 ; } + | function_declarator2 function_attribute { + // copy the functionAttributes (not the args and hasVargs !!) + struct value *args; + unsigned hasVargs; + sym_link *funcType=$1->type; + + while (funcType && !IS_FUNC(funcType)) + funcType = funcType->next; + + if (!funcType) + werror (E_FUNC_ATTR); + else + { + args=FUNC_ARGS(funcType); + hasVargs=FUNC_HASVARARGS(funcType); + + memcpy (&funcType->funcAttrs, &$2->funcAttrs, + sizeof($2->funcAttrs)); + + FUNC_ARGS(funcType)=args; + FUNC_HASVARARGS(funcType)=hasVargs; + + // just to be sure + memset (&$2->funcAttrs, 0, + sizeof($2->funcAttrs)); + + addDecl ($1,0,$2); + } + } + ; + +declarator2 + : identifier + | '(' declarator ')' { $$ = $2; } + | declarator3 '[' ']' + { + sym_link *p; + + p = newLink (DECLARATOR); + DCL_TYPE(p) = ARRAY ; + DCL_ELEM(p) = 0 ; + addDecl($1,0,p); + } + | declarator3 '[' constant_expr ']' + { + sym_link *p; + value *tval; + int size; + + tval = constExprValue($3, TRUE); + /* if it is not a constant then Error */ + p = newLink (DECLARATOR); + DCL_TYPE(p) = ARRAY; + + if (!tval || (SPEC_SCLS(tval->etype) != S_LITERAL)) + { + werror(E_CONST_EXPECTED); + /* Assume a single item array to limit the cascade */ + /* of additional errors. */ + size = 1; + } + else + { + if ((size = (int) ulFromVal(tval)) < 0) + { + werror(E_NEGATIVE_ARRAY_SIZE, $1->name); + size = 1; + } + } + DCL_ELEM(p) = size; + addDecl($1, 0, p); + } + ; + +function_declarator2 + : declarator2 '(' ')' { addDecl ($1,FUNCTION,NULL) ; } + | declarator2 '(' { NestLevel++ ; currBlockno++; } + parameter_type_list ')' + { + sym_link *funcType; + + addDecl ($1,FUNCTION,NULL) ; + + funcType = $1->type; + while (funcType && !IS_FUNC(funcType)) + funcType = funcType->next; + + assert (funcType); + + FUNC_HASVARARGS(funcType) = IS_VARG($4); + FUNC_ARGS(funcType) = reverseVal($4); + + /* nest level was incremented to take care of the parms */ + NestLevel-- ; + currBlockno--; + + // if this was a pointer (to a function) + if (!IS_FUNC($1->type)) + cleanUpLevel(SymbolTab,NestLevel+1); + + $$ = $1; + } + | declarator2 '(' identifier_list ')' + { + werror(E_OLD_STYLE,$1->name) ; + /* assume it returns an int */ + $1->type = $1->etype = newIntLink(); + $$ = $1 ; + } + ; + +pointer + : unqualified_pointer { $$ = $1 ;} + | unqualified_pointer type_specifier_list + { + $$ = $1 ; + if (IS_SPEC($2)) { + DCL_TSPEC($1) = $2; + DCL_PTR_CONST($1) = SPEC_CONST($2); + DCL_PTR_VOLATILE($1) = SPEC_VOLATILE($2); + DCL_PTR_RESTRICT($1) = SPEC_RESTRICT($2); + } + else + werror (W_PTR_TYPE_INVALID); + } + | unqualified_pointer pointer + { + $$ = $1 ; + $$->next = $2 ; + DCL_TYPE($2)=port->unqualified_pointer; + } + | unqualified_pointer type_specifier_list pointer + { + $$ = $1 ; + if (IS_SPEC($2) && DCL_TYPE($3) == UPOINTER) { + DCL_PTR_CONST($1) = SPEC_CONST($2); + DCL_PTR_VOLATILE($1) = SPEC_VOLATILE($2); + DCL_PTR_RESTRICT($1) = SPEC_RESTRICT($2); + switch (SPEC_SCLS($2)) { + case S_XDATA: + DCL_TYPE($3) = FPOINTER; + break; + case S_IDATA: + DCL_TYPE($3) = IPOINTER ; + break; + case S_PDATA: + DCL_TYPE($3) = PPOINTER ; + break; + case S_DATA: + DCL_TYPE($3) = POINTER ; + break; + case S_CODE: + DCL_TYPE($3) = CPOINTER ; + break; + case S_EEPROM: + DCL_TYPE($3) = EEPPOINTER; + break; + default: + // this could be just "constant" + // werror(W_PTR_TYPE_INVALID); + ; + } + } + else + werror (W_PTR_TYPE_INVALID); + $$->next = $3 ; + } + ; + +unqualified_pointer + : '*' + { + $$ = newLink(DECLARATOR); + DCL_TYPE($$)=UPOINTER; + } + ; + +type_specifier_list + : type_specifier + //| type_specifier_list type_specifier { $$ = mergeSpec ($1,$2, "type_specifier_list"); } + | type_specifier_list type_specifier { + /* if the decl $2 is not a specifier */ + /* find the spec and replace it */ + if ( !IS_SPEC($2)) { + sym_link *lnk = $2 ; + while (lnk && !IS_SPEC(lnk->next)) + lnk = lnk->next; + lnk->next = mergeSpec($1,lnk->next, "type_specifier_list type_specifier skipped"); + $$ = $2 ; + } + else + $$ = mergeSpec($1,$2, "type_specifier_list type_specifier"); + } + ; + +identifier_list + : identifier + | identifier_list ',' identifier + { + $3->next = $1; + $$ = $3 ; + } + ; + +parameter_type_list + : parameter_list + | parameter_list ',' VAR_ARGS { $1->vArgs = 1;} + ; + +parameter_list + : parameter_declaration + | parameter_list ',' parameter_declaration + { + $3->next = $1 ; + $$ = $3 ; + } + ; + +parameter_declaration + : type_specifier_list declarator + { + symbol *loop ; + pointerTypes($2->type,$1); + if (options.unsigned_char && SPEC_NOUN($1) == V_CHAR && !($1)->select.s.b_signed) + SPEC_USIGN($1) = 1; + addDecl ($2,0,$1); + for (loop=$2;loop;loop->_isparm=1,loop=loop->next); + addSymChain (&$2); + $$ = symbolVal($2); + ignoreTypedefType = 0; + } + | type_name { + $$ = newValue() ; + if (options.unsigned_char && SPEC_NOUN($1) == V_CHAR && !($1)->select.s.b_signed) + SPEC_USIGN($1) = 1; + $$->type = $1; + $$->etype = getSpec($$->type); + ignoreTypedefType = 0; + } + ; + +type_name + : type_specifier_list { $$ = $1; ignoreTypedefType = 0;} + | type_specifier_list abstract_declarator + { + /* go to the end of the list */ + sym_link *p; + pointerTypes($2,$1); + for ( p = $2 ; p && p->next ; p=p->next); + if (!p) { + werror(E_SYNTAX_ERROR, yytext); + } else { + p->next = $1 ; + } + $$ = $2 ; + ignoreTypedefType = 0; + } + ; + +abstract_declarator + : pointer { $$ = reverseLink($1); } + | abstract_declarator2 + | pointer abstract_declarator2 { $1 = reverseLink($1); $1->next = $2 ; $$ = $1; + if (IS_PTR($1) && IS_FUNC($2)) + DCL_TYPE($1) = CPOINTER; + } + ; + +abstract_declarator2 + : '(' abstract_declarator ')' { $$ = $2 ; } + | '[' ']' { + $$ = newLink (DECLARATOR); + DCL_TYPE($$) = ARRAY ; + DCL_ELEM($$) = 0 ; + } + | '[' constant_expr ']' { + value *val ; + $$ = newLink (DECLARATOR); + DCL_TYPE($$) = ARRAY ; + DCL_ELEM($$) = (int) ulFromVal(val = constExprValue($2,TRUE)); + } + | abstract_declarator2 '[' ']' { + $$ = newLink (DECLARATOR); + DCL_TYPE($$) = ARRAY ; + DCL_ELEM($$) = 0 ; + $$->next = $1 ; + } + | abstract_declarator2 '[' constant_expr ']' + { + value *val ; + $$ = newLink (DECLARATOR); + DCL_TYPE($$) = ARRAY ; + DCL_ELEM($$) = (int) ulFromVal(val = constExprValue($3,TRUE)); + $$->next = $1 ; + } + | '(' ')' { $$ = NULL;} + | '(' parameter_type_list ')' { $$ = NULL;} + | abstract_declarator2 '(' ')' { + // $1 must be a pointer to a function + sym_link *p=newLink(DECLARATOR); + DCL_TYPE(p) = FUNCTION; + if (!$1) { + // ((void (code *) ()) 0) () + $1=newLink(DECLARATOR); + DCL_TYPE($1)=CPOINTER; + $$ = $1; + } + $1->next=p; + } + | abstract_declarator2 '(' { NestLevel++ ; currBlockno++; } parameter_type_list ')' { + sym_link *p=newLink(DECLARATOR); + DCL_TYPE(p) = FUNCTION; + + FUNC_HASVARARGS(p) = IS_VARG($4); + FUNC_ARGS(p) = reverseVal($4); + + /* nest level was incremented to take care of the parms */ + NestLevel-- ; + currBlockno--; + if (!$1) { + /* ((void (code *) (void)) 0) () */ + $1=newLink(DECLARATOR); + DCL_TYPE($1)=CPOINTER; + $$ = $1; + } + $1->next=p; + + // remove the symbol args (if any) + cleanUpLevel(SymbolTab,NestLevel+1); + } + ; + +initializer + : assignment_expr { $$ = newiList(INIT_NODE,$1); } + | '{' initializer_list '}' { $$ = newiList(INIT_DEEP,revinit($2)); } + | '{' initializer_list ',' '}' { $$ = newiList(INIT_DEEP,revinit($2)); } + ; + +initializer_list + : initializer + | initializer_list ',' initializer { $3->next = $1; $$ = $3; } + ; + +statement + : labeled_statement + | compound_statement + | expression_statement + | selection_statement + | iteration_statement + | jump_statement + | critical_statement + | INLINEASM ';' { + ast *ex; + seqPointNo++; + ex = newNode(INLINEASM,NULL,NULL); + ex->values.inlineasm = strdup($1); + seqPointNo++; + $$ = ex; + } + ; + +critical + : CRITICAL { + inCritical++; + STACK_PUSH(continueStack,NULL); + STACK_PUSH(breakStack,NULL); + $$ = NULL; + } + ; + +critical_statement + : critical statement { + STACK_POP(breakStack); + STACK_POP(continueStack); + inCritical--; + $$ = newNode(CRITICAL,$2,NULL); + } + ; + +labeled_statement +// : identifier ':' statement { $$ = createLabel($1,$3); } + : identifier ':' { $$ = createLabel($1,NULL); + $1->isitmp = 0; } + | CASE constant_expr ':' + { + if (STACK_EMPTY(swStk)) + $$ = createCase(NULL,$2,NULL); + else + $$ = createCase(STACK_PEEK(swStk),$2,NULL); + } + | DEFAULT { $$ = newNode(DEFAULT,NULL,NULL); } ':' + { + if (STACK_EMPTY(swStk)) + $$ = createDefault(NULL,$2,NULL); + else + $$ = createDefault(STACK_PEEK(swStk),$2,NULL); + } + ; + +start_block : '{' + { + STACK_PUSH(blockNum,currBlockno); + currBlockno = ++blockNo ; + ignoreTypedefType = 0; + } + ; + +end_block : '}' { currBlockno = STACK_POP(blockNum); } + ; + +compound_statement + : start_block end_block { $$ = createBlock(NULL, NULL); } + | start_block statement_list end_block { $$ = createBlock(NULL, $2); } + | start_block declaration_list end_block { $$ = createBlock($2, NULL); } + | start_block + declaration_list statement_list + end_block {$$ = createBlock($2, $3); } + | error ';' { $$ = NULL ; } + ; + +declaration_list + : declaration + { + /* if this is typedef declare it immediately */ + if ( $1 && IS_TYPEDEF($1->etype)) { + allocVariables ($1); + $$ = NULL ; + } + else + $$ = $1 ; + ignoreTypedefType = 0; + addSymChain(&$1); + } + + | declaration_list declaration + { + symbol *sym; + + /* if this is a typedef */ + if ($2 && IS_TYPEDEF($2->etype)) { + allocVariables ($2); + $$ = $1 ; + } + else { + /* get to the end of the previous decl */ + if ( $1 ) { + $$ = sym = $1 ; + while (sym->next) + sym = sym->next ; + sym->next = $2; + } + else + $$ = $2 ; + } + ignoreTypedefType = 0; + addSymChain(&$2); + } + ; + +statement_list + : statement + | statement_list statement { $$ = newNode(NULLOP,$1,$2) ;} + ; + +expression_statement + : ';' { $$ = NULL;} + | expr ';' { $$ = $1; seqPointNo++;} + ; + +else_statement + : ELSE statement { $$ = $2 ; } + | { $$ = NULL;} + ; + + +selection_statement + : IF '(' expr ')' { seqPointNo++;} statement else_statement + { + noLineno++ ; + $$ = createIf ($3, $6, $7 ); + $$->lineno = $3->lineno; + $$->filename = $3->filename; + noLineno--; + } + | SWITCH '(' expr ')' { + ast *ex ; + static int swLabel = 0 ; + + seqPointNo++; + /* create a node for expression */ + ex = newNode(SWITCH,$3,NULL); + STACK_PUSH(swStk,ex); /* save it in the stack */ + ex->values.switchVals.swNum = swLabel ; + + /* now create the label */ + SNPRINTF(lbuff, sizeof(lbuff), + "_swBrk_%d",swLabel++); + $$ = newSymbol(lbuff,NestLevel); + /* put label in the break stack */ + STACK_PUSH(breakStack,$$); + } + statement { + /* get back the switch form the stack */ + $$ = STACK_POP(swStk) ; + $$->right = newNode (NULLOP,$6,createLabel($5,NULL)); + STACK_POP(breakStack); + } + ; + +while : WHILE { /* create and push the continue , break & body labels */ + static int Lblnum = 0 ; + /* continue */ + SNPRINTF (lbuff, sizeof(lbuff), "_whilecontinue_%d",Lblnum); + STACK_PUSH(continueStack,newSymbol(lbuff,NestLevel)); + /* break */ + SNPRINTF (lbuff, sizeof(lbuff), "_whilebreak_%d",Lblnum); + STACK_PUSH(breakStack,newSymbol(lbuff,NestLevel)); + /* body */ + SNPRINTF (lbuff, sizeof(lbuff), "_whilebody_%d",Lblnum++); + $$ = newSymbol(lbuff,NestLevel); + } + ; + +do : DO { /* create and push the continue , break & body Labels */ + static int Lblnum = 0 ; + + /* continue */ + SNPRINTF(lbuff, sizeof(lbuff), "_docontinue_%d",Lblnum); + STACK_PUSH(continueStack,newSymbol(lbuff,NestLevel)); + /* break */ + SNPRINTF(lbuff, sizeof(lbuff), "_dobreak_%d",Lblnum); + STACK_PUSH(breakStack,newSymbol(lbuff,NestLevel)); + /* do body */ + SNPRINTF(lbuff, sizeof(lbuff), "_dobody_%d",Lblnum++); + $$ = newSymbol (lbuff,NestLevel); + } + ; + +for : FOR { /* create & push continue, break & body labels */ + static int Lblnum = 0 ; + + /* continue */ + SNPRINTF(lbuff, sizeof(lbuff), "_forcontinue_%d",Lblnum); + STACK_PUSH(continueStack,newSymbol(lbuff,NestLevel)); + /* break */ + SNPRINTF(lbuff, sizeof(lbuff), "_forbreak_%d",Lblnum); + STACK_PUSH(breakStack,newSymbol(lbuff,NestLevel)); + /* body */ + SNPRINTF(lbuff, sizeof(lbuff), "_forbody_%d",Lblnum); + $$ = newSymbol(lbuff,NestLevel); + /* condition */ + SNPRINTF(lbuff, sizeof(lbuff), "_forcond_%d",Lblnum++); + STACK_PUSH(forStack,newSymbol(lbuff,NestLevel)); + } + ; + +iteration_statement + : while '(' expr ')' { seqPointNo++;} statement + { + noLineno++ ; + $$ = createWhile ( $1, STACK_POP(continueStack), + STACK_POP(breakStack), $3, $6 ); + $$->lineno = $1->lineDef; + $$->filename = $1->fileDef; + noLineno-- ; + } + | do statement WHILE '(' expr ')' ';' + { + seqPointNo++; + noLineno++ ; + $$ = createDo ( $1 , STACK_POP(continueStack), + STACK_POP(breakStack), $5, $2); + $$->lineno = $1->lineDef; + $$->filename = $1->fileDef; + noLineno-- ; + } + | for '(' expr_opt ';' expr_opt ';' expr_opt ')' statement + { + noLineno++ ; + + /* if break or continue statement present + then create a general case loop */ + if (STACK_PEEK(continueStack)->isref || + STACK_PEEK(breakStack)->isref) { + $$ = createFor ($1, STACK_POP(continueStack), + STACK_POP(breakStack) , + STACK_POP(forStack) , + $3 , $5 , $7, $9 ); + } else { + $$ = newNode(FOR,$9,NULL); + AST_FOR($$,trueLabel) = $1; + AST_FOR($$,continueLabel) = STACK_POP(continueStack); + AST_FOR($$,falseLabel) = STACK_POP(breakStack); + AST_FOR($$,condLabel) = STACK_POP(forStack) ; + AST_FOR($$,initExpr) = $3; + AST_FOR($$,condExpr) = $5; + AST_FOR($$,loopExpr) = $7; + } + + noLineno-- ; + } +; + +expr_opt + : { $$ = NULL ; seqPointNo++; } + | expr { $$ = $1 ; seqPointNo++; } + ; + +jump_statement + : GOTO identifier ';' { + $2->islbl = 1; + $$ = newAst_VALUE(symbolVal($2)); + $$ = newNode(GOTO,$$,NULL); + } + | CONTINUE ';' { + /* make sure continue is in context */ + if (STACK_EMPTY(continueStack) || STACK_PEEK(continueStack) == NULL) { + werror(E_BREAK_CONTEXT); + $$ = NULL; + } + else { + $$ = newAst_VALUE(symbolVal(STACK_PEEK(continueStack))); + $$ = newNode(GOTO,$$,NULL); + /* mark the continue label as referenced */ + STACK_PEEK(continueStack)->isref = 1; + } + } + | BREAK ';' { + if (STACK_EMPTY(breakStack) || STACK_PEEK(breakStack) == NULL) { + werror(E_BREAK_CONTEXT); + $$ = NULL; + } else { + $$ = newAst_VALUE(symbolVal(STACK_PEEK(breakStack))); + $$ = newNode(GOTO,$$,NULL); + STACK_PEEK(breakStack)->isref = 1; + } + } + | RETURN ';' { + seqPointNo++; + if (inCritical) { + werror(E_INVALID_CRITICAL); + $$ = NULL; + } else { + $$ = newNode(RETURN,NULL,NULL); + } + } + | RETURN expr ';' { + seqPointNo++; + if (inCritical) { + werror(E_INVALID_CRITICAL); + $$ = NULL; + } else { + $$ = newNode(RETURN,NULL,$2); + } + } + ; + +identifier + : IDENTIFIER { $$ = newSymbol ($1,NestLevel) ; } + ; +%% diff --git a/src/SDCCBBlock.c b/src/SDCCBBlock.c new file mode 100644 index 0000000..e7f0fe9 --- /dev/null +++ b/src/SDCCBBlock.c @@ -0,0 +1,837 @@ +/*------------------------------------------------------------------------- + + SDCCBBlock.c - routines to manipulate basic Blocks + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" + +int eBBNum = 0; +set *graphEdges = NULL; /* list of edges in this flow graph */ + +struct _dumpFiles dumpFiles[] = { + {DUMP_RAW0, ".dumpraw0", NULL}, + {DUMP_RAW1, ".dumpraw1", NULL}, + {DUMP_CSE, ".dumpcse", NULL}, + {DUMP_DFLOW, ".dumpdflow", NULL}, + {DUMP_GCSE, ".dumpgcse", NULL}, + {DUMP_DEADCODE, ".dumpdeadcode", NULL}, + {DUMP_LOOP, ".dumploop", NULL}, + {DUMP_LOOPG, ".dumploopg", NULL}, + {DUMP_LOOPD, ".dumploopd", NULL}, + {DUMP_RANGE, ".dumprange", NULL}, + {DUMP_PACK, ".dumppack", NULL}, + {DUMP_RASSGN, ".dumprassgn", NULL}, + {DUMP_LRANGE, ".dumplrange", NULL}, + {0, NULL, NULL} +}; + +/*-----------------------------------------------------------------*/ +/* printEntryLabel - prints entry label of a ebblock */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (printEntryLabel) +{ + eBBlock *bp = item; + + fprintf (stdout, " %-20s ", bp->entryLabel->name); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* neweBBlock - allocate & return a new extended basic block */ +/*-----------------------------------------------------------------*/ +eBBlock * +neweBBlock () +{ + eBBlock *ebb; + + ebb = Safe_alloc (sizeof (eBBlock)); + return ebb; +} + +/*-----------------------------------------------------------------*/ +/* newEdge - allocates & initialises an edge to given values */ +/*-----------------------------------------------------------------*/ +edge * +newEdge (eBBlock * from, eBBlock * to) +{ + edge *ep; + + ep = Safe_alloc (sizeof (edge)); + + ep->from = from; + ep->to = to; + return ep; +} + +/*-----------------------------------------------------------------*/ +/* createDumpFile - create the dump file */ +/*-----------------------------------------------------------------*/ +FILE *createDumpFile (int id) { + struct _dumpFiles *dumpFilesPtr=dumpFiles; + static int dumpIndex=0; + static char dumpIndexStr[32]; + + while (dumpFilesPtr->id) { + if (dumpFilesPtr->id==id) + break; + dumpFilesPtr++; + } + + if (!dumpFilesPtr->id) { + fprintf (stdout, "internal error: createDumpFile: unknown dump file.\n"); + exit (1); + } + + sprintf(dumpIndexStr, ".%d", dumpIndex); + dumpIndex++; + + if (!dumpFilesPtr->filePtr) { + // not used before, create it + strncpyz (scratchFileName, dstFileName, PATH_MAX); +#if 0 + strncatz (scratchFileName, dumpIndexStr, PATH_MAX); +#endif + strncatz (scratchFileName, dumpFilesPtr->ext, PATH_MAX); + if (!(dumpFilesPtr->filePtr = fopen (scratchFileName, "w"))) { + werror (E_FILE_OPEN_ERR, scratchFileName); + exit (1); + } + } + +#if 0 + fprintf(dumpFilesPtr->filePtr, "Dump file index: %d\n", dumpIndex); +#endif + + return dumpFilesPtr->filePtr; +} + +/*-----------------------------------------------------------------*/ +/* closeDumpFiles - close possible opened dumpfiles */ +/*-----------------------------------------------------------------*/ +void closeDumpFiles() { + struct _dumpFiles *dumpFilesPtr; + + for (dumpFilesPtr=dumpFiles; dumpFilesPtr->id; dumpFilesPtr++) { + if (dumpFilesPtr->filePtr) { + fclose (dumpFilesPtr->filePtr); + } + } +} + +/*-----------------------------------------------------------------*/ +/* dumpLiveRanges - dump liverange information into a file */ +/*-----------------------------------------------------------------*/ +void +dumpLiveRanges (int id, hTab * liveRanges) +{ + FILE *file; + symbol *sym; + int k; + + if (id) { + file=createDumpFile(id); + } else { + file = stdout; + } + + if (currFunc) + fprintf(file,"------------- Func %s -------------\n",currFunc->name); + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) + { + + fprintf (file, "%s [k%d lr%d:%d so:%d]{ re%d rm%d}", + (sym->rname[0] ? sym->rname : sym->name), + sym->key, + sym->liveFrom, sym->liveTo, + sym->stack, + sym->isreqv, sym->remat + ); + + fprintf (file, "{"); + printTypeChain (sym->type, file); + if (sym->usl.spillLoc) + { + fprintf (file, "}{ sir@ %s", sym->usl.spillLoc->rname); + } + fprintf (file, "} clashes with "); + bitVectDebugOn(sym->clashes,file); + fprintf (file, "\n"); + } + + fflush(file); +} + + +/*-----------------------------------------------------------------*/ +/* dumpEbbsToFileExt - writeall the basic blocks to a file */ +/*-----------------------------------------------------------------*/ +void +dumpEbbsToFileExt (int id, ebbIndex * ebbi) +{ + FILE *of; + int i; + eBBlock *bb; + set *cseSet; + eBBlock ** ebbs = ebbi->dfOrder ? ebbi->dfOrder : ebbi->bbOrder; + int count = ebbi->count; + + if (id) { + of=createDumpFile(id); + } else { + of = stdout; + } + + for (i = 0; i < count; i++) + { + fprintf (of, "\n----------------------------------------------------------------\n"); + fprintf (of, "Basic Block %s (df:%d bb:%d lvl:%d): loopDepth=%d%s%s%s\n", + ebbs[i]->entryLabel->name, + ebbs[i]->dfnum, ebbs[i]->bbnum, ebbs[i]->entryLabel->level, + ebbs[i]->depth, + ebbs[i]->noPath ? " noPath" : "", + ebbs[i]->partOfLoop ? " partOfLoop" : "", + ebbs[i]->isLastInLoop ? " isLastInLoop" : ""); + + // a --nolabelopt makes this more readable + fprintf (of, "\nsuccessors: "); + for (bb=setFirstItem(ebbs[i]->succList); + bb; + bb=setNextItem(ebbs[i]->succList)) { + fprintf (of, "%s ", bb->entryLabel->name); + } + fprintf (of, "\npredecessors: "); + for (bb=setFirstItem(ebbs[i]->predList); + bb; + bb=setNextItem(ebbs[i]->predList)) { + fprintf (of, "%s ", bb->entryLabel->name); + } + { + int d; + fprintf (of, "\ndominators: "); + for (d=0; ddomVect->size; d++) { + if (bitVectBitValue(ebbs[i]->domVect, d)) { + fprintf (of, "%s ", ebbi->bbOrder[d]->entryLabel->name); //ebbs[d]->entryLabel->name); + } + } + } + fprintf (of, "\n"); + + fprintf (of, "\ndefines bitVector :"); + bitVectDebugOn (ebbs[i]->defSet, of); + fprintf (of, "\nlocal defines bitVector :"); + bitVectDebugOn (ebbs[i]->ldefs, of); + fprintf (of, "\npointers Set bitvector :"); + bitVectDebugOn (ebbs[i]->ptrsSet, of); +#if 0 + fprintf (of, "\nin coming definitions :"); + bitVectDebugOn (ebbs[i]->inDefs, of); + fprintf (of, "\nout going definitions :"); + bitVectDebugOn (ebbs[i]->outDefs, of); + fprintf (of, "\ndefines used :"); + bitVectDebugOn (ebbs[i]->usesDefs, of); +#endif + + if (ebbs[i]->isLastInLoop) { + fprintf (of, "\nInductions Set bitvector :"); + bitVectDebugOn (ebbs[i]->linds, of); + } + + fprintf (of, "\ninExprs:"); + for (cseSet = ebbs[i]->inExprs; cseSet; cseSet=cseSet->next) { + cseDef *item=cseSet->item; + fprintf (of, " %s(%d)",OP_SYMBOL(item->sym)->name,item->diCode->key); + if (item->fromGlobal) + fprintf (of, "g"); + } + fprintf (of, "\noutExprs:"); + for (cseSet = ebbs[i]->outExprs; cseSet; cseSet=cseSet->next) { + cseDef *item=cseSet->item; + fprintf (of, " %s(%d)",OP_SYMBOL(item->sym)->name,item->diCode->key); + if (item->fromGlobal) + fprintf (of, "g"); + } + fprintf (of, "\nkilledExprs:"); + for (cseSet = ebbs[i]->killedExprs; cseSet; cseSet=cseSet->next) { + cseDef *item=cseSet->item; + fprintf (of, " %s(%d)",OP_SYMBOL(item->sym)->name,item->diCode->key); + if (item->fromGlobal) + fprintf (of, "g"); + } + + fprintf (of, "\n----------------------------------------------------------------\n"); + printiCChain (ebbs[i]->sch, of); + } + fflush(of); +} + +/*-----------------------------------------------------------------*/ +/* iCode2eBBlock - converts a sequnce till label to a ebb */ +/*-----------------------------------------------------------------*/ +eBBlock * +iCode2eBBlock (iCode * ic) +{ + iCode *loop; + eBBlock *ebb = neweBBlock (); /* allocate an entry */ + + /* put the first one unconditionally */ + ebb->sch = ic; + + /* if this is a label then */ + if (ic->op == LABEL) + ebb->entryLabel = ic->label; + else + { + SNPRINTF (buffer, sizeof(buffer), "_eBBlock%d", eBBNum++); + ebb->entryLabel = newSymbol (buffer, 1); + ebb->entryLabel->key = labelKey++; + } + + if (ic && + (ic->op == GOTO || + ic->op == JUMPTABLE || + ic->op == IFX)) + { + ebb->ech = ebb->sch; + return ebb; + } + + /* if this is a function call */ + if (ic->op == CALL || ic->op == PCALL) + { + ebb->hasFcall = 1; + if (currFunc) + FUNC_HASFCALL(currFunc->type) = 1; + } + + if ((ic->next && ic->next->op == LABEL) || + !ic->next) + { + ebb->ech = ebb->sch; + return ebb; + } + + /* loop thru till we find one with a label */ + for (loop = ic->next; loop; loop = loop->next) + { + + /* if this is the last one */ + if (!loop->next) + break; + /* if this is a function call */ + if (loop->op == CALL || loop->op == PCALL) + { + ebb->hasFcall = 1; + if (currFunc) + FUNC_HASFCALL(currFunc->type) = 1; + } + + /* if the next one is a label */ + /* if this is a goto or ifx */ + if (loop->next->op == LABEL || + loop->op == GOTO || + loop->op == JUMPTABLE || + loop->op == IFX) + break; + } + + /* mark the end of the chain */ + ebb->ech = loop; + + return ebb; +} + +/*-----------------------------------------------------------------*/ +/* eBBWithEntryLabel - finds the basic block with the entry label */ +/*-----------------------------------------------------------------*/ +eBBlock * +eBBWithEntryLabel (ebbIndex * ebbi, symbol * eLabel) +{ + eBBlock ** ebbs = ebbi->bbOrder; + int count = ebbi->count; + int i; + + for (i = 0; i < count; i++) + { + if (isSymbolEqual (ebbs[i]->entryLabel, eLabel)) + return ebbs[i]; + } + + return NULL; +} + + +/*-----------------------------------------------------------------*/ +/* ifFromIs - will return 1 if the from block matches this */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (ifFromIs) +{ + edge *ep = item; + V_ARG (eBBlock *, this); + + if (ep->from == this) + return 1; + + return 0; +} + + +/*-----------------------------------------------------------------*/ +/* edgesTo - returns a set of edges with to == supplied value */ +/*-----------------------------------------------------------------*/ +set * +edgesTo (eBBlock * to) +{ + set *result = NULL; + edge *loop; + + for (loop = setFirstItem (graphEdges); loop; loop = setNextItem (graphEdges)) + if (loop->to == to && !loop->from->noPath) + addSet (&result, loop->from); + + return result; +} + + +/*-----------------------------------------------------------------*/ +/* addiCodeToeBBlock - will add an iCode to the end of a block */ +/*-----------------------------------------------------------------*/ +void +addiCodeToeBBlock (eBBlock * ebp, iCode * ic, iCode * ip) +{ + ic->prev = ic->next = NULL; + /* if the insert point is given */ + if (ip) + { + ic->filename = ip->filename; + ic->lineno = ip->lineno; + ic->prev = ip->prev; + ip->prev = ic; + ic->next = ip; + if (!ic->prev) + ebp->sch = ic; + else + ic->prev->next = ic; + return; + } + + /* if the block has no instructions */ + if (ebp->ech == NULL) + { + ebp->sch = ebp->ech = ic; + ic->next = NULL; + return; + } + + /* if the last instruction is a goto */ + /* we add it just before the goto */ + if (ebp->ech->op == GOTO || ebp->ech->op == JUMPTABLE + || ebp->ech->op == RETURN) + { + ic->filename = ebp->ech->filename; + ic->lineno = ebp->ech->lineno; + ic->prev = ebp->ech->prev; + ebp->ech->prev = ic; + ic->next = ebp->ech; + if (!ic->prev) /* was the last only on in the block */ + ebp->sch = ic; + else + ic->prev->next = ic; + return; + } + + /* if the last one was a ifx statement we check to see */ + /* if the condition was defined in the previous instruction */ + /* if this is true then we put it before the condition else */ + /* we put it before if, this is to reduce register pressure, */ + /* we don't have to hold condition too long in a register */ + + /* loop induction sometimes appends a GOTO instruction, */ + /* it must be at the very end */ + if (ebp->ech->op == IFX && ic->op != GOTO) + { + iCode *ipoint; + +/* if ( !ebp->ech->prev ) */ +/* ipoint = ebp->ech ; */ +/* else */ +/* if (!IC_RESULT(ebp->ech->prev)) */ +/* ipoint = ebp->ech ; */ +/* else */ +/* if (IC_COND(ebp->ech)->key == IC_RESULT(ebp->ech->prev)->key) */ +/* ipoint = ebp->ech->prev; */ +/* else */ +/* ipoint = ebp->ech ; */ + ipoint = ebp->ech; + ic->filename = ipoint->filename; + ic->lineno = ipoint->lineno; + ic->prev = ipoint->prev; + ipoint->prev = ic; + ic->next = ipoint; + if (!ic->prev) + ebp->sch = ic; + else + ic->prev->next = ic; + return; + } + + /* will add it to the very end */ + ip = ebp->ech; + ip->next = ic; + ic->prev = ip; + ic->next = NULL; + ebp->ech = ic; + + return; +} + +/*-----------------------------------------------------------------*/ +/* remiCodeFromeBBlock - remove an iCode from BBlock */ +/*-----------------------------------------------------------------*/ +void +remiCodeFromeBBlock (eBBlock * ebb, iCode * ic) +{ + wassert (ic->seq>=ebb->fSeq && ic->seq<=ebb->lSeq); + if (ic->prev) + ic->prev->next = ic->next; + else + ebb->sch = ic->next; + + if (ic->next) + ic->next->prev = ic->prev; + else + ebb->ech = ic->prev; +} + +/*-----------------------------------------------------------------*/ +/* iCodeBreakDown : breakDown iCode chain to blocks */ +/*-----------------------------------------------------------------*/ +ebbIndex * +iCodeBreakDown (iCode * ic) +{ + eBBlock **ebbs = NULL; + iCode *loop = ic; + ebbIndex *ebbi; + + ebbi = Safe_alloc (sizeof (ebbIndex)); + ebbi->count = 0; + ebbi->dfOrder = NULL; /* no depth first order information yet */ + + /* allocate for the first entry */ + + ebbs = Safe_alloc (sizeof (eBBlock *)); + ebbi->bbOrder = ebbs; + + while (loop) + { + + /* convert 2 block */ + eBBlock *ebb = iCode2eBBlock (loop); + loop = ebb->ech->next; + + ebb->ech->next = NULL; /* mark the end of this chain */ + if (loop) + loop->prev = NULL; + ebb->bbnum = ebbi->count; /* save this block number */ + /* put it in the array */ + ebbs[(ebbi->count)++] = ebb; + + /* allocate for the next one. Remember to clear the new */ + /* pointer at the end, that was created by realloc. */ + + ebbs = Safe_realloc (ebbs, (ebbi->count + 1) * sizeof (eBBlock *)); + ebbi->bbOrder = ebbs; + + ebbs[ebbi->count] = 0; + + /* if this one ends in a goto or a conditional */ + /* branch then check if the block it is going */ + /* to already exists, if yes then this could */ + /* be a loop, add a preheader to the block it */ + /* goes to if it does not already have one */ + if (ebbs[(ebbi->count) - 1]->ech && + (ebbs[(ebbi->count) - 1]->ech->op == GOTO || + ebbs[(ebbi->count) - 1]->ech->op == IFX)) + { + + symbol *label; + eBBlock *destBlock; + + if (ebbs[(ebbi->count) - 1]->ech->op == GOTO) + label = IC_LABEL (ebbs[(ebbi->count) - 1]->ech); + else if (!(label = IC_TRUE (ebbs[(ebbi->count) - 1]->ech))) + label = IC_FALSE (ebbs[(ebbi->count) - 1]->ech); + + if ((destBlock = eBBWithEntryLabel (ebbi, label)) && + destBlock->preHeader == NULL && + otherPathsPresent (ebbs, destBlock)) + { + + symbol *preHeaderLabel = newiTempLoopHeaderLabel (1); + int i, j; + eBBlock *pBlock; + + /* go thru all block replacing the entryLabel with new label */ + /* till we reach the block , then we insert a new ebblock */ + for (i = 0; i < (ebbi->count); i++) + { + if (ebbs[i] == destBlock) + break; + replaceLabel (ebbs[i], label, preHeaderLabel); + } + + (ebbi->count)++; + + /* if we have stopped at the block , allocate for an extra one */ + + ebbs = Safe_realloc (ebbs, (ebbi->count + 1) * sizeof (eBBlock *)); + ebbi->bbOrder = ebbs; + + ebbs[ebbi->count] = 0; + + /* then move the block down one count */ + pBlock = ebbs[j = i]; + for (i += 1; i < (ebbi->count); i++) + { + eBBlock *xBlock; + + xBlock = ebbs[i]; + ebbs[i] = pBlock; + ebbs[i]->bbnum = i; + pBlock = xBlock; + } + + destBlock->preHeader = ebbs[j] = neweBBlock (); + ebbs[j]->bbnum = j; + ebbs[j]->entryLabel = preHeaderLabel; + ebbs[j]->sch = ebbs[j]->ech = newiCodeLabelGoto (LABEL, preHeaderLabel); + ebbs[j]->sch->filename = destBlock->sch->filename; + ebbs[j]->sch->lineno = destBlock->sch->lineno; + } + } + } + + /* mark the end */ + ebbs[ebbi->count] = NULL; + + return ebbi; +} + +/*-----------------------------------------------------------------*/ +/* replaceSymBySym : - replace operand by operand in blocks */ +/* replaces only left & right in blocks */ +/*-----------------------------------------------------------------*/ +void +replaceSymBySym (set * sset, operand * src, operand * dest) +{ + set *loop; + eBBlock *rBlock; + + /* for all blocks in the set do */ + for (loop = sset; loop; loop = loop->next) + { + iCode *ic; + + rBlock = loop->item; + /* for all instructions in this block do */ + for (ic = rBlock->sch; ic; ic = ic->next) + { + + /* if we find usage */ + if (ic->op == IFX && isOperandEqual (src, IC_COND (ic))) + { + bitVectUnSetBit (OP_USES (IC_COND (ic)), ic->key); + IC_COND (ic) = operandFromOperand (dest); + OP_USES(dest)=bitVectSetBit (OP_USES (dest), ic->key); + continue; + } + + if (isOperandEqual (IC_RIGHT (ic), src)) + { + bitVectUnSetBit (OP_USES (IC_RIGHT (ic)), ic->key); + IC_RIGHT (ic) = operandFromOperand (dest); + IC_RIGHT (ic)->isaddr = 0; + OP_USES(dest)=bitVectSetBit (OP_USES (dest), ic->key); + } + + if (isOperandEqual (IC_LEFT (ic), src)) + { + bitVectUnSetBit (OP_USES (IC_LEFT (ic)), ic->key); + if (POINTER_GET (ic) && IS_ITEMP (dest)) + { + IC_LEFT (ic) = operandFromOperand (dest); + IC_LEFT (ic)->isaddr = 1; + } + else + { + IC_LEFT (ic) = operandFromOperand (dest); + IC_LEFT (ic)->isaddr = 0; + } + OP_USES(dest)=bitVectSetBit (OP_USES (dest), ic->key); + } + + /* special case for pointer sets */ + if (POINTER_SET (ic) && + isOperandEqual (IC_RESULT (ic), src)) + { + bitVectUnSetBit (OP_USES (IC_RESULT (ic)), ic->key); + IC_RESULT (ic) = operandFromOperand (dest); + IC_RESULT (ic)->isaddr = 1; + OP_USES(dest)=bitVectSetBit (OP_USES (dest), ic->key); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* replaceLabel - replace reference to one label by another */ +/*-----------------------------------------------------------------*/ +void +replaceLabel (eBBlock * ebp, symbol * fromLbl, symbol * toLbl) +{ + iCode *ic; + + if (!ebp) + return; + + for (ic = ebp->sch; ic; ic = ic->next) + { + switch (ic->op) + { + + case GOTO: + if (isSymbolEqual (IC_LABEL (ic), fromLbl)) + IC_LABEL (ic) = toLbl; + break; + + case IFX: + if (IC_TRUE (ic) && isSymbolEqual (IC_TRUE (ic), fromLbl)) + IC_TRUE (ic) = toLbl; + else if (isSymbolEqual (IC_FALSE (ic), fromLbl)) + IC_FALSE (ic) = toLbl; + break; + } + } + + return; + +} + + +/*-----------------------------------------------------------------*/ +/* iCodeFromeBBlock - convert basic block to iCode chain */ +/*-----------------------------------------------------------------*/ +iCode * +iCodeFromeBBlock (eBBlock ** ebbs, int count) +{ + int i = 1; + iCode *ric = ebbs[0]->sch; + iCode *lic = ebbs[0]->ech; + + for (; i < count; i++) + { + if (ebbs[i]->sch == NULL) + continue; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + { + iCode *ic = NULL; + bool foundNonlabel = 0; + ic=ebbs[i]->sch; + do + { + if (ic->op != LABEL) + { + foundNonlabel = 1; + break; + } + if (ic==ebbs[i]->ech) + break; + ic = ic->next; + } + while (ic); + if (foundNonlabel && ic) + { + werrorfl (ic->filename, ic->lineno, W_CODE_UNREACH); + continue; + } + } + + lic->next = ebbs[i]->sch; + lic->next->prev = lic; + lic = ebbs[i]->ech; + + } + + return ric; +} + +/*-----------------------------------------------------------------*/ +/* otherPathsPresent - determines if there is a path from _entry */ +/* to this block in a half constructed set of blocks */ +/*-----------------------------------------------------------------*/ +int +otherPathsPresent (eBBlock ** ebbs, eBBlock * this) +{ + int i; + + /* for all blocks preceding this block */ + for (i = 0; i < this->bbnum; i++) + { + iCode *ic; + + /* if there is a reference to the entry label of this block */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + switch (ic->op) + { + case GOTO: + if (IC_LABEL (ic)->key == this->entryLabel->key) + return 1; + break; + + case IFX: + if (IC_TRUE (ic)) + { + if (IC_TRUE (ic)->key == this->entryLabel->key) + return 1; + } + else if (IC_FALSE (ic)->key == this->entryLabel->key) + return 1; + break; + } + } + } + + /* comes here means we have not found it yet */ + /* in this case check if the previous block */ + /* ends in a goto if it does then we have no */ + /* path else we have a path */ + if (this->bbnum && ebbs[this->bbnum - 1]->ech && + ebbs[this->bbnum - 1]->ech->op == GOTO) + return 0; + else + return 1; +} diff --git a/src/SDCCBBlock.h b/src/SDCCBBlock.h new file mode 100644 index 0000000..1f853df --- /dev/null +++ b/src/SDCCBBlock.h @@ -0,0 +1,112 @@ +/*------------------------------------------------------------------------- + + SDCCBBlock.h - header file for Basic Blocks + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCBBLOCK_H +#define SDCCBBLOCK_H 1 + +/* definition of a basic block */ +typedef struct eBBlock + { + int dfnum; /* depth first number */ + int bbnum; /* index into array of numbers */ + int depth; /* loop depth of this block */ + int fSeq; /* sequence number of first iCode */ + int lSeq; /* sequence number of the last iCode */ + unsigned int visited:1; /* visitied flag */ + unsigned int hasFcall:1; /* has a function call */ + unsigned int noPath:1; /* there is no path from _entry to this block */ + unsigned int isLastInLoop:1; /* is the last block in a loop */ + struct eBBlock *isConditionalExitFrom; /* this block ends with a return or goto from a conditional block*/ + symbol *entryLabel; /* entry label */ + + iCode *sch; /* pointer to start of code chain */ + iCode *ech; /* pointer to last of code chain */ + + struct eBBlock *preHeader; /* preheader if this is a loop entry */ + struct region *partOfLoop; /* pointer to the loop region this block is part of */ + + /* control flow analysis */ + set *succList; /* list eBBlocks which are successors */ + bitVect *succVect; /* bitVector of successors (index is bbnum) */ + set *predList; /* predecessors of this basic block */ + bitVect *domVect; /* list of nodes this is dominated by (index is bbnum) */ + + /* data flow analysis */ + set *inExprs; /* in coming common expressions */ + set *outExprs; /* out going common expressions */ + set *killedExprs; /* killed common expressions */ + bitVect *inDefs; /* in coming defintions */ + bitVect *outDefs; /* out going defintions */ + bitVect *defSet; /* symbols defined in block */ + bitVect *ldefs; /* local definitions only */ + bitVect *usesDefs; /* which definitions are used in this block */ + bitVect *ptrsSet; /* pointers assigned values in the block */ + bitVect *inPtrsSet; /* in coming pointers assigned values */ + bitVect *ndompset; /* pointers set by non-dominating basic blocks */ + set *addrOf; /* symbols for which addres has been taken in the block */ + bitVect *linds; /* if loop exit this contains defNumbers + for the inductions */ + } +eBBlock; + +typedef struct ebbIndex + { + int count; /* number of blocks in the index */ + eBBlock **bbOrder; /* blocks in bbnum order */ + eBBlock **dfOrder; /* blocks in dfnum (depth first) order */ + } +ebbIndex; + +typedef struct edge + { + + eBBlock *from; /* from basic block */ + eBBlock *to; /* to Basic Block */ + } +edge; + + +extern int eBBNum; +extern set *graphEdges; + + +DEFSETFUNC (printEntryLabel); +eBBlock *neweBBlock (); +edge *newEdge (eBBlock *, eBBlock *); +eBBlock *eBBWithEntryLabel (ebbIndex *, symbol *); +DEFSETFUNC (ifFromIs); +set *edgesTo (eBBlock *); +void remiCodeFromeBBlock (eBBlock *, iCode *); +void addiCodeToeBBlock (eBBlock *, iCode *, iCode *); +ebbIndex *iCodeBreakDown (iCode *); +void replaceSymBySym (set *, operand *, operand *); +iCode *iCodeFromeBBlock (eBBlock **, int); +int otherPathsPresent (eBBlock **, eBBlock *); +void replaceLabel (eBBlock *, symbol *, symbol *); +void dumpEbbsToFileExt (int, ebbIndex *); +void dumpLiveRanges (int, hTab * liveRanges); +void closeDumpFiles(); + +#endif diff --git a/src/SDCCargs.h b/src/SDCCargs.h new file mode 100644 index 0000000..5a143d6 --- /dev/null +++ b/src/SDCCargs.h @@ -0,0 +1,67 @@ +/*------------------------------------------------------------------------- + SDCCmain.c - main file + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/** Definition of the structures used by the options parser. The port + may implement one of these for any options it wants parsed + automatically. +*/ +#ifndef SDCCARGS_H +#define SDCCARGS_H + +/** Specifies option argument types. */ +enum cl_opt_arg_type { + CLAT_BOOLEAN = 0, /* has to be zero! */ + CLAT_INTEGER, + CLAT_STRING, + CLAT_SET, + CLAT_ADD_SET +}; + +/** Table of all options supported by all ports. + This table provides: + * A reference for all options. + * An easy way to maintain help for the options. + * Automatic support for setting flags on simple options. +*/ +typedef struct + { + /** The short option character e.g. 'h' for -h. 0 for none. */ + char shortOpt; + /** Long option e.g. "--help". Includes the -- prefix. NULL for + none. */ + const char *longOpt; + /** Pointer to an int that will be incremented every time the + option is encountered. May be NULL. + */ + void *pparameter; + /** Help text to go with this option. May be NULL. */ + const char *help; + /** Optin argument type */ + enum cl_opt_arg_type arg_type; + } OPTION; + +char *getStringArg(const char *szStart, char **argv, int *pi, int argc); +int getIntArg(const char *szStart, char **argv, int *pi, int argc); + +#endif diff --git a/src/SDCCasm.c b/src/SDCCasm.c new file mode 100644 index 0000000..08d3730 --- /dev/null +++ b/src/SDCCasm.c @@ -0,0 +1,627 @@ +/*------------------------------------------------------------------------- + SDCCasm.c - header file for all types of stuff to support different assemblers. + + + Written By - Michael Hope 2000 + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* Provides output functions that modify the output string + based on the input tokens and the assembler token mapping + specification loaded. + + Note that the functions below only handle digit format modifiers. + eg %02X is ok, but %lu and %.4u will fail. +*/ + +#include + +#include "common.h" +#include "dbuf_string.h" + +/* A 'token' is like !blah or %24f and is under the programmers + control. */ + +static hTab *_h; + +char * +FileBaseName (char *fileFullName) +{ + char *p = fileFullName; + + if (!fileFullName) { + return "unknown"; + } + + while (*fileFullName) + { + if ((*fileFullName == '/') || (*fileFullName == '\\') || (*fileFullName == ':')) + { + p = fileFullName; + p++; + } + fileFullName++; + } + return p; +} + +void +dbuf_tvprintf (struct dbuf_s *dbuf, const char *format, va_list ap) +{ + // Under Linux PPC va_list is a structure instead of a primitive type, + // and doesnt like being passed around. This version turns everything + // into one function. + + // Supports: + // !tokens + // %[CIFN] - special formats with no argument (ie list isnt touched) + // All of the system formats + + // This is acheived by expanding the tokens and zero arg formats into + // one big format string, which is passed to the native printf. + static int count; + struct dbuf_s tmpDBuf; + const char *noTokens; + const char *sz = format; + + dbuf_init(&tmpDBuf, INITIAL_INLINEASM); + + /* First pass: expand all of the macros */ + while (*sz) + { + if (*sz == '!') + { + /* Start of a token. Search until the first + [non alpha, *] and call it a token. */ + const char *t; + struct dbuf_s token; + + dbuf_init (&token, 64); + sz++; + while (isalpha ((unsigned char)*sz) || *sz == '*') + { + dbuf_append (&token, sz++, 1); + } + /* Now find the token in the token list */ + if ((t = shash_find (_h, dbuf_c_str(&token)))) + { + dbuf_append_str (&tmpDBuf, t); + } + else + { + fprintf (stderr, "Cant find token \"%s\"\n", dbuf_c_str(&token)); + wassert (0); + } + dbuf_destroy (&token); + } + else + { + dbuf_append_char (&tmpDBuf, *sz++); + } + } + + /* Second pass: Expand any macros that we own */ + dbuf_c_str (&tmpDBuf); + sz = noTokens = dbuf_detach (&tmpDBuf); + + /* recycle tmpDBuf */ + dbuf_init (&tmpDBuf, INITIAL_INLINEASM); + + while (*sz) + { + if (*sz == '%') + { + // See if its one that we handle. + sz++; + switch (*sz) + { + case 'C': + // Code segment name. + dbuf_append_str (&tmpDBuf, CODE_NAME); + sz++; + break; + + case 'F': + // Source file name. + dbuf_append_str (&tmpDBuf, fullSrcFileName); + sz++; + break; + + case 'N': + // Current function name. + dbuf_append_str (&tmpDBuf, currFunc->rname); + sz++; + break; + + case 'I': + // Unique ID. + dbuf_printf (&tmpDBuf, "%u", ++count); + sz++; + break; + + default: + // Not one of ours. Copy until the end. + dbuf_append_char (&tmpDBuf, '%'); + while (!isalpha ((unsigned char)*sz)) + dbuf_append_char (&tmpDBuf, *sz++); + + dbuf_append_char (&tmpDBuf, *sz++); + } + } + else + { + dbuf_append_char (&tmpDBuf, *sz++); + } + } + + dbuf_free (noTokens); + + dbuf_vprintf (dbuf, dbuf_c_str (&tmpDBuf), ap); + + dbuf_destroy (&tmpDBuf); +} + +void +dbuf_tprintf (struct dbuf_s *dbuf, const char *szFormat, ...) +{ + va_list ap; + va_start (ap, szFormat); + dbuf_tvprintf (dbuf, szFormat, ap); + va_end (ap); +} + +void +tsprintf (char *buffer, size_t len, const char *szFormat, ...) +{ + va_list ap; + struct dbuf_s dbuf; + size_t copyLen; + + dbuf_init (&dbuf, INITIAL_INLINEASM); + + va_start (ap, szFormat); + dbuf_tvprintf (&dbuf, szFormat, ap); + va_end (ap); + + copyLen = min (len - 1, dbuf_get_length (&dbuf)); + memcpy (buffer, dbuf_get_buf (&dbuf), copyLen); + buffer[copyLen] = '\0'; + dbuf_destroy (&dbuf); +} + +void +tfprintf (FILE *fp, const char *szFormat, ...) +{ + va_list ap; + struct dbuf_s dbuf; + size_t len; + + dbuf_init (&dbuf, INITIAL_INLINEASM); + + va_start (ap, szFormat); + dbuf_tvprintf (&dbuf, szFormat, ap); + va_end (ap); + + len = dbuf_get_length (&dbuf); + fwrite(dbuf_get_buf (&dbuf), 1, len, fp); + dbuf_destroy (&dbuf); +} + +void +asm_addTree (const ASM_MAPPINGS *pMappings) +{ + const ASM_MAPPING *pMap; + + /* Traverse down first */ + if (pMappings->pParent) + asm_addTree (pMappings->pParent); + pMap = pMappings->pMappings; + while (pMap->szKey && pMap->szValue) { + shash_add (&_h, pMap->szKey, pMap->szValue); + pMap++; + } +} + +/*-----------------------------------------------------------------*/ +/* printILine - return the readable i-code for this ic */ +/*-----------------------------------------------------------------*/ +const char * +printILine (iCode *ic) +{ + char *verbalICode; + struct dbuf_s tmpBuf; + size_t len; + iCodeTable *icTab = getTableEntry (ic->op); + + dbuf_init (&tmpBuf, 1024); + + if (INLINEASM == ic->op) + dbuf_append (&tmpBuf, "inline", (sizeof "inline") - 1); + else + { + /* stuff the temporary file with the readable icode */ + icTab->iCodePrint (&tmpBuf, ic, icTab->printName); + } + + len = dbuf_get_length (&tmpBuf); + + /* null terminate the buffer */ + dbuf_c_str (&tmpBuf); + verbalICode = dbuf_detach (&tmpBuf); + + /* kill the trailing NL */ + if (len > 0 && '\n' == verbalICode[len - 1]) + verbalICode[--len] = '\0'; + + /* and throw it up */ + return verbalICode; +} + + +/*-----------------------------------------------------------------*/ +/* skipLine - skip the line from file infp */ +/*-----------------------------------------------------------------*/ +static int +skipLine (FILE *infp) +{ + int c; + static char is_eof = 0; + size_t len = 0; + + if (is_eof) + return 0; + + while ((c = getc(infp)) != '\n' && EOF != c) + ++len; + + if (EOF == c) + { + if (len) + { + /* EOF in the middle of the line */ + is_eof = 1; + return 1; + } + else + return 0; + } + else + return 1; +} + +/*-----------------------------------------------------------------*/ +/* printCLine - return the c-code for this lineno */ +/*-----------------------------------------------------------------*/ +/* int rewinds=0; */ +const char * +printCLine (const char *srcFile, int lineno) +{ + static FILE *inFile = NULL; + static struct dbuf_s line; + static struct dbuf_s lastSrcFile; + static char dbufInitialized = 0; + static int inLineNo = 0; + size_t len; + + if (!dbufInitialized) + { + dbuf_init (&line, 1024); + dbuf_init (&lastSrcFile, PATH_MAX); + dbufInitialized = 1; + } + else + { + /* empty the dynamic buffer */ + dbuf_set_length (&line, 0); + } + + if (inFile) + { + if (strcmp (dbuf_c_str (&lastSrcFile), srcFile) != 0) + { + fclose (inFile); + inFile = NULL; + inLineNo = 0; + dbuf_set_length (&lastSrcFile, 0); + dbuf_append_str (&lastSrcFile, srcFile); + } + } + + if (!inFile) + { + if (!(inFile = fopen(srcFile, "r"))) + { + /* can't open the file: + don't panic, just return the error message */ + dbuf_printf(&line, "ERROR: %s", strerror(errno)); + + return dbuf_c_str (&line); + } + else + { + dbuf_set_length (&lastSrcFile, 0); + dbuf_append_str (&lastSrcFile, srcFile); + } + } + + if (inLineNo > lineno) + { + /* past the lineno: rewind the file pointer */ + rewind (inFile); + inLineNo = 0; + /* rewinds++; */ + } + + /* skip lines until lineno */ + while (inLineNo + 1 < lineno) + { + if (!skipLine (inFile)) + goto err_no_line; + ++inLineNo; + } + + /* get the line */ + if (0 != (len = dbuf_getline (&line, inFile))) + { + const char *inLineString = dbuf_c_str (&line); + + ++inLineNo; + + /* remove the trailing NL */ + if (len > 0 &&'\n' == inLineString[len - 1]) + { + dbuf_set_length (&line, --len); + inLineString = dbuf_c_str (&line); + } + + /* skip leading spaces */ + while (isspace (*inLineString)) + inLineString++; + + return inLineString; + } + +err_no_line: + dbuf_printf(&line, "ERROR: no line number %d in file %s", lineno, srcFile); + + return dbuf_c_str (&line); +} + +static const ASM_MAPPING _asxxxx_mapping[] = +{ + {"labeldef", "%s::"}, + {"slabeldef", "%s:"}, + {"tlabeldef", "%05d$:"}, + {"tlabel", "%05d$"}, + {"immed", "#"}, + {"zero", "#0x00"}, + {"one", "#0x01"}, + {"area", ".area %s"}, + {"areacode", ".area %s"}, + {"areadata", ".area %s"}, + {"areahome", ".area %s"}, + {"ascii", ".ascii \"%s\""}, + {"ds", ".ds %d"}, + {"db", ".db"}, + {"dbs", ".db %s"}, + {"dw", ".dw"}, + {"dws", ".dw %s"}, + {"constbyte", "0x%02X"}, + {"constword", "0x%04X"}, + {"immedword", "#0x%04X"}, + {"immedbyte", "#0x%02X"}, + {"hashedstr", "#%s"}, + {"lsbimmeds", "#<%s"}, + {"msbimmeds", "#>%s"}, + {"module", ".module %s"}, + {"global", ".globl %s"}, + {"fileprelude", ""}, + {"functionheader", + "; ---------------------------------\n" + "; Function %s\n" + "; ---------------------------------" + }, + {"functionlabeldef", "%s:"}, + {"bankimmeds", "0 ; PENDING: bank support"}, + {"los", "(%s & 0xFF)"}, + {"his", "(%s >> 8)"}, + {"hihis", "(%s >> 16)"}, + {"hihihis", "(%s >> 24)"}, + {"lod", "(%d & 0xFF)"}, + {"hid", "(%d >> 8)"}, + {"hihid", "(%d >> 16)"}, + {"hihihid", "(%d >> 24)"}, + {"lol", "(%05d$ & 0xFF)"}, + {"hil", "(%05d$ >> 8)"}, + {"hihil", "(%05d$ >> 16)"}, + {"hihihil", "(%05d$ >> 24)"}, + {"equ", "="}, + {"org", ".org 0x%04X"}, + {NULL, NULL} +}; + +static const ASM_MAPPING _gas_mapping[] = +{ + {"labeldef", "%s::"}, + {"slabeldef", "%s:"}, + {"tlabeldef", "%05d$:"}, + {"tlabel", "%05d$"}, + {"immed", "#"}, + {"zero", "#0x00"}, + {"one", "#0x01"}, + {"area", ".section %s"}, + {"areacode", ".section %s"}, + {"areadata", ".section %s"}, + {"areahome", ".section %s"}, + {"ascii", ".ascii \"%s\""}, + {"ds", ".ds %d"}, + {"db", ".db"}, + {"dbs", ".db %s"}, + {"dw", ".dw"}, + {"dws", ".dw %s"}, + {"constbyte", "0x%02X"}, + {"constword", "0x%04X"}, + {"immedword", "#0x%04X"}, + {"immedbyte", "#0x%02X"}, + {"hashedstr", "#%s"}, + {"lsbimmeds", "#<%s"}, + {"msbimmeds", "#>%s"}, + {"module", ".file \"%s.c\""}, + {"global", ".globl %s"}, + {"extern", ".globl %s"}, + {"fileprelude", ""}, + {"functionheader", + "; ---------------------------------\n" + "; Function %s\n" + "; ---------------------------------" + }, + {"functionlabeldef", "%s:"}, + {"bankimmeds", "0 ; PENDING: bank support"}, + {NULL, NULL} +}; + +static const ASM_MAPPING _a390_mapping[] = +{ + {"labeldef", "%s:"}, + {"slabeldef", "%s:"}, + {"tlabeldef", "L%05d:"}, + {"tlabel", "L%05d"}, + {"immed", "#"}, + {"zero", "#0"}, + {"one", "#1"}, + {"area", "; SECTION NOT SUPPORTED"}, + {"areacode", "; SECTION NOT SUPPORTED"}, + {"areadata", "; SECTION NOT SUPPORTED"}, + {"areahome", "; SECTION NOT SUPPORTED"}, + {"ascii", "db \"%s\""}, + {"ds", "; STORAGE NOT SUPPORTED"}, + {"db", "db"}, + {"dbs", "db \"%s\""}, + {"dw", "dw"}, + {"dws", "dw %s"}, + {"constbyte", "0%02xh"}, + {"constword", "0%04xh"}, + {"immedword", "#0%04Xh"}, + {"immedbyte", "#0%02Xh"}, + {"hashedstr", "#%s"}, + {"lsbimmeds", "#<%s"}, + {"msbimmeds", "#>%s"}, + {"module", "; .file \"%s.c\""}, + {"global", "; .globl %s"}, + {"fileprelude", ""}, + {"functionheader", + "; ---------------------------------\n" + "; Function %s\n" + "; ---------------------------------" + }, + {"functionlabeldef", "%s:"}, + {"bankimmeds", "0 ; PENDING: bank support"}, + {"los", "(%s & 0FFh)"}, + {"his", "((%s / 256) & 0FFh)"}, + {"hihis", "((%s / 65536) & 0FFh)"}, + {"hihihis", "((%s / 16777216) & 0FFh)"}, + {"lod", "(%d & 0FFh)"}, + {"hid", "((%d / 256) & 0FFh)"}, + {"hihid", "((%d / 65536) & 0FFh)"}, + {"hihihid", "((%d / 16777216) & 0FFh)"}, + {"lol", "(L%05d & 0FFh)"}, + {"hil", "((L%05d / 256) & 0FFh)"}, + {"hihil", "((L%05d / 65536) & 0FFh)"}, + {"hihihil", "((L%09d / 16777216) & 0FFh)"}, + {"equ", " equ"}, + {"org", ".org 0x%04X"}, + {NULL, NULL} +}; + +static const ASM_MAPPING _xa_asm_mapping[] = +{ + {"labeldef", "%s:"}, + {"slabeldef", "%s:"}, + {"tlabeldef", "L%05d:"}, + {"tlabel", "L%05d"}, + {"immed", "#"}, + {"zero", "#0"}, + {"one", "#1"}, + {"area", ".area %s"}, + {"areacode", ".area %s"}, + {"areadata", ".area %s"}, + {"areahome", ".area %s"}, + {"ascii", ".db \"%s\""}, + {"ds", ".ds %d"}, + {"db", ".db"}, + {"dbs", ".db \"%s\""}, + {"dw", ".dw"}, + {"dws", ".dw %s"}, + {"constbyte", "0x%02x"}, + {"constword", "0x%04x"}, + {"immedword", "0x%04x"}, + {"immedbyte", "0x%02x"}, + {"hashedstr", "#%s"}, + {"lsbimmeds", "#<%s"}, + {"msbimmeds", "#>%s"}, + {"module", "; .module %s"}, + {"global", ".globl %s"}, + {"fileprelude", ""}, + {"functionheader", + "; ---------------------------------\n" + "; Function %s\n" + "; ---------------------------------" + }, + {"functionlabeldef", "%s:"}, + {"bankimmeds", "0 ; PENDING: bank support"}, + {"los", "(%s & 0FFh)"}, + {"his", "((%s / 256) & 0FFh)"}, + {"hihis", "((%s / 65536) & 0FFh)"}, + {"hihihis", "((%s / 16777216) & 0FFh)"}, + {"lod", "(%d & 0FFh)"}, + {"hid", "((%d / 256) & 0FFh)"}, + {"hihid", "((%d / 65536) & 0FFh)"}, + {"hihihid", "((%d / 16777216) & 0FFh)"}, + {"lol", "(L%05d & 0FFh)"}, + {"hil", "((L%05d / 256) & 0FFh)"}, + {"hihil", "((L%05d / 65536) & 0FFh)"}, + {"hihihil", "((L%09d / 16777216) & 0FFh)"}, + {"equ", " equ"}, + {NULL, NULL} +}; + +const ASM_MAPPINGS asm_asxxxx_mapping = +{ + NULL, + _asxxxx_mapping +}; + +const ASM_MAPPINGS asm_gas_mapping = +{ + NULL, + _gas_mapping +}; + +const ASM_MAPPINGS asm_a390_mapping = +{ + NULL, + _a390_mapping +}; + +const ASM_MAPPINGS asm_xa_asm_mapping = +{ + NULL, + _xa_asm_mapping +}; diff --git a/src/SDCCasm.h b/src/SDCCasm.h new file mode 100644 index 0000000..aea1021 --- /dev/null +++ b/src/SDCCasm.h @@ -0,0 +1,67 @@ +/*------------------------------------------------------------------------- + SDCCasm.h - header file for all types of stuff to support different assemblers. + + Written By - Michael Hope 2000 + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef ASM_PORT_INCLUDE +#define ASM_PORT_INCLUDE + +#include "dbuf.h" + +void tfprintf (FILE * fp, const char *szFormat, ...); +void tsprintf (char *buffer, size_t len, const char *szFormat, ...); +void dbuf_tprintf (struct dbuf_s *dbuf, const char *szFormat, ...); +void dbuf_tvprintf (struct dbuf_s *dbuf, const char *szFormat, va_list ap); + +typedef struct + { + const char *szKey; + const char *szValue; + } +ASM_MAPPING; + +typedef struct _ASM_MAPPINGS ASM_MAPPINGS; + +/* PENDING: could include the peephole rules here as well. + */ +struct _ASM_MAPPINGS + { + const ASM_MAPPINGS *pParent; + const ASM_MAPPING *pMappings; + }; + +/* The default asxxxx token mapping. + */ +extern const ASM_MAPPINGS asm_asxxxx_mapping; +extern const ASM_MAPPINGS asm_gas_mapping; +extern const ASM_MAPPINGS asm_a390_mapping; +extern const ASM_MAPPINGS asm_xa_asm_mapping; + +/** Last entry has szKey = NULL. + */ +void asm_addTree (const ASM_MAPPINGS *pMappings); + +char *FileBaseName (char *fileFullName); + +const char *printILine (iCode *ic); +const char *printCLine (const char *srcFile, int lineno); +#endif diff --git a/src/SDCCast.c b/src/SDCCast.c new file mode 100644 index 0000000..3914083 --- /dev/null +++ b/src/SDCCast.c @@ -0,0 +1,7323 @@ +/*------------------------------------------------------------------------- + SDCCast.c - source file for parser support & all ast related routines + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#define DEBUG_CF(x) /* puts(x); */ + +#include "common.h" + +int currLineno = 0; +set *astList = NULL; +set *operKeyReset = NULL; +ast *staticAutos = NULL; +int labelKey = 1; +static struct { + int count; /* number of inline functions inserted */ + symbol * retsym; /* variable for inlined function return value */ + symbol * retlab; /* label ending inlined function (virtual return) */ +} inlineState; + +#define LRVAL(x) x->left->rvalue +#define RRVAL(x) x->right->rvalue +#define TRVAL(x) x->rvalue +#define LLVAL(x) x->left->lvalue +#define RLVAL(x) x->right->lvalue +#define TLVAL(x) x->lvalue +#define RTYPE(x) x->right->ftype +#define RETYPE(x) x->right->etype +#define LTYPE(x) x->left->ftype +#define LETYPE(x) x->left->etype +#define TTYPE(x) x->ftype +#define TETYPE(x) x->etype +#define ALLOCATE 1 +#define DEALLOCATE 2 + +int noLineno = 0; +int noAlloc = 0; +symbol *currFunc=NULL; +static ast *createIval (ast *, sym_link *, initList *, ast *, ast *); +static ast *createIvalCharPtr (ast *, sym_link *, ast *, ast *); +static ast *optimizeCompare (ast *); +ast *optimizeRRCRLC (ast *); +ast *optimizeSWAP (ast *); +ast *optimizeGetHbit (ast *, RESULT_TYPE); +ast *optimizeGetAbit (ast *, RESULT_TYPE); +ast *optimizeGetByte (ast *, RESULT_TYPE); +ast *optimizeGetWord (ast *, RESULT_TYPE); +static ast *backPatchLabels (ast *, symbol *, symbol *); +void PA(ast *t); +int inInitMode = 0; +memmap *GcurMemmap=NULL; /* points to the memmap that's currently active */ +struct dbuf_s *codeOutBuf; +int +ptt (ast * tree) +{ + printTypeChain (tree->ftype, stdout); + return 0; +} + + +/*-----------------------------------------------------------------*/ +/* newAst - creates a fresh node for an expression tree */ +/*-----------------------------------------------------------------*/ +static ast * +newAst_ (unsigned type) +{ + ast *ex; + + ex = Safe_alloc ( sizeof (ast)); + + ex->type = type; + ex->lineno = (noLineno ? 0 : lexLineno); + ex->filename = lexFilename; + ex->level = NestLevel; + ex->block = currBlockno; + ex->initMode = inInitMode; + ex->seqPoint = seqPointNo; + return ex; +} + +ast * +newAst_VALUE (value * val) +{ + ast *ex = newAst_ (EX_VALUE); + ex->opval.val = val; + return ex; +} + +ast * +newAst_OP (unsigned op) +{ + ast *ex = newAst_ (EX_OP); + ex->opval.op = op; + return ex; +} + +ast * +newAst_LINK (sym_link * val) +{ + ast *ex = newAst_ (EX_LINK); + ex->opval.lnk = val; + return ex; +} + +/*-----------------------------------------------------------------*/ +/* newNode - creates a new node */ +/*-----------------------------------------------------------------*/ +ast * +newNode (long op, ast * left, ast * right) +{ + ast *ex; + + ex = newAst_OP (op); + ex->left = left; + ex->right = right; + + return ex; +} + +/*-----------------------------------------------------------------*/ +/* newIfxNode - creates a new Ifx Node */ +/*-----------------------------------------------------------------*/ +ast * +newIfxNode (ast * condAst, symbol * trueLabel, symbol * falseLabel) +{ + ast *ifxNode; + + /* if this is a literal then we already know the result */ + if (condAst->etype && IS_LITERAL (condAst->etype)) + { + /* then depending on the expression value */ + if (floatFromVal (condAst->opval.val)) + ifxNode = newNode (GOTO, + newAst_VALUE (symbolVal (trueLabel)), + NULL); + else + ifxNode = newNode (GOTO, + newAst_VALUE (symbolVal (falseLabel)), + NULL); + } + else + { + ifxNode = newNode (IFX, condAst, NULL); + ifxNode->trueLabel = trueLabel; + ifxNode->falseLabel = falseLabel; + } + + return ifxNode; +} + +/*-----------------------------------------------------------------*/ +/* copyAstValues - copies value portion of ast if needed */ +/*-----------------------------------------------------------------*/ +void +copyAstValues (ast * dest, ast * src) +{ + switch (src->opval.op) + { + case BLOCK: + dest->values.sym = copySymbolChain (src->values.sym); + break; + + case SWITCH: + dest->values.switchVals.swVals = + copyValue (src->values.switchVals.swVals); + dest->values.switchVals.swDefault = + src->values.switchVals.swDefault; + dest->values.switchVals.swNum = + src->values.switchVals.swNum; + break; + + case INLINEASM: + dest->values.inlineasm = Safe_strdup(src->values.inlineasm); + break; + + case ARRAYINIT: + dest->values.constlist = copyLiteralList(src->values.constlist); + break; + + case FOR: + AST_FOR (dest, trueLabel) = copySymbol (AST_FOR (src, trueLabel)); + AST_FOR (dest, continueLabel) = copySymbol (AST_FOR (src, continueLabel)); + AST_FOR (dest, falseLabel) = copySymbol (AST_FOR (src, falseLabel)); + AST_FOR (dest, condLabel) = copySymbol (AST_FOR (src, condLabel)); + AST_FOR (dest, initExpr) = copyAst (AST_FOR (src, initExpr)); + AST_FOR (dest, condExpr) = copyAst (AST_FOR (src, condExpr)); + AST_FOR (dest, loopExpr) = copyAst (AST_FOR (src, loopExpr)); + } + +} + +/*-----------------------------------------------------------------*/ +/* copyAst - makes a copy of a given astession */ +/*-----------------------------------------------------------------*/ +ast * +copyAst (ast * src) +{ + ast *dest; + + if (!src) + return NULL; + + dest = Safe_alloc ( sizeof (ast)); + + dest->type = src->type; + dest->filename = src->filename; + dest->lineno = src->lineno; + dest->level = src->level; + dest->funcName = src->funcName; + dest->reversed = src->reversed; + + if (src->ftype) + dest->etype = getSpec (dest->ftype = copyLinkChain (src->ftype)); + + /* if this is a leaf */ + /* if value */ + if (src->type == EX_VALUE) + { + dest->opval.val = copyValue (src->opval.val); + goto exit; + } + + /* if link */ + if (src->type == EX_LINK) + { + dest->opval.lnk = copyLinkChain (src->opval.lnk); + goto exit; + } + + dest->opval.op = src->opval.op; + + /* if this is a node that has special values */ + copyAstValues (dest, src); + + dest->trueLabel = copySymbol (src->trueLabel); + dest->falseLabel = copySymbol (src->falseLabel); + dest->left = copyAst (src->left); + dest->right = copyAst (src->right); +exit: + return dest; + +} +#if 0 +/*-----------------------------------------------------------------*/ +/* removeIncDecOps: remove for side effects in *_ASSIGN's */ +/* "*s++ += 3" -> "*s++ = *s++ + 3" */ +/*-----------------------------------------------------------------*/ +ast *removeIncDecOps (ast * tree) { + + // traverse the tree and remove inc/dec ops + + if (!tree) + return NULL; + + if (tree->type == EX_OP && + (tree->opval.op == INC_OP || tree->opval.op == DEC_OP)) { + if (tree->left) + tree=tree->left; + else + tree=tree->right; + } + + tree->left=removeIncDecOps(tree->left); + tree->right=removeIncDecOps(tree->right); + + return tree; +} + +/*-----------------------------------------------------------------*/ +/* removePreIncDecOps: remove for side effects in *_ASSIGN's */ +/* "*++s += 3" -> "*++s = *++s + 3" */ +/*-----------------------------------------------------------------*/ +ast *removePreIncDecOps (ast * tree) { + + // traverse the tree and remove pre-inc/dec ops + + if (!tree) + return NULL; + + if (tree->type == EX_OP && + (tree->opval.op == INC_OP || tree->opval.op == DEC_OP)) { + if (tree->right) + tree=tree->right; + } + + tree->left=removePreIncDecOps(tree->left); + tree->right=removePreIncDecOps(tree->right); + + return tree; +} + +/*-----------------------------------------------------------------*/ +/* removePostIncDecOps: remove for side effects in *_ASSIGN's */ +/* "*s++ += 3" -> "*s++ = *s++ + 3" */ +/*-----------------------------------------------------------------*/ +ast *removePostIncDecOps (ast * tree) { + + // traverse the tree and remove pre-inc/dec ops + + if (!tree) + return NULL; + + if (tree->type == EX_OP && + (tree->opval.op == INC_OP || tree->opval.op == DEC_OP)) { + if (tree->left) + tree=tree->left; + } + + tree->left=removePostIncDecOps(tree->left); + tree->right=removePostIncDecOps(tree->right); + + return tree; +} +#endif +/*-----------------------------------------------------------------*/ +/* replaceAstWithTemporary: Replace the AST pointed to by the arg */ +/* with a reference to a new temporary variable. Returns*/ +/* an AST which assigns the original value to the */ +/* temporary. */ +/*-----------------------------------------------------------------*/ +static ast *replaceAstWithTemporary(ast **treeptr) +{ + symbol *sym = newSymbol (genSymName(NestLevel), NestLevel ); + ast *tempvar; + + /* Tell gatherImplicitVariables() to automatically give the + symbol the correct type */ + sym->infertype = 1; + sym->type = NULL; + sym->etype = NULL; + + tempvar = newNode('=', newAst_VALUE(symbolVal(sym)), *treeptr); + *treeptr = newAst_VALUE(symbolVal(sym)); + + addSymChain(&sym); + + return tempvar; +} + +/*-----------------------------------------------------------------*/ +/* createRMW: Create a read-modify-write expression, using a */ +/* temporary variable if necessary to avoid duplicating */ +/* any side effects, for use in e.g. */ +/* foo()->count += 5; becomes */ +/* tmp = foo(); tmp->count = tmp->count + 5; */ +/*-----------------------------------------------------------------*/ +ast * createRMW (ast *target, unsigned op, ast *operand) +{ + ast *readval, *writeval; + ast *tempvar1 = NULL; + ast *tempvar2 = NULL; + ast *result; + + if (!target || !operand) { + return NULL; + } + + /* we need to create two copies of target: one to read from and + one to write to. but we need to do this without duplicating + any side effects that may be contained in the tree. */ + + if (IS_AST_OP(target)) { + /* if this is a dereference, put the referenced item in the temporary */ + if (IS_DEREF_OP(target) || target->opval.op == PTR_OP) { + /* create a new temporary containing the item being dereferenced */ + if (hasSEFcalls(target->left)) + tempvar1 = replaceAstWithTemporary(&(target->left)); + } else if (target->opval.op == '[') { + /* Array access is similar, but we have to avoid side effects in + both values [WIML: Why not transform a[b] to *(a+b) in parser?] */ + if (hasSEFcalls(target->left)) + tempvar1 = replaceAstWithTemporary(&(target->left)); + if (hasSEFcalls(target->right)) + tempvar2 = replaceAstWithTemporary(&(target->right)); + } else if ((target->opval.op == INC_OP) || (target->opval.op == DEC_OP)) { + /* illegal pre/post-increment/decrement */ + werrorfl (target->filename, target->lineno, E_LVALUE_REQUIRED, "="); + } else { + /* we would have to handle '.', but it is not generated any more */ + wassertl(target->opval.op != '.', "obsolete opcode in tree"); + + /* no other kinds of ASTs are lvalues and can contain side effects */ + } + } + + readval = target; + writeval = copyAst(target); + + result = newNode('=', writeval, newNode(op, readval, operand)); + if (tempvar2) + result = newNode(',', tempvar2, result); + if (tempvar1) + result = newNode(',', tempvar1, result); + + return result; + +} + +/*-----------------------------------------------------------------*/ +/* hasSEFcalls - returns TRUE if tree has a function call, */ +/* inc/decrement, or other side effect */ +/*-----------------------------------------------------------------*/ +bool +hasSEFcalls (ast * tree) +{ + if (!tree) + return FALSE; + + if (tree->type == EX_OP && + (tree->opval.op == CALL || + tree->opval.op == PCALL || + tree->opval.op == '=' || + tree->opval.op == INC_OP || + tree->opval.op == DEC_OP)) + return TRUE; + + return (hasSEFcalls (tree->left) | + hasSEFcalls (tree->right)); +} + +/*-----------------------------------------------------------------*/ +/* isAstEqual - compares two asts & returns 1 if they are equal */ +/*-----------------------------------------------------------------*/ +static int +isAstEqual (ast * t1, ast * t2) +{ + if (!t1 && !t2) + return 1; + + if (!t1 || !t2) + return 0; + + /* match type */ + if (t1->type != t2->type) + return 0; + + switch (t1->type) + { + case EX_OP: + if (t1->opval.op != t2->opval.op) + return 0; + return (isAstEqual (t1->left, t2->left) && + isAstEqual (t1->right, t2->right)); + break; + + case EX_VALUE: + if (t1->opval.val->sym) + { + if (!t2->opval.val->sym) + return 0; + else + return isSymbolEqual (t1->opval.val->sym, + t2->opval.val->sym); + } + else + { + if (t2->opval.val->sym) + return 0; + else + return (floatFromVal (t1->opval.val) == + floatFromVal (t2->opval.val)); + } + break; + + /* only compare these two types */ + default: + return 0; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* resolveSymbols - resolve symbols from the symbol table */ +/*-----------------------------------------------------------------*/ +ast * +resolveSymbols (ast * tree) +{ + /* walk the entire tree and check for values */ + /* with symbols if we find one then replace */ + /* symbol with that from the symbol table */ + + if (tree == NULL) + return tree; + +#if 0 + /* print the line */ + /* if not block & function */ + if (tree->type == EX_OP && + (tree->opval.op != FUNCTION && + tree->opval.op != BLOCK && + tree->opval.op != NULLOP)) + { + filename = tree->filename; + lineno = tree->lineno; + } +#endif + + /* make sure we resolve the true & false labels for ifx */ + if (tree->type == EX_OP && tree->opval.op == IFX) + { + symbol *csym; + + if (tree->trueLabel) + { + if ((csym = findSym (LabelTab, tree->trueLabel, + tree->trueLabel->name))) + tree->trueLabel = csym; + else + werrorfl (tree->filename, tree->lineno, E_LABEL_UNDEF, + tree->trueLabel->name); + } + + if (tree->falseLabel) + { + if ((csym = findSym (LabelTab, + tree->falseLabel, + tree->falseLabel->name))) + tree->falseLabel = csym; + else + werrorfl (tree->filename, tree->lineno, E_LABEL_UNDEF, + tree->falseLabel->name); + } + } + + /* if this is a label resolve it from the labelTab */ + if (IS_AST_VALUE (tree) && + tree->opval.val->sym && + tree->opval.val->sym->islbl) + { + symbol *csym = findSym (LabelTab, tree->opval.val->sym, + tree->opval.val->sym->name); + + if (!csym) + werrorfl (tree->filename, tree->lineno, E_LABEL_UNDEF, + tree->opval.val->sym->name); + else + tree->opval.val->sym = csym; + + goto resolveChildren; + } + + /* do only for leafs */ + if (IS_AST_VALUE (tree) && + tree->opval.val->sym && + !tree->opval.val->sym->implicit) + { + symbol *csym = findSymWithLevel (SymbolTab, tree->opval.val->sym); + + /* if found in the symbol table & they are not the same */ + if (csym && tree->opval.val->sym != csym) + { + tree->opval.val->sym = csym; + tree->opval.val->type = csym->type; + tree->opval.val->etype = csym->etype; + } + + /* if not found in the symbol table */ + /* mark it as undefined & assume it */ + /* is an integer in data space */ + if (!csym && !tree->opval.val->sym->implicit) + { + /* if this is a function name then */ + /* mark it as returning an int */ + if (tree->funcName) + { + tree->opval.val->sym->type = newLink (DECLARATOR); + DCL_TYPE (tree->opval.val->sym->type) = FUNCTION; + tree->opval.val->sym->type->next = + tree->opval.val->sym->etype = newIntLink (); + tree->opval.val->etype = tree->opval.val->etype; + tree->opval.val->type = tree->opval.val->sym->type; + werrorfl (tree->filename, tree->lineno, W_IMPLICIT_FUNC, + tree->opval.val->sym->name); + //tree->opval.val->sym->undefined = 1; + allocVariables (tree->opval.val->sym); + } + else + { + tree->opval.val->sym->undefined = 1; + tree->opval.val->type = + tree->opval.val->etype = newIntLink (); + tree->opval.val->sym->type = + tree->opval.val->sym->etype = newIntLink (); + } + } + } + +resolveChildren: + resolveSymbols (tree->left); + resolveSymbols (tree->right); + + return tree; +} + +/*------------------------------------------------------------------------*/ +/* setAstFileLine - walks a ast tree & sets the file name and line number */ +/*------------------------------------------------------------------------*/ +int setAstFileLine (ast * tree, char *filename, int lineno) +{ + if (!tree) + return 0; + + tree->filename = filename; + tree->lineno = lineno; + setAstFileLine (tree->left, filename, lineno); + setAstFileLine (tree->right, filename, lineno); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* funcOfType :- function of type with name */ +/*-----------------------------------------------------------------*/ +symbol * +funcOfType (char *name, sym_link * type, sym_link * argType, + int nArgs, int rent) +{ + symbol *sym; + /* create the symbol */ + sym = newSymbol (name, 0); + + /* setup return value */ + sym->type = newLink (DECLARATOR); + DCL_TYPE (sym->type) = FUNCTION; + sym->type->next = copyLinkChain (type); + sym->etype = getSpec (sym->type); + FUNC_ISREENT(sym->type) = rent ? 1 : 0; + + /* if arguments required */ + if (nArgs) + { + value *args; + args = FUNC_ARGS(sym->type) = newValue (); + + while (nArgs--) + { + args->type = copyLinkChain (argType); + args->etype = getSpec (args->type); + SPEC_EXTR(args->etype)=1; + if (!nArgs) + break; + args = args->next = newValue (); + } + } + + /* save it */ + addSymChain (&sym); + sym->cdef = 1; + allocVariables (sym); + return sym; + +} + +/*-----------------------------------------------------------------*/ +/* funcOfTypeVarg :- function of type with name and argtype */ +/*-----------------------------------------------------------------*/ +symbol * +funcOfTypeVarg (char *name, char * rtype, int nArgs , char **atypes) +{ + + symbol *sym; + int i ; + /* create the symbol */ + sym = newSymbol (name, 0); + + /* setup return value */ + sym->type = newLink (DECLARATOR); + DCL_TYPE (sym->type) = FUNCTION; + sym->type->next = typeFromStr(rtype); + sym->etype = getSpec (sym->type); + + /* if arguments required */ + if (nArgs) { + value *args; + args = FUNC_ARGS(sym->type) = newValue (); + + for ( i = 0 ; i < nArgs ; i++ ) { + args->type = typeFromStr(atypes[i]); + args->etype = getSpec (args->type); + SPEC_EXTR(args->etype)=1; + if ((i + 1) == nArgs) break; + args = args->next = newValue (); + } + } + + /* save it */ + addSymChain (&sym); + sym->cdef = 1; + allocVariables (sym); + return sym; + +} + +/*-----------------------------------------------------------------*/ +/* reverseParms - will reverse a parameter tree */ +/*-----------------------------------------------------------------*/ +static void +reverseParms (ast * ptree) +{ + ast *ttree; + if (!ptree) + return; + + /* top down if we find a nonParm tree then quit */ + if (ptree->type == EX_OP && ptree->opval.op == PARAM && !ptree->reversed) + { + /* The various functions expect the parameter tree to be right heavy. */ + /* Rotate the tree to be left heavy so that after reversal it is */ + /* right heavy again. */ + while ((ttree = ptree->right) && ttree->type == EX_OP && + ttree->opval.op == PARAM) + { + ptree->right = ttree->right; + ttree->right = ttree->left; + ttree->left = ptree->left; + ptree->left = ttree; + } + + /* Now reverse */ + ttree = ptree->left; + ptree->left = ptree->right; + ptree->right = ttree; + ptree->reversed = 1; + reverseParms (ptree->left); + reverseParms (ptree->right); + } + + return; +} + +/*-----------------------------------------------------------------*/ +/* processParms - makes sure the parameters are okay and do some */ +/* processing with them */ +/*-----------------------------------------------------------------*/ +static int +processParms (ast *func, + value *defParm, + ast **actParm, + int *parmNumber, /* unused, although updated */ + bool rightmost) +{ + RESULT_TYPE resultType; + sym_link *functype; + + /* if none of them exist */ + if (!defParm && !*actParm) + return 0; + + if (defParm) + { + if (getenv("DEBUG_SANITY")) + { + fprintf (stderr, "processParms: %s ", defParm->name); + } + /* make sure the type is complete and sane */ + checkTypeSanity(defParm->etype, defParm->name); + } + + if (IS_CODEPTR (func->ftype)) + functype = func->ftype->next; + else + functype = func->ftype; + + /* if the function is being called via a pointer & */ + /* it has not been defined reentrant then we cannot */ + /* have parameters */ + /* PIC16 port can... */ + if (!TARGET_IS_PIC16) + { + if (func->type != EX_VALUE && !IFFUNC_ISREENT (functype) && !options.stackAuto) + { + werror (E_NONRENT_ARGS); + fatalError++; + return 1; + } + } + + /* if defined parameters ended but actual parameters */ + /* exist and this is not defined as a variable arg */ + if (!defParm && *actParm && !IFFUNC_HASVARARGS(functype)) + { + werror (E_TOO_MANY_PARMS); + return 1; + } + + /* if defined parameters present but no actual parameters */ + if (defParm && !*actParm) + { + werror (E_TOO_FEW_PARMS); + return 1; + } + + /* if this is a PARAM node then match left & right */ + if ((*actParm)->type == EX_OP && (*actParm)->opval.op == PARAM) + { + (*actParm)->decorated = 1; + return (processParms (func, defParm, + &(*actParm)->left, parmNumber, FALSE) || + processParms (func, defParm ? defParm->next : NULL, + &(*actParm)->right, parmNumber, rightmost)); + } + else if (defParm) /* not vararg */ + { + /* If we have found a value node by following only right-hand links, + * then we know that there are no more values after us. + * + * Therefore, if there are more defined parameters, the caller didn't + * supply enough. + */ + if (rightmost && defParm->next) + { + werror (E_TOO_FEW_PARMS); + return 1; + } + } + + /* decorate parameter */ + resultType = defParm ? getResultTypeFromType (defParm->type) : + RESULT_TYPE_NONE; + *actParm = decorateType (*actParm, resultType); + + if (IS_VOID((*actParm)->ftype)) + { + werror (E_VOID_VALUE_USED); + return 1; + } + + /* If this is a varargs function... */ + if (!defParm && *actParm && IFFUNC_HASVARARGS(functype)) + { + ast *newType = NULL; + sym_link *ftype; + + /* don't perform integer promotion of explicitly typecasted variable arguments + * if sdcc extensions are enabled */ + if (options.std_sdcc && + (IS_CAST_OP (*actParm) || + (IS_AST_SYM_VALUE (*actParm) && AST_VALUES (*actParm, removedCast)) || + (IS_AST_LIT_VALUE (*actParm) && AST_VALUES (*actParm, literalFromCast)))) + { + /* Parameter was explicitly typecast; don't touch it. */ + return 0; + } + + ftype = (*actParm)->ftype; + + /* If it's a char, upcast to int. */ + if (IS_INTEGRAL (ftype) + && (getSize (ftype) < (unsigned) INTSIZE)) + { + newType = newAst_LINK(INTTYPE); + } + + if (IS_PTR(ftype) && !IS_GENPTR(ftype)) + { + newType = newAst_LINK (copyLinkChain(ftype)); + DCL_TYPE (newType->opval.lnk) = port->unqualified_pointer; + } + + if (IS_AGGREGATE (ftype)) + { + newType = newAst_LINK (copyLinkChain (ftype)); + DCL_TYPE (newType->opval.lnk) = port->unqualified_pointer; + } + + if (newType) + { + /* cast required; change this op to a cast. */ + (*actParm)->decorated = 0; + *actParm = newNode (CAST, newType, *actParm); + (*actParm)->filename = (*actParm)->right->filename; + (*actParm)->lineno = (*actParm)->right->lineno; + + decorateType (*actParm, RESULT_TYPE_NONE); + } + return 0; + } /* vararg */ + + /* if defined parameters ended but actual has not & */ + /* reentrant */ + if (!defParm && *actParm && + (options.stackAuto || IFFUNC_ISREENT (functype))) + return 0; + + resolveSymbols (*actParm); + + /* the parameter type must be at least castable */ + if (compareType (defParm->type, (*actParm)->ftype) == 0) + { + werror (E_INCOMPAT_TYPES); + printFromToType ((*actParm)->ftype, defParm->type); + return 1; + } + + /* if the parameter is castable then add the cast */ + if (compareType (defParm->type, (*actParm)->ftype) < 0) + { + ast *pTree; + + resultType = getResultTypeFromType (defParm->etype); + pTree = resolveSymbols (copyAst (*actParm)); + + /* now change the current one to a cast */ + (*actParm)->type = EX_OP; + (*actParm)->opval.op = CAST; + (*actParm)->left = newAst_LINK (defParm->type); + (*actParm)->right = pTree; + (*actParm)->decorated = 0; /* force typechecking */ + decorateType (*actParm, IS_GENPTR (defParm->type) ? RESULT_TYPE_GPTR : resultType); + } + + /* make a copy and change the regparm type to the defined parm */ + (*actParm)->etype = getSpec ((*actParm)->ftype = copyLinkChain ((*actParm)->ftype)); + SPEC_REGPARM ((*actParm)->etype) = SPEC_REGPARM (defParm->etype); + SPEC_ARGREG ((*actParm)->etype) = SPEC_ARGREG (defParm->etype); + + /* if the function is being called via a pointer & */ + /* this parameter is not passed in registers */ + /* then the function must be defined reentrant */ + if (IS_FUNCPTR (func->ftype) && !SPEC_REGPARM ((*actParm)->etype) && + !IFFUNC_ISREENT (functype) && !options.stackAuto) + { + werror (E_NONRENT_ARGS); + fatalError++; + return 1; + } + + (*parmNumber)++; + return 0; +} + +/*-----------------------------------------------------------------*/ +/* createIvalType - generates ival for basic types */ +/*-----------------------------------------------------------------*/ +static ast * +createIvalType (ast * sym, sym_link * type, initList * ilist) +{ + ast *iExpr; + + /* if initList is deep */ + if (ilist && ilist->type == INIT_DEEP) + ilist = ilist->init.deep; + + if (ilist) + iExpr = decorateType (resolveSymbols (list2expr (ilist)), RESULT_TYPE_NONE); + else + iExpr = newAst_VALUE (valueFromLit (0)); + return decorateType (newNode ('=', sym, iExpr), RESULT_TYPE_NONE); +} + +/*-----------------------------------------------------------------*/ +/* createIvalStruct - generates initial value for structures */ +/*-----------------------------------------------------------------*/ +static ast * +createIvalStruct (ast *sym, sym_link *type, initList *ilist, ast *rootValue) +{ + ast *rast = NULL; + ast *lAst; + symbol *sflds; + initList *iloop; + sym_link * etype = getSpec (type); + + if (ilist && ilist->type != INIT_DEEP) + { + werror (E_INIT_STRUCT, ""); + return NULL; + } + + iloop = ilist ? ilist->init.deep : NULL; + + for (sflds = SPEC_STRUCT (type)->fields; sflds; sflds = sflds->next) + { + /* if we have come to end */ + if (!iloop && (!AST_SYMBOL (rootValue)->islocal || SPEC_STAT (etype))) + break; + + if (!IS_BITFIELD (sflds->type) || !SPEC_BUNNAMED (sflds->etype)) + { + sflds->implicit = 1; + lAst = newNode (PTR_OP, newNode ('&', sym, NULL), newAst_VALUE (symbolVal (sflds))); + lAst = decorateType (resolveSymbols (lAst), RESULT_TYPE_NONE); + rast = decorateType (resolveSymbols (createIval (lAst, sflds->type, iloop, rast, rootValue)), RESULT_TYPE_NONE); + iloop = iloop ? iloop->next : NULL; + } + } + + if (iloop) + { + if (IS_AST_VALUE (sym)) + werrorfl (sym->opval.val->sym->fileDef, sym->opval.val->sym->lineDef, + W_EXCESS_INITIALIZERS, "struct", + sym->opval.val->sym->name); + else + werrorfl (sym->filename, sym->lineno, E_INIT_COUNT); + } + + return rast; +} + +/*-----------------------------------------------------------------*/ +/* createIvalArray - generates code for array initialization */ +/*-----------------------------------------------------------------*/ +static ast * +createIvalArray (ast * sym, sym_link * type, initList * ilist, ast *rootValue) +{ + ast *rast = NULL; + initList *iloop; + int lcnt = 0, size = 0; + literalList *literalL; + sym_link * etype = getSpec (type); + + /* take care of the special case */ + /* array of characters can be init */ + /* by a string */ + if (IS_CHAR (type->next)) + if ((rast = createIvalCharPtr (sym, + type, + decorateType (resolveSymbols (list2expr (ilist)), RESULT_TYPE_NONE), + rootValue))) + + return decorateType (resolveSymbols (rast), RESULT_TYPE_NONE); + + /* not the special case */ + if (ilist && ilist->type != INIT_DEEP) + { + werror (E_INIT_STRUCT, ""); + return NULL; + } + + iloop = ilist ? ilist->init.deep : NULL; + lcnt = DCL_ELEM (type); + + if (!iloop && + (!lcnt || !DCL_ELEM (type) || !AST_SYMBOL (rootValue)->islocal || SPEC_STAT (etype))) + { + return NULL; + } + + if (port->arrayInitializerSuppported && convertIListToConstList(ilist, &literalL, lcnt)) + { + ast *aSym; + + aSym = decorateType (resolveSymbols(sym), RESULT_TYPE_NONE); + + rast = newNode(ARRAYINIT, aSym, NULL); + rast->values.constlist = literalL; + + // Make sure size is set to length of initializer list. + while (iloop) + { + size++; + iloop = iloop->next; + } + + if (lcnt && size > lcnt) + { + // Array size was specified, and we have more initializers than needed. + werrorfl (sym->opval.val->sym->fileDef, sym->opval.val->sym->lineDef, + W_EXCESS_INITIALIZERS, "array", sym->opval.val->sym->name); + } + } + else + { + for (;;) + { + ast *aSym; + + if (!iloop && + (!lcnt || !DCL_ELEM (type) || !AST_SYMBOL (rootValue)->islocal || SPEC_STAT (etype))) + { + break; + } + + aSym = newNode ('[', sym, newAst_VALUE (valueFromLit ((float) (size++)))); + aSym = decorateType (resolveSymbols (aSym), RESULT_TYPE_NONE); + rast = createIval (aSym, type->next, iloop, rast, rootValue); + lcnt--; + iloop = (iloop ? iloop->next : NULL); + + /* no of elements given and we */ + /* have generated for all of them */ + if (!lcnt && iloop) + { + // is this a better way? at least it won't crash + char *name = (IS_AST_SYM_VALUE(sym)) ? AST_SYMBOL(sym)->name : ""; + werrorfl (iloop->filename, iloop->lineno, W_EXCESS_INITIALIZERS, "array", name); + + break; + } + } + } + + /* if we have not been given a size */ + if (!DCL_ELEM (type)) + { + /* check, if it's a flexible array */ + if (IS_STRUCT (AST_VALUE (rootValue)->type)) + AST_SYMBOL(rootValue)->flexArrayLength = size * getSize (type->next); + else + DCL_ELEM (type) = size; + } + + return decorateType (resolveSymbols (rast), RESULT_TYPE_NONE); +} + + +/*-----------------------------------------------------------------*/ +/* createIvalCharPtr - generates initial values for char pointers */ +/*-----------------------------------------------------------------*/ +static ast * +createIvalCharPtr (ast * sym, sym_link * type, ast * iexpr, ast *rootVal) +{ + ast *rast = NULL; + unsigned size = 0; + + /* if this is a pointer & right is a literal array then */ + /* just assignment will do */ + if (IS_PTR (type) && ((IS_LITERAL (iexpr->etype) || + SPEC_SCLS (iexpr->etype) == S_CODE) + && IS_ARRAY (iexpr->ftype))) + return newNode ('=', sym, iexpr); + + /* left side is an array so we have to assign each element */ + if (!iexpr) + { + /* for each character generate an assignment */ + /* to the array element */ + unsigned int i = 0; + unsigned int symsize = getSize (type); + + if (!AST_SYMBOL (rootVal)->islocal || SPEC_STAT (getSpec (type))) + return NULL; + + for (i = 0; i < symsize; ++i) + { + rast = newNode (NULLOP, + rast, + newNode ('=', + newNode ('[', sym, + newAst_VALUE (valueFromLit ((float) i))), + newAst_VALUE (valueFromLit (0)))); + } + + return decorateType (resolveSymbols (rast), RESULT_TYPE_NONE); + } + + if ((IS_LITERAL (iexpr->etype) || + SPEC_SCLS (iexpr->etype) == S_CODE) + && IS_ARRAY (iexpr->ftype)) + { + /* for each character generate an assignment */ + /* to the array element */ + char *s = SPEC_CVAL (iexpr->etype).v_char; + unsigned int i = 0; + unsigned int symsize = getSize (type); + + size = getSize (iexpr->ftype); + if (symsize && size > symsize) + { + if (size > symsize) + { + char *name = (IS_AST_SYM_VALUE(sym)) ? AST_SYMBOL(sym)->name : ""; + + werrorfl (iexpr->filename, iexpr->lineno, W_EXCESS_INITIALIZERS, + "string", name); + } + size = symsize; + } + + for (i = 0; i < size; i++) + { + rast = newNode (NULLOP, + rast, + newNode ('=', + newNode ('[', sym, + newAst_VALUE (valueFromLit ((float) i))), + newAst_VALUE (valueFromLit (*s++)))); + } + + // now WE don't need iexpr's symbol anymore + freeStringSymbol(AST_SYMBOL(iexpr)); + + /* if we have not been given a size */ + if (!DCL_ELEM (type)) + { + /* check, if it's a flexible array */ + if (IS_STRUCT (AST_VALUE (rootVal)->type)) + AST_SYMBOL(rootVal)->flexArrayLength = size * getSize (type->next); + else + DCL_ELEM (type) = size; + } + + return decorateType (resolveSymbols (rast), RESULT_TYPE_NONE); + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* createIvalPtr - generates initial value for pointers */ +/*-----------------------------------------------------------------*/ +static ast * +createIvalPtr (ast * sym, sym_link * type, initList * ilist, ast *rootVal) +{ + ast *rast; + ast *iexpr; + + /* if deep then */ + if (ilist && ilist->type == INIT_DEEP) + ilist = ilist->init.deep; + + iexpr = decorateType (resolveSymbols (list2expr (ilist)), RESULT_TYPE_NONE); + + /* if character pointer */ + if (IS_CHAR (type->next)) + if ((rast = createIvalCharPtr (sym, type, iexpr, rootVal))) + return rast; + + return newNode ('=', sym, iexpr); +} + +/*-----------------------------------------------------------------*/ +/* createIval - generates code for initial value */ +/*-----------------------------------------------------------------*/ +static ast * +createIval (ast * sym, sym_link * type, initList * ilist, ast * wid, ast *rootValue) +{ + ast *rast = NULL; + + if (!ilist && (!AST_SYMBOL (rootValue)->islocal || SPEC_STAT (getSpec (type)))) + return NULL; + + /* if structure then */ + if (IS_STRUCT (type)) + rast = createIvalStruct (sym, type, ilist, rootValue); + else + /* if this is a pointer */ + if (IS_PTR (type)) + rast = createIvalPtr (sym, type, ilist, rootValue); + else + /* if this is an array */ + if (IS_ARRAY (type)) + rast = createIvalArray (sym, type, ilist, rootValue); + else + /* if type is SPECIFIER */ + if (IS_SPEC (type)) + rast = createIvalType (sym, type, ilist); + + if (wid) + return decorateType (resolveSymbols (newNode (NULLOP, wid, rast)), RESULT_TYPE_NONE); + else + return decorateType (resolveSymbols (rast), RESULT_TYPE_NONE); +} + +/*-----------------------------------------------------------------*/ +/* initAggregates - initialises aggregate variables with initv */ +/*-----------------------------------------------------------------*/ +ast * initAggregates (symbol * sym, initList * ival, ast * wid) +{ + ast *newAst = newAst_VALUE (symbolVal (sym)); + return createIval (newAst, sym->type, ival, wid, newAst); +} + +/*-----------------------------------------------------------------*/ +/* gatherAutoInit - creates assignment expressions for initial */ +/* values */ +/*-----------------------------------------------------------------*/ +static ast * +gatherAutoInit (symbol * autoChain) +{ + ast *init = NULL; + ast *work; + symbol *sym; + + inInitMode = 1; + for (sym = autoChain; sym; sym = sym->next) + { + /* resolve the symbols in the ival */ + if (sym->ival) + resolveIvalSym (sym->ival, sym->type); + +#if 1 + /* if we are PIC16 port, + * and this is a static, + * and have initial value, + * and not S_CODE, don't emit in gs segment, + * but allow glue.c:pic16emitRegularMap to put symbol + * in idata section */ + if(TARGET_IS_PIC16 && + IS_STATIC (sym->etype) && sym->ival + && SPEC_SCLS(sym->etype) != S_CODE) { + SPEC_SCLS (sym->etype) = S_DATA; + continue; + } +#endif + + /* if this is a static variable & has an */ + /* initial value the code needs to be lifted */ + /* here to the main portion since they can be */ + /* initialised only once at the start */ + if (IS_STATIC (sym->etype) && sym->ival && + SPEC_SCLS (sym->etype) != S_CODE) + { + symbol *newSym; + + /* insert the symbol into the symbol table */ + /* with level = 0 & name = rname */ + newSym = copySymbol (sym); + addSym (SymbolTab, newSym, newSym->rname, 0, 0, 1); + + /* now lift the code to main */ + if (IS_AGGREGATE (sym->type)) { + work = initAggregates (sym, sym->ival, NULL); + } else { + if (getNelements(sym->type, sym->ival)>1) { + werrorfl (sym->fileDef, sym->lineDef, + W_EXCESS_INITIALIZERS, "scalar", + sym->name); + } + work = newNode ('=', newAst_VALUE (symbolVal (newSym)), + list2expr (sym->ival)); + } + + setAstFileLine (work, sym->fileDef, sym->lineDef); + + sym->ival = NULL; + if (staticAutos) + staticAutos = newNode (NULLOP, staticAutos, work); + else + staticAutos = work; + + continue; + } + + /* if there is an initial value */ + if (sym->ival && SPEC_SCLS (sym->etype) != S_CODE) + { + initList *ilist = sym->ival; + + while (ilist->type == INIT_DEEP) + { + ilist = ilist->init.deep; + } + + /* update lineno for error msg */ + filename = sym->fileDef; + lineno = sym->lineDef; + setAstFileLine (ilist->init.node, sym->fileDef, sym->lineDef); + + if (IS_AGGREGATE (sym->type)) + { + work = initAggregates (sym, sym->ival, NULL); + } + else + { + if (getNelements(sym->type, sym->ival)>1) + { + werrorfl (sym->fileDef, sym->lineDef, + W_EXCESS_INITIALIZERS, "scalar", + sym->name); + } + work = newNode ('=', newAst_VALUE (symbolVal (sym)), + list2expr (sym->ival)); + } + + // just to be sure + setAstFileLine (work, sym->fileDef, sym->lineDef); + + sym->ival = NULL; + if (init) + init = newNode (NULLOP, init, work); + else + init = work; + } + } + inInitMode = 0; + return init; +} + +/*-----------------------------------------------------------------*/ +/* freeStringSymbol - delete a literal string if no more usage */ +/*-----------------------------------------------------------------*/ +void freeStringSymbol(symbol *sym) { + /* make sure this is a literal string */ + assert (sym->isstrlit); + if (--sym->isstrlit == 0) { // lower the usage count + memmap *segment=SPEC_OCLS(sym->etype); + if (segment) { + deleteSetItem(&segment->syms, sym); + } + } +} + +/*-----------------------------------------------------------------*/ +/* stringToSymbol - creates a symbol from a literal string */ +/*-----------------------------------------------------------------*/ +static value * +stringToSymbol (value * val) +{ + char name[SDCC_NAME_MAX + 1]; + static int charLbl = 0; + symbol *sym; + set *sp; + unsigned int size; + + // have we heard this before? + for (sp = statsg->syms; sp; sp = sp->next) + { + sym = sp->item; + size = getSize (sym->type); + if (sym->isstrlit && size == getSize (val->type) && + !memcmp (SPEC_CVAL (sym->etype).v_char, SPEC_CVAL (val->etype).v_char, size)) + { + // yes, this is old news. Don't publish it again. + sym->isstrlit++; // but raise the usage count + return symbolVal (sym); + } + } + + SNPRINTF (name, sizeof(name), "_str_%d", charLbl++); + sym = newSymbol (name, 0); /* make it @ level 0 */ + strncpyz (sym->rname, name, SDCC_NAME_MAX); + + /* copy the type from the value passed */ + sym->type = copyLinkChain (val->type); + sym->etype = getSpec (sym->type); + /* change to storage class & output class */ + SPEC_SCLS (sym->etype) = S_CODE; + SPEC_CVAL (sym->etype).v_char = SPEC_CVAL (val->etype).v_char; + SPEC_STAT (sym->etype) = 1; + /* make the level & block = 0 */ + sym->block = sym->level = 0; + sym->isstrlit = 1; + /* create an ival */ + sym->ival = newiList (INIT_NODE, newAst_VALUE (val)); + if (noAlloc == 0) + { + /* allocate it */ + addSymChain (&sym); + allocVariables (sym); + } + sym->ival = NULL; + return symbolVal (sym); + +} + +/*-----------------------------------------------------------------*/ +/* processBlockVars - will go thru the ast looking for block if */ +/* a block is found then will allocate the syms */ +/* will also gather the auto inits present */ +/*-----------------------------------------------------------------*/ +ast * +processBlockVars (ast * tree, int *stack, int action) +{ + if (!tree) + return NULL; + + /* if this is a block */ + if (tree->type == EX_OP && tree->opval.op == BLOCK) + { + ast *autoInit; + + if (action == ALLOCATE) + { + *stack += allocVariables (tree->values.sym); + autoInit = gatherAutoInit (tree->values.sym); + + /* if there are auto inits then do them */ + if (autoInit) + tree->left = newNode (NULLOP, autoInit, tree->left); + } + else /* action is deallocate */ + deallocLocal (tree->values.sym); + } + + processBlockVars (tree->left, stack, action); + processBlockVars (tree->right, stack, action); + return tree; +} + +/*-------------------------------------------------------------*/ +/* constExprTree - returns TRUE if this tree is a constant */ +/* expression */ +/*-------------------------------------------------------------*/ +bool constExprTree (ast *cexpr) { + + if (!cexpr) { + return TRUE; + } + + cexpr = decorateType (resolveSymbols (cexpr), RESULT_TYPE_NONE); + + switch (cexpr->type) + { + case EX_VALUE: + if (IS_AST_LIT_VALUE(cexpr)) { + // this is a literal + return TRUE; + } + if (IS_AST_SYM_VALUE(cexpr) && IS_FUNC(AST_SYMBOL(cexpr)->type)) { + // a function's address will never change + return TRUE; + } + if (IS_AST_SYM_VALUE(cexpr) && IS_ARRAY(AST_SYMBOL(cexpr)->type)) { + // an array's address will never change + return TRUE; + } + if (IS_AST_SYM_VALUE(cexpr) && + IN_CODESPACE(SPEC_OCLS(AST_SYMBOL(cexpr)->etype))) { + // a symbol in code space will never change + // This is only for the 'char *s="hallo"' case and will have to leave + //printf(" code space symbol"); + return TRUE; + } + return FALSE; + case EX_LINK: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "unexpected link in expression tree\n"); + return FALSE; + case EX_OP: + if (cexpr->opval.op==ARRAYINIT) { + // this is a list of literals + return TRUE; + } + if (cexpr->opval.op=='=') { + return constExprTree(cexpr->right); + } + if (cexpr->opval.op==CAST) { + // cast ignored, maybe we should throw a warning here? + return constExprTree(cexpr->right); + } + if (cexpr->opval.op=='&') { + return TRUE; + } + if (cexpr->opval.op==CALL || cexpr->opval.op==PCALL) { + return FALSE; + } + if (constExprTree(cexpr->left) && constExprTree(cexpr->right)) { + return TRUE; + } + return FALSE; + case EX_OPERAND: + return IS_CONSTANT(operandType(cexpr->opval.oprnd)); + } + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* constExprValue - returns the value of a constant expression */ +/* or NULL if it is not a constant expression */ +/*-----------------------------------------------------------------*/ +value * +constExprValue (ast * cexpr, int check) +{ + cexpr = decorateType (resolveSymbols (cexpr), RESULT_TYPE_NONE); + + /* if this is not a constant then */ + if (!IS_LITERAL (cexpr->ftype)) + { + /* then check if this is a literal array + in code segment */ + if (SPEC_SCLS (cexpr->etype) == S_CODE && + SPEC_CVAL (cexpr->etype).v_char && + IS_ARRAY (cexpr->ftype)) + { + value *val = valFromType (cexpr->ftype); + SPEC_SCLS (val->etype) = S_LITERAL; + val->sym = cexpr->opval.val->sym; + val->sym->type = copyLinkChain (cexpr->ftype); + val->sym->etype = getSpec (val->sym->type); + strncpyz (val->name, cexpr->opval.val->sym->rname, SDCC_NAME_MAX); + return val; + } + + /* if we are casting a literal value then */ + if (IS_AST_OP (cexpr) && + cexpr->opval.op == CAST && + IS_LITERAL (cexpr->right->ftype)) + { + return valCastLiteral (cexpr->ftype, + floatFromVal (cexpr->right->opval.val)); + } + + if (IS_AST_VALUE (cexpr)) + { + return cexpr->opval.val; + } + + if (check) + werror (E_CONST_EXPECTED, "found expression"); + + return NULL; + } + + /* return the value */ + if (IS_AST_VALUE (cexpr)) + { + return cexpr->opval.val; + } + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* isLabelInAst - will return true if a given label is found */ +/*-----------------------------------------------------------------*/ +bool +isLabelInAst (symbol * label, ast * tree) +{ + if (!tree || IS_AST_VALUE (tree) || IS_AST_LINK (tree)) + return FALSE; + + if (IS_AST_OP (tree) && + tree->opval.op == LABEL && + isSymbolEqual (AST_SYMBOL (tree->left), label)) + return TRUE; + + return isLabelInAst (label, tree->right) && + isLabelInAst (label, tree->left); +} + +/*-----------------------------------------------------------------*/ +/* isLoopCountable - return true if the loop count can be determi- */ +/* -ned at compile time . */ +/*-----------------------------------------------------------------*/ +static bool +isLoopCountable (ast * initExpr, ast * condExpr, ast * loopExpr, + symbol ** sym, ast ** init, ast ** end) +{ + + /* the loop is considered countable if the following + conditions are true :- + + a) initExpr :- = + b) condExpr :- < + c) loopExpr :- ++ + */ + + /* first check the initExpr */ + if (IS_AST_OP (initExpr) && + initExpr->opval.op == '=' && /* is assignment */ + IS_AST_SYM_VALUE (initExpr->left)) + { /* left is a symbol */ + + *sym = AST_SYMBOL (initExpr->left); + *init = initExpr->right; + } + else + return FALSE; + + /* don't reverse loop with volatile counter */ + if (IS_VOLATILE ((*sym)->type)) + return FALSE; + + /* for now the symbol has to be of + integral type */ + if (!IS_INTEGRAL ((*sym)->type)) + return FALSE; + + /* now check condExpr */ + if (IS_AST_OP (condExpr)) + { + + switch (condExpr->opval.op) + { + case '<': + if (IS_AST_SYM_VALUE (condExpr->left) && + isSymbolEqual (*sym, AST_SYMBOL (condExpr->left)) && + IS_AST_LIT_VALUE (condExpr->right)) + { + *end = condExpr->right; + break; + } + return FALSE; + + case '!': + if (IS_AST_OP (condExpr->left) && + condExpr->left->opval.op == '>' && + IS_AST_LIT_VALUE (condExpr->left->right) && + IS_AST_SYM_VALUE (condExpr->left->left) && + isSymbolEqual (*sym, AST_SYMBOL (condExpr->left->left))) + { + + *end = newNode ('+', condExpr->left->right, + newAst_VALUE (constCharVal (1))); + break; + } + return FALSE; + + default: + return FALSE; + } + + } + else + return FALSE; + + /* check loop expression is of the form ++ */ + if (!IS_AST_OP (loopExpr)) + return FALSE; + + /* check if ++ */ + if (loopExpr->opval.op == INC_OP) + { + + if (loopExpr->left) + { + /* pre */ + if (IS_AST_SYM_VALUE (loopExpr->left) && + isSymbolEqual (*sym, AST_SYMBOL (loopExpr->left))) + return TRUE; + + } + else + { + /* post */ + if (IS_AST_SYM_VALUE (loopExpr->right) && + isSymbolEqual (*sym, AST_SYMBOL (loopExpr->right))) + return TRUE; + } + + } + else + { + /* check for += */ + if (loopExpr->opval.op == ADD_ASSIGN) + { + + if (IS_AST_SYM_VALUE (loopExpr->left) && + isSymbolEqual (*sym, AST_SYMBOL (loopExpr->left)) && + IS_AST_LIT_VALUE (loopExpr->right) && + AST_ULONG_VALUE (loopExpr->right) != 1) + return TRUE; + } + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* astHasVolatile - returns true if ast contains any volatile */ +/*-----------------------------------------------------------------*/ +bool +astHasVolatile (ast * tree) +{ + if (!tree) + return FALSE; + + if (TETYPE (tree) && IS_VOLATILE (TETYPE (tree))) + return TRUE; + + if (IS_AST_OP (tree)) + return astHasVolatile (tree->left) || + astHasVolatile (tree->right); + else + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* astHasPointer - return true if the ast contains any ptr variable */ +/*-----------------------------------------------------------------*/ +bool +astHasPointer (ast * tree) +{ + if (!tree) + return FALSE; + + if (IS_AST_LINK (tree)) + return TRUE; + + /* if we hit an array expression then check + only the left side */ + if (IS_AST_OP (tree) && tree->opval.op == '[') + return astHasPointer (tree->left); + + if (IS_AST_VALUE (tree)) + return IS_PTR (tree->ftype) || IS_ARRAY (tree->ftype); + + return astHasPointer (tree->left) || + astHasPointer (tree->right); + +} + +/*-----------------------------------------------------------------*/ +/* astHasSymbol - return true if the ast has the given symbol */ +/*-----------------------------------------------------------------*/ +bool +astHasSymbol (ast * tree, symbol * sym) +{ + if (!tree || IS_AST_LINK (tree)) + return FALSE; + + if (IS_AST_VALUE (tree)) + { + if (IS_AST_SYM_VALUE (tree)) + return isSymbolEqual (AST_SYMBOL (tree), sym); + else + return FALSE; + } + + return astHasSymbol (tree->left, sym) || + astHasSymbol (tree->right, sym); +} + +/*-----------------------------------------------------------------*/ +/* astHasDeref - return true if the ast has an indirect access */ +/*-----------------------------------------------------------------*/ +static bool +astHasDeref (ast * tree) +{ + if (!tree || IS_AST_LINK (tree) || IS_AST_VALUE(tree)) + return FALSE; + + if (tree->opval.op == '*' && tree->right == NULL) return TRUE; + + return astHasDeref (tree->left) || astHasDeref (tree->right); +} + +/*-----------------------------------------------------------------*/ +/* isConformingBody - the loop body has to conform to a set of */ +/* rules for the loop to be considered reversible read on for rules*/ +/*-----------------------------------------------------------------*/ +bool +isConformingBody (ast * pbody, symbol * sym, ast * body) +{ + + /* we are going to do a pre-order traversal of the + tree && check for the following conditions. (essentially + a set of very shallow tests ) + a) the sym passed does not participate in any arithmetic operation + b) There are no function calls + c) all jumps are within the body + d) address of loop control variable not taken + e) if an assignment has a pointer on the left hand side make sure + right does not have loop control variable + */ + + /* if we reach the end or a leaf then true */ + if (!pbody || IS_AST_LINK (pbody) || IS_AST_VALUE (pbody)) + return TRUE; + + /* if anything else is "volatile" */ + if (IS_VOLATILE (TETYPE (pbody))) + return FALSE; + + /* we will walk the body in a pre-order traversal for + efficiency sake */ + switch (pbody->opval.op) + { +/*------------------------------------------------------------------*/ + case '[': + // if the loopvar is used as an index + /* array op is commutative -- must check both left & right */ + if (astHasSymbol(pbody->right, sym) || astHasSymbol(pbody->left, sym)) { + return FALSE; + } + return isConformingBody (pbody->right, sym, body) + && isConformingBody (pbody->left, sym, body); + +/*------------------------------------------------------------------*/ + case PTR_OP: + case '.': + return TRUE; + +/*------------------------------------------------------------------*/ + case INC_OP: + case DEC_OP: + + /* sure we are not sym is not modified */ + if (pbody->left && + IS_AST_SYM_VALUE (pbody->left) && + isSymbolEqual (AST_SYMBOL (pbody->left), sym)) + return FALSE; + + if (pbody->right && + IS_AST_SYM_VALUE (pbody->right) && + isSymbolEqual (AST_SYMBOL (pbody->right), sym)) + return FALSE; + + return TRUE; + +/*------------------------------------------------------------------*/ + + case '*': /* can be unary : if right is null then unary operation */ + case '+': + case '-': + case '&': + + /* if right is NULL then unary operation */ +/*------------------------------------------------------------------*/ + /*----------------------------*/ + /* address of */ + /*----------------------------*/ + if (!pbody->right) + { + if (IS_AST_SYM_VALUE (pbody->left) && + isSymbolEqual (AST_SYMBOL (pbody->left), sym)) + return FALSE; + else + return isConformingBody (pbody->left, sym, body); + } + else + { + if (astHasSymbol (pbody->left, sym) || + astHasSymbol (pbody->right, sym)) + return FALSE; + } + + +/*------------------------------------------------------------------*/ + case '|': + case '^': + case '/': + case '%': + case LEFT_OP: + case RIGHT_OP: + case GETABIT: + case GETBYTE: + case GETWORD: + + if (IS_AST_SYM_VALUE (pbody->left) && + isSymbolEqual (AST_SYMBOL (pbody->left), sym)) + return FALSE; + + if (IS_AST_SYM_VALUE (pbody->right) && + isSymbolEqual (AST_SYMBOL (pbody->right), sym)) + return FALSE; + + return isConformingBody (pbody->left, sym, body) && + isConformingBody (pbody->right, sym, body); + + case '~': + case '!': + case RRC: + case RLC: + case GETHBIT: + case SWAP: + if (IS_AST_SYM_VALUE (pbody->left) && + isSymbolEqual (AST_SYMBOL (pbody->left), sym)) + return FALSE; + return isConformingBody (pbody->left, sym, body); + +/*------------------------------------------------------------------*/ + + case AND_OP: + case OR_OP: + case '>': + case '<': + case LE_OP: + case GE_OP: + case EQ_OP: + case NE_OP: + case '?': + case ':': + case SIZEOF: /* evaluate wihout code generation */ + + if (IS_AST_SYM_VALUE (pbody->left) && + isSymbolEqual (AST_SYMBOL (pbody->left), sym)) + return FALSE; + + if (IS_AST_SYM_VALUE (pbody->right) && + isSymbolEqual (AST_SYMBOL (pbody->right), sym)) + return FALSE; + + return isConformingBody (pbody->left, sym, body) && + isConformingBody (pbody->right, sym, body); + +/*------------------------------------------------------------------*/ + case '=': + + /* if left has a pointer & right has loop + control variable then we cannot */ + if (astHasPointer (pbody->left) && + astHasSymbol (pbody->right, sym)) + return FALSE; + if (astHasVolatile (pbody->left)) + return FALSE; + + if (IS_AST_SYM_VALUE (pbody->left)) { + // if the loopvar has an assignment + if (isSymbolEqual (AST_SYMBOL (pbody->left), sym)) + return FALSE; + // if the loopvar is used in another (maybe conditional) block + if (astHasSymbol (pbody->right, sym) && + (pbody->level >= body->level)) { + return FALSE; + } + } + + if (astHasVolatile (pbody->left)) + return FALSE; + + if (astHasDeref(pbody->right)) + return FALSE; + + return isConformingBody (pbody->left, sym, body) && + isConformingBody (pbody->right, sym, body); + + case MUL_ASSIGN: + case DIV_ASSIGN: + case AND_ASSIGN: + case OR_ASSIGN: + case XOR_ASSIGN: + case RIGHT_ASSIGN: + case LEFT_ASSIGN: + case SUB_ASSIGN: + case ADD_ASSIGN: + assert ("Parser should not have generated this\n"); + +/*------------------------------------------------------------------*/ + /*----------------------------*/ + /* comma operator */ + /*----------------------------*/ + case ',': + return isConformingBody (pbody->left, sym, body) && + isConformingBody (pbody->right, sym, body); + +/*------------------------------------------------------------------*/ + /*----------------------------*/ + /* function call */ + /*----------------------------*/ + case CALL: + /* if local & not passed as parameter & + not used to find the function then ok */ + if (sym->level && !astHasSymbol (pbody->right, sym) && + !astHasSymbol (pbody->left, sym)) + { + return TRUE; + } + return FALSE; + +/*------------------------------------------------------------------*/ + /*----------------------------*/ + /* return statement */ + /*----------------------------*/ + case RETURN: + return FALSE; + + case GOTO: + if (isLabelInAst (AST_SYMBOL (pbody->left), body)) + return TRUE; + else + return FALSE; + case SWITCH: + if (astHasSymbol (pbody->left, sym)) + return FALSE; + + default: + break; + } + + return isConformingBody (pbody->left, sym, body) && + isConformingBody (pbody->right, sym, body); +} + +/*-----------------------------------------------------------------*/ +/* isLoopReversible - takes a for loop as input && returns true */ +/* if the for loop is reversible. If yes will set the value of */ +/* the loop control var & init value & termination value */ +/*-----------------------------------------------------------------*/ +static bool +isLoopReversible (ast * loop, symbol ** loopCntrl, + ast ** init, ast ** end) +{ + /* if option says don't do it then don't */ + if (optimize.noLoopReverse) + return 0; + /* there are several tests to determine this */ + + /* for loop has to be of the form + for ( = ; + [ < ] ; + [++] | [ += 1] | [ = + 1] ) + forBody */ + if (!isLoopCountable (AST_FOR (loop, initExpr), + AST_FOR (loop, condExpr), + AST_FOR (loop, loopExpr), + loopCntrl, init, end)) + return 0; + + /* now do some serious checking on the body of the loop + */ + + return isConformingBody (loop->left, *loopCntrl, loop->left); + +} + +/*-----------------------------------------------------------------*/ +/* replLoopSym - replace the loop sym by loop sym -1 */ +/*-----------------------------------------------------------------*/ +static void +replLoopSym (ast * body, symbol * sym) +{ + /* reached end */ + if (!body || IS_AST_LINK (body)) + return; + + if (IS_AST_SYM_VALUE (body)) + { + + if (isSymbolEqual (AST_SYMBOL (body), sym)) + { + + body->type = EX_OP; + body->opval.op = '-'; + body->left = newAst_VALUE (symbolVal (sym)); + body->right = newAst_VALUE (constCharVal (1)); + + } + + return; + + } + + replLoopSym (body->left, sym); + replLoopSym (body->right, sym); + +} + +/*-----------------------------------------------------------------*/ +/* reverseLoop - do the actual loop reversal */ +/*-----------------------------------------------------------------*/ +ast * +reverseLoop (ast * loop, symbol * sym, ast * init, ast * end) +{ + ast *rloop; + + /* create the following tree + = loopCount ; + for_continue: + forbody + -= 1; + if (sym) goto for_continue ; + = end */ + + /* put it together piece by piece */ + rloop = newNode (NULLOP, + createIf (newAst_VALUE (symbolVal (sym)), + newNode (GOTO, + newAst_VALUE (symbolVal (AST_FOR (loop, continueLabel))), + NULL), NULL), + newNode ('=', + newAst_VALUE (symbolVal (sym)), + end)); + + replLoopSym (loop->left, sym); + setAstFileLine (rloop, init->filename, init->lineno); + + rloop = newNode (NULLOP, + newNode ('=', + newAst_VALUE (symbolVal (sym)), + newNode ('-', end, init)), + createLabel (AST_FOR (loop, continueLabel), + newNode (NULLOP, + loop->left, + newNode (NULLOP, + newNode (SUB_ASSIGN, + newAst_VALUE (symbolVal (sym)), + newAst_VALUE (constCharVal (1))), + rloop)))); + + rloop->lineno=init->lineno; + return decorateType (rloop, RESULT_TYPE_NONE); + +} + +/*-----------------------------------------------------------------*/ +/* searchLitOp - search tree (*ops only) for an ast with literal */ +/*-----------------------------------------------------------------*/ +static ast * +searchLitOp (ast *tree, ast **parent, const char *ops) +{ + ast *ret; + + if (tree && optimize.global_cse) + { + /* is there a literal operand? */ + if (tree->right && + IS_AST_OP(tree->right) && + tree->right->right && + (tree->right->opval.op == (unsigned)ops[0] || tree->right->opval.op == (unsigned)ops[1])) + { + if (IS_LITERAL (RTYPE (tree->right)) != + IS_LITERAL (LTYPE (tree->right))) + { + tree->right->decorated = 0; + tree->decorated = 0; + *parent = tree; + return tree->right; + } + ret = searchLitOp (tree->right, parent, ops); + if (ret) + return ret; + } + if (tree->left && + IS_AST_OP(tree->left) && + tree->left->right && + (tree->left->opval.op == (unsigned)ops[0] || tree->left->opval.op == (unsigned)ops[1])) + { + if (IS_LITERAL (RTYPE (tree->left)) != + IS_LITERAL (LTYPE (tree->left))) + { + tree->left->decorated = 0; + tree->decorated = 0; + *parent = tree; + return tree->left; + } + ret = searchLitOp (tree->left, parent, ops); + if (ret) + return ret; + } + } + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* getResultFromType */ +/*-----------------------------------------------------------------*/ +RESULT_TYPE +getResultTypeFromType (sym_link *type) +{ + /* type = getSpec (type); */ + if (IS_BIT (type)) + return RESULT_TYPE_BIT; + if (IS_BITFIELD (type)) + { + int blen = SPEC_BLEN (type); + + if (blen <= 1) + return RESULT_TYPE_BIT; + if (blen <= 8) + return RESULT_TYPE_CHAR; + return RESULT_TYPE_INT; + } + if (IS_CHAR (type)) + return RESULT_TYPE_CHAR; + if (IS_INT (type) && !IS_LONG (type)) + return RESULT_TYPE_INT; + return RESULT_TYPE_OTHER; +} + +/*-----------------------------------------------------------------*/ +/* addCast - adds casts to a type specified by RESULT_TYPE */ +/*-----------------------------------------------------------------*/ +static ast * +addCast (ast *tree, RESULT_TYPE resultType, bool promote) +{ + sym_link *newLink; + bool upCasted = FALSE; + + switch (resultType) + { + case RESULT_TYPE_NONE: + /* if thing smaller than int must be promoted to int */ + if (!promote || + getSize (tree->etype) >= INTSIZE) + /* promotion not necessary or already an int */ + return tree; + /* char and bits: promote to int */ + newLink = newIntLink(); + upCasted = TRUE; + break; + case RESULT_TYPE_BIT: + if (!promote || + /* already an int */ + bitsForType (tree->etype) >= 16 || + /* bit to bit operation: don't promote, the code generators + hopefully know everything about promotion rules */ + bitsForType (tree->etype) == 1) + return tree; + newLink = newIntLink(); + upCasted = TRUE; + break; + case RESULT_TYPE_CHAR: + if (IS_CHAR (tree->etype) || + IS_FLOAT(tree->etype) || + IS_FIXED(tree->etype)) + return tree; + newLink = newCharLink(); + break; + case RESULT_TYPE_INT: +#if 0 + if (getSize (tree->etype) > INTSIZE) + { + /* warn ("Loosing significant digits"); */ + return; + } +#endif + /* char: promote to int */ + if (!promote || + getSize (tree->etype) >= INTSIZE) + return tree; + newLink = newIntLink(); + upCasted = TRUE; + break; + case RESULT_TYPE_IFX: + case RESULT_TYPE_OTHER: + if (!promote || + /* return type is ifx, long, float: promote char to int */ + getSize (tree->etype) >= INTSIZE) + return tree; + newLink = newIntLink(); + upCasted = TRUE; + break; + default: + return tree; + } + tree->decorated = 0; + tree = newNode (CAST, newAst_LINK (newLink), tree); + tree->filename = tree->right->filename; + tree->lineno = tree->right->lineno; + /* keep unsigned type during cast to smaller type, + but not when promoting from char to int */ + if (!upCasted) + SPEC_USIGN (tree->left->opval.lnk) = IS_UNSIGNED (tree->right->etype) ? 1 : 0; + return decorateType (tree, resultType); +} + +/*-----------------------------------------------------------------*/ +/* resultTypePropagate - decides if resultType can be propagated */ +/*-----------------------------------------------------------------*/ +static RESULT_TYPE +resultTypePropagate (ast *tree, RESULT_TYPE resultType) +{ + switch (tree->opval.op) + { + case AND_OP: + case OR_OP: + case '!': + case '=': + case '?': + case ':': + case '|': + case '^': + case '~': + case LEFT_OP: + case LABEL: + return resultType; + case '*': + case '+': + case '-': + if ((IS_AST_VALUE (tree->left) && !IS_INTEGRAL (tree->left->opval.val->etype)) || + (IS_AST_VALUE (tree->right) && !IS_INTEGRAL (tree->right->opval.val->etype))) + return RESULT_TYPE_NONE; + return resultType; + case '&': + if (!tree->right) + /* can be unary */ + return RESULT_TYPE_NONE; + else + return resultType; + case IFX: + return RESULT_TYPE_IFX; + default: + return RESULT_TYPE_NONE; + } +} + +/*-----------------------------------------------------------------*/ +/* getLeftResultType - gets type from left branch for propagation */ +/*-----------------------------------------------------------------*/ +static RESULT_TYPE +getLeftResultType (ast *tree, RESULT_TYPE resultType) +{ + switch (tree->opval.op) + { + case '=': + case CAST: + if (IS_PTR (LTYPE (tree))) + return RESULT_TYPE_NONE; + else + return getResultTypeFromType (LETYPE (tree)); + case RETURN: + if (IS_PTR (currFunc->type->next)) + return RESULT_TYPE_NONE; + else + return getResultTypeFromType (currFunc->type->next); + case '[': + if (!IS_ARRAY (LTYPE (tree))) + return resultType; + if (DCL_ELEM (LTYPE (tree)) > 0 && DCL_ELEM (LTYPE (tree)) <= 255) + return RESULT_TYPE_CHAR; + return resultType; + default: + return resultType; + } +} + +/*------------------------------------------------------------------*/ +/* gatherImplicitVariables: assigns correct type information to */ +/* symbols and values created by replaceAstWithTemporary */ +/* and adds the symbols to the declarations list of the */ +/* innermost block that contains them */ +/*------------------------------------------------------------------*/ +void +gatherImplicitVariables (ast * tree, ast * block) +{ + if (!tree) + return; + + if (tree->type == EX_OP && tree->opval.op == BLOCK) + { + /* keep track of containing scope */ + block = tree; + } + if (tree->type == EX_OP && tree->opval.op == '=' && + tree->left->type == EX_VALUE && tree->left->opval.val->sym) + { + symbol *assignee = tree->left->opval.val->sym; + + /* special case for assignment to compiler-generated temporary variable: + compute type of RHS, and set the symbol's type to match */ + if (assignee->type == NULL && assignee->infertype) { + ast *dtr = decorateType (resolveSymbols(tree->right), RESULT_TYPE_NONE); + + if (dtr != tree->right) + tree->right = dtr; + + assignee->type = copyLinkChain(TTYPE(dtr)); + assignee->etype = getSpec(assignee->type); + SPEC_SCLS (assignee->etype) = S_AUTO; + SPEC_OCLS (assignee->etype) = NULL; + SPEC_EXTR (assignee->etype) = 0; + SPEC_STAT (assignee->etype) = 0; + SPEC_VOLATILE (assignee->etype) = 0; + SPEC_ABSA (assignee->etype) = 0; + + wassertl(block != NULL, "implicit variable not contained in block"); + wassert(assignee->next == NULL); + if (block != NULL) { + symbol **decl = &(block->values.sym); + + while (*decl) { + wassert(*decl != assignee); /* should not already be in list */ + decl = &( (*decl)->next ); + } + + *decl = assignee; + } + } + } + if (tree->type == EX_VALUE && !(IS_LITERAL(tree->opval.val->etype)) && + tree->opval.val->type == NULL && + tree->opval.val->sym && + tree->opval.val->sym->infertype) + { + /* fixup type of value for compiler-inferred temporary var */ + tree->opval.val->type = tree->opval.val->sym->type; + tree->opval.val->etype = tree->opval.val->sym->etype; + } + + gatherImplicitVariables(tree->left, block); + gatherImplicitVariables(tree->right, block); +} + +/*--------------------------------------------------------------------*/ +/* decorateType - compute type for this tree, also does type checking.*/ +/* This is done bottom up, since type has to flow upwards. */ +/* resultType flows top-down and forces e.g. char-arithmetic, if the */ +/* result is a char and the operand(s) are int's. */ +/* It also does constant folding, and parameter checking. */ +/*--------------------------------------------------------------------*/ +ast * +decorateType (ast * tree, RESULT_TYPE resultType) +{ + int parmNumber; + sym_link *p; + RESULT_TYPE resultTypeProp; + + if (!tree) + return tree; + + /* if already has type then do nothing */ + if (tree->decorated) + return tree; + + tree->decorated = 1; + +#if 0 + /* print the line */ + /* if not block & function */ + if (tree->type == EX_OP && + (tree->opval.op != FUNCTION && + tree->opval.op != BLOCK && + tree->opval.op != NULLOP)) + { + filename = tree->filename; + lineno = tree->lineno; + } +#endif + + /* if any child is an error | this one is an error do nothing */ + if (tree->isError || + (tree->left && tree->left->isError) || + (tree->right && tree->right->isError)) + return tree; + +/*------------------------------------------------------------------*/ +/*----------------------------*/ +/* leaf has been reached */ +/*----------------------------*/ + filename = tree->filename; + lineno = tree->lineno; + /* if this is of type value */ + /* just get the type */ + if (tree->type == EX_VALUE) + { + if (IS_LITERAL (tree->opval.val->etype)) + { + /* if this is a character array then declare it */ + if (IS_ARRAY (tree->opval.val->type)) + tree->opval.val = stringToSymbol (tree->opval.val); + + /* otherwise just copy the type information */ + COPYTYPE (TTYPE (tree), TETYPE (tree), tree->opval.val->type); + return tree; + } + + if (tree->opval.val->sym) + { + /* if the undefined flag is set then give error message */ + if (tree->opval.val->sym->undefined) + { + werrorfl (tree->filename, tree->lineno, E_ID_UNDEF, tree->opval.val->sym->name); + /* assume int */ + TTYPE (tree) = TETYPE (tree) = + tree->opval.val->type = tree->opval.val->sym->type = + tree->opval.val->etype = tree->opval.val->sym->etype = + copyLinkChain (INTTYPE); + } + else if (tree->opval.val->sym->implicit) + { + /* if implicit i.e. struct/union member then no type */ + TTYPE (tree) = TETYPE (tree) = NULL; + } + else + { + /* copy the type from the value into the ast */ + COPYTYPE (TTYPE (tree), TETYPE (tree), tree->opval.val->type); + + /* and mark the symbol as referenced */ + tree->opval.val->sym->isref = 1; + } + } + else + wassert(0); /* unreached: all values are literals or symbols */ + + return tree; + } + + /* if type link for the case of cast */ + if (tree->type == EX_LINK) + { + COPYTYPE (TTYPE (tree), TETYPE (tree), tree->opval.lnk); + return tree; + } + + { + ast *dtl, *dtr; + + #if 0 + if (tree->opval.op == NULLOP || tree->opval.op == BLOCK) + { + if (tree->left && tree->left->type == EX_OPERAND + && (tree->left->opval.op == INC_OP + || tree->left->opval.op == DEC_OP) + && tree->left->left) + { + tree->left->right = tree->left->left; + tree->left->left = NULL; + } + if (tree->right && tree->right->type == EX_OPERAND + && (tree->right->opval.op == INC_OP + || tree->right->opval.op == DEC_OP) + && tree->right->left) + { + tree->right->right = tree->right->left; + tree->right->left = NULL; + } + } + #endif + + /* Before decorating the left branch we've to decide in dependence + upon tree->opval.op, if resultType can be propagated */ + resultTypeProp = resultTypePropagate (tree, resultType); + + if ((tree->opval.op == '?') && (resultTypeProp != RESULT_TYPE_BIT)) + dtl = decorateType (tree->left, RESULT_TYPE_IFX); + else + dtl = decorateType (tree->left, resultTypeProp); + + /* if an array node, we may need to swap branches */ + if (tree->opval.op == '[') + { + /* determine which is the array & which the index */ + if ((IS_ARRAY (RTYPE (tree)) || IS_PTR (RTYPE (tree))) && + IS_INTEGRAL (LTYPE (tree))) + { + ast *tempTree = tree->left; + tree->left = tree->right; + tree->right = tempTree; + } + } + + /* After decorating the left branch there's type information available + in tree->left->?type. If the op is e.g. '=' we extract the type + information from there and propagate it to the right branch. */ + resultTypeProp = getLeftResultType (tree, resultTypeProp); + + switch (tree->opval.op) + { + case '?': + /* delay right side for '?' operator since conditional macro + expansions might rely on this */ + dtr = tree->right; + break; + case CALL: + /* decorate right side for CALL (parameter list) in processParms(); + there is resultType available */ + dtr = tree->right; + break; + case SIZEOF: + /* don't allocate string if it is a sizeof argument */ + ++noAlloc; + dtr = decorateType (tree->right, resultTypeProp); + --noAlloc; + break; + default: + dtr = decorateType (tree->right, resultTypeProp); + break; + } + + /* this is to take care of situations + when the tree gets rewritten */ + if (dtl != tree->left) + tree->left = dtl; + if (dtr != tree->right) + tree->right = dtr; + if ((dtl && dtl->isError) || (dtr && dtr->isError)) + return tree; + } + + /* depending on type of operator do */ + + switch (tree->opval.op) + { + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* array node */ + /*----------------------------*/ + case '[': + + /* first check if this is a array or a pointer */ + if ((!IS_ARRAY (LTYPE (tree))) && (!IS_PTR (LTYPE (tree)))) + { + werrorfl (tree->filename, tree->lineno, E_NEED_ARRAY_PTR, "[]"); + goto errorTreeReturn; + } + + /* check if the type of the idx */ + if (!IS_INTEGRAL (RTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_IDX_NOT_INT); + goto errorTreeReturn; + } + + /* if the left is an rvalue then error */ + if (LRVAL (tree)) + { + werrorfl (tree->filename, tree->lineno, E_LVALUE_REQUIRED, "array access"); + goto errorTreeReturn; + } + + if (IS_LITERAL (RTYPE (tree))) + { + int arrayIndex = (int) ulFromVal (valFromType (RETYPE (tree))); + int arraySize = DCL_ELEM (LTYPE (tree)); + if (arraySize && arrayIndex >= arraySize) + { + werrorfl (tree->filename, tree->lineno, W_IDX_OUT_OF_BOUNDS, arrayIndex, arraySize); + } + } + + RRVAL (tree) = 1; + COPYTYPE (TTYPE (tree), TETYPE (tree), LTYPE (tree)->next); + SPEC_CONST (TETYPE (tree)) |= DCL_PTR_CONST (LTYPE (tree)); + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* struct/union */ + /*----------------------------*/ + case '.': + /* if this is not a structure */ + if (!IS_STRUCT (LTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_STRUCT_UNION, "."); + goto errorTreeReturn; + } + TTYPE (tree) = structElemType (LTYPE (tree), + (tree->right->type == EX_VALUE ? + tree->right->opval.val : NULL)); + TETYPE (tree) = getSpec (TTYPE (tree)); + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* struct/union pointer */ + /*----------------------------*/ + case PTR_OP: + /* if not pointer to a structure */ + if (!IS_PTR (LTYPE (tree)) && !IS_ARRAY (LTYPE(tree))) + { + werrorfl (tree->filename, tree->lineno, E_PTR_REQD); + goto errorTreeReturn; + } + + if (!IS_STRUCT (LTYPE (tree)->next)) + { + werrorfl (tree->filename, tree->lineno, E_STRUCT_UNION, "->"); + goto errorTreeReturn; + } + + TTYPE (tree) = structElemType (LTYPE (tree)->next, + (tree->right->type == EX_VALUE ? + tree->right->opval.val : NULL)); + TETYPE (tree) = getSpec (TTYPE (tree)); + + /* adjust the storage class */ + switch (DCL_TYPE(tree->left->ftype)) { + case POINTER: + SPEC_SCLS(TETYPE(tree)) = S_DATA; + break; + case FPOINTER: + SPEC_SCLS(TETYPE(tree)) = S_XDATA; + break; + case CPOINTER: + SPEC_SCLS(TETYPE(tree)) = S_CODE; + break; + case GPOINTER: + SPEC_SCLS (TETYPE (tree)) = 0; + break; + case PPOINTER: + SPEC_SCLS(TETYPE(tree)) = S_XSTACK; + break; + case IPOINTER: + SPEC_SCLS(TETYPE(tree)) = S_IDATA; + break; + case EEPPOINTER: + SPEC_SCLS(TETYPE(tree)) = S_EEPROM; + break; + case UPOINTER: + SPEC_SCLS (TETYPE (tree)) = 0; + break; + case ARRAY: + case FUNCTION: + break; + } + + /* This breaks with extern declarations, bitfields, and perhaps other */ + /* cases (gcse). Let's leave this optimization disabled for now and */ + /* ponder if there's a safe way to do this. -- EEP */ + #if 0 + if (IS_ADDRESS_OF_OP (tree->left) && IS_AST_SYM_VALUE(tree->left->left) + && SPEC_ABSA (AST_SYMBOL (tree->left->left)->etype)) + { + /* If defined struct type at addr var + then rewrite (&struct var)->member + as temp + and define membertype at (addr+offsetof(struct var,member)) temp + */ + symbol *sym; + symbol *element = getStructElement (SPEC_STRUCT (LETYPE(tree)), + AST_SYMBOL(tree->right)); + + sym = newSymbol(genSymName (0), 0); + sym->type = TTYPE (tree); + sym->etype = getSpec(sym->type); + sym->lineDef = tree->lineno; + sym->cdef = 1; + sym->isref = 1; + SPEC_STAT (sym->etype) = 1; + SPEC_ADDR (sym->etype) = SPEC_ADDR (AST_SYMBOL (tree->left->left)->etype) + + element->offset; + SPEC_ABSA(sym->etype) = 1; + addSym (SymbolTab, sym, sym->name, 0, 0, 0); + allocGlobal (sym); + + AST_VALUE (tree) = symbolVal(sym); + TLVAL (tree) = 1; + TRVAL (tree) = 0; + tree->type = EX_VALUE; + tree->left = NULL; + tree->right = NULL; + } + #endif + + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* ++/-- operation */ + /*----------------------------*/ + case INC_OP: + case DEC_OP: + { + sym_link *ltc = (tree->right ? RTYPE (tree) : LTYPE (tree)); + COPYTYPE (TTYPE (tree), TETYPE (tree), ltc); + if (!tree->initMode && IS_CONSTANT(TTYPE(tree))) + werrorfl (tree->filename, tree->lineno, E_CODE_WRITE, tree->opval.op==INC_OP ? "++" : "--"); + + if (tree->right) + RLVAL (tree) = 1; + else + LLVAL (tree) = 1; + return tree; + } + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* bitwise and */ + /*----------------------------*/ + case '&': /* can be unary */ + /* if right is NULL then unary operation */ + if (tree->right) /* not an unary operation */ + { + + if (!IS_INTEGRAL (LTYPE (tree)) || !IS_INTEGRAL (RTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_BITWISE_OP); + werrorfl (tree->filename, tree->lineno, W_CONTINUE, "left & right types are "); + printTypeChain (LTYPE (tree), stderr); + fprintf (stderr, ","); + printTypeChain (RTYPE (tree), stderr); + fprintf (stderr, "\n"); + goto errorTreeReturn; + } + + /* if they are both literal */ + if (IS_LITERAL (RTYPE (tree)) && IS_LITERAL (LTYPE (tree))) + { + tree->type = EX_VALUE; + tree->opval.val = valBitwise (valFromType (LETYPE (tree)), + valFromType (RETYPE (tree)), '&'); + + tree->right = tree->left = NULL; + TETYPE (tree) = tree->opval.val->etype; + TTYPE (tree) = tree->opval.val->type; + return tree; + } + + /* see if this is a GETHBIT operation if yes + then return that */ + { + ast *otree = optimizeGetHbit (tree, resultType); + + if (otree != tree) + return decorateType (otree, RESULT_TYPE_NONE); + } + + /* see if this is a GETABIT operation if yes + then return that */ + { + ast *otree = optimizeGetAbit (tree, resultType); + + if (otree != tree) + return decorateType (otree, RESULT_TYPE_NONE); + } + + /* see if this is a GETBYTE operation if yes + then return that */ + { + ast *otree = optimizeGetByte (tree, resultType); + + if (otree != tree) + return decorateType (otree, RESULT_TYPE_NONE); + } + + /* see if this is a GETWORD operation if yes + then return that */ + { + ast *otree = optimizeGetWord (tree, resultType); + + if (otree != tree) + return decorateType (otree, RESULT_TYPE_NONE); + } + + /* if left is a literal exchange left & right */ + if (IS_LITERAL (LTYPE (tree))) + { + ast *tTree = tree->left; + tree->left = tree->right; + tree->right = tTree; + } + + /* if right is a literal and */ + /* we can find a 2nd literal in an and-tree then */ + /* rearrange the tree */ + if (IS_LITERAL (RTYPE (tree))) + { + ast *parent; + ast *litTree = searchLitOp (tree, &parent, "&"); + if (litTree) + { + DEBUG_CF("&") + ast *tTree = litTree->left; + litTree->left = tree->right; + tree->right = tTree; + /* both operands in litTree are literal now */ + decorateType (parent, resultType); + } + } + + LRVAL (tree) = RRVAL (tree) = 1; + + TTYPE (tree) = computeType (LTYPE (tree), + RTYPE (tree), + resultType, + tree->opval.op); + TETYPE (tree) = getSpec (TTYPE (tree)); + + return tree; + } + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* address of */ + /*----------------------------*/ + p = newLink (DECLARATOR); + /* if bit field then error */ + if (IS_BITVAR (tree->left->etype)) + { + werrorfl (tree->filename, tree->lineno, E_ILLEGAL_ADDR, "address of bit variable"); + goto errorTreeReturn; + } + + if (LETYPE(tree) && SPEC_SCLS (tree->left->etype) == S_REGISTER) + { + werrorfl (tree->filename, tree->lineno, E_ILLEGAL_ADDR, "address of register variable"); + goto errorTreeReturn; + } + + if (IS_FUNC (LTYPE (tree))) + { + // this ought to be ignored + return (tree->left); + } + + if (IS_LITERAL(LTYPE(tree))) + { + werrorfl (tree->filename, tree->lineno, E_ILLEGAL_ADDR, "address of literal"); + goto errorTreeReturn; + } + + if (LRVAL (tree)) + { + werrorfl (tree->filename, tree->lineno, E_LVALUE_REQUIRED, "address of"); + goto errorTreeReturn; + } + if (!LETYPE (tree)) + DCL_TYPE (p) = POINTER; + else if (SPEC_SCLS (tree->left->etype) == S_CODE) + DCL_TYPE (p) = CPOINTER; + else if (SPEC_SCLS (tree->left->etype) == S_XDATA) + DCL_TYPE (p) = FPOINTER; + else if (SPEC_SCLS (tree->left->etype) == S_XSTACK) + DCL_TYPE (p) = PPOINTER; + else if (SPEC_SCLS (tree->left->etype) == S_IDATA) + DCL_TYPE (p) = IPOINTER; + else if (SPEC_SCLS (tree->left->etype) == S_EEPROM) + DCL_TYPE (p) = EEPPOINTER; + else if (SPEC_OCLS(tree->left->etype)) + DCL_TYPE (p) = PTR_TYPE(SPEC_OCLS(tree->left->etype)); + else + DCL_TYPE (p) = POINTER; + + if (IS_AST_SYM_VALUE (tree->left)) + { + AST_SYMBOL (tree->left)->addrtaken = 1; + AST_SYMBOL (tree->left)->allocreq = 1; + } + + p->next = LTYPE (tree); + TTYPE (tree) = p; + TETYPE (tree) = getSpec (TTYPE (tree)); + LLVAL (tree) = 1; + TLVAL (tree) = 1; + + #if 0 + if (IS_AST_OP (tree->left) && tree->left->opval.op == PTR_OP + && IS_AST_VALUE (tree->left->left) && !IS_AST_SYM_VALUE (tree->left->left)) + { + symbol *element = getStructElement (SPEC_STRUCT (LETYPE(tree->left)), + AST_SYMBOL(tree->left->right)); + AST_VALUE(tree) = valPlus(AST_VALUE(tree->left->left), + valueFromLit(element->offset)); + tree->left = NULL; + tree->right = NULL; + tree->type = EX_VALUE; + tree->values.literalFromCast = 1; + } + #endif + + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* bitwise or */ + /*----------------------------*/ + case '|': + /* if the rewrite succeeds then don't go any further */ + { + ast *wtree = optimizeRRCRLC (tree); + if (wtree != tree) + return decorateType (wtree, RESULT_TYPE_NONE); + + wtree = optimizeSWAP (tree); + if (wtree != tree) + return decorateType (wtree, RESULT_TYPE_NONE); + } + + /* if left is a literal exchange left & right */ + if (IS_LITERAL (LTYPE (tree))) + { + ast *tTree = tree->left; + tree->left = tree->right; + tree->right = tTree; + } + + /* if right is a literal and */ + /* we can find a 2nd literal in an or-tree then */ + /* rearrange the tree */ + if (IS_LITERAL (RTYPE (tree))) + { + ast *parent; + ast *litTree = searchLitOp (tree, &parent, "|"); + if (litTree) + { + DEBUG_CF("|") + ast *tTree = litTree->left; + litTree->left = tree->right; + tree->right = tTree; + /* both operands in tTree are literal now */ + decorateType (parent, resultType); + } + } + /* fall through */ + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* bitwise xor */ + /*----------------------------*/ + case '^': + if (!IS_INTEGRAL (LTYPE (tree)) || !IS_INTEGRAL (RTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_BITWISE_OP); + werrorfl (tree->filename, tree->lineno, W_CONTINUE, "left & right types are "); + printTypeChain (LTYPE (tree), stderr); + fprintf (stderr, ","); + printTypeChain (RTYPE (tree), stderr); + fprintf (stderr, "\n"); + goto errorTreeReturn; + } + + /* if they are both literal then rewrite the tree */ + if (IS_LITERAL (RTYPE (tree)) && IS_LITERAL (LTYPE (tree))) + { + tree->type = EX_VALUE; + tree->opval.val = valBitwise (valFromType (LETYPE (tree)), + valFromType (RETYPE (tree)), + tree->opval.op); + tree->right = tree->left = NULL; + TETYPE (tree) = tree->opval.val->etype; + TTYPE (tree) = tree->opval.val->type; + return tree; + } + + /* if left is a literal exchange left & right */ + if (IS_LITERAL (LTYPE (tree))) + { + ast *tTree = tree->left; + tree->left = tree->right; + tree->right = tTree; + } + + /* if right is a literal and */ + /* we can find a 2nd literal in a xor-tree then */ + /* rearrange the tree */ + if (IS_LITERAL (RTYPE (tree)) && + tree->opval.op == '^') /* the same source is used by 'bitwise or' */ + { + ast *parent; + ast *litTree = searchLitOp (tree, &parent, "^"); + if (litTree) + { + DEBUG_CF("^") + ast *tTree = litTree->left; + litTree->left = tree->right; + tree->right = tTree; + /* both operands in litTree are literal now */ + decorateType (parent, resultType); + } + } + + LRVAL (tree) = RRVAL (tree) = 1; + + TTYPE (tree) = computeType (LTYPE (tree), + RTYPE (tree), + resultType, + tree->opval.op); + TETYPE (tree) = getSpec (TTYPE (tree)); + + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* division */ + /*----------------------------*/ + case '/': + if (!IS_ARITHMETIC (LTYPE (tree)) || !IS_ARITHMETIC (RTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_INVALID_OP, "divide"); + goto errorTreeReturn; + } + /* if they are both literal then */ + /* rewrite the tree */ + if (IS_LITERAL (RTYPE (tree)) && IS_LITERAL (LTYPE (tree))) + { + tree->type = EX_VALUE; + tree->opval.val = valDiv (valFromType (LETYPE (tree)), + valFromType (RETYPE (tree))); + tree->right = tree->left = NULL; + TETYPE (tree) = getSpec (TTYPE (tree) = + tree->opval.val->type); + return tree; + } + + LRVAL (tree) = RRVAL (tree) = 1; + + TETYPE (tree) = getSpec (TTYPE (tree) = + computeType (LTYPE (tree), + RTYPE (tree), + resultType, + tree->opval.op)); + + /* if right is a literal and */ + /* left is also a division by a literal then */ + /* rearrange the tree */ + if (IS_LITERAL (RTYPE (tree)) + /* avoid infinite loop */ + && (TYPE_TARGET_ULONG) ulFromVal (tree->right->opval.val) != 1) + { + ast *parent; + ast *litTree = searchLitOp (tree, &parent, "/"); + if (litTree) + { + if (IS_LITERAL (RTYPE (litTree))) + { + /* foo_div */ + DEBUG_CF("div r") + litTree->right = newNode ('*', + litTree->right, + copyAst (tree->right)); + litTree->right->filename = tree->filename; + litTree->right->lineno = tree->lineno; + + tree->right->opval.val = constCharVal (1); + decorateType (parent, resultType); + } + else + { + /* litTree->left is literal: no gcse possible. + We can't call decorateType(parent, RESULT_TYPE_NONE), because + this would cause an infinit loop. */ + parent->decorated = 1; + decorateType (litTree, resultType); + } + } + } + + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* modulus */ + /*----------------------------*/ + case '%': + if (!IS_INTEGRAL (LTYPE (tree)) || !IS_INTEGRAL (RTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_BITWISE_OP); + werrorfl (tree->filename, tree->lineno, W_CONTINUE, "left & right types are "); + printTypeChain (LTYPE (tree), stderr); + fprintf (stderr, ","); + printTypeChain (RTYPE (tree), stderr); + fprintf (stderr, "\n"); + goto errorTreeReturn; + } + /* if they are both literal then */ + /* rewrite the tree */ + if (IS_LITERAL (RTYPE (tree)) && IS_LITERAL (LTYPE (tree))) + { + tree->type = EX_VALUE; + tree->opval.val = valMod (valFromType (LETYPE (tree)), + valFromType (RETYPE (tree))); + tree->right = tree->left = NULL; + TETYPE (tree) = getSpec (TTYPE (tree) = + tree->opval.val->type); + return tree; + } + LRVAL (tree) = RRVAL (tree) = 1; + TETYPE (tree) = getSpec (TTYPE (tree) = + computeType (LTYPE (tree), + RTYPE (tree), + resultType, + tree->opval.op)); + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* address dereference */ + /*----------------------------*/ + case '*': /* can be unary : if right is null then unary operation */ + if (!tree->right) + { + if (!IS_PTR (LTYPE (tree)) && !IS_ARRAY (LTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_PTR_REQD); + goto errorTreeReturn; + } + + if (LRVAL (tree)) + { + werrorfl (tree->filename, tree->lineno, E_LVALUE_REQUIRED, "pointer deref"); + goto errorTreeReturn; + } + if (IS_ADDRESS_OF_OP (tree->left)) + { + /* replace *&obj with obj */ + return tree->left->left; + } + TTYPE (tree) = copyLinkChain (LTYPE (tree)->next); + TETYPE (tree) = getSpec (TTYPE (tree)); + /* adjust the storage class */ + switch (DCL_TYPE(tree->left->ftype)) { + case POINTER: + SPEC_SCLS(TETYPE(tree)) = S_DATA; + break; + case FPOINTER: + SPEC_SCLS(TETYPE(tree)) = S_XDATA; + break; + case CPOINTER: + SPEC_SCLS(TETYPE(tree)) = S_CODE; + break; + case GPOINTER: + SPEC_SCLS (TETYPE (tree)) = 0; + break; + case PPOINTER: + SPEC_SCLS(TETYPE(tree)) = S_XSTACK; + break; + case IPOINTER: + SPEC_SCLS(TETYPE(tree)) = S_IDATA; + break; + case EEPPOINTER: + SPEC_SCLS(TETYPE(tree)) = S_EEPROM; + break; + case UPOINTER: + SPEC_SCLS (TETYPE (tree)) = 0; + break; + case ARRAY: + case FUNCTION: + break; + } + return tree; + } + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* multiplication */ + /*----------------------------*/ + if (!IS_ARITHMETIC (LTYPE (tree)) || !IS_ARITHMETIC (RTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_INVALID_OP, "multiplication"); + goto errorTreeReturn; + } + + /* if they are both literal then */ + /* rewrite the tree */ + if (IS_LITERAL (RTYPE (tree)) && IS_LITERAL (LTYPE (tree))) + { + tree->type = EX_VALUE; + tree->opval.val = valMult (valFromType (LETYPE (tree)), + valFromType (RETYPE (tree))); + tree->right = tree->left = NULL; + TETYPE (tree) = getSpec (TTYPE (tree) = + tree->opval.val->type); + return tree; + } + + /* if left is a literal exchange left & right */ + if (IS_LITERAL (LTYPE (tree))) + { + ast *tTree = tree->left; + tree->left = tree->right; + tree->right = tTree; + } + + /* if right is a literal and */ + /* we can find a 2nd literal in a mul-tree then */ + /* rearrange the tree */ + if (IS_LITERAL (RTYPE (tree))) + { + ast *parent; + ast *litTree = searchLitOp (tree, &parent, "*"); + if (litTree) + { + DEBUG_CF("mul") + ast *tTree = litTree->left; + litTree->left = tree->right; + tree->right = tTree; + /* both operands in litTree are literal now */ + decorateType (parent, resultType); + } + } + + LRVAL (tree) = RRVAL (tree) = 1; + tree->left = addCast (tree->left, resultTypeProp, FALSE); + tree->right = addCast (tree->right, resultTypeProp, FALSE); + TETYPE (tree) = getSpec (TTYPE (tree) = + computeType (LTYPE (tree), + RTYPE (tree), + resultType, + tree->opval.op)); + + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* unary '+' operator */ + /*----------------------------*/ + case '+': + /* if unary plus */ + if (!tree->right) + { + if (!IS_ARITHMETIC (LTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_UNARY_OP, '+'); + goto errorTreeReturn; + } + + /* if left is a literal then do it */ + if (IS_LITERAL (LTYPE (tree))) + { + tree->type = EX_VALUE; + tree->opval.val = valFromType (LETYPE (tree)); + tree->left = NULL; + TETYPE (tree) = TTYPE (tree) = tree->opval.val->type; + return tree; + } + LRVAL (tree) = 1; + COPYTYPE (TTYPE (tree), TETYPE (tree), LTYPE (tree)); + return tree; + } + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* addition */ + /*----------------------------*/ + + /* this is not a unary operation */ + /* if both pointers then problem */ + if ((IS_PTR (LTYPE (tree)) || IS_ARRAY (LTYPE (tree))) && + (IS_PTR (RTYPE (tree)) || IS_ARRAY (RTYPE (tree)))) + { + werrorfl (tree->filename, tree->lineno, E_PTR_PLUS_PTR); + goto errorTreeReturn; + } + + if (!IS_ARITHMETIC (LTYPE (tree)) && + !IS_PTR (LTYPE (tree)) && !IS_ARRAY (LTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_PLUS_INVALID, "+"); + goto errorTreeReturn; + } + + if (!IS_ARITHMETIC (RTYPE (tree)) && + !IS_PTR (RTYPE (tree)) && !IS_ARRAY (RTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_PLUS_INVALID, "+"); + goto errorTreeReturn; + } + /* if they are both literal then */ + /* rewrite the tree */ + if (IS_LITERAL (RTYPE (tree)) && IS_LITERAL (LTYPE (tree))) + { + tree->type = EX_VALUE; + tree->left = addCast (tree->left, resultTypeProp, TRUE); + tree->right = addCast (tree->right, resultTypeProp, TRUE); + tree->opval.val = valPlus (valFromType (LETYPE (tree)), + valFromType (RETYPE (tree))); + tree->right = tree->left = NULL; + TETYPE (tree) = getSpec (TTYPE (tree) = + tree->opval.val->type); + return tree; + } + + /* if the right is a pointer or left is a literal + xchange left & right */ + if (IS_ARRAY (RTYPE (tree)) || + IS_PTR (RTYPE (tree)) || + IS_LITERAL (LTYPE (tree))) + { + ast *tTree = tree->left; + tree->left = tree->right; + tree->right = tTree; + } + + /* if right is a literal and */ + /* left is also an addition/subtraction with a literal then */ + /* rearrange the tree */ + if (IS_LITERAL (RTYPE (tree))) + { + ast *litTree, *parent; + litTree = searchLitOp (tree, &parent, "+-"); + if (litTree) + { + if (litTree->opval.op == '+') + { + /* foo_aa */ + DEBUG_CF("+ 1 AA") + ast *tTree = litTree->left; + litTree->left = tree->right; + tree->right = tree->left; + tree->left = tTree; + } + else if (litTree->opval.op == '-') + { + if (IS_LITERAL (RTYPE (litTree))) + { + DEBUG_CF("+ 2 ASR") + /* foo_asr */ + ast *tTree = litTree->left; + litTree->left = tree->right; + tree->right = tTree; + } + else + { + DEBUG_CF("+ 3 ASL") + /* foo_asl */ + ast *tTree = litTree->right; + litTree->right = tree->right; + tree->right = tTree; + litTree->opval.op = '+'; + tree->opval.op = '-'; + } + } + decorateType (parent, resultType); + } + } + + LRVAL (tree) = RRVAL (tree) = 1; + /* if the left is a pointer */ + if (IS_PTR (LTYPE (tree)) || IS_AGGREGATE (LTYPE (tree)) ) + TETYPE (tree) = getSpec (TTYPE (tree) = + LTYPE (tree)); + else + { + tree->left = addCast (tree->left, resultTypeProp, TRUE); + tree->right = addCast (tree->right, resultTypeProp, TRUE); + TETYPE (tree) = getSpec (TTYPE (tree) = + computeType (LTYPE (tree), + RTYPE (tree), + resultType, + tree->opval.op)); + } + + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* unary '-' */ + /*----------------------------*/ + case '-': /* can be unary */ + /* if right is null then unary */ + if (!tree->right) + { + + if (!IS_ARITHMETIC (LTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_UNARY_OP, tree->opval.op); + goto errorTreeReturn; + } + + /* if left is a literal then do it */ + if (IS_LITERAL (LTYPE (tree))) + { + tree->type = EX_VALUE; + tree->opval.val = valUnaryPM (valFromType (LETYPE (tree))); + tree->left = NULL; + TETYPE (tree) = TTYPE (tree) = tree->opval.val->type; + return tree; + } + tree->left = addCast (tree->left, resultTypeProp, TRUE); + TETYPE (tree) = getSpec (TTYPE (tree) = + computeType (LTYPE (tree), + NULL, + resultType, + tree->opval.op)); + LRVAL (tree) = 1; + return tree; + } + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* subtraction */ + /*----------------------------*/ + + if (!(IS_PTR (LTYPE (tree)) || + IS_ARRAY (LTYPE (tree)) || + IS_ARITHMETIC (LTYPE (tree)))) + { + werrorfl (tree->filename, tree->lineno, E_PLUS_INVALID, "-"); + goto errorTreeReturn; + } + + if (!(IS_PTR (RTYPE (tree)) || + IS_ARRAY (RTYPE (tree)) || + IS_ARITHMETIC (RTYPE (tree)))) + { + werrorfl (tree->filename, tree->lineno, E_PLUS_INVALID, "-"); + goto errorTreeReturn; + } + + if ((IS_PTR (LTYPE (tree)) || IS_ARRAY (LTYPE (tree))) && + !(IS_PTR (RTYPE (tree)) || IS_ARRAY (RTYPE (tree)) || + IS_INTEGRAL (RTYPE (tree)))) + { + werrorfl (tree->filename, tree->lineno, E_PLUS_INVALID, "-"); + goto errorTreeReturn; + } + + /* if they are both literal then */ + /* rewrite the tree */ + if (IS_LITERAL (RTYPE (tree)) && IS_LITERAL (LTYPE (tree))) + { + tree->type = EX_VALUE; + tree->left = addCast (tree->left, resultTypeProp, TRUE); + tree->right = addCast (tree->right, resultTypeProp, TRUE); + tree->opval.val = valMinus (valFromType (LETYPE (tree)), + valFromType (RETYPE (tree))); + tree->right = tree->left = NULL; + TETYPE (tree) = getSpec (TTYPE (tree) = + tree->opval.val->type); + return tree; + } + + /* if the left & right are equal then zero */ + if (isAstEqual (tree->left, tree->right)) + { + tree->type = EX_VALUE; + tree->left = tree->right = NULL; + tree->opval.val = constCharVal (0); + TETYPE (tree) = TTYPE (tree) = tree->opval.val->type; + return tree; + } + + /* if both of them are pointers or arrays then */ + /* the result is going to be an integer */ + if ((IS_ARRAY (LTYPE (tree)) || IS_PTR (LTYPE (tree))) && + (IS_ARRAY (RTYPE (tree)) || IS_PTR (RTYPE (tree)))) + TETYPE (tree) = TTYPE (tree) = newIntLink (); + else + /* if only the left is a pointer */ + /* then result is a pointer */ + if (IS_PTR (LTYPE (tree)) || IS_ARRAY (LTYPE (tree))) + TETYPE (tree) = getSpec (TTYPE (tree) = + LTYPE (tree)); + else + { + tree->left = addCast (tree->left, resultTypeProp, TRUE); + tree->right = addCast (tree->right, resultTypeProp, TRUE); + + TETYPE (tree) = getSpec (TTYPE (tree) = + computeType (LTYPE (tree), + RTYPE (tree), + resultType, + tree->opval.op)); + } + + LRVAL (tree) = RRVAL (tree) = 1; + + /* if right is a literal and */ + /* left is also an addition/subtraction with a literal then */ + /* rearrange the tree */ + if (IS_LITERAL (RTYPE (tree)) + /* avoid infinite loop */ + && (TYPE_TARGET_ULONG) ulFromVal (tree->right->opval.val) != 0) + { + ast *litTree, *litParent; + litTree = searchLitOp (tree, &litParent, "+-"); + if (litTree) + { + if (litTree->opval.op == '+') + { + /* foo_sa */ + DEBUG_CF("- 1 SA") + ast *tTree = litTree->left; + litTree->left = litTree->right; + litTree->right = tree->right; + tree->right = tTree; + tree->opval.op = '+'; + litTree->opval.op = '-'; + } + else if (litTree->opval.op == '-') + { + if (IS_LITERAL (RTYPE (litTree))) + { + /* foo_ssr */ + DEBUG_CF("- 2 SSR") + ast *tTree = litTree->left; + litTree->left = tree->right; + tree->right = litParent->left; + litParent->left = tTree; + litTree->opval.op = '+'; + + tree->decorated = 0; + decorateType (tree, resultType); + } + else + { + /* foo_ssl */ + DEBUG_CF("- 3 SSL") + ast *tTree = litTree->right; + litTree->right = tree->right; + tree->right = tTree; + } + } + decorateType (litParent, resultType); + } + } + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* complement */ + /*----------------------------*/ + case '~': + /* can be only integral type */ + if (!IS_INTEGRAL (LTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_UNARY_OP, tree->opval.op); + goto errorTreeReturn; + } + + /* if left is a literal then do it */ + if (IS_LITERAL (LTYPE (tree))) + { + tree->type = EX_VALUE; + tree->opval.val = valComplement (valFromType (LETYPE (tree))); + tree->left = NULL; + TETYPE (tree) = TTYPE (tree) = tree->opval.val->type; + return addCast (tree, resultTypeProp, TRUE); + } + + if (resultType == RESULT_TYPE_BIT && + IS_UNSIGNED (tree->left->etype) && + getSize (tree->left->etype) < INTSIZE) + { + /* promotion rules are responsible for this strange result: + bit -> int -> ~int -> bit + uchar -> int -> ~int -> bit + */ + werrorfl (tree->filename, tree->lineno, W_COMPLEMENT); + + /* optimize bit-result, even if we optimize a buggy source */ + tree->type = EX_VALUE; + tree->opval.val = constCharVal (1); + } + else + tree->left = addCast (tree->left, resultTypeProp, TRUE); + LRVAL (tree) = 1; + COPYTYPE (TTYPE (tree), TETYPE (tree), LTYPE (tree)); + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* not */ + /*----------------------------*/ + case '!': + /* can be pointer */ + if (!IS_ARITHMETIC (LTYPE (tree)) && + !IS_PTR (LTYPE (tree)) && + !IS_ARRAY (LTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_UNARY_OP, tree->opval.op); + goto errorTreeReturn; + } + + /* if left is another '!' */ + if (IS_AST_NOT_OPER (tree->left)) + { + if ((resultType == RESULT_TYPE_IFX) || (resultType == RESULT_TYPE_BIT)) + { + /* replace double '!!X' by 'X' */ + return tree->left->left; + } + /* remove double '!!X' by 'X ? 1 : 0' */ + tree->opval.op = '?'; + tree->left = tree->left->left; + tree->right = newNode (':', + newAst_VALUE (constCharVal (1)), + newAst_VALUE (constCharVal (0))); + tree->right->filename = tree->filename; + tree->right->lineno = tree->lineno; + tree->decorated = 0; + return decorateType (tree, resultType); + } + + /* if left is a literal then do it */ + if (IS_LITERAL (LTYPE (tree))) + { + tree->type = EX_VALUE; + tree->opval.val = valNot (valFromType (LETYPE (tree))); + tree->left = NULL; + TETYPE (tree) = TTYPE (tree) = tree->opval.val->type; + return tree; + } + LRVAL (tree) = 1; + TTYPE (tree) = TETYPE (tree) = (resultTypeProp == RESULT_TYPE_BIT) ? newBoolLink() :newCharLink(); + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* shift */ + /*----------------------------*/ + case RRC: + case RLC: + case SWAP: + TTYPE (tree) = LTYPE (tree); + TETYPE (tree) = LETYPE (tree); + return tree; + + case GETHBIT: + case GETABIT: + TTYPE (tree) = TETYPE (tree) = (resultTypeProp == RESULT_TYPE_BIT) ? newBoolLink() :newCharLink(); + return tree; + + case GETBYTE: + TTYPE (tree) = TETYPE (tree) = newCharLink(); + return tree; + + case GETWORD: + TTYPE (tree) = TETYPE (tree) = newIntLink(); + return tree; + + case LEFT_OP: + case RIGHT_OP: + if (!IS_INTEGRAL (LTYPE (tree)) || !IS_INTEGRAL (tree->left->etype)) + { + werrorfl (tree->filename, tree->lineno, E_SHIFT_OP_INVALID); + werrorfl (tree->filename, tree->lineno, W_CONTINUE, "left & right types are "); + printTypeChain (LTYPE (tree), stderr); + fprintf (stderr, ","); + printTypeChain (RTYPE (tree), stderr); + fprintf (stderr, "\n"); + goto errorTreeReturn; + } + + /* make smaller type only if it's a LEFT_OP */ + if (tree->opval.op == LEFT_OP) + tree->left = addCast (tree->left, resultTypeProp, TRUE); + + /* if they are both literal then */ + /* rewrite the tree */ + if (IS_LITERAL (RTYPE (tree)) && IS_LITERAL (LTYPE (tree))) + { + tree->type = EX_VALUE; + tree->opval.val = valShift (valFromType (LETYPE (tree)), + valFromType (RETYPE (tree)), + (tree->opval.op == LEFT_OP ? 1 : 0)); + tree->right = tree->left = NULL; + TETYPE (tree) = getSpec (TTYPE (tree) = + tree->opval.val->type); + return tree; + } + + /* see if this is a GETBYTE operation if yes + then return that */ + { + ast *otree = optimizeGetByte (tree, resultType); + + if (otree != tree) + return decorateType (otree, RESULT_TYPE_NONE); + } + + /* see if this is a GETWORD operation if yes + then return that */ + { + ast *otree = optimizeGetWord (tree, resultType); + + if (otree != tree) + return decorateType (otree, RESULT_TYPE_NONE); + } + + LRVAL (tree) = RRVAL (tree) = 1; + if (tree->opval.op == LEFT_OP) + { + TETYPE (tree) = getSpec (TTYPE (tree) = + computeType (LTYPE (tree), + NULL, + resultType, + tree->opval.op)); + } + else /* RIGHT_OP */ + { + /* no promotion necessary */ + TTYPE (tree) = TETYPE (tree) = copyLinkChain (LTYPE (tree)); + if (IS_LITERAL (TTYPE (tree))) + SPEC_SCLS (TTYPE (tree)) &= ~S_LITERAL; + } + + /* if only the right side is a literal & we are + shifting more than size of the left operand then zero */ + if (IS_LITERAL (RTYPE (tree)) && + ((TYPE_TARGET_ULONG) ulFromVal (valFromType (RETYPE (tree)))) >= + (getSize (TETYPE (tree)) * 8)) + { + if (tree->opval.op==LEFT_OP || + (tree->opval.op==RIGHT_OP && SPEC_USIGN(LETYPE(tree)))) + { + werrorfl (tree->filename, tree->lineno, W_SHIFT_CHANGED, + (tree->opval.op == LEFT_OP ? "left" : "right")); + tree->type = EX_VALUE; + tree->left = tree->right = NULL; + tree->opval.val = constCharVal (0); + TETYPE (tree) = TTYPE (tree) = tree->opval.val->type; + return tree; + } + } + + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* casting */ + /*----------------------------*/ + case CAST: /* change the type */ + /* cannot cast to an aggregate type */ + if (IS_AGGREGATE (LTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_CAST_ILLEGAL); + goto errorTreeReturn; + } + + /* make sure the type is complete and sane */ + changePointer(LTYPE(tree)); + checkTypeSanity(LETYPE(tree), "(cast)"); + + /* if 'from' and 'to' are the same remove the superfluous cast, + * this helps other optimizations */ + if (compareTypeExact (LTYPE(tree), RTYPE(tree), -1) == 1) + { + /* mark that the explicit cast has been removed, + * for proper processing (no integer promotion) of explicitly typecasted variable arguments */ + tree->right->values.removedCast = 1; + return tree->right; + } + + /* If code memory is read only, then pointers to code memory */ + /* implicitly point to constants -- make this explicit */ + { + sym_link *t = LTYPE(tree); + while (t && t->next) + { + if (IS_CODEPTR(t) && port->mem.code_ro) + { + if (IS_SPEC(t->next)) + SPEC_CONST (t->next) = 1; + else + DCL_PTR_CONST (t->next) = 1; + } + t = t->next; + } + } + +#if 0 + /* if the right is a literal replace the tree */ + if (IS_LITERAL (RETYPE (tree))) + { + if (!IS_PTR (LTYPE (tree))) + { + tree->type = EX_VALUE; + tree->opval.val = + valCastLiteral (LTYPE (tree), + floatFromVal (valFromType (RETYPE (tree)))); + tree->left = NULL; + tree->right = NULL; + TTYPE (tree) = tree->opval.val->type; + tree->values.literalFromCast = 1; + } + else if (IS_GENPTR(LTYPE(tree)) && !IS_PTR(RTYPE(tree)) && + ((int) ulFromVal(valFromType(RETYPE(tree)))) !=0 ) /* special case of NULL */ + { + sym_link *rest = LTYPE(tree)->next; + werrorfl (tree->filename, tree->lineno, W_LITERAL_GENERIC); + TTYPE(tree) = newLink(DECLARATOR); + DCL_TYPE(TTYPE(tree)) = FPOINTER; + TTYPE(tree)->next = rest; + tree->left->opval.lnk = TTYPE(tree); + LRVAL (tree) = 1; + } + else + { + TTYPE (tree) = LTYPE (tree); + LRVAL (tree) = 1; + } + } + else + { + TTYPE (tree) = LTYPE (tree); + LRVAL (tree) = 1; + } +#else +#if 0 // this is already checked, now this could be explicit + /* if pointer to struct then check names */ + if (IS_PTR(LTYPE(tree)) && IS_STRUCT(LTYPE(tree)->next) && + IS_PTR(RTYPE(tree)) && IS_STRUCT(RTYPE(tree)->next) && + strcmp(SPEC_STRUCT(LETYPE(tree))->tag,SPEC_STRUCT(RETYPE(tree))->tag)) + { + werrorfl (tree->filename, tree->lineno, W_CAST_STRUCT_PTR,SPEC_STRUCT(RETYPE(tree))->tag, + SPEC_STRUCT(LETYPE(tree))->tag); + } +#endif + if (IS_ADDRESS_OF_OP(tree->right) + && IS_AST_SYM_VALUE (tree->right->left) + && SPEC_ABSA (AST_SYMBOL (tree->right->left)->etype)) + { + symbol * sym = AST_SYMBOL (tree->right->left); + unsigned int gptype = 0; + unsigned int addr = SPEC_ADDR (sym->etype); + + if (IS_GENPTR (LTYPE (tree)) && ((GPTRSIZE > FPTRSIZE) || TARGET_IS_PIC16) ) + { + switch (SPEC_SCLS (sym->etype)) + { + case S_CODE: + gptype = GPTYPE_CODE; + break; + case S_XDATA: + gptype = GPTYPE_FAR; + break; + case S_DATA: + case S_IDATA: + gptype = GPTYPE_NEAR; + break; + case S_PDATA: + gptype = GPTYPE_XSTACK; + break; + default: + gptype = 0; + + if(TARGET_IS_PIC16 && (SPEC_SCLS(sym->etype) == S_FIXED)) + gptype = GPTYPE_NEAR; + } + addr |= gptype << (8*(GPTRSIZE - 1)); + } + + tree->type = EX_VALUE; + tree->opval.val = valCastLiteral (LTYPE (tree), addr); + TTYPE (tree) = tree->opval.val->type; + TETYPE (tree) = getSpec (TTYPE (tree)); + tree->left = NULL; + tree->right = NULL; + tree->values.literalFromCast = 1; + return tree; + } + + /* handle offsetof macro: */ + /* #define offsetof(TYPE, MEMBER) \ */ + /* ((unsigned) &((TYPE *)0)->MEMBER) */ + if (IS_ADDRESS_OF_OP(tree->right) + && IS_AST_OP (tree->right->left) + && tree->right->left->opval.op == PTR_OP + && IS_AST_OP (tree->right->left->left) + && tree->right->left->left->opval.op == CAST + && IS_AST_LIT_VALUE(tree->right->left->left->right)) + { + symbol *element = getStructElement ( + SPEC_STRUCT (LETYPE(tree->right->left)), + AST_SYMBOL(tree->right->left->right) + ); + + if (element) + { + tree->type = EX_VALUE; + tree->opval.val = valCastLiteral ( + LTYPE (tree), + element->offset + + floatFromVal (valFromType (RTYPE (tree->right->left->left))) + ); + + TTYPE (tree) = tree->opval.val->type; + TETYPE (tree) = getSpec (TTYPE (tree)); + tree->left = NULL; + tree->right = NULL; + return tree; + } + } + + /* if the right is a literal replace the tree */ + if (IS_LITERAL (RETYPE (tree))) + { + #if 0 + if (IS_PTR (LTYPE (tree)) && !IS_GENPTR (LTYPE (tree)) ) + { + /* rewrite (type *)litaddr + as &temp + and define type at litaddr temp + (but only if type's storage class is not generic) + */ + ast *newTree = newNode ('&', NULL, NULL); + symbol *sym; + + TTYPE (newTree) = LTYPE (tree); + TETYPE (newTree) = getSpec(LTYPE (tree)); + + /* define a global symbol at the casted address*/ + sym = newSymbol(genSymName (0), 0); + sym->type = LTYPE (tree)->next; + if (!sym->type) + sym->type = newLink (V_VOID); + sym->etype = getSpec(sym->type); + SPEC_SCLS (sym->etype) = sclsFromPtr (LTYPE (tree)); + sym->lineDef = tree->lineno; + sym->cdef = 1; + sym->isref = 1; + SPEC_STAT (sym->etype) = 1; + SPEC_ADDR(sym->etype) = floatFromVal (valFromType (RTYPE (tree))); + SPEC_ABSA(sym->etype) = 1; + addSym (SymbolTab, sym, sym->name, 0, 0, 0); + allocGlobal (sym); + + newTree->left = newAst_VALUE(symbolVal(sym)); + newTree->left->filename = tree->filename; + newTree->left->lineno = tree->lineno; + LTYPE (newTree) = sym->type; + LETYPE (newTree) = sym->etype; + LLVAL (newTree) = 1; + LRVAL (newTree) = 0; + TLVAL (newTree) = 1; + return newTree; + } + #endif + if (!IS_PTR (LTYPE (tree))) + { + tree->type = EX_VALUE; + tree->opval.val = + valCastLiteral (LTYPE (tree), floatFromVal (valFromType (RTYPE (tree)))); + TTYPE (tree) = tree->opval.val->type; + tree->left = NULL; + tree->right = NULL; + tree->values.literalFromCast = 1; + TETYPE (tree) = getSpec (TTYPE (tree)); + return tree; + } + } + if (IS_GENPTR (LTYPE (tree)) && IS_PTR (RTYPE (tree)) && !IS_GENPTR (RTYPE (tree)) && (resultType != RESULT_TYPE_GPTR)) + { + DCL_TYPE (LTYPE (tree)) = DCL_TYPE (RTYPE (tree)); + } + TTYPE (tree) = LTYPE (tree); + LRVAL (tree) = 1; + +#endif + TETYPE (tree) = getSpec (TTYPE (tree)); + + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* logical &&, || */ + /*----------------------------*/ + case AND_OP: + case OR_OP: + /* each must be arithmetic type or be a pointer */ + if (!IS_PTR (LTYPE (tree)) && + !IS_ARRAY (LTYPE (tree)) && + !IS_INTEGRAL (LTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_COMPARE_OP); + goto errorTreeReturn; + } + + if (!IS_PTR (RTYPE (tree)) && + !IS_ARRAY (RTYPE (tree)) && + !IS_INTEGRAL (RTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_COMPARE_OP); + goto errorTreeReturn; + } + /* if they are both literal then */ + /* rewrite the tree */ + if (IS_LITERAL (RTYPE (tree)) && + IS_LITERAL (LTYPE (tree))) + { + tree->type = EX_VALUE; + tree->opval.val = valLogicAndOr (valFromType (LTYPE (tree)), + valFromType (RTYPE (tree)), + tree->opval.op); + tree->right = tree->left = NULL; + TETYPE (tree) = getSpec (TTYPE (tree) = + tree->opval.val->type); + return tree; + } + LRVAL (tree) = RRVAL (tree) = 1; + TTYPE (tree) = TETYPE (tree) = (resultTypeProp == RESULT_TYPE_BIT) ? newBoolLink() :newCharLink(); + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* comparison operators */ + /*----------------------------*/ + case '>': + case '<': + case LE_OP: + case GE_OP: + case EQ_OP: + case NE_OP: + { + ast *lt = optimizeCompare (tree); + + if (tree != lt) + return lt; + } + + /* if they are pointers they must be castable */ + if (IS_PTR (LTYPE (tree)) && IS_PTR (RTYPE (tree))) + { + if (tree->opval.op==EQ_OP && + !IS_GENPTR(LTYPE(tree)) && IS_GENPTR(RTYPE(tree))) { + // we cannot cast a gptr to a !gptr: switch the leaves + struct ast *s=tree->left; + tree->left=tree->right; + tree->right=s; + } + if (compareType (LTYPE (tree), RTYPE (tree)) == 0) + { + werrorfl (tree->filename, tree->lineno, E_COMPARE_OP); + fprintf (stderr, "comparing type "); + printTypeChain (LTYPE (tree), stderr); + fprintf (stderr, "to type "); + printTypeChain (RTYPE (tree), stderr); + fprintf (stderr, "\n"); + goto errorTreeReturn; + } + } + /* else they should be promotable to one another */ + else + { + if (!((IS_PTR (LTYPE (tree)) && IS_LITERAL (RTYPE (tree))) || + (IS_PTR (RTYPE (tree)) && IS_LITERAL (LTYPE (tree))))) + + if (compareType (LTYPE (tree), RTYPE (tree)) == 0) + { + werrorfl (tree->filename, tree->lineno, E_COMPARE_OP); + fprintf (stderr, "comparing type "); + printTypeChain (LTYPE (tree), stderr); + fprintf (stderr, "to type "); + printTypeChain (RTYPE (tree), stderr); + fprintf (stderr, "\n"); + goto errorTreeReturn; + } + } + + { + CCR_RESULT ccr_result = CCR_OK; + + /* if left is integral and right is literal + then check constant range */ + if (IS_INTEGRAL(LTYPE(tree)) && IS_LITERAL(RTYPE(tree))) + ccr_result = checkConstantRange (LTYPE (tree), RTYPE (tree), + tree->opval.op, FALSE); + if (ccr_result == CCR_OK && + IS_INTEGRAL(RTYPE(tree)) && IS_LITERAL(LTYPE(tree))) + ccr_result = checkConstantRange (RTYPE (tree), LTYPE (tree), + tree->opval.op, TRUE); + switch (ccr_result) + { + case CCR_ALWAYS_TRUE: + case CCR_ALWAYS_FALSE: + if (!options.lessPedantic) + werrorfl (tree->filename, tree->lineno, W_COMP_RANGE, + ccr_result == CCR_ALWAYS_TRUE ? "true" : "false"); + return decorateType (newAst_VALUE (constCharVal ((unsigned char)(ccr_result == CCR_ALWAYS_TRUE))), resultType); + case CCR_OK: + default: + break; + } + } + + /* if (unsigned value) > 0 then '(unsigned value) ? 1 : 0' */ + if (tree->opval.op == '>' && + SPEC_USIGN(LETYPE(tree)) && + IS_LITERAL(RTYPE(tree)) && + ((int) ulFromVal (valFromType (RETYPE (tree)))) == 0) + { + if ((resultType == RESULT_TYPE_IFX) || (resultType == RESULT_TYPE_BIT)) + { + /* the parent is an ifx: */ + /* if (unsigned value) */ + return tree->left; + } + + /* (unsigned value) ? 1 : 0 */ + tree->opval.op = '?'; + tree->right = newNode (':', + newAst_VALUE (constCharVal (1)), + tree->right); /* val 0 */ + tree->right->filename = tree->filename; + tree->right->lineno = tree->lineno; + tree->right->left->filename = tree->filename; + tree->right->left->lineno = tree->lineno; + tree->decorated = 0; + return decorateType (tree, resultType); + } + + /* 'ifx (op == 0)' -> 'ifx (!(op))' */ + if (IS_LITERAL(RTYPE(tree)) && + floatFromVal (valFromType (RETYPE (tree))) == 0 && + tree->opval.op == EQ_OP && + (resultType == RESULT_TYPE_IFX || resultType == RESULT_TYPE_BIT)) + { + tree->opval.op = '!'; + tree->right = NULL; + tree->decorated = 0; + return decorateType (tree, resultType); + } + + /* if they are both literal then */ + /* rewrite the tree */ + if (IS_LITERAL (RTYPE (tree)) && + IS_LITERAL (LTYPE (tree))) + { + tree->type = EX_VALUE; + tree->opval.val = valCompare (valFromType (LETYPE (tree)), + valFromType (RETYPE (tree)), + tree->opval.op); + tree->right = tree->left = NULL; + TETYPE (tree) = getSpec (TTYPE (tree) = + tree->opval.val->type); + return tree; + } + + /* if one is 'signed char ' and the other one is 'unsigned char' */ + /* it's necessary to promote to int */ + if (IS_CHAR (RTYPE (tree)) && IS_CHAR (LTYPE (tree)) && + (IS_UNSIGNED (RTYPE (tree)) != IS_UNSIGNED (LTYPE (tree)))) + { + /* Literals are 'optimized' to 'unsigned char'. Try to figure out, + if it's possible to use a 'signed char' */ + + /* is left a 'unsigned char'? */ + if (IS_LITERAL (RTYPE (tree)) && IS_UNSIGNED (RTYPE (tree)) && + /* the value range of a 'unsigned char' is 0...255; + if the actual value is < 128 it can be changed to signed */ + (int) ulFromVal (valFromType (RETYPE (tree))) < 128) + { + /* now we've got 2 'signed char'! */ + SPEC_USIGN (RETYPE (tree)) = 0; + } + /* same test for the left operand: */ + else if (IS_LITERAL (LTYPE (tree)) && IS_UNSIGNED (LTYPE (tree)) && + (int) ulFromVal (valFromType (LETYPE (tree))) < 128) + { + SPEC_USIGN (LETYPE (tree)) = 0; + } + else + { + werrorfl (tree->filename, tree->lineno, W_CMP_SU_CHAR); + tree->left = addCast (tree->left , RESULT_TYPE_INT, TRUE); + tree->right = addCast (tree->right, RESULT_TYPE_INT, TRUE); + } + } + + LRVAL (tree) = RRVAL (tree) = 1; + TTYPE (tree) = TETYPE (tree) = (resultType == RESULT_TYPE_BIT) ? newBoolLink() :newCharLink(); + + /* condition transformations */ + { + unsigned transformedOp = 0; + + switch (tree->opval.op) + { + case '<': /* transform (a < b) to !(a >= b) */ + if (port->lt_nge) + transformedOp = GE_OP; + break; + case '>': /* transform (a > b) to !(a <= b) */ + if (port->gt_nle) + transformedOp = LE_OP; + break; + case LE_OP: /* transform (a <= b) to !(a > b) */ + if (port->le_ngt) + transformedOp = '>'; + break; + case GE_OP: /* transform (a >= b) to !(a < b) */ + if (port->ge_nlt) + transformedOp = '<'; + break; + case NE_OP: /* transform (a != b) to !(a == b) */ + if (port->ne_neq) + transformedOp = EQ_OP; + break; + case EQ_OP: /* transform (a == b) to !(a != b) */ + if (port->eq_nne) + transformedOp = NE_OP; + break; + default: + break; + } + if (transformedOp) + { + tree->opval.op = transformedOp; + tree->decorated = 0; + tree = newNode ('!', tree, NULL); + tree->filename = tree->left->filename; + tree->lineno = tree->left->lineno; + return decorateType (tree, resultType); + } + } + + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* sizeof */ + /*----------------------------*/ + case SIZEOF: /* evaluate wihout code generation */ + /* change the type to a integer */ + { + int size = getSize (tree->right->ftype); + + SNPRINTF(buffer, sizeof(buffer), "%d", size); + if (!size && !IS_VOID(tree->right->ftype)) + werrorfl (tree->filename, tree->lineno, E_SIZEOF_INCOMPLETE_TYPE); + } + tree->type = EX_VALUE; + tree->opval.val = constVal (buffer); + tree->right = tree->left = NULL; + TETYPE (tree) = getSpec (TTYPE (tree) = + tree->opval.val->type); + + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* typeof */ + /*----------------------------*/ + case TYPEOF: + /* return typeof enum value */ + tree->type = EX_VALUE; + { + int typeofv = 0; + if (IS_SPEC(tree->right->ftype)) { + switch (SPEC_NOUN(tree->right->ftype)) { + case V_INT: + if (SPEC_LONG(tree->right->ftype)) typeofv = TYPEOF_LONG; + else typeofv = TYPEOF_INT; + break; + case V_FLOAT: + typeofv = TYPEOF_FLOAT; + break; + case V_FIXED16X16: + typeofv = TYPEOF_FIXED16X16; + break; + case V_CHAR: + typeofv = TYPEOF_CHAR; + break; + case V_VOID: + typeofv = TYPEOF_VOID; + break; + case V_STRUCT: + typeofv = TYPEOF_STRUCT; + break; + case V_BITFIELD: + typeofv = TYPEOF_BITFIELD; + break; + case V_BIT: + typeofv = TYPEOF_BIT; + break; + case V_SBIT: + typeofv = TYPEOF_SBIT; + break; + default: + break; + } + } else { + switch (DCL_TYPE(tree->right->ftype)) { + case POINTER: + typeofv = TYPEOF_POINTER; + break; + case FPOINTER: + typeofv = TYPEOF_FPOINTER; + break; + case CPOINTER: + typeofv = TYPEOF_CPOINTER; + break; + case GPOINTER: + typeofv = TYPEOF_GPOINTER; + break; + case PPOINTER: + typeofv = TYPEOF_PPOINTER; + break; + case IPOINTER: + typeofv = TYPEOF_IPOINTER; + break; + case ARRAY: + typeofv = TYPEOF_ARRAY; + break; + case FUNCTION: + typeofv = TYPEOF_FUNCTION; + break; + default: + break; + } + } + SNPRINTF (buffer, sizeof(buffer), "%d", typeofv); + tree->opval.val = constVal (buffer); + tree->right = tree->left = NULL; + TETYPE (tree) = getSpec (TTYPE (tree) = + tree->opval.val->type); + } + return tree; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* conditional operator '?' */ + /*----------------------------*/ + case '?': + /* the type is value of the colon operator (on the right) */ + assert (IS_COLON_OP (tree->right)); + + /* If already known then replace the tree : optimizer will do it + but faster to do it here. If done before decorating tree->right + this can save generating unused const strings. */ + if (IS_LITERAL (LTYPE (tree))) + { + if (((int) ulFromVal (valFromType (LETYPE (tree)))) != 0) + return decorateType (tree->right->left, resultTypeProp); + else + return decorateType (tree->right->right, resultTypeProp); + } + + tree->right = decorateType (tree->right, resultTypeProp); + + if (IS_AST_LIT_VALUE (tree->right->left) && IS_AST_LIT_VALUE (tree->right->right) && + ((resultType == RESULT_TYPE_IFX) || (resultType == RESULT_TYPE_BIT))) + { + double valTrue = AST_FLOAT_VALUE (tree->right->left); + double valFalse = AST_FLOAT_VALUE (tree->right->right); + + if ((valTrue != 0) && (valFalse == 0)) + { + /* assign cond to result */ + tree->left->decorated = 0; + return decorateType (tree->left, resultTypeProp); + } + else if ((valTrue == 0) && (valFalse != 0)) + { + /* assign !cond to result */ + tree->opval.op = '!'; + tree->decorated = 0; + tree->right = NULL; + return decorateType (tree, resultTypeProp); + } + else + { + /* they have the same boolean value, make them equal */ + tree->right->left = tree->right->right; + } + } + + /* if they are equal then replace the tree */ + if (isAstEqual (tree->right->left, tree->right->right)) + { + return tree->right->left; + } + + TTYPE (tree) = RTYPE (tree); + TETYPE (tree) = getSpec (TTYPE (tree)); + return tree; + + case ':': + /* if they don't match we have a problem */ + if ((compareType (LTYPE (tree), RTYPE (tree)) == 0) && + (compareType (RTYPE (tree), LTYPE (tree)) == 0)) + { + werrorfl (tree->filename, tree->lineno, E_TYPE_MISMATCH, "conditional operator", " "); + goto errorTreeReturn; + } + + TTYPE (tree) = computeType (LTYPE (tree), RTYPE (tree), + resultType, tree->opval.op); + TETYPE (tree) = getSpec (TTYPE (tree)); + return tree; + + +#if 0 // assignment operators are converted by the parser + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* assignment operators */ + /*----------------------------*/ + case MUL_ASSIGN: + case DIV_ASSIGN: + /* for these it must be both must be integral */ + if (!IS_ARITHMETIC (LTYPE (tree)) || + !IS_ARITHMETIC (RTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_OPS_INTEGRAL); + goto errorTreeReturn; + } + RRVAL (tree) = 1; + TETYPE (tree) = getSpec (TTYPE (tree) = LTYPE (tree)); + + if (!tree->initMode && IS_CONSTANT (LTYPE (tree))) + werrorfl (tree->filename, tree->lineno, E_CODE_WRITE, tree->opval.op==MUL_ASSIGN ? "*=" : "/="); + + if (LRVAL (tree)) + { + werrorfl (tree->filename, tree->lineno, E_LVALUE_REQUIRED, tree->opval.op==MUL_ASSIGN ? "*=" : "/="); + goto errorTreeReturn; + } + LLVAL (tree) = 1; + + return tree; + + case AND_ASSIGN: + case OR_ASSIGN: + case XOR_ASSIGN: + case RIGHT_ASSIGN: + case LEFT_ASSIGN: + /* for these it must be both must be integral */ + if (!IS_INTEGRAL (LTYPE (tree)) || + !IS_INTEGRAL (RTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_OPS_INTEGRAL); + goto errorTreeReturn; + } + RRVAL (tree) = 1; + TETYPE (tree) = getSpec (TTYPE (tree) = LTYPE (tree)); + + if (!tree->initMode && IS_CONSTANT (LETYPE (tree))) + werrorfl (tree->filename, tree->lineno, E_CODE_WRITE, "&= or |= or ^= or >>= or <<="); + + if (LRVAL (tree)) + { + werrorfl (tree->filename, tree->lineno, E_LVALUE_REQUIRED, "&= or |= or ^= or >>= or <<="); + goto errorTreeReturn; + } + LLVAL (tree) = 1; + + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* -= operator */ + /*----------------------------*/ + case SUB_ASSIGN: + if (!(IS_PTR (LTYPE (tree)) || + IS_ARITHMETIC (LTYPE (tree)))) + { + werrorfl (tree->filename, tree->lineno, E_PLUS_INVALID, "-="); + goto errorTreeReturn; + } + + if (!(IS_PTR (RTYPE (tree)) || + IS_ARITHMETIC (RTYPE (tree)))) + { + werrorfl (tree->filename, tree->lineno, E_PLUS_INVALID, "-="); + goto errorTreeReturn; + } + RRVAL (tree) = 1; + TETYPE (tree) = getSpec (TTYPE (tree) = + computeType (LTYPE (tree), + RTYPE (tree), + RESULT_TYPE_NOPROM, + tree->opval.op)); + + if (!tree->initMode && IS_CONSTANT (LETYPE (tree))) + werrorfl (tree->filename, tree->lineno, E_CODE_WRITE, "-="); + + if (LRVAL (tree)) + { + werrorfl (tree->filename, tree->lineno, E_LVALUE_REQUIRED, "-="); + goto errorTreeReturn; + } + LLVAL (tree) = 1; + + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* += operator */ + /*----------------------------*/ + case ADD_ASSIGN: + /* this is not a unary operation */ + /* if both pointers then problem */ + if (IS_PTR (LTYPE (tree)) && IS_PTR (RTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_PTR_PLUS_PTR); + goto errorTreeReturn; + } + + if (!IS_ARITHMETIC (LTYPE (tree)) && !IS_PTR (LTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_PLUS_INVALID, "+="); + goto errorTreeReturn; + } + + if (!IS_ARITHMETIC (RTYPE (tree)) && !IS_PTR (RTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_PLUS_INVALID, "+="); + goto errorTreeReturn; + } + RRVAL (tree) = 1; + TETYPE (tree) = getSpec (TTYPE (tree) = + computeType (LTYPE (tree), + RTYPE (tree), + RESULT_TYPE_NOPROM, + tree->opval.op)); + + if (!tree->initMode && IS_CONSTANT (LETYPE (tree))) + werrorfl (tree->filename, tree->lineno, E_CODE_WRITE, "+="); + + if (LRVAL (tree)) + { + werrorfl (tree->filename, tree->lineno, E_LVALUE_REQUIRED, "+="); + goto errorTreeReturn; + } + + tree->right = decorateType (newNode ('+', copyAst (tree->left), tree->right), RESULT_TYPE_NONE); + tree->opval.op = '='; + + return tree; +#endif + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* straight assignemnt */ + /*----------------------------*/ + case '=': + /* cannot be an aggregate */ + if (IS_AGGREGATE (LTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_AGGR_ASSIGN); + goto errorTreeReturn; + } + + /* they should either match or be castable */ + if (compareType (LTYPE (tree), RTYPE (tree)) == 0) + { + werrorfl (tree->filename, tree->lineno, E_TYPE_MISMATCH, "assignment", " "); + printFromToType(RTYPE(tree),LTYPE(tree)); + } + + /* if the left side of the tree is of type void + then report error */ + if (IS_VOID (LTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_CAST_ZERO); + printFromToType(RTYPE(tree), LTYPE(tree)); + } + + TETYPE (tree) = getSpec (TTYPE (tree) = LTYPE (tree)); + RRVAL (tree) = 1; + LLVAL (tree) = 1; + if (!tree->initMode ) { + if (IS_CONSTANT(LTYPE(tree))) + werrorfl (tree->filename, tree->lineno, E_CODE_WRITE, "="); + } + if (LRVAL (tree)) + { + werrorfl (tree->filename, tree->lineno, E_LVALUE_REQUIRED, "="); + goto errorTreeReturn; + } + + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* comma operator */ + /*----------------------------*/ + case ',': + TETYPE (tree) = getSpec (TTYPE (tree) = RTYPE (tree)); + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* function call */ + /*----------------------------*/ + case CALL: + + /* undo any explicit pointer derefernce; PCALL will handle it instead */ + if (IS_FUNC (LTYPE (tree)) && tree->left->type == EX_OP) + { + if (tree->left->opval.op == '*' && !tree->left->right) + tree->left = tree->left->left; + } + + /* require a function or pointer to function */ + if (!IS_FUNC (LTYPE (tree)) && !IS_FUNCPTR (LTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_FUNCTION_EXPECTED); + goto errorTreeReturn; + } + + /* if there are parms, make sure that + parms are decorate / process / reverse only once */ + if (!tree->right || + !tree->right->decorated) + { + sym_link *functype; + parmNumber = 1; + + if (IS_FUNCPTR (LTYPE (tree))) + { + functype = LTYPE (tree)->next; + processFuncPtrArgs (functype); + } + else + functype = LTYPE (tree); + + if (processParms (tree->left, FUNC_ARGS(functype), + &tree->right, &parmNumber, TRUE)) + { + goto errorTreeReturn; + } + + if ((options.stackAuto || IFFUNC_ISREENT (functype)) && + !IFFUNC_ISBUILTIN(functype)) + { + reverseParms (tree->right); + } + + TTYPE (tree) = functype->next; + TETYPE (tree) = getSpec (TTYPE (tree)); + } + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* return statement */ + /*----------------------------*/ + case RETURN: + if (!tree->right) + goto voidcheck; + + if (compareType (currFunc->type->next, RTYPE (tree)) == 0) + { + werrorfl (tree->filename, tree->lineno, W_RETURN_MISMATCH); + printFromToType (RTYPE(tree), currFunc->type->next); + goto errorTreeReturn; + } + + if (IS_VOID (currFunc->type->next) + && tree->right && + !IS_VOID (RTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_FUNC_VOID); + goto errorTreeReturn; + } + + /* if there is going to be a casting required then add it */ + if (compareType (currFunc->type->next, RTYPE (tree)) < 0) + { + tree->right = + decorateType (newNode (CAST, + newAst_LINK (copyLinkChain (currFunc->type->next)), + tree->right), + IS_GENPTR (currFunc->type->next) ? RESULT_TYPE_GPTR : RESULT_TYPE_NONE); + } + + RRVAL (tree) = 1; + return tree; + + voidcheck: + + if (!IS_VOID (currFunc->type->next) && tree->right == NULL) + { + werrorfl (tree->filename, tree->lineno, W_VOID_FUNC, currFunc->name); + goto errorTreeReturn; + } + + TTYPE (tree) = TETYPE (tree) = NULL; + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* switch statement */ + /*----------------------------*/ + case SWITCH: + /* the switch value must be an integer */ + if (!IS_INTEGRAL (LTYPE (tree))) + { + werrorfl (tree->filename, tree->lineno, E_SWITCH_NON_INTEGER); + goto errorTreeReturn; + } + LRVAL (tree) = 1; + TTYPE (tree) = TETYPE (tree) = NULL; + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* ifx Statement */ + /*----------------------------*/ + case IFX: + tree->left = backPatchLabels (tree->left, + tree->trueLabel, + tree->falseLabel); + TTYPE (tree) = TETYPE (tree) = NULL; + return tree; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* for Statement */ + /*----------------------------*/ + case FOR: + + AST_FOR (tree, initExpr) = decorateType ( + resolveSymbols (AST_FOR (tree, initExpr)), RESULT_TYPE_NONE); + AST_FOR (tree, condExpr) = decorateType ( + resolveSymbols (AST_FOR (tree, condExpr)), RESULT_TYPE_NONE); + AST_FOR (tree, loopExpr) = decorateType ( + resolveSymbols (AST_FOR (tree, loopExpr)), RESULT_TYPE_NONE); + + /* if the for loop is reversible then + reverse it otherwise do what we normally + do */ + { + symbol *sym; + ast *init, *end; + + if (isLoopReversible (tree, &sym, &init, &end)) + return reverseLoop (tree, sym, init, end); + else + return decorateType (createFor (AST_FOR (tree, trueLabel), + AST_FOR (tree, continueLabel), + AST_FOR (tree, falseLabel), + AST_FOR (tree, condLabel), + AST_FOR (tree, initExpr), + AST_FOR (tree, condExpr), + AST_FOR (tree, loopExpr), + tree->left), RESULT_TYPE_NONE); + } + case PARAM: + werrorfl (tree->filename, tree->lineno, E_INTERNAL_ERROR, __FILE__, __LINE__, + "node PARAM shouldn't be processed here"); + /* but in processParams() */ + return tree; + default: + TTYPE (tree) = TETYPE (tree) = NULL; + return tree; + } + + /* some error found this tree will be killed */ +errorTreeReturn: + TTYPE (tree) = TETYPE (tree) = newCharLink (); + tree->opval.op = NULLOP; + tree->isError = 1; + + return tree; +} + +/*-----------------------------------------------------------------*/ +/* sizeofOp - processes size of operation */ +/*-----------------------------------------------------------------*/ +value * +sizeofOp (sym_link * type) +{ + char buff[10]; + int size; + + /* make sure the type is complete and sane */ + checkTypeSanity(type, "(sizeof)"); + + /* get the size and convert it to character */ + SNPRINTF (buff, sizeof(buff), "%d", size = getSize (type)); + if (!size && !IS_VOID(type)) + werror (E_SIZEOF_INCOMPLETE_TYPE); + + /* now convert into value */ + return constVal (buff); +} + + +#define IS_AND(ex) (ex->type == EX_OP && ex->opval.op == AND_OP ) +#define IS_OR(ex) (ex->type == EX_OP && ex->opval.op == OR_OP ) +#define IS_NOT(ex) (ex->type == EX_OP && ex->opval.op == '!' ) +#define IS_ANDORNOT(ex) (IS_AND(ex) || IS_OR(ex) || IS_NOT(ex)) +#define IS_IFX(ex) (ex->type == EX_OP && ex->opval.op == IFX ) +#define IS_LT(ex) (ex->type == EX_OP && ex->opval.op == '<' ) +#define IS_GT(ex) (ex->type == EX_OP && ex->opval.op == '>') + +/*-----------------------------------------------------------------*/ +/* backPatchLabels - change and or not operators to flow control */ +/*-----------------------------------------------------------------*/ +static ast * +backPatchLabels (ast * tree, symbol * trueLabel, symbol * falseLabel) +{ + + if (!tree) + return NULL; + + /* while-loops insert a label between the IFX and the condition, + therefore look behind the label too */ + if (tree->opval.op == LABEL && + tree->right && + IS_ANDORNOT (tree->right)) + { + tree->right = backPatchLabels (tree->right, trueLabel, falseLabel); + return tree; + } + + if (!(IS_ANDORNOT (tree))) + return tree; + + /* if this an and */ + if (IS_AND (tree)) + { + static int localLbl = 0; + symbol *localLabel; + + SNPRINTF(buffer, sizeof(buffer), "_andif_%d", localLbl++); + localLabel = newSymbol (buffer, NestLevel); + + tree->left = backPatchLabels (tree->left, localLabel, falseLabel); + + /* if left is already a IFX then just change the if true label in that */ + if (!IS_IFX (tree->left)) + tree->left = newIfxNode (tree->left, localLabel, falseLabel); + + tree->right = backPatchLabels (tree->right, trueLabel, falseLabel); + /* right is a IFX then just join */ + if (IS_IFX (tree->right)) + return newNode (NULLOP, tree->left, createLabel (localLabel, tree->right)); + + tree->right = createLabel (localLabel, tree->right); + tree->right = newIfxNode (tree->right, trueLabel, falseLabel); + + return newNode (NULLOP, tree->left, tree->right); + } + + /* if this is an or operation */ + if (IS_OR (tree)) + { + static int localLbl = 0; + symbol *localLabel; + + SNPRINTF(buffer, sizeof(buffer), "_orif_%d", localLbl++); + localLabel = newSymbol (buffer, NestLevel); + + tree->left = backPatchLabels (tree->left, trueLabel, localLabel); + + /* if left is already a IFX then just change the if true label in that */ + if (!IS_IFX (tree->left)) + tree->left = newIfxNode (tree->left, trueLabel, localLabel); + + tree->right = backPatchLabels (tree->right, trueLabel, falseLabel); + /* right is a IFX then just join */ + if (IS_IFX (tree->right)) + return newNode (NULLOP, tree->left, createLabel (localLabel, tree->right)); + + tree->right = createLabel (localLabel, tree->right); + tree->right = newIfxNode (tree->right, trueLabel, falseLabel); + + return newNode (NULLOP, tree->left, tree->right); + } + + /* change not */ + if (IS_NOT (tree)) + { + /* call with exchanged labels */ + tree->left = backPatchLabels (tree->left, falseLabel, trueLabel); + + /* if left isn't already a IFX */ + if (!IS_IFX (tree->left)) + { + tree->left = newNode (IFX, tree->left, NULL); + tree->left->trueLabel = falseLabel; + tree->left->falseLabel = trueLabel; + } + return tree->left; + } + + if (IS_IFX (tree)) + { + tree->trueLabel = trueLabel; + tree->falseLabel = falseLabel; + } + + return tree; +} + + +/*-----------------------------------------------------------------*/ +/* createBlock - create expression tree for block */ +/*-----------------------------------------------------------------*/ +ast * +createBlock (symbol * decl, ast * body) +{ + ast *ex; + + /* if the block has nothing */ + if (!body && !decl) + return NULL; + + ex = newNode (BLOCK, NULL, body); + ex->values.sym = decl; + + ex->level++; + ex->filename = NULL; + ex->lineno = 0; + return ex; +} + +/*-----------------------------------------------------------------*/ +/* createLabel - creates the expression tree for labels */ +/*-----------------------------------------------------------------*/ +ast * +createLabel (symbol * label, ast * stmnt) +{ + symbol *csym; + char name[SDCC_NAME_MAX + 1]; + ast *rValue; + + /* must create fresh symbol if the symbol name */ + /* exists in the symbol table, since there can */ + /* be a variable with the same name as the labl */ + if ((csym = findSym (SymbolTab, NULL, label->name)) && + (csym->level == label->level)) + label = newSymbol (label->name, label->level); + + /* change the name before putting it in add _ */ + SNPRINTF(name, sizeof(name), "%s", label->name); + + /* put the label in the LabelSymbol table */ + /* but first check if a label of the same */ + /* name exists */ + if ((csym = findSym (LabelTab, NULL, name))) + werror (E_DUPLICATE_LABEL, label->name); + else + addSym (LabelTab, label, name, label->level, 0, 0); + + label->isitmp = 1; + label->islbl = 1; + label->key = labelKey++; + rValue = newNode (LABEL, newAst_VALUE (symbolVal (label)), stmnt); + rValue->filename = NULL; + rValue->lineno = 0; + + return rValue; +} + +/*-----------------------------------------------------------------*/ +/* createCase - generates the parsetree for a case statement */ +/*-----------------------------------------------------------------*/ +ast * +createCase (ast * swStat, ast * caseVal, ast * stmnt) +{ + char caseLbl[SDCC_NAME_MAX + 1]; + ast *rexpr; + value *val; + + /* if the switch statement does not exist */ + /* then case is out of context */ + if (!swStat) + { + werrorfl (caseVal->filename, caseVal->lineno, E_CASE_CONTEXT); + return NULL; + } + + caseVal = decorateType (resolveSymbols (caseVal), RESULT_TYPE_NONE); + /* if not a constant then error */ + if (!IS_LITERAL (caseVal->ftype)) + { + werrorfl (caseVal->filename, caseVal->lineno, E_CASE_CONSTANT); + return NULL; + } + + /* if not a integer than error */ + if (!IS_INTEGRAL (caseVal->ftype)) + { + werrorfl (caseVal->filename, caseVal->lineno, E_CASE_NON_INTEGER); + return NULL; + } + + /* find the end of the switch values chain */ + if (!(val = swStat->values.switchVals.swVals)) + swStat->values.switchVals.swVals = caseVal->opval.val; + else + { + /* also order the cases according to value */ + value *pval = NULL; + int cVal = (int) ulFromVal (caseVal->opval.val); + while (val && (int) ulFromVal (val) < cVal) + { + pval = val; + val = val->next; + } + + /* if we reached the end then */ + if (!val) + { + pval->next = caseVal->opval.val; + } + else if ((int) ulFromVal (val) == cVal) + { + werrorfl (caseVal->filename, caseVal->lineno, E_DUPLICATE_LABEL, + "case"); + return NULL; + } + else + { + /* we found a value greater than */ + /* the current value we must add this */ + /* before the value */ + caseVal->opval.val->next = val; + + /* if this was the first in chain */ + if (swStat->values.switchVals.swVals == val) + swStat->values.switchVals.swVals = + caseVal->opval.val; + else + pval->next = caseVal->opval.val; + } + + } + + /* create the case label */ + SNPRINTF(caseLbl, sizeof(caseLbl), + "_case_%d_%d", + swStat->values.switchVals.swNum, + (int) ulFromVal (caseVal->opval.val)); + + rexpr = createLabel (newSymbol (caseLbl, 0), stmnt); + rexpr->filename = 0; + rexpr->lineno = 0; + return rexpr; +} + +/*-----------------------------------------------------------------*/ +/* createDefault - creates the parse tree for the default statement */ +/*-----------------------------------------------------------------*/ +ast * +createDefault (ast * swStat, ast * defaultVal, ast * stmnt) +{ + char defLbl[SDCC_NAME_MAX + 1]; + + /* if the switch statement does not exist */ + /* then case is out of context */ + if (!swStat) + { + werrorfl (defaultVal->filename, defaultVal->lineno, E_CASE_CONTEXT); + return NULL; + } + + if (swStat->values.switchVals.swDefault) + { + werrorfl (defaultVal->filename, defaultVal->lineno, E_DUPLICATE_LABEL, + "default"); + return NULL; + } + + /* turn on the default flag */ + swStat->values.switchVals.swDefault = 1; + + /* create the label */ + SNPRINTF (defLbl, sizeof(defLbl), + "_default_%d", swStat->values.switchVals.swNum); + return createLabel (newSymbol (defLbl, 0), stmnt); +} + +/*-----------------------------------------------------------------*/ +/* createIf - creates the parsetree for the if statement */ +/*-----------------------------------------------------------------*/ +ast * +createIf (ast * condAst, ast * ifBody, ast * elseBody) +{ + static int Lblnum = 0; + ast *ifTree; + symbol *ifTrue, *ifFalse, *ifEnd; + + /* if neither exists */ + if (!elseBody && !ifBody) { + // if there are no side effects (i++, j() etc) + if (!hasSEFcalls(condAst)) { + return condAst; + } + } + + /* create the labels */ + SNPRINTF (buffer, sizeof(buffer), "_iffalse_%d", Lblnum); + ifFalse = newSymbol (buffer, NestLevel); + /* if no else body then end == false */ + if (!elseBody) + ifEnd = ifFalse; + else + { + SNPRINTF(buffer, sizeof(buffer), "_ifend_%d", Lblnum); + ifEnd = newSymbol (buffer, NestLevel); + } + + SNPRINTF (buffer, sizeof(buffer), "_iftrue_%d", Lblnum); + ifTrue = newSymbol (buffer, NestLevel); + + Lblnum++; + + /* attach the ifTrue label to the top of it body */ + ifBody = createLabel (ifTrue, ifBody); + /* attach a goto end to the ifBody if else is present */ + if (elseBody) + { + ifBody = newNode (NULLOP, ifBody, + newNode (GOTO, + newAst_VALUE (symbolVal (ifEnd)), + NULL)); + /* put the elseLabel on the else body */ + elseBody = createLabel (ifFalse, elseBody); + /* out the end at the end of the body */ + elseBody = newNode (NULLOP, + elseBody, + createLabel (ifEnd, NULL)); + } + else + { + ifBody = newNode (NULLOP, ifBody, + createLabel (ifFalse, NULL)); + } + condAst = backPatchLabels (condAst, ifTrue, ifFalse); + if (IS_IFX (condAst)) + ifTree = condAst; + else + ifTree = newIfxNode (condAst, ifTrue, ifFalse); + + return newNode (NULLOP, ifTree, + newNode (NULLOP, ifBody, elseBody)); + +} + +/*-----------------------------------------------------------------*/ +/* createDo - creates parse tree for do */ +/* _dobody_n: */ +/* statements */ +/* _docontinue_n: */ +/* condition_expression +-> trueLabel -> _dobody_n */ +/* | */ +/* +-> falseLabel-> _dobreak_n */ +/* _dobreak_n: */ +/*-----------------------------------------------------------------*/ +ast * +createDo (symbol * trueLabel, symbol * continueLabel, + symbol * falseLabel, ast * condAst, ast * doBody) +{ + ast *doTree; + + + /* if the body does not exist then it is simple */ + if (!doBody) + { + condAst = backPatchLabels (condAst, continueLabel, falseLabel); + doTree = (IS_IFX (condAst) ? createLabel (continueLabel, condAst) + : newNode (IFX, createLabel (continueLabel, condAst), NULL)); + doTree->trueLabel = continueLabel; + doTree->falseLabel = NULL; + + doTree = newNode (NULLOP, doTree, createLabel (falseLabel, NULL)); + return doTree; + } + + /* otherwise we have a body */ + condAst = backPatchLabels (condAst, trueLabel, falseLabel); + + /* attach the body label to the top */ + doBody = createLabel (trueLabel, doBody); + /* attach the continue label to end of body */ + doBody = newNode (NULLOP, doBody, + createLabel (continueLabel, NULL)); + + /* now put the break label at the end */ + if (IS_IFX (condAst)) + doTree = condAst; + else + doTree = newIfxNode (condAst, trueLabel, falseLabel); + + doTree = newNode (NULLOP, doTree, createLabel (falseLabel, NULL)); + + /* putting it together */ + return newNode (NULLOP, doBody, doTree); +} + +/*-----------------------------------------------------------------*/ +/* createFor - creates parse tree for 'for' statement */ +/* initExpr */ +/* _forcond_n: */ +/* condExpr +-> trueLabel -> _forbody_n */ +/* | */ +/* +-> falseLabel-> _forbreak_n */ +/* _forbody_n: */ +/* statements */ +/* _forcontinue_n: */ +/* loopExpr */ +/* goto _forcond_n ; */ +/* _forbreak_n: */ +/*-----------------------------------------------------------------*/ +ast * +createFor (symbol * trueLabel, symbol * continueLabel, + symbol * falseLabel, symbol * condLabel, + ast * initExpr, ast * condExpr, ast * loopExpr, + ast * forBody) +{ + ast *forTree; + + /* if loopexpression not present then we can generate it */ + /* the same way as a while */ + if (!loopExpr) + return newNode (NULLOP, initExpr, + createWhile (trueLabel, continueLabel, + falseLabel, condExpr, forBody)); + /* vanilla for statement */ + condExpr = backPatchLabels (condExpr, trueLabel, falseLabel); + + if (condExpr && !IS_IFX (condExpr)) + condExpr = newIfxNode (condExpr, trueLabel, falseLabel); + + + /* attach condition label to condition */ + condExpr = createLabel (condLabel, condExpr); + + /* attach body label to body */ + forBody = createLabel (trueLabel, forBody); + + /* attach continue to forLoop expression & attach */ + /* goto the forcond @ and of loopExpression */ + loopExpr = createLabel (continueLabel, + newNode (NULLOP, + loopExpr, + newNode (GOTO, + newAst_VALUE (symbolVal (condLabel)), + NULL))); + /* now start putting them together */ + forTree = newNode (NULLOP, initExpr, condExpr); + forTree = newNode (NULLOP, forTree, forBody); + forTree = newNode (NULLOP, forTree, loopExpr); + /* finally add the break label */ + forTree = newNode (NULLOP, forTree, + createLabel (falseLabel, NULL)); + return forTree; +} + +/*-----------------------------------------------------------------*/ +/* createWhile - creates parse tree for while statement */ +/* the while statement will be created as follows */ +/* */ +/* _while_continue_n: */ +/* condition_expression +-> trueLabel -> _while_boby_n */ +/* | */ +/* +-> falseLabel -> _while_break_n */ +/* _while_body_n: */ +/* statements */ +/* goto _while_continue_n */ +/* _while_break_n: */ +/*-----------------------------------------------------------------*/ +ast * +createWhile (symbol * trueLabel, symbol * continueLabel, + symbol * falseLabel, ast * condExpr, ast * whileBody) +{ + ast *whileTree; + + /* put the continue label */ + condExpr = backPatchLabels (condExpr, trueLabel, falseLabel); + condExpr = createLabel (continueLabel, condExpr); + condExpr->filename = NULL; + condExpr->lineno = 0; + + /* put the body label in front of the body */ + whileBody = createLabel (trueLabel, whileBody); + whileBody->filename = NULL; + whileBody->lineno = 0; + /* put a jump to continue at the end of the body */ + /* and put break label at the end of the body */ + whileBody = newNode (NULLOP, + whileBody, + newNode (GOTO, + newAst_VALUE (symbolVal (continueLabel)), + createLabel (falseLabel, NULL))); + + /* put it all together */ + if (IS_IFX (condExpr)) + whileTree = condExpr; + else + { + whileTree = newNode (IFX, condExpr, NULL); + /* put the true & false labels in place */ + whileTree->trueLabel = trueLabel; + whileTree->falseLabel = falseLabel; + } + + return newNode (NULLOP, whileTree, whileBody); +} + +/*-----------------------------------------------------------------*/ +/* isShiftRightLitVal _BitAndLitVal - helper function */ +/*-----------------------------------------------------------------*/ +static ast * +isShiftRightLitVal_BitAndLitVal (ast * tree) +{ + /* if this is not a bit and */ + if (!IS_BITAND (tree)) + return NULL; + + /* will look for tree of the form + ( expr >> litval2) & litval1 */ + if (!IS_AST_LIT_VALUE (tree->right)) + return NULL; + + if (!IS_RIGHT_OP (tree->left)) + return NULL; + + if (!IS_AST_LIT_VALUE (tree->left->right)) + return NULL; + + return tree->left->left; +} + +/*-----------------------------------------------------------------*/ +/* isBitAndPowOf2 - helper function */ +/*-----------------------------------------------------------------*/ +static int +isBitAndPow2 (ast * tree) +{ + /* if this is not a bit and */ + if (!IS_BITAND (tree)) + return -1; + + /* will look for tree of the form + ( expr & (1 << litval) */ + if (!IS_AST_LIT_VALUE (tree->right)) + return -1; + + return powof2 (AST_ULONG_VALUE (tree->right)); +} + +/*-----------------------------------------------------------------*/ +/* optimizeGetHbit - get highest order bit of the expression */ +/*-----------------------------------------------------------------*/ +ast * +optimizeGetHbit (ast * tree, RESULT_TYPE resultType) +{ + unsigned int i, j; + ast * expr; + + expr = isShiftRightLitVal_BitAndLitVal(tree); + if (expr) + { + if ((AST_ULONG_VALUE (tree->right) != 1) || + ((i = AST_ULONG_VALUE (tree->left->right)) != + (j = (getSize (TTYPE (expr)) * 8 - 1)))) + expr = NULL; + } + if (!expr && (resultType == RESULT_TYPE_BIT)) + { + expr = tree->left; + if (isBitAndPow2 (tree) != (signed)getSize (TTYPE (expr)) * 8 - 1) + expr = NULL; + } + if (!expr) + return tree; + + /* make sure the port supports GETHBIT */ + if (port->hasExtBitOp + && !port->hasExtBitOp(GETHBIT, getSize (TTYPE (expr)))) + return tree; + + return decorateType (newNode (GETHBIT, expr, NULL), RESULT_TYPE_NONE); +} + +/*-----------------------------------------------------------------*/ +/* optimizeGetAbit - get a single bit of the expression */ +/*-----------------------------------------------------------------*/ +ast * +optimizeGetAbit (ast * tree, RESULT_TYPE resultType) +{ + ast * expr; + ast * count = NULL; + + expr = isShiftRightLitVal_BitAndLitVal(tree); + if (expr) + { + if (AST_ULONG_VALUE (tree->right) != 1) + expr = NULL; + count = tree->left->right; + } + if (!expr && (resultType == RESULT_TYPE_BIT)) + { + int p2 = isBitAndPow2 (tree); + if (p2 >= 0) + { + expr = tree->left; + count = newAst_VALUE (valueFromLit (p2)); + } + } + if (!expr) + return tree; + + /* make sure the port supports GETABIT */ + if (port->hasExtBitOp + && !port->hasExtBitOp(GETABIT, getSize (TTYPE (expr)))) + return tree; + + return decorateType (newNode (GETABIT, expr, count), RESULT_TYPE_NONE); + +} + +/*-----------------------------------------------------------------*/ +/* optimizeGetByte - get a byte of the expression */ +/*-----------------------------------------------------------------*/ +ast * +optimizeGetByte (ast * tree, RESULT_TYPE resultType) +{ + unsigned int i = 0; + ast * expr; + ast * count = NULL; + + expr = isShiftRightLitVal_BitAndLitVal(tree); + if (expr) + { + i = AST_ULONG_VALUE (tree->left->right); + count = tree->left->right; + if (AST_ULONG_VALUE (tree->right) != 0xFF) + expr = NULL; + } + if (!expr && resultType == RESULT_TYPE_CHAR) + { + /* if this is a right shift over a multiple of 8 */ + if (IS_RIGHT_OP (tree) && IS_AST_LIT_VALUE (tree->right)) + { + i = AST_ULONG_VALUE (tree->right); + count = tree->right; + expr = tree->left; + } + } + if (!expr || (i == 0) || (i % 8) || (i >= getSize (TTYPE (expr)) * 8)) + return tree; + + /* make sure the port supports GETBYTE */ + if (port->hasExtBitOp + && !port->hasExtBitOp(GETBYTE, getSize (TTYPE (expr)))) + return tree; + + return decorateType (newNode (GETBYTE, expr, count), RESULT_TYPE_NONE); +} + +/*-----------------------------------------------------------------*/ +/* optimizeGetWord - get two bytes of the expression */ +/*-----------------------------------------------------------------*/ +ast * +optimizeGetWord (ast * tree, RESULT_TYPE resultType) +{ + unsigned int i = 0; + ast * expr; + ast * count = NULL; + + expr = isShiftRightLitVal_BitAndLitVal(tree); + if (expr) + { + i = AST_ULONG_VALUE (tree->left->right); + count = tree->left->right; + if (AST_ULONG_VALUE (tree->right) != 0xFFFF) + expr = NULL; + } + if (!expr && resultType == RESULT_TYPE_INT) + { + /* if this is a right shift over a multiple of 8 */ + if (IS_RIGHT_OP (tree) && IS_AST_LIT_VALUE (tree->right)) + { + i = AST_ULONG_VALUE (tree->right); + count = tree->right; + expr = tree->left; + } + } + if (!expr || (i == 0) || (i % 8) || (i >= (getSize (TTYPE (expr))-1) * 8)) + return tree; + + /* make sure the port supports GETWORD */ + if (port->hasExtBitOp + && !port->hasExtBitOp(GETWORD, getSize (TTYPE (expr)))) + return tree; + + return decorateType (newNode (GETWORD, expr, count), RESULT_TYPE_NONE); +} + +/*-----------------------------------------------------------------*/ +/* optimizeRRCRLC :- optimize for Rotate Left/Right with carry */ +/*-----------------------------------------------------------------*/ +ast * +optimizeRRCRLC (ast * root) +{ + /* will look for trees of the form + (?expr << 1) | (?expr >> 7) or + (?expr >> 7) | (?expr << 1) will make that + into a RLC : operation .. + Will also look for + (?expr >> 1) | (?expr << 7) or + (?expr << 7) | (?expr >> 1) will make that + into a RRC operation + note : by 7 I mean (number of bits required to hold the + variable -1 ) */ + /* if the root operation is not a | operation then not */ + if (!IS_BITOR (root)) + return root; + + /* I have to think of a better way to match patterns this sucks */ + /* that aside let's start looking for the first case : I use a + negative check a lot to improve the efficiency */ + /* (?expr << 1) | (?expr >> 7) */ + if (IS_LEFT_OP (root->left) && + IS_RIGHT_OP (root->right)) + { + + if (!SPEC_USIGN (TETYPE (root->left->left))) + return root; + + if (!IS_AST_LIT_VALUE (root->left->right) || + !IS_AST_LIT_VALUE (root->right->right)) + goto tryNext0; + + /* make sure it is the same expression */ + if (!isAstEqual (root->left->left, + root->right->left)) + goto tryNext0; + + if (AST_ULONG_VALUE (root->left->right) != 1) + goto tryNext0; + + if (AST_ULONG_VALUE (root->right->right) != + (getSize (TTYPE (root->left->left)) * 8 - 1)) + goto tryNext0; + + /* make sure the port supports RLC */ + if (port->hasExtBitOp + && !port->hasExtBitOp(RLC, getSize (TTYPE (root->left->left)))) + return root; + + /* whew got the first case : create the AST */ + return newNode (RLC, root->left->left, NULL); + } + +tryNext0: + /* check for second case */ + /* (?expr >> 7) | (?expr << 1) */ + if (IS_LEFT_OP (root->right) && + IS_RIGHT_OP (root->left)) + { + + if (!SPEC_USIGN (TETYPE (root->left->left))) + return root; + + if (!IS_AST_LIT_VALUE (root->left->right) || + !IS_AST_LIT_VALUE (root->right->right)) + goto tryNext1; + + /* make sure it is the same symbol */ + if (!isAstEqual (root->left->left, + root->right->left)) + goto tryNext1; + + if (AST_ULONG_VALUE (root->right->right) != 1) + goto tryNext1; + + if (AST_ULONG_VALUE (root->left->right) != + (getSize (TTYPE (root->left->left)) * 8 - 1)) + goto tryNext1; + + /* make sure the port supports RLC */ + if (port->hasExtBitOp + && !port->hasExtBitOp(RLC, getSize (TTYPE (root->left->left)))) + return root; + + /* whew got the first case : create the AST */ + return newNode (RLC, root->left->left, NULL); + + } + +tryNext1: + /* third case for RRC */ + /* (?symbol >> 1) | (?symbol << 7) */ + if (IS_LEFT_OP (root->right) && + IS_RIGHT_OP (root->left)) + { + + if (!SPEC_USIGN (TETYPE (root->left->left))) + return root; + + if (!IS_AST_LIT_VALUE (root->left->right) || + !IS_AST_LIT_VALUE (root->right->right)) + goto tryNext2; + + /* make sure it is the same symbol */ + if (!isAstEqual (root->left->left, + root->right->left)) + goto tryNext2; + + if (AST_ULONG_VALUE (root->left->right) != 1) + goto tryNext2; + + if (AST_ULONG_VALUE (root->right->right) != + (getSize (TTYPE (root->left->left)) * 8 - 1)) + goto tryNext2; + + /* make sure the port supports RRC */ + if (port->hasExtBitOp + && !port->hasExtBitOp(RRC, getSize (TTYPE (root->left->left)))) + return root; + + /* whew got the first case : create the AST */ + return newNode (RRC, root->left->left, NULL); + + } +tryNext2: + /* fourth and last case for now */ + /* (?symbol << 7) | (?symbol >> 1) */ + if (IS_RIGHT_OP (root->right) && + IS_LEFT_OP (root->left)) + { + + if (!SPEC_USIGN (TETYPE (root->left->left))) + return root; + + if (!IS_AST_LIT_VALUE (root->left->right) || + !IS_AST_LIT_VALUE (root->right->right)) + return root; + + /* make sure it is the same symbol */ + if (!isAstEqual (root->left->left, + root->right->left)) + return root; + + if (AST_ULONG_VALUE (root->right->right) != 1) + return root; + + if (AST_ULONG_VALUE (root->left->right) != + (getSize (TTYPE (root->left->left)) * 8 - 1)) + return root; + + /* make sure the port supports RRC */ + if (port->hasExtBitOp + && !port->hasExtBitOp(RRC, getSize (TTYPE (root->left->left)))) + return root; + + /* whew got the first case : create the AST */ + return newNode (RRC, root->left->left, NULL); + + } + + /* not found return root */ + return root; +} + +/*-----------------------------------------------------------------*/ +/* optimizeSWAP :- optimize for nibble/byte/word swaps */ +/*-----------------------------------------------------------------*/ +ast * +optimizeSWAP (ast * root) +{ + /* will look for trees of the form + (?expr << 4) | (?expr >> 4) or + (?expr >> 4) | (?expr << 4) will make that + into a SWAP : operation .. + note : by 4 I mean (number of bits required to hold the + variable /2 ) */ + /* if the root operation is not a | operation then not */ + if (!IS_BITOR (root)) + return root; + + /* (?expr << 4) | (?expr >> 4) */ + if ((IS_LEFT_OP (root->left) && IS_RIGHT_OP (root->right)) + || (IS_RIGHT_OP (root->left) && IS_LEFT_OP (root->right))) + { + + if (!SPEC_USIGN (TETYPE (root->left->left))) + return root; + + if (!IS_AST_LIT_VALUE (root->left->right) || + !IS_AST_LIT_VALUE (root->right->right)) + return root; + + /* make sure it is the same expression */ + if (!isAstEqual (root->left->left, + root->right->left)) + return root; + + if (AST_ULONG_VALUE (root->left->right) != + (getSize (TTYPE (root->left->left)) * 4)) + return root; + + if (AST_ULONG_VALUE (root->right->right) != + (getSize (TTYPE (root->left->left)) * 4)) + return root; + + /* make sure the port supports SWAP */ + if (port->hasExtBitOp + && !port->hasExtBitOp(SWAP, getSize (TTYPE (root->left->left)))) + return root; + + /* found it : create the AST */ + return newNode (SWAP, root->left->left, NULL); + } + + + /* not found return root */ + return root; +} + +/*-----------------------------------------------------------------*/ +/* optimizeCompare - optimizes compares for bit variables */ +/*-----------------------------------------------------------------*/ +static ast * +optimizeCompare (ast * root) +{ + ast *optExpr = NULL; + value *vleft; + value *vright; + unsigned int litValue; + + /* if nothing then return nothing */ + if (!root) + return NULL; + + /* if not a compare op then do leaves */ + if (!IS_COMPARE_OP (root)) + { + root->left = optimizeCompare (root->left); + root->right = optimizeCompare (root->right); + return root; + } + + /* if left & right are the same then depending + of the operation do */ + if (isAstEqual (root->left, root->right)) + { + switch (root->opval.op) + { + case '>': + case '<': + case NE_OP: + optExpr = newAst_VALUE (constCharVal (0)); + break; + case GE_OP: + case LE_OP: + case EQ_OP: + optExpr = newAst_VALUE (constCharVal (1)); + break; + } + + return decorateType (optExpr, RESULT_TYPE_NONE); + } + + vleft = (root->left->type == EX_VALUE ? + root->left->opval.val : NULL); + + vright = (root->right->type == EX_VALUE ? + root->right->opval.val : NULL); + + /* if left is a BITVAR in BITSPACE */ + /* and right is a LITERAL then */ + /* optimize else do nothing */ + if (vleft && vright && + IS_BITVAR (vleft->etype) && + IN_BITSPACE (SPEC_OCLS (vleft->etype)) && + IS_LITERAL (vright->etype)) + { + + /* if right side > 1 then comparison may never succeed */ + if ((litValue = (int) ulFromVal (vright)) > 1) + { + werror (W_BAD_COMPARE); + goto noOptimize; + } + + if (litValue) + { + switch (root->opval.op) + { + case '>': /* bit value greater than 1 cannot be */ + werror (W_BAD_COMPARE); + goto noOptimize; + break; + + case '<': /* bit value < 1 means 0 */ + case NE_OP: + optExpr = newNode ('!', newAst_VALUE (vleft), NULL); + break; + + case LE_OP: /* bit value <= 1 means no check */ + optExpr = newAst_VALUE (vright); + break; + + case GE_OP: /* bit value >= 1 means only check for = */ + case EQ_OP: + optExpr = newAst_VALUE (vleft); + break; + } + } + else + { /* literal is zero */ + switch (root->opval.op) + { + case '<': /* bit value < 0 cannot be */ + werror (W_BAD_COMPARE); + goto noOptimize; + break; + + case '>': /* bit value > 0 means 1 */ + case NE_OP: + optExpr = newAst_VALUE (vleft); + break; + + case LE_OP: /* bit value <= 0 means no check */ + case GE_OP: /* bit value >= 0 means no check */ + werror (W_BAD_COMPARE); + goto noOptimize; + break; + + case EQ_OP: /* bit == 0 means ! of bit */ + optExpr = newNode ('!', newAst_VALUE (vleft), NULL); + break; + } + } + return decorateType (resolveSymbols (optExpr), RESULT_TYPE_NONE); + } /* end-of-if of BITVAR */ + +noOptimize: + return root; +} + +/*-----------------------------------------------------------------*/ +/* addSymToBlock : adds the symbol to the first block we find */ +/*-----------------------------------------------------------------*/ +void +addSymToBlock (symbol * sym, ast * tree) +{ + /* reached end of tree or a leaf */ + if (!tree || IS_AST_LINK (tree) || IS_AST_VALUE (tree)) + return; + + /* found a block */ + if (IS_AST_OP (tree) && + tree->opval.op == BLOCK) + { + + symbol *lsym = copySymbol (sym); + + lsym->next = AST_VALUES (tree, sym); + AST_VALUES (tree, sym) = lsym; + return; + } + + addSymToBlock (sym, tree->left); + addSymToBlock (sym, tree->right); +} + +/*-----------------------------------------------------------------*/ +/* processRegParms - do processing for register parameters */ +/*-----------------------------------------------------------------*/ +static void +processRegParms (value * args, ast * body) +{ + while (args) + { + if (IS_REGPARM (args->etype)) + addSymToBlock (args->sym, body); + args = args->next; + } +} + +/*-----------------------------------------------------------------*/ +/* resetParmKey - resets the operandkeys for the symbols */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (resetParmKey) +{ + symbol *sym = item; + + sym->key = 0; + sym->defs = NULL; + sym->uses = NULL; + sym->remat = 0; + return 1; +} + +/*------------------------------------------------------------------*/ +/* fixupInlineLabel - change a label in an inlined function so that */ +/* it is always unique no matter how many times */ +/* the function is inlined. */ +/*------------------------------------------------------------------*/ +static void +fixupInlineLabel (symbol * sym) +{ + char name[SDCC_NAME_MAX + 1]; + + SNPRINTF(name, sizeof(name), "%s_%d", sym->name, inlineState.count); + strcpy (sym->name, name); +} + +/*------------------------------------------------------------------*/ +/* copyAstLoc - copy location information (file, line, block, etc.) */ +/* from one ast node to another */ +/*------------------------------------------------------------------*/ +static void +copyAstLoc (ast * dest, ast * src) +{ + dest->filename = src->filename; + dest->lineno = src->lineno; + dest->level = src->level; + dest->block = src->block; + dest->seqPoint = src->seqPoint; +} + +/*-----------------------------------------------------------------*/ +/* fixupInline - perform various fixups on an inline function tree */ +/* to take into account that it is no longer a */ +/* stand-alone function. */ +/*-----------------------------------------------------------------*/ +static void +fixupInline (ast * tree, int level) +{ + int savedBlockno = currBlockno; + + if (IS_AST_OP (tree) && (tree->opval.op == BLOCK)) + { + symbol * decls; + + currBlockno = ++blockNo; + level++; + + /* Add any declared variables back into the symbol table */ + decls = tree->values.sym; + while (decls) + { + decls->level = level; + decls->block = currBlockno; + addSym (SymbolTab, decls, decls->name, decls->level, decls->block, 0); + decls = decls->next; + } + } + + tree->level = level; + tree->block = currBlockno; + + /* Update symbols */ + if (IS_AST_VALUE (tree) && + tree->opval.val->sym) + { + symbol * sym = tree->opval.val->sym; + + sym->level = level; + sym->block = currBlockno; + + sym->reqv = NULL; + SYM_SPIL_LOC (sym) = NULL; + sym->key = 0; + + /* If the symbol is a label, we need to renumber it */ + if (sym->islbl) + fixupInlineLabel (sym); + } + + /* Update IFX target labels */ + if (tree->type == EX_OP && tree->opval.op == IFX) + { + if (tree->trueLabel) + fixupInlineLabel (tree->trueLabel); + if (tree->falseLabel) + fixupInlineLabel (tree->falseLabel); + } + + /* Replace RETURN with optional assignment and a GOTO to the end */ + /* of the inlined function */ + if (tree->type == EX_OP && tree->opval.op == RETURN) + { + ast * assignTree = NULL; + ast * gotoTree; + + if (inlineState.retsym && tree->right) + { + assignTree = newNode ('=', + newAst_VALUE (symbolVal (inlineState.retsym)), + tree->right); + copyAstLoc (assignTree, tree); + } + + gotoTree = newNode (GOTO, + newAst_VALUE (symbolVal (inlineState.retlab)), + NULL); + copyAstLoc (gotoTree, tree); + + tree->opval.op = NULLOP; + tree->left = assignTree; + tree->right = gotoTree; + } + + /* Update any children */ + if (tree->left) + fixupInline (tree->left, level); + if (tree->right) + fixupInline (tree->right, level); + + if (IS_AST_OP (tree) && (tree->opval.op == LABEL)) + { + symbol * label = tree->left->opval.val->sym; + + label->key = labelKey++; + /* Add this label back into the symbol table */ + addSym (LabelTab, label, label->name, label->level, 0, 0); + } + + if (IS_AST_OP (tree) && (tree->opval.op == BLOCK)) + { + level--; + currBlockno = savedBlockno; + } +} + +/*-----------------------------------------------------------------*/ +/* inlineAddDecl - add a variable declaration to an ast block. It */ +/* is also added to the symbol table if addSymTab */ +/* is nonzero. */ +/*-----------------------------------------------------------------*/ +static void +inlineAddDecl (symbol * sym, ast * block, int addSymTab) +{ + sym->reqv = NULL; + SYM_SPIL_LOC (sym) = NULL; + sym->key = 0; + if (block != NULL) + { + symbol **decl = &(block->values.sym); + + sym->level = block->level; + sym->block = block->block; + + while (*decl) + { + if (strcmp ((*decl)->name, sym->name) == 0) + return; + decl = &( (*decl)->next ); + } + + *decl = sym; + + if (addSymTab) + addSym (SymbolTab, sym, sym->name, sym->level, sym->block, 0); + + } +} + +/*-----------------------------------------------------------------*/ +/* inlineTempVar - create a temporary variable for inlining */ +/*-----------------------------------------------------------------*/ +static symbol * +inlineTempVar (sym_link * type, int level) +{ + symbol * sym; + + sym = newSymbol (genSymName(level), level ); + sym->type = copyLinkChain (type); + sym->etype = getSpec(sym->type); + SPEC_SCLS (sym->etype) = S_AUTO; + SPEC_OCLS (sym->etype) = NULL; + SPEC_EXTR (sym->etype) = 0; + SPEC_STAT (sym->etype) = 0; + if IS_SPEC (sym->type) + SPEC_VOLATILE (sym->type) = 0; + else + DCL_PTR_VOLATILE (sym->type) = 0; + SPEC_ABSA (sym->etype) = 0; + + return sym; +} + +/*-----------------------------------------------------------------*/ +/* inlineFindParmRecurse - recursive function for inlineFindParm */ +/*-----------------------------------------------------------------*/ +static ast * +inlineFindParmRecurse (ast * parms, int *index) +{ + if (!parms) + return NULL; + + if (parms->type == EX_OP && parms->opval.op == PARAM) + { + ast * p; + + p=inlineFindParmRecurse (parms->left, index); + if (p) + return p; + p=inlineFindParmRecurse (parms->right, index); + if (p) + return p; + } + if (!*index) + return parms; + (*index)--; + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* inlineFindParm - search an ast tree of parameters to find one */ +/* at a particular index (0=first parameter). */ +/* Returns NULL if not found. */ +/*-----------------------------------------------------------------*/ +static ast * +inlineFindParm (ast * parms, int index) +{ + return inlineFindParmRecurse (parms, &index); +} + +/*-----------------------------------------------------------------*/ +/* expandInlineFuncs - replace calls to inline functions with the */ +/* function itself */ +/*-----------------------------------------------------------------*/ +static void +expandInlineFuncs (ast * tree, ast * block) +{ + if (IS_AST_OP (tree) && (tree->opval.op == CALL) && tree->left + && IS_AST_VALUE (tree->left) && tree->left->opval.val->sym) + { + symbol * func = tree->left->opval.val->sym; + symbol * csym; + + /* The symbol is probably not bound yet, so find the real one */ + csym = findSymWithLevel (SymbolTab, func); + if (csym) + func = csym; + + /* Is this an inline function that we can inline? */ + if (IFFUNC_ISINLINE (func->type) && func->funcTree) + { + symbol * retsym = NULL; + symbol * retlab; + ast * inlinetree; + ast * inlinetree2; + ast * temptree; + value * args; + int argIndex; + + /* Generate a label for the inlined function to branch to */ + /* in case it contains a return statement */ + retlab = newSymbol (genSymName(tree->level+1), tree->level+1 ); + retlab->isitmp = 1; + retlab->islbl = 1; + inlineState.retlab = retlab; + + /* Build the subtree for the inlined function in the form: */ + /* { //inlinetree block */ + /* { //inlinetree2 block */ + /* inline_function_code; */ + /* retlab: */ + /* } */ + /* } */ + temptree = newNode (LABEL, newAst_VALUE (symbolVal (retlab)), NULL); + copyAstLoc (temptree, tree); + temptree = newNode (NULLOP, copyAst (func->funcTree), temptree); + copyAstLoc (temptree, tree); + temptree = newNode (BLOCK, NULL, temptree); + copyAstLoc (temptree, tree); + inlinetree2 = temptree; + inlinetree = newNode (BLOCK, NULL, inlinetree2); + copyAstLoc (inlinetree, tree); + + /* To pass parameters to the inlined function, we need some */ + /* intermediate variables. This avoids scoping problems */ + /* when the parameter declaration names are used differently */ + /* during the function call. For example, a function */ + /* declared as func(int x, int y) but called as func(y,x). */ + /* { //inlinetree block */ + /* type1 temparg1 = argument1; */ + /* ... */ + /* typen tempargn = argumentn; */ + /* { //inlinetree2 block */ + /* type1 param1 = temparg1; */ + /* ... */ + /* typen paramn = tempargn; */ + /* inline_function_code; */ + /* retlab: */ + /* } */ + /* } */ + args = FUNC_ARGS (func->type); + argIndex = 0; + while (args) + { + symbol * temparg; + ast * assigntree; + symbol * parm; + ast * passedarg = inlineFindParm (tree->right, argIndex); + + if (!passedarg) + { + werror(E_TOO_FEW_PARMS); + break; + } + + temparg = inlineTempVar (args->sym->type, tree->level+1); + inlineAddDecl (temparg, inlinetree, FALSE); + + assigntree = newNode ('=', + newAst_VALUE (symbolVal (temparg)), + passedarg); + assigntree->initMode=1; // tell that assignment is initializer + inlinetree->right = newNode (NULLOP, + assigntree, + inlinetree->right); + + parm = copySymbol (args->sym); + inlineAddDecl (parm, inlinetree2, FALSE); + parm->_isparm = 0; + + assigntree = newNode ('=', + newAst_VALUE (symbolVal (parm)), + newAst_VALUE (symbolVal (temparg))); + assigntree->initMode=1; // tell that assignment is initializer + inlinetree2->right = newNode (NULLOP, + assigntree, + inlinetree2->right); + + args = args->next; + argIndex++; + } + + /* Handle the return type */ + if (!IS_VOID (func->type->next)) + { + /* Create a temporary symbol to hold the return value and */ + /* join it with the inlined function using the comma */ + /* operator. The fixupInline function will take care of */ + /* changing return statements into assignments to retsym. */ + /* (parameter passing and return label omitted for clarity) */ + /* rettype retsym; */ + /* ... */ + /* {{inline_function_code}}, retsym */ + + retsym = inlineTempVar (func->type->next, tree->level); + inlineAddDecl (retsym, block, TRUE); + + tree->opval.op = ','; + tree->left = inlinetree; + tree->right = newAst_VALUE (symbolVal (retsym)); + } + else + { + tree->opval.op = NULLOP; + tree->left = NULL; + tree->right = inlinetree; + } + inlineState.retsym = retsym; + + /* Renumber the various internal counters on the inlined */ + /* function's tree nodes and symbols. Add the inlined */ + /* function's local variables to the appropriate scope(s). */ + /* Convert inlined return statements to an assignment to */ + /* retsym (if needed) and a goto retlab. */ + fixupInline (inlinetree, inlinetree->level); + inlineState.count++; + } + } + + /* Recursively continue to search for functions to inline. */ + if (IS_AST_OP (tree)) + { + if (tree->opval.op == BLOCK) + block = tree; + + if (tree->left) + expandInlineFuncs (tree->left, block); + if (tree->right) + expandInlineFuncs (tree->right, block); + } +} + +/*-----------------------------------------------------------------*/ +/* createFunction - This is the key node that calls the iCode for */ +/* generating the code for a function. Note code */ +/* is generated function by function, later when */ +/* add inter-procedural analysis this will change */ +/*-----------------------------------------------------------------*/ +ast * +createFunction (symbol * name, ast * body) +{ + ast *ex; + symbol *csym; + int stack = 0; + sym_link *fetype; + iCode *piCode = NULL; + + if (getenv("SDCC_DEBUG_FUNCTION_POINTERS")) + fprintf (stderr, "SDCCast.c:createFunction(%s)\n", name->name); + + /* if check function return 0 then some problem */ + if (checkFunction (name, NULL) == 0) + return NULL; + + /* create a dummy block if none exists */ + if (!body) + body = newNode (BLOCK, NULL, NULL); + + noLineno++; + + /* check if the function name already in the symbol table */ + if ((csym = findSym (SymbolTab, NULL, name->name))) + { + name = csym; + /* special case for compiler defined functions + we need to add the name to the publics list : this + actually means we are now compiling the compiler + support routine */ + if (name->cdef) + { + addSet (&publics, name); + } + } + else + { + addSymChain (&name); + allocVariables (name); + } + name->lastLine = lexLineno; + currFunc = name; + + /* set the stack pointer */ + stackPtr = -port->stack.direction * port->stack.call_overhead; + xstackPtr = 0; + + if (IFFUNC_ISISR (name->type)) + stackPtr -= port->stack.direction * port->stack.isr_overhead; + + if (IFFUNC_ISREENT (name->type) || options.stackAuto) + { + if (options.useXstack) + xstackPtr -= port->stack.direction * port->stack.reent_overhead; + else + stackPtr -= port->stack.direction * port->stack.reent_overhead; + } + + fetype = getSpec (name->type); /* get the specifier for the function */ + /* if this is a reentrant function then */ + if (IFFUNC_ISREENT (name->type)) + reentrant++; + + inlineState.count = 0; + expandInlineFuncs (body, NULL); + + if (FUNC_ISINLINE (name->type)) + name->funcTree = copyAst (body); + + allocParms (FUNC_ARGS(name->type)); /* allocate the parameters */ + + /* do processing for parameters that are passed in registers */ + processRegParms (FUNC_ARGS(name->type), body); + + /* set the stack pointer */ + stackPtr = 0; + xstackPtr = -1; + + gatherImplicitVariables (body, NULL); /* move implicit variables into blocks */ + + /* allocate & autoinit the block variables */ + processBlockVars (body, &stack, ALLOCATE); + + /* name needs to be mangled */ + SNPRINTF (name->rname, sizeof(name->rname), "%s%s", port->fun_prefix, name->name); + + body = resolveSymbols (body); /* resolve the symbols */ + body = decorateType (body, RESULT_TYPE_NONE); /* propagateType & do semantic checks */ + + /* save the stack information */ + if (options.useXstack) + name->xstack = SPEC_STAK (fetype) = stack; + else + name->stack = SPEC_STAK (fetype) = stack; + + ex = newAst_VALUE (symbolVal (name)); /* create name */ + ex = newNode (FUNCTION, ex, body); + ex->values.args = FUNC_ARGS(name->type); + ex->decorated=1; + if (options.dump_tree) + PA(ex); + if (fatalError) + goto skipall; + + /* Do not generate code for inline functions unless extern also. */ +#if 0 + if (FUNC_ISINLINE (name->type) && !IS_EXTERN (fetype)) + goto skipall; +#else + /* Temporary hack: always generate code for static inline functions. */ + /* Ideally static inline functions should only be generated if needed. */ + if (FUNC_ISINLINE (name->type) && !IS_EXTERN (fetype) && !IS_STATIC (fetype)) + goto skipall; +#endif + + /* create the node & generate intermediate code */ + GcurMemmap = code; + codeOutBuf = &code->oBuf; + piCode = iCodeFromAst (ex); + name->generated = 1; + + if (fatalError) + goto skipall; + + eBBlockFromiCode (piCode); + + /* if there are any statics then do them */ + if (staticAutos) + { + GcurMemmap = statsg; + codeOutBuf = &statsg->oBuf; + eBBlockFromiCode (iCodeFromAst (decorateType (resolveSymbols (staticAutos), RESULT_TYPE_NONE))); + staticAutos = NULL; + } + +skipall: + + /* dealloc the block variables */ + processBlockVars (body, &stack, DEALLOCATE); + outputDebugStackSymbols(); + /* deallocate paramaters */ + deallocParms (FUNC_ARGS(name->type)); + + if (IFFUNC_ISREENT (name->type)) + reentrant--; + + /* we are done freeup memory & cleanup */ + noLineno--; + if (port->reset_labelKey) + labelKey = 1; + name->key = 0; + FUNC_HASBODY(name->type) = 1; + addSet (&operKeyReset, name); + applyToSet (operKeyReset, resetParmKey); + + if (options.debug) + cdbStructBlock(1); + + cleanUpLevel (LabelTab, 0); + cleanUpBlock (StructTab, 1); + cleanUpBlock (TypedefTab, 1); + + xstack->syms = NULL; + istack->syms = NULL; + return NULL; +} + + +#define INDENT(x,f) { int i ; fprintf (f, "%s:%d:", tree->filename, tree->lineno); for (i=0;i < x; i++) fprintf(f," "); } +/*-----------------------------------------------------------------*/ +/* ast_print : prints the ast (for debugging purposes) */ +/*-----------------------------------------------------------------*/ + +void ast_print (ast * tree, FILE *outfile, int indent) +{ + + if (!tree) return ; + + /* can print only decorated trees */ + if (!tree->decorated) return; + + /* if any child is an error | this one is an error do nothing */ + if (tree->isError || + (tree->left && tree->left->isError) || + (tree->right && tree->right->isError)) { + fprintf(outfile,"ERROR_NODE(%p)\n",tree); + } + + + /* print the line */ + /* if not block & function */ + if (tree->type == EX_OP && + (tree->opval.op != FUNCTION && + tree->opval.op != BLOCK && + tree->opval.op != NULLOP)) { + } + + if (tree->opval.op == FUNCTION) { + int arg=0; + value *args=FUNC_ARGS(tree->left->opval.val->type); + fprintf(outfile,"FUNCTION (%s=%p) type (", + tree->left->opval.val->name, tree); + printTypeChain (tree->left->opval.val->type->next,outfile); + fprintf(outfile,") args ("); + do { + if (arg) { + fprintf (outfile, ", "); + } + printTypeChain (args ? args->type : NULL, outfile); + arg++; + args= args ? args->next : NULL; + } while (args); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent); + ast_print(tree->right,outfile,indent); + return ; + } + if (tree->opval.op == BLOCK) { + symbol *decls = tree->values.sym; + INDENT(indent,outfile); + fprintf(outfile,"{\n"); + while (decls) { + INDENT(indent+2,outfile); + fprintf(outfile,"DECLARE SYMBOL (%s=%p) type (", + decls->name, decls); + printTypeChain(decls->type,outfile); + fprintf(outfile,")\n"); + + decls = decls->next; + } + ast_print(tree->right,outfile,indent+2); + INDENT(indent,outfile); + fprintf(outfile,"}\n"); + return; + } + if (tree->opval.op == NULLOP) { + ast_print(tree->left,outfile,indent); + ast_print(tree->right,outfile,indent); + return ; + } + INDENT(indent,outfile); + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* leaf has been reached */ + /*----------------------------*/ + /* if this is of type value */ + /* just get the type */ + if (tree->type == EX_VALUE) { + + if (IS_LITERAL (tree->opval.val->etype)) { + fprintf(outfile,"CONSTANT (%p) value = ", tree); + if (SPEC_USIGN (tree->opval.val->etype)) + fprintf(outfile,"%u", (TYPE_TARGET_ULONG) ulFromVal(tree->opval.val)); + else + fprintf(outfile,"%d", (TYPE_TARGET_LONG) ulFromVal(tree->opval.val)); + fprintf(outfile,", 0x%x, %f", (TYPE_TARGET_ULONG) ulFromVal(tree->opval.val), + floatFromVal(tree->opval.val)); + } else if (tree->opval.val->sym) { + /* if the undefined flag is set then give error message */ + if (tree->opval.val->sym->undefined) { + fprintf(outfile,"UNDEFINED SYMBOL "); + } else { + fprintf(outfile,"SYMBOL "); + } + fprintf(outfile,"(%s=%p @ %p)", + tree->opval.val->sym->name, tree, tree->opval.val->sym); + } + if (tree->ftype) { + fprintf(outfile," type ("); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + } else { + fprintf(outfile,"\n"); + } + return ; + } + + /* if type link for the case of cast */ + if (tree->type == EX_LINK) { + fprintf(outfile,"TYPENODE (%p) type = (",tree); + printTypeChain(tree->opval.lnk,outfile); + fprintf(outfile,")\n"); + return ; + } + + + /* depending on type of operator do */ + + switch (tree->opval.op) { + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* array node */ + /*----------------------------*/ + case '[': + fprintf(outfile,"ARRAY_OP (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* struct/union */ + /*----------------------------*/ + case '.': + fprintf(outfile,"STRUCT_ACCESS (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* struct/union pointer */ + /*----------------------------*/ + case PTR_OP: + fprintf(outfile,"PTR_ACCESS (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* ++/-- operation */ + /*----------------------------*/ + case INC_OP: + if (tree->left) + fprintf(outfile,"post-"); + else + fprintf(outfile,"pre-"); + fprintf(outfile,"INC_OP (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); /* postincrement case */ + ast_print(tree->right,outfile,indent+2); /* preincrement case */ + return ; + + case DEC_OP: + if (tree->left) + fprintf(outfile,"post-"); + else + fprintf(outfile,"pre-"); + fprintf(outfile,"DEC_OP (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); /* postdecrement case */ + ast_print(tree->right,outfile,indent+2); /* predecrement case */ + return ; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* bitwise and */ + /*----------------------------*/ + case '&': + if (tree->right) { + fprintf(outfile,"& (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + } else { + fprintf(outfile,"ADDRESS_OF (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + } + return ; + /*----------------------------*/ + /* bitwise or */ + /*----------------------------*/ + case '|': + fprintf(outfile,"OR (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* bitwise xor */ + /*----------------------------*/ + case '^': + fprintf(outfile,"XOR (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* division */ + /*----------------------------*/ + case '/': + fprintf(outfile,"DIV (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* modulus */ + /*----------------------------*/ + case '%': + fprintf(outfile,"MOD (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* address dereference */ + /*----------------------------*/ + case '*': /* can be unary : if right is null then unary operation */ + if (!tree->right) { + fprintf(outfile,"DEREF (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + return ; + } + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* multiplication */ + /*----------------------------*/ + fprintf(outfile,"MULT (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* unary '+' operator */ + /*----------------------------*/ + case '+': + /* if unary plus */ + if (!tree->right) { + fprintf(outfile,"UPLUS (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + } else { + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* addition */ + /*----------------------------*/ + fprintf(outfile,"ADD (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + } + return; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* unary '-' */ + /*----------------------------*/ + case '-': /* can be unary */ + if (!tree->right) { + fprintf(outfile,"UMINUS (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + } else { + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* subtraction */ + /*----------------------------*/ + fprintf(outfile,"SUB (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + } + return; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* complement */ + /*----------------------------*/ + case '~': + fprintf(outfile,"COMPL (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + return ; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* not */ + /*----------------------------*/ + case '!': + fprintf(outfile,"NOT (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + return ; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* shift */ + /*----------------------------*/ + case RRC: + fprintf(outfile,"RRC (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + return ; + + case RLC: + fprintf(outfile,"RLC (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + return ; + case SWAP: + fprintf(outfile,"SWAP (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + return ; + case GETHBIT: + fprintf(outfile,"GETHBIT (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + return ; + case GETABIT: + fprintf(outfile,"GETABIT (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + case GETBYTE: + fprintf(outfile,"GETBYTE (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + case GETWORD: + fprintf(outfile,"GETWORD (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + case LEFT_OP: + fprintf(outfile,"LEFT_SHIFT (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + case RIGHT_OP: + fprintf(outfile,"RIGHT_SHIFT (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* casting */ + /*----------------------------*/ + case CAST: /* change the type */ + fprintf(outfile,"CAST (%p) from type (",tree); + printTypeChain(tree->right->ftype,outfile); + fprintf(outfile,") to type ("); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->right,outfile,indent+2); + return ; + + case AND_OP: + fprintf(outfile,"ANDAND (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + case OR_OP: + fprintf(outfile,"OROR (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* comparison operators */ + /*----------------------------*/ + case '>': + fprintf(outfile,"GT(>) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + case '<': + fprintf(outfile,"LT(<) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + case LE_OP: + fprintf(outfile,"LE(<=) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + case GE_OP: + fprintf(outfile,"GE(>=) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + case EQ_OP: + fprintf(outfile,"EQ(==) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + case NE_OP: + fprintf(outfile,"NE(!=) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* sizeof */ + /*----------------------------*/ + case SIZEOF: /* evaluate wihout code generation */ + fprintf(outfile,"SIZEOF %d\n",(getSize (tree->right->ftype))); + return ; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* conditional operator '?' */ + /*----------------------------*/ + case '?': + fprintf(outfile,"QUEST(?) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return; + + case ':': + fprintf(outfile,"COLON(:) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return ; + + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* assignment operators */ + /*----------------------------*/ + case MUL_ASSIGN: + fprintf(outfile,"MULASS(*=) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return; + case DIV_ASSIGN: + fprintf(outfile,"DIVASS(/=) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return; + case AND_ASSIGN: + fprintf(outfile,"ANDASS(&=) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return; + case OR_ASSIGN: + fprintf(outfile,"ORASS(|=) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return; + case XOR_ASSIGN: + fprintf(outfile,"XORASS(^=) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return; + case RIGHT_ASSIGN: + fprintf(outfile,"RSHFTASS(>>=) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return; + case LEFT_ASSIGN: + fprintf(outfile,"LSHFTASS(<<=) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* -= operator */ + /*----------------------------*/ + case SUB_ASSIGN: + fprintf(outfile,"SUBASS(-=) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* += operator */ + /*----------------------------*/ + case ADD_ASSIGN: + fprintf(outfile,"ADDASS(+=) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* straight assignemnt */ + /*----------------------------*/ + case '=': + fprintf(outfile,"ASSIGN(=) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* comma operator */ + /*----------------------------*/ + case ',': + fprintf(outfile,"COMMA(,) (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* function call */ + /*----------------------------*/ + case CALL: + case PCALL: + fprintf(outfile,"CALL (%p) type (",tree); + printTypeChain(tree->ftype,outfile); + fprintf(outfile,")\n"); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent+2); + return; + case PARAM: + fprintf(outfile,"PARMS\n"); + ast_print(tree->left,outfile,indent+2); + if (tree->right /*&& !IS_AST_PARAM(tree->right)*/) { + ast_print(tree->right,outfile,indent+2); + } + return ; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* return statement */ + /*----------------------------*/ + case RETURN: + fprintf(outfile,"RETURN (%p) type (",tree); + if (tree->right) { + printTypeChain(tree->right->ftype,outfile); + } + fprintf(outfile,")\n"); + ast_print(tree->right,outfile,indent+2); + return ; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* label statement */ + /*----------------------------*/ + case LABEL : + fprintf(outfile,"LABEL (%p)\n",tree); + ast_print(tree->left,outfile,indent+2); + ast_print(tree->right,outfile,indent); + return; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* switch statement */ + /*----------------------------*/ + case SWITCH: + { + value *val; + fprintf(outfile,"SWITCH (%p) ",tree); + ast_print(tree->left,outfile,0); + for (val = tree->values.switchVals.swVals; val ; val = val->next) { + INDENT(indent+2,outfile); + fprintf(outfile,"CASE 0x%x GOTO _case_%d_%d\n", + (int) ulFromVal(val), + tree->values.switchVals.swNum, + (int) ulFromVal(val)); + } + ast_print(tree->right,outfile,indent); + } + return ; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* ifx Statement */ + /*----------------------------*/ + case IFX: + fprintf(outfile,"IF (%p) \n",tree); + ast_print(tree->left,outfile,indent+2); + if (tree->trueLabel) { + INDENT(indent+2,outfile); + fprintf(outfile,"NE(!=) 0 goto %s\n",tree->trueLabel->name); + } + if (tree->falseLabel) { + INDENT(indent+2,outfile); + fprintf(outfile,"EQ(==) 0 goto %s\n",tree->falseLabel->name); + } + ast_print(tree->right,outfile,indent+2); + return ; + /*----------------------------*/ + /* goto Statement */ + /*----------------------------*/ + case GOTO: + fprintf(outfile,"GOTO (%p) \n",tree); + ast_print(tree->left,outfile,indent+2); + fprintf(outfile,"\n"); + return ; + /*------------------------------------------------------------------*/ + /*----------------------------*/ + /* for Statement */ + /*----------------------------*/ + case FOR: + fprintf(outfile,"FOR (%p) \n",tree); + if (AST_FOR( tree, initExpr)) { + INDENT(indent+2,outfile); + fprintf(outfile,"INIT EXPR "); + ast_print(AST_FOR(tree, initExpr),outfile,indent+2); + } + if (AST_FOR( tree, condExpr)) { + INDENT(indent+2,outfile); + fprintf(outfile,"COND EXPR "); + ast_print(AST_FOR(tree, condExpr),outfile,indent+2); + } + if (AST_FOR( tree, loopExpr)) { + INDENT(indent+2,outfile); + fprintf(outfile,"LOOP EXPR "); + ast_print(AST_FOR(tree, loopExpr),outfile,indent+2); + } + fprintf(outfile,"FOR LOOP BODY \n"); + ast_print(tree->left,outfile,indent+2); + return ; + case CRITICAL: + fprintf(outfile,"CRITICAL (%p) \n",tree); + ast_print(tree->left,outfile,indent+2); + default: + return ; + } +} + +void PA(ast *t) +{ + ast_print(t,stdout,0); +} + +/*-----------------------------------------------------------------*/ +/* astErrors : returns non-zero if errors present in tree */ +/*-----------------------------------------------------------------*/ +int astErrors(ast *t) +{ + int errors=0; + + if (t) + { + if (t->isError) + errors++; + + if (t->type == EX_VALUE + && t->opval.val->sym + && t->opval.val->sym->undefined) + errors++; + + errors += astErrors(t->left); + errors += astErrors(t->right); + } + + return errors; +} diff --git a/src/SDCCast.h b/src/SDCCast.h new file mode 100644 index 0000000..17a21d1 --- /dev/null +++ b/src/SDCCast.h @@ -0,0 +1,230 @@ +/*------------------------------------------------------------------------- + SDCCast.h - header file for parser support & all ast related routines + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCEXPR_H +#define SDCCEXPR_H + +#include "SDCCglobl.h" +#include "SDCCsymt.h" +#include "SDCCval.h" +#include "SDCCset.h" +#include "SDCCmem.h" + +typedef enum { + EX_OP=0, + EX_VALUE, + EX_LINK, + EX_OPERAND +} ASTTYPE; + +/* expression tree */ +typedef struct ast + { + + ASTTYPE type; + unsigned decorated:1; + unsigned isError:1; + unsigned funcName:1; + unsigned rvalue:1; + unsigned lvalue:1; + unsigned initMode:1; + unsigned reversed:1; + int level; /* level for expr */ + int block; /* block number */ + int seqPoint; /* sequence point */ + /* union of values expression can have */ + union + { + value *val; /* value if type = EX_VALUE */ + sym_link *lnk; /* sym_link * if type= EX_LINK */ + struct operand *oprnd; /* used only for side effecting function calls */ + unsigned op; /* operator if type= EX_OP */ + } + opval; + + /* union for special processing */ + union + { + char *inlineasm; /* pointer to inline assembler code */ + literalList *constlist; /* init list for array initializer. */ + symbol *sym; /* if block then -> symbols */ + value *args; /* if function then args */ + /* if switch then switch values */ + struct + { + value *swVals; /* switch comparison values */ + int swDefault; /* default if present */ + int swNum; /* switch number */ + } + switchVals; + /* if for then for values */ + struct + { + struct ast *initExpr; /* init portion */ + struct ast *condExpr; /* conditional portion */ + struct ast *loopExpr; /* iteration portion */ + symbol *trueLabel; /* entry point into body */ + symbol *falseLabel; /* exit point */ + symbol *continueLabel; /* conditional check */ + symbol *condLabel; /* conditional label */ + } + forVals; + struct + { + unsigned literalFromCast:1; /* true if this is an EX_VALUE of LITERAL + * type resulting from a typecast. + */ + unsigned removedCast:1; /* true if the explicit cast has been removed */ + }; + int argreg; /* argreg number when operand type == EX_OPERAND */ + } + values; + + int lineno; /* source file line number */ + char *filename; /* filename of the source file */ + + sym_link *ftype; /* start of type chain for this subtree */ + sym_link *etype; /* end of type chain for this subtree */ + + struct ast *left; /* pointer to left tree */ + struct ast *right; /* pointer to right tree */ + symbol *trueLabel; /* if statement trueLabel */ + symbol *falseLabel; /* if statement falseLabel */ + } +ast; + + +/* easy access macros */ +#define IS_AST_OP(x) ((x) && (x)->type == EX_OP) +#define IS_CALLOP(x) (IS_AST_OP(x) && (x)->opval.op == CALL) +#define IS_BITOR(x) (IS_AST_OP(x) && (x)->opval.op == '|') +#define IS_BITAND(x) (IS_AST_OP(x) && (x)->opval.op == '&' && \ + (x)->left && (x)->right ) +#define IS_FOR_STMT(x) (IS_AST_OP(x) && (x)->opval.op == FOR) +#define IS_LEFT_OP(x) (IS_AST_OP(x) && (x)->opval.op == LEFT_OP) +#define IS_RIGHT_OP(x) (IS_AST_OP(x) && (x)->opval.op == RIGHT_OP) +#define IS_AST_VALUE(x) ((x) && (x)->type == EX_VALUE && (x)->opval.val) +#define IS_AST_LINK(x) ((x)->type == EX_LINK) +#define IS_AST_NOT_OPER(x) (x && IS_AST_OP(x) && (x)->opval.op == '!') +#define IS_ARRAY_OP(x) (IS_AST_OP(x) && (x)->opval.op == '[') +#define IS_COMPARE_OP(x) (IS_AST_OP(x) && \ + ((x)->opval.op == '>' || \ + (x)->opval.op == '<' || \ + (x)->opval.op == LE_OP || \ + (x)->opval.op == GE_OP || \ + (x)->opval.op == EQ_OP || \ + (x)->opval.op == NE_OP )) +#define IS_CAST_OP(x) (IS_AST_OP(x) && (x)->opval.op == CAST) +#define IS_TERNARY_OP(x) (IS_AST_OP(x) && (x)->opval.op == '?') +#define IS_COLON_OP(x) (IS_AST_OP(x) && (x)->opval.op == ':') +#define IS_ADDRESS_OF_OP(x) (IS_AST_OP(x) && \ + (x)->opval.op == '&' && \ + (x)->right == NULL ) +#define IS_AST_LIT_VALUE(x) (IS_AST_VALUE(x) && \ + IS_LITERAL((x)->opval.val->etype)) +#define IS_AST_SYM_VALUE(x) (IS_AST_VALUE(x) && (x)->opval.val->sym) +#define AST_FLOAT_VALUE(x) (floatFromVal((x)->opval.val)) +#define AST_ULONG_VALUE(x) (ulFromVal((x)->opval.val)) +#define AST_SYMBOL(x) ((x)->opval.val->sym) +#define AST_VALUE(x) ((x)->opval.val) +#define AST_VALUES(x,y) ((x)->values.y) +#define AST_FOR(x,y) ((x)->values.forVals.y) +#define AST_ARGREG(x) ((x)->values.argreg) + +#define IS_AST_PARAM(x) (IS_AST_OP(x) && (x)->opval.op == PARAM) + +#define CAN_EVAL(x) ( (x) == '[' || (x) == '.' || (x) == PTR_OP || \ + (x) == '&' || (x) == '|' || (x) == '^' || (x) == '*' || \ + (x) == '-' || (x) == '+' || (x) == '~' || \ + (x) == '!' || (x) == LEFT_OP || (x) == RIGHT_OP || \ + (x) == '/' || (x) == '%' || (x) == '>' || (x) == '<' || \ + (x) == LE_OP || (x) == GE_OP || (x) == EQ_OP || (x) == NE_OP || \ + (x) == AND_OP || (x) == OR_OP || (x) == '=' ) + +#define LEFT_FIRST(x) ( x == AND_OP || x == OR_OP ) + +#define SIDE_EFFECTS_CHECK(op,rVal) if (!sideEffects) { \ + werror(W_NO_SIDE_EFFECTS,op); \ + return rVal ; \ + } +#define IS_MODIFYING_OP(x) ( (x) == INC_OP || (x) == DEC_OP || (x) == '=' || \ + (x) == AND_ASSIGN || x== OR_ASSIGN || (x) == XOR_ASSIGN ) + +#define IS_ASSIGN_OP(x) ( (x) == '=' || (x) == ADD_ASSIGN || (x) == SUB_ASSIGN ||\ + (x) == MUL_ASSIGN || (x) == DIV_ASSIGN || (x) == XOR_ASSIGN ||\ + (x) == AND_ASSIGN || (x) == OR_ASSIGN || (x) == INC_OP || (x) == DEC_OP) +#define IS_DEREF_OP(x) (( (x)->opval.op == '*' && (x)->right == NULL) || (x)->opval.op == '.') + +/* forward declarations for global variables */ +extern ast *staticAutos; +extern struct dbuf_s *codeOutBuf; +extern struct memmap *GcurMemmap; + +/* forward definitions for functions */ +ast *newAst_VALUE (value * val); +ast *newAst_OP (unsigned op); +ast *newAst_LINK (sym_link * val); + +void initAst (); +ast *newNode (long, ast *, ast *); +ast *copyAst (ast *); +ast *removeIncDecOps (ast *); +ast *removePreIncDecOps (ast *); +ast *removePostIncDecOps (ast *); +value *sizeofOp (sym_link *); +value *evalStmnt (ast *); +ast *createRMW (ast *, unsigned, ast *); +ast *createFunction (symbol *, ast *); +ast *createBlock (symbol *, ast *); +ast *createLabel (symbol *, ast *); +ast *createCase (ast *, ast *, ast *); +ast *createDefault (ast *, ast *, ast *); +ast *forLoopOptForm (ast *); +ast *argAst (ast *); +ast *resolveSymbols (ast *); +ast *decorateType (ast *, RESULT_TYPE); +ast *createWhile (symbol *, symbol *, symbol *, ast *, ast *); +ast *createIf (ast *, ast *, ast *); +ast *createDo (symbol *, symbol *, symbol *, ast *, ast *); +ast *createFor (symbol *, symbol *, symbol *, symbol *, ast *, ast *, ast *, ast *); +void eval2icode (ast *); +value *constExprValue (ast *, int); +bool constExprTree (ast *); +int setAstFileLine (ast *, char *, int); +symbol *funcOfType (char *, sym_link *, sym_link *, int, int); +symbol * funcOfTypeVarg (char *, char * , int , char **); +ast *initAggregates (symbol *, initList *, ast *); +bool hasSEFcalls (ast *); +void addSymToBlock (symbol *, ast *); +void freeStringSymbol(symbol *); +DEFSETFUNC(resetParmKey); +int astErrors(ast *); +RESULT_TYPE getResultTypeFromType (sym_link *); + +// exported variables +extern set *operKeyReset; +extern int noAlloc; +extern int inInitMode; + +#endif diff --git a/src/SDCCbitv.c b/src/SDCCbitv.c new file mode 100644 index 0000000..987d5be --- /dev/null +++ b/src/SDCCbitv.c @@ -0,0 +1,487 @@ +/*----------------------------------------------------------------- + SDCCbitv.c - contains support routines for bitvectors + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" + +#include "newalloc.h" + +int bitVectDefault = 1024; + +/* genernal note about a bitvectors: + bit vectors are stored from left to right i.e. + bit position 0 is the MS bit of the first byte + this also means that bit positions must start from 0 */ +/*-----------------------------------------------------------------*/ +/* newBitVect - returns a new bitvector of size */ +/*-----------------------------------------------------------------*/ +bitVect * +newBitVect (int size) +{ + bitVect *bvp; + int byteSize; + + bvp = Safe_calloc (1, sizeof (bitVect)); + + bvp->size = size; + bvp->bSize = byteSize = (size / 8) + 1; + bvp->vect = Safe_calloc (1, byteSize); + return bvp; +} + +/*-----------------------------------------------------------------*/ +/* freeBitVect - frees the memory used by the bitVector */ +/*-----------------------------------------------------------------*/ +void +freeBitVect (bitVect * bvp) +{ + if (!bvp) + return; + + Safe_free (bvp->vect); + Safe_free (bvp); +} + +/*-----------------------------------------------------------------*/ +/* bitVectResize - changes the size of a bit vector */ +/*-----------------------------------------------------------------*/ +bitVect * +bitVectResize (bitVect * bvp, int size) +{ + int bSize = (size / 8) + 1; + + if (!bvp) + return newBitVect (size); + + /* if we already have enough space */ + if (bvp->bSize >= bSize) + { + if (size > bvp->size) + bvp->size = size; + return bvp; + } + + bvp->vect = Clear_realloc (bvp->vect, bvp->bSize, bSize); + bvp->size = size; + bvp->bSize = bSize; + + return bvp; +} + +/*-----------------------------------------------------------------*/ +/* bitVectSetBit - sets a given bit in the bit vector */ +/*-----------------------------------------------------------------*/ +bitVect * +bitVectSetBit (bitVect * bvp, int pos) +{ + int byteSize; + int offset; + + /* if set is null then allocate it */ + if (!bvp) + bvp = newBitVect (bitVectDefault); /* allocate for twice the size */ + + if (bvp->size <= pos) + bvp = bitVectResize (bvp, pos + 2); /* conservatively resize */ + + byteSize = pos / 8; + offset = pos % 8; + bvp->vect[byteSize] |= (((unsigned char) 1) << + (7 - offset)); + return bvp; +} + +/*-----------------------------------------------------------------*/ +/* bitVectUnSetBit - unsets the value of a bit in a bitvector */ +/*-----------------------------------------------------------------*/ +void +bitVectUnSetBit (bitVect * bvp, int pos) +{ + int byteSize; + int offset; + + if (!bvp) + return; + + byteSize = pos / 8; + if (bvp->bSize <= byteSize) + return; + + offset = pos % 8; + + bvp->vect[byteSize] &= ~(((unsigned char) 1) << + (7 - offset)); +} + +/*-----------------------------------------------------------------*/ +/* bitVectBitValue - returns value value at bit position */ +/*-----------------------------------------------------------------*/ +int +bitVectBitValue (bitVect * bvp, int pos) +{ + int byteSize; + int offset; + + if (!bvp) + return 0; + + byteSize = pos / 8; + + if (bvp->bSize <= byteSize) + return 0; + + offset = pos % 8; + + return ((bvp->vect[byteSize] >> (7 - offset)) & ((unsigned char) 1)); + +} + +/*-----------------------------------------------------------------*/ +/* bitVectUnion - unions two bitvectors */ +/*-----------------------------------------------------------------*/ +bitVect * +bitVectUnion (bitVect * bvp1, bitVect * bvp2) +{ + int i; + bitVect *newBvp; + unsigned int *pn, *p1, *p2; + int nbits; + + /* if both null */ + if (!bvp1 && !bvp2) + return NULL; + + /* if one of them null then return the other */ + if (!bvp1 && bvp2) + return bitVectCopy (bvp2); + + if (bvp1 && !bvp2) + return bitVectCopy (bvp1); + + /* if they are not the same size */ + /* make them the same size */ + if (bvp1->bSize < bvp2->bSize) + bvp1 = bitVectResize (bvp1, bvp2->size); + else if (bvp2->bSize < bvp1->bSize) + bvp2 = bitVectResize (bvp2, bvp1->size); + + newBvp = newBitVect (bvp1->size); + nbits = bvp1->bSize; + i = 0; + + pn = (unsigned int *)newBvp->vect; + p1 = (unsigned int *)bvp1->vect; + p2 = (unsigned int *)bvp2->vect; + + while ((nbits - i) >= sizeof(*pn)) + { + *pn++ = *p1++ | *p2++; + i += sizeof(*pn); + } + + for (; i < nbits; i++) + newBvp->vect[i] = bvp1->vect[i] | bvp2->vect[i]; + + + return newBvp; +} + +/*-----------------------------------------------------------------*/ +/* bitVectIntersect - intersect two bitvectors */ +/*-----------------------------------------------------------------*/ +bitVect * +bitVectIntersect (bitVect * bvp1, bitVect * bvp2) +{ + int i; + bitVect *newBvp; + unsigned int *pn, *p1, *p2; + int nbits; + + if (!bvp2 || !bvp1) + return NULL; + + /* if they are not the same size */ + /* make them the same size */ + if (bvp1->bSize < bvp2->bSize) + bvp1 = bitVectResize (bvp1, bvp2->bSize); + else if (bvp2->size < bvp1->size) + bvp2 = bitVectResize (bvp2, bvp1->size); + + newBvp = newBitVect (bvp1->size); + nbits = bvp1->bSize; + i = 0; + + pn = (unsigned int *)newBvp->vect; + p1 = (unsigned int *)bvp1->vect; + p2 = (unsigned int *)bvp2->vect; + + while ((nbits - i) >= sizeof(*pn)) + { + *pn++ = *p1++ & *p2++; + i += sizeof(*pn); + } + + for (; i < nbits; i++) + newBvp->vect[i] = bvp1->vect[i] & bvp2->vect[i]; + + return newBvp; +} + +/*-----------------------------------------------------------------*/ +/* bitVectBitsInCommon - special case of intersection determines */ +/* if the vectors have any common bits set */ +/*-----------------------------------------------------------------*/ +int +bitVectBitsInCommon (bitVect * bvp1, bitVect * bvp2) +{ + int i; + int nbits; + unsigned int *p1, *p2; + + if (!bvp1 || !bvp2) + return 0; + + nbits = min (bvp1->bSize, bvp2->bSize); + i = 0; + + p1 = (unsigned int *)bvp1->vect; + p2 = (unsigned int *)bvp2->vect; + + while ((nbits-i) >= sizeof(*p1)) + { + if (*p1 & *p2) + return 1; + p1++; p2++; + i += sizeof(*p1); + } + + for (; i < nbits; i++) + if (bvp1->vect[i] & bvp2->vect[i]) + return 1; + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* bitVectCplAnd - complement the second & and it with the first */ +/*-----------------------------------------------------------------*/ +bitVect * +bitVectCplAnd (bitVect * bvp1, bitVect * bvp2) +{ + int i; + unsigned int *p1, *p2; + int nbits; + + if (!bvp2) + return bvp1; + + if (!bvp1) + return bvp1; + + /* if they are not the same size */ + /* make them the same size */ + if (bvp1->bSize < bvp2->bSize) + bvp1 = bitVectResize (bvp1, bvp2->bSize); + else if (bvp2->size < bvp1->size) + bvp2 = bitVectResize (bvp2, bvp1->size); + + nbits = bvp1->bSize; + i = 0; + + p1 = (unsigned int *)bvp1->vect; + p2 = (unsigned int *)bvp2->vect; + + while ((nbits - i) >= sizeof(*p1)) + { + *p1 = *p1 & (~*p2); + p2++; p1++; + i += sizeof(*p1); + } + + for (; i < nbits; i++) + bvp1->vect[i] = bvp1->vect[i] & (~bvp2->vect[i]); + + return bvp1; +} + +/*-----------------------------------------------------------------*/ +/* bitVectIsZero - bit vector has all bits turned off */ +/*-----------------------------------------------------------------*/ +int +bitVectIsZero (bitVect * bvp) +{ + int i; + + if (!bvp) + return 1; + + for (i = 0; i < bvp->bSize; i++) + if (bvp->vect[i] != 0) + return 0; + + return 1; +} + +/*-----------------------------------------------------------------*/ +/* bitVectsEqual - returns 1 if the two bit vectors are equal */ +/*-----------------------------------------------------------------*/ +int +bitVectEqual (bitVect * bvp1, bitVect * bvp2) +{ + int i; + + if (!bvp1 || !bvp1) + return 0; + + if (bvp1 == bvp2) + return 1; + + if (bvp1->bSize != bvp2->bSize) + return 0; + + for (i = 0; i < bvp1->bSize; i++) + if (bvp1->vect[i] != bvp2->vect[i]) + return 0; + + return 1; +} + +/*-----------------------------------------------------------------*/ +/* bitVectCopy - creates a bitvector from another bit Vector */ +/*-----------------------------------------------------------------*/ +bitVect * +bitVectCopy (bitVect * bvp) +{ + bitVect *newBvp; + int i; + + if (!bvp) + return NULL; + + newBvp = newBitVect (bvp->size); + for (i = 0; i < bvp->bSize; i++) + newBvp->vect[i] = bvp->vect[i]; + + return newBvp; +} + +/*-----------------------------------------------------------------*/ +/* bitVectnBitsOn - returns the number of bits that are on */ +/*-----------------------------------------------------------------*/ +int +bitVectnBitsOn (bitVect * bvp) +{ + int i, j; + unsigned char byte; + int count = 0; + unsigned int *p1; + + /* The bit vector is highest to lowest. Interesting. */ + unsigned int mask[] = { + 0, 128, 128+64, 128+64+32, 128+64+32+16, + 128+64+32+16+8, 128+64+32+16+8+4, 128+64+32+16+8+4+2 + }; + + if (!bvp) + return 0; + + /* j is the number of bytes in the bitvect */ + j = (bvp->size+7) / 8; + + /* Fix up the highest bits in the top byte so that we can iterate over + all of them. */ + if (bvp->size%8 != 0) + { + bvp->vect[j-1] &= mask[bvp->size&7]; + } + + /* Take care of things in machine word chunks if possible. As we + are only counting bits it does not matter which order they are + counted in. + */ + i = 0; + p1 = (unsigned int *)bvp->vect; + + while ((j-i) >= sizeof(*p1)) + { + unsigned int word = *p1++; + while (word) + { + count++; + word &= word-1; + } + i += sizeof(*p1); + } + + /* Take care of the rest of the bitvect. */ + for (; i < j; i++) + { + byte = bvp->vect[i]; + while (byte) + { + count++; + byte &= byte-1; + } + } + return count; +} + +/*-----------------------------------------------------------------*/ +/* bitVectFirstBit - returns the key for the first bit that is on */ +/*-----------------------------------------------------------------*/ +int +bitVectFirstBit (bitVect * bvp) +{ + int i; + + if (!bvp) + return -1; + for (i = 0; i < bvp->size; i++) + if (bitVectBitValue (bvp, i)) + return i; + + return -1; +} + +/*-----------------------------------------------------------------*/ +/* bitVectDebugOn - prints bits that are on */ +/*-----------------------------------------------------------------*/ +void +bitVectDebugOn (bitVect * bvp, FILE * of) +{ + int i; + + if (of == NULL) + of = stdout; + if (!bvp) + return; + + fprintf (of, "bitvector Size = %d bSize = %d\n", bvp->size, bvp->bSize); + fprintf (of, "Bits on { "); + for (i = 0; i < bvp->size; i++) + { + if (bitVectBitValue (bvp, i)) + fprintf (of, "(%d) ", i); + } + fprintf (of, "}\n"); +} diff --git a/src/SDCCbitv.h b/src/SDCCbitv.h new file mode 100644 index 0000000..b20744b --- /dev/null +++ b/src/SDCCbitv.h @@ -0,0 +1,62 @@ +/*----------------------------------------------------------------- + SDCCbitv.h - contains support routines for bitVectors + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/* #include "SDCCglobl.h" */ +/* #include "SDCCsymt.h" */ + +#ifndef SDCCBITV_H +#define SDCCBITV_H + +/* bitvector */ +typedef struct bitVect + { + int size; + int bSize; + unsigned char *vect; + } +bitVect; + + +extern int bitVectDefault; +/*-----------------------------------------------------------------*/ +/* Forward definition for functions */ +/*-----------------------------------------------------------------*/ +/* bitvector related functions */ +bitVect *newBitVect (int); +void freeBitVect (bitVect *); +bitVect *bitVectResize (bitVect *, int); +bitVect *bitVectSetBit (bitVect *, int); +void bitVectUnSetBit (bitVect *, int); +int bitVectBitValue (bitVect *, int); +bitVect *bitVectUnion (bitVect *, bitVect *); +bitVect *bitVectIntersect (bitVect *, bitVect *); +int bitVectBitsInCommon (bitVect *, bitVect *); +bitVect *bitVectCplAnd (bitVect *, bitVect *); +int bitVectEqual (bitVect *, bitVect *); +bitVect *bitVectCopy (bitVect *); +int bitVectIsZero (bitVect *); +int bitVectnBitsOn (bitVect *); +int bitVectFirstBit (bitVect *); +void bitVectDebugOn (bitVect *, FILE *); +#endif diff --git a/src/SDCCcflow.c b/src/SDCCcflow.c new file mode 100644 index 0000000..505b2d7 --- /dev/null +++ b/src/SDCCcflow.c @@ -0,0 +1,460 @@ +/*------------------------------------------------------------------------- + + SDCCcflow.c - source file for control flow analysis + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" + +static void computeDFOrdering (eBBlock *, int *); + +/*-----------------------------------------------------------------*/ +/* domSetFromVect - creates a domset from the vector */ +/*-----------------------------------------------------------------*/ +static set * +domSetFromVect (ebbIndex *ebbi, bitVect * domVect) +{ + int i = 0; + set *domSet = NULL; + + if (!domVect) + return NULL; + + for (i = 0; i < domVect->size; i++) + if (bitVectBitValue (domVect, i)) + addSet (&domSet, ebbi->bbOrder[i]); + return domSet; +} + + +/*-----------------------------------------------------------------*/ +/* addSuccessor - will add bb to succ also add it to the pred of */ +/* the next one : */ +/*-----------------------------------------------------------------*/ +static void +addSuccessor (eBBlock * thisBlock, eBBlock * succ) +{ + /* check for boundary conditions */ + if (!thisBlock || !succ) + return; + + /* add it to the succ of thisBlock */ + addSetIfnotP (&thisBlock->succList, succ); + + thisBlock->succVect = + bitVectSetBit (thisBlock->succVect, succ->bbnum); + /* add this edge to the list of edges */ + addSet (&graphEdges, newEdge (thisBlock, succ)); + +} + +/*-----------------------------------------------------------------*/ +/* eBBPredecessors - find the predecessors for each block */ +/*-----------------------------------------------------------------*/ +static void +eBBPredecessors (ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->bbOrder; + int count = ebbi->count; + int i = 0, j; + + /* for each block do */ + for (i = 0; i < count; i++) + { + + /* if there is no path to this then continue */ + if (ebbs[i]->noPath) + continue; + + /* for each successor of this block if */ + /* it has depth first number > this block */ + /* then this block precedes the successor */ + for (j = 0; j < ebbs[i]->succVect->size; j++) + + if (bitVectBitValue (ebbs[i]->succVect, j) && + ebbs[j]->dfnum > ebbs[i]->dfnum) + + addSet (&ebbs[j]->predList, ebbs[i]); + } +} + +/*-----------------------------------------------------------------*/ +/* eBBSuccessors- find out the successors of all the nodes */ +/*-----------------------------------------------------------------*/ +static void +eBBSuccessors (ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->bbOrder; + int count = ebbi->count; + int i = 0; + + /* for all the blocks do */ + for (; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath) + continue; + + ebbs[i]->succVect = newBitVect (count); + + /* if the next on exists & this one does not */ + /* end in a GOTO or RETURN then the next is */ + /* a natural successor of this. Note we have */ + /* consider eBBlocks with no instructions */ + if (ebbs[i + 1]) + { + + if (ebbs[i]->ech) + { + if (ebbs[i]->ech->op != GOTO && + ebbs[i]->ech->op != RETURN && + ebbs[i]->ech->op != JUMPTABLE) + { + int j = i + 1; + + while (ebbs[j] && ebbs[j]->noPath) + j++; + + addSuccessor (ebbs[i], ebbs[j]); /* add it */ + } + else + { + if (i && ebbs[i-1]->ech && ebbs[i-1]->ech->op==IFX) { + ebbs[i]->isConditionalExitFrom=ebbs[i-1]; + } + } + } /* no instructions in the block */ + /* could happen for dummy blocks */ + else + addSuccessor (ebbs[i], ebbs[i + 1]); + } + + /* go thru all the instructions: if we find a */ + /* goto or ifx or a return then we have a succ */ + if ((ic = ebbs[i]->ech)) + { + eBBlock *succ; + + /* special case for jumptable */ + if (ic->op == JUMPTABLE) + { + symbol *lbl; + for (lbl = setFirstItem (IC_JTLABELS (ic)); lbl; + lbl = setNextItem (IC_JTLABELS (ic))) + addSuccessor (ebbs[i], + eBBWithEntryLabel (ebbi, lbl)); + } + else + { + + succ = NULL; + /* depending on the instruction operator */ + switch (ic->op) + { + case GOTO: /* goto has edge to label */ + succ = eBBWithEntryLabel (ebbi, ic->label); + break; + + case IFX: /* conditional jump */ + /* if true label is present */ + if (IC_TRUE (ic)) + succ = eBBWithEntryLabel (ebbi, IC_TRUE (ic)); + else + succ = eBBWithEntryLabel (ebbi, IC_FALSE (ic)); + break; + + case RETURN: /* block with return */ + succ = eBBWithEntryLabel (ebbi, returnLabel); + break; + } + + /* if there is a successor add to the list */ + /* if it is not already present in the list */ + if (succ) + addSuccessor (ebbs[i], succ); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* computeDominance - computes the dominance graph */ +/* for algorithm look at Dragon book section 10.10, algo 10.16 */ +/*-----------------------------------------------------------------*/ +static void +computeDominance (ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->bbOrder; + int count = ebbi->count; + int i, j; + + /* now do the initialisation */ + /* D(n0) := { n0 } */ + ebbs[0]->domVect = + bitVectSetBit (ebbs[0]->domVect = newBitVect (count), ebbs[0]->bbnum); + + + /* for n in N - { n0 } do D(n) = N */ + for (i = 1; i < count; i++) + { + ebbs[i]->domVect = newBitVect (count); + for (j = 0; j < count; j++) + { + ebbs[i]->domVect = + bitVectSetBit (ebbs[i]->domVect, ebbs[j]->bbnum); + } + } + + /* end of initialisation */ + + /* while changes to any D(n) occur do */ + /* for n in N - { n0 } do */ + /* D(n) := { n } U (intersection of D( all predecessors of n)) */ + while (1) + { + int change; + + change = 0; + for (i = 1; i < count; i++) + { + bitVect *cDomVect; + eBBlock *pred; + + cDomVect = NULL; + + /* get the intersection of the dominance of all predecessors */ + for (pred = setFirstItem (ebbs[i]->predList), + cDomVect = (pred ? bitVectCopy (pred->domVect) : NULL); + pred; + pred = setNextItem (ebbs[i]->predList)) + { + cDomVect = bitVectIntersect (cDomVect, pred->domVect); + } + if (!cDomVect) + cDomVect = newBitVect (count); + /* this node to the list */ + cDomVect = bitVectSetBit (cDomVect, ebbs[i]->bbnum); + + + if (!bitVectEqual (cDomVect, ebbs[i]->domVect)) + { + ebbs[i]->domVect = cDomVect; + change = 1; + } + } + + /* if no change then exit */ + if (!change) + break; + } + +} + +/*-----------------------------------------------------------------*/ +/* immedDom - returns the immediate dominator of a block */ +/*-----------------------------------------------------------------*/ +eBBlock * +immedDom (ebbIndex * ebbi, eBBlock * ebp) +{ + /* first delete self from the list */ + set *iset = domSetFromVect (ebbi, ebp->domVect); + eBBlock *loop; + eBBlock *idom = NULL; + + deleteSetItem (&iset, ebp); + /* then just return the one with the greatest */ + /* depthfirst number, this will be the immed dominator */ + if ((loop = setFirstItem (iset))) + idom = loop; + for (; loop; loop = setNextItem (iset)) + if (loop->dfnum > idom->dfnum) + idom = loop; + + setToNull ((void *) &iset); + return idom; + +} + +/*-----------------------------------------------------------------*/ +/* DFOrdering - is visited then nothing else call DFOrdering this */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (DFOrdering) +{ + eBBlock *ebbp = item; + V_ARG (int *, count); + + if (ebbp->visited) + return 0; + + computeDFOrdering (ebbp, count); /* depthfirst */ + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* computeDFOrdering - computes the depth first ordering of the */ +/* flowgraph */ +/*-----------------------------------------------------------------*/ +static void +computeDFOrdering (eBBlock * ebbp, int *count) +{ + + ebbp->visited = 1; + /* for each successor that is not visited */ + applyToSet (ebbp->succList, DFOrdering, count); + + /* set the depth first number */ + ebbp->dfnum = *count; + *count -= 1; +} + +/*-----------------------------------------------------------------*/ +/* disconBBlock - removes all control flow links for a block */ +/*-----------------------------------------------------------------*/ +void +disconBBlock (eBBlock * ebp, ebbIndex * ebbi) +{ + /* mark this block as noPath & recompute control flow */ + ebp->noPath = 1; + computeControlFlow (ebbi); +} + +/*-----------------------------------------------------------------*/ +/* markNoPath - marks those blocks which cannot be reached from top */ +/*-----------------------------------------------------------------*/ +static void +markNoPath (ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->bbOrder; + int count = ebbi->count; + int i; + + /* for all blocks if the visited flag is not set : then there */ + /* is no path from _entry to this block push them down in the */ + /* depth first order */ + for (i = 0; i < count; i++) + if (!ebbs[i]->visited) + ebbs[i]->noPath = 1; +} + +/*-----------------------------------------------------------------*/ +/* dfNumCompare - used by qsort to sort by dfNumber */ +/*-----------------------------------------------------------------*/ +int +dfNumCompare (const void *a, const void *b) +{ + const eBBlock *const *i = a; + const eBBlock *const *j = b; + + if ((*i)->dfnum > (*j)->dfnum) + return 1; + + if ((*i)->dfnum < (*j)->dfnum) + return -1; + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* computeControlFlow - does the control flow computation */ +/*-----------------------------------------------------------------*/ +void +computeControlFlow (ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->bbOrder; + int dfCount = ebbi->count; + int i; + + /* initialise some things */ + + for (i = 0; i < ebbi->count; i++) + { + setToNull ((void *) &ebbs[i]->predList); + setToNull ((void *) &ebbs[i]->domVect); + setToNull ((void *) &ebbs[i]->succList); + setToNull ((void *) &ebbs[i]->succVect); + ebbs[i]->visited = 0; + ebbs[i]->dfnum = 0; + } + + setToNull ((void *) &graphEdges); + /* this will put in the */ + /* successor information for each blk */ + eBBSuccessors (ebbi); + + /* compute the depth first ordering */ + computeDFOrdering (ebbi->bbOrder[0], &dfCount); + + /* mark blocks with no paths to them */ + markNoPath (ebbi); + + /* with the depth first info in place */ + /* add the predecessors for the blocks */ + eBBPredecessors (ebbi); + + /* compute the dominance graph */ + computeDominance (ebbi); + + /* sort it by dfnumber */ + if (!ebbi->dfOrder) + ebbi->dfOrder = Safe_alloc ((ebbi->count+1) * sizeof (eBBlock *)); + for (i = 0; i < (ebbi->count+1); i++) + { + ebbi->dfOrder[i] = ebbi->bbOrder[i]; + } + + qsort (ebbi->dfOrder, ebbi->count, sizeof (eBBlock *), dfNumCompare); + +} + +/*-----------------------------------------------------------------*/ +/* returnAtEnd - returns 1 if Basic Block has a return at the end */ +/* of it */ +/*-----------------------------------------------------------------*/ +int returnAtEnd (eBBlock *ebp) +{ + /* case 1. + This basic block ends in a return statment + */ + if (ebp->ech && ebp->ech->op == RETURN) return 1; + + /* case 2. + This basic block has only one successor and that + successor has only one return statement + */ + if (elementsInSet(ebp->succList) == 1) { + eBBlock *succ = setFirstItem(ebp->succList); + /* could happen for dummy blocks */ + if (!succ->sch || !succ->ech) return 0; + + /* first iCode is a return */ + if (succ->sch->op == RETURN) return 2; + + /* or first iCode is a label & the next & + last icode is a return */ + if (succ->sch->op == LABEL && succ->sch->next == succ->ech && + succ->ech->op == RETURN ) return 2; + } + + return 0; +} diff --git a/src/SDCCcflow.h b/src/SDCCcflow.h new file mode 100644 index 0000000..ef0b330 --- /dev/null +++ b/src/SDCCcflow.h @@ -0,0 +1,35 @@ +/*------------------------------------------------------------------------- + + SDCCcflow.h - header file for control flow analysis + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "SDCCset.h" + +#ifndef SDCCCFLOW_H +#define SDCCCFLOW_H 1 + +eBBlock *immedDom (ebbIndex *, eBBlock *); +void computeControlFlow (ebbIndex *); +void disconBBlock (eBBlock *, ebbIndex *); +int returnAtEnd (eBBlock *) ; +#endif diff --git a/src/SDCCcse.c b/src/SDCCcse.c new file mode 100644 index 0000000..1b43a42 --- /dev/null +++ b/src/SDCCcse.c @@ -0,0 +1,2371 @@ +/*------------------------------------------------------------------------- + SDCCcse.c - source file for Common Subexpressions and other utility + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" +#include "newalloc.h" +#include "dbuf_string.h" + + +/*-----------------------------------------------------------------*/ +/* newCseDef - new cseDef */ +/*-----------------------------------------------------------------*/ +cseDef * +newCseDef (operand * sym, iCode * ic) +{ + cseDef *cdp; + + assert (sym); + cdp = Safe_alloc (sizeof (cseDef)); + + cdp->sym = sym; + cdp->diCode = ic; + cdp->key = sym->key; + cdp->ancestors = newBitVect(iCodeKey); + cdp->fromGlobal = 0; + cdp->fromAddrTaken = 0; + + if (ic->op!=IF && ic->op!=JUMPTABLE) + { + if (IC_LEFT (ic) && IS_SYMOP (IC_LEFT (ic))) + { + bitVectSetBit (cdp->ancestors, IC_LEFT (ic)->key); + cdp->fromGlobal |= isOperandGlobal (IC_LEFT (ic)); + cdp->fromAddrTaken |= OP_SYMBOL (IC_LEFT (ic))->addrtaken; + } + if (IC_RIGHT (ic) && IS_SYMOP (IC_RIGHT (ic))) + { + bitVectSetBit (cdp->ancestors, IC_RIGHT (ic)->key); + cdp->fromGlobal |= isOperandGlobal (IC_RIGHT (ic)); + cdp->fromAddrTaken |= OP_SYMBOL (IC_RIGHT (ic))->addrtaken; + } + } + + return cdp; +} + +void +updateCseDefAncestors(cseDef *cdp, set * cseSet) +{ + cseDef *loop; + set *sl; + iCode *ic = cdp->diCode; + + if (ic->op!=IF && ic->op!=JUMPTABLE) + { + if (IC_LEFT (ic) && IS_SYMOP (IC_LEFT (ic))) + { + bitVectSetBit (cdp->ancestors, IC_LEFT (ic)->key); + for (sl = cseSet; sl; sl = sl->next) + { + loop = sl->item; + if (loop->sym->key == IC_LEFT (ic)->key) + { + cdp->ancestors = bitVectUnion (cdp->ancestors, loop->ancestors); + cdp->fromGlobal |= loop->fromGlobal; + cdp->fromAddrTaken |= loop->fromAddrTaken; + break; + } + } + } + if (IC_RIGHT (ic) && IS_SYMOP (IC_RIGHT (ic))) + { + bitVectSetBit (cdp->ancestors, IC_RIGHT (ic)->key); + for (sl = cseSet; sl; sl = sl->next) + { + loop = sl->item; + if (loop->sym->key == IC_RIGHT (ic)->key) + { + cdp->ancestors = bitVectUnion (cdp->ancestors, loop->ancestors); + cdp->fromGlobal |= loop->fromGlobal; + cdp->fromAddrTaken |= loop->fromAddrTaken; + break; + } + } + } + } +} + + +/*-----------------------------------------------------------------*/ +/* int isCseDefEqual - two definitions are equal */ +/*-----------------------------------------------------------------*/ +int +isCseDefEqual (void *vsrc, void *vdest) +{ + cseDef *src = vsrc; + cseDef *dest = vdest; + + if (src == dest) + return 1; + + return (src->key == dest->key && + src->diCode == dest->diCode); + +} + +/*-----------------------------------------------------------------*/ +/* pcseDef - in the cseDef */ +/*-----------------------------------------------------------------*/ +int +pcseDef (void *item, va_list ap) +{ + cseDef *cdp = item; + iCodeTable *icTab; + struct dbuf_s dbuf; + + (void) ap; + + if (!cdp->sym) + fprintf (stdout, "**null op**"); + printOperand (cdp->sym, stdout); + icTab = getTableEntry (cdp->diCode->op); + dbuf_init (&dbuf, 1024); + icTab->iCodePrint (&dbuf, cdp->diCode, icTab->printName); + dbuf_write_and_destroy (&dbuf, stdout); + return 1; +} + +void ReplaceOpWithCheaperOp(operand **op, operand *cop) { +#ifdef RANGEHUNT + printf ("ReplaceOpWithCheaperOp\n\t"); + printOperand (*op, stdout); + printf ("\nwith\t"); + printOperand (cop, stdout); + + // if op is a register equivalent + if (IS_ITEMP(cop) && IS_SYMOP((*op)) && OP_SYMBOL((*op))->isreqv) { + operand **rop = &OP_SYMBOL((*op))->usl.spillLoc->reqv; + if (isOperandEqual(*rop, *op)) { + printf ("true"); + *rop=cop; + OP_SYMBOL((*op))->isreqv=0; + OP_SYMBOL(cop)->isreqv=1; + } else { + printf ("false"); + } + } + printf ("\n"); +#endif + *op=cop; +} + +/*-----------------------------------------------------------------*/ +/* replaceAllSymBySym - replaces all operands by operand in an */ +/* instruction chain */ +/*-----------------------------------------------------------------*/ +void +replaceAllSymBySym (iCode * ic, operand * from, operand * to, bitVect ** ndpset) +{ + iCode *lic; + +#ifdef RANGEHUNT + printf ("replaceAllSymBySym\n\t"); + printOperand (from, stdout); + printf ("\nwith\t"); + printOperand (to, stdout); + printf ("\n"); +#endif + for (lic = ic; lic; lic = lic->next) + { + int isaddr; + + /* do the special cases first */ + if (lic->op == IFX) + { + if (IS_SYMOP (to) && + IC_COND (lic)->key == from->key) + { + + bitVectUnSetBit (OP_USES (from), lic->key); + OP_USES(to)=bitVectSetBit (OP_USES (to), lic->key); + isaddr = IC_COND (lic)->isaddr; + IC_COND (lic) = operandFromOperand (to); + IC_COND (lic)->isaddr = isaddr; + + } + continue; + } + + if (lic->op == JUMPTABLE) + { + if (IS_SYMOP (to) && + IC_JTCOND (lic)->key == from->key) + { + + bitVectUnSetBit (OP_USES (from), lic->key); + OP_USES(to)=bitVectSetBit (OP_USES (to), lic->key); + isaddr = IC_COND (lic)->isaddr; + IC_JTCOND (lic) = operandFromOperand (to); + IC_JTCOND (lic)->isaddr = isaddr; + + } + continue; + } + + if (IS_SYMOP(to) && + IC_RESULT (lic) && IC_RESULT (lic)->key == from->key) + { + /* maintain du chains */ + if (POINTER_SET (lic)) + { + bitVectUnSetBit (OP_USES (from), lic->key); + OP_USES(to)=bitVectSetBit (OP_USES (to), lic->key); + + /* also check if the "from" was in the non-dominating + pointer sets and replace it with "to" in the bitVector */ + if (bitVectBitValue (*ndpset, from->key)) + { + bitVectUnSetBit (*ndpset, from->key); + bitVectSetBit (*ndpset, to->key); + } + + } + else + { + bitVectUnSetBit (OP_DEFS (from), lic->key); + OP_DEFS(to)=bitVectSetBit (OP_DEFS (to), lic->key); + } + isaddr = IC_RESULT (lic)->isaddr; + IC_RESULT (lic) = operandFromOperand (to); + IC_RESULT (lic)->isaddr = isaddr; + } + + if (IS_SYMOP (to) && + IC_RIGHT (lic) && IC_RIGHT (lic)->key == from->key) + { + bitVectUnSetBit (OP_USES (from), lic->key); + OP_USES(to)=bitVectSetBit (OP_USES (to), lic->key); + isaddr = IC_RIGHT (lic)->isaddr; + IC_RIGHT (lic) = operandFromOperand (to); + IC_RIGHT (lic)->isaddr = isaddr; + } + + if (IS_SYMOP (to) && + IC_LEFT (lic) && IC_LEFT (lic)->key == from->key) + { + bitVectUnSetBit (OP_USES (from), lic->key); + OP_USES(to)=bitVectSetBit (OP_USES (to), lic->key); + isaddr = IC_LEFT (lic)->isaddr; + IC_LEFT (lic) = operandFromOperand (to); + IC_LEFT (lic)->isaddr = isaddr; + } + } +} + +/*-----------------------------------------------------------------*/ +/* iCodeKeyIs - if the icode keys match then return 1 */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (iCodeKeyIs) +{ + cseDef *cdp = item; + V_ARG (int, key); + + if (cdp->diCode->key == key) + return 1; + else + return 0; +} + +/*-----------------------------------------------------------------*/ +/* removeFromInExprs - removes an icode from inexpressions */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (removeFromInExprs) +{ + eBBlock *ebp = item; + V_ARG (iCode *, ic); + V_ARG (operand *, from); + V_ARG (operand *, to); + V_ARG (eBBlock *, cbp); + + if (ebp->visited) + return 0; + + ebp->visited = 1; + deleteItemIf (&ebp->inExprs, iCodeKeyIs, ic->key); + if (ebp != cbp && !bitVectBitValue (cbp->domVect, ebp->bbnum)) + replaceAllSymBySym (ebp->sch, from, to, &ebp->ndompset); + + applyToSet (ebp->succList, removeFromInExprs, ic, from, to, cbp); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* isGlobalInNearSpace - return TRUE if valriable is a globalin data */ +/*-----------------------------------------------------------------*/ +static bool +isGlobalInNearSpace (operand * op) +{ + sym_link *type = getSpec (operandType (op)); + /* this is 8051 specific: optimization + suggested by Jean-Louis VERN, with 8051s we have no + advantage of putting variables in near space into + registers */ + if (isOperandGlobal (op) && !IN_FARSPACE (SPEC_OCLS (type)) && + IN_DIRSPACE (SPEC_OCLS (type))) + return TRUE; + else + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* findCheaperOp - cseBBlock support routine, will check to see if */ +/* we have a operand previously defined */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (findCheaperOp) +{ + cseDef *cdp = item; + V_ARG (operand *, cop); + V_ARG (operand **, opp); + V_ARG (int, checkSign); + + /* if we have already found it */ + if (*opp) + return 1; + + /* not found it yet check if this is the one */ + /* and this is not the defining one */ + if (cop->key == cdp->key) + { + + /* do a special check this will help in */ + /* constant propagation & dead code elim */ + /* for assignments only */ + if (cdp->diCode->op == '=') { + /* if the result is volatile then return result */ + if (IS_OP_VOLATILE (IC_RESULT (cdp->diCode))) + *opp = IC_RESULT (cdp->diCode); + else + /* if this is a straight assignment and + left is a temp then prefer the temporary to the + true symbol */ + if (!POINTER_SET (cdp->diCode) && + IS_ITEMP (IC_RESULT (cdp->diCode)) && + IS_TRUE_SYMOP (IC_RIGHT (cdp->diCode))) + *opp = IC_RESULT (cdp->diCode); + else { + /* if straight assignment and both + are temps then prefer the one that + will not need extra space to spil, also + take into consideration if right side + is an induction variable + */ + if (!POINTER_SET (cdp->diCode) && + IS_ITEMP (IC_RESULT (cdp->diCode)) && + IS_ITEMP (IC_RIGHT (cdp->diCode)) && + !OP_SYMBOL (IC_RIGHT (cdp->diCode))->isind && + !OP_SYMBOL(IC_RIGHT (cdp->diCode))->isreqv && + ((!SPIL_LOC (IC_RIGHT (cdp->diCode)) && + SPIL_LOC (IC_RESULT (cdp->diCode))) || + (SPIL_LOC (IC_RESULT (cdp->diCode)) && + SPIL_LOC (IC_RESULT (cdp->diCode)) == + SPIL_LOC (IC_RIGHT (cdp->diCode))))) + *opp = IC_RESULT (cdp->diCode); + else + *opp = IC_RIGHT (cdp->diCode); + } + } + else + *opp = IC_RESULT (cdp->diCode); + } + + /* if this is an assign to a temp. then check + if the right side is this then return this */ + if (IS_TRUE_SYMOP (cop) && + cdp->diCode->op == '=' && + !POINTER_SET (cdp->diCode) && + cop->key == IC_RIGHT (cdp->diCode)->key && + !isGlobalInNearSpace (IC_RIGHT (cdp->diCode)) && + IS_ITEMP (IC_RESULT (cdp->diCode))) + *opp = IC_RESULT (cdp->diCode); + + if ((*opp) && + (isOperandLiteral(*opp) || !checkSign || + (checkSign && + IS_SPEC(operandType (cop)) && IS_SPEC(operandType (*opp)) && + (SPEC_USIGN(operandType (cop))==SPEC_USIGN(operandType (*opp)) && + (SPEC_LONG(operandType (cop))==SPEC_LONG(operandType (*opp))))))) + { + + if ((isGlobalInNearSpace (cop) && + !isOperandLiteral (*opp)) || + isOperandVolatile (*opp, FALSE) + ) + { + *opp = NULL; + return 0; + } + + if (cop->key == (*opp)->key) + { + *opp = NULL; + return 0; + } + + if ((*opp)->isaddr != cop->isaddr && IS_ITEMP (cop)) + { + *opp = operandFromOperand (*opp); + (*opp)->isaddr = cop->isaddr; + } + + /* copy signedness to literal operands */ + if (IS_SPEC(operandType (cop)) && IS_SPEC(operandType (*opp)) + && isOperandLiteral(*opp) + && SPEC_NOUN(operandType(*opp)) == SPEC_NOUN(operandType(cop)) + && SPEC_USIGN(operandType(*opp)) != SPEC_USIGN(operandType(cop))) + { + SPEC_USIGN(operandType(*opp)) = SPEC_USIGN(operandType(cop)); + } + + if (IS_SPEC(operandType (cop)) && IS_SPEC(operandType (*opp)) && + SPEC_NOUN(operandType(cop)) != SPEC_NOUN(operandType(*opp))) + { + // special case: we can make an unsigned char literal + // into an int literal with no cost. + if (isOperandLiteral(*opp) + && SPEC_NOUN(operandType(*opp)) == V_CHAR + && SPEC_NOUN(operandType(cop)) == V_INT) + { + *opp = operandFromOperand (*opp); + SPEC_NOUN(operandType(*opp)) = V_INT; + } + else + { + // No clue... + *opp = NULL; + return 0; + } + + } + + return 1; + + } + *opp=NULL; + return 0; +} + +/*-----------------------------------------------------------------*/ +/* findPointerSet - finds the right side of a pointer set op */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (findPointerSet) +{ + cseDef *cdp = item; + V_ARG (operand *, op); + V_ARG (operand **, opp); + V_ARG (operand *, rop); + + if (POINTER_SET (cdp->diCode) && + IC_RESULT (cdp->diCode)->key == op->key && + !isOperandVolatile (IC_RESULT (cdp->diCode), TRUE) && + !isOperandVolatile (IC_RIGHT (cdp->diCode), TRUE) && + getSize (operandType (IC_RIGHT (cdp->diCode))) == + getSize (operandType (rop))) + { + if (IS_SPEC (operandType (IC_RIGHT (cdp->diCode))) && + SPEC_USIGN (operandType (IC_RIGHT (cdp->diCode))) != + SPEC_USIGN (operandType (rop))) + { + /* bug #1493710 + Reminder for Bernhard: check of signedness + could be unnecessary together with 'checkSign', if + signedness of operation is stored in ic */ + return 0; + } + *opp = IC_RIGHT (cdp->diCode); + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* findPrevIc - cseBBlock support function will return the iCode */ +/* which matches the current one */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (findPrevIc) +{ + cseDef *cdp = item; + V_ARG (iCode *, ic); + V_ARG (iCode **, icp); + + /* if already found */ + if (*icp) + return 1; + + /* if the iCodes are the same */ + if (isiCodeEqual (ic, cdp->diCode) && + isOperandEqual (cdp->sym, IC_RESULT (cdp->diCode))) + { + *icp = cdp->diCode; + return 1; + } + + /* if iCodes are not the same */ + /* see the operands maybe interchanged */ + if (ic->op == cdp->diCode->op && + IS_ASSOCIATIVE(ic) && + isOperandEqual (IC_LEFT (ic), IC_RIGHT (cdp->diCode)) && + isOperandEqual (IC_RIGHT (ic), IC_LEFT (cdp->diCode))) + { + *icp = cdp->diCode; + return 1; + } + + return 0; +} + +/*-------------------------------------------------------------------*/ +/* ifAssignedFromGlobal - if definition is an assignment from global */ +/*-------------------------------------------------------------------*/ +DEFSETFUNC (ifAssignedFromGlobal) +{ + cseDef *cdp = item; + iCode *dic=cdp->diCode; + + if (dic->op=='=' && isOperandGlobal(IC_RIGHT(dic))) { + return 1; + } + return 0; +} + +/*-------------------------------------------------------------------*/ +/* ifFromGlobal - if definition is derived from global */ +/*-------------------------------------------------------------------*/ +DEFSETFUNC (ifFromGlobal) +{ + cseDef *cdp = item; + + return cdp->fromGlobal; +} + +/*-----------------------------------------------------------------*/ +/* ifDefGlobal - if definition is global */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (ifDefGlobal) +{ + cseDef *cdp = item; + + return (isOperandGlobal (cdp->sym)); +} + +/*-------------------------------------------------------------------*/ +/* ifFromAddrTaken - if definition is derived from a symbol whose */ +/* address was taken */ +/*-------------------------------------------------------------------*/ +DEFSETFUNC (ifFromAddrTaken) +{ + cseDef *cdp = item; + + return cdp->fromAddrTaken; +} + + +/*-----------------------------------------------------------------*/ +/* ifAnyGetPointer - if get pointer icode */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (ifAnyGetPointer) +{ + cseDef *cdp = item; + + if (cdp->diCode && POINTER_GET (cdp->diCode)) + return 1; + return 0; +} + +/*-----------------------------------------------------------------*/ +/* ifOperandsHave - if any of the operand are the same as this */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (ifOperandsHave) +{ + cseDef *cdp = item; + V_ARG (operand *, op); + + if (bitVectBitValue(cdp->ancestors, op->key)) + return 1; + + if (IC_LEFT (cdp->diCode) && + IS_SYMOP (IC_LEFT (cdp->diCode)) && + IC_LEFT (cdp->diCode)->key == op->key) + return 1; + + if (IC_RIGHT (cdp->diCode) && + IS_SYMOP (IC_RIGHT (cdp->diCode)) && + IC_RIGHT (cdp->diCode)->key == op->key) + return 1; + + /* or if any of the operands are volatile */ + if (IC_LEFT (cdp->diCode) && + IS_OP_VOLATILE (IC_LEFT (cdp->diCode))) + return 1; + + if (IC_RIGHT (cdp->diCode) && + IS_OP_VOLATILE (IC_RIGHT (cdp->diCode))) + return 1; + + + if (IC_RESULT (cdp->diCode) && + IS_OP_VOLATILE (IC_RESULT (cdp->diCode))) + return 1; + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* ifDefSymIs - if a definition is found in the set */ +/*-----------------------------------------------------------------*/ +int +ifDefSymIs (set * cseSet, operand * sym) +{ + cseDef *loop; + set *sl; + + if (!sym || !IS_SYMOP (sym)) + return 0; + for (sl = cseSet; sl; sl = sl->next) + { + loop = sl->item; + if (loop->sym->key == sym->key) + return 1; + } + return 0; +} + + +/*-----------------------------------------------------------------*/ +/* ifDefSymIsX - will return 1 if the symbols match */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (ifDefSymIsX) +{ + cseDef *cdp = item; + V_ARG (operand *, op); + int match; + + if (op && cdp->sym) + match = cdp->sym->key == op->key; + else + match = (isOperandEqual (cdp->sym, op)); + #if 0 + if (match) + printf("%s ",OP_SYMBOL(cdp->sym)->name); + #endif + return match; +} + + +/*-----------------------------------------------------------------*/ +/* ifDiCodeIs - returns true if diCode is same */ +/*-----------------------------------------------------------------*/ +int +ifDiCodeIs (set * cseSet, iCode * ic) +{ + cseDef *loop; + set *sl; + + if (!ic) + return 0; + + for (sl = cseSet; sl; sl = sl->next) + { + loop = sl->item; + if (loop->diCode == ic) + return 1; + } + return 0; + +} + +/*-----------------------------------------------------------------*/ +/* ifPointerGet - returns true if the icode is pointer get sym */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (ifPointerGet) +{ + cseDef *cdp = item; + V_ARG (operand *, op); + iCode *dic = cdp->diCode; + operand *left = IC_LEFT (cdp->diCode); + + if (POINTER_GET (dic) && left->key == op->key) + return 1; + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* ifPointerSet - returns true if the icode is pointer set sym */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (ifPointerSet) +{ + cseDef *cdp = item; + V_ARG (operand *, op); + + if (POINTER_SET (cdp->diCode) && + IC_RESULT (cdp->diCode)->key == op->key) + return 1; + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* ifDiCodeIsX - will return 1 if the symbols match */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (ifDiCodeIsX) +{ + cseDef *cdp = item; + V_ARG (iCode *, ic); + + return cdp->diCode == ic; + +} + +/*-----------------------------------------------------------------*/ +/* findBackwardDef - scan backwards to find deinition of operand */ +/*-----------------------------------------------------------------*/ +iCode *findBackwardDef(operand *op,iCode *ic) +{ + iCode *lic; + + for (lic = ic; lic ; lic = lic->prev) { + if (IC_RESULT(lic) && isOperandEqual(op,IC_RESULT(lic))) + return lic; + } + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* algebraicOpts - does some algebraic optimizations */ +/*-----------------------------------------------------------------*/ +static void +algebraicOpts (iCode * ic, eBBlock * ebp) +{ + /* we don't deal with the following iCodes + here */ + if (ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP || + ic->op == CALL || + ic->op == PCALL || + ic->op == RETURN || + POINTER_GET (ic)) + return; + + /* if both operands present & ! IFX */ + /* then if they are both literal we */ + /* perform the operation right now */ + if (IC_RESULT (ic) && + IC_RIGHT (ic) && + IC_LEFT (ic) && + IS_OP_LITERAL (IC_LEFT (ic)) && + IS_OP_LITERAL (IC_RIGHT (ic))) + { + + IC_RIGHT (ic) = operandOperation (IC_LEFT (ic), + IC_RIGHT (ic), + ic->op, + operandType (IC_RESULT (ic))); + ic->op = '='; + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + return; + + } + /* if not ifx & only one operand present */ + if (IC_RESULT (ic) && + IC_LEFT (ic) && + IS_OP_LITERAL (IC_LEFT (ic)) && + !IC_RIGHT (ic)) + { + + IC_RIGHT (ic) = operandOperation (IC_LEFT (ic), + IC_RIGHT (ic), + ic->op, + operandType (IC_RESULT (ic))); + ic->op = '='; + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + return; + } + + + /* a special case : or in short a kludgy solution will think + about a better solution over a glass of wine someday */ + if (ic->op == GET_VALUE_AT_ADDRESS) + { + + if (IS_ITEMP (IC_RESULT (ic)) && + IS_TRUE_SYMOP (IC_LEFT (ic))) + { + + ic->op = '='; + IC_RIGHT (ic) = operandFromOperand (IC_LEFT (ic)); + IC_RIGHT (ic)->isaddr = 0; + IC_LEFT (ic) = NULL; + IC_RESULT (ic) = operandFromOperand (IC_RESULT (ic)); + IC_RESULT (ic)->isaddr = 0; + setOperandType (IC_RESULT (ic), operandType (IC_RIGHT (ic))); + return; + } + + if (IS_ITEMP (IC_LEFT (ic)) && + IS_ITEMP (IC_RESULT (ic)) && +/* !OP_SYMBOL(IC_RESULT(ic))->isreqv && */ +/* !OP_SYMBOL(IC_LEFT(ic))->isreqv && */ + !IC_LEFT (ic)->isaddr) + { + ic->op = '='; + IC_RIGHT (ic) = operandFromOperand (IC_LEFT (ic)); + IC_RIGHT (ic)->isaddr = 0; + IC_RESULT (ic) = operandFromOperand (IC_RESULT (ic)); + IC_RESULT (ic)->isaddr = 0; + IC_LEFT (ic) = NULL; + return; + } + + } + + + /* depending on the operation */ + switch (ic->op) + { + case '+': + /* if adding the same thing change to left shift by 1 */ + if (IC_LEFT (ic)->key == IC_RIGHT (ic)->key && + !(IS_FLOAT (operandType (IC_RESULT (ic))) + || IS_FIXED(operandType (IC_RESULT (ic))))) + { + ic->op = LEFT_OP; + IC_RIGHT (ic) = operandFromLit (1); + return; + } + /* if addition then check if one of them is a zero */ + /* if yes turn it into assignment or cast */ + if (IS_OP_LITERAL (IC_LEFT (ic)) && + operandLitValue (IC_LEFT (ic)) == 0.0) + { + int typematch; + typematch = compareType (operandType (IC_RESULT (ic)), + operandType (IC_RIGHT (ic))); + if ((typematch<0) || (IS_TRUE_SYMOP (IC_RIGHT (ic)))) + { + ic->op = CAST; + IC_LEFT (ic) = operandFromLink (operandType (IC_RESULT (ic))); + } + else + { + ic->op = '='; + IC_LEFT (ic) = NULL; + if (typematch==0) + { + /* for completely different types, preserve the source type */ + IC_RIGHT (ic) = operandFromOperand (IC_RIGHT (ic)); + setOperandType (IC_RIGHT (ic), operandType (IC_RESULT (ic))); + } + } + SET_ISADDR (IC_RESULT (ic), 0); + SET_ISADDR (IC_RIGHT (ic), 0); + return; + } + if (IS_OP_LITERAL (IC_RIGHT (ic)) && + operandLitValue (IC_RIGHT (ic)) == 0.0) + { + int typematch; + typematch = compareType (operandType (IC_RESULT (ic)), + operandType (IC_LEFT (ic))); + if ((typematch<0) || (IS_TRUE_SYMOP (IC_LEFT (ic)))) + { + ic->op = CAST; + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = operandFromLink (operandType (IC_RESULT (ic))); + } + else + { + ic->op = '='; + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = NULL; + if (typematch==0) + { + /* for completely different types, preserve the source type */ + IC_RIGHT (ic) = operandFromOperand (IC_RIGHT (ic)); + setOperandType (IC_RIGHT (ic), operandType (IC_RESULT (ic))); + } + } + SET_ISADDR (IC_RIGHT (ic), 0); + SET_ISADDR (IC_RESULT (ic), 0); + return; + } + break; + case '-': + /* if subtracting the same thing then zero */ + if (IC_LEFT (ic)->key == IC_RIGHT (ic)->key) + { + ic->op = '='; + IC_RIGHT (ic) = operandFromLit (0); + IC_LEFT (ic) = NULL; + IC_RESULT (ic) = operandFromOperand (IC_RESULT (ic)); + IC_RESULT (ic)->isaddr = 0; + return; + } + + /* if subtraction then check if one of the operand */ + /* is zero then depending on which operand change */ + /* to assignment or unary minus */ + if (IS_OP_LITERAL (IC_RIGHT (ic)) && + operandLitValue (IC_RIGHT (ic)) == 0.0) + { + /* right size zero change to assignment */ + ic->op = '='; + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = NULL; + SET_ISADDR (IC_RIGHT (ic), 0); + SET_ISADDR (IC_RESULT (ic), 0); + return; + } + if (IS_OP_LITERAL (IC_LEFT (ic)) && + operandLitValue (IC_LEFT (ic)) == 0.0) + { + /* left zero turn into an unary minus */ + ic->op = UNARYMINUS; + IC_LEFT (ic) = IC_RIGHT (ic); + IC_RIGHT (ic) = NULL; + return; + } + break; + /* if multiplication then check if either of */ + /* them is zero then the result is zero */ + /* if either of them is one then result is */ + /* the other one */ + case '*': + if (IS_OP_LITERAL (IC_LEFT (ic))) + { + double leftValue = operandLitValue (IC_LEFT (ic)); + + if (leftValue == 0.0) + { + ic->op = '='; + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + return; + } + if (leftValue == 1.0) + { + /* '*' can have two unsigned chars as operands */ + /* and an unsigned int as result. */ + if (compareType (operandType (IC_RESULT (ic)), + operandType (IC_RIGHT (ic))) == 1) + { + ic->op = '='; + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + } + else + { + ic->op = CAST; + IC_LEFT (ic) = operandFromOperand (IC_LEFT (ic)); + IC_LEFT (ic)->type = TYPE; + IC_LEFT (ic)->isLiteral = 0; + setOperandType (IC_LEFT (ic), operandType (IC_RESULT (ic))); + } + return; + } + if (leftValue == -1.0) + { + /* convert -1 * x to -x */ + ic->op = UNARYMINUS; + IC_LEFT (ic) = IC_RIGHT (ic); + IC_RIGHT (ic) = NULL; + return; + } + } + + if (IS_OP_LITERAL (IC_RIGHT (ic))) + { + double rightValue = operandLitValue (IC_RIGHT (ic)); + + if (rightValue == 0.0) + { + ic->op = '='; + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + return; + } + + if (rightValue == 1.0) + { + /* '*' can have two unsigned chars as operands */ + /* and an unsigned int as result. */ + if (compareType (operandType (IC_RESULT (ic)), + operandType (IC_LEFT (ic))) == 1) + { + ic->op = '='; + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + } + else + { + operand *op; + + ic->op = CAST; + op = IC_RIGHT (ic); + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = operandFromOperand (op); + IC_LEFT (ic)->type = TYPE; + IC_LEFT (ic)->isLiteral = 0; + setOperandType (IC_LEFT (ic), operandType (IC_RESULT (ic))); + } + return; + } + if (rightValue == -1.0) + { + /* '*' can have two unsigned chars as operands */ + /* and an unsigned int as result. */ + if (IS_INTEGRAL (operandType (IC_LEFT (ic)))) + { + if ((getSize (operandType (IC_LEFT (ic))) < (unsigned int) INTSIZE) && + (getSize (operandType (IC_LEFT (ic))) < getSize (operandType (IC_RESULT (ic))))) + { + operand * op; + iCode * newic; + /* Widen to int. */ + op = operandFromOperand (IC_RESULT (ic)); + op->type = TYPE; + setOperandType (op, INTTYPE); + newic = newiCode (CAST, op, IC_LEFT (ic)); + IC_RESULT (newic) = newiTempOperand (INTTYPE, TRUE); + addiCodeToeBBlock (ebp, newic, ic); + IC_LEFT (ic) = IC_RESULT (newic); + } + } + /* convert x * -1 to -x */ + ic->op = UNARYMINUS; + IC_RIGHT (ic) = NULL; + return; + } + } + break; + case '/': + /* if division by self then 1 */ + if (IC_LEFT (ic)->key == IC_RIGHT (ic)->key) + { + ic->op = '='; + IC_RIGHT (ic) = operandFromLit (1); + IC_LEFT (ic) = NULL; + IC_RESULT (ic) = operandFromOperand (IC_RESULT (ic)); + IC_RESULT (ic)->isaddr = 0; + return; + } + /* if this is a division then check if left is zero */ + /* and right is not then change it to an assignment */ + if (IS_OP_LITERAL (IC_LEFT (ic)) && IS_OP_LITERAL (IC_RIGHT (ic)) && + (operandLitValue (IC_LEFT (ic)) == 0.0) && (operandLitValue (IC_RIGHT (ic)) != 0.0)) + { + ic->op = '='; + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + return; + } + /* if this is a division then check if right */ + /* is one then change it to an assignment */ + if (IS_OP_LITERAL (IC_RIGHT (ic))) + { + double rightValue = operandLitValue (IC_RIGHT (ic)); + if (rightValue == 1.0) + { + ic->op = '='; + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + return; + } + if (rightValue == -1.0) + { + /* '/' can have two unsigned chars as operands */ + /* and an unsigned int as result. */ + if (IS_INTEGRAL (operandType (IC_LEFT (ic)))) + { + if ((getSize (operandType (IC_LEFT (ic))) < (unsigned int) INTSIZE) && + (getSize (operandType (IC_LEFT (ic))) < getSize (operandType (IC_RESULT (ic))))) + { + operand * op; + iCode * newic; + /* Widen to int. */ + op = operandFromOperand (IC_RESULT (ic)); + op->type = TYPE; + setOperandType (op, INTTYPE); + newic = newiCode (CAST, op, IC_LEFT (ic)); + IC_RESULT (newic) = newiTempOperand (INTTYPE, TRUE); + addiCodeToeBBlock (ebp, newic, ic); + IC_LEFT (ic) = IC_RESULT (newic); + } + } + /* convert x / -1 to -x */ + ic->op = UNARYMINUS; + IC_RIGHT (ic) = NULL; + return; + } + } + break; + /* if both are the same for an comparison operators */ + case EQ_OP: + case LE_OP: + case GE_OP: + if (isOperandEqual (IC_LEFT (ic), IC_RIGHT (ic))) + { + ic->op = '='; + IC_RIGHT (ic) = operandFromLit (1); + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + } + break; + case NE_OP: + case '>': + case '<': + if (isOperandEqual (IC_LEFT (ic), IC_RIGHT (ic))) + { + ic->op = '='; + IC_RIGHT (ic) = operandFromLit (0); + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + } + break; + case CAST: + { + sym_link *otype = operandType(IC_RIGHT(ic)); + sym_link *ctype = operandType(IC_LEFT(ic)); + /* if this is a cast of a literal value */ + if (IS_OP_LITERAL (IC_RIGHT (ic)) && + !(IS_GENPTR(ctype) && (IS_PTR(otype) && !IS_GENPTR(otype)))) + { + ic->op = '='; + IC_RIGHT (ic) = operandFromValue (valCastLiteral (operandType (IC_LEFT (ic)), + operandLitValue (IC_RIGHT (ic)))); + IC_LEFT (ic) = NULL; + SET_ISADDR (IC_RESULT (ic), 0); + } + /* if casting to the same */ + if (compareType (operandType (IC_RESULT (ic)), operandType (IC_RIGHT (ic))) == 1) + { + ic->op = '='; + IC_LEFT (ic) = NULL; + SET_ISADDR (IC_RESULT (ic), 0); + } + } + break; + case '!': + if (IS_OP_LITERAL (IC_LEFT (ic))) + { + ic->op = '='; + IC_RIGHT (ic) = + (operandLitValue (IC_LEFT (ic)) == 0 ? + operandFromLit (1) : operandFromLit (0)); + IC_LEFT (ic) = NULL; + SET_ISADDR (IC_RESULT (ic), 0); + } + break; + case BITWISEAND: + /* if both operands are equal */ + /* if yes turn it into assignment */ + if (isOperandEqual (IC_LEFT (ic), IC_RIGHT (ic))) + { + if (IS_OP_VOLATILE (IC_LEFT (ic))) + { + iCode *newic = newiCode (DUMMY_READ_VOLATILE, NULL, IC_LEFT (ic)); + IC_RESULT (newic) = IC_LEFT (ic); + newic->filename = ic->filename; + newic->lineno = ic->lineno; + addiCodeToeBBlock (ebp, newic, ic->next); + } + ic->op = '='; + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + return; + } + /* swap literal to right ic */ + if (IS_OP_LITERAL (IC_LEFT (ic))) + { + operand *op; + + op = IC_LEFT (ic); + IC_LEFT (ic) = IC_RIGHT (ic); + IC_RIGHT (ic) = op; + } + if (IS_OP_LITERAL (IC_RIGHT (ic))) + { + /* if BITWISEAND then check if one of them is a zero */ + /* if yes turn it into 0 assignment */ + if (operandLitValue (IC_RIGHT (ic)) == 0.0) + { + if (IS_OP_VOLATILE (IC_LEFT (ic))) + { + iCode *newic = newiCode (DUMMY_READ_VOLATILE, NULL, IC_LEFT (ic)); + IC_RESULT (newic) = IC_LEFT (ic); + newic->filename = ic->filename; + newic->lineno = ic->lineno; + addiCodeToeBBlock (ebp, newic, ic->next); + } + ic->op = '='; + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + return; + } + /* if BITWISEAND then check if one of them is 0xff... */ + /* if yes turn it into assignment */ + { + unsigned val; + + switch (getSize (operandType (IC_RIGHT (ic)))) + { + case 1: + val = 0xff; + break; + case 2: + val = 0xffff; + break; + case 4: + val = 0xffffffff; + break; + default: + return; + } + if (((unsigned) double2ul (operandLitValue (IC_RIGHT (ic))) & val) == val) + { + ic->op = '='; + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + return; + } + } + } + break; + case '|': + /* if both operands are equal */ + /* if yes turn it into assignment */ + if (isOperandEqual (IC_LEFT (ic), IC_RIGHT (ic))) + { + if (IS_OP_VOLATILE (IC_LEFT (ic))) + { + iCode *newic = newiCode (DUMMY_READ_VOLATILE, NULL, IC_LEFT (ic)); + IC_RESULT (newic) = IC_LEFT (ic); + newic->filename = ic->filename; + newic->lineno = ic->lineno; + addiCodeToeBBlock (ebp, newic, ic->next); + } + ic->op = '='; + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + return; + } + /* swap literal to right ic */ + if (IS_OP_LITERAL (IC_LEFT (ic))) + { + operand *op; + + op = IC_LEFT (ic); + IC_LEFT (ic) = IC_RIGHT (ic); + IC_RIGHT (ic) = op; + } + if (IS_OP_LITERAL (IC_RIGHT (ic))) + { + /* if BITWISEOR then check if one of them is a zero */ + /* if yes turn it into assignment */ + if (operandLitValue (IC_RIGHT (ic)) == 0.0) + { + ic->op = '='; + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + return; + } + /* if BITWISEOR then check if one of them is 0xff... */ + /* if yes turn it into 0xff... assignment */ + { + unsigned val; + + switch (getSize (operandType (IC_RIGHT (ic)))) + { + case 1: + val = 0xff; + break; + case 2: + val = 0xffff; + break; + case 4: + val = 0xffffffff; + break; + default: + return; + } + if (((unsigned) double2ul (operandLitValue (IC_RIGHT (ic))) & val) == val) + { + if (IS_OP_VOLATILE (IC_LEFT (ic))) + { + iCode *newic = newiCode (DUMMY_READ_VOLATILE, NULL, IC_LEFT (ic)); + IC_RESULT (newic) = IC_LEFT (ic); + newic->filename = ic->filename; + newic->lineno = ic->lineno; + addiCodeToeBBlock (ebp, newic, ic->next); + } + ic->op = '='; + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + return; + } + } + } + break; + case '^': + /* if both operands are equal */ + /* if yes turn it into 0 assignment */ + if (isOperandEqual (IC_LEFT (ic), IC_RIGHT (ic))) + { + if (IS_OP_VOLATILE (IC_LEFT (ic))) + { + iCode *newic = newiCode (DUMMY_READ_VOLATILE, NULL, IC_LEFT (ic)); + IC_RESULT (newic) = IC_LEFT (ic); + newic->filename = ic->filename; + newic->lineno = ic->lineno; + addiCodeToeBBlock (ebp, newic, ic->next); + + newic = newiCode (DUMMY_READ_VOLATILE, NULL, IC_LEFT (ic)); + IC_RESULT (newic) = IC_LEFT (ic); + newic->filename = ic->filename; + newic->lineno = ic->lineno; + addiCodeToeBBlock (ebp, newic, ic->next); + } + ic->op = '='; + IC_RIGHT (ic) = operandFromLit (0); + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + return; + } + /* swap literal to right ic */ + if (IS_OP_LITERAL (IC_LEFT (ic))) + { + operand *op; + + op = IC_LEFT (ic); + IC_LEFT (ic) = IC_RIGHT (ic); + IC_RIGHT (ic) = op; + } + /* if XOR then check if one of them is a zero */ + /* if yes turn it into assignment */ + if (IS_OP_LITERAL (IC_RIGHT (ic))) + { + if (operandLitValue (IC_RIGHT (ic)) == 0.0) + { + ic->op = '='; + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = NULL; + SET_RESULT_RIGHT (ic); + return; + } + } + break; + } + + return; +} +#define OTHERS_PARM(s) (s->_isparm && !s->ismyparm) +/*-----------------------------------------------------------------*/ +/* updateSpillLocation - keeps track of register spill location */ +/*-----------------------------------------------------------------*/ +void +updateSpillLocation (iCode * ic, int induction) +{ + sym_link *setype; + + if (POINTER_SET (ic)) + return; + + if (ic->nosupdate) + return; + +#if 0 + /* for the form true_symbol := iTempNN */ + if (ASSIGN_ITEMP_TO_SYM (ic) && + !SPIL_LOC (IC_RIGHT (ic))) { + + setype = getSpec (operandType (IC_RESULT (ic))); + + if (!OP_SYMBOL(IC_RIGHT (ic))->noSpilLoc && + !IS_VOLATILE (setype) && + !IN_FARSPACE (SPEC_OCLS (setype)) && + !OTHERS_PARM (OP_SYMBOL (IC_RESULT (ic)))) + { + wassert(IS_SYMOP(IC_RESULT (ic))); + wassert(IS_SYMOP(IC_RIGHT (ic))); + SPIL_LOC (IC_RIGHT (ic)) = + IC_RESULT (ic)->operand.symOperand; + } + + } +#endif + +#if 0 /* this needs furthur investigation can save a lot of code */ + if (ASSIGN_SYM_TO_ITEMP(ic) && + !SPIL_LOC(IC_RESULT(ic))) { + if (!OTHERS_PARM (OP_SYMBOL (IC_RIGHT (ic)))) + SPIL_LOC (IC_RESULT (ic)) = + IC_RIGHT (ic)->operand.symOperand; + } +#endif + if (ASSIGN_ITEMP_TO_ITEMP (ic)) { + + if (!SPIL_LOC (IC_RIGHT (ic)) && + !bitVectBitsInCommon (OP_DEFS (IC_RIGHT (ic)), OP_USES (IC_RESULT (ic))) && + OP_SYMBOL (IC_RESULT (ic))->isreqv) { + + setype = getSpec (operandType (IC_RESULT (ic))); + + if (!OP_SYMBOL(IC_RIGHT (ic))->noSpilLoc && + !IS_VOLATILE (setype) && + !IN_FARSPACE (SPEC_OCLS (setype)) && + !OTHERS_PARM (OP_SYMBOL (IC_RESULT (ic)))) { + + SPIL_LOC (IC_RIGHT (ic)) = + SPIL_LOC (IC_RESULT (ic)); + OP_SYMBOL (IC_RIGHT (ic))->prereqv = + OP_SYMBOL (IC_RESULT (ic))->prereqv; + } + } + /* special case for inductions */ + if (induction && + OP_SYMBOL(IC_RIGHT(ic))->isreqv && + !OP_SYMBOL(IC_RESULT (ic))->noSpilLoc && + !SPIL_LOC(IC_RESULT(ic))) { + SPIL_LOC (IC_RESULT (ic)) = SPIL_LOC (IC_RIGHT (ic)); + OP_SYMBOL (IC_RESULT (ic))->prereqv = + OP_SYMBOL (IC_RIGHT (ic))->prereqv; + } + } +} +/*-----------------------------------------------------------------*/ +/* setUsesDef - sets the uses def bitvector for a given operand */ +/*-----------------------------------------------------------------*/ +void +setUsesDefs (operand * op, bitVect * bdefs, + bitVect * idefs, bitVect ** oud) +{ + /* compute the definitions alive at this point */ + bitVect *adefs = bitVectUnion (bdefs, idefs); + + /* of these definitions find the ones that are */ + /* for this operand */ + adefs = bitVectIntersect (adefs, OP_DEFS (op)); + + /* these are the definitions that this operand can use */ + op->usesDefs = adefs; + + /* the out defs is an union */ + *oud = bitVectUnion (*oud, adefs); +} + +/*-----------------------------------------------------------------*/ +/* unsetDefsAndUses - clear this operation for the operands */ +/*-----------------------------------------------------------------*/ +void +unsetDefsAndUses (iCode * ic) +{ + if (ic->op == JUMPTABLE) + return; + + /* take away this definition from the def chain of the */ + /* result & take away from use set of the operands */ + if (ic->op != IFX) + { + /* turn off def set */ + if (IS_SYMOP (IC_RESULT (ic))) + { + if (!POINTER_SET (ic)) + bitVectUnSetBit (OP_DEFS (IC_RESULT (ic)), ic->key); + else + bitVectUnSetBit (OP_USES (IC_RESULT (ic)), ic->key); + } + /* turn off the useSet for the operands */ + if (IS_SYMOP (IC_LEFT (ic))) + bitVectUnSetBit (OP_USES (IC_LEFT (ic)), ic->key); + + if (IS_SYMOP (IC_RIGHT (ic))) + bitVectUnSetBit (OP_USES (IC_RIGHT (ic)), ic->key); + } + else + /* must be ifx turn off the use */ if (IS_SYMOP (IC_COND (ic))) + bitVectUnSetBit (OP_USES (IC_COND (ic)), ic->key); +} + +/*-----------------------------------------------------------------*/ +/* ifxOptimize - changes ifx conditions if it can */ +/*-----------------------------------------------------------------*/ +void +ifxOptimize (iCode * ic, set * cseSet, + int computeOnly, + eBBlock * ebb, int *change, + ebbIndex * ebbi) +{ + operand *pdop; + symbol *label; + + /* if the condition can be replaced */ + if (!computeOnly) + { + pdop = NULL; + applyToSetFTrue (cseSet, findCheaperOp, IC_COND (ic), &pdop, 0); + if (pdop) + { + ReplaceOpWithCheaperOp(&IC_COND (ic), pdop); + (*change)++; + } + } + + /* if the conditional is a literal then */ + if (IS_OP_LITERAL (IC_COND (ic))) + { + if ((operandLitValue (IC_COND (ic)) != 0.0) && IC_TRUE (ic)) + { + /* change to a goto */ + ic->op = GOTO; + IC_LABEL (ic) = IC_TRUE (ic); + (*change)++; + } + else + { + if (!operandLitValue (IC_COND (ic)) && IC_FALSE (ic)) + { + ic->op = GOTO; + IC_LABEL (ic) = IC_FALSE (ic); + (*change)++; + } + else + { + /* then kill this if condition */ + remiCodeFromeBBlock (ebb, ic); + } + } + + /* now we need to recompute the control flow */ + /* since the control flow has changed */ + /* this is very expensive but it does not happen */ + /* too often, if it does happen then the user pays */ + /* the price */ + computeControlFlow (ebbi); + if (!options.lessPedantic) + { + werrorfl (ic->filename, ic->lineno, W_CONTROL_FLOW); + } + return; + } + + /* if there is only one successor and that successor + is the same one we are conditionally going to then + we can remove this conditional statement */ + label = (IC_TRUE (ic) ? IC_TRUE (ic) : IC_FALSE (ic)); + if (elementsInSet (ebb->succList) == 1 && + isinSet (ebb->succList, eBBWithEntryLabel (ebbi, label))) + { + if (!options.lessPedantic) + { + werrorfl (ic->filename, ic->lineno, W_CONTROL_FLOW); + } + if (IS_OP_VOLATILE (IC_COND (ic))) + { + IC_RIGHT (ic) = IC_COND (ic); + IC_LEFT (ic) = NULL; + IC_RESULT (ic) = NULL; + ic->op = DUMMY_READ_VOLATILE; + } + else + { + remiCodeFromeBBlock (ebb, ic); + computeControlFlow (ebbi); + return; + } + } + + /* if it remains an IFX then update the use Set */ + if (ic->op == IFX) + { + OP_USES(IC_COND (ic))=bitVectSetBit (OP_USES (IC_COND (ic)), ic->key); + setUsesDefs (IC_COND (ic), ebb->defSet, ebb->outDefs, &ebb->usesDefs); + } + else if (ic->op == DUMMY_READ_VOLATILE) + { + OP_USES(IC_RIGHT (ic))=bitVectSetBit (OP_USES (IC_RIGHT (ic)), ic->key); + setUsesDefs (IC_RIGHT (ic), ebb->defSet, ebb->outDefs, &ebb->usesDefs); + } + return; +} + +/*-----------------------------------------------------------------*/ +/* diCodeForSym - finds the definiting instruction for a symbol */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (diCodeForSym) +{ + cseDef *cdp = item; + V_ARG (operand *, sym); + V_ARG (iCode **, dic); + + /* if already found */ + if (*dic) + return 0; + + /* if not if this is the defining iCode */ + if (sym->key == cdp->key) + { + *dic = cdp->diCode; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* constFold - does some constant folding */ +/*-----------------------------------------------------------------*/ +int +constFold (iCode * ic, set * cseSet) +{ + iCode *dic = NULL; + iCode *ldic = NULL; + /* this routine will change + a = b + 10; + c = a + 10; + to + c = b + 20; */ + + /* deal with only + & - */ + if (ic->op != '+' && + ic->op != '-') + return 0; + + /* this check is a heuristic to prevent live ranges + from becoming too long */ + if (IS_PTR (operandType (IC_RESULT (ic)))) + return 0; + + /* check if operation with a literal */ + if (!IS_OP_LITERAL (IC_RIGHT (ic))) + return 0; + + /* check if we can find a definition for the + left hand side */ + if (!(applyToSet (cseSet, diCodeForSym, IC_LEFT (ic), &dic))) + return 0; + + /* check that this is also a +/- */ + if (dic->op != '+' && dic->op != '-') + return 0; + + /* with a literal */ + if (!IS_OP_LITERAL (IC_RIGHT (dic))) + return 0; + + /* find the definition of the left operand + of dic.then check if this defined with a + get_pointer return 0 if the pointer size is + less than 2 (MCS51 specific) */ + if (!(applyToSet (cseSet, diCodeForSym, IC_LEFT (dic), &ldic))) + return 0; + + if (POINTER_GET (ldic) && getSize (operandType (IC_LEFT (ldic))) <= 1) + return 0; + + /* it is if the operations are the same */ + /* the literal parts need to be added */ + IC_LEFT (ic) = operandFromOperand (IC_LEFT (dic)); + if (ic->op == dic->op) + IC_RIGHT (ic) = operandFromLit (operandLitValue (IC_RIGHT (ic)) + + operandLitValue (IC_RIGHT (dic))); + else + IC_RIGHT (ic) = operandFromLit (operandLitValue (IC_RIGHT (ic)) - + operandLitValue (IC_RIGHT (dic))); + + if (IS_ITEMP (IC_RESULT (ic))) + { + SPIL_LOC (IC_RESULT (ic)) = NULL; + OP_SYMBOL(IC_RESULT (ic))->noSpilLoc = 1; + } + + + return 1; +} + +/*-----------------------------------------------------------------*/ +/* deleteGetPointers - called when a pointer is passed as parm */ +/* will delete from cseSet all get pointers computed from this */ +/* pointer. A simple ifOperandsHave is not good enough here */ +/*-----------------------------------------------------------------*/ +static void +deleteGetPointers (set ** cseSet, set ** pss, operand * op, eBBlock * ebb) +{ + set *compItems = NULL; + cseDef *cdp; + operand *cop; + int changes; + + /* easy return */ + if (!*cseSet && !*pss) + return; + + addSet (&compItems, op); + + /* Recursively find all items computed from this operand . + This done fairly simply go thru the list and find + those that are computed by arthimetic with these + ops */ + /* Also check for those computed from our computed + list . This will take care of situations like + iTemp1 = iTemp0 + 8; + iTemp2 = iTemp1 + 8; */ + do + { + changes = 0; + for (cdp = setFirstItem (*cseSet); cdp; cdp = setNextItem (*cseSet)) + { + if (IS_ARITHMETIC_OP (cdp->diCode) || POINTER_GET(cdp->diCode)) + { + if (isinSetWith (compItems, (void*)IC_LEFT (cdp->diCode), + (insetwithFunc)isOperandEqual) || + isinSetWith (compItems, (void*)IC_RIGHT (cdp->diCode), + (insetwithFunc)isOperandEqual)) + { + if (!isinSetWith (compItems, (void*)IC_RESULT (cdp->diCode), + (insetwithFunc)isOperandEqual)) + { + addSet (&compItems, IC_RESULT (cdp->diCode)); + changes++; + } + } + } + } + } + while (changes); + + /* now for the computed items */ + for (cop = setFirstItem (compItems); cop; cop = setNextItem (compItems)) + { + ebb->ptrsSet = bitVectSetBit (ebb->ptrsSet, cop->key); + deleteItemIf (cseSet, ifPointerGet, cop); + deleteItemIf (cseSet, ifDefSymIsX, cop); + deleteItemIf (pss, ifPointerSet, cop); + } +} + +/*-----------------------------------------------------------------*/ +/* delGetPointerSucc - delete get pointer from inExprs of succ with */ +/* dfnum > supplied */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (delGetPointerSucc) +{ + eBBlock *ebp = item; + V_ARG (operand *, op); + V_ARG (int, dfnum); + + if (ebp->visited) + return 0; + + ebp->visited = 1; + if (ebp->dfnum > dfnum) + { + deleteItemIf (&ebp->inExprs, ifPointerGet, op); + } + + return applyToSet (ebp->succList, delGetPointerSucc, op, dfnum); +} + +/*-----------------------------------------------------------------*/ +/* fixUpTypes - KLUGE HACK fixup a lowering problem */ +/*-----------------------------------------------------------------*/ +static void +fixUpTypes (iCode * ic) +{ + sym_link *t1 = operandType (IC_LEFT (ic)), *t2; + + /* if (TARGET_IS_DS390) */ + if (options.model == MODEL_FLAT24) + { + /* hack-o-matic! */ + return; + } + + /* for pointer_gets if the types of result & left r the + same then change it type of result to next */ + if (IS_PTR (t1) && + compareType (t2 = operandType (IC_RESULT (ic)), t1) == 1) + { + setOperandType (IC_RESULT (ic), t2->next); + } +} + +/*-----------------------------------------------------------------*/ +/* isSignedOp - will return 1 if sign is important to operation */ +/*-----------------------------------------------------------------*/ +static int isSignedOp (iCode *ic) +{ + switch (ic->op) { + case '!': + case '~': + case UNARYMINUS: + case IPUSH: + case IPOP: + case CALL: + case PCALL: + case RETURN: + case '+': + case '-': + case EQ_OP: + case AND_OP: + case OR_OP: + case '^': + case '|': + case BITWISEAND: + case INLINEASM: + case LEFT_OP: + case GET_VALUE_AT_ADDRESS: + case '=': + case IFX: + case RECEIVE: + case SEND: + return 0; + case '*': + case '/': + case '%': + case '>': + case '<': + case LE_OP: + case GE_OP: + case NE_OP: + case RRC: + case RLC: + case GETHBIT: + case GETABIT: + case GETBYTE: + case GETWORD: + case RIGHT_OP: + case CAST: + case ARRAYINIT: + return 1; + default: + return 0; + } + } + +#if 0 +static void +dumpCseSet(set *cseSet) +{ + while (cseSet) + { + cseDef *item=cseSet->item; + printf("->"); + printOperand (item->sym, NULL); + printf(" "); + piCode (item->diCode, NULL); + cseSet = cseSet->next; + } +} +#endif + +/*-----------------------------------------------------------------*/ +/* cseBBlock - common subexpression elimination for basic blocks */ +/* this is the hackiest kludgiest routine in the whole */ +/* system. also the most important, since almost all */ +/* data flow related information is computed by it */ +/*-----------------------------------------------------------------*/ +int +cseBBlock (eBBlock * ebb, int computeOnly, + ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->bbOrder; + int count = ebbi->count; + set *cseSet; + iCode *ic; + int change = 0; + int i; + set *ptrSetSet = NULL; + cseDef *expr; + + /* if this block is not reachable */ + if (ebb->noPath) + return 0; + + /* set of common subexpressions */ + cseSet = setFromSet (ebb->inExprs); + + /* these will be computed by this routine */ + setToNull ((void *) &ebb->outDefs); + setToNull ((void *) &ebb->defSet); + setToNull ((void *) &ebb->usesDefs); + setToNull ((void *) &ebb->ptrsSet); + setToNull ((void *) &ebb->addrOf); + setToNull ((void *) &ebb->ldefs); + + ebb->outDefs = bitVectCopy (ebb->inDefs); + bitVectDefault = iCodeKey; + ebb->defSet = newBitVect (iCodeKey); + ebb->usesDefs = newBitVect (iCodeKey); + + /* for all the instructions in this block do */ + for (ic = ebb->sch; ic; ic = ic->next) + { + iCode *pdic; + operand *pdop; + iCode *defic; + int checkSign ; + + ic->eBBlockNum = ebb->bbnum; + + if (SKIP_IC2 (ic)) + continue; + + /* if this is an assignment from true symbol + to a temp then do pointer post inc/dec optimization */ + if (ic->op == '=' && !POINTER_SET (ic) && + IS_PTR (operandType (IC_RESULT (ic)))) + { + ptrPostIncDecOpt (ic); + } + + /* clear the def & use chains for the operands involved */ + /* in this operation . since it can change due to opts */ + unsetDefsAndUses (ic); + + if (ic->op == PCALL || ic->op == CALL || ic->op == RECEIVE) + { + /* add to defSet of the symbol */ + OP_DEFS(IC_RESULT (ic))= + bitVectSetBit (OP_DEFS (IC_RESULT (ic)), ic->key); + /* add to the definition set of this block */ + ebb->defSet = bitVectSetBit (ebb->defSet, ic->key); + ebb->ldefs = bitVectSetBit (ebb->ldefs, ic->key); + ebb->outDefs = bitVectCplAnd (ebb->outDefs, OP_DEFS (IC_RESULT (ic))); + setUsesDefs (IC_RESULT (ic), ebb->defSet, ebb->outDefs, &ebb->usesDefs); + /* delete global variables from the cseSet + since they can be modified by the function call */ + deleteItemIf (&cseSet, ifDefGlobal); + + /* and also iTemps derived from globals */ + deleteItemIf (&cseSet, ifFromGlobal); + + /* Delete iTemps derived from symbols whose address */ + /* has been taken */ + deleteItemIf (&cseSet, ifFromAddrTaken); + + /* delete all getpointer iCodes from cseSet, this should + be done only for global arrays & pointers but at this + point we don't know if globals, so to be safe do all */ + deleteItemIf (&cseSet, ifAnyGetPointer); + + /* can't cache pointer set/get operations across a call */ + deleteSet (&ptrSetSet); + } + + /* for pcall & ipush we need to add to the useSet */ + if ((ic->op == PCALL || + ic->op == IPUSH || + ic->op == IPOP || + ic->op == SEND) && + IS_SYMOP (IC_LEFT (ic))) + { + + /* check if they can be replaced */ + if (!computeOnly) + { + pdop = NULL; + applyToSetFTrue (cseSet, findCheaperOp, IC_LEFT (ic), &pdop, 0); + if (pdop) + ReplaceOpWithCheaperOp(&IC_LEFT(ic), pdop); + } + /* the lookup could have changed it */ + if (IS_SYMOP (IC_LEFT (ic))) + { + OP_USES(IC_LEFT (ic))= + bitVectSetBit (OP_USES (IC_LEFT (ic)), ic->key); + setUsesDefs (IC_LEFT (ic), ebb->defSet, + ebb->outDefs, &ebb->usesDefs); + } + + + /* if we a sending a pointer as a parameter + then kill all cse since the pointed to item + might be changed in the function being called */ + if ((ic->op == IPUSH || ic->op == SEND) && + IS_PTR (operandType (IC_LEFT (ic)))) + { + deleteGetPointers (&cseSet, &ptrSetSet, IC_LEFT (ic), ebb); + ebb->ptrsSet = bitVectSetBit (ebb->ptrsSet, IC_LEFT (ic)->key); + for (i = 0; i < count; ebbs[i++]->visited = 0); + applyToSet (ebb->succList, delGetPointerSucc, + IC_LEFT (ic), ebb->dfnum); + } + continue; + } + + /* if jumptable then mark the usage */ + if (ic->op == JUMPTABLE) + { + if (IS_SYMOP (IC_JTCOND (ic))) + { + OP_USES(IC_JTCOND (ic)) = + bitVectSetBit (OP_USES (IC_JTCOND (ic)), ic->key); + setUsesDefs (IC_JTCOND (ic), ebb->defSet, + ebb->outDefs, &ebb->usesDefs); + } + continue; + } + + if (SKIP_IC (ic)) + continue; + + if (!computeOnly) + { + /* do some algebraic optimizations if possible */ + algebraicOpts (ic, ebb); + while (constFold (ic, cseSet)); + } + + /* small kludge */ + if (POINTER_GET (ic)) + { + if (!IS_PTR (operandType (IC_LEFT (ic)))) + { + setOperandType (IC_LEFT (ic), + aggrToPtr (operandType (IC_LEFT (ic)), FALSE)); + IC_LEFT (ic)->aggr2ptr = 0; + fixUpTypes (ic); + } + else if (IC_LEFT (ic)->aggr2ptr == 1) + {/* band aid for kludge */ + setOperandType (IC_LEFT (ic), + aggrToPtr (operandType (IC_LEFT (ic)), TRUE)); + IC_LEFT (ic)->aggr2ptr++; + fixUpTypes (ic); + } + } + + if (POINTER_SET (ic)) + { + if (!IS_PTR (operandType (IC_RESULT (ic)))) + { + setOperandType (IC_RESULT (ic), + aggrToPtr (operandType (IC_RESULT (ic)), FALSE)); + IC_RESULT (ic)->aggr2ptr = 0; + } + else if (IC_RESULT (ic)->aggr2ptr == 1) + {/* band aid for kludge */ + setOperandType (IC_RESULT (ic), + aggrToPtr (operandType (IC_RESULT (ic)), TRUE)); + IC_RESULT (ic)->aggr2ptr++; + } + } + + /* if this is a condition statement then */ + /* check if the condition can be replaced */ + if (ic->op == IFX) + { + ifxOptimize (ic, cseSet, computeOnly, + ebb, &change, + ebbi); + continue; + } + + /* if the assignment & result is a temp */ + /* see if we can replace it */ + if (!computeOnly && ic->op == '=') + { + + /* update the spill location for this */ + updateSpillLocation (ic,0); + + if (POINTER_SET (ic) && IS_SYMOP (IC_RESULT (ic)) && + !(IS_BITFIELD (OP_SYMBOL (IC_RESULT (ic))->etype))) + { + pdop = NULL; + applyToSetFTrue (cseSet, findCheaperOp, IC_RESULT (ic), &pdop, 0); + if (pdop && !computeOnly && IS_ITEMP (pdop)) + { + ReplaceOpWithCheaperOp (&IC_RESULT(ic), pdop); + if (!IS_PTR (operandType (IC_RESULT (ic)))) + { + setOperandType (IC_RESULT (ic), + aggrToPtr (operandType (IC_RESULT (ic)), FALSE)); + } + } + } + } + + checkSign = isSignedOp(ic); + + /* do the operand lookup i.e. for both the */ + /* right & left operand : check the cseSet */ + /* to see if they have been replaced if yes */ + /* then replace them with those from cseSet */ + /* left operand */ + /* and left is a symbol */ + if (IS_SYMOP (IC_LEFT (ic)) && + !IS_BITFIELD (OP_SYM_ETYPE (IC_LEFT (ic))) && + !computeOnly && ic->op != ADDRESS_OF) + { + + pdop = NULL; + applyToSetFTrue (cseSet, findCheaperOp, IC_LEFT (ic), &pdop, checkSign); + if (pdop) + { + if (POINTER_GET (ic)) + { + if (IS_ITEMP (pdop) || IS_OP_LITERAL (pdop)) + { + /* some non dominating block does POINTER_SET with + this variable .. unsafe to remove any POINTER_GETs */ + if (bitVectBitValue(ebb->ndompset,IC_LEFT(ic)->key)) + ebb->ptrsSet = bitVectSetBit(ebb->ptrsSet,pdop->key); + ReplaceOpWithCheaperOp(&IC_LEFT(ic), pdop); + change = 1; + } + /* check if there is a pointer set + for the same pointer visible if yes + then change this into an assignment */ + pdop = NULL; + if (applyToSetFTrue (cseSet, findPointerSet, IC_LEFT (ic), &pdop, IC_RESULT (ic)) && + !bitVectBitValue (ebb->ptrsSet, pdop->key)) + { + ic->op = '='; + IC_LEFT (ic) = NULL; + ReplaceOpWithCheaperOp(&IC_RIGHT(ic), pdop); + SET_ISADDR (IC_RESULT (ic), 0); + } + + } + else + { + ReplaceOpWithCheaperOp(&IC_LEFT(ic), pdop); + change = 1; + } + } + } + + /* right operand */ + if (IS_SYMOP (IC_RIGHT (ic)) && !computeOnly) + { + + pdop = NULL; + applyToSetFTrue (cseSet, findCheaperOp, IC_RIGHT (ic), &pdop, checkSign); + if (pdop) { + ReplaceOpWithCheaperOp(&IC_RIGHT(ic), pdop); + change = 1; + } + } + + /* if left or right changed then do algebraic */ + if (!computeOnly && change) + { + algebraicOpts (ic, ebb); + while (constFold (ic, cseSet)); + } + + /* if after all this it becomes an assignment to self + then delete it and continue */ + if (ASSIGNMENT_TO_SELF (ic) && !isOperandVolatile (IC_RIGHT(ic), FALSE)) + { + remiCodeFromeBBlock (ebb, ic); + continue; + } + + /* now we will check to see if the entire */ + /* operation has been performed before */ + /* and is available */ + /* don't do assignments they will be killed */ + /* by dead code elimination if required do */ + /* it only if result is a temporary */ + pdic = NULL; + if (!(POINTER_GET (ic) && + (IS_BITFIELD (OP_SYMBOL (IC_RESULT (ic))->etype) || + isOperandVolatile (IC_LEFT (ic), TRUE) || + bitVectBitValue (ebb->ndompset, IC_LEFT (ic)->key))) && + !ASSIGNMENT (ic) && + IS_ITEMP (IC_RESULT (ic)) && + !computeOnly) + { + applyToSet (cseSet, findPrevIc, ic, &pdic); + if (pdic && compareType (operandType (IC_RESULT (pdic)), + operandType (IC_RESULT (ic))) != 1) + pdic = NULL; + if (pdic && port->cseOk && (*port->cseOk)(ic,pdic) == 0) + pdic = NULL; + } + + /* Alternate code */ + if (pdic && IS_ITEMP(IC_RESULT(ic))) { + if (POINTER_GET(ic) && bitVectBitValue(ebb->ptrsSet,IC_LEFT(ic)->key)) { + /* Mmm, found an equivalent pointer get at a lower level. + This could be a loop however with the same pointer set + later on */ + } else { + /* if previous definition found change this to an assignment */ + ic->op = '='; + IC_LEFT(ic) = NULL; + IC_RIGHT(ic) = operandFromOperand(IC_RESULT(pdic)); + SET_ISADDR(IC_RESULT(ic),0); + SET_ISADDR(IC_RIGHT (ic),0); + } + } + + if (!(POINTER_SET (ic)) && IC_RESULT (ic)) { + cseDef *csed; + deleteItemIf (&cseSet, ifDefSymIsX, IC_RESULT (ic)); + csed = newCseDef (IC_RESULT (ic), ic); + updateCseDefAncestors (csed, cseSet); + addSetHead (&cseSet, csed); + } + defic = ic; + + /* if assignment to a parameter which is not + mine and type is a pointer then delete + pointerGets to take care of aliasing */ + if (ASSIGNMENT (ic) && + IS_SYMOP (IC_RESULT (ic)) && + OTHERS_PARM (OP_SYMBOL (IC_RESULT (ic))) && + IS_PTR (operandType (IC_RESULT (ic)))) + { + deleteGetPointers (&cseSet, &ptrSetSet, IC_RIGHT (ic), ebb); + for (i = 0; i < count; ebbs[i++]->visited = 0); + applyToSet (ebb->succList, delGetPointerSucc, IC_RIGHT (ic), ebb->dfnum); + ebb->ptrsSet = bitVectSetBit (ebb->ptrsSet, IC_RIGHT (ic)->key); + } + + /* if this is a pointerget then see if we can replace + this with a previously assigned pointer value */ + if (POINTER_GET (ic) && + !(IS_BITFIELD (OP_SYMBOL (IC_RESULT (ic))->etype) || + isOperandVolatile (IC_LEFT (ic), TRUE))) + { + pdop = NULL; + applyToSet (ptrSetSet, findPointerSet, IC_LEFT (ic), &pdop, IC_RESULT (ic)); + /* if we find it then locally replace all + references to the result with what we assigned */ + if (pdop) + { + replaceAllSymBySym (ic->next, IC_RESULT (ic), pdop, &ebb->ndompset); + } + } + + /* delete from the cseSet anything that has */ + /* operands matching the result of this */ + /* except in case of pointer access */ + if (!(POINTER_SET (ic)) && IS_SYMOP (IC_RESULT (ic))) + { + deleteItemIf (&cseSet, ifOperandsHave, IC_RESULT (ic)); + /* delete any previous definitions */ + ebb->defSet = bitVectCplAnd (ebb->defSet, OP_DEFS (IC_RESULT (ic))); + } + + /* add the left & right to the defUse set */ + if (IC_LEFT (ic) && IS_SYMOP (IC_LEFT (ic))) + { + OP_USES(IC_LEFT (ic))= + bitVectSetBit (OP_USES (IC_LEFT (ic)), ic->key); + setUsesDefs (IC_LEFT (ic), ebb->defSet, ebb->outDefs, &ebb->usesDefs); + } + + if (IC_RIGHT (ic) && IS_SYMOP (IC_RIGHT (ic))) + { + OP_USES(IC_RIGHT (ic))= + bitVectSetBit (OP_USES (IC_RIGHT (ic)), ic->key); + setUsesDefs (IC_RIGHT (ic), ebb->defSet, ebb->outDefs, &ebb->usesDefs); + } + + /* for the result it is special case, put the result */ + /* in the defuseSet if it a pointer or array access */ + if (POINTER_SET (defic) && IS_SYMOP (IC_RESULT (ic))) + { + OP_USES(IC_RESULT (ic))= + bitVectSetBit (OP_USES (IC_RESULT (ic)), ic->key); + setUsesDefs (IC_RESULT (ic), ebb->defSet, ebb->outDefs, &ebb->usesDefs); + deleteItemIf (&cseSet, ifPointerGet, IC_RESULT (ic)); + ebb->ptrsSet = bitVectSetBit (ebb->ptrsSet, IC_RESULT (ic)->key); + /* delete from inexpressions of all successors which + have dfNum > than this block */ + for (i = 0; i < count; ebbs[i++]->visited = 0); + applyToSet (ebb->succList, delGetPointerSucc, IC_RESULT (ic), ebb->dfnum); + + /* delete from cseSet all other pointer sets + for this operand */ + deleteItemIf (&ptrSetSet, ifPointerSet, IC_RESULT (ic)); + /* add to the local pointerset set */ + addSetHead (&ptrSetSet, newCseDef (IC_RESULT (ic), ic)); + } + else + { + /* add the result to definition set */ + if (IS_SYMOP (IC_RESULT (ic))) + { + OP_DEFS(IC_RESULT (ic))= + bitVectSetBit (OP_DEFS (IC_RESULT (ic)), ic->key); + ebb->defSet = bitVectSetBit (ebb->defSet, ic->key); + ebb->outDefs = bitVectCplAnd (ebb->outDefs, OP_DEFS (IC_RESULT (ic))); + ebb->ldefs = bitVectSetBit (ebb->ldefs, ic->key); + } + } + + /* if this is an addressof instruction then */ + /* put the symbol in the address of list & */ + /* delete it from the cseSet */ + if (defic->op == ADDRESS_OF) + { + addSetHead (&ebb->addrOf, IC_LEFT (ic)); + deleteItemIf (&cseSet, ifDefSymIsX, IC_LEFT (ic)); + } + } + + for (expr=setFirstItem (ebb->inExprs); expr; expr=setNextItem (ebb->inExprs)) + if (!isinSetWith (cseSet, expr, isCseDefEqual) && + !isinSetWith (ebb->killedExprs, expr, isCseDefEqual)) { + addSetHead (&ebb->killedExprs, expr); + } + setToNull ((void *) &ebb->outExprs); + ebb->outExprs = cseSet; + ebb->outDefs = bitVectUnion (ebb->outDefs, ebb->defSet); + ebb->ptrsSet = bitVectUnion (ebb->ptrsSet, ebb->inPtrsSet); + return change; +} + +/*-----------------------------------------------------------------*/ +/* cseAllBlocks - will sequentially go thru & do cse for all blocks */ +/*-----------------------------------------------------------------*/ +int +cseAllBlocks (ebbIndex * ebbi, int computeOnly) +{ + eBBlock ** ebbs = ebbi->dfOrder; + int count = ebbi->count; + int i; + int change = 0; + + /* if optimization turned off */ + + for (i = 0; i < count; i++) + change += cseBBlock (ebbs[i], computeOnly, ebbi); + + return change; +} diff --git a/src/SDCCcse.h b/src/SDCCcse.h new file mode 100644 index 0000000..1926dd8 --- /dev/null +++ b/src/SDCCcse.h @@ -0,0 +1,63 @@ +/*------------------------------------------------------------------------- + + SDCCcse.h - header file for Common Subexpressions + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "SDCCicode.h" + +#ifndef SDCCCSE_H +#define SDCCCSE_H 1 + +typedef struct cseDef + { + + int key; + operand *sym; /* defining symbol */ + iCode *diCode; /* defining instruction */ + bitVect *ancestors; /* keys of the symbol's ancestors */ + int fromGlobal:1; /* defining symbol's value computed from a global */ + int fromAddrTaken:1; /* defining symbol's value computed from a */ + /* symbol whose address was taken */ + } +cseDef; + + +cseDef *newCseDef (operand *, iCode *); +int isCseDefEqual (void *, void *); +int pcseDef (void *, va_list); +DEFSETFUNC (ifDiCodeIsX); +int ifDiCodeIs (set *, iCode *); +DEFSETFUNC (ifDefSymIsX); +int ifDefSymIs (set *, operand *); +DEFSETFUNC (findPrevIc); +DEFSETFUNC (ifOperandsHave); +DEFSETFUNC (findCheaperOp); +int cseBBlock (eBBlock *, int, ebbIndex *); +int cseAllBlocks (ebbIndex *, int computeOnly); +void unsetDefsAndUses (iCode *); +void updateSpillLocation (iCode * ic,int); +void setUsesDefs (operand *, bitVect *, bitVect *, bitVect **); +void replaceAllSymBySym (iCode *, operand *, operand *, bitVect **); +iCode *findBackwardDef(operand *,iCode *); +void ReplaceOpWithCheaperOp(operand **op, operand *cop); +#endif diff --git a/src/SDCCdebug.c b/src/SDCCdebug.c new file mode 100644 index 0000000..cbf4234 --- /dev/null +++ b/src/SDCCdebug.c @@ -0,0 +1,167 @@ + +#include "common.h" + +extern DEBUGFILE cdbDebugFile; + +DEBUGFILE *debugFile = &cdbDebugFile; + +void outputDebugStackSymbols(void) +{ + if(getenv("SDCC_DEBUG_VAR_STORAGE")) + { + dumpSymInfo("XStack", xstack); + dumpSymInfo("IStack", istack); + } + + if(options.debug && debugFile) + { + symbol *sym; + + if (xstack) { + for (sym = setFirstItem (xstack->syms); sym; sym = setNextItem (xstack->syms)) + debugFile->writeSymbol(sym); + } + + if (istack) { + for (sym = setFirstItem (istack->syms); sym; sym = setNextItem (istack->syms)) + debugFile->writeSymbol(sym); + } + } + +} + + +void outputDebugSymbols(void) +{ + if(getenv("SDCC_DEBUG_VAR_STORAGE")) + { + dumpSymInfo("Code", code); + dumpSymInfo("Data", data); + dumpSymInfo("PData", pdata); + dumpSymInfo("XData", xdata); + dumpSymInfo("XIData", xidata); + dumpSymInfo("XInit", xinit); + dumpSymInfo("IData", idata); + dumpSymInfo("Bit", bit); + dumpSymInfo("Statics", statsg); + dumpSymInfo("SFR", sfr); + dumpSymInfo("SFRBits", sfrbit); + dumpSymInfo("Reg", reg); + dumpSymInfo("Generic", generic); + dumpSymInfo("Overlay", overlay); + dumpSymInfo("EEProm", eeprom); + dumpSymInfo("Home", home); + } + + if(options.debug && debugFile) + { + symbol *sym; + + if (data) { + for (sym = setFirstItem (data->syms); sym; sym = setNextItem (data->syms)) + debugFile->writeSymbol(sym); + } + + if (idata) { + for (sym = setFirstItem (idata->syms); sym; sym = setNextItem (idata->syms)) + debugFile->writeSymbol(sym); + } + + if (bit) { + for (sym = setFirstItem (bit->syms); sym; sym = setNextItem (bit->syms)) + debugFile->writeSymbol(sym); + } + + if (pdata) { + for (sym = setFirstItem (pdata->syms); sym; sym = setNextItem (pdata->syms)) + debugFile->writeSymbol(sym); + } + + if (xdata) { + for (sym = setFirstItem (xdata->syms); sym; sym = setNextItem (xdata->syms)) + debugFile->writeSymbol(sym); + } + + if(port->genXINIT && xidata) { + for (sym = setFirstItem (xidata->syms); sym; sym = setNextItem (xidata->syms)) + debugFile->writeSymbol(sym); + } + + if (sfr) { + for (sym = setFirstItem (sfr->syms); sym; sym = setNextItem (sfr->syms)) + debugFile->writeSymbol(sym); + } + + if (sfrbit) { + for (sym = setFirstItem (sfrbit->syms); sym; sym = setNextItem (sfrbit->syms)) + debugFile->writeSymbol(sym); + } + + if (home) { + for (sym = setFirstItem (home->syms); sym; sym = setNextItem (home->syms)) + debugFile->writeSymbol(sym); + } + + if (code) { + for (sym = setFirstItem (code->syms); sym; sym = setNextItem (code->syms)) + debugFile->writeSymbol(sym); + } + + if (statsg) { + for (sym = setFirstItem (statsg->syms); sym; sym = setNextItem (statsg->syms)) + debugFile->writeSymbol(sym); + } + + if(port->genXINIT && xinit) { + for (sym = setFirstItem (xinit->syms); sym; sym = setNextItem (xinit->syms)) + debugFile->writeSymbol(sym); + } + } + + return; +} + + +void dumpSymInfo(char *pcName, memmap *memItem) +{ + symbol *sym; + + if (!memItem) + return; + + printf("--------------------------------------------\n"); + printf(" %s\n", pcName); + + for(sym = setFirstItem(memItem->syms); + sym; sym = setNextItem(memItem->syms)) + { + printf(" %s, isReqv:%d, reqv:0x%p, onStack:%d, Stack:%d, nRegs:%d, [", + sym->rname, sym->isreqv, sym->reqv, sym->onStack, sym->stack, sym->nRegs); + + if(sym->reqv) + { + int i; + symbol *TempSym = OP_SYMBOL (sym->reqv); + + for (i = 0; i < 4; i++) + if(TempSym->regs[i]) + printf("%s,", port->getRegName(TempSym->regs[i])); + } + + printf("]\n"); + } + + printf("\n"); +} + + +/*------------------------------------------------------------------*/ +/* emitDebuggerSymbol - call the port specific routine to associate */ +/* the current code location with a debugger symbol */ +/*------------------------------------------------------------------*/ +void +emitDebuggerSymbol (char * debugSym) +{ + if (port->debugger.emitDebuggerSymbol) + port->debugger.emitDebuggerSymbol (debugSym); +} diff --git a/src/SDCCdebug.h b/src/SDCCdebug.h new file mode 100644 index 0000000..24fb826 --- /dev/null +++ b/src/SDCCdebug.h @@ -0,0 +1,28 @@ + +#ifndef _DEBUG_INCLUDE_ +#define _DEBUG_INCLUDE_ + +typedef struct DebugFile +{ + int (*openFile)(char *file); + int (*closeFile)(void); + int (*writeModule)(char *name); + int (*writeFunction)(symbol *pSym, iCode *ic); + int (*writeEndFunction)(symbol *pSym, iCode *ic, int offset); + int (*writeLabel)(symbol *pSym, iCode *ic); + int (*writeScope)(iCode *ic); + int (*writeSymbol)(symbol *pSym); + int (*writeType)(structdef *sdef, int block, int inStruct, char *tag); + int (*writeCLine)(iCode *ic); + int (*writeALine)(char *module, int Line); + int (*writeFrameAddress)(char *variable, struct regs *reg, int offset); +}DEBUGFILE; + +extern DEBUGFILE *debugFile; + +void outputDebugStackSymbols(void); +void outputDebugSymbols(void); +void dumpSymInfo(char *pcName, memmap *memItem); +void emitDebuggerSymbol (char * debugSym); + +#endif diff --git a/src/SDCCdflow.c b/src/SDCCdflow.c new file mode 100644 index 0000000..a45eb17 --- /dev/null +++ b/src/SDCCdflow.c @@ -0,0 +1,413 @@ +/*------------------------------------------------------------------------- + + SDCCdflow.c - source file for data flow analysis and other utility + routines related to data flow. + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" + +/*-----------------------------------------------------------------*/ +/* ifKilledInBlock - will return 1 if the symbol is redefined in B */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (ifKilledInBlock) +{ + cseDef *cdp = item; + V_ARG (eBBlock *, src); + bitVect *outs; + + /* if this is a global variable and this block + has a function call then delete it */ + if (isOperandGlobal (cdp->sym) && src->hasFcall) + return 1; + + /* if this is pointer get then it will be killed + if there is a pointer set for the same pointer + in this block */ + if (POINTER_GET (cdp->diCode) && + bitVectBitValue (src->ptrsSet, + IC_LEFT (cdp->diCode)->key)) + return 1; + + /* if assignment to iTmep then if right is defined + elsewhere kill this one */ + if (ASSIGNMENT (cdp->diCode) && + !POINTER_SET (cdp->diCode) && + IS_ITEMP (IC_RESULT (cdp->diCode)) && + IS_SYMOP (IC_RIGHT (cdp->diCode)) && + bitVectBitsInCommon (src->outDefs, OP_DEFS (IC_RIGHT (cdp->diCode)))) + return 1; + + /* if we find it in the defSet of this block */ + if (bitVectBitsInCommon (src->defSet, OP_DEFS (cdp->sym))) + return 1; + + /* if in the outdef we find a definition other than this one */ + /* to do this we make a copy of the out definitions and turn */ + /* this one off then check if there are other definitions */ + bitVectUnSetBit (outs = bitVectCopy (src->outDefs), + cdp->diCode->key); + if (bitVectBitsInCommon (outs, OP_DEFS (cdp->sym))) + { + setToNull ((void *) &outs); + return 1; + } + + setToNull ((void *) &outs); + + /* if the operands of this one was changed in the block */ + /* then delete it */ + if (cdp->diCode && + ((IS_SYMOP (IC_LEFT (cdp->diCode)) && + bitVectBitsInCommon (src->defSet, OP_DEFS (IC_LEFT (cdp->diCode)))) || + (IS_SYMOP (IC_RIGHT (cdp->diCode)) && + bitVectBitsInCommon (src->defSet, OP_DEFS (IC_RIGHT (cdp->diCode)))))) + return 1; + + /* kill if cseBBlock() found a case we missed here */ + if (isinSetWith(src->killedExprs, cdp, isCseDefEqual)) + return 1; + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* mergeInExprs - copy the in expression if it dominates */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (mergeInExprs) +{ + eBBlock *ebp = item; + V_ARG (eBBlock *, dest); + V_ARG (int *, firstTime); + + dest->killedExprs = unionSets (dest->killedExprs, ebp->killedExprs, THROW_DEST); + + /* if in the dominator list then */ + if (bitVectBitValue (dest->domVect, ebp->bbnum) && dest != ebp) + { + /* if already present then intersect */ + if (!dest->inExprs && *firstTime) + { + dest->inExprs = setFromSet (ebp->outExprs); + /* copy the pointer set from the dominator */ + dest->inPtrsSet = bitVectCopy (ebp->ptrsSet); + dest->ndompset = bitVectCopy (ebp->ndompset); + } + else + { + dest->inExprs = intersectSets (dest->inExprs, + ebp->outExprs, + THROW_DEST); + dest->inPtrsSet = bitVectUnion (dest->inPtrsSet, ebp->ptrsSet); + dest->ndompset = bitVectUnion (dest->ndompset, ebp->ndompset); + } + } + else + { + //if (dest != ebp) + // dest->inExprs = intersectSets (dest->inExprs, ebp->outExprs, THROW_DEST); + + /* delete only if killed in this block*/ + deleteItemIf (&dest->inExprs, ifKilledInBlock, ebp); + /* union the ndompset with pointers set in this block */ + dest->ndompset = bitVectUnion (dest->ndompset, ebp->ptrsSet); + } + *firstTime = 0; + + return 0; +} + + +/*-----------------------------------------------------------------*/ +/* mergeInDefs - merge in incoming definitions */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (mergeInDefs) +{ + eBBlock *ebp = item; + V_ARG (eBBlock *, dest); + V_ARG (int *, firstTime); + + /* the in definition is the union of the out */ + /* of all blocks that come to this block */ + if (!dest->inDefs && *firstTime) + dest->inDefs = bitVectCopy (ebp->outDefs); + else + dest->inDefs = bitVectUnion (dest->inDefs, + ebp->outDefs); + + *firstTime = 0; + + return 0; + +} + + +/*-----------------------------------------------------------------*/ +/* computeDataFlow - does computations for data flow accross blocks */ +/*-----------------------------------------------------------------*/ +void +computeDataFlow (ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->dfOrder; + int count = ebbi->count; + int i; + int change = 1; + + for (i = 0; i < count; i++) + ebbs[i]->killedExprs = NULL; + + while (change) + { + change = 0; + + /* for all blocks */ + for (i = 0; i < count; i++) + { + + set *pred; + set *oldOutExprs = NULL; + set *oldKilledExprs = NULL; + bitVect *oldOutDefs = NULL; + int firstTime; + eBBlock *pBlock; + + /* if this is the entry block then continue */ + /* since entry block can never have any inExprs */ + if (ebbs[i]->noPath) + continue; + + /* get blocks that can come to this block */ + pred = edgesTo (ebbs[i]); + + /* make a copy of the outExpressions and outDefs : to be */ + /* used for iteration */ + if (optimize.global_cse) + { + oldOutExprs = setFromSet (ebbs[i]->outExprs); + oldKilledExprs = setFromSet (ebbs[i]->killedExprs); + } + oldOutDefs = bitVectCopy (ebbs[i]->outDefs); + setToNull ((void *) &ebbs[i]->inDefs); + + /* indefitions are easy just merge them by union */ + /* these are the definitions that can possibly */ + /* reach this block */ + firstTime = 1; + applyToSet (pred, mergeInDefs, ebbs[i], &firstTime); + + /* if none of the edges coming to this block */ + /* dominate this block then add the immediate dominator */ + /* of this block to the list of predecessors */ + for (pBlock = setFirstItem (pred); pBlock; + pBlock = setNextItem (pred)) + { + if (bitVectBitValue (ebbs[i]->domVect, pBlock->bbnum)) + break; + } + + /* get the immediate dominator and put it there */ + if (!pBlock) + { + eBBlock *idom = immedDom (ebbi, ebbs[i]); + if (idom) + addSetHead (&pred, idom); + } + + /* figure out the incoming expressions */ + /* this is a little more complex */ + setToNull ((void *) &ebbs[i]->inExprs); + if (optimize.global_cse) + { + firstTime = 1; + applyToSet (pred, mergeInExprs, ebbs[i], &firstTime); + } + setToNull ((void *) &pred); + + /* do cse with computeOnly flag set to TRUE */ + /* this by far the quickest way of computing */ + cseBBlock (ebbs[i], TRUE, ebbi); + + /* if it change we will need to iterate */ + if (optimize.global_cse) + { + change += !isSetsEqualWith (ebbs[i]->outExprs, oldOutExprs, isCseDefEqual); + change += !isSetsEqualWith (ebbs[i]->killedExprs, oldKilledExprs, isCseDefEqual); + } + change += !bitVectEqual (ebbs[i]->outDefs, oldOutDefs); + } + + if (!change) /* iterate till no change */ + break; + } + + return; +} + +/*-----------------------------------------------------------------*/ +/* usedBetweenPoints - used between start & end */ +/*-----------------------------------------------------------------*/ +int +usedBetweenPoints (operand * op, iCode * start, iCode * end) +{ + iCode *lic = start; + + for (; lic != end; lic = lic->next) + { + + /* if the operand is a parameter */ + /* then check for calls and return */ + /* true if there is a call */ + if (IS_PARM (op) && + (lic->op == CALL || + lic->op == PCALL)) { + value *args; + if (lic->op == CALL) { + args=FUNC_ARGS(OP_SYMBOL(IC_LEFT(lic))->type); + } else { + args=FUNC_ARGS(OP_SYMBOL(IC_LEFT(lic))->type->next); + } + if (isParameterToCall (args, op)) + return 1; + } + + if (SKIP_IC2 (lic)) + continue; + + /* if ifx then check the condition */ + if (lic->op == IFX && + IC_COND (lic)->key == op->key) + return 1; + + if (lic->op == JUMPTABLE && + IC_JTCOND (lic)->key == op->key) + return 1; + + if (IC_RIGHT (lic) && + IC_RIGHT (lic)->key == op->key) + return 1; + + if (IC_LEFT (lic) && + IC_LEFT (lic)->key == op->key) + return 1; + + /* for a pointer assignment usage */ + if (POINTER_SET (lic) && + op->key == IC_RESULT (lic)->key) + return 1; + else if (IC_RESULT (lic) && op->key == IC_RESULT (lic)->key) + return 0; + } + + return 0; + +} + + +/*-----------------------------------------------------------------*/ +/* usedInRemaining - returns point of usage for an operand if found */ +/*-----------------------------------------------------------------*/ +iCode * +usedInRemaining (operand * op, iCode * ic) +{ + iCode *lic = ic; + + if (!IS_SYMOP (op)) + return 0; + + for (; lic; lic = lic->next) + { + + /* if the operand is a parameter */ + /* then check for calls and return */ + /* true if there is a call */ + /* if this is a global variable then + return true */ + if (lic->op == CALL || lic->op == PCALL) + { + value *args; + if (lic->op == CALL) { + args=FUNC_ARGS(OP_SYMBOL(IC_LEFT(lic))->type); + } else { + args=FUNC_ARGS(operandType(IC_LEFT(lic))->next); + } + if ((IS_PARM (op) && + isParameterToCall (args, op)) || + isOperandGlobal (op)) + return lic; + } + + if (ic->op == SEND && + isOperandEqual (IC_LEFT (lic), op)) + return lic; + + if (SKIP_IC1 (lic)) + continue; + + /* if ifx then check the condition */ + if (lic->op == IFX && + isOperandEqual (IC_COND (lic), op)) + return lic; + + if (lic->op == JUMPTABLE && + isOperandEqual (IC_JTCOND (lic), op)) + return lic; + + if (IC_RIGHT (lic) && + isOperandEqual (IC_RIGHT (lic), op)) + return lic; + + if (IC_LEFT (lic) && + isOperandEqual (IC_LEFT (lic), op)) + return lic; + + /* for a pointer assignment usage */ + if (POINTER_SET (lic) && + isOperandEqual (op, IC_RESULT (lic))) + return lic; + else if (IC_RESULT (lic) && isOperandEqual (IC_RESULT (lic), op)) + return NULL; + } + + return NULL; +} + + + +/*-----------------------------------------------------------------*/ +/* isDefAlive - will return true if definiton reaches a block & used */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (isDefAlive) +{ + eBBlock *ebp = item; + V_ARG (iCode *, diCode); + + if (ebp->visited) + return 0; + + ebp->visited = 1; + + /* if this definition is used in the block */ + if (bitVectBitValue (ebp->usesDefs, diCode->key)) + return 1; + + return applyToSet (ebp->succList, isDefAlive, diCode); +} diff --git a/src/SDCCdflow.h b/src/SDCCdflow.h new file mode 100644 index 0000000..6e484d4 --- /dev/null +++ b/src/SDCCdflow.h @@ -0,0 +1,39 @@ +/*------------------------------------------------------------------------- + + SDCCdflow.h - header file for data flow analysis & utility routines + related to data flow. + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "SDCCset.h" + +#ifndef SDCCDFLOW_H +#define SDCCDFLOW_H 1 + +DEFSETFUNC (mergeInExprs); +DEFSETFUNC (ifKilledInBlock); +void computeDataFlow (ebbIndex *); +DEFSETFUNC (mergeInDefs); +DEFSETFUNC (isDefAlive); +iCode *usedInRemaining (operand *, iCode *); +int usedBetweenPoints (operand *, iCode *, iCode *); +#endif diff --git a/src/SDCCdwarf2.c b/src/SDCCdwarf2.c new file mode 100644 index 0000000..0e1d1c3 --- /dev/null +++ b/src/SDCCdwarf2.c @@ -0,0 +1,3078 @@ +/*------------------------------------------------------------------------- + SDCCdwarf2.c - generate DWARF2 debug information + + Written By - Erik Petrich . epetrich@users.sourceforge.net (2004) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + + +#include "common.h" +#include "SDCCdwarf2.h" + +/************************************************************* + * + * + * + * + *************************************************************/ + +extern set *includeDirsSet; + +int dwOpenFile(char *file); +int dwCloseFile(void); +int dwWriteFunction(symbol *pSym, iCode *ic); +int dwWriteEndFunction(symbol *pSym, iCode *ic, int offset); +int dwWriteLabel(symbol *pSym, iCode *ic); +int dwWriteScope(iCode *ic); +int dwWriteSymbol(symbol *pSym); +int dwWriteType(structdef *sdef, int block, int inStruct, char *tag); +int dwWriteModule(char *name); +int dwWriteCLine(iCode *ic); +int dwWriteALine(char *module, int Line); +int dwWriteFrameAddress(char *variable, struct regs *reg, int offset); +int dwWriteBasicSymbol(symbol *sym, int isStructSym, int isFunc); + + +DEBUGFILE dwarf2DebugFile = + { + &dwOpenFile, + &dwCloseFile, + &dwWriteModule, + &dwWriteFunction, + &dwWriteEndFunction, + &dwWriteLabel, + &dwWriteScope, + &dwWriteSymbol, + &dwWriteType, + &dwWriteCLine, + &dwWriteALine, + &dwWriteFrameAddress + }; + +FILE *dwarf2FilePtr = NULL; +char *dwModuleName = NULL; +dwtag *dwRootTag = NULL; +dwtag *dwFuncTag = NULL; +dwtag *dwScopeTag = NULL; +hTab * dwAbbrevTable; +int dwAbbrevNum = 0; +hTab * dwTypeTagTable; +int dwRefNum = 0; +int dwScopeBlock = 0; +int dwScopeLevel = 0; +int dwDebugSymbol = 0; +//dwcfins * dwCIEins = NULL; +dwlocregion * dwFrameLastLoc = NULL; +dwloclist * dwRootLocList = NULL; +dwloclist * dwFrameLocList = NULL; +int dwLineBase = -5; +int dwLineRange = 15; +int dwLineOpcodeBase = 10; +set * dwFilenameSet = NULL; +dwline * dwLineFirst = NULL; +dwline * dwLineLast = NULL; + + +/*----------------------------------------------------------------------*/ +/* dwNewDebugSymbol - returns the name for a new debug symbol */ +/*----------------------------------------------------------------------*/ +static char * +dwNewDebugSymbol () +{ + char debugSym[SDCC_NAME_MAX]; + + sprintf (debugSym, "S%s$%s$%d", dwModuleName, currFunc->name, dwDebugSymbol); + dwDebugSymbol++; + return Safe_strdup (debugSym); +} + + +/*----------------------------------------------------------------------*/ +/* dwWriteByte - generate a single byte assembler constant in the form: */ +/* */ +/* .db label+offset ; comment */ +/* */ +/* The label and comment parameters are optional */ +/*----------------------------------------------------------------------*/ +static void +dwWriteByte (char * label, int offset, char * comment) +{ + tfprintf (dwarf2FilePtr, "\t!db\t"); + if (label) + { + if (offset) + fprintf (dwarf2FilePtr, "%s+%d", label, offset); + else + fprintf (dwarf2FilePtr, "%s", label); + } + else + fprintf (dwarf2FilePtr, "%d", offset); + + if (comment) + fprintf (dwarf2FilePtr, "\t;%s\n", comment); + else + fprintf (dwarf2FilePtr, "\n"); +} + +/*----------------------------------------------------------------------*/ +/* dwWriteHalf - generate a two byte assembler constant in the form: */ +/* */ +/* .dw label+offset ; comment */ +/* */ +/* The label and comment parameters are optional */ +/*----------------------------------------------------------------------*/ +static void +dwWriteHalf (char * label, int offset, char * comment) +{ + tfprintf (dwarf2FilePtr, "\t!dw\t"); + if (label) + { + if (offset) + fprintf (dwarf2FilePtr, "%s+%d", label, offset); + else + fprintf (dwarf2FilePtr, "%s", label); + } + else + fprintf (dwarf2FilePtr, "%d", offset); + + if (comment) + fprintf (dwarf2FilePtr, "\t;%s\n", comment); + else + fprintf (dwarf2FilePtr, "\n"); +} + +/*----------------------------------------------------------------------*/ +/* dwWriteWord - generate a four byte assembler constant in the form: */ +/* */ +/* .dd label+offset ; comment */ +/* */ +/* The label and comment parameters are optional */ +/*----------------------------------------------------------------------*/ +static void +dwWriteWord (char * label, int offset, char * comment) +{ + /* FIXME: need to implement !dd pseudo-op in the assember. In the */ + /* meantime, we use dw with zero padding and hope the values fit */ + /* in only 16 bits. */ +#if 0 + tfprintf (dwarf2FilePtr, "\t!dd\t"); + if (label) + { + if (offset) + fprintf (dwarf2FilePtr, "%s+%d", label, offset); + else + fprintf (dwarf2FilePtr, "%s", label); + } + else + fprintf (dwarf2FilePtr, "%d", offset); +#else + tfprintf (dwarf2FilePtr, "\t!dw\t"); + if (port->little_endian) + { + if (label) + { + if (offset) + fprintf (dwarf2FilePtr, "(%s+%d),0", label, offset); + else + fprintf (dwarf2FilePtr, "(%s),0", label); + } + else + fprintf (dwarf2FilePtr, "%d,%d", offset, offset >> 16); + } + else + { + if (label) + { + if (offset) + fprintf (dwarf2FilePtr, "0,(%s+%d)", label, offset); + else + fprintf (dwarf2FilePtr, "0,(%s)", label); + } + else + fprintf (dwarf2FilePtr, "%d,%d", offset >> 16, offset); + } +#endif + + if (comment) + fprintf (dwarf2FilePtr, "\t;%s\n", comment); + else + fprintf (dwarf2FilePtr, "\n"); +} + + +/*----------------------------------------------------------------------*/ +/* dwWriteULEB128 - generate an unsigned variable length assembler */ +/* constant in the form: */ +/* */ +/* .uleb128 label+offset ; comment */ +/* */ +/* The label and comment parameters are optional */ +/*----------------------------------------------------------------------*/ +static void +dwWriteULEB128 (char * label, int offset, char * comment) +{ + tfprintf (dwarf2FilePtr, "\t.uleb128\t"); + if (label) + { + if (offset) + fprintf (dwarf2FilePtr, "%s+%d", label, offset); + else + fprintf (dwarf2FilePtr, "%s", label); + } + else + fprintf (dwarf2FilePtr, "%d", offset); + + if (comment) + fprintf (dwarf2FilePtr, "\t;%s\n", comment); + else + fprintf (dwarf2FilePtr, "\n"); +} + +/*----------------------------------------------------------------------*/ +/* dwWriteSLEB128 - generate a signed variable length assembler */ +/* constant in the form: */ +/* */ +/* .sleb128 label+offset ; comment */ +/* */ +/* The label and comment parameters are optional */ +/*----------------------------------------------------------------------*/ +static void +dwWriteSLEB128 (char * label, int offset, char * comment) +{ + tfprintf (dwarf2FilePtr, "\t.sleb128\t"); + if (label) + { + if (offset) + fprintf (dwarf2FilePtr, "%s+%d", label, offset); + else + fprintf (dwarf2FilePtr, "%s", label); + } + else + fprintf (dwarf2FilePtr, "%d", offset); + + if (comment) + fprintf (dwarf2FilePtr, "\t;%s\n", comment); + else + fprintf (dwarf2FilePtr, "\n"); +} + + +/*----------------------------------------------------------------------*/ +/* dwSizeofULEB128 - return the size (in bytes) of an unsigned variable */ +/* length constant */ +/*----------------------------------------------------------------------*/ +static int +dwSizeofULEB128 (int unsigned value) +{ + int size = 0; + + do + { + value >>= 7; + size++; + } + while (value); + + return size; +} + +/*----------------------------------------------------------------------*/ +/* dwSizeofSLEB128 - return the size (in bytes) of a signed variable */ +/* length constant */ +/*----------------------------------------------------------------------*/ +static int +dwSizeofSLEB128 (int value) +{ + int size = 0; + int negative = (value < 0); + int sign; + + while (1) + { + size++; + sign = value & 0x40; + value >>= 7; + if (negative) + value |= (0x7f << (sizeof(int)*8 - 7)); + if ((value == 0 && !sign) || (value == -1 && sign)) + break; + } + + return size; +} + +/*----------------------------------------------------------------------*/ +/* dwWriteString - generate a string constant in the form: */ +/* */ +/* .ascii /string/ ; comment */ +/* */ +/* The comment parameter is optional. The string may contain any */ +/* non-null characters */ +/*----------------------------------------------------------------------*/ +static void +dwWriteString (char * string, char * comment) +{ + /* FIXME: need to safely handle nonalphanumeric data in string */ + + tfprintf (dwarf2FilePtr, "\t!ascii\n", string); + dwWriteByte (NULL, 0, comment); +} + + +/*----------------------------------------------------------------------*/ +/* dwWriteAddress - generate an assembler constant in the form: */ +/* */ +/* .dw label+offset ; comment */ +/* or .dd label+offset ; comment */ +/* */ +/* depending on how the relevant ABI defines the address size (may be */ +/* larger than the CPU's actual address size). The label and comment */ +/* parameters are optional */ +/*----------------------------------------------------------------------*/ +static void +dwWriteAddress (char * label, int offset, char * comment) +{ + switch (port->debugger.dwarf.addressSize) + { + case 2: + dwWriteHalf (label, offset, comment); + break; + case 4: + dwWriteWord (label, offset, comment); + break; + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "unsupported port->debugger.dwarf.addressSize"); + } +} + + +/*----------------------------------------------------------------------*/ +/* dwWriteHalfDelta - generate a two byte assembler constant in the */ +/* form: */ +/* */ +/* .dw offset+label1-label2 */ +/* */ +/* The offset parameter is optional */ +/*----------------------------------------------------------------------*/ +static void +dwWriteHalfDelta (char * label1, char * label2, int offset) +{ + if (offset) + tfprintf (dwarf2FilePtr, "\t!dw\t%d+%s-%s\n", offset, label1, label2); + else + tfprintf (dwarf2FilePtr, "\t!dw\t%s-%s\n", label1, label2); +} + +/*----------------------------------------------------------------------*/ +/* dwWriteWordDelta - generate a four byte assembler constant in the */ +/* form: */ +/* */ +/* .dd label1-label2 */ +/*----------------------------------------------------------------------*/ +static void +dwWriteWordDelta (char * label1, char * label2) +{ + /* FIXME: need to implement !dd pseudo-op; this hack only */ + /* works for positive offsets of less than 64k */ +#if 0 + tfprintf (dwarf2FilePtr, "\t!dd\t%s-%s\n", label1,label2); +#else + if (port->little_endian) + { + tfprintf (dwarf2FilePtr, "\t!dw\t%s-%s,%d\n", label1, label2, 0); + } + else + { + tfprintf (dwarf2FilePtr, "\t!dw\t%d,%s-%s\n", 0, label1, label2); + } +#endif +} + + +/* disabled to eliminiate unused function warning */ +#if 0 +/*----------------------------------------------------------------------*/ +/* dwWriteAddressDelta - generate an assembler constant in the form: */ +/* */ +/* .dw label1-label2 */ +/* or .dd label1-label2 */ +/* */ +/* depending on how the relevant ABI defines the address size (may be */ +/* larger than the CPU's actual address size) */ +/*----------------------------------------------------------------------*/ +static void +dwWriteAddressDelta (char * label1, char * label2) +{ + switch (port->debugger.dwarf.addressSize) + { + case 2: + dwWriteHalfDelta (label1, label2, 0); + break; + case 4: + dwWriteWordDelta (label1, label2); + break; + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "unsupported port->debugger.dwarf.addressSize"); + } +} + +/*----------------------------------------------------------------------*/ +/* dwWriteULEB128Delta - generate an unsigned variable byte assembler */ +/* constant in the form: */ +/* */ +/* .uleb128 offset+label1-label2 */ +/* */ +/* The offset parameter is optional */ +/*----------------------------------------------------------------------*/ +static void +dwWriteULEB128Delta (char * label1, char * label2, int offset) +{ + if (offset) + tfprintf (dwarf2FilePtr, "\t.uleb128\t%d+%s-%s\n", offset, label1, label2); + else + tfprintf (dwarf2FilePtr, "\t.uleb128\t%s-%s\n", label1, label2); +} +#endif + +/*------------------------------------------------------------------------*/ + +/*----------------------------------------------------------------------*/ +/* dwNewLoc - allocates a new location expression node */ +/*----------------------------------------------------------------------*/ +dwloc * +dwNewLoc (int opcode, char * label, int offset) +{ + dwloc * lp; + + lp = Safe_alloc (sizeof (dwloc)); + + lp->opcode = opcode; + lp->operand.label = label; + lp->operand.offset = offset; + + return lp; +} + +/*-------------------------------------------------------------------------*/ +/* dwSizeofLoc - returns the size (in bytes) of a chain of location */ +/* expression nodes as they would be encoded by dwWriteLoc() */ +/*-------------------------------------------------------------------------*/ +static int +dwSizeofLoc (dwloc * lp) +{ + int size = 0; + + while (lp) + { + size++; + switch (lp->opcode) + { + case DW_OP_addr: + size += port->debugger.dwarf.addressSize; + break; + + case DW_OP_deref_size: + case DW_OP_xderef_size: + case DW_OP_pick: + case DW_OP_const1u: + case DW_OP_const1s: + size += 1; + break; + + case DW_OP_skip: + case DW_OP_bra: + case DW_OP_const2u: + case DW_OP_const2s: + size += 2; + break; + + case DW_OP_const4u: + case DW_OP_const4s: + size += 4; + break; + + case DW_OP_const8u: + case DW_OP_const8s: + size += 8; + break; + + case DW_OP_piece: + case DW_OP_regx: + case DW_OP_plus_uconst: + size += dwSizeofULEB128 (lp->operand.offset); + break; + + case DW_OP_breg0: + case DW_OP_breg1: + case DW_OP_breg2: + case DW_OP_breg3: + case DW_OP_breg4: + case DW_OP_breg5: + case DW_OP_breg6: + case DW_OP_breg7: + case DW_OP_breg8: + case DW_OP_breg9: + case DW_OP_breg10: + case DW_OP_breg11: + case DW_OP_breg12: + case DW_OP_breg13: + case DW_OP_breg14: + case DW_OP_breg15: + case DW_OP_breg16: + case DW_OP_breg17: + case DW_OP_breg18: + case DW_OP_breg19: + case DW_OP_breg20: + case DW_OP_breg21: + case DW_OP_breg22: + case DW_OP_breg23: + case DW_OP_breg24: + case DW_OP_breg25: + case DW_OP_breg26: + case DW_OP_breg27: + case DW_OP_breg28: + case DW_OP_breg29: + case DW_OP_breg30: + case DW_OP_breg31: + case DW_OP_fbreg: + size += dwSizeofSLEB128 (lp->operand.offset); + break; + } + + lp = lp->next; + } + + return size; +} + +/*------------------------------------------------------------------------*/ +/* dwWriteLoc - writes a chain of location expression nodes */ +/*------------------------------------------------------------------------*/ +static void +dwWriteLoc (dwloc *lp) +{ + while (lp) + { + dwWriteByte (NULL, lp->opcode, NULL); + switch (lp->opcode) + { + case DW_OP_addr: + dwWriteAddress (lp->operand.label, lp->operand.offset, NULL); + break; + + case DW_OP_deref_size: + case DW_OP_xderef_size: + case DW_OP_pick: + case DW_OP_const1u: + case DW_OP_const1s: + dwWriteByte (NULL, lp->operand.offset, NULL); + break; + + case DW_OP_skip: + case DW_OP_bra: + case DW_OP_const2u: + case DW_OP_const2s: + dwWriteHalf (NULL, lp->operand.offset, NULL); + break; + + case DW_OP_const4u: + case DW_OP_const4s: + dwWriteWord (NULL, lp->operand.offset, NULL); + break; + + case DW_OP_piece: + case DW_OP_regx: + case DW_OP_plus_uconst: + dwWriteULEB128 (NULL, lp->operand.offset, NULL); + break; + + case DW_OP_breg0: + case DW_OP_breg1: + case DW_OP_breg2: + case DW_OP_breg3: + case DW_OP_breg4: + case DW_OP_breg5: + case DW_OP_breg6: + case DW_OP_breg7: + case DW_OP_breg8: + case DW_OP_breg9: + case DW_OP_breg10: + case DW_OP_breg11: + case DW_OP_breg12: + case DW_OP_breg13: + case DW_OP_breg14: + case DW_OP_breg15: + case DW_OP_breg16: + case DW_OP_breg17: + case DW_OP_breg18: + case DW_OP_breg19: + case DW_OP_breg20: + case DW_OP_breg21: + case DW_OP_breg22: + case DW_OP_breg23: + case DW_OP_breg24: + case DW_OP_breg25: + case DW_OP_breg26: + case DW_OP_breg27: + case DW_OP_breg28: + case DW_OP_breg29: + case DW_OP_breg30: + case DW_OP_breg31: + case DW_OP_fbreg: + dwWriteSLEB128 (NULL, lp->operand.offset, NULL); + break; + } + + lp = lp->next; + } +} + +/*----------------------------------------------------------------------*/ +/* dwNewLocList - allocates a new list of location expression node */ +/*----------------------------------------------------------------------*/ +static dwloclist * +dwNewLocList (void) +{ + dwloclist * llp; + + llp = Safe_alloc (sizeof (dwloclist)); + + return llp; +} + +/*----------------------------------------------------------------------*/ +/* dwSizeofLocRegion - returns the size (in bytes) of a chain of */ +/* location regions (inluding their location */ +/* expression nodes) as encoded by dwWriteLocLists */ +/*----------------------------------------------------------------------*/ +static int +dwSizeofLocRegion (dwlocregion * lrp) +{ + int size = 0; + + while (lrp) + { + size += 2 * port->debugger.dwarf.addressSize; + size += 2 + dwSizeofLoc (lrp->loc); + lrp = lrp->next; + } + + size += 2 * port->debugger.dwarf.addressSize; + return size; +} + +/*-----------------------------------------------------------------------*/ +/* dwAssignLocListAddresses - assign the address offsets of the location */ +/* lists so that they can be referenced from */ +/* the tag structure */ +/*-----------------------------------------------------------------------*/ +static void +dwAssignLocListAddresses (void) +{ + dwloclist * llp; + int address = 0; + + llp = dwRootLocList; + while (llp) + { + llp->baseOffset = address; + address += dwSizeofLocRegion (llp->region); + + llp = llp->next; + } +} + +/*-----------------------------------------------------------------------*/ +/* dwWriteLocLists - write all of the location lists in dwRootLocList to */ +/* the .debug_loc section */ +/*-----------------------------------------------------------------------*/ +static void +dwWriteLocLists (void) +{ + dwlocregion * lrp; + dwloclist * llp; + + tfprintf (dwarf2FilePtr, "\n\t!area\n", ".debug_loc (NOLOAD)"); + tfprintf (dwarf2FilePtr, "!slabeldef\n", "Ldebug_loc_start"); + + llp = dwRootLocList; + while (llp) + { + //fprintf (dwarf2FilePtr, "; baseOffset = 0x%x\n", llp->baseOffset); + lrp = llp->region; + while (lrp) + { + dwWriteAddress (lrp->startLabel, 0, NULL); + dwWriteAddress (lrp->endLabel, 0, NULL); + dwWriteHalf (NULL, dwSizeofLoc (lrp->loc), NULL); + dwWriteLoc (lrp->loc); + lrp = lrp ->next; + } + + dwWriteAddress (NULL, 0, NULL); + dwWriteAddress (NULL, 0, NULL); + + llp = llp->next; + } + +} + + +/*------------------------------------------------------------------------*/ + + +/*----------------------------------------------------------------------*/ +/* dwNewAttr - allocate a new tag attribute node */ +/*----------------------------------------------------------------------*/ +static dwattr * +dwNewAttr (int attr) +{ + dwattr * ap; + + ap = Safe_alloc ( sizeof (dwattr)); + ap->attr = attr; + + return ap; +} + +/*----------------------------------------------------------------------*/ +/* dwFreeAttr - deallocate a tag attribute node */ +/*----------------------------------------------------------------------*/ +static void +dwFreeAttr (dwattr * ap) +{ + Safe_free (ap); +} + + + +/*-------------------------------------------------------------------------*/ +/* dwNewAttrString - allocate a new tag attribute node with a string value */ +/*-------------------------------------------------------------------------*/ +static dwattr * +dwNewAttrString (int attr, char * string) +{ + dwattr * ap; + + ap = dwNewAttr (attr); + ap->form = DW_FORM_string; + ap->val.string = string; + return ap; +} + + +/*---------------------------------------------------------------------*/ +/* dwNewAttrConst - allocate a new tag attribute node with an unsigned */ +/* numeric constant value */ +/*---------------------------------------------------------------------*/ +static dwattr * +dwNewAttrConst (int attr, unsigned int data) +{ + dwattr * ap; + + ap = dwNewAttr (attr); + if (data <= 0xffu) + ap->form = DW_FORM_data1; + else if (data <= 0xffffu) + ap->form = DW_FORM_data2; + else + ap->form = DW_FORM_data4; + + ap->val.data = data; + return ap; +} + +/* disabled to eliminiate unused function warning */ +#if 0 +/*---------------------------------------------------------------------*/ +/* dwNewAttrSignedConst - allocate a new tag attribute node with a */ +/* signed numeric constant value */ +/*---------------------------------------------------------------------*/ +static dwattr * +dwNewAttrSignedConst (int attr, int data) +{ + dwattr * ap; + + ap = dwNewAttr (attr); + if (data <= 0x7f && data >= -0x80) + ap->form = DW_FORM_data1; + else if (data <= 0xffff && data >= -0x8000) + ap->form = DW_FORM_data2; + else + ap->form = DW_FORM_data4; + + ap->val.data = data; + return ap; +} +#endif + +/*---------------------------------------------------------------------*/ +/* dwNewAttrFlag - allocate a new tag attribute node with a boolean */ +/* flag value (zero/non-zero) */ +/*---------------------------------------------------------------------*/ +static dwattr * +dwNewAttrFlag (int attr, int data) +{ + dwattr * ap; + + ap = dwNewAttr (attr); + ap->form = DW_FORM_flag; + + ap->val.data = data; + return ap; +} + +/*---------------------------------------------------------------------*/ +/* dwNewAttrAddrSymbol - allocate a new tag attribute node with the */ +/* address of a C symbol plus an offset */ +/*---------------------------------------------------------------------*/ +static dwattr * +dwNewAttrAddrSymbol (int attr, symbol * sym, int offset) +{ + dwattr * ap; + + ap = dwNewAttr (attr); + ap->form = DW_FORM_addr; + + ap->val.symaddr.label = sym->rname; + ap->val.symaddr.offset = offset; + return ap; +} + +/*---------------------------------------------------------------------*/ +/* dwNewAttrAddrLabel - allocate a new tag attribute node with the */ +/* address of an assembler label plus an offset */ +/*---------------------------------------------------------------------*/ +static dwattr * +dwNewAttrAddrLabel (int attr, char * label, int offset) +{ + dwattr * ap; + + ap = dwNewAttr (attr); + ap->form = DW_FORM_addr; + + ap->val.symaddr.label = label; + ap->val.symaddr.offset = offset; + return ap; +} + +/*---------------------------------------------------------------------*/ +/* dwNewAttrTagRef - allocate a new tag attribute node that references */ +/* a tag node */ +/*---------------------------------------------------------------------*/ +static dwattr * +dwNewAttrTagRef (int attr, dwtag * tp) +{ + dwattr * ap; + + ap = dwNewAttr (attr); + ap->form = DW_FORM_ref4; + + ap->val.ref = tp; + return ap; +} + +/*---------------------------------------------------------------------*/ +/* dwNewAttrLocRef - allocate a new tag attribute node that references */ +/* a location list */ +/*---------------------------------------------------------------------*/ +static dwattr * +dwNewAttrLocRef (int attr, dwloclist * llp) +{ + dwattr * ap; + + ap = dwNewAttr (attr); + ap->form = DW_FORM_data4; + + ap->val.loclist = llp; + return ap; +} + +/*-----------------------------------------------------------------------*/ +/* dwNewAttrLabelRef - allocate a new tag attribute node that references */ +/* the address of an assembler label plus an offset */ +/*-----------------------------------------------------------------------*/ +static dwattr * +dwNewAttrLabelRef (int attr, char * label, int offset) +{ + dwattr * ap; + + ap = dwNewAttr (attr); + ap->form = DW_FORM_data4; + + ap->val.symaddr.label = label; + ap->val.symaddr.offset = offset; + return ap; +} + +/*---------------------------------------------------------------------*/ +/* dwNewAttrLoc - allocate a new tag attribute node for a chain of */ +/* location expression nodes */ +/*---------------------------------------------------------------------*/ +dwattr * +dwNewAttrLoc (int attr, dwloc * lp) +{ + dwattr * ap; + + ap = dwNewAttr (attr); + ap->form = DW_FORM_block1; + ap->val.loc = lp; + + return ap; +} + +/*---------------------------------------------------------------------*/ +/* dwWriteAttr - write a tag attribute node */ +/*---------------------------------------------------------------------*/ +static void +dwWriteAttr (dwattr * ap) +{ + + switch (ap->form) + { + case DW_FORM_addr: + dwWriteAddress (ap->val.symaddr.label, ap->val.symaddr.offset, NULL); + break; + + case DW_FORM_block: + dwWriteULEB128 (NULL, dwSizeofLoc (ap->val.loc), NULL); + dwWriteLoc (ap->val.loc); + break; + + case DW_FORM_block1: + dwWriteByte (NULL, dwSizeofLoc (ap->val.loc), NULL); + dwWriteLoc (ap->val.loc); + break; + + case DW_FORM_block2: + dwWriteHalf (NULL, dwSizeofLoc (ap->val.loc), NULL); + dwWriteLoc (ap->val.loc); + break; + + case DW_FORM_block4: + dwWriteWord (NULL, dwSizeofLoc (ap->val.loc), NULL); + dwWriteLoc (ap->val.loc); + break; + + case DW_FORM_data1: + case DW_FORM_flag: + dwWriteByte (NULL, ap->val.data, NULL); + break; + + case DW_FORM_data2: + dwWriteHalf (NULL, ap->val.data, NULL); + break; + + case DW_FORM_data4: + switch (ap->attr) + { + case DW_AT_stmt_list: + dwWriteWord (ap->val.symaddr.label, ap->val.symaddr.offset, NULL); + break; + case DW_AT_location: + case DW_AT_frame_base: + dwWriteWord ("Ldebug_loc_start", ap->val.loclist->baseOffset, NULL); + break; + default: + dwWriteWord (NULL, ap->val.data, NULL); + } + break; + + case DW_FORM_udata: + dwWriteULEB128 (NULL, ap->val.data, NULL); + break; + + case DW_FORM_sdata: + dwWriteSLEB128 (NULL, ap->val.data, NULL); + break; + + case DW_FORM_string: + dwWriteString (ap->val.string, NULL); + break; + + case DW_FORM_ref1: + dwWriteByte (NULL, ap->val.ref->baseOffset, NULL); + break; + + case DW_FORM_ref2: + dwWriteHalf (NULL, ap->val.ref->baseOffset, NULL); + break; + + case DW_FORM_ref4: + dwWriteWord (NULL, ap->val.ref->baseOffset, NULL); + break; + + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "unsupported DWARF form"); + exit (1); + } +} + +/*---------------------------------------------------------------------*/ +/* dwSizeofAttr - returns the size (in bytes) of a tag attribute node */ +/* as encoded by dwWriteAttr */ +/*---------------------------------------------------------------------*/ +static int +dwSizeofAttr (dwattr * ap) +{ + int size; + + switch (ap->form) + { + case DW_FORM_addr: + return port->debugger.dwarf.addressSize; + + case DW_FORM_block: + size = dwSizeofLoc (ap->val.loc); + return size + dwSizeofULEB128 (size); + + case DW_FORM_block1: + size = dwSizeofLoc (ap->val.loc); + return size + 1; + + case DW_FORM_block2: + size = dwSizeofLoc (ap->val.loc); + return size + 2; + + case DW_FORM_block4: + size = dwSizeofLoc (ap->val.loc); + return size + 4; + + case DW_FORM_data1: + case DW_FORM_flag: + return 1; + + case DW_FORM_data2: + return 2; + + case DW_FORM_data4: + return 4; + + case DW_FORM_udata: + return dwSizeofULEB128 (ap->val.data); + + case DW_FORM_sdata: + return dwSizeofSLEB128 (ap->val.data); + + case DW_FORM_string: + return 1 + strlen (ap->val.string); + + case DW_FORM_ref1: + return 1; + + case DW_FORM_ref2: + return 2; + + case DW_FORM_ref4: + return 4; + + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "unsupported DWARF form"); + exit (1); + } + +} + + +/*---------------------------------------------------------------------*/ +/* dwFindAttr - for a tag node, return a pointer to a particular */ +/* attribute node, or NULL if not found */ +/*---------------------------------------------------------------------*/ +static dwattr * +dwFindAttr (dwtag * tp, int attr) +{ + dwattr * ap; + + ap = tp->attribs; + while (ap) + { + if (ap->attr == attr) + return ap; + ap = ap->next; + } + + return NULL; +} + + + +/*------------------------------------------------------------------------*/ + + +/*----------------------------------------------------------------------*/ +/* dwNewTag - allocate a new tag node */ +/*----------------------------------------------------------------------*/ +static dwtag * +dwNewTag (int tag) +{ + dwtag * tp; + + tp = Safe_alloc ( sizeof (dwtag)); + tp->tag = tag; + + return tp; +} + +/*----------------------------------------------------------------------*/ +/* dwAddTagAttr - add an attribute to a tag */ +/*----------------------------------------------------------------------*/ +static void +dwAddTagAttr (dwtag * tp, dwattr * ap) +{ + dwattr * curap; + + if (!tp->attribs) + tp->attribs = ap; + else if (ap->attr < tp->attribs->attr) + { + ap->next = tp->attribs; + tp->attribs = ap; + } + else + { + curap = tp->attribs; + while (curap->next && curap->next->attr < ap->attr) + curap = curap->next; + ap->next = curap->next; + curap->next = ap; + } +} + +/*----------------------------------------------------------------------*/ +/* dwSetTagAttr - repleace an existing attribute of a tag with a new */ +/* attribute or add if non-existent */ +/*----------------------------------------------------------------------*/ +static void +dwSetTagAttr (dwtag *tp, dwattr * ap) +{ + dwattr * curap; + + curap = dwFindAttr (tp, ap->attr); + if (curap) + { + ap->next = curap->next; + *curap = *ap; + dwFreeAttr (ap); + } + else + dwAddTagAttr (tp, ap); +} + + +/*----------------------------------------------------------------------*/ +/* dwAddTagChild - add a tag as a child of another tag */ +/*----------------------------------------------------------------------*/ +static dwtag * +dwAddTagChild (dwtag * parent, dwtag * child) +{ + child->parent = parent; + if (parent->lastChild) + { + parent->lastChild->siblings = child; + parent->lastChild = child; + } + else + { + parent->firstChild = child; + parent->lastChild = child; + } + return parent; +} + +/*----------------------------------------------------------------------*/ +/* dwMatchTagAttr - returns true if two tags are equal in value, */ +/* attributes, and offspring status (the child tags */ +/* need not match, but they must both have children or */ +/* both not have children) */ +/*----------------------------------------------------------------------*/ +static int +dwMatchTagAttr (const void * tp1v, const void * tp2v) +{ + const dwtag * tp1 = tp1v; + const dwtag * tp2 = tp2v; + dwattr * ap1 = tp1->attribs; + dwattr * ap2 = tp2->attribs; + + if (!tp1 || !tp2) + return 0; + + if (tp1->tag != tp2->tag) + return 0; + + if (tp1->firstChild && !tp2->lastChild) + return 0; + if (!tp1->firstChild && tp2->lastChild) + return 0; + + while (ap1 && ap2) + { + if (ap1->attr != ap2->attr) + return 0; + if (ap1->form != ap2->form) + return 0; + + ap1 = ap1->next; + ap2 = ap2->next; + } + + return 1; +} + +/*----------------------------------------------------------------------*/ +/* dwHashTag - return a hash code for a tag based on its value and */ +/* attributes */ +/*----------------------------------------------------------------------*/ +static int +dwHashTag (dwtag * tp) +{ + dwattr * ap = tp->attribs; + int hash = tp->tag; + + while (ap) + { + hash = (hash << 6) ^ ((hash >> 11) & 0xff); + hash ^= (ap->attr) | (ap->form << 8); + + ap = ap->next; + } + if (hash<0) + return -hash; + else + return hash; +} + +/*----------------------------------------------------------------------*/ +/* dwTraverseTag - perform a depth-first preorder traversal of a tag */ +/* tree, calling the user function at each node. The */ +/* user function is also called with a NULL tag pointer */ +/* after the last sibling of each immediate family is */ +/* processed. */ +/*----------------------------------------------------------------------*/ +static int +dwTraverseTag (dwtag *tp, int (*somefunc)(dwtag *tp, void * info), void * info) +{ + int rvalue = 0; + + while (tp) + { + rvalue += (*somefunc)(tp, info); + if (tp->firstChild) + rvalue += dwTraverseTag (tp->firstChild, somefunc, info); + tp = tp->siblings; + } + rvalue += (*somefunc)(NULL, info); + + return rvalue; +} + +/*----------------------------------------------------------------------*/ +/* dwAssignAbbrev - find a matching abbreviation for a tag or create a */ +/* a new one and assign it */ +/*----------------------------------------------------------------------*/ +static int +dwAssignAbbrev (dwtag *tp, void *info) +{ + dwtag * oldtp; + int * anp = info; /* pointer to current abbreviation number */ + int key; + + if (!tp) + return 0; + + key = dwHashTag (tp) % dwAbbrevTable->size; + oldtp = hTabFindByKey (dwAbbrevTable, key, tp, dwMatchTagAttr); + if (oldtp) + { + tp->abbrev = oldtp->abbrev; + return 0; + } + else + { + tp->abbrev = ++(*anp); + hTabAddItemLong (&dwAbbrevTable, key, tp, tp); + return 1; + } +} + +/*-----------------------------------------------------------------------*/ +/* dwWriteAbbrevs - write the abbreviations to the .debug_abbrev section */ +/*-----------------------------------------------------------------------*/ +static void +dwWriteAbbrevs (void) +{ + dwtag * tp; + dwattr * ap; + int key; + + tfprintf (dwarf2FilePtr, "\n\t!area\n", ".debug_abbrev (NOLOAD)"); + tfprintf (dwarf2FilePtr, "!slabeldef\n", "Ldebug_abbrev"); + + tp = hTabFirstItem (dwAbbrevTable, &key); + for (; tp; tp = hTabNextItem (dwAbbrevTable, &key)) + { + dwWriteULEB128 (NULL, tp->abbrev, NULL); + dwWriteULEB128 (NULL, tp->tag, NULL); + dwWriteByte (NULL, tp->firstChild ? DW_CHILDREN_yes : DW_CHILDREN_no, + NULL); + ap = tp->attribs; + while (ap) + { + dwWriteULEB128 (NULL, ap->attr, NULL); + dwWriteULEB128 (NULL, ap->form, NULL); + ap = ap->next; + } + dwWriteULEB128 (NULL, 0, NULL); + dwWriteULEB128 (NULL, 0, NULL); + + } + dwWriteULEB128 (NULL, 0, NULL); + + hTabDeleteAll (dwAbbrevTable); +} + + + +/*-----------------------------------------------------------------------*/ +/* dwWriteTag - write the encoded tag information */ +/*-----------------------------------------------------------------------*/ +static int +dwWriteTag (dwtag *tp, void *info) +{ + dwattr * ap; + + if (!tp) + { + /* mark the end of this series of siblings */ + dwWriteULEB128 (NULL, 0, NULL); + return 0; + } + + //fprintf (dwarf2FilePtr, "; baseOffset = 0x%x\n", tp->baseOffset); + + /* write the tag abbreviation */ + dwWriteULEB128 (NULL, tp->abbrev, NULL); + + /* write the values of the attributes */ + ap = tp->attribs; + while (ap) + { + dwWriteAttr (ap); + ap = ap->next; + } + + return 1; +} + + +/*-----------------------------------------------------------------------*/ +/* dwWriteTags - write all the tags to the .debug_info section */ +/*-----------------------------------------------------------------------*/ +static void +dwWriteTags (void) +{ + tfprintf (dwarf2FilePtr, "\n\t!area\n", ".debug_info (NOLOAD)"); + + dwWriteWordDelta ("Ldebug_info_end", "Ldebug_info_start"); + + tfprintf (dwarf2FilePtr, "!slabeldef\n", "Ldebug_info_start"); + + dwWriteHalf (NULL, 2, NULL); /* DWARF version */ + + dwWriteWord ("Ldebug_abbrev", 0, NULL); + + dwWriteByte (NULL, port->debugger.dwarf.addressSize, NULL); + + dwTraverseTag (dwRootTag, dwWriteTag, NULL); + + dwWriteULEB128 (NULL, 0, NULL); + + tfprintf (dwarf2FilePtr, "!slabeldef\n", "Ldebug_info_end"); + +} + +/*-----------------------------------------------------------------------*/ +/* dwAssignTagAddress - assign the current address to the current tag. */ +/* Compute the next address based on the tag size */ +/*-----------------------------------------------------------------------*/ +static int +dwAssignTagAddress (dwtag *tp, void *info) +{ + int * tap = info; + dwattr * ap; + + if (!tp) + { + *tap += 1; + return 0; + } + + tp->baseOffset = *tap; + + *tap += dwSizeofULEB128 (tp->abbrev); + + ap = tp->attribs; + while (ap) + { + *tap += dwSizeofAttr (ap); + ap = ap->next; + } + + return 0; +} + +/*-----------------------------------------------------------------------*/ +/* dwAddSibAttr - if a tag has children and a sibling, add a sibling */ +/* attribute (it allows debuggers to jump to the sibling */ +/* and skip the child data) */ +/*-----------------------------------------------------------------------*/ +static int +dwAddSibAttr (dwtag *tp, void *info) +{ + if (!tp) + return 0; + if (tp == dwRootTag) + return 0; + + if (tp->firstChild && tp->siblings) + dwAddTagAttr (tp, dwNewAttrTagRef (DW_AT_sibling, tp->siblings)); + + return 0; +} + +/*-----------------------------------------------------------------------*/ +/* dwDeleteTagAttr - given a pointer to an attribute type, delete any */ +/* matching attribute */ +/*-----------------------------------------------------------------------*/ +static int +dwDeleteTagAttr (dwtag *tp, void *info) +{ + int attr = *((int *) info); + dwattr * ap; + + if (!tp) + return 0; + + ap = tp->attribs; + if (ap && ap->attr == attr) + { + tp->attribs = ap->next; + return 1; + } + + while (ap) + { + if (ap->next && ap->next->attr == attr) + { + ap->next = ap->next->next; + return 1; + } + ap = ap->next; + } + + return 0; +} + + +/*------------------------------------------------------------------------*/ + +/*-----------------------------------------------------------------------*/ +/* dwWritePubnames - write all the public names to the .debug_pubnames */ +/* section. Externally visible functions and variables */ +/* are considered to have public names. */ +/*-----------------------------------------------------------------------*/ +static void +dwWritePubnames (void) +{ + dwtag * tp; + dwattr * ap1; + dwattr * ap2; + + tfprintf (dwarf2FilePtr, "\n\t!area\n", ".debug_pubnames (NOLOAD)"); + + dwWriteWordDelta ("Ldebug_pubnames_end", "Ldebug_pubnames_start"); + + tfprintf (dwarf2FilePtr, "!slabeldef\n", "Ldebug_pubnames_start"); + + dwWriteHalf (NULL, 2, NULL); /* DWARF version */ + + dwWriteWord ("Ldebug_info_start-4", 0, NULL); + dwWriteWordDelta ("4+Ldebug_info_end", "Ldebug_info_start"); + + if (dwRootTag && dwRootTag->firstChild) + { + tp = dwRootTag->firstChild; + while (tp) + { + if (tp->tag == DW_TAG_variable || tp->tag == DW_TAG_subprogram) + { + /* If it has a name and is externally visible, it's a pubname */ + ap1 = dwFindAttr (tp, DW_AT_external); + ap2 = dwFindAttr (tp, DW_AT_name); + if (ap1 && ap1->val.data && ap2) + { + dwWriteWord (NULL, tp->baseOffset, NULL); + dwWriteString (ap2->val.string, NULL); + } + } + + tp = tp->siblings; + } + } + dwWriteWord (NULL, 0, NULL); + tfprintf (dwarf2FilePtr, "!slabeldef\n", "Ldebug_pubnames_end"); +} + +/*------------------------------------------------------------------------*/ + +/*-----------------------------------------------------------------------*/ +/* dwFindFileIndex - find the index of a filename in dwFilenameSet; if */ +/* it does not exist, it is added */ +/*-----------------------------------------------------------------------*/ +static int +dwFindFileIndex (char * filename) +{ + char * includeDir; + dwfile * srcfile; + int fileIndex = 1; + int dirIndex = 1; + + /* Just do a linear search for the file. There should be hardly */ + /* a penalty since 1) most calls search for the first file, and */ + /* 2) the file set is usually small (often just 1 item) */ + for (srcfile = setFirstItem (dwFilenameSet); + srcfile; + srcfile = setNextItem(dwFilenameSet), fileIndex++ ) + { + if (!strcmp (srcfile->name, filename)) + return fileIndex; + } + + for (includeDir = setFirstItem (includeDirsSet); + includeDir; + includeDir = setNextItem(includeDirsSet), dirIndex++ ) + { + if (!strncmp (includeDir, filename, strlen (includeDir)) + && strlen (filename) > strlen (includeDir)) + { + if (IS_DIR_SEPARATOR(filename[strlen (includeDir)])) + break; + } + } + if (!includeDir) + dirIndex = 0; + + srcfile = Safe_alloc (sizeof (dwfile)); + srcfile->name = filename; + srcfile->dirIndex = dirIndex; + srcfile->timestamp = 0; + srcfile->length = 0; + + addSet (&dwFilenameSet, srcfile); + return fileIndex; +} + +/*-----------------------------------------------------------------------*/ +/* dwWriteLineNumber - write line number (and related position info) to */ +/* address corespondence data for a single node */ +/*-----------------------------------------------------------------------*/ +static void +dwWriteLineNumber (dwline * lp) +{ + static int curFileIndex = 1; + static int curLine = 1; + static char * curLabel = NULL; + static int curOffset = 0; + int deltaLine = lp->line - curLine; + int deltaAddr = lp->offset - curOffset; + int deltaAddrValid = curLabel && lp->label && !strcmp (lp->label, curLabel); + + //fprintf (dwarf2FilePtr, "; line %d\n", lp->line); + if (lp->begin_sequence) + { + curFileIndex = 1; + curLine = 1; + curLabel = NULL; + curOffset = 0; + + if (lp->end_sequence) + return; + } + + if (lp->fileIndex != curFileIndex) + { + dwWriteByte (NULL, DW_LNS_set_file, NULL); + dwWriteULEB128 (NULL, lp->fileIndex, NULL); + curFileIndex = lp->fileIndex; + } + + if (lp->basic_block) + { + dwWriteByte (NULL, DW_LNS_set_basic_block, NULL); + } + + if (lp->begin_sequence) + { + dwWriteByte (NULL, 0, NULL); + dwWriteULEB128 (NULL, 1+port->debugger.dwarf.addressSize, NULL); + dwWriteByte (NULL, DW_LNE_set_address, NULL); + dwWriteAddress (lp->label, lp->offset, NULL); + curLabel = lp->label; + curOffset = lp->offset; + + dwWriteByte (NULL, DW_LNS_advance_line, NULL); + dwWriteSLEB128 (NULL, lp->line - 1, NULL); + curLine = lp->line; + + dwWriteByte (NULL, DW_LNS_copy, NULL); + } + else if (lp->end_sequence) + { + if (deltaAddrValid) + { + dwWriteByte (NULL, DW_LNS_advance_pc, NULL); + dwWriteULEB128 (NULL, deltaAddr, NULL); + } + else + { + dwWriteByte (NULL, DW_LNS_fixed_advance_pc, NULL); + dwWriteHalfDelta (lp->label, curLabel, lp->offset-curOffset); + curLabel = lp->label; + curOffset = lp->offset; + } + + dwWriteByte (NULL, 0, NULL); + dwWriteULEB128 (NULL, 1, NULL); + dwWriteByte (NULL, DW_LNE_end_sequence, NULL); + } + else + { + int usedSpecial = 0; + + /* Metrowerks CW08 V3.0 gets confused by this. Just use the long */ + /* encoding until we can find a more compatible phrasing. */ + #if 0 + if (deltaLine >= dwLineBase && deltaLine < (dwLineBase+dwLineRange)) + { + int opcode; + + /* try to build a "special" opcode */ + opcode = dwLineOpcodeBase + (deltaLine - dwLineBase); + if (deltaAddrValid) + opcode += deltaAddr*dwLineRange; + + if (opcode >= dwLineOpcodeBase && opcode <= 255) + { + /* ok, we can use a "special" opcode */ + + /* If the deltaAddr value was symbolic, it can't be part */ + /* of the "special" opcode, so encode it seperately */ + if (!deltaAddrValid) + { + dwWriteByte (NULL, DW_LNS_advance_pc, NULL); + dwWriteULEB128Delta (lp->label, curLabel, lp->offset-curOffset); + curLabel = lp->label; + curOffset = lp->offset; + } + + /* Write the "special" opcode */ + dwWriteByte (NULL, opcode, NULL); + curLine = lp->line; + usedSpecial = 1; + } + } + #endif + + /* If we couldn't use the "special" opcode, we will have to */ + /* encode this the long way. */ + if (!usedSpecial) + { + dwWriteByte (NULL, DW_LNS_fixed_advance_pc, NULL); + dwWriteHalfDelta (lp->label, curLabel, lp->offset-curOffset); + curLabel = lp->label; + curOffset = lp->offset; + + dwWriteByte (NULL, DW_LNS_advance_line, NULL); + dwWriteSLEB128 (NULL, deltaLine, NULL); + curLine = lp->line; + + dwWriteByte (NULL, DW_LNS_copy, NULL); + } + + } + +} + +/*-----------------------------------------------------------------------*/ +/* dwWriteLineNumbers - write all the source line number position data */ +/* to the .debug_line section */ +/*-----------------------------------------------------------------------*/ +static void +dwWriteLineNumbers (void) +{ + char * includeDir; + dwfile * srcfile; + dwline * lp; + + tfprintf (dwarf2FilePtr, "\n\t!area\n", ".debug_line (NOLOAD)"); + + dwWriteWordDelta ("Ldebug_line_end", "Ldebug_line_start"); + + tfprintf (dwarf2FilePtr, "!slabeldef\n", "Ldebug_line_start"); + + dwWriteHalf (NULL, 2, NULL); /* DWARF version */ + + dwWriteWordDelta ("Ldebug_line_stmt-6", "Ldebug_line_start"); + + dwWriteByte (NULL, 1, NULL); /* we track everything in 1 byte increments */ + + dwWriteByte (NULL, 1, NULL); /* assume every line is a new statement */ + + dwWriteByte (NULL, dwLineBase, NULL); + dwWriteByte (NULL, dwLineRange, NULL); + + dwWriteByte (NULL, 9+1, NULL); /* there are 9 standard opcodes */ + + dwWriteByte (NULL, 0, NULL); /* number of DW_LNS_copy arguments */ + dwWriteByte (NULL, 1, NULL); /* number of DW_LNS_advance_pc arguments */ + dwWriteByte (NULL, 1, NULL); /* number of DW_LNS_advance_line arguments */ + dwWriteByte (NULL, 1, NULL); /* number of DW_LNS_set_file arguments */ + dwWriteByte (NULL, 1, NULL); /* number of DW_LNS_set_column arguments */ + dwWriteByte (NULL, 0, NULL); /* number of DW_LNS_negate_stmt arguments */ + dwWriteByte (NULL, 0, NULL); /* number of DW_LNS_set_basic_block arguments */ + dwWriteByte (NULL, 0, NULL); /* number of DW_LNS_const_add_pc arguments */ + dwWriteByte (NULL, 1, NULL); /* number of DW_LNS_fixed_advance_pc arguments */ + + /* Write the list of source directories searched */ + for (includeDir = setFirstItem (includeDirsSet); + includeDir; + includeDir = setNextItem(includeDirsSet) ) + dwWriteString (includeDir, NULL); + dwWriteByte (NULL, 0, NULL); + + /* Write the list of source files used */ + for (srcfile = setFirstItem (dwFilenameSet); + srcfile; + srcfile = setNextItem(dwFilenameSet) ) + { + dwWriteString (srcfile->name, NULL); + dwWriteULEB128 (NULL, srcfile->dirIndex, NULL); + dwWriteULEB128 (NULL, srcfile->timestamp, NULL); + dwWriteULEB128 (NULL, srcfile->length, NULL); + } + dwWriteByte (NULL, 0, NULL); + + tfprintf (dwarf2FilePtr, "!slabeldef\n", "Ldebug_line_stmt"); + + lp = dwLineFirst; + if (lp) + lp->begin_sequence = 1; + while (lp) + { + dwWriteLineNumber (lp); + if (lp->end_sequence && lp->next) + lp->next->begin_sequence = 1; + lp = lp->next; + } + + tfprintf (dwarf2FilePtr, "!slabeldef\n", "Ldebug_line_end"); +} + +/*------------------------------------------------------------------------*/ + + +/* I have disabled all of this canonical frame address related code */ +/* until I better understand this part of the DWARF2 spec. -- EEP */ +#if 0 +static void +dwWriteCFAinstructions (dwcfins *ip) +{ + dwcfop * op = ip->first; + + while (op) + { + dwWriteByte (NULL, op->opcode, NULL); + switch (op->opcode >> 6) + { + case 0: + switch (op->opcode) + { + case DW_CFA_set_loc: + dwWriteAddress (NULL, op->label, op->operand1); + break; + + case DW_CFA_advance_loc1: + dwWriteByte (NULL, op->operand1, NULL); + break; + + case DW_CFA_advance_loc2: + dwWriteHalf (NULL, op->operand1, NULL); + break; + + case DW_CFA_advance_loc4: + dwWriteWord (NULL, op->operand1, NULL); + break; + + case DW_CFA_def_cfa: + case DW_CFA_register: + case DW_CFA_offset_extended: + dwWriteULEB128 (NULL, op->operand1, NULL); + dwWriteULEB128 (NULL, op->operand2, NULL); + break; + + case DW_CFA_undefined: + case DW_CFA_same_value: + case DW_CFA_def_cfa_register: + case DW_CFA_def_cfa_offset: + case DW_CFA_restore_extended: + dwWriteULEB128 (NULL, op->operand1, NULL); + break; + } + break; + + case DW_CFA_restore >> 6: + case DW_CFA_advance_loc >> 6: + break; + + case DW_CFA_offset >> 6: + dwWriteULEB128 (NULL, op->operand1, NULL); + break; + } + op = op->next; + } +} + +static int +dwSizeofCFAinstructions (dwcfins *ip) +{ + int size = 0; + dwcfop * op = ip->first; + + while (op) + { + size++; + switch (op->opcode >> 6) + { + case 0: + switch (op->opcode) + { + case DW_CFA_set_loc: + size += port->debugger.dwarf.addressSize; + break; + + case DW_CFA_advance_loc1: + size += 1; + break; + + case DW_CFA_advance_loc2: + size += 2; + break; + + case DW_CFA_advance_loc4: + size += 4; + break; + + case DW_CFA_def_cfa: + case DW_CFA_register: + case DW_CFA_offset_extended: + size += dwSizeofULEB128 (op->operand1); + size += dwSizeofULEB128 (op->operand2); + break; + + case DW_CFA_undefined: + case DW_CFA_same_value: + case DW_CFA_def_cfa_register: + case DW_CFA_def_cfa_offset: + case DW_CFA_restore_extended: + size += dwSizeofULEB128 (op->operand1); + break; + } + break; + + case DW_CFA_restore >> 6: + case DW_CFA_advance_loc >> 6: + break; + + case DW_CFA_offset >> 6: + size += dwSizeofULEB128 (op->operand1); + break; + } + op = op->next; + } + return size; +} + +static dwcfop * +dwNewCFop (int opcode) +{ + dwcfop * op; + + op = Safe_alloc (sizeof (dwcfop)); + op->opcode = opcode; + + return op; +} + +static dwcfins * +dwNewCFins (void) +{ + return (dwcfins *) Safe_alloc (sizeof (dwcfins)); +} + +static void +dwAddCFinsOp (dwcfins * ip, dwcfop *op) +{ + if (ip->last) + ip->last->next = op; + else + ip->first = op; + ip->last = op; +} + +static dwcfins * +dwGenCFIins (void) +{ + dwcfins * ip; + dwcfop * op; + int i; + + ip = dwNewCFins (); + + /* Define the CFA as the top of the stack at function start. */ + /* The return address is then at cfa+0 */ + op = dwNewCFop (DW_CFA_def_cfa); + op->operand1 = port->debugger.dwarf.regNumSP; + op->operand2 = port->debugger.dwarf.offsetSP; + dwAddCFinsOp (ip, op); + + op = dwNewCFop (DW_CFA_offset + port->debugger.dwarf.regNumRet); + op->operand1 = 0; + dwAddCFinsOp (ip, op); + + if (port->debugger.dwarf.cfiUndef) + for (i=0; i < port->debugger.dwarf.cfiUndef->size; i++) + { + if (bitVectBitValue (port->debugger.dwarf.cfiUndef, i)) + { + op = dwNewCFop (DW_CFA_undefined); + dwAddCFinsOp (ip, op); + } + } + + if (port->debugger.dwarf.cfiSame) + for (i=0; i < port->debugger.dwarf.cfiSame->size; i++) + { + if (bitVectBitValue (port->debugger.dwarf.cfiSame, i)) + { + op = dwNewCFop (DW_CFA_undefined); + dwAddCFinsOp (ip, op); + } + } + + return ip; +} + + +static void +dwWriteFDE (dwfde * fp) +{ + dwWriteWord (NULL, dwSizeofCFAinstructions(fp->ins) + 4 + + port->debugger.dwarf.addressSize * 2, NULL); + + dwWriteWord ("Ldebug_CIE_start-4", 0, NULL); + + dwWriteAddressDelta (fp->endLabel, fp->startLabel); + + dwWriteCFAinstructions (fp->ins); + +} + +static void +dwWriteFrames (void) +{ + tfprintf (dwarf2FilePtr, "\n\t!area\n", ".debug_frame (NOLOAD)"); + + /* FIXME: these two dw should be combined into a dd */ + tfprintf (dwarf2FilePtr, "\t!dw\t0\n"); + tfprintf (dwarf2FilePtr, "\t!dw\t%s\n", "Ldebug_CIE_end-Ldebug_CIE_start"); + + tfprintf (dwarf2FilePtr, "!slabeldef\n", "Ldebug_CIE_start"); + + tfprintf (dwarf2FilePtr, "\t!dw\t0xffff\n"); + tfprintf (dwarf2FilePtr, "\t!dw\t0xffff\n"); /* CIE_id */ + + tfprintf (dwarf2FilePtr, "\t!db\t%d\n",1); /* CIE version number */ + + tfprintf (dwarf2FilePtr, "\t!db\t%d\n",0); /* augmentation (none) */ + + dwWriteULEB128 (NULL, 1, NULL); /* code alignment factor */ + + dwWriteSLEB128 (NULL, (port->stack.direction > 0) ? -1 : 1, NULL); /* data alignment factor */ + + dwWriteByte (NULL, port->debugger.dwarf.regNumRet, NULL); + + if (!dwCIEins) + { + #if 0 + if (port->debugger.dwarf.genCFIins) + dwCIEins = port->debugger.dwarf.genCFIins (); + else + #endif + dwCIEins = dwGenCFIins (); + } + dwWriteCFAinstructions (dwCIEins); + + tfprintf (dwarf2FilePtr, "!slabeldef\n", "Ldebug_CIE_end"); +} +#endif + + + + +/*------------------------------------------------------------------------*/ + + + + +/*-----------------------------------------------------------------------*/ +/* dwHashType - return a hash code for a type chain */ +/*-----------------------------------------------------------------------*/ +static int +dwHashType (sym_link * type) +{ + int hash = 0; + + while (type) + { + hash = (hash << 5) ^ ((hash >> 8) & 0xff); + if (IS_DECL (type)) + { + hash ^= DCL_TYPE (type); + } + else + { + hash ^= SPEC_NOUN (type) + | (SPEC_CONST (type) << 4) + | (SPEC_VOLATILE (type) << 5) + | (SPEC_LONG (type) << 6); + } + + type = type->next; + } + + if (hash<0) + return -hash; + else + return hash; +} + +/*-----------------------------------------------------------------------*/ +/* dwMatchType - returns true if two types match exactly (including type */ +/* qualifiers) */ +/*-----------------------------------------------------------------------*/ +static int +dwMatchTypes (const void * type1v, const void * type2v) +{ + sym_link * type1 = (sym_link *)type1v; + sym_link * type2 = (sym_link *)type2v; + + if (!type1 || !type2) + return 0; + + while (type1 && type2) + { + if (IS_SPEC(type1)) + { + if (IS_SPEC (type2)) + { + if (SPEC_NOUN (type1) != SPEC_NOUN (type2)) + return 0; + if (SPEC_NOUN (type1) == V_STRUCT + && SPEC_STRUCT (type1) != SPEC_STRUCT (type2)) + return 0; + if (SPEC_CONST (type1) != SPEC_CONST (type2)) + return 0; + if (SPEC_VOLATILE (type1) != SPEC_VOLATILE (type2)) + return 0; + if (SPEC_SHORT (type1) != SPEC_SHORT (type2)) + return 0; + if (SPEC_LONG (type1) != SPEC_LONG (type2)) + return 0; + if (SPEC_USIGN (type1) != SPEC_USIGN (type2)) + return 0; + } + else + return 0; + } + else + { + if (IS_DECL (type2)) + { + if (DCL_TYPE (type1) != DCL_TYPE (type2)) + return 0; + if (DCL_PTR_CONST (type1) != DCL_PTR_CONST (type2)) + return 0; + if (DCL_PTR_VOLATILE (type1) != DCL_PTR_VOLATILE (type2)) + return 0; + if (DCL_TYPE (type1) == ARRAY + && DCL_ELEM (type1) != DCL_ELEM (type2)) + return 0; + /* FIXME: need to match function pointer parameters */ + } + else + return 0; + } + + type1 = type1->next; + type2 = type2->next; + } + + if (!type1 && !type2) + return 1; + else + return 0; +} + +/*-----------------------------------------------------------------------*/ +/* dwTagFromType - returns the tag describing a type. If new tags need */ +/* to be created, they will be added under the specified */ +/* parent tag */ +/*-----------------------------------------------------------------------*/ +static dwtag * +dwTagFromType (sym_link * type, dwtag * parent) +{ + dwtag * oldtp; + dwtag * tp = NULL; + dwtag * modtp; + dwtag * subtp; + int key; + int tableUpdated = 0; + + key = dwHashType (type) % dwTypeTagTable->size; + oldtp = hTabFindByKey (dwTypeTagTable, key, type, dwMatchTypes); + if (oldtp) + return oldtp; + else + { + if (IS_DECL (type)) + { + switch (DCL_TYPE (type)) + { + case POINTER: + case FPOINTER: + case CPOINTER: + case GPOINTER: + case PPOINTER: + case IPOINTER: + case EEPPOINTER: + case UPOINTER: + tp = dwNewTag (DW_TAG_pointer_type); + if (type->next && !IS_VOID (type->next)) + { + subtp = dwTagFromType (type->next, parent); + dwAddTagAttr (tp, dwNewAttrTagRef (DW_AT_type, subtp)); + } + dwAddTagAttr (tp, dwNewAttrConst (DW_AT_byte_size, + getSize (type))); + dwAddTagChild (parent, tp); + if (DCL_PTR_VOLATILE (type)) + { + modtp = dwNewTag (DW_TAG_volatile_type); + dwAddTagAttr (modtp, dwNewAttrTagRef (DW_AT_type, tp)); + dwAddTagChild (parent, modtp); + tp = modtp; + } + if (DCL_PTR_CONST (type)) + { + modtp = dwNewTag (DW_TAG_const_type); + dwAddTagAttr (modtp, dwNewAttrTagRef (DW_AT_type, tp)); + dwAddTagChild (parent, modtp); + tp = modtp; + } + break; + + case ARRAY: + tp = dwNewTag (DW_TAG_array_type); + subtp = dwTagFromType (type->next, parent); + dwAddTagAttr (tp, dwNewAttrTagRef (DW_AT_type, subtp)); + if (!subtp->parent) + dwAddTagChild (tp, subtp); + if (DCL_ELEM (type)) + { + dwAddTagAttr (tp, dwNewAttrConst (DW_AT_byte_size, + getSize (type))); + subtp = dwNewTag (DW_TAG_subrange_type); + dwAddTagAttr (subtp, dwNewAttrConst (DW_AT_upper_bound, + DCL_ELEM (type)-1)); + dwAddTagChild (tp, subtp); + } + + break; + + case FUNCTION: + tp = dwNewTag (DW_TAG_subroutine_type); + if (type->next && !IS_VOID (type->next)) + { + subtp = dwTagFromType (type->next, parent); + dwAddTagAttr (tp, dwNewAttrTagRef (DW_AT_type, subtp)); + } + /* FIXME: need to handle function parameters */ + break; + + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "unknown DCL_TYPE"); + exit (1); + } + } + else + { + if (IS_STRUCT (type)) + { + struct structdef * sdp = SPEC_STRUCT (type); + symbol * field; + + tp = dwNewTag (sdp->type == STRUCT ? DW_TAG_structure_type + : DW_TAG_union_type); + if (*(sdp->tag)) + dwAddTagAttr (tp, dwNewAttrString (DW_AT_name, sdp->tag)); + + /* FIXME: should only specify the size if we know this */ + /* is a complete type */ + dwAddTagAttr (tp, dwNewAttrConst (DW_AT_byte_size, + getSize (type))); + + /* Must add this before processing the struct fields */ + /* in case there is a recursive definition. */ + hTabAddItemLong (&dwTypeTagTable, key, type, tp); + tableUpdated = 1; + + field = sdp->fields; + while (field) + { + dwtag * memtp; + dwloc * lp; + + if (IS_BITFIELD (field->type) && !SPEC_BLEN(field->type)) + { + field = field->next; + continue; + } + + memtp = dwNewTag (DW_TAG_member); + if (*(field->name)) + dwAddTagAttr (memtp, dwNewAttrString (DW_AT_name, + field->name)); + if (IS_BITFIELD (field->type)) + { + int blen = SPEC_BLEN (field->type); + int bstr = SPEC_BSTR (field->type); + sym_link * type; + + dwAddTagAttr (memtp, + dwNewAttrConst (DW_AT_byte_size, + (blen+7)/8)); + dwAddTagAttr (memtp, + dwNewAttrConst (DW_AT_bit_size, blen)); + dwAddTagAttr (memtp, + dwNewAttrConst (DW_AT_bit_offset, + ((blen+7) & ~7) + - (blen+bstr))); + if (blen < 8) + type = typeFromStr ("uc"); + else + type = typeFromStr ("ui"); + subtp = dwTagFromType (type, tp); + dwAddTagAttr (memtp, dwNewAttrTagRef (DW_AT_type, subtp)); + } + else + { + subtp = dwTagFromType (field->type, tp); + dwAddTagAttr (memtp, dwNewAttrTagRef (DW_AT_type, subtp)); + if (!subtp->parent) + dwAddTagChild (parent, subtp); + } + + lp = dwNewLoc (DW_OP_plus_uconst, NULL, field->offset); + dwAddTagAttr (memtp, + dwNewAttrLoc (DW_AT_data_member_location, lp)); + + dwAddTagChild (tp, memtp); + + field = field->next; + } + } + else if (SPEC_VOLATILE (type) || SPEC_CONST (type)) + { + sym_link temptype = *type; + + SPEC_VOLATILE (&temptype) = 0; + SPEC_CONST (&temptype) = 0; + tp = dwTagFromType (&temptype, parent); + if (SPEC_VOLATILE (type)) + { + modtp = dwNewTag (DW_TAG_volatile_type); + dwAddTagAttr (modtp, dwNewAttrTagRef (DW_AT_type, tp)); + dwAddTagChild (parent, modtp); + tp = modtp; + } + if (SPEC_CONST (type)) + { + modtp = dwNewTag (DW_TAG_const_type); + dwAddTagAttr (modtp, dwNewAttrTagRef (DW_AT_type, tp)); + dwAddTagChild (parent, modtp); + tp = modtp; + } + } + else + { + switch (SPEC_NOUN (type)) + { + case V_INT: + tp = dwNewTag (DW_TAG_base_type); + if (SPEC_USIGN (type)) + { + dwAddTagAttr (tp, dwNewAttrConst (DW_AT_encoding, + DW_ATE_unsigned)); + if (SPEC_LONG (type)) + dwAddTagAttr (tp, dwNewAttrString (DW_AT_name, + "unsigned long")); + else + dwAddTagAttr (tp, dwNewAttrString (DW_AT_name, + "unsigned int")); + } + else + { + dwAddTagAttr (tp, dwNewAttrConst (DW_AT_encoding, + DW_ATE_signed)); + if (SPEC_LONG (type)) + dwAddTagAttr (tp, dwNewAttrString (DW_AT_name, "long")); + else + dwAddTagAttr (tp, dwNewAttrString (DW_AT_name, "int")); + } + dwAddTagAttr (tp, dwNewAttrConst (DW_AT_byte_size, + getSize (type))); + dwAddTagChild (dwRootTag, tp); + break; + + case V_FLOAT: + tp = dwNewTag (DW_TAG_base_type); + dwAddTagAttr (tp, dwNewAttrConst (DW_AT_encoding, + DW_ATE_float)); + dwAddTagAttr (tp, dwNewAttrString (DW_AT_name, "float")); + dwAddTagAttr (tp, dwNewAttrConst (DW_AT_byte_size, + getSize (type))); + dwAddTagChild (dwRootTag, tp); + break; + + case V_FIXED16X16: + tp = dwNewTag (DW_TAG_base_type); + dwAddTagAttr (tp, dwNewAttrConst (DW_AT_encoding, + DW_ATE_float)); + dwAddTagAttr (tp, dwNewAttrString (DW_AT_name, "fixed16x16")); + dwAddTagAttr (tp, dwNewAttrConst (DW_AT_byte_size, + getSize (type))); + dwAddTagChild (dwRootTag, tp); + break; + + case V_CHAR: + tp = dwNewTag (DW_TAG_base_type); + if (SPEC_USIGN (type)) + { + dwAddTagAttr (tp, dwNewAttrConst (DW_AT_encoding, + DW_ATE_unsigned_char)); + dwAddTagAttr (tp, dwNewAttrString (DW_AT_name, + "unsigned char")); + } + else + { + dwAddTagAttr (tp, dwNewAttrConst (DW_AT_encoding, + DW_ATE_signed)); + dwAddTagAttr (tp, dwNewAttrString (DW_AT_name, "char")); + } + dwAddTagAttr (tp, dwNewAttrConst (DW_AT_byte_size, + getSize (type))); + dwAddTagChild (dwRootTag, tp); + break; + + case V_VOID: + case V_BIT: + case V_BITFIELD: + case V_SBIT: + case V_DOUBLE: + default: + + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "unhandled base type"); + printTypeChain (type, NULL); + exit (1); + + } + } + } + } + + if (!tableUpdated) + hTabAddItemLong (&dwTypeTagTable, key, type, tp); + if (!tp->parent) + dwAddTagChild (parent, tp); + return tp; +} +/*------------------------------------------------------------------------*/ + + +/*-----------------------------------------------------------------------*/ +/* dwOpenFile - open the debugging file (just initialize, since all */ +/* DWARF data goes into the assembly output file) */ +/*-----------------------------------------------------------------------*/ +int dwOpenFile(char *file) +{ + dwTypeTagTable = newHashTable (128); + + return 1; +} + +/*-----------------------------------------------------------------------*/ +/* dwCloseFile - close the debugging file (do nothing, since all DWARF */ +/* data goes into the assembly output file) */ +/*-----------------------------------------------------------------------*/ +int dwCloseFile(void) +{ + return 1; +} + + +/*-----------------------------------------------------------------------*/ +/* dwGenerateScopes - recursively traverse an ast, generating lexical */ +/* block tags for block scopes found */ +/*-----------------------------------------------------------------------*/ +static void +dwGenerateScopes (dwtag *tp, ast * tree) +{ + dwtag *subtp; + + if (!tree) + return; + + if (!IS_AST_OP (tree)) + return; + + if (tree->opval.op == BLOCK) + { + subtp = dwNewTag (DW_TAG_lexical_block); + if (tree->right) + { + dwAddTagAttr (subtp, dwNewAttrConst (DW_AT_user_block, tree->right->block)); + dwAddTagAttr (subtp, dwNewAttrConst (DW_AT_user_level, tree->right->level)); + + dwAddTagChild (tp, subtp); + } + dwGenerateScopes (subtp, tree->right); + } + else + { + dwGenerateScopes (tp, tree->left); + dwGenerateScopes (tp, tree->right); + } +} + +/*-----------------------------------------------------------------------*/ +/* dwFindScope - return the lexical block tag for a particular block */ +/* scope, or NULL if not found */ +/*-----------------------------------------------------------------------*/ +static dwtag * +dwFindScope (dwtag * tp, int block) +{ + dwtag * rettp; + dwattr * ap; + + if (!tp) + return NULL; + + while (tp) + { + if (tp->tag == DW_TAG_lexical_block) + { + ap = tp->attribs; + while (ap) + { + if (ap->attr == DW_AT_user_block) + { + if (ap->val.data == block) + return tp; + } + ap = ap->next; + } + + rettp = dwFindScope (tp->firstChild, block); + if (rettp) + return rettp; + } + tp = tp->siblings; + } + + return NULL; +} + +/*------------------------------------------------------------------------*/ +/* dwWriteSymbolInternal - create tag information for a variable or */ +/* parameter and place it in the correct position */ +/* within the tag tree */ +/*------------------------------------------------------------------------*/ +static int +dwWriteSymbolInternal (symbol *sym) +{ + dwtag * tp; + dwtag * subtp; + dwloc * lp; + dwtag * scopetp; + symbol * symloc; + dwtag * functp; + dwattr * funcap; + int inregs = 0; + + if (!sym->level || IS_EXTERN (sym->etype)) + scopetp = dwRootTag; + else + { + assert(sym->localof); + if (!sym->localof) + return 0; + + /* Find the tag for the function this symbol is defined in */ + functp = dwRootTag->firstChild; + while (functp) + { + if (functp->tag == DW_TAG_subprogram) + { + funcap = dwFindAttr (functp, DW_AT_name); + if (funcap && !strcmp (funcap->val.string, sym->localof->name)) + break; + } + functp = functp->siblings; + } + assert (functp); + if (!functp) + return 0; + + /* Find the correct scope within this function */ + scopetp = dwFindScope (functp->firstChild, sym->block); + if (!scopetp) + scopetp = functp; + } + + tp = dwNewTag (sym->_isparm ? DW_TAG_formal_parameter : DW_TAG_variable); + + dwAddTagAttr (tp, dwNewAttrString (DW_AT_name, sym->name)); + + /* Find the ultimate symbol holding the value. */ + /* Might be: */ + /* a) original symbol, */ + /* b) register equivalent, */ + /* c) spill location */ + symloc = sym; + if (!sym->allocreq && sym->reqv) + { + symloc = OP_SYMBOL (symloc->reqv); + if (symloc->isspilt && !symloc->remat) + symloc = symloc->usl.spillLoc; + else + inregs = 1; + } + + lp = NULL; + if (inregs && symloc->regs[0]) + { + dwloc * reglp; + dwloc * lastlp = NULL; + int regNum; + int i; + + /* register allocation */ + for (i = (port->little_endian ? 0 : symloc->nRegs-1); + (port->little_endian ? (i < symloc->nRegs) : (i >= 0)); + (port->little_endian ? i++ : i--)) + { + regNum = port->debugger.dwarf.regNum (symloc->regs[i]); + if (regNum >= 0 && regNum <= 31) + reglp = dwNewLoc (DW_OP_reg0 + regNum, NULL, 0); + else if (regNum >= 0) + reglp = dwNewLoc (DW_OP_regx, NULL, regNum); + else + { + /* We are forced to give up if the ABI for this port */ + /* does not define a number for this register */ + lp = NULL; + break; + } + + if (lastlp) + lastlp->next = reglp; + else + lp = reglp; + lastlp = reglp; + + if (symloc->nRegs != 1) + { + reglp = dwNewLoc (DW_OP_piece, NULL, 1); + lastlp->next = reglp; + lastlp = reglp; + } + } + } + else if (symloc->onStack) + { + /* stack allocation */ + lp = dwNewLoc (DW_OP_fbreg, NULL, symloc->stack); + } + else + { + /* global allocation */ + if (sym->level && !sym->allocreq) + lp = NULL; + else + lp = dwNewLoc (DW_OP_addr, symloc->rname, 0); + } + + /* Only create the DW_AT_location if a known location exists. */ + /* It might not exist if the variable has been optimized away */ + /* or if the compiler has lost track of it (not good, but still */ + /* happens sometimes -- need to improve induction) */ + if (lp) + dwAddTagAttr (tp, dwNewAttrLoc (DW_AT_location, lp)); + + if (!IS_STATIC (sym->etype) && !sym->level) + dwAddTagAttr (tp, dwNewAttrFlag (DW_AT_external, 1)); + if (IS_EXTERN (sym->etype)) + dwAddTagAttr (tp, dwNewAttrFlag (DW_AT_declaration, 1)); + + subtp = dwTagFromType (sym->type, scopetp); + dwAddTagAttr (tp, dwNewAttrTagRef (DW_AT_type, subtp)); + if (!subtp->parent) + dwAddTagChild (scopetp, subtp); + + dwAddTagChild (scopetp, tp); + return 1; +} + + +/*-----------------------------------------------------------------------*/ +/* dwWriteFunction - generate a tag for a function. */ +/*-----------------------------------------------------------------------*/ +int dwWriteFunction(symbol *sym, iCode *ic) +{ + dwtag * tp; + value * args; + + dwFuncTag = tp = dwNewTag (DW_TAG_subprogram); + + dwAddTagAttr (dwFuncTag, dwNewAttrString (DW_AT_name, sym->name)); + + dwAddTagAttr (dwFuncTag, dwNewAttrAddrSymbol (DW_AT_low_pc, sym, 0)); + + if (FUNC_ISISR (sym->type)) + dwAddTagAttr (dwFuncTag, dwNewAttrConst (DW_AT_calling_convention, + DW_CC_nocall)); + + dwAddTagAttr (dwFuncTag, dwNewAttrFlag (DW_AT_external, + !IS_STATIC (sym->etype))); + + if (sym->type->next && !IS_VOID (sym->type->next)) + { + dwtag * subtp; + + subtp = dwTagFromType (sym->type->next, dwRootTag); + dwAddTagAttr (dwFuncTag, dwNewAttrTagRef (DW_AT_type, subtp)); + } + dwAddTagChild (dwRootTag, dwFuncTag); + + args = FUNC_ARGS(sym->type); + while (args) + { + dwWriteSymbolInternal (args->sym); + args = args->next; + } + if (FUNC_HASVARARGS (sym->type)) + { + dwAddTagChild (dwFuncTag, dwNewTag (DW_TAG_unspecified_parameters)); + } + + while (ic && ic->op != FUNCTION) + ic = ic->next; + if (ic && ic->op == FUNCTION && ic->tree && ic->tree->right) + { + dwGenerateScopes (dwFuncTag, ic->tree->right->left); + dwGenerateScopes (dwFuncTag, ic->tree->right->right); + } + + dwScopeTag = NULL; + dwScopeLevel = 0; + + return 1; +} + + +/*-----------------------------------------------------------------------*/ +/* dwWriteEndFunction - write attributes to the current function tag */ +/* that are only known after code generation is */ +/* complete */ +/*-----------------------------------------------------------------------*/ +int dwWriteEndFunction(symbol *sym, iCode *ic, int offset) +{ + char debugSym[SDCC_NAME_MAX + 1]; + + if (ic) + { + dwWriteCLine (ic); + dwLineLast->offset += offset; + dwLineLast->end_sequence = 1; + } + + if (IS_STATIC (sym->etype)) + sprintf (debugSym, "XF%s$%s$0$0", dwModuleName, sym->name); + else + sprintf (debugSym, "XG$%s$0$0", sym->name); + emitDebuggerSymbol (debugSym); + + dwAddTagAttr (dwFuncTag, dwNewAttrAddrLabel (DW_AT_high_pc, + Safe_strdup(debugSym), + offset)); + + if (dwFrameLocList) + { + dwAddTagAttr (dwFuncTag, dwNewAttrLocRef (DW_AT_frame_base, + dwFrameLocList)); + + dwFrameLocList->next = dwRootLocList; + dwRootLocList = dwFrameLocList; + dwFrameLocList = NULL; + } + + return 1; +} + + +/*-----------------------------------------------------------------------*/ +/* dwWriteLabel - generate a tag for a source level label */ +/*-----------------------------------------------------------------------*/ +int dwWriteLabel(symbol *sym, iCode *ic) +{ + char debugSym[SDCC_NAME_MAX + 1]; + dwtag * tp; + + /* ignore the compiler generated labels */ + if (sym->isitmp) + return 1; + + sprintf (debugSym, "L%s$%s$%s", dwModuleName, currFunc->name, sym->name); + emitDebuggerSymbol (debugSym); + + tp = dwNewTag (DW_TAG_label); + dwAddTagAttr (tp, dwNewAttrString (DW_AT_name, sym->name)); + dwAddTagAttr (tp, dwNewAttrAddrLabel (DW_AT_low_pc, + Safe_strdup (debugSym), 0)); + + dwAddTagChild (dwFuncTag, tp); + + return 1; +} + + +/*-----------------------------------------------------------------------*/ +/* dwWriteScope - add the starting and ending address attributes to a */ +/* a lexical block tag (created during dwWriteFunction) */ +/*-----------------------------------------------------------------------*/ +int dwWriteScope(iCode *ic) +{ + char * debugSym = NULL; + dwtag * scopetp; + dwattr * ap; + + scopetp = dwFindScope (dwFuncTag->firstChild, ic->block); + + if (dwScopeTag && ic->level <= dwScopeLevel) + { + debugSym = dwNewDebugSymbol (); + emitDebuggerSymbol (debugSym); + dwSetTagAttr (dwScopeTag, dwNewAttrAddrLabel (DW_AT_high_pc, debugSym, 0)); + + dwScopeTag = scopetp; + dwScopeLevel = ic->level; + } + if (scopetp) + { + ap = dwFindAttr (scopetp, DW_AT_low_pc); + if (ap) + return 1; + + if (!debugSym) + debugSym = dwNewDebugSymbol (); + emitDebuggerSymbol (debugSym); + dwAddTagAttr (scopetp, dwNewAttrAddrLabel (DW_AT_low_pc, debugSym, 0)); + + dwScopeTag = scopetp; + dwScopeLevel = ic->level; + } + + return 1; +} + +/*-----------------------------------------------------------------------*/ +/* dwWriteSymbol - generate tags for global variables. This is actually */ +/* called for all variables and parameters, but we */ +/* process the non-global variables elsewhere. */ +/*-----------------------------------------------------------------------*/ +int dwWriteSymbol(symbol *sym) +{ + if (IS_FUNC (sym->type)) + return 1; + + /* If it is an iTemp, then it is not a C source symbol; ignore it */ + if (sym->isitmp) + return 1; + + /* Ignore parameters; they must be handled specially so that they will */ + /* appear in the correct order */ + if (sym->_isparm) + return 1; + + return dwWriteSymbolInternal (sym); +} + + +/*-----------------------------------------------------------------------*/ +/* dwWriteType */ +/*-----------------------------------------------------------------------*/ +int dwWriteType(structdef *sdef, int block, int inStruct, char *tag) +{ + /* FIXME: needs implementation */ + return 1; +} + + +/*-----------------------------------------------------------------------*/ +/* dwWriteModule - generates the root tag for this compilation unit */ +/*-----------------------------------------------------------------------*/ +int dwWriteModule(char *name) +{ + dwtag * tp; + char verid[125]; + + dwModuleName = Safe_strdup (name); + + sprintf(verid, "SDCC version %s #%s", SDCC_VERSION_STR, getBuildNumber()); + + tp = dwNewTag (DW_TAG_compile_unit); + dwAddTagAttr (tp, dwNewAttrString (DW_AT_producer, verid)); + + dwAddTagAttr (tp, dwNewAttrConst (DW_AT_language, DW_LANG_C89)); + + dwAddTagAttr (tp, dwNewAttrString (DW_AT_name, fullSrcFileName)); + + dwAddTagAttr (tp, dwNewAttrLabelRef (DW_AT_stmt_list, + "Ldebug_line_start", -4)); + + dwRootTag = tp; + + return 1; +} + + +/*-----------------------------------------------------------------------*/ +/* dwWriteCLine - generates a line number/position to address record for */ +/* C source */ +/*-----------------------------------------------------------------------*/ +int dwWriteCLine(iCode *ic) +{ + dwline * lp; + char * debugSym; + + lp = Safe_alloc (sizeof (dwline)); + + lp->line = ic->lineno; + + debugSym = dwNewDebugSymbol (); + emitDebuggerSymbol (debugSym); + lp->label = debugSym; + lp->offset = 0; + + lp->fileIndex = dwFindFileIndex (ic->filename); + + if (!dwLineFirst) + dwLineFirst = lp; + else + dwLineLast->next = lp; + dwLineLast = lp; + + return 1; +} + + +/*-----------------------------------------------------------------------*/ +/* dwWriteFrameAddress - note the current position of the frame pointer */ +/* address. The base address can be specified by */ +/* either a register or pointer variable, leaving */ +/* the other as NULL. If both are NULL, there is */ +/* no current frame pointer address defined. */ +/*-----------------------------------------------------------------------*/ +int +dwWriteFrameAddress(char *variable, struct regs *reg, int offset) +{ + char * debugSym = NULL; + dwlocregion * lrp; + dwloc * lp; + int regNum; + + /* If there was a region open, close it */ + if (dwFrameLastLoc) + { + debugSym = dwNewDebugSymbol (); + emitDebuggerSymbol (debugSym); + + dwFrameLastLoc->endLabel = debugSym; + dwFrameLastLoc = NULL; + } + + if (!variable && !reg) + return 1; + + /* Create a new debugger symbol for the start of the region if */ + /* we can't recycle the symbol at the end of the previous */ + if (!debugSym) + { + debugSym = dwNewDebugSymbol (); + emitDebuggerSymbol (debugSym); + } + + lrp = Safe_alloc (sizeof (dwlocregion)); + lrp->startLabel = debugSym; + + if (variable) /* frame pointer based from a global variable */ + { + dwloc * lp; + + lrp->loc = dwNewLoc (DW_OP_addr, variable, 0); + lrp->loc->next = lp = dwNewLoc (DW_OP_deref_size, NULL, PTRSIZE); + if (offset) + { + lp->next = dwNewLoc (DW_OP_consts, NULL, offset); + lp->next->next = dwNewLoc (DW_OP_plus, NULL, 0); + } + } + else if (reg) /* frame pointer based from a register */ + { + regNum = port->debugger.dwarf.regNum (reg); + assert (regNum>=0); + + if (regNum>=0 && regNum<=31) + { + if (offset) + lrp->loc = dwNewLoc (DW_OP_breg0 + regNum, NULL, offset); + else + lrp->loc = dwNewLoc (DW_OP_reg0 + regNum, NULL, 0); + } + else + { + lrp->loc = lp = dwNewLoc (DW_OP_regx, NULL, regNum); + if (offset) + { + lp->next = dwNewLoc (DW_OP_consts, NULL, offset); + lp->next->next = dwNewLoc (DW_OP_plus, NULL, 0); + } + } + } + dwFrameLastLoc = lrp; + + if (!dwFrameLocList) + dwFrameLocList = dwNewLocList(); + lrp->next = dwFrameLocList->region; + dwFrameLocList->region = lrp; + + return 1; +} + + +/*-----------------------------------------------------------------------*/ +/* dwWriteALine - generates a line number/position to address record for */ +/* assembly source */ +/*-----------------------------------------------------------------------*/ +int dwWriteALine(char *module, int Line) +{ + return 1; +} + + + + +/*-----------------------------------------------------------------------*/ +/* dwarf2FinalizeFile - write all of the DWARF debugging data to the */ +/* debug file */ +/*-----------------------------------------------------------------------*/ +int +dwarf2FinalizeFile(FILE *of) +{ + int tagAddress = 11; + int abbrevNum = 0; + int attr; + + dwarf2FilePtr = of; + + /* Write the .debug_line section */ + dwWriteLineNumbers (); + + /* Assign the location list addresses (for cross references) */ + dwAssignLocListAddresses (); + + /* Write the .debug_loc section */ + dwWriteLocLists (); + + /* Delete our scope related user attributes; they were only needed to help */ + /* build the tag tree and have no meaning to (and may confuse) debuggers */ + attr = DW_AT_user_block; + dwTraverseTag (dwRootTag, dwDeleteTagAttr, &attr); + attr = DW_AT_user_level; + dwTraverseTag (dwRootTag, dwDeleteTagAttr, &attr); + + /* Add a DW_AT_sibling attribute to all tags with children and siblings */ + dwTraverseTag (dwRootTag, dwAddSibAttr, NULL); + + /* Assign the tag abbreviations. The tags, attributes, and forms must */ + /* not change after this point. The attribute values may change as long */ + /* as the size of the value does not. */ + dwAbbrevTable = newHashTable (128); + dwTraverseTag (dwRootTag, dwAssignAbbrev, &abbrevNum); + + /* Assign the tag addresses (for cross references) */ + dwTraverseTag (dwRootTag, dwAssignTagAddress, &tagAddress); + + /* Write the .debug_abbrev section */ + dwWriteAbbrevs (); + + /* Write the .debug_info section */ + dwWriteTags (); + + /* Write the .debug_pubnames section */ + dwWritePubnames (); + + return 1; +} diff --git a/src/SDCCdwarf2.h b/src/SDCCdwarf2.h new file mode 100644 index 0000000..814912f --- /dev/null +++ b/src/SDCCdwarf2.h @@ -0,0 +1,425 @@ +/*------------------------------------------------------------------------- + SDCCdwarf2.h - DWARF2 debugging constants + + Written By - Erik Petrich . epetrich@users.sourceforge.net (2004) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCDWARF2_H +#define SDCCDWARF2_H + +#define DW_TAG_array_type 0x01 +#define DW_TAG_class_type 0x02 +#define DW_TAG_entry_point 0x03 +#define DW_TAG_enumeration_type 0x04 +#define DW_TAG_formal_parameter 0x05 +#define DW_TAG_imported_declaration 0x08 +#define DW_TAG_label 0x0a +#define DW_TAG_lexical_block 0x0b +#define DW_TAG_member 0x0d +#define DW_TAG_pointer_type 0x0f +#define DW_TAG_reference_type 0x10 +#define DW_TAG_compile_unit 0x11 +#define DW_TAG_string_type 0x12 +#define DW_TAG_structure_type 0x13 +#define DW_TAG_subroutine_type 0x15 +#define DW_TAG_typedef 0x16 +#define DW_TAG_union_type 0x17 +#define DW_TAG_unspecified_parameters 0x18 +#define DW_TAG_variant 0x19 +#define DW_TAG_common_block 0x1a +#define DW_TAG_common_inclusion 0x1b +#define DW_TAG_inheritance 0x1c +#define DW_TAG_inlined_subroutine 01x1d +#define DW_TAG_module 0x1e +#define DW_TAG_ptr_to_member_type 0x1f +#define DW_TAG_set_type 0x20 +#define DW_TAG_subrange_type 0x21 +#define DW_TAG_with_stmt 0x22 +#define DW_TAG_access_declaration 0x23 +#define DW_TAG_base_type 0x24 +#define DW_TAG_catch_block 0x25 +#define DW_TAG_const_type 0x26 +#define DW_TAG_constant 0x27 +#define DW_TAG_enumerator 0x28 +#define DW_TAG_file_type 0x29 +#define DW_TAG_friend 0x2a +#define DW_TAG_namelist 0x2b +#define DW_TAG_namelist_item 0x2c +#define DW_TAG_packed_type 0x2d +#define DW_TAG_subprogram 0x2e +#define DW_TAG_template_type_param 0x2f +#define DW_TAG_template_value_param 0x30 +#define DW_TAG_thrown_type 0x31 +#define DW_TAG_try_block 0x32 +#define DW_TAG_variant_part 0x33 +#define DW_TAG_variable 0x34 +#define DW_TAG_volatile_type 0x35 + +#define DW_CHILDREN_no 0 +#define DW_CHILDREN_yes 1 + +#define DW_LANG_C89 0x0001 + +#define DW_AT_sibling 0x01 +#define DW_AT_location 0x02 +#define DW_AT_name 0x03 +#define DW_AT_ordering 0x09 +#define DW_AT_byte_size 0x0b +#define DW_AT_bit_offset 0x0c +#define DW_AT_bit_size 0x0d +#define DW_AT_stmt_list 0x10 +#define DW_AT_low_pc 0x11 +#define DW_AT_high_pc 0x12 +#define DW_AT_language 0x13 +#define DW_AT_discr 0x15 +#define DW_AT_discr_value 0x16 +#define DW_AT_visibility 0x17 +#define DW_AT_import 0x18 +#define DW_AT_string_length 0x19 +#define DW_AT_common_reference 0x1a +#define DW_AT_comp_dir 0x1b +#define DW_AT_const_value 0x1c +#define DW_AT_containing_type 0x1d +#define DW_AT_default_value 0x1e +#define DW_AT_inline 0x20 +#define DW_AT_is_optional 0x21 +#define DW_AT_lower_bound 0x22 +#define DW_AT_producer 0x25 +#define DW_AT_prototyped 0x27 +#define DW_AT_return_addr 0x2a +#define DW_AT_start_scope 0x2c +#define DW_AT_stride_size 0x2e +#define DW_AT_upper_bound 0x2f +#define DW_AT_abstract_origin 0x31 +#define DW_AT_accessibility 0x32 +#define DW_AT_address_class 0x33 +#define DW_AT_artificial 0x34 +#define DW_AT_base_types 0x35 +#define DW_AT_calling_convention 0x36 +#define DW_AT_count 0x37 +#define DW_AT_data_member_location 0x38 +#define DW_AT_decl_column 0x39 +#define DW_AT_decl_file 0x3a +#define DW_AT_decl_line 0x3b +#define DW_AT_declaration 0x3c +#define DW_AT_discr_list 0x3d +#define DW_AT_encoding 0x3e +#define DW_AT_external 0x3f +#define DW_AT_frame_base 0x40 +#define DW_AT_friend 0x41 +#define DW_AT_identifier_case 0x42 +#define DW_AT_macro_info 0x43 +#define DW_AT_namelist_item 0x44 +#define DW_AT_priority 0x45 +#define DW_AT_segment 0x46 +#define DW_AT_specification 0x47 +#define DW_AT_static_link 0x48 +#define DW_AT_type 0x49 +#define DW_AT_use_location 0x4a +#define DW_AT_variable_parameter 0x4b +#define DW_AT_virtuality 0x4c +#define DW_AT_vtable_elem_location 0x4d +#define DW_AT_lo_user 0x2000 +#define DW_AT_hi_user 0x3fff + +#define DW_AT_user_block 0x2650 +#define DW_AT_user_level 0x2651 + +#define DW_FORM_addr 0x01 +#define DW_FORM_block2 0x03 +#define DW_FORM_block4 0x04 +#define DW_FORM_data2 0x05 +#define DW_FORM_data4 0x06 +#define DW_FORM_data8 0x07 +#define DW_FORM_string 0x08 +#define DW_FORM_block 0x09 +#define DW_FORM_block1 0x0a +#define DW_FORM_data1 0x0b +#define DW_FORM_flag 0x0c +#define DW_FORM_sdata 0x0d +#define DW_FORM_strp 0x0e +#define DW_FORM_udata 0x0f +#define DW_FORM_ref_addr 0x10 +#define DW_FORM_ref1 0x11 +#define DW_FORM_ref2 0x12 +#define DW_FORM_ref4 0x13 +#define DW_FORM_ref_udata 0x15 +#define DW_FORM_indirect 0x16 + +#define DW_OP_addr 0x03 +#define DW_OP_deref 0x06 +#define DW_OP_const1u 0x08 +#define DW_OP_const1s 0x09 +#define DW_OP_const2u 0x0a +#define DW_OP_const2s 0x0b +#define DW_OP_const4u 0x0c +#define DW_OP_const4s 0x0d +#define DW_OP_const8u 0x0e +#define DW_OP_const8s 0x0f +#define DW_OP_constu 0x10 +#define DW_OP_consts 0x11 +#define DW_OP_dup 0x12 +#define DW_OP_drop 0x13 +#define DW_OP_over 0x14 +#define DW_OP_pick 0x15 +#define DW_OP_swap 0x16 +#define DW_OP_rot 0x17 +#define DW_OP_xderef 0x18 +#define DW_OP_abs 0x19 +#define DW_OP_and 0x1a +#define DW_OP_div 0x1b +#define DW_OP_minus 0x1c +#define DW_OP_mod 0x1d +#define DW_OP_mul 0x1e +#define DW_OP_neg 0x1f +#define DW_OP_not 0x20 +#define DW_OP_or 0x21 +#define DW_OP_plus 0x22 +#define DW_OP_plus_uconst 0x23 +#define DW_OP_shl 0x24 +#define DW_OP_shr 0x25 +#define DW_OP_shra 0x26 +#define DW_OP_xor 0x27 +#define DW_OP_skip 0x2f +#define DW_OP_bra 0x28 +#define DW_OP_eq 0x29 +#define DW_OP_ge 0x2a +#define DW_OP_gt 0x2b +#define DW_OP_le 0x2c +#define DW_OP_lt 0x2d +#define DW_OP_ne 0x2e +#define DW_OP_lit0 0x30 +#define DW_OP_reg0 0x50 +#define DW_OP_breg0 0x70 +#define DW_OP_breg1 0x71 +#define DW_OP_breg2 0x72 +#define DW_OP_breg3 0x73 +#define DW_OP_breg4 0x74 +#define DW_OP_breg5 0x75 +#define DW_OP_breg6 0x76 +#define DW_OP_breg7 0x77 +#define DW_OP_breg8 0x78 +#define DW_OP_breg9 0x79 +#define DW_OP_breg10 0x7a +#define DW_OP_breg11 0x7b +#define DW_OP_breg12 0x7c +#define DW_OP_breg13 0x7d +#define DW_OP_breg14 0x7e +#define DW_OP_breg15 0x7f +#define DW_OP_breg16 0x80 +#define DW_OP_breg17 0x81 +#define DW_OP_breg18 0x82 +#define DW_OP_breg19 0x83 +#define DW_OP_breg20 0x84 +#define DW_OP_breg21 0x85 +#define DW_OP_breg22 0x86 +#define DW_OP_breg23 0x87 +#define DW_OP_breg24 0x88 +#define DW_OP_breg25 0x89 +#define DW_OP_breg26 0x8a +#define DW_OP_breg27 0x8b +#define DW_OP_breg28 0x8c +#define DW_OP_breg29 0x8d +#define DW_OP_breg30 0x8e +#define DW_OP_breg31 0x8f +#define DW_OP_regx 0x90 +#define DW_OP_fbreg 0x91 +#define DW_OP_bregx 0x92 +#define DW_OP_piece 0x93 +#define DW_OP_deref_size 0x94 +#define DW_OP_xderef_size 0x95 +#define DW_OP_nop 0x96 + +#define DW_ATE_address 0x1 +#define DW_ATE_boolean 0x2 +#define DW_ATE_complex_float 0x3 +#define DW_ATE_float 0x4 +#define DW_ATE_signed 0x5 +#define DW_ATE_signed_char 0x6 +#define DW_ATE_unsigned 0x7 +#define DW_ATE_unsigned_char 0x8 + +#define DW_CC_normal 0x1 +#define DW_CC_program 0x2 +#define DW_CC_nocall 0x3 + +#define DW_LNS_copy 1 +#define DW_LNS_advance_pc 2 +#define DW_LNS_advance_line 3 +#define DW_LNS_set_file 4 +#define DW_LNS_set_column 5 +#define DW_LNS_negate_stmt 6 +#define DW_LNS_set_basic_block 7 +#define DW_LNS_const_add_pc 8 +#define DW_LNS_fixed_advance_pc 9 + +#define DW_LNE_end_sequence 1 +#define DW_LNE_set_address 2 +#define DW_LNE_define_file 3 + +#define DW_MACINFO_define 1 +#define DW_MACINFO_undef 2 +#define DW_MACINFO_start_file 3 +#define DW_MACINFO_end_file 4 +#define DW_MACINFO_vendor_ext 255 + +#define DW_CFA_advance_loc (1 << 6) +#define DW_CFA_offset (2 << 6) +#define DW_CFA_restore (3 << 6) +#define DW_CFA_set_loc 0x01 +#define DW_CFA_advance_loc1 0x02 +#define DW_CFA_advance_loc2 0x03 +#define DW_CFA_advance_loc4 0x04 +#define DW_CFA_offset_extended 0x05 +#define DW_CFA_restore_extended 0x06 +#define DW_CFA_undefined 0x07 +#define DW_CFA_same_value 0x08 +#define DW_CFA_register 0x09 +#define DW_CFA_remember_state 0x0a +#define DW_CFA_restore_state 0x0b +#define DW_CFA_def_cfa 0x0c +#define DW_CFA_def_cfa_register 0x0d +#define DW_CFA_def_cfa_offset 0x0e +#define DW_CFA_nop 0x0f +#define DW_CFA_lo_user 0x1c +#define DW_CFA_hi_user 0x3f + + +typedef struct dwloc +{ + int opcode; + struct + { + symbol * sym; + char * label; + int offset; + } operand; + struct dwloc * next; +} dwloc; + +typedef struct dwlocregion +{ + char * startLabel; + char * endLabel; + dwloc * loc; + struct dwlocregion * next; +} dwlocregion; + +typedef struct dwloclist +{ + int baseOffset; + dwlocregion * region; + struct dwloclist * next; +} dwloclist; + +struct dwtag; + +typedef struct dwattr +{ + int attr; + int form; + union + { + struct + { + char * label; + int offset; + } symaddr; + struct + { + unsigned char * data; + int length; + } block; + int data; + char * string; + struct dwtag * ref; + struct dwloc * loc; + struct dwloclist * loclist; + } val; + struct dwattr * next; +} dwattr; + +typedef struct dwtag +{ + int tag; + int abbrev; + int baseOffset; + struct dwattr * attribs; + struct dwtag * parent; + struct dwtag * firstChild; + struct dwtag * lastChild; + struct dwtag * siblings; +} dwtag; + +typedef struct dwfile +{ + char * name; + int dirIndex; + int timestamp; + int length; +} dwfile; + +typedef struct dwline +{ + char * label; + int offset; + int fileIndex; + int line; + unsigned is_stmt:1; + unsigned basic_block:1; + unsigned end_sequence:1; + unsigned begin_sequence:1; + struct dwline * next; +} dwline; + +#if 0 +typedef struct dwblock +{ + unsigned char * data; + int length; + int alloc; +} dwblock; + +typedef struct dwcfop +{ + int opcode; + char * label; + int operand1; + int operand2; + struct dwcfop * next; +} dwcfop; + +typedef struct dwcfins +{ + dwcfop * first; + dwcfop * last; +} dwcfins; + +typedef struct dwfde +{ + char * startLabel; + char * endLabel; + dwcfins * ins; +} dwfde; +#endif + + +#endif diff --git a/src/SDCCerr.c b/src/SDCCerr.c new file mode 100644 index 0000000..7425bb7 --- /dev/null +++ b/src/SDCCerr.c @@ -0,0 +1,615 @@ +/* + * SDCCerr - Standard error handler + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Library General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include +#include + +#include "SDCCerr.h" + +#define USE_STDOUT_FOR_ERRORS 0 + +#if USE_STDOUT_FOR_ERRORS +#define DEFAULT_ERROR_OUT stdout +#else +#define DEFAULT_ERROR_OUT stderr +#endif + +struct SDCCERRG _SDCCERRG; + +extern char *filename; +extern int lineno; +extern int fatalError; + +/* Currently the errIndex field must match the position of the + * entry in the array. It is only included in order to make + * human error lookup easier. + */ +struct +{ + int errIndex; + ERROR_LOG_LEVEL errType; + const char *errText; +} ErrTab [] = +{ +{ E_DUPLICATE, ERROR_LEVEL_ERROR, + "Duplicate symbol '%s', symbol IGNORED" }, +{ E_SYNTAX_ERROR, ERROR_LEVEL_ERROR, + "Syntax error, declaration ignored at '%s'" }, +{ E_CONST_EXPECTED, ERROR_LEVEL_ERROR, + "Initializer element is not constant" }, +{ E_OUT_OF_MEM, ERROR_LEVEL_ERROR, + "'malloc' failed file '%s' for size %ld" }, +{ E_FILE_OPEN_ERR, ERROR_LEVEL_ERROR, + "'fopen' failed on file '%s'" }, +{ E_INVALID_OCLASS, ERROR_LEVEL_ERROR, + "Internal Error Oclass invalid '%s'" }, +{ E_CANNOT_ALLOC, ERROR_LEVEL_ERROR, + "Cannot allocate variable '%s'." }, +{ E_OLD_STYLE, ERROR_LEVEL_ERROR, + "Old style C declaration. IGNORED '%s'" }, +{ E_STACK_OUT, ERROR_LEVEL_ERROR, + "Out of stack Space. '%s' not allocated" }, +{ E_INTERNAL_ERROR, ERROR_LEVEL_ERROR, + "FATAL Compiler Internal Error in file '%s' line number '%d' : %s \n" + "Contact Author with source code" }, +{ E_LVALUE_REQUIRED, ERROR_LEVEL_ERROR, + "'lvalue' required for '%s' operation." }, +{ E_TMPFILE_FAILED, ERROR_LEVEL_ERROR, + "Creation of temp file failed" }, +{ E_FUNCTION_EXPECTED, ERROR_LEVEL_ERROR, + "called object is not a function" }, +{ E_USING_ERROR, ERROR_LEVEL_ERROR, + "'using', 'interrupt' or 'reentrant' must follow a function definiton.'%s'" }, +{ E_SFR_INIT, ERROR_LEVEL_ERROR, + "Absolute address & initial value both cannot be specified for\n" + " a 'sfr','sbit' storage class, initial value ignored '%s'" }, +{ W_INIT_IGNORED, ERROR_LEVEL_WARNING, + "Variable in the storage class cannot be initialized.'%s'" }, +{ E_AUTO_ASSUMED, ERROR_LEVEL_ERROR, + "variable '%s' must be static to have storage class in reentrant function" }, +{ E_AUTO_ABSA, ERROR_LEVEL_ERROR, + "absolute address not allowed for automatic var '%s' in reentrant function " }, +{ W_INIT_WRONG, ERROR_LEVEL_WARNING, + "Initializer different levels of indirections" }, +{ E_FUNC_REDEF, ERROR_LEVEL_ERROR, + "Function name '%s' redefined " }, +{ E_ID_UNDEF, ERROR_LEVEL_ERROR, + "Undefined identifier '%s'" }, +{ W_STACK_OVERFLOW, ERROR_LEVEL_WARNING, + "stack exceeds 256 bytes for function '%s'" }, +{ E_NEED_ARRAY_PTR, ERROR_LEVEL_ERROR, + "Array or pointer required for '%s' operation " }, +{ E_IDX_NOT_INT, ERROR_LEVEL_ERROR, + "Array index not an integer" }, +{ W_IDX_OUT_OF_BOUNDS, ERROR_LEVEL_WARNING, + "index %i is outside of the array bounds (array size is %i)" }, +{ E_STRUCT_UNION, ERROR_LEVEL_ERROR, + "Structure/Union expected left of '.%s'" }, +{ E_NOT_MEMBER, ERROR_LEVEL_ERROR, + "'%s' not a structure/union member" }, +{ E_PTR_REQD, ERROR_LEVEL_ERROR, + "Pointer required" }, +{ E_UNARY_OP, ERROR_LEVEL_ERROR, + "'unary %c': illegal operand" }, +{ E_CONV_ERR, ERROR_LEVEL_ERROR, + "conversion error: integral promotion failed" }, +{ E_INT_REQD, ERROR_LEVEL_ERROR, + "type must be INT for bit field definition" }, +{ E_BITFLD_SIZE, ERROR_LEVEL_ERROR, + "bit field size cannot be greater than int (%d bits)" }, +{ W_TRUNCATION, ERROR_LEVEL_WARNING, + "high order truncation might occur" }, +{ E_CODE_WRITE, ERROR_LEVEL_ERROR, + "Attempt to assign value to a constant variable (%s)" }, +{ E_LVALUE_CONST, ERROR_LEVEL_ERROR, + "Lvalue specifies constant object" }, +{ E_ILLEGAL_ADDR, ERROR_LEVEL_ERROR, + "'&' illegal operand , %s" }, +{ E_CAST_ILLEGAL, ERROR_LEVEL_ERROR, + "illegal cast (cast cannot be aggregate)" }, +{ E_MULT_INTEGRAL, ERROR_LEVEL_ERROR, + "'*' bad operand" }, +{ E_ARG_ERROR, ERROR_LEVEL_ERROR, + "Argument count error, argument ignored" }, +{ E_ARG_COUNT, ERROR_LEVEL_ERROR, + "Function was expecting more arguments" }, +{ E_FUNC_EXPECTED, ERROR_LEVEL_ERROR, + "Function name expected '%s'. ANSI style declaration REQUIRED" }, +{ E_PLUS_INVALID, ERROR_LEVEL_ERROR, + "invalid operand '%s'" }, +{ E_PTR_PLUS_PTR, ERROR_LEVEL_ERROR, + "pointer + pointer invalid" }, +{ E_SHIFT_OP_INVALID, ERROR_LEVEL_ERROR, + "invalid operand for shift operator" }, +{ E_COMPARE_OP, ERROR_LEVEL_ERROR, + "compare operand cannot be struct/union" }, +{ E_BITWISE_OP, ERROR_LEVEL_ERROR, + "operand invalid for bitwise operation" }, +{ E_ANDOR_OP, ERROR_LEVEL_ERROR, + "Invalid operand for '&&' or '||'" }, +{ E_TYPE_MISMATCH, ERROR_LEVEL_ERROR, + "indirections to different types %s %s " }, +{ E_AGGR_ASSIGN, ERROR_LEVEL_ERROR, + "cannot assign values to aggregates" }, +{ E_ARRAY_DIRECT, ERROR_LEVEL_ERROR, + "bit Arrays can be accessed by literal index only" }, +{ E_BIT_ARRAY, ERROR_LEVEL_ERROR, + "Array or Pointer to bit|sbit|sfr not allowed.'%s'" }, +{ E_DUPLICATE_TYPEDEF, ERROR_LEVEL_ERROR, + "typedef/enum '%s' duplicate. Previous definiton Ignored" }, +{ E_ARG_TYPE, ERROR_LEVEL_ERROR, + "Actual Argument type different from declaration %d" }, +{ E_RET_VALUE, ERROR_LEVEL_ERROR, + "Function return value mismatch" }, +{ E_FUNC_AGGR, ERROR_LEVEL_ERROR, + "Function cannot return aggregate. Func body ignored" }, +{ E_FUNC_DEF, ERROR_LEVEL_ERROR, + "ANSI Style declaration needed" }, +{ E_DUPLICATE_LABEL, ERROR_LEVEL_ERROR, + "Duplicate label '%s'" }, +{ E_LABEL_UNDEF, ERROR_LEVEL_ERROR, + "Label undefined '%s'" }, +{ E_FUNC_VOID, ERROR_LEVEL_ERROR, + "void function returning value" }, +{ W_VOID_FUNC, ERROR_LEVEL_WARNING, + "function '%s' must return value" }, +{ W_RETURN_MISMATCH, ERROR_LEVEL_WARNING, + "function return value mismatch" }, +{ E_CASE_CONTEXT, ERROR_LEVEL_ERROR, + "'case/default' found without 'switch'. Statement ignored" }, +{ E_CASE_CONSTANT, ERROR_LEVEL_ERROR, + "'case' expression not constant. Statement ignored" }, +{ E_BREAK_CONTEXT, ERROR_LEVEL_ERROR, + "'break/continue' statement out of context" }, +{ E_SWITCH_AGGR, ERROR_LEVEL_ERROR, + "nonintegral used in switch expression" }, +{ E_FUNC_BODY, ERROR_LEVEL_ERROR, + "function '%s' already has body" }, +{ E_UNKNOWN_SIZE, ERROR_LEVEL_ERROR, + "attempt to allocate variable of unknown size '%s'" }, +{ E_AUTO_AGGR_INIT, ERROR_LEVEL_ERROR, + "aggregate 'auto' variable '%s' cannot be initialized" }, +{ E_INIT_COUNT, ERROR_LEVEL_ERROR, + "too many initializers" }, +{ E_INIT_STRUCT, ERROR_LEVEL_ERROR, + "struct/union/array '%s': initialization needs curly braces" }, +{ E_INIT_NON_ADDR, ERROR_LEVEL_ERROR, + "non-address initialization expression" }, +{ E_INT_DEFINED, ERROR_LEVEL_ERROR, + "interrupt no '%d' already has a service routine '%s'" }, +{ E_INT_ARGS, ERROR_LEVEL_ERROR, + "interrupt routine cannot have arguments, arguments ingored" }, +{ E_INCLUDE_MISSING, ERROR_LEVEL_ERROR, + "critical compiler #include file missing. " }, +{ E_NO_MAIN, ERROR_LEVEL_ERROR, + "function 'main' undefined" }, +{ E_EXTERN_INIT, ERROR_LEVEL_ERROR, + "'extern' variable '%s' cannot be initialised " }, +{ E_PRE_PROC_FAILED, ERROR_LEVEL_ERROR, + "Pre-Processor %s" }, +{ E_DUP_FAILED, ERROR_LEVEL_ERROR, + "_dup call failed" }, +{ E_INCOMPAT_TYPES, ERROR_LEVEL_ERROR, + "incompatible types" }, +{ W_LOOP_ELIMINATE, ERROR_LEVEL_WARNING, + "'while' loop with 'zero' constant. Loop eliminated" }, +{ W_NO_SIDE_EFFECTS, ERROR_LEVEL_WARNING, + "%s expression has NO side effects. Expr eliminated" }, +{ W_CONST_TOO_LARGE, ERROR_LEVEL_PEDANTIC, + "constant value '%s', out of range." }, +{ W_BAD_COMPARE, ERROR_LEVEL_WARNING, + "comparison will either, ALWAYs succeed or ALWAYs fail" }, +{ E_TERMINATING, ERROR_LEVEL_ERROR, + "Compiler Terminating , contact author with source" }, +{ W_LOCAL_NOINIT, ERROR_LEVEL_WARNING, + "'auto' variable '%s' may be used before initialization" }, +{ W_NO_REFERENCE, ERROR_LEVEL_WARNING, + "in function %s unreferenced %s : '%s'" }, +{ E_OP_UNKNOWN_SIZE, ERROR_LEVEL_ERROR, + "unknown size for operand" }, +{ W_LONG_UNSUPPORTED, ERROR_LEVEL_WARNING, + "'%s' 'long' not supported , declared as 'int'." }, +{ E_LITERAL_GENERIC, ERROR_LEVEL_ERROR, + //"illegal cast of LITERAL value to 'generic' pointer: assuming 'xdata' pointer" }, + "illegal cast of LITERAL value to 'generic' pointer" }, +{ E_SFR_ADDR_RANGE, ERROR_LEVEL_ERROR, + "%s '%s' address out of range" }, +{ E_BITVAR_STORAGE, ERROR_LEVEL_ERROR, + "storage class CANNOT be specified for bit variable '%s'" }, +{ E_EXTERN_MISMATCH, ERROR_LEVEL_ERROR, + "extern definition for '%s' mismatches with declaration." }, +{ E_NONRENT_ARGS, ERROR_LEVEL_ERROR, + "Functions called via pointers must be 'reentrant' to take this many arguments" }, +{ W_DOUBLE_UNSUPPORTED, ERROR_LEVEL_WARNING, + "type 'double' not supported assuming 'float'" }, +{ W_COMP_RANGE, ERROR_LEVEL_WARNING, + "comparison is always %s due to limited range of data type" }, +{ W_FUNC_NO_RETURN, ERROR_LEVEL_WARNING, + "no 'return' statement found for function '%s'" }, +{ W_PRE_PROC_WARNING, ERROR_LEVEL_WARNING, + "Pre-Processor %s" }, +{ W_STRUCT_AS_ARG, ERROR_LEVEL_WARNING, + "structure '%s' passed as function argument changed to pointer" }, +{ E_PREV_DEF_CONFLICT, ERROR_LEVEL_ERROR, + "conflict with previous definition of '%s' for attribute '%s'" }, +{ E_CODE_NO_INIT, ERROR_LEVEL_ERROR, + "variable '%s' declared in code space must have initialiser" }, +{ E_OPS_INTEGRAL, ERROR_LEVEL_ERROR, + "operands not integral for assignment operation" }, +{ E_TOO_MANY_PARMS, ERROR_LEVEL_ERROR, + "too many parameters " }, +{ E_TOO_FEW_PARMS, ERROR_LEVEL_ERROR, + "too few parameters" }, +{ E_FUNC_NO_CODE, ERROR_LEVEL_ERROR, + "code not generated for '%s' due to previous errors" }, +{ E_TYPE_MISMATCH_PARM, ERROR_LEVEL_ERROR, + "type mismatch for parameter number %d" }, +{ E_INVALID_FLOAT_CONST, ERROR_LEVEL_ERROR, + "invalid float constant '%s'" }, +{ E_INVALID_OP, ERROR_LEVEL_ERROR, + "invalid operand for '%s' operation" }, +{ E_SWITCH_NON_INTEGER, ERROR_LEVEL_ERROR, + "switch value not an integer" }, +{ E_CASE_NON_INTEGER, ERROR_LEVEL_ERROR, + "case label not an integer" }, +{ W_FUNC_TOO_LARGE, ERROR_LEVEL_WARNING, + "function '%s' too large for global optimization" }, +{ W_CONTROL_FLOW, ERROR_LEVEL_PEDANTIC, + "conditional flow changed by optimizer: so said EVELYN the modified DOG" }, +{ W_PTR_TYPE_INVALID, ERROR_LEVEL_WARNING, + "invalid type specifier for pointer type; specifier ignored" }, +{ W_IMPLICIT_FUNC, ERROR_LEVEL_WARNING, + "function '%s' implicit declaration" }, +{ W_CONTINUE, ERROR_LEVEL_WARNING, + "%s" }, +{ I_EXTENDED_STACK_SPILS, ERROR_LEVEL_INFO, + "extended stack by %d bytes for compiler temp(s) :in function '%s': %s " }, +{ W_UNKNOWN_PRAGMA, ERROR_LEVEL_WARNING, + "unknown or unsupported #pragma directive '%s'" }, +{ W_SHIFT_CHANGED, ERROR_LEVEL_PEDANTIC, + "%s shifting more than size of object changed to zero" }, +{ W_UNKNOWN_OPTION, ERROR_LEVEL_WARNING, + "unknown compiler option '%s' ignored" }, +{ W_UNSUPP_OPTION, ERROR_LEVEL_WARNING, + "option '%s' no longer supported '%s' " }, +{ W_UNKNOWN_FEXT, ERROR_LEVEL_WARNING, + "don't know what to do with file '%s'. file extension unsupported" }, +{ W_TOO_MANY_SRC, ERROR_LEVEL_WARNING, + "cannot compile more than one source file. file '%s' ignored" }, +{ I_CYCLOMATIC, ERROR_LEVEL_INFO, + "function '%s', # edges %d , # nodes %d , cyclomatic complexity %d" }, +{ E_DIVIDE_BY_ZERO, ERROR_LEVEL_ERROR, + "dividing by ZERO" }, +{ E_FUNC_BIT, ERROR_LEVEL_ERROR, + "function cannot return 'bit'" }, +{ E_CAST_ZERO, ERROR_LEVEL_ERROR, + "casting from to type 'void' is illegal" }, +{ W_CONST_RANGE, ERROR_LEVEL_WARNING, + "constant is out of range %s" }, +{ W_CODE_UNREACH, ERROR_LEVEL_PEDANTIC, + "unreachable code" }, +{ E_NONPTR2_GENPTR, ERROR_LEVEL_ERROR, + "non-pointer type cast to generic pointer" }, +{ W_POSSBUG, ERROR_LEVEL_WARNING, + "possible code generation error at line %d,\n" + " send source to sandeep.dutta@usa.net" }, +{ E_INCOMPAT_PTYPES, ERROR_LEVEL_ERROR, + "pointer types incompatible " }, +{ W_UNKNOWN_MODEL, ERROR_LEVEL_WARNING, + "unknown memory model at %s : %d" }, +{ E_UNKNOWN_TARGET, ERROR_LEVEL_ERROR, + "cannot generate code for target '%s'" }, +{ W_INDIR_BANKED, ERROR_LEVEL_WARNING, + "Indirect call to a banked function not implemented." }, +{ W_UNSUPPORTED_MODEL, ERROR_LEVEL_WARNING, + "Model '%s' not supported for %s, ignored." }, +{ W_BANKED_WITH_NONBANKED, ERROR_LEVEL_WARNING, + "Both banked and nonbanked attributes used. nonbanked wins." }, +{ W_BANKED_WITH_STATIC, ERROR_LEVEL_WARNING, + "Both banked and static used. static wins." }, +{ W_INT_TO_GEN_PTR_CAST, ERROR_LEVEL_WARNING, + "converting integer type to generic pointer: assuming XDATA" }, +{ W_ESC_SEQ_OOR_FOR_CHAR, ERROR_LEVEL_WARNING, + "escape sequence out of range for char." }, +{ E_INVALID_HEX, ERROR_LEVEL_ERROR, + "\\x used with no following hex digits." }, +{ W_FUNCPTR_IN_USING_ISR, ERROR_LEVEL_WARNING, + "call via function pointer in ISR using non-zero register bank.\n" + " Cannot determine which register bank to save." }, +{ E_NO_SUCH_BANK, ERROR_LEVEL_ERROR, + "called function uses unknown register bank %d." }, +{ E_TWO_OR_MORE_DATA_TYPES, ERROR_LEVEL_ERROR, + "two or more data types in declaration for '%s'" }, +{ E_LONG_OR_SHORT_INVALID, ERROR_LEVEL_ERROR, + "long or short specified for %s '%s'" }, +{ E_SIGNED_OR_UNSIGNED_INVALID, ERROR_LEVEL_ERROR, + "signed or unsigned specified for %s '%s'" }, +{ E_LONG_AND_SHORT_INVALID, ERROR_LEVEL_ERROR, + "both long and short specified for %s '%s'" }, +{ E_SIGNED_AND_UNSIGNED_INVALID, ERROR_LEVEL_ERROR, + "both signed and unsigned specified for %s '%s'" }, +{ E_TWO_OR_MORE_STORAGE_CLASSES, ERROR_LEVEL_ERROR, + "two or more storage classes in declaration for '%s'" }, +{ W_EXCESS_INITIALIZERS, ERROR_LEVEL_WARNING, + "excess elements in %s initializer after '%s'" }, +{ E_ARGUMENT_MISSING, ERROR_LEVEL_ERROR, + "Option %s requires an argument." }, +{ W_STRAY_BACKSLASH, ERROR_LEVEL_WARNING, + "stray '\\' at column %d" }, +{ W_NEWLINE_IN_STRING, ERROR_LEVEL_WARNING, + "newline in string constant" }, +{ E_CANNOT_USE_GENERIC_POINTER, ERROR_LEVEL_ERROR, + "cannot use generic pointer %s to initialize %s" }, +{ W_EXCESS_SHORT_OPTIONS, ERROR_LEVEL_WARNING, + "Only one short option can be specified at a time. Rest of %s ignored." }, +{ E_VOID_VALUE_USED, ERROR_LEVEL_ERROR, + "void value not ignored as it ought to be" }, +{ W_INTEGRAL2PTR_NOCAST, ERROR_LEVEL_WARNING, + "converting integral to pointer without a cast" }, +{ W_PTR2INTEGRAL_NOCAST, ERROR_LEVEL_WARNING, + "converting pointer to integral without a cast" }, +{ W_SYMBOL_NAME_TOO_LONG, ERROR_LEVEL_WARNING, + "symbol name too long, truncated to %d chars" }, +{ W_CAST_STRUCT_PTR,ERROR_LEVEL_WARNING, + "cast of struct %s * to struct %s * " }, +{ W_LIT_OVERFLOW, ERROR_LEVEL_WARNING, + "overflow in implicit constant conversion" }, +{ E_PARAM_NAME_OMITTED, ERROR_LEVEL_ERROR, + "in function %s: name omitted for parameter %d" }, +{ W_NO_FILE_ARG_IN_C1, ERROR_LEVEL_WARNING, + "only standard input is compiled in c1 mode. file '%s' ignored" }, +{ E_NEED_OPT_O_IN_C1, ERROR_LEVEL_ERROR, + "must specify assembler file name with -o in c1 mode" }, +{ W_ILLEGAL_OPT_COMBINATION, ERROR_LEVEL_WARNING, + "illegal combination of options (--c1mode, -E, -S -c)" }, +{ E_DUPLICATE_MEMBER, ERROR_LEVEL_ERROR, + "duplicate %s member '%s'" }, +{ E_STACK_VIOLATION, ERROR_LEVEL_ERROR, + "'%s' internal stack %s" }, +{ W_INT_OVL, ERROR_LEVEL_PEDANTIC, + "integer overflow in expression" }, +{ W_USELESS_DECL, ERROR_LEVEL_WARNING, + "useless declaration (possible use of keyword as variable name)" }, +{ E_INT_BAD_INTNO, ERROR_LEVEL_ERROR, + "interrupt number '%u' is not valid" }, +{ W_BITFLD_NAMED, ERROR_LEVEL_WARNING, + "ignoring declarator of 0 length bitfield" }, +{ E_FUNC_ATTR, ERROR_LEVEL_ERROR, + "function attribute following non-function declaration"}, +{ W_SAVE_RESTORE, ERROR_LEVEL_PEDANTIC, + "unmatched #pragma save and #pragma restore" }, +{ E_INVALID_CRITICAL, ERROR_LEVEL_ERROR, + "not allowed in a critical section" }, +{ E_NOT_ALLOWED, ERROR_LEVEL_ERROR, + "%s not allowed here" }, +{ E_BAD_TAG, ERROR_LEVEL_ERROR, + "'%s' is not a %s tag" }, +{ E_ENUM_NON_INTEGER, ERROR_LEVEL_ERROR, + "enumeration constant not an integer" }, +{ W_DEPRECATED_PRAGMA, ERROR_LEVEL_WARNING, + "pragma %s is deprecated, please see documentation for details" }, +{ E_SIZEOF_INCOMPLETE_TYPE, ERROR_LEVEL_ERROR, + "sizeof applied to an incomplete type" }, +{ E_PREVIOUS_DEF, ERROR_LEVEL_ERROR, + "previously defined here" }, +{ W_SIZEOF_VOID, ERROR_LEVEL_WARNING, + "size of void is zero" }, +{ W_POSSBUG2, ERROR_LEVEL_WARNING, + "possible code generation error at %s line %d,\n" + " please report problem and send source code at SDCC-USER list on SF.Net"}, +{ W_COMPLEMENT, ERROR_LEVEL_WARNING, + "using ~ on bit/bool/unsigned char variables can give unexpected results due to promotion to int" }, +{ E_SHADOWREGS_NO_ISR, ERROR_LEVEL_ERROR, + "ISR function attribute 'shadowregs' following non-ISR function '%s'" }, +{ W_SFR_ABSRANGE, ERROR_LEVEL_WARNING, + "absolute address for sfr '%s' probably out of range." }, +{ E_BANKED_WITH_CALLEESAVES, ERROR_LEVEL_ERROR, + "Both banked and callee-saves cannot be used together." }, +{ W_INVALID_INT_CONST, ERROR_LEVEL_WARNING, + "integer constant '%s' out of range, truncated to %.0lf." }, +{ W_CMP_SU_CHAR, ERROR_LEVEL_PEDANTIC, + "comparison of 'signed char' with 'unsigned char' requires promotion to int" }, +{ W_INVALID_FLEXARRAY, ERROR_LEVEL_WARNING, + "invalid use of structure with flexible array member" }, +{ W_C89_NO_FLEXARRAY, ERROR_LEVEL_PEDANTIC, + "ISO C90 does not support flexible array members" }, +{ E_FLEXARRAY_NOTATEND, ERROR_LEVEL_ERROR, + "flexible array member not at end of struct" }, +{ E_FLEXARRAY_INEMPTYSTRCT, ERROR_LEVEL_ERROR, + "flexible array in otherwise empty struct" }, +{ W_EMPTY_SOURCE_FILE, ERROR_LEVEL_WARNING, + "ISO C forbids an empty source file" }, +{ W_BAD_PRAGMA_ARGUMENTS, ERROR_LEVEL_WARNING, + "#pragma %s: bad argument(s); pragma ignored" }, +{ E_BAD_RESTRICT, ERROR_LEVEL_ERROR, + "Only pointers may be qualified with 'restrict'" }, +{ E_BAD_INLINE, ERROR_LEVEL_ERROR, + "Only functions may be qualified with 'inline'" }, +{ E_BAD_INT_ARGUMENT, ERROR_LEVEL_ERROR, + "Bad integer argument for option %s" }, +{ E_NEGATIVE_ARRAY_SIZE, ERROR_LEVEL_ERROR, + "Size of array '%s' is negative" }, +}; + +/* +------------------------------------------------------------------------------- +SetErrorOut - Set the error output file + +------------------------------------------------------------------------------- +*/ + +FILE *SetErrorOut(FILE *NewErrorOut) +{ + _SDCCERRG.out = NewErrorOut ; + + return NewErrorOut ; +} + +void setErrorLogLevel (ERROR_LOG_LEVEL level) +{ + _SDCCERRG.logLevel = level; +} + +/* +------------------------------------------------------------------------------- +vwerror - Output a standard error message with variable number of arguments + +------------------------------------------------------------------------------- +*/ + +void vwerror (int errNum, va_list marker) +{ + if (_SDCCERRG.out == NULL) { + _SDCCERRG.out = DEFAULT_ERROR_OUT; + } + + if (ErrTab[errNum].errIndex != errNum) { + fprintf(_SDCCERRG.out, + "Internal error: error table entry for %d inconsistent.", errNum); + } + + if ((ErrTab[errNum].errType >= _SDCCERRG.logLevel) && (!_SDCCERRG.disabled[errNum])) { + if ( ErrTab[errNum].errType == ERROR_LEVEL_ERROR || _SDCCERRG.werror ) + fatalError++ ; + + if ( filename && lineno ) { + if(_SDCCERRG.style) + fprintf(_SDCCERRG.out, "%s(%d) : ",filename,lineno); + else + fprintf(_SDCCERRG.out, "%s:%d: ",filename,lineno); + } else if (lineno) { + fprintf(_SDCCERRG.out, "at %d: ", lineno); + } else { + fprintf(_SDCCERRG.out, "-:0: "); + } + + switch(ErrTab[errNum].errType) + { + case ERROR_LEVEL_ERROR: + fprintf(_SDCCERRG.out, "error %d: ", errNum); + break; + case ERROR_LEVEL_WARNING: + case ERROR_LEVEL_PEDANTIC: + if (_SDCCERRG.werror) + fprintf(_SDCCERRG.out, "error %d: ", errNum); + else + fprintf(_SDCCERRG.out, "warning %d: ", errNum); + break; + case ERROR_LEVEL_INFO: + fprintf(_SDCCERRG.out, "info %d: ", errNum); + break; + default: + break; + } + + vfprintf(_SDCCERRG.out, ErrTab[errNum].errText,marker); + fprintf(_SDCCERRG.out, "\n"); + } else { + /* Below the logging level, drop. */ + } +} +/* +------------------------------------------------------------------------------- +werror - Output a standard error message with variable number of arguments + +------------------------------------------------------------------------------- +*/ + +void werror (int errNum, ...) +{ + va_list marker; + va_start(marker,errNum); + vwerror(errNum, marker); + va_end(marker); +} + +/* +------------------------------------------------------------------------------- +werrorfl - Output a standard error message with variable number of arguments. + Use a specified filename and line number instead of the default. + +------------------------------------------------------------------------------- +*/ + +void werrorfl (char *newFilename, int newLineno, int errNum, ...) +{ + char *oldFilename = filename; + int oldLineno = lineno; + va_list marker; + + filename = newFilename; + lineno = newLineno; + + va_start(marker,errNum); + vwerror(errNum, marker); + va_end(marker); + + filename = oldFilename; + lineno = oldLineno; +} + + +/* +------------------------------------------------------------------------------- +fatal - Output a standard error message with variable number of arguments and + call exit() +------------------------------------------------------------------------------- +*/ +void fatal (int exitCode, int errNum, ...) +{ + va_list marker; + va_start(marker,errNum); + vwerror(errNum, marker); + va_end(marker); + + exit(exitCode); +} + +/* +------------------------------------------------------------------------------- +style - Change the output error style to MSVC +------------------------------------------------------------------------------- +*/ + +void MSVC_style (int style) +{ + _SDCCERRG.style = style; +} + +/* +------------------------------------------------------------------------------- +disabled - Disable output of specified warning +------------------------------------------------------------------------------- +*/ + +void setWarningDisabled (int errNum) +{ + if ((errNum < MAX_ERROR_WARNING) && (ErrTab[errNum].errType <= ERROR_LEVEL_WARNING)) + _SDCCERRG.disabled[errNum] = 1; +} + +/* +------------------------------------------------------------------------------- +Set the flag to treat warnings as errors +------------------------------------------------------------------------------- +*/ + +void setWError (int flag) +{ + _SDCCERRG.werror = flag; +} diff --git a/src/SDCCerr.h b/src/SDCCerr.h new file mode 100644 index 0000000..7b70744 --- /dev/null +++ b/src/SDCCerr.h @@ -0,0 +1,321 @@ +/* +=============================================================================== +SDCCERR - SDCC Standard error handler + + +=============================================================================== +*/ + +#if !defined(__SDCCERR_H) + +#define __SDCCERR_H + +#include +#include + +/* ERROR Message Definition */ + +#define E_DUPLICATE 0 /* Duplicate variable */ +#define E_SYNTAX_ERROR 1 /* Syntax Error */ +#define E_CONST_EXPECTED 2 /* constant expected */ +#define E_OUT_OF_MEM 3 /* malloc failed */ +#define E_FILE_OPEN_ERR 4 /* File open failed */ +#define E_INVALID_OCLASS 5 /* output class invalid */ +#define E_CANNOT_ALLOC 6 /* cannot allocate space*/ +#define E_OLD_STYLE 7 /* old style C ! allowed*/ +#define E_STACK_OUT 8 /* v r out of stack */ +#define E_INTERNAL_ERROR 9 /* unable to alloc tvar */ +#define E_LVALUE_REQUIRED 10 /* lvalue required */ +#define E_TMPFILE_FAILED 11 /* tmpfile creation failed */ +#define E_FUNCTION_EXPECTED 12 /* function expected */ +#define E_USING_ERROR 13 /* using in error */ +#define E_SFR_INIT 14 /* init error for sbit */ +#define W_INIT_IGNORED 15 /* initialiser ignored */ +#define E_AUTO_ASSUMED 16 /* sclass auto assumed */ +#define E_AUTO_ABSA 17 /* abs addr for auto var*/ +#define W_INIT_WRONG 18 /* initializer type != */ +#define E_FUNC_REDEF 19 /* func name redefined */ +#define E_ID_UNDEF 20 /* identifer undefined */ +#define W_STACK_OVERFLOW 21 /* stack overflow */ +#define E_NEED_ARRAY_PTR 22 /* array or pointer reqd*/ +#define E_IDX_NOT_INT 23 /* index not an integer */ +#define W_IDX_OUT_OF_BOUNDS 24 /* array index out of bounds */ +#define E_STRUCT_UNION 25 /* struct,union expected*/ +#define E_NOT_MEMBER 26 /* !struct/union member */ +#define E_PTR_REQD 27 /* pointer required */ +#define E_UNARY_OP 28 /* unary operator bad op*/ +#define E_CONV_ERR 29 /* conversion error */ +#define E_INT_REQD 30 /* bit field must be int*/ +#define E_BITFLD_SIZE 31 /* bit field size > 16 */ +#define W_TRUNCATION 32 /* high order trucation */ +#define E_CODE_WRITE 33 /* trying 2 write to code */ +#define E_LVALUE_CONST 34 /* lvalue is a const */ +#define E_ILLEGAL_ADDR 35 /* address of bit */ +#define E_CAST_ILLEGAL 36 /* cast illegal */ +#define E_MULT_INTEGRAL 37 /* mult opernd must b integral */ +#define E_ARG_ERROR 38 /* argument count error*/ +#define E_ARG_COUNT 39 /* func expecting more */ +#define E_FUNC_EXPECTED 40 /* func name expected */ +#define E_PLUS_INVALID 41 /* plus invalid */ +#define E_PTR_PLUS_PTR 42 /* pointer + pointer */ +#define E_SHIFT_OP_INVALID 43 /* shft op op invalid */ +#define E_COMPARE_OP 44 /* compare operand */ +#define E_BITWISE_OP 45 /* bit op invalid op */ +#define E_ANDOR_OP 46 /* && || op invalid */ +#define E_TYPE_MISMATCH 47 /* type mismatch */ +#define E_AGGR_ASSIGN 48 /* aggr assign */ +#define E_ARRAY_DIRECT 49 /* array indexing in */ +#define E_BIT_ARRAY 50 /* bit array not allowed */ +#define E_DUPLICATE_TYPEDEF 51 /* typedef name duplicate */ +#define E_ARG_TYPE 52 /* arg type mismatch */ +#define E_RET_VALUE 53 /* return value mismatch */ +#define E_FUNC_AGGR 54 /* function returing aggr */ +#define E_FUNC_DEF 55 /* ANSI Style def neede */ +#define E_DUPLICATE_LABEL 56 /* duplicate label name */ +#define E_LABEL_UNDEF 57 /* undefined label used */ +#define E_FUNC_VOID 58 /* void func ret value */ +#define W_VOID_FUNC 59 /* func must return value */ +#define W_RETURN_MISMATCH 60 /* return value mismatch */ +#define E_CASE_CONTEXT 61 /* case stmnt without switch */ +#define E_CASE_CONSTANT 62 /* case expression ! const */ +#define E_BREAK_CONTEXT 63 /* break statement invalid */ +#define E_SWITCH_AGGR 64 /* non integral for switch */ +#define E_FUNC_BODY 65 /* func has body already */ +#define E_UNKNOWN_SIZE 66 /* variable has unknown size */ +#define E_AUTO_AGGR_INIT 67 /* auto aggregates no init */ +#define E_INIT_COUNT 68 /* too many initializers */ +#define E_INIT_STRUCT 69 /* struct init wrong */ +#define E_INIT_NON_ADDR 70 /* non address xpr for init */ +#define E_INT_DEFINED 71 /* interrupt already over */ +#define E_INT_ARGS 72 /* interrupt rtn cannot have args */ +#define E_INCLUDE_MISSING 73 /* compiler include missing */ +#define E_NO_MAIN 74 /* main function undefined */ +#define E_EXTERN_INIT 75 /* extern variable initialised */ +#define E_PRE_PROC_FAILED 76 /* preprocessor failed */ +#define E_DUP_FAILED 77 /* file DUP failed */ +#define E_INCOMPAT_TYPES 78 /* incompatible types casting */ +#define W_LOOP_ELIMINATE 79 /* loop eliminated */ +#define W_NO_SIDE_EFFECTS 80 /* expression has no side effects */ +#define W_CONST_TOO_LARGE 81 /* constant out of range */ +#define W_BAD_COMPARE 82 /* bad comparison */ +#define E_TERMINATING 83 /* compiler terminating */ +#define W_LOCAL_NOINIT 84 /* local reference before assignment */ +#define W_NO_REFERENCE 85 /* no reference to local variable */ +#define E_OP_UNKNOWN_SIZE 86 /* unknown size for operand */ +#define W_LONG_UNSUPPORTED 87 /* 'long' not supported yet */ +#define E_LITERAL_GENERIC 88 /* literal being cast to generic pointer */ +#define E_SFR_ADDR_RANGE 89 /* sfr address out of range */ +#define E_BITVAR_STORAGE 90 /* storage given for 'bit' variable */ +#define E_EXTERN_MISMATCH 91 /* extern declaration mismatches */ +#define E_NONRENT_ARGS 92 /* fptr non reentrant has args */ +#define W_DOUBLE_UNSUPPORTED 93 /* 'double' not supported yet */ +#define W_COMP_RANGE 94 /* comparison is always %s due to limited range of data type */ +#define W_FUNC_NO_RETURN 95 /* no return statement found */ +#define W_PRE_PROC_WARNING 96 /* preprocessor generated warning */ +#define W_STRUCT_AS_ARG 97 /* structure passed as argument */ +#define E_PREV_DEF_CONFLICT 98 /* previous definition conflicts with current */ +#define E_CODE_NO_INIT 99 /* vars in code space must have initializer */ +#define E_OPS_INTEGRAL 100 /* operans must be integral for certian assignments */ +#define E_TOO_MANY_PARMS 101 /* too many parameters */ +#define E_TOO_FEW_PARMS 102 /* to few parameters */ +#define E_FUNC_NO_CODE 103 /* fatalError */ +#define E_TYPE_MISMATCH_PARM 104 /* type mismatch for parameter */ +#define E_INVALID_FLOAT_CONST 105 /* invalid floating point literal string */ +#define E_INVALID_OP 106 /* invalid operand for some operation */ +#define E_SWITCH_NON_INTEGER 107 /* switch value not integer */ +#define E_CASE_NON_INTEGER 108 /* case value not integer */ +#define W_FUNC_TOO_LARGE 109 /* function too large */ +#define W_CONTROL_FLOW 110 /* control flow changed due to optimization */ +#define W_PTR_TYPE_INVALID 111 /* invalid type specifier for pointer */ +#define W_IMPLICIT_FUNC 112 /* function declared implicitly */ +#define W_CONTINUE 113 /* more than one line */ +#define I_EXTENDED_STACK_SPILS 114 /* too many spils occured */ +#define W_UNKNOWN_PRAGMA 115 /* #pragma directive unsupported */ +#define W_SHIFT_CHANGED 116 /* shift changed to zero */ +#define W_UNKNOWN_OPTION 117 /* don't know the option */ +#define W_UNSUPP_OPTION 118 /* processor reset has been redifned */ +#define W_UNKNOWN_FEXT 119 /* unknown file extension */ +#define W_TOO_MANY_SRC 120 /* can only compile one .c file at a time */ +#define I_CYCLOMATIC 121 /* information message */ +#define E_DIVIDE_BY_ZERO 122 /* / 0 */ +#define E_FUNC_BIT 123 /* function cannot return bit */ +#define E_CAST_ZERO 124 /* casting to from size zero */ +#define W_CONST_RANGE 125 /* constant too large */ +#define W_CODE_UNREACH 126 /* unreachable code */ +#define E_NONPTR2_GENPTR 127 /* non pointer cast to generic pointer */ +#define W_POSSBUG 128 /* possible code generation error */ +#define E_INCOMPAT_PTYPES 129 /* incampatible pointer assignment */ +#define W_UNKNOWN_MODEL 130 /* Unknown memory model */ +#define E_UNKNOWN_TARGET 131 /* target not defined */ +#define W_INDIR_BANKED 132 /* Indirect call to a banked fun */ +#define W_UNSUPPORTED_MODEL 133 /* Unsupported model, ignored */ +#define W_BANKED_WITH_NONBANKED 134 /* banked and nonbanked attributes mixed */ +#define W_BANKED_WITH_STATIC 135 /* banked and static mixed */ +#define W_INT_TO_GEN_PTR_CAST 136 /* Converting integer type to generic pointer. */ +#define W_ESC_SEQ_OOR_FOR_CHAR 137 /* Escape sequence of of range for char */ +#define E_INVALID_HEX 138 /* \x used with no following hex digits */ +#define W_FUNCPTR_IN_USING_ISR 139 /* Call via function pointer in ISR with using attribute. */ +#define E_NO_SUCH_BANK 140 /* 'using' attribute specifies non-existant register bank. */ +#define E_TWO_OR_MORE_DATA_TYPES 141 +#define E_LONG_OR_SHORT_INVALID 142 /* long or short invalid for .. */ +#define E_SIGNED_OR_UNSIGNED_INVALID 143 /* signed or unsigned invalid for .. */ +#define E_LONG_AND_SHORT_INVALID 144 /* long and short invalid for .. */ +#define E_SIGNED_AND_UNSIGNED_INVALID 145 /* signed and unsigned invalid for .. */ +#define E_TWO_OR_MORE_STORAGE_CLASSES 146 +#define W_EXCESS_INITIALIZERS 147 /* too much initializers for array */ +#define E_ARGUMENT_MISSING 148 /* Option requires an argument. */ +#define W_STRAY_BACKSLASH 149 +#define W_NEWLINE_IN_STRING 150 +#define E_CANNOT_USE_GENERIC_POINTER 151 +#define W_EXCESS_SHORT_OPTIONS 152 +#define E_VOID_VALUE_USED 153 +#define W_INTEGRAL2PTR_NOCAST 154 +#define W_PTR2INTEGRAL_NOCAST 155 +#define W_SYMBOL_NAME_TOO_LONG 156 +#define W_CAST_STRUCT_PTR 157 /* pointer to different structure types */ +#define W_LIT_OVERFLOW 158 /* overflow in implicit constant conversion */ +#define E_PARAM_NAME_OMITTED 159 +#define W_NO_FILE_ARG_IN_C1 160 +#define E_NEED_OPT_O_IN_C1 161 +#define W_ILLEGAL_OPT_COMBINATION 162 +#define E_DUPLICATE_MEMBER 163 +#define E_STACK_VIOLATION 164 /* internal stack violation */ +#define W_INT_OVL 165 /* integer overflow in expression */ +#define W_USELESS_DECL 166 /* useless declaration */ +#define E_INT_BAD_INTNO 167 /* invalid interrupt number */ +#define W_BITFLD_NAMED 168 /* declarator used with 0 length bitfield */ +#define E_FUNC_ATTR 169 /* function attribute without function */ +#define W_SAVE_RESTORE 170 /* unmatched #pragma SAVE and #pragma RESTORE */ +#define E_INVALID_CRITICAL 171 /* operation invalid in critical sequence */ +#define E_NOT_ALLOWED 172 /* %s not allowed here */ +#define E_BAD_TAG 173 /* '%s' is not a %s tag */ +#define E_ENUM_NON_INTEGER 174 /* enumeration constant not an integer */ +#define W_DEPRECATED_PRAGMA 175 /* deprecated pragma */ +#define E_SIZEOF_INCOMPLETE_TYPE 176 /* sizeof applied to an incomplete type */ +#define E_PREVIOUS_DEF 177 /* previously defined here */ +#define W_SIZEOF_VOID 178 /* size of void is zero */ +#define W_POSSBUG2 179 /* possible bug, new format */ +#define W_COMPLEMENT 180 /* ~bit can give unexpected results */ +#define E_SHADOWREGS_NO_ISR 181 /* shadowregs keyword following non-ISR function */ +#define W_SFR_ABSRANGE 182 /* sfr at address out of range */ +#define E_BANKED_WITH_CALLEESAVES 183 /* banked and callee-saves mixed */ +#define W_INVALID_INT_CONST 184 /* invalid integer literal string */ +#define W_CMP_SU_CHAR 185 /* comparison of 'signed char' with 'unsigned char' requires promotion to int */ +#define W_INVALID_FLEXARRAY 186 /* invalid use of structure with flexible array member */ +#define W_C89_NO_FLEXARRAY 187 /* ISO C90 does not support flexible array members */ +#define E_FLEXARRAY_NOTATEND 188 /* flexible array member not at end of struct */ +#define E_FLEXARRAY_INEMPTYSTRCT 189 /* flexible array in otherwise empty struct */ +#define W_EMPTY_SOURCE_FILE 190 /* ISO C forbids an empty source file */ +#define W_BAD_PRAGMA_ARGUMENTS 191 /* #pragma %s: bad argument(s); pragma ignored */ +#define E_BAD_RESTRICT 192 /* Only pointers may be qualified with 'restrict' */ +#define E_BAD_INLINE 193 /* Only functions may be qualified with 'inline' */ +#define E_BAD_INT_ARGUMENT 194 /* Bad integer option argument */ +#define E_NEGATIVE_ARRAY_SIZE 195 /* Size of array '%s' is negative */ +#define MAX_ERROR_WARNING 256 /* size of disable warnings array */ + +/** Describes the maximum error level that will be logged. Any level + * includes all of the levels listed after it. + * + * + */ +enum _ERROR_LOG_LEVEL { + /** Everything. Currently the same as PEDANTIC. */ + ERROR_LEVEL_ALL, + /** All warnings, including those considered 'reasonable to use, + on occasion, in clean programs' (man 3 gcc). */ + ERROR_LEVEL_PEDANTIC, + /** 'informational' warnings */ + ERROR_LEVEL_INFO, + /** Most warnings. */ + ERROR_LEVEL_WARNING, + /** Errors only. */ + ERROR_LEVEL_ERROR +}; + +typedef enum _ERROR_LOG_LEVEL ERROR_LOG_LEVEL; + +struct SDCCERRG { + ERROR_LOG_LEVEL logLevel; + FILE *out; + int style; /* 1=MSVC */ + int werror; /* treat the warnings as errors */ + char disabled[MAX_ERROR_WARNING]; /* 1=warning disabled*/ +}; + +extern struct SDCCERRG _SDCCERRG; + +/** Sets the maximum error level to log. + See MAX_ERROR_LEVEL. The default is ERROR_LEVEL_ALL. +*/ +void setErrorLogLevel (ERROR_LOG_LEVEL level); + +/* +------------------------------------------------------------------------------- +SetErrorOut - Set the error output file + +------------------------------------------------------------------------------- +*/ + +FILE * SetErrorOut(FILE *NewErrorOut) ; + +/* +------------------------------------------------------------------------------- +vwerror - Output a standard eror message with variable number of arguements + +------------------------------------------------------------------------------- +*/ + +void vwerror (int errNum, va_list marker) ; + +/* +------------------------------------------------------------------------------- +werror - Output a standard eror message with variable number of arguements + +------------------------------------------------------------------------------- +*/ + +void werror (int errNum, ... ) ; + +/* +------------------------------------------------------------------------------- +werrorfl - Output a standard eror message with variable number of arguements. + Use a specified filename and line number instead of the default. + +------------------------------------------------------------------------------- +*/ + +void werrorfl (char *newFilename, int newLineno, int errNum, ...) ; + +/* +------------------------------------------------------------------------------- +fatal - Output a standard eror message with variable number of arguements and + call exit() +------------------------------------------------------------------------------- +*/ + +void fatal (int exitCode, int errNum, ... ) ; + +/* +------------------------------------------------------------------------------- +style - Change the output error style to MSVC +------------------------------------------------------------------------------- +*/ + +void MSVC_style (int style) ; + +/* +------------------------------------------------------------------------------- +disabled - Disable output of specified warning +------------------------------------------------------------------------------- +*/ + +void setWarningDisabled (int errNum) ; + +/* +------------------------------------------------------------------------------- +Set the flag to treat warnings as errors +------------------------------------------------------------------------------- +*/ +void setWError (int flag); + +#endif diff --git a/src/SDCCglobl.h b/src/SDCCglobl.h new file mode 100644 index 0000000..7166d88 --- /dev/null +++ b/src/SDCCglobl.h @@ -0,0 +1,390 @@ +/* SDCCglobl.h - global macros etc required by all files */ + +#ifndef SDCCGLOBL_H +#define SDCCGLOBL_H + +#include +#include +#include +#include +#include + +#include "SDCCset.h" + + +/* + * Define host port dependant constants etc. + */ + +#define UNIX_DIR_SEPARATOR_CHAR '/' + +#if defined(__BORLANDC__) || defined(_MSC_VER) +#define STRCASECMP stricmp +#define STRNCASECMP strnicmp +#else +#define STRCASECMP strcasecmp +#define STRNCASECMP strncasecmp +#endif + +#if defined(__MSDOS__) || defined(_WIN32) || defined(__OS2__) || defined (__CYGWIN__) + +#ifndef HAVE_DOS_BASED_FILE_SYSTEM +#define HAVE_DOS_BASED_FILE_SYSTEM 1 +#endif + +#define IS_DIR_SEPARATOR(c) ((c) == DIR_SEPARATOR_CHAR || (c) == UNIX_DIR_SEPARATOR_CHAR) +/* Note that IS_ABSOLUTE_PATH accepts d:foo as well, although it is + only semi-absolute. This is because the users of IS_ABSOLUTE_PATH + want to know whether to prepend the current working directory to + a file name, which should not be done with a name like d:foo. */ +#define IS_ABSOLUTE_PATH(f) (IS_DIR_SEPARATOR((f)[0]) || (((f)[0]) && ((f)[1] == ':'))) +#define FILENAME_CMP(s1, s2) STRCASECMP(s1, s2) + +#else /* not DOSish */ + +#define IS_DIR_SEPARATOR(c) ((c) == DIR_SEPARATOR_CHAR) +#define IS_ABSOLUTE_PATH(f) (IS_DIR_SEPARATOR((f)[0])) +#define FILENAME_CMP(s1, s2) strcmp(s1, s2) + +#endif /* not DOSish */ + +#ifdef WIN32 +# define NATIVE_WIN32 1 +# ifndef __MINGW32__ +# define PATH_MAX _MAX_PATH +# endif +#endif + +#ifdef HAVE_CONFIG_H +# include "config.h" +#elif defined(_WIN32) && !defined(__MINGW32__) +# include "sdcc_vc.h" +#else +# include "sdccconf.h" +#endif + +#include "SDCCerr.h" + +#define SPACE ' ' +#define ZERO 0 + +#include /* PATH_MAX */ +#if !defined(PATH_MAX) || (PATH_MAX < 2048) +# undef PATH_MAX +# define PATH_MAX 2048 /* define a reasonable value */ +#endif + +#define MAX_REG_PARMS 1 +typedef int bool; + +#ifndef max +# define max(a,b) (a > b ? a : b) +#endif + +#ifndef min +# define min(a,b) (a < b ? a : b) +#endif + +#ifndef THROWS +#define THROWS +#define THROW_NONE 0 +#define THROW_SRC 1 +#define THROW_DEST 2 +#define THROW_BOTH 3 +#endif + +/* size's in bytes */ +#define CHARSIZE port->s.char_size +#define SHORTSIZE port->s.short_size +#define INTSIZE port->s.int_size +#define LONGSIZE port->s.long_size +#define PTRSIZE port->s.ptr_size +#define FPTRSIZE port->s.fptr_size +#define GPTRSIZE port->s.gptr_size +#define BITSIZE port->s.bit_size +#define FLOATSIZE port->s.float_size +#define MAXBASESIZE port->s.max_base_size + +#define SMALL_MODEL 0 +#define LARGE_MODEL 1 +#define TRUE 1 +#define FALSE 0 + +#define MAX_TVAR 6 +#define INITIAL_INLINEASM 4*1024 +#define DEFPOOLSTACK(type,size) \ + type *type##Pool ; \ + type *type##FreeStack [size] ; \ + int type##StackPtr = 0 ; + +#define PUSH(x,y) x##FreeStack[x##StackPtr++] = y +#define PEEK(x) x##FreeStack[x##StackPtr-1] +#define POP(type) type##FreeStack[--type##StackPtr] +/* #define POP(x) (x##StackPtr ? x##FreeStack[--x##StackPtr] : \ + (assert(x##StackPtr),0)) */ +#ifdef UNIX +#define EMPTY(x) (x##StackPtr <= 1 ? 1 : 0) +#else +#define EMPTY(x) (x##StackPtr == 0 ? 1 : 0) +#endif + + +#define COPYTYPE(start,end,from) (end = getSpec (start = from)) + + +/* general purpose stack related macros */ +#define STACK_DCL(stack,type,size) \ + typedef type t_##stack ; \ + t_##stack stack[size] ; \ + t_##stack (*p_##stack) = stack; + +/* define extern stack */ +#define EXTERN_STACK_DCL(stack,type,size) \ + typedef type t_##stack ; \ + extern t_##stack stack[size] ; \ + extern t_##stack *p_##stack; + +#define STACK_EMPTY(stack) ((p_##stack) <= stack ) +#define STACK_FULL(stack) ((p_##stack) >= (stack + \ + sizeof(stack)/sizeof(*stack)) ) + +#define STACK_PUSH_(stack, x) (*++p_##stack = (x)) +#define STACK_POP_(stack) (*p_##stack--) + +#define STACK_PUSH(stack, x) (STACK_FULL(stack) \ + ? (STACK_ERR(1, stack), *p_##stack) \ + : STACK_PUSH_(stack,x) ) + +#define STACK_POP(stack) (STACK_EMPTY(stack) \ + ? (STACK_ERR(-1, stack), *p_##stack) \ + : STACK_POP_(stack) ) + +#define STACK_PEEK(stack) (STACK_EMPTY(stack) \ + ? (STACK_ERR(0, stack), *p_##stack) \ + : *p_##stack ) + +#define STACK_ERR(o, stack) (fatal(1, E_STACK_VIOLATION, #stack, \ + (o < 0) \ + ? "underflow" \ + : (o > 0) \ + ? "overflow" \ + : "empty")) + +/* optimization options */ +/* + * cloneOptimize function in SDCC.lex should be updated every time + * a new set is added to the optimize structure! + */ +struct optimize + { + int global_cse; + int ptrArithmetic; + int label1; + int label2; + int label3; + int label4; + int loopInvariant; + int loopInduction; + int noJTabBoundary; + int noLoopReverse; + int codeSpeed; + int codeSize; + }; + +/** Build model. + Used in options.model.A bit each as port.supported_models is an OR + of these. +*/ +enum + { + MODEL_SMALL = 1, + MODEL_COMPACT = 2, + MODEL_MEDIUM = 4, + MODEL_LARGE = 8, + MODEL_FLAT24 = 16, + MODEL_PAGE0 = 32, /* for the xa51 port */ + MODEL_HUGE = 64 /* for banked support */ + }; + +/* overlay segment name and the functions + that belong to it. used by pragma overlay */ +typedef struct { + char *osname; /* overlay segment name */ + int nfuncs; /* number of functions in this overlay */ + char *funcs[128]; /* function name that belong to this */ +} olay; + +/* other command line options */ +/* + * cloneOptions function in SDCC.lex should be updated every time + * a new set is added to the options structure! + */ +struct options + { + int model; /* see MODEL_* defines above */ + int stackAuto; /* Stack Automatic */ + int useXstack; /* use Xternal Stack */ + int stack10bit; /* use 10 bit stack (flat24 model only) */ + int dump_raw; /* dump after intermediate code generation */ + int dump_gcse; /* dump after gcse */ + int dump_loop; /* dump after loop optimizations */ + int dump_kill; /* dump after dead code elimination */ + int dump_range; /* dump after live range analysis */ + int dump_pack; /* dump after register packing */ + int dump_rassgn; /* dump after register assignment */ + int dump_tree; /* dump front-end tree before lowering to iCode */ + int cc_only; /* compile only flag */ + int intlong_rent; /* integer & long support routines reentrant */ + int float_rent; /* floating point routines are reentrant */ + int out_fmt; /* 1 = motorola S19 format 0 = intel Hex format */ + int cyclomatic; /* print cyclomatic information */ + int noOverlay; /* don't overlay local variables & parameters */ + int mainreturn; /* issue a return after main */ + int xram_movc; /* use movc instead of movx to read xram (mcs51) */ + int nopeep; /* no peep hole optimization */ + int asmpeep; /* pass inline assembler thru peep hole */ + int debug; /* generate extra debug info */ + int c1mode; /* Act like c1 - no pre-proc, asm or link */ + char *peep_file; /* additional rules for peep hole */ + int nostdlib; /* Don't use standard lib files */ + int nostdinc; /* Don't use standard include files */ + int noRegParams; /* Disable passing some parameters in registers */ + int verbose; /* Show what the compiler is doing */ + int shortis8bits; /* treat short like int or char */ + int lessPedantic; /* disable some warnings */ + int profile; /* Turn on extra profiling information */ + int ommitFramePtr; /* Turn off the frame pointer. */ + int useAccelerator; /* use ds390 Arithmetic Accelerator */ + int noiv; /* do not generate irq vector table entries */ + int all_callee_saves; /* callee saves for all functions */ + int stack_probe; /* insert call to function __stack_probe */ + int tini_libid; /* library ID for TINI */ + int protect_sp_update; /* DS390 - will disable interrupts during ESP:SP updates */ + int parms_in_bank1; /* DS390 - use reg bank1 to pass parameters */ + int stack_size; /* MCS51/DS390 - Tells the linker to allocate this space for stack */ + int no_pack_iram; /* MCS51/DS390 - Tells the linker not to pack variables in internal ram */ + int acall_ajmp; /* MCS51 - Use acall/ajmp instead of lcall/ljmp */ + /* starting address of the segments */ + int xstack_loc; /* initial location of external stack */ + int stack_loc; /* initial value of internal stack pointer */ + int xdata_loc; /* xternal ram starts at address */ + int data_loc; /* interram start location */ + int idata_loc; /* indirect address space */ + int code_loc; /* code location start */ + int iram_size; /* internal ram size (used only for error checking) */ + int xram_size; /* external ram size (used only for error checking) */ + bool xram_size_set; /* since xram_size=0 is a possibility */ + int code_size; /* code size (used only for error checking) */ + int verboseExec; /* show what we are doing */ + int noXinitOpt; /* don't optimize initialized xdata */ + int noCcodeInAsm; /* hide c-code from asm */ + int iCodeInAsm; /* show i-code in asm */ + int noPeepComments; /* hide peephole optimizer comments */ + int verboseAsm; /* include comments generated with gen.c */ + int printSearchDirs; /* display the directories in the compiler's search path */ + int vc_err_style; /* errors and warnings are compatible with Micro$oft visual studio */ + int use_stdout; /* send errors to stdout instead of stderr */ + int no_std_crt0; /* for the z80/gbz80 do not link default crt0.o*/ + int std_c99; /* enable C99 keywords/constructs */ + int std_sdcc; /* enable SDCC extensions to C */ + int dollars_in_ident; /* zero means dollar signs are punctuation */ + int unsigned_char; /* use unsigned for char without signed/unsigned modifier */ + char *code_seg; /* segment name to use instead of CSEG */ + char *const_seg; /* segment name to use instead of CONST */ + /* sets */ + set *calleeSavesSet; /* list of functions using callee save */ + set *excludeRegsSet; /* registers excluded from saving */ +/* set *olaysSet; * not implemented yet: overlay segments used in #pragma OVERLAY */ + }; + +/* forward definition for variables accessed globally */ +extern int noAssemble; /* no assembly, stop after code generation */ +extern char *yytext; +extern char *lexFilename; /* lex idea of current file name */ +extern int lexLineno; /* lex idea of line number of the current file */ +extern char *fullSrcFileName; /* full name for the source file; */ + /* can be NULL while linking without compiling */ +extern char *fullDstFileName; /* full name for the output file; */ + /* only given by -o, otherwise NULL */ +extern char *dstFileName; /* destination file name without extension */ +extern char *dstPath; /* path for the output files; */ + /* "" is equivalent with cwd */ +extern char *moduleName; /* module name is source file without path and extension */ + /* can be NULL while linking without compiling */ +extern int seqPointNo; /* current sequence point */ +extern FILE *yyin; /* */ +extern FILE *asmFile; /* assembly output file */ +extern FILE *cdbFile; /* debugger symbol file */ +extern int NestLevel; /* NestLevel SDCC.y */ +extern int stackPtr; /* stack pointer SDCC.y */ +extern int xstackPtr; /* external stack pointer SDCC.y */ +extern int reentrant; /* /X flag has been sent SDCC.y */ +extern char buffer[PATH_MAX * 2];/* general buffer SDCCmain.c */ +extern int currRegBank; /* register bank being used SDCCgens.c */ +extern int RegBankUsed[4]; /* JCF: register banks used SDCCmain.c */ +extern int BitBankUsed; /* MB: overlayable bit bank SDCCmain.c */ +extern struct symbol *currFunc; /* current function SDCCgens.c */ +extern int cNestLevel; /* block nest level SDCCval.c */ +extern int blockNo; /* maximum sequential block number */ +extern int currBlockno; /* sequential block number */ +extern struct optimize optimize; +extern struct options options; +extern unsigned maxInterrupts; +extern int ignoreTypedefType; + +/* Visible from SDCCmain.c */ +extern set *preArgvSet; +extern set *relFilesSet; +extern set *libFilesSet; +extern set *libPathsSet; +extern set *libDirsSet; /* list of lib search directories */ + +void setParseWithComma (set **, const char *); + +/** An assert() macro that will go out through sdcc's error + system. +*/ +#define wassertl(a,s) ((a) ? 0 : \ + (werror (E_INTERNAL_ERROR,__FILE__,__LINE__, s), 0)) + +#define wassert(a) wassertl(a,"code generator internal error") + +#define DUMP_RAW0 1 +#define DUMP_RAW1 DUMP_RAW0+1 +#define DUMP_CSE DUMP_RAW1+1 +#define DUMP_DFLOW DUMP_CSE+1 +#define DUMP_GCSE DUMP_DFLOW+1 +#define DUMP_DEADCODE DUMP_GCSE+1 +#define DUMP_LOOP DUMP_DEADCODE+1 +#define DUMP_LOOPG DUMP_LOOP+1 +#define DUMP_LOOPD DUMP_LOOPG+1 +#define DUMP_RANGE DUMP_LOOPD+1 +#define DUMP_PACK DUMP_RANGE+1 +#define DUMP_RASSGN DUMP_PACK+1 +#define DUMP_LRANGE DUMP_RASSGN+1 + +struct _dumpFiles { + int id; + char *ext; + FILE *filePtr; +}; + +extern struct _dumpFiles dumpFiles[]; + +/* Buffer which can be used to hold a file name; assume it will + * be trashed by any function call within SDCC. + */ +extern char scratchFileName[PATH_MAX]; + +/* Define well known filenos if the system does not define them. */ +#ifndef STDIN_FILENO +# define STDIN_FILENO 0 +#endif +#ifndef STDOUT_FILENO +# define STDOUT_FILENO 1 +#endif +#ifndef STDERR_FILENO +# define STDERR_FILENO 2 +#endif + +#endif diff --git a/src/SDCCglue.c b/src/SDCCglue.c new file mode 100644 index 0000000..f753441 --- /dev/null +++ b/src/SDCCglue.c @@ -0,0 +1,1930 @@ +/*------------------------------------------------------------------------- + + SDCCglue.c - glues everything we have done together into one file. + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" +#include +#include "newalloc.h" +#include +#include +#include "dbuf_string.h" + +#ifdef _WIN32 +#include +#else +#include +#endif + +symbol *interrupts[INTNO_MAX+1]; + +void printIval (symbol *, sym_link *, initList *, struct dbuf_s *, bool check); +set *publics = NULL; /* public variables */ +set *externs = NULL; /* Variables that are declared as extern */ + +unsigned maxInterrupts = 0; +int allocInfo = 1; +symbol *mainf; +int noInit = 0; /* no initialization */ + + +char * +aopLiteralLong (value * val, int offset, int size) +{ + union { + float f; + unsigned char c[4]; + } + fl; + + if (!val) { + // assuming we have been warned before + val = constCharVal (0); + } + + /* if it is a float then it gets tricky */ + /* otherwise it is fairly simple */ + if (!IS_FLOAT (val->type)) { + unsigned long v = ulFromVal (val); + + v >>= (offset * 8); + switch (size) { + case 1: + tsprintf (buffer, sizeof(buffer), + "!immedbyte", (unsigned int) v & 0xff); + break; + case 2: + tsprintf (buffer, sizeof(buffer), + "!immedword", (unsigned int) v & 0xffff); + break; + default: + /* Hmm. Too big for now. */ + assert (0); + } + return Safe_strdup (buffer); + } + + /* PENDING: For now size must be 1 */ + assert (size == 1); + + /* it is type float */ + fl.f = (float) floatFromVal (val); +#ifdef WORDS_BIGENDIAN + tsprintf (buffer, sizeof(buffer), + "!immedbyte", fl.c[3 - offset]); +#else + tsprintf (buffer, sizeof(buffer), + "!immedbyte", fl.c[offset]); +#endif + return Safe_strdup (buffer); +} + +/*-----------------------------------------------------------------*/ +/* aopLiteral - string from a literal value */ +/*-----------------------------------------------------------------*/ +char * +aopLiteral (value * val, int offset) +{ + return aopLiteralLong (val, offset, 1); +} + +/*-----------------------------------------------------------------*/ +/* emitRegularMap - emit code for maps with no special cases */ +/*-----------------------------------------------------------------*/ +static void +emitRegularMap (memmap * map, bool addPublics, bool arFlag) +{ + symbol *sym; + ast *ival = NULL; + + if (!map) + return; + + if (addPublics) + { + /* PENDING: special case here - should remove */ + if (!strcmp (map->sname, CODE_NAME)) + dbuf_tprintf (&map->oBuf, "\t!areacode\n", map->sname); + else if (!strcmp (map->sname, DATA_NAME)) + dbuf_tprintf (&map->oBuf, "\t!areadata\n", map->sname); + else if (!strcmp (map->sname, HOME_NAME)) + dbuf_tprintf (&map->oBuf, "\t!areahome\n", map->sname); + else + dbuf_tprintf (&map->oBuf, "\t!area\n", map->sname); + } + + for (sym = setFirstItem (map->syms); sym; sym = setNextItem (map->syms)) + { + symbol *newSym = NULL; + + /* if extern then add it into the extern list */ + if (IS_EXTERN (sym->etype)) + { + addSetHead (&externs, sym); + continue; + } + + /* if allocation required check is needed + then check if the symbol really requires + allocation only for local variables */ + + if (arFlag && !IS_AGGREGATE (sym->type) && + !(sym->_isparm && !IS_REGPARM (sym->etype)) && + !sym->allocreq && sym->level) + continue; + + /* for bitvar locals and parameters */ + if (!arFlag && !sym->allocreq && sym->level + && !SPEC_ABSA (sym->etype)) + { + continue; + } + + /* if global variable & not static or extern + and addPublics allowed then add it to the public set */ + if ((sym->level == 0 || + (sym->_isparm && !IS_REGPARM (sym->etype))) && + addPublics && + !IS_STATIC (sym->etype) && + (IS_FUNC (sym->type) ? (sym->used || IFFUNC_HASBODY (sym->type)) : 1)) + { + addSetHead (&publics, sym); + } + + /* if extern then do nothing or is a function + then do nothing */ + if (IS_FUNC (sym->type) && !(sym->isitmp)) + continue; + + /* print extra debug info if required */ + if (options.debug) + { + if (!sym->level) /* global */ + { + if (IS_STATIC (sym->etype)) + dbuf_printf (&map->oBuf, "F%s$", moduleName); /* scope is file */ + else + dbuf_printf (&map->oBuf, "G$"); /* scope is global */ + } + else + { + /* symbol is local */ + dbuf_printf (&map->oBuf, "L%s$", (sym->localof ? sym->localof->name : "-null-")); + } + dbuf_printf (&map->oBuf, "%s$%d$%d", sym->name, sym->level, sym->block); + } + + /* if it has an initial value then do it only if + it is a global variable */ + if (sym->ival && sym->level == 0) + { + if ((SPEC_OCLS (sym->etype) == xidata) && !SPEC_ABSA (sym->etype)) + { + /* create a new "XINIT (CODE)" symbol, that will be emitted later + in the static seg */ + newSym=copySymbol (sym); + SPEC_OCLS(newSym->etype)=xinit; + SNPRINTF (newSym->name, sizeof(newSym->name), "__xinit_%s", sym->name); + SNPRINTF (newSym->rname, sizeof(newSym->rname), "__xinit_%s", sym->rname); + if (IS_SPEC (newSym->type)) + SPEC_CONST (newSym->type) = 1; + else + DCL_PTR_CONST (newSym->type) = 1; + SPEC_STAT(newSym->etype)=1; + resolveIvalSym(newSym->ival, newSym->type); + + // add it to the "XINIT (CODE)" segment + addSet(&xinit->syms, newSym); + + if (!SPEC_ABSA (sym->etype)) + { + struct dbuf_s tmpBuf; + + dbuf_init(&tmpBuf, 4096); + // before allocation we must parse the sym->ival tree + // but without actually generating initialization code + ++noAlloc; + resolveIvalSym (sym->ival, sym->type); + ++noInit; + printIval (sym, sym->type, sym->ival, &tmpBuf, TRUE); + --noInit; + --noAlloc; + dbuf_destroy(&tmpBuf); + } + } + else + { + if (IS_AGGREGATE (sym->type)) + { + ival = initAggregates (sym, sym->ival, NULL); + } + else + { + if (getNelements (sym->type, sym->ival)>1) + { + werrorfl (sym->fileDef, sym->lineDef, W_EXCESS_INITIALIZERS, "scalar", sym->name); + } + ival = newNode ('=', newAst_VALUE (symbolVal (sym)), + decorateType (resolveSymbols (list2expr (sym->ival)), RESULT_TYPE_NONE)); + } + codeOutBuf = &statsg->oBuf; + + if (ival) + { + // set ival's lineno to where the symbol was defined + setAstFileLine (ival, filename = sym->fileDef, lineno = sym->lineDef); + // check if this is not a constant expression + if (!constExprTree (ival)) + { + werror (E_CONST_EXPECTED, "found expression"); + // but try to do it anyway + } + allocInfo = 0; + if (!astErrors (ival)) + eBBlockFromiCode (iCodeFromAst (ival)); + allocInfo = 1; + } + } + } + + /* if it has an absolute address then generate + an equate for this no need to allocate space */ + if (SPEC_ABSA (sym->etype) && !sym->ival) + { + char *equ = "="; + if (options.debug) { + dbuf_printf (&map->oBuf, " == 0x%04x\n", SPEC_ADDR (sym->etype)); + } + if (TARGET_IS_XA51) + { + if (map == sfr) + { + equ = "sfr"; + } + else if (map == bit || map == sfrbit) + { + equ="bit"; + } + } + dbuf_printf (&map->oBuf, "%s\t%s\t0x%04x\n", sym->rname, equ, SPEC_ADDR (sym->etype)); + } + else + { + int size = getSize (sym->type) + sym->flexArrayLength; + if (size == 0) + { + werrorfl (sym->fileDef, sym->lineDef, E_UNKNOWN_SIZE, sym->name); + } + /* allocate space */ + if (options.debug) + { + dbuf_printf (&map->oBuf, "==.\n"); + } + if (SPEC_ABSA (sym->etype)) + { + dbuf_tprintf (&map->oBuf, "\t!org\n", SPEC_ADDR (sym->etype)); + } + if (IS_STATIC (sym->etype) || sym->level) + dbuf_tprintf (&map->oBuf, "!slabeldef\n", sym->rname); + else + dbuf_tprintf (&map->oBuf, "!labeldef\n", sym->rname); + dbuf_tprintf (&map->oBuf, "\t!ds\n", (unsigned int) size & 0xffff); + } + sym->ival = NULL; + } +} + +/*-----------------------------------------------------------------*/ +/* initPointer - pointer initialization code massaging */ +/*-----------------------------------------------------------------*/ +value * +initPointer (initList * ilist, sym_link *toType) +{ + value *val; + ast *expr; + + if (!ilist) { + return valCastLiteral(toType, 0.0); + } + + expr = list2expr (ilist); + + if (!expr) + goto wrong; + + /* try it the old way first */ + if ((val = constExprValue (expr, FALSE))) + return val; + + /* ( ptr + constant ) */ + if (IS_AST_OP (expr) && + (expr->opval.op == '+' || expr->opval.op == '-') && + IS_AST_SYM_VALUE (expr->left) && + (IS_ARRAY(expr->left->ftype) || IS_PTR(expr->left->ftype)) && + compareType(toType, expr->left->ftype) && + IS_AST_LIT_VALUE (expr->right)) { + return valForCastAggr (expr->left, expr->left->ftype, + expr->right, + expr->opval.op); + } + + /* (char *)&a */ + if (IS_AST_OP(expr) && expr->opval.op==CAST && + IS_AST_OP(expr->right) && expr->right->opval.op=='&') { + if (compareType(toType, expr->left->ftype)!=1) { + werror (W_INIT_WRONG); + printFromToType(expr->left->ftype, toType); + } + // skip the cast ??? + expr=expr->right; + } + + /* no then we have to do these cludgy checks */ + /* pointers can be initialized with address of + a variable or address of an array element */ + if (IS_AST_OP (expr) && expr->opval.op == '&') { + /* address of symbol */ + if (IS_AST_SYM_VALUE (expr->left)) { + val = AST_VALUE (expr->left); + val->type = newLink (DECLARATOR); + if (SPEC_SCLS (expr->left->etype) == S_CODE) { + DCL_TYPE (val->type) = CPOINTER; + DCL_PTR_CONST (val->type) = port->mem.code_ro; + } + else if (SPEC_SCLS (expr->left->etype) == S_PDATA) + DCL_TYPE (val->type) = PPOINTER; + else if (SPEC_SCLS (expr->left->etype) == S_XDATA) + DCL_TYPE (val->type) = FPOINTER; + else if (SPEC_SCLS (expr->left->etype) == S_XSTACK) + DCL_TYPE (val->type) = PPOINTER; + else if (SPEC_SCLS (expr->left->etype) == S_IDATA) + DCL_TYPE (val->type) = IPOINTER; + else if (SPEC_SCLS (expr->left->etype) == S_EEPROM) + DCL_TYPE (val->type) = EEPPOINTER; + else + DCL_TYPE (val->type) = POINTER; + val->type->next = expr->left->ftype; + val->etype = getSpec (val->type); + return val; + } + + /* if address of indexed array */ + if (IS_AST_OP (expr->left) && expr->left->opval.op == '[') + return valForArray (expr->left); + + /* if address of structure element then + case 1. a.b ; */ + if (IS_AST_OP (expr->left) && + expr->left->opval.op == '.') { + return valForStructElem (expr->left->left, + expr->left->right); + } + + /* case 2. (&a)->b ; + (&some_struct)->element */ + if (IS_AST_OP (expr->left) && + expr->left->opval.op == PTR_OP && + IS_ADDRESS_OF_OP (expr->left->left)) { + return valForStructElem (expr->left->left->left, + expr->left->right); + } + } + /* case 3. (((char *) &a) +/- constant) */ + if (IS_AST_OP (expr) && + (expr->opval.op == '+' || expr->opval.op == '-') && + IS_AST_OP (expr->left) && expr->left->opval.op == CAST && + IS_AST_OP (expr->left->right) && + expr->left->right->opval.op == '&' && + IS_AST_LIT_VALUE (expr->right)) { + + return valForCastAggr (expr->left->right->left, + expr->left->left->opval.lnk, + expr->right, expr->opval.op); + + } + /* case 4. (char *)(array type) */ + if (IS_CAST_OP(expr) && IS_AST_SYM_VALUE (expr->right) && + IS_ARRAY(expr->right->ftype)) { + + val = copyValue (AST_VALUE (expr->right)); + val->type = newLink (DECLARATOR); + if (SPEC_SCLS (expr->right->etype) == S_CODE) { + DCL_TYPE (val->type) = CPOINTER; + DCL_PTR_CONST (val->type) = port->mem.code_ro; + } + else if (SPEC_SCLS (expr->right->etype) == S_PDATA) + DCL_TYPE (val->type) = PPOINTER; + else if (SPEC_SCLS (expr->right->etype) == S_XDATA) + DCL_TYPE (val->type) = FPOINTER; + else if (SPEC_SCLS (expr->right->etype) == S_XSTACK) + DCL_TYPE (val->type) = PPOINTER; + else if (SPEC_SCLS (expr->right->etype) == S_IDATA) + DCL_TYPE (val->type) = IPOINTER; + else if (SPEC_SCLS (expr->right->etype) == S_EEPROM) + DCL_TYPE (val->type) = EEPPOINTER; + else + DCL_TYPE (val->type) = POINTER; + val->type->next = expr->right->ftype->next; + val->etype = getSpec (val->type); + return val; + } + wrong: + if (expr) + werrorfl (expr->filename, expr->lineno, E_INCOMPAT_PTYPES); + else + werror (E_INCOMPAT_PTYPES); + return NULL; + +} + +/*-----------------------------------------------------------------*/ +/* printChar - formats and prints a characater string with DB */ +/*-----------------------------------------------------------------*/ +void +printChar (struct dbuf_s * oBuf, char *s, int plen) +{ + int i; + int len = plen; + int pplen = 0; + char buf[100]; + char *p = buf; + + while (len && pplen < plen) + { + i = 60; + while (i && pplen < plen) + { + if (*s < ' ' || *s == '\"' || *s=='\\') + { + *p = '\0'; + if (p != buf) + dbuf_tprintf (oBuf, "\t!ascii\n", buf); + dbuf_tprintf (oBuf, "\t!db !constbyte\n", (unsigned char)*s); + p = buf; + } + else + { + *p = *s; + p++; + } + s++; + pplen++; + i--; + } + if (p != buf) + { + *p = '\0'; + dbuf_tprintf (oBuf, "\t!ascii\n", buf); + p = buf; + } + + if (len > 60) + len -= 60; + else + len = 0; + } + while (pplen < plen) + { + dbuf_tprintf (oBuf, "\t!db !constbyte\n", 0); + pplen++; + } +} + +/*-----------------------------------------------------------------*/ +/* return the generic pointer high byte for a given pointer type. */ +/*-----------------------------------------------------------------*/ +int +pointerTypeToGPByte (const int p_type, const char *iname, const char *oname) +{ + switch (p_type) + { + case IPOINTER: + case POINTER: + return GPTYPE_NEAR; + case GPOINTER: + werror (E_CANNOT_USE_GENERIC_POINTER, + iname ? iname : "", + oname ? oname : ""); + exit (1); + case FPOINTER: + return GPTYPE_FAR; + case CPOINTER: + return GPTYPE_CODE; + case PPOINTER: + return GPTYPE_XSTACK; + default: + fprintf (stderr, "*** internal error: unknown pointer type %d in GPByte.\n", + p_type); + break; + } + return -1; +} + + +/*-----------------------------------------------------------------*/ +/* printPointerType - generates ival for pointer type */ +/*-----------------------------------------------------------------*/ +void +_printPointerType (struct dbuf_s * oBuf, const char *name) +{ + if (options.model == MODEL_FLAT24) + { + if (port->little_endian) + dbuf_printf (oBuf, "\t.byte %s,(%s >> 8),(%s >> 16)", name, name, name); + else + dbuf_printf (oBuf, "\t.byte (%s >> 16),(%s >> 8),%s", name, name, name); + } + else + { + if (port->little_endian) + dbuf_printf (oBuf, "\t.byte %s,(%s >> 8)", name, name); + else + dbuf_printf (oBuf, "\t.byte (%s >> 8),%s", name, name); + } +} + +/*-----------------------------------------------------------------*/ +/* printPointerType - generates ival for pointer type */ +/*-----------------------------------------------------------------*/ +void +printPointerType (struct dbuf_s * oBuf, const char *name) +{ + _printPointerType (oBuf, name); + dbuf_printf (oBuf, "\n"); +} + +/*-----------------------------------------------------------------*/ +/* printGPointerType - generates ival for generic pointer type */ +/*-----------------------------------------------------------------*/ +void +printGPointerType (struct dbuf_s * oBuf, const char *iname, const char *oname, + const unsigned int type) +{ + _printPointerType (oBuf, iname); + dbuf_printf (oBuf, ",#0x%02x\n", pointerTypeToGPByte (type, iname, oname)); +} + +/*-----------------------------------------------------------------*/ +/* printIvalType - generates ival for int/char */ +/*-----------------------------------------------------------------*/ +void +printIvalType (symbol *sym, sym_link * type, initList * ilist, struct dbuf_s * oBuf) +{ + value *val; + + /* if initList is deep */ + if (ilist && (ilist->type == INIT_DEEP)) + ilist = ilist->init.deep; + + if (!(val = list2val (ilist))) { + // assuming a warning has been thrown + val = constCharVal (0); + } + + /* check if the literal value is within bounds */ + if (checkConstantRange (type, val->etype, '=', FALSE) == CCR_OVL && + !options.lessPedantic) + { + werror (W_LIT_OVERFLOW); + } + + if (val->type != type) { + val = valCastLiteral(type, floatFromVal(val)); + } + + switch (getSize (type)) { + case 1: + if (!val) + dbuf_tprintf (oBuf, "\t!db !constbyte\n", 0); + else + dbuf_tprintf (oBuf, "\t!dbs\n", + aopLiteral (val, 0)); + break; + + case 2: + if (port->use_dw_for_init) + dbuf_tprintf (oBuf, "\t!dws\n", aopLiteralLong (val, 0, 2)); + else if (port->little_endian) + dbuf_printf (oBuf, "\t.byte %s,%s\n", aopLiteral (val, 0), aopLiteral (val, 1)); + else + dbuf_printf (oBuf, "\t.byte %s,%s\n", aopLiteral (val, 1), aopLiteral (val, 0)); + break; + case 4: + if (!val) { + dbuf_tprintf (oBuf, "\t!dw !constword\n", 0); + dbuf_tprintf (oBuf, "\t!dw !constword\n", 0); + } + else if (port->little_endian) { + dbuf_printf (oBuf, "\t.byte %s,%s,%s,%s\n", + aopLiteral (val, 0), aopLiteral (val, 1), + aopLiteral (val, 2), aopLiteral (val, 3)); + } + else { + dbuf_printf (oBuf, "\t.byte %s,%s,%s,%s\n", + aopLiteral (val, 3), aopLiteral (val, 2), + aopLiteral (val, 1), aopLiteral (val, 0)); + } + break; + } +} + +/*-----------------------------------------------------------------*/ +/* printIvalBitFields - generate initializer for bitfields */ +/*-----------------------------------------------------------------*/ +static void +printIvalBitFields (symbol **sym, initList **ilist, struct dbuf_s * oBuf) +{ + symbol *lsym = *sym; + initList *lilist = *ilist; + unsigned long ival = 0; + int size = 0; + + while (lsym) + { + + if (0 == SPEC_BLEN (lsym->etype)) + { + /* bit-field structure member with a width of 0 */ + lsym = lsym->next; + break; + } + else if (!SPEC_BUNNAMED (lsym->etype)) + { + /* not an unnamed bit-field structure member */ + value *val = list2val (lilist); + int bit_length = SPEC_BLEN (lsym->etype); + + if (size) + { + if (bit_length > 8) + size += (bit_length + 7) / 8; + } + else + size = (bit_length + 7) / 8; + + /* check if the literal value is within bounds */ + if (val && + checkConstantRange (lsym->etype, val->etype, '=', FALSE) == CCR_OVL && + !options.lessPedantic) + { + werror (W_LIT_OVERFLOW); + } + + ival |= (ulFromVal (val) & ((1ul << bit_length) - 1ul)) << SPEC_BSTR (lsym->etype); + lilist = lilist ? lilist->next : NULL; + } + lsym = lsym->next; + } + + switch (size) + { + case 1: + dbuf_tprintf (oBuf, "\t!db !constbyte\n", ival); + break; + + case 2: + dbuf_tprintf (oBuf, "\t!dw !constword\n", ival); + break; + + case 4: + dbuf_tprintf (oBuf, "\t!dw !constword,!constword\n", + (ival >> 16) & 0xffff, (ival & 0xffff)); + break; + } + *sym = lsym; + *ilist = lilist; +} + +/*-----------------------------------------------------------------*/ +/* printIvalStruct - generates initial value for structures */ +/*-----------------------------------------------------------------*/ +static void +printIvalStruct (symbol * sym, sym_link * type, + initList * ilist, struct dbuf_s * oBuf) +{ + symbol *sflds; + initList *iloop = NULL; + + sflds = SPEC_STRUCT (type)->fields; + + if (ilist) + { + if (ilist->type != INIT_DEEP) + { + werrorfl (sym->fileDef, sym->lineDef, E_INIT_STRUCT, sym->name); + return; + } + + iloop = ilist->init.deep; + } + + if (SPEC_STRUCT (type)->type == UNION) + { + printIval (sym, sflds->type, iloop, oBuf, 1); + iloop = iloop ? iloop->next : NULL; + } + else + { + while (sflds) + { + if (IS_BITFIELD (sflds->type)) + printIvalBitFields(&sflds, &iloop, oBuf); + else + { + printIval (sym, sflds->type, iloop, oBuf, 1); + sflds = sflds->next; + iloop = iloop ? iloop->next : NULL; + } + } + } + + if (iloop) + werrorfl (sym->fileDef, sym->lineDef, W_EXCESS_INITIALIZERS, "struct", sym->name); +} + +/*-----------------------------------------------------------------*/ +/* printIvalChar - generates initital value for character array */ +/*-----------------------------------------------------------------*/ +int +printIvalChar (symbol * sym, sym_link * type, initList * ilist, struct dbuf_s * oBuf, char *s, bool check) +{ + value *val; + unsigned int size = DCL_ELEM (type); + + if (!s) + { + val = list2val (ilist); + /* if the value is a character string */ + if (IS_ARRAY (val->type) && IS_CHAR (val->etype)) + { + if (!size) + { + /* we have not been given a size, but now we know it */ + size = strlen (SPEC_CVAL (val->etype).v_char) + 1; + /* but first check, if it's a flexible array */ + if (sym && IS_STRUCT (sym->type)) + sym->flexArrayLength = size; + else + DCL_ELEM (type) = size; + } + + if (check && DCL_ELEM (val->type) > size) + werror (W_EXCESS_INITIALIZERS, "array of chars", sym->name, sym->lineDef); + + printChar (oBuf, SPEC_CVAL (val->etype).v_char, size); + + return 1; + } + else + return 0; + } + else + printChar (oBuf, s, strlen (s) + 1); + return 1; +} + +/*-----------------------------------------------------------------*/ +/* printIvalArray - generates code for array initialization */ +/*-----------------------------------------------------------------*/ +void +printIvalArray (symbol * sym, sym_link * type, initList * ilist, + struct dbuf_s * oBuf, bool check) +{ + value *val; + initList *iloop; + unsigned int size = 0; + + if (ilist) { + /* take care of the special case */ + /* array of characters can be init */ + /* by a string */ + if (IS_CHAR (type->next)) { + val = list2val(ilist); + if (!val) { + werrorfl (ilist->filename, ilist->lineno, E_INIT_STRUCT, sym->name); + return; + } + if (!IS_LITERAL(val->etype)) { + werrorfl (ilist->filename, ilist->lineno, E_CONST_EXPECTED); + return; + } + if (printIvalChar (sym, type, + (ilist->type == INIT_DEEP ? ilist->init.deep : ilist), + oBuf, SPEC_CVAL (sym->etype).v_char, check)) + return; + } + /* not the special case */ + if (ilist->type != INIT_DEEP) { + werrorfl (ilist->filename, ilist->lineno, E_INIT_STRUCT, sym->name); + return; + } + + for (iloop=ilist->init.deep; iloop; iloop=iloop->next) { + if ((++size > DCL_ELEM(type)) && DCL_ELEM(type)) { + werrorfl (sym->fileDef, sym->lineDef, W_EXCESS_INITIALIZERS, "array", sym->name); + break; + } + printIval (sym, type->next, iloop, oBuf, TRUE); + } + } + + if (DCL_ELEM(type)) { + // pad with zeros if needed + if (sizenext); + while (size--) { + dbuf_tprintf (oBuf, "\t!db !constbyte\n", 0); + } + } + } else { + /* we have not been given a size, but now we know it */ + /* but first check, if it's a flexible array */ + if (IS_STRUCT (sym->type)) + sym->flexArrayLength = size * getSize (type->next); + else + DCL_ELEM (type) = size; + } + + return; +} + +/*-----------------------------------------------------------------*/ +/* printIvalFuncPtr - generate initial value for function pointers */ +/*-----------------------------------------------------------------*/ +void +printIvalFuncPtr (sym_link * type, initList * ilist, struct dbuf_s * oBuf) +{ + value *val; + int dLvl = 0; + + if (ilist) + val = list2val (ilist); + else + val = valCastLiteral(type, 0.0); + + if (!val) { + // an error has been thrown already + val = constCharVal (0); + } + + if (IS_LITERAL(val->etype)) { + if (compareType(type, val->etype) == 0) { + werrorfl (ilist->filename, ilist->lineno, E_INCOMPAT_TYPES); + printFromToType (val->type, type); + } + printIvalCharPtr (NULL, type, val, oBuf); + return; + } + + /* check the types */ + if ((dLvl = compareType (val->type, type->next)) <= 0) + { + dbuf_tprintf (oBuf, "\t!dw !constword\n", 0); + return; + } + + /* now generate the name */ + if (!val->sym) + { + if (port->use_dw_for_init) + { + dbuf_tprintf (oBuf, "\t!dws\n", val->name); + } + else + { + printPointerType (oBuf, val->name); + } + } + else if (port->use_dw_for_init) + { + dbuf_tprintf (oBuf, "\t!dws\n", val->sym->rname); + } + else + { + printPointerType (oBuf, val->sym->rname); + } + + return; +} + +/*-----------------------------------------------------------------*/ +/* printIvalCharPtr - generates initial values for character pointers */ +/*-----------------------------------------------------------------*/ +int +printIvalCharPtr (symbol * sym, sym_link * type, value * val, struct dbuf_s * oBuf) +{ + int size = 0; + + /* PENDING: this is _very_ mcs51 specific, including a magic + number... + It's also endian specific. + */ + size = getSize (type); + + if (val->name && strlen (val->name)) + { + if (size == 1) /* This appears to be Z80 specific?? */ + { + dbuf_tprintf (oBuf, + "\t!dbs\n", val->name); + } + else if (size == FPTRSIZE) + { + if (port->use_dw_for_init) + { + dbuf_tprintf (oBuf, "\t!dws\n", val->name); + } + else + { + printPointerType (oBuf, val->name); + } + } + else if (size == GPTRSIZE) + { + int type; + if (IS_PTR (val->type)) { + type = DCL_TYPE (val->type); + } else { + type = PTR_TYPE (SPEC_OCLS (val->etype)); + } + if (val->sym && val->sym->isstrlit) { + // this is a literal string + type=CPOINTER; + } + printGPointerType (oBuf, val->name, sym->name, type); + } + else + { + fprintf (stderr, "*** internal error: unknown size in " + "printIvalCharPtr.\n"); + } + } + else + { + // these are literals assigned to pointers + switch (size) + { + case 1: + dbuf_tprintf (oBuf, "\t!dbs\n", aopLiteral (val, 0)); + break; + case 2: + if (port->use_dw_for_init) + dbuf_tprintf (oBuf, "\t!dws\n", aopLiteralLong (val, 0, size)); + else if (port->little_endian) + dbuf_tprintf (oBuf, "\t.byte %s,%s\n", + aopLiteral (val, 0), aopLiteral (val, 1)); + else + dbuf_tprintf (oBuf, "\t.byte %s,%s\n", + aopLiteral (val, 1), aopLiteral (val, 0)); + break; + case 3: + if (IS_GENPTR(type) && floatFromVal(val)!=0) { + // non-zero mcs51 generic pointer + werrorfl (sym->fileDef, sym->lineDef, E_LITERAL_GENERIC); + } + if (port->little_endian) { + dbuf_printf (oBuf, "\t.byte %s,%s,%s\n", + aopLiteral (val, 0), + aopLiteral (val, 1), + aopLiteral (val, 2)); + } else { + dbuf_printf (oBuf, "\t.byte %s,%s,%s\n", + aopLiteral (val, 2), + aopLiteral (val, 1), + aopLiteral (val, 0)); + } + break; + case 4: + if (IS_GENPTR(type) && floatFromVal(val)!=0) { + // non-zero ds390 generic pointer + werrorfl (sym->fileDef, sym->lineDef, E_LITERAL_GENERIC); + } + if (port->little_endian) { + dbuf_printf (oBuf, "\t.byte %s,%s,%s,%s\n", + aopLiteral (val, 0), + aopLiteral (val, 1), + aopLiteral (val, 2), + aopLiteral (val, 3)); + } else { + dbuf_printf (oBuf, "\t.byte %s,%s,%s,%s\n", + aopLiteral (val, 3), + aopLiteral (val, 2), + aopLiteral (val, 1), + aopLiteral (val, 0)); + } + break; + default: + assert (0); + } + } + + if (!noInit && val->sym && val->sym->isstrlit && !isinSet(statsg->syms, val->sym)) { + addSet (&statsg->syms, val->sym); + } + + return 1; +} + +/*-----------------------------------------------------------------*/ +/* printIvalPtr - generates initial value for pointers */ +/*-----------------------------------------------------------------*/ +void +printIvalPtr (symbol * sym, sym_link * type, initList * ilist, struct dbuf_s * oBuf) +{ + value *val; + int size; + + /* if deep then */ + if (ilist && (ilist->type == INIT_DEEP)) + ilist = ilist->init.deep; + + /* function pointer */ + if (IS_FUNC (type->next)) + { + printIvalFuncPtr (type, ilist, oBuf); + return; + } + + if (!(val = initPointer (ilist, type))) + return; + + /* if character pointer */ + if (IS_CHAR (type->next)) + if (printIvalCharPtr (sym, type, val, oBuf)) + return; + + /* check the type */ + if (compareType (type, val->type) == 0) { + werrorfl (ilist->filename, ilist->lineno, W_INIT_WRONG); + printFromToType (val->type, type); + } + + /* if val is literal */ + if (IS_LITERAL (val->etype)) + { + switch (getSize (type)) + { + case 1: + dbuf_tprintf (oBuf, "\t!db !constbyte\n", (unsigned int) ulFromVal (val) & 0xff); + break; + case 2: + if (port->use_dw_for_init) + dbuf_tprintf (oBuf, "\t!dws\n", aopLiteralLong (val, 0, 2)); + else if (port->little_endian) + dbuf_tprintf (oBuf, "\t.byte %s,%s\n", aopLiteral (val, 0), aopLiteral (val, 1)); + else + dbuf_tprintf (oBuf, "\t.byte %s,%s\n", aopLiteral (val, 1), aopLiteral (val, 0)); + break; + case 3: // how about '390?? + dbuf_printf (oBuf, "; generic printIvalPtr\n"); + if (port->little_endian) + { + dbuf_printf (oBuf, "\t.byte %s,%s", + aopLiteral (val, 0), aopLiteral (val, 1)); + } + else + { + dbuf_printf (oBuf, "\t.byte %s,%s", + aopLiteral (val, 1), aopLiteral (val, 0)); + } + if (IS_GENPTR (val->type)) + dbuf_printf (oBuf, ",%s\n", aopLiteral (val, 2)); + else if (IS_PTR (val->type)) + dbuf_printf (oBuf, ",#%x\n", pointerTypeToGPByte (DCL_TYPE (val->type), NULL, NULL)); + else + dbuf_printf (oBuf, ",%s\n", aopLiteral (val, 2)); + } + return; + } + + + size = getSize (type); + + if (size == 1) /* Z80 specific?? */ + { + dbuf_tprintf (oBuf, "\t!dbs\n", val->name); + } + else if (size == FPTRSIZE) + { + if (port->use_dw_for_init) { + dbuf_tprintf (oBuf, "\t!dws\n", val->name); + } else { + printPointerType (oBuf, val->name); + } + } + else if (size == GPTRSIZE) + { + printGPointerType (oBuf, val->name, sym->name, + (IS_PTR (val->type) ? DCL_TYPE (val->type) : + PTR_TYPE (SPEC_OCLS (val->etype)))); + } + return; +} + +/*-----------------------------------------------------------------*/ +/* printIval - generates code for initial value */ +/*-----------------------------------------------------------------*/ +void +printIval (symbol * sym, sym_link * type, initList * ilist, struct dbuf_s * oBuf, bool check) +{ + sym_link *itype; + + /* if structure then */ + if (IS_STRUCT (type)) + { + printIvalStruct (sym, type, ilist, oBuf); + return; + } + + /* if this is an array */ + if (IS_ARRAY (type)) + { + printIvalArray (sym, type, ilist, oBuf, check); + return; + } + + if (ilist) + { + // not an aggregate, ilist must be a node + if (ilist->type!=INIT_NODE) { + // or a 1-element list + if (ilist->init.deep->next) { + werrorfl (sym->fileDef, sym->lineDef, W_EXCESS_INITIALIZERS, "scalar", + sym->name); + } else { + ilist=ilist->init.deep; + } + } + + // and the type must match + itype=ilist->init.node->ftype; + + if (compareType(type, itype)==0) { + // special case for literal strings + if (IS_ARRAY (itype) && IS_CHAR (getSpec(itype)) && + // which are really code pointers + IS_PTR(type) && DCL_TYPE(type)==CPOINTER) { + // no sweat + } else { + werrorfl (ilist->filename, ilist->lineno, E_TYPE_MISMATCH, "assignment", " "); + printFromToType(itype, type); + } + } + } + + /* if this is a pointer */ + if (IS_PTR (type)) + { + printIvalPtr (sym, type, ilist, oBuf); + return; + } + + /* if type is SPECIFIER */ + if (IS_SPEC (type)) + { + printIvalType (sym, type, ilist, oBuf); + return; + } +} + +/*-----------------------------------------------------------------*/ +/* emitStaticSeg - emitcode for the static segment */ +/*-----------------------------------------------------------------*/ +void +emitStaticSeg (memmap * map, struct dbuf_s * oBuf) +{ + symbol *sym; + + /* fprintf(out, "\t.area\t%s\n", map->sname); */ + + /* for all variables in this segment do */ + for (sym = setFirstItem (map->syms); sym; + sym = setNextItem (map->syms)) + { + + /* if it is "extern" then do nothing */ + if (IS_EXTERN (sym->etype)) + continue; + + /* if it is not static add it to the public table */ + if (!IS_STATIC (sym->etype)) + { + addSetHead (&publics, sym); + } + + /* print extra debug info if required */ + if (options.debug) + { + if (!sym->level) + { /* global */ + if (IS_STATIC (sym->etype)) + dbuf_printf (oBuf, "F%s$", moduleName); /* scope is file */ + else + dbuf_printf (oBuf, "G$"); /* scope is global */ + } + else + { + /* symbol is local */ + dbuf_printf (oBuf, "L%s$", + (sym->localof ? sym->localof->name : "-null-")); + } + dbuf_printf (oBuf, "%s$%d$%d", sym->name, sym->level, sym->block); + } + + /* if it has an absolute address and no initializer */ + if (SPEC_ABSA (sym->etype) && !sym->ival) + { + if (options.debug) + dbuf_printf (oBuf, " == 0x%04x\n", SPEC_ADDR (sym->etype)); + + dbuf_printf (oBuf, "%s\t=\t0x%04x\n", + sym->rname, + SPEC_ADDR (sym->etype)); + } + else + { + if (options.debug) + dbuf_printf (oBuf, " == .\n"); + + /* if it has an initial value */ + if (sym->ival) + { + if (SPEC_ABSA (sym->etype)) + { + dbuf_tprintf (oBuf, "\t!org\n", SPEC_ADDR (sym->etype)); + } + dbuf_printf (oBuf, "%s:\n", sym->rname); + ++noAlloc; + resolveIvalSym (sym->ival, sym->type); + printIval (sym, sym->type, sym->ival, oBuf, map != xinit); + --noAlloc; + /* if sym is a simple string and sym->ival is a string, + WE don't need it anymore */ + if (IS_ARRAY(sym->type) && IS_CHAR(sym->type->next) && + IS_AST_SYM_VALUE(list2expr(sym->ival)) && + list2val(sym->ival)->sym->isstrlit) { + freeStringSymbol(list2val(sym->ival)->sym); + } + } + else { + /* allocate space */ + int size = getSize (sym->type); + + if (size==0) { + werrorfl (sym->fileDef, sym->lineDef, E_UNKNOWN_SIZE,sym->name); + } + dbuf_printf (oBuf, "%s:\n", sym->rname); + /* special case for character strings */ + if (IS_ARRAY (sym->type) && IS_CHAR (sym->type->next) && + SPEC_CVAL (sym->etype).v_char) + printChar (oBuf, + SPEC_CVAL (sym->etype).v_char, + size); + else + dbuf_tprintf (oBuf, "\t!ds\n", (unsigned int) size & 0xffff); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* emitMaps - emits the code for the data portion the code */ +/*-----------------------------------------------------------------*/ +void +emitMaps (void) +{ + int publicsfr = TARGET_IS_MCS51; /* Ideally, this should be true for all */ + /* ports but let's be conservative - EEP */ + + inInitMode++; + /* no special considerations for the following + data, idata & bit & xdata */ + emitRegularMap (data, TRUE, TRUE); + emitRegularMap (idata, TRUE, TRUE); + emitRegularMap (d_abs, TRUE, TRUE); + emitRegularMap (i_abs, TRUE, TRUE); + emitRegularMap (bit, TRUE, TRUE); + emitRegularMap (pdata, TRUE, TRUE); + emitRegularMap (xdata, TRUE, TRUE); + emitRegularMap (x_abs, TRUE, TRUE); + if (port->genXINIT) { + emitRegularMap (xidata, TRUE, TRUE); + } + emitRegularMap (sfr, publicsfr, FALSE); + emitRegularMap (sfrbit, publicsfr, FALSE); + emitRegularMap (home, TRUE, FALSE); + emitRegularMap (code, TRUE, FALSE); + + if (options.const_seg) { + dbuf_tprintf (&code->oBuf, "\t!area\n", options.const_seg); + } + emitStaticSeg (statsg, &code->oBuf); + if (port->genXINIT) { + dbuf_tprintf (&code->oBuf, "\t!area\n", xinit->sname); + emitStaticSeg (xinit, &code->oBuf); + } + dbuf_tprintf (&code->oBuf, "\t!area\n", c_abs->sname); + emitStaticSeg (c_abs, &code->oBuf); + inInitMode--; +} + +/*-----------------------------------------------------------------*/ +/* flushStatics - flush all currently defined statics out to file */ +/* and delete. Temporary function */ +/*-----------------------------------------------------------------*/ +void +flushStatics (void) +{ + emitStaticSeg (statsg, codeOutBuf); + statsg->syms = NULL; +} + +/*-----------------------------------------------------------------*/ +/* createInterruptVect - creates the interrupt vector */ +/*-----------------------------------------------------------------*/ +void +createInterruptVect (struct dbuf_s *vBuf) +{ + mainf = newSymbol ("main", 0); + mainf->block = 0; + + /* only if the main function exists */ + if (!(mainf = findSymWithLevel (SymbolTab, mainf))) + { + if (!options.cc_only && !noAssemble && !options.c1mode) + werror (E_NO_MAIN); + return; + } + + /* if the main is only a prototype ie. no body then do nothing */ + if (!IFFUNC_HASBODY(mainf->type)) + { + /* if ! compile only then main function should be present */ + if (!options.cc_only && !noAssemble) + werror (E_NO_MAIN); + return; + } + + dbuf_tprintf (vBuf, "\t!areacode\n", HOME_NAME); + dbuf_printf (vBuf, "__interrupt_vect:\n"); + + + if (!port->genIVT || !(port->genIVT (vBuf, interrupts, maxInterrupts))) + { + /* There's no such thing as a "generic" interrupt table header. */ + wassert(0); + } +} + +char *iComments1 = +{ + ";--------------------------------------------------------\n" + "; File Created by SDCC : free open source ANSI-C Compiler\n"}; + +char *iComments2 = +{ + ";--------------------------------------------------------\n"}; + + +/*-----------------------------------------------------------------*/ +/* initialComments - puts in some initial comments */ +/*-----------------------------------------------------------------*/ +void +initialComments (FILE * afile) +{ + time_t t; + time (&t); + fprintf (afile, "%s", iComments1); + fprintf (afile, "; Version " SDCC_VERSION_STR " #%s (%s) (%s)\n", + getBuildNumber(), getBuildDate(), getBuildEnvironment()); + fprintf (afile, "; This file was generated %s", asctime (localtime (&t))); + fprintf (afile, "%s", iComments2); +} + +/*-----------------------------------------------------------------*/ +/* printPublics - generates .global for publics */ +/*-----------------------------------------------------------------*/ +void +printPublics (FILE * afile) +{ + symbol *sym; + + fprintf (afile, "%s", iComments2); + fprintf (afile, "; Public variables in this module\n"); + fprintf (afile, "%s", iComments2); + + for (sym = setFirstItem (publics); sym; + sym = setNextItem (publics)) + tfprintf (afile, "\t!global\n", sym->rname); +} + +/*-----------------------------------------------------------------*/ +/* printExterns - generates .global for externs */ +/*-----------------------------------------------------------------*/ +void +printExterns (FILE * afile) +{ + symbol *sym; + + fprintf (afile, "%s", iComments2); + fprintf (afile, "; Externals used\n"); + fprintf (afile, "%s", iComments2); + + for (sym = setFirstItem (externs); sym; + sym = setNextItem (externs)) + tfprintf (afile, "\t!extern\n", sym->rname); +} + +/*-----------------------------------------------------------------*/ +/* emitOverlay - will emit code for the overlay stuff */ +/*-----------------------------------------------------------------*/ +static void +emitOverlay (struct dbuf_s * aBuf) +{ + set *ovrset; + + if (!elementsInSet (ovrSetSets)) + dbuf_tprintf (aBuf, "\t!area\n", port->mem.overlay_name); + + /* for each of the sets in the overlay segment do */ + for (ovrset = setFirstItem (ovrSetSets); ovrset; + ovrset = setNextItem (ovrSetSets)) + { + + symbol *sym; + + if (elementsInSet (ovrset)) + { + /* output the area informtion */ + dbuf_printf (aBuf, "\t.area\t%s\n", port->mem.overlay_name); /* MOF */ + } + + for (sym = setFirstItem (ovrset); sym; + sym = setNextItem (ovrset)) + { + /* if extern then it is in the publics table: do nothing */ + if (IS_EXTERN (sym->etype)) + continue; + + /* if allocation required check is needed + then check if the symbol really requires + allocation only for local variables */ + if (!IS_AGGREGATE (sym->type) && + !(sym->_isparm && !IS_REGPARM (sym->etype)) + && !sym->allocreq && sym->level) + continue; + + /* if global variable & not static or extern + and addPublics allowed then add it to the public set */ + if ((sym->_isparm && !IS_REGPARM (sym->etype)) + && !IS_STATIC (sym->etype)) + { + addSetHead (&publics, sym); + } + + /* if extern then do nothing or is a function + then do nothing */ + if (IS_FUNC (sym->type)) + continue; + + /* print extra debug info if required */ + if (options.debug) + { + if (!sym->level) + { /* global */ + if (IS_STATIC (sym->etype)) + dbuf_printf (aBuf, "F%s$", moduleName); /* scope is file */ + else + dbuf_printf (aBuf, "G$"); /* scope is global */ + } + else + /* symbol is local */ + dbuf_printf (aBuf, "L%s$", + (sym->localof ? sym->localof->name : "-null-")); + dbuf_printf (aBuf, "%s$%d$%d", sym->name, sym->level, sym->block); + } + + /* if is has an absolute address then generate + an equate for this no need to allocate space */ + if (SPEC_ABSA (sym->etype)) + { + + if (options.debug) + dbuf_printf (aBuf, " == 0x%04x\n", SPEC_ADDR (sym->etype)); + + dbuf_printf (aBuf, "%s\t=\t0x%04x\n", + sym->rname, + SPEC_ADDR (sym->etype)); + } + else + { + int size = getSize(sym->type); + + if (size==0) { + werrorfl (sym->fileDef, sym->lineDef, E_UNKNOWN_SIZE); + } + if (options.debug) + dbuf_printf (aBuf, "==.\n"); + + /* allocate space */ + dbuf_tprintf (aBuf, "!labeldef\n", sym->rname); + dbuf_tprintf (aBuf, "\t!ds\n", (unsigned int) getSize (sym->type) & 0xffff); + } + + } + } +} + +/*-----------------------------------------------------------------*/ +/* glue - the final glue that hold the whole thing together */ +/*-----------------------------------------------------------------*/ +void +glue (void) +{ + struct dbuf_s vBuf; + struct dbuf_s ovrBuf; + FILE *asmFile; + int mcs51_like; + + dbuf_init (&vBuf, 4096); + dbuf_init (&ovrBuf, 4096); + + mcs51_like = (port->general.glue_up_main && + (TARGET_IS_MCS51 || TARGET_IS_DS390 || TARGET_IS_XA51 || TARGET_IS_DS400)); + + /* print the global struct definitions */ + if (options.debug) + cdbStructBlock (0); + + /* PENDING: this isn't the best place but it will do */ + if (port->general.glue_up_main) + { + /* create the interrupt vector table */ + createInterruptVect (&vBuf); + } + + /* emit code for the all the variables declared */ + emitMaps (); + /* do the overlay segments */ + emitOverlay (&ovrBuf); + + outputDebugSymbols (); + + /* now put it all together into the assembler file */ + /* create the assembler file name */ + + /* -o option overrides default name? */ + if ((noAssemble || options.c1mode) && fullDstFileName) + { + strncpyz (scratchFileName, fullDstFileName, PATH_MAX); + } + else + { + strncpyz (scratchFileName, dstFileName, PATH_MAX); + strncatz (scratchFileName, port->assembler.file_ext, PATH_MAX); + } + + if (!(asmFile = fopen (scratchFileName, "w"))) + { + werror (E_FILE_OPEN_ERR, scratchFileName); + exit (EXIT_FAILURE); + } + + /* initial comments */ + initialComments (asmFile); + + /* print module name */ + tfprintf (asmFile, "\t!module\n", moduleName); + if (mcs51_like) + { + fprintf (asmFile, "\t.optsdcc -m%s", port->target); + + switch(options.model) + { + case MODEL_SMALL: fprintf (asmFile, " --model-small"); break; + case MODEL_COMPACT: fprintf (asmFile, " --model-compact"); break; + case MODEL_MEDIUM: fprintf (asmFile, " --model-medium"); break; + case MODEL_LARGE: fprintf (asmFile, " --model-large"); break; + case MODEL_FLAT24: fprintf (asmFile, " --model-flat24"); break; + case MODEL_PAGE0: fprintf (asmFile, " --model-page0"); break; + default: break; + } + /*if(options.stackAuto) fprintf (asmFile, " --stack-auto");*/ + if(options.useXstack) fprintf (asmFile, " --xstack"); + /*if(options.intlong_rent) fprintf (asmFile, " --int-long-rent");*/ + /*if(options.float_rent) fprintf (asmFile, " --float-rent");*/ + if(options.noRegParams) fprintf (asmFile, " --no-reg-params"); + if(options.parms_in_bank1) fprintf (asmFile, " --parms-in-bank1"); + fprintf (asmFile, "\n"); + } + else if (TARGET_Z80_LIKE || TARGET_IS_HC08) + { + fprintf (asmFile, "\t.optsdcc -m%s\n", port->target); + } + + tfprintf (asmFile, "\t!fileprelude\n"); + + /* Let the port generate any global directives, etc. */ + if (port->genAssemblerPreamble) + { + port->genAssemblerPreamble (asmFile); + } + + /* print the global variables in this module */ + printPublics (asmFile); + if (port->assembler.externGlobal) + printExterns (asmFile); + + if (( mcs51_like ) + ||( TARGET_IS_Z80 )) /*.p.t.20030924 need to output SFR table for Z80 as well */ + { + /* copy the sfr segment */ + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; special function registers\n"); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&sfr->oBuf, asmFile); + } + + if (mcs51_like) + { + /* copy the sbit segment */ + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; special function bits\n"); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&sfrbit->oBuf, asmFile); + + /*JCF: Create the areas for the register banks*/ + if (RegBankUsed[0] || RegBankUsed[1] || RegBankUsed[2] || RegBankUsed[3]) + { + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; overlayable register banks\n"); + fprintf (asmFile, "%s", iComments2); + if (RegBankUsed[0]) + fprintf (asmFile, "\t.area REG_BANK_0\t(REL,OVR,DATA)\n\t.ds 8\n"); + if (RegBankUsed[1] || options.parms_in_bank1) + fprintf (asmFile, "\t.area REG_BANK_1\t(REL,OVR,DATA)\n\t.ds 8\n"); + if (RegBankUsed[2]) + fprintf (asmFile, "\t.area REG_BANK_2\t(REL,OVR,DATA)\n\t.ds 8\n"); + if (RegBankUsed[3]) + fprintf (asmFile, "\t.area REG_BANK_3\t(REL,OVR,DATA)\n\t.ds 8\n"); + } + if (BitBankUsed) + { + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; overlayable bit register bank\n"); + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "\t.area BIT_BANK\t(REL,OVR,DATA)\n"); + fprintf (asmFile, "bits:\n\t.ds 1\n"); + fprintf (asmFile, "\tb0 = bits[0]\n"); + fprintf (asmFile, "\tb1 = bits[1]\n"); + fprintf (asmFile, "\tb2 = bits[2]\n"); + fprintf (asmFile, "\tb3 = bits[3]\n"); + fprintf (asmFile, "\tb4 = bits[4]\n"); + fprintf (asmFile, "\tb5 = bits[5]\n"); + fprintf (asmFile, "\tb6 = bits[6]\n"); + fprintf (asmFile, "\tb7 = bits[7]\n"); + } + } + + /* copy the data segment */ + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; %s ram data\n", mcs51_like?"internal":""); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&data->oBuf, asmFile); + + + /* create the overlay segments */ + if (overlay) + { + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; overlayable items in %s ram \n", mcs51_like?"internal":""); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&ovrBuf, asmFile); + } + + /* create the stack segment MOF */ + if (mainf && IFFUNC_HASBODY (mainf->type)) + { + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; Stack segment in internal ram \n"); + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "\t.area\tSSEG\t(DATA)\n" + "__start__stack:\n\t.ds\t1\n\n"); + } + + /* create the idata segment */ + if ((idata) && (mcs51_like)) + { + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; indirectly addressable internal ram data\n"); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&idata->oBuf, asmFile); + } + + /* create the absolute idata/data segment */ + if ((i_abs) && (mcs51_like)) + { + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; absolute internal ram data\n"); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&d_abs->oBuf, asmFile); + dbuf_write_and_destroy (&i_abs->oBuf, asmFile); + } + + /* copy the bit segment */ + if (mcs51_like) + { + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; bit data\n"); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&bit->oBuf, asmFile); + } + + /* copy paged external ram data */ + if (mcs51_like) + { + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; paged external ram data\n"); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&pdata->oBuf, asmFile); + } + + /* if external stack then reserve space for it */ + if (mainf && IFFUNC_HASBODY (mainf->type) && options.useXstack) + { + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; external stack \n"); + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "\t.area XSTK (PAG,XDATA)\n" + "__start__xstack:\n\t.ds\t1\n\n"); + } + + /* copy external ram data */ + if (mcs51_like) + { + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; external ram data\n"); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&xdata->oBuf, asmFile); + } + + /* create the absolute xdata segment */ + if (mcs51_like || TARGET_IS_HC08) + { + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; absolute external ram data\n"); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&x_abs->oBuf, asmFile); + } + + /* copy external initialized ram data */ + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; external initialized ram data\n"); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&xidata->oBuf, asmFile); + + /* If the port wants to generate any extra areas, let it do so. */ + if (port->extraAreas.genExtraAreaDeclaration) + { + port->extraAreas.genExtraAreaDeclaration(asmFile, + mainf && IFFUNC_HASBODY(mainf->type)); + } + + /* copy the interrupt vector table */ + if (mainf && IFFUNC_HASBODY (mainf->type)) + { + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; interrupt vector \n"); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&vBuf, asmFile); + } + + /* copy global & static initialisations */ + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; global & static initialisations\n"); + fprintf (asmFile, "%s", iComments2); + + /* Everywhere we generate a reference to the static_name area, + * (which is currently only here), we immediately follow it with a + * definition of the post_static_name area. This guarantees that + * the post_static_name area will immediately follow the static_name + * area. + */ + tfprintf (asmFile, "\t!area\n", port->mem.home_name); + tfprintf (asmFile, "\t!area\n", port->mem.static_name); /* MOF */ + tfprintf (asmFile, "\t!area\n", port->mem.post_static_name); + tfprintf (asmFile, "\t!area\n", port->mem.static_name); + + if (mainf && IFFUNC_HASBODY (mainf->type)) + { + if (port->genInitStartup) + { + port->genInitStartup (asmFile); + } + else + { + assert (mcs51_like); + fprintf (asmFile, "__sdcc_gsinit_startup:\n"); + /* if external stack is specified then the + higher order byte of the xdatalocation is + going into P2 and the lower order going into + spx */ + if (options.useXstack) + { + fprintf (asmFile, "\tmov\tP2,#0x%02x\n", + (((unsigned int) options.xdata_loc) >> 8) & 0xff); + fprintf (asmFile, "\tmov\t_spx,#0x%02x\n", + (unsigned int) options.xdata_loc & 0xff); + } + + // This should probably be a port option, but I'm being lazy. + // on the 400, the firmware boot loader gives us a valid stack + // (see '400 data sheet pg. 85 (TINI400 ROM Initialization code) + if (!TARGET_IS_DS400) + { + /* initialise the stack pointer. JCF: aslink takes care of the location */ + fprintf (asmFile, "\tmov\tsp,#__start__stack - 1\n"); /* MOF */ + } + + fprintf (asmFile, "\t%ccall\t__sdcc_external_startup\n", options.acall_ajmp?'a':'l'); + fprintf (asmFile, "\tmov\ta,dpl\n"); + fprintf (asmFile, "\tjz\t__sdcc_init_data\n"); + fprintf (asmFile, "\t%cjmp\t__sdcc_program_startup\n", options.acall_ajmp?'a':'l'); + fprintf (asmFile, "__sdcc_init_data:\n"); + + // if the port can copy the XINIT segment to XISEG + if (port->genXINIT) + { + port->genXINIT (asmFile); + } + } + } + dbuf_write_and_destroy (&statsg->oBuf, asmFile); + + if (port->general.glue_up_main && mainf && IFFUNC_HASBODY (mainf->type)) + { + /* This code is generated in the post-static area. + * This area is guaranteed to follow the static area + * by the ugly shucking and jiving about 20 lines ago. + */ + tfprintf (asmFile, "\t!area\n", port->mem.post_static_name); + fprintf (asmFile, "\t%cjmp\t__sdcc_program_startup\n", options.acall_ajmp?'a':'l'); + } + + fprintf (asmFile, + "%s" + "; Home\n" + "%s", iComments2, iComments2); + tfprintf (asmFile, "\t!areahome\n", HOME_NAME); + dbuf_write_and_destroy (&home->oBuf, asmFile); + + if (mainf && IFFUNC_HASBODY (mainf->type)) + { + /* entry point @ start of HOME */ + fprintf (asmFile, "__sdcc_program_startup:\n"); + + /* put in jump or call to main */ + if (options.mainreturn) + { + fprintf (asmFile, "\t%cjmp\t_main\n", options.acall_ajmp?'a':'l'); /* needed? */ + fprintf (asmFile, ";\treturn from main will return to caller\n"); + } + else + { + fprintf (asmFile, "\t%ccall\t_main\n", options.acall_ajmp?'a':'l'); + fprintf (asmFile, ";\treturn from main will lock up\n"); + fprintf (asmFile, "\tsjmp .\n"); + } + } + /* copy over code */ + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; code\n"); + fprintf (asmFile, "%s", iComments2); + tfprintf (asmFile, "\t!areacode\n", options.code_seg); + dbuf_write_and_destroy (&code->oBuf, asmFile); + + if (port->genAssemblerEnd) + { + port->genAssemblerEnd (asmFile); + } + fclose (asmFile); +} diff --git a/src/SDCCglue.h b/src/SDCCglue.h new file mode 100644 index 0000000..627fc94 --- /dev/null +++ b/src/SDCCglue.h @@ -0,0 +1,42 @@ +/*------------------------------------------------------------------------- + + SDCCglue.h - glues everything we have done together into one file. + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "SDCCglobl.h" +#include "SDCCmem.h" + +#ifndef SDCCGLUE_H +#define SDCCGLUE_H 1 + +void glue (void); +/* drdani Jan 30 2000 + This is needed in gen.c of z80 port */ +char *aopLiteral (value *, int); +void flushStatics (void); +int printIvalCharPtr (symbol *, sym_link *, value *, struct dbuf_s *); + +extern symbol *interrupts[]; +extern set *publics; + +int pointerTypeToGPByte (const int p_type, const char *iname, const char *oname); + +#endif diff --git a/src/SDCChasht.c b/src/SDCChasht.c new file mode 100644 index 0000000..dd6322d --- /dev/null +++ b/src/SDCChasht.c @@ -0,0 +1,586 @@ +/*----------------------------------------------------------------- + SDCChast.c - contains support routines for hashtables + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include +#include +#include +#include +#include "SDCCglobl.h" +#include "SDCChasht.h" +#include "newalloc.h" + +#define DEFAULT_HTAB_SIZE 128 + +/*-----------------------------------------------------------------*/ +/* newHashtItem - creates a new hashtable Item */ +/*-----------------------------------------------------------------*/ +static hashtItem * +_newHashtItem (int key, void *pkey, void *item) +{ + hashtItem *htip; + + htip = Safe_alloc ( sizeof (hashtItem)); + + htip->key = key; + htip->pkey = pkey; + htip->item = item; + htip->next = NULL; + return htip; +} + +/*-----------------------------------------------------------------*/ +/* newHashTable - allocates a new hashtable of size */ +/*-----------------------------------------------------------------*/ +hTab * +newHashTable (int size) +{ + hTab *htab; + + htab = Safe_alloc ( sizeof (hTab)); + + if (!(htab->table = Safe_alloc ((size + 1) * sizeof (hashtItem *)))) + { + fprintf (stderr, "out of virtual memory %s %d\n", + __FILE__, (size + 1) * (int) sizeof (hashtItem *)); + exit (1); + } + htab->minKey = htab->size = size; + return htab; +} + + +void +hTabAddItemLong (hTab ** htab, int key, void *pkey, void *item) +{ + hashtItem *htip; + hashtItem *last; + + if (!(*htab)) + *htab = newHashTable (DEFAULT_HTAB_SIZE); + + if (key > (*htab)->size) + { + int i; + (*htab)->table = Safe_realloc ((*htab)->table, + (key * 2 + 2) * sizeof (hashtItem *)); + for (i = (*htab)->size + 1; i <= (key * 2 + 1); i++) + (*htab)->table[i] = NULL; + (*htab)->size = key * 2 + 1; + } + + /* update the key */ + if ((*htab)->maxKey < key) + (*htab)->maxKey = key; + + if ((*htab)->minKey > key) + (*htab)->minKey = key; + + /* create the item */ + htip = _newHashtItem (key, pkey, item); + + /* if there is a clash then goto end of chain */ + if ((last = (*htab)->table[key])) + { + while (last->next) + last = last->next; + last->next = htip; + } + else + /* else just add it */ + (*htab)->table[key] = htip; + (*htab)->nItems++; +} + +/*-----------------------------------------------------------------*/ +/* hTabAddItem - adds an item to the hash table */ +/*-----------------------------------------------------------------*/ +void +hTabAddItem (hTab ** htab, int key, void *item) +{ + hTabAddItemLong (htab, key, NULL, item); +} + +/*-----------------------------------------------------------------*/ +/* hTabDeleteItem - either delete an item */ +/*-----------------------------------------------------------------*/ +void +hTabDeleteItem (hTab ** htab, int key, + const void *item, DELETE_ACTION action, + int (*compareFunc) (const void *, const void *)) +{ + hashtItem *htip, **htipp; + + if (!(*htab)) + return; + + /* first check if anything exists in the slot */ + if (!(*htab)->table[key]) + return; + + /* if delete chain */ + if (action == DELETE_CHAIN) + (*htab)->table[key] = NULL; + else + { + + /* delete specific item */ + /* if a compare function is given then use the compare */ + /* function to find the item, else just compare the items */ + + htipp = &((*htab)->table[key]); + htip = (*htab)->table[key]; + for (; htip; htip = htip->next) + { + + if (compareFunc ? compareFunc (item, htip->item) : + (item == htip->item)) + { + *htipp = htip->next; + break; + } + + htipp = &(htip->next); + } + + } + + (*htab)->nItems--; + + if (!(*htab)->nItems) + { + *htab = NULL; + } +} + +/*-----------------------------------------------------------------*/ +/* hTabDeleteAll - deletes all items in a hash table to reduce mem */ +/* leaks written by */ +/* "BESSIERE Jerome" */ +/*-----------------------------------------------------------------*/ +void +hTabDeleteAll (hTab * p) +{ + if (p && p->table) + { + register int i; + register hashtItem *jc, *jn; + for (i = 0; i < p->size; i++) + { + + if (!(jc = p->table[i])) + continue; + jn = jc->next; + while (jc) + { + Safe_free (jc); + if ((jc = jn)) + jn = jc->next; + } + p->table[i] = NULL; + } + Safe_free (p->table); + } +} + +/*-----------------------------------------------------------------*/ +/* hTabClearAll - clear all entries in the table (does not free) */ +/*-----------------------------------------------------------------*/ +void +hTabClearAll (hTab * htab) +{ + + if (!htab || !htab->table) + { + printf ("null table\n"); + return; + } + memset (htab->table, 0, htab->size * sizeof (hashtItem *)); + + htab->minKey = htab->size; + htab->currKey = htab->nItems = htab->maxKey = 0; +} + +static const hashtItem * +_findItem (hTab * htab, int key, void *item, int (*compareFunc) (void *, void *)) +{ + hashtItem *htip; + + for (htip = htab->table[key]; htip; htip = htip->next) + { + /* if a compare function is given use it */ + if (compareFunc && compareFunc (item, htip->item)) + break; + else if (item == htip->item) + break; + } + return htip; +} + +static const hashtItem * +_findByKey (hTab * htab, int key, const void *pkey, int (*compare) (const void *, const void *)) +{ + hashtItem *htip; + + assert (compare); + + if (!htab) + return NULL; + + for (htip = htab->table[key]; htip; htip = htip->next) + { + /* if a compare function is given use it */ + if (compare && compare (pkey, htip->pkey)) + { + break; + } + else + { + if (pkey == htip->pkey) + { + break; + } + } + } + return htip; +} + +void * +hTabFindByKey (hTab * h, int key, const void *pkey, int (*compare) (const void *, const void *)) +{ + const hashtItem *item; + + if ((item = _findByKey (h, key, pkey, compare))) + return item->item; + return NULL; +} + +int +hTabDeleteByKey (hTab ** h, int key, const void *pkey, int (*compare) (const void *, const void *)) +{ + hashtItem *htip, **htipp; + bool found = FALSE; + + if (!(*h)) + return 0; + + /* first check if anything exists in the slot */ + if (!(*h)->table[key]) + return 0; + + /* delete specific item */ + /* if a compare function is given then use the compare */ + /* function to find the item, else just compare the items */ + + htipp = &((*h)->table[key]); + htip = (*h)->table[key]; + for (; htip; htip = htip->next) + { + if ( + (compare && compare (pkey, htip->pkey)) || + pkey == htip->pkey) + { + *htipp = htip->next; + found = TRUE; + break; + } + htipp = &(htip->next); + } + + if (found == TRUE) + { + (*h)->nItems--; + + if (!(*h)->nItems) + { + *h = NULL; + } + } + + return 1; +} + +/*-----------------------------------------------------------------*/ +/* hTabIsInTable - will determine if an Item is in the hasht */ +/*-----------------------------------------------------------------*/ +int +hTabIsInTable (hTab * htab, int key, + void *item, int (*compareFunc) (void *, void *)) +{ + if (_findItem (htab, key, item, compareFunc)) + return 1; + return 0; +} + +/*-----------------------------------------------------------------*/ +/* hTabFirstItem - returns the first Item in the hTab */ +/*-----------------------------------------------------------------*/ +void * +hTabFirstItem (hTab * htab, int *k) +{ + int key; + + if (!htab) + return NULL; + + for (key = htab->minKey; key <= htab->maxKey; key++) + { + if (htab->table[key]) + { + htab->currItem = htab->table[key]; + htab->currKey = key; + *k = key; + return htab->table[key]->item; + } + } + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* hTabNextItem - returns the next item in the hTab */ +/*-----------------------------------------------------------------*/ +void * +hTabNextItem (hTab * htab, int *k) +{ + int key; + + if (!htab) + return NULL; + + /* if this chain not ended then */ + if (htab->currItem->next) + { + *k = htab->currItem->key; + return (htab->currItem = htab->currItem->next)->item; + } + + /* find the next chain which has something */ + for (key = htab->currKey + 1; key <= htab->maxKey; key++) + { + if (htab->table[key]) + { + htab->currItem = htab->table[key]; + *k = htab->currKey = key; + return htab->table[key]->item; + } + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* hTabFirstItemWK - returns the first Item in the hTab for a key */ +/*-----------------------------------------------------------------*/ +void * +hTabFirstItemWK (hTab * htab, int wk) +{ + + if (!htab) + return NULL; + + if (wk < htab->minKey || wk > htab->maxKey) + return NULL; + + htab->currItem = htab->table[wk]; + htab->currKey = wk; + + return (htab->table[wk] ? htab->table[wk]->item : NULL); +} + +/*-----------------------------------------------------------------*/ +/* hTabNextItem - returns the next item in the hTab for a key */ +/*-----------------------------------------------------------------*/ +void * +hTabNextItemWK (hTab * htab) +{ + + if (!htab) + return NULL; + + /* if this chain not ended then */ + if (htab->currItem->next) + { + return (htab->currItem = htab->currItem->next)->item; + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* hTabFromTable - hash Table from a hash table */ +/*-----------------------------------------------------------------*/ +hTab * +hTabFromTable (hTab * htab) +{ + hTab *nhtab; + hashtItem *htip; + int key; + + if (!htab) + return NULL; + + nhtab = newHashTable (htab->size); + + for (key = htab->minKey; key <= htab->maxKey; key++) + { + + for (htip = htab->table[key]; htip; htip = htip->next) + hTabAddItem (&nhtab, htip->key, htip->item); + } + + return nhtab; +} + +/*-----------------------------------------------------------------*/ +/* isHtabsEqual - returns 1 if all items in htab1 is found in htab2 */ +/*-----------------------------------------------------------------*/ +int +isHtabsEqual (hTab * htab1, hTab * htab2, + int (*compareFunc) (void *, void *)) +{ + void *item; + int key; + + if (htab1 == htab2) + return 1; + + if (htab1 == NULL || htab2 == NULL) + return 0; + + /* if they are different sizes then */ + if (htab1->nItems != htab2->nItems) + return 0; + + /* now do an item by item check */ + for (item = hTabFirstItem (htab1, &key); item; + item = hTabNextItem (htab1, &key)) + if (!hTabIsInTable (htab2, key, item, compareFunc)) + return 0; + + return 1; +} + + +/*-----------------------------------------------------------------*/ +/* hTabSearch - returns the first Item with the specified key */ +/*-----------------------------------------------------------------*/ +hashtItem * +hTabSearch (hTab * htab, int key) +{ + if (!htab) + return NULL; + + if ((key < htab->minKey) || (key > htab->maxKey)) + return NULL; + + if (!htab->table[key]) + return NULL; + + return htab->table[key]; +} + +/*-----------------------------------------------------------------*/ +/* hTabItemWithKey - returns the first item with the given key */ +/*-----------------------------------------------------------------*/ +void * +hTabItemWithKey (hTab * htab, int key) +{ + hashtItem *htip; + + if (!(htip = hTabSearch (htab, key))) + return NULL; + + return htip->item; +} + +/*-----------------------------------------------------------------*/ +/* hTabMaxKey - return the maxKey of item in the hashTable */ +/*-----------------------------------------------------------------*/ +int hTabMaxKey (hTab *htab) +{ + return (htab ? htab->maxKey : 0); +} + +/*-----------------------------------------------------------------*/ +/*hTabAddItemIfNotP - adds an item with nothing found with key */ +/*-----------------------------------------------------------------*/ +void +hTabAddItemIfNotP (hTab ** htab, int key, void *item) +{ + if (!*htab) + { + hTabAddItem (htab, key, item); + return; + } + + if (hTabItemWithKey (*htab, key)) + return; + + hTabAddItem (htab, key, item); +} + +/** Simple implementation of a hash table which uses + string (key, value) pairs. If a key already exists in the + table, the newly added value will replace it. + This is used for the assembler token table. The replace existing + condition is used to implement inheritance. +*/ +static int +_compare (const void *s1, const void *s2) +{ + return !strcmp (s1, s2); +} + +static int +_hash (const char *sz) +{ + /* Dumb for now */ + return *sz; +} + +void +shash_add (hTab ** h, const char *szKey, const char *szValue) +{ + char *val; + int key = _hash (szKey); + + /* Find value of the item */ + val = (char *)hTabFindByKey(*h, key, szKey, _compare); + /* Delete any that currently exist */ + hTabDeleteByKey(h, key, szKey, _compare); + /* Deallocate old value in not NULL */ + if (val != NULL) + Safe_free(val); + /* Duplicate new value if not NULL */ + if (szValue != NULL) + szValue = Safe_strdup(szValue); + /* Now add in ours */ + hTabAddItemLong (h, key, Safe_strdup (szKey), (void *)szValue); +} + +const char * +shash_find (hTab * h, const char *szKey) +{ + int key = _hash (szKey); + return (char *) hTabFindByKey (h, key, szKey, _compare); +} diff --git a/src/SDCChasht.h b/src/SDCChasht.h new file mode 100644 index 0000000..89013cc --- /dev/null +++ b/src/SDCChasht.h @@ -0,0 +1,121 @@ +/*----------------------------------------------------------------- + SDCChast.h - contains support routines for hashtables/sets . + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + + +#ifndef SDCCHASHT_H +#define SDCCHASHT_H + + + +/* hashtable item */ +typedef struct hashtItem + { + int key; + /* Pointer to the key that was hashed for key. + Used for a hash table with unique keys. */ + void *pkey; + void *item; + struct hashtItem *next; + } +hashtItem; + +/* hashtable */ +typedef struct hTab + { + int size; /* max number of items */ + int minKey; /* minimum key value */ + int maxKey; /* maximum key value */ + hashtItem **table; /* the actual table */ + int currKey; /* used for iteration */ + hashtItem *currItem; /* current item within the list */ + int nItems; + } +hTab; + +typedef enum + { + DELETE_CHAIN = 1, + DELETE_ITEM + } +DELETE_ACTION; + + +/*-----------------------------------------------------------------*/ +/* Forward definition for functions */ +/*-----------------------------------------------------------------*/ + +/* hashtable related functions */ +hTab *newHashTable (int); +void hTabAddItem (hTab **, int key, void *item); +/** Adds a new item to the hash table. + @param h The hash table to add to + @param key A hashed version of pkey + @param pkey A copy of the key. Owned by the + hash table after this function. + @param item Value for this key. +*/ +void hTabAddItemLong (hTab ** h, int key, void *pkey, void *item); +/** Finds a item by exact key. + Searches all items in the key 'key' for a key that + according to 'compare' matches pkey. + @param h The hash table to search + @param key A hashed version of pkey. + @param pkey The key to search for + @param compare Returns 0 if pkey == this +*/ +void *hTabFindByKey (hTab * h, int key, const void *pkey, int (*compare) (const void *, const void *)); +/** Deletes an item with the exact key 'pkey' + @see hTabFindByKey +*/ +int hTabDeleteByKey (hTab ** h, int key, const void *pkey, int (*compare) (const void *, const void *)); + +void hTabDeleteItem (hTab **, int key, + const void *item, DELETE_ACTION action, + int (*compareFunc) (const void *, const void *)); +int hTabIsInTable (hTab *, int, void *, + int (*compareFunc) (void *, void *)); +void *hTabFirstItem (hTab *, int *); +void *hTabNextItem (hTab *, int *); +hTab *hTabFromTable (hTab *); +int isHtabsEqual (hTab *, hTab *, int (*compareFunc) (void *, void *)); +hashtItem *hTabSearch (hTab *, int); +void *hTabItemWithKey (hTab *, int); +void hTabAddItemIfNotP (hTab **, int, void *); +void hTabDeleteAll (hTab *); +void *hTabFirstItemWK (hTab * htab, int wk); +void *hTabNextItemWK (hTab * htab); +void hTabClearAll (hTab * htab); +int hTabMaxKey (hTab *htab); + +/** Find the first item that either is 'item' or which + according to 'compareFunc' is the same as item. + @param compareFunc strcmp like compare function, may be null. +*/ +void *hTabFindItem (hTab * htab, int key, + void *item, int (*compareFunc) (void *, void *)); + +void shash_add (hTab ** h, const char *szKey, const char *szValue); +const char *shash_find (hTab * h, const char *szKey); + +#endif diff --git a/src/SDCCicode.c b/src/SDCCicode.c new file mode 100644 index 0000000..fe43772 --- /dev/null +++ b/src/SDCCicode.c @@ -0,0 +1,4584 @@ +/*------------------------------------------------------------------------- + + SDCCicode.c - intermediate code generation etc. + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" +#include "newalloc.h" +#include "math.h" +#include "dbuf_string.h" + +/*-----------------------------------------------------------------*/ +/* global variables */ + +set *iCodeChain = NULL; +int iTempNum = 0; +int iTempLblNum = 0; +int operandKey = 0; +int iCodeKey = 0; +char *filename; /* current file name */ +int lineno = 1; /* current line number */ +int block; +int scopeLevel; +int seqPoint; + +symbol *returnLabel; /* function return label */ +symbol *entryLabel; /* function entry label */ + +/*-----------------------------------------------------------------*/ +/* forward definition of some functions */ +operand *geniCodeAssign (operand *, operand *, int, int); +static operand *geniCodeArray (operand *, operand *,int); +static operand *geniCodeArray2Ptr (operand *); +operand *geniCodeRValue (operand *, bool); +operand *geniCodeDerefPtr (operand *,int); +int isLvaluereq(int lvl); +void setOClass (sym_link * ptr, sym_link * spec); +static operand *geniCodeCast (sym_link *, operand *, bool); + +#define PRINTFUNC(x) void x (struct dbuf_s *dbuf, iCode *ic, char *s) +/* forward definition of ic print functions */ +PRINTFUNC (picGetValueAtAddr); +PRINTFUNC (picSetValueAtAddr); +PRINTFUNC (picAddrOf); +PRINTFUNC (picGeneric); +PRINTFUNC (picGenericOne); +PRINTFUNC (picCast); +PRINTFUNC (picAssign); +PRINTFUNC (picLabel); +PRINTFUNC (picGoto); +PRINTFUNC (picIfx); +PRINTFUNC (picJumpTable); +PRINTFUNC (picInline); +PRINTFUNC (picReceive); +PRINTFUNC (picDummyRead); +PRINTFUNC (picCritical); +PRINTFUNC (picEndCritical); + +iCodeTable codeTable[] = +{ + {'!', "not", picGenericOne, NULL}, + {'~', "~", picGenericOne, NULL}, + {RRC, "rrc", picGenericOne, NULL}, + {RLC, "rlc", picGenericOne, NULL}, + {GETHBIT, "ghbit", picGenericOne, NULL}, + {GETABIT, "gabit", picGenericOne, NULL}, + {GETBYTE, "gbyte", picGenericOne, NULL}, + {GETWORD, "gword", picGenericOne, NULL}, + {UNARYMINUS, "-", picGenericOne, NULL}, + {IPUSH, "push", picGenericOne, NULL}, + {IPOP, "pop", picGenericOne, NULL}, + {CALL, "call", picGenericOne, NULL}, + {PCALL, "pcall", picGenericOne, NULL}, + {FUNCTION, "proc", picGenericOne, NULL}, + {ENDFUNCTION, "eproc", picGenericOne, NULL}, + {RETURN, "ret", picGenericOne, NULL}, + {'+', "+", picGeneric, NULL}, + {'-', "-", picGeneric, NULL}, + {'*', "*", picGeneric, NULL}, + {'/', "/", picGeneric, NULL}, + {'%', "%", picGeneric, NULL}, + {'>', ">", picGeneric, NULL}, + {'<', "<", picGeneric, NULL}, + {LE_OP, "<=", picGeneric, NULL}, + {GE_OP, ">=", picGeneric, NULL}, + {EQ_OP, "==", picGeneric, NULL}, + {NE_OP, "!=", picGeneric, NULL}, + {AND_OP, "&&", picGeneric, NULL}, + {OR_OP, "||", picGeneric, NULL}, + {'^', "^", picGeneric, NULL}, + {'|', "|", picGeneric, NULL}, + {BITWISEAND, "&", picGeneric, NULL}, + {LEFT_OP, "<<", picGeneric, NULL}, + {RIGHT_OP, ">>", picGeneric, NULL}, + {GET_VALUE_AT_ADDRESS, "@", picGetValueAtAddr, NULL}, + {ADDRESS_OF, "&", picAddrOf, NULL}, + {CAST, "<>", picCast, NULL}, + {'=', ":=", picAssign, NULL}, + {LABEL, "", picLabel, NULL}, + {GOTO, "", picGoto, NULL}, + {JUMPTABLE, "jtab", picJumpTable, NULL}, + {IFX, "if", picIfx, NULL}, + {INLINEASM, "", picInline, NULL}, + {RECEIVE, "recv", picReceive, NULL}, + {SEND, "send", picGenericOne, NULL}, + {ARRAYINIT, "arrayInit", picGenericOne, NULL}, + {DUMMY_READ_VOLATILE, "dummy = (volatile)", picDummyRead, NULL}, + {CRITICAL, "critical_start", picCritical, NULL}, + {ENDCRITICAL, "critical_end", picEndCritical, NULL}, + {SWAP, "swap", picGenericOne, NULL} +}; + +/*-----------------------------------------------------------------*/ +/* operandName - returns the name of the operand */ +/*-----------------------------------------------------------------*/ +int +printOperand (operand * op, FILE * file) +{ + struct dbuf_s dbuf; + int ret; + int pnl = 0; + + if (!file) + { + file = stdout; + pnl = 1; + } + dbuf_init (&dbuf, 1024); + ret = dbuf_printOperand(op, &dbuf); + dbuf_write_and_destroy (&dbuf, file); + + if (pnl) + putc ('\n', file); + + return ret; +} + +int +dbuf_printOperand (operand * op, struct dbuf_s *dbuf) +{ + sym_link *opetype; + + if (!op) + return 1; + + switch (op->type) + { + + case VALUE: + opetype = getSpec (operandType (op)); + if (IS_FLOAT (opetype)) + dbuf_printf (dbuf, "%g {", SPEC_CVAL (opetype).v_float); + else if (IS_FIXED16X16 (opetype)) + dbuf_printf (dbuf, "%g {", doubleFromFixed16x16(SPEC_CVAL (opetype).v_fixed16x16)); + else + dbuf_printf (dbuf, "0x%x {", (unsigned int) ulFromVal (op->operand.valOperand)); + dbuf_printTypeChain (operandType (op), dbuf); + dbuf_append_char (dbuf, '}'); + break; + + case SYMBOL: +#define REGA 1 +//#if REGA /* { */ + if(REGA && !getenv("PRINT_SHORT_OPERANDS")) { + dbuf_printf (dbuf, "%s [k%d lr%d:%d so:%d]{ ia%d a2p%d re%d rm%d nos%d ru%d dp%d}", /*{ar%d rm%d ru%d p%d a%d u%d i%d au%d k%d ks%d}" , */ + (OP_SYMBOL (op)->rname[0] ? OP_SYMBOL (op)->rname : OP_SYMBOL (op)->name), + op->key, + OP_LIVEFROM (op), OP_LIVETO (op), + OP_SYMBOL (op)->stack, + op->isaddr, op->aggr2ptr, OP_SYMBOL (op)->isreqv, + OP_SYMBOL (op)->remat,OP_SYMBOL(op)->noSpilLoc, + OP_SYMBOL(op)->ruonly,OP_SYMBOL(op)->dptr + ); + { + dbuf_append_char (dbuf, '{'); + dbuf_printTypeChain (operandType (op), dbuf); + if (SPIL_LOC (op) && IS_ITEMP (op)) + dbuf_printf (dbuf, "}{ sir@ %s", SPIL_LOC (op)->rname); + dbuf_append_char (dbuf, '}'); + + } + + /* if assigned to registers */ + if (OP_SYMBOL (op)->nRegs) + { + if (OP_SYMBOL (op)->isspilt) + { + if (!OP_SYMBOL (op)->remat) + if (OP_SYMBOL (op)->usl.spillLoc) + dbuf_printf (dbuf, "[%s]", (OP_SYMBOL (op)->usl.spillLoc->rname[0] ? + OP_SYMBOL (op)->usl.spillLoc->rname : + OP_SYMBOL (op)->usl.spillLoc->name)); + else + dbuf_append_str (dbuf, "[err]"); + else + dbuf_append_str (dbuf, "[remat]"); + } + else + { + int i; + dbuf_append_char (dbuf, '['); + for (i = 0; i < OP_SYMBOL (op)->nRegs; i++) + dbuf_printf (dbuf, "%s ", port->getRegName (OP_SYMBOL (op)->regs[i])); + dbuf_append_char (dbuf, ']'); + } + } +//#else /* } else { */ + } else { + /* (getenv("PRINT_SHORT_OPERANDS") != NULL) */ + dbuf_printf (dbuf, "%s ", (OP_SYMBOL (op)->rname[0] ? OP_SYMBOL (op)->rname : OP_SYMBOL (op)->name)); + + if(getenv("PRINT_SHORT_OPERANDS")[0] < '1') + { + dbuf_printf (dbuf, "[lr%d:%d so:%d]", + OP_LIVEFROM (op), OP_LIVETO (op), + OP_SYMBOL (op)->stack); + } + + if(getenv("PRINT_SHORT_OPERANDS")[0] < '2') + { + dbuf_append_char (dbuf, '{'); + dbuf_printTypeChain (operandType (op), dbuf); + if (SPIL_LOC (op) && IS_ITEMP (op)) + dbuf_printf (dbuf, "}{ sir@ %s", SPIL_LOC (op)->rname); + dbuf_append_char (dbuf, '}'); + } + + /* if assigned to registers */ + if (OP_SYMBOL (op)->nRegs) + { + if (OP_SYMBOL (op)->isspilt) + { + if (!OP_SYMBOL (op)->remat) + if (OP_SYMBOL (op)->usl.spillLoc) + dbuf_printf (dbuf, "[%s]", (OP_SYMBOL (op)->usl.spillLoc->rname[0] ? + OP_SYMBOL (op)->usl.spillLoc->rname : + OP_SYMBOL (op)->usl.spillLoc->name)); + else + dbuf_append_str (dbuf, "[err]"); + else + dbuf_append_str (dbuf, "[remat]"); + } + else + { + int i; + dbuf_append_char (dbuf, '['); + for (i = 0; i < OP_SYMBOL (op)->nRegs; i++) + dbuf_printf (dbuf, "%s ", port->getRegName (OP_SYMBOL (op)->regs[i])); + dbuf_append_char (dbuf, ']'); + } + } +//#endif /* } */ + } + break; + + case TYPE: + dbuf_append_char (dbuf, '('); + dbuf_printTypeChain (op->operand.typeOperand, dbuf); + dbuf_append_char (dbuf, ')'); + break; + } + + return 0; +} + + +/*-----------------------------------------------------------------*/ +/* print functions */ +/*-----------------------------------------------------------------*/ +PRINTFUNC (picGetValueAtAddr) +{ + dbuf_append_char (dbuf, '\t'); + dbuf_printOperand (IC_RESULT (ic), dbuf); + dbuf_append_str (dbuf, " = "); + dbuf_append_str (dbuf, "@["); + dbuf_printOperand (IC_LEFT (ic), dbuf); + dbuf_append_str (dbuf, "]\n"); +} + +PRINTFUNC (picSetValueAtAddr) +{ + dbuf_append_char (dbuf, '\t'); + dbuf_append_str (dbuf, "*["); + dbuf_printOperand (IC_LEFT (ic), dbuf); + dbuf_append_str (dbuf, "] = "); + dbuf_printOperand (IC_RIGHT (ic), dbuf); + dbuf_append_char (dbuf, '\n'); +} + +PRINTFUNC (picAddrOf) +{ + dbuf_append_char (dbuf, '\t'); + dbuf_printOperand (IC_RESULT (ic), dbuf); + if (IS_ITEMP (IC_LEFT (ic))) + dbuf_append_str (dbuf, " = "); + else + dbuf_append_str (dbuf, " = &["); + dbuf_printOperand (IC_LEFT (ic), dbuf); + if (IC_RIGHT (ic)) + { + if (IS_ITEMP (IC_LEFT (ic))) + dbuf_append_str (dbuf, " offsetAdd "); + else + dbuf_append_str (dbuf, " , "); + dbuf_printOperand (IC_RIGHT (ic), dbuf); + } + if (IS_ITEMP (IC_LEFT (ic))) + dbuf_append_char (dbuf, '\n'); + else + dbuf_append_str (dbuf, "]\n"); +} + +PRINTFUNC (picJumpTable) +{ + symbol *sym; + + dbuf_append_char (dbuf, '\t'); + dbuf_printf (dbuf, "%s\t", s); + dbuf_printOperand (IC_JTCOND (ic), dbuf); + for (sym = setFirstItem (IC_JTLABELS (ic)); sym; + sym = setNextItem (IC_JTLABELS (ic))) + dbuf_printf (dbuf, "; %s", sym->name); + dbuf_append_char (dbuf, '\n'); +} + +PRINTFUNC (picGeneric) +{ + dbuf_append_char (dbuf, '\t'); + dbuf_printOperand (IC_RESULT (ic), dbuf); + dbuf_append_str (dbuf, " = "); + dbuf_printOperand (IC_LEFT (ic), dbuf); + dbuf_printf (dbuf, " %s ", s); + dbuf_printOperand (IC_RIGHT (ic), dbuf); + dbuf_append_char (dbuf, '\n'); +} + +PRINTFUNC (picGenericOne) +{ + dbuf_append_char (dbuf, '\t'); + if (IC_RESULT (ic)) + { + dbuf_printOperand (IC_RESULT (ic), dbuf); + dbuf_append_str (dbuf, " = "); + } + + if (IC_LEFT (ic)) + { + dbuf_printf (dbuf, "%s ", s); + dbuf_printOperand (IC_LEFT (ic), dbuf); + } + + if (!IC_RESULT (ic) && !IC_LEFT (ic)) + dbuf_append_str (dbuf, s); + + if (ic->op == SEND || ic->op == RECEIVE) { + dbuf_printf (dbuf,"{argreg = %d}",ic->argreg); + } + if (ic->op == IPUSH) { + dbuf_printf (dbuf,"{parmPush = %d}",ic->parmPush); + } + dbuf_append_char (dbuf, '\n'); +} + +PRINTFUNC (picCast) +{ + dbuf_append_char (dbuf, '\t'); + dbuf_printOperand (IC_RESULT (ic), dbuf); + dbuf_append_str (dbuf, " = "); + dbuf_printOperand (IC_LEFT (ic), dbuf); + dbuf_printOperand (IC_RIGHT (ic), dbuf); + dbuf_append_char (dbuf, '\n'); +} + + +PRINTFUNC (picAssign) +{ + dbuf_append_char (dbuf, '\t'); + + if (IC_RESULT (ic)->isaddr && IS_ITEMP (IC_RESULT (ic))) + dbuf_append_str (dbuf, "*("); + + dbuf_printOperand (IC_RESULT (ic), dbuf); + + if (IC_RESULT (ic)->isaddr && IS_ITEMP (IC_RESULT (ic))) + dbuf_append_char (dbuf, ')'); + + dbuf_printf (dbuf, " %s ", s); + dbuf_printOperand (IC_RIGHT (ic), dbuf); + + dbuf_append_char (dbuf, '\n'); +} + +PRINTFUNC (picLabel) +{ + dbuf_printf (dbuf, " %s($%d) :\n", IC_LABEL (ic)->name, IC_LABEL (ic)->key); +} + +PRINTFUNC (picGoto) +{ + dbuf_append_char (dbuf, '\t'); + dbuf_printf (dbuf, " goto %s($%d)\n", IC_LABEL (ic)->name, IC_LABEL (ic)->key); +} + +PRINTFUNC (picIfx) +{ + dbuf_append_char (dbuf, '\t'); + dbuf_append_str (dbuf, "if "); + dbuf_printOperand (IC_COND (ic), dbuf); + + if (!IC_TRUE (ic)) + dbuf_printf (dbuf, " == 0 goto %s($%d)\n", IC_FALSE (ic)->name, IC_FALSE (ic)->key); + else + { + dbuf_printf (dbuf, " != 0 goto %s($%d)", IC_TRUE (ic)->name, IC_TRUE (ic)->key); + if (IC_FALSE (ic)) + dbuf_printf (dbuf, "; zzgoto %s\n", IC_FALSE (ic)->name); + dbuf_append_char (dbuf, '\n'); + } +} + +PRINTFUNC (picInline) +{ + dbuf_append_str (dbuf, IC_INLINE (ic)); +} + +PRINTFUNC (picReceive) +{ + dbuf_printOperand (IC_RESULT (ic), dbuf); + dbuf_printf (dbuf, " = %s ", s); + dbuf_printOperand (IC_LEFT (ic), dbuf); + dbuf_append_char (dbuf, '\n'); +} + +PRINTFUNC (picDummyRead) +{ + dbuf_append_char (dbuf, '\t'); + dbuf_printf (dbuf, "%s ", s); + dbuf_printOperand (IC_RIGHT (ic), dbuf); + dbuf_append_char (dbuf, '\n'); +} + +PRINTFUNC (picCritical) +{ + dbuf_append_char (dbuf, '\t'); + if (IC_RESULT (ic)) + dbuf_printOperand (IC_RESULT (ic), dbuf); + else + dbuf_append_str (dbuf, "(stack)"); + dbuf_printf (dbuf, " = %s ", s); + dbuf_append_char (dbuf, '\n'); +} + +PRINTFUNC (picEndCritical) +{ + dbuf_append_char (dbuf, '\t'); + dbuf_printf (dbuf, "%s = ", s); + if (IC_RIGHT (ic)) + dbuf_printOperand (IC_RIGHT (ic), dbuf); + else + dbuf_append_str (dbuf, "(stack)"); + dbuf_append_char (dbuf, '\n'); +} + +/*-----------------------------------------------------------------*/ +/* piCode - prints one iCode */ +/*-----------------------------------------------------------------*/ +int +piCode (void *item, FILE * of) +{ + iCode *ic = item; + iCodeTable *icTab; + struct dbuf_s dbuf; + + if (!of) + of = stdout; + + icTab = getTableEntry (ic->op); + fprintf (of, "%s(%d:%d:%d:%d:%d)\t", + ic->filename, ic->lineno, + ic->seq, ic->key, ic->depth, ic->supportRtn); + dbuf_init (&dbuf, 1024); + icTab->iCodePrint (&dbuf, ic, icTab->printName); + dbuf_write_and_destroy (&dbuf, of); + return 1; +} + +void PICC(iCode *ic) +{ + printiCChain(ic,stdout); +} +/*-----------------------------------------------------------------*/ +/* printiCChain - prints intermediate code for humans */ +/*-----------------------------------------------------------------*/ +void +printiCChain (iCode * icChain, FILE * of) +{ + iCode *loop; + iCodeTable *icTab; + struct dbuf_s dbuf; + + if (!of) + of = stdout; + for (loop = icChain; loop; loop = loop->next) + { + if ((icTab = getTableEntry (loop->op))) + { + fprintf (of, "%s(l%d:s%d:k%d:d%d:s%d)\t", + loop->filename, loop->lineno, + loop->seq, loop->key, loop->depth, loop->supportRtn); + + dbuf_init(&dbuf, 1024); + icTab->iCodePrint (&dbuf, loop, icTab->printName); + dbuf_write_and_destroy (&dbuf, of); + //// + fflush(of); + } + } +} + + +/*-----------------------------------------------------------------*/ +/* newOperand - allocate, init & return a new iCode */ +/*-----------------------------------------------------------------*/ +operand * +newOperand () +{ + operand *op; + + op = Safe_alloc ( sizeof (operand)); + + op->key = 0; + return op; +} + +/*-----------------------------------------------------------------*/ +/* newiCode - create and return a new iCode entry initialised */ +/*-----------------------------------------------------------------*/ +iCode * +newiCode (int op, operand * left, operand * right) +{ + iCode *ic; + + ic = Safe_alloc ( sizeof (iCode)); + + ic->seqPoint = seqPoint; + ic->filename = filename; + ic->lineno = lineno; + ic->block = block; + ic->level = scopeLevel; + ic->op = op; + ic->key = iCodeKey++; + IC_LEFT (ic) = left; + IC_RIGHT (ic) = right; + + return ic; +} + +/*-----------------------------------------------------------------*/ +/* newiCode for conditional statements */ +/*-----------------------------------------------------------------*/ +iCode * +newiCodeCondition (operand * condition, + symbol * trueLabel, + symbol * falseLabel) +{ + iCode *ic; + + if (IS_VOID(operandType(condition))) { + werror(E_VOID_VALUE_USED); + } + + ic = newiCode (IFX, NULL, NULL); + IC_COND (ic) = condition; + IC_TRUE (ic) = trueLabel; + IC_FALSE (ic) = falseLabel; + return ic; +} + +/*-----------------------------------------------------------------*/ +/* newiCodeLabelGoto - unconditional goto statement| label stmnt */ +/*-----------------------------------------------------------------*/ +iCode * +newiCodeLabelGoto (int op, symbol * label) +{ + iCode *ic; + + ic = newiCode (op, NULL, NULL); + ic->op = op; + ic->label = label; + IC_LEFT (ic) = NULL; + IC_RIGHT (ic) = NULL; + IC_RESULT (ic) = NULL; + return ic; +} + +/*-----------------------------------------------------------------*/ +/* newiTemp - allocate & return a newItemp Variable */ +/*-----------------------------------------------------------------*/ +symbol * +newiTemp (char *s) +{ + symbol *itmp; + + if (s) + { + SNPRINTF (buffer, sizeof(buffer), "%s", s); + } + else + { + SNPRINTF (buffer, sizeof(buffer), "iTemp%d", iTempNum++); + } + + itmp = newSymbol (buffer, 1); + strncpyz (itmp->rname, itmp->name, SDCC_NAME_MAX); + itmp->isitmp = 1; + + return itmp; +} + +/*-----------------------------------------------------------------*/ +/* newiTempLabel - creates a temp variable label */ +/*-----------------------------------------------------------------*/ +symbol * +newiTempLabel (char *s) +{ + symbol *itmplbl; + + /* check if this already exists */ + if (s && (itmplbl = findSym (LabelTab, NULL, s))) + return itmplbl; + + if (s) + { + itmplbl = newSymbol (s, 1); + } + else + { + SNPRINTF (buffer, sizeof(buffer), "iTempLbl%d", iTempLblNum++); + itmplbl = newSymbol (buffer, 1); + } + + itmplbl->isitmp = 1; + itmplbl->islbl = 1; + itmplbl->key = labelKey++; + addSym (LabelTab, itmplbl, itmplbl->name, 0, 0, 0); + return itmplbl; +} + +/*-----------------------------------------------------------------*/ +/* newiTempLoopHeaderLabel - creates a new loop header label */ +/*-----------------------------------------------------------------*/ +symbol * +newiTempLoopHeaderLabel (bool pre) +{ + symbol *itmplbl; + + SNPRINTF (buffer, sizeof(buffer), pre ? "preHeaderLbl%d" : LOOPEXITLBL "%d", + iTempLblNum++); + itmplbl = newSymbol (buffer, 1); + + itmplbl->isitmp = 1; + itmplbl->islbl = 1; + itmplbl->key = labelKey++; + addSym (LabelTab, itmplbl, itmplbl->name, 0, 0, 0); + return itmplbl; +} + + +/*-----------------------------------------------------------------*/ +/* initiCode - initialises some iCode related stuff */ +/*-----------------------------------------------------------------*/ +void +initiCode () +{ + +} + +/*-----------------------------------------------------------------*/ +/* copyiCode - make a copy of the iCode given */ +/*-----------------------------------------------------------------*/ +iCode * +copyiCode (iCode * ic) +{ + iCode *nic = newiCode (ic->op, NULL, NULL); + + nic->filename = ic->filename; + nic->lineno = ic->lineno; + nic->block = ic->block; + nic->level = ic->level; + nic->parmBytes = ic->parmBytes; + + /* deal with the special cases first */ + switch (ic->op) + { + case IFX: + IC_COND (nic) = operandFromOperand (IC_COND (ic)); + IC_TRUE (nic) = IC_TRUE (ic); + IC_FALSE (nic) = IC_FALSE (ic); + break; + + case JUMPTABLE: + IC_JTCOND (nic) = operandFromOperand (IC_JTCOND (ic)); + IC_JTLABELS (nic) = IC_JTLABELS (ic); + break; + + case CALL: + case PCALL: + IC_RESULT (nic) = operandFromOperand (IC_RESULT (ic)); + IC_LEFT (nic) = operandFromOperand (IC_LEFT (ic)); + break; + + case INLINEASM: + IC_INLINE (nic) = IC_INLINE (ic); + break; + + case ARRAYINIT: + IC_ARRAYILIST(nic) = IC_ARRAYILIST(ic); + break; + + default: + IC_RESULT (nic) = operandFromOperand (IC_RESULT (ic)); + IC_LEFT (nic) = operandFromOperand (IC_LEFT (ic)); + IC_RIGHT (nic) = operandFromOperand (IC_RIGHT (ic)); + } + + return nic; +} + +/*-----------------------------------------------------------------*/ +/* getTableEntry - gets the table entry for the given operator */ +/*-----------------------------------------------------------------*/ +iCodeTable * +getTableEntry (int oper) +{ + unsigned i; + + for (i = 0; i < (sizeof (codeTable) / sizeof (iCodeTable)); i++) + if (oper == codeTable[i].icode) + return &codeTable[i]; + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* newiTempOperand - new intermediate temp operand */ +/*-----------------------------------------------------------------*/ +operand * +newiTempOperand (sym_link * type, char throwType) +{ + symbol *itmp; + operand *op = newOperand (); + sym_link *etype; + + op->type = SYMBOL; + itmp = newiTemp (NULL); + + etype = getSpec (type); + + if (IS_LITERAL (etype)) + throwType = 0; + + /* copy the type information */ + if (type) + itmp->etype = getSpec (itmp->type = (throwType ? type : + copyLinkChain (type))); + if (IS_LITERAL (itmp->etype)) + { + SPEC_SCLS (itmp->etype) = S_REGISTER; + SPEC_OCLS (itmp->etype) = reg; + } + + op->operand.symOperand = itmp; + op->key = itmp->key = ++operandKey; + return op; +} + +/*-----------------------------------------------------------------*/ +/* operandType - returns the type chain for an operand */ +/*-----------------------------------------------------------------*/ +sym_link * +operandType (operand * op) +{ + /* depending on type of operand */ + switch (op->type) + { + case VALUE: + return op->operand.valOperand->type; + + case SYMBOL: + return op->operand.symOperand->type; + + case TYPE: + return op->operand.typeOperand; + + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + " operand type not known "); + assert (0); /* should never come here */ + /* Just to keep the compiler happy */ + return (sym_link *) 0; + } +} + +/*-----------------------------------------------------------------*/ +/* operandSize - returns size of an operand in bytes */ +/*-----------------------------------------------------------------*/ +unsigned int +operandSize (operand * op) +{ + sym_link *type; + + /* if nothing return 0 */ + if (!op) + return 0; + + type = operandType (op); + if (op->aggr2ptr == 2) + type = type->next; + return getSize (type); +} + +/*-----------------------------------------------------------------*/ +/* isParamterToCall - will return 1 if op is a parameter to args */ +/*-----------------------------------------------------------------*/ +int +isParameterToCall (value * args, operand * op) +{ + value *tval = args; + + wassert (IS_SYMOP(op)); + + while (tval) + { + if (tval->sym && + isSymbolEqual (op->operand.symOperand, tval->sym)) + return 1; + tval = tval->next; + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* isOperandGlobal - return 1 if operand is a global variable */ +/*-----------------------------------------------------------------*/ +int +isOperandGlobal (operand * op) +{ + if (!op) + return 0; + + if (IS_ITEMP (op)) + return 0; + + if (IS_SYMOP(op) && + (op->operand.symOperand->level == 0 || + IS_STATIC (op->operand.symOperand->etype) || + IS_EXTERN (op->operand.symOperand->etype)) + ) + return 1; + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* isOperandVolatile - return 1 if the operand is volatile */ +/*-----------------------------------------------------------------*/ +int +isOperandVolatile (operand * op, bool chkTemp) +{ + sym_link *optype; + sym_link *opetype; + + if (IS_ITEMP (op) && !chkTemp) + return 0; + + opetype = getSpec (optype = operandType (op)); + + if (IS_PTR (optype) && DCL_PTR_VOLATILE (optype)) + return 1; + + if (IS_VOLATILE (opetype)) + return 1; + return 0; +} + +/*-----------------------------------------------------------------*/ +/* isOperandLiteral - returns 1 if an operand contains a literal */ +/*-----------------------------------------------------------------*/ +int +isOperandLiteral (operand * op) +{ + sym_link *opetype; + + if (!op) + return 0; + + opetype = getSpec (operandType (op)); + + if (IS_LITERAL (opetype)) + return 1; + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* isOperandInFarSpace - will return true if operand is in farSpace */ +/*-----------------------------------------------------------------*/ +bool +isOperandInFarSpace (operand * op) +{ + sym_link *etype; + + if (!op) + return FALSE; + + if (!IS_SYMOP (op)) + return FALSE; + + if (!IS_TRUE_SYMOP (op)) + { + if (SPIL_LOC (op)) + etype = SPIL_LOC (op)->etype; + else + return FALSE; + } + else + { + etype = getSpec (operandType (op)); + } + return (IN_FARSPACE (SPEC_OCLS (etype)) ? TRUE : FALSE); +} + +/*-----------------------------------------------------------------*/ +/* isOperandInPagedSpace - return true if operand is in pagedSpace */ +/*-----------------------------------------------------------------*/ +bool +isOperandInPagedSpace (operand * op) +{ + sym_link *etype; + + if (!op) + return FALSE; + + if (!IS_SYMOP (op)) + return FALSE; + + if (!IS_TRUE_SYMOP (op)) + { + if (SPIL_LOC (op)) + etype = SPIL_LOC (op)->etype; + else + return FALSE; + } + else + { + etype = getSpec (operandType (op)); + } + return (IN_PAGEDSPACE (SPEC_OCLS (etype)) ? TRUE : FALSE); +} + +/*------------------------------------------------------------------*/ +/* isOperandInDirSpace - will return true if operand is in dirSpace */ +/*------------------------------------------------------------------*/ +bool +isOperandInDirSpace (operand * op) +{ + sym_link *etype; + + if (!op) + return FALSE; + + if (!IS_SYMOP (op)) + return FALSE; + + if (!IS_TRUE_SYMOP (op)) + { + if (SPIL_LOC (op)) + etype = SPIL_LOC (op)->etype; + else + return FALSE; + } + else + { + etype = getSpec (operandType (op)); + } + return (IN_DIRSPACE (SPEC_OCLS (etype)) ? TRUE : FALSE); +} + +/*--------------------------------------------------------------------*/ +/* isOperandInCodeSpace - will return true if operand is in codeSpace */ +/*--------------------------------------------------------------------*/ +bool +isOperandInCodeSpace (operand * op) +{ + sym_link *etype; + + if (!op) + return FALSE; + + if (!IS_SYMOP (op)) + return FALSE; + + etype = getSpec (operandType (op)); + + if (!IS_TRUE_SYMOP (op)) + { + if (SPIL_LOC (op)) + etype = SPIL_LOC (op)->etype; + else + return FALSE; + } + else + { + etype = getSpec (operandType (op)); + } + return (IN_CODESPACE (SPEC_OCLS (etype)) ? TRUE : FALSE); +} + +/*-----------------------------------------------------------------*/ +/* isOperandOnStack - will return true if operand is on stack */ +/*-----------------------------------------------------------------*/ +bool +isOperandOnStack (operand * op) +{ + sym_link *etype; + + if (!op) + return FALSE; + + if (!IS_SYMOP (op)) + return FALSE; + + etype = getSpec (operandType (op)); + if (IN_STACK (etype) || + OP_SYMBOL(op)->onStack || + (SPIL_LOC(op) && SPIL_LOC(op)->onStack)) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* isOclsExpensive - will return true if accesses to an output */ +/* storage class are expensive */ +/*-----------------------------------------------------------------*/ +bool +isOclsExpensive (struct memmap *oclass) +{ + if (port->oclsExpense) + return port->oclsExpense (oclass) > 0; + + /* In the absence of port specific guidance, assume only */ + /* farspace is expensive. */ + return IN_FARSPACE (oclass); +} + +/*-----------------------------------------------------------------*/ +/* isiCodeInFunctionCall - return TRUE if an iCode is between a */ +/* CALL/PCALL and the first IPUSH/SEND associated with the call */ +/*-----------------------------------------------------------------*/ +int +isiCodeInFunctionCall (iCode * ic) +{ + iCode * lic = ic; + + /* Find the next CALL/PCALL */ + while (lic) + { + if (lic->op == CALL || lic->op == PCALL) + break; + lic = lic->next; + } + + if (!lic) + return FALSE; + + /* A function call was found. Scan backwards and see if an */ + /* IPUSH or SEND is encountered */ + while (ic) + { + if (lic != ic && (ic->op == CALL || ic->op == PCALL)) + return FALSE; + if (ic->op == SEND || (ic->op == IPUSH && ic->parmPush)) + return TRUE; + ic = ic->prev; + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* operandLitValue - literal value of an operand */ +/*-----------------------------------------------------------------*/ +double +operandLitValue (operand * op) +{ + assert (isOperandLiteral (op)); + + return floatFromVal (op->operand.valOperand); +} + +/*-----------------------------------------------------------------*/ +/* getBuiltInParms - returns parameters to a builtin functions */ +/*-----------------------------------------------------------------*/ +iCode *getBuiltinParms (iCode *ic, int *pcount, operand **parms) +{ + sym_link *ftype; + + *pcount = 0; + /* builtin functions uses only SEND for parameters */ + while (ic->op != CALL) { + assert(ic->op == SEND && ic->builtinSEND); + ic->generated = 1; /* mark the icode as generated */ + parms[*pcount] = IC_LEFT(ic); + ic = ic->next; + (*pcount)++; + } + + ic->generated = 1; + /* make sure this is a builtin function call */ + assert(IS_SYMOP(IC_LEFT(ic))); + ftype = operandType(IC_LEFT(ic)); + assert(IFFUNC_ISBUILTIN(ftype)); + return ic; +} + +/*-----------------------------------------------------------------*/ +/* operandOperation - performs operations on operands */ +/*-----------------------------------------------------------------*/ +operand * +operandOperation (operand * left, operand * right, + int op, sym_link * type) +{ + sym_link *let , *ret=NULL; + operand *retval = (operand *) 0; + + assert (isOperandLiteral (left)); + let = getSpec(operandType(left)); + if (right) { + assert (isOperandLiteral (right)); + ret = getSpec(operandType(right)); + } + + switch (op) + { + case '+': + retval = operandFromValue (valCastLiteral (type, + operandLitValue (left) + + operandLitValue (right))); + break; + case '-': + retval = operandFromValue (valCastLiteral (type, + operandLitValue (left) - + operandLitValue (right))); + break; + case '*': + /* + retval = operandFromValue (valCastLiteral (type, + operandLitValue (left) * + operandLitValue (right))); + This could be all we've to do, but with gcc we've to take care about + overflows. Two examples: + ULONG_MAX * ULONG_MAX doesn't fit into a double, some of the least + significant bits are lost (52 in fraction, 63 bits would be + necessary to keep full precision). + If the resulting double value is greater than ULONG_MAX (resp. + USHRT_MAX, ...), then 0 will be assigned to v_ulong (resp. u_uint, ...)! + */ + + /* if it is not a specifier then we can assume that */ + /* it will be an unsigned long */ + if (IS_INT (type) || + !IS_SPEC (type)) + { + /* long is handled here, because it can overflow with double */ + if (IS_LONG (type) || + !IS_SPEC (type)) + /* signed and unsigned mul are the same, as long as the precision + of the result isn't bigger than the precision of the operands. */ + retval = operandFromValue (valCastLiteral (type, + (TYPE_TARGET_ULONG) double2ul (operandLitValue (left)) * + (TYPE_TARGET_ULONG) double2ul (operandLitValue (right)))); + else if (IS_UNSIGNED (type)) /* unsigned int */ + { + /* unsigned int is handled here in order to detect overflow */ + TYPE_TARGET_ULONG ul = (TYPE_TARGET_UINT) double2ul (operandLitValue (left)) * + (TYPE_TARGET_UINT) double2ul (operandLitValue (right)); + + retval = operandFromValue (valCastLiteral (type, (TYPE_TARGET_UINT) ul)); + if (ul != (TYPE_TARGET_UINT) ul) + werror (W_INT_OVL); + } + else /* signed int */ + { + /* signed int is handled here in order to detect overflow */ + TYPE_TARGET_LONG l = (TYPE_TARGET_INT) operandLitValue (left) * + (TYPE_TARGET_INT) operandLitValue (right); + + retval = operandFromValue (valCastLiteral (type, (TYPE_TARGET_INT) l)); + if (l != (TYPE_TARGET_INT) l) + werror (W_INT_OVL); + } + } + else + /* all others go here: */ + retval = operandFromValue (valCastLiteral (type, + operandLitValue (left) * + operandLitValue (right))); + break; + case '/': + if (IS_UNSIGNED (type)) + { + if ((TYPE_TARGET_ULONG) double2ul (operandLitValue (right)) == 0) + { + werror (E_DIVIDE_BY_ZERO); + retval = right; + } + SPEC_USIGN (let) = 1; + SPEC_USIGN (ret) = 1; + retval = operandFromValue (valCastLiteral (type, + (TYPE_TARGET_ULONG) double2ul (operandLitValue (left)) / + (TYPE_TARGET_ULONG) double2ul (operandLitValue (right)))); + } + else + { + if (operandLitValue (right) == 0) + { + werror (E_DIVIDE_BY_ZERO); + retval = right; + } + retval = operandFromValue (valCastLiteral (type, + operandLitValue (left) / + operandLitValue (right))); + } + break; + case '%': + if ((TYPE_TARGET_ULONG) double2ul (operandLitValue (right)) == 0) + { + werror (E_DIVIDE_BY_ZERO); + retval = right; + } + else + { + if (IS_UNSIGNED (type)) + retval = operandFromLit ((TYPE_TARGET_ULONG) double2ul (operandLitValue (left)) % + (TYPE_TARGET_ULONG) double2ul (operandLitValue (right))); + else + retval = operandFromLit ((TYPE_TARGET_LONG) operandLitValue (left) % + (TYPE_TARGET_LONG) operandLitValue (right)); + } + break; + case LEFT_OP: + /* The number of left shifts is always unsigned. Signed doesn't make + sense here. Shifting by a negative number is impossible. */ + retval = operandFromValue (valCastLiteral (type, + ((TYPE_TARGET_ULONG) double2ul (operandLitValue (left)) << + (TYPE_TARGET_ULONG) double2ul (operandLitValue (right))))); + break; + case RIGHT_OP: + /* The number of right shifts is always unsigned. Signed doesn't make + sense here. Shifting by a negative number is impossible. */ + if (IS_UNSIGNED(let)) + /* unsigned: logic shift right */ + retval = operandFromLit ((TYPE_TARGET_ULONG) double2ul (operandLitValue (left)) >> + (TYPE_TARGET_ULONG) double2ul (operandLitValue (right))); + else + /* signed: arithmetic shift right */ + retval = operandFromLit ((TYPE_TARGET_LONG) operandLitValue (left) >> + (TYPE_TARGET_ULONG) double2ul (operandLitValue (right))); + break; + case EQ_OP: + if (IS_FLOAT (let) || IS_FLOAT (ret)) + { + retval = operandFromLit (operandLitValue (left) == + operandLitValue (right)); + } + else if (IS_FIXED16X16 (let) || IS_FIXED16X16 (ret)) + { + retval = operandFromLit (operandLitValue (left) == + operandLitValue (right)); + } + else + { + /* this op doesn't care about signedness */ + TYPE_TARGET_ULONG l, r; + + l = (TYPE_TARGET_ULONG) double2ul (operandLitValue (left)); + r = (TYPE_TARGET_ULONG) double2ul (operandLitValue (right)); + /* In order to correctly compare 'signed int' and 'unsigned int' it's + neccessary to strip them to 16 bit. + Literals are reduced to their cheapest type, therefore left and + right might have different types. It's neccessary to find a + common type: int (used for char too) or long */ + if (!IS_LONG (let) && + !IS_LONG (ret)) + { + r = (TYPE_TARGET_UINT) r; + l = (TYPE_TARGET_UINT) l; + } + retval = operandFromLit (l == r); + } + break; + case '<': + retval = operandFromLit (operandLitValue (left) < + operandLitValue (right)); + break; + case LE_OP: + retval = operandFromLit (operandLitValue (left) <= + operandLitValue (right)); + break; + case NE_OP: + retval = operandFromLit (operandLitValue (left) != + operandLitValue (right)); + break; + case '>': + retval = operandFromLit (operandLitValue (left) > + operandLitValue (right)); + break; + case GE_OP: + retval = operandFromLit (operandLitValue (left) >= + operandLitValue (right)); + break; + case BITWISEAND: + retval = operandFromValue (valCastLiteral (type, + (TYPE_TARGET_ULONG) double2ul (operandLitValue(left)) & + (TYPE_TARGET_ULONG) double2ul (operandLitValue(right)))); + break; + case '|': + retval = operandFromValue (valCastLiteral (type, + (TYPE_TARGET_ULONG) double2ul (operandLitValue(left)) | + (TYPE_TARGET_ULONG) double2ul (operandLitValue(right)))); + break; + case '^': + retval = operandFromValue (valCastLiteral (type, + (TYPE_TARGET_ULONG) double2ul (operandLitValue(left)) ^ + (TYPE_TARGET_ULONG) double2ul (operandLitValue(right)))); + break; + case AND_OP: + retval = operandFromLit (operandLitValue (left) && + operandLitValue (right)); + break; + case OR_OP: + retval = operandFromLit (operandLitValue (left) || + operandLitValue (right)); + break; + case RRC: + { + TYPE_TARGET_ULONG i = (TYPE_TARGET_ULONG) double2ul (operandLitValue (left)); + + retval = operandFromLit ((i >> (getSize (operandType (left)) * 8 - 1)) | + (i << 1)); + } + break; + case RLC: + { + TYPE_TARGET_ULONG i = (TYPE_TARGET_ULONG) double2ul (operandLitValue (left)); + + retval = operandFromLit ((i << (getSize (operandType (left)) * 8 - 1)) | + (i >> 1)); + } + break; + case GETABIT: + retval = operandFromLit (((TYPE_TARGET_ULONG) double2ul (operandLitValue(left)) >> + (TYPE_TARGET_ULONG) double2ul (operandLitValue(right))) & 1); + break; + case GETBYTE: + retval = operandFromLit (((TYPE_TARGET_ULONG) double2ul (operandLitValue(left)) >> + (TYPE_TARGET_ULONG) double2ul (operandLitValue(right)) & 0xFF)); + break; + case GETWORD: + retval = operandFromLit (((TYPE_TARGET_ULONG) double2ul (operandLitValue(left)) >> + (TYPE_TARGET_ULONG) double2ul (operandLitValue(right)) & 0xFFFF)); + break; + + case GETHBIT: + retval = operandFromLit (((TYPE_TARGET_ULONG) double2ul (operandLitValue(left)) >> + ((getSize (let) * 8) - 1)) & 1); + break; + + case UNARYMINUS: + retval = operandFromValue (valCastLiteral (type, + -1 * operandLitValue (left))); + break; + + case '~': + retval = operandFromValue (valCastLiteral (type, + ~((TYPE_TARGET_ULONG) double2ul (operandLitValue (left))))); + break; + + case '!': + retval = operandFromLit (!operandLitValue (left)); + break; + + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + " operandOperation invalid operator "); + assert (0); + } + + return retval; +} + + +/*-----------------------------------------------------------------*/ +/* isOperandEqual - compares two operand & return 1 if they r = */ +/*-----------------------------------------------------------------*/ +int +isOperandEqual (operand * left, operand * right) +{ + /* if the pointers are equal then they are equal */ + if (left == right) + return 1; + + /* if either of them null then false */ + if (!left || !right) + return 0; + + if (left->type != right->type) + return 0; + + if (IS_SYMOP (left) && IS_SYMOP (right)) + return left->key == right->key; + + /* if types are the same */ + switch (left->type) + { + case SYMBOL: + return isSymbolEqual (left->operand.symOperand, + right->operand.symOperand); + case VALUE: + return (compareType (left->operand.valOperand->type, + right->operand.valOperand->type) && + (floatFromVal (left->operand.valOperand) == + floatFromVal (right->operand.valOperand))); + case TYPE: + if (compareType (left->operand.typeOperand, + right->operand.typeOperand) == 1) + return 1; + } + + return 0; +} + +/*-------------------------------------------------------------------*/ +/* isiCodeEqual - compares two iCodes are equal, returns true if yes */ +/*-------------------------------------------------------------------*/ +int +isiCodeEqual (iCode * left, iCode * right) +{ + /* if the same pointer */ + if (left == right) + return 1; + + /* if either of them null */ + if (!left || !right) + return 0; + + /* if operand are the same */ + if (left->op == right->op) + { + + /* compare all the elements depending on type */ + if (left->op != IFX) + { + if (!isOperandEqual (IC_LEFT (left), IC_LEFT (right))) + return 0; + if (!isOperandEqual (IC_RIGHT (left), IC_RIGHT (right))) + return 0; + + } + else + { + if (!isOperandEqual (IC_COND (left), IC_COND (right))) + return 0; + if (!isSymbolEqual (IC_TRUE (left), IC_TRUE (right))) + return 0; + if (!isSymbolEqual (IC_FALSE (left), IC_FALSE (right))) + return 0; + } + + return 1; + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* newiTempFromOp - create a temp Operand with same attributes */ +/*-----------------------------------------------------------------*/ +operand * +newiTempFromOp (operand * op) +{ + operand *nop; + + if (!op) + return NULL; + + if (!IS_ITEMP (op)) + return op; + + nop = newiTempOperand (operandType (op), TRUE); + nop->isaddr = op->isaddr; + nop->isvolatile = op->isvolatile; + nop->isGlobal = op->isGlobal; + nop->isLiteral = op->isLiteral; + nop->usesDefs = op->usesDefs; + nop->isParm = op->isParm; + return nop; +} + +/*-----------------------------------------------------------------*/ +/* operand from operand - creates an operand holder for the type */ +/*-----------------------------------------------------------------*/ +operand * +operandFromOperand (operand * op) +{ + operand *nop; + + if (!op) + return NULL; + nop = newOperand (); + nop->type = op->type; + nop->isaddr = op->isaddr; + nop->key = op->key; + nop->isvolatile = op->isvolatile; + nop->isGlobal = op->isGlobal; + nop->isLiteral = op->isLiteral; + nop->usesDefs = op->usesDefs; + nop->isParm = op->isParm; + + switch (nop->type) + { + case SYMBOL: + nop->operand.symOperand = op->operand.symOperand; + break; + case VALUE: + nop->operand.valOperand = op->operand.valOperand; + break; + case TYPE: + nop->operand.typeOperand = op->operand.typeOperand; + break; + } + + return nop; +} + +/*-----------------------------------------------------------------*/ +/* opFromOpWithDU - makes a copy of the operand and DU chains */ +/*-----------------------------------------------------------------*/ +operand * +opFromOpWithDU (operand * op, bitVect * defs, bitVect * uses) +{ + operand *nop = operandFromOperand (op); + + if (nop->type == SYMBOL) + { + OP_SYMBOL (nop)->defs = bitVectCopy (defs); + OP_SYMBOL (nop)->uses = bitVectCopy (uses); + } + + return nop; +} + +/*-----------------------------------------------------------------*/ +/* operandFromSymbol - creates an operand from a symbol */ +/*-----------------------------------------------------------------*/ +operand * +operandFromSymbol (symbol * sym) +{ + operand *op; + iCode *ic; + int ok = 1; + /* if the symbol's type is a literal */ + /* then it is an enumerator type */ + if (IS_LITERAL (sym->etype) && SPEC_ENUM (sym->etype)) + return operandFromValue (valFromType (sym->etype)); + + if (!sym->key) + sym->key = ++operandKey; + + /* if this an implicit variable, means struct/union */ + /* member so just return it */ + if (sym->implicit || IS_FUNC (sym->type)) + { + op = newOperand (); + op->type = SYMBOL; + op->operand.symOperand = sym; + op->key = sym->key; + op->isvolatile = isOperandVolatile (op, TRUE); + op->isGlobal = isOperandGlobal (op); + return op; + } + + /* under the following conditions create a + register equivalent for a local symbol */ + if (sym->level && sym->etype && SPEC_OCLS (sym->etype) && + (IN_FARSPACE (SPEC_OCLS (sym->etype)) && + !TARGET_IS_HC08 && + (!(options.model == MODEL_FLAT24)) ) && + options.stackAuto == 0) + ok = 0; + + if (!IS_AGGREGATE (sym->type) && /* not an aggregate */ + !IS_FUNC (sym->type) && /* not a function */ + !sym->_isparm && /* not a parameter */ + IS_AUTO (sym) && /* is a local auto variable */ + !sym->addrtaken && /* whose address has not been taken */ + !sym->reqv && /* does not already have a reg equivalence */ + !IS_VOLATILE (sym->etype) && /* not declared as volatile */ + !sym->islbl && /* not a label */ + ok /* farspace check */ + ) + { + + /* we will use it after all optimizations + and before liveRange calculation */ + sym->reqv = newiTempOperand (sym->type, 0); + sym->reqv->key = sym->key; + OP_SYMBOL (sym->reqv)->prereqv = sym; + OP_SYMBOL (sym->reqv)->key = sym->key; + OP_SYMBOL (sym->reqv)->isreqv = 1; + OP_SYMBOL (sym->reqv)->islocal = 1; + OP_SYMBOL (sym->reqv)->onStack = sym->onStack; + SPIL_LOC (sym->reqv) = sym; + } + + if (!IS_AGGREGATE (sym->type)) + { + op = newOperand (); + op->type = SYMBOL; + op->operand.symOperand = sym; + op->isaddr = 1; + op->key = sym->key; + op->isvolatile = isOperandVolatile (op, TRUE); + op->isGlobal = isOperandGlobal (op); + op->isPtr = IS_PTR (operandType (op)); + op->isParm = sym->_isparm; + return op; + } + + /* create :- */ + /* itemp = &[_symbol] */ + + ic = newiCode (ADDRESS_OF, newOperand (), NULL); + IC_LEFT (ic)->type = SYMBOL; + IC_LEFT (ic)->operand.symOperand = sym; + IC_LEFT (ic)->key = sym->key; + (IC_LEFT (ic))->isvolatile = isOperandVolatile (IC_LEFT (ic), TRUE); + (IC_LEFT (ic))->isGlobal = isOperandGlobal (IC_LEFT (ic)); + IC_LEFT (ic)->isPtr = IS_PTR (operandType (IC_LEFT (ic))); + + /* create result */ + IC_RESULT (ic) = newiTempOperand (sym->type, 0); + if (IS_ARRAY (sym->type)) + { + IC_RESULT (ic) = geniCodeArray2Ptr (IC_RESULT (ic)); + IC_RESULT (ic)->isaddr = 0; + } + else + IC_RESULT (ic)->isaddr = (!IS_AGGREGATE (sym->type)); + + ADDTOCHAIN (ic); + + return IC_RESULT (ic); +} + +/*-----------------------------------------------------------------*/ +/* operandFromValue - creates an operand from value */ +/*-----------------------------------------------------------------*/ +operand * +operandFromValue (value * val) +{ + operand *op; + + /* if this is a symbol then do the symbol thing */ + if (val->sym) + return operandFromSymbol (val->sym); + + /* this is not a symbol */ + op = newOperand (); + op->type = VALUE; + op->operand.valOperand = val; + op->isLiteral = isOperandLiteral (op); + return op; +} + +/*-----------------------------------------------------------------*/ +/* operandFromLink - operand from typeChain */ +/*-----------------------------------------------------------------*/ +operand * +operandFromLink (sym_link * type) +{ + operand *op; + + /* operand from sym_link */ + if (!type) + return NULL; + + op = newOperand (); + op->type = TYPE; + op->operand.typeOperand = copyLinkChain (type); + return op; +} + +/*-----------------------------------------------------------------*/ +/* operandFromLit - makes an operand from a literal value */ +/*-----------------------------------------------------------------*/ +operand * +operandFromLit (double i) +{ + return operandFromValue (valueFromLit (i)); +} + +/*-----------------------------------------------------------------*/ +/* operandFromAst - creates an operand from an ast */ +/*-----------------------------------------------------------------*/ +operand * +operandFromAst (ast * tree,int lvl) +{ + + if (!tree) + return NULL; + + /* depending on type do */ + switch (tree->type) + { + case EX_OP: + return ast2iCode (tree,lvl+1); + break; + + case EX_VALUE: + return operandFromValue (tree->opval.val); + break; + + case EX_LINK: + return operandFromLink (tree->opval.lnk); + break; + + default: + assert (0); + } + + /* Just to keep the compiler happy */ + return (operand *) 0; +} + +/*-----------------------------------------------------------------*/ +/* setOperandType - sets the operand's type to the given type */ +/*-----------------------------------------------------------------*/ +void +setOperandType (operand * op, sym_link * type) +{ + /* depending on the type of operand */ + switch (op->type) + { + + case VALUE: + op->operand.valOperand->etype = + getSpec (op->operand.valOperand->type = + copyLinkChain (type)); + return; + + case SYMBOL: + if (op->operand.symOperand->isitmp) + op->operand.symOperand->etype = + getSpec (op->operand.symOperand->type = + copyLinkChain (type)); + else + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "attempt to modify type of source"); + return; + + case TYPE: + op->operand.typeOperand = copyLinkChain (type); + return; + } + +} + +/*-----------------------------------------------------------------*/ +/* Get size in byte of ptr need to access an array */ +/*-----------------------------------------------------------------*/ +static unsigned int +getArraySizePtr (operand * op) +{ + sym_link *ltype = operandType(op); + + if(IS_PTR(ltype)) + { + int size = getSize(ltype); + return((IS_GENPTR(ltype) && GPTRSIZE > FPTRSIZE) ? (size-1) : size); + } + + if(IS_ARRAY(ltype)) + { + sym_link *letype = getSpec(ltype); + switch (PTR_TYPE (SPEC_OCLS (letype))) + { + case IPOINTER: + case PPOINTER: + case POINTER: + return (PTRSIZE); + case EEPPOINTER: + case FPOINTER: + case CPOINTER: + case FUNCTION: + return (FPTRSIZE); + case GPOINTER: + if (GPTRSIZE > FPTRSIZE) + return (GPTRSIZE-1); + else + return (FPTRSIZE); + + default: + return (FPTRSIZE); + } + } + return (FPTRSIZE); +} + +/*-----------------------------------------------------------------*/ +/* perform "usual unary conversions" */ +/*-----------------------------------------------------------------*/ +#if 0 +static operand * +usualUnaryConversions (operand * op) +{ + if (IS_INTEGRAL (operandType (op))) + { + if (getSize (operandType (op)) < (unsigned int) INTSIZE) + { + /* Widen to int. */ + return geniCodeCast (INTTYPE, op, TRUE); + } + } + return op; +} +#endif + +/*-----------------------------------------------------------------*/ +/* perform "usual binary conversions" */ +/*-----------------------------------------------------------------*/ + +static sym_link * +usualBinaryConversions (operand ** op1, operand ** op2, + RESULT_TYPE resultType, int op) +{ + sym_link *ctype; + sym_link *rtype = operandType (*op2); + sym_link *ltype = operandType (*op1); + + ctype = computeType (ltype, rtype, resultType, op); + + switch (op) + { + case '*': + case '/': + case '%': + if (IS_CHAR (getSpec (ltype)) && IS_CHAR (getSpec (rtype))) + { + /* one byte operations: keep signedness for code generator */ + return ctype; + } + break; + default: + break; + } + + *op1 = geniCodeCast (ctype, *op1, TRUE); + *op2 = geniCodeCast (ctype, *op2, TRUE); + + return ctype; +} + +/*-----------------------------------------------------------------*/ +/* geniCodeValueAtAddress - generate intermeditate code for value */ +/* at address */ +/*-----------------------------------------------------------------*/ +operand * +geniCodeRValue (operand * op, bool force) +{ + iCode *ic; + sym_link *type = operandType (op); + sym_link *etype = getSpec (type); + + /* if this is an array & already */ + /* an address then return this */ + if (IS_AGGREGATE (type) || + (IS_PTR (type) && !force && !op->isaddr)) + return operandFromOperand (op); + + /* if this is not an address then must be */ + /* rvalue already so return this one */ + if (!op->isaddr) + return op; + + /* if this is not a temp symbol then */ + if (!IS_ITEMP (op) && + !force && + !(IN_FARSPACE (SPEC_OCLS (etype)) && !TARGET_IS_HC08)) + { + op = operandFromOperand (op); + op->isaddr = 0; + return op; + } + + if (IS_SPEC (type) && + IS_TRUE_SYMOP (op) && + (!(IN_FARSPACE (SPEC_OCLS (etype)) && !TARGET_IS_HC08) || + (options.model == MODEL_FLAT24) )) + { + op = operandFromOperand (op); + op->isaddr = 0; + return op; + } + + ic = newiCode (GET_VALUE_AT_ADDRESS, op, NULL); + if (IS_PTR (type) && op->isaddr && force) + type = type->next; + + type = copyLinkChain (type); + + IC_RESULT (ic) = newiTempOperand (type, 1); + IC_RESULT (ic)->isaddr = 0; + +/* ic->supportRtn = ((IS_GENPTR(type) | op->isGptr) & op->isaddr); */ + + ADDTOCHAIN (ic); + + return IC_RESULT (ic); +} + +static DECLARATOR_TYPE +getPtrType(sym_link *type) +{ + //for Z80 anything goes + if (TARGET_Z80_LIKE) + return POINTER; + + //preserve original behaviour for PIC16 + if (TARGET_IS_PIC16) + return POINTER; + + //for HC08 only zeropage ptr is different + if (TARGET_IS_HC08) + { + if (IS_DATA_PTR (type)) + return POINTER; + else + return FPOINTER; + } + + if (IS_DATA_PTR (type) && TARGET_MCS51_LIKE) + return IPOINTER; + if (IS_PTR (type)) + return DCL_TYPE (type); + else if (IS_FUNC (type)) + return CPOINTER; + else if (IS_ARRAY (type)) + return PTR_TYPE (SPEC_OCLS (getSpec (type))); + return UPOINTER; +} + +/*-----------------------------------------------------------------*/ +/* geniCodeCast - changes the value from one type to another */ +/*-----------------------------------------------------------------*/ +static operand * +geniCodeCast (sym_link * type, operand * op, bool implicit) +{ + iCode *ic; + sym_link *optype; + sym_link *opetype = getSpec (optype = operandType (op)); + sym_link *restype; + int errors=0; + + /* one of them has size zero then error */ + if (IS_VOID (optype)) + { + werror (E_CAST_ZERO); + return op; + } + + if (IS_ITEMP (op) && IS_ARRAY (OP_SYMBOL (op)->type)) + { + geniCodeArray2Ptr (op); + op->isaddr = 0; + } + + /* if the operand is already the desired type then do nothing */ + if (compareType (type, optype) == 1) + return op; + + /* if this is a literal then just change the type & return */ + if (IS_LITERAL (opetype) && op->type == VALUE && !IS_PTR (type) && !IS_PTR (optype)) + { + return operandFromValue (valCastLiteral (type, operandLitValue (op))); + } + + /* if casting to/from pointers, do some checking */ + if (IS_PTR(type)) { // to a pointer + if (!IS_PTR(optype) && !IS_FUNC(optype) && !IS_AGGREGATE(optype)) { // from a non pointer + if (IS_INTEGRAL(optype)) { + // maybe this is NULL, than it's ok. + if (!(IS_LITERAL(optype) && (SPEC_CVAL(optype).v_ulong ==0))) { + if (port->s.gptr_size > port->s.fptr_size && IS_GENPTR(type)) { + // no way to set the storage + if (IS_LITERAL(optype)) { + werror(E_LITERAL_GENERIC); + errors++; + } else { + werror(E_NONPTR2_GENPTR); + errors++; + } + } else if (implicit) { + werror(W_INTEGRAL2PTR_NOCAST); + errors++; + } + } + } else { + // shouldn't do that with float, array or structure unless to void + if (!IS_VOID(getSpec(type)) && + !(IS_CODEPTR(type) && IS_FUNC(type->next) && IS_FUNC(optype))) { + werror(E_INCOMPAT_TYPES); + errors++; + } + } + } else { // from a pointer to a pointer + if (IS_GENPTR(type) && IS_VOID(type->next)) + { // cast to void* is always allowed + } + else if (IS_GENPTR(optype) && IS_VOID(optype->next)) + { // cast from void* is always allowed + } + else if (port->s.gptr_size > port->s.fptr_size /*!TARGET_IS_Z80 && !TARGET_IS_GBZ80*/) { + // if not a pointer to a function + if (!(IS_CODEPTR(type) && IS_FUNC(type->next) && IS_FUNC(optype))) { + if (implicit) { // if not to generic, they have to match + if (!IS_GENPTR(type) && + !((DCL_TYPE(optype) == DCL_TYPE(type)) || + ((DCL_TYPE(optype) == POINTER) && (DCL_TYPE(type) == IPOINTER)) + ) + ) + { + werror(E_INCOMPAT_PTYPES); + errors++; + } + } + } + } + } + } else { // to a non pointer + if (IS_PTR(optype)) { // from a pointer + if (implicit) { // sneaky + if (IS_INTEGRAL(type)) { + werror(W_PTR2INTEGRAL_NOCAST); + errors++; + } else { // shouldn't do that with float, array or structure + werror(E_INCOMPAT_TYPES); + errors++; + } + } + } + } + if (errors) { + printFromToType (optype, type); + } + + /* if they are the same size create an assignment */ + + /* This seems very dangerous to me, since there are several */ + /* optimizations (for example, gcse) that don't notice the */ + /* cast hidden in this assignment and may simplify an */ + /* iCode to use the original (uncasted) operand. */ + /* Unfortunately, other things break when this cast is */ + /* made explicit. Need to fix this someday. */ + /* -- EEP, 2004/01/21 */ + if (getSize (type) == getSize (optype) && + !IS_BITFIELD (type) && + !IS_FLOAT (type) && + !IS_FLOAT (optype) && + !IS_FIXED (type) && + !IS_FIXED (optype) && + ((IS_SPEC (type) && IS_SPEC (optype)) || + (IS_DECL (type) && IS_DECL (optype) && getPtrType (type) == getPtrType (optype)))) + { + ic = newiCode ('=', NULL, op); + IC_RESULT (ic) = newiTempOperand (type, 0); + if (IS_TRUE_SYMOP (op) && !IS_VOLATILE (optype)) + SPIL_LOC (IC_RESULT (ic)) = OP_SYMBOL (op); + IC_RESULT (ic)->isaddr = 0; + } + else + { + ic = newiCode (CAST, operandFromLink (type), + geniCodeRValue (op, FALSE)); + + IC_RESULT (ic) = newiTempOperand (type, 0); + } + + /* preserve the storage class & output class */ + /* of the original variable */ + restype = getSpec (operandType (IC_RESULT (ic))); + if (!IS_LITERAL(opetype) && + !IS_BIT(opetype)) + { + SPEC_SCLS (restype) = SPEC_SCLS (opetype); + SPEC_OCLS (restype) = SPEC_OCLS (opetype); + } + ADDTOCHAIN (ic); + return IC_RESULT (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeLabel - will create a Label */ +/*-----------------------------------------------------------------*/ +void +geniCodeLabel (symbol * label) +{ + iCode *ic; + + ic = newiCodeLabelGoto (LABEL, label); + ADDTOCHAIN (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeGoto - will create a Goto */ +/*-----------------------------------------------------------------*/ +void +geniCodeGoto (symbol * label) +{ + iCode *ic; + + ic = newiCodeLabelGoto (GOTO, label); + ADDTOCHAIN (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeMultiply - gen intermediate code for multiplication */ +/*-----------------------------------------------------------------*/ +static operand * +geniCodeMultiply (operand * left, operand * right, RESULT_TYPE resultType) +{ + iCode *ic; + int p2 = 0; + sym_link *resType; + LRTYPE; + + /* if they are both literal then we know the result */ + if (IS_LITERAL (letype) && IS_LITERAL (retype)) + return operandFromValue (valMult (left->operand.valOperand, + right->operand.valOperand)); + + if (IS_LITERAL(retype)) { + p2 = powof2 ((TYPE_TARGET_ULONG) ulFromVal (right->operand.valOperand)); + } + + resType = usualBinaryConversions (&left, &right, resultType, '*'); +#if 1 + rtype = operandType (right); + retype = getSpec (rtype); + ltype = operandType (left); + letype = getSpec (ltype); +#endif + + /* if the right is a literal & power of 2 */ + /* then make it a left shift */ + /* code generated for 1 byte * 1 byte literal = 2 bytes result is more + efficient in most cases than 2 bytes result = 2 bytes << literal + if port has 1 byte muldiv */ + if ((p2 > 0) && !IS_FLOAT (letype) && !IS_FIXED (letype) + && !((resultType == RESULT_TYPE_INT) && (getSize (resType) != getSize (ltype)) + && (port->support.muldiv == 1)) + && strcmp (port->target, "pic16") != 0 /* don't shift for pic */ + && strcmp (port->target, "pic14") != 0) + { + if ((resultType == RESULT_TYPE_INT) && (getSize (resType) != getSize (ltype))) + { + /* LEFT_OP need same size for left and result, */ + left = geniCodeCast (resType, left, TRUE); + ltype = operandType (left); + } + ic = newiCode (LEFT_OP, left, operandFromLit (p2)); /* left shift */ + } + else + { + /* if the size left or right > 1 then support routine */ + if (getSize (ltype) > 1 || getSize (rtype) > 1) + { + if (IS_LITERAL (retype)) + ic = newiCode ('*', right, left); /* multiplication by support routine with one literal */ + else + ic = newiCode ('*', left, right); /* multiplication by support routine */ + ic->supportRtn = 1; + } + else + { + ic = newiCode ('*', left, right); /* normal multiplication */ + } + } + IC_RESULT (ic) = newiTempOperand (resType, 1); + + ADDTOCHAIN (ic); + return IC_RESULT (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeDivision - gen intermediate code for division */ +/*-----------------------------------------------------------------*/ +static operand * +geniCodeDivision (operand * left, operand * right, RESULT_TYPE resultType) +{ + iCode *ic; + int p2 = 0; + sym_link *resType; + sym_link *rtype = operandType (right); + sym_link *retype = getSpec (rtype); + sym_link *ltype = operandType (left); + sym_link *letype = getSpec (ltype); + + resType = usualBinaryConversions (&left, &right, resultType, '/'); + + /* if the right is a literal & power of 2 + and left is unsigned then make it a + right shift */ + if (IS_LITERAL (retype) && + !IS_FLOAT (letype) && + !IS_FIXED (letype) && + IS_UNSIGNED(letype) && + ((p2 = powof2 ((TYPE_TARGET_ULONG) ulFromVal (right->operand.valOperand))) > 0)) { + ic = newiCode (RIGHT_OP, left, operandFromLit (p2)); /* right shift */ + } + else + { + ic = newiCode ('/', left, right); /* normal division */ + /* if the size left or right > 1 then support routine */ + if (getSize (ltype) > 1 || getSize (rtype) > 1) + ic->supportRtn = 1; + } + IC_RESULT (ic) = newiTempOperand (resType, 0); + + ADDTOCHAIN (ic); + return IC_RESULT (ic); +} +/*-----------------------------------------------------------------*/ +/* geniCodeModulus - gen intermediate code for modulus */ +/*-----------------------------------------------------------------*/ +static operand * +geniCodeModulus (operand * left, operand * right, RESULT_TYPE resultType) +{ + iCode *ic; + sym_link *resType; + LRTYPE; + + /* if they are both literal then we know the result */ + if (IS_LITERAL (letype) && IS_LITERAL (retype)) + return operandFromValue (valMod (left->operand.valOperand, + right->operand.valOperand)); + + resType = usualBinaryConversions (&left, &right, resultType, '%'); + + /* now they are the same size */ + ic = newiCode ('%', left, right); + + /* if the size left or right > 1 then support routine */ + if (getSize (ltype) > 1 || getSize (rtype) > 1) + ic->supportRtn = 1; + IC_RESULT (ic) = newiTempOperand (resType, 0); + + ADDTOCHAIN (ic); + return IC_RESULT (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodePtrPtrSubtract - subtracts pointer from pointer */ +/*-----------------------------------------------------------------*/ +operand * +geniCodePtrPtrSubtract (operand * left, operand * right) +{ + iCode *ic; + operand *result; + LRTYPE; + + /* if they are both literals then */ + if (IS_LITERAL (letype) && IS_LITERAL (retype)) + { + result = operandFromValue (valMinus (left->operand.valOperand, + right->operand.valOperand)); + goto subtractExit; + } + + ic = newiCode ('-', left, right); + + IC_RESULT (ic) = result = newiTempOperand (newIntLink (), 1); + ADDTOCHAIN (ic); + +subtractExit: + if (IS_VOID(ltype->next) || IS_VOID(rtype->next)) { + return result; + } + + // should we really do this? is this ANSI? + return geniCodeDivision (result, + operandFromLit (getSize (ltype->next)), + FALSE); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeSubtract - generates code for subtraction */ +/*-----------------------------------------------------------------*/ +static operand * +geniCodeSubtract (operand * left, operand * right, RESULT_TYPE resultType) +{ + iCode *ic; + int isarray = 0; + sym_link *resType; + LRTYPE; + + /* if they both pointers then */ + if ((IS_PTR (ltype) || IS_ARRAY (ltype)) && + (IS_PTR (rtype) || IS_ARRAY (rtype))) + return geniCodePtrPtrSubtract (left, right); + + /* if they are both literal then we know the result */ + if (IS_LITERAL (letype) && IS_LITERAL (retype) + && left->isLiteral && right->isLiteral) + return operandFromValue (valMinus (left->operand.valOperand, + right->operand.valOperand)); + + /* if left is an array or pointer */ + if (IS_PTR (ltype) || IS_ARRAY (ltype)) + { + isarray = left->isaddr; + right = geniCodeMultiply (right, + operandFromLit (getSize (ltype->next)), + (getArraySizePtr(left) >= INTSIZE) ? + RESULT_TYPE_INT : + RESULT_TYPE_CHAR); + resType = copyLinkChain (IS_ARRAY (ltype) ? ltype->next : ltype); + } + else + { /* make them the same size */ + resType = usualBinaryConversions (&left, &right, resultType, '-'); + } + + ic = newiCode ('-', left, right); + + IC_RESULT (ic) = newiTempOperand (resType, 1); + IC_RESULT (ic)->isaddr = (isarray ? 1 : 0); + + /* if left or right is a float */ + if (IS_FLOAT (ltype) || IS_FLOAT (rtype) + || IS_FIXED (ltype) || IS_FIXED (rtype)) + ic->supportRtn = 1; + + ADDTOCHAIN (ic); + return IC_RESULT (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeAdd - generates iCode for addition */ +/*-----------------------------------------------------------------*/ +static operand * +geniCodeAdd (operand * left, operand * right, RESULT_TYPE resultType, int lvl) +{ + iCode *ic; + sym_link *resType; + operand *size; + int isarray = 0; + bool indexUnsigned; + LRTYPE; + + /* if the right side is LITERAL zero */ + /* return the left side */ + if (IS_LITERAL (retype) && right->isLiteral && !floatFromVal (valFromType (rtype))) + return left; + + /* if left is literal zero return right */ + if (IS_LITERAL (letype) && left->isLiteral && !floatFromVal (valFromType (ltype))) + return right; + + /* if left is a pointer then size */ + if (IS_PTR (ltype) || IS_ARRAY(ltype)) + { + isarray = left->isaddr; + // there is no need to multiply with 1 + if (getSize (ltype->next) != 1) + { + size = operandFromLit (getSize (ltype->next)); + SPEC_USIGN (getSpec (operandType (size))) = 1; + indexUnsigned = IS_UNSIGNED (getSpec (operandType (right))); + right = geniCodeMultiply (right, size, resultType); + /* Even if right is a 'unsigned char', + the result will be a 'signed int' due to the promotion rules. + It doesn't make sense when accessing arrays, so let's fix it here: */ + if (indexUnsigned) + SPEC_USIGN (getSpec (operandType (right))) = 1; + } + resType = copyLinkChain (ltype); + } + else + { // make them the same size + resType = usualBinaryConversions (&left, &right, resultType, '+'); + } + + /* if they are both literals then we know */ + if (IS_LITERAL (letype) && IS_LITERAL (retype) + && left->isLiteral && right->isLiteral) + return operandFromValue (valPlus (valFromType (ltype), + valFromType (rtype))); + + ic = newiCode ('+', left, right); + + IC_RESULT (ic) = newiTempOperand (resType, 1); + IC_RESULT (ic)->isaddr = (isarray ? 1 : 0); + + /* if left or right is a float then support + routine */ + if (IS_FLOAT (ltype) || IS_FLOAT (rtype) + || IS_FIXED (ltype) || IS_FIXED (rtype)) + ic->supportRtn = 1; + + ADDTOCHAIN (ic); + + return IC_RESULT (ic); + +} + +/*-----------------------------------------------------------------*/ +/* aggrToPtr - changes an "aggregate" to a "pointer to aggregate" */ +/*-----------------------------------------------------------------*/ +sym_link * +aggrToPtr (sym_link * type, bool force) +{ + sym_link *etype; + sym_link *ptype; + + if (IS_PTR (type) && !force) + return type; + + etype = getSpec (type); + ptype = newLink (DECLARATOR); + + ptype->next = type; + + /* set the pointer depending on the storage class */ + DCL_TYPE (ptype) = PTR_TYPE (SPEC_OCLS (etype)); + return ptype; +} + +/*------------------------------------------------------------------*/ +/* aggrToPtrDclType - like aggrToPtr, but returns only the DCL_TYPE */ +/*------------------------------------------------------------------*/ +int +aggrToPtrDclType (sym_link * type, bool force) +{ + if (IS_PTR (type) && !force) + return DCL_TYPE (type); + + /* return the pointer depending on the storage class */ + return PTR_TYPE (SPEC_OCLS (getSpec (type))); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeArray2Ptr - array to pointer */ +/*-----------------------------------------------------------------*/ +static operand * +geniCodeArray2Ptr (operand * op) +{ + sym_link *optype = operandType (op); + sym_link *opetype = getSpec (optype); + + /* set the pointer depending on the storage class */ + DCL_TYPE (optype) = PTR_TYPE (SPEC_OCLS (opetype)); + + op->isaddr = 0; + return op; +} + + +/*-----------------------------------------------------------------*/ +/* geniCodeArray - array access */ +/*-----------------------------------------------------------------*/ +static operand * +geniCodeArray (operand * left, operand * right, int lvl) +{ + iCode *ic; + operand *size; + sym_link *ltype = operandType (left); + bool indexUnsigned; + RESULT_TYPE resultType; + + resultType = (getArraySizePtr(left) >= INTSIZE) ? RESULT_TYPE_INT : RESULT_TYPE_CHAR; + if (DCL_ELEM (ltype)) + { + if (DCL_ELEM (ltype) * getSize (ltype->next) <= 255) + resultType = RESULT_TYPE_CHAR; + } + + if (IS_PTR (ltype)) + { + if (IS_PTR (ltype->next) && left->isaddr) + { + left = geniCodeRValue (left, FALSE); + } + + return geniCodeDerefPtr (geniCodeAdd (left, right, resultType, lvl), + lvl); + } + size = operandFromLit (getSize (ltype->next)); + SPEC_USIGN (getSpec (operandType (size))) = 1; + indexUnsigned = IS_UNSIGNED (getSpec (operandType (right))); + right = geniCodeMultiply (right, size, resultType); + /* Even if right is a 'unsigned char', the result will be a 'signed int' due to the promotion rules. + It doesn't make sense when accessing arrays, so let's fix it here: */ + if (indexUnsigned) + SPEC_USIGN (getSpec (operandType (right))) = 1; + /* we can check for limits here */ + /* already done in SDCCast.c + if (isOperandLiteral (right) && + IS_ARRAY (ltype) && + DCL_ELEM (ltype) && + (operandLitValue (right) / getSize (ltype->next)) >= DCL_ELEM (ltype)) + { + werror (W_IDX_OUT_OF_BOUNDS, + (int) operandLitValue (right) / getSize (ltype->next), + DCL_ELEM (ltype)); + } + */ + + ic = newiCode ('+', left, right); + + IC_RESULT (ic) = newiTempOperand (((IS_PTR (ltype) && + !IS_AGGREGATE (ltype->next) && + !IS_PTR (ltype->next)) + ? ltype : ltype->next), 0); + + if (!IS_AGGREGATE (ltype->next)) + { + IC_RESULT (ic)->isaddr = 1; + IC_RESULT (ic)->aggr2ptr = 1; + } + ADDTOCHAIN (ic); + + return IC_RESULT (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeStruct - generates intermediate code for structures */ +/*-----------------------------------------------------------------*/ +operand * +geniCodeStruct (operand * left, operand * right, bool islval) +{ + iCode *ic; + sym_link *type = operandType (left); + sym_link *etype = getSpec (type); + sym_link *retype; + symbol *element = getStructElement (SPEC_STRUCT (etype), + right->operand.symOperand); + + wassert(IS_SYMOP(right)); + + /* add the offset */ + ic = newiCode ('+', left, operandFromLit (element->offset)); + + IC_RESULT (ic) = newiTempOperand (element->type, 0); + + /* preserve the storage & output class of the struct */ + /* as well as the volatile attribute */ + retype = getSpec (operandType (IC_RESULT (ic))); + SPEC_SCLS (retype) = SPEC_SCLS (etype); + SPEC_OCLS (retype) = SPEC_OCLS (etype); + SPEC_VOLATILE (retype) |= SPEC_VOLATILE (etype); + SPEC_CONST (retype) |= SPEC_CONST (etype); + + if (IS_PTR (element->type)) + setOperandType (IC_RESULT (ic), aggrToPtr (operandType (IC_RESULT (ic)), TRUE)); + + IC_RESULT (ic)->isaddr = (!IS_AGGREGATE (element->type)); + + ADDTOCHAIN (ic); + return (islval ? IC_RESULT (ic) : geniCodeRValue (IC_RESULT (ic), TRUE)); +} + +/*-----------------------------------------------------------------*/ +/* geniCodePostInc - generate int code for Post increment */ +/*-----------------------------------------------------------------*/ +operand * +geniCodePostInc (operand * op) +{ + iCode *ic; + operand *rOp; + sym_link *optype = operandType (op); + operand *result; + operand *rv = (IS_ITEMP (op) ? + geniCodeRValue (op, (IS_PTR (optype) ? TRUE : FALSE)) : + op); + sym_link *rvtype = operandType (rv); + int size = 0; + + /* if this is not an address we have trouble */ + if (!op->isaddr) + { + werror (E_LVALUE_REQUIRED, "++"); + return op; + } + + rOp = newiTempOperand (rvtype, 0); + OP_SYMBOL(rOp)->noSpilLoc = 1; + + if (IS_ITEMP (rv)) + OP_SYMBOL(rv)->noSpilLoc = 1; + + geniCodeAssign (rOp, rv, 0, 0); + + size = (IS_PTR (rvtype) ? getSize (rvtype->next) : 1); + if (size == 0) + werror(W_SIZEOF_VOID); + if (IS_FLOAT (rvtype)) + ic = newiCode ('+', rv, operandFromValue (constFloatVal ("1.0"))); + else if (IS_FIXED16X16 (rvtype)) + ic = newiCode ('+', rv, operandFromValue (constFixed16x16Val ("1.0"))); + else + ic = newiCode ('+', rv, operandFromLit (size)); + + IC_RESULT (ic) = result = newiTempOperand (rvtype, 0); + ADDTOCHAIN (ic); + + geniCodeAssign (op, result, 0, 0); + + return rOp; + +} + +/*-----------------------------------------------------------------*/ +/* geniCodePreInc - generate code for preIncrement */ +/*-----------------------------------------------------------------*/ +operand * +geniCodePreInc (operand * op, bool lvalue) +{ + iCode *ic; + sym_link *optype = operandType (op); + operand *rop = (IS_ITEMP (op) ? + geniCodeRValue (op, (IS_PTR (optype) ? TRUE : FALSE)) : + op); + sym_link *roptype = operandType (rop); + operand *result; + int size = 0; + + if (!op->isaddr) + { + werror (E_LVALUE_REQUIRED, "++"); + return op; + } + + size = (IS_PTR (roptype) ? getSize (roptype->next) : 1); + if (size == 0) + werror(W_SIZEOF_VOID); + if (IS_FLOAT (roptype)) + ic = newiCode ('+', rop, operandFromValue (constFloatVal ("1.0"))); + else if (IS_FIXED16X16 (roptype)) + ic = newiCode ('+', rop, operandFromValue (constFixed16x16Val ("1.0"))); + else + ic = newiCode ('+', rop, operandFromLit (size)); + IC_RESULT (ic) = result = newiTempOperand (roptype, 0); + ADDTOCHAIN (ic); + + (void) geniCodeAssign (op, result, 0, 0); + if (lvalue || IS_TRUE_SYMOP (op) || IS_BITVAR (optype)) + return op; + else + return result; +} + +/*-----------------------------------------------------------------*/ +/* geniCodePostDec - generates code for Post decrement */ +/*-----------------------------------------------------------------*/ +operand * +geniCodePostDec (operand * op) +{ + iCode *ic; + operand *rOp; + sym_link *optype = operandType (op); + operand *result; + operand *rv = (IS_ITEMP (op) ? + geniCodeRValue (op, (IS_PTR (optype) ? TRUE : FALSE)) : + op); + sym_link *rvtype = operandType (rv); + int size = 0; + + /* if this is not an address we have trouble */ + if (!op->isaddr) + { + werror (E_LVALUE_REQUIRED, "--"); + return op; + } + + rOp = newiTempOperand (rvtype, 0); + OP_SYMBOL(rOp)->noSpilLoc = 1; + + if (IS_ITEMP (rv)) + OP_SYMBOL(rv)->noSpilLoc = 1; + + geniCodeAssign (rOp, rv, 0, 0); + + size = (IS_PTR (rvtype) ? getSize (rvtype->next) : 1); + if (size == 0) + werror(W_SIZEOF_VOID); + if (IS_FLOAT (rvtype)) + ic = newiCode ('-', rv, operandFromValue (constFloatVal ("1.0"))); + else if (IS_FIXED16X16 (rvtype)) + ic = newiCode ('-', rv, operandFromValue (constFixed16x16Val ("1.0"))); + else + ic = newiCode ('-', rv, operandFromLit (size)); + + IC_RESULT (ic) = result = newiTempOperand (rvtype, 0); + ADDTOCHAIN (ic); + + geniCodeAssign (op, result, 0, 0); + + return rOp; + +} + +/*-----------------------------------------------------------------*/ +/* geniCodePreDec - generate code for pre decrement */ +/*-----------------------------------------------------------------*/ +operand * +geniCodePreDec (operand * op, bool lvalue) +{ + iCode *ic; + sym_link *optype = operandType (op); + operand *rop = (IS_ITEMP (op) ? + geniCodeRValue (op, (IS_PTR (optype) ? TRUE : FALSE)) : + op); + sym_link *roptype = operandType (rop); + operand *result; + int size = 0; + + if (!op->isaddr) + { + werror (E_LVALUE_REQUIRED, "--"); + return op; + } + + size = (IS_PTR (roptype) ? getSize (roptype->next) : 1); + if (size == 0) + werror(W_SIZEOF_VOID); + if (IS_FLOAT (roptype)) + ic = newiCode ('-', rop, operandFromValue (constFloatVal ("1.0"))); + else if (IS_FIXED16X16 (roptype)) + ic = newiCode ('-', rop, operandFromValue (constFixed16x16Val ("1.0"))); + else + ic = newiCode ('-', rop, operandFromLit (size)); + IC_RESULT (ic) = result = newiTempOperand (roptype, 0); + ADDTOCHAIN (ic); + + (void) geniCodeAssign (op, result, 0, 0); + if (lvalue || IS_TRUE_SYMOP (op) || IS_BITVAR (optype)) + return op; + else + return result; +} + + +/*-----------------------------------------------------------------*/ +/* geniCodeBitwise - gen int code for bitWise operators */ +/*-----------------------------------------------------------------*/ +operand * +geniCodeBitwise (operand * left, operand * right, + int oper, sym_link * resType) +{ + iCode *ic; + + left = geniCodeCast (resType, left, TRUE); + right = geniCodeCast (resType, right, TRUE); + + ic = newiCode (oper, left, right); + IC_RESULT (ic) = newiTempOperand (resType, 0); + + ADDTOCHAIN (ic); + return IC_RESULT (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeAddressOf - gens icode for '&' address of operator */ +/*-----------------------------------------------------------------*/ +operand * +geniCodeAddressOf (operand * op) +{ + iCode *ic; + sym_link *p; + sym_link *optype = operandType (op); + sym_link *opetype = getSpec (optype); + + if (IS_ITEMP (op) && op->isaddr && IS_PTR (optype)) + { + op = operandFromOperand (op); + op->isaddr = 0; + return op; + } + + /* lvalue check already done in decorateType */ + /* this must be a lvalue */ +/* if (!op->isaddr && !IS_AGGREGATE(optype)) { */ +/* werror (E_LVALUE_REQUIRED,"&"); */ +/* return op; */ +/* } */ + + p = newLink (DECLARATOR); + + /* set the pointer depending on the storage class */ + DCL_TYPE (p) = PTR_TYPE (SPEC_OCLS (opetype)); + + p->next = copyLinkChain (optype); + + /* if already a temp */ + if (IS_ITEMP (op)) + { + setOperandType (op, p); + op->isaddr = 0; + return op; + } + + /* otherwise make this of the type coming in */ + ic = newiCode (ADDRESS_OF, op, NULL); + IC_RESULT (ic) = newiTempOperand (p, 1); + IC_RESULT (ic)->isaddr = 0; + ADDTOCHAIN (ic); + return IC_RESULT (ic); +} + +/*-----------------------------------------------------------------*/ +/* setOClass - sets the output class depending on the pointer type */ +/*-----------------------------------------------------------------*/ +void +setOClass (sym_link * ptr, sym_link * spec) +{ + switch (DCL_TYPE (ptr)) + { + case POINTER: + SPEC_OCLS (spec) = data; + break; + + case GPOINTER: + SPEC_OCLS (spec) = generic; + break; + + case FPOINTER: + SPEC_OCLS (spec) = xdata; + break; + + case CPOINTER: + SPEC_OCLS (spec) = code; + break; + + case IPOINTER: + SPEC_OCLS (spec) = idata; + break; + + case PPOINTER: + SPEC_OCLS (spec) = xstack; + break; + + case EEPPOINTER: + SPEC_OCLS (spec) = eeprom; + break; + + default: + break; + + } +} + +/*-----------------------------------------------------------------*/ +/* geniCodeDerefPtr - dereference pointer with '*' */ +/*-----------------------------------------------------------------*/ +operand * +geniCodeDerefPtr (operand * op,int lvl) +{ + sym_link *rtype, *retype; + sym_link *optype = operandType (op); + + // if this is an array then array access + if (IS_ARRAY (optype)) { + // don't worry, this will be optimized out later + return geniCodeArray (op, operandFromLit (0), lvl); + } + + // just in case someone screws up + wassert (IS_PTR (optype)); + + if (IS_TRUE_SYMOP (op)) + { + op->isaddr = 1; + op = geniCodeRValue (op, TRUE); + } + + /* now get rid of the pointer part */ + if (isLvaluereq(lvl) && IS_ITEMP (op)) + { + retype = getSpec (rtype = copyLinkChain (optype)); + } + else + { + retype = getSpec (rtype = copyLinkChain (optype->next)); + /* outputclass needs 2b updated */ + setOClass (optype, retype); + } + + op->isGptr = IS_GENPTR (optype); + + op->isaddr = (IS_PTR (rtype) || + IS_STRUCT (rtype) || + IS_INT (rtype) || + IS_CHAR (rtype) || + IS_FLOAT (rtype) || + IS_FIXED (rtype)); + + if (!isLvaluereq(lvl)) + op = geniCodeRValue (op, TRUE); + + setOperandType (op, rtype); + + return op; +} + +/*-----------------------------------------------------------------*/ +/* geniCodeUnaryMinus - does a unary minus of the operand */ +/*-----------------------------------------------------------------*/ +operand * +geniCodeUnaryMinus (operand * op) +{ + iCode *ic; + sym_link *optype = operandType (op); + + if (IS_LITERAL (optype)) + return operandFromLit (-floatFromVal (op->operand.valOperand)); + + ic = newiCode (UNARYMINUS, op, NULL); + IC_RESULT (ic) = newiTempOperand (optype, 0); + ADDTOCHAIN (ic); + return IC_RESULT (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeLeftShift - gen i code for left shift */ +/*-----------------------------------------------------------------*/ +operand * +geniCodeLeftShift (operand * left, operand * right, RESULT_TYPE resultType) +{ + iCode *ic; + sym_link *resType; + + ic = newiCode (LEFT_OP, left, right); + + resType = usualBinaryConversions (&left, &right, resultType, LEFT_OP); + IC_RESULT (ic) = newiTempOperand (resType, 0); + ADDTOCHAIN (ic); + return IC_RESULT (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeRightShift - gen i code for right shift */ +/*-----------------------------------------------------------------*/ +operand * +geniCodeRightShift (operand * left, operand * right) +{ + iCode *ic; + + ic = newiCode (RIGHT_OP, left, right); + IC_RESULT (ic) = newiTempOperand (operandType (left), 0); + ADDTOCHAIN (ic); + return IC_RESULT (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeLogic- logic code */ +/*-----------------------------------------------------------------*/ +static operand * +geniCodeLogic (operand * left, operand * right, int op, ast *tree) +{ + iCode *ic; + sym_link *ctype, *ttype; + sym_link *rtype = operandType (right); + sym_link *ltype = operandType (left); + + /* left is integral type and right is literal then + check if the literal value is within bounds */ + if (IS_INTEGRAL (ltype) && IS_VALOP (right) && IS_LITERAL (rtype)) + { + CCR_RESULT ccr_result = checkConstantRange (ltype, rtype, op, FALSE); + switch (ccr_result) + { + case CCR_ALWAYS_TRUE: + case CCR_ALWAYS_FALSE: + if (!options.lessPedantic) + werror (W_COMP_RANGE, "true resp. false"); + return operandFromLit (ccr_result == CCR_ALWAYS_TRUE ? 1 : 0); + default: + break; + } + } + + /* if one operand is a pointer and the other is a literal generic void pointer, + change the type of the literal generic void pointer to match the other pointer */ + if (IS_GENPTR (ltype) && IS_VOID (ltype->next) && IS_ITEMP (left) + && IS_PTR (rtype) && !IS_GENPTR(rtype)) + { + /* find left's definition */ + ic = (iCode *) setFirstItem (iCodeChain); + while (ic) + { + if (((ic->op == CAST) || (ic->op == '=')) + && isOperandEqual(left, IC_RESULT (ic))) + break; + else + ic = setNextItem (iCodeChain); + } + /* if casting literal to generic pointer, then cast to rtype instead */ + if (ic && (ic->op == CAST) && isOperandLiteral(IC_RIGHT (ic))) + { + left = operandFromValue (valCastLiteral (rtype, operandLitValue (IC_RIGHT (ic)))); + ltype = operandType(left); + } + } + if (IS_GENPTR (rtype) && IS_VOID (rtype->next) && IS_ITEMP (right) + && IS_PTR (ltype) && !IS_GENPTR(ltype)) + { + /* find right's definition */ + ic = (iCode *) setFirstItem (iCodeChain); + while (ic) + { + if (((ic->op == CAST) || (ic->op == '=')) + && isOperandEqual(right, IC_RESULT (ic))) + break; + else + ic = setNextItem (iCodeChain); + } + /* if casting literal to generic pointer, then cast to rtype instead */ + if (ic && (ic->op == CAST) && isOperandLiteral(IC_RIGHT (ic))) + { + right = operandFromValue (valCastLiteral (ltype, operandLitValue (IC_RIGHT (ic)))); + rtype = operandType(right); + } + } + + ctype = usualBinaryConversions (&left, &right, RESULT_TYPE_BIT, 0); + + ic = newiCode (op, left, right); + /* store 0 or 1 in result */ + ttype = (tree && IS_BIT (tree->ftype)) ? newBoolLink() : newCharLink(); + IC_RESULT (ic) = newiTempOperand (ttype, 1); + + /* if comparing float + and not a '==' || '!=' || '&&' || '||' (these + will be inlined */ + if (IS_FLOAT(ctype) && + op != EQ_OP && + op != NE_OP && + op != AND_OP && + op != OR_OP) + ic->supportRtn = 1; + + /* if comparing a fixed type use support functions */ + if (IS_FIXED(ctype)) + ic->supportRtn = 1; + + ADDTOCHAIN (ic); + return IC_RESULT (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeLogicAndOr - && || operations */ +/*-----------------------------------------------------------------*/ +static operand * +geniCodeLogicAndOr (ast *tree, int lvl) +{ + iCode *ic; + sym_link *type; + symbol *falseLabel = newiTempLabel (NULL); + symbol *trueLabel = newiTempLabel (NULL); + symbol *exitLabel = newiTempLabel (NULL); + operand *op, *result, *condition; + + /* AND_OP and OR_OP are no longer generated because of bug-905492. + They can be reenabled by executing the following block. If you find + a decent optimization you could start right here: + */ +#if 0 + if (0) + { + operand *leftOp, *rightOp; + + leftOp = geniCodeRValue (ast2iCode (tree->left , lvl + 1), FALSE); + rightOp = geniCodeRValue (ast2iCode (tree->right, lvl + 1), FALSE); + + return geniCodeLogic (leftOp, rightOp, tree->opval.op); + } +#endif + + /* generate two IFX for the '&&' or '||' op */ + + /* evaluate left operand */ + condition = ast2iCode (tree->left, lvl + 1); + op = geniCodeRValue (condition, FALSE); + + /* test left operand */ + if (tree->opval.op == AND_OP) + ic = newiCodeCondition (op, NULL, falseLabel); + else /* OR_OP */ + ic = newiCodeCondition (op, trueLabel, NULL); + ADDTOCHAIN (ic); + + /* evaluate right operand */ + condition = ast2iCode (tree->right, lvl + 1); + op = geniCodeRValue (condition, FALSE); + + /* test right operand */ + ic = newiCodeCondition (op, trueLabel, NULL); + ADDTOCHAIN (ic); + + /* store 0 or 1 in result */ + type = (IS_BIT (tree->ftype)) ? newBoolLink() : newCharLink(); + result = newiTempOperand (type, 1); + + geniCodeLabel (falseLabel); + geniCodeAssign (result, operandFromLit (0), 0, 0); + /* generate an unconditional goto */ + geniCodeGoto (exitLabel); + + geniCodeLabel (trueLabel); + geniCodeAssign (result, operandFromLit (1), 0, 0); + + geniCodeLabel (exitLabel); + + return result; +} + +/*-----------------------------------------------------------------*/ +/* geniCodeUnary - for a generic unary operation */ +/*-----------------------------------------------------------------*/ +operand * +geniCodeUnary (operand * op, int oper) +{ + iCode *ic = newiCode (oper, op, NULL); + + IC_RESULT (ic) = newiTempOperand (operandType (op), 0); + ADDTOCHAIN (ic); + return IC_RESULT (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeBinary - for a generic binary operation */ +/*-----------------------------------------------------------------*/ +operand * +geniCodeBinary (operand * left, operand * right, int oper) +{ + iCode *ic = newiCode (oper, left, right); + + IC_RESULT (ic) = newiTempOperand (operandType (left), 0); + ADDTOCHAIN (ic); + return IC_RESULT (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeConditional - geniCode for '?' ':' operation */ +/*-----------------------------------------------------------------*/ +operand * +geniCodeConditional (ast * tree,int lvl) +{ + iCode *ic; + symbol *falseLabel = newiTempLabel (NULL); + symbol *exitLabel = newiTempLabel (NULL); + ast *astTrue = tree->right->left; + ast *astFalse = tree->right->right; + operand *cond = ast2iCode (tree->left, lvl+1); + operand *result = newiTempOperand (tree->ftype, 0); + operand *opTrue, *opFalse; + + ic = newiCodeCondition (geniCodeRValue (cond, FALSE), NULL, falseLabel); + ADDTOCHAIN (ic); + + opTrue = ast2iCode (astTrue, lvl+1); + + /* move the value to the new operand */ + geniCodeAssign (result, geniCodeRValue (opTrue, FALSE), 0, 0); + + /* generate an unconditional goto */ + geniCodeGoto (exitLabel); + + /* now for the right side */ + geniCodeLabel (falseLabel); + + opFalse = ast2iCode (astFalse, lvl+1); + geniCodeAssign (result, geniCodeRValue (opFalse, FALSE), 0, 0); + + /* create the exit label */ + geniCodeLabel (exitLabel); + + return result; +} + +/*-----------------------------------------------------------------*/ +/* geniCodeAssign - generate code for assignment */ +/*-----------------------------------------------------------------*/ +operand * +geniCodeAssign (operand * left, operand * right, int nosupdate, int strictLval) +{ + iCode *ic; + sym_link *ltype = operandType (left); + sym_link *rtype = operandType (right); + + if (!left->isaddr && (!IS_ITEMP (left) || strictLval)) + { + werror (E_LVALUE_REQUIRED, "assignment"); + return left; + } + + /* left is integral type and right is literal then + check if the literal value is within bounds */ + if (IS_INTEGRAL (ltype) && right->type == VALUE && IS_LITERAL (rtype) && + checkConstantRange (ltype, rtype, '=', FALSE) == CCR_OVL && + !options.lessPedantic) + { + werror (W_LIT_OVERFLOW); + } + + /* if the left & right type don't exactly match */ + /* if pointer set then make sure the check is + done with the type & not the pointer */ + /* then cast rights type to left */ + + /* first check the type for pointer assignement */ + if (left->isaddr && IS_PTR (ltype) && IS_ITEMP (left) && + compareType (ltype, rtype) <= 0) + { + if (left->aggr2ptr) + right = geniCodeCast (ltype, right, TRUE); + else if (compareType (ltype->next, rtype) < 0) + right = geniCodeCast (ltype->next, right, TRUE); + } + else if (compareType (ltype, rtype) < 0) + right = geniCodeCast (ltype, right, TRUE); + + /* If left is a true symbol & ! volatile + create an assignment to temporary for + the right & then assign this temporary + to the symbol. This is SSA (static single + assignment). Isn't it simple and folks have + published mountains of paper on it */ + if (IS_TRUE_SYMOP (left) && + !isOperandVolatile (left, FALSE) && + isOperandGlobal (left)) + { + symbol *sym = NULL; + operand *newRight; + + if (IS_TRUE_SYMOP (right)) + sym = OP_SYMBOL (right); + ic = newiCode ('=', NULL, right); + IC_RESULT (ic) = newRight = newiTempOperand (ltype, 0); + /* avoid double fetch from volatile right, see bug 1369874 */ + if (!isOperandVolatile (right, FALSE)) + SPIL_LOC (newRight) = sym; + right = newRight; + ADDTOCHAIN (ic); + } + + ic = newiCode ('=', NULL, right); + IC_RESULT (ic) = left; + ADDTOCHAIN (ic); + + /* if left isgptr flag is set then support + routine will be required */ + if (left->isGptr) + ic->supportRtn = 1; + + ic->nosupdate = nosupdate; + /* left could be a pointer assignment, + return the properly casted right instead */ + return right; +} + +/*-----------------------------------------------------------------*/ +/* geniCodeDummyRead - generate code for dummy read */ +/*-----------------------------------------------------------------*/ +static void +geniCodeDummyRead (operand * op) +{ + iCode *ic; + sym_link *type = operandType (op); + + if (!IS_VOLATILE(type)) + return; + + ic = newiCode (DUMMY_READ_VOLATILE, NULL, op); + ADDTOCHAIN (ic); + + ic->nosupdate = 1; +} + +/*-----------------------------------------------------------------*/ +/* geniCodeSEParms - generate code for side effecting fcalls */ +/*-----------------------------------------------------------------*/ +static void +geniCodeSEParms (ast * parms,int lvl) +{ + if (!parms) + return; + + if (parms->type == EX_OP && parms->opval.op == PARAM) + { + geniCodeSEParms (parms->left,lvl); + geniCodeSEParms (parms->right,lvl); + return; + } + + /* hack don't like this but too lazy to think of + something better */ + if (IS_ADDRESS_OF_OP (parms)) + parms->left->lvalue = 1; + + if (IS_CAST_OP (parms) && + IS_PTR (parms->ftype) && + IS_ADDRESS_OF_OP (parms->right)) + parms->right->left->lvalue = 1; + + parms->opval.oprnd = + geniCodeRValue (ast2iCode (parms,lvl+1), FALSE); + + parms->type = EX_OPERAND; + AST_ARGREG(parms) = parms->etype ? SPEC_ARGREG(parms->etype) : + SPEC_ARGREG(parms->ftype); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeParms - generates parameters */ +/*-----------------------------------------------------------------*/ +value * +geniCodeParms (ast * parms, value *argVals, int *stack, + sym_link * ftype, int lvl) +{ + iCode *ic; + operand *pval; + + if (!parms) + return argVals; + + if (argVals==NULL) { + // first argument + argVals = FUNC_ARGS (ftype); + } + + /* if this is a param node then do the left & right */ + if (parms->type == EX_OP && parms->opval.op == PARAM) + { + argVals=geniCodeParms (parms->left, argVals, stack, ftype, lvl); + argVals=geniCodeParms (parms->right, argVals, stack, ftype, lvl); + return argVals; + } + + /* get the parameter value */ + if (parms->type == EX_OPERAND) + pval = parms->opval.oprnd; + else + { + /* maybe this else should go away ?? */ + /* hack don't like this but too lazy to think of + something better */ + if (IS_ADDRESS_OF_OP (parms)) + parms->left->lvalue = 1; + + if (IS_CAST_OP (parms) && + IS_PTR (parms->ftype) && + IS_ADDRESS_OF_OP (parms->right)) + parms->right->left->lvalue = 1; + + pval = geniCodeRValue (ast2iCode (parms,lvl+1), FALSE); + } + + /* if register parm then make it a send */ + if ((IS_REGPARM (parms->etype) && !IFFUNC_HASVARARGS(ftype)) || + IFFUNC_ISBUILTIN(ftype)) + { + ic = newiCode (SEND, pval, NULL); + ic->argreg = SPEC_ARGREG(parms->etype); + ic->builtinSEND = FUNC_ISBUILTIN(ftype); + ADDTOCHAIN (ic); + } + else + { + /* now decide whether to push or assign */ + if (!(options.stackAuto || IFFUNC_ISREENT (ftype))) + { + + /* assign */ + operand *top = operandFromSymbol (argVals->sym); + /* clear useDef and other bitVectors */ + OP_USES(top)=OP_DEFS(top)=OP_SYMBOL(top)->clashes = NULL; + geniCodeAssign (top, pval, 1, 0); + } + else + { + sym_link *p = operandType (pval); + /* push */ + ic = newiCode (IPUSH, pval, NULL); + ic->parmPush = 1; + /* update the stack adjustment */ + *stack += getSize (IS_AGGREGATE (p) ? aggrToPtr (p, FALSE) : p); + ADDTOCHAIN (ic); + } + } + + argVals=argVals->next; + return argVals; +} + +/*-----------------------------------------------------------------*/ +/* geniCodeCall - generates temp code for calling */ +/*-----------------------------------------------------------------*/ +operand * +geniCodeCall (operand * left, ast * parms,int lvl) +{ + iCode *ic; + operand *result; + sym_link *type, *etype; + sym_link *ftype; + int stack = 0; + + if (!IS_FUNC(OP_SYMBOL(left)->type) && + !IS_FUNCPTR(OP_SYMBOL(left)->type)) { + werror (E_FUNCTION_EXPECTED); + return operandFromValue(valueFromLit(0)); + } + + /* take care of parameters with side-effecting + function calls in them, this is required to take care + of overlaying function parameters */ + geniCodeSEParms (parms,lvl); + + ftype = operandType (left); + if (IS_FUNCPTR (ftype)) + ftype = ftype->next; + + /* first the parameters */ + geniCodeParms (parms, NULL, &stack, ftype, lvl); + + /* now call : if symbol then pcall */ + if (IS_OP_POINTER (left) || IS_ITEMP(left)) { + ic = newiCode (PCALL, left, NULL); + } else { + ic = newiCode (CALL, left, NULL); + } + + type = copyLinkChain (ftype->next); + etype = getSpec (type); + SPEC_EXTR (etype) = 0; + IC_RESULT (ic) = result = newiTempOperand (type, 1); + + ADDTOCHAIN (ic); + + /* stack adjustment after call */ + ic->parmBytes = stack; + + return result; +} + +/*-----------------------------------------------------------------*/ +/* geniCodeReceive - generate intermediate code for "receive" */ +/*-----------------------------------------------------------------*/ +static void +geniCodeReceive (value * args, operand * func) +{ + unsigned char paramByteCounter = 0; + + /* for all arguments that are passed in registers */ + while (args) + { + if (IS_REGPARM (args->etype)) + { + operand *opr = operandFromValue (args); + operand *opl; + symbol *sym = OP_SYMBOL (opr); + iCode *ic; + + /* we will use it after all optimizations + and before liveRange calculation */ + if (!sym->addrtaken && !IS_VOLATILE (sym->etype)) + { + + if ((IN_FARSPACE (SPEC_OCLS (sym->etype)) && !TARGET_IS_HC08) && + options.stackAuto == 0 && + (!(options.model == MODEL_FLAT24)) ) + { + } + else + { + opl = newiTempOperand (args->type, 0); + sym->reqv = opl; + sym->reqv->key = sym->key; + OP_SYMBOL (sym->reqv)->key = sym->key; + OP_SYMBOL (sym->reqv)->isreqv = 1; + OP_SYMBOL (sym->reqv)->islocal = 0; + SPIL_LOC (sym->reqv) = sym; + } + } + + ic = newiCode (RECEIVE, func, NULL); + ic->argreg = SPEC_ARGREG(args->etype); + if (ic->argreg == 1) { + currFunc->recvSize = getSize (sym->type); + } + IC_RESULT (ic) = opr; + + /* misuse of parmBytes (normally used for functions) + * to save estimated stack position of this argument. + * Normally this should be zero for RECEIVE iCodes. + * No idea if this causes side effects on other ports. - dw + */ + ic->parmBytes = paramByteCounter; + + /* what stack position do we have? */ + paramByteCounter += getSize (sym->type); + + ADDTOCHAIN (ic); + } + + args = args->next; + } +} + +/*-----------------------------------------------------------------*/ +/* geniCodeFunctionBody - create the function body */ +/*-----------------------------------------------------------------*/ +void +geniCodeFunctionBody (ast * tree,int lvl) +{ + iCode *ic; + operand *func; + sym_link *fetype; + char *savefilename; + int savelineno; + + /* reset the auto generation */ + /* numbers */ + iTempNum = 0; + iTempLblNum = 0; + operandKey = 0; + iCodeKey = 0; + func = ast2iCode (tree->left,lvl+1); + fetype = getSpec (operandType (func)); + + savefilename = filename; + savelineno = lineno; + filename = OP_SYMBOL (func)->fileDef; + lineno = OP_SYMBOL (func)->lineDef; + /* create an entry label */ + geniCodeLabel (entryLabel); + filename = savefilename; + lineno = savelineno; + + /* create a proc icode */ + ic = newiCode (FUNCTION, func, NULL); + filename = ic->filename = OP_SYMBOL (func)->fileDef; + lineno = ic->lineno = OP_SYMBOL (func)->lineDef; + ic->tree = tree; + + ADDTOCHAIN (ic); + + /* for all parameters that are passed + on registers add a "receive" */ + geniCodeReceive (tree->values.args, func); + + /* generate code for the body */ + ast2iCode (tree->right,lvl+1); + + /* create a label for return */ + geniCodeLabel (returnLabel); + + /* now generate the end proc */ + ic = newiCode (ENDFUNCTION, func, NULL); + ic->tree = tree; + ADDTOCHAIN (ic); + return; +} + +/*-----------------------------------------------------------------*/ +/* geniCodeReturn - gen icode for 'return' statement */ +/*-----------------------------------------------------------------*/ +void +geniCodeReturn (operand * op) +{ + iCode *ic; + + /* if the operand is present force an rvalue */ + if (op) + op = geniCodeRValue (op, FALSE); + + ic = newiCode (RETURN, op, NULL); + ADDTOCHAIN (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeIfx - generates code for extended if statement */ +/*-----------------------------------------------------------------*/ +void +geniCodeIfx (ast * tree,int lvl) +{ + iCode *ic; + operand *condition = ast2iCode (tree->left,lvl+1); + sym_link *cetype; + + /* if condition is null then exit */ + if (!condition) + goto exit; + else + condition = geniCodeRValue (condition, FALSE); + + cetype = getSpec (operandType (condition)); + /* if the condition is a literal */ + if (IS_LITERAL (cetype)) + { + if (floatFromVal (condition->operand.valOperand)) + { + if (tree->trueLabel) + geniCodeGoto (tree->trueLabel); + else + assert (0); + } + else + { + if (tree->falseLabel) + geniCodeGoto (tree->falseLabel); + } + goto exit; + } + + if (tree->trueLabel) + { + ic = newiCodeCondition (condition, + tree->trueLabel, + NULL); + ADDTOCHAIN (ic); + + if (tree->falseLabel) + geniCodeGoto (tree->falseLabel); + } + else + { + ic = newiCodeCondition (condition, + NULL, + tree->falseLabel); + ADDTOCHAIN (ic); + } + +exit: + ast2iCode (tree->right,lvl+1); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeJumpTable - tries to create a jump table for switch */ +/*-----------------------------------------------------------------*/ +int +geniCodeJumpTable (operand * cond, value * caseVals, ast * tree) +{ + int min, max, cnt = 1; + int i, t; + value *vch; + iCode *ic; + operand *boundary; + symbol *falseLabel; + set *labels = NULL; + int needRangeCheck = !optimize.noJTabBoundary + || tree->values.switchVals.swDefault; + sym_link *cetype = getSpec (operandType (cond)); + int sizeofMinCost, sizeofZeroMinCost, sizeofMaxCost; + int sizeofMatchJump, sizeofJumpTable; + int sizeIndex; + + if (!tree || !caseVals) + return 0; + + /* the criteria for creating a jump table is */ + /* all integer numbers between the maximum & minimum must */ + /* be present , the maximum value should not exceed 255 */ + /* If not all integer numbers are present the algorithm */ + /* inserts jumps to the default label for the missing numbers */ + /* and decides later whether it is worth it */ + min = (int) ulFromVal (vch = caseVals); + + while (vch->next) + { + cnt++; + vch = vch->next; + } + max = (int) ulFromVal (vch); + + /* Exit if the range is too large to handle with a jump table. */ + if (1 + max - min > port->jumptableCost.maxCount) + return 0; + + switch (getSize (operandType (cond))) + { + case 1: sizeIndex = 0; break; + case 2: sizeIndex = 1; break; + case 4: sizeIndex = 2; break; + default: return 0; + } + + /* Compute the size cost of the range check and subtraction. */ + sizeofMinCost = 0; + sizeofZeroMinCost = 0; + sizeofMaxCost = 0; + if (needRangeCheck) + { + if (!(min==0 && IS_UNSIGNED (cetype))) + sizeofMinCost = port->jumptableCost.sizeofRangeCompare[sizeIndex]; + if (!IS_UNSIGNED (cetype)) + sizeofZeroMinCost = port->jumptableCost.sizeofRangeCompare[sizeIndex]; + sizeofMaxCost = port->jumptableCost.sizeofRangeCompare[sizeIndex]; + } + if (min) + sizeofMinCost += port->jumptableCost.sizeofSubtract; + + /* If the size cost of handling a non-zero minimum exceeds the */ + /* cost of extending the range down to zero, then it might be */ + /* better to extend the range to zero. */ + if (min > 0 && (sizeofMinCost-sizeofZeroMinCost) + >= (min * port->jumptableCost.sizeofElement)) + { + /* Only extend the jump table if it would still be manageable. */ + if (1 + max <= port->jumptableCost.maxCount) + { + min = 0; + if (IS_UNSIGNED (cetype)) + sizeofMinCost = 0; + else + sizeofMinCost = port->jumptableCost.sizeofRangeCompare[sizeIndex]; + } + } + + /* Compute the total size cost of a jump table. */ + sizeofJumpTable = (1 + max - min) * port->jumptableCost.sizeofElement + + port->jumptableCost.sizeofDispatch + + sizeofMinCost + sizeofMaxCost; + + /* Compute the total size cost of a match & jump sequence */ + sizeofMatchJump = cnt * port->jumptableCost.sizeofMatchJump[sizeIndex]; + + /* If the size cost of the jump table is uneconomical then exit */ + if (sizeofMatchJump < sizeofJumpTable) + return 0; + + /* The jump table is preferable. */ + + /* First, a label for the default or missing cases. */ + if (tree->values.switchVals.swDefault) + { + SNPRINTF (buffer, sizeof(buffer), + "_default_%d", + tree->values.switchVals.swNum); + } + else + { + SNPRINTF (buffer, sizeof(buffer), + "_swBrk_%d", + tree->values.switchVals.swNum); + } + falseLabel = newiTempLabel (buffer); + + /* Build the list of labels for the jump table. */ + vch = caseVals; + t = (int) ulFromVal (vch); + for (i=min; i<=max; i++) + { + if (vch && t==i) + { + /* Explicit case: make a new label for it. */ + SNPRINTF (buffer, sizeof(buffer), + "_case_%d_%d", + tree->values.switchVals.swNum, + i); + addSet (&labels, newiTempLabel (buffer)); + vch = vch->next; + if (vch) + t = (int) ulFromVal (vch); + } + else + { + /* Implicit case: use the default label. */ + addSet (&labels, falseLabel); + } + } + + /* first we rule out the boundary conditions */ + /* if only optimization says so */ + if (needRangeCheck) + { + sym_link *cetype = getSpec (operandType (cond)); + /* no need to check the lower bound if + the condition is unsigned & minimum value is zero */ + if (!(min == 0 && IS_UNSIGNED (cetype))) + { + boundary = geniCodeLogic (cond, operandFromLit (min), '<', NULL); + ic = newiCodeCondition (boundary, falseLabel, NULL); + ADDTOCHAIN (ic); + } + + /* now for upper bounds */ + boundary = geniCodeLogic (cond, operandFromLit (max), '>', NULL); + ic = newiCodeCondition (boundary, falseLabel, NULL); + ADDTOCHAIN (ic); + } + + /* if the min is not zero then we no make it zero */ + if (min) + { + cond = geniCodeSubtract (cond, operandFromLit (min), RESULT_TYPE_CHAR); + if (!IS_LITERAL(getSpec(operandType(cond)))) + setOperandType (cond, UCHARTYPE); + } + + /* now create the jumptable */ + ic = newiCode (JUMPTABLE, NULL, NULL); + IC_JTCOND (ic) = cond; + IC_JTLABELS (ic) = labels; + ADDTOCHAIN (ic); + return 1; +} + +/*-----------------------------------------------------------------*/ +/* geniCodeSwitch - changes a switch to a if statement */ +/*-----------------------------------------------------------------*/ +void +geniCodeSwitch (ast * tree,int lvl) +{ + iCode *ic; + operand *cond = geniCodeRValue (ast2iCode (tree->left,lvl+1), FALSE); + value *caseVals = tree->values.switchVals.swVals; + symbol *trueLabel, *falseLabel; + + /* If the condition is a literal, then just jump to the */ + /* appropriate case label. */ + if (IS_LITERAL(getSpec(operandType(cond)))) + { + int switchVal, caseVal; + + switchVal = (int) ulFromVal (cond->operand.valOperand); + while (caseVals) + { + caseVal = (int) ulFromVal (caseVals); + if (caseVal == switchVal) + { + SNPRINTF (buffer, sizeof(buffer), "_case_%d_%d", + tree->values.switchVals.swNum, caseVal); + trueLabel = newiTempLabel (buffer); + geniCodeGoto (trueLabel); + goto jumpTable; + } + caseVals = caseVals->next; + } + goto defaultOrBreak; + } + + /* If cond is volatile, it might change while we are trying to */ + /* find the matching case. To avoid this possibility, make a */ + /* non-volatile copy to use instead. */ + if (IS_OP_VOLATILE (cond)) + { + operand * newcond; + iCode * ic; + + newcond = newiTempOperand (operandType (cond), TRUE); + newcond->isvolatile = 0; + ic = newiCode ('=', NULL, cond); + IC_RESULT (ic) = newcond; + ADDTOCHAIN (ic); + cond = newcond; + } + + /* if we can make this a jump table */ + if (geniCodeJumpTable (cond, caseVals, tree)) + goto jumpTable; /* no need for the comparison */ + + /* for the cases defined do */ + while (caseVals) + { + + operand *compare = geniCodeLogic (cond, + operandFromValue (caseVals), + EQ_OP, NULL); + + SNPRINTF (buffer, sizeof(buffer), "_case_%d_%d", + tree->values.switchVals.swNum, + (int) ulFromVal (caseVals)); + trueLabel = newiTempLabel (buffer); + + ic = newiCodeCondition (compare, trueLabel, NULL); + ADDTOCHAIN (ic); + caseVals = caseVals->next; + } + + +defaultOrBreak: + /* if default is present then goto break else break */ + if (tree->values.switchVals.swDefault) + { + SNPRINTF (buffer, sizeof(buffer), "_default_%d", tree->values.switchVals.swNum); + } + else + { + SNPRINTF (buffer, sizeof(buffer), "_swBrk_%d", tree->values.switchVals.swNum); + } + + falseLabel = newiTempLabel (buffer); + geniCodeGoto (falseLabel); + +jumpTable: + ast2iCode (tree->right,lvl+1); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeInline - intermediate code for inline assembler */ +/*-----------------------------------------------------------------*/ +static void +geniCodeInline (ast * tree) +{ + iCode *ic; + + ic = newiCode (INLINEASM, NULL, NULL); + IC_INLINE (ic) = tree->values.inlineasm; + ADDTOCHAIN (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeArrayInit - intermediate code for array initializer */ +/*-----------------------------------------------------------------*/ +static void +geniCodeArrayInit (ast * tree, operand *array) +{ + iCode *ic; + + if (!getenv("TRY_THE_NEW_INITIALIZER")) { + ic = newiCode (ARRAYINIT, array, NULL); + IC_ARRAYILIST (ic) = tree->values.constlist; + } else { + operand *left=newOperand(), *right=newOperand(); + left->type=right->type=SYMBOL; + OP_SYMBOL(left)=AST_SYMBOL(tree->left); + OP_SYMBOL(right)=AST_SYMBOL(tree->right); + ic = newiCode (ARRAYINIT, left, right); + } + ADDTOCHAIN (ic); +} + +/*-----------------------------------------------------------------*/ +/* geniCodeCritical - intermediate code for a critical statement */ +/*-----------------------------------------------------------------*/ +static void +geniCodeCritical (ast *tree, int lvl) +{ + iCode *ic; + operand *op = NULL; + sym_link *type; + + if (!options.stackAuto && !TARGET_IS_HC08) + { + type = newLink(SPECIFIER); + SPEC_VOLATILE(type) = 1; + SPEC_NOUN(type) = V_BIT; + SPEC_SCLS(type) = S_BIT; + SPEC_BLEN(type) = 1; + SPEC_BSTR(type) = 0; + op = newiTempOperand(type, 1); + } + + /* If op is NULL, the original interrupt state will saved on */ + /* the stack. Otherwise, it will be saved in op. */ + + /* Generate a save of the current interrupt state & disable */ + ic = newiCode (CRITICAL, NULL, NULL); + IC_RESULT (ic) = op; + ADDTOCHAIN (ic); + + /* Generate the critical code sequence */ + if (tree->left && tree->left->type == EX_VALUE) + geniCodeDummyRead (ast2iCode (tree->left,lvl+1)); + else + ast2iCode (tree->left,lvl+1); + + /* Generate a restore of the original interrupt state */ + ic = newiCode (ENDCRITICAL, NULL, op); + ADDTOCHAIN (ic); +} + +/*-----------------------------------------------------------------*/ +/* Stuff used in ast2iCode to modify geniCodeDerefPtr in some */ +/* particular case. Ie : assigning or dereferencing array or ptr */ +/*-----------------------------------------------------------------*/ +set * lvaluereqSet = NULL; +typedef struct lvalItem + { + int req; + int lvl; + } +lvalItem; + +/*-----------------------------------------------------------------*/ +/* addLvaluereq - add a flag for lvalreq for current ast level */ +/*-----------------------------------------------------------------*/ +void addLvaluereq(int lvl) +{ + lvalItem * lpItem = (lvalItem *)Safe_alloc ( sizeof (lvalItem)); + lpItem->req=1; + lpItem->lvl=lvl; + addSetHead(&lvaluereqSet,lpItem); + +} +/*-----------------------------------------------------------------*/ +/* delLvaluereq - del a flag for lvalreq for current ast level */ +/*-----------------------------------------------------------------*/ +void delLvaluereq() +{ + lvalItem * lpItem; + lpItem = getSet(&lvaluereqSet); + if(lpItem) Safe_free(lpItem); +} +/*-----------------------------------------------------------------*/ +/* clearLvaluereq - clear lvalreq flag */ +/*-----------------------------------------------------------------*/ +void clearLvaluereq() +{ + lvalItem * lpItem; + lpItem = peekSet(lvaluereqSet); + if(lpItem) lpItem->req = 0; +} +/*-----------------------------------------------------------------*/ +/* getLvaluereq - get the last lvalreq level */ +/*-----------------------------------------------------------------*/ +int getLvaluereqLvl() +{ + lvalItem * lpItem; + lpItem = peekSet(lvaluereqSet); + if(lpItem) return lpItem->lvl; + return 0; +} +/*-----------------------------------------------------------------*/ +/* isLvaluereq - is lvalreq valid for this level ? */ +/*-----------------------------------------------------------------*/ +int isLvaluereq(int lvl) +{ + lvalItem * lpItem; + lpItem = peekSet(lvaluereqSet); + if(lpItem) return ((lpItem->req)&&(lvl <= (lpItem->lvl+1))); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* ast2iCode - creates an icodeList from an ast */ +/*-----------------------------------------------------------------*/ +operand * +ast2iCode (ast * tree,int lvl) +{ + operand *left = NULL; + operand *right = NULL; + if (!tree) + return NULL; + + /* set the global variables for filename & line number */ + if (tree->filename) + filename = tree->filename; + if (tree->lineno) + lineno = tree->lineno; + if (tree->block) + block = tree->block; + if (tree->level) + scopeLevel = tree->level; + if (tree->seqPoint) + seqPoint = tree->seqPoint; + + if (tree->type == EX_VALUE) + return operandFromValue (tree->opval.val); + + if (tree->type == EX_LINK) + return operandFromLink (tree->opval.lnk); + + /* if we find a nullop */ + if (tree->type == EX_OP && + (tree->opval.op == NULLOP || + tree->opval.op == BLOCK)) + { + if (tree->left && tree->left->type == EX_VALUE) + geniCodeDummyRead (ast2iCode (tree->left,lvl+1)); + else + ast2iCode (tree->left,lvl+1); + if (tree->right && tree->right->type == EX_VALUE) + geniCodeDummyRead (ast2iCode (tree->right,lvl+1)); + else + ast2iCode (tree->right,lvl+1); + return NULL; + } + + /* special cases for not evaluating */ + if (tree->opval.op != ':' && + tree->opval.op != '?' && + tree->opval.op != CALL && + tree->opval.op != IFX && + tree->opval.op != AND_OP && + tree->opval.op != OR_OP && + tree->opval.op != LABEL && + tree->opval.op != GOTO && + tree->opval.op != SWITCH && + tree->opval.op != FUNCTION && + tree->opval.op != INLINEASM && + tree->opval.op != CRITICAL) + { + + if (IS_ASSIGN_OP (tree->opval.op) || + IS_DEREF_OP (tree) || + (tree->opval.op == '&' && !tree->right) || + tree->opval.op == PTR_OP) + { + addLvaluereq(lvl); + if ((IS_ARRAY_OP (tree->left) && IS_ARRAY_OP (tree->left->left)) || + (IS_DEREF_OP (tree) && IS_ARRAY_OP (tree->left))) + clearLvaluereq(); + + left = operandFromAst (tree->left,lvl); + delLvaluereq(); + if (IS_DEREF_OP (tree) && IS_DEREF_OP (tree->left)) + left = geniCodeRValue (left, TRUE); + } + else + { + left = operandFromAst (tree->left,lvl); + } + if (tree->opval.op == INC_OP || + tree->opval.op == DEC_OP) + { + addLvaluereq(lvl); + right = operandFromAst (tree->right,lvl); + delLvaluereq(); + } + else + { + right = operandFromAst (tree->right,lvl); + } + } + + /* now depending on the type of operand */ + /* this will be a biggy */ + switch (tree->opval.op) + { + + case '[': /* array operation */ + { + //sym_link *ltype = operandType (left); + //left = geniCodeRValue (left, IS_PTR (ltype->next) ? TRUE : FALSE); + left = geniCodeRValue (left, FALSE); + right = geniCodeRValue (right, TRUE); + } + + return geniCodeArray (left, right,lvl); + + case '.': /* structure dereference */ + if (IS_PTR (operandType (left))) + left = geniCodeRValue (left, TRUE); + else + left = geniCodeRValue (left, FALSE); + + return geniCodeStruct (left, right, tree->lvalue); + + case PTR_OP: /* structure pointer dereference */ + { + sym_link *pType; + pType = operandType (left); + left = geniCodeRValue (left, TRUE); + + setOClass (pType, getSpec (operandType (left))); + } + + return geniCodeStruct (left, right, tree->lvalue); + + case INC_OP: /* increment operator */ + if (left) + return geniCodePostInc (left); + else + return geniCodePreInc (right, tree->lvalue); + + case DEC_OP: /* decrement operator */ + if (left) + return geniCodePostDec (left); + else + return geniCodePreDec (right, tree->lvalue); + + case '&': /* bitwise and or address of operator */ + if (right) + { /* this is a bitwise operator */ + left = geniCodeRValue (left, FALSE); + right = geniCodeRValue (right, FALSE); + return geniCodeBitwise (left, right, BITWISEAND, tree->ftype); + } + else + return geniCodeAddressOf (left); + + case '|': /* bitwise or & xor */ + case '^': + return geniCodeBitwise (geniCodeRValue (left, FALSE), + geniCodeRValue (right, FALSE), + tree->opval.op, + tree->ftype); + + case '/': + return geniCodeDivision (geniCodeRValue (left, FALSE), + geniCodeRValue (right, FALSE), + getResultTypeFromType (tree->ftype)); + + case '%': + return geniCodeModulus (geniCodeRValue (left, FALSE), + geniCodeRValue (right, FALSE), + getResultTypeFromType (tree->ftype)); + case '*': + if (right) + return geniCodeMultiply (geniCodeRValue (left, FALSE), + geniCodeRValue (right, FALSE), + getResultTypeFromType (tree->ftype)); + else + return geniCodeDerefPtr (geniCodeRValue (left, FALSE),lvl); + + case '-': + if (right) + return geniCodeSubtract (geniCodeRValue (left, FALSE), + geniCodeRValue (right, FALSE), + getResultTypeFromType (tree->ftype)); + else + return geniCodeUnaryMinus (geniCodeRValue (left, FALSE)); + + case '+': + if (right) + return geniCodeAdd (geniCodeRValue (left, FALSE), + geniCodeRValue (right, FALSE), + getResultTypeFromType (tree->ftype), + lvl); + else + return geniCodeRValue (left, FALSE); /* unary '+' has no meaning */ + + case LEFT_OP: + return geniCodeLeftShift (geniCodeRValue (left, FALSE), + geniCodeRValue (right, FALSE), + getResultTypeFromType (tree->ftype)); + + case RIGHT_OP: + return geniCodeRightShift (geniCodeRValue (left, FALSE), + geniCodeRValue (right, FALSE)); + case CAST: +#if 0 // this indeed needs a second thought + { + operand *op; + + // let's keep this simple: get the rvalue we need + op=geniCodeRValue (right, FALSE); + // now cast it to whatever we want + op=geniCodeCast (operandType(left), op, FALSE); + // if this is going to be used as an lvalue, make it so + if (tree->lvalue) { + op->isaddr=1; + } + return op; + } +#else // bug #604575, is it a bug ???? + return geniCodeCast (operandType (left), + geniCodeRValue (right, FALSE), FALSE); +#endif + + case '~': + case RRC: + case RLC: + case SWAP: + return geniCodeUnary (geniCodeRValue (left, FALSE), tree->opval.op); + + case '!': + case GETHBIT: + { + operand *op = geniCodeUnary (geniCodeRValue (left, FALSE), tree->opval.op); + if (!IS_BIT (operandType (op))) + setOperandType (op, UCHARTYPE); + return op; + } + case GETABIT: + { + operand *op = geniCodeBinary (geniCodeRValue (left, FALSE), + geniCodeRValue (right, FALSE), + tree->opval.op); + if (!IS_BIT (operandType (op))) + setOperandType (op, UCHARTYPE); + return op; + } + case GETBYTE: + { + operand *op = geniCodeBinary (geniCodeRValue (left, FALSE), + geniCodeRValue (right, FALSE), + tree->opval.op); + setOperandType (op, UCHARTYPE); + return op; + } + case GETWORD: + { + operand *op = geniCodeBinary (geniCodeRValue (left, FALSE), + geniCodeRValue (right, FALSE), + tree->opval.op); + setOperandType (op, UINTTYPE); + return op; + } + case AND_OP: + case OR_OP: + return geniCodeLogicAndOr (tree, lvl); + case '>': + case '<': + case LE_OP: + case GE_OP: + case EQ_OP: + case NE_OP: + /* different compilers (even different gccs) evaluate + the two calls in a different order. to get the same + result on all machines we have to specify a clear sequence. + return geniCodeLogic (geniCodeRValue (left, FALSE), + geniCodeRValue (right, FALSE), + tree->opval.op); + */ + { + operand *leftOp, *rightOp; + + leftOp = geniCodeRValue (left , FALSE); + rightOp = geniCodeRValue (right, FALSE); + + return geniCodeLogic (leftOp, rightOp, tree->opval.op, tree); + } + case '?': + return geniCodeConditional (tree,lvl); + + case SIZEOF: + return operandFromLit (getSize (tree->right->ftype)); + + case '=': + { + sym_link *rtype = operandType (right); + sym_link *ltype = operandType (left); + if (IS_PTR (rtype) && IS_ITEMP (right) + && right->isaddr && compareType (rtype->next, ltype) == 1) + right = geniCodeRValue (right, TRUE); + else + right = geniCodeRValue (right, FALSE); + + return geniCodeAssign (left, right, 0, 1); + } + case MUL_ASSIGN: + return + geniCodeAssign (left, + geniCodeMultiply (geniCodeRValue (operandFromOperand (left), + FALSE), + geniCodeRValue (right, FALSE), + getResultTypeFromType (tree->ftype)), + 0, 1); + + case DIV_ASSIGN: + return + geniCodeAssign (left, + geniCodeDivision (geniCodeRValue (operandFromOperand (left), + FALSE), + geniCodeRValue (right, FALSE), + getResultTypeFromType (tree->ftype)), + 0, 1); + case MOD_ASSIGN: + return + geniCodeAssign (left, + geniCodeModulus (geniCodeRValue (operandFromOperand (left), + FALSE), + geniCodeRValue (right, FALSE), + getResultTypeFromType (tree->ftype)), + 0, 1); + case ADD_ASSIGN: + { + sym_link *rtype = operandType (right); + sym_link *ltype = operandType (left); + if (IS_PTR (rtype) && IS_ITEMP (right) + && right->isaddr && compareType (rtype->next, ltype) == 1) + right = geniCodeRValue (right, TRUE); + else + right = geniCodeRValue (right, FALSE); + + + return geniCodeAssign (left, + geniCodeAdd (geniCodeRValue (operandFromOperand (left), + FALSE), + right, + getResultTypeFromType (tree->ftype), + lvl), + 0, 1); + } + case SUB_ASSIGN: + { + sym_link *rtype = operandType (right); + sym_link *ltype = operandType (left); + if (IS_PTR (rtype) && IS_ITEMP (right) + && right->isaddr && compareType (rtype->next, ltype) == 1) + { + right = geniCodeRValue (right, TRUE); + } + else + { + right = geniCodeRValue (right, FALSE); + } + return + geniCodeAssign (left, + geniCodeSubtract (geniCodeRValue (operandFromOperand (left), + FALSE), + right, + getResultTypeFromType (tree->ftype)), + 0, 1); + } + case LEFT_ASSIGN: + return + geniCodeAssign (left, + geniCodeLeftShift (geniCodeRValue (operandFromOperand (left) + ,FALSE), + geniCodeRValue (right, FALSE), + getResultTypeFromType (tree->ftype)), + 0, 1); + case RIGHT_ASSIGN: + return + geniCodeAssign (left, + geniCodeRightShift (geniCodeRValue (operandFromOperand (left) + ,FALSE), + geniCodeRValue (right, FALSE)), 0, 1); + case AND_ASSIGN: + return + geniCodeAssign (left, + geniCodeBitwise (geniCodeRValue (operandFromOperand (left), + FALSE), + geniCodeRValue (right, FALSE), + BITWISEAND, + operandType (left)), 0, 1); + case XOR_ASSIGN: + return + geniCodeAssign (left, + geniCodeBitwise (geniCodeRValue (operandFromOperand (left), + FALSE), + geniCodeRValue (right, FALSE), + '^', + operandType (left)), 0, 1); + case OR_ASSIGN: + return + geniCodeAssign (left, + geniCodeBitwise (geniCodeRValue (operandFromOperand (left) + ,FALSE), + geniCodeRValue (right, FALSE), + '|', + operandType (left)), 0, 1); + case ',': + return geniCodeRValue (right, FALSE); + + case CALL: + return geniCodeCall (ast2iCode (tree->left,lvl+1), + tree->right,lvl); + case LABEL: + geniCodeLabel (ast2iCode (tree->left,lvl+1)->operand.symOperand); + return ast2iCode (tree->right,lvl+1); + + case GOTO: + geniCodeGoto (ast2iCode (tree->left,lvl+1)->operand.symOperand); + return ast2iCode (tree->right,lvl+1); + + case FUNCTION: + geniCodeFunctionBody (tree,lvl); + return NULL; + + case RETURN: + geniCodeReturn (right); + return NULL; + + case IFX: + geniCodeIfx (tree,lvl); + return NULL; + + case SWITCH: + geniCodeSwitch (tree,lvl); + return NULL; + + case INLINEASM: + geniCodeInline (tree); + return NULL; + + case ARRAYINIT: + geniCodeArrayInit(tree, ast2iCode (tree->left,lvl+1)); + return NULL; + + case CRITICAL: + geniCodeCritical (tree, lvl); + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* reverseICChain - gets from the list and creates a linkedlist */ +/*-----------------------------------------------------------------*/ +iCode * +reverseiCChain () +{ + iCode *loop = NULL; + iCode *prev = NULL; + + while ((loop = getSet (&iCodeChain))) + { + loop->next = prev; + if (prev) + prev->prev = loop; + prev = loop; + } + + return prev; +} + + +/*-----------------------------------------------------------------*/ +/* iCodeFromAst - given an ast will convert it to iCode */ +/*-----------------------------------------------------------------*/ +iCode * +iCodeFromAst (ast * tree) +{ + returnLabel = newiTempLabel ("_return"); + entryLabel = newiTempLabel ("_entry"); + ast2iCode (tree,0); + return reverseiCChain (); +} + +static const char *opTypeToStr(OPTYPE op) +{ + switch(op) + { + case SYMBOL: return "symbol"; + case VALUE: return "value"; + case TYPE: return "type"; + } + return "undefined type"; +} + + +operand *validateOpType(operand *op, + const char *macro, + const char *args, + OPTYPE type, + const char *file, + unsigned line) +{ + if (op && op->type == type) + { + return op; + } + fprintf(stderr, + "Internal error: validateOpType failed in %s(%s) @ %s:%u:" + " expected %s, got %s\n", + macro, args, file, line, + opTypeToStr(type), op ? opTypeToStr(op->type) : "null op"); + exit(EXIT_FAILURE); + return op; // never reached, makes compiler happy. +} diff --git a/src/SDCCicode.h b/src/SDCCicode.h new file mode 100644 index 0000000..d2c69a1 --- /dev/null +++ b/src/SDCCicode.h @@ -0,0 +1,351 @@ +/*------------------------------------------------------------------------- + + SDCCicode.h - intermediate code generation etc. + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "SDCCbitv.h" +#include "SDCCset.h" + +#ifndef SDCCICODE_H +#define SDCCICODE_H 1 + +extern symbol *returnLabel; +extern symbol *entryLabel; +extern int iCodeKey; +extern int operandKey; + +enum + { + CONDITIONAL = 0, + EXPRESSION, + STATEMENT, + LEAF + }; + +typedef enum + { + SYMBOL = 1, + VALUE, + TYPE + } +OPTYPE; + +#define IS_SYMOP(op) (op && op->type == SYMBOL) +#define IS_VALOP(op) (op && op->type == VALUE) +#define IS_TYPOP(op) (op && op->type == TYPE) + +#define ADDTOCHAIN(x) addSetHead(&iCodeChain,x) + +#define LRFTYPE sym_link *ltype = operandType(left), \ + *rtype = operandType(right) ; +#define LRETYPE sym_link *letype= getSpec(ltype) , \ + *retype= getSpec(rtype); +#define LRTYPE LRFTYPE LRETYPE +#define IS_ITEMP(op) (IS_SYMOP(op) && op->operand.symOperand->isitmp == 1) +#define IS_PARM(op) (IS_SYMOP(op) && op->operand.symOperand->_isparm) +#define IS_ITEMPLBL(op) (IS_ITEMP(op) && op->operand.symOperand->isilbl == 1) +#define IS_OP_VOLATILE(op) (IS_SYMOP(op) && op->isvolatile) +#define IS_OP_LITERAL(op) (op && op->isLiteral) +#define IS_OP_GLOBAL(op) (IS_SYMOP(op) && op->isGlobal) +#define IS_OP_POINTER(op) (IS_SYMOP(op) && op->isPtr) +#define IS_OP_PARM(op) (IS_SYMOP(op) && op->isParm) +#define OP_ISLIVE_FCALL(op) (IS_ITEMP(op) && OP_SYMBOL(op)->isLiveFcall) +#define SYM_SPIL_LOC(sym) sym->usl.spillLoc + +/* typedef for operand */ +typedef struct operand + { + OPTYPE type; /* type of operand */ + unsigned int isaddr:1; /* is an address */ + unsigned int aggr2ptr:2; /* 1: must change aggregate to pointer to aggregate */ + /* 2: aggregate has been changed to pointer to aggregate */ + unsigned int isvolatile:1; /* is a volatile operand */ + unsigned int isGlobal:1; /* is a global operand */ + unsigned int isPtr:1; /* is assigned a pointer */ + unsigned int isGptr:1; /* is a generic pointer */ + unsigned int isParm:1; /* is a parameter */ + unsigned int isLiteral:1; /* operand is literal */ + + int key; + union + { + struct symbol *symOperand; /* operand is of type symbol */ + struct value *valOperand; /* operand is of type value */ + struct sym_link *typeOperand; /* operand is of type typechain */ + } + operand; + + bitVect *usesDefs; /* which definitions are used by this */ + struct asmop *aop; /* asm op for this operand */ + } +operand; + +extern operand *validateOpType(operand *op, + const char *macro, + const char *args, + OPTYPE type, + const char *file, + unsigned line); + +#define OP_SYMBOL(op) validateOpType(op, "OP_SYMBOL", #op, SYMBOL, __FILE__, __LINE__)->operand.symOperand +#define OP_VALUE(op) validateOpType(op, "OP_VALUE", #op, VALUE, __FILE__, __LINE__)->operand.valOperand +#define OP_SYM_TYPE(op) validateOpType(op, "OP_SYM_TYPE", #op, SYMBOL, __FILE__, __LINE__)->operand.symOperand->type +#define OP_SYM_ETYPE(op) validateOpType(op, "OP_SYM_ETYPE", #op, SYMBOL, __FILE__, __LINE__)->operand.symOperand->etype +#define SPIL_LOC(op) validateOpType(op, "SPIL_LOC", #op, SYMBOL, __FILE__, __LINE__)->operand.symOperand->usl.spillLoc +#define OP_LIVEFROM(op) validateOpType(op, "OP_LIVEFROM", #op, SYMBOL, __FILE__, __LINE__)->operand.symOperand->liveFrom +#define OP_LIVETO(op) validateOpType(op, "OP_LIVETO", #op, SYMBOL, __FILE__, __LINE__)->operand.symOperand->liveTo +#define OP_REQV(op) validateOpType(op, "OP_REQV", #op, SYMBOL, __FILE__, __LINE__)->operand.symOperand->reqv + +/* definition for intermediate code */ +#define IC_RESULT(x) (x)->ulrrcnd.lrr.result +#define IC_LEFT(x) (x)->ulrrcnd.lrr.left +#define IC_RIGHT(x) (x)->ulrrcnd.lrr.right +#define IC_COND(x) (x)->ulrrcnd.cnd.condition +#define IC_TRUE(x) (x)->ulrrcnd.cnd.trueLabel +#define IC_FALSE(x) (x)->ulrrcnd.cnd.falseLabel +#define IC_LABEL(x) (x)->label +#define IC_JTCOND(x) (x)->ulrrcnd.jmpTab.condition +#define IC_JTLABELS(x) (x)->ulrrcnd.jmpTab.labels +#define IC_INLINE(x) (x)->inlineAsm +#define IC_ARRAYILIST(x) (x)->arrayInitList + +typedef struct iCode + { + unsigned int op; /* operation defined */ + int key; /* running key for this iCode */ + int seq; /* sequence number within routine */ + int seqPoint; /* sequence point */ + short depth; /* loop depth of this iCode */ + short level; /* scope level */ + short block; /* sequential block number */ + unsigned nosupdate:1; /* don't update spillocation with this */ + unsigned generated:1; /* code generated for this one */ + unsigned parmPush:1; /* parameter push Vs spill push */ + unsigned supportRtn:1; /* will cause a call to a support routine */ + unsigned regsSaved:1; /* registers have been saved */ + unsigned bankSaved:1; /* register bank has been saved */ + unsigned builtinSEND:1; /* SEND for parameter of builtin function */ + + struct iCode *next; /* next in chain */ + struct iCode *prev; /* previous in chain */ + set *movedFrom; /* if this iCode gets moved to another block */ + bitVect *rlive; /* ranges that are live at this point */ + int defKey; /* key for the operand being defined */ + bitVect *uses; /* vector of key of used symbols */ + bitVect *rUsed; /* registers used by this instruction */ + bitVect *rMask; /* registers in use during this instruction */ + union + { + struct + { + operand *left; /* left if any */ + operand *right; /* right if any */ + operand *result; /* result of this op */ + } + lrr; + + struct + { + operand *condition; /* if this is a conditional */ + symbol *trueLabel; /* true for conditional */ + symbol *falseLabel; /* false for conditional */ + } + cnd; + + struct + { + operand *condition; /* condition for the jump */ + set *labels; /* ordered set of labels */ + } + jmpTab; + + } + ulrrcnd; + + symbol *label; /* for a goto statement */ + + char *inlineAsm; /* pointer to inline assembler code */ + literalList *arrayInitList; /* point to array initializer list. */ + + int lineno; /* file & lineno for debug information */ + char *filename; + + int parmBytes; /* if call/pcall, count of parameter bytes + on stack */ + int argreg; /* argument regno for SEND/RECEIVE */ + int eBBlockNum; /* belongs to which eBBlock */ + char riu; /* after ralloc, the registers in use */ + struct ast * tree; /* ast node for this iCode (if not NULL) */ + } +iCode; + +/* various functions associated to iCode */ +typedef struct icodeFuncTable + { + int icode; + char *printName; + void (*iCodePrint) (struct dbuf_s *, iCode *, char *); + iCode *(*iCodeCopy) (iCode *); + } +iCodeTable; + +/* useful macros */ +#define SKIP_IC2(x) (x->op == GOTO || \ + x->op == LABEL || \ + x->op == FUNCTION || \ + x->op == INLINEASM || \ + x->op == ENDFUNCTION ) + +#define SKIP_IC1(x) (x->op == CALL || \ + SKIP_IC2(x) ) + +#define SKIP_IC(x) (x->op == PCALL || \ + x->op == IPUSH || \ + x->op == IPOP || \ + x->op == JUMPTABLE || \ + x->op == RECEIVE || \ + x->op == ARRAYINIT || \ + SKIP_IC1(x) || \ + x->op == CRITICAL || \ + x->op == ENDCRITICAL || \ + x->op == SEND ) + +#define SKIP_IC3(x) (SKIP_IC2(x) || \ + x->op == JUMPTABLE ) + +#define IS_CONDITIONAL(x) (x->op == EQ_OP || \ + x->op == '<' || \ + x->op == '>' || \ + x->op == LE_OP || \ + x->op == GE_OP || \ + x->op == NE_OP ) + +#define IS_TRUE_SYMOP(op) (op && IS_SYMOP(op) && !IS_ITEMP(op)) + +#define POINTER_SET(ic) ( ic && ic->op == '=' \ + && (IS_ITEMP(IC_RESULT(ic)) || IS_OP_LITERAL(IC_RESULT(ic)))\ + && IC_RESULT(ic)->isaddr ) + +#define POINTER_GET(ic) ( ic && ic->op == GET_VALUE_AT_ADDRESS \ + && (IS_ITEMP(IC_LEFT(ic)) || IS_OP_LITERAL(IC_LEFT(ic)))\ + && IC_LEFT(ic)->isaddr ) + +#define IS_ARITHMETIC_OP(x) (x && (x->op == '+' || \ + x->op == '-' || \ + x->op == '/' || \ + x->op == '*' || \ + x->op == '%')) +#define IS_BITWISE_OP(x) (x && (x->op == BITWISEAND || \ + x->op == '|' || \ + x->op == '^')) + +#define IS_ASSOCIATIVE(x) (x && (x->op == EQ_OP || \ + x->op == NE_OP || \ + x->op == '+' || \ + x->op == '*' || \ + x->op == BITWISEAND || \ + x->op == '|' || \ + x->op == '^')) + +#define ASSIGNMENT(ic) ( ic && ic->op == '=') + +#define ASSIGN_SYM_TO_ITEMP(ic) (ic && ic->op == '=' && \ + IS_TRUE_SYMOP(IC_RIGHT(ic)) && \ + IS_ITEMP(IC_RESULT(ic))) + +#define ASSIGN_ITEMP_TO_SYM(ic) (ic && ic->op == '=' && \ + IS_TRUE_SYMOP(IC_RESULT(ic)) && \ + IS_ITEMP(IC_RIGHT(ic))) + +#define ASSIGN_ITEMP_TO_ITEMP(ic) (ic && ic->op == '=' &&\ + !POINTER_SET(ic) &&\ + IS_ITEMP(IC_RIGHT(ic)) &&\ + IS_ITEMP(IC_RESULT(ic))) + +#define ADD_SUBTRACT_ITEMP(ic) (ic && (ic->op == '+' || ic->op == '-') && \ + IS_ITEMP(IC_RESULT(ic)) && \ + ( ( IS_ITEMP(IC_LEFT(ic)) ) || ( IS_SYMOP(IC_LEFT(ic)) ) ) && \ + IS_OP_LITERAL(IC_RIGHT(ic))) + +#define ASSIGNMENT_TO_SELF(ic) (!POINTER_SET(ic) && !POINTER_GET(ic) && \ + ic->op == '=' && IC_RESULT(ic)->key == IC_RIGHT(ic)->key ) + +#define IS_CAST_ICODE(ic) (ic && ic->op == CAST) +#define SET_ISADDR(op,v) {op = operandFromOperand(op); op->isaddr = v;} +#define SET_RESULT_RIGHT(ic) {SET_ISADDR(IC_RIGHT(ic),0); SET_ISADDR(IC_RESULT(ic),0);} +#define IS_ASSIGN_ICODE(ic) (ASSIGNMENT(ic) && !POINTER_SET(ic)) + +#define OP_DEFS(op) validateOpType(op, "OP_DEFS", #op, SYMBOL, __FILE__, __LINE__)->operand.symOperand->defs +#define OP_USES(op) validateOpType(op, "OP_USES", #op, SYMBOL, __FILE__, __LINE__)->operand.symOperand->uses +/*-----------------------------------------------------------------*/ +/* forward references for functions */ +/*-----------------------------------------------------------------*/ +iCode *reverseiCChain (); +bool isOperandOnStack (operand *); +int isOperandVolatile (operand *, bool); +int isOperandGlobal (operand *); +void printiCChain (iCode *, FILE *); +operand *ast2iCode (ast *,int); +operand *geniCodePtrPtrSubtract (operand *, operand *); +void initiCode (); +iCode *iCodeFromAst (ast *); +int isiCodeEqual (iCode *, iCode *); +int isOperandEqual (operand *, operand *); +iCodeTable *getTableEntry (int); +int isOperandLiteral (operand *); +operand *operandOperation (operand *, operand *, int, sym_link *); +double operandLitValue (operand *); +operand *operandFromLit (double); +operand *operandFromOperand (operand *); +int isParameterToCall (value *, operand *); +iCode *newiCodeLabelGoto (int, symbol *); +symbol *newiTemp (char *); +symbol *newiTempLabel (char *); +#define LOOPEXITLBL "loopExitLbl" +symbol *newiTempLoopHeaderLabel (bool); +iCode *newiCode (int, operand *, operand *); +sym_link *operandType (operand *); +unsigned int operandSize (operand *); +operand *operandFromValue (value *); +operand *operandFromSymbol (symbol *); +operand *operandFromLink (sym_link *); +sym_link *aggrToPtr (sym_link *, bool); +int aggrToPtrDclType (sym_link *, bool); +int piCode (void *, FILE *); +int dbuf_printOperand (operand *, struct dbuf_s *); +int printOperand (operand *, FILE *); +void setOperandType (operand *, sym_link *); +bool isOperandInFarSpace (operand *); +bool isOperandInPagedSpace (operand *); +bool isOperandInDirSpace (operand *); +bool isOperandInCodeSpace (operand *); +operand *opFromOpWithDU (operand *, bitVect *, bitVect *); +iCode *copyiCode (iCode *); +operand *newiTempOperand (sym_link *, char); +operand *newiTempFromOp (operand *); +iCode *getBuiltinParms (iCode *,int *, operand **); +int isiCodeInFunctionCall (iCode *); +/*-----------------------------------------------------------------*/ +/* declaration of exported variables */ +/*-----------------------------------------------------------------*/ +extern char *filename; +extern int lineno; +#endif diff --git a/src/SDCClabel.c b/src/SDCClabel.c new file mode 100644 index 0000000..ba78d47 --- /dev/null +++ b/src/SDCClabel.c @@ -0,0 +1,474 @@ +/*----------------------------------------------------------------- + SDCClabel.c - label optimizations on iCode (intermediate code) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" + +hTab *labelRef = NULL; +hTab *labelDef = NULL; + +/*-----------------------------------------------------------------*/ +/* buildLabelRefTable - creates an hashTable of label references */ +/*-----------------------------------------------------------------*/ +void +buildLabelRefTable (iCode * ic) +{ + iCode *lic; + + setToNull ((void *) &labelRef); + setToNull ((void *) &labelDef); + labelRef = newHashTable (labelKey + 1); + labelDef = newHashTable (labelKey + 1); + + for (lic = ic; lic; lic = lic->next) + { + if (lic->op == GOTO) + hTabAddItem (&labelRef, (IC_LABEL (lic))->key, lic); + + if (lic->op == JUMPTABLE) + { + symbol *lbl; + for (lbl = setFirstItem (IC_JTLABELS (lic)); lbl; + lbl = setNextItem (IC_JTLABELS (lic))) + { + hTabAddItem (&labelRef, lbl->key, lic); + } + } + + if (lic->op == IFX) + { + if (IC_TRUE (lic)) + hTabAddItem (&labelRef, (IC_TRUE (lic))->key, lic); + else + hTabAddItem (&labelRef, (IC_FALSE (lic))->key, lic); + } + if (lic->op == LABEL) + hTabAddItem (&labelDef, (IC_LABEL (lic))->key, lic); + + } +} + +/*-----------------------------------------------------------------*/ +/* labelGotoNext - kills gotos to next statement */ +/*-----------------------------------------------------------------*/ +int +labelGotoNext (iCode * ic) +{ + iCode *loop; + int change = 0; + + for (loop = ic; loop; loop = loop->next) + { + + if (loop->op == GOTO && /* if this is a goto */ + loop->next && /* and we have a next one */ + loop->next->op == LABEL && /* next one is a label */ + loop->next->label->key == loop->label->key) /* same label */ + { + loop->prev->next = loop->next; /* get this out of the chain */ + loop->next->prev = loop->prev; + hTabDeleteItem (&labelRef, (IC_LABEL (loop))->key, loop, DELETE_ITEM, NULL); + change++; + } + } + + return change; +} + +/*-------------------------------------------------------------------*/ +/* deleteIfx - delete an IFX iCode or convert to DUMMY_READ_VOLATILE */ +/*-------------------------------------------------------------------*/ +static void +deleteIfx (iCode * loop, int key) +{ + if (!options.lessPedantic) + { + werrorfl (loop->filename, loop->lineno, W_CONTROL_FLOW); + } + hTabDeleteItem (&labelRef, key, loop, DELETE_ITEM, NULL); + + /* If the condition was volatile, convert IFX to */ + /* DUMMY_READ_VOLATILE. Otherwise just delete the */ + /* IFX iCode */ + if (IS_OP_VOLATILE (IC_COND (loop))) + { + IC_RIGHT (loop) = IC_COND (loop); + IC_LEFT (loop) = NULL; + IC_RESULT (loop) = NULL; + loop->op = DUMMY_READ_VOLATILE; + } + else + { + loop->prev->next = loop->next; + loop->next->prev = loop->prev; + } +} + + +/*-----------------------------------------------------------------*/ +/* labelIfx - special case Ifx elimination */ +/*-----------------------------------------------------------------*/ +int +labelIfx (iCode * ic) +{ + iCode *loop; + int change = 0; + + + for (loop = ic; loop; loop = loop->next) + { + /* if condition goto label */ + /* goto label */ + /* i.e. the flow is going to the same location + regardless of the condition in this case the + condition can be eliminated with a WARNING ofcource */ + if (loop->op == IFX && + loop->next && + loop->next->op == GOTO) + { + if (IC_TRUE (loop) && + IC_TRUE (loop)->key == IC_LABEL (loop->next)->key) + { + deleteIfx (loop, IC_TRUE (loop)->key); + change++; + continue; + } + else + { + if (IC_FALSE (loop) && + IC_FALSE (loop)->key == IC_LABEL (loop->next)->key) + { + deleteIfx (loop, IC_FALSE (loop)->key); + change++; + continue; + } + } + } + /* same as above but with a twist */ + /* if condition goto label */ + /* label: */ + if (loop->op == IFX && + loop->next && + loop->next->op == LABEL && + ((IC_TRUE (loop) && IC_TRUE (loop)->key == IC_LABEL (loop->next)->key) || + (IC_FALSE (loop) && IC_FALSE (loop)->key == IC_LABEL (loop->next)->key))) + { + deleteIfx (loop, IC_LABEL (loop->next)->key); + change++; + continue; + } + + /* we will eliminate certain special case situations */ + /* of the conditional statement :- */ + /* if cond != 0 goto _trueLabel */ + /* goto _falseLabel */ + /* _trueLabel : */ + /* ... */ + /* in these cases , if this is the only reference */ + /* to the _trueLabel, we can change it to :- */ + /* if cond == 0 goto _falseLabel */ + /* ... */ + /* similarly if we have a situation like :- */ + /* if cond == 0 goto _falseLabel */ + /* goto _someLabel */ + /* _falseLabel : */ + /* we can change this to */ + /* if cond != 0 goto _someLabel */ + /* ... */ + if (loop->op == IFX && + loop->next && + loop->next->op == GOTO && + loop->next->next && + loop->next->next->op == LABEL) + { + + + /* now check that the last label is the */ + /* same as the _trueLabel of this */ + if (IC_TRUE (loop)) + if ((IC_TRUE (loop))->key != (IC_LABEL (loop->next->next))->key) + continue; + else; + else if ((IC_FALSE (loop))->key != (IC_LABEL (loop->next->next))->key) + continue; + + /* now make sure that this is the only */ + /* referenece to the _trueLabel */ + if (IC_TRUE (loop) && hTabItemWithKey (labelRef, (IC_TRUE (loop))->key)) + { + + /* we just change the falseLabel */ + /* to the next goto statement */ + /* unreferenced label will take */ + /* care of removing the label */ + /* delete reference to the true label */ + + hTabDeleteItem (&labelRef, (IC_TRUE (loop))->key, loop, DELETE_ITEM, NULL); + IC_TRUE (loop) = NULL; + IC_FALSE (loop) = IC_LABEL (loop->next); + /* add reference to the LABEL */ + hTabAddItem (&labelRef, (IC_FALSE (loop))->key, loop); + /* next remove the goto */ + hTabDeleteItem (&labelRef, + (IC_LABEL (loop->next))->key, loop->next, DELETE_ITEM, NULL); + loop->next = loop->next->next; + loop->next->prev = loop; + change++; + continue; + } + + /* now do the same with the false labels */ + if (IC_FALSE (loop) && + hTabItemWithKey (labelRef, (IC_FALSE (loop))->key)) + { + + hTabDeleteItem (&labelRef, (IC_FALSE (loop))->key, loop, DELETE_ITEM, NULL); + IC_FALSE (loop) = NULL; + IC_TRUE (loop) = IC_LABEL (loop->next); + hTabAddItem (&labelRef, (IC_TRUE (loop))->key, loop); + hTabDeleteItem (&labelRef, (IC_LABEL (loop->next))->key, loop->next, DELETE_ITEM, NULL); + loop->next = loop->next->next; + loop->next->prev = loop; + change++; + continue; + } + } + } + + return change; +} + +/*-----------------------------------------------------------------*/ +/* labelGotoGoto - target of a goto is a goto */ +/*-----------------------------------------------------------------*/ +int +labelGotoGoto (iCode * ic) +{ + iCode *loop; + int change = 0; + + for (loop = ic; loop; loop = loop->next) + { + iCode *stat; + symbol *sLabel = NULL; + stat = NULL; + switch (loop->op) + { + case GOTO: /* for a goto statement */ + stat = hTabItemWithKey (labelDef, (sLabel = IC_LABEL (loop))->key); + break; + case IFX: /* for a conditional jump */ + if (IC_TRUE (loop)) + stat = hTabItemWithKey (labelDef, (sLabel = IC_TRUE (loop))->key); + else + stat = hTabItemWithKey (labelDef, (sLabel = IC_FALSE (loop))->key); + } + + /* if we have a target statement then check if the next */ + /* one is a goto: this means target of goto is a goto */ + if (stat && stat->next && + (stat->next->op == GOTO || + stat->next->op == LABEL) && + stat->next != loop) + { + + symbol *repLabel = stat->next->label; /* replace with label */ + + /* if they are the same then continue */ + if (repLabel->key == sLabel->key) + continue; + + /* replacement depends on the statement type */ + switch (loop->op) + { + + case GOTO: /* for a goto statement */ + + hTabDeleteItem (&labelRef, (IC_LABEL (loop))->key, loop, DELETE_ITEM, NULL); + loop->label = repLabel; + hTabAddItem (&labelRef, repLabel->key, loop); + break; + + case IFX: /* for a conditional jump */ + if (IC_TRUE (loop)) + { + + hTabDeleteItem (&labelRef, (IC_TRUE (loop))->key, loop, DELETE_ITEM, NULL); + IC_TRUE (loop) = repLabel; + } + else + { + + hTabDeleteItem (&labelRef, (IC_FALSE (loop))->key, loop, DELETE_ITEM, NULL); + IC_FALSE (loop) = repLabel; + } + hTabAddItem (&labelRef, repLabel->key, loop); + + } + change++; + } + } + + return change; +} + +/*-----------------------------------------------------------------*/ +/* labelUnrefLabel - remove unreferenced labels */ +/*-----------------------------------------------------------------*/ +int +labelUnrefLabel (iCode * ic) +{ + iCode *loop; + int change = 0; + + for (loop = ic; loop; loop = loop->next) + { + + /* if this is a label */ + if (loop->op == LABEL) + { + if (((IC_LABEL (loop))->key == returnLabel->key) || + ((IC_LABEL (loop))->key == entryLabel->key)) + continue; + + if (hTabItemWithKey (labelRef, (IC_LABEL (loop))->key)) + continue; + + /* else eliminitate this one */ + loop->prev->next = loop->next; /* get this out of the chain */ + loop->next->prev = loop->prev; + change++; + } + } + + return change; +} + +/*-----------------------------------------------------------------*/ +/* labelUnreach - remove unreachable code */ +/*-----------------------------------------------------------------*/ +int +labelUnreach (iCode * ic) +{ + iCode *loop; + iCode *tic; + int change = 0; + + /* if we hit a return statement or a goto statement */ + /* remove all statements till we hit the next label */ + for (loop = ic; loop; loop = loop->next) + { + iCode *loop2; + + /* found a goto || return && the next */ + /* statement is not a label */ + if (loop->op == GOTO || loop->op == RETURN) + { + if (loop->next && + (loop->next->op == LABEL || + loop->next->op == ENDFUNCTION)) + continue; + + /* loop till we find a label */ + loop2 = loop->next; + while (loop2 && loop2->op != LABEL) + loop2 = loop2->next; + + /* throw away those in between */ + for (tic = loop->next; tic && tic != loop2; tic = tic->next) + { + /* remove label references if any */ + switch (tic->op) + { + case GOTO: + hTabDeleteItem (&labelRef, IC_LABEL (tic)->key, tic, DELETE_ITEM, NULL); + break; + case IFX: + werrorfl (tic->filename, tic->lineno, W_CODE_UNREACH); + if (IC_TRUE (tic)) + hTabDeleteItem (&labelRef, IC_TRUE (tic)->key, tic, DELETE_ITEM, NULL); + else + hTabDeleteItem (&labelRef, IC_FALSE (tic)->key, tic, DELETE_ITEM, NULL); + break; + default: + werrorfl (tic->filename, tic->lineno, W_CODE_UNREACH); + } + } + + /* now set up the pointers */ + loop->next = loop2; + if (loop2) + loop2->prev = loop; + change++; + } + } + return change; +} + +/*-----------------------------------------------------------------*/ +/* iCodeLabelOptimize - some obvious & general optimizations */ +/*-----------------------------------------------------------------*/ +iCode * +iCodeLabelOptimize (iCode * ic) +{ + if (!optimize.label1 && + !optimize.label2 && + !optimize.label3 && + !optimize.label4) + return ic; + + /* build labelreferences */ + buildLabelRefTable (ic); + + /* the following transformations need to ne done */ + /* repeatedly till a fixed point is reached */ + while (1) + { + int change; + change = 0; + + /* first eliminate any goto statement */ + /* that goes to the next statement */ + if (optimize.label1) + change += labelGotoNext (ic); + + if (optimize.label2) + change += labelIfx (ic); + + /* target of a goto is a goto then rename this goto */ + if (optimize.label3) + change += labelGotoGoto (ic); + + /* remove unreference labels */ + if (optimize.label4) + change += labelUnrefLabel (ic); + + /* remove unreachable code */ + change += labelUnreach (ic); + + if (!change) /* fixed point reached */ + break; + } + + return ic; +} diff --git a/src/SDCClabel.h b/src/SDCClabel.h new file mode 100644 index 0000000..76adb95 --- /dev/null +++ b/src/SDCClabel.h @@ -0,0 +1,38 @@ +/*----------------------------------------------------------------- + SDCClabel.h - label optimizations on iCode (intermediate code) + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "SDCCglobl.h" +#include "SDCCsymt.h" + +#ifndef SDCCLABEL_H +#define SDCCLABEL_H + +extern hTab *labelRef; +extern hTab *labelDef; +extern int labelKey; + +iCode *iCodeLabelOptimize (iCode *); + + +#endif diff --git a/src/SDCCloop.c b/src/SDCCloop.c new file mode 100644 index 0000000..6400d1a --- /dev/null +++ b/src/SDCCloop.c @@ -0,0 +1,1486 @@ +/*------------------------------------------------------------------------- + + SDCCloop.c - source file for loop detection & optimizations + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" +#include "newalloc.h" + +DEFSETFUNC (isDefAlive); + +STACK_DCL (regionStack, eBBlock *, MAX_NEST_LEVEL * 10); + +/*-----------------------------------------------------------------*/ +/* newInduction - creates a new induction variable */ +/*-----------------------------------------------------------------*/ +static induction * +newInduction (operand * sym, unsigned int op, + long constVal, iCode * ic, operand * asym) +{ + induction *ip; + + ip = Safe_alloc ( sizeof (induction)); + + ip->sym = sym; + ip->asym = asym; + ip->op = op; + ip->cval = constVal; + ip->ic = ic; +//updateSpillLocation(ic,1); + return ip; +} + +/*-----------------------------------------------------------------*/ +/* newRegion - allocate & returns a loop structure */ +/*-----------------------------------------------------------------*/ +static region * +newRegion () +{ + region *lp; + + lp = Safe_alloc ( sizeof (region)); + + return lp; +} + + +#if 0 +/*-----------------------------------------------------------------*/ +/* pinduction - prints induction */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (pinduction) +{ + induction *ip = item; + iCodeTable *icTab; + + fprintf (stdout, "\t"); + printOperand (ip->sym, stdout); + icTab = getTableEntry (ip->ic->op); + icTab->iCodePrint (stdout, ip->ic, icTab->printName); + fprintf (stdout, " %04d\n", (int) ip->cval); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* pregion - prints loop information */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (pregion) +{ + region *lp = item; + + printf ("================\n"); + printf (" loop with entry -- > "); + printEntryLabel (lp->entry, ap); + printf ("\n"); + printf (" loop body --> "); + applyToSet (lp->regBlocks, printEntryLabel); + printf ("\n"); + printf (" loop exits --> "); + applyToSet (lp->exits, printEntryLabel); + printf ("\n"); + return 0; +} +#endif + +/*-----------------------------------------------------------------*/ +/* backEdges - returns a list of back edges */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (backEdges) +{ + edge *ep = item; + V_ARG (set **, bEdges); + + /* if this is a back edge ; to determine this we check */ + /* to see if the 'to' is in the dominator list of the */ + /* 'from' if yes then this is a back edge */ + if (bitVectBitValue (ep->from->domVect, ep->to->bbnum)) + { + addSetHead (bEdges, ep); + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* intersectLoopSucc - returns intersection of loop Successors */ +/*-----------------------------------------------------------------*/ +static bitVect * +intersectLoopSucc (set * lexits, eBBlock ** ebbs) +{ + bitVect *succVect = NULL; + eBBlock *exit = setFirstItem (lexits); + + if (!exit) + return NULL; + + succVect = bitVectCopy (exit->succVect); + + for (exit = setNextItem (lexits); exit; + exit = setNextItem (lexits)) + { + succVect = bitVectIntersect (succVect, + exit->succVect); + } + + return succVect; +} + +/*-----------------------------------------------------------------*/ +/* loopInsert will insert a block into the loop set */ +/*-----------------------------------------------------------------*/ +static void +loopInsert (set ** regionSet, eBBlock * block) +{ + if (!isinSet (*regionSet, block)) + { + addSetHead (regionSet, block); + STACK_PUSH (regionStack, block); + } +} + +/*-----------------------------------------------------------------*/ +/* insertIntoLoop - insert item into loop */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (insertIntoLoop) +{ + eBBlock *ebp = item; + V_ARG (set **, regionSet); + + loopInsert (regionSet, ebp); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* isNotInBlocks - will return 1 if not is blocks */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (isNotInBlocks) +{ + eBBlock *ebp = item; + V_ARG (set *, blocks); + + if (!isinSet (blocks, ebp)) + return 1; + + return 0; +} + +#if 0 +/*-----------------------------------------------------------------*/ +/* hasIncomingDefs - has definitions coming into the loop. i.e. */ +/* check to see if the preheaders outDefs has any definitions */ +/*-----------------------------------------------------------------*/ +static int +hasIncomingDefs (region * lreg, operand * op) +{ + eBBlock *preHdr = lreg->entry->preHeader; + + if (preHdr && bitVectBitsInCommon (preHdr->outDefs, OP_DEFS (op))) + return 1; + return 0; +} + +/*-----------------------------------------------------------------*/ +/* findLoopEndSeq - will return the sequence number of the last */ +/* iCode with the maximum dfNumber in the region */ +/*-----------------------------------------------------------------*/ +static int +findLoopEndSeq (region * lreg) +{ + eBBlock *block; + eBBlock *lblock; + + for (block = lblock = setFirstItem (lreg->regBlocks); block; + block = setNextItem (lreg->regBlocks)) + { + if (block != lblock && block->lSeq > lblock->lSeq) + lblock = block; + } + + return lblock->lSeq; +} +#endif + +/*-----------------------------------------------------------------*/ +/* addToExitsMarkDepth - will add the the exitSet all blocks that */ +/* have exits, will also update the depth field in the blocks */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (addToExitsMarkDepth) +{ + eBBlock *ebp = item; + V_ARG (set *, loopBlocks); + V_ARG (set **, exits); + V_ARG (int, depth); + V_ARG (region *, lr); + + /* mark the loop depth of this block */ + //if (!ebp->depth) + if (ebp->depthdepth = depth; + + /* NOTE: here we will update only the inner most loop + that it is a part of */ + if (!ebp->partOfLoop) + ebp->partOfLoop = lr; + + /* if any of the successors go out of the loop then */ + /* we add this one to the exits */ + if (applyToSet (ebp->succList, isNotInBlocks, loopBlocks)) + { + addSetHead (exits, ebp); + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* createLoop - will create a set of region */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (createLoop) +{ + edge *ep = item; + V_ARG (set **, allRegion); + region *aloop = newRegion (); + eBBlock *block; + + /* make sure regionStack is empty */ + while (!STACK_EMPTY (regionStack)) + STACK_POP (regionStack); + + /* add the entryBlock */ + addSet (&aloop->regBlocks, ep->to); + loopInsert (&aloop->regBlocks, ep->from); + + while (!STACK_EMPTY (regionStack)) + { + block = STACK_POP (regionStack); + /* if block != entry */ + if (block != ep->to) + applyToSet (block->predList, insertIntoLoop, &aloop->regBlocks); + } + + aloop->entry = ep->to; + + /* now add it to the set */ + addSetHead (allRegion, aloop); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* dominatedBy - will return 1 if item is dominated by block */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (dominatedBy) +{ + eBBlock *ebp = item; + V_ARG (eBBlock *, block); + + return bitVectBitValue (ebp->domVect, block->bbnum); +} + +/*-----------------------------------------------------------------*/ +/* addDefInExprs - adds an expression into the inexpressions */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (addDefInExprs) +{ + eBBlock *ebp = item; + V_ARG (cseDef *, cdp); + V_ARG (ebbIndex *, ebbi); + + addSetHead (&ebp->inExprs, cdp); + cseBBlock (ebp, optimize.global_cse, ebbi); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* assignmentsToSym - for a set of blocks determine # time assigned */ +/*-----------------------------------------------------------------*/ +static int +assignmentsToSym (set * sset, operand * sym) +{ + eBBlock *ebp; + int assigns = 0; + set *blocks = setFromSet (sset); + + for (ebp = setFirstItem (blocks); ebp; + ebp = setNextItem (blocks)) + { + /* get all the definitions for this symbol + in this block */ + bitVect *defs = bitVectIntersect (ebp->ldefs, OP_DEFS (sym)); + assigns += bitVectnBitsOn (defs); + setToNull ((void *) &defs); + } + + return assigns; +} + + +/*-----------------------------------------------------------------*/ +/* isOperandInvariant - determines if an operand is an invariant */ +/*-----------------------------------------------------------------*/ +static int +isOperandInvariant (operand * op, region * theLoop, set * lInvars) +{ + int opin = 0; + /* operand is an invariant if it is a */ + /* a. constants . */ + /* b. that have defintions reaching loop entry */ + /* c. that are already defined as invariant */ + /* d. has no assignments in the loop */ + if (op) + { + if (IS_OP_LITERAL (op)) + opin = 1; + else if (IS_SYMOP (op) && + OP_SYMBOL (op)->addrtaken) + opin = 0; + else if (ifDefSymIs (theLoop->entry->inExprs, op)) + opin = 1; + else if (ifDefSymIs (lInvars, op)) + opin = 1; + else if (IS_SYMOP (op) && + !IS_OP_GLOBAL (op) && + !IS_OP_VOLATILE (op) && + assignmentsToSym (theLoop->regBlocks, op) == 0) + opin = 1; + } + else + opin++; + + return opin; +} + +/*-----------------------------------------------------------------*/ +/* pointerAssigned - will return 1 if pointer set found */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (pointerAssigned) +{ + eBBlock *ebp = item; + V_ARG (operand *, op); + + if (ebp->hasFcall) + return 1; + + if (bitVectBitValue (ebp->ptrsSet, op->key)) + return 1; + + /* Unfortunately, one of the other pointer set operations */ + /* may be using an alias of this operand, and the above */ + /* test would miss it. To be thorough, some aliasing */ + /* analysis should be done here. In the meantime, be */ + /* conservative and assume any other pointer set operation */ + /* is dangerous */ + if (!bitVectIsZero (ebp->ptrsSet)) + return 1; + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* hasNonPtrUse - returns true if operand has non pointer usage */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (hasNonPtrUse) +{ + eBBlock *ebp = item; + V_ARG (operand *, op); + iCode *ic = usedInRemaining (op, ebp->sch); + + if (ic && !POINTER_SET (ic) && !POINTER_GET (ic)) + return 1; + + return 0; + +} + +/*-----------------------------------------------------------------*/ +/* loopInvariants - takes loop invariants out of region */ +/*-----------------------------------------------------------------*/ +static int +loopInvariants (region * theLoop, ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->dfOrder; + int count = ebbi->count; + eBBlock *lBlock; + set *lInvars = NULL; + + int change = 0; + int fCallsInBlock; + + /* if the preHeader does not exist then do nothing */ + /* or no exits then do nothing ( have to think about this situation */ + if (theLoop->entry->preHeader == NULL || + theLoop->exits == NULL) + return 0; + + /* we will do the elimination for those blocks */ + /* in the loop that dominate all exits from the loop */ + for (lBlock = setFirstItem (theLoop->regBlocks); lBlock; + lBlock = setNextItem (theLoop->regBlocks)) + { + + iCode *ic; + int domsAllExits; + int i; + + /* mark the dominates all exits flag */ + domsAllExits = (applyToSet (theLoop->exits, dominatedBy, lBlock) == + elementsInSet (theLoop->exits)); + + /* find out if we have a function call in this block */ + for (ic = lBlock->sch, fCallsInBlock=0; ic; ic = ic->next) + { + if (SKIP_IC(ic)) + { + fCallsInBlock++; + } + } + + /* now we go thru the instructions of this block and */ + /* collect those instructions with invariant operands */ + for (ic = lBlock->sch; ic; ic = ic->next) + { + + int lin, rin; + cseDef *ivar; + + /* TODO this is only needed if the call is between + here and the definition, but I am too lazy to do that now */ + + /* if there are function calls in this block */ + if (fCallsInBlock) + { + /* if this is a pointer get */ + if (POINTER_GET(ic)) + { + continue; + } + + /* if this is an assignment from a global */ + if (ic->op=='=' && isOperandGlobal(IC_RIGHT(ic))) + { + continue; + } + + /* Bug 1717943, + * if this is an assignment to a global */ + if (ic->op=='=' && isOperandGlobal(IC_RESULT(ic))) + { + continue; + } + } + + if (SKIP_IC (ic) || POINTER_SET (ic) || ic->op == IFX) + continue; + + /* iTemp assignment from a literal may be invariant, but it + will needlessly increase register pressure if the + iCode(s) that use this iTemp are not also invariant */ + if (ic->op=='=' && IS_ITEMP (IC_RESULT (ic)) + && IS_OP_LITERAL (IC_RIGHT (ic))) + continue; + + /* if result is volatile then skip */ + if (IC_RESULT (ic) && + (isOperandVolatile (IC_RESULT (ic), TRUE) || + IS_OP_PARM (IC_RESULT (ic)))) + continue; + + /* if result depends on a volatile then skip */ + if ((IC_LEFT(ic) && isOperandVolatile(IC_LEFT(ic), TRUE)) || + (IC_RIGHT(ic) && isOperandVolatile(IC_RIGHT(ic), TRUE))) + continue; + + lin = rin = 0; + + /* special case */ + /* if address of then it is an invariant */ + if (ic->op == ADDRESS_OF && + IS_SYMOP (IC_LEFT (ic)) && + IS_AGGREGATE (operandType (IC_LEFT (ic)))) + { + lin++; + } + else + { + /* check if left operand is an invariant */ + if ((lin = isOperandInvariant (IC_LEFT (ic), theLoop, lInvars)) && + /* if this is a pointer get then make sure + that the pointer set does not exist in + any of the blocks */ + POINTER_GET (ic) && + applyToSet (theLoop->regBlocks, pointerAssigned, IC_LEFT (ic))) + { + lin = 0; + } + } + + /* do the same for right */ + rin = isOperandInvariant (IC_RIGHT (ic), theLoop, lInvars); + + /* if this is a POINTER_GET then special case, make sure all + usages within the loop are POINTER_GET any other usage + would mean that this is not an invariant , since the pointer + could then be passed as a parameter */ + if (POINTER_GET (ic) && + applyToSet (theLoop->regBlocks, hasNonPtrUse, IC_LEFT (ic))) + continue; + + + /* if both the left & right are invariants : then check that */ + /* this definition exists in the out definition of all the */ + /* blocks, this will ensure that this is not assigned any */ + /* other value in the loop, and not used in this block */ + /* prior to this definition which means only this definition */ + /* is used in this loop */ + if (lin && rin && IC_RESULT (ic)) + { + eBBlock *sBlock; + set *lSet = setFromSet (theLoop->regBlocks); + + /* if this block does not dominate all exits */ + /* make sure this defintion is not used anywhere else */ + if (!domsAllExits) + { + + if (isOperandGlobal (IC_RESULT (ic))) + continue; + /* for successors for all exits */ + for (sBlock = setFirstItem (theLoop->exits); sBlock; + sBlock = setNextItem (theLoop->exits)) + { + + for (i = 0; i < count; ebbs[i++]->visited = 0); + lBlock->visited = 1; + if (applyToSet (sBlock->succList, isDefAlive, ic)) + break; + } + + /* we have found usage */ + if (sBlock) + continue; + } + + /* now make sure this is the only definition */ + for (sBlock = setFirstItem (lSet); sBlock; + sBlock = setNextItem (lSet)) + { + iCode *ic2; + int used; + int defDominates; + + /* if this is the block make sure the definition */ + /* reaches the end of the block */ + if (sBlock == lBlock) + { + if (!ifDiCodeIs (sBlock->outExprs, ic)) + break; + } + else if (bitVectBitsInCommon (sBlock->defSet, OP_DEFS (IC_RESULT (ic)))) + break; + + /* Check that this definition is not assigned */ + /* any other value in this block. Also check */ + /* that any usage in the block is dominated by */ + /* by this definition. */ + defDominates = bitVectBitValue (sBlock->domVect, lBlock->bbnum); + used = 0; + for (ic2 = sBlock->sch; ic2; ic2 = ic2->next) + { + if (ic2->op == IFX) + { + if (isOperandEqual (IC_RESULT (ic), IC_COND (ic2))) + used = 1; + } + else if (ic2->op == JUMPTABLE) + { + if (isOperandEqual (IC_RESULT (ic), IC_JTCOND (ic2))) + used = 1; + } + else + { + if (IC_LEFT (ic2) && isOperandEqual (IC_RESULT (ic), IC_LEFT (ic2))) + used = 1; + if (IC_RIGHT (ic2) && isOperandEqual (IC_RESULT (ic), IC_RIGHT (ic2))) + used = 1; + if ((ic != ic2) && (isOperandEqual(IC_RESULT(ic), IC_RESULT(ic2)))) + break; + /* If used before this definition, might not be invariant */ + if ((ic == ic2) && used) + break; + } + if (used && !defDominates) + break; + } + if (ic2) /* found another definition or a usage before the definition */ + break; + } + + if (sBlock) + continue; /* another definition present in the block */ + + + /* now check if it exists in the in of this block */ + /* if not then it was killed before this instruction */ + if (!bitVectBitValue (lBlock->inDefs, ic->key)) + continue; + + /* now we know it is a true invariant */ + /* remove it from the insts chain & put */ + /* in the invariant set */ + + OP_SYMBOL (IC_RESULT (ic))->isinvariant = 1; + SPIL_LOC (IC_RESULT (ic)) = NULL; + remiCodeFromeBBlock (lBlock, ic); + + /* maintain the data flow */ + /* this means removing from definition from the */ + /* defset of this block and adding it to the */ + /* inexpressions of all blocks within the loop */ + bitVectUnSetBit (lBlock->defSet, ic->key); + bitVectUnSetBit (lBlock->ldefs, ic->key); + ivar = newCseDef (IC_RESULT (ic), ic); + applyToSet (theLoop->regBlocks, addDefInExprs, ivar, ebbi); + addSet (&lInvars, ivar); + } + } + } /* for all loop blocks */ + + /* if we have some invariants then */ + if (lInvars) + { + eBBlock *preHdr = theLoop->entry->preHeader; + iCode *icFirst = NULL, *icLast = NULL; + cseDef *cdp; + + /* create an iCode chain from it */ + for (cdp = setFirstItem (lInvars); cdp; cdp = setNextItem (lInvars)) + { + + /* maintain data flow .. add it to the */ + /* ldefs defSet & outExprs of the preheader */ + preHdr->defSet = bitVectSetBit (preHdr->defSet, cdp->diCode->key); + preHdr->ldefs = bitVectSetBit (preHdr->ldefs, cdp->diCode->key); + cdp->diCode->filename = preHdr->ech->filename; + cdp->diCode->lineno = preHdr->ech->lineno; + addSetHead (&preHdr->outExprs, cdp); + + + if (!icFirst) + icFirst = cdp->diCode; + if (icLast) + { + icLast->next = cdp->diCode; + cdp->diCode->prev = icLast; + icLast = cdp->diCode; + } + else + icLast = cdp->diCode; + change++; + } + + /* add the instruction chain to the end of the + preheader for this loop, preheaders will always + have atleast a label */ + preHdr->ech->next = icFirst; + icFirst->prev = preHdr->ech; + preHdr->ech = icLast; + icLast->next = NULL; + + } + return change; +} + +/*-----------------------------------------------------------------*/ +/* addressTaken - returns true if the symbol is found in the addrof */ +/*-----------------------------------------------------------------*/ +static int +addressTaken (set * sset, operand * sym) +{ + set *loop; + eBBlock *ebp; + set *loop2; + + for (loop = sset; loop; loop = loop->next) + { + ebp = loop->item; + loop2 = ebp->addrOf; + while (loop2) + { + if (isOperandEqual ((operand *) loop2->item, sym)) + return 1; + loop2 = loop2->next; + } + } + + return 0; +} + + +/*-----------------------------------------------------------------*/ +/* findInduction :- returns 1 & the item if the induction is found */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (findInduction) +{ + induction *ip = item; + V_ARG (operand *, sym); + V_ARG (induction **, ipp); + + if (isOperandEqual (ip->sym, sym)) + { + *ipp = ip; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* findDefInRegion - finds the definition within the region */ +/*-----------------------------------------------------------------*/ +static iCode * +findDefInRegion (set * regBlocks, operand * defOp, eBBlock ** owner) +{ + eBBlock *lBlock; + + /* for all blocks in the region */ + for (lBlock = setFirstItem (regBlocks); lBlock; + lBlock = setNextItem (regBlocks)) + { + + /* if a definition for this exists */ + if (bitVectBitsInCommon (lBlock->defSet, OP_DEFS (defOp))) + { + iCode *ic; + + /* go thru the instruction chain to find it */ + for (ic = lBlock->sch; ic; ic = ic->next) + if (bitVectBitValue (OP_DEFS (defOp), ic->key)) + { + if (owner) + *owner = lBlock; + return ic; + } + } + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* addPostLoopBlock - add a ebblock before the successors of the */ +/* loop exits */ +/*-----------------------------------------------------------------*/ +static void +addPostLoopBlock (region *loopReg, ebbIndex *ebbi, iCode *ic) +{ + bitVect *loopSuccs; + int i; + + /* if the number of exits is greater than one then + we use another trick: we will create an intersection + of succesors of the exits, then take those that are not + part of the loop and have dfNumber greater loop entry (eblock), + insert a new predecessor postLoopBlk before them and add + a copy of ic in the new block. The postLoopBlk in between + is necessary, because the old successors of the loop exits can + be successors of other blocks too: see bug-136564. */ + + /* loopSuccs now contains intersection + of all the loops successors */ + loopSuccs = intersectLoopSucc (loopReg->exits, ebbi->dfOrder); + if (!loopSuccs) + return; + + for (i = 0; i < loopSuccs->size; i++) + { + eBBlock *eblock = NULL; + eBBlock *postLoopBlk; + iCode *newic; + int j; + + if (!bitVectBitValue (loopSuccs, i)) + continue; + + /* Need to search for bbnum == i since ebbi->dfOrder is + sorted by dfnum; a direct index won't do. */ + for (j = 0; j < ebbi->count; j++) + if (ebbi->dfOrder[j]->bbnum == i) + { + eblock = ebbi->dfOrder[j]; + break; + } + assert(eblock); + + /* if the successor does not belong to the loop + and will be executed after the loop : then + add a definition to the block */ + if (isinSet (loopReg->regBlocks, eblock)) + continue; + if (eblock->dfnum <= loopReg->entry->dfnum) + continue; + + /* look for an existing loopExitBlock */ + if (strncmp (LOOPEXITLBL, + eblock->entryLabel->name, + sizeof(LOOPEXITLBL) - 1) == 0) + { + /* reuse the existing one */ + postLoopBlk = eblock; + } + else + { + /* create and insert a new eBBlock. + Damn, that's messy ... */ + int i; + set *oldPredList; + eBBlock *ebpi; + + postLoopBlk = neweBBlock(); + + /* create a loopExit-label */ + postLoopBlk->entryLabel = newiTempLoopHeaderLabel (0); + + /* increase bbnum for all blocks after + (and including) eblock */ + for (i = 0; i < ebbi->count; i++) + { + if (ebbi->bbOrder[i]->bbnum >= eblock->bbnum) + ++ebbi->bbOrder[i]->bbnum; + } + /* insert postLoopBlk before bbnum */ + postLoopBlk->bbnum = eblock->bbnum - 1; + + ++ebbi->count; + + /* these arrays need one more block, which ... */ + ebbi->bbOrder = Safe_realloc (ebbi->bbOrder, + (ebbi->count + 1) * sizeof(eBBlock *)); + /* ... must be initialized with 0 */ + ebbi->bbOrder[ebbi->count] = NULL; + /* move the blocks up ... */ + memmove (&ebbi->bbOrder[postLoopBlk->bbnum + 1], + &ebbi->bbOrder[postLoopBlk->bbnum], + (ebbi->count - postLoopBlk->bbnum - 1) * sizeof(eBBlock *)); + /* ... and insert postLoopBlk */ + ebbi->bbOrder[postLoopBlk->bbnum] = postLoopBlk; + + /* just add postLoopBlk at the end of dfOrder, + computeControlFlow() will compute the new dfnum */ + ebbi->dfOrder = Safe_realloc (ebbi->dfOrder, + (ebbi->count + 1) * sizeof(eBBlock *)); + ebbi->dfOrder[ebbi->count] = NULL; + ebbi->dfOrder[ebbi->count - 1] = postLoopBlk; + + /* copy loop information from eblock to postLoopBlk */ + if (eblock->partOfLoop) + { + postLoopBlk->partOfLoop = eblock->partOfLoop; + /* add postLoopBlk to loop region */ + addSetHead (&postLoopBlk->partOfLoop->regBlocks, postLoopBlk); + } + + /* go through loop exits and replace the old exit block eblock + with the new postLoopBlk */ + for (ebpi = setFirstItem (loopReg->exits); + ebpi; + ebpi = setNextItem (loopReg->exits)) + { + /* replace old label with new label */ + replaceLabel (ebpi, eblock->entryLabel, postLoopBlk->entryLabel); + } + + /* now eblock is replaced by postLoopBlk. + It's possible, that eblock has an immediate predecessor + (with ebpi->bbnum + 1 == eblock->bbnum), which isn't part of the + loop. This predecessor must stay predecessor of eblock, not of + postLoopBlk. But now postLoopBlk is in between, therefore a GOTO + from this predecessor to eblock must be appended. + Example: bug-136564.c */ + + /* take all predecessors and subtract the loop exits */ + oldPredList = subtractFromSet (eblock->predList, + loopReg->exits, + THROW_NONE); + for (ebpi = setFirstItem (oldPredList); + ebpi; + ebpi = setNextItem (oldPredList)) + { + /* Is it an immediate predecessor (without GOTO)? + All other predecessors end with a + GOTO, IF, IFX or JUMPTABLE: nothing to to do */ + if (ebpi->bbnum + 1 == postLoopBlk->bbnum) + { + /* insert goto to old predecessor of eblock */ + newic = newiCodeLabelGoto (GOTO, eblock->entryLabel); + addiCodeToeBBlock (ebpi, newic, NULL); + break; /* got it, only one is possible */ + } + } + + /* set the label */ + postLoopBlk->sch = + postLoopBlk->ech = newiCodeLabelGoto (LABEL, postLoopBlk->entryLabel); + } + + /* create the definition in postLoopBlk */ + newic = newiCode ('=', NULL, operandFromOperand (IC_RIGHT (ic))); + IC_RESULT (newic) = operandFromOperand (IC_RESULT (ic)); + /* maintain data flow */ + OP_DEFS(IC_RESULT (newic)) = bitVectSetBit (OP_DEFS (IC_RESULT (newic)), + newic->key); + OP_USES(IC_RIGHT (newic)) = bitVectSetBit (OP_USES (IC_RIGHT (newic)), + newic->key); + + /* and add it */ + addiCodeToeBBlock (postLoopBlk, newic, NULL); + postLoopBlk->sch->filename = + postLoopBlk->ech->filename = eblock->sch->filename; + postLoopBlk->sch->lineno = + postLoopBlk->ech->lineno = eblock->sch->lineno; + + /* outDefs is needed by computeControlFlow(), anything + else will be set up by computeControlFlow() */ + postLoopBlk->outDefs = bitVectSetBit (postLoopBlk->outDefs, newic->key); + } /* for (i = 0; i < loopSuccs->size; i++) */ + + /* the postLoopBlk and the induction significantly + changed the control flow, recompute it */ + computeControlFlow (ebbi); +} + +/*-----------------------------------------------------------------*/ +/* basicInduction - finds the basic induction variables in a loop */ +/*-----------------------------------------------------------------*/ +static set * +basicInduction (region * loopReg, ebbIndex * ebbi) +{ + eBBlock *lBlock; + set *indVars = NULL; + + /* i.e. all assignments of the form a := a +/- const */ + /* for all blocks within the loop do */ + for (lBlock = setFirstItem (loopReg->regBlocks); lBlock; + lBlock = setNextItem (loopReg->regBlocks)) + { + + iCode *ic, *dic; + + /* for all instructions in the blocks do */ + for (ic = lBlock->sch; ic; ic = ic->next) + { + + operand *aSym; + long litValue; + induction *ip; + iCode *indIc; + eBBlock *owner = NULL; + int nexits; + sym_link *optype; + + /* To find an induction variable, we need to */ + /* find within the loop three iCodes in this */ + /* general form: */ + /* */ + /* ddic: iTempB := symbolVar */ + /* dic: iTempA := iTempB + lit */ + /* or iTempA := iTempB - lit */ + /* or iTempA := lit + iTempB */ + /* ic: symbolVar := iTempA */ + /* */ + /* (symbolVar may also be an iTemp if it is */ + /* register equivalent) */ + + /* look for assignments of the form */ + /* symbolVar := iTempNN */ + if (ic->op != '=') + continue; + + if (!IS_TRUE_SYMOP (IC_RESULT (ic)) && + !OP_SYMBOL (IC_RESULT (ic))->isreqv) + continue; + + if (isOperandGlobal (IC_RESULT (ic))) + continue; + + if (!IS_ITEMP (IC_RIGHT (ic))) + continue; + + /* if it has multiple assignments within the loop then skip */ + if (assignmentsToSym (loopReg->regBlocks, IC_RESULT (ic)) > 1) + continue; + + /* if the address of this was taken inside the loop then continue */ + if (addressTaken (loopReg->regBlocks, IC_RESULT (ic))) + continue; + + /* Only consider variables with integral type. */ + /* (2004/12/06 - EEP - ds390 fails regression tests unless */ + /* pointers are also considered for induction (due to some */ + /* register alloctaion bugs). Remove !IS_PTR clause when */ + /* that gets fixed) */ + optype = operandType (IC_RIGHT (ic)); + if (!IS_INTEGRAL (optype) && !IS_PTR (optype)) + continue; + + /* find the definition for the result in the block */ + if (!(dic = findDefInRegion (setFromSet (loopReg->regBlocks), + IC_RIGHT (ic), &owner))) + continue; + + /* if not +/- continue */ + if (dic->op != '+' && dic->op != '-') + continue; + + /* make sure definition is of the form a +/- c */ + if (!IS_OP_LITERAL (IC_LEFT (dic)) && !IS_OP_LITERAL (IC_RIGHT (dic))) + continue; + + /* make sure the definition found is the only one */ + if (assignmentsToSym (loopReg->regBlocks, IC_RIGHT (ic)) > 1) + continue; + + if (IS_OP_LITERAL (IC_RIGHT (dic))) + { + aSym = IC_LEFT (dic); + litValue = (long) operandLitValue (IC_RIGHT (dic)); + } + else + { + /* For minus, the literal must not be on the left side. */ + /* (Actually, this case could be handled, but it's probably */ + /* not worth the extra code) */ + if (dic->op == '-') + continue; + aSym = IC_RIGHT (dic); + litValue = (long) operandLitValue (IC_LEFT (dic)); + } + + if (!isOperandEqual (IC_RESULT (ic), aSym) && + !isOperandEqual (IC_RIGHT (ic), aSym)) + { + iCode *ddic; + /* find the definition for this and check */ + if (!(ddic = findDefInRegion (setFromSet (loopReg->regBlocks), + aSym, &owner))) + continue; + + if (ddic->op != '=') + continue; + + if (!isOperandEqual (IC_RESULT (ddic), aSym) || + !isOperandEqual (IC_RIGHT (ddic), IC_RESULT (ic))) + continue; + } + + /* if the right hand side has more than one usage then + don't make it an induction (will have to think some more) */ + if (bitVectnBitsOn (OP_USES (IC_RIGHT (ic))) > 1) + continue; + + /* if the definition is volatile then it cannot be + an induction object */ + if (isOperandVolatile (IC_RIGHT (ic), FALSE) || + isOperandVolatile (IC_RESULT (ic), FALSE)) + continue; + + /* whew !! that was a lot of work to find the definition */ + /* create an induction object */ + indIc = newiCode ('=', NULL, IC_RESULT (ic)); + indIc->filename = ic->filename; + indIc->lineno = ic->lineno; + IC_RESULT (indIc) = operandFromOperand (IC_RIGHT (ic)); + IC_RESULT (indIc)->isaddr = 0; + OP_SYMBOL (IC_RESULT (indIc))->isind = 1; + ip = newInduction (IC_RIGHT (ic), dic->op, litValue, indIc, NULL); + + /* replace the inducted variable by the iTemp */ + replaceSymBySym (loopReg->regBlocks, IC_RESULT (ic), IC_RIGHT (ic)); + /* ic should now be moved to the exit block(s) */ + + nexits = elementsInSet (loopReg->exits); + if (nexits == 0) + { + /* this is a endless loop without exits: there's + no need to restore the inducted variable */ + iCode *saveic = ic->prev; + + /* ic will be removed by killDeadCode() too, + but it's a nice to see a clean dumploop now. */ + remiCodeFromeBBlock (lBlock, ic); + /* clear the definition */ + bitVectUnSetBit (lBlock->defSet, ic->key); + ic = saveic; + } + else + addPostLoopBlock (loopReg, ebbi, ic); + addSet (&indVars, ip); + } /* for ic */ + } /* end of all blocks for basic induction variables */ + + return indVars; +} + +/*-----------------------------------------------------------------*/ +/* loopInduction - remove induction variables from a loop */ +/*-----------------------------------------------------------------*/ +static int +loopInduction (region * loopReg, ebbIndex * ebbi) +{ + int change = 0; + eBBlock *lBlock, *owner, *lastBlock = NULL; + set *indVars = NULL; + set *basicInd = NULL; + + if (loopReg->entry->preHeader == NULL) + return 0; + + /* we first determine the basic Induction variables */ + basicInd = setFromSet (indVars = basicInduction (loopReg, ebbi)); + + /* find other induction variables : by other we mean definitions of */ + /* the form x := y (* | / ) .. we will move this one to */ + /* beginning of the loop and reduce strength i.e. replace with +/- */ + /* these expensive expressions: OH! and y must be induction too */ + for (lBlock = setFirstItem (loopReg->regBlocks), lastBlock = lBlock; + lBlock && indVars; + lBlock = setNextItem (loopReg->regBlocks)) + { + + iCode *ic, *indIc, *dic; + induction *ip; + + /* last block is the one with the highest block + number */ + if (lastBlock->bbnum < lBlock->bbnum) + lastBlock = lBlock; + + for (ic = lBlock->sch; ic; ic = ic->next) + { + operand *aSym; + long litVal; + + /* consider only * & / */ + if (ic->op != '*' && ic->op != '/') + continue; + + /* only consider variables with integral type */ + if (!IS_INTEGRAL (operandType (IC_RESULT (ic)))) + continue; + + /* if the result has more definitions then */ + if (assignmentsToSym (loopReg->regBlocks, IC_RESULT (ic)) > 1) + continue; + + /* check if the operands are what we want */ + /* i.e. one of them an symbol the other a literal */ + if (!((IS_SYMOP (IC_LEFT (ic)) && IS_OP_LITERAL (IC_RIGHT (ic))) || + (IS_OP_LITERAL (IC_LEFT (ic)) && IS_SYMOP (IC_RIGHT (ic))))) + continue; + + if (IS_SYMOP (IC_LEFT (ic))) + { + aSym = IC_LEFT (ic); + litVal = (long) operandLitValue (IC_RIGHT (ic)); + } + else + { + /* For division, the literal must not be on the left side */ + if (ic->op == '/') + continue; + aSym = IC_RIGHT (ic); + litVal = (long) operandLitValue (IC_LEFT (ic)); + } + + ip = NULL; + /* check if this is an induction variable */ + if (!applyToSetFTrue (basicInd, findInduction, aSym, &ip)) + continue; + + /* ask port for size not worth if native instruction + exist for multiply & divide */ + if (getSize (operandType (IC_LEFT (ic))) <= (unsigned long) port->support.muldiv || + getSize (operandType (IC_RIGHT (ic))) <= (unsigned long) port->support.muldiv) + continue; + + /* if this is a division then the remainder should be zero + for it to be inducted */ + if (ic->op == '/' && (ip->cval % litVal)) + continue; + + /* create the iCode to be placed in the loop header */ + /* and create the induction object */ + + /* create an instruction */ + /* this will be put on the loop header */ + indIc = newiCode (ic->op, + operandFromOperand (aSym), + operandFromLit (litVal)); + indIc->filename = ic->filename; + indIc->lineno = ic->lineno; + IC_RESULT (indIc) = operandFromOperand (IC_RESULT (ic)); + OP_SYMBOL (IC_RESULT (indIc))->isind = 1; + + /* keep track of the inductions */ + litVal = (ic->op == '*' ? (litVal * ip->cval) : + (ip->cval / litVal)); + + addSet (&indVars, + newInduction (IC_RESULT (ic), ip->op, litVal, indIc, NULL)); + + /* Replace mul/div with assignment to self; killDeadCode() will */ + /* clean this up since we can't use remiCodeFromeBBlock() here. */ + ic->op = '='; + IC_LEFT (ic) = NULL; + IC_RIGHT (ic) = IC_RESULT (ic); + + /* Insert an update of the induction variable just before */ + /* the update of the basic induction variable. */ + indIc = newiCode (ip->op, + operandFromOperand (IC_RESULT (ic)), + operandFromLit (litVal)); + IC_RESULT (indIc) = operandFromOperand (IC_RESULT (ic)); + owner = NULL; + dic = findDefInRegion (setFromSet (loopReg->regBlocks), aSym, &owner); + assert (dic); + addiCodeToeBBlock (owner, indIc, dic); + + } + } + + /* if we have some induction variables then */ + if (indVars) + { + eBBlock *preHdr = loopReg->entry->preHeader; + iCode *icFirst = NULL, *icLast = NULL; + induction *ip; + bitVect *indVect = NULL; + + /* create an iCode chain from it */ + for (ip = setFirstItem (indVars); + ip; + ip = setNextItem (indVars)) + { + indVect = bitVectSetBit (indVect, ip->ic->key); + ip->ic->filename = preHdr->ech->filename; + ip->ic->lineno = preHdr->ech->lineno; + if (!icFirst) + icFirst = ip->ic; + if (icLast) + { + icLast->next = ip->ic; + ip->ic->prev = icLast; + icLast = ip->ic; + } + else + icLast = ip->ic; + change++; + } + + /* add the instruction chain to the end of the */ + /* preheader for this loop */ + preHdr->ech->next = icFirst; + icFirst->prev = preHdr->ech; + preHdr->ech = icLast; + icLast->next = NULL; + + /* add the induction variable vector to the last + block in the loop */ + lastBlock->isLastInLoop = 1; + lastBlock->linds = bitVectUnion(lastBlock->linds,indVect); + } + + setToNull ((void *) &indVars); + return change; +} + +/*-----------------------------------------------------------------*/ +/* mergeRegions - will merge region with same entry point */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (mergeRegions) +{ + region *theLoop = item; + V_ARG (set *, allRegion); + region *lp; + + /* if this has already been merged then do nothing */ + if (theLoop->merged) + return 0; + + /* go thru all the region and check if any of them have the */ + /* entryPoint as the Loop */ + for (lp = setFirstItem (allRegion); lp; lp = setNextItem (allRegion)) + { + + if (lp == theLoop) + continue; + + if (lp->entry == theLoop->entry) + { + theLoop->regBlocks = unionSets (theLoop->regBlocks, + lp->regBlocks, THROW_DEST); + lp->merged = 1; + } + } + + return 1; +} + +/*-----------------------------------------------------------------*/ +/* ifMerged - return 1 if the merge flag is 1 */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (ifMerged) +{ + region *lp = item; + + return lp->merged; +} + +/*-----------------------------------------------------------------*/ +/* mergeInnerLoops - will merge into body when entry is present */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (mergeInnerLoops) +{ + region *theLoop = item; + V_ARG (set *, allRegion); + V_ARG (int *, maxDepth); + region *lp; + + /* check if the entry point is present in the body of any */ + /* loop then put the body of this loop into the outer loop */ + for (lp = setFirstItem (allRegion); lp; lp = setNextItem (allRegion)) + { + + if (lp == theLoop) + continue; + + if (isinSet (lp->regBlocks, theLoop->entry)) + { + lp->containsLoops += theLoop->containsLoops + 1; + if (lp->containsLoops > (*maxDepth)) + *maxDepth = lp->containsLoops; + + lp->regBlocks = unionSets (lp->regBlocks, + theLoop->regBlocks, THROW_DEST); + } + } + + return 1; +} + + +/*-----------------------------------------------------------------*/ +/* createLoopRegions - will detect and create a set of natural loops */ +/*-----------------------------------------------------------------*/ +hTab * +createLoopRegions (ebbIndex * ebbi) +{ + set *allRegion = NULL; /* set of all loops */ + hTab *orderedLoops = NULL; + set *bEdges = NULL; + int maxDepth = 0; + region *lp; + + /* get all the back edges in the graph */ + if (!applyToSet (graphEdges, backEdges, &bEdges)) + return 0; /* found no loops */ + + /* for each of these back edges get the blocks that */ + /* constitute the loops */ + applyToSet (bEdges, createLoop, &allRegion); + + /* now we will create regions from these loops */ + /* loops with the same entry points are considered to be the */ + /* same loop & they are merged. If the entry point of a loop */ + /* is found in the body of another loop then , all the blocks */ + /* in that loop are added to the loops containing the header */ + applyToSet (allRegion, mergeRegions, allRegion); + + /* delete those already merged */ + deleteItemIf (&allRegion, ifMerged); + + applyToSet (allRegion, mergeInnerLoops, allRegion, &maxDepth); + maxDepth++; + + /* now create all the exits .. also */ + /* create an ordered set of loops */ + /* i.e. we process loops in the inner to outer order */ + for (lp = setFirstItem (allRegion); lp; lp = setNextItem (allRegion)) + { + applyToSet (lp->regBlocks, addToExitsMarkDepth, + lp->regBlocks, &lp->exits, + (maxDepth - lp->containsLoops), lp); + + hTabAddItem (&orderedLoops, lp->containsLoops, lp); + + } + return orderedLoops; +} + +/*-----------------------------------------------------------------*/ +/* loopOptimizations - identify region & remove invariants & ind */ +/*-----------------------------------------------------------------*/ +int +loopOptimizations (hTab * orderedLoops, ebbIndex * ebbi) +{ + region *lp; + int change = 0; + int k; + + /* if no loop optimizations requested */ + if (!optimize.loopInvariant && + !optimize.loopInduction) + return 0; + + /* now we process the loops inner to outer order */ + /* this is essential to maintain data flow information */ + /* the other choice is an ugly iteration for the depth */ + /* of the loops would hate that */ + for (lp = hTabFirstItem (orderedLoops, &k); lp; + lp = hTabNextItem (orderedLoops, &k)) + { + + if (optimize.loopInvariant) + change += loopInvariants (lp, ebbi); + + if (optimize.loopInduction) + change += loopInduction (lp, ebbi); + } + + return change; +} diff --git a/src/SDCCloop.h b/src/SDCCloop.h new file mode 100644 index 0000000..34566f2 --- /dev/null +++ b/src/SDCCloop.h @@ -0,0 +1,57 @@ +/*------------------------------------------------------------------------- + + SDCCloop.h - header file for loop detection & optimizations + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "SDCCBBlock.h" +#include "SDCCcse.h" + +#ifndef SDCCLOOP_H +#define SDCCLOOP_H 1 + +typedef struct region + { + + unsigned int merged:1; + unsigned int visited:1; + eBBlock *entry; /* entry Block */ + int containsLoops; /* contains other loops */ + set *regBlocks; /* set of all blocks */ + set *exits; /* set of exits */ + } +region; + +typedef struct induction + { + + operand *sym; + operand *asym; + unsigned int op; + long cval; + iCode *ic; + } +induction; + +int loopOptimizations (hTab *, ebbIndex *); +hTab *createLoopRegions (ebbIndex *); + +#endif diff --git a/src/SDCClrange.c b/src/SDCClrange.c new file mode 100644 index 0000000..c4a5bcc --- /dev/null +++ b/src/SDCClrange.c @@ -0,0 +1,936 @@ +/*------------------------------------------------------------------------- + + SDCClrange.c - source file for live range computations + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" +#include "limits.h" + +int iCodeSeq = 0; +hTab *liveRanges = NULL; +hTab *iCodehTab = NULL; +hTab *iCodeSeqhTab = NULL; + +/* all symbols, for which the previous definition is searched + and warning is emitted if there's none. */ +#define IS_AUTOSYM(op) (IS_ITEMP(op) || \ + (IS_SYMOP(op) && IS_AUTO(op->operand.symOperand) && !IS_PARM(op))) + +/*-----------------------------------------------------------------*/ +/* hashiCodeKeys - add all iCodes to the hash table */ +/*-----------------------------------------------------------------*/ +void +hashiCodeKeys (eBBlock ** ebbs, int count) +{ + int i; + + for (i = 0; i < count; i++) + { + iCode *ic; + for (ic = ebbs[i]->sch; ic; ic = ic->next) + hTabAddItem (&iCodehTab, ic->key, ic); + } +} + +/*-----------------------------------------------------------------*/ +/* sequenceiCode - creates a sequence number for the iCode & add */ +/*-----------------------------------------------------------------*/ +static void +sequenceiCode (eBBlock ** ebbs, int count) +{ + int i; + + for (i = 0; i < count; i++) + { + + iCode *ic; + ebbs[i]->fSeq = iCodeSeq + 1; + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + ic->seq = ++iCodeSeq; + ic->depth = ebbs[i]->depth; + //hTabAddItem (&iCodehTab, ic->key, ic); + hTabAddItem (&iCodeSeqhTab, ic->seq, ic); + } + ebbs[i]->lSeq = iCodeSeq; + } +} + +/*-----------------------------------------------------------------*/ +/* setFromRange - sets the from range of a given operand */ +/*-----------------------------------------------------------------*/ +#if 0 +static void +setFromRange (operand * op, int from) +{ + /* only for compiler defined temporaries */ + if (!IS_ITEMP (op)) + return; + + hTabAddItemIfNotP (&liveRanges, op->key, OP_SYMBOL (op)); + + if (op->isaddr) + OP_SYMBOL (op)->isptr = 1; + + if (!OP_LIVEFROM (op) || + OP_LIVEFROM (op) > from) + OP_LIVEFROM (op) = from; +} +#endif + +/*-----------------------------------------------------------------*/ +/* setToRange - set the range to for an operand */ +/*-----------------------------------------------------------------*/ +void +setToRange (operand * op, int to, bool check) +{ + /* only for compiler defined temps */ + if (!IS_ITEMP (op)) + return; + + OP_SYMBOL (op)->key = op->key; + hTabAddItemIfNotP (&liveRanges, op->key, OP_SYMBOL (op)); + + if (op->isaddr) + OP_SYMBOL (op)->isptr = 1; + + if (check) + if (!OP_LIVETO (op)) + OP_LIVETO (op) = to; + else; + else + OP_LIVETO (op) = to; +} + +/*-----------------------------------------------------------------*/ +/* setFromRange - sets the from range of a given operand */ +/*-----------------------------------------------------------------*/ +static void +setLiveFrom (symbol * sym, int from) +{ + if (!sym->liveFrom || sym->liveFrom > from) + sym->liveFrom = from; +} + +/*-----------------------------------------------------------------*/ +/* setToRange - set the range to for an operand */ +/*-----------------------------------------------------------------*/ +static void +setLiveTo (symbol * sym, int to) +{ + if (!sym->liveTo || sym->liveTo < to) + sym->liveTo = to; +} + +/*-----------------------------------------------------------------*/ +/* markLiveRanges - for each operand mark the liveFrom & liveTo */ +/*-----------------------------------------------------------------*/ +static void +markLiveRanges (eBBlock ** ebbs, int count) +{ + int i, key; + symbol *sym; + + for (i = 0; i < count; i++) + { + iCode *ic; + + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + if (ic->op == CALL || ic->op == PCALL) + if (bitVectIsZero (OP_SYMBOL (IC_RESULT (ic))->uses)) + bitVectUnSetBit (ebbs[i]->defSet, ic->key); + + /* for all iTemps alive at this iCode */ + for (key = 1; key < ic->rlive->size; key++) + { + if (!bitVectBitValue(ic->rlive, key)) + continue; + + sym = hTabItemWithKey(liveRanges, key); + setLiveTo(sym, ic->seq); + setLiveFrom(sym, ic->seq); + } + + } + } +} + +/*-----------------------------------------------------------------*/ +/* markAlive - marks the operand as alive between sic and eic */ +/*-----------------------------------------------------------------*/ +static void +markAlive (iCode * sic, iCode * eic, int key) +{ + iCode *dic; + + for (dic = sic; dic != eic->next; dic = dic->next) + { + dic->rlive = bitVectSetBit (dic->rlive, key); + } +} + +/*-----------------------------------------------------------------*/ +/* findNextUseSym - finds the next use of the symbol and marks it */ +/* alive in between */ +/*-----------------------------------------------------------------*/ +static int +findNextUseSym (eBBlock *ebp, iCode *ic, symbol * sym) +{ + int retval = 0; + iCode *uic; + eBBlock *succ; + + hTabAddItemIfNotP (&liveRanges, sym->key, sym); + + if (!ic) + goto check_successors; + + /* if we check a complete block and the symbol */ + /* is alive at the beginning of the block */ + /* and not defined in the first instructions */ + /* then a next use exists (return 1) */ + if ((ic == ebp->sch) && bitVectBitValue(ic->rlive, sym->key)) + { + /* check if the first instruction is a def of this op */ + if (ic->op == JUMPTABLE || ic->op == IFX || SKIP_IC2(ic)) + return 1; + + if (IS_ITEMP(IC_RESULT(ic))) + if (IC_RESULT(ic)->key == sym->key) + return 0; + + return 1; + } + + if (ebp->visited) + return 0; + + if (ic == ebp->sch) + ebp->visited = 1; + + /* for all remaining instructions in current block */ + for (uic = ic; uic; uic = uic->next) + { + + if (SKIP_IC2(uic)) + continue; + + if (uic->op == JUMPTABLE) + { + if (IS_ITEMP(IC_JTCOND(uic)) && IC_JTCOND(uic)->key == sym->key) + { + markAlive(ic, uic, sym->key); + return 1; + } + continue; + } + + if (uic->op == IFX) + { + if (IS_ITEMP(IC_COND(uic)) && IC_COND(uic)->key == sym->key) + { + markAlive(ic, uic, sym->key); + return 1; + } + continue; + } + + if (IS_ITEMP (IC_LEFT (uic))) + if (IC_LEFT (uic)->key == sym->key) + { + markAlive(ic, uic, sym->key); + return 1; + } + + if (IS_ITEMP (IC_RIGHT (uic))) + if (IC_RIGHT (uic)->key == sym->key) + { + markAlive (ic, uic, sym->key); + return 1; + } + + if (IS_ITEMP (IC_RESULT (uic))) + if (IC_RESULT (uic)->key == sym->key) + { + if (POINTER_SET (uic)) + { + markAlive (ic, uic, sym->key); + return 1; + } + else + return 0; + } + + } + + /* check all successors */ +check_successors: + + succ = setFirstItem (ebp->succList); + for (; succ; succ = setNextItem (ebp->succList)) + { + retval += findNextUseSym (succ, succ->sch, sym); + } + + if (retval) + { + if (ic) markAlive (ic, ebp->ech, sym->key); + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* findNextUse - finds the next use of the operand and marks it */ +/* alive in between */ +/*-----------------------------------------------------------------*/ +static int +findNextUse (eBBlock *ebp, iCode *ic, operand *op) +{ + if (op->isaddr) + OP_SYMBOL (op)->isptr = 1; + + OP_SYMBOL (op)->key = op->key; + + return findNextUseSym (ebp, ic, OP_SYMBOL(op)); +} + +/*-----------------------------------------------------------------*/ +/* unvisitBlocks - clears visited in all blocks */ +/*-----------------------------------------------------------------*/ +static void +unvisitBlocks (eBBlock ** ebbs, int count) +{ + int i; + + for (i = 0; i < count; i++) + ebbs[i]->visited = 0; +} + +/*------------------------------------------------------------------*/ +/* markWholeLoop - mark the symbol 'key' alive in all blocks */ +/* included by the outermost loop */ +/*------------------------------------------------------------------*/ +static void +markWholeLoop (eBBlock *ebp, int key) +{ + eBBlock *ebpi; + + /* avoid endless loops */ + ebp->visited = 1; + + /* recurse through all predecessors */ + for (ebpi = setFirstItem (ebp->predList); + ebpi; + ebpi = setNextItem (ebp->predList)) + { + if (ebpi->visited) + continue; + /* is the predecessor still in the loop? */ + if (ebpi->depth == 0) + continue; + markWholeLoop (ebpi, key); + } + + /* recurse through all successors */ + for (ebpi = setFirstItem (ebp->succList); + ebpi; + ebpi = setNextItem (ebp->succList)) + { + if (ebpi->visited) + continue; + if (ebpi->depth == 0) + continue; + markWholeLoop (ebpi, key); + } + + markAlive (ebp->sch, ebp->ech, key); +} + +/*------------------------------------------------------------------*/ +/* findPrevUseSym - search for a previous definition of a symbol in */ +/* - the previous icodes */ +/* - all branches of predecessors */ +/*------------------------------------------------------------------*/ +static bool +findPrevUseSym (eBBlock *ebp, iCode *ic, symbol * sym) +{ + eBBlock * pred; + iCode * uic; + + if (ebp->visited) + { + /* already visited: this branch must have been succesfull, */ + /* because otherwise the search would have been aborted. */ + return TRUE; + } + ebp->visited = 1; + + /* search backward in the current block */ + for (uic = ic; uic; uic = uic->prev) + { + if (!POINTER_SET (uic) && IS_AUTOSYM (IC_RESULT (uic))) + { + if (IC_RESULT (uic)->key == sym->key) + { + /* Ok, found a definition */ + return TRUE; + } + } + /* address taken from symbol? */ + if (uic->op == ADDRESS_OF && IS_AUTOSYM (IC_LEFT (uic))) + { + if (IC_LEFT (uic)->key == sym->key) + { + /* Ok, found a definition */ + return TRUE; + } + } + } + + /* There's no definition in this bblock, */ + /* let's have a look at all predecessors. */ + pred = setFirstItem (ebp->predList); + if (!pred) + { + /* no more predecessors and nothing found yet :-( */ + return FALSE; + } + for (; pred; pred = setNextItem (ebp->predList)) + { + /* recurse into all predecessors */ + if (!findPrevUseSym (pred, pred->ech, sym)) + { + /* found nothing: abort */ + return FALSE; + } + } + + /* Success! Went through all branches with no abort: */ + /* all branches end with a definition */ + return TRUE; +} + +/*------------------------------------------------------------------*/ +/* findPrevUse - search for a previous definition of an operand */ +/* If there's no definition let's: */ +/* - emit a warning */ +/* - fix the life range, if the symbol is used in */ +/* a loop */ +/*------------------------------------------------------------------*/ +static void +findPrevUse (eBBlock *ebp, iCode *ic, operand *op, + eBBlock ** ebbs, int count, + bool emitWarnings) +{ + unvisitBlocks (ebbs, count); + + if (op->isaddr) + OP_SYMBOL (op)->isptr = 1; + OP_SYMBOL (op)->key = op->key; + + /* There must be a definition in each branch of predecessors */ + if (!findPrevUseSym (ebp, ic->prev, OP_SYMBOL(op))) + { + /* computeLiveRanges() is called twice */ + if (emitWarnings) + { + if (IS_ITEMP (op)) + { + if (OP_SYMBOL (op)->prereqv) + { + werrorfl (ic->filename, ic->lineno, W_LOCAL_NOINIT, + OP_SYMBOL (op)->prereqv->name); + OP_SYMBOL (op)->prereqv->reqv = NULL; + OP_SYMBOL (op)->prereqv->allocreq = 1; + } + } + else + { + werrorfl (ic->filename, ic->lineno, W_LOCAL_NOINIT, + OP_SYMBOL (op)->name); + } + } + /* is this block part of a loop? */ + if (IS_ITEMP (op) && ebp->depth != 0) + { + /* extend the life range to the outermost loop */ + unvisitBlocks(ebbs, count); + markWholeLoop (ebp, op->key); + } + } +} + +/*-----------------------------------------------------------------*/ +/* incUsed - increment a symbol's usage count */ +/*-----------------------------------------------------------------*/ +static void +incUsed (iCode *ic, operand *op) +{ + if (ic->depth) + OP_SYMBOL (op)->used += (((unsigned int) 1 << ic->depth) + 1); + else + OP_SYMBOL (op)->used += 1; +} + +/*-----------------------------------------------------------------*/ +/* rliveClear - clears the rlive bitVectors */ +/*-----------------------------------------------------------------*/ +static void +rliveClear (eBBlock ** ebbs, int count) +{ + int i; + + /* for all blocks do */ + for (i = 0; i < count; i++) + { + iCode *ic; + + /* for all instructions in this block do */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + freeBitVect (ic->rlive); + ic->rlive = NULL; + } + } +} + +/*-----------------------------------------------------------------*/ +/* rlivePoint - for each point compute the ranges that are alive */ +/* The live range is only stored for ITEMPs; the same code is used */ +/* to find use of unitialized AUTOSYMs (an ITEMP is an AUTOSYM). */ +/*-----------------------------------------------------------------*/ +static void +rlivePoint (eBBlock ** ebbs, int count, bool emitWarnings) +{ + int i, key; + eBBlock *succ; + bitVect *alive; + + /* for all blocks do */ + for (i = 0; i < count; i++) + { + iCode *ic; + + /* for all instructions in this block do */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + + if (!ic->rlive) + ic->rlive = newBitVect (operandKey); + + if (SKIP_IC2(ic)) + continue; + + if (ic->op == JUMPTABLE && IS_SYMOP(IC_JTCOND(ic))) + { + incUsed (ic, IC_JTCOND(ic)); + + if (!IS_AUTOSYM(IC_JTCOND(ic))) + continue; + + findPrevUse (ebbs[i], ic, IC_JTCOND(ic), ebbs, count, emitWarnings); + if (IS_ITEMP(IC_JTCOND(ic))) + { + unvisitBlocks(ebbs, count); + ic->rlive = bitVectSetBit (ic->rlive, IC_JTCOND(ic)->key); + findNextUse (ebbs[i], ic->next, IC_JTCOND(ic)); + } + + continue; + } + + if (ic->op == IFX && IS_SYMOP(IC_COND(ic))) + { + incUsed (ic, IC_COND(ic)); + + if (!IS_AUTOSYM(IC_COND(ic))) + continue; + + findPrevUse (ebbs[i], ic, IC_COND(ic), ebbs, count, emitWarnings); + if (IS_ITEMP(IC_COND(ic))) + { + unvisitBlocks (ebbs, count); + ic->rlive = bitVectSetBit (ic->rlive, IC_COND(ic)->key); + findNextUse (ebbs[i], ic->next, IC_COND(ic)); + } + + continue; + } + + if (IS_SYMOP(IC_LEFT(ic))) + { + incUsed (ic, IC_LEFT(ic)); + if (IS_AUTOSYM(IC_LEFT(ic)) && + ic->op != ADDRESS_OF) + { + findPrevUse (ebbs[i], ic, IC_LEFT(ic), ebbs, count, emitWarnings); + if (IS_ITEMP(IC_LEFT(ic))) + { + unvisitBlocks(ebbs, count); + ic->rlive = bitVectSetBit (ic->rlive, IC_LEFT(ic)->key); + findNextUse (ebbs[i], ic->next, IC_LEFT(ic)); + + /* if this is a send extend the LR to the call */ + if (ic->op == SEND) + { + iCode *lic; + for (lic = ic; lic; lic = lic->next) + { + if (lic->op == CALL || lic->op == PCALL) + { + markAlive (ic, lic->prev, IC_LEFT (ic)->key); + break; + } + } + } + } + } + } + + if (IS_SYMOP(IC_RIGHT(ic))) + { + incUsed (ic, IC_RIGHT(ic)); + if (IS_AUTOSYM(IC_RIGHT(ic))) + { + findPrevUse (ebbs[i], ic, IC_RIGHT(ic), ebbs, count, emitWarnings); + if (IS_ITEMP(IC_RIGHT(ic))) + { + unvisitBlocks(ebbs, count); + ic->rlive = bitVectSetBit (ic->rlive, IC_RIGHT(ic)->key); + findNextUse (ebbs[i], ic->next, IC_RIGHT(ic)); + } + } + } + + if (POINTER_SET(ic) && IS_SYMOP(IC_RESULT(ic))) + incUsed (ic, IC_RESULT(ic)); + + if (IS_AUTOSYM(IC_RESULT(ic))) + { + if (POINTER_SET(ic)) + { + findPrevUse (ebbs[i], ic, IC_RESULT(ic), ebbs, count, emitWarnings); + } + if (IS_ITEMP(IC_RESULT(ic))) + { + unvisitBlocks(ebbs, count); + ic->rlive = bitVectSetBit (ic->rlive, IC_RESULT(ic)->key); + findNextUse (ebbs[i], ic->next, IC_RESULT(ic)); + } + } + + if (!POINTER_SET(ic) && IC_RESULT(ic)) + ic->defKey = IC_RESULT(ic)->key; + + } + + /* check all symbols that are alive in the last instruction */ + /* but are not alive in all successors */ + + succ = setFirstItem (ebbs[i]->succList); + if (!succ) + continue; + + alive = succ->sch->rlive; + while ((succ = setNextItem (ebbs[i]->succList))) + { + if (succ->sch) + alive = bitVectIntersect (alive, succ->sch->rlive); + } + + if (ebbs[i]->ech) + alive = bitVectCplAnd ( bitVectCopy (ebbs[i]->ech->rlive), alive); + + if(!alive) + continue; + for (key = 1; key < alive->size; key++) + { + if (!bitVectBitValue (alive, key)) + continue; + + unvisitBlocks(ebbs, count); + findNextUseSym (ebbs[i], NULL, hTabItemWithKey (liveRanges, key)); + } + + } +} + +/*-----------------------------------------------------------------*/ +/* computeClash - find out which live ranges collide with others */ +/*-----------------------------------------------------------------*/ +static void +computeClash (eBBlock ** ebbs, int count) +{ + int i; + + /* for all blocks do */ + for (i = 0; i < count; i++) + { + iCode *ic; + + /* for every iCode do */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + symbol *sym1, *sym2; + int key1, key2; + + /* for all iTemps alive at this iCode */ + for (key1 = 1; key1 < ic->rlive->size; key1++) + { + if (!bitVectBitValue(ic->rlive, key1)) + continue; + + sym1 = hTabItemWithKey(liveRanges, key1); + + if (!sym1->isitmp) + continue; + + /* for all other iTemps alive at this iCode */ + for (key2 = key1+1; key2 < ic->rlive->size; key2++) + { + if (!bitVectBitValue(ic->rlive, key2)) + continue; + + sym2 = hTabItemWithKey(liveRanges, key2); + + if (!sym2->isitmp) + continue; + + /* if the result and left or right is an iTemp */ + /* than possibly the iTemps do not clash */ + if ((ic->op != JUMPTABLE) && (ic->op != IFX) && + IS_ITEMP(IC_RESULT(ic)) && + (IS_ITEMP(IC_LEFT(ic)) || IS_ITEMP(IC_RIGHT(ic)))) + { + if (OP_SYMBOL(IC_RESULT(ic))->key == key1 + && sym1->liveFrom == ic->seq + && sym2->liveTo == ic->seq) + { + if (IS_SYMOP(IC_LEFT(ic))) + if (OP_SYMBOL(IC_LEFT(ic))->key == key2) + continue; + if (IS_SYMOP(IC_RIGHT(ic))) + if (OP_SYMBOL(IC_RIGHT(ic))->key == key2) + continue; + } + + if (OP_SYMBOL(IC_RESULT(ic))->key == key2 + && sym2->liveFrom == ic->seq + && sym1->liveTo == ic->seq) + { + if (IS_SYMOP(IC_LEFT(ic))) + if (OP_SYMBOL(IC_LEFT(ic))->key == key1) + continue; + if (IS_SYMOP(IC_RIGHT(ic))) + if (OP_SYMBOL(IC_RIGHT(ic))->key == key1) + continue; + } + } + + /* the iTemps do clash. set the bits in clashes */ + sym1->clashes = bitVectSetBit (sym1->clashes, key2); + sym2->clashes = bitVectSetBit (sym2->clashes, key1); + + /* check if they share the same spill location */ + /* what is this good for? */ + if (SYM_SPIL_LOC(sym1) && SYM_SPIL_LOC(sym2) && + SYM_SPIL_LOC(sym1) == SYM_SPIL_LOC(sym2)) + { + if (sym1->reqv && !sym2->reqv) SYM_SPIL_LOC(sym2)=NULL; + else if (sym2->reqv && !sym1->reqv) SYM_SPIL_LOC(sym1)=NULL; + else if (sym1->used > sym2->used) SYM_SPIL_LOC(sym2)=NULL; + else SYM_SPIL_LOC(sym1)=NULL; + } + } + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* allDefsOutOfRange - all definitions are out of a range */ +/*-----------------------------------------------------------------*/ +bool +allDefsOutOfRange (bitVect * defs, int fseq, int toseq) +{ + int i; + + if (!defs) + return TRUE; + + for (i = 0; i < defs->size; i++) + { + iCode *ic; + + if (bitVectBitValue (defs, i) && + (ic = hTabItemWithKey (iCodehTab, i)) && + (ic->seq >= fseq && ic->seq <= toseq)) + return FALSE; + + } + + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* notUsedInBlock - not used in this block */ +/*-----------------------------------------------------------------*/ +int +notUsedInBlock (symbol * sym, eBBlock * ebp, iCode *ic) +{ + return (!bitVectBitsInCommon (sym->defs, ebp->usesDefs) && + allDefsOutOfRange (sym->defs, ebp->fSeq, ebp->lSeq) && + allDefsOutOfRange (sym->uses, ebp->fSeq, ebp->lSeq)); +} + +/*-----------------------------------------------------------------*/ +/* adjustIChain - correct the sch and ech pointers */ +/*-----------------------------------------------------------------*/ +static void +adjustIChain (eBBlock ** ebbs, int count) +{ + int i; + + for (i = 0; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath) + continue; + + ic = ebbs[i]->sch; + + /* is there any code for this eBBlock? (e.g. ROM assignment) */ + if(!ic)continue; + + while (ic->prev) + ic = ic->prev; + ebbs[i]->sch = ic; + + ic = ebbs[i]->ech; + while (ic->next) + ic = ic->next; + ebbs[i]->ech = ic; + } +} + +/*-----------------------------------------------------------------*/ +/* computeLiveRanges - computes the live ranges for variables */ +/*-----------------------------------------------------------------*/ +void +computeLiveRanges (eBBlock ** ebbs, int count, bool emitWarnings) +{ + /* first look through all blocks and adjust the + sch and ech pointers */ + adjustIChain (ebbs, count); + + /* sequence the code the live ranges are computed + in terms of this sequence additionally the + routine will also create a hashtable of instructions */ + iCodeSeq = 0; + setToNull ((void *) &iCodehTab); + iCodehTab = newHashTable (iCodeKey); + hashiCodeKeys (ebbs, count); + setToNull ((void *) &iCodeSeqhTab); + iCodeSeqhTab = newHashTable (iCodeKey); + sequenceiCode (ebbs, count); + + /* mark the ranges live for each point */ + setToNull ((void *) &liveRanges); + rlivePoint (ebbs, count, emitWarnings); + + /* mark the from & to live ranges for variables used */ + markLiveRanges (ebbs, count); + + /* compute which overlaps with what */ + computeClash(ebbs, count); +} + +/*-----------------------------------------------------------------*/ +/* recomputeLiveRanges - recomputes the live ranges for variables */ +/*-----------------------------------------------------------------*/ +void +recomputeLiveRanges (eBBlock ** ebbs, int count) +{ + symbol * sym; + int key; + + /* clear all rlive bitVectors */ + rliveClear (ebbs, count); + + sym = hTabFirstItem (liveRanges, &key); + if (sym) + { + do { + sym->used = 0; + sym->liveFrom = 0; + sym->liveTo = 0; + freeBitVect (sym->clashes); + sym->clashes = NULL; + } while ( (sym = hTabNextItem (liveRanges, &key))); + } + + /* do the LR computation again */ + computeLiveRanges (ebbs, count, FALSE); +} + +/*-----------------------------------------------------------------*/ +/* dump icode->rlive in all blocks */ +/*-----------------------------------------------------------------*/ +#if 0 +void +dumpIcRlive (eBBlock ** ebbs, int count) +{ + int i, j; + iCode *ic; + + /* for all blocks do */ + for (i = 0; i < count; i++) + { + printf ("bb %d %s alive symbols:\n", i, ebbs[i]->entryLabel->name); + /* for all instructions in this block do */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + printf ("\tic->key %d\n", ic->key); + + if (!ic->rlive) + continue; + /* for all live Ranges alive at this point */ + for (j = 1; j < ic->rlive->size; j++) + { + symbol *sym; + + if (!bitVectBitValue (ic->rlive, j)) + continue; + + /* find the live range we are interested in */ + if ((sym = hTabItemWithKey (liveRanges, j))) + printf ("\t\tsym->key %2d: %s\n", sym->key, sym->rname[0] ? sym->rname : sym->name); + } + } + } +} +#endif diff --git a/src/SDCClrange.h b/src/SDCClrange.h new file mode 100644 index 0000000..4ef0cc0 --- /dev/null +++ b/src/SDCClrange.h @@ -0,0 +1,41 @@ +/*------------------------------------------------------------------------- + + SDCClrange.h - header file for live range computations + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCLRANGE_H +#define SDCCLRANGE_H 1 + +extern hTab *liveRanges; +extern hTab *iCodehTab; +extern hTab *iCodeSeqhTab; + +int notUsedInBlock (symbol *, eBBlock *, iCode *); +bool allDefsOutOfRange (bitVect *, int, int); +void computeLiveRanges (eBBlock **, int, bool); +void recomputeLiveRanges (eBBlock **, int); + +void setToRange (operand *, int, bool); +void hashiCodeKeys (eBBlock **, int); + +#endif diff --git a/src/SDCCmacro.c b/src/SDCCmacro.c new file mode 100644 index 0000000..73be749 --- /dev/null +++ b/src/SDCCmacro.c @@ -0,0 +1,213 @@ +/*------------------------------------------------------------------------- + SDCCmain.c - Macro support code. + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" + +enum + { + MAX_STRING_LENGTH = 2048, + MAX_MACRO_NAME_LENGTH = 128 + }; + +void +_evalMacros(char *apinto, hTab *pvals, const char *pfrom, size_t alen) +{ + bool fdidsomething = FALSE; + char *pinto = apinto; + size_t plen = alen; + char quote = '\0'; + + assert(pinto); + assert(pvals); + assert(pfrom); + + while (plen > 0 && *pfrom) { + switch (*pfrom) { + case '"': + case '\'': + if (quote != '\0') { + /* write previous quote */ + *pinto++ = quote; + --plen; + } + quote = *pfrom++; + break; + + case '{': + { + const char *pend = ++pfrom; + char name[MAX_MACRO_NAME_LENGTH]; + const char *pval; + + /* Find the end of macro */ + while (*pend && '}' != *pend) { + pend++; + } + if ('}' != *pend) { + wassertl(0, "Unterminated macro expansion"); + } + + /* Pull out the macro name */ + if (pend - pfrom >= MAX_MACRO_NAME_LENGTH) { + wassertl(0, "macro name too long"); + } + + strncpy(name, pfrom, pend - pfrom); + name[pend - pfrom] = '\0'; + + /* Look up the value in the hash table */ + pval = shash_find (pvals, name); + + if (NULL == pval) { + /* Empty macro value */ + if ('\0' != quote) { + /* It was a quote */ + if (pend[1] == quote) { + /* Start quote equals end quote: skip both */ + ++pend; + } + else { + /* Start quote not equals end quote: add both */ + *pinto++ = quote; + --plen; + } + } + } + else { + if ('\0' != quote) { + /* It was a quote, add it */ + *pinto++ = quote; + --plen; + } + if (plen > 0) { + /* Replace macro */ + strncpy(pinto, pval, plen); + pinto += strlen(pval); + plen -= plen > strlen(pval) ? strlen(pval) : plen; + fdidsomething = TRUE; + } + } + + quote = '\0'; + pfrom = pend + 1; + } + break; + + default: + if ('\0' != quote) { + *pinto++ = quote; + --plen; + quote = '\0'; + } + + if (plen > 0) { + /* Pass through */ + *pinto++ = *pfrom++; + --plen; + } + } + } + + if (plen > 0 && '\0' != quote) { + *pinto++ = quote; + --plen; + } + + if (plen <= 0) { + wassertl(0, "macro expansion too long"); + } + + *pinto = '\0'; + + /* If we did something then recursivly expand any expanded macros */ + if (fdidsomething) { + char ainto[MAX_STRING_LENGTH]; + _evalMacros(ainto, pvals, apinto, MAX_STRING_LENGTH); + strncpyz(apinto, ainto, alen); + } +} + +char * +mvsprintf(hTab *pvals, const char *pformat, va_list ap) +{ + char ainto[MAX_STRING_LENGTH]; + char atmp[MAX_STRING_LENGTH]; + + /* Recursivly evaluate all the macros in the string */ + _evalMacros(ainto, pvals, pformat, MAX_STRING_LENGTH); + /* Evaluate all the arguments */ +#if defined(HAVE_VSNPRINTF) + if (vsnprintf(atmp, MAX_STRING_LENGTH, ainto, ap) >= MAX_STRING_LENGTH) + { + fprintf(stderr, "Internal error: mvsprintf output truncated.\n"); + } +#else + { + int wlen; + + wlen = vsprintf(atmp, ainto, ap); + + if (wlen < 0 || wlen >= MAX_STRING_LENGTH) + { + wassertl(0, "mvsprintf overflowed."); + } + } +#endif + + /* Recursivly evaluate any macros that were used as arguments */ + _evalMacros(ainto, pvals, atmp, MAX_STRING_LENGTH); + + /* Return a copy of the evaluated string. */ + return Safe_strdup(ainto); +} + +char *msprintf(hTab *pvals, const char *pformat, ...) +{ + va_list ap; + char *pret; + + va_start(ap, pformat); + + pret = mvsprintf(pvals, pformat, ap); + + va_end(ap); + + return pret; +} + +void +mfprintf(FILE *fp, hTab *pvals, const char *pformat, ...) +{ + va_list ap; + char *p; + + va_start(ap, pformat); + + p = mvsprintf(pvals, pformat, ap); + + va_end(ap); + + fputs(p, fp); + Safe_free(p); +} diff --git a/src/SDCCmacro.h b/src/SDCCmacro.h new file mode 100644 index 0000000..782096b --- /dev/null +++ b/src/SDCCmacro.h @@ -0,0 +1,38 @@ +/*----------------------------------------------------------------- + SDCChast.h - contains support routines for hashtables/sets . + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + + +#ifndef SDCCMACRO_H +#define SDCCMACRO_H + +#include "SDCChasht.h" +#include +#include + +char *mvsprintf(hTab *pvals, const char *pformat, va_list ap); +char *msprintf(hTab *pvals, const char *pformat, ...); +void mfprintf(FILE *fp, hTab *pvals, const char *pformat, ...); + +#endif + diff --git a/src/SDCCmain.c b/src/SDCCmain.c new file mode 100644 index 0000000..12909d3 --- /dev/null +++ b/src/SDCCmain.c @@ -0,0 +1,2474 @@ +/*------------------------------------------------------------------------- + SDCCmain.c - main file + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifdef _WIN32 +#include +#else +#include +#endif + +#include +#include "common.h" +#include +#include "newalloc.h" +#include "dbuf_string.h" +#include "SDCCerr.h" +#include "BuildCmd.h" +#include "MySystem.h" +#include "SDCCmacro.h" +#include "SDCCutil.h" +#include "SDCCdebug.h" +#include "SDCCargs.h" + +#ifdef _WIN32 +#include +#else +#include +#include +#endif + +/* REMOVE ME!!! */ +extern int yyparse (void); + +FILE *srcFile; /* source file */ +char *fullSrcFileName; /* full name for the source file; */ + /* can be NULL while c1mode or linking without compiling */ +char *fullDstFileName; /* full name for the output file; */ + /* only given by -o, otherwise NULL */ +char *dstFileName; /* destination file name without extension */ +char *dstPath = ""; /* path for the output files; */ + /* "" is equivalent with cwd */ +char *moduleNameBase; /* module name base is source file without path and extension */ + /* can be NULL while linking without compiling */ +char *moduleName; /* module name is same as module name base, but with all */ + /* non-alphanumeric characters replaced with underscore */ +int currRegBank = 0; +int RegBankUsed[4] = {1, 0, 0, 0}; /*JCF: Reg Bank 0 used by default*/ +int BitBankUsed; /* MB: overlayable bit bank */ +struct optimize optimize; +struct options options; +int preProcOnly = 0; +int noAssemble = 0; +set *preArgvSet = NULL; /* pre-processor arguments */ +set *asmOptionsSet = NULL; /* set of assembler options */ +set *linkOptionsSet = NULL; /* set of linker options */ +set *libFilesSet = NULL; +set *libPathsSet = NULL; +set *relFilesSet = NULL; +set *dataDirsSet = NULL; /* list of data search directories */ +set *includeDirsSet = NULL; /* list of include search directories */ +set *userIncDirsSet = NULL; /* list of user include directories */ +set *libDirsSet = NULL; /* list of lib search directories */ + +/* uncomment JAMIN_DS390 to always override and use ds390 port + for mcs51 work. This is temporary, for compatibility testing. */ +/* #define JAMIN_DS390 */ +#ifdef JAMIN_DS390 +int ds390_jammed = 0; +#endif + +/* Globally accessible scratch buffer for file names. + TODO: replace them with local buffers */ +char scratchFileName[PATH_MAX]; +char buffer[PATH_MAX * 2]; + +#define LENGTH(_a) (sizeof(_a)/sizeof(*(_a))) + +#define OPTION_HELP "--help" +#define OPTION_OUT_FMT_IHX "--out-fmt-ihx" +#define OPTION_OUT_FMT_S19 "--out-fmt-s19" +#define OPTION_LARGE_MODEL "--model-large" +#define OPTION_MEDIUM_MODEL "--model-medium" +#define OPTION_SMALL_MODEL "--model-small" +#define OPTION_DUMP_ALL "--dumpall" +#define OPTION_PEEP_FILE "--peep-file" +#define OPTION_LIB_PATH "--lib-path" +#define OPTION_CALLEE_SAVES "--callee-saves" +#define OPTION_STACK_LOC "--stack-loc" +#define OPTION_XSTACK_LOC "--xstack-loc" +#define OPTION_DATA_LOC "--data-loc" +#define OPTION_IDATA_LOC "--idata-loc" +#define OPTION_XRAM_LOC "--xram-loc" +#define OPTION_CODE_LOC "--code-loc" +#define OPTION_IRAM_SIZE "--iram-size" +#define OPTION_XRAM_SIZE "--xram-size" +#define OPTION_CODE_SIZE "--code-size" +#define OPTION_VERSION "--version" +#define OPTION_NO_LABEL_OPT "--nolabelopt" +#define OPTION_NO_LOOP_INV "--noinvariant" +#define OPTION_NO_LOOP_IND "--noinduction" +#define OPTION_LESS_PEDANTIC "--less-pedantic" +#define OPTION_DISABLE_WARNING "--disable-warning" +#define OPTION_WERROR "--Werror" +#define OPTION_NO_GCSE "--nogcse" +#define OPTION_SHORT_IS_8BITS "--short-is-8bits" +#define OPTION_NO_XINIT_OPT "--no-xinit-opt" +#define OPTION_NO_CCODE_IN_ASM "--no-c-code-in-asm" +#define OPTION_ICODE_IN_ASM "--i-code-in-asm" +#define OPTION_PRINT_SEARCH_DIRS "--print-search-dirs" +#define OPTION_MSVC_ERROR_STYLE "--vc" +#define OPTION_USE_STDOUT "--use-stdout" +#define OPTION_NO_PEEP_COMMENTS "--no-peep-comments" +#define OPTION_VERBOSE_ASM "--fverbose-asm" +#define OPTION_OPT_CODE_SPEED "--opt-code-speed" +#define OPTION_OPT_CODE_SIZE "--opt-code-size" +#define OPTION_STD_C89 "--std-c89" +#define OPTION_STD_C99 "--std-c99" +#define OPTION_STD_SDCC89 "--std-sdcc89" +#define OPTION_STD_SDCC99 "--std-sdcc99" +#define OPTION_CODE_SEG "--codeseg" +#define OPTION_CONST_SEG "--constseg" +#define OPTION_DOLLARS_IN_IDENT "--fdollars-in-identifiers" +#define OPTION_UNSIGNED_CHAR "--funsigned-char" + +static const OPTION +optionsTable[] = { + { 0, NULL, NULL, "General options" }, + { 0, OPTION_HELP, NULL, "Display this help" }, + { 'v', OPTION_VERSION, NULL, "Display sdcc's version" }, + { 0, "--verbose", &options.verbose, "Trace calls to the preprocessor, assembler, and linker" }, + { 'V', NULL, &options.verboseExec, "Execute verbosely. Show sub commands as they are run" }, + { 'd', NULL, NULL, NULL }, + { 'D', NULL, NULL, "Define macro as in -Dmacro" }, + { 'I', NULL, NULL, "Add to the include (*.h) path, as in -Ipath" }, + { 'A', NULL, NULL, NULL }, + { 'U', NULL, NULL, NULL }, + { 'M', NULL, NULL, "Preprocessor option" }, + { 'W', NULL, NULL, "Pass through options to the pre-processor (p), assembler (a) or linker (l)" }, + { 'S', NULL, &noAssemble, "Compile only; do not assemble or link" }, + { 'c', "--compile-only", &options.cc_only, "Compile and assemble, but do not link" }, + { 'E', "--preprocessonly", &preProcOnly, "Preprocess only, do not compile" }, + { 0, "--c1mode", &options.c1mode, "Act in c1 mode. The standard input is preprocessed code, the output is assembly code." }, + { 'o', NULL, NULL, "Place the output into the given path resp. file" }, + { 0, OPTION_PRINT_SEARCH_DIRS, &options.printSearchDirs, "display the directories in the compiler's search path"}, + { 0, OPTION_MSVC_ERROR_STYLE, &options.vc_err_style, "messages are compatible with Micro$oft visual studio"}, + { 0, OPTION_USE_STDOUT, NULL, "send errors to stdout instead of stderr"}, + { 0, "--nostdlib", &options.nostdlib, "Do not include the standard library directory in the search path" }, + { 0, "--nostdinc", &options.nostdinc, "Do not include the standard include directory in the search path" }, + { 0, OPTION_LESS_PEDANTIC, NULL, "Disable some of the more pedantic warnings" }, + { 0, OPTION_DISABLE_WARNING, NULL, " Disable specific warning" }, + { 0, OPTION_WERROR, NULL, "Treat the warnings as errors" }, + { 0, "--debug", &options.debug, "Enable debugging symbol output" }, + { 0, "--cyclomatic", &options.cyclomatic, "Display complexity of compiled functions" }, + { 0, OPTION_STD_C89, NULL, "Use C89 standard only" }, + { 0, OPTION_STD_SDCC89, NULL, "Use C89 standard with SDCC extensions (default)" }, + { 0, OPTION_STD_C99, NULL, "Use C99 standard only (incomplete)" }, + { 0, OPTION_STD_SDCC99, NULL, "Use C99 standard with SDCC extensions (incomplete)" }, + { 0, OPTION_DOLLARS_IN_IDENT, &options.dollars_in_ident, "Permit '$' as an identifier character" }, + { 0, OPTION_UNSIGNED_CHAR, &options.unsigned_char, "Make \"char\" unsigned by default" }, + + { 0, NULL, NULL, "Code generation options"}, + { 'm', NULL, NULL, "Set the port to use e.g. -mz80." }, + { 'p', NULL, NULL, "Select port specific processor e.g. -mpic14 -p16f84" }, + { 0, OPTION_LARGE_MODEL, NULL, "external data space is used" }, + { 0, OPTION_MEDIUM_MODEL, NULL, "external paged data space is used" }, + { 0, OPTION_SMALL_MODEL, NULL, "internal data space is used (default)" }, + { 0, "--stack-auto", &options.stackAuto, "Stack automatic variables" }, + { 0, "--xstack", &options.useXstack, "Use external stack" }, + { 0, "--int-long-reent", &options.intlong_rent, "Use reentrant calls on the int and long support functions" }, + { 0, "--float-reent", &options.float_rent, "Use reentrant calls on the float support functions" }, + { 0, "--main-return", &options.mainreturn, "Issue a return after main()" }, + { 0, "--xram-movc", &options.xram_movc, "Use movc instead of movx to read xram (xdata)" }, + { 0, OPTION_CALLEE_SAVES, &options.calleeSavesSet, " Cause the called function to save registers insted of the caller", CLAT_SET }, + { 0, "--profile", &options.profile, "On supported ports, generate extra profiling information" }, + { 0, "--fommit-frame-pointer", &options.ommitFramePtr, "Leave out the frame pointer." }, + { 0, "--all-callee-saves", &options.all_callee_saves, "callee will always save registers used" }, + { 0, "--stack-probe", &options.stack_probe,"insert call to function __stack_probe at each function prologue"}, + { 0, OPTION_NO_XINIT_OPT, &options.noXinitOpt, "don't memcpy initialized xram from code"}, + { 0, OPTION_NO_CCODE_IN_ASM, &options.noCcodeInAsm, "don't include c-code as comments in the asm file"}, + { 0, OPTION_NO_PEEP_COMMENTS, &options.noPeepComments, "don't include peephole optimizer comments"}, + { 0, OPTION_VERBOSE_ASM, &options.verboseAsm, "include code generator comments"}, + { 0, OPTION_SHORT_IS_8BITS, NULL, "Make short 8 bits (for old times sake)" }, + { 0, OPTION_CODE_SEG, NULL, " use this name for the code segment" }, + { 0, OPTION_CONST_SEG, NULL, " use this name for the const segment" }, + + { 0, NULL, NULL, "Optimization options"}, + { 0, "--nooverlay", &options.noOverlay, "Disable overlaying leaf function auto variables" }, + { 0, OPTION_NO_GCSE, NULL, "Disable the GCSE optimisation" }, + { 0, OPTION_NO_LABEL_OPT, NULL, "Disable label optimisation" }, + { 0, OPTION_NO_LOOP_INV, NULL, "Disable optimisation of invariants" }, + { 0, OPTION_NO_LOOP_IND, NULL, "Disable loop variable induction" }, + { 0, "--nojtbound", &optimize.noJTabBoundary, "Don't generate boundary check for jump tables" }, + { 0, "--noloopreverse", &optimize.noLoopReverse, "Disable the loop reverse optimisation" }, + { 0, "--no-peep", &options.nopeep, "Disable the peephole assembly file optimisation" }, + { 0, "--no-reg-params", &options.noRegParams, "On some ports, disable passing some parameters in registers" }, + { 0, "--peep-asm", &options.asmpeep, "Enable peephole optimization on inline assembly" }, + { 0, OPTION_PEEP_FILE, &options.peep_file, " use this extra peephole file", CLAT_STRING }, + { 0, OPTION_OPT_CODE_SPEED, NULL, "Optimize for code speed rather than size" }, + { 0, OPTION_OPT_CODE_SIZE, NULL, "Optimize for code size rather than speed" }, + + { 0, NULL, NULL, "Internal debugging options"}, + { 0, "--dumpraw", &options.dump_raw, "Dump the internal structure after the initial parse" }, + { 0, "--dumpgcse", &options.dump_gcse, NULL }, + { 0, "--dumploop", &options.dump_loop, NULL }, + { 0, "--dumpdeadcode", &options.dump_kill, NULL }, + { 0, "--dumpliverange", &options.dump_range, NULL }, + { 0, "--dumpregpack", &options.dump_pack, NULL }, + { 0, "--dumpregassign", &options.dump_rassgn, NULL }, + { 0, "--dumptree", &options.dump_tree, "dump front-end AST before generating iCode" }, + { 0, OPTION_DUMP_ALL, NULL, "Dump the internal structure at all stages" }, + { 0, OPTION_ICODE_IN_ASM, &options.iCodeInAsm, "include i-code as comments in the asm file"}, + + { 0, NULL, NULL, "Linker options" }, + { 'l', NULL, NULL, "Include the given library in the link" }, + { 'L', NULL, NULL, "Add the next field to the library search path" }, + { 0, OPTION_LIB_PATH, &libPathsSet, " use this path to search for libraries", CLAT_ADD_SET }, + { 0, OPTION_OUT_FMT_IHX, NULL, "Output in Intel hex format" }, + { 0, OPTION_OUT_FMT_S19, NULL, "Output in S19 hex format" }, + { 0, OPTION_XRAM_LOC, &options.xdata_loc, " External Ram start location", CLAT_INTEGER }, + { 0, OPTION_XRAM_SIZE, NULL, " External Ram size" }, + { 0, OPTION_IRAM_SIZE, &options.iram_size, " Internal Ram size", CLAT_INTEGER }, + { 0, OPTION_XSTACK_LOC, &options.xstack_loc, " External Stack start location", CLAT_INTEGER }, + { 0, OPTION_CODE_LOC, &options.code_loc, " Code Segment Location", CLAT_INTEGER }, + { 0, OPTION_CODE_SIZE, &options.code_size, " Code Segment size", CLAT_INTEGER }, + { 0, OPTION_STACK_LOC, &options.stack_loc, " Stack pointer initial value", CLAT_INTEGER }, + { 0, OPTION_DATA_LOC, &options.data_loc, " Direct data start location", CLAT_INTEGER }, + { 0, OPTION_IDATA_LOC, &options.idata_loc, NULL, CLAT_INTEGER }, + + /* End of options */ + { 0, NULL } +}; + +/** Table of all unsupported options and help text to display when one + is used. +*/ +typedef struct { + /** shortOpt as in OPTIONS. */ + char shortOpt; + /** longOpt as in OPTIONS. */ + const char *longOpt; + /** Message to display inside W_UNSUPPORTED_OPT when this option + is used. */ + const char *message; +} UNSUPPORTEDOPT; + +static const UNSUPPORTEDOPT +unsupportedOptTable[] = { + { 'X', NULL, "use --xstack-loc instead" }, + { 'x', NULL, "use --xstack instead" }, + { 'i', NULL, "use --idata-loc instead" }, + { 'r', NULL, "use --xdata-loc instead" }, + { 's', NULL, "use --code-loc instead" }, + { 'Y', NULL, "use -I instead" } +}; + +/** List of all default constant macros. + */ +static const char *_baseValues[] = { + "cpp", "sdcpp", + "cppextraopts", "", + /* Path seperator character */ + "sep", DIR_SEPARATOR_STRING, + NULL +}; + +static const char *_preCmd = "{cpp} -nostdinc -Wall {cppstd}{cppextraopts} \"{fullsrcfilename}\" \"{cppoutfilename}\""; + +PORT *port; + +static PORT *_ports[] = +{ +#if !OPT_DISABLE_MCS51 + &mcs51_port, +#endif +#if !OPT_DISABLE_GBZ80 + &gbz80_port, +#endif +#if !OPT_DISABLE_Z80 + &z80_port, +#endif +#if !OPT_DISABLE_AVR + &avr_port, +#endif +#if !OPT_DISABLE_DS390 + &ds390_port, +#endif +#if !OPT_DISABLE_PIC16 + &pic16_port, +#endif +#if !OPT_DISABLE_PIC + &pic_port, +#endif +#if !OPT_DISABLE_TININative + &tininative_port, +#endif +#if !OPT_DISABLE_XA51 + &xa51_port, +#endif +#if !OPT_DISABLE_DS400 + &ds400_port, +#endif +#if !OPT_DISABLE_HC08 + &hc08_port, +#endif +}; + +#define NUM_PORTS (sizeof(_ports)/sizeof(_ports[0])) + +/** Sets the port to the one given by the command line option. + @param The name minus the option (eg 'mcs51') + @return 0 on success. +*/ +static void +_setPort (const char *name) +{ + int i; + for (i = 0; i < NUM_PORTS; i++) + { + if (!strcmp (_ports[i]->target, name)) + { + port = _ports[i]; + return; + } + } + /* Error - didnt find */ + werror (E_UNKNOWN_TARGET, name); + exit (EXIT_FAILURE); +} + +/* Override the default processor with the one specified + * on the command line */ +static void +_setProcessor (char *_processor) +{ + port->processor = _processor; +} + +static void +_validatePorts (void) +{ + int i; + for (i = 0; i < NUM_PORTS; i++) + { + if (_ports[i]->magic != PORT_MAGIC) + { + /* Uncomment this line to debug which port is causing the problem + * (the target name is close to the beginning of the port struct + * and probably can be accessed just fine). */ + fprintf(stderr,"%s :",_ports[i]->target); + wassertl (0, "Port definition structure is incomplete"); + } + } +} + +/* search through the command line options for the port */ +static void +_findPort (int argc, char **argv) +{ + _validatePorts (); + + while (argc--) + { + if (!strncmp (*argv, "-m", 2)) + { + _setPort (*argv + 2); + return; + } + argv++; + } + + /* Use the first in the list */ + port = _ports[0]; +} + +/* search through the command line options for the processor */ +static void +_findProcessor (int argc, char **argv) +{ + while (argc--) + { + if (!strncmp (*argv, "-p", 2)) + { + _setProcessor (*argv + 2); + return; + } + argv++; + } + + /* no error if processor was not specified. */ +} + +/*-----------------------------------------------------------------*/ +/* printVersionInfo - prints the version info */ +/*-----------------------------------------------------------------*/ +void +printVersionInfo (FILE *stream) +{ + int i; + + fprintf (stream, + "SDCC : "); + for (i = 0; i < NUM_PORTS; i++) + fprintf (stream, "%s%s", i == 0 ? "" : "/", _ports[i]->target); + + fprintf (stream, " " SDCC_VERSION_STR +#ifdef SDCC_SUB_VERSION_STR + "/" SDCC_SUB_VERSION_STR +#endif + " #%s (%s) (%s)\n", + getBuildNumber(), getBuildDate(), getBuildEnvironment() ); +} + +static void +printOptions(const OPTION *optionsTable, FILE *stream) +{ + int i; + for (i = 0; + optionsTable[i].shortOpt != 0 || optionsTable[i].longOpt != NULL + || optionsTable[i].help != NULL; + i++) + { + if (!optionsTable[i].shortOpt && !optionsTable[i].longOpt + && optionsTable[i].help) + { + fprintf (stream, "\n%s:\n", optionsTable[i].help); + } + else + { + fprintf(stream, " %c%c %-20s %s\n", + optionsTable[i].shortOpt !=0 ? '-' : ' ', + optionsTable[i].shortOpt !=0 ? optionsTable[i].shortOpt : ' ', + optionsTable[i].longOpt != NULL ? optionsTable[i].longOpt : "", + optionsTable[i].help != NULL ? optionsTable[i].help : "" + ); + } + } +} + +/*-----------------------------------------------------------------*/ +/* printUsage - prints command line syntax */ +/*-----------------------------------------------------------------*/ +static void +printUsage (void) +{ + int i; + FILE *stream = stderr; + + printVersionInfo (stream); + fprintf (stream, + "Usage : sdcc [options] filename\n" + "Options :-\n" + ); + + printOptions (optionsTable, stream); + + for (i = 0; i < NUM_PORTS; i++) + { + if (_ports[i]->poptions != NULL) + { + fprintf (stream, "\nSpecial options for the %s port:\n", _ports[i]->target); + printOptions (_ports[i]->poptions, stream); + } + } +} + +/*-----------------------------------------------------------------*/ +/* setParseWithComma - separates string with comma to a set */ +/*-----------------------------------------------------------------*/ +void +setParseWithComma (set **dest, const char *src) +{ + const char *p, *end; + struct dbuf_s dbuf; + + /* skip the initial white spaces */ + while (isspace((unsigned char)*src)) + ++src; + + /* skip the trailing white spaces */ + end = &src[strlen(src) - 1]; + while (end >= src && isspace((unsigned char)*end)) + --end; + ++end; + + p = src; + while (src < end) + { + dbuf_init (&dbuf, 16); + + while (p < end && ',' != *p) + ++p; + dbuf_append (&dbuf, src, p - src); + + /* null terminate the buffer */ + dbuf_c_str (&dbuf); + addSet(dest, dbuf_detach (&dbuf)); + + src = ++p; + } +} + +/*-----------------------------------------------------------------*/ +/* setDefaultOptions - sets the default options */ +/*-----------------------------------------------------------------*/ +static void +setDefaultOptions (void) +{ + /* first the options part */ + options.stack_loc = 0; /* stack pointer initialised to 0 */ + options.xstack_loc = 0; /* xternal stack starts at 0 */ + options.code_loc = 0; /* code starts at 0 */ + options.data_loc = 0; /* JCF: By default let the linker locate data */ + options.xdata_loc = 0; + options.idata_loc = 0; /* MB: No need to limit idata to 0x80-0xFF */ + options.nopeep = 0; + options.model = port->general.default_model; + options.nostdlib = 0; + options.nostdinc = 0; + options.verbose = 0; + options.shortis8bits = 0; + options.std_sdcc = 1; /* enable SDCC language extensions */ + options.std_c99 = 0; /* default to C89 until more C99 support */ + options.code_seg = CODE_NAME ? Safe_strdup(CODE_NAME) : NULL; /* default to CSEG for generated code */ + options.const_seg = CONST_NAME ? Safe_strdup(CONST_NAME) : NULL; /* default to CONST for generated code */ + + options.stack10bit=0; + + /* now for the optimizations */ + /* turn on the everything */ + optimize.global_cse = 1; + optimize.label1 = 1; + optimize.label2 = 1; + optimize.label3 = 1; + optimize.label4 = 1; + optimize.loopInvariant = 1; + optimize.loopInduction = 1; + + /* now for the ports */ + port->setDefaultOptions (); +} + +/*-----------------------------------------------------------------*/ +/* processFile - determines the type of file from the extension */ +/*-----------------------------------------------------------------*/ +static void +processFile (char *s) +{ + const char *extp; + struct dbuf_s ext; + struct dbuf_s path; + + dbuf_init (&ext, 128); + dbuf_init (&path, 128); + + /* get the file extension. + If no '.' then we don't know what the file type is + so give a warning and return */ + if (!dbuf_splitFile (s, &path, &ext)) + { + werror (W_UNKNOWN_FEXT, s); + + dbuf_destroy (&ext); + dbuf_destroy (&path); + + return; + } + + /* otherwise depending on the file type */ + extp = dbuf_c_str (&ext); + if (STRCASECMP (extp, ".c") == 0) + { + char *p; + + dbuf_destroy (&ext); + + /* source file name : not if we already have a + source file */ + if (fullSrcFileName) + { + werror (W_TOO_MANY_SRC, s); + + dbuf_destroy (&path); + + return; + } + + /* the only source file */ + fullSrcFileName = s; + if (!(srcFile = fopen (fullSrcFileName, "r"))) + { + werror (E_FILE_OPEN_ERR, s); + + dbuf_destroy (&path); + + exit (EXIT_FAILURE); + } + + /* get rid of any path information + for the module name; */ + dbuf_init (&ext, 128); + + dbuf_splitPath (dbuf_c_str (&path), NULL, &ext); + dbuf_destroy (&path); + + moduleNameBase = Safe_strdup (dbuf_c_str (&ext)); + moduleName = dbuf_detach (&ext); + + for (p = moduleName; *p; ++p) + if (!isalnum ((unsigned char)*p)) + *p = '_'; + return; + } + + /* if the extention is type .rel or .r or .REL or .R + additional object file will be passed to the linker */ + if (STRCASECMP (extp, ".r") == 0 || STRCASECMP (extp, ".rel") == 0 || + strcmp (extp, port->linker.rel_ext) == 0) + { + dbuf_destroy (&ext); + dbuf_destroy (&path); + + addSet (&relFilesSet, Safe_strdup (s)); + return; + } + + /* if .lib or .LIB */ + if (STRCASECMP (extp, ".lib") == 0) + { + dbuf_destroy (&ext); + dbuf_destroy (&path); + + addSet (&libFilesSet, Safe_strdup (s)); + return; + } + + dbuf_destroy (&ext); + dbuf_destroy (&path); + + werror (W_UNKNOWN_FEXT, s); +} + +static void +_setModel (int model, const char *sz) +{ + if (port->general.supported_models & model) + options.model = model; + else + werror (W_UNSUPPORTED_MODEL, sz, port->target); +} + +/** Gets the string argument to this option. If the option is '--opt' + then for input of '--optxyz' or '--opt xyz' returns xyz. +*/ +char * +getStringArg(const char *szStart, char **argv, int *pi, int argc) +{ + if (argv[*pi][strlen(szStart)]) + { + return &argv[*pi][strlen(szStart)]; + } + else + { + ++(*pi); + if (*pi >= argc) + { + werror (E_ARGUMENT_MISSING, szStart); + /* Die here rather than checking for errors later. */ + exit (EXIT_FAILURE); + } + else + { + return argv[*pi]; + } + } +} + +/** Gets the integer argument to this option using the same rules as + getStringArg. +*/ +int +getIntArg(const char *szStart, char **argv, int *pi, int argc) +{ + char *p; + int val; + char *str = getStringArg(szStart, argv, pi, argc); + + val = strtol(str, &p, 0); + if (p == str || *p != '\0') + { + werror (E_BAD_INT_ARGUMENT, szStart); + /* Die here rather than checking for errors later. */ + exit (EXIT_FAILURE); + } + return val; +} + +static void +verifyShortOption(const char *opt) +{ + if (strlen(opt) != 2) + { + werror (W_EXCESS_SHORT_OPTIONS, opt); + } +} + +static bool +tryHandleUnsupportedOpt(char **argv, int *pi) +{ + if (argv[*pi][0] == '-') + { + const char *longOpt = ""; + char shortOpt = -1; + int i; + + if (argv[*pi][1] == '-') + { + /* Long option. */ + longOpt = argv[*pi]; + } + else + { + shortOpt = argv[*pi][1]; + } + for (i = 0; i < LENGTH(unsupportedOptTable); i++) + { + if (unsupportedOptTable[i].shortOpt == shortOpt || + (longOpt && unsupportedOptTable[i].longOpt && !strcmp(unsupportedOptTable[i].longOpt, longOpt))) + { + /* Found an unsupported opt. */ + char buffer[100]; + SNPRINTF(buffer, sizeof(buffer), + "%s%c%c", + longOpt ? longOpt : "", + shortOpt ? '-' : ' ', shortOpt ? shortOpt : ' '); + werror (W_UNSUPP_OPTION, buffer, unsupportedOptTable[i].message); + return 1; + } + } + /* Didn't find in the table */ + return 0; + } + else + { + /* Not an option, so can't be unsupported :) */ + return 0; + } +} + +static bool +scanOptionsTable(const OPTION *optionsTable, char shortOpt, const char *longOpt, char **argv, int *pi, int argc) +{ + int i; + + for (i = 0; + optionsTable[i].shortOpt != 0 || optionsTable[i].longOpt != NULL + || optionsTable[i].help != NULL; + i++) + { + if (optionsTable[i].shortOpt == shortOpt) + { + if (optionsTable[i].pparameter != NULL) + { + verifyShortOption(argv[*pi]); + + (*(int *)optionsTable[i].pparameter)++; + + return TRUE; + } + } + else + { + size_t len = optionsTable[i].longOpt ? strlen (optionsTable[i].longOpt) : 0; + + if (longOpt && + (optionsTable[i].arg_type != CLAT_BOOLEAN || + (optionsTable[i].arg_type == CLAT_BOOLEAN && len == strlen (longOpt) && optionsTable[i].longOpt)) && + strncmp (optionsTable[i].longOpt, longOpt, len) == 0) + { + /* If it is a flag then we can handle it here */ + if (optionsTable[i].pparameter != NULL) + { + switch (optionsTable[i].arg_type) + { + case CLAT_BOOLEAN: + (*(int *)optionsTable[i].pparameter)++; + break; + + case CLAT_INTEGER: + *(int *)optionsTable[i].pparameter = getIntArg (optionsTable[i].longOpt, argv, pi, argc); + break; + + case CLAT_STRING: + if (*(char **)optionsTable[i].pparameter) + Safe_free(*(char **)optionsTable[i].pparameter); + *(char **)optionsTable[i].pparameter = Safe_strdup (getStringArg (optionsTable[i].longOpt, argv, pi, argc)); + break; + + case CLAT_SET: + if (*(set **)optionsTable[i].pparameter) + { + deleteSet ((set **)optionsTable[i].pparameter); + } + setParseWithComma ((set **)optionsTable[i].pparameter, getStringArg (optionsTable[i].longOpt, argv, pi, argc)); + break; + + case CLAT_ADD_SET: + addSet((set **)optionsTable[i].pparameter, Safe_strdup (getStringArg (optionsTable[i].longOpt, argv, pi, argc))); + break; + } + return TRUE; + } + else + { + /* Not a flag. Handled manually later. */ + return FALSE; + } + } + } + } + /* Didn't find in the table */ + return FALSE; +} + +static bool +tryHandleSimpleOpt(char **argv, int *pi, int argc) +{ + if (argv[*pi][0] == '-') + { + const char *longOpt = ""; + char shortOpt = -1; + + if (argv[*pi][1] == '-') + { + /* Long option. */ + longOpt = argv[*pi]; + } + else + { + shortOpt = argv[*pi][1]; + } + + if (scanOptionsTable(optionsTable, shortOpt, longOpt, argv, pi, argc)) + { + return TRUE; + } + else if (port && port->poptions && + scanOptionsTable(port->poptions, shortOpt, longOpt, argv, pi, argc)) + { + return TRUE; + } + else + { + return FALSE; + } + } + else + { + /* Not an option, so can't be handled. */ + return FALSE; + } +} + +/*-----------------------------------------------------------------*/ +/* parseCmdLine - parses the command line and sets the options */ +/*-----------------------------------------------------------------*/ +static int +parseCmdLine (int argc, char **argv) +{ + int i; + + /* go thru all whole command line */ + for (i = 1; i < argc; i++) + { + if (i >= argc) + break; + + /* check port specific options before general ones */ + if (port->parseOption (&argc, argv, &i) == TRUE) + { + continue; + } + + if (tryHandleUnsupportedOpt(argv, &i) == TRUE) + { + continue; + } + + if (tryHandleSimpleOpt(argv, &i, argc) == TRUE) + { + continue; + } + + /* options */ + if (argv[i][0] == '-' && argv[i][1] == '-') + { + if (strcmp (argv[i], OPTION_USE_STDOUT) == 0) + { + if (options.use_stdout == 0) + { + options.use_stdout = 1; + dup2(STDOUT_FILENO, STDERR_FILENO); + } + continue; + } + if (strcmp (argv[i], OPTION_HELP) == 0) + { + printUsage (); + exit (EXIT_SUCCESS); + } + + if (strcmp (argv[i], OPTION_OUT_FMT_IHX) == 0) + { + options.out_fmt = 0; + continue; + } + + if (strcmp (argv[i], OPTION_OUT_FMT_S19) == 0) + { + options.out_fmt = 1; + continue; + } + + if (strcmp (argv[i], OPTION_LARGE_MODEL) == 0) + { + _setModel (MODEL_LARGE, argv[i]); + continue; + } + + if (strcmp (argv[i], OPTION_MEDIUM_MODEL) == 0) + { + _setModel (MODEL_MEDIUM, argv[i]); + continue; + } + + if (strcmp (argv[i], OPTION_SMALL_MODEL) == 0) + { + _setModel (MODEL_SMALL, argv[i]); + continue; + } + + if (strcmp (argv[i], OPTION_DUMP_ALL) == 0) + { + options.dump_rassgn = + options.dump_pack = + options.dump_range = + options.dump_kill = + options.dump_loop = + options.dump_gcse = + options.dump_raw = 1; + continue; + } + + if (strcmp (argv[i], OPTION_VERSION) == 0) + { + printVersionInfo (stdout); + exit (EXIT_SUCCESS); + continue; + } + + if (strcmp (argv[i], OPTION_XRAM_SIZE) == 0) + { + options.xram_size = getIntArg(OPTION_XRAM_SIZE, argv, &i, argc); + options.xram_size_set = TRUE; + continue; + } + + if (strcmp (argv[i], OPTION_NO_GCSE) == 0) + { + optimize.global_cse = 0; + continue; + } + + if (strcmp (argv[i], OPTION_NO_LOOP_INV) == 0) + { + optimize.loopInvariant = 0; + continue; + } + + if (strcmp (argv[i], OPTION_NO_LABEL_OPT) == 0) + { + optimize.label4 = 0; + continue; + } + + if (strcmp (argv[i], OPTION_NO_LOOP_IND) == 0) + { + optimize.loopInduction = 0; + continue; + } + + if (strcmp (argv[i], OPTION_OPT_CODE_SPEED) == 0) + { + optimize.codeSpeed = 1; + optimize.codeSize = 0; + continue; + } + + if (strcmp (argv[i], OPTION_OPT_CODE_SIZE) == 0) + { + optimize.codeSpeed = 0; + optimize.codeSize = 1; + continue; + } + + if (strcmp (argv[i], OPTION_LESS_PEDANTIC) == 0) + { + options.lessPedantic = 1; + setErrorLogLevel(ERROR_LEVEL_WARNING); + continue; + } + + if (strcmp (argv[i], OPTION_DISABLE_WARNING) == 0) + { + int w = getIntArg(OPTION_DISABLE_WARNING, argv, &i, argc); + if (w < MAX_ERROR_WARNING) + { + setWarningDisabled(w); + } + continue; + } + + if (strcmp (argv[i], OPTION_WERROR) == 0) + { + setWError(1); + addSet(&preArgvSet, Safe_strdup("-Werror")); + continue; + } + + if (strcmp (&argv[i][1], OPTION_SHORT_IS_8BITS) == 0) + { + options.shortis8bits=1; + continue; + } + + if (strcmp (argv[i], OPTION_STD_C89) == 0) + { + options.std_c99 = 0; + options.std_sdcc = 0; + continue; + } + + if (strcmp (argv[i], OPTION_STD_C99) == 0) + { + options.std_c99 = 1; + options.std_sdcc = 0; + continue; + } + + if (strcmp (argv[i], OPTION_STD_SDCC89) == 0) + { + options.std_c99 = 0; + options.std_sdcc = 1; + continue; + } + + if (strcmp (argv[i], OPTION_STD_SDCC99) == 0) + { + options.std_c99 = 1; + options.std_sdcc = 1; + continue; + } + + if (strcmp (argv[i], OPTION_CODE_SEG) == 0) + { + struct dbuf_s segname; + + dbuf_init (&segname, 16); + dbuf_printf (&segname, "%-8s(CODE)", getStringArg (OPTION_CODE_SEG, argv, &i, argc)); + if (options.code_seg) Safe_free(options.code_seg); + options.code_seg = dbuf_detach (&segname); + continue; + } + + if (strcmp (argv[i], OPTION_CONST_SEG) == 0) + { + struct dbuf_s segname; + + dbuf_init (&segname, 16); + dbuf_printf (&segname, "%-8s(CODE)", getStringArg (OPTION_CONST_SEG, argv, &i, argc)); + if (options.const_seg) Safe_free(options.const_seg); + options.const_seg = dbuf_detach (&segname); + continue; + } + + werror (W_UNKNOWN_OPTION, argv[i]); + continue; + } + + /* if preceded by '-' then option */ + if (*argv[i] == '-') + { + switch (argv[i][1]) + { + case 'h': + verifyShortOption(argv[i]); + + printUsage (); + exit (EXIT_SUCCESS); + break; + + case 'm': + /* Used to select the port. But this has already been done. */ + break; + + case 'p': + /* Used to select the processor in port. But this has + * already been done. */ + break; + + case 'c': + verifyShortOption(argv[i]); + + options.cc_only = 1; + break; + + case 'L': + addSet(&libPathsSet, Safe_strdup(getStringArg("-L", argv, &i, argc))); + break; + + case 'l': + addSet(&libFilesSet, Safe_strdup(getStringArg("-l", argv, &i, argc))); + break; + + case 'o': + { + char *outName = getStringArg("-o", argv, &i, argc); + size_t len = strlen(outName); + + /* point to last character */ + if (IS_DIR_SEPARATOR(outName[len - 1])) + { + /* only output path specified */ + dstPath = Safe_malloc(len); + memcpy(dstPath, outName, len - 1); + dstPath[len - 1] = '\0'; + fullDstFileName = NULL; + } + else + { + struct dbuf_s path; + + dbuf_init (&path, 128); + fullDstFileName = Safe_strdup (outName); + + /* get rid of the "."-extension */ + dbuf_splitFile (outName, &path, NULL); + + dbuf_c_str (&path); + dstFileName = dbuf_detach (&path); + + dbuf_init (&path, 128); + /* strip module name to get path */ + if (dbuf_splitPath (dstFileName, &path, NULL)) + { + dbuf_c_str (&path); + dstPath = dbuf_detach (&path); + } + else + dbuf_destroy (&path); + } + break; + } + + case 'W': + /* pre-processer options */ + if (argv[i][2] == 'p') + { + setParseWithComma(&preArgvSet, getStringArg("-Wp", argv, &i, argc)); + } + /* linker options */ + else if (argv[i][2] == 'l') + { + setParseWithComma(&linkOptionsSet, getStringArg("-Wl", argv, &i, argc)); + } + /* assembler options */ + else if (argv[i][2] == 'a') + { + setParseWithComma(&asmOptionsSet, getStringArg("-Wa", argv, &i, argc)); + } + else + { + werror (W_UNKNOWN_OPTION, argv[i]); + } + break; + + case 'v': + verifyShortOption(argv[i]); + + printVersionInfo (stdout); + exit (EXIT_SUCCESS); + break; + + /* preprocessor options */ + case 'M': + { + preProcOnly = 1; + if (argv[i][2] == 'M') + addSet(&preArgvSet, Safe_strdup("-MM")); + else + addSet(&preArgvSet, Safe_strdup("-M")); + break; + } + + case 'd': + case 'D': + case 'I': + case 'A': + case 'U': + { + char sOpt = argv[i][1]; + char *rest; + + if (argv[i][2] == ' ' || argv[i][2] == '\0') + { + i++; + if (i >= argc) + { + /* No argument. */ + werror(E_ARGUMENT_MISSING, argv[i-1]); + break; + } + else + { + rest = argv[i]; + } + } + else + rest = &argv[i][2]; + + if (sOpt == 'Y') + sOpt = 'I'; + + SNPRINTF (buffer, sizeof(buffer), + ((sOpt == 'I') ? "-%c\"%s\"": "-%c%s"), sOpt, rest); + addSet(&preArgvSet, Safe_strdup(buffer)); + if(sOpt == 'I') { + addSet(&includeDirsSet, Safe_strdup(rest)); + addSet(&userIncDirsSet, Safe_strdup(rest)); + } + } + break; + + default: + werror (W_UNKNOWN_OPTION, argv[i]); + } + continue; + } + + /* no option must be a filename */ + if (options.c1mode) + { + werror (W_NO_FILE_ARG_IN_C1, argv[i]); + } + else + { + processFile (argv[i]); + } + } + + /* some sanity checks in c1 mode */ + if (options.c1mode) + { + const char *s; + + if (fullSrcFileName) + { + fclose (srcFile); + werror (W_NO_FILE_ARG_IN_C1, fullSrcFileName); + } + fullSrcFileName = NULL; + for (s = setFirstItem(relFilesSet); s != NULL; s = setNextItem(relFilesSet)) + { + werror (W_NO_FILE_ARG_IN_C1, s); + } + for (s = setFirstItem(libFilesSet); s != NULL; s = setNextItem(libFilesSet)) + { + werror (W_NO_FILE_ARG_IN_C1, s); + } + deleteSet(&relFilesSet); + deleteSet(&libFilesSet); + + if (options.cc_only || noAssemble || preProcOnly) + { + werror (W_ILLEGAL_OPT_COMBINATION); + } + options.cc_only = noAssemble = preProcOnly = 0; + if (!dstFileName) + { + werror (E_NEED_OPT_O_IN_C1); + exit (EXIT_FAILURE); + } + else + { + char *p; + + moduleName = Safe_strdup(dstFileName); + for (p = moduleName; *p; ++p) + if (!isalnum ((unsigned char)*p)) + *p = '_'; + } + } + /* if no dstFileName given with -o, we've to find one: */ + if (!dstFileName) + { + const char *s; + + /* use the modulename from the C-source */ + if (fullSrcFileName) + { + struct dbuf_s path; + + if (*dstPath != '\0') + { + dbuf_init(&path, 128); + dbuf_makePath (&path, dstPath, moduleNameBase); + dbuf_c_str (&path); + dstFileName = dbuf_detach (&path); + } + else + dstFileName = Safe_strdup(moduleNameBase); + } + /* use the modulename from the first object file */ + else if ((s = peekSet(relFilesSet)) != NULL) + { + struct dbuf_s file; + + dbuf_init(&file, 128); + + /* get rid of the "."-extension */ + dbuf_splitFile (s, &file, NULL); + + dbuf_c_str (&file); + s = dbuf_detach (&file); + + dbuf_init (&file, 128); + + dbuf_splitPath (s, NULL, &file); + + if (*dstPath != '\0') + { + struct dbuf_s path; + + dbuf_init(&path, 128); + dbuf_makePath (&path, dstPath, dbuf_c_str (&file)); + dbuf_destroy (&file); + dbuf_c_str (&path); + dstFileName = dbuf_detach (&path); + } + else + { + dbuf_c_str (&file); + dstFileName = dbuf_detach (&file); + } + } + /* else no module given: help text is displayed */ + } + + /* set int, long and float reentrancy based on stack-auto */ + if (options.stackAuto) + { + options.intlong_rent++; + options.float_rent++; + } + + /* mcs51 has an assembly coded float library that's always reentrant */ + if (TARGET_IS_MCS51) + { + options.float_rent++; + + /* set up external stack location if not explicitly specified */ + if (!options.xstack_loc) + options.xstack_loc = options.xdata_loc; + } + + /* if debug option is set then open the cdbFile */ + if (options.debug && fullSrcFileName) + { + SNPRINTF (scratchFileName, sizeof(scratchFileName), + "%s.adb", dstFileName); /*JCF: Nov 30, 2002*/ + if(debugFile->openFile(scratchFileName)) + debugFile->writeModule(moduleName); + else + werror (E_FILE_OPEN_ERR, scratchFileName); + } + MSVC_style(options.vc_err_style); + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* finalizeOptions - finalize (post-process( options */ +/*-----------------------------------------------------------------*/ +static void +finalizeOptions (void) +{ + /* no peephole comments if not verbose asm */ + if (!options.verboseAsm) + options.noPeepComments = 1; +} + +/*-----------------------------------------------------------------*/ +/* linkEdit : - calls the linkage editor with options */ +/*-----------------------------------------------------------------*/ +static void +linkEdit (char **envp) +{ + FILE *lnkfile; + char *segName, *c; + int system_ret; + const char *s; + char linkerScriptFileName[PATH_MAX]; + + linkerScriptFileName[0] = 0; + c = NULL; + + if (port->linker.needLinkerScript) + { + char out_fmt; + + switch (options.out_fmt) + { + case 0: + out_fmt = 'i'; /* Intel hex */ + break; + case 1: + out_fmt = 's'; /* Motorola S19 */ + break; + case 2: + out_fmt = 't'; /* Elf */ + break; + default: + out_fmt = 'i'; + } + + /* first we need to create the .lnk file */ + SNPRINTF (linkerScriptFileName, sizeof(linkerScriptFileName), + "%s.lnk", dstFileName); + if (!(lnkfile = fopen (linkerScriptFileName, "w"))) + { + werror (E_FILE_OPEN_ERR, linkerScriptFileName); + exit (EXIT_FAILURE); + } + + if (TARGET_Z80_LIKE) + { + fprintf (lnkfile, "--\n-m\n-j\n-x\n-%c %s\n", + out_fmt, dstFileName); + } + else /*For all the other ports. Including pics???*/ + { + fprintf (lnkfile, "-myux%c\n", out_fmt); + if(!options.no_pack_iram) + fprintf (lnkfile, "-Y\n"); + } + + if (!(TARGET_Z80_LIKE)) /*Not for the z80, gbz80*/ + { + /* if iram size specified */ + if (options.iram_size) + fprintf (lnkfile, "-a 0x%04x\n", options.iram_size); + + /* if stack size specified*/ + if(options.stack_size) + fprintf (lnkfile, "-A 0x%02x\n", options.stack_size); + + /* if xram size specified */ + if (options.xram_size_set) + fprintf (lnkfile, "-v 0x%04x\n", options.xram_size); + + /* if code size specified */ + if (options.code_size) + fprintf (lnkfile, "-w 0x%04x\n", options.code_size); + } + + if (options.debug) + fprintf (lnkfile, "-z\n"); + +#define WRITE_SEG_LOC(N, L) \ + if (N) \ + { \ + segName = Safe_strdup(N); \ + c = strtok(segName, " \t"); \ + fprintf (lnkfile,"-b %s = 0x%04x\n", c, L); \ + if (segName) { Safe_free(segName); } \ + } + + if (!(TARGET_Z80_LIKE)) /*Not for the z80, gbz80*/ + { + + /* code segment start */ + WRITE_SEG_LOC (HOME_NAME, options.code_loc); + + /* data segment start. If zero, the linker chooses + the best place for data */ + if (options.data_loc) + { + WRITE_SEG_LOC (DATA_NAME, options.data_loc); + } + + /* xdata segment start. If zero, the linker chooses + the best place for xdata */ + if (options.xdata_loc) + { + WRITE_SEG_LOC (XDATA_NAME, options.xdata_loc); + } + + /* pdata/xstack segment start. If zero, the linker + chooses the best place for them */ + if (options.xstack_loc) + { + WRITE_SEG_LOC (PDATA_NAME, options.xstack_loc); + } + + /* indirect data */ + if (IDATA_NAME) + { + WRITE_SEG_LOC (IDATA_NAME, options.idata_loc); + } + + /* bit segment start */ + WRITE_SEG_LOC (BIT_NAME, 0); + + /* stack start */ + if ( (options.stack_loc) && (options.stack_loc<0x100) && + !TARGET_IS_HC08) + { + WRITE_SEG_LOC ("SSEG", options.stack_loc); + } + } + else /*For the z80, gbz80*/ + { + WRITE_SEG_LOC ("_CODE", options.code_loc); + WRITE_SEG_LOC ("_DATA", options.data_loc); + } + + /* If the port has any special linker area declarations, get 'em */ + if (port->extraAreas.genExtraAreaLinkOptions) + { + port->extraAreas.genExtraAreaLinkOptions(lnkfile); + } + + /* add the extra linker options */ + fputStrSet(lnkfile, linkOptionsSet); + + /* command line defined library paths if specified */ + for (s = setFirstItem(libPathsSet); s != NULL; s = setNextItem(libPathsSet)) + fprintf (lnkfile, "-k %s\n", s); + + /* standard library path */ + if (!options.nostdlib) + { + if (!(TARGET_Z80_LIKE || TARGET_IS_HC08)) /*Not for the z80, gbz80*/ + { + switch (options.model) + { + case MODEL_SMALL: + if (options.stackAuto) + c = "small-stack-auto"; + else + c = "small"; + break; + case MODEL_MEDIUM: + if (options.stackAuto) + c = "medium-stack-auto"; + else + c = "medium"; + break; + case MODEL_LARGE: + if (options.stackAuto) + c = "large-stack-auto"; + else + c = "large"; + break; + case MODEL_FLAT24: + /* c = "flat24"; */ + if (TARGET_IS_DS390) + { + c = "ds390"; + } + else if (TARGET_IS_DS400) + { + c = "ds400"; + } + else + { + fprintf(stderr, + "Add support for your FLAT24 target in %s @ line %d\n", + __FILE__, __LINE__); + exit (EXIT_FAILURE); + } + break; + case MODEL_PAGE0: + c = "xa51"; + break; + default: + werror (W_UNKNOWN_MODEL, __FILE__, __LINE__); + c = "unknown"; + break; + } + } + else /*for the z80, gbz80*/ + { + if (TARGET_IS_HC08) + c = "hc08"; + else if (TARGET_IS_Z80) + c = "z80"; + else + c = "gbz80"; + } + for (s = setFirstItem(libDirsSet); s != NULL; s = setNextItem(libDirsSet)) + mfprintf (lnkfile, getRuntimeVariables(), "-k %s{sep}%s\n", s, c); + } + + /* command line defined library files if specified */ + for (s = setFirstItem(libFilesSet); s != NULL; s = setNextItem(libFilesSet)) + fprintf (lnkfile, "-l %s\n", s); + + /* standard library files */ + if (!options.nostdlib) + { +#if !OPT_DISABLE_DS390 + if (options.model == MODEL_FLAT24) + { + if (TARGET_IS_DS390) + { + fprintf (lnkfile, "-l %s\n", STD_DS390_LIB); + } + else if (TARGET_IS_DS400) + { + fprintf (lnkfile, "-l %s\n", STD_DS400_LIB); + } + else + { + fprintf(stderr, + "Add support for your FLAT24 target in %s @ line %d\n", + __FILE__, __LINE__); + exit (EXIT_FAILURE); + } + } +#endif + +#if !OPT_DISABLE_XA51 +#ifdef STD_XA51_LIB + if (options.model == MODEL_PAGE0) + { + fprintf (lnkfile, "-l %s\n", STD_XA51_LIB); + } +#endif +#endif + if (TARGET_IS_MCS51) + { + fprintf (lnkfile, "-l mcs51\n"); + } + if (!(TARGET_Z80_LIKE || TARGET_IS_HC08)) /*Not for the z80, gbz80*/ + { /*Why the z80 port is not using the standard libraries?*/ + fprintf (lnkfile, "-l %s\n", STD_LIB); + fprintf (lnkfile, "-l %s\n", STD_INT_LIB); + fprintf (lnkfile, "-l %s\n", STD_LONG_LIB); + fprintf (lnkfile, "-l %s\n", STD_FP_LIB); + } + else if (TARGET_IS_HC08) + { + fprintf (lnkfile, "-l hc08\n"); + } + else if (TARGET_IS_Z80) + { + fprintf (lnkfile, "-l z80\n"); + } + else if (TARGET_IS_GBZ80) + { + fprintf (lnkfile, "-l gbz80\n"); + } + } + + /*For the z80 and gbz80 ports, try to find where crt0.o is... + It is very important for this file to be first on the linking proccess + so the areas are set in the correct order, expecially _GSINIT*/ + if ((TARGET_Z80_LIKE) && !options.no_std_crt0) /*For the z80, gbz80*/ + { + char crt0path[PATH_MAX]; + FILE * crt0fp; + set *tempSet=NULL; + + tempSet = appendStrSet(libDirsSet, NULL, DIR_SEPARATOR_STRING); + tempSet = appendStrSet(tempSet, NULL, c); + mergeSets(&tempSet, libPathsSet); + + for (s = setFirstItem(tempSet); s != NULL; s = setNextItem(tempSet)) + { + sprintf (crt0path, "%s%scrt0.o", + s, DIR_SEPARATOR_STRING); + + crt0fp=fopen(crt0path, "r"); + if(crt0fp!=NULL)/*Found it!*/ + { + fclose(crt0fp); + #ifdef __CYGWIN__ + { + /*The CYGWIN version of the z80-gbz80 linker is getting confused with + windows paths, so convert them to the CYGWIN format*/ + char posix_path[PATH_MAX]; + void cygwin_conv_to_full_posix_path(char * win_path, char * posix_path); + cygwin_conv_to_full_posix_path(crt0path, posix_path); + strcpy(crt0path, posix_path); + } + #endif + fprintf (lnkfile, "%s\n", crt0path); + break; + } + } + if(s==NULL) fprintf (stderr, "Warning: couldn't find crt0.o\n"); + } + + /* put in the object files */ + if (fullSrcFileName) + fprintf (lnkfile, "%s%s\n", dstFileName, port->linker.rel_ext); + + fputStrSet(lnkfile, relFilesSet); + + fprintf (lnkfile, "\n-e\n"); + fclose (lnkfile); + } /* if(port->linker.needLinkerScript) */ + + if (options.verbose) + printf ("sdcc: Calling linker...\n"); + + /* build linker output filename */ + + /* -o option overrides default name? */ + if (fullDstFileName) + { + strncpyz (scratchFileName, fullDstFileName, sizeof(scratchFileName)); + } + else + { + /* the linked file gets the name of the first modul */ + if (fullSrcFileName) + { + strncpyz (scratchFileName, dstFileName, sizeof(scratchFileName)); + } + else + { + s = peekSet(relFilesSet); + + assert(s); + + strncpyz (scratchFileName, s, sizeof(scratchFileName)); + /* strip ".rel" extension */ + *strrchr (scratchFileName, '.') = '\0'; + } + strncatz (scratchFileName, + options.out_fmt ? ".S19" : ".ihx", + sizeof(scratchFileName)); + } + + if (port->linker.cmd) + { + char buffer2[PATH_MAX]; + char buffer3[PATH_MAX]; + set *tempSet=NULL, *libSet=NULL; + + strcpy(buffer3, linkerScriptFileName); + if(/*TARGET_IS_PIC16 ||*/ TARGET_IS_PIC) { + + /* use $l to set the linker include directories */ + tempSet = appendStrSet(libDirsSet, "-I\"", "\""); + mergeSets(&linkOptionsSet, tempSet); + + tempSet = appendStrSet(libPathsSet, "-I\"", "\""); + mergeSets(&linkOptionsSet, tempSet); + + /* use $3 for libraries from command line --> libSet */ + mergeSets(&libSet, libFilesSet); + + tempSet = appendStrSet(relFilesSet, "", ""); + mergeSets(&libSet, tempSet); +// libSet = reverseSet(libSet); + + if(fullSrcFileName) { +// strcpy(buffer3, strrchr(fullSrcFileName, DIR_SEPARATOR_CHAR)+1); + /* if it didn't work, revert to old behaviour */ + if(!strlen(buffer3))strcpy(buffer3, dstFileName); + strcat(buffer3, port->linker.rel_ext); + + } else strcpy(buffer3, ""); + } + + buildCmdLine (buffer2, port->linker.cmd, buffer3, scratchFileName, (libSet?joinStrSet(libSet):NULL), linkOptionsSet); + + buildCmdLine2 (buffer, sizeof(buffer), buffer2); + } + else + { + buildCmdLine2 (buffer, sizeof(buffer), port->linker.mcmd); + } + + /* if (options.verbose)fprintf(stderr, "linker command line: %s\n", buffer); */ + + system_ret = my_system (buffer); + + /* TODO: most linker don't have a -o parameter */ + /* -o option overrides default name? */ + if (fullDstFileName) + { + char *p, *q; + /* the linked file gets the name of the first modul */ + if (fullSrcFileName) + { + strncpyz (scratchFileName, dstFileName, sizeof(scratchFileName)); + p = strlen (scratchFileName) + scratchFileName; + } + else + { + s = peekSet(relFilesSet); + + assert(s); + + strncpyz (scratchFileName, s, sizeof(scratchFileName)); + /* strip ".rel" extension */ + p = strrchr (scratchFileName, '.'); + if (p) + { + *p = 0; + } + } + strncatz (scratchFileName, + options.out_fmt ? ".S19" : ".ihx", + sizeof(scratchFileName)); + if (FILENAME_CMP (fullDstFileName, scratchFileName)) + remove (fullDstFileName); + rename (scratchFileName, fullDstFileName); + + strncpyz (buffer, fullDstFileName, sizeof(buffer)); + q = strrchr (buffer, '.'); + if (!q) + { + /* no extension: append new extensions */ + q = strlen (buffer) + buffer; + } + + *p = 0; + strncatz (scratchFileName, ".map", sizeof(scratchFileName)); + *q = 0; + strncatz(buffer, ".map", sizeof(buffer)); + if (FILENAME_CMP (scratchFileName, buffer)) + remove (buffer); + rename (scratchFileName, buffer); + *p = 0; + strncatz (scratchFileName, ".mem", sizeof(scratchFileName)); + *q = 0; + strncatz(buffer, ".mem", sizeof(buffer)); + if (FILENAME_CMP (scratchFileName, buffer)) + remove (buffer); + rename (scratchFileName, buffer); + if (options.debug) + { + *p = 0; + strncatz (scratchFileName, ".cdb", sizeof(scratchFileName)); + *q = 0; + strncatz(buffer, ".cdb", sizeof(buffer)); + if (FILENAME_CMP (scratchFileName, buffer)) + remove (buffer); + rename (scratchFileName, buffer); + /* and the OMF file without extension: */ + *p = 0; + *q = 0; + if (FILENAME_CMP (scratchFileName, buffer)) + remove (buffer); + rename (scratchFileName, buffer); + } + } + if (system_ret) + { + exit (EXIT_FAILURE); + } +} + +/*-----------------------------------------------------------------*/ +/* assemble - spawns the assembler with arguments */ +/*-----------------------------------------------------------------*/ +static void +assemble (char **envp) +{ + /* build assembler output filename */ + + /* -o option overrides default name? */ + if (options.cc_only && fullDstFileName) { + strncpyz (scratchFileName, fullDstFileName, sizeof(scratchFileName)); + } else { + /* the assembled file gets the name of the first modul */ + strncpyz (scratchFileName, dstFileName, sizeof(scratchFileName)); + strncatz (scratchFileName, port->linker.rel_ext, + sizeof(scratchFileName)); + } + + if (port->assembler.do_assemble) { + port->assembler.do_assemble(asmOptionsSet); + return ; + } else if (port->assembler.cmd) { + buildCmdLine (buffer, port->assembler.cmd, dstFileName, scratchFileName, + options.debug ? port->assembler.debug_opts : port->assembler.plain_opts, + asmOptionsSet); + } else { + buildCmdLine2 (buffer, sizeof(buffer), port->assembler.mcmd); + } + + if (my_system (buffer)) { + /* either system() or the assembler itself has reported an error + perror ("Cannot exec assembler"); + */ + exit (EXIT_FAILURE); + } + /* TODO: most assembler don't have a -o parameter */ + /* -o option overrides default name? */ + if (options.cc_only && fullDstFileName) { + strncpyz (scratchFileName, dstFileName, sizeof(scratchFileName)); + strncatz (scratchFileName, + port->linker.rel_ext, + sizeof(scratchFileName)); + if (strcmp (scratchFileName, fullDstFileName)) + remove (fullDstFileName); + rename (scratchFileName, fullDstFileName); + } +} + +/*-----------------------------------------------------------------*/ +/* preProcess - spawns the preprocessor with arguments */ +/*-----------------------------------------------------------------*/ +static int +preProcess (char **envp) +{ + if (options.c1mode) + { + yyin = stdin; + } + else + { + const char *s; + set *inclList = NULL; + + if (NULL != port->linker.rel_ext) + { +#define OBJ_EXT_STR "-obj-ext=" +#define OBJ_EXT_LEN ((sizeof OBJ_EXT_STR) - 1) + char *buf = Safe_alloc(strlen(port->linker.rel_ext) + (OBJ_EXT_LEN + 1)); + strcpy(buf, OBJ_EXT_STR); + strcpy(&buf[OBJ_EXT_LEN], port->linker.rel_ext); + addSet(&preArgvSet, buf); + } + + /* if using dollar signs in identifiers */ + if (options.dollars_in_ident) + addSet(&preArgvSet, Safe_strdup("-fdollars-in-identifiers")); + + /* if using external stack define the macro */ + if (options.useXstack) + addSet(&preArgvSet, Safe_strdup("-DSDCC_USE_XSTACK")); + + /* set the macro for stack autos */ + if (options.stackAuto) + addSet(&preArgvSet, Safe_strdup("-DSDCC_STACK_AUTO")); + + /* set the macro for stack autos */ + if (options.stack10bit) + addSet(&preArgvSet, Safe_strdup("-DSDCC_STACK_TENBIT")); + + /* set the macro for no overlay */ + if (options.noOverlay) + addSet(&preArgvSet, Safe_strdup("-DSDCC_NOOVERLAY")); + + /* set the macro for large model */ + switch (options.model) + { + case MODEL_LARGE: + addSet(&preArgvSet, Safe_strdup("-DSDCC_MODEL_LARGE")); + break; + case MODEL_SMALL: + addSet(&preArgvSet, Safe_strdup("-DSDCC_MODEL_SMALL")); + break; + case MODEL_COMPACT: + addSet(&preArgvSet, Safe_strdup("-DSDCC_MODEL_COMPACT")); + break; + case MODEL_MEDIUM: + addSet(&preArgvSet, Safe_strdup("-DSDCC_MODEL_MEDIUM")); + break; + case MODEL_FLAT24: + addSet(&preArgvSet, Safe_strdup("-DSDCC_MODEL_FLAT24")); + break; + case MODEL_PAGE0: + addSet(&preArgvSet, Safe_strdup("-DSDCC_MODEL_PAGE0")); + break; + default: + werror (W_UNKNOWN_MODEL, __FILE__, __LINE__); + break; + } + + /* set macro corresponding to compiler option */ + if (options.intlong_rent) + addSet(&preArgvSet, Safe_strdup("-DSDCC_INT_LONG_REENT")); + + /* set macro corresponding to compiler option */ + if (options.float_rent) + addSet(&preArgvSet, Safe_strdup("-DSDCC_FLOAT_REENT")); + + /* add SDCC version number */ + { + char buf[20]; + SNPRINTF(buf, sizeof(buf), "-DSDCC=%d%d%d", + SDCC_VERSION_HI, SDCC_VERSION_LO, SDCC_VERSION_P); + addSet(&preArgvSet, Safe_strdup(buf)); + } + + /* add SDCC revision number */ + { + char buf[25]; + SNPRINTF(buf, sizeof(buf), "-DSDCC_REVISION=%s", getBuildNumber()); + addSet(&preArgvSet, Safe_strdup(buf)); + } + + /* add port (processor information to processor */ + addSet(&preArgvSet, Safe_strdup("-DSDCC_{port}")); + addSet(&preArgvSet, Safe_strdup("-D__{port}")); + + if (port && port->processor && TARGET_IS_PIC) { + char proc[512]; + SNPRINTF(&proc[0], 512, "-DSDCC_PROCESSOR=\"%s\"", port->processor); + addSet(&preArgvSet, Safe_strdup(proc)); + } + + /* standard include path */ + if (!options.nostdinc) { + inclList = appendStrSet(includeDirsSet, "-isystem \"", "\""); + mergeSets(&preArgvSet, inclList); + } + + setMainValue("cppextraopts", (s = joinStrSet(preArgvSet))); + Safe_free((void *)s); + if (inclList != NULL) + deleteSet(&inclList); + + if (preProcOnly && fullDstFileName) + { + /* -E and -o given */ + setMainValue ("cppoutfilename", fullDstFileName); + } + else + { + /* Piping: set cppoutfilename to NULL, to avoid empty quotes */ + setMainValue ("cppoutfilename", NULL); + } + + if (options.verbose) + printf ("sdcc: Calling preprocessor...\n"); + buildCmdLine2 (buffer, sizeof(buffer), _preCmd); + + if (preProcOnly) { + if (my_system (buffer)) { + exit (EXIT_FAILURE); + } + + exit (EXIT_SUCCESS); + } + + yyin = my_popen (buffer); + if (yyin == NULL) { + perror ("Preproc file not found"); + exit (EXIT_FAILURE); + } + } + + return 0; +} + +/* Set bin paths */ +static void +setBinPaths (const char *argv0) +{ + const char *p; + char buf[PATH_MAX]; + + /* + * Search logic: + * + * 1. - $SDCCDIR/PREFIX2BIN_DIR + * 2. - path(argv[0]) + * 3. - $PATH + */ + + /* do it in reverse mode, so that addSetHead() can be used + instead of slower addSet() */ + + if ((p = getBinPath (argv0)) != NULL) + addSetHead (&binPathSet, (void *)p); + + if ((p = getenv (SDCC_DIR_NAME)) != NULL) { + SNPRINTF (buf, sizeof buf, "%s" PREFIX2BIN_DIR, p); + addSetHead (&binPathSet, Safe_strdup (buf)); + } +} + +/* Set system include path */ +static void +setIncludePath (void) +{ + char *p; + char *p2 = NULL; + set *tempSet = NULL; + + /* + * Search logic: + * + * 1. - $SDCC_INCLUDE/target + * 2. - $SDCC_HOME/PREFIX2DATA_DIR/INCLUDE_DIR_SUFFIX/target + * 3. - path(argv[0])/BIN2DATA_DIR/INCLUDE_DIR_SUFFIX/target + * 4. - DATADIR/INCLUDE_DIR_SUFFIX/target (only on *nix) + * 5. - $SDCC_INCLUDE + * 6. - $SDCC_HOME/PREFIX2DATA_DIR/INCLUDE_DIR_SUFFIX + * 7. - path(argv[0])/BIN2DATA_DIR/INCLUDE_DIR_SUFFIX + * 8. - DATADIR/INCLUDE_DIR_SUFFIX (only on *nix) + */ + + if (options.nostdinc) + return; + + tempSet = appendStrSet (dataDirsSet, NULL, INCLUDE_DIR_SUFFIX); + includeDirsSet = appendStrSet (tempSet, NULL, DIR_SEPARATOR_STRING); + includeDirsSet = appendStrSet (includeDirsSet, NULL, port->target); + mergeSets (&includeDirsSet, tempSet); + + if ((p = getenv (SDCC_INCLUDE_NAME)) != NULL) + { + addSetHead(&includeDirsSet, p); + p2=Safe_alloc(strlen(p)+strlen(DIR_SEPARATOR_STRING)+strlen(port->target)+1); + if (p2 != NULL) + { + strcpy (p2, p); + strcat (p2, DIR_SEPARATOR_STRING); + strcat (p2, port->target); + addSetHead (&includeDirsSet, p2); + } + } +} + +/* Set system lib path */ +static void +setLibPath (void) +{ + char *p; + + /* + * Search logic: + * + * 1. - $SDCC_LIB + * 2. - $SDCC_HOME/PREFIX2DATA_DIR/LIB_DIR_SUFFIX/ + * 3. - path(argv[0])/BIN2DATA_DIR/LIB_DIR_SUFFIX/ + * 4. - DATADIR/LIB_DIR_SUFFIX/ (only on *nix) + */ + + if (options.nostdlib) + return; + + libDirsSet = appendStrSet (dataDirsSet, NULL, LIB_DIR_SUFFIX); + + if ((p = getenv (SDCC_LIB_NAME)) != NULL) + addSetHead (&libDirsSet, p); +} + +/* Set data path */ +static void +setDataPaths (const char *argv0) +{ + const char *p; + char buf[PATH_MAX]; + + /* + * Search logic: + * + * 1. - $SDCC_HOME/PREFIX2DATA_DIR + * 2. - path(argv[0])/BIN2DATA_DIR + * 3. - DATADIR (only on *nix) + */ + + if ((p = getenv (SDCC_DIR_NAME)) != NULL) { + SNPRINTF (buf, sizeof buf, "%s" PREFIX2DATA_DIR, p); + addSet (&dataDirsSet, Safe_strdup (buf)); + } + + if ((p = getBinPath (argv0)) != NULL) { + SNPRINTF (buf, sizeof buf, "%s" BIN2DATA_DIR, p); + Safe_free ((void *)p); + addSet (&dataDirsSet, Safe_strdup(buf)); + } + +#ifdef _WIN32 + if (peekSet (dataDirsSet) == NULL) { + /* this should never happen... */ + wassertl (0, "Can't get binary path"); + } +#else + addSet (&dataDirsSet, Safe_strdup (DATADIR)); +#endif + + setIncludePath (); + setLibPath (); +} + +static void +initValues (void) +{ + populateMainValues (_baseValues); + setMainValue ("port", port->target); + setMainValue ("objext", port->linker.rel_ext); + setMainValue ("asmext", port->assembler.file_ext); + + setMainValue ("dstfilename", dstFileName); + setMainValue ("fullsrcfilename", fullSrcFileName ? fullSrcFileName : "fullsrcfilename"); + + if (options.cc_only && fullDstFileName) + /* compile + assemble and -o given: -o specifies name of object file */ + { + setMainValue ("objdstfilename", fullDstFileName); + } + else + { + setMainValue ("objdstfilename", "{stdobjdstfilename}"); + } + if (fullDstFileName) + /* if we're linking, -o gives the final file name */ + { + setMainValue ("linkdstfilename", fullDstFileName); + } + else + { + setMainValue ("linkdstfilename", "{stdlinkdstfilename}"); + } + + /* + * Make sure the preprocessor is called with the "-std" option + * corresponding to the --std used to start sdcc + */ + if (options.std_c99) + { + if (!options.std_sdcc) + setMainValue ("cppstd", "-std=c99 "); + } + else + { + if (!options.std_sdcc) + setMainValue ("cppstd", "-std=c89 "); + } +} + +static void doPrintSearchDirs(void) +{ + printf("programs:\n"); + fputStrSet(stdout, binPathSet); + + printf("datadir:\n"); + fputStrSet(stdout, dataDirsSet); + + printf("includedir:\n"); + fputStrSet(stdout, includeDirsSet); + + printf("libdir:\n"); + fputStrSet(stdout, libDirsSet); + fputStrSet(stdout, libPathsSet); +} + + +static void +sig_handler (int signal) +{ + char *sig_string; + + switch (signal) + { + case SIGABRT: + sig_string = "SIGABRT"; + break; + case SIGTERM: + sig_string = "SIGTERM"; + break; + case SIGINT: + sig_string = "SIGINT"; + break; + case SIGSEGV: + sig_string = "SIGSEGV"; + break; + default: + sig_string = "Unknown?"; + break; + } + fprintf (stderr, "Caught signal %d: %s\n", signal, sig_string); + exit (EXIT_FAILURE); +} + +/* + * main routine + * initialises and calls the parser + */ + +int +main (int argc, char **argv, char **envp) +{ + /* turn all optimizations off by default */ + memset (&optimize, 0, sizeof (struct optimize)); + + if (NUM_PORTS == 0) + { + fprintf (stderr, "Build error: no ports are enabled.\n"); + exit (EXIT_FAILURE); + } + + /* install signal handler; + it's only purpose is to call exit() to remove temp files */ + if (!getenv ("SDCC_LEAVE_SIGNALS")) + { + signal (SIGABRT, sig_handler); + signal (SIGTERM, sig_handler); + signal (SIGINT, sig_handler); + signal (SIGSEGV, sig_handler); + } + + /* Before parsing the command line options, do a + * search for the port and processor and initialize + * them if they're found. (We can't gurantee that these + * will be the first options specified). + */ + + _findPort (argc, argv); + +#ifdef JAMIN_DS390 + if (strcmp (port->target, "mcs51") == 0) { + printf ("DS390 jammed in A\n"); + _setPort ("ds390"); + ds390_jammed = 1; + } +#endif + + _findProcessor (argc, argv); + + /* Initalise the port. */ + if (port->init) + port->init (); + + setDefaultOptions (); +#ifdef JAMIN_DS390 + if (ds390_jammed) { + options.model = MODEL_SMALL; + options.stack10bit=0; + } +#endif + + parseCmdLine (argc, argv); + + if (options.verbose && NULL != port->processor) + printf("Processor: %s\n", port->processor); + + initValues (); + + setBinPaths (argv[0]); + setDataPaths (argv[0]); + + if (port->initPaths) + port->initPaths(); + + if (options.printSearchDirs) + doPrintSearchDirs(); + + /* if no input then printUsage & exit */ + if (!options.c1mode && !fullSrcFileName && peekSet(relFilesSet) == NULL) + { + if (options.printSearchDirs) + exit (EXIT_SUCCESS); + printUsage(); + exit (EXIT_FAILURE); + } + + /* initMem() is expensive, but + initMem() must called before port->finaliseOptions (). + And the z80 port needs port->finaliseOptions(), + even if we're only linking. */ + initMem (); + + /* finalize target specific options */ + port->finaliseOptions (); + + /* finalize common options */ + finalizeOptions (); + + if (fullSrcFileName || options.c1mode) + { + preProcess (envp); + + initSymt (); + initiCode (); + initCSupport (); + initBuiltIns(); + initPeepHole (); + + if (options.verbose) + printf ("sdcc: Generating code...\n"); + + yyparse (); + + if (!options.c1mode) + if (pclose(yyin)) + fatalError = 1; + + if (fatalError) + exit (EXIT_FAILURE); + + if (port->general.do_glue != NULL) + (*port->general.do_glue) (); + else + { + /* this shouldn't happen */ + assert (FALSE); + /* in case of NDEBUG */ + glue (); + } + + if (fatalError) + exit (EXIT_FAILURE); + + if (!options.c1mode && !noAssemble) + { + if (options.verbose) + printf ("sdcc: Calling assembler...\n"); + assemble (envp); + } + } + closeDumpFiles(); + + if (options.debug && debugFile) + debugFile->closeFile (); + + if (!options.cc_only && + !fatalError && + !noAssemble && + !options.c1mode && + (fullSrcFileName || peekSet (relFilesSet) != NULL)) + { + if (options.verbose) + printf ("sdcc: Calling linker...\n"); + + if (port->linker.do_link) + port->linker.do_link (); + else + linkEdit (envp); + } + + return 0; +} diff --git a/src/SDCCmem.c b/src/SDCCmem.c new file mode 100644 index 0000000..5bc6bb9 --- /dev/null +++ b/src/SDCCmem.c @@ -0,0 +1,1219 @@ +/*-----------------------------------------------------------------*/ +/* SDCCmem.c - 8051 memory management routines */ +/*-----------------------------------------------------------------*/ + +#include "common.h" +#include "dbuf_string.h" + +/* memory segments */ +memmap *xstack = NULL; /* xternal stack data */ +memmap *istack = NULL; /* internal stack */ +memmap *code = NULL; /* code segment */ +memmap *data = NULL; /* internal data upto 128 */ +memmap *pdata = NULL; /* paged external data */ +memmap *xdata = NULL; /* external data */ +memmap *xidata = NULL; /* the initialized xdata */ +memmap *xinit = NULL; /* the initializers for xidata */ +memmap *idata = NULL; /* internal data upto 256 */ +memmap *bit = NULL; /* bit addressable space */ +memmap *statsg = NULL; /* the constant data segment */ +memmap *c_abs = NULL; /* constant absolute data */ +memmap *x_abs = NULL; /* absolute xdata/pdata */ +memmap *i_abs = NULL; /* absolute idata upto 256 */ +memmap *d_abs = NULL; /* absolute data upto 128 */ +memmap *sfr = NULL; /* register space */ +memmap *reg = NULL; /* register space */ +memmap *sfrbit = NULL; /* sfr bit space */ +memmap *generic = NULL; /* is a generic pointer */ +memmap *overlay = NULL; /* overlay segment */ +memmap *eeprom = NULL; /* eeprom location */ +memmap *home = NULL; /* Unswitchable code bank */ + +/* this is a set of sets each set containing + symbols in a single overlay */ +set *ovrSetSets = NULL; + +int fatalError = 0; /* fatal error flag */ + +/*-----------------------------------------------------------------*/ +/* allocMap - allocates a memory map */ +/*-----------------------------------------------------------------*/ +memmap * +allocMap (char rspace, /* sfr space */ + char farmap, /* far or near segment */ + char paged, /* can this segment be paged */ + char direct, /* directly addressable */ + char bitaddr, /* bit addressable space */ + char codemap, /* this is code space */ + unsigned sloc, /* starting location */ + const char *name, /* 2 character name */ + char dbName, /* debug name */ + int ptrType /* pointer type for this space */ +) +{ + memmap *map; + + if (!(map = Safe_alloc (sizeof (memmap)))) + { + werror (E_OUT_OF_MEM, __FILE__, sizeof (memmap)); + exit (1); + } + + memset (map, ZERO, sizeof (memmap)); + map->regsp = rspace; + map->fmap = farmap; + map->paged = paged; + map->direct = direct; + map->bitsp = bitaddr; + map->codesp = codemap; + map->sloc = sloc; + map->sname = name; + map->dbName = dbName; + map->ptrType = ptrType; + map->syms = NULL; + + dbuf_init(&map->oBuf, 4096); + + return map; +} + +/*-----------------------------------------------------------------*/ +/* initMem - allocates and initializes all the segments */ +/*-----------------------------------------------------------------*/ +void +initMem () +{ + /* allocate all the segments */ + /* xternal stack segment ; + SFRSPACE - NO + FAR-SPACE - YES + PAGED - YES + DIRECT-ACCESS - NO + BIT-ACCESS - NO + CODE-ACCESS - NO + DEBUG-NAME - 'A' + POINTER-TYPE - FPOINTER + */ + xstack = allocMap (0, 1, 1, 0, 0, 0, options.xstack_loc, XSTACK_NAME, 'A', PPOINTER); + + /* internal stack segment ; + SFRSPACE - NO + FAR-SPACE - NO + PAGED - NO + DIRECT-ACCESS - NO + BIT-ACCESS - NO + CODE-ACCESS - NO + DEBUG-NAME - 'B' + POINTER-TYPE - POINTER + */ + if (ISTACK_NAME) + { + istack = allocMap (0, 0, 0, 0, 0, 0, options.stack_loc, ISTACK_NAME, 'B', POINTER); + } + else + { + istack = NULL; + } + + /* code segment ; + SFRSPACE - NO + FAR-SPACE - YES + PAGED - NO + DIRECT-ACCESS - NO + BIT-ACCESS - NO + CODE-ACCESS - YES + DEBUG-NAME - 'C' + POINTER-TYPE - CPOINTER + */ + code = allocMap (0, 1, 0, 0, 0, 1, options.code_loc, CODE_NAME, 'C', CPOINTER); + + /* home segment ; + SFRSPACE - NO + FAR-SPACE - YES + PAGED - NO + DIRECT-ACCESS - NO + BIT-ACCESS - NO + CODE-ACCESS - YES + DEBUG-NAME - 'C' + POINTER-TYPE - CPOINTER + */ + home = allocMap (0, 1, 0, 0, 0, 1, options.code_loc, HOME_NAME, 'C', CPOINTER); + + /* Static segment (code for variables ); + SFRSPACE - NO + FAR-SPACE - YES + PAGED - NO + DIRECT-ACCESS - NO + BIT-ACCESS - NO + CODE-ACCESS - YES + DEBUG-NAME - 'D' + POINTER-TYPE - CPOINTER + */ + statsg = allocMap (0, 1, 0, 0, 0, 1, 0, STATIC_NAME, 'D', CPOINTER); + + /* Constant Absolute Data segment (for variables ); + SFRSPACE - NO + FAR-SPACE - YES + PAGED - NO + DIRECT-ACCESS - NO + BIT-ACCESS - NO + CODE-ACCESS - YES + DEBUG-NAME - 'D' + POINTER-TYPE - CPOINTER + */ + c_abs = allocMap (0, 1, 0, 0, 0, 1, 0, CABS_NAME, 'D', CPOINTER); + + /* Data segment - internal storage segment ; + SFRSPACE - NO + FAR-SPACE - NO + PAGED - NO + DIRECT-ACCESS - YES + BIT-ACCESS - NO + CODE-ACCESS - NO + DEBUG-NAME - 'E' + POINTER-TYPE - POINTER + */ + data = allocMap (0, 0, 0, 1, 0, 0, options.data_loc, DATA_NAME, 'E', POINTER); + + /* Absolute internal storage segment ; + SFRSPACE - NO + FAR-SPACE - NO + PAGED - NO + DIRECT-ACCESS - YES + BIT-ACCESS - NO + CODE-ACCESS - NO + DEBUG-NAME - 'E' + POINTER-TYPE - POINTER + */ + if (IABS_NAME) + { + d_abs = allocMap (0, 0, 0, 1, 0, 0, options.data_loc, IABS_NAME, 'E', POINTER); + } + else + { + d_abs = NULL; + } + + /* overlay segment - same as internal storage segment ; + SFRSPACE - NO + FAR-SPACE - NO + PAGED - NO + DIRECT-ACCESS - YES + BIT-ACCESS - NO + CODE-ACCESS - NO + DEBUG-NAME - 'E' + POINTER-TYPE - POINTER + */ + if (OVERLAY_NAME) + { + overlay = allocMap (0, 0, 0, 1, 0, 0, options.data_loc, DATA_NAME, 'E', POINTER); + } + else + { + overlay = NULL; + } + + /* Xternal paged segment ; + SFRSPACE - NO + FAR-SPACE - NO + PAGED - YES + DIRECT-ACCESS - NO + BIT-ACCESS - NO + CODE-ACCESS - NO + DEBUG-NAME - 'P' + POINTER-TYPE - PPOINTER + */ + if (PDATA_NAME) + { + pdata = allocMap (0, 0, 1, 0, 0, 0, options.xstack_loc, PDATA_NAME, 'P', PPOINTER); + } + else + { + pdata = NULL; + } + + /* Xternal Data segment - + SFRSPACE - NO + FAR-SPACE - YES + PAGED - NO + DIRECT-ACCESS - NO + BIT-ACCESS - NO + CODE-ACCESS - NO + DEBUG-NAME - 'F' + POINTER-TYPE - FPOINTER + */ + xdata = allocMap (0, 1, 0, 0, 0, 0, options.xdata_loc, XDATA_NAME, 'F', FPOINTER); + xidata = allocMap (0, 1, 0, 0, 0, 0, 0, XIDATA_NAME, 'F', FPOINTER); + xinit = allocMap (0, 1, 0, 0, 0, 1, 0, XINIT_NAME, 'C', CPOINTER); + + /* Absolute external storage segment ; + SFRSPACE - NO + FAR-SPACE - YES + PAGED - NO + DIRECT-ACCESS - NO + BIT-ACCESS - NO + CODE-ACCESS - NO + DEBUG-NAME - 'F' + POINTER-TYPE - FPOINTER + */ + if (XABS_NAME) + { + x_abs = allocMap (0, 1, 0, 0, 0, 0, options.xdata_loc, XABS_NAME, 'F', FPOINTER); + } + else + { + x_abs = NULL; + } + + /* Indirectly addressed internal data segment + SFRSPACE - NO + FAR-SPACE - NO + PAGED - NO + DIRECT-ACCESS - NO + BIT-ACCESS - NO + CODE-ACCESS - NO + DEBUG-NAME - 'G' + POINTER-TYPE - IPOINTER + */ + if (IDATA_NAME) + { + idata = allocMap (0, 0, 0, 0, 0, 0, options.idata_loc, IDATA_NAME, 'G', IPOINTER); + } + else + { + idata = NULL; + } + + /* Indirectly addressed absolute internal segment + SFRSPACE - NO + FAR-SPACE - NO + PAGED - NO + DIRECT-ACCESS - NO + BIT-ACCESS - NO + CODE-ACCESS - NO + DEBUG-NAME - 'E' + POINTER-TYPE - IPOINTER + */ + if (IABS_NAME) + { + i_abs = allocMap (0, 0, 0, 0, 0, 0, options.data_loc, IABS_NAME, 'E', IPOINTER); + } + else + { + i_abs = NULL; + } + + /* Bit space ; + SFRSPACE - NO + FAR-SPACE - NO + PAGED - NO + DIRECT-ACCESS - YES + BIT-ACCESS - YES + CODE-ACCESS - NO + DEBUG-NAME - 'H' + POINTER-TYPE - _NONE_ + */ + bit = allocMap (0, 0, 0, 1, 1, 0, 0, BIT_NAME, 'H', 0); + + /* Special function register space :- + SFRSPACE - YES + FAR-SPACE - NO + PAGED - NO + DIRECT-ACCESS - YES + BIT-ACCESS - NO + CODE-ACCESS - NO + DEBUG-NAME - 'I' + POINTER-TYPE - _NONE_ + */ + sfr = allocMap (1, 0, 0, 1, 0, 0, 0, REG_NAME, 'I', 0); + + /* Register space ; + SFRSPACE - YES + FAR-SPACE - NO + PAGED - NO + DIRECT-ACCESS - NO + BIT-ACCESS - NO + CODE-ACCESS - NO + DEBUG-NAME - ' ' + POINTER-TYPE - _NONE_ + */ + reg = allocMap (1, 0, 0, 0, 0, 0, 0, REG_NAME, ' ', 0); + + /* SFR bit space + SFRSPACE - YES + FAR-SPACE - NO + PAGED - NO + DIRECT-ACCESS - YES + BIT-ACCESS - YES + CODE-ACCESS - NO + DEBUG-NAME - 'J' + POINTER-TYPE - _NONE_ + */ + sfrbit = allocMap (1, 0, 0, 1, 1, 0, 0, REG_NAME, 'J', 0); + + /* EEPROM space + SFRSPACE - NO + FAR-SPACE - YES + PAGED - NO + DIRECT-ACCESS - NO + BIT-ACCESS - NO + CODE-ACCESS - NO + DEBUG-NAME - 'K' + POINTER-TYPE - EEPPOINTER + */ + eeprom = allocMap (0, 1, 0, 0, 0, 0, 0, REG_NAME, 'K', EEPPOINTER); + + /* the unknown map */ + generic = allocMap (1, 0, 0, 1, 1, 0, 0, REG_NAME, ' ', GPOINTER); + +} + +/*-----------------------------------------------------------------*/ +/* allocIntoSeg - puts a symbol into a memory segment */ +/*-----------------------------------------------------------------*/ +void +allocIntoSeg (symbol * sym) +{ + memmap *segment = SPEC_OCLS (sym->etype); + addSet (&segment->syms, sym); + if (segment == pdata) + sym->iaccess = 1; +} + +/*-----------------------------------------------------------------*/ +/* deleteFromSeg - deletes a symbol from segment used when a var */ +/* first declared as "extern" then no extern */ +/*-----------------------------------------------------------------*/ +void deleteFromSeg(symbol *sym) +{ + if (SPEC_OCLS(sym->etype)) { + memmap *segment = SPEC_OCLS (sym->etype); + deleteSetItem(&segment->syms,sym); + } +} + +/*-----------------------------------------------------------------*/ +/* allocDefault - assigns the output segment based on SCLASS */ +/*-----------------------------------------------------------------*/ +bool +allocDefault (symbol * sym) +{ + switch (SPEC_SCLS (sym->etype)) + { + case S_SFR: + SPEC_OCLS (sym->etype) = sfr; + break; + case S_SBIT: + SPEC_OCLS (sym->etype) = sfrbit; + break; + case S_CODE: + if (sym->_isparm) + return FALSE; + /* if code change to constant */ + if (sym->ival && SPEC_ABSA (sym->etype)) + { + SPEC_OCLS(sym->etype) = c_abs; + } + else + { + SPEC_OCLS (sym->etype) = statsg; + } + break; + case S_XDATA: + /* absolute initialized global */ + if (sym->ival && SPEC_ABSA (sym->etype)) + { + SPEC_OCLS(sym->etype) = x_abs; + } + /* or should we move this to the initialized data segment? */ + else if (port->genXINIT && sym->ival && (sym->level==0)) + { + SPEC_OCLS(sym->etype) = xidata; + } + else + { + SPEC_OCLS (sym->etype) = xdata; + } + break; + case S_DATA: + /* absolute initialized global */ + if (sym->ival && SPEC_ABSA (sym->etype)) + { + SPEC_OCLS(sym->etype) = d_abs; + } + else + { + SPEC_OCLS (sym->etype) = data; + } + break; + case S_IDATA: + /* absolute initialized global */ + if (sym->ival && SPEC_ABSA (sym->etype)) + { + SPEC_OCLS(sym->etype) = i_abs; + } + else + { + SPEC_OCLS (sym->etype) = idata; + } + sym->iaccess = 1; + break; + case S_PDATA: + SPEC_OCLS (sym->etype) = pdata; + sym->iaccess = 1; + break; + case S_BIT: + SPEC_OCLS (sym->etype) = bit; + break; + case S_EEPROM: + SPEC_OCLS (sym->etype) = eeprom; + break; + default: + return FALSE; + } + allocIntoSeg (sym); + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* allocGlobal - assigns the output segment to a global var */ +/*-----------------------------------------------------------------*/ +void +allocGlobal (symbol * sym) +{ + + /* symbol name is internal name */ + if (!sym->level) /* local statics can come here */ + SNPRINTF (sym->rname, sizeof(sym->rname), + "%s%s", port->fun_prefix, sym->name); + + /* add it to the operandKey reset */ + if (!isinSet (operKeyReset, sym)) { + addSet(&operKeyReset, sym); + } + + /* if this is a literal e.g. enumerated type */ + /* put it in the data segment & do nothing */ + if (IS_LITERAL (sym->etype)) + { + SPEC_OCLS (sym->etype) = data; + return; + } + + /* if this is a function then assign code space */ + if (IS_FUNC (sym->type)) + { + SPEC_OCLS (sym->etype) = code; + /* if this is an interrupt service routine + then put it in the interrupt service array */ + if (FUNC_ISISR (sym->type) && !options.noiv + && (FUNC_INTNO (sym->type) != INTNO_UNSPEC)) + { + if (interrupts[FUNC_INTNO (sym->type)]) + werror (E_INT_DEFINED, + FUNC_INTNO (sym->type), + interrupts[FUNC_INTNO (sym->type)]->name); + else + interrupts[FUNC_INTNO (sym->type)] = sym; + + /* automagically extend the maximum interrupts */ + if (FUNC_INTNO (sym->type) >= maxInterrupts) + maxInterrupts = FUNC_INTNO (sym->type) + 1; + } + /* if it is not compiler defined */ + if (!sym->cdef) + allocIntoSeg (sym); + + return; + } + + /* if this is a bit variable and no storage class */ + if (IS_SPEC(sym->type) && SPEC_NOUN (sym->type) == V_BIT) + /*&& SPEC_SCLS (sym->etype) == S_BIT*/ + { + SPEC_OCLS (sym->type) = bit; + allocIntoSeg (sym); + return; + } + + if(!TARGET_IS_PIC16 || (TARGET_IS_PIC16 && sym->level)) + /* register storage class ignored changed to FIXED */ + if (SPEC_SCLS (sym->etype) == S_REGISTER) + SPEC_SCLS (sym->etype) = S_FIXED; + + /* if it is fixed, then allocate depending on the */ + /* current memory model, same for automatics */ + if (SPEC_SCLS (sym->etype) == S_FIXED || + (TARGET_IS_PIC16 && (SPEC_SCLS (sym->etype) == S_REGISTER) && (sym->level==0)) || + SPEC_SCLS (sym->etype) == S_AUTO) { + if (port->mem.default_globl_map != xdata) { + /* set the output class */ + SPEC_OCLS (sym->etype) = port->mem.default_globl_map; + /* generate the symbol */ + allocIntoSeg (sym); + return; + } else { + SPEC_SCLS (sym->etype) = S_XDATA; + } + } + + allocDefault (sym); + return; +} + +/*-----------------------------------------------------------------*/ +/* allocParms - parameters are always passed on stack */ +/*-----------------------------------------------------------------*/ +void +allocParms (value * val) +{ + value *lval; + int pNum = 1; + + for (lval = val; lval; lval = lval->next, pNum++) + { + /* check the declaration */ + checkDecl (lval->sym, 0); + + /* if this a register parm then allocate + it as a local variable by adding it + to the first block we see in the body */ + if (IS_REGPARM (lval->etype)) + continue; + + /* mark it as my parameter */ + lval->sym->ismyparm = 1; + lval->sym->localof = currFunc; + + /* if automatic variables r 2b stacked */ + if (options.stackAuto || IFFUNC_ISREENT (currFunc->type)) + { + if (lval->sym) + lval->sym->onStack = 1; + + /* choose which stack 2 use */ + /* use xternal stack */ + if (options.useXstack) + { + /* PENDING: stack direction support */ + SPEC_OCLS (lval->etype) = SPEC_OCLS (lval->sym->etype) = xstack; + SPEC_STAK (lval->etype) = SPEC_STAK (lval->sym->etype) = lval->sym->stack = + xstackPtr - getSize (lval->type); + xstackPtr -= getSize (lval->type); + } + else + { /* use internal stack */ + SPEC_OCLS (lval->etype) = SPEC_OCLS (lval->sym->etype) = istack; + if (port->stack.direction > 0) + { + SPEC_STAK (lval->etype) = SPEC_STAK (lval->sym->etype) = lval->sym->stack = + stackPtr - (FUNC_REGBANK (currFunc->type) ? port->stack.bank_overhead : 0) - + getSize (lval->type) - + (FUNC_ISISR (currFunc->type) ? port->stack.isr_overhead : 0); + stackPtr -= getSize (lval->type); + } + else + { + /* This looks like the wrong order but it turns out OK... */ + /* PENDING: isr, bank overhead, ... */ + SPEC_STAK (lval->etype) = SPEC_STAK (lval->sym->etype) = lval->sym->stack = + stackPtr + + ((IFFUNC_ISBANKEDCALL (currFunc->type) && !SPEC_STAT(getSpec(currFunc->etype)))? port->stack.banked_overhead : 0) + + (FUNC_ISISR (currFunc->type) ? port->stack.isr_overhead : 0) + + 0; + stackPtr += getSize (lval->type); + } + } + allocIntoSeg (lval->sym); + } + else + { /* allocate them in the automatic space */ + /* generate a unique name */ + SNPRINTF (lval->sym->rname, sizeof(lval->sym->rname), + "%s%s_PARM_%d", port->fun_prefix, currFunc->name, pNum); + strncpyz (lval->name, lval->sym->rname, sizeof(lval->name)); + + /* if declared in specific storage */ + if (allocDefault (lval->sym)) + { + SPEC_OCLS (lval->etype) = SPEC_OCLS (lval->sym->etype); + continue; + } + + /* otherwise depending on the memory model */ + SPEC_OCLS (lval->etype) = SPEC_OCLS (lval->sym->etype) = + port->mem.default_local_map; + if (options.model == MODEL_SMALL) + { + /* note here that we put it into the overlay segment + first, we will remove it from the overlay segment + after the overlay determination has been done */ + if (!options.noOverlay) + { + SPEC_OCLS (lval->etype) = SPEC_OCLS (lval->sym->etype) = + overlay; + } + } + else if (options.model == MODEL_MEDIUM) + { + SPEC_SCLS (lval->etype) = S_PDATA; + } + else + { + SPEC_SCLS (lval->etype) = S_XDATA; + } + allocIntoSeg (lval->sym); + } + } + return; +} + +/*-----------------------------------------------------------------*/ +/* deallocParms - parameters are always passed on stack */ +/*-----------------------------------------------------------------*/ +void +deallocParms (value * val) +{ + value *lval; + + for (lval = val; lval; lval = lval->next) + { + /* unmark is myparm */ + lval->sym->ismyparm = 0; + + /* delete it from the symbol table */ + deleteSym (SymbolTab, lval->sym, lval->sym->name); + + if (!lval->sym->isref) + { + lval->sym->allocreq = 0; + werror (W_NO_REFERENCE, + currFunc ? currFunc->name : "(unknown)", + "function argument", lval->sym->name); + } + + /* move the rname if any to the name for both val & sym */ + /* and leave a copy of it in the symbol table */ + if (lval->sym->rname[0]) + { + char buffer[SDCC_NAME_MAX]; + symbol * argsym = lval->sym; + + strncpyz (buffer, lval->sym->rname, sizeof(buffer)); + lval->sym = copySymbol (lval->sym); + strncpyz (lval->sym->rname, buffer, sizeof(lval->sym->rname)); + + strncpyz (lval->sym->name, buffer, sizeof(lval->sym->name)); + /* need to keep the original name for inlining to work */ + /*strncpyz (lval->name, buffer, sizeof(lval->name)); */ + + addSym (SymbolTab, lval->sym, lval->sym->name, + lval->sym->level, lval->sym->block, 1); + lval->sym->_isparm = 1; + if (!isinSet (operKeyReset, lval->sym)) + { + addSet(&operKeyReset, lval->sym); + } + + /* restore the original symbol */ + lval->sym = argsym; + } + } + return; +} + +/*-----------------------------------------------------------------*/ +/* allocLocal - allocate local variables */ +/*-----------------------------------------------------------------*/ +void +allocLocal (symbol * sym) +{ + /* generate an unique name */ + SNPRINTF (sym->rname, sizeof(sym->rname), + "%s%s_%s_%d_%d", + port->fun_prefix, + currFunc->name, sym->name, sym->level, sym->block); + + sym->islocal = 1; + sym->localof = currFunc; + + /* if this is a static variable */ + if (IS_STATIC (sym->etype)) + { + allocGlobal (sym); + sym->allocreq = 1; + return; + } + + /* if volatile then */ + if (IS_VOLATILE (sym->etype)) + sym->allocreq = 1; + + /* this is automatic */ + + /* if it's to be placed on the stack */ + if (options.stackAuto || reentrant) { + sym->onStack = 1; + if (options.useXstack) { + /* PENDING: stack direction for xstack */ + SPEC_OCLS (sym->etype) = xstack; + SPEC_STAK (sym->etype) = sym->stack = (xstackPtr + 1); + xstackPtr += getSize (sym->type); + } else { + SPEC_OCLS (sym->etype) = istack; + if (port->stack.direction > 0) { + SPEC_STAK (sym->etype) = sym->stack = (stackPtr + 1); + stackPtr += getSize (sym->type); + } else { + stackPtr -= getSize (sym->type); + SPEC_STAK (sym->etype) = sym->stack = stackPtr; + } + } + allocIntoSeg (sym); + return; + } + + /* else depending on the storage class specified */ + + /* if this is a function then assign code space */ + if (IS_FUNC (sym->type)) + { + SPEC_OCLS (sym->etype) = code; + return; + } + + /* if this is a bit variable and no storage class */ + if (IS_SPEC(sym->type) && SPEC_NOUN (sym->type) == V_BIT) + { + SPEC_SCLS (sym->type) = S_BIT; + SPEC_OCLS (sym->type) = bit; + allocIntoSeg (sym); + return; + } + + if ((SPEC_SCLS (sym->etype) == S_DATA) || (SPEC_SCLS (sym->etype) == S_REGISTER)) + { + SPEC_OCLS (sym->etype) = (options.noOverlay ? data : overlay); + allocIntoSeg (sym); + return; + } + + if (allocDefault (sym)) + { + return; + } + + /* again note that we have put it into the overlay segment + will remove and put into the 'data' segment if required after + overlay analysis has been done */ + if (options.model == MODEL_SMALL) { + SPEC_OCLS (sym->etype) = + (options.noOverlay ? port->mem.default_local_map : overlay); + } else { + SPEC_OCLS (sym->etype) = port->mem.default_local_map; + } + allocIntoSeg (sym); +} + +/*-----------------------------------------------------------------*/ +/* deallocLocal - deallocates the local variables */ +/*-----------------------------------------------------------------*/ +void +deallocLocal (symbol * csym) +{ + symbol *sym; + + for (sym = csym; sym; sym = sym->next) + { + if (sym->_isparm) + continue; + + /* if it is on the stack */ + if (sym->onStack) + { + if (options.useXstack) + xstackPtr -= getSize (sym->type); + else + stackPtr -= getSize (sym->type); + } + /* if not used give a warning */ + if (!sym->isref && !IS_STATIC (sym->etype)) + werror (W_NO_REFERENCE, + currFunc ? currFunc->name : "(unknown)", + "local variable", sym->name); + /* now delete it from the symbol table */ + deleteSym (SymbolTab, sym, sym->name); + } +} + +/*-----------------------------------------------------------------*/ +/* overlay2data - moves declarations from the overlay seg to data */ +/*-----------------------------------------------------------------*/ +void +overlay2data () +{ + symbol *sym; + + for (sym = setFirstItem (overlay->syms); sym; + sym = setNextItem (overlay->syms)) + { + + SPEC_OCLS (sym->etype) = data; + allocIntoSeg (sym); + } + + setToNull ((void *) &overlay->syms); + +} + +/*-----------------------------------------------------------------*/ +/* overlay2Set - will add all symbols from the overlay segment to */ +/* the set of sets containing the overlable symbols */ +/*-----------------------------------------------------------------*/ +void +overlay2Set () +{ + symbol *sym; + set *oset = NULL; + + for (sym = setFirstItem (overlay->syms); sym; + sym = setNextItem (overlay->syms)) + { + + addSet (&oset, sym); + } + + setToNull ((void *) &overlay->syms); + addSet (&ovrSetSets, oset); + +} + +/*-----------------------------------------------------------------*/ +/* allocVariables - creates decl & assign storage class for a v */ +/*-----------------------------------------------------------------*/ +int +allocVariables (symbol * symChain) +{ + symbol *sym; + symbol *csym; + int stack = 0; + int saveLevel = 0; + + /* go thru the symbol chain */ + for (sym = symChain; sym; sym = sym->next) + { + + /* if this is a typedef then add it */ + /* to the typedef table */ + if (IS_TYPEDEF (sym->etype)) + { + /* check if the typedef already exists */ + csym = findSym (TypedefTab, NULL, sym->name); + if (csym && csym->level == sym->level) + werror (E_DUPLICATE_TYPEDEF, sym->name); + + SPEC_EXTR (sym->etype) = 0; + addSym (TypedefTab, sym, sym->name, sym->level, sym->block, 0); + continue; /* go to the next one */ + } + /* make sure it already exists */ + csym = findSymWithLevel (SymbolTab, sym); + if (!csym || (csym && csym->level != sym->level)) + csym = sym; + + /* check the declaration */ + checkDecl (csym,0); + + /* if this is a function or a pointer to a */ + /* function then do args processing */ + if (funcInChain (csym->type)) + { + processFuncArgs (csym); + } + + /* if this is a extern variable then change the */ + /* level to zero temporarily */ + if (IS_EXTERN (csym->etype) || IS_FUNC (csym->type)) + { + saveLevel = csym->level; + csym->level = 0; + } + + /* if this is a literal then it is an enumerated */ + /* type so need not allocate it space for it */ + if (IS_LITERAL (sym->etype)) + continue; + + /* generate the actual declaration */ + if (csym->level) + { + allocLocal (csym); + if (csym->onStack) + stack += getSize (csym->type); + } + else + allocGlobal (csym); + + /* restore the level */ + if (IS_EXTERN (csym->etype) || IS_FUNC (csym->type)) + csym->level = saveLevel; + } + + return stack; +} + +/*-----------------------------------------------------------------*/ +/* redoStackOffsets :- will reassign the values for stack offsets */ +/*-----------------------------------------------------------------*/ +void +redoStackOffsets (void) +{ + symbol *sym; + int sPtr = 0; + int xsPtr = -1; + + /* after register allocation is complete we know + which variables will need to be assigned space + on the stack. We will eliminate those variables + which do not have the allocReq flag thus reducing + the stack space */ + for (sym = setFirstItem (istack->syms); sym; + sym = setNextItem (istack->syms)) + { + + int size = getSize (sym->type); + /* nothing to do with parameters so continue */ + if ((sym->_isparm && !IS_REGPARM (sym->etype))) + continue; + + if (IS_AGGREGATE (sym->type)) + { + if (port->stack.direction > 0) + { + SPEC_STAK (sym->etype) = sym->stack = (sPtr + 1); + sPtr += size; + } + else + { + sPtr -= size; + SPEC_STAK (sym->etype) = sym->stack = sPtr; + } + continue; + } + + /* if allocation not required then subtract + size from overall stack size & continue */ + if (!sym->allocreq) + { + currFunc->stack -= size; + SPEC_STAK (currFunc->etype) -= size; + continue; + } + + if (port->stack.direction > 0) + { + SPEC_STAK (sym->etype) = sym->stack = (sPtr + 1); + sPtr += size; + } + else + { + sPtr -= size; + SPEC_STAK (sym->etype) = sym->stack = sPtr; + } + } + + /* do the same for the external stack */ + + for (sym = setFirstItem (xstack->syms); sym; + sym = setNextItem (xstack->syms)) + { + + int size = getSize (sym->type); + /* nothing to do with parameters so continue */ + if ((sym->_isparm && !IS_REGPARM (sym->etype))) + continue; + + if (IS_AGGREGATE (sym->type)) + { + SPEC_STAK (sym->etype) = sym->stack = (xsPtr + 1); + xsPtr += size; + continue; + } + + /* if allocation not required then subtract + size from overall stack size & continue */ + if (!sym->allocreq) + { + currFunc->xstack -= size; + SPEC_STAK (currFunc->etype) -= size; + continue; + } + + SPEC_STAK (sym->etype) = sym->stack = (xsPtr + 1); + xsPtr += size; + } + +} + +/*-----------------------------------------------------------------*/ +/* printAllocInfoSeg- print the allocation for a given section */ +/*-----------------------------------------------------------------*/ +static void +printAllocInfoSeg (memmap * map, symbol * func, struct dbuf_s *oBuf) +{ + symbol *sym; + + if (!map) + return; + if (!map->syms) + return; + + for (sym = setFirstItem (map->syms); sym; + sym = setNextItem (map->syms)) + { + + if (sym->level == 0) + continue; + if (sym->localof != func) + continue; + + dbuf_printf (oBuf, ";%-25s Allocated ", sym->name); + + /* if assigned to registers */ + if (!sym->allocreq && sym->reqv) + { + int i; + + sym = OP_SYMBOL (sym->reqv); + if (!sym->isspilt || sym->remat) + { + dbuf_append_str (oBuf, "to registers "); + for (i = 0; i < 4 && sym->regs[i]; i++) + dbuf_printf (oBuf, "%s ", port->getRegName (sym->regs[i])); + dbuf_append_char (oBuf, '\n'); + continue; + } + else + { + sym = sym->usl.spillLoc; + } + } + + /* if on stack */ + if (sym->onStack) + { + dbuf_printf (oBuf, "to stack - offset %d\n", sym->stack); + continue; + } + + /* otherwise give rname */ + dbuf_printf (oBuf, "with name '%s'\n", sym->rname); + } +} + +/*-----------------------------------------------------------------*/ +/* canOverlayLocals - returns true if the local variables can overlayed */ +/*-----------------------------------------------------------------*/ +static bool +canOverlayLocals (eBBlock ** ebbs, int count) +{ + int i; + /* if staticAuto is in effect or the current function + being compiled is reentrant or the overlay segment + is empty or no overlay option is in effect then */ + if (options.noOverlay || + options.stackAuto || + (currFunc && + (IFFUNC_ISREENT (currFunc->type) || + FUNC_ISISR (currFunc->type))) || + elementsInSet (overlay->syms) == 0) + + return FALSE; + + /* if this is a forces overlay */ + if (IFFUNC_ISOVERLAY(currFunc->type)) return TRUE; + + /* otherwise do thru the blocks and see if there + any function calls if found then return false */ + for (i = 0; i < count; i++) + { + iCode *ic; + + for (ic = ebbs[i]->sch; ic; ic = ic->next) + if (ic) { + if (ic->op == CALL) { + sym_link *ftype = operandType(IC_LEFT(ic)); + /* builtins only can use overlays */ + if (!IFFUNC_ISBUILTIN(ftype)) return FALSE; + } else if (ic->op == PCALL) return FALSE; + } + } + + /* no function calls found return TRUE */ + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* doOverlays - move the overlay segment to appropriate location */ +/*-----------------------------------------------------------------*/ +void +doOverlays (eBBlock ** ebbs, int count) +{ + if (!overlay) { + return; + } + + /* check if the parameters and local variables + of this function can be put in the overlay segment + This check is essentially to see if the function + calls any other functions if yes then we cannot + overlay */ + if (canOverlayLocals (ebbs, count)) + /* if we can then put the parameters & + local variables in the overlay set */ + overlay2Set (); + else + /* otherwise put them into data where + they belong */ + overlay2data (); +} + +/*-----------------------------------------------------------------*/ +/* printAllocInfo - prints allocation information for a function */ +/*-----------------------------------------------------------------*/ +void +printAllocInfo (symbol * func, struct dbuf_s * oBuf) +{ + if (!func) + return; + + /* must be called after register allocation is complete */ + dbuf_append_str (oBuf, ";------------------------------------------------------------\n"); + dbuf_printf (oBuf, ";Allocation info for local variables in function '%s'\n", func->name); + dbuf_append_str (oBuf, ";------------------------------------------------------------\n"); + + printAllocInfoSeg (xstack, func, oBuf); + printAllocInfoSeg (istack, func, oBuf); + printAllocInfoSeg (code, func, oBuf); + printAllocInfoSeg (data, func, oBuf); + printAllocInfoSeg (xdata, func, oBuf); + printAllocInfoSeg (idata, func, oBuf); + printAllocInfoSeg (sfr, func, oBuf); + printAllocInfoSeg (sfrbit, func, oBuf); + + { + set *ovrset; + set *tempOverlaySyms = overlay->syms; + + /* search the set of overlay sets for local variables/parameters */ + for (ovrset = setFirstItem (ovrSetSets); ovrset; + ovrset = setNextItem (ovrSetSets)) + { + overlay->syms = ovrset; + printAllocInfoSeg (overlay, func, oBuf); + } + overlay->syms = tempOverlaySyms; + } + + dbuf_append_str (oBuf, ";------------------------------------------------------------\n"); +} diff --git a/src/SDCCmem.h b/src/SDCCmem.h new file mode 100644 index 0000000..c0f0633 --- /dev/null +++ b/src/SDCCmem.h @@ -0,0 +1,109 @@ +/*-----------------------------------------------------------------*/ +/* SDCCmem.h - header file for memory management */ +/*-----------------------------------------------------------------*/ + +#ifndef SDCCMEM_H +#define SDCCMEM_H + +#include "dbuf.h" + +struct set; +struct value; +struct eBBlock; + +typedef struct memmap + { + unsigned char pageno; /* page no for this variable */ + const char *sname; /* character prefix for map */ + char dbName; /* debugger address space name */ + int ptrType; /* pointer Type for this space */ + int slbl; /* label counter for space */ + unsigned sloc; /* starting location */ + unsigned fmap:1; /* 1 = 16bit addressing reqd */ + unsigned paged:1; /* this is a paged mem space */ + unsigned direct:1; /* 1 = indirect access only */ + unsigned bitsp:1; /* 1 = bit addressable space */ + unsigned codesp:1; /* 1 = code space */ + unsigned regsp:1; /* 1 = sfr space */ + struct dbuf_s oBuf; /* object buffer associated */ + struct set *syms; /* symbols defined in this segment */ + } +memmap; + +extern FILE *junkFile; + +/* memory map prefixes MOF added the DATA,CODE,XDATA,BIT */ +#define XSTACK_NAME port->mem.xstack_name +#define ISTACK_NAME port->mem.istack_name +#define CODE_NAME port->mem.code_name +#define DATA_NAME port->mem.data_name +#define IDATA_NAME port->mem.idata_name +#define PDATA_NAME port->mem.pdata_name +#define XDATA_NAME port->mem.xdata_name +#define XIDATA_NAME port->mem.xidata_name +#define XINIT_NAME port->mem.xinit_name +#define BIT_NAME port->mem.bit_name +#define REG_NAME port->mem.reg_name +#define STATIC_NAME port->mem.static_name +#define HOME_NAME port->mem.home_name +#define OVERLAY_NAME port->mem.overlay_name +#define CONST_NAME port->mem.const_name +#define CABS_NAME port->mem.cabs_name +#define XABS_NAME port->mem.xabs_name +#define IABS_NAME port->mem.iabs_name + +/* forward definition for variables */ +extern memmap *xstack; /* xternal stack data */ +extern memmap *istack; /* internal stack */ +extern memmap *code; /* code segment */ +extern memmap *data; /* internal data upto 128 */ +extern memmap *pdata; /* paged external data upto 256 */ +extern memmap *xdata; /* external data */ +extern memmap *xidata; /* the initialized xdata */ +extern memmap *xinit; /* the initializers for xidata */ +extern memmap *idata; /* internal data upto 256 */ +extern memmap *bit; /* bit addressable space */ +extern memmap *statsg; /* static code segment */ +extern memmap *c_abs; /* constant absolute data */ +extern memmap *x_abs; /* absolute xdata/pdata */ +extern memmap *i_abs; /* absolute idata upto 256 */ +extern memmap *d_abs; /* absolute data upto 128 */ +extern memmap *sfr; /* register space */ +extern memmap *sfrbit; /* sfr bit space */ +extern memmap *reg; /* register space */ +extern memmap *generic; /* unknown */ +extern memmap *overlay; /* the overlay segment */ +extern memmap *eeprom; /* eeprom space */ +extern memmap *home; /* Non-banked home space */ + +extern int fatalError; + +extern struct set *ovrSetSets; + +/* easy access macros */ +#define IN_BITSPACE(map) (map && map->bitsp) +#define IN_STACK(x) (IS_SPEC(x) && (SPEC_OCLS(x) == xstack || SPEC_OCLS(x) == istack )) +#define IN_FARSPACE(map) (map && map->fmap) +#define IN_DIRSPACE(map) (map && map->direct) +#define IN_PAGEDSPACE(map) (map && map->paged ) +#define IN_CODESPACE(map) (map && map->codesp) +#define IN_REGSP(map) (map && map->regsp) +#define PTR_TYPE(map) (map ? (map->ptrType ? map->ptrType : POINTER)\ + : port->unqualified_pointer) + +/* forward decls for functions */ +memmap *allocMap (char, char, char, char, char, char, unsigned, const char *, char, int); +void initMem (); +void allocGlobal (struct symbol *); +void allocLocal (struct symbol *); +void allocParms (struct value *); +void deallocParms (struct value *); +void deallocLocal (struct symbol *); +int allocVariables (struct symbol *); +void overlay2Set (); +void overlay2data (); +void redoStackOffsets (); +void printAllocInfo (struct symbol *, struct dbuf_s *); +void doOverlays (struct eBBlock **, int count); +void deleteFromSeg(struct symbol *); +#endif diff --git a/src/SDCCopt.c b/src/SDCCopt.c new file mode 100644 index 0000000..c799bed --- /dev/null +++ b/src/SDCCopt.c @@ -0,0 +1,1649 @@ +/*------------------------------------------------------------------------- + SDCCopt.c - calls all the optimizations routines and does some of the + hackier transformations, these include translating iCodes + to function calls and replacing local variables with their + register equivalents etc. Also contains the driver routine + for dead code elimination + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include +#include "common.h" + +/*-----------------------------------------------------------------*/ +/* global variables */ +int cseDefNum = 0; + +char flowChanged = 0; + + +/*-----------------------------------------------------------------*/ +/* printSymName - prints the symbol names */ +/*-----------------------------------------------------------------*/ +int +printSymName (void *vsym) +{ + symbol *sym = vsym; + fprintf (stdout, " %s ", sym->name); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* cnvToFcall - does the actual conversion to function call */ +/*-----------------------------------------------------------------*/ +static void +cnvToFcall (iCode * ic, eBBlock * ebp) +{ + iCode *ip; + iCode *newic; + operand *left; + operand *right; + symbol *func = NULL; + char *filename = ic->filename; + int lineno = ic->lineno; + int bytesPushed=0; + + ip = ic->next; /* insertion point */ + /* remove it from the iCode */ + remiCodeFromeBBlock (ebp, ic); + + left = IC_LEFT (ic); + right = IC_RIGHT (ic); + + if (IS_SYMOP (left)) + bitVectUnSetBit (OP_USES (left), ic->key); + if (IS_SYMOP (right)) + bitVectUnSetBit (OP_USES (right), ic->key); + + if (IS_FLOAT (operandType (right))) { + switch (ic->op) + { + case '+': + func = __fsadd; + break; + case '-': + func = __fssub; + break; + case '/': + func = __fsdiv; + break; + case '*': + func = __fsmul; + break; + case EQ_OP: + func = __fseq; + break; + case NE_OP: + func = __fsneq; + break; + case '<': + func = __fslt; + break; + case '>': + func = __fsgt; + break; + case LE_OP: + func = __fslteq; + break; + case GE_OP: + func = __fsgteq; + break; + } + } else + if (IS_FIXED16X16 (operandType (right))) { + switch (ic->op) + { + case '+': + func = __fps16x16_add; + break; + case '-': + func = __fps16x16_sub; + break; + case '/': + func = __fps16x16_div; + break; + case '*': + func = __fps16x16_mul; + break; + case EQ_OP: + func = __fps16x16_eq; + break; + case NE_OP: + func = __fps16x16_neq; + break; + case '<': + func = __fps16x16_lt; + break; + case '>': + func = __fps16x16_gt; + break; + case LE_OP: + func = __fps16x16_lteq; + break; + case GE_OP: + func = __fps16x16_gteq; + break; + } + } + + + /* if float support routines NOT compiled as reentrant */ + if (!options.float_rent) + { + + /* first one */ + if (IS_REGPARM (FUNC_ARGS(func->type)->etype)) + { + newic = newiCode (SEND, left, NULL); + newic->argreg = SPEC_ARGREG(FUNC_ARGS(func->type)->etype); + } + else + { + newic = newiCode ('=', NULL, left); + IC_RESULT (newic) = operandFromValue (FUNC_ARGS(func->type)); + } + + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = lineno; + if (IS_SYMOP (left)) + OP_USES (left) = bitVectSetBit (OP_USES (left), newic->key); + + /* second one */ + if (IS_REGPARM (FUNC_ARGS(func->type)->next->etype)) + { + newic = newiCode (SEND, right, NULL); + newic->argreg = SPEC_ARGREG(FUNC_ARGS(func->type)->next->etype); + } + else + { + newic = newiCode ('=', NULL, right); + IC_RESULT (newic) = operandFromValue (FUNC_ARGS(func->type)->next); + } + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = lineno; + if (IS_SYMOP (right)) + OP_USES (right) = bitVectSetBit (OP_USES (right), newic->key); + + } + else + { + + /* push right */ + if (IS_REGPARM (FUNC_ARGS(func->type)->next->etype)) + { + newic = newiCode (SEND, right, NULL); + newic->argreg = SPEC_ARGREG(FUNC_ARGS(func->type)->next->etype); + } + else + { + newic = newiCode (IPUSH, right, NULL); + newic->parmPush = 1; + bytesPushed += getSize(operandType(right)); + } + + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = lineno; + if (IS_SYMOP (right)) + OP_USES (right) = bitVectSetBit (OP_USES (right), newic->key); + + /* insert push left */ + if (IS_REGPARM (FUNC_ARGS(func->type)->etype)) + { + newic = newiCode (SEND, left, NULL); + newic->argreg = SPEC_ARGREG(FUNC_ARGS(func->type)->etype); + } + else + { + newic = newiCode (IPUSH, left, NULL); + newic->parmPush = 1; + bytesPushed += getSize(operandType(left)); + } + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = lineno; + if (IS_SYMOP (left)) + OP_USES (left) = bitVectSetBit (OP_USES (left), newic->key); + + } + /* insert the call */ + newic = newiCode (CALL, operandFromSymbol (func), NULL); + IC_RESULT (newic) = IC_RESULT (ic); + bitVectUnSetBit (OP_DEFS (IC_RESULT (ic)), ic->key); + OP_USES (IC_RESULT (newic)) = bitVectSetBit (OP_USES (IC_RESULT (newic)), newic->key); + newic->filename = filename; + newic->lineno = lineno; + newic->parmBytes += bytesPushed; + ebp->hasFcall = 1; + if (currFunc) + FUNC_HASFCALL (currFunc->type) = 1; + + if(TARGET_IS_PIC16 || TARGET_IS_PIC) { + /* normally these functions aren't marked external, so we can use their + * _extern field to marked as already added to symbol table */ + + if(!SPEC_EXTR(func->etype)) { + memmap *seg = SPEC_OCLS(OP_SYMBOL(IC_LEFT(newic))->etype); + + SPEC_EXTR(func->etype) = 1; + seg = SPEC_OCLS( func->etype ); + addSet(&seg->syms, func); + } + } + + addiCodeToeBBlock (ebp, newic, ip); +} + +/*-----------------------------------------------------------------*/ +/* cnvToFloatCast - converts casts to floats to function calls */ +/*-----------------------------------------------------------------*/ +static void +cnvToFloatCast (iCode * ic, eBBlock * ebp) +{ + iCode *ip, *newic; + symbol *func = NULL; + sym_link *type = operandType (IC_RIGHT (ic)); + int linenno = ic->lineno; + int bwd, su; + int bytesPushed=0; + + ip = ic->next; + /* remove it from the iCode */ + remiCodeFromeBBlock (ebp, ic); + /* depending on the type */ + for (bwd = 0; bwd < 3; bwd++) + { + for (su = 0; su < 2; su++) + { + if (compareType (type, __multypes[bwd][su]) == 1) + { + func = __conv[0][bwd][su]; + goto found; + } + } + } + + if(compareType (type, fixed16x16Type) == 1) { + func = __fp16x16conv[0][3][0]; + goto found; + } + + assert (0); +found: + + /* if float support routines NOT compiled as reentrant */ + if (!options.float_rent) + { + /* first one */ + if (IS_REGPARM (FUNC_ARGS(func->type)->etype)) + { + newic = newiCode (SEND, IC_RIGHT (ic), NULL); + newic->argreg = SPEC_ARGREG(FUNC_ARGS(func->type)->etype); + } + else + { + newic = newiCode ('=', NULL, IC_RIGHT (ic)); + IC_RESULT (newic) = operandFromValue (FUNC_ARGS(func->type)); + } + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = linenno; + + } + else + { + /* push the left */ + if (IS_REGPARM (FUNC_ARGS(func->type)->etype)) { + newic = newiCode (SEND, IC_RIGHT (ic), NULL); + newic->argreg = SPEC_ARGREG(FUNC_ARGS(func->type)->etype); + } + else + { + newic = newiCode (IPUSH, IC_RIGHT (ic), NULL); + newic->parmPush = 1; + bytesPushed += getSize(operandType(IC_RIGHT(ic))); + } + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = linenno; + } + + /* make the call */ + newic = newiCode (CALL, operandFromSymbol (func), NULL); + IC_RESULT (newic) = IC_RESULT (ic); + newic->parmBytes+=bytesPushed; + ebp->hasFcall = 1; + if (currFunc) + FUNC_HASFCALL (currFunc->type) = 1; + + if(TARGET_IS_PIC16 || TARGET_IS_PIC) { + /* normally these functions aren't marked external, so we can use their + * _extern field to marked as already added to symbol table */ + + if(!SPEC_EXTR(func->etype)) { + memmap *seg = SPEC_OCLS(OP_SYMBOL(IC_LEFT(newic))->etype); + + SPEC_EXTR(func->etype) = 1; + seg = SPEC_OCLS( func->etype ); + addSet(&seg->syms, func); + } + } + + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = linenno; +} + +/*----------------------------------------------------------------------*/ +/* cnvToFixed16x16Cast - converts casts to fixed16x16 to function calls */ +/*----------------------------------------------------------------------*/ +static void +cnvToFixed16x16Cast (iCode * ic, eBBlock * ebp) +{ + iCode *ip, *newic; + symbol *func = NULL; + sym_link *type = operandType (IC_RIGHT (ic)); + int linenno = ic->lineno; + int bwd, su; + int bytesPushed=0; + + ip = ic->next; + /* remove it from the iCode */ + remiCodeFromeBBlock (ebp, ic); + /* depending on the type */ + for (bwd = 0; bwd < 3; bwd++) + { + for (su = 0; su < 2; su++) + { + if (compareType (type, __multypes[bwd][su]) == 1) + { + func = __fp16x16conv[0][bwd][su]; + goto found; + } + } + } + assert (0); +found: + + /* if float support routines NOT compiled as reentrant */ + if (!options.float_rent) + { + /* first one */ + if (IS_REGPARM (FUNC_ARGS(func->type)->etype)) + { + newic = newiCode (SEND, IC_RIGHT (ic), NULL); + newic->argreg = SPEC_ARGREG(FUNC_ARGS(func->type)->etype); + } + else + { + newic = newiCode ('=', NULL, IC_RIGHT (ic)); + IC_RESULT (newic) = operandFromValue (FUNC_ARGS(func->type)); + } + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = linenno; + + } + else + { + /* push the left */ + if (IS_REGPARM (FUNC_ARGS(func->type)->etype)) { + newic = newiCode (SEND, IC_RIGHT (ic), NULL); + newic->argreg = SPEC_ARGREG(FUNC_ARGS(func->type)->etype); + } + else + { + newic = newiCode (IPUSH, IC_RIGHT (ic), NULL); + newic->parmPush = 1; + bytesPushed += getSize(operandType(IC_RIGHT(ic))); + } + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = linenno; + } + + /* make the call */ + newic = newiCode (CALL, operandFromSymbol (func), NULL); + IC_RESULT (newic) = IC_RESULT (ic); + newic->parmBytes+=bytesPushed; + ebp->hasFcall = 1; + if (currFunc) + FUNC_HASFCALL (currFunc->type) = 1; + + if(TARGET_IS_PIC16 || TARGET_IS_PIC) { + /* normally these functions aren't marked external, so we can use their + * _extern field to marked as already added to symbol table */ + + if(!SPEC_EXTR(func->etype)) { + memmap *seg = SPEC_OCLS(OP_SYMBOL(IC_LEFT(newic))->etype); + + SPEC_EXTR(func->etype) = 1; + seg = SPEC_OCLS( func->etype ); + addSet(&seg->syms, func); + } + } + + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = linenno; +} + +/*-----------------------------------------------------------------*/ +/* cnvFromFloatCast - converts casts From floats to function calls */ +/*-----------------------------------------------------------------*/ +static void +cnvFromFloatCast (iCode * ic, eBBlock * ebp) +{ + iCode *ip, *newic; + symbol *func = NULL; + sym_link *type = operandType (IC_LEFT (ic)); + char *filename = ic->filename; + int lineno = ic->lineno; + int bwd, su; + int bytesPushed=0; + + ip = ic->next; + /* remove it from the iCode */ + remiCodeFromeBBlock (ebp, ic); + + /* depending on the type */ + for (bwd = 0; bwd < 3; bwd++) + { + for (su = 0; su < 2; su++) + { + if (compareType (type, __multypes[bwd][su]) == 1) + { + func = __conv[1][bwd][su]; + goto found; + } + } + } + assert (0); +found: + + /* if float support routines NOT compiled as reentrant */ + if (!options.float_rent) + { + /* first one */ + if (IS_REGPARM (FUNC_ARGS(func->type)->etype)) { + newic = newiCode (SEND, IC_RIGHT (ic), NULL); + newic->argreg = SPEC_ARGREG(FUNC_ARGS(func->type)->etype); + } + else + { + newic = newiCode ('=', NULL, IC_RIGHT (ic)); + IC_RESULT (newic) = operandFromValue (FUNC_ARGS(func->type)); + } + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = lineno; + + } + else + { + + /* push the left */ + if (IS_REGPARM (FUNC_ARGS(func->type)->etype)) { + newic = newiCode (SEND, IC_RIGHT (ic), NULL); + newic->argreg = SPEC_ARGREG(FUNC_ARGS(func->type)->etype); + } + else + { + newic = newiCode (IPUSH, IC_RIGHT (ic), NULL); + newic->parmPush = 1; + bytesPushed += getSize(operandType(IC_RIGHT(ic))); + } + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = lineno; + + } + + /* make the call */ + newic = newiCode (CALL, operandFromSymbol (func), NULL); + IC_RESULT (newic) = IC_RESULT (ic); + newic->parmBytes+=bytesPushed; + ebp->hasFcall = 1; + if (currFunc) + FUNC_HASFCALL (currFunc->type) = 1; + + if(TARGET_IS_PIC16 || TARGET_IS_PIC) { + /* normally these functions aren't marked external, so we can use their + * _extern field to marked as already added to symbol table */ + + if(!SPEC_EXTR(func->etype)) { + memmap *seg = SPEC_OCLS(OP_SYMBOL(IC_LEFT(newic))->etype); + + SPEC_EXTR(func->etype) = 1; + seg = SPEC_OCLS( func->etype ); + addSet(&seg->syms, func); + } + } + + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = lineno; +} + +/*--------------------------------------------------------------------------*/ +/* cnvFromFixed16x16Cast - converts casts from fixed16x16 to function calls */ +/*--------------------------------------------------------------------------*/ +static void +cnvFromFixed16x16Cast (iCode * ic, eBBlock * ebp) +{ + iCode *ip, *newic; + symbol *func = NULL; + sym_link *type = operandType (IC_LEFT (ic)); + char *filename = ic->filename; + int lineno = ic->lineno; + int bwd, su; + int bytesPushed=0; + + ip = ic->next; + /* remove it from the iCode */ + remiCodeFromeBBlock (ebp, ic); + + /* depending on the type */ + for (bwd = 0; bwd < 3; bwd++) + { + for (su = 0; su < 2; su++) + { + if (compareType (type, __multypes[bwd][su]) == 1) + { + func = __fp16x16conv[1][bwd][su]; + goto found; + } + } + } + + if (compareType (type, floatType) == 1) + { + func = __fp16x16conv[1][3][0]; + goto found; + } + + assert (0); +found: + + /* if float support routines NOT compiled as reentrant */ + if (!options.float_rent) + { + /* first one */ + if (IS_REGPARM (FUNC_ARGS(func->type)->etype)) { + newic = newiCode (SEND, IC_RIGHT (ic), NULL); + newic->argreg = SPEC_ARGREG(FUNC_ARGS(func->type)->etype); + } + else + { + newic = newiCode ('=', NULL, IC_RIGHT (ic)); + IC_RESULT (newic) = operandFromValue (FUNC_ARGS(func->type)); + } + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = lineno; + } + else + { + + /* push the left */ + if (IS_REGPARM (FUNC_ARGS(func->type)->etype)) { + newic = newiCode (SEND, IC_RIGHT (ic), NULL); + newic->argreg = SPEC_ARGREG(FUNC_ARGS(func->type)->etype); + } + else + { + newic = newiCode (IPUSH, IC_RIGHT (ic), NULL); + newic->parmPush = 1; + bytesPushed += getSize(operandType(IC_RIGHT(ic))); + } + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = lineno; + } + + /* make the call */ + newic = newiCode (CALL, operandFromSymbol (func), NULL); + IC_RESULT (newic) = IC_RESULT (ic); + newic->parmBytes+=bytesPushed; + ebp->hasFcall = 1; + if (currFunc) + FUNC_HASFCALL (currFunc->type) = 1; + + if(TARGET_IS_PIC16 || TARGET_IS_PIC) { + /* normally these functions aren't marked external, so we can use their + * _extern field to marked as already added to symbol table */ + + if(!SPEC_EXTR(func->etype)) { + memmap *seg = SPEC_OCLS(OP_SYMBOL(IC_LEFT(newic))->etype); + + SPEC_EXTR(func->etype) = 1; + seg = SPEC_OCLS( func->etype ); + addSet(&seg->syms, func); + } + } + + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = lineno; +} + +extern operand *geniCodeRValue (operand *, bool); + +/*-----------------------------------------------------------------*/ +/* convilong - converts int or long mults or divs to fcalls */ +/*-----------------------------------------------------------------*/ +static void +convilong (iCode * ic, eBBlock * ebp) +{ + int op = ic->op; + symbol *func = NULL; + iCode *ip = ic->next; + iCode *newic; + char *filename = ic->filename; + int lineno = ic->lineno; + int bwd; + int su; + int bytesPushed=0; + sym_link *leftType = operandType (IC_LEFT (ic)); + sym_link *rightType = operandType (IC_RIGHT (ic)); + + remiCodeFromeBBlock (ebp, ic); + + if (getSize (leftType) == 1 && getSize (rightType) == 1) + { + int muldivmod; + + if (op == '*') + muldivmod = 0; + else if (op == '/') + muldivmod = 1; + else if (op == '%') + muldivmod = 2; + else + muldivmod = -1; + + for (su = 0; su < 4 && muldivmod >= 0; su++) + { + if ((compareType (leftType, __multypes[0][su%2]) == 1) && + (compareType (rightType, __multypes[0][su/2]) == 1)) + { + func = __muldiv[muldivmod][0][su]; + goto found; + } + } + } + + /* depending on the type */ + for (bwd = 0; bwd < 3; bwd++) + { + for (su = 0; su < 2; su++) + { + if (compareType (leftType, __multypes[bwd][su]) == 1) + { + if ((op=='*' || op=='/' || op=='%') && + compareType (rightType, __multypes[bwd][su]) != 1) + { + assert(0); + } + + if (op == '*') + func = __muldiv[0][bwd][su]; + else if (op == '/') + func = __muldiv[1][bwd][su]; + else if (op == '%') + func = __muldiv[2][bwd][su]; + else if (op == RRC) + func = __rlrr[1][bwd][su]; + else if (op == RLC) + func = __rlrr[0][bwd][su]; + else if (op == RIGHT_OP) + func = __rlrr[1][bwd][su]; + else if (op == LEFT_OP) + func = __rlrr[0][bwd][su]; + else + assert (0); + goto found; + } + } + } + assert (0); +found: + /* if int & long support routines NOT compiled as reentrant */ + if (!options.intlong_rent) + { + /* first one */ + if (IS_REGPARM (FUNC_ARGS(func->type)->etype)) { + newic = newiCode (SEND, IC_LEFT (ic), NULL); + newic->argreg = SPEC_ARGREG(FUNC_ARGS(func->type)->etype); + } + else + { + newic = newiCode ('=', NULL, IC_LEFT (ic)); + IC_RESULT (newic) = operandFromValue (FUNC_ARGS(func->type)); + } + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = lineno; + + /* second one */ + if (IS_REGPARM (FUNC_ARGS(func->type)->next->etype)) { + newic = newiCode (SEND, IC_RIGHT (ic), NULL); + newic->argreg = SPEC_ARGREG(FUNC_ARGS(func->type)->next->etype); + } + else + { + newic = newiCode ('=', NULL, IC_RIGHT (ic)); + IC_RESULT (newic) = operandFromValue (FUNC_ARGS(func->type)->next); + } + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = lineno; + + } + else + { + /* compiled as reentrant then push */ + /* push right */ + if (IS_REGPARM (FUNC_ARGS(func->type)->next->etype)) + { + newic = newiCode (SEND, IC_RIGHT (ic), NULL); + newic->argreg = SPEC_ARGREG(FUNC_ARGS(func->type)->next->etype); + } + else + { + newic = newiCode (IPUSH, IC_RIGHT (ic), NULL); + newic->parmPush = 1; + + bytesPushed += getSize(operandType(IC_RIGHT(ic))); + } + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = lineno; + + /* insert push left */ + if (IS_REGPARM (FUNC_ARGS(func->type)->etype)) + { + newic = newiCode (SEND, IC_LEFT (ic), NULL); + newic->argreg = SPEC_ARGREG(FUNC_ARGS(func->type)->etype); + } + else + { + newic = newiCode (IPUSH, IC_LEFT (ic), NULL); + newic->parmPush = 1; + + bytesPushed += getSize(operandType(IC_LEFT(ic))); + } + addiCodeToeBBlock (ebp, newic, ip); + newic->filename = filename; + newic->lineno = lineno; + + } + + /* for the result */ + newic = newiCode (CALL, operandFromSymbol (func), NULL); + IC_RESULT (newic) = IC_RESULT (ic); + newic->filename = filename; + newic->lineno = lineno; + newic->parmBytes+=bytesPushed; // to clear the stack after the call + ebp->hasFcall = 1; + if (currFunc) + FUNC_HASFCALL (currFunc->type) = 1; + + if(TARGET_IS_PIC || TARGET_IS_PIC16) { + /* normally these functions aren't marked external, so we can use their + * _extern field to marked as already added to symbol table */ + + if(!SPEC_EXTR(func->etype)) { + memmap *seg = SPEC_OCLS(OP_SYMBOL(IC_LEFT(newic))->etype); + + SPEC_EXTR(func->etype) = 1; + seg = SPEC_OCLS( func->etype ); + addSet(&seg->syms, func); + } + } + + addiCodeToeBBlock (ebp, newic, ip); +} + +/*-----------------------------------------------------------------*/ +/* convertToFcall - converts some operations to fcalls */ +/*-----------------------------------------------------------------*/ +static void +convertToFcall (eBBlock ** ebbs, int count) +{ + int i; + + /* for all blocks do */ + for (i = 0; i < count; i++) + { + iCode *ic; + + /* for all instructions in the block do */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + + /* floating point operations are + converted to function calls */ + if ((IS_CONDITIONAL (ic) || + IS_ARITHMETIC_OP (ic)) && + (IS_FLOAT (operandType (IC_RIGHT (ic))) || + IS_FIXED( operandType (IC_RIGHT (ic))))) + { + cnvToFcall (ic, ebbs[i]); + } + + /* casting is a little different */ + if (ic->op == CAST) + { + if (IS_FLOAT (operandType (IC_RIGHT (ic)))) + cnvFromFloatCast (ic, ebbs[i]); + else if (IS_FLOAT (operandType (IC_LEFT (ic)))) + cnvToFloatCast (ic, ebbs[i]); + if (IS_FIXED16X16 (operandType (IC_RIGHT (ic)))) + cnvFromFixed16x16Cast (ic, ebbs[i]); + else if (IS_FIXED16X16 (operandType (IC_LEFT (ic)))) + cnvToFixed16x16Cast (ic, ebbs[i]); + } + + // Easy special case which avoids function call: modulo by a literal power + // of two can be replaced by a bitwise AND. + if (ic->op == '%' && isOperandLiteral(IC_RIGHT(ic)) && + IS_UNSIGNED(operandType(IC_LEFT(ic)))) + { + unsigned litVal = abs((unsigned) double2ul (operandLitValue(IC_RIGHT(ic)))); + + /* modulo by 1: no remainder */ + if (litVal == 1) + { + ic->op = '='; + IC_RIGHT (ic) = operandFromLit(0); + IC_LEFT (ic) = NULL; + continue; + } + // See if literal value is a power of 2. + while (litVal && !(litVal & 1)) + { + litVal >>= 1; + } + if (litVal) + { + // discard lowest set bit. + litVal >>= 1; + } + + if (!litVal) + { + ic->op = BITWISEAND; + IC_RIGHT(ic) = operandFromLit(operandLitValue(IC_RIGHT(ic)) - 1); + continue; + } + } + + /* if long / int mult or divide or mod */ + if (ic->op == '*' || ic->op == '/' || ic->op == '%') + { + sym_link *leftType = operandType (IC_LEFT (ic)); + + if (IS_INTEGRAL (leftType) && getSize (leftType) > port->support.muldiv) + { + sym_link *rightType = operandType (IC_RIGHT (ic)); + + if (port->hasNativeMulFor != NULL && + port->hasNativeMulFor (ic, leftType, rightType)) + { + /* Leave as native */ + } + else + { + convilong (ic, ebbs[i]); + } + } + } + + if (ic->op == RRC || ic->op == RLC || ic->op == LEFT_OP || ic->op == RIGHT_OP) + { + sym_link *type = operandType (IC_LEFT (ic)); + + if (IS_INTEGRAL (type) && getSize (type) > port->support.shift && port->support.shift >= 0) + { + convilong (ic, ebbs[i]); + } + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* isLocalWithoutDef - return 1 if sym might be used without a */ +/* defining iCode */ +/*-----------------------------------------------------------------*/ +static int +isLocalWithoutDef (symbol * sym) +{ + if (!IS_AUTO (sym)) + return 0; + + if (IS_VOLATILE (sym->type)) + return 0; + + if (sym->_isparm) + return 0; + + if (IS_AGGREGATE (sym->type)) + return 0; + + if (sym->addrtaken) + return 0; + + return !sym->defs; +} + +/*-----------------------------------------------------------------*/ +/* replaceRegEqv - replace all local variables with their reqv */ +/*-----------------------------------------------------------------*/ +static void +replaceRegEqv (ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->bbOrder; + int count = ebbi->count; + int i; + + /* Update the symbols' def bitvector so we know if there is */ + /* a defining iCode or not. Only replace a local variable */ + /* with its register equivalent if there is a defining iCode; */ + /* otherwise, the port's register allocater may choke. */ + cseAllBlocks (ebbi, TRUE); + + for (i = 0; i < count; i++) + { + + iCode *ic; + + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + + if (SKIP_IC2 (ic)) + continue; + + if (ic->op == IFX) + { + if (IC_COND (ic) && + IS_TRUE_SYMOP (IC_COND (ic)) && + isLocalWithoutDef (OP_SYMBOL (IC_COND (ic)))) + { + werrorfl (ic->filename, ic->lineno, + W_LOCAL_NOINIT, + OP_SYMBOL (IC_COND (ic))->name); + OP_REQV (IC_COND (ic)) = NULL; + OP_SYMBOL (IC_COND (ic))->allocreq = 1; + } + + if (IS_TRUE_SYMOP (IC_COND (ic)) && + OP_REQV (IC_COND (ic))) + IC_COND (ic) = opFromOpWithDU (OP_REQV (IC_COND (ic)), + OP_SYMBOL (IC_COND (ic))->defs, + OP_SYMBOL (IC_COND (ic))->uses); + + continue; + } + + + if (ic->op == JUMPTABLE) + { + if (IC_JTCOND (ic) && + IS_TRUE_SYMOP (IC_JTCOND (ic)) && + isLocalWithoutDef (OP_SYMBOL (IC_JTCOND (ic)))) + { + werrorfl (ic->filename, ic->lineno, + W_LOCAL_NOINIT, + OP_SYMBOL (IC_JTCOND (ic))->name); + OP_REQV (IC_JTCOND (ic)) = NULL; + OP_SYMBOL (IC_JTCOND (ic))->allocreq = 1; + } + + if (IS_TRUE_SYMOP (IC_JTCOND (ic)) && + OP_REQV (IC_JTCOND (ic))) + IC_JTCOND (ic) = opFromOpWithDU (OP_REQV (IC_JTCOND (ic)), + OP_SYMBOL (IC_JTCOND (ic))->defs, + OP_SYMBOL (IC_JTCOND (ic))->uses); + continue; + } + + if (ic->op == RECEIVE) + { + if (OP_SYMBOL (IC_RESULT (ic))->addrtaken) + OP_SYMBOL (IC_RESULT (ic))->isspilt = 1; + } + + /* general case */ + if (IC_RESULT (ic) && + IS_TRUE_SYMOP (IC_RESULT (ic)) && + OP_REQV (IC_RESULT (ic))) + { + if (POINTER_SET (ic)) + { + IC_RESULT (ic) = opFromOpWithDU (OP_REQV (IC_RESULT (ic)), + OP_SYMBOL (IC_RESULT (ic))->defs, + OP_SYMBOL (IC_RESULT (ic))->uses); + IC_RESULT (ic)->isaddr = 1; + } + else + IC_RESULT (ic) = opFromOpWithDU (OP_REQV (IC_RESULT (ic)), + OP_SYMBOL (IC_RESULT (ic))->defs, + OP_SYMBOL (IC_RESULT (ic))->uses); + } + + if (IC_RIGHT (ic) && + IS_TRUE_SYMOP (IC_RIGHT (ic)) && + isLocalWithoutDef (OP_SYMBOL (IC_RIGHT (ic)))) + { + werrorfl (ic->filename, ic->lineno, + W_LOCAL_NOINIT, + OP_SYMBOL (IC_RIGHT (ic))->name); + OP_REQV (IC_RIGHT (ic)) = NULL; + OP_SYMBOL (IC_RIGHT (ic))->allocreq = 1; + } + + if (IC_RIGHT (ic) && + IS_TRUE_SYMOP (IC_RIGHT (ic)) && + OP_REQV (IC_RIGHT (ic))) + { + IC_RIGHT (ic) = opFromOpWithDU (OP_REQV (IC_RIGHT (ic)), + OP_SYMBOL (IC_RIGHT (ic))->defs, + OP_SYMBOL (IC_RIGHT (ic))->uses); + IC_RIGHT (ic)->isaddr = 0; + } + + if (IC_LEFT (ic) && + IS_TRUE_SYMOP (IC_LEFT (ic)) && + isLocalWithoutDef (OP_SYMBOL (IC_LEFT (ic)))) + { + werrorfl (ic->filename, ic->lineno, + W_LOCAL_NOINIT, + OP_SYMBOL (IC_LEFT (ic))->name); + OP_REQV (IC_LEFT (ic)) = NULL; + OP_SYMBOL (IC_LEFT (ic))->allocreq = 1; + } + + if (IC_LEFT (ic) && + IS_TRUE_SYMOP (IC_LEFT (ic)) && + OP_REQV (IC_LEFT (ic))) + { + IC_LEFT (ic) = opFromOpWithDU (OP_REQV (IC_LEFT (ic)), + OP_SYMBOL (IC_LEFT (ic))->defs, + OP_SYMBOL (IC_LEFT (ic))->uses); + IC_LEFT (ic)->isaddr = 0; + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* findReqv - search for a register equivalent */ +/*-----------------------------------------------------------------*/ +operand * +findReqv (symbol * prereqv, eBBlock ** ebbs, int count) +{ + int i; + iCode * ic; + + /* for all blocks do */ + for (i=0; isch; ic; ic = ic->next) + { + if (ic->op == IFX) + { + if (IS_ITEMP (IC_COND (ic)) + && OP_SYMBOL (IC_COND (ic))->prereqv == prereqv) + return IC_COND (ic); + } + else if (ic->op == JUMPTABLE) + { + if (IS_ITEMP (IC_JTCOND (ic)) + && OP_SYMBOL (IC_JTCOND (ic))->prereqv == prereqv) + return IC_JTCOND (ic); + } + else + { + if (IS_ITEMP (IC_LEFT (ic)) + && OP_SYMBOL (IC_LEFT (ic))->prereqv == prereqv) + return IC_LEFT (ic); + if (IS_ITEMP (IC_RIGHT (ic)) + && OP_SYMBOL (IC_RIGHT (ic))->prereqv == prereqv) + return IC_RIGHT (ic); + if (IS_ITEMP (IC_RESULT (ic)) + && OP_SYMBOL (IC_RESULT (ic))->prereqv == prereqv) + return IC_RESULT (ic); + } + } + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* killDeadCode - eliminates dead assignments */ +/*-----------------------------------------------------------------*/ +int +killDeadCode (ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->dfOrder; + int count = ebbi->count; + int change = 1; + int gchange = 0; + int i = 0; + + + /* basic algorithm :- */ + /* first the exclusion rules :- */ + /* 1. if result is a global or volatile then skip */ + /* 2. if assignment and result is a temp & isaddr then skip */ + /* since this means array & pointer access, will be taken */ + /* care of by alias analysis. */ + /* 3. if the result is used in the remainder of the block skip */ + /* 4. if this definition does not reach the end of the block */ + /* i.e. the result is not present in the outExprs then KILL */ + /* 5. if it reaches the end of block & is used by some success */ + /* or then skip */ + /* else KILL */ + /* this whole process is carried on iteratively till no change */ + while (1) + { + + change = 0; + /* for all blocks do */ + for (i = 0; i < count; i++) + { + iCode *ic; + + /* for all instructions in the block do */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + int kill, j; + kill = 0; + + if (SKIP_IC (ic) || + ic->op == IFX || + ic->op == RETURN || + ic->op == DUMMY_READ_VOLATILE || + ic->op == CRITICAL || + ic->op == ENDCRITICAL) + continue; + + /* Since both IFX & JUMPTABLE (in SKIP_IC) have been tested for */ + /* it is now safe to assume IC_LEFT, IC_RIGHT, & IC_RESULT are */ + /* valid. */ + + /* if the result is volatile then continue */ + if (IC_RESULT (ic) && isOperandVolatile (IC_RESULT (ic), FALSE)) + continue; + + /* if the result is a temp & isaddr then skip */ + if (IC_RESULT (ic) && POINTER_SET (ic)) + continue; + + if (POINTER_GET (ic) && IS_VOLATILE (operandType (IC_LEFT (ic))->next) + && !SPIL_LOC (IC_RESULT (ic))) + continue; + + /* if the result is used in the remainder of the */ + /* block then skip */ + if (usedInRemaining (IC_RESULT (ic), ic->next)) + continue; + + /* does this definition reach the end of the block + or the usage is zero then we can kill */ + if (!bitVectBitValue (ebbs[i]->outDefs, ic->key)) + kill = 1; /* if not we can kill it */ + else + { + /* if this is a global variable or function parameter */ + /* we cannot kill anyway */ + if (isOperandGlobal (IC_RESULT (ic)) || + (OP_SYMBOL (IC_RESULT (ic))->_isparm && + !OP_SYMBOL (IC_RESULT (ic))->ismyparm)) + continue; + + /* if we are sure there are no usages */ + if (bitVectIsZero (OP_USES (IC_RESULT (ic)))) + { + kill = 1; + goto kill; + } + + /* reset visited flag */ + for (j = 0; j < count; ebbs[j++]->visited = 0); + + /* find out if this definition is alive */ + if (applyToSet (ebbs[i]->succList, + isDefAlive, + ic)) + continue; + + kill = 1; + } + + kill: + /* kill this one if required */ + if (kill) + { + bool volLeft = IS_SYMOP (IC_LEFT (ic)) + && isOperandVolatile (IC_LEFT (ic), FALSE); + bool volRight = IS_SYMOP (IC_RIGHT (ic)) + && isOperandVolatile (IC_RIGHT (ic), FALSE); + + /* a dead address-of operation should die, even if volatile */ + if (ic->op == ADDRESS_OF) + volLeft = FALSE; + + if (ic->next && ic->seqPoint == ic->next->seqPoint + && (ic->next->op == '+' || ic->next->op == '-')) + { + if (isOperandEqual (IC_LEFT(ic), IC_LEFT(ic->next)) + || isOperandEqual (IC_LEFT(ic), IC_RIGHT(ic->next))) + volLeft = FALSE; + if (isOperandEqual (IC_RIGHT(ic), IC_LEFT(ic->next)) + || isOperandEqual (IC_RIGHT(ic), IC_RIGHT(ic->next))) + volRight = FALSE; + } + + if (POINTER_GET (ic) && IS_VOLATILE (operandType (IC_LEFT (ic))->next)) + { + if (SPIL_LOC (IC_RESULT (ic))) + { + IC_RESULT (ic) = newiTempFromOp (IC_RESULT (ic)); + SPIL_LOC (IC_RESULT (ic)) = NULL; + } + continue; + } + + change = 1; + gchange++; + + /* now delete from defUseSet */ + deleteItemIf (&ebbs[i]->outExprs, ifDiCodeIsX, ic); + bitVectUnSetBit (ebbs[i]->outDefs, ic->key); + + /* and defset of the block */ + bitVectUnSetBit (ebbs[i]->defSet, ic->key); + + /* If this is the last of a register equivalent, */ + /* look for a successor register equivalent. */ + bitVectUnSetBit (OP_DEFS (IC_RESULT (ic)), ic->key); + if (IS_ITEMP (IC_RESULT (ic)) + && OP_SYMBOL (IC_RESULT (ic))->isreqv + && bitVectIsZero (OP_DEFS (IC_RESULT (ic)))) + { + symbol * resultsym = OP_SYMBOL (IC_RESULT (ic)); + symbol * prereqv = resultsym->prereqv; + + if (prereqv && prereqv->reqv && (OP_SYMBOL (prereqv->reqv) == resultsym)) + { + operand * newreqv; + + IC_RESULT (ic) = NULL; + newreqv = findReqv (prereqv, ebbs, count); + if (newreqv) + { + prereqv->reqv = newreqv; + } + } + } + + /* delete the result */ + IC_RESULT (ic) = NULL; + + if (volLeft || volRight) + { + /* something is volatile, so keep the iCode */ + /* and change the operator instead */ + ic->op = DUMMY_READ_VOLATILE; + + /* keep only the volatile operands */ + if (!volLeft) + IC_LEFT (ic) = NULL; + if (!volRight) + IC_RIGHT (ic) = NULL; + } + else + { + /* nothing is volatile, eliminate the iCode */ + remiCodeFromeBBlock (ebbs[i], ic); + + /* for the left & right remove the usage */ + if (IS_SYMOP (IC_LEFT (ic))) + bitVectUnSetBit (OP_USES (IC_LEFT (ic)), ic->key); + + if (IS_SYMOP (IC_RIGHT (ic))) + bitVectUnSetBit (OP_USES (IC_RIGHT (ic)), ic->key); + } + } + + } /* end of all instructions */ + + if (!ebbs[i]->sch && !ebbs[i]->noPath) + disconBBlock (ebbs[i], ebbi); + + } /* end of for all blocks */ + + if (!change) + break; + } /* end of while(1) */ + + return gchange; +} + +/*-----------------------------------------------------------------*/ +/* printCyclomatic - prints the cyclomatic information */ +/*-----------------------------------------------------------------*/ +static void +printCyclomatic (eBBlock ** ebbs, int count) +{ + int nEdges = elementsInSet (graphEdges); + int i, nNodes = 0; + + for (i = 0; i < count; i++) + nNodes += (!ebbs[i]->noPath); + + /* print the information */ + werror (I_CYCLOMATIC, currFunc->name, nEdges, nNodes, nEdges - nNodes + 2); +} + +/*-----------------------------------------------------------------*/ +/* discardDeadParamReceives - remove any RECEIVE opcodes which */ +/* refer to dead variables. */ +/*-----------------------------------------------------------------*/ +static void +discardDeadParamReceives (eBBlock ** ebbs, int count) +{ + int i; + iCode *ic; + iCode dummyIcode; + + for (i = 0; i < count; i++) + { + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + if (ic->op == RECEIVE) + { + if (IC_RESULT (ic) && OP_SYMBOL (IC_RESULT (ic)) + && !OP_SYMBOL (IC_RESULT (ic))->used) + { +#if 0 + fprintf (stderr, "discarding dead receive for %s\n", + OP_SYMBOL (IC_RESULT (ic))->name); +#endif + dummyIcode.next = ic->next; + remiCodeFromeBBlock (ebbs[i], ic); + ic = &dummyIcode; + } + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* optimizeCastCast - remove unneeded intermediate casts. */ +/* Integer promotion may cast (un)signed char to int and then */ +/* recast the int to (un)signed long. If the signedness of the */ +/* char and long are the same, the cast can be safely performed in */ +/* a single step. */ +/*-----------------------------------------------------------------*/ +static void +optimizeCastCast (eBBlock ** ebbs, int count) +{ + int i; + iCode *ic; + iCode *uic; + sym_link * type1; + sym_link * type2; + sym_link * type3; + symbol * sym; + + for (i = 0; i < count; i++) + { + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + + if (ic->op == CAST && IC_RESULT (ic) && IS_ITEMP (IC_RESULT (ic))) + { + type1 = operandType (IC_RIGHT (ic)); + type2 = operandType (IC_RESULT (ic)); + + /* Look only for a cast from an integer type to an */ + /* integer type that has no loss of bits */ + if (!IS_INTEGRAL (type1) || !IS_INTEGRAL (type2)) + continue; + if (getSize (type2) < getSize (type1)) + continue; + + /* There must be only one use of this first result */ + if (bitVectnBitsOn (OP_USES (IC_RESULT (ic))) != 1) + continue; + + /* This use must be a second cast */ + uic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_USES (IC_RESULT (ic)))); + if (!uic || uic->op != CAST) + continue; + + /* It must be a cast to another integer type that */ + /* has no loss of bits */ + type3 = operandType (IC_RESULT (uic)); + if (!IS_INTEGRAL (type3)) + continue; + if (getSize (type3) < getSize (type2)) + continue; + + /* The signedness between the first and last types */ + /* must match */ + if (SPEC_USIGN (type3) != SPEC_USIGN (type1)) + continue; + + /* Change the first cast to a simple assignment and */ + /* let the second cast do all the work */ + ic->op = '='; + IC_LEFT (ic) = NULL; + sym = OP_SYMBOL (IC_RESULT (ic)); + sym->type = copyLinkChain (type1); + sym->etype = getSpec (sym->type); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* eBBlockFromiCode - creates extended basic blocks from iCode */ +/* will return an array of eBBlock pointers */ +/*-----------------------------------------------------------------*/ +eBBlock ** +eBBlockFromiCode (iCode * ic) +{ + ebbIndex *ebbi = NULL; + int change = 1; + int lchange = 0; + int kchange = 0; + hTab *loops; + + /* if nothing passed then return nothing */ + if (!ic) + return NULL; + + eBBNum = 0; + + /* optimize the chain for labels & gotos + this will eliminate redundant labels and + will change jump to jumps by jumps */ + ic = iCodeLabelOptimize (ic); + + /* break it down into basic blocks */ + ebbi = iCodeBreakDown (ic); + + /* hash the iCode keys so that we can quickly index */ + /* them in the rest of the optimization steps */ + setToNull ((void *) &iCodehTab); + iCodehTab = newHashTable (iCodeKey); + hashiCodeKeys (ebbi->bbOrder, ebbi->count); + + /* compute the control flow */ + computeControlFlow (ebbi); + + /* dumpraw if asked for */ + if (options.dump_raw) + dumpEbbsToFileExt (DUMP_RAW0, ebbi); + + /* replace the local variables with their + register equivalents : the liveRange computation + along with the register allocation will determine + if it finally stays in the registers */ + replaceRegEqv (ebbi); + + /* create loop regions */ + loops = createLoopRegions (ebbi); + + /* dumpraw if asked for */ + if (options.dump_raw) + dumpEbbsToFileExt (DUMP_RAW1, ebbi); + + optimizeCastCast (ebbi->bbOrder, ebbi->count); + + /* do common subexpression elimination for each block */ + change = cseAllBlocks (ebbi, FALSE); + + /* dumpraw if asked for */ + if (options.dump_raw) + dumpEbbsToFileExt (DUMP_CSE, ebbi); + + /* compute the data flow */ + computeDataFlow (ebbi); + + /* dumpraw if asked for */ + if (options.dump_raw) + dumpEbbsToFileExt (DUMP_DFLOW, ebbi); + + /* global common subexpression elimination */ + if (optimize.global_cse) + { + change += cseAllBlocks (ebbi, FALSE); + if (options.dump_gcse) + dumpEbbsToFileExt (DUMP_GCSE, ebbi); + } + else + { + // compute the dataflow only + assert(cseAllBlocks (ebbi, TRUE)==0); + } + /* kill dead code */ + kchange = killDeadCode (ebbi); + + if (options.dump_kill) + dumpEbbsToFileExt (DUMP_DEADCODE, ebbi); + + /* do loop optimizations */ + change += (lchange = loopOptimizations (loops, ebbi)); + if (options.dump_loop) + dumpEbbsToFileExt (DUMP_LOOP, ebbi); + + /* recompute the data flow and apply global cse again + if loops optimizations or dead code caused a change: + loops will brings out of the loop which then may be + available for use in the later blocks: dead code + elimination could potentially disconnect some blocks + conditional flow may be efected so we need to apply + subexpression once more */ + if (lchange || kchange) + { + computeDataFlow (ebbi); + change += cseAllBlocks (ebbi, FALSE); + if (options.dump_loop) + dumpEbbsToFileExt (DUMP_LOOPG, ebbi); + + /* if loop optimizations caused a change then do + dead code elimination once more : this will + get rid of the extra assignments to the induction + variables created during loop optimizations */ + killDeadCode (ebbi); + + if (options.dump_loop) + dumpEbbsToFileExt (DUMP_LOOPD, ebbi); + + } + + /* sort it back by block number */ + //qsort (ebbs, saveCount, sizeof (eBBlock *), bbNumCompare); + + if (!options.lessPedantic) { + // this is a good place to check missing return values + if (currFunc) { + // the user is on his own with naked functions... + if (!IS_VOID(currFunc->etype) + && !FUNC_ISNAKED(currFunc->type)) { + eBBlock *bp; + // make sure all predecessors of the last block end in a return + for (bp=setFirstItem(ebbi->bbOrder[ebbi->count-1]->predList); + bp; + bp=setNextItem(ebbi->bbOrder[ebbi->count-1]->predList)) { + if (bp->ech->op != RETURN) { + werrorfl (bp->ech->filename, bp->ech->lineno, + W_VOID_FUNC, currFunc->name); + } + } + } + } + } + + /* if cyclomatic info requested then print it */ + if (options.cyclomatic) + printCyclomatic (ebbi->bbOrder, ebbi->count); + + /* convert operations with support routines + written in C to function calls : I am doing + this at this point since I want all the + operations to be as they are for optimizations */ + convertToFcall (ebbi->bbOrder, ebbi->count); + + /* compute the live ranges */ + computeLiveRanges (ebbi->bbOrder, ebbi->count, TRUE); + + if (options.dump_range) + dumpEbbsToFileExt (DUMP_RANGE, ebbi); + + /* Now that we have the live ranges, discard parameter + * receives for unused parameters. + */ + discardDeadParamReceives (ebbi->bbOrder, ebbi->count); + + /* allocate registers & generate code */ + port->assignRegisters (ebbi); + + /* throw away blocks */ + setToNull ((void *) &graphEdges); + + return NULL; +} + + +/* (add-hook 'c-mode-hook (lambda () (setq c-basic-offset 4))) */ diff --git a/src/SDCCopt.h b/src/SDCCopt.h new file mode 100644 index 0000000..221de7e --- /dev/null +++ b/src/SDCCopt.h @@ -0,0 +1,37 @@ +/*------------------------------------------------------------------------- + + SDCCopt.h - header file for Optimizations + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "SDCCBBlock.h" + +#ifndef SDCCOPT_H +#define SDCCOPT_H 1 + + +/*----------------------------------------------------------------------------*/ +eBBlock **eBBlockFromiCode (iCode *); +void printEbbs (eBBlock **); +iCode *iCodeLabelOptimize (iCode *); +eBBlock *iCode2eBBlock (iCode * ic); + +#endif diff --git a/src/SDCCpeeph.awk b/src/SDCCpeeph.awk new file mode 100644 index 0000000..18999d7 --- /dev/null +++ b/src/SDCCpeeph.awk @@ -0,0 +1,14 @@ +BEGIN { + print "/* Generated file, DO NOT Edit! */" + print "/* To Make changes to rules edit */" + print "/* /peeph.def instead. */" +} + +/^\/\// { next} + +{ printf "\"" ; + printf "%s",$0; + print "\\n\""; +} + + diff --git a/src/SDCCpeeph.c b/src/SDCCpeeph.c new file mode 100644 index 0000000..5a7447f --- /dev/null +++ b/src/SDCCpeeph.c @@ -0,0 +1,2527 @@ +/*------------------------------------------------------------------------- + SDCCpeeph.c - The peep hole optimizer: for interpreting the + peep hole rules + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" +#include "dbuf_string.h" + +#define ISCHARDIGIT(c) isdigit((unsigned char)c) +#define ISCHARSPACE(c) isspace((unsigned char)c) +#define ISCHARALNUM(c) isalnum((unsigned char)c) + +static peepRule *rootRules = NULL; +static peepRule *currRule = NULL; + +#define HTAB_SIZE 53 + +hTab *labelHash = NULL; + +static struct +{ + allocTrace values; + allocTrace labels; +} _G; + +static int hashSymbolName (const char *name); +static void buildLabelRefCountHash (lineNode * head); +static void bindVar (int key, char **s, hTab ** vtab); + +static bool matchLine (char *, char *, hTab **); + +#define FBYNAME(x) static int x (hTab *vars, lineNode *currPl, lineNode *endPl, \ + lineNode *head, char *cmdLine) + +#if !OPT_DISABLE_PIC +void peepRules2pCode(peepRule *); +#endif + +#if !OPT_DISABLE_PIC16 +void pic16_peepRules2pCode(peepRule *); +#endif + +/*-----------------------------------------------------------------*/ +/* getPatternVar - finds a pattern variable */ +/*-----------------------------------------------------------------*/ + +static char* +getPatternVar (hTab *vars, char **cmdLine) +{ + int varNumber; + char *digitend; + + if (!cmdLine || !*cmdLine || !**cmdLine) + return NULL; /* no parameters given */ + + while (**cmdLine && ISCHARSPACE(**cmdLine)) + (*cmdLine)++; /* skip whitespace */ + + if (**cmdLine != '%') + goto error; + (*cmdLine)++; + if (!ISCHARDIGIT (**cmdLine)) + goto error; + varNumber = strtol (*cmdLine, &digitend, 10); + *cmdLine = digitend; + return hTabItemWithKey (vars, varNumber); + +error: + fprintf (stderr, + "*** internal error: peephole restriction malformed: %s\n", *cmdLine); + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* pcDistance - finds a label backward or forward */ +/*-----------------------------------------------------------------*/ + +static int +pcDistance (lineNode * cpos, char *lbl, bool back) +{ + lineNode *pl = cpos; + char buff[MAX_PATTERN_LEN]; + int dist = 0; + + SNPRINTF (buff, sizeof(buff), "%s:", lbl); + while (pl) + { + if (pl->line && + !pl->isComment && + !pl->isLabel && + !pl->isDebug) + { + if (port->peep.getSize) + { + dist += port->peep.getSize(pl); + } + else + { + dist += 3; + } + } + + if (strncmp (pl->line, buff, strlen (buff)) == 0) + return dist; + + if (back) + pl = pl->prev; + else + pl = pl->next; + + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* portIsDS390 - return true if port is DS390 */ +/*-----------------------------------------------------------------*/ +FBYNAME (portIsDS390) +{ + return ((strcmp(port->target,"ds390") == 0) || + (strcmp(port->target,"ds400") == 0)); +} + +/*-----------------------------------------------------------------*/ +/* flat24bitMode - will check to see if we are in flat24 mode */ +/*-----------------------------------------------------------------*/ +FBYNAME (flat24bitMode) +{ + return (options.model == MODEL_FLAT24); +} + +/*-----------------------------------------------------------------*/ +/* xramMovcOption - check if using movc to read xram */ +/*-----------------------------------------------------------------*/ +FBYNAME (xramMovcOption) +{ + return (options.xram_movc && (strcmp(port->target,"mcs51") == 0)); +} + +/*-----------------------------------------------------------------*/ +/* useAcallAjmp - Enable replacement of lcall/ljmp with acall/ajmp */ +/*-----------------------------------------------------------------*/ +FBYNAME (useAcallAjmp) +{ + return (options.acall_ajmp && (strcmp(port->target,"mcs51") == 0)); +} + +/*-----------------------------------------------------------------*/ +/* labelInRange - will check to see if label is within range */ +/*-----------------------------------------------------------------*/ +FBYNAME (labelInRange) +{ + int dist = 0; + char *lbl = getPatternVar (vars, &cmdLine); + + if (!lbl) + { + /* If no parameters given, assume that %5 pattern variable + has the label name for backward compatibility */ + lbl = hTabItemWithKey (vars, 5); + } + + if (!lbl) + return FALSE; + + do + { + /* Don't optimize jumps in a jump table; a more generic test */ + if (currPl->ic && currPl->ic->op == JUMPTABLE) + return FALSE; + + /* if the previous two instructions are "ljmp"s then don't + do it since it can be part of a jump table */ + if (currPl->prev && currPl->prev->prev && + strstr (currPl->prev->line, "ljmp") && + strstr (currPl->prev->prev->line, "ljmp")) + return FALSE; + + /* calculate the label distance : the jump for reladdr can be + +/- 127 bytes, here I am assuming that an average 8051 + instruction is 2 bytes long, so if the label is more than + 63 intructions away, the label is considered out of range + for a relative jump. we could get more precise this will + suffice for now since it catches > 90% cases */ + dist = (pcDistance (currPl, lbl, TRUE) + + pcDistance (currPl, lbl, FALSE)); + + /* changed to 127, now that pcDistance return actual number of bytes */ + if (!dist || dist > 127) + return FALSE; + + lbl = getPatternVar (vars, &cmdLine); + } + while (lbl); + + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* labelJTInRange - will check to see if label %5 and up are */ +/* within range. */ +/* Specifically meant to optimize long (3-byte) jumps to short */ +/* (2-byte) jumps in jumptables */ +/*-----------------------------------------------------------------*/ +FBYNAME (labelJTInRange) +{ + char *lbl; + int dist, count, i; + + if (!getenv("SDCC_SJMP_JUMPTABLE")) + return FALSE; + + /* Only optimize within a jump table */ + if (currPl->ic && currPl->ic->op != JUMPTABLE) + return FALSE; + + count = elementsInSet( IC_JTLABELS (currPl->ic) ); + + /* check all labels (this is needed if the case statements are unsorted) */ + for (i=0; i 127+ /* range of sjmp */ + (7+3*i)+ /* offset between this jump and currPl, + should use pcDistance instead? */ + (count-i-1) /* if peephole applies distance is shortened */ + ) + return FALSE; + } + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* labelIsReturnOnly - Check if label %5 is followed by RET */ +/*-----------------------------------------------------------------*/ +FBYNAME (labelIsReturnOnly) +{ + /* assumes that %5 pattern variable has the label name */ + const char *label, *p; + const lineNode *pl; + int len; + char * retInst; + + /* Don't optimize jumps in a jump table; a more generic test */ + if (currPl->ic && currPl->ic->op == JUMPTABLE) + return FALSE; + + label = hTabItemWithKey (vars, 5); + if (!label) + return FALSE; + len = strlen(label); + + for(pl = currPl; pl; pl = pl->next) + { + if (pl->line && !pl->isDebug && !pl->isComment && pl->isLabel) + { + if (strncmp(pl->line, label, len) == 0) + break; /* Found Label */ + if (strlen(pl->line) != 7 || !ISCHARDIGIT(*(pl->line)) || + !ISCHARDIGIT(*(pl->line+1)) || !ISCHARDIGIT(*(pl->line+2)) || + !ISCHARDIGIT(*(pl->line+3)) || !ISCHARDIGIT(*(pl->line+4)) || + *(pl->line+5) != '$') + { + return FALSE; /* non-local label encountered */ + } + } + } + if (!pl) + return FALSE; /* did not find the label */ + pl = pl->next; + while (pl && (pl->isDebug || pl->isComment)) + pl = pl->next; + if (!pl || !pl->line || pl->isDebug) + return FALSE; /* next line not valid */ + p = pl->line; + for (p = pl->line; *p && ISCHARSPACE(*p); p++) + ; + + retInst = "ret"; + if (TARGET_IS_HC08) + retInst = "rts"; + if (strcmp(p, retInst) == 0) + return TRUE; + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* labelIsUncondJump - Check if label %5 is followed by an */ +/* unconditional jump and put the destination of that jump in %6 */ +/*-----------------------------------------------------------------*/ +FBYNAME (labelIsUncondJump) +{ + /* assumes that %5 pattern variable has the label name */ + const char *label; + char *p, *q; + const lineNode *pl; + int len; + char * jpInst = NULL; + + /* Don't optimize jumps in a jump table; a more generic test */ + if (currPl->ic && currPl->ic->op == JUMPTABLE) + return FALSE; + + label = hTabItemWithKey (vars, 5); + if (!label) + return FALSE; + len = strlen(label); + + for (pl = currPl; pl; pl = pl->next) + { + if (pl->line && !pl->isDebug && !pl->isComment && pl->isLabel) + { + if (strncmp(pl->line, label, len) == 0) + break; /* Found Label */ + if (strlen(pl->line) != 7 || !ISCHARDIGIT(*(pl->line)) || + !ISCHARDIGIT(*(pl->line+1)) || !ISCHARDIGIT(*(pl->line+2)) || + !ISCHARDIGIT(*(pl->line+3)) || !ISCHARDIGIT(*(pl->line+4)) || + *(pl->line+5) != '$') + { + return FALSE; /* non-local label encountered */ + } + } + } + if (!pl) + return FALSE; /* did not find the label */ + pl = pl->next; + while (pl && (pl->isDebug || pl->isComment)) + pl = pl->next; + if (!pl || !pl->line) + return FALSE; /* next line not valid */ + p = pl->line; + while (*p && ISCHARSPACE(*p)) + p++; + + if (TARGET_MCS51_LIKE) + jpInst = "ljmp"; + if (TARGET_IS_HC08) + jpInst = "jmp"; + if (TARGET_Z80_LIKE) + jpInst = "jp"; + len = strlen(jpInst); + if (strncmp(p, jpInst, len) != 0) + return FALSE; /* next line is no jump */ + p += len; + while (*p && ISCHARSPACE(*p)) + p++; + + q = p; + while (*q && *q!=';') + q++; + while (q>p && ISCHARSPACE(*q)) + q--; + len = q-p; + if (len == 0) + return FALSE; /* no destination? */ + if (TARGET_Z80_LIKE) + { + while (q>p && *q!=',') + q--; + if (*q==',') + return FALSE; /* conditional jump */ + } + if (strcmp(p, q) == 0) + return FALSE; /* labels are equal */ + /* now put the destination in %6 */ + bindVar (6, &p, &vars); + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* okToRemoveSLOC - Check if label %1 is a SLOC and not other */ +/* usage of it in the code depends on a value from this section */ +/*-----------------------------------------------------------------*/ +FBYNAME (okToRemoveSLOC) +{ + const lineNode *pl; + const char *sloc, *p; + int dummy1, dummy2, dummy3; + + /* assumes that %1 as the SLOC name */ + sloc = hTabItemWithKey (vars, 1); + if (sloc == NULL) return FALSE; + p = strstr(sloc, "sloc"); + if (p == NULL) return FALSE; + p += 4; + if (sscanf(p, "%d_%d_%d", &dummy1, &dummy2, &dummy3) != 3) return FALSE; + /*TODO: ultra-paranoid: get funtion name from "head" and check that */ + /* the sloc name begins with that. Probably not really necessary */ + + /* Look for any occurance of this SLOC before the peephole match */ + for (pl = currPl->prev; pl; pl = pl->prev) { + if (pl->line && !pl->isDebug && !pl->isComment + && *pl->line != ';' && strstr(pl->line, sloc)) + return FALSE; + } + /* Look for any occurance of this SLOC after the peephole match */ + for (pl = endPl->next; pl; pl = pl->next) { + if (pl->line && !pl->isDebug && !pl->isComment + && *pl->line != ';' && strstr(pl->line, sloc)) + return FALSE; + } + return TRUE; /* safe for a peephole to remove it :) */ +} + +/*-----------------------------------------------------------------*/ +/* deadMove - Check, if a pop/push pair can be removed */ +/*-----------------------------------------------------------------*/ +FBYNAME (deadMove) +{ + const char *reg = hTabItemWithKey (vars, 1); + + if (port->peep.deadMove) + return port->peep.deadMove (reg, currPl, head); + + fprintf (stderr, "Function deadMove not initialized in port structure\n"); + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* notUsed - Check, if value in register is not read again */ +/*-----------------------------------------------------------------*/ +FBYNAME (notUsed) +{ + const char *what; + + if(cmdLine[0] != '\'') + what = hTabItemWithKey (vars, 1); + else + { + cmdLine[strlen(cmdLine) - 1] = 0; + what = cmdLine + 1; + } + + if (port->peep.notUsed) + return port->peep.notUsed (what, endPl, head); + + fprintf (stderr, "Function notUsed not initialized in port structure\n"); + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* operandsNotSame - check if %1 & %2 are the same */ +/*-----------------------------------------------------------------*/ +FBYNAME (operandsNotSame) +{ + char *op1 = hTabItemWithKey (vars, 1); + char *op2 = hTabItemWithKey (vars, 2); + + if (strcmp (op1, op2) == 0) + return FALSE; + else + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* operandsNotSame3- check if any pair of %1,%2,%3 are the same */ +/*-----------------------------------------------------------------*/ +FBYNAME (operandsNotSame3) +{ + char *op1 = hTabItemWithKey (vars, 1); + char *op2 = hTabItemWithKey (vars, 2); + char *op3 = hTabItemWithKey (vars, 3); + + if ( (strcmp (op1, op2) == 0) || + (strcmp (op1, op3) == 0) || + (strcmp (op2, op3) == 0) ) + return FALSE; + else + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* operandsNotSame4- check if any pair of %1,%2,%3,.. are the same */ +/*-----------------------------------------------------------------*/ +FBYNAME (operandsNotSame4) +{ + char *op1 = hTabItemWithKey (vars, 1); + char *op2 = hTabItemWithKey (vars, 2); + char *op3 = hTabItemWithKey (vars, 3); + char *op4 = hTabItemWithKey (vars, 4); + + if ( (strcmp (op1, op2) == 0) || + (strcmp (op1, op3) == 0) || + (strcmp (op1, op4) == 0) || + (strcmp (op2, op3) == 0) || + (strcmp (op2, op4) == 0) || + (strcmp (op3, op4) == 0) ) + return FALSE; + else + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* operandsNotSame5- check if any pair of %1,%2,%3,.. are the same */ +/*-----------------------------------------------------------------*/ +FBYNAME (operandsNotSame5) +{ + char *op1 = hTabItemWithKey (vars, 1); + char *op2 = hTabItemWithKey (vars, 2); + char *op3 = hTabItemWithKey (vars, 3); + char *op4 = hTabItemWithKey (vars, 4); + char *op5 = hTabItemWithKey (vars, 5); + + if ( (strcmp (op1, op2) == 0) || + (strcmp (op1, op3) == 0) || + (strcmp (op1, op4) == 0) || + (strcmp (op1, op5) == 0) || + (strcmp (op2, op3) == 0) || + (strcmp (op2, op4) == 0) || + (strcmp (op2, op5) == 0) || + (strcmp (op3, op4) == 0) || + (strcmp (op3, op5) == 0) || + (strcmp (op4, op5) == 0) ) + return FALSE; + else + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* operandsNotSame6- check if any pair of %1,%2,%3,.. are the same */ +/*-----------------------------------------------------------------*/ +FBYNAME (operandsNotSame6) +{ + char *op1 = hTabItemWithKey (vars, 1); + char *op2 = hTabItemWithKey (vars, 2); + char *op3 = hTabItemWithKey (vars, 3); + char *op4 = hTabItemWithKey (vars, 4); + char *op5 = hTabItemWithKey (vars, 5); + char *op6 = hTabItemWithKey (vars, 6); + + if ( (strcmp (op1, op2) == 0) || + (strcmp (op1, op3) == 0) || + (strcmp (op1, op4) == 0) || + (strcmp (op1, op5) == 0) || + (strcmp (op1, op6) == 0) || + (strcmp (op2, op3) == 0) || + (strcmp (op2, op4) == 0) || + (strcmp (op2, op5) == 0) || + (strcmp (op2, op6) == 0) || + (strcmp (op3, op4) == 0) || + (strcmp (op3, op5) == 0) || + (strcmp (op3, op6) == 0) || + (strcmp (op4, op5) == 0) || + (strcmp (op4, op6) == 0) || + (strcmp (op5, op6) == 0) ) + return FALSE; + else + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* operandsNotSame7- check if any pair of %1,%2,%3,.. are the same */ +/*-----------------------------------------------------------------*/ +FBYNAME (operandsNotSame7) +{ + char *op1 = hTabItemWithKey (vars, 1); + char *op2 = hTabItemWithKey (vars, 2); + char *op3 = hTabItemWithKey (vars, 3); + char *op4 = hTabItemWithKey (vars, 4); + char *op5 = hTabItemWithKey (vars, 5); + char *op6 = hTabItemWithKey (vars, 6); + char *op7 = hTabItemWithKey (vars, 7); + + if ( (strcmp (op1, op2) == 0) || + (strcmp (op1, op3) == 0) || + (strcmp (op1, op4) == 0) || + (strcmp (op1, op5) == 0) || + (strcmp (op1, op6) == 0) || + (strcmp (op1, op7) == 0) || + (strcmp (op2, op3) == 0) || + (strcmp (op2, op4) == 0) || + (strcmp (op2, op5) == 0) || + (strcmp (op2, op6) == 0) || + (strcmp (op2, op7) == 0) || + (strcmp (op3, op4) == 0) || + (strcmp (op3, op5) == 0) || + (strcmp (op3, op6) == 0) || + (strcmp (op3, op7) == 0) || + (strcmp (op4, op5) == 0) || + (strcmp (op4, op6) == 0) || + (strcmp (op4, op7) == 0) || + (strcmp (op5, op6) == 0) || + (strcmp (op5, op7) == 0) || + (strcmp (op6, op7) == 0) ) + return FALSE; + else + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* operandsNotSame8- check if any pair of %1,%2,%3,.. are the same */ +/*-----------------------------------------------------------------*/ +FBYNAME (operandsNotSame8) +{ + char *op1 = hTabItemWithKey (vars, 1); + char *op2 = hTabItemWithKey (vars, 2); + char *op3 = hTabItemWithKey (vars, 3); + char *op4 = hTabItemWithKey (vars, 4); + char *op5 = hTabItemWithKey (vars, 5); + char *op6 = hTabItemWithKey (vars, 6); + char *op7 = hTabItemWithKey (vars, 7); + char *op8 = hTabItemWithKey (vars, 8); + + if ( (strcmp (op1, op2) == 0) || + (strcmp (op1, op3) == 0) || + (strcmp (op1, op4) == 0) || + (strcmp (op1, op5) == 0) || + (strcmp (op1, op6) == 0) || + (strcmp (op1, op7) == 0) || + (strcmp (op1, op8) == 0) || + (strcmp (op2, op3) == 0) || + (strcmp (op2, op4) == 0) || + (strcmp (op2, op5) == 0) || + (strcmp (op2, op6) == 0) || + (strcmp (op2, op7) == 0) || + (strcmp (op2, op8) == 0) || + (strcmp (op3, op4) == 0) || + (strcmp (op3, op5) == 0) || + (strcmp (op3, op6) == 0) || + (strcmp (op3, op7) == 0) || + (strcmp (op3, op8) == 0) || + (strcmp (op4, op5) == 0) || + (strcmp (op4, op6) == 0) || + (strcmp (op4, op7) == 0) || + (strcmp (op4, op8) == 0) || + (strcmp (op5, op6) == 0) || + (strcmp (op5, op7) == 0) || + (strcmp (op5, op8) == 0) || + (strcmp (op6, op7) == 0) || + (strcmp (op6, op8) == 0) || + (strcmp (op7, op8) == 0) ) + return FALSE; + else + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* labelHashEntry- searches for a label in the list labelHash */ +/* Builds labelHash, if it does not yet exist. */ +/* Returns the labelHashEntry or NULL */ +/*-----------------------------------------------------------------*/ +labelHashEntry * +getLabelRef (const char *label, lineNode *head) +{ + labelHashEntry *entry; + + /* If we don't have the label hash table yet, build it. */ + if (!labelHash) + { + buildLabelRefCountHash (head); + } + + entry = hTabFirstItemWK (labelHash, hashSymbolName (label)); + + while (entry) + { + if (!strcmp (label, entry->name)) + { + break; + } + entry = hTabNextItemWK (labelHash); + } + return entry; +} + +/* labelRefCount: + + * takes two parameters: a variable (bound to a label name) + * and an expected reference count. + * + * Returns TRUE if that label is defined and referenced exactly + * the given number of times. + */ +FBYNAME (labelRefCount) +{ + int varNumber, expectedRefCount; + bool rc = FALSE; + + if (sscanf (cmdLine, "%*[ \t%]%d %d", &varNumber, &expectedRefCount) == 2) + { + char *label = hTabItemWithKey (vars, varNumber); + + if (label) + { + labelHashEntry *entry = getLabelRef (label, head); + + if (entry) + { +#if 0 + /* debug spew. */ + fprintf (stderr, "labelRefCount: %s has refCount %d, want %d\n", + label, entry->refCount, expectedRefCount); +#endif + + rc = (expectedRefCount == entry->refCount); + } + else + { + fprintf (stderr, "*** internal error: no label has entry for" + " %s in labelRefCount peephole.\n", + label); + } + } + else + { + fprintf (stderr, "*** internal error: var %d not bound" + " in peephole labelRefCount rule.\n", + varNumber); + } + + } + else + { + fprintf (stderr, + "*** internal error: labelRefCount peephole restriction" + " malformed: %s\n", cmdLine); + } + return rc; +} + +/* labelRefCountChange: + * takes two parameters: a variable (bound to a label name) + * and a signed int for changing the reference count. + * + * Please note, this function is not a conditional. It unconditionally + * changes the label. It should be passed as the 'last' function + * so it only is applied if all other conditions have been met. + * + * should always return TRUE + */ +FBYNAME (labelRefCountChange) +{ + int varNumber, RefCountDelta; + bool rc = FALSE; + + /* If we don't have the label hash table yet, build it. */ + if (!labelHash) + { + buildLabelRefCountHash (head); + } + + if (sscanf (cmdLine, "%*[ \t%]%d %i", &varNumber, &RefCountDelta) == 2) + { + char *label = hTabItemWithKey (vars, varNumber); + + if (label) + { + labelHashEntry *entry; + + entry = hTabFirstItemWK (labelHash, hashSymbolName (label)); + + while (entry) + { + if (!strcmp (label, entry->name)) + { + break; + } + entry = hTabNextItemWK (labelHash); + } + if (entry) + { + if (0 <= entry->refCount + RefCountDelta) + { + entry->refCount += RefCountDelta; + rc = TRUE; + } + else + { + fprintf (stderr, "*** internal error: label %s may not get" + " negative refCount in %s peephole.\n", + label, __FUNCTION__); + } + } + else + { + fprintf (stderr, "*** internal error: no label has entry for" + " %s in %s peephole.\n", + label, __FUNCTION__); + } + } + else + { + fprintf (stderr, "*** internal error: var %d not bound" + " in peephole %s rule.\n", + varNumber, __FUNCTION__); + } + } + else + { + fprintf (stderr, + "*** internal error: labelRefCount peephole restriction" + " malformed: %s\n", cmdLine); + } + return rc; +} + +/* Within the context of the lines currPl through endPl, determine +** if the variable var contains a symbol that is volatile. Returns +** TRUE only if it is certain that this was not volatile (the symbol +** was found and not volatile, or var was a constant or CPU register). +** Returns FALSE if the symbol was found and volatile, the symbol was +** not found, or var was a indirect/pointer addressing mode. +*/ +static bool +notVolatileVariable(char *var, lineNode *currPl, lineNode *endPl) +{ + char symname[SDCC_NAME_MAX + 1]; + char *p = symname; + char *vp = var; + lineNode *cl; + operand *op; + iCode *last_ic; + + /* Can't tell if indirect accesses are volatile or not, so + ** assume they are, just to be safe. + */ + if (TARGET_IS_MCS51 || TARGET_IS_DS390 || TARGET_IS_DS400) + { + if (*var=='@') + return FALSE; + } + if (TARGET_IS_Z80 || TARGET_IS_GBZ80) + { + if (strstr(var,"(bc)")) + return FALSE; + if (strstr(var,"(de)")) + return FALSE; + if (strstr(var,"(hl)")) + return FALSE; + if (strstr(var,"(ix")) + return FALSE; + if (strstr(var,"(iy")) + return FALSE; + } + + /* Extract a symbol name from the variable */ + while (*vp && (*vp!='_')) + vp++; + while (*vp && (ISCHARALNUM(*vp) || *vp=='_')) + *p++ = *vp++; + *p='\0'; + + if (!symname[0]) + { + /* Nothing resembling a symbol name was found, so it can't + be volatile + */ + return TRUE; + } + + last_ic = NULL; + for (cl = currPl; cl!=endPl->next; cl = cl->next) + { + if (cl->ic && (cl->ic!=last_ic)) + { + last_ic = cl->ic; + switch (cl->ic->op) + { + case IFX: + op = IC_COND (cl->ic); + if (IS_SYMOP (op) && + ( !strcmp(OP_SYMBOL (op)->rname, symname) || + (OP_SYMBOL (op)->isspilt && + SPIL_LOC (op) && + !strcmp(SPIL_LOC (op)->rname, symname)) )) + { + return !op->isvolatile; + } + case JUMPTABLE: + op = IC_JTCOND (cl->ic); + if (IS_SYMOP (op) && + ( !strcmp(OP_SYMBOL (op)->rname, symname) || + (OP_SYMBOL (op)->isspilt && + SPIL_LOC (op) && + !strcmp(SPIL_LOC (op)->rname, symname)) )) + { + return !op->isvolatile; + } + default: + op = IC_LEFT (cl->ic); + if (IS_SYMOP (op) && + ( !strcmp(OP_SYMBOL (op)->rname, symname) || + (OP_SYMBOL (op)->isspilt && + SPIL_LOC (op) && + !strcmp(SPIL_LOC (op)->rname, symname)) )) + { + return !op->isvolatile; + } + op = IC_RIGHT (cl->ic); + if (IS_SYMOP (op) && + ( !strcmp(OP_SYMBOL (op)->rname, symname) || + (OP_SYMBOL (op)->isspilt && + SPIL_LOC (op) && + !strcmp(SPIL_LOC (op)->rname, symname)) )) + { + return !op->isvolatile; + } + op = IC_RESULT (cl->ic); + if (IS_SYMOP (op) && + ( !strcmp(OP_SYMBOL (op)->rname, symname) || + (OP_SYMBOL (op)->isspilt && + SPIL_LOC (op) && + !strcmp(SPIL_LOC (op)->rname, symname)) )) + { + return !op->isvolatile; + } + } + } + } + + /* Couldn't find the symbol for some reason. Assume volatile. */ + return FALSE; +} + +/* notVolatile: + * + * This rule restriction has two different behaviours depending on + * the number of parameters given. + * + * if notVolatile (no parameters given) + * The rule is applied only if none of the iCodes originating + * the matched pattern reference a volatile operand. + * + * if notVolatile %1 ... (one or more parameters given) + * The rule is applied if the parameters are not expressions + * containing volatile symbols and are not pointer accesses. + * + */ +FBYNAME (notVolatile) +{ + int varNumber; + char *var; + bool notvol; + char *digitend; + lineNode *cl; + operand *op; + + if (!cmdLine) + { + /* If no parameters given, just scan the iCodes for volatile operands */ + for (cl = currPl; cl!=endPl->next; cl = cl->next) + { + if (cl->ic) + { + switch (cl->ic->op) + { + case IFX: + op = IC_COND (cl->ic); + if (IS_SYMOP (op) && op->isvolatile) + return FALSE; + case JUMPTABLE: + op = IC_JTCOND (cl->ic); + if (IS_SYMOP (op) && op->isvolatile) + return FALSE; + default: + op = IC_LEFT (cl->ic); + if (IS_SYMOP (op) && op->isvolatile) + return FALSE; + op = IC_RIGHT (cl->ic); + if (IS_SYMOP (op) && op->isvolatile) + return FALSE; + op = IC_RESULT (cl->ic); + if (IS_SYMOP (op) && op->isvolatile) + return FALSE; + } + } + } + return TRUE; + } + + /* There were parameters; check the volatility of each */ + while (*cmdLine && ISCHARSPACE(*cmdLine)) + cmdLine++; + while (*cmdLine) + { + if (*cmdLine!='%') + goto error; + cmdLine++; + if (!ISCHARDIGIT(*cmdLine)) + goto error; + varNumber = strtol(cmdLine, &digitend, 10); + cmdLine = digitend; + while (*cmdLine && ISCHARSPACE(*cmdLine)) + cmdLine++; + + var = hTabItemWithKey (vars, varNumber); + + if (var) + { + notvol = notVolatileVariable (var, currPl, endPl); + if (!notvol) + return FALSE; + } + else + { + fprintf (stderr, "*** internal error: var %d not bound" + " in peephole notVolatile rule.\n", + varNumber); + return FALSE; + } + } + + return TRUE; + +error: + fprintf (stderr, + "*** internal error: notVolatile peephole restriction" + " malformed: %s\n", cmdLine); + return FALSE; +} + +/*------------------------------------------------------------------*/ +/* setFromConditionArgs - parse a peephole condition's arguments */ +/* to produce a set of strings, one per argument. Variables %x will */ +/* be replaced with their values. String literals (in single quotes)*/ +/* are accepted and return in unquoted form. */ +/*------------------------------------------------------------------*/ +static set * +setFromConditionArgs (char *cmdLine, hTab * vars) +{ + int varNumber; + char *var; + char *digitend; + set *operands = NULL; + + if (!cmdLine) + return NULL; + + while (*cmdLine && ISCHARSPACE(*cmdLine)) + cmdLine++; + + while (*cmdLine) + { + if (*cmdLine == '%') + { + cmdLine++; + if (!ISCHARDIGIT(*cmdLine)) + goto error; + varNumber = strtol(cmdLine, &digitend, 10); + cmdLine = digitend; + + var = hTabItemWithKey (vars, varNumber); + + if (var) + { + addSetHead (&operands, var); + } + else + goto error; + } + else if (*cmdLine == '\'' ) + { + char quote = *cmdLine; + + var = ++cmdLine; + while (*cmdLine && *cmdLine != quote) + cmdLine++; + if (*cmdLine == quote) + *cmdLine++ = '\0'; + else + goto error; + addSetHead (&operands, var); + } + else + goto error; + + while (*cmdLine && ISCHARSPACE(*cmdLine)) + cmdLine++; + } + + return operands; + +error: + deleteSet (&operands); + return NULL; +} + +static const char * +operandBaseName (const char *op) +{ + if (TARGET_IS_MCS51 || TARGET_IS_DS390 || TARGET_IS_DS400) + { + if (!strcmp (op, "acc") || !strncmp (op, "acc.", 4)) + return "a"; + if (!strncmp (op, "ar", 2) && ISCHARDIGIT(*(op+2)) && !*(op+3)) + return op+1; + // bug 1739475, temp fix + if (op[0] == '@') + return operandBaseName(op+1); + } + + return op; +} + +/*-------------------------------------------------------------------*/ +/* operandsNotRelated - returns true if the condition's operands are */ +/* not related (taking into account register name aliases). N-way */ +/* comparison performed between all operands. */ +/*-------------------------------------------------------------------*/ +FBYNAME (operandsNotRelated) +{ + set *operands; + const char *op1, *op2; + + operands = setFromConditionArgs (cmdLine, vars); + + if (!operands) + { + fprintf (stderr, + "*** internal error: operandsNotRelated peephole restriction" + " malformed: %s\n", cmdLine); + return FALSE; + } + + while ((op1 = setFirstItem (operands))) + { + deleteSetItem (&operands, (void*)op1); + op1 = operandBaseName (op1); + + for (op2 = setFirstItem (operands); op2; op2 = setNextItem (operands)) + { + op2 = operandBaseName (op2); + if (strcmp (op1, op2) == 0) + { + deleteSet (&operands); + return FALSE; + } + } + } + + deleteSet (&operands); + return TRUE; +} + +/*-------------------------------------------------------------------*/ +/* operandsLiteral - returns true of the condition's operands are */ +/* literals. */ +/*-------------------------------------------------------------------*/ +FBYNAME (operandsLiteral) +{ + set *operands; + const char *op; + + operands = setFromConditionArgs (cmdLine, vars); + + if (!operands) + { + fprintf (stderr, + "*** internal error: operandsLiteral peephole restriction" + " malformed: %s\n", cmdLine); + return FALSE; + } + + for (op = setFirstItem (operands); op; op = setNextItem (operands)) + { + if (!isdigit(*op)) + { + deleteSet (&operands); + return FALSE; + } + } + + deleteSet (&operands); + return TRUE; +} + +static const struct ftab +{ + char *fname; + int (*func) (hTab *, lineNode *, lineNode *, lineNode *, char *); +} +ftab[] = // sorted on the number of times used +{ // in the peephole rules on 2007-10-29 + { + "labelRefCount", labelRefCount //105 + }, + { + "notVolatile", notVolatile //85 + }, + { + "labelRefCountChange", labelRefCountChange //74 + }, + { + "labelInRange", labelInRange //37 + }, + { + "labelJTInRange", labelJTInRange //13 + }, + { + "operandsNotRelated", operandsNotRelated //9 + }, + { + "24bitMode", flat24bitMode //9 + }, + { + "operandsNotSame", operandsNotSame //8 + }, + { + "operandsNotSame3", operandsNotSame3 + }, + { + "operandsNotSame4", operandsNotSame4 + }, + { + "operandsNotSame5", operandsNotSame5 + }, + { + "operandsNotSame6", operandsNotSame6 + }, + { + "operandsNotSame7", operandsNotSame7 + }, + { + "operandsNotSame8", operandsNotSame8 + }, + { + "xramMovcOption", xramMovcOption + }, + { + "portIsDS390", portIsDS390 + }, + { + "labelIsReturnOnly", labelIsReturnOnly + }, + { + "labelIsUncondJump", labelIsUncondJump + }, + { + "okToRemoveSLOC", okToRemoveSLOC + }, + { + "deadMove", deadMove + }, + { + "operandsLiteral", operandsLiteral + }, + { + "useAcallAjmp", useAcallAjmp + }, + { + "notUsed", notUsed + } +}; +/*-----------------------------------------------------------------*/ +/* callFuncByName - calls a function as defined in the table */ +/*-----------------------------------------------------------------*/ +static int +callFuncByName (char *fname, + hTab * vars, + lineNode * currPl, /* first source line matched */ + lineNode * endPl, /* last source line matched */ + lineNode * head) +{ + int i; + char *cmdCopy, *funcName, *funcArgs, *cmdTerm; + char c; + int rc; + + /* Isolate the function name part (we are passed the full condition + * string including arguments) + */ + cmdTerm = cmdCopy = Safe_strdup(fname); + + do + { + funcArgs = funcName = cmdTerm; + while ((c = *funcArgs) && c != ' ' && c != '\t' && c != '(') + funcArgs++; + *funcArgs = '\0'; /* terminate the function name */ + if (c) + funcArgs++; + + /* Find the start of the arguments */ + if (c == ' ' || c == '\t') + while ((c = *funcArgs) && (c == ' ' || c == '\t')) + funcArgs++; + + /* If the arguments started with an opening parenthesis, */ + /* use the closing parenthesis for the end of the */ + /* arguments and look for the start of another condition */ + /* that can optionally follow. If there was no opening */ + /* parethesis, then everything that follows are arguments */ + /* and there can be no additional conditions. */ + if (c == '(') + { + + int num_parenthesis = 0; + cmdTerm = funcArgs; + + while ((c = *cmdTerm) && (c != ')' || num_parenthesis)) + { + if (c == '(') + num_parenthesis++; + else if (c == ')') + num_parenthesis--; + cmdTerm++; + } + *cmdTerm = '\0'; /* terminate the arguments */ + if (c == ')') + { + cmdTerm++; + while ((c = *cmdTerm) && (c == ' ' || c == '\t' || c == ',')) + cmdTerm++; + if (!*cmdTerm) + cmdTerm = NULL; + } + else + cmdTerm = NULL; /* closing parenthesis missing */ + } + else + cmdTerm = NULL; + + if (!*funcArgs) + funcArgs = NULL; + + rc = -1; + for (i = 0; i < ((sizeof (ftab)) / (sizeof (struct ftab))); i++) + { + if (strcmp (ftab[i].fname, funcName) == 0) + { + rc = (*ftab[i].func) (vars, currPl, endPl, head, funcArgs); + break; + } + } + + if (rc == -1) + { + fprintf (stderr, + "could not find named function \"%s\" in " + "peephole function table\n", + funcName); + // If the function couldn't be found, let's assume it's + // a bad rule and refuse it. + rc = FALSE; + break; + } + } + while (rc && cmdTerm); + + Safe_free(cmdCopy); + + return rc; +} + +/*-----------------------------------------------------------------*/ +/* printLine - prints a line chain into a given file */ +/*-----------------------------------------------------------------*/ +void +printLine (lineNode * head, struct dbuf_s * oBuf) +{ + iCode *last_ic = NULL; + bool debug_iCode_tracking = (getenv("DEBUG_ICODE_TRACKING")!=NULL); + + while (head) + { + if (head->ic!=last_ic) + { + last_ic = head->ic; + if (debug_iCode_tracking) + { + if (head->ic) + dbuf_printf (oBuf, "; block = %d, seq = %d\n", + head->ic->block, head->ic->seq); + else + dbuf_append_str (oBuf, "; iCode lost\n"); + } + } + + /* don't indent comments & labels */ + if (head->line && + (head->isComment || head->isLabel)) { + dbuf_printf (oBuf, "%s\n", head->line); + } else { + if (head->isInline && *head->line=='#') { + // comment out preprocessor directives in inline asm + dbuf_append_char (oBuf, ';'); + } + dbuf_printf (oBuf, "\t%s\n", head->line); + } + head = head->next; + } +} + +/*-----------------------------------------------------------------*/ +/* newPeepRule - creates a new peeprule and attach it to the root */ +/*-----------------------------------------------------------------*/ +static peepRule * +newPeepRule (lineNode * match, + lineNode * replace, + char *cond, + int restart) +{ + peepRule *pr; + + pr = Safe_alloc ( sizeof (peepRule)); + pr->match = match; + pr->replace = replace; + pr->restart = restart; + + if (cond && *cond) + { + pr->cond = Safe_strdup (cond); + } + else + pr->cond = NULL; + + pr->vars = newHashTable (100); + + /* if root is empty */ + if (!rootRules) + rootRules = currRule = pr; + else + currRule = currRule->next = pr; + + return pr; +} + +/*-----------------------------------------------------------------*/ +/* newLineNode - creates a new peep line */ +/*-----------------------------------------------------------------*/ +lineNode * +newLineNode (const char *line) +{ + lineNode *pl; + + pl = Safe_alloc ( sizeof (lineNode)); + pl->line = Safe_strdup (line); + pl->ic = NULL; + return pl; +} + +/*-----------------------------------------------------------------*/ +/* connectLine - connects two lines */ +/*-----------------------------------------------------------------*/ +lineNode * +connectLine (lineNode * pl1, lineNode * pl2) +{ + if (!pl1 || !pl2) + { + fprintf (stderr, "trying to connect null line\n"); + return NULL; + } + + pl2->prev = pl1; + pl1->next = pl2; + + return pl2; +} + +#define SKIP_SPACE(x,y) { while (*x && (ISCHARSPACE(*x) || *x == '\n')) x++; \ + if (!*x) { fprintf(stderr,y); return ; } } + +#define EXPECT_STR(x,y,z) { while (*x && strncmp(x,y,strlen(y))) x++ ; \ + if (!*x) { fprintf(stderr,z); return ; } } +#define EXPECT_CHR(x,y,z) { while (*x && *x != y) x++ ; \ + if (!*x) { fprintf(stderr,z); return ; } } + +/*-----------------------------------------------------------------*/ +/* getPeepLine - parses the peep lines */ +/*-----------------------------------------------------------------*/ +static void +getPeepLine (lineNode ** head, char **bpp) +{ + char lines[MAX_PATTERN_LEN]; + char *lp; + int isComment; + + lineNode *currL = NULL; + char *bp = *bpp; + while (1) + { + + if (!*bp) + { + fprintf (stderr, "unexpected end of match pattern\n"); + return; + } + + if (*bp == '\n') + { + bp++; + while (ISCHARSPACE (*bp) || + *bp == '\n') + bp++; + } + + if (*bp == '}') + { + bp++; + break; + } + + /* read till end of line */ + lp = lines; + while ((*bp != '\n' && *bp != '}') && *bp) + *lp++ = *bp++; + *lp = '\0'; + + lp = lines; + while (*lp && ISCHARSPACE(*lp)) + lp++; + isComment = (*lp == ';'); + + if (!isComment || (isComment && !options.noPeepComments)) + { + const char *dummy1; + int dummy2; + + if (!currL) + *head = currL = newLineNode (lines); + else + currL = connectLine (currL, newLineNode (lines)); + currL->isComment = isComment; + currL->isLabel = isLabelDefinition (currL->line, &dummy1, &dummy2, + TRUE); + } + + } + + *bpp = bp; +} + +/*-----------------------------------------------------------------*/ +/* readRules - reads the rules from a string buffer */ +/*-----------------------------------------------------------------*/ +static void +readRules (char *bp) +{ + char restart = 0; + char lines[MAX_PATTERN_LEN]; + char *lp, *rp; + lineNode *match; + lineNode *replace; + lineNode *currL = NULL; + + if (!bp) + return; +top: + restart = 0; + /* look for the token "replace" that is the + start of a rule */ + while (*bp && strncmp (bp, "replace", 7)) + bp++; + + /* if not found */ + if (!*bp) + return; + + /* then look for either "restart" or '{' */ + while (strncmp (bp, "restart", 7) && + *bp != '{' && bp) + bp++; + + /* not found */ + if (!*bp) + { + fprintf (stderr, "expected 'restart' or '{'\n"); + return; + } + + /* if brace */ + if (*bp == '{') + bp++; + else + { /* must be restart */ + restart++; + bp += strlen ("restart"); + /* look for '{' */ + EXPECT_CHR (bp, '{', "expected '{'\n"); + bp++; + } + + /* skip thru all the blank space */ + SKIP_SPACE (bp, "unexpected end of rule\n"); + + match = replace = currL = NULL; + /* we are the start of a rule */ + getPeepLine (&match, &bp); + + /* now look for by */ + EXPECT_STR (bp, "by", "expected 'by'\n"); + + /* then look for a '{' */ + EXPECT_CHR (bp, '{', "expected '{'\n"); + bp++; + + /* save char position (needed for generating error msg) */ + rp = bp; + + SKIP_SPACE (bp, "unexpected end of rule\n"); + getPeepLine (&replace, &bp); + + /* look for a 'if' */ + while ((ISCHARSPACE (*bp) || *bp == '\n') && *bp) + bp++; + + if (strncmp (bp, "if", 2) == 0) + { + bp += 2; + while ((ISCHARSPACE (*bp) || *bp == '\n') && *bp) + bp++; + if (!*bp) + { + fprintf (stderr, "expected condition name\n"); + return; + } + + /* look for the condition */ + lp = lines; + while (*bp && (*bp != '\n')) + { + *lp++ = *bp++; + } + *lp = '\0'; + + newPeepRule (match, replace, lines, restart); + } + else + { + if (*bp && strncmp (bp, "replace", 7)) + { + /* not the start of a new peeprule, so "if" should be here */ + + char strbuff[1000]; + char *cp; + + /* go to the start of the line following "{" of the "by" token */ + while (*rp && (*rp == '\n')) + rp++; + + /* copy text of rule starting with line after "by {" */ + cp = strbuff; + while (*rp && (rp < bp) && ((cp - strbuff) < sizeof(strbuff))) + *cp++ = *rp++; + + /* and now the rest of the line */ + while (*rp && (*rp != '\n') && ((cp - strbuff) < sizeof(strbuff))) + *cp++ = *rp++; + + *cp = '\0'; + fprintf (stderr, "%s\nexpected '} if ...'\n", strbuff); + return; + } + newPeepRule (match, replace, NULL, restart); + } + goto top; + +} + +/*-----------------------------------------------------------------*/ +/* keyForVar - returns the numeric key for a var */ +/*-----------------------------------------------------------------*/ +static int +keyForVar (char *d) +{ + int i = 0; + + while (ISCHARDIGIT (*d)) + { + i *= 10; + i += (*d++ - '0'); + } + + return i; +} + +/*-----------------------------------------------------------------*/ +/* bindVar - binds a value to a variable in the given hashtable */ +/*-----------------------------------------------------------------*/ +static void +bindVar (int key, char **s, hTab ** vtab) +{ + char vval[MAX_PATTERN_LEN]; + char *vvx; + char *vv = vval; + + /* first get the value of the variable */ + vvx = *s; + /* the value is ended by a ',' or space or newline or null or ) */ + while (*vvx && + *vvx != ',' && + !ISCHARSPACE (*vvx) && + *vvx != '\n' && + *vvx != ':' && + *vvx != ')') + { + char ubb = 0; + /* if we find a '(' then we need to balance it */ + if (*vvx == '(') + { + ubb++; + while (ubb) + { + *vv++ = *vvx++; + if (*vvx == '(') + ubb++; + if (*vvx == ')') + ubb--; + } + // include the trailing ')' + *vv++ = *vvx++; + } + else + *vv++ = *vvx++; + } + *s = vvx; + *vv = '\0'; + /* got value */ + vvx = traceAlloc (&_G.values, Safe_strdup(vval)); + + hTabAddItem (vtab, key, vvx); +} + +/*-----------------------------------------------------------------*/ +/* matchLine - matches one line */ +/*-----------------------------------------------------------------*/ +static bool +matchLine (char *s, char *d, hTab ** vars) +{ + if (!s || !(*s)) + return FALSE; + + while (*s && *d) + { + /* skip white space in both */ + while (ISCHARSPACE (*s)) + s++; + while (ISCHARSPACE (*d)) + d++; + + /* if the destination is a var */ + if (*d == '%' && ISCHARDIGIT (*(d + 1)) && vars) + { + char *v = hTabItemWithKey (*vars, keyForVar (d + 1)); + /* if the variable is already bound + then it MUST match with dest */ + if (v) + { + while (*v) + if (*v++ != *s++) + return FALSE; + } + else + /* variable not bound we need to bind it */ + bindVar (keyForVar (d + 1), &s, vars); + + /* in either case go past the variable */ + d++; + while (ISCHARDIGIT (*d)) + d++; + + while (ISCHARSPACE (*s)) + s++; + while (ISCHARSPACE (*d)) + d++; + } + + /* they should be an exact match other wise */ + if (*s && *d) + { + if (*s++ != *d++) + return FALSE; + } + + } + + /* get rid of the trailing spaces + in both source & destination */ + if (*s) + while (ISCHARSPACE (*s)) + s++; + + if (*d) + while (ISCHARSPACE (*d)) + d++; + + /* after all this if only one of them + has something left over then no match */ + if (*s || *d) + return FALSE; + + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* matchRule - matches a all the rule lines */ +/*-----------------------------------------------------------------*/ +static bool +matchRule (lineNode * pl, + lineNode ** mtail, + peepRule * pr, + lineNode * head) +{ + lineNode *spl; /* source pl */ + lineNode *rpl; /* rule peep line */ + +/* setToNull((void *) &pr->vars); */ +/* pr->vars = newHashTable(100); */ + + /* for all the lines defined in the rule */ + rpl = pr->match; + spl = pl; + while (spl && rpl) + { + + /* if the source line starts with a ';' then + comment line don't process or the source line + contains == . debugger information skip it */ + if (spl->line && + (*spl->line == ';' || spl->isDebug)) + { + spl = spl->next; + continue; + } + + if (!matchLine (spl->line, rpl->line, &pr->vars)) + return FALSE; + + rpl = rpl->next; + if (rpl) + spl = spl->next; + } + + /* if rules ended */ + if (!rpl) + { + /* if this rule has additional conditions */ + if (pr->cond) + { + if (callFuncByName (pr->cond, pr->vars, pl, spl, head)) + { + *mtail = spl; + return TRUE; + } + else + return FALSE; + } + else + { + *mtail = spl; + return TRUE; + } + } + else + return FALSE; +} + +static void +reassociate_ic_down (lineNode *shead, lineNode *stail, + lineNode *rhead, lineNode *rtail) +{ + lineNode *csl; /* current source line */ + lineNode *crl; /* current replacement line */ + + csl = shead; + crl = rhead; + while (1) + { + /* skip over any comments */ + while (csl!=stail->next && csl->isComment) + csl = csl->next; + while (crl!=rtail->next && crl->isComment) + crl = crl->next; + + /* quit if we reach the end */ + if ((csl==stail->next) || (crl==rtail->next) || crl->ic) + break; + + if (matchLine(csl->line,crl->line,NULL)) + { + crl->ic = csl->ic; + csl = csl->next; + crl = crl->next; + } + else + break; + } +} + +static void +reassociate_ic_up (lineNode *shead, lineNode *stail, + lineNode *rhead, lineNode *rtail) +{ + lineNode *csl; /* current source line */ + lineNode *crl; /* current replacement line */ + + csl = stail; + crl = rtail; + while (1) + { + /* skip over any comments */ + while (csl!=shead->prev && csl->isComment) + csl = csl->prev; + while (crl!=rhead->prev && crl->isComment) + crl = crl->prev; + + /* quit if we reach the end */ + if ((csl==shead->prev) || (crl==rhead->prev) || crl->ic) + break; + + if (matchLine(csl->line,crl->line,NULL)) + { + crl->ic = csl->ic; + csl = csl->prev; + crl = crl->prev; + } + else + break; + } +} + +/*------------------------------------------------------------------*/ +/* reassociate_ic - reassociate replacement lines with origin iCode */ +/*------------------------------------------------------------------*/ +static void +reassociate_ic (lineNode *shead, lineNode *stail, + lineNode *rhead, lineNode *rtail) +{ + lineNode *csl; /* current source line */ + lineNode *crl; /* current replacement line */ + bool single_iCode; + iCode *ic; + + /* Check to see if all the source lines (excluding comments) came + ** for the same iCode + */ + ic = NULL; + for (csl=shead;csl!=stail->next;csl=csl->next) + if (csl->ic && !csl->isComment) + { + ic = csl->ic; + break; + } + single_iCode = (ic!=NULL); + for (csl=shead;csl!=stail->next;csl=csl->next) + if ((csl->ic != ic) && !csl->isComment) + { + /* More than one iCode was found. However, if it's just the + ** last line with the different iCode and it was not changed + ** in the replacement, everything else must be the first iCode. + */ + if ((csl==stail) && matchLine (stail->line, rtail->line, NULL)) + { + rtail->ic = stail->ic; + for (crl=rhead;crl!=rtail;crl=crl->next) + crl->ic = ic; + return; + } + + single_iCode = FALSE; + break; + } + + /* If all of the source lines came from the same iCode, then so have + ** all of the replacement lines too. + */ + if (single_iCode) + { + for (crl=rhead;crl!=rtail->next;crl=crl->next) + crl->ic = ic; + return; + } + + /* The source lines span iCodes, so we may end up with replacement + ** lines that we don't know which iCode(s) to associate with. Do the + ** best we can by using the following strategies: + ** 1) Start at the top and scan down. As long as the source line + ** matches the replacement line, they have the same iCode. + ** 2) Start at the bottom and scan up. As long as the source line + ** matches the replacement line, they have the same iCode. + ** 3) For any label in the source, look for a matching label in + ** the replacment. If found, they have the same iCode. From + ** these matching labels, scan down for additional matching + ** lines; if found, they also have the same iCode. + */ + + /* Strategy #1: Start at the top and scan down for matches + */ + reassociate_ic_down(shead,stail,rhead,rtail); + + /* Strategy #2: Start at the bottom and scan up for matches + */ + reassociate_ic_up(shead,stail,rhead,rtail); + + /* Strategy #3: Try to match labels + */ + csl = shead; + while (1) + { + /* skip over any comments */ + while (csl!=stail->next && csl->isComment) + csl = csl->next; + if (csl==stail->next) + break; + + if (csl->isLabel) + { + /* found a source line label; look for it in the replacment lines */ + crl = rhead; + while (1) + { + while (crl!=rtail->next && crl->isComment) + crl = crl->next; + if (crl==rtail->next) + break; + if (matchLine(csl->line, crl->line, NULL)) + { + reassociate_ic_down(csl,stail,crl,rtail); + break; + } + else + crl = crl->next; + } + } + csl = csl->next; + } + + /* Try to assign a meaningful iCode to any comment that is missing + one. Since they are comments, it's ok to make mistakes; we are just + trying to improve continuity to simplify other tests. + */ + ic = NULL; + for (crl=rtail;crl!=rhead->prev;crl=crl->prev) + { + if (!crl->ic && ic && crl->isComment) + crl->ic = ic; + ic = crl->ic; + } +} + + +/*-----------------------------------------------------------------*/ +/* replaceRule - does replacement of a matching pattern */ +/*-----------------------------------------------------------------*/ +static void +replaceRule (lineNode ** shead, lineNode * stail, peepRule * pr) +{ + lineNode *cl = NULL; + lineNode *pl = NULL, *lhead = NULL; + /* a long function name and long variable name can evaluate to + 4x max pattern length e.g. "mov dptr,((fie_var>>8)<<8)+fie_var" */ + char lb[MAX_PATTERN_LEN*4]; + char *lbp; + lineNode *comment = NULL; + + /* collect all the comment lines in the source */ + for (cl = *shead; cl != stail; cl = cl->next) + { + if (cl->line && (*cl->line == ';' || cl->isDebug)) + { + pl = (pl ? connectLine (pl, newLineNode (cl->line)) : + (comment = newLineNode (cl->line))); + pl->isDebug = cl->isDebug; + pl->isComment = cl->isComment || (*cl->line == ';'); + } + } + cl = NULL; + + /* for all the lines in the replacement pattern do */ + for (pl = pr->replace; pl; pl = pl->next) + { + char *v; + char *l; + lbp = lb; + + l = pl->line; + + while (*l) + { + /* if the line contains a variable */ + if (*l == '%' && ISCHARDIGIT (*(l + 1))) + { + v = hTabItemWithKey (pr->vars, keyForVar (l + 1)); + if (!v) + { + fprintf (stderr, "used unbound variable in replacement\n"); + l++; + continue; + } + while (*v) { + *lbp++ = *v++; + } + l++; + while (ISCHARDIGIT (*l)) { + l++; + } + continue; + } + *lbp++ = *l++; + } + + *lbp = '\0'; + if (cl) + cl = connectLine (cl, newLineNode (lb)); + else + lhead = cl = newLineNode (lb); + cl->isComment = pl->isComment; + cl->isLabel = pl->isLabel; + } + + /* add the comments if any to the head of list */ + if (comment) + { + lineNode *lc = comment; + while (lc->next) + lc = lc->next; + lc->next = lhead; + if (lhead) + lhead->prev = lc; + lhead = comment; + } + + if (lhead) + { + /* determine which iCodes the replacment lines relate to */ + reassociate_ic(*shead,stail,lhead,cl); + + /* now we need to connect / replace the original chain */ + /* if there is a prev then change it */ + if ((*shead)->prev) + { + (*shead)->prev->next = lhead; + lhead->prev = (*shead)->prev; + } + *shead = lhead; + /* now for the tail */ + if (stail && stail->next) + { + stail->next->prev = cl; + if (cl) + cl->next = stail->next; + } + } + else + { + /* the replacement is empty - delete the source lines */ + if ((*shead)->prev) + (*shead)->prev->next = stail->next; + if (stail->next) + stail->next->prev = (*shead)->prev; + *shead = stail->next; + } +} + +/* Returns TRUE if this line is a label definition. + + * If so, start will point to the start of the label name, + * and len will be it's length. + */ +bool +isLabelDefinition (const char *line, const char **start, int *len, + bool isPeepRule) +{ + const char *cp = line; + + /* This line is a label if if consists of: + * [optional whitespace] followed by identifier chars + * (alnum | $ | _ ) followed by a colon. + */ + + while (*cp && ISCHARSPACE (*cp)) + { + cp++; + } + + if (!*cp) + { + return FALSE; + } + + *start = cp; + + while (ISCHARALNUM (*cp) || (*cp == '$') || (*cp == '_') || + (isPeepRule && (*cp == '%'))) + { + cp++; + } + + if ((cp == *start) || (*cp != ':')) + { + return FALSE; + } + + *len = (cp - (*start)); + return TRUE; +} + +/* Quick & dirty string hash function. */ +static int +hashSymbolName (const char *name) +{ + int hash = 0; + + while (*name) + { + hash = (hash << 6) ^ *name; + name++; + } + + if (hash < 0) + { + hash = -hash; + } + + return hash % HTAB_SIZE; +} + +/* Build a hash of all labels in the passed set of lines + * and how many times they are referenced. + */ +static void +buildLabelRefCountHash (lineNode * head) +{ + lineNode *line; + const char *label; + int labelLen; + int i; + + assert (labelHash == NULL); + labelHash = newHashTable (HTAB_SIZE); + + /* First pass: locate all the labels. */ + for (line = head; line; line = line->next) + { + if (line->isLabel || + line->isInline) + { + /* run isLabelDefinition to: + - look for labels in inline assembler + - calculate labelLen + */ + if (isLabelDefinition (line->line, &label, &labelLen, FALSE) && + labelLen <= SDCC_NAME_MAX) + { + labelHashEntry *entry; + + entry = traceAlloc (&_G.labels, Safe_alloc(sizeof (labelHashEntry))); + + memcpy (entry->name, label, labelLen); + entry->name[labelLen] = 0; + entry->refCount = -1; + + /* Assume function entry points are referenced somewhere, */ + /* even if we can't find a reference (might be from outside */ + /* the function) */ + if (line->ic && (line->ic->op == FUNCTION)) + entry->refCount++; + + hTabAddItem (&labelHash, hashSymbolName (entry->name), entry); + } + } + } + + + /* Second pass: for each line, note all the referenced labels. */ + /* This is ugly, O(N^2) stuff. Optimizations welcome... */ + line = head; + while (line) + { + for (i = 0; i < HTAB_SIZE; i++) + { + labelHashEntry *thisEntry; + + thisEntry = hTabFirstItemWK (labelHash, i); + + while (thisEntry) + { + if (strstr (line->line, thisEntry->name)) + { + thisEntry->refCount++; + } + thisEntry = hTabNextItemWK (labelHash); + } + } + line = line->next; + } + +#if 0 + /* Spew the contents of the table. Debugging fun only. */ + for (i = 0; i < HTAB_SIZE; i++) + { + labelHashEntry *thisEntry; + + thisEntry = hTabFirstItemWK (labelHash, i); + + while (thisEntry) + { + fprintf (stderr, "label: %s ref %d\n", + thisEntry->name, thisEntry->refCount); + thisEntry = hTabNextItemWK (labelHash); + } + } +#endif +} + +/* How does this work? + peepHole + For each rule, + For each line, + Try to match + If it matches, + replace and restart. + + matchRule + matchLine + + Where is stuff allocated? + +*/ + +/*-----------------------------------------------------------------*/ +/* peepHole - matches & substitutes rules */ +/*-----------------------------------------------------------------*/ +void +peepHole (lineNode ** pls) +{ + lineNode *spl; + peepRule *pr; + lineNode *mtail = NULL; + bool restart, replaced; + +#if !OPT_DISABLE_PIC || !OPT_DISABLE_PIC16 + /* The PIC port uses a different peep hole optimizer based on "pCode" */ + if (TARGET_IS_PIC || TARGET_IS_PIC16) + return; +#endif + + assert(labelHash == NULL); + + do + { + restart = FALSE; + + /* for all rules */ + for (pr = rootRules; pr; pr = pr->next) + { + for (spl = *pls; spl; spl = replaced ? spl : spl->next) + { + replaced = FALSE; + + /* if inline assembler then no peep hole */ + if (spl->isInline) + continue; + + /* don't waste time starting a match on debug symbol + ** or comment */ + if (spl->isDebug || spl->isComment || *(spl->line)==';') + continue; + + mtail = NULL; + + /* Tidy up any data stored in the hTab */ + + /* if it matches */ + if (matchRule (spl, &mtail, pr, *pls)) + { + /* restart at the replaced line */ + replaced = TRUE; + + /* then replace */ + if (spl == *pls) + { + replaceRule (pls, mtail, pr); + spl = *pls; + } + else + replaceRule (&spl, mtail, pr); + + /* if restart rule type then + start at the top again */ + if (pr->restart) + { + restart = TRUE; + } + } + + if (pr->vars) + { + hTabDeleteAll (pr->vars); + Safe_free (pr->vars); + pr->vars = NULL; + } + + freeTrace (&_G.values); + } + } + } while (restart == TRUE); + + if (labelHash) + { + hTabDeleteAll (labelHash); + freeTrace (&_G.labels); + } + labelHash = NULL; +} + + +/*-----------------------------------------------------------------*/ +/* readFileIntoBuffer - reads a file into a string buffer */ +/*-----------------------------------------------------------------*/ +static char * +readFileIntoBuffer (char *fname) +{ + FILE *f; + char *rs = NULL; + int nch = 0; + int ch; + char lb[MAX_PATTERN_LEN]; + + if (!(f = fopen (fname, "r"))) + { + fprintf (stderr, "cannot open peep rule file\n"); + return NULL; + } + + while ((ch = fgetc (f)) != EOF) + { + lb[nch++] = ch; + + /* if we maxed out our local buffer */ + if (nch >= (MAX_PATTERN_LEN - 2)) + { + lb[nch] = '\0'; + /* copy it into allocated buffer */ + if (rs) + { + rs = Safe_realloc (rs, strlen (rs) + strlen (lb) + 1); + strncatz (rs, lb, strlen (rs) + strlen (lb) + 1); + } + else + { + rs = Safe_strdup (lb); + } + nch = 0; + } + } + + /* if some characters left over */ + if (nch) + { + lb[nch] = '\0'; + /* copy it into allocated buffer */ + if (rs) + { + rs = Safe_realloc (rs, strlen (rs) + strlen (lb) + 1); + strncatz (rs, lb, strlen (rs) + strlen (lb) + 1); + } + else + { + rs = Safe_strdup (lb); + } + } + return rs; +} + +/*-----------------------------------------------------------------*/ +/* initPeepHole - initialises the peep hole optimizer stuff */ +/*-----------------------------------------------------------------*/ +void +initPeepHole () +{ + char *s; + + /* read in the default rules */ + if (!options.nopeep) + { + readRules (port->peep.default_rules); + } + + /* if we have any additional file read it too */ + if (options.peep_file) + { + readRules (s = readFileIntoBuffer (options.peep_file)); + setToNull ((void *) &s); + /* override nopeep setting, default rules have not been read */ + options.nopeep = 0; + } + + +#if !OPT_DISABLE_PIC + /* Convert the peep rules into pcode. + NOTE: this is only support in the PIC port (at the moment) + */ + if (TARGET_IS_PIC) + peepRules2pCode(rootRules); +#endif + +#if !OPT_DISABLE_PIC16 + /* Convert the peep rules into pcode. + NOTE: this is only support in the PIC port (at the moment) + and the PIC16 port (VR 030601) + */ + if (TARGET_IS_PIC16) + pic16_peepRules2pCode(rootRules); + +#endif + +} diff --git a/src/SDCCpeeph.h b/src/SDCCpeeph.h new file mode 100644 index 0000000..0c1b2f8 --- /dev/null +++ b/src/SDCCpeeph.h @@ -0,0 +1,82 @@ +/*------------------------------------------------------------------------- + SDCCpeeph.h - Header file for The peep hole optimizer: for interpreting + the peep hole rules + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCPEEPH_H +#define SDCCPEEPH_H 1 + +#define MAX_PATTERN_LEN 128 + +struct asmLineNode; /* defined in each port */ +struct lineNode; + +typedef struct lineNode + { + char *line; + iCode *ic; + unsigned int isInline:1; + unsigned int isComment:1; + unsigned int isDebug:1; + unsigned int isLabel:1; + unsigned int visited:1; + struct asmLineNode *aln; + struct lineNode *prev; + struct lineNode *next; + } +lineNode; + +typedef struct peepRule + { + lineNode *match; + lineNode *replace; + unsigned int restart:1; + char *cond; + hTab *vars; + struct peepRule *next; + } +peepRule; + +typedef struct + { + char name[SDCC_NAME_MAX + 1]; + int refCount; + /* needed for deadMove: */ + bool passedLabel; + int jmpToCount; + } +labelHashEntry; + +bool isLabelDefinition (const char *line, const char **start, int *len, + bool isPeepRule); + +extern hTab *labelHash; +labelHashEntry *getLabelRef (const char *label, lineNode *head); + +void printLine (lineNode *, struct dbuf_s *); +lineNode *newLineNode (const char *); +lineNode *connectLine (lineNode *, lineNode *); +void initPeepHole (void); +void peepHole (lineNode **); + +#endif diff --git a/src/SDCCptropt.c b/src/SDCCptropt.c new file mode 100644 index 0000000..b3ff931 --- /dev/null +++ b/src/SDCCptropt.c @@ -0,0 +1,395 @@ +/*------------------------------------------------------------------------- + + SDCCptropt.c - source file for pointer arithmetic Optimizations + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" + +/*-----------------------------------------------------------------------*/ +/* findPointerGetSet - find the pointer get or set for a operand */ +/*-----------------------------------------------------------------------*/ +static iCode * +findPointerGetSet (iCode * sic, operand * op) +{ + iCode *ic = sic; + + for (; ic; ic = ic->next) + { + if ((POINTER_SET (ic) && isOperandEqual (op, IC_RESULT (ic))) || + (POINTER_GET (ic) && isOperandEqual (op, IC_LEFT (ic)))) + return ic; + + /* if we find any other usage or definition of op null */ + if (IC_RESULT (ic) && isOperandEqual (IC_RESULT (ic), op)) + return NULL; + + if (IC_RIGHT (ic) && isOperandEqual (IC_RIGHT (ic), op)) + return NULL; + + if (IC_LEFT (ic) && isOperandEqual (IC_LEFT (ic), op)) + return NULL; + + } + + return NULL; +} + +static int pattern1 (iCode *sic) +{ + /* this is what we do. look for sequences like + + iTempX := _SOME_POINTER_; + iTempY := _SOME_POINTER_ + nn ; nn = sizeof (pointed to object) sic->next + _SOME_POINTER_ := iTempY; sic->next->next + either + iTempZ := @[iTempX]; sic->next->next->next + or + *(iTempX) := ..something.. sic->next->next->next + if we find this then transform this to + iTempX := _SOME_POINTER_; + either + iTempZ := @[iTempX]; + or + *(iTempX) := ..something.. + iTempY := _SOME_POINTER_ + nn ; nn = sizeof (pointed to object) + _SOME_POINTER_ := iTempY; */ + + /* sounds simple enough so lets start , here I use -ve + tests all the way to return if any test fails */ + iCode *pgs, *sh, *st; + + if (!(sic->next && sic->next->next && sic->next->next->next)) + return 0; + if (sic->next->op != '+' && sic->next->op != '-') + return 0; + if (!(sic->next->next->op == '=' && + !POINTER_SET (sic->next->next))) + return 0; + if (!isOperandEqual (IC_LEFT (sic->next), IC_RIGHT (sic)) || + !IS_OP_LITERAL (IC_RIGHT (sic->next))) + return 0; + if (operandLitValue (IC_RIGHT (sic->next)) != + getSize (operandType (IC_RIGHT (sic))->next)) + return 0; + if (!isOperandEqual (IC_RESULT (sic->next->next), + IC_RIGHT (sic))) + return 0; + if (!isOperandEqual (IC_RESULT (sic->next), IC_RIGHT (sic->next->next))) + return 0; + if (!(pgs = findPointerGetSet (sic->next->next, IC_RESULT (sic)))) + return 0; + + /* found the patter .. now do the transformation */ + sh = sic->next; + st = sic->next->next; + + /* take the two out of the chain */ + sic->next = st->next; + st->next->prev = sic; + + /* and put them after the pointer get/set icode */ + if ((st->next = pgs->next)) + st->next->prev = st; + pgs->next = sh; + sh->prev = pgs; + return 1; +} + +static int pattern2 (iCode *sic) +{ + /* this is what we do. look for sequences like + + iTempX := _SOME_POINTER_; + iTempY := _SOME_POINTER_ + nn ; nn = sizeof (pointed to object) sic->next + iTempK := iTempY; sic->next->next + _SOME_POINTER_ := iTempK; sic->next->next->next + either + iTempZ := @[iTempX]; sic->next->next->next->next + or + *(iTempX) := ..something.. sic->next->next->next->next + if we find this then transform this to + iTempX := _SOME_POINTER_; + either + iTempZ := @[iTempX]; + or + *(iTempX) := ..something.. + iTempY := _SOME_POINTER_ + nn ; nn = sizeof (pointed to object) + iTempK := iTempY; + _SOME_POINTER_ := iTempK; */ + + /* sounds simple enough so lets start , here I use -ve + tests all the way to return if any test fails */ + iCode *pgs, *sh, *st; + + if (!(sic->next && sic->next->next && sic->next->next->next && + sic->next->next->next->next)) + return 0; + + /* yes I can OR them together and make one large if... but I have + simple mind and like to keep things simple & readable */ + if (!(sic->next->op == '+' || sic->next->op == '-')) return 0; + if (!isOperandEqual(IC_RIGHT(sic),IC_LEFT(sic->next))) return 0; + if (!IS_OP_LITERAL (IC_RIGHT (sic->next))) return 0; + if (operandLitValue (IC_RIGHT (sic->next)) != + getSize (operandType (IC_RIGHT (sic))->next)) return 0; + if (!IS_ASSIGN_ICODE(sic->next->next)) return 0; + if (!isOperandEqual(IC_RIGHT(sic->next->next),IC_RESULT(sic->next))) return 0; + if (!IS_ASSIGN_ICODE(sic->next->next->next)) return 0; + if (!isOperandEqual(IC_RIGHT(sic->next->next->next),IC_RESULT(sic->next->next))) return 0; + if (!isOperandEqual(IC_RESULT(sic->next->next->next),IC_LEFT(sic->next))) return 0; + if (!(pgs = findPointerGetSet (sic->next->next->next, IC_RESULT (sic)))) return 0; + + /* found the patter .. now do the transformation */ + sh = sic->next; + st = sic->next->next->next; + + /* take the three out of the chain */ + sic->next = st->next; + st->next->prev = sic; + + /* and put them after the pointer get/set icode */ + if ((st->next = pgs->next)) + st->next->prev = st; + pgs->next = sh; + sh->prev = pgs; + return 1; +} + +/*-----------------------------------------------------------------------*/ +/* ptrPostIncDecOpts - will do some pointer post increment optimizations */ +/* this will help register allocation amongst others */ +/*-----------------------------------------------------------------------*/ +void +ptrPostIncDecOpt (iCode * sic) +{ + if (pattern1(sic)) return ; + pattern2(sic); +} + +/*-----------------------------------------------------------------------*/ +/* addPattern1 - transform addition to pointer of variables */ +/*-----------------------------------------------------------------------*/ +static int addPattern1(iCode *ic) +{ + iCode *dic; + operand *tmp; + /* transform : + iTempAA = iTempBB + iTempCC + iTempDD = iTempAA + CONST + to + iTempAA = iTempBB + CONST + iTempDD = iTempAA + iTempCC + */ + if (!isOperandLiteral(IC_RIGHT(ic))) return 0; + if ((dic=findBackwardDef(IC_LEFT(ic),ic->prev)) == NULL) return 0; + if (bitVectnBitsOn(OP_SYMBOL(IC_RESULT(dic))->uses) > 1) return 0; + if (dic->op != '+') return 0; + tmp = IC_RIGHT(ic); + IC_RIGHT(ic) = IC_RIGHT(dic); + IC_RIGHT(dic) = tmp; + return 1; +} + +/*-----------------------------------------------------------------------*/ +/* ptrAddition - optimize pointer additions */ +/*-----------------------------------------------------------------------*/ +int ptrAddition (iCode *sic) +{ + if (addPattern1(sic)) return 1; + return 0; +} + +/*--------------------------------------------------------------------*/ +/* ptrBaseRematSym - find the base symbol of a remat. pointer */ +/*--------------------------------------------------------------------*/ +symbol * +ptrBaseRematSym (symbol *ptrsym) +{ + iCode * ric; + + if (!ptrsym->remat) + return NULL; + + ric = ptrsym->rematiCode; + while (ric) + { + if (ric->op == '+' || ric->op == '-') + ric = OP_SYMBOL (IC_LEFT (ric))->rematiCode; + else if (IS_CAST_ICODE (ric)) + ric = OP_SYMBOL (IC_RIGHT (ric))->rematiCode; + else + break; + } + + if (ric && IS_SYMOP (IC_LEFT (ric))) + return OP_SYMBOL (IC_LEFT (ric)); + else + return NULL; +} + + +/*--------------------------------------------------------------------*/ +/* ptrPseudoSymSafe - check to see if the conversion of the result of */ +/* a pointerGet of a rematerializable pointer to a pseudo symbol is */ +/* safe. Returns true if safe, or false if hazards were detected. */ +/*--------------------------------------------------------------------*/ +int +ptrPseudoSymSafe (symbol *sym, iCode *dic) +{ + symbol * ptrsym; + symbol * basesym; + iCode * ric; + iCode * ic; + int ptrsymDclType; + //int isGlobal; + + assert(POINTER_GET (dic)); + + /* Can't if spills to this symbol are prohibited */ + if (sym->noSpilLoc) + return 0; + + /* Get the pointer */ + if (!IS_SYMOP (IC_LEFT (dic))) + return 0; + ptrsym = OP_SYMBOL (IC_LEFT (dic)); + + /* Must be a rematerializable pointer */ + if (!ptrsym->remat) + return 0; + + /* The pointer type must be uncasted */ + if (IS_CAST_ICODE (ptrsym->rematiCode)) + return 0; + + /* The symbol's live range must not preceed its definition */ + if (dic->seq > sym->liveFrom) + return 0; + + /* Ok, this is a good candidate for a pseudo symbol. */ + /* However, we must check for two hazards: */ + /* 1) The symbol's live range must not include a CALL */ + /* or PCALL iCode. */ + /* 2) The symbol's live range must not include any */ + /* writes to the variable the pointer rematerializes */ + /* within (to avoid aliasing problems) */ + + /* Find the base symbol the rematerialization is based on */ + ric = ptrsym->rematiCode; + while (ric->op == '+' || ric->op == '-') + ric = OP_SYMBOL (IC_LEFT (ric))->rematiCode; + if (IS_CAST_ICODE(ric)) + return 0; + basesym = OP_SYMBOL (IC_LEFT (ric)); + + //isGlobal = !basesym->islocal && !basesym->ismyparm; + ptrsymDclType = aggrToPtrDclType (ptrsym->type, FALSE); + + ic = dic->next; + while (ic && ic->seq <= sym->liveTo) + { + if (!(SKIP_IC3 (ic) || ic->op == IFX)) + { + /* Check for hazard #1 */ + if ((ic->op == CALL || ic->op == PCALL) /* && isGlobal */ ) + { + if (ic->seq <= sym->liveTo) + return 0; + } + /* Check for hazard #2 */ + else if (POINTER_SET (ic)) + { + symbol * ptrsym2 = OP_SYMBOL (IC_RESULT (ic)); + + if (ptrsym2->remat) + { + /* Must not be the same base symbol */ + if (basesym == ptrBaseRematSym (ptrsym2)) + return 0; + } + else + { + int ptrsym2DclType = aggrToPtrDclType (ptrsym2->type, FALSE); + + /* Pointer must have no memory space in common */ + if (ptrsym2DclType == ptrsymDclType + || ptrsym2DclType == GPOINTER + || ptrsymDclType == GPOINTER) + return 0; + } + } + else if (IC_RESULT (ic)) + { + symbol * rsym = OP_SYMBOL (IC_RESULT (ic)); + + /* Make sure there is no conflict with another pseudo symbol */ + if (rsym->psbase == basesym) + return 0; + if (rsym->isspilt && rsym->usl.spillLoc) + rsym = rsym->usl.spillLoc; + if (rsym->psbase == basesym) + return 0; + } + } + + if (ic->seq == sym->liveTo) + break; + ic = ic->next; + } + + /* If the live range went past the end of the defining basic */ + /* block, then a full analysis is too complicated to attempt */ + /* here. To be safe, we must assume the worst. */ + if (!ic) + return 0; + + /* Ok, looks safe */ + return 1; +} + +/*--------------------------------------------------------------------*/ +/* ptrPseudoSymConvert - convert the result of a pointerGet to a */ +/* pseudo symbol. The pointer must be rematerializable. */ +/*--------------------------------------------------------------------*/ +void +ptrPseudoSymConvert (symbol *sym, iCode *dic, char *name) +{ + symbol *psym = newSymbol (name, 1); + psym->psbase = ptrBaseRematSym (OP_SYMBOL (IC_LEFT (dic))); + psym->type = sym->type; + psym->etype = psym->psbase->etype; + + strcpy (psym->rname, psym->name); + sym->isspilt = 1; + sym->usl.spillLoc = psym; +#if 0 // an alternative fix for bug #480076 + /* now this is a useless assignment to itself */ + remiCodeFromeBBlock (ebbs, dic); +#else + /* now this really is an assignment to itself, make it so; + it will be optimized out later */ + dic->op='='; + ReplaceOpWithCheaperOp(&IC_RIGHT(dic), IC_RESULT(dic)); + IC_LEFT(dic)=NULL; +#endif +} diff --git a/src/SDCCptropt.h b/src/SDCCptropt.h new file mode 100644 index 0000000..8659ae6 --- /dev/null +++ b/src/SDCCptropt.h @@ -0,0 +1,35 @@ +/*------------------------------------------------------------------------- + + SDCCptropt.h - header file for pointer arithmetic Optimizations + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCPTROPT_H +#define SDCCPTROPT_H 1 + +void ptrPostIncDecOpt (iCode *); +int ptrAddition (iCode *); +symbol * ptrBaseRematSym (symbol *); +int ptrPseudoSymSafe (symbol *, iCode *); +void ptrPseudoSymConvert (symbol *, iCode *, char *); + +#endif diff --git a/src/SDCCset.c b/src/SDCCset.c new file mode 100644 index 0000000..2f3ce9b --- /dev/null +++ b/src/SDCCset.c @@ -0,0 +1,658 @@ +/*----------------------------------------------------------------- + SDCCset.c - contains support routines for sets + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include +#include +#include "newalloc.h" +#include "SDCCset.h" + +/*-----------------------------------------------------------------*/ +/* newSet - will allocate & return a new set entry */ +/*-----------------------------------------------------------------*/ +set * +newSet (void) +{ + set *lp; + + lp = Safe_alloc (sizeof (set)); + lp->item = lp->curr = lp->next = NULL; + return lp; +} + + +/*-----------------------------------------------------------------*/ +/* setFromSet - creates a list from another list; the order of */ +/* elements in new list is reverted */ +/*-----------------------------------------------------------------*/ +set * +setFromSet (set * lp) +{ + set *lfl = NULL; + + while (lp) + { + addSetHead (&lfl, lp->item); + lp = lp->next; + } + + return lfl; + +} + +/*-----------------------------------------------------------------*/ +/* setFromSet - creates a list from another list; the order of */ +/* elements in retained */ +/*-----------------------------------------------------------------*/ +set * +setFromSetNonRev (set * lp) +{ + set *lfl = NULL; + + while (lp) + { + addSet (&lfl, lp->item); + lp = lp->next; + } + + return lfl; + +} + +/*-----------------------------------------------------------------*/ +/* isSetsEqual - are the lists equal, they are equal if they have */ +/* the same objects & the same number of objects */ +/*-----------------------------------------------------------------*/ +int +isSetsEqual (set * dest, set * src) +{ + set *src1 = src; + + for (; dest && src; dest = dest->next, src = src->next) + { + if (!isinSet (src1, dest->item)) + return 0; + } + if (!dest && !src) + return 1; + return 0; +} + +/*-----------------------------------------------------------------*/ +/* isSetsEqualWith - are the lists equal, they are equal if they */ +/* have the same objects & the same number of */ +/* objects , compare function */ +/*-----------------------------------------------------------------*/ +int +isSetsEqualWith (set * dest, set * src, int (*cFunc) (void *, void *)) +{ + set *src1 = src; + + for (; dest && src; dest = dest->next, src = src->next) + { + if (!isinSetWith (src1, dest->item, cFunc)) + return 0; + } + if (!dest && !src) + return 1; + return 0; +} + +/*-----------------------------------------------------------------*/ +/* addSetIfnotP - adds to a linked list if not already present */ +/*-----------------------------------------------------------------*/ +void * +addSetIfnotP (set ** list, void *item) +{ + + if (isinSet (*list, item)) + return item; + + addSetHead (list, item); + + return item; +} + +/*-----------------------------------------------------------------*/ +/* addSetHead - add item to head of linked list */ +/*-----------------------------------------------------------------*/ +void * +addSetHead (set ** list, void *item) +{ + set *lp = newSet (); + + lp->item = item; + lp->next = *list; + + assert (lp != lp->item); + *list = lp; + return item; + +} + +/*-----------------------------------------------------------------*/ +/* addSet - add an item to a linear linked list */ +/*-----------------------------------------------------------------*/ +void * +addSet (set ** list, void *item) +{ + set *lp; + + /* item added to the tail of the list */ + + /* if the list is empty */ + if (*list == NULL) + { + lp = *list = newSet (); + } + else + { + /* go to the end of the list */ + for (lp = *list; lp->next; lp = lp->next); + lp = lp->next = newSet (); + } + + /* lp now all set */ + lp->item = item; + + return item; +} + +/*-----------------------------------------------------------------*/ +/* deleteItemIf - will delete from set if cond function returns 1 */ +/*-----------------------------------------------------------------*/ +void +deleteItemIf (set ** sset, int (*cond) (void *, va_list),...) +{ + set *sp = *sset; + va_list ap; + + while (sp) + { + /* + * On the x86 va_list is just a pointer, so due to pass by value + * ap is not mofified by the called function. On the PPC va_list + * is a pointer to a structure, so ap is modified. Re-init each time. + */ + va_start (ap, cond); + + if ((*cond) (sp->item, ap)) + { + deleteSetItem (sset, sp->item); + sp = *sset; + continue; + } + + va_end(ap); + sp = sp->next; + } +} + +/*-----------------------------------------------------------------*/ +/* deleteSetItem - will delete a given item from the list */ +/*-----------------------------------------------------------------*/ +void +deleteSetItem (set ** list, void *item) +{ + set *lp, *lp1; + + /* if list is empty */ + if (*list == NULL) + return; + + /* if this item is at the head of the list */ + if ((*list)->item == item) { + lp = *list; + *list = (*list)->next; + Safe_free (lp); + return; + } + + /* find the item in the list */ + for (lp = *list; lp->next; lp = lp->next) { + if (lp->next->item == item) { /* the next one is it */ + lp1 = lp->next; /* this one will need to be freed */ + lp->next = lp->next->next; /* take out of list */ + Safe_free (lp1); + return; + } + } + + /* could not find it */ +} + +/*-----------------------------------------------------------------*/ +/* isinSet - the item is present in the linked list */ +/*-----------------------------------------------------------------*/ +int +isinSet (set * list, void *item) +{ + set *lp; + + for (lp = list; lp; lp = lp->next) + if (lp->item == item) + return 1; + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* isinSetWith - the item is present in the linked list */ +/*-----------------------------------------------------------------*/ +int +isinSetWith (set * list, void *item, int (*cFunc) (void *, void *)) +{ + set *lp; + + for (lp = list; lp; lp = lp->next) + if ((*cFunc) (lp->item, item)) + return 1; + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* mergeSets - append list to sset */ +/*-----------------------------------------------------------------*/ +void +mergeSets (set **sset, set *list) +{ + if (*sset == NULL) { + *sset = list; + } + else { + set *lp; + + for (lp = *sset; lp->next; lp = lp->next) + ; + lp->next = list; + } +} + +/*-----------------------------------------------------------------*/ +/* unionSets - will return the union of the two lists */ +/*-----------------------------------------------------------------*/ +set * +unionSets (set * list1, set * list2, int throw) +{ + set *un = NULL; + set *lp; + + /* add all elements in the first list */ + for (lp = list1; lp; lp = lp->next) + addSet (&un, lp->item); + + /* now for all those in list2 which does not */ + /* already exist in the list add */ + for (lp = list2; lp; lp = lp->next) + if (!isinSet (un, lp->item)) + addSet (&un, lp->item); + + switch (throw) + { + case THROW_SRC: + setToNull ((void *) &list2); + break; + case THROW_DEST: + setToNull ((void *) &list1); + break; + case THROW_BOTH: + setToNull ((void *) &list1); + setToNull ((void *) &list2); + } + + return un; +} + +/*-----------------------------------------------------------------*/ +/* unionSetsWith - will return the union of the two lists */ +/*-----------------------------------------------------------------*/ +set * +unionSetsWith (set * list1, set * list2, int (*cFunc) (), int throw) +{ + set *un = NULL; + set *lp; + + /* add all elements in the first list */ + for (lp = list1; lp; lp = lp->next) + addSet (&un, lp->item); + + /* now for all those in list2 which does not */ + /* already exist in the list add */ + for (lp = list2; lp; lp = lp->next) + if (!isinSetWith (un, lp->item, (int (*)(void *, void *)) cFunc)) + addSet (&un, lp->item); + + switch (throw) + { + case THROW_SRC: + setToNull ((void *) &list2); + break; + case THROW_DEST: + setToNull ((void *) &list1); + break; + case THROW_BOTH: + setToNull ((void *) &list1); + setToNull ((void *) &list2); + } + + return un; +} + +/*-----------------------------------------------------------------*/ +/* intersectSets - returns list of items in common to two lists */ +/*-----------------------------------------------------------------*/ +set * +intersectSets (set * list1, set * list2, int throw) +{ + set *in = NULL; + set *lp; + + /* we can take any one of the lists and iterate over it */ + for (lp = list1; lp; lp = lp->next) + if (isinSet (list2, lp->item)) + addSetHead (&in, lp->item); + + switch (throw) + { + case THROW_SRC: + setToNull ((void *) &list2); + break; + case THROW_DEST: + setToNull ((void *) &list1); + break; + case THROW_BOTH: + setToNull ((void *) &list1); + setToNull ((void *) &list2); + } + + return in; +} + +/*-----------------------------------------------------------------*/ +/* intersectSetsWith - returns list of items in common to two */ +/* lists */ +/*-----------------------------------------------------------------*/ +set * +intersectSetsWith (set * list1, set * list2, + int (*cFunc) (void *, void *), int throw) +{ + set *in = NULL; + set *lp; + + /* we can take any one of the lists and iterate over it */ + for (lp = list1; lp; lp = lp->next) + if (isinSetWith (list2, lp->item, cFunc)) + addSetHead (&in, lp->item); + + switch (throw) + { + case THROW_SRC: + setToNull ((void *) &list2); + break; + case THROW_DEST: + setToNull ((void *) &list1); + break; + case THROW_BOTH: + setToNull ((void *) &list1); + setToNull ((void *) &list2); + } + + return in; +} + +/*-----------------------------------------------------------------*/ +/* elementsInSet - elements count of a set */ +/*-----------------------------------------------------------------*/ +int +elementsInSet (set * s) +{ + set *loop = s; + int count = 0; + + while (loop) + { + count++; + loop = loop->next; + } + + return count; +} + +/*-----------------------------------------------------------------*/ +/* indexSet - returns the i'th item in set */ +/*-----------------------------------------------------------------*/ +void * +indexSet (set * s, int index) +{ + set *loop=s; + + while(loop && index) { + index--; + loop = loop->next; + } + + return (loop->item); +} + + +/*-----------------------------------------------------------------*/ +/* reverseSet - reverse the order of the items of a set */ +/*-----------------------------------------------------------------*/ + +set * +reverseSet (set * s) +{ + set *t = NULL; + set *u = NULL; + + while(s->next) { + t = s->next; + s->next = u; + u = s; + s = t; + } + s->next = u; + return s; +} + +/*-----------------------------------------------------------------*/ +/* subtractFromSet - take away from set1 elements of set2 */ +/*-----------------------------------------------------------------*/ +set * +subtractFromSet (set * left, set * right, int throw) +{ + set *result = setFromSet (left); + set *loop; + + if (right) + { + for (loop = right; loop; loop = loop->next) + if (isinSet (result, loop->item)) + deleteSetItem (&result, loop->item); + } + + switch (throw) + { + case THROW_SRC: + setToNull ((void *) &right); + break; + case THROW_DEST: + setToNull ((void *) &left); + break; + case THROW_BOTH: + setToNull ((void *) &left); + setToNull ((void *) &right); + break; + } + + return result; +} + +/*-----------------------------------------------------------------*/ +/* applyToSet - will call the supplied function with each item */ +/*-----------------------------------------------------------------*/ +int +applyToSet (set * list, int (*somefunc) (void *, va_list),...) +{ + set *lp; + va_list ap; + int rvalue = 0; + + for (lp = list; lp; lp = lp->next) + { + va_start (ap, somefunc); + rvalue += (*somefunc) (lp->item, ap); + va_end (ap); + } + return rvalue; +} + +/*-----------------------------------------------------------------*/ +/* applyToSetFTrue - will call the supplied function with each */ +/* item until list is exhausted or a true is */ +/* returned */ +/*-----------------------------------------------------------------*/ +int +applyToSetFTrue (set * list, int (*somefunc) (void *, va_list),...) +{ + set *lp; + va_list ap; + int rvalue = 0; + + for (lp = list; lp; lp = lp->next) + { + va_start (ap, somefunc); + rvalue += (*somefunc) (lp->item, ap); + va_end (ap); + if (rvalue) + break; + } + return rvalue; +} + +/*-----------------------------------------------------------------*/ +/* peekSet - will return the first element of the set */ +/*-----------------------------------------------------------------*/ +void * +peekSet (set * sp) +{ + if (!sp) + return NULL; + + return sp->item; +} + +/*-----------------------------------------------------------------*/ +/* setFirstItem - gets the first item in the set, begins iteration */ +/*-----------------------------------------------------------------*/ +void * +setFirstItem (set * sset) +{ + if (sset) + { + sset->curr = sset; + return sset->item; + } + + return NULL; +} +/*-----------------------------------------------------------------*/ +/* setNextItem - gets the next item, changes the iteration */ +/*-----------------------------------------------------------------*/ +void * +setNextItem (set * sset) +{ + if (sset && sset->curr) + { + sset->curr = sset->curr->next; + if (sset->curr) + return sset->curr->item; + } + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* getSet - will delete & return the first item from the set */ +/*-----------------------------------------------------------------*/ +void * +getSet (set ** list) +{ + set *lp; + void *item; + + /* if list is empty then we cannot delete */ + if (*list == NULL) + return (void *) NULL; + + + /* find the item in the list */ + lp = *list; + item = lp->item; /* save the item */ + + *list = lp->next; + return item; +} + +/*-----------------------------------------------------------------*/ +/* setToNull - will throw away the entire list */ +/*-----------------------------------------------------------------*/ +void +setToNull (void **item) +{ + + if (!item) + return; + + if (!*item) + return; + Safe_free (*item); + *item = NULL; +} + +/*-----------------------------------------------------------------*/ +/* deleteSet - will throw away the entire list */ +/* note - setToNull doesn't actually throw away the whole list. */ +/* Instead it only throws away the first item. */ +/*-----------------------------------------------------------------*/ +void +deleteSet (set **s) +{ + set *curr; + set *next; + + if(!s || !*s) + return; + + curr = *s; + next = curr->next; + while (next) { + Safe_free (curr); + curr = next; + next = next->next; + } + + Safe_free (curr); + + *s = NULL; +} diff --git a/src/SDCCset.h b/src/SDCCset.h new file mode 100644 index 0000000..7b4fc58 --- /dev/null +++ b/src/SDCCset.h @@ -0,0 +1,82 @@ +/*----------------------------------------------------------------- + SDCCset.h - contains support routines for sets . + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCSET_H +#define SDCCSET_H +#include + + +#ifndef THROWS +#define THROWS +#define THROW_NONE 0 +#define THROW_SRC 1 +#define THROW_DEST 2 +#define THROW_BOTH 3 +#endif + +/* linear linked list generic */ +typedef struct set + { + void *item; + struct set *curr; + struct set *next; + } +set; + +#define DEFSETFUNC(fname) int fname ( void *item, va_list ap) +#define V_ARG(type,var) type var = va_arg(ap,type) + +/* set related functions */ +set *newSet (void); +void *addSet (set **, void *); +void *addSetHead (set **, void *); +void *getSet (set **); +void deleteSetItem (set **, void *); +void deleteItemIf (set **, int (*cond) (void *, va_list),...); +int isinSet (set *, void *); +typedef int (* insetwithFunc) (void *, void *); +int isinSetWith (set *, void *, insetwithFunc cfunc); +int applyToSet (set * list, int (*somefunc) (void *, va_list),...); +int applyToSetFTrue (set * list, int (*somefunc) (void *, va_list),...); +void mergeSets (set **sset, set *list); +set *unionSets (set *, set *, int); +set *unionSetsWith (set *, set *, int (*cFunc) (), int); +set *intersectSets (set *, set *, int); +void *addSetIfnotP (set **, void *); +set *setFromSet (set *); +set *setFromSetNonRev (set *); +int isSetsEqual (set *, set *); +set *subtractFromSet (set *, set *, int); +int elementsInSet (set *); +void *indexSet(set *, int); +set *intersectSetsWith (set *, set *, int (*cFunc) (void *, void *), int); +int isSetsEqualWith (set *, set *, int (*cFunc) (void *, void *)); +void *peekSet (set *); +void *setFirstItem (set *); +void *setNextItem (set *); +void setToNull (void **); +set *reverseSet (set *); +void deleteSet (set **s); + +#endif diff --git a/src/SDCCsymt.c b/src/SDCCsymt.c new file mode 100644 index 0000000..c7623d4 --- /dev/null +++ b/src/SDCCsymt.c @@ -0,0 +1,3784 @@ +/*------------------------------------------------------------------------- + SDCCsymt.c - Code file for Symbols table related structures and MACRO's. + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" +#include "newalloc.h" +#include "dbuf_string.h" + +#include "SDCCsymt.h" + +value *aggregateToPointer (value *val); +void printTypeChainRaw (sym_link * start, FILE * of); + +void printFromToType(sym_link *from, sym_link *to) { + fprintf (stderr, "from type '"); + printTypeChain (from, stderr); + fprintf (stderr, "'\nto type '"); + printTypeChain (to, stderr); + fprintf (stderr, "'\n"); +} + +/* noun strings */ +char *nounName(sym_link *sl) { + switch (SPEC_NOUN(sl)) + { + case V_INT: { + if (SPEC_LONG(sl)) return "long"; + if (SPEC_SHORT(sl)) return "short"; + return "int"; + } + case V_FLOAT: return "float"; + case V_FIXED16X16: return "fixed16x16"; + case V_CHAR: return "char"; + case V_VOID: return "void"; + case V_STRUCT: return "struct"; + case V_LABEL: return "label"; + case V_BITFIELD: return "bitfield"; + case V_BIT: return "bit"; + case V_SBIT: return "sbit"; + case V_DOUBLE: return "double"; + } + return "unknown"; +}; + +bucket *SymbolTab[256]; /* the symbol table */ +bucket *StructTab[256]; /* the structure table */ +bucket *TypedefTab[256]; /* the typedef table */ +bucket *LabelTab[256]; /* the Label table */ +bucket *enumTab[256]; /* enumerated table */ + +/*------------------------------------------------------------------*/ +/* initSymt () - initialises symbol table related stuff */ +/*------------------------------------------------------------------*/ +void +initSymt () +{ + int i = 0; + + for (i = 0; i < 256; i++) + SymbolTab[i] = StructTab[i] = (void *) NULL; + + +} +/*-----------------------------------------------------------------*/ +/* newBucket - allocates & returns a new bucket */ +/*-----------------------------------------------------------------*/ +bucket * +newBucket () +{ + bucket *bp; + + bp = Safe_alloc ( sizeof (bucket)); + + return bp; +} + +/*-----------------------------------------------------------------*/ +/* hashKey - computes the hashkey given a symbol name */ +/*-----------------------------------------------------------------*/ +int +hashKey (const char *s) +{ + unsigned long key = 0; + + while (*s) + key += *s++; + return key % 256; +} + +/*-----------------------------------------------------------------*/ +/* addSym - adds a symbol to the hash Table */ +/*-----------------------------------------------------------------*/ +void +addSym (bucket ** stab, + void *sym, + char *sname, + int level, + int block, + int checkType) +{ + int i; /* index into the hash Table */ + bucket *bp; /* temp bucket * */ + + if (checkType) { + symbol *csym = (symbol *)sym; + + if (getenv("DEBUG_SANITY")) { + fprintf (stderr, "addSym: %s ", sname); + } + /* make sure the type is complete and sane */ + checkTypeSanity(csym->etype, csym->name); + } + + /* prevent overflow of the (r)name buffers */ + if (strlen(sname)>SDCC_SYMNAME_MAX) { + werror (W_SYMBOL_NAME_TOO_LONG, SDCC_SYMNAME_MAX); + sname[SDCC_SYMNAME_MAX]='\0'; + } + + /* the symbols are always added at the head of the list */ + i = hashKey (sname); + /* get a free entry */ + bp = Safe_alloc ( sizeof (bucket)); + + bp->sym = sym; /* update the symbol pointer */ + bp->level = level; /* update the nest level */ + bp->block = block; + strncpyz (bp->name, sname, sizeof(bp->name)); /* copy the name into place */ + + /* if this is the first entry */ + if (stab[i] == NULL) + { + bp->prev = bp->next = (void *) NULL; /* point to nothing */ + stab[i] = bp; + } + /* not first entry then add @ head of list */ + else + { + bp->prev = NULL; + stab[i]->prev = bp; + bp->next = stab[i]; + stab[i] = bp; + } +} + +/*-----------------------------------------------------------------*/ +/* deleteSym - deletes a symbol from the hash Table entry */ +/*-----------------------------------------------------------------*/ +void +deleteSym (bucket ** stab, void *sym, char *sname) +{ + int i = 0; + bucket *bp; + + i = hashKey (sname); + + bp = stab[i]; + /* find the symbol */ + while (bp) + { + if (bp->sym == sym) /* found it then break out */ + break; /* of the loop */ + bp = bp->next; + } + + if (!bp) /* did not find it */ + return; + + /* if this is the first one in the chain */ + if (!bp->prev) + { + stab[i] = bp->next; + if (stab[i]) /* if chain ! empty */ + stab[i]->prev = (void *) NULL; + } + /* middle || end of chain */ + else + { + if (bp->next) /* if not end of chain */ + bp->next->prev = bp->prev; + + bp->prev->next = bp->next; + } +} + +/*-----------------------------------------------------------------*/ +/* findSym - finds a symbol in a table */ +/*-----------------------------------------------------------------*/ +void * +findSym (bucket ** stab, void *sym, const char *sname) +{ + bucket *bp; + + bp = stab[hashKey (sname)]; + while (bp) + { + if (bp->sym == sym || strcmp (bp->name, sname) == 0) + break; + bp = bp->next; + } + + return (bp ? bp->sym : (void *) NULL); +} + +/*-----------------------------------------------------------------*/ +/* findSymWithLevel - finds a symbol with a name & level */ +/*-----------------------------------------------------------------*/ +void * +findSymWithLevel (bucket ** stab, symbol * sym) +{ + bucket *bp; + + bp = stab[hashKey (sym->name)]; + + /** + ** do the search from the head of the list since the + ** elements are added at the head it is ensured that + ** we will find the deeper definitions before we find + ** the global ones. we need to check for symbols with + ** level <= to the level given, if levels match then block + ** numbers need to match as well + **/ + while (bp) + { + if (strcmp (bp->name, sym->name) == 0 && bp->level <= sym->level) + { + /* if this is parameter then nothing else need to be checked */ + if (((symbol *) (bp->sym))->_isparm) + return (bp->sym); + /* if levels match then block numbers should also match */ + if (bp->level && bp->level == sym->level && bp->block == sym->block) + return (bp->sym); + /* if levels don't match then we are okay */ + if (bp->level && bp->level != sym->level && bp->block <= sym->block) + return (bp->sym); + /* if this is a global variable then we are ok too */ + if (bp->level == 0) + return (bp->sym); + } + + bp = bp->next; + } + + return (void *) NULL; +} + +/*-----------------------------------------------------------------*/ +/* findSymWithBlock - finds a symbol with name in with a block */ +/*-----------------------------------------------------------------*/ +void * +findSymWithBlock (bucket ** stab, symbol * sym, int block) +{ + bucket *bp; + + bp = stab[hashKey (sym->name)]; + while (bp) + { + if (strcmp (bp->name, sym->name) == 0 && + bp->block <= block) + break; + bp = bp->next; + } + + return (bp ? bp->sym : (void *) NULL); +} + +/*------------------------------------------------------------------*/ +/* newSymbol () - returns a new pointer to a symbol */ +/*------------------------------------------------------------------*/ +symbol * +newSymbol (char *name, int scope) +{ + symbol *sym; + + sym = Safe_alloc ( sizeof (symbol)); + + strncpyz (sym->name, name, sizeof(sym->name)); /* copy the name */ + sym->level = scope; /* set the level */ + sym->block = currBlockno; + sym->lineDef = lexLineno; /* set the line number */ + sym->fileDef = lexFilename; + return sym; +} + +/*------------------------------------------------------------------*/ +/* newLink - creates a new link (declarator,specifier) */ +/*------------------------------------------------------------------*/ +sym_link * +newLink (SYM_LINK_CLASS select) +{ + sym_link *p; + + p = Safe_alloc ( sizeof (sym_link)); + p->class=select; + + return p; +} + +/*------------------------------------------------------------------*/ +/* newStruct - creats a new structdef from the free list */ +/*------------------------------------------------------------------*/ +structdef * +newStruct (char *tag) +{ + structdef *s; + + s = Safe_alloc ( sizeof (structdef)); + + strncpyz (s->tag, tag, sizeof(s->tag)); /* copy the tag */ + return s; +} + +/*------------------------------------------------------------------*/ +/* sclsFromPtr - Return the storage class a pointer points into. */ +/* S_FIXED is returned for generic pointers or other */ +/* unexpected cases */ +/*------------------------------------------------------------------*/ +STORAGE_CLASS +sclsFromPtr(sym_link *ptr) +{ + switch (DCL_TYPE (ptr)) + { + case POINTER: + return S_DATA; + case GPOINTER: + return S_FIXED; + case FPOINTER: + return S_XDATA; + case CPOINTER: + return S_CODE; + case IPOINTER: + return S_IDATA; + case PPOINTER: + return S_PDATA; + case EEPPOINTER: + return S_EEPROM; + case FUNCTION: + return S_CODE; + default: + return S_FIXED; + } +} + +/*------------------------------------------------------------------*/ +/* pointerTypes - do the computation for the pointer types */ +/*------------------------------------------------------------------*/ +void +pointerTypes (sym_link * ptr, sym_link * type) +{ + if (IS_SPEC (ptr)) + return; + + /* find the first pointer type */ + while (ptr && !IS_PTR (ptr)) + ptr = ptr->next; + + /* could not find it */ + if (!ptr || IS_SPEC (ptr)) + return; + + if (IS_PTR(ptr) && DCL_TYPE(ptr)!=UPOINTER) { + pointerTypes (ptr->next, type); + return; + } + + /* change the pointer type depending on the + storage class of the type */ + if (IS_SPEC (type)) + { + switch (SPEC_SCLS (type)) + { + case S_XDATA: + DCL_TYPE (ptr) = FPOINTER; + break; + case S_IDATA: + DCL_TYPE (ptr) = IPOINTER; + break; + case S_PDATA: + DCL_TYPE (ptr) = PPOINTER; + break; + case S_DATA: + DCL_TYPE (ptr) = POINTER; + break; + case S_CODE: + DCL_TYPE (ptr) = CPOINTER; + break; + case S_EEPROM: + DCL_TYPE (ptr) = EEPPOINTER; + break; + default: + DCL_TYPE (ptr) = port->unqualified_pointer; + break; + } + /* the storage class of type ends here */ + SPEC_SCLS (type) = 0; + } + + /* now change all the remaining unknown pointers + to generic pointers */ + while (ptr) + { + if (!IS_SPEC (ptr) && DCL_TYPE (ptr) == UPOINTER) + DCL_TYPE (ptr) = port->unqualified_pointer; + ptr = ptr->next; + } + + /* same for the type although it is highly unlikely that + type will have a pointer */ + while (type) + { + if (!IS_SPEC (type) && DCL_TYPE (type) == UPOINTER) + DCL_TYPE (type) = port->unqualified_pointer; + type = type->next; + } +} + +/*------------------------------------------------------------------*/ +/* addDecl - adds a declarator @ the end of a chain */ +/*------------------------------------------------------------------*/ +void +addDecl (symbol * sym, int type, sym_link * p) +{ + static sym_link *empty = NULL; + sym_link *head; + sym_link *tail; + sym_link *t; + + if (getenv("SDCC_DEBUG_FUNCTION_POINTERS")) + fprintf (stderr, "SDCCsymt.c:addDecl(%s,%d,%p)\n", sym->name, type, p); + + if (empty == NULL) + empty = newLink(SPECIFIER); + + /* if we are passed a link then set head & tail */ + if (p) + { + tail = head = p; + while (tail->next) + tail = tail->next; + } + else + { + head = tail = newLink (DECLARATOR); + DCL_TYPE (head) = type; + } + + /* if this is the first entry */ + if (!sym->type) + { + sym->type = head; + sym->etype = tail; + } + else if (IS_SPEC (sym->etype) && IS_SPEC (head) && head == tail) + { + sym->etype = mergeSpec (sym->etype, head, sym->name); + } + else if (IS_SPEC (sym->etype) && !IS_SPEC (head) && head == tail) + { + t = sym->type; + while (t->next != sym->etype) + t = t->next; + t->next = head; + tail->next = sym->etype; + } + else if (IS_FUNC (sym->type) && IS_SPEC (sym->type->next) && + !memcmp(sym->type->next, empty, sizeof(sym_link))) + { + sym->type->next = head; + sym->etype = tail; + } + else + { + sym->etype->next = head; + sym->etype = tail; + } + + /* if the type is an unknown pointer and has + a tspec then take the storage class const & volatile + attribute from the tspec & make it those of this + symbol */ + if (p && + !IS_SPEC (p) && + //DCL_TYPE (p) == UPOINTER && + DCL_TSPEC (p)) + { + if (!IS_SPEC (sym->etype)) + { + sym->etype = sym->etype->next = newLink (SPECIFIER); + } + SPEC_SCLS (sym->etype) = SPEC_SCLS (DCL_TSPEC (p)); + DCL_TSPEC (p) = NULL; + } + + // if there is a function in this type chain + if (p && funcInChain(sym->type)) { + processFuncArgs (sym); + } + + return; +} + +/*------------------------------------------------------------------ + checkTypeSanity: prevent the user from doing e.g.: + unsigned float uf; + ------------------------------------------------------------------*/ +void checkTypeSanity(sym_link *etype, char *name) { + char *noun; + + if (!etype) { + if (getenv("DEBUG_SANITY")) { + fprintf (stderr, "sanity check skipped for %s (etype==0)\n", name); + } + return; + } + + if (!IS_SPEC(etype)) { + if (getenv("DEBUG_SANITY")) { + fprintf (stderr, "sanity check skipped for %s (!IS_SPEC)\n", name); + } + return; + } + + noun=nounName(etype); + + if (getenv("DEBUG_SANITY")) { + fprintf (stderr, "checking sanity for %s %p\n", name, etype); + } + + if ((SPEC_NOUN(etype)==V_CHAR || + SPEC_NOUN(etype)==V_FLOAT || + SPEC_NOUN(etype)==V_FIXED16X16 || + SPEC_NOUN(etype)==V_DOUBLE || + SPEC_NOUN(etype)==V_VOID) && + (SPEC_SHORT(etype) || SPEC_LONG(etype))) { + // long or short for char float double or void + werror (E_LONG_OR_SHORT_INVALID, noun, name); + } + if ((SPEC_NOUN(etype)==V_FLOAT || + SPEC_NOUN(etype)==V_FIXED16X16 || + SPEC_NOUN(etype)==V_DOUBLE || + SPEC_NOUN(etype)==V_VOID) && + (etype->select.s.b_signed || SPEC_USIGN(etype))) { + // signed or unsigned for float double or void + werror (E_SIGNED_OR_UNSIGNED_INVALID, noun, name); + } + + // special case for "short" + if (SPEC_SHORT(etype)) { + SPEC_NOUN(etype) = options.shortis8bits ? V_CHAR : V_INT; + SPEC_SHORT(etype) = 0; + } + + /* if no noun e.g. + "const a;" or "data b;" or "signed s" or "long l" + assume an int */ + if (!SPEC_NOUN(etype)) { + SPEC_NOUN(etype)=V_INT; + } + + /* ISO/IEC 9899 J.3.9 implementation defined behaviour: */ + /* a "plain" int bitfield is unsigned */ + if (SPEC_NOUN(etype)==V_BIT || + SPEC_NOUN(etype)==V_SBIT) { + if (!etype->select.s.b_signed) + SPEC_USIGN(etype) = 1; + } + + if (etype->select.s.b_signed && SPEC_USIGN(etype)) { + // signed AND unsigned + werror (E_SIGNED_AND_UNSIGNED_INVALID, noun, name); + } + if (SPEC_SHORT(etype) && SPEC_LONG(etype)) { + // short AND long + werror (E_LONG_AND_SHORT_INVALID, noun, name); + } +} + +/*------------------------------------------------------------------*/ +/* mergeSpec - merges two specifiers and returns the new one */ +/*------------------------------------------------------------------*/ +sym_link * +mergeSpec (sym_link * dest, sym_link * src, char *name) +{ + if (!IS_SPEC(dest) || !IS_SPEC(src)) { +#if 0 + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, "cannot merge declarator"); + exit (1); +#else + werror (E_SYNTAX_ERROR, yytext); + // the show must go on + return newIntLink(); +#endif + } + + if (SPEC_NOUN(src)) { + if (!SPEC_NOUN(dest)) { + SPEC_NOUN(dest)=SPEC_NOUN(src); + } else { + /* we shouldn't redeclare the type */ + if (getenv("DEBUG_SANITY")) { + fprintf (stderr, "mergeSpec: "); + } + werror(E_TWO_OR_MORE_DATA_TYPES, name); + } + } + + if (SPEC_SCLS(src)) { + /* if destination has no storage class */ + if (!SPEC_SCLS (dest) || SPEC_SCLS(dest)==S_REGISTER) { + SPEC_SCLS (dest) = SPEC_SCLS (src); + } else { + if (getenv("DEBUG_SANITY")) { + fprintf (stderr, "mergeSpec: "); + } + werror(E_TWO_OR_MORE_STORAGE_CLASSES, name); + } + } + + /* copy all the specifications */ + + // we really should do: +#if 0 + if (SPEC_what(src)) { + if (SPEC_what(dest)) { + werror(W_DUPLICATE_SPEC, "what"); + } + SPEC_what(dst)|=SPEC_what(src); + } +#endif + // but there are more important thing right now + + SPEC_LONG (dest) |= SPEC_LONG (src); + SPEC_SHORT(dest) |= SPEC_SHORT(src); + SPEC_USIGN (dest) |= SPEC_USIGN (src); + dest->select.s.b_signed|=src->select.s.b_signed; + SPEC_STAT (dest) |= SPEC_STAT (src); + SPEC_EXTR (dest) |= SPEC_EXTR (src); + SPEC_INLINE (dest) |= SPEC_INLINE (src); + SPEC_CONST(dest) |= SPEC_CONST (src); + SPEC_ABSA (dest) |= SPEC_ABSA (src); + SPEC_VOLATILE (dest) |= SPEC_VOLATILE (src); + SPEC_RESTRICT (dest) |= SPEC_RESTRICT (src); + SPEC_ADDR (dest) |= SPEC_ADDR (src); + SPEC_OCLS (dest) = SPEC_OCLS (src); + SPEC_BLEN (dest) |= SPEC_BLEN (src); + SPEC_BSTR (dest) |= SPEC_BSTR (src); + SPEC_TYPEDEF (dest) |= SPEC_TYPEDEF (src); + SPEC_ENUM (dest) |= SPEC_ENUM (src); + if (SPEC_ARGREG(src) && !SPEC_ARGREG(dest)) + SPEC_ARGREG(dest) = SPEC_ARGREG(src); + + if (IS_STRUCT (dest) && SPEC_STRUCT (dest) == NULL) + SPEC_STRUCT (dest) = SPEC_STRUCT (src); + + /* these are the only function attributes that will be set + in a specifier while parsing */ + FUNC_NONBANKED(dest) |= FUNC_NONBANKED(src); + FUNC_BANKED(dest) |= FUNC_BANKED(src); + FUNC_ISCRITICAL(dest) |= FUNC_ISCRITICAL(src); + FUNC_ISREENT(dest) |= FUNC_ISREENT(src); + FUNC_ISNAKED(dest) |= FUNC_ISNAKED(src); + FUNC_ISISR(dest) |= FUNC_ISISR(src); + FUNC_ISJAVANATIVE(dest) |= FUNC_ISJAVANATIVE(src); + FUNC_ISBUILTIN(dest) |= FUNC_ISBUILTIN(src); + FUNC_ISOVERLAY(dest) |= FUNC_ISOVERLAY(src); + FUNC_INTNO(dest) |= FUNC_INTNO(src); + FUNC_REGBANK(dest) |= FUNC_REGBANK(src); + FUNC_ISINLINE (dest) |= FUNC_ISINLINE (src); + + return dest; +} + +/*-------------------------------------------------------------------*/ +/* genSymName - generates and returns a name used for anonymous vars */ +/*-------------------------------------------------------------------*/ +char * +genSymName (int level) +{ + static int gCount = 0; + static char gname[SDCC_NAME_MAX + 1]; + + SNPRINTF (gname, sizeof(gname), "__%04d%04d", level, gCount++); + return gname; +} + +/*------------------------------------------------------------------*/ +/* getSpec - returns the specifier part from a declaration chain */ +/*------------------------------------------------------------------*/ +sym_link * +getSpec (sym_link * p) +{ + sym_link *loop; + + loop = p; + while (p && !(IS_SPEC (p))) + p = p->next; + + return p; +} + +/*------------------------------------------------------------------*/ +/* newCharLink() - creates an char type */ +/*------------------------------------------------------------------*/ +sym_link * +newCharLink () +{ + sym_link *p; + + p = newLink (SPECIFIER); + SPEC_NOUN (p) = V_CHAR; + + return p; +} + +/*------------------------------------------------------------------*/ +/* newFloatLink - a new Float type */ +/*------------------------------------------------------------------*/ +sym_link * +newFloatLink () +{ + sym_link *p; + + p = newLink (SPECIFIER); + SPEC_NOUN (p) = V_FLOAT; + + return p; +} + +/*------------------------------------------------------------------*/ +/* newFixed16x16Link - a new Float type */ +/*------------------------------------------------------------------*/ +sym_link * +newFixed16x16Link () +{ + sym_link *p; + + p = newLink (SPECIFIER); + SPEC_NOUN (p) = V_FIXED16X16; + + return p; +} + +/*------------------------------------------------------------------*/ +/* newLongLink() - new long type */ +/*------------------------------------------------------------------*/ +sym_link * +newLongLink () +{ + sym_link *p; + + p = newLink (SPECIFIER); + SPEC_NOUN (p) = V_INT; + SPEC_LONG (p) = 1; + + return p; +} + +/*------------------------------------------------------------------*/ +/* newIntLink() - creates an int type */ +/*------------------------------------------------------------------*/ +sym_link * +newIntLink () +{ + sym_link *p; + + p = newLink (SPECIFIER); + SPEC_NOUN (p) = V_INT; + + return p; +} + +/*------------------------------------------------------------------*/ +/* newBoolLink() - creates an bool type */ +/*------------------------------------------------------------------*/ +sym_link * +newBoolLink () +{ + sym_link *p; + + p = newLink (SPECIFIER); + SPEC_NOUN (p) = V_BIT; + + return p; +} + +/*------------------------------------------------------------------*/ +/* getSize - returns size of a type chain in bytes */ +/*------------------------------------------------------------------*/ +unsigned int +getSize (sym_link * p) +{ + /* if nothing return 0 */ + if (!p) + return 0; + if (IS_SPEC (p)) + { /* if this is the specifier then */ + switch (SPEC_NOUN (p)) + { /* depending on the specifier type */ + case V_INT: + return (IS_LONG (p) ? LONGSIZE : INTSIZE); + case V_FLOAT: + return FLOATSIZE; + case V_FIXED16X16: + return (4); + case V_CHAR: + return CHARSIZE; + case V_VOID: + return 0; + case V_STRUCT: + return SPEC_STRUCT (p)->size; + case V_LABEL: + return 0; + case V_SBIT: + case V_BIT: + return BITSIZE; + case V_BITFIELD: + return ((SPEC_BLEN (p) / 8) + (SPEC_BLEN (p) % 8 ? 1 : 0)); + default: + return 0; + } + } + + /* this is a declarator */ + switch (DCL_TYPE (p)) + { + case ARRAY: + if (DCL_ELEM(p)) { + return DCL_ELEM (p) * getSize (p->next); + } else { + // werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + // "can not tell the size of an array[]"); + return 0; + } + case IPOINTER: + case PPOINTER: + case POINTER: + return (PTRSIZE); + case EEPPOINTER: + case FPOINTER: + case CPOINTER: + case FUNCTION: + return (IFFUNC_BANKED (p) ? GPTRSIZE : FPTRSIZE); + case GPOINTER: + return (GPTRSIZE); + + default: + return 0; + } +} + +/*------------------------------------------------------------------*/ +/* checkStructFlexArray - check tree behind a struct */ +/*------------------------------------------------------------------*/ +static bool +checkStructFlexArray (symbol *sym, sym_link *p) +{ + /* if nothing return FALSE */ + if (!p) + return FALSE; + + if (IS_SPEC (p)) + { + /* (nested) struct with flexible array member? */ + if (IS_STRUCT (p) && SPEC_STRUCT (p)->b_flexArrayMember) + { + werror (W_INVALID_FLEXARRAY); + return FALSE; + } + return FALSE; + } + + /* this is a declarator */ + if (IS_ARRAY (p)) + { + /* flexible array member? */ + if (!DCL_ELEM(p)) + { + if (!options.std_c99) + werror (W_C89_NO_FLEXARRAY); + return TRUE; + } + /* walk tree */ + return checkStructFlexArray (sym, p->next); + } + return FALSE; +} + +/*------------------------------------------------------------------*/ +/* bitsForType - returns # of bits required to store this type */ +/*------------------------------------------------------------------*/ +unsigned int +bitsForType (sym_link * p) +{ + /* if nothing return 0 */ + if (!p) + return 0; + + if (IS_SPEC (p)) + { /* if this is the specifier then */ + + switch (SPEC_NOUN (p)) + { /* depending on the specifier type */ + case V_INT: + return (IS_LONG (p) ? LONGSIZE * 8 : INTSIZE * 8); + case V_FLOAT: + return FLOATSIZE * 8; + case V_FIXED16X16: + return (32); + case V_CHAR: + return CHARSIZE * 8; + case V_VOID: + return 0; + case V_STRUCT: + return SPEC_STRUCT (p)->size * 8; + case V_LABEL: + return 0; + case V_SBIT: + case V_BIT: + return 1; + case V_BITFIELD: + return SPEC_BLEN (p); + default: + return 0; + } + } + + /* this is a specifier */ + switch (DCL_TYPE (p)) + { + case ARRAY: + return DCL_ELEM (p) * getSize (p->next) * 8; + case IPOINTER: + case PPOINTER: + case POINTER: + return (PTRSIZE * 8); + case EEPPOINTER: + case FPOINTER: + case CPOINTER: + case FUNCTION: + return (FPTRSIZE * 8); + case GPOINTER: + return (GPTRSIZE * 8); + + default: + return 0; + } +} + +/*------------------------------------------------------------------*/ +/* copySymbolChain - copies a symbol chain */ +/*------------------------------------------------------------------*/ +symbol * +copySymbolChain (symbol * src) +{ + symbol *dest; + + if (!src) + return NULL; + + dest = copySymbol (src); + dest->next = copySymbolChain (src->next); + return dest; +} + +/*------------------------------------------------------------------*/ +/* copySymbol - makes a copy of a symbol */ +/*------------------------------------------------------------------*/ +symbol * +copySymbol (symbol * src) +{ + symbol *dest; + + if (!src) + return NULL; + + dest = newSymbol (src->name, src->level); + memcpy (dest, src, sizeof (symbol)); + dest->level = src->level; + dest->block = src->block; + dest->ival = copyIlist (src->ival); + dest->type = copyLinkChain (src->type); + dest->etype = getSpec (dest->type); + dest->next = NULL; + dest->key = src->key; + dest->allocreq = src->allocreq; + return dest; +} + +/*------------------------------------------------------------------*/ +/* reverseSyms - reverses the links for a symbol chain */ +/*------------------------------------------------------------------*/ +symbol * +reverseSyms (symbol * sym) +{ + symbol *prev, *curr, *next; + + if (!sym) + return NULL; + + prev = sym; + curr = sym->next; + + while (curr) + { + next = curr->next; + curr->next = prev; + prev = curr; + curr = next; + } + sym->next = (void *) NULL; + return prev; +} + +/*------------------------------------------------------------------*/ +/* reverseLink - reverses the links for a type chain */ +/*------------------------------------------------------------------*/ +sym_link * +reverseLink (sym_link * type) +{ + sym_link *prev, *curr, *next; + + if (!type) + return NULL; + + prev = type; + curr = type->next; + + while (curr) + { + next = curr->next; + curr->next = prev; + prev = curr; + curr = next; + } + type->next = (void *) NULL; + return prev; +} + +/*------------------------------------------------------------------*/ +/* addSymChain - adds a symbol chain to the symboltable */ +/*------------------------------------------------------------------*/ +void +addSymChain (symbol ** symHead) +{ + symbol *sym = *symHead; + symbol *csym = NULL; + symbol **symPtrPtr; + int error = 0; + + for (; sym != NULL; sym = sym->next) + { + changePointer(sym->type); + checkTypeSanity(sym->etype, sym->name); + + if (!sym->level && !(IS_SPEC(sym->etype) && IS_TYPEDEF(sym->etype))) + checkDecl (sym, 0); + else + { + /* if this is an array without any dimension + then update the dimension from the initial value */ + if (IS_ARRAY (sym->type) && !DCL_ELEM (sym->type)) + DCL_ELEM (sym->type) = getNelements (sym->type, sym->ival); + } + + /* if already exists in the symbol table on the same level */ + if ((csym = findSymWithLevel (SymbolTab, sym)) && + csym->level == sym->level) + { + /* if not formal parameter and not in file scope + then show symbol redefined error + else check if symbols have compatible types */ + if (!sym->_isparm && sym->level > 0) + error = 1; + else + { + /* If the previous definition was for an array with incomplete + type, and the new definition has completed the type, update + the original type to match */ + if (IS_DECL(csym->type) && DCL_TYPE(csym->type)==ARRAY + && IS_DECL(sym->type) && DCL_TYPE(sym->type)==ARRAY) + { + if (!DCL_ELEM(csym->type) && DCL_ELEM(sym->type)) + DCL_ELEM(csym->type) = DCL_ELEM(sym->type); + } + + #if 0 + /* If only one of the definitions used the "at" keyword, copy */ + /* the address to the other. */ + if (IS_SPEC(csym->etype) && SPEC_ABSA(csym->etype) + && IS_SPEC(sym->etype) && !SPEC_ABSA(sym->etype)) + { + SPEC_ABSA (sym->etype) = 1; + SPEC_ADDR (sym->etype) = SPEC_ADDR (csym->etype); + } + if (IS_SPEC(csym->etype) && !SPEC_ABSA(csym->etype) + && IS_SPEC(sym->etype) && SPEC_ABSA(sym->etype)) + { + SPEC_ABSA (csym->etype) = 1; + SPEC_ADDR (csym->etype) = SPEC_ADDR (sym->etype); + } + #endif + + error = 0; + if (csym->ival && sym->ival) + error = 1; + if (compareTypeExact (csym->type, sym->type, sym->level) != 1) + error = 1; + } + + if (error) + { + /* one definition extern ? */ + if (IS_EXTERN (csym->etype) || IS_EXTERN (sym->etype)) + werror (E_EXTERN_MISMATCH, sym->name); + else + werror (E_DUPLICATE, sym->name); + werrorfl (csym->fileDef, csym->lineDef, E_PREVIOUS_DEF); + #if 0 + fprintf (stderr, "from type '"); + printTypeChain (csym->type, stderr); + if (IS_SPEC (csym->etype) && SPEC_ABSA (csym->etype)) + fprintf(stderr, " at 0x%x", SPEC_ADDR (csym->etype)); + fprintf (stderr, "'\nto type '"); + printTypeChain (sym->type, stderr); + if (IS_SPEC (sym->etype) && SPEC_ABSA (sym->etype)) + fprintf(stderr, " at 0x%x", SPEC_ADDR (sym->etype)); + fprintf (stderr, "'\n"); + #endif + continue; + } + + if (csym->ival && !sym->ival) + sym->ival = csym->ival; + + if (!csym->cdef && !sym->cdef && IS_EXTERN (sym->etype)) + { + /* if none of symbols is a compiler defined function + and at least one is not extern + then set the new symbol to non extern */ + SPEC_EXTR(sym->etype) = SPEC_EXTR(csym->etype); + } + + /* delete current entry */ + deleteSym (SymbolTab, csym, csym->name); + deleteFromSeg(csym); + + symPtrPtr = symHead; + while (*symPtrPtr && *symPtrPtr != csym) + symPtrPtr = &(*symPtrPtr)->next; + if (*symPtrPtr == csym) + *symPtrPtr = csym->next; + } + + /* add new entry */ + addSym (SymbolTab, sym, sym->name, sym->level, sym->block, 1); + } +} + + +/*------------------------------------------------------------------*/ +/* funcInChain - DCL Type 'FUNCTION' found in type chain */ +/*------------------------------------------------------------------*/ +int +funcInChain (sym_link * lnk) +{ + while (lnk) + { + if (IS_FUNC (lnk)) + return 1; + lnk = lnk->next; + } + return 0; +} + +/*------------------------------------------------------------------*/ +/* structElemType - returns the type info of a struct member */ +/*------------------------------------------------------------------*/ +sym_link * +structElemType (sym_link * stype, value * id) +{ + symbol *fields = (SPEC_STRUCT (stype) ? SPEC_STRUCT (stype)->fields : NULL); + sym_link *type, *etype; + sym_link *petype = getSpec (stype); + + if (fields && id) { + + /* look for the id */ + while (fields) + { + if (strcmp (fields->rname, id->name) == 0) + { + type = copyLinkChain (fields->type); + etype = getSpec (type); + SPEC_SCLS (etype) = (SPEC_SCLS (petype) == S_REGISTER ? + SPEC_SCLS (etype) : SPEC_SCLS (petype)); + SPEC_OCLS (etype) = (SPEC_SCLS (petype) == S_REGISTER ? + SPEC_OCLS (etype) : SPEC_OCLS (petype)); + if (IS_SPEC (type)) + SPEC_CONST (type) |= SPEC_CONST (stype); + else + DCL_PTR_CONST (type) |= SPEC_CONST (stype); + return type; + } + fields = fields->next; + } + } + + werror (E_NOT_MEMBER, id->name); + + // the show must go on + return newIntLink(); +} + +/*------------------------------------------------------------------*/ +/* getStructElement - returns element of a tructure definition */ +/*------------------------------------------------------------------*/ +symbol * +getStructElement (structdef * sdef, symbol * sym) +{ + symbol *field; + + for (field = sdef->fields; field; field = field->next) + if (strcmp (field->name, sym->name) == 0) + return field; + + werror (E_NOT_MEMBER, sym->name); + + return sdef->fields; +} + +/*------------------------------------------------------------------*/ +/* compStructSize - computes the size of a structure */ +/*------------------------------------------------------------------*/ +int +compStructSize (int su, structdef * sdef) +{ + int sum = 0, usum = 0; + int bitOffset = 0; + symbol *loop; + + /* for the identifiers */ + loop = sdef->fields; + while (loop) { + + /* create the internal name for this variable */ + SNPRINTF (loop->rname, sizeof(loop->rname), "_%s", loop->name); + if (su == UNION) { + sum = 0; + bitOffset = 0; + } + SPEC_VOLATILE (loop->etype) |= (su == UNION ? 1 : 0); + + /* if this is a bit field */ + if (loop->bitVar) { + + SPEC_BUNNAMED (loop->etype) = loop->bitUnnamed; + + /* change it to a unsigned bit */ + SPEC_NOUN (loop->etype) = V_BITFIELD; + /* ISO/IEC 9899 J.3.9 implementation defined behaviour: */ + /* a "plain" int bitfield is unsigned */ + if (!loop->etype->select.s.b_signed) + SPEC_USIGN(loop->etype) = 1; + + if (loop->bitVar == BITVAR_PAD) { + /* A zero length bitfield forces padding */ + SPEC_BLEN (loop->etype) = 0; + SPEC_BSTR (loop->etype) = bitOffset; + if (bitOffset > 0) + bitOffset = 8; /* padding is not needed when at bit 0 */ + loop->offset = sum; + } + else { + SPEC_BLEN (loop->etype) = loop->bitVar; + + if (bitOffset == 8) { + bitOffset = 0; + sum++; + } + /* check if this fit into the remaining */ + /* bits of this byte else align it to the */ + /* next byte boundary */ + if (loop->bitVar <= (8 - bitOffset)) { + /* fits into current byte */ + loop->offset = sum; + SPEC_BSTR (loop->etype) = bitOffset; + bitOffset += loop->bitVar; + } + else if (!bitOffset) { + /* does not fit, but is already byte aligned */ + loop->offset = sum; + SPEC_BSTR (loop->etype) = bitOffset; + bitOffset += loop->bitVar; + } + else { + if( TARGET_IS_PIC16 && getenv("PIC16_PACKED_BITFIELDS") ) { + /* if PIC16 && enviroment variable is set, then + * tightly pack bitfields, this means that when a + * bitfield goes beyond byte alignment, do not + * automatically start allocatint from next byte, + * but also use the available bits first */ + fprintf(stderr, ": packing bitfields in structures\n"); + SPEC_BSTR (loop->etype) = bitOffset; + bitOffset += loop->bitVar; + loop->offset = (su == UNION ? sum = 0 : sum); + } else { + /* does not fit; need to realign first */ + sum++; + loop->offset = (su == UNION ? sum = 0 : sum); + bitOffset = 0; + SPEC_BSTR (loop->etype) = bitOffset; + bitOffset += loop->bitVar; + } + } + while (bitOffset>8) { + bitOffset -= 8; + sum++; + } + } + } + else { + /* This is a non-bit field. Make sure we are */ + /* byte aligned first */ + if (bitOffset) { + sum++; + loop->offset = (su == UNION ? sum = 0 : sum); + bitOffset = 0; + } + loop->offset = sum; + checkDecl (loop, 1); + sum += getSize (loop->type); + + /* search for "flexibel array members" */ + /* and do some syntax checks */ + if ( su == STRUCT + && checkStructFlexArray (loop, loop->type)) + { + /* found a "flexible array member" */ + sdef->b_flexArrayMember = TRUE; + /* is another struct-member following? */ + if (loop->next) + werror (E_FLEXARRAY_NOTATEND); + /* is it the first struct-member? */ + else if (loop == sdef->fields) + werror (E_FLEXARRAY_INEMPTYSTRCT); + } + } + + loop = loop->next; + + /* if union then size = sizeof largest field */ + if (su == UNION) { + /* For UNION, round up after each field */ + sum += ((bitOffset+7)/8); + usum = max (usum, sum); + } + + } + + /* For STRUCT, round up after all fields processed */ + if (su != UNION) + sum += ((bitOffset+7)/8); + + return (su == UNION ? usum : sum); +} + +/*-------------------------------------------------------------------*/ +/* promoteAnonStructs - promote anonymous struct/union's fields into */ +/* an enclosing struct/union */ +/*-------------------------------------------------------------------*/ +void +promoteAnonStructs (int su, structdef * sdef) +{ + symbol *field; + symbol *subfield; + symbol **tofield; + symbol *nextfield; + symbol *dupfield; + int base; + + tofield = &sdef->fields; + field = sdef->fields; + while (field) + { + nextfield = field->next; + if (!*field->name && IS_STRUCT (field->type)) + { + /* Found an anonymous struct/union. Replace it */ + /* with the fields it contains and adjust all */ + /* the offsets */ + + base = field->offset; + subfield = copySymbolChain (SPEC_STRUCT (field->type)->fields); + if (!subfield) + continue; /* just in case it's empty */ + + *tofield = subfield; + for (;;) + { + /* check for field name conflicts resulting from promotion */ + dupfield = sdef->fields; + while (dupfield && dupfield != subfield) + { + if (*subfield->name && !strcmp (dupfield->name, subfield->name)) + { + werrorfl (subfield->fileDef, subfield->lineDef, + E_DUPLICATE_MEMBER, + su==STRUCT ? "struct" : "union", + subfield->name); + werrorfl (dupfield->fileDef, dupfield->lineDef, + E_PREVIOUS_DEF); + } + dupfield = dupfield->next; + } + + subfield->offset += base; + if (subfield->next) + subfield = subfield->next; + else + break; + } + subfield->next = nextfield; + tofield = &subfield->next; + } + else + tofield = &field->next; + field = nextfield; + } +} + + +/*------------------------------------------------------------------*/ +/* checkSClass - check the storage class specification */ +/*------------------------------------------------------------------*/ +static void +checkSClass (symbol * sym, int isProto) +{ + sym_link *t; + + if (getenv("DEBUG_SANITY")) { + fprintf (stderr, "checkSClass: %s \n", sym->name); + } + + /* type is literal can happen for enums change to auto */ + if (SPEC_SCLS (sym->etype) == S_LITERAL && !SPEC_ENUM (sym->etype)) + SPEC_SCLS (sym->etype) = S_AUTO; + + /* if sfr or sbit then must also be volatile */ + if (SPEC_SCLS (sym->etype) == S_SBIT || + SPEC_SCLS (sym->etype) == S_SFR) + { + SPEC_VOLATILE (sym->etype) = 1; + } + + /* make sure restrict is only used with pointers */ + if (SPEC_RESTRICT (sym->etype)) + { + werrorfl (sym->fileDef, sym->lineDef, E_BAD_RESTRICT); + SPEC_RESTRICT (sym->etype) = 0; + } + t = sym->type; + while (t) + { + if (IS_DECL (t) && DCL_PTR_RESTRICT (t) && !IS_PTR (t)) + { + werrorfl (sym->fileDef, sym->lineDef, E_BAD_RESTRICT); + DCL_PTR_RESTRICT (t) = 0; + break; + } + t = t->next; + } + + /* if absolute address given then it mark it as + volatile -- except in the PIC port */ + +#if !OPT_DISABLE_PIC || !OPT_DISABLE_PIC16 + /* The PIC port uses a different peep hole optimizer based on "pCode" */ + if (!TARGET_IS_PIC && !TARGET_IS_PIC16) +#endif + + if (IS_ABSOLUTE (sym->etype)) + SPEC_VOLATILE (sym->etype) = 1; + + if (TARGET_IS_MCS51 && + IS_ABSOLUTE (sym->etype) && + SPEC_SCLS (sym->etype) == S_SFR) + { + int n, size; + unsigned addr; + + if (SPEC_NOUN (sym->etype) == V_CHAR) + size = 8; + else if (SPEC_LONG (sym->etype) == 0) + size = 16; + else + size = 32; + + addr = SPEC_ADDR (sym->etype); + for (n=0; n> n) & 0xFF) < 0x80) + werror (W_SFR_ABSRANGE, sym->name); + } + + /* If code memory is read only, then pointers to code memory */ + /* implicitly point to constants -- make this explicit */ + t = sym->type; + while (t && t->next) { + if (IS_CODEPTR(t) && port->mem.code_ro) { + if (IS_SPEC(t->next)) { + SPEC_CONST (t->next) = 1; + } else { + DCL_PTR_CONST (t->next) = 1; + } + } + t = t->next; + } + + /* global variables declared const put into code */ + /* if no other storage class specified */ + if (sym->level == 0 && + SPEC_SCLS(sym->etype) == S_FIXED && + !IS_FUNC(sym->type)) { + /* find the first non-array link */ + t = sym->type; + while (IS_ARRAY(t)) + t = t->next; + if (IS_CONSTANT (t)) { + SPEC_SCLS (sym->etype) = S_CODE; + } + } + + /* global variable in code space is a constant */ + if (sym->level == 0 && + SPEC_SCLS (sym->etype) == S_CODE && + port->mem.code_ro) { + /* find the first non-array link */ + t = sym->type; + while (IS_ARRAY(t)) + t = t->next; + if (IS_SPEC(t)) { + SPEC_CONST (t) = 1; + } else { + DCL_PTR_CONST (t) = 1; + } + } + + /* if bit variable then no storage class can be */ + /* specified since bit is already a storage */ + if (IS_BITVAR (sym->etype) && + (SPEC_SCLS (sym->etype) != S_FIXED && + SPEC_SCLS (sym->etype) != S_SBIT && + SPEC_SCLS (sym->etype) != S_BIT) + ) + { + werror (E_BITVAR_STORAGE, sym->name); + SPEC_SCLS (sym->etype) = S_FIXED; + } + + /* extern variables cannot be initialized */ + if (IS_EXTERN (sym->etype) && sym->ival) + { + werror (E_EXTERN_INIT, sym->name); + sym->ival = NULL; + } + + /* if this is an automatic symbol */ + if (sym->level && (options.stackAuto || reentrant)) { + if (SPEC_SCLS (sym->etype) != S_BIT) { + if ((SPEC_SCLS (sym->etype) == S_AUTO || + SPEC_SCLS (sym->etype) == S_FIXED || + SPEC_SCLS (sym->etype) == S_REGISTER || + SPEC_SCLS (sym->etype) == S_STACK || + SPEC_SCLS (sym->etype) == S_XSTACK)) { + SPEC_SCLS (sym->etype) = S_AUTO; + } else { + /* storage class may only be specified for statics */ + if (!IS_STATIC(sym->etype)) { + werror (E_AUTO_ASSUMED, sym->name); + } + } + } + } + + /* automatic symbols cannot be given */ + /* an absolute address ignore it */ + if (sym->level && !IS_STATIC(sym->etype) && + SPEC_ABSA (sym->etype) && + (options.stackAuto || reentrant)) + { + werror (E_AUTO_ABSA, sym->name); + SPEC_ABSA (sym->etype) = 0; + } + + /* arrays & pointers cannot be defined for bits */ + /* SBITS or SFRs or BIT */ + if ((IS_ARRAY (sym->type) || IS_PTR (sym->type)) && + !IS_FUNCPTR (sym->type) && + (SPEC_NOUN (sym->etype) == V_BIT || + SPEC_NOUN (sym->etype) == V_SBIT || + SPEC_NOUN (sym->etype) == V_BITFIELD || + SPEC_SCLS (sym->etype) == S_SFR)) + werror (E_BIT_ARRAY, sym->name); + + /* if this is a bit|sbit then set length & start */ + if (SPEC_NOUN (sym->etype) == V_BIT || + SPEC_NOUN (sym->etype) == V_SBIT) + { + SPEC_BLEN (sym->etype) = 1; + SPEC_BSTR (sym->etype) = 0; + } + + if (!isProto) { + /* variables declared in CODE space must have */ + /* initializers if not an extern */ + if (SPEC_SCLS (sym->etype) == S_CODE && + sym->ival == NULL && + !sym->_isparm && + //!sym->level && + port->mem.code_ro && + !IS_EXTERN (sym->etype) && + !SPEC_ABSA (sym->etype) && + !funcInChain (sym->type)) + werror (E_CODE_NO_INIT, sym->name); + } + + /* if parameter or local variable then change */ + /* the storage class to reflect where the var will go */ + if (sym->level && SPEC_SCLS (sym->etype) == S_FIXED + && !IS_STATIC(sym->etype) + ) + { + if (options.stackAuto || (currFunc && IFFUNC_ISREENT (currFunc->type))) + { + SPEC_SCLS (sym->etype) = (options.useXstack ? + S_XSTACK : S_STACK); + } + else + { + /* hack-o-matic! I see no reason why the useXstack option should ever + * control this allocation, but the code was originally that way, and + * changing it for non-390 ports breaks the compiler badly. + */ + bool useXdata = (TARGET_IS_DS390 || TARGET_IS_DS400) ? + 1 : options.useXstack; + SPEC_SCLS (sym->etype) = (useXdata ? + S_XDATA : S_FIXED); + } + } +} + +/*------------------------------------------------------------------*/ +/* changePointer - change pointer to functions */ +/*------------------------------------------------------------------*/ +void +changePointer (sym_link * p) +{ + + /* go thru the chain of declarations */ + /* if we find a pointer to a function */ + /* change it to a ptr to code area */ + /* unless the function is banked. */ + for (; p; p = p->next) + { + if (!IS_SPEC (p) && DCL_TYPE (p) == UPOINTER) + DCL_TYPE (p) = port->unqualified_pointer; + if (IS_PTR (p) && IS_FUNC (p->next)) + if (!IFFUNC_BANKED(p->next)) + DCL_TYPE (p) = CPOINTER; + } +} + +/*------------------------------------------------------------------*/ +/* checkDecl - does semantic validation of a declaration */ +/*------------------------------------------------------------------*/ +int +checkDecl (symbol * sym, int isProto) +{ + + checkSClass (sym, isProto); /* check the storage class */ + changePointer (sym->type); /* change pointers if required */ + + /* if this is an array without any dimension + then update the dimension from the initial value */ + if (IS_ARRAY (sym->type) && !DCL_ELEM (sym->type)) + DCL_ELEM (sym->type) = getNelements (sym->type, sym->ival); + + return 0; +} + +/*------------------------------------------------------------------*/ +/* copyLinkChain - makes a copy of the link chain & rets ptr 2 head */ +/*------------------------------------------------------------------*/ +sym_link * +copyLinkChain (sym_link * p) +{ + sym_link *head, *curr, *loop; + + /* note: v_struct and v_struct->fields are not copied! */ + curr = p; + head = loop = (curr ? newLink (p->class) : (void *) NULL); + while (curr) + { + memcpy (loop, curr, sizeof (sym_link)); /* copy it */ + loop->next = (curr->next ? newLink (curr->next->class) : (void *) NULL); + loop = loop->next; + curr = curr->next; + } + + return head; +} + +/*------------------------------------------------------------------*/ +/* cleanUpBlock - cleansup the symbol table specified for all the */ +/* symbols in the given block */ +/*------------------------------------------------------------------*/ +void +cleanUpBlock (bucket ** table, int block) +{ + int i; + bucket *chain; + + /* go thru the entire table */ + for (i = 0; i < 256; i++) + { + for (chain = table[i]; chain; chain = chain->next) + { + if (chain->block >= block) + { + deleteSym (table, chain->sym, chain->name); + } + } + } +} + +/*------------------------------------------------------------------*/ +/* cleanUpLevel - cleansup the symbol table specified for all the */ +/* symbols in the given level */ +/*------------------------------------------------------------------*/ +void +cleanUpLevel (bucket ** table, int level) +{ + int i; + bucket *chain; + + /* go thru the entire table */ + for (i = 0; i < 256; i++) + { + for (chain = table[i]; chain; chain = chain->next) + { + if (chain->level >= level) + { + deleteSym (table, chain->sym, chain->name); + } + } + } +} + +/*------------------------------------------------------------------*/ +/* computeTypeOr - computes the resultant type from two types */ +/*------------------------------------------------------------------*/ +static sym_link * +computeTypeOr (sym_link * etype1, sym_link * etype2, sym_link * reType) +{ + /* sanity check */ + assert ( (IS_CHAR (etype1) || IS_BIT (etype1)) + && (IS_CHAR (etype2) || IS_BIT (etype2))); + + if (SPEC_USIGN (etype1) == SPEC_USIGN (etype2)) + { + SPEC_USIGN (reType) = SPEC_USIGN (etype1); + return reType; + } + + if (SPEC_USIGN (etype1)) + { + if ( IS_LITERAL (etype2) + && floatFromVal (valFromType (etype2)) >= 0) + SPEC_USIGN (reType) = 1; + else + { + /* promote to int */ + SPEC_USIGN (reType) = 0; + SPEC_NOUN (reType) = V_INT; + } + } + else /* etype1 signed */ + { + if ( IS_LITERAL (etype2) + && floatFromVal (valFromType (etype2)) <= 127) + SPEC_USIGN (reType) = 0; + else + { + /* promote to int */ + SPEC_USIGN (reType) = 0; + SPEC_NOUN (reType) = V_INT; + } + } + + if (SPEC_USIGN (etype2)) + { + if ( IS_LITERAL (etype1) + && floatFromVal (valFromType (etype1)) >= 0) + SPEC_USIGN (reType) = 1; + else + { + /* promote to int */ + SPEC_USIGN (reType) = 0; + SPEC_NOUN (reType) = V_INT; + } + } + else /* etype2 signed */ + { + if ( IS_LITERAL (etype1) + && floatFromVal (valFromType (etype1)) <= 127) + SPEC_USIGN (reType) = 0; + else + { + /* promote to int */ + SPEC_USIGN (reType) = 0; + SPEC_NOUN (reType) = V_INT; + } + } + return reType; +} + +/*------------------------------------------------------------------*/ +/* computeType - computes the resultant type from two types */ +/*------------------------------------------------------------------*/ +sym_link * +computeType (sym_link * type1, sym_link * type2, + RESULT_TYPE resultType, int op) +{ + sym_link *rType; + sym_link *reType; + sym_link *etype1 = getSpec (type1); + sym_link *etype2; + + etype2 = type2 ? getSpec (type2) : type1; + + /* if one of them is a float then result is a float */ + /* here we assume that the types passed are okay */ + /* and can be cast to one another */ + /* which ever is greater in size */ + if (IS_FLOAT (etype1) || IS_FLOAT (etype2)) + rType = newFloatLink (); + /* if both are fixed16x16 then result is float */ + else if (IS_FIXED16X16(etype1) && IS_FIXED16X16(etype2)) + rType = newFixed16x16Link(); + else if (IS_FIXED16X16(etype1) && IS_FLOAT (etype2)) + rType = newFloatLink (); + else if (IS_FLOAT (etype1) && IS_FIXED16X16 (etype2) ) + rType = newFloatLink (); + + /* if both are bitvars choose the larger one */ + else if (IS_BITVAR (etype1) && IS_BITVAR (etype2)) + rType = SPEC_BLEN (etype1) >= SPEC_BLEN (etype2) ? + copyLinkChain (type1) : copyLinkChain (type2); + + /* if only one of them is a bit variable then the other one prevails */ + else if (IS_BITVAR (etype1) && !IS_BITVAR (etype2)) + { + rType = copyLinkChain (type2); + /* bitfield can have up to 16 bits */ + if (getSize (etype1) > 1) + SPEC_NOUN (getSpec (rType)) = V_INT; + } + else if (IS_BITVAR (etype2) && !IS_BITVAR (etype1)) + { + rType = copyLinkChain (type1); + /* bitfield can have up to 16 bits */ + if (getSize (etype2) > 1) + SPEC_NOUN (getSpec (rType)) = V_INT; + } + /* if one of them is a pointer or array then that + prevails */ + else if (IS_PTR (type1) || IS_ARRAY (type1)) + rType = copyLinkChain (type1); + else if (IS_PTR (type2) || IS_ARRAY (type2)) + rType = copyLinkChain (type2); + else if (getSize (type1) > getSize (type2)) + rType = copyLinkChain (type1); + else + rType = copyLinkChain (type2); + + reType = getSpec (rType); + + /* avoid conflicting types */ + reType->select.s.b_signed = 0; + + /* if result is a literal then make not so */ + if (IS_LITERAL (reType)) + SPEC_SCLS (reType) = S_REGISTER; + + switch (resultType) + { + case RESULT_TYPE_IFX: + if (TARGET_IS_HC08) + break; + //fallthrough + case RESULT_TYPE_BIT: + if (op == ':') + { + SPEC_NOUN (reType) = V_BIT; + return rType; + } + break; + case RESULT_TYPE_CHAR: + if (IS_BITVAR (reType)) + { + SPEC_NOUN (reType) = V_CHAR; + SPEC_SCLS (reType) = 0; + SPEC_USIGN (reType) = 0; + return rType; + } + break; + case RESULT_TYPE_INT: + case RESULT_TYPE_NONE: + case RESULT_TYPE_OTHER: + if (IS_BIT (reType)) + { + SPEC_NOUN (reType) = V_CHAR; + SPEC_SCLS (reType) = 0; + SPEC_USIGN (reType) = 0; + return rType; + } + else if (IS_BITFIELD (reType)) + { + /* could be smarter, but it depends on the op */ + /* this is for the worst case: a multiplication of 4 * 4 bit */ + SPEC_NOUN (reType) = SPEC_BLEN (reType) <= 4 ? V_CHAR : V_INT; + SPEC_SCLS (reType) = 0; + SPEC_USIGN (reType) = 0; + return rType; + } + else if (IS_CHAR (reType)) + { + /* promotion of some special cases */ + switch (op) + { + case '|': + case '^': + return computeTypeOr (etype1, etype2, reType); + case '&': + if (SPEC_USIGN (etype1) != SPEC_USIGN (etype2)) + { + SPEC_USIGN (reType) = 1; + return rType; + } + break; + case '*': + SPEC_NOUN (reType) = V_INT; + SPEC_USIGN (reType) = 0; + return rType; + case '/': + /* if both are unsigned char then no promotion required */ + if (!(SPEC_USIGN (etype1) && SPEC_USIGN (etype2))) + { + SPEC_NOUN (reType) = V_INT; + SPEC_USIGN (reType) = 0; + return rType; + } + break; + default: + break; + } + } + break; + default: + break; + } + + /* SDCC's sign promotion: + - if one or both operands are unsigned, the resultant type will be unsigned + (except char, see below) + - if an operand is promoted to a larger type (char -> int, int -> long), + the larger type will be signed + + SDCC tries hard to avoid promotion to int and does 8 bit calculation as + much as possible. We're leaving ISO IEC 9899 here and have to extrapolate + the standard. The standard demands, that the result has to be the same + "as if" the promotion would have been performed: + + - if the result of an operation with two char's is promoted to a + larger type, the result will be signed. + + More sophisticated are these: + - if the result of an operation with two char's is a char again, + the result will only then be unsigned, if both operands are + unsigned. In all other cases the result will be signed. + + This seems to be contradictionary to the first two rules, but it makes + real sense (all types are char's): + + A signed char can be negative; this must be preserved in the result + -1 * 100 = -100; + + Only if both operands are unsigned it's safe to make the result + unsigned; this helps to avoid overflow: + 2 * 100 = 200; + + - ToDo: document '|', '^' and '&' + + Homework: - why is (200 * 200 < 0) true? + - why is { char l = 200, r = 200; (r * l > 0) } true? + */ + + if (!IS_FLOAT (reType) + && ( (SPEC_USIGN (etype1) + /* if this operand is promoted to a larger type, + then it will be promoted to a signed type */ + && !(bitsForType (etype1) < bitsForType (reType)) + /* char require special handling */ + && !IS_CHAR (etype1)) + || /* same for 2nd operand */ + (SPEC_USIGN (etype2) + && !(bitsForType (etype2) < bitsForType (reType)) + && !IS_CHAR (etype2)) + || /* if both are 'unsigned char' and not promoted + let the result be unsigned too */ + ( SPEC_USIGN (etype1) + && SPEC_USIGN (etype2) + && IS_CHAR (etype1) + && IS_CHAR (etype2) + && IS_CHAR (reType)))) + SPEC_USIGN (reType) = 1; + else + SPEC_USIGN (reType) = 0; + + return rType; +} + +int +comparePtrType (sym_link * dest, sym_link * src, bool bMustCast) +{ + int res; + + if (IS_VOID (src->next) && IS_VOID (dest->next)) + return bMustCast ? -1 : 1; + if ((IS_VOID (src->next) && !IS_VOID (dest->next)) || + (!IS_VOID (src->next) && IS_VOID (dest->next)) ) + return -1; + res = compareType (dest->next, src->next); + if (res == 1) + return bMustCast ? -1 : 1; + else if (res == -2) + return -2; + else + return 0; +} + +/*--------------------------------------------------------------------*/ +/* compareType - will do type check return 1 if match, 0 if no match, */ +/* -1 if castable, -2 if only signedness differs */ +/*--------------------------------------------------------------------*/ +int +compareType (sym_link * dest, sym_link * src) +{ + if (!dest && !src) + return 1; + + if (dest && !src) + return 0; + + if (src && !dest) + return 0; + + /* if dest is a declarator then */ + if (IS_DECL (dest)) + { + if (IS_DECL (src)) + { + /* banked function pointer */ + if (IS_GENPTR (dest) && IS_GENPTR (src)) + { + if (IS_FUNC (src->next) && IS_VOID(dest->next)) + return -1; + if (IS_FUNC (dest->next) && IS_VOID(src->next)) + return -1; + return comparePtrType(dest, src, FALSE); + } + + if (DCL_TYPE (src) == DCL_TYPE (dest)) + { + if (IS_FUNC(src)) + { + //checkFunction(src,dest); + } + return comparePtrType(dest, src, FALSE); + } + if (IS_PTR (dest) && IS_GENPTR (src) && IS_VOID(src->next)) + { + return -1; + } + if (IS_PTR (src) && + (IS_GENPTR (dest) || + ((DCL_TYPE(src) == POINTER) && (DCL_TYPE(dest) == IPOINTER)) + )) + { + return comparePtrType(dest, src, TRUE); + } + if (IS_PTR (dest) && IS_ARRAY (src)) + { + value *val=aggregateToPointer (valFromType(src)); + int res=compareType (dest, val->type); + Safe_free(val->type); + Safe_free(val); + return res; + } + if (IS_PTR (dest) && IS_FUNC (dest->next) && IS_FUNC (src)) + return compareType (dest->next, src); + return 0; + } + else if (IS_PTR (dest) && IS_INTEGRAL (src)) + return -1; + else + return 0; + } + + if (IS_PTR (src) && IS_VOID (dest)) + return -1; + + /* if one is a specifier and the other is not */ + if ((IS_SPEC (src) && !IS_SPEC (dest)) || + (IS_SPEC (dest) && !IS_SPEC (src))) + return 0; + + /* if one of them is a void then ok */ + if (SPEC_NOUN (dest) == V_VOID && + SPEC_NOUN (src) != V_VOID) + return -1; + + if (SPEC_NOUN (dest) != V_VOID && + SPEC_NOUN (src) == V_VOID) + return -1; + + /* if they are both bitfields then if the lengths + and starts don't match */ + if (IS_BITFIELD (dest) && IS_BITFIELD (src) && + (SPEC_BLEN (dest) != SPEC_BLEN (src) || + SPEC_BSTR (dest) != SPEC_BSTR (src))) + return -1; + + /* it is a specifier */ + if (SPEC_NOUN (dest) != SPEC_NOUN (src)) + { + if (SPEC_USIGN (dest) == SPEC_USIGN (src) && + IS_INTEGRAL (dest) && IS_INTEGRAL (src) && + /* I would prefer + bitsForType (dest) == bitsForType (src)) + instead of the next two lines, but the regression tests fail with + them; I guess it's a problem with replaceCheaperOp */ + getSize (dest) == getSize (src) && + (IS_BIT (dest) == IS_BIT (src))) + return 1; + else if (IS_ARITHMETIC (dest) && IS_ARITHMETIC (src)) + return -1; + else + return 0; + } + else if (IS_STRUCT (dest)) + { + if (SPEC_STRUCT (dest) != SPEC_STRUCT (src)) + return 0; + else + return 1; + } + if (SPEC_LONG (dest) != SPEC_LONG (src)) + return -1; + + if (SPEC_USIGN (dest) != SPEC_USIGN (src)) + return -2; + + return 1; +} + +/*--------------------------------------------------------------------*/ +/* compareTypeExact - will do type check return 1 if match exactly */ +/*--------------------------------------------------------------------*/ +int +compareTypeExact (sym_link * dest, sym_link * src, int level) +{ + STORAGE_CLASS srcScls, destScls; + + if (!dest && !src) + return 1; + + if (dest && !src) + return 0; + + if (src && !dest) + return 0; + + /* if dest is a declarator then */ + if (IS_DECL (dest)) + { + if (IS_DECL (src)) + { + if (DCL_TYPE (src) == DCL_TYPE (dest)) { + if ((DCL_TYPE (src) == ARRAY) && (DCL_ELEM (src) != DCL_ELEM (dest))) + return 0; + if (DCL_PTR_CONST (src) != DCL_PTR_CONST (dest)) + return 0; + if (DCL_PTR_VOLATILE (src) != DCL_PTR_VOLATILE (dest)) + return 0; + if (IS_FUNC(src)) + { + value *exargs, *acargs, *checkValue; + + /* verify function return type */ + if (!compareTypeExact (dest->next, src->next, -1)) + return 0; + if (FUNC_ISISR (dest) != FUNC_ISISR (src)) + return 0; + if (FUNC_REGBANK (dest) != FUNC_REGBANK (src)) + return 0; + if (IFFUNC_ISNAKED (dest) != IFFUNC_ISNAKED (src)) + return 0; + #if 0 + if (IFFUNC_ISREENT (dest) != IFFUNC_ISREENT (src) && argCnt>1) + return 0; + #endif + + /* compare expected args with actual args */ + exargs = FUNC_ARGS(dest); + acargs = FUNC_ARGS(src); + + /* for all the expected args do */ + for (; exargs && acargs; exargs = exargs->next, acargs = acargs->next) + { + //checkTypeSanity(acargs->etype, acargs->name); + + if (IS_AGGREGATE (acargs->type)) + { + checkValue = copyValue (acargs); + aggregateToPointer (checkValue); + } + else + checkValue = acargs; + + #if 0 + if (!compareTypeExact (exargs->type, checkValue->type, -1)) + return 0; + #endif + } + + /* if one them ended we have a problem */ + if ((exargs && !acargs && !IS_VOID (exargs->type)) || + (!exargs && acargs && !IS_VOID (acargs->type))) + return 0; + return 1; + } + return compareTypeExact (dest->next, src->next, level); + } + return 0; + } + return 0; + } + + /* if one is a specifier and the other is not */ + if ((IS_SPEC (src) && !IS_SPEC (dest)) || + (IS_SPEC (dest) && !IS_SPEC (src))) + return 0; + + /* if one of them is a void then ok */ + if (SPEC_NOUN (dest) != SPEC_NOUN (src)) + return 0; + + /* if they are both bitfields then if the lengths + and starts don't match */ + if (IS_BITFIELD (dest) && IS_BITFIELD (src) && + (SPEC_BLEN (dest) != SPEC_BLEN (src) || + SPEC_BSTR (dest) != SPEC_BSTR (src))) + return 0; + + if (IS_INTEGRAL (dest)) + { + /* signedness must match */ + if (SPEC_USIGN (dest) != SPEC_USIGN (src)) + return 0; + /* size must match */ + if (SPEC_LONG (dest) != SPEC_LONG (src)) + return 0; + if (SPEC_SHORT (dest) != SPEC_SHORT (src)) + return 0; + } + + if (IS_STRUCT (dest)) + { + if (SPEC_STRUCT (dest) != SPEC_STRUCT (src)) + return 0; + } + + if (SPEC_CONST (dest) != SPEC_CONST (src)) + return 0; + if (SPEC_VOLATILE (dest) != SPEC_VOLATILE (src)) + return 0; + if (SPEC_STAT (dest) != SPEC_STAT (src)) + return 0; + if (SPEC_ABSA (dest) != SPEC_ABSA (src)) + return 0; + if (SPEC_ABSA (dest) && SPEC_ADDR (dest) != SPEC_ADDR (src)) + return 0; + + destScls = SPEC_SCLS (dest); + srcScls = SPEC_SCLS (src); + + /* Compensate for const to const code change in checkSClass() */ + if (!level & port->mem.code_ro && SPEC_CONST (dest)) + { + if (srcScls == S_CODE && destScls == S_FIXED) + destScls = S_CODE; + if (destScls == S_CODE && srcScls == S_FIXED) + srcScls = S_CODE; + } + + /* compensate for allocGlobal() */ + if ((srcScls == S_FIXED || srcScls == S_AUTO) + && port->mem.default_globl_map == xdata + && !level) + srcScls = S_XDATA; + + if (level>0 && !SPEC_STAT (dest)) + { + /* Compensate for hack-o-matic in checkSClass() */ + if (options.stackAuto || (currFunc && IFFUNC_ISREENT (currFunc->type))) + { + if (destScls == S_FIXED) + destScls = (options.useXstack ? S_XSTACK : S_STACK); + if (srcScls == S_FIXED) + srcScls = (options.useXstack ? S_XSTACK : S_STACK); + } + else if (TARGET_IS_DS390 || TARGET_IS_DS400 || options.useXstack) + { + if (destScls == S_FIXED) + destScls = S_XDATA; + if (srcScls == S_FIXED) + srcScls = S_XDATA; + } + } + + if (srcScls != destScls) + { + #if 0 + printf ("level = %d\n", level); + printf ("SPEC_SCLS (src) = %d, SPEC_SCLS (dest) = %d\n", + SPEC_SCLS (src), SPEC_SCLS (dest)); + printf ("srcScls = %d, destScls = %d\n",srcScls, destScls); + #endif + return 0; + } + + return 1; +} + +/*------------------------------------------------------------------*/ +/* inCalleeSaveList - return 1 if found in callee save list */ +/*------------------------------------------------------------------*/ +static int +calleeCmp(void *p1, void *p2) +{ + return (strcmp((char *)p1, (char *)(p2)) == 0); +} + +bool +inCalleeSaveList(char *s) +{ + if (options.all_callee_saves) + return 1; + return isinSetWith(options.calleeSavesSet, s, calleeCmp); +} + +/*-----------------------------------------------------------------*/ +/* aggregateToPointer: change an aggregate type function */ +/* argument to a pointer to that type. */ +/*-----------------------------------------------------------------*/ +value * +aggregateToPointer (value * val) +{ + if (IS_AGGREGATE (val->type)) + { + /* if this is a structure */ + /* then we need to add a new link */ + if (IS_STRUCT (val->type)) + { + /* first lets add DECLARATOR type */ + sym_link *p = val->type; + + werror (W_STRUCT_AS_ARG, val->name); + val->type = newLink (DECLARATOR); + val->type->next = p; + } + + /* change to a pointer depending on the */ + /* storage class specified */ + switch (SPEC_SCLS (val->etype)) + { + case S_IDATA: + DCL_TYPE (val->type) = IPOINTER; + break; + case S_PDATA: + DCL_TYPE (val->type) = PPOINTER; + break; + case S_FIXED: + if (SPEC_OCLS(val->etype)) { + DCL_TYPE(val->type)=PTR_TYPE(SPEC_OCLS(val->etype)); + } else { + // this happens for (external) function parameters + DCL_TYPE (val->type) = port->unqualified_pointer; + } + break; + case S_AUTO: + DCL_TYPE (val->type) = PTR_TYPE(SPEC_OCLS(val->etype)); + break; + case S_DATA: + case S_REGISTER: + DCL_TYPE (val->type) = POINTER; + break; + case S_CODE: + DCL_TYPE (val->type) = CPOINTER; + break; + case S_XDATA: + DCL_TYPE (val->type) = FPOINTER; + break; + case S_EEPROM: + DCL_TYPE (val->type) = EEPPOINTER; + break; + default: + DCL_TYPE (val->type) = port->unqualified_pointer; + } + + /* is there is a symbol associated then */ + /* change the type of the symbol as well */ + if (val->sym) + { + val->sym->type = copyLinkChain (val->type); + val->sym->etype = getSpec (val->sym->type); + } + } + return val; +} +/*------------------------------------------------------------------*/ +/* checkFunction - does all kinds of check on a function */ +/*------------------------------------------------------------------*/ +int +checkFunction (symbol * sym, symbol *csym) +{ + value *exargs, *acargs; + value *checkValue; + int argCnt = 0; + + if (getenv("DEBUG_SANITY")) { + fprintf (stderr, "checkFunction: %s ", sym->name); + } + + if (!IS_DECL(sym->type) || DCL_TYPE(sym->type)!=FUNCTION) + { + werror(E_SYNTAX_ERROR, sym->name); + return 0; + } + + /* move inline specifier from return type to function attributes */ + if (IS_INLINE (sym->etype)) + { + SPEC_INLINE (sym->etype) = 0; + FUNC_ISINLINE (sym->type) = 1; + } + + /* make sure the type is complete and sane */ + checkTypeSanity(((symbol *)sym)->etype, ((symbol *)sym)->name); + + /* if not type then some kind of error */ + if (!sym->type) + return 0; + + /* if the function has no type then make it return int */ + if (!sym->type->next) + sym->type->next = sym->etype = newIntLink (); + + /* function cannot return aggregate */ + if (IS_AGGREGATE (sym->type->next)) + { + werror (E_FUNC_AGGR, sym->name); + return 0; + } + + /* check if this function is defined as calleeSaves + then mark it as such */ + FUNC_CALLEESAVES(sym->type) = inCalleeSaveList (sym->name); + + /* if interrupt service routine */ + /* then it cannot have arguments */ + if (IFFUNC_ARGS(sym->type) && FUNC_ISISR (sym->type)) + { + if (!IS_VOID(FUNC_ARGS(sym->type)->type)) { + werror (E_INT_ARGS, sym->name); + FUNC_ARGS(sym->type)=NULL; + } + } + + if (IFFUNC_ISSHADOWREGS(sym->type) && !FUNC_ISISR (sym->type)) + { + werror (E_SHADOWREGS_NO_ISR, sym->name); + } + + for (argCnt=1, acargs = FUNC_ARGS(sym->type); + acargs; + acargs=acargs->next, argCnt++) { + if (!acargs->sym) { + // this can happen for reentrant functions + werror(E_PARAM_NAME_OMITTED, sym->name, argCnt); + // the show must go on: synthesize a name and symbol + SNPRINTF (acargs->name, sizeof(acargs->name), "_%s_PARM_%d", sym->name, argCnt); + acargs->sym = newSymbol (acargs->name, 1); + SPEC_OCLS (acargs->etype) = istack; + acargs->sym->type = copyLinkChain (acargs->type); + acargs->sym->etype = getSpec (acargs->sym->type); + acargs->sym->_isparm = 1; + strncpyz (acargs->sym->rname, acargs->name, sizeof(acargs->sym->rname)); + } else if (strcmp(acargs->sym->name, acargs->sym->rname)==0) { + // synthesized name + werror(E_PARAM_NAME_OMITTED, sym->name, argCnt); + } + } + argCnt--; + + /*JCF: Mark the register bank as used*/ + RegBankUsed[FUNC_REGBANK (sym->type)] = 1; + + if (!csym && !(csym = findSym (SymbolTab, sym, sym->name))) + return 1; /* not defined nothing more to check */ + + /* check if body already present */ + if (csym && IFFUNC_HASBODY(csym->type)) + { + werror (E_FUNC_BODY, sym->name); + return 0; + } + + /* check the return value type */ + if (compareType (csym->type, sym->type) <= 0) + { + werror (E_PREV_DEF_CONFLICT, csym->name, "type"); + printFromToType(csym->type, sym->type); + return 0; + } + + if (FUNC_ISISR (csym->type) != FUNC_ISISR (sym->type)) + { + werror (E_PREV_DEF_CONFLICT, csym->name, "interrupt"); + } + + /* I don't think this is necessary for interrupts. An isr is a */ + /* root in the calling tree. */ + if ((FUNC_REGBANK (csym->type) != FUNC_REGBANK (sym->type)) && + (!FUNC_ISISR (sym->type))) + { + werror (E_PREV_DEF_CONFLICT, csym->name, "using"); + } + + if (IFFUNC_ISNAKED (csym->type) != IFFUNC_ISNAKED (sym->type)) + { + werror (E_PREV_DEF_CONFLICT, csym->name, "_naked"); + } + + /* Really, reentrant should match regardless of argCnt, but */ + /* this breaks some existing code (the fp lib functions). If */ + /* the first argument is always passed the same way, this */ + /* lax checking is ok (but may not be true for in future ports) */ + if (IFFUNC_ISREENT (csym->type) != IFFUNC_ISREENT (sym->type) + && argCnt>1) + { + //printf("argCnt = %d\n",argCnt); + werror (E_PREV_DEF_CONFLICT, csym->name, "reentrant"); + } + + if (IFFUNC_ISWPARAM (csym->type) != IFFUNC_ISWPARAM (sym->type)) + { + werror (E_PREV_DEF_CONFLICT, csym->name, "wparam"); + } + + if (IFFUNC_ISSHADOWREGS (csym->type) != IFFUNC_ISSHADOWREGS (sym->type)) + { + werror (E_PREV_DEF_CONFLICT, csym->name, "shadowregs"); + } + + + /* compare expected args with actual args */ + exargs = FUNC_ARGS(csym->type); + acargs = FUNC_ARGS(sym->type); + + /* for all the expected args do */ + for (argCnt = 1; + exargs && acargs; + exargs = exargs->next, acargs = acargs->next, argCnt++) + { + if (getenv("DEBUG_SANITY")) { + fprintf (stderr, "checkFunction: %s ", exargs->name); + } + /* make sure the type is complete and sane */ + checkTypeSanity(exargs->etype, exargs->name); + + /* If the actual argument is an array, any prototype + * will have modified it to a pointer. Duplicate that + * change here. + */ + if (IS_AGGREGATE (acargs->type)) + { + checkValue = copyValue (acargs); + aggregateToPointer (checkValue); + } + else + { + checkValue = acargs; + } + + if (compareType (exargs->type, checkValue->type) <= 0) + { + werror (E_ARG_TYPE, argCnt); + printFromToType(exargs->type, checkValue->type); + return 0; + } + } + + /* if one them ended we have a problem */ + if ((exargs && !acargs && !IS_VOID (exargs->type)) || + (!exargs && acargs && !IS_VOID (acargs->type))) + werror (E_ARG_COUNT); + + /* replace with this defition */ + sym->cdef = csym->cdef; + deleteSym (SymbolTab, csym, csym->name); + deleteFromSeg(csym); + addSym (SymbolTab, sym, sym->name, sym->level, sym->block, 1); + if (IS_EXTERN (csym->etype) && ! + IS_EXTERN (sym->etype)) + { + addSet (&publics, sym); + } + return 1; +} + +/*------------------------------------------------------------------*/ +/* cdbStructBlock - calls struct printing for a blcks */ +/*------------------------------------------------------------------*/ +void cdbStructBlock (int block) +{ + int i; + bucket **table = StructTab; + bucket *chain; + + /* go thru the entire table */ + for (i = 0; i < 256; i++) + { + for (chain = table[i]; chain; chain = chain->next) + { + if (chain->block >= block) + { + if(debugFile) + debugFile->writeType((structdef *)chain->sym, chain->block, 0, NULL); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* processFuncPtrArgs - does some processing with args of func ptrs*/ +/*-----------------------------------------------------------------*/ +void +processFuncPtrArgs (sym_link * funcType) +{ + value *val = FUNC_ARGS(funcType); + + /* if it is void then remove parameters */ + if (val && IS_VOID (val->type)) + { + FUNC_ARGS(funcType) = NULL; + return; + } +} + +/*-----------------------------------------------------------------*/ +/* processFuncArgs - does some processing with function args */ +/*-----------------------------------------------------------------*/ +void +processFuncArgs (symbol * func) +{ + value *val; + int pNum = 1; + sym_link *funcType=func->type; + + if (getenv("SDCC_DEBUG_FUNCTION_POINTERS")) + fprintf (stderr, "SDCCsymt.c:processFuncArgs(%s)\n", func->name); + + /* find the function declaration within the type */ + while (funcType && !IS_FUNC(funcType)) + funcType=funcType->next; + + /* if this function has variable argument list */ + /* then make the function a reentrant one */ + if (IFFUNC_HASVARARGS(funcType) || (options.stackAuto && !func->cdef)) + FUNC_ISREENT(funcType)=1; + + /* check if this function is defined as calleeSaves + then mark it as such */ + FUNC_CALLEESAVES(funcType) = inCalleeSaveList (func->name); + + /* loop thru all the arguments */ + val = FUNC_ARGS(funcType); + + /* if it is void then remove parameters */ + if (val && IS_VOID (val->type)) + { + FUNC_ARGS(funcType) = NULL; + return; + } + + /* reset regparm for the port */ + (*port->reset_regparms) (); + + /* if any of the arguments is an aggregate */ + /* change it to pointer to the same type */ + while (val) + { + int argreg = 0; + char buffer[SDCC_NAME_MAX+1]; + + SNPRINTF (buffer, sizeof(buffer), "%s parameter %d", func->name, pNum); + checkTypeSanity (val->etype, buffer); + + /* mark it as a register parameter if + the function does not have VA_ARG + and as port dictates */ + if (!IFFUNC_HASVARARGS(funcType) && + (argreg = (*port->reg_parm) (val->type, FUNC_ISREENT(funcType)))) + { + SPEC_REGPARM (val->etype) = 1; + SPEC_ARGREG(val->etype) = argreg; + } else if (IFFUNC_ISREENT(funcType)) { + FUNC_HASSTACKPARM(funcType) = 1; + } + + if (IS_AGGREGATE (val->type)) + { + aggregateToPointer (val); + } + + val = val->next; + pNum++; + } + + /* if this is an internal generated function call */ + if (func->cdef) { + /* ignore --stack-auto for this one, we don't know how it is compiled */ + /* simply trust on --int-long-reent or --float-reent */ + if (IFFUNC_ISREENT(funcType)) { + return; + } + } else { + /* if this function is reentrant or */ + /* automatics r 2b stacked then nothing */ + if (IFFUNC_ISREENT (funcType) || options.stackAuto) + return; + } + + val = FUNC_ARGS(funcType); + pNum = 1; + while (val) + { + + /* if a symbolname is not given */ + /* synthesize a variable name */ + if (!val->sym) + { + SNPRINTF (val->name, sizeof(val->name), + "_%s_PARM_%d", func->name, pNum++); + val->sym = newSymbol (val->name, 1); + if (SPEC_SCLS(val->etype) == S_BIT) + SPEC_OCLS (val->etype) = bit; + else + SPEC_OCLS (val->etype) = port->mem.default_local_map; + val->sym->type = copyLinkChain (val->type); + val->sym->etype = getSpec (val->sym->type); + val->sym->_isparm = 1; + strncpyz (val->sym->rname, val->name, sizeof(val->sym->rname)); + #if 0 + /* ?? static functions shouldn't imply static parameters - EEP */ + if (IS_SPEC(func->etype)) { + SPEC_STAT (val->etype) = SPEC_STAT (val->sym->etype) = + SPEC_STAT (func->etype); + } + #endif + addSymChain (&val->sym); + + } + else /* symbol name given create synth name */ + { + + SNPRINTF (val->name, sizeof(val->name), "_%s_PARM_%d", func->name, pNum++); + strncpyz (val->sym->rname, val->name, sizeof(val->sym->rname)); + val->sym->_isparm = 1; + if (SPEC_SCLS(val->etype) == S_BIT) + SPEC_OCLS (val->etype) = SPEC_OCLS (val->sym->etype) = bit; + else + SPEC_OCLS (val->etype) = SPEC_OCLS (val->sym->etype) = + port->mem.default_local_map; + + #if 0 + /* ?? static functions shouldn't imply static parameters - EEP */ + if (IS_SPEC(func->etype)) { + SPEC_STAT (val->etype) = SPEC_STAT (val->sym->etype) = + SPEC_STAT (func->etype); + } + #endif + } + if (SPEC_OCLS (val->sym->etype) == pdata) + val->sym->iaccess = 1; + if (!isinSet(operKeyReset, val->sym)) { + addSet (&operKeyReset, val->sym); + applyToSet (operKeyReset, resetParmKey); + } + val = val->next; + } +} + +/*-----------------------------------------------------------------*/ +/* isSymbolEqual - compares two symbols return 1 if they match */ +/*-----------------------------------------------------------------*/ +int +isSymbolEqual (symbol * dest, symbol * src) +{ + /* if pointers match then equal */ + if (dest == src) + return 1; + + /* if one of them is null then don't match */ + if (!dest || !src) + return 0; + + /* if both of them have rname match on rname */ + if (dest->rname[0] && src->rname[0]) + return (!strcmp (dest->rname, src->rname)); + + /* otherwise match on name */ + return (!strcmp (dest->name, src->name)); +} + +void PT(sym_link *type) +{ + printTypeChain(type,0); +} +/*-----------------------------------------------------------------*/ +/* printTypeChain - prints the type chain in human readable form */ +/*-----------------------------------------------------------------*/ +void +printTypeChain (sym_link * start, FILE * of) +{ + struct dbuf_s dbuf; + int nlr = 0; + + if (!of) + { + of = stdout; + nlr = 1; + } + + dbuf_init (&dbuf, 1024); + dbuf_printTypeChain (start, &dbuf); + dbuf_write_and_destroy (&dbuf, of); + + if (nlr) + putc ('\n', of); +} + +void +dbuf_printTypeChain (sym_link * start, struct dbuf_s *dbuf) +{ + value *args; + sym_link * type, * search; + STORAGE_CLASS scls; + + if (start==NULL) { + dbuf_append_str (dbuf, "void"); + return; + } + + /* Print the chain as it is written in the source: */ + /* start with the last entry. */ + /* However, the storage class at the end of the */ + /* chain reall applies to the first in the chain! */ + + for (type = start; type && type->next; type = type->next) + ; + if (IS_SPEC (type)) + scls=SPEC_SCLS(type); + else + scls=0; + while (type) + { + if (type==start) { + switch (scls) + { + case S_DATA: dbuf_append_str (dbuf, "data-"); break; + case S_XDATA: dbuf_append_str (dbuf, "xdata-"); break; + case S_SFR: dbuf_append_str (dbuf, "sfr-"); break; + case S_SBIT: dbuf_append_str (dbuf, "sbit-"); break; + case S_CODE: dbuf_append_str (dbuf, "code-"); break; + case S_IDATA: dbuf_append_str (dbuf, "idata-"); break; + case S_PDATA: dbuf_append_str (dbuf, "pdata-"); break; + case S_LITERAL: dbuf_append_str (dbuf, "literal-"); break; + case S_STACK: dbuf_append_str (dbuf, "stack-"); break; + case S_XSTACK: dbuf_append_str (dbuf, "xstack-"); break; + case S_BIT: dbuf_append_str (dbuf, "bit-"); break; + case S_EEPROM: dbuf_append_str (dbuf, "eeprom-"); break; + default: break; + } + } + + if (IS_DECL (type)) + { + if (!IS_FUNC(type)) { + if (DCL_PTR_VOLATILE (type)) { + dbuf_append_str (dbuf, "volatile-"); + } + if (DCL_PTR_CONST (type)) { + dbuf_append_str (dbuf, "const-"); + } + if (DCL_PTR_RESTRICT (type)) { + dbuf_append_str (dbuf, "restrict-"); + } + } + switch (DCL_TYPE (type)) + { + case FUNCTION: + dbuf_printf (dbuf, "function %s %s", + (IFFUNC_ISBUILTIN(type) ? "__builtin__" : " "), + (IFFUNC_ISJAVANATIVE(type) ? "_JavaNative" : " ")); + dbuf_append_str (dbuf, "( "); + for (args = FUNC_ARGS(type); + args; + args=args->next) { + dbuf_printTypeChain(args->type, dbuf); + if (args->next) + dbuf_append_str (dbuf, ", "); + } + dbuf_append_str (dbuf, ") "); + break; + case GPOINTER: + dbuf_append_str (dbuf, "generic* "); + break; + case CPOINTER: + dbuf_append_str (dbuf, "code* "); + break; + case FPOINTER: + dbuf_append_str (dbuf, "xdata* "); + break; + case EEPPOINTER: + dbuf_append_str (dbuf, "eeprom* "); + break; + case POINTER: + dbuf_append_str (dbuf, "near* "); + break; + case IPOINTER: + dbuf_append_str (dbuf, "idata* "); + break; + case PPOINTER: + dbuf_append_str (dbuf, "pdata* "); + break; + case UPOINTER: + dbuf_append_str (dbuf, "unknown* "); + break; + case ARRAY: + if (DCL_ELEM(type)) { + dbuf_printf (dbuf, "[%d] ", DCL_ELEM(type)); + } else { + dbuf_append_str (dbuf, "[] "); + } + break; + } + } + else + { + if (SPEC_VOLATILE (type)) + dbuf_append_str (dbuf, "volatile-"); + if (SPEC_CONST (type)) + dbuf_append_str (dbuf, "const-"); + if (SPEC_USIGN (type)) + dbuf_append_str (dbuf, "unsigned-"); + switch (SPEC_NOUN (type)) + { + case V_INT: + if (IS_LONG (type)) + dbuf_append_str (dbuf, "long-"); + dbuf_append_str (dbuf, "int"); + break; + + case V_CHAR: + dbuf_append_str (dbuf, "char"); + break; + + case V_VOID: + dbuf_append_str (dbuf, "void"); + break; + + case V_FLOAT: + dbuf_append_str (dbuf, "float"); + break; + + case V_FIXED16X16: + dbuf_append_str (dbuf, "fixed16x16"); + break; + + case V_STRUCT: + dbuf_printf (dbuf, "struct %s", SPEC_STRUCT (type)->tag); + break; + + case V_SBIT: + dbuf_append_str (dbuf, "sbit"); + break; + + case V_BIT: + dbuf_append_str (dbuf, "bit"); + break; + + case V_BITFIELD: + dbuf_printf (dbuf, "bitfield {%d,%d}", SPEC_BSTR (type), SPEC_BLEN (type)); + break; + + case V_DOUBLE: + dbuf_append_str (dbuf, "double"); + break; + + default: + dbuf_append_str (dbuf, "unknown type"); + break; + } + } + /* search entry in list before "type" */ + for (search = start; search && search->next != type;) + search = search->next; + type = search; + if (type) + dbuf_append_char(dbuf, ' '); + } +} + +/*--------------------------------------------------------------------*/ +/* printTypeChainRaw - prints the type chain in human readable form */ +/* in the raw data structure ordering */ +/*--------------------------------------------------------------------*/ +void +printTypeChainRaw (sym_link * start, FILE * of) +{ + int nlr = 0; + value *args; + sym_link * type; + + if (!of) + { + of = stdout; + nlr = 1; + } + + if (start==NULL) { + fprintf (of, "void"); + return; + } + + type = start; + + while (type) + { + if (IS_DECL (type)) + { + if (!IS_FUNC(type)) { + if (DCL_PTR_VOLATILE (type)) { + fprintf (of, "volatile-"); + } + if (DCL_PTR_CONST (type)) { + fprintf (of, "const-"); + } + if (DCL_PTR_RESTRICT (type)) { + fprintf (of, "restrict-"); + } + } + switch (DCL_TYPE (type)) + { + case FUNCTION: + if (IFFUNC_ISINLINE(type)) { + fprintf (of, "inline-"); + } + fprintf (of, "function %s %s", + (IFFUNC_ISBUILTIN(type) ? "__builtin__" : " "), + (IFFUNC_ISJAVANATIVE(type) ? "_JavaNative" : " ")); + fprintf (of, "( "); + for (args = FUNC_ARGS(type); + args; + args=args->next) { + printTypeChain(args->type, of); + if (args->next) + fprintf(of, ", "); + } + fprintf (of, ") "); + break; + case GPOINTER: + fprintf (of, "generic* "); + break; + case CPOINTER: + fprintf (of, "code* "); + break; + case FPOINTER: + fprintf (of, "xdata* "); + break; + case EEPPOINTER: + fprintf (of, "eeprom* "); + break; + case POINTER: + fprintf (of, "near* "); + break; + case IPOINTER: + fprintf (of, "idata* "); + break; + case PPOINTER: + fprintf (of, "pdata* "); + break; + case UPOINTER: + fprintf (of, "unknown* "); + break; + case ARRAY: + if (DCL_ELEM(type)) { + fprintf (of, "[%d] ", DCL_ELEM(type)); + } else { + fprintf (of, "[] "); + } + break; + } + if (DCL_TSPEC(type)) + { + fprintf (of, "{"); + printTypeChainRaw(DCL_TSPEC(type), of); + fprintf (of, "}"); + } + } + else if (IS_SPEC (type)) + { + switch (SPEC_SCLS (type)) + { + case S_DATA: fprintf (of, "data-"); break; + case S_XDATA: fprintf (of, "xdata-"); break; + case S_SFR: fprintf (of, "sfr-"); break; + case S_SBIT: fprintf (of, "sbit-"); break; + case S_CODE: fprintf (of, "code-"); break; + case S_IDATA: fprintf (of, "idata-"); break; + case S_PDATA: fprintf (of, "pdata-"); break; + case S_LITERAL: fprintf (of, "literal-"); break; + case S_STACK: fprintf (of, "stack-"); break; + case S_XSTACK: fprintf (of, "xstack-"); break; + case S_BIT: fprintf (of, "bit-"); break; + case S_EEPROM: fprintf (of, "eeprom-"); break; + default: break; + } + if (SPEC_VOLATILE (type)) + fprintf (of, "volatile-"); + if (SPEC_CONST (type)) + fprintf (of, "const-"); + if (SPEC_USIGN (type)) + fprintf (of, "unsigned-"); + switch (SPEC_NOUN (type)) + { + case V_INT: + if (IS_LONG (type)) + fprintf (of, "long-"); + fprintf (of, "int"); + break; + + case V_CHAR: + fprintf (of, "char"); + break; + + case V_VOID: + fprintf (of, "void"); + break; + + case V_FLOAT: + fprintf (of, "float"); + break; + + case V_FIXED16X16: + fprintf (of, "fixed16x16"); + break; + + case V_STRUCT: + fprintf (of, "struct %s", SPEC_STRUCT (type)->tag); + break; + + case V_SBIT: + fprintf (of, "sbit"); + break; + + case V_BIT: + fprintf (of, "bit"); + break; + + case V_BITFIELD: + fprintf (of, "bitfield {%d,%d}", SPEC_BSTR (type), SPEC_BLEN (type)); + break; + + case V_DOUBLE: + fprintf (of, "double"); + break; + + default: + fprintf (of, "unknown type"); + break; + } + } + else + fprintf (of, "NOT_SPEC_OR_DECL"); + type = type->next; + if (type) + fputc (' ', of); + } + if (nlr) + fprintf (of, "\n"); +} + + +/*-----------------------------------------------------------------*/ +/* powof2 - returns power of two for the number if number is pow 2 */ +/*-----------------------------------------------------------------*/ +int +powof2 (TYPE_TARGET_ULONG num) +{ + int nshifts = 0; + int n1s = 0; + + while (num) + { + if (num & 1) + n1s++; + num >>= 1; + nshifts++; + } + + if (n1s > 1 || nshifts == 0) + return -1; + return nshifts - 1; +} + +symbol *__fsadd; +symbol *__fssub; +symbol *__fsmul; +symbol *__fsdiv; +symbol *__fseq; +symbol *__fsneq; +symbol *__fslt; +symbol *__fslteq; +symbol *__fsgt; +symbol *__fsgteq; + +symbol *__fps16x16_add; +symbol *__fps16x16_sub; +symbol *__fps16x16_mul; +symbol *__fps16x16_div; +symbol *__fps16x16_eq; +symbol *__fps16x16_neq; +symbol *__fps16x16_lt; +symbol *__fps16x16_lteq; +symbol *__fps16x16_gt; +symbol *__fps16x16_gteq; + +/* Dims: mul/div/mod, BYTE/WORD/DWORD, SIGNED/UNSIGNED/BOTH */ +symbol *__muldiv[3][3][4]; +/* Dims: BYTE/WORD/DWORD SIGNED/UNSIGNED */ +sym_link *__multypes[3][2]; +/* Dims: to/from float, BYTE/WORD/DWORD, SIGNED/USIGNED */ +symbol *__conv[2][3][2]; +/* Dims: to/from fixed16x16, BYTE/WORD/DWORD/FLOAT, SIGNED/USIGNED */ +symbol *__fp16x16conv[2][4][2]; +/* Dims: shift left/shift right, BYTE/WORD/DWORD, SIGNED/UNSIGNED */ +symbol *__rlrr[2][3][2]; + +sym_link *floatType; +sym_link *fixed16x16Type; + +static char * +_mangleFunctionName(char *in) +{ + if (port->getMangledFunctionName) + { + return port->getMangledFunctionName(in); + } + else + { + return in; + } +} + +/*-----------------------------------------------------------------*/ +/* typeFromStr - create a typechain from an encoded string */ +/* basic types - 'c' - char */ +/* 's' - short */ +/* 'i' - int */ +/* 'l' - long */ +/* 'f' - float */ +/* 'q' - fixed16x16 */ +/* 'v' - void */ +/* '*' - pointer - default (GPOINTER) */ +/* modifiers - 'u' - unsigned */ +/* pointer modifiers - 'g' - generic */ +/* 'x' - xdata */ +/* 'p' - code */ +/* 'd' - data */ +/* 'F' - function */ +/* examples : "ig*" - generic int * */ +/* "cx*" - char xdata * */ +/* "ui" - unsigned int */ +/*-----------------------------------------------------------------*/ +sym_link *typeFromStr (char *s) +{ + sym_link *r = newLink(DECLARATOR); + int usign = 0; + + do { + sym_link *nr; + switch (*s) { + case 'u' : + usign = 1; + s++; + continue ; + break ; + case 'c': + r->class = SPECIFIER; + SPEC_NOUN(r) = V_CHAR; + break; + case 's': + case 'i': + r->class = SPECIFIER; + SPEC_NOUN(r) = V_INT; + break; + case 'l': + r->class = SPECIFIER; + SPEC_NOUN(r) = V_INT; + SPEC_LONG(r) = 1; + break; + case 'f': + r->class = SPECIFIER; + SPEC_NOUN(r) = V_FLOAT; + break; + case 'q': + r->class = SPECIFIER; + SPEC_NOUN(r) = V_FIXED16X16; + break; + case 'v': + r->class = SPECIFIER; + SPEC_NOUN(r) = V_VOID; + break; + case '*': + DCL_TYPE(r) = port->unqualified_pointer; + break; + case 'g': + case 'x': + case 'p': + case 'd': + case 'F': + assert(*(s+1)=='*'); + nr = newLink(DECLARATOR); + nr->next = r; + r = nr; + switch (*s) { + case 'g': + DCL_TYPE(r) = GPOINTER; + break; + case 'x': + DCL_TYPE(r) = FPOINTER; + break; + case 'p': + DCL_TYPE(r) = CPOINTER; + break; + case 'd': + DCL_TYPE(r) = POINTER; + break; + case 'F': + DCL_TYPE(r) = FUNCTION; + nr = newLink(DECLARATOR); + nr->next = r; + r = nr; + DCL_TYPE(r) = CPOINTER; + break; + } + s++; + break; + default: + werror(E_INTERNAL_ERROR, __FILE__, __LINE__, + "typeFromStr: unknown type"); + break; + } + if (IS_SPEC(r) && usign) { + SPEC_USIGN(r) = 1; + usign = 0; + } + s++; + } while (*s); + return r; +} + +/*-----------------------------------------------------------------*/ +/* initCSupport - create functions for C support routines */ +/*-----------------------------------------------------------------*/ +void +initCSupport () +{ + const char *smuldivmod[] = + { + "mul", "div", "mod" + }; + const char *sbwd[] = + { + "char", "int", "long", "fixed16x16", + }; + const char *fp16x16sbwd[] = + { + "char", "int", "long", "float", + }; + const char *ssu[] = + { + "s", "su", "us", "u" + }; + const char *srlrr[] = + { + "rl", "rr" + }; + + int bwd, su, muldivmod, tofrom, rlrr; + + if (getenv("SDCC_NO_C_SUPPORT")) { + /* for debugging only */ + return; + } + + floatType = newFloatLink (); + fixed16x16Type = newFixed16x16Link (); + + for (bwd = 0; bwd < 3; bwd++) + { + sym_link *l = NULL; + switch (bwd) + { + case 0: + l = newCharLink (); + break; + case 1: + l = newIntLink (); + break; + case 2: + l = newLongLink (); + break; + default: + assert (0); + } + __multypes[bwd][0] = l; + __multypes[bwd][1] = copyLinkChain (l); + SPEC_USIGN (__multypes[bwd][1]) = 1; + } + + __fsadd = funcOfType ("__fsadd", floatType, floatType, 2, options.float_rent); + __fssub = funcOfType ("__fssub", floatType, floatType, 2, options.float_rent); + __fsmul = funcOfType ("__fsmul", floatType, floatType, 2, options.float_rent); + __fsdiv = funcOfType ("__fsdiv", floatType, floatType, 2, options.float_rent); + __fseq = funcOfType ("__fseq", CHARTYPE, floatType, 2, options.float_rent); + __fsneq = funcOfType ("__fsneq", CHARTYPE, floatType, 2, options.float_rent); + __fslt = funcOfType ("__fslt", CHARTYPE, floatType, 2, options.float_rent); + __fslteq = funcOfType ("__fslteq", CHARTYPE, floatType, 2, options.float_rent); + __fsgt = funcOfType ("__fsgt", CHARTYPE, floatType, 2, options.float_rent); + __fsgteq = funcOfType ("__fsgteq", CHARTYPE, floatType, 2, options.float_rent); + + __fps16x16_add = funcOfType ("__fps16x16_add", fixed16x16Type, fixed16x16Type, 2, options.float_rent); + __fps16x16_sub = funcOfType ("__fps16x16_sub", fixed16x16Type, fixed16x16Type, 2, options.float_rent); + __fps16x16_mul = funcOfType ("__fps16x16_mul", fixed16x16Type, fixed16x16Type, 2, options.float_rent); + __fps16x16_div = funcOfType ("__fps16x16_div", fixed16x16Type, fixed16x16Type, 2, options.float_rent); + __fps16x16_eq = funcOfType ("__fps16x16_eq", CHARTYPE, fixed16x16Type, 2, options.float_rent); + __fps16x16_neq = funcOfType ("__fps16x16_neq", CHARTYPE, fixed16x16Type, 2, options.float_rent); + __fps16x16_lt = funcOfType ("__fps16x16_lt", CHARTYPE, fixed16x16Type, 2, options.float_rent); + __fps16x16_lteq = funcOfType ("__fps16x16_lteq", CHARTYPE, fixed16x16Type, 2, options.float_rent); + __fps16x16_gt = funcOfType ("__fps16x16_gt", CHARTYPE, fixed16x16Type, 2, options.float_rent); + __fps16x16_gteq = funcOfType ("__fps16x16_gteq", CHARTYPE, fixed16x16Type, 2, options.float_rent); + + + for (tofrom = 0; tofrom < 2; tofrom++) + { + for (bwd = 0; bwd < 3; bwd++) + { + for (su = 0; su < 2; su++) + { + if (tofrom) + { + SNPRINTF (buffer, sizeof(buffer), "__fs2%s%s", ssu[su*3], sbwd[bwd]); + __conv[tofrom][bwd][su] = funcOfType (buffer, __multypes[bwd][su], floatType, 1, options.float_rent); + } + else + { + SNPRINTF (buffer, sizeof(buffer), "__%s%s2fs", ssu[su*3], sbwd[bwd]); + __conv[tofrom][bwd][su] = funcOfType (buffer, floatType, __multypes[bwd][su], 1, options.float_rent); + } + } + } + } + + for (tofrom = 0; tofrom < 2; tofrom++) + { + for (bwd = 0; bwd < 4; bwd++) + { + for (su = 0; su < 2; su++) + { + if (tofrom) + { + SNPRINTF (buffer, sizeof(buffer), "__fps16x162%s%s", ssu[su*3], fp16x16sbwd[bwd]); + if(bwd == 3) { + __fp16x16conv[tofrom][bwd][su] = funcOfType (buffer, floatType, fixed16x16Type, 1, options.float_rent); + } else + __fp16x16conv[tofrom][bwd][su] = funcOfType (buffer, __multypes[bwd][su], fixed16x16Type, 1, options.float_rent); + } + else + { + SNPRINTF (buffer, sizeof(buffer), "__%s%s2fps16x16", ssu[su*3], fp16x16sbwd[bwd]); + if(bwd == 3) { + __fp16x16conv[tofrom][bwd][su] = funcOfType (buffer, fixed16x16Type, floatType, 1, options.float_rent); + } else + __fp16x16conv[tofrom][bwd][su] = funcOfType (buffer, fixed16x16Type, __multypes[bwd][su], 1, options.float_rent); + } + } + } + } + +/* + for (muldivmod = 0; muldivmod < 3; muldivmod++) + { + for (bwd = 0; bwd < 3; bwd++) + { + for (su = 0; su < 2; su++) + { + SNPRINTF (buffer, sizeof(buffer), + "_%s%s%s", + smuldivmod[muldivmod], + ssu[su*3], + sbwd[bwd]); + __muldiv[muldivmod][bwd][su] = funcOfType (_mangleFunctionName(buffer), __multypes[bwd][su], __multypes[bwd][su], 2, options.intlong_rent); + FUNC_NONBANKED (__muldiv[muldivmod][bwd][su]->type) = 1; + } + } + } + + muluint() and mulsint() resp. mululong() and mulslong() return the same result. + Therefore they've been merged into mulint() and mullong(). +*/ + + /* byte */ + bwd = 0; + for (su = 0; su < 4; su++) + { + for (muldivmod = 0; muldivmod < 3; muldivmod++) + { + /* muluchar, mulschar, mulsuchar and muluschar are separate functions, because e.g. the z80 + port is sign/zero-extending to int before calling mulint() */ + /* div and mod : s8_t x s8_t -> s8_t should be s8_t x s8_t -> s16_t, see below */ + if (!TARGET_IS_PIC16 || muldivmod != 1 || su != 0) + { + SNPRINTF (buffer, sizeof(buffer), + "_%s%s%s", + smuldivmod[muldivmod], + ssu[su], + sbwd[bwd]); + __muldiv[muldivmod][bwd][su] = funcOfType ( + _mangleFunctionName(buffer), + __multypes[bwd][su%2], + __multypes[bwd][su/2], + 2, + options.intlong_rent); + FUNC_NONBANKED (__muldiv[muldivmod][bwd][su]->type) = 1; + } + } + } + + for (bwd = 1; bwd < 3; bwd++) + { + for (su = 0; su < 2; su++) + { + for (muldivmod = 1; muldivmod < 3; muldivmod++) + { + /* div and mod : s8_t x s8_t -> s8_t should be s8_t x s8_t -> s16_t, see below */ + if (!TARGET_IS_PIC16 || muldivmod != 1 || bwd != 0 || su != 0) + { + SNPRINTF (buffer, sizeof(buffer), + "_%s%s%s", + smuldivmod[muldivmod], + ssu[su*3], + sbwd[bwd]); + __muldiv[muldivmod][bwd][su] = funcOfType ( + _mangleFunctionName(buffer), + __multypes[bwd][su], + __multypes[bwd][su], + 2, + options.intlong_rent); + FUNC_NONBANKED (__muldiv[muldivmod][bwd][su]->type) = 1; + } + } + } + } + + if (TARGET_IS_PIC16) + { + /* PIC16 port wants __divschar/__modschar to return an int, so that both + * 100 / -4 = -25 and -128 / -1 = 128 can be handled correctly + * (first one would have to be sign extended, second one must not be). + * Similarly, modschar should be handled, but the iCode introduces cast + * here and forces '% : s8 x s8 -> s8' ... */ + su = 0; bwd = 0; + for (muldivmod = 1; muldivmod < 2; muldivmod++) { + SNPRINTF (buffer, sizeof(buffer), + "_%s%s%s", + smuldivmod[muldivmod], + ssu[su], + sbwd[bwd]); + __muldiv[muldivmod][bwd][su] = funcOfType ( + _mangleFunctionName(buffer), + __multypes[1][su], + __multypes[bwd][su], + 2, + options.intlong_rent); + FUNC_NONBANKED (__muldiv[muldivmod][bwd][su]->type) = 1; + } + } + + /* mul only */ + muldivmod = 0; + /* signed only */ + su = 0; + /* word and doubleword */ + for (bwd = 1; bwd < 3; bwd++) + { + /* mul, int/long */ + SNPRINTF (buffer, sizeof(buffer), + "_%s%s", + smuldivmod[muldivmod], + sbwd[bwd]); + __muldiv[muldivmod][bwd][0] = funcOfType (_mangleFunctionName(buffer), __multypes[bwd][su], __multypes[bwd][su], 2, options.intlong_rent); + FUNC_NONBANKED (__muldiv[muldivmod][bwd][0]->type) = 1; + /* signed = unsigned */ + __muldiv[muldivmod][bwd][1] = __muldiv[muldivmod][bwd][0]; + } + + for (rlrr = 0; rlrr < 2; rlrr++) + { + for (bwd = 0; bwd < 3; bwd++) + { + for (su = 0; su < 2; su++) + { + SNPRINTF (buffer, sizeof(buffer), + "_%s%s%s", + srlrr[rlrr], + ssu[su*3], + sbwd[bwd]); + __rlrr[rlrr][bwd][su] = funcOfType (_mangleFunctionName(buffer), __multypes[bwd][su], __multypes[0][0], 2, options.intlong_rent); + FUNC_NONBANKED (__rlrr[rlrr][bwd][su]->type) = 1; + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* initBuiltIns - create prototypes for builtin functions */ +/*-----------------------------------------------------------------*/ +void initBuiltIns() +{ + int i; + symbol *sym; + + if (!port->builtintable) return ; + + for (i = 0 ; port->builtintable[i].name ; i++) { + sym = funcOfTypeVarg(port->builtintable[i].name,port->builtintable[i].rtype, + port->builtintable[i].nParms,port->builtintable[i].parm_types); + FUNC_ISBUILTIN(sym->type) = 1; + FUNC_ISREENT(sym->type) = 0; /* can never be reentrant */ + } +} + +sym_link *validateLink(sym_link *l, + const char *macro, + const char *args, + const char select, + const char *file, + unsigned line) +{ + if (l && l->class==select) + { + return l; + } + fprintf(stderr, + "Internal error: validateLink failed in %s(%s) @ %s:%u:" + " expected %s, got %s\n", + macro, args, file, line, + DECLSPEC2TXT(select), l ? DECLSPEC2TXT(l->class) : "null-link"); + exit(EXIT_FAILURE); + return l; // never reached, makes compiler happy. +} + +/*--------------------------------------------------------------------*/ +/* newEnumType - create an integer type compatible with enumerations */ +/*--------------------------------------------------------------------*/ +sym_link * +newEnumType (symbol *enumlist) +{ + int min, max, v; + symbol *sym; + sym_link *type; + + if (!enumlist) + { + type = newLink (SPECIFIER); + SPEC_NOUN (type) = V_INT; + return type; + } + + /* Determine the range of the enumerated values */ + sym = enumlist; + min = max = (int) ulFromVal (valFromType (sym->type)); + for (sym = sym->next; sym; sym = sym->next) + { + v = (int) ulFromVal (valFromType (sym->type)); + if (vmax) + max = v; + } + + /* Determine the smallest integer type that is compatible with this range */ + type = newLink (SPECIFIER); + if (min>=0 && max<=255) + { + SPEC_NOUN (type) = V_CHAR; + SPEC_USIGN (type) = 1; + } + else if (min>=-128 && max<=127) + { + SPEC_NOUN (type) = V_CHAR; + } + else if (min>=0 && max<=65535) + { + SPEC_NOUN (type) = V_INT; + SPEC_USIGN (type) = 1; + } + else if (min>=-32768 && max<=32767) + { + SPEC_NOUN (type) = V_INT; + } + else + { + SPEC_NOUN (type) = V_INT; + SPEC_LONG (type) = 1; + if (min>=0) + SPEC_USIGN (type) = 1; + } + + return type; +} diff --git a/src/SDCCsymt.h b/src/SDCCsymt.h new file mode 100644 index 0000000..c85d1d6 --- /dev/null +++ b/src/SDCCsymt.h @@ -0,0 +1,658 @@ +/*------------------------------------------------------------------------- + SDCCsymt.h - Header file for Symbols table related structures and MACRO's. + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCSYMT_H +#define SDCCSYMT_H + +#define MAX_NEST_LEVEL 256 +#define SDCC_SYMNAME_MAX 64 +#define SDCC_NAME_MAX 3*SDCC_SYMNAME_MAX // big enough for ___etc +#include "SDCChasht.h" +#include "SDCCglobl.h" +#include "dbuf.h" + +#define INTNO_MAX 255 /* maximum allowed interrupt number */ +#define INTNO_UNSPEC (INTNO_MAX+1) /* interrupt number unspecified */ + +#define BITVAR_PAD -1 + +enum { + TYPEOF_INT=1, + TYPEOF_SHORT, + TYPEOF_CHAR, + TYPEOF_LONG, + TYPEOF_FLOAT, + TYPEOF_FIXED16X16, + TYPEOF_BIT, + TYPEOF_BITFIELD, + TYPEOF_SBIT, + TYPEOF_SFR, + TYPEOF_VOID, + TYPEOF_STRUCT, + TYPEOF_ARRAY, + TYPEOF_FUNCTION, + TYPEOF_POINTER, + TYPEOF_FPOINTER, + TYPEOF_CPOINTER, + TYPEOF_GPOINTER, + TYPEOF_PPOINTER, + TYPEOF_IPOINTER, + TYPEOF_EEPPOINTER +}; + +// values for first byte (or 3 most significant bits) of generic pointer. +#if 0 +#define GPTYPE_FAR 0x00 +#define GPTYPE_NEAR 0x40 +#define GPTYPE_XSTACK 0x60 +#define GPTYPE_CODE 0x80 +#else +#define GPTYPE_FAR (port->gp_tags.tag_far) +#define GPTYPE_NEAR (port->gp_tags.tag_near) +#define GPTYPE_XSTACK (port->gp_tags.tag_xstack) +#define GPTYPE_CODE (port->gp_tags.tag_code) +#endif + +#define HASHTAB_SIZE 256 + +/* hash table bucket */ +typedef struct bucket + { + void *sym; /* pointer to the object */ + char name[SDCC_NAME_MAX + 1]; /* name of this symbol */ + int level; /* nest level for this symbol */ + int block; /* belongs to which block */ + struct bucket *prev; /* ptr 2 previous bucket */ + struct bucket *next; /* ptr 2 next bucket */ + } +bucket; + +typedef struct structdef + { + char tag[SDCC_NAME_MAX + 1]; /* tag part of structure */ + unsigned char level; /* Nesting level */ + struct symbol *fields; /* pointer to fields */ + unsigned size; /* sizeof the table in bytes */ + int type; /* STRUCT or UNION */ + bool b_flexArrayMember; /* has got an flexible array member, + only needed for syntax checks */ + } +structdef; + +/* noun definitions */ +typedef enum + { + V_INT = 1, + V_FLOAT, + V_FIXED16X16, + V_CHAR, + V_VOID, + V_STRUCT, + V_LABEL, + V_BIT, + V_BITFIELD, + V_SBIT, + V_DOUBLE + } +NOUN; + +/* storage class */ +typedef enum + { + S_FIXED = 0, + S_AUTO, + S_REGISTER, + S_SFR, + S_SBIT, + S_CODE, + S_XDATA, + S_DATA, + S_IDATA, + S_PDATA, + S_LITERAL, + S_STACK, + S_XSTACK, + S_BIT, + S_EEPROM + } +STORAGE_CLASS; + +#define TYPE_TARGET_CHAR TYPE_BYTE +#define TYPE_TARGET_INT TYPE_WORD +#define TYPE_TARGET_LONG TYPE_DWORD +#define TYPE_TARGET_UCHAR TYPE_UBYTE +#define TYPE_TARGET_UINT TYPE_UWORD +#define TYPE_TARGET_ULONG TYPE_UDWORD + +/* specifier is the last in the type-chain */ +typedef struct specifier + { + NOUN noun; /* CHAR INT STRUCTURE LABEL */ + STORAGE_CLASS sclass; /* REGISTER,AUTO,FIX,CONSTANT */ + struct memmap *oclass; /* output storage class */ + unsigned b_long:1; /* 1=long */ + unsigned b_short:1; /* 1=short int */ + unsigned b_unsigned:1; /* 1=unsigned, 0=signed */ + unsigned b_signed:1; /* just for sanity checks only*/ + unsigned b_static:1; /* 1=static keyword found */ + unsigned b_extern:1; /* 1=extern found */ + unsigned b_inline:1; /* inline function requested */ + unsigned b_absadr:1; /* absolute address specfied */ + unsigned b_volatile:1; /* is marked as volatile */ + unsigned b_const:1; /* is a constant */ + unsigned b_restrict:1; /* is restricted */ + unsigned b_typedef:1; /* is typedefed */ + unsigned b_isregparm:1; /* is the first parameter */ + unsigned b_isenum:1; /* is an enumerated type */ + unsigned b_bitUnnamed:1; /* is an unnamed bit-field */ + unsigned _bitStart; /* bit start position */ + int _bitLength; /* bit length */ + unsigned _addr; /* address of symbol */ + unsigned _stack; /* stack offset for stacked v */ + int argreg; /* reg no for regparm */ + union + { /* Values if constant or enum */ + TYPE_TARGET_INT v_int; /* 2 bytes: int and char values */ + char *v_char; /* character string */ + TYPE_TARGET_UINT v_uint; /* 2 bytes: unsigned int const value */ + TYPE_TARGET_LONG v_long; /* 4 bytes: long constant value */ + TYPE_TARGET_ULONG v_ulong; /* 4 bytes: unsigned long constant value */ + double v_float; /* floating point constant value */ + TYPE_TARGET_ULONG v_fixed16x16; /* 4 bytes: fixed floating point constant value */ + struct symbol *v_enum; /* ptr to enum_list if enum==1 */ + } + const_val; + struct structdef *v_struct; /* structure pointer */ + } +specifier; + +/* types of declarators */ +typedef enum + { + POINTER = 0, /* pointer to near data */ + FPOINTER, /* pointer to far data */ + CPOINTER, /* pointer to code space */ + GPOINTER, /* _generic pointer */ + PPOINTER, /* paged area pointer */ + IPOINTER, /* pointer to upper 128 bytes */ + UPOINTER, /* unknown pointer used only when parsing */ + EEPPOINTER, /* pointer to eeprom */ + ARRAY, + FUNCTION + } +DECLARATOR_TYPE; + +typedef struct declarator + { + DECLARATOR_TYPE dcl_type; /* POINTER,ARRAY or FUNCTION */ + unsigned int num_elem; /* # of elems if type==array, */ + /* always 0 for flexible arrays */ + unsigned ptr_const:1; /* pointer is constant */ + unsigned ptr_volatile:1; /* pointer is volatile */ + unsigned ptr_restrict:1; /* pointer is resticted */ + struct sym_link *tspec; /* pointer type specifier */ + } +declarator; + +typedef enum { + DECLARATOR=1, + SPECIFIER +} SYM_LINK_CLASS; +#define DECLSPEC2TXT(select) (select==DECLARATOR?"DECLARATOR":select==SPECIFIER?"SPECIFIER":"UNKNOWN") + +typedef struct sym_link + { + SYM_LINK_CLASS class; /* DECLARATOR or SPECIFIER */ + unsigned tdef:1; /* current link created by */ + /* typedef if this flag is set */ + union + { + specifier s; /* if CLASS == SPECIFIER */ + declarator d; /* if CLASS == DECLARATOR */ + } select; + + /* function attributes */ + struct { + struct value *args; /* the defined arguments */ + unsigned hasVargs:1; /* functions has varargs */ + unsigned calleeSaves:1; /* functions uses callee save */ + unsigned hasbody:1; /* function body defined */ + unsigned hasFcall:1; /* does it call other functions */ + unsigned reent:1; /* function is reentrant */ + unsigned naked:1; /* naked function */ + + unsigned shadowregs:1; /* function uses shadow registers (pic16 port) */ + unsigned wparam:1; /* first byte of arguments is passed via WREG (pic16 port) */ + unsigned nonbanked:1; /* function has the nonbanked attribute */ + unsigned banked:1; /* function has the banked attribute */ + unsigned critical:1; /* critical function */ + unsigned intrtn:1; /* this is an interrupt routine */ + unsigned rbank:1; /* seperate register bank */ + unsigned inlinereq:1; /* inlining requested */ + unsigned intno; /* 1=Interrupt svc routine */ + short regbank; /* register bank 2b used */ + unsigned builtin; /* is a builtin function */ + unsigned javaNative; /* is a JavaNative Function (TININative ONLY) */ + unsigned overlay; /* force parameters & locals into overlay segment */ + unsigned hasStackParms; /* function has parameters on stack */ + } funcAttrs; + + struct sym_link *next; /* next element on the chain */ + } +sym_link; + +typedef struct symbol + { + char name[SDCC_SYMNAME_MAX + 1]; /* Input Variable Name */ + char rname[SDCC_NAME_MAX + 1]; /* internal name */ + + short level; /* declaration lev,fld offset */ + short block; /* sequential block # of definition */ + int key; + unsigned flexArrayLength; /* if the symbol specifies a struct + with a "flexible array member", then the additional length in bytes for + the "fam" is stored here. Because the length can be different from symbol + to symbol AND v_struct isn't copied in copyLinkChain(), it's located here + in the symbol and not in v_struct or the declarator */ + unsigned implicit:1; /* implicit flag */ + unsigned undefined:1; /* undefined variable */ + unsigned infertype:1; /* type should be inferred from first assign */ + unsigned _isparm:1; /* is a parameter */ + unsigned ismyparm:1; /* is parameter of the function being generated */ + unsigned isitmp:1; /* is an intermediate temp */ + unsigned islbl:1; /* is a temporary label */ + unsigned isref:1; /* has been referenced */ + unsigned isind:1; /* is a induction variable */ + unsigned isinvariant:1; /* is a loop invariant */ + unsigned cdef:1; /* compiler defined symbol */ + unsigned addrtaken:1; /* address of the symbol was taken */ + unsigned isreqv:1; /* is the register equivalent of a symbol */ + unsigned udChked:1; /* use def checking has been already done */ + unsigned generated:1; /* code generated (function symbols only) */ + + /* following flags are used by the backend + for code generation and can be changed + if a better scheme for backend is thought of */ + unsigned isLiveFcall:1; /* is live at or across a function call */ + unsigned isspilt:1; /* has to be spilt */ + unsigned spillA:1; /* spilt be register allocator */ + unsigned remat:1; /* can be remateriazed */ + unsigned isptr:1; /* is a pointer */ + unsigned uptr:1; /* used as a pointer */ + unsigned isFree:1; /* used by register allocator */ + unsigned islocal:1; /* is a local variable */ + unsigned blockSpil:1; /* spilt at block level */ + unsigned remainSpil:1; /* spilt because not used in remainder */ + unsigned stackSpil:1; /* has been spilt on temp stack location */ + unsigned onStack:1; /* this symbol allocated on the stack */ + unsigned iaccess:1; /* indirect access */ + unsigned ruonly:1; /* used in return statement only */ + unsigned spildir:1; /* spilt in direct space */ + unsigned ptrreg:1; /* this symbol assigned to a ptr reg */ + unsigned noSpilLoc:1; /* cannot be assigned a spil location */ + unsigned isstrlit; /* is a string literal and it's usage count */ + unsigned accuse; /* can be left in the accumulator + On the Z80 accuse is divided into + ACCUSE_A and ACCUSE_HL as the idea + is quite similar. + */ + unsigned dptr; /* 8051 variants with multiple DPTRS + currently implemented in DS390 only + */ + int allocreq ; /* allocation is required for this variable */ + int stack; /* offset on stack */ + int xstack; /* offset on xternal stack */ + short nRegs; /* number of registers required */ + short regType; /* type of register required */ + + struct regs *regs[4]; /* can have at the most 4 registers */ + struct asmop *aop; /* asmoperand for this symbol */ + struct iCode *fuse; /* furthest use */ + struct iCode *rematiCode; /* rematerialise with which instruction */ + struct operand *reqv; /* register equivalent of a local variable */ + struct symbol *prereqv; /* symbol before register equiv. substitution */ + struct symbol *psbase; /* if pseudo symbol, the symbol it is based on */ + union + { + struct symbol *spillLoc; /* register spil location */ + struct set *itmpStack; /* symbols spilt @ this stack location */ + } + usl; + char bitVar; /* if bitVar != 0: this is a bit variable, bitVar is the size in bits */ + char bitUnnamed:1; /* unnamed bit variable */ + unsigned offset; /* offset from top if struct */ + + int lineDef; /* defined line number */ + char *fileDef; /* defined filename */ + int lastLine; /* for functions the last line */ + struct sym_link *type; /* 1st link to declarator chain */ + struct sym_link *etype; /* last link to declarator chain */ + struct symbol *next; /* crosslink to next symbol */ + struct symbol *localof; /* local variable of which function */ + struct initList *ival; /* ptr to initializer if any */ + struct bitVect *defs; /* bit vector for definitions */ + struct bitVect *uses; /* bit vector for uses */ + struct bitVect *regsUsed; /* for functions registers used */ + int liveFrom; /* live from iCode sequence number */ + int liveTo; /* live to sequence number */ + int used; /* no. of times this was used */ + int recvSize; /* size of first argument */ + struct bitVect *clashes; /* overlaps with what other symbols */ + struct ast * funcTree; /* function body ast if inlined */ + } +symbol; + +extern sym_link *validateLink(sym_link *l, + const char *macro, + const char *args, + const char select, + const char *file, + unsigned line); +/* Easy Access Macros */ +#define IS_OP_RUONLY(x) (IS_SYMOP(x) && OP_SYMBOL(x) && OP_SYMBOL(x)->ruonly) +#define IS_OP_ACCUSE(x) (IS_SYMOP(x) && OP_SYMBOL(x) && OP_SYMBOL(x)->accuse) + +#define DCL_TYPE(l) validateLink(l, "DCL_TYPE", #l, DECLARATOR, __FILE__, __LINE__)->select.d.dcl_type +#define DCL_ELEM(l) validateLink(l, "DCL_ELEM", #l, DECLARATOR, __FILE__, __LINE__)->select.d.num_elem +#define DCL_PTR_CONST(l) validateLink(l, "DCL_PTR_CONST", #l, DECLARATOR, __FILE__, __LINE__)->select.d.ptr_const +#define DCL_PTR_VOLATILE(l) validateLink(l, "DCL_PTR_VOLATILE", #l, DECLARATOR, __FILE__, __LINE__)->select.d.ptr_volatile +#define DCL_PTR_RESTRICT(l) validateLink(l, "DCL_PTR_RESTRICT", #l, DECLARATOR, __FILE__, __LINE__)->select.d.ptr_restrict +#define DCL_TSPEC(l) validateLink(l, "DCL_TSPEC", #l, DECLARATOR, __FILE__, __LINE__)->select.d.tspec + +#define FUNC_DEBUG //assert(IS_FUNC(x)); +#define FUNC_HASVARARGS(x) (x->funcAttrs.hasVargs) +#define IFFUNC_HASVARARGS(x) (IS_FUNC(x) && FUNC_HASVARARGS(x)) +#define FUNC_ARGS(x) (x->funcAttrs.args) +#define IFFUNC_ARGS(x) (IS_FUNC(x) && FUNC_ARGS(x)) +#define FUNC_HASFCALL(x) (x->funcAttrs.hasFcall) +#define IFFUNC_HASFCALL(x) (IS_FUNC(x) && FUNC_HASFCALL(x)) +#define FUNC_HASBODY(x) (x->funcAttrs.hasbody) +#define IFFUNC_HASBODY(x) (IS_FUNC(x) && FUNC_HASBODY(x)) +#define FUNC_CALLEESAVES(x) (x->funcAttrs.calleeSaves) +#define IFFUNC_CALLEESAVES(x) (IS_FUNC(x) && FUNC_CALLEESAVES(x)) +#define FUNC_ISISR(x) (x->funcAttrs.intrtn) +#define IFFUNC_ISISR(x) (IS_FUNC(x) && FUNC_ISISR(x)) +#define IFFUNC_RBANK(x) (IS_FUNC(x) && FUNC_RBANK(x)) +#define FUNC_INTNO(x) (x->funcAttrs.intno) +#define FUNC_REGBANK(x) (x->funcAttrs.regbank) +#define FUNC_HASSTACKPARM(x) (x->funcAttrs.hasStackParms) +#define FUNC_ISINLINE(x) (x->funcAttrs.inlinereq) +#define IFFUNC_ISINLINE(x) (IS_FUNC(x) && FUNC_ISINLINE(x)) + +#define FUNC_ISREENT(x) (x->funcAttrs.reent) +#define IFFUNC_ISREENT(x) (IS_FUNC(x) && FUNC_ISREENT(x)) +#define FUNC_ISSHADOWREGS(x) (x->funcAttrs.shadowregs) +#define IFFUNC_ISSHADOWREGS(x) (IS_FUNC(x) && FUNC_ISSHADOWREGS(x)) +#define FUNC_ISWPARAM(x) (x->funcAttrs.wparam) +#define IFFUNC_ISWPARAM(x) (IS_FUNC(x) && FUNC_ISWPARAM(x)) +#define FUNC_ISNAKED(x) (x->funcAttrs.naked) +#define IFFUNC_ISNAKED(x) (IS_FUNC(x) && FUNC_ISNAKED(x)) +#define FUNC_NONBANKED(x) (x->funcAttrs.nonbanked) +#define IFFUNC_NONBANKED(x) (IS_FUNC(x) && FUNC_NONBANKED(x)) +#define FUNC_BANKED(x) (x->funcAttrs.banked) +#define IFFUNC_BANKED(x) (IS_FUNC(x) && FUNC_BANKED(x)) +#define FUNC_ISCRITICAL(x) (x->funcAttrs.critical) +#define IFFUNC_ISCRITICAL(x) (IS_FUNC(x) && FUNC_ISCRITICAL(x)) +#define FUNC_ISBUILTIN(x) (x->funcAttrs.builtin) +#define IFFUNC_ISBUILTIN(x) (IS_FUNC(x) && FUNC_ISBUILTIN(x)) +#define FUNC_ISJAVANATIVE(x) (x->funcAttrs.javaNative) +#define IFFUNC_ISJAVANATIVE(x) (IS_FUNC(x) && FUNC_ISJAVANATIVE(x)) +#define FUNC_ISOVERLAY(x) (x->funcAttrs.overlay) +#define IFFUNC_ISOVERLAY(x) (IS_FUNC(x) && FUNC_ISOVERLAY(x)) + +#define IFFUNC_ISBANKEDCALL(x) (!IFFUNC_NONBANKED(x) && \ + (options.model == MODEL_HUGE || \ + ((options.model == MODEL_LARGE || options.model == MODEL_MEDIUM) && \ + (TARGET_IS_Z80 || TARGET_IS_GBZ80)) || \ + IFFUNC_BANKED(x))) + +#define SPEC_NOUN(x) validateLink(x, "SPEC_NOUN", #x, SPECIFIER, __FILE__, __LINE__)->select.s.noun +#define SPEC_LONG(x) validateLink(x, "SPEC_LONG", #x, SPECIFIER, __FILE__, __LINE__)->select.s.b_long +#define SPEC_SHORT(x) validateLink(x, "SPEC_LONG", #x, SPECIFIER, __FILE__, __LINE__)->select.s.b_short +#define SPEC_USIGN(x) validateLink(x, "SPEC_USIGN", #x, SPECIFIER, __FILE__, __LINE__)->select.s.b_unsigned +#define SPEC_SCLS(x) validateLink(x, "SPEC_SCLS", #x, SPECIFIER, __FILE__, __LINE__)->select.s.sclass +#define SPEC_ENUM(x) validateLink(x, "SPEC_ENUM", #x, SPECIFIER, __FILE__, __LINE__)->select.s.b_isenum +#define SPEC_OCLS(x) validateLink(x, "SPEC_OCLS", #x, SPECIFIER, __FILE__, __LINE__)->select.s.oclass +#define SPEC_STAT(x) validateLink(x, "SPEC_STAT", #x, SPECIFIER, __FILE__, __LINE__)->select.s.b_static +#define SPEC_EXTR(x) validateLink(x, "SPEC_EXTR", #x, SPECIFIER, __FILE__, __LINE__)->select.s.b_extern +#define SPEC_CODE(x) validateLink(x, "SPEC_CODE", #x, SPECIFIER, __FILE__, __LINE__)->select.s._codesg +#define SPEC_ABSA(x) validateLink(x, "SPEC_ABSA", #x, SPECIFIER, __FILE__, __LINE__)->select.s.b_absadr +#define SPEC_BANK(x) validateLink(x, "SPEC_BANK", #x, SPECIFIER, __FILE__, __LINE__)->select.s._regbank +#define SPEC_ADDR(x) validateLink(x, "SPEC_ADDR", #x, SPECIFIER, __FILE__, __LINE__)->select.s._addr +#define SPEC_STAK(x) validateLink(x, "SPEC_STAK", #x, SPECIFIER, __FILE__, __LINE__)->select.s._stack +#define SPEC_CVAL(x) validateLink(x, "SPEC_CVAL", #x, SPECIFIER, __FILE__, __LINE__)->select.s.const_val +#define SPEC_BSTR(x) validateLink(x, "SPEC_BSTR", #x, SPECIFIER, __FILE__, __LINE__)->select.s._bitStart +#define SPEC_BLEN(x) validateLink(x, "SPEC_BLEN", #x, SPECIFIER, __FILE__, __LINE__)->select.s._bitLength +#define SPEC_BUNNAMED(x) validateLink(x, "SPEC_BLEN", #x, SPECIFIER, __FILE__, __LINE__)->select.s.b_bitUnnamed + +/* Sleaze: SPEC_ISR_SAVED_BANKS is only used on + * function type symbols, which obviously cannot + * be of BIT type. Therefore, we recycle the + * _bitStart field instead of defining a new field. + */ +#define SPEC_ISR_SAVED_BANKS(x) validateLink(x, "SPEC_NOUN", #x, SPECIFIER, __FILE__, __LINE__)->select.s._bitStart +#define SPEC_VOLATILE(x) validateLink(x, "SPEC_NOUN", #x, SPECIFIER, __FILE__, __LINE__)->select.s.b_volatile +#define SPEC_CONST(x) validateLink(x, "SPEC_NOUN", #x, SPECIFIER, __FILE__, __LINE__)->select.s.b_const +#define SPEC_RESTRICT(x) validateLink(x, "SPEC_NOUN", #x, SPECIFIER, __FILE__, __LINE__)->select.s.b_restrict +#define SPEC_STRUCT(x) validateLink(x, "SPEC_NOUN", #x, SPECIFIER, __FILE__, __LINE__)->select.s.v_struct +#define SPEC_TYPEDEF(x) validateLink(x, "SPEC_NOUN", #x, SPECIFIER, __FILE__, __LINE__)->select.s.b_typedef +#define SPEC_REGPARM(x) validateLink(x, "SPEC_NOUN", #x, SPECIFIER, __FILE__, __LINE__)->select.s.b_isregparm +#define SPEC_ARGREG(x) validateLink(x, "SPEC_NOUN", #x, SPECIFIER, __FILE__, __LINE__)->select.s.argreg +#define SPEC_INLINE(x) validateLink(x, "SPEC_INLINE", #x, SPECIFIER, __FILE__, __LINE__)->select.s.b_inline + +/* type check macros */ +#define IS_DECL(x) ( x && x->class == DECLARATOR ) +#define IS_SPEC(x) ( x && x->class == SPECIFIER ) +#define IS_ARRAY(x) (IS_DECL(x) && DCL_TYPE(x) == ARRAY) +#define IS_DATA_PTR(x) (IS_DECL(x) && DCL_TYPE(x) == POINTER) +#define IS_PTR(x) (IS_DECL(x) && (DCL_TYPE(x) == POINTER || \ + DCL_TYPE(x) == FPOINTER || \ + DCL_TYPE(x) == GPOINTER || \ + DCL_TYPE(x) == IPOINTER || \ + DCL_TYPE(x) == PPOINTER || \ + DCL_TYPE(x) == EEPPOINTER || \ + DCL_TYPE(x) == CPOINTER || \ + DCL_TYPE(x) == UPOINTER )) +#define IS_PTR_CONST(x) (IS_PTR(x) && DCL_PTR_CONST(x)) +#define IS_PTR_RESTRICT(x) (IS_PTR(x) && DCL_PTR_RESTRICT(x)) +#define IS_FARPTR(x) (IS_DECL(x) && DCL_TYPE(x) == FPOINTER) +#define IS_CODEPTR(x) (IS_DECL(x) && DCL_TYPE(x) == CPOINTER) +#define IS_GENPTR(x) (IS_DECL(x) && DCL_TYPE(x) == GPOINTER) +#define IS_FUNCPTR(x) (IS_DECL(x) && (DCL_TYPE(x) == CPOINTER || DCL_TYPE(x) == GPOINTER) && IS_FUNC(x->next)) +#define IS_FUNC(x) (IS_DECL(x) && DCL_TYPE(x) == FUNCTION) +#define IS_LONG(x) (IS_SPEC(x) && x->select.s.b_long) +#define IS_UNSIGNED(x) (IS_SPEC(x) && x->select.s.b_unsigned) +#define IS_TYPEDEF(x)(IS_SPEC(x) && x->select.s.b_typedef) +#define IS_CONSTANT(x) (!x ? 0 : \ + IS_SPEC(x) ? \ + x->select.s.b_const : \ + x->select.d.ptr_const) +#define IS_STRUCT(x) (IS_SPEC(x) && x->select.s.noun == V_STRUCT) +#define IS_ABSOLUTE(x) (IS_SPEC(x) && x->select.s.b_absadr ) +#define IS_REGISTER(x) (IS_SPEC(x) && SPEC_SCLS(x) == S_REGISTER) +#define IS_RENT(x) (IS_SPEC(x) && x->select.s._reent ) +#define IS_STATIC(x) (IS_SPEC(x) && SPEC_STAT(x)) +#define IS_INLINE(x) (IS_SPEC(x) && SPEC_INLINE(x)) +#define IS_INT(x) (IS_SPEC(x) && x->select.s.noun == V_INT) +#define IS_VOID(x) (IS_SPEC(x) && x->select.s.noun == V_VOID) +#define IS_CHAR(x) (IS_SPEC(x) && x->select.s.noun == V_CHAR) +#define IS_EXTERN(x) (IS_SPEC(x) && x->select.s.b_extern) +#define IS_VOLATILE(x) (!x ? 0 : \ + IS_SPEC(x) ? \ + x->select.s.b_volatile : \ + x->select.d.ptr_volatile) +#define IS_INTEGRAL(x) (IS_SPEC(x) && (x->select.s.noun == V_INT || \ + x->select.s.noun == V_CHAR || \ + x->select.s.noun == V_BITFIELD || \ + x->select.s.noun == V_BIT || \ + x->select.s.noun == V_SBIT )) +#define IS_BITFIELD(x) (IS_SPEC(x) && (x->select.s.noun == V_BITFIELD)) +#define IS_BITVAR(x) (IS_SPEC(x) && (x->select.s.noun == V_BITFIELD || \ + x->select.s.noun == V_BIT || \ + x->select.s.noun == V_SBIT )) +#define IS_BIT(x) (IS_SPEC(x) && (x->select.s.noun == V_BIT || \ + x->select.s.noun == V_SBIT )) +#define IS_FLOAT(x) (IS_SPEC(x) && x->select.s.noun == V_FLOAT) +#define IS_FIXED16X16(x) (IS_SPEC(x) && x->select.s.noun == V_FIXED16X16) +#define IS_FIXED(x) (IS_FIXED16X16(x)) +#define IS_ARITHMETIC(x) (IS_INTEGRAL(x) || IS_FLOAT(x) || IS_FIXED(x)) +#define IS_AGGREGATE(x) (IS_ARRAY(x) || IS_STRUCT(x)) +#define IS_LITERAL(x) (IS_SPEC(x) && x->select.s.sclass == S_LITERAL) +#define IS_CODE(x) (IS_SPEC(x) && SPEC_SCLS(x) == S_CODE) +#define IS_REGPARM(x) (IS_SPEC(x) && SPEC_REGPARM(x)) + +/* symbol check macros */ +#define IS_AUTO(x) (x->level && !IS_STATIC(x->etype) && !IS_EXTERN(x->etype)) + +/* forward declaration for the global vars */ +extern bucket *SymbolTab[]; +extern bucket *StructTab[]; +extern bucket *TypedefTab[]; +extern bucket *LabelTab[]; +extern bucket *enumTab[]; +extern symbol *__fsadd; +extern symbol *__fssub; +extern symbol *__fsmul; +extern symbol *__fsdiv; +extern symbol *__fseq; +extern symbol *__fsneq; +extern symbol *__fslt; +extern symbol *__fslteq; +extern symbol *__fsgt; +extern symbol *__fsgteq; + +extern symbol *__fps16x16_add; +extern symbol *__fps16x16_sub; +extern symbol *__fps16x16_mul; +extern symbol *__fps16x16_div; +extern symbol *__fps16x16_eq; +extern symbol *__fps16x16_neq; +extern symbol *__fps16x16_lt; +extern symbol *__fps16x16_lteq; +extern symbol *__fps16x16_gt; +extern symbol *__fps16x16_gteq; + +/* Dims: mul/div/mod, BYTE/WORD/DWORD, SIGNED/UNSIGNED/BOTH */ +extern symbol *__muldiv[3][3][4]; +/* Dims: BYTE/WORD/DWORD SIGNED/UNSIGNED */ +extern sym_link *__multypes[3][2]; +/* Dims: to/from float, BYTE/WORD/DWORD, SIGNED/USIGNED */ +extern symbol *__conv[2][3][2]; +/* Dims: to/from fixed16x16, BYTE/WORD/DWORD/FLOAT, SIGNED/USIGNED */ +extern symbol *__fp16x16conv[2][4][2]; +/* Dims: shift left/shift right, BYTE/WORD/DWORD, SIGNED/UNSIGNED */ +extern symbol *__rlrr[2][3][2]; + +#define CHARTYPE __multypes[0][0] +#define UCHARTYPE __multypes[0][1] +#define INTTYPE __multypes[1][0] +#define UINTTYPE __multypes[1][1] +#define LONGTYPE __multypes[2][0] +#define ULONGTYPE __multypes[2][1] + +extern sym_link *floatType; +extern sym_link *fixed16x16Type; + +#include "SDCCval.h" + +typedef enum +{ + RESULT_TYPE_NONE = 0, /* operands will be promoted to int */ + RESULT_TYPE_BIT, + RESULT_TYPE_CHAR, + RESULT_TYPE_INT, + RESULT_TYPE_OTHER, /* operands will be promoted to int */ + RESULT_TYPE_IFX, + RESULT_TYPE_GPTR, /* operands will be promoted to generic ptr */ +} RESULT_TYPE; + +/* forward definitions for the symbol table related functions */ +void initSymt (); +symbol *newSymbol (char *, int); +sym_link *newLink (SYM_LINK_CLASS); +sym_link *newFloatLink (); +structdef *newStruct (char *); +void addDecl (symbol *, int, sym_link *); +sym_link *mergeSpec (sym_link *, sym_link *, char *name); +symbol *reverseSyms (symbol *); +sym_link *reverseLink (sym_link *); +symbol *copySymbol (symbol *); +symbol *copySymbolChain (symbol *); +void printSymChain (symbol *, int); +void printStruct (structdef *, int); +char *genSymName (int); +sym_link *getSpec (sym_link *); +int compStructSize (int, structdef *); +sym_link *copyLinkChain (sym_link *); +int checkDecl (symbol *, int); +void checkBasic (sym_link *, sym_link *); +value *checkPointerIval (sym_link *, value *); +value *checkStructIval (symbol *, value *); +value *checkArrayIval (sym_link *, value *); +value *checkIval (sym_link *, value *); +unsigned int getSize (sym_link *); +unsigned int bitsForType (sym_link *); +sym_link *newIntLink (); +sym_link *newCharLink (); +sym_link *newLongLink (); +sym_link *newBoolLink (); +int compareType (sym_link *, sym_link *); +int compareTypeExact (sym_link *, sym_link *, int); +int checkFunction (symbol *, symbol *); +void cleanUpLevel (bucket **, int); +void cleanUpBlock (bucket **, int); +int funcInChain (sym_link *); +void addSymChain (symbol **); +sym_link *structElemType (sym_link *, value *); +symbol *getStructElement (structdef *, symbol *); +sym_link *computeType (sym_link *, sym_link *, RESULT_TYPE, int); +void processFuncPtrArgs (sym_link *); +void processFuncArgs (symbol *); +int isSymbolEqual (symbol *, symbol *); +int powof2 (TYPE_TARGET_ULONG); +void dbuf_printTypeChain (sym_link *, struct dbuf_s *); +void printTypeChain (sym_link *, FILE *); +void printTypeChainRaw (sym_link *, FILE *); +void initCSupport (); +void initBuiltIns (); +void pointerTypes (sym_link *, sym_link *); +void cdbStructBlock (int); +void initHashT (); +bucket *newBucket (); +void addSym (bucket **, void *, char *, int, int, int checkType); +void deleteSym (bucket **, void *, char *); +void *findSym (bucket **, void *, const char *); +void *findSymWithLevel (bucket **, struct symbol *); +void *findSymWithBlock (bucket **, struct symbol *, int); +void changePointer (sym_link * p); +void checkTypeSanity(sym_link *etype, char *name); +sym_link *typeFromStr (char *) ; +STORAGE_CLASS sclsFromPtr(sym_link *ptr); +sym_link *newEnumType (symbol *); +void promoteAnonStructs (int, structdef *); + + +extern char *nounName(sym_link *); /* noun strings */ +extern void printFromToType (sym_link *, sym_link *); + +#endif diff --git a/src/SDCCutil.c b/src/SDCCutil.c new file mode 100644 index 0000000..c388012 --- /dev/null +++ b/src/SDCCutil.c @@ -0,0 +1,674 @@ +/*------------------------------------------------------------------------- + SDCCutil.c - Small utility functions. + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include +#include + +#ifdef _WIN32 +#include +#endif +#include +#include "dbuf.h" +#include "SDCCglobl.h" +#include "SDCCmacro.h" +#include "SDCCutil.h" +#include "newalloc.h" +#include "dbuf_string.h" +#ifndef _WIN32 +#include "findme.h" +#endif + +#include "version.h" + +/** Given an array of name, value string pairs creates a new hash + containing all of the pairs. +*/ +hTab * +populateStringHash(const char **pin) +{ + hTab *pret = NULL; + + while (*pin) + { + shash_add (&pret, pin[0], pin[1]); + pin += 2; + } + + return pret; +} + +/** Prints elements of the set to the file, each element on new line +*/ +void +fputStrSet(FILE *fp, set *list) +{ + const char *s; + + for (s = setFirstItem(list); s != NULL; s = setNextItem(list)) { + fputs(s, fp); + fputc('\n', fp); + } +} + +/** Prepend / append given strings to each item of string set. The result is in a + new string set. +*/ +set * +appendStrSet(set *list, const char *pre, const char *post) +{ + set *new_list = NULL; + const char *item; + struct dbuf_s dbuf; + + for (item = setFirstItem(list); item != NULL; item = setNextItem(list)) { + dbuf_init(&dbuf, PATH_MAX); + + if (pre != NULL) + dbuf_append_str(&dbuf, pre); + dbuf_append_str(&dbuf, item); + if (post != NULL) + dbuf_append_str(&dbuf, post); + + /* null terminate the buffer */ + dbuf_c_str(&dbuf); + addSet(&new_list, dbuf_detach(&dbuf)); + } + + return new_list; +} + +/** Given a set returns a string containing all of the strings seperated + by spaces. The returned string is on the heap. +*/ +const char * +joinStrSet(set *list) +{ + const char *s; + struct dbuf_s dbuf; + + dbuf_init(&dbuf, PATH_MAX); + + for (s = setFirstItem(list); s != NULL; s = setNextItem(list)) + { + dbuf_append_str(&dbuf, s); + dbuf_append_char(&dbuf, ' '); + } + + s = dbuf_c_str(&dbuf); + dbuf_detach(&dbuf); + return s; +} + +/** Split the path string to the directory and file name (including extension) components. + The directory component doesn't contain trailing directory separator. + Returns true if the path contains the directory separator. */ +int +dbuf_splitPath(const char *path, struct dbuf_s *dir, struct dbuf_s *file) +{ + const char *p; + int ret; + const char *end = &path[strlen(path)]; + + for (p = end - 1; p >= path && !IS_DIR_SEPARATOR(*p); --p) + ; + + ret = p >= path; + + if (NULL != dir) + { + int len = p - path; + + if (0 < len) + dbuf_append(dir, path, len); + } + + if (NULL != file) + { + int len; + + ++p; + len = end - p; + + if (0 < len) + dbuf_append(file, p, len); + } + + return ret; +} + +/** Split the path string to the file name (including directory) and file extension components. + File extension component contains the extension separator. + Returns true if the path contains the extension separator. */ +int +dbuf_splitFile(const char *path, struct dbuf_s *file, struct dbuf_s *ext) +{ + const char *p; + const char *end = &path[strlen(path)]; + + for (p = end - 1; p >= path && !IS_DIR_SEPARATOR(*p) && '.' != *p; --p) + ; + + if (p < path || '.' != *p) + { + dbuf_append_str(file, path); + + return 0; + } + else + { + if (NULL != file) + { + int len = p - path; + + if (0 < len) + dbuf_append(file, path, len); + } + + if (NULL != ext) + { + int len = end - p; + + if (0 < len) + dbuf_append(ext, p, len); + } + + return 1; + } +} + +/** Combine directory and the file name to a path string using the DIR_SEPARATOR_CHAR. + */ +void +dbuf_makePath(struct dbuf_s *path,const char *dir, const char *file) +{ + if (dir != NULL) + dbuf_append_str(path, dir); + + dbuf_append_char(path, DIR_SEPARATOR_CHAR); + + if (file != NULL) + dbuf_append_str(path, file); +} + +/** Given a file with path information in the binary files directory, + returns the directory component. Used for discovery of bin + directory of SDCC installation. Returns NULL if the path is + impossible. +*/ +#ifdef _WIN32 +const char * +getBinPath(const char *prel) +{ + struct dbuf_s path; + const char *p; + + dbuf_init(&path, 128); + dbuf_splitPath(prel, &path, NULL); + + p = dbuf_c_str(&path); + if ('\0' != *p) + return p; + else + { + char module[PATH_MAX]; + + dbuf_destroy(&path); + + /* not enough info in prel; do it with module name */ + if (0 != GetModuleFileName(NULL, module, sizeof (module))) + { + dbuf_init(&path, 128); + + dbuf_splitPath(module, &path, NULL); + dbuf_c_str(&path); + return dbuf_detach(&path); + } + else + return NULL; + } +} +#else +const char * +getBinPath(const char *prel) +{ + const char *ret_path; + + if (NULL != (ret_path = findProgramPath(prel))) + { + struct dbuf_s path; + + dbuf_init(&path, 128); + + dbuf_splitPath(ret_path, &path, NULL); + free((void *)ret_path); + dbuf_c_str(&path); + return dbuf_detach(&path); + } + else + return NULL; +} +#endif + +/** Returns true if the given path exists. + */ +bool +pathExists (const char *ppath) +{ + struct stat s; + + return stat (ppath, &s) == 0; +} + +static hTab *_mainValues; + +void +setMainValue (const char *pname, const char *pvalue) +{ + assert(pname); + + shash_add (&_mainValues, pname, pvalue); +} + +void +buildCmdLine2 (char *pbuffer, size_t len, const char *pcmd, ...) +{ + va_list ap; + char *poutcmd; + + assert(pbuffer && pcmd); + assert(_mainValues); + + va_start(ap, pcmd); + + poutcmd = mvsprintf(_mainValues, pcmd, ap); + + va_end(ap); + + strncpyz(pbuffer, poutcmd, len); + Safe_free(poutcmd); +} + +void +populateMainValues (const char **ppin) +{ + _mainValues = populateStringHash(ppin); +} + +/** Returns true if sz starts with the string given in key. + */ +bool +startsWith (const char *sz, const char *key) +{ + return !strncmp (sz, key, strlen (key)); +} + +/** Removes any newline characters from the string. Not strictly the + same as perl's chomp. +*/ +void +chomp (char *sz) +{ + char *nl; + while ((nl = strrchr (sz, '\n'))) + *nl = '\0'; +} + +hTab * +getRuntimeVariables(void) +{ + return _mainValues; +} + + +/* strncpy() with guaranteed NULL termination. */ +char *strncpyz(char *dest, const char *src, size_t n) +{ + assert(n > 0); + + --n; + /* paranoia... */ + if (strlen(src) > n) + { + fprintf(stderr, "strncpyz prevented buffer overrun!\n"); + } + + strncpy(dest, src, n); + dest[n] = 0; + return dest; +} + +/* like strncat() with guaranteed NULL termination + * The passed size should be the size of the dest buffer, not the number of + * bytes to copy. + */ +char *strncatz(char *dest, const char *src, size_t n) +{ + size_t maxToCopy; + size_t destLen = strlen(dest); + + assert(n > 0); + assert(n > destLen); + + maxToCopy = n - destLen - 1; + + /* paranoia... */ + if (strlen(src) + destLen >= n) + { + fprintf(stderr, "strncatz prevented buffer overrun!\n"); + } + + strncat(dest, src, maxToCopy); + dest[n - 1] = 0; + return dest; +} + +/*-----------------------------------------------------------------*/ +/* getBuildNumber - return build number */ +/*-----------------------------------------------------------------*/ +const char *getBuildNumber(void) +{ + return (SDCC_BUILD_NUMBER); +} + +/*-----------------------------------------------------------------*/ +/* getBuildDate - return build date */ +/*-----------------------------------------------------------------*/ +const char *getBuildDate(void) +{ + return (__DATE__); +} + +/*-----------------------------------------------------------------*/ +/* getBuildEnvironment - return environment used to build SDCC */ +/*-----------------------------------------------------------------*/ +const char *getBuildEnvironment(void) +{ +#ifdef __CYGWIN__ + return "CYGWIN"; +#elif defined __MINGW32__ + return "MINGW32"; +#elif defined __DJGPP__ + return "DJGPP"; +#elif defined(_MSC_VER) + return "MSVC"; +#elif defined(__BORLANDC__) + return "BORLANDC"; +#elif defined(__APPLE__) +# if defined(__i386__) + return "Mac OS X i386"; +# else + return "Mac OS X ppc"; +#endif +#else + return "UNIX"; +#endif +} + +#if defined(HAVE_VSNPRINTF) || defined(HAVE_VSPRINTF) +size_t SDCCsnprintf(char *dst, size_t n, const char *fmt, ...) +{ + va_list args; + int len; + + va_start(args, fmt); + +# if defined(HAVE_VSNPRINTF) + len = vsnprintf(dst, n, fmt, args); +# else + vsprintf(dst, fmt, args); + len = strlen(dst) + 1; +# endif + + va_end(args); + + /* on some gnu systems, vsnprintf returns -1 if output is truncated. + * In the C99 spec, vsnprintf returns the number of characters that + * would have been written, were space available. + */ + if ((len < 0) || (size_t) len >= n) { + fprintf(stderr, "internal error: sprintf truncated.\n"); + } + + return len; +} +#endif + +/** Pragma tokenizer + */ +void +init_pragma_token(struct pragma_token_s *token) +{ + dbuf_init(&token->dbuf, 16); + token->type = TOKEN_UNKNOWN; +} + +char * +get_pragma_token(const char *s, struct pragma_token_s *token) +{ + dbuf_set_length(&token->dbuf, 0); + + /* skip leading spaces */ + while ('\n' != *s && isspace(*s)) + ++s; + + if ('\0' == *s || '\n' == *s) + { + token->type = TOKEN_EOL; + } + else + { + char *end; + + long val = strtol(s, &end, 0); + + if (end != s && ('\0' == *end || isspace(*end))) + { + token->val.int_val = val; + token->type = TOKEN_INT; + dbuf_append(&token->dbuf, s, end - s); + s = end; + } + else + { + while ('\0' != *s && !isspace(*s)) + { + dbuf_append_char(&token->dbuf, *s); + ++s; + } + + token->type = TOKEN_STR; + } + } + + return (char *)s; +} + +const char * +get_pragma_string(struct pragma_token_s *token) +{ + return dbuf_c_str(&token->dbuf); +} + +void +free_pragma_token(struct pragma_token_s *token) +{ + dbuf_destroy(&token->dbuf); +} + +/*! /fn char hexEscape(char **src) + + /param src Pointer to 'x' from start of hex character value +*/ + +unsigned char +hexEscape (const char **src) +{ + char *s ; + unsigned long value ; + + (*src)++ ; /* Skip over the 'x' */ + + value = strtol (*src, &s, 16); + + if (s == *src) + { + // no valid hex found + werror(E_INVALID_HEX); + } + else + { + if (value > 255) + { + werror(W_ESC_SEQ_OOR_FOR_CHAR); + } + } + *src = s; + + return (char) value; +} + +/*------------------------------------------------------------------*/ +/* octalEscape - process an octal constant of max three digits */ +/* return the octal value, throw a warning for illegal octal */ +/* adjust src to point at the last proccesed char */ +/*------------------------------------------------------------------*/ + +unsigned char +octalEscape (const char **str) +{ + int digits; + unsigned value=0; + + for (digits = 0; digits < 3; digits++) + { + if (**str >='0' && **str <= '7') + { + value = value*8 + (**str - '0'); + (*str)++; + } + else + { + break; + } + } + if (digits) + { + if (value > 255 /* || (**str>='0' && **str<='7') */ ) + { + werror (W_ESC_SEQ_OOR_FOR_CHAR); + } + } + return value; +} + +/*! + /fn int copyStr (char *dest, char *src) + + Copies a source string to a dest buffer interpreting escape sequences + and special characters + + /param dest Buffer to receive the resultant string + /param src Buffer containing the source string with escape sequecnes + /return Number of characters in output string + +*/ + +int +copyStr (char *dest, const char *src) +{ + char *OriginalDest = dest ; + + while (*src) + { + if (*src == '\"') + src++; + else if (*src == '\\') + { + src++; + switch (*src) + { + case 'n': + *dest++ = '\n'; + break; + case 't': + *dest++ = '\t'; + break; + case 'v': + *dest++ = '\v'; + break; + case 'b': + *dest++ = '\b'; + break; + case 'r': + *dest++ = '\r'; + break; + case 'f': + *dest++ = '\f'; + break; + case 'a': + *dest++ = '\a'; + break; + + case '0': + case '1': + case '2': + case '3': + case '4': + case '5': + case '6': + case '7': + *dest++ = octalEscape(&src); + src-- ; + break; + + case 'x': + *dest++ = hexEscape(&src) ; + src-- ; + break ; + + case '\\': + *dest++ = '\\'; + break; + case '\?': + *dest++ = '\?'; + break; + case '\'': + *dest++ = '\''; + break; + case '\"': + *dest++ = '\"'; + break; + default: + *dest++ = *src; + } + src++; + } + else + *dest++ = *src++; + } + + *dest++ = '\0'; + + return dest - OriginalDest ; +} diff --git a/src/SDCCutil.h b/src/SDCCutil.h new file mode 100644 index 0000000..880d7eb --- /dev/null +++ b/src/SDCCutil.h @@ -0,0 +1,156 @@ +/*------------------------------------------------------------------------- + SDCCutil.c - Small utility functions. + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCUTIL_H +#define SDCCUTIL_H + +#include "SDCChasht.h" +#include "dbuf.h" +#include + +/** Given an array of name, value string pairs creates a new hash + containing all of the pairs. +*/ +hTab *populateStringHash (const char **pin); + +/** Prints elements of the set to the file, each element on new line +*/ +void fputStrSet (FILE *fp, set *list); + +/** Prepend / append given strings to each item of string set. The result is in a + new string set. +*/ +set *appendStrSet (set *list, const char *pre, const char *post); + +/** Given a set returns a string containing all of the strings seperated + by spaces. The returned string is on the heap. +*/ +const char *joinStrSet (set *list); + +/** Split the path string to the directory and file name (including extension) components. + The directory component doesn't contain trailing directory separator. + Returns true if the path contains the directory separator. */ +int dbuf_splitPath (const char *path, struct dbuf_s *dir, struct dbuf_s *file); + +/** Split the path string to the file name (including directory) and file extension components. + The file name component doesn't contain trailing extension separator. + Returns true if the path contains the extension separator. */ +int dbuf_splitFile (const char *path, struct dbuf_s *file, struct dbuf_s *ext); + +/** Combile directory and the file name to a path string using the DIR_SEPARATOR_CHAR. + */ +void dbuf_makePath (struct dbuf_s *path, const char *dir, const char *file); + +/** Given a file with path information in the binary files directory, + returns the directory component. Used for discovery of bin + directory of SDCC installation. Returns NULL if the path is + impossible. +*/ +const char *getBinPath (const char *prel); + +/** Returns true if the given path exists. + */ +bool pathExists (const char *ppath); + +void setMainValue (const char *pname, const char *pvalue); + +void populateMainValues (const char **ppin); + +void buildCmdLine2 (char *pbuffer, size_t len, const char *pcmd, ...); + +/** Returns true if sz starts with the string given in key. + */ +bool startsWith (const char *sz, const char *key); + +/** Removes any newline characters from the string. Not strictly the + same as perl's chomp. +*/ +void chomp (char *sz); + +hTab *getRuntimeVariables (void); + +/* strncpy() with guaranteed NULL termination. */ +char *strncpyz (char *dest, const char *src, size_t n); + +/* like strncat() with guaranteed NULL termination + * The passed size should be the size of the dest buffer, not the number of + * bytes to copy. + */ +char *strncatz (char *dest, const char *src, size_t n); + +/* return SDCC build number */ +const char *getBuildNumber (void); + +/* return SDCC build date */ +const char *getBuildDate (void); + +/* return environment used to build SDCC */ +const char *getBuildEnvironment(void); + +/* snprintf, by hook or by crook. */ +size_t SDCCsnprintf (char *, size_t, const char *, ...); + +# if defined(HAVE_VSNPRINTF) + +// best option: we can define our own snprintf which logs errors. +# define SNPRINTF SDCCsnprintf + +# elif defined(HAVE_SPRINTF) + +// if we can't build a safe snprintf for lack of vsnprintf but there +// is a native snprintf, use it. +# define SNPRINTF snprintf + +# elif defined(HAVE_VSPRINTF) + +// we can at least define our own unsafe version. +# define SNPRINTF SDCCsnprintf + +# else +// We don't have a native snprintf nor the functions we need to write one. +# error "Need at least one of snprintf, vsnprintf, vsprintf!" +# endif + +/** Pragma tokenizer + */ +enum pragma_token_e { TOKEN_UNKNOWN, TOKEN_STR, TOKEN_INT, TOKEN_EOL }; + +struct pragma_token_s { + enum pragma_token_e type; + struct dbuf_s dbuf; + union { + int int_val; + } val; +}; + +void init_pragma_token (struct pragma_token_s *token); +char *get_pragma_token (const char *s, struct pragma_token_s *token); +const char *get_pragma_string (struct pragma_token_s *token); +void free_pragma_token (struct pragma_token_s *token); + +unsigned char hexEscape (const char **src); +unsigned char octalEscape (const char **src); +int copyStr (char *dest, const char *src); + +#endif diff --git a/src/SDCCval.c b/src/SDCCval.c new file mode 100644 index 0000000..de08d2a --- /dev/null +++ b/src/SDCCval.c @@ -0,0 +1,2093 @@ +/*---------------------------------------------------------------------- + SDCCval.c :- has routine to do all kinds of fun stuff with the + value wrapper & with initialiser lists. + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" +#include +#include +#include +#include +#include "newalloc.h" + +int cNestLevel; + +/*-----------------------------------------------------------------*/ +/* newValue - allocates and returns a new value */ +/*-----------------------------------------------------------------*/ +value * +newValue (void) +{ + value *val; + + val = Safe_alloc (sizeof (value)); + + return val; +} + +/*-----------------------------------------------------------------*/ +/* newiList - new initializer list */ +/*-----------------------------------------------------------------*/ +initList * +newiList (int type, void *ilist) +{ + initList *nilist; + + nilist = Safe_alloc (sizeof (initList)); + + nilist->type = type; + nilist->filename = lexFilename; + nilist->lineno = lexLineno; + + switch (type) + { + case INIT_NODE: + nilist->init.node = (struct ast *) ilist; + break; + + case INIT_DEEP: + nilist->init.deep = (struct initList *) ilist; + break; + } + + return nilist; +} + +/*------------------------------------------------------------------*/ +/* revinit - reverses the initial values for a value chain */ +/*------------------------------------------------------------------*/ +initList * +revinit (initList * val) +{ + initList *prev, *curr, *next; + + if (!val) + return NULL; + + prev = val; + curr = val->next; + + while (curr) + { + next = curr->next; + curr->next = prev; + prev = curr; + curr = next; + } + val->next = (void *) NULL; + return prev; +} + +bool +convertIListToConstList(initList *src, literalList **lList, int size) +{ + int cnt = 0; + initList *iLoop; + literalList *head, *last, *newL; + + head = last = NULL; + + if (src && src->type != INIT_DEEP) + { + return FALSE; + } + + iLoop = src ? src->init.deep : NULL; + + while (iLoop) + { + if (iLoop->type != INIT_NODE) + { + return FALSE; + } + + if (!IS_AST_LIT_VALUE(decorateType(resolveSymbols(iLoop->init.node), RESULT_TYPE_NONE))) + { + return FALSE; + } + iLoop = iLoop->next; + cnt++; + } + if (!size) + { + size = cnt; + } + + /* We've now established that the initializer list contains only literal values. */ + + iLoop = src ? src->init.deep : NULL; + while (size--) + { + double val = iLoop ? AST_FLOAT_VALUE(iLoop->init.node) : 0; + + if (last && last->literalValue == val) + { + last->count++; + } + else + { + newL = Safe_alloc(sizeof(literalList)); + newL->literalValue = val; + newL->count = 1; + newL->next = NULL; + + if (last) + { + last->next = newL; + } + else + { + head = newL; + } + last = newL; + } + iLoop = iLoop ? iLoop->next : NULL; + } + + if (!head) + { + return FALSE; + } + + *lList = head; + return TRUE; +} + +literalList * +copyLiteralList(literalList *src) +{ + literalList *head, *prev, *newL; + + head = prev = NULL; + + while (src) + { + newL = Safe_alloc(sizeof(literalList)); + + newL->literalValue = src->literalValue; + newL->count = src->count; + newL->next = NULL; + + if (prev) + { + prev->next = newL; + } + else + { + head = newL; + } + prev = newL; + src = src->next; + } + + return head; +} + + + +/*------------------------------------------------------------------*/ +/* copyIlist - copy initializer list */ +/*------------------------------------------------------------------*/ +initList * +copyIlist (initList * src) +{ + initList *dest = NULL; + + if (!src) + return NULL; + + switch (src->type) + { + case INIT_DEEP: + dest = newiList (INIT_DEEP, copyIlist (src->init.deep)); + break; + case INIT_NODE: + dest = newiList (INIT_NODE, copyAst (src->init.node)); + break; + } + + if (src->next) + dest->next = copyIlist (src->next); + + return dest; +} + +/*------------------------------------------------------------------*/ +/* list2int - converts the first element of the list to value */ +/*------------------------------------------------------------------*/ +double +list2int (initList * val) +{ + initList *i = val; + + if (i->type == INIT_DEEP) + return list2int (val->init.deep); + + return floatFromVal (constExprValue (val->init.node, TRUE)); +} + +/*------------------------------------------------------------------*/ +/* list2val - converts the first element of the list to value */ +/*------------------------------------------------------------------*/ +value * +list2val (initList * val) +{ + if (!val) + return NULL; + + if (val->type == INIT_DEEP) + return list2val (val->init.deep); + + return constExprValue (val->init.node, TRUE); +} + +/*------------------------------------------------------------------*/ +/* list2expr - returns the first expression in the initializer list */ +/*------------------------------------------------------------------*/ +ast * +list2expr (initList * ilist) +{ + if (!ilist) + return NULL; + if (ilist->type == INIT_DEEP) + return list2expr (ilist->init.deep); + return ilist->init.node; +} + +/*------------------------------------------------------------------*/ +/* resolveIvalSym - resolve symbols in initial values */ +/*------------------------------------------------------------------*/ +void +resolveIvalSym (initList * ilist, sym_link * type) +{ + int is_ptr = IS_PTR (type); + RESULT_TYPE resultType = getResultTypeFromType (getSpec (type)); + + while (ilist) + { + if (ilist->type == INIT_NODE) + { + ilist->init.node = decorateType (resolveSymbols (ilist->init.node), + is_ptr ? RESULT_TYPE_INT : resultType); + } + else if (ilist->type == INIT_DEEP) + { + resolveIvalSym (ilist->init.deep, type); + } + + ilist = ilist->next; + } +} + +/*------------------------------------------------------------------*/ +/* symbolVal - creates a value for a symbol */ +/*------------------------------------------------------------------*/ +value * +symbolVal (symbol * sym) +{ + value *val; + + if (!sym) + return NULL; + + val = newValue (); + val->sym = sym; + + if (sym->type) + { + val->type = sym->type; + val->etype = getSpec (val->type); + } + + if (*sym->rname) + { + SNPRINTF (val->name, sizeof(val->name), "%s", sym->rname); + } + else + { + SNPRINTF (val->name, sizeof(val->name), "_%s", sym->name); + } + + return val; +} + +/*--------------------------------------------------------------------*/ +/* cheapestVal - try to reduce 'signed int' to 'char' */ +/*--------------------------------------------------------------------*/ +static value * +cheapestVal (value *val) +{ + /* only int can be reduced */ + if (!IS_INT(val->type)) + return val; + + /* long must not be changed */ + if (SPEC_LONG(val->type)) + return val; + + /* unsigned must not be changed */ + if (SPEC_USIGN(val->type)) + return val; + + /* the only possible reduction is from signed int to (un)signed char, + because it's automatically promoted back to signed int. + + a reduction from unsigned int to unsigned char is a bug, + because an _unsigned_ char is promoted to _signed_ int! */ + if (SPEC_CVAL(val->type).v_int < -128 || + SPEC_CVAL(val->type).v_int > 255) + { + /* not in the range of (un)signed char */ + return val; + } + + SPEC_NOUN(val->type) = V_CHAR; + + /* 'unsigned char' promotes to 'signed int', so that we can + reduce it the other way */ + if (SPEC_CVAL(val->type).v_int >= 0) + { + SPEC_USIGN(val->type) = 1; + } + return (val); +} + +/*--------------------------------------------------------------------*/ +/* checkConstantRange - check if constant fits in numeric range of */ +/* var type in comparisons and assignments */ +/*--------------------------------------------------------------------*/ +CCR_RESULT +checkConstantRange (sym_link *var, sym_link *lit, int op, bool exchangeLeftRight) +{ + sym_link *reType; + double litVal; + int varBits; + + litVal = floatFromVal (valFromType (lit)); + varBits = bitsForType (var); + + /* sanity checks */ + if ( IS_FLOAT (var) + || IS_FIXED (var)) + return CCR_OK; + if (varBits < 1) + return CCR_ALWAYS_FALSE; + if (varBits > 32) + return CCR_ALWAYS_TRUE; + + /* special: assignment */ + if (op == '=') + { + if (IS_BIT (var)) + return CCR_OK; + + if (getenv ("SDCC_VERY_PEDANTIC")) + { + if (SPEC_USIGN (var)) + { + TYPE_TARGET_ULONG maxVal = 0xffffffffu >> (32 - varBits); + + if ( litVal < 0 + || litVal > maxVal) + return CCR_OVL; + return CCR_OK; + } + else + { + TYPE_TARGET_LONG minVal = 0xffffffff << (varBits - 1); + TYPE_TARGET_LONG maxVal = 0x7fffffff >> (32 - varBits); + + if ( litVal < minVal + || litVal > maxVal) + return CCR_OVL; + return CCR_OK; + } + } + else + { + /* ignore signedness, e.g. allow everything + from -127...+255 for (unsigned) char */ + TYPE_TARGET_LONG minVal = 0xffffffff << (varBits - 1); + TYPE_TARGET_ULONG maxVal = 0xffffffffu >> (32 - varBits); + + if ( litVal < minVal + || litVal > maxVal) + return CCR_OVL; + return CCR_OK; + } + } + + if (exchangeLeftRight) + switch (op) + { + case EQ_OP: break; + case NE_OP: break; + case '>': op = '<'; break; + case GE_OP: op = LE_OP; break; + case '<': op = '>'; break; + case LE_OP: op = GE_OP; break; + default: return CCR_ALWAYS_FALSE; + } + + reType = computeType (var, lit, RESULT_TYPE_NONE, op); + + if (SPEC_USIGN (reType)) + { + /* unsigned operation */ + TYPE_TARGET_ULONG minValP, maxValP, minValM, maxValM; + TYPE_TARGET_ULONG opBitsMask = 0xffffffffu >> (32 - bitsForType (reType)); + + if (SPEC_USIGN (lit) && SPEC_USIGN (var)) + { + /* both operands are unsigned, this is easy */ + minValP = 0; + maxValP = 0xffffffffu >> (32 - varBits); + /* there's only range, just copy it to 2nd set */ + minValM = minValP; + maxValM = maxValP; + } + else if (SPEC_USIGN (var)) + { + /* lit is casted from signed to unsigned, e.g.: + unsigned u; + u == (char) -17 + -> u == 0xffef' + */ + minValP = 0; + maxValP = 0xffffffffu >> (32 - varBits); + /* there's only one range, just copy it to 2nd set */ + minValM = minValP; + maxValM = maxValP; + + /* it's an unsigned operation */ + if ( IS_CHAR (reType) + || IS_INT (reType)) + { + /* make signed literal unsigned and + limit no of bits to size of return type */ + litVal = (TYPE_TARGET_ULONG) double2ul (litVal) & opBitsMask; + } + } + else /* SPEC_USIGN (lit) */ + { + /* var is casted from signed to unsigned, e.g.: + signed char c; + c == (unsigned) -17 + -> c == 0xffef' + + The possible values after casting var + split up in two, nonconsecutive ranges: + + minValP = 0; positive range: 0...127 + maxValP = 0x7f; + minValM = 0xff80; negative range: -128...-1 + maxValM = 0xffff; + */ + + /* positive range */ + minValP = 0; + maxValP = 0x7fffffffu >> (32 - varBits); + + /* negative range */ + minValM = 0xffffffff << (varBits - 1); + maxValM = 0xffffffffu; /* -1 */ + /* limit no of bits to size of return type */ + minValM &= opBitsMask; + maxValM &= opBitsMask; + } + + switch (op) + { + case EQ_OP: /* var == lit */ + if ( litVal <= maxValP + && litVal >= minValP) /* 0 */ + return CCR_OK; + if ( litVal <= maxValM + && litVal >= minValM) + return CCR_OK; + return CCR_ALWAYS_FALSE; + case NE_OP: /* var != lit */ + if ( litVal <= maxValP + && litVal >= minValP) /* 0 */ + return CCR_OK; + if ( litVal <= maxValM + && litVal >= minValM) + return CCR_OK; + return CCR_ALWAYS_TRUE; + case '>': /* var > lit */ + if (litVal >= maxValM) + return CCR_ALWAYS_FALSE; + if (litVal < minValP) /* 0 */ + return CCR_ALWAYS_TRUE; + return CCR_OK; + case GE_OP: /* var >= lit */ + if (litVal > maxValM) + return CCR_ALWAYS_FALSE; + if (litVal <= minValP) /* 0 */ + return CCR_ALWAYS_TRUE; + return CCR_OK; + case '<': /* var < lit */ + if (litVal > maxValM) + return CCR_ALWAYS_TRUE; + if (litVal <= minValP) /* 0 */ + return CCR_ALWAYS_FALSE; + return CCR_OK; + case LE_OP: /* var <= lit */ + if (litVal >= maxValM) + return CCR_ALWAYS_TRUE; + if (litVal < minValP) /* 0 */ + return CCR_ALWAYS_FALSE; + return CCR_OK; + default: + return CCR_ALWAYS_FALSE; + } + } + else + { + /* signed operation */ + TYPE_TARGET_LONG minVal, maxVal; + + if (SPEC_USIGN (var)) + { + /* unsigned var, but signed operation. This happens + when var is promoted to signed int. + Set actual min/max values of var. */ + minVal = 0; + maxVal = 0xffffffff >> (32 - varBits); + } + else + { + /* signed var */ + minVal = 0xffffffff << (varBits - 1); + maxVal = 0x7fffffff >> (32 - varBits); + } + + switch (op) + { + case EQ_OP: /* var == lit */ + if ( litVal > maxVal + || litVal < minVal) + return CCR_ALWAYS_FALSE; + return CCR_OK; + case NE_OP: /* var != lit */ + if ( litVal > maxVal + || litVal < minVal) + return CCR_ALWAYS_TRUE; + return CCR_OK; + case '>': /* var > lit */ + if (litVal >= maxVal) + return CCR_ALWAYS_FALSE; + if (litVal < minVal) + return CCR_ALWAYS_TRUE; + return CCR_OK; + case GE_OP: /* var >= lit */ + if (litVal > maxVal) + return CCR_ALWAYS_FALSE; + if (litVal <= minVal) + return CCR_ALWAYS_TRUE; + return CCR_OK; + case '<': /* var < lit */ + if (litVal > maxVal) + return CCR_ALWAYS_TRUE; + if (litVal <= minVal) + return CCR_ALWAYS_FALSE; + return CCR_OK; + case LE_OP: /* var <= lit */ + if (litVal >= maxVal) + return CCR_ALWAYS_TRUE; + if (litVal < minVal) + return CCR_ALWAYS_FALSE; + return CCR_OK; + default: + return CCR_ALWAYS_FALSE; + } + } +} + +/*-----------------------------------------------------------------*/ +/* valueFromLit - creates a value from a literal */ +/*-----------------------------------------------------------------*/ +value * +valueFromLit (double lit) +{ + char buffer[50]; + + if ((((TYPE_TARGET_LONG) lit) - lit) == 0) + { + SNPRINTF (buffer, sizeof(buffer), "%d", (TYPE_TARGET_LONG) lit); + return constVal (buffer); + } + + SNPRINTF (buffer, sizeof(buffer), "%f", lit); + return constFloatVal (buffer); +} + +/*-----------------------------------------------------------------*/ +/* constFloatVal - converts a FLOAT constant to value */ +/*-----------------------------------------------------------------*/ +value * +constFloatVal (const char *s) +{ + value *val = newValue (); + double sval; + char *p; + + sval = strtod(s, &p); + if (p == s) + { + werror (E_INVALID_FLOAT_CONST, s); + return constCharVal (0); + } + + val->type = val->etype = newLink (SPECIFIER); + SPEC_NOUN (val->type) = V_FLOAT; + SPEC_SCLS (val->type) = S_LITERAL; + SPEC_CVAL (val->type).v_float = sval; + + return val; +} + +/*-----------------------------------------------------------------*/ +/* constFixed16x16Val - converts a FIXED16X16 constant to value */ +/*-----------------------------------------------------------------*/ +value * +constFixed16x16Val (const char *s) +{ + value *val = newValue (); + double sval; + char *p; + + sval = strtod(s, &p); + if (p == s) + { + werror (E_INVALID_FLOAT_CONST, s); + return constCharVal (0); + } + + val->type = val->etype = newLink (SPECIFIER); + SPEC_NOUN (val->type) = V_FLOAT; + SPEC_SCLS (val->type) = S_LITERAL; + SPEC_CVAL (val->type).v_fixed16x16 = fixed16x16FromDouble ( sval ); + + return val; +} + +/*-----------------------------------------------------------------*/ +/* constVal - converts an INTEGER constant into a cheapest value */ +/*-----------------------------------------------------------------*/ +value *constVal (const char *s) +{ + value *val; + char *p; + double dval; + bool is_integral = 0; + + val = newValue (); /* alloc space for value */ + + val->type = val->etype = newLink (SPECIFIER); /* create the specifier */ + SPEC_SCLS (val->type) = S_LITERAL; + /* let's start with a signed char */ + SPEC_NOUN (val->type) = V_CHAR; + SPEC_USIGN (val->type) = 0; + + errno = 0; + if (s[0] == '0') + { + if (s[1] == 'b' || s[1] == 'B') + dval = strtoul (s + 2, &p, 2); + else + dval = strtoul (s, &p, 0); + is_integral = 1; + } + else + dval = strtod (s, &p); + + if (errno) + { + dval = 4294967295.0; + werror (W_INVALID_INT_CONST, s, dval); + } + + /* Setup the flags first */ + /* set the unsigned flag if 'uU' is found */ + if (strchr (p, 'u') || strchr (p, 'U')) + { + SPEC_USIGN (val->type) = 1; + } + + /* set the b_long flag if 'lL' is found */ + if (strchr (p, 'l') || strchr (p, 'L')) + { + SPEC_NOUN (val->type) = V_INT; + SPEC_LONG (val->type) = 1; + } + else + { + if (dval < 0) + { /* "-28u" will still be signed and negative */ + if (dval < -128) + { /* check if we have to promote to int */ + SPEC_NOUN (val->type) = V_INT; + } + if (dval < -32768) + { /* check if we have to promote to long int */ + SPEC_LONG (val->type) = 1; + } + } + else + { /* >=0 */ + if (dval > 0xff || /* check if we have to promote to int */ + SPEC_USIGN (val->type)) + { /* if it's unsigned, we can't use unsigned + char. After an integral promotion it will + be a signed int; this certainly isn't what + the programer wants */ + SPEC_NOUN (val->type) = V_INT; + } + else + { /* store char's always as unsigned; this helps other optimizations */ + SPEC_USIGN (val->type) = 1; + } + if (dval > 0xffff && SPEC_USIGN (val->type)) + { /* check if we have to promote to long */ + SPEC_LONG (val->type) = 1; + } + else if (dval > 0x7fff && !SPEC_USIGN (val->type)) + { /* check if we have to promote to long int */ + if (is_integral && /* integral (hex, octal and binary) constants may be stored in unsigned type */ + dval <= 0xffff) + { + SPEC_USIGN (val->type) = 1; + } + else + { + SPEC_LONG (val->type) = 1; + if (dval > 0x7fffffff) + { + SPEC_USIGN (val->type) = 1; + } + } + } + } + } + + /* check for out of range */ + if (dval < -2147483648.0) + { + dval = -2147483648.0; + werror (W_INVALID_INT_CONST, s, dval); + } + if (dval > 2147483647.0 && !SPEC_USIGN (val->type)) + { + dval = 2147483647.0; + werror (W_INVALID_INT_CONST, s, dval); + } + if (dval > 4294967295.0) + { + dval = 4294967295.0; + werror (W_INVALID_INT_CONST, s, dval); + } + + if (SPEC_LONG (val->type)) + { + if (SPEC_USIGN (val->type)) + { + SPEC_CVAL (val->type).v_ulong = (TYPE_TARGET_ULONG) double2ul (dval); + } + else + { + SPEC_CVAL (val->type).v_long = (TYPE_TARGET_LONG) double2ul (dval); + } + } + else + { + if (SPEC_USIGN (val->type)) + { + SPEC_CVAL (val->type).v_uint = (TYPE_TARGET_UINT) double2ul (dval); + } + else + { + SPEC_CVAL (val->type).v_int = (TYPE_TARGET_INT) double2ul (dval); + } + } + + return val; +} + +value *constCharVal (unsigned char v) +{ + value *val = newValue (); /* alloc space for value */ + + val->type = val->etype = newLink (SPECIFIER); /* create the specifier */ + SPEC_SCLS (val->type) = S_LITERAL; + /* let's start with a signed char */ + SPEC_NOUN (val->type) = V_CHAR; + SPEC_USIGN (val->type) = 1; + SPEC_CVAL (val->type).v_uint = v; + + return val; +} + +/*------------------------------------------------------------------*/ +/* strVal - converts a string constant to a value */ +/*------------------------------------------------------------------*/ +value * +strVal (const char *s) +{ + value *val; + + val = newValue (); /* get a new one */ + + /* get a declarator */ + val->type = newLink (DECLARATOR); + DCL_TYPE (val->type) = ARRAY; + val->type->next = val->etype = newLink (SPECIFIER); + SPEC_NOUN (val->etype) = V_CHAR; + SPEC_SCLS (val->etype) = S_LITERAL; + + SPEC_CVAL (val->etype).v_char = Safe_alloc (strlen (s) + 1); + DCL_ELEM (val->type) = copyStr (SPEC_CVAL (val->etype).v_char, s); + + return val; +} + + +/*------------------------------------------------------------------*/ +/* reverseValWithType - reverses value chain with type & etype */ +/*------------------------------------------------------------------*/ +value * +reverseValWithType (value * val) +{ + sym_link *type; + sym_link *etype; + + if (!val) + return NULL; + + /* save the type * etype chains */ + type = val->type; + etype = val->etype; + + /* set the current one 2b null */ + val->type = val->etype = NULL; + val = reverseVal (val); + + /* restore type & etype */ + val->type = type; + val->etype = etype; + + return val; +} + +/*------------------------------------------------------------------*/ +/* reverseVal - reverses the values for a value chain */ +/*------------------------------------------------------------------*/ +value * +reverseVal (value * val) +{ + value *prev, *curr, *next; + + if (!val) + return NULL; + + prev = val; + curr = val->next; + + while (curr) + { + next = curr->next; + curr->next = prev; + prev = curr; + curr = next; + } + val->next = (void *) NULL; + return prev; +} + +/*------------------------------------------------------------------*/ +/* copyValueChain - will copy a chain of values */ +/*------------------------------------------------------------------*/ +value * +copyValueChain (value * src) +{ + value *dest; + + if (!src) + return NULL; + + dest = copyValue (src); + dest->next = copyValueChain (src->next); + + return dest; +} + +/*------------------------------------------------------------------*/ +/* copyValue - copies contents of a value to a fresh one */ +/*------------------------------------------------------------------*/ +value * +copyValue (value * src) +{ + value *dest; + + dest = newValue (); + dest->sym = copySymbol (src->sym); + strncpyz (dest->name, src->name, SDCC_NAME_MAX); + dest->type = (src->type ? copyLinkChain (src->type) : NULL); + dest->etype = (src->type ? getSpec (dest->type) : NULL); + + return dest; +} + +/*------------------------------------------------------------------*/ +/* charVal - converts a character constant to a value */ +/*------------------------------------------------------------------*/ +value * +charVal (const char *s) +{ + /* get rid of quotation */ + /* if \ then special processing */ + if (*++s == '\\') + { + switch (*++s) /* go beyond the backslash */ + { + case 'n': + return constCharVal ('\n'); + case 't': + return constCharVal ('\t'); + case 'v': + return constCharVal ('\v'); + case 'b': + return constCharVal ('\b'); + case 'r': + return constCharVal ('\r'); + case 'f': + return constCharVal ('\f'); + case 'a': + return constCharVal ('\a'); + case '\\': + return constCharVal ('\\'); + case '\?': + return constCharVal ('\?'); + case '\'': + return constCharVal ('\''); + case '\"': + return constCharVal ('\"'); + + case '0' : + case '1' : + case '2' : + case '3' : + case '4' : + case '5' : + case '6' : + case '7' : + return constCharVal (octalEscape (&s)); + + case 'x': + return constCharVal (hexEscape (&s)); + + default: + return constCharVal (*s); + } + } + else /* not a backslash */ + return constCharVal (*s); +} + +/*------------------------------------------------------------------*/ +/* valFromType - creates a value from type given */ +/*------------------------------------------------------------------*/ +value * +valFromType (sym_link * type) +{ + value *val = newValue (); + val->type = copyLinkChain (type); + val->etype = getSpec (val->type); + return val; +} + +/*------------------------------------------------------------------*/ +/* floatFromVal - value to double float conversion */ +/*------------------------------------------------------------------*/ +double +floatFromVal (value * val) +{ + if (!val) + return 0; + + if (val->etype && SPEC_SCLS (val->etype) != S_LITERAL) + { + werror (E_CONST_EXPECTED, val->name); + return 0; + } + + /* if it is not a specifier then we can assume that */ + /* it will be an unsigned long */ + if (!IS_SPEC (val->type)) + return SPEC_CVAL (val->etype).v_ulong; + + if (SPEC_NOUN (val->etype) == V_FLOAT) + return SPEC_CVAL (val->etype).v_float; + + if (SPEC_NOUN (val->etype) == V_FIXED16X16) + return doubleFromFixed16x16 (SPEC_CVAL (val->etype).v_fixed16x16); + + if (SPEC_LONG (val->etype)) + { + if (SPEC_USIGN (val->etype)) + return SPEC_CVAL (val->etype).v_ulong; + else + return SPEC_CVAL (val->etype).v_long; + } + + if (SPEC_NOUN (val->etype) == V_INT) + { + if (SPEC_USIGN (val->etype)) + return SPEC_CVAL (val->etype).v_uint; + else + return SPEC_CVAL (val->etype).v_int; + } + + if (SPEC_NOUN (val->etype) == V_CHAR) + { + if (SPEC_USIGN (val->etype)) + return (unsigned char) SPEC_CVAL (val->etype).v_uint; + else + return (signed char) SPEC_CVAL (val->etype).v_int; + } + + if (IS_BITVAR(val->etype)) + return SPEC_CVAL (val->etype).v_uint; + + if (SPEC_NOUN (val->etype) == V_VOID) + return SPEC_CVAL (val->etype).v_ulong; + + /* we are lost ! */ + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, "floatFromVal: unknown value"); + return 0; +} + +/*------------------------------------------------------------------*/ +/* ulFromVal - value to unsigned long conversion */ +/*------------------------------------------------------------------*/ +unsigned long +ulFromVal (value * val) +{ + if (!val) + return 0; + + if (val->etype && SPEC_SCLS (val->etype) != S_LITERAL) + { + werror (E_CONST_EXPECTED, val->name); + return 0; + } + + /* if it is not a specifier then we can assume that */ + /* it will be an unsigned long */ + if (!IS_SPEC (val->type)) + return SPEC_CVAL (val->etype).v_ulong; + + if (SPEC_NOUN (val->etype) == V_FLOAT) + return double2ul (SPEC_CVAL (val->etype).v_float); + + if (SPEC_NOUN (val->etype) == V_FIXED16X16) + return double2ul (doubleFromFixed16x16 (SPEC_CVAL (val->etype).v_fixed16x16)); + + if (SPEC_LONG (val->etype)) + { + if (SPEC_USIGN (val->etype)) + return SPEC_CVAL (val->etype).v_ulong; + else + return SPEC_CVAL (val->etype).v_long; + } + + if (SPEC_NOUN (val->etype) == V_INT) + { + if (SPEC_USIGN (val->etype)) + return SPEC_CVAL (val->etype).v_uint; + else + return SPEC_CVAL (val->etype).v_int; + } + + if (SPEC_NOUN (val->etype) == V_CHAR) + { + if (SPEC_USIGN (val->etype)) + return (unsigned char) SPEC_CVAL (val->etype).v_uint; + else + return (signed char) SPEC_CVAL (val->etype).v_int; + } + + if (IS_BITVAR(val->etype)) + return SPEC_CVAL (val->etype).v_uint; + + if (SPEC_NOUN (val->etype) == V_VOID) + return SPEC_CVAL (val->etype).v_ulong; + + /* we are lost ! */ + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, "ulFromVal: unknown value"); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* doubleFromFixed16x16 - convert a fixed16x16 to double */ +/*-----------------------------------------------------------------*/ +double doubleFromFixed16x16(TYPE_TARGET_ULONG value) +{ +#if 0 + /* This version is incorrect negative values. */ + double tmp=0, exp=2; + + tmp = (value & 0xffff0000) >> 16; + + while(value) { + value &= 0xffff; + if(value & 0x8000)tmp += 1/exp; + exp *= 2; + value <<= 1; + } + + return (tmp); +#else + return ((double)(value * 1.0) / (double)(1UL << 16)); +#endif +} + +TYPE_TARGET_ULONG fixed16x16FromDouble(double value) +{ +#if 0 + /* This version is incorrect negative values. */ + unsigned int tmp=0, pos=16; + TYPE_TARGET_ULONG res; + + tmp = floor( value ); + res = tmp << 16; + value -= tmp; + + tmp = 0; + while(pos--) { + value *= 2; + if(value >= 1.0)tmp |= (1 << pos); + value -= floor( value ); + } + + res |= tmp; + + return (res); +#else + return double2ul (value * (double)(1UL << 16)); +#endif +} + +/*------------------------------------------------------------------*/ +/* valUnaryPM - does the unary +/- operation on a constant */ +/*------------------------------------------------------------------*/ +value * +valUnaryPM (value * val) +{ + /* depending on type */ + if (SPEC_NOUN (val->etype) == V_FLOAT) + SPEC_CVAL (val->etype).v_float = -1.0 * SPEC_CVAL (val->etype).v_float; + else if (SPEC_NOUN (val->etype) == V_FIXED16X16) + SPEC_CVAL (val->etype).v_fixed16x16 = (TYPE_TARGET_ULONG) -((long) SPEC_CVAL (val->etype).v_fixed16x16); + else + { + if (SPEC_LONG (val->etype)) + { + if (SPEC_USIGN (val->etype)) + SPEC_CVAL (val->etype).v_ulong = 0-SPEC_CVAL (val->etype).v_ulong; + else + SPEC_CVAL (val->etype).v_long = -SPEC_CVAL (val->etype).v_long; + } + else + { + if (SPEC_USIGN (val->etype)) + SPEC_CVAL (val->etype).v_uint = 0-SPEC_CVAL (val->etype).v_uint; + else + SPEC_CVAL (val->etype).v_int = -SPEC_CVAL (val->etype).v_int; + + if (SPEC_NOUN(val->etype) == V_CHAR) + { + /* promote to 'signed int', cheapestVal() might reduce it again */ + SPEC_USIGN(val->etype) = 0; + SPEC_NOUN(val->etype) = V_INT; + } + return cheapestVal (val); + } + } + return val; +} + +/*------------------------------------------------------------------*/ +/* valueComplement - complements a constant */ +/*------------------------------------------------------------------*/ +value * +valComplement (value * val) +{ + /* depending on type */ + if (SPEC_LONG (val->etype)) + { + if (SPEC_USIGN (val->etype)) + SPEC_CVAL (val->etype).v_ulong = ~SPEC_CVAL (val->etype).v_ulong; + else + SPEC_CVAL (val->etype).v_long = ~SPEC_CVAL (val->etype).v_long; + } + else + { + if (SPEC_USIGN (val->etype)) + SPEC_CVAL (val->etype).v_uint = ~SPEC_CVAL (val->etype).v_uint; + else + SPEC_CVAL (val->etype).v_int = ~SPEC_CVAL (val->etype).v_int; + + if (SPEC_NOUN(val->etype) == V_CHAR) + { + /* promote to 'signed int', cheapestVal() might reduce it again */ + SPEC_USIGN(val->etype) = 0; + SPEC_NOUN(val->etype) = V_INT; + } + return cheapestVal (val); + } + return val; +} + +/*------------------------------------------------------------------*/ +/* valueNot - complements a constant */ +/*------------------------------------------------------------------*/ +value * +valNot (value * val) +{ + /* depending on type */ + if (SPEC_LONG (val->etype)) + { + if (SPEC_USIGN (val->etype)) + SPEC_CVAL (val->etype).v_int = !SPEC_CVAL (val->etype).v_ulong; + else + SPEC_CVAL (val->etype).v_int = !SPEC_CVAL (val->etype).v_long; + } + else + { + if (SPEC_USIGN (val->etype)) + SPEC_CVAL (val->etype).v_int = !SPEC_CVAL (val->etype).v_uint; + else + SPEC_CVAL (val->etype).v_int = !SPEC_CVAL (val->etype).v_int; + + } + /* ANSI: result type is int, value is 0 or 1 */ + /* sdcc will hold this in an 'unsigned char' */ + SPEC_USIGN(val->etype) = 1; + SPEC_LONG (val->etype) = 0; + SPEC_NOUN(val->etype) = V_CHAR; + return val; +} + +/*------------------------------------------------------------------*/ +/* valMult - multiply constants */ +/*------------------------------------------------------------------*/ +value * +valMult (value * lval, value * rval) +{ + value *val; + + /* create a new value */ + val = newValue (); + val->type = val->etype = computeType (lval->etype, + rval->etype, + RESULT_TYPE_INT, + '*'); + SPEC_SCLS (val->etype) = S_LITERAL; /* will remain literal */ + + if (IS_FLOAT (val->type)) + SPEC_CVAL (val->type).v_float = floatFromVal (lval) * floatFromVal (rval); + else + if (IS_FIXED16X16 (val->type)) + SPEC_CVAL (val->type).v_fixed16x16 = fixed16x16FromDouble(floatFromVal (lval) * floatFromVal (rval)); + /* signed and unsigned mul are the same, as long as the precision of the + result isn't bigger than the precision of the operands. */ + else if (SPEC_LONG (val->type)) + SPEC_CVAL (val->type).v_ulong = (TYPE_TARGET_ULONG) ulFromVal (lval) * + (TYPE_TARGET_ULONG) ulFromVal (rval); + else if (SPEC_USIGN (val->type)) /* unsigned int */ + { + TYPE_TARGET_ULONG ul = (TYPE_TARGET_UINT) ulFromVal (lval) * + (TYPE_TARGET_UINT) ulFromVal (rval); + + SPEC_CVAL (val->type).v_uint = (TYPE_TARGET_UINT) ul; + if (ul != (TYPE_TARGET_UINT) ul) + werror (W_INT_OVL); + } + else /* signed int */ + { + TYPE_TARGET_LONG l = (TYPE_TARGET_INT) floatFromVal (lval) * + (TYPE_TARGET_INT) floatFromVal (rval); + + SPEC_CVAL (val->type).v_int = (TYPE_TARGET_INT) l; + if (l != (TYPE_TARGET_INT) l) + werror (W_INT_OVL); + } + return cheapestVal (val); +} + +/*------------------------------------------------------------------*/ +/* valDiv - Divide constants */ +/*------------------------------------------------------------------*/ +value * +valDiv (value * lval, value * rval) +{ + value *val; + + if (floatFromVal (rval) == 0) + { + werror (E_DIVIDE_BY_ZERO); + return rval; + } + + /* create a new value */ + val = newValue (); + val->type = val->etype = computeType (lval->etype, + rval->etype, + RESULT_TYPE_INT, + '/'); + SPEC_SCLS (val->etype) = S_LITERAL; /* will remain literal */ + + if (IS_FLOAT (val->type)) + SPEC_CVAL (val->type).v_float = floatFromVal (lval) / floatFromVal (rval); + else if (IS_FIXED16X16 (val->type)) + SPEC_CVAL (val->type).v_fixed16x16 = fixed16x16FromDouble( floatFromVal (lval) / floatFromVal (rval) ); + else if (SPEC_LONG (val->type)) + { + if (SPEC_USIGN (val->type)) + SPEC_CVAL (val->type).v_ulong = (TYPE_TARGET_ULONG) ulFromVal (lval) / + (TYPE_TARGET_ULONG) ulFromVal (rval); + else + SPEC_CVAL (val->type).v_long = (TYPE_TARGET_LONG) ulFromVal (lval) / + (TYPE_TARGET_LONG) ulFromVal (rval); + } + else + { + if (SPEC_USIGN (val->type)) + SPEC_CVAL (val->type).v_uint = (TYPE_TARGET_UINT) ulFromVal (lval) / + (TYPE_TARGET_UINT) ulFromVal (rval); + else + SPEC_CVAL (val->type).v_int = (TYPE_TARGET_INT) ulFromVal (lval) / + (TYPE_TARGET_INT) ulFromVal (rval); + } + return cheapestVal (val); +} + +/*------------------------------------------------------------------*/ +/* valMod - Modulus constants */ +/*------------------------------------------------------------------*/ +value * +valMod (value * lval, value * rval) +{ + value *val; + + /* create a new value */ + val = newValue(); + val->type = val->etype = computeType (lval->etype, + rval->etype, + RESULT_TYPE_INT, + '%'); + SPEC_SCLS (val->etype) = S_LITERAL; /* will remain literal */ + + if (SPEC_LONG (val->type)) + { + if (SPEC_USIGN (val->type)) + SPEC_CVAL (val->type).v_ulong = (TYPE_TARGET_ULONG) ulFromVal (lval) % + (TYPE_TARGET_ULONG) ulFromVal (rval); + else + SPEC_CVAL (val->type).v_long = (TYPE_TARGET_LONG) ulFromVal (lval) % + (TYPE_TARGET_LONG) ulFromVal (rval); + } + else + { + if (SPEC_USIGN (val->type)) + SPEC_CVAL (val->type).v_uint = (TYPE_TARGET_UINT) ulFromVal (lval) % + (TYPE_TARGET_UINT) ulFromVal (rval); + else + SPEC_CVAL (val->type).v_int = (TYPE_TARGET_INT) ulFromVal (lval) % + (TYPE_TARGET_INT) ulFromVal (rval); + } + return cheapestVal (val); +} + +/*------------------------------------------------------------------*/ +/* valPlus - Addition constants */ +/*------------------------------------------------------------------*/ +value * +valPlus (value * lval, value * rval) +{ + value *val; + + /* create a new value */ + val = newValue(); + val->type = val->etype = computeType (lval->etype, + rval->etype, + RESULT_TYPE_INT, + '+'); + SPEC_SCLS (val->etype) = S_LITERAL; /* will remain literal */ + + if (IS_FLOAT (val->type)) + SPEC_CVAL (val->type).v_float = floatFromVal (lval) + floatFromVal (rval); + else + if (IS_FIXED16X16 (val->type)) + SPEC_CVAL (val->type).v_fixed16x16 = fixed16x16FromDouble( floatFromVal (lval) + floatFromVal (rval) ); + else if (SPEC_LONG (val->type)) + { + if (SPEC_USIGN (val->type)) + SPEC_CVAL (val->type).v_ulong = (TYPE_TARGET_ULONG) ulFromVal (lval) + + (TYPE_TARGET_ULONG) ulFromVal (rval); + else + SPEC_CVAL (val->type).v_long = (TYPE_TARGET_LONG) ulFromVal (lval) + + (TYPE_TARGET_LONG) ulFromVal (rval); + } + else + { + if (SPEC_USIGN (val->type)) + SPEC_CVAL (val->type).v_uint = (TYPE_TARGET_UINT) ulFromVal (lval) + + (TYPE_TARGET_UINT) ulFromVal (rval); + else + SPEC_CVAL (val->type).v_int = (TYPE_TARGET_INT) ulFromVal (lval) + + (TYPE_TARGET_INT) ulFromVal (rval); + } + return cheapestVal (val); +} + +/*------------------------------------------------------------------*/ +/* valMinus - Addition constants */ +/*------------------------------------------------------------------*/ +value * +valMinus (value * lval, value * rval) +{ + value *val; + + /* create a new value */ + val = newValue(); + val->type = val->etype = computeType (lval->etype, + rval->etype, + RESULT_TYPE_INT, + '-'); + SPEC_SCLS (val->etype) = S_LITERAL; /* will remain literal */ + + if (IS_FLOAT (val->type)) + SPEC_CVAL (val->type).v_float = floatFromVal (lval) - floatFromVal (rval); + else + if (IS_FIXED16X16 (val->type)) + SPEC_CVAL (val->type).v_fixed16x16 = fixed16x16FromDouble( floatFromVal (lval) - floatFromVal (rval) ); + else if (SPEC_LONG (val->type)) + { + if (SPEC_USIGN (val->type)) + SPEC_CVAL (val->type).v_ulong = (TYPE_TARGET_ULONG) ulFromVal (lval) - + (TYPE_TARGET_ULONG) ulFromVal (rval); + else + SPEC_CVAL (val->type).v_long = (TYPE_TARGET_LONG) ulFromVal (lval) - + (TYPE_TARGET_LONG) ulFromVal (rval); + } + else + { + if (SPEC_USIGN (val->type)) + SPEC_CVAL (val->type).v_uint = (TYPE_TARGET_UINT) ulFromVal (lval) - + (TYPE_TARGET_UINT) ulFromVal (rval); + else + SPEC_CVAL (val->type).v_int = (TYPE_TARGET_INT) ulFromVal (lval) - + (TYPE_TARGET_INT) ulFromVal (rval); + } + return cheapestVal (val); +} + +/*------------------------------------------------------------------*/ +/* valShift - Shift left or right */ +/*------------------------------------------------------------------*/ +value * +valShift (value * lval, value * rval, int lr) +{ + value *val; + + /* create a new value */ + val = newValue(); + val->type = val->etype = computeType (lval->etype, + NULL, + RESULT_TYPE_INT, + 'S'); + SPEC_SCLS (val->etype) = S_LITERAL; /* will remain literal */ + + if (getSize (val->type) * 8 <= (TYPE_TARGET_ULONG) ulFromVal (rval) && + /* left shift */ + (lr || + /* right shift and unsigned */ + (!lr && SPEC_USIGN (rval->type)))) + { + werror (W_SHIFT_CHANGED, (lr ? "left" : "right")); + } + + if (SPEC_LONG (val->type)) + { + if (SPEC_USIGN (val->type)) + { + SPEC_CVAL (val->type).v_ulong = lr ? + (TYPE_TARGET_ULONG) ulFromVal (lval) << (TYPE_TARGET_ULONG) ulFromVal (rval) : \ + (TYPE_TARGET_ULONG) ulFromVal (lval) >> (TYPE_TARGET_ULONG) ulFromVal (rval); + } + else + { + SPEC_CVAL (val->type).v_long = lr ? + (TYPE_TARGET_LONG) ulFromVal (lval) << (TYPE_TARGET_ULONG) ulFromVal (rval) : \ + (TYPE_TARGET_LONG) ulFromVal (lval) >> (TYPE_TARGET_ULONG) ulFromVal (rval); + } + } + else + { + if (SPEC_USIGN (val->type)) + { + SPEC_CVAL (val->type).v_uint = lr ? + (TYPE_TARGET_UINT) ulFromVal (lval) << (TYPE_TARGET_ULONG) ulFromVal (rval) : \ + (TYPE_TARGET_UINT) ulFromVal (lval) >> (TYPE_TARGET_ULONG) ulFromVal (rval); + } + else + { + SPEC_CVAL (val->type).v_int = lr ? + (TYPE_TARGET_INT) ulFromVal (lval) << (TYPE_TARGET_ULONG) ulFromVal (rval) : \ + (TYPE_TARGET_INT) ulFromVal (lval) >> (TYPE_TARGET_ULONG) ulFromVal (rval); + } + } + return cheapestVal (val); +} + +/*------------------------------------------------------------------*/ +/* valCompare- Compares two literal */ +/*------------------------------------------------------------------*/ +value * +valCompare (value * lval, value * rval, int ctype) +{ + value *val; + + /* create a new value */ + val = newValue (); + val->type = val->etype = newCharLink (); + val->type->class = SPECIFIER; + SPEC_NOUN (val->type) = V_CHAR; /* type is char */ + SPEC_USIGN (val->type) = 1; + SPEC_SCLS (val->type) = S_LITERAL; /* will remain literal */ + + switch (ctype) + { + case '<': + SPEC_CVAL (val->type).v_int = floatFromVal (lval) < floatFromVal (rval); + break; + + case '>': + SPEC_CVAL (val->type).v_int = floatFromVal (lval) > floatFromVal (rval); + break; + + case LE_OP: + SPEC_CVAL (val->type).v_int = floatFromVal (lval) <= floatFromVal (rval); + break; + + case GE_OP: + SPEC_CVAL (val->type).v_int = floatFromVal (lval) >= floatFromVal (rval); + break; + + case EQ_OP: + if (SPEC_NOUN(lval->type) == V_FLOAT || + SPEC_NOUN(rval->type) == V_FLOAT) + { + SPEC_CVAL (val->type).v_int = floatFromVal (lval) == floatFromVal (rval); + } + else + if (SPEC_NOUN(lval->type) == V_FIXED16X16 || + SPEC_NOUN(rval->type) == V_FIXED16X16) + { + SPEC_CVAL (val->type).v_int = floatFromVal (lval) == floatFromVal (rval); + } + else + { + /* integrals: ignore signedness */ + TYPE_TARGET_ULONG l, r; + + l = (TYPE_TARGET_ULONG) ulFromVal (lval); + r = (TYPE_TARGET_ULONG) ulFromVal (rval); + /* In order to correctly compare 'signed int' and 'unsigned int' it's + neccessary to strip them to 16 bit. + Literals are reduced to their cheapest type, therefore left and + right might have different types. It's neccessary to find a + common type: int (used for char too) or long */ + if (!IS_LONG (lval->etype) && + !IS_LONG (rval->etype)) + { + r = (TYPE_TARGET_UINT) r; + l = (TYPE_TARGET_UINT) l; + } + SPEC_CVAL (val->type).v_int = l == r; + } + break; + case NE_OP: + if (SPEC_NOUN(lval->type) == V_FLOAT || + SPEC_NOUN(rval->type) == V_FLOAT) + { + SPEC_CVAL (val->type).v_int = floatFromVal (lval) != floatFromVal (rval); + } + else + if (SPEC_NOUN(lval->type) == V_FIXED16X16 || + SPEC_NOUN(rval->type) == V_FIXED16X16) + { + SPEC_CVAL (val->type).v_int = floatFromVal (lval) != floatFromVal (rval); + } + else + { + /* integrals: ignore signedness */ + TYPE_TARGET_ULONG l, r; + + l = (TYPE_TARGET_ULONG) ulFromVal (lval); + r = (TYPE_TARGET_ULONG) ulFromVal (rval); + /* In order to correctly compare 'signed int' and 'unsigned int' it's + neccessary to strip them to 16 bit. + Literals are reduced to their cheapest type, therefore left and + right might have different types. It's neccessary to find a + common type: int (used for char too) or long */ + if (!IS_LONG (lval->etype) && + !IS_LONG (rval->etype)) + { + r = (TYPE_TARGET_UINT) r; + l = (TYPE_TARGET_UINT) l; + } + SPEC_CVAL (val->type).v_int = l != r; + } + break; + + } + + return val; +} + +/*------------------------------------------------------------------*/ +/* valBitwise - Bitwise operation */ +/*------------------------------------------------------------------*/ +value * +valBitwise (value * lval, value * rval, int op) +{ + value *val; + + /* create a new value */ + val = newValue (); + val->type = computeType (lval->etype, rval->etype, RESULT_TYPE_CHAR, op); + val->etype = getSpec (val->type); + SPEC_SCLS (val->etype) = S_LITERAL; + + switch (op) + { + case '&': + if (SPEC_LONG (val->type)) + { + if (SPEC_USIGN (val->type)) + SPEC_CVAL (val->type).v_ulong = (TYPE_TARGET_ULONG) ulFromVal (lval) & + (TYPE_TARGET_ULONG) ulFromVal (rval); + else + SPEC_CVAL (val->type).v_long = (TYPE_TARGET_LONG) ulFromVal (lval) & + (TYPE_TARGET_LONG) ulFromVal (rval); + } + else + { + if (SPEC_USIGN (val->type)) + SPEC_CVAL (val->type).v_uint = (TYPE_TARGET_UINT) ulFromVal (lval) & + (TYPE_TARGET_UINT) ulFromVal (rval); + else + SPEC_CVAL (val->type).v_int = (TYPE_TARGET_INT) ulFromVal (lval) & + (TYPE_TARGET_INT) ulFromVal (rval); + } + break; + + case '|': + if (SPEC_LONG (val->type)) + { + if (SPEC_USIGN (val->type)) + SPEC_CVAL (val->type).v_ulong = (TYPE_TARGET_ULONG) ulFromVal (lval) | + (TYPE_TARGET_ULONG) ulFromVal (rval); + else + SPEC_CVAL (val->type).v_long = (TYPE_TARGET_LONG) ulFromVal (lval) | + (TYPE_TARGET_LONG) ulFromVal (rval); + } + else + { + if (SPEC_USIGN (val->type)) + SPEC_CVAL (val->type).v_uint = (TYPE_TARGET_UINT) ulFromVal (lval) | + (TYPE_TARGET_UINT) ulFromVal (rval); + else + SPEC_CVAL (val->type).v_int = + (TYPE_TARGET_INT) ulFromVal (lval) | (TYPE_TARGET_INT) ulFromVal (rval); + } + + break; + + case '^': + if (SPEC_LONG (val->type)) + { + if (SPEC_USIGN (val->type)) + SPEC_CVAL (val->type).v_ulong = (TYPE_TARGET_ULONG) ulFromVal (lval) ^ + (TYPE_TARGET_ULONG) ulFromVal (rval); + else + SPEC_CVAL (val->type).v_long = (TYPE_TARGET_LONG) ulFromVal (lval) ^ + (TYPE_TARGET_LONG) ulFromVal (rval); + } + else + { + if (SPEC_USIGN (val->type)) + SPEC_CVAL (val->type).v_uint = (TYPE_TARGET_UINT) ulFromVal (lval) ^ + (TYPE_TARGET_UINT) ulFromVal (rval); + else + SPEC_CVAL (val->type).v_int = + (TYPE_TARGET_INT) ulFromVal (lval) ^ (TYPE_TARGET_INT) ulFromVal (rval); + } + break; + } + + return cheapestVal(val); +} + +/*------------------------------------------------------------------*/ +/* valAndOr - Generates code for and / or operation */ +/*------------------------------------------------------------------*/ +value * +valLogicAndOr (value * lval, value * rval, int op) +{ + value *val; + + /* create a new value */ + val = newValue (); + val->type = val->etype = newCharLink (); + val->type->class = SPECIFIER; + SPEC_SCLS (val->type) = S_LITERAL; /* will remain literal */ + SPEC_USIGN (val->type) = 1; + + switch (op) + { + case AND_OP: + SPEC_CVAL (val->type).v_int = floatFromVal (lval) && floatFromVal (rval); + break; + + case OR_OP: + SPEC_CVAL (val->type).v_int = floatFromVal (lval) || floatFromVal (rval); + break; + } + + + return val; +} + +/*------------------------------------------------------------------*/ +/* valCastLiteral - casts a literal value to another type */ +/*------------------------------------------------------------------*/ +value * +valCastLiteral (sym_link * dtype, double fval) +{ + value *val; + unsigned long l = double2ul (fval); + + if (!dtype) + return NULL; + + val = newValue (); + if (dtype) + val->etype = getSpec (val->type = copyLinkChain (dtype)); + else + { + val->etype = val->type = newLink (SPECIFIER); + SPEC_NOUN (val->etype) = V_VOID; + } + SPEC_SCLS (val->etype) = S_LITERAL; + + /* if it is not a specifier then we can assume that */ + /* it will be an unsigned long */ + if (!IS_SPEC (val->type)) + { + SPEC_CVAL (val->etype).v_ulong = (TYPE_TARGET_ULONG) l; + return val; + } + + switch (SPEC_NOUN (val->etype)) + { + case V_FLOAT: + SPEC_CVAL (val->etype).v_float = fval; + break; + + case V_FIXED16X16: + SPEC_CVAL (val->etype).v_fixed16x16 = fixed16x16FromDouble (fval); + break; + + case V_BIT: + case V_SBIT: + SPEC_CVAL (val->etype).v_uint = fval ? 1 : 0; + break; + + case V_BITFIELD: + l &= (0xffffffffu >> (32 - SPEC_BLEN (val->etype))); + if (SPEC_USIGN (val->etype)) + SPEC_CVAL (val->etype).v_uint = (TYPE_TARGET_UINT) l; + else + SPEC_CVAL (val->etype).v_int = (TYPE_TARGET_INT) l; + break; + + case V_CHAR: + if (SPEC_USIGN (val->etype)) + SPEC_CVAL (val->etype).v_uint = (TYPE_TARGET_UCHAR) l; + else + SPEC_CVAL (val->etype).v_int = (TYPE_TARGET_CHAR) l; + break; + + default: + if (SPEC_LONG (val->etype)) + { + if (SPEC_USIGN (val->etype)) + SPEC_CVAL (val->etype).v_ulong = (TYPE_TARGET_ULONG) l; + else + SPEC_CVAL (val->etype).v_long = (TYPE_TARGET_LONG) l; + } + else + { + if (SPEC_USIGN (val->etype)) + SPEC_CVAL (val->etype).v_uint = (TYPE_TARGET_UINT) l; + else + SPEC_CVAL (val->etype).v_int = (TYPE_TARGET_INT) l; + } + } + + return val; +} + +/*------------------------------------------------------------------*/ +/* getNelements - determines # of elements from init list */ +/*------------------------------------------------------------------*/ +int +getNelements (sym_link * type, initList * ilist) +{ + int i; + + if (!ilist) + return 0; + + if (ilist->type == INIT_DEEP) + ilist = ilist->init.deep; + + /* if type is a character array and there is only one + (string) initialiser then get the length of the string */ + if (IS_ARRAY (type) && IS_CHAR (type->next) && !ilist->next) + { + ast *iast = ilist->init.node; + value *v = (iast->type == EX_VALUE ? iast->opval.val : NULL); + if (!v) + { + werror (E_CONST_EXPECTED); + return 0; + } + + if (IS_ARRAY (v->type) && IS_CHAR (v->etype)) + /* yep, it's a string */ + { + return DCL_ELEM (v->type); + } + } + + i = 0; + while (ilist) + { + i++; + ilist = ilist->next; + } + return i; +} + +/*-----------------------------------------------------------------*/ +/* valForArray - returns a value with name of array index */ +/*-----------------------------------------------------------------*/ +value * +valForArray (ast * arrExpr) +{ + value *val, *lval = NULL; + char buffer[128]; + int size = getSize (arrExpr->left->ftype->next); + /* if the right or left is an array + resolve it first */ + if (IS_AST_OP (arrExpr->left)) + { + if (arrExpr->left->opval.op == '[') + lval = valForArray (arrExpr->left); + else if (arrExpr->left->opval.op == '.') + lval = valForStructElem (arrExpr->left->left, + arrExpr->left->right); + else if (arrExpr->left->opval.op == PTR_OP && + IS_ADDRESS_OF_OP (arrExpr->left->left)) + lval = valForStructElem (arrExpr->left->left->left, + arrExpr->left->right); + else + return NULL; + + } + else if (!IS_AST_SYM_VALUE (arrExpr->left)) + return NULL; + + if (!IS_AST_LIT_VALUE (arrExpr->right)) + return NULL; + + val = newValue (); + if (!lval) + { + SNPRINTF (buffer, sizeof(buffer), "%s", AST_SYMBOL (arrExpr->left)->rname); + } + else + { + SNPRINTF (buffer, sizeof(buffer), "%s", lval->name); + } + + SNPRINTF (val->name, sizeof(val->name), "(%s + %d)", buffer, + AST_ULONG_VALUE (arrExpr->right) * size); + + val->type = newLink (DECLARATOR); + if (SPEC_SCLS (arrExpr->left->etype) == S_CODE) + DCL_TYPE (val->type) = CPOINTER; + else if (SPEC_SCLS (arrExpr->left->etype) == S_XDATA) + DCL_TYPE (val->type) = FPOINTER; + else if (SPEC_SCLS (arrExpr->left->etype) == S_XSTACK) + DCL_TYPE (val->type) = PPOINTER; + else if (SPEC_SCLS (arrExpr->left->etype) == S_IDATA) + DCL_TYPE (val->type) = IPOINTER; + else if (SPEC_SCLS (arrExpr->left->etype) == S_EEPROM) + DCL_TYPE (val->type) = EEPPOINTER; + else + DCL_TYPE (val->type) = POINTER; + val->type->next = arrExpr->left->ftype->next; + val->etype = getSpec (val->type); + return val; +} + +/*-----------------------------------------------------------------*/ +/* valForStructElem - returns value with name of struct element */ +/*-----------------------------------------------------------------*/ +value * +valForStructElem (ast * structT, ast * elemT) +{ + value *val, *lval = NULL; + char buffer[128]; + symbol *sym; + + /* left could be furthur derefed */ + if (IS_AST_OP (structT)) + { + if (structT->opval.op == '[') + lval = valForArray (structT); + else if (structT->opval.op == '.') + lval = valForStructElem (structT->left, structT->right); + else if (structT->opval.op == PTR_OP && + IS_ADDRESS_OF_OP (structT->left)) + lval = valForStructElem (structT->left->left, + structT->right); + else + return NULL; + } + + if (!IS_AST_SYM_VALUE (elemT)) + return NULL; + + if (!IS_STRUCT (structT->etype)) + return NULL; + + if ((sym = getStructElement (SPEC_STRUCT (structT->etype), + AST_SYMBOL (elemT))) == NULL) + { + return NULL; + } + + val = newValue (); + if (!lval) + { + SNPRINTF(buffer, sizeof(buffer), "%s", AST_SYMBOL (structT)->rname); + } + else + { + SNPRINTF (buffer, sizeof(buffer), "%s", lval->name); + } + + SNPRINTF (val->name, sizeof(val->name), "(%s + %d)", buffer, + (int) sym->offset); + + val->type = newLink (DECLARATOR); + if (SPEC_SCLS (structT->etype) == S_CODE) + DCL_TYPE (val->type) = CPOINTER; + else if (SPEC_SCLS (structT->etype) == S_XDATA) + DCL_TYPE (val->type) = FPOINTER; + else if (SPEC_SCLS (structT->etype) == S_XSTACK) + DCL_TYPE (val->type) = PPOINTER; + else if (SPEC_SCLS (structT->etype) == S_IDATA) + DCL_TYPE (val->type) = IPOINTER; + else if (SPEC_SCLS (structT->etype) == S_EEPROM) + DCL_TYPE (val->type) = EEPPOINTER; + else + DCL_TYPE (val->type) = POINTER; + val->type->next = sym->type; + val->etype = getSpec (val->type); + return val; +} + +/*-----------------------------------------------------------------*/ +/* valForCastAggr - will return value for a cast of an aggregate */ +/* plus minus a constant */ +/*-----------------------------------------------------------------*/ +value * +valForCastAggr (ast * aexpr, sym_link * type, ast * cnst, int op) +{ + value *val; + + if (!IS_AST_SYM_VALUE (aexpr)) + return NULL; + if (!IS_AST_LIT_VALUE (cnst)) + return NULL; + + val = newValue (); + + SNPRINTF (val->name, sizeof(val->name), "(%s %c %d)", + AST_SYMBOL (aexpr)->rname, op, + getSize (type->next) * AST_ULONG_VALUE (cnst)); + + val->type = type; + val->etype = getSpec (val->type); + return val; +} + +/*-----------------------------------------------------------------*/ +/* valForCastAggr - will return value for a cast of an aggregate */ +/* with no constant */ +/*-----------------------------------------------------------------*/ +value * +valForCastArr (ast * aexpr, sym_link * type) +{ + value *val; + + if (!IS_AST_SYM_VALUE (aexpr)) + return NULL; + + val = newValue (); + + SNPRINTF (val->name, sizeof(val->name), "(%s)", + AST_SYMBOL (aexpr)->rname); + + val->type = type; + val->etype = getSpec (val->type); + return val; +} diff --git a/src/SDCCval.h b/src/SDCCval.h new file mode 100644 index 0000000..6121783 --- /dev/null +++ b/src/SDCCval.h @@ -0,0 +1,150 @@ +/*---------------------------------------------------------------------- + SDCCval.h - value wrapper related header information + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1997) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#ifndef SDCCVAL_H +#define SDCCVAL_H + +#include "SDCCsymt.h" + + +/* double to unsigned long conversion */ +/* + * See ISO/IEC 9899, chapter 6.3.1.4 Real floating and integer: + * If the value of the integral part cannot be represented by the integer type, the behavior is undefined. + * This shows up on Mac OS X i386 platform which useus SSE unit instead of the x87 FPU for floating-point operations + */ +/* + * on Mac OS X ppc (long) 2147483648.0 equals to 2147483647, so we explicitely convert it to 0x80000000 + * on other known platforms (long) 2147483648.0 equals to -2147483648 + */ +#define double2ul(val) (((val) < 0) ? (((val) < -2147483647.0) ? 0x80000000UL : (unsigned long) -((long) -(val))) : (unsigned long) (val)) + +/* value wrapper */ +typedef struct value + { + char name[SDCC_NAME_MAX + 1]; /* operand accessing this value */ + sym_link *type; /* start of type chain */ + sym_link *etype; /* end of type chain */ + symbol *sym; /* Original Symbol */ + struct value *next; /* used in initializer list */ + unsigned vArgs:1; /* arg list ended with variable arg */ + } +value; + +typedef struct literalList +{ + double literalValue; + unsigned count; + struct literalList *next; +} literalList; + +enum + { + INIT_NODE, + INIT_DEEP, + INIT_HOLE + }; + +/* initializer lists use this structure */ +typedef struct initList + { + int type; + int lineno; + char *filename; + union + { + struct ast *node; + struct initList *deep; + } + init; + + struct initList *next; + } +initList; + +/* return values from checkConstantRange */ +typedef enum + { + CCR_OK, /* evaluate at runtime */ + CCR_OVL, + CCR_ALWAYS_FALSE, + CCR_ALWAYS_TRUE + } +CCR_RESULT; + +#define IS_VARG(x) (x->vArgs) + +/* forward definitions for the symbol table related functions */ +value *newValue (void); +value *constVal (const char *); +value *constCharVal (unsigned char); +value *reverseVal (value *); +value *reverseValWithType (value *); +value *copyValue (value *); +value *copyValueChain (value *); +value *strVal (const char *); +value *charVal (const char *); +value *symbolVal (symbol *); +void printVal (value *); +double floatFromVal (value *); +unsigned long ulFromVal (value *); + +/* convert a fixed16x16 type to double */ +double doubleFromFixed16x16(TYPE_TARGET_ULONG value); + +/* convert a double type to fixed16x16 */ +TYPE_TARGET_ULONG fixed16x16FromDouble(double value); + +CCR_RESULT checkConstantRange (sym_link *var, sym_link *lit, int op, bool exchangeOps); +value *array2Ptr (value *); +value *valUnaryPM (value *); +value *valComplement (value *); +value *valNot (value *); +value *valMult (value *, value *); +value *valDiv (value *, value *); +value *valMod (value *, value *); +value *valPlus (value *, value *); +value *valMinus (value *, value *); +value *valShift (value *, value *, int); +value *valCompare (value *, value *, int); +value *valBitwise (value *, value *, int); +value *valLogicAndOr (value *, value *, int); +value *valCastLiteral (sym_link *, double); +value *valueFromLit (double); +initList *newiList (int, void *); +initList *revinit (initList *); +initList *copyIlist (initList *); +double list2int (initList *); +value *list2val (initList *); +struct ast *list2expr (initList *); +void resolveIvalSym (initList *, sym_link *); +value *valFromType (sym_link *); +value *constFloatVal (const char *); +value *constFixed16x16Val (const char *); +int getNelements (sym_link *, initList *); +value *valForArray (struct ast *); +value *valForStructElem (struct ast *, struct ast *); +value *valForCastAggr (struct ast *, sym_link *, struct ast *, int); +value *valForCastArr (struct ast * , sym_link *); +bool convertIListToConstList(initList *src, literalList **lList, int size); +literalList *copyLiteralList(literalList *src); +#endif diff --git a/src/altlex.c b/src/altlex.c new file mode 100644 index 0000000..5253224 --- /dev/null +++ b/src/altlex.c @@ -0,0 +1,1219 @@ +/** @file altlex.c + An alternate lexer to SDCC.lex. + In development - ie messy and just plain wrong. + Inspired by the gcc lexer, c-lex.c. +*/ +#include "common.h" +#include "reswords.h" +#include + +#define DUMP_OUTPUT 0 + +/* Right. What are the parts of the C stream? From SDCC.lex: + D = [0..9] digits + L = [a..z A..Z _] alphanumerics and _ + H = [a..f A..F 0-9] Hex digits + E = [eE+-0-9] Digits in a float + FS = [fFlL] Specifiers for a float + IS = [uUlL] Specifiers for a int + + L[LD]* A 'token' - cant think of a good name + Check tokens against the reserved words. + If match + return the token id. + else + If in the typedef table, do stuff... + Blah. See check_type() + 0[xX]{H}+ Hex number - PENDING: specifiers + 0{D}+ Octal number - PENDING: specifiers + {D}+ Decimal - PENDING: specifiers + Floats PENDING + + Exceptions: + Comment start Strip until end of comment. + ... Ellipses + + So the inputs are: + Skip whitespace + switch class + L Try to read a token + D Try to read a number + Punct Try to read punct + */ + +extern int fatalError; +extern int lineno; +extern char *filename; + +FILE *yyin; + +int mylineno; +char *currFname; +char *yytext; + +static char linebuf[10000]; +static int linepos, linelen; +static int end_of_file; + +#ifdef __GNUC__ +#define INLINE inline +#else +#define INLINE +#endif + +#define ERRSINK stderr + +static void +error (const char *sz,...) +{ + va_list ap; + fatalError++; + + if (filename && lineno) + { + fprintf (ERRSINK, "%s(%d):", filename, lineno); + } + fprintf (ERRSINK, "error *** "); + va_start (ap, sz); + vfprintf (ERRSINK, sz, ap); + va_end (ap); + fprintf (ERRSINK, "\n"); + fflush (ERRSINK); +} + +static int +underflow (void) +{ + linelen = fread (linebuf, 1, sizeof (linebuf), yyin); + if (linelen <= 0) + return EOF; + linepos = 0; + return linebuf[linepos++]; +} + +static int INLINE +ygetc (void) +{ + if (linepos < linelen) + return linebuf[linepos++]; + else + return underflow (); +}; + +static int INLINE +yungetc (int c) +{ + linebuf[--linepos] = c; + return 0; +} + +#define GETC() ygetc() +#define UNGETC(_a) yungetc(_a) + +//#define GETC() fgetc(yyin); +//#define UNGETC(_a) ungetc(_a, yyin) +#define ISL(_a) (isalnum(_a) || _a == '_') +#define ISALNUM(_a) isalnum(_a) +#define ISHEX(_a) isxdigit(_a) + +static char * +stringLiteral (void) +{ + static char line[1000]; + int ch; + char *str = line; + + *str++ = '\"'; + /* put into the buffer till we hit the */ + /* first \" */ + while (1) + { + + ch = GETC (); + if (!ch) + break; /* end of input */ + /* if it is a \ then everything allowed */ + if (ch == '\\') + { + *str++ = ch; /* backslash in place */ + *str++ = GETC (); /* following char in place */ + continue; /* carry on */ + } + + /* if new line we have a new line break */ + if (ch == '\n') + break; + + /* if this is a quote then we have work to do */ + /* find the next non whitespace character */ + /* if that is a double quote then carry on */ + if (ch == '\"') + { + + while ((ch = GETC ()) && isspace (ch)); + if (!ch) + break; + if (ch != '\"') + { + UNGETC (ch); + break; + } + + continue; + } + *str++ = ch; + } + *str++ = '\"'; + *str = '\0'; + return line; +} + +static void +discard_comments (int type) +{ + int c; + if (type == '*') + { + do + { + c = GETC (); + if (c == '*') + { + c = GETC (); + if (c == '/') + return; + } + else if (c == EOF) + return; + } + while (1); + } + else if (type == '/') + { + do + { + c = GETC (); + } + while (c != '\n' && c != EOF); + } + else + { + assert (0); + } +} + +/* will return 1 if the string is a part + of a target specific keyword */ +static INLINE int +isTargetKeyword (const char *s) +{ + int i; + + if (port->keywords == NULL) + return 0; + for (i = 0; port->keywords[i]; i++) + { + if (strcmp (port->keywords[i], s) == 0) + return 1; + } + + return 0; +} + +static INLINE int +check_token (const char *sz) +{ + const struct reserved_words *p; + p = is_reserved_word (sz, strlen (sz)); + if (p) + { + if (!p->is_special || isTargetKeyword (sz)) + return p->token; + } + + /* check if it is in the typedef table */ + if (findSym (TypedefTab, NULL, sz)) + { + strncpyz (yylval.yychar, sz, sizeof(yylval.yychar)); + return TYPE_NAME; + } + else + { + strncpyz (yylval.yychar, sz, sizeof(yylval.yychar)); + return IDENTIFIER; + } +} + +static void +handle_pragma (void) +{ + char line[128], *p; + int c; + + c = GETC (); + while (c == '\t' || c == ' ') + c = GETC (); + p = line; + while (!isspace (c)) + { + *p++ = c; + c = GETC (); + } + *p = '\0'; + if (line[0] == '\0') + error ("Missing argument to pragma"); + else + { + /* First give the port a chance */ + if (port->process_pragma && !port->process_pragma (line)) + return; + /* PENDING: all the SDCC shared pragmas */ + /* Nothing handled it */ + error ("Unrecognised #pragma %s", line); + } +} + +static void +handle_line (void) +{ + int c; + char line[128], *p; + + c = GETC (); + while (c == '\t' || c == ' ') + c = GETC (); + p = line; + while (isdigit (c)) + { + *p++ = c; + c = GETC (); + } + *p = '\0'; + if (line[0] == '\0') + error ("Error in number in #line"); + /* This is weird but cpp seems to add an extra three to the line no */ + mylineno = atoi (line) - 3; + lineno = mylineno; + /* Fetch the filename if there is one */ + while (c == '\t' || c == ' ') + c = GETC (); + if (c == '\"') + { + p = line; + c = GETC (); + while (c != '\"' && c != EOF && c != '\n') + { + *p++ = c; + c = GETC (); + } + if (c == '\"') + { + *p = '\0'; + currFname = Safe_strdup (line); + } + filename = currFname; + } +} + +static INLINE void +invalid_directive (void) +{ + error ("Invalid directive"); +} + +static INLINE int +check_newline (void) +{ + int c; + mylineno++; + lineno = mylineno; + + /* Skip any leading white space */ + c = GETC (); + while (c == '\t' || c == ' ') + c = GETC (); + /* Were only interested in #something */ + if (c != '#') + return c; + c = GETC (); + while (c == '\t' || c == ' ') + c = GETC (); + /* The text in the stream is the type of directive */ + switch (c) + { + case 'l': + /* Start of line? */ + if (GETC () == 'i' && GETC () == 'n' && GETC () == 'e') + { + c = GETC (); + if (c == '\t' || c == ' ') + handle_line (); + else + invalid_directive (); + } + else + invalid_directive (); + break; + case 'p': + /* Start of pragma? */ + if (GETC () == 'r' && GETC () == 'a' && GETC () == 'g' && + GETC () == 'm' && GETC () == 'a') + { + c = GETC (); + if (c == '\t' || c == ' ') + handle_pragma (); + else + invalid_directive (); + } + else + invalid_directive (); + break; + default: + invalid_directive (); + } + /* Discard from here until the start of the next line */ + while (c != '\n' && c != EOF) + c = GETC (); + return c; +} + +static int +skip_whitespace (int c) +{ + while (1) + { + switch (c) + { + case ' ': + case '\t': + case '\f': + case '\v': + case '\b': + case '\r': + c = GETC (); + break; + case '\n': + c = check_newline (); + default: + return c; + } + } +} + +void +yyerror (const char *s) +{ + if (end_of_file) + error ("%s at end of of input", s); + else if (yytext[0] == '\0') + error ("%s at null character", s); + else if (yytext[0] == '"') + error ("%s before string constant", s); + else if (yytext[0] == '\'') + error ("%s before character constant", s); + else + error ("%s before %s", s, yytext); +} + +static int +_yylex (void) +{ + int c; + static char line[128]; + char *p; + + yytext = line; + + c = GETC (); + while (1) + { + switch (c) + { + case ' ': + case '\t': + case '\f': + case '\v': + case '\b': + /* Skip whitespace */ + c = GETC (); + break; + case '\r': + case '\n': + c = skip_whitespace (c); + break; + case '#': + UNGETC (c); + c = check_newline (); + break; + default: + goto past_ws; + } + } + +past_ws: + /* Handle comments first */ + if (c == '/') + { + int c2 = GETC (); + if (c2 == '*' || c2 == '/') + { + discard_comments (c2); + c = GETC (); + } + else + UNGETC (c2); + } + switch (c) + { + case EOF: + end_of_file = TRUE; + line[0] = '\0'; + return 0; + case 'a': + case 'b': + case 'c': + case 'd': + case 'e': + case 'f': + case 'g': + case 'h': + case 'i': + case 'j': + case 'k': + case 'l': + case 'm': + case 'n': + case 'o': + case 'p': + case 'q': + case 'r': + case 's': + case 't': + case 'u': + case 'v': + case 'w': + case 'x': + case 'y': + case 'z': + case 'A': + case 'B': + case 'C': + case 'D': + case 'E': + case 'F': + case 'G': + case 'H': + case 'I': + case 'J': + case 'K': + case 'L': + case 'M': + case 'N': + case 'O': + case 'P': + case 'Q': + case 'R': + case 'S': + case 'T': + case 'U': + case 'V': + case 'W': + case 'X': + case 'Y': + case 'Z': + case '_': + /* Start of a token. Parse. */ + p = line; + *p++ = c; + c = GETC (); + while (ISL (c)) + { + *p++ = c; + c = GETC (); + } + *p = '\0'; + UNGETC (c); + return check_token (line); + case '0': + case '1': + case '2': + case '3': + case '4': + case '5': + case '6': + case '7': + case '8': + case '9': + p = line; + *p++ = c; + c = GETC (); + if (c == 'x' || c == 'X') + { + *p++ = c; + c = GETC (); + } + while (ISHEX (c)) + { + *p++ = c; + c = GETC (); + } + if (c == 'U' || c == 'u' || c == 'L' || c == 'l') + { + *p++ = c; + c = GETC (); + } + if (c == 'U' || c == 'u' || c == 'L' || c == 'l') + { + *p++ = c; + c = GETC (); + } + *p = '\0'; + UNGETC (c); + yylval.val = constVal (line); + return CONSTANT; + case '\"': + /* A string */ + p = stringLiteral (); + yylval.val = strVal (p); + return (STRING_LITERAL); + case '\'': + /* Possible formats: + ['\n', '\\', '\'', '\"'...] + ['a'...] + */ + p = line; + *p++ = c; + c = GETC (); + if (c == '\\') + { + *p++ = c; + c = GETC (); + /* Fall through */ + } + *p++ = c; + c = GETC (); + *p++ = c; + *p = '\0'; + if (c != '\'') + { + error ("Unrecognised character constant %s", line); + } + yylval.val = charVal (line); + return CONSTANT; + case '=': + case '&': + case '!': + case '-': + case '+': + case '*': + case '/': + case '%': + case '<': + case '>': + case '^': + case '|': + { + /* Cases which can be compounds */ + /* The types and classes of composites are: + >>= <<= + += -= *= /= %= &= ^= |= + >> << ++ -- + && || + <= >= == != + -> + So a composite started by char 'x' can be: + 1. Followed by itself then an equals + 2. Followed by itself + 3. Followed by an equals + 4. Be a '->' + 5. Be by itself + */ + int next = GETC (); + /* Class 1 and 2 */ + if (next == c) + { + next = GETC (); + /* Class 1 */ + if (next == '=') + { + switch (c) + { + case '>': // >>= + + yylval.yyint = RIGHT_ASSIGN; + return RIGHT_ASSIGN; + case '<': // <<= + + yylval.yyint = LEFT_ASSIGN; + return LEFT_ASSIGN; + default: + error ("Unrecognised token %c%c=", c, c); + } + } + else + { + /* Push the next char back on and find the class */ + UNGETC (next); + /* Case 2 */ + switch (c) + { + case '>': // >> + + return RIGHT_OP; + case '<': // << + + return LEFT_OP; + case '+': + return INC_OP; + case '-': + return DEC_OP; + case '&': + return AND_OP; + case '|': + return OR_OP; + case '=': + return EQ_OP; + default: + error ("Unrecognised token %c%c", c, c); + } + } + } + /* Case 3 */ + else if (next == '=') + { + int result = 0; + switch (c) + { + case '+': + result = ADD_ASSIGN; + break; + case '-': + result = SUB_ASSIGN; + break; + case '*': + result = MUL_ASSIGN; + break; + case '/': + result = DIV_ASSIGN; + break; + case '%': + result = MOD_ASSIGN; + break; + case '&': + result = AND_ASSIGN; + break; + case '^': + result = XOR_ASSIGN; + break; + case '|': + result = OR_ASSIGN; + break; + case '<': + result = LE_OP; + break; + case '>': + result = GE_OP; + break; + case '!': + result = NE_OP; + break; + default: + error ("Unrecognised token %c=", c); + } + if (result) + { + yylval.yyint = result; + return result; + } + } + /* Case 4 */ + else if (c == '-' && next == '>') + { + return PTR_OP; + } + /* Case 5 */ + else + { + UNGETC (next); + return c; + } + break; + } + case '{': + NestLevel++; + return c; + case '}': + NestLevel--; + return c; + case '.': + c = GETC (); + if (c == '.') + { + c = GETC (); + if (c == '.') + { + return VAR_ARGS; + } + } + UNGETC (c); + return '.'; + case '[': + case ']': + return c; + case ',': + case ':': + case '(': + case ')': + case '~': + case '?': + case ';': + /* Special characters that cant be part of a composite */ + return c; + default: + error ("Unhandled character %c", c); + } + return 0; +} + +#define ENTRY(_a) case (_a): printf(#_a); break; + +int +yylex (void) +{ + int ret = _yylex (); +#if DUMP_OUTPUT + static int lastpos = 0; + char tmp; + + printf ("Returning "); + switch (ret) + { + /* Wrapper */ + ENTRY (IDENTIFIER); + ENTRY (TYPE_NAME); + ENTRY (CONSTANT); + ENTRY (STRING_LITERAL); + ENTRY (SIZEOF); + ENTRY (PTR_OP); + ENTRY (INC_OP); + ENTRY (DEC_OP); + ENTRY (LEFT_OP); + ENTRY (RIGHT_OP); + ENTRY (LE_OP); + ENTRY (GE_OP); + ENTRY (EQ_OP); + ENTRY (NE_OP); + ENTRY (AND_OP); + ENTRY (OR_OP); + ENTRY (MUL_ASSIGN); + ENTRY (DIV_ASSIGN); + ENTRY (MOD_ASSIGN); + ENTRY (ADD_ASSIGN); + ENTRY (SUB_ASSIGN); + ENTRY (LEFT_ASSIGN); + ENTRY (RIGHT_ASSIGN); + ENTRY (AND_ASSIGN); + ENTRY (XOR_ASSIGN); + ENTRY (OR_ASSIGN); + ENTRY (TYPEDEF); + ENTRY (EXTERN); + ENTRY (STATIC); + ENTRY (AUTO); + ENTRY (REGISTER); + ENTRY (CODE); + ENTRY (EEPROM); + ENTRY (INTERRUPT); + ENTRY (SFR); + ENTRY (AT); + ENTRY (SBIT); + ENTRY (REENTRANT); + ENTRY (USING); + ENTRY (XDATA); + ENTRY (DATA); + ENTRY (IDATA); + ENTRY (PDATA); + ENTRY (VAR_ARGS); + ENTRY (CRITICAL); + ENTRY (NONBANKED); + ENTRY (BANKED); + ENTRY (CHAR); + ENTRY (SHORT); + ENTRY (INT); + ENTRY (LONG); + ENTRY (SIGNED); + ENTRY (UNSIGNED); + ENTRY (FLOAT); + ENTRY (FIXED16X16); + ENTRY (DOUBLE); + ENTRY (CONST); + ENTRY (VOLATILE); + ENTRY (VOID); + ENTRY (BIT); + ENTRY (STRUCT); + ENTRY (UNION); + ENTRY (ENUM); + ENTRY (ELIPSIS); + ENTRY (RANGE); + ENTRY (FAR); + ENTRY (_XDATA); + ENTRY (_CODE); + ENTRY (_GENERIC); + ENTRY (_NEAR); + ENTRY (_PDATA); + ENTRY (_IDATA); + ENTRY (_EEPROM); + ENTRY (CASE); + ENTRY (DEFAULT); + ENTRY (IF); + ENTRY (ELSE); + ENTRY (SWITCH); + ENTRY (WHILE); + ENTRY (DO); + ENTRY (FOR); + ENTRY (GOTO); + ENTRY (CONTINUE); + ENTRY (BREAK); + ENTRY (RETURN); + ENTRY (INLINEASM); + ENTRY (IFX); + ENTRY (ADDRESS_OF); + ENTRY (GET_VALUE_AT_ADDRESS); + ENTRY (SPIL); + ENTRY (UNSPIL); + ENTRY (GETHBIT); + ENTRY (BITWISEAND); + ENTRY (UNARYMINUS); + ENTRY (IPUSH); + ENTRY (IPOP); + ENTRY (PCALL); + ENTRY (ENDFUNCTION); + ENTRY (JUMPTABLE); + ENTRY (RRC); + ENTRY (RLC); + ENTRY (CAST); + ENTRY (CALL); + ENTRY (PARAM); + ENTRY (NULLOP); + ENTRY (BLOCK); + ENTRY (LABEL); + ENTRY (RECEIVE); + ENTRY (SEND); + default: + printf ("default: %c", ret); + } + tmp = linebuf[linepos]; + linebuf[linepos] = '\0'; + printf (" for %s (%u bytes)\n", linebuf + lastpos, linepos - lastpos); + linebuf[linepos] = tmp; + lastpos = linepos; + fflush (stdout); +#endif + return ret; +} + +#define TEST(_a) (_a) ? (void)0 : printf("Test %s failed\n", #_a); + +int +altlex_testparse (const char *input) +{ + /* Fiddle with the read-ahead buffer to insert ourselves */ + strncpyz (linebuf, input, sizeof(linebuf)); + linelen = strlen (linebuf) + 1; + linepos = 0; + + return yylex (); +} + +int +altlex_testchar (const char *input) +{ + value *val; + if (altlex_testparse (input) != CONSTANT) + return -2; + val = yylval.val; + if (val->type->class != SPECIFIER) + return -3; + if (SPEC_NOUN (val->type) != V_CHAR) + return -4; + if (SPEC_SCLS (val->type) != S_LITERAL) + return -5; + return SPEC_CVAL (val->type).v_int; +} + +int +altlex_testnum (const char *input) +{ + value *val; + if (altlex_testparse (input) != CONSTANT) + return -2; + val = yylval.val; + if (val->type->class != SPECIFIER) + return -3; + if (SPEC_NOUN (val->type) != V_INT) + return -4; + if (SPEC_SCLS (val->type) != S_LITERAL) + return -5; + if (SPEC_USIGN (val->type)) + return SPEC_CVAL (val->type).v_uint; + else + return SPEC_CVAL (val->type).v_int; +} + +int +altlex_runtests (void) +{ + /* These conditions are ripped directly from SDCC.lex */ + /* First check the parsing of the basic tokens */ + TEST (altlex_testparse (">>=") == RIGHT_ASSIGN); + TEST (altlex_testparse ("<<=") == LEFT_ASSIGN); + TEST (altlex_testparse ("+=") == ADD_ASSIGN); + TEST (altlex_testparse ("-=") == SUB_ASSIGN); + TEST (altlex_testparse ("*=") == MUL_ASSIGN); + TEST (altlex_testparse ("/=") == DIV_ASSIGN); + TEST (altlex_testparse ("%=") == MOD_ASSIGN); + TEST (altlex_testparse ("&=") == AND_ASSIGN); + TEST (altlex_testparse ("^=") == XOR_ASSIGN); + TEST (altlex_testparse ("|=") == OR_ASSIGN); + TEST (altlex_testparse (">>") == RIGHT_OP); + TEST (altlex_testparse ("<<") == LEFT_OP); + TEST (altlex_testparse ("++") == INC_OP); + TEST (altlex_testparse ("--") == DEC_OP); + TEST (altlex_testparse ("->") == PTR_OP); + TEST (altlex_testparse ("&&") == AND_OP); + TEST (altlex_testparse ("||") == OR_OP); + TEST (altlex_testparse ("<=") == LE_OP); + TEST (altlex_testparse (">=") == GE_OP); + TEST (altlex_testparse ("==") == EQ_OP); + TEST (altlex_testparse ("!=") == NE_OP); + TEST (altlex_testparse (";") == ';'); + TEST (altlex_testparse ("{") == '{'); + TEST (altlex_testparse ("}") == '}'); + TEST (altlex_testparse (",") == ','); + TEST (altlex_testparse (":") == ':'); + TEST (altlex_testparse ("=") == '='); + TEST (altlex_testparse ("(") == '('); + TEST (altlex_testparse (")") == ')'); + TEST (altlex_testparse ("[") == '['); + TEST (altlex_testparse ("]") == ']'); + TEST (altlex_testparse (".") == '.'); + TEST (altlex_testparse ("&") == '&'); + TEST (altlex_testparse ("!") == '!'); + TEST (altlex_testparse ("~") == '~'); + TEST (altlex_testparse ("-") == '-'); + TEST (altlex_testparse ("+") == '+'); + TEST (altlex_testparse ("*") == '*'); + TEST (altlex_testparse ("/") == '/'); + TEST (altlex_testparse ("%") == '%'); + TEST (altlex_testparse ("<") == '<'); + TEST (altlex_testparse (">") == '>'); + TEST (altlex_testparse ("^") == '^'); + TEST (altlex_testparse ("|") == '|'); + TEST (altlex_testparse ("?") == '?'); + + /* Now some character constants */ + TEST (altlex_testchar ("'1'") == '1'); + TEST (altlex_testchar ("'a'") == 'a'); + TEST (altlex_testchar ("'A'") == 'A'); + TEST (altlex_testchar ("'z'") == 'z'); + TEST (altlex_testchar ("'Z'") == 'Z'); + TEST (altlex_testchar ("'\n'") == '\n'); + TEST (altlex_testchar ("'\\\\'") == '\\'); + TEST (altlex_testchar ("'\\''") == '\''); + + /* And some numbers */ + TEST (altlex_testnum ("0") == 0); + TEST (altlex_testnum ("1") == 1); + TEST (altlex_testnum ("075") == 075); + TEST (altlex_testnum ("0xfeed") == 0xfeed); + TEST (altlex_testnum ("0xFEED") == 0xFEED); + TEST (altlex_testnum ("0x00005678") == 0x5678); + + /* Keywords */ + TEST (altlex_testparse ("auto") == AUTO); + TEST (altlex_testparse ("break") == BREAK); + TEST (altlex_testparse ("case") == CASE); + TEST (altlex_testparse ("char") == CHAR); + TEST (altlex_testparse ("const") == CONST); + TEST (altlex_testparse ("continue") == CONTINUE); + TEST (altlex_testparse ("default") == DEFAULT); + TEST (altlex_testparse ("do") == DO); + /* Prints a warning */ + // TEST(altlex_testparse("double") == FLOAT); + TEST (altlex_testparse ("else") == ELSE); + TEST (altlex_testparse ("enum") == ENUM); + TEST (altlex_testparse ("extern") == EXTERN); + TEST (altlex_testparse ("float") == FLOAT); + TEST (altlex_testparse ("fixed16x16") == FIXED16X16); + TEST (altlex_testparse ("for") == FOR); + TEST (altlex_testparse ("goto") == GOTO); + TEST (altlex_testparse ("if") == IF); + TEST (altlex_testparse ("int") == INT); + TEST (altlex_testparse ("interrupt") == INTERRUPT); + TEST (altlex_testparse ("long") == LONG); + TEST (altlex_testparse ("register") == REGISTER); + TEST (altlex_testparse ("return") == RETURN); + TEST (altlex_testparse ("short") == SHORT); + TEST (altlex_testparse ("signed") == SIGNED); + TEST (altlex_testparse ("sizeof") == SIZEOF); + TEST (altlex_testparse ("static") == STATIC); + TEST (altlex_testparse ("struct") == STRUCT); + TEST (altlex_testparse ("switch") == SWITCH); + TEST (altlex_testparse ("typedef") == TYPEDEF); + TEST (altlex_testparse ("union") == UNION); + TEST (altlex_testparse ("unsigned") == UNSIGNED); + TEST (altlex_testparse ("void") == VOID); + TEST (altlex_testparse ("volatile") == VOLATILE); + TEST (altlex_testparse ("while") == WHILE); + TEST (altlex_testparse ("...") == VAR_ARGS); + +#if 0 + /* Platform specific keywords */ + TEST (altlex_testparse ("sram") ==) + { + count (); + TKEYWORD (XDATA); + } + TEST (altlex_testparse ("using") ==) + { + count (); + TKEYWORD (USING); + } + TEST (altlex_testparse ("near") ==) + { + count (); + TKEYWORD (DATA); + } + TEST (altlex_testparse ("at") ==) + { + count (); + TKEYWORD (AT); + } + TEST (altlex_testparse ("bit") ==) + { + count (); + TKEYWORD (BIT); + } + TEST (altlex_testparse ("code") ==) + { + count (); + TKEYWORD (CODE); + } + TEST (altlex_testparse ("critical") ==) + { + count (); + TKEYWORD (CRITICAL); + } + TEST (altlex_testparse ("data") ==) + { + count (); + TKEYWORD (DATA); + } + TEST (altlex_testparse ("far") ==) + { + count (); + TKEYWORD (XDATA); + } + TEST (altlex_testparse ("eeprom") ==) + { + count (); + TKEYWORD (EEPROM); + } + TEST (altlex_testparse ("flash") ==) + { + count (); + TKEYWORD (CODE); + } + TEST (altlex_testparse ("idata") ==) + { + count (); + TKEYWORD (IDATA); + } + TEST (altlex_testparse ("nonbanked") ==) + { + count (); + TKEYWORD (NONBANKED); + } + TEST (altlex_testparse ("banked") ==) + { + count (); + TKEYWORD (BANKED); + } + TEST (altlex_testparse ("pdata") ==) + { + count (); + TKEYWORD (PDATA); + } + TEST (altlex_testparse ("reentrant") ==) + { + count (); + TKEYWORD (REENTRANT); + } + TEST (altlex_testparse ("sfr") ==) + { + count (); + TKEYWORD (SFR); + } + TEST (altlex_testparse ("sbit") ==) + { + count (); + TKEYWORD (SBIT); + } + TEST (altlex_testparse ("xdata") ==) + { + count (); + TKEYWORD (XDATA); + } + TEST (altlex_testparse ("_data") ==) + { + count (); + TKEYWORD (_NEAR); + } + TEST (altlex_testparse ("_code") ==) + { + count (); + TKEYWORD (_CODE); + } + TEST (altlex_testparse ("_eeprom") ==) + { + count (); + TKEYWORD (_EEPROM); + } + TEST (altlex_testparse ("_flash") ==) + { + count (); + TKEYWORD (_CODE); + } + TEST (altlex_testparse ("_generic") ==) + { + count (); + TKEYWORD (_GENERIC); + } + TEST (altlex_testparse ("_near") ==) + { + count (); + TKEYWORD (_NEAR); + } + TEST (altlex_testparse ("_sram") ==) + { + count (); + TKEYWORD (_XDATA); + } + TEST (altlex_testparse ("_xdata") ==) + { + count (); + TKEYWORD (_XDATA); + } + TEST (altlex_testparse ("_pdata") ==) + { + count (); + TKEYWORD (_PDATA); + } + TEST (altlex_testparse ("_idata") ==) + { + count (); + TKEYWORD (_IDATA); + } +#endif + + return 0; +} diff --git a/src/avr/Makefile.bcc b/src/avr/Makefile.bcc new file mode 100644 index 0000000..8370b9f --- /dev/null +++ b/src/avr/Makefile.bcc @@ -0,0 +1,23 @@ +# Makefile for Borlad C++ + +PRJDIR = ../.. + +OBJ = gen.obj ralloc.obj main.obj +LIB = port.lib + +!include $(PRJDIR)/Bcc.inc +CFLAGS = $(CFLAGS) -I.. -I$(PRJDIR) + +all: $(LIB) + +main.obj: main.c peeph.rul + +$(LIB): $(OBJ) + if exist $(LIB) del $(LIB) + tlib $@ @&&! ++$(**: = &^ ++) +! + +.def.rul: + gawk -f ../SDCCpeeph.awk $< > $@ diff --git a/src/avr/Makefile.in b/src/avr/Makefile.in new file mode 100644 index 0000000..bd13649 --- /dev/null +++ b/src/avr/Makefile.in @@ -0,0 +1,8 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +# Make all in this directory +include $(srcdir)/../port.mk + diff --git a/src/avr/avr.dsp b/src/avr/avr.dsp new file mode 100644 index 0000000..92e3b27 --- /dev/null +++ b/src/avr/avr.dsp @@ -0,0 +1,116 @@ +# Microsoft Developer Studio Project File - Name="avr" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Static Library" 0x0104 + +CFG=avr - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "avr.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "avr.mak" CFG="avr - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "avr - Win32 Debug" (based on "Win32 (x86) Static Library") +!MESSAGE "avr - Win32 Release" (based on "Win32 (x86) Static Library") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "avr - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /FR /FD /GZ /Zm500 /c +# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /FR /FD /GZ /Zm1000 /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LIB32=link.exe -lib +# ADD BASE LIB32 /nologo /out:"Debug\port.lib" +# ADD LIB32 /nologo /out:"Debug\port.lib" + +!ELSEIF "$(CFG)" == "avr - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /ML /W3 /GX /O2 /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /FD /Zm500 /c +# ADD CPP /nologo /ML /W3 /GX /O2 /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /FD /Zm1000 /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LIB32=link.exe -lib +# ADD BASE LIB32 /nologo /out:"Release\port.lib" +# ADD LIB32 /nologo /out:"Release\port.lib" + +!ENDIF + +# Begin Target + +# Name "avr - Win32 Debug" +# Name "avr - Win32 Release" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\gen.c +# End Source File +# Begin Source File + +SOURCE=.\main.c +# End Source File +# Begin Source File + +SOURCE=.\ralloc.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=.\gen.h +# End Source File +# Begin Source File + +SOURCE=.\main.h +# End Source File +# Begin Source File + +SOURCE=.\ralloc.h +# End Source File +# End Group +# End Target +# End Project diff --git a/src/avr/avra.dsp b/src/avr/avra.dsp new file mode 100644 index 0000000..f6028d1 --- /dev/null +++ b/src/avr/avra.dsp @@ -0,0 +1,93 @@ +# Microsoft Developer Studio Project File - Name="avra" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Generic Project" 0x010a + +CFG=avra - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "avra.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "avra.mak" CFG="avra - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "avra - Win32 Debug" (based on "Win32 (x86) Generic Project") +!MESSAGE "avra - Win32 Release" (based on "Win32 (x86) Generic Project") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +MTL=midl.exe + +!IF "$(CFG)" == "avra - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "" +# PROP Intermediate_Dir "" +# PROP Target_Dir "" + +!ELSEIF "$(CFG)" == "avra - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "" +# PROP Intermediate_Dir "" +# PROP Target_Dir "" + +!ENDIF + +# Begin Target + +# Name "avra - Win32 Debug" +# Name "avra - Win32 Release" +# Begin Source File + +SOURCE=.\peeph.def + +!IF "$(CFG)" == "avra - Win32 Debug" + +# PROP Ignore_Default_Tool 1 +# Begin Custom Build +InputPath=.\peeph.def + +"peeph.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph.rul + +# End Custom Build + +!ELSEIF "$(CFG)" == "avra - Win32 Release" + +# PROP BASE Ignore_Default_Tool 1 +# PROP Ignore_Default_Tool 1 +# Begin Custom Build +InputPath=.\peeph.def + +"peeph.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph.rul + +# End Custom Build + +!ENDIF + +# End Source File +# End Target +# End Project diff --git a/src/avr/gen.c b/src/avr/gen.c new file mode 100644 index 0000000..15955ce --- /dev/null +++ b/src/avr/gen.c @@ -0,0 +1,5372 @@ +/*------------------------------------------------------------------------- + gen.c - source file for code generation for ATMEL AVR + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (2000) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + +-------------------------------------------------------------------------*/ + +#include +#include +#include +#include +#include "SDCCglobl.h" +#include "newalloc.h" + +#include "common.h" +#include "SDCCpeeph.h" +#include "ralloc.h" +#include "gen.h" + +char *aopLiteral (value * val, int offset); +extern int allocInfo; + +/* this is the down and dirty file with all kinds of + kludgy & hacky stuff. This is what it is all about + CODE GENERATION for a specific MCU . some of the + routines may be reusable, will have to see */ + +static char *zero = "0x00"; +static char *one = "0x01"; +static char *spname; + +char *fReturnAVR[] = { "r16", "r17", "r18", "r19" }; +unsigned fAVRReturnSize = 4; /* shared with ralloc.c */ +char **fAVRReturn = fReturnAVR; +static char *larray[4] = { ">", "<", "hlo8", "hhi8" }; + +static struct { + short xPushed; + short zPushed; + short accInUse; + short inLine; + short debugLine; + short nRegsSaved; + set *sendSet; +} _G; + +extern int avr_ptrRegReq; +extern int avr_nRegs; +extern struct dbuf_s *codeOutBuf; +#define RESULTONSTACK(x) \ + (IC_RESULT(x) && IC_RESULT(x)->aop && \ + IC_RESULT(x)->aop->type == AOP_STK ) + +#define MOVR0(x) if (strcmp(x,"r0")) emitcode("mov","r0,%s",x); +#define MOVR24(x) if (strcmp(x,"r24")) emitcode("mov","r24,%s",x); +#define AOP_ISHIGHREG(a,n) (a->type == AOP_REG && a->aopu.aop_reg[n] && a->aopu.aop_reg[n]->rIdx >= R16_IDX) +#define CLRC emitcode("clc","") +#define SETC emitcode("stc","") +#define MOVA(x) +#define IS_REGIDX(a,r) (a->type == AOP_REG && a->aopu.aop_reg[0]->rIdx == r) + +static lineNode *lineHead = NULL; +static lineNode *lineCurr = NULL; + +#define LSB 0 +#define MSB16 1 +#define MSB24 2 +#define MSB32 3 + +#if 0 +// PENDING: Unused. +/*-----------------------------------------------------------------*/ +/* reAdjustPreg - points a register back to where it should */ +/*-----------------------------------------------------------------*/ +static void +reAdjustPreg (asmop * aop) +{ + int size; + + aop->coff = 0; + if ((size = aop->size) <= 1) + return; + size--; + switch (aop->type) { + case AOP_X: + case AOP_Z: + emitcode ("sbiw", "%s,%d", aop->aopu.aop_ptr->name, size); + break; + } + +} + +/*-----------------------------------------------------------------*/ +/* outBitC - output a bit C */ +/*-----------------------------------------------------------------*/ +static void +outBitC (operand * result) +{ + emitcode ("clr", "r0"); + emitcode ("rol", "r0"); + outAcc (result); +} + +/*-----------------------------------------------------------------*/ +/* inExcludeList - return 1 if the string is in exclude Reg list */ +/*-----------------------------------------------------------------*/ +static bool +inExcludeList (char *s) +{ + int i = 0; + + if (options.excludeRegs[i] && + STRCASECMP (options.excludeRegs[i], "none") == 0) + return FALSE; + + for (i = 0; options.excludeRegs[i]; i++) { + if (options.excludeRegs[i] && + STRCASECMP (s, options.excludeRegs[i]) == 0) + return TRUE; + } + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* findLabelBackwards: walks back through the iCode chain looking */ +/* for the given label. Returns number of iCode instructions */ +/* between that label and given ic. */ +/* Returns zero if label not found. */ +/*-----------------------------------------------------------------*/ +static int +findLabelBackwards (iCode * ic, int key) +{ + int count = 0; + + while (ic->prev) { + ic = ic->prev; + count++; + + if (ic->op == LABEL && IC_LABEL (ic)->key == key) { + /* printf("findLabelBackwards = %d\n", count); */ + return count; + } + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* addSign - complete with sign */ +/*-----------------------------------------------------------------*/ +static void +addSign (operand * result, int offset, int sign) +{ + int size = (getDataSize (result) - offset); + if (size > 0) { + if (sign) { + emitcode ("rlc", "a"); + emitcode ("subb", "a,acc"); + while (size--) + aopPut (AOP (result), "a", offset++); + } + else + while (size--) + aopPut (AOP (result), zero, offset++); + } +} + +/*-----------------------------------------------------------------*/ +/* isLiteralBit - test if lit == 2^n */ +/*-----------------------------------------------------------------*/ +static int +isLiteralBit (unsigned long lit) +{ + unsigned long pw[32] = { 1L, 2L, 4L, 8L, 16L, 32L, 64L, 128L, + 0x100L, 0x200L, 0x400L, 0x800L, + 0x1000L, 0x2000L, 0x4000L, 0x8000L, + 0x10000L, 0x20000L, 0x40000L, 0x80000L, + 0x100000L, 0x200000L, 0x400000L, 0x800000L, + 0x1000000L, 0x2000000L, 0x4000000L, 0x8000000L, + 0x10000000L, 0x20000000L, 0x40000000L, 0x80000000L + }; + int idx; + + for (idx = 0; idx < 32; idx++) + if (lit == pw[idx]) + return idx + 1; + return 0; +} + +/*-----------------------------------------------------------------*/ +/* outAcc - output Acc */ +/*-----------------------------------------------------------------*/ +static void +outAcc (operand * result) +{ + int size, offset; + size = getDataSize (result); + if (size) { + aopPut (AOP (result), "r0", 0); + size--; + offset = 1; + /* unsigned or positive */ + while (size--) { + aopPut (AOP (result), zero, offset++); + } + } +} + +#endif // End Unused code section + +/*-----------------------------------------------------------------*/ +/* emitcode - writes the code into a file : for now it is simple */ +/*-----------------------------------------------------------------*/ +static void +emitcode (char *inst, char *fmt, ...) +{ + va_list ap; + char lb[INITIAL_INLINEASM]; + char *lbp = lb; + + va_start (ap, fmt); + + if (inst && *inst) { + if (fmt && *fmt) + sprintf (lb, "%s\t", inst); + else + sprintf (lb, "%s", inst); + vsprintf (lb + (strlen (lb)), fmt, ap); + } + else + vsprintf (lb, fmt, ap); + + while (isspace ((unsigned char)*lbp)) + lbp++; + + if (lbp && *lbp) + lineCurr = (lineCurr ? + connectLine (lineCurr, newLineNode (lb)) : + (lineHead = newLineNode (lb))); + lineCurr->isInline = _G.inLine; + lineCurr->isDebug = _G.debugLine; + va_end (ap); +} + +/*-----------------------------------------------------------------*/ +/* avr_emitDebuggerSymbol - associate the current code location */ +/* with a debugger symbol */ +/*-----------------------------------------------------------------*/ +void +avr_emitDebuggerSymbol (char * debugSym) +{ + _G.debugLine = 1; + emitcode ("", "%s ==.", debugSym); + _G.debugLine = 0; +} + +/*-----------------------------------------------------------------*/ +/* hasInc - operand is incremented before any other use */ +/*-----------------------------------------------------------------*/ +static iCode * +hasInc (operand *op, iCode *ic) +{ + sym_link *type = operandType(op); + sym_link *retype = getSpec (type); + iCode *lic = ic->next; + int isize ; + + if (IS_BITVAR(retype)||!IS_PTR(type)) return NULL; + if (IS_AGGREGATE(type->next)) return NULL; + isize = getSize(type->next); + while (lic) { + /* if operand of the form op = op + */ + if (lic->op == '+' && isOperandEqual(IC_LEFT(lic),op) && + isOperandEqual(IC_RESULT(lic),op) && + isOperandLiteral(IC_RIGHT(lic)) && + operandLitValue(IC_RIGHT(lic)) == isize) { + return lic; + } + /* if the operand used or deffed */ + if (bitVectBitValue(OP_USES(op),lic->key) || (lic->defKey == op->key)) { + return NULL; + } + lic = lic->next; + } + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* getFreePtr - returns X or Z whichever is free or can be pushed */ +/*-----------------------------------------------------------------*/ +static regs * +getFreePtr (iCode * ic, asmop ** aopp, bool result, bool zonly) +{ + bool xiu = FALSE, ziu = FALSE; + bool xou = FALSE, zou = FALSE; + + /* the logic: if x & z used in the instruction + then we are in trouble otherwise */ + + /* first check if x & z are used by this + instruction, in which case we are in trouble */ + if ((xiu = bitVectBitValue (ic->rUsed, X_IDX)) && + (ziu = bitVectBitValue (ic->rUsed, Z_IDX))) { + goto endOfWorld; + } + + xou = bitVectBitValue (ic->rMask, X_IDX); + zou = bitVectBitValue (ic->rMask, Z_IDX); + + /* if no usage of Z then return it */ + if (!ziu && !zou) { + ic->rUsed = bitVectSetBit (ic->rUsed, Z_IDX); + (*aopp)->type = AOP_Z; + + (*aopp)->aop_ptr2 = avr_regWithIdx (R31_IDX); + return (*aopp)->aopu.aop_ptr = avr_regWithIdx (R30_IDX); + } + + /* if no usage of X then return it */ + if (!xiu && !xou && !zonly) { + ic->rUsed = bitVectSetBit (ic->rUsed, X_IDX); + (*aopp)->type = AOP_X; + + (*aopp)->aop_ptr2 = avr_regWithIdx (R27_IDX); + return (*aopp)->aopu.aop_ptr = avr_regWithIdx (R26_IDX); + } + + /* if z not used then */ + + if (!ziu) { + /* push it if not already pushed */ + if (!_G.zPushed) { + emitcode ("push", "%s", + avr_regWithIdx (R30_IDX)->dname); + emitcode ("push", "%s", + avr_regWithIdx (R31_IDX)->dname); + _G.zPushed++; + } + + ic->rUsed = bitVectSetBit (ic->rUsed, Z_IDX); + (*aopp)->type = AOP_Z; + (*aopp)->aop_ptr2 = avr_regWithIdx (R31_IDX); + return (*aopp)->aopu.aop_ptr = avr_regWithIdx (R30_IDX); + } + + /* now we know they both have usage */ + /* if x not used in this instruction */ + if (!xiu && !zonly) { + /* push it if not already pushed */ + if (!_G.xPushed) { + emitcode ("push", "%s", + avr_regWithIdx (R26_IDX)->dname); + emitcode ("push", "%s", + avr_regWithIdx (R27_IDX)->dname); + _G.xPushed++; + } + + ic->rUsed = bitVectSetBit (ic->rUsed, X_IDX); + (*aopp)->type = AOP_X; + + (*aopp)->aop_ptr2 = avr_regWithIdx (R27_IDX); + return (*aopp)->aopu.aop_ptr = avr_regWithIdx (R26_IDX); + } + + + endOfWorld: + /* I said end of world but not quite end of world yet */ + /* if this is a result then we can push it on the stack */ + if (result) { + (*aopp)->type = AOP_STK; + return NULL; + } + + /* other wise this is true end of the world */ + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "getFreePtr should never reach here"); + exit (0); +} + +/*-----------------------------------------------------------------*/ +/* newAsmop - creates a new asmOp */ +/*-----------------------------------------------------------------*/ +static asmop * +newAsmop (short type) +{ + asmop *aop; + + aop = Safe_calloc (1, sizeof (asmop)); + aop->type = type; + return aop; +} + +/*-----------------------------------------------------------------*/ +/* pointerCode - returns the code for a pointer type */ +/*-----------------------------------------------------------------*/ +static int +pointerCode (sym_link * etype) +{ + + return PTR_TYPE (SPEC_OCLS (etype)); + +} + +/*-----------------------------------------------------------------*/ +/* aopForSym - for a true symbol */ +/*-----------------------------------------------------------------*/ +static asmop * +aopForSym (iCode * ic, symbol * sym, bool result) +{ + asmop *aop; + memmap *space = SPEC_OCLS (sym->etype); + + /* if already has one */ + if (sym->aop) + return sym->aop; + + /* assign depending on the storage class */ + /* if it is on the stack */ + if (sym->onStack) { + sym->aop = aop = newAsmop (0); + aop->size = getSize (sym->type); + + /* we can use std / ldd instruction */ + if (sym->stack > 0 + && (sym->stack + getSize (sym->type) - 1) <= 63) { + aop->type = AOP_STK_D; + aop->aopu.aop_stk = sym->stack; + return aop; + } + + /* otherwise get a free pointer register X/Z */ + aop->aopu.aop_ptr = getFreePtr (ic, &aop, result, FALSE); + + /* now assign the address of the variable to + the pointer register */ + if (aop->type != AOP_STK) { + emitcode ("movw", "%s,r28", aop->aopu.aop_ptr->name); + if (sym->stack < 0) { + if ((sym->stack - _G.nRegsSaved) > -63) { + emitcode ("sbiw", "%s,0x%02x", + aop->aopu.aop_ptr->name, + (sym->stack - + _G.nRegsSaved)); + } + else { + emitcode ("subi", "%s,<(%d)", + aop->aopu.aop_ptr->name, + sym->stack - _G.nRegsSaved); + emitcode ("sbci", "%s,>(%d)", + aop->aop_ptr2->name, + sym->stack - _G.nRegsSaved); + } + } + else { + if (sym->stack <= 63) { + emitcode ("adiw", "%s,0x%02x", + aop->aopu.aop_ptr->name, + sym->stack); + } + else { + emitcode ("subi", "%s,<(-%d)", + aop->aopu.aop_ptr->name, + sym->stack); + emitcode ("sbci", "%s,>(-%d)", + aop->aop_ptr2->name, + sym->stack); + } + } + } + return aop; + } + + /* if in bit space */ + if (IN_BITSPACE (space)) { + sym->aop = aop = newAsmop (AOP_CRY); + aop->aopu.aop_dir = sym->rname; + aop->size = getSize (sym->type); + return aop; + } + /* if it is in direct space */ + if (IN_DIRSPACE (space)) { + sym->aop = aop = newAsmop (AOP_DIR); + aop->aopu.aop_dir = sym->rname; + aop->size = getSize (sym->type); + return aop; + } + + /* special case for a function */ + if (IS_FUNC (sym->type)) { + sym->aop = aop = newAsmop (AOP_IMMD); + aop->aopu.aop_immd = Safe_calloc (1, strlen (sym->rname) + 1); + strcpy (aop->aopu.aop_immd, sym->rname); + aop->size = FPTRSIZE; + return aop; + } + + /* only remaining is code / eeprom which will need pointer reg */ + /* if it is in code space */ + + sym->aop = aop = newAsmop (0); + + if (IN_CODESPACE (space)) + aop->code = 1; + + aop->aopu.aop_ptr = getFreePtr (ic, &aop, result, aop->code); + aop->size = getSize (sym->type); + emitcode ("ldi", "%s,<(%s)", aop->aopu.aop_ptr->name, sym->rname); + emitcode ("ldi", "%s,>(%s)", aop->aop_ptr2); + + return aop; +} + +/*-----------------------------------------------------------------*/ +/* aopForRemat - rematerialzes an object */ +/*-----------------------------------------------------------------*/ +static asmop * +aopForRemat (symbol * sym) +{ + iCode *ic = sym->rematiCode; + asmop *aop = newAsmop (AOP_IMMD); + int val = 0; + + for (;;) { + if (ic->op == '+') + val += (int) operandLitValue (IC_RIGHT (ic)); + else if (ic->op == '-') + val -= (int) operandLitValue (IC_RIGHT (ic)); + else + break; + + ic = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + } + + if (val) + sprintf (buffer, "(%s %c 0x%04x)", + OP_SYMBOL (IC_LEFT (ic))->rname, + val >= 0 ? '+' : '-', abs (val) & 0xffff); + else + strcpy (buffer, OP_SYMBOL (IC_LEFT (ic))->rname); + + aop->aopu.aop_immd = Safe_calloc (1, strlen (buffer) + 1); + strcpy (aop->aopu.aop_immd, buffer); + return aop; +} + +/*-----------------------------------------------------------------*/ +/* regsInCommon - two operands have some registers in common */ +/*-----------------------------------------------------------------*/ +static bool +regsInCommon (operand * op1, operand * op2) +{ + symbol *sym1, *sym2; + int i; + + /* if they have registers in common */ + if (!IS_SYMOP (op1) || !IS_SYMOP (op2)) + return FALSE; + + sym1 = OP_SYMBOL (op1); + sym2 = OP_SYMBOL (op2); + + if (sym1->nRegs == 0 || sym2->nRegs == 0) + return FALSE; + + for (i = 0; i < sym1->nRegs; i++) { + int j; + if (!sym1->regs[i]) + continue; + + for (j = 0; j < sym2->nRegs; j++) { + if (!sym2->regs[j]) + continue; + + if (sym2->regs[j] == sym1->regs[i]) + return TRUE; + } + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* operandsEqu - equivalent */ +/*-----------------------------------------------------------------*/ +static bool +operandsEqu (operand * op1, operand * op2) +{ + symbol *sym1, *sym2; + + /* if they not symbols */ + if (!IS_SYMOP (op1) || !IS_SYMOP (op2)) + return FALSE; + + sym1 = OP_SYMBOL (op1); + sym2 = OP_SYMBOL (op2); + + /* if both are itemps & one is spilt + and the other is not then false */ + if (IS_ITEMP (op1) && IS_ITEMP (op2) && + sym1->isspilt != sym2->isspilt) return FALSE; + + /* if they are the same */ + if (sym1 == sym2) + return TRUE; + + if (strcmp (sym1->rname, sym2->rname) == 0) + return TRUE; + + + /* if left is a tmp & right is not */ + if (IS_ITEMP (op1) && + !IS_ITEMP (op2) && sym1->isspilt && (sym1->usl.spillLoc == sym2)) + return TRUE; + + if (IS_ITEMP (op2) && + !IS_ITEMP (op1) && + sym2->isspilt && sym1->level > 0 && (sym2->usl.spillLoc == sym1)) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* sameRegs - two asmops have the same registers */ +/*-----------------------------------------------------------------*/ +static bool +sameRegs (asmop * aop1, asmop * aop2) +{ + int i; + + if (aop1 == aop2) + return TRUE; + + if (aop1->type != AOP_REG || aop2->type != AOP_REG) + return FALSE; + + if (aop1->size != aop2->size) + return FALSE; + + for (i = 0; i < aop1->size; i++) + if (aop1->aopu.aop_reg[i] != aop2->aopu.aop_reg[i]) + return FALSE; + + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* isRegPair - for size 2 if this operand has a register pair */ +/*-----------------------------------------------------------------*/ +static int +isRegPair (asmop * aop) +{ + if (!aop || aop->size < 2) + return 0; + if (aop->type == AOP_X || aop->type == AOP_Z) + return 1; + if (aop->type != AOP_REG) + return 0; + if ( ((aop->aopu.aop_reg[1]->rIdx - aop->aopu.aop_reg[0]->rIdx) == 1) && + (aop->aopu.aop_reg[0]->rIdx & 1) == 0) + + return 1; + return 0; +} + +/*-----------------------------------------------------------------*/ +/* allHigh - all registers are high registers */ +/*-----------------------------------------------------------------*/ +static int allHigh (asmop * aop) +{ + int i; + + if (aop->type == AOP_X || aop->type == AOP_Z) + return 1; + if (aop->type != AOP_REG) + return 0; + for (i=0; i < aop->size ; i++ ) + if (aop->aopu.aop_reg[i]->rIdx < R16_IDX) return 0; + return 1; +} + +/*-----------------------------------------------------------------*/ +/* aopOp - allocates an asmop for an operand : */ +/*-----------------------------------------------------------------*/ +static void +aopOp (operand * op, iCode * ic, bool result) +{ + asmop *aop; + symbol *sym; + int i; + + if (!op) + return; + + /* if this a literal */ + if (IS_OP_LITERAL (op)) { + op->aop = aop = newAsmop (AOP_LIT); + aop->aopu.aop_lit = op->operand.valOperand; + aop->size = getSize (operandType (op)); + return; + } + + /* if already has a asmop then continue */ + if (op->aop) + return; + + /* if the underlying symbol has a aop */ + if (IS_SYMOP (op) && OP_SYMBOL (op)->aop) { + op->aop = OP_SYMBOL (op)->aop; + return; + } + + /* if this is a true symbol */ + if (IS_TRUE_SYMOP (op)) { + op->aop = aopForSym (ic, OP_SYMBOL (op), result); + return; + } + + /* this is a temporary : this has + only four choices : + a) register + b) spillocation + c) rematerialize + d) conditional + e) can be a return use only */ + + sym = OP_SYMBOL (op); + + + /* if the type is a conditional */ + if (sym->regType & REG_CND) { + aop = op->aop = sym->aop = newAsmop (AOP_CRY); + aop->size = 0; + return; + } + + /* if it is spilt then two situations + a) is rematerialize + b) has a spill location */ + if (sym->isspilt || sym->nRegs == 0) { + + asmop *oldAsmOp = NULL; + + /* rematerialize it NOW */ + if (sym->remat) { + sym->aop = op->aop = aop = aopForRemat (sym); + aop->size = getSize (sym->type); + return; + } + + if (sym->accuse) { + assert ("ACC_USE cannot happen in AVR\n"); + } + + if (sym->ruonly) { + int i; + aop = op->aop = sym->aop = newAsmop (AOP_STR); + aop->size = getSize (sym->type); + for (i = 0; i < (int) fAVRReturnSize; i++) + aop->aopu.aop_str[i] = fAVRReturn[i]; + return; + } + + /* else spill location */ + if (sym->usl.spillLoc && getSize(sym->type) != getSize(sym->usl.spillLoc->type)) { + /* force a new aop if sizes differ */ + oldAsmOp = sym->usl.spillLoc->aop; + sym->usl.spillLoc->aop = NULL; + } + sym->aop = op->aop = aop = + aopForSym (ic, sym->usl.spillLoc, result); + if (getSize(sym->type) != getSize(sym->usl.spillLoc->type)) { + /* Don't reuse the new aop, go with the last one */ + sym->usl.spillLoc->aop = oldAsmOp; + } + aop->size = getSize (sym->type); + return; + } + + /* must be in a register */ + sym->aop = op->aop = aop = newAsmop (AOP_REG); + aop->size = sym->nRegs; + for (i = 0; i < sym->nRegs; i++) + aop->aopu.aop_reg[i] = sym->regs[i]; +} + +/*-----------------------------------------------------------------*/ +/* freeAsmop - free up the asmop given to an operand */ +/*----------------------------------------------------------------*/ +static void +freeAsmop (operand * op, asmop * aaop, iCode * ic, bool pop) +{ + asmop *aop; + + if (!op) + aop = aaop; + else + aop = op->aop; + + if (!aop) + return; + + if (aop->freed) + goto dealloc; + + aop->freed = 1; + + /* depending on the asmop type only three cases need work AOP_RO + , AOP_R1 && AOP_STK */ + switch (aop->type) { + case AOP_X: + if (_G.xPushed) { + if (pop) { + emitcode ("pop", "r26"); + emitcode ("pop", "r27"); + _G.xPushed--; + } + } + bitVectUnSetBit (ic->rUsed, X_IDX); + break; + + case AOP_Z: + if (_G.zPushed) { + if (pop) { + emitcode ("pop", "r30"); + emitcode ("pop", "r31"); + _G.zPushed--; + } + } + bitVectUnSetBit (ic->rUsed, Z_IDX); + break; + + case AOP_STK: + { + int sz = aop->size; + int stk = aop->aopu.aop_stk + aop->size; + bitVectUnSetBit (ic->rUsed, X_IDX); + bitVectUnSetBit (ic->rUsed, Z_IDX); + + getFreePtr (ic, &aop, FALSE, 0); + + emitcode ("movw", "%s,r28"); + if (stk) { + if (stk <= 63 && stk > 0) { + emitcode ("adiw", "%s,0x%02x", + aop->aopu.aop_ptr->name, + stk + 1); + } + else { + emitcode ("subi", "%s,<(%d)", + aop->aopu.aop_ptr->name, + -(stk + 1)); + emitcode ("sbci", "%s,>(%d)", + aop->aop_ptr2->name, + -(stk + 1)); + } + } + + while (sz--) { + emitcode ("pop", "r24"); + emitcode ("st", "-%s,r24", + aop->type == AOP_X ? "X" : "Z"); + if (!sz) + break; + } + op->aop = aop; + freeAsmop (op, NULL, ic, TRUE); + if (_G.xPushed) { + emitcode ("pop", "r26"); + emitcode ("pop", "r27"); + _G.xPushed--; + } + + if (_G.zPushed) { + emitcode ("pop", "r30"); + emitcode ("pop", "r31"); + _G.zPushed--; + } + } + } + + dealloc: + /* all other cases just dealloc */ + if (op) { + op->aop = NULL; + if (IS_SYMOP (op)) { + OP_SYMBOL (op)->aop = NULL; + /* if the symbol has a spill */ + if (SPIL_LOC (op)) + SPIL_LOC (op)->aop = NULL; + } + } +} + +/*-----------------------------------------------------------------*/ +/* aopGet - for fetching value of the aop */ +/*-----------------------------------------------------------------*/ +static char * +aopGet (asmop * aop, int offset) +{ + char *s = buffer; + char *rs; + + /* offset is greater than + size then zero */ + if (offset > (aop->size - 1) && aop->type != AOP_LIT) + return zero; + + /* depending on type */ + switch (aop->type) { + + case AOP_X: + if (offset > aop->coff) { + emitcode ("adiw", "%s,%d", aop->aopu.aop_ptr->name, + offset - aop->coff); + } + + if (offset < aop->coff) { + emitcode ("sbiw", "%s,%d", aop->aopu.aop_ptr->name, + aop->coff - offset); + } + + aop->coff = offset; + emitcode ("ld", "%s,x", + (rs = ((offset & 1) ? "r25" : "r24"))); + return rs; + + case AOP_Z: + if (aop->code) { + if (offset > aop->coff) { + emitcode ("adiw", "r30,%d", + offset - aop->coff); + } + else { + emitcode ("sbiw", "r30,%d", + aop->coff - offset); + } + emitcode ("lpm", "%s,z", + (rs = ((offset & 1) ? "r25" : "r24"))); + } + else { + /* we can use lds */ + if (offset > aop->coff) { + emitcode ("ldd", "%s,z+%d", + (rs = + ((offset & 1) ? "r25" : "r24")), + offset - aop->coff); + } + else { + emitcode ("sbiw", "%s,%d", + aop->aopu.aop_ptr->name, + aop->coff - offset); + aop->coff = offset; + emitcode ("ld", "%s,z", + (rs = + ((offset & 1) ? "r25" : "r24"))); + } + } + return rs; + + case AOP_IMMD: + + emitcode ("lds", "%s,(%s)+%d", + (rs = ((offset & 1) ? "r25" : "r24")), + aop->aopu.aop_immd, offset); + return rs; + + case AOP_DIR: + emitcode ("lds", "%s,(%s)+%d", + (rs = ((offset & 1) ? "r25" : "r24")), + aop->aopu.aop_dir, offset); + return rs; + + case AOP_REG: + return aop->aopu.aop_reg[offset]->name; + + case AOP_CRY: + assert ("cannot be in bit space AOP_CRY\n"); + break; + + case AOP_LIT: + s = aopLiteral (aop->aopu.aop_lit, offset); + emitcode ("ldi", "%s,<(%s)", + (rs = ((offset & 1) ? "r24" : "r25")), s); + return rs; + + case AOP_STR: + aop->coff = offset; + return aop->aopu.aop_str[offset]; + + case AOP_STK_D: + emitcode ("ldd", "%s,Y+%d", + (rs = ((offset & 1) ? "r25" : "r24")), + aop->aopu.aop_stk + offset); + return rs; + } + + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "aopget got unsupported aop->type"); + exit (0); +} + +/*-----------------------------------------------------------------*/ +/* aopPut - puts a string for a aop */ +/*-----------------------------------------------------------------*/ +static void +aopPut (asmop * aop, char *s, int offset) +{ + char *d = buffer; + + if (aop->size && offset > (aop->size - 1)) { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "aopPut got offset > aop->size"); + exit (0); + } + + /* will assign value to value */ + /* depending on where it is ofcourse */ + switch (aop->type) { + case AOP_DIR: + if (offset) { + sprintf (d, "(%s)+%d", aop->aopu.aop_dir, offset); + } + else { + sprintf (d, "%s", aop->aopu.aop_dir); + } + + emitcode ("sts", "%s,%s", d, s); + break; + + case AOP_REG: + if (toupper ((unsigned char)*s) != 'R') { + if (s == zero) { + emitcode ("clr", "%s", + aop->aopu.aop_reg[offset]->name); + } + else { + emitcode ("ldi", "r25,%s", s); + emitcode ("mov", "%s,r35", + aop->aopu.aop_reg[offset]->name); + } + } + else { + if (strcmp (aop->aopu.aop_reg[offset]->name, s)) { + emitcode ("mov", "%s,%s", + aop->aopu.aop_reg[offset]->name, s); + } + } + break; + + case AOP_X: + if (offset > aop->coff) { + emitcode ("adiw", "%s,%d", aop->aopu.aop_ptr->name, + offset - aop->coff); + } + + if (offset < aop->coff) { + emitcode ("sbiw", "%s,%d", aop->aopu.aop_ptr->name, + aop->coff - offset); + } + + aop->coff = offset; + emitcode ("st", "x,%s", s); + break; + + case AOP_Z: + if (aop->code) { + if (offset > aop->coff) { + emitcode ("adiw", "r30,%d", + offset - aop->coff); + } + else { + emitcode ("sbiw", "r30,%d", + aop->coff - offset); + } + emitcode ("lpm", "%s,z", s); + } + else { + /* we can use lds */ + if (offset > aop->coff) { + emitcode ("sdd", "z+%d,%s", + offset - aop->coff, s); + } + else { + emitcode ("sbiw", "%s,%d", + aop->aopu.aop_ptr->name, + aop->coff - offset); + aop->coff = offset; + emitcode ("ld", "%s,z", s); + } + } + break; + + case AOP_STK: + emitcode ("push", "%s", s); + break; + + case AOP_CRY: + /* if used only for a condition code check */ + assert (toupper ((unsigned char)*s) == 'R'); + if (offset == 0) { + emitcode ("xrl", "r0,r0"); + emitcode ("cpi", "%s,0", s); + } + else { + emitcode ("cpc", "r0,%s", s); + } + break; + + case AOP_STR: + aop->coff = offset; + if (strcmp (aop->aopu.aop_str[offset], s)) + emitcode ("mov", "%s,%s", aop->aopu.aop_str[offset], + s); + break; + + case AOP_STK_D: + emitcode ("std", "y+%d,%s", offset, s); + break; + + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "aopPut got unsupported aop->type"); + exit (0); + } + +} + +#define AOP(op) op->aop +#define AOP_TYPE(op) AOP(op)->type +#define AOP_SIZE(op) AOP(op)->size +#define IS_AOP_PREG(x) (AOP(x) && (AOP_TYPE(x) == AOP_X || \ + AOP_TYPE(x) == AOP_Z)) +#define AOP_INPREG(x) (x && (x->type == AOP_REG && \ + ((x->aopu.aop_reg[0] == avr_regWithIdx(R26_IDX) && x->aopu.aop_reg[1] == avr_regWithIdx(R27_IDX)) || \ + (x->aopu.aop_reg[0] == avr_regWithIdx(R30_IDX) && x->aopu.aop_reg[1] == avr_regWithIdx(R31_IDX)) ))) +#define AOP_ISX(x) (x && (x->type == AOP_REG && \ + ((x->aopu.aop_reg[0] == avr_regWithIdx(R26_IDX) && x->aopu.aop_reg[1] == avr_regWithIdx(R27_IDX))))) +#define AOP_ISZ(x) (x && (x->type == AOP_REG && \ + ((x->aopu.aop_reg[0] == avr_regWithIdx(R30_IDX) && x->aopu.aop_reg[1] == avr_regWithIdx(R31_IDX))))) + +/*-----------------------------------------------------------------*/ +/* genNotFloat - generates not for float operations */ +/*-----------------------------------------------------------------*/ +static void +genNotFloat (operand * op, operand * res) +{ + int size, offset; + char *l; + symbol *tlbl; + + /* we will put 127 in the first byte of + the result */ + aopPut (AOP (res), "127", 0); + size = AOP_SIZE (op) - 1; + offset = 1; + + l = aopGet (op->aop, offset++); + MOVR0 (l); + + while (size--) { + emitcode ("or", "R0,%s", aopGet (op->aop, offset++)); + } + tlbl = newiTempLabel (NULL); + + tlbl = newiTempLabel (NULL); + aopPut (res->aop, zero, 1); + emitcode ("cpi", "r0,0"); + emitcode ("breq", "L%05d", tlbl->key); + aopPut (res->aop, one, 1); + emitcode ("", "L%05d:", tlbl->key); + + size = res->aop->size - 2; + offset = 2; + /* put zeros in the rest */ + while (size--) + aopPut (res->aop, zero, offset++); +} + +/*-----------------------------------------------------------------*/ +/* opIsGptr: returns non-zero if the passed operand is */ +/* a generic pointer type. */ +/*-----------------------------------------------------------------*/ +static int +opIsGptr (operand * op) +{ + sym_link *type = operandType (op); + + if ((AOP_SIZE (op) == GPTRSIZE) && IS_GENPTR (type)) { + return 1; + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* getDataSize - get the operand data size */ +/*-----------------------------------------------------------------*/ +static int +getDataSize (operand * op) +{ + int size; + size = AOP_SIZE (op); + if (size == GPTRSIZE) { + sym_link *type = operandType (op); + if (IS_GENPTR (type)) { + /* generic pointer; arithmetic operations + * should ignore the high byte (pointer type). + */ + size--; + } + } + return size; +} + +/*-----------------------------------------------------------------*/ +/* toBoolean - emit code for orl a,operator(sizeop) */ +/*-----------------------------------------------------------------*/ +static void +toBoolean (operand * oper, char *r, bool clr) +{ + int size = AOP_SIZE (oper); + int offset = 0; + if (clr) { + emitcode ("clr", "%s", r); + while (size--) + emitcode ("or", "%s,%s", r, aopGet (AOP (oper), offset++)); + } else { + size--; + emitcode("mov","%s,%s",r,aopGet (AOP (oper), offset++)); + if (size) while (size--) emitcode ("or", "%s,%s", r, aopGet (AOP (oper), offset++)); + } +} + + +/*-----------------------------------------------------------------*/ +/* genNot - generate code for ! operation */ +/*-----------------------------------------------------------------*/ +static void +genNot (iCode * ic) +{ + symbol *tlbl; + sym_link *optype = operandType (IC_LEFT (ic)); + int size, offset = 1; + + /* assign asmOps to operand & result */ + aopOp (IC_LEFT (ic), ic, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE); + + /* if type float then do float */ + if (IS_FLOAT (optype)) { + genNotFloat (IC_LEFT (ic), IC_RESULT (ic)); + goto release; + } + emitcode ("clr", "r24"); + tlbl = newiTempLabel (NULL); + size = AOP_SIZE (IC_LEFT (ic)); + offset = 0; + if (size == 1) { + emitcode ("cpse", "%s,r24", aopGet (AOP (IC_LEFT (ic)), 0)); + } + else { + while (size--) { + if (offset) + emitcode ("cpc", "%s,r24", + aopGet (AOP (IC_LEFT (ic)), + offset)); + else + emitcode ("cpi", "%s,0", + aopGet (AOP (IC_LEFT (ic)), + offset)); + offset++; + } + emitcode ("bne", "L%05d", tlbl->key); + } + emitcode ("ldi", "r24,1"); + emitcode ("", "L%05d:", tlbl->key); + aopPut (AOP (IC_RESULT (ic)), "r24", 0); + size = AOP_SIZE (IC_RESULT (ic)) - 1; + offset = 1; + while (size--) + aopPut (AOP (IC_RESULT (ic)), zero, offset++); + + + release: + /* release the aops */ + freeAsmop (IC_LEFT (ic), NULL, ic, (RESULTONSTACK (ic) ? 0 : 1)); + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); +} + + +/*-----------------------------------------------------------------*/ +/* genCpl - generate code for complement */ +/*-----------------------------------------------------------------*/ +static void +genCpl (iCode * ic) +{ + int offset = 0; + int size; + int samer; + + /* assign asmOps to operand & result */ + aopOp (IC_LEFT (ic), ic, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE); + samer = sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic))); + size = AOP_SIZE (IC_RESULT (ic)); + while (size--) { + char *l = aopGet (AOP (IC_LEFT (ic)), offset); + if (samer) { + emitcode ("com", "%s", l); + } + else { + aopPut (AOP (IC_RESULT (ic)), l, offset); + emitcode ("com", "%s", + aopGet (AOP (IC_RESULT (ic)), offset)); + } + offset++; + } + + /* release the aops */ + freeAsmop (IC_LEFT (ic), NULL, ic, (RESULTONSTACK (ic) ? 0 : 1)); + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genUminusFloat - unary minus for floating points */ +/*-----------------------------------------------------------------*/ +static void +genUminusFloat (operand * op, operand * result) +{ + int size, offset = 0; + char *l; + /* for this we just need to flip the + first it then copy the rest in place */ + size = AOP_SIZE (op) - 1; + l = aopGet (AOP (op), 3); + + emitcode ("ldi", "r24,0x80"); + if (sameRegs (AOP (op), AOP (result))) { + emitcode ("eor", "%s,r24", l); + } + else { + aopPut (AOP (result), l, 3); + emitcode ("eor", "%s,r24", aopGet (AOP (result), 3)); + } + while (size--) { + aopPut (AOP (result), aopGet (AOP (op), offset), offset); + offset++; + } +} + +/*-----------------------------------------------------------------*/ +/* genUminus - unary minus code generation */ +/*-----------------------------------------------------------------*/ +static void +genUminus (iCode * ic) +{ + int offset, size; + sym_link *optype, *rtype; + int samer; + + /* assign asmops */ + aopOp (IC_LEFT (ic), ic, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE); + + optype = operandType (IC_LEFT (ic)); + rtype = operandType (IC_RESULT (ic)); + + /* if float then do float stuff */ + if (IS_FLOAT (optype)) { + genUminusFloat (IC_LEFT (ic), IC_RESULT (ic)); + goto release; + } + + /* otherwise subtract from zero */ + size = AOP_SIZE (IC_LEFT (ic)); + offset = 0; + samer = sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic))); + if (size == 1) { + if (samer) { + emitcode ("neg", "%s", + aopGet (AOP (IC_LEFT (ic)), 0)); + } + else { + aopPut (AOP (IC_RESULT (ic)), + aopGet (AOP (IC_LEFT (ic)), 0), 0); + emitcode ("neg", "%s", + aopGet (AOP (IC_RESULT (ic)), 0)); + } + } + else { + offset = size - 1; + while (size--) { + char *l = aopGet (AOP (IC_LEFT (ic)), offset); + if (!samer) { + aopPut (AOP (IC_RESULT (ic)), l, offset); + l = aopGet (AOP (IC_RESULT (ic)), offset); + } + if (offset) + emitcode ("com", "%s", l); + else + emitcode ("neg", "%s", l); + offset--; + } + size = AOP_SIZE (IC_LEFT (ic)) - 1; + offset = 1; + while (size--) { + emitcode ("sbci", "%s,0xff", + aopGet (AOP (IC_RESULT (ic)), offset++)); + } + } + + /* if any remaining bytes in the result */ + /* we just need to propagate the sign */ + if ((size = (AOP_SIZE (IC_RESULT (ic)) - AOP_SIZE (IC_LEFT (ic))))) { + symbol *tlbl = newiTempLabel (NULL); + emitcode ("clr", "r0"); + emitcode ("brcc", "L%05d", tlbl->key); + emitcode ("com", "r0"); + emitcode ("", "L%05d:", tlbl->key); + while (size--) + aopPut (AOP (IC_RESULT (ic)), "r0", offset++); + } + + release: + /* release the aops */ + freeAsmop (IC_LEFT (ic), NULL, ic, (RESULTONSTACK (ic) ? 0 : 1)); + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* assignResultValue - */ +/*-----------------------------------------------------------------*/ +static void +assignResultValue (operand * oper) +{ + int offset = 0; + int size = AOP_SIZE (oper); + while (size--) { + aopPut (AOP (oper), fAVRReturn[offset], offset); + offset++; + } +} + +/*-----------------------------------------------------------------*/ +/* saveZreg - if indirect call then save z-pointer register */ +/*-----------------------------------------------------------------*/ +static void +saveZreg (iCode * ic) +{ + /* only if live accross this call */ + if (ic->regsSaved == 0 && + (bitVectBitValue (ic->rMask, R30_IDX) || + bitVectBitValue (ic->rMask, R31_IDX))) { + ic->regsSaved = 1; + emitcode ("push", "r30"); + emitcode ("push", "r31"); + } +} + +/*-----------------------------------------------------------------*/ +/* popZreg - restore values of zreg */ +/*-----------------------------------------------------------------*/ +static void +popZreg (iCode * ic) +{ + if (ic->regsSaved) { + emitcode ("pop", "r31"); + emitcode ("pop", "r30"); + } +} + +/*-----------------------------------------------------------------*/ +/* genIpush - genrate code for pushing this gets a little complex */ +/*-----------------------------------------------------------------*/ +static void +genIpush (iCode * ic) +{ + int size, offset = 0; + char *l; + + + if (!ic->parmPush) { + /* and the item is spilt then do nothing */ + if (OP_SYMBOL (IC_LEFT (ic))->isspilt) + return; + } + else { + iCode *lic; + for (lic = ic->next; lic; lic = lic->next) + if (lic->op == PCALL) + break; + if (lic) + saveZreg (lic); + } + + /* this is a paramter push */ + aopOp (IC_LEFT (ic), ic, FALSE); + size = AOP_SIZE (IC_LEFT (ic)); + while (size--) { + l = aopGet (AOP (IC_LEFT (ic)), offset++); + emitcode ("push", "%s", l); + } + + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genIpop - recover the registers: can happen only for spilling */ +/*-----------------------------------------------------------------*/ +static void +genIpop (iCode * ic) +{ + int size, offset; + + + /* if the temp was not pushed then */ + if (OP_SYMBOL (IC_LEFT (ic))->isspilt) + return; + + aopOp (IC_LEFT (ic), ic, FALSE); + size = AOP_SIZE (IC_LEFT (ic)); + offset = (size - 1); + while (size--) + emitcode ("pop", "%s", aopGet (AOP (IC_LEFT (ic)), offset--)); + + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genCall - generates a call statement */ +/*-----------------------------------------------------------------*/ +static void +genCall (iCode * ic) +{ + + /* if send set is not empty then assign */ + if (_G.sendSet) { + iCode *sic; + int rnum = 16; + for (sic = setFirstItem (_G.sendSet); sic; + sic = setNextItem (_G.sendSet)) { + int size, offset = 0; + aopOp (IC_LEFT (sic), sic, FALSE); + size = AOP_SIZE (IC_LEFT (sic)); + while (size--) { + char *l = + aopGet (AOP (IC_LEFT (sic)), offset); + char *b = buffer; + sprintf (buffer, "r%d", rnum++); + if (strcmp (l, b)) + emitcode ("mov", "%s,%s", b, l); + offset++; + } + freeAsmop (IC_LEFT (sic), NULL, sic, TRUE); + } + _G.sendSet = NULL; + } + /* make the call */ + emitcode ("call", "%s", (OP_SYMBOL (IC_LEFT (ic))->rname[0] ? + OP_SYMBOL (IC_LEFT (ic))->rname : + OP_SYMBOL (IC_LEFT (ic))->name)); + + /* if we need assign a result value */ + if ((IS_ITEMP (IC_RESULT (ic)) && + (OP_SYMBOL (IC_RESULT (ic))->nRegs || + OP_SYMBOL (IC_RESULT (ic))->spildir)) || + IS_TRUE_SYMOP (IC_RESULT (ic))) { + + aopOp (IC_RESULT (ic), ic, FALSE); + assignResultValue (IC_RESULT (ic)); + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + } + + /* adjust the stack for parameters if required */ + if (ic->parmBytes) { + if (ic->parmBytes > 63) { + emitcode ("sbiw", "r28,%d", ic->parmBytes); + } + else { + emitcode ("subi", "r28,<(%d)", + ic->parmBytes); + emitcode ("sbci", "r29,>(%d)", + ic->parmBytes); + } + } + +} + +/*-----------------------------------------------------------------*/ +/* genPcall - generates a call by pointer statement */ +/*-----------------------------------------------------------------*/ +static void +genPcall (iCode * ic) +{ + + if (!ic->regsSaved) + saveZreg (ic); + + aopOp (IC_LEFT (ic), ic, FALSE); + emitcode ("mov", "r30", aopGet (AOP (IC_LEFT (ic)), 0)); + emitcode ("mov", "r31", aopGet (AOP (IC_RIGHT (ic)), 0)); + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); + + /* if send set is not empty the assign */ + if (_G.sendSet) { + iCode *sic; + int rnum = 16; + for (sic = setFirstItem (_G.sendSet); sic; + sic = setNextItem (_G.sendSet)) { + int size, offset = 0; + aopOp (IC_LEFT (sic), sic, FALSE); + size = AOP_SIZE (IC_LEFT (sic)); + while (size--) { + char *l = + aopGet (AOP (IC_LEFT (sic)), offset); + char *b = buffer; + sprintf (b, "r%d", rnum++); + if (strcmp (l, b)) + emitcode ("mov", "%s,%s", b, l); + offset++; + } + freeAsmop (IC_LEFT (sic), NULL, sic, TRUE); + } + _G.sendSet = NULL; + } + + emitcode ("icall", ""); + + /* if we need assign a result value */ + if ((IS_ITEMP (IC_RESULT (ic)) && + (OP_SYMBOL (IC_RESULT (ic))->nRegs || + OP_SYMBOL (IC_RESULT (ic))->spildir)) || + IS_TRUE_SYMOP (IC_RESULT (ic))) { + + aopOp (IC_RESULT (ic), ic, FALSE); + + assignResultValue (IC_RESULT (ic)); + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + } + + /* adjust the stack for parameters if + required */ + if (ic->parmBytes) { + int i; + if (ic->parmBytes > 3) { + emitcode ("mov", "a,%s", spname); + emitcode ("add", "a,#0x%02x", + (-ic->parmBytes) & 0xff); + emitcode ("mov", "%s,a", spname); + } + else + for (i = 0; i < ic->parmBytes; i++) + emitcode ("dec", "%s", spname); + + } + + /* adjust the stack for parameters if required */ + if (ic->parmBytes) { + if (ic->parmBytes > 63) { + emitcode ("sbiw", "r28,%d", ic->parmBytes); + } + else { + emitcode ("subi", "r28,<(%d)", + ic->parmBytes); + emitcode ("sbci", "r29,>(%d)", + ic->parmBytes); + } + } + if (ic->regsSaved) + popZreg (ic); +} + +/*-----------------------------------------------------------------*/ +/* resultRemat - result is rematerializable */ +/*-----------------------------------------------------------------*/ +static int +resultRemat (iCode * ic) +{ + if (SKIP_IC (ic) || ic->op == IFX) + return 0; + + if (IC_RESULT (ic) && IS_ITEMP (IC_RESULT (ic))) { + symbol *sym = OP_SYMBOL (IC_RESULT (ic)); + if (sym->remat && !POINTER_SET (ic)) + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* genFunction - generated code for function entry */ +/*-----------------------------------------------------------------*/ +static void +genFunction (iCode * ic) +{ + symbol *sym; + sym_link *ftype; + int i = 0; + + _G.nRegsSaved = 0; + /* create the function header */ + emitcode (";", "-----------------------------------------"); + emitcode (";", " function %s", + (sym = OP_SYMBOL (IC_LEFT (ic)))->name); + emitcode (";", "-----------------------------------------"); + + emitcode ("", "%s:", sym->rname); + ftype = operandType (IC_LEFT (ic)); + + /* if critical function then turn interrupts off */ + if (IFFUNC_ISCRITICAL (ftype)) + emitcode ("cli", ""); + + if (IFFUNC_ISISR (sym->type)) { + } + + /* save the preserved registers that are used in this function */ + for (i = R2_IDX; i <= R15_IDX; i++) { + if (bitVectBitValue (sym->regsUsed, i)) { + _G.nRegsSaved++; + emitcode ("push", "%s", avr_regWithIdx (i)->name); + } + } + /* now for the pointer registers */ + if (bitVectBitValue (sym->regsUsed, R26_IDX)) { + _G.nRegsSaved++; + emitcode ("push", "r26"); + } + if (bitVectBitValue (sym->regsUsed, R27_IDX)) { + _G.nRegsSaved++; + emitcode ("push", "r27"); + } + if (bitVectBitValue (sym->regsUsed, R30_IDX)) { + _G.nRegsSaved++; + emitcode ("push", "r30"); + } + if (bitVectBitValue (sym->regsUsed, R31_IDX)) { + _G.nRegsSaved++; + emitcode ("push", "r31"); + } + /* adjust the stack for the function */ + if (sym->stack) { + emitcode ("push", "r28"); + emitcode ("push", "r29"); + emitcode ("in", "r28,__SP_L__"); + emitcode ("in", "r29,__SP_H__"); + if (sym->stack <= 63) { + emitcode ("sbiw", "r28,%d", sym->stack); + } + else { + emitcode ("subi", "r28,<(%d)", sym->stack); + emitcode ("sbci", "r29,>(%d)", sym->stack); + } + emitcode ("out", "__SP_L__,r28"); + emitcode ("out", "__SP_H__,r29"); + } +} + +/*-----------------------------------------------------------------*/ +/* genEndFunction - generates epilogue for functions */ +/*-----------------------------------------------------------------*/ +static void +genEndFunction (iCode * ic) +{ + symbol *sym = OP_SYMBOL (IC_LEFT (ic)); + int i; + + /* restore stack pointer */ + if (sym->stack) { + if (sym->stack <= 63) { + emitcode ("adiw", "r28,%d", sym->stack); + } + else { + emitcode ("subi", "r28,<(-%d)", sym->stack); + emitcode ("sbci", "r29,>(-%d)", sym->stack); + } + emitcode ("out", "__SP_L__,r28"); + emitcode ("out", "__SP_H__,r29"); + + /* pop frame pointer */ + emitcode ("pop", "r29"); + emitcode ("pop", "r28"); + } + /* restore preserved registers */ + if (bitVectBitValue (sym->regsUsed, R31_IDX)) { + _G.nRegsSaved--; + emitcode ("pop", "r31"); + } + if (bitVectBitValue (sym->regsUsed, R30_IDX)) { + _G.nRegsSaved--; + emitcode ("pop", "r30"); + } + if (bitVectBitValue (sym->regsUsed, R27_IDX)) { + _G.nRegsSaved--; + emitcode ("pop", "r27"); + } + if (bitVectBitValue (sym->regsUsed, R26_IDX)) { + _G.nRegsSaved--; + emitcode ("pop", "r26"); + } + for (i = R15_IDX; i >= R2_IDX; i--) { + if (bitVectBitValue (sym->regsUsed, i)) { + _G.nRegsSaved--; + emitcode ("pop", "%s", avr_regWithIdx (i)->name); + } + } + + if (IFFUNC_ISCRITICAL (sym->type)) + emitcode ("sti", ""); + + if (options.debug && currFunc) { + debugFile->writeEndFunction (currFunc, ic, 1); + } + + if (IFFUNC_ISISR (sym->type)) { + emitcode ("rti", ""); + } + else { + emitcode ("ret", ""); + } + +} + +/*-----------------------------------------------------------------*/ +/* genRet - generate code for return statement */ +/*-----------------------------------------------------------------*/ +static void +genRet (iCode * ic) +{ + int size, offset = 0; + + /* if we have no return value then + just generate the "ret" */ + if (!IC_LEFT (ic)) + goto jumpret; + + /* we have something to return then + move the return value into place */ + aopOp (IC_LEFT (ic), ic, FALSE); + size = AOP_SIZE (IC_LEFT (ic)); + + while (size--) { + if (AOP_TYPE (IC_LEFT (ic)) == AOP_LIT) { + emitcode ("ldi", "%s,%s(%d)", fAVRReturn[offset], + larray[offset], + (int) ulFromVal (AOP (IC_LEFT (ic))-> + aopu.aop_lit), offset); + } + else { + char *l; + l = aopGet (AOP (IC_LEFT (ic)), offset); + if (strcmp (fAVRReturn[offset], l)) + emitcode ("mov", "%s,%s", fAVRReturn[offset], + l); + } + offset++; + } + + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); + + jumpret: + /* generate a jump to the return label + if the next is not the return statement */ + if (!(ic->next && ic->next->op == LABEL && + IC_LABEL (ic->next) == returnLabel)) + + emitcode ("rjmp", "L%05d", returnLabel->key); + +} + +/*-----------------------------------------------------------------*/ +/* genLabel - generates a label */ +/*-----------------------------------------------------------------*/ +static void +genLabel (iCode * ic) +{ + /* special case never generate */ + if (IC_LABEL (ic) == entryLabel) + return; + + emitcode ("", "L%05d:", IC_LABEL (ic)->key); +} + +/*-----------------------------------------------------------------*/ +/* genGoto - generates a ljmp */ +/*-----------------------------------------------------------------*/ +static void +genGoto (iCode * ic) +{ + emitcode ("rjmp", "L%05d", (IC_LABEL (ic)->key)); +} + +/*-----------------------------------------------------------------*/ +/* genPlusIncr :- does addition with increment if possible */ +/*-----------------------------------------------------------------*/ +static bool +genPlusIncr (iCode * ic) +{ + unsigned int icount; + int offset = 0; + + /* will try to generate an increment */ + /* if the right side is not a literal + we cannot */ + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) + return FALSE; + + icount = (unsigned int) ulFromVal (AOP (IC_RIGHT (ic))->aopu. + aop_lit); + + /* if the sizes are greater than 2 or they are not the same regs + then we cannot */ + if (!sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic)))) + return FALSE; + + /* so we know LEFT & RESULT in the same registers and add + amount <= 63 */ + /* for short & char types */ + if (AOP_SIZE (IC_RESULT (ic)) < 2) { + if (icount == 1) { + emitcode ("inc", "%s", + aopGet (AOP (IC_LEFT (ic)), 0)); + return TRUE; + } + if (AOP_ISHIGHREG( AOP (IC_LEFT (ic)),0)) { + emitcode ("subi", "%s,<(%d)", + aopGet (AOP (IC_LEFT (ic)), 0), 0-icount); + return TRUE; + } + } + + for (offset = 0 ; offset < AOP_SIZE(IC_RESULT(ic)) ; offset++) { + if (!(AOP_ISHIGHREG(AOP(IC_RESULT(ic)),offset))) return FALSE; + } + + if (AOP_SIZE (IC_RESULT (ic)) <= 3) { + /* if register pair and starts with 26/30 then adiw */ + if (isRegPair (AOP (IC_RESULT (ic))) && icount > 0 + && icount < 64 + && (IS_REGIDX (AOP (IC_RESULT (ic)), R26_IDX) || + IS_REGIDX (AOP (IC_RESULT (ic)), R24_IDX) || + IS_REGIDX (AOP (IC_RESULT (ic)), R30_IDX))) { + emitcode ("adiw", "%s,%d", + aopGet (AOP (IC_RESULT (ic)), 0), icount); + return TRUE; + } + + /* use subi */ + emitcode ("subi", "%s,<(%d)", + aopGet (AOP (IC_RESULT (ic)), 0), 0-icount); + emitcode ("sbci", "%s,>(%d)", + aopGet (AOP (IC_RESULT (ic)), 1), 0-icount); + return TRUE; + } + + /* for 32 bit longs */ + emitcode ("subi", "%s,<(%d)", aopGet (AOP (IC_RESULT (ic)), 0), + 0-icount); + emitcode ("sbci", "%s,>(%d)", aopGet (AOP (IC_RESULT (ic)), 1), + 0-icount); + emitcode ("sbci", "%s,hlo8(%d)", aopGet (AOP (IC_RESULT (ic)), 2), + 0-icount); + emitcode ("sbci", "%s,hhi8(%d)", aopGet (AOP (IC_RESULT (ic)), 3), + 0-icount); + return TRUE; + +} + +/* This is the pure and virtuous version of this code. + * I'm pretty certain it's right, but not enough to toss the old + * code just yet... + */ +static void +adjustArithmeticResult (iCode * ic) +{ + if (opIsGptr (IC_RESULT (ic)) && + opIsGptr (IC_LEFT (ic)) && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_LEFT (ic)))) { + aopPut (AOP (IC_RESULT (ic)), + aopGet (AOP (IC_LEFT (ic)), GPTRSIZE - 1), + GPTRSIZE - 1); + } + + if (opIsGptr (IC_RESULT (ic)) && + opIsGptr (IC_RIGHT (ic)) && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_RIGHT (ic)))) { + aopPut (AOP (IC_RESULT (ic)), + aopGet (AOP (IC_RIGHT (ic)), GPTRSIZE - 1), + GPTRSIZE - 1); + } + + if (opIsGptr (IC_RESULT (ic)) && + AOP_SIZE (IC_LEFT (ic)) < GPTRSIZE && + AOP_SIZE (IC_RIGHT (ic)) < GPTRSIZE && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_LEFT (ic))) && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_RIGHT (ic)))) { + char buffer[5]; + sprintf (buffer, "%d", + pointerCode (getSpec (operandType (IC_LEFT (ic))))); + aopPut (AOP (IC_RESULT (ic)), buffer, GPTRSIZE - 1); + } +} + +/*-----------------------------------------------------------------*/ +/* genPlus - generates code for addition */ +/*-----------------------------------------------------------------*/ +static void +genPlus (iCode * ic) +{ + int size, offset = 0; + int samer; + char *l; + + /* special cases :- */ + + aopOp (IC_LEFT (ic), ic, FALSE); + aopOp (IC_RIGHT (ic), ic, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE); + + /* if I can do an increment instead + of add then GOOD for ME */ + if (genPlusIncr (ic) == TRUE) + goto release; + + size = getDataSize (IC_RESULT (ic)); + samer = sameRegs (AOP (IC_RESULT (ic)), AOP (IC_LEFT (ic))); + + while (size--) { + if (!samer) + aopPut (AOP (IC_RESULT (ic)), + aopGet (AOP (IC_LEFT (ic)), offset), offset); + + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) { + + if (offset == 0) + l = "add"; + else + l = "adc"; + + emitcode (l, "%s,%s", + aopGet (AOP (IC_RESULT (ic)), offset), + aopGet (AOP (IC_RIGHT (ic)), offset)); + } + else { + if (AOP_ISHIGHREG( AOP( IC_RESULT(ic)),offset)) { + if (offset == 0) + l = "subi"; + else + l = "sbci"; + + emitcode (l, "%s,%s(-%d)", + aopGet (AOP (IC_RESULT (ic)), offset), + larray[offset], + (int) ulFromVal (AOP (IC_RIGHT (ic))-> + aopu.aop_lit)); + } else { + if (offset == 0) + l = "add"; + else + l = "adc"; + + emitcode (l, "%s,%s", + aopGet (AOP (IC_RESULT (ic)), offset), + aopGet (AOP (IC_RIGHT (ic)), offset)); + } + } + offset++; + } + + adjustArithmeticResult (ic); + + release: + freeAsmop (IC_LEFT (ic), NULL, ic, + (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (IC_RIGHT (ic), NULL, ic, + (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genMinusDec :- does subtraction with deccrement if possible */ +/*-----------------------------------------------------------------*/ +static bool +genMinusDec (iCode * ic) +{ + unsigned int icount; + int offset ; + + /* will try to generate an increment */ + /* if the right side is not a literal + we cannot */ + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) + return FALSE; + + icount = + (unsigned int) ulFromVal (AOP (IC_RIGHT (ic))->aopu. + aop_lit); + + /* if the sizes are greater than 2 or they are not the same regs + then we cannot */ + if (!sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic)))) + return FALSE; + + /* so we know LEFT & RESULT in the same registers and add + amount <= 63 */ + /* for short & char types */ + if (AOP_SIZE (IC_RESULT (ic)) < 2) { + if (icount == 1) { + emitcode ("dec", "%s", + aopGet (AOP (IC_LEFT (ic)), 0)); + return TRUE; + } + if (AOP_ISHIGHREG( AOP ( IC_LEFT(ic)),0)) { + emitcode ("subi", "%s,<(%d)", + aopGet (AOP (IC_LEFT (ic)), 0), icount); + return TRUE; + } + } + + for (offset = 0 ; offset < AOP_SIZE(IC_RESULT(ic)) ; offset++) { + if (!(AOP_ISHIGHREG(AOP(IC_RESULT(ic)),offset))) return FALSE; + } + + if (AOP_SIZE (IC_RESULT (ic)) <= 3) { + /* if register pair and starts with 26/30 then adiw */ + if (isRegPair (AOP (IC_RESULT (ic))) && icount > 0 + && icount < 64 + && (IS_REGIDX (AOP (IC_RESULT (ic)), R26_IDX) || + IS_REGIDX (AOP (IC_RESULT (ic)), R24_IDX) || + IS_REGIDX (AOP (IC_RESULT (ic)), R30_IDX))) { + emitcode ("sbiw", "%s,%d", + aopGet (AOP (IC_RESULT (ic)), 0), icount); + return TRUE; + } + + /* use subi */ + emitcode ("subi", "%s,<(%d)", + aopGet (AOP (IC_RESULT (ic)), 0), icount); + emitcode ("sbci", "%s,>(%d)", + aopGet (AOP (IC_RESULT (ic)), 1), icount); + return TRUE; + } + /* for 32 bit longs */ + emitcode ("subi", "%s,<(%d)", aopGet (AOP (IC_RESULT (ic)), 0), + icount); + emitcode ("sbci", "%s,>(%d)", aopGet (AOP (IC_RESULT (ic)), 1), + icount); + emitcode ("sbci", "%s,hlo8(%d)", aopGet (AOP (IC_RESULT (ic)), 2), + icount); + emitcode ("sbci", "%s,hhi8(%d)", aopGet (AOP (IC_RESULT (ic)), 3), + icount); + return TRUE; + +} + +/*-----------------------------------------------------------------*/ +/* genMinus - generates code for subtraction */ +/*-----------------------------------------------------------------*/ +static void +genMinus (iCode * ic) +{ + int size, offset = 0, samer; + char *l; + + aopOp (IC_LEFT (ic), ic, FALSE); + aopOp (IC_RIGHT (ic), ic, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE); + + /* if I can do an decrement instead + of subtract then GOOD for ME */ + if (genMinusDec (ic) == TRUE) + goto release; + + size = getDataSize (IC_RESULT (ic)); + samer = sameRegs (AOP (IC_RESULT (ic)), AOP (IC_LEFT (ic))); + while (size--) { + if (!samer) + aopPut (AOP (IC_RESULT (ic)), + aopGet (AOP (IC_LEFT (ic)), offset), offset); + + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) { + + if (offset == 0) + l = "sub"; + else + l = "sbc"; + + emitcode (l, "%s,%s", + aopGet (AOP (IC_RESULT (ic)), offset), + aopGet (AOP (IC_RIGHT (ic)), offset)); + } + else { + if (AOP_ISHIGHREG(AOP (IC_RESULT (ic)),offset)) { + if (offset == 0) + l = "subi"; + else + l = "sbci"; + + emitcode (l, "%s,%s(%d)", + aopGet (AOP (IC_RESULT (ic)), offset), + larray[offset], + (int) ulFromVal (AOP (IC_RIGHT (ic))-> + aopu.aop_lit)); + } else { + if (offset == 0) + l = "sub"; + else + l = "sbc"; + + emitcode (l, "%s,%s", + aopGet (AOP (IC_RESULT (ic)), offset), + aopGet (AOP (IC_RIGHT (ic)), offset)); + } + } + offset++; + } + + adjustArithmeticResult (ic); + + release: + freeAsmop (IC_LEFT (ic), NULL, ic, + (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (IC_RIGHT (ic), NULL, ic, + (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genMultOneByte : 8 bit multiplication & division */ +/*-----------------------------------------------------------------*/ +static void +genMultOneByte (operand * left, operand * right, operand * result) +{ + sym_link *opetype = operandType (result); + symbol *lbl; + int size, offset; + + /* (if two literals, the value is computed before) */ + /* if one literal, literal on the right */ + if (AOP_TYPE (left) == AOP_LIT) { + operand *t = right; + right = left; + left = t; + } + + size = AOP_SIZE (result); + + if (SPEC_USIGN (opetype)) { + emitcode ("mul", "%s,%s", aopGet (AOP (left), 0), + aopGet (AOP (right), 0)); + } + else { + emitcode ("muls", "%s,%s", aopGet (AOP (left), 0), + aopGet (AOP (right), 0)); + } + aopPut (AOP (result), "r0", 0); + if (size > 1) { + aopPut (AOP (result), "r1", 1); + offset = 2; + size -= 2; + if (SPEC_USIGN (opetype)) { + while (size--) { + aopPut (AOP (result), zero, offset++); + } + } + else { + if (size) { + lbl = newiTempLabel (NULL); + emitcode ("ldi", "r24,0"); + emitcode ("brcc", "L%05d", lbl->key); + emitcode ("ldi", "r24,0xff)"); + emitcode ("", "L%05d:", lbl->key); + while (size--) + aopPut (AOP (result), "r24", + offset++); + } + } + } + return; +} + +/*-----------------------------------------------------------------*/ +/* genMult - generates code for multiplication */ +/*-----------------------------------------------------------------*/ +static void +genMult (iCode * ic) +{ + operand *left = IC_LEFT (ic); + operand *right = IC_RIGHT (ic); + operand *result = IC_RESULT (ic); + + /* assign the amsops */ + aopOp (left, ic, FALSE); + aopOp (right, ic, FALSE); + aopOp (result, ic, TRUE); + + /* if both are of size == 1 */ + if (AOP_SIZE (left) == 1 && AOP_SIZE (right) == 1) { + genMultOneByte (left, right, result); + goto release; + } + + /* should have been converted to function call */ + assert (0); + + release: + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genDiv - generates code for division */ +/*-----------------------------------------------------------------*/ +static void +genDiv (iCode * ic) +{ + /* should have been converted to function call */ + assert (0); +} + +/*-----------------------------------------------------------------*/ +/* genMod - generates code for division */ +/*-----------------------------------------------------------------*/ +static void +genMod (iCode * ic) +{ + /* should have been converted to function call */ + assert (0); + +} + +enum { + AVR_EQ = 0, + AVR_NE, + AVR_LT, + AVR_GE +}; + +/*-----------------------------------------------------------------*/ +/* revavrcnd - reverse a conditional for avr */ +/*-----------------------------------------------------------------*/ +static int +revavrcnd (int type) +{ + static struct { + int type, rtype; + } rar[] = { + { + AVR_EQ, AVR_NE} + , { + AVR_LT, AVR_GE} + }; + int i; + + for (i = 0; i < (sizeof (rar) / sizeof (rar[0])); i++) { + if (rar[i].type == type) + return rar[i].rtype; + if (rar[i].rtype == type) + return rar[i].type; + } + assert (0); /* cannot happen */ + return 0; /* makes the compiler happy */ +} + +static char *br_name[4] = { "breq", "brne", "brlt", "brge" }; +static char *br_uname[4] = { "breq", "brne", "brlo", "brcc" }; + +/*-----------------------------------------------------------------*/ +/* genBranch - generate the branch instruction */ +/*-----------------------------------------------------------------*/ +static void +genBranch (iCode * ifx, int br_type, int sign) +{ + int tj = (IC_TRUE (ifx) ? 1 : 0); + + if (tj) { /* if true jump */ + char *nm = (sign ? br_name[br_type] : br_uname[br_type]); + emitcode (nm, "L%05d", IC_TRUE (ifx)->key); + } + else { /* if false jump */ + int rtype = revavrcnd (br_type); + char *nm = (sign ? br_name[rtype] : br_uname[rtype]); + emitcode (nm, "L%05d", IC_FALSE (ifx)->key); + } + ifx->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genCmp - compare & jump */ +/*-----------------------------------------------------------------*/ +static void +genCmp (iCode * ic, iCode * ifx, int br_type) +{ + operand *left, *right, *result; + sym_link *letype, *retype; + symbol *lbl; + int sign, size, offset = 0; + + left = IC_LEFT (ic); + right = IC_RIGHT (ic); + result = IC_RESULT (ic); + + letype = getSpec (operandType (left)); + retype = getSpec (operandType (right)); + sign = !(SPEC_USIGN (letype) | SPEC_USIGN (retype)); + + /* assign the amsops */ + aopOp (left, ic, FALSE); + aopOp (right, ic, FALSE); + aopOp (result, ic, TRUE); + size = AOP_SIZE (left); + + if (ifx) { + if (size == 1) { + if (AOP_TYPE (right) == AOP_LIT) { + emitcode ("cpi", "%s,<(%d)", + aopGet (AOP (left), 0), + (int) ulFromVal (AOP (IC_RIGHT (ic))-> + aopu.aop_lit)); + genBranch (ifx, br_type, sign); + } + else { /* right != literal */ + emitcode ("cp", "%s,%s", + aopGet (AOP (left), 0), + aopGet (AOP (right), 0)); + genBranch (ifx, br_type, sign); + } + } + else { /* size != 1 */ + while (size--) { + if (offset == 0) + emitcode ("cp", "%s,%s", + aopGet (AOP (left), 0), + aopGet (AOP (right), 0)); + else + emitcode ("cpc", "%s,%s", + aopGet (AOP (left), offset), + aopGet (AOP (right), + offset)); + offset++; + } + genBranch (ifx, br_type, sign); + } + } + else { /* no ifx */ + emitcode ("clr", "r0"); + while (size--) { + if (offset == 0) + emitcode ("cp", "%s,%s", + aopGet (AOP (left), 0), + aopGet (AOP (right), 0)); + else + emitcode ("cpc", "%s,%s", + aopGet (AOP (left), offset), + aopGet (AOP (right), offset)); + offset++; + } + lbl = newiTempLabel (NULL); + br_type = revavrcnd (br_type); + if (sign) + emitcode (br_uname[br_type], "L%05d", lbl->key); + else + emitcode (br_name[br_type], "L%05d", lbl->key); + emitcode ("inc", "r0"); + emitcode ("", "L%05d:", lbl->key); + aopPut (AOP (result), "r0", 0); + size = AOP_SIZE (result) - 1; + offset = 1; + while (size--) + aopPut (AOP (result), zero, offset++); + } + + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genCmpGt :- greater than comparison */ +/*-----------------------------------------------------------------*/ +static void +genCmpGt (iCode * ic, iCode * ifx) +{ + /* should have transformed by the parser */ + assert (0); +} + +/*-----------------------------------------------------------------*/ +/* genCmpLt - less than comparisons */ +/*-----------------------------------------------------------------*/ +static void +genCmpLt (iCode * ic, iCode * ifx) +{ + genCmp (ic, ifx, AVR_LT); +} + +/*-----------------------------------------------------------------*/ +/* genCmpEq - generates code for equal to */ +/*-----------------------------------------------------------------*/ +static void +genCmpEq (iCode * ic, iCode * ifx) +{ + genCmp (ic, ifx, AVR_EQ); +} + +/*-----------------------------------------------------------------*/ +/* genCmpNe - generates code for not equal to */ +/*-----------------------------------------------------------------*/ +static void +genCmpNe (iCode * ic, iCode * ifx) +{ + genCmp (ic, ifx, AVR_NE); +} + +/*-----------------------------------------------------------------*/ +/* genCmpGe - generates code for greater than equal to */ +/*-----------------------------------------------------------------*/ +static void +genCmpGe (iCode * ic, iCode * ifx) +{ + genCmp (ic, ifx, AVR_GE); +} + +/*-----------------------------------------------------------------*/ +/* genCmpLe - generates code for less than equal to */ +/*-----------------------------------------------------------------*/ +static void +genCmpLe (iCode * ic, iCode * ifx) +{ + operand *left = IC_LEFT (ic); + operand *right = IC_RIGHT (ic); + + IC_RIGHT (ic) = left; + IC_LEFT (ic) = right; + genCmp (ic, ifx, AVR_GE); +} + +/*-----------------------------------------------------------------*/ +/* ifxForOp - returns the icode containing the ifx for operand */ +/*-----------------------------------------------------------------*/ +static iCode * +ifxForOp (operand * op, iCode * ic) +{ + /* if true symbol then needs to be assigned */ + if (IS_TRUE_SYMOP (op)) + return NULL; + + /* if this has register type condition and + the next instruction is ifx with the same operand + and live to of the operand is upto the ifx only then */ + if (ic->next && + ic->next->op == IFX && + IC_COND (ic->next)->key == op->key && + OP_SYMBOL (op)->liveTo <= ic->next->seq) return ic->next; + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* genAndOp - for && operation */ +/*-----------------------------------------------------------------*/ +static void +genAndOp (iCode * ic) +{ + operand *left, *right, *result; + symbol *tlbl; + int size, offset; + + /* note here that && operations that are in an + if statement are taken away by backPatchLabels + only those used in arthmetic operations remain */ + aopOp ((left = IC_LEFT (ic)), ic, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, FALSE); + + tlbl = newiTempLabel (NULL); + toBoolean (left, "r0", TRUE); + toBoolean (right, "r1", TRUE); + emitcode ("and", "r0,r1"); + emitcode ("ldi", "r24,1"); + emitcode ("breq", "L%05d", tlbl->key); + emitcode ("dec", "r24"); + emitcode ("", "L%05d:", tlbl->key); + aopPut (AOP (result), "r24", 0); + size = AOP_SIZE (result) - 1; + offset = 1; + while (size--) + aopPut (AOP (result), zero, offset++); + + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (result, NULL, ic, TRUE); +} + + +/*-----------------------------------------------------------------*/ +/* genOrOp - for || operation */ +/*-----------------------------------------------------------------*/ +static void +genOrOp (iCode * ic) +{ + operand *left, *right, *result; + symbol *tlbl; + int size, offset; + + /* note here that || operations that are in an + if statement are taken away by backPatchLabels + only those used in arthmetic operations remain */ + aopOp ((left = IC_LEFT (ic)), ic, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, FALSE); + + tlbl = newiTempLabel (NULL); + toBoolean (left, "r0", TRUE); + toBoolean (right, "r0", FALSE); + emitcode ("ldi", "r24,1"); + emitcode ("breq", "L%05d", tlbl->key); + emitcode ("dec", "r24"); + emitcode ("", "L%05d:", tlbl->key); + aopPut (AOP (result), "r24", 0); + size = AOP_SIZE (result) - 1; + offset = 1; + while (size--) + aopPut (AOP (result), zero, offset++); + + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (result, NULL, ic, TRUE); +} + +enum { + AVR_AND = 0, AVR_OR, AVR_XOR +}; +static char *bopnames_lit[] = { "andi", "ori" }; +static char *bopnames[] = { "and", "or", "eor" }; +/*-----------------------------------------------------------------*/ +/* genBitWise - generate bitwise operations */ +/*-----------------------------------------------------------------*/ +static void +genBitWise (iCode * ic, iCode * ifx, int bitop) +{ + operand *left, *right, *result; + int size, offset = 0; + char *l; + symbol *lbl, *lbl1; + int samerl, samerr; + + aopOp ((left = IC_LEFT (ic)), ic, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, TRUE); + + size = AOP_SIZE (left); + offset = 0; + if (ifx) { /* used only for jumps */ + if (AOP_TYPE (right) == AOP_LIT && + (bitop == AVR_AND || bitop == AVR_OR)) { + int lit = + (int) ulFromVal (AOP (right)->aopu. + aop_lit); + int p2 = powof2 (lit); + if (bitop == AVR_AND && (p2 >= 0)) { /* right side is a power of 2 */ + l = aopGet (AOP (left), p2 / 8); + if (IC_TRUE (ifx)) { + emitcode ("sbrc", "%s,%d", l, + (p2 % 8)); + emitcode ("rjmp", "L%05d", + IC_TRUE (ifx)->key); + } + else { + emitcode ("sbrs", "%s,%d", l, + (p2 % 8)); + emitcode ("rjmp", "L%05d", + IC_FALSE (ifx)->key); + } + } + else { /* right not power of two */ + int eh = OP_SYMBOL (left)->liveTo <= ic->seq; + if (size == 1) { + if (eh && AOP_ISHIGHREG(AOP(IC_LEFT(ic)),0)) { + emitcode (bopnames_lit[bitop], + "%s,<(%d)", + aopGet (AOP (IC_LEFT (ic)), 0), lit); + } + else { + MOVR24 (aopGet (AOP (IC_LEFT (ic)), 0)); + emitcode (bopnames_lit[bitop], "r24,<(%d)", lit); + } + lbl = newiTempLabel (NULL); + if (IC_TRUE (ifx)) { + emitcode ("breq", "L%05d", lbl->key); + emitcode ("rjmp", "L%05d", IC_TRUE (ifx)->key); + } + else { + emitcode ("brne", "L%05d", lbl->key); + emitcode ("rjmp", "L%05d", IC_FALSE (ifx)-> key); + } + emitcode ("", "L%05d:", lbl->key); + } + else if (size == 2) { + emitcode ("mov", "r24,%s", aopGet (AOP (IC_LEFT (ic)), 0)); + emitcode ("mov", "r25,%s", aopGet (AOP (IC_LEFT (ic)), 1)); + emitcode (bopnames_lit[bitop], "r24,<(%d)", lit); + emitcode (bopnames_lit[bitop], "r25,>(%d)", lit); + emitcode ("sbiw", "r24,0"); + lbl = newiTempLabel (NULL); + if (IC_TRUE (ifx)) { + emitcode ("breq", "L%05d", lbl->key); + emitcode ("rjmp", "L%05d", IC_TRUE (ifx)->key); + } + else { + emitcode ("brne", "L%05d", lbl->key); + emitcode ("rjmp", "L%05d", IC_FALSE (ifx)->key); + } + emitcode ("", "L%05d:", lbl->key); + } + else { + lbl = newiTempLabel (NULL); + lbl1 = newiTempLabel (NULL); + while (size--) { + if (eh && AOP_ISHIGHREG(AOP(IC_LEFT(ic)),offset)) { + emitcode (bopnames_lit [bitop], "%s,<(%d)", + aopGet (AOP (IC_LEFT (ic)), offset), + lit); + } + else { + char *l = aopGet (AOP (IC_LEFT (ic)), offset); + MOVR24 (l); + emitcode ("andi", "r24,<(%d)", lit); + } + emitcode ("brne", "L%05d", lbl->key); + offset++; + } + /* all are zero */ + if (IC_FALSE (ifx)) + emitcode ("rjmp", "L%05d", IC_FALSE (ifx)-> key); + else + emitcode ("rjmp", "L%05d", lbl1->key); + emitcode ("", "L%05d:", lbl->key); + /* not zero */ + if (IC_TRUE (ifx)) + emitcode ("rjmp", "L%05d", IC_TRUE (ifx)->key); + emitcode ("", "L%05d:", lbl1->key); + + } + } + } + else { /* right is not a literal */ + int eh = OP_SYMBOL (left)->liveTo <= ic->seq; + int reh = OP_SYMBOL (right)->liveTo <= ic->seq; + if (size == 1) { + if (eh) { + emitcode (bopnames[bitop], "%s,%s", aopGet (AOP (IC_LEFT (ic)), 0), + aopGet (AOP (IC_RIGHT (ic)), 0)); + } + else if (reh) { + emitcode (bopnames[bitop], "%s,%s", + aopGet (AOP (IC_RIGHT (ic)), 0), + aopGet (AOP (IC_LEFT (ic)), 0)); + } + else { + MOVR0 (aopGet (AOP (IC_LEFT (ic)), 0)); + emitcode (bopnames[bitop], "r0,%s", + aopGet (AOP (IC_RIGHT (ic)), 0)); + } + lbl = newiTempLabel (NULL); + if (IC_TRUE (ifx)) { + emitcode ("breq", "L%05d", lbl->key); + emitcode ("rjmp", "L%05d", + IC_TRUE (ifx)->key); + } + else { + emitcode ("brne", "L%05d", lbl->key); + emitcode ("rjmp", "L%05d", + IC_FALSE (ifx)->key); + } + emitcode ("", "L%05d:", lbl->key); + } + else if (size == 2) { + emitcode ("mov", "r24,%s", + aopGet (AOP (IC_LEFT (ic)), 0)); + emitcode ("mov", "r25,%s", + aopGet (AOP (IC_LEFT (ic)), 1)); + emitcode (bopnames[bitop], "r24,%s", + aopGet (AOP (IC_RIGHT (ic)), 0)); + emitcode (bopnames[bitop], "r25,%s", + aopGet (AOP (IC_RIGHT (ic)), 1)); + emitcode ("sbiw", "r24,0"); + lbl = newiTempLabel (NULL); + if (IC_TRUE (ifx)) { + emitcode ("breq", "L%05d", lbl->key); + emitcode ("rjmp", "L%05d", IC_TRUE (ifx)->key); + } + else { + emitcode ("brne", "L%05d", lbl->key); + emitcode ("rjmp", "L%05d", IC_FALSE (ifx)->key); + } + emitcode ("", "L%05d:", lbl->key); + } + else { + lbl = newiTempLabel (NULL); + lbl1 = newiTempLabel (NULL); + while (size--) { + if (eh) { + emitcode (bopnames[bitop], "%s,%s", + aopGet (AOP (IC_LEFT (ic)), offset), + aopGet (AOP (IC_RIGHT (ic)), offset)); + } + else if (reh) { + emitcode (bopnames[bitop], "%s,%s", + aopGet (AOP (IC_RIGHT (ic)), offset), + aopGet (AOP (IC_LEFT (ic)), offset)); + } + else { + MOVR0 (aopGet (AOP (IC_LEFT (ic)), offset)); + emitcode (bopnames[bitop], "r0,%s", + aopGet (AOP (IC_RIGHT (ic)), offset)); + } + emitcode ("brne", "L%05d", lbl->key); + offset++; + } + /* all are zero */ + if (IC_FALSE (ifx)) + emitcode ("rjmp", "L%05d", IC_FALSE (ifx)->key); + else + emitcode ("rjmp", "L%05d", lbl1->key); + emitcode ("", "L%05d:", lbl->key); + /* not zero */ + if (IC_TRUE (ifx)) + emitcode ("rjmp", "L%05d", IC_TRUE (ifx)->key); + emitcode ("", "L%05d:", lbl1->key); + + } + } + goto release; + } + + /* result needs to go a register */ + samerl = sameRegs (AOP (IC_RESULT (ic)), AOP (IC_LEFT (ic))); + samerr = sameRegs (AOP (IC_RESULT (ic)), AOP (IC_RIGHT (ic))); + while (size--) { + if (AOP_TYPE (right) == AOP_LIT) { + unsigned int lit = + (int) ulFromVal (AOP (right)->aopu. + aop_lit); + if (((lit >> (8 * offset)) & 0xff) == 0) { + if (bitop == AVR_AND) { + aopPut (AOP (result), zero, offset++); + continue; + } + else if (bitop == AVR_OR) { + if (!samerl) + aopPut (AOP (result), + aopGet (AOP (left), + offset), + offset); + offset++; + continue; + } + } + } + if (samerl) { + if (AOP_TYPE (IC_RIGHT (ic)) == AOP_LIT && + AOP_ISHIGHREG(AOP(IC_LEFT(ic)),offset) && + (bitop == AVR_AND || bitop == AVR_OR)) { + emitcode (bopnames_lit[bitop], "%s,%s(%d)", + aopGet (AOP (IC_LEFT (ic)), offset), + larray[offset], + (int) ulFromVal (AOP (right)-> aopu.aop_lit)); + } + else { + emitcode (bopnames[bitop], "%s,%s", + aopGet (AOP (IC_LEFT (ic)), offset), + aopGet (AOP (IC_RIGHT (ic)), offset)); + } + } + else if (samerr) { + emitcode (bopnames[bitop], "%s,%s", + aopGet (AOP (IC_RIGHT (ic)), offset), + aopGet (AOP (IC_LEFT (ic)), offset)); + } + else { + aopPut (AOP (IC_RESULT (ic)), + aopGet (AOP (IC_LEFT (ic)), offset), offset); + emitcode (bopnames[bitop], + aopGet (AOP (IC_RESULT (ic)), offset), + aopGet (AOP (IC_RIGHT (ic)), offset)); + } + offset++; + } + release: + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genAnd - code for and */ +/*-----------------------------------------------------------------*/ +static void +genAnd (iCode * ic, iCode * ifx) +{ + genBitWise (ic, ifx, AVR_AND); +} + +/*-----------------------------------------------------------------*/ +/* genOr - code for or */ +/*-----------------------------------------------------------------*/ +static void +genOr (iCode * ic, iCode * ifx) +{ + genBitWise (ic, ifx, AVR_OR); +} + +/*-----------------------------------------------------------------*/ +/* genXor - code for xclusive or */ +/*-----------------------------------------------------------------*/ +static void +genXor (iCode * ic, iCode * ifx) +{ + genBitWise (ic, ifx, AVR_XOR); +} + +/*-----------------------------------------------------------------*/ +/* genInline - write the inline code out */ +/*-----------------------------------------------------------------*/ +static void +genInline (iCode * ic) +{ + char *buffer, *bp, *bp1; + bool inComment = FALSE; + + _G.inLine += (!options.asmpeep); + + buffer = bp = bp1 = Safe_strdup (IC_INLINE (ic)); + + /* emit each line as a code */ + while (*bp) + { + switch (*bp) + { + case ';': + inComment = TRUE; + ++bp; + break; + + case '\n': + inComment = FALSE; + *bp++ = '\0'; + emitcode (bp1, ""); + bp1 = bp; + break; + + default: + /* Add \n for labels, not dirs such as c:\mydir */ + if (!inComment && (*bp == ':') && (isspace((unsigned char)bp[1]))) + { + ++bp; + *bp = '\0'; + ++bp; + emitcode (bp1, ""); + bp1 = bp; + } + else + ++bp; + break; + } + } + if (bp1 != bp) + emitcode (bp1, ""); + + Safe_free (buffer); + + _G.inLine -= (!options.asmpeep); +} + +/*-----------------------------------------------------------------*/ +/* genRotC - rotate right/left with carry , lr = 1 rotate right */ +/*-----------------------------------------------------------------*/ +static void +genRotC (iCode * ic, int lr) +{ + operand *left, *result; + int size, offset = 0; + + /* rotate right with carry */ + left = IC_LEFT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + + /* move it to the result */ + size = AOP_SIZE (result); + if (!sameRegs (AOP (left), AOP (result))) { + offset = 0; + while (size--) { + aopPut (AOP (result), + aopGet (AOP (left), offset), offset); + offset++; + } + size = AOP_SIZE (result); + } + if (lr) + offset = size - 1; + else + offset = 0; + + CLRC; + emitcode ("sbrc", "%s,%d", aopGet (AOP (result), offset), + (lr ? 0 : 7)); + emitcode ("sec", ""); + + while (size--) { + emitcode ((lr ? "ror" : "rol"), "%s", + aopGet (AOP (result), offset)); + if (lr) + offset--; + else + offset++; + } + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genRRC - rotate right with carry */ +/*-----------------------------------------------------------------*/ +static void +genRRC (iCode * ic) +{ + genRotC (ic, 1); +} + +/*-----------------------------------------------------------------*/ +/* genRLC - generate code for rotate left with carry */ +/*-----------------------------------------------------------------*/ +static void +genRLC (iCode * ic) +{ + genRotC (ic, 0); +} + +/*-----------------------------------------------------------------*/ +/* genGetHbit - generates code get highest order bit */ +/*-----------------------------------------------------------------*/ +static void +genGetHbit (iCode * ic) +{ + operand *left, *result; + int size, offset; + + left = IC_LEFT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + + size = AOP_SIZE (result); + if (!sameRegs (AOP (left), AOP (result))) { + emitcode ("clr", "%s", aopGet (AOP (result), size - 1)); + emitcode ("sbrc", "%s,7", aopGet (AOP (left), size - 1)); + emitcode ("subi", "%s,<(-1)", + aopGet (AOP (result), size - 1)); + } + else { + emitcode ("clr", "r0"); + emitcode ("sbrc", "%s,7", aopGet (AOP (left), size - 1)); + emitcode ("subi", "r0,<(-1)"); + aopPut (AOP (result), "r0", 0); + } + offset = 1; + size--; + while (size--) { + emitcode ("clr", aopGet (AOP (result), offset++)); + } + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genShiftLeftLit - shift left by a known amount */ +/*-----------------------------------------------------------------*/ +static void +genShiftLeftLit (iCode * ic) +{ + operand *left, *right, *result; + int size, shCount, offset = 0; + int lByteZ = 0; + + right = IC_RIGHT (ic); + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + size = AOP_SIZE (result); + shCount = (int) ulFromVal (AOP (right)->aopu.aop_lit); + + if (shCount > (size * 8 - 1)) { + while (size--) + aopPut (AOP (result), zero, offset++); + goto release; + } + switch (size) { + case 1: + if (!sameRegs (AOP (left), AOP (result))) + aopPut (AOP (result), aopGet (AOP (left), 0), 0); + if (shCount >= 4) { + if (AOP_ISHIGHREG(AOP(result),0)) { + emitcode ("swap", "%s", aopGet (AOP (result), 0)); + emitcode ("andi", "%s,0xf0"); + } else { + emitcode ("ldi","r24,0xf0"); + emitcode ("swap", "%s", aopGet (AOP (result), 0)); + emitcode ("and", "%s,r24"); + } + shCount -= 4; + } + if (shCount == 1) { + emitcode ("add", "%s,%s", aopGet (AOP (result), 0), + aopGet (AOP (result), 0)); + shCount--; + } + while (shCount--) + emitcode ("lsl", "%s", aopGet (AOP (result), 0)); + break; + case 2: + if (shCount >= 12) { + aopPut (AOP (result), aopGet (AOP (left), 0), 1); + aopPut (AOP (result), zero, 0); + emitcode ("swap", "%s", aopGet (AOP (result), 1)); + if (AOP_ISHIGHREG(AOP(result),1)) { + emitcode ("andi", "%s,0xf0", aopGet (AOP (result), 1)); + } else { + emitcode ("ldi","r24,0xf0"); + emitcode ("and", "%s,r24", aopGet (AOP (result), 1)); + } + shCount -= 12; + lByteZ = 1; + } + if (shCount >= 8) { + aopPut (AOP (result), aopGet (AOP (left), 0), 1); + aopPut (AOP (result), zero, 0); + shCount -= 8; + lByteZ = 1; + } + if (shCount >= 4) { + shCount -= 4; + if (!sameRegs (AOP (left), AOP (result))) { + aopPut (AOP (result), aopGet (AOP (left), 0), + 0); + aopPut (AOP (result), aopGet (AOP (left), 1), + 1); + } + emitcode ("mov", "r24,%s", aopGet (AOP (result), 0)); + emitcode ("andi", "r24,0x0f"); + if (!(AOP_ISHIGHREG(AOP(result),0) && AOP_ISHIGHREG(AOP(result),1))) { + emitcode("ldi","r25,0xf0"); + } + emitcode ("swap", "%s", aopGet (AOP (result), 0)); + if (AOP_ISHIGHREG(AOP(result),0)) { + emitcode ("andi", "%s,0xf0", aopGet (AOP (result), 0)); + } else { + emitcode ("and", "%s,r25", aopGet (AOP (result), 0)); + } + emitcode ("swap", "%s", aopGet (AOP (result), 1)); + if (AOP_ISHIGHREG(AOP(result),1)) { + emitcode ("andi", "%s,0xf0", aopGet (AOP (result), 1)); + } else { + emitcode ("and", "%s,r25", aopGet (AOP (result), 1)); + } + emitcode ("or", "%s,r24", aopGet (AOP (result), 1)); + while (shCount--) { + emitcode ("lsl", "%s", aopGet (AOP (result), 0)); + emitcode ("rol", "%s", aopGet (AOP (result), 1)); + } + } + if (!lByteZ && !sameRegs (AOP (result), AOP (left)) + && shCount) { + offset = 0; + while (size--) { + aopPut (AOP (result), + aopGet (AOP (left), offset), offset); + offset++; + } + } + while (shCount--) { + if (lByteZ) { + emitcode ("lsl", "%s", aopGet (AOP (result), 1)); + } + else { + emitcode ("lsl", "%s", aopGet (AOP (result), 0)); + emitcode ("rol", "%s", aopGet (AOP (result), 1)); + } + } + break; + case 3: + assert ("shifting generic pointer ?\n"); + break; + case 4: + /* 32 bits we do only byte boundaries */ + if (shCount >= 24) { + aopPut (AOP (result), aopGet (AOP (left), 0), 3); + aopPut (AOP (result), zero, 2); + aopPut (AOP (result), zero, 1); + aopPut (AOP (result), zero, 0); + lByteZ = 3; + shCount -= 24; + } + if (shCount >= 16) { + aopPut (AOP (result), aopGet (AOP (left), 0), 3); + aopPut (AOP (result), aopGet (AOP (left), 1), 2); + aopPut (AOP (result), zero, 1); + aopPut (AOP (result), zero, 0); + lByteZ = 2; + shCount -= 16; + } + if (shCount >= 8) { + aopPut (AOP (result), aopGet (AOP (left), 0), 3); + aopPut (AOP (result), aopGet (AOP (left), 1), 2); + aopPut (AOP (result), aopGet (AOP (left), 2), 1); + aopPut (AOP (result), zero, 0); + shCount -= 8; + lByteZ = 1; + } + if (!lByteZ && !sameRegs (AOP (left), AOP (right))) { + offset = 0; + while (size--) { + aopPut (AOP (result), + aopGet (AOP (left), offset), offset); + offset++; + } + offset = 0; + size = AOP_SIZE (result); + } + if (shCount) { + switch (lByteZ) { + case 0: + while (shCount--) { + emitcode ("lsl", "%s", aopGet (AOP (result), 0)); + emitcode ("rol", "%s", aopGet (AOP (result), 1)); + emitcode ("rol", "%s", aopGet (AOP (result), 2)); + emitcode ("rol", "%s", aopGet (AOP (result), 3)); + } + break; + case 1: + while (shCount--) { + emitcode ("lsl", "%s", aopGet (AOP (result), 1)); + emitcode ("rol", "%s", aopGet (AOP (result), 2)); + emitcode ("rol", "%s", aopGet (AOP (result), 3)); + } + break; + case 2: + while (shCount--) { + emitcode ("lsl", "%s", aopGet (AOP (result), 2)); + emitcode ("rol", "%s", aopGet (AOP (result), 3)); + } + break; + case 3: + while (shCount--) { + emitcode ("lsl", "%s", aopGet (AOP (result), 3)); + } + break; + } + } + } + + release: + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genLeftShift - generates code for left shifting */ +/*-----------------------------------------------------------------*/ +static void +genLeftShift (iCode * ic) +{ + operand *left, *right, *result; + int size, offset; + symbol *tlbl; + + right = IC_RIGHT (ic); + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + aopOp (right, ic, FALSE); + + if (AOP_TYPE (right) == AOP_LIT) { + genShiftLeftLit (ic); + return; + } + + /* unknown count */ + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + size = AOP_SIZE (result); + offset = 0; + if (AOP_SIZE (right) > 1) { + if (isRegPair (AOP (right))) { + emitcode ("movw", "r24,%s", aopGet (AOP (right), 0)); + } + else { + emitcode ("mov", "r24,%s", aopGet (AOP (right), 0)); + emitcode ("mov", "r25,%s", aopGet (AOP (right), 1)); + } + } + else { + emitcode ("mov", "r24,%s", aopGet (AOP (right), 0)); + } + if (!sameRegs (AOP (left), AOP (result))) { + while (size--) { + aopPut (AOP (result), aopGet (AOP (left), offset), + offset); + offset++; + } + size = AOP_SIZE (result); + } + tlbl = newiTempLabel (NULL); + emitcode ("", "L%05d:", tlbl->key); + offset = 0; + while (size--) { + if (offset) + emitcode ("rol", "%s", aopGet (AOP (result), offset)); + else + emitcode ("lsl", "%s", aopGet (AOP (result), 0)); + offset++; + } + if (AOP_SIZE (right) > 1) + emitcode ("sbiw", "r24,1"); + else + emitcode ("dec", "r24"); + emitcode ("brne", "L%05d", tlbl->key); + + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genShiftRightLit - generate for right shift with known count */ +/*-----------------------------------------------------------------*/ +static void +genShiftRightLit (iCode * ic) +{ + operand *left = IC_LEFT (ic) + , *right = IC_RIGHT (ic) + , *result = IC_RESULT (ic); + int size, shCount, offset = 0; + int hByteZ = 0; + sym_link *letype = getSpec (operandType (left)); + int sign = !SPEC_USIGN (letype); + + right = IC_RIGHT (ic); + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + size = AOP_SIZE (result); + shCount = (int) ulFromVal (AOP (right)->aopu.aop_lit); + + /* if signed then give up and use a loop to shift */ + if (sign) { + symbol *tlbl; + if (!sameRegs (AOP (left), AOP (result))) { + while (size--) { + aopPut (AOP (result), + aopGet (AOP (left), offset), offset); + offset++; + } + size = AOP_SIZE (result); + offset = 0; + } + /* be as economical as possible */ + if (shCount <= 4) { + while (shCount--) { + size = AOP_SIZE (result); + offset = size - 1; + while (size--) { + /* highest order byte */ + if (offset == (AOP_SIZE(result)-1)) + emitcode ("asr", "%s", aopGet (AOP (result), offset)); + else + emitcode ("ror", "%s", aopGet (AOP (result), offset)); + offset--; + } + } + } + else { + emitcode ("ldi", "r24,<(%d)", shCount); + tlbl = newiTempLabel (NULL); + emitcode ("", "L%05d:", tlbl->key); + offset = size - 1; + while (size--) { + if (offset == (AOP_SIZE(result) - 1)) + emitcode ("asr", "%s", aopGet (AOP (result), offset)); + else + emitcode ("ror", "%s", aopGet (AOP (result), offset)); + offset--; + } + emitcode ("dec", "r24"); + emitcode ("brne", "L%05d", tlbl->key); + } + goto release; + } + if (shCount > (size * 8 - 1)) { + while (size--) + aopPut (AOP (result), zero, offset++); + goto release; + } + /* for unsigned we can much more efficient */ + switch (size) { + case 1: + if (!sameRegs (AOP (left), AOP (result))) + aopPut (AOP (result), aopGet (AOP (left), 0), 0); + if (shCount >= 4) { + emitcode ("swap", "%s", aopGet (AOP (result), 0)); + if (AOP_ISHIGHREG(AOP(result),0)) { + emitcode ("andi", "%s,0x0f",aopGet(AOP(result),0)); + } else { + emitcode ("ldi","r24,0x0f"); + emitcode ("and", "%s,r24",aopGet(AOP(result),0)); + } + shCount -= 4; + } + while (shCount--) + emitcode ("lsr", "%s", aopGet (AOP (result), 0)); + break; + case 2: + if (shCount >= 12) { + aopPut (AOP (result), aopGet (AOP (left), 1), 0); + aopPut (AOP (result), zero, 1); + emitcode ("swap", "%s", aopGet (AOP (result), 0)); + if (AOP_ISHIGHREG(AOP(result),0)) { + emitcode ("andi", "%s,0x0f", aopGet (AOP (result), 0)); + } else { + emitcode ("ldi","r24,0x0f"); + emitcode ("and", "%s,r24",aopGet(AOP(result),0)); + } + shCount -= 12; + hByteZ = 1; + } + if (shCount >= 8) { + aopPut (AOP (result), aopGet (AOP (left), 1), 0); + aopPut (AOP (result), zero, 1); + shCount -= 8; + hByteZ = 1; + } + if (shCount >= 4) { + shCount -= 4; + if (!sameRegs (AOP (left), AOP (result))) { + aopPut (AOP (result), aopGet (AOP (left), 0), 0); + aopPut (AOP (result), aopGet (AOP (left), 1), 1); + } + if (!(AOP_ISHIGHREG(AOP(result),0) && AOP_ISHIGHREG(AOP(result),1))) { + emitcode("ldi","r25,0x0f"); + } + emitcode ("mov", "r24,%s", aopGet (AOP (result), 1)); + emitcode ("andi", "r24,0xf0"); + emitcode ("swap", "%s", aopGet (AOP (result), 0)); + if (AOP_ISHIGHREG(AOP(result),0)) { + emitcode ("andi", "%s,0x0f", aopGet (AOP (result), 0)); + } else { + emitcode ("and", "%s,r25", aopGet (AOP (result), 0)); + } + emitcode ("or", "%s,r24", aopGet (AOP (result), 0)); + emitcode ("swap", "%s", aopGet (AOP (result), 1)); + if (AOP_ISHIGHREG(AOP(result),1)) { + emitcode ("andi", "%s,0x0f", aopGet (AOP (result), 1)); + } else { + emitcode ("and", "%s,r24", aopGet (AOP (result), 1)); + } + while (shCount--) { + emitcode ("lsr", "%s", aopGet (AOP (result), 1)); + emitcode ("ror", "%s", aopGet (AOP (result), 0)); + } + + } + if (!hByteZ && !sameRegs (AOP (result), AOP (left)) + && shCount) { + offset = 0; + while (size--) { + aopPut (AOP (result), aopGet (AOP (left), offset), offset); + offset++; + } + } + while (shCount--) { + if (hByteZ) { + emitcode ("lsr", "%s", aopGet (AOP (result), 0)); + } + else { + emitcode ("lsr", "%s", aopGet (AOP (result), 1)); + emitcode ("ror", "%s", aopGet (AOP (result), 0)); + } + } + break; + + case 3: + assert ("shifting generic pointer ?\n"); + break; + case 4: + /* 32 bits we do only byte boundaries */ + if (shCount >= 24) { + aopPut (AOP (result), aopGet (AOP (left), 3), 0); + aopPut (AOP (result), zero, 1); + aopPut (AOP (result), zero, 2); + aopPut (AOP (result), zero, 3); + hByteZ = 3; + shCount -= 24; + } + if (shCount >= 16) { + aopPut (AOP (result), aopGet (AOP (left), 3), 1); + aopPut (AOP (result), aopGet (AOP (left), 2), 0); + aopPut (AOP (result), zero, 2); + aopPut (AOP (result), zero, 3); + hByteZ = 2; + shCount -= 16; + } + if (shCount >= 8) { + aopPut (AOP (result), aopGet (AOP (left), 1), 0); + aopPut (AOP (result), aopGet (AOP (left), 2), 1); + aopPut (AOP (result), aopGet (AOP (left), 3), 2); + aopPut (AOP (result), zero, 3); + shCount -= 8; + hByteZ = 1; + } + if (!hByteZ && !sameRegs (AOP (left), AOP (right))) { + offset = 0; + while (size--) { + aopPut (AOP (result), + aopGet (AOP (left), offset), offset); + offset++; + } + offset = 0; + size = AOP_SIZE (result); + } + if (shCount) { + switch (hByteZ) { + case 0: + while (shCount--) { + emitcode ("lsr", "%s", aopGet (AOP (result), 3)); + emitcode ("ror", "%s", aopGet (AOP (result), 2)); + emitcode ("ror", "%s", aopGet (AOP (result), 1)); + emitcode ("ror", "%s", aopGet (AOP (result), 0)); + } + break; + case 1: + while (shCount--) { + emitcode ("lsr", "%s", aopGet (AOP (result), 2)); + emitcode ("ror", "%s", aopGet (AOP (result), 1)); + emitcode ("ror", "%s", aopGet (AOP (result), 0)); + } + break; + case 2: + while (shCount--) { + emitcode ("lsr", "%s", aopGet (AOP (result), 1)); + emitcode ("ror", "%s", aopGet (AOP (result), 0)); + } + break; + case 3: + while (shCount--) { + emitcode ("lsr", "%s", aopGet (AOP (result), 0)); + } + break; + } + } + } + release: + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genRightShift - generate code for right shifting */ +/*-----------------------------------------------------------------*/ +static void +genRightShift (iCode * ic) +{ + operand *right, *left, *result; + sym_link *letype; + int size, offset; + int sign = 0, first = 1; + symbol *tlbl; + + aopOp (right = IC_RIGHT (ic), ic, FALSE); + + if (AOP_TYPE (right) == AOP_LIT) { + genShiftRightLit (ic); + return; + } + /* unknown count */ + if (AOP_SIZE (right) > 1) { + if (isRegPair (AOP (right))) { + emitcode ("movw", "r24,%s", aopGet (AOP (right), 0)); + } + else { + emitcode ("mov", "r24,%s", aopGet (AOP (right), 0)); + emitcode ("mov", "r25,%s", aopGet (AOP (right), 1)); + } + } + else { + emitcode ("mov", "r24,%s", aopGet (AOP (right), 0)); + } + aopOp (left = IC_LEFT (ic), ic, FALSE); + aopOp (result = IC_RESULT (ic), ic, FALSE); + size = AOP_SIZE (result); + tlbl = newiTempLabel (NULL); + emitcode ("", "L%05d:", tlbl->key); + offset = size - 1; + letype = getSpec (operandType (left)); + sign = !SPEC_USIGN (letype); + if (!sameRegs (AOP (left), AOP (result))) { + while (size--) { + aopPut (AOP (result), aopGet (AOP (left), offset), offset); + offset++; + } + size = AOP_SIZE (result); + } + size = AOP_SIZE (result); + while (size--) { + if (first) { + if (sign) + emitcode ("asr", "%s", aopGet (AOP (result), offset)); + else + emitcode ("lsr", "%s", aopGet (AOP (result), offset)); + first = 0; + } + else + emitcode ("ror", "%s", aopGet (AOP (result), offset)); + offset--; + } + if (AOP_SIZE (right) > 1) + emitcode ("sbiw", "r24,1"); + else + emitcode ("dec", "r24"); + emitcode ("brne", "L%05d", tlbl->key); + + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* RRsh - shift right rn by known count */ +/*-----------------------------------------------------------------*/ +static void +RRsh (int shCount,int reg) +{ + shCount &= 0x0007; // shCount : 0..7 + + switch (shCount) { + case 0: + break; + case 1: + emitcode ("lsr", "r%d",reg); + break; + case 2: + emitcode ("lsr", "r%d",reg); + emitcode ("lsr", "r%d",reg); + break; + case 3: + emitcode ("swap", "r%d",reg); + emitcode ("lsl", "r%d",reg); + break; + case 4: + emitcode ("swap", "r%d",reg); + break; + case 5: + emitcode ("swap", "r%d",reg); + emitcode ("lsr", "r%d",reg); + break; + case 6: + emitcode ("swap","r%d",reg); + emitcode ("lsr", "r%d",reg); + emitcode ("lsr", "r%d",reg); + break; + case 7: + emitcode ("swap","r%d",reg); + emitcode ("lsr", "r%d",reg); + emitcode ("lsr", "r%d",reg); + emitcode ("lsr", "r%d",reg); + break; + } +} + +/*-----------------------------------------------------------------*/ +/* RLsh - shift left rn by known count */ +/*-----------------------------------------------------------------*/ +static void +RLsh (int shCount, int reg) +{ + shCount &= 0x0007; // shCount : 0..7 + + switch (shCount) { + case 0: + break; + case 1: + emitcode ("lsl", "r%d",reg); + break; + case 2: + emitcode ("lsl", "r%d",reg); + emitcode ("lsl", "r%d",reg); + break; + case 3: + emitcode ("swap","r%d",reg); + emitcode ("lsr", "r%d",reg); + break; + case 4: + emitcode ("swap", "r%d",reg); + break; + case 5: + emitcode ("swap","r%d",reg); + emitcode ("lsl", "r%d",reg); + break; + case 6: + emitcode ("swap","r%d",reg); + emitcode ("lsl", "r%d",reg); + emitcode ("lsl", "r%d",reg); + break; + case 7: + emitcode ("swap","r%d",reg); + emitcode ("lsl", "r%d",reg); + emitcode ("lsl", "r%d",reg); + emitcode ("lsl", "r%d",reg); + break; + } +} + +/*-----------------------------------------------------------------*/ +/* genUnpackBits - generates code for unpacking bits */ +/*-----------------------------------------------------------------*/ +static void +genUnpackBits (operand * result, char *rname, int ptype) +{ + int shCnt; + int rlen = 0; + sym_link *etype; + int offset = 0; + int rsize; + + etype = getSpec (operandType (result)); + rsize = getSize (operandType (result)); + /* read the first byte */ + switch (ptype) { + + case POINTER: + case IPOINTER: + case PPOINTER: + case FPOINTER: + emitcode ("ld", "r24,%s+", rname); + break; + + case CPOINTER: + emitcode ("lpm", "r24,%s+", rname); + break; + + case GPOINTER: + emitcode ("call","__gptrget_pi"); + emitcode ("mov","r24,r0"); + break; + } + + rlen = SPEC_BLEN (etype); + + /* if we have bitdisplacement then it fits */ + /* into this byte completely or if length is */ + /* less than a byte */ + if ((shCnt = SPEC_BSTR (etype)) || (SPEC_BLEN (etype) <= 8)) { + + /* shift right acc */ + RRsh (shCnt,24); + + emitcode ("andi", "r24,lo(0x%x)", + ((unsigned char) -1) >> (8 - SPEC_BLEN (etype))); + aopPut (AOP (result), "r24", offset++); + goto finish; + } + + /* bit field did not fit in a byte */ + aopPut (AOP (result), "r24", offset++); + + while (1) { + + switch (ptype) { + + case POINTER: + case IPOINTER: + case PPOINTER: + case FPOINTER: + emitcode ("ld", "r24,%s+"); + break; + + case CPOINTER: + emitcode ("lpm", "r24,%s+"); + break; + + case GPOINTER: + emitcode ("call", "__gptrget_pi"); + break; + } + + rlen -= 8; + /* if we are done */ + if (rlen < 8) + break; + + aopPut (AOP (result), "r24", offset++); + + } + + if (rlen) { + aopPut (AOP (result), "r24", offset++); + } + + finish: + if (offset < rsize) { + rsize -= offset; + while (rsize--) + aopPut (AOP (result), zero, offset++); + } + return; +} + +/*-----------------------------------------------------------------*/ +/* genDataPointerGet - generates code when ptr offset is known */ +/*-----------------------------------------------------------------*/ +static void +genDataPointerGet (operand * left, operand * result, iCode * ic) +{ + char *l; + char buffer[256]; + int size, offset = 0; + aopOp (result, ic, TRUE); + + /* get the string representation of the name */ + l = aopGet (AOP (left), 0); + size = AOP_SIZE (result); + while (size--) { + if (offset) + sprintf (buffer, "(%s + %d)", l, offset); + else + sprintf (buffer, "%s", l); + emitcode ("lds", "%s,%s", aopGet (AOP (result), offset++), + buffer); + } + + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genNearPointerGet - emitcode for near pointer fetch */ +/*-----------------------------------------------------------------*/ +static void +genMemPointerGet (operand * left, operand * result, iCode * ic, iCode *pi) +{ + asmop *aop = NULL; + regs *preg = NULL; + int gotFreePtr = 0; + char *rname, *frname = NULL; + sym_link *rtype, *retype; + sym_link *ltype = operandType (left); + + rtype = operandType (result); + retype = getSpec (rtype); + + aopOp (left, ic, FALSE); + + /* if left is rematerialisable and + result is not bit variable type and + the left is pointer to data space i.e + lower 128 bytes of space */ + if (AOP_TYPE (left) == AOP_IMMD && + !IS_BITVAR (retype) && DCL_TYPE (ltype) == POINTER) { + genDataPointerGet (left, result, ic); + return; + } + + /* if the value is already in a pointer register + then don't need anything more */ + if (!AOP_INPREG (AOP (left))) { + /* otherwise get a free pointer register */ + aop = newAsmop (0); + preg = getFreePtr (ic, &aop, FALSE, 0); + if (isRegPair (AOP (left) )) { + emitcode ("movw", "%s,%s", + aop->aopu.aop_ptr->name, + aopGet(AOP(left),0)); + } else { + emitcode ("mov", "%s,%s", aop->aopu.aop_ptr->name, + aopGet (AOP (left), 0)); + emitcode ("mov", "%s,%s", aop->aop_ptr2->name, + aopGet (AOP (left), 1)); + } + gotFreePtr = 1; + } + else { + aop = AOP(left); + frname = aopGet(aop,0); + } + if (AOP_ISX(aop)) { + rname = "X"; + } else if (AOP_ISZ(aop)) { + rname = "Z"; + } else { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "pointer not in correct register"); + exit (0); + } + + aopOp (result, ic, FALSE); + + /* if bitfield then unpack the bits */ + if (IS_BITVAR (retype)) + genUnpackBits (result, rname, POINTER); + else { + /* we have can just get the values */ + int size = AOP_SIZE (result); + int offset = 0; + + while (size--) { + if (size || pi) { + emitcode ("ld","%s,%s+",aopGet(AOP(result),offset), rname); + } else { + emitcode ("ld","%s,%s",aopGet(AOP(result),offset), rname); + } + } + } + + /* now some housekeeping stuff */ + if (gotFreePtr) { + /* we had to allocate for this iCode */ + if (pi) { + if (isRegPair (AOP (left) )) { + emitcode ("movw", "%s,%s", + aopGet (AOP(left),0), + aop->aopu.aop_ptr->name); + } else { + emitcode ("mov", "%s,%s", + aopGet (AOP (left), 0), + aop->aopu.aop_ptr->name); + emitcode ("mov", "%s,%s", + aopGet (AOP (left), 1), + aop->aop_ptr2->name); + } + } + freeAsmop (NULL, aop, ic, TRUE); + } else { + + /* we did not allocate which means left + already in a pointer register, then + if size > 0 && this could be used again + we have to point it back to where it + belongs */ + if ((AOP_SIZE (result) > 1 && + !OP_SYMBOL (left)->remat && + (OP_SYMBOL (left)->liveTo > ic->seq || ic->depth)) && !pi) { + int size = AOP_SIZE (result) - 1; + emitcode ("sbiw", "%s,%d",frname,size); + } + } + + /* done */ + if (pi) pi->generated = 1; + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); + +} + +/*-----------------------------------------------------------------*/ +/* genCodePointerGet - gget value from code space */ +/*-----------------------------------------------------------------*/ +static void +genCodePointerGet (operand * left, operand * result, iCode * ic, iCode *pi) +{ + int size, offset; + sym_link *retype = getSpec (operandType (result)); + asmop *aop = NULL; + int gotFreePtr = 0; + + aopOp (left, ic, FALSE); + + /* if the operand is already in Z register + then we do nothing else we move the value to Z register */ + if (AOP_ISZ(AOP(left))) { + aop = AOP (left); + } else { + aop = newAsmop(0); + getFreePtr(ic,&aop,FALSE,TRUE); + if (isRegPair(AOP (left))) { + emitcode ("movw","r30,%s",aopGet (AOP (left), 0)); + } else { + emitcode ("mov", "r30,%s", aopGet (AOP (left), 0)); + emitcode ("mov", "r31,%s", aopGet (AOP (left), 1)); + } + gotFreePtr = 1; + } + + aopOp (result, ic, FALSE); + + /* if bit then unpack */ + if (IS_BITVAR (retype)) + genUnpackBits (result, "Z", CPOINTER); + else { + size = AOP_SIZE (result); + offset = 0; + + while (size--) { + if (size || pi) { + emitcode ("lpm","%s,Z+",aopGet(AOP(result),offset++)); + } else { + emitcode ("lpm","%s,Z",aopGet(AOP(result),offset++)); + } + } + } + + /* now some housekeeping stuff */ + if (gotFreePtr) { + /* we had to allocate for this iCode */ + if (pi) { + if (isRegPair(AOP (left))) { + emitcode ("movw","%s,r30",aopGet (AOP (left), 0)); + } else { + emitcode ("mov", "%s,r30", aopGet (AOP (left), 0)); + emitcode ("mov", "%s,r31", aopGet (AOP (left), 1)); + } + } + freeAsmop (NULL, aop, ic, TRUE); + } else { + + /* we did not allocate which means left + already in a pointer register, then + if size > 0 && this could be used again + we have to point it back to where it + belongs */ + if ((AOP_SIZE (result) > 1 && + !OP_SYMBOL (left)->remat && + (OP_SYMBOL (left)->liveTo > ic->seq || ic->depth)) && + !pi) { + int size = AOP_SIZE (result) - 1; + emitcode ("sbiw", "r30,%d",size); + } + } + + /* done */ + if (pi) pi->generated=1; + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); + +} + +/*-----------------------------------------------------------------*/ +/* genGenPointerGet - gget value from generic pointer space */ +/*-----------------------------------------------------------------*/ +static void +genGenPointerGet (operand * left, operand * result, iCode * ic, iCode *pi) +{ + int size, offset; + int gotFreePtr = 0; + sym_link *retype = getSpec (operandType (result)); + asmop *aop = NULL; + + aopOp (left, ic, FALSE); + + /* if the operand is already in dptr + then we do nothing else we move the value to dptr */ + if (AOP_ISZ(AOP(left))) { + aop = AOP(left); + } else { + aop = newAsmop(0); + getFreePtr(ic,&aop,FALSE,TRUE); + if (isRegPair(AOP(left))) { + emitcode ("movw", "r30,%s", aopGet (AOP (left), 0)); + } else { + emitcode ("mov", "r30,%s", aopGet (AOP (left), 0)); + emitcode ("mov", "r31,%s", aopGet (AOP (left), 1)); + } + emitcode ("mov", "r24,%s", aopGet (AOP (left), 2)); + gotFreePtr=1; + } + + /* so Z register now contains the address */ + + aopOp (result, ic, FALSE); + + /* if bit then unpack */ + if (IS_BITVAR (retype)) + genUnpackBits (result, "Z", GPOINTER); + else { + size = AOP_SIZE (result); + offset = 0; + + while (size--) { + if (size || pi) + emitcode ("call", "__gptrget_pi"); + else + emitcode ("call", "__gptrget"); + aopPut (AOP (result), "r0", offset++); + } + } + + + /* now some housekeeping stuff */ + if (gotFreePtr) { + /* we had to allocate for this iCode */ + if (pi) { + if (isRegPair(AOP (left))) { + emitcode ("movw","%s,r30",aopGet (AOP (left), 0)); + } else { + emitcode ("mov", "%s,r30", aopGet (AOP (left), 0)); + emitcode ("mov", "%s,r31", aopGet (AOP (left), 1)); + } + } + freeAsmop (NULL, aop, ic, TRUE); + } else { + + /* we did not allocate which means left + already in a pointer register, then + if size > 0 && this could be used again + we have to point it back to where it + belongs */ + if ((AOP_SIZE (result) > 1 && + !OP_SYMBOL (left)->remat && + (OP_SYMBOL (left)->liveTo > ic->seq || ic->depth)) && + !pi) { + int size = AOP_SIZE (result) - 1; + emitcode ("sbiw", "r30,%d",size); + } + } + if (pi) pi->generated=1; + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genPointerGet - generate code for pointer get */ +/*-----------------------------------------------------------------*/ +static void +genPointerGet (iCode * ic, iCode *pi) +{ + operand *left, *result; + sym_link *type, *etype; + int p_type; + + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + /* depending on the type of pointer we need to + move it to the correct pointer register */ + type = operandType (left); + etype = getSpec (type); + /* if left is of type of pointer then it is simple */ + if (IS_PTR (type) && !IS_FUNC (type->next)) + p_type = DCL_TYPE (type); + else { + /* we have to go by the storage class */ + p_type = PTR_TYPE (SPEC_OCLS (etype)); + + + } + + /* now that we have the pointer type we assign + the pointer values */ + switch (p_type) { + + case POINTER: + case IPOINTER: + case PPOINTER: + case FPOINTER: + genMemPointerGet (left, result, ic, pi); + break; + + case CPOINTER: + genCodePointerGet (left, result, ic, pi); + break; + + case GPOINTER: + genGenPointerGet (left, result, ic, pi); + break; + } + +} + +/*-----------------------------------------------------------------*/ +/* genPackBits - generates code for packed bit storage */ +/*-----------------------------------------------------------------*/ +static void +genPackBits (sym_link * etype, + operand * right, + char *rname, int p_type) +{ + int shCount = 0; + int offset = 0; + int rLen = 0; + int blen, bstr; + char *l; + + blen = SPEC_BLEN (etype); + bstr = SPEC_BSTR (etype); + + l = aopGet (AOP (right), offset++); + MOVR24 (l); + + /* if the bit lenth is less than or */ + /* it exactly fits a byte then */ + if (SPEC_BLEN (etype) <= 8) { + shCount = SPEC_BSTR (etype); + + /* shift left acc */ + RLsh (shCount,24); + + if (SPEC_BLEN (etype) < 8) { /* if smaller than a byte */ + + switch (p_type) { + case POINTER: + case IPOINTER: + case PPOINTER: + case FPOINTER: + emitcode ("ld", "r1,%s",rname); + break; + + case GPOINTER: + emitcode ("push", "r1"); + emitcode ("push", "r24"); + emitcode ("call", "__gptrget"); + emitcode ("pop", "r1"); + emitcode ("mov","r24,r0"); + break; + } + + emitcode ("andi", "r24,#0x%02x", (unsigned char) + ((unsigned char) (0xFF << (blen + bstr)) | + (unsigned char) (0xFF >> (8 - bstr)))); + emitcode ("or", "r24,r1"); + if (p_type == GPOINTER) + emitcode ("pop", "r1"); + } + } + + switch (p_type) { + case POINTER: + case IPOINTER: + case PPOINTER: + case FPOINTER: + emitcode("st","%s+,r24"); + break; + + case GPOINTER: + emitcode("mov","r0,r24"); + emitcode ("call", "__gptrput_pi"); + break; + } + + /* if we r done */ + if (SPEC_BLEN (etype) <= 8) + return; + + rLen = SPEC_BLEN (etype); + + /* now generate for lengths greater than one byte */ + while (1) { + + l = aopGet (AOP (right), offset++); + + rLen -= 8; + if (rLen < 8) + break; + + switch (p_type) { + case POINTER: + case IPOINTER: + case PPOINTER: + case FPOINTER: + emitcode ("st", "%s+,%s",rname,l); + break; + + case GPOINTER: + MOVR0 (l); + emitcode ("lcall", "__gptrput_pi"); + break; + } + } + + MOVR24 (l); + + /* last last was not complete */ + if (rLen) { + /* save the byte & read byte */ + switch (p_type) { + case POINTER: + case IPOINTER: + case PPOINTER: + case FPOINTER: + emitcode ("st","%s+,r24",rname); + break; + case GPOINTER: + emitcode ("push", "r1"); + emitcode ("push", "r24"); + emitcode ("lcall", "__gptrget"); + emitcode ("mov","r24,r0"); + emitcode ("pop", "r1"); + break; + } + + emitcode ("andi", "r24,0x%02x", (((unsigned char) -1 << rLen) & 0xff)); + emitcode ("or", "r24,r1"); + } + + if (p_type == GPOINTER) + emitcode ("pop", "r1"); + + switch (p_type) { + + case POINTER: + case IPOINTER: + case PPOINTER: + case FPOINTER: + emitcode ("st", "%s,r24", rname); + break; + + case GPOINTER: + emitcode ("mov","r0,r24"); + emitcode ("call", "__gptrput"); + break; + } +} + +/*-----------------------------------------------------------------*/ +/* genDataPointerSet - remat pointer to data space */ +/*-----------------------------------------------------------------*/ +static void +genDataPointerSet (operand * right, operand * result, iCode * ic) +{ + int size, offset = 0; + char *l, buffer[256]; + + aopOp (right, ic, FALSE); + + l = aopGet (AOP (result), 0); + size = AOP_SIZE (right); + while (size--) { + if (offset) + sprintf (buffer, "(%s + %d)", l, offset); + else + sprintf (buffer, "%s", l); + emitcode ("sts", "%s,%s", buffer, + aopGet (AOP (right), offset++)); + } + + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genNearPointerSet - emitcode for near pointer put */ +/*-----------------------------------------------------------------*/ +static void +genMemPointerSet (operand * right, operand * result, iCode * ic, iCode *pi) +{ + asmop *aop = NULL; + char *frname = NULL, *rname, *l; + int gotFreePtr = 0; + sym_link *retype; + sym_link *ptype = operandType (result); + + retype = getSpec (operandType (right)); + + aopOp (result, ic, FALSE); + + /* if the result is rematerializable & + in data space & not a bit variable */ + if (AOP_TYPE (result) == AOP_IMMD && + DCL_TYPE (ptype) == POINTER && !IS_BITVAR (retype)) { + genDataPointerSet (right, result, ic); + return; + } + if (!AOP_INPREG(AOP(result))) { + /* otherwise get a free pointer register */ + aop = newAsmop (0); + getFreePtr (ic, &aop, FALSE, 0); + if (isRegPair (AOP (result) )) { + emitcode ("movw", "%s,%s",aop->aopu.aop_ptr->name, + aopGet(AOP (result), 0)); + } else { + emitcode ("mov", "%s,%s", aop->aopu.aop_ptr->name, + aopGet (AOP (result), 0)); + emitcode ("mov", "%s,%s", aop->aop_ptr2->name, + aopGet (AOP (result), 1)); + } + gotFreePtr = 1; + } else { + aop = AOP(result); + frname = aopGet(aop,0); + } + + aopOp (right, ic, FALSE); + if (AOP_ISX(aop)) { + rname = "X"; + } else if (AOP_ISZ(aop)) { + rname = "Z"; + } else { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "pointer not in correct register"); + exit (0); + } + /* if bitfield then unpack the bits */ + if (IS_BITVAR (retype)) + genPackBits (retype, right, rname, POINTER); + else { + /* we have can just get the values */ + int size = AOP_SIZE (right); + int offset = 0; + + while (size--) { + l = aopGet (AOP (right), offset); + if (size || pi) + emitcode ("st", "%s+,%s", rname,l); + else + emitcode ("st", "%s,%s", rname,l); + offset++; + } + } + + /* now some housekeeping stuff */ + if (gotFreePtr) { + /* we had to allocate for this iCode */ + if (pi) { + if (isRegPair (AOP (result) )) { + emitcode ("movw", "%s,%s", + aopGet(AOP(result),0), + aop->aopu.aop_ptr->name); + } else { + emitcode ("mov", "%s,%s", aop->aopu.aop_ptr->name, + aopGet (AOP (result), 0)); + emitcode ("mov", "%s,%s", aop->aop_ptr2->name, + aopGet (AOP (result), 1)); + } + } + freeAsmop (NULL, aop, ic, TRUE); + } else { + + /* we did not allocate which means left + already in a pointer register, then + if size > 0 && this could be used again + we have to point it back to where it + belongs */ + if ((AOP_SIZE (right) > 1 && + !OP_SYMBOL (result)->remat && + (OP_SYMBOL (right)->liveTo > ic->seq || ic->depth)) && !pi) { + int size = AOP_SIZE (right) - 1; + emitcode ("sbiw", "%s,%d",frname,size); + } + } + + /* done */ + if (pi) pi->generated = 1; + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genGenPointerSet - set value from generic pointer space */ +/*-----------------------------------------------------------------*/ +static void +genGenPointerSet (operand * right, operand * result, iCode * ic, iCode *pi) +{ + int size, offset; + int gotFreePtr = 0; + sym_link *retype = getSpec (operandType (right)); + asmop *aop = NULL; + + aopOp (result, ic, FALSE); + + /* if the operand is already in dptr + then we do nothing else we move the value to dptr */ + if (AOP_ISZ(AOP(result))) { + aop = AOP(right); + } else { + aop = newAsmop(0); + getFreePtr(ic,&aop,FALSE,TRUE); + if (isRegPair(AOP(result))) { + emitcode ("movw", "r30,%s", aopGet (AOP (result), 0)); + } else { + emitcode ("mov", "r30,%s", aopGet (AOP (result), 0)); + emitcode ("mov", "r31,%s", aopGet (AOP (result), 1)); + } + emitcode ("mov", "r24,%s", aopGet (AOP (result), 2)); + gotFreePtr=1; + } + + /* so Z register now contains the address */ + aopOp (right, ic, FALSE); + + /* if bit then unpack */ + if (IS_BITVAR (retype)) + genUnpackBits (result, "Z", GPOINTER); + else { + size = AOP_SIZE (right); + offset = 0; + + while (size--) { + char *l = aopGet(AOP (right), offset++); + MOVR0(l); + + if (size || pi) + emitcode ("call", "__gptrput_pi"); + else + emitcode ("call", "__gptrput"); + } + } + + /* now some housekeeping stuff */ + if (gotFreePtr) { + /* we had to allocate for this iCode */ + if (pi) { + if (isRegPair(AOP(result))) { + emitcode ("movw", "%s,r30", aopGet (AOP (result), 0)); + } else { + emitcode ("mov", "%s,r30", aopGet (AOP (result), 0)); + emitcode ("mov", "%s,r31", aopGet (AOP (result), 1)); + } + } + freeAsmop (NULL, aop, ic, TRUE); + } else { + + /* we did not allocate which means left + already in a pointer register, then + if size > 0 && this could be used again + we have to point it back to where it + belongs */ + if ((AOP_SIZE (right) > 1 && + !OP_SYMBOL (result)->remat && + (OP_SYMBOL (result)->liveTo > ic->seq || ic->depth)) && !pi) { + int size = AOP_SIZE (right) - 1; + emitcode ("sbiw", "r30,%d",size); + } + } + if (pi) pi->generated = 1; + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genPointerSet - stores the value into a pointer location */ +/*-----------------------------------------------------------------*/ +static void +genPointerSet (iCode * ic, iCode *pi) +{ + operand *right, *result; + sym_link *type, *etype; + int p_type; + + right = IC_RIGHT (ic); + result = IC_RESULT (ic); + + /* depending on the type of pointer we need to + move it to the correct pointer register */ + type = operandType (result); + etype = getSpec (type); + /* if left is of type of pointer then it is simple */ + if (IS_PTR (type) && !IS_FUNC (type->next)) { + p_type = DCL_TYPE (type); + } + else { + /* we have to go by the storage class */ + p_type = PTR_TYPE (SPEC_OCLS (etype)); + + } + + /* now that we have the pointer type we assign + the pointer values */ + switch (p_type) { + + case POINTER: + case IPOINTER: + case PPOINTER: + case FPOINTER: + genMemPointerSet (right, result, ic, pi); + break; + + case GPOINTER: + genGenPointerSet (right, result, ic, pi); + break; + + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "genPointerSet: illegal pointer type"); + } + +} + +/*-----------------------------------------------------------------*/ +/* genIfx - generate code for Ifx statement */ +/*-----------------------------------------------------------------*/ +static void +genIfx (iCode * ic, iCode * popIc) +{ + operand *cond = IC_COND (ic); + char *cname ; + symbol *lbl; + int tob = 0; + + aopOp (cond, ic, FALSE); + + /* get the value into acc */ + if (AOP_SIZE(cond) == 1 && AOP_ISHIGHREG(AOP(cond),0)) { + cname = aopGet(AOP(cond),0); + } else { + toBoolean (cond, "r24", 0); + tob = 1; + cname = "r24"; + } + /* the result is now in the accumulator */ + freeAsmop (cond, NULL, ic, TRUE); + + /* if there was something to be popped then do it */ + if (popIc) { + genIpop (popIc); + emitcode("cpi","%s,0",cname); + } else if (!tob) emitcode("cpi","%s,0",cname); + + lbl = newiTempLabel(NULL); + if (IC_TRUE(ic)) { + emitcode ("breq","L%05d",lbl->key); + emitcode ("jmp","L%05d",IC_TRUE(ic)->key); + emitcode ("","L%05d:",lbl->key); + } else { + emitcode ("brne","L%05d",lbl->key); + emitcode ("jmp","L%05d",IC_FALSE(ic)->key); + emitcode ("","L%05d:",lbl->key); + } + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genAddrOf - generates code for address of */ +/*-----------------------------------------------------------------*/ +static void +genAddrOf (iCode * ic) +{ + symbol *sym = OP_SYMBOL (IC_LEFT (ic)); + int size, offset; + + aopOp (IC_RESULT (ic), ic, FALSE); + assert(AOP_SIZE(IC_RESULT(ic)) >= 2); + /* if the operand is on the stack then we + need to get the stack offset of this + variable */ + if (sym->onStack) { + /* if it has an offset then we need to compute it */ + if (sym->stack) { + if (allHigh(AOP(IC_RESULT(ic)))) { + if (isRegPair (AOP(IC_RESULT(ic)))) { + emitcode ("movw","%s,r28",aopGet(AOP(IC_RESULT(ic)),0)); + } else { + emitcode ("mov","%s,r28",aopGet(AOP(IC_RESULT(ic)),0)); + emitcode ("mov","%s,r29",aopGet(AOP(IC_RESULT(ic)),1)); + } + if (sym->stack < 0) { + emitcode("subi","%s,<(%d)",aopGet(AOP(IC_RESULT(ic)),0),-sym->stack); + emitcode("sbci","%s,>(%d)",aopGet(AOP(IC_RESULT(ic)),1),-sym->stack); + } else { + emitcode("subi","%s,<(-%d)",aopGet(AOP(IC_RESULT(ic)),0),sym->stack); + emitcode("sbci","%s,>(-%d)",aopGet(AOP(IC_RESULT(ic)),1),sym->stack); + } + } else { + emitcode("movw","r24,r28"); + if (sym->stack > -63 && sym->stack < 63) { + if (sym->stack < 0) + emitcode("sbiw","r24,%d",-sym->stack); + else + emitcode("sbiw","r24,%d",sym->stack); + } else { + if (sym->stack < 0) { + emitcode("subi","r24,<(%d)",-sym->stack); + emitcode("sbci","r25,>(%d)",-sym->stack); + } else { + emitcode("subi","r24,<(-%d)",sym->stack); + emitcode("sbci","r25,>(-%d)",sym->stack); + } + } + + aopPut(AOP(IC_RESULT(ic)),"r24",0); + aopPut(AOP(IC_RESULT(ic)),"r25",1); + } + } + else { + aopPut(AOP(IC_RESULT(ic)),"r28",0); + aopPut(AOP(IC_RESULT(ic)),"r29",1); + } + /* fill the result with zero */ + size = AOP_SIZE (IC_RESULT (ic)) - 2; + offset = 2; + while (size--) { + aopPut (AOP (IC_RESULT (ic)), zero, offset++); + } + + goto release; + } + + /* object not on stack then we need the name */ + size = AOP_SIZE (IC_RESULT (ic)); + offset = 0; + assert(size<=2); + while (size--) { + char s[SDCC_NAME_MAX]; + if (offset) + sprintf (s, ">(%s)", sym->rname); + else + sprintf (s, "<(%s)", sym->rname); + aopPut (AOP (IC_RESULT (ic)), s, offset++); + } + + release: + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + +} + +/*-----------------------------------------------------------------*/ +/* genFarFarAssign - assignment when both are in far space */ +/*-----------------------------------------------------------------*/ +static void +genFarFarAssign (operand * result, operand * right, iCode * ic) +{ + int size = AOP_SIZE (right); + int offset = 0; + char *l; + /* first push the right side on to the stack */ + while (size--) { + l = aopGet (AOP (right), offset++); + MOVA (l); + emitcode ("push", "acc"); + } + + freeAsmop (right, NULL, ic, FALSE); + /* now assign DPTR to result */ + aopOp (result, ic, FALSE); + size = AOP_SIZE (result); + while (size--) { + emitcode ("pop", "acc"); + aopPut (AOP (result), "a", --offset); + } + freeAsmop (result, NULL, ic, FALSE); + +} + +/*-----------------------------------------------------------------*/ +/* genAssign - generate code for assignment */ +/*-----------------------------------------------------------------*/ +static void +genAssign (iCode * ic) +{ + operand *result, *right; + int size, offset; + unsigned long lit = 0L; + + result = IC_RESULT (ic); + right = IC_RIGHT (ic); + + /* if they are the same */ + if (operandsEqu (IC_RESULT (ic), IC_RIGHT (ic))) + return; + + aopOp (right, ic, FALSE); + + /* special case both in far space */ + if (AOP_TYPE (right) == AOP_DPTR && + IS_TRUE_SYMOP (result) && isOperandInFarSpace (result)) { + + genFarFarAssign (result, right, ic); + return; + } + + aopOp (result, ic, TRUE); + + /* if they are the same registers */ + if (sameRegs (AOP (right), AOP (result))) + goto release; + + /* if the result is a bit */ + if (AOP_TYPE (result) == AOP_CRY) { + + /* if the right size is a literal then + we know what the value is */ + if (AOP_TYPE (right) == AOP_LIT) { + if (((int) operandLitValue (right))) + aopPut (AOP (result), one, 0); + else + aopPut (AOP (result), zero, 0); + goto release; + } + + /* the right is also a bit variable */ + if (AOP_TYPE (right) == AOP_CRY) { + emitcode ("mov", "c,%s", AOP (right)->aopu.aop_dir); + aopPut (AOP (result), "c", 0); + goto release; + } + + /* we need to or */ + toBoolean (right, "", 0); + aopPut (AOP (result), "a", 0); + goto release; + } + + /* bit variables done */ + /* general case */ + size = AOP_SIZE (result); + offset = 0; + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu. + aop_lit); + if ((size > 1) && (AOP_TYPE (result) != AOP_REG) + && (AOP_TYPE (right) == AOP_LIT) + && !IS_FLOAT (operandType (right)) && (lit < 256L)) { + emitcode ("clr", "a"); + while (size--) { + if ((unsigned int) ((lit >> (size * 8)) & 0x0FFL) == + 0) aopPut (AOP (result), "a", size); + else + aopPut (AOP (result), + aopGet (AOP (right), size), size); + } + } + else { + while (size--) { + aopPut (AOP (result), + aopGet (AOP (right), offset), offset); + offset++; + } + } + + release: + freeAsmop (right, NULL, ic, FALSE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genJumpTab - genrates code for jump table */ +/*-----------------------------------------------------------------*/ +static void +genJumpTab (iCode * ic) +{ + symbol *jtab; + char *l; + + aopOp (IC_JTCOND (ic), ic, FALSE); + /* get the condition into accumulator */ + l = aopGet (AOP (IC_JTCOND (ic)), 0); + MOVA (l); + /* multiply by three */ + emitcode ("add", "a,acc"); + emitcode ("add", "a,%s", aopGet (AOP (IC_JTCOND (ic)), 0)); + freeAsmop (IC_JTCOND (ic), NULL, ic, TRUE); + + jtab = newiTempLabel (NULL); + emitcode ("mov", "dptr,#%05d$", jtab->key + 100); + emitcode ("jmp", "@a+dptr"); + emitcode ("", "%05d$:", jtab->key + 100); + /* now generate the jump labels */ + for (jtab = setFirstItem (IC_JTLABELS (ic)); jtab; + jtab = setNextItem (IC_JTLABELS (ic))) + emitcode ("ljmp", "%05d$", jtab->key + 100); + +} + +/*-----------------------------------------------------------------*/ +/* genCast - gen code for casting */ +/*-----------------------------------------------------------------*/ +static void +genCast (iCode * ic) +{ + operand *result = IC_RESULT (ic); + sym_link *ctype = operandType (IC_LEFT (ic)); + sym_link *rtype = operandType (IC_RIGHT (ic)); + operand *right = IC_RIGHT (ic); + int size, offset; + + /* if they are equivalent then do nothing */ + if (operandsEqu (IC_RESULT (ic), IC_RIGHT (ic))) + return; + + aopOp (right, ic, FALSE); + aopOp (result, ic, FALSE); + + /* if the result is a bit */ + if (AOP_TYPE (result) == AOP_CRY) { + /* if the right size is a literal then + we know what the value is */ + if (AOP_TYPE (right) == AOP_LIT) { + if (((int) operandLitValue (right))) + aopPut (AOP (result), one, 0); + else + aopPut (AOP (result), zero, 0); + + goto release; + } + + /* the right is also a bit variable */ + if (AOP_TYPE (right) == AOP_CRY) { + emitcode ("mov", "c,%s", AOP (right)->aopu.aop_dir); + aopPut (AOP (result), "c", 0); + goto release; + } + + /* we need to or */ + toBoolean (right, "", 0); + aopPut (AOP (result), "a", 0); + goto release; + } + + /* if they are the same size : or less */ + if (AOP_SIZE (result) <= AOP_SIZE (right)) { + + /* if they are in the same place */ + if (sameRegs (AOP (right), AOP (result))) + goto release; + + /* if they in different places then copy */ + size = AOP_SIZE (result); + offset = 0; + while (size--) { + aopPut (AOP (result), + aopGet (AOP (right), offset), offset); + offset++; + } + goto release; + } + + + /* if the result is of type pointer */ + if (IS_PTR (ctype)) { + + int p_type; + sym_link *type = operandType (right); + sym_link *etype = getSpec (type); + + /* pointer to generic pointer */ + if (IS_GENPTR (ctype)) { + if (IS_PTR (type)) + p_type = DCL_TYPE (type); + else { + /* we have to go by the storage class */ + p_type = PTR_TYPE (SPEC_OCLS (etype)); + } + + /* the first two bytes are known */ + size = GPTRSIZE - 1; + offset = 0; + while (size--) { + aopPut (AOP (result), + aopGet (AOP (right), offset), offset); + offset++; + } + + /* the last byte depending on type */ + { + int gpVal = pointerTypeToGPByte(p_type, NULL, NULL); + char gpValStr[10]; + + if (gpVal == -1) + { + // pointerTypeToGPByte will have bitched. + exit(1); + } + + sprintf(gpValStr, "#0x%x", gpVal); + aopPut (AOP (result), gpValStr, GPTRSIZE - 1); + } + goto release; + } + + /* just copy the pointers */ + size = AOP_SIZE (result); + offset = 0; + while (size--) { + aopPut (AOP (result), + aopGet (AOP (right), offset), offset); + offset++; + } + goto release; + } + + /* so we now know that the size of destination is greater + than the size of the source */ + /* we move to result for the size of source */ + size = AOP_SIZE (right); + offset = 0; + while (size--) { + aopPut (AOP (result), aopGet (AOP (right), offset), offset); + offset++; + } + + /* now depending on the sign of the source && destination */ + size = AOP_SIZE (result) - AOP_SIZE (right); + /* if unsigned or not an integral type */ + if (SPEC_USIGN (rtype) || !IS_SPEC (rtype)) { + while (size--) + aopPut (AOP (result), zero, offset++); + } + else { + /* we need to extend the sign :{ */ + // PENDING: Does nothing on avr +#if 0 + char *l = aopGet (AOP (right), AOP_SIZE (right) - 1); + MOVA (l); +#endif + emitcode ("rlc", "a"); + emitcode ("subb", "a,acc"); + while (size--) + aopPut (AOP (result), "a", offset++); + } + + /* we are done hurray !!!! */ + + release: + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); + +} + +/*-----------------------------------------------------------------*/ +/* genDjnz - generate decrement & jump if not zero instrucion */ +/*-----------------------------------------------------------------*/ +static int +genDjnz (iCode * ic, iCode * ifx) +{ + symbol *lbl, *lbl1; + if (!ifx) + return 0; + + /* if the if condition has a false label + then we cannot save */ + if (IC_FALSE (ifx)) + return 0; + + /* if the minus is not of the form + a = a - 1 */ + if (!isOperandEqual (IC_RESULT (ic), IC_LEFT (ic)) || + !IS_OP_LITERAL (IC_RIGHT (ic))) + return 0; + + if (operandLitValue (IC_RIGHT (ic)) != 1) + return 0; + + /* if the size of this greater than one then no + saving */ + if (getSize (operandType (IC_RESULT (ic))) > 1) + return 0; + + /* otherwise we can save BIG */ + lbl = newiTempLabel (NULL); + lbl1 = newiTempLabel (NULL); + + aopOp (IC_RESULT (ic), ic, FALSE); + + if (IS_AOP_PREG (IC_RESULT (ic))) { + emitcode ("dec", "%s", aopGet (AOP (IC_RESULT (ic)), 0)); + emitcode ("mov", "a,%s", aopGet (AOP (IC_RESULT (ic)), 0)); + emitcode ("jnz", "%05d$", lbl->key + 100); + } + else { + emitcode ("djnz", "%s,%05d$", + aopGet (AOP (IC_RESULT (ic)), 0), lbl->key + 100); + } + emitcode ("sjmp", "%05d$", lbl1->key + 100); + emitcode ("", "%05d$:", lbl->key + 100); + emitcode ("ljmp", "%05d$", IC_TRUE (ifx)->key + 100); + emitcode ("", "%05d$:", lbl1->key + 100); + + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + ifx->generated = 1; + return 1; +} + +static char *recvregs[8] = { + "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23" +}; + +static int recvCnt = 0; + +/*-----------------------------------------------------------------*/ +/* genReceive - generate code for a receive iCode */ +/*-----------------------------------------------------------------*/ +static void +genReceive (iCode * ic) +{ + int size, offset = 0; + aopOp (IC_RESULT (ic), ic, FALSE); + size = AOP_SIZE (IC_RESULT (ic)); + while (size--) { + aopPut (AOP (IC_RESULT (ic)), recvregs[recvCnt++], offset); + offset++; + } + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genDummyRead - generate code for dummy read of volatiles */ +/*-----------------------------------------------------------------*/ +static void +genDummyRead (iCode * ic) +{ + emitcode ("; genDummyRead",""); + emitcode ("; not implemented",""); + + ic = ic; +} + +/*-----------------------------------------------------------------*/ +/* gen51Code - generate code for 8051 based controllers */ +/*-----------------------------------------------------------------*/ +void +genAVRCode (iCode * lic) +{ + iCode *ic; + int cln = 0; + + lineHead = lineCurr = NULL; + recvCnt = 0; + /* print the allocation information */ + if (allocInfo) + printAllocInfo (currFunc, codeOutBuf); + /* if debug information required */ + if (options.debug && currFunc) { + debugFile->writeFunction (currFunc, lic); + } + /* stack pointer name */ + spname = "sp"; + + + for (ic = lic; ic; ic = ic->next) { + + if (cln != ic->lineno) { + if (options.debug) { + debugFile->writeCLine (ic); + } + emitcode (";", "%s %d", ic->filename, ic->lineno); + cln = ic->lineno; + } + /* if the result is marked as + spilt and rematerializable or code for + this has already been generated then + do nothing */ + if (resultRemat (ic) || ic->generated) + continue; + + /* depending on the operation */ + switch (ic->op) { + case '!': + genNot (ic); + break; + + case '~': + genCpl (ic); + break; + + case UNARYMINUS: + genUminus (ic); + break; + + case IPUSH: + genIpush (ic); + break; + + case IPOP: + /* IPOP happens only when trying to restore a + spilt live range, if there is an ifx statement + following this pop then the if statement might + be using some of the registers being popped which + would destory the contents of the register so + we need to check for this condition and handle it */ + if (ic->next && + ic->next->op == IFX && + regsInCommon (IC_LEFT (ic), IC_COND (ic->next))) + genIfx (ic->next, ic); + else + genIpop (ic); + break; + + case CALL: + genCall (ic); + break; + + case PCALL: + genPcall (ic); + break; + + case FUNCTION: + genFunction (ic); + break; + + case ENDFUNCTION: + genEndFunction (ic); + break; + + case RETURN: + genRet (ic); + break; + + case LABEL: + genLabel (ic); + break; + + case GOTO: + genGoto (ic); + break; + + case '+': + genPlus (ic); + break; + + case '-': + if (!genDjnz (ic, ifxForOp (IC_RESULT (ic), ic))) + genMinus (ic); + break; + + case '*': + genMult (ic); + break; + + case '/': + genDiv (ic); + break; + + case '%': + genMod (ic); + break; + + case '>': + genCmpGt (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case '<': + genCmpLt (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case LE_OP: + genCmpLe (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case GE_OP: + genCmpGe (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case NE_OP: + genCmpNe (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case EQ_OP: + genCmpEq (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case AND_OP: + genAndOp (ic); + break; + + case OR_OP: + genOrOp (ic); + break; + + case '^': + genXor (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case '|': + genOr (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case BITWISEAND: + genAnd (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case INLINEASM: + genInline (ic); + break; + + case RRC: + genRRC (ic); + break; + + case RLC: + genRLC (ic); + break; + + case GETHBIT: + genGetHbit (ic); + break; + + case LEFT_OP: + genLeftShift (ic); + break; + + case RIGHT_OP: + genRightShift (ic); + break; + + case GET_VALUE_AT_ADDRESS: + genPointerGet (ic, hasInc(IC_LEFT(ic),ic)); + break; + + case '=': + if (POINTER_SET (ic)) + genPointerSet (ic, hasInc(IC_RESULT(ic),ic)); + else + genAssign (ic); + break; + + case IFX: + genIfx (ic, NULL); + break; + + case ADDRESS_OF: + genAddrOf (ic); + break; + + case JUMPTABLE: + genJumpTab (ic); + break; + + case CAST: + genCast (ic); + break; + + case RECEIVE: + genReceive (ic); + break; + + case SEND: + addSet (&_G.sendSet, ic); + break; + + case DUMMY_READ_VOLATILE: + genDummyRead (ic); + break; + + default: + ic = ic; + } + } + + + /* now we are ready to call the + peep hole optimizer */ + if (!options.nopeep) + peepHole (&lineHead); + + /* now do the actual printing */ + printLine (lineHead, codeOutBuf); + return; +} diff --git a/src/avr/gen.h b/src/avr/gen.h new file mode 100644 index 0000000..89ca931 --- /dev/null +++ b/src/avr/gen.h @@ -0,0 +1,84 @@ +/*------------------------------------------------------------------------- + SDCCgen51.h - header file for code generation for 8051 + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCGEN51_H +#define SDCCGEN51_H + +enum + { + AOP_LIT = 1, + AOP_REG, AOP_DIR, + AOP_DPTR, AOP_X, AOP_Z, + AOP_STK, AOP_IMMD, AOP_STR, + AOP_CRY, AOP_ACC, AOP_STK_D + }; + +/* type asmop : a homogenised type for + all the different spaces an operand can be + in */ +typedef struct asmop + { + + short type; /* can have values + AOP_LIT - operand is a literal value + AOP_REG - is in registers + AOP_DIR - direct just a name + AOP_DPTR - dptr contains address of operand + AOP_R0/R1 - r0/r1 contains address of operand + AOP_STK - should be pushed on stack this + can happen only for the result + AOP_IMMD - immediate value for eg. remateriazable + AOP_CRY - carry contains the value of this + AOP_STR - array of strings + AOP_ACC - result is in the acc:b pair + */ + short coff; /* current offset */ + short size; /* total size */ + unsigned code:1; /* is in Code space */ + unsigned paged:1; /* in paged memory */ + unsigned freed:1; /* already freed */ + union + { + value *aop_lit; /* if literal */ + regs *aop_reg[4]; /* array of registers */ + char *aop_dir; /* if direct */ + regs *aop_ptr; /* either -> R26 or R30 */ + char *aop_immd; /* if immediate others are implied */ + int aop_stk; /* stack offset when AOP_STK */ + char *aop_str[4]; /* just a string array containing the location */ + } + aopu; + regs *aop_ptr2; /* either -> R27 or R31 */ + } +asmop; + +void genAVRCode (iCode *); +void avr_emitDebuggerSymbol (char *); + +extern char *fReturn8051[]; +extern char *fReturn390[]; +extern unsigned fAVRReturnSize; +extern char **fAVRReturn; + +#endif diff --git a/src/avr/main.c b/src/avr/main.c new file mode 100644 index 0000000..efde4d2 --- /dev/null +++ b/src/avr/main.c @@ -0,0 +1,289 @@ +/** @file main.c + avr specific general functions. + + Note that mlh prepended _avr_ on the static functions. Makes + it easier to set a breakpoint using the debugger. +*/ +#include "common.h" +#include "main.h" +#include "ralloc.h" +#include "gen.h" + +static char _defaultRules[] = { +#include "peeph.rul" +}; + +/* list of key words used by msc51 */ +static char *_avr_keywords[] = { + "at", + "code", + "critical", + "eeprom", + "interrupt", + "sfr", + "xdata", + "_code", + "_eeprom", + "_generic", + "_xdata", + "sram", + "_sram", + "flash", + "_flash", + NULL +}; + +static int regParmFlg = 0; /* determine if we can register a parameter */ + +static void +_avr_init (void) +{ + asm_addTree (&asm_asxxxx_mapping); +} + +static void +_avr_reset_regparm (void) +{ + regParmFlg = 0; +} + +static int +_avr_regparm (sym_link * l, bool reentrant) +{ + /* the first eight bytes will be passed in + registers r16-r23. but we won't split variables + i.e. if not enough registers left to hold + the parameter then the whole parameter along + with rest of the parameters go onto the stack */ + if (regParmFlg < 8) { + int size; + if ((size = getSize (l)) > (8 - regParmFlg)) { + /* all remaining go on stack */ + regParmFlg = 8; + return 0; + } + regParmFlg += size; + return 1; + } + + return 0; +} + +void avr_assignRegisters (ebbIndex *); + +static bool +_avr_parseOptions (int *pargc, char **argv, int *i) +{ + /* TODO: allow port-specific command line options to specify + * segment names here. + */ + return FALSE; +} + +static void +_avr_finaliseOptions (void) +{ + port->mem.default_local_map = port->mem.default_globl_map = xdata; + /* change stack to be in far space */ + /* internal stack segment ; + SFRSPACE - NO + FAR-SPACE - YES + PAGED - NO + DIRECT-ACCESS - NO + BIT-ACCESS - NO + CODE-ACESS - NO + DEBUG-NAME - 'B' + POINTER-TYPE - FPOINTER + */ + istack = + allocMap (0, 1, 0, 0, 0, 0, options.stack_loc, ISTACK_NAME, + 'B', FPOINTER); + + /* also change xdata to be direct space since we can use lds/sts */ + xdata->direct = 1; + +} + +static void +_avr_setDefaultOptions (void) +{ + options.stackAuto = 1; +} + +static const char * +_avr_getRegName (struct regs *reg) +{ + if (reg) + return reg->name; + return "err"; +} + +static void +_avr_genAssemblerPreamble (FILE * of) +{ + +} + +/* Generate interrupt vector table. */ +static int +_avr_genIVT (struct dbuf_s * oBuf, symbol ** interrupts, int maxInterrupts) +{ + return TRUE; +} + +/* Indicate which extended bit operations this port supports */ +static bool +hasExtBitOp (int op, int size) +{ + if (op == RRC + || op == RLC + || op == GETHBIT + ) + return TRUE; + else + return FALSE; +} + +/* Indicate the expense of an access to an output storage class */ +static int +oclsExpense (struct memmap *oclass) +{ + if (IN_FARSPACE(oclass)) + return 1; + + return 0; +} + +/** $1 is always the basename. + $2 is always the output file. + $3 varies + $l is the list of extra options that should be there somewhere... + MUST be terminated with a NULL. +*/ +static const char *_linkCmd[] = { + "linkavr", "", "\"$1\"", NULL +}; + +/* $3 is replaced by assembler.debug_opts resp. port->assembler.plain_opts */ +static const char *_asmCmd[] = { + "asavr", "$l" , "$3", "\"$1.s\"", NULL +}; + +/* Globals */ +PORT avr_port = { + TARGET_ID_AVR, + "avr", + "ATMEL AVR", /* Target name */ + NULL, /* processor */ + { + glue, + TRUE, /* Emit glue around main */ + MODEL_LARGE | MODEL_SMALL, + MODEL_SMALL + }, + { + _asmCmd, + NULL, + "-plosgff", /* Options with debug */ + "-plosgff", /* Options without debug */ + 0, + ".s", + NULL, /* no do_assemble */ + }, + { + _linkCmd, + NULL, + NULL, + ".rel", + 1}, + { + _defaultRules}, + { + /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ + 1, 2, 2, 4, 2, 2, 3, 1, 4, 4}, + + /* tags for generic pointers */ + { 0x00, 0x40, 0x60, 0x80 }, /* far, near, xstack, code */ + + { + "XSEG", + "STACK", + "CSEG", + "DSEG", + "ISEG", + NULL, //PSEG + "XSEG", + "BSEG", + "RSEG", + "GSINIT", + "OSEG", + "GSFINAL", + "HOME", + NULL, // initialized xdata + NULL, // a code copy of xiseg + "CONST (CODE)", // const_name - const data (code or not) + "CABS (ABS,CODE)", // cabs_name - const absolute data (code or not) + "XABS (ABS,XDATA)", // xabs_name - absolute xdata/pdata + "IABS (ABS,DATA)", // iabs_name - absolute idata/data + NULL, + NULL, + 0, + }, + { NULL, NULL }, + { + -1, 1, 4, 1, 1, 0}, + /* avr has an 8 bit mul */ + { + 1, -1 + }, + { + avr_emitDebuggerSymbol + }, + { + 255/3, /* maxCount */ + 3, /* sizeofElement */ + /* The rest of these costs are bogus. They approximate */ + /* the behavior of src/SDCCicode.c 1.207 and earlier. */ + {4,4,4}, /* sizeofMatchJump[] */ + {0,0,0}, /* sizeofRangeCompare[] */ + 0, /* sizeofSubtract */ + 3, /* sizeofDispatch */ + }, + "_", + _avr_init, + _avr_parseOptions, + NULL, + NULL, + _avr_finaliseOptions, + _avr_setDefaultOptions, + avr_assignRegisters, + _avr_getRegName, + _avr_keywords, + _avr_genAssemblerPreamble, + NULL, /* no genAssemblerEnd */ + _avr_genIVT, + NULL, // _avr_genXINIT + NULL, /* genInitStartup */ + _avr_reset_regparm, + _avr_regparm, + NULL, + NULL, + NULL, + hasExtBitOp, /* hasExtBitOp */ + oclsExpense, /* oclsExpense */ + FALSE, + TRUE, /* little endian */ + 0, /* leave lt */ + 1, /* transform gt ==> not le */ + 0, /* leave le */ + 0, /* leave ge */ + 0, /* leave != */ + 0, /* leave == */ + FALSE, /* No array initializer support. */ + 0, /* no CSE cost estimation yet */ + NULL, /* no builtin functions */ + GPOINTER, /* treat unqualified pointers as "generic" pointers */ + 1, /* reset labelKey to 1 */ + 1, /* globals & local static allowed */ + PORT_MAGIC +}; diff --git a/src/avr/main.h b/src/avr/main.h new file mode 100644 index 0000000..6555225 --- /dev/null +++ b/src/avr/main.h @@ -0,0 +1,8 @@ +#ifndef MAIN_INCLUDE +#define MAIN_INCLUDE + +bool x_parseOptions (char **argv, int *pargc); +void x_setDefaultOptions (void); +void x_finaliseOptions (void); + +#endif diff --git a/src/avr/peeph.def b/src/avr/peeph.def new file mode 100644 index 0000000..2401820 --- /dev/null +++ b/src/avr/peeph.def @@ -0,0 +1,1701 @@ +//replace restart { +// pop %1 +// push %1 +//} by { +// ; Peephole 1 removed pop %1 push %1 (not push pop) +//} + +//replace restart { +// pop %1 +// mov %2,%3 +// push %1 +//} by { +// ; Peephole 2 removed pop %1 push %1 (not push pop) +// mov %2,%3 +//} + +// +// added by Jean Louis VERN for +// his shift stuff +replace restart { + xch a,%1 + xch a,%1 +} by { + ; Peephole 2.a removed redundant xch xch +} + +replace restart { +// saving 2 byte + mov %1,#0x00 + mov a,#0x00 +} by { + ; Peephole 3.a changed mov to clr + clr a + mov %1,a +} + +replace restart { +// saving 1 byte + mov %1,#0x00 + clr a +} by { + ; Peephole 3.b changed mov to clr + clr a + mov %1,a +} + +replace restart { +// saving 1 byte, loosing 1 cycle but maybe allowing peephole 3.b to start + mov %1,#0x00 + mov %2,#0x00 + mov a,%3 +} by { + ; Peephole 3.c changed mov to clr + clr a + mov %1,a + mov %2,a + mov a,%3 +} + + + +replace { + mov %1,a + mov dptr,#%2 + mov a,%1 + movx @dptr,a +} by { + ; Peephole 100 removed redundant mov + mov %1,a + mov dptr,#%2 + movx @dptr,a +} + +replace { + mov a,acc +} by { + ; Peephole 100.a removed redundant mov +} + +replace { + mov a,%1 + movx @dptr,a + inc dptr + mov a,%1 + movx @dptr,a +} by { + ; Peephole 101 removed redundant mov + mov a,%1 + movx @dptr,a + inc dptr + movx @dptr,a +} + +replace { + mov %1,%2 + ljmp %3 +%4: + mov %1,%5 +%3: + mov dpl,%1 +%7: + mov sp,bp + pop bp +} by { + ; Peephole 102 removed redundant mov + mov dpl,%2 + ljmp %3 +%4: + mov dpl,%5 +%3: +%7: + mov sp,bp + pop bp +} + +replace { + mov %1,%2 + ljmp %3 +%4: + mov a%1,%5 +%3: + mov dpl,%1 +%7: + mov sp,bp + pop bp +} by { + ; Peephole 103 removed redundant mov + mov dpl,%2 + ljmp %3 +%4: + mov dpl,%5 +%3: +%7: + mov sp,bp + pop bp +} + +replace { + mov a,bp + clr c + add a,#0x01 + mov r%1,a +} by { + ; Peephole 104 optimized increment (acc not set to r%1, flags undefined) + mov r%1,bp + inc r%1 +} + +replace { + mov %1,a + mov a,%1 +} by { + ; Peephole 105 removed redundant mov + mov %1,a +} + +replace { + mov %1,a + clr c + mov a,%1 +} by { + ; Peephole 106 removed redundant mov + mov %1,a + clr c +} + +replace { + ljmp %1 +%1: +} by { + ; Peephole 107 removed redundant ljmp +%1: +} + +replace { + jc %1 + ljmp %5 +%1: +} by { + ; Peephole 108 removed ljmp by inverse jump logic + jnc %5 +%1: +} if labelInRange + +replace { + jz %1 + ljmp %5 +%1: +} by { + ; Peephole 109 removed ljmp by inverse jump logic + jnz %5 +%1: +} if labelInRange + +replace { + jnz %1 + ljmp %5 +%1: +} by { + ; Peephole 110 removed ljmp by inverse jump logic + jz %5 +%1: +} if labelInRange + +replace { + jb %1,%2 + ljmp %5 +%2: +} by { + ; Peephole 111 removed ljmp by inverse jump logic + jnb %1,%5 +%2: +} if labelInRange + +replace { + jnb %1,%2 + ljmp %5 +%2: +} by { + ; Peephole 112 removed ljmp by inverse jump logic + jb %1,%5 +%2: +} if labelInRange + +replace { + ljmp %5 +%1: +} by { + ; Peephole 132 changed ljmp to sjmp + sjmp %5 +%1: +} if labelInRange + + +replace { + clr a + cjne %1,%2,%3 + cpl a +%3: + rrc a + mov %4,c +} by { + ; Peephole 113 optimized misc sequence + clr %4 + cjne %1,%2,%3 + setb %4 +%3: +} + +replace { + clr a + cjne %1,%2,%3 + cjne %10,%11,%3 + cpl a +%3: + rrc a + mov %4,c +} by { + ; Peephole 114 optimized misc sequence + clr %4 + cjne %1,%2,%3 + cjne %10,%11,%3 + setb %4 +%3: +} + +replace { + clr a + cjne %1,%2,%3 + cpl a +%3: + jnz %4 +} by { + ; Peephole 115 jump optimization + cjne %1,%2,%3 + sjmp %4 +%3: +} + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cpl a +%3: + jnz %4 +} by { + ; Peephole 116 jump optimization + cjne %1,%2,%3 + cjne %9,%10,%3 + sjmp %4 +%3: +} + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + cpl a +%3: + jnz %4 +} by { + ; Peephole 117 jump optimization + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + sjmp %4 +%3: +} + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + cjne %13,%14,%3 + cpl a +%3: + jnz %4 +} by { + ; Peephole 118 jump optimization + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + cjne %13,%14,%3 + sjmp %4 +%3: +} +replace { + mov a,#0x01 + cjne %1,%2,%3 + clr a +%3: + jnz %4 +} by { + ; Peephole 119 jump optimization + cjne %1,%2,%4 +%3: +} + +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + clr a +%3: + jnz %4 +} by { + ; Peephole 120 jump optimization + cjne %1,%2,%4 + cjne %10,%11,%4 +%3: +} +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + clr a +%3: + jnz %4 +} by { + ; Peephole 121 jump optimization + cjne %1,%2,%4 + cjne %10,%11,%4 + cjne %12,%13,%4 +%3: +} + +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + cjne %14,%15,%3 + clr a +%3: + jnz %4 +} by { + ; Peephole 122 jump optimization + cjne %1,%2,%4 + cjne %10,%11,%4 + cjne %12,%13,%4 + cjne %14,%15,%4 +%3: +} + +replace { + mov a,#0x01 + cjne %1,%2,%3 + clr a +%3: + jz %4 +} by { + ; Peephole 123 jump optimization + cjne %1,%2,%3 + smp %4 +%3: +} +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + clr a +%3: + jz %4 +} by { + ; Peephole 124 jump optimization + cjne %1,%2,%3 + cjne %10,%11,%3 + smp %4 +%3: +} + +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + clr a +%3: + jz %4 +} by { + ; Peephole 125 jump optimization + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + sjmp %4 +%3: +} + +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + cjne %14,%15,%3 + clr a +%3: + jz %4 +} by { + ; Peephole 126 jump optimization + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + cjne %14,%15,%3 + sjmp %4 +%3: +} + +replace { + push psw + mov psw,%1 + push bp + mov bp,%2 +%3: + mov %2,bp + pop bp + pop psw + ret +} by { + ; Peephole 127 removed misc sequence + ret +} + +replace { + clr a + rlc a + jz %1 +} by { + ; Peephole 128 jump optimization + jnc %1 +} + +replace { + clr a + rlc a + jnz %1 +} by { + ; Peephole 129 jump optimization + jc %1 +} + +replace { + mov r%1,@r%2 +} by { + ; Peephole 130 changed target address mode r%1 to ar%1 + mov ar%1,@r%2 +} + +replace { + mov a,%1 + subb a,#0x01 + mov %2,a + mov %1,%2 +} by { + ; Peephole 131 optimized decrement (not caring for c) + dec %1 + mov %2,%1 +} + +replace { + mov r%1,%2 + mov ar%3,@r%1 + inc r%3 + mov r%4,%2 + mov @r%4,ar%3 +} by { + ; Peephole 133 removed redundant moves + mov r%1,%2 + inc @r%1 + mov ar%3,@r%1 +} + +replace { + mov r%1,%2 + mov ar%3,@r%1 + dec r%3 + mov r%4,%2 + mov @r%4,ar%3 +} by { + ; Peephole 134 removed redundant moves + mov r%1,%2 + dec @r%1 + mov ar%3,@r%1 +} + +replace { + mov r%1,a + mov a,r%2 + orl a,r%1 +} by { + ; Peephole 135 removed redundant mov + mov r%1,a + orl a,r%2 +} + +replace { + mov %1,a + mov dpl,%2 + mov dph,%3 + mov dpx,%4 + mov a,%1 +} by { + ; Peephole 136a removed redundant moves + mov %1,a + mov dpl,%2 + mov dph,%3 + mov dpx,%4 +} if 24bitMode + +replace { + mov %1,a + mov dpl,%2 + mov dph,%3 + mov a,%1 +} by { + ; Peephole 136 removed redundant moves + mov %1,a + mov dpl,%2 + mov dph,%3 +} + +replace { + mov b,#0x00 + mov a,%1 + cjne %2,%3,%4 + mov b,#0x01 +%4: + mov a,b + jz %5 +} by { + ; Peephole 137 optimized misc jump sequence + mov a,%1 + cjne %2,%3,%5 +%4: +} + +replace { + mov b,#0x00 + mov a,%1 + cjne %2,%3,%4 + mov b,#0x01 +%4: + mov a,b + jnz %5 +} by { + ; Peephole 138 optimized misc jump sequence + mov a,%1 + cjne %2,%3,%4 + sjmp %5 +%4: +} + +replace { + mov r%1,a + anl ar%1,%2 + mov a,r%1 +} by { + ; Peephole 139 removed redundant mov + anl a,%2 + mov r%1,a +} + +replace { + mov r%1,a + orl ar%1,%2 + mov a,r%1 +} by { + ; Peephole 140 removed redundant mov + orl a,%2 + mov r%1,a } + +replace { + mov r%1,a + xrl ar%1,%2 + mov a,r%1 +} by { + ; Peephole 141 removed redundant mov + xrl a,%2 + mov r%1,a +} + +replace { + mov r%1,a + mov r%2,ar%1 + mov ar%1,@r%2 +} by { + ; Peephole 142 removed redundant moves + mov r%2,a + mov ar%1,@r%2 +} + +replace { + rlc a + mov acc.0,c +} by { + ; Peephole 143 converted rlc to rl + rl a +} + +replace { + rrc a + mov acc.7,c +} by { + ; Peephole 144 converted rrc to rc + rr a +} + +replace { + clr c + addc a,%1 +} by { + ; Peephole 145 changed to add without carry + add a,%1 +} + +replace { + clr c + mov a,%1 + addc a,%2 +} by { + ; Peephole 146 changed to add without carry + mov a,%1 + add a,%2 +} + +replace { + orl r%1,a +} by { + ; Peephole 147 changed target address mode r%1 to ar%1 + orl ar%1,a +} + +replace { + anl r%1,a +} by { + ; Peephole 148 changed target address mode r%1 to ar%1 + anl ar%1,a +} + +replace { + xrl r%1,a +} by { + ; Peephole 149 changed target address mode r%1 to ar%1 + xrl ar%1,a +} + +replace { + mov %1,dpl + mov dpl,%1 +%9: + ret +} by { + ; Peephole 150 removed misc moves via dpl before return +%9: + ret +} + +replace { + mov %1,dpl + mov %2,dph + mov dpl,%1 + mov dph,%2 +%9: + ret +} by { + ; Peephole 151 removed misc moves via dph, dpl before return +%9: + ret +} + +replace { + mov %1,dpl + mov %2,dph + mov dpl,%1 +%9: + ret +} by { + ; Peephole 152 removed misc moves via dph, dpl before return +%9: + ret +} + +replace { + mov %1,dpl + mov %2,dph + mov %3,b + mov dpl,%1 + mov dph,%2 + mov b,%3 +%9: + ret +} by { + ; Peephole 153 removed misc moves via dph, dpl, b before return +%9: + ret +} + +replace { + mov %1,dpl + mov %2,dph + mov %3,b + mov dpl,%1 +%9: + ret +} by { + ; Peephole 154 removed misc moves via dph, dpl, b before return +%9: + ret +} + +replace { + mov %1,dpl + mov %2,dph + mov %3,b + mov dpl,%1 + mov dph,%2 +%9: + ret +} by { + ; Peephole 155 removed misc moves via dph, dpl, b before return +%9: + ret +} + +replace { + mov %1,dpl + mov %2,dph + mov %3,b + mov %4,a + mov dpl,%1 + mov dph,%2 + mov b,%3 + mov a,%4 +%9: + ret +} by { + ; Peephole 156 removed misc moves via dph, dpl, b, a before return +%9: + ret +} + +replace { + mov %1,dpl + mov %2,dph + mov %3,b + mov %4,a + mov dpl,%1 + mov dph,%2 +%9: + ret +} by { + ; Peephole 157 removed misc moves via dph, dpl, b, a before return +%9: + ret +} + +replace { + mov %1,dpl + mov %2,dph + mov %3,b + mov %4,a + mov dpl,%1 +%9: + ret } by { + ; Peephole 158 removed misc moves via dph, dpl, b, a before return +%9: + ret } + +replace { + mov %1,#%2 + xrl %1,#0x80 +} by { + ; Peephole 159 avoided xrl during execution + mov %1,#(%2 ^ 0x80) +} + +replace { + jnc %1 + sjmp %2 +%1: +} by { + ; Peephole 160 removed sjmp by inverse jump logic + jc %2 +%1:} + +replace { + jc %1 + sjmp %2 +%1: +} by { + ; Peephole 161 removed sjmp by inverse jump logic + jnc %2 +%1:} + +replace { + jnz %1 + sjmp %2 +%1: +} by { + ; Peephole 162 removed sjmp by inverse jump logic + jz %2 +%1:} + +replace { + jz %1 + sjmp %2 +%1: +} by { + ; Peephole 163 removed sjmp by inverse jump logic + jnz %2 +%1:} + +replace { + jnb %3,%1 + sjmp %2 +%1: +} by { + ; Peephole 164 removed sjmp by inverse jump logic + jb %3,%2 +%1: +} + +replace { + jb %3,%1 + sjmp %2 +%1: +} by { + ; Peephole 165 removed sjmp by inverse jump logic + jnb %3,%2 +%1: +} + +replace { + mov %1,%2 + mov %3,%1 + mov %2,%1 +} by { + ; Peephole 166 removed redundant mov + mov %1,%2 + mov %3,%1 } + +replace { + mov c,%1 + cpl c + mov %1,c +} by { + ; Peephole 167 removed redundant bit moves (c not set to %1) + cpl %1 } + +replace { + jnb %1,%2 + sjmp %3 +%2:} by { + ; Peephole 168 jump optimization + jb %1,%3 +%2:} + +replace { + jb %1,%2 + sjmp %3 +%2:} by { + ; Peephole 169 jump optimization + jnb %1,%3 +%2:} + +replace { + clr a + cjne %1,%2,%3 + cpl a +%3: + jz %4 +} by { + ; Peephole 170 jump optimization + cjne %1,%2,%4 +%3:} + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cpl a +%3: + jz %4 +} by { + ; Peephole 171 jump optimization + cjne %1,%2,%4 + cjne %9,%10,%4 +%3:} + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + cpl a +%3: + jz %4 +} by { + ; Peephole 172 jump optimization + cjne %1,%2,%4 + cjne %9,%10,%4 + cjne %11,%12,%4 +%3:} + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + cjne %13,%14,%3 + cpl a +%3: + jz %4 +} by { + ; Peephole 173 jump optimization + cjne %1,%2,%4 + cjne %9,%10,%4 + cjne %11,%12,%4 + cjne %13,%14,%4 +%3:} + +replace { + mov r%1,%2 + clr c + mov a,r%1 + subb a,#0x01 + mov %2,a +} by { + ; Peephole 174 optimized decrement (acc not set to %2, flags undefined) + mov r%1,%2 + dec %2 +} + + +replace { + mov r%1,%2 + mov a,r%1 + add a,#0x01 + mov %2,a +} by { + ; Peephole 175 optimized increment (acc not set to %2, flags undefined) + mov r%1,%2 + inc %2 +} + +replace { + mov %1,@r%2 + inc %1 + mov @r%2,%1 +} by { + ; Peephole 176 optimized increment, removed redundant mov + inc @r%2 + mov %1,@r%2 +} + +replace { + mov %1,%2 + mov %2,%1 +} by { + ; Peephole 177 removed redundant mov + mov %1,%2 +} + +replace { + mov a,%1 + mov b,a + mov a,%2 +} by { + ; Peephole 178 removed redundant mov + mov b,%1 + mov a,%2 +} + +// rules 179-182 provided by : Frieder +// saving 2 byte, 1 cycle +replace { + mov b,#0x00 + mov a,#0x00 +} by { + ; Peephole 179 changed mov to clr + clr a + mov b,a +} + +// saving 1 byte, 0 cycles +replace { + mov a,#0x00 +} by { + ; Peephole 180 changed mov to clr + clr a +} + +replace { + mov dpl,#0x00 + mov dph,#0x00 + mov dpx,#0x00 +} by { + ; Peephole 181a used 24 bit load of dptr + mov dptr,#0x0000 +} if 24bitMode + +// saving 3 byte, 2 cycles, return(NULL) profits here +replace { + mov dpl,#0x00 + mov dph,#0x00 +} by { + ; Peephole 181 used 16 bit load of dptr + mov dptr,#0x0000 +} + +// saves 2 bytes, ?? cycles. +replace { + mov dpl,#%1 + mov dph,#(%1 >> 8) + mov dpx,#(%1 >> 16) +} by { + ; Peephole 182a used 24 bit load of dptr + mov dptr,#%1 +} if 24bitMode + +// saving 3 byte, 2 cycles, return(float_constant) profits here +replace { + mov dpl,#%1 + mov dph,#%2 +} by { + ; Peephole 182 used 16 bit load of dptr + mov dptr,#(((%2)<<8) + %1) +} + +replace { + anl %1,#%2 + anl %1,#%3 +} by { + ; Peephole 183 avoided anl during execution + anl %1,#(%2 & %3) +} + +replace { + mov %1,a + cpl a + mov %1,a +} by { + ; Peephole 184 removed redundant mov + cpl a + mov %1,a +} + +replace { +// acc being incremented might cause problems + mov %1,a + inc %1 +} by { + ; Peephole 185 changed order of increment (acc incremented also!) + inc a + mov %1,a +} + +replace { + add a,#%1 + mov dpl,a + clr a + addc a,#(%1 >> 8) + mov dph,a + clr a + movc a,@a+dptr + mov %2,a + inc dptr + clr a + movc a,@a+dptr + mov %3,a + inc dptr + clr a + movc a,@a+dptr + mov %4,a + inc dptr + clr a +} by { + ; Peephole 186.a optimized movc sequence + mov dptr,#%1 + mov b,acc + movc a,@a+dptr + mov %2,a + mov acc,b + inc dptr + movc a,@a+dptr + mov %3,a + mov acc,b + inc dptr + mov %4,a + mov acc,b + inc dptr +} + +replace { + add a,#%1 + mov dpl,a + clr a + addc a,#(%1 >> 8) + mov dph,a + clr a + movc a,@a+dptr + mov %2,a + inc dptr + clr a + movc a,@a+dptr + mov %3,a + inc dptr + clr a +} by { + ; Peephole 186.b optimized movc sequence + mov dptr,#%1 + mov b,acc + movc a,@a+dptr + mov %2,a + mov acc,b + inc dptr + movc a,@a+dptr + mov %3,a + mov acc,b + inc dptr +} + +replace { + add a,#%1 + mov dpl,a + clr a + addc a,#(%1 >> 8) + mov dph,a + clr a + movc a,@a+dptr + mov %2,a + inc dptr + clr a +} by { + ; Peephole 186.c optimized movc sequence + mov dptr,#%1 + mov b,acc + movc a,@a+dptr + mov %2,a + mov acc,b + inc dptr +} + +replace { + add a,#%1 + mov dpl,a + clr a + addc a,#(%1 >> 8) + mov dph,a + clr a + movc a,@a+dptr +} by { + ; Peephole 186 optimized movc sequence + mov dptr,#%1 + movc a,@a+dptr +} + +replace { + mov r%1,%2 + anl ar%1,#%3 + mov a,r%1 +} by { + ; Peephole 187 used a instead of ar%1 for anl + mov a,%2 + anl a,#%3 + mov r%1,a +} + +replace { + mov %1,a + mov dptr,%2 + movc a,@a+dptr + mov %1,a +} by { + ; Peephole 188 removed redundant mov + mov dptr,%2 + movc a,@a+dptr + mov %1,a +} + +replace { + anl a,#0x0f + mov %1,a + mov a,#0x0f + anl a,%1 +} by { + ; Peephole 189 removed redundant mov and anl + anl a,#0x0f + mov %1,a +} + +// rules 190 & 191 need to be in order +replace { + mov a,%1 + lcall __gptrput + mov a,%1 +} by { + ; Peephole 190 removed redundant mov + mov a,%1 + lcall __gptrput +} + +replace { + mov %1,a + mov dpl,%2 + mov dph,%3 + mov b,%4 + mov a,%1 +} by { + ; Peephole 191 removed redundant mov + mov %1,a + mov dpl,%2 + mov dph,%3 + mov b,%4 +} + +replace { + mov r%1,a + mov @r%2,ar%1 +} by { + ; Peephole 192 used a instead of ar%1 as source + mov r%1,a + mov @r%2,a +} + +replace { + jnz %3 + mov a,%4 + jnz %3 + mov a,%9 + jnz %3 + mov a,%12 + cjne %13,%14,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 193.a optimized misc jump sequence + jnz %8 + mov a,%4 + jnz %8 + mov a,%9 + jnz %8 + mov a,%12 + cjne %13,%14,%8 + sjmp %7 +%3: +} + +replace { + cjne %1,%2,%3 + mov a,%4 + cjne %5,%6,%3 + mov a,%9 + cjne %10,%11,%3 + mov a,%12 + cjne %13,%14,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 193 optimized misc jump sequence + cjne %1,%2,%8 + mov a,%4 + cjne %5,%6,%8 + mov a,%9 + cjne %10,%11,%8 + mov a,%12 + cjne %13,%14,%8 + sjmp %7 +%3: +} + +replace { + cjne %1,%2,%3 + cjne %5,%6,%3 + cjne %10,%11,%3 + cjne %13,%14,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 194 optimized misc jump sequence + cjne %1,%2,%8 + cjne %5,%6,%8 + cjne %10,%11,%8 + cjne %13,%14,%8 + sjmp %7 +%3: +} + +replace { + jnz %3 + mov a,%4 + jnz %3 + mov a,%9 + cjne %10,%11,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 195.a optimized misc jump sequence + jnz %8 + mov a,%4 + jnz %8 + mov a,%9 + cjne %10,%11,%8 + sjmp %7 +%3: +} + +replace { + cjne %1,%2,%3 + mov a,%4 + cjne %5,%6,%3 + mov a,%9 + cjne %10,%11,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 195 optimized misc jump sequence + cjne %1,%2,%8 + mov a,%4 + cjne %5,%6,%8 + mov a,%9 + cjne %10,%11,%8 + sjmp %7 +%3: +} + +replace { + cjne %1,%2,%3 + cjne %5,%6,%3 + cjne %10,%11,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 196 optimized misc jump sequence + cjne %1,%2,%8 + cjne %5,%6,%8 + cjne %10,%11,%8 + sjmp %7 +%3: +} + +replace { + jnz %3 + mov a,%4 + cjne %5,%6,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 197.a optimized misc jump sequence + jnz %8 + mov a,%4 + cjne %5,%6,%8 + sjmp %7 +%3: +} + +replace { + cjne %1,%2,%3 + mov a,%4 + cjne %5,%6,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 197 optimized misc jump sequence + cjne %1,%2,%8 + mov a,%4 + cjne %5,%6,%8 + sjmp %7 +%3: +} + +replace { + cjne %1,%2,%3 + cjne %5,%6,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 198 optimized misc jump sequence + cjne %1,%2,%8 + cjne %5,%6,%8 + sjmp %7 +%3: +} + +replace { + cjne %1,%2,%3 + sjmp %4 +%3: + sjmp %5 +} by { + ; Peephole 199 optimized misc jump sequence + cjne %1,%2,%5 + sjmp %4 +%3: +} + +replace { + sjmp %1 +%1: +} by { + ; Peephole 200 removed redundant sjmp +%1: +} + +replace { + sjmp %1 +%2: +%1: +} by { + ; Peephole 201 removed redundant sjmp +%2: +%1: +} + +replace { + push acc + mov dptr,%1 + pop acc +} by { + ; Peephole 202 removed redundant push pop + mov dptr,%1 +} + +replace { + mov r%1,_spx + lcall %2 + mov r%1,_spx +} by { + ; Peephole 203 removed mov r%1,_spx + lcall %2 +} + +replace { + mov %1,a + add a,acc + mov %1,a +} by { + ; Peephole 204 removed redundant mov + add a,acc + mov %1,a +} + +replace { + djnz %1,%2 + sjmp %3 +%2: + sjmp %4 +%3: +} by { + ; Peephole 205 optimized misc jump sequence + djnz %1,%4 +%2: +%3: +} + +replace { + mov %1,%1 +} by { + ; Peephole 206 removed redundant mov %1,%1 +} + +replace { + mov a,_bp + add a,#0x00 + mov %1,a +} by { + ; Peephole 207 removed zero add (acc not set to %1, flags undefined) + mov %1,_bp +} + +replace { + push acc + mov r%1,_bp + pop acc +} by { + ; Peephole 208 removed redundant push pop + mov r%1,_bp +} + +replace { + mov a,_bp + add a,#0x00 + inc a + mov %1,a +} by { + ; Peephole 209 optimized increment (acc not set to %1, flags undefined) + mov %1,_bp + inc %1 +} + +replace { + mov dptr,#((((%1 >> 16)) <<16) + (((%1 >> 8)) <<8) + %1) +} by { + ; Peephole 210a simplified expression + mov dptr,#%1 +} if 24bitMode + +replace { + mov dptr,#((((%1 >> 8)) <<8) + %1) +} by { + ; Peephole 210 simplified expression + mov dptr,#%1 +} + +replace { + push %1 + pop %1 +} by { + ; Peephole 211 removed redundant push %1 pop %1 +} + +replace { + mov a,_bp + add a,#0x01 + mov r%1,a +} by { + ; Peephole 212 reduced add sequence to inc + mov r%1,_bp + inc r%1 +} + +replace { + mov %1,#(( %2 >> 8 ) ^ 0x80) +} by { + mov %1,#(%2 >> 8) + xrl %1,#0x80 +} + +replace { + mov %1,#(( %2 + %3 >> 8 ) ^ 0x80) +} by { + mov %1,#((%2 + %3) >> 8) + xrl %1,#0x80 +} + +replace { + mov %1,a + mov a,%2 + add a,%1 +} by { + ; Peephole 214 reduced some extra movs + mov %1,a + add a,%2 +} if operandsNotSame + +replace { + mov %1,a + add a,%2 + mov %1,a +} by { + ; Peephole 215 removed some movs + add a,%2 + mov %1,a +} if operandsNotSame + +replace { + mov r%1,%2 + clr a + inc r%1 + mov @r%1,a + dec r%1 + mov @r%1,a +} by { + ; Peephole 216 simplified clear (2bytes) + mov r%1,%2 + clr a + mov @r%1,a + inc r%1 + mov @r%1,a +} + +replace { + mov r%1,%2 + clr a + inc r%1 + inc r%1 + mov @r%1,a + dec r%1 + mov @r%1,a + dec r%1 + mov @r%1,a +} by { + ; Peephole 217 simplified clear (3bytes) + mov r%1,%2 + clr a + mov @r%1,a + inc r%1 + mov @r%1,a + inc r%1 + mov @r%1,a +} + +replace { + mov r%1,%2 + clr a + inc r%1 + inc r%1 + inc r%1 + mov @r%1,a + dec r%1 + mov @r%1,a + dec r%1 + mov @r%1,a + dec r%1 + mov @r%1,a +} by { + ; Peephole 218 simplified clear (4bytes) + mov r%1,%2 + clr a + mov @r%1,a + inc r%1 + mov @r%1,a + inc r%1 + mov @r%1,a + inc r%1 + mov @r%1,a +} + +replace { + clr a + movx @dptr,a + mov dptr,%1 + clr a + movx @dptr,a +} by { + ; Peephole 219 removed redundant clear + clr a + movx @dptr,a + mov dptr,%1 + movx @dptr,a +} + +replace { + clr a + movx @dptr,a + mov dptr,%1 + movx @dptr,a + mov dptr,%2 + clr a + movx @dptr,a +} by { + ; Peephole 219a removed redundant clear + clr a + movx @dptr,a + mov dptr,%1 + movx @dptr,a + mov dptr,%2 + movx @dptr,a +} \ No newline at end of file diff --git a/src/avr/ralloc.c b/src/avr/ralloc.c new file mode 100644 index 0000000..512edc4 --- /dev/null +++ b/src/avr/ralloc.c @@ -0,0 +1,2307 @@ +/*------------------------------------------------------------------------ + + SDCCralloc.c - source file for register allocation. (ATMEL AVR) specific + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" +#include "ralloc.h" +#include "gen.h" + +/*-----------------------------------------------------------------*/ +/* At this point we start getting processor specific although */ +/* some routines are non-processor specific & can be reused when */ +/* targetting other processors. The decision for this will have */ +/* to be made on a routine by routine basis */ +/* routines used to pack registers are most definitely not reusable */ +/* since the pack the registers depending strictly on the MCU */ +/*-----------------------------------------------------------------*/ + +extern void genAVRCode (iCode *); + +/* Global data */ +static struct { + bitVect *spiltSet; + set *stackSpil; + bitVect *regAssigned; + short blockSpil; + int slocNum; + bitVect *funcrUsed; /* registers used in a function */ + int stackExtend; + int dataExtend; +} _G; + +/* Shared with gen.c */ +int avr_ptrRegReq; /* pointer register required */ + +/* AVR registers */ +regs regsAVR[] = { + {REG_GPR|REG_PAIR, R0_IDX, REG_GPR|REG_PAIR, "r0", "r0", "", 0, 0, 0}, /* scratch */ + {REG_GPR, R1_IDX, REG_GPR , "r1", "r1", "", 0, 0, 0}, /* scratch */ + {REG_GPR|REG_PAIR, R2_IDX, REG_GPR|REG_PAIR, "r2", "r2", "", 0, 1, 1}, /* gpr */ + {REG_GPR, R3_IDX, REG_GPR , "r3", "r3", "", 0, 1, 1}, /* gpr */ + {REG_GPR|REG_PAIR, R4_IDX, REG_GPR|REG_PAIR, "r4", "r4", "", 0, 1, 1}, /* gpr */ + {REG_GPR, R5_IDX, REG_GPR , "r5", "r5", "", 0, 1, 1}, /* gpr */ + {REG_GPR|REG_PAIR, R6_IDX, REG_GPR|REG_PAIR, "r6", "r6", "", 0, 1, 1}, /* gpr */ + {REG_GPR, R7_IDX, REG_GPR , "r7", "r7", "", 0, 1, 1}, /* gpr */ + {REG_GPR|REG_PAIR, R8_IDX, REG_GPR|REG_PAIR, "r8", "r8", "", 0, 1, 1}, /* gpr */ + {REG_GPR, R9_IDX, REG_GPR , "r9", "r9", "", 0, 1, 1}, /* gpr */ + {REG_GPR|REG_PAIR, R10_IDX,REG_GPR|REG_PAIR, "r10", "r10","",0, 1, 1}, /* gpr */ + {REG_GPR, R11_IDX,REG_GPR , "r11", "r11","",0, 1, 1}, /* gpr */ + {REG_GPR|REG_PAIR, R12_IDX,REG_GPR|REG_PAIR, "r12", "r12","",0, 1, 1}, /* gpr */ + {REG_GPR, R13_IDX,REG_GPR , "r13", "r13","",0, 1, 1}, /* gpr */ + {REG_GPR|REG_PAIR, R14_IDX,REG_GPR|REG_PAIR, "r14", "r14","",0, 1, 1}, /* gpr */ + {REG_GPR, R15_IDX,REG_GPR , "r15", "r15","",0, 1, 1}, /* gpr */ + {REG_GPR|REG_PAIR, R16_IDX,REG_GPR|REG_PAIR, "r16", "r16","",0, 1, 0}, /* parm/gpr */ + {REG_GPR, R17_IDX,REG_GPR , "r17", "r17","",0, 1, 0}, /* parm/gpr */ + {REG_GPR|REG_PAIR, R18_IDX,REG_GPR|REG_PAIR, "r18", "r18","",0, 1, 0}, /* parm/gpr */ + {REG_GPR, R19_IDX,REG_GPR , "r19", "r19","",0, 1, 0}, /* parm/gpr */ + {REG_GPR|REG_PAIR, R20_IDX,REG_GPR|REG_PAIR, "r20", "r20","",0, 1, 0}, /* parm/gpr */ + {REG_GPR, R21_IDX,REG_GPR , "r21", "r21","",0, 1, 0}, /* parm/gpr */ + {REG_GPR|REG_PAIR, R22_IDX,REG_GPR|REG_PAIR, "r22", "r22","",0, 1, 0}, /* parm/gpr */ + {REG_GPR, R23_IDX,REG_GPR , "r23", "r23","",0, 1, 0}, /* parm/gpr */ + {REG_GPR|REG_PAIR, R24_IDX,REG_GPR|REG_PAIR, "r24", "r24","",0, 0, 0}, /* scratch */ + {REG_GPR, R25_IDX,REG_GPR , "r25", "r25","",0, 0, 0}, /* scratch */ + {REG_GPR|REG_PAIR, R26_IDX,REG_GPR|REG_PAIR, "r26", "r26","",0, 1, 1}, /* used as pointer reg X */ + {REG_GPR, R27_IDX,REG_GPR , "r27", "r27","",0, 1, 1}, /* used as pointer reg X */ + {REG_GPR|REG_PAIR, R28_IDX,REG_GPR|REG_PAIR, "r28", "r28","",0, 1, 0}, /* stack frame Y */ + {REG_GPR, R29_IDX,REG_GPR , "r29", "r29","",0, 1, 0}, /* stack frame Y */ + {REG_GPR|REG_PAIR, R30_IDX,REG_GPR|REG_PAIR, "r30", "r30","",0, 1, 1}, /* used as pointer reg Z */ + {REG_GPR, R31_IDX,REG_GPR , "r31", "r31","",0, 1, 1}, /* used as pointer reg Z */ + {REG_PTR, X_IDX, REG_PTR, "X", "X", "", 0, 1, 0}, + {REG_PTR, Z_IDX, REG_PTR, "Z", "Z", "", 0, 1, 0}, +}; +int avr_nRegs = 32; +int avr_fReg = 0; /* first allocatable register */ + +static void spillThis (symbol *); + +#if 0 +// PENDING: Unused +/*-----------------------------------------------------------------*/ +/* findAssignToSym : scanning backwards looks for first assig found */ +/*-----------------------------------------------------------------*/ +static iCode * +findAssignToSym (operand * op, iCode * ic) +{ + iCode *dic; + + for (dic = ic->prev; dic; dic = dic->prev) { + + /* if definition by assignment */ + if (dic->op == '=' && + !POINTER_SET (dic) && IC_RESULT (dic)->key == op->key +/* && IS_TRUE_SYMOP(IC_RIGHT(dic)) */ + ) { + + /* we are interested only if defined in far space */ + /* or in stack space in case of + & - */ + + /* if assigned to a non-symbol then return + true */ + if (!IS_SYMOP (IC_RIGHT (dic))) + break; + + /* if the symbol is in far space then + we should not */ + if (isOperandInFarSpace (IC_RIGHT (dic))) + return NULL; + + /* for + & - operations make sure that + if it is on the stack it is the same + as one of the three operands */ + if ((ic->op == '+' || ic->op == '-') && + OP_SYMBOL (IC_RIGHT (dic))->onStack) { + + if (IC_RESULT (ic)->key != IC_RIGHT (dic)->key + && IC_LEFT (ic)->key != + IC_RIGHT (dic)->key + && IC_RIGHT (ic)->key != + IC_RIGHT (dic)->key) return NULL; + } + + break; + + } + + /* if we find an usage then we cannot delete it */ + if (IC_LEFT (dic) && IC_LEFT (dic)->key == op->key) + return NULL; + + if (IC_RIGHT (dic) && IC_RIGHT (dic)->key == op->key) + return NULL; + + if (POINTER_SET (dic) && IC_RESULT (dic)->key == op->key) + return NULL; + } + + /* now make sure that the right side of dic + is not defined between ic & dic */ + if (dic) { + iCode *sic = dic->next; + + for (; sic != ic; sic = sic->next) + if (IC_RESULT (sic) && + IC_RESULT (sic)->key == IC_RIGHT (dic)->key) + return NULL; + } + + return dic; + + +} + +/*-----------------------------------------------------------------*/ +/* packForPush - hueristics to reduce iCode for pushing */ +/*-----------------------------------------------------------------*/ +static void +packForPush (iCode * ic, eBBlock * ebp) +{ + iCode *dic; + + if (ic->op != IPUSH || !IS_ITEMP (IC_LEFT (ic))) + return; + + /* must have only definition & one usage */ + if (bitVectnBitsOn (OP_DEFS (IC_LEFT (ic))) != 1 || + bitVectnBitsOn (OP_USES (IC_LEFT (ic))) != 1) + return; + + /* find the definition */ + if (!(dic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_DEFS + (IC_LEFT (ic)))))) + return; + + if (dic->op != '=' || POINTER_SET (dic)) + return; + + /* we now we know that it has one & only one def & use + and the that the definition is an assignment */ + IC_LEFT (ic) = IC_RIGHT (dic); + + remiCodeFromeBBlock (ebp, dic); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); +} + +/*-----------------------------------------------------------------*/ +/* packRegsForSupport :- reduce some registers for support calls */ +/*-----------------------------------------------------------------*/ +static int +packRegsForSupport (iCode * ic, eBBlock * ebp) +{ + int change = 0; + /* for the left & right operand :- look to see if the + left was assigned a true symbol in far space in that + case replace them */ + if (IS_ITEMP (IC_LEFT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->liveTo <= ic->seq) { + iCode *dic = findAssignToSym (IC_LEFT (ic), ic); + iCode *sic; + + if (!dic) + goto right; + + /* found it we need to remove it from the + block */ + for (sic = dic; sic != ic; sic = sic->next) + bitVectUnSetBit (sic->rlive, IC_LEFT (ic)->key); + + IC_LEFT (ic)->operand.symOperand = + IC_RIGHT (dic)->operand.symOperand; + IC_LEFT (ic)->key = IC_RIGHT (dic)->operand.symOperand->key; + remiCodeFromeBBlock (ebp, dic); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); + change++; + } + + /* do the same for the right operand */ + right: + if (!change && + IS_ITEMP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->liveTo <= ic->seq) { + iCode *dic = findAssignToSym (IC_RIGHT (ic), ic); + iCode *sic; + + if (!dic) + return change; + + /* if this is a subtraction & the result + is a true symbol in far space then don't pack */ + if (ic->op == '-' && IS_TRUE_SYMOP (IC_RESULT (dic))) { + sym_link *etype = + getSpec (operandType (IC_RESULT (dic))); + if (IN_FARSPACE (SPEC_OCLS (etype))) + return change; + } + /* found it we need to remove it from the + block */ + for (sic = dic; sic != ic; sic = sic->next) + bitVectUnSetBit (sic->rlive, IC_RIGHT (ic)->key); + + IC_RIGHT (ic)->operand.symOperand = + IC_RIGHT (dic)->operand.symOperand; + IC_RIGHT (ic)->key = IC_RIGHT (dic)->operand.symOperand->key; + + remiCodeFromeBBlock (ebp, dic); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); + change++; + } + + return change; +} + +/*-----------------------------------------------------------------*/ +/* farSpacePackable - returns the packable icode for far variables */ +/*-----------------------------------------------------------------*/ +static iCode * +farSpacePackable (iCode * ic) +{ + iCode *dic; + + /* go thru till we find a definition for the + symbol on the right */ + for (dic = ic->prev; dic; dic = dic->prev) { + + /* if the definition is a call then no */ + if ((dic->op == CALL || dic->op == PCALL) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) { + return NULL; + } + + /* if shift by unknown amount then not */ + if ((dic->op == LEFT_OP || dic->op == RIGHT_OP) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + return NULL; + + /* if pointer get and size > 1 */ + if (POINTER_GET (dic) && + getSize (aggrToPtr (operandType (IC_LEFT (dic)), FALSE)) > + 1) return NULL; + + if (POINTER_SET (dic) && + getSize (aggrToPtr (operandType (IC_RESULT (dic)), FALSE)) + > 1) + return NULL; + + /* if any three is a true symbol in far space */ + if (IC_RESULT (dic) && + IS_TRUE_SYMOP (IC_RESULT (dic)) && + isOperandInFarSpace (IC_RESULT (dic))) + return NULL; + + if (IC_RIGHT (dic) && + IS_TRUE_SYMOP (IC_RIGHT (dic)) && + isOperandInFarSpace (IC_RIGHT (dic)) && + !isOperandEqual (IC_RIGHT (dic), IC_RESULT (ic))) + return NULL; + + if (IC_LEFT (dic) && + IS_TRUE_SYMOP (IC_LEFT (dic)) && + isOperandInFarSpace (IC_LEFT (dic)) && + !isOperandEqual (IC_LEFT (dic), IC_RESULT (ic))) + return NULL; + + if (isOperandEqual (IC_RIGHT (ic), IC_RESULT (dic))) { + if ((dic->op == LEFT_OP || + dic->op == RIGHT_OP || + dic->op == '-') && + IS_OP_LITERAL (IC_RIGHT (dic))) return NULL; + else + return dic; + } + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* rematStr - returns the rematerialized string for a remat var */ +/*-----------------------------------------------------------------*/ +static char * +rematStr (symbol * sym) +{ + char *s = buffer; + iCode *ic = sym->rematiCode; + + while (1) { + + /* if plus or minus print the right hand side */ + if (ic->op == '+' || ic->op == '-') { + sprintf (s, "0x%04x %c ", + (int) operandLitValue (IC_RIGHT (ic)), + ic->op); + s += strlen (s); + ic = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + continue; + } + + /* we reached the end */ + sprintf (s, "%s", OP_SYMBOL (IC_LEFT (ic))->rname); + break; + } + + return buffer; +} + +/*-----------------------------------------------------------------*/ +/* isSpiltOnStack - returns true if the spil location is on stack */ +/*-----------------------------------------------------------------*/ +static bool +isSpiltOnStack (symbol * sym) +{ + sym_link *etype; + + if (!sym) + return FALSE; + + if (!sym->isspilt) + return FALSE; + + + if (!sym->usl.spillLoc) + return FALSE; + + etype = getSpec (sym->usl.spillLoc->type); + if (IN_STACK (etype)) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* spillLRWithPtrReg :- will spil those live ranges which use PTR */ +/*-----------------------------------------------------------------*/ +static void +spillLRWithPtrReg (symbol * forSym) +{ + symbol *lrsym; + regs *X, *Z, *X1, *Z1; + int k; + + if (!_G.regAssigned || bitVectIsZero (_G.regAssigned)) + return; + + X = avr_regWithIdx (R26_IDX); + X1= avr_regWithIdx (R27_IDX); + Z = avr_regWithIdx (R30_IDX); + Z1= avr_regWithIdx (R31_IDX); + + /* for all live ranges */ + for (lrsym = hTabFirstItem (liveRanges, &k); lrsym; + lrsym = hTabNextItem (liveRanges, &k)) { + int j; + + /* if no registers assigned to it or + spilt */ + /* if it does not overlap with this then + not need to spill it */ + + if (lrsym->isspilt || !lrsym->nRegs || + (lrsym->liveTo < forSym->liveFrom)) continue; + + /* go thru the registers : if it is either + r0 or r1 then spil it */ + for (j = 0; j < lrsym->nRegs; j++) + if (lrsym->regs[j] == X || lrsym->regs[j] == Z || + lrsym->regs[j] == X1 || lrsym->regs[j] == Z1) { + spillThis (lrsym); + break; + } + } + +} +#endif + +/*-----------------------------------------------------------------*/ +/* allocReg - allocates register of given type */ +/*-----------------------------------------------------------------*/ +static regs * +allocReg (short type) +{ + int i; + + for (i = avr_fReg; i < avr_nRegs; i++) { + + /* if type is given as 0 then any + free register will do */ + if (!type && regsAVR[i].isFree) { + regsAVR[i].isFree = 0; + if (currFunc) + currFunc->regsUsed = + bitVectSetBit (currFunc->regsUsed, i); + return ®sAVR[i]; + } + + /* other wise look for specific type + of register */ + if (regsAVR[i].isFree && (regsAVR[i].type & type)) { + regsAVR[i].isFree = 0; + if (currFunc) + currFunc->regsUsed = + bitVectSetBit (currFunc->regsUsed, i); + return ®sAVR[i]; + } + } + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* allocRegPair - allocates register pair of given */ +/*-----------------------------------------------------------------*/ +static regs * +allocRegPair (short type) +{ + int i; + + for (i = avr_fReg; i < avr_nRegs; i++) { + + /* look for specific type of register pair */ + if (regsAVR[i].isFree && (regsAVR[i].type & type) + && (regsAVR[i].type & REG_PAIR) && regsAVR[i+1].isFree) { + + regsAVR[i].isFree = 0; + regsAVR[i+1].isFree = 0; + if (currFunc) { + currFunc->regsUsed = + bitVectSetBit (currFunc->regsUsed, i); + currFunc->regsUsed = + bitVectSetBit (currFunc->regsUsed, i+1); + } + return ®sAVR[i]; + } + } + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* avr_regWithIdx - returns pointer to register wit index number */ +/*-----------------------------------------------------------------*/ +regs * +avr_regWithIdx (int idx) +{ + int i; + + for (i = 0; i < avr_nRegs; i++) + if (regsAVR[i].rIdx == idx) + return ®sAVR[i]; + + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, "regWithIdx not found"); + exit (1); +} + +/*-----------------------------------------------------------------*/ +/* freeReg - frees a register */ +/*-----------------------------------------------------------------*/ +static void +freeReg (regs * reg) +{ + reg->isFree = 1; +} + + +/*-----------------------------------------------------------------*/ +/* nFreeRegs - returns number of free registers */ +/*-----------------------------------------------------------------*/ +static int +nFreeRegs (int type) +{ + int i; + int nfr = 0; + + for (i = avr_fReg; i < avr_nRegs; i++) + if (regsAVR[i].isFree && regsAVR[i].type & type) + nfr++; + return nfr; +} + +/*-----------------------------------------------------------------*/ +/* nfreeRegsType - free registers with type */ +/*-----------------------------------------------------------------*/ +static int +nfreeRegsType (int type) +{ + int nfr; + if (type == REG_PTR) { + if ((nfr = nFreeRegs (type)) == 0) + return nFreeRegs (REG_GPR); + } + + return nFreeRegs (type); +} + +/*-----------------------------------------------------------------*/ +/* computeSpillable - given a point find the spillable live ranges */ +/*-----------------------------------------------------------------*/ +static bitVect * +computeSpillable (iCode * ic) +{ + bitVect *spillable; + + /* spillable live ranges are those that are live at this + point . the following categories need to be subtracted + from this set. + a) - those that are already spilt + b) - if being used by this one + c) - defined by this one */ + + spillable = bitVectCopy (ic->rlive); + spillable = bitVectCplAnd (spillable, _G.spiltSet); /* those already spilt */ + spillable = bitVectCplAnd (spillable, ic->uses); /* used in this one */ + bitVectUnSetBit (spillable, ic->defKey); + spillable = bitVectIntersect (spillable, _G.regAssigned); + return spillable; + +} + +/*-----------------------------------------------------------------*/ +/* noSpilLoc - return true if a variable has no spil location */ +/*-----------------------------------------------------------------*/ +static int +noSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return (sym->usl.spillLoc ? 0 : 1); +} + +/*-----------------------------------------------------------------*/ +/* hasSpilLoc - will return 1 if the symbol has spil location */ +/*-----------------------------------------------------------------*/ +static int +hasSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return (sym->usl.spillLoc ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* hasSpilLocnoUptr - will return 1 if the symbol has spil location */ +/* but is not used as a pointer */ +/*-----------------------------------------------------------------*/ +static int +hasSpilLocnoUptr (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return ((sym->usl.spillLoc && !sym->uptr) ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* rematable - will return 1 if the remat flag is set */ +/*-----------------------------------------------------------------*/ +static int +rematable (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return sym->remat; +} + +/*-----------------------------------------------------------------*/ +/* notUsedInRemaining - not used or defined in remain of the block */ +/*-----------------------------------------------------------------*/ +static int +notUsedInRemaining (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return ((usedInRemaining (operandFromSymbol (sym), ic) ? 0 : 1) && + allDefsOutOfRange (sym->defs, ic->seq, ebp->lSeq)); +} + +/*-----------------------------------------------------------------*/ +/* allLRs - return true for all */ +/*-----------------------------------------------------------------*/ +static int +allLRs (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return 1; +} + +/*-----------------------------------------------------------------*/ +/* liveRangesWith - applies function to a given set of live range */ +/*-----------------------------------------------------------------*/ +static set * +liveRangesWith (bitVect * lrs, + int (func) (symbol *, eBBlock *, iCode *), + eBBlock * ebp, iCode * ic) +{ + set *rset = NULL; + int i; + + if (!lrs || !lrs->size) + return NULL; + + for (i = 1; i < lrs->size; i++) { + symbol *sym; + if (!bitVectBitValue (lrs, i)) + continue; + + /* if we don't find it in the live range + hash table we are in serious trouble */ + if (!(sym = hTabItemWithKey (liveRanges, i))) { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "liveRangesWith could not find liveRange"); + exit (1); + } + + if (func (sym, ebp, ic) + && bitVectBitValue (_G.regAssigned, + sym->key)) addSetHead (&rset, sym); + } + + return rset; +} + + +/*-----------------------------------------------------------------*/ +/* leastUsedLR - given a set determines which is the least used */ +/*-----------------------------------------------------------------*/ +static symbol * +leastUsedLR (set * sset) +{ + symbol *sym = NULL, *lsym = NULL; + + sym = lsym = setFirstItem (sset); + + if (!lsym) + return NULL; + + for (; lsym; lsym = setNextItem (sset)) { + + /* if usage is the same then prefer + the spill the smaller of the two */ + if (lsym->used == sym->used) + if (getSize (lsym->type) < getSize (sym->type)) + sym = lsym; + + /* if less usage */ + if (lsym->used < sym->used) + sym = lsym; + + } + + setToNull ((void *) &sset); + sym->blockSpil = 0; + return sym; +} + +/*-----------------------------------------------------------------*/ +/* noOverLap - will iterate through the list looking for over lap */ +/*-----------------------------------------------------------------*/ +static int +noOverLap (set * itmpStack, symbol * fsym) +{ + symbol *sym; + + + for (sym = setFirstItem (itmpStack); sym; + sym = setNextItem (itmpStack)) { + if (sym->liveTo > fsym->liveFrom) + return 0; + + } + + return 1; +} + +/*-----------------------------------------------------------------*/ +/* isFree - will return 1 if the a free spil location is found */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (isFree) +{ + symbol *sym = item; + V_ARG (symbol **, sloc); + V_ARG (symbol *, fsym); + + /* if already found */ + if (*sloc) + return 0; + + /* if it is free && and the itmp assigned to + this does not have any overlapping live ranges + with the one currently being assigned and + the size can be accomodated */ + if (sym->isFree && + noOverLap (sym->usl.itmpStack, fsym) && + getSize (sym->type) >= getSize (fsym->type)) { + *sloc = sym; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* createStackSpil - create a location on the stack to spil */ +/*-----------------------------------------------------------------*/ +static symbol * +createStackSpil (symbol * sym) +{ + symbol *sloc = NULL; + int useXstack, model, noOverlay; + int stackAuto; + + char slocBuffer[30]; + + /* first go try and find a free one that is already + existing on the stack */ + if (applyToSet (_G.stackSpil, isFree, &sloc, sym)) { + /* found a free one : just update & return */ + sym->usl.spillLoc = sloc; + sym->stackSpil = 1; + sloc->isFree = 0; + addSetHead (&sloc->usl.itmpStack, sym); + return sym; + } + + /* could not then have to create one , this is the hard part + we need to allocate this on the stack : this is really a + hack!! but cannot think of anything better at this time */ + + if (sprintf (slocBuffer, "sloc%d", _G.slocNum++) >= + sizeof (slocBuffer)) { + fprintf (stderr, + "***Internal error: slocBuffer overflowed: %s:%d\n", + __FILE__, __LINE__); + exit (1); + } + + sloc = newiTemp (slocBuffer); + + /* set the type to the spilling symbol */ + sloc->type = copyLinkChain (sym->type); + sloc->etype = getSpec (sloc->type); + SPEC_SCLS (sloc->etype) = S_AUTO; + SPEC_EXTR (sloc->etype) = 0; + + /* we don't allow it to be allocated` + onto the external stack since : so we + temporarily turn it off ; we also + turn off memory model to prevent + the spil from going to the external storage + and turn off overlaying + */ + + useXstack = options.useXstack; + model = options.model; + noOverlay = options.noOverlay; + stackAuto = options.stackAuto; + options.noOverlay = 1; + options.model = options.useXstack = 0; + + allocLocal (sloc); + + options.useXstack = useXstack; + options.model = model; + options.noOverlay = noOverlay; + options.stackAuto = stackAuto; + sloc->isref = 1; /* to prevent compiler warning */ + + /* if it is on the stack then update the stack */ + if (IN_STACK (sloc->etype)) { + currFunc->stack += getSize (sloc->type); + _G.stackExtend += getSize (sloc->type); + } + else + _G.dataExtend += getSize (sloc->type); + + /* add it to the _G.stackSpil set */ + addSetHead (&_G.stackSpil, sloc); + sym->usl.spillLoc = sloc; + sym->stackSpil = 1; + + /* add it to the set of itempStack set + of the spill location */ + addSetHead (&sloc->usl.itmpStack, sym); + return sym; +} + +/*-----------------------------------------------------------------*/ +/* spillThis - spils a specific operand */ +/*-----------------------------------------------------------------*/ +static void +spillThis (symbol * sym) +{ + int i; + /* if this is rematerializable or has a spillLocation + we are okay, else we need to create a spillLocation + for it */ + if (!(sym->remat || sym->usl.spillLoc)) + createStackSpil (sym); + + + /* mark it has spilt & put it in the spilt set */ + sym->isspilt = 1; + _G.spiltSet = bitVectSetBit (_G.spiltSet, sym->key); + + bitVectUnSetBit (_G.regAssigned, sym->key); + + for (i = 0; i < sym->nRegs; i++) + + if (sym->regs[i]) { + freeReg (sym->regs[i]); + sym->regs[i] = NULL; + } + + if (sym->usl.spillLoc && !sym->remat) + sym->usl.spillLoc->allocreq = 1; + return; +} + +/*-----------------------------------------------------------------*/ +/* selectSpil - select a iTemp to spil : rather a simple procedure */ +/*-----------------------------------------------------------------*/ +static symbol * +selectSpil (iCode * ic, eBBlock * ebp, symbol * forSym) +{ + bitVect *lrcs = NULL; + set *selectS; + symbol *sym; + + /* get the spillable live ranges */ + lrcs = computeSpillable (ic); + + /* get all live ranges that are rematerizable */ + if ((selectS = liveRangesWith (lrcs, rematable, ebp, ic))) { + + /* return the least used of these */ + return leastUsedLR (selectS); + } + + /* if the symbol is local to the block then */ + if (forSym->liveTo < ebp->lSeq) { + + /* check if there are any live ranges allocated + to registers that are not used in this block */ + if (!_G.blockSpil && + (selectS = + liveRangesWith (lrcs, notUsedInBlock, ebp, ic))) { + sym = leastUsedLR (selectS); + /* if this is not rematerializable */ + if (!sym->remat) { + _G.blockSpil++; + sym->blockSpil = 1; + } + return sym; + } + + /* check if there are any live ranges that not + used in the remainder of the block */ + if (!_G.blockSpil && + !isiCodeInFunctionCall (ic) && + (selectS = + liveRangesWith (lrcs, notUsedInRemaining, ebp, ic))) { + sym = leastUsedLR (selectS); + if (sym != forSym) { + if (!sym->remat) { + sym->remainSpil = 1; + _G.blockSpil++; + } + return sym; + } + } + } + + /* find live ranges with spillocation && not used as pointers */ + if ((selectS = liveRangesWith (lrcs, hasSpilLocnoUptr, ebp, ic))) { + + sym = leastUsedLR (selectS); + /* mark this as allocation required */ + sym->usl.spillLoc->allocreq = 1; + return sym; + } + + /* find live ranges with spillocation */ + if ((selectS = liveRangesWith (lrcs, hasSpilLoc, ebp, ic))) { + + sym = leastUsedLR (selectS); + sym->usl.spillLoc->allocreq = 1; + return sym; + } + + /* couldn't find then we need to create a spil + location on the stack , for which one? the least + used ofcourse */ + if ((selectS = liveRangesWith (lrcs, noSpilLoc, ebp, ic))) { + + /* return a created spil location */ + sym = createStackSpil (leastUsedLR (selectS)); + sym->usl.spillLoc->allocreq = 1; + return sym; + } + + /* this is an extreme situation we will spill + this one : happens very rarely but it does happen */ + spillThis (forSym); + return forSym; + +} + +/*-----------------------------------------------------------------*/ +/* spilSomething - spil some variable & mark registers as free */ +/*-----------------------------------------------------------------*/ +static bool +spilSomething (iCode * ic, eBBlock * ebp, symbol * forSym) +{ + symbol *ssym; + int i; + + /* get something we can spil */ + ssym = selectSpil (ic, ebp, forSym); + + /* mark it as spilt */ + ssym->isspilt = 1; + _G.spiltSet = bitVectSetBit (_G.spiltSet, ssym->key); + + /* mark it as not register assigned & + take it away from the set */ + bitVectUnSetBit (_G.regAssigned, ssym->key); + + /* mark the registers as free */ + for (i = 0; i < ssym->nRegs; i++) + if (ssym->regs[i]) + freeReg (ssym->regs[i]); + + /* if this was a block level spil then insert push & pop + at the start & end of block respectively */ + if (ssym->blockSpil) { + iCode *nic = newiCode (IPUSH, operandFromSymbol (ssym), NULL); + /* add push to the start of the block */ + addiCodeToeBBlock (ebp, nic, (ebp->sch->op == LABEL ? + ebp->sch->next : ebp->sch)); + nic = newiCode (IPOP, operandFromSymbol (ssym), NULL); + /* add pop to the end of the block */ + addiCodeToeBBlock (ebp, nic, NULL); + } + + /* if spilt because not used in the remainder of the + block then add a push before this instruction and + a pop at the end of the block */ + if (ssym->remainSpil) { + + iCode *nic = newiCode (IPUSH, operandFromSymbol (ssym), NULL); + /* add push just before this instruction */ + addiCodeToeBBlock (ebp, nic, ic); + + nic = newiCode (IPOP, operandFromSymbol (ssym), NULL); + /* add pop to the end of the block */ + addiCodeToeBBlock (ebp, nic, NULL); + } + + if (ssym == forSym) + return FALSE; + else + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* getRegPtr - will try for PTR if not a GPR type if not spil */ +/*-----------------------------------------------------------------*/ +static regs * +getRegPtr (iCode * ic, eBBlock * ebp, symbol * sym) +{ + regs *reg; + + tryAgain: + /* try for a ptr type */ + if ((reg = allocReg (REG_PTR|REG_PAIR))) + return reg; + + /* try for gpr type / pair */ + if ((reg = allocReg (REG_GPR|REG_PAIR))) + return reg; + + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + /* we have to spil */ + if (!spilSomething (ic, ebp, sym)) + return NULL; + + /* this looks like an infinite loop but + in reality selectSpil will abort */ + goto tryAgain; +} + +/*-----------------------------------------------------------------*/ +/* getRegScr - will try for SCR if not a GPR type if not spil */ +/*-----------------------------------------------------------------*/ +static regs * +getRegScr (iCode * ic, eBBlock * ebp, symbol * sym) +{ + regs *reg; + + tryAgain: + + /* try for a scratch non-pair */ + if ((reg = allocReg (REG_SCR))) + return reg; + + if ((reg = allocReg (REG_GPR))) + return reg; + + /* we have to spil */ + if (!spilSomething (ic, ebp, sym)) + return NULL; + + /* this looks like an infinite loop but + in really selectSpil will abort */ + goto tryAgain; +} + +/*-----------------------------------------------------------------*/ +/* getRegGpr - will try for GPR if not spil */ +/*-----------------------------------------------------------------*/ +static regs * +getRegGpr (iCode * ic, eBBlock * ebp, symbol * sym ) +{ + regs *reg; + + tryAgain: + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + if (!avr_ptrRegReq) + if ((reg = allocReg (REG_PTR))) + return reg; + + /* we have to spil */ + if (!spilSomething (ic, ebp, sym)) + return NULL; + + /* this looks like an infinite loop but + in reality selectSpil will abort */ + goto tryAgain; +} + +/*-----------------------------------------------------------------*/ +/* symHasReg - symbol has a given register */ +/*-----------------------------------------------------------------*/ +static bool +symHasReg (symbol * sym, regs * reg) +{ + int i; + + for (i = 0; i < sym->nRegs; i++) + if (sym->regs[i] == reg) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* deassignLRs - check the live to and if they have registers & are */ +/* not spilt then free up the registers */ +/*-----------------------------------------------------------------*/ +static void +deassignLRs (iCode * ic, eBBlock * ebp) +{ + symbol *sym; + int k; + symbol *result; + + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) { + + symbol *psym = NULL; + /* if it does not end here */ + if (sym->liveTo > ic->seq) + continue; + + /* if it was spilt on stack then we can + mark the stack spil location as free */ + if (sym->isspilt) { + if (sym->stackSpil) { + sym->usl.spillLoc->isFree = 1; + sym->stackSpil = 0; + } + continue; + } + + if (!bitVectBitValue (_G.regAssigned, sym->key)) + continue; + + /* special case check if this is an IFX & + the privious one was a pop and the + previous one was not spilt then keep track + of the symbol */ + if (ic->op == IFX && ic->prev && + ic->prev->op == IPOP && + !ic->prev->parmPush && + !OP_SYMBOL (IC_LEFT (ic->prev))->isspilt) + psym = OP_SYMBOL (IC_LEFT (ic->prev)); + + if (sym->nRegs) { + int i = 0; + + bitVectUnSetBit (_G.regAssigned, sym->key); + + /* if the result of this one needs registers + and does not have it then assign it right + away */ + if (IC_RESULT (ic) && !(SKIP_IC2 (ic) || /* not a special icode */ + ic->op == JUMPTABLE || + ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP || + ic->op == RETURN || + POINTER_SET (ic)) && + (result = OP_SYMBOL (IC_RESULT (ic))) && /* has a result */ + result->liveTo > ic->seq && /* and will live beyond this */ + result->liveTo <= ebp->lSeq && /* does not go beyond this block */ + result->liveFrom == ic->seq && /* does not start before here */ + result->regType == sym->regType && /* same register types */ + result->nRegs && /* which needs registers */ + !result->isspilt && /* and does not already have them */ + !result->remat && + !bitVectBitValue (_G.regAssigned, result->key) && + /* the number of free regs + number of regs in this LR + can accomodate the what result Needs */ + ((nfreeRegsType (result->regType) + sym->nRegs) >= result->nRegs)) { + + for (i = 0; i < result->nRegs; i++) { + if (i < sym->nRegs) + result->regs[i] = sym->regs[i]; + else if (result->regType == REG_SCR) + result->regs[i] = getRegScr (ic, ebp, result); + else + result->regs[i] = getRegGpr (ic, ebp, result); + } + _G.regAssigned = bitVectSetBit (_G.regAssigned, result->key); + + } + + /* free the remaining */ + for (; i < sym->nRegs; i++) { + if (psym) { + if (!symHasReg (psym, sym->regs[i])) + freeReg (sym->regs[i]); + } + else freeReg (sym->regs[i]); + } + } + } +} + + +/*-----------------------------------------------------------------*/ +/* reassignLR - reassign this to registers */ +/*-----------------------------------------------------------------*/ +static void +reassignLR (operand * op) +{ + symbol *sym = OP_SYMBOL (op); + int i; + + /* not spilt any more */ + sym->isspilt = sym->blockSpil = sym->remainSpil = 0; + bitVectUnSetBit (_G.spiltSet, sym->key); + + _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); + + _G.blockSpil--; + + for (i = 0; i < sym->nRegs; i++) + sym->regs[i]->isFree = 0; +} + +/*-----------------------------------------------------------------*/ +/* willCauseSpill - determines if allocating will cause a spill */ +/*-----------------------------------------------------------------*/ +static int +willCauseSpill (int nr, int rt) +{ + /* first check if there are any avlb registers + of te type required */ + if (rt == REG_PTR) { + /* special case for pointer type + if pointer type not avlb then + check for type gpr */ + if (nFreeRegs (rt) >= nr) + return 0; + if (nFreeRegs (REG_GPR) >= nr) + return 0; + } + else { + if (avr_ptrRegReq) { + if (nFreeRegs (rt) >= nr) + return 0; + } + else { + if (nFreeRegs (REG_PTR) + nFreeRegs (REG_GPR) >= nr) + return 0; + } + } + + /* it will cause a spil */ + return 1; +} + +/*-----------------------------------------------------------------*/ +/* positionRegs - the allocator can allocate same registers to res- */ +/* ult and operand, if this happens make sure they are in the same */ +/* position as the operand otherwise chaos results */ +/*-----------------------------------------------------------------*/ +static void +positionRegs (symbol * result, symbol * opsym, int lineno) +{ + int count = min (result->nRegs, opsym->nRegs); + int i, j = 0, shared = 0; + + /* if the result has been spilt then cannot share */ + if (opsym->isspilt) + return; + again: + shared = 0; + /* first make sure that they actually share */ + for (i = 0; i < count; i++) { + for (j = 0; j < count; j++) { + if (result->regs[i] == opsym->regs[j] && i != j) { + shared = 1; + goto xchgPositions; + } + } + } + xchgPositions: + if (shared) { + regs *tmp = result->regs[i]; + result->regs[i] = result->regs[j]; + result->regs[j] = tmp; + goto again; + } +} + +/*-----------------------------------------------------------------*/ +/* needsPair - heuristic to determine if a pair would be good */ +/*-----------------------------------------------------------------*/ +static int needsPair (iCode *ic) +{ + symbol *sym = OP_SYMBOL(IC_RESULT(ic)); + bitVect *uses_defs = + bitVectUnion(OP_USES (IC_RESULT(ic)),OP_DEFS(IC_RESULT(ic))); + + /* if size is less than 2 then NO */ + if (sym->nRegs < 2) return 0; + /* if type Pointer then YES */ + if (IS_PTR(sym->type)) return 1; + + /* go thru the usages of this operand if used with + a constant then yes */ + while (!bitVectIsZero(uses_defs)) { + int ikey = bitVectFirstBit(uses_defs); + iCode *uic = hTabItemWithKey(iCodehTab,ikey); + sym_link *otype = NULL; + bitVectUnSetBit(uses_defs,ikey); + if (!uic) continue; + otype = (IC_RIGHT(uic) ? operandType(IC_RIGHT(uic)) : NULL); + if (otype && IS_LITERAL(otype)) return 1; + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* serialRegAssign - serially allocate registers to the variables */ +/*-----------------------------------------------------------------*/ +static void +serialRegAssign (eBBlock ** ebbs, int count) +{ + int i; + + /* for all blocks */ + for (i = 0; i < count; i++) { + + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + /* of all instructions do */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) { + + /* if this is an ipop that means some live + range will have to be assigned again */ + if (ic->op == IPOP) + reassignLR (IC_LEFT (ic)); + + /* if result is present && is a true symbol */ + if (IC_RESULT (ic) && ic->op != IFX && + IS_TRUE_SYMOP (IC_RESULT (ic))) + OP_SYMBOL (IC_RESULT (ic))->allocreq = 1; + + /* take away registers from live + ranges that end at this instruction */ + deassignLRs (ic, ebbs[i]); + + /* some don't need registers */ + if (SKIP_IC2 (ic) || + ic->op == JUMPTABLE || + ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP || + (IC_RESULT (ic) && POINTER_SET (ic))) continue; + + /* now we need to allocate registers + only for the result */ + if (IC_RESULT (ic)) { + symbol *sym = OP_SYMBOL (IC_RESULT (ic)); + bitVect *spillable; + int willCS; + int j=0; + + /* Make sure any spill location is definately allocated */ + if (sym->isspilt && !sym->remat && sym->usl.spillLoc && + !sym->usl.spillLoc->allocreq) { + sym->usl.spillLoc->allocreq++; + } + + /* if it does not need or is spilt + or is already assigned to registers + or will not live beyond this instructions */ + if (!sym->nRegs || + sym->isspilt || + bitVectBitValue (_G.regAssigned, sym->key) + || sym->liveTo <= ic->seq) + continue; + + /* if some liverange has been spilt at the block level + and this one live beyond this block then spil this + to be safe */ + if (_G.blockSpil + && sym->liveTo > ebbs[i]->lSeq) { + spillThis (sym); + continue; + } + /* if trying to allocate this will cause + a spill and there is nothing to spill + or this one is rematerializable then + spill this one */ + willCS = + willCauseSpill (sym->nRegs, + sym->regType); + spillable = computeSpillable (ic); + if (sym->remat || (willCS && bitVectIsZero (spillable))) { + spillThis (sym); + continue; + } + + /* If the live range preceeds the point of definition + then ideally we must take into account registers that + have been allocated after sym->liveFrom but freed + before ic->seq. This is complicated, so spill this + symbol instead and let fillGaps handle the allocation. */ + if (sym->liveFrom < ic->seq) + { + spillThis (sym); + continue; + } + + /* if it has a spillocation & is used less than + all other live ranges then spill this */ + if (willCS) { + if (sym->usl.spillLoc) { + symbol *leastUsed = leastUsedLR (liveRangesWith (spillable, + allLRs, ebbs[i], ic)); + if (leastUsed && leastUsed->used > sym->used) { + spillThis (sym); + continue; + } + } else { + /* if none of the liveRanges have a spillLocation then better + to spill this one than anything else already assigned to registers */ + if (liveRangesWith(spillable,noSpilLoc,ebbs[i],ic)) { + spillThis (sym); + continue; + } + } + } + + /* we assign registers to it */ + _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); + if (needsPair(ic)) { + short regtype ; + regs *preg; + if (sym->regType == REG_PTR) regtype = REG_PTR; + else if (sym->regType == REG_SCR) regtype = REG_SCR; + else regtype = REG_GPR; + preg = allocRegPair(regtype); + if (preg) { + sym->regs[j++] = preg; + sym->regs[j++] = ®sAVR[preg->rIdx+1]; + } + } + for (; j < sym->nRegs; j++) { + if (sym->regType == REG_PTR) + sym->regs[j] = getRegPtr (ic, ebbs[i], sym); + else if (sym->regType == REG_SCR) + sym->regs[j] = getRegScr (ic, ebbs[i], sym); + else + sym->regs[j] = getRegGpr (ic, ebbs[i], sym); + /* if the allocation falied which means + this was spilt then break */ + if (!sym->regs[j]) break; + } + + /* if it shares registers with operands make sure + that they are in the same position */ + if (IC_LEFT (ic) && IS_SYMOP (IC_LEFT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->nRegs + && ic->op != '=') + positionRegs (OP_SYMBOL (IC_RESULT (ic)), + OP_SYMBOL (IC_LEFT (ic)), ic->lineno); + /* do the same for the right operand */ + if (IC_RIGHT (ic) && IS_SYMOP (IC_RIGHT (ic)) + && OP_SYMBOL (IC_RIGHT (ic))->nRegs) + positionRegs (OP_SYMBOL (IC_RESULT (ic)), + OP_SYMBOL (IC_RIGHT (ic)), ic->lineno); + + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* rUmaskForOp :- returns register mask for an operand */ +/*-----------------------------------------------------------------*/ +static bitVect * +rUmaskForOp (operand * op) +{ + bitVect *rumask; + symbol *sym; + int j; + + /* only temporaries are assigned registers */ + if (!IS_ITEMP (op)) + return NULL; + + sym = OP_SYMBOL (op); + + /* if spilt or no registers assigned to it + then nothing */ + if (sym->isspilt || !sym->nRegs) + return NULL; + + rumask = newBitVect (avr_nRegs); + + for (j = 0; j < sym->nRegs; j++) { + rumask = bitVectSetBit (rumask, sym->regs[j]->rIdx); + } + + return rumask; +} + +/*-----------------------------------------------------------------*/ +/* regsUsedIniCode :- returns bit vector of registers used in iCode */ +/*-----------------------------------------------------------------*/ +static bitVect * +regsUsedIniCode (iCode * ic) +{ + bitVect *rmask = newBitVect (avr_nRegs); + + /* do the special cases first */ + if (ic->op == IFX) { + rmask = bitVectUnion (rmask, rUmaskForOp (IC_COND (ic))); + goto ret; + } + + /* for the jumptable */ + if (ic->op == JUMPTABLE) { + rmask = bitVectUnion (rmask, rUmaskForOp (IC_JTCOND (ic))); + + goto ret; + } + + /* of all other cases */ + if (IC_LEFT (ic)) + rmask = bitVectUnion (rmask, rUmaskForOp (IC_LEFT (ic))); + + + if (IC_RIGHT (ic)) + rmask = bitVectUnion (rmask, rUmaskForOp (IC_RIGHT (ic))); + + if (IC_RESULT (ic)) + rmask = bitVectUnion (rmask, rUmaskForOp (IC_RESULT (ic))); + + ret: + return rmask; +} + +/*-----------------------------------------------------------------*/ +/* createRegMask - for each instruction will determine the regsUsed */ +/*-----------------------------------------------------------------*/ +static void +createRegMask (eBBlock ** ebbs, int count) +{ + int i; + + /* for all blocks */ + for (i = 0; i < count; i++) { + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + /* for all instructions */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) { + + int j; + + if (SKIP_IC2 (ic) || !ic->rlive) + continue; + + /* first mark the registers used in this + instruction */ + ic->rUsed = regsUsedIniCode (ic); + _G.funcrUsed = bitVectUnion (_G.funcrUsed, ic->rUsed); + + /* now create the register mask for those + registers that are in use : this is a + super set of ic->rUsed */ + ic->rMask = newBitVect (avr_nRegs + 1); + + /* for all live Ranges alive at this point */ + for (j = 1; j < ic->rlive->size; j++) { + symbol *sym; + int k; + + /* if not alive then continue */ + if (!bitVectBitValue (ic->rlive, j)) + continue; + + /* find the live range we are interested in */ + if (!(sym = hTabItemWithKey (liveRanges, j))) { + werror (E_INTERNAL_ERROR, __FILE__, + __LINE__, + "createRegMask cannot find live range"); + exit (0); + } + + /* if no register assigned to it */ + if (!sym->nRegs || sym->isspilt) + continue; + + /* for all the registers allocated to it */ + for (k = 0; k < sym->nRegs; k++) { + if (sym->regs[k]) { + int rIdx = sym->regs[k]->rIdx; + ic->rMask = bitVectSetBit (ic-> rMask,rIdx); + /* special case for X & Z registers */ + if (rIdx == R26_IDX || rIdx == R27_IDX) + ic->rMask = bitVectSetBit (ic->rMask, X_IDX); + if (rIdx == R30_IDX || rIdx == R31_IDX) + ic->rMask = bitVectSetBit (ic->rMask, Z_IDX); + } + } + } + } + } +} + + +/*-----------------------------------------------------------------*/ +/* regTypeNum - computes the type & number of registers required */ +/*-----------------------------------------------------------------*/ +static void +regTypeNum () +{ + symbol *sym; + int k; + iCode *ic; + + /* for each live range do */ + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) { + + /* if used zero times then no registers needed */ + if ((sym->liveTo - sym->liveFrom) == 0) + continue; + + + /* if the live range is a temporary */ + if (sym->isitmp) { + + /* if the type is marked as a conditional */ + if (sym->regType == REG_CND) + continue; + + /* if used in return only then we don't + need registers */ + if (sym->ruonly || sym->accuse) { + if (IS_AGGREGATE (sym->type) || sym->isptr) + sym->type = + aggrToPtr (sym->type, FALSE); + continue; + } + + /* if the symbol has only one definition & + that definition is a get_pointer and the + pointer we are getting is rematerializable and + in "data" space */ + + if (bitVectnBitsOn (sym->defs) == 1 && + (ic = hTabItemWithKey (iCodehTab, bitVectFirstBit (sym-> defs))) + && POINTER_GET (ic) && !IS_BITVAR (sym->etype)) { + + /* if in data space or idata space then try to + allocate pointer register */ + + } + + /* if not then we require registers */ + sym->nRegs = + ((IS_AGGREGATE (sym->type) || sym->isptr) ? + getSize (sym->type = + aggrToPtr (sym->type, + FALSE)) : getSize (sym-> + type)); + + if (sym->nRegs > 4) { + fprintf (stderr, + "allocated more than 4 or 0 registers for type "); + printTypeChain (sym->type, stderr); + fprintf (stderr, "\n"); + } + + /* determine the type of register required */ + if (sym->nRegs == 2 && /* size is two */ + IS_PTR (sym->type) && /* is a pointer */ + sym->uptr) { /* has pointer usage i.e. get/set pointer */ + sym->regType = REG_PTR; + avr_ptrRegReq++; + } + else { + /* live accross a function call then gpr else scratch */ + if (sym->isLiveFcall) + sym->regType = REG_GPR; + else + sym->regType = REG_SCR; + } + } + else + /* for the first run we don't provide */ + /* registers for true symbols we will */ + /* see how things go */ + sym->nRegs = 0; + } + +} + +/*-----------------------------------------------------------------*/ +/* deallocStackSpil - this will set the stack pointer back */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (deallocStackSpil) +{ + symbol *sym = item; + + deallocLocal (sym); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* packRegsForAssign - register reduction for assignment */ +/*-----------------------------------------------------------------*/ +static int +packRegsForAssign (iCode * ic, eBBlock * ebp) +{ + iCode *dic, *sic; + + if (!IS_ITEMP (IC_RIGHT (ic)) || + OP_SYMBOL (IC_RIGHT (ic))->isind || + OP_LIVETO (IC_RIGHT (ic)) > ic->seq) { + return 0; + } + + /* find the definition of iTempNN scanning backwards if we find a + a use of the true symbol in before we find the definition then + we cannot */ + for (dic = ic->prev; dic; dic = dic->prev) { + + /* if there is a function call and this is + a parameter & not my parameter then don't pack it */ + if ((dic->op == CALL || dic->op == PCALL) && + (OP_SYMBOL (IC_RESULT (ic))->_isparm && + !OP_SYMBOL (IC_RESULT (ic))->ismyparm)) { + dic = NULL; + break; + } + + if (SKIP_IC2 (dic)) + continue; + + if (IS_TRUE_SYMOP (IC_RESULT (dic)) && + IS_OP_VOLATILE (IC_RESULT (dic))) { + dic = NULL; + break; + } + + if (IS_SYMOP (IC_RESULT (dic)) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) { + if (POINTER_SET (dic)) + dic = NULL; + + break; + } + + if (IS_SYMOP (IC_RIGHT (dic)) && + (IC_RIGHT (dic)->key == IC_RESULT (ic)->key || + IC_RIGHT (dic)->key == IC_RIGHT (ic)->key)) { + dic = NULL; + break; + } + + if (IS_SYMOP (IC_LEFT (dic)) && + (IC_LEFT (dic)->key == IC_RESULT (ic)->key || + IC_LEFT (dic)->key == IC_RIGHT (ic)->key)) { + dic = NULL; + break; + } + + if (POINTER_SET (dic) && + IC_RESULT (dic)->key == IC_RESULT (ic)->key) { + dic = NULL; + break; + } + } + + if (!dic) + return 0; /* did not find */ + + /* if the result is on stack or iaccess then it must be + the same atleast one of the operands */ + if (OP_SYMBOL (IC_RESULT (ic))->onStack || + OP_SYMBOL (IC_RESULT (ic))->iaccess) { + + /* the operation has only one symbol + operator then we can pack */ + if ((IC_LEFT (dic) && !IS_SYMOP (IC_LEFT (dic))) || + (IC_RIGHT (dic) && !IS_SYMOP (IC_RIGHT (dic)))) + goto pack; + + if (!((IC_LEFT (dic) && + IC_RESULT (ic)->key == IC_LEFT (dic)->key) || + (IC_RIGHT (dic) && + IC_RESULT (ic)->key == IC_RIGHT (dic)->key))) return 0; + } + pack: + /* if in far space & tru symbol then don't */ + if ((IS_TRUE_SYMOP (IC_RESULT (ic))) + && isOperandInFarSpace (IC_RESULT (ic))) return 0; + /* found the definition */ + /* replace the result with the result of */ + /* this assignment and remove this assignment */ + IC_RESULT (dic) = IC_RESULT (ic); + + if (IS_ITEMP (IC_RESULT (dic)) + && OP_SYMBOL (IC_RESULT (dic))->liveFrom > dic->seq) { + OP_SYMBOL (IC_RESULT (dic))->liveFrom = dic->seq; + } + /* delete from liverange table also + delete from all the points inbetween and the new + one */ + for (sic = dic; sic != ic; sic = sic->next) { + bitVectUnSetBit (sic->rlive, IC_RESULT (ic)->key); + if (IS_ITEMP (IC_RESULT (dic))) + bitVectSetBit (sic->rlive, IC_RESULT (dic)->key); + } + + remiCodeFromeBBlock (ebp, ic); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + return 1; + +} + + +/*-----------------------------------------------------------------*/ +/* packRegsForOneuse : - will reduce some registers for single Use */ +/*-----------------------------------------------------------------*/ +static iCode * +packRegsForOneuse (iCode * ic, operand * op, eBBlock * ebp) +{ + bitVect *uses; + iCode *dic, *sic; + + /* if returning a literal then do nothing */ + if (!IS_SYMOP (op)) + return NULL; + + /* returns only */ + if (ic->op != RETURN) + return NULL; + + /* this routine will mark the a symbol as used in one + instruction use only && if the defintion is local + (ie. within the basic block) && has only one definition && + that definiion is either a return value from a + function or does not contain any variables in + far space */ + uses = bitVectCopy (OP_USES (op)); + bitVectUnSetBit (uses, ic->key); /* take away this iCode */ + if (!bitVectIsZero (uses)) /* has other uses */ + return NULL; + + /* if it has only one defintion */ + if (bitVectnBitsOn (OP_DEFS (op)) > 1) + return NULL; /* has more than one definition */ + + /* get the that definition */ + if (!(dic = + hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_DEFS (op))))) return NULL; + + /* found the definition now check if it is local */ + if (dic->seq < ebp->fSeq || dic->seq > ebp->lSeq) + return NULL; /* non-local */ + + /* now check if it is the return from + a function call */ + if (dic->op == CALL || dic->op == PCALL) { + if (ic->op != SEND && ic->op != RETURN && + !POINTER_SET(ic) && !POINTER_GET(ic)) { + OP_SYMBOL (op)->ruonly = 1; + return dic; + } + dic = dic->next; + } + + + /* otherwise check that the definition does + not contain any symbols in far space */ + if (IS_OP_RUONLY (IC_LEFT (ic)) || IS_OP_RUONLY (IC_RIGHT (ic))) { + return NULL; + } + + /* if pointer set then make sure the pointer + is one byte */ + if (POINTER_SET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_RESULT (dic)), FALSE))) + return NULL; + + if (POINTER_GET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_LEFT (dic)), FALSE))) + return NULL; + + sic = dic; + + /* also make sure the intervenening instructions + don't have any thing in far space */ + for (dic = dic->next; dic && dic != ic; dic = dic->next) { + + /* if there is an intervening function call then no */ + if (dic->op == CALL || dic->op == PCALL) + return NULL; + /* if pointer set then make sure the pointer + is one byte */ + if (POINTER_SET (dic) && + !IS_DATA_PTR (aggrToPtr + (operandType (IC_RESULT (dic)), + FALSE))) return NULL; + + if (POINTER_GET (dic) && + !IS_DATA_PTR (aggrToPtr + (operandType (IC_LEFT (dic)), + FALSE))) return NULL; + + /* if address of & the result is remat the okay */ + if (dic->op == ADDRESS_OF && + OP_SYMBOL (IC_RESULT (dic))->remat) continue; + + /* if operand has size of three or more & this + operation is a '*','/' or '%' then 'b' may + cause a problem */ + if ((dic->op == '%' || dic->op == '/' || dic->op == '*') && + getSize (operandType (op)) >= 3) + return NULL; + + /* if left or right or result is in far space */ + if (IS_OP_RUONLY (IC_LEFT (dic)) || + IS_OP_RUONLY (IC_RIGHT (dic)) || + IS_OP_RUONLY (IC_RESULT (dic))) { + return NULL; + } + } + + OP_SYMBOL (op)->ruonly = 1; + return sic; + +} + +/*-----------------------------------------------------------------*/ +/* isBitwiseOptimizable - requirements of JEAN LOUIS VERN */ +/*-----------------------------------------------------------------*/ +static bool +isBitwiseOptimizable (iCode * ic) +{ + sym_link *ltype = getSpec (operandType (IC_LEFT (ic))); + sym_link *rtype = getSpec (operandType (IC_RIGHT (ic))); + + /* bitwise operations are considered optimizable + under the following conditions (Jean-Louis VERN) + + x & lit + bit & bit + bit & x + bit ^ bit + bit ^ x + x ^ lit + x | lit + bit | bit + bit | x + */ + if (IS_LITERAL (rtype) || + (IS_BITVAR (ltype) && IN_BITSPACE (SPEC_OCLS (ltype)))) + return TRUE; + else + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* packRegisters - does some transformations to reduce register */ +/* pressure */ +/*-----------------------------------------------------------------*/ +static void +packRegisters (eBBlock * ebp) +{ + iCode *ic; + int change = 0; + + while (1) { + + change = 0; + + /* look for assignments of the form */ + /* iTempNN = TRueSym (someoperation) SomeOperand */ + /* .... */ + /* TrueSym := iTempNN:1 */ + for (ic = ebp->sch; ic; ic = ic->next) { + + + /* find assignment of the form TrueSym := iTempNN:1 */ + if (ic->op == '=' && !POINTER_SET (ic)) + change += packRegsForAssign (ic, ebp); + } + + if (!change) + break; + } + + for (ic = ebp->sch; ic; ic = ic->next) { + + /* if this is an itemp & result of a address of a true sym + then mark this as rematerialisable */ + if (ic->op == ADDRESS_OF && + IS_ITEMP (IC_RESULT (ic)) && + IS_TRUE_SYMOP (IC_LEFT (ic)) && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1 && + !OP_SYMBOL (IC_LEFT (ic))->onStack) { + + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + + } + + /* if straight assignment then carry remat flag if + this is the only definition */ + if (ic->op == '=' && + !POINTER_SET (ic) && + IS_SYMOP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->remat && + bitVectnBitsOn (OP_SYMBOL (IC_RESULT (ic))->defs) <= 1) { + + OP_SYMBOL (IC_RESULT (ic))->remat = + OP_SYMBOL (IC_RIGHT (ic))->remat; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = + OP_SYMBOL (IC_RIGHT (ic))->rematiCode; + } + + /* if this is a +/- operation with a rematerizable + then mark this as rematerializable as well only + if the literal value is within the range -255 and + 255 + the assembler cannot handle it other wise */ + if ((ic->op == '+' || ic->op == '-') && + (IS_SYMOP (IC_LEFT (ic)) && + IS_ITEMP (IC_RESULT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->remat && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1 && + IS_OP_LITERAL (IC_RIGHT (ic)))) { + + int i = (int) operandLitValue (IC_RIGHT (ic)); + if (i < 255 && i > -255) { + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = + NULL; + } + } + + /* mark the pointer usages */ + if (POINTER_SET (ic)) + OP_SYMBOL (IC_RESULT (ic))->uptr = 1; + + if (POINTER_GET (ic)) { + OP_SYMBOL (IC_LEFT (ic))->uptr = 1; + if (OP_SYMBOL (IC_LEFT(ic))->remat) + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + } + + /* if the condition of an if instruction + is defined in the previous instruction then + mark the itemp as a conditional */ + if ((IS_CONDITIONAL (ic) || + ((ic->op == BITWISEAND || + ic->op == '|' || + ic->op == '^') && + isBitwiseOptimizable (ic))) && + ic->next && ic->next->op == IFX && + isOperandEqual (IC_RESULT (ic), IC_COND (ic->next)) && + OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq) { + + OP_SYMBOL (IC_RESULT (ic))->regType = REG_CND; + continue; + } + + /* some cases the redundant moves can + can be eliminated for return statements */ + if ((ic->op == RETURN || ic->op == SEND)) + packRegsForOneuse (ic, IC_LEFT (ic), ebp); + + /* if this is cast for intergral promotion then + check if only use of the definition of the + operand being casted/ if yes then replace + the result of that arithmetic operation with + this result and get rid of the cast */ + if (ic->op == CAST) { + sym_link *fromType = operandType (IC_RIGHT (ic)); + sym_link *toType = operandType (IC_LEFT (ic)); + + if (IS_INTEGRAL (fromType) && IS_INTEGRAL (toType) && + getSize (fromType) != getSize (toType) && + SPEC_USIGN (fromType) == SPEC_USIGN (toType)) { + + iCode *dic = + packRegsForOneuse (ic, IC_RIGHT (ic), + ebp); + if (dic) { + if (IS_ARITHMETIC_OP (dic)) { + IC_RESULT (dic) = + IC_RESULT (ic); + remiCodeFromeBBlock (ebp, ic); + hTabDeleteItem (&iCodehTab, + ic->key, ic, + DELETE_ITEM, + NULL); + ic = ic->prev; + } + else + OP_SYMBOL (IC_RIGHT (ic))-> + ruonly = 0; + } + } + else { + + /* if the type from and type to are the same + then if this is the only use then packit */ + if (compareType (operandType (IC_RIGHT (ic)), + operandType (IC_LEFT (ic))) == + 1) { + iCode *dic = + packRegsForOneuse (ic, + IC_RIGHT + (ic), ebp); + if (dic) { + IC_RESULT (dic) = + IC_RESULT (ic); + remiCodeFromeBBlock (ebp, ic); + hTabDeleteItem (&iCodehTab, + ic->key, ic, + DELETE_ITEM, + NULL); + ic = ic->prev; + } + } + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* preAssignParms - we have a leaf function preassign registers */ +/*-----------------------------------------------------------------*/ +static void +preAssignParms (iCode * ic) +{ + int i = R16_IDX; + /* look for receives and assign registers + to the result of the receives */ + while (ic) { + /* if it is a receive */ + if (ic->op == RECEIVE) { + symbol *r = OP_SYMBOL (IC_RESULT (ic)); + int size = getSize (r->type); + if (r->regType == REG_GPR || r->regType == REG_SCR) { + int j = 0; + while (size--) { + r->regs[j++] = ®sAVR[i++]; + regsAVR[i - 1].isFree = 0; + } + /* put in the regassigned vector */ + _G.regAssigned = + bitVectSetBit (_G.regAssigned, + r->key); + } + else { + /* not a GPR then we should mark as free */ + while (size--) { + regsAVR[i++].isFree = 1; + } + } + } + ic = ic->next; + } + /* mark anything remaining as free */ + while (i <= R23_IDX) + regsAVR[i++].isFree = 1; +} + +/*-----------------------------------------------------------------*/ +/* setdefaultRegs - do setup stuff for register allocation */ +/*-----------------------------------------------------------------*/ +static void +setDefaultRegs (eBBlock ** ebbs, int count) +{ + int i; + + /* if no pointer registers required in this function + then mark r26-27 & r30-r31 as GPR & free */ + regsAVR[R26_IDX].isFree = + regsAVR[R27_IDX].isFree = + regsAVR[R30_IDX].isFree = regsAVR[R31_IDX].isFree = 1; + + if (!avr_ptrRegReq) { + regsAVR[R26_IDX].type = (regsAVR[R26_IDX].type & ~REG_MASK) | REG_GPR; + regsAVR[R27_IDX].type = (regsAVR[R27_IDX].type & ~REG_MASK) | REG_GPR; + regsAVR[R28_IDX].type = (regsAVR[R28_IDX].type & ~REG_MASK) | REG_GPR; + regsAVR[R29_IDX].type = (regsAVR[R29_IDX].type & ~REG_MASK) | REG_GPR; + } + else { + regsAVR[R26_IDX].type = (regsAVR[R26_IDX].type & ~REG_MASK) | REG_PTR; + regsAVR[R27_IDX].type = (regsAVR[R27_IDX].type & ~REG_MASK) | REG_PTR; + regsAVR[R30_IDX].type = (regsAVR[R30_IDX].type & ~REG_MASK) | REG_PTR; + regsAVR[R31_IDX].type = (regsAVR[R31_IDX].type & ~REG_MASK) | REG_PTR; + } + + /* registers 0-1 / 24-25 used as scratch */ + regsAVR[R0_IDX].isFree = + regsAVR[R1_IDX].isFree = + regsAVR[R24_IDX].isFree = regsAVR[R25_IDX].isFree = 0; + + /* if this has no function calls then we need + to do something special + a) pre-assign registers to parameters RECEIVE + b) mark the remaining parameter regs as free */ + /* mark the parameter regs as SCRACH */ + for (i = R16_IDX; i <= R23_IDX; i++) { + regsAVR[i].type = (regsAVR[i].type & ~REG_MASK) | REG_SCR; + regsAVR[i].isFree = 1; + } + if (!IFFUNC_HASFCALL(currFunc->type)) { + preAssignParms (ebbs[0]->sch); + } + /* Y - is not allocated (it is the stack frame) */ + regsAVR[R28_IDX].isFree = regsAVR[R28_IDX].isFree = 0; +} + +/*-----------------------------------------------------------------*/ +/* assignRegisters - assigns registers to each live range as need */ +/*-----------------------------------------------------------------*/ +void +avr_assignRegisters (ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->bbOrder; + int count = ebbi->count; + iCode *ic; + int i; + + setToNull ((void *) &_G.funcrUsed); + avr_ptrRegReq = _G.stackExtend = _G.dataExtend = 0; + + /* change assignments this will remove some + live ranges reducing some register pressure */ + for (i = 0; i < count; i++) + packRegisters (ebbs[i]); + + /* liveranges probably changed by register packing + so we compute them again */ + recomputeLiveRanges (ebbs, count); + + if (options.dump_pack) + dumpEbbsToFileExt (DUMP_PACK, ebbi); + + /* first determine for each live range the number of + registers & the type of registers required for each */ + regTypeNum (); + + /* setup the default registers */ + setDefaultRegs (ebbs, count); + + /* and serially allocate registers */ + serialRegAssign (ebbs, count); + + /* if stack was extended then tell the user */ + if (_G.stackExtend) { + /* werror(W_TOOMANY_SPILS,"stack", */ + /* _G.stackExtend,currFunc->name,""); */ + _G.stackExtend = 0; + } + + if (_G.dataExtend) { + /* werror(W_TOOMANY_SPILS,"data space", */ + /* _G.dataExtend,currFunc->name,""); */ + _G.dataExtend = 0; + } + + /* after that create the register mask + for each of the instruction */ + createRegMask (ebbs, count); + + /* redo that offsets for stacked automatic variables */ + redoStackOffsets (); + + if (options.dump_rassgn) + dumpEbbsToFileExt (DUMP_RASSGN, ebbi); + + /* now get back the chain */ + ic = iCodeLabelOptimize (iCodeFromeBBlock (ebbs, count)); + + + genAVRCode (ic); + /* for (; ic ; ic = ic->next) */ + /* piCode(ic,stdout); */ + /* free up any _G.stackSpil locations allocated */ + applyToSet (_G.stackSpil, deallocStackSpil); + _G.slocNum = 0; + setToNull ((void *) &_G.stackSpil); + setToNull ((void *) &_G.spiltSet); + /* mark all registers as free */ + + return; +} diff --git a/src/avr/ralloc.h b/src/avr/ralloc.h new file mode 100644 index 0000000..b146bca --- /dev/null +++ b/src/avr/ralloc.h @@ -0,0 +1,68 @@ +/*------------------------------------------------------------------------- + + SDCCralloc.h - header file register allocation + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "SDCCicode.h" +#include "SDCCBBlock.h" +#ifndef SDCCRALLOC_H +#define SDCCRALLOC_H 1 + +enum + { + R0_IDX = 0, R1_IDX, R2_IDX, R3_IDX, R4_IDX, + R5_IDX, R6_IDX, R7_IDX, R8_IDX, R9_IDX, + R10_IDX, R11_IDX, R12_IDX, R13_IDX, R14_IDX, + R15_IDX, R16_IDX, R17_IDX, R18_IDX, R19_IDX, + R20_IDX, R21_IDX, R22_IDX, R23_IDX, R24_IDX, + R25_IDX, R26_IDX, R27_IDX, R28_IDX, R29_IDX, + R30_IDX, R31_IDX, X_IDX, Z_IDX, CND_IDX + }; + + +#define REG_PTR 0x01 +#define REG_GPR 0x02 +#define REG_SCR 0x04 +#define REG_CND 0x08 +#define REG_MASK 0x0f +#define REG_PAIR 0x10 + +/* definition for the registers */ +typedef struct regs + { + short type; /* can have value + REG_GPR, REG_PTR or REG_CND */ + short rIdx; /* index into register table */ + short otype; + char *name; /* name */ + char *dname; /* name when direct access needed */ + char *base; /* base address */ + short offset; /* offset from the base */ + unsigned isFree:1; /* is currently unassigned */ + unsigned saveReq:1; /* save required @ function entry ? */ + } +regs; +extern regs regsAVR[]; + +regs *avr_regWithIdx (int); + +#endif diff --git a/src/cdbFile.c b/src/cdbFile.c new file mode 100644 index 0000000..149fac2 --- /dev/null +++ b/src/cdbFile.c @@ -0,0 +1,513 @@ + + +#include "common.h" + + +/************************************************************* + * + * + * + * + *************************************************************/ + +int cdbOpenFile(char *file); +int cdbCloseFile(void); +int cdbWriteFunction(symbol *pSym, iCode *ic); +int cdbWriteEndFunction(symbol *pSym, iCode *ic, int offset); +int cdbWriteLabel(symbol *pSym, iCode *ic); +int cdbWriteScope(iCode *ic); +int cdbWriteSymbol(symbol *pSym); +int cdbWriteType(structdef *sdef, int block, int inStruct, char *tag); +int cdbWriteModule(char *name); +int cdbWriteCLine(iCode *ic); +int cdbWriteALine(char *module, int Line); +int cdbWriteFrameAddress(char *variable, struct regs *reg, int offset); +int cdbWriteBasicSymbol(symbol *sym, int isStructSym, int isFunc); +void cdbTypeInfo (sym_link * type); + + +DEBUGFILE cdbDebugFile = + { + &cdbOpenFile, + &cdbCloseFile, + &cdbWriteModule, + &cdbWriteFunction, + &cdbWriteEndFunction, + &cdbWriteLabel, + &cdbWriteScope, + &cdbWriteSymbol, + &cdbWriteType, + &cdbWriteCLine, + &cdbWriteALine, + &cdbWriteFrameAddress + }; + +FILE *cdbFilePtr = NULL; +char *cdbModuleName = NULL; + +/****************************************************************** + * spacesToUnderscores - replace all non alpha-numerics with + * underscores + * + * + *****************************************************************/ + +static char * +spacesToUnderscores (char *dest, const char *src, size_t len) +{ + unsigned int i; + char *p; + + assert(dest != NULL); + assert(src != NULL); + assert(len > 0); + + --len; + for (p = dest, i = 0; *src != '\0' && i < len; ++src, ++i) { + *p++ = (isspace((unsigned char)*src) || (*src == '-')) ? '_' : *src; + } + *p = '\0'; + + return dest; +} + + +/****************************************************************** + * + * + * + * + *****************************************************************/ + +int cdbOpenFile(char *file) +{ + if (getenv("SDCC_DEBUG_FUNCTION_POINTERS")) + fprintf (stderr, "cdbFile.c:cdbOpenFile(%s)\n", file); + + return (cdbFilePtr = fopen(file, "w")) ? 1 : 0; +} + +/****************************************************************** + * + * + * + * + *****************************************************************/ +int cdbCloseFile(void) +{ + if (getenv("SDCC_DEBUG_FUNCTION_POINTERS")) + fprintf (stderr, "cdbFile.c:cdbCloseFile()\n"); + + if(!cdbFilePtr) return 0; + + fclose(cdbFilePtr); + cdbFilePtr = NULL; + cdbModuleName = NULL; + + return 1; +} + +/****************************************************************** + * + * + * + * + *****************************************************************/ + +int cdbWriteFunction(symbol *pSym, iCode *ic) +{ + char debugSym[INITIAL_INLINEASM]; + + if (getenv("SDCC_DEBUG_FUNCTION_POINTERS")) + fprintf (stderr, "cdbFile.c:cdbWriteFunction()\n"); + + + if(!cdbFilePtr) return 0; + + if (IS_STATIC (pSym->etype)) + sprintf (debugSym, "F%s$%s$0$0", moduleName, pSym->name); + else + sprintf (debugSym, "G$%s$0$0", pSym->name); + emitDebuggerSymbol (debugSym); + + return cdbWriteBasicSymbol(pSym, FALSE, TRUE); +} + +/****************************************************************** + * + * + * + * + *****************************************************************/ + +int cdbWriteEndFunction(symbol *pSym, iCode *ic, int offset) +{ + char debugSym[INITIAL_INLINEASM]; + + if (getenv("SDCC_DEBUG_FUNCTION_POINTERS")) + fprintf (stderr, "cdbFile.c:cdbWriteEndFunction()\n"); + + if(!cdbFilePtr) return 0; + + if (ic) + { + sprintf (debugSym, "C$%s$%d$%d$%d", + FileBaseName (ic->filename), pSym->lastLine, + ic->level, ic->block); + spacesToUnderscores (debugSym, debugSym, sizeof (debugSym)); + emitDebuggerSymbol (debugSym); + } + + if (IS_STATIC (pSym->etype)) + sprintf (debugSym, "XF%s$%s$0$0", moduleName, pSym->name); + else + sprintf (debugSym, "XG$%s$0$0", pSym->name); + emitDebuggerSymbol (debugSym); + + return 1; +} + +/****************************************************************** + * + * + * + * + *****************************************************************/ + +int cdbWriteLabel(symbol *pSym, iCode *ic) +{ + if (getenv("SDCC_DEBUG_FUNCTION_POINTERS")) + fprintf (stderr, "cdbFile.c:cdbWriteLabel()\n"); + + if(!cdbFilePtr) return 0; + + return 1; +} + +/****************************************************************** + * + * + * + * + *****************************************************************/ + +int cdbWriteScope(iCode *ic) +{ + if (getenv("SDCC_DEBUG_FUNCTION_POINTERS")) + fprintf (stderr, "cdbFile.c:cdbWriteScope()\n"); + + if(!cdbFilePtr) return 0; + + return 1; +} + +/****************************************************************** + * + * + * + * + *****************************************************************/ + +int cdbWriteSymbol(symbol *pSym) +{ + if (getenv("SDCC_DEBUG_FUNCTION_POINTERS")) + fprintf (stderr, "cdbFile.c:cdbWriteSymbol()\n"); + + if(!cdbFilePtr) return 0; + + return cdbWriteBasicSymbol(pSym, FALSE, FALSE); +} + +/****************************************************************** + * + * + * + * + *****************************************************************/ + +int cdbWriteType(structdef *sdef, int block, int inStruct, char *tag) +{ + symbol *sym; + + if (getenv("SDCC_DEBUG_FUNCTION_POINTERS")) + fprintf (stderr, "cdbFile.c:cdbWriteType()\n"); + + if(!cdbFilePtr) return 0; + + fprintf (cdbFilePtr, "T:"); + + /* if block # then must have function scope */ + fprintf (cdbFilePtr, "F%s$", moduleName); + + fprintf (cdbFilePtr, "%s[", (tag ? tag : sdef->tag)); + + for (sym = sdef->fields; sym; sym = sym->next) + { + fprintf (cdbFilePtr, "({%d}", sym->offset); + cdbWriteBasicSymbol(sym, TRUE, FALSE); + fprintf(cdbFilePtr, ")"); + } + + fprintf (cdbFilePtr, "]"); + + if (!inStruct) + fprintf (cdbFilePtr, "\n"); + + return 1; +} + +/****************************************************************** + * + * + * + * + *****************************************************************/ + +int cdbWriteModule(char *name) +{ + if (getenv("SDCC_DEBUG_FUNCTION_POINTERS")) + fprintf (stderr, "cdbFile.c:cdbWriteModule()\n"); + + if(!cdbFilePtr) return 0; + cdbModuleName = name; + + fprintf(cdbFilePtr, "M:%s\n", cdbModuleName); + + return 1; +} + +/****************************************************************** + * + * + * + * + *****************************************************************/ +int cdbWriteCLine(iCode *ic) +{ + char debugSym[INITIAL_INLINEASM]; + + if(!cdbFilePtr) return 0; + + sprintf (debugSym, "C$%s$%d$%d$%d", + FileBaseName (ic->filename), ic->lineno, + ic->level, ic->block); + spacesToUnderscores (debugSym, debugSym, sizeof (debugSym)); + emitDebuggerSymbol (debugSym); + + return 1; +} + +/****************************************************************** + * + * + * + * + *****************************************************************/ + +int cdbWriteALine(char *module, int Line) +{ + if(!cdbFilePtr) return 0; + + return 1; +} + +/****************************************************************** + * + * + * + * + *****************************************************************/ + +int cdbWriteFrameAddress(char *variable, struct regs *reg, int offset) +{ + if (getenv("SDCC_DEBUG_FUNCTION_POINTERS")) + fprintf (stderr, "cdbFile.c:cdbWriteFrameAddress()\n"); + + if(!cdbFilePtr) return 0; + + return 1; +} + +/****************************************************************** + * + * + * + * + *****************************************************************/ + +int cdbWriteBasicSymbol(symbol *sym, int isStructSym, int isFunc) +{ + memmap *map; + + if (getenv("SDCC_DEBUG_FUNCTION_POINTERS")) + fprintf (stderr, "cdbFile.c:cdbWriteBasicSymbol()\n"); + + if(!cdbFilePtr) return 0; + + if (!sym) return 0; + + /* WRITE HEADER, Function or Symbol */ + if (isFunc) + fprintf (cdbFilePtr, "F:"); + else + fprintf (cdbFilePtr, "S:"); + + /* STRUCTS do not have scope info.. */ + + if (!isStructSym) + { + if (!sym->level) + { + /* global */ + if (IS_STATIC (sym->etype)) + fprintf (cdbFilePtr, "F%s$", moduleName); /* scope is file */ + else + fprintf (cdbFilePtr, "G$"); /* scope is global */ + } + else + /* symbol is local */ + fprintf (cdbFilePtr, "L%s$", (sym->localof ? sym->localof->name : "-null-")); + } + else + fprintf (cdbFilePtr, "S$"); /* scope is structure */ + + /* print the name, & mangled name */ + fprintf (cdbFilePtr, "%s$%d$%d(", sym->name, + sym->level, sym->block); + + cdbTypeInfo (sym->type); + + fprintf (cdbFilePtr, "),"); + + /* CHECK FOR REGISTER SYMBOL... */ + if (!sym->allocreq && sym->reqv) + { + int a; + symbol *TempSym = OP_SYMBOL (sym->reqv); + + fprintf(cdbFilePtr, "R,0,0,["); + + for(a = 0; a < 4; a++) + if(TempSym->regs[a]) + fprintf(cdbFilePtr, "%s%s", port->getRegName(TempSym->regs[a]), + ((a < 3) && (TempSym->regs[a+1])) ? "," : ""); + + fprintf(cdbFilePtr, "]"); + } + else + { + /* print the address space */ + map = SPEC_OCLS (sym->etype); + + fprintf (cdbFilePtr, "%c,%d,%d", + (map ? map->dbName : 'Z'), sym->onStack, SPEC_STAK (sym->etype)); + } + + /* if assigned to registers then output register names */ + /* if this is a function then print + if is it an interrupt routine & interrupt number + and the register bank it is using */ + if (isFunc) + fprintf (cdbFilePtr, ",%d,%d,%d", FUNC_ISISR (sym->type), + FUNC_INTNO (sym->type), FUNC_REGBANK (sym->type)); + + +/* alternate location to find this symbol @ : eg registers + or spillication */ + + if (!isStructSym) + fprintf (cdbFilePtr, "\n"); + + return 1; +} + +/****************************************************************** + * + * + * + * + *****************************************************************/ + +/*-----------------------------------------------------------------*/ +/* cdbTypeInfo - print the type information for debugger */ +/*-----------------------------------------------------------------*/ +void cdbTypeInfo (sym_link * type) +{ + fprintf (cdbFilePtr, "{%d}", getSize (type)); + + while (type) + { + if (IS_DECL (type)) + { + switch (DCL_TYPE (type)) + { + case FUNCTION: fprintf (cdbFilePtr, "DF,"); break; + case GPOINTER: fprintf (cdbFilePtr, "DG,"); break; + case CPOINTER: fprintf (cdbFilePtr, "DC,"); break; + case FPOINTER: fprintf (cdbFilePtr, "DX,"); break; + case POINTER: fprintf (cdbFilePtr, "DD,"); break; + case IPOINTER: fprintf (cdbFilePtr, "DI,"); break; + case PPOINTER: fprintf (cdbFilePtr, "DP,"); break; + case EEPPOINTER: fprintf (cdbFilePtr, "DA,"); break; + case ARRAY: fprintf (cdbFilePtr, "DA%d,", DCL_ELEM (type)); break; + default: + break; + } + } + else + { + switch (SPEC_NOUN (type)) + { + case V_INT: + if (IS_LONG (type)) + fprintf (cdbFilePtr, "SL"); + else + fprintf (cdbFilePtr, "SI"); + break; + + case V_CHAR: fprintf (cdbFilePtr, "SC"); break; + case V_VOID: fprintf (cdbFilePtr, "SV"); break; + case V_FLOAT: fprintf (cdbFilePtr, "SF"); break; + case V_FIXED16X16: fprintf(cdbFilePtr, "SQ"); break; + case V_STRUCT: + fprintf (cdbFilePtr, "ST%s", SPEC_STRUCT (type)->tag); + break; + + case V_SBIT: fprintf (cdbFilePtr, "SX"); break; + case V_BIT: + case V_BITFIELD: + fprintf (cdbFilePtr, "SB%d$%d", SPEC_BSTR (type), + SPEC_BLEN (type)); + break; + + default: + break; + } + fputs (":", cdbFilePtr); + if (SPEC_USIGN (type)) + fputs ("U", cdbFilePtr); + else + fputs ("S", cdbFilePtr); + } + type = type->next; + } +} + + + + + + + + + + + + + + + + + + + diff --git a/src/clean.mk b/src/clean.mk new file mode 100644 index 0000000..82dc4d8 --- /dev/null +++ b/src/clean.mk @@ -0,0 +1,43 @@ +CLEANALLPORTS = avr ds390 ds400 hc08 mcs51 pic pic16 z80 xa51 + +# Deleting all files created by building the program +# -------------------------------------------------- +clean: + rm -f *core *[%~] *.[oa] *.output + rm -f .[a-z]*~ \#* + rm -f version.h + rm -f SDCCy.c SDCCy.h SDCClex.c + rm -f $(top_builddir)/bin/sdcc$(EXEEXT) sdcc$(EXEEXT) + for port in $(CLEANALLPORTS) ; do\ + if [ -f $$port/Makefile ]; then\ + $(MAKE) -C $$port clean ;\ + fi;\ + done + + +# Deleting all files created by configuring or building the program +# ----------------------------------------------------------------- +distclean: clean + rm -f Makefile *.dep + for port in $(CLEANALLPORTS) ; do\ + if [ -f $$port/Makefile ]; then\ + $(MAKE) -C $$port distclean ;\ + fi;\ + done + + +# Like clean but some files may still exist +# ----------------------------------------- +mostlyclean: clean + rm -f SDCCy.c + rm -f SDCCy.h + rm -f SDCClex.c + + +# Deleting everything that can reconstructed by this Makefile. It deletes +# everything deleted by distclean plus files created by bison, etc. +# ----------------------------------------------------------------------- +realclean: distclean + rm -f SDCCy.c + rm -f SDCCy.h + rm -f SDCClex.c diff --git a/src/common.h b/src/common.h new file mode 100644 index 0000000..d1a5b21 --- /dev/null +++ b/src/common.h @@ -0,0 +1,44 @@ +#include +#include +#include +#include +#include + + +#ifndef COMMON_H +#define COMMON_H + +#if defined(__APPLE__) && (__MACH__) +#ifdef _G +#undef _G +#endif +#endif + +#include "SDCCglobl.h" +#include "SDCCmem.h" +#include "SDCCast.h" +#include "SDCCy.h" +#include "SDCChasht.h" +#include "SDCCbitv.h" +#include "SDCCset.h" +#include "SDCCicode.h" +#include "SDCClabel.h" +#include "SDCCBBlock.h" +#include "SDCCloop.h" +#include "SDCCcse.h" +#include "SDCCcflow.h" +#include "SDCCdflow.h" +#include "SDCClrange.h" +#include "SDCCptropt.h" +#include "SDCCopt.h" +#include "SDCCglue.h" +#include "SDCCpeeph.h" +#include "SDCCdebug.h" +#include "SDCCutil.h" +#include "SDCCasm.h" + +#include "port.h" + +#include "newalloc.h" + +#endif diff --git a/src/conf.mk b/src/conf.mk new file mode 100644 index 0000000..ac65f24 --- /dev/null +++ b/src/conf.mk @@ -0,0 +1,10 @@ +# +# Makefile targets to remake configuration +# + +freshconf: Makefile + +Makefile: $(srcdir)/Makefile.in $(top_srcdir)/configure.in + cd $(top_builddir) && $(SHELL) ./config.status + +# End of conf.mk diff --git a/src/ds390/Makefile.bcc b/src/ds390/Makefile.bcc new file mode 100644 index 0000000..8370b9f --- /dev/null +++ b/src/ds390/Makefile.bcc @@ -0,0 +1,23 @@ +# Makefile for Borlad C++ + +PRJDIR = ../.. + +OBJ = gen.obj ralloc.obj main.obj +LIB = port.lib + +!include $(PRJDIR)/Bcc.inc +CFLAGS = $(CFLAGS) -I.. -I$(PRJDIR) + +all: $(LIB) + +main.obj: main.c peeph.rul + +$(LIB): $(OBJ) + if exist $(LIB) del $(LIB) + tlib $@ @&&! ++$(**: = &^ ++) +! + +.def.rul: + gawk -f ../SDCCpeeph.awk $< > $@ diff --git a/src/ds390/Makefile.in b/src/ds390/Makefile.in new file mode 100644 index 0000000..dfb8a52 --- /dev/null +++ b/src/ds390/Makefile.in @@ -0,0 +1,7 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +# Make all in this directory +include $(srcdir)/../port.mk diff --git a/src/ds390/ds390.dsp b/src/ds390/ds390.dsp new file mode 100644 index 0000000..c18fe4d --- /dev/null +++ b/src/ds390/ds390.dsp @@ -0,0 +1,116 @@ +# Microsoft Developer Studio Project File - Name="ds390" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Static Library" 0x0104 + +CFG=ds390 - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "ds390.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "ds390.mak" CFG="ds390 - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "ds390 - Win32 Debug" (based on "Win32 (x86) Static Library") +!MESSAGE "ds390 - Win32 Release" (based on "Win32 (x86) Static Library") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "ds390 - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /FR /FD /GZ /Zm500 /c +# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /FR /FD /GZ /Zm1000 /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LIB32=link.exe -lib +# ADD BASE LIB32 /nologo /out:"Debug\port.lib" +# ADD LIB32 /nologo /out:"Debug\port.lib" + +!ELSEIF "$(CFG)" == "ds390 - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /ML /W3 /GX /O2 /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /FD /Zm500 /c +# ADD CPP /nologo /ML /W3 /GX /O2 /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /FD /Zm1000 /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LIB32=link.exe -lib +# ADD BASE LIB32 /nologo /out:"Release\port.lib" +# ADD LIB32 /nologo /out:"Release\port.lib" + +!ENDIF + +# Begin Target + +# Name "ds390 - Win32 Debug" +# Name "ds390 - Win32 Release" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\gen.c +# End Source File +# Begin Source File + +SOURCE=.\main.c +# End Source File +# Begin Source File + +SOURCE=.\ralloc.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=.\gen.h +# End Source File +# Begin Source File + +SOURCE=.\main.h +# End Source File +# Begin Source File + +SOURCE=.\ralloc.h +# End Source File +# End Group +# End Target +# End Project diff --git a/src/ds390/ds390a.dsp b/src/ds390/ds390a.dsp new file mode 100644 index 0000000..e5d5a79 --- /dev/null +++ b/src/ds390/ds390a.dsp @@ -0,0 +1,90 @@ +# Microsoft Developer Studio Project File - Name="ds390a" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Generic Project" 0x010a + +CFG=ds390a - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "ds390a.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "ds390a.mak" CFG="ds390a - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "ds390a - Win32 Debug" (based on "Win32 (x86) Generic Project") +!MESSAGE "ds390a - Win32 Release" (based on "Win32 (x86) Generic Project") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +MTL=midl.exe + +!IF "$(CFG)" == "ds390a - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "" +# PROP Intermediate_Dir "" +# PROP Target_Dir "" + +!ELSEIF "$(CFG)" == "ds390a - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "" +# PROP Intermediate_Dir "" +# PROP Target_Dir "" + +!ENDIF + +# Begin Target + +# Name "ds390a - Win32 Debug" +# Name "ds390a - Win32 Release" +# Begin Source File + +SOURCE=.\peeph.def + +!IF "$(CFG)" == "ds390a - Win32 Debug" + +# Begin Custom Build +InputPath=.\peeph.def + +"peeph.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph.rul + +# End Custom Build + +!ELSEIF "$(CFG)" == "ds390a - Win32 Release" + +# Begin Custom Build +InputPath=.\peeph.def + +"peeph.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph.rul + +# End Custom Build + +!ENDIF + +# End Source File +# End Target +# End Project diff --git a/src/ds390/gen.c b/src/ds390/gen.c new file mode 100644 index 0000000..0d90d01 --- /dev/null +++ b/src/ds390/gen.c @@ -0,0 +1,14633 @@ +/*------------------------------------------------------------------------- + gen.c - source file for code generation for DS80C390 + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + and - Jean-Louis VERN.jlvern@writeme.com (1999) + Bug Fixes - Wojciech Stryjewski wstryj1@tiger.lsu.edu (1999 v2.1.9a) + DS390 adaptation by Kevin Vigor + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +//#define D(x) +#define D(x) do if (options.verboseAsm) {x;} while(0) + +#include +#include +#include +#include +#include "SDCCglobl.h" +#include "newalloc.h" +#include "dbuf_string.h" + +#include "common.h" +#include "main.h" +#include "ralloc.h" +#include "gen.h" + +#define BETTER_LITERAL_SHIFT + +char *aopLiteral (value * val, int offset); +extern int allocInfo; + +/* this is the down and dirty file with all kinds of + kludgy & hacky stuff. This is what it is all about + CODE GENERATION for a specific MCU . some of the + routines may be reusable, will have to see */ + +static char *zero = "#0"; +static char *one = "#1"; +static char *spname; + +#define TR_DPTR(s) if (options.model != MODEL_FLAT24) { emitcode(";", " Use_DPTR1 %s ", s); } +#define TR_AP(s) if (options.model != MODEL_FLAT24) { emitcode(";", " Use_AP %s ", s); } + +unsigned fReturnSizeDS390 = 5; +static char *fReturn24[] = +{"dpl", "dph", "dpx", "b", "a"}; +static char *fReturn16[] = +{"dpl", "dph", "b", "a"}; +static char **fReturn = fReturn24; +static char *accUse[] = +{"a", "b"}; +static char *dptrn[2][3]; +static char *javaRet[] = { "r0","r1","r2","r3"}; +static short rbank = -1; + +#define REG_WITH_INDEX ds390_regWithIdx + +#define AOP(op) op->aop +#define AOP_TYPE(op) AOP(op)->type +#define AOP_SIZE(op) AOP(op)->size +#define IS_AOP_PREG(x) (AOP(x) && (AOP_TYPE(x) == AOP_R1 || \ + AOP_TYPE(x) == AOP_R0)) + +#define AOP_NEEDSACC(x) (AOP(x) && (AOP_TYPE(x) == AOP_CRY || \ + AOP_TYPE(x) == AOP_DPTR || AOP_TYPE(x) == AOP_DPTR2 || \ + AOP(x)->paged)) + +#define AOP_INPREG(x) (x && (x->type == AOP_REG && \ + (x->aopu.aop_reg[0] == REG_WITH_INDEX(R0_IDX) || \ + x->aopu.aop_reg[0] == REG_WITH_INDEX(R1_IDX) ))) +#define AOP_INDPTRn(x) (AOP_TYPE(x) == AOP_DPTRn) +#define AOP_USESDPTR(x) ((AOP_TYPE(x) == AOP_DPTR) || (AOP_TYPE(x) == AOP_STR)) +#define AOP_USESDPTR2(x) ((AOP_TYPE(x) == AOP_DPTR2) || (AOP_TYPE(x) == AOP_DPTRn)) + +// The following two macros can be used even if the aop has not yet been aopOp'd. +#define AOP_IS_STR(x) (IS_SYMOP(x) && OP_SYMBOL(x)->ruonly) +#define AOP_IS_DPTRn(x) (IS_SYMOP(x) && OP_SYMBOL(x)->dptr) + +/* Workaround for DS80C390 bug: div ab may return bogus results + * if A is accessed in instruction immediately before the div. + * + * Will be fixed in B4 rev of processor, Dallas claims. + */ + +#define LOAD_AB_FOR_DIV(LEFT, RIGHT, L) \ + if (!AOP_NEEDSACC(RIGHT)) \ + { \ + /* We can load A first, then B, since \ + * B (the RIGHT operand) won't clobber A, \ + * thus avoiding touching A right before the div. \ + */ \ + D(emitcode(";", "DS80C390 div bug: rearranged ops.");); \ + L = aopGet(LEFT,0,FALSE,FALSE,NULL); \ + MOVA(L); \ + L = aopGet(RIGHT,0,FALSE,FALSE,"b"); \ + MOVB(L); \ + } \ + else \ + { \ + /* Just stuff in a nop after loading A. */ \ + emitcode("mov","b,%s",aopGet(RIGHT,0,FALSE,FALSE,NULL));\ + L = aopGet(LEFT,0,FALSE,FALSE,NULL); \ + MOVA(L); \ + emitcode("nop", "; workaround for DS80C390 div bug."); \ + } + +#define R0INB _G.bu.bs.r0InB +#define R1INB _G.bu.bs.r1InB +#define OPINB _G.bu.bs.OpInB +#define BINUSE _G.bu.BInUse + +static struct + { + short r0Pushed; + short r1Pushed; + union + { + struct + { + short r0InB : 2;//2 so we can see it overflow + short r1InB : 2;//2 so we can see it overflow + short OpInB : 2;//2 so we can see it overflow + } bs; + short BInUse; + } bu; + short accInUse; + short inLine; + short debugLine; + short nRegsSaved; + short dptrInUse; + short dptr1InUse; + set *sendSet; + iCode *current_iCode; + symbol *currentFunc; + } +_G; + +static char *rb1regs[] = { + "b1_0","b1_1","b1_2","b1_3","b1_4","b1_5","b1_6","b1_7", + "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7" +}; + +static void saveRBank (int, iCode *, bool); + +#define RESULTONSTACK(x) \ + (IC_RESULT(x) && IC_RESULT(x)->aop && \ + IC_RESULT(x)->aop->type == AOP_STK ) + +#define MOVA(x) mova(x) /* use function to avoid multiple eval */ +#define MOVB(x) movb(x) + +#define CLRC emitcode("clr","c") +#define SETC emitcode("setb","c") + +// A scratch register which will be used to hold +// result bytes from operands in far space via DPTR2. +#define DP2_RESULT_REG "_ap" + +static lineNode *lineHead = NULL; +static lineNode *lineCurr = NULL; + +static unsigned char SLMask[] = +{0xFF, 0xFE, 0xFC, 0xF8, 0xF0, + 0xE0, 0xC0, 0x80, 0x00}; +static unsigned char SRMask[] = +{0xFF, 0x7F, 0x3F, 0x1F, 0x0F, + 0x07, 0x03, 0x01, 0x00}; + +#define LSB 0 +#define MSB16 1 +#define MSB24 2 +#define MSB32 3 +#define PROTECT_SP {if (options.protect_sp_update) { \ + symbol *lbl = newiTempLabel(NULL); \ + emitcode ("setb","F1"); \ + emitcode ("jbc","EA,!tlabel",lbl->key+100); \ + emitcode ("clr","F1"); \ + emitLabel (lbl); \ + }} +#define UNPROTECT_SP { if (options.protect_sp_update) { \ + emitcode ("mov","EA,F1"); \ + }} + +static int _currentDPS; /* Current processor DPS. */ +static int _desiredDPS; /* DPS value compiler thinks we should be using. */ +static int _lazyDPS = 0; /* if non-zero, we are doing lazy evaluation of DPS changes. */ + +/*-----------------------------------------------------------------*/ +/* emitcode - writes the code into a file : for now it is simple */ +/*-----------------------------------------------------------------*/ +static void +emitcode (const char *inst, const char *fmt,...) +{ + va_list ap; + struct dbuf_s dbuf; + const char *lbp, *lb; + + dbuf_init (&dbuf, INITIAL_INLINEASM); + + va_start (ap, fmt); + + if (inst && *inst) + { + dbuf_append_str (&dbuf, inst); + + if (fmt && *fmt) + { + dbuf_append_char (&dbuf, '\t'); + dbuf_tvprintf (&dbuf, fmt, ap); + } + } + else + { + dbuf_tvprintf (&dbuf, fmt, ap); + } + + lbp = lb = dbuf_c_str(&dbuf); + + while (isspace ((unsigned char)*lbp)) + { + lbp++; + } + + if (lbp) + { + lineCurr = (lineCurr ? + connectLine (lineCurr, newLineNode (lb)) : + (lineHead = newLineNode (lb))); + + lineCurr->isInline = _G.inLine; + lineCurr->isDebug = _G.debugLine; + lineCurr->ic = _G.current_iCode; + lineCurr->aln = ds390newAsmLineNode(_currentDPS); + lineCurr->isComment = (*lbp == ';'); + } + + va_end (ap); + + dbuf_destroy(&dbuf); +} + +static void +emitLabel (symbol *tlbl) +{ + emitcode ("", "!tlabeldef", tlbl->key + 100); + lineCurr->isLabel = 1; +} + +/*-----------------------------------------------------------------*/ +/* ds390_emitDebuggerSymbol - associate the current code location */ +/* with a debugger symbol */ +/*-----------------------------------------------------------------*/ +void +ds390_emitDebuggerSymbol (char * debugSym) +{ + _G.debugLine = 1; + emitcode ("", "%s ==.", debugSym); + _G.debugLine = 0; +} + +/*-----------------------------------------------------------------*/ +/* mova - moves specified value into accumulator */ +/*-----------------------------------------------------------------*/ +static void +mova (const char *x) +{ + /* do some early peephole optimization */ + if (!strncmp(x, "a", 2) || !strncmp(x, "acc", 4)) + return; + + emitcode("mov", "a,%s", x); +} + +/*-----------------------------------------------------------------*/ +/* movb - moves specified value into register b */ +/*-----------------------------------------------------------------*/ +static void +movb (const char *x) +{ + /* do some early peephole optimization */ + if (!strncmp(x, "b", 2)) + return; + + emitcode("mov","b,%s", x); +} + +/*-----------------------------------------------------------------*/ +/* movc - moves specified value into the carry */ +/*-----------------------------------------------------------------*/ +static void +movc (const char *s) +{ + if (s == zero) + CLRC; + else if (s == one) + SETC; + else if (strcmp (s, "c")) + {/* it's not in carry already */ + MOVA (s); + /* set C, if a >= 1 */ + emitcode ("add", "a,#0xff"); + } +} + +/*-----------------------------------------------------------------*/ +/* pushB - saves register B if necessary */ +/*-----------------------------------------------------------------*/ +static bool +pushB (void) +{ + bool pushedB = FALSE; + + if (BINUSE) + { + emitcode ("push", "b"); +// printf("B was in use !\n"); + pushedB = TRUE; + } + else + { + OPINB++; + } + return pushedB; +} + +/*-----------------------------------------------------------------*/ +/* popB - restores value of register B if necessary */ +/*-----------------------------------------------------------------*/ +static void +popB (bool pushedB) +{ + if (pushedB) + { + emitcode ("pop", "b"); + } + else + { + OPINB--; + } +} + +/*-----------------------------------------------------------------*/ +/* pushReg - saves register */ +/*-----------------------------------------------------------------*/ +static bool +pushReg (int index, bool bits_pushed) +{ + regs * reg = REG_WITH_INDEX (index); + if (reg->type == REG_BIT) + { + if (!bits_pushed) + emitcode ("push", "%s", reg->base); + return TRUE; + } + else + emitcode ("push", "%s", reg->dname); + return bits_pushed; +} + +/*-----------------------------------------------------------------*/ +/* popReg - restores register */ +/*-----------------------------------------------------------------*/ +static bool +popReg (int index, bool bits_popped) +{ + regs * reg = REG_WITH_INDEX (index); + if (reg->type == REG_BIT) + { + if (!bits_popped) + emitcode ("pop", "%s", reg->base); + return TRUE; + } + else + emitcode ("pop", "%s", reg->dname); + return bits_popped; +} + +/*-----------------------------------------------------------------*/ +/* getFreePtr - returns r0 or r1 whichever is free or can be pushed */ +/*-----------------------------------------------------------------*/ +static regs * +getFreePtr (iCode * ic, asmop ** aopp, bool result) +{ + bool r0iu, r1iu; + bool r0ou, r1ou; + + /* the logic: if r0 & r1 used in the instruction + then we are in trouble otherwise */ + + /* first check if r0 & r1 are used by this + instruction, in which case we are in trouble */ + r0iu = bitVectBitValue (ic->rUsed, R0_IDX); + r1iu = bitVectBitValue (ic->rUsed, R1_IDX); + if (r0iu && r1iu) { + goto endOfWorld; + } + + r0ou = bitVectBitValue (ic->rMask, R0_IDX); + r1ou = bitVectBitValue (ic->rMask, R1_IDX); + + /* if no usage of r0 then return it */ + if (!r0iu && !r0ou) + { + ic->rUsed = bitVectSetBit (ic->rUsed, R0_IDX); + (*aopp)->type = AOP_R0; + + return (*aopp)->aopu.aop_ptr = REG_WITH_INDEX (R0_IDX); + } + + /* if no usage of r1 then return it */ + if (!r1iu && !r1ou) + { + ic->rUsed = bitVectSetBit (ic->rUsed, R1_IDX); + (*aopp)->type = AOP_R1; + + return (*aopp)->aopu.aop_ptr = REG_WITH_INDEX (R1_IDX); + } + + /* now we know they both have usage */ + /* if r0 not used in this instruction */ + if (!r0iu) + { + /* push it if not already pushed */ + if (!_G.r0Pushed) + { + emitcode ("push", "%s", + REG_WITH_INDEX (R0_IDX)->dname); + _G.r0Pushed++; + } + + ic->rUsed = bitVectSetBit (ic->rUsed, R0_IDX); + (*aopp)->type = AOP_R0; + + return (*aopp)->aopu.aop_ptr = REG_WITH_INDEX (R0_IDX); + } + + /* if r1 not used then */ + + if (!r1iu) + { + /* push it if not already pushed */ + if (!_G.r1Pushed) + { + emitcode ("push", "%s", + REG_WITH_INDEX (R1_IDX)->dname); + _G.r1Pushed++; + } + + ic->rUsed = bitVectSetBit (ic->rUsed, R1_IDX); + (*aopp)->type = AOP_R1; + return REG_WITH_INDEX (R1_IDX); + } + +endOfWorld: + /* I said end of world, but not quite end of world yet */ + /* if this is a result then we can push it on the stack */ + if (result) + { + (*aopp)->type = AOP_STK; + return NULL; + } + + /* now this is REALLY the end of the world */ + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "getFreePtr should never reach here"); + exit (1); + + return NULL; // notreached, but makes compiler happy. +} + + +/*-----------------------------------------------------------------*/ +/* genSetDPTR: generate code to select which DPTR is in use (zero */ +/* selects standard DPTR (DPL/DPH/DPX), non-zero selects DS390 */ +/* alternate DPTR (DPL1/DPH1/DPX1). */ +/*-----------------------------------------------------------------*/ +static void +genSetDPTR (int n) +{ + + /* If we are doing lazy evaluation, simply note the desired + * change, but don't emit any code yet. + */ + if (_lazyDPS) + { + _desiredDPS = n; + return; + } + + if (!n) + { + emitcode ("mov", "dps,#0"); + } + else + { + TR_DPTR("#1"); + emitcode ("mov", "dps,#1"); + } +} + +/*------------------------------------------------------------------*/ +/* _startLazyDPSEvaluation: call to start doing lazy DPS evaluation */ +/* */ +/* Any code that operates on DPTR (NB: not on the individual */ +/* components, like DPH) *must* call _flushLazyDPS() before using */ +/* DPTR within a lazy DPS evaluation block. */ +/* */ +/* Note that aopPut and aopGet already contain the proper calls to */ +/* _flushLazyDPS, so it is safe to use these calls within a lazy */ +/* DPS evaluation block. */ +/* */ +/* Also, _flushLazyDPS must be called before any flow control */ +/* operations that could potentially branch out of the block. */ +/* */ +/* Lazy DPS evaluation is simply an optimization (though an */ +/* important one), so if in doubt, leave it out. */ +/*------------------------------------------------------------------*/ +static void +_startLazyDPSEvaluation (void) +{ + _currentDPS = 0; + _desiredDPS = 0; +#ifdef BETTER_LITERAL_SHIFT + _lazyDPS++; +#else + _lazyDPS = 1; +#endif +} + +/*------------------------------------------------------------------*/ +/* _flushLazyDPS: emit code to force the actual DPS setting to the */ +/* desired one. Call before using DPTR within a lazy DPS evaluation */ +/* block. */ +/*------------------------------------------------------------------*/ +static void +_flushLazyDPS (void) +{ + if (!_lazyDPS) + { + /* nothing to do. */ + return; + } + + if (_desiredDPS != _currentDPS) + { + if (_desiredDPS) + { + emitcode ("inc", "dps"); + } + else + { + emitcode ("dec", "dps"); + } + _currentDPS = _desiredDPS; + } +} + +/*-----------------------------------------------------------------*/ +/* _endLazyDPSEvaluation: end lazy DPS evaluation block. */ +/* */ +/* Forces us back to the safe state (standard DPTR selected). */ +/*-----------------------------------------------------------------*/ +static void +_endLazyDPSEvaluation (void) +{ +#ifdef BETTER_LITERAL_SHIFT + _lazyDPS--; +#else + _lazyDPS = 0; +#endif + if (!_lazyDPS) + { + if (_currentDPS) + { + genSetDPTR (0); + _flushLazyDPS (); + } + _currentDPS = 0; + _desiredDPS = 0; + } +} + + +/*-----------------------------------------------------------------*/ +/* newAsmop - creates a new asmOp */ +/*-----------------------------------------------------------------*/ +static asmop * +newAsmop (short type) +{ + asmop *aop; + + aop = Safe_calloc (1, sizeof (asmop)); + aop->type = type; + aop->allocated = 1; + return aop; +} + +/*-----------------------------------------------------------------*/ +/* pointerCode - returns the code for a pointer type */ +/*-----------------------------------------------------------------*/ +static int +pointerCode (sym_link * etype) +{ + + return PTR_TYPE (SPEC_OCLS (etype)); + +} + +/*-----------------------------------------------------------------*/ +/* leftRightUseAcc - returns size of accumulator use by operands */ +/*-----------------------------------------------------------------*/ +static int +leftRightUseAcc(iCode *ic) +{ + operand *op; + int size; + int accuseSize = 0; + int accuse = 0; + + if (!ic) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "null iCode pointer"); + return 0; + } + + if (ic->op == IFX) + { + op = IC_COND (ic); + if (IS_OP_ACCUSE (op)) + { + accuse = 1; + size = getSize (OP_SYMBOL (op)->type); + if (size>accuseSize) + accuseSize = size; + } + } + else if (ic->op == JUMPTABLE) + { + op = IC_JTCOND (ic); + if (IS_OP_ACCUSE (op)) + { + accuse = 1; + size = getSize (OP_SYMBOL (op)->type); + if (size>accuseSize) + accuseSize = size; + } + } + else + { + op = IC_LEFT (ic); + if (IS_OP_ACCUSE (op)) + { + accuse = 1; + size = getSize (OP_SYMBOL (op)->type); + if (size>accuseSize) + accuseSize = size; + } + op = IC_RIGHT (ic); + if (IS_OP_ACCUSE (op)) + { + accuse = 1; + size = getSize (OP_SYMBOL (op)->type); + if (size>accuseSize) + accuseSize = size; + } + } + + if (accuseSize) + return accuseSize; + else + return accuse; +} + +/*-----------------------------------------------------------------*/ +/* aopForSym - for a true symbol */ +/*-----------------------------------------------------------------*/ +static asmop * +aopForSym (iCode * ic, symbol * sym, bool result, bool useDP2) +{ + asmop *aop; + memmap *space; + bool accuse = leftRightUseAcc (ic) || _G.accInUse; + char *dpl = useDP2 ? "dpl1" : "dpl"; + char *dph = useDP2 ? "dph1" : "dph"; + char *dpx = useDP2 ? "dpx1" : "dpx"; + + wassertl (ic != NULL, "Got a null iCode"); + wassertl (sym != NULL, "Got a null symbol"); + + space = SPEC_OCLS (sym->etype); + + /* if already has one */ + if (sym->aop) + { + if ((sym->aop->type == AOP_DPTR && useDP2) + || (sym->aop->type == AOP_DPTR2 && !useDP2)) + sym->aop = NULL; + else + { + sym->aop->allocated++; + return sym->aop; + } + } + + /* assign depending on the storage class */ + /* if it is on the stack or indirectly addressable */ + /* space we need to assign either r0 or r1 to it */ + if ((sym->onStack && !options.stack10bit) || sym->iaccess) + { + sym->aop = aop = newAsmop (0); + aop->aopu.aop_ptr = getFreePtr (ic, &aop, result); + aop->size = getSize (sym->type); + + /* now assign the address of the variable to + the pointer register */ + if (aop->type != AOP_STK) + { + if (sym->onStack) + { + signed char offset = ((sym->stack < 0) ? + ((signed char) (sym->stack - _G.nRegsSaved)) : + ((signed char) sym->stack)) & 0xff; + + if ((abs(offset) <= 3) || + (accuse && (abs(offset) <= 7))) + { + emitcode ("mov", "%s,_bp", + aop->aopu.aop_ptr->name); + while (offset < 0) + { + emitcode ("dec", aop->aopu.aop_ptr->name); + offset++; + } + while (offset > 0) + { + emitcode ("inc", aop->aopu.aop_ptr->name); + offset--; + } + } + else + { + if (accuse) + emitcode ("push", "acc"); + emitcode ("mov", "a,_bp"); + emitcode ("add", "a,#!constbyte", offset); + emitcode ("mov", "%s,a", aop->aopu.aop_ptr->name); + if (accuse) + emitcode ("pop", "acc"); + } + } + else + { + emitcode ("mov", "%s,#%s", + aop->aopu.aop_ptr->name, + sym->rname); + } + aop->paged = space->paged; + } + else + aop->aopu.aop_stk = sym->stack; + return aop; + } + + if (sym->onStack && options.stack10bit) + { + short stack_val = -((sym->stack < 0) ? + ((short) (sym->stack - _G.nRegsSaved)) : + ((short) sym->stack)) ; + if (_G.dptrInUse ) { + emitcode ("push",dpl); + emitcode ("push",dph); + emitcode ("push",dpx); + } + /* It's on the 10 bit stack, which is located in + * far data space. + */ + if (stack_val < 0 && stack_val > -5) + { /* between -5 & -1 */ + if (options.model == MODEL_FLAT24) + { + emitcode ("mov", "%s,#!constbyte", dpx, + (options.stack_loc >> 16) & 0xff); + } + emitcode ("mov", "%s,_bpx+1", dph); + emitcode ("mov", "%s,_bpx", dpl); + if (useDP2) { + emitcode ("mov","dps,#1"); + } + stack_val = -stack_val; + while (stack_val--) { + emitcode ("inc","dptr"); + } + if (useDP2) { + emitcode("mov","dps,#0"); + } + } + else + { + if (accuse) + emitcode ("push", "acc"); + + emitcode ("mov", "a,_bpx"); + emitcode ("clr","c"); + emitcode ("subb", "a,#!constbyte", stack_val & 0xff); + emitcode ("mov","%s,a", dpl); + emitcode ("mov","a,_bpx+1"); + emitcode ("subb","a,#!constbyte",(stack_val >> 8) & 0xff); + emitcode ("mov", "%s,a", dph); + if (options.model == MODEL_FLAT24) + { + emitcode ("mov", "%s,#!constbyte", dpx, + (options.stack_loc >> 16) & 0xff); + } + + if (accuse) + emitcode ("pop", "acc"); + } + sym->aop = aop = newAsmop ((short) (useDP2 ? AOP_DPTR2 : AOP_DPTR)); + aop->size = getSize (sym->type); + return aop; + } + + /* if in bit space */ + if (IN_BITSPACE (space)) + { + sym->aop = aop = newAsmop (AOP_CRY); + aop->aopu.aop_dir = sym->rname; + aop->size = getSize (sym->type); + return aop; + } + /* if it is in direct space */ + if (IN_DIRSPACE (space)) + { + sym->aop = aop = newAsmop (AOP_DIR); + aop->aopu.aop_dir = sym->rname; + aop->size = getSize (sym->type); + return aop; + } + + /* special case for a function */ + if (IS_FUNC (sym->type) && !(sym->isitmp)) + { + sym->aop = aop = newAsmop (AOP_IMMD); + aop->aopu.aop_immd.aop_immd1 = Safe_strdup(sym->rname); + aop->size = FPTRSIZE; + return aop; + } + + /* only remaining is far space */ + /* in which case DPTR gets the address */ + sym->aop = aop = newAsmop ((short) (useDP2 ? AOP_DPTR2 : AOP_DPTR)); + if (useDP2) + { + genSetDPTR (1); + _flushLazyDPS (); + emitcode ("mov", "dptr,#%s", sym->rname); + genSetDPTR (0); + } + else + { + emitcode ("mov", "dptr,#%s", sym->rname); + } + aop->size = getSize (sym->type); + + /* if it is in code space */ + if (IN_CODESPACE (space)) + aop->code = 1; + + return aop; +} + +/*-----------------------------------------------------------------*/ +/* aopForRemat - rematerializes an object */ +/*-----------------------------------------------------------------*/ +static asmop * +aopForRemat (symbol * sym) +{ + iCode *ic = sym->rematiCode; + asmop *aop = newAsmop (AOP_IMMD); + int ptr_type = 0; + int val = 0; + + for (;;) + { + if (ic->op == '+') + val += (int) operandLitValue (IC_RIGHT (ic)); + else if (ic->op == '-') + val -= (int) operandLitValue (IC_RIGHT (ic)); + else if (IS_CAST_ICODE(ic)) + { + sym_link *from_type = operandType(IC_RIGHT(ic)); + aop->aopu.aop_immd.from_cast_remat = 1; + ic = OP_SYMBOL (IC_RIGHT (ic))->rematiCode; + ptr_type = pointerTypeToGPByte (DCL_TYPE(from_type), NULL, NULL); + continue; + } + else break; + + ic = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + } + + if (val) + { + SNPRINTF (buffer, sizeof(buffer), + "(%s %c 0x%06x)", + OP_SYMBOL (IC_LEFT (ic))->rname, + val >= 0 ? '+' : '-', + abs (val) & 0xffffff); + } + else + { + if (IS_ASSIGN_ICODE(ic) && isOperandLiteral(IC_RIGHT(ic))) + { + SNPRINTF(buffer, sizeof(buffer), + "0x%x",(int) operandLitValue (IC_RIGHT (ic))); + } + else + { + strncpyz (buffer, OP_SYMBOL (IC_LEFT (ic))->rname, sizeof(buffer)); + } + } + + aop->aopu.aop_immd.aop_immd1 = Safe_strdup(buffer); + /* set immd2 field if required */ + if (aop->aopu.aop_immd.from_cast_remat) + { + tsprintf(buffer, sizeof(buffer), "#!constbyte",ptr_type); + aop->aopu.aop_immd.aop_immd2 = Safe_strdup(buffer); + } + + return aop; +} + +/*-----------------------------------------------------------------*/ +/* aopHasRegs - returns true if aop has regs between from-to */ +/*-----------------------------------------------------------------*/ +static int aopHasRegs(asmop *aop, int from, int to) +{ + int size =0; + + if (aop->type != AOP_REG) return 0; /* if not assigned to regs */ + + for (; size < aop->size ; size++) { + int reg; + for (reg = from ; reg <= to ; reg++) + if (aop->aopu.aop_reg[size] == REG_WITH_INDEX(reg)) return 1; + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* regsInCommon - two operands have some registers in common */ +/*-----------------------------------------------------------------*/ +static bool +regsInCommon (operand * op1, operand * op2) +{ + symbol *sym1, *sym2; + int i; + + /* if they have registers in common */ + if (!IS_SYMOP (op1) || !IS_SYMOP (op2)) + return FALSE; + + sym1 = OP_SYMBOL (op1); + sym2 = OP_SYMBOL (op2); + + if (sym1->nRegs == 0 || sym2->nRegs == 0) + return FALSE; + + for (i = 0; i < sym1->nRegs; i++) + { + int j; + if (!sym1->regs[i]) + continue; + + for (j = 0; j < sym2->nRegs; j++) + { + if (!sym2->regs[j]) + continue; + + if (sym2->regs[j] == sym1->regs[i]) + return TRUE; + } + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* operandsEqu - equivalent */ +/*-----------------------------------------------------------------*/ +static bool +operandsEqu (operand * op1, operand * op2) +{ + symbol *sym1, *sym2; + + /* if they're not symbols */ + if (!IS_SYMOP (op1) || !IS_SYMOP (op2)) + return FALSE; + + sym1 = OP_SYMBOL (op1); + sym2 = OP_SYMBOL (op2); + + /* if both are itemps & one is spilt + and the other is not then false */ + if (IS_ITEMP (op1) && IS_ITEMP (op2) && + sym1->isspilt != sym2->isspilt) + return FALSE; + + /* if they are the same */ + if (sym1 == sym2) + return TRUE; + + /* if they have the same rname */ + if (sym1->rname[0] && sym2->rname[0] && + strcmp (sym1->rname, sym2->rname) == 0 && + !(IS_PARM (op2) && IS_ITEMP (op1))) + return TRUE; + + /* if left is a tmp & right is not */ + if (IS_ITEMP (op1) && + !IS_ITEMP (op2) && + sym1->isspilt && + (sym1->usl.spillLoc == sym2)) + return TRUE; + + if (IS_ITEMP (op2) && + !IS_ITEMP (op1) && + sym2->isspilt && + sym1->level > 0 && + (sym2->usl.spillLoc == sym1)) + return TRUE; + + /* are they spilt to the same location */ + if (IS_ITEMP (op2) && + IS_ITEMP (op1) && + sym2->isspilt && + sym1->isspilt && + (sym1->usl.spillLoc == sym2->usl.spillLoc)) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* sameRegs - two asmops have the same registers */ +/*-----------------------------------------------------------------*/ +static bool +sameRegs (asmop * aop1, asmop * aop2) +{ + int i; + + if (aop1 == aop2) + { + if (aop1->type == AOP_DPTR || aop1->type == AOP_DPTR2) + { + return FALSE; + } + return TRUE; + } + + if (aop1->type != AOP_REG && aop1->type != AOP_CRY) + return FALSE; + + if (aop1->type != aop2->type) + return FALSE; + + if (aop1->size != aop2->size) + return FALSE; + + for (i = 0; i < aop1->size; i++) + if (aop1->aopu.aop_reg[i] != aop2->aopu.aop_reg[i]) + return FALSE; + + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* aopOp - allocates an asmop for an operand : */ +/*-----------------------------------------------------------------*/ +static void +aopOp (operand * op, iCode * ic, bool result, bool useDP2) +{ + asmop *aop; + symbol *sym; + int i; + + if (!op) + return; + + /* if this a literal */ + if (IS_OP_LITERAL (op)) + { + op->aop = aop = newAsmop (AOP_LIT); + aop->aopu.aop_lit = op->operand.valOperand; + aop->size = getSize (operandType (op)); + return; + } + + /* if already has a asmop then continue */ + if (op->aop) + { + if ((op->aop->type == AOP_DPTR && useDP2) + || (op->aop->type == AOP_DPTR2 && !useDP2)) + op->aop = NULL; + else + { + op->aop->allocated++; + return; + } + } + + /* if the underlying symbol has a aop */ + if (IS_SYMOP (op) && OP_SYMBOL (op)->aop) + { + op->aop = OP_SYMBOL (op)->aop; + if ((op->aop->type == AOP_DPTR && useDP2) + || (op->aop->type == AOP_DPTR2 && !useDP2)) + op->aop = NULL; + else + { + op->aop->allocated++; + return; + } + } + + /* if this is a true symbol */ + if (IS_TRUE_SYMOP (op)) + { + op->aop = aopForSym (ic, OP_SYMBOL (op), result, useDP2); + return; + } + + /* this is a temporary : this has + only five choices : + a) register + b) spillocation + c) rematerialize + d) conditional + e) can be a return use only */ + + sym = OP_SYMBOL (op); + + /* if the type is a conditional */ + if (sym->regType == REG_CND) + { + aop = op->aop = sym->aop = newAsmop (AOP_CRY); + aop->size = 0; + return; + } + + /* if it is spilt then two situations + a) is rematerialize + b) has a spill location */ + if (sym->isspilt || sym->nRegs == 0) + { + + /* rematerialize it NOW */ + if (sym->remat) + { + sym->aop = op->aop = aop = aopForRemat (sym); + aop->size = getSize (sym->type); + return; + } + + if (sym->accuse) + { + int i; + aop = op->aop = sym->aop = newAsmop (AOP_ACC); + aop->size = getSize (sym->type); + for (i = 0; i < 2; i++) + aop->aopu.aop_str[i] = accUse[i]; + return; + } + + if (sym->ruonly) + { + unsigned i; + + if (useDP2) + { + /* a AOP_STR uses DPTR, but DPTR is already in use; + * we're just hosed. + */ + werror(E_INTERNAL_ERROR,__FILE__,__LINE__,"AOP_STR with DPTR in use!"); + } + + aop = op->aop = sym->aop = newAsmop (AOP_STR); + aop->size = getSize (sym->type); + for (i = 0; i < fReturnSizeDS390; i++) + aop->aopu.aop_str[i] = fReturn[i]; + return; + } + + if (sym->dptr) { /* has been allocated to a DPTRn */ + aop = op->aop = sym->aop = newAsmop (AOP_DPTRn); + aop->size = getSize (sym->type); + aop->aopu.dptr = sym->dptr; + return ; + } + + if (sym->usl.spillLoc) + { + asmop *oldAsmOp = NULL; + + if (getSize(sym->type) != getSize(sym->usl.spillLoc->type)) + { + /* force a new aop if sizes differ */ + oldAsmOp = sym->usl.spillLoc->aop; + sym->usl.spillLoc->aop = NULL; + } + sym->aop = op->aop = aop = + aopForSym (ic, sym->usl.spillLoc, result, useDP2); + if (getSize(sym->type) != getSize(sym->usl.spillLoc->type)) + { + /* Don't reuse the new aop, go with the last one */ + sym->usl.spillLoc->aop = oldAsmOp; + } + aop->size = getSize (sym->type); + return; + } + + /* else must be a dummy iTemp */ + sym->aop = op->aop = aop = newAsmop (AOP_DUMMY); + aop->size = getSize (sym->type); + return; + } + + /* if the type is a bit register */ + if (sym->regType == REG_BIT) + { + sym->aop = op->aop = aop = newAsmop (AOP_CRY); + aop->size = sym->nRegs;//1??? + aop->aopu.aop_reg[0] = sym->regs[0]; + aop->aopu.aop_dir = sym->regs[0]->name; + return; + } + + /* must be in a register */ + sym->aop = op->aop = aop = newAsmop (AOP_REG); + aop->size = sym->nRegs; + for (i = 0; i < sym->nRegs; i++) + aop->aopu.aop_reg[i] = sym->regs[i]; +} + +/*-----------------------------------------------------------------*/ +/* freeAsmop - free up the asmop given to an operand */ +/*-----------------------------------------------------------------*/ +static void +freeAsmop (operand * op, asmop * aaop, iCode * ic, bool pop) +{ + asmop *aop; + + if (!op) + aop = aaop; + else + aop = op->aop; + + if (!aop) + return; + + aop->allocated--; + + if (aop->allocated) + goto dealloc; + + /* depending on the asmop type only three cases need work + AOP_R0, AOP_R1 & AOP_STK */ + switch (aop->type) + { + case AOP_R0: + if (_G.r0Pushed) + { + if (pop) + { + emitcode ("pop", "ar0"); + _G.r0Pushed--; + } + } + bitVectUnSetBit (ic->rUsed, R0_IDX); + break; + + case AOP_R1: + if (_G.r1Pushed) + { + if (pop) + { + emitcode ("pop", "ar1"); + _G.r1Pushed--; + } + } + bitVectUnSetBit (ic->rUsed, R1_IDX); + break; + + case AOP_STK: + { + int sz = aop->size; + int stk = aop->aopu.aop_stk + aop->size; + bitVectUnSetBit (ic->rUsed, R0_IDX); + bitVectUnSetBit (ic->rUsed, R1_IDX); + + getFreePtr (ic, &aop, FALSE); + + if (options.stack10bit) + { + /* I'm not sure what to do here yet... */ + /* #STUB */ + fprintf (stderr, + "*** Warning: probably generating bad code for " + "10 bit stack mode.\n"); + } + + if (stk) + { + emitcode ("mov", "a,_bp"); + emitcode ("add", "a,#!constbyte", ((char) stk) & 0xff); + emitcode ("mov", "%s,a", aop->aopu.aop_ptr->name); + } + else + { + emitcode ("mov", "%s,_bp", aop->aopu.aop_ptr->name); + } + + while (sz--) + { + emitcode ("pop", "acc"); + emitcode ("mov", "@%s,a", aop->aopu.aop_ptr->name); + if (!sz) + break; + emitcode ("dec", "%s", aop->aopu.aop_ptr->name); + } + op->aop = aop; + freeAsmop (op, NULL, ic, TRUE); + if (_G.r1Pushed) + { + emitcode ("pop", "ar1"); + _G.r1Pushed--; + } + if (_G.r0Pushed) + { + emitcode ("pop", "ar0"); + _G.r0Pushed--; + } + } + case AOP_DPTR2: + if (_G.dptr1InUse) { + emitcode ("pop","dpx1"); + emitcode ("pop","dph1"); + emitcode ("pop","dpl1"); + } + break; + case AOP_DPTR: + if (_G.dptrInUse) { + emitcode ("pop","dpx"); + emitcode ("pop","dph"); + emitcode ("pop","dpl"); + } + break; + } + +dealloc: + /* all other cases just dealloc */ + if (op) + { + op->aop = NULL; + if (IS_SYMOP (op)) + { + OP_SYMBOL (op)->aop = NULL; + /* if the symbol has a spill */ + if (SPIL_LOC (op)) + SPIL_LOC (op)->aop = NULL; + } + } +} + +#define DEFAULT_ACC_WARNING 0 +static int saveAccWarn = DEFAULT_ACC_WARNING; + + +/*-----------------------------------------------------------------*/ +/* aopGetUsesAcc - indicates ahead of time whether aopGet() will */ +/* clobber the accumulator */ +/*-----------------------------------------------------------------*/ +static bool +aopGetUsesAcc (operand * oper, int offset) +{ + asmop * aop = AOP (oper); + + if (offset > (aop->size - 1)) + return FALSE; + + switch (aop->type) + { + + case AOP_R0: + case AOP_R1: + if (aop->paged) + return TRUE; + return FALSE; + case AOP_DPTR: + case AOP_DPTR2: + case AOP_DPTRn: + return TRUE; + case AOP_IMMD: + return FALSE; + case AOP_DIR: + return FALSE; + case AOP_REG: + wassert(strcmp(aop->aopu.aop_reg[offset]->name, "a")); + return FALSE; + case AOP_CRY: + return TRUE; + case AOP_ACC: + if (offset) + return FALSE; + return TRUE; + case AOP_LIT: + return FALSE; + case AOP_STR: + if (strcmp (aop->aopu.aop_str[offset], "a") == 0) + return TRUE; + return FALSE; + case AOP_DUMMY: + return FALSE; + default: + /* Error case --- will have been caught already */ + wassert(0); + return FALSE; + } +} + +/*-------------------------------------------------------------------*/ +/* aopGet - for fetching value of the aop */ +/* */ +/* Set saveAcc to NULL if you are sure it is OK to clobber the value */ +/* in the accumulator. Set it to the name of a free register */ +/* if acc must be preserved; the register will be used to preserve */ +/* acc temporarily and to return the result byte. */ +/*-------------------------------------------------------------------*/ +static char * +aopGet (operand * oper, + int offset, + bool bit16, + bool dname, + char *saveAcc) +{ + asmop * aop = AOP (oper); + + /* offset is greater than + size then zero */ + if (offset > (aop->size - 1) && + aop->type != AOP_LIT) + return zero; + + /* depending on type */ + switch (aop->type) + { + case AOP_DUMMY: + return zero; + + case AOP_R0: + case AOP_R1: + /* if we need to increment it */ + while (offset > aop->coff) + { + emitcode ("inc", "%s", aop->aopu.aop_ptr->name); + aop->coff++; + } + + while (offset < aop->coff) + { + emitcode ("dec", "%s", aop->aopu.aop_ptr->name); + aop->coff--; + } + + aop->coff = offset; + if (aop->paged) + { + emitcode ("movx", "a,@%s", aop->aopu.aop_ptr->name); + return (dname ? "acc" : "a"); + } + SNPRINTF (buffer, sizeof(buffer), "@%s", aop->aopu.aop_ptr->name); + return Safe_strdup(buffer); + + case AOP_DPTRn: + assert(offset <= 3); + return dptrn[aop->aopu.dptr][offset]; + + case AOP_DPTR: + case AOP_DPTR2: + + if (aop->type == AOP_DPTR2) + { + genSetDPTR (1); + } + + if (saveAcc) + { + TR_AP("#1"); +// if (aop->type != AOP_DPTR2) +// { +// if (saveAccWarn) { fprintf(stderr, "saveAcc for DPTR...\n"); } +// emitcode(";", "spanky: saveAcc for DPTR"); +// } + + emitcode ("xch", "a, %s", saveAcc); + } + + _flushLazyDPS (); + + while (offset > aop->coff) + { + emitcode ("inc", "dptr"); + aop->coff++; + } + + while (offset < aop->coff) + { + emitcode ("lcall", "__decdptr"); + aop->coff--; + } + + aop->coff = offset; + if (aop->code) + { + emitcode ("clr", "a"); + emitcode ("movc", "a,@a+dptr"); + } + else + { + emitcode ("movx", "a,@dptr"); + } + + if (aop->type == AOP_DPTR2) + { + genSetDPTR (0); + } + + if (saveAcc) + { + TR_AP("#2"); + emitcode ("xch", "a, %s", saveAcc); +// if (strcmp(saveAcc, "_ap")) +// { +// emitcode(";", "spiffy: non _ap return from aopGet."); +// } + + return saveAcc; + } + return (dname ? "acc" : "a"); + + case AOP_IMMD: + if (aop->aopu.aop_immd.from_cast_remat && (offset == (aop->size-1))) + { + SNPRINTF(buffer, sizeof(buffer), + "%s",aop->aopu.aop_immd.aop_immd2); + } + else if (bit16) + { + SNPRINTF(buffer, sizeof(buffer), + "#%s", aop->aopu.aop_immd.aop_immd1); + } + else if (offset) + { + switch (offset) { + case 1: + tsprintf(buffer, sizeof(buffer), + "#!his",aop->aopu.aop_immd.aop_immd1); + break; + case 2: + tsprintf(buffer, sizeof(buffer), + "#!hihis",aop->aopu.aop_immd.aop_immd1); + break; + case 3: + tsprintf(buffer, sizeof(buffer), + "#!hihihis",aop->aopu.aop_immd.aop_immd1); + break; + default: /* should not need this (just in case) */ + SNPRINTF (buffer, sizeof(buffer), + "#(%s >> %d)", + aop->aopu.aop_immd.aop_immd1, + offset * 8); + } + } + else + { + SNPRINTF (buffer, sizeof(buffer), + "#%s", + aop->aopu.aop_immd.aop_immd1); + } + return Safe_strdup(buffer); + + case AOP_DIR: + if (SPEC_SCLS (getSpec (operandType (oper))) == S_SFR && offset) + { + SNPRINTF (buffer, sizeof(buffer), + "(%s >> %d)", + aop->aopu.aop_dir, offset * 8); + } + else if (offset) + { + SNPRINTF (buffer, sizeof(buffer), + "(%s + %d)", + aop->aopu.aop_dir, + offset); + } + else + { + SNPRINTF (buffer, sizeof(buffer), + "%s", + aop->aopu.aop_dir); + } + + return Safe_strdup(buffer); + + case AOP_REG: + if (dname) + return aop->aopu.aop_reg[offset]->dname; + else + return aop->aopu.aop_reg[offset]->name; + + case AOP_CRY: + emitcode ("mov", "c,%s", aop->aopu.aop_dir); + emitcode ("clr", "a"); + emitcode ("rlc", "a"); + return (dname ? "acc" : "a"); + + case AOP_ACC: + if (!offset && dname) + return "acc"; + return aop->aopu.aop_str[offset]; + + case AOP_LIT: + return aopLiteral (aop->aopu.aop_lit, offset); + + case AOP_STR: + aop->coff = offset; + if (strcmp (aop->aopu.aop_str[offset], "a") == 0 && + dname) + return "acc"; + + return aop->aopu.aop_str[offset]; + + } + + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "aopget got unsupported aop->type"); + exit (1); + + return NULL; // not reached, but makes compiler happy. +} + +/*-----------------------------------------------------------------*/ +/* aopPutUsesAcc - indicates ahead of time whether aopPut() will */ +/* clobber the accumulator */ +/*-----------------------------------------------------------------*/ +static bool +aopPutUsesAcc (operand * oper, const char *s, int offset) +{ + asmop * aop = AOP (oper); + + if (offset > (aop->size - 1)) + return FALSE; + + switch (aop->type) + { + case AOP_DUMMY: + return TRUE; + case AOP_DIR: + return FALSE; + case AOP_REG: + wassert(strcmp(aop->aopu.aop_reg[offset]->name, "a")); + return FALSE; + case AOP_DPTRn: + return FALSE; + case AOP_DPTR: + case AOP_DPTR2: + return TRUE; + case AOP_R0: + case AOP_R1: + return ((aop->paged) || (*s == '@')); + case AOP_STK: + return (*s == '@'); + case AOP_CRY: + return (!aop->aopu.aop_dir || strcmp(s, aop->aopu.aop_dir)); + case AOP_STR: + return FALSE; + case AOP_IMMD: + return FALSE; + case AOP_ACC: + return FALSE; + default: + /* Error case --- will have been caught already */ + wassert(0); + return FALSE; + } +} + +/*-----------------------------------------------------------------*/ +/* aopPut - puts a string for a aop and indicates if acc is in use */ +/*-----------------------------------------------------------------*/ +static bool +aopPut (operand * result, const char *s, int offset) +{ + bool bvolatile = isOperandVolatile (result, FALSE); + bool accuse = FALSE; + asmop * aop = AOP (result); + const char *d = NULL; + + if (aop->size && offset > (aop->size - 1)) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "aopPut got offset > aop->size"); + exit (1); + } + + /* will assign value to value */ + /* depending on where it is ofcourse */ + switch (aop->type) + { + case AOP_DUMMY: + MOVA (s); /* read s in case it was volatile */ + accuse = TRUE; + break; + + case AOP_DIR: + if (SPEC_SCLS (getSpec (operandType (result))) == S_SFR && offset) + { + SNPRINTF (buffer, sizeof(buffer), + "(%s >> %d)", + aop->aopu.aop_dir, offset * 8); + } + else if (offset) + { + SNPRINTF (buffer, sizeof(buffer), + "(%s + %d)", + aop->aopu.aop_dir, offset); + } + else + { + SNPRINTF (buffer, sizeof(buffer), + "%s", + aop->aopu.aop_dir); + } + + if (strcmp (buffer, s) || bvolatile) + { + emitcode ("mov", "%s,%s", buffer, s); + } + if (!strcmp (buffer, "acc")) + { + accuse = TRUE; + } + break; + + case AOP_REG: + if (strcmp (aop->aopu.aop_reg[offset]->name, s) != 0 && + strcmp (aop->aopu.aop_reg[offset]->dname, s) != 0) + { + if (*s == '@' || + strcmp (s, "r0") == 0 || + strcmp (s, "r1") == 0 || + strcmp (s, "r2") == 0 || + strcmp (s, "r3") == 0 || + strcmp (s, "r4") == 0 || + strcmp (s, "r5") == 0 || + strcmp (s, "r6") == 0 || + strcmp (s, "r7") == 0) + { + emitcode ("mov", "%s,%s", + aop->aopu.aop_reg[offset]->dname, s); + } + else + { + emitcode ("mov", "%s,%s", + aop->aopu.aop_reg[offset]->name, s); + } + } + break; + + case AOP_DPTRn: + emitcode ("mov","%s,%s",dptrn[aop->aopu.dptr][offset],s); + break; + + case AOP_DPTR: + case AOP_DPTR2: + + if (aop->type == AOP_DPTR2) + { + genSetDPTR (1); + } + _flushLazyDPS (); + + if (aop->code) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "aopPut writing to code space"); + exit (1); + } + + while (offset > aop->coff) + { + aop->coff++; + emitcode ("inc", "dptr"); + } + + while (offset < aop->coff) + { + aop->coff--; + emitcode ("lcall", "__decdptr"); + } + + aop->coff = offset; + + /* if not in accumulator */ + MOVA (s); + + emitcode ("movx", "@dptr,a"); + + if (aop->type == AOP_DPTR2) + { + genSetDPTR (0); + } + break; + + case AOP_R0: + case AOP_R1: + while (offset > aop->coff) + { + aop->coff++; + emitcode ("inc", "%s", aop->aopu.aop_ptr->name); + } + while (offset < aop->coff) + { + aop->coff--; + emitcode ("dec", "%s", aop->aopu.aop_ptr->name); + } + aop->coff = offset; + + if (aop->paged) + { + MOVA (s); + emitcode ("movx", "@%s,a", aop->aopu.aop_ptr->name); + } + else if (*s == '@') + { + MOVA (s); + emitcode ("mov", "@%s,a", aop->aopu.aop_ptr->name); + } + else if (strcmp (s, "r0") == 0 || + strcmp (s, "r1") == 0 || + strcmp (s, "r2") == 0 || + strcmp (s, "r3") == 0 || + strcmp (s, "r4") == 0 || + strcmp (s, "r5") == 0 || + strcmp (s, "r6") == 0 || + strcmp (s, "r7") == 0) + { + char buffer[10]; + SNPRINTF (buffer, sizeof(buffer), "a%s", s); + emitcode ("mov", "@%s,%s", + aop->aopu.aop_ptr->name, buffer); + } + else + { + emitcode ("mov", "@%s,%s", aop->aopu.aop_ptr->name, s); + } + break; + + case AOP_STK: + if (strcmp (s, "a") == 0) + { + emitcode ("push", "acc"); + } + else if (*s=='@') + { + MOVA(s); + emitcode ("push", "acc"); + } + else if (strcmp (s, "r0") == 0 || + strcmp (s, "r1") == 0 || + strcmp (s, "r2") == 0 || + strcmp (s, "r3") == 0 || + strcmp (s, "r4") == 0 || + strcmp (s, "r5") == 0 || + strcmp (s, "r6") == 0 || + strcmp (s, "r7") == 0) + { + char buffer[10]; + SNPRINTF (buffer, sizeof(buffer), "a%s", s); + emitcode ("push", buffer); + } + else + { + emitcode ("push", s); + } + + break; + + case AOP_CRY: + // destination is carry for return-use-only + d = (IS_OP_RUONLY (result)) ? "c" : aop->aopu.aop_dir; + + // source is no literal and not in carry + if ((s != zero) && (s != one) && strcmp (s, "c")) + { + MOVA (s); + /* set C, if a >= 1 */ + emitcode ("add", "a,#!constbyte",0xff); + s = "c"; + } + // now source is zero, one or carry + + /* if result no bit variable */ + if (!d) + { + if (!strcmp (s, "c")) + { + /* inefficient: move carry into A and use jz/jnz */ + emitcode ("clr", "a"); + emitcode ("rlc", "a"); + accuse = TRUE; + } + else + { + MOVA (s); + accuse = TRUE; + } + } + else if (s == zero) + emitcode ("clr", "%s", d); + else if (s == one) + emitcode ("setb", "%s", d); + else if (strcmp (s, d)) + emitcode ("mov", "%s,c", d); + break; + + case AOP_STR: + aop->coff = offset; + if (strcmp (aop->aopu.aop_str[offset], s) || bvolatile) + emitcode ("mov", "%s,%s", aop->aopu.aop_str[offset], s); + break; + + case AOP_ACC: + accuse = TRUE; + aop->coff = offset; + if (!offset && (strcmp (s, "acc") == 0) && !bvolatile) + break; + + if (strcmp (aop->aopu.aop_str[offset], s) && !bvolatile) + emitcode ("mov", "%s,%s", aop->aopu.aop_str[offset], s); + break; + + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "aopPut got unsupported aop->type"); + exit (1); + } + + return accuse; +} + + +/*--------------------------------------------------------------------*/ +/* reAdjustPreg - points a register back to where it should (coff==0) */ +/*--------------------------------------------------------------------*/ +static void +reAdjustPreg (asmop * aop) +{ + if ((aop->coff==0) || (aop->size <= 1)) + return; + + switch (aop->type) + { + case AOP_R0: + case AOP_R1: + while (aop->coff--) + emitcode ("dec", "%s", aop->aopu.aop_ptr->name); + break; + case AOP_DPTR: + case AOP_DPTR2: + if (aop->type == AOP_DPTR2) + { + genSetDPTR (1); + _flushLazyDPS (); + } + while (aop->coff--) + { + emitcode ("lcall", "__decdptr"); + } + + if (aop->type == AOP_DPTR2) + { + genSetDPTR (0); + } + break; + } + aop->coff = 0; +} + +/*-----------------------------------------------------------------*/ +/* opIsGptr: returns non-zero if the passed operand is */ +/* a generic pointer type. */ +/*-----------------------------------------------------------------*/ +static int +opIsGptr (operand * op) +{ + if (op && IS_GENPTR (operandType (op)) && (AOP_SIZE (op) == GPTRSIZE)) + { + return 1; + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* getDataSize - get the operand data size */ +/*-----------------------------------------------------------------*/ +static int +getDataSize (operand * op) +{ + int size = AOP_SIZE (op); + + if (size == GPTRSIZE) + { + sym_link *type = operandType (op); + if (IS_GENPTR (type)) + { + /* generic pointer; arithmetic operations + * should ignore the high byte (pointer type). + */ + size--; + } + } + return size; +} + +/*-----------------------------------------------------------------*/ +/* outAcc - output Acc */ +/*-----------------------------------------------------------------*/ +static void +outAcc (operand * result) +{ + int size, offset; + size = getDataSize (result); + if (size) + { + aopPut (result, "a", 0); + size--; + offset = 1; + /* unsigned or positive */ + while (size--) + { + aopPut (result, zero, offset++); + } + } +} + +/*-----------------------------------------------------------------*/ +/* outBitC - output a bit C */ +/*-----------------------------------------------------------------*/ +static void +outBitC (operand * result) +{ + /* if the result is bit */ + if (AOP_TYPE (result) == AOP_CRY) + { + aopPut (result, "c", 0); + } + else + { + emitcode ("clr", "a"); + emitcode ("rlc", "a"); + outAcc (result); + } +} + +/*-----------------------------------------------------------------*/ +/* toBoolean - emit code for orl a,operator(sizeop) */ +/*-----------------------------------------------------------------*/ +static void +toBoolean (operand * oper) +{ + int size = AOP_SIZE (oper) - 1; + int offset = 1; + bool pushedB; + + /* The generic part of a generic pointer should + * not participate in it's truth value. + * + * i.e. 0x10000000 is zero. + */ + if (opIsGptr (oper)) + { + D (emitcode (";", "toBoolean: generic ptr special case.")); + size--; + } + + _startLazyDPSEvaluation (); + MOVA (aopGet (oper, 0, FALSE, FALSE, NULL)); + if (AOP_NEEDSACC (oper) && size && (AOP (oper)->type != AOP_ACC)) + { + pushedB = pushB (); + emitcode("mov", "b,a"); + while (--size) + { + MOVA (aopGet (oper, offset++, FALSE, FALSE, NULL)); + emitcode ("orl", "b,a"); + } + MOVA (aopGet (oper, offset++, FALSE, FALSE, NULL)); + emitcode ("orl", "a,b"); + popB (pushedB); + } + else + { + while (size--) + { + emitcode ("orl", "a,%s", + aopGet (oper, offset++, FALSE, FALSE, NULL)); + } + } + _endLazyDPSEvaluation (); +} + + +/*-----------------------------------------------------------------*/ +/* genNot - generate code for ! operation */ +/*-----------------------------------------------------------------*/ +static void +genNot (iCode * ic) +{ + symbol *tlbl; + + D (emitcode (";", "genNot")); + + /* assign asmOps to operand & result */ + aopOp (IC_LEFT (ic), ic, FALSE, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE, AOP_USESDPTR(IC_LEFT (ic))); + + /* if in bit space then a special case */ + if (AOP_TYPE (IC_LEFT (ic)) == AOP_CRY) + { + /* if left==result then cpl bit */ + if (sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic)))) + { + emitcode ("cpl", "%s", IC_LEFT (ic)->aop->aopu.aop_dir); + } + else + { + emitcode ("mov", "c,%s", IC_LEFT (ic)->aop->aopu.aop_dir); + emitcode ("cpl", "c"); + outBitC (IC_RESULT (ic)); + } + goto release; + } + + toBoolean (IC_LEFT (ic)); + + /* set C, if a == 0 */ + tlbl = newiTempLabel (NULL); + emitcode ("cjne", "a,#0x01,!tlabel", tlbl->key + 100); + emitLabel (tlbl); + outBitC (IC_RESULT (ic)); + +release: + /* release the aops */ + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + freeAsmop (IC_LEFT (ic), NULL, ic, (RESULTONSTACK (ic) ? 0 : 1)); +} + + +/*-----------------------------------------------------------------*/ +/* genCpl - generate code for complement */ +/*-----------------------------------------------------------------*/ +static void +genCpl (iCode * ic) +{ + int offset = 0; + int size; + symbol *tlbl; + sym_link *letype = getSpec (operandType (IC_LEFT (ic))); + + D(emitcode (";", "genCpl")); + + /* assign asmOps to operand & result */ + aopOp (IC_LEFT (ic), ic, FALSE, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE, AOP_USESDPTR(IC_LEFT (ic))); + + /* special case if in bit space */ + if (AOP_TYPE (IC_RESULT (ic)) == AOP_CRY) + { + char *l; + + if (AOP_TYPE (IC_LEFT (ic)) == AOP_CRY || + (SPEC_USIGN (letype) && IS_CHAR (letype))) + { + /* promotion rules are responsible for this strange result: + bit -> int -> ~int -> bit + uchar -> int -> ~int -> bit + */ + emitcode ("setb", "%s", IC_RESULT (ic)->aop->aopu.aop_dir); + goto release; + } + + tlbl=newiTempLabel(NULL); + l = aopGet (IC_LEFT (ic), offset++, FALSE, FALSE, NULL); + if ((AOP_TYPE (IC_LEFT (ic)) == AOP_ACC && offset == 0) || + AOP_TYPE (IC_LEFT (ic)) == AOP_REG || + IS_AOP_PREG (IC_LEFT (ic))) + { + emitcode ("cjne", "%s,#0xFF,%05d$", l, tlbl->key + 100); + } + else + { + MOVA (l); + emitcode ("cjne", "a,#0xFF,%05d$", tlbl->key + 100); + } + emitLabel (tlbl); + outBitC (IC_RESULT(ic)); + goto release; + } + + size = AOP_SIZE (IC_RESULT (ic)); + _startLazyDPSEvaluation (); + while (size--) + { + char *l = aopGet (IC_LEFT (ic), offset, FALSE, FALSE, NULL); + MOVA (l); + emitcode ("cpl", "a"); + aopPut (IC_RESULT (ic), "a", offset++); + } + _endLazyDPSEvaluation (); + + +release: + /* release the aops */ + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + freeAsmop (IC_LEFT (ic), NULL, ic, (RESULTONSTACK (ic) ? 0 : 1)); +} + +/*-----------------------------------------------------------------*/ +/* genUminusFloat - unary minus for floating points */ +/*-----------------------------------------------------------------*/ +static void +genUminusFloat (operand * op, operand * result) +{ + int size, offset = 0; + char *l; + + D (emitcode (";", "genUminusFloat")); + + /* for this we just copy and then flip the bit */ + + _startLazyDPSEvaluation (); + size = AOP_SIZE (op) - 1; + + while (size--) + { + aopPut (result, + aopGet (op, offset, FALSE, FALSE, NULL), + offset); + offset++; + } + + l = aopGet (op, offset, FALSE, FALSE, NULL); + MOVA (l); + + emitcode ("cpl", "acc.7"); + aopPut (result, "a", offset); + _endLazyDPSEvaluation (); +} + +/*-----------------------------------------------------------------*/ +/* genUminus - unary minus code generation */ +/*-----------------------------------------------------------------*/ +static void +genUminus (iCode * ic) +{ + int offset, size; + sym_link *optype; + + D (emitcode (";", "genUminus")); + + /* assign asmops */ + aopOp (IC_LEFT (ic), ic, FALSE, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE, (AOP_TYPE(IC_LEFT (ic)) == AOP_DPTR)); + + /* if both in bit space then special + case */ + if (AOP_TYPE (IC_RESULT (ic)) == AOP_CRY && + AOP_TYPE (IC_LEFT (ic)) == AOP_CRY) + { + + emitcode ("mov", "c,%s", IC_LEFT (ic)->aop->aopu.aop_dir); + emitcode ("cpl", "c"); + emitcode ("mov", "%s,c", IC_RESULT (ic)->aop->aopu.aop_dir); + goto release; + } + + optype = operandType (IC_LEFT (ic)); + + /* if float then do float stuff */ + if (IS_FLOAT (optype)) + { + genUminusFloat (IC_LEFT (ic), IC_RESULT (ic)); + goto release; + } + + /* otherwise subtract from zero */ + size = AOP_SIZE (IC_LEFT (ic)); + offset = 0; + _startLazyDPSEvaluation (); + while (size--) + { + char *l = aopGet (IC_LEFT (ic), offset, FALSE, FALSE, NULL); + if (!strcmp (l, "a")) + { + if (offset == 0) + SETC; + emitcode ("cpl", "a"); + emitcode ("addc", "a,#0x00"); + } + else + { + if (offset == 0) + CLRC; + emitcode ("clr", "a"); + emitcode ("subb", "a,%s", l); + } + aopPut (IC_RESULT (ic), "a", offset++); + } + _endLazyDPSEvaluation (); + + /* if any remaining bytes in the result */ + /* we just need to propagate the sign */ + if ((size = (AOP_SIZE (IC_RESULT (ic)) - AOP_SIZE (IC_LEFT (ic))))) + { + emitcode ("rlc", "a"); + emitcode ("subb", "a,acc"); + while (size--) + aopPut (IC_RESULT (ic), "a", offset++); + } + +release: + /* release the aops */ + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + freeAsmop (IC_LEFT (ic), NULL, ic, (RESULTONSTACK (ic) ? 0 : 1)); +} + +/*-----------------------------------------------------------------*/ +/* savermask - saves registers in the mask */ +/*-----------------------------------------------------------------*/ +static void savermask(bitVect *rs_mask) +{ + int i; + + if (options.useXstack) + { + if (bitVectBitValue (rs_mask, R0_IDX)) + emitcode ("mov", "b,r0"); + emitcode ("mov", "r0,%s", spname); + for (i = 0; i < ds390_nRegs; i++) + { + if (bitVectBitValue (rs_mask, i)) + { + if (i == R0_IDX) + emitcode ("mov", "a,b"); + else + emitcode ("mov", "a,%s", REG_WITH_INDEX (i)->name); + emitcode ("movx", "@r0,a"); + emitcode ("inc", "r0"); + } + } + emitcode ("mov", "%s,r0", spname); + if (bitVectBitValue (rs_mask, R0_IDX)) + emitcode ("mov", "r0,b"); + } + else + { + bool bits_pushed = FALSE; + for (i = 0; i < ds390_nRegs; i++) + { + if (bitVectBitValue (rs_mask, i)) + { + bits_pushed = pushReg (i, bits_pushed); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* saveRegisters - will look for a call and save the registers */ +/*-----------------------------------------------------------------*/ +static void +saveRegisters (iCode * lic) +{ + iCode *ic; + bitVect *rsave; + + /* look for call */ + for (ic = lic; ic; ic = ic->next) + if (ic->op == CALL || ic->op == PCALL) + break; + + if (!ic) + { + fprintf (stderr, "found parameter push with no function call\n"); + return; + } + + /* if the registers have been saved already or don't need to be then + do nothing */ + if (ic->regsSaved + || (IS_SYMOP(IC_LEFT(ic)) && IFFUNC_ISNAKED(OP_SYM_TYPE(IC_LEFT(ic))) && !TARGET_IS_DS400) ) + return; + + /* special case if DPTR alive across a function call then must save it + even though callee saves */ + if (IS_SYMOP(IC_LEFT(ic)) && + IFFUNC_CALLEESAVES(OP_SYMBOL (IC_LEFT (ic))->type)) + { + int i; + rsave = newBitVect(ic->rMask->size); + for (i = DPL_IDX ; i <= B_IDX ; i++ ) { + if (bitVectBitValue(ic->rMask,i)) + rsave = bitVectSetBit(rsave,i); + } + rsave = bitVectCplAnd(rsave,ds390_rUmaskForOp (IC_RESULT(ic))); + } + else + { + /* save the registers in use at this time but skip the + ones for the result */ + rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic))); + } + ic->regsSaved = 1; + savermask(rsave); +} + +/*-----------------------------------------------------------------*/ +/* usavermask - restore registers with mask */ +/*-----------------------------------------------------------------*/ +static void unsavermask(bitVect *rs_mask) +{ + int i; + + if (options.useXstack) + { + emitcode ("mov", "r0,%s", spname); + for (i = ds390_nRegs; i >= 0; i--) + { + if (bitVectBitValue (rs_mask, i)) + { + regs * reg = REG_WITH_INDEX (i); + emitcode ("dec", "r0"); + emitcode ("movx", "a,@r0"); + if (i == R0_IDX) + { + emitcode ("push", "acc"); + } + else + { + emitcode ("mov", "%s,a", reg->name); + } + } + } + emitcode ("mov", "%s,r0", spname); + if (bitVectBitValue (rs_mask, R0_IDX)) + { + emitcode ("pop", "ar0"); + } + } + else + { + bool bits_popped = FALSE; + for (i = ds390_nRegs; i >= 0; i--) + { + if (bitVectBitValue (rs_mask, i)) + { + bits_popped = popReg (i, bits_popped); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* unsaveRegisters - pop the pushed registers */ +/*-----------------------------------------------------------------*/ +static void +unsaveRegisters (iCode * ic) +{ + bitVect *rsave; + + if (IS_SYMOP(IC_LEFT (ic)) && + IFFUNC_CALLEESAVES(OP_SYMBOL (IC_LEFT (ic))->type)) { + int i; + rsave = newBitVect(ic->rMask->size); + for (i = DPL_IDX ; i <= B_IDX ; i++ ) { + if (bitVectBitValue(ic->rMask,i)) + rsave = bitVectSetBit(rsave,i); + } + rsave = bitVectCplAnd(rsave,ds390_rUmaskForOp (IC_RESULT(ic))); + } else { + /* restore the registers in use at this time but skip the + ones for the result */ + rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic))); + } + unsavermask(rsave); +} + + +/*-----------------------------------------------------------------*/ +/* pushSide - */ +/*-----------------------------------------------------------------*/ +static void +pushSide (operand * oper, int size, iCode * ic) +{ + int offset = 0; + int nPushed = _G.r0Pushed + _G.r1Pushed; + + aopOp (oper, ic, FALSE, FALSE); + + if (nPushed != _G.r0Pushed + _G.r1Pushed) + { + while (offset < size) + { + char *l = aopGet (oper, offset, FALSE, TRUE, NULL); + emitcode ("mov", "%s,%s", fReturn[offset++], l); + } + freeAsmop (oper, NULL, ic, TRUE); + offset = 0; + while (offset < size) + { + emitcode ("push", "%s", fReturn[offset++]); + } + return; + } + + _startLazyDPSEvaluation (); + while (size--) + { + char *l = aopGet (oper, offset++, FALSE, TRUE, NULL); + if (AOP_TYPE (oper) != AOP_REG && + AOP_TYPE (oper) != AOP_DIR && + strcmp (l, "a")) + { + MOVA (l); + emitcode ("push", "acc"); + } + else + { + emitcode ("push", "%s", l); + } + } + _endLazyDPSEvaluation (); + freeAsmop (oper, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* assignResultValue - also indicates if acc is in use afterwards */ +/*-----------------------------------------------------------------*/ +static bool +assignResultValue (operand * oper, operand * func) +{ + int offset = 0; + unsigned size = AOP_SIZE (oper); + bool accuse = FALSE; + bool pushedA = FALSE; + + if (func && IS_BIT (OP_SYM_ETYPE (func))) + { + outBitC (oper); + return FALSE; + } + + if (size == fReturnSizeDS390) + { + /* I don't think this case can ever happen... */ + /* ACC is the last part of this. If writing the result + * uses ACC, we must preserve it. + */ + if (AOP_NEEDSACC(oper)) + { + emitcode(";", "assignResultValue special case for ACC."); + emitcode("push", "acc"); + pushedA = TRUE; + size--; + } + } + + _startLazyDPSEvaluation (); + while (size--) + { + accuse |= aopPut (oper, fReturn[offset], offset); + offset++; + } + _endLazyDPSEvaluation (); + + if (pushedA) + { + emitcode ("pop", "acc"); + accuse |= aopPut (oper, "a", offset); + } + return accuse; +} + + +/*-----------------------------------------------------------------*/ +/* genXpush - pushes onto the external stack */ +/*-----------------------------------------------------------------*/ +static void +genXpush (iCode * ic) +{ + asmop *aop = newAsmop (0); + regs *r; + int size, offset = 0; + + D (emitcode (";", "genXpush")); + + aopOp (IC_LEFT (ic), ic, FALSE, FALSE); + r = getFreePtr (ic, &aop, FALSE); + + size = AOP_SIZE (IC_LEFT (ic)); + + if (size == 1) + { + MOVA (aopGet (IC_LEFT (ic), 0, FALSE, FALSE, NULL)); + emitcode ("mov", "%s,_spx", r->name); + emitcode ("inc", "_spx"); // allocate space first + emitcode ("movx", "@%s,a", r->name); + } + else + { + // allocate space first + emitcode ("mov", "%s,_spx", r->name); + MOVA (r->name); + emitcode ("add", "a,#%d", size); + emitcode ("mov", "_spx,a"); + + _startLazyDPSEvaluation (); + while (size--) + { + MOVA (aopGet (IC_LEFT (ic), offset++, FALSE, FALSE, NULL)); + emitcode ("movx", "@%s,a", r->name); + emitcode ("inc", "%s", r->name); + } + _endLazyDPSEvaluation (); + } + + freeAsmop (NULL, aop, ic, TRUE); + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genIpush - generate code for pushing this gets a little complex */ +/*-----------------------------------------------------------------*/ +static void +genIpush (iCode * ic) +{ + int size, offset = 0; + char *l; + char *prev = ""; + + D (emitcode (";", "genIpush")); + + /* if this is not a parm push : ie. it is spill push + and spill push is always done on the local stack */ + if (!ic->parmPush) + { + + /* and the item is spilt then do nothing */ + if (OP_SYMBOL (IC_LEFT (ic))->isspilt || OP_SYMBOL(IC_LEFT(ic))->dptr) + return; + + aopOp (IC_LEFT (ic), ic, FALSE, FALSE); + size = AOP_SIZE (IC_LEFT (ic)); + /* push it on the stack */ + _startLazyDPSEvaluation (); + while (size--) + { + l = aopGet (IC_LEFT (ic), offset++, FALSE, TRUE, NULL); + if (*l == '#') + { + MOVA (l); + l = "acc"; + } + emitcode ("push", "%s", l); + } + _endLazyDPSEvaluation (); + return; + } + + /* this is a parameter push: in this case we call + the routine to find the call and save those + registers that need to be saved */ + saveRegisters (ic); + + /* if use external stack then call the external + stack pushing routine */ + if (options.useXstack) + { + genXpush (ic); + return; + } + + /* then do the push */ + aopOp (IC_LEFT (ic), ic, FALSE, FALSE); + + // pushSide(IC_LEFT(ic), AOP_SIZE(IC_LEFT(ic))); + size = AOP_SIZE (IC_LEFT (ic)); + + _startLazyDPSEvaluation (); + while (size--) + { + l = aopGet (IC_LEFT (ic), offset++, FALSE, TRUE, NULL); + if (AOP_TYPE (IC_LEFT (ic)) != AOP_REG && + AOP_TYPE (IC_LEFT (ic)) != AOP_DIR && + strcmp (l, "acc")) + { + if (strcmp (l, prev) || *l == '@') + MOVA (l); + emitcode ("push", "acc"); + } + else + { + emitcode ("push", "%s", l); + } + prev = l; + } + _endLazyDPSEvaluation (); + + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genIpop - recover the registers: can happen only for spilling */ +/*-----------------------------------------------------------------*/ +static void +genIpop (iCode * ic) +{ + int size, offset; + + D (emitcode (";", "genIpop")); + + /* if the temp was not pushed then */ + if (OP_SYMBOL (IC_LEFT (ic))->isspilt || OP_SYMBOL (IC_LEFT (ic))->dptr) + return; + + aopOp (IC_LEFT (ic), ic, FALSE, FALSE); + size = AOP_SIZE (IC_LEFT (ic)); + offset = (size - 1); + _startLazyDPSEvaluation (); + while (size--) + { + emitcode ("pop", "%s", aopGet (IC_LEFT (ic), offset--, + FALSE, TRUE, NULL)); + } + _endLazyDPSEvaluation (); + + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* popForBranch - recover the spilt registers for a branch */ +/*-----------------------------------------------------------------*/ +static void +popForBranch (iCode * ic, bool markGenerated) +{ + while (ic && ic->op == IPOP) + { + genIpop (ic); + if (markGenerated) + ic->generated = 1; /* mark the icode as generated */ + ic = ic->next; + } +} + +/*-----------------------------------------------------------------*/ +/* saveRBank - saves an entire register bank on the stack */ +/*-----------------------------------------------------------------*/ +static void +saveRBank (int bank, iCode * ic, bool pushPsw) +{ + int i; + int count = 8 + (ds390_nBitRegs/8) + (pushPsw ? 1 : 0); + asmop *aop = NULL; + regs *r = NULL; + + if (options.useXstack) + { + if (!ic) + { + /* Assume r0 is available for use. */ + r = REG_WITH_INDEX (R0_IDX); + } + else + { + aop = newAsmop (0); + r = getFreePtr (ic, &aop, FALSE); + } + // allocate space first + emitcode ("mov", "%s,_spx", r->name); + MOVA (r->name); + emitcode ("add", "a,#%d", count); + emitcode ("mov", "_spx,a"); + } + + for (i = 0; i < 8; i++) /* only R0-R7 needs saving */ + { + if (options.useXstack) + { + emitcode ("mov", "a,(%s+%d)", + regs390[i].base, 8 * bank + regs390[i].offset); + emitcode ("movx", "@%s,a", r->name); + if (--count) + emitcode ("inc", "%s", r->name); + } + else + emitcode ("push", "(%s+%d)", + regs390[i].base, 8 * bank + regs390[i].offset); + } + + if (ds390_nBitRegs > 0) + { + if (options.useXstack) + { + emitcode ("mov", "a,bits"); + emitcode ("movx", "@%s,a", r->name); + if (--count) + emitcode ("inc", "%s", r->name); + } + else + { + emitcode ("push", "bits"); + } + BitBankUsed = 1; + } + + if (pushPsw) + { + if (options.useXstack) + { + emitcode ("mov", "a,psw"); + emitcode ("movx", "@%s,a", r->name); + } + else + { + emitcode ("push", "psw"); + } + + emitcode ("mov", "psw,#!constbyte", (bank << 3) & 0x00ff); + } + + if (aop) + { + freeAsmop (NULL, aop, ic, TRUE); + } + + if (ic) + { + ic->bankSaved = 1; + } +} + +/*-----------------------------------------------------------------*/ +/* unsaveRBank - restores the register bank from stack */ +/*-----------------------------------------------------------------*/ +static void +unsaveRBank (int bank, iCode * ic, bool popPsw) +{ + int i; + asmop *aop = NULL; + regs *r = NULL; + + if (options.useXstack) + { + if (!ic) + { + /* Assume r0 is available for use. */ + r = REG_WITH_INDEX (R0_IDX); + } + else + { + aop = newAsmop (0); + r = getFreePtr (ic, &aop, FALSE); + } + emitcode ("mov", "%s,_spx", r->name); + } + + if (popPsw) + { + if (options.useXstack) + { + emitcode ("dec", "%s", r->name); + emitcode ("movx", "a,@%s", r->name); + emitcode ("mov", "psw,a"); + } + else + { + emitcode ("pop", "psw"); + } + } + + if (ds390_nBitRegs > 0) + { + if (options.useXstack) + { + emitcode ("dec", "%s", r->name); + emitcode ("movx", "a,@%s", r->name); + emitcode ("mov", "bits,a"); + } + else + { + emitcode ("pop", "bits"); + } + } + + for (i = 7; i >= 0; i--) /* only R7-R0 needs to be popped */ + { + if (options.useXstack) + { + emitcode ("dec", "%s", r->name); + emitcode ("movx", "a,@%s", r->name); + emitcode ("mov", "(%s+%d),a", + regs390[i].base, 8 * bank + regs390[i].offset); + } + else + { + emitcode ("pop", "(%s+%d)", + regs390[i].base, 8 * bank + regs390[i].offset); + } + } + + if (options.useXstack) + { + emitcode ("mov", "_spx,%s", r->name); + } + + if (aop) + { + freeAsmop (NULL, aop, ic, TRUE); + } +} + +/*-----------------------------------------------------------------*/ +/* genSend - gen code for SEND */ +/*-----------------------------------------------------------------*/ +static void genSend(set *sendSet) +{ + iCode *sic; + int bit_count = 0; + int sendCount = 0 ; + static int rb1_count = 0; + + /* first we do all bit parameters */ + for (sic = setFirstItem (sendSet); sic; + sic = setNextItem (sendSet)) + { + if (sic->argreg > 12) + { + int bit = sic->argreg-13; + + aopOp (IC_LEFT (sic), sic, FALSE, + (AOP_IS_STR(IC_LEFT(sic)) ? FALSE : TRUE)); + + /* if left is a literal then + we know what the value is */ + if (AOP_TYPE (IC_LEFT (sic)) == AOP_LIT) + { + if (((int) operandLitValue (IC_LEFT (sic)))) + emitcode ("setb", "b[%d]", bit); + else + emitcode ("clr", "b[%d]", bit); + } + else if (AOP_TYPE (IC_LEFT (sic)) == AOP_CRY) + { + char *l = AOP (IC_LEFT (sic))->aopu.aop_dir; + if (strcmp (l, "c")) + emitcode ("mov", "c,%s", l); + emitcode ("mov", "b[%d],c", bit); + } + else + { + /* we need to or */ + toBoolean (IC_LEFT (sic)); + /* set C, if a >= 1 */ + emitcode ("add", "a,#0xff"); + emitcode ("mov", "b[%d],c", bit); + } + bit_count++; + BitBankUsed = 1; + + freeAsmop (IC_LEFT (sic), NULL, sic, TRUE); + } + } + + if (bit_count) + { + saveRegisters (setFirstItem (sendSet)); + emitcode ("mov", "bits,b"); + } + + /* then we do all other parameters */ + for (sic = setFirstItem (sendSet); sic; + sic = setNextItem (sendSet)) + { + if (sic->argreg <= 12) + { + int size, offset = 0; + + size = getSize (operandType (IC_LEFT (sic))); + D (emitcode (";", "genSend argreg = %d, size = %d ",sic->argreg,size)); + if (sendCount == 0) + { /* first parameter */ + // we know that dpl(hxb) is the result, so + rb1_count = 0 ; + _startLazyDPSEvaluation (); + if (size>1) + { + aopOp (IC_LEFT (sic), sic, FALSE, + (AOP_IS_STR(IC_LEFT(sic)) ? FALSE : TRUE)); + } + else + { + aopOp (IC_LEFT (sic), sic, FALSE, FALSE); + } + while (size--) + { + char *l = aopGet (IC_LEFT (sic), offset, FALSE, FALSE, NULL); + if (strcmp (l, fReturn[offset])) + { + emitcode ("mov", "%s,%s", fReturn[offset], l); + } + offset++; + } + _endLazyDPSEvaluation (); + freeAsmop (IC_LEFT (sic), NULL, sic, TRUE); + rb1_count =0; + } + else + { /* if more parameter in registers */ + aopOp (IC_LEFT (sic), sic, FALSE, TRUE); + while (size--) + { + emitcode ("mov","b1_%d,%s",rb1_count++, + aopGet (IC_LEFT (sic), offset, FALSE, FALSE, NULL)); + offset++; + } + freeAsmop (IC_LEFT (sic), NULL, sic, TRUE); + } + sendCount++; + } + } +} + +static void +adjustEsp(const char *reg) +{ + emitcode ("anl","%s,#3", reg); + if (TARGET_IS_DS400) + { + emitcode ("orl","%s,#!constbyte", + reg, + (options.stack_loc >> 8) & 0xff); + } +} + +/*-----------------------------------------------------------------*/ +/* selectRegBank - emit code to select the register bank */ +/*-----------------------------------------------------------------*/ +static void +selectRegBank (short bank, bool keepFlags) +{ + /* if f.e. result is in carry */ + if (keepFlags) + { + emitcode ("anl", "psw,#0xE7"); + if (bank) + emitcode ("orl", "psw,#0x%02x", (bank << 3) & 0xff); + } + else + { + emitcode ("mov", "psw,#0x%02x", (bank << 3) & 0xff); + } +} + +/*-----------------------------------------------------------------*/ +/* genCall - generates a call statement */ +/*-----------------------------------------------------------------*/ +static void +genCall (iCode * ic) +{ + sym_link *dtype; + sym_link *etype; + bool restoreBank = FALSE; + bool swapBanks = FALSE; + bool accuse = FALSE; + bool accPushed = FALSE; + bool resultInF0 = FALSE; + bool assignResultGenerated = FALSE; + + D (emitcode (";", "genCall")); + + /* if we are calling a not _naked function that is not using + the same register bank then we need to save the + destination registers on the stack */ + dtype = operandType (IC_LEFT (ic)); + etype = getSpec(dtype); + if (currFunc && dtype && (!IFFUNC_ISNAKED(dtype) || TARGET_IS_DS400) && + (FUNC_REGBANK (currFunc->type) != FUNC_REGBANK (dtype)) && + IFFUNC_ISISR (currFunc->type)) + { + if (!ic->bankSaved) + { + /* This is unexpected; the bank should have been saved in + * genFunction. + */ + saveRBank (FUNC_REGBANK (dtype), ic, FALSE); + restoreBank = TRUE; + } + swapBanks = TRUE; + } + + /* if caller saves & we have not saved then */ + if (!ic->regsSaved) + saveRegisters (ic); + + /* if send set is not empty then assign */ + /* We've saved all the registers we care about; + * therefore, we may clobber any register not used + * in the calling convention (i.e. anything not in + * fReturn. + */ + if (_G.sendSet) + { + if (IFFUNC_ISREENT(dtype)) { /* need to reverse the send set */ + genSend(reverseSet(_G.sendSet)); + } else { + genSend(_G.sendSet); + } + _G.sendSet = NULL; + } + + if (swapBanks) + { + emitcode ("mov", "psw,#!constbyte", + ((FUNC_REGBANK(dtype)) << 3) & 0xff); + } + + /* make the call */ + emitcode ("lcall", "%s", (OP_SYMBOL (IC_LEFT (ic))->rname[0] ? + OP_SYMBOL (IC_LEFT (ic))->rname : + OP_SYMBOL (IC_LEFT (ic))->name)); + + if (swapBanks) + { + selectRegBank (FUNC_REGBANK(currFunc->type), IS_BIT (etype)); + } + + /* if we need assign a result value */ + if ((IS_ITEMP (IC_RESULT (ic)) && + !IS_BIT (OP_SYM_ETYPE (IC_RESULT (ic))) && + (OP_SYMBOL (IC_RESULT (ic))->nRegs || + OP_SYMBOL (IC_RESULT (ic))->accuse || + OP_SYMBOL (IC_RESULT (ic))->spildir)) || + IS_TRUE_SYMOP (IC_RESULT (ic))) + { + if (isOperandInFarSpace (IC_RESULT (ic)) + && getSize (operandType (IC_RESULT (ic))) <= 2) + { + int size = getSize (operandType (IC_RESULT (ic))); + bool pushedB = FALSE; + + /* Special case for 1 or 2 byte return in far space. */ + MOVA (fReturn[0]); + if (size > 1) + { + pushedB = pushB (); + emitcode ("mov", "b,%s", fReturn[1]); + } + + _G.accInUse++; + aopOp (IC_RESULT (ic), ic, FALSE, FALSE); + _G.accInUse--; + + popB (pushedB); + + aopPut (IC_RESULT (ic), "a", 0); + + if (size > 1) + { + aopPut (IC_RESULT (ic), "b", 1); + } + assignResultGenerated = TRUE; + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + } + else + { + bool pushedB = pushB (); + aopOp (IC_RESULT (ic), ic, FALSE, TRUE); + popB (pushedB); + + accuse = assignResultValue (IC_RESULT (ic), IC_LEFT (ic)); + assignResultGenerated = TRUE; + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + } + } + + /* adjust the stack for parameters if required */ + if (ic->parmBytes) + { + int i; + if (options.stack10bit) { + if (ic->parmBytes <= 10) { + emitcode(";","stack adjustment for parms"); + for (i=0; i < ic->parmBytes ; i++) { + emitcode("pop","acc"); + } + } else { + PROTECT_SP; + emitcode ("clr","c"); + emitcode ("mov","a,sp"); + emitcode ("subb","a,#!constbyte",ic->parmBytes & 0xff); + emitcode ("mov","sp,a"); + emitcode ("mov","a,esp"); + adjustEsp("a"); + emitcode ("subb","a,#!constbyte",(ic->parmBytes >> 8) & 0xff); + emitcode ("mov","esp,a"); + UNPROTECT_SP; + } + } else { + if (ic->parmBytes > 3) + { + if (accuse) + { + emitcode ("push", "acc"); + accPushed = TRUE; + } + if (IS_BIT (OP_SYM_ETYPE (IC_LEFT (ic))) && + IS_BIT (OP_SYM_ETYPE (IC_RESULT (ic))) && + !assignResultGenerated) + { + emitcode ("mov", "F0,c"); + resultInF0 = TRUE; + } + + emitcode ("mov", "a,%s", spname); + emitcode ("add", "a,#!constbyte", (-ic->parmBytes) & 0xff); + emitcode ("mov", "%s,a", spname); + + /* unsaveRegisters from xstack needs acc, but */ + /* unsaveRegisters from stack needs this popped */ + if (accPushed && !options.useXstack) + { + emitcode ("pop", "acc"); + accPushed = FALSE; + } + } + else + for (i = 0; i < ic->parmBytes; i++) + emitcode ("dec", "%s", spname); + } + } + + /* if we had saved some registers then unsave them */ + if (ic->regsSaved && !IFFUNC_CALLEESAVES(dtype)) + { + if (accuse && !accPushed && options.useXstack) + { + /* xstack needs acc, but doesn't touch normal stack */ + emitcode ("push", "acc"); + accPushed = TRUE; + } + unsaveRegisters (ic); + } + + /* if register bank was saved then pop them */ + if (restoreBank) + unsaveRBank (FUNC_REGBANK (dtype), ic, FALSE); + + if (IS_BIT (OP_SYM_ETYPE (IC_RESULT (ic))) && !assignResultGenerated) + { + if (resultInF0) + emitcode ("mov", "c,F0"); + + aopOp (IC_RESULT (ic), ic, FALSE, FALSE); + assignResultValue (IC_RESULT (ic), IC_LEFT (ic)); + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + } + + if (accPushed) + emitcode ("pop", "acc"); +} + +/*-----------------------------------------------------------------*/ +/* genPcall - generates a call by pointer statement */ +/*-----------------------------------------------------------------*/ +static void +genPcall (iCode * ic) +{ + sym_link *dtype; + sym_link *etype; + symbol *rlbl = newiTempLabel (NULL); + bool restoreBank=FALSE; + bool resultInF0 = FALSE; + + D (emitcode (";", "genPcall")); + + dtype = operandType (IC_LEFT (ic))->next; + etype = getSpec(dtype); + /* if caller saves & we have not saved then */ + if (!ic->regsSaved) + saveRegisters (ic); + + /* if we are calling a not _naked function that is not using + the same register bank then we need to save the + destination registers on the stack */ + if (currFunc && dtype && (!IFFUNC_ISNAKED(dtype) || TARGET_IS_DS400) && + IFFUNC_ISISR (currFunc->type) && + (FUNC_REGBANK (currFunc->type) != FUNC_REGBANK (dtype))) { + saveRBank (FUNC_REGBANK (dtype), ic, TRUE); + restoreBank=TRUE; + } + + /* push the return address on to the stack */ + emitcode ("mov", "a,#!tlabel", (rlbl->key + 100)); + emitcode ("push", "acc"); + emitcode ("mov", "a,#!hil", (rlbl->key + 100)); + emitcode ("push", "acc"); + + if (options.model == MODEL_FLAT24) + { + emitcode ("mov", "a,#!hihil", (rlbl->key + 100)); + emitcode ("push", "acc"); + } + + /* now push the function address */ + pushSide (IC_LEFT (ic), FPTRSIZE, ic); + + /* if send set is not empty then assign */ + if (_G.sendSet) + { + genSend(reverseSet(_G.sendSet)); + _G.sendSet = NULL; + } + + /* make the call */ + emitcode ("ret", ""); + emitLabel (rlbl); + + + /* if we need assign a result value */ + if ((IS_ITEMP (IC_RESULT (ic)) && + !IS_BIT (OP_SYM_ETYPE (IC_RESULT (ic))) && + (OP_SYMBOL (IC_RESULT (ic))->nRegs || + OP_SYMBOL (IC_RESULT (ic))->spildir)) || + IS_TRUE_SYMOP (IC_RESULT (ic))) + { + + _G.accInUse++; + aopOp (IC_RESULT (ic), ic, FALSE, TRUE); + _G.accInUse--; + + assignResultValue (IC_RESULT (ic), IC_LEFT (ic)); + + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + } + + /* adjust the stack for parameters if required */ + if (ic->parmBytes) + { + int i; + if (options.stack10bit) { + if (ic->parmBytes <= 10) { + emitcode(";","stack adjustment for parms"); + for (i=0; i < ic->parmBytes ; i++) { + emitcode("pop","acc"); + } + } else { + if (IS_BIT (OP_SYM_ETYPE (IC_LEFT (ic))) && + IS_BIT (OP_SYM_ETYPE (IC_RESULT (ic)))) + { + emitcode ("mov", "F0,c"); + resultInF0 = TRUE; + } + + PROTECT_SP; + emitcode ("clr","c"); + emitcode ("mov","a,sp"); + emitcode ("subb","a,#!constbyte",ic->parmBytes & 0xff); + emitcode ("mov","sp,a"); + emitcode ("mov","a,esp"); + adjustEsp("a"); + emitcode ("subb","a,#!constbyte",(ic->parmBytes >> 8) & 0xff); + emitcode ("mov","esp,a"); + UNPROTECT_SP; + } + } else { + if (ic->parmBytes > 3) { + if (IS_BIT (OP_SYM_ETYPE (IC_LEFT (ic))) && + IS_BIT (OP_SYM_ETYPE (IC_RESULT (ic)))) + { + emitcode ("mov", "F0,c"); + resultInF0 = TRUE; + } + + emitcode ("mov", "a,%s", spname); + emitcode ("add", "a,#!constbyte", (-ic->parmBytes) & 0xff); + emitcode ("mov", "%s,a", spname); + } + else + for (i = 0; i < ic->parmBytes; i++) + emitcode ("dec", "%s", spname); + } + } + /* if register bank was saved then unsave them */ + if (restoreBank) + unsaveRBank (FUNC_REGBANK (dtype), ic, TRUE); + + /* if we had saved some registers then unsave them */ + if (ic->regsSaved) + unsaveRegisters (ic); + + if (IS_BIT (OP_SYM_ETYPE (IC_RESULT (ic)))) + { + if (resultInF0) + emitcode ("mov", "c,F0"); + + aopOp (IC_RESULT (ic), ic, FALSE, FALSE); + assignResultValue (IC_RESULT (ic), IC_LEFT (ic)); + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + } +} + +/*-----------------------------------------------------------------*/ +/* resultRemat - result is rematerializable */ +/*-----------------------------------------------------------------*/ +static int +resultRemat (iCode * ic) +{ + if (SKIP_IC (ic) || ic->op == IFX) + return 0; + + if (IC_RESULT (ic) && IS_ITEMP (IC_RESULT (ic))) + { + symbol *sym = OP_SYMBOL (IC_RESULT (ic)); + if (sym->remat && !POINTER_SET (ic)) + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* inExcludeList - return 1 if the string is in exclude Reg list */ +/*-----------------------------------------------------------------*/ +static int +regsCmp(void *p1, void *p2) +{ + return (STRCASECMP((char *)p1, (char *)(p2)) == 0); +} + +static bool +inExcludeList (char *s) +{ + const char *p = setFirstItem(options.excludeRegsSet); + + if (p == NULL || STRCASECMP(p, "none") == 0) + return FALSE; + + + return isinSetWith(options.excludeRegsSet, s, regsCmp); +} + +/*-----------------------------------------------------------------*/ +/* genFunction - generated code for function entry */ +/*-----------------------------------------------------------------*/ +static void +genFunction (iCode * ic) +{ + symbol *sym = OP_SYMBOL (IC_LEFT (ic)); + sym_link *ftype; + bool switchedPSW = FALSE; + bool fReentrant = (IFFUNC_ISREENT (sym->type) || options.stackAuto); + + D (emitcode (";", "genFunction")); + + _G.nRegsSaved = 0; + /* create the function header */ + emitcode (";", "-----------------------------------------"); + emitcode (";", " function %s", sym->name); + emitcode (";", "-----------------------------------------"); + + emitcode ("", "%s:", sym->rname); + lineCurr->isLabel = 1; + ftype = operandType (IC_LEFT (ic)); + _G.currentFunc = sym; + + if (IFFUNC_ISNAKED(ftype)) + { + emitcode(";", "naked function: no prologue."); + return; + } + + if (options.stack_probe) + emitcode ("lcall","__stack_probe"); + + /* here we need to generate the equates for the + register bank if required */ + if (FUNC_REGBANK (ftype) != rbank) + { + int i; + + rbank = FUNC_REGBANK (ftype); + for (i = 0; i < ds390_nRegs; i++) + { + if (regs390[i].print) { + if (strcmp (regs390[i].base, "0") == 0) + emitcode ("", "%s !equ !constbyte", + regs390[i].dname, + 8 * rbank + regs390[i].offset); + else + emitcode ("", "%s !equ %s + !constbyte", + regs390[i].dname, + regs390[i].base, + 8 * rbank + regs390[i].offset); + } + } + } + + /* if this is an interrupt service routine then + save acc, b, dpl, dph */ + if (IFFUNC_ISISR (sym->type)) + { /* is ISR */ + if (!inExcludeList ("acc")) + emitcode ("push", "acc"); + if (!inExcludeList ("b")) + emitcode ("push", "b"); + if (!inExcludeList ("dpl")) + emitcode ("push", "dpl"); + if (!inExcludeList ("dph")) + emitcode ("push", "dph"); + if (options.model == MODEL_FLAT24 && !inExcludeList ("dpx")) + { + emitcode ("push", "dpx"); + /* Make sure we're using standard DPTR */ + emitcode ("push", "dps"); + emitcode ("mov", "dps,#0"); + if (options.stack10bit) + { + /* This ISR could conceivably use DPTR2. Better save it. */ + emitcode ("push", "dpl1"); + emitcode ("push", "dph1"); + emitcode ("push", "dpx1"); + emitcode ("push", DP2_RESULT_REG); + } + } + /* if this isr has no bank i.e. is going to + run with bank 0 , then we need to save more + registers :-) */ + if (!FUNC_REGBANK (sym->type)) + { + int i; + + /* if this function does not call any other + function then we can be economical and + save only those registers that are used */ + if (!IFFUNC_HASFCALL(sym->type)) + { + /* if any registers used */ + if (sym->regsUsed) + { + bool bits_pushed = FALSE; + /* save the registers used */ + for (i = 0; i < sym->regsUsed->size; i++) + { + if (bitVectBitValue (sym->regsUsed, i)) + bits_pushed = pushReg (i, bits_pushed); + } + } + } + else + { + /* this function has a function call. We cannot + determine register usage so we will have to push the + entire bank */ + saveRBank (0, ic, FALSE); + if (options.parms_in_bank1) + { + for (i=0; i < 8 ; i++ ) + { + emitcode ("push","%s",rb1regs[i]); + } + } + } + } + else + { + /* This ISR uses a non-zero bank. + * + * We assume that the bank is available for our + * exclusive use. + * + * However, if this ISR calls a function which uses some + * other bank, we must save that bank entirely. + */ + unsigned long banksToSave = 0; + + if (IFFUNC_HASFCALL(sym->type)) + { + +#define MAX_REGISTER_BANKS 4 + + iCode *i; + int ix; + + for (i = ic; i; i = i->next) + { + if (i->op == ENDFUNCTION) + { + /* we got to the end OK. */ + break; + } + + if (i->op == CALL) + { + sym_link *dtype; + + dtype = operandType (IC_LEFT(i)); + if (dtype + && FUNC_REGBANK(dtype) != FUNC_REGBANK(sym->type)) + { + /* Mark this bank for saving. */ + if (FUNC_REGBANK(dtype) >= MAX_REGISTER_BANKS) + { + werror(E_NO_SUCH_BANK, FUNC_REGBANK(dtype)); + } + else + { + banksToSave |= (1 << FUNC_REGBANK(dtype)); + } + + /* And note that we don't need to do it in + * genCall. + */ + i->bankSaved = 1; + } + } + if (i->op == PCALL) + { + /* This is a mess; we have no idea what + * register bank the called function might + * use. + * + * The only thing I can think of to do is + * throw a warning and hope. + */ + werror(W_FUNCPTR_IN_USING_ISR); + } + } + + if (banksToSave && options.useXstack) + { + /* Since we aren't passing it an ic, + * saveRBank will assume r0 is available to abuse. + * + * So switch to our (trashable) bank now, so + * the caller's R0 isn't trashed. + */ + emitcode ("push", "psw"); + emitcode ("mov", "psw,#!constbyte", + (FUNC_REGBANK (sym->type) << 3) & 0x00ff); + switchedPSW = TRUE; + } + + for (ix = 0; ix < MAX_REGISTER_BANKS; ix++) + { + if (banksToSave & (1 << ix)) + { + saveRBank(ix, NULL, FALSE); + } + } + } + // TODO: this needs a closer look + SPEC_ISR_SAVED_BANKS(currFunc->etype) = banksToSave; + } + } + else + { + /* if callee-save to be used for this function + then save the registers being used in this function */ + if (IFFUNC_CALLEESAVES(sym->type)) + { + int i; + + /* if any registers used */ + if (sym->regsUsed) + { + bool bits_pushed = FALSE; + /* save the registers used */ + for (i = 0; i < sym->regsUsed->size; i++) + { + if (bitVectBitValue (sym->regsUsed, i)) + { + bits_pushed = pushReg (i, bits_pushed); + _G.nRegsSaved++; + } + } + } + } + } + + /* set the register bank to the desired value */ + if ((FUNC_REGBANK (sym->type) || FUNC_ISISR (sym->type)) + && !switchedPSW) + { + emitcode ("push", "psw"); + emitcode ("mov", "psw,#!constbyte", (FUNC_REGBANK (sym->type) << 3) & 0x00ff); + } + + if (fReentrant && + (sym->stack || FUNC_HASSTACKPARM(sym->type))) { + if (options.stack10bit) { + emitcode ("push","_bpx"); + emitcode ("push","_bpx+1"); + emitcode ("mov","_bpx,%s",spname); + emitcode ("mov","_bpx+1,esp"); + adjustEsp("_bpx+1"); + } else { + if (options.useXstack) + { + emitcode ("mov", "r0,%s", spname); + emitcode ("mov", "a,_bp"); + emitcode ("movx", "@r0,a"); + emitcode ("inc", "%s", spname); + } else { + /* set up the stack */ + emitcode ("push", "_bp"); /* save the callers stack */ + } + emitcode ("mov", "_bp,%s", spname); + } + } + + /* adjust the stack for the function */ + if (sym->stack) { + int i = sym->stack; + if (options.stack10bit) { + if ( i > 1024) werror (W_STACK_OVERFLOW, sym->name); + assert (sym->recvSize <= 4); + if (sym->stack <= 8) { + while (i--) emitcode ("push","acc"); + } else { + PROTECT_SP; + emitcode ("mov","a,sp"); + emitcode ("add","a,#!constbyte", ((short) sym->stack & 0xff)); + emitcode ("mov","sp,a"); + emitcode ("mov","a,esp"); + adjustEsp("a"); + emitcode ("addc","a,#!constbyte", (((short) sym->stack) >> 8) & 0xff); + emitcode ("mov","esp,a"); + UNPROTECT_SP; + } + } else { + if (i > 256) + werror (W_STACK_OVERFLOW, sym->name); + + if (i > 3 && sym->recvSize < 4) { + + emitcode ("mov", "a,sp"); + emitcode ("add", "a,#!constbyte", ((char) sym->stack & 0xff)); + emitcode ("mov", "sp,a"); + + } else + while (i--) + emitcode ("inc", "sp"); + } + } + + if (sym->xstack) + { + + emitcode ("mov", "a,_spx"); + emitcode ("add", "a,#!constbyte", ((char) sym->xstack & 0xff)); + emitcode ("mov", "_spx,a"); + } + + /* if critical function then turn interrupts off */ + if (IFFUNC_ISCRITICAL (ftype)) + { + symbol *tlbl = newiTempLabel (NULL); + emitcode ("setb", "c"); + emitcode ("jbc", "ea,%05d$", (tlbl->key + 100)); /* atomic test & clear */ + emitcode ("clr", "c"); + emitLabel (tlbl); + emitcode ("push", "psw"); /* save old ea via c in psw */ + } +} + +/*-----------------------------------------------------------------*/ +/* genEndFunction - generates epilogue for functions */ +/*-----------------------------------------------------------------*/ +static void +genEndFunction (iCode * ic) +{ + symbol *sym = OP_SYMBOL (IC_LEFT (ic)); + lineNode *lnp = lineCurr; + bitVect *regsUsed; + bitVect *regsUsedPrologue; + bitVect *regsUnneeded; + int idx; + + D (emitcode (";", "genEndFunction")); + + _G.currentFunc = NULL; + if (IFFUNC_ISNAKED(sym->type)) + { + emitcode(";", "naked function: no epilogue."); + if (options.debug && currFunc) + debugFile->writeEndFunction (currFunc, ic, 0); + return; + } + + if (IFFUNC_ISCRITICAL (sym->type)) + { + if (IS_BIT (OP_SYM_ETYPE (IC_LEFT (ic)))) + { + emitcode ("rlc", "a"); /* save c in a */ + emitcode ("pop", "psw"); /* restore ea via c in psw */ + emitcode ("mov", "ea,c"); + emitcode ("rrc", "a"); /* restore c from a */ + } + else + { + emitcode ("pop", "psw"); /* restore ea via c in psw */ + emitcode ("mov", "ea,c"); + } + } + + if ((IFFUNC_ISREENT (sym->type) || options.stackAuto) && + (sym->stack || FUNC_HASSTACKPARM(sym->type))) { + + if (options.stack10bit) { + PROTECT_SP; + emitcode ("mov", "sp,_bpx", spname); + emitcode ("mov", "esp,_bpx+1", spname); + UNPROTECT_SP; + } else { + emitcode ("mov", "%s,_bp", spname); + } + } + + /* if use external stack but some variables were + added to the local stack then decrement the + local stack */ + if (options.useXstack && sym->stack) { + emitcode ("mov", "a,sp"); + emitcode ("add", "a,#!constbyte", ((char) -sym->stack) & 0xff); + emitcode ("mov", "sp,a"); + } + + + if ((IFFUNC_ISREENT (sym->type) || options.stackAuto) && + (sym->stack || FUNC_HASSTACKPARM(sym->type))) { + + if (options.useXstack) { + emitcode ("mov", "r0,%s", spname); + emitcode ("movx", "a,@r0"); + emitcode ("mov", "_bp,a"); + emitcode ("dec", "%s", spname); + } else { + if (options.stack10bit) { + emitcode ("pop", "_bpx+1"); + emitcode ("pop", "_bpx"); + } else { + emitcode ("pop", "_bp"); + } + } + } + + /* restore the register bank */ + if (FUNC_REGBANK (sym->type) || IFFUNC_ISISR (sym->type)) + { + if (!FUNC_REGBANK (sym->type) || !IFFUNC_ISISR (sym->type) + || !options.useXstack) + { + /* Special case of ISR using non-zero bank with useXstack + * is handled below. + */ + emitcode ("pop", "psw"); + } + } + + if (IFFUNC_ISISR (sym->type)) + { /* is ISR */ + + /* now we need to restore the registers */ + /* if this isr has no bank i.e. is going to + run with bank 0 , then we need to save more + registers :-) */ + if (!FUNC_REGBANK (sym->type)) + { + int i; + /* if this function does not call any other + function then we can be economical and + save only those registers that are used */ + if (!IFFUNC_HASFCALL(sym->type)) + { + /* if any registers used */ + if (sym->regsUsed) + { + bool bits_popped = FALSE; + /* save the registers used */ + for (i = sym->regsUsed->size; i >= 0; i--) + { + if (bitVectBitValue (sym->regsUsed, i)) + bits_popped = popReg (i, bits_popped); + } + } + } + else + { + /* this function has a function call. We cannot + determine register usage so we will have to pop the + entire bank */ + if (options.parms_in_bank1) + { + for (i = 7 ; i >= 0 ; i-- ) + { + emitcode ("pop","%s",rb1regs[i]); + } + } + unsaveRBank (0, ic, FALSE); + } + } + else + { + /* This ISR uses a non-zero bank. + * + * Restore any register banks saved by genFunction + * in reverse order. + */ + unsigned savedBanks = SPEC_ISR_SAVED_BANKS(currFunc->etype); + int ix; + + for (ix = MAX_REGISTER_BANKS - 1; ix >= 0; ix--) + { + if (savedBanks & (1 << ix)) + { + unsaveRBank(ix, NULL, FALSE); + } + } + + if (options.useXstack) + { + /* Restore bank AFTER calling unsaveRBank, + * since it can trash r0. + */ + emitcode ("pop", "psw"); + } + } + + if (options.model == MODEL_FLAT24 && !inExcludeList ("dpx")) + { + if (options.stack10bit) + { + emitcode ("pop", DP2_RESULT_REG); + emitcode ("pop", "dpx1"); + emitcode ("pop", "dph1"); + emitcode ("pop", "dpl1"); + } + emitcode ("pop", "dps"); + emitcode ("pop", "dpx"); + } + if (!inExcludeList ("dph")) + emitcode ("pop", "dph"); + if (!inExcludeList ("dpl")) + emitcode ("pop", "dpl"); + if (!inExcludeList ("b")) + emitcode ("pop", "b"); + if (!inExcludeList ("acc")) + emitcode ("pop", "acc"); + + /* if debug then send end of function */ + if (options.debug && currFunc) + { + debugFile->writeEndFunction (currFunc, ic, 1); + } + + emitcode ("reti", ""); + } + else + { + if (IFFUNC_CALLEESAVES(sym->type)) + { + int i; + + /* if any registers used */ + if (sym->regsUsed) + { + /* save the registers used */ + for (i = sym->regsUsed->size; i >= 0; i--) + { + if (bitVectBitValue (sym->regsUsed, i)) + emitcode ("pop", "%s", REG_WITH_INDEX (i)->dname); + } + } + } + + /* if debug then send end of function */ + if (options.debug && currFunc) + { + debugFile->writeEndFunction (currFunc, ic, 1); + } + + emitcode ("ret", ""); + } + + if (!port->peep.getRegsRead || !port->peep.getRegsWritten || options.nopeep) + return; + + /* If this was an interrupt handler using bank 0 that called another */ + /* function, then all registers must be saved; nothing to optimized. */ + if (IFFUNC_ISISR (sym->type) && IFFUNC_HASFCALL(sym->type) + && !FUNC_REGBANK(sym->type)) + return; + + /* There are no push/pops to optimize if not callee-saves or ISR */ + if (!(FUNC_CALLEESAVES (sym->type) || FUNC_ISISR (sym->type))) + return; + + /* If there were stack parameters, we cannot optimize without also */ + /* fixing all of the stack offsets; this is too dificult to consider. */ + if (FUNC_HASSTACKPARM(sym->type)) + return; + + /* Compute the registers actually used */ + regsUsed = newBitVect (ds390_nRegs); + regsUsedPrologue = newBitVect (ds390_nRegs); + while (lnp) + { + if (lnp->ic && lnp->ic->op == FUNCTION) + regsUsedPrologue = bitVectUnion (regsUsedPrologue, port->peep.getRegsWritten(lnp)); + else + regsUsed = bitVectUnion (regsUsed, port->peep.getRegsWritten(lnp)); + + if (lnp->ic && lnp->ic->op == FUNCTION && lnp->prev + && lnp->prev->ic && lnp->prev->ic->op == ENDFUNCTION) + break; + if (!lnp->prev) + break; + lnp = lnp->prev; + } + + if (bitVectBitValue (regsUsedPrologue, DPS_IDX) + && !bitVectBitValue (regsUsed, DPS_IDX)) + { + bitVectUnSetBit (regsUsedPrologue, DPS_IDX); + } + + if (bitVectBitValue (regsUsedPrologue, CND_IDX) + && !bitVectBitValue (regsUsed, CND_IDX)) + { + regsUsed = bitVectUnion (regsUsed, regsUsedPrologue); + if (IFFUNC_ISISR (sym->type) && !FUNC_REGBANK (sym->type) + && !sym->stack && !FUNC_ISCRITICAL (sym->type)) + bitVectUnSetBit (regsUsed, CND_IDX); + } + else + regsUsed = bitVectUnion (regsUsed, regsUsedPrologue); + + /* If this was an interrupt handler that called another function */ + /* function, then assume working registers may be modified by it. */ + if (IFFUNC_ISISR (sym->type) && IFFUNC_HASFCALL(sym->type)) + { + regsUsed = bitVectSetBit (regsUsed, AP_IDX); + regsUsed = bitVectSetBit (regsUsed, DPX1_IDX); + regsUsed = bitVectSetBit (regsUsed, DPL1_IDX); + regsUsed = bitVectSetBit (regsUsed, DPH1_IDX); + regsUsed = bitVectSetBit (regsUsed, DPX_IDX); + regsUsed = bitVectSetBit (regsUsed, DPL_IDX); + regsUsed = bitVectSetBit (regsUsed, DPH_IDX); + regsUsed = bitVectSetBit (regsUsed, DPS_IDX); + regsUsed = bitVectSetBit (regsUsed, B_IDX); + regsUsed = bitVectSetBit (regsUsed, A_IDX); + regsUsed = bitVectSetBit (regsUsed, CND_IDX); + } + + /* Remove the unneeded push/pops */ + regsUnneeded = newBitVect (ds390_nRegs); + while (lnp) + { + if (lnp->ic && (lnp->ic->op == FUNCTION || lnp->ic->op == ENDFUNCTION)) + { + if (!strncmp(lnp->line, "push", 4)) + { + idx = bitVectFirstBit (port->peep.getRegsRead(lnp)); + if (idx>=0 && !bitVectBitValue (regsUsed, idx)) + { + connectLine (lnp->prev, lnp->next); + regsUnneeded = bitVectSetBit (regsUnneeded, idx); + } + } + if (!strncmp(lnp->line, "pop", 3) || !strncmp(lnp->line, "mov", 3)) + { + idx = bitVectFirstBit (port->peep.getRegsWritten(lnp)); + if (idx>=0 && !bitVectBitValue (regsUsed, idx)) + { + connectLine (lnp->prev, lnp->next); + regsUnneeded = bitVectSetBit (regsUnneeded, idx); + } + } + } + lnp = lnp->next; + } + + for (idx = 0; idx < regsUnneeded->size; idx++) + if (bitVectBitValue (regsUnneeded, idx)) + emitcode (";", "eliminated unneeded push/pop %s", REG_WITH_INDEX (idx)->dname); + + freeBitVect (regsUnneeded); + freeBitVect (regsUsed); + freeBitVect (regsUsedPrologue); +} + +/*-----------------------------------------------------------------*/ +/* genJavaNativeRet - generate code for return JavaNative */ +/*-----------------------------------------------------------------*/ +static void genJavaNativeRet(iCode *ic) +{ + int i, size; + + aopOp (IC_LEFT (ic), ic, FALSE, + AOP_IS_STR(IC_LEFT(ic)) ? FALSE :TRUE); + size = AOP_SIZE (IC_LEFT (ic)); + + assert (size <= 4); + + /* it is assigned to GPR0-R3 then push them */ + if (aopHasRegs(AOP(IC_LEFT(ic)),R0_IDX,R1_IDX) || + aopHasRegs(AOP(IC_LEFT(ic)),R2_IDX,R3_IDX)) { + for (i = 0 ; i < size ; i++ ) { + emitcode ("push","%s", + aopGet(IC_LEFT(ic),i,FALSE,TRUE,DP2_RESULT_REG)); + } + for (i = (size-1) ; i >= 0 ; i--) { + emitcode ("pop","a%s",javaRet[i]); + } + } else { + for (i = 0 ; i < size ; i++) + emitcode ("mov","%s,%s",javaRet[i], + aopGet(IC_LEFT(ic),i,FALSE,TRUE,DP2_RESULT_REG)); + } + for (i = size ; i < 4 ; i++ ) + emitcode ("mov","%s,#0",javaRet[i]); + return; +} + +/*-----------------------------------------------------------------*/ +/* genRet - generate code for return statement */ +/*-----------------------------------------------------------------*/ +static void +genRet (iCode * ic) +{ + int size, offset = 0, pushed = 0; + + D (emitcode (";", "genRet")); + + /* if we have no return value then + just generate the "ret" */ + if (!IC_LEFT (ic)) + goto jumpret; + + /* if this is a JavaNative function then return + value in different register */ + if (IFFUNC_ISJAVANATIVE(currFunc->type)) { + genJavaNativeRet(ic); + goto jumpret; + } + /* we have something to return then + move the return value into place */ + aopOp (IC_LEFT (ic), ic, FALSE, + (AOP_IS_STR(IC_LEFT(ic)) ? FALSE :TRUE)); + size = AOP_SIZE (IC_LEFT (ic)); + + _startLazyDPSEvaluation (); + + if (IS_BIT(_G.currentFunc->etype)) + { + movc (aopGet (IC_LEFT (ic), 0, FALSE, FALSE, NULL)); + size = 0; + } + + while (size--) + { + char *l; + if (AOP_TYPE (IC_LEFT (ic)) == AOP_DPTR) + { + l = aopGet (IC_LEFT (ic), offset++, + FALSE, TRUE, NULL); + emitcode ("push", "%s", l); + pushed++; + } + else + { + /* Since A is the last element of fReturn, + * it is OK to clobber it in the aopGet. + */ + l = aopGet (IC_LEFT (ic), offset, + FALSE, FALSE, NULL); + if (strcmp (fReturn[offset], l)) + emitcode ("mov", "%s,%s", fReturn[offset++], l); + } + } + _endLazyDPSEvaluation (); + + while (pushed) + { + pushed--; + if (strcmp (fReturn[pushed], "a")) + emitcode ("pop", fReturn[pushed]); + else + emitcode ("pop", "acc"); + } + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); + +jumpret: + /* generate a jump to the return label + if the next is not the return statement */ + if (!(ic->next && ic->next->op == LABEL && + IC_LABEL (ic->next) == returnLabel)) + + emitcode ("ljmp", "!tlabel", (returnLabel->key + 100)); + +} + +/*-----------------------------------------------------------------*/ +/* genLabel - generates a label */ +/*-----------------------------------------------------------------*/ +static void +genLabel (iCode * ic) +{ + /* special case never generate */ + if (IC_LABEL (ic) == entryLabel) + return; + + D (emitcode (";", "genLabel")); + + emitLabel (IC_LABEL (ic)); +} + +/*-----------------------------------------------------------------*/ +/* genGoto - generates a ljmp */ +/*-----------------------------------------------------------------*/ +static void +genGoto (iCode * ic) +{ + D (emitcode (";", "genGoto")); + + emitcode ("ljmp", "!tlabel", (IC_LABEL (ic)->key + 100)); +} + +/*-----------------------------------------------------------------*/ +/* findLabelBackwards: walks back through the iCode chain looking */ +/* for the given label. Returns number of iCode instructions */ +/* between that label and given ic. */ +/* Returns zero if label not found. */ +/*-----------------------------------------------------------------*/ +static int +findLabelBackwards (iCode * ic, int key) +{ + int count = 0; + + while (ic->prev) + { + ic = ic->prev; + count++; + + /* If we have any pushes or pops, we cannot predict the distance. + I don't like this at all, this should be dealt with in the + back-end */ + if (ic->op == IPUSH || ic->op == IPOP) { + return 0; + } + + if (ic->op == LABEL && IC_LABEL (ic)->key == key) + { + /* printf("findLabelBackwards = %d\n", count); */ + return count; + } + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* genPlusIncr :- does addition with increment if possible */ +/*-----------------------------------------------------------------*/ +static bool +genPlusIncr (iCode * ic) +{ + unsigned int icount; + unsigned int size = getDataSize (IC_RESULT (ic)); + + /* will try to generate an increment */ + /* if the right side is not a literal + we cannot */ + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) + return FALSE; + + /* if the literal value of the right hand side + is greater than 4 then it is not worth it */ + if ((icount = (unsigned int) ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit)) > 4) + return FALSE; + + if (size == 1 && AOP(IC_LEFT(ic)) == AOP(IC_RESULT(ic)) && + AOP_TYPE(IC_LEFT(ic)) == AOP_DIR ) { + while (icount--) { + emitcode("inc","%s",aopGet(IC_RESULT(ic),0,FALSE,FALSE,NULL)); + } + return TRUE; + } + /* if increment 16 bits in register */ + if ( + AOP_TYPE (IC_LEFT (ic)) == AOP_REG && + AOP_TYPE (IC_RESULT (ic)) == AOP_REG && + sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic))) && + (size > 1) && + (icount == 1)) + { + symbol *tlbl; + int emitTlbl; + int labelRange; + char *l; + + /* If the next instruction is a goto and the goto target + * is <= 5 instructions previous to this, we can generate + * jumps straight to that target. + */ + if (ic->next && ic->next->op == GOTO + && (labelRange = findLabelBackwards (ic, IC_LABEL (ic->next)->key)) != 0 + && labelRange <= 5) + { + D (emitcode (";", "tail increment optimized (range %d)", labelRange)); + tlbl = IC_LABEL (ic->next); + emitTlbl = 0; + } + else + { + tlbl = newiTempLabel (NULL); + emitTlbl = 1; + } + l = aopGet (IC_RESULT (ic), LSB, FALSE, FALSE, NULL); + emitcode ("inc", "%s", l); + + if (AOP_TYPE (IC_RESULT (ic)) == AOP_REG || + IS_AOP_PREG (IC_RESULT (ic))) + { + emitcode ("cjne", "%s,%s,!tlabel", l, zero, tlbl->key + 100); + } + else + { + emitcode ("clr", "a"); + emitcode ("cjne", "a,%s,!tlabel", l, tlbl->key + 100); + } + + l = aopGet (IC_RESULT (ic), MSB16, FALSE, FALSE, NULL); + emitcode ("inc", "%s", l); + if (size > 2) + { + if (!strcmp(l, "acc")) + { + emitcode("jnz", "!tlabel", tlbl->key + 100); + } + else if (AOP_TYPE (IC_RESULT (ic)) == AOP_REG || + IS_AOP_PREG (IC_RESULT (ic))) + { + emitcode ("cjne", "%s,%s,!tlabel", l, zero, tlbl->key + 100); + } + else + { + emitcode ("cjne", "a,%s,!tlabel", l, tlbl->key + 100); + } + + l = aopGet (IC_RESULT (ic), MSB24, FALSE, FALSE, NULL); + emitcode ("inc", "%s", l); + } + if (size > 3) + { + if (!strcmp(l, "acc")) + { + emitcode("jnz", "!tlabel", tlbl->key + 100); + } + else if (AOP_TYPE (IC_RESULT (ic)) == AOP_REG || + IS_AOP_PREG (IC_RESULT (ic))) + { + emitcode ("cjne", "%s,%s,!tlabel", l, zero, tlbl->key + 100); + } + else + { + emitcode ("cjne", "a,%s,!tlabel", l, tlbl->key + 100); + } + + l = aopGet (IC_RESULT (ic), MSB32, FALSE, FALSE, NULL); + emitcode ("inc", "%s", l); + } + + if (emitTlbl) + { + emitLabel (tlbl); + } + return TRUE; + } + + if (AOP_TYPE(IC_RESULT(ic))==AOP_STR && IS_ITEMP(IC_RESULT(ic)) && + !AOP_USESDPTR(IC_LEFT(ic)) && icount <= 5 && size <= 3 && + options.model == MODEL_FLAT24 ) + { + if (IC_RESULT(ic)->isGptr) + { + emitcode ("mov", "b,%s", aopGet(IC_LEFT (ic), 3, FALSE, FALSE, NULL)); + } + switch (size) { + case 3: + emitcode ("mov", "dpx,%s", aopGet(IC_LEFT (ic), 2, FALSE, FALSE, NULL)); + case 2: + emitcode ("mov", "dph,%s", aopGet(IC_LEFT (ic), 1, FALSE, FALSE, NULL)); + case 1: + emitcode ("mov", "dpl,%s", aopGet(IC_LEFT (ic), 0, FALSE, FALSE, NULL)); + break; + } + while (icount--) + emitcode ("inc", "dptr"); + return TRUE; + } + + if (AOP_INDPTRn(IC_LEFT(ic)) && AOP_INDPTRn(IC_RESULT(ic)) && + AOP(IC_LEFT(ic))->aopu.dptr == AOP(IC_RESULT(ic))->aopu.dptr && + icount <= 5 ) + { + emitcode ("mov","dps,#!constbyte",AOP(IC_LEFT(ic))->aopu.dptr); + while (icount--) + emitcode ("inc", "dptr"); + emitcode ("mov", "dps,#0"); + return TRUE; + } + + /* if the sizes are greater than 1 then we cannot */ + if (AOP_SIZE (IC_RESULT (ic)) > 1 || + AOP_SIZE (IC_LEFT (ic)) > 1) + return FALSE; + + /* we can if the aops of the left & result match or + if they are in registers and the registers are the + same */ + if ( + AOP_TYPE (IC_LEFT (ic)) == AOP_REG && + AOP_TYPE (IC_RESULT (ic)) == AOP_REG && + sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic)))) + { + if (icount > 3) + { + MOVA (aopGet (IC_LEFT (ic), 0, FALSE, FALSE, NULL)); + emitcode ("add", "a,#!constbyte", ((char) icount) & 0xff); + aopPut (IC_RESULT (ic), "a", 0); + } + else + { + _startLazyDPSEvaluation (); + while (icount--) + { + emitcode ("inc", "%s", aopGet (IC_LEFT (ic), 0, FALSE, FALSE, NULL)); + } + _endLazyDPSEvaluation (); + } + + return TRUE; + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* outBitAcc - output a bit in acc */ +/*-----------------------------------------------------------------*/ +static void +outBitAcc (operand * result) +{ + symbol *tlbl = newiTempLabel (NULL); + /* if the result is a bit */ + if (AOP_TYPE (result) == AOP_CRY) + { + aopPut (result, "a", 0); + } + else + { + emitcode ("jz", "!tlabel", tlbl->key + 100); + emitcode ("mov", "a,%s", one); + emitLabel (tlbl); + outAcc (result); + } +} + +/*-----------------------------------------------------------------*/ +/* genPlusBits - generates code for addition of two bits */ +/*-----------------------------------------------------------------*/ +static void +genPlusBits (iCode * ic) +{ + D (emitcode (";", "genPlusBits")); + + emitcode ("mov", "c,%s", AOP (IC_LEFT (ic))->aopu.aop_dir); + if (AOP_TYPE (IC_RESULT (ic)) == AOP_CRY) + { + symbol *lbl = newiTempLabel (NULL); + emitcode ("jnb", "%s,!tlabel", AOP (IC_RIGHT (ic))->aopu.aop_dir, (lbl->key + 100)); + emitcode ("cpl", "c"); + emitLabel (lbl); + outBitC (IC_RESULT (ic)); + } + else + { + emitcode ("clr", "a"); + emitcode ("rlc", "a"); + emitcode ("mov", "c,%s", AOP (IC_RIGHT (ic))->aopu.aop_dir); + emitcode ("addc", "a,%s", zero); + outAcc (IC_RESULT (ic)); + } +} + +static void +adjustArithmeticResult (iCode * ic) +{ + if (opIsGptr (IC_RESULT (ic)) && + opIsGptr (IC_LEFT (ic)) && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_LEFT (ic)))) + { + aopPut (IC_RESULT (ic), + aopGet (IC_LEFT (ic), GPTRSIZE - 1, FALSE, FALSE, NULL), + GPTRSIZE - 1); + } + + if (opIsGptr (IC_RESULT (ic)) && + opIsGptr (IC_RIGHT (ic)) && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_RIGHT (ic)))) + { + aopPut (IC_RESULT (ic), + aopGet (IC_RIGHT (ic), GPTRSIZE - 1, FALSE, FALSE, NULL), + GPTRSIZE - 1); + } + + if (opIsGptr (IC_RESULT (ic)) && + IC_LEFT (ic) && AOP_SIZE (IC_LEFT (ic)) < GPTRSIZE && + IC_RIGHT (ic) && AOP_SIZE (IC_RIGHT (ic)) < GPTRSIZE && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_LEFT (ic))) && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_RIGHT (ic)))) + { + char buffer[5]; + SNPRINTF (buffer, sizeof(buffer), + "#%d", pointerTypeToGPByte (pointerCode (getSpec (operandType (IC_LEFT (ic)))), NULL, NULL)); + aopPut (IC_RESULT (ic), buffer, GPTRSIZE - 1); + } +} + +// The guts of AOP_OP_3_NOFATAL. Generates the left & right opcodes of an IC, +// generates the result if possible. If result is generated, returns TRUE; otherwise +// returns false and caller must deal with fact that result isn't aopOp'd. +bool aopOp3(iCode * ic) +{ + bool dp1InUse, dp2InUse; + bool useDp2; + + // First, generate the right opcode. DPTR may be used if neither left nor result are + // of type AOP_STR. + +// D (emitcode(";", "aopOp3: AOP_IS_STR left: %s right: %s result: %s", +// AOP_IS_STR(IC_LEFT(ic)) ? "true" : "false", +// AOP_IS_STR(IC_RIGHT(ic)) ? "true" : "false", +// AOP_IS_STR(IC_RESULT(ic)) ? "true" : "false"); +// ); +// D (emitcode(";", "aopOp3: AOP_IS_DPTRn left: %s right: %s result: %s", +// AOP_IS_DPTRn(IC_LEFT(ic)) ? "true" : "false", +// AOP_IS_DPTRn(IC_RIGHT(ic)) ? "true" : "false", +// AOP_IS_DPTRn(IC_RESULT(ic)) ? "true" : "false"); +// ); + + // Right uses DPTR unless left or result is an AOP_STR; however, + // if right is an AOP_STR, it must use DPTR regardless. + if ((AOP_IS_STR (IC_LEFT (ic)) || AOP_IS_STR (IC_RESULT (ic))) + && !AOP_IS_STR (IC_RIGHT (ic))) + { + useDp2 = TRUE; + } + else + { + useDp2 = FALSE; + } + + aopOp (IC_RIGHT(ic), ic, FALSE, useDp2); + + // if the right used DPTR, left MUST use DPTR2. + // if the right used DPTR2, left MUST use DPTR. + // if both are still available, we prefer to use DPTR. But if result is an AOP_STR + // and left is not an AOP_STR, then we will get better code if we use DP2 for left, + // enabling us to assign DPTR to result. + + if (AOP_USESDPTR (IC_RIGHT (ic))) + { + useDp2 = TRUE; + } + else if (AOP_USESDPTR2 (IC_RIGHT (ic))) + { + useDp2 = FALSE; + } + else + { + if (AOP_IS_STR (IC_RESULT (ic)) && !AOP_IS_STR (IC_LEFT (ic))) + { + useDp2 = TRUE; + } + else + { + useDp2 = FALSE; + } + } + + aopOp (IC_LEFT (ic), ic, FALSE, useDp2); + + + // We've op'd the left & right. So, if left or right are the same operand as result, + // we know aopOp will succeed, and we can just do it & bail. + if (isOperandEqual (IC_LEFT (ic), IC_RESULT (ic))) + { + aopOp (IC_RESULT (ic), ic, TRUE, AOP_USESDPTR2 (IC_LEFT (ic))); + return TRUE; + } + if (isOperandEqual (IC_RIGHT (ic), IC_RESULT (ic))) + { +// D (emitcode(";", "aopOp3: (left | right) & result equal")); + aopOp (IC_RESULT (ic), ic, TRUE, AOP_USESDPTR2 (IC_RIGHT (ic))); + return TRUE; + } + + // Operands may be equivalent (but not equal) if they share a spill location. If + // so, use the same DPTR or DPTR2. + if (operandsEqu (IC_LEFT (ic), IC_RESULT (ic))) + { + aopOp (IC_RESULT (ic), ic, TRUE, AOP_USESDPTR2 (IC_LEFT (ic))); + return TRUE; + } + if (operandsEqu (IC_RIGHT (ic), IC_RESULT (ic))) + { + aopOp (IC_RESULT (ic), ic, TRUE, AOP_USESDPTR2 (IC_RIGHT (ic))); + return TRUE; + } + + // Note which dptrs are currently in use. + dp1InUse = AOP_USESDPTR (IC_LEFT (ic)) || AOP_USESDPTR (IC_RIGHT (ic)); + dp2InUse = AOP_USESDPTR2 (IC_LEFT (ic)) || AOP_USESDPTR2 (IC_RIGHT (ic)); + + // OK, now if either left or right uses DPTR and the result is an AOP_STR, we cannot + // generate it. + if (dp1InUse && AOP_IS_STR (IC_RESULT (ic))) + { + return FALSE; + } + + // Likewise, if left or right uses DPTR2 and the result is a DPTRn, we cannot generate it. + if (dp2InUse && AOP_IS_DPTRn (IC_RESULT (ic))) + { + return FALSE; + } + + // or, if both dp1 & dp2 are in use and the result needs a dptr, we're out of luck + if (dp1InUse && dp2InUse && isOperandInFarSpace (IC_RESULT (ic))) + { + return FALSE; + } + + aopOp (IC_RESULT (ic), ic, TRUE, dp1InUse); + + // Some sanity checking... + if (dp1InUse && AOP_USESDPTR (IC_RESULT (ic))) + { + fprintf(stderr, + "Internal error: got unexpected DPTR (%s:%d %s:%d)\n", + __FILE__, __LINE__, ic->filename, ic->lineno); + emitcode(";", ">>> unexpected DPTR here."); + } + + if (dp2InUse && AOP_USESDPTR2 (IC_RESULT (ic))) + { + fprintf(stderr, + "Internal error: got unexpected DPTR2 (%s:%d %s:%d)\n", + __FILE__, __LINE__, ic->filename, ic->lineno); + emitcode(";", ">>> unexpected DPTR2 here."); + } + + return TRUE; +} + +// Macro to aopOp all three operands of an ic. If this cannot be done, +// the IC_LEFT and IC_RIGHT operands will be aopOp'd, and the rc parameter +// will be set TRUE. The caller must then handle the case specially, noting +// that the IC_RESULT operand is not aopOp'd. +// +#define AOP_OP_3_NOFATAL(ic, rc) \ + do { rc = !aopOp3(ic); } while (0) + +// aopOp the left & right operands of an ic. +#define AOP_OP_2(ic) \ + aopOp (IC_RIGHT (ic), ic, FALSE, AOP_IS_STR (IC_LEFT (ic))); \ + aopOp (IC_LEFT (ic), ic, FALSE, AOP_USESDPTR (IC_RIGHT (ic))); + +// convienience macro. +#define AOP_SET_LOCALS(ic) \ + left = IC_LEFT(ic); \ + right = IC_RIGHT(ic); \ + result = IC_RESULT(ic); + + +// Given an integer value of pushedSize bytes on the stack, +// adjust it to be resultSize bytes, either by discarding +// the most significant bytes or by zero-padding. +// +// On exit from this macro, pushedSize will have been adjusted to +// equal resultSize, and ACC may be trashed. +#define ADJUST_PUSHED_RESULT(pushedSize, resultSize) \ + /* If the pushed data is bigger than the result, \ + * simply discard unused bytes. Icky, but works. \ + */ \ + while (pushedSize > resultSize) \ + { \ + D (emitcode (";", "discarding unused result byte.")); \ + emitcode ("pop", "acc"); \ + pushedSize--; \ + } \ + if (pushedSize < resultSize) \ + { \ + emitcode ("clr", "a"); \ + /* Conversly, we haven't pushed enough here. \ + * just zero-pad, and all is well. \ + */ \ + while (pushedSize < resultSize) \ + { \ + emitcode("push", "acc"); \ + pushedSize++; \ + } \ + } \ + assert(pushedSize == resultSize); + +/*-----------------------------------------------------------------*/ +/* genPlus - generates code for addition */ +/*-----------------------------------------------------------------*/ +static void +genPlus (iCode * ic) +{ + int size, offset = 0; + bool pushResult; + int rSize; + bool swappedLR = FALSE; + + D (emitcode (";", "genPlus")); + + /* special cases :- */ + if ( AOP_IS_STR (IC_LEFT (ic)) && + isOperandLiteral (IC_RIGHT (ic)) && OP_SYMBOL (IC_RESULT (ic))->ruonly) { + aopOp (IC_RIGHT (ic), ic, TRUE, FALSE); + size = (int) ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit); + if (size <= 9) { + while (size--) emitcode ("inc","dptr"); + } else { + emitcode ("mov", "a,dpl"); + emitcode ("add", "a,#!constbyte", size & 0xff); + emitcode ("mov", "dpl,a"); + emitcode ("mov", "a,dph"); + emitcode ("addc", "a,#!constbyte", (size >> 8) & 0xff); + emitcode ("mov", "dph,a"); + emitcode ("mov", "a,dpx"); + emitcode ("addc", "a,#!constbyte", (size >> 16) & 0xff); + emitcode ("mov", "dpx,a"); + } + freeAsmop (IC_RIGHT (ic), NULL, ic, FALSE); + return ; + } + if ( IS_SYMOP (IC_LEFT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->remat && + isOperandInFarSpace (IC_RIGHT (ic))) { + operand *op = IC_RIGHT(ic); + IC_RIGHT(ic) = IC_LEFT(ic); + IC_LEFT(ic) = op; + } + + AOP_OP_3_NOFATAL (ic, pushResult); + + if (pushResult) + { + D (emitcode (";", "genPlus: must push result: 3 ops in far space")); + } + + if (!pushResult) + { + /* if literal, literal on the right or + if left requires ACC or right is already + in ACC */ + if ((AOP_TYPE (IC_LEFT (ic)) == AOP_LIT) || + ((AOP_NEEDSACC (IC_LEFT (ic))) && !(AOP_NEEDSACC (IC_RIGHT (ic)))) || + AOP_TYPE (IC_RIGHT (ic)) == AOP_ACC) + { + operand *t = IC_RIGHT (ic); + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = t; + swappedLR = TRUE; + D (emitcode (";", "Swapped plus args.")); + } + + /* if both left & right are in bit + space */ + if (AOP_TYPE (IC_LEFT (ic)) == AOP_CRY && + AOP_TYPE (IC_RIGHT (ic)) == AOP_CRY) + { + genPlusBits (ic); + goto release; + } + + /* if left in bit space & right literal */ + if (AOP_TYPE (IC_LEFT (ic)) == AOP_CRY && + AOP_TYPE (IC_RIGHT (ic)) == AOP_LIT) + { + emitcode ("mov", "c,%s", AOP (IC_LEFT (ic))->aopu.aop_dir); + /* if result in bit space */ + if (AOP_TYPE (IC_RESULT (ic)) == AOP_CRY) + { + if (ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit) != 0L) + emitcode ("cpl", "c"); + outBitC (IC_RESULT (ic)); + } + else + { + size = getDataSize (IC_RESULT (ic)); + _startLazyDPSEvaluation (); + while (size--) + { + MOVA (aopGet (IC_RIGHT (ic), offset, FALSE, FALSE, NULL)); + emitcode ("addc", "a,%s", zero); + aopPut (IC_RESULT (ic), "a", offset++); + } + _endLazyDPSEvaluation (); + } + goto release; + } + + /* if I can do an increment instead + of add then GOOD for ME */ + if (genPlusIncr (ic) == TRUE) + { + D (emitcode (";", "did genPlusIncr")); + goto release; + } + + } + size = getDataSize (pushResult ? IC_LEFT (ic) : IC_RESULT (ic)); + + _startLazyDPSEvaluation (); + while (size--) + { + if (AOP_TYPE(IC_LEFT(ic)) == AOP_ACC && !AOP_NEEDSACC(IC_RIGHT(ic))) + { + MOVA (aopGet (IC_LEFT (ic), offset, FALSE, FALSE, NULL)); + if (offset == 0) + emitcode ("add", "a,%s", + aopGet (IC_RIGHT (ic), offset, FALSE, FALSE, NULL)); + else + emitcode ("addc", "a,%s", + aopGet (IC_RIGHT (ic), offset, FALSE, FALSE, NULL)); + } + else + { + if (AOP_TYPE(IC_LEFT(ic)) == AOP_ACC && (offset == 0)) + { + /* right is going to use ACC or we would have taken the + * above branch. + */ + assert(AOP_NEEDSACC(IC_RIGHT(ic))); + TR_AP("#3"); + D(emitcode(";", "+ AOP_ACC special case.");); + emitcode("xch", "a, %s", DP2_RESULT_REG); + } + MOVA (aopGet (IC_RIGHT (ic), offset, FALSE, FALSE, NULL)); + if (offset == 0) + { + if (AOP_TYPE(IC_LEFT(ic)) == AOP_ACC) + { + TR_AP("#4"); + emitcode("add", "a, %s", DP2_RESULT_REG); + } + else + { + emitcode ("add", "a,%s", + aopGet (IC_LEFT(ic), offset, FALSE, FALSE, + DP2_RESULT_REG)); + } + } + else + { + emitcode ("addc", "a,%s", + aopGet (IC_LEFT (ic), offset, FALSE, FALSE, + DP2_RESULT_REG)); + } + } + if (!pushResult) + { + aopPut (IC_RESULT (ic), "a", offset); + } + else + { + emitcode ("push", "acc"); + } + offset++; + } + _endLazyDPSEvaluation (); + + if (pushResult) + { + aopOp (IC_RESULT (ic), ic, TRUE, FALSE); + + size = getDataSize (IC_LEFT (ic)); + rSize = getDataSize (IC_RESULT (ic)); + + ADJUST_PUSHED_RESULT(size, rSize); + + _startLazyDPSEvaluation (); + while (size--) + { + emitcode ("pop", "acc"); + aopPut (IC_RESULT (ic), "a", size); + } + _endLazyDPSEvaluation (); + } + + adjustArithmeticResult (ic); + +release: + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + if (!swappedLR) + { + freeAsmop (IC_RIGHT (ic), NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (IC_LEFT (ic), NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + } + else + { + freeAsmop (IC_LEFT (ic), NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (IC_RIGHT (ic), NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + } +} + +/*-----------------------------------------------------------------*/ +/* genMinusDec :- does subtraction with decrement if possible */ +/*-----------------------------------------------------------------*/ +static bool +genMinusDec (iCode * ic) +{ + unsigned int icount; + unsigned int size = getDataSize (IC_RESULT (ic)); + + /* will try to generate an increment */ + /* if the right side is not a literal + we cannot */ + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) + return FALSE; + + /* if the literal value of the right hand side + is greater than 4 then it is not worth it */ + if ((icount = (unsigned int) ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit)) > 4) + return FALSE; + + if (size == 1 && AOP(IC_LEFT(ic)) == AOP(IC_RESULT(ic)) && + AOP_TYPE(IC_LEFT(ic)) == AOP_DIR ) { + while (icount--) { + emitcode("dec","%s",aopGet(IC_RESULT(ic),0,FALSE,FALSE,NULL)); + } + return TRUE; + } + /* if decrement 16 bits in register */ + if (AOP_TYPE (IC_LEFT (ic)) == AOP_REG && + AOP_TYPE (IC_RESULT (ic)) == AOP_REG && + sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic))) && + (size > 1) && + (icount == 1)) + { + symbol *tlbl; + int emitTlbl; + int labelRange; + char *l; + + /* If the next instruction is a goto and the goto target + * is <= 5 instructions previous to this, we can generate + * jumps straight to that target. + */ + if (ic->next && ic->next->op == GOTO + && (labelRange = findLabelBackwards (ic, IC_LABEL (ic->next)->key)) != 0 + && labelRange <= 5) + { + D (emitcode (";", "tail decrement optimized (range %d)", labelRange)); + tlbl = IC_LABEL (ic->next); + emitTlbl = 0; + } + else + { + tlbl = newiTempLabel (NULL); + emitTlbl = 1; + } + + l = aopGet (IC_RESULT (ic), LSB, FALSE, FALSE, NULL); + emitcode ("dec", "%s", l); + + if (AOP_TYPE (IC_RESULT (ic)) == AOP_REG || + AOP_TYPE (IC_RESULT (ic)) == AOP_DPTR || + IS_AOP_PREG (IC_RESULT (ic))) + { + emitcode ("cjne", "%s,#!constbyte,!tlabel", l, 0xff, tlbl->key + 100); + } + else + { + emitcode ("mov", "a,#!constbyte",0xff); + emitcode ("cjne", "a,%s,!tlabel", l, tlbl->key + 100); + } + l = aopGet (IC_RESULT (ic), MSB16, FALSE, FALSE, NULL); + emitcode ("dec", "%s", l); + if (size > 2) + { + if (!strcmp(l, "acc")) + { + emitcode("jnz", "!tlabel", tlbl->key + 100); + } + else if (AOP_TYPE (IC_RESULT (ic)) == AOP_REG || + AOP_TYPE (IC_RESULT (ic)) == AOP_DPTR || + IS_AOP_PREG (IC_RESULT (ic))) + { + emitcode ("cjne", "%s,#!constbyte,!tlabel", l, 0xff, tlbl->key + 100); + } + else + { + emitcode ("mov", "a,#!constbyte",0xff); + emitcode ("cjne", "a,%s,!tlabel", l, tlbl->key + 100); + } + l = aopGet (IC_RESULT (ic), MSB24, FALSE, FALSE, NULL); + emitcode ("dec", "%s", l); + } + if (size > 3) + { + if (!strcmp(l, "acc")) + { + emitcode("jnz", "!tlabel", tlbl->key + 100); + } + else if (AOP_TYPE (IC_RESULT (ic)) == AOP_REG || + AOP_TYPE (IC_RESULT (ic)) == AOP_DPTR || + IS_AOP_PREG (IC_RESULT (ic))) + { + emitcode ("cjne", "%s,#!constbyte,!tlabel", l, 0xff, tlbl->key + 100); + } + else + { + emitcode ("mov", "a,#!constbyte",0xff); + emitcode ("cjne", "a,%s,!tlabel", l, tlbl->key + 100); + } + l = aopGet (IC_RESULT (ic), MSB32, FALSE, FALSE, NULL); + emitcode ("dec", "%s", l); + } + if (emitTlbl) + { + emitLabel (tlbl); + } + return TRUE; + } + + /* if the sizes are greater than 1 then we cannot */ + if (AOP_SIZE (IC_RESULT (ic)) > 1 || + AOP_SIZE (IC_LEFT (ic)) > 1) + return FALSE; + + /* we can if the aops of the left & result match or + if they are in registers and the registers are the + same */ + if ( + AOP_TYPE (IC_LEFT (ic)) == AOP_REG && + AOP_TYPE (IC_RESULT (ic)) == AOP_REG && + sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic)))) + { + char *l; + + if (aopGetUsesAcc (IC_LEFT (ic), 0)) + { + MOVA (aopGet (IC_RESULT (ic), 0, FALSE, FALSE, NULL)); + l = "a"; + } + else + { + l = aopGet (IC_RESULT (ic), 0, FALSE, FALSE, NULL); + } + + _startLazyDPSEvaluation (); + while (icount--) + { + emitcode ("dec", "%s", l); + } + _endLazyDPSEvaluation (); + + if (AOP_NEEDSACC (IC_RESULT (ic))) + aopPut (IC_RESULT (ic), "a", 0); + + return TRUE; + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* addSign - complete with sign */ +/*-----------------------------------------------------------------*/ +static void +addSign (operand * result, int offset, int sign) +{ + int size = (getDataSize (result) - offset); + if (size > 0) + { + _startLazyDPSEvaluation(); + if (sign) + { + emitcode ("rlc", "a"); + emitcode ("subb", "a,acc"); + while (size--) + { + aopPut (result, "a", offset++); + } + } + else + { + while (size--) + { + aopPut (result, zero, offset++); + } + } + _endLazyDPSEvaluation(); + } +} + +/*-----------------------------------------------------------------*/ +/* genMinusBits - generates code for subtraction of two bits */ +/*-----------------------------------------------------------------*/ +static void +genMinusBits (iCode * ic) +{ + symbol *lbl = newiTempLabel (NULL); + + D (emitcode (";", "genMinusBits")); + + if (AOP_TYPE (IC_RESULT (ic)) == AOP_CRY) + { + emitcode ("mov", "c,%s", AOP (IC_LEFT (ic))->aopu.aop_dir); + emitcode ("jnb", "%s,!tlabel", AOP (IC_RIGHT (ic))->aopu.aop_dir, (lbl->key + 100)); + emitcode ("cpl", "c"); + emitLabel (lbl); + outBitC (IC_RESULT (ic)); + } + else + { + emitcode ("mov", "c,%s", AOP (IC_RIGHT (ic))->aopu.aop_dir); + emitcode ("subb", "a,acc"); + emitcode ("jnb", "%s,!tlabel", AOP (IC_LEFT (ic))->aopu.aop_dir, (lbl->key + 100)); + emitcode ("inc", "a"); + emitLabel (lbl); + aopPut (IC_RESULT (ic), "a", 0); + addSign (IC_RESULT (ic), MSB16, SPEC_USIGN (getSpec (operandType (IC_RESULT (ic))))); + } +} + +/*-----------------------------------------------------------------*/ +/* genMinus - generates code for subtraction */ +/*-----------------------------------------------------------------*/ +static void +genMinus (iCode * ic) +{ + int size, offset = 0; + int rSize; + long lit = 0L; + bool pushResult; + + D (emitcode (";", "genMinus")); + + AOP_OP_3_NOFATAL(ic, pushResult); + + if (!pushResult) + { + /* special cases :- */ + /* if both left & right are in bit space */ + if (AOP_TYPE (IC_LEFT (ic)) == AOP_CRY && + AOP_TYPE (IC_RIGHT (ic)) == AOP_CRY) + { + genMinusBits (ic); + goto release; + } + + /* if I can do an decrement instead + of subtract then GOOD for ME */ + if (genMinusDec (ic) == TRUE) + goto release; + + } + + size = getDataSize (pushResult ? IC_LEFT (ic) : IC_RESULT (ic)); + + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) + { + CLRC; + } + else + { + lit = (long) ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit); + lit = -lit; + } + + + /* if literal, add a,#-lit, else normal subb */ + _startLazyDPSEvaluation (); + while (size--) { + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) { + if (AOP_USESDPTR(IC_RIGHT(ic))) { + emitcode ("mov","b,%s", + aopGet (IC_RIGHT (ic), offset, FALSE, FALSE, NULL)); + MOVA (aopGet (IC_LEFT (ic), offset, FALSE, FALSE, NULL)); + emitcode ("subb","a,b"); + } else { + MOVA (aopGet (IC_LEFT (ic), offset, FALSE, FALSE, NULL)); + emitcode ("subb", "a,%s", + aopGet (IC_RIGHT (ic), offset, FALSE, FALSE, + DP2_RESULT_REG)); + } + } else { + MOVA (aopGet (IC_LEFT (ic), offset, FALSE, FALSE, NULL)); + /* first add without previous c */ + if (!offset) { + if (!size && lit==-1) { + emitcode ("dec", "a"); + } else { + emitcode ("add", "a,#!constbyte", + (unsigned int) (lit & 0x0FFL)); + } + } else { + emitcode ("addc", "a,#!constbyte", + (unsigned int) ((lit >> (offset * 8)) & 0x0FFL)); + } + } + + if (pushResult) { + emitcode ("push", "acc"); + } else { + aopPut (IC_RESULT (ic), "a", offset); + } + offset++; + } + _endLazyDPSEvaluation (); + + if (pushResult) + { + aopOp (IC_RESULT (ic), ic, TRUE, FALSE); + + size = getDataSize (IC_LEFT (ic)); + rSize = getDataSize (IC_RESULT (ic)); + + ADJUST_PUSHED_RESULT(size, rSize); + + _startLazyDPSEvaluation (); + while (size--) + { + emitcode ("pop", "acc"); + aopPut (IC_RESULT (ic), "a", size); + } + _endLazyDPSEvaluation (); + } + + adjustArithmeticResult (ic); + +release: + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + freeAsmop (IC_RIGHT (ic), NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (IC_LEFT (ic), NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); +} + + +/*-----------------------------------------------------------------*/ +/* genMultbits :- multiplication of bits */ +/*-----------------------------------------------------------------*/ +static void +genMultbits (operand * left, + operand * right, + operand * result, + iCode * ic) +{ + D (emitcode (";", "genMultbits")); + + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + emitcode ("anl", "c,%s", AOP (right)->aopu.aop_dir); + aopOp(result, ic, TRUE, FALSE); + outBitC (result); +} + +/*-----------------------------------------------------------------*/ +/* genMultOneByte : 8*8=8/16 bit multiplication */ +/*-----------------------------------------------------------------*/ +static void +genMultOneByte (operand * left, + operand * right, + operand * result, + iCode * ic) +{ + symbol *lbl; + int size; + bool runtimeSign, compiletimeSign; + bool lUnsigned, rUnsigned, pushedB; + + /* (if two literals: the value is computed before) */ + /* if one literal, literal on the right */ + if (AOP_TYPE (left) == AOP_LIT) + { + operand *t = right; + right = left; + left = t; + /* emitcode (";", "swapped left and right"); */ + } + /* if no literal, unsigned on the right: shorter code */ + if ( AOP_TYPE (right) != AOP_LIT + && SPEC_USIGN (getSpec (operandType (left)))) + { + operand *t = right; + right = left; + left = t; + } + + lUnsigned = SPEC_USIGN (getSpec (operandType (left))); + rUnsigned = SPEC_USIGN (getSpec (operandType (right))); + + pushedB = pushB (); + + if ((lUnsigned && rUnsigned) +/* sorry, I don't know how to get size + without calling aopOp (result,...); + see Feature Request */ + /* || size == 1 */ ) /* no, this is not a bug; with a 1 byte result there's + no need to take care about the signedness! */ + { + /* just an unsigned 8 * 8 = 8 multiply + or 8u * 8u = 16u */ + /* emitcode (";","unsigned"); */ + emitcode ("mov", "b,%s", aopGet (right, 0, FALSE, FALSE, NULL)); + MOVA (aopGet (left, 0, FALSE, FALSE, NULL)); + emitcode ("mul", "ab"); + + _G.accInUse++; + aopOp (result, ic, TRUE, FALSE); + size = AOP_SIZE (result); + + if (size < 1 || size > 2) + { + /* this should never happen */ + fprintf (stderr, "size!=1||2 (%d) in %s at line:%d \n", + size, __FILE__, lineno); + exit (1); + } + + aopPut (result, "a", 0); + _G.accInUse--; + if (size == 2) + aopPut (result, "b", 1); + + popB (pushedB); + return; + } + + /* we have to do a signed multiply */ + /* emitcode (";", "signed"); */ + + /* now sign adjust for both left & right */ + + /* let's see what's needed: */ + /* apply negative sign during runtime */ + runtimeSign = FALSE; + /* negative sign from literals */ + compiletimeSign = FALSE; + + if (!lUnsigned) + { + if (AOP_TYPE(left) == AOP_LIT) + { + /* signed literal */ + signed char val = (char) ulFromVal (AOP (left)->aopu.aop_lit); + if (val < 0) + compiletimeSign = TRUE; + } + else + /* signed but not literal */ + runtimeSign = TRUE; + } + + if (!rUnsigned) + { + if (AOP_TYPE(right) == AOP_LIT) + { + /* signed literal */ + signed char val = (char) ulFromVal (AOP (right)->aopu.aop_lit); + if (val < 0) + compiletimeSign ^= TRUE; + } + else + /* signed but not literal */ + runtimeSign = TRUE; + } + + /* initialize F0, which stores the runtime sign */ + if (runtimeSign) + { + if (compiletimeSign) + emitcode ("setb", "F0"); /* set sign flag */ + else + emitcode ("clr", "F0"); /* reset sign flag */ + } + + /* save the signs of the operands */ + if (AOP_TYPE(right) == AOP_LIT) + { + signed char val = (char) ulFromVal (AOP (right)->aopu.aop_lit); + + if (!rUnsigned && val < 0) + emitcode ("mov", "b,#!constbyte", -val); + else + emitcode ("mov", "b,#!constbyte", (unsigned char) val); + } + else /* ! literal */ + { + if (rUnsigned) /* emitcode (";", "signed"); */ + emitcode ("mov", "b,%s", aopGet (right, 0, FALSE, FALSE, NULL)); + else + { + MOVA (aopGet (right, 0, FALSE, FALSE, NULL)); + lbl = newiTempLabel (NULL); + emitcode ("jnb", "acc.7,!tlabel", lbl->key + 100); + emitcode ("cpl", "F0"); /* complement sign flag */ + emitcode ("cpl", "a"); /* 2's complement */ + emitcode ("inc", "a"); + emitLabel (lbl); + emitcode ("mov", "b,a"); + } + } + + if (AOP_TYPE(left) == AOP_LIT) + { + signed char val = (char) ulFromVal (AOP (left)->aopu.aop_lit); + + if (!lUnsigned && val < 0) + emitcode ("mov", "a,#!constbyte", -val); + else + emitcode ("mov", "a,#!constbyte", (unsigned char) val); + } + else /* ! literal */ + { + MOVA (aopGet (left, 0, FALSE, FALSE, NULL)); + + if (!lUnsigned) /* emitcode (";", "signed"); */ + { + lbl = newiTempLabel (NULL); + emitcode ("jnb", "acc.7,!tlabel", lbl->key + 100); + emitcode ("cpl", "F0"); /* complement sign flag */ + emitcode ("cpl", "a"); /* 2's complement */ + emitcode ("inc", "a"); + emitLabel (lbl); + } + } + + /* now the multiplication */ + emitcode ("mul", "ab"); + _G.accInUse++; + aopOp(result, ic, TRUE, FALSE); + size = AOP_SIZE (result); + + if (size < 1 || size > 2) + { + /* this should never happen */ + fprintf (stderr, "size!=1||2 (%d) in %s at line:%d \n", + size, __FILE__, lineno); + exit (1); + } + + if (runtimeSign || compiletimeSign) + { + lbl = newiTempLabel (NULL); + if (runtimeSign) + emitcode ("jnb", "F0,!tlabel", lbl->key + 100); + emitcode ("cpl", "a"); /* lsb 2's complement */ + if (size != 2) + emitcode ("inc", "a"); /* inc doesn't set carry flag */ + else + { + emitcode ("add", "a,#0x01"); /* this sets carry flag */ + emitcode ("xch", "a,b"); + emitcode ("cpl", "a"); /* msb 2's complement */ + emitcode ("addc", "a,#0x00"); + emitcode ("xch", "a,b"); + } + emitLabel (lbl); + } + aopPut (result, "a", 0); + _G.accInUse--; + if (size == 2) + aopPut (result, "b", 1); + + popB (pushedB); +} + +/*-----------------------------------------------------------------*/ +/* genMultTwoByte - use the DS390 MAC unit to do 16*16 multiply */ +/*-----------------------------------------------------------------*/ +static void genMultTwoByte (operand *left, operand *right, + operand *result, iCode *ic) +{ + sym_link *retype = getSpec(operandType(right)); + sym_link *letype = getSpec(operandType(left)); + int umult = SPEC_USIGN(retype) | SPEC_USIGN(letype); + symbol *lbl; + + if (AOP_TYPE (left) == AOP_LIT) { + operand *t = right; + right = left; + left = t; + } + /* save EA bit in F1 */ + lbl = newiTempLabel(NULL); + emitcode ("setb","F1"); + emitcode ("jbc","EA,!tlabel",lbl->key+100); + emitcode ("clr","F1"); + emitLabel (lbl); + + /* load up MB with right */ + if (!umult) { + emitcode("clr","F0"); + if (AOP_TYPE(right) == AOP_LIT) { + int val=(int) ulFromVal (AOP (right)->aopu.aop_lit); + if (val < 0) { + emitcode("setb","F0"); + val = -val; + } + emitcode ("mov","mb,#!constbyte",val & 0xff); + emitcode ("mov","mb,#!constbyte",(val >> 8) & 0xff); + } else { + lbl = newiTempLabel(NULL); + emitcode ("mov","b,%s",aopGet(right,0,FALSE,FALSE,NULL)); + emitcode ("mov","a,%s",aopGet(right,1,FALSE,FALSE,NULL)); + emitcode ("jnb","acc.7,!tlabel",lbl->key+100); + emitcode ("xch", "a,b"); + emitcode ("cpl","a"); + emitcode ("add", "a,#1"); + emitcode ("xch", "a,b"); + emitcode ("cpl", "a"); // msb + emitcode ("addc", "a,#0"); + emitcode ("setb","F0"); + emitLabel (lbl); + emitcode ("mov","mb,b"); + emitcode ("mov","mb,a"); + } + } else { + emitcode ("mov","mb,%s",aopGet(right,0,FALSE,FALSE,NULL)); + emitcode ("mov","mb,%s",aopGet(right,1,FALSE,FALSE,NULL)); + } + /* load up MA with left */ + if (!umult) { + lbl = newiTempLabel(NULL); + emitcode ("mov","b,%s",aopGet(left,0,FALSE,FALSE,NULL)); + emitcode ("mov","a,%s",aopGet(left,1,FALSE,FALSE,NULL)); + emitcode ("jnb","acc.7,!tlabel",lbl->key+100); + emitcode ("xch", "a,b"); + emitcode ("cpl","a"); + emitcode ("add", "a,#1"); + emitcode ("xch", "a,b"); + emitcode ("cpl", "a"); // msb + emitcode ("addc","a,#0"); + emitcode ("jbc","F0,!tlabel",lbl->key+100); + emitcode ("setb","F0"); + emitLabel (lbl); + emitcode ("mov","ma,b"); + emitcode ("mov","ma,a"); + } else { + emitcode ("mov","ma,%s",aopGet(left,0,FALSE,FALSE,NULL)); + emitcode ("mov","ma,%s",aopGet(left,1,FALSE,FALSE,NULL)); + } + /* wait for multiplication to finish */ + lbl = newiTempLabel(NULL); + emitLabel (lbl); + emitcode("mov","a,mcnt1"); + emitcode("anl","a,#!constbyte",0x80); + emitcode("jnz","!tlabel",lbl->key+100); + + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (right, NULL, ic,TRUE); + aopOp(result, ic, TRUE, FALSE); + + /* if unsigned then simple */ + if (umult) { + emitcode ("mov","a,ma"); + if (AOP_SIZE(result) >= 4) aopPut(result,"a",3); + emitcode ("mov","a,ma"); + if (AOP_SIZE(result) >= 3) aopPut(result,"a",2); + aopPut(result,"ma",1); + aopPut(result,"ma",0); + } else { + emitcode("push","ma"); + emitcode("push","ma"); + emitcode("push","ma"); + MOVA("ma"); + /* negate result if needed */ + lbl = newiTempLabel(NULL); + emitcode("jnb","F0,!tlabel",lbl->key+100); + emitcode("cpl","a"); + emitcode("add","a,#1"); + emitLabel (lbl); + if (AOP_TYPE(result) == AOP_ACC) + { + D (emitcode(";", "ACC special case.")); + /* We know result is the only live aop, and + * it's obviously not a DPTR2, so AP is available. + */ + emitcode("mov", "%s,acc", DP2_RESULT_REG); + } + else + { + aopPut(result,"a",0); + } + + emitcode("pop","acc"); + lbl = newiTempLabel(NULL); + emitcode("jnb","F0,!tlabel",lbl->key+100); + emitcode("cpl","a"); + emitcode("addc","a,#0"); + emitLabel (lbl); + aopPut(result,"a",1); + emitcode("pop","acc"); + if (AOP_SIZE(result) >= 3) { + lbl = newiTempLabel(NULL); + emitcode("jnb","F0,!tlabel",lbl->key+100); + emitcode("cpl","a"); + emitcode("addc","a,#0"); + emitLabel (lbl); + aopPut(result,"a",2); + } + emitcode("pop","acc"); + if (AOP_SIZE(result) >= 4) { + lbl = newiTempLabel(NULL); + emitcode("jnb","F0,!tlabel",lbl->key+100); + emitcode("cpl","a"); + emitcode("addc","a,#0"); + emitLabel (lbl); + aopPut(result,"a",3); + } + if (AOP_TYPE(result) == AOP_ACC) + { + /* We stashed the result away above. */ + emitcode("mov", "acc,%s", DP2_RESULT_REG); + } + + } + freeAsmop (result, NULL, ic, TRUE); + + /* restore EA bit in F1 */ + lbl = newiTempLabel(NULL); + emitcode ("jnb","F1,!tlabel",lbl->key+100); + emitcode ("setb","EA"); + emitLabel (lbl); + return ; +} + +/*-----------------------------------------------------------------*/ +/* genMult - generates code for multiplication */ +/*-----------------------------------------------------------------*/ +static void +genMult (iCode * ic) +{ + operand *left = IC_LEFT (ic); + operand *right = IC_RIGHT (ic); + operand *result = IC_RESULT (ic); + + D (emitcode (";", "genMult")); + + /* assign the asmops */ + AOP_OP_2 (ic); + + /* special cases first */ + /* both are bits */ + if (AOP_TYPE (left) == AOP_CRY && + AOP_TYPE (right) == AOP_CRY) + { + genMultbits (left, right, result, ic); + goto release; + } + + /* if both are of size == 1 */ + if (AOP_SIZE (left) == 1 && + AOP_SIZE (right) == 1) + { + genMultOneByte (left, right, result, ic); + goto release; + } + + if (AOP_SIZE (left) == 2 && AOP_SIZE(right) == 2) { + /* use the ds390 ARITHMETIC accel UNIT */ + genMultTwoByte (left, right, result, ic); + return ; + } + /* should have been converted to function call */ + assert (0); + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); +} + +/*-----------------------------------------------------------------*/ +/* genDivbits :- division of bits */ +/*-----------------------------------------------------------------*/ +static void +genDivbits (operand * left, + operand * right, + operand * result, + iCode * ic) +{ + char *l; + bool pushedB; + + D(emitcode (";", "genDivbits")); + + pushedB = pushB (); + + /* the result must be bit */ + LOAD_AB_FOR_DIV (left, right, l); + emitcode ("div", "ab"); + emitcode ("rrc", "a"); + aopOp(result, ic, TRUE, FALSE); + + popB (pushedB); + + aopPut (result, "c", 0); +} + +/*-----------------------------------------------------------------*/ +/* genDivOneByte : 8 bit division */ +/*-----------------------------------------------------------------*/ +static void +genDivOneByte (operand * left, + operand * right, + operand * result, + iCode * ic) +{ + bool lUnsigned, rUnsigned, pushedB; + bool runtimeSign, compiletimeSign; + char *l; + symbol *lbl; + int size, offset; + + D(emitcode (";", "genDivOneByte")); + + offset = 1; + lUnsigned = SPEC_USIGN (getSpec (operandType (left))); + rUnsigned = SPEC_USIGN (getSpec (operandType (right))); + + pushedB = pushB (); + + /* signed or unsigned */ + if (lUnsigned && rUnsigned) + { + /* unsigned is easy */ + LOAD_AB_FOR_DIV (left, right, l); + emitcode ("div", "ab"); + + _G.accInUse++; + aopOp (result, ic, TRUE, FALSE); + aopPut (result, "a", 0); + _G.accInUse--; + + size = AOP_SIZE (result) - 1; + + while (size--) + aopPut (result, zero, offset++); + + popB (pushedB); + return; + } + + /* signed is a little bit more difficult */ + + /* now sign adjust for both left & right */ + + /* let's see what's needed: */ + /* apply negative sign during runtime */ + runtimeSign = FALSE; + /* negative sign from literals */ + compiletimeSign = FALSE; + + if (!lUnsigned) + { + if (AOP_TYPE(left) == AOP_LIT) + { + /* signed literal */ + signed char val = (char) ulFromVal (AOP (left)->aopu.aop_lit); + if (val < 0) + compiletimeSign = TRUE; + } + else + /* signed but not literal */ + runtimeSign = TRUE; + } + + if (!rUnsigned) + { + if (AOP_TYPE(right) == AOP_LIT) + { + /* signed literal */ + signed char val = (char) ulFromVal (AOP (right)->aopu.aop_lit); + if (val < 0) + compiletimeSign ^= TRUE; + } + else + /* signed but not literal */ + runtimeSign = TRUE; + } + + /* initialize F0, which stores the runtime sign */ + if (runtimeSign) + { + if (compiletimeSign) + emitcode ("setb", "F0"); /* set sign flag */ + else + emitcode ("clr", "F0"); /* reset sign flag */ + } + + /* save the signs of the operands */ + if (AOP_TYPE(right) == AOP_LIT) + { + signed char val = (char) ulFromVal (AOP (right)->aopu.aop_lit); + + if (!rUnsigned && val < 0) + emitcode ("mov", "b,#0x%02x", -val); + else + emitcode ("mov", "b,#0x%02x", (unsigned char) val); + } + else /* ! literal */ + { + if (rUnsigned) + emitcode ("mov", "b,%s", aopGet (right, 0, FALSE, FALSE, NULL)); + else + { + MOVA (aopGet (right, 0, FALSE, FALSE, NULL)); + lbl = newiTempLabel (NULL); + emitcode ("jnb", "acc.7,!tlabel", lbl->key + 100); + emitcode ("cpl", "F0"); /* complement sign flag */ + emitcode ("cpl", "a"); /* 2's complement */ + emitcode ("inc", "a"); + emitLabel (lbl); + emitcode ("mov", "b,a"); + } + } + + if (AOP_TYPE(left) == AOP_LIT) + { + signed char val = (char) ulFromVal (AOP (left)->aopu.aop_lit); + + if (!lUnsigned && val < 0) + emitcode ("mov", "a,#0x%02x", -val); + else + emitcode ("mov", "a,#0x%02x", (unsigned char) val); + } + else /* ! literal */ + { + MOVA (aopGet (left, 0, FALSE, FALSE, NULL)); + + if (!lUnsigned) + { + lbl = newiTempLabel (NULL); + emitcode ("jnb", "acc.7,!tlabel", lbl->key + 100); + emitcode ("cpl", "F0"); /* complement sign flag */ + emitcode ("cpl", "a"); /* 2's complement */ + emitcode ("inc", "a"); + emitLabel (lbl); + } + } + + /* now the division */ + emitcode ("nop", "; workaround for DS80C390 div bug."); + emitcode ("div", "ab"); + + if (runtimeSign || compiletimeSign) + { + lbl = newiTempLabel (NULL); + if (runtimeSign) + emitcode ("jnb", "F0,!tlabel", lbl->key + 100); + emitcode ("cpl", "a"); /* lsb 2's complement */ + emitcode ("inc", "a"); + emitLabel (lbl); + + _G.accInUse++; + aopOp (result, ic, TRUE, FALSE); + size = AOP_SIZE (result) - 1; + + if (size > 0) + { + /* 123 look strange, but if (OP_SYMBOL (op)->accuse == 1) + then the result will be in b, a */ + emitcode ("mov", "b,a"); /* 1 */ + /* msb is 0x00 or 0xff depending on the sign */ + if (runtimeSign) + { + emitcode ("mov", "c,F0"); + emitcode ("subb", "a,acc"); + emitcode ("xch", "a,b"); /* 2 */ + while (size--) + aopPut (result, "b", offset++); /* write msb's */ + } + else /* compiletimeSign */ + while (size--) + aopPut (result, "#0xff", offset++); /* write msb's */ + } + aopPut (result, "a", 0); /* 3: write lsb */ + } + else + { + _G.accInUse++; + aopOp(result, ic, TRUE, FALSE); + size = AOP_SIZE (result) - 1; + + aopPut (result, "a", 0); + while (size--) + aopPut (result, zero, offset++); + } + _G.accInUse--; + popB (pushedB); +} + +/*-----------------------------------------------------------------*/ +/* genDivTwoByte - use the DS390 MAC unit to do 16/16 divide */ +/*-----------------------------------------------------------------*/ +static void genDivTwoByte (operand *left, operand *right, + operand *result, iCode *ic) +{ + sym_link *retype = getSpec(operandType(right)); + sym_link *letype = getSpec(operandType(left)); + int umult = SPEC_USIGN(retype) | SPEC_USIGN(letype); + symbol *lbl; + + /* save EA bit in F1 */ + lbl = newiTempLabel(NULL); + emitcode ("setb","F1"); + emitcode ("jbc","EA,!tlabel",lbl->key+100); + emitcode ("clr","F1"); + emitLabel (lbl); + + /* load up MA with left */ + if (!umult) { + emitcode("clr","F0"); + lbl = newiTempLabel(NULL); + emitcode ("mov","b,%s",aopGet(left,0,FALSE,FALSE,NULL)); + emitcode ("mov","a,%s",aopGet(left,1,FALSE,FALSE,NULL)); + emitcode ("jnb","acc.7,!tlabel",lbl->key+100); + emitcode ("xch", "a,b"); + emitcode ("cpl","a"); + emitcode ("add", "a,#1"); + emitcode ("xch", "a,b"); + emitcode ("cpl", "a"); // msb + emitcode ("addc","a,#0"); + emitcode ("setb","F0"); + emitLabel (lbl); + emitcode ("mov","ma,b"); + emitcode ("mov","ma,a"); + } else { + emitcode ("mov","ma,%s",aopGet(left,0,FALSE,FALSE,NULL)); + emitcode ("mov","ma,%s",aopGet(left,1,FALSE,FALSE,NULL)); + } + + /* load up MB with right */ + if (!umult) { + if (AOP_TYPE(right) == AOP_LIT) { + int val=(int) ulFromVal (AOP (right)->aopu.aop_lit); + if (val < 0) { + lbl = newiTempLabel(NULL); + emitcode ("jbc","F0,!tlabel",lbl->key+100); + emitcode("setb","F0"); + emitLabel (lbl); + val = -val; + } + emitcode ("mov","mb,#!constbyte",val & 0xff); + emitcode ("mov","mb,#!constbyte",(val >> 8) & 0xff); + } else { + lbl = newiTempLabel(NULL); + emitcode ("mov","b,%s",aopGet(right,0,FALSE,FALSE,NULL)); + emitcode ("mov","a,%s",aopGet(right,1,FALSE,FALSE,NULL)); + emitcode ("jnb","acc.7,!tlabel",lbl->key+100); + emitcode ("xch", "a,b"); + emitcode ("cpl","a"); + emitcode ("add", "a,#1"); + emitcode ("xch", "a,b"); + emitcode ("cpl", "a"); // msb + emitcode ("addc", "a,#0"); + emitcode ("jbc","F0,!tlabel",lbl->key+100); + emitcode ("setb","F0"); + emitLabel (lbl); + emitcode ("mov","mb,b"); + emitcode ("mov","mb,a"); + } + } else { + emitcode ("mov","mb,%s",aopGet(right,0,FALSE,FALSE,NULL)); + emitcode ("mov","mb,%s",aopGet(right,1,FALSE,FALSE,NULL)); + } + + /* wait for multiplication to finish */ + lbl = newiTempLabel(NULL); + emitLabel (lbl); + emitcode("mov","a,mcnt1"); + emitcode("anl","a,#!constbyte",0x80); + emitcode("jnz","!tlabel",lbl->key+100); + + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (right, NULL, ic,TRUE); + aopOp(result, ic, TRUE, FALSE); + + /* if unsigned then simple */ + if (umult) { + aopPut(result,"ma",1); + aopPut(result,"ma",0); + } else { + emitcode("push","ma"); + MOVA("ma"); + /* negate result if needed */ + lbl = newiTempLabel(NULL); + emitcode("jnb","F0,!tlabel",lbl->key+100); + emitcode("cpl","a"); + emitcode("add","a,#1"); + emitLabel (lbl); + aopPut(result,"a",0); + emitcode("pop","acc"); + lbl = newiTempLabel(NULL); + emitcode("jnb","F0,!tlabel",lbl->key+100); + emitcode("cpl","a"); + emitcode("addc","a,#0"); + emitLabel (lbl); + aopPut(result,"a",1); + } + freeAsmop (result, NULL, ic, TRUE); + /* restore EA bit in F1 */ + lbl = newiTempLabel(NULL); + emitcode ("jnb","F1,!tlabel",lbl->key+100); + emitcode ("setb","EA"); + emitLabel (lbl); + return ; +} + +/*-----------------------------------------------------------------*/ +/* genDiv - generates code for division */ +/*-----------------------------------------------------------------*/ +static void +genDiv (iCode * ic) +{ + operand *left = IC_LEFT (ic); + operand *right = IC_RIGHT (ic); + operand *result = IC_RESULT (ic); + + D (emitcode (";", "genDiv")); + + /* assign the amsops */ + AOP_OP_2 (ic); + + /* special cases first */ + /* both are bits */ + if (AOP_TYPE (left) == AOP_CRY && + AOP_TYPE (right) == AOP_CRY) + { + genDivbits (left, right, result, ic); + goto release; + } + + /* if both are of size == 1 */ + if (AOP_SIZE (left) == 1 && + AOP_SIZE (right) == 1) + { + genDivOneByte (left, right, result, ic); + goto release; + } + + if (AOP_SIZE (left) == 2 && AOP_SIZE(right) == 2) { + /* use the ds390 ARITHMETIC accel UNIT */ + genDivTwoByte (left, right, result, ic); + return ; + } + /* should have been converted to function call */ + assert (0); +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); +} + +/*-----------------------------------------------------------------*/ +/* genModbits :- modulus of bits */ +/*-----------------------------------------------------------------*/ +static void +genModbits (operand * left, + operand * right, + operand * result, + iCode * ic) +{ + char *l; + bool pushedB; + + D (emitcode (";", "genModbits")); + + pushedB = pushB (); + + /* the result must be bit */ + LOAD_AB_FOR_DIV (left, right, l); + emitcode ("div", "ab"); + emitcode ("mov", "a,b"); + emitcode ("rrc", "a"); + aopOp(result, ic, TRUE, FALSE); + + popB (pushedB); + + aopPut (result, "c", 0); +} + +/*-----------------------------------------------------------------*/ +/* genModOneByte : 8 bit modulus */ +/*-----------------------------------------------------------------*/ +static void +genModOneByte (operand * left, + operand * right, + operand * result, + iCode * ic) +{ + bool lUnsigned, rUnsigned, pushedB; + bool runtimeSign, compiletimeSign; + char *l; + symbol *lbl; + int size, offset; + + D (emitcode (";", "genModOneByte")); + + offset = 1; + lUnsigned = SPEC_USIGN (getSpec (operandType (left))); + rUnsigned = SPEC_USIGN (getSpec (operandType (right))); + + pushedB = pushB (); + + /* signed or unsigned */ + if (lUnsigned && rUnsigned) + { + /* unsigned is easy */ + LOAD_AB_FOR_DIV (left, right, l); + emitcode ("div", "ab"); + aopOp (result, ic, TRUE, FALSE); + aopPut (result, "b", 0); + + for (size = AOP_SIZE (result) - 1; size--;) + aopPut (result, zero, offset++); + + popB (pushedB); + return; + } + + /* signed is a little bit more difficult */ + + /* now sign adjust for both left & right */ + + /* modulus: sign of the right operand has no influence on the result! */ + if (AOP_TYPE(right) == AOP_LIT) + { + signed char val = (char) ulFromVal (AOP (right)->aopu.aop_lit); + + if (!rUnsigned && val < 0) + emitcode ("mov", "b,#0x%02x", -val); + else + emitcode ("mov", "b,#0x%02x", (unsigned char) val); + } + else /* not literal */ + { + if (rUnsigned) + emitcode ("mov", "b,%s", aopGet (right, 0, FALSE, FALSE, NULL)); + else + { + MOVA (aopGet (right, 0, FALSE, FALSE, NULL)); + lbl = newiTempLabel (NULL); + emitcode ("jnb", "acc.7,!tlabel", lbl->key + 100); + emitcode ("cpl", "a"); /* 2's complement */ + emitcode ("inc", "a"); + emitLabel (lbl); + emitcode ("mov", "b,a"); + } + } + + /* let's see what's needed: */ + /* apply negative sign during runtime */ + runtimeSign = FALSE; + /* negative sign from literals */ + compiletimeSign = FALSE; + + /* sign adjust left side */ + if (AOP_TYPE(left) == AOP_LIT) + { + signed char val = (char) ulFromVal (AOP (left)->aopu.aop_lit); + + if (!lUnsigned && val < 0) + { + compiletimeSign = TRUE; /* set sign flag */ + emitcode ("mov", "a,#0x%02x", -val); + } + else + emitcode ("mov", "a,#0x%02x", (unsigned char) val); + } + else /* ! literal */ + { + MOVA (aopGet (left, 0, FALSE, FALSE, NULL)); + + if (!lUnsigned) + { + runtimeSign = TRUE; + emitcode ("clr", "F0"); /* clear sign flag */ + + lbl = newiTempLabel (NULL); + emitcode ("jnb", "acc.7,!tlabel", lbl->key + 100); + emitcode ("setb", "F0"); /* set sign flag */ + emitcode ("cpl", "a"); /* 2's complement */ + emitcode ("inc", "a"); + emitLabel (lbl); + } + } + + /* now the modulus */ + emitcode ("nop", "; workaround for DS80C390 div bug."); + emitcode ("div", "ab"); + + if (runtimeSign || compiletimeSign) + { + emitcode ("mov", "a,b"); + lbl = newiTempLabel (NULL); + if (runtimeSign) + emitcode ("jnb", "F0,!tlabel", lbl->key + 100); + emitcode ("cpl", "a"); /* lsb 2's complement */ + emitcode ("inc", "a"); + emitLabel (lbl); + + _G.accInUse++; + aopOp (result, ic, TRUE, FALSE); + size = AOP_SIZE (result) - 1; + + if (size > 0) + { + /* 123 look strange, but if (OP_SYMBOL (op)->accuse == 1) + then the result will be in b, a */ + emitcode ("mov", "b,a"); /* 1 */ + /* msb is 0x00 or 0xff depending on the sign */ + if (runtimeSign) + { + emitcode ("mov", "c,F0"); + emitcode ("subb", "a,acc"); + emitcode ("xch", "a,b"); /* 2 */ + while (size--) + aopPut (result, "b", offset++); /* write msb's */ + } + else /* compiletimeSign */ + while (size--) + aopPut (result, "#0xff", offset++); /* write msb's */ + } + aopPut (result, "a", 0); /* 3: write lsb */ + } + else + { + _G.accInUse++; + aopOp(result, ic, TRUE, FALSE); + size = AOP_SIZE (result) - 1; + + aopPut (result, "b", 0); + while (size--) + aopPut (result, zero, offset++); + } + _G.accInUse--; + popB (pushedB); +} + +/*-----------------------------------------------------------------*/ +/* genModTwoByte - use the DS390 MAC unit to do 16%16 modulus */ +/*-----------------------------------------------------------------*/ +static void genModTwoByte (operand *left, operand *right, + operand *result, iCode *ic) +{ + sym_link *retype = getSpec(operandType(right)); + sym_link *letype = getSpec(operandType(left)); + int umult = SPEC_USIGN(retype) | SPEC_USIGN(letype); + symbol *lbl; + + /* load up MA with left */ + /* save EA bit in F1 */ + lbl = newiTempLabel(NULL); + emitcode ("setb","F1"); + emitcode ("jbc","EA,!tlabel",lbl->key+100); + emitcode ("clr","F1"); + emitLabel (lbl); + + if (!umult) { + lbl = newiTempLabel(NULL); + emitcode ("mov","b,%s",aopGet(left,0,FALSE,FALSE,NULL)); + emitcode ("mov","a,%s",aopGet(left,1,FALSE,FALSE,NULL)); + emitcode ("jnb","acc.7,!tlabel",lbl->key+100); + emitcode ("xch", "a,b"); + emitcode ("cpl","a"); + emitcode ("add", "a,#1"); + emitcode ("xch", "a,b"); + emitcode ("cpl", "a"); // msb + emitcode ("addc","a,#0"); + emitLabel (lbl); + emitcode ("mov","ma,b"); + emitcode ("mov","ma,a"); + } else { + emitcode ("mov","ma,%s",aopGet(left,0,FALSE,FALSE,NULL)); + emitcode ("mov","ma,%s",aopGet(left,1,FALSE,FALSE,NULL)); + } + + /* load up MB with right */ + if (!umult) { + if (AOP_TYPE(right) == AOP_LIT) { + int val=(int) ulFromVal (AOP (right)->aopu.aop_lit); + if (val < 0) { + val = -val; + } + emitcode ("mov","mb,#!constbyte",val & 0xff); + emitcode ("mov","mb,#!constbyte",(val >> 8) & 0xff); + } else { + lbl = newiTempLabel(NULL); + emitcode ("mov","b,%s",aopGet(right,0,FALSE,FALSE,NULL)); + emitcode ("mov","a,%s",aopGet(right,1,FALSE,FALSE,NULL)); + emitcode ("jnb","acc.7,!tlabel",lbl->key+100); + emitcode ("xch", "a,b"); + emitcode ("cpl","a"); + emitcode ("add", "a,#1"); + emitcode ("xch", "a,b"); + emitcode ("cpl", "a"); // msb + emitcode ("addc", "a,#0"); + emitLabel (lbl); + emitcode ("mov","mb,b"); + emitcode ("mov","mb,a"); + } + } else { + emitcode ("mov","mb,%s",aopGet(right,0,FALSE,FALSE,NULL)); + emitcode ("mov","mb,%s",aopGet(right,1,FALSE,FALSE,NULL)); + } + + /* wait for multiplication to finish */ + lbl = newiTempLabel(NULL); + emitLabel (lbl); + emitcode("mov","a,mcnt1"); + emitcode("anl","a,#!constbyte",0x80); + emitcode("jnz","!tlabel",lbl->key+100); + + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (right, NULL, ic,TRUE); + aopOp(result, ic, TRUE, FALSE); + + aopPut(result,"mb",1); + aopPut(result,"mb",0); + freeAsmop (result, NULL, ic, TRUE); + + /* restore EA bit in F1 */ + lbl = newiTempLabel(NULL); + emitcode ("jnb","F1,!tlabel",lbl->key+100); + emitcode ("setb","EA"); + emitLabel (lbl); +} + +/*-----------------------------------------------------------------*/ +/* genMod - generates code for division */ +/*-----------------------------------------------------------------*/ +static void +genMod (iCode * ic) +{ + operand *left = IC_LEFT (ic); + operand *right = IC_RIGHT (ic); + operand *result = IC_RESULT (ic); + + D (emitcode (";", "genMod")); + + /* assign the asmops */ + AOP_OP_2 (ic); + + /* special cases first */ + /* both are bits */ + if (AOP_TYPE (left) == AOP_CRY && + AOP_TYPE (right) == AOP_CRY) + { + genModbits (left, right, result, ic); + goto release; + } + + /* if both are of size == 1 */ + if (AOP_SIZE (left) == 1 && + AOP_SIZE (right) == 1) + { + genModOneByte (left, right, result, ic); + goto release; + } + + if (AOP_SIZE (left) == 2 && AOP_SIZE(right) == 2) { + /* use the ds390 ARITHMETIC accel UNIT */ + genModTwoByte (left, right, result, ic); + return ; + } + + /* should have been converted to function call */ + assert (0); + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); +} + +/*-----------------------------------------------------------------*/ +/* genIfxJump :- will create a jump depending on the ifx */ +/*-----------------------------------------------------------------*/ +static void +genIfxJump (iCode * ic, char *jval, iCode *popIc) +{ + symbol *jlbl; + symbol *tlbl = newiTempLabel (NULL); + char *inst; + + /* if there is something to be popped then do it first */ + popForBranch (popIc, TRUE); + + D (emitcode (";", "genIfxJump")); + + /* if true label then we jump if condition + supplied is true */ + if (IC_TRUE (ic)) + { + jlbl = IC_TRUE (ic); + inst = ((strcmp (jval, "a") == 0 ? "jz" : + (strcmp (jval, "c") == 0 ? "jnc" : "jnb"))); + } + else + { + /* false label is present */ + jlbl = IC_FALSE (ic); + inst = ((strcmp (jval, "a") == 0 ? "jnz" : + (strcmp (jval, "c") == 0 ? "jc" : "jb"))); + } + if (strcmp (inst, "jb") == 0 || strcmp (inst, "jnb") == 0) + emitcode (inst, "%s,!tlabel", jval, (tlbl->key + 100)); + else + emitcode (inst, "!tlabel", tlbl->key + 100); + emitcode ("ljmp", "!tlabel", jlbl->key + 100); + emitLabel (tlbl); + + /* mark the icode as generated */ + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genCmp :- greater or less than comparison */ +/*-----------------------------------------------------------------*/ +static void +genCmp (operand * left, operand * right, + iCode * ic, iCode * ifx, int sign) +{ + int size, offset = 0; + unsigned long lit = 0L; + operand *result; + + D (emitcode (";", "genCmp")); + + result = IC_RESULT (ic); + + /* if left & right are bit variables */ + if (AOP_TYPE (left) == AOP_CRY && + AOP_TYPE (right) == AOP_CRY) + { + emitcode ("mov", "c,%s", AOP (right)->aopu.aop_dir); + emitcode ("anl", "c,%s", AOP (left)->aopu.aop_dir); + } + else + { + /* subtract right from left if at the + end the carry flag is set then we know that + left is greater than right */ + size = max (AOP_SIZE (left), AOP_SIZE (right)); + + /* if unsigned char cmp with lit, do cjne left,#right,zz */ + if ((size == 1) && !sign && + (AOP_TYPE (right) == AOP_LIT && AOP_TYPE (left) != AOP_DIR && AOP_TYPE (left) != AOP_STR)) + { + symbol *lbl = newiTempLabel (NULL); + emitcode ("cjne", "%s,%s,!tlabel", + aopGet (left, offset, FALSE, FALSE, NULL), + aopGet (right, offset, FALSE, FALSE, NULL), + lbl->key + 100); + emitLabel (lbl); + } + else + { + if (AOP_TYPE (right) == AOP_LIT) + { + lit = ulFromVal (AOP (right)->aopu.aop_lit); + /* optimize if(x < 0) or if(x >= 0) */ + if (lit == 0L) + { + if (!sign) + { + CLRC; + } + else + { + MOVA (aopGet (left, AOP_SIZE (left) - 1, FALSE, FALSE, NULL)); + + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + + aopOp (result, ic, FALSE, FALSE); + + if (!(AOP_TYPE (result) == AOP_CRY && AOP_SIZE (result)) && ifx) + { + freeAsmop (result, NULL, ic, TRUE); + genIfxJump (ifx, "acc.7", ic->next); + return; + } + else + { + emitcode ("rlc", "a"); + } + goto release_freedLR; + } + goto release; + } + } + CLRC; + while (size--) + { + // emitcode (";", "genCmp #1: %d/%d/%d", size, sign, offset); + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + // emitcode (";", "genCmp #2"); + if (sign && (size == 0)) + { + // emitcode (";", "genCmp #3"); + emitcode ("xrl", "a,#!constbyte",0x80); + if (AOP_TYPE (right) == AOP_LIT) + { + unsigned long lit = ulFromVal (AOP (right)->aopu.aop_lit); + // emitcode (";", "genCmp #3.1"); + emitcode ("subb", "a,#!constbyte", + 0x80 ^ (unsigned int) ((lit >> (offset * 8)) & 0x0FFL)); + } + else + { + // emitcode (";", "genCmp #3.2"); + saveAccWarn = 0; + MOVB (aopGet (right, offset++, FALSE, FALSE, "b")); + saveAccWarn = DEFAULT_ACC_WARNING; + emitcode ("xrl", "b,#!constbyte",0x80); + emitcode ("subb", "a,b"); + } + } + else + { + const char *s; + + // emitcode (";", "genCmp #4"); + saveAccWarn = 0; + s = aopGet (right, offset++, FALSE, FALSE, "b"); + saveAccWarn = DEFAULT_ACC_WARNING; + + emitcode ("subb", "a,%s", s); + } + } + } + } + +release: +/* Don't need the left & right operands any more; do need the result. */ + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + + aopOp (result, ic, FALSE, FALSE); + +release_freedLR: + + if (AOP_TYPE (result) == AOP_CRY && AOP_SIZE (result)) + { + outBitC (result); + } + else + { + /* if the result is used in the next + ifx conditional branch then generate + code a little differently */ + if (ifx) + { + genIfxJump (ifx, "c", ic->next); + } + else + { + outBitC (result); + } + /* leave the result in acc */ + } + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genCmpGt :- greater than comparison */ +/*-----------------------------------------------------------------*/ +static void +genCmpGt (iCode * ic, iCode * ifx) +{ + operand *left, *right; + sym_link *letype, *retype; + int sign; + + D (emitcode (";", "genCmpGt")); + + left = IC_LEFT (ic); + right = IC_RIGHT (ic); + + letype = getSpec (operandType (left)); + retype = getSpec (operandType (right)); + sign = !(SPEC_USIGN (letype) | SPEC_USIGN (retype)); + + /* assign the left & right amsops */ + AOP_OP_2 (ic); + + genCmp (right, left, ic, ifx, sign); +} + +/*-----------------------------------------------------------------*/ +/* genCmpLt - less than comparisons */ +/*-----------------------------------------------------------------*/ +static void +genCmpLt (iCode * ic, iCode * ifx) +{ + operand *left, *right; + sym_link *letype, *retype; + int sign; + + D (emitcode (";", "genCmpLt")); + + left = IC_LEFT (ic); + right = IC_RIGHT (ic); + + letype = getSpec (operandType (left)); + retype = getSpec (operandType (right)); + sign = !(SPEC_USIGN (letype) | SPEC_USIGN (retype)); + + /* assign the left & right amsops */ + AOP_OP_2 (ic); + + genCmp (left, right, ic, ifx, sign); +} + +/*-----------------------------------------------------------------*/ +/* gencjneshort - compare and jump if not equal */ +/*-----------------------------------------------------------------*/ +static void +gencjneshort (operand * left, operand * right, symbol * lbl) +{ + int size = max (AOP_SIZE (left), AOP_SIZE (right)); + int offset = 0; + unsigned long lit = 0L; + + D (emitcode (";", "gencjneshort")); + + /* if the left side is a literal or + if the right is in a pointer register and left + is not */ + if ((AOP_TYPE (left) == AOP_LIT) || + (AOP_TYPE (left) == AOP_IMMD) || + (IS_AOP_PREG (right) && !IS_AOP_PREG (left))) + { + operand *t = right; + right = left; + left = t; + } + + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + if (opIsGptr (left) || opIsGptr (right)) + { + /* We are comparing a generic pointer to something. + * Exclude the generic type byte from the comparison. + */ + size--; + D (emitcode (";", "cjneshort: generic ptr special case.");); + } + + + /* if the right side is a literal then anything goes */ + if (AOP_TYPE (right) == AOP_LIT && + AOP_TYPE (left) != AOP_DIR) + { + while (size--) + { + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + emitcode ("cjne", "a,%s,!tlabel", + aopGet (right, offset, FALSE, FALSE, NULL), + lbl->key + 100); + offset++; + } + } + + /* if the right side is in a register or in direct space or + if the left is a pointer register & right is not */ + else if (AOP_TYPE (right) == AOP_REG || + AOP_TYPE (right) == AOP_DIR || + AOP_TYPE (right) == AOP_LIT || + AOP_TYPE (right) == AOP_IMMD || + (AOP_TYPE (left) == AOP_DIR && AOP_TYPE (right) == AOP_LIT) || + (IS_AOP_PREG (left) && !IS_AOP_PREG (right))) + { + while (size--) + { + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + if ((AOP_TYPE (left) == AOP_DIR && AOP_TYPE (right) == AOP_LIT) && + ((unsigned int) ((lit >> (offset * 8)) & 0x0FFL) == 0)) + emitcode ("jnz", "!tlabel", lbl->key + 100); + else + emitcode ("cjne", "a,%s,!tlabel", + aopGet (right, offset, FALSE, TRUE, DP2_RESULT_REG), + lbl->key + 100); + offset++; + } + } + else + { + /* right is a pointer reg need both a & b */ + while (size--) + { + MOVB (aopGet (left, offset, FALSE, FALSE, NULL)); + MOVA (aopGet (right, offset, FALSE, FALSE, NULL)); + emitcode ("cjne", "a,b,!tlabel", lbl->key + 100); + offset++; + } + } +} + +/*-----------------------------------------------------------------*/ +/* gencjne - compare and jump if not equal */ +/*-----------------------------------------------------------------*/ +static void +gencjne (operand * left, operand * right, symbol * lbl) +{ + symbol *tlbl = newiTempLabel (NULL); + + D (emitcode (";", "gencjne")); + + gencjneshort (left, right, lbl); + + emitcode ("mov", "a,%s", one); + emitcode ("sjmp", "!tlabel", tlbl->key + 100); + emitLabel (lbl); + emitcode ("clr", "a"); + emitLabel (tlbl); +} + +/*-----------------------------------------------------------------*/ +/* genCmpEq - generates code for equal to */ +/*-----------------------------------------------------------------*/ +static void +genCmpEq (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + iCode * popIc = ic->next; + + D (emitcode (";", "genCmpEq")); + + AOP_OP_2 (ic); + AOP_SET_LOCALS (ic); + + /* if literal, literal on the right or + if the right is in a pointer register and left + is not */ + if ((AOP_TYPE (IC_LEFT (ic)) == AOP_LIT) || + (IS_AOP_PREG (right) && !IS_AOP_PREG (left))) + { + operand *t = IC_RIGHT (ic); + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = t; + } + + if (ifx && /* !AOP_SIZE(result) */ + OP_SYMBOL (result) && + OP_SYMBOL (result)->regType == REG_CND) + { + symbol *tlbl; + /* if they are both bit variables */ + if (AOP_TYPE (left) == AOP_CRY && + ((AOP_TYPE (right) == AOP_CRY) || (AOP_TYPE (right) == AOP_LIT))) + { + if (AOP_TYPE (right) == AOP_LIT) + { + unsigned long lit = ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit); + if (lit == 0L) + { + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + emitcode ("cpl", "c"); + } + else if (lit == 1L) + { + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + } + else + { + emitcode ("clr", "c"); + } + /* AOP_TYPE(right) == AOP_CRY */ + } + else + { + symbol *lbl = newiTempLabel (NULL); + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + emitcode ("jb", "%s,!tlabel", AOP (right)->aopu.aop_dir, (lbl->key + 100)); + emitcode ("cpl", "c"); + emitLabel (lbl); + } + /* if true label then we jump if condition + supplied is true */ + tlbl = newiTempLabel (NULL); + if (IC_TRUE (ifx)) + { + emitcode ("jnc", "!tlabel", tlbl->key + 100); + popForBranch (popIc, FALSE); + emitcode ("ljmp", "!tlabel", IC_TRUE (ifx)->key + 100); + } + else + { + emitcode ("jc", "!tlabel", tlbl->key + 100); + popForBranch (popIc, FALSE); + emitcode ("ljmp", "!tlabel", IC_FALSE (ifx)->key + 100); + } + emitLabel (tlbl); + } + else + { + tlbl = newiTempLabel (NULL); + gencjneshort (left, right, tlbl); + if (IC_TRUE (ifx)) + { + popForBranch (popIc, FALSE); + emitcode ("ljmp", "!tlabel", IC_TRUE (ifx)->key + 100); + emitLabel (tlbl); + } + else + { + symbol *lbl = newiTempLabel (NULL); + emitcode ("sjmp", "!tlabel", lbl->key + 100); + emitLabel (tlbl); + popForBranch (popIc, FALSE); + emitcode ("ljmp", "!tlabel", IC_FALSE (ifx)->key + 100); + emitLabel (lbl); + } + } + /* mark the icode as generated */ + ifx->generated = 1; + + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + return; + } + + /* if they are both bit variables */ + if (AOP_TYPE (left) == AOP_CRY && + ((AOP_TYPE (right) == AOP_CRY) || (AOP_TYPE (right) == AOP_LIT))) + { + if (AOP_TYPE (right) == AOP_LIT) + { + unsigned long lit = ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit); + if (lit == 0L) + { + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + emitcode ("cpl", "c"); + } + else if (lit == 1L) + { + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + } + else + { + emitcode ("clr", "c"); + } + /* AOP_TYPE(right) == AOP_CRY */ + } + else + { + symbol *lbl = newiTempLabel (NULL); + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + emitcode ("jb", "%s,!tlabel", AOP (right)->aopu.aop_dir, (lbl->key + 100)); + emitcode ("cpl", "c"); + emitLabel (lbl); + } + + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + + aopOp (result, ic, TRUE, FALSE); + + /* c = 1 if egal */ + if (AOP_TYPE (result) == AOP_CRY && AOP_SIZE (result)) + { + outBitC (result); + goto release; + } + if (ifx) + { + genIfxJump (ifx, "c", popIc); + goto release; + } + /* if the result is used in an arithmetic operation + then put the result in place */ + outBitC (result); + } + else + { + gencjne (left, right, newiTempLabel (NULL)); + + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + + aopOp (result, ic, TRUE, FALSE); + + if (AOP_TYPE (result) == AOP_CRY && AOP_SIZE (result)) + { + aopPut (result, "a", 0); + goto release; + } + if (ifx) + { + genIfxJump (ifx, "a", popIc); + goto release; + } + /* if the result is used in an arithmetic operation + then put the result in place */ + if (AOP_TYPE (result) != AOP_CRY) + outAcc (result); + /* leave the result in acc */ + } + +release: + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* ifxForOp - returns the icode containing the ifx for operand */ +/*-----------------------------------------------------------------*/ +static iCode * +ifxForOp (operand * op, iCode * ic) +{ + iCode *ifxIc; + + /* if true symbol then needs to be assigned */ + if (IS_TRUE_SYMOP (op)) + return NULL; + + /* if this has register type condition and + while skipping ipop's (see bug 1509084), + the next instruction is ifx with the same operand + and live to of the operand is upto the ifx only then */ + for (ifxIc = ic->next; ifxIc && ifxIc->op == IPOP; ifxIc = ifxIc->next); + if (ifxIc && ifxIc->op == IFX && + IC_COND (ifxIc)->key == op->key && + OP_SYMBOL (op)->liveTo <= ifxIc->seq) + return ifxIc; + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* hasInc - operand is incremented before any other use */ +/*-----------------------------------------------------------------*/ +static iCode * +hasInc (operand *op, iCode *ic, int osize) +{ + sym_link *type = operandType(op); + sym_link *retype = getSpec (type); + iCode *lic = ic->next; + int isize ; + + /* this could from a cast, e.g.: "(char xdata *) 0x7654;" */ + if (!IS_SYMOP(op)) return NULL; + + if (IS_BITVAR(retype)||!IS_PTR(type)) return NULL; + if (IS_AGGREGATE(type->next)) return NULL; + if (osize != (isize = getSize(type->next))) return NULL; + + while (lic) + { + /* if operand of the form op = op + */ + if (lic->op == '+' && isOperandEqual(IC_LEFT(lic),op) && + isOperandEqual(IC_RESULT(lic),op) && + isOperandLiteral(IC_RIGHT(lic)) && + operandLitValue(IC_RIGHT(lic)) == isize) + { + return lic; + } + /* if the operand used or deffed */ + if (bitVectBitValue(OP_USES(op),lic->key) || lic->defKey == op->key) + { + return NULL; + } + /* if GOTO or IFX */ + if (lic->op == IFX || lic->op == GOTO || lic->op == LABEL) break; + lic = lic->next; + } + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* genAndOp - for && operation */ +/*-----------------------------------------------------------------*/ +static void +genAndOp (iCode * ic) +{ + operand *left, *right, *result; + symbol *tlbl; + + D (emitcode (";", "genAndOp")); + + /* note here that && operations that are in an + if statement are taken away by backPatchLabels + only those used in arthmetic operations remain */ + AOP_OP_2 (ic); + AOP_SET_LOCALS (ic); + + /* if both are bit variables */ + if (AOP_TYPE (left) == AOP_CRY && + AOP_TYPE (right) == AOP_CRY) + { + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + emitcode ("anl", "c,%s", AOP (right)->aopu.aop_dir); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + + aopOp (result,ic,FALSE, FALSE); + outBitC (result); + } + else + { + tlbl = newiTempLabel (NULL); + toBoolean (left); + emitcode ("jz", "!tlabel", tlbl->key + 100); + toBoolean (right); + emitLabel (tlbl); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + + aopOp (result,ic,FALSE, FALSE); + outBitAcc (result); + } + + freeAsmop (result, NULL, ic, TRUE); +} + + +/*-----------------------------------------------------------------*/ +/* genOrOp - for || operation */ +/*-----------------------------------------------------------------*/ +static void +genOrOp (iCode * ic) +{ + operand *left, *right, *result; + symbol *tlbl; + + D (emitcode (";", "genOrOp")); + + /* note here that || operations that are in an + if statement are taken away by backPatchLabels + only those used in arthmetic operations remain */ + AOP_OP_2 (ic); + AOP_SET_LOCALS (ic); + + /* if both are bit variables */ + if (AOP_TYPE (left) == AOP_CRY && + AOP_TYPE (right) == AOP_CRY) + { + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + emitcode ("orl", "c,%s", AOP (right)->aopu.aop_dir); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + + aopOp (result,ic,FALSE, FALSE); + + outBitC (result); + } + else + { + tlbl = newiTempLabel (NULL); + toBoolean (left); + emitcode ("jnz", "!tlabel", tlbl->key + 100); + toBoolean (right); + emitLabel (tlbl); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + + aopOp (result,ic,FALSE, FALSE); + + outBitAcc (result); + } + + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* isLiteralBit - test if lit == 2^n */ +/*-----------------------------------------------------------------*/ +static int +isLiteralBit (unsigned long lit) +{ + unsigned long pw[32] = + {1L, 2L, 4L, 8L, 16L, 32L, 64L, 128L, + 0x100L, 0x200L, 0x400L, 0x800L, + 0x1000L, 0x2000L, 0x4000L, 0x8000L, + 0x10000L, 0x20000L, 0x40000L, 0x80000L, + 0x100000L, 0x200000L, 0x400000L, 0x800000L, + 0x1000000L, 0x2000000L, 0x4000000L, 0x8000000L, + 0x10000000L, 0x20000000L, 0x40000000L, 0x80000000L}; + int idx; + + for (idx = 0; idx < 32; idx++) + if (lit == pw[idx]) + return idx + 1; + return 0; +} + +/*-----------------------------------------------------------------*/ +/* continueIfTrue - */ +/*-----------------------------------------------------------------*/ +static void +continueIfTrue (iCode * ic) +{ + if (IC_TRUE (ic)) + emitcode ("ljmp", "!tlabel", IC_TRUE (ic)->key + 100); + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* jmpIfTrue - */ +/*-----------------------------------------------------------------*/ +static void +jumpIfTrue (iCode * ic) +{ + if (!IC_TRUE (ic)) + emitcode ("ljmp", "!tlabel", IC_FALSE (ic)->key + 100); + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* jmpTrueOrFalse - */ +/*-----------------------------------------------------------------*/ +static void +jmpTrueOrFalse (iCode * ic, symbol * tlbl) +{ + // ugly but optimized by peephole + if (IC_TRUE (ic)) + { + symbol *nlbl = newiTempLabel (NULL); + emitcode ("sjmp", "!tlabel", nlbl->key + 100); + emitLabel (tlbl); + emitcode ("ljmp", "!tlabel", IC_TRUE (ic)->key + 100); + emitLabel (nlbl); + } + else + { + emitcode ("ljmp", "!tlabel", IC_FALSE (ic)->key + 100); + emitLabel (tlbl); + } + ic->generated = 1; +} + +// Generate code to perform a bit-wise logic operation +// on two operands in far space (assumed to already have been +// aopOp'd by the AOP_OP_3_NOFATAL macro), storing the result +// in far space. This requires pushing the result on the stack +// then popping it into the result. +static void +genFarFarLogicOp(iCode *ic, char *logicOp) +{ + int size, resultSize, compSize; + int offset = 0; + + TR_AP("#5"); + D(emitcode(";", "%s special case for 3 far operands.", logicOp);); + compSize = AOP_SIZE(IC_LEFT(ic)) < AOP_SIZE(IC_RIGHT(ic)) ? + AOP_SIZE(IC_LEFT(ic)) : AOP_SIZE(IC_RIGHT(ic)); + + _startLazyDPSEvaluation(); + for (size = compSize; (size--); offset++) + { + MOVA (aopGet (IC_LEFT(ic), offset, FALSE, FALSE, NULL)); + emitcode ("mov", "%s, acc", DP2_RESULT_REG); + MOVA (aopGet (IC_RIGHT(ic), offset, FALSE, FALSE, NULL)); + + emitcode (logicOp, "a,%s", DP2_RESULT_REG); + emitcode ("push", "acc"); + } + _endLazyDPSEvaluation(); + + freeAsmop (IC_LEFT(ic), NULL, ic, RESULTONSTACK (ic) ? FALSE : TRUE); + freeAsmop (IC_RIGHT(ic), NULL, ic, RESULTONSTACK (ic) ? FALSE : TRUE); + aopOp (IC_RESULT(ic),ic,TRUE, FALSE); + + resultSize = AOP_SIZE(IC_RESULT(ic)); + + ADJUST_PUSHED_RESULT(compSize, resultSize); + + _startLazyDPSEvaluation(); + while (compSize--) + { + emitcode ("pop", "acc"); + aopPut (IC_RESULT (ic), "a", compSize); + } + _endLazyDPSEvaluation(); + freeAsmop(IC_RESULT (ic), NULL, ic, TRUE); +} + + +/*-----------------------------------------------------------------*/ +/* genAnd - code for and */ +/*-----------------------------------------------------------------*/ +static void +genAnd (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + int size, offset = 0; + unsigned long lit = 0L; + int bytelit = 0; + char buffer[10]; + bool pushResult; + + D (emitcode (";", "genAnd")); + + AOP_OP_3_NOFATAL (ic, pushResult); + AOP_SET_LOCALS (ic); + + if (pushResult) + { + genFarFarLogicOp(ic, "anl"); + return; + } + +#ifdef DEBUG_TYPE + emitcode (";", "Type res[%d] = l[%d]&r[%d]", + AOP_TYPE (result), + AOP_TYPE (left), AOP_TYPE (right)); + emitcode (";", "Size res[%d] = l[%d]&r[%d]", + AOP_SIZE (result), + AOP_SIZE (left), AOP_SIZE (right)); +#endif + + /* if left is a literal & right is not then exchange them */ + if ((AOP_TYPE (left) == AOP_LIT && AOP_TYPE (right) != AOP_LIT) +#ifdef LOGIC_OPS_BROKEN + || AOP_NEEDSACC (left) +#endif + ) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if result = right then exchange left and right */ + if (sameRegs (AOP (result), AOP (right))) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if right is bit then exchange them */ + if (AOP_TYPE (right) == AOP_CRY && + AOP_TYPE (left) != AOP_CRY) + { + operand *tmp = right; + right = left; + left = tmp; + } + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + size = AOP_SIZE (result); + + // if(bit & yy) + // result = bit & yy; + if (AOP_TYPE (left) == AOP_CRY) + { + // c = bit & literal; + if (AOP_TYPE (right) == AOP_LIT) + { + if (lit & 1) + { + if (size && sameRegs (AOP (result), AOP (left))) + // no change + goto release; + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + } + else + { + // bit(result) = 0; + if (size && (AOP_TYPE (result) == AOP_CRY)) + { + emitcode ("clr", "%s", AOP (result)->aopu.aop_dir); + goto release; + } + if ((AOP_TYPE (result) == AOP_CRY) && ifx) + { + jumpIfTrue (ifx); + goto release; + } + emitcode ("clr", "c"); + } + } + else + { + if (AOP_TYPE (right) == AOP_CRY) + { + // c = bit & bit; + emitcode ("mov", "c,%s", AOP (right)->aopu.aop_dir); + emitcode ("anl", "c,%s", AOP (left)->aopu.aop_dir); + } + else + { + // c = bit & val; + MOVA (aopGet (right, 0, FALSE, FALSE, NULL)); + // c = lsb + emitcode ("rrc", "a"); + emitcode ("anl", "c,%s", AOP (left)->aopu.aop_dir); + } + } + // bit = c + // val = c + if (size) + outBitC (result); + // if(bit & ...) + else if ((AOP_TYPE (result) == AOP_CRY) && ifx) + genIfxJump (ifx, "c", ic->next); + goto release; + } + + // if(val & 0xZZ) - size = 0, ifx != FALSE - + // bit = val & 0xZZ - size = 1, ifx = FALSE - + if ((AOP_TYPE (right) == AOP_LIT) && + (AOP_TYPE (result) == AOP_CRY) && + (AOP_TYPE (left) != AOP_CRY)) + { + int posbit = isLiteralBit (lit); + /* left & 2^n */ + if (posbit) + { + posbit--; + MOVA (aopGet (left, posbit >> 3, FALSE, FALSE, NULL)); + // bit = left & 2^n + if (size) + { + switch (posbit & 0x07) + { + case 0: emitcode ("rrc", "a"); + break; + case 7: emitcode ("rlc", "a"); + break; + default: emitcode ("mov", "c,acc.%d", posbit & 0x07); + break; + } + } + // if(left & 2^n) + else + { + if (ifx) + { + SNPRINTF (buffer, sizeof(buffer), + "acc.%d", posbit & 0x07); + genIfxJump (ifx, buffer, ic->next); + } + else + { + emitcode ("anl","a,#!constbyte",1 << (posbit & 0x07)); + } + goto release; + } + } + else + { + symbol *tlbl = newiTempLabel (NULL); + int sizel = AOP_SIZE (left); + if (size) + emitcode ("setb", "c"); + while (sizel--) + { + if ((bytelit = ((lit >> (offset * 8)) & 0x0FFL)) != 0x0L) + { + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + // byte == 2^n ? + if ((posbit = isLiteralBit (bytelit)) != 0) + emitcode ("jb", "acc.%d,!tlabel", (posbit - 1) & 0x07, tlbl->key + 100); + else + { + if (bytelit != 0x0FFL) + emitcode ("anl", "a,%s", + aopGet (right, offset, FALSE, TRUE, DP2_RESULT_REG)); + emitcode ("jnz", "!tlabel", tlbl->key + 100); + } + } + offset++; + } + // bit = left & literal + if (size) + { + emitcode ("clr", "c"); + emitLabel (tlbl); + } + // if(left & literal) + else + { + if (ifx) + jmpTrueOrFalse (ifx, tlbl); + else + emitLabel (tlbl); + goto release; + } + } + outBitC (result); + goto release; + } + + /* if left is same as result */ + if (sameRegs (AOP (result), AOP (left))) + { + for (; size--; offset++) + { + if (AOP_TYPE (right) == AOP_LIT) + { + bytelit = (int) ((lit >> (offset * 8)) & 0x0FFL); + if (bytelit == 0x0FF) + { + /* dummy read of volatile operand */ + if (isOperandVolatile (left, FALSE)) + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + else + continue; + } + else if (bytelit == 0) + { + aopPut (result, zero, offset); + } + else if (IS_AOP_PREG (result)) + { + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + emitcode ("anl", "a,%s", + aopGet (right, offset, FALSE, TRUE, DP2_RESULT_REG)); + aopPut (result, "a", offset); + } + else + emitcode ("anl", "%s,%s", + aopGet (left, offset, FALSE, TRUE, NULL), + aopGet (right, offset, FALSE, FALSE, NULL)); + } + else + { + if (AOP_TYPE (left) == AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("anl", "a,%s", aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + MOVB (aopGet (left, offset, FALSE, FALSE, NULL)); + MOVA (aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + emitcode ("anl", "a,b"); + aopPut (result, "a", offset); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + emitcode ("anl", "a,%s", aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + aopPut (result, "a", offset); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE, NULL)); + if (IS_AOP_PREG (result)) + { + emitcode ("anl", "a,%s", aopGet (left, offset, FALSE, TRUE, DP2_RESULT_REG)); + aopPut (result, "a", offset); + } + else + emitcode ("anl", "%s,a", aopGet (left, offset, FALSE, TRUE, DP2_RESULT_REG)); + } + } + } + } + else + { + // left & result in different registers + if (AOP_TYPE (result) == AOP_CRY) + { + // result = bit + // if(size), result in bit + // if(!size && ifx), conditional oper: if(left & right) + symbol *tlbl = newiTempLabel (NULL); + int sizer = min (AOP_SIZE (left), AOP_SIZE (right)); + if (size) + emitcode ("setb", "c"); + while (sizer--) + { + if ((AOP_TYPE(right)==AOP_REG || IS_AOP_PREG(right) || AOP_TYPE(right)==AOP_DIR) + && AOP_TYPE(left)==AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("anl", "a,%s", aopGet (right, offset, FALSE, FALSE, NULL)); + } + else if (AOP_TYPE(left)==AOP_ACC) + { + if (!offset) + { + bool pushedB = pushB (); + emitcode("mov", "b,a"); + MOVA (aopGet (right, offset, FALSE, FALSE, NULL)); + emitcode("anl", "a,b"); + popB (pushedB); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE, NULL)); + emitcode("anl", "a,b"); + } + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + emitcode ("mov", "b,%s", aopGet (left, offset, FALSE, FALSE, NULL)); + MOVA (aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + emitcode ("anl", "a,b"); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + emitcode ("anl", "a,%s", aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE, NULL)); + emitcode ("anl", "a,%s", aopGet (left, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + + emitcode ("jnz", "!tlabel", tlbl->key + 100); + offset++; + } + if (size) + { + CLRC; + emitLabel (tlbl); + outBitC (result); + } + else if (ifx) + jmpTrueOrFalse (ifx, tlbl); + else + emitLabel (tlbl); + } + else + { + for (; (size--); offset++) + { + // normal case + // result = left & right + if (AOP_TYPE (right) == AOP_LIT) + { + bytelit = (int) ((lit >> (offset * 8)) & 0x0FFL); + if (bytelit == 0x0FF) + { + aopPut (result, + aopGet (left, offset, FALSE, FALSE, NULL), + offset); + continue; + } + else if (bytelit == 0) + { + /* dummy read of volatile operand */ + if (isOperandVolatile (left, FALSE)) + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + aopPut (result, zero, offset); + continue; + } + else if (AOP_TYPE (left) == AOP_ACC) + { + if (!offset) + { + emitcode ("anl", "a,%s", aopGet (right, offset, FALSE, FALSE, NULL)); + aopPut (result, "a", offset); + continue; + } + else + { + emitcode ("anl", "b,%s", aopGet (right, offset, FALSE, FALSE, NULL)); + aopPut (result, "b", offset); + continue; + } + } + } + // faster than result <- left, anl result,right + // and better if result is SFR + if ((AOP_TYPE(right)==AOP_REG || IS_AOP_PREG(right) || AOP_TYPE(right)==AOP_DIR) + && AOP_TYPE(left)==AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("anl", "a,%s", aopGet (right, offset, FALSE, FALSE, NULL)); + } + else if (AOP_TYPE(left)==AOP_ACC) + { + if (!offset) + { + bool pushedB = pushB (); + emitcode("mov", "b,a"); + MOVA (aopGet (right, offset, FALSE, FALSE, NULL)); + emitcode("anl", "a,b"); + popB (pushedB); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE, NULL)); + emitcode("anl", "a,b"); + } + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + MOVB (aopGet (left, offset, FALSE, FALSE, NULL)); + MOVA (aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + emitcode ("anl", "a,b"); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + emitcode ("anl", "a,%s", aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE, NULL)); + emitcode ("anl", "a,%s", aopGet (left, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + aopPut (result, "a", offset); + } + } + } + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); +} + +/*-----------------------------------------------------------------*/ +/* genOr - code for or */ +/*-----------------------------------------------------------------*/ +static void +genOr (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + int size, offset = 0; + unsigned long lit = 0L; + int bytelit = 0; + bool pushResult; + + D (emitcode (";", "genOr")); + + AOP_OP_3_NOFATAL (ic, pushResult); + AOP_SET_LOCALS (ic); + + if (pushResult) + { + genFarFarLogicOp(ic, "orl"); + return; + } + + +#ifdef DEBUG_TYPE + emitcode (";", "Type res[%d] = l[%d]&r[%d]", + AOP_TYPE (result), + AOP_TYPE (left), AOP_TYPE (right)); + emitcode (";", "Size res[%d] = l[%d]&r[%d]", + AOP_SIZE (result), + AOP_SIZE (left), AOP_SIZE (right)); +#endif + + /* if left is a literal & right is not then exchange them */ + if ((AOP_TYPE (left) == AOP_LIT && AOP_TYPE (right) != AOP_LIT) +#ifdef LOGIC_OPS_BROKEN + || AOP_NEEDSACC (left) // I think this is a net loss now. +#endif + ) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if result = right then exchange them */ + if (sameRegs (AOP (result), AOP (right))) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if right is bit then exchange them */ + if (AOP_TYPE (right) == AOP_CRY && + AOP_TYPE (left) != AOP_CRY) + { + operand *tmp = right; + right = left; + left = tmp; + } + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + size = AOP_SIZE (result); + + // if(bit | yy) + // xx = bit | yy; + if (AOP_TYPE (left) == AOP_CRY) + { + if (AOP_TYPE (right) == AOP_LIT) + { + // c = bit | literal; + if (lit) + { + // lit != 0 => result = 1 + if (AOP_TYPE (result) == AOP_CRY) + { + if (size) + emitcode ("setb", "%s", AOP (result)->aopu.aop_dir); + else if (ifx) + continueIfTrue (ifx); + goto release; + } + emitcode ("setb", "c"); + } + else + { + // lit == 0 => result = left + if (size && sameRegs (AOP (result), AOP (left))) + goto release; + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + } + } + else + { + if (AOP_TYPE (right) == AOP_CRY) + { + // c = bit | bit; + emitcode ("mov", "c,%s", AOP (right)->aopu.aop_dir); + emitcode ("orl", "c,%s", AOP (left)->aopu.aop_dir); + } + else + { + // c = bit | val; + symbol *tlbl = newiTempLabel (NULL); + if (!((AOP_TYPE (result) == AOP_CRY) && ifx)) + emitcode ("setb", "c"); + emitcode ("jb", "%s,!tlabel", + AOP (left)->aopu.aop_dir, tlbl->key + 100); + toBoolean (right); + emitcode ("jnz", "!tlabel", tlbl->key + 100); + if ((AOP_TYPE (result) == AOP_CRY) && ifx) + { + jmpTrueOrFalse (ifx, tlbl); + goto release; + } + else + { + CLRC; + emitLabel (tlbl); + } + } + } + // bit = c + // val = c + if (size) + outBitC (result); + // if(bit | ...) + else if ((AOP_TYPE (result) == AOP_CRY) && ifx) + genIfxJump (ifx, "c", ic->next); + goto release; + } + + // if(val | 0xZZ) - size = 0, ifx != FALSE - + // bit = val | 0xZZ - size = 1, ifx = FALSE - + if ((AOP_TYPE (right) == AOP_LIT) && + (AOP_TYPE (result) == AOP_CRY) && + (AOP_TYPE (left) != AOP_CRY)) + { + if (lit) + { + // result = 1 + if (size) + emitcode ("setb", "%s", AOP (result)->aopu.aop_dir); + else if(ifx) + continueIfTrue (ifx); + goto release; + } + else + { + // lit = 0, result = boolean(left) + if (size) + emitcode ("setb", "c"); + toBoolean (right); + if (size) + { + symbol *tlbl = newiTempLabel (NULL); + emitcode ("jnz", "!tlabel", tlbl->key + 100); + CLRC; + emitLabel (tlbl); + } + else + { /* FIXME, thats pretty fishy, check for ifx!=0, testcase .. */ + genIfxJump (ifx, "a", ic->next); + goto release; + } + } + outBitC (result); + goto release; + } + + /* if left is same as result */ + if (sameRegs (AOP (result), AOP (left))) + { + for (; size--; offset++) + { + if (AOP_TYPE (right) == AOP_LIT) + { + bytelit = (int) ((lit >> (offset * 8)) & 0x0FFL); + if (bytelit == 0) + { + /* dummy read of volatile operand */ + if (isOperandVolatile (left, FALSE)) + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + else + continue; + } + else if (bytelit == 0x0FF) + { + aopPut (result, "#0xFF", offset); + } + else if (IS_AOP_PREG (left)) + { + MOVA (aopGet (right, offset, FALSE, FALSE, NULL)); + emitcode ("orl", "a,%s", + aopGet (left, offset, FALSE, TRUE, DP2_RESULT_REG)); + aopPut (result, "a", offset); + } + else + { + emitcode ("orl", "%s,%s", + aopGet (left, offset, FALSE, TRUE, NULL), + aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + } + else + { + if (AOP_TYPE (left) == AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("orl", "a,%s", aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + emitcode ("mov", "b,%s", aopGet (left, offset, FALSE, FALSE, NULL)); + MOVA (aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + emitcode ("orl", "a,b"); + aopPut (result, "a", offset); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + emitcode ("orl", "a,%s", aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + aopPut (result, "a", offset); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE, NULL)); + if (IS_AOP_PREG (left)) + { + emitcode ("orl", "a,%s", + aopGet (left, offset, FALSE, TRUE, DP2_RESULT_REG)); + aopPut (result, "a", offset); + } + else + { + emitcode ("orl", "%s,a", + aopGet (left, offset, FALSE, TRUE, DP2_RESULT_REG)); + } + } + } + } + } + else + { + // left & result in different registers + if (AOP_TYPE (result) == AOP_CRY) + { + // result = bit + // if(size), result in bit + // if(!size && ifx), conditional oper: if(left | right) + symbol *tlbl = newiTempLabel (NULL); + int sizer = max (AOP_SIZE (left), AOP_SIZE (right)); + if (size) + emitcode ("setb", "c"); + while (sizer--) + { + if ((AOP_TYPE(right)==AOP_REG || IS_AOP_PREG(right) || AOP_TYPE(right)==AOP_DIR) + && AOP_TYPE(left)==AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("orl", "a,%s", aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + else if (AOP_TYPE(left)==AOP_ACC) + { + if (!offset) + { + bool pushedB = pushB (); + emitcode("mov", "b,a"); + MOVA (aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + emitcode("orl", "a,b"); + popB (pushedB); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + emitcode("orl", "a,b"); + } + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + MOVB (aopGet (left, offset, FALSE, FALSE, NULL)); + MOVA (aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + emitcode ("orl", "a,b"); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + emitcode ("orl", "a,%s", aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE, NULL)); + emitcode ("orl", "a,%s", aopGet (left, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + + emitcode ("jnz", "!tlabel", tlbl->key + 100); + offset++; + } + if (size) + { + CLRC; + emitLabel (tlbl); + outBitC (result); + } + else if (ifx) + jmpTrueOrFalse (ifx, tlbl); + else + emitLabel (tlbl); + } + else + { + _startLazyDPSEvaluation(); + for (; (size--); offset++) + { + // normal case + // result = left | right + if (AOP_TYPE (right) == AOP_LIT) + { + bytelit = (int) ((lit >> (offset * 8)) & 0x0FFL); + if (bytelit == 0) + { + aopPut (result, + aopGet (left, offset, FALSE, FALSE, NULL), + offset); + continue; + } + else if (bytelit == 0x0FF) + { + /* dummy read of volatile operand */ + if (isOperandVolatile (left, FALSE)) + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + aopPut (result, "#0xFF", offset); + continue; + } + } + // faster than result <- left, orl result,right + // and better if result is SFR + if ((AOP_TYPE(right)==AOP_REG || IS_AOP_PREG(right) || AOP_TYPE(right)==AOP_DIR) + && AOP_TYPE(left)==AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("orl", "a,%s", aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + else if (AOP_TYPE(left)==AOP_ACC) + { + if (!offset) + { + bool pushedB = pushB (); + emitcode("mov", "b,a"); + MOVA (aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + emitcode("orl", "a,b"); + popB (pushedB); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + emitcode("orl", "a,b"); + } + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + MOVB (aopGet (left, offset, FALSE, FALSE, NULL)); + MOVA (aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + emitcode ("orl", "a,b"); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + emitcode ("orl", "a,%s", aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE, NULL)); + emitcode ("orl", "a,%s", aopGet (left, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + aopPut (result, "a", offset); + } + _endLazyDPSEvaluation(); + } + } + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); +} + +/*-----------------------------------------------------------------*/ +/* genXor - code for xclusive or */ +/*-----------------------------------------------------------------*/ +static void +genXor (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + int size, offset = 0; + unsigned long lit = 0L; + int bytelit = 0; + bool pushResult; + + D (emitcode (";", "genXor")); + + AOP_OP_3_NOFATAL (ic, pushResult); + AOP_SET_LOCALS (ic); + + if (pushResult) + { + genFarFarLogicOp(ic, "xrl"); + return; + } + +#ifdef DEBUG_TYPE + emitcode (";", "Type res[%d] = l[%d]&r[%d]", + AOP_TYPE (result), + AOP_TYPE (left), AOP_TYPE (right)); + emitcode (";", "Size res[%d] = l[%d]&r[%d]", + AOP_SIZE (result), + AOP_SIZE (left), AOP_SIZE (right)); +#endif + + /* if left is a literal & right is not || + if left needs acc & right does not */ + if ((AOP_TYPE (left) == AOP_LIT && AOP_TYPE (right) != AOP_LIT) +#ifdef LOGIC_OPS_BROKEN + || (AOP_NEEDSACC (left) && !AOP_NEEDSACC (right)) +#endif + ) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if result = right then exchange them */ + if (sameRegs (AOP (result), AOP (right))) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if right is bit then exchange them */ + if (AOP_TYPE (right) == AOP_CRY && + AOP_TYPE (left) != AOP_CRY) + { + operand *tmp = right; + right = left; + left = tmp; + } + + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + size = AOP_SIZE (result); + + // if(bit ^ yy) + // xx = bit ^ yy; + if (AOP_TYPE (left) == AOP_CRY) + { + if (AOP_TYPE (right) == AOP_LIT) + { + // c = bit & literal; + if (lit >> 1) + { + // lit>>1 != 0 => result = 1 + if (AOP_TYPE (result) == AOP_CRY) + { + if (size) + emitcode ("setb", "%s", AOP (result)->aopu.aop_dir); + else if (ifx) + continueIfTrue (ifx); + goto release; + } + emitcode ("setb", "c"); + } + else + { + // lit == (0 or 1) + if (lit == 0) + { + // lit == 0, result = left + if (size && sameRegs (AOP (result), AOP (left))) + goto release; + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + } + else + { + // lit == 1, result = not(left) + if (size && sameRegs (AOP (result), AOP (left))) + { + emitcode ("cpl", "%s", AOP (result)->aopu.aop_dir); + goto release; + } + else + { + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + emitcode ("cpl", "c"); + } + } + } + } + else + { + // right != literal + symbol *tlbl = newiTempLabel (NULL); + if (AOP_TYPE (right) == AOP_CRY) + { + // c = bit ^ bit; + emitcode ("mov", "c,%s", AOP (right)->aopu.aop_dir); + } + else + { + int sizer = AOP_SIZE (right); + // c = bit ^ val + // if val>>1 != 0, result = 1 + emitcode ("setb", "c"); + while (sizer) + { + MOVA (aopGet (right, sizer - 1, FALSE, FALSE, NULL)); + if (sizer == 1) + // test the msb of the lsb + emitcode ("anl", "a,#!constbyte",0xfe); + emitcode ("jnz", "!tlabel", tlbl->key + 100); + sizer--; + } + // val = (0,1) + emitcode ("rrc", "a"); + } + emitcode ("jnb", "%s,!tlabel", AOP (left)->aopu.aop_dir, (tlbl->key + 100)); + emitcode ("cpl", "c"); + emitLabel (tlbl); + } + // bit = c + // val = c + if (size) + outBitC (result); + // if(bit ^ ...) + else if ((AOP_TYPE (result) == AOP_CRY) && ifx) + genIfxJump (ifx, "c", ic->next); + goto release; + } + + /* if left is same as result */ + if (sameRegs (AOP (result), AOP (left))) + { + for (; size--; offset++) + { + if (AOP_TYPE (right) == AOP_LIT) + { + bytelit = (int) ((lit >> (offset * 8)) & 0x0FFL); + if (bytelit == 0) + { + /* dummy read of volatile operand */ + if (isOperandVolatile (left, FALSE)) + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + else + continue; + } + else if (IS_AOP_PREG (left)) + { + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + emitcode ("xrl", "a,%s", + aopGet (right, offset, FALSE, TRUE, DP2_RESULT_REG)); + aopPut (result, "a", offset); + } + else + { + emitcode ("xrl", "%s,%s", + aopGet (left, offset, FALSE, TRUE, NULL), + aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + } + else + { + if (AOP_TYPE (left) == AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("xrl", "a,%s", aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + MOVB (aopGet (left, offset, FALSE, FALSE, NULL)); + MOVA (aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + emitcode ("xrl", "a,b"); + aopPut (result, "a", offset); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + emitcode ("xrl", "a,%s", aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + aopPut (result, "a", offset); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE, NULL)); + if (IS_AOP_PREG (left)) + { + emitcode ("xrl", "a,%s", + aopGet (left, offset, FALSE, TRUE, DP2_RESULT_REG)); + aopPut (result, "a", offset); + } + else + emitcode ("xrl", "%s,a", + aopGet (left, offset, FALSE, TRUE, DP2_RESULT_REG)); + } + } + } + } + else + { + // left & result in different registers + if (AOP_TYPE (result) == AOP_CRY) + { + // result = bit + // if(size), result in bit + // if(!size && ifx), conditional oper: if(left ^ right) + symbol *tlbl = newiTempLabel (NULL); + int sizer = max (AOP_SIZE (left), AOP_SIZE (right)); + + if (size) + emitcode ("setb", "c"); + while (sizer--) + { + if ((AOP_TYPE (right) == AOP_LIT) && + (((lit >> (offset * 8)) & 0x0FFL) == 0x00L)) + { + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + } + else if ((AOP_TYPE(right)==AOP_REG || IS_AOP_PREG(right) || AOP_TYPE(right)==AOP_DIR) + && AOP_TYPE(left)==AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("xrl", "a,%s", aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + else if (AOP_TYPE(left)==AOP_ACC) + { + if (!offset) + { + bool pushedB = pushB (); + emitcode("mov", "b,a"); + MOVA (aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + emitcode("xrl", "a,b"); + popB (pushedB); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + emitcode("xrl", "a,b"); + } + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + MOVB (aopGet (left, offset, FALSE, FALSE, NULL)); + MOVA (aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + emitcode ("xrl", "a,b"); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + emitcode ("xrl", "a,%s", aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE, NULL)); + emitcode ("xrl", "a,%s", aopGet (left, offset, FALSE, TRUE, DP2_RESULT_REG)); + } + + emitcode ("jnz", "!tlabel", tlbl->key + 100); + offset++; + } + if (size) + { + CLRC; + emitLabel (tlbl); + outBitC (result); + } + else if (ifx) + jmpTrueOrFalse (ifx, tlbl); + } + else + { + for (; (size--); offset++) + { + // normal case + // result = left ^ right + if (AOP_TYPE (right) == AOP_LIT) + { + bytelit = (int) ((lit >> (offset * 8)) & 0x0FFL); + if (bytelit == 0) + { + aopPut (result, + aopGet (left, offset, FALSE, FALSE, NULL), + offset); + continue; + } + D (emitcode (";", "better literal XOR.")); + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + emitcode ("xrl", "a, %s", + aopGet (right, offset, FALSE, FALSE, DP2_RESULT_REG)); + } + else + { + // faster than result <- left, anl result,right + // and better if result is SFR + if (AOP_TYPE (left) == AOP_ACC) + { + emitcode ("xrl", "a,%s", + aopGet (right, offset, + FALSE, FALSE, DP2_RESULT_REG)); + } + else + { + char *rOp = aopGet (right, offset, FALSE, FALSE, NULL); + if (!strcmp(rOp, "a") || !strcmp(rOp, "acc")) + { + emitcode("mov", "b,a"); + rOp = "b"; + } + + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + emitcode ("xrl", "a,%s", rOp); + } + } + aopPut (result, "a", offset); + } + } + } + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); +} + +/*-----------------------------------------------------------------*/ +/* genInline - write the inline code out */ +/*-----------------------------------------------------------------*/ +static void +genInline (iCode * ic) +{ + char *buffer, *bp, *bp1; + bool inComment = FALSE; + + D (emitcode (";", "genInline")); + + _G.inLine += (!options.asmpeep); + + buffer = bp = bp1 = Safe_strdup (IC_INLINE (ic)); + + /* emit each line as a code */ + while (*bp) + { + switch (*bp) + { + case ';': + inComment = TRUE; + ++bp; + break; + + case '\n': + inComment = FALSE; + *bp++ = '\0'; + emitcode (bp1, ""); + bp1 = bp; + break; + + default: + /* Add \n for labels, not dirs such as c:\mydir */ + if (!inComment && (*bp == ':') && (isspace((unsigned char)bp[1]))) + { + ++bp; + *bp = '\0'; + ++bp; + emitcode (bp1, ""); + bp1 = bp; + } + else + ++bp; + break; + } + } + if (bp1 != bp) + emitcode (bp1, ""); + + Safe_free (buffer); + + _G.inLine -= (!options.asmpeep); +} + +/*-----------------------------------------------------------------*/ +/* genRRC - rotate right with carry */ +/*-----------------------------------------------------------------*/ +static void +genRRC (iCode * ic) +{ + operand *left, *result; + int size, offset; + char *l; + + D (emitcode (";", "genRRC")); + + /* rotate right with carry */ + left = IC_LEFT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE, FALSE); + aopOp (result, ic, FALSE, AOP_USESDPTR(left)); + + /* move it to the result */ + size = AOP_SIZE (result); + offset = size - 1; + CLRC; + + _startLazyDPSEvaluation (); + while (size--) + { + l = aopGet (left, offset, FALSE, FALSE, NULL); + MOVA (l); + emitcode ("rrc", "a"); + if (AOP_SIZE (result) > 1) + aopPut (result, "a", offset--); + } + _endLazyDPSEvaluation (); + + /* now we need to put the carry into the + highest order byte of the result */ + if (AOP_SIZE (result) > 1) + { + l = aopGet (result, AOP_SIZE (result) - 1, FALSE, FALSE, NULL); + MOVA (l); + } + emitcode ("mov", "acc.7,c"); + aopPut (result, "a", AOP_SIZE (result) - 1); + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genRLC - generate code for rotate left with carry */ +/*-----------------------------------------------------------------*/ +static void +genRLC (iCode * ic) +{ + operand *left, *result; + int size, offset; + char *l; + + D (emitcode (";", "genRLC")); + + /* rotate right with carry */ + left = IC_LEFT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE, FALSE); + aopOp (result, ic, FALSE, AOP_USESDPTR(left)); + + /* move it to the result */ + size = AOP_SIZE (result); + offset = 0; + if (size--) + { + l = aopGet (left, offset, FALSE, FALSE, NULL); + MOVA (l); + emitcode ("add", "a,acc"); + if (AOP_SIZE (result) > 1) + { + aopPut (result, "a", offset++); + } + + _startLazyDPSEvaluation (); + while (size--) + { + l = aopGet (left, offset, FALSE, FALSE, NULL); + MOVA (l); + emitcode ("rlc", "a"); + if (AOP_SIZE (result) > 1) + aopPut (result, "a", offset++); + } + _endLazyDPSEvaluation (); + } + /* now we need to put the carry into the + highest order byte of the result */ + if (AOP_SIZE (result) > 1) + { + l = aopGet (result, 0, FALSE, FALSE, NULL); + MOVA (l); + } + emitcode ("mov", "acc.0,c"); + aopPut (result, "a", 0); + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genGetHbit - generates code get highest order bit */ +/*-----------------------------------------------------------------*/ +static void +genGetHbit (iCode * ic) +{ + operand *left, *result; + + D (emitcode (";", "genGetHbit")); + + left = IC_LEFT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE, FALSE); + aopOp (result, ic, FALSE, AOP_USESDPTR(left)); + + /* get the highest order byte into a */ + MOVA (aopGet (left, AOP_SIZE (left) - 1, FALSE, FALSE, NULL)); + if (AOP_TYPE (result) == AOP_CRY) + { + emitcode ("rlc", "a"); + outBitC (result); + } + else + { + emitcode ("rl", "a"); + emitcode ("anl", "a,#0x01"); + outAcc (result); + } + + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genSwap - generates code to swap nibbles or bytes */ +/*-----------------------------------------------------------------*/ +static void +genSwap (iCode * ic) +{ + operand *left, *result; + + D(emitcode (";", "genSwap")); + + left = IC_LEFT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE, FALSE); + aopOp (result, ic, FALSE, AOP_USESDPTR(left)); + + _startLazyDPSEvaluation (); + switch (AOP_SIZE (left)) + { + case 1: /* swap nibbles in byte */ + MOVA (aopGet (left, 0, FALSE, FALSE, NULL)); + emitcode ("swap", "a"); + aopPut (result, "a", 0); + break; + case 2: /* swap bytes in word */ + if (AOP_TYPE(left) == AOP_REG && sameRegs(AOP(left), AOP(result))) + { + MOVA (aopGet (left, 0, FALSE, FALSE, NULL)); + aopPut (result, aopGet (left, 1, FALSE, FALSE, NULL), 0); + aopPut (result, "a", 1); + } + else if (operandsEqu (left, result)) + { + char * reg = "a"; + bool pushedB = FALSE, leftInB = FALSE; + + MOVA (aopGet (left, 0, FALSE, FALSE, NULL)); + if (AOP_NEEDSACC (left) || AOP_NEEDSACC (result)) + { + pushedB = pushB (); + emitcode ("mov", "b,a"); + reg = "b"; + leftInB = TRUE; + } + aopPut (result, aopGet (left, 1, FALSE, FALSE, NULL), 0); + aopPut (result, reg, 1); + + if (leftInB) + popB (pushedB); + } + else + { + aopPut (result, aopGet (left, 1, FALSE, FALSE, NULL), 0); + aopPut (result, aopGet (left, 0, FALSE, FALSE, NULL), 1); + } + break; + default: + wassertl(FALSE, "unsupported SWAP operand size"); + } + _endLazyDPSEvaluation (); + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* AccRol - rotate left accumulator by known count */ +/*-----------------------------------------------------------------*/ +static void +AccRol (int shCount) +{ + shCount &= 0x0007; // shCount : 0..7 + + switch (shCount) + { + case 0: + break; + case 1: + emitcode ("rl", "a"); + break; + case 2: + emitcode ("rl", "a"); + emitcode ("rl", "a"); + break; + case 3: + emitcode ("swap", "a"); + emitcode ("rr", "a"); + break; + case 4: + emitcode ("swap", "a"); + break; + case 5: + emitcode ("swap", "a"); + emitcode ("rl", "a"); + break; + case 6: + emitcode ("rr", "a"); + emitcode ("rr", "a"); + break; + case 7: + emitcode ("rr", "a"); + break; + } +} + +/*-----------------------------------------------------------------*/ +/* AccLsh - left shift accumulator by known count */ +/*-----------------------------------------------------------------*/ +static void +AccLsh (int shCount) +{ + if (shCount != 0) + { + if (shCount == 1) + emitcode ("add", "a,acc"); + else if (shCount == 2) + { + emitcode ("add", "a,acc"); + emitcode ("add", "a,acc"); + } + else + { + /* rotate left accumulator */ + AccRol (shCount); + /* and kill the lower order bits */ + emitcode ("anl", "a,#!constbyte", SLMask[shCount]); + } + } +} + +/*-----------------------------------------------------------------*/ +/* AccRsh - right shift accumulator by known count */ +/*-----------------------------------------------------------------*/ +static void +AccRsh (int shCount) +{ + if (shCount != 0) + { + if (shCount == 1) + { + CLRC; + emitcode ("rrc", "a"); + } + else + { + /* rotate right accumulator */ + AccRol (8 - shCount); + /* and kill the higher order bits */ + emitcode ("anl", "a,#!constbyte", SRMask[shCount]); + } + } +} + +#ifdef BETTER_LITERAL_SHIFT +/*-----------------------------------------------------------------*/ +/* AccSRsh - signed right shift accumulator by known count */ +/*-----------------------------------------------------------------*/ +static void +AccSRsh (int shCount) +{ + symbol *tlbl; + if (shCount != 0) + { + if (shCount == 1) + { + emitcode ("mov", "c,acc.7"); + emitcode ("rrc", "a"); + } + else if (shCount == 2) + { + emitcode ("mov", "c,acc.7"); + emitcode ("rrc", "a"); + emitcode ("mov", "c,acc.7"); + emitcode ("rrc", "a"); + } + else + { + tlbl = newiTempLabel (NULL); + /* rotate right accumulator */ + AccRol (8 - shCount); + /* and kill the higher order bits */ + emitcode ("anl", "a,#!constbyte", SRMask[shCount]); + emitcode ("jnb", "acc.%d,!tlabel", 7 - shCount, tlbl->key + 100); + emitcode ("orl", "a,#!constbyte", + (unsigned char) ~SRMask[shCount]); + emitLabel (tlbl); + } + } +} +#endif + +#ifdef BETTER_LITERAL_SHIFT +/*-----------------------------------------------------------------*/ +/* shiftR1Left2Result - shift right one byte from left to result */ +/*-----------------------------------------------------------------*/ +static void +shiftR1Left2Result (operand * left, int offl, + operand * result, int offr, + int shCount, int sign) +{ + MOVA (aopGet (left, offl, FALSE, FALSE, NULL)); + /* shift right accumulator */ + if (sign) + AccSRsh (shCount); + else + AccRsh (shCount); + aopPut (result, "a", offr); +} +#endif + +#ifdef BETTER_LITERAL_SHIFT +/*-----------------------------------------------------------------*/ +/* shiftL1Left2Result - shift left one byte from left to result */ +/*-----------------------------------------------------------------*/ +static void +shiftL1Left2Result (operand * left, int offl, + operand * result, int offr, int shCount) +{ + char *l; + l = aopGet (left, offl, FALSE, FALSE, NULL); + MOVA (l); + /* shift left accumulator */ + AccLsh (shCount); + aopPut (result, "a", offr); +} +#endif + +#ifdef BETTER_LITERAL_SHIFT +/*-----------------------------------------------------------------*/ +/* movLeft2Result - move byte from left to result */ +/*-----------------------------------------------------------------*/ +static void +movLeft2Result (operand * left, int offl, + operand * result, int offr, int sign) +{ + char *l; + if (!sameRegs (AOP (left), AOP (result)) || (offl != offr)) + { + l = aopGet (left, offl, FALSE, FALSE, NULL); + + if (*l == '@' && (IS_AOP_PREG (result))) + { + emitcode ("mov", "a,%s", l); + aopPut (result, "a", offr); + } + else + { + if (!sign) + { + aopPut (result, l, offr); + } + else + { + /* MSB sign in acc.7 ! */ + if (getDataSize (left) == offl + 1) + { + MOVA (l); + aopPut (result, "a", offr); + } + } + } + } +} +#endif + +#ifdef BETTER_LITERAL_SHIFT +/*-----------------------------------------------------------------*/ +/* AccAXRrl1 - right rotate a:x by 1 */ +/*-----------------------------------------------------------------*/ +static void +AccAXRrl1 (char *x) +{ + emitcode ("mov", "c,acc.0"); + emitcode ("xch", "a,%s", x); + emitcode ("rrc", "a"); + emitcode ("xch", "a,%s", x); + emitcode ("rrc", "a"); +} +#endif + +#ifdef BETTER_LITERAL_SHIFT +//REMOVE ME!!! +/*-----------------------------------------------------------------*/ +/* AccAXLrl1 - left rotate a:x by 1 */ +/*-----------------------------------------------------------------*/ +static void +AccAXLrl1 (char *x) +{ + emitcode ("mov", "c,acc.7"); + emitcode ("xch", "a,%s", x); + emitcode ("rlc", "a"); + emitcode ("xch", "a,%s", x); + emitcode ("rlc", "a"); +} +#endif + +#ifdef BETTER_LITERAL_SHIFT +/*-----------------------------------------------------------------*/ +/* AccAXRsh1 - right shift c->a:x->c by 1 */ +/*-----------------------------------------------------------------*/ +static void +AccAXRsh1 (char *x) +{ + emitcode ("rrc", "a"); + emitcode ("xch", "a,%s", x); + emitcode ("rrc", "a"); + emitcode ("xch", "a,%s", x); +} +#endif + +#ifdef BETTER_LITERAL_SHIFT +/*-----------------------------------------------------------------*/ +/* AccAXLsh1 - left shift a:x<-0 by 1 */ +/*-----------------------------------------------------------------*/ +static void +AccAXLsh1 (char *x) +{ + emitcode ("xch", "a,%s", x); + emitcode ("add", "a,acc"); + emitcode ("xch", "a,%s", x); + emitcode ("rlc", "a"); +} +#endif + +#ifdef BETTER_LITERAL_SHIFT +/*-----------------------------------------------------------------*/ +/* AccAXLsh - left shift a:x by known count (0..7) */ +/*-----------------------------------------------------------------*/ +static void +AccAXLsh (char *x, int shCount) +{ + switch (shCount) + { + case 0: + break; + case 1: + AccAXLsh1 (x); + break; + case 2: + AccAXLsh1 (x); + AccAXLsh1 (x); + break; + case 3: + case 4: + case 5: // AAAAABBB:CCCCCDDD + + AccRol (shCount); // BBBAAAAA:CCCCCDDD + + emitcode ("anl", "a,#!constbyte", + SLMask[shCount]); // BBB00000:CCCCCDDD + + emitcode ("xch", "a,%s", x); // CCCCCDDD:BBB00000 + + AccRol (shCount); // DDDCCCCC:BBB00000 + + emitcode ("xch", "a,%s", x); // BBB00000:DDDCCCCC + + emitcode ("xrl", "a,%s", x); // (BBB^DDD)CCCCC:DDDCCCCC + + emitcode ("xch", "a,%s", x); // DDDCCCCC:(BBB^DDD)CCCCC + + emitcode ("anl", "a,#!constbyte", + SLMask[shCount]); // DDD00000:(BBB^DDD)CCCCC + + emitcode ("xch", "a,%s", x); // (BBB^DDD)CCCCC:DDD00000 + + emitcode ("xrl", "a,%s", x); // BBBCCCCC:DDD00000 + + break; + case 6: // AAAAAABB:CCCCCCDD + emitcode ("anl", "a,#!constbyte", + SRMask[shCount]); // 000000BB:CCCCCCDD +#if 1 + AccAXRrl1 (x); // D000000B:BCCCCCCD + AccAXRrl1 (x); // DD000000:BBCCCCCC + emitcode ("xch", "a,%s", x); // BBCCCCCC:DD000000 +#else + emitcode ("mov", "c,acc.0"); // c = B + emitcode ("xch", "a,%s", x); // CCCCCCDD:000000BB + emitcode("rrc","a"); + emitcode("xch","a,%s", x); + emitcode("rrc","a"); + emitcode("mov","c,acc.0"); //<< get correct bit + emitcode("xch","a,%s", x); + + emitcode("rrc","a"); + emitcode("xch","a,%s", x); + emitcode("rrc","a"); + emitcode("xch","a,%s", x); +#endif + break; + case 7: // a:x <<= 7 + + emitcode ("anl", "a,#!constbyte", + SRMask[shCount]); // 0000000B:CCCCCCCD + + AccAXRrl1 (x); // D0000000:BCCCCCCC + + emitcode ("xch", "a,%s", x); // BCCCCCCC:D0000000 + + break; + default: + break; + } +} +#endif + +#ifdef BETTER_LITERAL_SHIFT +//REMOVE ME!!! +/*-----------------------------------------------------------------*/ +/* AccAXRsh - right shift a:x known count (0..7) */ +/*-----------------------------------------------------------------*/ +static void +AccAXRsh (char *x, int shCount) +{ + switch (shCount) + { + case 0: + break; + case 1: + CLRC; + AccAXRsh1 (x); // 0->a:x + + break; + case 2: + CLRC; + AccAXRsh1 (x); // 0->a:x + + CLRC; + AccAXRsh1 (x); // 0->a:x + + break; + case 3: + case 4: + case 5: // AAAAABBB:CCCCCDDD = a:x + + AccRol (8 - shCount); // BBBAAAAA:DDDCCCCC + + emitcode ("xch", "a,%s", x); // CCCCCDDD:BBBAAAAA + + AccRol (8 - shCount); // DDDCCCCC:BBBAAAAA + + emitcode ("anl", "a,#!constbyte", + SRMask[shCount]); // 000CCCCC:BBBAAAAA + + emitcode ("xrl", "a,%s", x); // BBB(CCCCC^AAAAA):BBBAAAAA + + emitcode ("xch", "a,%s", x); // BBBAAAAA:BBB(CCCCC^AAAAA) + + emitcode ("anl", "a,#!constbyte", + SRMask[shCount]); // 000AAAAA:BBB(CCCCC^AAAAA) + + emitcode ("xch", "a,%s", x); // BBB(CCCCC^AAAAA):000AAAAA + + emitcode ("xrl", "a,%s", x); // BBBCCCCC:000AAAAA + + emitcode ("xch", "a,%s", x); // 000AAAAA:BBBCCCCC + + break; + case 6: // AABBBBBB:CCDDDDDD + + AccAXLrl1 (x); // ABBBBBBC:CDDDDDDE + AccAXLrl1 (x); // BBBBBBCC:DDDDDDAA + + emitcode ("xch", "a,%s", x); // DDDDDDAA:BBBBBBCC + + emitcode ("anl", "a,#!constbyte", + SRMask[shCount]); // 000000AA:BBBBBBCC + + break; + case 7: // ABBBBBBB:CDDDDDDD + + AccAXLrl1 (x); // BBBBBBBC:DDDDDDDA + + emitcode ("xch", "a,%s", x); // DDDDDDDA:BBBBBBCC + + emitcode ("anl", "a,#!constbyte", + SRMask[shCount]); // 0000000A:BBBBBBBC + + break; + default: + break; + } +} +#endif + +#ifdef BETTER_LITERAL_SHIFT +/*-----------------------------------------------------------------*/ +/* AccAXRshS - right shift signed a:x known count (0..7) */ +/*-----------------------------------------------------------------*/ +static void +AccAXRshS (char *x, int shCount) +{ + symbol *tlbl; + switch (shCount) + { + case 0: + break; + case 1: + emitcode ("mov", "c,acc.7"); + AccAXRsh1 (x); // s->a:x + + break; + case 2: + emitcode ("mov", "c,acc.7"); + AccAXRsh1 (x); // s->a:x + + emitcode ("mov", "c,acc.7"); + AccAXRsh1 (x); // s->a:x + + break; + case 3: + case 4: + case 5: // AAAAABBB:CCCCCDDD = a:x + + tlbl = newiTempLabel (NULL); + AccRol (8 - shCount); // BBBAAAAA:CCCCCDDD + + emitcode ("xch", "a,%s", x); // CCCCCDDD:BBBAAAAA + + AccRol (8 - shCount); // DDDCCCCC:BBBAAAAA + + emitcode ("anl", "a,#!constbyte", + SRMask[shCount]); // 000CCCCC:BBBAAAAA + + emitcode ("xrl", "a,%s", x); // BBB(CCCCC^AAAAA):BBBAAAAA + + emitcode ("xch", "a,%s", x); // BBBAAAAA:BBB(CCCCC^AAAAA) + + emitcode ("anl", "a,#!constbyte", + SRMask[shCount]); // 000AAAAA:BBB(CCCCC^AAAAA) + + emitcode ("xch", "a,%s", x); // BBB(CCCCC^AAAAA):000AAAAA + + emitcode ("xrl", "a,%s", x); // BBBCCCCC:000AAAAA + + emitcode ("xch", "a,%s", x); // 000SAAAA:BBBCCCCC + + emitcode ("jnb", "acc.%d,!tlabel", 7 - shCount, tlbl->key + 100); + emitcode ("orl", "a,#!constbyte", + (unsigned char) ~SRMask[shCount]); // 111AAAAA:BBBCCCCC + + emitLabel (tlbl); + break; // SSSSAAAA:BBBCCCCC + + case 6: // AABBBBBB:CCDDDDDD + + tlbl = newiTempLabel (NULL); + + AccAXLrl1 (x); // ABBBBBBC:CDDDDDDA + AccAXLrl1 (x); // BBBBBBCC:DDDDDDAA + + emitcode ("xch", "a,%s", x); // DDDDDDAA:BBBBBBCC + + emitcode ("anl", "a,#!constbyte", + SRMask[shCount]); // 000000AA:BBBBBBCC + + emitcode ("jnb", "acc.%d,!tlabel", 7 - shCount, tlbl->key + 100); + emitcode ("orl", "a,#!constbyte", + (unsigned char) ~SRMask[shCount]); // 111111AA:BBBBBBCC + + emitLabel (tlbl); + break; + case 7: // ABBBBBBB:CDDDDDDD + + tlbl = newiTempLabel (NULL); + + AccAXLrl1 (x); // BBBBBBBC:DDDDDDDA + + emitcode ("xch", "a,%s", x); // DDDDDDDA:BBBBBBCC + + emitcode ("anl", "a,#!constbyte", + SRMask[shCount]); // 0000000A:BBBBBBBC + + emitcode ("jnb", "acc.%d,!tlabel", 7 - shCount, tlbl->key + 100); + emitcode ("orl", "a,#!constbyte", + (unsigned char) ~SRMask[shCount]); // 1111111A:BBBBBBBC + + emitLabel (tlbl); + break; + default: + break; + } +} +#endif + +#ifdef BETTER_LITERAL_SHIFT +static void +_loadLeftIntoAx(char **lsb, + operand *left, + operand *result, + int offl, + int offr) +{ + // Get the initial value from left into a pair of registers. + // MSB must be in A, LSB can be any register. + // + // If the result is held in registers, it is an optimization + // if the LSB can be held in the register which will hold the, + // result LSB since this saves us from having to copy it into + // the result following AccAXLsh. + // + // If the result is addressed indirectly, this is not a gain. + if (AOP_NEEDSACC(result)) + { + char *leftByte; + + _startLazyDPSEvaluation(); + if (AOP_TYPE(left) == AOP_DPTR2) + { + // Get MSB in A. + MOVA (aopGet (left, offl + MSB16, FALSE, FALSE, NULL)); + // get LSB in DP2_RESULT_REG. + leftByte = aopGet (left, offl, FALSE, FALSE, DP2_RESULT_REG); + assert(!strcmp(leftByte, DP2_RESULT_REG)); + } + else + { + // get LSB into DP2_RESULT_REG + leftByte = aopGet (left, offl, FALSE, FALSE, NULL); + if (strcmp(leftByte, DP2_RESULT_REG)) + { + TR_AP("#7"); + emitcode("mov","%s,%s", DP2_RESULT_REG, leftByte); + } + // And MSB in A. + leftByte = aopGet (left, offl + MSB16, FALSE, FALSE, NULL); + assert(strcmp(leftByte, DP2_RESULT_REG)); + MOVA (leftByte); + } + _endLazyDPSEvaluation(); + *lsb = DP2_RESULT_REG; + } + else + { + if (sameRegs (AOP (result), AOP (left)) && + ((offl + MSB16) == offr)) + { + /* don't crash result[offr] */ + MOVA (aopGet (left, offl, FALSE, FALSE, NULL)); + emitcode ("xch", "a,%s", + aopGet (left, offl + MSB16, FALSE, FALSE, DP2_RESULT_REG)); + } + else + { + movLeft2Result (left, offl, result, offr, 0); + MOVA (aopGet (left, offl + MSB16, FALSE, FALSE, NULL)); + } + *lsb = aopGet (result, offr, FALSE, FALSE, DP2_RESULT_REG); + assert(strcmp(*lsb,"a")); + } +} + +static void +_storeAxResults(char *lsb, + operand *result, + int offr) +{ + _startLazyDPSEvaluation(); + if (AOP_NEEDSACC(result)) + { + /* We have to explicitly update the result LSB. + */ + emitcode ("xch","a,%s", lsb); + aopPut (result, "a", offr); + emitcode ("mov","a,%s", lsb); + } + if (getDataSize (result) > 1) + { + aopPut (result, "a", offr + MSB16); + } + _endLazyDPSEvaluation(); +} + +/*-----------------------------------------------------------------*/ +/* shiftL2Left2Result - shift left two bytes from left to result */ +/*-----------------------------------------------------------------*/ +static void +shiftL2Left2Result (operand * left, int offl, + operand * result, int offr, int shCount) +{ + char *lsb; + + _loadLeftIntoAx(&lsb, left, result, offl, offr); + + AccAXLsh (lsb, shCount); + + _storeAxResults(lsb, result, offr); +} +#endif + +#ifdef BETTER_LITERAL_SHIFT +/*-----------------------------------------------------------------*/ +/* shiftR2Left2Result - shift right two bytes from left to result */ +/*-----------------------------------------------------------------*/ +static void +shiftR2Left2Result (operand * left, int offl, + operand * result, int offr, + int shCount, int sign) +{ + char *lsb; + + _loadLeftIntoAx(&lsb, left, result, offl, offr); + + /* a:x >> shCount (x = lsb(result)) */ + if (sign) + { + AccAXRshS(lsb, shCount); + } + else + { + AccAXRsh(lsb, shCount); + } + + _storeAxResults(lsb, result, offr); +} +#endif + +/*-----------------------------------------------------------------*/ +/* shiftLLeftOrResult - shift left one byte from left, or to result */ +/*-----------------------------------------------------------------*/ +static void +shiftLLeftOrResult (operand * left, int offl, + operand * result, int offr, int shCount) +{ + MOVA (aopGet (left, offl, FALSE, FALSE, NULL)); + /* shift left accumulator */ + AccLsh (shCount); + /* or with result */ + emitcode ("orl", "a,%s", + aopGet (result, offr, FALSE, FALSE, DP2_RESULT_REG)); + /* back to result */ + aopPut (result, "a", offr); +} + +#if 0 +//REMOVE ME!!! +/*-----------------------------------------------------------------*/ +/* shiftRLeftOrResult - shift right one byte from left,or to result */ +/*-----------------------------------------------------------------*/ +static void +shiftRLeftOrResult (operand * left, int offl, + operand * result, int offr, int shCount) +{ + MOVA (aopGet (left, offl, FALSE, FALSE, NULL)); + /* shift right accumulator */ + AccRsh (shCount); + /* or with result */ + emitcode ("orl", "a,%s", + aopGet (result, offr, FALSE, FALSE, DP2_RESULT_REG)); + /* back to result */ + aopPut (result, "a", offr); +} +#endif + +#ifdef BETTER_LITERAL_SHIFT +/*-----------------------------------------------------------------*/ +/* genlshOne - left shift a one byte quantity by known count */ +/*-----------------------------------------------------------------*/ +static void +genlshOne (operand * result, operand * left, int shCount) +{ + D (emitcode (";", "genlshOne")); + + shiftL1Left2Result (left, LSB, result, LSB, shCount); +} +#endif + +#ifdef BETTER_LITERAL_SHIFT +/*-----------------------------------------------------------------*/ +/* genlshTwo - left shift two bytes by known amount != 0 */ +/*-----------------------------------------------------------------*/ +static void +genlshTwo (operand * result, operand * left, int shCount) +{ + int size; + + D (emitcode (";", "genlshTwo")); + + size = getDataSize (result); + + /* if shCount >= 8 */ + if (shCount >= 8) + { + shCount -= 8; + + _startLazyDPSEvaluation(); + + if (size > 1) + { + if (shCount) + { + _endLazyDPSEvaluation(); + shiftL1Left2Result (left, LSB, result, MSB16, shCount); + aopPut (result, zero, LSB); + } + else + { + movLeft2Result (left, LSB, result, MSB16, 0); + aopPut (result, zero, LSB); + _endLazyDPSEvaluation(); + } + } + else + { + aopPut (result, zero, LSB); + _endLazyDPSEvaluation(); + } + } + + /* 1 <= shCount <= 7 */ + else + { + if (size == 1) + shiftL1Left2Result (left, LSB, result, LSB, shCount); + else + shiftL2Left2Result (left, LSB, result, LSB, shCount); + } +} +#endif + +#if 0 +//REMOVE ME!!! +/*-----------------------------------------------------------------*/ +/* shiftLLong - shift left one long from left to result */ +/* offl = LSB or MSB16 */ +/*-----------------------------------------------------------------*/ +static void +shiftLLong (operand * left, operand * result, int offr) +{ + char *l; + int size = AOP_SIZE (result); + + if (size >= LSB + offr) + { + l = aopGet (left, LSB, FALSE, FALSE, NULL); + MOVA (l); + emitcode ("add", "a,acc"); + if (sameRegs (AOP (left), AOP (result)) && + size >= MSB16 + offr && offr != LSB) + emitcode ("xch", "a,%s", + aopGet (left, LSB + offr, FALSE, FALSE, DP2_RESULT_REG)); + else + aopPut (result, "a", LSB + offr); + } + + if (size >= MSB16 + offr) + { + if (!(sameRegs (AOP (result), AOP (left)) && size >= MSB16 + offr && offr != LSB)) + { + l = aopGet (left, MSB16, FALSE, FALSE, TRUE); + MOVA (l); + } + emitcode ("rlc", "a"); + if (sameRegs (AOP (left), AOP (result)) && + size >= MSB24 + offr && offr != LSB) + emitcode ("xch", "a,%s", + aopGet (left, MSB16 + offr, FALSE, FALSE, DP2_RESULT_REG)); + else + aopPut (result, "a", MSB16 + offr); + } + + if (size >= MSB24 + offr) + { + if (!(sameRegs (AOP (result), AOP (left)) && size >= MSB24 + offr && offr != LSB)) + { + l = aopGet (left, MSB24, FALSE, FALSE, NULL); + MOVA (l); + } + emitcode ("rlc", "a"); + if (sameRegs (AOP (left), AOP (result)) && + size >= MSB32 + offr && offr != LSB) + emitcode ("xch", "a,%s", + aopGet (left, MSB24 + offr, FALSE, FALSE, DP2_RESULT_REG)); + else + aopPut (result, "a", MSB24 + offr); + } + + if (size > MSB32 + offr) + { + if (!(sameRegs (AOP (result), AOP (left)) && size >= MSB32 + offr && offr != LSB)) + { + l = aopGet (left, MSB32, FALSE, FALSE, NULL); + MOVA (l); + } + emitcode ("rlc", "a"); + aopPut (result, "a", MSB32 + offr); + } + if (offr != LSB) + aopPut (result, zero, LSB); +} +#endif + +#if 0 +//REMOVE ME!!! +/*-----------------------------------------------------------------*/ +/* genlshFour - shift four byte by a known amount != 0 */ +/*-----------------------------------------------------------------*/ +static void +genlshFour (operand * result, operand * left, int shCount) +{ + int size; + + D (emitcode (";", "genlshFour")); + + size = AOP_SIZE (result); + + /* if shifting more that 3 bytes */ + if (shCount >= 24) + { + shCount -= 24; + if (shCount) + /* lowest order of left goes to the highest + order of the destination */ + shiftL1Left2Result (left, LSB, result, MSB32, shCount); + else + movLeft2Result (left, LSB, result, MSB32, 0); + aopPut (result, zero, LSB); + aopPut (result, zero, MSB16); + aopPut (result, zero, MSB24); + return; + } + + /* more than two bytes */ + else if (shCount >= 16) + { + /* lower order two bytes goes to higher order two bytes */ + shCount -= 16; + /* if some more remaining */ + if (shCount) + shiftL2Left2Result (left, LSB, result, MSB24, shCount); + else + { + movLeft2Result (left, MSB16, result, MSB32, 0); + movLeft2Result (left, LSB, result, MSB24, 0); + } + aopPut (result, zero, MSB16); + aopPut (result, zero, LSB); + return; + } + + /* if more than 1 byte */ + else if (shCount >= 8) + { + /* lower order three bytes goes to higher order three bytes */ + shCount -= 8; + if (size == 2) + { + if (shCount) + shiftL1Left2Result (left, LSB, result, MSB16, shCount); + else + movLeft2Result (left, LSB, result, MSB16, 0); + } + else + { /* size = 4 */ + if (shCount == 0) + { + movLeft2Result (left, MSB24, result, MSB32, 0); + movLeft2Result (left, MSB16, result, MSB24, 0); + movLeft2Result (left, LSB, result, MSB16, 0); + aopPut (result, zero, LSB); + } + else if (shCount == 1) + shiftLLong (left, result, MSB16); + else + { + shiftL2Left2Result (left, MSB16, result, MSB24, shCount); + shiftL1Left2Result (left, LSB, result, MSB16, shCount); + shiftRLeftOrResult (left, LSB, result, MSB24, 8 - shCount); + aopPut (result, zero, LSB); + } + } + } + + /* 1 <= shCount <= 7 */ + else if (shCount <= 2) + { + shiftLLong (left, result, LSB); + if (shCount == 2) + shiftLLong (result, result, LSB); + } + /* 3 <= shCount <= 7, optimize */ + else + { + shiftL2Left2Result (left, MSB24, result, MSB24, shCount); + shiftRLeftOrResult (left, MSB16, result, MSB24, 8 - shCount); + shiftL2Left2Result (left, LSB, result, LSB, shCount); + } +} +#endif + +#ifdef BETTER_LITERAL_SHIFT +/*-----------------------------------------------------------------*/ +/* genLeftShiftLiteral - left shifting by known count */ +/*-----------------------------------------------------------------*/ +static bool +genLeftShiftLiteral (operand * left, + operand * right, + operand * result, + iCode * ic) +{ + int shCount = (int) ulFromVal (AOP (right)->aopu.aop_lit); + int size; + + size = getSize (operandType (result)); + + D (emitcode (";", "genLeftShiftLiteral (%d), size %d", shCount, size);); + + /* We only handle certain easy cases so far. */ + if ((shCount != 0) + && (shCount < (size * 8)) + && (size != 1) + && (size != 2)) + { + D(emitcode (";", "genLeftShiftLiteral wimping out");); + return FALSE; + } + + freeAsmop (right, NULL, ic, TRUE); + + aopOp(left, ic, FALSE, FALSE); + aopOp(result, ic, FALSE, AOP_USESDPTR(left)); + +#if 0 // debug spew + if (IS_SYMOP(left) && OP_SYMBOL(left)->aop) + { + emitcode(";", "left (%s) is %d", OP_SYMBOL(left)->rname, AOP_TYPE(left)); + if (!IS_TRUE_SYMOP(left) && OP_SYMBOL(left)->usl.spillLoc) + { + emitcode(";", "\taka %s", OP_SYMBOL(left)->usl.spillLoc->rname); + } + } + if (IS_SYMOP(result) && OP_SYMBOL(result)->aop) + { + emitcode(";", "result (%s) is %d", OP_SYMBOL(result)->rname, AOP_TYPE(result)); + if (!IS_TRUE_SYMOP(result) && OP_SYMBOL(result)->usl.spillLoc) + { + emitcode(";", "\taka %s", OP_SYMBOL(result)->usl.spillLoc->rname); + } + } +#endif + +#if VIEW_SIZE + emitcode ("; shift left ", "result %d, left %d", size, + AOP_SIZE (left)); +#endif + + /* I suppose that the left size >= result size */ + if (shCount == 0) + { + _startLazyDPSEvaluation(); + while (size--) + { + movLeft2Result (left, size, result, size, 0); + } + _endLazyDPSEvaluation(); + } + else if (shCount >= (size * 8)) + { + _startLazyDPSEvaluation(); + while (size--) + { + aopPut (result, zero, size); + } + _endLazyDPSEvaluation(); + } + else + { + switch (size) + { + case 1: + genlshOne (result, left, shCount); + break; + + case 2: + genlshTwo (result, left, shCount); + break; +#if 0 + case 4: + genlshFour (result, left, shCount); + break; +#endif + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "*** ack! mystery literal shift!\n"); + break; + } + } + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); + return TRUE; +} +#endif + +/*-----------------------------------------------------------------*/ +/* genLeftShift - generates code for left shifting */ +/*-----------------------------------------------------------------*/ +static void +genLeftShift (iCode * ic) +{ + operand *left, *right, *result; + int size, offset; + char *l; + symbol *tlbl, *tlbl1; + bool pushedB; + + D (emitcode (";", "genLeftShift")); + + right = IC_RIGHT (ic); + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + aopOp (right, ic, FALSE, FALSE); + + +#ifdef BETTER_LITERAL_SHIFT + /* if the shift count is known then do it + as efficiently as possible */ + if (AOP_TYPE (right) == AOP_LIT) + { + if (genLeftShiftLiteral (left, right, result, ic)) + { + return; + } + } +#endif + + /* shift count is unknown then we have to form + a loop get the loop count in B : Note: we take + only the lower order byte since shifting + more that 32 bits make no sense anyway, ( the + largest size of an object can be only 32 bits ) */ + + pushedB = pushB (); + if (AOP_TYPE (right) == AOP_LIT) + { + /* Really should be handled by genLeftShiftLiteral, + * but since I'm too lazy to fix that today, at least we can make + * some small improvement. + */ + emitcode("mov", "b,#!constbyte", + ((int) ulFromVal (AOP (right)->aopu.aop_lit)) + 1); + } + else + { + MOVB (aopGet (right, 0, FALSE, FALSE, "b")); + emitcode ("inc", "b"); + } + freeAsmop (right, NULL, ic, TRUE); + aopOp (left, ic, FALSE, FALSE); + aopOp (result, ic, FALSE, AOP_USESDPTR(left)); + + /* now move the left to the result if they are not the same */ + if (!sameRegs (AOP (left), AOP (result)) && + AOP_SIZE (result) > 1) + { + + size = AOP_SIZE (result); + offset = 0; + _startLazyDPSEvaluation (); + while (size--) + { + l = aopGet (left, offset, FALSE, TRUE, NULL); + if (*l == '@' && (IS_AOP_PREG (result))) + { + + emitcode ("mov", "a,%s", l); + aopPut (result, "a", offset); + } + else + aopPut (result, l, offset); + offset++; + } + _endLazyDPSEvaluation (); + } + + tlbl = newiTempLabel (NULL); + size = AOP_SIZE (result); + offset = 0; + tlbl1 = newiTempLabel (NULL); + + /* if it is only one byte then */ + if (size == 1) + { + symbol *tlbl1 = newiTempLabel (NULL); + + l = aopGet (left, 0, FALSE, FALSE, NULL); + MOVA (l); + emitcode ("sjmp", "!tlabel", tlbl1->key + 100); + emitLabel (tlbl); + emitcode ("add", "a,acc"); + emitLabel (tlbl1); + emitcode ("djnz", "b,!tlabel", tlbl->key + 100); + popB (pushedB); + aopPut (result, "a", 0); + goto release; + } + + reAdjustPreg (AOP (result)); + + emitcode ("sjmp", "!tlabel", tlbl1->key + 100); + emitLabel (tlbl); + l = aopGet (result, offset, FALSE, FALSE, NULL); + MOVA (l); + emitcode ("add", "a,acc"); + aopPut (result, "a", offset++); + _startLazyDPSEvaluation (); + while (--size) + { + l = aopGet (result, offset, FALSE, FALSE, NULL); + MOVA (l); + emitcode ("rlc", "a"); + aopPut (result, "a", offset++); + } + _endLazyDPSEvaluation (); + reAdjustPreg (AOP (result)); + + emitLabel (tlbl1); + emitcode ("djnz", "b,!tlabel", tlbl->key + 100); + popB (pushedB); +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +#ifdef BETTER_LITERAL_SHIFT +/*-----------------------------------------------------------------*/ +/* genrshOne - right shift a one byte quantity by known count */ +/*-----------------------------------------------------------------*/ +static void +genrshOne (operand * result, operand * left, + int shCount, int sign) +{ + D (emitcode (";", "genrshOne")); + + shiftR1Left2Result (left, LSB, result, LSB, shCount, sign); +} +#endif + +#ifdef BETTER_LITERAL_SHIFT +/*-----------------------------------------------------------------*/ +/* genrshTwo - right shift two bytes by known amount != 0 */ +/*-----------------------------------------------------------------*/ +static void +genrshTwo (operand * result, operand * left, + int shCount, int sign) +{ + D (emitcode (";", "genrshTwo")); + + /* if shCount >= 8 */ + if (shCount >= 8) + { + shCount -= 8; + _startLazyDPSEvaluation(); + if (shCount) + shiftR1Left2Result (left, MSB16, result, LSB, shCount, sign); + else + movLeft2Result (left, MSB16, result, LSB, sign); + addSign (result, MSB16, sign); + _endLazyDPSEvaluation(); + } + + /* 1 <= shCount <= 7 */ + else + shiftR2Left2Result (left, LSB, result, LSB, shCount, sign); +} +#endif + +/*-----------------------------------------------------------------*/ +/* shiftRLong - shift right one long from left to result */ +/* offl = LSB or MSB16 */ +/*-----------------------------------------------------------------*/ +static void +shiftRLong (operand * left, int offl, + operand * result, int sign) +{ + bool overlapping = regsInCommon (left, result) || operandsEqu(left, result); + + if (overlapping && offl>1) + { + // we are in big trouble, but this shouldn't happen + werror(E_INTERNAL_ERROR, __FILE__, __LINE__); + } + + MOVA (aopGet (left, MSB32, FALSE, FALSE, NULL)); + + if (offl==MSB16) + { + // shift is > 8 + if (sign) + { + emitcode ("rlc", "a"); + emitcode ("subb", "a,acc"); + emitcode ("xch", "a,%s", + aopGet(left, MSB32, FALSE, FALSE, DP2_RESULT_REG)); + } + else + { + aopPut (result, zero, MSB32); + } + } + + if (!sign) + { + emitcode ("clr", "c"); + } + else + { + emitcode ("mov", "c,acc.7"); + } + + emitcode ("rrc", "a"); + + if (overlapping && offl==MSB16) + { + emitcode ("xch", "a,%s", aopGet (left, MSB24, FALSE, FALSE, DP2_RESULT_REG)); + } + else + { + aopPut (result, "a", MSB32 - offl); + MOVA (aopGet (left, MSB24, FALSE, FALSE, NULL)); + } + + emitcode ("rrc", "a"); + + if (overlapping && offl==MSB16) + { + emitcode ("xch", "a,%s", aopGet (left, MSB16, FALSE, FALSE, DP2_RESULT_REG)); + } + else + { + aopPut (result, "a", MSB24 - offl); + MOVA (aopGet (left, MSB16, FALSE, FALSE, NULL)); + } + + emitcode ("rrc", "a"); + if (offl != LSB) + { + aopPut (result, "a", MSB16 - offl); + } + else + { + if (overlapping && offl==MSB16) + { + emitcode ("xch", "a,%s", aopGet (left, LSB, FALSE, FALSE, DP2_RESULT_REG)); + } + else + { + aopPut (result, "a", MSB16 - offl); + MOVA (aopGet (left, LSB, FALSE, FALSE, NULL)); + } + emitcode ("rrc", "a"); + aopPut (result, "a", LSB); + } +} + +/*-----------------------------------------------------------------*/ +/* genrshFour - shift four byte by a known amount != 0 */ +/*-----------------------------------------------------------------*/ +static void +genrshFour (operand * result, operand * left, + int shCount, int sign) +{ + D (emitcode (";", "genrshFour")); + + /* if shifting more that 3 bytes */ + if (shCount >= 24) + { + shCount -= 24; + _startLazyDPSEvaluation(); + if (shCount) + shiftR1Left2Result (left, MSB32, result, LSB, shCount, sign); + else + movLeft2Result (left, MSB32, result, LSB, sign); + addSign (result, MSB16, sign); + _endLazyDPSEvaluation(); + } + else if (shCount >= 16) + { + shCount -= 16; + _startLazyDPSEvaluation(); + if (shCount) + shiftR2Left2Result (left, MSB24, result, LSB, shCount, sign); + else + { + movLeft2Result (left, MSB24, result, LSB, 0); + movLeft2Result (left, MSB32, result, MSB16, sign); + } + addSign (result, MSB24, sign); + _endLazyDPSEvaluation(); + } + else if (shCount >= 8) + { + shCount -= 8; + _startLazyDPSEvaluation(); + if (shCount == 1) + { + shiftRLong (left, MSB16, result, sign); + } + else if (shCount == 0) + { + movLeft2Result (left, MSB16, result, LSB, 0); + movLeft2Result (left, MSB24, result, MSB16, 0); + movLeft2Result (left, MSB32, result, MSB24, sign); + addSign (result, MSB32, sign); + } + else + { + shiftR2Left2Result (left, MSB16, result, LSB, shCount, 0); + shiftLLeftOrResult (left, MSB32, result, MSB16, 8 - shCount); + /* the last shift is signed */ + shiftR1Left2Result (left, MSB32, result, MSB24, shCount, sign); + addSign (result, MSB32, sign); + } + _endLazyDPSEvaluation(); + } + else + { + /* 1 <= shCount <= 7 */ + if (shCount <= 2) + { + shiftRLong (left, LSB, result, sign); + if (shCount == 2) + shiftRLong (result, LSB, result, sign); + } + else + { + shiftR2Left2Result (left, LSB, result, LSB, shCount, 0); + shiftLLeftOrResult (left, MSB24, result, MSB16, 8 - shCount); + shiftR2Left2Result (left, MSB24, result, MSB24, shCount, sign); + } + } +} + +#ifdef BETTER_LITERAL_SHIFT +/*-----------------------------------------------------------------*/ +/* genRightShiftLiteral - right shifting by known count */ +/*-----------------------------------------------------------------*/ +static bool +genRightShiftLiteral (operand * left, + operand * right, + operand * result, + iCode * ic, + int sign) +{ + int shCount = (int) ulFromVal (AOP (right)->aopu.aop_lit); + int size; + + size = getSize (operandType (result)); + + D(emitcode (";", "genRightShiftLiteral (%d), size %d", shCount, size);); + + /* We only handle certain easy cases so far. */ + if ((shCount != 0) + && (shCount < (size * 8)) + && (size != 1) + && (size != 2) + && (size != 4)) + { + D(emitcode (";", "genRightShiftLiteral wimping out");); + return FALSE; + } + + freeAsmop (right, NULL, ic, TRUE); + + aopOp (left, ic, FALSE, FALSE); + aopOp (result, ic, FALSE, AOP_USESDPTR(left)); + +#if VIEW_SIZE + emitcode ("; shift right ", "result %d, left %d", AOP_SIZE (result), + AOP_SIZE (left)); +#endif + + /* test the LEFT size !!! */ + + /* I suppose that the left size >= result size */ + if (shCount == 0) + { + size = getDataSize (result); + _startLazyDPSEvaluation(); + while (size--) + movLeft2Result (left, size, result, size, 0); + _endLazyDPSEvaluation(); + } + else if (shCount >= (size * 8)) + { + if (sign) + { + /* get sign in acc.7 */ + MOVA (aopGet (left, size - 1, FALSE, FALSE, NULL)); + } + addSign (result, LSB, sign); + } + else + { + switch (size) + { + case 1: + genrshOne (result, left, shCount, sign); + break; + + case 2: + genrshTwo (result, left, shCount, sign); + break; +#if 1 + case 4: + genrshFour (result, left, shCount, sign); + break; +#endif + default: + break; + } + } + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); + + return TRUE; +} +#endif + +/*-----------------------------------------------------------------*/ +/* genSignedRightShift - right shift of signed number */ +/*-----------------------------------------------------------------*/ +static void +genSignedRightShift (iCode * ic) +{ + operand *right, *left, *result; + int size, offset; + char *l; + symbol *tlbl, *tlbl1; + bool pushedB; + + D (emitcode (";", "genSignedRightShift")); + + /* we do it the hard way put the shift count in b + and loop thru preserving the sign */ + + right = IC_RIGHT (ic); + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + aopOp (right, ic, FALSE, FALSE); + +#ifdef BETTER_LITERAL_SHIFT + if (AOP_TYPE (right) == AOP_LIT) + { + if (genRightShiftLiteral (left, right, result, ic, 1)) + { + return; + } + } +#endif + /* shift count is unknown then we have to form + a loop get the loop count in B : Note: we take + only the lower order byte since shifting + more that 32 bits make no sense anyway, ( the + largest size of an object can be only 32 bits ) */ + + pushedB = pushB (); + if (AOP_TYPE (right) == AOP_LIT) + { + /* Really should be handled by genRightShiftLiteral, + * but since I'm too lazy to fix that today, at least we can make + * some small improvement. + */ + emitcode("mov", "b,#!constbyte", + ((int) ulFromVal (AOP (right)->aopu.aop_lit)) + 1); + } + else + { + MOVB (aopGet (right, 0, FALSE, FALSE, "b")); + emitcode ("inc", "b"); + } + freeAsmop (right, NULL, ic, TRUE); + aopOp (left, ic, FALSE, FALSE); + aopOp (result, ic, FALSE, AOP_USESDPTR(left)); + + /* now move the left to the result if they are not the + same */ + if (!sameRegs (AOP (left), AOP (result)) && + AOP_SIZE (result) > 1) + { + + size = AOP_SIZE (result); + offset = 0; + _startLazyDPSEvaluation (); + while (size--) + { + l = aopGet (left, offset, FALSE, TRUE, NULL); + if (*l == '@' && IS_AOP_PREG (result)) + { + + emitcode ("mov", "a,%s", l); + aopPut (result, "a", offset); + } + else + aopPut (result, l, offset); + offset++; + } + _endLazyDPSEvaluation (); + } + + /* mov the highest order bit to OVR */ + tlbl = newiTempLabel (NULL); + tlbl1 = newiTempLabel (NULL); + + size = AOP_SIZE (result); + offset = size - 1; + MOVA (aopGet (left, offset, FALSE, FALSE, NULL)); + emitcode ("rlc", "a"); + emitcode ("mov", "ov,c"); + /* if it is only one byte then */ + if (size == 1) + { + l = aopGet (left, 0, FALSE, FALSE, NULL); + MOVA (l); + emitcode ("sjmp", "!tlabel", tlbl1->key + 100); + emitLabel (tlbl); + emitcode ("mov", "c,ov"); + emitcode ("rrc", "a"); + emitLabel (tlbl1); + emitcode ("djnz", "b,!tlabel", tlbl->key + 100); + popB (pushedB); + aopPut (result, "a", 0); + goto release; + } + + reAdjustPreg (AOP (result)); + emitcode ("sjmp", "!tlabel", tlbl1->key + 100); + emitLabel (tlbl); + emitcode ("mov", "c,ov"); + _startLazyDPSEvaluation (); + while (size--) + { + l = aopGet (result, offset, FALSE, FALSE, NULL); + MOVA (l); + emitcode ("rrc", "a"); + aopPut (result, "a", offset--); + } + _endLazyDPSEvaluation (); + reAdjustPreg (AOP (result)); + emitLabel (tlbl1); + emitcode ("djnz", "b,!tlabel", tlbl->key + 100); + popB (pushedB); + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genRightShift - generate code for right shifting */ +/*-----------------------------------------------------------------*/ +static void +genRightShift (iCode * ic) +{ + operand *right, *left, *result; + sym_link *letype; + int size, offset; + char *l; + symbol *tlbl, *tlbl1; + bool pushedB; + + D (emitcode (";", "genRightShift")); + + /* if signed then we do it the hard way preserve the + sign bit moving it inwards */ + letype = getSpec (operandType (IC_LEFT (ic))); + + if (!SPEC_USIGN (letype)) + { + genSignedRightShift (ic); + return; + } + + /* signed & unsigned types are treated the same : i.e. the + signed is NOT propagated inwards : quoting from the + ANSI - standard : "for E1 >> E2, is equivalent to division + by 2**E2 if unsigned or if it has a non-negative value, + otherwise the result is implementation defined ", MY definition + is that the sign does not get propagated */ + + right = IC_RIGHT (ic); + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + aopOp (right, ic, FALSE, FALSE); + +#ifdef BETTER_LITERAL_SHIFT + /* if the shift count is known then do it + as efficiently as possible */ + if (AOP_TYPE (right) == AOP_LIT) + { + if (genRightShiftLiteral (left, right, result, ic, 0)) + { + return; + } + } +#endif + + /* shift count is unknown then we have to form + a loop get the loop count in B : Note: we take + only the lower order byte since shifting + more that 32 bits make no sense anyway, ( the + largest size of an object can be only 32 bits ) */ + + pushedB = pushB (); + if (AOP_TYPE (right) == AOP_LIT) + { + /* Really should be handled by genRightShiftLiteral, + * but since I'm too lazy to fix that today, at least we can make + * some small improvement. + */ + emitcode("mov", "b,#!constbyte", + ((int) ulFromVal (AOP (right)->aopu.aop_lit)) + 1); + } + else + { + MOVB (aopGet (right, 0, FALSE, FALSE, "b")); + emitcode ("inc", "b"); + } + freeAsmop (right, NULL, ic, TRUE); + aopOp (left, ic, FALSE, FALSE); + aopOp (result, ic, FALSE, AOP_USESDPTR(left)); + + /* now move the left to the result if they are not the + same */ + if (!sameRegs (AOP (left), AOP (result)) && + AOP_SIZE (result) > 1) + { + size = AOP_SIZE (result); + offset = 0; + _startLazyDPSEvaluation (); + while (size--) + { + l = aopGet (left, offset, FALSE, TRUE, NULL); + if (*l == '@' && IS_AOP_PREG (result)) + { + + emitcode ("mov", "a,%s", l); + aopPut (result, "a", offset); + } + else + aopPut (result, l, offset); + offset++; + } + _endLazyDPSEvaluation (); + } + + tlbl = newiTempLabel (NULL); + tlbl1 = newiTempLabel (NULL); + size = AOP_SIZE (result); + offset = size - 1; + + /* if it is only one byte then */ + if (size == 1) + { + l = aopGet (left, 0, FALSE, FALSE, NULL); + MOVA (l); + emitcode ("sjmp", "!tlabel", tlbl1->key + 100); + emitLabel (tlbl); + CLRC; + emitcode ("rrc", "a"); + emitLabel (tlbl1); + emitcode ("djnz", "b,!tlabel", tlbl->key + 100); + popB (pushedB); + aopPut (result, "a", 0); + goto release; + } + + reAdjustPreg (AOP (result)); + emitcode ("sjmp", "!tlabel", tlbl1->key + 100); + emitLabel (tlbl); + CLRC; + _startLazyDPSEvaluation (); + while (size--) + { + l = aopGet (result, offset, FALSE, FALSE, NULL); + MOVA (l); + emitcode ("rrc", "a"); + aopPut (result, "a", offset--); + } + _endLazyDPSEvaluation (); + reAdjustPreg (AOP (result)); + + emitLabel (tlbl1); + emitcode ("djnz", "b,!tlabel", tlbl->key + 100); + popB (pushedB); + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* emitPtrByteGet - emits code to get a byte into A through a */ +/* pointer register (R0, R1, or DPTR). The */ +/* original value of A can be preserved in B. */ +/*-----------------------------------------------------------------*/ +static void +emitPtrByteGet (char *rname, int p_type, bool preserveAinB) +{ + switch (p_type) + { + case IPOINTER: + case POINTER: + if (preserveAinB) + emitcode ("mov", "b,a"); + emitcode ("mov", "a,@%s", rname); + break; + + case PPOINTER: + if (preserveAinB) + emitcode ("mov", "b,a"); + emitcode ("movx", "a,@%s", rname); + break; + + case FPOINTER: + if (preserveAinB) + emitcode ("mov", "b,a"); + emitcode ("movx", "a,@dptr"); + break; + + case CPOINTER: + if (preserveAinB) + emitcode ("mov", "b,a"); + emitcode ("clr", "a"); + emitcode ("movc", "a,@a+dptr"); + break; + + case GPOINTER: + if (preserveAinB) + { + emitcode ("push", "b"); + emitcode ("push", "acc"); + } + emitcode ("lcall", "__gptrget"); + if (preserveAinB) + emitcode ("pop", "b"); + break; + } +} + +/*-----------------------------------------------------------------*/ +/* emitPtrByteSet - emits code to set a byte from src through a */ +/* pointer register (R0, R1, or DPTR). */ +/*-----------------------------------------------------------------*/ +static void +emitPtrByteSet (char *rname, int p_type, char *src) +{ + switch (p_type) + { + case IPOINTER: + case POINTER: + if (*src=='@') + { + MOVA (src); + emitcode ("mov", "@%s,a", rname); + } + else + emitcode ("mov", "@%s,%s", rname, src); + break; + + case PPOINTER: + MOVA (src); + emitcode ("movx", "@%s,a", rname); + break; + + case FPOINTER: + MOVA (src); + emitcode ("movx", "@dptr,a"); + break; + + case GPOINTER: + MOVA (src); + emitcode ("lcall", "__gptrput"); + break; + } +} + +/*-----------------------------------------------------------------*/ +/* genUnpackBits - generates code for unpacking bits */ +/*-----------------------------------------------------------------*/ +static void +genUnpackBits (operand * result, char *rname, int ptype) +{ + int offset = 0; /* result byte offset */ + int rsize; /* result size */ + int rlen = 0; /* remaining bitfield length */ + sym_link *etype; /* bitfield type information */ + int blen; /* bitfield length */ + int bstr; /* bitfield starting bit within byte */ + + D(emitcode (";", "genUnpackBits")); + + etype = getSpec (operandType (result)); + rsize = getSize (operandType (result)); + blen = SPEC_BLEN (etype); + bstr = SPEC_BSTR (etype); + + /* If the bitfield length is less than a byte */ + if (blen < 8) + { + emitPtrByteGet (rname, ptype, FALSE); + AccRol (8 - bstr); + emitcode ("anl", "a,#!constbyte", ((unsigned char) -1) >> (8 - blen)); + if (!SPEC_USIGN (etype)) + { + /* signed bitfield */ + symbol *tlbl = newiTempLabel (NULL); + + emitcode ("jnb", "acc.%d,%05d$", blen - 1, tlbl->key + 100); + emitcode ("orl", "a,#0x%02x", (unsigned char) (0xff << blen)); + emitLabel (tlbl); + } + aopPut (result, "a", offset++); + goto finish; + } + + /* Bit field did not fit in a byte. Copy all + but the partial byte at the end. */ + for (rlen=blen;rlen>=8;rlen-=8) + { + emitPtrByteGet (rname, ptype, FALSE); + aopPut (result, "a", offset++); + if (rlen>8) + emitcode ("inc", "%s", rname); + } + + /* Handle the partial byte at the end */ + if (rlen) + { + emitPtrByteGet (rname, ptype, FALSE); + emitcode ("anl", "a,#!constbyte", ((unsigned char) -1) >> (8-rlen)); + if (!SPEC_USIGN (etype)) + { + /* signed bitfield */ + symbol *tlbl = newiTempLabel (NULL); + + emitcode ("jnb", "acc.%d,%05d$", rlen - 1, tlbl->key + 100); + emitcode ("orl", "a,#0x%02x", (unsigned char) (0xff << rlen)); + emitLabel (tlbl); + } + aopPut (result, "a", offset++); + } + +finish: + if (offset < rsize) + { + char *source; + + if (SPEC_USIGN (etype)) + source = zero; + else + { + /* signed bitfield: sign extension with 0x00 or 0xff */ + emitcode ("rlc", "a"); + emitcode ("subb", "a,acc"); + + source = "a"; + } + rsize -= offset; + while (rsize--) + aopPut (result, source, offset++); + } +} + + +/*-----------------------------------------------------------------*/ +/* genDataPointerGet - generates code when ptr offset is known */ +/*-----------------------------------------------------------------*/ +static void +genDataPointerGet (operand * left, + operand * result, + iCode * ic) +{ + char *l; + char buffer[256]; + int size, offset = 0; + aopOp (result, ic, TRUE, FALSE); + + /* get the string representation of the name */ + l = aopGet (left, 0, FALSE, TRUE, NULL); + size = AOP_SIZE (result); + _startLazyDPSEvaluation (); + while (size--) + { + if (offset) + { + SNPRINTF (buffer, sizeof(buffer), "(%s + %d)", l + 1, offset); + } + else + { + SNPRINTF (buffer, sizeof(buffer), "%s", l + 1); + } + aopPut (result, buffer, offset++); + } + _endLazyDPSEvaluation (); + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genNearPointerGet - emitcode for near pointer fetch */ +/*-----------------------------------------------------------------*/ +static void +genNearPointerGet (operand * left, + operand * result, + iCode * ic, + iCode *pi) +{ + asmop *aop = NULL; + regs *preg; + char *rname; + sym_link *rtype, *retype, *letype; + sym_link *ltype = operandType (left); + char buffer[80]; + + rtype = operandType (result); + retype = getSpec (rtype); + letype = getSpec (ltype); + + aopOp (left, ic, FALSE, FALSE); + + /* if left is rematerialisable and + result is not bitfield variable type and + the left is pointer to data space i.e + lower 128 bytes of space */ + if (AOP_TYPE (left) == AOP_IMMD && + !IS_BITFIELD (retype) && + !IS_BITFIELD (letype) && + DCL_TYPE (ltype) == POINTER) + { + genDataPointerGet (left, result, ic); + return; + } + + /* if the value is already in a pointer register + then don't need anything more */ + if (!AOP_INPREG (AOP (left))) + { + /* otherwise get a free pointer register */ + aop = newAsmop (0); + preg = getFreePtr (ic, &aop, FALSE); + emitcode ("mov", "%s,%s", + preg->name, + aopGet (left, 0, FALSE, TRUE, DP2_RESULT_REG)); + rname = preg->name; + } + else + rname = aopGet (left, 0, FALSE, FALSE, DP2_RESULT_REG); + + freeAsmop (left, NULL, ic, TRUE); + aopOp (result, ic, FALSE, FALSE); + + /* if bitfield then unpack the bits */ + if (IS_BITFIELD (retype) || IS_BITFIELD (letype)) + genUnpackBits (result, rname, POINTER); + else + { + /* we have can just get the values */ + int size = AOP_SIZE (result); + int offset = 0; + + while (size--) + { + if (IS_AOP_PREG (result) || AOP_TYPE (result) == AOP_STK) + { + + emitcode ("mov", "a,@%s", rname); + aopPut (result, "a", offset); + } + else + { + SNPRINTF (buffer, sizeof(buffer), "@%s", rname); + aopPut (result, buffer, offset); + } + offset++; + if (size || pi) + emitcode ("inc", "%s", rname); + } + } + + /* now some housekeeping stuff */ + if (aop) /* we had to allocate for this iCode */ + { + if (pi) { /* post increment present */ + aopPut (left, rname, 0); + } + freeAsmop (NULL, aop, ic, TRUE); + } + else + { + /* we did not allocate which means left + already in a pointer register, then + if size > 0 && this could be used again + we have to point it back to where it + belongs */ + if (AOP_SIZE (result) > 1 && + !OP_SYMBOL (left)->remat && + (OP_SYMBOL (left)->liveTo > ic->seq || + ic->depth) && + !pi) + { + int size = AOP_SIZE (result) - 1; + while (size--) + emitcode ("dec", "%s", rname); + } + } + + /* done */ + freeAsmop (result, NULL, ic, TRUE); + if (pi) pi->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genPagedPointerGet - emitcode for paged pointer fetch */ +/*-----------------------------------------------------------------*/ +static void +genPagedPointerGet (operand * left, + operand * result, + iCode * ic, + iCode * pi) +{ + asmop *aop = NULL; + regs *preg; + char *rname; + sym_link *rtype, *retype, *letype; + + rtype = operandType (result); + retype = getSpec (rtype); + letype = getSpec (operandType (left)); + aopOp (left, ic, FALSE, FALSE); + + /* if the value is already in a pointer register + then don't need anything more */ + if (!AOP_INPREG (AOP (left))) + { + /* otherwise get a free pointer register */ + aop = newAsmop (0); + preg = getFreePtr (ic, &aop, FALSE); + emitcode ("mov", "%s,%s", + preg->name, + aopGet (left, 0, FALSE, TRUE, NULL)); + rname = preg->name; + } + else + rname = aopGet (left, 0, FALSE, FALSE, NULL); + + freeAsmop (left, NULL, ic, TRUE); + aopOp (result, ic, FALSE, FALSE); + + /* if bitfield then unpack the bits */ + if (IS_BITFIELD (retype) || IS_BITFIELD (letype)) + genUnpackBits (result, rname, PPOINTER); + else + { + /* we have can just get the values */ + int size = AOP_SIZE (result); + int offset = 0; + + while (size--) + { + + emitcode ("movx", "a,@%s", rname); + aopPut (result, "a", offset); + + offset++; + + if (size || pi) + emitcode ("inc", "%s", rname); + } + } + + /* now some housekeeping stuff */ + if (aop) /* we had to allocate for this iCode */ + { + if (pi) + aopPut (left, rname, 0); + freeAsmop (NULL, aop, ic, TRUE); + } + else + { + /* we did not allocate which means left + already in a pointer register, then + if size > 0 && this could be used again + we have to point it back to where it + belongs */ + if (AOP_SIZE (result) > 1 && + !OP_SYMBOL (left)->remat && + (OP_SYMBOL (left)->liveTo > ic->seq || + ic->depth) && + !pi) + { + int size = AOP_SIZE (result) - 1; + while (size--) + emitcode ("dec", "%s", rname); + } + } + + /* done */ + freeAsmop (result, NULL, ic, TRUE); + if (pi) pi->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genFarPointerGet - get value from far space */ +/*-----------------------------------------------------------------*/ +static void +genFarPointerGet (operand * left, + operand * result, iCode * ic, iCode *pi) +{ + int size, offset, dopi=1; + sym_link *retype = getSpec (operandType (result)); + sym_link *letype = getSpec (operandType (left)); + D (emitcode (";", "genFarPointerGet");); + + aopOp (left, ic, FALSE, FALSE); + + /* if the operand is already in dptr + then we do nothing else we move the value to dptr */ + if (AOP_TYPE (left) != AOP_STR && !AOP_INDPTRn(left) ) + { + /* if this is rematerializable */ + if (AOP_TYPE (left) == AOP_IMMD) + { + emitcode ("mov", "dptr,%s", aopGet (left, 0, TRUE, FALSE, NULL)); + } + else + { + /* we need to get it byte by byte */ + _startLazyDPSEvaluation (); + if (AOP_TYPE (left) != AOP_DPTR) + { + emitcode ("mov", "dpl,%s", aopGet (left, 0, FALSE, FALSE, NULL)); + emitcode ("mov", "dph,%s", aopGet (left, 1, FALSE, FALSE, NULL)); + if (options.model == MODEL_FLAT24) + emitcode ("mov", "dpx,%s", aopGet (left, 2, FALSE, FALSE, NULL)); + } + else + { + /* We need to generate a load to DPTR indirect through DPTR. */ + D (emitcode (";", "genFarPointerGet -- indirection special case.");); + emitcode ("push", "%s", aopGet (left, 0, FALSE, TRUE, NULL)); + emitcode ("push", "%s", aopGet (left, 1, FALSE, TRUE, NULL)); + if (options.model == MODEL_FLAT24) + emitcode ("mov", "dpx,%s", aopGet (left, 2, FALSE, FALSE, NULL)); + emitcode ("pop", "dph"); + emitcode ("pop", "dpl"); + dopi =0; + } + _endLazyDPSEvaluation (); + } + } + /* so dptr now contains the address */ + aopOp (result, ic, FALSE, (AOP_INDPTRn(left) ? FALSE : TRUE)); + + /* if bit then unpack */ + if (IS_BITFIELD (retype) || IS_BITFIELD (letype)) { + if (AOP_INDPTRn(left)) { + genSetDPTR(AOP(left)->aopu.dptr); + } + genUnpackBits (result, "dptr", FPOINTER); + if (AOP_INDPTRn(left)) { + genSetDPTR(0); + } + } else + { + size = AOP_SIZE (result); + offset = 0; + + if (AOP_INDPTRn(left) && AOP_USESDPTR(result)) { + while (size--) { + genSetDPTR(AOP(left)->aopu.dptr); + emitcode ("movx", "a,@dptr"); + if (size || (dopi && pi && AOP_TYPE (left) != AOP_IMMD)) + emitcode ("inc", "dptr"); + genSetDPTR (0); + aopPut (result, "a", offset++); + } + } else { + _startLazyDPSEvaluation (); + while (size--) { + if (AOP_INDPTRn(left)) { + genSetDPTR(AOP(left)->aopu.dptr); + } else { + genSetDPTR (0); + } + _flushLazyDPS (); + + emitcode ("movx", "a,@dptr"); + if (size || (dopi && pi && AOP_TYPE (left) != AOP_IMMD)) + emitcode ("inc", "dptr"); + + aopPut (result, "a", offset++); + } + _endLazyDPSEvaluation (); + } + } + if (dopi && pi && AOP_TYPE (left) != AOP_IMMD) { + if (!AOP_INDPTRn(left)) { + _startLazyDPSEvaluation (); + aopPut (left, "dpl", 0); + aopPut (left, "dph", 1); + if (options.model == MODEL_FLAT24) + aopPut (left, "dpx", 2); + _endLazyDPSEvaluation (); + } + pi->generated = 1; + } else if ((AOP_IS_STR(left) || AOP_INDPTRn(left)) && + AOP_SIZE(result) > 1 && + IS_SYMOP(left) && + (OP_SYMBOL(left)->liveTo > ic->seq || ic->depth)) { + + size = AOP_SIZE (result) - 1; + if (AOP_INDPTRn(left)) { + genSetDPTR(AOP(left)->aopu.dptr); + } + while (size--) emitcode ("lcall","__decdptr"); + if (AOP_INDPTRn(left)) { + genSetDPTR(0); + } + } + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genCodePointerGet - get value from code space */ +/*-----------------------------------------------------------------*/ +static void +genCodePointerGet (operand * left, + operand * result, iCode * ic, iCode *pi) +{ + int size, offset, dopi=1; + sym_link *retype = getSpec (operandType (result)); + + aopOp (left, ic, FALSE, FALSE); + + /* if the operand is already in dptr + then we do nothing else we move the value to dptr */ + if (AOP_TYPE (left) != AOP_STR && !AOP_INDPTRn(left)) + { + /* if this is rematerializable */ + if (AOP_TYPE (left) == AOP_IMMD) + { + emitcode ("mov", "dptr,%s", aopGet (left, 0, TRUE, FALSE, NULL)); + } + else + { /* we need to get it byte by byte */ + _startLazyDPSEvaluation (); + if (AOP_TYPE (left) != AOP_DPTR) + { + emitcode ("mov", "dpl,%s", aopGet (left, 0, FALSE, FALSE, NULL)); + emitcode ("mov", "dph,%s", aopGet (left, 1, FALSE, FALSE, NULL)); + if (options.model == MODEL_FLAT24) + emitcode ("mov", "dpx,%s", aopGet (left, 2, FALSE, FALSE, NULL)); + } + else + { + /* We need to generate a load to DPTR indirect through DPTR. */ + D (emitcode (";", "gencodePointerGet -- indirection special case.");); + emitcode ("push", "%s", aopGet (left, 0, FALSE, TRUE, NULL)); + emitcode ("push", "%s", aopGet (left, 1, FALSE, TRUE, NULL)); + if (options.model == MODEL_FLAT24) + emitcode ("mov", "dpx,%s", aopGet (left, 2, FALSE, FALSE, NULL)); + emitcode ("pop", "dph"); + emitcode ("pop", "dpl"); + dopi=0; + } + _endLazyDPSEvaluation (); + } + } + /* so dptr now contains the address */ + aopOp (result, ic, FALSE, (AOP_INDPTRn(left) ? FALSE : TRUE)); + + /* if bit then unpack */ + if (IS_BITFIELD (retype)) { + if (AOP_INDPTRn(left)) { + genSetDPTR(AOP(left)->aopu.dptr); + } + genUnpackBits (result, "dptr", CPOINTER); + if (AOP_INDPTRn(left)) { + genSetDPTR(0); + } + } else + { + size = AOP_SIZE (result); + offset = 0; + if (AOP_INDPTRn(left) && AOP_USESDPTR(result)) { + while (size--) { + genSetDPTR(AOP(left)->aopu.dptr); + emitcode ("clr", "a"); + emitcode ("movc", "a,@a+dptr"); + if (size || (dopi && pi && AOP_TYPE (left) != AOP_IMMD)) + emitcode ("inc", "dptr"); + genSetDPTR (0); + aopPut (result, "a", offset++); + } + } else { + _startLazyDPSEvaluation (); + while (size--) + { + if (AOP_INDPTRn(left)) { + genSetDPTR(AOP(left)->aopu.dptr); + } else { + genSetDPTR (0); + } + _flushLazyDPS (); + + emitcode ("clr", "a"); + emitcode ("movc", "a,@a+dptr"); + if (size || (dopi && pi && AOP_TYPE (left) != AOP_IMMD)) + emitcode ("inc", "dptr"); + aopPut (result, "a", offset++); + } + _endLazyDPSEvaluation (); + } + } + if (dopi && pi && AOP_TYPE (left) != AOP_IMMD) { + if (!AOP_INDPTRn(left)) { + _startLazyDPSEvaluation (); + + aopPut (left, "dpl", 0); + aopPut (left, "dph", 1); + if (options.model == MODEL_FLAT24) + aopPut (left, "dpx", 2); + + _endLazyDPSEvaluation (); + } + pi->generated = 1; + } else if (IS_SYMOP(left) && + (OP_SYMBOL(left)->ruonly || AOP_INDPTRn(left)) && + AOP_SIZE(result) > 1 && + (OP_SYMBOL (left)->liveTo > ic->seq || ic->depth)) { + + size = AOP_SIZE (result) - 1; + if (AOP_INDPTRn(left)) { + genSetDPTR(AOP(left)->aopu.dptr); + } + while (size--) emitcode ("lcall","__decdptr"); + if (AOP_INDPTRn(left)) { + genSetDPTR(0); + } + } + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genGenPointerGet - get value from generic pointer space */ +/*-----------------------------------------------------------------*/ +static void +genGenPointerGet (operand * left, + operand * result, iCode * ic, iCode * pi) +{ + int size, offset; + bool pushedB; + sym_link *retype = getSpec (operandType (result)); + sym_link *letype = getSpec (operandType (left)); + + D (emitcode (";", "genGenPointerGet")); + + aopOp (left, ic, FALSE, (AOP_IS_STR(left) ? FALSE : TRUE)); + + pushedB = pushB (); + /* if the operand is already in dptr + then we do nothing else we move the value to dptr */ + if (AOP_TYPE (left) != AOP_STR) + { + /* if this is rematerializable */ + if (AOP_TYPE (left) == AOP_IMMD) + { + emitcode ("mov", "dptr,%s", aopGet (left, 0, TRUE, FALSE, NULL)); + if (AOP(left)->aopu.aop_immd.from_cast_remat) + { + MOVB (aopGet (left, AOP_SIZE(left)-1, FALSE, FALSE, NULL)); + } + else + { + emitcode ("mov", "b,#%d", pointerCode (retype)); + } + } + else + { /* we need to get it byte by byte */ + _startLazyDPSEvaluation (); + emitcode ("mov", "dpl,%s", aopGet (left,0,FALSE,FALSE,NULL)); + emitcode ("mov", "dph,%s", aopGet (left,1,FALSE,FALSE,NULL)); + if (options.model == MODEL_FLAT24) { + emitcode ("mov", "dpx,%s", aopGet (left,2,FALSE,FALSE,NULL)); + emitcode ("mov", "b,%s", aopGet (left,3,FALSE,FALSE,NULL)); + } else { + emitcode ("mov", "b,%s", aopGet (left,2,FALSE,FALSE,NULL)); + } + _endLazyDPSEvaluation (); + } + } + + /* so dptr-b now contains the address */ + aopOp (result, ic, FALSE, TRUE); + + /* if bit then unpack */ + if (IS_BITFIELD (retype) || IS_BITFIELD (letype)) + { + genUnpackBits (result, "dptr", GPOINTER); + } + else + { + size = AOP_SIZE (result); + offset = 0; + + while (size--) + { + if (size) + { + // Get two bytes at a time, results in _AP & A. + // dptr will be incremented ONCE by __gptrgetWord. + // + // Note: any change here must be coordinated + // with the implementation of __gptrgetWord + // in device/lib/_gptrget.c + emitcode ("lcall", "__gptrgetWord"); + aopPut (result, "a", offset++); + aopPut (result, DP2_RESULT_REG, offset++); + size--; + } + else + { + // Only one byte to get. + emitcode ("lcall", "__gptrget"); + aopPut (result, "a", offset++); + } + + if (size || (pi && AOP_TYPE (left) != AOP_IMMD)) + { + emitcode ("inc", "dptr"); + } + } + } + + if (pi && AOP_TYPE (left) != AOP_IMMD) { + _startLazyDPSEvaluation (); + + aopPut (left, "dpl", 0); + aopPut (left, "dph", 1); + if (options.model == MODEL_FLAT24) { + aopPut (left, "dpx", 2); + aopPut (left, "b", 3); + } else aopPut (left, "b", 2); + + _endLazyDPSEvaluation (); + + pi->generated = 1; + } else if (OP_SYMBOL(left)->ruonly && AOP_SIZE(result) > 1 && + (OP_SYMBOL (left)->liveTo > ic->seq || ic->depth)) { + + size = AOP_SIZE (result) - 1; + while (size--) emitcode ("lcall","__decdptr"); + } + popB (pushedB); + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genPointerGet - generate code for pointer get */ +/*-----------------------------------------------------------------*/ +static void +genPointerGet (iCode * ic, iCode *pi) +{ + operand *left, *result; + sym_link *type, *etype; + int p_type; + + D (emitcode (";", "genPointerGet")); + + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + /* depending on the type of pointer we need to + move it to the correct pointer register */ + type = operandType (left); + etype = getSpec (type); + /* if left is of type of pointer then it is simple */ + if (IS_PTR (type) && !IS_FUNC (type->next)) + { + p_type = DCL_TYPE (type); + } + else + { + /* we have to go by the storage class */ + p_type = PTR_TYPE (SPEC_OCLS (etype)); + } + + /* special case when cast remat */ + if (p_type == GPOINTER && OP_SYMBOL(left)->remat && + IS_CAST_ICODE(OP_SYMBOL(left)->rematiCode)) + { + left = IC_RIGHT(OP_SYMBOL(left)->rematiCode); + type = operandType (left); + p_type = DCL_TYPE (type); + } + /* now that we have the pointer type we assign + the pointer values */ + switch (p_type) + { + + case POINTER: + case IPOINTER: + genNearPointerGet (left, result, ic, pi); + break; + + case PPOINTER: + genPagedPointerGet (left, result, ic, pi); + break; + + case FPOINTER: + genFarPointerGet (left, result, ic, pi); + break; + + case CPOINTER: + genCodePointerGet (left, result, ic, pi); + break; + + case GPOINTER: + genGenPointerGet (left, result, ic, pi); + break; + } +} + + +/*-----------------------------------------------------------------*/ +/* genPackBits - generates code for packed bit storage */ +/*-----------------------------------------------------------------*/ +static void +genPackBits (sym_link * etype, + operand * right, + char *rname, int p_type) +{ + int offset = 0; /* source byte offset */ + int rlen = 0; /* remaining bitfield length */ + int blen; /* bitfield length */ + int bstr; /* bitfield starting bit within byte */ + int litval; /* source literal value (if AOP_LIT) */ + unsigned char mask; /* bitmask within current byte */ + + D(emitcode (";", "genPackBits")); + + blen = SPEC_BLEN (etype); + bstr = SPEC_BSTR (etype); + + /* If the bitfield length is less than a byte */ + if (blen < 8) + { + mask = ((unsigned char) (0xFF << (blen + bstr)) | + (unsigned char) (0xFF >> (8 - bstr))); + + if (AOP_TYPE (right) == AOP_LIT) + { + /* Case with a bitfield length <8 and literal source + */ + litval = (int) ulFromVal (AOP (right)->aopu.aop_lit); + litval <<= bstr; + litval &= (~mask) & 0xff; + emitPtrByteGet (rname, p_type, FALSE); + if ((mask|litval)!=0xff) + emitcode ("anl","a,#!constbyte", mask); + if (litval) + emitcode ("orl","a,#!constbyte", litval); + } + else + { + if ((blen==1) && (p_type!=GPOINTER)) + { + /* Case with a bitfield length == 1 and no generic pointer + */ + if (AOP_TYPE (right) == AOP_CRY) + emitcode ("mov", "c,%s", AOP(right)->aopu.aop_dir); + else + { + MOVA (aopGet (right, 0, FALSE, FALSE, NULL)); + emitcode ("rrc","a"); + } + emitPtrByteGet (rname, p_type, FALSE); + emitcode ("mov","acc.%d,c",bstr); + } + else + { + bool pushedB; + /* Case with a bitfield length < 8 and arbitrary source + */ + MOVA (aopGet (right, 0, FALSE, FALSE, NULL)); + /* shift and mask source value */ + AccLsh (bstr); + emitcode ("anl", "a,#!constbyte", (~mask) & 0xff); + + pushedB = pushB (); + /* transfer A to B and get next byte */ + emitPtrByteGet (rname, p_type, TRUE); + + emitcode ("anl", "a,#!constbyte", mask); + emitcode ("orl", "a,b"); + if (p_type == GPOINTER) + emitcode ("pop", "b"); + + popB (pushedB); + } + } + + emitPtrByteSet (rname, p_type, "a"); + return; + } + + /* Bit length is greater than 7 bits. In this case, copy */ + /* all except the partial byte at the end */ + for (rlen=blen;rlen>=8;rlen-=8) + { + emitPtrByteSet (rname, p_type, + aopGet (right, offset++, FALSE, TRUE, NULL) ); + if (rlen>8) + emitcode ("inc", "%s", rname); + } + + /* If there was a partial byte at the end */ + if (rlen) + { + mask = (((unsigned char) -1 << rlen) & 0xff); + + if (AOP_TYPE (right) == AOP_LIT) + { + /* Case with partial byte and literal source + */ + litval = (int) ulFromVal (AOP (right)->aopu.aop_lit); + litval >>= (blen-rlen); + litval &= (~mask) & 0xff; + emitPtrByteGet (rname, p_type, FALSE); + if ((mask|litval)!=0xff) + emitcode ("anl","a,#!constbyte", mask); + if (litval) + emitcode ("orl","a,#!constbyte", litval); + } + else + { + bool pushedB; + /* Case with partial byte and arbitrary source + */ + MOVA (aopGet (right, offset++, FALSE, FALSE, NULL)); + emitcode ("anl", "a,#!constbyte", (~mask) & 0xff); + + pushedB = pushB (); + /* transfer A to B and get next byte */ + emitPtrByteGet (rname, p_type, TRUE); + + emitcode ("anl", "a,#!constbyte", mask); + emitcode ("orl", "a,b"); + if (p_type == GPOINTER) + emitcode ("pop", "b"); + + popB (pushedB); + } + emitPtrByteSet (rname, p_type, "a"); + } +} + + +/*-----------------------------------------------------------------*/ +/* genDataPointerSet - remat pointer to data space */ +/*-----------------------------------------------------------------*/ +static void +genDataPointerSet (operand * right, + operand * result, + iCode * ic) +{ + int size, offset = 0; + char *l, buffer[256]; + + D (emitcode (";", "genDataPointerSet")); + + aopOp (right, ic, FALSE, FALSE); + + l = aopGet (result, 0, FALSE, TRUE, NULL); + size = AOP_SIZE (right); + while (size--) + { + if (offset) + SNPRINTF (buffer, sizeof(buffer), "(%s + %d)", l + 1, offset); + else + SNPRINTF (buffer, sizeof(buffer), "%s", l + 1); + emitcode ("mov", "%s,%s", buffer, + aopGet (right, offset++, FALSE, FALSE, NULL)); + } + + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genNearPointerSet - emitcode for near pointer put */ +/*-----------------------------------------------------------------*/ +static void +genNearPointerSet (operand * right, + operand * result, + iCode * ic, + iCode * pi) +{ + asmop *aop = NULL; + char *rname, *l; + sym_link *retype, *letype; + sym_link *ptype = operandType (result); + + D (emitcode (";", "genNearPointerSet")); + + retype = getSpec (operandType (right)); + letype = getSpec (ptype); + + aopOp (result, ic, FALSE, FALSE); + + /* if the result is rematerializable & + in data space & not a bit variable */ + if (AOP_TYPE (result) == AOP_IMMD && + DCL_TYPE (ptype) == POINTER && + !IS_BITVAR (retype) && + !IS_BITVAR (letype)) + { + genDataPointerSet (right, result, ic); + return; + } + + /* if the value is already in a pointer register + then don't need anything more */ + if (!AOP_INPREG (AOP (result))) + { + /* otherwise get a free pointer register */ + regs *preg; + + aop = newAsmop (0); + preg = getFreePtr (ic, &aop, FALSE); + emitcode ("mov", "%s,%s", + preg->name, + aopGet (result, 0, FALSE, TRUE, NULL)); + rname = preg->name; + } + else + { + rname = aopGet (result, 0, FALSE, FALSE, NULL); + } + + aopOp (right, ic, FALSE, FALSE); + + /* if bitfield then unpack the bits */ + if (IS_BITFIELD (retype) || IS_BITFIELD (letype)) + genPackBits ((IS_BITFIELD (retype) ? retype : letype), right, rname, POINTER); + else + { + /* we can just get the values */ + int size = AOP_SIZE (right); + int offset = 0; + + while (size--) + { + l = aopGet (right, offset, FALSE, TRUE, NULL); + if ((*l == '@') || (strcmp (l, "acc") == 0)) + { + MOVA (l); + emitcode ("mov", "@%s,a", rname); + } + else + emitcode ("mov", "@%s,%s", rname, l); + if (size || pi) + emitcode ("inc", "%s", rname); + offset++; + } + } + + /* now some housekeeping stuff */ + if (aop) /* we had to allocate for this iCode */ + { + if (pi) + aopPut (result, rname, 0); + freeAsmop (NULL, aop, ic, TRUE); + } + else + { + /* we did not allocate which means left + already in a pointer register, then + if size > 0 && this could be used again + we have to point it back to where it + belongs */ + if (AOP_SIZE (right) > 1 && + !OP_SYMBOL (result)->remat && + (OP_SYMBOL (result)->liveTo > ic->seq || + ic->depth) && + !pi) + { + int size = AOP_SIZE (right) - 1; + while (size--) + emitcode ("dec", "%s", rname); + } + } + + /* done */ + if (pi) + pi->generated = 1; + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genPagedPointerSet - emitcode for Paged pointer put */ +/*-----------------------------------------------------------------*/ +static void +genPagedPointerSet (operand * right, + operand * result, + iCode * ic, + iCode * pi) +{ + asmop *aop = NULL; + char *rname, *l; + sym_link *retype, *letype; + + D (emitcode (";", "genPagedPointerSet")); + + retype = getSpec (operandType (right)); + letype = getSpec (operandType (result)); + + aopOp (result, ic, FALSE, FALSE); + + /* if the value is already in a pointer register + then don't need anything more */ + if (!AOP_INPREG (AOP (result))) + { + /* otherwise get a free pointer register */ + regs *preg; + + aop = newAsmop (0); + preg = getFreePtr (ic, &aop, FALSE); + emitcode ("mov", "%s,%s", + preg->name, + aopGet (result, 0, FALSE, TRUE, NULL)); + rname = preg->name; + } + else + { + rname = aopGet (result, 0, FALSE, FALSE, NULL); + } + + aopOp (right, ic, FALSE, FALSE); + + /* if bitfield then unpack the bits */ + if (IS_BITFIELD (retype) || IS_BITFIELD (letype)) + genPackBits ((IS_BITFIELD (retype) ? retype : letype), right, rname, PPOINTER); + else + { + /* we can just get the values */ + int size = AOP_SIZE (right); + int offset = 0; + + while (size--) + { + l = aopGet (right, offset, FALSE, TRUE, NULL); + MOVA (l); + emitcode ("movx", "@%s,a", rname); + if (size || pi) + emitcode ("inc", "%s", rname); + offset++; + } + } + + /* now some housekeeping stuff */ + if (aop) + { + if (pi) + aopPut (result, rname, 0); + /* we had to allocate for this iCode */ + freeAsmop (NULL, aop, ic, TRUE); + } + else + { + /* we did not allocate which means left + already in a pointer register, then + if size > 0 && this could be used again + we have to point it back to where it + belongs */ + if (AOP_SIZE (right) > 1 && + !OP_SYMBOL (result)->remat && + (OP_SYMBOL (result)->liveTo > ic->seq || ic->depth) && + !pi) + { + int size = AOP_SIZE (right) - 1; + while (size--) + emitcode ("dec", "%s", rname); + } + } + + /* done */ + if (pi) + pi->generated = 1; + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genFarPointerSet - set value from far space */ +/*-----------------------------------------------------------------*/ +static void +genFarPointerSet (operand * right, + operand * result, iCode * ic, iCode *pi) +{ + int size, offset, dopi=1; + sym_link *retype = getSpec (operandType (right)); + sym_link *letype = getSpec (operandType (result)); + + aopOp (result, ic, FALSE, FALSE); + + /* if the operand is already in dptr + then we do nothing else we move the value to dptr */ + if (AOP_TYPE (result) != AOP_STR && !AOP_INDPTRn(result)) + { + /* if this is remateriazable */ + if (AOP_TYPE (result) == AOP_IMMD) + emitcode ("mov", "dptr,%s", + aopGet (result, 0, TRUE, FALSE, NULL)); + else + { + /* we need to get it byte by byte */ + _startLazyDPSEvaluation (); + if (AOP_TYPE (result) != AOP_DPTR) + { + emitcode ("mov", "dpl,%s", aopGet (result, 0, FALSE, FALSE, NULL)); + emitcode ("mov", "dph,%s", aopGet (result, 1, FALSE, FALSE, NULL)); + if (options.model == MODEL_FLAT24) + emitcode ("mov", "dpx,%s", aopGet (result, 2, FALSE, FALSE, NULL)); + } + else + { + /* We need to generate a load to DPTR indirect through DPTR. */ + D (emitcode (";", "genFarPointerSet -- indirection special case.");); + + emitcode ("push", "%s", aopGet (result, 0, FALSE, TRUE, NULL)); + emitcode ("push", "%s", aopGet (result, 1, FALSE, TRUE, NULL)); + if (options.model == MODEL_FLAT24) + emitcode ("mov", "dpx,%s", aopGet (result, 2, FALSE, FALSE, NULL)); + emitcode ("pop", "dph"); + emitcode ("pop", "dpl"); + dopi=0; + } + _endLazyDPSEvaluation (); + } + } + /* so dptr now contains the address */ + aopOp (right, ic, FALSE, (AOP_INDPTRn(result) ? FALSE : TRUE)); + + /* if bit then unpack */ + if (IS_BITFIELD (retype) || IS_BITFIELD (letype)) + { + if (AOP_INDPTRn(result)) { + genSetDPTR(AOP(result)->aopu.dptr); + } + genPackBits ((IS_BITFIELD (retype) ? retype : letype), right, "dptr", FPOINTER); + if (AOP_INDPTRn(result)) { + genSetDPTR(0); + } + } else { + size = AOP_SIZE (right); + offset = 0; + if (AOP_INDPTRn(result) && AOP_USESDPTR(right)) { + while (size--) { + MOVA (aopGet (right, offset++, FALSE, FALSE, NULL)); + + genSetDPTR(AOP(result)->aopu.dptr); + emitcode ("movx", "@dptr,a"); + if (size || (dopi && pi && AOP_TYPE (result) != AOP_IMMD)) + emitcode ("inc", "dptr"); + genSetDPTR (0); + } + } else { + _startLazyDPSEvaluation (); + while (size--) { + MOVA (aopGet (right, offset++, FALSE, FALSE, NULL)); + + if (AOP_INDPTRn(result)) { + genSetDPTR(AOP(result)->aopu.dptr); + } else { + genSetDPTR (0); + } + _flushLazyDPS (); + + emitcode ("movx", "@dptr,a"); + if (size || (dopi && pi && AOP_TYPE (result) != AOP_IMMD)) + emitcode ("inc", "dptr"); + } + _endLazyDPSEvaluation (); + } + } + + if (dopi && pi && AOP_TYPE (result) != AOP_IMMD) { + if (!AOP_INDPTRn(result)) { + _startLazyDPSEvaluation (); + + aopPut (result,"dpl",0); + aopPut (result,"dph",1); + if (options.model == MODEL_FLAT24) + aopPut (result,"dpx",2); + + _endLazyDPSEvaluation (); + } + pi->generated=1; + } else if (IS_SYMOP (result) && + (OP_SYMBOL(result)->ruonly || AOP_INDPTRn(result)) && + AOP_SIZE(right) > 1 && + (OP_SYMBOL (result)->liveTo > ic->seq || ic->depth)) { + + size = AOP_SIZE (right) - 1; + if (AOP_INDPTRn(result)) { + genSetDPTR(AOP(result)->aopu.dptr); + } + while (size--) emitcode ("lcall","__decdptr"); + if (AOP_INDPTRn(result)) { + genSetDPTR(0); + } + } + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genGenPointerSet - set value from generic pointer space */ +/*-----------------------------------------------------------------*/ +static void +genGenPointerSet (operand * right, + operand * result, iCode * ic, iCode * pi) +{ + int size, offset; + bool pushedB; + sym_link *retype = getSpec (operandType (right)); + sym_link *letype = getSpec (operandType (result)); + + aopOp (result, ic, FALSE, AOP_IS_STR(result) ? FALSE : TRUE); + + pushedB = pushB (); + /* if the operand is already in dptr + then we do nothing else we move the value to dptr */ + if (AOP_TYPE (result) != AOP_STR) + { + _startLazyDPSEvaluation (); + /* if this is remateriazable */ + if (AOP_TYPE (result) == AOP_IMMD) + { + emitcode ("mov", "dptr,%s", aopGet (result, 0, TRUE, FALSE, NULL)); + if (AOP(result)->aopu.aop_immd.from_cast_remat) + { + MOVB (aopGet (result, AOP_SIZE(result)-1, FALSE, FALSE, NULL)); + } + else + { + emitcode ("mov", + "b,%s + 1", aopGet (result, 0, TRUE, FALSE, NULL)); + } + } + else + { /* we need to get it byte by byte */ + emitcode ("mov", "dpl,%s", aopGet (result, 0, FALSE, FALSE, NULL)); + emitcode ("mov", "dph,%s", aopGet (result, 1, FALSE, FALSE, NULL)); + if (options.model == MODEL_FLAT24) { + emitcode ("mov", "dpx,%s", aopGet (result, 2, FALSE, FALSE, NULL)); + emitcode ("mov", "b,%s", aopGet (result, 3, FALSE, FALSE, NULL)); + } else { + emitcode ("mov", "b,%s", aopGet (result, 2, FALSE, FALSE, NULL)); + } + } + _endLazyDPSEvaluation (); + } + /* so dptr + b now contains the address */ + aopOp (right, ic, FALSE, TRUE); + + /* if bit then unpack */ + if (IS_BITFIELD (retype) || IS_BITFIELD (letype)) + { + genPackBits ((IS_BITFIELD (retype) ? retype : letype), right, "dptr", GPOINTER); + } + else + { + size = AOP_SIZE (right); + offset = 0; + + _startLazyDPSEvaluation (); + while (size--) + { + if (size) + { + // Set two bytes at a time, passed in _AP & A. + // dptr will be incremented ONCE by __gptrputWord. + // + // Note: any change here must be coordinated + // with the implementation of __gptrputWord + // in device/lib/_gptrput.c + emitcode("mov", "_ap, %s", + aopGet (right, offset++, FALSE, FALSE, NULL)); + MOVA (aopGet (right, offset++, FALSE, FALSE, NULL)); + + genSetDPTR (0); + _flushLazyDPS (); + emitcode ("lcall", "__gptrputWord"); + size--; + } + else + { + // Only one byte to put. + MOVA (aopGet (right, offset++, FALSE, FALSE, NULL)); + + genSetDPTR (0); + _flushLazyDPS (); + emitcode ("lcall", "__gptrput"); + } + + if (size || (pi && AOP_TYPE (result) != AOP_IMMD)) + { + emitcode ("inc", "dptr"); + } + } + _endLazyDPSEvaluation (); + } + + if (pi && AOP_TYPE (result) != AOP_IMMD) { + _startLazyDPSEvaluation (); + + aopPut (result, "dpl",0); + aopPut (result, "dph",1); + if (options.model == MODEL_FLAT24) { + aopPut (result, "dpx",2); + aopPut (result, "b",3); + } else { + aopPut (result, "b",2); + } + _endLazyDPSEvaluation (); + + pi->generated=1; + } else if (OP_SYMBOL(result)->ruonly && AOP_SIZE(right) > 1 && + (OP_SYMBOL (result)->liveTo > ic->seq || ic->depth)) { + + size = AOP_SIZE (right) - 1; + while (size--) emitcode ("lcall","__decdptr"); + } + popB (pushedB); + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genPointerSet - stores the value into a pointer location */ +/*-----------------------------------------------------------------*/ +static void +genPointerSet (iCode * ic, iCode *pi) +{ + operand *right, *result; + sym_link *type, *etype; + int p_type; + + D (emitcode (";", "genPointerSet")); + + right = IC_RIGHT (ic); + result = IC_RESULT (ic); + + /* depending on the type of pointer we need to + move it to the correct pointer register */ + type = operandType (result); + etype = getSpec (type); + /* if left is of type of pointer then it is simple */ + if (IS_PTR (type) && !IS_FUNC (type->next)) + { + p_type = DCL_TYPE (type); + } + else + { + /* we have to go by the storage class */ + p_type = PTR_TYPE (SPEC_OCLS (etype)); + } + + /* special case when cast remat */ + if (p_type == GPOINTER && OP_SYMBOL(result)->remat && + IS_CAST_ICODE(OP_SYMBOL(result)->rematiCode)) { + result = IC_RIGHT(OP_SYMBOL(result)->rematiCode); + type = operandType (result); + p_type = DCL_TYPE (type); + } + + /* now that we have the pointer type we assign + the pointer values */ + switch (p_type) + { + + case POINTER: + case IPOINTER: + genNearPointerSet (right, result, ic, pi); + break; + + case PPOINTER: + genPagedPointerSet (right, result, ic, pi); + break; + + case FPOINTER: + genFarPointerSet (right, result, ic, pi); + break; + + case GPOINTER: + genGenPointerSet (right, result, ic, pi); + break; + + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "genPointerSet: illegal pointer type"); + } +} + +/*-----------------------------------------------------------------*/ +/* genIfx - generate code for Ifx statement */ +/*-----------------------------------------------------------------*/ +static void +genIfx (iCode * ic, iCode * popIc) +{ + operand *cond = IC_COND (ic); + int isbit = 0; + char *dup = NULL; + + D (emitcode (";", "genIfx")); + + aopOp (cond, ic, FALSE, FALSE); + + /* get the value into acc */ + if (AOP_TYPE (cond) != AOP_CRY) + { + toBoolean (cond); + } + else + { + isbit = 1; + if (AOP(cond)->aopu.aop_dir) + dup = Safe_strdup(AOP(cond)->aopu.aop_dir); + } + + /* the result is now in the accumulator or a directly addressable bit */ + freeAsmop (cond, NULL, ic, TRUE); + + /* if the condition is a bit variable */ + if (isbit && dup) + genIfxJump (ic, dup, popIc); + else if (isbit && IS_ITEMP (cond) && SPIL_LOC (cond)) + genIfxJump (ic, SPIL_LOC (cond)->rname, popIc); + else if (isbit && !IS_ITEMP (cond)) + genIfxJump (ic, OP_SYMBOL (cond)->rname, popIc); + else + genIfxJump (ic, "a", popIc); + + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genAddrOf - generates code for address of */ +/*-----------------------------------------------------------------*/ +static void +genAddrOf (iCode * ic) +{ + symbol *sym = OP_SYMBOL (IC_LEFT (ic)); + int size, offset; + bool pushedA = FALSE; + + D (emitcode (";", "genAddrOf")); + + aopOp (IC_RESULT (ic), ic, FALSE, FALSE); + + /* if the operand is on the stack then we + need to get the stack offset of this + variable */ + if (sym->onStack) + { + /* if 10 bit stack */ + if (options.stack10bit) { + char buff[10]; + int offset; + + tsprintf(buff, sizeof(buff), + "#!constbyte",(options.stack_loc >> 16) & 0xff); + /* if it has an offset then we need to compute it */ +/* emitcode ("subb", "a,#!constbyte", */ +/* -((sym->stack < 0) ? */ +/* ((short) (sym->stack - _G.nRegsSaved)) : */ +/* ((short) sym->stack)) & 0xff); */ +/* emitcode ("mov","b,a"); */ +/* emitcode ("mov","a,#!constbyte",(-((sym->stack < 0) ? */ +/* ((short) (sym->stack - _G.nRegsSaved)) : */ +/* ((short) sym->stack)) >> 8) & 0xff); */ + if (sym->stack) { + emitcode ("mov", "a,_bpx"); + emitcode ("add", "a,#!constbyte", ((sym->stack < 0) ? + ((char) (sym->stack - _G.nRegsSaved)) : + ((char) sym->stack )) & 0xff); + emitcode ("mov", "b,a"); + emitcode ("mov", "a,_bpx+1"); + + offset = (((sym->stack < 0) ? + ((short) (sym->stack - _G.nRegsSaved)) : + ((short) sym->stack )) >> 8) & 0xff; + + emitcode ("addc","a,#!constbyte", offset); + + if (aopPutUsesAcc (IC_RESULT (ic), "b", 0)) + { + emitcode ("push", "acc"); + pushedA = TRUE; + } + aopPut (IC_RESULT (ic), "b", 0); + if (pushedA) + emitcode ("pop", "acc"); + aopPut (IC_RESULT (ic), "a", 1); + aopPut (IC_RESULT (ic), buff, 2); + } else { + /* we can just move _bp */ + aopPut (IC_RESULT (ic), "_bpx", 0); + aopPut (IC_RESULT (ic), "_bpx+1", 1); + aopPut (IC_RESULT (ic), buff, 2); + } + } else { + /* if it has an offset then we need to compute it */ + if (sym->stack) + { + emitcode ("mov", "a,_bp"); + emitcode ("add", "a,#!constbyte", ((char) sym->stack & 0xff)); + aopPut (IC_RESULT (ic), "a", 0); + } + else + { + /* we can just move _bp */ + aopPut (IC_RESULT (ic), "_bp", 0); + } + /* fill the result with zero */ + size = AOP_SIZE (IC_RESULT (ic)) - 1; + + + if (options.stack10bit && size < (FPTRSIZE - 1)) { + fprintf (stderr, + "*** warning: pointer to stack var truncated.\n"); + } + + offset = 1; + while (size--) + { + aopPut (IC_RESULT (ic), zero, offset++); + } + } + goto release; + } + + /* object not on stack then we need the name */ + size = getDataSize (IC_RESULT (ic)); + offset = 0; + + while (size--) + { + char s[SDCC_NAME_MAX]; + if (offset) + { + switch (offset) { + case 1: + tsprintf(s, sizeof(s), "#!his",sym->rname); + break; + case 2: + tsprintf(s, sizeof(s), "#!hihis",sym->rname); + break; + case 3: + tsprintf(s, sizeof(s), "#!hihihis",sym->rname); + break; + default: /* should not need this (just in case) */ + SNPRINTF (s, sizeof(s), "#(%s >> %d)", sym->rname, offset * 8); + } + } + else + { + SNPRINTF (s, sizeof(s), "#%s", sym->rname); + } + aopPut (IC_RESULT (ic), s, offset++); + } + if (opIsGptr (IC_RESULT (ic))) + { + char buffer[10]; + SNPRINTF (buffer, sizeof(buffer), "#0x%02x", + pointerTypeToGPByte (pointerCode (getSpec (operandType (IC_LEFT (ic)))), NULL, NULL)); + aopPut (IC_RESULT (ic), buffer, GPTRSIZE - 1); + } + +release: + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); +} + +#if 0 // obsolete, and buggy for != xdata +/*-----------------------------------------------------------------*/ +/* genArrayInit - generates code for address of */ +/*-----------------------------------------------------------------*/ +static void +genArrayInit (iCode * ic) +{ + literalList *iLoop; + int ix, count; + int elementSize = 0, eIndex; + unsigned val, lastVal; + sym_link *type; + operand *left=IC_LEFT(ic); + + D (emitcode (";", "genArrayInit")); + + aopOp (IC_LEFT(ic), ic, FALSE, FALSE); + + if (AOP_TYPE(IC_LEFT(ic)) == AOP_IMMD) + { + // Load immediate value into DPTR. + emitcode("mov", "dptr, %s", + aopGet (IC_LEFT(ic), 0, TRUE, FALSE, NULL)); + } + else if (AOP_TYPE(IC_LEFT(ic)) != AOP_DPTR) + { +#if 0 + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "Unexpected operand to genArrayInit.\n"); + exit(1); +#else + // a regression because of SDCCcse.c:1.52 + emitcode ("mov", "dpl,%s", aopGet (left, 0, FALSE, FALSE, NULL)); + emitcode ("mov", "dph,%s", aopGet (left, 1, FALSE, FALSE, NULL)); + if (options.model == MODEL_FLAT24) + emitcode ("mov", "dpx,%s", aopGet (left, 2, FALSE, FALSE, NULL)); +#endif + } + + type = operandType(IC_LEFT(ic)); + + if (type && type->next) + { + elementSize = getSize(type->next); + } + else + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "can't determine element size in genArrayInit.\n"); + exit(1); + } + + iLoop = IC_ARRAYILIST(ic); + lastVal = 0xffff; + + while (iLoop) + { + bool firstpass = TRUE; + + emitcode(";", "store %d x 0x%x to DPTR (element size %d)", + iLoop->count, (int)iLoop->literalValue, elementSize); + + ix = iLoop->count; + + while (ix) + { + symbol *tlbl = NULL; + + count = ix > 256 ? 256 : ix; + + if (count > 1) + { + tlbl = newiTempLabel (NULL); + if (firstpass || (count & 0xff)) + { + emitcode("mov", "b, #!constbyte", count & 0xff); + } + + emitLabel (tlbl); + } + + firstpass = FALSE; + + for (eIndex = 0; eIndex < elementSize; eIndex++) + { + val = (((int)iLoop->literalValue) >> (eIndex * 8)) & 0xff; + if (val != lastVal) + { + emitcode("mov", "a, #!constbyte", val); + lastVal = val; + } + + emitcode("movx", "@dptr, a"); + emitcode("inc", "dptr"); + } + + if (count > 1) + { + emitcode("djnz", "b, !tlabel", tlbl->key + 100); + } + + ix -= count; + } + + iLoop = iLoop->next; + } + + freeAsmop (IC_LEFT(ic), NULL, ic, TRUE); +} +#endif + +/*-----------------------------------------------------------------*/ +/* genFarFarAssign - assignment when both are in far space */ +/*-----------------------------------------------------------------*/ +static void +genFarFarAssign (operand * result, operand * right, iCode * ic) +{ + int size = AOP_SIZE (right); + int offset = 0; + symbol *rSym = NULL; + + if (size == 1) + { + /* quick & easy case. */ + D (emitcode(";","genFarFarAssign (1 byte case)")); + MOVA (aopGet (right, 0, FALSE, FALSE, NULL)); + freeAsmop (right, NULL, ic, FALSE); + /* now assign DPTR to result */ + _G.accInUse++; + aopOp(result, ic, FALSE, FALSE); + _G.accInUse--; + aopPut (result, "a", 0); + freeAsmop(result, NULL, ic, FALSE); + return; + } + + /* See if we've got an underlying symbol to abuse. */ + if (IS_SYMOP(result) && OP_SYMBOL(result)) + { + if (IS_TRUE_SYMOP(result)) + { + rSym = OP_SYMBOL(result); + } + else if (IS_ITEMP(result) && OP_SYMBOL(result)->isspilt && OP_SYMBOL(result)->usl.spillLoc) + { + rSym = OP_SYMBOL(result)->usl.spillLoc; + } + } + + if (size > 1 && rSym && rSym->rname && !rSym->onStack) + { + /* We can use the '390 auto-toggle feature to good effect here. */ + + D (emitcode(";", "genFarFarAssign (390 auto-toggle fun)")); + emitcode("mov", "dps,#!constbyte",0x21); /* Select DPTR2 & auto-toggle. */ + emitcode ("mov", "dptr,#%s", rSym->rname); + /* DP2 = result, DP1 = right, DP1 is current. */ + while (size) + { + emitcode("movx", "a,@dptr"); + emitcode("movx", "@dptr,a"); + if (--size) + { + emitcode("inc", "dptr"); + emitcode("inc", "dptr"); + } + } + emitcode("mov", "dps,#0"); + freeAsmop (right, NULL, ic, FALSE); +#if 0 +some alternative code for processors without auto-toggle +no time to test now, so later well put in...kpb + D (emitcode(";", "genFarFarAssign (dual-dptr fun)")); + emitcode("mov", "dps,#1"); /* Select DPTR2. */ + emitcode ("mov", "dptr,#%s", rSym->rname); + /* DP2 = result, DP1 = right, DP1 is current. */ + while (size) + { + --size; + emitcode("movx", "a,@dptr"); + if (size) + emitcode("inc", "dptr"); + emitcode("inc", "dps"); + emitcode("movx", "@dptr,a"); + if (size) + emitcode("inc", "dptr"); + emitcode("inc", "dps"); + } + emitcode("mov", "dps,#0"); + freeAsmop (right, NULL, ic, FALSE); +#endif + } + else + { + D (emitcode (";", "genFarFarAssign")); + aopOp (result, ic, TRUE, TRUE); + + _startLazyDPSEvaluation (); + + while (size--) + { + aopPut (result, + aopGet (right, offset, FALSE, FALSE, NULL), offset); + offset++; + } + _endLazyDPSEvaluation (); + freeAsmop (result, NULL, ic, FALSE); + freeAsmop (right, NULL, ic, FALSE); + } +} + +/*-----------------------------------------------------------------*/ +/* genAssign - generate code for assignment */ +/*-----------------------------------------------------------------*/ +static void +genAssign (iCode * ic) +{ + operand *result, *right; + int size, offset; + unsigned long lit = 0L; + + D (emitcode (";", "genAssign")); + + result = IC_RESULT (ic); + right = IC_RIGHT (ic); + + /* if they are the same */ + if (operandsEqu (IC_RESULT (ic), IC_RIGHT (ic))) + return; + + aopOp (right, ic, FALSE, FALSE); + + emitcode (";", "genAssign: resultIsFar = %s", + isOperandInFarSpace (result) ? + "TRUE" : "FALSE"); + + /* special case both in far space */ + if ((AOP_TYPE (right) == AOP_DPTR || + AOP_TYPE (right) == AOP_DPTR2) && + /* IS_TRUE_SYMOP(result) && */ + isOperandInFarSpace (result)) + { + genFarFarAssign (result, right, ic); + return; + } + + aopOp (result, ic, TRUE, FALSE); + + /* if they are the same registers */ + if (sameRegs (AOP (right), AOP (result))) + goto release; + + /* if the result is a bit */ + if (AOP_TYPE (result) == AOP_CRY) /* works only for true symbols */ + { + /* if the right size is a literal then + we know what the value is */ + if (AOP_TYPE (right) == AOP_LIT) + { + if (((int) operandLitValue (right))) + aopPut (result, one, 0); + else + aopPut (result, zero, 0); + goto release; + } + + /* the right is also a bit variable */ + if (AOP_TYPE (right) == AOP_CRY) + { + emitcode ("mov", "c,%s", AOP (right)->aopu.aop_dir); + aopPut (result, "c", 0); + goto release; + } + + /* we need to or */ + toBoolean (right); + aopPut (result, "a", 0); + goto release; + } + + /* bit variables done */ + /* general case */ + size = getDataSize (result); + offset = 0; + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + if ((size > 1) && + (AOP_TYPE (result) != AOP_REG) && + (AOP_TYPE (right) == AOP_LIT) && + !IS_FLOAT (operandType (right))) + { + _startLazyDPSEvaluation (); + while (size && ((unsigned int) (lit >> (offset * 8)) != 0)) + { + aopPut (result, + aopGet (right, offset, FALSE, FALSE, NULL), + offset); + offset++; + size--; + } + /* And now fill the rest with zeros. */ + if (size) + { + emitcode ("clr", "a"); + } + while (size--) + { + aopPut (result, "a", offset++); + } + _endLazyDPSEvaluation (); + } + else + { + _startLazyDPSEvaluation (); + while (size--) + { + aopPut (result, + aopGet (right, offset, FALSE, FALSE, NULL), + offset); + offset++; + } + _endLazyDPSEvaluation (); + } + adjustArithmeticResult (ic); + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genJumpTab - generates code for jump table */ +/*-----------------------------------------------------------------*/ +static void +genJumpTab (iCode * ic) +{ + symbol *jtab; + char *l; + + D (emitcode (";", "genJumpTab")); + + aopOp (IC_JTCOND (ic), ic, FALSE, FALSE); + /* get the condition into accumulator */ + l = aopGet (IC_JTCOND (ic), 0, FALSE, FALSE, NULL); + MOVA (l); + /* multiply by four! */ + emitcode ("add", "a,acc"); + emitcode ("add", "a,acc"); + freeAsmop (IC_JTCOND (ic), NULL, ic, TRUE); + + jtab = newiTempLabel (NULL); + emitcode ("mov", "dptr,#!tlabel", jtab->key + 100); + emitcode ("jmp", "@a+dptr"); + emitLabel (jtab); + /* now generate the jump labels */ + for (jtab = setFirstItem (IC_JTLABELS (ic)); jtab; + jtab = setNextItem (IC_JTLABELS (ic))) + emitcode ("ljmp", "!tlabel", jtab->key + 100); + +} + +/*-----------------------------------------------------------------*/ +/* genCast - gen code for casting */ +/*-----------------------------------------------------------------*/ +static void +genCast (iCode * ic) +{ + operand *result = IC_RESULT (ic); + sym_link *ctype = operandType (IC_LEFT (ic)); + sym_link *rtype = operandType (IC_RIGHT (ic)); + operand *right = IC_RIGHT (ic); + int size, offset; + + D (emitcode (";", "genCast")); + + /* if they are equivalent then do nothing */ + if (operandsEqu (IC_RESULT (ic), IC_RIGHT (ic))) + return; + + aopOp (right, ic, FALSE, AOP_IS_STR (result)); + aopOp (result, ic, FALSE, (AOP_TYPE(right) == AOP_DPTR)); + + /* if the result is a bit (and not a bitfield) */ + if (IS_BIT (OP_SYMBOL (result)->type)) + { + /* if the right size is a literal then + we know what the value is */ + if (AOP_TYPE (right) == AOP_LIT) + { + if (((int) operandLitValue (right))) + aopPut (result, one, 0); + else + aopPut (result, zero, 0); + + goto release; + } + + /* the right is also a bit variable */ + if (AOP_TYPE (right) == AOP_CRY) + { + emitcode ("mov", "c,%s", AOP (right)->aopu.aop_dir); + aopPut (result, "c", 0); + goto release; + } + + /* we need to or */ + toBoolean (right); + aopPut (result, "a", 0); + goto release; + } + + /* if they are the same size : or less */ + if (AOP_SIZE (result) <= AOP_SIZE (right)) + { + + /* if they are in the same place */ + if (sameRegs (AOP (right), AOP (result))) + goto release; + + /* if they in different places then copy */ + size = AOP_SIZE (result); + offset = 0; + _startLazyDPSEvaluation (); + while (size--) + { + aopPut (result, + aopGet (right, offset, FALSE, FALSE, NULL), + offset); + offset++; + } + _endLazyDPSEvaluation (); + goto release; + } + + /* if the result is of type pointer */ + if (IS_PTR (ctype)) + { + + int p_type; + sym_link *type = operandType (right); + + /* pointer to generic pointer */ + if (IS_GENPTR (ctype)) + { + if (IS_PTR (type)) + { + p_type = DCL_TYPE (type); + } + else + { +#if OLD_CAST_BEHAVIOR + /* KV: we are converting a non-pointer type to + * a generic pointer. This (ifdef'd out) code + * says that the resulting generic pointer + * should have the same class as the storage + * location of the non-pointer variable. + * + * For example, converting an int (which happens + * to be stored in DATA space) to a pointer results + * in a DATA generic pointer; if the original int + * in XDATA space, so will be the resulting pointer. + * + * I don't like that behavior, and thus this change: + * all such conversions will be forced to XDATA and + * throw a warning. If you want some non-XDATA + * type, or you want to suppress the warning, you + * must go through an intermediate cast, like so: + * + * char _generic *gp = (char _xdata *)(intVar); + */ + sym_link *etype = getSpec (type); + + /* we have to go by the storage class */ + if (SPEC_OCLS (etype) != generic) + { + p_type = PTR_TYPE (SPEC_OCLS (etype)); + } + else +#endif + { + /* Converting unknown class (i.e. register variable) + * to generic pointer. This is not good, but + * we'll make a guess (and throw a warning). + */ + p_type = FPOINTER; + werror (W_INT_TO_GEN_PTR_CAST); + } + } + + /* the first two bytes are known */ + size = GPTRSIZE - 1; + offset = 0; + _startLazyDPSEvaluation (); + while (size--) + { + aopPut (result, + aopGet (right, offset, FALSE, FALSE, NULL), + offset); + offset++; + } + _endLazyDPSEvaluation (); + + /* the last byte depending on type */ + { + int gpVal = pointerTypeToGPByte(p_type, NULL, NULL); + char gpValStr[10]; + + if (gpVal == -1) + { + // pointerTypeToGPByte will have bitched. + exit(1); + } + + SNPRINTF(gpValStr, sizeof(gpValStr), "#0x%x", gpVal); + aopPut (result, gpValStr, GPTRSIZE - 1); + } + goto release; + } + + /* just copy the pointers */ + size = AOP_SIZE (result); + offset = 0; + _startLazyDPSEvaluation (); + while (size--) + { + aopPut (result, + aopGet (right, offset, FALSE, FALSE, NULL), + offset); + offset++; + } + _endLazyDPSEvaluation (); + goto release; + } + + /* so we now know that the size of destination is greater + than the size of the source */ + /* we move to result for the size of source */ + size = AOP_SIZE (right); + offset = 0; + _startLazyDPSEvaluation (); + while (size--) + { + aopPut (result, + aopGet (right, offset, FALSE, FALSE, NULL), + offset); + offset++; + } + _endLazyDPSEvaluation (); + + /* now depending on the sign of the source && destination */ + size = AOP_SIZE (result) - AOP_SIZE (right); + /* if unsigned or not an integral type */ + /* also, if the source is a bit, we don't need to sign extend, because + * it can't possibly have set the sign bit. + */ + if (!IS_SPEC (rtype) || SPEC_USIGN (rtype) || AOP_TYPE (right) == AOP_CRY) + { + while (size--) + { + aopPut (result, zero, offset++); + } + } + else + { + /* we need to extend the sign :{ */ + MOVA (aopGet (right, AOP_SIZE (right) - 1, + FALSE, FALSE, NULL)); + emitcode ("rlc", "a"); + emitcode ("subb", "a,acc"); + while (size--) + aopPut (result, "a", offset++); + } + + /* we are done hurray !!!! */ + +release: + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); + +} + +/*-----------------------------------------------------------------*/ +/* genMemcpyX2X - gen code for memcpy xdata to xdata */ +/*-----------------------------------------------------------------*/ +static void genMemcpyX2X( iCode *ic, int nparms, operand **parms, int fromc) +{ + operand *from , *to , *count; + symbol *lbl; + bitVect *rsave; + int i; + + /* we know it has to be 3 parameters */ + assert (nparms == 3); + + rsave = newBitVect(16); + /* save DPTR if it needs to be saved */ + for (i = DPL_IDX ; i <= B_IDX ; i++ ) { + if (bitVectBitValue(ic->rMask,i)) + rsave = bitVectSetBit(rsave,i); + } + rsave = bitVectIntersect(rsave,bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + savermask(rsave); + + to = parms[0]; + from = parms[1]; + count = parms[2]; + + aopOp (from, ic->next, FALSE, FALSE); + + /* get from into DPTR1 */ + emitcode ("mov", "dpl1,%s", aopGet (from, 0, FALSE, FALSE, NULL)); + emitcode ("mov", "dph1,%s", aopGet (from, 1, FALSE, FALSE, NULL)); + if (options.model == MODEL_FLAT24) { + emitcode ("mov", "dpx1,%s", aopGet (from, 2, FALSE, FALSE, NULL)); + } + + freeAsmop (from, NULL, ic, FALSE); + aopOp (to, ic, FALSE, FALSE); + /* get "to" into DPTR */ + /* if the operand is already in dptr + then we do nothing else we move the value to dptr */ + if (AOP_TYPE (to) != AOP_STR) { + /* if already in DPTR then we need to push */ + if (AOP_TYPE(to) == AOP_DPTR) { + emitcode ("push", "%s", aopGet (to, 0, FALSE, TRUE, NULL)); + emitcode ("push", "%s", aopGet (to, 1, FALSE, TRUE, NULL)); + if (options.model == MODEL_FLAT24) + emitcode ("mov", "dpx,%s", aopGet (to, 2, FALSE, FALSE, NULL)); + emitcode ("pop", "dph"); + emitcode ("pop", "dpl"); + } else { + _startLazyDPSEvaluation (); + /* if this is remateriazable */ + if (AOP_TYPE (to) == AOP_IMMD) { + emitcode ("mov", "dptr,%s", aopGet (to, 0, TRUE, FALSE, NULL)); + } else { /* we need to get it byte by byte */ + emitcode ("mov", "dpl,%s", aopGet (to, 0, FALSE, FALSE, NULL)); + emitcode ("mov", "dph,%s", aopGet (to, 1, FALSE, FALSE, NULL)); + if (options.model == MODEL_FLAT24) { + emitcode ("mov", "dpx,%s", aopGet (to, 2, FALSE, FALSE, NULL)); + } + } + _endLazyDPSEvaluation (); + } + } + freeAsmop (to, NULL, ic, FALSE); + _G.dptrInUse = _G.dptr1InUse = 1; + aopOp (count, ic->next->next, FALSE,FALSE); + lbl =newiTempLabel(NULL); + + /* now for the actual copy */ + if (AOP_TYPE(count) == AOP_LIT && + (int) ulFromVal (AOP(count)->aopu.aop_lit) <= 256) { + emitcode ("mov", "b,%s",aopGet(count,0,FALSE,FALSE,NULL)); + if (fromc) { + emitcode ("lcall","__bi_memcpyc2x_s"); + } else { + emitcode ("lcall","__bi_memcpyx2x_s"); + } + freeAsmop (count, NULL, ic, FALSE); + } else { + symbol *lbl1 = newiTempLabel(NULL); + + emitcode (";"," Auto increment but no djnz"); + emitcode ("mov","_ap,%s",aopGet (count, 0, FALSE, TRUE, NULL)); + emitcode ("mov","b,%s",aopGet (count, 1, FALSE, TRUE, NULL)); + freeAsmop (count, NULL, ic, FALSE); + emitcode ("mov", "dps,#!constbyte",0x21); /* Select DPTR2 & auto-toggle. */ + emitLabel (lbl); + if (fromc) { + emitcode ("clr","a"); + emitcode ("movc", "a,@a+dptr"); + } else + emitcode ("movx", "a,@dptr"); + emitcode ("movx", "@dptr,a"); + emitcode ("inc", "dptr"); + emitcode ("inc", "dptr"); + emitcode ("mov","a,b"); + emitcode ("orl","a,_ap"); + emitcode ("jz","!tlabel",lbl1->key+100); + emitcode ("mov","a,_ap"); + emitcode ("add","a,#!constbyte",0xFF); + emitcode ("mov","_ap,a"); + emitcode ("mov","a,b"); + emitcode ("addc","a,#!constbyte",0xFF); + emitcode ("mov","b,a"); + emitcode ("sjmp","!tlabel",lbl->key+100); + emitLabel (lbl1); + } + emitcode ("mov", "dps,#0"); + _G.dptrInUse = _G.dptr1InUse = 0; + unsavermask(rsave); + +} + +/*-----------------------------------------------------------------*/ +/* genMemcmpX2X - gen code for memcmp xdata to xdata */ +/*-----------------------------------------------------------------*/ +static void genMemcmpX2X( iCode *ic, int nparms, operand **parms, int fromc) +{ + operand *from , *to , *count; + symbol *lbl,*lbl2; + bitVect *rsave; + int i; + + /* we know it has to be 3 parameters */ + assert (nparms == 3); + + rsave = newBitVect(16); + /* save DPTR if it needs to be saved */ + for (i = DPL_IDX ; i <= B_IDX ; i++ ) { + if (bitVectBitValue(ic->rMask,i)) + rsave = bitVectSetBit(rsave,i); + } + rsave = bitVectIntersect(rsave,bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + savermask(rsave); + + to = parms[0]; + from = parms[1]; + count = parms[2]; + + aopOp (from, ic->next, FALSE, FALSE); + + /* get from into DPTR1 */ + emitcode ("mov", "dpl1,%s", aopGet (from, 0, FALSE, FALSE, NULL)); + emitcode ("mov", "dph1,%s", aopGet (from, 1, FALSE, FALSE, NULL)); + if (options.model == MODEL_FLAT24) { + emitcode ("mov", "dpx1,%s", aopGet (from, 2, FALSE, FALSE, NULL)); + } + + freeAsmop (from, NULL, ic, FALSE); + aopOp (to, ic, FALSE, FALSE); + /* get "to" into DPTR */ + /* if the operand is already in dptr + then we do nothing else we move the value to dptr */ + if (AOP_TYPE (to) != AOP_STR) { + /* if already in DPTR then we need to push */ + if (AOP_TYPE(to) == AOP_DPTR) { + emitcode ("push", "%s", aopGet (to, 0, FALSE, TRUE, NULL)); + emitcode ("push", "%s", aopGet (to, 1, FALSE, TRUE, NULL)); + if (options.model == MODEL_FLAT24) + emitcode ("mov", "dpx,%s", aopGet (to, 2, FALSE, FALSE, NULL)); + emitcode ("pop", "dph"); + emitcode ("pop", "dpl"); + } else { + _startLazyDPSEvaluation (); + /* if this is remateriazable */ + if (AOP_TYPE (to) == AOP_IMMD) { + emitcode ("mov", "dptr,%s", aopGet (to, 0, TRUE, FALSE, NULL)); + } else { /* we need to get it byte by byte */ + emitcode ("mov", "dpl,%s", aopGet (to, 0, FALSE, FALSE, NULL)); + emitcode ("mov", "dph,%s", aopGet (to, 1, FALSE, FALSE, NULL)); + if (options.model == MODEL_FLAT24) { + emitcode ("mov", "dpx,%s", aopGet (to, 2, FALSE, FALSE, NULL)); + } + } + _endLazyDPSEvaluation (); + } + } + freeAsmop (to, NULL, ic, FALSE); + _G.dptrInUse = _G.dptr1InUse = 1; + aopOp (count, ic->next->next, FALSE,FALSE); + lbl =newiTempLabel(NULL); + lbl2 =newiTempLabel(NULL); + + /* now for the actual compare */ + if (AOP_TYPE(count) == AOP_LIT && + (int) ulFromVal (AOP(count)->aopu.aop_lit) <= 256) { + emitcode ("mov", "b,%s",aopGet(count,0,FALSE,FALSE,NULL)); + if (fromc) + emitcode("lcall","__bi_memcmpc2x_s"); + else + emitcode("lcall","__bi_memcmpx2x_s"); + freeAsmop (count, NULL, ic, FALSE); + aopOp (IC_RESULT(ic), ic, FALSE,FALSE); + aopPut(IC_RESULT(ic),"a",0); + freeAsmop (IC_RESULT(ic), NULL, ic, FALSE); + } else { + symbol *lbl1 = newiTempLabel(NULL); + + emitcode("push","ar0"); + emitcode (";"," Auto increment but no djnz"); + emitcode ("mov","_ap,%s",aopGet (count, 0, FALSE, TRUE, NULL)); + emitcode ("mov","b,%s",aopGet (count, 1, FALSE, TRUE, NULL)); + freeAsmop (count, NULL, ic, FALSE); + emitcode ("mov", "dps,#!constbyte",0x21); /* Select DPTR2 & auto-toggle. */ + emitLabel (lbl); + if (fromc) { + emitcode ("clr","a"); + emitcode ("movc", "a,@a+dptr"); + } else + emitcode ("movx", "a,@dptr"); + emitcode ("mov","r0,a"); + emitcode ("movx", "a,@dptr"); + emitcode ("clr","c"); + emitcode ("subb","a,r0"); + emitcode ("jnz","!tlabel",lbl2->key+100); + emitcode ("inc", "dptr"); + emitcode ("inc", "dptr"); + emitcode ("mov","a,b"); + emitcode ("orl","a,_ap"); + emitcode ("jz","!tlabel",lbl1->key+100); + emitcode ("mov","a,_ap"); + emitcode ("add","a,#!constbyte",0xFF); + emitcode ("mov","_ap,a"); + emitcode ("mov","a,b"); + emitcode ("addc","a,#!constbyte",0xFF); + emitcode ("mov","b,a"); + emitcode ("sjmp","!tlabel",lbl->key+100); + emitLabel (lbl1); + emitcode ("clr","a"); + emitLabel (lbl2); + aopOp (IC_RESULT(ic), ic, FALSE,FALSE); + aopPut(IC_RESULT(ic),"a",0); + freeAsmop (IC_RESULT(ic), NULL, ic, FALSE); + emitcode("pop","ar0"); + emitcode ("mov", "dps,#0"); + } + _G.dptrInUse = _G.dptr1InUse = 0; + unsavermask(rsave); + +} + +/*-----------------------------------------------------------------*/ +/* genInp - gen code for __builtin_inp read data from a mem mapped */ +/* port, first parameter output area second parameter pointer to */ +/* port third parameter count */ +/*-----------------------------------------------------------------*/ +static void genInp( iCode *ic, int nparms, operand **parms) +{ + operand *from , *to , *count; + symbol *lbl; + bitVect *rsave; + int i; + + /* we know it has to be 3 parameters */ + assert (nparms == 3); + + rsave = newBitVect(16); + /* save DPTR if it needs to be saved */ + for (i = DPL_IDX ; i <= B_IDX ; i++ ) { + if (bitVectBitValue(ic->rMask,i)) + rsave = bitVectSetBit(rsave,i); + } + rsave = bitVectIntersect(rsave,bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + savermask(rsave); + + to = parms[0]; + from = parms[1]; + count = parms[2]; + + aopOp (from, ic->next, FALSE, FALSE); + + /* get from into DPTR1 */ + emitcode ("mov", "dpl1,%s", aopGet (from, 0, FALSE, FALSE, NULL)); + emitcode ("mov", "dph1,%s", aopGet (from, 1, FALSE, FALSE, NULL)); + if (options.model == MODEL_FLAT24) { + emitcode ("mov", "dpx1,%s", aopGet (from, 2, FALSE, FALSE, NULL)); + } + + freeAsmop (from, NULL, ic, FALSE); + aopOp (to, ic, FALSE, FALSE); + /* get "to" into DPTR */ + /* if the operand is already in dptr + then we do nothing else we move the value to dptr */ + if (AOP_TYPE (to) != AOP_STR) { + /* if already in DPTR then we need to push */ + if (AOP_TYPE(to) == AOP_DPTR) { + emitcode ("push", "%s", aopGet (to, 0, FALSE, TRUE, NULL)); + emitcode ("push", "%s", aopGet (to, 1, FALSE, TRUE, NULL)); + if (options.model == MODEL_FLAT24) + emitcode ("mov", "dpx,%s", aopGet (to, 2, FALSE, FALSE, NULL)); + emitcode ("pop", "dph"); + emitcode ("pop", "dpl"); + } else { + _startLazyDPSEvaluation (); + /* if this is remateriazable */ + if (AOP_TYPE (to) == AOP_IMMD) { + emitcode ("mov", "dptr,%s", aopGet (to, 0, TRUE, FALSE, NULL)); + } else { /* we need to get it byte by byte */ + emitcode ("mov", "dpl,%s", aopGet (to, 0, FALSE, FALSE, NULL)); + emitcode ("mov", "dph,%s", aopGet (to, 1, FALSE, FALSE, NULL)); + if (options.model == MODEL_FLAT24) { + emitcode ("mov", "dpx,%s", aopGet (to, 2, FALSE, FALSE, NULL)); + } + } + _endLazyDPSEvaluation (); + } + } + freeAsmop (to, NULL, ic, FALSE); + + _G.dptrInUse = _G.dptr1InUse = 1; + aopOp (count, ic->next->next, FALSE,FALSE); + lbl =newiTempLabel(NULL); + + /* now for the actual copy */ + if (AOP_TYPE(count) == AOP_LIT && + (int) ulFromVal (AOP(count)->aopu.aop_lit) <= 256) { + emitcode (";","OH JOY auto increment with djnz (very fast)"); + emitcode ("mov", "dps,#!constbyte",0x1); /* Select DPTR2 */ + emitcode ("mov", "b,%s",aopGet(count,0,FALSE,FALSE,NULL)); + freeAsmop (count, NULL, ic, FALSE); + emitLabel (lbl); + emitcode ("movx", "a,@dptr"); /* read data from port */ + emitcode ("dec","dps"); /* switch to DPTR */ + emitcode ("movx", "@dptr,a"); /* save into location */ + emitcode ("inc", "dptr"); /* point to next area */ + emitcode ("inc","dps"); /* switch to DPTR2 */ + emitcode ("djnz","b,!tlabel",lbl->key+100); + } else { + symbol *lbl1 = newiTempLabel(NULL); + + emitcode (";"," Auto increment but no djnz"); + emitcode ("mov","_ap,%s",aopGet (count, 0, FALSE, TRUE, NULL)); + emitcode ("mov","b,%s",aopGet (count, 1, FALSE, TRUE, NULL)); + freeAsmop (count, NULL, ic, FALSE); + emitcode ("mov", "dps,#!constbyte",0x1); /* Select DPTR2 */ + emitLabel (lbl); + emitcode ("movx", "a,@dptr"); + emitcode ("dec","dps"); /* switch to DPTR */ + emitcode ("movx", "@dptr,a"); + emitcode ("inc", "dptr"); + emitcode ("inc","dps"); /* switch to DPTR2 */ +/* emitcode ("djnz","b,!tlabel",lbl->key+100); */ +/* emitcode ("djnz","_ap,!tlabel",lbl->key+100); */ + emitcode ("mov","a,b"); + emitcode ("orl","a,_ap"); + emitcode ("jz","!tlabel",lbl1->key+100); + emitcode ("mov","a,_ap"); + emitcode ("add","a,#!constbyte",0xFF); + emitcode ("mov","_ap,a"); + emitcode ("mov","a,b"); + emitcode ("addc","a,#!constbyte",0xFF); + emitcode ("mov","b,a"); + emitcode ("sjmp","!tlabel",lbl->key+100); + emitLabel (lbl1); + } + emitcode ("mov", "dps,#0"); + _G.dptrInUse = _G.dptr1InUse = 0; + unsavermask(rsave); + +} + +/*-----------------------------------------------------------------*/ +/* genOutp - gen code for __builtin_inp write data to a mem mapped */ +/* port, first parameter output area second parameter pointer to */ +/* port third parameter count */ +/*-----------------------------------------------------------------*/ +static void genOutp( iCode *ic, int nparms, operand **parms) +{ + operand *from , *to , *count; + symbol *lbl; + bitVect *rsave; + int i; + + /* we know it has to be 3 parameters */ + assert (nparms == 3); + + rsave = newBitVect(16); + /* save DPTR if it needs to be saved */ + for (i = DPL_IDX ; i <= B_IDX ; i++ ) { + if (bitVectBitValue(ic->rMask,i)) + rsave = bitVectSetBit(rsave,i); + } + rsave = bitVectIntersect(rsave,bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + savermask(rsave); + + to = parms[0]; + from = parms[1]; + count = parms[2]; + + aopOp (from, ic->next, FALSE, FALSE); + + /* get from into DPTR1 */ + emitcode ("mov", "dpl1,%s", aopGet (from, 0, FALSE, FALSE, NULL)); + emitcode ("mov", "dph1,%s", aopGet (from, 1, FALSE, FALSE, NULL)); + if (options.model == MODEL_FLAT24) { + emitcode ("mov", "dpx1,%s", aopGet (from, 2, FALSE, FALSE, NULL)); + } + + freeAsmop (from, NULL, ic, FALSE); + aopOp (to, ic, FALSE, FALSE); + /* get "to" into DPTR */ + /* if the operand is already in dptr + then we do nothing else we move the value to dptr */ + if (AOP_TYPE (to) != AOP_STR) { + /* if already in DPTR then we need to push */ + if (AOP_TYPE(to) == AOP_DPTR) { + emitcode ("push", "%s", aopGet (to, 0, FALSE, TRUE, NULL)); + emitcode ("push", "%s", aopGet (to, 1, FALSE, TRUE, NULL)); + if (options.model == MODEL_FLAT24) + emitcode ("mov", "dpx,%s", aopGet (to, 2, FALSE, FALSE, NULL)); + emitcode ("pop", "dph"); + emitcode ("pop", "dpl"); + } else { + _startLazyDPSEvaluation (); + /* if this is remateriazable */ + if (AOP_TYPE (to) == AOP_IMMD) { + emitcode ("mov", "dptr,%s", aopGet (to, 0, TRUE, FALSE, NULL)); + } else { /* we need to get it byte by byte */ + emitcode ("mov", "dpl,%s", aopGet (to, 0, FALSE, FALSE, NULL)); + emitcode ("mov", "dph,%s", aopGet (to, 1, FALSE, FALSE, NULL)); + if (options.model == MODEL_FLAT24) { + emitcode ("mov", "dpx,%s", aopGet (to, 2, FALSE, FALSE, NULL)); + } + } + _endLazyDPSEvaluation (); + } + } + freeAsmop (to, NULL, ic, FALSE); + + _G.dptrInUse = _G.dptr1InUse = 1; + aopOp (count, ic->next->next, FALSE,FALSE); + lbl =newiTempLabel(NULL); + + /* now for the actual copy */ + if (AOP_TYPE(count) == AOP_LIT && + (int) ulFromVal (AOP(count)->aopu.aop_lit) <= 256) { + emitcode (";","OH JOY auto increment with djnz (very fast)"); + emitcode ("mov", "dps,#!constbyte",0x0); /* Select DPTR */ + emitcode ("mov", "b,%s",aopGet(count,0,FALSE,FALSE,NULL)); + emitLabel (lbl); + emitcode ("movx", "a,@dptr"); /* read data from port */ + emitcode ("inc","dps"); /* switch to DPTR2 */ + emitcode ("movx", "@dptr,a"); /* save into location */ + emitcode ("inc", "dptr"); /* point to next area */ + emitcode ("dec","dps"); /* switch to DPTR */ + emitcode ("djnz","b,!tlabel",lbl->key+100); + freeAsmop (count, NULL, ic, FALSE); + } else { + symbol *lbl1 = newiTempLabel(NULL); + + emitcode (";"," Auto increment but no djnz"); + emitcode ("mov","_ap,%s",aopGet (count, 0, FALSE, TRUE, NULL)); + emitcode ("mov","b,%s",aopGet (count, 1, FALSE, TRUE, NULL)); + freeAsmop (count, NULL, ic, FALSE); + emitcode ("mov", "dps,#!constbyte",0x0); /* Select DPTR */ + emitLabel (lbl); + emitcode ("movx", "a,@dptr"); + emitcode ("inc", "dptr"); + emitcode ("inc","dps"); /* switch to DPTR2 */ + emitcode ("movx", "@dptr,a"); + emitcode ("dec","dps"); /* switch to DPTR */ + emitcode ("mov","a,b"); + emitcode ("orl","a,_ap"); + emitcode ("jz","!tlabel",lbl1->key+100); + emitcode ("mov","a,_ap"); + emitcode ("add","a,#!constbyte",0xFF); + emitcode ("mov","_ap,a"); + emitcode ("mov","a,b"); + emitcode ("addc","a,#!constbyte",0xFF); + emitcode ("mov","b,a"); + emitcode ("sjmp","!tlabel",lbl->key+100); + emitLabel (lbl1); + } + emitcode ("mov", "dps,#0"); + _G.dptrInUse = _G.dptr1InUse = 0; + unsavermask(rsave); + +} + +/*-----------------------------------------------------------------*/ +/* genSwapW - swap lower & high order bytes */ +/*-----------------------------------------------------------------*/ +static void genSwapW(iCode *ic, int nparms, operand **parms) +{ + operand *dest; + operand *src; + assert (nparms==1); + + src = parms[0]; + dest=IC_RESULT(ic); + + assert(getSize(operandType(src))==2); + + aopOp (src, ic, FALSE, FALSE); + emitcode ("mov","a,%s",aopGet(src,0,FALSE,FALSE,NULL)); + _G.accInUse++; + MOVB(aopGet(src,1,FALSE,FALSE,"b")); + _G.accInUse--; + freeAsmop (src, NULL, ic, FALSE); + + aopOp (dest,ic, FALSE, FALSE); + aopPut(dest,"b",0); + aopPut(dest,"a",1); + freeAsmop (dest, NULL, ic, FALSE); +} + +/*-----------------------------------------------------------------*/ +/* genMemsetX - gencode for memSetX data */ +/*-----------------------------------------------------------------*/ +static void genMemsetX(iCode *ic, int nparms, operand **parms) +{ + operand *to , *val , *count; + symbol *lbl; + char *l; + int i; + bitVect *rsave; + + /* we know it has to be 3 parameters */ + assert (nparms == 3); + + to = parms[0]; + val = parms[1]; + count = parms[2]; + + /* save DPTR if it needs to be saved */ + rsave = newBitVect(16); + for (i = DPL_IDX ; i <= B_IDX ; i++ ) { + if (bitVectBitValue(ic->rMask,i)) + rsave = bitVectSetBit(rsave,i); + } + rsave = bitVectIntersect(rsave,bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + savermask(rsave); + + aopOp (to, ic, FALSE, FALSE); + /* get "to" into DPTR */ + /* if the operand is already in dptr + then we do nothing else we move the value to dptr */ + if (AOP_TYPE (to) != AOP_STR) { + /* if already in DPTR then we need to push */ + if (AOP_TYPE(to) == AOP_DPTR) { + emitcode ("push", "%s", aopGet (to, 0, FALSE, TRUE, NULL)); + emitcode ("push", "%s", aopGet (to, 1, FALSE, TRUE, NULL)); + if (options.model == MODEL_FLAT24) + emitcode ("mov", "dpx,%s", aopGet (to, 2, FALSE, FALSE, NULL)); + emitcode ("pop", "dph"); + emitcode ("pop", "dpl"); + } else { + _startLazyDPSEvaluation (); + /* if this is remateriazable */ + if (AOP_TYPE (to) == AOP_IMMD) { + emitcode ("mov", "dptr,%s", aopGet (to, 0, TRUE, FALSE, NULL)); + } else { /* we need to get it byte by byte */ + emitcode ("mov", "dpl,%s", aopGet (to, 0, FALSE, FALSE, NULL)); + emitcode ("mov", "dph,%s", aopGet (to, 1, FALSE, FALSE, NULL)); + if (options.model == MODEL_FLAT24) { + emitcode ("mov", "dpx,%s", aopGet (to, 2, FALSE, FALSE, NULL)); + } + } + _endLazyDPSEvaluation (); + } + } + freeAsmop (to, NULL, ic, FALSE); + + aopOp (val, ic->next->next, FALSE,FALSE); + aopOp (count, ic->next->next, FALSE,FALSE); + lbl =newiTempLabel(NULL); + /* now for the actual copy */ + if (AOP_TYPE(count) == AOP_LIT && + (int) ulFromVal (AOP(count)->aopu.aop_lit) <= 256) { + l = aopGet(val, 0, FALSE, FALSE, NULL); + emitcode ("mov", "b,%s",aopGet(count,0,FALSE,FALSE,NULL)); + MOVA(l); + emitLabel (lbl); + emitcode ("movx", "@dptr,a"); + emitcode ("inc", "dptr"); + emitcode ("djnz","b,!tlabel",lbl->key+100); + } else { + symbol *lbl1 = newiTempLabel(NULL); + + emitcode ("mov","_ap,%s",aopGet (count, 0, FALSE, TRUE, NULL)); + emitcode ("mov","b,%s",aopGet (count, 1, FALSE, TRUE, NULL)); + emitLabel (lbl); + MOVA (aopGet(val, 0, FALSE, FALSE, NULL)); + emitcode ("movx", "@dptr,a"); + emitcode ("inc", "dptr"); + emitcode ("mov","a,b"); + emitcode ("orl","a,_ap"); + emitcode ("jz","!tlabel",lbl1->key+100); + emitcode ("mov","a,_ap"); + emitcode ("add","a,#!constbyte",0xFF); + emitcode ("mov","_ap,a"); + emitcode ("mov","a,b"); + emitcode ("addc","a,#!constbyte",0xFF); + emitcode ("mov","b,a"); + emitcode ("sjmp","!tlabel",lbl->key+100); + emitLabel (lbl1); + } + freeAsmop (count, NULL, ic, FALSE); + unsavermask(rsave); +} + +/*-----------------------------------------------------------------*/ +/* genNatLibLoadPrimitive - calls TINI api function to load primitive */ +/*-----------------------------------------------------------------*/ +static void genNatLibLoadPrimitive(iCode *ic, int nparms, operand **parms,int size) +{ + bitVect *rsave ; + operand *pnum, *result; + int i; + + assert (nparms==1); + /* save registers that need to be saved */ + savermask(rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + + pnum = parms[0]; + aopOp (pnum, ic, FALSE, FALSE); + emitcode ("mov","a,%s",aopGet(pnum,0,FALSE,FALSE,DP2_RESULT_REG)); + freeAsmop (pnum, NULL, ic, FALSE); + emitcode ("lcall","NatLib_LoadPrimitive"); + aopOp (result=IC_RESULT(ic), ic, FALSE, FALSE); + if (aopHasRegs(AOP(result),R0_IDX,R1_IDX) || + aopHasRegs(AOP(result),R2_IDX,R3_IDX) ) { + for (i = (size-1) ; i >= 0 ; i-- ) { + emitcode ("push","a%s",javaRet[i]); + } + for (i=0; i < size ; i++ ) { + emitcode ("pop","a%s", + aopGet(result,i,FALSE,FALSE,DP2_RESULT_REG)); + } + } else { + for (i = 0 ; i < size ; i++ ) { + aopPut(result,javaRet[i],i); + } + } + freeAsmop (result, NULL, ic, FALSE); + unsavermask(rsave); +} + +/*-----------------------------------------------------------------*/ +/* genNatLibLoadPointer - calls TINI api function to load pointer */ +/*-----------------------------------------------------------------*/ +static void genNatLibLoadPointer(iCode *ic, int nparms, operand **parms) +{ + bitVect *rsave ; + operand *pnum, *result; + int size = 3; + int i; + + assert (nparms==1); + /* save registers that need to be saved */ + savermask(rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + + pnum = parms[0]; + aopOp (pnum, ic, FALSE, FALSE); + emitcode ("mov","a,%s",aopGet(pnum,0,FALSE,FALSE,DP2_RESULT_REG)); + freeAsmop (pnum, NULL, ic, FALSE); + emitcode ("lcall","NatLib_LoadPointer"); + aopOp (result=IC_RESULT(ic), ic, FALSE, FALSE); + if (AOP_TYPE(result)!=AOP_STR) { + for (i = 0 ; i < size ; i++ ) { + aopPut(result,fReturn[i],i); + } + } + freeAsmop (result, NULL, ic, FALSE); + unsavermask(rsave); +} + +/*-----------------------------------------------------------------*/ +/* genNatLibInstallStateBlock - */ +/*-----------------------------------------------------------------*/ +static void genNatLibInstallStateBlock(iCode *ic, int nparms, + operand **parms, const char *name) +{ + bitVect *rsave ; + operand *psb, *handle; + assert (nparms==2); + + /* save registers that need to be saved */ + savermask(rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + psb = parms[0]; + handle = parms[1]; + + /* put pointer to state block into DPTR1 */ + aopOp (psb, ic, FALSE, FALSE); + if (AOP_TYPE (psb) == AOP_IMMD) { + emitcode ("mov","dps,#1"); + emitcode ("mov", "dptr,%s", + aopGet (psb, 0, TRUE, FALSE, DP2_RESULT_REG)); + emitcode ("mov","dps,#0"); + } else { + emitcode ("mov","dpl1,%s",aopGet(psb,0,FALSE,FALSE,DP2_RESULT_REG)); + emitcode ("mov","dph1,%s",aopGet(psb,1,FALSE,FALSE,DP2_RESULT_REG)); + emitcode ("mov","dpx1,%s",aopGet(psb,2,FALSE,FALSE,DP2_RESULT_REG)); + } + freeAsmop (psb, NULL, ic, FALSE); + + /* put libraryID into DPTR */ + emitcode ("mov","dptr,#LibraryID"); + + /* put handle into r3:r2 */ + aopOp (handle, ic, FALSE, FALSE); + if (aopHasRegs(AOP(handle),R2_IDX,R3_IDX)) { + emitcode ("push","%s",aopGet(handle,0,FALSE,TRUE,DP2_RESULT_REG)); + emitcode ("push","%s",aopGet(handle,1,FALSE,TRUE,DP2_RESULT_REG)); + emitcode ("pop","ar3"); + emitcode ("pop","ar2"); + } else { + emitcode ("mov","r2,%s",aopGet(handle,0,FALSE,TRUE,DP2_RESULT_REG)); + emitcode ("mov","r3,%s",aopGet(handle,1,FALSE,TRUE,DP2_RESULT_REG)); + } + freeAsmop (psb, NULL, ic, FALSE); + + /* make the call */ + emitcode ("lcall","NatLib_Install%sStateBlock",name); + + /* put return value into place*/ + _G.accInUse++; + aopOp (IC_RESULT(ic), ic, FALSE, FALSE); + _G.accInUse--; + aopPut(IC_RESULT(ic),"a",0); + freeAsmop (IC_RESULT(ic), NULL, ic, FALSE); + unsavermask(rsave); +} + +/*-----------------------------------------------------------------*/ +/* genNatLibRemoveStateBlock - */ +/*-----------------------------------------------------------------*/ +static void genNatLibRemoveStateBlock(iCode *ic,int nparms,const char *name) +{ + bitVect *rsave ; + + assert(nparms==0); + + /* save registers that need to be saved */ + savermask(rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + + /* put libraryID into DPTR */ + emitcode ("mov","dptr,#LibraryID"); + /* make the call */ + emitcode ("lcall","NatLib_Remove%sStateBlock",name); + unsavermask(rsave); +} + +/*-----------------------------------------------------------------*/ +/* genNatLibGetStateBlock - */ +/*-----------------------------------------------------------------*/ +static void genNatLibGetStateBlock(iCode *ic,int nparms, + operand **parms,const char *name) +{ + bitVect *rsave ; + symbol *lbl = newiTempLabel(NULL); + + assert(nparms==0); + /* save registers that need to be saved */ + savermask(rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + + /* put libraryID into DPTR */ + emitcode ("mov","dptr,#LibraryID"); + /* make the call */ + emitcode ("lcall","NatLib_Remove%sStateBlock",name); + emitcode ("jnz","!tlabel",lbl->key+100); + + /* put return value into place */ + aopOp(IC_RESULT(ic),ic,FALSE,FALSE); + if (aopHasRegs(AOP(IC_RESULT(ic)),R2_IDX,R3_IDX)) { + emitcode ("push","ar3"); + emitcode ("push","ar2"); + emitcode ("pop","%s", + aopGet(IC_RESULT(ic),0,FALSE,TRUE,DP2_RESULT_REG)); + emitcode ("pop","%s", + aopGet(IC_RESULT(ic),1,FALSE,TRUE,DP2_RESULT_REG)); + } else { + aopPut(IC_RESULT(ic),"r2",0); + aopPut(IC_RESULT(ic),"r3",1); + } + freeAsmop (IC_RESULT(ic), NULL, ic, FALSE); + emitLabel (lbl); + unsavermask(rsave); +} + +/*-----------------------------------------------------------------*/ +/* genMMMalloc - */ +/*-----------------------------------------------------------------*/ +static void genMMMalloc (iCode *ic,int nparms, operand **parms, + int size, const char *name) +{ + bitVect *rsave ; + operand *bsize; + symbol *rsym; + symbol *lbl = newiTempLabel(NULL); + + assert (nparms == 1); + /* save registers that need to be saved */ + savermask(rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + + bsize=parms[0]; + aopOp (bsize,ic,FALSE,FALSE); + + /* put the size in R4-R2 */ + if (aopHasRegs(AOP(bsize),R2_IDX, (size==3 ? R4_IDX: R3_IDX))) { + emitcode("push","%s",aopGet(bsize,0,FALSE,TRUE,DP2_RESULT_REG)); + emitcode("push","%s",aopGet(bsize,1,FALSE,TRUE,DP2_RESULT_REG)); + if (size==3) { + emitcode("push","%s",aopGet(bsize,2,FALSE,TRUE,DP2_RESULT_REG)); + emitcode("pop","ar4"); + } + emitcode("pop","ar3"); + emitcode("pop","ar2"); + } else { + emitcode ("mov","r2,%s",aopGet(bsize,0,FALSE,TRUE,DP2_RESULT_REG)); + emitcode ("mov","r3,%s",aopGet(bsize,1,FALSE,TRUE,DP2_RESULT_REG)); + if (size==3) { + emitcode("mov","r4,%s",aopGet(bsize,2,FALSE,TRUE,DP2_RESULT_REG)); + } + } + freeAsmop (bsize, NULL, ic, FALSE); + + /* make the call */ + emitcode ("lcall","MM_%s",name); + emitcode ("jz","!tlabel",lbl->key+100); + emitcode ("mov","r2,#!constbyte",0xff); + emitcode ("mov","r3,#!constbyte",0xff); + emitLabel (lbl); + /* we don't care about the pointer : we just save the handle */ + rsym = OP_SYMBOL(IC_RESULT(ic)); + if (rsym->liveFrom != rsym->liveTo) { + aopOp(IC_RESULT(ic),ic,FALSE,FALSE); + if (aopHasRegs(AOP(IC_RESULT(ic)),R2_IDX,R3_IDX)) { + emitcode ("push","ar3"); + emitcode ("push","ar2"); + emitcode ("pop","%s", + aopGet(IC_RESULT(ic),0,FALSE,TRUE,DP2_RESULT_REG)); + emitcode ("pop","%s", + aopGet(IC_RESULT(ic),1,FALSE,TRUE,DP2_RESULT_REG)); + } else { + aopPut(IC_RESULT(ic),"r2",0); + aopPut(IC_RESULT(ic),"r3",1); + } + freeAsmop (IC_RESULT(ic), NULL, ic, FALSE); + } + unsavermask(rsave); +} + +/*-----------------------------------------------------------------*/ +/* genMMDeref - */ +/*-----------------------------------------------------------------*/ +static void genMMDeref (iCode *ic,int nparms, operand **parms) +{ + bitVect *rsave ; + operand *handle; + + assert (nparms == 1); + /* save registers that need to be saved */ + savermask(rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + + handle=parms[0]; + aopOp (handle,ic,FALSE,FALSE); + + /* put the size in R4-R2 */ + if (aopHasRegs(AOP(handle),R2_IDX,R3_IDX)) { + emitcode("push","%s", + aopGet(handle,0,FALSE,TRUE,DP2_RESULT_REG)); + emitcode("push","%s", + aopGet(handle,1,FALSE,TRUE,DP2_RESULT_REG)); + emitcode("pop","ar3"); + emitcode("pop","ar2"); + } else { + emitcode ("mov","r2,%s", + aopGet(handle,0,FALSE,TRUE,DP2_RESULT_REG)); + emitcode ("mov","r3,%s", + aopGet(handle,1,FALSE,TRUE,DP2_RESULT_REG)); + } + freeAsmop (handle, NULL, ic, FALSE); + + /* make the call */ + emitcode ("lcall","MM_Deref"); + + { + symbol *rsym = OP_SYMBOL(IC_RESULT(ic)); + if (rsym->liveFrom != rsym->liveTo) { + aopOp (IC_RESULT(ic),ic,FALSE,FALSE); + if (AOP_TYPE(IC_RESULT(ic)) != AOP_STR) { + _startLazyDPSEvaluation (); + + aopPut(IC_RESULT(ic),"dpl",0); + aopPut(IC_RESULT(ic),"dph",1); + aopPut(IC_RESULT(ic),"dpx",2); + + _endLazyDPSEvaluation (); + + } + } + } + freeAsmop (IC_RESULT(ic), NULL, ic, FALSE); + unsavermask(rsave); +} + +/*-----------------------------------------------------------------*/ +/* genMMUnrestrictedPersist - */ +/*-----------------------------------------------------------------*/ +static void genMMUnrestrictedPersist(iCode *ic,int nparms, operand **parms) +{ + bitVect *rsave ; + operand *handle; + + assert (nparms == 1); + /* save registers that need to be saved */ + savermask(rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + + handle=parms[0]; + aopOp (handle,ic,FALSE,FALSE); + + /* put the size in R3-R2 */ + if (aopHasRegs(AOP(handle),R2_IDX,R3_IDX)) { + emitcode("push","%s", + aopGet(handle,0,FALSE,TRUE,DP2_RESULT_REG)); + emitcode("push","%s", + aopGet(handle,1,FALSE,TRUE,DP2_RESULT_REG)); + emitcode("pop","ar3"); + emitcode("pop","ar2"); + } else { + emitcode ("mov","r2,%s", + aopGet(handle,0,FALSE,TRUE,DP2_RESULT_REG)); + emitcode ("mov","r3,%s", + aopGet(handle,1,FALSE,TRUE,DP2_RESULT_REG)); + } + freeAsmop (handle, NULL, ic, FALSE); + + /* make the call */ + emitcode ("lcall","MM_UnrestrictedPersist"); + + { + symbol *rsym = OP_SYMBOL(IC_RESULT(ic)); + if (rsym->liveFrom != rsym->liveTo) { + aopOp (IC_RESULT(ic),ic,FALSE,FALSE); + aopPut(IC_RESULT(ic),"a",0); + freeAsmop (IC_RESULT(ic), NULL, ic, FALSE); + } + } + unsavermask(rsave); +} + +/*-----------------------------------------------------------------*/ +/* genSystemExecJavaProcess - */ +/*-----------------------------------------------------------------*/ +static void genSystemExecJavaProcess(iCode *ic,int nparms, operand **parms) +{ + bitVect *rsave ; + operand *handle, *pp; + + assert (nparms==2); + /* save registers that need to be saved */ + savermask(rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + + pp = parms[0]; + handle = parms[1]; + + /* put the handle in R3-R2 */ + aopOp (handle,ic,FALSE,FALSE); + if (aopHasRegs(AOP(handle),R2_IDX,R3_IDX)) { + emitcode("push","%s", + aopGet(handle,0,FALSE,TRUE,DP2_RESULT_REG)); + emitcode("push","%s", + aopGet(handle,1,FALSE,TRUE,DP2_RESULT_REG)); + emitcode("pop","ar3"); + emitcode("pop","ar2"); + } else { + emitcode ("mov","r2,%s", + aopGet(handle,0,FALSE,TRUE,DP2_RESULT_REG)); + emitcode ("mov","r3,%s", + aopGet(handle,1,FALSE,TRUE,DP2_RESULT_REG)); + } + freeAsmop (handle, NULL, ic, FALSE); + + /* put pointer in DPTR */ + aopOp (pp,ic,FALSE,FALSE); + if (AOP_TYPE(pp) == AOP_IMMD) { + emitcode ("mov", "dptr,%s", + aopGet (pp, 0, TRUE, FALSE, NULL)); + } else if (AOP_TYPE(pp) != AOP_STR) { /* not already in dptr */ + emitcode ("mov","dpl,%s",aopGet(pp,0,FALSE,FALSE,NULL)); + emitcode ("mov","dph,%s",aopGet(pp,1,FALSE,FALSE,NULL)); + emitcode ("mov","dpx,%s",aopGet(pp,2,FALSE,FALSE,NULL)); + } + freeAsmop (handle, NULL, ic, FALSE); + + /* make the call */ + emitcode ("lcall","System_ExecJavaProcess"); + + /* put result in place */ + { + symbol *rsym = OP_SYMBOL(IC_RESULT(ic)); + if (rsym->liveFrom != rsym->liveTo) { + aopOp (IC_RESULT(ic),ic,FALSE,FALSE); + aopPut(IC_RESULT(ic),"a",0); + freeAsmop (IC_RESULT(ic), NULL, ic, FALSE); + } + } + + unsavermask(rsave); +} + +/*-----------------------------------------------------------------*/ +/* genSystemRTCRegisters - */ +/*-----------------------------------------------------------------*/ +static void genSystemRTCRegisters(iCode *ic,int nparms, operand **parms, + char *name) +{ + bitVect *rsave ; + operand *pp; + + assert (nparms==1); + /* save registers that need to be saved */ + savermask(rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + + pp=parms[0]; + /* put pointer in DPTR */ + aopOp (pp,ic,FALSE,FALSE); + if (AOP_TYPE (pp) == AOP_IMMD) { + emitcode ("mov","dps,#1"); + emitcode ("mov", "dptr,%s", + aopGet (pp, 0, TRUE, FALSE, NULL)); + emitcode ("mov","dps,#0"); + } else { + emitcode ("mov","dpl1,%s", + aopGet(pp,0,FALSE,FALSE,DP2_RESULT_REG)); + emitcode ("mov","dph1,%s", + aopGet(pp,1,FALSE,FALSE,DP2_RESULT_REG)); + emitcode ("mov","dpx1,%s", + aopGet(pp,2,FALSE,FALSE,DP2_RESULT_REG)); + } + freeAsmop (pp, NULL, ic, FALSE); + + /* make the call */ + emitcode ("lcall","System_%sRTCRegisters",name); + + unsavermask(rsave); +} + +/*-----------------------------------------------------------------*/ +/* genSystemThreadSleep - */ +/*-----------------------------------------------------------------*/ +static void genSystemThreadSleep(iCode *ic,int nparms, operand **parms, char *name) +{ + bitVect *rsave ; + operand *to, *s; + + assert (nparms==1); + /* save registers that need to be saved */ + savermask(rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + + to = parms[0]; + aopOp(to,ic,FALSE,FALSE); + if (aopHasRegs(AOP(to),R2_IDX,R3_IDX) || + aopHasRegs(AOP(to),R0_IDX,R1_IDX) ) { + emitcode ("push","%s", + aopGet(to,0,FALSE,TRUE,DP2_RESULT_REG)); + emitcode ("push","%s", + aopGet(to,1,FALSE,TRUE,DP2_RESULT_REG)); + emitcode ("push","%s", + aopGet(to,2,FALSE,TRUE,DP2_RESULT_REG)); + emitcode ("push","%s", + aopGet(to,3,FALSE,TRUE,DP2_RESULT_REG)); + emitcode ("pop","ar3"); + emitcode ("pop","ar2"); + emitcode ("pop","ar1"); + emitcode ("pop","ar0"); + } else { + emitcode ("mov","r0,%s", + aopGet(to,0,FALSE,TRUE,DP2_RESULT_REG)); + emitcode ("mov","r1,%s", + aopGet(to,1,FALSE,TRUE,DP2_RESULT_REG)); + emitcode ("mov","r2,%s", + aopGet(to,2,FALSE,TRUE,DP2_RESULT_REG)); + emitcode ("mov","r3,%s", + aopGet(to,3,FALSE,TRUE,DP2_RESULT_REG)); + } + freeAsmop (to, NULL, ic, FALSE); + + /* suspend in acc */ + s = parms[1]; + aopOp(s,ic,FALSE,FALSE); + emitcode ("mov","a,%s", + aopGet(s,0,FALSE,TRUE,NULL)); + freeAsmop (s, NULL, ic, FALSE); + + /* make the call */ + emitcode ("lcall","System_%s",name); + + unsavermask(rsave); +} + +/*-----------------------------------------------------------------*/ +/* genSystemThreadResume - */ +/*-----------------------------------------------------------------*/ +static void genSystemThreadResume(iCode *ic,int nparms, operand **parms) +{ + bitVect *rsave ; + operand *tid,*pid; + + assert (nparms==2); + /* save registers that need to be saved */ + savermask(rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + + tid = parms[0]; + pid = parms[1]; + + /* PID in R0 */ + aopOp(pid,ic,FALSE,FALSE); + emitcode ("mov","r0,%s", + aopGet(pid,0,FALSE,TRUE,DP2_RESULT_REG)); + freeAsmop (pid, NULL, ic, FALSE); + + /* tid into ACC */ + aopOp(tid,ic,FALSE,FALSE); + emitcode ("mov","a,%s", + aopGet(tid,0,FALSE,TRUE,DP2_RESULT_REG)); + freeAsmop (tid, NULL, ic, FALSE); + + emitcode ("lcall","System_ThreadResume"); + + /* put result into place */ + { + symbol *rsym = OP_SYMBOL(IC_RESULT(ic)); + if (rsym->liveFrom != rsym->liveTo) { + aopOp (IC_RESULT(ic),ic,FALSE,FALSE); + aopPut(IC_RESULT(ic),"a",0); + freeAsmop (IC_RESULT(ic), NULL, ic, FALSE); + } + } + unsavermask(rsave); +} + +/*-----------------------------------------------------------------*/ +/* genSystemProcessResume - */ +/*-----------------------------------------------------------------*/ +static void genSystemProcessResume(iCode *ic,int nparms, operand **parms) +{ + bitVect *rsave ; + operand *pid; + + assert (nparms==1); + /* save registers that need to be saved */ + savermask(rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + + pid = parms[0]; + + /* pid into ACC */ + aopOp(pid,ic,FALSE,FALSE); + emitcode ("mov","a,%s", + aopGet(pid,0,FALSE,TRUE,DP2_RESULT_REG)); + freeAsmop (pid, NULL, ic, FALSE); + + emitcode ("lcall","System_ProcessResume"); + + unsavermask(rsave); +} + +/*-----------------------------------------------------------------*/ +/* genSystem - */ +/*-----------------------------------------------------------------*/ +static void genSystem (iCode *ic,int nparms,char *name) +{ + assert(nparms == 0); + + emitcode ("lcall","System_%s",name); +} + +/*-----------------------------------------------------------------*/ +/* genSystemPoll - */ +/*-----------------------------------------------------------------*/ +static void genSystemPoll(iCode *ic,int nparms, operand **parms,char *name) +{ + bitVect *rsave ; + operand *fp; + + assert (nparms==1); + /* save registers that need to be saved */ + savermask(rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + ds390_rUmaskForOp (IC_RESULT(ic)))); + + fp = parms[0]; + aopOp (fp,ic,FALSE,FALSE); + if (AOP_TYPE (fp) == AOP_IMMD) { + emitcode ("mov", "dptr,%s", + aopGet (fp, 0, TRUE, FALSE, DP2_RESULT_REG)); + } else if (AOP_TYPE(fp) != AOP_STR) { /* not already in dptr */ + emitcode ("mov","dpl,%s", + aopGet(fp,0,FALSE,FALSE,DP2_RESULT_REG)); + emitcode ("mov","dph,%s", + aopGet(fp,1,FALSE,FALSE,DP2_RESULT_REG)); + emitcode ("mov","dpx,%s", + aopGet(fp,2,FALSE,FALSE,DP2_RESULT_REG)); + } + freeAsmop (fp, NULL, ic, FALSE); + + emitcode ("lcall","System_%sPoll",name); + + /* put result into place */ + { + symbol *rsym = OP_SYMBOL(IC_RESULT(ic)); + if (rsym->liveFrom != rsym->liveTo) { + aopOp (IC_RESULT(ic),ic,FALSE,FALSE); + aopPut(IC_RESULT(ic),"a",0); + freeAsmop (IC_RESULT(ic), NULL, ic, FALSE); + } + } + unsavermask(rsave); +} + +/*-----------------------------------------------------------------*/ +/* genSystemGetCurrentID - */ +/*-----------------------------------------------------------------*/ +static void genSystemGetCurrentID(iCode *ic,int nparms, operand **parms,char *name) +{ + assert (nparms==0); + + emitcode ("lcall","System_GetCurrent%sId",name); + /* put result into place */ + { + symbol *rsym = OP_SYMBOL(IC_RESULT(ic)); + if (rsym->liveFrom != rsym->liveTo) { + aopOp (IC_RESULT(ic),ic,FALSE,FALSE); + aopPut(IC_RESULT(ic),"a",0); + freeAsmop (IC_RESULT(ic), NULL, ic, FALSE); + } + } +} + +/*-----------------------------------------------------------------*/ +/* genDjnz - generate decrement & jump if not zero instrucion */ +/*-----------------------------------------------------------------*/ +static int +genDjnz (iCode * ic, iCode * ifx) +{ + symbol *lbl, *lbl1; + if (!ifx) + return 0; + + /* if the if condition has a false label + then we cannot save */ + if (IC_FALSE (ifx)) + return 0; + + /* if the minus is not of the form a = a - 1 */ + if (!isOperandEqual (IC_RESULT (ic), IC_LEFT (ic)) || + !IS_OP_LITERAL (IC_RIGHT (ic))) + return 0; + + if (operandLitValue (IC_RIGHT (ic)) != 1) + return 0; + + /* if the size of this greater than one then no + saving */ + if (getSize (operandType (IC_RESULT (ic))) > 1) + return 0; + + /* otherwise we can save BIG */ + + D (emitcode (";", "genDjnz")); + + lbl = newiTempLabel (NULL); + lbl1 = newiTempLabel (NULL); + + aopOp (IC_RESULT (ic), ic, FALSE, FALSE); + + if (AOP_NEEDSACC(IC_RESULT(ic))) + { + /* If the result is accessed indirectly via + * the accumulator, we must explicitly write + * it back after the decrement. + */ + char *rByte = aopGet (IC_RESULT(ic), 0, FALSE, FALSE, NULL); + + if (strcmp(rByte, "a")) + { + /* Something is hopelessly wrong */ + fprintf(stderr, "*** warning: internal error at %s:%d\n", + __FILE__, __LINE__); + /* We can just give up; the generated code will be inefficient, + * but what the hey. + */ + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + return 0; + } + emitcode ("dec", "%s", rByte); + aopPut (IC_RESULT (ic), rByte, 0); + emitcode ("jnz", "!tlabel", lbl->key + 100); + } + else if (IS_AOP_PREG (IC_RESULT (ic))) + { + emitcode ("dec", "%s", + aopGet (IC_RESULT (ic), 0, FALSE, FALSE, NULL)); + MOVA (aopGet (IC_RESULT (ic), 0, FALSE, FALSE, NULL)); + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + ifx->generated = 1; + emitcode ("jnz", "!tlabel", lbl->key + 100); + } + else + { + emitcode ("djnz", "%s,!tlabel", aopGet (IC_RESULT (ic), 0, FALSE, TRUE, NULL), + lbl->key + 100); + } + emitcode ("sjmp", "!tlabel", lbl1->key + 100); + emitLabel (lbl); + emitcode ("ljmp", "!tlabel", IC_TRUE (ifx)->key + 100); + emitLabel (lbl1); + + if (!ifx->generated) + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + ifx->generated = 1; + return 1; +} + +/*-----------------------------------------------------------------*/ +/* genReceive - generate code for a receive iCode */ +/*-----------------------------------------------------------------*/ +static void +genReceive (iCode * ic) +{ + int size = getSize (operandType (IC_RESULT (ic))); + int offset = 0; + int rb1off ; + + D (emitcode (";", "genReceive")); + + if (ic->argreg == 1) + { + /* first parameter */ + if (AOP_IS_STR(IC_RESULT(ic))) + { + /* Nothing to do: it's already in the proper place. */ + return; + } + else + { + bool useDp2; + + useDp2 = isOperandInFarSpace (IC_RESULT (ic)) && + (OP_SYMBOL (IC_RESULT (ic))->isspilt || + IS_TRUE_SYMOP (IC_RESULT (ic))); + + _G.accInUse++; + aopOp (IC_RESULT (ic), ic, FALSE, useDp2); + _G.accInUse--; + + /* Sanity checking... */ + if (AOP_USESDPTR(IC_RESULT(ic))) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "genReceive got unexpected DPTR."); + } + assignResultValue (IC_RESULT (ic), NULL); + } + } + else if (ic->argreg > 12) + { /* bit parameters */ + if (OP_SYMBOL (IC_RESULT (ic))->regs[0]->rIdx != ic->argreg-5) + { + aopOp (IC_RESULT (ic), ic, FALSE, FALSE); + emitcode ("mov", "c,%s", rb1regs[ic->argreg-5]); + outBitC(IC_RESULT (ic)); + } + } + else + { + /* second receive onwards */ + /* this gets a little tricky since unused receives will be + eliminated, we have saved the reg in the type field . and + we use that to figure out which register to use */ + aopOp (IC_RESULT (ic), ic, FALSE, FALSE); + rb1off = ic->argreg; + while (size--) + { + aopPut (IC_RESULT (ic), rb1regs[rb1off++ -5], offset++); + } + } + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genDummyRead - generate code for dummy read of volatiles */ +/*-----------------------------------------------------------------*/ +static void +genDummyRead (iCode * ic) +{ + operand *op; + int size, offset; + + D (emitcode(";", "genDummyRead")); + + op = IC_RIGHT (ic); + if (op && IS_SYMOP (op)) + { + aopOp (op, ic, FALSE, FALSE); + + /* if the result is a bit */ + if (AOP_TYPE (op) == AOP_CRY) + emitcode ("mov", "c,%s", AOP (op)->aopu.aop_dir); + else + { + /* bit variables done */ + /* general case */ + size = AOP_SIZE (op); + offset = 0; + while (size--) + { + MOVA (aopGet (op, offset, FALSE, FALSE, FALSE)); + offset++; + } + } + + freeAsmop (op, NULL, ic, TRUE); + } + + op = IC_LEFT (ic); + if (op && IS_SYMOP (op)) + { + aopOp (op, ic, FALSE, FALSE); + + /* if the result is a bit */ + if (AOP_TYPE (op) == AOP_CRY) + emitcode ("mov", "c,%s", AOP (op)->aopu.aop_dir); + else + { + /* bit variables done */ + /* general case */ + size = AOP_SIZE (op); + offset = 0; + while (size--) + { + MOVA (aopGet (op, offset, FALSE, FALSE, FALSE)); + offset++; + } + } + + freeAsmop (op, NULL, ic, TRUE); + } +} + +/*-----------------------------------------------------------------*/ +/* genCritical - generate code for start of a critical sequence */ +/*-----------------------------------------------------------------*/ +static void +genCritical (iCode *ic) +{ + symbol *tlbl = newiTempLabel (NULL); + + D (emitcode(";", "genCritical")); + + if (IC_RESULT (ic)) + { + aopOp (IC_RESULT (ic), ic, TRUE, FALSE); + aopPut (IC_RESULT (ic), one, 0); /* save old ea in an operand */ + emitcode ("jbc", "ea,%05d$", (tlbl->key + 100)); /* atomic test & clear */ + aopPut (IC_RESULT (ic), zero, 0); + emitLabel (tlbl); + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + } + else + { + emitcode ("setb", "c"); + emitcode ("jbc", "ea,%05d$", (tlbl->key + 100)); /* atomic test & clear */ + emitcode ("clr", "c"); + emitLabel (tlbl); + emitcode ("push", "psw"); /* save old ea via c in psw on top of stack*/ + } +} + +/*-----------------------------------------------------------------*/ +/* genEndCritical - generate code for end of a critical sequence */ +/*-----------------------------------------------------------------*/ +static void +genEndCritical (iCode *ic) +{ + D(emitcode(";", "genEndCritical")); + + if (IC_RIGHT (ic)) + { + aopOp (IC_RIGHT (ic), ic, FALSE, FALSE); + if (AOP_TYPE (IC_RIGHT (ic)) == AOP_CRY) + { + emitcode ("mov", "c,%s", IC_RIGHT (ic)->aop->aopu.aop_dir); + emitcode ("mov", "ea,c"); + } + else + { + MOVA (aopGet (IC_RIGHT (ic), 0, FALSE, FALSE, FALSE)); + emitcode ("rrc", "a"); + emitcode ("mov", "ea,c"); + } + freeAsmop (IC_RIGHT (ic), NULL, ic, TRUE); + } + else + { + emitcode ("pop", "psw"); /* restore ea via c in psw on top of stack */ + emitcode ("mov", "ea,c"); + } +} + + + +/*-----------------------------------------------------------------*/ +/* genBuiltIn - calls the appropriate function to generating code */ +/* for a built in function */ +/*-----------------------------------------------------------------*/ +static void genBuiltIn (iCode *ic) +{ + operand *bi_parms[MAX_BUILTIN_ARGS]; + int nbi_parms; + iCode *bi_iCode; + symbol *bif; + + /* get all the arguments for a built in function */ + bi_iCode = getBuiltinParms(ic,&nbi_parms,bi_parms); + + /* which function is it */ + bif = OP_SYMBOL(IC_LEFT(bi_iCode)); + if (strcmp(bif->name,"__builtin_memcpy_x2x")==0) { + genMemcpyX2X(bi_iCode,nbi_parms,bi_parms,0); + } else if (strcmp(bif->name,"__builtin_memcpy_c2x")==0) { + genMemcpyX2X(bi_iCode,nbi_parms,bi_parms,1); + } else if (strcmp(bif->name,"__builtin_memcmp_x2x")==0) { + genMemcmpX2X(bi_iCode,nbi_parms,bi_parms,0); + } else if (strcmp(bif->name,"__builtin_memcmp_c2x")==0) { + genMemcmpX2X(bi_iCode,nbi_parms,bi_parms,1); + } else if (strcmp(bif->name,"__builtin_memset_x")==0) { + genMemsetX(bi_iCode,nbi_parms,bi_parms); + } else if (strcmp(bif->name,"__builtin_inp")==0) { + genInp(bi_iCode,nbi_parms,bi_parms); + } else if (strcmp(bif->name,"__builtin_outp")==0) { + genOutp(bi_iCode,nbi_parms,bi_parms); + } else if (strcmp(bif->name,"__builtin_swapw")==0) { + genSwapW(bi_iCode,nbi_parms,bi_parms); + /* JavaNative builtIns */ + } else if (strcmp(bif->name,"NatLib_LoadByte")==0) { + genNatLibLoadPrimitive(bi_iCode,nbi_parms,bi_parms,1); + } else if (strcmp(bif->name,"NatLib_LoadShort")==0) { + genNatLibLoadPrimitive(bi_iCode,nbi_parms,bi_parms,2); + } else if (strcmp(bif->name,"NatLib_LoadInt")==0) { + genNatLibLoadPrimitive(bi_iCode,nbi_parms,bi_parms,4); + } else if (strcmp(bif->name,"NatLib_LoadPointer")==0) { + genNatLibLoadPointer(bi_iCode,nbi_parms,bi_parms); + } else if (strcmp(bif->name,"NatLib_InstallImmutableStateBlock")==0) { + genNatLibInstallStateBlock(bi_iCode,nbi_parms,bi_parms,"Immutable"); + } else if (strcmp(bif->name,"NatLib_InstallEphemeralStateBlock")==0) { + genNatLibInstallStateBlock(bi_iCode,nbi_parms,bi_parms,"Ephemeral"); + } else if (strcmp(bif->name,"NatLib_RemoveImmutableStateBlock")==0) { + genNatLibRemoveStateBlock(bi_iCode,nbi_parms,"Immutable"); + } else if (strcmp(bif->name,"NatLib_RemoveEphemeralStateBlock")==0) { + genNatLibRemoveStateBlock(bi_iCode,nbi_parms,"Ephemeral"); + } else if (strcmp(bif->name,"NatLib_GetImmutableStateBlock")==0) { + genNatLibGetStateBlock(bi_iCode,nbi_parms,bi_parms,"Immutable"); + } else if (strcmp(bif->name,"NatLib_GetEphemeralStateBlock")==0) { + genNatLibGetStateBlock(bi_iCode,nbi_parms,bi_parms,"Ephemeral"); + } else if (strcmp(bif->name,"MM_XMalloc")==0) { + genMMMalloc(bi_iCode,nbi_parms,bi_parms,3,"XMalloc"); + } else if (strcmp(bif->name,"MM_Malloc")==0) { + genMMMalloc(bi_iCode,nbi_parms,bi_parms,2,"Malloc"); + } else if (strcmp(bif->name,"MM_ApplicationMalloc")==0) { + genMMMalloc(bi_iCode,nbi_parms,bi_parms,2,"ApplicationMalloc"); + } else if (strcmp(bif->name,"MM_Free")==0) { + genMMMalloc(bi_iCode,nbi_parms,bi_parms,2,"Free"); + } else if (strcmp(bif->name,"MM_Deref")==0) { + genMMDeref(bi_iCode,nbi_parms,bi_parms); + } else if (strcmp(bif->name,"MM_UnrestrictedPersist")==0) { + genMMUnrestrictedPersist(bi_iCode,nbi_parms,bi_parms); + } else if (strcmp(bif->name,"System_ExecJavaProcess")==0) { + genSystemExecJavaProcess(bi_iCode,nbi_parms,bi_parms); + } else if (strcmp(bif->name,"System_GetRTCRegisters")==0) { + genSystemRTCRegisters(bi_iCode,nbi_parms,bi_parms,"Get"); + } else if (strcmp(bif->name,"System_SetRTCRegisters")==0) { + genSystemRTCRegisters(bi_iCode,nbi_parms,bi_parms,"Set"); + } else if (strcmp(bif->name,"System_ThreadSleep")==0) { + genSystemThreadSleep(bi_iCode,nbi_parms,bi_parms,"ThreadSleep"); + } else if (strcmp(bif->name,"System_ThreadSleep_ExitCriticalSection")==0) { + genSystemThreadSleep(bi_iCode,nbi_parms,bi_parms,"ThreadSleep_ExitCriticalSection"); + } else if (strcmp(bif->name,"System_ProcessSleep")==0) { + genSystemThreadSleep(bi_iCode,nbi_parms,bi_parms,"ProcessSleep"); + } else if (strcmp(bif->name,"System_ProcessSleep_ExitCriticalSection")==0) { + genSystemThreadSleep(bi_iCode,nbi_parms,bi_parms,"ProcessSleep_ExitCriticalSection"); + } else if (strcmp(bif->name,"System_ThreadResume")==0) { + genSystemThreadResume(bi_iCode,nbi_parms,bi_parms); + } else if (strcmp(bif->name,"System_SaveThread")==0) { + genSystemThreadResume(bi_iCode,nbi_parms,bi_parms); + } else if (strcmp(bif->name,"System_ThreadResume")==0) { + genSystemThreadResume(bi_iCode,nbi_parms,bi_parms); + } else if (strcmp(bif->name,"System_ProcessResume")==0) { + genSystemProcessResume(bi_iCode,nbi_parms,bi_parms); + } else if (strcmp(bif->name,"System_SaveJavaThreadState")==0) { + genSystem(bi_iCode,nbi_parms,"SaveJavaThreadState"); + } else if (strcmp(bif->name,"System_RestoreJavaThreadState")==0) { + genSystem(bi_iCode,nbi_parms,"RestoreJavaThreadState"); + } else if (strcmp(bif->name,"System_ProcessYield")==0) { + genSystem(bi_iCode,nbi_parms,"ProcessYield"); + } else if (strcmp(bif->name,"System_ProcessSuspend")==0) { + genSystem(bi_iCode,nbi_parms,"ProcessSuspend"); + } else if (strcmp(bif->name,"System_RegisterPoll")==0) { + genSystemPoll(bi_iCode,nbi_parms,bi_parms,"Register"); + } else if (strcmp(bif->name,"System_RemovePoll")==0) { + genSystemPoll(bi_iCode,nbi_parms,bi_parms,"Remove"); + } else if (strcmp(bif->name,"System_GetCurrentThreadId")==0) { + genSystemGetCurrentID(bi_iCode,nbi_parms,bi_parms,"Thread"); + } else if (strcmp(bif->name,"System_GetCurrentProcessId")==0) { + genSystemGetCurrentID(bi_iCode,nbi_parms,bi_parms,"Process"); + } else { + werror(E_INTERNAL_ERROR,__FILE__,__LINE__,"unknown builtin function encountered\n"); + return ; + } + return ; +} + +/*-----------------------------------------------------------------*/ +/* gen390Code - generate code for Dallas 390 based controllers */ +/*-----------------------------------------------------------------*/ +void +gen390Code (iCode * lic) +{ + iCode *ic; + int cln = 0; + + _G.currentFunc = NULL; + lineHead = lineCurr = NULL; + dptrn[1][0] = "dpl1"; + dptrn[1][1] = "dph1"; + dptrn[1][2] = "dpx1"; + + if (options.model == MODEL_FLAT24) { + fReturnSizeDS390 = 5; + fReturn = fReturn24; + } else { + fReturnSizeDS390 = 4; + fReturn = fReturn16; + options.stack10bit=0; + } +#if 1 + /* print the allocation information */ + if (allocInfo && currFunc) + printAllocInfo (currFunc, codeOutBuf); +#endif + /* if debug information required */ + if (options.debug && currFunc) + { + debugFile->writeFunction (currFunc, lic); + } + /* stack pointer name */ + if (options.useXstack) + spname = "_spx"; + else + spname = "sp"; + + + for (ic = lic; ic; ic = ic->next) + { + _G.current_iCode = ic; + + if (ic->lineno && cln != ic->lineno) + { + if (options.debug) + { + debugFile->writeCLine (ic); + } + if (!options.noCcodeInAsm) { + emitcode (";", "%s:%d: %s", ic->filename, ic->lineno, + printCLine(ic->filename, ic->lineno)); + } + cln = ic->lineno; + } + if (options.iCodeInAsm) { + const char *iLine = printILine(ic); + emitcode(";", "ic:%d: %s", ic->key, iLine); + dbuf_free(iLine); + } + /* if the result is marked as + spilt and rematerializable or code for + this has already been generated then + do nothing */ + if (resultRemat (ic) || ic->generated) + continue; + + /* depending on the operation */ + switch (ic->op) + { + case '!': + genNot (ic); + break; + + case '~': + genCpl (ic); + break; + + case UNARYMINUS: + genUminus (ic); + break; + + case IPUSH: + genIpush (ic); + break; + + case IPOP: + { + iCode *ifxIc, *popIc; + bool CommonRegs = FALSE; + + /* IPOP happens only when trying to restore a + spilt live range, if there is an ifx statement + following this pop (or several) then the if statement might + be using some of the registers being popped which + would destory the contents of the register so + we need to check for this condition and handle it */ + for (ifxIc = ic->next; ifxIc && ifxIc->op == IPOP; ifxIc = ifxIc->next); + for (popIc = ic; popIc && popIc->op == IPOP; popIc = popIc->next) + CommonRegs |= (ifxIc && ifxIc->op == IFX && !ifxIc->generated && + regsInCommon (IC_LEFT (popIc), IC_COND (ifxIc))); + if (CommonRegs) + genIfx (ifxIc, ic); + else + genIpop (ic); + } + break; + + case CALL: + genCall (ic); + break; + + case PCALL: + genPcall (ic); + break; + + case FUNCTION: + genFunction (ic); + break; + + case ENDFUNCTION: + genEndFunction (ic); + break; + + case RETURN: + genRet (ic); + break; + + case LABEL: + genLabel (ic); + break; + + case GOTO: + genGoto (ic); + break; + + case '+': + genPlus (ic); + break; + + case '-': + if (!genDjnz (ic, ifxForOp (IC_RESULT (ic), ic))) + genMinus (ic); + break; + + case '*': + genMult (ic); + break; + + case '/': + genDiv (ic); + break; + + case '%': + genMod (ic); + break; + + case '>': + genCmpGt (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case '<': + genCmpLt (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case LE_OP: + case GE_OP: + case NE_OP: + + /* note these two are xlated by algebraic equivalence + during parsing SDCC.y */ + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "got '>=' or '<=' shouldn't have come here"); + break; + + case EQ_OP: + genCmpEq (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case AND_OP: + genAndOp (ic); + break; + + case OR_OP: + genOrOp (ic); + break; + + case '^': + genXor (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case '|': + genOr (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case BITWISEAND: + genAnd (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case INLINEASM: + genInline (ic); + break; + + case RRC: + genRRC (ic); + break; + + case RLC: + genRLC (ic); + break; + + case GETHBIT: + genGetHbit (ic); + break; + + case LEFT_OP: + genLeftShift (ic); + break; + + case RIGHT_OP: + genRightShift (ic); + break; + + case GET_VALUE_AT_ADDRESS: + genPointerGet (ic, + hasInc (IC_LEFT (ic), ic, + getSize (operandType (IC_RESULT (ic))))); + break; + + case '=': + if (POINTER_SET (ic)) + genPointerSet (ic, + hasInc (IC_RESULT (ic), ic, + getSize (operandType (IC_RIGHT (ic))))); + else + genAssign (ic); + break; + + case IFX: + genIfx (ic, NULL); + break; + + case ADDRESS_OF: + genAddrOf (ic); + break; + + case JUMPTABLE: + genJumpTab (ic); + break; + + case CAST: + genCast (ic); + break; + + case RECEIVE: + genReceive (ic); + break; + + case SEND: + if (ic->builtinSEND) + genBuiltIn(ic); + else + addSet (&_G.sendSet, ic); + break; + + case DUMMY_READ_VOLATILE: + genDummyRead (ic); + break; + + case CRITICAL: + genCritical (ic); + break; + + case ENDCRITICAL: + genEndCritical (ic); + break; + + case SWAP: + genSwap (ic); + break; + +#if 0 // obsolete, and buggy for != xdata + case ARRAYINIT: + genArrayInit(ic); + break; +#endif + + default: + /* This should never happen, right? */ + fprintf(stderr, "*** Probable error: unsupported op 0x%x (%c) in %s @ %d\n", + ic->op, ic->op, __FILE__, __LINE__); + ic = ic; + } + } + + + /* now we are ready to call the + peep hole optimizer */ + if (!options.nopeep) + peepHole (&lineHead); + + /* now do the actual printing */ + printLine (lineHead, codeOutBuf); + return; +} diff --git a/src/ds390/gen.h b/src/ds390/gen.h new file mode 100644 index 0000000..22b4f22 --- /dev/null +++ b/src/ds390/gen.h @@ -0,0 +1,86 @@ +/*------------------------------------------------------------------------- + gen.h - header file for code generation for DS80C390 + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCGEN390_H +#define SDCCGEN390_H + +enum + { + AOP_LIT = 1, + AOP_REG, AOP_DIR, + AOP_DPTR, AOP_DPTR2, AOP_R0, AOP_R1, + AOP_STK, AOP_IMMD, AOP_STR, + AOP_CRY, AOP_ACC, AOP_DPTRn, AOP_DUMMY + }; + +/* type asmop : a homogenised type for + all the different spaces an operand can be + in */ +typedef struct asmop + { + + short type; /* can have values + AOP_LIT - operand is a literal value + AOP_REG - is in registers + AOP_DIR - direct just a name + AOP_DPTR - dptr contains address of operand + AOP_DPTR2 - dptr2 contains address of operand (DS80C390 only). + AOP_R0/R1 - r0/r1 contains address of operand + AOP_STK - should be pushed on stack this + can happen only for the result + AOP_IMMD - immediate value for eg. remateriazable + AOP_CRY - carry contains the value of this + AOP_STR - array of strings + AOP_ACC - result is in the acc:b pair + AOP_DPTRn - is in dptr(n) + AOP_DUMMY - read as 0, discard writes + */ + short coff; /* current offset */ + short size; /* total size */ + unsigned code:1; /* is in Code space */ + unsigned paged:1; /* in paged memory */ + unsigned short allocated; /* number of times allocated */ + union + { + short dptr; /* if AOP_DPTRn */ + value *aop_lit; /* if literal */ + regs *aop_reg[4]; /* array of registers */ + char *aop_dir; /* if direct */ + regs *aop_ptr; /* either -> to r0 or r1 */ + struct { + int from_cast_remat; /* cast remat created this : immd2 field used for highest order*/ + char *aop_immd1; /* if immediate others are implied */ + char *aop_immd2; /* cast remat will generate this */ + } aop_immd; + int aop_stk; /* stack offset when AOP_STK */ + char *aop_str[5]; /* just a string array containing the location */ + } + aopu; + } +asmop; + +void gen390Code (iCode *); +void ds390_emitDebuggerSymbol (char *); + +#endif diff --git a/src/ds390/main.c b/src/ds390/main.c new file mode 100644 index 0000000..8b82663 --- /dev/null +++ b/src/ds390/main.c @@ -0,0 +1,1603 @@ +/** @file main.c + ds390 specific general functions. + + Note that mlh prepended _ds390_ on the static functions. Makes + it easier to set a breakpoint using the debugger. +*/ +#include "common.h" +#include "main.h" +#include "ralloc.h" +#include "gen.h" +#include "BuildCmd.h" +#include "MySystem.h" +#include "dbuf_string.h" +#include "../SDCCutil.h" +#include "../SDCCglobl.h" +static char _defaultRules[] = +{ +#include "peeph.rul" +}; + +#define OPTION_STACK_8BIT "--stack-8bit" +#define OPTION_FLAT24_MODEL "--model-flat24" +#define OPTION_STACK_SIZE "--stack-size" + +static OPTION _ds390_options[] = + { + { 0, OPTION_FLAT24_MODEL, NULL, "use the flat24 model for the ds390 (default)" }, + { 0, OPTION_STACK_8BIT, NULL, "use the 8bit stack for the ds390 (not supported yet)" }, + { 0, OPTION_STACK_SIZE, &options.stack_size, "Tells the linker to allocate this space for stack", CLAT_INTEGER }, + { 0, "--pack-iram", NULL, "Tells the linker to pack variables in internal ram (default)"}, + { 0, "--no-pack-iram", &options.no_pack_iram, "Tells the linker not to pack variables in internal ram"}, + { 0, "--stack-10bit", &options.stack10bit, "use the 10bit stack for ds390 (default)" }, + { 0, "--use-accelerator", &options.useAccelerator, "generate code for ds390 arithmetic accelerator"}, + { 0, "--protect-sp-update", &options.protect_sp_update, "will disable interrupts during ESP:SP updates"}, + { 0, "--parms-in-bank1", &options.parms_in_bank1, "use Bank1 for parameter passing"}, + { 0, NULL } + }; + + +/* list of key words used by msc51 */ +static char *_ds390_keywords[] = +{ + "at", + "bit", + "code", + "critical", + "data", + "far", + "idata", + "interrupt", + "near", + "pdata", + "reentrant", + "sfr", + "sfr16", + "sfr32", + "sbit", + "using", + "xdata", + "_data", + "_code", + "_generic", + "_near", + "_xdata", + "_pdata", + "_idata", + "_naked", + NULL +}; + +static builtins __ds390_builtins[] = { + { "__builtin_memcpy_x2x","v",3,{"cx*","cx*","i"}}, /* void __builtin_memcpy_x2x (xdata char *,xdata char *,int) */ + { "__builtin_memcpy_c2x","v",3,{"cx*","cp*","i"}}, /* void __builtin_memcpy_c2x (xdata char *,code char *,int) */ + { "__builtin_memset_x","v",3,{"cx*","c","i"}}, /* void __builtin_memset (xdata char *,char,int) */ + /* __builtin_inp - used to read from a memory mapped port, increment first pointer */ + { "__builtin_inp","v",3,{"cx*","cx*","i"}}, /* void __builtin_inp (xdata char *,xdata char *,int) */ + /* __builtin_inp - used to write to a memory mapped port, increment first pointer */ + { "__builtin_outp","v",3,{"cx*","cx*","i"}}, /* void __builtin_outp (xdata char *,xdata char *,int) */ + { "__builtin_swapw","us",1,{"us"}}, /* unsigned short __builtin_swapw (unsigned short) */ + { "__builtin_memcmp_x2x","c",3,{"cx*","cx*","i"}}, /* void __builtin_memcmp_x2x (xdata char *,xdata char *,int) */ + { "__builtin_memcmp_c2x","c",3,{"cx*","cp*","i"}}, /* void __builtin_memcmp_c2x (xdata char *,code char *,int) */ + { NULL , NULL,0, {NULL}} /* mark end of table */ +}; +void ds390_assignRegisters (ebbIndex * ebbi); + +static int regParmFlg = 0; /* determine if we can register a parameter */ + +static void +_ds390_init (void) +{ + asm_addTree (&asm_asxxxx_mapping); +} + +static void +_ds390_reset_regparm (void) +{ + regParmFlg = 0; +} + +static int +_ds390_regparm (sym_link * l, bool reentrant) +{ + if (IS_SPEC(l) && (SPEC_NOUN(l) == V_BIT)) + return 0; + if (options.parms_in_bank1 == 0) { + /* simple can pass only the first parameter in a register */ + if (regParmFlg) + return 0; + + regParmFlg = 1; + return 1; + } else { + int size = getSize(l); + int remain ; + + /* first one goes the usual way to DPTR */ + if (regParmFlg == 0) { + regParmFlg += 4 ; + return 1; + } + /* second one onwards goes to RB1_0 thru RB1_7 */ + remain = regParmFlg - 4; + if (size > (8 - remain)) { + regParmFlg = 12 ; + return 0; + } + regParmFlg += size ; + return regParmFlg - size + 1; + } +} + +static bool +_ds390_parseOptions (int *pargc, char **argv, int *i) +{ + /* TODO: allow port-specific command line options to specify + * segment names here. + */ + if (!strcmp (argv[*i], OPTION_STACK_8BIT)) + { + options.stack10bit = 0; + return TRUE; + } + else if (!strcmp (argv[*i], OPTION_FLAT24_MODEL)) + { + options.model = MODEL_FLAT24; + return TRUE; + } + return FALSE; +} + +static void +_ds390_finaliseOptions (void) +{ + if (options.noXinitOpt) { + port->genXINIT=0; + } + + /* Hack-o-matic: if we are using the flat24 model, + * adjust pointer sizes. + */ + if (options.model != MODEL_FLAT24) { + fprintf (stderr, + "*** warning: ds390 port small and large model experimental.\n"); + if (options.model == MODEL_LARGE) + { + port->mem.default_local_map = xdata; + port->mem.default_globl_map = xdata; + } + else + { + port->mem.default_local_map = data; + port->mem.default_globl_map = data; + } + } + else { + port->s.fptr_size = 3; + port->s.gptr_size = 4; + + port->stack.isr_overhead += 2; /* Will save dpx on ISR entry. */ + + port->stack.call_overhead += 2; /* This acounts for the extra byte + * of return addres on the stack. + * but is ugly. There must be a + * better way. + */ + + port->mem.default_local_map = xdata; + port->mem.default_globl_map = xdata; + + if (!options.stack10bit) + { + fprintf (stderr, + "*** error: ds390 port only supports the 10 bit stack mode.\n"); + } else { + if (!options.stack_loc) options.stack_loc = 0x400008; + } + + /* generate native code 16*16 mul/div */ + if (options.useAccelerator) + port->support.muldiv=2; + else + port->support.muldiv=1; + + /* Fixup the memory map for the stack; it is now in + * far space and requires a FPOINTER to access it. + */ + istack->fmap = 1; + istack->ptrType = FPOINTER; + + if (options.parms_in_bank1) { + addSet(&preArgvSet, Safe_strdup("-DSDCC_PARMS_IN_BANK1")); + } + } /* MODEL_FLAT24 */ +} + +static void +_ds390_setDefaultOptions (void) +{ + options.model=MODEL_FLAT24; + options.stack10bit=1; +} + +static const char * +_ds390_getRegName (struct regs *reg) +{ + if (reg) + return reg->name; + return "err"; +} + +extern char * iComments2; + +static void +_ds390_genAssemblerPreamble (FILE * of) +{ + fputs (iComments2, of); + fputs ("; CPU specific extensions\n",of); + fputs (iComments2, of); + + if (options.model == MODEL_FLAT24) + fputs (".flat24 on\t\t; 24 bit flat addressing\n", of); + + fputs ("dpl1\t=\t0x84\n", of); + fputs ("dph1\t=\t0x85\n", of); + fputs ("dps\t=\t0x86\n", of); + fputs ("dpx\t=\t0x93\n", of); + fputs ("dpx1\t=\t0x95\n", of); + fputs ("esp\t=\t0x9B\n", of); + fputs ("ap\t=\t0x9C\n", of); + fputs ("_ap\t=\t0x9C\n", of); + fputs ("mcnt0\t=\t0xD1\n", of); + fputs ("mcnt1\t=\t0xD2\n", of); + fputs ("ma\t=\t0xD3\n", of); + fputs ("mb\t=\t0xD4\n", of); + fputs ("mc\t=\t0xD5\n", of); + fputs ("F1\t=\t0xD1\t; user flag\n", of); + if (options.parms_in_bank1) { + int i ; + for (i=0; i < 8 ; i++ ) + fprintf (of,"b1_%d\t=\t0x%02X\n",i,8+i); + } +} + +/* Generate interrupt vector table. */ +static int +_ds390_genIVT (struct dbuf_s * oBuf, symbol ** interrupts, int maxInterrupts) +{ + int i; + + if (options.model != MODEL_FLAT24) + { + dbuf_printf (oBuf, "\tljmp\t__sdcc_gsinit_startup\n"); + + /* now for the other interrupts */ + for (i = 0; i < maxInterrupts; i++) + { + if (interrupts[i]) + { + dbuf_printf (oBuf, "\tljmp\t%s\n", interrupts[i]->rname); + if ( i != maxInterrupts - 1 ) + dbuf_printf (oBuf, "\t.ds\t5\n"); + } + else + { + dbuf_printf (oBuf, "\treti\n"); + if ( i != maxInterrupts - 1 ) + dbuf_printf (oBuf, "\t.ds\t7\n"); + } + } + return TRUE; + } + + dbuf_printf (oBuf, "\tajmp\t__reset_vect\n"); + + /* now for the other interrupts */ + for (i = 0; i < maxInterrupts; i++) + { + if (interrupts[i]) + { + dbuf_printf (oBuf, "\tljmp\t%s\n\t.ds\t4\n", interrupts[i]->rname); + } + else + { + dbuf_printf (oBuf, "\treti\n\t.ds\t7\n"); + } + } + + dbuf_printf (oBuf, "__reset_vect:\n\tljmp\t__sdcc_gsinit_startup\n"); + + return TRUE; +} + +static void +_ds390_genInitStartup (FILE *of) +{ + fprintf (of, "__sdcc_gsinit_startup:\n"); + /* if external stack is specified then the + higher order byte of the xdatalocation is + going into P2 and the lower order going into + spx */ + if (options.useXstack) + { + fprintf (of, "\tmov\tP2,#0x%02x\n", + (((unsigned int) options.xdata_loc) >> 8) & 0xff); + fprintf (of, "\tmov\t_spx,#0x%02x\n", + (unsigned int) options.xdata_loc & 0xff); + } + + // This should probably be a port option, but I'm being lazy. + // on the 400, the firmware boot loader gives us a valid stack + // (see '400 data sheet pg. 85 (TINI400 ROM Initialization code) + if (!TARGET_IS_DS400) + { + /* initialise the stack pointer. JCF: aslink takes care of the location */ + fprintf (of, "\tmov\tsp,#__start__stack - 1\n"); /* MOF */ + } + + fprintf (of, "\tlcall\t__sdcc_external_startup\n"); + fprintf (of, "\tmov\ta,dpl\n"); + fprintf (of, "\tjz\t__sdcc_init_data\n"); + fprintf (of, "\tljmp\t__sdcc_program_startup\n"); + fprintf (of, "__sdcc_init_data:\n"); + + // if the port can copy the XINIT segment to XISEG + if (port->genXINIT) + { + port->genXINIT(of); + } +} + +/* Generate code to copy XINIT to XISEG */ +static void _ds390_genXINIT (FILE * of) { + fprintf (of, "; _ds390_genXINIT() start\n"); + fprintf (of, " mov a,#l_XINIT\n"); + fprintf (of, " orl a,#l_XINIT>>8\n"); + fprintf (of, " jz 00003$\n"); + fprintf (of, " mov a,#s_XINIT\n"); + fprintf (of, " add a,#l_XINIT\n"); + fprintf (of, " mov r1,a\n"); + fprintf (of, " mov a,#s_XINIT>>8\n"); + fprintf (of, " addc a,#l_XINIT>>8\n"); + fprintf (of, " mov r2,a\n"); + fprintf (of, " mov dptr,#s_XINIT\n"); + fprintf (of, " mov dps,#0x21\n"); + fprintf (of, " mov dptr,#s_XISEG\n"); + fprintf (of, "00001$: clr a\n"); + fprintf (of, " movc a,@a+dptr\n"); + fprintf (of, " movx @dptr,a\n"); + fprintf (of, " inc dptr\n"); + fprintf (of, " inc dptr\n"); + fprintf (of, "00002$: mov a,dpl\n"); + fprintf (of, " cjne a,ar1,00001$\n"); + fprintf (of, " mov a,dph\n"); + fprintf (of, " cjne a,ar2,00001$\n"); + fprintf (of, " mov dps,#0\n"); + fprintf (of, "00003$:\n"); + fprintf (of, "; _ds390_genXINIT() end\n"); +} + +/* Do CSE estimation */ +static bool cseCostEstimation (iCode *ic, iCode *pdic) +{ + operand *result = IC_RESULT(ic); + //operand *right = IC_RIGHT(ic); + //operand *left = IC_LEFT(ic); + sym_link *result_type = operandType(result); + //sym_link *right_type = (right ? operandType(right) : 0); + //sym_link *left_type = (left ? operandType(left) : 0); + + /* if it is a pointer then return ok for now */ + if (IC_RESULT(ic) && IS_PTR(result_type)) return 1; + + /* if bitwise | add & subtract then no since mcs51 is pretty good at it + so we will cse only if they are local (i.e. both ic & pdic belong to + the same basic block */ + if (IS_BITWISE_OP(ic) || ic->op == '+' || ic->op == '-') { + /* then if they are the same Basic block then ok */ + if (ic->eBBlockNum == pdic->eBBlockNum) return 1; + else return 0; + } + + /* for others it is cheaper to do the cse */ + return 1; +} + +bool _ds390_nativeMulCheck(iCode *ic, sym_link *left, sym_link *right) +{ + return FALSE; // #STUB +} + +/* Indicate which extended bit operations this port supports */ +static bool +hasExtBitOp (int op, int size) +{ + if (op == RRC + || op == RLC + || op == GETHBIT + || (op == SWAP && size <= 2) + ) + return TRUE; + else + return FALSE; +} + +/* Indicate the expense of an access to an output storage class */ +static int +oclsExpense (struct memmap *oclass) +{ + if (IN_FARSPACE(oclass)) + return 1; + + return 0; +} + +static int +instructionSize(char *inst, char *op1, char *op2) +{ + int isflat24 = (options.model == MODEL_FLAT24); + + #define ISINST(s) (strncmp(inst, (s), sizeof(s)-1) == 0) + #define IS_A(s) (*(s) == 'a' && *(s+1) == '\0') + #define IS_C(s) (*(s) == 'c' && *(s+1) == '\0') + #define IS_Rn(s) (*(s) == 'r' && *(s+1) >= '0' && *(s+1) <= '7') + #define IS_atRi(s) (*(s) == '@' && *(s+1) == 'r') + + /* Based on the current (2003-08-22) code generation for the + small library, the top instruction probability is: + + 57% mov/movx/movc + 6% push + 6% pop + 4% inc + 4% lcall + 4% add + 3% clr + 2% subb + */ + /* mov, push, & pop are the 69% of the cases. Check them first! */ + if (ISINST ("mov")) + { + if (*(inst+3)=='x') return 1; /* movx */ + if (*(inst+3)=='c') return 1; /* movc */ + if (IS_C (op1) || IS_C (op2)) return 2; + if (IS_A (op1)) + { + if (IS_Rn (op2) || IS_atRi (op2)) return 1; + return 2; + } + if (IS_Rn(op1) || IS_atRi(op1)) + { + if (IS_A(op2)) return 1; + return 2; + } + if (strcmp (op1, "dptr") == 0) return 3+isflat24; + if (IS_A (op2) || IS_Rn (op2) || IS_atRi (op2)) return 2; + return 3; + } + + if (ISINST ("push")) return 2; + if (ISINST ("pop")) return 2; + + if (ISINST ("lcall")) return 3+isflat24; + if (ISINST ("ret")) return 1; + if (ISINST ("ljmp")) return 3+isflat24; + if (ISINST ("sjmp")) return 2; + if (ISINST ("rlc")) return 1; + if (ISINST ("rrc")) return 1; + if (ISINST ("rl")) return 1; + if (ISINST ("rr")) return 1; + if (ISINST ("swap")) return 1; + if (ISINST ("jc")) return 2; + if (ISINST ("jnc")) return 2; + if (ISINST ("jb")) return 3; + if (ISINST ("jnb")) return 3; + if (ISINST ("jbc")) return 3; + if (ISINST ("jmp")) return 1; // always jmp @a+dptr + if (ISINST ("jz")) return 2; + if (ISINST ("jnz")) return 2; + if (ISINST ("cjne")) return 3; + if (ISINST ("mul")) return 1; + if (ISINST ("div")) return 1; + if (ISINST ("da")) return 1; + if (ISINST ("xchd")) return 1; + if (ISINST ("reti")) return 1; + if (ISINST ("nop")) return 1; + if (ISINST ("acall")) return 2+isflat24; + if (ISINST ("ajmp")) return 2+isflat24; + + + if (ISINST ("add") || ISINST ("addc") || ISINST ("subb") || ISINST ("xch")) + { + if (IS_Rn(op2) || IS_atRi(op2)) return 1; + return 2; + } + if (ISINST ("inc") || ISINST ("dec")) + { + if (IS_A(op1) || IS_Rn(op1) || IS_atRi(op1)) return 1; + if (strcmp(op1, "dptr") == 0) return 1; + return 2; + } + if (ISINST ("anl") || ISINST ("orl") || ISINST ("xrl")) + { + if (IS_C(op1)) return 2; + if (IS_A(op1)) + { + if (IS_Rn(op2) || IS_atRi(op2)) return 1; + return 2; + } + else + { + if (IS_A(op2)) return 2; + return 3; + } + } + if (ISINST ("clr") || ISINST ("setb") || ISINST ("cpl")) + { + if (IS_A(op1) || IS_C(op1)) return 1; + return 2; + } + if (ISINST ("djnz")) + { + if (IS_Rn(op1)) return 2; + return 3; + } + + /* If the instruction is unrecognized, we shouldn't try to optimize. */ + /* Return a large value to discourage optimization. */ + return 999; +} + +asmLineNode * +ds390newAsmLineNode (int currentDPS) +{ + asmLineNode *aln; + + aln = Safe_alloc ( sizeof (asmLineNode)); + aln->size = 0; + aln->regsRead = NULL; + aln->regsWritten = NULL; + aln->initialized = 0; + aln->currentDPS = currentDPS; + + return aln; +} + + +typedef struct ds390operanddata + { + char name[6]; + int regIdx1; + int regIdx2; + } +ds390operanddata; + +static ds390operanddata ds390operandDataTable[] = + { + {"_ap", AP_IDX, -1}, + {"a", A_IDX, -1}, + {"ab", A_IDX, B_IDX}, + {"ac", CND_IDX, -1}, + {"ap", AP_IDX, -1}, + {"acc", A_IDX, -1}, + {"ar0", R0_IDX, -1}, + {"ar1", R1_IDX, -1}, + {"ar2", R2_IDX, -1}, + {"ar3", R3_IDX, -1}, + {"ar4", R4_IDX, -1}, + {"ar5", R5_IDX, -1}, + {"ar6", R6_IDX, -1}, + {"ar7", R7_IDX, -1}, + {"b", B_IDX, -1}, + {"c", CND_IDX, -1}, + {"cy", CND_IDX, -1}, + {"dph", DPH_IDX, -1}, + {"dph0", DPH_IDX, -1}, + {"dph1", DPH1_IDX, -1}, + {"dpl", DPL_IDX, -1}, + {"dpl0", DPL_IDX, -1}, + {"dpl1", DPL1_IDX, -1}, +/* {"dptr", DPL_IDX, DPH_IDX}, */ /* dptr is special, based on currentDPS */ + {"dps", DPS_IDX, -1}, + {"dpx", DPX_IDX, -1}, + {"dpx0", DPX_IDX, -1}, + {"dpx1", DPX1_IDX, -1}, + {"f0", CND_IDX, -1}, + {"f1", CND_IDX, -1}, + {"ov", CND_IDX, -1}, + {"p", CND_IDX, -1}, + {"psw", CND_IDX, -1}, + {"r0", R0_IDX, -1}, + {"r1", R1_IDX, -1}, + {"r2", R2_IDX, -1}, + {"r3", R3_IDX, -1}, + {"r4", R4_IDX, -1}, + {"r5", R5_IDX, -1}, + {"r6", R6_IDX, -1}, + {"r7", R7_IDX, -1}, + }; + +static int +ds390operandCompare (const void *key, const void *member) +{ + return strcmp((const char *)key, ((ds390operanddata *)member)->name); +} + +static void +updateOpRW (asmLineNode *aln, char *op, char *optype, int currentDPS) +{ + ds390operanddata *opdat; + char *dot; + int regIdx1 = -1; + int regIdx2 = -1; + int regIdx3 = -1; + + dot = strchr(op, '.'); + if (dot) + *dot = '\0'; + + opdat = bsearch (op, ds390operandDataTable, + sizeof(ds390operandDataTable)/sizeof(ds390operanddata), + sizeof(ds390operanddata), ds390operandCompare); + + if (opdat) + { + regIdx1 = opdat->regIdx1; + regIdx2 = opdat->regIdx2; + } + if (!strcmp(op, "dptr")) + { + if (!currentDPS) + { + regIdx1 = DPL_IDX; + regIdx2 = DPH_IDX; + regIdx3 = DPX_IDX; + } + else + { + regIdx1 = DPL1_IDX; + regIdx2 = DPH1_IDX; + regIdx3 = DPX1_IDX; + } + } + + if (strchr(optype,'r')) + { + if (regIdx1 >= 0) + aln->regsRead = bitVectSetBit (aln->regsRead, regIdx1); + if (regIdx2 >= 0) + aln->regsRead = bitVectSetBit (aln->regsRead, regIdx2); + if (regIdx3 >= 0) + aln->regsRead = bitVectSetBit (aln->regsRead, regIdx3); + } + if (strchr(optype,'w')) + { + if (regIdx1 >= 0) + aln->regsWritten = bitVectSetBit (aln->regsWritten, regIdx1); + if (regIdx2 >= 0) + aln->regsWritten = bitVectSetBit (aln->regsWritten, regIdx2); + if (regIdx3 >= 0) + aln->regsWritten = bitVectSetBit (aln->regsWritten, regIdx3); + } + if (op[0] == '@') + { + if (!strcmp(op, "@r0")) + aln->regsRead = bitVectSetBit (aln->regsRead, R0_IDX); + if (!strcmp(op, "@r1")) + aln->regsRead = bitVectSetBit (aln->regsRead, R1_IDX); + if (strstr(op, "dptr")) + { + if (!currentDPS) + { + aln->regsRead = bitVectSetBit (aln->regsRead, DPL_IDX); + aln->regsRead = bitVectSetBit (aln->regsRead, DPH_IDX); + aln->regsRead = bitVectSetBit (aln->regsRead, DPX_IDX); + } + else + { + aln->regsRead = bitVectSetBit (aln->regsRead, DPL1_IDX); + aln->regsRead = bitVectSetBit (aln->regsRead, DPH1_IDX); + aln->regsRead = bitVectSetBit (aln->regsRead, DPX1_IDX); + } + } + if (strstr(op, "a+")) + aln->regsRead = bitVectSetBit (aln->regsRead, A_IDX); + } +} + +typedef struct ds390opcodedata + { + char name[6]; + char class[3]; + char pswtype[3]; + char op1type[3]; + char op2type[3]; + } +ds390opcodedata; + +static ds390opcodedata ds390opcodeDataTable[] = + { + {"acall","j", "", "", ""}, + {"add", "", "w", "rw", "r"}, + {"addc", "", "rw", "rw", "r"}, + {"ajmp", "j", "", "", ""}, + {"anl", "", "", "rw", "r"}, + {"cjne", "j", "w", "r", "r"}, + {"clr", "", "", "w", ""}, + {"cpl", "", "", "rw", ""}, + {"da", "", "rw", "rw", ""}, + {"dec", "", "", "rw", ""}, + {"div", "", "w", "rw", ""}, + {"djnz", "j", "", "rw", ""}, + {"inc", "", "", "rw", ""}, + {"jb", "j", "", "r", ""}, + {"jbc", "j", "", "rw", ""}, + {"jc", "j", "", "", ""}, + {"jmp", "j", "", "", ""}, + {"jnb", "j", "", "r", ""}, + {"jnc", "j", "", "", ""}, + {"jnz", "j", "", "", ""}, + {"jz", "j", "", "", ""}, + {"lcall","j", "", "", ""}, + {"ljmp", "j", "", "", ""}, + {"mov", "", "", "w", "r"}, + {"movc", "", "", "w", "r"}, + {"movx", "", "", "w", "r"}, + {"mul", "", "w", "rw", ""}, + {"nop", "", "", "", ""}, + {"orl", "", "", "rw", "r"}, + {"pop", "", "", "w", ""}, + {"push", "", "", "r", ""}, + {"ret", "j", "", "", ""}, + {"reti", "j", "", "", ""}, + {"rl", "", "", "rw", ""}, + {"rlc", "", "rw", "rw", ""}, + {"rr", "", "", "rw", ""}, + {"rrc", "", "rw", "rw", ""}, + {"setb", "", "", "w", ""}, + {"sjmp", "j", "", "", ""}, + {"subb", "", "rw", "rw", "r"}, + {"swap", "", "", "rw", ""}, + {"xch", "", "", "rw", "rw"}, + {"xchd", "", "", "rw", "rw"}, + {"xrl", "", "", "rw", "r"}, + }; + +static int +ds390opcodeCompare (const void *key, const void *member) +{ + return strcmp((const char *)key, ((ds390opcodedata *)member)->name); +} + +static asmLineNode * +asmLineNodeFromLineNode (lineNode *ln, int currentDPS) +{ + asmLineNode *aln = ds390newAsmLineNode(currentDPS); + char *op, op1[256], op2[256]; + int opsize; + const char *p; + char inst[8]; + ds390opcodedata *opdat; + + aln->initialized = 1; + + p = ln->line; + + while (*p && isspace(*p)) p++; + for (op = inst, opsize=1; *p; p++) + { + if (isspace(*p) || *p == ';' || *p == ':' || *p == '=') + break; + else + if (opsize < sizeof(inst)) + *op++ = tolower(*p), opsize++; + } + *op = '\0'; + + if (*p == ';' || *p == ':' || *p == '=') + return aln; + + while (*p && isspace(*p)) p++; + if (*p == '=') + return aln; + + for (op = op1, opsize=1; *p && *p != ','; p++) + { + if (!isspace(*p) && opsize < sizeof(op1)) + *op++ = tolower(*p), opsize++; + } + *op = '\0'; + + if (*p == ',') p++; + for (op = op2, opsize=1; *p && *p != ','; p++) + { + if (!isspace(*p) && opsize < sizeof(op2)) + *op++ = tolower(*p), opsize++; + } + *op = '\0'; + + aln->size = instructionSize(inst, op1, op2); + + aln->regsRead = newBitVect (END_IDX); + aln->regsWritten = newBitVect (END_IDX); + + opdat = bsearch (inst, ds390opcodeDataTable, + sizeof(ds390opcodeDataTable)/sizeof(ds390opcodedata), + sizeof(ds390opcodedata), ds390opcodeCompare); + + if (opdat) + { + updateOpRW (aln, op1, opdat->op1type, currentDPS); + updateOpRW (aln, op2, opdat->op2type, currentDPS); + if (strchr(opdat->pswtype,'r')) + aln->regsRead = bitVectSetBit (aln->regsRead, CND_IDX); + if (strchr(opdat->pswtype,'w')) + aln->regsWritten = bitVectSetBit (aln->regsWritten, CND_IDX); + } + + return aln; +} + +static void +initializeAsmLineNode (lineNode *line) +{ + if (!line->aln) + line->aln = asmLineNodeFromLineNode (line, 0); + else if (line->aln && !line->aln->initialized) + { + int currentDPS = line->aln->currentDPS; + free(line->aln); + line->aln = asmLineNodeFromLineNode (line, currentDPS); + } +} + +static int +getInstructionSize (lineNode *line) +{ + initializeAsmLineNode (line); + return line->aln->size; +} + +static bitVect * +getRegsRead (lineNode *line) +{ + initializeAsmLineNode (line); + return line->aln->regsRead; +} + +static bitVect * +getRegsWritten (lineNode *line) +{ + initializeAsmLineNode (line); + return line->aln->regsWritten; +} + + +/** $1 is always the basename. + $2 is always the output file. + $3 varies + $l is the list of extra options that should be there somewhere... + MUST be terminated with a NULL. +*/ +static const char *_linkCmd[] = +{ + "aslink", "-nf", "\"$1\"", NULL +}; + +/* $3 is replaced by assembler.debug_opts resp. port->assembler.plain_opts */ +static const char *_asmCmd[] = +{ + "asx8051", "$l", "$3", "\"$1.asm\"", NULL +}; + +/* Globals */ +PORT ds390_port = +{ + TARGET_ID_DS390, + "ds390", + "DS80C390", /* Target name */ + NULL, + { + glue, + TRUE, /* Emit glue around main */ + MODEL_SMALL | MODEL_LARGE | MODEL_FLAT24, + MODEL_SMALL + }, + { + _asmCmd, + NULL, + "-plosgffc", /* Options with debug */ + "-plosgff", /* Options without debug */ + 0, + ".asm", + NULL /* no do_assemble function */ + }, + { + _linkCmd, + NULL, + NULL, + ".rel", + 1 + }, + { + _defaultRules, + getInstructionSize, + getRegsRead, + getRegsWritten + }, + { + /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ + 1, 2, 2, 4, 1, 2, 3, 1, 4, 4 + }, + + /* tags for generic pointers */ + { 0x00, 0x40, 0x60, 0x80 }, /* far, near, xstack, code */ + + { + "XSEG (XDATA)", + "STACK (DATA)", + "CSEG (CODE)", + "DSEG (DATA)", + "ISEG (DATA)", + "PSEG (PAG,XDATA)", + "XSEG (XDATA)", + "BSEG (BIT)", + "RSEG (DATA)", + "GSINIT (CODE)", + "OSEG (OVR,DATA)", + "GSFINAL (CODE)", + "HOME (CODE)", + "XISEG (XDATA)", // initialized xdata + "XINIT (CODE)", // a code copy of xiseg + "CONST (CODE)", // const_name - const data (code or not) + "CABS (ABS,CODE)", // cabs_name - const absolute data (code or not) + "XABS (ABS,XDATA)", // xabs_name - absolute xdata/pdata + "IABS (ABS,DATA)", // iabs_name - absolute idata/data + NULL, + NULL, + 1 + }, + { NULL, NULL }, + { + +1, 1, 4, 1, 1, 0 + }, + /* ds390 has an 16 bit mul & div */ + { + 2, -1 + }, + { + ds390_emitDebuggerSymbol + }, + { + 255/4, /* maxCount */ + 4, /* sizeofElement */ + {8,12,20}, /* sizeofMatchJump[] */ + {10,14,22}, /* sizeofRangeCompare[] */ + 4, /* sizeofSubtract */ + 7, /* sizeofDispatch */ + }, + "_", + _ds390_init, + _ds390_parseOptions, + _ds390_options, + NULL, + _ds390_finaliseOptions, + _ds390_setDefaultOptions, + ds390_assignRegisters, + _ds390_getRegName, + _ds390_keywords, + _ds390_genAssemblerPreamble, + NULL, /* no genAssemblerEnd */ + _ds390_genIVT, + _ds390_genXINIT, + _ds390_genInitStartup, + _ds390_reset_regparm, + _ds390_regparm, + NULL, + NULL, + _ds390_nativeMulCheck, + hasExtBitOp, /* hasExtBitOp */ + oclsExpense, /* oclsExpense */ + FALSE, + TRUE, /* little endian */ + 0, /* leave lt */ + 0, /* leave gt */ + 1, /* transform <= to ! > */ + 1, /* transform >= to ! < */ + 1, /* transform != to !(a == b) */ + 0, /* leave == */ + FALSE, /* No array initializer support. */ + cseCostEstimation, + __ds390_builtins, /* table of builtin functions */ + GPOINTER, /* treat unqualified pointers as "generic" pointers */ + 1, /* reset labelKey to 1 */ + 1, /* globals & local static allowed */ + PORT_MAGIC +}; + +/*---------------------------------------------------------------------------------*/ +/* TININative specific */ +/*---------------------------------------------------------------------------------*/ + +#define OPTION_TINI_LIBID "--tini-libid" + +static OPTION _tininative_options[] = + { + { 0, OPTION_FLAT24_MODEL, NULL, "use the flat24 model for the ds390 (default)" }, + { 0, OPTION_STACK_8BIT, NULL, "use the 8bit stack for the ds390 (not supported yet)" }, + { 0, OPTION_STACK_SIZE, &options.stack_size, "Tells the linker to allocate this space for stack", CLAT_INTEGER }, + { 0, "--pack-iram", NULL, "Tells the linker to pack variables in internal ram (default)"}, + { 0, "--no-pack-iram", &options.no_pack_iram, "Tells the linker not to pack variables in internal ram"}, + { 0, "--stack-10bit", &options.stack10bit, "use the 10bit stack for ds390 (default)" }, + { 0, "--use-accelerator", &options.useAccelerator, "generate code for ds390 arithmetic accelerator"}, + { 0, "--protect-sp-update", &options.protect_sp_update, "will disable interrupts during ESP:SP updates"}, + { 0, "--parms-in-bank1", &options.parms_in_bank1, "use Bank1 for parameter passing"}, + { 0, OPTION_TINI_LIBID, &options.tini_libid, " LibraryID used in -mTININative", CLAT_INTEGER }, + { 0, NULL } + }; + +static void _tininative_init (void) +{ + asm_addTree (&asm_a390_mapping); +} + +static void _tininative_setDefaultOptions (void) +{ + options.model=MODEL_FLAT24; + options.stack10bit=1; + options.stackAuto = 1; +} + +static void _tininative_finaliseOptions (void) +{ + /* Hack-o-matic: if we are using the flat24 model, + * adjust pointer sizes. + */ + if (options.model != MODEL_FLAT24) { + options.model = MODEL_FLAT24 ; + fprintf(stderr,"TININative supports only MODEL FLAT24\n"); + } + port->s.fptr_size = 3; + port->s.gptr_size = 4; + + port->stack.isr_overhead += 2; /* Will save dpx on ISR entry. */ + + port->stack.call_overhead += 2; /* This acounts for the extra byte + * of return addres on the stack. + * but is ugly. There must be a + * better way. + */ + + port->mem.default_local_map = xdata; + port->mem.default_globl_map = xdata; + + if (!options.stack10bit) { + options.stack10bit = 1; + fprintf(stderr,"TININative supports only stack10bit \n"); + } + + if (!options.stack_loc) options.stack_loc = 0x400008; + + /* generate native code 16*16 mul/div */ + if (options.useAccelerator) + port->support.muldiv=2; + else + port->support.muldiv=1; + + /* Fixup the memory map for the stack; it is now in + * far space and requires a FPOINTER to access it. + */ + istack->fmap = 1; + istack->ptrType = FPOINTER; + options.cc_only =1; +} + +static int _tininative_genIVT (struct dbuf_s * oBuf, symbol ** interrupts, int maxInterrupts) +{ + return TRUE; +} + +static void _tininative_genAssemblerPreamble (FILE * of) +{ + fputs("$include(tini.inc)\n", of); + fputs("$include(ds80c390.inc)\n", of); + fputs("$include(tinimacro.inc)\n", of); + fputs("$include(apiequ.inc)\n", of); + fputs("_bpx EQU 01Eh \t\t; _bpx (frame pointer) mapped to R8_B3:R7_B3\n", of); + fputs("_ap EQU 01Dh \t\t; _ap mapped to R6_B3\n", of); + /* Must be first and return 0 */ + fputs("Lib_Native_Init:\n",of); + fputs("\tclr\ta\n",of); + fputs("\tret\n",of); + fputs("LibraryID:\n",of); + fputs("\tdb \"DS\"\n",of); + if (options.tini_libid) { + fprintf(of,"\tdb 0,0,0%02xh,0%02xh,0%02xh,0%02xh\n", + (options.tini_libid>>24 & 0xff), + (options.tini_libid>>16 & 0xff), + (options.tini_libid>>8 & 0xff), + (options.tini_libid & 0xff)); + } else { + fprintf(of,"\tdb 0,0,0,0,0,1\n"); + } + +} +static void _tininative_genAssemblerEnd (FILE * of) +{ + fputs("\tend\n",of); +} +/* tininative assembler , calls "macro", if it succeeds calls "a390" */ +static void _tininative_do_assemble (set *asmOptions) +{ + static const char *macroCmd[] = { + "macro","$1.a51",NULL + }; + static const char *a390Cmd[] = { + "a390","$1.mpp",NULL + }; + char buffer[100]; + + buildCmdLine(buffer,macroCmd,dstFileName,NULL,NULL,NULL); + if (my_system(buffer)) { + exit(1); + } + buildCmdLine(buffer,a390Cmd,dstFileName,NULL,NULL,asmOptions); + if (my_system(buffer)) { + exit(1); + } +} + +/* list of key words used by TININative */ +static char *_tininative_keywords[] = +{ + "at", + "bit", + "code", + "critical", + "data", + "far", + "idata", + "interrupt", + "near", + "pdata", + "reentrant", + "sfr", + "sbit", + "using", + "xdata", + "_data", + "_code", + "_generic", + "_near", + "_xdata", + "_pdata", + "_idata", + "_naked", + "_JavaNative", + NULL +}; + +static builtins __tininative_builtins[] = { + { "__builtin_memcpy_x2x","v",3,{"cx*","cx*","i"}}, /* void __builtin_memcpy_x2x (xdata char *,xdata char *,int) */ + { "__builtin_memcpy_c2x","v",3,{"cx*","cp*","i"}}, /* void __builtin_memcpy_c2x (xdata char *,code char *,int) */ + { "__builtin_memset_x","v",3,{"cx*","c","i"}}, /* void __builtin_memset (xdata char *,char,int) */ + /* TINI NatLib */ + { "NatLib_LoadByte","c",1,{"c"}}, /* char Natlib_LoadByte (0 based parameter number) */ + { "NatLib_LoadShort","s",1,{"c"}}, /* short Natlib_LoadShort (0 based parameter number) */ + { "NatLib_LoadInt","l",1,{"c"}}, /* long Natlib_LoadLong (0 based parameter number) */ + { "NatLib_LoadPointer","cx*",1,{"c"}}, /* long Natlib_LoadPointer (0 based parameter number) */ + /* TINI StateBlock related */ + { "NatLib_InstallImmutableStateBlock","c",2,{"vx*","us"}},/* char NatLib_InstallImmutableStateBlock(state block *,int handle) */ + { "NatLib_InstallEphemeralStateBlock","c",2,{"vx*","us"}},/* char NatLib_InstallEphemeralStateBlock(state block *,int handle) */ + { "NatLib_RemoveImmutableStateBlock","v",0,{NULL}},/* void NatLib_RemoveImmutableStateBlock() */ + { "NatLib_RemoveEphemeralStateBlock","v",0,{NULL}},/* void NatLib_RemoveEphemeralStateBlock() */ + { "NatLib_GetImmutableStateBlock","i",0,{NULL}}, /* int NatLib_GetImmutableStateBlock () */ + { "NatLib_GetEphemeralStateBlock","i",0,{NULL}}, /* int NatLib_GetEphemeralStateBlock () */ + /* Memory manager */ + { "MM_XMalloc","i",1,{"l"}}, /* int MM_XMalloc (long) */ + { "MM_Malloc","i",1,{"i"}}, /* int MM_Malloc (int) */ + { "MM_ApplicationMalloc","i",1,{"i"}}, /* int MM_ApplicationMalloc (int) */ + { "MM_Free","i",1,{"i"}}, /* int MM_Free (int) */ + { "MM_Deref","cx*",1,{"i"}}, /* char *MM_Free (int) */ + { "MM_UnrestrictedPersist","c",1,{"i"}}, /* char MM_UnrestrictedPersist (int) */ + /* System functions */ + { "System_ExecJavaProcess","c",2,{"cx*","i"}}, /* char System_ExecJavaProcess (char *,int) */ + { "System_GetRTCRegisters","v",1,{"cx*"}}, /* void System_GetRTCRegisters (char *) */ + { "System_SetRTCRegisters","v",1,{"cx*"}}, /* void System_SetRTCRegisters (char *) */ + { "System_ThreadSleep","v",2,{"l","c"}}, /* void System_ThreadSleep (long,char) */ + { "System_ThreadSleep_ExitCriticalSection","v",2,{"l","c"}},/* void System_ThreadSleep_ExitCriticalSection (long,char) */ + { "System_ProcessSleep","v",2,{"l","c"}}, /* void System_ProcessSleep (long,char) */ + { "System_ProcessSleep_ExitCriticalSection","v",2,{"l","c"}},/* void System_ProcessSleep_ExitCriticalSection (long,char) */ + { "System_ThreadResume","c",2,{"c","c"}}, /* char System_ThreadResume(char,char) */ + { "System_SaveJavaThreadState","v",0,{NULL}}, /* void System_SaveJavaThreadState() */ + { "System_RestoreJavaThreadState","v",0,{NULL}}, /* void System_RestoreJavaThreadState() */ + { "System_ProcessYield","v",0,{NULL}}, /* void System_ProcessYield() */ + { "System_ProcessSuspend","v",0,{NULL}}, /* void System_ProcessSuspend() */ + { "System_ProcessResume","v",1,{"c"}}, /* void System_ProcessResume(char) */ + { "System_RegisterPoll","c",1,{"vF*"}}, /* char System_RegisterPoll ((void *func pointer)()) */ + { "System_RemovePoll","c",1,{"vF*"}}, /* char System_RemovePoll ((void *func pointer)()) */ + { "System_GetCurrentProcessId","c",0,{NULL}}, /* char System_GetCurrentProcessId() */ + { "System_GetCurrentThreadId","c",0,{NULL}}, /* char System_GetCurrentThreadId() */ + { NULL , NULL,0, {NULL}} /* mark end of table */ +}; + +static const char *_a390Cmd[] = +{ + "macro", "$l", "$3", "$1.a51", NULL +}; + +PORT tininative_port = +{ + TARGET_ID_DS390, + "TININative", + "DS80C390", /* Target name */ + NULL, /* processor */ + { + glue, + FALSE, /* Emit glue around main */ + MODEL_FLAT24, + MODEL_FLAT24 + }, + { + _a390Cmd, + NULL, + "-l", /* Options with debug */ + "-l", /* Options without debug */ + 0, + ".a51", + _tininative_do_assemble + }, + { + NULL, + NULL, + NULL, + ".tlib", + 1 + }, + { + _defaultRules, + getInstructionSize, + getRegsRead, + getRegsWritten + }, + { + /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ + 1, 2, 2, 4, 1, 3, 3, 1, 4, 4 + }, + /* tags for generic pointers */ + { 0x00, 0x40, 0x60, 0x80 }, /* far, near, xstack, code */ + + { + "XSEG (XDATA)", + "STACK (DATA)", + "CSEG (CODE)", + "DSEG (DATA)", + "ISEG (DATA)", + "PSEG (PAG,XDATA)", + "XSEG (XDATA)", + "BSEG (BIT)", + "RSEG (DATA)", + "GSINIT (CODE)", + "OSEG (OVR,DATA)", + "GSFINAL (CODE)", + "HOME (CODE)", + NULL, + NULL, + "CONST (CODE)", // const_name - const data (code or not) + "CABS (ABS,CODE)", // cabs_name - const absolute data (code or not) + "XABS (ABS,XDATA)", // xabs_name - absolute xdata/pdata + "IABS (ABS,DATA)", // iabs_name - absolute idata/data + NULL, + NULL, + 1 + }, + { NULL, NULL }, + { + +1, 1, 4, 1, 1, 0 + }, + /* ds390 has an 16 bit mul & div */ + { + 2, -1 + }, + { + ds390_emitDebuggerSymbol + }, + { + 255/4, /* maxCount */ + 4, /* sizeofElement */ + {8,12,20}, /* sizeofMatchJump[] */ + {10,14,22}, /* sizeofRangeCompare[] */ + 4, /* sizeofSubtract */ + 7, /* sizeofDispatch */ + }, + "", + _tininative_init, + _ds390_parseOptions, + _tininative_options, + NULL, + _tininative_finaliseOptions, + _tininative_setDefaultOptions, + ds390_assignRegisters, + _ds390_getRegName, + _tininative_keywords, + _tininative_genAssemblerPreamble, + _tininative_genAssemblerEnd, + _tininative_genIVT, + NULL, + _ds390_genInitStartup, + _ds390_reset_regparm, + _ds390_regparm, + NULL, + NULL, + NULL, + hasExtBitOp, /* hasExtBitOp */ + oclsExpense, /* oclsExpense */ + FALSE, + TRUE, /* little endian */ + 0, /* leave lt */ + 0, /* leave gt */ + 1, /* transform <= to ! > */ + 1, /* transform >= to ! < */ + 1, /* transform != to !(a == b) */ + 0, /* leave == */ + FALSE, /* No array initializer support. */ + cseCostEstimation, + __tininative_builtins, /* table of builtin functions */ + FPOINTER, /* treat unqualified pointers as far pointers */ + 0, /* DONOT reset labelKey */ + 0, /* globals & local static NOT allowed */ + PORT_MAGIC +}; + +static int +_ds400_genIVT (struct dbuf_s * oBuf, symbol ** interrupts, int maxInterrupts) +{ + /* We can't generate a static IVT, since the boot rom creates one + * for us in rom_init. + * + * we must patch it as part of the C startup. + */ + dbuf_printf (oBuf, ";\tDS80C400 IVT must be generated at runtime.\n"); + dbuf_printf (oBuf, "\tsjmp\t__sdcc_400boot\n"); + dbuf_printf (oBuf, "\t.ascii\t'TINI'\t; required signature for 400 boot loader.\n"); + dbuf_printf (oBuf, "\t.db\t0\t; selected bank: zero *should* work...\n"); + dbuf_printf (oBuf, "\t__sdcc_400boot:\tljmp\t__sdcc_gsinit_startup\n"); + + return TRUE; +} + + +/*---------------------------------------------------------------------------------*/ +/* _ds400 specific */ +/*---------------------------------------------------------------------------------*/ + +static OPTION _ds400_options[] = + { + { 0, OPTION_FLAT24_MODEL, NULL, "use the flat24 model for the ds400 (default)" }, + { 0, OPTION_STACK_8BIT, NULL, "use the 8bit stack for the ds400 (not supported yet)" }, + { 0, OPTION_STACK_SIZE, &options.stack_size, "Tells the linker to allocate this space for stack", CLAT_INTEGER }, + { 0, "--pack-iram", NULL, "Tells the linker to pack variables in internal ram (default)"}, + { 0, "--no-pack-iram", &options.no_pack_iram, "Tells the linker not to pack variables in internal ram"}, + { 0, "--stack-10bit", &options.stack10bit, "use the 10bit stack for ds400 (default)" }, + { 0, "--use-accelerator", &options.useAccelerator, "generate code for ds400 arithmetic accelerator"}, + { 0, "--protect-sp-update", &options.protect_sp_update, "will disable interrupts during ESP:SP updates"}, + { 0, "--parms-in-bank1", &options.parms_in_bank1, "use Bank1 for parameter passing"}, + { 0, NULL } + }; + +static void +_ds400_finaliseOptions (void) +{ + if (options.noXinitOpt) { + port->genXINIT=0; + } + + // hackhack: we're a superset of the 390. + addSet(&preArgvSet, Safe_strdup("-DSDCC_ds390")); + addSet(&preArgvSet, Safe_strdup("-D__ds390")); + + /* Hack-o-matic: if we are using the flat24 model, + * adjust pointer sizes. + */ + if (options.model != MODEL_FLAT24) { + fprintf (stderr, + "*** warning: ds400 port small and large model experimental.\n"); + if (options.model == MODEL_LARGE) + { + port->mem.default_local_map = xdata; + port->mem.default_globl_map = xdata; + } + else + { + port->mem.default_local_map = data; + port->mem.default_globl_map = data; + } + } + else { + port->s.fptr_size = 3; + port->s.gptr_size = 4; + + port->stack.isr_overhead += 2; /* Will save dpx on ISR entry. */ + + port->stack.call_overhead += 2; /* This acounts for the extra byte + * of return addres on the stack. + * but is ugly. There must be a + * better way. + */ + + port->mem.default_local_map = xdata; + port->mem.default_globl_map = xdata; + + if (!options.stack10bit) + { + fprintf (stderr, + "*** error: ds400 port only supports the 10 bit stack mode.\n"); + } else { + if (!options.stack_loc) options.stack_loc = 0xffdc00; + // assumes IDM1:0 = 1:0, CMA = 1. + } + + /* generate native code 16*16 mul/div */ + if (options.useAccelerator) + port->support.muldiv=2; + else + port->support.muldiv=1; + + /* Fixup the memory map for the stack; it is now in + * far space and requires a FPOINTER to access it. + */ + istack->fmap = 1; + istack->ptrType = FPOINTER; + + if (options.parms_in_bank1) { + addSet(&preArgvSet, Safe_strdup("-DSDCC_PARMS_IN_BANK1")); + } + + // the DS400 rom calling interface uses register bank 3. + RegBankUsed[3] = 1; + + } /* MODEL_FLAT24 */ +} + +static void _ds400_generateRomDataArea(FILE *fp, bool isMain) +{ + /* Only do this for the file containing main() */ + if (isMain) + { + fprintf(fp, "%s", iComments2); + fprintf(fp, "; the direct data area used by the DS80c400 ROM code.\n"); + fprintf(fp, "%s", iComments2); + fprintf(fp, ".area ROMSEG (ABS,CON,DATA)\n\n"); + fprintf(fp, ".ds 24 ; 24 bytes of directs used starting at 0x68\n\n"); + } +} + +static void _ds400_linkRomDataArea(FILE *fp) +{ + fprintf(fp, "-b ROMSEG = 0x0068\n"); +} + + +PORT ds400_port = +{ + TARGET_ID_DS400, + "ds400", + "DS80C400", /* Target name */ + NULL, + { + glue, + TRUE, /* Emit glue around main */ + MODEL_SMALL | MODEL_LARGE | MODEL_FLAT24, + MODEL_SMALL + }, + { + _asmCmd, + NULL, + "-plosgffc", /* Options with debug */ + "-plosgff", /* Options without debug */ + 0, + ".asm", + NULL /* no do_assemble function */ + }, + { + _linkCmd, + NULL, + NULL, + ".rel", + 1 + }, + { + _defaultRules, + getInstructionSize, + getRegsRead, + getRegsWritten + }, + { + /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ + 1, 2, 2, 4, 1, 2, 3, 1, 4, 4 + }, + + /* tags for generic pointers */ + { 0x00, 0x40, 0x60, 0x80 }, /* far, near, xstack, code */ + + { + "XSEG (XDATA)", + "STACK (DATA)", + "CSEG (CODE)", + "DSEG (DATA)", + "ISEG (DATA)", + "PSEG (PAG,XDATA)", + "XSEG (XDATA)", + "BSEG (BIT)", + "RSEG (DATA)", + "GSINIT (CODE)", + "OSEG (OVR,DATA)", + "GSFINAL (CODE)", + "HOME (CODE)", + "XISEG (XDATA)", // initialized xdata + "XINIT (CODE)", // a code copy of xiseg + "CONST (CODE)", // const_name - const data (code or not) + "CABS (ABS,CODE)", // cabs_name - const absolute data (code or not) + "XABS (ABS,XDATA)", // xabs_name - absolute xdata/pdata + "IABS (ABS,DATA)", // iabs_name - absolute idata/data + NULL, + NULL, + 1 + }, + { _ds400_generateRomDataArea, _ds400_linkRomDataArea }, + { + +1, 1, 4, 1, 1, 0 + }, + /* ds390 has an 16 bit mul & div */ + { + 2, -1 + }, + { + ds390_emitDebuggerSymbol + }, + { + 255/4, /* maxCount */ + 4, /* sizeofElement */ + {8,12,20}, /* sizeofMatchJump[] */ + {10,14,22}, /* sizeofRangeCompare[] */ + 4, /* sizeofSubtract */ + 7, /* sizeofDispatch */ + }, + "_", + _ds390_init, + _ds390_parseOptions, + _ds400_options, + NULL, + _ds400_finaliseOptions, + _ds390_setDefaultOptions, + ds390_assignRegisters, + _ds390_getRegName, + _ds390_keywords, + _ds390_genAssemblerPreamble, + NULL, /* no genAssemblerEnd */ + _ds400_genIVT, + _ds390_genXINIT, + _ds390_genInitStartup, + _ds390_reset_regparm, + _ds390_regparm, + NULL, + NULL, + _ds390_nativeMulCheck, + hasExtBitOp, /* hasExtBitOp */ + oclsExpense, /* oclsExpense */ + FALSE, + TRUE, /* little endian */ + 0, /* leave lt */ + 0, /* leave gt */ + 1, /* transform <= to ! > */ + 1, /* transform >= to ! < */ + 1, /* transform != to !(a == b) */ + 0, /* leave == */ + FALSE, /* No array initializer support. */ + cseCostEstimation, + __ds390_builtins, /* table of builtin functions */ + GPOINTER, /* treat unqualified pointers as "generic" pointers */ + 1, /* reset labelKey to 1 */ + 1, /* globals & local static allowed */ + PORT_MAGIC +}; diff --git a/src/ds390/main.h b/src/ds390/main.h new file mode 100644 index 0000000..e3e8c12 --- /dev/null +++ b/src/ds390/main.h @@ -0,0 +1,19 @@ +#ifndef MAIN_INCLUDE +#define MAIN_INCLUDE + +typedef struct asmLineNode + { + int size; + int currentDPS; + unsigned initialized:1; + bitVect *regsRead; + bitVect *regsWritten; + } +asmLineNode; + +bool x_parseOptions (char **argv, int *pargc); +void x_setDefaultOptions (void); +void x_finaliseOptions (void); +asmLineNode * ds390newAsmLineNode (int currentDPS); + +#endif diff --git a/src/ds390/peeph.def b/src/ds390/peeph.def new file mode 100644 index 0000000..f5f9261 --- /dev/null +++ b/src/ds390/peeph.def @@ -0,0 +1,2856 @@ +//replace restart { +// pop %1 +// push %1 +//} by { +// ; Peephole 1 removed pop %1 push %1 (not push pop) +//} + +//replace restart { +// pop %1 +// mov %2,%3 +// push %1 +//} by { +// ; Peephole 2 removed pop %1 push %1 (not push pop) +// mov %2,%3 +//} + +// +// added by Jean Louis VERN for +// his shift stuff +replace restart { + xch a,%1 + xch a,%1 +} by { + ; Peephole 2.a removed redundant xch xch +} + +replace restart { +// saving 2 byte + mov %1,#0x00 + mov a,#0x00 +} by { + ; Peephole 3.a changed mov to clr + clr a + mov %1,a +} + +replace restart { +// saving 1 byte + mov %1,#0x00 + clr a +} by { + ; Peephole 3.b changed mov to clr + clr a + mov %1,a +} + +replace restart { +// saving 1 byte, loosing 1 cycle but maybe allowing peephole 3.b to start + mov %1,#0x00 + mov %2,#0x00 + mov a,%3 +} by { + ; Peephole 3.c changed mov to clr + clr a + mov %1,a + mov %2,a + mov a,%3 +} + +replace restart { + mov a,#0 +} by { + ; Peephole 3.d changed mov to clr + clr a +} + +replace { + mov %1,a + mov dptr,#%2 + mov a,%1 + movx @dptr,a +} by { + ; Peephole 100 removed redundant mov + mov %1,a + mov dptr,#%2 + movx @dptr,a +} + +replace { + mov a,acc +} by { + ; Peephole 100.a removed redundant mov +} + +replace { + mov a,%1 + movx @dptr,a + inc dptr + mov a,%1 + movx @dptr,a +} by { + ; Peephole 101 removed redundant mov + mov a,%1 + movx @dptr,a + inc dptr + movx @dptr,a +} + +replace { + mov %1,%2 + ljmp %3 +%4: + mov %1,%5 +%3: + mov dpl,%1 +%7: + mov sp,bp + pop bp +} by { + ; Peephole 102 removed redundant mov + mov dpl,%2 + ljmp %3 +%4: + mov dpl,%5 +%3: +%7: + mov sp,bp + pop bp +} + +replace { + mov %1,%2 + ljmp %3 +%4: + mov a%1,%5 +%3: + mov dpl,%1 +%7: + mov sp,bp + pop bp +} by { + ; Peephole 103 removed redundant mov + mov dpl,%2 + ljmp %3 +%4: + mov dpl,%5 +%3: +%7: + mov sp,bp + pop bp +} + +replace { + mov a,bp + clr c + add a,#0x01 + mov r%1,a +} by { + ; Peephole 104 optimized increment (acc not set to r%1, flags undefined) + mov r%1,bp + inc r%1 +} + +replace { + mov %1,a + mov a,%1 +} by { + ; Peephole 105 removed redundant mov + mov %1,a +} + +replace { + mov %1,a + clr c + mov a,%1 +} by { + ; Peephole 106 removed redundant mov + mov %1,a + clr c +} + +replace { + ljmp %1 +%1: +} by { + ; Peephole 107 removed redundant ljmp +%1: +} + +replace { + jc %1 + ljmp %5 +%1: +} by { + ; Peephole 108 removed ljmp by inverse jump logic + jnc %5 +%1: +} if labelInRange + +replace { + jz %1 + ljmp %5 +%1: +} by { + ; Peephole 109 removed ljmp by inverse jump logic + jnz %5 +%1: +} if labelInRange + +replace { + jnz %1 + ljmp %5 +%1: +} by { + ; Peephole 110 removed ljmp by inverse jump logic + jz %5 +%1: +} if labelInRange + +replace { + jb %1,%2 + ljmp %5 +%2: +} by { + ; Peephole 111 removed ljmp by inverse jump logic + jnb %1,%5 +%2: +} if labelInRange + +replace { + jnb %1,%2 + ljmp %5 +%2: +} by { + ; Peephole 112 removed ljmp by inverse jump logic + jb %1,%5 +%2: +} if labelInRange + +replace { + ljmp %5 +%1: +} by { + ; Peephole 132 changed ljmp to sjmp + sjmp %5 +%1: +} if labelInRange + + +replace { + clr a + cjne %1,%2,%3 + cpl a +%3: + rrc a + mov %4,c +} by { + ; Peephole 113 optimized misc sequence + clr %4 + cjne %1,%2,%3 + setb %4 +%3: +} if labelRefCount %3 1 + +replace { + clr a + cjne %1,%2,%3 + cjne %10,%11,%3 + cpl a +%3: + rrc a + mov %4,c +} by { + ; Peephole 114 optimized misc sequence + clr %4 + cjne %1,%2,%3 + cjne %10,%11,%3 + setb %4 +%3: +} if labelRefCount %3 2 + +replace { + clr a + cjne %1,%2,%3 + cpl a +%3: + jnz %4 +} by { + ; Peephole 115 jump optimization + cjne %1,%2,%3 + sjmp %4 +%3: +} if labelRefCount %3 1 + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cpl a +%3: + jnz %4 +} by { + ; Peephole 116 jump optimization + cjne %1,%2,%3 + cjne %9,%10,%3 + sjmp %4 +%3: +} if labelRefCount %3 2 + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + cpl a +%3: + jnz %4 +} by { + ; Peephole 117 jump optimization + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + sjmp %4 +%3: +} if labelRefCount %3 3 + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + cjne %13,%14,%3 + cpl a +%3: + jnz %4 +} by { + ; Peephole 118 jump optimization + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + cjne %13,%14,%3 + sjmp %4 +%3: +} if labelRefCount %3 4 + +replace { + mov a,#0x01 + cjne %1,%2,%3 + clr a +%3: + jnz %4 +} by { + ; Peephole 119 jump optimization + cjne %1,%2,%4 +%3: +} if labelRefCount %3 1 + +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + clr a +%3: + jnz %4 +} by { + ; Peephole 120 jump optimization + cjne %1,%2,%4 + cjne %10,%11,%4 +%3: +} if labelRefCount %3 2 + +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + clr a +%3: + jnz %4 +} by { + ; Peephole 121 jump optimization + cjne %1,%2,%4 + cjne %10,%11,%4 + cjne %12,%13,%4 +%3: +} if labelRefCount %3 3 + +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + cjne %14,%15,%3 + clr a +%3: + jnz %4 +} by { + ; Peephole 122 jump optimization + cjne %1,%2,%4 + cjne %10,%11,%4 + cjne %12,%13,%4 + cjne %14,%15,%4 +%3: +} if labelRefCount %3 4 + +replace { + mov a,#0x01 + cjne %1,%2,%3 + clr a +%3: + jz %4 +} by { + ; Peephole 123 jump optimization + cjne %1,%2,%3 + smp %4 +%3: +} if labelRefCount %3 1 + +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + clr a +%3: + jz %4 +} by { + ; Peephole 124 jump optimization + cjne %1,%2,%3 + cjne %10,%11,%3 + sjmp %4 +%3: +} if labelRefCount %3 2 + +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + clr a +%3: + jz %4 +} by { + ; Peephole 125 jump optimization + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + sjmp %4 +%3: +} if labelRefCount %3 3 + +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + cjne %14,%15,%3 + clr a +%3: + jz %4 +} by { + ; Peephole 126 jump optimization + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + cjne %14,%15,%3 + sjmp %4 +%3: +} if labelRefCount %3 4 + +replace { + push psw + mov psw,%1 + push bp + mov bp,%2 +%3: + mov %2,bp + pop bp + pop psw + ret +} by { + ; Peephole 127 removed misc sequence + ret +} if labelRefCount %3 0 + +replace { + clr a + rlc a + jz %1 +} by { + ; Peephole 128 jump optimization + jnc %1 +} + +replace { + clr a + rlc a + jnz %1 +} by { + ; Peephole 129 jump optimization + jc %1 +} + +replace { + mov r%1,@r%2 +} by { + ; Peephole 130 changed target address mode r%1 to ar%1 + mov ar%1,@r%2 +} + +replace { + mov a,%1 + subb a,#0x01 + mov %2,a + mov %1,%2 +} by { + ; Peephole 131 optimized decrement (not caring for c) + dec %1 + mov %2,%1 +} + +replace { + mov r%1,%2 + mov ar%3,@r%1 + inc r%3 + mov r%4,%2 + mov @r%4,ar%3 +} by { + ; Peephole 133 removed redundant moves + mov r%1,%2 + inc @r%1 + mov ar%3,@r%1 +} + +replace { + mov r%1,%2 + mov ar%3,@r%1 + dec r%3 + mov r%4,%2 + mov @r%4,ar%3 +} by { + ; Peephole 134 removed redundant moves + mov r%1,%2 + dec @r%1 + mov ar%3,@r%1 +} + +replace { + mov r%1,a + mov a,r%2 + orl a,r%1 +} by { + ; Peephole 135 removed redundant mov + mov r%1,a + orl a,r%2 +} + +replace { + mov %1,a + mov dpl,%2 + mov dph,%3 + mov dpx,%4 + mov a,%1 +} by { + ; Peephole 136a removed redundant moves + mov %1,a + mov dpl,%2 + mov dph,%3 + mov dpx,%4 +} if 24bitMode + +replace { + mov %1,a + mov dpl,%2 + mov dph,%3 + mov a,%1 +} by { + ; Peephole 136 removed redundant moves + mov %1,a + mov dpl,%2 + mov dph,%3 +} + +// WTF? Doesn't look sensible to me... +//replace { +// mov b,#0x00 +// mov a,%1 +// cjne %2,%3,%4 +// mov b,#0x01 +//%4: +// mov a,b +// jz %5 +//} by { +// ; Peephole 137 optimized misc jump sequence +// mov a,%1 +// cjne %2,%3,%5 +//%4: +//} if labelRefCount %4 1 +// +//replace { +// mov b,#0x00 +// mov a,%1 +// cjne %2,%3,%4 +// mov b,#0x01 +//%4: +// mov a,b +// jnz %5 +//} by { +// ; Peephole 138 optimized misc jump sequence +// mov a,%1 +// cjne %2,%3,%4 +// sjmp %5 +//%4: +//} if labelRefCount %4 1 + +replace { + mov r%1,a + anl ar%1,%2 + mov a,r%1 +} by { + ; Peephole 139 removed redundant mov + anl a,%2 + mov r%1,a +} + +replace { + mov r%1,a + orl ar%1,%2 + mov a,r%1 +} by { + ; Peephole 140 removed redundant mov + orl a,%2 + mov r%1,a } + +replace { + mov r%1,a + xrl ar%1,%2 + mov a,r%1 +} by { + ; Peephole 141 removed redundant mov + xrl a,%2 + mov r%1,a +} + +replace { + mov r%1,a + mov r%2,ar%1 + mov ar%1,@r%2 +} by { + ; Peephole 142 removed redundant moves + mov r%2,a + mov ar%1,@r%2 +} + +replace { + rlc a + mov acc.0,c +} by { + ; Peephole 143 converted rlc to rl + rl a +} + +replace { + rrc a + mov acc.7,c +} by { + ; Peephole 144 converted rrc to rc + rr a +} + +replace { + clr c + addc a,%1 +} by { + ; Peephole 145 changed to add without carry + add a,%1 +} + +replace { + clr c + mov a,%1 + addc a,%2 +} by { + ; Peephole 146 changed to add without carry + mov a,%1 + add a,%2 +} + +replace { + orl r%1,a +} by { + ; Peephole 147 changed target address mode r%1 to ar%1 + orl ar%1,a +} + +replace { + anl r%1,a +} by { + ; Peephole 148 changed target address mode r%1 to ar%1 + anl ar%1,a +} + +replace { + xrl r%1,a +} by { + ; Peephole 149 changed target address mode r%1 to ar%1 + xrl ar%1,a +} + +replace { + mov %1,dpl + mov dpl,%1 +%9: + ret +} by { + ; Peephole 150 removed misc moves via dpl before return +%9: + ret +} + +replace { + mov %1,dpl + mov %2,dph + mov dpl,%1 + mov dph,%2 +%9: + ret +} by { + ; Peephole 151 removed misc moves via dph, dpl before return +%9: + ret +} + +replace { + mov %1,dpl + mov %2,dph + mov dpl,%1 +%9: + ret +} by { + ; Peephole 152 removed misc moves via dph, dpl before return +%9: + ret +} + +replace { + mov %1,dpl + mov %2,dph + mov %3,b + mov dpl,%1 + mov dph,%2 + mov b,%3 +%9: + ret +} by { + ; Peephole 153 removed misc moves via dph, dpl, b before return +%9: + ret +} + +replace { + mov %1,dpl + mov %2,dph + mov %3,b + mov dpl,%1 +%9: + ret +} by { + ; Peephole 154 removed misc moves via dph, dpl, b before return +%9: + ret +} + +replace { + mov %1,dpl + mov %2,dph + mov %3,b + mov dpl,%1 + mov dph,%2 +%9: + ret +} by { + ; Peephole 155 removed misc moves via dph, dpl, b before return +%9: + ret +} + +replace { + mov %1,dpl + mov %2,dph + mov %3,b + mov %4,a + mov dpl,%1 + mov dph,%2 + mov b,%3 + mov a,%4 +%9: + ret +} by { + ; Peephole 156 removed misc moves via dph, dpl, b, a before return +%9: + ret +} + +replace { + mov %1,dpl + mov %2,dph + mov %3,b + mov %4,a + mov dpl,%1 + mov dph,%2 +%9: + ret +} by { + ; Peephole 157 removed misc moves via dph, dpl, b, a before return +%9: + ret +} + +replace { + mov %1,dpl + mov %2,dph + mov %3,b + mov %4,a + mov dpl,%1 +%9: + ret } by { + ; Peephole 158 removed misc moves via dph, dpl, b, a before return +%9: + ret } + +replace { + mov %1,#%2 + xrl %1,#0x80 +} by { + ; Peephole 159 avoided xrl during execution + mov %1,#(%2 ^ 0x80) +} + +replace { + jnc %1 + sjmp %2 +%1: +} by { + ; Peephole 160 removed sjmp by inverse jump logic + jc %2 +%1:} + +replace { + jc %1 + sjmp %2 +%1: +} by { + ; Peephole 161 removed sjmp by inverse jump logic + jnc %2 +%1:} + +replace { + jnz %1 + sjmp %2 +%1: +} by { + ; Peephole 162 removed sjmp by inverse jump logic + jz %2 +%1:} + +replace { + jz %1 + sjmp %2 +%1: +} by { + ; Peephole 163 removed sjmp by inverse jump logic + jnz %2 +%1:} + +replace { + jnb %3,%1 + sjmp %2 +%1: +} by { + ; Peephole 164 removed sjmp by inverse jump logic + jb %3,%2 +%1: +} + +replace { + jb %3,%1 + sjmp %2 +%1: +} by { + ; Peephole 165 removed sjmp by inverse jump logic + jnb %3,%2 +%1: +} + +replace { + mov %1,%2 + mov %3,%1 + mov %2,%1 +} by { + ; Peephole 166 removed redundant mov + mov %1,%2 + mov %3,%1 } + +replace { + mov c,%1 + cpl c + mov %1,c +} by { + ; Peephole 167 removed redundant bit moves (c not set to %1) + cpl %1 } + +replace { + jnb %1,%2 + sjmp %3 +%2:} by { + ; Peephole 168 jump optimization + jb %1,%3 +%2:} + +replace { + jb %1,%2 + sjmp %3 +%2:} by { + ; Peephole 169 jump optimization + jnb %1,%3 +%2:} + +replace { + clr a + cjne %1,%2,%3 + cpl a +%3: + jz %4 +} by { + ; Peephole 170 jump optimization + cjne %1,%2,%4 +%3: +} if labelRefCount %3 1 + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cpl a +%3: + jz %4 +} by { + ; Peephole 171 jump optimization + cjne %1,%2,%4 + cjne %9,%10,%4 +%3: +} if labelRefCount %3 2 + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + cpl a +%3: + jz %4 +} by { + ; Peephole 172 jump optimization + cjne %1,%2,%4 + cjne %9,%10,%4 + cjne %11,%12,%4 +%3: +} if labelRefCount %3 3 + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + cjne %13,%14,%3 + cpl a +%3: + jz %4 +} by { + ; Peephole 173 jump optimization + cjne %1,%2,%4 + cjne %9,%10,%4 + cjne %11,%12,%4 + cjne %13,%14,%4 +%3: +} if labelRefCount %3 4 + +replace { + mov r%1,%2 + clr c + mov a,r%1 + subb a,#0x01 + mov %2,a +} by { + ; Peephole 174 optimized decrement (acc not set to %2, flags undefined) + mov r%1,%2 + dec %2 +} + + +replace { + mov r%1,%2 + mov a,r%1 + add a,#0x01 + mov %2,a +} by { + ; Peephole 175 optimized increment (acc not set to %2, flags undefined) + mov r%1,%2 + inc %2 +} + +replace { + mov %1,@r%2 + inc %1 + mov @r%2,%1 +} by { + ; Peephole 176 optimized increment, removed redundant mov + inc @r%2 + mov %1,@r%2 +} + +// this one will screw assignes to volatile/sfr's +//replace { +// mov %1,%2 +// mov %2,%1 +//} by { +// ; Peephole 177 removed redundant mov +// mov %1,%2 +//} + +replace { + mov a,%1 + mov b,a + mov a,%2 +} by { + ; Peephole 178 removed redundant mov + mov b,%1 + mov a,%2 +} + +// rules 179-182 provided by : Frieder +// saving 2 byte, 1 cycle +replace { + mov b,#0x00 + mov a,#0x00 +} by { + ; Peephole 179 changed mov to clr + clr a + mov b,a +} + +// saving 1 byte, 0 cycles +replace { + mov a,#0x00 +} by { + ; Peephole 180 changed mov to clr + clr a +} + +replace { + mov dpl,#0x00 + mov dph,#0x00 + mov dpx,#0x00 +} by { + ; Peephole 181a used 24 bit load of dptr + mov dptr,#0x0000 +} if 24bitMode + +// saving 3 byte, 2 cycles, return(NULL) profits here +replace { + mov dpl,#0x00 + mov dph,#0x00 +} by { + ; Peephole 181 used 16 bit load of dptr + mov dptr,#0x0000 +} + +replace { + mov dpl,#%1 + mov dph,#(%1 >> 8) + mov dpx,#(%1 >> 16) +} by { + ; Peephole 182b used 24 bit load of DPTR + mov dptr,#%1 +} + +// saves 2 bytes, ?? cycles. +replace { + mov dpl,#0x%1 + mov dph,#0x%2 + mov dpx,#0x%3 +} by { + ; Peephole 182a used 24 bit load of dptr + mov dptr,#0x%3%2%1 +} if 24bitMode(), portIsDS390 + +// saves 2 bytes, ?? cycles. +replace { + mov dpl,#%1 + mov dph,#%2 + mov dpx,#%3 +} by { + ; Peephole 182b used 24 bit load of dptr + mov dptr,#((%3 << 16) + (%2 << 8) + %1) +} if 24bitMode(), portIsDS390 + +// saving 3 byte, 2 cycles, return(float_constant) profits here +replace { + mov dpl,#0x%1 + mov dph,#0x%2 +} by { + ; Peephole 182c used 16 bit load of dptr + mov dptr,#0x%2%1 +} + +// saving 3 byte, 2 cycles, return(float_constant) profits here +replace { + mov dpl,#%1 + mov dph,#%2 +} by { + ; Peephole 182 used 16 bit load of dptr + mov dptr,#(((%2)<<8) + %1) +} + +replace { + anl %1,#%2 + anl %1,#%3 +} by { + ; Peephole 183 avoided anl during execution + anl %1,#(%2 & %3) +} + +replace { + mov %1,a + cpl a + mov %1,a +} by { + ; Peephole 184 removed redundant mov + cpl a + mov %1,a +} + +replace { +// acc being incremented might cause problems + mov %1,a + inc %1 +} by { + ; Peephole 185 changed order of increment (acc incremented also!) + inc a + mov %1,a +} + +// char indexed access to: long code table[] = {4,3,2,1}; +replace restart { + add a,#%1 + mov dpl,a + clr a + addc a,#(%1 >> 8) + mov dph,a + clr a + movc a,@a+dptr + mov %2,a + inc dptr + clr a + movc a,@a+dptr + mov %3,a + inc dptr + clr a + movc a,@a+dptr + mov %4,a + inc dptr + clr a + movc a,@a+dptr +} by { + ; Peephole 186.a optimized movc sequence + mov b,a + mov dptr,#%1 + movc a,@a+dptr + mov %2,a + inc dptr + mov a,b + movc a,@a+dptr + mov %3,a + inc dptr + mov a,b + movc a,@a+dptr + mov %4,a + inc dptr + mov a,b + movc a,@a+dptr +} + +// char indexed access to: void* code table[] = {4,3,2,1}; +replace restart { + add a,#%1 + mov dpl,a + clr a + addc a,#(%1 >> 8) + mov dph,a + clr a + movc a,@a+dptr + mov %2,a + inc dptr + clr a + movc a,@a+dptr + mov %3,a + inc dptr + clr a + movc a,@a+dptr +} by { + ; Peephole 186.b optimized movc sequence + mov b,a + mov dptr,#%1 + movc a,@a+dptr + mov %2,a + inc dptr + mov a,b + movc a,@a+dptr + mov %3,a + inc dptr + mov a,b + movc a,@a+dptr +} + +// char indexed access to: int code table[] = {4,3,2,1}; +replace restart { + add a,#%1 + mov dpl,a + clr a + addc a,#(%1 >> 8) + mov dph,a + clr a + movc a,@a+dptr + mov %2,a + inc dptr + clr a + movc a,@a+dptr +} by { + ; Peephole 186.c optimized movc sequence + mov %2,a + mov dptr,#%1 + movc a,@a+dptr + xch a,%2 + inc dptr + movc a,@a+dptr +} + +// char indexed access to: char code table[] = {4,3,2,1}; +replace { + add a,#%1 + mov dpl,a + clr a + addc a,#(%1 >> 8) + mov dph,a + clr a + movc a,@a+dptr +} by { + ; Peephole 186.d optimized movc sequence + mov dptr,#%1 + movc a,@a+dptr +} + +replace { + mov r%1,%2 + anl ar%1,#%3 + mov a,r%1 +} by { + ; Peephole 187 used a instead of ar%1 for anl + mov a,%2 + anl a,#%3 + mov r%1,a +} + +replace { + mov %1,a + mov dptr,%2 + movc a,@a+dptr + mov %1,a +} by { + ; Peephole 188 removed redundant mov + mov dptr,%2 + movc a,@a+dptr + mov %1,a +} + +replace { + anl a,#0x0f + mov %1,a + mov a,#0x0f + anl a,%1 +} by { + ; Peephole 189 removed redundant mov and anl + anl a,#0x0f + mov %1,a +} + +// rules 190 & 191 need to be in order +replace { + mov a,%1 + lcall __gptrput + mov a,%1 +} by { + ; Peephole 190 removed redundant mov + mov a,%1 + lcall __gptrput +} + +replace { + mov %1,a + mov dpl,%2 + mov dph,%3 + mov b,%4 + mov a,%1 +} by { + ; Peephole 191 removed redundant mov + mov %1,a + mov dpl,%2 + mov dph,%3 + mov b,%4 +} + +replace { + mov r%1,a + mov @r%2,ar%1 +} by { + ; Peephole 192 used a instead of ar%1 as source + mov r%1,a + mov @r%2,a +} + +replace { + jnz %3 + mov a,%4 + jnz %3 + mov a,%9 + jnz %3 + mov a,%12 + cjne %13,%14,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 193.a optimized misc jump sequence + jnz %8 + mov a,%4 + jnz %8 + mov a,%9 + jnz %8 + mov a,%12 + cjne %13,%14,%8 + sjmp %7 +;%3: +} if labelRefCount %3 4 + +replace { + cjne %1,%2,%3 + mov a,%4 + cjne %5,%6,%3 + mov a,%9 + cjne %10,%11,%3 + mov a,%12 + cjne %13,%14,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 193 optimized misc jump sequence + cjne %1,%2,%8 + mov a,%4 + cjne %5,%6,%8 + mov a,%9 + cjne %10,%11,%8 + mov a,%12 + cjne %13,%14,%8 + sjmp %7 +;%3: +} if labelRefCount %3 4 + +replace { + cjne @%1,%2,%3 + inc %1 + cjne @%1,%6,%3 + inc %1 + cjne @%1,%11,%3 + inc %1 + cjne @%1,%14,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 193.a optimized misc jump sequence + cjne @%1,%2,%8 + inc %1 + cjne @%1,%6,%8 + inc %1 + cjne @%1,%11,%8 + inc %1 + cjne @%1,%14,%8 + sjmp %7 +;%3: +} if labelRefCount %3 4 + +replace { + cjne %1,%2,%3 + cjne %5,%6,%3 + cjne %10,%11,%3 + cjne %13,%14,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 194 optimized misc jump sequence + cjne %1,%2,%8 + cjne %5,%6,%8 + cjne %10,%11,%8 + cjne %13,%14,%8 + sjmp %7 +;%3: +} if labelRefCount %3 4 + +replace { + jnz %3 + mov a,%4 + jnz %3 + mov a,%9 + cjne %10,%11,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 195.a optimized misc jump sequence + jnz %8 + mov a,%4 + jnz %8 + mov a,%9 + cjne %10,%11,%8 + sjmp %7 +;%3: +} if labelRefCount %3 3 + +replace { + cjne %1,%2,%3 + mov a,%4 + cjne %5,%6,%3 + mov a,%9 + cjne %10,%11,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 195 optimized misc jump sequence + cjne %1,%2,%8 + mov a,%4 + cjne %5,%6,%8 + mov a,%9 + cjne %10,%11,%8 + sjmp %7 +;%3: +} if labelRefCount %3 3 + +replace { + cjne @%1,%2,%3 + inc %1 + cjne @%1,%6,%3 + inc %1 + cjne @%1,%11,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 195.a optimized misc jump sequence + cjne @%1,%2,%8 + inc %1 + cjne @%1,%6,%8 + inc %1 + cjne @%1,%11,%8 + sjmp %7 +;%3: +} if labelRefCount %3 3 + +replace { + cjne %1,%2,%3 + cjne %5,%6,%3 + cjne %10,%11,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 196 optimized misc jump sequence + cjne %1,%2,%8 + cjne %5,%6,%8 + cjne %10,%11,%8 + sjmp %7 +;%3: +} if labelRefCount %3 3 + +replace { + jnz %3 + mov a,%4 + cjne %5,%6,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 197.a optimized misc jump sequence + jnz %8 + mov a,%4 + cjne %5,%6,%8 + sjmp %7 +;%3: +} if labelRefCount %3 2 + +replace { + cjne %1,%2,%3 + mov a,%4 + cjne %5,%6,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 197 optimized misc jump sequence + cjne %1,%2,%8 + mov a,%4 + cjne %5,%6,%8 + sjmp %7 +;%3: +} if labelRefCount %3 2 + +replace { + cjne @%1,%2,%3 + inc %1 + cjne @%1,%6,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 197.a optimized misc jump sequence + cjne @%1,%2,%8 + inc %1 + cjne @%1,%6,%8 + sjmp %7 +;%3: +} if labelRefCount %3 2 + +replace { + cjne %1,%2,%3 + cjne %5,%6,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 198 optimized misc jump sequence + cjne %1,%2,%8 + cjne %5,%6,%8 + sjmp %7 +;%3: +} if labelRefCount %3 2 + +replace { + cjne %1,%2,%3 + sjmp %4 +%3: + sjmp %5 +} by { + ; Peephole 199 optimized misc jump sequence + cjne %1,%2,%5 + sjmp %4 +;%3: +} if labelRefCount %3 1 + +replace { + sjmp %1 +%1: +} by { + ; Peephole 200 removed redundant sjmp +%1: +} + +replace { + sjmp %1 +%2: +%1: +} by { + ; Peephole 201 removed redundant sjmp +%2: +%1: +} + +replace { + push acc + mov dptr,%1 + pop acc +} by { + ; Peephole 202 removed redundant push pop + mov dptr,%1 +} + +replace { + push acc + pop acc +} by { + ; Peephole 202b removed redundant push pop +} + +replace { + mov r%1,_spx + lcall %2 + mov r%1,_spx +} by { + ; Peephole 203 removed mov r%1,_spx + lcall %2 +} + +replace { + mov %1,a + add a,acc + mov %1,a +} by { + ; Peephole 204 removed redundant mov + add a,acc + mov %1,a +} + +replace { + djnz %1,%2 + sjmp %3 +%2: + sjmp %4 +%3: +} by { + ; Peephole 205 optimized misc jump sequence + djnz %1,%4 +%2: +%3: +} if labelRefCount %2 1 + +replace { + mov %1,%1 +} by { + ; Peephole 206 removed redundant mov %1,%1 +} + +replace { + mov a,_bp + add a,#0x00 + mov %1,a +} by { + ; Peephole 207 removed zero add (acc not set to %1, flags undefined) + mov %1,_bp +} + +replace { + push acc + mov r%1,_bp + pop acc +} by { + ; Peephole 208 removed redundant push pop + mov r%1,_bp +} + +replace { + mov a,_bp + add a,#0x00 + inc a + mov %1,a +} by { + ; Peephole 209 optimized increment (acc not set to %1, flags undefined) + mov %1,_bp + inc %1 +} + +replace { + mov dptr,#((((%1 >> 16)) <<16) + (((%1 >> 8)) <<8) + %1) +} by { + ; Peephole 210a simplified expression + mov dptr,#%1 +} if 24bitMode + +replace { + mov dptr,#((((%1 >> 8)) <<8) + %1) +} by { + ; Peephole 210 simplified expression + mov dptr,#%1 +} + +replace restart { + push ar%1 + pop ar%1 +} by { + ; Peephole 211 removed redundant push r%1 pop r%1 +} + +replace { + mov a,_bp + add a,#0x01 + mov r%1,a +} by { + ; Peephole 212 reduced add sequence to inc + mov r%1,_bp + inc r%1 +} + +replace { + mov %1,#(( %2 >> 8 ) ^ 0x80) +} by { + ; Peephole 213.a inserted fix + mov %1,#(%2 >> 8) + xrl %1,#0x80 +} if portIsDS390 + +replace { + mov %1,#(( %2 >> 16 ) ^ 0x80) +} by { + ; Peephole 213.b inserted fix + mov %1,#(%2 >> 16) + xrl %1,#0x80 +} if portIsDS390 + +replace { + mov %1,#(( %2 + %3 >> 8 ) ^ 0x80) +} by { + ; Peephole 213.c inserted fix + mov %1,#((%2 + %3) >> 8) + xrl %1,#0x80 +} if portIsDS390 + +replace { + mov %1,a + mov a,%2 + add a,%1 +} by { + ; Peephole 214 reduced some extra movs + mov %1,a + add a,%2 +} if operandsNotSame + +replace { + mov %1,a + add a,%2 + mov %1,a +} by { + ; Peephole 215 removed some movs + add a,%2 + mov %1,a +} if operandsNotSame + +replace { + mov r%1,%2 + clr a + inc r%1 + mov @r%1,a + dec r%1 + mov @r%1,a +} by { + ; Peephole 216 simplified clear (2bytes) + mov r%1,%2 + clr a + mov @r%1,a + inc r%1 + mov @r%1,a +} + +replace { + mov r%1,%2 + clr a + inc r%1 + inc r%1 + mov @r%1,a + dec r%1 + mov @r%1,a + dec r%1 + mov @r%1,a +} by { + ; Peephole 217 simplified clear (3bytes) + mov r%1,%2 + clr a + mov @r%1,a + inc r%1 + mov @r%1,a + inc r%1 + mov @r%1,a +} + +replace { + mov r%1,%2 + clr a + inc r%1 + inc r%1 + inc r%1 + mov @r%1,a + dec r%1 + mov @r%1,a + dec r%1 + mov @r%1,a + dec r%1 + mov @r%1,a +} by { + ; Peephole 218 simplified clear (4bytes) + mov r%1,%2 + clr a + mov @r%1,a + inc r%1 + mov @r%1,a + inc r%1 + mov @r%1,a + inc r%1 + mov @r%1,a +} + +replace { + clr a + movx @dptr,a + mov dptr,%1 + clr a + movx @dptr,a +} by { + ; Peephole 219 removed redundant clear + clr a + movx @dptr,a + mov dptr,%1 + movx @dptr,a +} + +replace { + clr a + movx @dptr,a + mov dptr,%1 + movx @dptr,a + mov dptr,%2 + clr a + movx @dptr,a +} by { + ; Peephole 219a removed redundant clear + clr a + movx @dptr,a + mov dptr,%1 + movx @dptr,a + mov dptr,%2 + movx @dptr,a +} + +replace { + mov dps, #0 + mov dps, #1 +} by { + ; Peephole 220a removed bogus DPS set + mov dps, #1 +} + +replace { + mov dps, #1 + mov dps, #0 +} by { + ; Peephole 220b removed bogus DPS set + mov dps, #0 +} + +replace { + mov dps, #0 + mov dps, #0x01 +} by { + ; Peephole 220c removed bogus DPS set +} + +replace { + mov dps,#1 + inc dptr + mov dps,#1 +} by { + ; Peephole 220d removed bogus DPS set + mov dps,#1 + inc dptr +} + +replace { + mov %1 + %2,(%2 + %1) +} by { + ; Peephole 221a remove redundant move +} + +replace { + mov (%1 + %2 + %3),((%2 + %1) + %3) +} by { + ; Peephole 221b remove redundant move +} + +replace { + dec r%1 + inc r%1 +} by { + ; removed dec/inc pair +} + +replace { + mov dps, #0 + mov %1,a + mov dps, #1 +} by { + ; Peephole 222 removed DPS abuse. + mov %1,a + mov dps, #1 +} + +replace { + mov dps, #0 + xch a, ap + mov %1, ap + mov dps, #1 +} by { + ; Peephole 222a removed DPS abuse. + xch a, ap + mov %1, ap + mov dps, #1 +} + +replace { + mov dps, #%1 + inc dptr + movx a,@dptr + mov %2,a + mov dps, #%1 +} by { + mov dps, #%1 + inc dptr + movx a,@dptr + mov %2,a +; Peephole 223: yet more DPS abuse removed. +} + +replace { + mov dps, #0 + inc dps +} by { + mov dps, #1 +} + +replace { + mov dps, #%1 + mov dptr, %2 + mov dps, #%1 +} by { + mov dps, #%1 + mov dptr, %2 +} + +replace { + mov dps, #1 + mov dptr, %1 + mov dps, #0 + mov dptr, %2 + inc dps +} by { + mov dps, #0 + mov dptr, %2 + inc dps + mov dptr, %1 +; Peephole 224a: DPS usage re-arranged. +} + +replace { + mov dps, #%1 + mov dptr, %2 + mov dps, #%3 + mov dptr, %4 + mov dps, #%1 +} by { + mov dps, #%3 + mov dptr, %4 + mov dps, #%1 + mov dptr, %2 +; Peephole 224: DPS usage re-arranged. +} + +replace { + mov dps, #1 + mov dptr, %1 + mov dps, #0 +} by { + mov dps, #1 + mov dptr, %1 + dec dps +} + +replace { + xch a, ap + add a, ap +} by { + add a, ap +} + +replace { + xch a, ap + addc a, ap +} by { + addc a, ap +} + +replace { + inc dps + mov dps, #%1 +} by { + mov dps, #%1 +} + +replace { + dec dps + mov dps, #%1 +} by { + mov dps, #%1 +} + + +// char indexed access to: long code table[] = {4,3,2,1}; +replace restart { + add a,#%1 + mov dpl,a + clr a + addc a,#(%1 >> 8) + mov dph,a + clr a + addc a,#(%1 >> 16) + mov dpx,a + clr a + movc a,@a+dptr + inc dptr + mov %2,a + clr a + movc a,@a+dptr + inc dptr + mov %3,a + clr a + movc a,@a+dptr + inc dptr + mov %4,a + clr a + movc a,@a+dptr +} by { + ; Peephole 227.a movc optimize + mov b,a + mov dptr,#%1 + movc a,@a+dptr + inc dptr + mov %2,a + mov a,b + movc a,@a+dptr + inc dptr + mov %3,a + mov a,b + movc a,@a+dptr + inc dptr + mov %4,a + mov a,b + movc a,@a+dptr +} + +// char indexed access to: void* code table[] = {4,3,2,1}; +replace restart { + add a,#%1 + mov dpl,a + clr a + addc a,#(%1 >> 8) + mov dph,a + clr a + addc a,#(%1 >> 16) + mov dpx,a + clr a + movc a,@a+dptr + inc dptr + mov %2,a + clr a + movc a,@a+dptr + inc dptr + mov %3,a + clr a + movc a,@a+dptr +} by { + ; Peephole 227.b movc optimize + mov b,a + mov dptr,#%1 + movc a,@a+dptr + inc dptr + mov %2,a + mov a,b + movc a,@a+dptr + inc dptr + mov %3,a + mov a,b + movc a,@a+dptr +} + +// char indexed access to: int code table[] = {4,3,2,1}; +replace restart { + add a,#%1 + mov dpl,a + clr a + addc a,#(%1 >> 8) + mov dph,a + clr a + addc a,#(%1 >> 16) + mov dpx,a + clr a + movc a,@a+dptr + inc dptr + mov %2,a + clr a + movc a,@a+dptr +} by { + ; Peephole 227.c movc optimize + mov %2,a + mov dptr,#%1 + movc a,@a+dptr + inc dptr + xch a,%2 + movc a,@a+dptr +} + +// char indexed access to: char code table[] = {4,3,2,1}; +replace { + add a,#%1 + mov dpl,a + clr a + addc a,#(%1 >> 8) + mov dph,a + clr a + addc a,#(%1 >> 16) + mov dpx,a + clr a + movc a,@a+dptr +} by { + ; Peephole 227.d movc optimize + mov dptr,#%1 + movc a,@a+dptr +} + +replace { + mov r%1,%2 + mov ar%1,%3 +} by { + ; Peephole 228 redundant move + mov ar%1,%3 +} + +replace { + mov r%1,a + dec r%1 + mov a,r%1 +} by { + ; Peephole 229.a redundant move + dec a + mov r%1,a +} + +replace { + mov r%1,a + mov r%2,b + mov a,r%1 +} by { + ; Peephole 229.b redundant move + mov r%1,a + mov r%2,b +} + +replace { + mov r%1,a + mov r%2,b + add a,#%3 + mov r%1,a + mov a,r%2 + addc a,#(%3 >> 8) + mov r%2,a +} by { + ; Peephole 229.c redundant move + add a,#%3 + mov r%1,a + mov a,b + addc a,#(%3 >> 8) + mov r%2,a +} + +replace { + mov a,%1 + mov b,a + movx a,%2 +} by { + ; Peephole 229.d redundant move + mov b,%1 + movx a,%2 +} + +replace { + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 + movx a,@dptr + mov r%4,a + add a,#0x01 + mov r%5,a + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 + movx @dptr,a +} by { + ; Peephole 230.a save reload dptr + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 + movx a,@dptr + mov r%4,a + add a,#0x01 + mov r%5,a + movx @dptr,a +} + +replace { + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 + movx a,@dptr + mov r%4,a + dec r%4 + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 + mov a,r%4 + movx @dptr,a +} by { + ; Peephole 230.b save reload dptr + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 + movx a,@dptr + dec a + mov r%4,a + movx @dptr,a +} + +replace { + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 + movx a,@dptr + inc a + mov r%4,a + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 + mov a,r%4 + movx @dptr,a +} by { + ; Peephole 230.c save reload dptr + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 + movx a,@dptr + inc a + mov r%4,a + movx @dptr,a +} + +replace { + mov r%1,dpl + mov r%2,dph + mov r%3,dpx + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 +} by { + ; Peephole 230.d save reload dptr + mov r%1,dpl + mov r%2,dph + mov r%3,dpx +} + +replace { + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 + movx a,@dptr + mov r%4,a + orl ar%4,#%5 + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 + mov a,r1 + movx @dptr,a +} by { + ; Peephole 230.e save reload dptr + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 + movx a,@dptr + orl a,#%5 + mov r%4,a + movx @dptr,a +} + +replace { + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 + movx a,@dptr + mov r%4,a + anl ar%4,#%5 + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 + mov a,r1 + movx @dptr,a +} by { + ; Peephole 230.e save reload dptr + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 + movx a,@dptr + anl a,#%5 + mov r%4,a + movx @dptr,a +} + +replace { + mov r%1,dpl + mov r%2,dph + mov r%3,dpx + mov a,r%4 + inc dps + movx @dptr,a + inc dptr + mov dps,#0 + mov dpl,r%1 + mov dph,r%2 + mov dpx,r%3 +} by { + ; Peephole 230.f save reload dptr + mov r%1,dpl + mov r%2,dph + mov r%3,dpx + mov a,r%4 + inc dps + movx @dptr,a + inc dptr + mov dps,#0 +} + +replace { + mov ar%1,r%2 + mov ar%3,r%1 + mov r%1,#0x00 + mov ar%2,r%4 + mov r3,#0x00 +} by { + ; Peephole 231.a simplified moves + mov ar%3,r%2 + mov ar%2,r%4 + mov r%4,#0 + mov r%1,#0 +} + +replace { + mov r%1,#0 + mov r%2,#0 + mov a,r%2 + orl a,r%3 + mov %4,a + mov a,r%5 + orl a,r%1 + mov %6,a +} by { + ; Peephole 231.b simplified or + mov r%1,#0 + mov r%2,#0 + mov a,r%3 + mov %4,a + mov a,r%5 + mov %6,a +} + +replace { + mov a,r%1 + mov b,r%2 + mov r%1,b + mov r%2,a +} by { + ; Peehole 232.a simplified xch + mov a,r%1 + xch a,r%2 + mov r%1,a +} + +replace { + mov a,#%1 + mov b,#%2 + mov r%3,b + mov r%4,a +} by { + ; Peehole 232.b simplified xch + mov r%3,#%2 + mov r%4,#%1 +} + +replace { + mov dpl1,#%1 + mov dph1,#(%1 >> 8) + mov dpx1,#(%1 >> 16) +} by { + ; Peephole 233 24 bit load of dptr1 + inc dps + mov dptr,#%1 + dec dps +} + +// 14 rules by Fiorenzo D. Ramaglia + +replace { + add a,ar%1 +} by { + ; Peephole 236a + add a,r%1 +} + +replace { + addc a,ar%1 +} by { + ; Peephole 236b + addc a,r%1 +} + +replace { + anl a,ar%1 +} by { + ; Peephole 236c + anl a,r%1 +} + +replace { + dec ar%1 +} by { + ; Peephole 236d + dec r%1 +} + +replace { + djnz ar%1,%2 +} by { + ; Peephole 236e + djnz r%1,%2 +} + +replace { + inc ar%1 +} by { + ; Peephole 236f + inc r%1 +} + +replace { + mov a,ar%1 +} by { + ; Peephole 236g + mov a,r%1 +} + +replace { + mov ar%1,#%2 +} by { + ; Peephole 236h + mov r%1,#%2 +} + +replace { + mov ar%1,a +} by { + ; Peephole 236i + mov r%1,a +} + +replace { + mov ar%1,ar%2 +} by { + ; Peephole 236j + mov r%1,ar%2 +} + +replace { + orl a,ar%1 +} by { + ; Peephole 236k + orl a,r%1 +} + +replace { + subb a,ar%1 +} by { + ; Peephole 236l + subb a,r%1 +} + +replace { + xch a,ar%1 +} by { + ; Peephole 236m + xch a,r%1 +} + +replace { + xrl a,ar%1 +} by { + ; Peephole 236n + xrl a,r%1 +} + +replace { + sjmp %1 +%2: + mov %3,%4 +%1: + ret +} by { + ; Peephole 237a removed sjmp to ret + ret +%2: + mov %3,%4 +%1: + ret +} + +replace { + sjmp %1 +%2: + mov %3,%4 + mov dpl,%5 + mov dph,%6 +%1: + ret +} by { + ; Peephole 237b removed sjmp to ret + ret +%2: + mov %3,%4 + mov dpl,%5 + mov dph,%6 +%1: + ret +} + +// applies to f.e. device/lib/log10f.c +replace { + mov %1,%9 + mov %2,%10 + mov %3,%11 + mov %4,%12 + + mov %5,%13 + mov %6,%14 + mov %7,%15 + mov %8,%16 + + mov %9,%1 + mov %10,%2 + mov %11,%3 + mov %12,%4 +} by { + mov %1,%9 + mov %2,%10 + mov %3,%11 + mov %4,%12 + + mov %5,%13 + mov %6,%14 + mov %7,%15 + mov %8,%16 + ; Peephole 238.a removed 4 redundant moves +} if operandsNotSame8 %1 %2 %3 %4 %5 %6 %7 %8 + +// applies to device/lib/log10f.c +replace { + mov %1,%5 + mov %2,%6 + mov %3,%7 + mov %4,%8 + + mov %5,%1 + mov %6,%2 + mov %7,%3 +} by { + mov %1,%5 + mov %2,%6 + mov %3,%7 + mov %4,%8 + ; Peephole 238.b removed 3 redundant moves +} if operandsNotSame7 %1 %2 %3 %4 %5 %6 %7 + +// applies to f.e. device/lib/time.c +replace { + mov %1,%5 + mov %2,%6 + + mov %3,%7 + mov %4,%8 + + mov %5,%1 + mov %6,%2 +} by { + mov %1,%5 + mov %2,%6 + + mov %3,%7 + mov %4,%8 + ; Peephole 238.c removed 2 redundant moves +} if operandsNotSame4 %1 %2 %3 %4 + +// applies to f.e. support/regression/tests/bug-524209.c +replace { + mov %1,%4 + mov %2,%5 + mov %3,%6 + + mov %4,%1 + mov %5,%2 + mov %6,%3 +} by { + mov %1,%4 + mov %2,%5 + mov %3,%6 + ; Peephole 238.d removed 3 redundant moves +} if operandsNotSame6 %1 %2 %3 %4 %5 %6 + +// applies to f.e. ser_ir.asm +replace { + mov r%1,acc +} by { + ; Peephole 239 used a instead of acc + mov r%1,a +} + +replace restart { + mov a,%1 + addc a,#0x00 +} by { + ; Peephole 240 use clr instead of addc a,#0 + clr a + addc a,%1 +} + +// peepholes 241.a to 241.c and 241.d to 241.f need to be in order +replace { + cjne r%1,#%2,%3 + cjne r%4,#%5,%3 + cjne r%6,#%7,%3 + cjne r%8,#%9,%3 + mov a,#0x01 + sjmp %10 +%3: + clr a +%10: +} by { + ; Peephole 241.a optimized compare + clr a + cjne r%1,#%2,%3 + cjne r%4,#%5,%3 + cjne r%6,#%7,%3 + cjne r%8,#%9,%3 + inc a +%3: +%10: +} + +// applies to f.e. time.c +replace { + cjne r%1,#%2,%3 + cjne r%4,#%5,%3 + mov a,#0x01 + sjmp %6 +%3: + clr a +%6: +} by { + ; Peephole 241.b optimized compare + clr a + cjne r%1,#%2,%3 + cjne r%4,#%5,%3 + inc a +%3: +%6: +} + +// applies to f.e. malloc.c +replace { + cjne r%1,#%2,%3 + mov a,#0x01 + sjmp %4 +%3: + clr a +%4: +} by { + ; Peephole 241.c optimized compare + clr a + cjne r%1,#%2,%3 + inc a +%3: +%4: +} + +// applies to f.e. j = (k!=0x1000); +// with volatile idata long k; +replace { + cjne @r%1,#%2,%3 + inc r%1 + cjne @r%1,#%4,%3 + inc r%1 + cjne @r%1,#%5,%3 + inc r%1 + cjne @r%1,#%6,%3 + mov a,#0x01 + sjmp %7 +%3: + clr a +%7: +} by { + ; Peephole 241.d optimized compare + clr a + cjne @r%1,#%2,%3 + inc r%1 + cjne @r%1,#%4,%3 + inc r%1 + cjne @r%1,#%5,%3 + inc r%1 + cjne @r%1,#%6,%3 + inc a +%3: +%7: +} + +// applies to f.e. j = (k!=0x1000); +// with volatile idata int k; +replace { + cjne @r%1,#%2,%3 + inc r%1 + cjne @r%1,#%4,%3 + mov a,#0x01 + sjmp %7 +%3: + clr a +%7: +} by { + ; Peephole 241.e optimized compare + clr a + cjne @r%1,#%2,%3 + inc r%1 + cjne @r%1,#%4,%3 + inc a +%3: +%7: +} + +// applies to f.e. vprintf.asm (--stack-auto) +replace { + cjne @r%1,#%2,%3 + mov a,#0x01 + sjmp %7 +%3: + clr a +%7: +} by { + ; Peephole 241.f optimized compare + clr a + cjne @r%1,#%2,%3 + inc a +%3: +%7: +} + +// applies to f.e. scott-bool1.c +replace { + jnz %1 + mov %2,%3 +%1: + jz %4 +} by { + ; Peephole 242.a avoided branch jnz to jz + jnz %1 + mov %2,%3 + jz %4 +%1: +} if labelRefCount %1 1 + +// applies to f.e. scott-bool1.c +replace { + jnz %1 + mov %2,%3 + orl a,%5 +%1: + jz %4 +} by { + ; Peephole 242.b avoided branch jnz to jz + jnz %1 + mov %2,%3 + orl a,%5 + jz %4 +%1: +} if labelRefCount %1 1 + +// applies to f.e. logic.c +replace { + jnz %1 + mov %2,%3 + orl a,%5 + orl a,%6 + orl a,%7 +%1: + jz %4 +} by { + ; Peephole 242.c avoided branch jnz to jz + jnz %1 + mov %2,%3 + orl a,%5 + orl a,%6 + orl a,%7 + jz %4 +%1: +} if labelRefCount %1 1 + +replace { + jnz %1 +%1: +} by { + ; Peephole 243a jump optimization +} if labelRefCount %1 1 + +replace { + jz %1 +%1: +} by { + ; Peephole 243b jump optimization +} if labelRefCount %1 1 + + +// This allows non-interrupt and interrupt code to safely compete +// for a resource without the non-interrupt code having to disable +// interrupts: +// volatile bit resource_is_free; +// if( resource_is_free ) { +// resource_is_free=0; do_something; resource_is_free=1; +// } +replace { + jnb %1,%2 +%3: + clr %1 +} by { + ; Peephole 244.a using atomic test and clear + jbc %1,%3 + sjmp %2 +%3: +} if labelRefCount %3 0 + +replace { + jb %1,%2 + ljmp %3 +%2: + clr %1 +} by { + ; Peephole 244.b using atomic test and clear + jbc %1,%2 + ljmp %3 +%2: +} if labelRefCount %2 1 + diff --git a/src/ds390/ralloc.c b/src/ds390/ralloc.c new file mode 100644 index 0000000..f166a64 --- /dev/null +++ b/src/ds390/ralloc.c @@ -0,0 +1,3421 @@ +/*------------------------------------------------------------------------ + + SDCCralloc.c - source file for register allocation. (DS80C390) specific + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" +#include "ralloc.h" +#include "gen.h" + +/*-----------------------------------------------------------------*/ +/* At this point we start getting processor specific although */ +/* some routines are non-processor specific & can be reused when */ +/* targetting other processors. The decision for this will have */ +/* to be made on a routine by routine basis */ +/* routines used to pack registers are most definitely not reusable */ +/* since the pack the registers depending strictly on the MCU */ +/*-----------------------------------------------------------------*/ + +#define D(x) + +/* Global data */ +static struct + { + bitVect *spiltSet; + set *stackSpil; + bitVect *regAssigned; + bitVect *totRegAssigned; /* final set of LRs that got into registers */ + short blockSpil; + int slocNum; + bitVect *funcrUsed; /* registers used in a function */ + int stackExtend; + int dataExtend; + bitVect *allBitregs; /* all bit registers */ + } +_G; + +/* Shared with gen.c */ +int ds390_ptrRegReq; /* one byte pointer register required */ + +/* 8051 registers */ +regs regs390[] = +{ + + {REG_GPR, R2_IDX, REG_GPR, "r2", "ar2", "0", 2, 1, 1}, + {REG_GPR, R3_IDX, REG_GPR, "r3", "ar3", "0", 3, 1, 1}, + {REG_GPR, R4_IDX, REG_GPR, "r4", "ar4", "0", 4, 1, 1}, + {REG_GPR, R5_IDX, REG_GPR, "r5", "ar5", "0", 5, 1, 1}, + {REG_GPR, R6_IDX, REG_GPR, "r6", "ar6", "0", 6, 1, 1}, + {REG_GPR, R7_IDX, REG_GPR, "r7", "ar7", "0", 7, 1, 1}, + {REG_PTR, R0_IDX, REG_PTR, "r0", "ar0", "0", 0, 1, 1}, + {REG_PTR, R1_IDX, REG_PTR, "r1", "ar1", "0", 1, 1, 1}, + {REG_GPR, DPL_IDX, REG_GPR, "dpl", "dpl", "dpl", 0, 0, 0}, + {REG_GPR, DPH_IDX, REG_GPR, "dph", "dph", "dph", 0, 0, 0}, + {REG_GPR, DPX_IDX, REG_GPR, "dpx", "dpx", "dpx", 0, 0, 0}, + {REG_GPR, B_IDX, REG_GPR, "b", "b", "b", 0, 0, 0}, + {REG_BIT, B0_IDX, REG_BIT, "b0", "b0", "bits", 0, 1, 0}, + {REG_BIT, B1_IDX, REG_BIT, "b1", "b1", "bits", 1, 1, 0}, + {REG_BIT, B2_IDX, REG_BIT, "b2", "b2", "bits", 2, 1, 0}, + {REG_BIT, B3_IDX, REG_BIT, "b3", "b3", "bits", 3, 1, 0}, + {REG_BIT, B4_IDX, REG_BIT, "b4", "b4", "bits", 4, 1, 0}, + {REG_BIT, B5_IDX, REG_BIT, "b5", "b5", "bits", 5, 1, 0}, + {REG_BIT, B6_IDX, REG_BIT, "b6", "b6", "bits", 6, 1, 0}, + {REG_BIT, B7_IDX, REG_BIT, "b7", "b7", "bits", 7, 1, 0}, + {REG_GPR, X8_IDX, REG_GPR, "x8", "x8", "xreg", 0, 0, 0}, + {REG_GPR, X9_IDX, REG_GPR, "x9", "x9", "xreg", 1, 0, 0}, + {REG_GPR, X10_IDX, REG_GPR, "x10", "x10", "xreg", 2, 0, 0}, + {REG_GPR, X11_IDX, REG_GPR, "x11", "x11", "xreg", 3, 0, 0}, + {REG_GPR, X12_IDX, REG_GPR, "x12", "x12", "xreg", 4, 0, 0}, + {REG_CND, CND_IDX, REG_GPR, "C", "psw", "xreg", 0, 0, 0}, + {0, DPL1_IDX, 0, "dpl1", "dpl1", "dpl1", 0, 0, 0}, + {0, DPH1_IDX, 0, "dph1", "dph1", "dph1", 0, 0, 0}, + {0, DPX1_IDX, 0, "dpx1", "dpx1", "dpx1", 0, 0, 0}, + {0, DPS_IDX, 0, "dps", "dps", "dps", 0, 0, 0}, + {0, A_IDX, 0, "a", "acc", "acc", 0, 0, 0}, + {0, AP_IDX, 0, "ap", "ap", "ap", 0, 0, 0}, +}; + +int ds390_nRegs = 13; +int ds390_nBitRegs = 0; + +static void spillThis (symbol *); +static void freeAllRegs (); +static iCode * packRegsDPTRuse (operand *); +static int packRegsDPTRnuse (operand *,unsigned); + +/*-----------------------------------------------------------------*/ +/* allocReg - allocates register of given type */ +/*-----------------------------------------------------------------*/ +static regs * +allocReg (short type) +{ + int i; + + for (i = 0; i < ds390_nRegs; i++) + { + + /* if type is given as 0 then any + free register will do */ + if (!type && + regs390[i].isFree) + { + regs390[i].isFree = 0; + if (currFunc) + currFunc->regsUsed = bitVectSetBit (currFunc->regsUsed, i); + return ®s390[i]; + } + /* otherwise look for specific type of register */ + if (regs390[i].isFree && + regs390[i].type == type) + { + regs390[i].isFree = 0; + if (currFunc) + currFunc->regsUsed = bitVectSetBit (currFunc->regsUsed, i); + return ®s390[i]; + } + } + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* ds390_regWithIdx - returns pointer to register with index number*/ +/*-----------------------------------------------------------------*/ +regs * +ds390_regWithIdx (int idx) +{ + int i; + + for (i = 0; i < sizeof(regs390)/sizeof(regs); i++) + if (regs390[i].rIdx == idx) + return ®s390[i]; + + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "regWithIdx not found"); + exit (1); +} + +/*-----------------------------------------------------------------*/ +/* freeReg - frees a register */ +/*-----------------------------------------------------------------*/ +static void +freeReg (regs * reg) +{ + if (!reg) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "freeReg - Freeing NULL register"); + exit (1); + } + + reg->isFree = 1; +} + +/*-----------------------------------------------------------------*/ +/* useReg - marks a register as used */ +/*-----------------------------------------------------------------*/ +static void +useReg (regs * reg) +{ + reg->isFree = 0; +} + +/*-----------------------------------------------------------------*/ +/* nFreeRegs - returns number of free registers */ +/*-----------------------------------------------------------------*/ +static int +nFreeRegs (int type) +{ + int i; + int nfr = 0; + + for (i = 0; i < ds390_nRegs; i++) + if (regs390[i].isFree && regs390[i].type == type) + nfr++; + return nfr; +} + +/*-----------------------------------------------------------------*/ +/* nfreeRegsType - free registers with type */ +/*-----------------------------------------------------------------*/ +static int +nfreeRegsType (int type) +{ + int nfr; + if (type == REG_PTR) + { + if ((nfr = nFreeRegs (type)) == 0) + return nFreeRegs (REG_GPR); + } + + return nFreeRegs (type); +} + +/*-----------------------------------------------------------------*/ +/* isOperandInReg - returns true if operand is currently in regs */ +/*-----------------------------------------------------------------*/ +static int isOperandInReg(operand *op) +{ + if (!IS_SYMOP(op)) return 0; + if (OP_SYMBOL(op)->ruonly) return 1; + if (OP_SYMBOL(op)->accuse) return 1; + if (OP_SYMBOL(op)->dptr) return 1; + return bitVectBitValue(_G.totRegAssigned,OP_SYMBOL(op)->key); +} + +/*-----------------------------------------------------------------*/ +/* computeSpillable - given a point find the spillable live ranges */ +/*-----------------------------------------------------------------*/ +static bitVect * +computeSpillable (iCode * ic) +{ + bitVect *spillable; + + /* spillable live ranges are those that are live at this + point . the following categories need to be subtracted + from this set. + a) - those that are already spilt + b) - if being used by this one + c) - defined by this one */ + + spillable = bitVectCopy (ic->rlive); + spillable = + bitVectCplAnd (spillable, _G.spiltSet); /* those already spilt */ + spillable = + bitVectCplAnd (spillable, ic->uses); /* used in this one */ + bitVectUnSetBit (spillable, ic->defKey); + spillable = bitVectIntersect (spillable, _G.regAssigned); + return spillable; + +} + +/*-----------------------------------------------------------------*/ +/* bitType - will return 1 if the symbol has type REG_BIT */ +/*-----------------------------------------------------------------*/ +static int +bitType (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return (sym->regType == REG_BIT ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* noSpilLoc - return true if a variable has no spil location */ +/*-----------------------------------------------------------------*/ +static int +noSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return (sym->usl.spillLoc ? 0 : 1); +} + +/*-----------------------------------------------------------------*/ +/* hasSpilLoc - will return 1 if the symbol has spil location */ +/*-----------------------------------------------------------------*/ +static int +hasSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return (sym->usl.spillLoc ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* directSpilLoc - will return 1 if the spillocation is in direct */ +/*-----------------------------------------------------------------*/ +static int +directSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + if (sym->usl.spillLoc && + (IN_DIRSPACE (SPEC_OCLS (sym->usl.spillLoc->etype)))) + return 1; + else + return 0; +} + +/*-----------------------------------------------------------------*/ +/* hasSpilLocnoUptr - will return 1 if the symbol has spil location */ +/* but is not used as a pointer */ +/*-----------------------------------------------------------------*/ +static int +hasSpilLocnoUptr (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return ((sym->usl.spillLoc && !sym->uptr) ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* rematable - will return 1 if the remat flag is set */ +/*-----------------------------------------------------------------*/ +static int +rematable (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return sym->remat; +} + +/*-----------------------------------------------------------------*/ +/* notUsedInRemaining - not used or defined in remain of the block */ +/*-----------------------------------------------------------------*/ +static int +notUsedInRemaining (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return ((usedInRemaining (operandFromSymbol (sym), ic) ? 0 : 1) && + allDefsOutOfRange (sym->defs, ebp->fSeq, ebp->lSeq)); +} + +/*-----------------------------------------------------------------*/ +/* allLRs - return true for all */ +/*-----------------------------------------------------------------*/ +static int +allLRs (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return 1; +} + +/*-----------------------------------------------------------------*/ +/* liveRangesWith - applies function to a given set of live range */ +/*-----------------------------------------------------------------*/ +static set * +liveRangesWith (bitVect * lrs, int (func) (symbol *, eBBlock *, iCode *), + eBBlock * ebp, iCode * ic) +{ + set *rset = NULL; + int i; + + if (!lrs || !lrs->size) + return NULL; + + for (i = 1; i < lrs->size; i++) + { + symbol *sym; + if (!bitVectBitValue (lrs, i)) + continue; + + /* if we don't find it in the live range + hash table we are in serious trouble */ + if (!(sym = hTabItemWithKey (liveRanges, i))) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "liveRangesWith could not find liveRange"); + exit (1); + } + + if (func (sym, ebp, ic) && bitVectBitValue (_G.regAssigned, sym->key)) + addSetHead (&rset, sym); + } + + return rset; +} + + +/*-----------------------------------------------------------------*/ +/* leastUsedLR - given a set determines which is the least used */ +/*-----------------------------------------------------------------*/ +static symbol * +leastUsedLR (set * sset) +{ + symbol *sym = NULL, *lsym = NULL; + + sym = lsym = setFirstItem (sset); + + if (!lsym) + return NULL; + + for (; lsym; lsym = setNextItem (sset)) + { + + /* if usage is the same then prefer + to spill the smaller of the two */ + if (lsym->used == sym->used) + if (getSize (lsym->type) < getSize (sym->type)) + sym = lsym; + + /* if less usage */ + if (lsym->used < sym->used) + sym = lsym; + + } + + setToNull ((void *) &sset); + sym->blockSpil = 0; + return sym; +} + +/*-----------------------------------------------------------------*/ +/* noOverLap - will iterate through the list looking for over lap */ +/*-----------------------------------------------------------------*/ +static int +noOverLap (set * itmpStack, symbol * fsym) +{ + symbol *sym; + + for (sym = setFirstItem (itmpStack); sym; + sym = setNextItem (itmpStack)) + { + if (bitVectBitValue(sym->clashes,fsym->key)) return 0; + } + return 1; +} + +/*-----------------------------------------------------------------*/ +/* isFree - will return 1 if the a free spil location is found */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (isFree) +{ + symbol *sym = item; + V_ARG (symbol **, sloc); + V_ARG (symbol *, fsym); + + /* if already found */ + if (*sloc) + return 0; + + /* if it is free && and the itmp assigned to + this does not have any overlapping live ranges + with the one currently being assigned and + the size can be accomodated */ + if (sym->isFree && + noOverLap (sym->usl.itmpStack, fsym) && + getSize (sym->type) >= getSize (fsym->type)) + { + *sloc = sym; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* spillLRWithPtrReg :- will spil those live ranges which use PTR */ +/*-----------------------------------------------------------------*/ +static void +spillLRWithPtrReg (symbol * forSym) +{ + symbol *lrsym; + regs *r0, *r1; + int k; + + if (!_G.regAssigned || + bitVectIsZero (_G.regAssigned)) + return; + + r0 = ds390_regWithIdx (R0_IDX); + r1 = ds390_regWithIdx (R1_IDX); + + /* for all live ranges */ + for (lrsym = hTabFirstItem (liveRanges, &k); lrsym; + lrsym = hTabNextItem (liveRanges, &k)) + { + int j; + + /* if no registers assigned to it or spilt */ + /* if it does not overlap this then + no need to spill it */ + + if (lrsym->isspilt || !lrsym->nRegs || + (lrsym->liveTo < forSym->liveFrom)) + continue; + + /* go thru the registers : if it is either + r0 or r1 then spill it */ + for (j = 0; j < lrsym->nRegs; j++) + if (lrsym->regs[j] == r0 || + lrsym->regs[j] == r1) + { + spillThis (lrsym); + break; + } + } + +} + +/*-----------------------------------------------------------------*/ +/* createStackSpil - create a location on the stack to spil */ +/*-----------------------------------------------------------------*/ +static symbol * +createStackSpil (symbol * sym) +{ + symbol *sloc = NULL; + int useXstack, model, noOverlay; + + char slocBuffer[30]; + + /* first go try and find a free one that is already + existing on the stack */ + if (applyToSet (_G.stackSpil, isFree, &sloc, sym)) + { + /* found a free one : just update & return */ + sym->usl.spillLoc = sloc; + sym->stackSpil = 1; + sloc->isFree = 0; + addSetHead (&sloc->usl.itmpStack, sym); + return sym; + } + + /* could not then have to create one , this is the hard part + we need to allocate this on the stack : this is really a + hack!! but cannot think of anything better at this time */ + + if (SNPRINTF (slocBuffer, sizeof(slocBuffer), + "sloc%d", _G.slocNum++) >= sizeof (slocBuffer)) + { + fprintf (stderr, "***Internal error: slocBuffer overflowed: %s:%d\n", + __FILE__, __LINE__); + exit (1); + } + + sloc = newiTemp (slocBuffer); + + /* set the type to the spilling symbol */ + sloc->type = copyLinkChain (sym->type); + sloc->etype = getSpec (sloc->type); + if (!IS_BIT (sloc->etype)) + { + if (options.model == MODEL_SMALL) + { + SPEC_SCLS (sloc->etype) = S_DATA; + } + else + { + SPEC_SCLS (sloc->etype) = S_XDATA; + } + } + SPEC_EXTR (sloc->etype) = 0; + SPEC_STAT (sloc->etype) = 0; + SPEC_VOLATILE(sloc->etype) = 0; + SPEC_ABSA(sloc->etype) = 0; + + /* we don't allow it to be allocated + onto the external stack since : so we + temporarily turn it off ; we also + turn off memory model to prevent + the spil from going to the external storage + and turn off overlaying + */ + + useXstack = options.useXstack; + model = options.model; + noOverlay = options.noOverlay; + options.noOverlay = 1; + + /* options.model = options.useXstack = 0; */ + + allocLocal (sloc); + + options.useXstack = useXstack; + options.model = model; + options.noOverlay = noOverlay; + sloc->isref = 1; /* to prevent compiler warning */ + + /* if it is on the stack then update the stack */ + if (IN_STACK (sloc->etype)) + { + currFunc->stack += getSize (sloc->type); + _G.stackExtend += getSize (sloc->type); + } + else + _G.dataExtend += getSize (sloc->type); + + /* add it to the _G.stackSpil set */ + addSetHead (&_G.stackSpil, sloc); + sym->usl.spillLoc = sloc; + sym->stackSpil = 1; + + /* add it to the set of itempStack set + of the spill location */ + addSetHead (&sloc->usl.itmpStack, sym); + return sym; +} + +/*-----------------------------------------------------------------*/ +/* isSpiltOnStack - returns true if the spil location is on stack */ +/*-----------------------------------------------------------------*/ +static bool +isSpiltOnStack (symbol * sym) +{ + sym_link *etype; + + if (!sym) + return FALSE; + + if (!sym->isspilt) + return FALSE; + +/* if (sym->_G.stackSpil) */ +/* return TRUE; */ + + if (!sym->usl.spillLoc) + return FALSE; + + etype = getSpec (sym->usl.spillLoc->type); + if (IN_STACK (etype)) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* spillThis - spils a specific operand */ +/*-----------------------------------------------------------------*/ +static void +spillThis (symbol * sym) +{ + int i; + /* if this is rematerializable or has a spillLocation + we are okay, else we need to create a spillLocation + for it */ + if (!(sym->remat || sym->usl.spillLoc)) + createStackSpil (sym); + + /* mark it has spilt & put it in the spilt set */ + sym->isspilt = sym->spillA = 1; + _G.spiltSet = bitVectSetBit (_G.spiltSet, sym->key); + + bitVectUnSetBit (_G.regAssigned, sym->key); + bitVectUnSetBit (_G.totRegAssigned, sym->key); + + for (i = 0; i < sym->nRegs; i++) + + if (sym->regs[i]) + { + freeReg (sym->regs[i]); + sym->regs[i] = NULL; + } + + /* if spilt on stack then free up r0 & r1 + if they could have been assigned to some + LIVE ranges */ + if (!ds390_ptrRegReq && isSpiltOnStack (sym) && !options.stack10bit) + { + ds390_ptrRegReq ++; + spillLRWithPtrReg (sym); + } + + if (sym->usl.spillLoc && !sym->remat) + sym->usl.spillLoc->allocreq++; + return; +} + +/*-----------------------------------------------------------------*/ +/* selectSpil - select a iTemp to spil : rather a simple procedure */ +/*-----------------------------------------------------------------*/ +static symbol * +selectSpil (iCode * ic, eBBlock * ebp, symbol * forSym) +{ + bitVect *lrcs = NULL; + set *selectS; + symbol *sym; + + /* get the spillable live ranges */ + lrcs = computeSpillable (ic); + + /* remove incompatible registers */ + if ((forSym->regType == REG_PTR) || (forSym->regType == REG_GPR)) + { + selectS = liveRangesWith (lrcs, bitType, ebp, ic); + + for (sym = setFirstItem (selectS); sym; sym = setNextItem (selectS)) + { + bitVectUnSetBit (lrcs, sym->key); + } + } + + /* get all live ranges that are rematerializable */ + if ((selectS = liveRangesWith (lrcs, rematable, ebp, ic))) + { + /* return the least used of these */ + return leastUsedLR (selectS); + } + + /* get live ranges with spillLocations in direct space */ + if ((selectS = liveRangesWith (lrcs, directSpilLoc, ebp, ic))) + { + sym = leastUsedLR (selectS); + strncpyz (sym->rname, + sym->usl.spillLoc->rname[0] ? + sym->usl.spillLoc->rname : sym->usl.spillLoc->name, + sizeof(sym->rname)); + sym->spildir = 1; + /* mark it as allocation required */ + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* if the symbol is local to the block then */ + if (forSym->liveTo < ebp->lSeq) + { + /* check if there are any live ranges allocated + to registers that are not used in this block */ + if (!_G.blockSpil && (selectS = liveRangesWith (lrcs, notUsedInBlock, ebp, ic))) + { + sym = leastUsedLR (selectS); + /* if this is not rematerializable */ + if (!sym->remat) + { + _G.blockSpil++; + sym->blockSpil = 1; + } + return sym; + } + + /* check if there are any live ranges that not + used in the remainder of the block */ + if (!_G.blockSpil && + !isiCodeInFunctionCall (ic) && + (selectS = liveRangesWith (lrcs, notUsedInRemaining, ebp, ic))) + { + sym = leastUsedLR (selectS); + if (sym != forSym) + { + if (!sym->remat) + { + sym->remainSpil = 1; + _G.blockSpil++; + } + return sym; + } + } + } + + /* find live ranges with spillocation && not used as pointers */ + if ((selectS = liveRangesWith (lrcs, hasSpilLocnoUptr, ebp, ic))) + { + sym = leastUsedLR (selectS); + /* mark this as allocation required */ + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* find live ranges with spillocation */ + if ((selectS = liveRangesWith (lrcs, hasSpilLoc, ebp, ic))) + { + sym = leastUsedLR (selectS); + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* couldn't find then we need to create a spil + location on the stack , for which one? the least + used ofcourse */ + if ((selectS = liveRangesWith (lrcs, noSpilLoc, ebp, ic))) + { + /* return a created spil location */ + sym = createStackSpil (leastUsedLR (selectS)); + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* this is an extreme situation we will spill + this one : happens very rarely but it does happen */ + spillThis (forSym); + return forSym; + +} + +/*-----------------------------------------------------------------*/ +/* spilSomething - spil some variable & mark registers as free */ +/*-----------------------------------------------------------------*/ +static bool +spilSomething (iCode * ic, eBBlock * ebp, symbol * forSym) +{ + symbol *ssym; + int i; + + /* get something we can spil */ + ssym = selectSpil (ic, ebp, forSym); + + /* mark it as spilt */ + ssym->isspilt = ssym->spillA = 1; + _G.spiltSet = bitVectSetBit (_G.spiltSet, ssym->key); + + /* mark it as not register assigned & + take it away from the set */ + bitVectUnSetBit (_G.regAssigned, ssym->key); + bitVectUnSetBit (_G.totRegAssigned, ssym->key); + + /* mark the registers as free */ + for (i = 0; i < ssym->nRegs; i++) + if (ssym->regs[i]) + freeReg (ssym->regs[i]); + + /* if spilt on stack then free up r0 & r1 + if they could have been assigned to as gprs */ + if (!ds390_ptrRegReq && isSpiltOnStack (ssym) && !options.stack10bit) + { + ds390_ptrRegReq++; + spillLRWithPtrReg (ssym); + } + + /* if this was a block level spil then insert push & pop + at the start & end of block respectively */ + if (ssym->blockSpil) + { + iCode *nic = newiCode (IPUSH, operandFromSymbol (ssym), NULL); + /* add push to the start of the block */ + addiCodeToeBBlock (ebp, nic, (ebp->sch->op == LABEL ? + ebp->sch->next : ebp->sch)); + nic = newiCode (IPOP, operandFromSymbol (ssym), NULL); + /* add pop to the end of the block */ + addiCodeToeBBlock (ebp, nic, NULL); + } + + /* if spilt because not used in the remainder of the + block then add a push before this instruction and + a pop at the end of the block */ + if (ssym->remainSpil) + { + + iCode *nic = newiCode (IPUSH, operandFromSymbol (ssym), NULL); + /* add push just before this instruction */ + addiCodeToeBBlock (ebp, nic, ic); + + nic = newiCode (IPOP, operandFromSymbol (ssym), NULL); + /* add pop to the end of the block */ + addiCodeToeBBlock (ebp, nic, NULL); + } + + if (ssym == forSym) + return FALSE; + else + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* getRegPtr - will try for PTR if not a GPR type if not spil */ +/*-----------------------------------------------------------------*/ +static regs * +getRegPtr (iCode * ic, eBBlock * ebp, symbol * sym) +{ + regs *reg; + int j; + +tryAgain: + /* try for a ptr type */ + if ((reg = allocReg (REG_PTR))) + return reg; + + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + /* we have to spil */ + if (!spilSomething (ic, ebp, sym)) + return NULL; + + /* make sure partially assigned registers aren't reused */ + for (j=0; j<=sym->nRegs; j++) + if (sym->regs[j]) + sym->regs[j]->isFree = 0; + + /* this looks like an infinite loop but + in really selectSpil will abort */ + goto tryAgain; +} + +/*-----------------------------------------------------------------*/ +/* getRegGpr - will try for GPR if not spil */ +/*-----------------------------------------------------------------*/ +static regs * +getRegGpr (iCode * ic, eBBlock * ebp, symbol * sym) +{ + regs *reg; + int j; + +tryAgain: + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + if (!ds390_ptrRegReq) + if ((reg = allocReg (REG_PTR))) + return reg; + + /* we have to spil */ + if (!spilSomething (ic, ebp, sym)) + return NULL; + + /* make sure partially assigned registers aren't reused */ + for (j=0; j<=sym->nRegs; j++) + if (sym->regs[j]) + sym->regs[j]->isFree = 0; + + /* this looks like an infinite loop but + in really selectSpil will abort */ + goto tryAgain; +} + +/*-----------------------------------------------------------------*/ +/* getRegBit - will try for Bit if not spill this */ +/*-----------------------------------------------------------------*/ +static regs *getRegBit (symbol * sym) +{ + regs *reg; + + /* try for a bit type */ + if ((reg = allocReg (REG_BIT))) + return reg; + + spillThis (sym); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* getRegPtrNoSpil - get it cannot be spilt */ +/*-----------------------------------------------------------------*/ +static regs *getRegPtrNoSpil() +{ + regs *reg; + + /* try for a ptr type */ + if ((reg = allocReg (REG_PTR))) + return reg; + + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + assert(0); + + /* just to make the compiler happy */ + return 0; +} + +/*-----------------------------------------------------------------*/ +/* getRegGprNoSpil - get it cannot be spilt */ +/*-----------------------------------------------------------------*/ +static regs *getRegGprNoSpil() +{ + + regs *reg; + if ((reg = allocReg (REG_GPR))) + return reg; + + if (!ds390_ptrRegReq) + if ((reg = allocReg (REG_PTR))) + return reg; + + assert(0); + + /* just to make the compiler happy */ + return 0; +} + +/*-----------------------------------------------------------------*/ +/* getRegBitNoSpil - get it cannot be spilt */ +/*-----------------------------------------------------------------*/ +static regs *getRegBitNoSpil() +{ + regs *reg; + + /* try for a bit type */ + if ((reg = allocReg (REG_BIT))) + return reg; + + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + assert(0); + + /* just to make the compiler happy */ + return 0; +} + +/*-----------------------------------------------------------------*/ +/* symHasReg - symbol has a given register */ +/*-----------------------------------------------------------------*/ +static bool +symHasReg (symbol * sym, regs * reg) +{ + int i; + + for (i = 0; i < sym->nRegs; i++) + if (sym->regs[i] == reg) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* updateRegUsage - update the registers in use at the start of */ +/* this icode */ +/*-----------------------------------------------------------------*/ +static void +updateRegUsage (iCode * ic) +{ + int reg; + + for (reg=0; regriu &= ~(1<riu |= (1<= B0_IDX); + } + } +} + +/*-----------------------------------------------------------------*/ +/* deassignLRs - check the live to and if they have registers & are */ +/* not spilt then free up the registers */ +/*-----------------------------------------------------------------*/ +static void +deassignLRs (iCode * ic, eBBlock * ebp) +{ + symbol *sym; + int k; + symbol *result; + + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) + { + + symbol *psym = NULL; + /* if it does not end here */ + if (sym->liveTo > ic->seq) + continue; + + /* if it was spilt on stack then we can + mark the stack spil location as free */ + if (sym->isspilt) + { + if (sym->stackSpil) + { + sym->usl.spillLoc->isFree = 1; + sym->stackSpil = 0; + } + continue; + } + + if (!bitVectBitValue (_G.regAssigned, sym->key)) + continue; + + /* special case check if this is an IFX & + the privious one was a pop and the + previous one was not spilt then keep track + of the symbol */ + if (ic->op == IFX && ic->prev && + ic->prev->op == IPOP && + !ic->prev->parmPush && + !OP_SYMBOL (IC_LEFT (ic->prev))->isspilt) + psym = OP_SYMBOL (IC_LEFT (ic->prev)); + + if (sym->nRegs) + { + int i = 0; + + bitVectUnSetBit (_G.regAssigned, sym->key); + + /* if the result of this one needs registers + and does not have it then assign it right + away */ + if (IC_RESULT (ic) && + !(SKIP_IC2 (ic) || /* not a special icode */ + ic->op == JUMPTABLE || + ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP || + ic->op == RETURN || + POINTER_SET (ic)) && + (result = OP_SYMBOL (IC_RESULT (ic))) && /* has a result */ + result->liveTo > ic->seq && /* and will live beyond this */ + result->liveTo <= ebp->lSeq && /* does not go beyond this block */ + result->liveFrom == ic->seq && /* does not start before here */ + result->regType == sym->regType && /* same register types */ + result->nRegs && /* which needs registers */ + !result->isspilt && /* and does not already have them */ + !result->remat && + !bitVectBitValue (_G.regAssigned, result->key) && + /* the number of free regs + number of regs in this LR + can accomodate the what result Needs */ + ((nfreeRegsType (result->regType) + + sym->nRegs) >= result->nRegs) + ) + { + + for (i = 0; i < result->nRegs; i++) + if (i < sym->nRegs) + result->regs[i] = sym->regs[i]; + else + result->regs[i] = getRegGpr (ic, ebp, result); + + _G.regAssigned = bitVectSetBit (_G.regAssigned, result->key); + _G.totRegAssigned = bitVectSetBit (_G.totRegAssigned, result->key); + + } + + /* free the remaining */ + for (; i < sym->nRegs; i++) + { + if (psym) + { + if (!symHasReg (psym, sym->regs[i])) + freeReg (sym->regs[i]); + } + else + freeReg (sym->regs[i]); + } + } + } +} + + +/*-----------------------------------------------------------------*/ +/* reassignLR - reassign this to registers */ +/*-----------------------------------------------------------------*/ +static void +reassignLR (operand * op) +{ + symbol *sym = OP_SYMBOL (op); + int i; + + /* not spilt any more */ + sym->isspilt = sym->spillA = sym->blockSpil = sym->remainSpil = 0; + bitVectUnSetBit (_G.spiltSet, sym->key); + + _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); + _G.totRegAssigned = bitVectSetBit (_G.totRegAssigned, sym->key); + + _G.blockSpil--; + + for (i = 0; i < sym->nRegs; i++) + sym->regs[i]->isFree = 0; +} + +/*-----------------------------------------------------------------*/ +/* willCauseSpill - determines if allocating will cause a spill */ +/*-----------------------------------------------------------------*/ +static int +willCauseSpill (int nr, int rt) +{ + /* first check if there are any available registers + of the type required */ + if (rt == REG_PTR) + { + /* special case for pointer type + if pointer type not avlb then + check for type gpr */ + if (nFreeRegs (rt) >= nr) + return 0; + if (nFreeRegs (REG_GPR) >= nr) + return 0; + } + else if (rt == REG_BIT) + { + if (nFreeRegs (rt) >= nr) + return 0; + } + else + { + if (ds390_ptrRegReq) + { + if (nFreeRegs (rt) >= nr) + return 0; + } + else + { + if (nFreeRegs (REG_PTR) + + nFreeRegs (REG_GPR) >= nr) + return 0; + } + } + + /* it will cause a spil */ + return 1; +} + +/*-----------------------------------------------------------------*/ +/* positionRegs - the allocator can allocate same registers to res- */ +/* ult and operand, if this happens make sure they are in the same */ +/* position as the operand otherwise chaos results */ +/*-----------------------------------------------------------------*/ +static int +positionRegs (symbol * result, symbol * opsym) +{ + int count = min (result->nRegs, opsym->nRegs); + int i, j = 0, shared = 0; + int change = 0; + + /* if the result has been spilt then cannot share */ + if (opsym->isspilt) + return 0; +again: + shared = 0; + /* first make sure that they actually share */ + for (i = 0; i < count; i++) + { + for (j = 0; j < count; j++) + { + if (result->regs[i] == opsym->regs[j] && i != j) + { + shared = 1; + goto xchgPositions; + } + } + } +xchgPositions: + if (shared) + { + regs *tmp = result->regs[i]; + result->regs[i] = result->regs[j]; + result->regs[j] = tmp; + change ++; + goto again; + } + return change; +} + +/*-----------------------------------------------------------------*/ +/* unusedLRS - returns a bitVector of liveranges not used in 'ebp' */ +/*-----------------------------------------------------------------*/ +bitVect *unusedLRs (eBBlock *ebp) +{ + bitVect *ret = NULL; + symbol *sym; + int key; + + if (!ebp) return NULL; + for (sym = hTabFirstItem(liveRanges,&key); sym ; + sym = hTabNextItem(liveRanges,&key)) { + + if (notUsedInBlock(sym,ebp,NULL)) { + ret = bitVectSetBit(ret,sym->key); + } + } + + return ret; +} + +/*-----------------------------------------------------------------*/ +/* deassignUnsedLRs - if this baisc block ends in a return then */ +/* deassign symbols not used in this block */ +/*-----------------------------------------------------------------*/ +bitVect *deassignUnsedLRs(eBBlock *ebp) +{ + bitVect *unused = NULL; + int i; + + switch (returnAtEnd(ebp)) { + case 2: /* successor block ends in a return */ + unused = unusedLRs((eBBlock *) setFirstItem(ebp->succList)); + /* fall thru */ + case 1: /* this block ends in a return */ + unused = bitVectIntersect(unused,unusedLRs(ebp)); + break; + } + + if (unused) { + for (i = 0 ; i < unused->size ; i++ ) { + + /* if unused */ + if (bitVectBitValue(unused,i)) { + + /* if assigned to registers */ + if (bitVectBitValue(_G.regAssigned,i)) { + symbol *sym; + int j; + + sym = hTabItemWithKey(liveRanges,i); + /* remove it from regassigned & mark the + register free */ + bitVectUnSetBit(_G.regAssigned,i); + for (j = 0 ; j < sym->nRegs; j++) + freeReg(sym->regs[j]); + } else { + /* not assigned to registers : remove from set*/ + bitVectUnSetBit(unused,i); + } + } + } + } + return unused; +} + +/*-----------------------------------------------------------------*/ +/* reassignUnusedLRs - put registers to unused Live ranges */ +/*-----------------------------------------------------------------*/ +void reassignUnusedLRs (bitVect *unused) +{ + int i; + if (!unused) return ; + + for (i = 0 ; i < unused->size ; i++ ) { + /* if unused : means it was assigned to registers before */ + if (bitVectBitValue(unused,i)) { + symbol *sym; + int j; + + /* put it back into reg set*/ + bitVectSetBit(_G.regAssigned,i) ; + + sym = hTabItemWithKey(liveRanges,i); + /* make registers busy */ + for (j = 0 ; j < sym->nRegs; j++) + sym->regs[j]->isFree = 0; + } + } +} + +/*------------------------------------------------------------------*/ +/* verifyRegsAssigned - make sure an iTemp is properly initialized; */ +/* it should either have registers or have beed spilled. Otherwise, */ +/* there was an uninitialized variable, so just spill this to get */ +/* the operand in a valid state. */ +/*------------------------------------------------------------------*/ +static void +verifyRegsAssigned (operand *op, iCode * ic) +{ + symbol * sym; + + if (!op) return; + if (!IS_ITEMP (op)) return; + + sym = OP_SYMBOL (op); + if (sym->isspilt) return; + if (!sym->nRegs) return; + if (sym->regs[0]) return; + + werrorfl (ic->filename, ic->lineno, W_LOCAL_NOINIT, + sym->prereqv ? sym->prereqv->name : sym->name); + spillThis (sym); +} + + +/*-----------------------------------------------------------------*/ +/* serialRegAssign - serially allocate registers to the variables */ +/*-----------------------------------------------------------------*/ +static void +serialRegAssign (eBBlock ** ebbs, int count) +{ + int i; + + /* for all blocks */ + for (i = 0; i < count; i++) + { /* ebbs */ + + iCode *ic; + bitVect *unusedLRs = NULL; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + unusedLRs = deassignUnsedLRs(ebbs[i]); + + /* for all instructions do */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + updateRegUsage(ic); + + /* if this is an ipop that means some live + range will have to be assigned again */ + if (ic->op == IPOP) + reassignLR (IC_LEFT (ic)); + + /* if result is present && is a true symbol */ + if (IC_RESULT (ic) && ic->op != IFX && + IS_TRUE_SYMOP (IC_RESULT (ic))) + OP_SYMBOL (IC_RESULT (ic))->allocreq++; + + /* take away registers from live + ranges that end at this instruction */ + deassignLRs (ic, ebbs[i]); + + /* some don't need registers */ + if (SKIP_IC2 (ic) || + ic->op == JUMPTABLE || + ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP || + (IC_RESULT (ic) && POINTER_SET (ic))) + continue; + + /* now we need to allocate registers + only for the result */ + if (IC_RESULT (ic)) + { + symbol *sym = OP_SYMBOL (IC_RESULT (ic)); + bitVect *spillable; + int willCS; + int j; + int ptrRegSet = 0; + + /* Make sure any spill location is definitely allocated */ + if (sym->isspilt && !sym->remat && sym->usl.spillLoc && + !sym->usl.spillLoc->allocreq) + { + sym->usl.spillLoc->allocreq++; + } + + /* if it does not need or is spilt + or is already assigned to registers + or will not live beyond this instructions */ + if (!sym->nRegs || + sym->isspilt || + bitVectBitValue (_G.regAssigned, sym->key) || + sym->liveTo <= ic->seq) + continue; + + /* if some liverange has been spilt at the block level + and this one live beyond this block then spil this + to be safe */ + if (_G.blockSpil && sym->liveTo > ebbs[i]->lSeq) + { + spillThis (sym); + continue; + } + + willCS = willCauseSpill (sym->nRegs, sym->regType); + /* if this is a bit variable then don't use precious registers + along with expensive bit-to-char conversions but just spill + it */ + if (willCS && SPEC_NOUN(sym->etype) == V_BIT) + { + spillThis (sym); + continue; + } + + /* if trying to allocate this will cause + a spill and there is nothing to spill + or this one is rematerializable then + spill this one */ + spillable = computeSpillable (ic); + if (sym->remat || (willCS && bitVectIsZero (spillable))) + { + spillThis (sym); + continue; + } + + /* If the live range preceeds the point of definition + then ideally we must take into account registers that + have been allocated after sym->liveFrom but freed + before ic->seq. This is complicated, so spill this + symbol instead and let fillGaps handle the allocation. */ + if (sym->liveFrom < ic->seq) + { + spillThis (sym); + continue; + } + + /* if it has a spillocation & is used less than + all other live ranges then spill this */ + if (willCS) { + if (sym->usl.spillLoc) { + symbol *leastUsed = leastUsedLR (liveRangesWith (spillable, + allLRs, ebbs[i], ic)); + if (leastUsed && leastUsed->used > sym->used) { + spillThis (sym); + continue; + } + } else { + /* if none of the liveRanges have a spillLocation then better + to spill this one than anything else already assigned to registers */ + if (liveRangesWith(spillable,noSpilLoc,ebbs[i],ic)) { + /* if this is local to this block then we might find a block spil */ + if (!(sym->liveFrom >= ebbs[i]->fSeq && sym->liveTo <= ebbs[i]->lSeq)) { + spillThis (sym); + continue; + } + } + } + } + + /* if we need ptr regs for the right side + then mark it */ + if (POINTER_GET (ic) && IS_SYMOP (IC_LEFT (ic)) + && getSize (OP_SYMBOL (IC_LEFT (ic))->type) <= (unsigned) PTRSIZE) + { + ds390_ptrRegReq++; + ptrRegSet = 1; + } + /* else we assign registers to it */ + _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); + _G.totRegAssigned = bitVectSetBit (_G.totRegAssigned, sym->key); + + for (j = 0; j < sym->nRegs; j++) + { + sym->regs[j] = NULL; + if (sym->regType == REG_PTR) + sym->regs[j] = getRegPtr (ic, ebbs[i], sym); + else if (sym->regType == REG_BIT) + sym->regs[j] = getRegBit (sym); + else + sym->regs[j] = getRegGpr (ic, ebbs[i], sym); + + /* if the allocation failed which means + this was spilt then break */ + if (!sym->regs[j]) + break; + } + + /* if it shares registers with operands make sure + that they are in the same position */ + if (!POINTER_SET(ic) && !POINTER_GET(ic)) + { + if (IC_LEFT (ic) && IS_SYMOP (IC_LEFT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->nRegs) + { + positionRegs (OP_SYMBOL (IC_RESULT (ic)), + OP_SYMBOL (IC_LEFT (ic))); + } + /* do the same for the right operand */ + if (IC_RIGHT (ic) && IS_SYMOP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->nRegs) + { + positionRegs (OP_SYMBOL (IC_RESULT (ic)), + OP_SYMBOL (IC_RIGHT (ic))); + } + } + + if (ptrRegSet) + { + ds390_ptrRegReq--; + ptrRegSet = 0; + } + + } + } + reassignUnusedLRs(unusedLRs); + } + + /* Check for and fix any problems with uninitialized operands */ + for (i = 0; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + if (SKIP_IC2 (ic)) + continue; + + if (ic->op == IFX) + { + verifyRegsAssigned (IC_COND (ic), ic); + continue; + } + + if (ic->op == JUMPTABLE) + { + verifyRegsAssigned (IC_JTCOND (ic), ic); + continue; + } + + verifyRegsAssigned (IC_RESULT (ic), ic); + verifyRegsAssigned (IC_LEFT (ic), ic); + verifyRegsAssigned (IC_RIGHT (ic), ic); + } + } +} + +/*-----------------------------------------------------------------*/ +/* fillGaps - Try to fill in the Gaps left by Pass1 */ +/*-----------------------------------------------------------------*/ +static void fillGaps() +{ + symbol *sym =NULL; + int key =0; + int loop = 0, change; + int pass; + + if (getenv("DISABLE_FILL_GAPS")) return; + + /* First try to do DPTRuse once more since now we know what got into + registers */ + + while (loop++ < 10) { + change = 0; + + for (sym = hTabFirstItem(liveRanges,&key) ; sym ; + sym = hTabNextItem(liveRanges,&key)) { + int size = getSize(sym->type); + + if (sym->liveFrom == sym->liveTo) continue; + + if (sym->uptr && sym->dptr==0 && !sym->ruonly && + size < 4 && size > 1) { + + if (packRegsDPTRuse(operandFromSymbol(sym))) { + + /* if this was assigned to registers then */ + if (bitVectBitValue(_G.totRegAssigned,sym->key)) { + /* take it out of the register assigned set */ + bitVectUnSetBit(_G.totRegAssigned,sym->key); + } else if (sym->usl.spillLoc) { + sym->usl.spillLoc->allocreq--; + sym->usl.spillLoc = NULL; + } + + sym->nRegs = 0; + sym->isspilt = sym->spillA = 0; + continue ; + } + + /* try assigning other dptrs */ + if (sym->dptr == 0 && packRegsDPTRnuse(operandFromSymbol(sym),1) && !getenv("DPTRnDISABLE")) { + /* if this was ssigned to registers then */ + if (bitVectBitValue(_G.totRegAssigned,sym->key)) { + /* take it out of the register assigned set */ + bitVectUnSetBit(_G.totRegAssigned,sym->key); + } else if (sym->usl.spillLoc) { + sym->usl.spillLoc->allocreq--; + sym->usl.spillLoc = NULL; + } + sym->nRegs = 0; + sym->isspilt = sym->spillA = 0; + } + } + } + + /* look for liveranges that were spilt by the allocator */ + for (sym = hTabFirstItem(liveRanges,&key) ; sym ; + sym = hTabNextItem(liveRanges,&key)) { + + int i; + int pdone = 0; + + if (!sym->spillA || !sym->clashes || sym->remat) continue ; + if (!sym->uses || !sym->defs) continue ; + /* find the liveRanges this one clashes with, that are + still assigned to registers & mark the registers as used*/ + for ( i = 0 ; i < sym->clashes->size ; i ++) { + int k; + symbol *clr; + + if (bitVectBitValue(sym->clashes,i) == 0 || /* those that clash with this */ + bitVectBitValue(_G.totRegAssigned,i) == 0) /* and are still assigned to registers */ + continue ; + + clr = hTabItemWithKey(liveRanges,i); + assert(clr); + + /* mark these registers as used */ + for (k = 0 ; k < clr->nRegs ; k++ ) + useReg(clr->regs[k]); + } + + if (willCauseSpill(sym->nRegs,sym->regType)) { + /* NOPE :( clear all registers & and continue */ + freeAllRegs(); + continue ; + } + + /* THERE IS HOPE !!!! */ + for (i=0; i < sym->nRegs ; i++ ) { + if (sym->regType == REG_PTR) + sym->regs[i] = getRegPtrNoSpil (); + else if (sym->regType == REG_BIT) + sym->regs[i] = getRegBitNoSpil (); + else + sym->regs[i] = getRegGprNoSpil (); + } + + /* For all its definitions check if the registers + allocated needs positioning NOTE: we can position + only ONCE if more than One positioning required + then give up. + We may need to perform the checks twice; once to + position the registers as needed, the second to + verify any register repositioning is still + compatible. + */ + sym->isspilt = 0; + for (pass=0; pass<2; pass++) { + for (i = 0 ; i < sym->defs->size ; i++ ) { + if (bitVectBitValue(sym->defs,i)) { + iCode *ic; + if (!(ic = hTabItemWithKey(iCodehTab,i))) continue ; + if (SKIP_IC(ic)) continue; + assert(isSymbolEqual(sym,OP_SYMBOL(IC_RESULT(ic)))); /* just making sure */ + /* if left is assigned to registers */ + if (IS_SYMOP(IC_LEFT(ic)) && + bitVectBitValue(_G.totRegAssigned,OP_SYMBOL(IC_LEFT(ic))->key)) { + pdone += (positionRegs(sym,OP_SYMBOL(IC_LEFT(ic)))>0); + } + if (IS_SYMOP(IC_RIGHT(ic)) && + bitVectBitValue(_G.totRegAssigned,OP_SYMBOL(IC_RIGHT(ic))->key)) { + pdone += (positionRegs(sym,OP_SYMBOL(IC_RIGHT(ic)))>0); + } + if (pdone > 1) break; + } + } + for (i = 0 ; i < sym->uses->size ; i++ ) { + if (bitVectBitValue(sym->uses,i)) { + iCode *ic; + if (!(ic = hTabItemWithKey(iCodehTab,i))) continue ; + if (SKIP_IC(ic)) continue; + if (POINTER_SET(ic) || POINTER_GET(ic)) continue ; + + /* if result is assigned to registers */ + if (IS_SYMOP(IC_RESULT(ic)) && + bitVectBitValue(_G.totRegAssigned,OP_SYMBOL(IC_RESULT(ic))->key)) { + pdone += (positionRegs(sym,OP_SYMBOL(IC_RESULT(ic)))>0); + } + if (pdone > 1) break; + } + } + if (pdone == 0) break; /* second pass only if regs repositioned */ + if (pdone > 1) break; + } + /* had to position more than once GIVE UP */ + if (pdone > 1) { + /* UNDO all the changes we made to try this */ + sym->isspilt = 1; + for (i=0; i < sym->nRegs ; i++ ) { + sym->regs[i] = NULL; + } + freeAllRegs(); + D (fprintf (stderr, "Fill Gap gave up due to positioning for " + "%s in function %s\n", + sym->name, currFunc ? currFunc->name : "UNKNOWN")); + continue ; + } + D (fprintf (stderr, "FILLED GAP for %s in function %s\n", + sym->name, currFunc ? currFunc->name : "UNKNOWN")); + _G.totRegAssigned = bitVectSetBit(_G.totRegAssigned,sym->key); + sym->isspilt = sym->spillA = 0 ; + sym->usl.spillLoc->allocreq--; + sym->usl.spillLoc = NULL; + freeAllRegs(); + change ++; + } + if (!change) break; + } +} + +/*-----------------------------------------------------------------*/ +/* findAllBitregs :- returns bit vector of all bit registers */ +/*-----------------------------------------------------------------*/ +static bitVect * +findAllBitregs (void) +{ + bitVect *rmask = newBitVect (ds390_nRegs); + int j; + + for (j = 0; j < ds390_nRegs; j++) + { + if (regs390[j].type == REG_BIT) + rmask = bitVectSetBit (rmask, regs390[j].rIdx); + } + + return rmask; +} + +/*-----------------------------------------------------------------*/ +/* ds390_allBitregs :- returns bit vector of all bit registers */ +/*-----------------------------------------------------------------*/ +bitVect * +ds390_allBitregs (void) +{ + return _G.allBitregs; +} + +/*-----------------------------------------------------------------*/ +/* rUmaskForOp :- returns register mask for an operand */ +/*-----------------------------------------------------------------*/ +bitVect * +ds390_rUmaskForOp (operand * op) +{ + bitVect *rumask; + symbol *sym; + int j; + + /* only temporaries are assigned registers */ + if (!IS_ITEMP (op)) + return NULL; + + sym = OP_SYMBOL (op); + + /* if spilt or no registers assigned to it + then nothing */ + if (sym->isspilt || !sym->nRegs) + return NULL; + + rumask = newBitVect (ds390_nRegs); + + for (j = 0; j < sym->nRegs; j++) + { + rumask = bitVectSetBit (rumask, + sym->regs[j]->rIdx); + } + + return rumask; +} + +/*-----------------------------------------------------------------*/ +/* regsUsedIniCode :- returns bit vector of registers used in iCode */ +/*-----------------------------------------------------------------*/ +static bitVect * +regsUsedIniCode (iCode * ic) +{ + bitVect *rmask = newBitVect (ds390_nRegs); + + /* do the special cases first */ + if (ic->op == IFX) + { + rmask = bitVectUnion (rmask, + ds390_rUmaskForOp (IC_COND (ic))); + goto ret; + } + + /* for the jumptable */ + if (ic->op == JUMPTABLE) + { + rmask = bitVectUnion (rmask, + ds390_rUmaskForOp (IC_JTCOND (ic))); + + goto ret; + } + + /* of all other cases */ + if (IC_LEFT (ic)) + rmask = bitVectUnion (rmask, + ds390_rUmaskForOp (IC_LEFT (ic))); + + + if (IC_RIGHT (ic)) + rmask = bitVectUnion (rmask, + ds390_rUmaskForOp (IC_RIGHT (ic))); + + if (IC_RESULT (ic)) + rmask = bitVectUnion (rmask, + ds390_rUmaskForOp (IC_RESULT (ic))); + +ret: + return rmask; +} + +/*-----------------------------------------------------------------*/ +/* createRegMask - for each instruction will determine the regsUsed */ +/*-----------------------------------------------------------------*/ +static void +createRegMask (eBBlock ** ebbs, int count) +{ + int i; + + /* for all blocks */ + for (i = 0; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + /* for all instructions */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + + int j; + + if (SKIP_IC2 (ic) || !ic->rlive) + continue; + + /* first mark the registers used in this + instruction */ + ic->rUsed = regsUsedIniCode (ic); + _G.funcrUsed = bitVectUnion (_G.funcrUsed, ic->rUsed); + + /* now create the register mask for those + registers that are in use : this is a + super set of ic->rUsed */ + ic->rMask = newBitVect (ds390_nRegs + 1); + + /* for all live Ranges alive at this point */ + for (j = 1; j < ic->rlive->size; j++) + { + symbol *sym; + int k; + + /* if not alive then continue */ + if (!bitVectBitValue (ic->rlive, j)) + continue; + + /* find the live range we are interested in */ + if (!(sym = hTabItemWithKey (liveRanges, j))) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "createRegMask cannot find live range"); + fprintf(stderr, "\tmissing live range: key=%d\n", j); + exit (0); + } +#if 0 + /* special case for ruonly */ + if (sym->ruonly && sym->liveFrom != sym->liveTo) { + int size = getSize(sym->type); + int j = DPL_IDX; + for (k = 0 ; k < size; k++ ) + ic->rMask = bitVectSetBit (ic->rMask, j++); + continue ; + } +#endif + /* if no register assigned to it */ + if (!sym->nRegs || sym->isspilt) + continue; + + /* for all the registers allocated to it */ + for (k = 0; k < sym->nRegs; k++) + if (sym->regs[k]) + ic->rMask = + bitVectSetBit (ic->rMask, sym->regs[k]->rIdx); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* rematStr - returns the rematerialized string for a remat var */ +/*-----------------------------------------------------------------*/ +static char * +rematStr (symbol * sym) +{ + iCode *ic = sym->rematiCode; + int offset = 0; + + while (1) + { + /* if plus adjust offset to right hand side */ + if (ic->op == '+') + { + offset += (int) operandLitValue (IC_RIGHT (ic)); + ic = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + continue; + } + + /* if minus adjust offset to right hand side */ + if (ic->op == '-') + { + offset -= (int) operandLitValue (IC_RIGHT (ic)); + ic = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + continue; + } + + /* cast then continue */ + if (IS_CAST_ICODE(ic)) { + ic = OP_SYMBOL (IC_RIGHT (ic))->rematiCode; + continue; + } + /* we reached the end */ + break; + } + + if (offset) + { + SNPRINTF (buffer, sizeof(buffer), + "(%s %c 0x%04x)", + OP_SYMBOL (IC_LEFT (ic))->rname, + offset >= 0 ? '+' : '-', + abs (offset) & 0xffff); + } + else + { + strncpyz (buffer, OP_SYMBOL (IC_LEFT (ic))->rname, sizeof(buffer)); + } + return buffer; +} + +/*-----------------------------------------------------------------*/ +/* regTypeNum - computes the type & number of registers required */ +/*-----------------------------------------------------------------*/ +static void +regTypeNum () +{ + symbol *sym; + int k; + iCode *ic; + + /* for each live range do */ + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) + { + + /* if used zero times then no registers needed */ + if ((sym->liveTo - sym->liveFrom) == 0) + continue; + + + /* if the live range is a temporary */ + if (sym->isitmp) + { + + /* if the type is marked as a conditional */ + if (sym->regType == REG_CND) + continue; + + /* if used in return only then we don't + need registers */ + if (sym->ruonly || sym->accuse) + { + if (IS_AGGREGATE (sym->type) || sym->isptr) + sym->type = aggrToPtr (sym->type, FALSE); + continue; + } + + /* if the symbol has only one definition & + that definition is a get_pointer */ + if (bitVectnBitsOn (sym->defs) == 1 && + (ic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (sym->defs))) && + POINTER_GET (ic) && + !IS_BITVAR (sym->etype) && + (aggrToPtrDclType (operandType (IC_LEFT (ic)), FALSE) == POINTER)) + { + + if (ptrPseudoSymSafe (sym, ic)) + { + ptrPseudoSymConvert (sym, ic, rematStr (OP_SYMBOL (IC_LEFT (ic)))); + continue; + } + + /* if in data space or idata space then try to + allocate pointer register */ + + } + + /* if not then we require registers */ + sym->nRegs = ((IS_AGGREGATE (sym->type) || sym->isptr) ? + getSize (sym->type = aggrToPtr (sym->type, FALSE)) : + getSize (sym->type)); + + if (sym->nRegs > 4) + { + fprintf (stderr, "allocated more than 4 or 0 registers for type "); + printTypeChain (sym->type, stderr); + fprintf (stderr, "\n"); + } + + /* determine the type of register required */ + if (sym->nRegs == 1 && IS_PTR (sym->type) && sym->uptr) + sym->regType = REG_PTR; + else if (IS_BIT(sym->type)) + sym->regType = REG_BIT; + else + sym->regType = REG_GPR; + } + else + /* for the first run we don't provide */ + /* registers for true symbols we will */ + /* see how things go */ + sym->nRegs = 0; + } + +} + +/*-----------------------------------------------------------------*/ +/* freeAllRegs - mark all registers as free */ +/*-----------------------------------------------------------------*/ +static void +freeAllRegs () +{ + int i; + + for (i = 0; i < ds390_nRegs; i++) + regs390[i].isFree = 1; + + for (i = B0_IDX; i < ds390_nBitRegs; i++) + regs390[i].isFree = 1; +} + +/*-----------------------------------------------------------------*/ +/* deallocStackSpil - this will set the stack pointer back */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (deallocStackSpil) +{ + symbol *sym = item; + + deallocLocal (sym); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* farSpacePackable - returns the packable icode for far variables */ +/*-----------------------------------------------------------------*/ +static iCode * +farSpacePackable (iCode * ic) +{ + iCode *dic; + + /* go thru till we find a definition for the + symbol on the right */ + for (dic = ic->prev; dic; dic = dic->prev) + { + /* if the definition is a call then no */ + if ((dic->op == CALL || dic->op == PCALL) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + { + return NULL; + } + + /* if shift by unknown amount then not */ + if ((dic->op == LEFT_OP || dic->op == RIGHT_OP) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + return NULL; + + /* if pointer get and size > 1 */ + if (POINTER_GET (dic) && + getSize (aggrToPtr (operandType (IC_LEFT (dic)), FALSE)) > 1) + return NULL; + + if (POINTER_SET (dic) && + getSize (aggrToPtr (operandType (IC_RESULT (dic)), FALSE)) > 1) + return NULL; + + /* if any tree is a true symbol in far space */ + if (IC_RESULT (dic) && + IS_TRUE_SYMOP (IC_RESULT (dic)) && + isOperandInFarSpace (IC_RESULT (dic))) + return NULL; + + if (IC_RIGHT (dic) && + IS_TRUE_SYMOP (IC_RIGHT (dic)) && + isOperandInFarSpace (IC_RIGHT (dic)) && + !isOperandEqual (IC_RIGHT (dic), IC_RESULT (ic))) + return NULL; + + if (IC_LEFT (dic) && + IS_TRUE_SYMOP (IC_LEFT (dic)) && + isOperandInFarSpace (IC_LEFT (dic)) && + !isOperandEqual (IC_LEFT (dic), IC_RESULT (ic))) + return NULL; + + if (isOperandEqual (IC_RIGHT (ic), IC_RESULT (dic))) + { + if ((dic->op == LEFT_OP || + dic->op == RIGHT_OP || + dic->op == '-') && + IS_OP_LITERAL (IC_RIGHT (dic))) + return NULL; + else + return dic; + } + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* packRegsForAssign - register reduction for assignment */ +/*-----------------------------------------------------------------*/ +static int +packRegsForAssign (iCode * ic, eBBlock * ebp) +{ + iCode *dic, *sic; + + if (!IS_ITEMP (IC_RIGHT (ic)) || + OP_SYMBOL (IC_RIGHT (ic))->isind || + OP_LIVETO (IC_RIGHT (ic)) > ic->seq) + { + return 0; + } + + /* if the true symbol is defined in far space or on stack + then we should not since this will increase register pressure */ +#if 0 + if (isOperandInFarSpace (IC_RESULT (ic))) + { + if ((dic = farSpacePackable (ic))) + goto pack; + else + return 0; + } +#else + if (isOperandInFarSpace(IC_RESULT(ic)) && !farSpacePackable(ic)) { + return 0; + } +#endif + + /* find the definition of iTempNN scanning backwards if we find a + a use of the true symbol in before we find the definition then + we cannot */ + for (dic = ic->prev; dic; dic = dic->prev) + { + /* if there is a function call then don't pack it */ + if ((dic->op == CALL || dic->op == PCALL)) + { + dic = NULL; + break; + } + + if (SKIP_IC2 (dic)) + continue; + + if (IS_TRUE_SYMOP (IC_RESULT (dic)) && + IS_OP_VOLATILE (IC_RESULT (dic))) + { + dic = NULL; + break; + } + + if (IS_SYMOP (IC_RESULT (dic)) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + { + if (POINTER_SET (dic)) + dic = NULL; + + break; + } + + if (IS_SYMOP (IC_RIGHT (dic)) && + (IC_RIGHT (dic)->key == IC_RESULT (ic)->key || + IC_RIGHT (dic)->key == IC_RIGHT (ic)->key)) + { + dic = NULL; + break; + } + + if (IS_SYMOP (IC_LEFT (dic)) && + (IC_LEFT (dic)->key == IC_RESULT (ic)->key || + IC_LEFT (dic)->key == IC_RIGHT (ic)->key)) + { + dic = NULL; + break; + } + + if (POINTER_SET (dic) && + IC_RESULT (dic)->key == IC_RESULT (ic)->key) + { + dic = NULL; + break; + } + } + + if (!dic) + return 0; /* did not find */ + + /* if assignment then check that right is not a bit */ + if (ASSIGNMENT (ic) && !POINTER_SET (ic)) + { + sym_link *etype = operandType (IC_RESULT (dic)); + if (IS_BITFIELD (etype)) + { + /* if result is a bit too then it's ok */ + etype = operandType (IC_RESULT (ic)); + if (!IS_BITFIELD (etype)) + { + return 0; + } + } + } + /* if the result is on stack or iaccess then it must be + the same atleast one of the operands */ + if (OP_SYMBOL (IC_RESULT (ic))->onStack || + OP_SYMBOL (IC_RESULT (ic))->iaccess) + { + + /* the operation has only one symbol + operator then we can pack */ + if ((IC_LEFT (dic) && !IS_SYMOP (IC_LEFT (dic))) || + (IC_RIGHT (dic) && !IS_SYMOP (IC_RIGHT (dic)))) + goto pack; + + if (!((IC_LEFT (dic) && + IC_RESULT (ic)->key == IC_LEFT (dic)->key) || + (IC_RIGHT (dic) && + IC_RESULT (ic)->key == IC_RIGHT (dic)->key))) + return 0; + } +pack: + /* found the definition */ + /* replace the result with the result of */ + /* this assignment and remove this assignment */ + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + + IC_RESULT (dic) = IC_RESULT (ic); + + if (IS_ITEMP (IC_RESULT (dic)) && OP_SYMBOL (IC_RESULT (dic))->liveFrom > dic->seq) + { + OP_SYMBOL (IC_RESULT (dic))->liveFrom = dic->seq; + } + /* delete from liverange table also + delete from all the points inbetween and the new + one */ + for (sic = dic; sic != ic; sic = sic->next) + { + bitVectUnSetBit (sic->rlive, IC_RESULT (ic)->key); + if (IS_ITEMP (IC_RESULT (dic))) + bitVectSetBit (sic->rlive, IC_RESULT (dic)->key); + } + + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS(IC_RESULT (dic))=bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + return 1; +} + +/*------------------------------------------------------------------*/ +/* findAssignToSym : scanning backwards looks for first assig found */ +/*------------------------------------------------------------------*/ +static iCode * +findAssignToSym (operand * op, iCode * ic) +{ + iCode *dic; + + /* This routine is used to find sequences like + iTempAA = FOO; + ...; (intervening ops don't use iTempAA or modify FOO) + blah = blah + iTempAA; + + and eliminate the use of iTempAA, freeing up its register for + other uses. + */ + + for (dic = ic->prev; dic; dic = dic->prev) + { + + /* if definition by assignment */ + if (dic->op == '=' && + !POINTER_SET (dic) && + IC_RESULT (dic)->key == op->key +/* && IS_TRUE_SYMOP(IC_RIGHT(dic)) */ + ) + { + + /* we are interested only if defined in far space */ + /* or in stack space in case of + & - */ + + /* if assigned to a non-symbol then return + FALSE */ + if (!IS_SYMOP (IC_RIGHT (dic))) + return NULL; + + /* if the symbol is in far space then we should not */ + if (isOperandInFarSpace (IC_RIGHT (dic))) + return NULL; + + /* for + & - operations make sure that + if it is on the stack it is the same + as one of the three operands */ + if ((ic->op == '+' || ic->op == '-') && + OP_SYMBOL (IC_RIGHT (dic))->onStack) + { + + if (IC_RESULT (ic)->key != IC_RIGHT (dic)->key && + IC_LEFT (ic)->key != IC_RIGHT (dic)->key && + IC_RIGHT (ic)->key != IC_RIGHT (dic)->key) + return NULL; + } + + break; + + } + + /* if we find an usage then we cannot delete it */ + if (IC_LEFT (dic) && IC_LEFT (dic)->key == op->key) + return NULL; + + if (IC_RIGHT (dic) && IC_RIGHT (dic)->key == op->key) + return NULL; + + if (POINTER_SET (dic) && IC_RESULT (dic)->key == op->key) + return NULL; + } + + /* now make sure that the right side of dic + is not defined between ic & dic */ + if (dic) + { + iCode *sic = dic->next; + + for (; sic != ic; sic = sic->next) + if (IC_RESULT (sic) && + IC_RESULT (sic)->key == IC_RIGHT (dic)->key) + return NULL; + } + + return dic; + + +} + +/*-----------------------------------------------------------------*/ +/* packRegsForSupport :- reduce some registers for support calls */ +/*-----------------------------------------------------------------*/ +static int +packRegsForSupport (iCode * ic, eBBlock * ebp) +{ + int change = 0; + + /* for the left & right operand :- look to see if the + left was assigned a true symbol in far space in that + case replace them */ + if (IS_ITEMP (IC_LEFT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->liveTo <= ic->seq) + { + iCode *dic = findAssignToSym (IC_LEFT (ic), ic); + iCode *sic; + + if (!dic) + goto right; + + /* found it we need to remove it from the + block */ + for (sic = dic; sic != ic; sic = sic->next) { + bitVectUnSetBit (sic->rlive, IC_LEFT (ic)->key); + sic->rlive = bitVectSetBit (sic->rlive, IC_RIGHT (dic)->key); + } + + wassert(IS_SYMOP(IC_LEFT (ic))); + wassert(IS_SYMOP(IC_RIGHT (dic))); + IC_LEFT (ic)->operand.symOperand = + IC_RIGHT (dic)->operand.symOperand; + OP_SYMBOL(IC_LEFT(ic))->liveTo = ic->seq; + IC_LEFT (ic)->key = IC_RIGHT (dic)->operand.symOperand->key; + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + remiCodeFromeBBlock (ebp, dic); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); + change++; + } + + /* do the same for the right operand */ +right: + if (!change && + IS_ITEMP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->liveTo <= ic->seq) + { + iCode *dic = findAssignToSym (IC_RIGHT (ic), ic); + iCode *sic; + + if (!dic) + return change; + + /* if this is a subtraction & the result + is a true symbol in far space then don't pack */ + if (ic->op == '-' && IS_TRUE_SYMOP (IC_RESULT (dic))) + { + sym_link *etype = getSpec (operandType (IC_RESULT (dic))); + if (IN_FARSPACE (SPEC_OCLS (etype))) + return change; + } + /* found it we need to remove it from the + block */ + for (sic = dic; sic != ic; sic = sic->next) { + bitVectUnSetBit (sic->rlive, IC_RIGHT (ic)->key); + sic->rlive = bitVectSetBit (sic->rlive, IC_RIGHT (dic)->key); + } + + wassert(IS_SYMOP(IC_RIGHT (ic))); + wassert(IS_SYMOP(IC_RIGHT (dic))); + IC_RIGHT (ic)->operand.symOperand = + IC_RIGHT (dic)->operand.symOperand; + IC_RIGHT (ic)->key = IC_RIGHT (dic)->operand.symOperand->key; + OP_SYMBOL(IC_RIGHT(ic))->liveTo = ic->seq; + remiCodeFromeBBlock (ebp, dic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); + change++; + } + + return change; +} + + +/*-----------------------------------------------------------------*/ +/* packRegsDPTRnuse - color live ranges that can go into extra DPTRS */ +/*-----------------------------------------------------------------*/ +static int packRegsDPTRnuse( operand *op , unsigned dptr) +{ + int i,key; + iCode *ic; + + if (!IS_SYMOP(op) || !IS_ITEMP(op)) return 0; + if (OP_SYMBOL(op)->remat || OP_SYMBOL(op)->ruonly || OP_SYMBOL(op)->dptr) + return 0; + + /* first check if any overlapping liverange has already been + assigned to this DPTR */ + if (OP_SYMBOL(op)->clashes) { + for (i = 0 ; i < OP_SYMBOL(op)->clashes->size ; i++ ) { + symbol *sym; + if (bitVectBitValue(OP_SYMBOL(op)->clashes,i)) { + sym = hTabItemWithKey(liveRanges,i); + if (sym->dptr == dptr) return 0; + } + } + } + + /* future for more dptrs */ + if (dptr > 1) { + OP_SYMBOL(op)->dptr = dptr; + return 1; + } + + /* DPTR1 is special since it is also used as a scratch by the backend . + so we walk thru the entire live range of this operand and make sure + DPTR1 will not be used by the backed . The logic here is to find out if + more than one operand in an icode is in far space then we give up : we + don't keep it live across functions for now + */ + + ic = hTabFirstItemWK(iCodeSeqhTab,OP_SYMBOL(op)->liveFrom); + for (; ic && ic->seq <= OP_SYMBOL(op)->liveTo; + ic = hTabNextItem(iCodeSeqhTab,&key)) { + int nfs =0; + + if (ic->op == CALL || ic->op == PCALL) return 0; + + /* single operand icode are ok */ + if (ic->op == IFX || ic->op == IPUSH) + continue ; + + if (ic->op == SEND ) { + if (ic->argreg != 1 ) return 0; + else continue ; + } + /* two special cases first */ + if (POINTER_GET(ic) && !isOperandEqual(IC_LEFT(ic),op) && /* pointer get */ + !OP_SYMBOL(IC_LEFT(ic))->ruonly && /* with result in far space */ + (isOperandInFarSpace(IC_RESULT(ic)) && + !isOperandInReg(IC_RESULT(ic)))) { + return 0; + } + + if (POINTER_SET(ic) && !isOperandEqual(IC_RESULT(ic),op) && /* pointer set */ + !OP_SYMBOL(IC_RESULT(ic))->ruonly && /* with right in far space */ + (isOperandInFarSpace(IC_RIGHT(ic)) && + !isOperandInReg(IC_RIGHT(ic)))) { + return 0; + } + + if (IC_RESULT(ic) && IS_SYMOP(IC_RESULT(ic)) && /* if symbol operand */ + !isOperandEqual(IC_RESULT(ic),op) && /* not the same as this */ + ((isOperandInFarSpace(IC_RESULT(ic)) || /* in farspace or */ + OP_SYMBOL(IC_RESULT(ic))->onStack) && /* on the stack */ + !isOperandInReg(IC_RESULT(ic)))) { /* and not in register */ + nfs++; + } + /* same for left */ + if (IC_LEFT(ic) && IS_SYMOP(IC_LEFT(ic)) && /* if symbol operand */ + !isOperandEqual(IC_LEFT(ic),op) && /* not the same as this */ + ((isOperandInFarSpace(IC_LEFT(ic)) || /* in farspace or */ + OP_SYMBOL(IC_LEFT(ic))->onStack) && /* on the stack */ + !isOperandInReg(IC_LEFT(ic)))) { /* and not in register */ + nfs++; + } + /* same for right */ + if (IC_RIGHT(ic) && IS_SYMOP(IC_RIGHT(ic)) && /* if symbol operand */ + !isOperandEqual(IC_RIGHT(ic),op) && /* not the same as this */ + ((isOperandInFarSpace(IC_RIGHT(ic)) || /* in farspace or */ + OP_SYMBOL(IC_RIGHT(ic))->onStack) && /* on the stack */ + !isOperandInReg(IC_RIGHT(ic)))) { /* and not in register */ + nfs++; + } + + // Check that no other ops in this range have been assigned to dptr1. + // I don't understand why this is not caught by the first check, above. + // But it isn't always, see bug 769624. + if (IC_RESULT(ic) && IS_SYMOP(IC_RESULT(ic)) && + (OP_SYMBOL(IC_RESULT(ic))->dptr == 1)) + { + //fprintf(stderr, "dptr1 already in use in live range #1\n"); + return 0; + } + + if (IC_LEFT(ic) && IS_SYMOP(IC_LEFT(ic)) && + (OP_SYMBOL(IC_LEFT(ic))->dptr == 1)) + { + //fprintf(stderr, "dptr1 already in use in live range # 2\n"); + return 0; + } + + if (IC_RIGHT(ic) && IS_SYMOP(IC_RIGHT(ic)) && + (OP_SYMBOL(IC_RIGHT(ic))->dptr == 1)) + { + //fprintf(stderr, "dptr1 already in use in live range # 3\n"); + return 0; + } + + if (nfs && IC_RESULT(ic) && IS_SYMOP(IC_RESULT(ic)) && + OP_SYMBOL(IC_RESULT(ic))->ruonly) return 0; + + if (nfs > 1) return 0; + } + OP_SYMBOL(op)->dptr = dptr; + return 1; +} + +/*-----------------------------------------------------------------*/ +/* packRegsDPTRuse : - will reduce some registers for single Use */ +/*-----------------------------------------------------------------*/ +static iCode * +packRegsDPTRuse (operand * op) +{ + /* go thru entire liveRange of this variable & check for + other possible usage of DPTR , if we don't find it the + assign this to DPTR (ruonly) + */ + int i, key; + symbol *sym; + iCode *ic, *dic; + sym_link *type, *etype; + + if (!IS_SYMOP(op) || !IS_ITEMP(op)) return NULL; + if (OP_SYMBOL(op)->remat || OP_SYMBOL(op)->ruonly) return NULL; + + /* first check if any overlapping liverange has already been + assigned to DPTR */ + if (OP_SYMBOL(op)->clashes) { + for (i = 0 ; i < OP_SYMBOL(op)->clashes->size ; i++ ) { + if (bitVectBitValue(OP_SYMBOL(op)->clashes,i)) { + sym = hTabItemWithKey(liveRanges,i); + if (sym->ruonly) return NULL ; + } + } + } + + /* no then go thru this guys live range */ + dic = ic = hTabFirstItemWK(iCodeSeqhTab,OP_SYMBOL(op)->liveFrom); + for (; ic && ic->seq <= OP_SYMBOL(op)->liveTo; + ic = hTabNextItem(iCodeSeqhTab,&key)) { + + if (SKIP_IC3(ic)) continue; + + /* if PCALL cannot be sure give up */ + if (ic->op == PCALL) return NULL; + + /* if SEND & not the first parameter then giveup */ + if (ic->op == SEND && ic->argreg != 1 && + ((isOperandInFarSpace(IC_LEFT(ic)) && !isOperandInReg(IC_LEFT(ic))) || + isOperandEqual(op,IC_LEFT(ic)))) return NULL; + + /* if CALL then make sure it is VOID || return value not used + or the return value is assigned to this one */ + if (ic->op == CALL) { + if (OP_SYMBOL(IC_RESULT(ic))->liveTo == + OP_SYMBOL(IC_RESULT(ic))->liveFrom) continue ; + etype = getSpec(type = operandType(IC_RESULT(ic))); + if (getSize(type) == 0 || isOperandEqual(op,IC_RESULT(ic))) + continue ; + return NULL ; + } + + /* special case of add with a [remat] */ + if (ic->op == '+' && + OP_SYMBOL(IC_LEFT(ic))->remat && + (isOperandInFarSpace(IC_RIGHT(ic)) && + !isOperandInReg(IC_RIGHT(ic)))) return NULL ; + + /* special cases */ + /* pointerGet */ + if (POINTER_GET(ic) && !isOperandEqual(IC_LEFT(ic),op) && + getSize(operandType(IC_LEFT(ic))) > 1 ) return NULL ; + + /* pointerSet */ + if (POINTER_SET(ic) && !isOperandEqual(IC_RESULT(ic),op) && + getSize(operandType(IC_RESULT(ic))) > 1 ) return NULL; + + /* conditionals can destroy 'b' - make sure B wont + be used in this one*/ + if ((IS_CONDITIONAL(ic) || ic->op == '*' || ic->op == '/' || + ic->op == LEFT_OP || ic->op == RIGHT_OP ) && + getSize(operandType(op)) > 3) return NULL; + + /* if this is a cast to a bigger type */ + if (ic->op==CAST) { + if (!IS_PTR(OP_SYM_TYPE(IC_RESULT(ic))) && + getSize(OP_SYM_TYPE(IC_RESULT(ic))) > + getSize(OP_SYM_TYPE(IC_RIGHT(ic)))) { + return 0; + } + } + + /* general case */ + if (IC_RESULT(ic) && IS_SYMOP(IC_RESULT(ic)) && + !isOperandEqual(IC_RESULT(ic),op) && + ( ( ( isOperandInFarSpace(IC_RESULT(ic)) || OP_SYMBOL(IC_RESULT(ic))->onStack) && + !isOperandInReg(IC_RESULT(ic))) || + OP_SYMBOL(IC_RESULT(ic))->ruonly)) return NULL; + + if (IC_RIGHT(ic) && IS_SYMOP(IC_RIGHT(ic)) && + !isOperandEqual(IC_RIGHT(ic),op) && + (OP_SYMBOL(IC_RIGHT(ic))->liveTo >= ic->seq || + IS_TRUE_SYMOP(IC_RIGHT(ic)) || + OP_SYMBOL(IC_RIGHT(ic))->ruonly) && + ( ( isOperandInFarSpace(IC_RIGHT(ic)) || OP_SYMBOL(IC_RIGHT(ic))->onStack) && + !isOperandInReg(IC_RIGHT(ic))) ) return NULL; + + if (IC_LEFT(ic) && IS_SYMOP(IC_LEFT(ic)) && + !isOperandEqual(IC_LEFT(ic),op) && + (OP_SYMBOL(IC_LEFT(ic))->liveTo >= ic->seq || + IS_TRUE_SYMOP(IC_LEFT(ic)) || + OP_SYMBOL(IC_LEFT(ic))->ruonly) && + ( ( isOperandInFarSpace(IC_LEFT(ic)) || OP_SYMBOL(IC_LEFT(ic))->onStack) && + !isOperandInReg(IC_LEFT(ic))) ) return NULL; + + if (IC_LEFT(ic) && IC_RIGHT(ic) && + IS_ITEMP(IC_LEFT(ic)) && IS_ITEMP(IC_RIGHT(ic)) && + (isOperandInFarSpace(IC_LEFT(ic)) && !isOperandInReg(IC_LEFT(ic))) && + (isOperandInFarSpace(IC_RIGHT(ic)) && !isOperandInReg(IC_RIGHT(ic)))) + return NULL; + } + OP_SYMBOL(op)->ruonly = 1; + if (OP_SYMBOL(op)->usl.spillLoc) { + if (OP_SYMBOL(op)->spillA) + OP_SYMBOL(op)->usl.spillLoc->allocreq--; + OP_SYMBOL(op)->usl.spillLoc = NULL; + } + return dic; +} + +/*-----------------------------------------------------------------*/ +/* isBitwiseOptimizable - requirements of JEAN LOUIS VERN */ +/*-----------------------------------------------------------------*/ +static bool +isBitwiseOptimizable (iCode * ic) +{ + sym_link *ltype = getSpec (operandType (IC_LEFT (ic))); + sym_link *rtype = getSpec (operandType (IC_RIGHT (ic))); + + /* bitwise operations are considered optimizable + under the following conditions (Jean-Louis VERN) + + x & lit + bit & bit + bit & x + bit ^ bit + bit ^ x + x ^ lit + x | lit + bit | bit + bit | x + */ + if (IS_LITERAL (rtype) || + (IS_BITVAR (ltype) && IN_BITSPACE (SPEC_OCLS (ltype)))) + return TRUE; + else + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* packRegsForAccUse - pack registers for acc use */ +/*-----------------------------------------------------------------*/ +static void +packRegsForAccUse (iCode * ic) +{ + iCode *uic; + + /* if this is an aggregate, e.g. a one byte char array */ + if (IS_AGGREGATE(operandType(IC_RESULT(ic)))) { + return; + } + + /* if we are calling a reentrant function that has stack parameters */ + if (ic->op == CALL && + IFFUNC_ISREENT(operandType(IC_LEFT(ic))) && + FUNC_HASSTACKPARM(operandType(IC_LEFT(ic)))) + return; + + if (ic->op == PCALL && + IFFUNC_ISREENT(operandType(IC_LEFT(ic))->next) && + FUNC_HASSTACKPARM(operandType(IC_LEFT(ic))->next)) + return; + + /* if + or - then it has to be one byte result */ + if ((ic->op == '+' || ic->op == '-') + && getSize (operandType (IC_RESULT (ic))) > 1) + return; + + /* if shift operation make sure right side is not a literal */ + if (ic->op == RIGHT_OP && + (isOperandLiteral (IC_RIGHT (ic)) || + getSize (operandType (IC_RESULT (ic))) > 1)) + return; + + if (ic->op == LEFT_OP && + (isOperandLiteral (IC_RIGHT (ic)) || + getSize (operandType (IC_RESULT (ic))) > 1)) + return; + + if (IS_BITWISE_OP (ic) && + getSize (operandType (IC_RESULT (ic))) > 1) + return; + + + /* has only one definition */ + if (bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) > 1) + return; + + /* has only one use */ + if (bitVectnBitsOn (OP_USES (IC_RESULT (ic))) > 1) + return; + + /* and the usage immediately follows this iCode */ + if (!(uic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_USES (IC_RESULT (ic)))))) + return; + + if (ic->next != uic) + return; + + /* if it is a conditional branch then we definitely can */ + if (uic->op == IFX) + goto accuse; + + if (uic->op == JUMPTABLE) + return; + + /* if the usage is not is an assignment + or an arithmetic / bitwise / shift operation then not */ + if (POINTER_SET (uic) && + getSize (aggrToPtr (operandType (IC_RESULT (uic)), FALSE)) > 1) + return; + + if (uic->op != '=' && + !IS_ARITHMETIC_OP (uic) && + !IS_BITWISE_OP (uic) && + uic->op != LEFT_OP && + uic->op != RIGHT_OP) + return; + + /* if used in ^ operation then make sure right is not a + literal */ + if (uic->op == '^' && isOperandLiteral (IC_RIGHT (uic))) + return; + + /* if shift operation make sure right side is not a literal */ + if (uic->op == RIGHT_OP && + (isOperandLiteral (IC_RIGHT (uic)) || + getSize (operandType (IC_RESULT (uic))) > 1)) + return; + + if (uic->op == LEFT_OP && + (isOperandLiteral (IC_RIGHT (uic)) || + getSize (operandType (IC_RESULT (uic))) > 1)) + return; + + /* make sure that the result of this icode is not on the + stack, since acc is used to compute stack offset */ + if (isOperandOnStack(IC_RESULT(uic))) + return; + + /* if either one of them in far space then we cannot */ + if ((IS_TRUE_SYMOP (IC_LEFT (uic)) && + isOperandInFarSpace (IC_LEFT (uic))) || + (IS_TRUE_SYMOP (IC_RIGHT (uic)) && + isOperandInFarSpace (IC_RIGHT (uic)))) + return; + + /* if the usage has only one operand then we can */ + if (IC_LEFT (uic) == NULL || + IC_RIGHT (uic) == NULL) + goto accuse; + + /* make sure this is on the left side if not + a '+' since '+' is commutative */ + if (ic->op != '+' && + IC_LEFT (uic)->key != IC_RESULT (ic)->key) + return; + + /* if the other one is not on stack then we can */ + if (IC_LEFT (uic)->key == IC_RESULT (ic)->key && + (IS_ITEMP (IC_RIGHT (uic)) || + (IS_TRUE_SYMOP (IC_RIGHT (uic)) && + !OP_SYMBOL (IC_RIGHT (uic))->onStack))) + goto accuse; + + if (IC_RIGHT (uic)->key == IC_RESULT (ic)->key && + (IS_ITEMP (IC_LEFT (uic)) || + (IS_TRUE_SYMOP (IC_LEFT (uic)) && + !OP_SYMBOL (IC_LEFT (uic))->onStack))) + goto accuse; + + return; + +accuse: + OP_SYMBOL (IC_RESULT (ic))->accuse = 1; + +} + +/*-----------------------------------------------------------------*/ +/* packForPush - heuristics to reduce iCode for pushing */ +/*-----------------------------------------------------------------*/ +static void +packForPush (iCode * ic, eBBlock ** ebpp, int blockno) +{ + iCode *dic, *lic; + bitVect *dbv; + struct eBBlock * ebp = ebpp[blockno]; + + if ((ic->op != IPUSH && ic->op != SEND) || !IS_ITEMP (IC_LEFT (ic))) + return; + + /* must have only definition & one usage */ + if (bitVectnBitsOn (OP_DEFS (IC_LEFT (ic))) != 1 || + bitVectnBitsOn (OP_USES (IC_LEFT (ic))) != 1) + return; + + /* find the definition */ + if (!(dic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_DEFS (IC_LEFT (ic)))))) + return; + + if (dic->op != '=' || POINTER_SET (dic)) + return; + + if (dic->eBBlockNum != ic->eBBlockNum) return ; + + /* make sure the right side does not have any definitions + inbetween */ + dbv = OP_DEFS(IC_RIGHT(dic)); + for (lic = ic; lic && lic != dic ; lic = lic->prev) { + if (bitVectBitValue (dbv, lic->key)) + return; + } + /* make sure they have the same type */ + if (IS_SPEC(operandType(IC_LEFT(ic)))) + { + sym_link *itype=operandType(IC_LEFT(ic)); + sym_link *ditype=operandType(IC_RIGHT(dic)); + + if (SPEC_USIGN(itype)!=SPEC_USIGN(ditype) || + SPEC_LONG(itype)!=SPEC_LONG(ditype)) + return; + } + /* extend the live range of replaced operand if needed */ + if (OP_SYMBOL(IC_RIGHT(dic))->liveTo < OP_SYMBOL(IC_LEFT(ic))->liveTo) { + OP_SYMBOL(IC_RIGHT(dic))->liveTo = OP_SYMBOL(IC_LEFT(ic))->liveTo; + OP_SYMBOL(IC_RIGHT(dic))->clashes = + bitVectUnion(OP_SYMBOL(IC_RIGHT(dic))->clashes, + OP_SYMBOL(IC_LEFT(ic))->clashes); + } + for (lic = ic; lic && lic != dic; lic = lic->prev) + { + bitVectUnSetBit (lic->rlive, IC_LEFT (ic)->key); + if (IS_ITEMP (IC_RIGHT (dic))) + bitVectSetBit (lic->rlive, IC_RIGHT (dic)->key); + } + /* we now we know that it has one & only one def & use + and the that the definition is an assignment */ + IC_LEFT (ic) = IC_RIGHT (dic); + + remiCodeFromeBBlock (ebp, dic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); +} + +/*-----------------------------------------------------------------*/ +/* packRegisters - does some transformations to reduce register */ +/* pressure */ +/*-----------------------------------------------------------------*/ +static void +packRegisters (eBBlock ** ebpp, int blockno) +{ + iCode *ic; + int change = 0; + eBBlock *ebp = ebpp[blockno]; + + while (1) + { + change = 0; + + /* look for assignments of the form */ + /* iTempNN = TRueSym (someoperation) SomeOperand */ + /* .... */ + /* TrueSym := iTempNN:1 */ + for (ic = ebp->sch; ic; ic = ic->next) + { + /* find assignment of the form TrueSym := iTempNN:1 */ + if (ic->op == '=' && !POINTER_SET (ic)) + change += packRegsForAssign (ic, ebp); + } + + if (!change) + break; + } + + for (ic = ebp->sch; ic; ic = ic->next) + { + /* Fix for bug #979599: */ + /* P0 &= ~1; */ + + /* Look for two subsequent iCodes with */ + /* iTemp := _c; */ + /* _c = iTemp & op; */ + /* and replace them by */ + /* iTemp := _c; */ + /* _c = _c & op; */ + if ((ic->op == BITWISEAND || ic->op == '|' || ic->op == '^') && + ic->prev && + ic->prev->op == '=' && + IS_ITEMP (IC_LEFT (ic)) && + IC_LEFT (ic) == IC_RESULT (ic->prev) && + isOperandEqual (IC_RESULT(ic), IC_RIGHT(ic->prev))) + { + iCode* ic_prev = ic->prev; + symbol* prev_result_sym = OP_SYMBOL (IC_RESULT (ic_prev)); + + ReplaceOpWithCheaperOp (&IC_LEFT (ic), IC_RESULT (ic)); + if (IC_RESULT (ic_prev) != IC_RIGHT (ic)) + { + bitVectUnSetBit (OP_USES (IC_RESULT (ic_prev)), ic->key); + if (/*IS_ITEMP (IC_RESULT (ic_prev)) && */ + prev_result_sym->liveTo == ic->seq) + { + prev_result_sym->liveTo = ic_prev->seq; + } + } + bitVectSetBit (OP_USES (IC_RESULT (ic)), ic->key); + + bitVectSetBit (ic->rlive, IC_RESULT (ic)->key); + + if (bitVectIsZero (OP_USES (IC_RESULT (ic_prev)))) + { + bitVectUnSetBit (ic->rlive, IC_RESULT (ic)->key); + bitVectUnSetBit (OP_DEFS (IC_RESULT (ic_prev)), ic_prev->key); + remiCodeFromeBBlock (ebp, ic_prev); + hTabDeleteItem (&iCodehTab, ic_prev->key, ic_prev, DELETE_ITEM, NULL); + } + } + + /* if this is an itemp & result of an address of a true sym + then mark this as rematerialisable */ + if (ic->op == ADDRESS_OF && + IS_ITEMP (IC_RESULT (ic)) && + IS_TRUE_SYMOP (IC_LEFT (ic)) && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1 && + !OP_SYMBOL (IC_LEFT (ic))->onStack) + { + + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + + } + + /* if this is an itemp & used as a pointer + & assigned to a literal then remat */ + if (IS_ASSIGN_ICODE(ic) && + IS_ITEMP(IC_RESULT(ic)) && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1 && + isOperandLiteral(IC_RIGHT(ic))) + { + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + } + + /* if straight assignment then carry remat flag if + this is the only definition */ + if (ic->op == '=' && + !POINTER_SET (ic) && + IS_SYMOP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->remat && + !IS_CAST_ICODE(OP_SYMBOL (IC_RIGHT (ic))->rematiCode) && + !isOperandGlobal(IC_RESULT(ic)) && /* due to bug 1618050 */ + bitVectnBitsOn (OP_SYMBOL (IC_RESULT (ic))->defs) <= 1) + { + OP_SYMBOL (IC_RESULT (ic))->remat = + OP_SYMBOL (IC_RIGHT (ic))->remat; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = + OP_SYMBOL (IC_RIGHT (ic))->rematiCode; + } + + /* if cast to a generic pointer & the pointer being + cast is remat, then we can remat this cast as well */ + if (ic->op == CAST && + IS_SYMOP(IC_RIGHT(ic)) && + !OP_SYMBOL(IC_RESULT(ic))->isreqv && + OP_SYMBOL(IC_RIGHT(ic))->remat ) + { + sym_link *to_type = operandType(IC_LEFT(ic)); + sym_link *from_type = operandType(IC_RIGHT(ic)); + if (IS_GENPTR(to_type) && IS_PTR(from_type)) + { + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + } + } + + /* if this is a +/- operation with a rematerizable + then mark this as rematerializable as well */ + if ((ic->op == '+' || ic->op == '-') && + (IS_SYMOP (IC_LEFT (ic)) && + IS_ITEMP (IC_RESULT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->remat && + (!IS_SYMOP (IC_RIGHT (ic)) || !IS_CAST_ICODE(OP_SYMBOL (IC_RIGHT (ic))->rematiCode)) && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1 && + IS_OP_LITERAL (IC_RIGHT (ic)))) + { + + //int i = operandLitValue(IC_RIGHT(ic)); + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + } + + /* mark the pointer usages */ + if (POINTER_SET (ic) && IS_SYMOP (IC_RESULT (ic))) + OP_SYMBOL (IC_RESULT (ic))->uptr = 1; + + if (POINTER_GET (ic) && IS_SYMOP (IC_LEFT (ic))) + OP_SYMBOL (IC_LEFT (ic))->uptr = 1; + + if (ic->op == RETURN && IS_SYMOP (IC_LEFT(ic))) + OP_SYMBOL (IC_LEFT (ic))->uptr = 1; + + if (ic->op == RECEIVE && ic->argreg == 1 && + IS_SYMOP (IC_RESULT (ic)) && + getSize (operandType(IC_RESULT(ic))) <= 3) + OP_SYMBOL (IC_RESULT(ic))->uptr = 1; + + if (ic->op == SEND && ic->argreg == 1 && + IS_SYMOP(IC_LEFT(ic)) && + getSize (aggrToPtr(operandType(IC_LEFT(ic)),FALSE)) <= 3) + OP_SYMBOL (IC_LEFT(ic))->uptr = 1; + + if (!SKIP_IC2 (ic)) + { + /* if we are using a symbol on the stack + then we should say ds390_ptrRegReq */ + if (options.useXstack && ic->parmPush + && (ic->op == IPUSH || ic->op == IPOP)) + ds390_ptrRegReq++; + if (ic->op == IFX && IS_SYMOP (IC_COND (ic))) + ds390_ptrRegReq += ((OP_SYMBOL (IC_COND (ic))->onStack ? !options.stack10bit : 0) + + OP_SYMBOL (IC_COND (ic))->iaccess + + (SPEC_OCLS(OP_SYMBOL (IC_COND (ic))->etype) == idata)); + else if (ic->op == JUMPTABLE && IS_SYMOP (IC_JTCOND (ic))) + ds390_ptrRegReq += ((OP_SYMBOL (IC_JTCOND (ic))->onStack ? !options.stack10bit : 0) + + OP_SYMBOL (IC_JTCOND (ic))->iaccess + + (SPEC_OCLS(OP_SYMBOL (IC_JTCOND (ic))->etype) == idata)); + else + { + if (IS_SYMOP (IC_LEFT (ic))) + ds390_ptrRegReq += ((OP_SYMBOL (IC_LEFT (ic))->onStack ? !options.stack10bit : 0) + + OP_SYMBOL (IC_LEFT (ic))->iaccess + + (SPEC_OCLS(OP_SYMBOL (IC_LEFT (ic))->etype) == idata)); + if (IS_SYMOP (IC_RIGHT (ic))) + ds390_ptrRegReq += ((OP_SYMBOL (IC_RIGHT (ic))->onStack ? !options.stack10bit : 0) + + OP_SYMBOL (IC_RIGHT (ic))->iaccess + + (SPEC_OCLS(OP_SYMBOL (IC_RIGHT (ic))->etype) == idata)); + if (IS_SYMOP (IC_RESULT (ic))) + ds390_ptrRegReq += ((OP_SYMBOL (IC_RESULT (ic))->onStack ? !options.stack10bit : 0) + + OP_SYMBOL (IC_RESULT (ic))->iaccess + + (SPEC_OCLS(OP_SYMBOL (IC_RESULT (ic))->etype) == idata)); + } + } + + /* if the condition of an if instruction + is defined in the previous instruction and + this is the only usage then + mark the itemp as a conditional */ + if ((IS_CONDITIONAL (ic) || + (IS_BITWISE_OP(ic) && isBitwiseOptimizable (ic))) && + ic->next && ic->next->op == IFX && + bitVectnBitsOn (OP_USES(IC_RESULT(ic)))==1 && + isOperandEqual (IC_RESULT (ic), IC_COND (ic->next)) && + OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq) + { + OP_SYMBOL (IC_RESULT (ic))->regType = REG_CND; + continue; + } +#if 1 + /* reduce for support function calls */ + if (ic->supportRtn || ic->op == '+' || ic->op == '-') + packRegsForSupport (ic, ebp); +#endif + /* some cases the redundant moves can + can be eliminated for return statements . Can be elminated for the first SEND */ + if ((ic->op == RETURN || + ((ic->op == SEND || ic->op == RECEIVE)&& ic->argreg == 1)) && + !isOperandInFarSpace (IC_LEFT (ic)) && + !options.model) { + + packRegsDPTRuse (IC_LEFT (ic)); + } + + if (ic->op == CALL) { + sym_link *ftype = operandType(IC_LEFT(ic)); + if (getSize(operandType(IC_RESULT(ic))) <= 4 && + !IFFUNC_ISBUILTIN(ftype)) { + packRegsDPTRuse (IC_RESULT (ic)); + } + } + + /* if pointer set & left has a size more than + one and right is not in far space */ + if (POINTER_SET (ic) && + !isOperandInFarSpace (IC_RIGHT (ic)) && + IS_SYMOP (IC_RESULT (ic)) && + !OP_SYMBOL (IC_RESULT (ic))->remat && + !IS_OP_RUONLY (IC_RIGHT (ic)) && + getSize (aggrToPtr (operandType (IC_RESULT (ic)), FALSE)) > 1) { + + packRegsDPTRuse (IC_RESULT (ic)); + } + + /* if pointer get */ + if (POINTER_GET (ic) && + !isOperandInFarSpace (IC_RESULT (ic)) && + IS_SYMOP (IC_LEFT (ic)) && + !OP_SYMBOL (IC_LEFT (ic))->remat && + !IS_OP_RUONLY (IC_RESULT (ic)) && + getSize (aggrToPtr (operandType (IC_LEFT (ic)), FALSE)) > 1) { + + packRegsDPTRuse (IC_LEFT (ic)); + } + + /* if this is a cast for intergral promotion then + check if it's the only use of the definition of the + operand being casted/ if yes then replace + the result of that arithmetic operation with + this result and get rid of the cast */ + if (ic->op == CAST) + { + sym_link *fromType = operandType (IC_RIGHT (ic)); + sym_link *toType = operandType (IC_LEFT (ic)); + + if (IS_INTEGRAL (fromType) && IS_INTEGRAL (toType) && + getSize (fromType) != getSize (toType) && + SPEC_USIGN (fromType) == SPEC_USIGN (toType)) + { + + iCode *dic = packRegsDPTRuse (IC_RIGHT (ic)); + if (dic) + { + if (IS_ARITHMETIC_OP (dic)) + { + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + IC_RESULT (dic) = IC_RESULT (ic); + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS(IC_RESULT (dic))=bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + ic = ic->prev; + } + else + OP_SYMBOL (IC_RIGHT (ic))->ruonly = 0; + } + } + else + { + + /* if the type from and type to are the same + then if this is the only use then packit */ + if (compareType (operandType (IC_RIGHT (ic)), + operandType (IC_LEFT (ic))) == 1) + { + iCode *dic = packRegsDPTRuse (IC_RIGHT (ic)); + if (dic) + { + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + IC_RESULT (dic) = IC_RESULT (ic); + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS(IC_RESULT (dic))=bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + ic = ic->prev; + } + } + } + } + + /* pack for PUSH + iTempNN := (some variable in farspace) V1 + push iTempNN ; + ------------- + push V1 + */ + if (ic->op == IPUSH || ic->op == SEND) + { + packForPush (ic, ebpp, blockno); + } + + + /* pack registers for accumulator use, when the + result of an arithmetic or bit wise operation + has only one use, that use is immediately following + the defintion and the using iCode has only one + operand or has two operands but one is literal & + the result of that operation is not on stack then + we can leave the result of this operation in acc:b + combination */ + if ((IS_ARITHMETIC_OP (ic) + || IS_CONDITIONAL(ic) + || IS_BITWISE_OP (ic) + || ic->op == LEFT_OP || ic->op == RIGHT_OP + || (ic->op == ADDRESS_OF && isOperandOnStack (IC_LEFT (ic))) + ) && + IS_ITEMP (IC_RESULT (ic)) && + getSize (operandType (IC_RESULT (ic))) <= 2) + + packRegsForAccUse (ic); + } +} + +/*-----------------------------------------------------------------*/ +/* assignRegisters - assigns registers to each live range as need */ +/*-----------------------------------------------------------------*/ +void +ds390_assignRegisters (ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->bbOrder; + int count = ebbi->count; + iCode *ic; + int i; + + setToNull ((void *) &_G.funcrUsed); + setToNull ((void *) &_G.regAssigned); + setToNull ((void *) &_G.totRegAssigned); + setToNull ((void *) &_G.funcrUsed); + ds390_ptrRegReq = _G.stackExtend = _G.dataExtend = 0; + if ((currFunc && IFFUNC_ISREENT (currFunc->type)) || options.stackAuto) + { + ds390_nBitRegs = 8; + } + else + { + ds390_nBitRegs = 0; + } + ds390_nRegs = 12 + ds390_nBitRegs; + _G.allBitregs = findAllBitregs (); + + if (options.model != MODEL_FLAT24) + options.stack10bit = 0; + /* change assignments this will remove some + live ranges reducing some register pressure */ + for (i = 0; i < count; i++) + packRegisters (ebbs, i); + + /* liveranges probably changed by register packing + so we compute them again */ + recomputeLiveRanges (ebbs, count); + + if (options.dump_pack) + dumpEbbsToFileExt (DUMP_PACK, ebbi); + + /* first determine for each live range the number of + registers & the type of registers required for each */ + regTypeNum (); + + /* and serially allocate registers */ + serialRegAssign (ebbs, count); + + ds390_nRegs = 8; + freeAllRegs (); + fillGaps(); + ds390_nRegs = 12 + ds390_nBitRegs; + + /* if stack was extended then tell the user */ + if (_G.stackExtend) + { +/* werror(W_TOOMANY_SPILS,"stack", */ +/* _G.stackExtend,currFunc->name,""); */ + _G.stackExtend = 0; + } + + if (_G.dataExtend) + { +/* werror(W_TOOMANY_SPILS,"data space", */ +/* _G.dataExtend,currFunc->name,""); */ + _G.dataExtend = 0; + } + + /* after that create the register mask + for each of the instruction */ + createRegMask (ebbs, count); + + /* redo that offsets for stacked automatic variables */ + if (currFunc) + redoStackOffsets (); + + /* make sure r0 & r1 are flagged as used if they might be used */ + /* as pointers */ + if (currFunc && ds390_ptrRegReq) + { + currFunc->regsUsed = bitVectSetBit (currFunc->regsUsed, R0_IDX); + currFunc->regsUsed = bitVectSetBit (currFunc->regsUsed, R1_IDX); + } + + if (options.dump_rassgn) + { + dumpEbbsToFileExt (DUMP_RASSGN, ebbi); + dumpLiveRanges (DUMP_LRANGE, liveRanges); + } + + /* do the overlaysegment stuff SDCCmem.c */ + doOverlays (ebbs, count); + + /* now get back the chain */ + ic = iCodeLabelOptimize (iCodeFromeBBlock (ebbs, count)); + + gen390Code (ic); + + /* free up any _G.stackSpil locations allocated */ + applyToSet (_G.stackSpil, deallocStackSpil); + _G.slocNum = 0; + setToNull ((void *) &_G.stackSpil); + setToNull ((void *) &_G.spiltSet); + /* mark all registers as free */ + ds390_nRegs = 8; + freeAllRegs (); + + return; +} diff --git a/src/ds390/ralloc.h b/src/ds390/ralloc.h new file mode 100644 index 0000000..27a8d92 --- /dev/null +++ b/src/ds390/ralloc.h @@ -0,0 +1,75 @@ +/*------------------------------------------------------------------------- + + SDCCralloc.h - header file register allocation + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "SDCCicode.h" +#include "SDCCBBlock.h" +#ifndef SDCCRALLOC_H +#define SDCCRALLOC_H 1 + +enum + { + R2_IDX = 0, R3_IDX, R4_IDX, R5_IDX, + R6_IDX, R7_IDX, R0_IDX, R1_IDX, + DPL_IDX, DPH_IDX, DPX_IDX, B_IDX, + B0_IDX, B1_IDX, B2_IDX, B3_IDX, + B4_IDX, B5_IDX, B6_IDX, B7_IDX, + X8_IDX, X9_IDX, X10_IDX, X11_IDX, + X12_IDX, CND_IDX, + A_IDX, DPL1_IDX, DPH1_IDX, + DPX1_IDX, DPS_IDX, AP_IDX, + END_IDX + }; + + +#define REG_PTR 0x01 +#define REG_GPR 0x02 +#define REG_CND 0x04 +#define REG_BIT 0x08 +/* definition for the registers */ +typedef struct regs + { + short type; /* can have value + REG_GPR, REG_PTR or REG_CND */ + short rIdx; /* index into register table */ + short otype; + char *name; /* name */ + char *dname; /* name when direct access needed */ + char *base; /* base address */ + short offset; /* offset from the base */ + unsigned isFree:1; /* is currently unassigned */ + int print; /* needs to be printed*/ + } +regs; +extern regs regs390[]; + +regs *ds390_regWithIdx (int); + +bitVect *ds390_rUmaskForOp (operand * op); +bitVect *ds390_allBitregs (void); + +extern int ds390_ptrRegReq; +extern int ds390_nRegs; +extern int ds390_nBitRegs; + +#endif diff --git a/src/ds400/Makefile.in b/src/ds400/Makefile.in new file mode 100644 index 0000000..dfb8a52 --- /dev/null +++ b/src/ds400/Makefile.in @@ -0,0 +1,7 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +# Make all in this directory +include $(srcdir)/../port.mk diff --git a/src/ds400/main.c b/src/ds400/main.c new file mode 100644 index 0000000..8b56e59 --- /dev/null +++ b/src/ds400/main.c @@ -0,0 +1,14 @@ +/* This is currently a stub. The guts of the '400 implementation + * still live in the ds390 directory. + */ + +#include "main.h" + +/* If we don't have at least one exported function, the Solaris + * linker freaks out. + */ + +void ds400_dummyFunc(void) +{ + ; +} diff --git a/src/ds400/main.h b/src/ds400/main.h new file mode 100644 index 0000000..977c86f --- /dev/null +++ b/src/ds400/main.h @@ -0,0 +1,6 @@ +#ifndef DS400_MAIN_H_ +#define DS400_MAIN_H_ + +/* This is a stub file. */ + +#endif diff --git a/src/hc08/Makefile.bcc b/src/hc08/Makefile.bcc new file mode 100644 index 0000000..8370b9f --- /dev/null +++ b/src/hc08/Makefile.bcc @@ -0,0 +1,23 @@ +# Makefile for Borlad C++ + +PRJDIR = ../.. + +OBJ = gen.obj ralloc.obj main.obj +LIB = port.lib + +!include $(PRJDIR)/Bcc.inc +CFLAGS = $(CFLAGS) -I.. -I$(PRJDIR) + +all: $(LIB) + +main.obj: main.c peeph.rul + +$(LIB): $(OBJ) + if exist $(LIB) del $(LIB) + tlib $@ @&&! ++$(**: = &^ ++) +! + +.def.rul: + gawk -f ../SDCCpeeph.awk $< > $@ diff --git a/src/hc08/Makefile.in b/src/hc08/Makefile.in new file mode 100644 index 0000000..dfb8a52 --- /dev/null +++ b/src/hc08/Makefile.in @@ -0,0 +1,7 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +# Make all in this directory +include $(srcdir)/../port.mk diff --git a/src/hc08/gen.c b/src/hc08/gen.c new file mode 100644 index 0000000..694dc86 --- /dev/null +++ b/src/hc08/gen.c @@ -0,0 +1,8708 @@ +/*------------------------------------------------------------------------- + gen.c - source file for code generation for the 68HC08 + + Hacked for the 68HC08 by Erik Petrich (2003) + Adapted from the 8051 code generator by: + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + and - Jean-Louis VERN.jlvern@writeme.com (1999) + Bug Fixes - Wojciech Stryjewski wstryj1@tiger.lsu.edu (1999 v2.1.9a) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + +-------------------------------------------------------------------------*/ + +/* Use the D macro for basic (unobtrusive) debugging messages */ +#define D(x) do if (options.verboseAsm) {x;} while(0) +/* Use the DD macro for detailed debugging messages */ +#define DD(x) +//#define DD(x) x + +#include +#include +#include +#include +#include "SDCCglobl.h" +#include "newalloc.h" + +#include "common.h" +#include "SDCCpeeph.h" +#include "ralloc.h" +#include "gen.h" + +char *aopLiteral (value * val, int offset); +char *aopLiteralLong (value * val, int offset, int size); +extern int allocInfo; +static int pushReg (regs *reg, bool freereg); +static void pullReg (regs *reg); +static void transferAopAop (asmop *srcaop, int srcofs, asmop *dstaop, int dstofs); + +static char *zero = "#0x00"; +static char *one = "#0x01"; +static char *spname; + +char *fReturnhc08[] = +{"a", "x", "_ret2", "_ret3"}; +unsigned fReturnSizeHC08 = 4; /* shared with ralloc.c */ +char **fReturn2 = fReturnhc08; + + +static struct + { + short hxPushed; + short iyPushed; + short accInUse; + short inLine; + short debugLine; + short nRegsSaved; + int stackOfs; + int stackPushes; + short regsinuse; + set *sendSet; + iCode *current_iCode; + } +_G; + +static asmop *hc08_aop_pass[4]; + +extern int hc08_ptrRegReq; +extern int hc08_nRegs; +extern struct dbuf_s *codeOutBuf; +//static void saveRBank (int, iCode *, bool); +static bool operandsEqu (operand * op1, operand * op2); +static void loadRegFromConst (regs *reg, char *c); +static char *aopName (asmop *aop); +static asmop * newAsmop (short type); +static char * aopAdrStr (asmop * aop, int loffset, bool bit16); +#define RESULTONSTACK(x) \ + (IC_RESULT(x) && IC_RESULT(x)->aop && \ + IC_RESULT(x)->aop->type == AOP_STK ) + +#define IS_AOP_HX(x) \ + (((x)->type == AOP_REG) \ + && ((x)->aopu.aop_reg[0] == hc08_reg_x) \ + && ((x)->aopu.aop_reg[1] == hc08_reg_h) ) + +#define IS_AOP_XA(x) \ + (((x)->type == AOP_REG) \ + && ((x)->aopu.aop_reg[0] == hc08_reg_a) \ + && ((x)->aopu.aop_reg[1] == hc08_reg_x) ) + +#define IS_AOP_A(x) \ + (((x)->type == AOP_REG) \ + && ((x)->aopu.aop_reg[0] == hc08_reg_a) \ + && ((x)->size == 1) ) + +#define IS_AOP_X(x) \ + (((x)->type == AOP_REG) \ + && ((x)->aopu.aop_reg[0] == hc08_reg_x) \ + && ((x)->size == 1) ) + +#define IS_AOP_H(x) \ + (((x)->type == AOP_REG) \ + && ((x)->aopu.aop_reg[0] == hc08_reg_h) \ + && ((x)->size == 1) ) + +#define CLRC emitcode("clc","") + +static lineNode *lineHead = NULL; +static lineNode *lineCurr = NULL; + +#if 0 +static unsigned char SLMask[] = +{0xFF, 0xFE, 0xFC, 0xF8, 0xF0, + 0xE0, 0xC0, 0x80, 0x00}; +static unsigned char SRMask[] = +{0xFF, 0x7F, 0x3F, 0x1F, 0x0F, + 0x07, 0x03, 0x01, 0x00}; +#endif + +#define LSB 0 +#define MSB16 1 +#define MSB24 2 +#define MSB32 3 + +#define AOP(op) op->aop +#define AOP_TYPE(op) AOP(op)->type +#define AOP_SIZE(op) AOP(op)->size +#define AOP_OP(aop) aop->op + + +/*-----------------------------------------------------------------*/ +/* emitcode - writes the code into a file : for now it is simple */ +/*-----------------------------------------------------------------*/ +static void +emitcode (char *inst, char *fmt,...) +{ + va_list ap; + char lb[INITIAL_INLINEASM]; + char *lbp = lb; + + va_start (ap, fmt); + + if (inst && *inst) + { + if (fmt && *fmt) + sprintf (lb, "%s\t", inst); + else + sprintf (lb, "%s", inst); + vsprintf (lb + (strlen (lb)), fmt, ap); + } + else + vsprintf (lb, fmt, ap); + + while (isspace ((unsigned char)*lbp)) + lbp++; + + if (lbp && *lbp) + lineCurr = (lineCurr ? + connectLine (lineCurr, newLineNode (lb)) : + (lineHead = newLineNode (lb))); + lineCurr->isInline = _G.inLine; + lineCurr->isDebug = _G.debugLine; + lineCurr->ic = _G.current_iCode; + lineCurr->isComment = (*lbp==';'); + + //printf("%s\n", lb); + va_end (ap); +} + +static void +emitBranch (char *branchop, symbol *tlbl) +{ + emitcode (branchop, "%05d$", (tlbl->key + 100)); +} + +static void +emitLabel (symbol *tlbl) +{ + emitcode ("", "%05d$:", (tlbl->key +100)); + lineCurr->isLabel = 1; +} + +/*-----------------------------------------------------------------*/ +/* hc08_emitDebuggerSymbol - associate the current code location */ +/* with a debugger symbol */ +/*-----------------------------------------------------------------*/ +void +hc08_emitDebuggerSymbol (char * debugSym) +{ + _G.debugLine = 1; + emitcode ("", "%s ==.", debugSym); + _G.debugLine = 0; +} + + +/*--------------------------------------------------------------------------*/ +/* transferRegReg - Transfer from register(s) sreg to register(s) dreg. If */ +/* freesrc is true, sreg is marked free and available for */ +/* reuse. sreg and dreg must be of equal size */ +/*--------------------------------------------------------------------------*/ +static void +transferRegReg (regs *sreg, regs *dreg, bool freesrc) +{ + int srcidx; + int dstidx; + char error = 0; + + /* Nothing to do if no destination. */ + if (!dreg) + return; + + /* But it's definately an error if there's no source. */ + if (!sreg) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "NULL sreg in transferRegReg"); + return; + } + + DD(emitcode ("", "; transferRegReg(%s,%s)", + sreg->name, dreg->name)); + + srcidx = sreg->rIdx; + dstidx = dreg->rIdx; + + if (srcidx==dstidx) + return; + + switch (dstidx) + { + case A_IDX: + switch (srcidx) + { + case H_IDX: /* H to A */ + pushReg (hc08_reg_h, FALSE); + pullReg (hc08_reg_a); + break; + case X_IDX: /* X to A */ + emitcode ("txa", ""); + break; + default: + error=1; + } + break; + case H_IDX: + switch (srcidx) + { + case A_IDX: /* A to H */ + pushReg (hc08_reg_a, FALSE); + pullReg (hc08_reg_h); + break; + case X_IDX: /* X to H */ + pushReg (hc08_reg_x, FALSE); + pullReg (hc08_reg_h); + break; + default: + error=1; + } + break; + case X_IDX: + switch (srcidx) + { + case A_IDX: /* A to X */ + emitcode ("tax", ""); + break; + case H_IDX: /* H to X */ + pushReg (hc08_reg_h, FALSE); + pullReg (hc08_reg_x); + break; + default: + error=1; + } + break; + case HX_IDX: + switch (srcidx) + { + case XA_IDX: /* XA to HX */ + pushReg (hc08_reg_x, FALSE); + pullReg (hc08_reg_h); + emitcode ("tax", ""); + break; + default: + error=1; + } + break; + case XA_IDX: + switch (srcidx) + { + case HX_IDX: /* HX to XA */ + emitcode ("txa", ""); + pushReg (hc08_reg_h, FALSE); + pullReg (hc08_reg_x); + break; + default: + error=1; + } + break; + default: + error=1; + } + + wassertl (!error, "bad combo in transferRegReg"); + + if (freesrc) + hc08_freeReg(sreg); + + dreg->aop = sreg->aop; + dreg->aopofs = sreg->aopofs; + dreg->isFree = FALSE; + hc08_useReg(dreg); +} + +/*--------------------------------------------------------------------------*/ +/* updateCFA - update the debugger information to reflect the current */ +/* connonical frame address relative to the stack pointer */ +/*--------------------------------------------------------------------------*/ +static void +updateCFA(void) +{ + /* there is no frame unless there is a function */ + if (!currFunc) + return; + + debugFile->writeFrameAddress (NULL, hc08_reg_sp, + 1 + _G.stackOfs + _G.stackPushes); +} + +/*--------------------------------------------------------------------------*/ +/* pushReg - Push register reg onto the stack. If freereg is true, reg is */ +/* marked free and available for reuse. */ +/*--------------------------------------------------------------------------*/ +static int +pushReg (regs *reg, bool freereg) +{ + int regidx = reg->rIdx; + + switch (regidx) + { + case A_IDX: + emitcode ("psha", ""); + _G.stackPushes++; + updateCFA(); + break; + case X_IDX: + emitcode ("pshx", ""); + _G.stackPushes++; + updateCFA(); + break; + case H_IDX: + emitcode ("pshh", ""); + _G.stackPushes++; + updateCFA(); + break; + case HX_IDX: + emitcode ("pshx", ""); + _G.stackPushes++; + updateCFA(); + emitcode ("pshh", ""); + _G.stackPushes++; + updateCFA(); + break; + case XA_IDX: + emitcode ("psha", ""); + updateCFA(); + _G.stackPushes++; + emitcode ("pshx", ""); + updateCFA(); + _G.stackPushes++; + break; + default: + break; + } + if (freereg) + hc08_freeReg(reg); + return -_G.stackOfs-_G.stackPushes; +} + +/*--------------------------------------------------------------------------*/ +/* pullReg - Pull register reg off the stack. */ +/*--------------------------------------------------------------------------*/ +static void +pullReg (regs *reg) +{ + int regidx = reg->rIdx; + + switch (regidx) + { + case A_IDX: + emitcode ("pula", ""); + _G.stackPushes--; + updateCFA(); + break; + case X_IDX: + emitcode ("pulx", ""); + _G.stackPushes--; + updateCFA(); + break; + case H_IDX: + emitcode ("pulh", ""); + _G.stackPushes--; + updateCFA(); + break; + case HX_IDX: + emitcode ("pulh", ""); + _G.stackPushes--; + updateCFA(); + emitcode ("pulx", ""); + _G.stackPushes--; + updateCFA(); + break; + case XA_IDX: + emitcode ("pulx", ""); + _G.stackPushes--; + updateCFA(); + emitcode ("pula", ""); + _G.stackPushes--; + updateCFA(); + break; + default: + break; + } + hc08_useReg(reg); + hc08_dirtyReg(reg, FALSE); +} + +/*--------------------------------------------------------------------------*/ +/* pullNull - Discard n bytes off the top of the stack */ +/*--------------------------------------------------------------------------*/ +static void +pullNull (int n) +{ + if (n) + { + emitcode("ais","#%d",n); + _G.stackPushes -= n; + updateCFA(); + } +} + +/*--------------------------------------------------------------------------*/ +/* pushRegIfUsed - Push register reg if marked in use. Returns true if the */ +/* push was performed, false otherwise. */ +/*--------------------------------------------------------------------------*/ +static bool +pushRegIfUsed (regs *reg) +{ + if (!reg->isFree) + { + pushReg (reg, TRUE); + return TRUE; + } + else + return FALSE; +} + +/*--------------------------------------------------------------------------*/ +/* pullOrFreeReg - If needpull is true, register reg is pulled from the */ +/* stack. Otherwise register reg is marked as free. */ +/*--------------------------------------------------------------------------*/ +static void +pullOrFreeReg (regs *reg, bool needpull) +{ + if (needpull) + pullReg (reg); + else + hc08_freeReg (reg); +} + +/*--------------------------------------------------------------------------*/ +/* adjustStack - Adjust the stack pointer by n bytes. */ +/*--------------------------------------------------------------------------*/ +static void +adjustStack (int n) +{ + while (n) + { + if (n>127) + { + emitcode ("ais","#127"); + n -= 127; + _G.stackPushes -= 127; + updateCFA(); + } + else if (n<-128) + { + emitcode ("ais","#-128"); + n += 128; + _G.stackPushes += 128; + updateCFA(); + } + else + { + emitcode ("ais", "#%d", n); + _G.stackPushes -= n; + n = 0; + updateCFA(); + } + } +} + + +/*--------------------------------------------------------------------------*/ +/* aopName - Return a string with debugging information about an asmop. */ +/*--------------------------------------------------------------------------*/ +static char * +aopName (asmop *aop) +{ + static char buffer[256]; + char *buf = buffer; + + if (!aop) + return "(asmop*)NULL"; + + switch (aop->type) + { + case AOP_IMMD: + sprintf (buf,"IMMD(%s)", aop->aopu.aop_immd.aop_immd1); + return buf; + case AOP_LIT: + sprintf (buf,"LIT(%s)", aopLiteral (aop->aopu.aop_lit, 0)); + return buf; + case AOP_DIR: + sprintf (buf,"DIR(%s)", aop->aopu.aop_dir); + return buf; + case AOP_EXT: + sprintf (buf,"EXT(%s)", aop->aopu.aop_dir); + return buf; + case AOP_SOF: + sprintf (buf,"SOF(%s)", OP_SYMBOL (aop->op)->name); + return buf; + case AOP_REG: + sprintf (buf, "REG(%s,%s,%s,%s)", + aop->aopu.aop_reg[3] ? aop->aopu.aop_reg[3]->name : "-", + aop->aopu.aop_reg[2] ? aop->aopu.aop_reg[2]->name : "-", + aop->aopu.aop_reg[1] ? aop->aopu.aop_reg[1]->name : "-", + aop->aopu.aop_reg[0] ? aop->aopu.aop_reg[0]->name : "-"); + return buf; + case AOP_STK: + return "STK"; + case AOP_STR: + return "STR"; + default: + sprintf (buf,"?%d", aop->type); + return buf; + } + + return "?"; +} + + +/*--------------------------------------------------------------------------*/ +/* loadRegFromAop - Load register reg from logical offset loffset of aop. */ +/*--------------------------------------------------------------------------*/ +static void +loadRegFromAop (regs *reg, asmop *aop, int loffset) +{ + int regidx = reg->rIdx; + + if (aop->stacked && aop->stk_aop[loffset]) + { + loadRegFromAop (reg, aop->stk_aop[loffset], 0); + return; + } + +#if 0 + printf("loadRegFromAop called\n"); + if (!reg) + { + printf(" reg = NULL\n"); + return; + } + printf(" reg = %s\n", reg->name); + if (!aop) + { + printf(" aop = NULL\n"); + return; + } + printf(" aop->type = %d\n", aop->type); + printf(" loffset = %d\n", loffset); + + if (aop->op) + printf(" aop has operand link\n"); + else + printf(" aop missing operand link\n"); + if (reg->aop) + printf(" reg has operand link\n"); + else + printf(" reg missing operand link\n"); +#endif + + DD(emitcode ("", "; loadRegFromAop (%s, %s, %d)", + reg->name, aopName (aop), loffset)); + + /* If operand is volatile, we cannot optimize. */ + if (!aop->op || isOperandVolatile (aop->op, FALSE)) + goto forceload; + + + /* If this register already has this offset of the operand + then we need only mark it as in use. */ + if (reg->aop && reg->aop->op && aop->op + && operandsEqu(reg->aop->op,aop->op) + && (reg->aopofs == loffset)) + { + hc08_useReg(reg); + DD(emitcode ("","; already had correct value for %s", reg->name)); + return; + } + + /* TODO: check to see if we can transfer from another register */ + + if (hc08_reg_h->aop && hc08_reg_h->aop->op && aop->op + && operandsEqu(hc08_reg_h->aop->op,aop->op) + && (hc08_reg_h->aopofs == loffset)) + { + DD(emitcode ("","; found correct value for %s in h", reg->name)); + transferRegReg (hc08_reg_h, reg, FALSE); + hc08_useReg (reg); + return; + } + + + if (hc08_reg_x->aop && hc08_reg_x->aop->op && aop->op + && operandsEqu(hc08_reg_x->aop->op,aop->op) + && (hc08_reg_x->aopofs == loffset)) + { + DD(emitcode ("","; found correct value for %s in x", reg->name)); + transferRegReg (hc08_reg_x, reg, FALSE); + hc08_useReg (reg); + return; + } + + if (hc08_reg_a->aop && hc08_reg_a->aop->op && aop->op + && operandsEqu(hc08_reg_a->aop->op,aop->op) + && (hc08_reg_a->aopofs == loffset)) + { + DD(emitcode ("","; found correct value for %s in a", reg->name)); + transferRegReg (hc08_reg_a, reg, FALSE); + hc08_useReg (reg); + return; + } + +forceload: + + switch (regidx) + { + case A_IDX: + if (aop->type == AOP_REG) + { + if (loffset < aop->size) + transferRegReg(aop->aopu.aop_reg[loffset], reg, FALSE); + else + emitcode ("clra", ""); /* TODO: handle sign extension */ + } + else + { + char * l = aopAdrStr (aop, loffset, FALSE); + if (!strcmp (l, zero)) + emitcode ("clra", ""); + else + emitcode ("lda", "%s", l); + } + break; + case X_IDX: + if (aop->type == AOP_REG) + { + if (loffset < aop->size) + transferRegReg(aop->aopu.aop_reg[loffset], reg, FALSE); + else + emitcode ("clrx", ""); /* TODO: handle sign extension */ + } + else + { + char * l = aopAdrStr (aop, loffset, FALSE); + if (!strcmp (l, zero)) + emitcode ("clrx", ""); + else + emitcode ("ldx", "%s", l); + } + break; + case H_IDX: + { + char * l = aopAdrStr (aop, loffset, FALSE); + if (!strcmp (l, zero)) + { + emitcode ("clrh", ""); + break; + } + } + if (hc08_reg_a->isFree) + { + loadRegFromAop (hc08_reg_a, aop, loffset); + transferRegReg (hc08_reg_a, hc08_reg_h, TRUE); + } + else if (hc08_reg_x->isFree) + { + loadRegFromAop (hc08_reg_x, aop, loffset); + transferRegReg (hc08_reg_x, hc08_reg_h, TRUE); + } + else + { + pushReg (hc08_reg_a, TRUE); + loadRegFromAop (hc08_reg_a, aop, loffset); + transferRegReg (hc08_reg_a, hc08_reg_h, TRUE); + pullReg (hc08_reg_a); + } + break; + case HX_IDX: + if (IS_AOP_HX(aop)) + break; + else if (IS_AOP_XA(aop)) + transferRegReg (hc08_reg_xa, hc08_reg_hx, FALSE); + else if ((aop->type == AOP_DIR)) + { + if (aop->size>(loffset+1)) + emitcode ("ldhx","%s", aopAdrStr (aop, loffset+1, TRUE)); + else + { + loadRegFromAop (hc08_reg_x, aop, loffset); + loadRegFromConst (hc08_reg_h, zero); + } + } + else if ((aop->type == AOP_LIT) || (aop->type == AOP_IMMD)) + { + emitcode ("ldhx","%s", aopAdrStr (aop, loffset, TRUE)); + } + else + { + bool needpula; + needpula = pushRegIfUsed (hc08_reg_a); + loadRegFromAop (hc08_reg_a, aop, loffset+1); + loadRegFromAop (hc08_reg_x, aop, loffset); + transferRegReg (hc08_reg_a, hc08_reg_h, TRUE); + pullOrFreeReg (hc08_reg_a, needpula); + } + break; + case XA_IDX: + if (IS_AOP_XA(aop)) + break; + else if (IS_AOP_HX(aop)) + transferRegReg (hc08_reg_hx, hc08_reg_xa, FALSE); + else + { + loadRegFromAop (hc08_reg_a, aop, loffset); + loadRegFromAop (hc08_reg_x, aop, loffset+1); + } + break; + } + +// ignore caching for now +#if 0 + reg->aop = aop; + reg->aopofs = loffset; +#endif +} + + +/*--------------------------------------------------------------------------*/ +/* forceStackedAop - Reserve space on the stack for asmop aop; when */ +/* freeAsmop is called with aop, the stacked data will */ +/* be copied to the original aop location. */ +/*--------------------------------------------------------------------------*/ +static asmop * +forceStackedAop (asmop *aop, bool copyOrig) +{ + regs *reg; + int loffset; + asmop *newaop = newAsmop (aop->type); + memcpy (newaop, aop, sizeof(*newaop)); + + DD(emitcode("", "; forcedStackAop %s", aopName(aop))); + + if (copyOrig && hc08_reg_a->isFree) + reg = hc08_reg_a; + else if (copyOrig && hc08_reg_x->isFree) + reg = hc08_reg_x; + else + reg = NULL; + + for (loffset=0; loffset < newaop->size; loffset++) + { + asmop *aopsof = newAsmop (AOP_SOF); + aopsof->size = 1; + if (copyOrig && reg) + { + loadRegFromAop (reg, aop, loffset); + aopsof->aopu.aop_stk = pushReg (reg, FALSE); + } + else + { + aopsof->aopu.aop_stk = pushReg (hc08_reg_a, FALSE); + } + aopsof->op = aop->op; + newaop->stk_aop[loffset] = aopsof; + } + newaop->stacked = 1; + + if (!reg && copyOrig) + { + for (loffset=0; loffset < newaop->size; loffset++) + { + transferAopAop (aop, loffset, newaop, loffset); + } + } + + return newaop; +} + + +/*--------------------------------------------------------------------------*/ +/* storeRegToAop - Store register reg to logical offset loffset of aop. */ +/*--------------------------------------------------------------------------*/ +static void +storeRegToAop (regs *reg, asmop *aop, int loffset) +{ + int regidx = reg->rIdx; + #if 0 + regs *otherreg; + int otheridx; + #endif + + DD(emitcode ("", "; storeRegToAop (%s, %s, %d), stacked=%d, isaddr=%d", + reg->name, aopName (aop), loffset, aop->stacked, aop->isaddr)); + + if ((reg->rIdx == HX_IDX) && aop->stacked + && (aop->stk_aop[loffset] || aop->stk_aop[loffset+1])) + { + storeRegToAop (hc08_reg_h, aop, loffset+1); + storeRegToAop (hc08_reg_x, aop, loffset); + return; + } + + if ((reg->rIdx == XA_IDX) && aop->stacked + && (aop->stk_aop[loffset] || aop->stk_aop[loffset+1])) + { + storeRegToAop (hc08_reg_x, aop, loffset+1); + storeRegToAop (hc08_reg_a, aop, loffset); + return; + } + + if (aop->stacked && aop->stk_aop[loffset]) + { + storeRegToAop (reg, aop->stk_aop[loffset], 0); + return; + } + + if (aop->type == AOP_STR) + { + if (loffset==0) + transferRegReg (reg, hc08_reg_x, FALSE); + else if (loffset==1) + transferRegReg (reg, hc08_reg_h, FALSE); + return; + } + + if (aop->type == AOP_DUMMY) + return; + + if (aop->type == AOP_CRY) /* This can only happen if IFX was optimized */ + return; /* away, so just toss the result */ + + switch (regidx) + { + case A_IDX: + if ((aop->type == AOP_REG) && (loffset < aop->size)) + transferRegReg(reg, aop->aopu.aop_reg[loffset], FALSE); + else + emitcode ("sta","%s", aopAdrStr (aop, loffset, FALSE)); + break; + case X_IDX: + if ((aop->type == AOP_REG) && (loffset < aop->size)) + transferRegReg(reg, aop->aopu.aop_reg[loffset], FALSE); + else + emitcode ("stx","%s", aopAdrStr (aop, loffset, FALSE)); + break; + case H_IDX: + if (hc08_reg_a->isFree) + { + transferRegReg (hc08_reg_h, hc08_reg_a, FALSE); + storeRegToAop (hc08_reg_a, aop, loffset); + hc08_freeReg (hc08_reg_a); + } + else if (hc08_reg_x->isFree) + { + transferRegReg (hc08_reg_h, hc08_reg_x, FALSE); + storeRegToAop (hc08_reg_x, aop, loffset); + hc08_freeReg (hc08_reg_x); + } + else + { + pushReg (hc08_reg_a, TRUE); + transferRegReg (hc08_reg_h, hc08_reg_a, FALSE); + storeRegToAop (hc08_reg_a, aop, loffset); + pullReg (hc08_reg_a); + } + break; + case HX_IDX: + if ((aop->type == AOP_DIR) ) + { + emitcode("sthx","%s", aopAdrStr (aop, loffset+1, TRUE)); + } + else if (IS_AOP_XA(aop)) + transferRegReg(reg, hc08_reg_xa, FALSE); + else if (IS_AOP_HX(aop)) + break; + else + { + bool needpula; + needpula = pushRegIfUsed (hc08_reg_a); + transferRegReg (hc08_reg_h, hc08_reg_a, FALSE); + storeRegToAop (hc08_reg_a, aop, loffset+1); + storeRegToAop (hc08_reg_x, aop, loffset); + pullOrFreeReg (hc08_reg_a, needpula); + } + break; + case XA_IDX: + if (IS_AOP_HX(aop)) + transferRegReg(reg, hc08_reg_hx, FALSE); + else if (IS_AOP_XA(aop)) + break; + else + { + storeRegToAop (hc08_reg_a, aop, loffset); + storeRegToAop (hc08_reg_x, aop, loffset+1); + } + break; + } + +/* Disable the register tracking for now */ +#if 0 + //if (!reg->aop || (reg->aop && (reg->aop != aop))) + { + //if (reg->aop!=aop) + for (otheridx=0;otheridxaop + && otherreg->aop->op && aop->op + && operandsEqu(otherreg->aop->op,aop->op) + && (otherreg->aopofs == loffset)) + { + DD(emitcode("","; marking %s stale", otherreg->name)); + otherreg->aop=NULL; + } + } + if ((!hc08_reg_x->aop || !hc08_reg_h->aop) && hc08_reg_hx->aop) + { + hc08_reg_hx->aop = NULL; + DD(emitcode("","; marking hx stale")); + } + if ((!hc08_reg_x->aop || !hc08_reg_a->aop) && hc08_reg_xa->aop) + { + hc08_reg_xa->aop = NULL; + DD(emitcode("","; marking xa stale")); + } + + reg->aop = aop; + reg->aopofs = loffset; + } +#endif +} + +/*--------------------------------------------------------------------------*/ +/* loadRegFromConst - Load register reg from constant c. */ +/*--------------------------------------------------------------------------*/ +static void +loadRegFromConst (regs *reg, char *c) +{ + switch (reg->rIdx) + { + case A_IDX: + if (!strcmp(c,zero)) + emitcode ("clra", ""); + else + emitcode ("lda", "%s", c); + break; + case X_IDX: + if (!strcmp(c,zero)) + emitcode ("clrx", ""); + else + emitcode ("ldx", "%s", c); + break; + case H_IDX: + if (!strcmp(c,zero)) + emitcode ("clrh", ""); + else if (hc08_reg_a->isFree) + { + loadRegFromConst (hc08_reg_a, c); + transferRegReg (hc08_reg_a, hc08_reg_h, TRUE); + } + else if (hc08_reg_x->isFree) + { + loadRegFromConst (hc08_reg_x, c); + transferRegReg (hc08_reg_x, hc08_reg_h, TRUE); + } + else + { + pushReg (hc08_reg_a, TRUE); + loadRegFromConst (hc08_reg_a, c); + transferRegReg (hc08_reg_a, hc08_reg_h, TRUE); + pullReg (hc08_reg_a); + } + break; + case HX_IDX: + emitcode ("ldhx", "%s", c); + break; + case XA_IDX: + emitcode ("lda", "%s", c); + emitcode ("ldx", "%s >> 8", c); + break; + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "Bad rIdx in loadRegFromConst"); + return; + } + hc08_useReg (reg); +} + + +/*--------------------------------------------------------------------------*/ +/* storeConstToAop- Store constant c to logical offset loffset of asmop aop.*/ +/*--------------------------------------------------------------------------*/ +static void +storeConstToAop (char *c, asmop *aop, int loffset) +{ + if (aop->stacked && aop->stk_aop[loffset]) + { + storeConstToAop (c, aop->stk_aop[loffset], 0); + return; + } + + switch (aop->type) + { + case AOP_DIR: + if (!strcmp(c,zero)) + emitcode ("clr", "%s", aopAdrStr (aop, loffset, FALSE)); + else + emitcode ("mov", "%s,%s", c, aopAdrStr (aop, loffset, FALSE)); + break; + case AOP_REG: + if (loffset>(aop->size-1)) + break; + loadRegFromConst (aop->aopu.aop_reg[loffset], c); + break; + case AOP_DUMMY: + break; + default: + if (hc08_reg_a->isFree) + { + loadRegFromConst (hc08_reg_a, c); + storeRegToAop( hc08_reg_a, aop, loffset); + hc08_freeReg (hc08_reg_a); + } + else if (hc08_reg_x->isFree) + { + loadRegFromConst (hc08_reg_x, c); + storeRegToAop( hc08_reg_x, aop, loffset); + hc08_freeReg (hc08_reg_x); + } + else + { + pushReg (hc08_reg_a, TRUE); + loadRegFromConst (hc08_reg_a, c); + storeRegToAop( hc08_reg_a, aop, loffset); + pullReg (hc08_reg_a); + } + } +} + + +/*--------------------------------------------------------------------------*/ +/* storeRegSignToUpperAop - If isSigned is true, the sign bit of register */ +/* reg is extended to fill logical offsets loffset */ +/* and above of asmop aop. Otherwise, logical */ +/* offsets loffset and above of asmop aop are */ +/* zeroed. reg must be an 8-bit register. */ +/*--------------------------------------------------------------------------*/ +static void +storeRegSignToUpperAop (regs *reg, asmop *aop, int loffset, bool isSigned) +{ +// int regidx = reg->rIdx; + int size = aop->size; + + if (size<=loffset) + return; + + if (!isSigned) + { + /* Unsigned case */ + while (loffsetrIdx; + int size = aop->size; + + switch (regidx) + { + case A_IDX: + case X_IDX: + case H_IDX: + storeRegToAop (reg, aop, 0); + storeRegSignToUpperAop (reg, aop, 1, isSigned); + break; + case HX_IDX: + if (size==1) + { + storeRegToAop (hc08_reg_x, aop, 0); + } + else + { + storeRegToAop (reg, aop, 0); + storeRegSignToUpperAop (hc08_reg_h, aop, 2, isSigned); + } + break; + case XA_IDX: + if (size==1) + { + storeRegToAop (hc08_reg_a, aop, 0); + } + else + { + storeRegToAop (reg, aop, 0); + storeRegSignToUpperAop (hc08_reg_x, aop, 2, isSigned); + } + break; + } +} + +/*--------------------------------------------------------------------------*/ +/* transferAopAop - Transfer the value at logical offset srcofs of asmop */ +/* srcaop to logical offset dstofs of asmop dstaop. */ +/*--------------------------------------------------------------------------*/ +static void +transferAopAop (asmop *srcaop, int srcofs, asmop *dstaop, int dstofs) +{ + bool needpula = FALSE; + regs *reg = NULL; + int regIdx; + bool keepreg = FALSE; + + /* ignore transfers at the same byte, unless its volatile */ + if (srcaop->op && !isOperandVolatile (srcaop->op, FALSE) + && dstaop->op && !isOperandVolatile (dstaop->op, FALSE) + && operandsEqu(srcaop->op, dstaop->op) && srcofs == dstofs + && dstaop->type == srcaop->type) + return; + + if (srcaop->stacked && srcaop->stk_aop[srcofs]) + { + transferAopAop (srcaop->stk_aop[srcofs], 0, dstaop, dstofs); + return; + } + + if (dstaop->stacked && dstaop->stk_aop[srcofs]) + { + transferAopAop (srcaop, srcofs, dstaop->stk_aop[dstofs], 0); + return; + } + +// DD(emitcode ("", "; transferAopAop (%s, %d, %s, %d)", +// aopName (srcaop), srcofs, aopName (dstaop), dstofs)); +// DD(emitcode ("", "; srcaop->type = %d", srcaop->type)); +// DD(emitcode ("", "; dstaop->type = %d", dstaop->type)); + + if (dstofs >= dstaop->size) + return; + + if ((dstaop->type == AOP_DIR) + && ((srcaop->type == AOP_DIR) || (srcaop->type == AOP_LIT)) ) + { + if (srcaop->type == AOP_LIT) + { + unsigned long lit; + unsigned long bytemask; + + lit = ulFromVal (srcaop->aopu.aop_lit); + bytemask = (lit >> (srcofs*8)) & 0xff; + + if (bytemask == 0) + { + emitcode ("clr", "%s", aopAdrStr(dstaop, dstofs, FALSE)); + return; + } + } + + emitcode("mov", "%s,%s", aopAdrStr(srcaop, srcofs, FALSE), + aopAdrStr(dstaop, dstofs, FALSE)); + return; + } + + if (dstaop->type == AOP_REG) + { + regIdx = dstaop->aopu.aop_reg[dstofs]->rIdx; + if ((regIdx == A_IDX) || (regIdx == X_IDX)) + { + reg = dstaop->aopu.aop_reg[dstofs]; + keepreg = TRUE; + } + } + + if ((srcaop->type == AOP_REG) && (srcaop->aopu.aop_reg[srcofs])) + { + regIdx = srcaop->aopu.aop_reg[srcofs]->rIdx; + if ((regIdx == A_IDX) || (regIdx == X_IDX)) + { + reg = srcaop->aopu.aop_reg[srcofs]; + keepreg = TRUE; + } + } + + if (!reg) + { + if (hc08_reg_a->isFree) + reg = hc08_reg_a; + else if (hc08_reg_x->isFree) + reg = hc08_reg_x; + else + { + pushReg (hc08_reg_a, TRUE); + needpula = TRUE; + reg = hc08_reg_a; + } + } + + loadRegFromAop (reg, srcaop, srcofs); + storeRegToAop (reg, dstaop, dstofs); + + if (!keepreg) + pullOrFreeReg (hc08_reg_a, needpula); +} + + +/*--------------------------------------------------------------------------*/ +/* accopWithMisc - Emit accumulator modifying instruction accop with the */ +/* parameter param. */ +/*--------------------------------------------------------------------------*/ +static void +accopWithMisc (char *accop, char *param) +{ + emitcode (accop, "%s", param); + hc08_dirtyReg (hc08_reg_a, FALSE); +} + +/*--------------------------------------------------------------------------*/ +/* accopWithAop - Emit accumulator modifying instruction accop with the */ +/* byte at logical offset loffset of asmop aop. */ +/* Supports: adc, add, and, bit, cmp, eor, ora, sbc, sub */ +/*--------------------------------------------------------------------------*/ +static void +accopWithAop (char *accop, asmop *aop, int loffset) +{ + if (aop->stacked && aop->stk_aop[loffset]) + { + accopWithAop (accop, aop->stk_aop[loffset], 0); + return; + } + + if (aop->type == AOP_DUMMY) + return; + + if (aop->type == AOP_REG) + { + pushReg (aop->aopu.aop_reg[loffset], FALSE); + emitcode (accop, "1,s"); + pullNull (1); + } + else + emitcode (accop, "%s", aopAdrStr (aop, loffset, FALSE)); + + hc08_dirtyReg (hc08_reg_a, FALSE); +} + + +/*--------------------------------------------------------------------------*/ +/* rmwWithReg - Emit read/modify/write instruction rmwop with register reg. */ +/* byte at logical offset loffset of asmop aop. Register reg */ +/* must be 8-bit. */ +/* Supports: com, dec, inc, lsl, lsr, neg, rol, ror */ +/*--------------------------------------------------------------------------*/ +static void +rmwWithReg (char *rmwop, regs *reg) +{ + char rmwbuf[10]; + char *rmwaop = rmwbuf; + + if (reg->rIdx == A_IDX) + { + sprintf(rmwaop,"%sa", rmwop); + emitcode (rmwaop, ""); + hc08_dirtyReg (hc08_reg_a, FALSE); + } + else if (reg->rIdx == X_IDX) + { + sprintf(rmwaop,"%sx", rmwop); + emitcode (rmwaop, ""); + hc08_dirtyReg (hc08_reg_a, FALSE); + } + else if (hc08_reg_a->isFree) + { + transferRegReg(reg, hc08_reg_a, FALSE); + sprintf(rmwaop,"%sa", rmwop); + emitcode (rmwaop, ""); + hc08_dirtyReg (hc08_reg_a, FALSE); + transferRegReg(hc08_reg_a, reg, TRUE); + } + else + { + pushReg (reg, FALSE); + emitcode (rmwop, "1,s"); + pullReg (reg); + hc08_dirtyReg (reg, FALSE); + } +} + +/*--------------------------------------------------------------------------*/ +/* accopWithAop - Emit read/modify/write instruction rmwop with the byte at */ +/* logical offset loffset of asmop aop. */ +/* Supports: com, dec, inc, lsl, lsr, neg, rol, ror, tst */ +/*--------------------------------------------------------------------------*/ +static void +rmwWithAop (char *rmwop, asmop *aop, int loffset) +{ + bool needpula = FALSE; + + if (aop->stacked && aop->stk_aop[loffset]) + { + rmwWithAop (rmwop, aop->stk_aop[loffset], 0); + return; + } + + switch (aop->type) + { + case AOP_REG: + rmwWithReg (rmwop, aop->aopu.aop_reg[loffset]); + break; + case AOP_EXT: + needpula = pushRegIfUsed (hc08_reg_a); + loadRegFromAop (hc08_reg_a, aop, loffset); + rmwWithReg (rmwop, hc08_reg_a); + if (strcmp ("tst", rmwop)) + storeRegToAop (hc08_reg_a, aop, loffset); + pullOrFreeReg (hc08_reg_a, needpula); + break; + case AOP_DUMMY: + break; + default: + emitcode (rmwop, "%s", aopAdrStr (aop, loffset, FALSE)); + } + +} + + +/*-----------------------------------------------------------------*/ +/* newAsmop - creates a new asmOp */ +/*-----------------------------------------------------------------*/ +static asmop * +newAsmop (short type) +{ + asmop *aop; + + aop = Safe_calloc (1, sizeof (asmop)); + aop->type = type; + aop->op = NULL; + return aop; +} + +#if 0 +/*-----------------------------------------------------------------*/ +/* pointerCode - returns the code for a pointer type */ +/*-----------------------------------------------------------------*/ +static int +pointerCode (sym_link * etype) +{ + + return PTR_TYPE (SPEC_OCLS (etype)); + +} +#endif + +/*-----------------------------------------------------------------*/ +/* aopForSym - for a true symbol */ +/*-----------------------------------------------------------------*/ +static asmop * +aopForSym (iCode * ic, symbol * sym, bool result) +{ + asmop *aop; + memmap *space; + + wassertl (ic != NULL, "Got a null iCode"); + wassertl (sym != NULL, "Got a null symbol"); + +// printf("in aopForSym for symbol %s\n", sym->name); + + space = SPEC_OCLS (sym->etype); + + /* if already has one */ + if (sym->aop) + { + return sym->aop; + } + + /* special case for a function */ + if (IS_FUNC (sym->type)) + { + sym->aop = aop = newAsmop (AOP_IMMD); + aop->aopu.aop_immd.aop_immd1 = Safe_calloc (1, strlen (sym->rname) + 1); + strcpy (aop->aopu.aop_immd.aop_immd1, sym->rname); + aop->size = FPTRSIZE; + return aop; + } + + /* if it is in direct space */ + if (IN_DIRSPACE (space)) + { + sym->aop = aop = newAsmop (AOP_DIR); + aop->aopu.aop_dir = sym->rname; + aop->size = getSize (sym->type); + return aop; + } + + /* if it is in far space */ + if (IN_FARSPACE (space)) + { + sym->aop = aop = newAsmop (AOP_EXT); + aop->aopu.aop_dir = sym->rname; + aop->size = getSize (sym->type); + return aop; + } + + if (IN_STACK (sym->etype)) + { + sym->aop = aop = newAsmop (AOP_SOF); + aop->aopu.aop_dir = sym->rname; + aop->size = getSize (sym->type); + aop->aopu.aop_stk = sym->stack; + return aop; + } + + + + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "aopForSym should never reach here"); + + exit(1); + + /* if it is in code space */ + if (IN_CODESPACE (space)) + aop->code = 1; + + return aop; +} + +/*-----------------------------------------------------------------*/ +/* aopForRemat - rematerializes an object */ +/*-----------------------------------------------------------------*/ +static asmop * +aopForRemat (symbol * sym) +{ + iCode *ic = sym->rematiCode; + asmop *aop = NULL; + int ptr_type = 0; + int val = 0; + + for (;;) + { + if (ic->op == '+') + val += (int) operandLitValue (IC_RIGHT (ic)); + else if (ic->op == '-') + val -= (int) operandLitValue (IC_RIGHT (ic)); + else if (IS_CAST_ICODE(ic)) + { + sym_link *from_type = operandType(IC_RIGHT(ic)); + ic = OP_SYMBOL (IC_RIGHT (ic))->rematiCode; + ptr_type = DCL_TYPE(from_type); + if (ptr_type == IPOINTER) + {// bug #481053 + ptr_type = POINTER; + } + continue ; + } + else break; + + ic = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + } + + if (ic->op == ADDRESS_OF) + { + if (val) + { + SNPRINTF (buffer, sizeof(buffer), + "(%s %c 0x%04x)", + OP_SYMBOL (IC_LEFT (ic))->rname, + val >= 0 ? '+' : '-', + abs (val) & 0xffff); + } + else + { + strncpyz (buffer, OP_SYMBOL (IC_LEFT (ic))->rname, sizeof(buffer)); + } + + aop = newAsmop (AOP_IMMD); + aop->aopu.aop_immd.aop_immd1 = Safe_strdup(buffer); + /* set immd2 field if required */ + } + else if (ic->op == '=') + { + val += (int) operandLitValue (IC_RIGHT (ic)); + val &= 0xffff; + SNPRINTF (buffer, sizeof(buffer), "0x%04x", val); + aop = newAsmop (AOP_LIT); + aop->aopu.aop_lit = constVal (buffer); + } + else + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "unexpected rematerialization"); + } + + return aop; +} + +/*-----------------------------------------------------------------*/ +/* regsInCommon - two operands have some registers in common */ +/*-----------------------------------------------------------------*/ +static bool +regsInCommon (operand * op1, operand * op2) +{ + symbol *sym1, *sym2; + int i; + + /* if they have registers in common */ + if (!IS_SYMOP (op1) || !IS_SYMOP (op2)) + return FALSE; + + sym1 = OP_SYMBOL (op1); + sym2 = OP_SYMBOL (op2); + + if (sym1->nRegs == 0 || sym2->nRegs == 0) + return FALSE; + + for (i = 0; i < sym1->nRegs; i++) + { + int j; + if (!sym1->regs[i]) + continue; + + for (j = 0; j < sym2->nRegs; j++) + { + if (!sym2->regs[j]) + continue; + + if (sym2->regs[j] == sym1->regs[i]) + return TRUE; + } + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* operandsEqu - equivalent */ +/*-----------------------------------------------------------------*/ +static bool +operandsEqu (operand * op1, operand * op2) +{ + symbol *sym1, *sym2; + + /* if they not symbols */ + if (!IS_SYMOP (op1) || !IS_SYMOP (op2)) + return FALSE; + + sym1 = OP_SYMBOL (op1); + sym2 = OP_SYMBOL (op2); + + /* if both are itemps & one is spilt + and the other is not then false */ + if (IS_ITEMP (op1) && IS_ITEMP (op2) && + sym1->isspilt != sym2->isspilt) + return FALSE; + + /* if they are the same */ + if (sym1 == sym2) + return TRUE; + + /* if they have the same rname */ + if (sym1->rname[0] && sym2->rname[0] + && strcmp (sym1->rname, sym2->rname) == 0) + return TRUE; + + /* if left is a tmp & right is not */ + if (IS_ITEMP (op1) && + !IS_ITEMP (op2) && + sym1->isspilt && + (sym1->usl.spillLoc == sym2)) + return TRUE; + + if (IS_ITEMP (op2) && + !IS_ITEMP (op1) && + sym2->isspilt && + sym1->level > 0 && + (sym2->usl.spillLoc == sym1)) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* sameRegs - two asmops have the same registers */ +/*-----------------------------------------------------------------*/ +static bool +sameRegs (asmop * aop1, asmop * aop2) +{ + int i; + + if (aop1 == aop2) + return TRUE; + +// if (aop1->size != aop2->size) +// return FALSE; + + if (aop1->type == aop2->type) + { + switch (aop1->type) + { + case AOP_REG: + for (i = 0; i < aop1->size; i++) + if (aop1->aopu.aop_reg[i] != + aop2->aopu.aop_reg[i]) + return FALSE; + return TRUE; + case AOP_SOF: + return (aop1->aopu.aop_stk == aop2->aopu.aop_stk); + case AOP_DIR: + case AOP_EXT: + return (!strcmp (aop1->aopu.aop_dir, aop2->aopu.aop_dir)); + } + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* aopOp - allocates an asmop for an operand : */ +/*-----------------------------------------------------------------*/ +static void +aopOp (operand * op, iCode * ic, bool result) +{ + asmop *aop = NULL; + symbol *sym; + int i; + + if (!op) + return; + + // Is this a pointer set result? + // + if ((op==IC_RESULT (ic)) && POINTER_SET (ic)) + { + } + +// printf("checking literal\n"); + /* if this a literal */ + if (IS_OP_LITERAL (op)) + { + op->aop = aop = newAsmop (AOP_LIT); + aop->aopu.aop_lit = op->operand.valOperand; + aop->size = getSize (operandType (op)); + aop->op = op; + aop->isaddr = op->isaddr; + return; + } + +// printf("checking pre-existing\n"); + /* if already has a asmop then continue */ + if (op->aop) + { + op->aop->op = op; + op->aop->isaddr = op->isaddr; + return; + } + +// printf("checking underlying sym\n"); + /* if the underlying symbol has a aop */ + if (IS_SYMOP (op) && OP_SYMBOL (op)->aop) + { + op->aop = aop = Safe_calloc(1, sizeof(*aop)); + memcpy (aop, OP_SYMBOL (op)->aop, sizeof(*aop)); + //op->aop = aop = OP_SYMBOL (op)->aop; + aop->size = getSize( operandType (op)); + //printf ("reusing underlying symbol %s\n",OP_SYMBOL (op)->name); + //printf (" with size = %d\n", aop->size); + + aop->op = op; + aop->isaddr = op->isaddr; + /* if (aop->isaddr & IS_ITEMP (op)) + { + aop->psize=aop->size; + aop->size = getSize( operandType (op)->next); + } */ + return; + } + +// printf("checking true sym\n"); + /* if this is a true symbol */ + if (IS_TRUE_SYMOP (op)) + { + op->aop = aop = aopForSym (ic, OP_SYMBOL (op), result); + aop->op = op; + aop->isaddr = op->isaddr; + //printf ("new symbol %s\n", OP_SYMBOL (op)->name); + //printf (" with size = %d\n", aop->size); + return; + } + + /* this is a temporary : this has + only five choices : + a) register + b) spillocation + c) rematerialize + d) conditional + e) can be a return use only */ + + sym = OP_SYMBOL (op); + +// printf("checking conditional\n"); + /* if the type is a conditional */ + if (sym->regType == REG_CND) + { + sym->aop = op->aop = aop = newAsmop (AOP_CRY); + aop->size = 0; + aop->op = op; + aop->isaddr = op->isaddr; + return; + } + +// printf("checking spilt\n"); + /* if it is spilt then two situations + a) is rematerialize + b) has a spill location */ + if (sym->isspilt || sym->nRegs == 0) + { + +// printf("checking remat\n"); + /* rematerialize it NOW */ + if (sym->remat) + { + sym->aop = op->aop = aop = aopForRemat (sym); + aop->size = getSize (sym->type); + aop->op = op; + aop->isaddr = op->isaddr; + /* if (aop->isaddr & IS_ITEMP (op)) + { + aop->psize=aop->size; + aop->size = getSize( operandType (op)->next); + } */ + return; + } + +// printf("checking accuse\n"); + if (sym->accuse) + { + sym->aop = op->aop = aop = newAsmop (AOP_REG); + aop->size = getSize (sym->type); + switch (sym->accuse) + { + case ACCUSE_XA: + aop->aopu.aop_reg[0] = hc08_reg_a; + aop->aopu.aop_reg[1] = hc08_reg_x; + break; + case ACCUSE_HX: + aop->aopu.aop_reg[0] = hc08_reg_x; + aop->aopu.aop_reg[1] = hc08_reg_h; + break; + } + aop->op = op; + aop->isaddr = op->isaddr; + return; + } + +// printf("checking ruonly\n"); +#if 1 + if (sym->ruonly) + { + unsigned i; + + sym->aop = op->aop = aop = newAsmop (AOP_STR); + aop->size = getSize (sym->type); + for (i = 0; i < fReturnSizeHC08; i++) + aop->aopu.aop_str[i] = fReturn2[i]; + aop->op = op; + aop->isaddr = op->isaddr; + return; + } +#endif + /* else spill location */ + if (sym->usl.spillLoc) + { + asmop *oldAsmOp = NULL; + + if (sym->usl.spillLoc->aop + && sym->usl.spillLoc->aop->size != getSize (sym->type)) + { + /* force a new aop if sizes differ */ + oldAsmOp = sym->usl.spillLoc->aop; + sym->usl.spillLoc->aop = NULL; + //printf ("forcing new aop\n"); + } + sym->aop = op->aop = aop = aopForSym (ic, sym->usl.spillLoc, result); + if (sym->usl.spillLoc->aop->size != getSize (sym->type)) + { + /* Don't reuse the new aop, go with the last one */ + sym->usl.spillLoc->aop = oldAsmOp; + } + aop->size = getSize (sym->type); + aop->op = op; + aop->isaddr = op->isaddr; + //printf ("spill symbol %s\n", OP_SYMBOL (op)->name); + //printf (" with size = %d\n", aop->size); + return; + } + + /* else must be a dummy iTemp */ + sym->aop = op->aop = aop = newAsmop (AOP_DUMMY); + aop->size = getSize (sym->type); + return; + } + +// printf("assuming register\n"); + /* must be in a register */ + sym->aop = op->aop = aop = newAsmop (AOP_REG); + aop->size = sym->nRegs; + for (i = 0; i < sym->nRegs; i++) + aop->aopu.aop_reg[i] = sym->regs[i]; + aop->op = op; + aop->isaddr = op->isaddr; + +} + +/*-----------------------------------------------------------------*/ +/* freeAsmop - free up the asmop given to an operand */ +/*----------------------------------------------------------------*/ +static void +freeAsmop (operand * op, asmop * aaop, iCode * ic, bool pop) +{ + asmop *aop; + + if (!op) + aop = aaop; + else + aop = op->aop; + + if (!aop) + return; + + if (aop->freed) + goto dealloc; + + aop->freed = 1; + + if (aop->stacked) + { + int stackAdjust; + int loffset; + + DD(emitcode ("","; freeAsmop restoring stacked %s", aopName(aop))); + aop->stacked = 0; + stackAdjust = 0; + for (loffset=0; loffsetsize; loffset++) + if (aop->stk_aop[loffset]) + { + transferAopAop (aop->stk_aop[loffset], 0, aop, loffset); + stackAdjust++; + } + pullNull (stackAdjust); + } + +dealloc: + /* all other cases just dealloc */ + if (op) + { + op->aop = NULL; + if (IS_SYMOP (op)) + { + OP_SYMBOL (op)->aop = NULL; + /* if the symbol has a spill */ + if (SPIL_LOC (op)) + SPIL_LOC (op)->aop = NULL; + } + } +} + + +/*-----------------------------------------------------------------*/ +/* aopDerefAop - treating the aop parameter as a pointer, return */ +/* an asmop for the object it references */ +/*-----------------------------------------------------------------*/ +asmop * +aopDerefAop (asmop *aop) +{ + int adr; + char *s = buffer; + char *rs; + asmop *newaop = NULL; + sym_link *type, *etype; + int p_type; + + DD(emitcode ("", "; aopDerefAop(%s)", aopName(aop))); + if (aop->op) + { + + type = operandType (aop->op); + etype = getSpec (type); + /* if op is of type of pointer then it is simple */ + if (IS_PTR (type) && !IS_FUNC (type->next)) + p_type = DCL_TYPE (type); + else + { + /* we have to go by the storage class */ + p_type = PTR_TYPE (SPEC_OCLS (etype)); + } + } + else + p_type = UPOINTER; + + switch (aop->type) + { + case AOP_IMMD: + if (p_type == POINTER) + newaop = newAsmop (AOP_DIR); + else + newaop = newAsmop (AOP_EXT); + newaop->aopu.aop_dir = aop->aopu.aop_immd.aop_immd1; + break; + case AOP_LIT: + adr = (int) ulFromVal (aop->aopu.aop_lit); + if (p_type == POINTER) + adr &= 0xff; + + if (adr<0x100) + { + newaop = newAsmop (AOP_DIR); + sprintf (s, "0x%02x",adr); + } + else + { + newaop = newAsmop (AOP_EXT); + sprintf (s, "0x%04x",adr); + } + rs = Safe_calloc (1, strlen (s) + 1); + strcpy (rs, s); + newaop->aopu.aop_dir = rs; + break; + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "unsupported asmop"); + return NULL; + } + + + return newaop; +} + + + +/*-----------------------------------------------------------------*/ +/* aopAdrStr - for referencing the address of the aop */ +/*-----------------------------------------------------------------*/ +static char * +aopAdrStr (asmop * aop, int loffset, bool bit16) +{ + char *s = buffer; + char *rs; + int offset = aop->size - 1 - loffset; + + + /* offset is greater than + size then zero */ + if (loffset > (aop->size - 1) && + aop->type != AOP_LIT) + return zero; + + /* depending on type */ + switch (aop->type) + { + + case AOP_DUMMY: + return zero; + + case AOP_IMMD: + if (aop->aopu.aop_immd.from_cast_remat && (loffset == (aop->size-1))) + { + sprintf(s,"%s",aop->aopu.aop_immd.aop_immd2); + } + else if (bit16) + { + sprintf (s, "#%s", aop->aopu.aop_immd.aop_immd1); + } + else if (loffset) + { + if (loffset!=1) + sprintf (s, "#(%s >> %d)", + aop->aopu.aop_immd.aop_immd1, + loffset * 8); + else + sprintf (s, "#>%s", + aop->aopu.aop_immd.aop_immd1); + } + else + sprintf (s, "#%s", + aop->aopu.aop_immd.aop_immd1); + rs = Safe_calloc (1, strlen (s) + 1); + strcpy (rs, s); + return rs; + + case AOP_DIR: + if (offset) + sprintf (s, "*(%s + %d)", + aop->aopu.aop_dir, + offset); + else + sprintf (s, "*%s", aop->aopu.aop_dir); + rs = Safe_calloc (1, strlen (s) + 1); + strcpy (rs, s); + return rs; + + case AOP_EXT: + if (offset) + sprintf (s, "(%s + %d)", + aop->aopu.aop_dir, + offset); + else + sprintf (s, "%s", aop->aopu.aop_dir); + rs = Safe_calloc (1, strlen (s) + 1); + strcpy (rs, s); + return rs; + + case AOP_REG: + return aop->aopu.aop_reg[loffset]->name; + + case AOP_LIT: + if (bit16) + return aopLiteralLong (aop->aopu.aop_lit, /*loffset*/ 0, 2); + else + return aopLiteral (aop->aopu.aop_lit, loffset); + + case AOP_STR: + aop->coff = offset; + return aop->aopu.aop_str[loffset]; + + case AOP_SOF: + sprintf (s, "%d,s", _G.stackOfs + _G.stackPushes + aop->aopu.aop_stk + + offset + 1); + rs = Safe_calloc (1, strlen (s) + 1); + strcpy (rs, s); + return rs; + + } + + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "aopAdrStr got unsupported aop->type"); + exit (1); +} + + + + + +#if 0 +/*-----------------------------------------------------------------*/ +/* opIsGptr: returns non-zero if the passed operand is */ +/* a generic pointer type. */ +/*-----------------------------------------------------------------*/ +static int +opIsGptr (operand * op) +{ + sym_link *type = operandType (op); + + if ((AOP_SIZE (op) == GPTRSIZE) && IS_GENPTR (type)) + { + return 1; + } + return 0; +} +#endif + +/*-----------------------------------------------------------------*/ +/* getDataSize - get the operand data size */ +/*-----------------------------------------------------------------*/ +static int +getDataSize (operand * op) +{ + int size; + size = AOP_SIZE (op); + return size; +} + + +/*-----------------------------------------------------------------*/ +/* asmopToBool - Emit code to convert an asmop to a boolean. */ +/* Result left in A (0=FALSE, 1=TRUE) if ResultInA, */ +/* otherwise result left in Z flag (1=FALSE, 0=TRUE) */ +/*-----------------------------------------------------------------*/ +static void +asmopToBool (asmop *aop, bool resultInA) +{ + symbol *tlbl, *tlbl1; + int size = aop->size; + bool needpula = FALSE; + bool flagsonly = TRUE; + int offset = 0; + + + if (resultInA) + hc08_freeReg(hc08_reg_a); + + switch (aop->type) + { + case AOP_REG: + if (IS_AOP_A(aop)) + { + emitcode ("tsta", ""); + flagsonly = FALSE; + } + else if (IS_AOP_X(aop)) + emitcode ("tstx", ""); + else if (IS_AOP_H(aop)) + { + if (hc08_reg_a->isFree) + { + transferRegReg (hc08_reg_h,hc08_reg_a, FALSE); + emitcode ("tsta", ""); + flagsonly = FALSE; + hc08_freeReg(hc08_reg_a); + } + else if (hc08_reg_x->isFree) + { + transferRegReg (hc08_reg_h,hc08_reg_x, FALSE); + emitcode ("tstx", ""); + hc08_freeReg(hc08_reg_x); + } + else + { + emitcode ("pshh", ""); + emitcode ("tst", "1,s"); + emitcode ("ais", "#1"); + } + } + else if (IS_AOP_HX(aop)) + emitcode ("cphx", zero); + else if (IS_AOP_XA(aop)) + { + symbol *tlbl = newiTempLabel (NULL); + emitcode ("tsta", ""); + emitcode ("bne", "%05d$", (tlbl->key + 100)); + emitcode ("tstx", ""); + emitLabel (tlbl); + } + else + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "Bad rIdx in asmToBool"); + return; + } + break; + case AOP_EXT: + if (resultInA) + needpula = FALSE; + else + needpula = pushRegIfUsed (hc08_reg_a); + loadRegFromAop (hc08_reg_a, aop, 0); + for (offset=1; offsetaopu.aop_lit)) + loadRegFromConst (hc08_reg_a, one); + else + loadRegFromConst (hc08_reg_a, zero); + hc08_freeReg(hc08_reg_a); + break; + default: + if (size==1) + { + if (resultInA) + { + loadRegFromAop (hc08_reg_a, aop, 0); + hc08_freeReg (hc08_reg_a); + flagsonly = FALSE; + } + else + emitcode ("tst", "%s", aopAdrStr (aop, 0, FALSE)); + break; + } + else if (size==2) + { + if (hc08_reg_a->isFree) + { + loadRegFromAop (hc08_reg_a, aop, 0); + accopWithAop ("ora", aop, 1); + hc08_freeReg (hc08_reg_a); + flagsonly = FALSE; + } + else + { + tlbl = newiTempLabel (NULL); + emitcode ("tst", "%s", aopAdrStr (aop, 0, FALSE)); + emitcode ("bne", "%05d$", (tlbl->key + 100)); + emitcode ("tst", "%s", aopAdrStr (aop, 1, FALSE)); + emitLabel (tlbl); + break; + } + } + else + { + needpula = pushRegIfUsed (hc08_reg_a); + loadRegFromAop (hc08_reg_a, aop, 0); + for (offset=1; offsetnext) + if (ic->op == CALL || ic->op == PCALL) + break; + + if (!ic) + { + fprintf (stderr, "found parameter push with no function call\n"); + return; + } + + /* if the registers have been saved already or don't need to be then + do nothing */ + if (ic->regsSaved) + return; + if (IS_SYMOP(IC_LEFT(ic)) && + (IFFUNC_CALLEESAVES(OP_SYMBOL(IC_LEFT(ic))->type) || + IFFUNC_ISNAKED(OP_SYM_TYPE(IC_LEFT (ic))))) + return; + + /* safe the registers in use at this time but skip the + ones for the result */ + rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + hc08_rUmaskForOp (IC_RESULT(ic))); + + ic->regsSaved = 1; + for (i = 0; i < hc08_nRegs; i++) + { + if (bitVectBitValue (rsave, i)) + pushReg ( hc08_regWithIdx (i), FALSE); + } +} + +/*-----------------------------------------------------------------*/ +/* unsaveRegisters - pop the pushed registers */ +/*-----------------------------------------------------------------*/ +static void +unsaveRegisters (iCode * ic) +{ + int i; + bitVect *rsave; + + /* restore the registers in use at this time but skip the + ones for the result */ + rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + hc08_rUmaskForOp (IC_RESULT(ic))); + + for (i = hc08_nRegs; i >= 0; i--) + { + if (bitVectBitValue (rsave, i)) + pullReg ( hc08_regWithIdx (i)); + } + +} + + +/*-----------------------------------------------------------------*/ +/* pushSide - */ +/*-----------------------------------------------------------------*/ +static void +pushSide (operand * oper, int size, iCode * ic) +{ + int offset = 0; + + aopOp (oper, ic, FALSE); + + while (size--) + { + loadRegFromAop (hc08_reg_a, AOP (oper), offset++); + pushReg ( hc08_reg_a, TRUE); + } + + freeAsmop (oper, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* assignResultValue - */ +/*-----------------------------------------------------------------*/ +static void +assignResultValue (operand * oper) +{ + int size = AOP_SIZE (oper); + int offset = 0; + while (size--) + { + transferAopAop(hc08_aop_pass[offset], 0, AOP (oper), offset); + if (hc08_aop_pass[offset]->type == AOP_REG) + hc08_freeReg (hc08_aop_pass[offset]->aopu.aop_reg[0]); + offset++; + } +} + + + +/*-----------------------------------------------------------------*/ +/* genIpush - genrate code for pushing this gets a little complex */ +/*-----------------------------------------------------------------*/ +static void +genIpush (iCode * ic) +{ + int size, offset = 0; + + D(emitcode ("; genIpush","")); + + /* if this is not a parm push : ie. it is spill push + and spill push is always done on the local stack */ + if (!ic->parmPush) + { + + /* and the item is spilt then do nothing */ + if (OP_SYMBOL (IC_LEFT (ic))->isspilt) + return; + + aopOp (IC_LEFT (ic), ic, FALSE); + size = AOP_SIZE (IC_LEFT (ic)); + offset = 0; + /* push it on the stack */ + while (size--) + { + loadRegFromAop (hc08_reg_a, AOP (IC_LEFT (ic)), offset++); + pushReg ( hc08_reg_a, TRUE); + } + + return; + } + + /* this is a paramter push: in this case we call + the routine to find the call and save those + registers that need to be saved */ + saveRegisters (ic); + + /* then do the push */ + aopOp (IC_LEFT (ic), ic, FALSE); + + + // pushSide(IC_LEFT(ic), AOP_SIZE(IC_LEFT(ic))); + size = AOP_SIZE (IC_LEFT (ic)); + offset = 0; + +// l = aopGet (AOP (IC_LEFT (ic)), 0, FALSE, TRUE); + if (AOP_TYPE (IC_LEFT (ic)) == AOP_IMMD) + { + if ((size==2) && hc08_reg_hx->isFree) + { + loadRegFromAop (hc08_reg_hx, AOP (IC_LEFT (ic)), 0); + pushReg (hc08_reg_hx, TRUE); + goto release; + } + } + + while (size--) + { +// printf("loading %d\n", offset); + loadRegFromAop (hc08_reg_a, AOP (IC_LEFT (ic)), offset++); +// printf("pushing \n"); + pushReg (hc08_reg_a, TRUE); + } + +release: + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genIpop - recover the registers: can happen only for spilling */ +/*-----------------------------------------------------------------*/ +static void +genIpop (iCode * ic) +{ + int size, offset; + + D(emitcode ("; genIpop","")); + + /* if the temp was not pushed then */ + if (OP_SYMBOL (IC_LEFT (ic))->isspilt) + return; + + aopOp (IC_LEFT (ic), ic, FALSE); + size = AOP_SIZE (IC_LEFT (ic)); + offset = size - 1; + while (size--) + { + pullReg (hc08_reg_a); + storeRegToAop (hc08_reg_a, AOP (IC_LEFT (ic)), offset--); + } + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); +} + + +/*-----------------------------------------------------------------*/ +/* genSend - gen code for SEND */ +/*-----------------------------------------------------------------*/ +static void genSend(set *sendSet) +{ + iCode *sic; + + for (sic = setFirstItem (sendSet); sic; + sic = setNextItem (sendSet)) { + int size, offset = 0; + aopOp (IC_LEFT (sic), sic, FALSE); + size = AOP_SIZE (IC_LEFT (sic)); + + if (sic->argreg) { + offset = size-1; + while (size--) { + transferAopAop( AOP (IC_LEFT (sic)), offset, + hc08_aop_pass[offset+(sic->argreg-1)], 0); + offset--; + } + } + freeAsmop (IC_LEFT (sic), NULL, sic, TRUE); + } +} + +/*-----------------------------------------------------------------*/ +/* genCall - generates a call statement */ +/*-----------------------------------------------------------------*/ +static void +genCall (iCode * ic) +{ + sym_link *dtype; +// bool restoreBank = FALSE; +// bool swapBanks = FALSE; + + D(emitcode("; genCall","")); + + dtype = operandType (IC_LEFT (ic)); + /* if send set is not empty then assign */ + if (_G.sendSet) + { + if (IFFUNC_ISREENT(dtype)) { /* need to reverse the send set */ + genSend(reverseSet(_G.sendSet)); + } else { + genSend(_G.sendSet); + } + + _G.sendSet = NULL; + } + + /* if caller saves & we have not saved then */ + if (!ic->regsSaved) + saveRegisters (ic); + + + /* make the call */ + emitcode ("jsr", "%s", (OP_SYMBOL (IC_LEFT (ic))->rname[0] ? + OP_SYMBOL (IC_LEFT (ic))->rname : + OP_SYMBOL (IC_LEFT (ic))->name)); + + + /* if we need assign a result value */ + if ((IS_ITEMP (IC_RESULT (ic)) && + (OP_SYMBOL (IC_RESULT (ic))->nRegs || + OP_SYMBOL (IC_RESULT (ic))->accuse || + OP_SYMBOL (IC_RESULT (ic))->spildir)) || + IS_TRUE_SYMOP (IC_RESULT (ic))) + { + + _G.accInUse++; + aopOp (IC_RESULT (ic), ic, FALSE); + _G.accInUse--; + + assignResultValue (IC_RESULT (ic)); + + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + } + + /* adjust the stack for parameters if + required */ + if (ic->parmBytes) + { + pullNull (ic->parmBytes); + } + + /* if we had saved some registers then unsave them */ + if (ic->regsSaved && !IFFUNC_CALLEESAVES(dtype)) + unsaveRegisters (ic); + +} + +/*-----------------------------------------------------------------*/ +/* -10l - generates a call by pointer statement */ +/*-----------------------------------------------------------------*/ +static void +genPcall (iCode * ic) +{ + sym_link *dtype; + symbol *rlbl = newiTempLabel (NULL); + symbol *tlbl = newiTempLabel (NULL); +// bool restoreBank=FALSE; +// bool swapBanks = FALSE; + + D (emitcode (";", "genPcall")); + + /* if caller saves & we have not saved then */ + if (!ic->regsSaved) + saveRegisters (ic); + + /* if we are calling a not _naked function that is not using + the same register bank then we need to save the + destination registers on the stack */ + dtype = operandType (IC_LEFT (ic))->next; + + /* push the return address on to the stack */ + emitBranch ("bsr", tlbl); + emitBranch ("bra", rlbl); + emitLabel (tlbl); + _G.stackPushes += 2; /* account for the bsr return address now on stack */ + updateCFA(); + + /* now push the function address */ + pushSide (IC_LEFT (ic), FPTRSIZE, ic); + + /* if send set is not empty then assign */ + if (_G.sendSet) + { + genSend(reverseSet(_G.sendSet)); + _G.sendSet = NULL; + } + + + /* make the call */ + emitcode ("rts", ""); + + emitLabel (rlbl); + _G.stackPushes -= 4; /* account for rts here & in called function */ + updateCFA(); + + + /* if we need assign a result value */ + if ((IS_ITEMP (IC_RESULT (ic)) && + (OP_SYMBOL (IC_RESULT (ic))->nRegs || + OP_SYMBOL (IC_RESULT (ic))->spildir)) || + IS_TRUE_SYMOP (IC_RESULT (ic))) + { + + _G.accInUse++; + aopOp (IC_RESULT (ic), ic, FALSE); + _G.accInUse--; + + assignResultValue (IC_RESULT (ic)); + + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + } + + /* adjust the stack for parameters if + required */ + if (ic->parmBytes) + { + pullNull (ic->parmBytes); + } + + /* if we hade saved some registers then + unsave them */ + if (ic->regsSaved && !IFFUNC_CALLEESAVES(dtype)) + unsaveRegisters (ic); +} + +/*-----------------------------------------------------------------*/ +/* resultRemat - result is rematerializable */ +/*-----------------------------------------------------------------*/ +static int +resultRemat (iCode * ic) +{ + if (SKIP_IC (ic) || ic->op == IFX) + return 0; + + if (IC_RESULT (ic) && IS_ITEMP (IC_RESULT (ic))) + { + symbol *sym = OP_SYMBOL (IC_RESULT (ic)); + if (sym->remat && !POINTER_SET (ic)) + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* inExcludeList - return 1 if the string is in exclude Reg list */ +/*-----------------------------------------------------------------*/ +static int +regsCmp(void *p1, void *p2) +{ + return (STRCASECMP((char *)p1, (char *)(p2)) == 0); +} + +static bool +inExcludeList (char *s) +{ + const char *p = setFirstItem(options.excludeRegsSet); + + if (p == NULL || STRCASECMP(p, "none") == 0) + return FALSE; + + + return isinSetWith(options.excludeRegsSet, s, regsCmp); +} + +/*-----------------------------------------------------------------*/ +/* genFunction - generated code for function entry */ +/*-----------------------------------------------------------------*/ +static void +genFunction (iCode * ic) +{ + symbol *sym = OP_SYMBOL (IC_LEFT (ic)); + sym_link *ftype; + iCode *ric = (ic->next && ic->next->op == RECEIVE) ? ic->next : NULL; + int stackAdjust = sym->stack; + int accIsFree = sym->recvSize == 0; + + _G.nRegsSaved = 0; + _G.stackPushes = 0; + /* create the function header */ + emitcode (";", "-----------------------------------------"); + emitcode (";", " function %s", sym->name); + emitcode (";", "-----------------------------------------"); + + emitcode ("", "%s:", sym->rname); + lineCurr->isLabel = 1; + ftype = operandType (IC_LEFT (ic)); + + _G.stackOfs = 0; + _G.stackPushes = 0; + debugFile->writeFrameAddress (NULL, hc08_reg_sp, 0); + + if (IFFUNC_ISNAKED(ftype)) + { + emitcode(";", "naked function: no prologue."); + return; + } + + /* if this is an interrupt service routine then + save h */ + if (IFFUNC_ISISR (sym->type)) + { + + if (!inExcludeList ("h")) + pushReg (hc08_reg_h, FALSE); + } + + /* For some cases it is worthwhile to perform a RECEIVE iCode */ + /* before setting up the stack frame completely. */ + while (ric && ric->next && ric->next->op == RECEIVE) + ric = ric->next; + while (ric && IC_RESULT (ric)) + { + symbol * rsym = OP_SYMBOL (IC_RESULT (ric)); + int rsymSize = rsym ? getSize(rsym->type) : 0; + + if (rsym->isitmp) + { + if (rsym && rsym->regType == REG_CND) + rsym = NULL; + if (rsym && (rsym->accuse || rsym->ruonly)) + rsym = NULL; + if (rsym && (rsym->isspilt || rsym->nRegs == 0) && rsym->usl.spillLoc) + rsym = rsym->usl.spillLoc; + } + + /* If the RECEIVE operand immediately spills to the first entry on the */ + /* stack, we can push it directly rather than use an sp relative store. */ + if (rsym && rsym->onStack && rsym->stack == -_G.stackPushes-rsymSize) + { + int ofs; + + _G.current_iCode = ric; + D(emitcode ("; genReceive","")); + for (ofs=0; ofs < rsymSize; ofs++) + { + regs * reg = hc08_aop_pass[ofs+(ric->argreg-1)]->aopu.aop_reg[0]; + pushReg (reg, TRUE); + if (reg->rIdx == A_IDX) + accIsFree = 1; + stackAdjust--; + } + _G.current_iCode = ic; + ric->generated = 1; + } + ric = (ric->prev && ric->prev->op == RECEIVE) ? ric->prev : NULL; + } + + /* adjust the stack for the function */ + if (stackAdjust) + { + adjustStack (-stackAdjust); + } + _G.stackOfs = sym->stack; + _G.stackPushes = 0; + + /* if critical function then turn interrupts off */ + if (IFFUNC_ISCRITICAL (ftype)) + { + if (!accIsFree) + { + /* Function was passed parameters, so make sure A is preserved */ + pushReg (hc08_reg_a, FALSE); + pushReg (hc08_reg_a, FALSE); + emitcode ("tpa", ""); + emitcode ("sta", "2,s"); + emitcode ("sei", ""); + pullReg (hc08_reg_a); + } + else + { + /* No passed parameters, so A can be freely modified */ + emitcode ("tpa", ""); + pushReg (hc08_reg_a, TRUE); + emitcode ("sei", ""); + } + } + +} + +/*-----------------------------------------------------------------*/ +/* genEndFunction - generates epilogue for functions */ +/*-----------------------------------------------------------------*/ +static void +genEndFunction (iCode * ic) +{ + symbol *sym = OP_SYMBOL (IC_LEFT (ic)); + + if (IFFUNC_ISNAKED(sym->type)) + { + emitcode(";", "naked function: no epilogue."); + if (options.debug && currFunc) + debugFile->writeEndFunction (currFunc, ic, 0); + return; + } + + if (IFFUNC_ISCRITICAL (sym->type)) + { + if (!IS_VOID(sym->type->next)) + { + /* Function has return value, so make sure A is preserved */ + pushReg (hc08_reg_a, FALSE); + emitcode ("lda", "2,s"); + emitcode ("tap", ""); + pullReg (hc08_reg_a); + pullNull (1); + } + else + { + /* Function returns void, so A can be freely modified */ + pullReg (hc08_reg_a); + emitcode ("tap", ""); + } + } + + if (IFFUNC_ISREENT (sym->type) || options.stackAuto) + { + } + + if (sym->stack) + { + _G.stackPushes += sym->stack; + adjustStack (sym->stack); + } + + + if ((IFFUNC_ISREENT (sym->type) || options.stackAuto)) + { + } + + if (IFFUNC_ISISR (sym->type)) + { + + if (!inExcludeList ("h")) + pullReg (hc08_reg_h); + + + /* if debug then send end of function */ + if (options.debug && currFunc) + { + debugFile->writeEndFunction (currFunc, ic, 1); + } + + emitcode ("rti", ""); + } + else + { + if (IFFUNC_CALLEESAVES(sym->type)) + { + int i; + + /* if any registers used */ + if (sym->regsUsed) + { + /* save the registers used */ + for (i = sym->regsUsed->size; i >= 0; i--) + { + if (bitVectBitValue (sym->regsUsed, i) || + (hc08_ptrRegReq && (i == HX_IDX || i == HX_IDX))) + emitcode ("pop", "%s", hc08_regWithIdx (i)->name); + } + } + + } + + /* if debug then send end of function */ + if (options.debug && currFunc) + { + debugFile->writeEndFunction (currFunc, ic, 1); + } + + emitcode ("rts", ""); + } + +} + +/*-----------------------------------------------------------------*/ +/* genRet - generate code for return statement */ +/*-----------------------------------------------------------------*/ +static void +genRet (iCode * ic) +{ + int size, offset = 0; +// int pushed = 0; + + D(emitcode ("; genRet","")); + + /* if we have no return value then + just generate the "ret" */ + if (!IC_LEFT (ic)) + goto jumpret; + + /* we have something to return then + move the return value into place */ + aopOp (IC_LEFT (ic), ic, FALSE); + size = AOP_SIZE (IC_LEFT (ic)); + +#if 1 + offset = size - 1; + while (size--) + { + transferAopAop (AOP (IC_LEFT (ic)), offset, hc08_aop_pass[offset], 0); + offset--; + } +#else + switch (size) + { + case 4: + /* 4 byte return: store value in the global return variable */ + offset = size-1; + while (size--) + { + loadRegFromAop (hc08_reg_a, AOP (IC_LEFT (ic)), offset); + STA (fReturn2[offset--], FALSE); + hc08_freeReg (hc08_reg_a); + } + break; + case 2: + /* 2 byte return: store value in x:a */ + loadRegFromAop (hc08_reg_xa, AOP (IC_LEFT (ic)), 0); + hc08_freeReg (hc08_reg_xa); + break; + case 1: + /* 1 byte return: store value in a */ + loadRegFromAop (hc08_reg_a, AOP (IC_LEFT (ic)), 0); + hc08_freeReg (hc08_reg_a); + break; + } +#endif + + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); + +jumpret: + /* generate a jump to the return label + if the next is not the return statement */ + if (!(ic->next && ic->next->op == LABEL && + IC_LABEL (ic->next) == returnLabel)) + + emitcode ("jmp", "%05d$", (returnLabel->key + 100)); + +} + +/*-----------------------------------------------------------------*/ +/* genLabel - generates a label */ +/*-----------------------------------------------------------------*/ +static void +genLabel (iCode * ic) +{ + int i; + regs *reg; + + /* For the high level labels we cannot depend on any */ + /* register's contents. Amnesia time. */ + for (i=A_IDX;i<=XA_IDX;i++) + { + reg = hc08_regWithIdx(i); + if (reg) + reg->aop = NULL; + } + + /* special case never generate */ + if (IC_LABEL (ic) == entryLabel) + return; + + debugFile->writeLabel(IC_LABEL (ic), ic); + + emitLabel (IC_LABEL (ic)); + +} + +/*-----------------------------------------------------------------*/ +/* genGoto - generates a jmp */ +/*-----------------------------------------------------------------*/ +static void +genGoto (iCode * ic) +{ + emitcode ("jmp", "%05d$", (IC_LABEL (ic)->key + 100)); +} + +#if 0 +/*-----------------------------------------------------------------*/ +/* findLabelBackwards: walks back through the iCode chain looking */ +/* for the given label. Returns number of iCode instructions */ +/* between that label and given ic. */ +/* Returns zero if label not found. */ +/*-----------------------------------------------------------------*/ +static int +findLabelBackwards (iCode * ic, int key) +{ + int count = 0; + + while (ic->prev) + { + ic = ic->prev; + count++; + + /* If we have any pushes or pops, we cannot predict the distance. + I don't like this at all, this should be dealt with in the + back-end */ + if (ic->op == IPUSH || ic->op == IPOP) { + return 0; + } + + if (ic->op == LABEL && IC_LABEL (ic)->key == key) + { + return count; + } + } + + return 0; +} +#endif + +/*-----------------------------------------------------------------*/ +/* genPlusIncr :- does addition with increment if possible */ +/*-----------------------------------------------------------------*/ +static bool +genPlusIncr (iCode * ic) +{ + int icount; + operand *left; + operand *result; + bool needpulx; + bool needpulh; + bool needpula; + unsigned int size = getDataSize (IC_RESULT (ic)); + unsigned int offset; + symbol *tlbl = NULL; + + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + /* will try to generate an increment */ + /* if the right side is not a literal + we cannot */ + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) + return FALSE; + + icount = (unsigned int) ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit); + + DD(emitcode ("", "; IS_AOP_HX = %d", IS_AOP_HX (AOP (left)))); + + if ((IS_AOP_HX (AOP (left)) || + ( (AOP_TYPE (left) == AOP_DIR) && (AOP_TYPE (result) == AOP_DIR) ) + ) + && (icount>=-128) && (icount<=127) && (size==2)) + { + if (!IS_AOP_HX (AOP (left))) + { + needpulx = pushRegIfUsed (hc08_reg_x); + needpulh = pushRegIfUsed (hc08_reg_h); + } + else + { + needpulx = FALSE; + needpulh = FALSE; + } + loadRegFromAop (hc08_reg_hx, AOP(left), 0); + emitcode ("aix","#%d", icount); + hc08_dirtyReg (hc08_reg_hx, FALSE); + storeRegToAop (hc08_reg_hx, AOP(result), 0); + pullOrFreeReg (hc08_reg_h, needpulh); + pullOrFreeReg (hc08_reg_x, needpulx); + return TRUE; + } + + DD(emitcode ("", "; icount = %d, sameRegs=%d", icount, + sameRegs (AOP (left), AOP (result)))); + + if ((icount > 255) || (icount<0)) + return FALSE; + + if (!sameRegs (AOP (left), AOP (result))) + return FALSE; + + D(emitcode ("; genPlusIncr","")); + + if (size>1) + tlbl = newiTempLabel (NULL); + + if (icount==1) + { + needpula = FALSE; + rmwWithAop ("inc", AOP (result), 0); + if (11) + emitLabel (tlbl); + + pullOrFreeReg (hc08_reg_a, needpula); + + return TRUE; +} + + + +/*-----------------------------------------------------------------*/ +/* genPlus - generates code for addition */ +/*-----------------------------------------------------------------*/ +static void +genPlus (iCode * ic) +{ + int size, offset = 0; + char *add; + asmop *leftOp, *rightOp; + + /* special cases :- */ + + D(emitcode ("; genPlus","")); + + aopOp (IC_LEFT (ic), ic, FALSE); + aopOp (IC_RIGHT (ic), ic, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE); + + /* we want registers on the left and literals on the right */ + if ((AOP_TYPE (IC_LEFT (ic)) == AOP_LIT) || + (AOP_TYPE (IC_RIGHT (ic)) == AOP_REG)) + { + operand *t = IC_RIGHT (ic); + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = t; + } + + + /* if I can do an increment instead + of add then GOOD for ME */ + if (genPlusIncr (ic) == TRUE) + goto release; + + DD(emitcode("","; left size = %d", getDataSize (IC_LEFT(ic)))); + DD(emitcode("","; right size = %d", getDataSize (IC_RIGHT(ic)))); + DD(emitcode("","; result size = %d", getDataSize (IC_RESULT(ic)))); + + size = getDataSize (IC_RESULT (ic)); + + leftOp = AOP(IC_LEFT(ic)); + rightOp = AOP(IC_RIGHT(ic)); + add = "add"; + + offset = 0; + while (size--) + { + loadRegFromAop (hc08_reg_a, leftOp, offset); + accopWithAop(add, rightOp, offset); + storeRegToAop (hc08_reg_a, AOP (IC_RESULT (ic)), offset++); + hc08_freeReg (hc08_reg_a); + add = "adc"; /* further adds must propagate carry */ + } + + +// adjustArithmeticResult (ic); + +release: + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + freeAsmop (IC_RIGHT (ic), NULL, ic, TRUE); + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genMinusDec :- does subtraction with decrement if possible */ +/*-----------------------------------------------------------------*/ +static bool +genMinusDec (iCode * ic) +{ + unsigned int icount; + operand *left; + operand *result; + bool needpulx; + bool needpulh; + unsigned int size = getDataSize (IC_RESULT (ic)); +// int offset; +// symbol *tlbl; + + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + /* will try to generate an increment */ + /* if the right side is not a literal + we cannot */ + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) + return FALSE; + + icount = (unsigned int) ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit); + + if ((AOP_TYPE (left) == AOP_DIR) && (AOP_TYPE (result) == AOP_DIR) + && (icount>=-127) && (icount<=128) && (size==2)) + { + if (!IS_AOP_HX (AOP (left))) + { + needpulx = pushRegIfUsed (hc08_reg_x); + needpulh = pushRegIfUsed (hc08_reg_h); + } + else + { + needpulx = FALSE; + needpulh = FALSE; + } + loadRegFromAop (hc08_reg_hx, AOP(left), 0); + emitcode ("aix","#%d", -(int) icount); + hc08_dirtyReg (hc08_reg_hx, FALSE); + storeRegToAop (hc08_reg_hx, AOP(result), 0); + pullOrFreeReg (hc08_reg_h, needpulh); + pullOrFreeReg (hc08_reg_x, needpulx); + return TRUE; + } + + if ((icount > 1) || (icount<0)) + return FALSE; + + if (!sameRegs (AOP (left), AOP (result))) + return FALSE; + + if (size!=1) + return FALSE; + + D(emitcode ("; genMinusDec","")); + + rmwWithAop ("dec", AOP (result), 0); + + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* addSign - complete with sign */ +/*-----------------------------------------------------------------*/ +static void +addSign (operand * result, int offset, int sign) +{ + int size = (getDataSize (result) - offset); + if (size > 0) + { + if (sign) + { + emitcode ("rola", ""); + emitcode ("clra", ""); + emitcode ("sbc", zero); + while (size--) + storeRegToAop (hc08_reg_a, AOP (result), offset++); + } + else + while (size--) + storeConstToAop (zero, AOP (result), offset++); + } +} + + +/*-----------------------------------------------------------------*/ +/* genMinus - generates code for subtraction */ +/*-----------------------------------------------------------------*/ +static void +genMinus (iCode * ic) +{ + char *sub; + int size, offset = 0; + + asmop *leftOp, *rightOp; + + D(emitcode ("; genMinus","")); + + aopOp (IC_LEFT (ic), ic, FALSE); + aopOp (IC_RIGHT (ic), ic, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE); + + /* special cases :- */ + /* if I can do an decrement instead + of subtract then GOOD for ME */ + if (genMinusDec (ic) == TRUE) + goto release; + + size = getDataSize (IC_RESULT (ic)); + + + leftOp = AOP(IC_LEFT(ic)); + rightOp = AOP(IC_RIGHT(ic)); + sub = "sub"; + offset = 0; + + if (IS_AOP_A (rightOp)) + { + loadRegFromAop ( hc08_reg_a, rightOp, offset); + accopWithAop (sub, leftOp, offset); + accopWithMisc ("nega", ""); + storeRegToAop (hc08_reg_a, AOP (IC_RESULT (ic)), offset++); + goto release; + } + + while (size--) + { + loadRegFromAop ( hc08_reg_a, leftOp, offset); + accopWithAop (sub, rightOp, offset); + storeRegToAop (hc08_reg_a, AOP (IC_RESULT (ic)), offset++); + sub = "sbc"; + } + + +// adjustArithmeticResult (ic); + +release: + freeAsmop (IC_LEFT (ic), NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (IC_RIGHT (ic), NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); +} + + + +/*-----------------------------------------------------------------*/ +/* genMultOneByte : 8*8=8/16 bit multiplication */ +/*-----------------------------------------------------------------*/ +static void +genMultOneByte (operand * left, + operand * right, + operand * result) +{ + /* sym_link *opetype = operandType (result); */ + symbol *tlbl1, *tlbl2, *tlbl3, *tlbl4; + int size=AOP_SIZE(result); + bool negLiteral = FALSE; + bool lUnsigned, rUnsigned; + + D(emitcode ("; genMultOneByte","")); + + if (size<1 || size>2) { + // this should never happen + fprintf (stderr, "size!=1||2 (%d) in %s at line:%d \n", + AOP_SIZE(result), __FILE__, lineno); + exit (1); + } + + /* (if two literals: the value is computed before) */ + /* if one literal, literal on the right */ + if (AOP_TYPE (left) == AOP_LIT) + { + operand *t = right; + right = left; + left = t; + } + /* if an operand is in A, make sure it is on the left */ + if (IS_AOP_A (AOP (right))) + { + operand *t = right; + right = left; + left = t; + } + + lUnsigned = SPEC_USIGN (getSpec (operandType (left))); + rUnsigned = SPEC_USIGN (getSpec (operandType (right))); + + /* lUnsigned rUnsigned negLiteral negate case */ + /* false false false odd 3 */ + /* false false true even 3 */ + /* false true false odd 3 */ + /* false true true impossible */ + /* true false false odd 3 */ + /* true false true always 2 */ + /* true true false never 1 */ + /* true true true impossible */ + + /* case 1 */ + if (size == 1 + || (lUnsigned && rUnsigned)) + { + // just an unsigned 8*8=8/16 multiply + //DD(emitcode (";","unsigned")); + + loadRegFromAop (hc08_reg_a, AOP (left), 0); + loadRegFromAop (hc08_reg_x, AOP (right), 0); + emitcode ("mul", ""); + hc08_dirtyReg (hc08_reg_xa, FALSE); + storeRegToFullAop (hc08_reg_xa, AOP (result), TRUE); + hc08_freeReg (hc08_reg_xa); + + return; + } + + // we have to do a signed multiply + + /* case 2 */ + /* left unsigned, right signed literal -- literal determines sign handling */ + if (AOP_TYPE(right)==AOP_LIT && lUnsigned && !rUnsigned) + { + signed char val=(signed char) ulFromVal (AOP (right)->aopu.aop_lit); + + loadRegFromAop (hc08_reg_a, AOP (left), 0); + if (val < 0) + emitcode ("ldx", "#0x%02x", -val); + else + emitcode ("ldx", "#0x%02x", val); + + emitcode ("mul", ""); + + if (val < 0) + { + rmwWithReg ("neg", hc08_reg_a); + tlbl4 = newiTempLabel (NULL); + emitBranch ("bcc", tlbl4); + rmwWithReg ("inc", hc08_reg_x); + emitLabel (tlbl4); + rmwWithReg ("neg", hc08_reg_x); + } + + hc08_dirtyReg (hc08_reg_xa, FALSE); + storeRegToFullAop (hc08_reg_xa, AOP (result), TRUE); + hc08_freeReg (hc08_reg_xa); + return; + } + + + /* case 3 */ + adjustStack (-1); + emitcode ("clr", "1,s"); + + loadRegFromAop (hc08_reg_a, AOP (left), 0); + if (!lUnsigned) + { + tlbl1 = newiTempLabel (NULL); + emitcode ("tsta",""); + emitBranch ("bpl", tlbl1); + emitcode ("inc", "1,s"); + rmwWithReg ("neg", hc08_reg_a); + emitLabel (tlbl1); + } + + if (AOP_TYPE(right)==AOP_LIT && !rUnsigned) + { + signed char val=(signed char) ulFromVal (AOP (right)->aopu.aop_lit); + /* AND literal negative */ + if (val < 0) { + emitcode ("ldx", "#0x%02x", -val); + negLiteral = TRUE; + } else { + emitcode ("ldx", "#0x%02x", val); + } + hc08_useReg (hc08_reg_x); + } + else + { + loadRegFromAop (hc08_reg_x, AOP (right), 0); + if (!rUnsigned) + { + tlbl2 = newiTempLabel (NULL); + emitcode ("tstx", ""); + emitBranch ("bpl", tlbl2); + emitcode ("inc", "1,s"); + rmwWithReg ("neg", hc08_reg_x); + emitLabel (tlbl2); + } + } + + emitcode ("mul", ""); + hc08_dirtyReg (hc08_reg_xa, FALSE); + + tlbl3 = newiTempLabel (NULL); + emitcode ("dec", "1,s"); + if (!lUnsigned && !rUnsigned && negLiteral) + emitBranch ("beq", tlbl3); + else + emitBranch ("bne", tlbl3); + + rmwWithReg ("neg", hc08_reg_a); + tlbl4 = newiTempLabel (NULL); + emitBranch ("bcc", tlbl4); + rmwWithReg ("inc", hc08_reg_x); + emitLabel (tlbl4); + rmwWithReg ("neg", hc08_reg_x); + + emitLabel (tlbl3); + adjustStack (1); + storeRegToFullAop (hc08_reg_xa, AOP (result), TRUE); + hc08_freeReg (hc08_reg_xa); + +} + +/*-----------------------------------------------------------------*/ +/* genMult - generates code for multiplication */ +/*-----------------------------------------------------------------*/ +static void +genMult (iCode * ic) +{ + operand *left = IC_LEFT (ic); + operand *right = IC_RIGHT (ic); + operand *result = IC_RESULT (ic); + + D(emitcode ("; genMult","")); + + /* assign the amsops */ + aopOp (left, ic, FALSE); + aopOp (right, ic, FALSE); + aopOp (result, ic, TRUE); + + /* special cases first */ + /* if both are of size == 1 */ +// if (getSize(operandType(left)) == 1 && +// getSize(operandType(right)) == 1) + if (AOP_SIZE (left) == 1 && + AOP_SIZE (right) == 1) + { + genMultOneByte (left, right, result); + goto release; + } + + /* should have been converted to function call */ + fprintf (stderr, "left: %d right: %d\n", getSize(OP_SYMBOL(left)->type), + getSize(OP_SYMBOL(right)->type)); + fprintf (stderr, "left: %d right: %d\n", AOP_SIZE (left), + AOP_SIZE (right)); + assert (0); + +release: + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genDivOneByte : 8 bit division */ +/*-----------------------------------------------------------------*/ +static void +genDivOneByte (operand * left, + operand * right, + operand * result) +{ + symbol *tlbl1, *tlbl2, *tlbl3; + int size; + int offset = 0; + bool lUnsigned, rUnsigned; + bool runtimeSign, compiletimeSign; + + lUnsigned = SPEC_USIGN (getSpec (operandType (left))); + rUnsigned = SPEC_USIGN (getSpec (operandType (right))); + + D(emitcode ("; genDivOneByte","")); + + size = AOP_SIZE (result); + /* signed or unsigned */ + if (lUnsigned && rUnsigned) + { + /* unsigned is easy */ + loadRegFromAop (hc08_reg_h, AOP (left), 1); + loadRegFromAop (hc08_reg_x, AOP (right), 0); + loadRegFromAop (hc08_reg_a, AOP (left), 0); + emitcode ("div", ""); + hc08_dirtyReg (hc08_reg_a, FALSE); + hc08_dirtyReg (hc08_reg_h, FALSE); + storeRegToFullAop (hc08_reg_a, AOP (result), FALSE); + hc08_freeReg (hc08_reg_a); + hc08_freeReg (hc08_reg_x); + hc08_freeReg (hc08_reg_h); + return; + } + + /* signed is a little bit more difficult */ + + /* now sign adjust for both left & right */ + + /* let's see what's needed: */ + /* apply negative sign during runtime */ + runtimeSign = FALSE; + /* negative sign from literals */ + compiletimeSign = FALSE; + + if (!lUnsigned) + { + if (AOP_TYPE(left) == AOP_LIT) + { + /* signed literal */ + signed char val = (char) ulFromVal (AOP (left)->aopu.aop_lit); + if (val < 0) + compiletimeSign = TRUE; + } + else + /* signed but not literal */ + runtimeSign = TRUE; + } + + if (!rUnsigned) + { + if (AOP_TYPE(right) == AOP_LIT) + { + /* signed literal */ + signed char val = (char) ulFromVal (AOP (right)->aopu.aop_lit); + if (val < 0) + compiletimeSign ^= TRUE; + } + else + /* signed but not literal */ + runtimeSign = TRUE; + } + + /* initialize the runtime sign */ + if (runtimeSign) + { + if (compiletimeSign) + loadRegFromConst (hc08_reg_x, "#1"); /* set sign flag */ + else + loadRegFromConst (hc08_reg_x, zero); /* reset sign flag */ + pushReg (hc08_reg_x, TRUE); + } + + /* save the signs of the operands */ + if (AOP_TYPE(right) == AOP_LIT) + { + signed char val = (char) ulFromVal (AOP (right)->aopu.aop_lit); + + if (!rUnsigned && val < 0) + emitcode ("ldx", "#0x%02x", -val); + else + emitcode ("ldx", "#0x%02x", (unsigned char) val); + } + else /* ! literal */ + { + loadRegFromAop (hc08_reg_x, AOP (right), 0); + if (!rUnsigned) + { + tlbl1 = newiTempLabel (NULL); + emitcode ("tstx", ""); + emitBranch ("bpl", tlbl1); + emitcode ("inc", "1,s"); + rmwWithReg ("neg", hc08_reg_x); + emitLabel (tlbl1); + } + } + + if (AOP_TYPE(left) == AOP_LIT) + { + signed char val = (char) ulFromVal (AOP (left)->aopu.aop_lit); + + if (!lUnsigned && val < 0) + emitcode ("lda", "#0x%02x", -val); + else + emitcode ("lda", "#0x%02x", (unsigned char) val); + } + else /* ! literal */ + { + loadRegFromAop (hc08_reg_a, AOP (left), 0); + if (!lUnsigned) + { + tlbl2 = newiTempLabel (NULL); + emitcode ("tsta", ""); + emitBranch ("bpl", tlbl2); + emitcode ("inc", "1,s"); + rmwWithReg ("neg", hc08_reg_a); + emitLabel (tlbl2); + } + } + + loadRegFromConst (hc08_reg_h, zero); + emitcode ("div", ""); + hc08_dirtyReg (hc08_reg_x, FALSE); + hc08_dirtyReg (hc08_reg_a, FALSE); + hc08_dirtyReg (hc08_reg_h, FALSE); + + if (runtimeSign || compiletimeSign) + { + tlbl3 = newiTempLabel (NULL); + if (runtimeSign) + { + pullReg (hc08_reg_x); + rmwWithReg ("lsr", hc08_reg_x); + rmwWithReg ("ror", hc08_reg_x); + emitBranch ("bpl", tlbl3); + } + + rmwWithReg ("neg", hc08_reg_a); + if (runtimeSign) + emitLabel (tlbl3); + + storeRegToAop (hc08_reg_a, AOP (result), 0); + + if (size > 1) + { + /* msb is 0x00 or 0xff depending on the sign */ + if (runtimeSign) + { + rmwWithReg ("lsl", hc08_reg_x); + emitcode ("clra", ""); + emitcode ("sbc", "#0"); + while (--size) + storeRegToAop (hc08_reg_a, AOP (result), ++offset); + } + else /* compiletimeSign */ + while (--size) + storeConstToAop ("#0xff", AOP (result), ++offset); + } + } + else + { + storeRegToFullAop (hc08_reg_a, AOP (result), FALSE); + } + + hc08_freeReg (hc08_reg_a); + hc08_freeReg (hc08_reg_x); + hc08_freeReg (hc08_reg_h); +} + +/*-----------------------------------------------------------------*/ +/* genDiv - generates code for division */ +/*-----------------------------------------------------------------*/ +static void +genDiv (iCode * ic) +{ + operand *left = IC_LEFT (ic); + operand *right = IC_RIGHT (ic); + operand *result = IC_RESULT (ic); + + D(emitcode ("; genDiv","")); + + /* assign the amsops */ + aopOp (left, ic, FALSE); + aopOp (right, ic, FALSE); + aopOp (result, ic, TRUE); + + /* special cases first */ + /* if both are of size == 1 */ + if (AOP_SIZE (left) <= 2 && + AOP_SIZE (right) == 1) + { + genDivOneByte (left, right, result); + goto release; + } + + /* should have been converted to function call */ + assert (0); +release: + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genModOneByte : 8 bit modulus */ +/*-----------------------------------------------------------------*/ +static void +genModOneByte (operand * left, + operand * right, + operand * result) +{ + symbol *tlbl1, *tlbl2, *tlbl3; + int size; + int offset = 0; + bool lUnsigned, rUnsigned; + bool runtimeSign, compiletimeSign; + + lUnsigned = SPEC_USIGN (getSpec (operandType (left))); + rUnsigned = SPEC_USIGN (getSpec (operandType (right))); + + D(emitcode ("; genModOneByte","")); + + size = AOP_SIZE (result); + + if (lUnsigned && rUnsigned) + { + /* unsigned is easy */ + loadRegFromAop (hc08_reg_x, AOP (right), 0); + loadRegFromAop (hc08_reg_h, AOP (left), 1); + loadRegFromAop (hc08_reg_a, AOP (left), 0); + emitcode ("div", ""); + hc08_freeReg (hc08_reg_a); + hc08_freeReg (hc08_reg_x); + hc08_dirtyReg (hc08_reg_h, FALSE); + storeRegToFullAop (hc08_reg_h, AOP (result), FALSE); + hc08_freeReg (hc08_reg_h); + return; + } + + /* signed is a little bit more difficult */ + + if (AOP_TYPE(right) == AOP_LIT) + { + signed char val = (char) ulFromVal (AOP (right)->aopu.aop_lit); + + if (!rUnsigned && val < 0) + emitcode ("ldx", "#0x%02x", -val); + else + emitcode ("ldx", "#0x%02x", (unsigned char) val); + } + else /* ! literal */ + { + loadRegFromAop (hc08_reg_x, AOP (right), 0); + if (!rUnsigned) + { + tlbl1 = newiTempLabel (NULL); + emitcode ("tstx", ""); + emitBranch ("bpl", tlbl1); + rmwWithReg ("neg", hc08_reg_x); + emitLabel (tlbl1); + } + } + + /* let's see what's needed: */ + /* apply negative sign during runtime */ + runtimeSign = FALSE; + /* negative sign from literals */ + compiletimeSign = FALSE; + + /* sign adjust left side */ + if (AOP_TYPE(left) == AOP_LIT) + { + signed char val = (char) ulFromVal (AOP (left)->aopu.aop_lit); + + if (!lUnsigned && val < 0) + { + compiletimeSign = TRUE; /* set sign flag */ + emitcode ("lda", "#0x%02x", -val); + } + else + emitcode ("lda", "#0x%02x", (unsigned char) val); + } + else /* ! literal */ + { + if (lUnsigned) + loadRegFromAop (hc08_reg_a, AOP (left), 0); + else + { + runtimeSign = TRUE; + adjustStack (-1); + emitcode ("clr", "1,s"); + + loadRegFromAop (hc08_reg_a, AOP (left), 0); + tlbl2 = newiTempLabel (NULL); + emitcode ("tsta", ""); + emitBranch ("bpl", tlbl2); + emitcode ("inc", "1,s"); + rmwWithReg ("neg", hc08_reg_a); + emitLabel (tlbl2); + } + } + + loadRegFromConst (hc08_reg_h, zero); + emitcode ("div", ""); + hc08_freeReg (hc08_reg_a); + hc08_freeReg (hc08_reg_x); + hc08_dirtyReg (hc08_reg_h, FALSE); + + if (runtimeSign || compiletimeSign) + { + transferRegReg (hc08_reg_h, hc08_reg_a, TRUE); + tlbl3 = newiTempLabel (NULL); + if (runtimeSign) + { + pullReg (hc08_reg_x); + rmwWithReg ("lsr", hc08_reg_x); + rmwWithReg ("ror", hc08_reg_x); + emitBranch ("bpl", tlbl3); + } + + rmwWithReg ("neg", hc08_reg_a); + if (runtimeSign) + emitLabel (tlbl3); + + storeRegToAop (hc08_reg_a, AOP (result), 0); + + if (size > 1) + { + /* msb is 0x00 or 0xff depending on the sign */ + if (runtimeSign) + { + rmwWithReg ("lsl", hc08_reg_x); + emitcode ("clra", ""); + emitcode ("sbc", "#0"); + while (--size) + storeRegToAop (hc08_reg_a, AOP (result), ++offset); + } + else /* compiletimeSign */ + while (--size) + storeConstToAop ("#0xff", AOP (result), ++offset); + } + } + else + { + storeRegToFullAop (hc08_reg_h, AOP (result), FALSE); + } + + hc08_freeReg (hc08_reg_a); + hc08_freeReg (hc08_reg_x); + hc08_freeReg (hc08_reg_h); +} + +/*-----------------------------------------------------------------*/ +/* genMod - generates code for division */ +/*-----------------------------------------------------------------*/ +static void +genMod (iCode * ic) +{ + operand *left = IC_LEFT (ic); + operand *right = IC_RIGHT (ic); + operand *result = IC_RESULT (ic); + + D(emitcode ("; genMod","")); + + /* assign the amsops */ + aopOp (left, ic, FALSE); + aopOp (right, ic, FALSE); + aopOp (result, ic, TRUE); + + /* special cases first */ + /* if both are of size == 1 */ + if (AOP_SIZE (left) <= 2 && + AOP_SIZE (right) == 1) + { + genModOneByte (left, right, result); + goto release; + } + + /* should have been converted to function call */ + assert (0); + +release: + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genIfxJump :- will create a jump depending on the ifx */ +/*-----------------------------------------------------------------*/ +static void +genIfxJump (iCode * ic, char *jval) +{ + symbol *jlbl; + symbol *tlbl = newiTempLabel (NULL); + char *inst; + + D(emitcode ("; genIfxJump","")); + + /* if true label then we jump if condition + supplied is true */ + if (IC_TRUE (ic)) + { + jlbl = IC_TRUE (ic); + if (!strcmp (jval, "a")) + inst = "beq"; + else if (!strcmp (jval, "c")) + inst = "bcc"; + else + inst = "bge"; + } + else + { + /* false label is present */ + jlbl = IC_FALSE (ic); + if (!strcmp (jval, "a")) + inst = "bne"; + else if (!strcmp (jval, "c")) + inst = "bcs"; + else + inst = "blt"; + } + emitBranch (inst, tlbl); + emitBranch ("jmp", jlbl); + emitLabel (tlbl); + + /* mark the icode as generated */ + ic->generated = 1; +} + + +/*-----------------------------------------------------------------*/ +/* exchangedCmp : returns the opcode need if the two operands are */ +/* exchanged in a comparison */ +/*-----------------------------------------------------------------*/ +static int +exchangedCmp (int opcode) +{ + switch (opcode) + { + case '<': + return '>'; + case '>': + return '<'; + case LE_OP: + return GE_OP; + case GE_OP: + return LE_OP; + case NE_OP: + return NE_OP; + case EQ_OP: + return EQ_OP; + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "opcode not a comparison"); + } + return EQ_OP; /* shouldn't happen, but need to return something */ +} + +/*------------------------------------------------------------------*/ +/* negatedCmp : returns the equivalent opcode for when a comparison */ +/* if not true */ +/*------------------------------------------------------------------*/ +static int +negatedCmp (int opcode) +{ + switch (opcode) + { + case '<': + return GE_OP; + case '>': + return LE_OP; + case LE_OP: + return '>'; + case GE_OP: + return '<'; + case NE_OP: + return EQ_OP; + case EQ_OP: + return NE_OP; + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "opcode not a comparison"); + } + return EQ_OP; /* shouldn't happen, but need to return something */ +} + +/*------------------------------------------------------------------*/ +/* nameCmp : helper function for human readable debug output */ +/*------------------------------------------------------------------*/ +static char * +nameCmp (int opcode) +{ + switch (opcode) + { + case '<': + return "<"; + case '>': + return ">"; + case LE_OP: + return "<="; + case GE_OP: + return ">="; + case NE_OP: + return "!="; + case EQ_OP: + return "=="; + default: + return "invalid"; + } +} + +/*------------------------------------------------------------------*/ +/* branchInstCmp : returns the conditional branch instruction that */ +/* will branch if the comparison is true */ +/*------------------------------------------------------------------*/ +static char * +branchInstCmp (int opcode, int sign) +{ + switch (opcode) + { + case '<': + if (sign) + return "blt"; + else + return "bcs"; /* same as blo */ + case '>': + if (sign) + return "bgt"; + else + return "bhi"; + case LE_OP: + if (sign) + return "ble"; + else + return "bls"; + case GE_OP: + if (sign) + return "bge"; + else + return "bcc"; /* same as bhs */ + case NE_OP: + return "bne"; + case EQ_OP: + return "beq"; + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "opcode not a comparison"); + } + return "brn"; +} + + +/*------------------------------------------------------------------*/ +/* genCmp :- greater or less than (and maybe with equal) comparison */ +/*------------------------------------------------------------------*/ +static void +genCmp (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + sym_link *letype, *retype; + int sign, opcode; + int size, offset = 0; + unsigned long lit = 0L; + char *sub; + symbol *jlbl = NULL; + + opcode = ic->op; + + D(emitcode ("; genCmp", "(%s)",nameCmp (opcode))); + + result = IC_RESULT (ic); + left = IC_LEFT (ic); + right = IC_RIGHT (ic); + + letype = getSpec (operandType (left)); + retype = getSpec (operandType (right)); + sign = !(SPEC_USIGN (letype) | SPEC_USIGN (retype)); + /* assign the amsops */ + aopOp (left, ic, FALSE); + aopOp (right, ic, FALSE); + aopOp (result, ic, TRUE); + + /* need register operand on left, prefer literal operand on right */ + if ((AOP_TYPE (right) == AOP_REG) || AOP_TYPE (left) == AOP_LIT) + { + operand *temp = left; + left = right; + right = temp; + opcode = exchangedCmp (opcode); + } + + if (ifx) + { + if (IC_TRUE (ifx)) + { + jlbl = IC_TRUE (ifx); + opcode = negatedCmp (opcode); + } + else + { + /* false label is present */ + jlbl = IC_FALSE (ifx); + } + } + + size = max (AOP_SIZE (left), AOP_SIZE (right)); + + if ((size == 2) + && ((AOP_TYPE (left) == AOP_DIR) && (AOP_SIZE (left) == 2)) + && ((AOP_TYPE (right) == AOP_LIT) || + ((AOP_TYPE (right) == AOP_DIR) && (AOP_SIZE (right) == 2)) ) + && hc08_reg_hx->isFree) + { + loadRegFromAop (hc08_reg_hx, AOP (left), 0); + emitcode ("cphx","%s", aopAdrStr (AOP (right), 1, TRUE)); + hc08_freeReg (hc08_reg_hx); + } + else + { + offset = 0; + if (size == 1) + sub = "cmp"; + else + { + sub = "sub"; + + /* These conditions depend on the Z flag bit, but Z is */ + /* only valid for the last byte of the comparison, not */ + /* the whole value. So exchange the operands to get a */ + /* comparison that doesn't depend on Z. (This is safe */ + /* to do here since ralloc won't assign multi-byte */ + /* operands to registers for comparisons) */ + if ((opcode == '>') || (opcode == LE_OP)) + { + operand *temp = left; + left = right; + right = temp; + opcode = exchangedCmp (opcode); + } + + if ((AOP_TYPE (right) == AOP_LIT) && !isOperandVolatile (left, FALSE)) + { + lit = ulFromVal (AOP (right)->aopu.aop_lit); + while ((size > 1) && (((lit >> (8*offset)) & 0xff) == 0)) + { + offset++; + size--; + } + } + } + while (size--) + { + loadRegFromAop (hc08_reg_a, AOP (left), offset); + accopWithAop (sub, AOP (right), offset); + hc08_freeReg (hc08_reg_a); + offset++; + sub = "sbc"; + } + } + freeAsmop (right, NULL, ic, FALSE); + freeAsmop (left, NULL, ic, FALSE); + + if (ifx) + { + symbol *tlbl = newiTempLabel (NULL); + char *inst; + + freeAsmop (result, NULL, ic, TRUE); + + inst = branchInstCmp (opcode, sign); + emitBranch (inst, tlbl); + emitBranch ("jmp", jlbl); + emitLabel (tlbl); + + /* mark the icode as generated */ + ifx->generated = 1; + } + else + { + symbol *tlbl1 = newiTempLabel (NULL); + symbol *tlbl2 = newiTempLabel (NULL); + + emitBranch (branchInstCmp (opcode, sign), tlbl1); + loadRegFromConst (hc08_reg_a, zero); + emitBranch ("bra", tlbl2); + emitLabel (tlbl1); + loadRegFromConst (hc08_reg_a, one); + emitLabel (tlbl2); + storeRegToFullAop (hc08_reg_a, AOP(result), FALSE); + freeAsmop (result, NULL, ic, TRUE); + } + +} + +/*-----------------------------------------------------------------*/ +/* genCmpEQorNE - equal or not equal comparison */ +/*-----------------------------------------------------------------*/ +static void +genCmpEQorNE (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + sym_link *letype, *retype; + int sign, opcode; + int size, offset = 0; + char *sub; + symbol *jlbl = NULL; + symbol *tlbl_NE = NULL; + symbol *tlbl_EQ = NULL; + + opcode = ic->op; + + D(emitcode ("; genCmpEQorNE", "(%s)",nameCmp (opcode))); + + result = IC_RESULT (ic); + left = IC_LEFT (ic); + right = IC_RIGHT (ic); + + letype = getSpec (operandType (left)); + retype = getSpec (operandType (right)); + sign = !(SPEC_USIGN (letype) | SPEC_USIGN (retype)); + /* assign the amsops */ + aopOp (left, ic, FALSE); + aopOp (right, ic, FALSE); + aopOp (result, ic, TRUE); + + /* need register operand on left, prefer literal operand on right */ + if ((AOP_TYPE (right) == AOP_REG) || AOP_TYPE (left) == AOP_LIT) + { + operand *temp = left; + left = right; + right = temp; + opcode = exchangedCmp (opcode); + } + + if (ifx) + { + if (IC_TRUE (ifx)) + { + jlbl = IC_TRUE (ifx); + opcode = negatedCmp (opcode); + } + else + { + /* false label is present */ + jlbl = IC_FALSE (ifx); + } + } + + size = max (AOP_SIZE (left), AOP_SIZE (right)); + + if ((size == 2) + && ((AOP_TYPE (left) == AOP_DIR) && (AOP_SIZE (left) == 2)) + && ((AOP_TYPE (right) == AOP_LIT) || + ((AOP_TYPE (right) == AOP_DIR) && (AOP_SIZE (right) == 2)) ) + && hc08_reg_hx->isFree) + { + loadRegFromAop (hc08_reg_hx, AOP (left), 0); + emitcode ("cphx","%s", aopAdrStr (AOP (right), 1, TRUE)); + hc08_freeReg (hc08_reg_hx); + } + else + { + offset = 0; + sub = "cmp"; + while (size--) + { + loadRegFromAop (hc08_reg_a, AOP (left), offset); + accopWithAop (sub, AOP (right), offset); + if (size) + { + if (!tlbl_NE) + tlbl_NE = newiTempLabel (NULL); + emitBranch ("bne", tlbl_NE); + } + hc08_freeReg (hc08_reg_a); + offset++; + } + } + freeAsmop (right, NULL, ic, FALSE); + freeAsmop (left, NULL, ic, FALSE); + + if (ifx) + { + freeAsmop (result, NULL, ic, TRUE); + + if (opcode == EQ_OP) + { + if (!tlbl_EQ) + tlbl_EQ = newiTempLabel (NULL); + emitBranch ("beq", tlbl_EQ); + if (tlbl_NE) + emitLabel (tlbl_NE); + emitBranch ("jmp", jlbl); + emitLabel (tlbl_EQ); + } + else + { + if (!tlbl_NE) + tlbl_NE = newiTempLabel (NULL); + emitBranch ("bne", tlbl_NE); + emitBranch ("jmp", jlbl); + emitLabel (tlbl_NE); + } + + /* mark the icode as generated */ + ifx->generated = 1; + } + else + { + symbol *tlbl = newiTempLabel (NULL); + + if (opcode == EQ_OP) + { + if (!tlbl_EQ) + tlbl_EQ = newiTempLabel (NULL); + emitBranch ("beq", tlbl_EQ); + if (tlbl_NE) + emitLabel (tlbl_NE); + loadRegFromConst (hc08_reg_a, zero); + emitBranch ("bra", tlbl); + emitLabel (tlbl_EQ); + loadRegFromConst (hc08_reg_a, one); + } + else + { + if (!tlbl_NE) + tlbl_NE = newiTempLabel (NULL); + emitBranch ("bne", tlbl_NE); + loadRegFromConst (hc08_reg_a, zero); + emitBranch ("bra", tlbl); + emitLabel (tlbl_NE); + loadRegFromConst (hc08_reg_a, one); + } + + emitLabel (tlbl); + storeRegToFullAop (hc08_reg_a, AOP(result), FALSE); + freeAsmop (result, NULL, ic, TRUE); + } + +} + + +/*-----------------------------------------------------------------*/ +/* ifxForOp - returns the icode containing the ifx for operand */ +/*-----------------------------------------------------------------*/ +static iCode * +ifxForOp (operand * op, iCode * ic) +{ + /* if true symbol then needs to be assigned */ + if (IS_TRUE_SYMOP (op)) + return NULL; + + /* if this has register type condition and + the next instruction is ifx with the same operand + and live to of the operand is upto the ifx only then */ + if (ic->next && + ic->next->op == IFX && + IC_COND (ic->next)->key == op->key && + OP_SYMBOL (op)->liveTo <= ic->next->seq) + return ic->next; + + return NULL; +} + +static bool +genPointerGetSetOfs (iCode *ic) +{ + iCode *lic = ic->next; + bool pset, pget; + int size; + symbol *sym; + asmop *derefaop; + + /* Make sure we have a next iCode */ + DD(emitcode("","; checking lic")); + if (!lic) + return FALSE; + + /* Make sure the result of the addition is an iCode */ + DD(emitcode("","; checking IS_ITEMP")); + if (!IS_ITEMP (IC_RESULT (ic))) + return FALSE; + + /* Make sure the next iCode is a pointer set or get */ + pset = POINTER_SET(lic); + pget = POINTER_GET(lic); + DD(emitcode("","; pset=%d, pget=%d",pset,pget)); + if (!pset && !pget) + return FALSE; + + /* Make sure this is the only use of the pointer */ + if (bitVectnBitsOn (OP_USES (IC_RESULT (ic))) > 1) + return FALSE; + + DD(emitcode("", "; checking pset operandsEqu")); + if (pset & !operandsEqu (IC_RESULT (ic), IC_RESULT (lic))) + return FALSE; + + DD(emitcode("", "; checking pget operandsEqu")); + if (pget & !operandsEqu (IC_RESULT (ic), IC_LEFT (lic))) + return FALSE; + + DD(emitcode("", "; checking IS_SYMOP")); + if (!IS_SYMOP (IC_LEFT (ic))) + return FALSE; + + DD(emitcode("", "; checking !IS_TRUE_SYMOP")); + if (IS_TRUE_SYMOP (IC_LEFT (ic))) + return FALSE; + + sym = OP_SYMBOL (IC_LEFT (ic)); + + DD(emitcode("", "; checking remat")); + if (!sym->remat) + return FALSE; + + + if (pget) + { + D(emitcode ("; genPointerGetOfs","")); + aopOp (IC_LEFT(ic), ic, FALSE); + derefaop = aopDerefAop (AOP (IC_LEFT (ic))); + freeAsmop (IC_LEFT(ic), NULL, ic, TRUE); + + aopOp (IC_RIGHT(ic), ic, FALSE); + aopOp (IC_RESULT(lic), lic, FALSE); + + if (AOP_SIZE (IC_RIGHT (ic)) == 1) + { + if (SPEC_USIGN (getSpec (operandType (IC_RIGHT (ic))))) + { + loadRegFromAop (hc08_reg_x, AOP (IC_RIGHT (ic)), 0); + loadRegFromConst (hc08_reg_h, zero); + } + else + { + loadRegFromAop (hc08_reg_a, AOP (IC_RIGHT (ic)), 0); + transferRegReg (hc08_reg_a, hc08_reg_x, FALSE); + emitcode ("rola",""); + emitcode ("clra",""); + emitcode ("sbc", "#0"); + hc08_useReg (hc08_reg_a); + transferRegReg (hc08_reg_a, hc08_reg_h, FALSE); + } + } + else + loadRegFromAop (hc08_reg_hx, AOP (IC_RIGHT (ic)), 0); + size = AOP_SIZE (IC_RESULT(lic)); + derefaop->size = size; + + while (size--) + { + emitcode ("lda", "%s,x", + aopAdrStr (derefaop, size, TRUE)); + hc08_useReg (hc08_reg_a); + storeRegToAop (hc08_reg_a, AOP (IC_RESULT (lic)), size); + hc08_freeReg (hc08_reg_a); + } + + lic->generated = 1; + hc08_freeReg (hc08_reg_hx); + + freeAsmop (NULL, derefaop, ic, TRUE); + freeAsmop (IC_RIGHT(ic), NULL, ic, TRUE); + freeAsmop (IC_RESULT(lic), NULL, lic, TRUE); + + return TRUE; + } + + if (pset) + { + D(emitcode ("; genPointerSetOfs","")); + aopOp (IC_LEFT(ic), ic, FALSE); + derefaop = aopDerefAop (AOP (IC_LEFT (ic))); + freeAsmop (IC_LEFT(ic), NULL, ic, TRUE); + + aopOp (IC_RIGHT(ic), ic, FALSE); + aopOp (IC_RIGHT(lic), lic, FALSE); + + if (AOP_SIZE (IC_RIGHT (ic)) == 1) + { + if (SPEC_USIGN (getSpec (operandType (IC_RIGHT (ic))))) + { + loadRegFromAop (hc08_reg_x, AOP (IC_RIGHT (ic)), 0); + loadRegFromConst (hc08_reg_h, zero); + } + else + { + loadRegFromAop (hc08_reg_a, AOP (IC_RIGHT (ic)), 0); + transferRegReg (hc08_reg_a, hc08_reg_x, FALSE); + emitcode ("rola",""); + emitcode ("clra",""); + emitcode ("sbc", "#0"); + hc08_useReg (hc08_reg_a); + transferRegReg (hc08_reg_a, hc08_reg_h, FALSE); + } + } + else + loadRegFromAop (hc08_reg_hx, AOP (IC_RIGHT (ic)), 0); + size = AOP_SIZE (IC_RIGHT(lic)); + derefaop->size = size; + + while (size--) + { + loadRegFromAop (hc08_reg_a, AOP (IC_RIGHT (lic)), size); + emitcode ("sta", "%s,x", + aopAdrStr (derefaop, size, TRUE)); + hc08_freeReg (hc08_reg_a); + } + + lic->generated = 1; + hc08_freeReg (hc08_reg_hx); + + freeAsmop (NULL, derefaop, ic, TRUE); + freeAsmop (IC_RIGHT(ic), NULL, ic, TRUE); + freeAsmop (IC_RIGHT(lic), NULL, lic, TRUE); + + return TRUE; + } + + return FALSE; +} + + +/*-----------------------------------------------------------------*/ +/* hasInc - operand is incremented before any other use */ +/*-----------------------------------------------------------------*/ +static iCode * +hasInc (operand *op, iCode *ic,int osize) +{ + sym_link *type = operandType(op); + sym_link *retype = getSpec (type); + iCode *lic = ic->next; + int isize ; + + /* this could from a cast, e.g.: "(char xdata *) 0x7654;" */ + if (!IS_SYMOP(op)) return NULL; + + if (IS_BITVAR(retype)||!IS_PTR(type)) return NULL; + if (IS_AGGREGATE(type->next)) return NULL; + if (osize != (isize = getSize(type->next))) return NULL; + + while (lic) { + /* if operand of the form op = op + */ + if (lic->op == '+' && isOperandEqual(IC_LEFT(lic),op) && + isOperandEqual(IC_RESULT(lic),op) && + isOperandLiteral(IC_RIGHT(lic)) && + operandLitValue(IC_RIGHT(lic)) == isize) { + return lic; + } + /* if the operand used or deffed */ + if (bitVectBitValue(OP_USES(op),lic->key) || lic->defKey == op->key) { + return NULL; + } + /* if GOTO or IFX */ + if (lic->op == IFX || lic->op == GOTO || lic->op == LABEL) break; + lic = lic->next; + } + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* genAndOp - for && operation */ +/*-----------------------------------------------------------------*/ +static void +genAndOp (iCode * ic) +{ + operand *left, *right, *result; + symbol *tlbl, *tlbl0; + + D(emitcode ("; genAndOp","")); + + /* note here that && operations that are in an + if statement are taken away by backPatchLabels + only those used in arthmetic operations remain */ + aopOp ((left = IC_LEFT (ic)), ic, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, FALSE); + + tlbl = newiTempLabel (NULL); + tlbl0 = newiTempLabel (NULL); + + asmopToBool (AOP (left), FALSE); + emitBranch ("beq", tlbl0); + asmopToBool (AOP (right), FALSE); + emitBranch ("beq", tlbl0); + loadRegFromConst (hc08_reg_a,one); + emitBranch ("bra", tlbl); + emitLabel (tlbl0); + loadRegFromConst (hc08_reg_a,zero); + emitLabel (tlbl); + + hc08_useReg (hc08_reg_a); + hc08_freeReg (hc08_reg_a); + + storeRegToFullAop (hc08_reg_a, AOP (result), FALSE); + + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (result, NULL, ic, TRUE); +} + + +/*-----------------------------------------------------------------*/ +/* genOrOp - for || operation */ +/*-----------------------------------------------------------------*/ +static void +genOrOp (iCode * ic) +{ + operand *left, *right, *result; + symbol *tlbl, *tlbl0; + + D(emitcode ("; genOrOp","")); + + /* note here that || operations that are in an + if statement are taken away by backPatchLabels + only those used in arthmetic operations remain */ + aopOp ((left = IC_LEFT (ic)), ic, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, FALSE); + + tlbl = newiTempLabel (NULL); + tlbl0 = newiTempLabel (NULL); + + asmopToBool (AOP (left), FALSE); + emitBranch ("bne", tlbl0); + asmopToBool (AOP (right), FALSE); + emitBranch ("bne", tlbl0); + loadRegFromConst (hc08_reg_a,zero); + emitBranch ("bra", tlbl); + emitLabel (tlbl0); + loadRegFromConst (hc08_reg_a,one); + emitLabel (tlbl); + + hc08_useReg (hc08_reg_a); + hc08_freeReg (hc08_reg_a); + + storeRegToFullAop (hc08_reg_a, AOP (result), FALSE); + + + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* isLiteralBit - test if lit == 2^n */ +/*-----------------------------------------------------------------*/ +static int +isLiteralBit (unsigned long lit) +{ + unsigned long pw[32] = + {1L, 2L, 4L, 8L, 16L, 32L, 64L, 128L, + 0x100L, 0x200L, 0x400L, 0x800L, + 0x1000L, 0x2000L, 0x4000L, 0x8000L, + 0x10000L, 0x20000L, 0x40000L, 0x80000L, + 0x100000L, 0x200000L, 0x400000L, 0x800000L, + 0x1000000L, 0x2000000L, 0x4000000L, 0x8000000L, + 0x10000000L, 0x20000000L, 0x40000000L, 0x80000000L}; + int idx; + + for (idx = 0; idx < 32; idx++) + if (lit == pw[idx]) + return idx + 1; + return 0; +} + +#if 0 +/*-----------------------------------------------------------------*/ +/* continueIfTrue - */ +/*-----------------------------------------------------------------*/ +static void +continueIfTrue (iCode * ic) +{ + if (IC_TRUE (ic)) + emitBranch ("jmp", IC_TRUE (ic)); + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* jmpIfTrue - */ +/*-----------------------------------------------------------------*/ +static void +jumpIfTrue (iCode * ic) +{ + if (!IC_TRUE (ic)) + emitBranch ("jmp", IC_FALSE (ic)); + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* jmpTrueOrFalse - */ +/*-----------------------------------------------------------------*/ +static void +jmpTrueOrFalse (iCode * ic, symbol * tlbl) +{ + // ugly but optimized by peephole + if (IC_TRUE (ic)) + { + symbol *nlbl = newiTempLabel (NULL); + emitBranch ("bra", nlbl); + emitLabel (tlbl); + emitBranch ("jmp", IC_TRUE (ic)); + emitLabel (nlbl); + } + else + { + emitBranch ("jmp", IC_FALSE (ic)); + emitLabel (tlbl); + } + ic->generated = 1; +} +#endif + +/*-----------------------------------------------------------------*/ +/* genAnd - code for and */ +/*-----------------------------------------------------------------*/ +static void +genAnd (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + int size, offset = 0; + unsigned long lit = 0L; + unsigned long litinv; + unsigned char bytemask; + + +// int bytelit = 0; +// char buffer[10]; + + D(emitcode ("; genAnd","")); + + aopOp ((left = IC_LEFT (ic)), ic, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, TRUE); + +#ifdef DEBUG_TYPE + DD(emitcode ("", "; Type res[%d] = l[%d]&r[%d]", + AOP_TYPE (result), + AOP_TYPE (left), AOP_TYPE (right))); + DD(emitcode ("", "; Size res[%d] = l[%d]&r[%d]", + AOP_SIZE (result), + AOP_SIZE (left), AOP_SIZE (right))); +#endif + + /* if left is a literal & right is not then exchange them */ + if (AOP_TYPE (left) == AOP_LIT && AOP_TYPE (right) != AOP_LIT) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if right is accumulator & left is not then exchange them */ + if (AOP_TYPE (right) == AOP_REG && AOP_TYPE (left) != AOP_REG) + { + operand *tmp = right; + right = left; + left = tmp; + } + + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + size = (AOP_SIZE (left) >= AOP_SIZE (right)) ? AOP_SIZE (left) : AOP_SIZE (right); + + if (AOP_TYPE (result) == AOP_CRY + && size > 1 + && (isOperandVolatile (left, FALSE) || isOperandVolatile (right, FALSE))) + { + /* this generates ugly code, but meets volatility requirements */ + loadRegFromConst (hc08_reg_a, zero); + pushReg (hc08_reg_a, TRUE); + + offset = 0; + while (size--) + { + loadRegFromAop (hc08_reg_a, AOP (left), offset); + accopWithAop ("and", AOP (right), offset); + emitcode ("ora", "1,s"); + emitcode ("sta", "1,s"); + offset++; + } + + pullReg (hc08_reg_a); + emitcode ("tsta", ""); + genIfxJump (ifx, "a"); + goto release; + } + + if (AOP_TYPE (result) == AOP_CRY) + { + symbol *tlbl = NULL; + + offset = 0; + while (size--) + { + bytemask = (lit >> (offset*8)) & 0xff; + + if (AOP_TYPE (right) == AOP_LIT && bytemask == 0) + { + /* do nothing */ + } + else if (AOP_TYPE (right) == AOP_LIT && bytemask == 0xff) + { + rmwWithAop ("tst", AOP (left), offset); + if (size) + { + if (!tlbl) + tlbl = newiTempLabel (NULL); + emitBranch ("bne", tlbl); + } + } + else + { + loadRegFromAop (hc08_reg_a, AOP (left), offset); + accopWithAop ("and", AOP (right), offset); + hc08_freeReg( hc08_reg_a); + if (size) + { + if (!tlbl) + tlbl = newiTempLabel (NULL); + emitBranch ("bne", tlbl); + } + } + offset++; + } + if (tlbl) + emitLabel (tlbl); + if(ifx) + genIfxJump (ifx, "a"); + goto release; + } + + size = AOP_SIZE (result); + + if (AOP_TYPE (right) == AOP_LIT) + { + litinv = (~lit) & (((unsigned int)0xffffffff) >> (8*(4-size))) ; + if (sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic))) && + (AOP_TYPE (left) == AOP_DIR) && isLiteralBit(litinv)) + { + int bitpos = isLiteralBit(litinv)-1; + emitcode ("bclr","#%d,%s",bitpos & 7, + aopAdrStr (AOP (left), bitpos >> 3, FALSE)); + goto release; + } + } + + offset = 0; + while (size--) + { + bytemask = (lit >> (offset*8)) & 0xff; + + if (AOP_TYPE (right) == AOP_LIT && bytemask == 0) + { + if (isOperandVolatile (left, FALSE)) + { + loadRegFromAop (hc08_reg_a, AOP (left), offset); + hc08_freeReg( hc08_reg_a); + } + storeConstToAop (zero, AOP (result), offset); + } + else if (AOP_TYPE (right) == AOP_LIT && bytemask == 0xff) + { + transferAopAop (AOP (left), offset, AOP (result), offset); + } + else + { + loadRegFromAop (hc08_reg_a, AOP (left), offset); + accopWithAop ("and", AOP (right), offset); + storeRegToAop (hc08_reg_a, AOP (result), offset); + hc08_freeReg (hc08_reg_a); + } + offset++; + } + +release: + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genOr - code for or */ +/*-----------------------------------------------------------------*/ +static void +genOr (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + int size, offset = 0; + unsigned long lit = 0L; + unsigned char bytemask; + + D(emitcode ("; genOr","")); + + aopOp ((left = IC_LEFT (ic)), ic, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, TRUE); + +#ifdef DEBUG_TYPE + DD(emitcode ("", "; Type res[%d] = l[%d]&r[%d]", + AOP_TYPE (result), + AOP_TYPE (left), AOP_TYPE (right))); + DD(emitcode ("", "; Size res[%d] = l[%d]&r[%d]", + AOP_SIZE (result), + AOP_SIZE (left), AOP_SIZE (right))); +#endif + + /* if left is a literal & right is not then exchange them */ + if (AOP_TYPE (left) == AOP_LIT && AOP_TYPE (right) != AOP_LIT) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if left is accumulator & right is not then exchange them */ + if (AOP_TYPE (right) == AOP_REG && AOP_TYPE (left) != AOP_REG) + { + operand *tmp = right; + right = left; + left = tmp; + } + + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + size = (AOP_SIZE (left) >= AOP_SIZE (right)) ? AOP_SIZE (left) : AOP_SIZE (right); + + if (AOP_TYPE (result) == AOP_CRY + && size > 1 + && (isOperandVolatile (left, FALSE) || isOperandVolatile (right, FALSE))) + { + /* this generates ugly code, but meets volatility requirements */ + loadRegFromConst (hc08_reg_a, zero); + pushReg (hc08_reg_a, TRUE); + + offset = 0; + while (size--) + { + loadRegFromAop (hc08_reg_a, AOP (left), offset); + accopWithAop ("ora", AOP (right), offset); + emitcode ("ora", "1,s"); + emitcode ("sta", "1,s"); + offset++; + } + + pullReg (hc08_reg_a); + emitcode ("tsta", ""); + genIfxJump (ifx, "a"); + goto release; + } + + if (AOP_TYPE (result) == AOP_CRY) + { + symbol *tlbl = NULL; + + offset = 0; + while (size--) + { + bytemask = (lit >> (offset*8)) & 0xff; + + if (AOP_TYPE (right) == AOP_LIT && bytemask == 0x00) + { + rmwWithAop ("tst", AOP (left), offset); + if (size) + { + if (!tlbl) + tlbl = newiTempLabel (NULL); + emitBranch ("bne", tlbl); + } + } + else + { + loadRegFromAop (hc08_reg_a, AOP (left), offset); + accopWithAop ("ora", AOP (right), offset); + hc08_freeReg( hc08_reg_a); + if (size) + { + if (!tlbl) + tlbl = newiTempLabel (NULL); + emitBranch ("bne", tlbl); + } + } + offset++; + } + if (tlbl) + emitLabel (tlbl); + if(ifx) + genIfxJump (ifx, "a"); + } + + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + size = AOP_SIZE (result); + + if (sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic))) && + (AOP_TYPE (right) == AOP_LIT) && isLiteralBit(lit) && + (AOP_TYPE (left) == AOP_DIR)) + { + int bitpos = isLiteralBit(lit)-1; + emitcode ("bset","#%d,%s",bitpos & 7, + aopAdrStr (AOP (left), bitpos >> 3, FALSE)); + goto release; + } + + offset = 0; + while (size--) + { + bytemask = (lit >> (offset*8)) & 0xff; + + if (AOP_TYPE (right) == AOP_LIT && bytemask == 0xff) + { + if (isOperandVolatile (left, FALSE)) + { + loadRegFromAop (hc08_reg_a, AOP (left), offset); + hc08_freeReg( hc08_reg_a); + } + transferAopAop (AOP (right), offset, AOP (result), offset); + } + else if (AOP_TYPE (right) == AOP_LIT && bytemask == 0) + { + transferAopAop (AOP (left), offset, AOP (result), offset); + } + else + { + loadRegFromAop (hc08_reg_a, AOP (left), offset); + accopWithAop ("ora", AOP (right), offset); + storeRegToAop (hc08_reg_a, AOP (result), offset); + hc08_freeReg (hc08_reg_a); + } + offset++; + } + + +release: + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genXor - code for xclusive or */ +/*-----------------------------------------------------------------*/ +static void +genXor (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + int size, offset = 0; + unsigned long lit = 0L; + + D(emitcode ("; genXor","")); + + aopOp ((left = IC_LEFT (ic)), ic, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, TRUE); + +#ifdef DEBUG_TYPE + DD(emitcode ("", "; Type res[%d] = l[%d]&r[%d]", + AOP_TYPE (result), + AOP_TYPE (left), AOP_TYPE (right))); + DD(emitcode ("", "; Size res[%d] = l[%d]&r[%d]", + AOP_SIZE (result), + AOP_SIZE (left), AOP_SIZE (right))); +#endif + + /* if left is a literal & right is not || + if left needs acc & right does not */ + if (AOP_TYPE (left) == AOP_LIT && AOP_TYPE (right) != AOP_LIT) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if left is accumulator & right is not then exchange them */ + if (AOP_TYPE (right) == AOP_REG && AOP_TYPE (left) != AOP_REG) + { + operand *tmp = right; + right = left; + left = tmp; + } + + if (AOP_TYPE (result) == AOP_CRY) + { + symbol *tlbl; + wassertl (ifx, "AOP_CPY result without ifx"); + + tlbl = newiTempLabel (NULL); + size = (AOP_SIZE (left) >= AOP_SIZE (right)) ? AOP_SIZE (left) : AOP_SIZE (right); + offset = 0; + while (size--) + { + loadRegFromAop (hc08_reg_a, AOP (left), offset); + if ((AOP_TYPE (right) == AOP_LIT) + && (((lit >> (offset*8)) & 0xff) == 0)) + emitcode ("tsta",""); + else + accopWithAop ("eor", AOP (right), offset); + hc08_freeReg( hc08_reg_a); + if (size) + emitBranch ("bne", tlbl); + else + { + emitLabel (tlbl); + genIfxJump (ifx, "a"); + } + offset++; + } + } + + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + size = AOP_SIZE (result); + offset = 0; + while (size--) + { + loadRegFromAop (hc08_reg_a, AOP (left), offset); + accopWithAop ("eor", AOP (right), offset); + storeRegToAop (hc08_reg_a, AOP (result), offset++); + hc08_freeReg( hc08_reg_a); + } + +//release: + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (result, NULL, ic, TRUE); +} + +static void +emitinline (iCode * ic, char *inlin) +{ + char buffer[512]; + char *symname; + char c; + char *bp=buffer; + symbol *sym, *tempsym; + asmop *aop; + char *l; + + while (*inlin) + { + if (*inlin == '_') + { + symname = ++inlin; + while (isalnum((unsigned char)*inlin) || (*inlin == '_')) + inlin++; + c = *inlin; + *inlin = '\0'; + //printf("Found possible symbol '%s'\n",symname); + tempsym = newSymbol (symname, ic->level); + tempsym->block = ic->block; + sym = (symbol *) findSymWithLevel(SymbolTab,tempsym); + *inlin = c; + if (!sym) + { + *bp++ = '_'; + inlin = symname; + } + else + { + aop = aopForSym (ic, sym, FALSE); + l = aopAdrStr (aop, aop->size - 1, TRUE); + if (*l=='#') + l++; + sym->isref = 1; + if (sym->level && !sym->allocreq && !sym->ismyparm) + { + werror (E_ID_UNDEF, sym->name); + werror (W_CONTINUE, + " Add 'volatile' to the variable declaration so that it\n" + " can be referenced within inline assembly"); + } + //printf("Replacing with '%s'\n",l); + while (*l) + { + *bp++ = *l++; + if ((2+bp-buffer)>sizeof(buffer)) + goto endofline; + } + } + } + else + { + *bp++ = *inlin++; + } + if ((2+bp-buffer)>sizeof(buffer)) + goto endofline; + } + +endofline: + *bp = '\0'; + + if ((2+bp-buffer)>sizeof(buffer)) + fprintf(stderr, "Inline assembly buffer overflow\n"); + + //printf("%s\n",buffer); + emitcode (buffer,""); +} + + +/*-----------------------------------------------------------------*/ +/* genInline - write the inline code out */ +/*-----------------------------------------------------------------*/ +static void +genInline (iCode * ic) +{ + char *buffer, *bp, *bp1; + bool inComment = FALSE; + + D(emitcode ("; genInline","")); + + _G.inLine += (!options.asmpeep); + + buffer = bp = bp1 = Safe_strdup (IC_INLINE(ic)); + + /* emit each line as a code */ + while (*bp) + { + switch (*bp) + { + case ';': + inComment = TRUE; + ++bp; + break; + + case '\n': + inComment = FALSE; + *bp++ = '\0'; + emitinline (ic, bp1); + bp1 = bp; + break; + + default: + /* Add \n for labels, not dirs such as c:\mydir */ + if (!inComment && (*bp == ':') && (isspace((unsigned char)bp[1]))) + { + ++bp; + *bp = '\0'; + ++bp; + emitcode (bp1, ""); + bp1 = bp; + } + else + ++bp; + break; + } + } + if (bp1 != bp) + emitinline (ic, bp1); + + Safe_free (buffer); + + _G.inLine -= (!options.asmpeep); +} + +/*-----------------------------------------------------------------*/ +/* genRRC - rotate right with carry */ +/*-----------------------------------------------------------------*/ +static void +genRRC (iCode * ic) +{ + operand *left, *result; + int size, offset = 0; + bool needpula = FALSE; + bool resultInA = FALSE; + char *shift; + + D(emitcode ("; genRRC","")); + + /* rotate right with carry */ + left = IC_LEFT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + + if ((AOP_TYPE (result) == AOP_REG) + && (AOP (result)->aopu.aop_reg[0]->rIdx == A_IDX)) + resultInA = TRUE; + + size = AOP_SIZE (result); + offset = size-1; + + shift="lsr"; + if (sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic)))) + { + while (size--) + { + rmwWithAop (shift, AOP (result), offset--); + shift="ror"; + } + } + else + { + while (size--) + { + loadRegFromAop (hc08_reg_a, AOP (left), offset); + rmwWithReg (shift, hc08_reg_a); + storeRegToAop (hc08_reg_a, AOP (result), offset--); + hc08_freeReg (hc08_reg_a); + shift="ror"; + } + } + + if ((!hc08_reg_a->isFree) || resultInA) + { + pushReg (hc08_reg_a, TRUE); + needpula = TRUE; + } + + /* now we need to put the carry into the + highest order byte of the result */ + offset = AOP_SIZE (result) - 1; + emitcode ("clra",""); + emitcode ("rora",""); + hc08_dirtyReg (hc08_reg_a, FALSE); + if (resultInA) + { + emitcode ("ora", "1,s"); + emitcode ("ais", "#1"); + hc08_dirtyReg (hc08_reg_a, FALSE); + needpula = FALSE; + } + else + accopWithAop ("ora", AOP (result), offset); + storeRegToAop (hc08_reg_a, AOP (result), offset); + + pullOrFreeReg (hc08_reg_a, needpula); + + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genRLC - generate code for rotate left with carry */ +/*-----------------------------------------------------------------*/ +static void +genRLC (iCode * ic) +{ + operand *left, *result; + int size, offset = 0; + char *shift; + bool resultInA = FALSE; + bool needpula = FALSE; + + D(emitcode ("; genRLC","")); + + /* rotate right with carry */ + left = IC_LEFT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + + if ((AOP_TYPE (result) == AOP_REG) + && (AOP (result)->aopu.aop_reg[0]->rIdx == A_IDX)) + resultInA = TRUE; + + size = AOP_SIZE (result); + offset = 0; + + shift="lsl"; + if (sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic)))) + { + while (size--) + { + rmwWithAop (shift, AOP (result), offset--); + shift="rol"; + } + } + else + { + while (size--) + { + loadRegFromAop (hc08_reg_a, AOP (left), offset); + rmwWithReg (shift, hc08_reg_a); + storeRegToAop (hc08_reg_a, AOP (result), offset++); + hc08_freeReg (hc08_reg_a); + shift="rol"; + } + } + + if ((!hc08_reg_a->isFree) || resultInA) + { + pushReg (hc08_reg_a, TRUE); + needpula = TRUE; + } + + /* now we need to put the carry into the + lowest order byte of the result */ + offset = 0; + emitcode ("clra",""); + emitcode ("rola",""); + hc08_dirtyReg (hc08_reg_a, FALSE); + if (resultInA) + { + emitcode ("ora", "1,s"); + emitcode ("ais", "#1"); + hc08_dirtyReg (hc08_reg_a, FALSE); + needpula = FALSE; + } + else + accopWithAop ("ora", AOP (result), offset); + storeRegToAop (hc08_reg_a, AOP (result), offset); + + pullOrFreeReg (hc08_reg_a, needpula); + + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genGetHbit - generates code get highest order bit */ +/*-----------------------------------------------------------------*/ +static void +genGetHbit (iCode * ic) +{ + operand *left, *result; + + D(emitcode ("; genGetHbit","")); + + left = IC_LEFT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + + /* get the highest order byte into a */ + loadRegFromAop (hc08_reg_a, AOP (left), AOP_SIZE (left) - 1); + emitcode ("rola", ""); + emitcode ("clra", ""); + emitcode ("rola", ""); + hc08_dirtyReg (hc08_reg_a, FALSE); + storeRegToFullAop (hc08_reg_a, AOP (result), FALSE); + hc08_freeReg (hc08_reg_a); + + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genSwap - generates code to swap nibbles or bytes */ +/*-----------------------------------------------------------------*/ +static void +genSwap (iCode * ic) +{ + operand *left, *result; + + D(emitcode ("; genSwap","")); + + left = IC_LEFT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + + switch (AOP_SIZE (left)) + { + case 1: /* swap nibbles in byte */ + loadRegFromAop (hc08_reg_a, AOP (left), 0); + emitcode ("nsa", ""); + hc08_dirtyReg (hc08_reg_a, FALSE); + storeRegToAop (hc08_reg_a, AOP (result), 0); + hc08_freeReg (hc08_reg_a); + break; + case 2: /* swap bytes in a word */ + if (operandsEqu (left, result) || sameRegs (AOP (left), AOP (result))) + { + loadRegFromAop (hc08_reg_a, AOP (left), 0); + hc08_useReg (hc08_reg_a); + transferAopAop (AOP (left), 1, AOP (result), 0); + storeRegToAop (hc08_reg_a, AOP (result), 1); + hc08_freeReg (hc08_reg_a); + } + else + { + transferAopAop (AOP (left), 0, AOP (result), 1); + transferAopAop (AOP (left), 1, AOP (result), 0); + } + break; + default: + wassertl(FALSE, "unsupported SWAP operand size"); + } + + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +#if 0 +/*-----------------------------------------------------------------*/ +/* AccRol - rotate left accumulator by known count */ +/*-----------------------------------------------------------------*/ +static void +AccRol (int shCount) +{ + shCount &= 0x0007; // shCount : 0..7 + + switch (shCount) + { + case 0: + break; + case 1: + emitcode ("rola", ""); /* 1 cycle */ + break; + case 2: + emitcode ("rola", ""); /* 1 cycle */ + emitcode ("rola", ""); /* 1 cycle */ + break; + case 3: + emitcode ("nsa", ""); + emitcode ("rora", ""); + break; + case 4: + emitcode ("nsa", ""); /* 3 cycles */ + break; + case 5: + emitcode ("nsa", ""); /* 3 cycles */ + emitcode ("rola", ""); /* 1 cycle */ + break; + case 6: + emitcode ("nsa", ""); /* 3 cycles */ + emitcode ("rola", ""); /* 1 cycle */ + emitcode ("rola", ""); /* 1 cycle */ + break; + case 7: + emitcode ("nsa", ""); /* 3 cycles */ + emitcode ("rola", ""); /* 1 cycle */ + emitcode ("rola", ""); /* 1 cycle */ + emitcode ("rola", ""); /* 1 cycle */ + break; + } +} +#endif + + +/*-----------------------------------------------------------------*/ +/* AccLsh - left shift accumulator by known count */ +/*-----------------------------------------------------------------*/ +static void +AccLsh (int shCount) +{ + int i; + + shCount &= 0x0007; // shCount : 0..7 + + /* Shift counts of 4 and 5 are currently optimized for code size. */ + /* Falling through to the unrolled loop would be optimal for code speed. */ + /* For shift counts of 6 and 7, the unrolled loop is never optimal. */ + switch (shCount) + { + case 4: + if (optimize.codeSpeed) + break; + accopWithMisc ("nsa", ""); + accopWithMisc ("and", "#0xf0"); + /* total: 5 cycles, 3 bytes */ + return; + case 5: + if (optimize.codeSpeed) + break; + accopWithMisc ("nsa", ""); + accopWithMisc ("and", "#0xf0"); + accopWithMisc ("lsla", ""); + /* total: 6 cycles, 4 bytes */ + return; + case 6: + accopWithMisc ("rora", ""); + accopWithMisc ("rora", ""); + accopWithMisc ("rora", ""); + accopWithMisc ("and", "#0xc0"); + /* total: 5 cycles, 5 bytes */ + return; + case 7: + accopWithMisc ("rora", ""); + accopWithMisc ("clra", ""); + accopWithMisc ("rora", ""); + /* total: 3 cycles, 3 bytes */ + return; + } + + /* lsla is only 1 cycle and byte, so an unrolled loop is often */ + /* the fastest (shCount<6) and shortest (shCount<4). */ + for (i=0;i=8) + { + AccLsh (shCount-8); + transferRegReg (hc08_reg_a, hc08_reg_x, FALSE); + loadRegFromConst (hc08_reg_a, zero); + return; + } + + /* if we can beat 2n cycles or bytes for some special case, do it here */ + switch (shCount) + { + case 7: + /* bytes cycles reg x reg a carry + ** abcd efgh ijkl mnop ? + ** lsrx 1 1 0abc defg ijkl mnop h + ** rora 1 1 0abc defg hijk lmno p + ** tax 1 1 hijk lmno hijk lmno p + ** clra 1 1 hijk lmno 0000 0000 p + ** rora 1 1 hijk lmno p000 0000 0 + ** total: 5 cycles, 5 bytes (beats 14 cycles, 14 bytes) + */ + rmwWithReg ("lsr", hc08_reg_x); + rmwWithReg ("ror", hc08_reg_a); + transferRegReg (hc08_reg_a, hc08_reg_x, FALSE); + loadRegFromConst (hc08_reg_a, zero); + rmwWithReg ("ror", hc08_reg_a); + return; + + default: + ; + } + + /* lsla/rolx is only 2 cycles and bytes, so an unrolled loop is often */ + /* the fastest and shortest. */ + for (i=0;i=8)) + */ + transferRegReg (hc08_reg_x, hc08_reg_a, FALSE); + AccSRsh (shCount-8); + rmwWithReg ("lsl", hc08_reg_a); + loadRegFromConst (hc08_reg_x, zero); + rmwWithReg ("rol", hc08_reg_x); + rmwWithReg ("neg", hc08_reg_x); + rmwWithReg ("ror", hc08_reg_a); + return; + + default: + ; + } + + /* asrx/rora is only 2 cycles and bytes, so an unrolled loop is often */ + /* the fastest and shortest. */ + for (i=0;i= 8 */ + if (shCount >= 8) + { + shCount -= 8; + + if (size > 1) + { + loadRegFromAop (hc08_reg_a, AOP (left), 0); + AccLsh (shCount); + storeRegToAop (hc08_reg_a, AOP (result), 1); + } + storeConstToAop(zero, AOP (result), LSB); + } + + /* 1 <= shCount <= 7 */ + else + { + loadRegFromAop (hc08_reg_xa, AOP (left), 0); + XAccLsh (shCount); + storeRegToFullAop (hc08_reg_xa, AOP (result), 0); + } +} + +/*-----------------------------------------------------------------*/ +/* shiftLLong - shift left one long from left to result */ +/* offr = LSB or MSB16 */ +/*-----------------------------------------------------------------*/ +static void +shiftLLong (operand * left, operand * result, int offr) +{ +// char *l; +// int size = AOP_SIZE (result); + + bool needpula = FALSE; + bool needpulx = FALSE; + + needpula = pushRegIfUsed (hc08_reg_a); + needpulx = pushRegIfUsed (hc08_reg_x); + + loadRegFromAop (hc08_reg_xa, AOP (left), LSB); + rmwWithReg ("lsl", hc08_reg_a); + rmwWithReg ("rol", hc08_reg_x); + + if (offr==LSB) + { + storeRegToAop (hc08_reg_xa, AOP (result), offr); + loadRegFromAop (hc08_reg_xa, AOP (left), MSB24); + rmwWithReg ("rol", hc08_reg_a); + rmwWithReg ("rol", hc08_reg_x); + storeRegToAop (hc08_reg_xa, AOP (result), offr+2); + } + else if (offr==MSB16) + { + storeRegToAop (hc08_reg_a, AOP (result), offr); + loadRegFromAop (hc08_reg_a, AOP (left), MSB24); + storeRegToAop (hc08_reg_x, AOP (result), offr+1); + rmwWithReg ("rol", hc08_reg_a); + storeRegToAop (hc08_reg_a, AOP (result), offr+2); + storeConstToAop (zero, AOP (result), 0); + } + + pullOrFreeReg (hc08_reg_x, needpulx); + pullOrFreeReg (hc08_reg_a, needpula); +} + +/*-----------------------------------------------------------------*/ +/* genlshFour - shift four byte by a known amount != 0 */ +/*-----------------------------------------------------------------*/ +static void +genlshFour (operand * result, operand * left, int shCount) +{ + int size; + + D(emitcode ("; genlshFour","")); + + size = AOP_SIZE (result); + + /* TODO: deal with the &result == &left case */ + + /* if shifting more that 3 bytes */ + if (shCount >= 24) + { + shCount -= 24; + if (shCount) + /* lowest order of left goes to the highest + order of the destination */ + shiftL1Left2Result (left, LSB, result, MSB32, shCount); + else + movLeft2Result (left, LSB, result, MSB32, 0); + storeConstToAop (zero, AOP (result), LSB); + storeConstToAop (zero, AOP (result), MSB16); + storeConstToAop (zero, AOP (result), MSB24); + return; + } + + /* more than two bytes */ + else if (shCount >= 16) + { + /* lower order two bytes goes to higher order two bytes */ + shCount -= 16; + /* if some more remaining */ + if (shCount) + shiftL2Left2Result (left, LSB, result, MSB24, shCount); + else + { + movLeft2Result (left, MSB16, result, MSB32, 0); + movLeft2Result (left, LSB, result, MSB24, 0); + } + storeConstToAop (zero, AOP (result), LSB); + storeConstToAop (zero, AOP (result), MSB16); + return; + } + + /* if more than 1 byte */ + else if (shCount >= 8) + { + /* lower order three bytes goes to higher order three bytes */ + shCount -= 8; + if (size == 2) + { + if (shCount) + shiftL1Left2Result (left, LSB, result, MSB16, shCount); + else + movLeft2Result (left, LSB, result, MSB16, 0); + } + else + { /* size = 4 */ + if (shCount == 0) + { + movLeft2Result (left, MSB24, result, MSB32, 0); + movLeft2Result (left, MSB16, result, MSB24, 0); + movLeft2Result (left, LSB, result, MSB16, 0); + storeConstToAop (zero, AOP (result), LSB); + } + else if (shCount == 1) + shiftLLong (left, result, MSB16); + else + { + shiftL2Left2Result (left, MSB16, result, MSB24, shCount); + shiftL1Left2Result (left, LSB, result, MSB16, shCount); + shiftRLeftOrResult (left, LSB, result, MSB24, 8 - shCount); + storeConstToAop (zero, AOP (result), LSB); + } + } + } + + /* 1 <= shCount <= 7 */ + else if (shCount <= 2) + { + shiftLLong (left, result, LSB); + if (shCount == 2) + shiftLLong (result, result, LSB); + } + /* 3 <= shCount <= 7, optimize */ + else + { + shiftL2Left2Result (left, MSB24, result, MSB24, shCount); + shiftRLeftOrResult (left, MSB16, result, MSB24, 8 - shCount); + shiftL2Left2Result (left, LSB, result, LSB, shCount); + } +} + +/*-----------------------------------------------------------------*/ +/* genLeftShiftLiteral - left shifting by known count */ +/*-----------------------------------------------------------------*/ +static void +genLeftShiftLiteral (operand * left, + operand * right, + operand * result, + iCode * ic) +{ + int shCount = (int) ulFromVal (AOP (right)->aopu.aop_lit); + int size; + + D(emitcode ("; genLeftShiftLiteral","")); + + freeAsmop (right, NULL, ic, TRUE); + + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + +// size = getSize (operandType (result)); + size = AOP_SIZE (result); + +#if VIEW_SIZE + DD(emitcode ("; shift left ", "result %d, left %d", size, + AOP_SIZE (left))); +#endif + + if (shCount == 0) + { + while (size--) + transferAopAop( AOP(left), size, AOP(result), size); + } + else if (shCount >= (size * 8)) + { + while (size--) + storeConstToAop (zero, AOP (result), size); + } + else + { + switch (size) + { + case 1: + genlshOne (result, left, shCount); + break; + + case 2: + genlshTwo (result, left, shCount); + break; + + case 4: + genlshFour (result, left, shCount); + break; + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "*** ack! mystery literal shift!\n"); + break; + } + } + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genLeftShift - generates code for left shifting */ +/*-----------------------------------------------------------------*/ +static void +genLeftShift (iCode * ic) +{ + operand *left, *right, *result; + int size, offset; + symbol *tlbl, *tlbl1; + char *shift; + asmop *aopResult; + + D(emitcode ("; genLeftShift","")); + + right = IC_RIGHT (ic); + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + aopOp (right, ic, FALSE); + + /* if the shift count is known then do it + as efficiently as possible */ + if (AOP_TYPE (right) == AOP_LIT) + { + genLeftShiftLiteral (left, right, result, ic); + return; + } + + /* shift count is unknown then we have to form + a loop get the loop count in X : Note: we take + only the lower order byte since shifting + more that 32 bits make no sense anyway, ( the + largest size of an object can be only 32 bits ) */ + + aopOp (result, ic, FALSE); + aopOp (left, ic, FALSE); + aopResult = AOP (result); + + if (sameRegs(AOP (right), AOP (result)) || IS_AOP_XA (AOP (result)) + || isOperandVolatile (result, FALSE)) + aopResult = forceStackedAop (AOP (result), sameRegs ( AOP (left), AOP (result))); + + /* now move the left to the result if they are not the + same */ + if (!sameRegs (AOP (left), aopResult)) + { + size = AOP_SIZE (result); + offset = 0; + while (size--) + { + transferAopAop (AOP (left), offset, aopResult, offset); + offset++; + } + } + freeAsmop (left, NULL, ic, TRUE); + AOP (result) = aopResult; + + tlbl = newiTempLabel (NULL); + size = AOP_SIZE (result); + offset = 0; + tlbl1 = newiTempLabel (NULL); + + loadRegFromAop (hc08_reg_x, AOP (right), 0); + emitcode ("tstx", ""); + emitBranch ("beq", tlbl1); + emitLabel (tlbl); + + shift="lsl"; + for (offset=0;offset= 8 */ + if (shCount >= 8) + { + if (shCount || sign) + { + loadRegFromAop (hc08_reg_a, AOP (left), 1); + AccRsh (shCount-8, sign); + storeRegToFullAop (hc08_reg_a, AOP (result), sign); + } + else + { + transferAopAop (AOP (left), 1, AOP (result), 0); + storeConstToAop (zero, AOP (result), 1); + } + } + + /* 1 <= shCount <= 7 */ + else + { + loadRegFromAop (hc08_reg_xa, AOP (left), 0); + XAccRsh (shCount, sign); + storeRegToAop (hc08_reg_xa, AOP (result), 0); + } +} + +/*-----------------------------------------------------------------*/ +/* shiftRLong - shift right one long from left to result */ +/* offl = LSB or MSB16 */ +/*-----------------------------------------------------------------*/ +static void +shiftRLong (operand * left, int offl, + operand * result, int sign) +{ +// char *l; + // int size = AOP_SIZE (result); + + bool needpula = FALSE; + bool needpulx = FALSE; + + needpula = pushRegIfUsed (hc08_reg_a); + needpulx = pushRegIfUsed (hc08_reg_x); + + if (offl==LSB) + { + loadRegFromAop (hc08_reg_xa, AOP (left), MSB24); + if (sign) + rmwWithReg ("asr", hc08_reg_x); + else + rmwWithReg ("lsr", hc08_reg_x); + rmwWithReg ("ror", hc08_reg_a); + storeRegToAop (hc08_reg_xa, AOP (result), MSB24); + loadRegFromAop (hc08_reg_xa, AOP (left), LSB); + } + else if (offl==MSB16) + { + loadRegFromAop (hc08_reg_a, AOP (left), MSB32); + if (sign) + rmwWithReg ("asr", hc08_reg_a); + else + rmwWithReg ("lsr", hc08_reg_a); + loadRegFromAop (hc08_reg_x, AOP (left), MSB24); + storeRegToAop (hc08_reg_a, AOP (result), MSB24); + loadRegFromAop (hc08_reg_a, AOP (left), MSB16); + } + + rmwWithReg ("ror", hc08_reg_x); + rmwWithReg ("ror", hc08_reg_a); + storeRegToAop (hc08_reg_xa, AOP (result), LSB); + + if (offl==MSB16) + { + if (sign) + { + loadRegFromAop (hc08_reg_a, AOP (left), MSB24); + storeRegSignToUpperAop (hc08_reg_a, AOP (result), MSB32, sign); + } + else + { + storeConstToAop (zero, AOP (result), MSB32); + } + } + + pullOrFreeReg (hc08_reg_x, needpulx); + pullOrFreeReg (hc08_reg_a, needpula); +} + +/*-----------------------------------------------------------------*/ +/* genrshFour - shift four byte by a known amount != 0 */ +/*-----------------------------------------------------------------*/ +static void +genrshFour (operand * result, operand * left, + int shCount, int sign) +{ + /* TODO: handle cases where left == result */ + + D(emitcode ("; genrshFour","")); + + /* if shifting more that 3 bytes */ + if (shCount >= 24) + { + loadRegFromAop (hc08_reg_a, AOP (left), 3); + AccRsh (shCount-24, sign); + storeRegToFullAop (hc08_reg_a, AOP (result), sign); + return; + } + else if (shCount >= 16) + { + loadRegFromAop (hc08_reg_xa, AOP (left), 2); + XAccRsh (shCount-16, sign); + storeRegToFullAop (hc08_reg_xa, AOP (result), sign); + return; + } + else if (shCount >= 8) + { + if (shCount == 1) + shiftRLong (left, MSB16, result, sign); + else if (shCount == 8) + { + transferAopAop (AOP (left), 1, AOP (result), 0); + transferAopAop (AOP (left), 2, AOP (result), 1); + loadRegFromAop (hc08_reg_a, AOP (left), 3); + storeRegToAop (hc08_reg_a, AOP (result), 2); + storeRegSignToUpperAop (hc08_reg_a, AOP(result), 3, sign); + } + else if (shCount == 9) + { + shiftRLong (left, MSB16, result, sign); + } + else + { + loadRegFromAop (hc08_reg_xa, AOP (left), 1); + XAccRsh (shCount-8, FALSE); + storeRegToAop (hc08_reg_xa, AOP (result), 0); + loadRegFromAop (hc08_reg_x, AOP (left), 3); + loadRegFromConst (hc08_reg_a, zero); + XAccRsh (shCount-8, sign); + accopWithAop ("ora", AOP (result), 1); + storeRegToAop (hc08_reg_xa, AOP (result), 1); + storeRegSignToUpperAop (hc08_reg_x, AOP(result), 3, sign); + } + } + else + { /* 1 <= shCount <= 7 */ + if (shCount == 1) + { + shiftRLong (left, LSB, result, sign); + } + else + { + loadRegFromAop (hc08_reg_xa, AOP (left), 0); + XAccRsh (shCount, FALSE); + storeRegToAop (hc08_reg_xa, AOP (result), 0); + loadRegFromAop (hc08_reg_a, AOP (left), 2); + AccLsh (8-shCount); + accopWithAop ("ora", AOP (result), 1); + storeRegToAop (hc08_reg_a, AOP (result), 1); + loadRegFromAop (hc08_reg_xa, AOP (left), 2); + XAccRsh (shCount, sign); + storeRegToAop (hc08_reg_xa, AOP (result), 2); + } + } +} + +/*-----------------------------------------------------------------*/ +/* genRightShiftLiteral - right shifting by known count */ +/*-----------------------------------------------------------------*/ +static void +genRightShiftLiteral (operand * left, + operand * right, + operand * result, + iCode * ic, + int sign) +{ + int shCount = (int) ulFromVal (AOP (right)->aopu.aop_lit); + int size; + + D(emitcode ("; genRightShiftLiteral","")); + + freeAsmop (right, NULL, ic, TRUE); + + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + +#if VIEW_SIZE + DD(emitcode ("; shift right ", "result %d, left %d", AOP_SIZE (result), + AOP_SIZE (left))); +#endif + + size = getDataSize (left); + /* test the LEFT size !!! */ + + /* I suppose that the left size >= result size */ + if (shCount == 0) + { + size = getDataSize (result); + while (size--) + transferAopAop (AOP (left), size, AOP(result), size); + } + else if (shCount >= (size * 8)) + { + if (sign) { + /* get sign in acc.7 */ + loadRegFromAop (hc08_reg_a, AOP (left), size -1); + } + addSign (result, LSB, sign); + } + else + { + switch (size) + { + case 1: + genrshOne (result, left, shCount, sign); + break; + + case 2: + genrshTwo (result, left, shCount, sign); + break; + + case 4: + genrshFour (result, left, shCount, sign); + break; + default: + break; + } + } + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + + +/*-----------------------------------------------------------------*/ +/* genRightShift - generate code for right shifting */ +/*-----------------------------------------------------------------*/ +static void +genRightShift (iCode * ic) +{ + operand *right, *left, *result; + sym_link *retype; + int size, offset; + symbol *tlbl, *tlbl1; + char *shift; + bool sign; + asmop *aopResult; + + D(emitcode ("; genRightShift","")); + + /* if signed then we do it the hard way preserve the + sign bit moving it inwards */ + retype = getSpec (operandType (IC_RESULT (ic))); + sign = !SPEC_USIGN (retype); + + /* signed & unsigned types are treated the same : i.e. the + signed is NOT propagated inwards : quoting from the + ANSI - standard : "for E1 >> E2, is equivalent to division + by 2**E2 if unsigned or if it has a non-negative value, + otherwise the result is implementation defined ", MY definition + is that the sign does not get propagated */ + + right = IC_RIGHT (ic); + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + aopOp (right, ic, FALSE); + + /* if the shift count is known then do it + as efficiently as possible */ + if (AOP_TYPE (right) == AOP_LIT) + { + genRightShiftLiteral (left, right, result, ic, sign); + return; + } + + /* shift count is unknown then we have to form + a loop get the loop count in X : Note: we take + only the lower order byte since shifting + more that 32 bits make no sense anyway, ( the + largest size of an object can be only 32 bits ) */ + + aopOp (result, ic, FALSE); + aopOp (left, ic, FALSE); + aopResult = AOP (result); + + if (sameRegs(AOP (right), AOP (result)) || IS_AOP_XA (AOP (result)) + || isOperandVolatile (result, FALSE)) + aopResult = forceStackedAop (AOP (result), sameRegs ( AOP (left), AOP (result))); + + /* now move the left to the result if they are not the + same */ + if (!sameRegs (AOP (left), aopResult)) + { + size = AOP_SIZE (result); + offset = 0; + while (size--) + { + transferAopAop (AOP (left), offset, aopResult, offset); + offset++; + } + } + freeAsmop (left, NULL, ic, TRUE); + AOP (result) = aopResult; + + tlbl = newiTempLabel (NULL); + size = AOP_SIZE (result); + offset = 0; + tlbl1 = newiTempLabel (NULL); + + loadRegFromAop (hc08_reg_x, AOP (right), 0); + emitcode ("tstx", ""); + emitBranch ("beq", tlbl1); + emitLabel (tlbl); + + shift= sign ? "asr" : "lsr"; + for (offset=size-1;offset>=0;offset--) + { + rmwWithAop (shift, AOP (result), offset); + shift="ror"; + } + rmwWithReg ("dec", hc08_reg_x); + emitBranch ("bne", tlbl); + emitLabel (tlbl1); + hc08_freeReg (hc08_reg_x); + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, TRUE); +} + + +/*-----------------------------------------------------------------*/ +/* genUnpackBits - generates code for unpacking bits */ +/*-----------------------------------------------------------------*/ +static void +genUnpackBits (operand * result, iCode *ifx) +{ + int offset = 0; /* result byte offset */ + int rsize; /* result size */ + int rlen = 0; /* remaining bitfield length */ + sym_link *etype; /* bitfield type information */ + int blen; /* bitfield length */ + int bstr; /* bitfield starting bit within byte */ + + D(emitcode ("; genUnpackBits","")); + + etype = getSpec (operandType (result)); + rsize = getSize (operandType (result)); + blen = SPEC_BLEN (etype); + bstr = SPEC_BSTR (etype); + + if (ifx && blen <= 8) + { + emitcode ("lda", ",x"); + hc08_dirtyReg (hc08_reg_a, FALSE); + if (blen < 8) + { + emitcode ("and", "#0x%02x", + (((unsigned char) -1) >> (8 - blen)) << bstr); + } + genIfxJump (ifx, "a"); + return; + } + wassert (!ifx); + + /* If the bitfield length is less than a byte */ + if (blen < 8) + { + emitcode ("lda", ",x"); + hc08_dirtyReg (hc08_reg_a, FALSE); + AccRsh (bstr, FALSE); + emitcode ("and", "#0x%02x", ((unsigned char) -1) >> (8 - blen)); + if (!SPEC_USIGN (etype)) + { + /* signed bitfield */ + symbol *tlbl = newiTempLabel (NULL); + + emitcode ("bit", "#0x%02x", 1<<(blen - 1)); + emitcode ("beq", "%05d$", tlbl->key + 100); + emitcode ("ora", "#0x%02x", (unsigned char) (0xff << blen)); + emitLabel (tlbl); + } + storeRegToAop (hc08_reg_a, AOP (result), offset++); + goto finish; + } + + /* Bit field did not fit in a byte. Copy all + but the partial byte at the end. */ + for (rlen=blen;rlen>=8;rlen-=8) + { + emitcode ("lda", ",x"); + hc08_dirtyReg (hc08_reg_a, FALSE); + storeRegToAop (hc08_reg_a, AOP (result), offset); + offset++; + if (rlen>8) + emitcode ("aix", "#1"); + } + + /* Handle the partial byte at the end */ + if (rlen) + { + emitcode ("lda", ",x"); + emitcode ("and", "#0x%02x", ((unsigned char) -1) >> (8-rlen)); + if (!SPEC_USIGN (etype)) + { + /* signed bitfield */ + symbol *tlbl = newiTempLabel (NULL); + + emitcode ("bit", "#0x%02x", 1<<(rlen - 1)); + emitcode ("beq", "%05d$", tlbl->key + 100); + emitcode ("ora", "#0x%02x", (unsigned char) (0xff << rlen)); + emitLabel (tlbl); + } + storeRegToAop (hc08_reg_a, AOP (result), offset++); + } + +finish: + if (offset < rsize) + { + rsize -= offset; + if (SPEC_USIGN (etype)) + { + while (rsize--) + storeConstToAop (zero, AOP (result), offset++); + } + else + { + /* signed bitfield: sign extension with 0x00 or 0xff */ + emitcode ("rola", ""); + emitcode ("clra", ""); + emitcode ("sbc", zero); + + while (rsize--) + storeRegToAop (hc08_reg_a, AOP (result), offset++); + } + } +} + + +/*-----------------------------------------------------------------*/ +/* genUnpackBitsImmed - generates code for unpacking bits */ +/*-----------------------------------------------------------------*/ +static void +genUnpackBitsImmed (operand * left, + operand * result, + iCode *ic, + iCode *ifx) +{ + int size; + int offset = 0; /* result byte offset */ + int rsize; /* result size */ + int rlen = 0; /* remaining bitfield length */ + sym_link *etype; /* bitfield type information */ + int blen; /* bitfield length */ + int bstr; /* bitfield starting bit within byte */ + asmop *derefaop; + + D(emitcode ("; genUnpackBitsImmed","")); + + aopOp (result, ic, TRUE); + size = AOP_SIZE (result); + + derefaop = aopDerefAop (AOP (left)); + freeAsmop (left, NULL, ic, TRUE); + derefaop->size = size; + + etype = getSpec (operandType (result)); + rsize = getSize (operandType (result)); + blen = SPEC_BLEN (etype); + bstr = SPEC_BSTR (etype); + + /* if the bitfield is a single bit in the direct page */ + if (blen == 1 && derefaop->type == AOP_DIR) + { + if (!ifx && bstr) + { + symbol *tlbl = newiTempLabel (NULL); + + loadRegFromConst (hc08_reg_a, zero); + emitcode ("brclr", "#%d,%s,%05d$", + bstr, aopAdrStr (derefaop, 0, FALSE), + (tlbl->key + 100)); + if (SPEC_USIGN (etype)) + rmwWithReg ("inc", hc08_reg_a); + else + rmwWithReg ("dec", hc08_reg_a); + emitLabel (tlbl); + storeRegToAop (hc08_reg_a, AOP (result), offset); + hc08_freeReg (hc08_reg_a); + offset++; + goto finish; + } + else if (ifx) + { + symbol *tlbl = newiTempLabel (NULL); + symbol *jlbl; + char * inst; + + if (IC_TRUE (ifx)) + { + jlbl = IC_TRUE (ifx); + inst = "brclr"; + } + else + { + jlbl = IC_FALSE (ifx); + inst = "brset"; + } + emitcode (inst, "#%d,%s,%05d$", + bstr, aopAdrStr (derefaop, 0, FALSE), + (tlbl->key + 100)); + emitBranch ("jmp", jlbl); + emitLabel (tlbl); + ifx->generated = 1; + offset++; + goto finish; + } + } + + /* If the bitfield length is less than a byte */ + if (blen < 8) + { + loadRegFromAop (hc08_reg_a, derefaop, 0); + if (!ifx) + { + AccRsh (bstr, FALSE); + emitcode ("and", "#0x%02x", ((unsigned char) -1) >> (8 - blen)); + hc08_dirtyReg (hc08_reg_a, FALSE); + if (!SPEC_USIGN (etype)) + { + /* signed bitfield */ + symbol *tlbl = newiTempLabel (NULL); + + emitcode ("bit", "#0x%02x", 1<<(blen - 1)); + emitcode ("beq", "%05d$", tlbl->key + 100); + emitcode ("ora", "#0x%02x", (unsigned char) (0xff << blen)); + emitLabel (tlbl); + } + storeRegToAop (hc08_reg_a, AOP (result), offset); + } + else + { + emitcode ("and", "#0x%02x", + (((unsigned char) -1) >> (8 - blen)) << bstr); + hc08_dirtyReg (hc08_reg_a, FALSE); + } + offset++; + goto finish; + } + + /* Bit field did not fit in a byte. Copy all + but the partial byte at the end. */ + for (rlen=blen;rlen>=8;rlen-=8) + { + loadRegFromAop (hc08_reg_a, derefaop, size-offset-1); + if (!ifx) + storeRegToAop (hc08_reg_a, AOP (result), offset); + else + emitcode ("tsta", ""); + offset++; + } + + /* Handle the partial byte at the end */ + if (rlen) + { + loadRegFromAop (hc08_reg_a, derefaop, size-offset-1); + emitcode ("and", "#0x%02x", ((unsigned char) -1) >> (8-rlen)); + if (!SPEC_USIGN (etype)) + { + /* signed bitfield */ + symbol *tlbl = newiTempLabel (NULL); + + emitcode ("bit", "#0x%02x", 1<<(rlen - 1)); + emitcode ("beq", "%05d$", tlbl->key + 100); + emitcode ("ora", "#0x%02x", (unsigned char) (0xff << rlen)); + emitLabel (tlbl); + } + storeRegToAop (hc08_reg_a, AOP (result), offset++); + } + +finish: + if (offset < rsize) + { + rsize -= offset; + if (SPEC_USIGN (etype)) + { + while (rsize--) + storeConstToAop (zero, AOP (result), offset++); + } + else + { + /* signed bitfield: sign extension with 0x00 or 0xff */ + emitcode ("rola", ""); + emitcode ("clra", ""); + emitcode ("sbc", zero); + + while (rsize--) + storeRegToAop (hc08_reg_a, AOP (result), offset++); + } + } + + freeAsmop (NULL, derefaop, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); + + if (ifx && !ifx->generated) + { + genIfxJump (ifx, "a"); + } +} + + +/*-----------------------------------------------------------------*/ +/* genDataPointerGet - generates code when ptr offset is known */ +/*-----------------------------------------------------------------*/ +static void +genDataPointerGet (operand * left, + operand * result, + iCode * ic, + iCode * ifx) +{ + int size; + asmop *derefaop; + + D(emitcode ("; genDataPointerGet","")); + + aopOp (result, ic, TRUE); + size = AOP_SIZE (result); + + derefaop = aopDerefAop (AOP (left)); + freeAsmop (left, NULL, ic, TRUE); + derefaop->size = size; + + while (size--) + { + if (!ifx) + transferAopAop (derefaop, size, AOP (result), size); + else + loadRegFromAop (hc08_reg_a, derefaop, size); + } + + freeAsmop (NULL, derefaop, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); + + if (ifx && !ifx->generated) + { + genIfxJump (ifx, "a"); + } +} + + +/*-----------------------------------------------------------------*/ +/* genPointerGet - generate code for pointer get */ +/*-----------------------------------------------------------------*/ +static void +genPointerGet (iCode * ic, iCode *pi, iCode *ifx) +{ + operand *left = IC_LEFT (ic); + operand *result = IC_RESULT (ic); + int size, offset; + sym_link *retype = getSpec (operandType (result)); + + D(emitcode ("; genPointerGet","")); + + if (getSize (operandType (result))>1) + ifx = NULL; + + aopOp (left, ic, FALSE); + + /* if left is rematerialisable and + result is not bit variable type */ + if (AOP_TYPE (left) == AOP_IMMD || AOP_TYPE (left) == AOP_LIT) + { + if (!IS_BITVAR (retype)) + { + genDataPointerGet (left, result, ic, ifx); + return; + } + else + { + genUnpackBitsImmed (left, result, ic, ifx); + return; + } + } + + /* if the operand is already in hx + then we do nothing else we move the value to hx */ + if (AOP_TYPE (left) != AOP_STR) + { + /* if this is remateriazable */ + loadRegFromAop (hc08_reg_hx, AOP (left), 0); + } + + /* so hx now contains the address */ + aopOp (result, ic, FALSE); + + /* if bit then unpack */ + if (IS_BITVAR (retype)) + genUnpackBits (result, ifx); + else + { + size = AOP_SIZE (result); + offset = size-1; + + while (size--) + { + accopWithMisc ("lda", ",x"); + if (size || pi) + { + emitcode ("aix", "#1"); + hc08_dirtyReg (hc08_reg_hx, FALSE); + } + if (!ifx) + storeRegToAop (hc08_reg_a, AOP (result), offset); + offset--; + hc08_freeReg (hc08_reg_a); + } + } + + freeAsmop (left, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); + + if (pi) { + aopOp (IC_RESULT (pi), pi, FALSE); + storeRegToAop (hc08_reg_hx, AOP (IC_RESULT (pi)), 0); + freeAsmop (IC_RESULT (pi), NULL, pi, TRUE); + pi->generated = 1; + } + + if (ifx && !ifx->generated) + { + genIfxJump (ifx, "a"); + } + + hc08_freeReg (hc08_reg_hx); + +} + +/*-----------------------------------------------------------------*/ +/* genPackBits - generates code for packed bit storage */ +/*-----------------------------------------------------------------*/ +static void +genPackBits (sym_link * etype, + operand * right) +{ + int offset = 0; /* source byte offset */ + int rlen = 0; /* remaining bitfield length */ + int blen; /* bitfield length */ + int bstr; /* bitfield starting bit within byte */ + int litval; /* source literal value (if AOP_LIT) */ + unsigned char mask; /* bitmask within current byte */ + int xoffset = 0; + + D(emitcode ("; genPackBits","")); + + blen = SPEC_BLEN (etype); + bstr = SPEC_BSTR (etype); + + /* If the bitfield length is less than a byte */ + if (blen < 8) + { + mask = ((unsigned char) (0xFF << (blen + bstr)) | + (unsigned char) (0xFF >> (8 - bstr))); + + if (AOP_TYPE (right) == AOP_LIT) + { + /* Case with a bitfield length <8 and literal source + */ + litval = (int) ulFromVal (AOP (right)->aopu.aop_lit); + litval <<= bstr; + litval &= (~mask) & 0xff; + + emitcode ("lda", ",x"); + if ((mask|litval)!=0xff) + emitcode ("and","#0x%02x", mask); + if (litval) + emitcode ("ora","#0x%02x", litval); + hc08_dirtyReg (hc08_reg_a, FALSE); + emitcode ("sta", ",x"); + + hc08_freeReg (hc08_reg_a); + return; + } + + /* Case with a bitfield length < 8 and arbitrary source + */ + loadRegFromAop (hc08_reg_a, AOP (right), 0); + /* shift and mask source value */ + AccLsh (bstr); + emitcode ("and", "#0x%02x", (~mask) & 0xff); + hc08_dirtyReg (hc08_reg_a, FALSE); + pushReg (hc08_reg_a, TRUE); + + emitcode ("lda", ",x"); + emitcode ("and", "#0x%02x", mask); + emitcode ("ora", "1,s"); + emitcode ("sta", ",x"); + pullReg (hc08_reg_a); + + hc08_freeReg (hc08_reg_a); + return; + } + + /* Bit length is greater than 7 bits. In this case, copy */ + /* all except the partial byte at the end */ + for (rlen=blen;rlen>=8;rlen-=8) + { + if (AOP (right)->type == AOP_DIR) + { + emitcode ("mov", "%s,x+", aopAdrStr(AOP (right), offset, FALSE)); + xoffset++; + } + else + { + loadRegFromAop (hc08_reg_a, AOP (right), offset); + emitcode ("sta", "%d,x", offset); + } + offset++; + } + + /* If there was a partial byte at the end */ + if (rlen) + { + mask = (((unsigned char) -1 << rlen) & 0xff); + + if (AOP_TYPE (right) == AOP_LIT) + { + /* Case with partial byte and literal source + */ + litval = (int) ulFromVal (AOP (right)->aopu.aop_lit); + litval >>= (blen-rlen); + litval &= (~mask) & 0xff; + emitcode ("lda", "%d,x", offset - xoffset); + hc08_dirtyReg (hc08_reg_a, FALSE); + if ((mask|litval)!=0xff) + emitcode ("and","#0x%02x", mask); + if (litval) + emitcode ("ora","#0x%02x", litval); + emitcode ("sta", "%d,x", offset - xoffset); + hc08_dirtyReg (hc08_reg_a, FALSE); + hc08_freeReg (hc08_reg_a); + return; + } + + /* Case with partial byte and arbitrary source + */ + loadRegFromAop (hc08_reg_a, AOP (right), offset); + emitcode ("and", "#0x%02x", (~mask) & 0xff); + hc08_dirtyReg (hc08_reg_a, FALSE); + pushReg (hc08_reg_a, TRUE); + + emitcode ("lda", "%d,x", offset - xoffset); + emitcode ("and", "#0x%02x", mask); + emitcode ("ora", "1,s"); + emitcode ("sta", "%d,x", offset - xoffset); + pullReg (hc08_reg_a); + } + + hc08_freeReg (hc08_reg_a); +} + +/*-----------------------------------------------------------------*/ +/* genPackBitsImmed - generates code for packed bit storage */ +/*-----------------------------------------------------------------*/ +static void +genPackBitsImmed (operand *result, sym_link * etype, operand * right, iCode * ic) +{ + asmop *derefaop; + int size; + int offset = 0; /* source byte offset */ + int rlen = 0; /* remaining bitfield length */ + int blen; /* bitfield length */ + int bstr; /* bitfield starting bit within byte */ + int litval; /* source literal value (if AOP_LIT) */ + unsigned char mask; /* bitmask within current byte */ + + D(emitcode ("; genPackBitsImmed","")); + + blen = SPEC_BLEN (etype); + bstr = SPEC_BSTR (etype); + + aopOp (right, ic, FALSE); + size = AOP_SIZE (right); + + derefaop = aopDerefAop (AOP (result)); + freeAsmop (result, NULL, ic, TRUE); + derefaop->size = size; + + /* if the bitfield is a single bit in the direct page */ + if (blen == 1 && derefaop->type == AOP_DIR) + { + if (AOP_TYPE (right) == AOP_LIT) + { + litval = (int) ulFromVal (AOP (right)->aopu.aop_lit); + + emitcode ((litval & 1) ? "bset" : "bclr", + "#%d,%s", bstr, aopAdrStr (derefaop, 0, FALSE)); + } + else + { + symbol *tlbl1 = newiTempLabel (NULL); + symbol *tlbl2 = newiTempLabel (NULL); + + loadRegFromAop (hc08_reg_a, AOP (right), 0); + emitcode ("bit", "#1"); + emitBranch ("bne", tlbl1); + emitcode ("bclr", "#%d,%s", bstr, aopAdrStr (derefaop, 0, FALSE)); + emitBranch ("bra", tlbl2); + emitLabel (tlbl1); + emitcode ("bset", "#%d,%s", bstr, aopAdrStr (derefaop, 0, FALSE)); + emitLabel (tlbl2); + hc08_freeReg (hc08_reg_a); + } + goto release; + } + + /* If the bitfield length is less than a byte */ + if (blen < 8) + { + mask = ((unsigned char) (0xFF << (blen + bstr)) | + (unsigned char) (0xFF >> (8 - bstr))); + + if (AOP_TYPE (right) == AOP_LIT) + { + /* Case with a bitfield length <8 and literal source + */ + litval = (int) ulFromVal (AOP (right)->aopu.aop_lit); + litval <<= bstr; + litval &= (~mask) & 0xff; + + loadRegFromAop (hc08_reg_a, derefaop, 0); + if ((mask|litval)!=0xff) + emitcode ("and","#0x%02x", mask); + if (litval) + emitcode ("ora","#0x%02x", litval); + hc08_dirtyReg (hc08_reg_a, FALSE); + storeRegToAop (hc08_reg_a, derefaop, 0); + + hc08_freeReg (hc08_reg_a); + goto release; + } + + /* Case with a bitfield length < 8 and arbitrary source + */ + loadRegFromAop (hc08_reg_a, AOP (right), 0); + /* shift and mask source value */ + AccLsh (bstr); + emitcode ("and", "#0x%02x", (~mask) & 0xff); + hc08_dirtyReg (hc08_reg_a, FALSE); + pushReg (hc08_reg_a, TRUE); + + loadRegFromAop (hc08_reg_a, derefaop, 0); + emitcode ("and", "#0x%02x", mask); + emitcode ("ora", "1,s"); + storeRegToAop (hc08_reg_a, derefaop, 0); + pullReg (hc08_reg_a); + + hc08_freeReg (hc08_reg_a); + goto release; + } + + /* Bit length is greater than 7 bits. In this case, copy */ + /* all except the partial byte at the end */ + for (rlen=blen;rlen>=8;rlen-=8) + { + transferAopAop (AOP (right), offset, derefaop, size-offset-1); + offset++; + } + + /* If there was a partial byte at the end */ + if (rlen) + { + mask = (((unsigned char) -1 << rlen) & 0xff); + + if (AOP_TYPE (right) == AOP_LIT) + { + /* Case with partial byte and literal source + */ + litval = (int) ulFromVal (AOP (right)->aopu.aop_lit); + litval >>= (blen-rlen); + litval &= (~mask) & 0xff; + loadRegFromAop (hc08_reg_a, derefaop, size-offset-1); + if ((mask|litval)!=0xff) + emitcode ("and","#0x%02x", mask); + if (litval) + emitcode ("ora","#0x%02x", litval); + hc08_dirtyReg (hc08_reg_a, FALSE); + storeRegToAop (hc08_reg_a, derefaop, size-offset-1); + hc08_dirtyReg (hc08_reg_a, FALSE); + hc08_freeReg (hc08_reg_a); + goto release; + } + + /* Case with partial byte and arbitrary source + */ + loadRegFromAop (hc08_reg_a, AOP (right), offset); + emitcode ("and", "#0x%02x", (~mask) & 0xff); + hc08_dirtyReg (hc08_reg_a, FALSE); + pushReg (hc08_reg_a, TRUE); + + loadRegFromAop (hc08_reg_a, derefaop, size-offset-1); + emitcode ("and", "#0x%02x", mask); + emitcode ("ora", "1,s"); + storeRegToAop (hc08_reg_a, derefaop, size-offset-1); + pullReg (hc08_reg_a); + } + + hc08_freeReg (hc08_reg_a); + +release: + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (NULL, derefaop, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genDataPointerSet - remat pointer to data space */ +/*-----------------------------------------------------------------*/ +static void +genDataPointerSet (operand * right, + operand * result, + iCode * ic) +{ + int size; + asmop *derefaop; + + D(emitcode ("; genDataPointerSet","")); + + aopOp (right, ic, FALSE); + size = AOP_SIZE (right); + + derefaop = aopDerefAop (AOP (result)); + freeAsmop (result, NULL, ic, TRUE); + derefaop->size = size; + + while (size--) + { + transferAopAop (AOP (right), size, derefaop, size); + } + + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (NULL, derefaop, ic, TRUE); +} + + +/*-----------------------------------------------------------------*/ +/* genPointerSet - stores the value into a pointer location */ +/*-----------------------------------------------------------------*/ +static void +genPointerSet (iCode * ic, iCode *pi) +{ + operand *right = IC_RIGHT (ic); + operand *result = IC_RESULT (ic); + sym_link *type, *etype; + int size, offset; + sym_link *retype = getSpec (operandType (right)); + sym_link *letype = getSpec (operandType (result)); + + D(emitcode ("; genPointerSet","")); + + type = operandType (result); + etype = getSpec (type); + + aopOp (result, ic, FALSE); + + /* if the result is rematerializable */ + if (AOP_TYPE (result) == AOP_IMMD || AOP_TYPE (result) == AOP_LIT) + { + if (!IS_BITVAR (retype) && !IS_BITVAR (letype)) + { + genDataPointerSet (right, result, ic); + return; + } + else + { + genPackBitsImmed (result, (IS_BITVAR (retype) ? retype : letype), right, ic); + return; + } + } + + /* if the operand is already in hx + then we do nothing else we move the value to hx */ + if (AOP_TYPE (result) != AOP_STR) + { + loadRegFromAop (hc08_reg_hx, AOP (result), 0); + } + /* so hx now contains the address */ + aopOp (right, ic, FALSE); + + /* if bit then unpack */ + if (IS_BITVAR (retype) || IS_BITVAR (letype)) + genPackBits ((IS_BITVAR (retype) ? retype : letype), right); + else + { + size = AOP_SIZE (right); + offset = size-1; + + while (size--) + { + loadRegFromAop (hc08_reg_a, AOP (right), offset--); + accopWithMisc ("sta", ",x"); + if (size || pi) + { + emitcode ("aix", "#1"); + } + hc08_freeReg (hc08_reg_a); + } + } + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, TRUE); + + if (pi) { + aopOp (IC_RESULT (pi), pi, FALSE); + storeRegToAop (hc08_reg_hx, AOP (IC_RESULT (pi)), 0); + freeAsmop (IC_RESULT (pi), NULL, pi, TRUE); + pi->generated=1; + } + + hc08_freeReg (hc08_reg_hx); + +} + +/*-----------------------------------------------------------------*/ +/* genIfx - generate code for Ifx statement */ +/*-----------------------------------------------------------------*/ +static void +genIfx (iCode * ic, iCode * popIc) +{ + operand *cond = IC_COND (ic); + int isbit = 0; + + D(emitcode ("; genIfx","")); + + aopOp (cond, ic, FALSE); + + /* If the condition is a literal, we can just do an unconditional */ + /* branch or no branch */ + if (AOP_TYPE (cond) == AOP_LIT) + { + unsigned long lit = ulFromVal (AOP (cond)->aopu.aop_lit); + freeAsmop (cond, NULL, ic, TRUE); + + /* if there was something to be popped then do it */ + if (popIc) + genIpop (popIc); + if (lit) + { + if (IC_TRUE (ic)) + emitBranch ("jmp", IC_TRUE (ic)); + } + else + { + if (IC_FALSE (ic)) + emitBranch ("jmp", IC_FALSE (ic)); + } + ic->generated = 1; + return; + } + + /* get the value into acc */ + if (AOP_TYPE (cond) != AOP_CRY) + asmopToBool (AOP (cond), FALSE); + else + isbit = 1; + /* the result is now in the accumulator */ + freeAsmop (cond, NULL, ic, TRUE); + + /* if there was something to be popped then do it */ + if (popIc) + genIpop (popIc); + + /* if the condition is a bit variable */ + if (isbit && IS_ITEMP (cond) && + SPIL_LOC (cond)) + genIfxJump (ic, SPIL_LOC (cond)->rname); + else if (isbit && !IS_ITEMP (cond)) + genIfxJump (ic, OP_SYMBOL (cond)->rname); + else + genIfxJump (ic, "a"); + + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genAddrOf - generates code for address of */ +/*-----------------------------------------------------------------*/ +static void +genAddrOf (iCode * ic) +{ + symbol *sym = OP_SYMBOL (IC_LEFT (ic)); + int size, offset; + + D(emitcode ("; genAddrOf","")); + + aopOp (IC_RESULT (ic), ic, FALSE); + + /* if the operand is on the stack then we + need to get the stack offset of this + variable */ + if (sym->onStack) + { + /* if it has an offset then we need to compute it */ + offset = _G.stackOfs + _G.stackPushes + sym->stack; + hc08_useReg (hc08_reg_hx); + emitcode ("tsx", ""); + while (offset > 127) + { + emitcode ("aix", "#127"); + offset -= 127; + } + while (offset < -128) + { + emitcode ("aix", "#-128"); + offset += 128; + } + emitcode ("aix", "#%d", offset); + storeRegToFullAop (hc08_reg_hx, AOP (IC_RESULT (ic)), FALSE); + hc08_freeReg (hc08_reg_hx); + + goto release; + } + + /* object not on stack then we need the name */ + size = AOP_SIZE (IC_RESULT (ic)); + offset = 0; + + while (size--) + { + char s[SDCC_NAME_MAX+10]; + switch (offset) { + case 0: + sprintf (s, "#%s", sym->rname); + break; + case 1: + sprintf (s, "#>%s", sym->rname); + break; + default: + sprintf (s, "#(%s >> %d)", + sym->rname, + offset * 8); + } + storeConstToAop(s, AOP (IC_RESULT (ic)), offset++); + } + +release: + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + +} + +/*-----------------------------------------------------------------*/ +/* genAssign - generate code for assignment */ +/*-----------------------------------------------------------------*/ +static void +genAssign (iCode * ic) +{ + operand *result, *right; + int size; +// unsigned long lit = 0L; + + D(emitcode("; genAssign","")); + + result = IC_RESULT (ic); + right = IC_RIGHT (ic); + + /* if they are the same */ + if (operandsEqu (result, right)) { + return; + } + + aopOp (right, ic, FALSE); + aopOp (result, ic, TRUE); + + /* if they are the same registers */ + if (sameRegs (AOP (right), AOP (result))) + goto release; + + if ((AOP_TYPE (right) == AOP_LIT) + && (IS_AOP_HX(AOP(result)))) + { + loadRegFromAop(hc08_reg_hx, AOP (right), 0); + goto release; + } + + /* general case */ + size = AOP_SIZE (result); + while (size--) + { + transferAopAop (AOP (right), size, AOP (result), size); + } + +release: + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genJumpTab - generates code for jump table */ +/*-----------------------------------------------------------------*/ +static void +genJumpTab (iCode * ic) +{ + symbol *jtab; + symbol *jtablo = newiTempLabel (NULL); + symbol *jtabhi = newiTempLabel (NULL); + + D(emitcode ("; genJumpTab","")); + + aopOp (IC_JTCOND (ic), ic, FALSE); + + if (hc08_reg_x->isFree && hc08_reg_x->isFree) + { + /* get the condition into x */ + loadRegFromAop (hc08_reg_x, AOP (IC_JTCOND (ic)), 0); + freeAsmop (IC_JTCOND (ic), NULL, ic, TRUE); + loadRegFromConst (hc08_reg_h, zero); + + emitcode ("lda", "%05d$,x", jtabhi->key + 100); + emitcode ("ldx", "%05d$,x", jtablo->key + 100); + transferRegReg (hc08_reg_a, hc08_reg_h, TRUE); + emitcode ("jmp", ",x"); + + hc08_dirtyReg (hc08_reg_a, TRUE); + hc08_dirtyReg (hc08_reg_hx, TRUE); + } + else + { + adjustStack(-2); + pushReg(hc08_reg_hx, TRUE); + + /* get the condition into x */ + loadRegFromAop (hc08_reg_x, AOP (IC_JTCOND (ic)), 0); + freeAsmop (IC_JTCOND (ic), NULL, ic, TRUE); + loadRegFromConst (hc08_reg_h, zero); + + emitcode ("lda", "%05d$,x", jtabhi->key + 100); + emitcode ("sta", "3,s"); + emitcode ("lda", "%05d$,x", jtablo->key + 100); + emitcode ("sta", "4,s"); + + pullReg(hc08_reg_hx); + emitcode ("rts", ""); + _G.stackPushes += 2; + updateCFA(); + } + + /* now generate the jump labels */ + emitLabel (jtablo); + for (jtab = setFirstItem (IC_JTLABELS (ic)); jtab; + jtab = setNextItem (IC_JTLABELS (ic))) + emitcode (".db", "%05d$", jtab->key + 100); + emitLabel (jtabhi); + for (jtab = setFirstItem (IC_JTLABELS (ic)); jtab; + jtab = setNextItem (IC_JTLABELS (ic))) + emitcode (".db", ">%05d$", jtab->key + 100); + +} + +/*-----------------------------------------------------------------*/ +/* genCast - gen code for casting */ +/*-----------------------------------------------------------------*/ +static void +genCast (iCode * ic) +{ + operand *result = IC_RESULT (ic); + sym_link *ctype = operandType (IC_LEFT (ic)); + sym_link *rtype = operandType (IC_RIGHT (ic)); + operand *right = IC_RIGHT (ic); + int size, offset; + + D(emitcode("; genCast","")); + + /* if they are equivalent then do nothing */ + if (operandsEqu (IC_RESULT (ic), IC_RIGHT (ic))) + return; + + aopOp (right, ic, FALSE); + aopOp (result, ic, FALSE); + + + /* if they are the same size : or less */ + if (AOP_SIZE (result) <= AOP_SIZE (right)) + { + + /* if they are in the same place */ + #if 0 + if (sameRegs (AOP (right), AOP (result))) + goto release; + #endif + + /* if they in different places then copy */ + size = AOP_SIZE (result); + offset = 0; + while (size--) + { + transferAopAop(AOP (right), offset, AOP (result), offset); + offset++; + } + goto release; + } + + + /* if the result is of type pointer */ + if (IS_PTR (ctype)) + { + + int p_type; + sym_link *type = operandType (right); + sym_link *etype = getSpec (type); + + /* pointer to generic pointer */ + if (IS_GENPTR (ctype)) + { + if (IS_PTR (type)) + p_type = DCL_TYPE (type); + else + { + if (SPEC_SCLS(etype)==S_REGISTER) { + // let's assume it is a generic pointer + p_type=GPOINTER; + } else { + /* we have to go by the storage class */ + p_type = PTR_TYPE (SPEC_OCLS (etype)); + } + } + + /* the first two bytes are known */ + size = GPTRSIZE - 1; + offset = 0; + while (size--) + { + transferAopAop(AOP (right), offset, AOP (result), offset); + offset++; + } + /* the last byte depending on type */ +#if 0 + { + int gpVal = pointerTypeToGPByte(p_type, NULL, NULL); + char gpValStr[10]; + + if (gpVal == -1) + { + // pointerTypeToGPByte will have bitched. + exit(1); + } + + sprintf(gpValStr, "#0x%x", gpVal); + aopPut (AOP (result), gpValStr, GPTRSIZE - 1); + } +#endif + goto release; + } + + /* just copy the pointers */ + size = AOP_SIZE (result); + offset = 0; + while (size--) + { + transferAopAop(AOP (right), offset, AOP (result), offset); + offset++; + } + goto release; + } + + /* so we now know that the size of destination is greater + than the size of the source */ + /* we move to result for the size of source */ + size = AOP_SIZE (right); + offset = 0; + while (size--) + { + transferAopAop(AOP (right), offset, AOP (result), offset); + offset++; + } + + /* now depending on the sign of the source && destination */ + size = AOP_SIZE (result) - AOP_SIZE (right); + /* if unsigned or not an integral type */ + if (!IS_SPEC (rtype) || SPEC_USIGN (rtype) || AOP_TYPE(right)==AOP_CRY) + { + while (size--) + storeConstToAop (zero, AOP (result), offset++); + } + else + { + /* we need to extend the sign :{ */ + loadRegFromAop (hc08_reg_a, AOP (right), AOP_SIZE (right) -1); + accopWithMisc ("rola", ""); + accopWithMisc ("clra", ""); + accopWithMisc ("sbc", zero); + while (size--) + storeRegToAop (hc08_reg_a, AOP (result), offset++); + } + + /* we are done hurray !!!! */ + +release: + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); + +} + +/*-----------------------------------------------------------------*/ +/* genDjnz - generate decrement & jump if not zero instrucion */ +/*-----------------------------------------------------------------*/ +static int +genDjnz (iCode * ic, iCode * ifx) +{ + symbol *lbl, *lbl1; + if (!ifx) + return 0; + + D(emitcode ("; genDjnz","")); + + /* if the if condition has a false label + then we cannot save */ + if (IC_FALSE (ifx)) + return 0; + + /* if the minus is not of the form + a = a - 1 */ + if (!isOperandEqual (IC_RESULT (ic), IC_LEFT (ic)) || + !IS_OP_LITERAL (IC_RIGHT (ic))) + return 0; + + if (operandLitValue (IC_RIGHT (ic)) != 1) + return 0; + + /* dbnz doesn't support extended mode */ + if (isOperandInFarSpace (IC_RESULT (ic))) + return 0; + + /* if the size of this greater than one then no + saving */ +// if (getSize (operandType (IC_RESULT (ic))) > 1) +// return 0; + aopOp (IC_RESULT (ic), ic, FALSE); + if (AOP_SIZE (IC_RESULT (ic))>1) + { + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + return 0; + } + + /* otherwise we can save BIG */ + lbl = newiTempLabel (NULL); + lbl1 = newiTempLabel (NULL); + + + emitcode ("dbnz", "%s,%05d$", aopAdrStr (AOP (IC_RESULT (ic)), 0, FALSE), + lbl->key + 100); + + emitBranch ("bra", lbl1); + emitLabel (lbl); + emitBranch ("jmp", IC_TRUE (ifx)); + emitLabel (lbl1); + + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + ifx->generated = 1; + return 1; +} + +/*-----------------------------------------------------------------*/ +/* genReceive - generate code for a receive iCode */ +/*-----------------------------------------------------------------*/ +static void +genReceive (iCode * ic) +{ + int size; + int offset; + D(emitcode ("; genReceive","")); + + aopOp (IC_RESULT (ic), ic, FALSE); + size = AOP_SIZE (IC_RESULT (ic)); + offset = 0; + + if (ic->argreg) { + while (size--) { + transferAopAop( hc08_aop_pass[offset+(ic->argreg-1)], 0, + AOP (IC_RESULT (ic)), offset); + if (hc08_aop_pass[offset]->type == AOP_REG) + hc08_freeReg (hc08_aop_pass[offset]->aopu.aop_reg[0]); + offset++; + } + } + + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genDummyRead - generate code for dummy read of volatiles */ +/*-----------------------------------------------------------------*/ +static void +genDummyRead (iCode * ic) +{ + operand *op; + int size, offset; + + D(emitcode("; genDummyRead","")); + + op = IC_RIGHT (ic); + if (op && IS_SYMOP (op)) + { + + aopOp (op, ic, FALSE); + + size = AOP_SIZE (op); + offset = 0; + + while (size--) + { + loadRegFromAop (hc08_reg_a, AOP (op), offset); + hc08_freeReg (hc08_reg_a); + offset++; + } + + freeAsmop (op, NULL, ic, TRUE); + } + op = IC_LEFT (ic); + if (op && IS_SYMOP (op)) + { + + aopOp (op, ic, FALSE); + + size = AOP_SIZE (op); + offset = 0; + + while (size--) + { + loadRegFromAop (hc08_reg_a, AOP (op), offset); + hc08_freeReg (hc08_reg_a); + offset++; + } + + freeAsmop (op, NULL, ic, TRUE); + } +} + +/*-----------------------------------------------------------------*/ +/* genCritical - generate code for start of a critical sequence */ +/*-----------------------------------------------------------------*/ +static void +genCritical (iCode *ic) +{ + D(emitcode("; genCritical","")); + + if (IC_RESULT (ic)) + aopOp (IC_RESULT (ic), ic, TRUE); + + emitcode ("tpa", ""); + hc08_dirtyReg (hc08_reg_a, FALSE); + emitcode ("sei", ""); + + if (IC_RESULT (ic)) + storeRegToAop (hc08_reg_a, AOP (IC_RESULT (ic)), 0); + else + pushReg (hc08_reg_a, FALSE); + + hc08_freeReg (hc08_reg_a); + if (IC_RESULT (ic)) + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genEndCritical - generate code for end of a critical sequence */ +/*-----------------------------------------------------------------*/ +static void +genEndCritical (iCode *ic) +{ + D(emitcode("; genEndCritical","")); + + if (IC_RIGHT (ic)) + { + aopOp (IC_RIGHT (ic), ic, FALSE); + loadRegFromAop (hc08_reg_a, AOP (IC_RIGHT (ic)), 0); + emitcode ("tap", ""); + hc08_freeReg (hc08_reg_a); + freeAsmop (IC_RIGHT (ic), NULL, ic, TRUE); + } + else + { + pullReg (hc08_reg_a); + emitcode ("tap", ""); + } +} + + + +/*-----------------------------------------------------------------*/ +/* genhc08Code - generate code for HC08 based controllers */ +/*-----------------------------------------------------------------*/ +void +genhc08Code (iCode * lic) +{ + iCode *ic; + int cln = 0; + int clevel = 0; + int cblock = 0; + + lineHead = lineCurr = NULL; + + /* print the allocation information */ + if (allocInfo && currFunc) + printAllocInfo (currFunc, codeOutBuf); + /* if debug information required */ + if (options.debug && currFunc) + { + debugFile->writeFunction (currFunc, lic); + #if 0 + _G.debugLine = 1; + if (IS_STATIC (currFunc->etype)) + emitcode ("", "F%s$%s$0$0 ==.", moduleName, currFunc->name); + else + emitcode ("", "G$%s$0$0 ==.", currFunc->name); + _G.debugLine = 0; + #endif + } + /* stack pointer name */ + if (options.useXstack) + spname = "_spx"; + else + spname = "sp"; + + debugFile->writeFrameAddress (NULL, NULL, 0); /* have no idea where frame is now */ + + hc08_aop_pass[0] = newAsmop (AOP_REG); + hc08_aop_pass[0]->size=1; + hc08_aop_pass[0]->aopu.aop_reg[0] = hc08_reg_a; + hc08_aop_pass[1] = newAsmop (AOP_REG); + hc08_aop_pass[1]->size=1; + hc08_aop_pass[1]->aopu.aop_reg[0] = hc08_reg_x; + hc08_aop_pass[2] = newAsmop (AOP_DIR); + hc08_aop_pass[2]->size=1; + hc08_aop_pass[2]->aopu.aop_dir = "__ret2"; + hc08_aop_pass[3] = newAsmop (AOP_DIR); + hc08_aop_pass[3]->size=1; + hc08_aop_pass[3]->aopu.aop_dir = "__ret3"; + + for (ic = lic; ic; ic = ic->next) + { + + _G.current_iCode = ic; + + if (ic->level != clevel || ic->block != cblock) + { + if (options.debug) + { + debugFile->writeScope(ic); + } + clevel = ic->level; + cblock = ic->block; + } + + if (ic->lineno && cln != ic->lineno) + { + if (options.debug) + { + debugFile->writeCLine(ic); + #if 0 + _G.debugLine = 1; + emitcode ("", "C$%s$%d$%d$%d ==.", + FileBaseName (ic->filename), ic->lineno, + ic->level, ic->block); + _G.debugLine = 0; + #endif + } + if (!options.noCcodeInAsm) { + emitcode ("", ";%s:%d: %s", ic->filename, ic->lineno, + printCLine(ic->filename, ic->lineno)); + } + cln = ic->lineno; + } + if (options.iCodeInAsm) { + char regsInUse[80]; + int i; + const char *iLine; + + for (i=0; i<6; i++) { + sprintf (®sInUse[i], + "%c", ic->riu & (1<seq, printILine(ic)); + dbuf_free(iLine); + } + /* if the result is marked as + spilt and rematerializable or code for + this has already been generated then + do nothing */ + if (resultRemat (ic) || ic->generated) + continue; + + { + int i; + regs *reg; + symbol *sym; + + for (i=A_IDX;i<=XA_IDX;i++) + { + reg = hc08_regWithIdx(i); + if (reg->aop) + emitcode("","; %s = %s offset %d", reg->name, + aopName(reg->aop), reg->aopofs); + reg->isFree = TRUE; + } + if (IC_LEFT (ic) && IS_ITEMP (IC_LEFT (ic))) + { + sym = OP_SYMBOL (IC_LEFT (ic)); + if (sym->accuse == ACCUSE_HX) + { + hc08_reg_h->isFree = FALSE; + hc08_reg_x->isFree = FALSE; + } + else if (sym->accuse == ACCUSE_XA) + { + hc08_reg_a->isFree = FALSE; + if (sym->nRegs>1) + hc08_reg_x->isFree = FALSE; + } + } + if (IC_RIGHT (ic) && IS_ITEMP (IC_RIGHT (ic))) + { + sym = OP_SYMBOL (IC_RIGHT (ic)); + if (sym->accuse == ACCUSE_HX) + { + hc08_reg_h->isFree = FALSE; + hc08_reg_x->isFree = FALSE; + } + else if (sym->accuse == ACCUSE_XA) + { + hc08_reg_a->isFree = FALSE; + if (sym->nRegs>1) + hc08_reg_x->isFree = FALSE; + } + } + } + + /* depending on the operation */ + switch (ic->op) + { + case '!': + genNot (ic); + break; + + case '~': + genCpl (ic); + break; + + case UNARYMINUS: + genUminus (ic); + break; + + case IPUSH: + genIpush (ic); + break; + + case IPOP: + /* IPOP happens only when trying to restore a + spilt live range, if there is an ifx statement + following this pop then the if statement might + be using some of the registers being popped which + would destory the contents of the register so + we need to check for this condition and handle it */ + if (ic->next && + ic->next->op == IFX && + regsInCommon (IC_LEFT (ic), IC_COND (ic->next))) + genIfx (ic->next, ic); + else + genIpop (ic); + break; + + case CALL: + genCall (ic); + break; + + case PCALL: + genPcall (ic); + break; + + case FUNCTION: + genFunction (ic); + break; + + case ENDFUNCTION: + genEndFunction (ic); + break; + + case RETURN: + genRet (ic); + break; + + case LABEL: + genLabel (ic); + break; + + case GOTO: + genGoto (ic); + break; + + case '+': + if (!genPointerGetSetOfs (ic)) + genPlus (ic); + break; + + case '-': + if (!genDjnz (ic, ifxForOp (IC_RESULT (ic), ic))) + genMinus (ic); + break; + + case '*': + genMult (ic); + break; + + case '/': + genDiv (ic); + break; + + case '%': + genMod (ic); + break; + + case '>': + case '<': + case LE_OP: + case GE_OP: + genCmp (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case NE_OP: + case EQ_OP: + genCmpEQorNE (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case AND_OP: + genAndOp (ic); + break; + + case OR_OP: + genOrOp (ic); + break; + + case '^': + genXor (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case '|': + genOr (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case BITWISEAND: + genAnd (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case INLINEASM: + genInline (ic); + break; + + case RRC: + genRRC (ic); + break; + + case RLC: + genRLC (ic); + break; + + case GETHBIT: + genGetHbit (ic); + break; + + case LEFT_OP: + genLeftShift (ic); + break; + + case RIGHT_OP: + genRightShift (ic); + break; + + case GET_VALUE_AT_ADDRESS: + genPointerGet (ic, + hasInc (IC_LEFT (ic), ic, + getSize (operandType (IC_RESULT (ic)))), + ifxForOp (IC_RESULT (ic), ic) ); + break; + + case '=': + if (POINTER_SET (ic)) + genPointerSet (ic, hasInc (IC_RESULT(ic),ic,getSize(operandType(IC_RIGHT(ic))))); + else + genAssign (ic); + break; + + case IFX: + genIfx (ic, NULL); + break; + + case ADDRESS_OF: + genAddrOf (ic); + break; + + case JUMPTABLE: + genJumpTab (ic); + break; + + case CAST: + genCast (ic); + break; + + case RECEIVE: + genReceive (ic); + break; + + case SEND: + addSet (&_G.sendSet, ic); + break; + + case DUMMY_READ_VOLATILE: + genDummyRead (ic); + break; + + case CRITICAL: + genCritical (ic); + break; + + case ENDCRITICAL: + genEndCritical (ic); + break; + + case SWAP: + genSwap (ic); + break; + + default: + ic = ic; + } + + if (!hc08_reg_a->isFree) + DD(emitcode("","; forgot to free a")); + if (!hc08_reg_x->isFree) + DD(emitcode("","; forgot to free x")); + if (!hc08_reg_h->isFree) + DD(emitcode("","; forgot to free h")); + if (!hc08_reg_hx->isFree) + DD(emitcode("","; forgot to free hx")); + if (!hc08_reg_xa->isFree) + DD(emitcode("","; forgot to free xa")); + } + + debugFile->writeFrameAddress (NULL, NULL, 0); /* have no idea where frame is now */ + + + /* now we are ready to call the + peep hole optimizer */ + if (!options.nopeep) + peepHole (&lineHead); + + /* now do the actual printing */ + printLine (lineHead, codeOutBuf); + return; +} diff --git a/src/hc08/gen.h b/src/hc08/gen.h new file mode 100644 index 0000000..b8b09b6 --- /dev/null +++ b/src/hc08/gen.h @@ -0,0 +1,97 @@ +/*------------------------------------------------------------------------- + SDCCgen51.h - header file for code generation for 8051 + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCGEN51_H +#define SDCCGEN51_H + +enum + { + AOP_LIT = 1, + AOP_REG, AOP_DIR, + AOP_STK, AOP_IMMD, AOP_STR, + AOP_CRY, + AOP_EXT, AOP_SOF, AOP_DUMMY + }; + +enum + { + ACCUSE_XA = 1, + ACCUSE_HX + }; + +/* type asmop : a homogenised type for + all the different spaces an operand can be + in */ +typedef struct asmop + { + + short type; + /* can have values + AOP_LIT - operand is a literal value + AOP_REG - is in registers + AOP_DIR - operand using direct addressing mode + AOP_STK - should be pushed on stack this + can happen only for the result + AOP_IMMD - immediate value for eg. remateriazable + AOP_CRY - carry contains the value of this + AOP_STR - array of strings + AOP_SOF - operand at an offset on the stack + AOP_EXT - operand using extended addressing mode + */ + short coff; /* current offset */ + short size; /* total size */ + short psize; /* pointer size */ + operand *op; /* originating operand */ + unsigned code:1; /* is in Code space */ + unsigned paged:1; /* in paged memory */ + unsigned freed:1; /* already freed */ + unsigned isaddr:1; /* is an address to actual operand */ + unsigned stacked:1; /* partial results stored on stack */ + struct asmop *stk_aop[4]; /* asmops for the results on the stack */ + union + { + value *aop_lit; /* if literal */ + regs *aop_reg[4]; /* array of registers */ + char *aop_dir; /* if direct */ + regs *aop_ptr; /* either -> to r0 or r1 */ + struct { + int from_cast_remat; /* cast remat created this : immd2 field used for highest order*/ + char *aop_immd1; /* if immediate others are implied */ + char *aop_immd2; /* cast remat will generate this */ + } aop_immd; + int aop_stk; /* stack offset when AOP_STK */ + char *aop_str[4]; /* just a string array containing the location */ + } + aopu; + } +asmop; + +void genhc08Code (iCode *); +void hc08_emitDebuggerSymbol (char *); + +//extern char *fReturn8051[]; +extern unsigned fReturnSizeHC08; +//extern char **fReturn; + +#endif diff --git a/src/hc08/hc08.dsp b/src/hc08/hc08.dsp new file mode 100644 index 0000000..80d1d2b --- /dev/null +++ b/src/hc08/hc08.dsp @@ -0,0 +1,120 @@ +# Microsoft Developer Studio Project File - Name="hc08" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Static Library" 0x0104 + +CFG=hc08 - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "hc08.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "hc08.mak" CFG="hc08 - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "hc08 - Win32 Debug" (based on "Win32 (x86) Static Library") +!MESSAGE "hc08 - Win32 Release" (based on "Win32 (x86) Static Library") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "hc08 - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /FR /FD /GZ /Zm500 /c +# ADD CPP /nologo /W2 /Gm /GX /ZI /Od /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /FR /FD /GZ /Zm1000 /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LIB32=link.exe -lib +# ADD BASE LIB32 /nologo /out:"Debug\port.lib" +# ADD LIB32 /nologo /out:"Debug\port.lib" + +!ELSEIF "$(CFG)" == "hc08 - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /ML /W3 /GX /O2 /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /FD /Zm500 /c +# ADD CPP /nologo /ML /W3 /GX /O2 /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /FD /Zm1000 /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LIB32=link.exe -lib +# ADD BASE LIB32 /nologo /out:"Release\port.lib" +# ADD LIB32 /nologo /out:"Release\port.lib" + +!ENDIF + +# Begin Target + +# Name "hc08 - Win32 Debug" +# Name "hc08 - Win32 Release" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\gen.c +# End Source File +# Begin Source File + +SOURCE=.\main.c +# End Source File +# Begin Source File + +SOURCE=.\ralloc.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=.\gen.h +# End Source File +# Begin Source File + +SOURCE=.\main.h +# End Source File +# Begin Source File + +SOURCE=.\ralloc.h +# End Source File +# Begin Source File + +SOURCE=..\..\sdcc_vc.h +# End Source File +# End Group +# End Target +# End Project diff --git a/src/hc08/hc08a.dsp b/src/hc08/hc08a.dsp new file mode 100644 index 0000000..80579c5 --- /dev/null +++ b/src/hc08/hc08a.dsp @@ -0,0 +1,90 @@ +# Microsoft Developer Studio Project File - Name="hc08a" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Generic Project" 0x010a + +CFG=hc08a - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "hc08a.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "hc08a.mak" CFG="hc08a - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "hc08a - Win32 Debug" (based on "Win32 (x86) Generic Project") +!MESSAGE "hc08a - Win32 Release" (based on "Win32 (x86) Generic Project") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +MTL=midl.exe + +!IF "$(CFG)" == "hc08a - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "" +# PROP Intermediate_Dir "" +# PROP Target_Dir "" + +!ELSEIF "$(CFG)" == "hc08a - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Win32_Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "" +# PROP Intermediate_Dir "" +# PROP Target_Dir "" + +!ENDIF + +# Begin Target + +# Name "hc08a - Win32 Debug" +# Name "hc08a - Win32 Release" +# Begin Source File + +SOURCE=.\peeph.def + +!IF "$(CFG)" == "hc08a - Win32 Debug" + +# Begin Custom Build +InputPath=.\peeph.def + +"peeph.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph.rul + +# End Custom Build + +!ELSEIF "$(CFG)" == "hc08a - Win32 Release" + +# Begin Custom Build +InputPath=.\peeph.def + +"peeph.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph.rul + +# End Custom Build + +!ENDIF + +# End Source File +# End Target +# End Project diff --git a/src/hc08/main.c b/src/hc08/main.c new file mode 100644 index 0000000..da5fd14 --- /dev/null +++ b/src/hc08/main.c @@ -0,0 +1,521 @@ +/** @file main.c + hc08 specific general functions. + + Note that mlh prepended _hc08_ on the static functions. Makes + it easier to set a breakpoint using the debugger. +*/ +#include "common.h" +#include "main.h" +#include "ralloc.h" +#include "gen.h" +#include "dbuf_string.h" +#include "../SDCCutil.h" + +extern char * iComments2; +extern DEBUGFILE dwarf2DebugFile; +extern int dwarf2FinalizeFile(FILE *); + +static char _defaultRules[] = +{ +#include "peeph.rul" +}; + +/* list of key words used by msc51 */ +static char *_hc08_keywords[] = +{ + "at", + //"bit", + "code", + "critical", + "data", + "far", + //"idata", + "interrupt", + "near", + //"pdata", + "reentrant", + //"sfr", + //"sbit", + //"using", + "xdata", + "_data", + "_code", + "_generic", + "_near", + "_xdata", + //"_pdata", + //"_idata", + "_naked", + "_overlay", + NULL +}; + + +void hc08_assignRegisters (ebbIndex *); + +static int regParmFlg = 0; /* determine if we can register a parameter */ + +static void +_hc08_init (void) +{ + asm_addTree (&asm_asxxxx_mapping); +} + +static void +_hc08_reset_regparm (void) +{ + regParmFlg = 0; +} + +static int +_hc08_regparm (sym_link * l, bool reentrant) +{ + int size = getSize(l); + + /* If they fit completely, the first two bytes of parameters can go */ + /* into A and X, otherwise, they go on the stack. Examples: */ + /* foo(char p1) A <- p1 */ + /* foo(char p1, char p2) A <- p1, X <- p2 */ + /* foo(char p1, char p2, char p3) A <- p1, X <- p2, stack <- p3 */ + /* foo(int p1) XA <- p1 */ + /* foo(long p1) stack <- p1 */ + /* foo(char p1, int p2) A <- p1, stack <- p2 */ + /* foo(int p1, char p2) XA <- p1, stack <- p2 */ + + if (regParmFlg>=2) + return 0; + + if ((regParmFlg+size)>2) + { + regParmFlg = 2; + return 0; + } + + regParmFlg += size; + return 1+regParmFlg-size; +} + +static bool +_hc08_parseOptions (int *pargc, char **argv, int *i) +{ + if (!strcmp (argv[*i], "--out-fmt-elf")) + { + options.out_fmt = 2; + debugFile = &dwarf2DebugFile; + return TRUE; + } + + return FALSE; +} + +static OPTION _hc08_options[] = + { + { 0, "--out-fmt-elf", NULL, "Output executable in ELF format" }, + { 0, NULL } + }; + +static void +_hc08_finaliseOptions (void) +{ + if (options.noXinitOpt) { + port->genXINIT=0; + } + + if (options.model == MODEL_LARGE) { + port->mem.default_local_map = xdata; + port->mem.default_globl_map = xdata; + } + else + { + port->mem.default_local_map = data; + port->mem.default_globl_map = data; + } + + istack->ptrType = FPOINTER; +} + +static void +_hc08_setDefaultOptions (void) +{ + options.code_loc = 0x8000; + options.data_loc = 0x80; + options.xdata_loc = 0; /* 0 means immediately following data */ + options.stack_loc = 0x7fff; + options.out_fmt = 1; /* use motorola S19 output */ + + options.ommitFramePtr = 1; /* no frame pointer (we use SP */ + /* offsets instead) */ + +} + +static const char * +_hc08_getRegName (struct regs *reg) +{ + if (reg) + return reg->name; + return "err"; +} + +static void +_hc08_genAssemblerPreamble (FILE * of) +{ + int i; + int needOrg = 1; + symbol *mainExists=newSymbol("main", 0); + mainExists->block=0; + + fprintf (of, "\t.area %s\n",HOME_NAME); + fprintf (of, "\t.area GSINIT0 (CODE)\n"); + fprintf (of, "\t.area %s\n",port->mem.static_name); + fprintf (of, "\t.area %s\n",port->mem.post_static_name); + fprintf (of, "\t.area %s\n",CODE_NAME); + fprintf (of, "\t.area %s\n",port->mem.xinit_name); + fprintf (of, "\t.area %s\n",port->mem.const_name); + fprintf (of, "\t.area %s\n",port->mem.data_name); + fprintf (of, "\t.area %s\n",port->mem.overlay_name); + fprintf (of, "\t.area %s\n",port->mem.bit_name); + fprintf (of, "\t.area %s\n",port->mem.xdata_name); + fprintf (of, "\t.area %s\n",port->mem.xidata_name); + + if ((mainExists=findSymWithLevel(SymbolTab, mainExists))) + { + // generate interrupt vector table + fprintf (of, "\t.area\tCODEIVT (ABS)\n"); + + for (i=maxInterrupts;i>0;i--) + { + if (interrupts[i]) + { + if (needOrg) + { + fprintf (of, "\t.org\t0x%04x\n", (0xfffe - (i * 2))); + needOrg = 0; + } + fprintf (of, "\t.dw\t%s\n", interrupts[i]->rname); + } + else + needOrg = 1; + } + if (needOrg) + fprintf (of, "\t.org\t0xfffe\n"); + fprintf (of, "\t.dw\t%s", "__sdcc_gs_init_startup\n\n"); + + fprintf (of, "\t.area GSINIT0\n"); + fprintf (of, "__sdcc_gs_init_startup:\n"); + if (options.stack_loc) + { + fprintf (of, "\tldhx\t#0x%04x\n", options.stack_loc+1); + fprintf (of, "\ttxs\n"); + } + else + fprintf (of, "\trsp\n"); + fprintf (of, "\tjsr\t__sdcc_external_startup\n"); + fprintf (of, "\tbeq\t__sdcc_init_data\n"); + fprintf (of, "\tjmp\t__sdcc_program_startup\n"); + fprintf (of, "__sdcc_init_data:\n"); + + fprintf (of, "; _hc08_genXINIT() start\n"); + fprintf (of, " ldhx #0\n"); + fprintf (of, "00001$:\n"); + fprintf (of, " cphx #l_XINIT\n"); + fprintf (of, " beq 00002$\n"); + fprintf (of, " lda s_XINIT,x\n"); + fprintf (of, " sta s_XISEG,x\n"); + fprintf (of, " aix #1\n"); + fprintf (of, " bra 00001$\n"); + fprintf (of, "00002$:\n"); + fprintf (of, "; _hc08_genXINIT() end\n"); + + fprintf (of, "\t.area GSFINAL\n"); + fprintf (of, "\tjmp\t__sdcc_program_startup\n\n"); + + fprintf (of, "\t.area CSEG\n"); + fprintf (of, "__sdcc_program_startup:\n"); + fprintf (of, "\tjsr\t_main\n"); + fprintf (of, "\tbra\t.\n"); + + } +} + +static void +_hc08_genAssemblerEnd (FILE * of) +{ + if (options.out_fmt == 2 && options.debug) + { + dwarf2FinalizeFile (of); + } +} + +static void +_hc08_genExtraAreas (FILE * asmFile, bool mainExists) +{ + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; extended address mode data\n"); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&xdata->oBuf, asmFile); +} + + +/* Generate interrupt vector table. */ +static int +_hc08_genIVT (struct dbuf_s * oBuf, symbol ** interrupts, int maxInterrupts) +{ + int i; + + dbuf_printf (oBuf, "\t.area\tCODEIVT (ABS)\n"); + dbuf_printf (oBuf, "\t.org\t0x%04x\n", + (0xfffe - (maxInterrupts * 2))); + + for (i=maxInterrupts;i>0;i--) + { + if (interrupts[i]) + dbuf_printf (oBuf, "\t.dw\t%s\n", interrupts[i]->rname); + else + dbuf_printf (oBuf, "\t.dw\t0xffff\n"); + } + dbuf_printf (oBuf, "\t.dw\t%s", "__sdcc_gs_init_startup\n"); + + return TRUE; +} + +/* Generate code to copy XINIT to XISEG */ +static void _hc08_genXINIT (FILE * of) { + fprintf (of, "; _hc08_genXINIT() start\n"); + fprintf (of, "; _hc08_genXINIT() end\n"); +} + + +/* Do CSE estimation */ +static bool cseCostEstimation (iCode *ic, iCode *pdic) +{ + operand *result = IC_RESULT(ic); + sym_link *result_type = operandType(result); + + return 0; /* disable CSE */ + + /* if it is a pointer then return ok for now */ + if (IC_RESULT(ic) && IS_PTR(result_type)) return 1; + + if (ic->op == ADDRESS_OF) + return 0; + + /* if bitwise | add & subtract then no since hc08 is pretty good at it + so we will cse only if they are local (i.e. both ic & pdic belong to + the same basic block */ + if (IS_BITWISE_OP(ic) || ic->op == '+' || ic->op == '-') { + /* then if they are the same Basic block then ok */ + if (ic->eBBlockNum == pdic->eBBlockNum) return 1; + else return 0; + } + + /* for others it is cheaper to do the cse */ + return 1; +} + + +/* Indicate which extended bit operations this port supports */ +static bool +hasExtBitOp (int op, int size) +{ + if (op == RRC + || op == RLC + || op == GETHBIT + || (op == SWAP && size <= 2) + ) + return TRUE; + else + return FALSE; +} + +/* Indicate the expense of an access to an output storage class */ +static int +oclsExpense (struct memmap *oclass) +{ + /* The hc08's addressing modes allow access to all storage classes */ + /* inexpensively (<=0) */ + + if (IN_DIRSPACE (oclass)) /* direct addressing mode is fastest */ + return -2; + if (IN_FARSPACE (oclass)) /* extended addressing mode is almost at fast */ + return -1; + if (oclass == istack) /* stack is the slowest, but still faster than */ + return 0; /* trying to copy to a temp location elsewhere */ + + return 0; /* anything we missed */ +} + + +/*----------------------------------------------------------------------*/ +/* hc08_dwarfRegNum - return the DWARF register number for a register. */ +/* These are defined for the HC08 in "Motorola 8- and 16-bit Embedded */ +/* Application Binary Interface (M8/16EABI)" */ +/*----------------------------------------------------------------------*/ +static int +hc08_dwarfRegNum (regs * reg) +{ + switch (reg->rIdx) + { + case A_IDX: return 0; + case H_IDX: return 1; + case X_IDX: return 2; + case CND_IDX: return 17; + case SP_IDX: return 15; + } + return -1; +} + + + +/** $1 is always the basename. + $2 is always the output file. + $3 varies + $l is the list of extra options that should be there somewhere... + MUST be terminated with a NULL. +*/ +static const char *_linkCmd[] = +{ + "link-hc08", "-nf", "\"$1\"", NULL +}; + +/* $3 is replaced by assembler.debug_opts resp. port->assembler.plain_opts */ +static const char *_asmCmd[] = +{ + "as-hc08", "$l", "$3", "\"$1.asm\"", NULL +}; + +/* Globals */ +PORT hc08_port = +{ + TARGET_ID_HC08, + "hc08", + "HC08", /* Target name */ + NULL, /* Processor name */ + { + glue, + FALSE, /* Emit glue around main */ + MODEL_SMALL | MODEL_LARGE, + MODEL_LARGE + }, + { + _asmCmd, + NULL, + "-plosgffc", /* Options with debug */ + "-plosgff", /* Options without debug */ + 0, + ".asm", + NULL /* no do_assemble function */ + }, + { + _linkCmd, + NULL, + NULL, + ".rel", + 1 + }, + { + _defaultRules + }, + { + /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ + 1, 2, 2, 4, 2, 2, 2, 1, 4, 4 + }, + /* tags for generic pointers */ + { 0x00, 0x40, 0x60, 0x80 }, /* far, near, xstack, code */ + + { + "XSEG", + "STACK", + "CSEG (CODE)", + "DSEG", + NULL, /* "ISEG" */ + NULL, /* "PSEG" */ + "XSEG", + "BSEG", + "RSEG", + "GSINIT (CODE)", + "OSEG (OVR)", + "GSFINAL (CODE)", + "HOME (CODE)", + "XISEG", // initialized xdata + "XINIT", // a code copy of xiseg + "CONST (CODE)", // const_name - const data (code or not) + "CABS (ABS,CODE)", // cabs_name - const absolute data (code or not) + "XABS (ABS)", // xabs_name - absolute xdata + "IABS (ABS)", // iabs_name - absolute data + NULL, + NULL, + 1 + }, + { _hc08_genExtraAreas, + NULL }, + { + -1, /* direction (-1 = stack grows down) */ + 0, /* bank_overhead (switch between register banks) */ + 4, /* isr_overhead */ + 2, /* call_overhead */ + 0, /* reent_overhead */ + 0 /* banked_overhead (switch between code banks) */ + }, + /* hc08 has an 8 bit mul */ + { + 1, -1 + }, + { + hc08_emitDebuggerSymbol, + { + hc08_dwarfRegNum, + NULL, + NULL, + 4, /* addressSize */ + 14, /* regNumRet */ + 15, /* regNumSP */ + -1, /* regNumBP */ + 1, /* offsetSP */ + }, + }, + { + 256, /* maxCount */ + 2, /* sizeofElement */ + {8,16,32}, /* sizeofMatchJump[] */ + {8,16,32}, /* sizeofRangeCompare[] */ + 5, /* sizeofSubtract */ + 10, /* sizeofDispatch */ + }, + "_", + _hc08_init, + _hc08_parseOptions, + _hc08_options, + NULL, + _hc08_finaliseOptions, + _hc08_setDefaultOptions, + hc08_assignRegisters, + _hc08_getRegName, + _hc08_keywords, + _hc08_genAssemblerPreamble, + _hc08_genAssemblerEnd, /* no genAssemblerEnd */ + _hc08_genIVT, + _hc08_genXINIT, + NULL, /* genInitStartup */ + _hc08_reset_regparm, + _hc08_regparm, + NULL, /* process_pragma */ + NULL, /* getMangledFunctionName */ + NULL, /* hasNativeMulFor */ + hasExtBitOp, /* hasExtBitOp */ + oclsExpense, /* oclsExpense */ + TRUE, /* use_dw_for_init */ + FALSE, /* little endian */ + 0, /* leave lt */ + 0, /* leave gt */ + 1, /* transform <= to ! > */ + 1, /* transform >= to ! < */ + 1, /* transform != to !(a == b) */ + 0, /* leave == */ + FALSE, /* No array initializer support. */ + cseCostEstimation, + NULL, /* no builtin functions */ + GPOINTER, /* treat unqualified pointers as "generic" pointers */ + 1, /* reset labelKey to 1 */ + 1, /* globals & local static allowed */ + PORT_MAGIC +}; diff --git a/src/hc08/main.h b/src/hc08/main.h new file mode 100644 index 0000000..6555225 --- /dev/null +++ b/src/hc08/main.h @@ -0,0 +1,8 @@ +#ifndef MAIN_INCLUDE +#define MAIN_INCLUDE + +bool x_parseOptions (char **argv, int *pargc); +void x_setDefaultOptions (void); +void x_finaliseOptions (void); + +#endif diff --git a/src/hc08/peeph.def b/src/hc08/peeph.def new file mode 100644 index 0000000..1fddfa6 --- /dev/null +++ b/src/hc08/peeph.def @@ -0,0 +1,316 @@ +replace { + pula + psha + lda %1 +} by { + ; Peephole 1a - removed redundant pula/psha + lda %1 +} + +replace { + pula + psha + lda %1,s +} by { + ; Peephole 1b - removed redundant pula/psha + lda %1,s +} + +replace { + pula + psha + clra +} by { + ; Peephole 1c - removed redundant pula/psha + clra +} + + +replace { + bcs %1 + jmp %5 +%1: +} by { + ; Peephole 2a - eliminated jmp + bcc %5 +%1: +} if labelInRange + +replace { + bcc %1 + jmp %5 +%1: +} by { + ; Peephole 2b - eliminated jmp + bcs %5 +%1: +} if labelInRange + +replace { + beq %1 + jmp %5 +%1: +} by { + ; Peephole 2c - eliminated jmp + bne %5 +%1: +} if labelInRange + +replace { + bne %1 + jmp %5 +%1: +} by { + ; Peephole 2d - eliminated jmp + beq %5 +%1: +} if labelInRange + +replace { + brclr %3,%2,%1 + jmp %5 +%1: +} by { + ; Peephole 2e - eliminated jmp + brset %3,%2,%5 +%1: +} if labelInRange + +replace { + brset %3,%2,%1 + jmp %5 +%1: +} by { + ; Peephole 2f - eliminated jmp + brclr %3,%2,%5 +%1: +} if labelInRange + +replace { + bls %1 + jmp %5 +%1: +} by { + ; Peephole 2g - eliminated bra + bhi %5 +%1: +} if labelInRange + +replace { + bhi %1 + jmp %5 +%1: +} by { + ; Peephole 2h - eliminated bra + bls %5 +%1: +} if labelInRange + +replace { + ble %1 + jmp %5 +%1: +} by { + ; Peephole 2i - eliminated bra + bgt %5 +%1: + +} if labelInRange +replace { + bgt %1 + jmp %5 +%1: +} by { + ; Peephole 2j - eliminated bra + ble %5 +%1: +} if labelInRange + +replace { + bge %1 + jmp %5 +%1: +} by { + ; Peephole 2k - eliminated bra + blt %5 +%1: +} if labelInRange + +replace { + blt %1 + jmp %5 +%1: +} by { + ; Peephole 2l - eliminated bra + bge %5 +%1: +} if labelInRange + +replace { + jmp %5 +} by { + ; Peephole 3 - shortened jmp to bra + bra %5 +} if labelInRange + +replace { + lda %1 + tsta +} by { + ; Peephole 4a - eliminated redundant tsta + lda %1 +} + +replace { + lda %1,s + tsta +} by { + ; Peephole 4b - eliminated redundant tsta + lda %1,s +} + +replace { + ldx %1 + tstx +} by { + ; Peephole 4c - eliminated redundant tstx + ldx %1 +} + +replace { + ldx %1,s + tstx +} by { + ; Peephole 4d - eliminated redundant tstx + ldx %1,s +} + +replace { + clra + sta %1 + clra + sta %2 + clra + sta %3 + clra + sta %4 +} by { + ; Peephole 5a - eliminated redundant clra + clra + sta %1 + sta %2 + sta %3 + sta %4 +} + +replace { + clra + sta %1 + clra + sta %2 + clra + sta %3 +} by { + ; Peephole 5b - eliminated redundant clra + clra + sta %1 + sta %2 + sta %3 +} + +replace { + clra + sta %1 + clra + sta %2 +} by { + ; Peephole 5c - eliminated redundant clra + clra + sta %1 + sta %2 +} + +replace { + lda #%9 + sta %1 + lda #%9 + sta %2 + lda #%9 + sta %3 + lda #%9 + sta %4 +} by { + ; Peephole 5d - eliminated redundant lda + lda #%9 + sta %1 + sta %2 + sta %3 + sta %4 +} + +replace { + lda #%9 + sta %1 + lda #%9 + sta %2 + lda #%9 + sta %3 +} by { + ; Peephole 5e - eliminated redundant lda + lda #%9 + sta %1 + sta %2 + sta %3 +} + +replace { + lda #%9 + sta %1 + lda #%9 + sta %2 +} by { + ; Peephole 5f - eliminated redundant lda + lda #%9 + sta %1 + sta %2 +} + +replace { + jmp %5 +} by { + ; Peephole 6a - replaced jmp to rts with rts + rts +} if labelIsReturnOnly + +replace { + bra %5 +} by { + ; Peephole 6b - replaced jmp to rts with rts + rts +} if labelIsReturnOnly + +replace restart { + psha + lda %1 + sta 1,s +} by { + ; Peephole 7 - optimized stack allocation + lda %1 + psha +} + +replace restart { + lda %1 + sta %1 +} by { + ; Peephole 8a - removed redundant sta + lda %1 +} if notVolatile %1 + +replace restart { + sta %1 + lda %1 +} by { + ; Peephole 8b - removed redundant lda + sta %1 +} if notVolatile %1 diff --git a/src/hc08/ralloc.c b/src/hc08/ralloc.c new file mode 100644 index 0000000..bdbcda2 --- /dev/null +++ b/src/hc08/ralloc.c @@ -0,0 +1,3164 @@ +/*------------------------------------------------------------------------ + + SDCCralloc.c - source file for register allocation. 68HC08 specific + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" +#include "ralloc.h" +#include "gen.h" + +/*-----------------------------------------------------------------*/ +/* At this point we start getting processor specific although */ +/* some routines are non-processor specific & can be reused when */ +/* targetting other processors. The decision for this will have */ +/* to be made on a routine by routine basis */ +/* routines used to pack registers are most definitely not reusable */ +/* since the pack the registers depending strictly on the MCU */ +/*-----------------------------------------------------------------*/ + +extern void genhc08Code (iCode *); +#define D(x) + +/* Global data */ +static struct + { + bitVect *spiltSet; + set *stackSpil; + bitVect *regAssigned; + bitVect *totRegAssigned; /* final set of LRs that got into registers */ + short blockSpil; + int slocNum; + bitVect *funcrUsed; /* registers used in a function */ + int stackExtend; + int dataExtend; + } +_G; + +/* Shared with gen.c */ +int hc08_ptrRegReq; /* one byte pointer register required */ + +/* 8051 registers */ +regs regshc08[] = +{ + + {REG_GPR, A_IDX, "a", 1, NULL, 0, 1}, + {REG_GPR, X_IDX, "x", 2, NULL, 0, 1}, + {REG_GPR, H_IDX, "h", 4, NULL, 0, 1}, + {REG_PTR, HX_IDX, "hx", 6, NULL, 0, 1}, + {REG_GPR, XA_IDX, "xa", 3, NULL, 0, 1}, + + {REG_CND, CND_IDX, "C", 0, NULL, 0, 1}, + {0, SP_IDX, "sp", 0, NULL, 0, 1}, +}; +int hc08_nRegs = 7; + +regs *hc08_reg_a; +regs *hc08_reg_x; +regs *hc08_reg_h; +regs *hc08_reg_hx; +regs *hc08_reg_xa; +regs *hc08_reg_sp; + +static void spillThis (symbol *); +static void freeAllRegs (); + +/*-----------------------------------------------------------------*/ +/* allocReg - allocates register of given type */ +/*-----------------------------------------------------------------*/ +static regs * +allocReg (short type) +{ + return NULL; + + if ((type==REG_PTR) && (regshc08[HX_IDX].isFree)) + { + regshc08[HX_IDX].isFree = 0; + if (currFunc) + currFunc->regsUsed = + bitVectSetBit (currFunc->regsUsed, HX_IDX); + return ®shc08[HX_IDX]; + } + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* hc08_regWithIdx - returns pointer to register wit index number */ +/*-----------------------------------------------------------------*/ +regs * +hc08_regWithIdx (int idx) +{ + int i; + + for (i = 0; i < hc08_nRegs; i++) + if (regshc08[i].rIdx == idx) + return ®shc08[i]; + + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "regWithIdx not found"); + exit (1); +} + +/*-----------------------------------------------------------------*/ +/* hc08_freeReg - frees a register */ +/*-----------------------------------------------------------------*/ +void +hc08_freeReg (regs * reg) +{ + if (!reg) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "hc08_freeReg - Freeing NULL register"); + exit (1); + } + + reg->isFree = 1; + + switch (reg->rIdx) + { + case A_IDX: + if (hc08_reg_x->isFree) + hc08_reg_xa->isFree = 1; + break; + case X_IDX: + if (hc08_reg_a->isFree) + hc08_reg_xa->isFree = 1; + if (hc08_reg_h->isFree) + hc08_reg_hx->isFree = 1; + break; + case H_IDX: + if (hc08_reg_x->isFree) + hc08_reg_hx->isFree = 1; + break; + case HX_IDX: + hc08_reg_h->isFree = 1; + hc08_reg_x->isFree = 1; + if (hc08_reg_a->isFree) + hc08_reg_xa->isFree = 1; + break; + case XA_IDX: + hc08_reg_x->isFree = 1; + hc08_reg_a->isFree = 1; + if (hc08_reg_h->isFree) + hc08_reg_hx->isFree = 1; + break; + default: + break; + } +} + + +/*-----------------------------------------------------------------*/ +/* nFreeRegs - returns number of free registers */ +/*-----------------------------------------------------------------*/ +static int +nFreeRegs (int type) +{ + int i; + int nfr = 0; + + return 0; + + for (i = 0; i < hc08_nRegs; i++) + if (regshc08[i].isFree && regshc08[i].type == type) + nfr++; + return nfr; +} + +/*-----------------------------------------------------------------*/ +/* nfreeRegsType - free registers with type */ +/*-----------------------------------------------------------------*/ +static int +nfreeRegsType (int type) +{ + int nfr; + if (type == REG_PTR) + { + if ((nfr = nFreeRegs (type)) == 0) + return nFreeRegs (REG_GPR); + } + + return nFreeRegs (type); +} + +/*-----------------------------------------------------------------*/ +/* hc08_useReg - marks a register as used */ +/*-----------------------------------------------------------------*/ +void +hc08_useReg (regs * reg) +{ + reg->isFree = 0; + + switch (reg->rIdx) + { + case A_IDX: + hc08_reg_xa->aop = NULL; + hc08_reg_xa->isFree = 0; + break; + case X_IDX: + hc08_reg_xa->aop = NULL; + hc08_reg_xa->isFree = 0; + hc08_reg_hx->aop = NULL; + hc08_reg_hx->isFree = 0; + break; + case H_IDX: + hc08_reg_hx->aop = NULL; + hc08_reg_hx->isFree = 0; + break; + case HX_IDX: + hc08_reg_h->aop = NULL; + hc08_reg_h->isFree = 0; + hc08_reg_x->aop = NULL; + hc08_reg_x->isFree = 0; + break; + case XA_IDX: + hc08_reg_x->aop = NULL; + hc08_reg_x->isFree = 0; + hc08_reg_a->aop = NULL; + hc08_reg_a->isFree = 0; + break; + default: + break; + } + +} + +/*-----------------------------------------------------------------*/ +/* hc08_dirtyReg - marks a register as dirty */ +/*-----------------------------------------------------------------*/ +void +hc08_dirtyReg (regs * reg, bool freereg) +{ + reg->aop = NULL; + + switch (reg->rIdx) + { + case A_IDX: + hc08_reg_xa->aop = NULL; + break; + case X_IDX: + hc08_reg_xa->aop = NULL; + hc08_reg_hx->aop = NULL; + break; + case H_IDX: + hc08_reg_hx->aop = NULL; + break; + case HX_IDX: + hc08_reg_h->aop = NULL; + hc08_reg_x->aop = NULL; + break; + case XA_IDX: + hc08_reg_x->aop = NULL; + hc08_reg_a->aop = NULL; + break; + default: + break; + } + if (freereg) + hc08_freeReg(reg); +} + +/*-----------------------------------------------------------------*/ +/* computeSpillable - given a point find the spillable live ranges */ +/*-----------------------------------------------------------------*/ +static bitVect * +computeSpillable (iCode * ic) +{ + bitVect *spillable; + + /* spillable live ranges are those that are live at this + point . the following categories need to be subtracted + from this set. + a) - those that are already spilt + b) - if being used by this one + c) - defined by this one */ + + spillable = bitVectCopy (ic->rlive); + spillable = + bitVectCplAnd (spillable, _G.spiltSet); /* those already spilt */ + spillable = + bitVectCplAnd (spillable, ic->uses); /* used in this one */ + bitVectUnSetBit (spillable, ic->defKey); + spillable = bitVectIntersect (spillable, _G.regAssigned); + return spillable; + +} + +/*-----------------------------------------------------------------*/ +/* noSpilLoc - return true if a variable has no spil location */ +/*-----------------------------------------------------------------*/ +static int +noSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return (sym->usl.spillLoc ? 0 : 1); +} + +/*-----------------------------------------------------------------*/ +/* hasSpilLoc - will return 1 if the symbol has spil location */ +/*-----------------------------------------------------------------*/ +static int +hasSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return (sym->usl.spillLoc ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* directSpilLoc - will return 1 if the splilocation is in direct */ +/*-----------------------------------------------------------------*/ +static int +directSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + if (sym->usl.spillLoc && + (IN_DIRSPACE (SPEC_OCLS (sym->usl.spillLoc->etype)))) + return 1; + else + return 0; +} + +/*-----------------------------------------------------------------*/ +/* hasSpilLocnoUptr - will return 1 if the symbol has spil location */ +/* but is not used as a pointer */ +/*-----------------------------------------------------------------*/ +static int +hasSpilLocnoUptr (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return ((sym->usl.spillLoc && !sym->uptr) ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* rematable - will return 1 if the remat flag is set */ +/*-----------------------------------------------------------------*/ +static int +rematable (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return sym->remat; +} + +/*-----------------------------------------------------------------*/ +/* notUsedInRemaining - not used or defined in remain of the block */ +/*-----------------------------------------------------------------*/ +static int +notUsedInRemaining (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return ((usedInRemaining (operandFromSymbol (sym), ic) ? 0 : 1) && + allDefsOutOfRange (sym->defs, ebp->fSeq, ebp->lSeq)); +} + +/*-----------------------------------------------------------------*/ +/* allLRs - return true for all */ +/*-----------------------------------------------------------------*/ +static int +allLRs (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return 1; +} + +/*-----------------------------------------------------------------*/ +/* liveRangesWith - applies function to a given set of live range */ +/*-----------------------------------------------------------------*/ +static set * +liveRangesWith (bitVect * lrs, int (func) (symbol *, eBBlock *, iCode *), + eBBlock * ebp, iCode * ic) +{ + set *rset = NULL; + int i; + + if (!lrs || !lrs->size) + return NULL; + + for (i = 1; i < lrs->size; i++) + { + symbol *sym; + if (!bitVectBitValue (lrs, i)) + continue; + + /* if we don't find it in the live range + hash table we are in serious trouble */ + if (!(sym = hTabItemWithKey (liveRanges, i))) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "liveRangesWith could not find liveRange"); + exit (1); + } + + if (func (sym, ebp, ic) && bitVectBitValue (_G.regAssigned, sym->key)) + addSetHead (&rset, sym); + } + + return rset; +} + + +/*-----------------------------------------------------------------*/ +/* leastUsedLR - given a set determines which is the least used */ +/*-----------------------------------------------------------------*/ +static symbol * +leastUsedLR (set * sset) +{ + symbol *sym = NULL, *lsym = NULL; + + sym = lsym = setFirstItem (sset); + + if (!lsym) + return NULL; + + for (; lsym; lsym = setNextItem (sset)) + { + + /* if usage is the same then prefer + the spill the smaller of the two */ + if (lsym->used == sym->used) + if (getSize (lsym->type) < getSize (sym->type)) + sym = lsym; + + /* if less usage */ + if (lsym->used < sym->used) + sym = lsym; + + } + + setToNull ((void *) &sset); + sym->blockSpil = 0; + return sym; +} + +/*-----------------------------------------------------------------*/ +/* noOverLap - will iterate through the list looking for over lap */ +/*-----------------------------------------------------------------*/ +static int +noOverLap (set * itmpStack, symbol * fsym) +{ + symbol *sym; + + + for (sym = setFirstItem (itmpStack); sym; + sym = setNextItem (itmpStack)) + { + if (bitVectBitValue(sym->clashes,fsym->key)) return 0; + } + + return 1; +} + +/*-----------------------------------------------------------------*/ +/* isFree - will return 1 if the a free spil location is found */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (isFree) +{ + symbol *sym = item; + V_ARG (symbol **, sloc); + V_ARG (symbol *, fsym); + + /* if already found */ + if (*sloc) + return 0; + + /* if it is free && and the itmp assigned to + this does not have any overlapping live ranges + with the one currently being assigned and + the size can be accomodated */ + if (sym->isFree && + noOverLap (sym->usl.itmpStack, fsym) && + getSize (sym->type) >= getSize (fsym->type)) + { + *sloc = sym; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* spillLRWithPtrReg :- will spil those live ranges which use PTR */ +/*-----------------------------------------------------------------*/ +static void +spillLRWithPtrReg (symbol * forSym) +{ + symbol *lrsym; + regs *hx; + int k; + + if (!_G.regAssigned || + bitVectIsZero (_G.regAssigned)) + return; + + hx = hc08_regWithIdx (HX_IDX); + + /* for all live ranges */ + for (lrsym = hTabFirstItem (liveRanges, &k); lrsym; + lrsym = hTabNextItem (liveRanges, &k)) + { + int j; + + /* if no registers assigned to it or spilt */ + /* if it does not overlap with this then + not need to spill it */ + + if (lrsym->isspilt || !lrsym->nRegs || + (lrsym->liveTo < forSym->liveFrom)) + continue; + + /* go thru the registers : if it is either + r0 or r1 then spil it */ + for (j = 0; j < lrsym->nRegs; j++) + if (lrsym->regs[j] == hx) + { + spillThis (lrsym); + break; + } + } + +} + +/*-----------------------------------------------------------------*/ +/* createStackSpil - create a location on the stack to spil */ +/*-----------------------------------------------------------------*/ +static symbol * +createStackSpil (symbol * sym) +{ + symbol *sloc = NULL; + int useXstack, model; + + char slocBuffer[30]; + + /* first go try and find a free one that is already + existing on the stack */ + if (applyToSet (_G.stackSpil, isFree, &sloc, sym)) + { + /* found a free one : just update & return */ + sym->usl.spillLoc = sloc; + sym->stackSpil = 1; + sloc->isFree = 0; + addSetHead (&sloc->usl.itmpStack, sym); + return sym; + } + + /* could not then have to create one , this is the hard part + we need to allocate this on the stack : this is really a + hack!! but cannot think of anything better at this time */ + + if (sprintf (slocBuffer, "sloc%d", _G.slocNum++) >= sizeof (slocBuffer)) + { + fprintf (stderr, "***Internal error: slocBuffer overflowed: %s:%d\n", + __FILE__, __LINE__); + exit (1); + } + + sloc = newiTemp (slocBuffer); + + /* set the type to the spilling symbol */ + sloc->type = copyLinkChain (sym->type); + sloc->etype = getSpec (sloc->type); + SPEC_SCLS (sloc->etype) = S_DATA; + SPEC_EXTR (sloc->etype) = 0; + SPEC_STAT (sloc->etype) = 0; + SPEC_VOLATILE(sloc->etype) = 0; + SPEC_ABSA(sloc->etype) = 0; + + /* we don't allow it to be allocated` + onto the external stack since : so we + temporarily turn it off ; we also + turn off memory model to prevent + the spil from going to the external storage + */ + + useXstack = options.useXstack; + model = options.model; +/* noOverlay = options.noOverlay; */ +/* options.noOverlay = 1; */ + options.model = options.useXstack = 0; + + allocLocal (sloc); + + options.useXstack = useXstack; + options.model = model; +/* options.noOverlay = noOverlay; */ + sloc->isref = 1; /* to prevent compiler warning */ + + /* if it is on the stack then update the stack */ + if (IN_STACK (sloc->etype)) + { + currFunc->stack += getSize (sloc->type); + _G.stackExtend += getSize (sloc->type); + } + else + _G.dataExtend += getSize (sloc->type); + + /* add it to the _G.stackSpil set */ + addSetHead (&_G.stackSpil, sloc); + sym->usl.spillLoc = sloc; + sym->stackSpil = 1; + + /* add it to the set of itempStack set + of the spill location */ + addSetHead (&sloc->usl.itmpStack, sym); + return sym; +} + +/*-----------------------------------------------------------------*/ +/* isSpiltOnStack - returns true if the spil location is on stack */ +/*-----------------------------------------------------------------*/ +static bool +isSpiltOnStack (symbol * sym) +{ + sym_link *etype; + + if (!sym) + return FALSE; + + if (!sym->isspilt) + return FALSE; + +/* if (sym->_G.stackSpil) */ +/* return TRUE; */ + + if (!sym->usl.spillLoc) + return FALSE; + + etype = getSpec (sym->usl.spillLoc->type); + if (IN_STACK (etype)) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* spillThis - spils a specific operand */ +/*-----------------------------------------------------------------*/ +static void +spillThis (symbol * sym) +{ + int i; + /* if this is rematerializable or has a spillLocation + we are okay, else we need to create a spillLocation + for it */ + if (!(sym->remat || sym->usl.spillLoc)) + createStackSpil (sym); + + /* mark it as spilt & put it in the spilt set */ + sym->isspilt = sym->spillA = 1; + _G.spiltSet = bitVectSetBit (_G.spiltSet, sym->key); + + bitVectUnSetBit (_G.regAssigned, sym->key); + bitVectUnSetBit (_G.totRegAssigned, sym->key); + + for (i = 0; i < sym->nRegs; i++) + + if (sym->regs[i]) + { + hc08_freeReg (sym->regs[i]); + sym->regs[i] = NULL; + } + + /* if spilt on stack then free up r0 & r1 + if they could have been assigned to some + LIVE ranges */ +// if (!hc08_ptrRegReq && isSpiltOnStack (sym)) +// { +// hc08_ptrRegReq++; +// spillLRWithPtrReg (sym); +// } + + if (sym->usl.spillLoc && !sym->remat) + sym->usl.spillLoc->allocreq++; + return; +} + +/*-----------------------------------------------------------------*/ +/* selectSpil - select a iTemp to spil : rather a simple procedure */ +/*-----------------------------------------------------------------*/ +static symbol * +selectSpil (iCode * ic, eBBlock * ebp, symbol * forSym) +{ + bitVect *lrcs = NULL; + set *selectS; + symbol *sym; + + /* get the spillable live ranges */ + lrcs = computeSpillable (ic); + + /* get all live ranges that are rematerizable */ + if ((selectS = liveRangesWith (lrcs, rematable, ebp, ic))) + { + + /* return the least used of these */ + return leastUsedLR (selectS); + } + + /* get live ranges with spillLocations in direct space */ + if ((selectS = liveRangesWith (lrcs, directSpilLoc, ebp, ic))) + { + sym = leastUsedLR (selectS); + strcpy (sym->rname, (sym->usl.spillLoc->rname[0] ? + sym->usl.spillLoc->rname : + sym->usl.spillLoc->name)); + sym->spildir = 1; + /* mark it as allocation required */ + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* if the symbol is local to the block then */ + if (forSym->liveTo < ebp->lSeq) + { + + /* check if there are any live ranges allocated + to registers that are not used in this block */ + if (!_G.blockSpil && (selectS = liveRangesWith (lrcs, notUsedInBlock, ebp, ic))) + { + sym = leastUsedLR (selectS); + /* if this is not rematerializable */ + if (!sym->remat) + { + _G.blockSpil++; + sym->blockSpil = 1; + } + return sym; + } + + /* check if there are any live ranges that not + used in the remainder of the block */ + if (!_G.blockSpil && + !isiCodeInFunctionCall (ic) && + (selectS = liveRangesWith (lrcs, notUsedInRemaining, ebp, ic))) + { + sym = leastUsedLR (selectS); + if (sym != forSym) + { + if (!sym->remat) + { + sym->remainSpil = 1; + _G.blockSpil++; + } + return sym; + } + } + } + + /* find live ranges with spillocation && not used as pointers */ + if ((selectS = liveRangesWith (lrcs, hasSpilLocnoUptr, ebp, ic))) + { + + sym = leastUsedLR (selectS); + /* mark this as allocation required */ + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* find live ranges with spillocation */ + if ((selectS = liveRangesWith (lrcs, hasSpilLoc, ebp, ic))) + { + + sym = leastUsedLR (selectS); + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* couldn't find then we need to create a spil + location on the stack , for which one? the least + used ofcourse */ + if ((selectS = liveRangesWith (lrcs, noSpilLoc, ebp, ic))) + { + + /* return a created spil location */ + sym = createStackSpil (leastUsedLR (selectS)); + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* this is an extreme situation we will spill + this one : happens very rarely but it does happen */ + spillThis (forSym); + return forSym; + +} + +/*-----------------------------------------------------------------*/ +/* spilSomething - spil some variable & mark registers as free */ +/*-----------------------------------------------------------------*/ +static bool +spilSomething (iCode * ic, eBBlock * ebp, symbol * forSym) +{ + symbol *ssym; + int i; + + /* get something we can spil */ + ssym = selectSpil (ic, ebp, forSym); + + /* mark it as spilt */ + ssym->isspilt = ssym->spillA = 1; + _G.spiltSet = bitVectSetBit (_G.spiltSet, ssym->key); + + /* mark it as not register assigned & + take it away from the set */ + bitVectUnSetBit (_G.regAssigned, ssym->key); + bitVectUnSetBit (_G.totRegAssigned, ssym->key); + + /* mark the registers as free */ + for (i = 0; i < ssym->nRegs; i++) + if (ssym->regs[i]) + hc08_freeReg (ssym->regs[i]); + + /* if spilt on stack then free up hx + if it could have been assigned to as gprs */ + if (!hc08_ptrRegReq && isSpiltOnStack (ssym)) + { + hc08_ptrRegReq++; + spillLRWithPtrReg (ssym); + } + + /* if this was a block level spil then insert push & pop + at the start & end of block respectively */ + if (ssym->blockSpil) + { + iCode *nic = newiCode (IPUSH, operandFromSymbol (ssym), NULL); + /* add push to the start of the block */ + addiCodeToeBBlock (ebp, nic, (ebp->sch->op == LABEL ? + ebp->sch->next : ebp->sch)); + nic = newiCode (IPOP, operandFromSymbol (ssym), NULL); + /* add pop to the end of the block */ + addiCodeToeBBlock (ebp, nic, NULL); + } + + /* if spilt because not used in the remainder of the + block then add a push before this instruction and + a pop at the end of the block */ + if (ssym->remainSpil) + { + + iCode *nic = newiCode (IPUSH, operandFromSymbol (ssym), NULL); + /* add push just before this instruction */ + addiCodeToeBBlock (ebp, nic, ic); + + nic = newiCode (IPOP, operandFromSymbol (ssym), NULL); + /* add pop to the end of the block */ + addiCodeToeBBlock (ebp, nic, NULL); + } + + if (ssym == forSym) + return FALSE; + else + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* getRegPtr - will try for PTR if not a GPR type if not spil */ +/*-----------------------------------------------------------------*/ +static regs * +getRegPtr (iCode * ic, eBBlock * ebp, symbol * sym) +{ + regs *reg; + +tryAgain: + /* try for a ptr type */ + if ((reg = allocReg (REG_PTR))) + return reg; + + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + /* we have to spil */ + if (!spilSomething (ic, ebp, sym)) + return NULL; + + /* this looks like an infinite loop but + in really selectSpil will abort */ + goto tryAgain; +} + +/*-----------------------------------------------------------------*/ +/* getRegGpr - will try for GPR if not spil */ +/*-----------------------------------------------------------------*/ +static regs * +getRegGpr (iCode * ic, eBBlock * ebp, symbol * sym) +{ + regs *reg; + +tryAgain: + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + if (!hc08_ptrRegReq) + if ((reg = allocReg (REG_PTR))) + return reg; + + /* we have to spil */ + if (!spilSomething (ic, ebp, sym)) + return NULL; + + /* this looks like an infinite loop but + in really selectSpil will abort */ + goto tryAgain; +} + +/*-----------------------------------------------------------------*/ +/* getRegPtrNoSpil - get it cannot split */ +/*-----------------------------------------------------------------*/ +static regs *getRegPtrNoSpil() +{ + regs *reg; + + /* try for a ptr type */ + if ((reg = allocReg (REG_PTR))) + return reg; + + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + assert(0); + + /* just to make the compiler happy */ + return 0; +} + +/*-----------------------------------------------------------------*/ +/* getRegGprNoSpil - get it cannot split */ +/*-----------------------------------------------------------------*/ +static regs *getRegGprNoSpil() +{ + + regs *reg; + if ((reg = allocReg (REG_GPR))) + return reg; + + if (!hc08_ptrRegReq) + if ((reg = allocReg (REG_PTR))) + return reg; + + assert(0); + + /* just to make the compiler happy */ + return 0; +} + +/*-----------------------------------------------------------------*/ +/* symHasReg - symbol has a given register */ +/*-----------------------------------------------------------------*/ +static bool +symHasReg (symbol * sym, regs * reg) +{ + int i; + + for (i = 0; i < sym->nRegs; i++) + if (sym->regs[i] == reg) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* deassignLRs - check the live to and if they have registers & are */ +/* not spilt then free up the registers */ +/*-----------------------------------------------------------------*/ +static void +deassignLRs (iCode * ic, eBBlock * ebp) +{ + symbol *sym; + int k; + symbol *result; + + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) + { + + symbol *psym = NULL; + /* if it does not end here */ + if (sym->liveTo > ic->seq) + continue; + + /* if it was spilt on stack then we can + mark the stack spil location as free */ + if (sym->isspilt) + { + if (sym->stackSpil) + { + sym->usl.spillLoc->isFree = 1; + sym->stackSpil = 0; + } + continue; + } + + if (!bitVectBitValue (_G.regAssigned, sym->key)) + continue; + + /* special case check if this is an IFX & + the privious one was a pop and the + previous one was not spilt then keep track + of the symbol */ + if (ic->op == IFX && ic->prev && + ic->prev->op == IPOP && + !ic->prev->parmPush && + !OP_SYMBOL (IC_LEFT (ic->prev))->isspilt) + psym = OP_SYMBOL (IC_LEFT (ic->prev)); + + if (sym->nRegs) + { + int i = 0; + + bitVectUnSetBit (_G.regAssigned, sym->key); + + /* if the result of this one needs registers + and does not have it then assign it right + away */ + if (IC_RESULT (ic) && + !(SKIP_IC2 (ic) || /* not a special icode */ + ic->op == JUMPTABLE || + ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP || + ic->op == RETURN || + POINTER_SET (ic)) && + (result = OP_SYMBOL (IC_RESULT (ic))) && /* has a result */ + result->liveTo > ic->seq && /* and will live beyond this */ + result->liveTo <= ebp->lSeq && /* does not go beyond this block */ + result->liveFrom == ic->seq && /* does not start before here */ + result->regType == sym->regType && /* same register types */ + result->nRegs && /* which needs registers */ + !result->isspilt && /* and does not already have them */ + !result->remat && + !bitVectBitValue (_G.regAssigned, result->key) && + /* the number of free regs + number of regs in this LR + can accomodate the what result Needs */ + ((nfreeRegsType (result->regType) + + sym->nRegs) >= result->nRegs) + ) + { + + for (i = 0; i < result->nRegs; i++) + if (i < sym->nRegs) + result->regs[i] = sym->regs[i]; + else + result->regs[i] = getRegGpr (ic, ebp, result); + + _G.regAssigned = bitVectSetBit (_G.regAssigned, result->key); + _G.totRegAssigned = bitVectSetBit (_G.totRegAssigned, result->key); + + } + + /* free the remaining */ + for (; i < sym->nRegs; i++) + { + if (psym) + { + if (!symHasReg (psym, sym->regs[i])) + hc08_freeReg (sym->regs[i]); + } + else + hc08_freeReg (sym->regs[i]); + } + } + } +} + + +/*-----------------------------------------------------------------*/ +/* reassignLR - reassign this to registers */ +/*-----------------------------------------------------------------*/ +static void +reassignLR (operand * op) +{ + symbol *sym = OP_SYMBOL (op); + int i; + + /* not spilt any more */ + sym->isspilt = sym->spillA = sym->blockSpil = sym->remainSpil = 0; + bitVectUnSetBit (_G.spiltSet, sym->key); + + _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); + _G.totRegAssigned = bitVectSetBit (_G.totRegAssigned, sym->key); + + _G.blockSpil--; + + for (i = 0; i < sym->nRegs; i++) + sym->regs[i]->isFree = 0; +} + +/*-----------------------------------------------------------------*/ +/* willCauseSpill - determines if allocating will cause a spill */ +/*-----------------------------------------------------------------*/ +static int +willCauseSpill (int nr, int rt) +{ + /* first check if there are any avlb registers + of te type required */ + if (rt == REG_PTR) + { + /* special case for pointer type + if pointer type not avlb then + check for type gpr */ + if (nFreeRegs (rt) >= nr) + return 0; + if (nFreeRegs (REG_GPR) >= nr) + return 0; + } + else + { + if (hc08_ptrRegReq) + { + if (nFreeRegs (rt) >= nr) + return 0; + } + else + { + if (nFreeRegs (REG_PTR) + + nFreeRegs (REG_GPR) >= nr) + return 0; + } + } + + /* it will cause a spil */ + return 1; +} + +/*-----------------------------------------------------------------*/ +/* positionRegs - the allocator can allocate same registers to res- */ +/* ult and operand, if this happens make sure they are in the same */ +/* position as the operand otherwise chaos results */ +/*-----------------------------------------------------------------*/ +static int +positionRegs (symbol * result, symbol * opsym) +{ + int count = min (result->nRegs, opsym->nRegs); + int i, j = 0, shared = 0; + int change = 0; + + /* if the result has been spilt then cannot share */ + if (opsym->isspilt) + return 0; +again: + shared = 0; + /* first make sure that they actually share */ + for (i = 0; i < count; i++) + { + for (j = 0; j < count; j++) + { + if (result->regs[i] == opsym->regs[j] && i != j) + { + shared = 1; + goto xchgPositions; + } + } + } +xchgPositions: + if (shared) + { + regs *tmp = result->regs[i]; + result->regs[i] = result->regs[j]; + result->regs[j] = tmp; + change ++; + goto again; + } + return change; +} + +/*------------------------------------------------------------------*/ +/* verifyRegsAssigned - make sure an iTemp is properly initialized; */ +/* it should either have registers or have beed spilled. Otherwise, */ +/* there was an uninitialized variable, so just spill this to get */ +/* the operand in a valid state. */ +/*------------------------------------------------------------------*/ +static void +verifyRegsAssigned (operand *op, iCode * ic) +{ + symbol * sym; + + if (!op) return; + if (!IS_ITEMP (op)) return; + + sym = OP_SYMBOL (op); + if (sym->isspilt) return; + if (!sym->nRegs) return; + if (sym->regs[0]) return; + + werrorfl (ic->filename, ic->lineno, W_LOCAL_NOINIT, + sym->prereqv ? sym->prereqv->name : sym->name); + spillThis (sym); +} + + + +/*-----------------------------------------------------------------*/ +/* serialRegAssign - serially allocate registers to the variables */ +/*-----------------------------------------------------------------*/ +static void +serialRegAssign (eBBlock ** ebbs, int count) +{ + int i; + + /* for all blocks */ + for (i = 0; i < count; i++) { + + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + /* of all instructions do */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) { +#if 1 + int reg; + + // update the registers in use at the start of this icode + for (reg=0; regriu &= ~(regshc08[reg].mask); + } else { + ic->riu |= (regshc08[reg].mask); + } + } +#endif + + /* if this is an ipop that means some live + range will have to be assigned again */ + if (ic->op == IPOP) + reassignLR (IC_LEFT (ic)); + + /* if result is present && is a true symbol */ + if (IC_RESULT (ic) && ic->op != IFX && + IS_TRUE_SYMOP (IC_RESULT (ic))) + OP_SYMBOL (IC_RESULT (ic))->allocreq++; + + /* take away registers from live + ranges that end at this instruction */ + deassignLRs (ic, ebbs[i]); + + /* some don't need registers */ + if (SKIP_IC2 (ic) || + ic->op == JUMPTABLE || + ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP || + (IC_RESULT (ic) && POINTER_SET (ic))) + continue; + + /* now we need to allocate registers + only for the result */ + if (IC_RESULT (ic)) { + symbol *sym = OP_SYMBOL (IC_RESULT (ic)); + bitVect *spillable; + int willCS; + int j; + int ptrRegSet = 0; + + /* Make sure any spill location is definately allocated */ + if (sym->isspilt && !sym->remat && sym->usl.spillLoc && + !sym->usl.spillLoc->allocreq) { + sym->usl.spillLoc->allocreq++; + } + + /* if it does not need or is spilt + or is already assigned to registers + or will not live beyond this instructions */ + if (!sym->nRegs || + sym->isspilt || + bitVectBitValue (_G.regAssigned, sym->key) || + sym->liveTo <= ic->seq) + continue; + + /* if some liverange has been spilt at the block level + and this one live beyond this block then spil this + to be safe */ + if (_G.blockSpil && sym->liveTo > ebbs[i]->lSeq) { + spillThis (sym); + continue; + } + /* if trying to allocate this will cause + a spill and there is nothing to spill + or this one is rematerializable then + spill this one */ + willCS = willCauseSpill (sym->nRegs, sym->regType); + spillable = computeSpillable (ic); + if (sym->remat || (willCS && bitVectIsZero (spillable))) { + spillThis (sym); + continue; + } + + /* If the live range preceeds the point of definition + then ideally we must take into account registers that + have been allocated after sym->liveFrom but freed + before ic->seq. This is complicated, so spill this + symbol instead and let fillGaps handle the allocation. */ + if (sym->liveFrom < ic->seq) { + spillThis (sym); + continue; + } + + /* if it has a spillocation & is used less than + all other live ranges then spill this */ + if (willCS) { + if (sym->usl.spillLoc) { + symbol *leastUsed = leastUsedLR (liveRangesWith (spillable, + allLRs, ebbs[i], ic)); + if (leastUsed && leastUsed->used > sym->used) { + spillThis (sym); + continue; + } + } else { + /* if none of the liveRanges have a spillLocation then better + to spill this one than anything else already assigned to registers */ + if (liveRangesWith(spillable,noSpilLoc,ebbs[i],ic)) { + /* if this is local to this block then we might find a block spil */ + if (!(sym->liveFrom >= ebbs[i]->fSeq && sym->liveTo <= ebbs[i]->lSeq)) { + spillThis (sym); + continue; + } + } + } + } + /* if we need ptr regs for the right side + then mark it */ + if (POINTER_GET (ic) && IS_SYMOP (IC_LEFT (ic)) + && getSize (OP_SYMBOL (IC_LEFT (ic))->type) <= (unsigned int) PTRSIZE) { + hc08_ptrRegReq++; + ptrRegSet = 1; + } + /* else we assign registers to it */ + _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); + _G.totRegAssigned = bitVectSetBit (_G.totRegAssigned, sym->key); + + for (j = 0; j < sym->nRegs; j++) { + if (sym->regType == REG_PTR) + sym->regs[j] = getRegPtr (ic, ebbs[i], sym); + else + sym->regs[j] = getRegGpr (ic, ebbs[i], sym); + + /* if the allocation failed which means + this was spilt then break */ + if (!sym->regs[j]) { + break; + } + } + + /* if it shares registers with operands make sure + that they are in the same position */ + if (IC_LEFT (ic) && IS_SYMOP (IC_LEFT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->nRegs && ic->op != '=') { + positionRegs (OP_SYMBOL (IC_RESULT (ic)), + OP_SYMBOL (IC_LEFT (ic))); + } + /* do the same for the right operand */ + if (IC_RIGHT (ic) && IS_SYMOP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->nRegs) { + positionRegs (OP_SYMBOL (IC_RESULT (ic)), + OP_SYMBOL (IC_RIGHT (ic))); + } + + if (ptrRegSet) { + hc08_ptrRegReq--; + ptrRegSet = 0; + } + + } + } + } + + /* Check for and fix any problems with uninitialized operands */ + for (i = 0; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + if (SKIP_IC2 (ic)) + continue; + + if (ic->op == IFX) + { + verifyRegsAssigned (IC_COND (ic), ic); + continue; + } + + if (ic->op == JUMPTABLE) + { + verifyRegsAssigned (IC_JTCOND (ic), ic); + continue; + } + + verifyRegsAssigned (IC_RESULT (ic), ic); + verifyRegsAssigned (IC_LEFT (ic), ic); + verifyRegsAssigned (IC_RIGHT (ic), ic); + } + } + +} + +/*-----------------------------------------------------------------*/ +/* fillGaps - Try to fill in the Gaps left by Pass1 */ +/*-----------------------------------------------------------------*/ +static void fillGaps() +{ + symbol *sym =NULL; + int key =0; + + if (getenv("DISABLE_FILL_GAPS")) return; + + /* look for liveranges that were spilt by the allocator */ + for (sym = hTabFirstItem(liveRanges,&key) ; sym ; + sym = hTabNextItem(liveRanges,&key)) { + + int i; + int pdone = 0; + + if (!sym->spillA || !sym->clashes || sym->remat) continue ; + + /* find the liveRanges this one clashes with, that are + still assigned to registers & mark the registers as used*/ + for ( i = 0 ; i < sym->clashes->size ; i ++) { + int k; + symbol *clr; + + if (bitVectBitValue(sym->clashes,i) == 0 || /* those that clash with this */ + bitVectBitValue(_G.totRegAssigned,i) == 0) /* and are still assigned to registers */ + continue ; + + clr = hTabItemWithKey(liveRanges,i); + assert(clr); + + /* mark these registers as used */ + for (k = 0 ; k < clr->nRegs ; k++ ) + hc08_useReg(clr->regs[k]); + } + + if (willCauseSpill(sym->nRegs,sym->regType)) { + /* NOPE :( clear all registers & and continue */ + freeAllRegs(); + continue ; + } + + /* THERE IS HOPE !!!! */ + for (i=0; i < sym->nRegs ; i++ ) { + if (sym->regType == REG_PTR) + sym->regs[i] = getRegPtrNoSpil (); + else + sym->regs[i] = getRegGprNoSpil (); + } + + /* for all its definitions check if the registers + allocated needs positioning NOTE: we can position + only ONCE if more than One positioning required + then give up */ + sym->isspilt = 0; + for (i = 0 ; i < sym->defs->size ; i++ ) { + if (bitVectBitValue(sym->defs,i)) { + iCode *ic; + if (!(ic = hTabItemWithKey(iCodehTab,i))) continue ; + if (SKIP_IC(ic)) continue; + assert(isSymbolEqual(sym,OP_SYMBOL(IC_RESULT(ic)))); /* just making sure */ + /* if left is assigned to registers */ + if (IS_SYMOP(IC_LEFT(ic)) && + bitVectBitValue(_G.totRegAssigned,OP_SYMBOL(IC_LEFT(ic))->key)) { + pdone += positionRegs(sym,OP_SYMBOL(IC_LEFT(ic))); + } + if (IS_SYMOP(IC_RIGHT(ic)) && + bitVectBitValue(_G.totRegAssigned,OP_SYMBOL(IC_RIGHT(ic))->key)) { + pdone += positionRegs(sym,OP_SYMBOL(IC_RIGHT(ic))); + } + if (pdone > 1) break; + } + } + for (i = 0 ; i < sym->uses->size ; i++ ) { + if (bitVectBitValue(sym->uses,i)) { + iCode *ic; + if (!(ic = hTabItemWithKey(iCodehTab,i))) continue ; + if (SKIP_IC(ic)) continue; + if (!IS_ASSIGN_ICODE(ic)) continue ; + + /* if result is assigned to registers */ + if (IS_SYMOP(IC_RESULT(ic)) && + bitVectBitValue(_G.totRegAssigned,OP_SYMBOL(IC_RESULT(ic))->key)) { + pdone += positionRegs(sym,OP_SYMBOL(IC_RESULT(ic))); + } + if (pdone > 1) break; + } + } + /* had to position more than once GIVE UP */ + if (pdone > 1) { + /* UNDO all the changes we made to try this */ + sym->isspilt = 1; + for (i=0; i < sym->nRegs ; i++ ) { + sym->regs[i] = NULL; + } + freeAllRegs(); + D(printf ("Fill Gap gave up due to positioning for %s in function %s\n",sym->name, currFunc ? currFunc->name : "UNKNOWN")); + continue ; + } + D(printf ("FILLED GAP for %s in function %s\n",sym->name, currFunc ? currFunc->name : "UNKNOWN")); + _G.totRegAssigned = bitVectSetBit(_G.totRegAssigned,sym->key); + sym->isspilt = sym->spillA = 0 ; + sym->usl.spillLoc->allocreq--; + freeAllRegs(); + } +} + +/*-----------------------------------------------------------------*/ +/* rUmaskForOp :- returns register mask for an operand */ +/*-----------------------------------------------------------------*/ +bitVect * +hc08_rUmaskForOp (operand * op) +{ + bitVect *rumask; + symbol *sym; + int j; + + /* only temporaries are assigned registers */ + if (!IS_ITEMP (op)) + return NULL; + + sym = OP_SYMBOL (op); + + /* if spilt or no registers assigned to it + then nothing */ + if (sym->isspilt || !sym->nRegs) + return NULL; + + rumask = newBitVect (hc08_nRegs); + + for (j = 0; j < sym->nRegs; j++) + { + rumask = bitVectSetBit (rumask, + sym->regs[j]->rIdx); + } + + return rumask; +} + +/*-----------------------------------------------------------------*/ +/* regsUsedIniCode :- returns bit vector of registers used in iCode */ +/*-----------------------------------------------------------------*/ +static bitVect * +regsUsedIniCode (iCode * ic) +{ + bitVect *rmask = newBitVect (hc08_nRegs); + + /* do the special cases first */ + if (ic->op == IFX) + { + rmask = bitVectUnion (rmask, + hc08_rUmaskForOp (IC_COND (ic))); + goto ret; + } + + /* for the jumptable */ + if (ic->op == JUMPTABLE) + { + rmask = bitVectUnion (rmask, + hc08_rUmaskForOp (IC_JTCOND (ic))); + + goto ret; + } + + /* of all other cases */ + if (IC_LEFT (ic)) + rmask = bitVectUnion (rmask, + hc08_rUmaskForOp (IC_LEFT (ic))); + + + if (IC_RIGHT (ic)) + rmask = bitVectUnion (rmask, + hc08_rUmaskForOp (IC_RIGHT (ic))); + + if (IC_RESULT (ic)) + rmask = bitVectUnion (rmask, + hc08_rUmaskForOp (IC_RESULT (ic))); + +ret: + return rmask; +} + +/*-----------------------------------------------------------------*/ +/* createRegMask - for each instruction will determine the regsUsed */ +/*-----------------------------------------------------------------*/ +static void +createRegMask (eBBlock ** ebbs, int count) +{ + int i; + + /* for all blocks */ + for (i = 0; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + /* for all instructions */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + + int j; + + if (SKIP_IC2 (ic) || !ic->rlive) + continue; + + /* first mark the registers used in this + instruction */ + ic->rUsed = regsUsedIniCode (ic); + _G.funcrUsed = bitVectUnion (_G.funcrUsed, ic->rUsed); + + /* now create the register mask for those + registers that are in use : this is a + super set of ic->rUsed */ + ic->rMask = newBitVect (hc08_nRegs + 1); + + /* for all live Ranges alive at this point */ + for (j = 1; j < ic->rlive->size; j++) + { + symbol *sym; + int k; + + /* if not alive then continue */ + if (!bitVectBitValue (ic->rlive, j)) + continue; + + /* find the live range we are interested in */ + if (!(sym = hTabItemWithKey (liveRanges, j))) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "createRegMask cannot find live range"); + fprintf(stderr, "\tmissing live range: key=%d\n", j); + exit (0); + } + + /* if no register assigned to it */ + if (!sym->nRegs || sym->isspilt) + continue; + + /* for all the registers allocated to it */ + for (k = 0; k < sym->nRegs; k++) + if (sym->regs[k]) + ic->rMask = + bitVectSetBit (ic->rMask, sym->regs[k]->rIdx); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* rematStr - returns the rematerialized string for a remat var */ +/*-----------------------------------------------------------------*/ +static char * +rematStr (symbol * sym) +{ + iCode *ic = sym->rematiCode; + int offset = 0; + + while (1) + { + /* if plus adjust offset to right hand side */ + if (ic->op == '+') + { + offset += (int) operandLitValue (IC_RIGHT (ic)); + ic = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + continue; + } + + /* if minus adjust offset to right hand side */ + if (ic->op == '-') + { + offset -= (int) operandLitValue (IC_RIGHT (ic)); + ic = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + continue; + } + + /* cast then continue */ + if (IS_CAST_ICODE(ic)) { + ic = OP_SYMBOL (IC_RIGHT (ic))->rematiCode; + continue; + } + /* we reached the end */ + break; + } + + if (ic->op == ADDRESS_OF) + { + if (offset) + { + SNPRINTF (buffer, sizeof(buffer), + "(%s %c 0x%04x)", + OP_SYMBOL (IC_LEFT (ic))->rname, + offset >= 0 ? '+' : '-', + abs (offset) & 0xffff); + } + else + { + strncpyz (buffer, OP_SYMBOL (IC_LEFT (ic))->rname, sizeof(buffer)); + } + } + else if (ic->op == '=') + { + offset += (int) operandLitValue (IC_RIGHT (ic)); + SNPRINTF (buffer, sizeof(buffer), + "0x%04x", + offset & 0xffff); + } + return buffer; +} + +/*-----------------------------------------------------------------*/ +/* regTypeNum - computes the type & number of registers required */ +/*-----------------------------------------------------------------*/ +static void +regTypeNum (eBBlock *ebbs) +{ + symbol *sym; + int k; + iCode *ic; + + /* for each live range do */ + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) + { + + /* if used zero times then no registers needed */ + if ((sym->liveTo - sym->liveFrom) == 0) + continue; + + + /* if the live range is a temporary */ + if (sym->isitmp) + { + + /* if the type is marked as a conditional */ + if (sym->regType == REG_CND) + continue; + + /* if used in return only then we don't + need registers */ + if (sym->ruonly || sym->accuse) + { + if (IS_AGGREGATE (sym->type) || sym->isptr) + sym->type = aggrToPtr (sym->type, FALSE); + continue; + } + + /* if the symbol has only one definition & + that definition is a get_pointer */ + if (bitVectnBitsOn (sym->defs) == 1 && + (ic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (sym->defs))) && + POINTER_GET (ic) && + !IS_BITVAR (sym->etype) && + (aggrToPtrDclType (operandType (IC_LEFT (ic)), FALSE) == POINTER)) + { + + if (ptrPseudoSymSafe (sym, ic)) + { + ptrPseudoSymConvert (sym, ic, rematStr (OP_SYMBOL (IC_LEFT (ic)))); + continue; + } + + /* if in data space or idata space then try to + allocate pointer register */ + + } + + /* if not then we require registers */ + sym->nRegs = ((IS_AGGREGATE (sym->type) || sym->isptr) ? + getSize (sym->type = aggrToPtr (sym->type, FALSE)) : + getSize (sym->type)); + + if (sym->nRegs > 4) + { + fprintf (stderr, "allocated more than 4 or 0 registers for type "); + printTypeChain (sym->type, stderr); + fprintf (stderr, "\n"); + } + + /* determine the type of register required */ + if (sym->nRegs == 1 && + IS_PTR (sym->type) && + sym->uptr) + sym->regType = REG_PTR; + else + sym->regType = REG_GPR; + + } + else + /* for the first run we don't provide */ + /* registers for true symbols we will */ + /* see how things go */ + sym->nRegs = 0; + } + +} + +/*-----------------------------------------------------------------*/ +/* freeAllRegs - mark all registers as free */ +/*-----------------------------------------------------------------*/ +static void +freeAllRegs () +{ + int i; + + for (i = 0; i < hc08_nRegs; i++) { + regshc08[i].isFree = 1; + regshc08[i].aop = NULL; + } +} + +/*-----------------------------------------------------------------*/ +/* deallocStackSpil - this will set the stack pointer back */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (deallocStackSpil) +{ + symbol *sym = item; + + deallocLocal (sym); + return 0; +} + +#if 0 +/*-----------------------------------------------------------------*/ +/* farSpacePackable - returns the packable icode for far variables */ +/*-----------------------------------------------------------------*/ +static iCode * +farSpacePackable (iCode * ic) +{ + iCode *dic; + + /* go thru till we find a definition for the + symbol on the right */ + for (dic = ic->prev; dic; dic = dic->prev) + { + /* if the definition is a call then no */ + if ((dic->op == CALL || dic->op == PCALL) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + { + return NULL; + } + + /* if shift by unknown amount then not */ + if ((dic->op == LEFT_OP || dic->op == RIGHT_OP) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + return NULL; + +#if 0 + /* if pointer get and size > 1 */ + if (POINTER_GET (dic) && + getSize (aggrToPtr (operandType (IC_LEFT (dic)), FALSE)) > 1) + return NULL; + + if (POINTER_SET (dic) && + getSize (aggrToPtr (operandType (IC_RESULT (dic)), FALSE)) > 1) + return NULL; +#endif + + /* if any three is a true symbol in far space */ + if (IC_RESULT (dic) && + IS_TRUE_SYMOP (IC_RESULT (dic)) /* && + isOperandInFarSpace (IC_RESULT (dic)) */) + return NULL; + + if (IC_RIGHT (dic) && + IS_TRUE_SYMOP (IC_RIGHT (dic)) /* && + isOperandInFarSpace (IC_RIGHT (dic)) */ && + !isOperandEqual (IC_RIGHT (dic), IC_RESULT (ic))) + return NULL; + + if (IC_LEFT (dic) && + IS_TRUE_SYMOP (IC_LEFT (dic)) /* && + isOperandInFarSpace (IC_LEFT (dic)) */ && + !isOperandEqual (IC_LEFT (dic), IC_RESULT (ic))) + return NULL; + + if (isOperandEqual (IC_RIGHT (ic), IC_RESULT (dic))) + { + if ((dic->op == LEFT_OP || + dic->op == RIGHT_OP || + dic->op == '-') && + IS_OP_LITERAL (IC_RIGHT (dic))) + return NULL; + else + return dic; + } + } + + return NULL; +} +#endif + +#if 0 +static void +packRegsForLiteral (iCode * ic) +{ + int k; + iCode *uic; + + if (ic->op != '=') + return; + if (POINTER_SET (ic)) + return; + if (!IS_LITERAL (getSpec (operandType (IC_RIGHT (ic))))) + return; + if (bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) > 1) + return; + + for (k=0; k< OP_USES (IC_RESULT (ic))->size; k++) + if (bitVectBitValue (OP_USES (IC_RESULT (ic)), k)) + { + uic = hTabItemWithKey (iCodehTab, k); + if (!uic) continue; + + if (uic->op != IFX && uic->op != JUMPTABLE) + { + if (IC_LEFT (uic) && IC_LEFT (uic)->key == IC_RESULT (ic)->key) + ReplaceOpWithCheaperOp(&IC_LEFT(uic), IC_RIGHT(ic)); + if (IC_RIGHT (uic) && IC_RIGHT (uic)->key == IC_RESULT (ic)->key) + ReplaceOpWithCheaperOp(&IC_RIGHT(uic), IC_RIGHT(ic)); + if (IC_RESULT (uic) && IC_RESULT (uic)->key == IC_RESULT (ic)->key) + ReplaceOpWithCheaperOp(&IC_RESULT(uic), IC_RIGHT(ic)); + } + } + +} +#endif + + +/*-----------------------------------------------------------------*/ +/* packRegsForAssign - register reduction for assignment */ +/*-----------------------------------------------------------------*/ +static int +packRegsForAssign (iCode * ic, eBBlock * ebp) +{ + iCode *dic, *sic; + + if (!IS_ITEMP (IC_RIGHT (ic)) || + OP_SYMBOL (IC_RIGHT (ic))->isind || + OP_LIVETO (IC_RIGHT (ic)) > ic->seq) + { + return 0; + } + + /* if the true symbol is defined in far space or on stack + then we should not since this will increase register pressure */ +#if 0 + if (isOperandInFarSpace(IC_RESULT(ic)) && !farSpacePackable(ic)) { + return 0; + } +#endif + + /* find the definition of iTempNN scanning backwards if we find a + a use of the true symbol in before we find the definition then + we cannot */ + for (dic = ic->prev; dic; dic = dic->prev) + { + +#if 0 /* jwk: This collides with 1.43 but I really see no need for + this anymore. It fixes bug #716790 and substantially improves + redundant register usage around function calls. + */ + + /* if there is a function call then don't pack it */ + if ((dic->op == CALL || dic->op == PCALL)) + { + dic = NULL; + break; + } +#endif + /* Don't move an assignment out of a critical block */ + if (dic->op == CRITICAL) + { + dic = NULL; + break; + } + + if (SKIP_IC2 (dic)) + continue; + + if (IS_TRUE_SYMOP (IC_RESULT (dic)) && + IS_OP_VOLATILE (IC_RESULT (dic))) + { + dic = NULL; + break; + } + + if (IS_SYMOP (IC_RESULT (dic)) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + { + if (POINTER_SET (dic)) + dic = NULL; + + break; + } + + if (IS_SYMOP (IC_RIGHT (dic)) && + (IC_RIGHT (dic)->key == IC_RESULT (ic)->key || + IC_RIGHT (dic)->key == IC_RIGHT (ic)->key)) + { + dic = NULL; + break; + } + + if (IS_SYMOP (IC_LEFT (dic)) && + (IC_LEFT (dic)->key == IC_RESULT (ic)->key || + IC_LEFT (dic)->key == IC_RIGHT (ic)->key)) + { + dic = NULL; + break; + } + + if (POINTER_SET (dic) && + IC_RESULT (dic)->key == IC_RESULT (ic)->key) + { + dic = NULL; + break; + } + } + + if (!dic) + return 0; /* did not find */ + + /* if assignment then check that right is not a bit */ + if (ASSIGNMENT (ic) && !POINTER_SET (ic)) + { + sym_link *etype = operandType (IC_RESULT (dic)); + if (IS_BITFIELD (etype)) + { + /* if result is a bit too then it's ok */ + etype = operandType (IC_RESULT (ic)); + if (!IS_BITFIELD (etype)) + { + return 0; + } + } + } + /* if the result is on stack or iaccess then it must be + the same atleast one of the operands */ + if (OP_SYMBOL (IC_RESULT (ic))->onStack || + OP_SYMBOL (IC_RESULT (ic))->iaccess) + { + + /* the operation has only one symbol + operator then we can pack */ + if ((IC_LEFT (dic) && !IS_SYMOP (IC_LEFT (dic))) || + (IC_RIGHT (dic) && !IS_SYMOP (IC_RIGHT (dic)))) + goto pack; + + if (!((IC_LEFT (dic) && + IC_RESULT (ic)->key == IC_LEFT (dic)->key) || + (IC_RIGHT (dic) && + IC_RESULT (ic)->key == IC_RIGHT (dic)->key))) + return 0; + } +pack: + /* found the definition */ + /* replace the result with the result of */ + /* this assignment and remove this assignment */ + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + ReplaceOpWithCheaperOp(&IC_RESULT (dic), IC_RESULT (ic)); + + if (IS_ITEMP (IC_RESULT (dic)) && OP_SYMBOL (IC_RESULT (dic))->liveFrom > dic->seq) + { + OP_SYMBOL (IC_RESULT (dic))->liveFrom = dic->seq; + } + // TODO: and the otherway around? + + /* delete from liverange table also + delete from all the points inbetween and the new + one */ + for (sic = dic; sic != ic; sic = sic->next) + { + bitVectUnSetBit (sic->rlive, IC_RESULT (ic)->key); + if (IS_ITEMP (IC_RESULT (dic))) + bitVectSetBit (sic->rlive, IC_RESULT (dic)->key); + } + + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS(IC_RESULT (dic))=bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + return 1; +} + + +/*------------------------------------------------------------------*/ +/* findAssignToSym : scanning backwards looks for first assig found */ +/*------------------------------------------------------------------*/ +static iCode * +findAssignToSym (operand * op, iCode * ic) +{ + iCode *dic; + + /* This routine is used to find sequences like + iTempAA = FOO; + ...; (intervening ops don't use iTempAA or modify FOO) + blah = blah + iTempAA; + + and eliminate the use of iTempAA, freeing up its register for + other uses. + */ + + + for (dic = ic->prev; dic; dic = dic->prev) + { + + /* if definition by assignment */ + if (dic->op == '=' && + !POINTER_SET (dic) && + IC_RESULT (dic)->key == op->key + && IS_TRUE_SYMOP(IC_RIGHT(dic)) + ) + break; /* found where this temp was defined */ + + /* if we find an usage then we cannot delete it */ + if (IC_LEFT (dic) && IC_LEFT (dic)->key == op->key) + return NULL; + + if (IC_RIGHT (dic) && IC_RIGHT (dic)->key == op->key) + return NULL; + + if (POINTER_SET (dic) && IC_RESULT (dic)->key == op->key) + return NULL; + } + + if (!dic) + return NULL; /* didn't find any assignment to op */ + + /* we are interested only if defined in far space */ + /* or in stack space in case of + & - */ + + /* if assigned to a non-symbol then don't repack regs */ + if (!IS_SYMOP (IC_RIGHT (dic))) + return NULL; + + /* if the symbol is volatile then we should not */ + if (isOperandVolatile (IC_RIGHT (dic), TRUE)) + return NULL; + /* XXX TODO --- should we be passing FALSE to isOperandVolatile()? + What does it mean for an iTemp to be volatile, anyway? Passing + TRUE is more cautious but may prevent possible optimizations */ + + /* if the symbol is in far space then we should not */ + /* if (isOperandInFarSpace (IC_RIGHT (dic))) + return NULL; */ + + /* for + & - operations make sure that + if it is on the stack it is the same + as one of the three operands */ +#if 0 + if ((ic->op == '+' || ic->op == '-') && + OP_SYMBOL (IC_RIGHT (dic))->onStack) + { + + if (IC_RESULT (ic)->key != IC_RIGHT (dic)->key && + IC_LEFT (ic)->key != IC_RIGHT (dic)->key && + IC_RIGHT (ic)->key != IC_RIGHT (dic)->key) + return NULL; + } +#endif + + /* now make sure that the right side of dic + is not defined between ic & dic */ + if (dic) + { + iCode *sic = dic->next; + + for (; sic != ic; sic = sic->next) + if (IC_RESULT (sic) && + IC_RESULT (sic)->key == IC_RIGHT (dic)->key) + return NULL; + } + + return dic; +} + +/*-----------------------------------------------------------------*/ +/* reassignAliasedSym - used by packRegsForSupport to replace */ +/* redundant iTemp with equivalent symbol */ +/*-----------------------------------------------------------------*/ +static void +reassignAliasedSym (eBBlock *ebp, iCode *assignment, iCode *use, operand *op) +{ + iCode *ic; + unsigned oldSymKey, newSymKey; + + oldSymKey = op->key; + newSymKey = IC_RIGHT(assignment)->key; + + /* only track live ranges of compiler-generated temporaries */ + if (!IS_ITEMP(IC_RIGHT(assignment))) + newSymKey = 0; + + /* update the live-value bitmaps */ + for (ic = assignment; ic != use; ic = ic->next) { + bitVectUnSetBit (ic->rlive, oldSymKey); + if (newSymKey != 0) + ic->rlive = bitVectSetBit (ic->rlive, newSymKey); + } + + /* update the sym of the used operand */ + OP_SYMBOL(op) = OP_SYMBOL(IC_RIGHT(assignment)); + op->key = OP_SYMBOL(op)->key; + + /* update the sym's liverange */ + if ( OP_LIVETO(op) < ic->seq ) + setToRange(op, ic->seq, FALSE); + + /* remove the assignment iCode now that its result is unused */ + remiCodeFromeBBlock (ebp, assignment); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(assignment))->defs, assignment->key); + hTabDeleteItem (&iCodehTab, assignment->key, assignment, DELETE_ITEM, NULL); +} + + +/*-----------------------------------------------------------------*/ +/* packRegsForSupport :- reduce some registers for support calls */ +/*-----------------------------------------------------------------*/ +static int +packRegsForSupport (iCode * ic, eBBlock * ebp) +{ + iCode *dic; + int changes = 0; + + /* for the left & right operand :- look to see if the + left was assigned a true symbol in far space in that + case replace them */ + + if (IS_ITEMP (IC_LEFT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->liveTo <= ic->seq) + { + dic = findAssignToSym (IC_LEFT (ic), ic); + + if (dic) + { + /* found it we need to remove it from the block */ + reassignAliasedSym (ebp, dic, ic, IC_LEFT(ic)); + changes++; + } + } + + /* do the same for the right operand */ + if (IS_ITEMP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->liveTo <= ic->seq) + { + iCode *dic = findAssignToSym (IC_RIGHT (ic), ic); + + if (dic) + { + /* found it we need to remove it from the block */ + reassignAliasedSym (ebp, dic, ic, IC_RIGHT(ic)); + changes++; + } + } + + return changes; +} + + +#if 0 +/*-----------------------------------------------------------------*/ +/* packRegsForOneuse : - will reduce some registers for single Use */ +/*-----------------------------------------------------------------*/ +static iCode * +packRegsForOneuse (iCode * ic, operand * op, eBBlock * ebp) +{ + bitVect *uses; + iCode *dic, *sic; + + /* if returning a literal then do nothing */ + if (!IS_SYMOP (op)) + return NULL; + + /* only up to 2 bytes */ + if (getSize (operandType (op)) > (fReturnSizeHC08 - 2)) + return NULL; + + return NULL; + + if (ic->op != SEND //RETURN + && ic->op != SEND + && !POINTER_SET (ic) + && !POINTER_GET (ic) ) + return NULL; + + if (ic->op == SEND && ic->argreg != 1) return NULL; + + /* this routine will mark the a symbol as used in one + instruction use only && if the defintion is local + (ie. within the basic block) && has only one definition && + that definiion is either a return value from a + function or does not contain any variables in + far space */ + uses = bitVectCopy (OP_USES (op)); + bitVectUnSetBit (uses, ic->key); /* take away this iCode */ + if (!bitVectIsZero (uses)) /* has other uses */ + return NULL; + + /* if it has only one defintion */ + if (bitVectnBitsOn (OP_DEFS (op)) > 1) + return NULL; /* has more than one definition */ + + /* get that definition */ + if (!(dic = + hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_DEFS (op))))) + return NULL; + + /* if that only usage is a cast */ + if (dic->op == CAST) { + /* to a bigger type */ + if (getSize(OP_SYM_TYPE(IC_RESULT(dic))) > + getSize(OP_SYM_TYPE(IC_RIGHT(dic)))) { + /* than we can not, since we cannot predict the usage of b & acc */ + return NULL; + } + } + + /* found the definition now check if it is local */ + if (dic->seq < ebp->fSeq || + dic->seq > ebp->lSeq) + return NULL; /* non-local */ + + /* now check if it is the return from + a function call */ + if (dic->op == CALL || dic->op == PCALL) + { + if (ic->op != SEND && ic->op != RETURN && + !POINTER_SET(ic) && !POINTER_GET(ic)) + { + OP_SYMBOL (op)->ruonly = 1; + return dic; + } + dic = dic->next; + } + + + /* otherwise check that the definition does + not contain any symbols in far space */ +// if (isOperandInFarSpace (IC_LEFT (dic)) || +// isOperandInFarSpace (IC_RIGHT (dic)) || +// IS_OP_RUONLY (IC_LEFT (ic)) || +// IS_OP_RUONLY (IC_RIGHT (ic))) +// { +// return NULL; +// } + + /* if pointer set then make sure the pointer + is one byte */ +#if 0 + if (POINTER_SET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_RESULT (dic)), FALSE))) + return NULL; + + if (POINTER_GET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_LEFT (dic)), FALSE))) + return NULL; +#endif + + sic = dic; + + /* also make sure the intervenening instructions + don't have any thing in far space */ + for (dic = dic->next; dic && dic != ic && sic != ic; dic = dic->next) + { + + /* if there is an intervening function call then no */ + if (dic->op == CALL || dic->op == PCALL) + return NULL; + /* if pointer set then make sure the pointer + is one byte */ +#if 0 + if (POINTER_SET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_RESULT (dic)), FALSE))) + return NULL; + + if (POINTER_GET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_LEFT (dic)), FALSE))) + return NULL; +#endif + /* if address of & the result is remat the okay */ + if (dic->op == ADDRESS_OF && + OP_SYMBOL (IC_RESULT (dic))->remat) + continue; + + /* if operand has size of three or more & this + operation is a '*','/' or '%' then 'b' may + cause a problem */ +#if 0 + if ((dic->op == '%' || dic->op == '/' || dic->op == '*') && + getSize (operandType (op)) >= 3) + return NULL; +#endif + + /* if left or right or result is in far space */ +// if (isOperandInFarSpace (IC_LEFT (dic)) || +// isOperandInFarSpace (IC_RIGHT (dic)) || +// isOperandInFarSpace (IC_RESULT (dic)) || +// IS_OP_RUONLY (IC_LEFT (dic)) || +// IS_OP_RUONLY (IC_RIGHT (dic)) || +// IS_OP_RUONLY (IC_RESULT (dic))) +// { +// return NULL; +// } +// /* if left or right or result is on stack */ +// if (isOperandOnStack(IC_LEFT(dic)) || +// isOperandOnStack(IC_RIGHT(dic)) || +// isOperandOnStack(IC_RESULT(dic))) { +// return NULL; +// } + } + + OP_SYMBOL (op)->ruonly = 1; + return sic; +} +#endif + +/*-----------------------------------------------------------------*/ +/* isBitwiseOptimizable - requirements of JEAN LOUIS VERN */ +/*-----------------------------------------------------------------*/ +static bool +isBitwiseOptimizable (iCode * ic) +{ + sym_link *ltype = getSpec (operandType (IC_LEFT (ic))); + sym_link *rtype = getSpec (operandType (IC_RIGHT (ic))); + + /* bitwise operations are considered optimizable + under the following conditions (Jean-Louis VERN) + + x & lit + bit & bit + bit & x + bit ^ bit + bit ^ x + x ^ lit + x | lit + bit | bit + bit | x + */ + if (IS_LITERAL(rtype) || + (IS_BITVAR (ltype) && IN_BITSPACE (SPEC_OCLS (ltype)))) + return TRUE; + else + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* isCommutativeOp - tests whether this op cares what order its */ +/* operands are in */ +/*-----------------------------------------------------------------*/ +bool isCommutativeOp2(unsigned int op) +{ + if (op == '+' || op == '*' || op == EQ_OP || + op == '^' || op == '|' || op == BITWISEAND) + return TRUE; + else + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* operandUsesAcc2 - determines whether the code generated for this */ +/* operand will have to use the accumulator */ +/*-----------------------------------------------------------------*/ +bool operandUsesAcc2(operand *op) +{ + if (!op) + return FALSE; + + if (IS_SYMOP(op)) { + symbol *sym = OP_SYMBOL(op); + memmap *symspace; + + if (sym->accuse) + return TRUE; /* duh! */ + +// if (IN_STACK(sym->etype) || sym->onStack || +// (SPIL_LOC(op) && SPIL_LOC(op)->onStack)) +// return TRUE; /* acc is used to calc stack offset */ + + if (IS_ITEMP(op)) + { + if (SPIL_LOC(op)) { + sym = SPIL_LOC(op); /* if spilled, look at spill location */ + } else { + return FALSE; /* more checks? */ + } + } + + symspace = SPEC_OCLS(sym->etype); + +// if (sym->iaccess && symspace->paged) +// return TRUE; /* must fetch paged indirect sym via accumulator */ + + if (IN_BITSPACE(symspace)) + return TRUE; /* fetching bit vars uses the accumulator */ + + if (IN_FARSPACE(symspace) || IN_CODESPACE(symspace)) + return TRUE; /* fetched via accumulator and dptr */ + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* canDefAccResult - return 1 if the iCode can generate a result */ +/* in A or XA */ +/*-----------------------------------------------------------------*/ +static int +canDefAccResult (iCode * ic) +{ + int size; + + if (ic->op == IFX || ic->op == JUMPTABLE) /* these iCodes have no result */ + return 0; + + if (POINTER_SET (ic)) + return 0; + + if (!IC_RESULT (ic)) + return 0; + + if (!IS_ITEMP (IC_RESULT (ic))) + return 0; + + /* I don't think an iTemp can be an aggregate, but just in case */ + if (IS_AGGREGATE(operandType(IC_RESULT(ic)))) + return 0; + + size = getSize (operandType (IC_RESULT (ic))); + + if (size == 1) + { + /* All 1 byte operations should safely generate an accumulator result */ + return 1; + } + else if (size == 2) + { + switch (ic->op) + { + case LEFT_OP: + case RIGHT_OP: + return isOperandLiteral (IC_RIGHT (ic)) + && SPEC_USIGN (operandType (IC_RESULT (ic))); + case CALL: + case PCALL: + case '*': + case RECEIVE: + case '=': /* assignment, since POINTER_SET is already ruled out */ + return 1; + + default: + return 0; + } + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* canUseAccOperand - return 1 if the iCode can use the operand */ +/* when passed in A or XA */ +/*-----------------------------------------------------------------*/ +static int +canUseAccOperand (iCode * ic, operand * op) +{ + int size; + operand * otherOp; + + if (ic->op == IFX) + { + if (isOperandEqual (op, IC_COND (ic))) + return 1; + else + return 0; + } + + if (ic->op == JUMPTABLE) + { + if (isOperandEqual (op, IC_JTCOND (ic))) + return 1; + else + return 0; + } + + if (POINTER_SET (ic) && isOperandEqual (op, IC_RESULT (ic))) + return 1; + + if (isOperandEqual (op, IC_LEFT (ic))) + otherOp = IC_RIGHT (ic); + else if (isOperandEqual (op, IC_RIGHT (ic))) + otherOp = IC_LEFT (ic); + else + return 0; + + /* Generation of SEND is deferred until CALL; not safe */ + /* if there are intermediate iCodes */ + if (ic->op == SEND && ic->next && ic->next->op != CALL) + return 0; + + size = getSize (operandType (op)); + if (size == 1) + { + /* All 1 byte operations should safely use an accumulator operand */ + return 1; + } + else if (size == 2) + { + switch (ic->op) + { + case LEFT_OP: + case RIGHT_OP: + return isOperandLiteral (IC_RIGHT (ic)); + case SEND: + return 1; + default: + return 0; + } + } + + return 0; +} + + +/*-----------------------------------------------------------------*/ +/* packRegsForAccUse - pack registers for acc use */ +/*-----------------------------------------------------------------*/ +static int +packRegsForAccUse (iCode * ic) +{ + iCode * uic; + operand * op; + + if (!canDefAccResult (ic)) + return 0; + + op = IC_RESULT (ic); + + /* has only one definition */ + if (bitVectnBitsOn (OP_DEFS (op)) > 1) + return 0; + + /* has only one use */ + if (bitVectnBitsOn (OP_USES (op)) > 1) + return 0; + + uic = ic->next; + if (!uic) + return 0; + + if (!canUseAccOperand (uic, op)) + return 0; + + #if 0 + if ((POINTER_GET(uic)) + || (ic->op == ADDRESS_OF && uic->op == '+' && IS_OP_LITERAL (IC_RIGHT (uic)))) + { + OP_SYMBOL (IC_RESULT (ic))->accuse = ACCUSE_HX; + return; + } + #endif + + OP_SYMBOL (IC_RESULT (ic))->accuse = ACCUSE_XA; + return 1; +} + +/*-----------------------------------------------------------------*/ +/* packForPush - hueristics to reduce iCode for pushing */ +/*-----------------------------------------------------------------*/ +static void +packForPush (iCode * ic, eBBlock ** ebpp, int blockno) +{ + iCode *dic, *lic; + bitVect *dbv; + struct eBBlock * ebp=ebpp[blockno]; + + if (ic->op != IPUSH || !IS_ITEMP (IC_LEFT (ic))) + return; + + /* must have only definition & one usage */ + if (bitVectnBitsOn (OP_DEFS (IC_LEFT (ic))) != 1 || + bitVectnBitsOn (OP_USES (IC_LEFT (ic))) != 1) + return; + + /* find the definition */ + if (!(dic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_DEFS (IC_LEFT (ic)))))) + return; + + if (dic->op != '=' || POINTER_SET (dic)) + return; + + if (dic->seq < ebp->fSeq) { // Evelyn did this + int i; + for (i=0; iseq >= ebpp[i]->fSeq && dic->seq <= ebpp[i]->lSeq) { + ebp=ebpp[i]; + break; + } + } + wassert (i!=blockno); // no way to recover from here + } + + if (IS_SYMOP(IC_RIGHT(dic))) { + /* make sure the right side does not have any definitions + inbetween */ + dbv = OP_DEFS(IC_RIGHT(dic)); + for (lic = ic; lic && lic != dic ; lic = lic->prev) { + if (bitVectBitValue(dbv,lic->key)) + return ; + } + /* make sure they have the same type */ + if (IS_SPEC(operandType(IC_LEFT(ic)))) + { + sym_link *itype=operandType(IC_LEFT(ic)); + sym_link *ditype=operandType(IC_RIGHT(dic)); + + if (SPEC_USIGN(itype)!=SPEC_USIGN(ditype) || + SPEC_LONG(itype)!=SPEC_LONG(ditype)) + return; + } + /* extend the live range of replaced operand if needed */ + if (OP_SYMBOL(IC_RIGHT(dic))->liveTo < ic->seq) { + OP_SYMBOL(IC_RIGHT(dic))->liveTo = ic->seq; + } + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + } + + /* we now we know that it has one & only one def & use + and the that the definition is an assignment */ + ReplaceOpWithCheaperOp(&IC_LEFT (ic), IC_RIGHT (dic)); + remiCodeFromeBBlock (ebp, dic); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); +} + +/*-----------------------------------------------------------------*/ +/* packRegisters - does some transformations to reduce register */ +/* pressure */ +/*-----------------------------------------------------------------*/ +static void +packRegisters (eBBlock ** ebpp, int blockno) +{ + iCode *ic; + int change = 0; + eBBlock *ebp=ebpp[blockno]; + + while (1) + { + + change = 0; + + /* look for assignments of the form */ + /* iTempNN = TRueSym (someoperation) SomeOperand */ + /* .... */ + /* TrueSym := iTempNN:1 */ + for (ic = ebp->sch; ic; ic = ic->next) + { + /* find assignment of the form TrueSym := iTempNN:1 */ + if (ic->op == '=' && !POINTER_SET (ic) ) + change += packRegsForAssign (ic, ebp); + } + + if (!change) + break; + } + + for (ic = ebp->sch; ic; ic = ic->next) + { + //packRegsForLiteral (ic); + + /* if this is an itemp & result of an address of a true sym + then mark this as rematerialisable */ + if (ic->op == ADDRESS_OF && + IS_ITEMP (IC_RESULT (ic)) && + IS_TRUE_SYMOP (IC_LEFT (ic)) && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1 && + !OP_SYMBOL (IC_LEFT (ic))->onStack ) + { + + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + + } +#if 1 + if (ic->op == '=' && + !POINTER_SET (ic) && + IS_ITEMP (IC_RESULT (ic)) && + IS_VALOP (IC_RIGHT (ic)) && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1) + { + + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + + } +#endif + /* if straight assignment then carry remat flag if + this is the only definition */ + if (ic->op == '=' && + !POINTER_SET (ic) && + IS_SYMOP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->remat && + !IS_CAST_ICODE(OP_SYMBOL (IC_RIGHT (ic))->rematiCode) && + bitVectnBitsOn (OP_SYMBOL (IC_RESULT (ic))->defs) <= 1) + { + + OP_SYMBOL (IC_RESULT (ic))->remat = + OP_SYMBOL (IC_RIGHT (ic))->remat; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = + OP_SYMBOL (IC_RIGHT (ic))->rematiCode; + } + + /* if cast to a generic pointer & the pointer being + cast is remat, then we can remat this cast as well */ + if (ic->op == CAST && + IS_SYMOP(IC_RIGHT(ic)) && + OP_SYMBOL(IC_RIGHT(ic))->remat && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1) { + sym_link *to_type = operandType(IC_LEFT(ic)); + sym_link *from_type = operandType(IC_RIGHT(ic)); + if (IS_GENPTR(to_type) && IS_PTR(from_type)) { + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + } + } + + /* if this is a +/- operation with a rematerizable + then mark this as rematerializable as well */ + if ((ic->op == '+' || ic->op == '-') && + (IS_SYMOP (IC_LEFT (ic)) && + IS_ITEMP (IC_RESULT (ic)) && + IS_OP_LITERAL (IC_RIGHT (ic))) && + OP_SYMBOL (IC_LEFT (ic))->remat && + (!IS_SYMOP (IC_RIGHT (ic)) || !IS_CAST_ICODE(OP_SYMBOL (IC_RIGHT (ic))->rematiCode)) && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1) + { + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + } + + /* mark the pointer usages */ + if (POINTER_SET (ic) && + IS_SYMOP(IC_RESULT (ic))) + OP_SYMBOL (IC_RESULT (ic))->uptr = 1; + + if (POINTER_GET (ic) && + IS_SYMOP(IC_LEFT (ic))) + OP_SYMBOL (IC_LEFT (ic))->uptr = 1; + + if (!SKIP_IC2 (ic)) + { +#if 0 + /* if we are using a symbol on the stack + then we should say hc08_ptrRegReq */ + if (ic->op == IFX && IS_SYMOP (IC_COND (ic))) + hc08_ptrRegReq += ((OP_SYMBOL (IC_COND (ic))->onStack || + OP_SYMBOL (IC_COND (ic))->iaccess) ? 1 : 0); + else if (ic->op == JUMPTABLE && IS_SYMOP (IC_JTCOND (ic))) + hc08_ptrRegReq += ((OP_SYMBOL (IC_JTCOND (ic))->onStack || + OP_SYMBOL (IC_JTCOND (ic))->iaccess) ? 1 : 0); + else + { + if (IS_SYMOP (IC_LEFT (ic))) + hc08_ptrRegReq += ((OP_SYMBOL (IC_LEFT (ic))->onStack || + OP_SYMBOL (IC_LEFT (ic))->iaccess) ? 1 : 0); + if (IS_SYMOP (IC_RIGHT (ic))) + hc08_ptrRegReq += ((OP_SYMBOL (IC_RIGHT (ic))->onStack || + OP_SYMBOL (IC_RIGHT (ic))->iaccess) ? 1 : 0); + if (IS_SYMOP (IC_RESULT (ic))) + hc08_ptrRegReq += ((OP_SYMBOL (IC_RESULT (ic))->onStack || + OP_SYMBOL (IC_RESULT (ic))->iaccess) ? 1 : 0); + } +#endif + } + + /* if the condition of an if instruction + is defined in the previous instruction and + this is the only usage then + mark the itemp as a conditional */ + if ((IS_CONDITIONAL (ic) || + (IS_BITWISE_OP(ic) && isBitwiseOptimizable (ic))) && + ic->next && ic->next->op == IFX && + bitVectnBitsOn (OP_USES(IC_RESULT(ic)))==1 && + isOperandEqual (IC_RESULT (ic), IC_COND (ic->next)) && + OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq) + { + OP_SYMBOL (IC_RESULT (ic))->regType = REG_CND; + continue; + } + + #if 0 + /* if the condition of an if instruction + is defined in the previous GET_POINTER instruction and + this is the only usage then + mark the itemp as accumulator use */ + if ((POINTER_GET (ic) && getSize (operandType (IC_RESULT (ic))) <=1) && + ic->next && ic->next->op == IFX && + bitVectnBitsOn (OP_USES(IC_RESULT(ic)))==1 && + isOperandEqual (IC_RESULT (ic), IC_COND (ic->next)) && + OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq) + { + OP_SYMBOL (IC_RESULT (ic))->accuse = 1; + continue; + } + + if (ic->op != IFX && ic->op !=JUMPTABLE && !POINTER_SET (ic) + && IC_RESULT (ic) && IS_ITEMP (IC_RESULT (ic)) + && getSize (operandType (IC_RESULT (ic))) == 1 + && bitVectnBitsOn (OP_USES (IC_RESULT (ic))) == 1 + && ic->next + && OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq) + { + int accuse = 0; + + if (ic->next->op == IFX) + { + if (isOperandEqual (IC_RESULT (ic), IC_COND (ic->next))) + accuse = 1; + } + else if (ic->next->op == JUMPTABLE) + { + if (isOperandEqual (IC_RESULT (ic), IC_JTCOND (ic->next))) + accuse = 1; + } + else + { + if (isOperandEqual (IC_RESULT (ic), IC_LEFT (ic->next))) + accuse = 1; + if (isOperandEqual (IC_RESULT (ic), IC_RIGHT (ic->next))) + accuse = 1; + } + + if (accuse) + { + OP_SYMBOL (IC_RESULT (ic))->accuse = 1; + continue; + } + + } + #endif + + /* reduce for support function calls */ + if (ic->supportRtn || (ic->op != IFX && ic->op != JUMPTABLE)) + packRegsForSupport (ic, ebp); + + #if 0 + /* some cases the redundant moves can + can be eliminated for return statements */ + if ((ic->op == RETURN || (ic->op == SEND && ic->argreg == 1)) && + /* !isOperandInFarSpace (IC_LEFT (ic)) && */ + options.model == MODEL_SMALL) { + packRegsForOneuse (ic, IC_LEFT (ic), ebp); + } + + /* if pointer set & left has a size more than + one and right is not in far space */ + if (POINTER_SET (ic) && + /* !isOperandInFarSpace (IC_RIGHT (ic)) && */ + !OP_SYMBOL (IC_RESULT (ic))->remat && + !IS_OP_RUONLY (IC_RIGHT (ic)) + /* && getSize (aggrToPtr (operandType (IC_RESULT (ic)), FALSE)) > 1 */ ) + packRegsForOneuse (ic, IC_RESULT (ic), ebp); + + /* if pointer get */ + if (POINTER_GET (ic) && + IS_SYMOP (IC_LEFT (ic)) && + /* !isOperandInFarSpace (IC_RESULT (ic)) && */ + !OP_SYMBOL (IC_LEFT (ic))->remat && + !IS_OP_RUONLY (IC_RESULT (ic)) + /* && getSize (aggrToPtr (operandType (IC_LEFT (ic)), FALSE)) > 1 */) + packRegsForOneuse (ic, IC_LEFT (ic), ebp); + + + /* if this is cast for intergral promotion then + check if only use of the definition of the + operand being casted/ if yes then replace + the result of that arithmetic operation with + this result and get rid of the cast */ + if (ic->op == CAST) + { + sym_link *fromType = operandType (IC_RIGHT (ic)); + sym_link *toType = operandType (IC_LEFT (ic)); + + if (IS_INTEGRAL (fromType) && IS_INTEGRAL (toType) && + getSize (fromType) != getSize (toType) && + SPEC_USIGN (fromType) == SPEC_USIGN (toType)) + { + + iCode *dic = packRegsForOneuse (ic, IC_RIGHT (ic), ebp); + if (dic) + { + if (IS_ARITHMETIC_OP (dic)) + { + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + ReplaceOpWithCheaperOp(&IC_RESULT (dic), IC_RESULT (ic)); + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS(IC_RESULT (dic))=bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + ic = ic->prev; + } + else + OP_SYMBOL (IC_RIGHT (ic))->ruonly = 0; + } + } + else + { + + /* if the type from and type to are the same + then if this is the only use then packit */ + if (compareType (operandType (IC_RIGHT (ic)), + operandType (IC_LEFT (ic))) == 1) + { + iCode *dic = packRegsForOneuse (ic, IC_RIGHT (ic), ebp); + if (dic) + { + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + ReplaceOpWithCheaperOp(&IC_RESULT (dic), IC_RESULT (ic)); + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS(IC_RESULT (dic))=bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + ic = ic->prev; + } + } + } + } + #endif + + /* pack for PUSH + iTempNN := (some variable in farspace) V1 + push iTempNN ; + ------------- + push V1 + */ + if (ic->op == IPUSH) + { + packForPush (ic, ebpp, blockno); + } + + packRegsForAccUse (ic); + } +} + +/*-----------------------------------------------------------------*/ +/* assignRegisters - assigns registers to each live range as need */ +/*-----------------------------------------------------------------*/ +void +hc08_assignRegisters (ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->bbOrder; + int count = ebbi->count; + iCode *ic; + int i; + + setToNull ((void *) &_G.funcrUsed); + setToNull ((void *) &_G.regAssigned); + setToNull ((void *) &_G.totRegAssigned); + hc08_ptrRegReq = _G.stackExtend = _G.dataExtend = 0; + hc08_nRegs = 7; + hc08_reg_a = hc08_regWithIdx(A_IDX); + hc08_reg_x = hc08_regWithIdx(X_IDX); + hc08_reg_h = hc08_regWithIdx(H_IDX); + hc08_reg_hx = hc08_regWithIdx(HX_IDX); + hc08_reg_xa = hc08_regWithIdx(XA_IDX); + hc08_reg_sp = hc08_regWithIdx(SP_IDX); + hc08_nRegs = 5; + + /* change assignments this will remove some + live ranges reducing some register pressure */ + for (i = 0; i < count; i++) + packRegisters (ebbs, i); + + /* liveranges probably changed by register packing + so we compute them again */ + recomputeLiveRanges (ebbs, count); + + if (options.dump_pack) + dumpEbbsToFileExt (DUMP_PACK, ebbi); + + /* first determine for each live range the number of + registers & the type of registers required for each */ + regTypeNum (*ebbs); + + /* and serially allocate registers */ + serialRegAssign (ebbs, count); + + freeAllRegs (); + //setToNull ((void *) &_G.regAssigned); + //setToNull ((void *) &_G.totRegAssigned); + fillGaps(); + + /* if stack was extended then tell the user */ + if (_G.stackExtend) + { +/* werror(W_TOOMANY_SPILS,"stack", */ +/* _G.stackExtend,currFunc->name,""); */ + _G.stackExtend = 0; + } + + if (_G.dataExtend) + { +/* werror(W_TOOMANY_SPILS,"data space", */ +/* _G.dataExtend,currFunc->name,""); */ + _G.dataExtend = 0; + } + + /* after that create the register mask + for each of the instruction */ + createRegMask (ebbs, count); + + /* redo that offsets for stacked automatic variables */ + if (currFunc) { + redoStackOffsets (); + } + + if (options.dump_rassgn) + { + dumpEbbsToFileExt (DUMP_RASSGN, ebbi); + dumpLiveRanges (DUMP_LRANGE, liveRanges); + } + + /* do the overlaysegment stuff SDCCmem.c */ + doOverlays (ebbs, count); + + /* now get back the chain */ + ic = iCodeLabelOptimize (iCodeFromeBBlock (ebbs, count)); + + genhc08Code (ic); + + /* free up any _G.stackSpil locations allocated */ + applyToSet (_G.stackSpil, deallocStackSpil); + _G.slocNum = 0; + setToNull ((void *) &_G.stackSpil); + setToNull ((void *) &_G.spiltSet); + /* mark all registers as free */ + freeAllRegs (); + + return; +} diff --git a/src/hc08/ralloc.h b/src/hc08/ralloc.h new file mode 100644 index 0000000..ce77cba --- /dev/null +++ b/src/hc08/ralloc.h @@ -0,0 +1,73 @@ +/*------------------------------------------------------------------------- + + SDCCralloc.h - header file register allocation + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "SDCCicode.h" +#include "SDCCBBlock.h" +#ifndef SDCCRALLOC_H +#define SDCCRALLOC_H 1 + +enum + { + A_IDX, + H_IDX, + X_IDX, + HX_IDX, + XA_IDX, + CND_IDX, + SP_IDX + }; + + +#define REG_PTR 0x01 +#define REG_GPR 0x02 +#define REG_CND 0x04 + +/* definition for the registers */ +typedef struct regs + { + short type; /* can have value + REG_GPR, REG_PTR or REG_CND */ + short rIdx; /* index into register table */ + char *name; /* name */ + short mask; /* bitmask for pair allocation */ + struct asmop *aop; /* last operand */ + int aopofs; /* last operand offset */ + unsigned isFree:1; /* is currently unassigned */ + } +regs; +extern regs regshc08[]; +extern regs *hc08_reg_a; +extern regs *hc08_reg_x; +extern regs *hc08_reg_h; +extern regs *hc08_reg_hx; +extern regs *hc08_reg_xa; +extern regs *hc08_reg_sp; + +regs *hc08_regWithIdx (int); +void hc08_useReg (regs * reg); +void hc08_freeReg (regs * reg); +void hc08_dirtyReg (regs * reg, bool freereg); +bitVect *hc08_rUmaskForOp (operand * op); + +#endif diff --git a/src/izt/Makefile b/src/izt/Makefile new file mode 100644 index 0000000..b37db76 --- /dev/null +++ b/src/izt/Makefile @@ -0,0 +1,6 @@ +srcdir = . +top_builddir = ../../ +top_srcdir = ../.. + +# Make all in this directory +include ../port.mk diff --git a/src/izt/Makefile.bcc b/src/izt/Makefile.bcc new file mode 100644 index 0000000..c1f2438 --- /dev/null +++ b/src/izt/Makefile.bcc @@ -0,0 +1,23 @@ +# Makefile for Borlad C++ + +PRJDIR = ../.. + +OBJ = i186.obj ralloc.obj gen.obj tlcs900h.obj gen_generic.obj aop.obj util.obj +LIB = port.lib + +!include $(PRJDIR)/Bcc.inc +CFLAGS = $(CFLAGS) -I.. -I$(PRJDIR) + +all: $(LIB) + +i186.obj: i186.c i186_mappings.i + +$(LIB): $(OBJ) + if exist $(LIB) del $(LIB) + tlib $@ @&&! ++$(**: = &^ ++) +! + +.def.rul: + gawk -f ../SDCCpeeph.awk $< > $@ diff --git a/src/izt/aop.c b/src/izt/aop.c new file mode 100644 index 0000000..c4f3d62 --- /dev/null +++ b/src/izt/aop.c @@ -0,0 +1,165 @@ +/** @file izt/aop.c + Assembler Operand support. +*/ +#include "izt.h" + +asmop *_new(int type) +{ + return NULL; +} + +asmop *_newForLiteral(operand *op) +{ + asmop *aop = _new(AOP_TYPE_LITERAL); + aop->u.literal = op->operand.valOperand; + aop->size = getSize(operandType(op)); + + return aop; +} + +asmop *_newForSymbol(symbol *sym, iCode *ic) +{ + memmap *space; + asmop *aop; + + wassert(ic); + wassert(sym); + wassert(sym->etype); + + space = SPEC_OCLS(sym->etype); + + if (sym->aop != NULL) { + // Already has one. + aop = sym->aop; + } + else if (sym->onStack || sym->iaccess) { + // On the stack or only available by indirect access. + aop = _new(AOP_TYPE_STACK); + aop->size = getSize(sym->type); + + aop->u.stack = sym->stack; + } + else if (IS_FUNC(sym->type)) { + // Functions are special. The symbol is constant and available. + aop = _new(AOP_TYPE_IMMEDIATE); + aop->u.immediate = Safe_strdup(sym->rname); + // PENDING: Size of a function pointer. + aop->size = 2; + } + else { + // Somewhere in 'far' space. ie only accessable through a pointer register. + aop = _new(AOP_TYPE_SCRATCH_PTR); + aop->size = getSize(sym->type); + aop->u.scratch = sym->rname; + } + + // Attach the asmop to the symbol. + sym->aop = aop; + + return aop; +} + +asmop *_newForRemat(symbol *sym) +{ + char *s = buffer; + iCode *ic = sym->rematiCode; + asmop *aop = _new(AOP_TYPE_IMMEDIATE); + + // Terminate the string first up. + *s = '\0'; + + // Combine up any offsets. + while (ic->op == '+' || ic->op == '-') { + sprintf(s, "0x%04X %c ", (int)operandLitValue(IC_RIGHT(ic)), ic->op); + s += strlen(s); + + ic = OP_SYMBOL(IC_LEFT(ic))->rematiCode; + } + + sprintf(s, "%s", OP_SYMBOL(IC_LEFT(ic))->rname); + + aop->size = getSize(sym->type); + aop->u.immediate = Safe_strdup(buffer); + + return aop; +}; + +asmop *_newForTemporary(operand *op, iCode *ic) +{ + symbol *sym = OP_SYMBOL(op); + asmop *aop = NULL; + + if (sym->regType == REG_TYPE_CND) { + // Conditionals have no size due to being stored in carry. + aop = _new(AOP_TYPE_CARRY); + aop->size = 0; + } + else if (sym->isspilt || sym->nRegs == 0) { + // No registers so it must be somewhere on the stack or remat. + if (sym->remat) { + aop = _newForRemat(sym); + } + else if (sym->accuse) { + // Packed into one of the normally unavailable registers. + wassert(0); + } + else if (sym->ruonly) { + // Only used in the return. + wassert(0); + } + else { + // Must be spilt. + aop = _newForSymbol(sym->usl.spillLoc, ic); + } + } + else { + // Must be in registers. + aop = _new(AOP_TYPE_REG); + aop->size = sym->nRegs; + aop->u.reg = sym->regs[0]; + } + // Attach to the op and symbol. + op->aop = aop; + sym->aop = aop; + + return aop; +} + +/** Bind a new AOP to the given operand. + */ +void izt_bindAop(operand *op, iCode *ic) +{ + if (op == NULL) { + // Do nothing. Just return. + } + else if (IS_OP_LITERAL(op)) { + op->aop = _newForLiteral(op); + } + else if (op->aop != NULL) { + // It already has one allocated. Use it. + // Do nothing. + } + else if (IS_SYMOP(op) && OP_SYMBOL(op)->aop != NULL) { + // The attached symbol already has an asmop. Reuse it. + op->aop = OP_SYMBOL(op)->aop; + } + else if (IS_TRUE_SYMOP(op)) { + // Its a true symbol, so bind in a symbol asmop. + op->aop = _newForSymbol(OP_SYMBOL(op), ic); + } + else { + // A temporary. Find where the temporary is stored and setup an asmop for it. + op->aop = _newForTemporary(op, ic); + } +} + +/** Creates a new asmop that wraps the return value registers. + */ +asmop *izt_getAopForReturn(int size) +{ + asmop *aop = _new(AOP_TYPE_REG); + aop->size = size; + aop->u.reg = izt_port->returnRegs[izt_util_binLog(size)]; + + return aop; +} diff --git a/src/izt/aop.h b/src/izt/aop.h new file mode 100644 index 0000000..b37e9d1 --- /dev/null +++ b/src/izt/aop.h @@ -0,0 +1,39 @@ +/** @file izt/aop.h + */ +#ifndef IZT_AOP_INCLUDE +#define IZT_AOP_INCLUDE + +typedef enum { + AOP_TYPE_REG, + AOP_TYPE_CARRY, + AOP_TYPE_LITERAL, + AOP_TYPE_STACK, + AOP_TYPE_SCRATCH_PTR, + AOP_TYPE_IMMEDIATE +} AOP_TYPE; + +typedef struct asmop { + AOP_TYPE type; + int size; + union { + value *literal; + REG *reg; + int stack; + const char *immediate; + const char *scratch; + } u; +} asmop; + +#define AOP(op) op->aop +#define AOP_TYPE(op) AOP(op)->type +#define AOP_SIZE(op) AOP(op)->size + +/** Bind a new AOP to the given operand. + */ +void izt_bindAop(operand *op, iCode *ic); + +/** Creates a new asmop that wraps the return value registers. + */ +asmop *izt_getAopForReturn(int size); + +#endif diff --git a/src/izt/gen.c b/src/izt/gen.c new file mode 100644 index 0000000..6579981 --- /dev/null +++ b/src/izt/gen.c @@ -0,0 +1,360 @@ +#include "izt.h" +#include "gen.h" + +static struct + { + struct + { + lineNode *head; + lineNode *current; + } + lines; + struct + { + hTab *base; + hTab *proc; + } + htabs; + } +_G; + +static void +_tidyUp (char *buf) +{ + // Clean up the line so that it is 'prettier'. + if (*buf == ';') + { + // If this is a comment line (starts with a ';') then indent it. + // PENDING: The outputter does its own pretty print. Disable for now. + } + else if (strchr (buf, ':')) + { + // Is a label - cant do anything. + } + else + { + /* Change the first (and probably only) ' ' to a tab so + everything lines up. + */ + while (*buf) + { + if (*buf == ' ') + { + *buf = '\t'; + return; + } + buf++; + } + } +} + +void +iemit (const char *szFormat,...) +{ + char buffer[1024]; + va_list ap; + + va_start (ap, szFormat); + + tvsprintf (buffer, sizeof(buffer), szFormat, ap); + + _tidyUp (buffer); + + if (_G.lines.current == NULL) + { + _G.lines.head = newLineNode (buffer); + _G.lines.current = _G.lines.head; + } + else + { + _G.lines.current = connectLine (_G.lines.current, newLineNode (buffer)); + } + + // PENDING: Inline support. + // _G.lines.current->isInline = inLine; +} + +// Mapping between operand type and a friendly name. +typedef struct +{ + const int op; + const char *name; +} +OPNAME; + +static OPNAME _opnames[] = +{ + {'!', "genNot"}, + {'~', "genCpl"}, + {UNARYMINUS, "genUminus"}, + {IPUSH, "genIpush"}, + {IPOP, "genIfx"}, + {CALL, "genCall"}, + {PCALL, "genPcall"}, + {FUNCTION, "genFunction"}, + {ENDFUNCTION, "genEndFunction"}, + {RETURN, "genRet"}, + {LABEL, "genLabel"}, + {GOTO, "genGoto"}, + {'+', "genPlus"}, + {'-', "genMinus"}, + {'*', "genMult"}, + {'/', "genDiv"}, + {'%', "genMod"}, + {'>', "genCmpGt"}, + {'<', "genCmpLt"}, + {EQ_OP, "genCmpEq"}, + {AND_OP, "genAndOp"}, + {OR_OP, "genOrOp"}, + {'^', "genXor"}, + {'|', "genOr"}, + {BITWISEAND, "genAnd"}, + {INLINEASM, "genInline"}, + {RRC, "genRRC"}, + {RLC, "genRLC"}, + {GETHBIT, "genHBIT"}, + {LEFT_OP, "genLeftShift"}, + {RIGHT_OP, "genRightShift"}, + {GET_VALUE_AT_ADDRESS, "genPointerGet"}, + {'=', "genAssign"}, + {IFX, "genIfx"}, + {ADDRESS_OF, "genAddrOf"}, + {JUMPTABLE, "genJumpTab"}, + {CAST, "genCast"}, + {RECEIVE, "genReceive"}, + {SEND, "addSet"}, + {0, NULL} +}; + +// Possible return codes for a find matcher. +enum + { + FIND_LESS_THAN = -1, + // This element does match. + FIND_MATCH = 0, + FIND_GREATER_THAN = 1, + // This element doesnt match. + FIND_NO_MATCH = FIND_GREATER_THAN, + // This element marks the end of list. + FIND_EOL + }; + +// Limits the given integer to the find result numbers. +static int +_limitToFind (int i) +{ + if (i < 0) + { + return FIND_LESS_THAN; + } + else if (i > 0) + { + return FIND_GREATER_THAN; + } + else + { + return FIND_MATCH; + } +} + +// Matches an opname id to the given id. +static int +_opnamesMatcher (void *pthis, void *pkey) +{ + OPNAME *name = pthis; + + if (name->name == NULL) + { + return FIND_EOL; + } + else + { + return _limitToFind (name->op - *(int *) pkey); + } +} + +// Find an element of an unordered list. +static void * +_find (void *base, size_t elemSize, void *pkey, int (*match) (void *pthis, void *pkey)) +{ + do + { + switch (match (base, pkey)) + { + case FIND_MATCH: + return base; + case FIND_EOL: + return NULL; + case FIND_LESS_THAN: + case FIND_GREATER_THAN: + base = (char *) base + elemSize; + break; + default: + wassert (0); + } + } + while (1); +} + +// Finds the friendly operation name for an op number. +static const char * +_findOpName (int op) +{ + OPNAME *name = _find (_opnames, sizeof (*_opnames), &op, _opnamesMatcher); + if (name) + { + return name->name; + } + else + { + return NULL; + } +} + +// PENDING +static bool +_isResultRemat (iCode * ic) +{ + if (SKIP_IC (ic) || ic->op == IFX) + return 0; + + if (IC_RESULT (ic) && IS_ITEMP (IC_RESULT (ic))) + { + symbol *sym = OP_SYMBOL (IC_RESULT (ic)); + if (sym->remat && !POINTER_SET (ic)) + return 1; + } + + return 0; +} + +// Print out the generated lines. +static void +_printLines (void) +{ + // Currently a holder function. The Z80 needs some special mangling + // for bank support. + printLine (_G.lines.head, codeOutBuf); +} + +void +izt_initEmitters (void) +{ + _G.htabs.base = newHashTable (100); + _G.htabs.proc = newHashTable (100); + + izt_initBaseEmitters (&_G.htabs.base); +} + +static int +_emitterCompare (const void *p1, const void *p2) +{ + wassert (p1); + wassert (p2); + return ((EMITTER *) p1)->op == ((EMITTER *) p2)->op; +} + +static bool +_tryEmittingiCode (hTab * h, iCode * ic) +{ + EMITTER key; // = {ic->op, NULL}; Borland C chokes on this; initialize below + EMITTER *found; + + key.op = ic->op; + key.emit = NULL; + + found = hTabFindByKey (h, ic->op, &key, _emitterCompare); + + if (found) + { + found->emit (ic); + return TRUE; + } + else + { + return FALSE; + } +} + +// Add a NULL terminated array of emitters into the given hash table. +void +izt_addEmittersToHTab (hTab ** into, EMITTER _base_emitters[]) +{ + while (_base_emitters->emit != NULL) + { + hTabAddItemLong (into, _base_emitters->op, _base_emitters, _base_emitters); + _base_emitters++; + } +} + +void +izt_gen (iCode * iic) +{ + iCode *ic = iic; + int cln = 0; + + _G.lines.head = NULL; + _G.lines.current = NULL; + + // No debug info support. + + for (; ic; ic = ic->next) + { + const char *name; + + // Print out the source file line number. + if (cln != ic->lineno) + { + iemit ("; %s %d", ic->filename, ic->lineno); + cln = ic->lineno; + } + + if (ic->generated) + { + // Code has already been generated. Skip. + continue; + } + if (_isResultRemat (ic)) + { + // The code is spilt and remat. - no need to generate. + continue; + } + + // Print the friendly name of the operation, if it has one. + name = _findOpName (ic->op); + if (name) + { + iemit ("; %s", name); + } + else + { + iemit ("; warning: unrecognised operation name for %u", ic->op); + } + + fflush (stdout); + // Now actually call the code generator. + // The current processor handler gets first try. + if (_tryEmittingiCode (_G.htabs.proc, ic)) + { + // Yay. + } + else if (_tryEmittingiCode (_G.htabs.base, ic)) + { + // Base handler took it. + } + else + { + // None took it. Warn the developer. + iemit ("; warning: no handler for code %u", ic->op); + } + } + + // Pass the code through the peephole optimiser. + if (!options.nopeep) + { + peepHole (&_G.lines.head); + } + + // And emit the remainder. + _printLines (); +} diff --git a/src/izt/gen.h b/src/izt/gen.h new file mode 100644 index 0000000..0e92fb6 --- /dev/null +++ b/src/izt/gen.h @@ -0,0 +1,25 @@ +// izt specific gen functions. +#ifndef IZT_GEN_INCLUDE +#define IZT_GEN_INCLUDE + +// Emit a line of code. +void iemit (const char *format,...); + +// Generic descripter for a function that can emit a type of iCode. +typedef struct + { + int op; + void (*emit) (iCode * ic); + } +EMITTER; + +// Call the base izt handler to handle this iCode. +void izt_baseEmitter (iCode * ic); +// Initialise the base emitter table. +void izt_initBaseEmitters (hTab ** into); +// Add a NULL terminated array of emitters into the given hash table. +void izt_addEmittersToHTab (hTab ** into, EMITTER _base_emitters[]); +// Initialise the emitter tables. +void izt_initEmitters (void); + +#endif diff --git a/src/izt/gen_generic.c b/src/izt/gen_generic.c new file mode 100644 index 0000000..e0618e4 --- /dev/null +++ b/src/izt/gen_generic.c @@ -0,0 +1,122 @@ +#include "izt.h" +#include "gen.h" + +static void _setupPointer(REG *reg, asmop *into, int offset) +{ + iemit("; _setupPointer for %s", reg->name); +} + +void izt_putAop(asmop *into, const char *sz, int size, int offset) +{ + wassert(offset == 0); + + switch (into->type) { + case AOP_TYPE_REG: + iemit("mov %s,%s", into->u.reg->name, sz); + break; + case AOP_TYPE_CARRY: + // Should support. + wassert(0); + break; + + case AOP_TYPE_SCRATCH_PTR: + _setupPointer(izt_port->scratch, into, offset); + iemit("mov a,%s", sz); + iemit("mov %s,a", izt_port->scratch->name); + break; + + case AOP_TYPE_STACK: + iemit("mov a,%s", sz); + iemit("mov (%s+%d),a", izt_port->base_ptr->name, into->u.stack); + break; + + case AOP_TYPE_LITERAL: + case AOP_TYPE_IMMEDIATE: + default: + wassert(0); + } +} + +char *izt_getAop(asmop *from, int size, int offset) +{ + return "blah"; +} + +/** Perform a generic move operation. + */ +static void _mov(asmop *into, asmop *from) +{ + int size = into->size; + izt_putAop(into, izt_getAop(from, size, 0), size, 0); +} + +static void _genLabel(iCode *ic) +{ + iemit("!tlabeldef", IC_LABEL(ic)->key + 100); +} + +static void _genGoto(iCode *ic) +{ + iemit("jp !tlabel", IC_LABEL(ic)->key+100); +} + +static void _genFunction(iCode *ic) +{ + symbol *sym = OP_SYMBOL(IC_LEFT(ic)); + + // Create the function header + iemit("!functionheader", sym->name); + iemit("!functionlabeldef", sym->rname); + + if (sym->stack) { + iemit("!enterx", sym->stack); + } + else + { + iemit ("!enter"); + } +} + +static void _genEndFunction(iCode *ic) +{ + // symbol *sym = OP_SYMBOL(IC_LEFT(ic)); + + /* PENDING: calleeSave */ + + iemit("!leave"); + iemit("ret"); +} + +static void +_genReturn (iCode * ic) +{ + if (IC_LEFT(ic)) { + // Has a return value. Load it up. + izt_bindAop(IC_LEFT(ic), ic); + _mov(izt_getAopForReturn(AOP_SIZE(IC_LEFT(ic))), AOP(IC_LEFT(ic))); + } + + if (ic->next && ic->next->op == LABEL && IC_LABEL (ic->next) == returnLabel) + { + // The next label is the return label. Dont bother emitting a jump. + } + else + { + iemit ("jp !tlabel", returnLabel->key + 100); + } +} + +static EMITTER _base_emitters[] = { + { LABEL, _genLabel }, + { GOTO, _genGoto }, + { FUNCTION, _genFunction }, + { RETURN, _genReturn }, + { ENDFUNCTION, _genEndFunction }, + { 0, NULL } +}; + +void +izt_initBaseEmitters (hTab ** into) +{ + izt_addEmittersToHTab (into, _base_emitters); +} diff --git a/src/izt/i186.c b/src/izt/i186.c new file mode 100644 index 0000000..da67d9e --- /dev/null +++ b/src/izt/i186.c @@ -0,0 +1,230 @@ +/** @file izt/i186.c + i186 specific general functions. +*/ +#include "izt.h" + +static REG _i186_otherRegs[] = { + { 1, REG_ID_AL, "al", 0, { REG_ID_AX, REG_ID_NONE, REG_ID_NONE } }, + { 1, REG_ID_AH, "ah", 0, { REG_ID_AX, REG_ID_NONE, REG_ID_NONE } }, + { 2, REG_ID_AX, "ax", 0, { REG_ID_AL, REG_ID_AH, REG_ID_NONE } }, + { 1, REG_ID_BL, "bl", 0, { REG_ID_BX, REG_ID_NONE, REG_ID_NONE } }, + { 1, REG_ID_BH, "bh", 0, { REG_ID_BX, REG_ID_NONE, REG_ID_NONE } }, + { 2, REG_ID_BX, "bx", 0, { REG_ID_BL, REG_ID_BH, REG_ID_NONE } }, + { 2, REG_ID_BP, "bp", 0, { REG_ID_NONE, REG_ID_NONE, REG_ID_NONE } }, + { 0, REG_ID_NONE,"??", 0, { REG_ID_NONE, REG_ID_NONE, REG_ID_NONE } } +}; + +static REG _i186_regs[] = { + { 1, REG_ID_CL, "cl", 0, { REG_ID_CX, REG_ID_NONE, REG_ID_NONE } }, + { 1, REG_ID_CH, "ch", 0, { REG_ID_CX, REG_ID_NONE, REG_ID_NONE } }, + { 1, REG_ID_DL, "dl", 0, { REG_ID_DX, REG_ID_NONE, REG_ID_NONE } }, + { 1, REG_ID_DH, "dh", 0, { REG_ID_DX, REG_ID_NONE, REG_ID_NONE } }, + { 2, REG_ID_CX, "cx", 0, { REG_ID_CL, REG_ID_CH, REG_ID_NONE } }, + { 2, REG_ID_DX, "dx", 0, { REG_ID_DL, REG_ID_DH, REG_ID_NONE } }, + { 0, REG_ID_NONE,"??", 0, { REG_ID_NONE, REG_ID_NONE, REG_ID_NONE } } +}; + +static IZT_PORT _i186_port = { + _i186_regs, + { _i186_otherRegs + 0, _i186_otherRegs + 1, _i186_otherRegs + 2 }, + _i186_otherRegs + 5, + _i186_otherRegs + 6 +}; + +static char _defaultRules[] = +{ + //#include "peeph.rul" + "" +}; + +/* list of key words used by i186 */ +static char *_i186_keywords[] = +{ + NULL +}; + +#include "i186_mappings.i" + +static void +_i186_init (void) +{ + asm_addTree(&_as86_i186_mappings); + izt_init(&_i186_port); +} + +static void +_i186_reset_regparm () +{ +} + +static int +_i186_regparm (sym_link * l) +{ + // PENDING: No register parameters. + return 0; +} + +static bool +_i186_parseOptions (int *pargc, char **argv, int *i) +{ + /* TODO: allow port-specific command line options to specify + * segment names here. + */ + return FALSE; +} + +static void +_i186_finaliseOptions (void) +{ + // No options +} + +static void +_i186_setDefaultOptions (void) +{ + // No options +} + +static const char * +_i186_getRegName (struct regs *reg) +{ + if (reg) + return reg->name; + wassert (0); + return "err"; +} + +static void +_i186_genAssemblerPreamble (FILE * of) +{ + // PENDING +} + +/* Generate interrupt vector table. */ +static int +_i186_genIVT (FILE * of, symbol ** interrupts, int maxInterrupts) +{ + // PENDING + return 0; +} + +/** $1 is always the basename. + $2 is always the output file. + $3 varies + $l is the list of extra options that should be there somewhere... + MUST be terminated with a NULL. +*/ +// PENDING +static const char *_linkCmd[] = +{ + "aslink", "-nf", "$1", NULL +}; + +// PENDING +static const char *_asmCmd[] = +{ + "gpasm", NULL, NULL, NULL +}; + +void +i186_assignRegisters (eBBlock ** ebbs, int count) +{ +} + +/* Globals */ +PORT i186_port = { + TARGET_ID_I186, + "i186", + "Intel 80186", /* Target name */ + NULL, + { + glue, + FALSE, /* Emit glue around main */ + MODEL_SMALL, + MODEL_SMALL + }, + { + _asmCmd, + NULL, + NULL, + NULL, + 0, + ".s", + NULL /* no do_assemble function */ + }, + { + _linkCmd, + NULL, + NULL, + ".o" + }, + { + _defaultRules + }, + { + /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ + 1, 2, 2, 4, 2, 2, 2, 1, 4, 4 + }, + /* tags for generic pointers */ + { 0x00, 0x40, 0x60, 0x80 }, /* far, near, xstack, code */ + + { + ".BSS", + ".BSS", + ".TEXT", + ".DATA", + ".DATA", + ".DATA", + ".DATA", + ".DATA", + ".TEXT", + ".DATA", + ".TEXT", + ".TEXT", + NULL, // xidata + NULL, // xinit + NULL, + NULL, + 1 + }, + { + +1, 1, 4, 1, 1, 0 + }, + /* i186 has an 16 bit mul */ + { + 2, 0 + }, + "_", + _i186_init, + _i186_parseOptions, + NULL, + _i186_finaliseOptions, + _i186_setDefaultOptions, + izt_assignRegisters, + _i186_getRegName , + _i186_keywords, + _i186_genAssemblerPreamble, + NULL, /* no genAssemblerEnd */ + _i186_genIVT , + NULL, // _i186_genXINIT + _i186_reset_regparm, + _i186_regparm, + NULL, + NULL, + NULL, + FALSE, + TRUE, /* little endian */ + 0, /* leave lt */ + 0, /* leave gt */ + 1, /* transform <= to ! > */ + 1, /* transform >= to ! < */ + 1, /* transform != to !(a == b) */ + 0, /* leave == */ + FALSE, /* No array initializer support. */ + 0, /* no CSE cost estimation yet */ + NULL, /* no builtin functions */ + GPOINTER, /* treat unqualified pointers as "generic" pointers */ + 1, /* reset labelKey to 1 */ + 1, /* globals & local static allowed */ + PORT_MAGIC +}; diff --git a/src/izt/i186_mappings.i b/src/izt/i186_mappings.i new file mode 100644 index 0000000..5fa73ed --- /dev/null +++ b/src/izt/i186_mappings.i @@ -0,0 +1,54 @@ +static const ASM_MAPPING _as86_mapping[] = { + { "global", ".GLOBAL %s" }, + { "labeldef", "%s:" }, + { "tlabeldef", "l%05d:" }, + { "tlabel", "l%05d" }, + { "fileprelude", "" }, + { "functionheader", + "; ---------------------------------\n" + "; Function %s\n" + "; ---------------------------------" + }, + { "functionlabeldef", "%s:" }, + { "zero", "$00" }, + { "one", "$01" }, + { "area", ".SECT %s" }, + { "areadata", ".SECT .DATA" }, + { "areacode", ".SECT .TEXT" }, + { "areahome", ".SECT .TEXT" }, + { "module", "; Module %s" }, + { "ascii", ".ASCII \"%s\"" }, + { "ds", "lcomm %d" }, + { "db", ".B" }, + { "dbs", "DB %s" }, + { "dw", "DW" }, + { "dws", "DW %s" }, + { "immed", "" }, + { "constbyte", "$%02X" }, + { "constword", "$%04X" }, + { "immedword", "$%04X" }, + { "immedbyte", "$%02X" }, + { "hashedstr", "%s" }, + { "lsbimmeds", "%s & $FF" }, + { "msbimmeds", "%s >> 8" }, + { NULL, NULL } +}; + +static const ASM_MAPPING _as86_i186_mapping[] = { + { "adjustsp", "add sp,*-%d" }, + { "enter", "enter 0,0" }, + { "enterx", "enter -%d,0" }, + { "leave", "leave" }, + { "leavex", "leave" }, + { NULL, NULL } +}; + +static const ASM_MAPPINGS _as86_mappings = { + NULL, + _as86_mapping, +}; + +static const ASM_MAPPINGS _as86_i186_mappings = { + &_as86_mappings, + _as86_i186_mapping +}; diff --git a/src/izt/izt.h b/src/izt/izt.h new file mode 100644 index 0000000..8a76f84 --- /dev/null +++ b/src/izt/izt.h @@ -0,0 +1,25 @@ +#include +#include "gen.h" +#include "regs.h" +#include "aop.h" + +#define TEST(_d, _a) \ + (_a) ? (void)0 : (failures++, printf("Test %s \"%s\" failed.\n", #_a, _d), _dumpRegs()) + +#define NUM_OF(_a) (sizeof(_a)/sizeof(*(_a))) + +typedef struct { + REG *regs; + /// One for each size {1, 2, 4} + REG *returnRegs[3]; + REG *scratch; + REG *base_ptr; +} IZT_PORT; + +IZT_PORT *izt_port; + +void izt_init(IZT_PORT *port); +void izt_assignRegisters (eBBlock **ebbs, int count); +void izt_gen(iCode *ic); +/// Return the base 2 log of i, providing i is a power of 2. +int izt_util_binLog(int i); diff --git a/src/izt/ralloc.c b/src/izt/ralloc.c new file mode 100644 index 0000000..99ce0a9 --- /dev/null +++ b/src/izt/ralloc.c @@ -0,0 +1,932 @@ +/** @file izt/ralloc.c + */ +#include "izt.h" + +/// Static data. +static struct + { + struct + { + /// Used to generate a unique name for the spill location. + int loc; + /// Set of all iTemps spilt onto the stack. + set *set; + /// Similar to stackSpill + bitVect *vect; + } + spill; + /// Bitvector of all registers used in this function. + bitVect *funcUsedRegs; + /// If a bit is set in this then the iCode at that sequence has had + /// registers allocated. + bitVect *regAssigned; + int blockSpill; + int stackExtend; + } +_G; + +static REG * +_findRegById (REG_ID id) +{ + REG *r = izt_port->regs; + + while (r->size) + { + if (r->id == id) + return r; + r++; + } + wassert (0); + return NULL; +} + +static REG * +_getSubReg (REG * r, int size, int offset) +{ + wassert (r->size >= size); + + if (r->size == size) + { + wassert (offset == 0); + return r; + } + // We use the hiding table to get the parts of the register. + else if (size == 1) + { + wassert (offset == 0 || offset == 1); + return _findRegById (r->hides[offset]); + } + else if (size == 2) + { + wassert (offset == 0); + return _findRegById (r->hides[2]); + } + // Cant. + wassert (0); + return NULL; +} + +static int +_numRegsAvailable (int size) +{ + REG *r = izt_port->regs; + int ret = 0; + + while (r->size) + { + if (r->size == size && r->used == 0) + ret++; + r++; + } + + return ret; +} + +static void +_setClearUsed (REG_ID id, int clear) +{ + REG *r = _findRegById (id); + wassert (r); + + if (!clear) + { + // The parent shouldnt be able to be allocated if this child + // is already. + wassert ((r->used & REG_USED_HIDDEN) == 0); + r->used |= REG_USED_HIDDEN; + } + else + { + wassert ((r->used & REG_USED_HIDDEN) != 0); + r->used &= ~REG_USED_HIDDEN; + } +} + +static void +_markAsUsed (REG_ID id) +{ + _setClearUsed (id, FALSE); +} + +static void +_markAsFree (REG_ID id) +{ + _setClearUsed (id, TRUE); +} + +static REG * +_allocateReg (int size) +{ + REG *r = izt_port->regs; + + while (r->size) + { + if (r->size == size && r->used == 0) + { + // Now go through the interference table and mark all other + // registers as used. + int i; + for (i = 0; i < NUM_OF (r->hides); i++) + { + if (r->hides[i] == REG_ID_NONE) + { + break; + } + _markAsUsed (r->hides[i]); + } + r->used |= REG_USED; + return r; + } + r++; + } + return NULL; +} + +static bitVect * +_markRegBits (bitVect * v, REG * r) +{ + int i; + + // Mark the primary register. + v = bitVectSetBit (v, r->id); + + // Now add all the hidden registers. + for (i = 0; i < NUM_OF (r->hides); i++) + { + if (r->hides[i] == REG_ID_NONE) + { + break; + } + v = bitVectSetBit (v, r->hides[i]); + } + + return v; +} + +static void +_freeReg (REG * r) +{ + int i; + wassert (r->used == REG_USED); + + r->used = 0; + + for (i = 0; i < NUM_OF (r->hides); i++) + { + if (r->hides[i] == REG_ID_NONE) + { + break; + } + _markAsFree (r->hides[i]); + } +} + +static void +_freeAllRegs (viod) +{ + REG *r = izt_port->regs; + + while (r->size) + { + r->used = 0; + r++; + } +} + +static void +_dumpRegs (void) +{ + REG *r = izt_port->regs; + + while (r->size) + { + printf ("%u\t%u\t%s\t%u\n", r->size, r->id, r->name, r->used); + r++; + } +} + +void +izt_init (IZT_PORT * port) +{ + wassert (port && port->regs); + izt_port = port; + izt_initEmitters (); +} + +/// Lower register pressure by packing iTemps where possible. +static void +_packRegisters (eBBlock * ebp) +{ + // PENDING: Assignment packing + // PENDING: Mark address of a true symbol as remat. + // PENDING: Propagate remat through equals. + // PENDING: Assign bitwise which is followed by a conditional into carry. + // PENDING: Pack for one use on pointer get or set. Assumes that the pointer + // is stored in the scratch register. + // PENDING: Pack short use iTemps into ACC or the scratch register. +} + +static void +_computeRequiredRegs (void) +{ + symbol *sym; + int k; + + // Iterate over each live range. + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) + { + + sym->nRegs = 0; + + // If the symbol is never used, then next. + if ((sym->liveTo - sym->liveFrom) == 0) + continue; + + // Only temporaries need registers. + if (!sym->isitmp) + continue; + + // Conditionals live in carry and dont need registers. + if (sym->regType == REG_TYPE_CND) + continue; + + +#if 0 // PENDING. Currently we dont compute ruonly or accuse. + if (sym->ruonly || sym->accuse) + { + if (IS_AGGREGATE (sym->type) || sym->isptr) + sym->type = aggrToPtr (sym->type, FALSE); + continue; + } +#endif + // We need registers. + if (IS_AGGREGATE (sym->type) || sym->isptr) + { + // Turn an aggregate into something real. + sym->type = aggrToPtr (sym->type, FALSE); + } + + sym->nRegs = getSize (sym->type); + wassert (sym->nRegs <= 4); + } +} + +static bool +_doesntNeedRegs (iCode * ic) +{ + // Some types of instructions dont need registers. + // PENDING: Flush out the types and make processor specific. + if (SKIP_IC2 (ic) || + ic->op == JUMPTABLE || + ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP || + ic->op == RETURN) + { + return TRUE; + } + return FALSE; +} + +static bool +_willCauseSpill (int size) +{ + return _numRegsAvailable (size) == 0; +} + +static void +_deassignLRs (iCode * ic, eBBlock * ebp) +{ + symbol *sym; + int ignored; + symbol *result; + + // For each symbol + for (sym = hTabFirstItem (liveRanges, &ignored); sym; sym = hTabNextItem (liveRanges, &ignored)) + { + + // Has this symbol expired yet? + if (sym->liveTo > ic->seq) + { + // No. Cant deassign. + continue; + } + + // It has expired. Free up the resources. + + // If it was spilt, then free up the stack spill location. + if (sym->isspilt) + { + if (sym->stackSpil) + { + sym->usl.spillLoc->isFree = 1; + sym->stackSpil = 0; + } + continue; + } + + // If it currently has no registers assigned, then continue. + if (bitVectBitValue (_G.regAssigned, sym->key) == 0) + { + continue; + } + + // If it has no registers assigned to it, then continue. + if (sym->nRegs == 0) + { + continue; + } + + // Mark this sym as not having registers assigned. + bitVectUnSetBit (_G.regAssigned, sym->key); + + // Free the registers. + _freeReg (sym->regs[0]); + + // If deallocating will free up enough registers for this iCode + // then steal them immediatly. + if (IC_RESULT (ic) && !_doesntNeedRegs (ic)) + { + result = OP_SYMBOL (IC_RESULT (ic)); + if (result && // Has a result + result->liveTo > ic->seq && // and lives past this instruction + result->liveTo <= ebp->lSeq && // and doesnt go past this block + result->nRegs && // and actually needs registers + !result->isspilt && // and doesnt have them yet + !result->remat && // and wouldnt waste them + !bitVectBitValue (_G.regAssigned, result->key) && // doesnt have them yet + !_willCauseSpill (result->nRegs) + ) + { + result->regs[0] = _allocateReg (result->nRegs); + } + } + } +} + +/// Returns true if the live range of the given symbol doesnt overlap +/// with any of the live ranges in the set. +static bool +_noOverlap (set * itmpStack, symbol * fsym) +{ + symbol *sym; + + for (sym = setFirstItem (itmpStack); sym; sym = setNextItem (itmpStack)) + { + if (sym->liveTo > fsym->liveFrom) + { + return FALSE; + } + } + return TRUE; +} + +/// Set operator that returns 1 if a free spill location is found. +DEFSETFUNC (_stackIsFree) +{ + symbol *sym = item; + V_ARG (symbol **, sloc); + V_ARG (symbol *, fsym); + + // Dont bother if one has already been found. + if (*sloc) + return 0; + + if (sym->isFree && // This location is free... + _noOverlap (sym->usl.itmpStack, fsym) && // and its usage doesnt overlap with the usage of this sym + getSize (sym->type) >= getSize (fsym->type) && // and the location is big enough to hold the sym + 1) + { + // All good. Take this location. + *sloc = sym; + return 1; + } + else + { + // No match. + return 0; + } +} + +/// Create a new spill location on the stack for this symbol. +symbol * +_createStackSpill (symbol * sym) +{ + symbol *sloc = NULL; + + // Try to reuse an exisiting spill location. + if (applyToSet (_G.spill.set, _stackIsFree, &sloc, sym)) + { + // Found one. Take it over. + sym->usl.spillLoc = sloc; + sym->stackSpil = TRUE; + sloc->isFree = 0; + addSetHead (&sloc->usl.itmpStack, sym); + return sym; + } + + // No existing location. Time to create one. + // Give it a pretty name. + sprintf (buffer, "sloc%d", ++_G.spill.loc); + // And create. + sloc = newiTemp (buffer); + + // Setup the type. + sloc->type = copyLinkChain (sym->type); + sloc->etype = getSpec (sloc->type); + SPEC_SCLS (sloc->etype) = S_AUTO; + + allocLocal (sloc); + + // "To prevent compiler warning" + sloc->isref = 1; + + // Increase the local variable stack size on this function. + if (IN_STACK (sloc->etype)) + { + currFunc->stack += getSize (sloc->type); + _G.stackExtend += getSize (sloc->type); + } + else + { + // The IZT port currently doesnt support loading locals into data space. + wassert (0); + } + + // And add it to the spill set. + addSetHead (&_G.spill.set, sloc); + sym->usl.spillLoc = sloc; + sym->stackSpil = TRUE; + + // "Add it to the set of itempStack set of the spill location + addSetHead (&sloc->usl.itmpStack, sym); + + return sym; +} + +static void +_spillThis (symbol * sym) +{ + // Create a spill location if it needs one and doesnt have one yet. + if (!(sym->remat || sym->usl.spillLoc)) + { + _createStackSpill (sym); + } + + sym->isspilt = TRUE; + // Add it to the spilt set. + _G.spill.vect = bitVectSetBit (_G.spill.vect, sym->key); + // and remove it from the 'has registers' set. + bitVectUnSetBit (_G.regAssigned, sym->key); + + // Free up any registers that were assigned to this. + if (sym->regs[0]) + { + _freeReg (sym->regs[0]); + sym->regs[0] = NULL; + } + + // CHECK: If this sym now has a spill location, mark it as allocated + // so that the stack packing later doesnt remove it. + if (sym->usl.spillLoc && !sym->remat) + { + sym->usl.spillLoc->allocreq = TRUE; + } + + return; +} + +static bitVect * +_findSpillable (iCode * ic) +{ + bitVect *spillable; + + // First create a copy of the currently live ranges. + spillable = bitVectCopy (ic->rlive); + // Remove those which are already spilt. + spillable = bitVectCplAnd (spillable, _G.spill.vect); + // Remove those that this iCode uses. + spillable = bitVectCplAnd (spillable, ic->uses); + // Remove those that this iCode defines. + bitVectUnSetBit (spillable, ic->defKey); + + // Only those that have registers assigned can actually be spilt :) + spillable = bitVectIntersect (spillable, _G.regAssigned); + + return spillable; +} + +/// Finds the least used live range +static symbol * +_leastUsedLR (set * sset) +{ + // sym is the currently least used symbol. + symbol *sym; + // walk walks the list of symbols in the scan set. + symbol *walk; + + // Use the first as the seed. + sym = walk = setFirstItem (sset); + + while (walk) + { + // Prefer spilling the symbol with the least allocated registers. + // PENDING: Why? + if (walk->used == sym->used) + { + if (getSize (walk->type) < getSize (sym->type)) + { + sym = walk; + } + } + else if (walk->used < sym->used) + { + // This is used less than the current best. It looses. + sym = walk; + } + + walk = setNextItem (sset); + } + + setToNull ((void *) &sset); + sym->blockSpil = 0; + + return sym; +} + +/// Applies a function to a given set of live ranges. +static set * +_liveRangesWith (bitVect * lrs, int (func) (symbol *, eBBlock *, iCode *), + eBBlock * ebp, iCode * ic) +{ + set *rset = NULL; + int i; + + // Dont do anything if the bitVect is empty. + if (!lrs || !lrs->size) + return NULL; + + for (i = 1; i < lrs->size; i++) + { + symbol *sym; + + // If this bit isnt turned on, skip. + if (!bitVectBitValue (lrs, i)) + continue; + + // If we don't find it in the live range hash table we are in serious trouble. + if (!(sym = hTabItemWithKey (liveRanges, i))) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "liveRangesWith could not find liveRange"); + exit (1); + } + + // If the function likes it, and it has registers assigned to + // it, add it to the return set. + if (func (sym, ebp, ic) && bitVectBitValue (_G.regAssigned, sym->key)) + { + addSetHead (&rset, sym); + } + } + + return rset; +} + +/// Returns TRUE always. Used to fetch all live ranges. +static int +_allLRs (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return 1; +} + +static void +_serialRegAssign (eBBlock ** ebbs, int count) +{ + int i; + + // For each block, do... + for (i = 0; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + { + // PENDING: Dont understand. + continue; + } + + + // For each iCode in this block, do... + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + symbol *sym; + bitVect *spillable; + int willCauseSpill; + + // Dont support IPOP + wassert (ic->op != IPOP); + + // if result is present && is a true symbol + if (IC_RESULT (ic) && ic->op != IFX && + IS_TRUE_SYMOP (IC_RESULT (ic))) + OP_SYMBOL (IC_RESULT (ic))->allocreq = 1; + + // Take away registers from live ranges that end at this + // instruction. + _deassignLRs (ic, ebbs[i]); + + // Some instructions dont need registers. + if (_doesntNeedRegs (ic)) + { + continue; + } + + // If there is no result, then it doesnt need registers. + if (!IC_RESULT (ic)) + { + continue; + } + + sym = OP_SYMBOL (IC_RESULT (ic)); + + // Does it need any registers? + if (sym->nRegs == 0) + { + continue; + } + + // Is it already split? + if (sym->isspilt) + { + continue; + } + + // Does it already have registers assigned? + if (bitVectBitValue (_G.regAssigned, sym->key)) + { + continue; + } + + // Will it live past this instruction? + if (sym->liveTo <= ic->seq) + { + continue; + } + + // MLH Doesnt understand this. + /* "Iif some liverange has been spilt at the block level + and this one live beyond this block then spil this + to be safe" */ + if (_G.blockSpill && sym->liveTo > ebbs[i]->lSeq) + { + _spillThis (sym); + continue; + } + + // Seems that this symbol needs registers. See if + // allocating will cause a spill. + willCauseSpill = _willCauseSpill (sym->nRegs); + spillable = _findSpillable (ic); + + // If this is remat., then dont waste any regsiters on it. + if (sym->remat) + { + _spillThis (sym); + continue; + } + + // If trying to allocate will cause a spill, and nothing + // else is spillable then this sym looses. + if (willCauseSpill && bitVectIsZero (spillable)) + { + _spillThis (sym); + continue; + } + + // If this will cause a spill, and it already has a spill + // location then spill this if it is the least used. + if (willCauseSpill && sym->usl.spillLoc) + { + symbol *leastUsed = _leastUsedLR (_liveRangesWith (spillable, _allLRs, ebbs[i], ic)); + if (leastUsed && leastUsed->used > sym->used) + { + _spillThis (sym); + continue; + } + } + + // Hmm. Here we could have no registers available but + // we'll still try to allocate. MLH wonders how this will + // work. + + // Mark this iCode as having registers assigned to it. + _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); + + // And do it. + sym->regs[0] = _allocateReg (sym->nRegs); + } + } +} + +static +DEFSETFUNC (_deallocStackSpil) +{ + symbol *sym = item; + + deallocLocal (sym); + return 0; +} + +/// Compute the register mask for an operand. +bitVect * +_rUmaskForOp (operand * op) +{ + bitVect *rumask; + symbol *sym; + + // "Only temporaries are assigned registers" + if (!IS_ITEMP (op)) + return NULL; + + sym = OP_SYMBOL (op); + + // If its spilt or no registers are needed, then no regs are assigned. + if (sym->isspilt || !sym->nRegs) + return NULL; + + rumask = newBitVect (REG_ID_MAX); + + if (sym->regs[0]) + { + rumask = _markRegBits (rumask, sym->regs[0]); + } + + return rumask; +} + +/// Returns bit vector of registers used in iCode. +bitVect * +_regsUsedIniCode (iCode * ic) +{ + bitVect *rmask = newBitVect (REG_ID_MAX); + + do + { + // Special cases first. + if (ic->op == IFX) + { + rmask = bitVectUnion (rmask, _rUmaskForOp (IC_COND (ic))); + break; + } + + if (ic->op == JUMPTABLE) + { + rmask = bitVectUnion (rmask, _rUmaskForOp (IC_JTCOND (ic))); + break; + } + + // Now the good old left, right, and result. + if (IC_LEFT (ic)) + { + rmask = bitVectUnion (rmask, _rUmaskForOp (IC_LEFT (ic))); + } + + if (IC_RIGHT (ic)) + { + rmask = bitVectUnion (rmask, _rUmaskForOp (IC_RIGHT (ic))); + } + + if (IC_RESULT (ic)) + { + rmask = bitVectUnion (rmask, _rUmaskForOp (IC_RESULT (ic))); + } + } + while (0); + + return rmask; +} + +/// Compute the helper bitVect that contains the register used mask. +static void +_createRegMask (eBBlock ** ebbs, int count) +{ + int i; + + /* for all blocks */ + for (i = 0; i < count; i++) + { + iCode *ic; + + // If this code is unused, skip it. + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + { + continue; + } + + /* for all instructions */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + int j; + + if (SKIP_IC2 (ic) || !ic->rlive) + continue; + + // Mark the registers used in this instruction. + ic->rUsed = _regsUsedIniCode (ic); + // Mark them as used at least once in the function. + _G.funcUsedRegs = bitVectUnion (_G.funcUsedRegs, ic->rUsed); + + /* now create the register mask for those + registers that are in use : this is a + super set of ic->rUsed */ + ic->rMask = newBitVect (REG_ID_MAX + 1); + + // "For all live Ranges alive at this point" + for (j = 1; j < ic->rlive->size; j++) + { + symbol *sym; + + // "If if not alive then continue" + if (!bitVectBitValue (ic->rlive, j)) + { + continue; + } + + // "Find the live range we are interested in" + if (!(sym = hTabItemWithKey (liveRanges, j))) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "createRegMask cannot find live range"); + exit (0); + } + + // "If no register assigned to it" + if (!sym->nRegs || sym->isspilt) + { + continue; + } + + // If this has any registers allocated, mark them as such. + if (sym->regs[0]) + { + ic->rMask = _markRegBits (ic->rMask, sym->regs[0]); + } + } + } + } +} + +void +izt_assignRegisters (eBBlock ** ebbs, int count) +{ + // Contains a flat version of ebbs used in code generation. + iCode *chain; + + // Clear the bit vector of registers used in this function. + // Assumes that assignRegisters is called once per function. + setToNull ((void *) &_G.funcUsedRegs); + + // First scan each live range, and figure out what registers + // are required. + _computeRequiredRegs (); + + // Now allocate the registers. + _serialRegAssign (ebbs, count); + + // And create the helper register used mask. + _createRegMask (ebbs, count); + + // Turn the bblock array into an optimised list of iCode entries. + chain = iCodeLabelOptimize (iCodeFromeBBlock (ebbs, count)); + + // Redo the stack offsets. This will remove any redundent stack + // locations ie iTemps that exist only in registers. + redoStackOffsets (); + + izt_gen (chain); + + // Deallocate any stack spill locations. + applyToSet (_G.spill.set, _deallocStackSpil); + + _G.spill.loc = 0; + setToNull ((void *) &_G.spill.set); + setToNull ((void *) &_G.spill.vect); + + // And free all registers. + _freeAllRegs (); +} + +void +warningStopper (void) +{ + // For now references all unused functions. + _dumpRegs (); + _packRegisters (NULL); + _getSubReg (NULL, 0, 0); +} diff --git a/src/izt/regs.h b/src/izt/regs.h new file mode 100644 index 0000000..6e1501a --- /dev/null +++ b/src/izt/regs.h @@ -0,0 +1,60 @@ +#ifndef REGS_INCLUDE +#define REGS_INCLUDE + +typedef enum { + REG_ID_NONE, + // Z80 + REG_ID_A, + REG_ID_B, + REG_ID_C, + REG_ID_D, + REG_ID_E, + REG_ID_H, + REG_ID_L, + REG_ID_AF, + REG_ID_BC, + REG_ID_DE, + REG_ID_HL, + REG_ID_IX, + REG_ID_IY, + // TLCS-900H + REG_ID_XBC, + REG_ID_XDE, + // i186 + REG_ID_AL, + REG_ID_AH, + REG_ID_AX, + REG_ID_BL, + REG_ID_BH, + REG_ID_BX, + + REG_ID_BP, + + REG_ID_CL, + REG_ID_CH, + REG_ID_CX, + REG_ID_DL, + REG_ID_DH, + REG_ID_DX, + REG_ID_MAX +} REG_ID; + +enum { + REG_USED = 1, + REG_USED_HIDDEN = 2 +}; + +enum { + REG_TYPE_CND = 1, + REG_TYPE_GPR = 2 +} REG_TYPE; + +typedef struct regs { + int size; + REG_ID id; + const char *name; + int used; + REG_ID hides[3]; +} REG; + +#endif diff --git a/src/izt/tlcs900h.c b/src/izt/tlcs900h.c new file mode 100644 index 0000000..f3b42af --- /dev/null +++ b/src/izt/tlcs900h.c @@ -0,0 +1,227 @@ +/** @file izt/tlcs900h.c + tlcs900h specific general functions. +*/ +#include "izt.h" + +static REG _tlcs900h_regs[] = +{ + {1, REG_ID_C, "c", 0, + {REG_ID_BC, REG_ID_NONE, REG_ID_NONE}}, + {1, REG_ID_B, "b", 0, + {REG_ID_BC, REG_ID_NONE, REG_ID_NONE}}, + {1, REG_ID_E, "e", 0, + {REG_ID_DE, REG_ID_NONE, REG_ID_NONE}}, + {1, REG_ID_D, "d", 0, + {REG_ID_DE, REG_ID_NONE, REG_ID_NONE}}, + {2, REG_ID_BC, "bc", 0, + {REG_ID_C, REG_ID_B, REG_ID_NONE}}, + {2, REG_ID_DE, "de", 0, + {REG_ID_E, REG_ID_D, REG_ID_NONE}}, + {4, REG_ID_XBC, "xbc", 0, + {REG_ID_C, REG_ID_B, REG_ID_BC}}, + {4, REG_ID_XDE, "xde", 0, + {REG_ID_E, REG_ID_D, REG_ID_DE}}, + {0, REG_ID_NONE, "??", 0, + {REG_ID_NONE, REG_ID_NONE, REG_ID_NONE}} +}; + +static IZT_PORT _tlcs900h_port = +{ + _tlcs900h_regs +}; + +static char _defaultRules[] = +{ + //#include "peeph.rul" + "" +}; + +static char *_tlcs900h_keywords[] = +{ + NULL +}; + +void tlcs900h_assignRegisters (eBBlock ** ebbs, int count); + +static void +_tlcs900h_init (void) +{ + asm_addTree (&asm_asxxxx_mapping); + izt_init (&_tlcs900h_port); +} + +static void +_tlcs900h_reset_regparm () +{ +} + +static int +_tlcs900h_regparm (sym_link * l) +{ + // PENDING: No register parameters. + return 0; +} + +static bool +_tlcs900h_parseOptions (int *pargc, char **argv, int *i) +{ + /* TODO: allow port-specific command line options to specify + * segment names here. + */ + return FALSE; +} + +static void +_tlcs900h_finaliseOptions (void) +{ + // No options +} + +static void +_tlcs900h_setDefaultOptions (void) +{ + // No options +} + +static const char * +_tlcs900h_getRegName (struct regs *reg) +{ + if (reg) + return reg->name; + wassert (0); + return "err"; +} + +static void +_tlcs900h_genAssemblerPreamble (FILE * of) +{ + // PENDING +} + +/* Generate interrupt vector table. */ +static int +_tlcs900h_genIVT (FILE * of, symbol ** interrupts, int maxInterrupts) +{ + // PENDING + return 0; +} + +/** $1 is always the basename. + $2 is always the output file. + $3 varies + $l is the list of extra options that should be there somewhere... + MUST be terminated with a NULL. +*/ +// PENDING +static const char *_linkCmd[] = +{ + "aslink", "-nf", "$1", NULL +}; + +// PENDING +static const char *_asmCmd[] = +{ + "gpasm", NULL, NULL, NULL +}; + +void +tlcs900h_assignRegisters (eBBlock ** ebbs, int count) +{ +} + +/* Globals */ +PORT tlcs900h_port = +{ + TARGET_ID_TLCS900H, + "tlcs900h", + "Toshiba TLCS-900H", /* Target name */ + NULL, + { + glue, + TRUE, /* Emit glue around main */ + MODEL_SMALL, + MODEL_SMALL + }, + { + _asmCmd, + NULL, + NULL, + NULL, + 0, + NULL, + NULL /* no do_assemble function */ + }, + { + _linkCmd, + NULL, + NULL, + ".o" + }, + { + _defaultRules + }, + { + /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ + 1, 2, 2, 4, 2, 2, 2, 1, 4, 4 + }, + /* tags for generic pointers */ + { 0x00, 0x40, 0x60, 0x80 }, /* far, near, xstack, code */ + { + "XSEG (XDATA)", + "STACK (DATA)", + "CSEG (CODE)", + "DSEG (DATA)", + "ISEG (DATA)", + "XSEG (XDATA)", + "BSEG (BIT)", + "RSEG (DATA)", + "GSINIT (CODE)", + "OSEG (OVR,DATA)", + "GSFINAL (CODE)", + "HOME (CODE)", + NULL, // xidata + NULL, // xinit + NULL, + NULL, + 1 + }, + { + +1, 1, 4, 1, 1, 0 + }, + /* tlcs900h has an 16 bit mul */ + { + 2, -1 + }, + "_", + _tlcs900h_init, + _tlcs900h_parseOptions, + NULL, + _tlcs900h_finaliseOptions, + _tlcs900h_setDefaultOptions, + tlcs900h_assignRegisters, + _tlcs900h_getRegName, + _tlcs900h_keywords, + _tlcs900h_genAssemblerPreamble, + NULL, /* no genAssemblerEnd */ + _tlcs900h_genIVT, + 0, // _tlcs900h_genXINIT + _tlcs900h_reset_regparm, + _tlcs900h_regparm, + NULL, + NULL, + NULL, + FALSE, + 0, /* leave lt */ + 0, /* leave gt */ + 1, /* transform <= to ! > */ + 1, /* transform >= to ! < */ + 1, /* transform != to !(a == b) */ + 0, /* leave == */ + FALSE, /* No array initializer support. */ + 0, /* no CSE cost estimation yet */ + NULL, /* no builtin functions */ + GPOINTER, /* treat unqualified pointers as "generic" pointers */ + 1, /* reset labelKey to 1 */ + 1, /* globals & local static allowed */ + PORT_MAGIC +}; diff --git a/src/izt/util.c b/src/izt/util.c new file mode 100644 index 0000000..7481bed --- /dev/null +++ b/src/izt/util.c @@ -0,0 +1,25 @@ +/** @file izt/util.c + */ +#include "izt.h" + +int izt_util_binLog(int i) +{ + static const int lookup[] = { + 0, 0, 1, -1, 2, -1, -1, -1, 3 + }; + + if (i < NUM_OF(lookup)) { + if (lookup[i] != -1) { + return lookup[i]; + } + else { + // Unsupported. + wassert(0); + } + } + else { + // Unsupported. + wassert(0); + } + return 0; +} diff --git a/src/mcs51/Makefile.bcc b/src/mcs51/Makefile.bcc new file mode 100644 index 0000000..f6ce704 --- /dev/null +++ b/src/mcs51/Makefile.bcc @@ -0,0 +1,23 @@ +# Makefile for Borland C++ + +PRJDIR = ../.. + +OBJ = gen.obj ralloc.obj main.obj rtrack.obj +LIB = port.lib + +!include $(PRJDIR)/Bcc.inc +CFLAGS = $(CFLAGS) -I.. -I$(PRJDIR) + +all: $(LIB) + +main.obj: main.c peeph.rul + +$(LIB): $(OBJ) + if exist $(LIB) del $(LIB) + tlib $@ @&&! ++$(**: = &^ ++) +! + +.def.rul: + gawk -f ../SDCCpeeph.awk $< > $@ diff --git a/src/mcs51/Makefile.in b/src/mcs51/Makefile.in new file mode 100644 index 0000000..dfb8a52 --- /dev/null +++ b/src/mcs51/Makefile.in @@ -0,0 +1,7 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +# Make all in this directory +include $(srcdir)/../port.mk diff --git a/src/mcs51/gen.c b/src/mcs51/gen.c new file mode 100644 index 0000000..9375087 --- /dev/null +++ b/src/mcs51/gen.c @@ -0,0 +1,12239 @@ +/*------------------------------------------------------------------------- + gen.c - source file for code generation for 8051 + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + and - Jean-Louis VERN.jlvern@writeme.com (1999) + Bug Fixes - Wojciech Stryjewski wstryj1@tiger.lsu.edu (1999 v2.1.9a) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + Notes: + 000123 mlh Moved aopLiteral to SDCCglue.c to help the split + Made everything static +-------------------------------------------------------------------------*/ + +#define D(x) do if (options.verboseAsm) {x;} while(0) + +#include +#include +#include +#include +#include "SDCCglobl.h" +#include "newalloc.h" + +#include "common.h" +#include "SDCCpeeph.h" +#include "ralloc.h" +#include "rtrack.h" +#include "gen.h" +#include "dbuf_string.h" + +char *aopLiteral (value * val, int offset); +char *aopLiteralLong (value * val, int offset, int size); +extern int allocInfo; + +/* this is the down and dirty file with all kinds of + kludgy & hacky stuff. This is what it is all about + CODE GENERATION for a specific MCU . some of the + routines may be reusable, will have to see */ + +static char *zero = "#0x00"; +static char *one = "#0x01"; +static char *spname; + +char *fReturn8051[] = +{"dpl", "dph", "b", "a"}; +unsigned fReturnSizeMCS51 = 4; /* shared with ralloc.c */ +char **fReturn = fReturn8051; +static char *accUse[] = +{"a", "b"}; + +static unsigned short rbank = -1; + +#define REG_WITH_INDEX mcs51_regWithIdx + +#define AOP(op) op->aop +#define AOP_TYPE(op) AOP(op)->type +#define AOP_SIZE(op) AOP(op)->size +#define IS_AOP_PREG(x) (AOP(x) && (AOP_TYPE(x) == AOP_R1 || \ + AOP_TYPE(x) == AOP_R0)) + +#define AOP_NEEDSACC(x) (AOP(x) && (AOP_TYPE(x) == AOP_CRY || \ + AOP_TYPE(x) == AOP_DPTR || \ + AOP(x)->paged)) + +#define AOP_INPREG(x) (x && (x->type == AOP_REG && \ + (x->aopu.aop_reg[0] == REG_WITH_INDEX(R0_IDX) || \ + x->aopu.aop_reg[0] == REG_WITH_INDEX(R1_IDX) ))) + +#define SYM_BP(sym) (SPEC_OCLS (sym->etype)->paged ? "_bpx" : "_bp") + +#define R0INB _G.bu.bs.r0InB +#define R1INB _G.bu.bs.r1InB +#define OPINB _G.bu.bs.OpInB +#define BINUSE _G.bu.BInUse + +static struct + { + short r0Pushed; + short r1Pushed; + union + { + struct + { + short r0InB : 2;//2 so we can see it overflow + short r1InB : 2;//2 so we can see it overflow + short OpInB : 2;//2 so we can see it overflow + } bs; + short BInUse; + } bu; + short accInUse; + short inLine; + short debugLine; + short nRegsSaved; + set *sendSet; + iCode *current_iCode; + symbol *currentFunc; + } +_G; + +static char *rb1regs[] = { + "b1_0","b1_1","b1_2","b1_3","b1_4","b1_5","b1_6","b1_7", + "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7" +}; + +extern struct dbuf_s *codeOutBuf; + +#define RESULTONSTACK(x) \ + (IC_RESULT(x) && IC_RESULT(x)->aop && \ + IC_RESULT(x)->aop->type == AOP_STK ) + +#define MOVA(x) mova(x) /* use function to avoid multiple eval */ +#define MOVB(x) movb(x) + +#define CLRC emitcode("clr","c") +#define SETC emitcode("setb","c") + +static lineNode *lineHead = NULL; +static lineNode *lineCurr = NULL; + +static unsigned char SLMask[] = +{0xFF, 0xFE, 0xFC, 0xF8, 0xF0, + 0xE0, 0xC0, 0x80, 0x00}; +static unsigned char SRMask[] = +{0xFF, 0x7F, 0x3F, 0x1F, 0x0F, + 0x07, 0x03, 0x01, 0x00}; + +#define LSB 0 +#define MSB16 1 +#define MSB24 2 +#define MSB32 3 + +/*-----------------------------------------------------------------*/ +/* emitcode - writes the code into a file : for now it is simple */ +/*-----------------------------------------------------------------*/ +void +emitcode (const char *inst, const char *fmt,...) +{ + va_list ap; + struct dbuf_s dbuf; + const char *lbp, *lb; + + dbuf_init (&dbuf, INITIAL_INLINEASM); + + va_start (ap, fmt); + + if (inst && *inst) + { + dbuf_append_str (&dbuf, inst); + + if (fmt && *fmt) + { + dbuf_append_char (&dbuf, '\t'); + dbuf_tvprintf (&dbuf, fmt, ap); + } + } + else + { + dbuf_tvprintf (&dbuf, fmt, ap); + } + + lbp = lb = dbuf_c_str(&dbuf); + + while (isspace ((unsigned char)*lbp)) + { + lbp++; + } + + if (lbp) + { + rtrackUpdate (lbp); + + lineCurr = (lineCurr ? + connectLine (lineCurr, newLineNode (lb)) : + (lineHead = newLineNode (lb))); + + lineCurr->isInline = _G.inLine; + lineCurr->isDebug = _G.debugLine; + lineCurr->ic = _G.current_iCode; + lineCurr->isComment = (*lbp==';'); + } + + va_end (ap); + + dbuf_destroy(&dbuf); +} + +static void +emitLabel (symbol *tlbl) +{ + emitcode ("", "%05d$:", tlbl->key + 100); + lineCurr->isLabel = 1; +} + +/*-----------------------------------------------------------------*/ +/* mcs51_emitDebuggerSymbol - associate the current code location */ +/* with a debugger symbol */ +/*-----------------------------------------------------------------*/ +void +mcs51_emitDebuggerSymbol (char * debugSym) +{ + _G.debugLine = 1; + emitcode ("", "%s ==.", debugSym); + _G.debugLine = 0; +} + +/*-----------------------------------------------------------------*/ +/* mova - moves specified value into accumulator */ +/*-----------------------------------------------------------------*/ +static void +mova (const char *x) +{ + /* do some early peephole optimization */ + if (!strncmp(x, "a", 2) || !strncmp(x, "acc", 4)) + return; + + /* if it is a literal mov try to get it cheaper */ + if (*x == '#' && + rtrackMoveALit(x)) + return; + + emitcode("mov", "a,%s", x); +} + +/*-----------------------------------------------------------------*/ +/* movb - moves specified value into register b */ +/*-----------------------------------------------------------------*/ +static void +movb (const char *x) +{ + /* do some early peephole optimization */ + if (!strncmp(x, "b", 2)) + return; + + /* if it is a literal mov try to get it cheaper */ + if (*x == '#') + { + emitcode("mov","b,%s", rtrackGetLit(x)); + return; + } + + emitcode("mov","b,%s", x); +} + +/*-----------------------------------------------------------------*/ +/* pushB - saves register B if necessary */ +/*-----------------------------------------------------------------*/ +static bool +pushB (void) +{ + bool pushedB = FALSE; + + if (BINUSE) + { + emitcode ("push", "b"); +// printf("B was in use !\n"); + pushedB = TRUE; + } + else + { + OPINB++; + } + return pushedB; +} + +/*-----------------------------------------------------------------*/ +/* popB - restores value of register B if necessary */ +/*-----------------------------------------------------------------*/ +static void +popB (bool pushedB) +{ + if (pushedB) + { + emitcode ("pop", "b"); + } + else + { + OPINB--; + } +} + +/*-----------------------------------------------------------------*/ +/* pushReg - saves register */ +/*-----------------------------------------------------------------*/ +static bool +pushReg (int index, bool bits_pushed) +{ + regs * reg = REG_WITH_INDEX (index); + if (reg->type == REG_BIT) + { + if (!bits_pushed) + emitcode ("push", "%s", reg->base); + return TRUE; + } + else + emitcode ("push", "%s", reg->dname); + return bits_pushed; +} + +/*-----------------------------------------------------------------*/ +/* popReg - restores register */ +/*-----------------------------------------------------------------*/ +static bool +popReg (int index, bool bits_popped) +{ + regs * reg = REG_WITH_INDEX (index); + if (reg->type == REG_BIT) + { + if (!bits_popped) + emitcode ("pop", "%s", reg->base); + return TRUE; + } + else + emitcode ("pop", "%s", reg->dname); + return bits_popped; +} + +/*-----------------------------------------------------------------*/ +/* getFreePtr - returns r0 or r1 whichever is free or can be pushed */ +/*-----------------------------------------------------------------*/ +static regs * +getFreePtr (iCode * ic, asmop ** aopp, bool result) +{ + bool r0iu, r1iu; + bool r0ou, r1ou; + + /* the logic: if r0 & r1 used in the instruction + then we are in trouble otherwise */ + + /* first check if r0 & r1 are used by this + instruction, in which case we are in trouble */ + r0iu = bitVectBitValue (ic->rUsed, R0_IDX); + r1iu = bitVectBitValue (ic->rUsed, R1_IDX); + if (r0iu && r1iu) { + goto endOfWorld; + } + + r0ou = bitVectBitValue (ic->rMask, R0_IDX); + r1ou = bitVectBitValue (ic->rMask, R1_IDX); + + /* if no usage of r0 then return it */ + if (!r0iu && !r0ou) + { + ic->rUsed = bitVectSetBit (ic->rUsed, R0_IDX); + (*aopp)->type = AOP_R0; + + return (*aopp)->aopu.aop_ptr = REG_WITH_INDEX (R0_IDX); + } + + /* if no usage of r1 then return it */ + if (!r1iu && !r1ou) + { + ic->rUsed = bitVectSetBit (ic->rUsed, R1_IDX); + (*aopp)->type = AOP_R1; + + return (*aopp)->aopu.aop_ptr = REG_WITH_INDEX (R1_IDX); + } + + /* now we know they both have usage */ + /* if r0 not used in this instruction */ + if (!r0iu) + { + /* push it if not already pushed */ + if (ic->op == IPUSH) + { + MOVB (REG_WITH_INDEX (R0_IDX)->dname); + R0INB++; + } + else if (!_G.r0Pushed) + { + emitcode ("push", "%s", + REG_WITH_INDEX (R0_IDX)->dname); + _G.r0Pushed++; + } + + ic->rUsed = bitVectSetBit (ic->rUsed, R0_IDX); + (*aopp)->type = AOP_R0; + + return (*aopp)->aopu.aop_ptr = REG_WITH_INDEX (R0_IDX); + } + + /* if r1 not used then */ + + if (!r1iu) + { + /* push it if not already pushed */ + if (ic->op == IPUSH) + { + MOVB (REG_WITH_INDEX (R1_IDX)->dname); + R1INB++; + } + else if (!_G.r1Pushed) + { + emitcode ("push", "%s", + REG_WITH_INDEX (R1_IDX)->dname); + _G.r1Pushed++; + } + + ic->rUsed = bitVectSetBit (ic->rUsed, R1_IDX); + (*aopp)->type = AOP_R1; + return REG_WITH_INDEX (R1_IDX); + } + +endOfWorld: + /* I said end of world, but not quite end of world yet */ + /* if this is a result then we can push it on the stack */ + if (result) + { + (*aopp)->type = AOP_STK; + return NULL; + } + /* in the case that result AND left AND right needs a pointer reg + we can safely use the result's */ + if (bitVectBitValue (mcs51_rUmaskForOp(IC_RESULT(ic)), R0_IDX)) + { + (*aopp)->type = AOP_R0; + return REG_WITH_INDEX (R0_IDX); + } + if (bitVectBitValue (mcs51_rUmaskForOp(IC_RESULT(ic)), R1_IDX)) + { + (*aopp)->type = AOP_R1; + return REG_WITH_INDEX (R1_IDX); + } + + /* now this is REALLY the end of the world */ + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "getFreePtr should never reach here"); + exit (1); +} + + +/*-----------------------------------------------------------------*/ +/* getTempRegs - initialize an array of pointers to GPR registers */ +/* that are not in use. Returns 1 if the requested */ +/* number of registers were available, 0 otherwise. */ +/*-----------------------------------------------------------------*/ +int +getTempRegs(regs **tempRegs, int size, iCode *ic) +{ + bitVect * freeRegs; + int i; + int offset; + + if (!ic) + ic = _G.current_iCode; + if (!ic) + return 0; + if (!_G.currentFunc) + return 0; + + freeRegs = newBitVect(8); + bitVectSetBit (freeRegs, R2_IDX); + bitVectSetBit (freeRegs, R3_IDX); + bitVectSetBit (freeRegs, R4_IDX); + bitVectSetBit (freeRegs, R5_IDX); + bitVectSetBit (freeRegs, R6_IDX); + bitVectSetBit (freeRegs, R7_IDX); + + if (IFFUNC_CALLEESAVES(_G.currentFunc->type)) + { + bitVect * newfreeRegs; + newfreeRegs = bitVectIntersect (freeRegs, _G.currentFunc->regsUsed); + freeBitVect(freeRegs); + freeRegs = newfreeRegs; + } + freeRegs = bitVectCplAnd (freeRegs, ic->rMask); + + offset = 0; + for (i=0; isize; i++) + { + if (bitVectBitValue(freeRegs,i)) + tempRegs[offset++] = REG_WITH_INDEX(i); + if (offset>=size) + { + freeBitVect(freeRegs); + return 1; + } + } + + freeBitVect(freeRegs); + return 0; +} + + +/*-----------------------------------------------------------------*/ +/* newAsmop - creates a new asmOp */ +/*-----------------------------------------------------------------*/ +static asmop * +newAsmop (short type) +{ + asmop *aop; + + aop = Safe_calloc (1, sizeof (asmop)); + aop->type = type; + aop->allocated = 1; + return aop; +} + +/*-----------------------------------------------------------------*/ +/* pointerCode - returns the code for a pointer type */ +/*-----------------------------------------------------------------*/ +static int +pointerCode (sym_link * etype) +{ + + return PTR_TYPE (SPEC_OCLS (etype)); + +} + +/*-----------------------------------------------------------------*/ +/* leftRightUseAcc - returns size of accumulator use by operands */ +/*-----------------------------------------------------------------*/ +static int +leftRightUseAcc(iCode *ic) +{ + operand *op; + int size; + int accuseSize = 0; + int accuse = 0; + + if (!ic) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "null iCode pointer"); + return 0; + } + + if (ic->op == IFX) + { + op = IC_COND (ic); + if (IS_OP_ACCUSE (op)) + { + accuse = 1; + size = getSize (OP_SYMBOL (op)->type); + if (size>accuseSize) + accuseSize = size; + } + } + else if (ic->op == JUMPTABLE) + { + op = IC_JTCOND (ic); + if (IS_OP_ACCUSE (op)) + { + accuse = 1; + size = getSize (OP_SYMBOL (op)->type); + if (size>accuseSize) + accuseSize = size; + } + } + else + { + op = IC_LEFT (ic); + if (IS_OP_ACCUSE (op)) + { + accuse = 1; + size = getSize (OP_SYMBOL (op)->type); + if (size>accuseSize) + accuseSize = size; + } + op = IC_RIGHT (ic); + if (IS_OP_ACCUSE (op)) + { + accuse = 1; + size = getSize (OP_SYMBOL (op)->type); + if (size>accuseSize) + accuseSize = size; + } + } + + if (accuseSize) + return accuseSize; + else + return accuse; +} + +/*-----------------------------------------------------------------*/ +/* aopForSym - for a true symbol */ +/*-----------------------------------------------------------------*/ +static asmop * +aopForSym (iCode * ic, symbol * sym, bool result) +{ + asmop *aop; + memmap *space; + bool accuse = leftRightUseAcc (ic) || _G.accInUse; + + wassertl (ic != NULL, "Got a null iCode"); + wassertl (sym != NULL, "Got a null symbol"); + + space = SPEC_OCLS (sym->etype); + + /* if already has one */ + if (sym->aop) + { + sym->aop->allocated++; + return sym->aop; + } + + /* assign depending on the storage class */ + /* if it is on the stack or indirectly addressable */ + /* space we need to assign either r0 or r1 to it */ + if (sym->onStack || sym->iaccess) + { + sym->aop = aop = newAsmop (0); + aop->aopu.aop_ptr = getFreePtr (ic, &aop, result); + aop->size = getSize (sym->type); + + /* now assign the address of the variable to + the pointer register */ + if (aop->type != AOP_STK) + { + if (sym->onStack) + { + signed char offset = ((sym->stack < 0) ? + ((signed char) (sym->stack - _G.nRegsSaved)) : + ((signed char) sym->stack)) & 0xff; + + if ((abs(offset) <= 3) || + (accuse && (abs(offset) <= 7))) + { + emitcode ("mov", "%s,%s", + aop->aopu.aop_ptr->name, SYM_BP (sym)); + while (offset < 0) + { + emitcode ("dec", aop->aopu.aop_ptr->name); + offset++; + } + while (offset > 0) + { + emitcode ("inc", aop->aopu.aop_ptr->name); + offset--; + } + } + else + { + if (accuse) + emitcode ("push", "acc"); + emitcode ("mov", "a,%s", SYM_BP (sym)); + emitcode ("add", "a,#0x%02x", offset & 0xff); + emitcode ("mov", "%s,a", aop->aopu.aop_ptr->name); + if (accuse) + emitcode ("pop", "acc"); + } + } + else + { + emitcode ("mov", "%s,#%s", + aop->aopu.aop_ptr->name, + sym->rname); + } + aop->paged = space->paged; + } + else + aop->aopu.aop_stk = sym->stack; + return aop; + } + + /* if in bit space */ + if (IN_BITSPACE (space)) + { + sym->aop = aop = newAsmop (AOP_CRY); + aop->aopu.aop_dir = sym->rname; + aop->size = getSize (sym->type); + return aop; + } + /* if it is in direct space */ + if (IN_DIRSPACE (space)) + { + //printf("aopForSym, using AOP_DIR for %s (%x)\n", sym->name, sym); + //printTypeChainRaw(sym->type, NULL); + //printf("space = %s\n", space ? space->sname : "NULL"); + sym->aop = aop = newAsmop (AOP_DIR); + aop->aopu.aop_dir = sym->rname; + aop->size = getSize (sym->type); + return aop; + } + + /* special case for a function */ + if (IS_FUNC (sym->type)) + { + sym->aop = aop = newAsmop (AOP_IMMD); + aop->aopu.aop_immd.aop_immd1 = Safe_strdup(sym->rname); + aop->size = getSize (sym->type); + return aop; + } + + /* only remaining is far space */ + /* in which case DPTR gets the address */ + sym->aop = aop = newAsmop (AOP_DPTR); + emitcode ("mov", "dptr,#%s", sym->rname); + aop->size = getSize (sym->type); + + /* if it is in code space */ + if (IN_CODESPACE (space)) + aop->code = 1; + + return aop; +} + +/*-----------------------------------------------------------------*/ +/* aopForRemat - rematerializes an object */ +/*-----------------------------------------------------------------*/ +static asmop * +aopForRemat (symbol * sym) +{ + iCode *ic = sym->rematiCode; + asmop *aop = newAsmop (AOP_IMMD); + int ptr_type = 0; + int val = 0; + + for (;;) + { + if (ic->op == '+') + val += (int) operandLitValue (IC_RIGHT (ic)); + else if (ic->op == '-') + val -= (int) operandLitValue (IC_RIGHT (ic)); + else if (IS_CAST_ICODE(ic)) + { + sym_link *from_type = operandType(IC_RIGHT(ic)); + aop->aopu.aop_immd.from_cast_remat = 1; + ic = OP_SYMBOL (IC_RIGHT (ic))->rematiCode; + ptr_type = pointerTypeToGPByte (DCL_TYPE(from_type), NULL, NULL); + continue; + } + else break; + + ic = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + } + + if (val) + { + SNPRINTF (buffer, sizeof(buffer), + "(%s %c 0x%04x)", + OP_SYMBOL (IC_LEFT (ic))->rname, + val >= 0 ? '+' : '-', + abs (val) & 0xffff); + } + else + { + strncpyz (buffer, OP_SYMBOL (IC_LEFT (ic))->rname, sizeof(buffer)); + } + + aop->aopu.aop_immd.aop_immd1 = Safe_strdup(buffer); + /* set immd2 field if required */ + if (aop->aopu.aop_immd.from_cast_remat) + { + SNPRINTF (buffer, sizeof(buffer), "#0x%02x", ptr_type); + aop->aopu.aop_immd.aop_immd2 = Safe_strdup(buffer); + } + + return aop; +} + +/*-----------------------------------------------------------------*/ +/* regsInCommon - two operands have some registers in common */ +/*-----------------------------------------------------------------*/ +static bool +regsInCommon (operand * op1, operand * op2) +{ + symbol *sym1, *sym2; + int i; + + /* if they have registers in common */ + if (!IS_SYMOP (op1) || !IS_SYMOP (op2)) + return FALSE; + + sym1 = OP_SYMBOL (op1); + sym2 = OP_SYMBOL (op2); + + if (sym1->nRegs == 0 || sym2->nRegs == 0) + return FALSE; + + for (i = 0; i < sym1->nRegs; i++) + { + int j; + if (!sym1->regs[i]) + continue; + + for (j = 0; j < sym2->nRegs; j++) + { + if (!sym2->regs[j]) + continue; + + if (sym2->regs[j] == sym1->regs[i]) + return TRUE; + } + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* operandsEqu - equivalent */ +/*-----------------------------------------------------------------*/ +static bool +operandsEqu (operand * op1, operand * op2) +{ + symbol *sym1, *sym2; + + /* if they're not symbols */ + if (!IS_SYMOP (op1) || !IS_SYMOP (op2)) + return FALSE; + + sym1 = OP_SYMBOL (op1); + sym2 = OP_SYMBOL (op2); + + /* if both are itemps & one is spilt + and the other is not then false */ + if (IS_ITEMP (op1) && IS_ITEMP (op2) && + sym1->isspilt != sym2->isspilt) + return FALSE; + + /* if they are the same */ + if (sym1 == sym2) + return TRUE; + + /* if they have the same rname */ + if (sym1->rname[0] && sym2->rname[0] && + strcmp (sym1->rname, sym2->rname) == 0 && + !(IS_PARM (op2) && IS_ITEMP (op1))) + return TRUE; + + /* if left is a tmp & right is not */ + if (IS_ITEMP (op1) && + !IS_ITEMP (op2) && + sym1->isspilt && + (sym1->usl.spillLoc == sym2)) + return TRUE; + + if (IS_ITEMP (op2) && + !IS_ITEMP (op1) && + sym2->isspilt && + sym1->level > 0 && + (sym2->usl.spillLoc == sym1)) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* sameByte - two asmops have the same address at given offsets */ +/*-----------------------------------------------------------------*/ +static bool +sameByte (asmop * aop1, int off1, asmop * aop2, int off2) +{ + if (aop1 == aop2 && off1 == off2) + return TRUE; + + if (aop1->type != AOP_REG && aop1->type != AOP_CRY) + return FALSE; + + if (aop1->type != aop2->type) + return FALSE; + + if (aop1->aopu.aop_reg[off1] != aop2->aopu.aop_reg[off2]) + return FALSE; + + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* sameRegs - two asmops have the same registers */ +/*-----------------------------------------------------------------*/ +static bool +sameRegs (asmop * aop1, asmop * aop2) +{ + int i; + + if (aop1 == aop2) + return TRUE; + + if (aop1->type != AOP_REG && aop1->type != AOP_CRY) + return FALSE; + + if (aop1->type != aop2->type) + return FALSE; + + if (aop1->size != aop2->size) + return FALSE; + + for (i = 0; i < aop1->size; i++) + if (aop1->aopu.aop_reg[i] != aop2->aopu.aop_reg[i]) + return FALSE; + + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* aopOp - allocates an asmop for an operand : */ +/*-----------------------------------------------------------------*/ +static void +aopOp (operand * op, iCode * ic, bool result) +{ + asmop *aop; + symbol *sym; + int i; + + if (!op) + return; + + /* if this a literal */ + if (IS_OP_LITERAL (op)) + { + op->aop = aop = newAsmop (AOP_LIT); + aop->aopu.aop_lit = op->operand.valOperand; + aop->size = getSize (operandType (op)); + return; + } + + /* if already has a asmop then continue */ + if (op->aop) + { + op->aop->allocated++; + return; + } + + /* if the underlying symbol has a aop */ + if (IS_SYMOP (op) && OP_SYMBOL (op)->aop) + { + op->aop = OP_SYMBOL (op)->aop; + op->aop->allocated++; + return; + } + + /* if this is a true symbol */ + if (IS_TRUE_SYMOP (op)) + { + op->aop = aopForSym (ic, OP_SYMBOL (op), result); + return; + } + + /* this is a temporary : this has + only five choices : + a) register + b) spillocation + c) rematerialize + d) conditional + e) can be a return use only */ + + sym = OP_SYMBOL (op); + + /* if the type is a conditional */ + if (sym->regType == REG_CND) + { + sym->aop = op->aop = aop = newAsmop (AOP_CRY); + aop->size = sym->ruonly ? 1 : 0; + return; + } + + /* if it is spilt then two situations + a) is rematerialize + b) has a spill location */ + if (sym->isspilt || sym->nRegs == 0) + { + + /* rematerialize it NOW */ + if (sym->remat) + { + sym->aop = op->aop = aop = aopForRemat (sym); + aop->size = operandSize (op); + return; + } + + if (sym->accuse) + { + int i; + sym->aop = op->aop = aop = newAsmop (AOP_ACC); + aop->size = getSize (sym->type); + for (i = 0; i < 2; i++) + aop->aopu.aop_str[i] = accUse[i]; + return; + } + + if (sym->ruonly) + { + unsigned i; + + sym->aop = op->aop = aop = newAsmop (AOP_STR); + aop->size = getSize (sym->type); + for (i = 0; i < fReturnSizeMCS51; i++) + aop->aopu.aop_str[i] = fReturn[i]; + return; + } + + if (sym->usl.spillLoc) + { + asmop *oldAsmOp = NULL; + + if (getSize(sym->type) != getSize(sym->usl.spillLoc->type)) + { + /* force a new aop if sizes differ */ + oldAsmOp = sym->usl.spillLoc->aop; + sym->usl.spillLoc->aop = NULL; + } + sym->aop = op->aop = aop = aopForSym (ic, sym->usl.spillLoc, result); + if (getSize(sym->type) != getSize(sym->usl.spillLoc->type)) + { + /* Don't reuse the new aop, go with the last one */ + sym->usl.spillLoc->aop = oldAsmOp; + } + aop->size = getSize (sym->type); + return; + } + + /* else must be a dummy iTemp */ + sym->aop = op->aop = aop = newAsmop (AOP_DUMMY); + aop->size = getSize (sym->type); + return; + } + + /* if the type is a bit register */ + if (sym->regType == REG_BIT) + { + sym->aop = op->aop = aop = newAsmop (AOP_CRY); + aop->size = sym->nRegs;//1??? + aop->aopu.aop_reg[0] = sym->regs[0]; + aop->aopu.aop_dir = sym->regs[0]->name; + return; + } + + /* must be in a register */ + sym->aop = op->aop = aop = newAsmop (AOP_REG); + aop->size = sym->nRegs; + for (i = 0; i < sym->nRegs; i++) + aop->aopu.aop_reg[i] = sym->regs[i]; +} + +/*-----------------------------------------------------------------*/ +/* freeAsmop - free up the asmop given to an operand */ +/*-----------------------------------------------------------------*/ +static void +freeAsmop (operand * op, asmop * aaop, iCode * ic, bool pop) +{ + asmop *aop; + + if (!op) + aop = aaop; + else + aop = op->aop; + + if (!aop) + return; + + aop->allocated--; + + if (aop->allocated) + goto dealloc; + + /* depending on the asmop type only three cases need work + AOP_R0, AOP_R1 & AOP_STK */ + switch (aop->type) + { + case AOP_R0: + if (R0INB) + { + emitcode ("mov", "r0,b"); + R0INB--; + } + else if (_G.r0Pushed) + { + if (pop) + { + emitcode ("pop", "ar0"); + _G.r0Pushed--; + } + } + bitVectUnSetBit (ic->rUsed, R0_IDX); + break; + + case AOP_R1: + if (R1INB) + { + emitcode ("mov", "r1,b"); + R1INB--; + } + else if (_G.r1Pushed) + { + if (pop) + { + emitcode ("pop", "ar1"); + _G.r1Pushed--; + } + } + bitVectUnSetBit (ic->rUsed, R1_IDX); + break; + + case AOP_STK: + { + int sz = aop->size; + int stk = aop->aopu.aop_stk + aop->size - 1; + bitVectUnSetBit (ic->rUsed, R0_IDX); + bitVectUnSetBit (ic->rUsed, R1_IDX); + + getFreePtr (ic, &aop, FALSE); + + if (stk) + { + emitcode ("mov", "a,_bp"); + emitcode ("add", "a,#0x%02x", ((char) stk) & 0xff); + emitcode ("mov", "%s,a", aop->aopu.aop_ptr->name); + } + else + { + emitcode ("mov", "%s,_bp", aop->aopu.aop_ptr->name); + } + + while (sz--) + { + emitcode ("pop", "acc"); + emitcode ("mov", "@%s,a", aop->aopu.aop_ptr->name); + if (!sz) + break; + emitcode ("dec", "%s", aop->aopu.aop_ptr->name); + } + op->aop = aop; + freeAsmop (op, NULL, ic, TRUE); + if (_G.r1Pushed) + { + emitcode ("pop", "ar1"); + _G.r1Pushed--; + } + if (_G.r0Pushed) + { + emitcode ("pop", "ar0"); + _G.r0Pushed--; + } + } + break; + } + +dealloc: + /* all other cases just dealloc */ + if (op) + { + op->aop = NULL; + if (IS_SYMOP (op)) + { + OP_SYMBOL (op)->aop = NULL; + /* if the symbol has a spill */ + if (SPIL_LOC (op)) + SPIL_LOC (op)->aop = NULL; + } + } +} + +/*------------------------------------------------------------------*/ +/* freeForBranchAsmop - partial free up of Asmop for a branch; just */ +/* pop r0 or r1 off stack if pushed */ +/*------------------------------------------------------------------*/ +static void +freeForBranchAsmop (operand * op) +{ + asmop *aop; + + if (!op) + return; + + aop = op->aop; + + if (!aop) + return; + + if (!aop->allocated) + return; + + switch (aop->type) + { + case AOP_R0: + if (R0INB) + { + emitcode ("mov", "r0,b"); + } + else if (_G.r0Pushed) + { + emitcode ("pop", "ar0"); + } + break; + + case AOP_R1: + if (R1INB) + { + emitcode ("mov", "r1,b"); + } + else if (_G.r1Pushed) + { + emitcode ("pop", "ar1"); + } + break; + + case AOP_STK: + { + int sz = aop->size; + int stk = aop->aopu.aop_stk + aop->size - 1; + + emitcode ("mov", "b,r0"); + if (stk) + { + emitcode ("mov", "a,_bp"); + emitcode ("add", "a,#0x%02x", ((char) stk) & 0xff); + emitcode ("mov", "r0,a"); + } + else + { + emitcode ("mov", "r0,_bp"); + } + + while (sz--) + { + emitcode ("pop", "acc"); + emitcode ("mov", "@r0,a"); + if (!sz) + break; + emitcode ("dec", "r0"); + } + emitcode ("mov", "r0,b"); + } + } + +} + +/*-----------------------------------------------------------------*/ +/* aopGetUsesAcc - indicates ahead of time whether aopGet() will */ +/* clobber the accumulator */ +/*-----------------------------------------------------------------*/ +static bool +aopGetUsesAcc (operand * oper, int offset) +{ + asmop * aop = AOP (oper); + + if (offset > (aop->size - 1)) + return FALSE; + + switch (aop->type) + { + + case AOP_R0: + case AOP_R1: + if (aop->paged) + return TRUE; + return FALSE; + case AOP_DPTR: + return TRUE; + case AOP_IMMD: + return FALSE; + case AOP_DIR: + return FALSE; + case AOP_REG: + wassert(strcmp(aop->aopu.aop_reg[offset]->name, "a")); + return FALSE; + case AOP_CRY: + return TRUE; + case AOP_ACC: + if (offset) + return FALSE; + return TRUE; + case AOP_LIT: + return FALSE; + case AOP_STR: + if (strcmp (aop->aopu.aop_str[offset], "a") == 0) + return TRUE; + return FALSE; + case AOP_DUMMY: + return FALSE; + default: + /* Error case --- will have been caught already */ + wassert(0); + return FALSE; + } +} + +/*-------------------------------------------------------------------*/ +/* aopGet - for fetching value of the aop */ +/*-------------------------------------------------------------------*/ +static char * +aopGet (operand * oper, int offset, bool bit16, bool dname) +{ + asmop * aop = AOP (oper); + + /* offset is greater than + size then zero */ + if (offset > (aop->size - 1) && + aop->type != AOP_LIT) + return zero; + + /* depending on type */ + switch (aop->type) + { + case AOP_DUMMY: + return zero; + + case AOP_R0: + case AOP_R1: + /* if we need to increment it */ + while (offset > aop->coff) + { + emitcode ("inc", "%s", aop->aopu.aop_ptr->name); + aop->coff++; + } + + while (offset < aop->coff) + { + emitcode ("dec", "%s", aop->aopu.aop_ptr->name); + aop->coff--; + } + + aop->coff = offset; + if (aop->paged) + { + emitcode ("movx", "a,@%s", aop->aopu.aop_ptr->name); + return (dname ? "acc" : "a"); + } + SNPRINTF (buffer, sizeof(buffer), "@%s", aop->aopu.aop_ptr->name); + return Safe_strdup(buffer); + + case AOP_DPTR: + if (aop->code && aop->coff==0 && offset>=1) { + emitcode ("mov", "a,#0x%02x", offset); + emitcode ("movc", "a,@a+dptr"); + return (dname ? "acc" : "a"); + } + + while (offset > aop->coff) + { + emitcode ("inc", "dptr"); + aop->coff++; + } + + while (offset < aop->coff) + { + emitcode ("lcall", "__decdptr"); + aop->coff--; + } + + aop->coff = offset; + if (aop->code) + { + emitcode ("clr", "a"); + emitcode ("movc", "a,@a+dptr"); + } + else + { + emitcode ("movx", "a,@dptr"); + } + return (dname ? "acc" : "a"); + + case AOP_IMMD: + if (aop->aopu.aop_immd.from_cast_remat && (offset == (aop->size-1))) + { + SNPRINTF(buffer, sizeof(buffer), + "%s",aop->aopu.aop_immd.aop_immd2); + } + else if (bit16) + { + SNPRINTF(buffer, sizeof(buffer), + "#%s", aop->aopu.aop_immd.aop_immd1); + } + else if (offset) + { + SNPRINTF (buffer, sizeof(buffer), + "#(%s >> %d)", + aop->aopu.aop_immd.aop_immd1, + offset * 8); + } + else + { + SNPRINTF (buffer, sizeof(buffer), + "#%s", + aop->aopu.aop_immd.aop_immd1); + } + return Safe_strdup(buffer); + + case AOP_DIR: + if (SPEC_SCLS (getSpec (operandType (oper))) == S_SFR && offset) + { + SNPRINTF (buffer, sizeof(buffer), + "(%s >> %d)", + aop->aopu.aop_dir, offset * 8); + } + else if (offset) + { + SNPRINTF (buffer, sizeof(buffer), + "(%s + %d)", + aop->aopu.aop_dir, + offset); + } + else + { + SNPRINTF (buffer, sizeof(buffer), + "%s", + aop->aopu.aop_dir); + } + + return Safe_strdup(buffer); + + case AOP_REG: + if (dname) + return aop->aopu.aop_reg[offset]->dname; + else + return aop->aopu.aop_reg[offset]->name; + + case AOP_CRY: + emitcode ("mov", "c,%s", aop->aopu.aop_dir); + emitcode ("clr", "a"); + emitcode ("rlc", "a"); + return (dname ? "acc" : "a"); + + case AOP_ACC: + if (!offset && dname) + return "acc"; + return aop->aopu.aop_str[offset]; + + case AOP_LIT: + return aopLiteral (aop->aopu.aop_lit, offset); + + case AOP_STR: + aop->coff = offset; + if (strcmp (aop->aopu.aop_str[offset], "a") == 0 && + dname) + return "acc"; + + return aop->aopu.aop_str[offset]; + + } + + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "aopget got unsupported aop->type"); + exit (1); +} + +/*-----------------------------------------------------------------*/ +/* aopPutUsesAcc - indicates ahead of time whether aopPut() will */ +/* clobber the accumulator */ +/*-----------------------------------------------------------------*/ +static bool +aopPutUsesAcc (operand * oper, const char *s, int offset) +{ + asmop * aop = AOP (oper); + + if (offset > (aop->size - 1)) + return FALSE; + + switch (aop->type) + { + case AOP_DUMMY: + return TRUE; + case AOP_DIR: + return FALSE; + case AOP_REG: + wassert(strcmp(aop->aopu.aop_reg[offset]->name, "a")); + return FALSE; + case AOP_DPTR: + return TRUE; + case AOP_R0: + case AOP_R1: + return ((aop->paged) || (*s == '@')); + case AOP_STK: + return (*s == '@'); + case AOP_CRY: + return (!aop->aopu.aop_dir || strcmp(s, aop->aopu.aop_dir)); + case AOP_STR: + return FALSE; + case AOP_IMMD: + return FALSE; + case AOP_ACC: + return FALSE; + default: + /* Error case --- will have been caught already */ + wassert(0); + return FALSE; + } +} + +/*-----------------------------------------------------------------*/ +/* aopPut - puts a string for a aop and indicates if acc is in use */ +/*-----------------------------------------------------------------*/ +static bool +aopPut (operand * result, const char *s, int offset) +{ + bool bvolatile = isOperandVolatile (result, FALSE); + bool accuse = FALSE; + asmop * aop = AOP (result); + const char *d = NULL; + + if (aop->size && offset > (aop->size - 1)) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "aopPut got offset > aop->size"); + exit (1); + } + + /* will assign value to value */ + /* depending on where it is ofcourse */ + switch (aop->type) + { + case AOP_DUMMY: + MOVA (s); /* read s in case it was volatile */ + accuse = TRUE; + break; + + case AOP_DIR: + if (SPEC_SCLS (getSpec (operandType (result))) == S_SFR && offset) + { + SNPRINTF (buffer, sizeof(buffer), + "(%s >> %d)", + aop->aopu.aop_dir, offset * 8); + } + else if (offset) + { + SNPRINTF (buffer, sizeof(buffer), + "(%s + %d)", + aop->aopu.aop_dir, offset); + } + else + { + SNPRINTF (buffer, sizeof(buffer), + "%s", + aop->aopu.aop_dir); + } + + if (strcmp (buffer, s) || bvolatile) + { + emitcode ("mov", "%s,%s", buffer, s); + } + if (!strcmp (buffer, "acc")) + { + accuse = TRUE; + } + break; + + case AOP_REG: + if (strcmp (aop->aopu.aop_reg[offset]->name, s) != 0 && + strcmp (aop->aopu.aop_reg[offset]->dname, s) != 0) + { + if (*s == '@' || + strcmp (s, "r0") == 0 || + strcmp (s, "r1") == 0 || + strcmp (s, "r2") == 0 || + strcmp (s, "r3") == 0 || + strcmp (s, "r4") == 0 || + strcmp (s, "r5") == 0 || + strcmp (s, "r6") == 0 || + strcmp (s, "r7") == 0) + { + emitcode ("mov", "%s,%s", + aop->aopu.aop_reg[offset]->dname, s); + } + else + { + emitcode ("mov", "%s,%s", + aop->aopu.aop_reg[offset]->name, s); + } + } + break; + + case AOP_DPTR: + if (aop->code) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "aopPut writing to code space"); + exit (1); + } + + while (offset > aop->coff) + { + aop->coff++; + emitcode ("inc", "dptr"); + } + + while (offset < aop->coff) + { + aop->coff--; + emitcode ("lcall", "__decdptr"); + } + + aop->coff = offset; + + /* if not in accumulator */ + MOVA (s); + + emitcode ("movx", "@dptr,a"); + break; + + case AOP_R0: + case AOP_R1: + while (offset > aop->coff) + { + aop->coff++; + emitcode ("inc", "%s", aop->aopu.aop_ptr->name); + } + while (offset < aop->coff) + { + aop->coff--; + emitcode ("dec", "%s", aop->aopu.aop_ptr->name); + } + aop->coff = offset; + + if (aop->paged) + { + MOVA (s); + emitcode ("movx", "@%s,a", aop->aopu.aop_ptr->name); + } + else if (*s == '@') + { + MOVA (s); + emitcode ("mov", "@%s,a", aop->aopu.aop_ptr->name); + } + else if (strcmp (s, "r0") == 0 || + strcmp (s, "r1") == 0 || + strcmp (s, "r2") == 0 || + strcmp (s, "r3") == 0 || + strcmp (s, "r4") == 0 || + strcmp (s, "r5") == 0 || + strcmp (s, "r6") == 0 || + strcmp (s, "r7") == 0) + { + char buffer[10]; + SNPRINTF (buffer, sizeof(buffer), "a%s", s); + emitcode ("mov", "@%s,%s", + aop->aopu.aop_ptr->name, buffer); + } + else + { + emitcode ("mov", "@%s,%s", aop->aopu.aop_ptr->name, s); + } + break; + + case AOP_STK: + if (strcmp (s, "a") == 0) + { + emitcode ("push", "acc"); + } + else if (*s=='@') + { + MOVA(s); + emitcode ("push", "acc"); + } + else if (strcmp (s, "r0") == 0 || + strcmp (s, "r1") == 0 || + strcmp (s, "r2") == 0 || + strcmp (s, "r3") == 0 || + strcmp (s, "r4") == 0 || + strcmp (s, "r5") == 0 || + strcmp (s, "r6") == 0 || + strcmp (s, "r7") == 0) + { + char buffer[10]; + SNPRINTF (buffer, sizeof(buffer), "a%s", s); + emitcode ("push", buffer); + } + else + { + emitcode ("push", s); + } + + break; + + case AOP_CRY: + // destination is carry for return-use-only + d = (IS_OP_RUONLY (result)) ? "c" : aop->aopu.aop_dir; + + // source is no literal and not in carry + if ((s != zero) && (s != one) && strcmp (s, "c")) + { + MOVA (s); + /* set C, if a >= 1 */ + emitcode ("add", "a,#0xff"); + s = "c"; + } + // now source is zero, one or carry + + /* if result no bit variable */ + if (!d) + { + if (!strcmp (s, "c")) + { + /* inefficient: move carry into A and use jz/jnz */ + emitcode ("clr", "a"); + emitcode ("rlc", "a"); + accuse = TRUE; + } + else + { + MOVA (s); + accuse = TRUE; + } + } + else if (s == zero) + emitcode ("clr", "%s", d); + else if (s == one) + emitcode ("setb", "%s", d); + else if (strcmp (s, d)) + emitcode ("mov", "%s,c", d); + break; + + case AOP_STR: + aop->coff = offset; + if (strcmp (aop->aopu.aop_str[offset], s) || bvolatile) + emitcode ("mov", "%s,%s", aop->aopu.aop_str[offset], s); + break; + + case AOP_ACC: + accuse = TRUE; + aop->coff = offset; + if (!offset && (strcmp (s, "acc") == 0) && !bvolatile) + break; + + if (strcmp (aop->aopu.aop_str[offset], s) && !bvolatile) + emitcode ("mov", "%s,%s", aop->aopu.aop_str[offset], s); + break; + + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "aopPut got unsupported aop->type"); + exit (1); + } + + return accuse; +} + + +#if 0 +/*-----------------------------------------------------------------*/ +/* pointToEnd :- points to the last byte of the operand */ +/*-----------------------------------------------------------------*/ +static void +pointToEnd (asmop * aop) +{ + int count; + if (!aop) + return; + + aop->coff = count = (aop->size - 1); + switch (aop->type) + { + case AOP_R0: + case AOP_R1: + while (count--) + emitcode ("inc", "%s", aop->aopu.aop_ptr->name); + break; + case AOP_DPTR: + while (count--) + emitcode ("inc", "dptr"); + break; + } + +} +#endif + +/*-----------------------------------------------------------------*/ +/* reAdjustPreg - points a register back to where it should */ +/*-----------------------------------------------------------------*/ +static void +reAdjustPreg (asmop * aop) +{ + if ((aop->coff==0) || (aop->size <= 1)) + return; + + switch (aop->type) + { + case AOP_R0: + case AOP_R1: + while (aop->coff--) + emitcode ("dec", "%s", aop->aopu.aop_ptr->name); + break; + case AOP_DPTR: + while (aop->coff--) + { + emitcode ("lcall", "__decdptr"); + } + break; + } + aop->coff = 0; +} + +/*-----------------------------------------------------------------*/ +/* opIsGptr: returns non-zero if the passed operand is */ +/* a generic pointer type. */ +/*-----------------------------------------------------------------*/ +static int +opIsGptr (operand * op) +{ + if (op && IS_GENPTR (operandType (op)) && (AOP_SIZE (op) == GPTRSIZE)) + { + return 1; + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/* getDataSize - get the operand data size */ +/*-----------------------------------------------------------------*/ +static int +getDataSize (operand * op) +{ + int size = AOP_SIZE (op); + + if (size == GPTRSIZE) + { + sym_link *type = operandType (op); + if (IS_GENPTR (type)) + { + /* generic pointer; arithmetic operations + * should ignore the high byte (pointer type). + */ + size--; + } + } + return size; +} + +/*-----------------------------------------------------------------*/ +/* outAcc - output Acc */ +/*-----------------------------------------------------------------*/ +static void +outAcc (operand * result) +{ + int size, offset; + size = getDataSize (result); + if (size) + { + aopPut (result, "a", 0); + size--; + offset = 1; + /* unsigned or positive */ + while (size--) + { + aopPut (result, zero, offset++); + } + } +} + +/*-----------------------------------------------------------------*/ +/* outBitC - output a bit C */ +/*-----------------------------------------------------------------*/ +static void +outBitC (operand * result) +{ + /* if the result is bit */ + if (AOP_TYPE (result) == AOP_CRY) + { + if (!IS_OP_RUONLY (result)) + aopPut (result, "c", 0); + } + else if (AOP_TYPE (result) != AOP_DUMMY) + { + emitcode ("clr", "a"); + emitcode ("rlc", "a"); + outAcc (result); + } +} + +/*-----------------------------------------------------------------*/ +/* toBoolean - emit code for orl a,operator(sizeop) */ +/*-----------------------------------------------------------------*/ +static void +toBoolean (operand * oper) +{ + int size = AOP_SIZE (oper) - 1; + int offset = 1; + bool AccUsed = FALSE; + bool pushedB; + + while (!AccUsed && size--) + { + AccUsed |= aopGetUsesAcc(oper, offset++); + } + + size = AOP_SIZE (oper) - 1; + offset = 1; + MOVA (aopGet (oper, 0, FALSE, FALSE)); + if (size && AccUsed && (AOP (oper)->type != AOP_ACC)) + { + pushedB = pushB (); + emitcode("mov", "b,a"); + while (--size) + { + MOVA (aopGet (oper, offset++, FALSE, FALSE)); + emitcode ("orl", "b,a"); + } + MOVA (aopGet (oper, offset++, FALSE, FALSE)); + emitcode ("orl", "a,b"); + popB (pushedB); + } + else + { + while (size--) + { + emitcode ("orl", "a,%s", + aopGet (oper, offset++, FALSE, FALSE)); + } + } +} + +/*-----------------------------------------------------------------*/ +/* toCarry - make boolean and move into carry */ +/*-----------------------------------------------------------------*/ +static void +toCarry (operand * oper) +{ + /* if the operand is a literal then + we know what the value is */ + if (AOP_TYPE (oper) == AOP_LIT) + { + if ((int) operandLitValue (oper)) + SETC; + else + CLRC; + } + else if (AOP_TYPE (oper) == AOP_CRY) + { + emitcode ("mov", "c,%s", oper->aop->aopu.aop_dir); + } + else + { + /* or the operand into a */ + toBoolean (oper); + /* set C, if a >= 1 */ + emitcode ("add", "a,#0xff"); + } +} + +/*-----------------------------------------------------------------*/ +/* assignBit - assign operand to bit operand */ +/*-----------------------------------------------------------------*/ +static void +assignBit (operand * result, operand * right) +{ + /* if the right side is a literal then + we know what the value is */ + if (AOP_TYPE (right) == AOP_LIT) + { + if ((int) operandLitValue (right)) + aopPut (result, one, 0); + else + aopPut (result, zero, 0); + } + else + { + toCarry (right); + aopPut (result, "c", 0); + } +} + + +/*-------------------------------------------------------------------*/ +/* xch_a_aopGet - for exchanging acc with value of the aop */ +/*-------------------------------------------------------------------*/ +static char * +xch_a_aopGet (operand * oper, int offset, bool bit16, bool dname) +{ + char * l; + + if (aopGetUsesAcc (oper, offset)) + { + emitcode("mov", "b,a"); + MOVA (aopGet (oper, offset, bit16, dname)); + emitcode("xch", "a,b"); + aopPut (oper, "a", offset); + emitcode("xch", "a,b"); + l = "b"; + } + else + { + l = aopGet (oper, offset, bit16, dname); + emitcode("xch", "a,%s", l); + } + return l; +} + + +/*-----------------------------------------------------------------*/ +/* genNot - generate code for ! operation */ +/*-----------------------------------------------------------------*/ +static void +genNot (iCode * ic) +{ + symbol *tlbl; + + D (emitcode (";", "genNot")); + + /* assign asmOps to operand & result */ + aopOp (IC_LEFT (ic), ic, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE); + + /* if in bit space then a special case */ + if (AOP_TYPE (IC_LEFT (ic)) == AOP_CRY) + { + /* if left==result then cpl bit */ + if (sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic)))) + { + emitcode ("cpl", "%s", IC_LEFT (ic)->aop->aopu.aop_dir); + } + else + { + toCarry (IC_LEFT (ic)); + emitcode ("cpl", "c"); + outBitC (IC_RESULT (ic)); + } + goto release; + } + + toBoolean (IC_LEFT (ic)); + + /* set C, if a == 0 */ + tlbl = newiTempLabel (NULL); + emitcode ("cjne", "a,#0x01,%05d$", tlbl->key + 100); + emitLabel (tlbl); + outBitC (IC_RESULT (ic)); + +release: + /* release the aops */ + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + freeAsmop (IC_LEFT (ic), NULL, ic, (RESULTONSTACK (ic) ? 0 : 1)); +} + + +/*-----------------------------------------------------------------*/ +/* genCpl - generate code for complement */ +/*-----------------------------------------------------------------*/ +static void +genCpl (iCode * ic) +{ + int offset = 0; + int size; + symbol *tlbl; + sym_link *letype = getSpec (operandType (IC_LEFT (ic))); + + D(emitcode (";", "genCpl")); + + /* assign asmOps to operand & result */ + aopOp (IC_LEFT (ic), ic, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE); + + /* special case if in bit space */ + if (AOP_TYPE (IC_RESULT (ic)) == AOP_CRY) + { + char *l; + + if (AOP_TYPE (IC_LEFT (ic)) == AOP_CRY || + (SPEC_USIGN (letype) && IS_CHAR (letype))) + { + /* promotion rules are responsible for this strange result: + bit -> int -> ~int -> bit + uchar -> int -> ~int -> bit + */ + emitcode ("setb", "%s", IC_RESULT (ic)->aop->aopu.aop_dir); + goto release; + } + + tlbl=newiTempLabel(NULL); + l = aopGet (IC_LEFT (ic), offset++, FALSE, FALSE); + if ((AOP_TYPE (IC_LEFT (ic)) == AOP_ACC && offset == 0) || + AOP_TYPE (IC_LEFT (ic)) == AOP_REG || + IS_AOP_PREG (IC_LEFT (ic))) + { + emitcode ("cjne", "%s,#0xFF,%05d$", l, tlbl->key + 100); + } + else + { + MOVA (l); + emitcode ("cjne", "a,#0xFF,%05d$", tlbl->key + 100); + } + emitLabel (tlbl); + outBitC (IC_RESULT(ic)); + goto release; + } + + size = AOP_SIZE (IC_RESULT (ic)); + while (size--) + { + char *l = aopGet (IC_LEFT (ic), offset, FALSE, FALSE); + MOVA (l); + emitcode ("cpl", "a"); + aopPut (IC_RESULT (ic), "a", offset++); + } + + +release: + /* release the aops */ + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + freeAsmop (IC_LEFT (ic), NULL, ic, (RESULTONSTACK (ic) ? 0 : 1)); +} + +/*-----------------------------------------------------------------*/ +/* genUminusFloat - unary minus for floating points */ +/*-----------------------------------------------------------------*/ +static void +genUminusFloat (operand * op, operand * result) +{ + int size, offset = 0; + char *l; + + D (emitcode (";", "genUminusFloat")); + + /* for this we just copy and then flip the bit */ + + size = AOP_SIZE (op) - 1; + + while (size--) + { + aopPut (result, + aopGet (op, offset, FALSE, FALSE), + offset); + offset++; + } + + l = aopGet (op, offset, FALSE, FALSE); + MOVA (l); + + emitcode ("cpl", "acc.7"); + aopPut (result, "a", offset); +} + +/*-----------------------------------------------------------------*/ +/* genUminus - unary minus code generation */ +/*-----------------------------------------------------------------*/ +static void +genUminus (iCode * ic) +{ + int offset, size; + sym_link *optype; + + D (emitcode (";", "genUminus")); + + /* assign asmops */ + aopOp (IC_LEFT (ic), ic, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE); + + /* if both in bit space then special + case */ + if (AOP_TYPE (IC_RESULT (ic)) == AOP_CRY && + AOP_TYPE (IC_LEFT (ic)) == AOP_CRY) + { + + emitcode ("mov", "c,%s", IC_LEFT (ic)->aop->aopu.aop_dir); + emitcode ("cpl", "c"); + emitcode ("mov", "%s,c", IC_RESULT (ic)->aop->aopu.aop_dir); + goto release; + } + + optype = operandType (IC_LEFT (ic)); + + /* if float then do float stuff */ + if (IS_FLOAT (optype)) + { + genUminusFloat (IC_LEFT (ic), IC_RESULT (ic)); + goto release; + } + + /* otherwise subtract from zero */ + size = AOP_SIZE (IC_LEFT (ic)); + offset = 0; + while (size--) + { + char *l = aopGet (IC_LEFT (ic), offset, FALSE, FALSE); + if (!strcmp (l, "a")) + { + if (offset == 0) + SETC; + emitcode ("cpl", "a"); + emitcode ("addc", "a,#0x00"); + } + else + { + if (offset == 0) + CLRC; + emitcode ("clr", "a"); + emitcode ("subb", "a,%s", l); + } + aopPut (IC_RESULT (ic), "a", offset++); + } + + /* if any remaining bytes in the result */ + /* we just need to propagate the sign */ + if ((size = (AOP_SIZE (IC_RESULT (ic)) - AOP_SIZE (IC_LEFT (ic))))) + { + emitcode ("rlc", "a"); + emitcode ("subb", "a,acc"); + while (size--) + aopPut (IC_RESULT (ic), "a", offset++); + } + +release: + /* release the aops */ + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + freeAsmop (IC_LEFT (ic), NULL, ic, (RESULTONSTACK (ic) ? 0 : 1)); +} + +/*-----------------------------------------------------------------*/ +/* saveRegisters - will look for a call and save the registers */ +/*-----------------------------------------------------------------*/ +static void +saveRegisters (iCode * lic) +{ + int i; + iCode *ic; + bitVect *rsave; + + /* look for call */ + for (ic = lic; ic; ic = ic->next) + if (ic->op == CALL || ic->op == PCALL) + break; + + if (!ic) + { + fprintf (stderr, "found parameter push with no function call\n"); + return; + } + + /* if the registers have been saved already or don't need to be then + do nothing */ + if (ic->regsSaved) + return; + if (IS_SYMOP(IC_LEFT(ic)) && + (IFFUNC_CALLEESAVES (OP_SYMBOL (IC_LEFT (ic))->type) || + IFFUNC_ISNAKED (OP_SYM_TYPE (IC_LEFT (ic))))) + return; + + /* save the registers in use at this time but skip the + ones for the result */ + rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + mcs51_rUmaskForOp (IC_RESULT(ic))); + + ic->regsSaved = 1; + if (options.useXstack) + { + bitVect *rsavebits = bitVectIntersect (bitVectCopy (mcs51_allBitregs ()), rsave); + int nBits = bitVectnBitsOn (rsavebits); + int count = bitVectnBitsOn (rsave); + + if (nBits != 0) + { + count = count - nBits + 1; + /* remove all but the first bits as they are pushed all at once */ + rsave = bitVectCplAnd (rsave, rsavebits); + rsave = bitVectSetBit (rsave, bitVectFirstBit (rsavebits)); + } + freeBitVect (rsavebits); + + if (count == 1) + { + regs * reg = REG_WITH_INDEX (bitVectFirstBit (rsave)); + if (reg->type == REG_BIT) + { + emitcode ("mov", "a,%s", reg->base); + } + else + { + emitcode ("mov", "a,%s", reg->name); + } + emitcode ("mov", "r0,%s", spname); + emitcode ("inc", "%s", spname);// allocate before use + emitcode ("movx", "@r0,a"); + if (bitVectBitValue (rsave, R0_IDX)) + emitcode ("mov", "r0,a"); + } + else if (count != 0) + { + if (bitVectBitValue (rsave, R0_IDX)) + { + emitcode ("push", "%s", REG_WITH_INDEX (R0_IDX)->dname); + } + emitcode ("mov", "r0,%s", spname); + MOVA ("r0"); + emitcode ("add", "a,#0x%02x", count); + emitcode ("mov", "%s,a", spname); + for (i = 0; i < mcs51_nRegs; i++) + { + if (bitVectBitValue (rsave, i)) + { + regs * reg = REG_WITH_INDEX (i); + if (i == R0_IDX) + { + emitcode ("pop", "acc"); + emitcode ("push", "acc"); + } + else if (reg->type == REG_BIT) + { + emitcode ("mov", "a,%s", reg->base); + } + else + { + emitcode ("mov", "a,%s", reg->name); + } + emitcode ("movx", "@r0,a"); + if (--count) + { + emitcode ("inc", "r0"); + } + } + } + if (bitVectBitValue (rsave, R0_IDX)) + { + emitcode ("pop", "%s", REG_WITH_INDEX (R0_IDX)->dname); + } + } + } + else + { + bool bits_pushed = FALSE; + for (i = 0; i < mcs51_nRegs; i++) + { + if (bitVectBitValue (rsave, i)) + { + bits_pushed = pushReg (i, bits_pushed); + } + } + } + freeBitVect (rsave); +} + +/*-----------------------------------------------------------------*/ +/* unsaveRegisters - pop the pushed registers */ +/*-----------------------------------------------------------------*/ +static void +unsaveRegisters (iCode * ic) +{ + int i; + bitVect *rsave; + + /* restore the registers in use at this time but skip the + ones for the result */ + rsave = bitVectCplAnd (bitVectCopy (ic->rMask), + mcs51_rUmaskForOp (IC_RESULT(ic))); + + if (options.useXstack) + { + bitVect *rsavebits = bitVectIntersect (bitVectCopy (mcs51_allBitregs ()), rsave); + int nBits = bitVectnBitsOn (rsavebits); + int count = bitVectnBitsOn (rsave); + + if (nBits != 0) + { + count = count - nBits + 1; + /* remove all but the first bits as they are popped all at once */ + rsave = bitVectCplAnd (rsave, rsavebits); + rsave = bitVectSetBit (rsave, bitVectFirstBit (rsavebits)); + } + freeBitVect (rsavebits); + + if (count == 1) + { + regs * reg = REG_WITH_INDEX (bitVectFirstBit (rsave)); + emitcode ("mov", "r0,%s", spname); + emitcode ("dec", "r0"); + emitcode ("movx", "a,@r0"); + if (reg->type == REG_BIT) + { + emitcode ("mov", "%s,a", reg->base); + } + else + { + emitcode ("mov", "%s,a", reg->name); + } + emitcode ("dec", "%s", spname); + } + else if (count != 0) + { + emitcode ("mov", "r0,%s", spname); + for (i = mcs51_nRegs; i >= 0; i--) + { + if (bitVectBitValue (rsave, i)) + { + regs * reg = REG_WITH_INDEX (i); + emitcode ("dec", "r0"); + emitcode ("movx", "a,@r0"); + if (i == R0_IDX) + { + emitcode ("push", "acc"); + } + else if (reg->type == REG_BIT) + { + emitcode ("mov", "%s,a", reg->base); + } + else + { + emitcode ("mov", "%s,a", reg->name); + } + } + } + emitcode ("mov", "%s,r0", spname); + if (bitVectBitValue (rsave, R0_IDX)) + { + emitcode ("pop", "ar0"); + } + } + } + else + { + bool bits_popped = FALSE; + for (i = mcs51_nRegs; i >= 0; i--) + { + if (bitVectBitValue (rsave, i)) + { + bits_popped = popReg (i, bits_popped); + } + } + } + freeBitVect (rsave); +} + + +/*-----------------------------------------------------------------*/ +/* pushSide - */ +/*-----------------------------------------------------------------*/ +static void +pushSide (operand * oper, int size, iCode * ic) +{ + int offset = 0; + int nPushed = _G.r0Pushed + _G.r1Pushed; + + aopOp (oper, ic, FALSE); + + if (nPushed != _G.r0Pushed + _G.r1Pushed) + { + while (offset < size) + { + char *l = aopGet (oper, offset, FALSE, TRUE); + emitcode ("mov", "%s,%s", fReturn[offset++], l); + } + freeAsmop (oper, NULL, ic, TRUE); + offset = 0; + while (offset < size) + { + emitcode ("push", "%s", fReturn[offset++]); + } + return; + } + + while (size--) + { + char *l = aopGet (oper, offset++, FALSE, TRUE); + if (AOP_TYPE (oper) != AOP_REG && + AOP_TYPE (oper) != AOP_DIR && + strcmp (l, "a")) + { + MOVA (l); + emitcode ("push", "acc"); + } + else + { + emitcode ("push", "%s", l); + } + } + + freeAsmop (oper, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* assignResultValue - also indicates if acc is in use afterwards */ +/*-----------------------------------------------------------------*/ +static bool +assignResultValue (operand * oper, operand * func) +{ + int offset = 0; + int size = AOP_SIZE (oper); + bool accuse = FALSE; + bool pushedA = FALSE; + + if (func && IS_BIT (OP_SYM_ETYPE (func))) + { + outBitC (oper); + return FALSE; + } + + if ((size > 3) && aopPutUsesAcc (oper, fReturn[offset], offset)) + { + emitcode ("push", "acc"); + pushedA = TRUE; + } + while (size--) + { + if ((offset == 3) && pushedA) + emitcode ("pop", "acc"); + accuse |= aopPut (oper, fReturn[offset], offset); + offset++; + } + return accuse; +} + + +/*-----------------------------------------------------------------*/ +/* genXpush - pushes onto the external stack */ +/*-----------------------------------------------------------------*/ +static void +genXpush (iCode * ic) +{ + asmop *aop = newAsmop (0); + regs *r; + int size, offset = 0; + + D (emitcode (";", "genXpush")); + + aopOp (IC_LEFT (ic), ic, FALSE); + r = getFreePtr (ic, &aop, FALSE); + + size = AOP_SIZE (IC_LEFT (ic)); + + if (size == 1) + { + MOVA (aopGet (IC_LEFT (ic), 0, FALSE, FALSE)); + emitcode ("mov", "%s,%s", r->name, spname); + emitcode ("inc", "%s", spname); // allocate space first + emitcode ("movx", "@%s,a", r->name); + } + else + { + // allocate space first + emitcode ("mov", "%s,%s", r->name, spname); + MOVA (r->name); + emitcode ("add", "a,#0x%02x", size); + emitcode ("mov", "%s,a", spname); + + while (size--) + { + MOVA (aopGet (IC_LEFT (ic), offset++, FALSE, FALSE)); + emitcode ("movx", "@%s,a", r->name); + emitcode ("inc", "%s", r->name); + } + } + + freeAsmop (NULL, aop, ic, TRUE); + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genIpush - generate code for pushing this gets a little complex */ +/*-----------------------------------------------------------------*/ +static void +genIpush (iCode * ic) +{ + int size, offset = 0; + char *l; + char *prev = ""; + + D (emitcode (";", "genIpush")); + + /* if this is not a parm push : ie. it is spill push + and spill push is always done on the local stack */ + if (!ic->parmPush) + { + + /* and the item is spilt then do nothing */ + if (OP_SYMBOL (IC_LEFT (ic))->isspilt) + return; + + aopOp (IC_LEFT (ic), ic, FALSE); + size = AOP_SIZE (IC_LEFT (ic)); + /* push it on the stack */ + while (size--) + { + l = aopGet (IC_LEFT (ic), offset++, FALSE, TRUE); + if (*l == '#') + { + MOVA (l); + l = "acc"; + } + emitcode ("push", "%s", l); + } + return; + } + + /* this is a parameter push: in this case we call + the routine to find the call and save those + registers that need to be saved */ + saveRegisters (ic); + + /* if use external stack then call the external + stack pushing routine */ + if (options.useXstack) + { + genXpush (ic); + return; + } + + /* then do the push */ + aopOp (IC_LEFT (ic), ic, FALSE); + + // pushSide(IC_LEFT(ic), AOP_SIZE(IC_LEFT(ic))); + size = AOP_SIZE (IC_LEFT (ic)); + + while (size--) + { + l = aopGet (IC_LEFT (ic), offset++, FALSE, TRUE); + if (AOP_TYPE (IC_LEFT (ic)) != AOP_REG && + AOP_TYPE (IC_LEFT (ic)) != AOP_DIR) + { + if (strcmp (l, prev) || *l == '@') + MOVA (l); + emitcode ("push", "acc"); + } + else + { + emitcode ("push", "%s", l); + } + prev = l; + } + + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genIpop - recover the registers: can happen only for spilling */ +/*-----------------------------------------------------------------*/ +static void +genIpop (iCode * ic) +{ + int size, offset; + + D (emitcode (";", "genIpop")); + + /* if the temp was not pushed then */ + if (OP_SYMBOL (IC_LEFT (ic))->isspilt) + return; + + aopOp (IC_LEFT (ic), ic, FALSE); + size = AOP_SIZE (IC_LEFT (ic)); + offset = (size - 1); + while (size--) + { + emitcode ("pop", "%s", aopGet (IC_LEFT (ic), offset--, + FALSE, TRUE)); + } + + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* popForBranch - recover the spilt registers for a branch */ +/*-----------------------------------------------------------------*/ +static void +popForBranch (iCode * ic, bool markGenerated) +{ + while (ic && ic->op == IPOP) + { + genIpop (ic); + if (markGenerated) + ic->generated = 1; /* mark the icode as generated */ + ic = ic->next; + } +} + +/*-----------------------------------------------------------------*/ +/* saveRBank - saves an entire register bank on the stack */ +/*-----------------------------------------------------------------*/ +static void +saveRBank (int bank, iCode * ic, bool pushPsw) +{ + int i; + int count = 8 + (pushPsw ? 1 : 0); + asmop *aop = NULL; + regs *r = NULL; + + if (options.useXstack) + { + if (!ic) + { + /* Assume r0 is available for use. */ + r = REG_WITH_INDEX (R0_IDX); + } + else + { + aop = newAsmop (0); + r = getFreePtr (ic, &aop, FALSE); + } + // allocate space first + emitcode ("mov", "%s,%s", r->name, spname); + MOVA (r->name); + emitcode ("add", "a,#0x%02x", count); + emitcode ("mov", "%s,a", spname); + } + + for (i = 0; i < 8; i++) + { + if (options.useXstack) + { + emitcode ("mov", "a,(%s+%d)", + regs8051[i].base, 8 * bank + regs8051[i].offset); + emitcode ("movx", "@%s,a", r->name); + if (--count) + emitcode ("inc", "%s", r->name); + } + else + emitcode ("push", "(%s+%d)", + regs8051[i].base, 8 * bank + regs8051[i].offset); + } + + if (pushPsw) + { + if (options.useXstack) + { + emitcode ("mov", "a,psw"); + emitcode ("movx", "@%s,a", r->name); + } + else + { + emitcode ("push", "psw"); + } + + emitcode ("mov", "psw,#0x%02x", (bank << 3) & 0x00ff); + } + + if (aop) + { + freeAsmop (NULL, aop, ic, TRUE); + } + + if (ic) + { + ic->bankSaved = 1; + } +} + +/*-----------------------------------------------------------------*/ +/* unsaveRBank - restores the register bank from stack */ +/*-----------------------------------------------------------------*/ +static void +unsaveRBank (int bank, iCode * ic, bool popPsw) +{ + int i; + asmop *aop = NULL; + regs *r = NULL; + + if (options.useXstack) + { + if (!ic) + { + /* Assume r0 is available for use. */ + r = REG_WITH_INDEX (R0_IDX);; + } + else + { + aop = newAsmop (0); + r = getFreePtr (ic, &aop, FALSE); + } + emitcode ("mov", "%s,%s", r->name, spname); + } + + if (popPsw) + { + if (options.useXstack) + { + emitcode ("dec", "%s", r->name); + emitcode ("movx", "a,@%s", r->name); + emitcode ("mov", "psw,a"); + } + else + { + emitcode ("pop", "psw"); + } + } + + for (i = 7; i >= 0; i--) + { + if (options.useXstack) + { + emitcode ("dec", "%s", r->name); + emitcode ("movx", "a,@%s", r->name); + emitcode ("mov", "(%s+%d),a", + regs8051[i].base, 8 * bank + regs8051[i].offset); + } + else + { + emitcode ("pop", "(%s+%d)", + regs8051[i].base, 8 * bank + regs8051[i].offset); + } + } + + if (options.useXstack) + { + emitcode ("mov", "%s,%s", spname, r->name); + } + + if (aop) + { + freeAsmop (NULL, aop, ic, TRUE); + } +} + +/*-----------------------------------------------------------------*/ +/* genSend - gen code for SEND */ +/*-----------------------------------------------------------------*/ +static void genSend(set *sendSet) +{ + iCode *sic; + int bit_count = 0; + + /* first we do all bit parameters */ + for (sic = setFirstItem (sendSet); sic; + sic = setNextItem (sendSet)) + { + if (sic->argreg > 12) + { + int bit = sic->argreg-13; + + aopOp (IC_LEFT (sic), sic, FALSE); + + /* if left is a literal then + we know what the value is */ + if (AOP_TYPE (IC_LEFT (sic)) == AOP_LIT) + { + if (((int) operandLitValue (IC_LEFT (sic)))) + emitcode ("setb", "b[%d]", bit); + else + emitcode ("clr", "b[%d]", bit); + } + else + { + /* we need to or */ + toCarry (IC_LEFT (sic)); + emitcode ("mov", "b[%d],c", bit); + } + bit_count++; + BitBankUsed = 1; + + freeAsmop (IC_LEFT (sic), NULL, sic, TRUE); + } + } + + if (options.useXstack || bit_count) + { + saveRegisters (setFirstItem (sendSet)); + } + + if (bit_count) + { + emitcode ("mov", "bits,b"); + } + + /* then we do all other parameters */ + for (sic = setFirstItem (sendSet); sic; + sic = setNextItem (sendSet)) + { + if (sic->argreg <= 12) + { + int size, offset = 0; + aopOp (IC_LEFT (sic), sic, FALSE); + size = AOP_SIZE (IC_LEFT (sic)); + + if (sic->argreg == 1) + { + while (size--) + { + char *l = aopGet (IC_LEFT (sic), offset, FALSE, FALSE); + if (strcmp (l, fReturn[offset])) + { + emitcode ("mov", "%s,%s", fReturn[offset], l); + } + offset++; + } + } + else + { + while (size--) + { + emitcode ("mov","%s,%s", rb1regs[sic->argreg+offset-5], + aopGet (IC_LEFT (sic), offset,FALSE, FALSE)); + offset++; + } + } + freeAsmop (IC_LEFT (sic), NULL, sic, TRUE); + } + } +} + +/*-----------------------------------------------------------------*/ +/* selectRegBank - emit code to select the register bank */ +/*-----------------------------------------------------------------*/ +static void +selectRegBank (short bank, bool keepFlags) +{ + /* if f.e. result is in carry */ + if (keepFlags) + { + emitcode ("anl", "psw,#0xE7"); + if (bank) + emitcode ("orl", "psw,#0x%02x", (bank << 3) & 0xff); + } + else + { + emitcode ("mov", "psw,#0x%02x", (bank << 3) & 0xff); + } +} + +/*-----------------------------------------------------------------*/ +/* genCall - generates a call statement */ +/*-----------------------------------------------------------------*/ +static void +genCall (iCode * ic) +{ + sym_link *dtype; + sym_link *etype; +// bool restoreBank = FALSE; + bool swapBanks = FALSE; + bool accuse = FALSE; + bool accPushed = FALSE; + bool resultInF0 = FALSE; + bool assignResultGenerated = FALSE; + + D (emitcode (";", "genCall")); + + dtype = operandType (IC_LEFT (ic)); + etype = getSpec(dtype); + /* if send set is not empty then assign */ + if (_G.sendSet) + { + if (IFFUNC_ISREENT(dtype)) { /* need to reverse the send set */ + genSend(reverseSet(_G.sendSet)); + } else { + genSend(_G.sendSet); + } + _G.sendSet = NULL; + } + + /* if we are calling a not _naked function that is not using + the same register bank then we need to save the + destination registers on the stack */ + if (currFunc && dtype && !IFFUNC_ISNAKED(dtype) && + (FUNC_REGBANK (currFunc->type) != FUNC_REGBANK (dtype)) && + !IFFUNC_ISISR (dtype)) + { + swapBanks = TRUE; + } + + /* if caller saves & we have not saved then */ + if (!ic->regsSaved) + saveRegisters (ic); + + if (swapBanks) + { + emitcode ("mov", "psw,#0x%02x", ((FUNC_REGBANK(dtype)) << 3) & 0xff); + } + + /* make the call */ + if (IFFUNC_ISBANKEDCALL (dtype) && !SPEC_STAT(getSpec(dtype))) + { + if (IFFUNC_CALLEESAVES(dtype)) + { + werror (E_BANKED_WITH_CALLEESAVES); + } + else + { + char *l = (OP_SYMBOL (IC_LEFT (ic))->rname[0] ? + OP_SYMBOL (IC_LEFT (ic))->rname : + OP_SYMBOL (IC_LEFT (ic))->name); + + emitcode ("mov", "r0,#%s", l); + emitcode ("mov", "r1,#(%s >> 8)", l); + emitcode ("mov", "r2,#(%s >> 16)", l); + emitcode ("lcall", "__sdcc_banked_call"); + } + } + else + { + emitcode ("lcall", "%s", (OP_SYMBOL (IC_LEFT (ic))->rname[0] ? + OP_SYMBOL (IC_LEFT (ic))->rname : + OP_SYMBOL (IC_LEFT (ic))->name)); + } + + if (swapBanks) + { + selectRegBank (FUNC_REGBANK(currFunc->type), IS_BIT (etype)); + } + + /* if we need assign a result value */ + if ((IS_ITEMP (IC_RESULT (ic)) && + !IS_BIT (OP_SYM_ETYPE (IC_RESULT (ic))) && + (OP_SYMBOL (IC_RESULT (ic))->nRegs || + OP_SYMBOL (IC_RESULT (ic))->accuse || + OP_SYMBOL (IC_RESULT (ic))->spildir)) || + IS_TRUE_SYMOP (IC_RESULT (ic))) + { + + _G.accInUse++; + aopOp (IC_RESULT (ic), ic, FALSE); + _G.accInUse--; + + accuse = assignResultValue (IC_RESULT (ic), IC_LEFT (ic)); + assignResultGenerated = TRUE; + + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + } + + /* adjust the stack for parameters if required */ + if (ic->parmBytes) + { + int i; + if (ic->parmBytes > 3) + { + if (accuse) + { + emitcode ("push", "acc"); + accPushed = TRUE; + } + if (IS_BIT (OP_SYM_ETYPE (IC_LEFT (ic))) && + IS_BIT (OP_SYM_ETYPE (IC_RESULT (ic))) && + !assignResultGenerated) + { + emitcode ("mov", "F0,c"); + resultInF0 = TRUE; + } + + emitcode ("mov", "a,%s", spname); + emitcode ("add", "a,#0x%02x", (-ic->parmBytes) & 0xff); + emitcode ("mov", "%s,a", spname); + + /* unsaveRegisters from xstack needs acc, but */ + /* unsaveRegisters from stack needs this popped */ + if (accPushed && !options.useXstack) + { + emitcode ("pop", "acc"); + accPushed = FALSE; + } + } + else + for (i = 0; i < ic->parmBytes; i++) + emitcode ("dec", "%s", spname); + } + + /* if we had saved some registers then unsave them */ + if (ic->regsSaved && !IFFUNC_CALLEESAVES(dtype)) + { + if (accuse && !accPushed && options.useXstack) + { + /* xstack needs acc, but doesn't touch normal stack */ + emitcode ("push", "acc"); + accPushed = TRUE; + } + unsaveRegisters (ic); + } + +// /* if register bank was saved then pop them */ +// if (restoreBank) +// unsaveRBank (FUNC_REGBANK (dtype), ic, FALSE); + + if (IS_BIT (OP_SYM_ETYPE (IC_RESULT (ic))) && !assignResultGenerated) + { + if (resultInF0) + emitcode ("mov", "c,F0"); + + aopOp (IC_RESULT (ic), ic, FALSE); + assignResultValue (IC_RESULT (ic), IC_LEFT (ic)); + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + } + + if (accPushed) + emitcode ("pop", "acc"); +} + +/*-----------------------------------------------------------------*/ +/* genPcall - generates a call by pointer statement */ +/*-----------------------------------------------------------------*/ +static void +genPcall (iCode * ic) +{ + sym_link *dtype; + sym_link *etype; + symbol *rlbl = newiTempLabel (NULL); +// bool restoreBank=FALSE; + bool swapBanks = FALSE; + bool resultInF0 = FALSE; + + D (emitcode (";", "genPcall")); + + dtype = operandType (IC_LEFT (ic))->next; + etype = getSpec(dtype); + /* if caller saves & we have not saved then */ + if (!ic->regsSaved) + saveRegisters (ic); + + /* if we are calling a not _naked function that is not using + the same register bank then we need to save the + destination registers on the stack */ + if (currFunc && dtype && !IFFUNC_ISNAKED (dtype) && + (FUNC_REGBANK (currFunc->type) != FUNC_REGBANK (dtype)) && + !IFFUNC_ISISR (dtype)) + { +// saveRBank (FUNC_REGBANK (dtype), ic, TRUE); +// restoreBank=TRUE; + swapBanks = TRUE; + // need caution message to user here + } + + if (IS_LITERAL (etype)) + { + /* if send set is not empty then assign */ + if (_G.sendSet) + { + genSend(reverseSet(_G.sendSet)); + _G.sendSet = NULL; + } + + if (swapBanks) + { + emitcode ("mov", "psw,#0x%02x", + ((FUNC_REGBANK (dtype)) << 3) & 0xff); + } + + if (IFFUNC_ISBANKEDCALL (dtype) && !SPEC_STAT (getSpec(dtype))) + { + if (IFFUNC_CALLEESAVES (dtype)) + { + werror (E_BANKED_WITH_CALLEESAVES); + } + else + { + char *l = aopLiteralLong (OP_VALUE (IC_LEFT (ic)), 0, 2); + + emitcode ("mov", "r0,#%s", l); + emitcode ("mov", "r1,#(%s >> 8)", l); + emitcode ("mov", "r2,#(%s >> 16)", l); + emitcode ("lcall", "__sdcc_banked_call"); + } + } + else + { + emitcode ("lcall", "%s", aopLiteralLong (OP_VALUE (IC_LEFT (ic)), 0, 2)); + } + } + else + { + if (IFFUNC_ISBANKEDCALL (dtype) && !SPEC_STAT (getSpec(dtype))) + { + if (IFFUNC_CALLEESAVES (dtype)) + { + werror (E_BANKED_WITH_CALLEESAVES); + } + else + { + aopOp (IC_LEFT (ic), ic, FALSE); + + if (!swapBanks) + { + /* what if aopGet needs r0 or r1 ??? */ + emitcode ("mov", "ar0,%s", aopGet(IC_LEFT (ic), 0, FALSE, FALSE)); + emitcode ("mov", "ar1,%s", aopGet(IC_LEFT (ic), 1, FALSE, FALSE)); + emitcode ("mov", "ar2,%s", aopGet(IC_LEFT (ic), 2, FALSE, FALSE)); + } + else + { + int reg = ((FUNC_REGBANK(dtype)) << 3) & 0xff; + emitcode ("mov", "0x%02x,%s", reg++, aopGet(IC_LEFT (ic), 0, FALSE, FALSE)); + emitcode ("mov", "0x%02x,%s", reg++, aopGet(IC_LEFT (ic), 1, FALSE, FALSE)); + emitcode ("mov", "0x%02x,%s", reg, aopGet(IC_LEFT (ic), 2, FALSE, FALSE)); + } + + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); + + /* if send set is not empty then assign */ + if (_G.sendSet) + { + genSend(reverseSet(_G.sendSet)); + _G.sendSet = NULL; + } + + if (swapBanks) + { + emitcode ("mov", "psw,#0x%02x", + ((FUNC_REGBANK (dtype)) << 3) & 0xff); + } + + /* make the call */ + emitcode ("lcall", "__sdcc_banked_call"); + } + } + else if (_G.sendSet) + { + /* push the return address on to the stack */ + emitcode ("mov", "a,#%05d$", (rlbl->key + 100)); + emitcode ("push", "acc"); + emitcode ("mov", "a,#(%05d$ >> 8)", (rlbl->key + 100)); + emitcode ("push", "acc"); + + /* now push the function address */ + pushSide (IC_LEFT (ic), FPTRSIZE, ic); + + /* if send set is not empty then assign */ + if (_G.sendSet) + { + genSend(reverseSet(_G.sendSet)); + _G.sendSet = NULL; + } + + if (swapBanks) + { + emitcode ("mov", "psw,#0x%02x", + ((FUNC_REGBANK (dtype)) << 3) & 0xff); + } + + /* make the call */ + emitcode ("ret", ""); + emitLabel (rlbl); + } + else /* the send set is empty */ + { + char *l; + /* now get the calling address into dptr */ + aopOp (IC_LEFT (ic), ic, FALSE); + + l = aopGet (IC_LEFT (ic), 0, FALSE, FALSE); + if (AOP_TYPE (IC_LEFT (ic)) == AOP_DPTR) + { + emitcode ("mov", "r0,%s", l); + l = aopGet (IC_LEFT (ic), 1, FALSE, FALSE); + emitcode ("mov", "dph,%s", l); + emitcode ("mov", "dpl,r0"); + } + else + { + emitcode ("mov", "dpl,%s", l); + l = aopGet (IC_LEFT (ic), 1, FALSE, FALSE); + emitcode ("mov", "dph,%s", l); + } + + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); + + if (swapBanks) + { + emitcode ("mov", "psw,#0x%02x", + ((FUNC_REGBANK (dtype)) << 3) & 0xff); + } + + /* make the call */ + emitcode ("lcall", "__sdcc_call_dptr"); + } + } + if (swapBanks) + { + selectRegBank (FUNC_REGBANK (currFunc->type), IS_BIT (etype)); + } + + /* if we need assign a result value */ + if ((IS_ITEMP (IC_RESULT (ic)) && + !IS_BIT (OP_SYM_ETYPE (IC_RESULT (ic))) && + (OP_SYMBOL (IC_RESULT (ic))->nRegs || + OP_SYMBOL (IC_RESULT (ic))->spildir)) || + IS_TRUE_SYMOP (IC_RESULT (ic))) + { + + _G.accInUse++; + aopOp (IC_RESULT (ic), ic, FALSE); + _G.accInUse--; + + assignResultValue (IC_RESULT (ic), IC_LEFT (ic)); + + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + } + + /* adjust the stack for parameters if required */ + if (ic->parmBytes) + { + int i; + if (ic->parmBytes > 3) + { + if (IS_BIT (OP_SYM_ETYPE (IC_LEFT (ic))) && + IS_BIT (OP_SYM_ETYPE (IC_RESULT (ic)))) + { + emitcode ("mov", "F0,c"); + resultInF0 = TRUE; + } + + emitcode ("mov", "a,%s", spname); + emitcode ("add", "a,#0x%02x", (-ic->parmBytes) & 0xff); + emitcode ("mov", "%s,a", spname); + } + else + for (i = 0; i < ic->parmBytes; i++) + emitcode ("dec", "%s", spname); + } + +// /* if register bank was saved then unsave them */ +// if (restoreBank) +// unsaveRBank (FUNC_REGBANK (dtype), ic, TRUE); + + /* if we had saved some registers then unsave them */ + if (ic->regsSaved && !IFFUNC_CALLEESAVES (dtype)) + unsaveRegisters (ic); + + if (IS_BIT (OP_SYM_ETYPE (IC_RESULT (ic)))) + { + if (resultInF0) + emitcode ("mov", "c,F0"); + + aopOp (IC_RESULT (ic), ic, FALSE); + assignResultValue (IC_RESULT (ic), IC_LEFT (ic)); + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + } +} + +/*-----------------------------------------------------------------*/ +/* resultRemat - result is rematerializable */ +/*-----------------------------------------------------------------*/ +static int +resultRemat (iCode * ic) +{ + if (SKIP_IC (ic) || ic->op == IFX) + return 0; + + if (IC_RESULT (ic) && IS_ITEMP (IC_RESULT (ic))) + { + symbol *sym = OP_SYMBOL (IC_RESULT (ic)); + if (sym->remat && !POINTER_SET (ic)) + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* inExcludeList - return 1 if the string is in exclude Reg list */ +/*-----------------------------------------------------------------*/ +static int +regsCmp(void *p1, void *p2) +{ + return (STRCASECMP((char *)p1, (char *)(p2)) == 0); +} + +static bool +inExcludeList (char *s) +{ + const char *p = setFirstItem(options.excludeRegsSet); + + if (p == NULL || STRCASECMP(p, "none") == 0) + return FALSE; + + + return isinSetWith(options.excludeRegsSet, s, regsCmp); +} + +/*-----------------------------------------------------------------*/ +/* genFunction - generated code for function entry */ +/*-----------------------------------------------------------------*/ +static void +genFunction (iCode * ic) +{ + symbol *sym = OP_SYMBOL (IC_LEFT (ic)); + sym_link *ftype; + bool switchedPSW = FALSE; + int calleesaves_saved_register = -1; + int stackAdjust = sym->stack; + int accIsFree = sym->recvSize < 4; + iCode *ric = (ic->next && ic->next->op == RECEIVE) ? ic->next : NULL; + bool fReentrant = (IFFUNC_ISREENT (sym->type) || options.stackAuto); + + _G.nRegsSaved = 0; + /* create the function header */ + emitcode (";", "-----------------------------------------"); + emitcode (";", " function %s", sym->name); + emitcode (";", "-----------------------------------------"); + + emitcode ("", "%s:", sym->rname); + lineCurr->isLabel = 1; + ftype = operandType (IC_LEFT (ic)); + _G.currentFunc = sym; + + if (IFFUNC_ISNAKED(ftype)) + { + emitcode(";", "naked function: no prologue."); + return; + } + + /* here we need to generate the equates for the + register bank if required */ + if (FUNC_REGBANK (ftype) != rbank) + { + int i; + + rbank = FUNC_REGBANK (ftype); + for (i = 0; i < mcs51_nRegs; i++) + { + if (regs8051[i].type != REG_BIT) + { + if (strcmp (regs8051[i].base, "0") == 0) + emitcode ("", "%s = 0x%02x", + regs8051[i].dname, + 8 * rbank + regs8051[i].offset); + else + emitcode ("", "%s = %s + 0x%02x", + regs8051[i].dname, + regs8051[i].base, + 8 * rbank + regs8051[i].offset); + } + } + } + + /* if this is an interrupt service routine then + save acc, b, dpl, dph */ + if (IFFUNC_ISISR (sym->type)) + { + bitVect *rsavebits; + + rsavebits = bitVectIntersect (bitVectCopy (mcs51_allBitregs ()), sym->regsUsed); + if (IFFUNC_HASFCALL(sym->type) || !bitVectIsZero (rsavebits)) + { + emitcode ("push", "bits"); + BitBankUsed = 1; + } + freeBitVect (rsavebits); + + if (!inExcludeList ("acc")) + emitcode ("push", "acc"); + if (!inExcludeList ("b")) + emitcode ("push", "b"); + if (!inExcludeList ("dpl")) + emitcode ("push", "dpl"); + if (!inExcludeList ("dph")) + emitcode ("push", "dph"); + /* if this isr has no bank i.e. is going to + run with bank 0 , then we need to save more + registers :-) */ + if (!FUNC_REGBANK (sym->type)) + { + int i; + + /* if this function does not call any other + function then we can be economical and + save only those registers that are used */ + if (!IFFUNC_HASFCALL(sym->type)) + { + /* if any registers used */ + if (sym->regsUsed) + { + /* save the registers used */ + for (i = 0; i < sym->regsUsed->size; i++) + { + if (bitVectBitValue (sym->regsUsed, i)) + pushReg (i, TRUE); + } + } + } + else + { + /* this function has a function call. We cannot + determine register usage so we will have to push the + entire bank */ + saveRBank (0, ic, FALSE); + if (options.parms_in_bank1) + { + for (i=0; i < 8 ; i++ ) + { + emitcode ("push","%s",rb1regs[i]); + } + } + } + } + else + { + /* This ISR uses a non-zero bank. + * + * We assume that the bank is available for our + * exclusive use. + * + * However, if this ISR calls a function which uses some + * other bank, we must save that bank entirely. + */ + unsigned long banksToSave = 0; + + if (IFFUNC_HASFCALL(sym->type)) + { + +#define MAX_REGISTER_BANKS 4 + + iCode *i; + int ix; + + for (i = ic; i; i = i->next) + { + if (i->op == ENDFUNCTION) + { + /* we got to the end OK. */ + break; + } + + if (i->op == CALL) + { + sym_link *dtype; + + dtype = operandType (IC_LEFT(i)); + if (dtype + && FUNC_REGBANK(dtype) != FUNC_REGBANK(sym->type)) + { + /* Mark this bank for saving. */ + if (FUNC_REGBANK(dtype) >= MAX_REGISTER_BANKS) + { + werror(E_NO_SUCH_BANK, FUNC_REGBANK(dtype)); + } + else + { + banksToSave |= (1 << FUNC_REGBANK(dtype)); + } + + /* And note that we don't need to do it in + * genCall. + */ + i->bankSaved = 1; + } + } + if (i->op == PCALL) + { + /* This is a mess; we have no idea what + * register bank the called function might + * use. + * + * The only thing I can think of to do is + * throw a warning and hope. + */ + werror(W_FUNCPTR_IN_USING_ISR); + } + } + + if (banksToSave && options.useXstack) + { + /* Since we aren't passing it an ic, + * saveRBank will assume r0 is available to abuse. + * + * So switch to our (trashable) bank now, so + * the caller's R0 isn't trashed. + */ + emitcode ("push", "psw"); + emitcode ("mov", "psw,#0x%02x", + (FUNC_REGBANK (sym->type) << 3) & 0x00ff); + switchedPSW = TRUE; + } + + for (ix = 0; ix < MAX_REGISTER_BANKS; ix++) + { + if (banksToSave & (1 << ix)) + { + saveRBank(ix, NULL, FALSE); + } + } + } + // TODO: this needs a closer look + SPEC_ISR_SAVED_BANKS(currFunc->etype) = banksToSave; + } + + /* Set the register bank to the desired value if nothing else */ + /* has done so yet. */ + if (!switchedPSW) + { + emitcode ("push", "psw"); + emitcode ("mov", "psw,#0x%02x", (FUNC_REGBANK (sym->type) << 3) & 0x00ff); + } + } + else + { + /* This is a non-ISR function. The caller has already switched register */ + /* banks, if necessary, so just handle the callee-saves option. */ + + /* if callee-save to be used for this function + then save the registers being used in this function */ + if (IFFUNC_CALLEESAVES(sym->type)) + { + int i; + + /* if any registers used */ + if (sym->regsUsed) + { + bool bits_pushed = FALSE; + /* save the registers used */ + for (i = 0; i < sym->regsUsed->size; i++) + { + if (bitVectBitValue (sym->regsUsed, i)) + { + /* remember one saved register for later usage */ + if (calleesaves_saved_register < 0) + calleesaves_saved_register = i; + bits_pushed = pushReg (i, bits_pushed); + _G.nRegsSaved++; + } + } + } + } + } + + if (fReentrant) + { + if (options.useXstack) + { + if (sym->xstack || FUNC_HASSTACKPARM(sym->type)) + { + emitcode ("mov", "r0,%s", spname); + emitcode ("inc", "%s", spname); + emitcode ("xch", "a,_bpx"); + emitcode ("movx", "@r0,a"); + emitcode ("inc", "r0"); + emitcode ("mov", "a,r0"); + emitcode ("xch", "a,_bpx"); + } + if (sym->stack) + { + emitcode ("push", "_bp"); /* save the callers stack */ + emitcode ("mov", "_bp,sp"); + } + } + else + { + if (sym->stack || FUNC_HASSTACKPARM(sym->type)) + { + /* set up the stack */ + emitcode ("push", "_bp"); /* save the callers stack */ + emitcode ("mov", "_bp,sp"); + } + } + } + + /* For some cases it is worthwhile to perform a RECEIVE iCode */ + /* before setting up the stack frame completely. */ + if (ric && ric->argreg == 1 && IC_RESULT (ric)) + { + symbol * rsym = OP_SYMBOL (IC_RESULT (ric)); + + if (rsym->isitmp) + { + if (rsym && rsym->regType == REG_CND) + rsym = NULL; + if (rsym && (rsym->accuse || rsym->ruonly)) + rsym = NULL; + if (rsym && (rsym->isspilt || rsym->nRegs == 0) && rsym->usl.spillLoc) + rsym = rsym->usl.spillLoc; + } + + /* If the RECEIVE operand immediately spills to the first entry on the */ + /* stack, we can push it directly (since sp = _bp + 1 at this point) */ + /* rather than the usual @r0/r1 machinations. */ + if (!options.useXstack && rsym && rsym->onStack && rsym->stack == 1) + { + int ofs; + + _G.current_iCode = ric; + D(emitcode (";", "genReceive")); + for (ofs=0; ofs < sym->recvSize; ofs++) + { + if (!strcmp (fReturn[ofs], "a")) + emitcode ("push", "acc"); + else + emitcode ("push", fReturn[ofs]); + } + stackAdjust -= sym->recvSize; + if (stackAdjust<0) + { + assert (stackAdjust>=0); + stackAdjust = 0; + } + _G.current_iCode = ic; + ric->generated = 1; + accIsFree = 1; + } + /* If the RECEIVE operand is 4 registers, we can do the moves now */ + /* to free up the accumulator. */ + else if (rsym && rsym->nRegs && sym->recvSize == 4) + { + int ofs; + + _G.current_iCode = ric; + D(emitcode (";", "genReceive")); + for (ofs=0; ofs < sym->recvSize; ofs++) + { + emitcode ("mov", "%s,%s", rsym->regs[ofs]->name, fReturn[ofs]); + } + _G.current_iCode = ic; + ric->generated = 1; + accIsFree = 1; + } + } + + /* adjust the stack for the function */ + if (stackAdjust) + { + int i = stackAdjust; + if (i > 256) + werror (W_STACK_OVERFLOW, sym->name); + + if (i > 3 && accIsFree) + { + emitcode ("mov", "a,sp"); + emitcode ("add", "a,#0x%02x", ((char) sym->stack & 0xff)); + emitcode ("mov", "sp,a"); + } + else if (i > 5) + { + /* The accumulator is not free, so we will need another register */ + /* to clobber. No need to worry about a possible conflict with */ + /* the above early RECEIVE optimizations since they would have */ + /* freed the accumulator if they were generated. */ + + if (IFFUNC_CALLEESAVES(sym->type)) + { + /* if it's a callee-saves function we need a saved register */ + if (calleesaves_saved_register >= 0) + { + emitcode ("mov", "%s,a", REG_WITH_INDEX (calleesaves_saved_register)->dname); + emitcode ("mov", "a,sp"); + emitcode ("add", "a,#0x%02x", ((char) sym->stack & 0xff)); + emitcode ("mov", "sp,a"); + emitcode ("mov", "a,%s", REG_WITH_INDEX (calleesaves_saved_register)->dname); + } + else + /* do it the hard way */ + while (i--) + emitcode ("inc", "sp"); + } + else + { + /* not callee-saves, we can clobber r0 */ + emitcode ("mov", "r0,a"); + emitcode ("mov", "a,sp"); + emitcode ("add", "a,#0x%02x", ((char) sym->stack & 0xff)); + emitcode ("mov", "sp,a"); + emitcode ("mov", "a,r0"); + } + } + else + while (i--) + emitcode ("inc", "sp"); + } + + if (sym->xstack) + { + char i = ((char) sym->xstack & 0xff); + + if (i > 3 && accIsFree) + { + emitcode ("mov", "a,_spx"); + emitcode ("add", "a,#0x%02x", i & 0xff); + emitcode ("mov", "_spx,a"); + } + else if (i > 5) + { + emitcode ("push", "acc"); + emitcode ("mov", "a,_spx"); + emitcode ("add", "a,#0x%02x", i & 0xff); + emitcode ("mov", "_spx,a"); + emitcode ("pop", "acc"); + } + else + { + while (i--) + emitcode ("inc", "_spx"); + } + } + + /* if critical function then turn interrupts off */ + if (IFFUNC_ISCRITICAL (ftype)) + { + symbol *tlbl = newiTempLabel (NULL); + emitcode ("setb", "c"); + emitcode ("jbc", "ea,%05d$", (tlbl->key + 100)); /* atomic test & clear */ + emitcode ("clr", "c"); + emitLabel (tlbl); + emitcode ("push", "psw"); /* save old ea via c in psw */ + } +} + +/*-----------------------------------------------------------------*/ +/* genEndFunction - generates epilogue for functions */ +/*-----------------------------------------------------------------*/ +static void +genEndFunction (iCode * ic) +{ + symbol *sym = OP_SYMBOL (IC_LEFT (ic)); + lineNode *lnp = lineCurr; + bitVect *regsUsed; + bitVect *regsUsedPrologue; + bitVect *regsUnneeded; + int idx; + + _G.currentFunc = NULL; + if (IFFUNC_ISNAKED(sym->type)) + { + emitcode(";", "naked function: no epilogue."); + if (options.debug && currFunc) + debugFile->writeEndFunction (currFunc, ic, 0); + return; + } + + if (IFFUNC_ISCRITICAL (sym->type)) + { + if (IS_BIT (OP_SYM_ETYPE (IC_LEFT (ic)))) + { + emitcode ("rlc", "a"); /* save c in a */ + emitcode ("pop", "psw"); /* restore ea via c in psw */ + emitcode ("mov", "ea,c"); + emitcode ("rrc", "a"); /* restore c from a */ + } + else + { + emitcode ("pop", "psw"); /* restore ea via c in psw */ + emitcode ("mov", "ea,c"); + } + } + + if ((IFFUNC_ISREENT (sym->type) || options.stackAuto)) + { + if (options.useXstack) + { + if (sym->stack) + { + emitcode ("mov", "sp,_bp"); + emitcode ("pop", "_bp"); + } + if (sym->xstack || FUNC_HASSTACKPARM(sym->type)) + { + emitcode ("xch", "a,_bpx"); + emitcode ("mov", "r0,a"); + emitcode ("dec", "r0"); + emitcode ("movx", "a,@r0"); + emitcode ("xch", "a,_bpx"); + emitcode ("mov", "%s,r0", spname); //read before freeing stack space (interrupts) + } + } + else if (sym->stack || FUNC_HASSTACKPARM(sym->type)) + { + if (sym->stack) + emitcode ("mov", "sp,_bp"); + emitcode ("pop", "_bp"); + } + } + + /* restore the register bank */ + if ( /* FUNC_REGBANK (sym->type) || */ IFFUNC_ISISR (sym->type)) + { + if (!FUNC_REGBANK (sym->type) || !IFFUNC_ISISR (sym->type) + || !options.useXstack) + { + /* Special case of ISR using non-zero bank with useXstack + * is handled below. + */ + emitcode ("pop", "psw"); + } + } + + if (IFFUNC_ISISR (sym->type)) + { + bitVect *rsavebits; + + /* now we need to restore the registers */ + /* if this isr has no bank i.e. is going to + run with bank 0 , then we need to save more + registers :-) */ + if (!FUNC_REGBANK (sym->type)) + { + int i; + /* if this function does not call any other + function then we can be economical and + save only those registers that are used */ + if (!IFFUNC_HASFCALL(sym->type)) + { + /* if any registers used */ + if (sym->regsUsed) + { + /* save the registers used */ + for (i = sym->regsUsed->size; i >= 0; i--) + { + if (bitVectBitValue (sym->regsUsed, i)) + popReg (i, TRUE); + } + } + } + else + { + if (options.parms_in_bank1) + { + for (i = 7 ; i >= 0 ; i-- ) + { + emitcode ("pop","%s",rb1regs[i]); + } + } + /* this function has a function call. We cannot + determine register usage so we will have to pop the + entire bank */ + unsaveRBank (0, ic, FALSE); + } + } + else + { + /* This ISR uses a non-zero bank. + * + * Restore any register banks saved by genFunction + * in reverse order. + */ + unsigned savedBanks = SPEC_ISR_SAVED_BANKS(currFunc->etype); + int ix; + + for (ix = MAX_REGISTER_BANKS - 1; ix >= 0; ix--) + { + if (savedBanks & (1 << ix)) + { + unsaveRBank(ix, NULL, FALSE); + } + } + + if (options.useXstack) + { + /* Restore bank AFTER calling unsaveRBank, + * since it can trash r0. + */ + emitcode ("pop", "psw"); + } + } + + if (!inExcludeList ("dph")) + emitcode ("pop", "dph"); + if (!inExcludeList ("dpl")) + emitcode ("pop", "dpl"); + if (!inExcludeList ("b")) + emitcode ("pop", "b"); + if (!inExcludeList ("acc")) + emitcode ("pop", "acc"); + + rsavebits = bitVectIntersect (bitVectCopy (mcs51_allBitregs ()), sym->regsUsed); + if (IFFUNC_HASFCALL(sym->type) || !bitVectIsZero (rsavebits)) + emitcode ("pop", "bits"); + freeBitVect (rsavebits); + + /* if debug then send end of function */ + if (options.debug && currFunc) + { + debugFile->writeEndFunction (currFunc, ic, 1); + } + + emitcode ("reti", ""); + } + else + { + if (IFFUNC_CALLEESAVES(sym->type)) + { + int i; + + /* if any registers used */ + if (sym->regsUsed) + { + /* save the registers used */ + for (i = sym->regsUsed->size; i >= 0; i--) + { + if (bitVectBitValue (sym->regsUsed, i) || + (mcs51_ptrRegReq && (i == R0_IDX || i == R1_IDX))) + emitcode ("pop", "%s", REG_WITH_INDEX (i)->dname); + } + } + else if (mcs51_ptrRegReq) + { + emitcode ("pop", "%s", REG_WITH_INDEX (R1_IDX)->dname); + emitcode ("pop", "%s", REG_WITH_INDEX (R0_IDX)->dname); + } + + } + + /* if debug then send end of function */ + if (options.debug && currFunc) + { + debugFile->writeEndFunction (currFunc, ic, 1); + } + + if (IFFUNC_ISBANKEDCALL (sym->type) && !SPEC_STAT(getSpec(sym->type))) + { + emitcode ("ljmp", "__sdcc_banked_ret"); + } + else + { + emitcode ("ret", ""); + } + } + + if (!port->peep.getRegsRead || !port->peep.getRegsWritten || options.nopeep) + return; + + /* If this was an interrupt handler using bank 0 that called another */ + /* function, then all registers must be saved; nothing to optimized. */ + if (IFFUNC_ISISR (sym->type) && IFFUNC_HASFCALL(sym->type) + && !FUNC_REGBANK(sym->type)) + return; + + /* There are no push/pops to optimize if not callee-saves or ISR */ + if (!(FUNC_CALLEESAVES (sym->type) || FUNC_ISISR (sym->type))) + return; + + /* If there were stack parameters, we cannot optimize without also */ + /* fixing all of the stack offsets; this is too dificult to consider. */ + if (FUNC_HASSTACKPARM(sym->type)) + return; + + /* Compute the registers actually used */ + regsUsed = newBitVect (mcs51_nRegs); + regsUsedPrologue = newBitVect (mcs51_nRegs); + while (lnp) + { + if (lnp->ic && lnp->ic->op == FUNCTION) + regsUsedPrologue = bitVectUnion (regsUsedPrologue, port->peep.getRegsWritten(lnp)); + else + regsUsed = bitVectUnion (regsUsed, port->peep.getRegsWritten(lnp)); + + if (lnp->ic && lnp->ic->op == FUNCTION && lnp->prev + && lnp->prev->ic && lnp->prev->ic->op == ENDFUNCTION) + break; + if (!lnp->prev) + break; + lnp = lnp->prev; + } + + if (bitVectBitValue (regsUsedPrologue, CND_IDX) + && !bitVectBitValue (regsUsed, CND_IDX)) + { + regsUsed = bitVectUnion (regsUsed, regsUsedPrologue); + if (IFFUNC_ISISR (sym->type) && !FUNC_REGBANK (sym->type) + && !sym->stack && !FUNC_ISCRITICAL (sym->type)) + bitVectUnSetBit (regsUsed, CND_IDX); + } + else + regsUsed = bitVectUnion (regsUsed, regsUsedPrologue); + + /* If this was an interrupt handler that called another function */ + /* function, then assume A, B, DPH, & DPL may be modified by it. */ + if (IFFUNC_ISISR (sym->type) && IFFUNC_HASFCALL(sym->type)) + { + regsUsed = bitVectSetBit (regsUsed, DPL_IDX); + regsUsed = bitVectSetBit (regsUsed, DPH_IDX); + regsUsed = bitVectSetBit (regsUsed, B_IDX); + regsUsed = bitVectSetBit (regsUsed, A_IDX); + regsUsed = bitVectSetBit (regsUsed, CND_IDX); + } + + /* Remove the unneeded push/pops */ + regsUnneeded = newBitVect (mcs51_nRegs); + while (lnp) + { + if (lnp->ic && (lnp->ic->op == FUNCTION || lnp->ic->op == ENDFUNCTION)) + { + if (!strncmp(lnp->line, "push", 4)) + { + idx = bitVectFirstBit (port->peep.getRegsRead(lnp)); + if (idx>=0 && !bitVectBitValue (regsUsed, idx)) + { + connectLine (lnp->prev, lnp->next); + regsUnneeded = bitVectSetBit (regsUnneeded, idx); + } + } + if (!strncmp(lnp->line, "pop", 3) || !strncmp(lnp->line, "mov", 3)) + { + idx = bitVectFirstBit (port->peep.getRegsWritten(lnp)); + if (idx>=0 && !bitVectBitValue (regsUsed, idx)) + { + connectLine (lnp->prev, lnp->next); + regsUnneeded = bitVectSetBit (regsUnneeded, idx); + } + } + } + lnp = lnp->next; + } + + for (idx = 0; idx < regsUnneeded->size; idx++) + if (bitVectBitValue (regsUnneeded, idx)) + emitcode (";", "eliminated unneeded push/pop %s", REG_WITH_INDEX (idx)->dname); + + freeBitVect (regsUnneeded); + freeBitVect (regsUsed); + freeBitVect (regsUsedPrologue); +} + +/*-----------------------------------------------------------------*/ +/* genRet - generate code for return statement */ +/*-----------------------------------------------------------------*/ +static void +genRet (iCode * ic) +{ + int size, offset = 0, pushed = 0; + + D (emitcode (";", "genRet")); + + /* if we have no return value then + just generate the "ret" */ + if (!IC_LEFT (ic)) + goto jumpret; + + /* we have something to return then + move the return value into place */ + aopOp (IC_LEFT (ic), ic, FALSE); + size = AOP_SIZE (IC_LEFT (ic)); + + if (IS_BIT(_G.currentFunc->etype)) + { + if (!IS_OP_RUONLY (IC_LEFT (ic))) + toCarry (IC_LEFT (ic)); + } + else + { + while (size--) + { + char *l; + if (AOP_TYPE (IC_LEFT (ic)) == AOP_DPTR) + { + /* #NOCHANGE */ + l = aopGet (IC_LEFT (ic), offset++, FALSE, TRUE); + emitcode ("push", "%s", l); + pushed++; + } + else + { + l = aopGet (IC_LEFT (ic), offset, FALSE, FALSE); + if (strcmp (fReturn[offset], l)) + emitcode ("mov", "%s,%s", fReturn[offset++], l); + } + } + + while (pushed) + { + pushed--; + if (strcmp (fReturn[pushed], "a")) + emitcode ("pop", fReturn[pushed]); + else + emitcode ("pop", "acc"); + } + } + freeAsmop (IC_LEFT (ic), NULL, ic, TRUE); + +jumpret: + /* generate a jump to the return label + if the next is not the return statement */ + if (!(ic->next && ic->next->op == LABEL && + IC_LABEL (ic->next) == returnLabel)) + + emitcode ("ljmp", "%05d$", (returnLabel->key + 100)); + +} + +/*-----------------------------------------------------------------*/ +/* genLabel - generates a label */ +/*-----------------------------------------------------------------*/ +static void +genLabel (iCode * ic) +{ + /* special case never generate */ + if (IC_LABEL (ic) == entryLabel) + return; + + emitLabel (IC_LABEL (ic)); +} + +/*-----------------------------------------------------------------*/ +/* genGoto - generates a ljmp */ +/*-----------------------------------------------------------------*/ +static void +genGoto (iCode * ic) +{ + emitcode ("ljmp", "%05d$", (IC_LABEL (ic)->key + 100)); +} + +/*-----------------------------------------------------------------*/ +/* findLabelBackwards: walks back through the iCode chain looking */ +/* for the given label. Returns number of iCode instructions */ +/* between that label and given ic. */ +/* Returns zero if label not found. */ +/*-----------------------------------------------------------------*/ +static int +findLabelBackwards (iCode * ic, int key) +{ + int count = 0; + + while (ic->prev) + { + ic = ic->prev; + count++; + + /* If we have any pushes or pops, we cannot predict the distance. + I don't like this at all, this should be dealt with in the + back-end */ + if (ic->op == IPUSH || ic->op == IPOP) { + return 0; + } + + if (ic->op == LABEL && IC_LABEL (ic)->key == key) + { + return count; + } + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* genPlusIncr :- does addition with increment if possible */ +/*-----------------------------------------------------------------*/ +static bool +genPlusIncr (iCode * ic) +{ + unsigned int icount; + unsigned int size = getDataSize (IC_RESULT (ic)); + + /* will try to generate an increment */ + /* if the right side is not a literal + we cannot */ + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) + return FALSE; + + icount = (unsigned int) ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit); + + D(emitcode (";","genPlusIncr")); + + /* if increment >=16 bits in register or direct space */ + if (( AOP_TYPE(IC_LEFT(ic)) == AOP_REG || + AOP_TYPE(IC_LEFT(ic)) == AOP_DIR || + (IS_AOP_PREG (IC_LEFT(ic)) && !AOP_NEEDSACC (IC_LEFT(ic))) ) && + sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic))) && + !isOperandVolatile (IC_RESULT (ic), FALSE) && + (size > 1) && + (icount == 1)) + { + symbol *tlbl; + int emitTlbl; + int labelRange; + char *l; + + /* If the next instruction is a goto and the goto target + * is < 10 instructions previous to this, we can generate + * jumps straight to that target. + */ + if (ic->next && ic->next->op == GOTO + && (labelRange = findLabelBackwards (ic, IC_LABEL (ic->next)->key)) != 0 + && labelRange <= 10) + { + D (emitcode (";", "tail increment optimized (range %d)", labelRange)); + tlbl = IC_LABEL (ic->next); + emitTlbl = 0; + } + else + { + tlbl = newiTempLabel (NULL); + emitTlbl = 1; + } + l = aopGet (IC_RESULT (ic), LSB, FALSE, FALSE); + emitcode ("inc", "%s", l); + if (AOP_TYPE (IC_RESULT (ic)) == AOP_REG || + IS_AOP_PREG (IC_RESULT (ic))) + { + emitcode ("cjne", "%s,#0x00,%05d$", l, tlbl->key + 100); + } + else + { + emitcode ("clr", "a"); + emitcode ("cjne", "a,%s,%05d$", l, tlbl->key + 100); + } + + l = aopGet (IC_RESULT (ic), MSB16, FALSE, FALSE); + emitcode ("inc", "%s", l); + if (size > 2) + { + if (!strcmp(l, "acc")) + { + emitcode("jnz", "!tlabel", tlbl->key + 100); + } + else if (AOP_TYPE (IC_RESULT (ic)) == AOP_REG || + IS_AOP_PREG (IC_RESULT (ic))) + { + emitcode ("cjne", "%s,#0x00,%05d$", l, tlbl->key + 100); + } + else + { + emitcode ("cjne", "a,%s,%05d$", l, tlbl->key + 100); + } + + l = aopGet (IC_RESULT (ic), MSB24, FALSE, FALSE); + emitcode ("inc", "%s", l); + } + if (size > 3) + { + if (!strcmp(l, "acc")) + { + emitcode("jnz", "!tlabel", tlbl->key + 100); + } + else if (AOP_TYPE (IC_RESULT (ic)) == AOP_REG || + IS_AOP_PREG (IC_RESULT (ic))) + { + emitcode ("cjne", "%s,#0x00,%05d$", l, tlbl->key + 100); + } + else + { + emitcode ("cjne", "a,%s,%05d$", l, tlbl->key + 100); + } + + l = aopGet (IC_RESULT (ic), MSB32, FALSE, FALSE); + emitcode ("inc", "%s", l); + } + + if (emitTlbl) + { + emitLabel (tlbl); + } + return TRUE; + } + + /* if result is dptr */ + if ((AOP_TYPE (IC_RESULT (ic)) == AOP_STR) && + (AOP_SIZE (IC_RESULT (ic)) == 2) && + !strncmp(AOP (IC_RESULT (ic))->aopu.aop_str[0], "dpl", 4) && + !strncmp(AOP (IC_RESULT (ic))->aopu.aop_str[1], "dph", 4)) + { + if (aopGetUsesAcc (IC_LEFT (ic), 0)) + return FALSE; + + if (icount > 9) + return FALSE; + + if ((AOP_TYPE (IC_LEFT (ic)) != AOP_DIR) && (icount > 5)) + return FALSE; + + aopPut (IC_RESULT (ic), aopGet (IC_LEFT (ic), 0, FALSE, FALSE), 0); + aopPut (IC_RESULT (ic), aopGet (IC_LEFT (ic), 1, FALSE, FALSE), 1); + while (icount--) + emitcode ("inc", "dptr"); + + return TRUE; + } + + /* if the literal value of the right hand side + is greater than 4 then it is not worth it */ + if (icount > 4) + return FALSE; + + /* if the sizes are greater than 1 then we cannot */ + if (AOP_SIZE (IC_RESULT (ic)) > 1 || + AOP_SIZE (IC_LEFT (ic)) > 1) + return FALSE; + + /* we can if the aops of the left & result match or + if they are in registers and the registers are the + same */ + if (sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic)))) + { + if (icount > 3) + { + MOVA (aopGet (IC_LEFT (ic), 0, FALSE, FALSE)); + emitcode ("add", "a,#0x%02x", ((char) icount) & 0xff); + aopPut (IC_RESULT (ic), "a", 0); + } + else + { + while (icount--) + { + emitcode ("inc", "%s", aopGet (IC_LEFT (ic), 0, FALSE, FALSE)); + } + } + + return TRUE; + } + + if (icount == 1) + { + MOVA (aopGet (IC_LEFT (ic), 0, FALSE, FALSE)); + emitcode ("inc", "a"); + aopPut (IC_RESULT (ic), "a", 0); + return TRUE; + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* outBitAcc - output a bit in acc */ +/*-----------------------------------------------------------------*/ +static void +outBitAcc (operand * result) +{ + symbol *tlbl = newiTempLabel (NULL); + /* if the result is a bit */ + if (AOP_TYPE (result) == AOP_CRY) + { + aopPut (result, "a", 0); + } + else + { + emitcode ("jz", "%05d$", tlbl->key + 100); + emitcode ("mov", "a,%s", one); + emitLabel (tlbl); + outAcc (result); + } +} + +/*-----------------------------------------------------------------*/ +/* genPlusBits - generates code for addition of two bits */ +/*-----------------------------------------------------------------*/ +static void +genPlusBits (iCode * ic) +{ + D (emitcode (";", "genPlusBits")); + + emitcode ("mov", "c,%s", AOP (IC_LEFT (ic))->aopu.aop_dir); + if (AOP_TYPE (IC_RESULT (ic)) == AOP_CRY) + { + symbol *lbl = newiTempLabel (NULL); + emitcode ("jnb", "%s,%05d$", AOP (IC_RIGHT (ic))->aopu.aop_dir, (lbl->key + 100)); + emitcode ("cpl", "c"); + emitLabel (lbl); + outBitC (IC_RESULT (ic)); + } + else + { + emitcode ("clr", "a"); + emitcode ("rlc", "a"); + emitcode ("mov", "c,%s", AOP (IC_RIGHT (ic))->aopu.aop_dir); + emitcode ("addc", "a,%s", zero); + outAcc (IC_RESULT (ic)); + } +} + +#if 0 +/* This is the original version of this code. + + * This is being kept around for reference, + * because I am not entirely sure I got it right... + */ +static void +adjustArithmeticResult (iCode * ic) +{ + if (AOP_SIZE (IC_RESULT (ic)) == 3 && + AOP_SIZE (IC_LEFT (ic)) == 3 && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_LEFT (ic)))) + aopPut (IC_RESULT (ic), + aopGet (IC_LEFT (ic)), 2, FALSE, FALSE), + 2); + + if (AOP_SIZE (IC_RESULT (ic)) == 3 && + AOP_SIZE (IC_RIGHT (ic)) == 3 && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_RIGHT (ic)))) + aopPut (IC_RESULT (ic), + aopGet (IC_RIGHT (ic)), 2, FALSE, FALSE), + 2); + + if (AOP_SIZE (IC_RESULT (ic)) == 3 && + AOP_SIZE (IC_LEFT (ic)) < 3 && + AOP_SIZE (IC_RIGHT (ic)) < 3 && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_LEFT (ic))) && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_RIGHT (ic)))) + { + char buffer[5]; + sprintf (buffer, "#%d", pointerTypeToGPByte (pointerCode (getSpec (operandType (IC_LEFT (ic)))), NULL, NULL)); + aopPut (IC_RESULT (ic), buffer, 2); + } +} +#else +/* This is the pure and virtuous version of this code. + * I'm pretty certain it's right, but not enough to toss the old + * code just yet... + */ +static void +adjustArithmeticResult (iCode * ic) +{ + if (opIsGptr (IC_RESULT (ic))) + { + char buffer[10]; + + if (opIsGptr (IC_LEFT (ic))) + { + if (!sameRegs (AOP (IC_RESULT (ic)), AOP (IC_LEFT (ic)))) + { + aopPut (IC_RESULT (ic), + aopGet (IC_LEFT (ic), GPTRSIZE - 1, FALSE, FALSE), + GPTRSIZE - 1); + } + return; + } + + if (opIsGptr (IC_RIGHT (ic))) + { + if (!sameRegs (AOP (IC_RESULT (ic)), AOP (IC_RIGHT (ic)))) + { + aopPut (IC_RESULT (ic), + aopGet (IC_RIGHT (ic), GPTRSIZE - 1, FALSE, FALSE), + GPTRSIZE - 1); + } + return; + } + + if (IC_LEFT (ic) && AOP_SIZE (IC_LEFT (ic)) < GPTRSIZE && + IC_RIGHT (ic) && AOP_SIZE (IC_RIGHT (ic)) < GPTRSIZE && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_LEFT (ic))) && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_RIGHT (ic)))) + { + SNPRINTF (buffer, sizeof(buffer), + "#0x%02x", pointerTypeToGPByte (pointerCode (getSpec (operandType (IC_LEFT (ic)))), NULL, NULL)); + aopPut (IC_RESULT (ic), buffer, GPTRSIZE - 1); + return; + } + if (IC_LEFT (ic) && AOP_SIZE (IC_LEFT (ic)) < GPTRSIZE && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_LEFT (ic)))) + { + SNPRINTF (buffer, sizeof(buffer), + "#0x%02x", pointerTypeToGPByte (pointerCode (getSpec (operandType (IC_LEFT (ic)))), NULL, NULL)); + aopPut (IC_RESULT (ic), buffer, GPTRSIZE - 1); + return; + } + if (IC_RIGHT (ic) && AOP_SIZE (IC_RIGHT (ic)) < GPTRSIZE && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_RIGHT (ic)))) + { + SNPRINTF (buffer, sizeof(buffer), + "#0x%02x", pointerTypeToGPByte (pointerCode (getSpec (operandType (IC_RIGHT (ic)))), NULL, NULL)); + aopPut (IC_RESULT (ic), buffer, GPTRSIZE - 1); + return; + } + } +} +#endif + +/*-----------------------------------------------------------------*/ +/* genPlus - generates code for addition */ +/*-----------------------------------------------------------------*/ +static void +genPlus (iCode * ic) +{ + int size, offset = 0; + int skip_bytes = 0; + char *add = "add"; + bool swappedLR = FALSE; + operand *leftOp, *rightOp; + operand * op; + + D (emitcode (";", "genPlus")); + + /* special cases :- */ + + aopOp (IC_LEFT (ic), ic, FALSE); + aopOp (IC_RIGHT (ic), ic, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE); + + /* if literal, literal on the right or + if left requires ACC or right is already + in ACC */ + if ((AOP_TYPE (IC_LEFT (ic)) == AOP_LIT) || + (AOP_NEEDSACC (IC_LEFT (ic))) || + AOP_TYPE (IC_RIGHT (ic)) == AOP_ACC) + { + operand *t = IC_RIGHT (ic); + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = t; + swappedLR = TRUE; + } + + /* if both left & right are in bit + space */ + if (AOP_TYPE (IC_LEFT (ic)) == AOP_CRY && + AOP_TYPE (IC_RIGHT (ic)) == AOP_CRY) + { + genPlusBits (ic); + goto release; + } + + /* if left in bit space & right literal */ + if (AOP_TYPE (IC_LEFT (ic)) == AOP_CRY && + AOP_TYPE (IC_RIGHT (ic)) == AOP_LIT) + { + emitcode ("mov", "c,%s", AOP (IC_LEFT (ic))->aopu.aop_dir); + /* if result in bit space */ + if (AOP_TYPE (IC_RESULT (ic)) == AOP_CRY) + { + if (ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit) != 0L) + emitcode ("cpl", "c"); + outBitC (IC_RESULT (ic)); + } + else + { + size = getDataSize (IC_RESULT (ic)); + while (size--) + { + MOVA (aopGet (IC_RIGHT (ic), offset, FALSE, FALSE)); + emitcode ("addc", "a,%s", zero); + aopPut (IC_RESULT (ic), "a", offset++); + } + } + goto release; + } + + /* if I can do an increment instead + of add then GOOD for ME */ + if (genPlusIncr (ic) == TRUE) + goto release; + + size = getDataSize (IC_RESULT (ic)); + leftOp = IC_LEFT(ic); + rightOp = IC_RIGHT(ic); + op = IC_LEFT(ic); + + /* if this is an add for an array access + at a 256 byte boundary */ + if ( 2 == size + && AOP_TYPE (op) == AOP_IMMD + && IS_SYMOP (op) + && IS_SPEC (OP_SYM_ETYPE (op)) + && SPEC_ABSA (OP_SYM_ETYPE (op)) + && (SPEC_ADDR (OP_SYM_ETYPE (op)) & 0xff) == 0 + ) + { + D(emitcode (";", "genPlus aligned array")); + aopPut (IC_RESULT (ic), + aopGet (rightOp, 0, FALSE, FALSE), + 0); + + if( 1 == getDataSize (IC_RIGHT (ic)) ) + { + aopPut (IC_RESULT (ic), + aopGet (leftOp, 1, FALSE, FALSE), + 1); + } + else + { + MOVA (aopGet (IC_LEFT (ic), 1, FALSE, FALSE)); + emitcode ("add", "a,%s", aopGet (rightOp, 1, FALSE, FALSE)); + aopPut (IC_RESULT (ic), "a", 1); + } + goto release; + } + + /* if the lower bytes of a literal are zero skip the addition */ + if (AOP_TYPE (IC_RIGHT (ic)) == AOP_LIT ) + { + while ((0 == ((unsigned int) ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit) & (0xff << skip_bytes*8))) && + (skip_bytes+1 < size)) + { + skip_bytes++; + } + if (skip_bytes) + D(emitcode (";", "genPlus shortcut")); + } + + while (size--) + { + if( offset >= skip_bytes ) + { + if (aopGetUsesAcc (leftOp, offset) && aopGetUsesAcc (rightOp, offset)) + { + bool pushedB; + MOVA (aopGet (leftOp, offset, FALSE, TRUE)); + pushedB = pushB (); + emitcode("xch", "a,b"); + MOVA (aopGet (rightOp, offset, FALSE, TRUE)); + emitcode (add, "a,b"); + popB (pushedB); + } + else if (aopGetUsesAcc (leftOp, offset)) + { + MOVA (aopGet (leftOp, offset, FALSE, TRUE)); + emitcode (add, "a,%s", aopGet (rightOp, offset, FALSE, TRUE)); + } + else + { + MOVA (aopGet (rightOp, offset, FALSE, TRUE)); + emitcode (add, "a,%s", aopGet (leftOp, offset, FALSE, TRUE)); + } + aopPut (IC_RESULT (ic), "a", offset); + add = "addc"; /* further adds must propagate carry */ + } + else + { + if( !sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic))) || + isOperandVolatile (IC_RESULT (ic), FALSE)) + { + /* just move */ + aopPut (IC_RESULT (ic), + aopGet (leftOp, offset, FALSE, FALSE), + offset); + } + } + offset++; + } + + adjustArithmeticResult (ic); + +release: + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + if (!swappedLR) + { + freeAsmop (IC_RIGHT (ic), NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (IC_LEFT (ic), NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + } + else + { + freeAsmop (IC_LEFT (ic), NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (IC_RIGHT (ic), NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + } +} + +/*-----------------------------------------------------------------*/ +/* genMinusDec :- does subtraction with decrement if possible */ +/*-----------------------------------------------------------------*/ +static bool +genMinusDec (iCode * ic) +{ + unsigned int icount; + unsigned int size = getDataSize (IC_RESULT (ic)); + + /* will try to generate an increment */ + /* if the right side is not a literal + we cannot */ + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) + return FALSE; + + /* if the literal value of the right hand side + is greater than 4 then it is not worth it */ + if ((icount = (unsigned int) ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit)) > 4) + return FALSE; + + D (emitcode (";", "genMinusDec")); + + /* if decrement >=16 bits in register or direct space */ + if (( AOP_TYPE(IC_LEFT(ic)) == AOP_REG || + AOP_TYPE(IC_LEFT(ic)) == AOP_DIR || + (IS_AOP_PREG (IC_LEFT(ic)) && !AOP_NEEDSACC (IC_LEFT(ic))) ) && + sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic))) && + (size > 1) && + (icount == 1)) + { + symbol *tlbl; + int emitTlbl; + int labelRange; + char *l; + + /* If the next instruction is a goto and the goto target + * is <= 10 instructions previous to this, we can generate + * jumps straight to that target. + */ + if (ic->next && ic->next->op == GOTO + && (labelRange = findLabelBackwards (ic, IC_LABEL (ic->next)->key)) != 0 + && labelRange <= 10) + { + D (emitcode (";", "tail decrement optimized (range %d)", labelRange)); + tlbl = IC_LABEL (ic->next); + emitTlbl = 0; + } + else + { + tlbl = newiTempLabel (NULL); + emitTlbl = 1; + } + + l = aopGet (IC_RESULT (ic), LSB, FALSE, FALSE); + emitcode ("dec", "%s", l); + + if (AOP_TYPE (IC_RESULT (ic)) == AOP_REG || + IS_AOP_PREG (IC_RESULT (ic))) + { + emitcode ("cjne", "%s,#0xff,%05d$", l, tlbl->key + 100); + } + else + { + emitcode ("mov", "a,#0xff"); + emitcode ("cjne", "a,%s,%05d$", l, tlbl->key + 100); + } + l = aopGet (IC_RESULT (ic), MSB16, FALSE, FALSE); + emitcode ("dec", "%s", l); + if (size > 2) + { + if (!strcmp(l, "acc")) + { + emitcode("jnz", "!tlabel", tlbl->key + 100); + } + else if (AOP_TYPE (IC_RESULT (ic)) == AOP_REG || + IS_AOP_PREG (IC_RESULT (ic))) + { + emitcode ("cjne", "%s,#0xff,%05d$", l, tlbl->key + 100); + } + else + { + emitcode ("cjne", "a,%s,%05d$", l, tlbl->key + 100); + } + l = aopGet (IC_RESULT (ic), MSB24, FALSE, FALSE); + emitcode ("dec", "%s", l); + } + if (size > 3) + { + if (!strcmp(l, "acc")) + { + emitcode("jnz", "!tlabel", tlbl->key + 100); + } + else if (AOP_TYPE (IC_RESULT (ic)) == AOP_REG || + IS_AOP_PREG (IC_RESULT (ic))) + { + emitcode ("cjne", "%s,#0xff,%05d$", l, tlbl->key + 100); + } + else + { + emitcode ("cjne", "a,%s,%05d$", l, tlbl->key + 100); + } + l = aopGet (IC_RESULT (ic), MSB32, FALSE, FALSE); + emitcode ("dec", "%s", l); + } + if (emitTlbl) + { + emitLabel (tlbl); + } + return TRUE; + } + + /* if the sizes are greater than 1 then we cannot */ + if (AOP_SIZE (IC_RESULT (ic)) > 1 || + AOP_SIZE (IC_LEFT (ic)) > 1) + return FALSE; + + /* we can if the aops of the left & result match or + if they are in registers and the registers are the + same */ + if (sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic)))) + { + char *l; + + if (aopGetUsesAcc (IC_LEFT (ic), 0)) + { + MOVA (aopGet (IC_RESULT (ic), 0, FALSE, FALSE)); + l = "a"; + } + else + { + l = aopGet (IC_RESULT (ic), 0, FALSE, FALSE); + } + + while (icount--) + { + emitcode ("dec", "%s", l); + } + + if (AOP_NEEDSACC (IC_RESULT (ic))) + aopPut (IC_RESULT (ic), "a", 0); + + return TRUE; + } + + if (icount == 1) + { + MOVA (aopGet (IC_LEFT (ic), 0, FALSE, FALSE)); + emitcode ("dec", "a"); + aopPut (IC_RESULT (ic), "a", 0); + return TRUE; + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* addSign - complete with sign */ +/*-----------------------------------------------------------------*/ +static void +addSign (operand * result, int offset, int sign) +{ + int size = (getDataSize (result) - offset); + if (size > 0) + { + if (sign) + { + emitcode ("rlc", "a"); + emitcode ("subb", "a,acc"); + while (size--) + { + aopPut (result, "a", offset++); + } + } + else + { + while (size--) + { + aopPut (result, zero, offset++); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* genMinusBits - generates code for subtraction of two bits */ +/*-----------------------------------------------------------------*/ +static void +genMinusBits (iCode * ic) +{ + symbol *lbl = newiTempLabel (NULL); + + D (emitcode (";", "genMinusBits")); + + if (AOP_TYPE (IC_RESULT (ic)) == AOP_CRY) + { + emitcode ("mov", "c,%s", AOP (IC_LEFT (ic))->aopu.aop_dir); + emitcode ("jnb", "%s,%05d$", AOP (IC_RIGHT (ic))->aopu.aop_dir, (lbl->key + 100)); + emitcode ("cpl", "c"); + emitLabel (lbl); + outBitC (IC_RESULT (ic)); + } + else + { + emitcode ("mov", "c,%s", AOP (IC_RIGHT (ic))->aopu.aop_dir); + emitcode ("subb", "a,acc"); + emitcode ("jnb", "%s,%05d$", AOP (IC_LEFT (ic))->aopu.aop_dir, (lbl->key + 100)); + emitcode ("inc", "a"); + emitLabel (lbl); + aopPut (IC_RESULT (ic), "a", 0); + addSign (IC_RESULT (ic), MSB16, SPEC_USIGN (getSpec (operandType (IC_RESULT (ic))))); + } +} + +/*-----------------------------------------------------------------*/ +/* genMinus - generates code for subtraction */ +/*-----------------------------------------------------------------*/ +static void +genMinus (iCode * ic) +{ + int size, offset = 0; + + D (emitcode (";", "genMinus")); + + aopOp (IC_LEFT (ic), ic, FALSE); + aopOp (IC_RIGHT (ic), ic, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE); + + /* special cases :- */ + /* if both left & right are in bit space */ + if (AOP_TYPE (IC_LEFT (ic)) == AOP_CRY && + AOP_TYPE (IC_RIGHT (ic)) == AOP_CRY) + { + genMinusBits (ic); + goto release; + } + + /* if I can do an decrement instead + of subtract then GOOD for ME */ + if (genMinusDec (ic) == TRUE) + goto release; + + size = getDataSize (IC_RESULT (ic)); + + /* if literal, add a,#-lit, else normal subb */ + if (AOP_TYPE (IC_RIGHT (ic)) == AOP_LIT) + { + unsigned long lit = 0L; + bool useCarry = FALSE; + + lit = ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit); + lit = -(long) lit; + + while (size--) + { + if (useCarry || ((lit >> (offset * 8)) & 0x0FFL)) + { + MOVA (aopGet (IC_LEFT (ic), offset, FALSE, FALSE)); + if (!offset && !size && lit== (unsigned long) -1) + { + emitcode ("dec", "a"); + } + else if (!useCarry) + { + /* first add without previous c */ + emitcode ("add", "a,#0x%02x", + (unsigned int) ((lit >> (offset * 8)) & 0x0FFL)); + useCarry = TRUE; + } + else + { + emitcode ("addc", "a,#0x%02x", + (unsigned int) ((lit >> (offset * 8)) & 0x0FFL)); + } + aopPut (IC_RESULT (ic), "a", offset++); + } + else + { + /* no need to add zeroes */ + if (!sameRegs (AOP (IC_RESULT (ic)), AOP (IC_LEFT (ic)))) + { + aopPut (IC_RESULT (ic), aopGet (IC_LEFT (ic), offset, FALSE, FALSE), + offset); + } + offset++; + } + } + } + else + { + operand *leftOp, *rightOp; + + leftOp = IC_LEFT(ic); + rightOp = IC_RIGHT(ic); + + while (size--) + { + if (aopGetUsesAcc(rightOp, offset)) { + if (aopGetUsesAcc(leftOp, offset)) { + bool pushedB; + + MOVA (aopGet (rightOp, offset, FALSE, FALSE)); + pushedB = pushB (); + emitcode ("mov", "b,a"); + if (offset == 0) + CLRC; + MOVA (aopGet (leftOp, offset, FALSE, FALSE)); + emitcode ("subb", "a,b"); + popB (pushedB); + } else { + /* reverse subtraction with 2's complement */ + if (offset == 0) + emitcode( "setb", "c"); + else + emitcode( "cpl", "c"); + wassertl(!aopGetUsesAcc(leftOp, offset), "accumulator clash"); + MOVA (aopGet(rightOp, offset, FALSE, TRUE)); + emitcode("subb", "a,%s", aopGet(leftOp, offset, FALSE, TRUE)); + emitcode("cpl", "a"); + if (size) /* skip if last byte */ + emitcode( "cpl", "c"); + } + } else { + MOVA (aopGet (leftOp, offset, FALSE, FALSE)); + if (offset == 0) + CLRC; + emitcode ("subb", "a,%s", + aopGet(rightOp, offset, FALSE, TRUE)); + } + + aopPut (IC_RESULT (ic), "a", offset++); + } + } + + adjustArithmeticResult (ic); + +release: + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + freeAsmop (IC_RIGHT (ic), NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (IC_LEFT (ic), NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); +} + + +/*-----------------------------------------------------------------*/ +/* genMultbits :- multiplication of bits */ +/*-----------------------------------------------------------------*/ +static void +genMultbits (operand * left, + operand * right, + operand * result) +{ + D (emitcode (";", "genMultbits")); + + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + emitcode ("anl", "c,%s", AOP (right)->aopu.aop_dir); + outBitC (result); +} + +/*-----------------------------------------------------------------*/ +/* genMultOneByte : 8*8=8/16 bit multiplication */ +/*-----------------------------------------------------------------*/ +static void +genMultOneByte (operand * left, + operand * right, + operand * result) +{ + symbol *lbl; + int size = AOP_SIZE (result); + bool runtimeSign, compiletimeSign; + bool lUnsigned, rUnsigned, pushedB; + + D (emitcode (";", "genMultOneByte")); + + if (size < 1 || size > 2) + { + /* this should never happen */ + fprintf (stderr, "size!=1||2 (%d) in %s at line:%d \n", + AOP_SIZE(result), __FILE__, lineno); + exit (1); + } + + /* (if two literals: the value is computed before) */ + /* if one literal, literal on the right */ + if (AOP_TYPE (left) == AOP_LIT) + { + operand *t = right; + right = left; + left = t; + /* emitcode (";", "swapped left and right"); */ + } + /* if no literal, unsigned on the right: shorter code */ + if ( AOP_TYPE (right) != AOP_LIT + && SPEC_USIGN (getSpec (operandType (left)))) + { + operand *t = right; + right = left; + left = t; + } + + lUnsigned = SPEC_USIGN (getSpec (operandType (left))); + rUnsigned = SPEC_USIGN (getSpec (operandType (right))); + + pushedB = pushB (); + + if (size == 1 /* no, this is not a bug; with a 1 byte result there's + no need to take care about the signedness! */ + || (lUnsigned && rUnsigned)) + { + /* just an unsigned 8 * 8 = 8 multiply + or 8u * 8u = 16u */ + /* emitcode (";","unsigned"); */ + /* TODO: check for accumulator clash between left & right aops? */ + + if (AOP_TYPE (right) == AOP_LIT) + { + /* moving to accumulator first helps peepholes */ + MOVA (aopGet (left, 0, FALSE, FALSE)); + MOVB (aopGet (right, 0, FALSE, FALSE)); + } + else + { + emitcode ("mov", "b,%s", aopGet (right, 0, FALSE, FALSE)); + MOVA (aopGet (left, 0, FALSE, FALSE)); + } + + emitcode ("mul", "ab"); + aopPut (result, "a", 0); + if (size == 2) + aopPut (result, "b", 1); + + popB (pushedB); + return; + } + + /* we have to do a signed multiply */ + /* emitcode (";", "signed"); */ + + /* now sign adjust for both left & right */ + + /* let's see what's needed: */ + /* apply negative sign during runtime */ + runtimeSign = FALSE; + /* negative sign from literals */ + compiletimeSign = FALSE; + + if (!lUnsigned) + { + if (AOP_TYPE(left) == AOP_LIT) + { + /* signed literal */ + signed char val = (char) ulFromVal (AOP (left)->aopu.aop_lit); + if (val < 0) + compiletimeSign = TRUE; + } + else + /* signed but not literal */ + runtimeSign = TRUE; + } + + if (!rUnsigned) + { + if (AOP_TYPE(right) == AOP_LIT) + { + /* signed literal */ + signed char val = (char) ulFromVal (AOP (right)->aopu.aop_lit); + if (val < 0) + compiletimeSign ^= TRUE; + } + else + /* signed but not literal */ + runtimeSign = TRUE; + } + + /* initialize F0, which stores the runtime sign */ + if (runtimeSign) + { + if (compiletimeSign) + emitcode ("setb", "F0"); /* set sign flag */ + else + emitcode ("clr", "F0"); /* reset sign flag */ + } + + /* save the signs of the operands */ + if (AOP_TYPE(right) == AOP_LIT) + { + signed char val = (char) ulFromVal (AOP (right)->aopu.aop_lit); + + if (!rUnsigned && val < 0) + emitcode ("mov", "b,#0x%02x", -val); + else + emitcode ("mov", "b,#0x%02x", (unsigned char) val); + } + else /* ! literal */ + { + if (rUnsigned) /* emitcode (";", "signed"); */ + emitcode ("mov", "b,%s", aopGet (right, 0, FALSE, FALSE)); + else + { + MOVA (aopGet (right, 0, FALSE, FALSE)); + lbl = newiTempLabel (NULL); + emitcode ("jnb", "acc.7,%05d$", (lbl->key + 100)); + emitcode ("cpl", "F0"); /* complement sign flag */ + emitcode ("cpl", "a"); /* 2's complement */ + emitcode ("inc", "a"); + emitLabel (lbl); + emitcode ("mov", "b,a"); + } + } + + if (AOP_TYPE(left) == AOP_LIT) + { + signed char val = (char) ulFromVal (AOP (left)->aopu.aop_lit); + + if (!lUnsigned && val < 0) + emitcode ("mov", "a,#0x%02x", -val); + else + emitcode ("mov", "a,#0x%02x", (unsigned char) val); + } + else /* ! literal */ + { + MOVA (aopGet (left, 0, FALSE, FALSE)); + + if (!lUnsigned) + { + lbl = newiTempLabel (NULL); + emitcode ("jnb", "acc.7,%05d$", (lbl->key + 100)); + emitcode ("cpl", "F0"); /* complement sign flag */ + emitcode ("cpl", "a"); /* 2's complement */ + emitcode ("inc", "a"); + emitLabel (lbl); + } + } + + /* now the multiplication */ + emitcode ("mul", "ab"); + if (runtimeSign || compiletimeSign) + { + lbl = newiTempLabel (NULL); + if (runtimeSign) + emitcode ("jnb", "F0,%05d$", (lbl->key + 100)); + emitcode ("cpl", "a"); /* lsb 2's complement */ + if (size != 2) + emitcode ("inc", "a"); /* inc doesn't set carry flag */ + else + { + emitcode ("add", "a,#0x01"); /* this sets carry flag */ + emitcode ("xch", "a,b"); + emitcode ("cpl", "a"); /* msb 2's complement */ + emitcode ("addc", "a,#0x00"); + emitcode ("xch", "a,b"); + } + emitLabel (lbl); + } + aopPut (result, "a", 0); + if (size == 2) + aopPut (result, "b", 1); + + popB (pushedB); +} + +/*-----------------------------------------------------------------*/ +/* genMult - generates code for multiplication */ +/*-----------------------------------------------------------------*/ +static void +genMult (iCode * ic) +{ + operand *left = IC_LEFT (ic); + operand *right = IC_RIGHT (ic); + operand *result = IC_RESULT (ic); + + D (emitcode (";", "genMult")); + + /* assign the asmops */ + aopOp (left, ic, FALSE); + aopOp (right, ic, FALSE); + aopOp (result, ic, TRUE); + + /* special cases first */ + /* both are bits */ + if (AOP_TYPE (left) == AOP_CRY && + AOP_TYPE (right) == AOP_CRY) + { + genMultbits (left, right, result); + goto release; + } + + /* if both are of size == 1 */ +#if 0 // one of them can be a sloc shared with the result + if (AOP_SIZE (left) == 1 && AOP_SIZE (right) == 1) +#else + if (getSize(operandType(left)) == 1 && + getSize(operandType(right)) == 1) +#endif + { + genMultOneByte (left, right, result); + goto release; + } + + /* should have been converted to function call */ + fprintf (stderr, "left: %d right: %d\n", getSize(OP_SYMBOL(left)->type), + getSize(OP_SYMBOL(right)->type)); + assert (0); + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); +} + +/*-----------------------------------------------------------------*/ +/* genDivbits :- division of bits */ +/*-----------------------------------------------------------------*/ +static void +genDivbits (operand * left, + operand * right, + operand * result) +{ + char *l; + bool pushedB; + + D(emitcode (";", "genDivbits")); + + pushedB = pushB (); + + /* the result must be bit */ + emitcode ("mov", "b,%s", aopGet (right, 0, FALSE, FALSE)); + l = aopGet (left, 0, FALSE, FALSE); + + MOVA (l); + + emitcode ("div", "ab"); + emitcode ("rrc", "a"); + + popB (pushedB); + + aopPut (result, "c", 0); +} + +/*-----------------------------------------------------------------*/ +/* genDivOneByte : 8 bit division */ +/*-----------------------------------------------------------------*/ +static void +genDivOneByte (operand * left, + operand * right, + operand * result) +{ + bool lUnsigned, rUnsigned, pushedB; + bool runtimeSign, compiletimeSign; + bool accuse = FALSE; + bool pushedA = FALSE; + symbol *lbl; + int size, offset; + + D(emitcode (";", "genDivOneByte")); + + /* Why is it necessary that genDivOneByte() can return an int result? + Have a look at: + + volatile unsigned char uc; + volatile signed char sc1, sc2; + volatile int i; + + uc = 255; + sc1 = -1; + i = uc / sc1; + + Or: + + sc1 = -128; + sc2 = -1; + i = sc1 / sc2; + + In all cases a one byte result would overflow, the following cast to int + would return the wrong result. + + Two possible solution: + a) cast operands to int, if ((unsigned) / (signed)) or + ((signed) / (signed)) + b) return an 16 bit signed int; this is what we're doing here! + */ + + size = AOP_SIZE (result) - 1; + offset = 1; + lUnsigned = SPEC_USIGN (getSpec (operandType (left))); + rUnsigned = SPEC_USIGN (getSpec (operandType (right))); + + pushedB = pushB (); + + /* signed or unsigned */ + if (lUnsigned && rUnsigned) + { + /* unsigned is easy */ + MOVB (aopGet (right, 0, FALSE, FALSE)); + MOVA (aopGet (left, 0, FALSE, FALSE)); + emitcode ("div", "ab"); + aopPut (result, "a", 0); + while (size--) + aopPut (result, zero, offset++); + + popB (pushedB); + return; + } + + /* signed is a little bit more difficult */ + + /* now sign adjust for both left & right */ + + /* let's see what's needed: */ + /* apply negative sign during runtime */ + runtimeSign = FALSE; + /* negative sign from literals */ + compiletimeSign = FALSE; + + if (!lUnsigned) + { + if (AOP_TYPE(left) == AOP_LIT) + { + /* signed literal */ + signed char val = (char) ulFromVal (AOP (left)->aopu.aop_lit); + if (val < 0) + compiletimeSign = TRUE; + } + else + /* signed but not literal */ + runtimeSign = TRUE; + } + + if (!rUnsigned) + { + if (AOP_TYPE(right) == AOP_LIT) + { + /* signed literal */ + signed char val = (char) ulFromVal (AOP (right)->aopu.aop_lit); + if (val < 0) + compiletimeSign ^= TRUE; + } + else + /* signed but not literal */ + runtimeSign = TRUE; + } + + /* initialize F0, which stores the runtime sign */ + if (runtimeSign) + { + if (compiletimeSign) + emitcode ("setb", "F0"); /* set sign flag */ + else + emitcode ("clr", "F0"); /* reset sign flag */ + } + + /* save the signs of the operands */ + if (AOP_TYPE(right) == AOP_LIT) + { + signed char val = (char) ulFromVal (AOP (right)->aopu.aop_lit); + + if (!rUnsigned && val < 0) + emitcode ("mov", "b,#0x%02x", -val); + else + emitcode ("mov", "b,#0x%02x", (unsigned char) val); + } + else /* ! literal */ + { + if (rUnsigned) + emitcode ("mov", "b,%s", aopGet (right, 0, FALSE, FALSE)); + else + { + MOVA (aopGet (right, 0, FALSE, FALSE)); + lbl = newiTempLabel (NULL); + emitcode ("jnb", "acc.7,%05d$", (lbl->key + 100)); + emitcode ("cpl", "F0"); /* complement sign flag */ + emitcode ("cpl", "a"); /* 2's complement */ + emitcode ("inc", "a"); + emitLabel (lbl); + emitcode ("mov", "b,a"); + } + } + + if (AOP_TYPE(left) == AOP_LIT) + { + signed char val = (char) ulFromVal (AOP (left)->aopu.aop_lit); + + if (!lUnsigned && val < 0) + emitcode ("mov", "a,#0x%02x", -val); + else + emitcode ("mov", "a,#0x%02x", (unsigned char) val); + } + else /* ! literal */ + { + MOVA (aopGet (left, 0, FALSE, FALSE)); + + if (!lUnsigned) + { + lbl = newiTempLabel (NULL); + emitcode ("jnb", "acc.7,%05d$", (lbl->key + 100)); + emitcode ("cpl", "F0"); /* complement sign flag */ + emitcode ("cpl", "a"); /* 2's complement */ + emitcode ("inc", "a"); + emitLabel (lbl); + } + } + + /* now the division */ + emitcode ("div", "ab"); + + if (runtimeSign || compiletimeSign) + { + lbl = newiTempLabel (NULL); + if (runtimeSign) + emitcode ("jnb", "F0,%05d$", (lbl->key + 100)); + emitcode ("cpl", "a"); /* lsb 2's complement */ + emitcode ("inc", "a"); + emitLabel (lbl); + + accuse = aopPut (result, "a", 0); + if (size > 0) + { + /* msb is 0x00 or 0xff depending on the sign */ + if (runtimeSign) + { + if (accuse) + { + emitcode ("push", "acc"); + pushedA = TRUE; + } + emitcode ("mov", "c,F0"); + emitcode ("subb", "a,acc"); + while (size--) + aopPut (result, "a", offset++); + } + else /* compiletimeSign */ + { + if (aopPutUsesAcc (result, "#0xff", offset)) + { + emitcode ("push", "acc"); + pushedA = TRUE; + } + while (size--) + aopPut (result, "#0xff", offset++); + } + } + } + else + { + aopPut (result, "a", 0); + while (size--) + aopPut (result, zero, offset++); + } + + if (pushedA) + emitcode ("pop", "acc"); + popB (pushedB); +} + +/*-----------------------------------------------------------------*/ +/* genDiv - generates code for division */ +/*-----------------------------------------------------------------*/ +static void +genDiv (iCode * ic) +{ + operand *left = IC_LEFT (ic); + operand *right = IC_RIGHT (ic); + operand *result = IC_RESULT (ic); + + D (emitcode (";", "genDiv")); + + /* assign the asmops */ + aopOp (left, ic, FALSE); + aopOp (right, ic, FALSE); + aopOp (result, ic, TRUE); + + /* special cases first */ + /* both are bits */ + if (AOP_TYPE (left) == AOP_CRY && + AOP_TYPE (right) == AOP_CRY) + { + genDivbits (left, right, result); + goto release; + } + + /* if both are of size == 1 */ + if (AOP_SIZE (left) == 1 && + AOP_SIZE (right) == 1) + { + genDivOneByte (left, right, result); + goto release; + } + + /* should have been converted to function call */ + assert (0); +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); +} + +/*-----------------------------------------------------------------*/ +/* genModbits :- modulus of bits */ +/*-----------------------------------------------------------------*/ +static void +genModbits (operand * left, + operand * right, + operand * result) +{ + char *l; + bool pushedB; + + D (emitcode (";", "genModbits")); + + pushedB = pushB (); + + /* the result must be bit */ + emitcode ("mov", "b,%s", aopGet (right, 0, FALSE, FALSE)); + l = aopGet (left, 0, FALSE, FALSE); + + MOVA (l); + + emitcode ("div", "ab"); + emitcode ("mov", "a,b"); + emitcode ("rrc", "a"); + + popB (pushedB); + + aopPut (result, "c", 0); +} + +/*-----------------------------------------------------------------*/ +/* genModOneByte : 8 bit modulus */ +/*-----------------------------------------------------------------*/ +static void +genModOneByte (operand * left, + operand * right, + operand * result) +{ + bool lUnsigned, rUnsigned, pushedB; + bool runtimeSign, compiletimeSign; + symbol *lbl; + int size, offset; + + D (emitcode (";", "genModOneByte")); + + size = AOP_SIZE (result) - 1; + offset = 1; + lUnsigned = SPEC_USIGN (getSpec (operandType (left))); + rUnsigned = SPEC_USIGN (getSpec (operandType (right))); + + /* if right is a literal, check it for 2^n */ + if (AOP_TYPE(right) == AOP_LIT) + { + unsigned char val = abs((int) operandLitValue(right)); + symbol *lbl2 = NULL; + + switch (val) + { + case 1: /* sometimes it makes sense (on tricky code and hardware)... */ + case 2: + case 4: + case 8: + case 16: + case 32: + case 64: + case 128: + if (lUnsigned) + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "modulus of unsigned char by 2^n literal shouldn't be processed here"); + /* because iCode should have been changed to genAnd */ + /* see file "SDCCopt.c", function "convertToFcall()" */ + + MOVA (aopGet (left, 0, FALSE, FALSE)); + emitcode ("mov", "c,acc.7"); + emitcode ("anl", "a,#0x%02x", val - 1); + lbl = newiTempLabel (NULL); + emitcode ("jz", "%05d$", (lbl->key + 100)); + emitcode ("jnc", "%05d$", (lbl->key + 100)); + emitcode ("orl", "a,#0x%02x", 0xff ^ (val - 1)); + if (size) + { + int size2 = size; + int offs2 = offset; + + aopPut (result, "a", 0); + while (size2--) + aopPut (result, "#0xff", offs2++); + lbl2 = newiTempLabel (NULL); + emitcode ("sjmp", "%05d$", (lbl2->key + 100)); + } + emitLabel (lbl); + aopPut (result, "a", 0); + while (size--) + aopPut (result, zero, offset++); + if (lbl2) + { + emitLabel (lbl2); + } + return; + + default: + break; + } + } + + pushedB = pushB (); + + /* signed or unsigned */ + if (lUnsigned && rUnsigned) + { + /* unsigned is easy */ + MOVB (aopGet (right, 0, FALSE, FALSE)); + MOVA (aopGet (left, 0, FALSE, FALSE)); + emitcode ("div", "ab"); + aopPut (result, "b", 0); + while (size--) + aopPut (result, zero, offset++); + + popB (pushedB); + return; + } + + /* signed is a little bit more difficult */ + + /* now sign adjust for both left & right */ + + /* modulus: sign of the right operand has no influence on the result! */ + if (AOP_TYPE(right) == AOP_LIT) + { + signed char val = (char) operandLitValue(right); + + if (!rUnsigned && val < 0) + emitcode ("mov", "b,#0x%02x", -val); + else + emitcode ("mov", "b,#0x%02x", (unsigned char) val); + } + else /* not literal */ + { + if (rUnsigned) + emitcode ("mov", "b,%s", aopGet (right, 0, FALSE, FALSE)); + else + { + MOVA (aopGet (right, 0, FALSE, FALSE)); + lbl = newiTempLabel (NULL); + emitcode ("jnb", "acc.7,%05d$", (lbl->key + 100)); + emitcode ("cpl", "a"); /* 2's complement */ + emitcode ("inc", "a"); + emitLabel (lbl); + emitcode ("mov", "b,a"); + } + } + + /* let's see what's needed: */ + /* apply negative sign during runtime */ + runtimeSign = FALSE; + /* negative sign from literals */ + compiletimeSign = FALSE; + + /* sign adjust left side */ + if (AOP_TYPE(left) == AOP_LIT) + { + signed char val = (char) ulFromVal (AOP (left)->aopu.aop_lit); + + if (!lUnsigned && val < 0) + { + compiletimeSign = TRUE; /* set sign flag */ + emitcode ("mov", "a,#0x%02x", -val); + } + else + emitcode ("mov", "a,#0x%02x", (unsigned char) val); + } + else /* ! literal */ + { + MOVA (aopGet (left, 0, FALSE, FALSE)); + + if (!lUnsigned) + { + runtimeSign = TRUE; + emitcode ("clr", "F0"); /* clear sign flag */ + + lbl = newiTempLabel (NULL); + emitcode ("jnb", "acc.7,%05d$", (lbl->key + 100)); + emitcode ("setb", "F0"); /* set sign flag */ + emitcode ("cpl", "a"); /* 2's complement */ + emitcode ("inc", "a"); + emitLabel (lbl); + } + } + + /* now the modulus */ + emitcode ("div", "ab"); + + if (runtimeSign || compiletimeSign) + { + emitcode ("mov", "a,b"); + lbl = newiTempLabel (NULL); + if (runtimeSign) + emitcode ("jnb", "F0,%05d$", (lbl->key + 100)); + emitcode ("cpl", "a"); /* 2's complement */ + emitcode ("inc", "a"); + emitLabel (lbl); + + aopPut (result, "a", 0); + if (size > 0) + { + /* msb is 0x00 or 0xff depending on the sign */ + if (runtimeSign) + { + emitcode ("mov", "c,F0"); + emitcode ("subb", "a,acc"); + while (size--) + aopPut (result, "a", offset++); + } + else /* compiletimeSign */ + while (size--) + aopPut (result, "#0xff", offset++); + } + } + else + { + aopPut (result, "b", 0); + while (size--) + aopPut (result, zero, offset++); + } + + popB (pushedB); +} + +/*-----------------------------------------------------------------*/ +/* genMod - generates code for division */ +/*-----------------------------------------------------------------*/ +static void +genMod (iCode * ic) +{ + operand *left = IC_LEFT (ic); + operand *right = IC_RIGHT (ic); + operand *result = IC_RESULT (ic); + + D (emitcode (";", "genMod")); + + /* assign the asmops */ + aopOp (left, ic, FALSE); + aopOp (right, ic, FALSE); + aopOp (result, ic, TRUE); + + /* special cases first */ + /* both are bits */ + if (AOP_TYPE (left) == AOP_CRY && + AOP_TYPE (right) == AOP_CRY) + { + genModbits (left, right, result); + goto release; + } + + /* if both are of size == 1 */ + if (AOP_SIZE (left) == 1 && + AOP_SIZE (right) == 1) + { + genModOneByte (left, right, result); + goto release; + } + + /* should have been converted to function call */ + assert (0); + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); +} + +/*-----------------------------------------------------------------*/ +/* genIfxJump :- will create a jump depending on the ifx */ +/*-----------------------------------------------------------------*/ +static void +genIfxJump (iCode * ic, char *jval, operand *left, operand *right, operand *result, iCode *popIc) +{ + symbol *jlbl; + symbol *tlbl = newiTempLabel (NULL); + char *inst; + + /* if there is something to be popped then do it first */ + popForBranch (popIc, TRUE); + + D (emitcode (";", "genIfxJump")); + + /* if true label then we jump if condition + supplied is true */ + if (IC_TRUE (ic)) + { + jlbl = IC_TRUE (ic); + inst = ((strcmp (jval, "a") == 0 ? "jz" : + (strcmp (jval, "c") == 0 ? "jnc" : "jnb"))); + } + else + { + /* false label is present */ + jlbl = IC_FALSE (ic); + inst = ((strcmp (jval, "a") == 0 ? "jnz" : + (strcmp (jval, "c") == 0 ? "jc" : "jb"))); + } + if (strcmp (inst, "jb") == 0 || strcmp (inst, "jnb") == 0) + emitcode (inst, "%s,%05d$", jval, (tlbl->key + 100)); + else + emitcode (inst, "%05d$", tlbl->key + 100); + freeForBranchAsmop (result); + freeForBranchAsmop (right); + freeForBranchAsmop (left); + emitcode ("ljmp", "%05d$", jlbl->key + 100); + emitLabel (tlbl); + + /* mark the icode as generated */ + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genCmp :- greater or less than comparison */ +/*-----------------------------------------------------------------*/ +static void +genCmp (operand * left, operand * right, + operand * result, iCode * ifx, int sign, iCode *ic) +{ + int size, offset = 0; + unsigned long lit = 0L; + bool rightInB; + + D (emitcode (";", "genCmp")); + + /* if left & right are bit variables */ + if (AOP_TYPE (left) == AOP_CRY && + AOP_TYPE (right) == AOP_CRY) + { + emitcode ("mov", "c,%s", AOP (right)->aopu.aop_dir); + emitcode ("anl", "c,%s", AOP (left)->aopu.aop_dir); + } + else + { + /* subtract right from left if at the + end the carry flag is set then we know that + left is greater than right */ + size = max (AOP_SIZE (left), AOP_SIZE (right)); + + /* if unsigned char cmp with lit, do cjne left,#right,zz */ + if ((size == 1) && !sign && + (AOP_TYPE (right) == AOP_LIT && AOP_TYPE (left) != AOP_DIR)) + { + symbol *lbl = newiTempLabel (NULL); + emitcode ("cjne", "%s,%s,%05d$", + aopGet (left, offset, FALSE, FALSE), + aopGet (right, offset, FALSE, FALSE), + lbl->key + 100); + emitLabel (lbl); + } + else + { + if (AOP_TYPE (right) == AOP_LIT) + { + lit = ulFromVal (AOP (right)->aopu.aop_lit); + /* optimize if(x < 0) or if(x >= 0) */ + if (lit == 0L) + { + if (!sign) + { + CLRC; + } + else + { + MOVA (aopGet (left, AOP_SIZE (left) - 1, FALSE, FALSE)); + if (!(AOP_TYPE (result) == AOP_CRY && AOP_SIZE (result)) && ifx) + { + genIfxJump (ifx, "acc.7", left, right, result, ic->next); + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); + + return; + } + else + { + emitcode ("rlc", "a"); + } + } + goto release; + } + else + {//nonzero literal + int bytelit = ((lit >> (offset * 8)) & 0x0FFL); + while (size && (bytelit == 0)) + { + offset++; + bytelit = ((lit >> (offset * 8)) & 0x0FFL); + size--; + } + CLRC; + while (size--) + { + MOVA (aopGet (left, offset, FALSE, FALSE)); + if (sign && size == 0) + { + emitcode ("xrl", "a,#0x80"); + emitcode ("subb", "a,#0x%02x", + 0x80 ^ (unsigned int) ((lit >> (offset * 8)) & 0x0FFL)); + } + else + { + emitcode ("subb", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + offset++; + } + goto release; + } + } + CLRC; + while (size--) + { + bool pushedB = FALSE; + rightInB = aopGetUsesAcc(right, offset); + if (rightInB) + { + pushedB = pushB (); + emitcode ("mov", "b,%s", aopGet (right, offset, FALSE, FALSE)); + } + MOVA (aopGet (left, offset, FALSE, FALSE)); + if (sign && size == 0) + { + emitcode ("xrl", "a,#0x80"); + if (!rightInB) + { + pushedB = pushB (); + rightInB++; + MOVB (aopGet (right, offset, FALSE, FALSE)); + } + emitcode ("xrl", "b,#0x80"); + emitcode ("subb", "a,b"); + } + else + { + if (rightInB) + emitcode ("subb", "a,b"); + else + emitcode ("subb", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + if (rightInB) + popB (pushedB); + offset++; + } + } + } + +release: + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + if (AOP_TYPE (result) == AOP_CRY && AOP_SIZE (result)) + { + outBitC (result); + } + else + { + /* if the result is used in the next + ifx conditional branch then generate + code a little differently */ + if (ifx) + { + genIfxJump (ifx, "c", NULL, NULL, result, ic->next); + } + else + { + outBitC (result); + } + /* leave the result in acc */ + } +} + +/*-----------------------------------------------------------------*/ +/* genCmpGt :- greater than comparison */ +/*-----------------------------------------------------------------*/ +static void +genCmpGt (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + sym_link *letype, *retype; + int sign; + + D (emitcode (";", "genCmpGt")); + + left = IC_LEFT (ic); + right = IC_RIGHT (ic); + result = IC_RESULT (ic); + + letype = getSpec (operandType (left)); + retype = getSpec (operandType (right)); + sign = !((SPEC_USIGN (letype) && !(IS_CHAR (letype) && IS_LITERAL (letype))) || + (SPEC_USIGN (retype) && !(IS_CHAR (retype) && IS_LITERAL (retype)))); + /* assign the asmops */ + aopOp (result, ic, TRUE); + aopOp (left, ic, FALSE); + aopOp (right, ic, FALSE); + + genCmp (right, left, result, ifx, sign, ic); + + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genCmpLt - less than comparisons */ +/*-----------------------------------------------------------------*/ +static void +genCmpLt (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + sym_link *letype, *retype; + int sign; + + D (emitcode (";", "genCmpLt")); + + left = IC_LEFT (ic); + right = IC_RIGHT (ic); + result = IC_RESULT (ic); + + letype = getSpec (operandType (left)); + retype = getSpec (operandType (right)); + sign = !((SPEC_USIGN (letype) && !(IS_CHAR (letype) && IS_LITERAL (letype))) || + (SPEC_USIGN (retype) && !(IS_CHAR (retype) && IS_LITERAL (retype)))); + /* assign the asmops */ + aopOp (result, ic, TRUE); + aopOp (left, ic, FALSE); + aopOp (right, ic, FALSE); + + genCmp (left, right, result, ifx, sign, ic); + + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* gencjneshort - compare and jump if not equal */ +/*-----------------------------------------------------------------*/ +static void +gencjneshort (operand * left, operand * right, symbol * lbl) +{ + int size = max (AOP_SIZE (left), AOP_SIZE (right)); + int offset = 0; + unsigned long lit = 0L; + + D (emitcode (";", "gencjneshort")); + + /* if the left side is a literal or + if the right is in a pointer register and left + is not */ + if ((AOP_TYPE (left) == AOP_LIT) || + (AOP_TYPE (left) == AOP_IMMD) || + (AOP_TYPE (left) == AOP_DIR) || + (IS_AOP_PREG (right) && !IS_AOP_PREG (left))) + { + operand *t = right; + right = left; + left = t; + } + + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + /* if the right side is a literal then anything goes */ + if (AOP_TYPE (right) == AOP_LIT && + AOP_TYPE (left) != AOP_DIR && + AOP_TYPE (left) != AOP_IMMD) + { + while (size--) + { + emitcode ("cjne", "%s,%s,%05d$", + aopGet (left, offset, FALSE, FALSE), + aopGet (right, offset, FALSE, FALSE), + lbl->key + 100); + offset++; + } + } + + /* if the right side is in a register or in direct space or + if the left is a pointer register & right is not */ + else if (AOP_TYPE (right) == AOP_REG || + AOP_TYPE (right) == AOP_DIR || + AOP_TYPE (right) == AOP_LIT || + AOP_TYPE (right) == AOP_IMMD || + (AOP_TYPE (left) == AOP_DIR && AOP_TYPE (right) == AOP_LIT) || + (IS_AOP_PREG (left) && !IS_AOP_PREG (right))) + { + while (size--) + { + MOVA (aopGet (left, offset, FALSE, FALSE)); + if ((AOP_TYPE (left) == AOP_DIR && AOP_TYPE (right) == AOP_LIT) && + ((unsigned int) ((lit >> (offset * 8)) & 0x0FFL) == 0)) + emitcode ("jnz", "%05d$", lbl->key + 100); + else + emitcode ("cjne", "a,%s,%05d$", + aopGet (right, offset, FALSE, TRUE), + lbl->key + 100); + offset++; + } + } + else + { + /* right is a pointer reg need both a & b */ + while (size--) + { + //if B in use: push B; mov B,left; mov A,right; clrc; subb A,B; pop B; jnz + wassertl(!BINUSE, "B was in use"); + MOVB (aopGet (left, offset, FALSE, FALSE)); + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode ("cjne", "a,b,%05d$", lbl->key + 100); + offset++; + } + } +} + +/*-----------------------------------------------------------------*/ +/* gencjne - compare and jump if not equal */ +/*-----------------------------------------------------------------*/ +static void +gencjne (operand * left, operand * right, symbol * lbl, bool useCarry) +{ + symbol *tlbl = newiTempLabel (NULL); + + D (emitcode (";", "gencjne")); + + gencjneshort (left, right, lbl); + + if (useCarry) + SETC; + else + MOVA (one); + emitcode ("sjmp", "%05d$", tlbl->key + 100); + emitLabel (lbl); + if (useCarry) + CLRC; + else + MOVA (zero); + emitLabel (tlbl); +} + +/*-----------------------------------------------------------------*/ +/* genCmpEq - generates code for equal to */ +/*-----------------------------------------------------------------*/ +static void +genCmpEq (iCode * ic, iCode * ifx) +{ + bool swappedLR = FALSE; + operand *left, *right, *result; + iCode * popIc = ic->next; + + D (emitcode (";", "genCmpEq")); + + aopOp ((left = IC_LEFT (ic)), ic, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, TRUE); + + /* if literal, literal on the right or + if the right is in a pointer register and left + is not */ + if ((AOP_TYPE (IC_LEFT (ic)) == AOP_LIT) || + (IS_AOP_PREG (right) && !IS_AOP_PREG (left))) + { + operand *t = IC_RIGHT (ic); + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = t; + swappedLR = TRUE; + } + + if (ifx && !AOP_SIZE (result)) + { + symbol *tlbl; + /* if they are both bit variables */ + if (AOP_TYPE (left) == AOP_CRY && + ((AOP_TYPE (right) == AOP_CRY) || (AOP_TYPE (right) == AOP_LIT))) + { + if (AOP_TYPE (right) == AOP_LIT) + { + unsigned long lit = ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit); + if (lit == 0L) + { + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + emitcode ("cpl", "c"); + } + else if (lit == 1L) + { + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + } + else + { + emitcode ("clr", "c"); + } + /* AOP_TYPE(right) == AOP_CRY */ + } + else + { + symbol *lbl = newiTempLabel (NULL); + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + emitcode ("jb", "%s,%05d$", AOP (right)->aopu.aop_dir, (lbl->key + 100)); + emitcode ("cpl", "c"); + emitLabel (lbl); + } + /* if true label then we jump if condition + supplied is true */ + tlbl = newiTempLabel (NULL); + if (IC_TRUE (ifx)) + { + emitcode ("jnc", "%05d$", tlbl->key + 100); + freeForBranchAsmop (result); + freeForBranchAsmop (right); + freeForBranchAsmop (left); + popForBranch (popIc, FALSE); + emitcode ("ljmp", "%05d$", IC_TRUE (ifx)->key + 100); + } + else + { + emitcode ("jc", "%05d$", tlbl->key + 100); + freeForBranchAsmop (result); + freeForBranchAsmop (right); + freeForBranchAsmop (left); + popForBranch (popIc, FALSE); + emitcode ("ljmp", "%05d$", IC_FALSE (ifx)->key + 100); + } + emitLabel (tlbl); + } + else + { + tlbl = newiTempLabel (NULL); + gencjneshort (left, right, tlbl); + if (IC_TRUE (ifx)) + { + freeForBranchAsmop (result); + freeForBranchAsmop (right); + freeForBranchAsmop (left); + popForBranch (popIc, FALSE); + emitcode ("ljmp", "%05d$", IC_TRUE (ifx)->key + 100); + emitLabel (tlbl); + } + else + { + symbol *lbl = newiTempLabel (NULL); + emitcode ("sjmp", "%05d$", lbl->key + 100); + emitLabel (tlbl); + freeForBranchAsmop (result); + freeForBranchAsmop (right); + freeForBranchAsmop (left); + popForBranch (popIc, FALSE); + emitcode ("ljmp", "%05d$", IC_FALSE (ifx)->key + 100); + emitLabel (lbl); + } + } + /* mark the icode as generated */ + ifx->generated = 1; + goto release; + } + + /* if they are both bit variables */ + if (AOP_TYPE (left) == AOP_CRY && + ((AOP_TYPE (right) == AOP_CRY) || (AOP_TYPE (right) == AOP_LIT))) + { + if (AOP_TYPE (right) == AOP_LIT) + { + unsigned long lit = ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit); + if (lit == 0L) + { + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + emitcode ("cpl", "c"); + } + else if (lit == 1L) + { + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + } + else + { + emitcode ("clr", "c"); + } + /* AOP_TYPE(right) == AOP_CRY */ + } + else + { + symbol *lbl = newiTempLabel (NULL); + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + emitcode ("jb", "%s,%05d$", AOP (right)->aopu.aop_dir, (lbl->key + 100)); + emitcode ("cpl", "c"); + emitLabel (lbl); + } + /* c = 1 if egal */ + if (AOP_TYPE (result) == AOP_CRY && AOP_SIZE (result)) + { + outBitC (result); + goto release; + } + if (ifx) + { + genIfxJump (ifx, "c", left, right, result, popIc); + goto release; + } + /* if the result is used in an arithmetic operation + then put the result in place */ + outBitC (result); + } + else + { + if (AOP_TYPE (result) == AOP_CRY && AOP_SIZE (result)) + { + gencjne (left, right, newiTempLabel (NULL), TRUE); + aopPut (result, "c", 0); + goto release; + } + gencjne (left, right, newiTempLabel (NULL), FALSE); + if (ifx) + { + genIfxJump (ifx, "a", left, right, result, popIc); + goto release; + } + /* if the result is used in an arithmetic operation + then put the result in place */ + if (AOP_TYPE (result) != AOP_CRY) + outAcc (result); + /* leave the result in acc */ + } + +release: + freeAsmop (result, NULL, ic, TRUE); + if (!swappedLR) + { + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + } + else + { + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + } +} + +/*-----------------------------------------------------------------*/ +/* ifxForOp - returns the icode containing the ifx for operand */ +/*-----------------------------------------------------------------*/ +static iCode * +ifxForOp (operand * op, iCode * ic) +{ + iCode *ifxIc; + + /* if true symbol then needs to be assigned */ + if (IS_TRUE_SYMOP (op)) + return NULL; + + /* if this has register type condition and + while skipping ipop's (see bug 1509084), + the next instruction is ifx with the same operand + and live to of the operand is upto the ifx only then */ + for (ifxIc = ic->next; ifxIc && ifxIc->op == IPOP; ifxIc = ifxIc->next); + if (ifxIc && ifxIc->op == IFX && + IC_COND (ifxIc)->key == op->key && + OP_SYMBOL (op)->liveTo <= ifxIc->seq) + return ifxIc; + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* hasInc - operand is incremented before any other use */ +/*-----------------------------------------------------------------*/ +static iCode * +hasInc (operand *op, iCode *ic, int osize) +{ + sym_link *type = operandType(op); + sym_link *retype = getSpec (type); + iCode *lic = ic->next; + int isize ; + + /* this could from a cast, e.g.: "(char xdata *) 0x7654;" */ + if (!IS_SYMOP(op)) return NULL; + + if (IS_BITVAR(retype)||!IS_PTR(type)) return NULL; + if (IS_AGGREGATE(type->next)) return NULL; + if (osize != (isize = getSize(type->next))) return NULL; + + while (lic) + { + /* if operand of the form op = op + */ + if (lic->op == '+' && isOperandEqual(IC_LEFT(lic),op) && + isOperandEqual(IC_RESULT(lic),op) && + isOperandLiteral(IC_RIGHT(lic)) && + operandLitValue(IC_RIGHT(lic)) == isize) + { + return lic; + } + /* if the operand used or deffed */ + if (bitVectBitValue(OP_USES(op),lic->key) || lic->defKey == op->key) + { + return NULL; + } + /* if GOTO or IFX */ + if (lic->op == IFX || lic->op == GOTO || lic->op == LABEL) break; + lic = lic->next; + } + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* genAndOp - for && operation */ +/*-----------------------------------------------------------------*/ +static void +genAndOp (iCode * ic) +{ + operand *left, *right, *result; + symbol *tlbl; + + D (emitcode (";", "genAndOp")); + + /* note here that && operations that are in an + if statement are taken away by backPatchLabels + only those used in arthmetic operations remain */ + aopOp ((left = IC_LEFT (ic)), ic, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, FALSE); + + /* if both are bit variables */ + if (AOP_TYPE (left) == AOP_CRY && + AOP_TYPE (right) == AOP_CRY) + { + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + emitcode ("anl", "c,%s", AOP (right)->aopu.aop_dir); + outBitC (result); + } + else + { + tlbl = newiTempLabel (NULL); + toBoolean (left); + emitcode ("jz", "%05d$", tlbl->key + 100); + toBoolean (right); + emitLabel (tlbl); + outBitAcc (result); + } + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); +} + + +/*-----------------------------------------------------------------*/ +/* genOrOp - for || operation */ +/*-----------------------------------------------------------------*/ +static void +genOrOp (iCode * ic) +{ + operand *left, *right, *result; + symbol *tlbl; + + D (emitcode (";", "genOrOp")); + + /* note here that || operations that are in an + if statement are taken away by backPatchLabels + only those used in arthmetic operations remain */ + aopOp ((left = IC_LEFT (ic)), ic, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, FALSE); + + /* if both are bit variables */ + if (AOP_TYPE (left) == AOP_CRY && + AOP_TYPE (right) == AOP_CRY) + { + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + emitcode ("orl", "c,%s", AOP (right)->aopu.aop_dir); + outBitC (result); + } + else + { + tlbl = newiTempLabel (NULL); + toBoolean (left); + emitcode ("jnz", "%05d$", tlbl->key + 100); + toBoolean (right); + emitLabel (tlbl); + outBitAcc (result); + } + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); +} + +/*-----------------------------------------------------------------*/ +/* isLiteralBit - test if lit == 2^n */ +/*-----------------------------------------------------------------*/ +static int +isLiteralBit (unsigned long lit) +{ + unsigned long pw[32] = + {1L, 2L, 4L, 8L, 16L, 32L, 64L, 128L, + 0x100L, 0x200L, 0x400L, 0x800L, + 0x1000L, 0x2000L, 0x4000L, 0x8000L, + 0x10000L, 0x20000L, 0x40000L, 0x80000L, + 0x100000L, 0x200000L, 0x400000L, 0x800000L, + 0x1000000L, 0x2000000L, 0x4000000L, 0x8000000L, + 0x10000000L, 0x20000000L, 0x40000000L, 0x80000000L}; + int idx; + + for (idx = 0; idx < 32; idx++) + if (lit == pw[idx]) + return idx + 1; + return 0; +} + +/*-----------------------------------------------------------------*/ +/* continueIfTrue - */ +/*-----------------------------------------------------------------*/ +static void +continueIfTrue (iCode * ic) +{ + if (IC_TRUE (ic)) + emitcode ("ljmp", "%05d$", IC_TRUE (ic)->key + 100); + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* jmpIfTrue - */ +/*-----------------------------------------------------------------*/ +static void +jumpIfTrue (iCode * ic) +{ + if (!IC_TRUE (ic)) + emitcode ("ljmp", "%05d$", IC_FALSE (ic)->key + 100); + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* jmpTrueOrFalse - */ +/*-----------------------------------------------------------------*/ +static void +jmpTrueOrFalse (iCode * ic, symbol * tlbl, operand *left, operand *right, operand *result) +{ + // ugly but optimized by peephole + if (IC_TRUE (ic)) + { + symbol *nlbl = newiTempLabel (NULL); + emitcode ("sjmp", "%05d$", nlbl->key + 100); + emitLabel (tlbl); + freeForBranchAsmop (result); + freeForBranchAsmop (right); + freeForBranchAsmop (left); + emitcode ("ljmp", "%05d$", IC_TRUE (ic)->key + 100); + emitLabel (nlbl); + } + else + { + freeForBranchAsmop (result); + freeForBranchAsmop (right); + freeForBranchAsmop (left); + emitcode ("ljmp", "%05d$", IC_FALSE (ic)->key + 100); + emitLabel (tlbl); + } + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genAnd - code for and */ +/*-----------------------------------------------------------------*/ +static void +genAnd (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + int size, offset = 0; + unsigned long lit = 0L; + int bytelit = 0; + char buffer[10]; + + D (emitcode (";", "genAnd")); + + aopOp ((left = IC_LEFT (ic)), ic, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, TRUE); + +#ifdef DEBUG_TYPE + emitcode (";", "Type res[%d] = l[%d]&r[%d]", + AOP_TYPE (result), + AOP_TYPE (left), AOP_TYPE (right)); + emitcode (";", "Size res[%d] = l[%d]&r[%d]", + AOP_SIZE (result), + AOP_SIZE (left), AOP_SIZE (right)); +#endif + + /* if left is a literal & right is not then exchange them */ + if ((AOP_TYPE (left) == AOP_LIT && AOP_TYPE (right) != AOP_LIT) || + AOP_NEEDSACC (left)) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if result = right then exchange left and right */ + if (sameRegs (AOP (result), AOP (right))) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if right is bit then exchange them */ + if (AOP_TYPE (right) == AOP_CRY && + AOP_TYPE (left) != AOP_CRY) + { + operand *tmp = right; + right = left; + left = tmp; + } + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + size = AOP_SIZE (result); + + // if(bit & yy) + // result = bit & yy; + if (AOP_TYPE (left) == AOP_CRY) + { + // c = bit & literal; + if (AOP_TYPE (right) == AOP_LIT) + { + if (lit & 1) + { + if (size && sameRegs (AOP (result), AOP (left))) + // no change + goto release; + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + } + else + { + // bit(result) = 0; + if (size && (AOP_TYPE (result) == AOP_CRY)) + { + emitcode ("clr", "%s", AOP (result)->aopu.aop_dir); + goto release; + } + if ((AOP_TYPE (result) == AOP_CRY) && ifx) + { + jumpIfTrue (ifx); + goto release; + } + emitcode ("clr", "c"); + } + } + else + { + if (AOP_TYPE (right) == AOP_CRY) + { + // c = bit & bit; + if (IS_OP_ACCUSE (left)) + { + emitcode ("anl", "c,%s", AOP (right)->aopu.aop_dir); + } + else + { + emitcode ("mov", "c,%s", AOP (right)->aopu.aop_dir); + emitcode ("anl", "c,%s", AOP (left)->aopu.aop_dir); + } + } + else + { + // c = bit & val; + MOVA (aopGet (right, 0, FALSE, FALSE)); + // c = lsb + emitcode ("rrc", "a"); + emitcode ("anl", "c,%s", AOP (left)->aopu.aop_dir); + } + } + // bit = c + // val = c + if (size) + outBitC (result); + // if(bit & ...) + else if ((AOP_TYPE (result) == AOP_CRY) && ifx) + genIfxJump (ifx, "c", left, right, result, ic->next); + goto release; + } + + // if(val & 0xZZ) - size = 0, ifx != FALSE - + // bit = val & 0xZZ - size = 1, ifx = FALSE - + if ((AOP_TYPE (right) == AOP_LIT) && + (AOP_TYPE (result) == AOP_CRY) && + (AOP_TYPE (left) != AOP_CRY)) + { + int posbit = isLiteralBit (lit); + /* left & 2^n */ + if (posbit) + { + posbit--; + MOVA (aopGet (left, posbit >> 3, FALSE, FALSE)); + // bit = left & 2^n + if (size) + { + switch (posbit & 0x07) + { + case 0: emitcode ("rrc", "a"); + break; + case 7: emitcode ("rlc", "a"); + break; + default: emitcode ("mov", "c,acc.%d", posbit & 0x07); + break; + } + } + // if(left & 2^n) + else + { + if (ifx) + { + SNPRINTF (buffer, sizeof(buffer), + "acc.%d", posbit & 0x07); + genIfxJump (ifx, buffer, left, right, result, ic->next); + } + else + {// what is this case? just found it in ds390/gen.c + emitcode ("anl","a,#!constbyte",1 << (posbit & 0x07)); + } + goto release; + } + } + else + { + symbol *tlbl = newiTempLabel (NULL); + int sizel = AOP_SIZE (left); + if (size) + emitcode ("setb", "c"); + while (sizel--) + { + if ((bytelit = ((lit >> (offset * 8)) & 0x0FFL)) != 0x0L) + { + MOVA (aopGet (left, offset, FALSE, FALSE)); + // byte == 2^n ? + if ((posbit = isLiteralBit (bytelit)) != 0) + emitcode ("jb", "acc.%d,%05d$", (posbit - 1) & 0x07, tlbl->key + 100); + else + { + if (bytelit != 0x0FFL) + emitcode ("anl", "a,%s", + aopGet (right, offset, FALSE, TRUE)); + emitcode ("jnz", "%05d$", tlbl->key + 100); + } + } + offset++; + } + // bit = left & literal + if (size) + { + emitcode ("clr", "c"); + emitLabel (tlbl); + } + // if(left & literal) + else + { + if (ifx) + jmpTrueOrFalse (ifx, tlbl, left, right, result); + else + emitLabel (tlbl); + goto release; + } + } + outBitC (result); + goto release; + } + + /* if left is same as result */ + if (sameRegs (AOP (result), AOP (left))) + { + for (; size--; offset++) + { + if (AOP_TYPE (right) == AOP_LIT) + { + bytelit = (int) ((lit >> (offset * 8)) & 0x0FFL); + if (bytelit == 0x0FF) + { + /* dummy read of volatile operand */ + if (isOperandVolatile (left, FALSE)) + MOVA (aopGet (left, offset, FALSE, FALSE)); + else + continue; + } + else if (bytelit == 0) + { + aopPut (result, zero, offset); + } + else if (IS_AOP_PREG (result)) + { + MOVA (aopGet (left, offset, FALSE, TRUE)); + emitcode ("anl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + aopPut (result, "a", offset); + } + else + emitcode ("anl", "%s,%s", + aopGet (left, offset, FALSE, TRUE), + aopGet (right, offset, FALSE, FALSE)); + } + else + { + if (AOP_TYPE (left) == AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("anl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + MOVB (aopGet (left, offset, FALSE, FALSE)); + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode ("anl", "a,b"); + aopPut (result, "a", offset); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE)); + emitcode ("anl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + aopPut (result, "a", offset); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE)); + if (IS_AOP_PREG (result)) + { + emitcode ("anl", "a,%s", aopGet (left, offset, FALSE, TRUE)); + aopPut (result, "a", offset); + } + else + emitcode ("anl", "%s,a", aopGet (left, offset, FALSE, TRUE)); + } + } + } + } + else + { + // left & result in different registers + if (AOP_TYPE (result) == AOP_CRY) + { + // result = bit + // if(size), result in bit + // if(!size && ifx), conditional oper: if(left & right) + symbol *tlbl = newiTempLabel (NULL); + int sizer = min (AOP_SIZE (left), AOP_SIZE (right)); + if (size) + emitcode ("setb", "c"); + while (sizer--) + { + if ((AOP_TYPE(right)==AOP_REG || IS_AOP_PREG(right) || AOP_TYPE(right)==AOP_DIR) + && AOP_TYPE(left)==AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("anl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + else if (AOP_TYPE(left)==AOP_ACC) + { + if (!offset) + { + bool pushedB = pushB (); + emitcode("mov", "b,a"); + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode("anl", "a,b"); + popB (pushedB); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode("anl", "a,b"); + } + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + MOVB (aopGet (left, offset, FALSE, FALSE)); + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode ("anl", "a,b"); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE)); + emitcode ("anl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode ("anl", "a,%s", aopGet (left, offset, FALSE, FALSE)); + } + + emitcode ("jnz", "%05d$", tlbl->key + 100); + offset++; + } + if (size) + { + CLRC; + emitLabel (tlbl); + outBitC (result); + } + else if (ifx) + jmpTrueOrFalse (ifx, tlbl, left, right, result); + else + emitLabel (tlbl); + } + else + { + for (; (size--); offset++) + { + // normal case + // result = left & right + if (AOP_TYPE (right) == AOP_LIT) + { + bytelit = (int) ((lit >> (offset * 8)) & 0x0FFL); + if (bytelit == 0x0FF) + { + aopPut (result, + aopGet (left, offset, FALSE, FALSE), + offset); + continue; + } + else if (bytelit == 0) + { + /* dummy read of volatile operand */ + if (isOperandVolatile (left, FALSE)) + MOVA (aopGet (left, offset, FALSE, FALSE)); + aopPut (result, zero, offset); + continue; + } + else if (AOP_TYPE (left) == AOP_ACC) + { + if (!offset) + { + emitcode ("anl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + aopPut (result, "a", offset); + continue; + } + else + { + emitcode ("anl", "b,%s", aopGet (right, offset, FALSE, FALSE)); + aopPut (result, "b", offset); + continue; + } + } + } + // faster than result <- left, anl result,right + // and better if result is SFR + if ((AOP_TYPE(right)==AOP_REG || IS_AOP_PREG(right) || AOP_TYPE(right)==AOP_DIR) + && AOP_TYPE(left)==AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("anl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + else if (AOP_TYPE(left)==AOP_ACC) + { + if (!offset) + { + bool pushedB = pushB (); + emitcode("mov", "b,a"); + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode("anl", "a,b"); + popB (pushedB); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode("anl", "a,b"); + } + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + MOVB (aopGet (left, offset, FALSE, FALSE)); + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode ("anl", "a,b"); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE)); + emitcode ("anl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode ("anl", "a,%s", aopGet (left, offset, FALSE, FALSE)); + } + aopPut (result, "a", offset); + } + } + } + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); +} + +/*-----------------------------------------------------------------*/ +/* genOr - code for or */ +/*-----------------------------------------------------------------*/ +static void +genOr (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + int size, offset = 0; + unsigned long lit = 0L; + int bytelit = 0; + + D (emitcode (";", "genOr")); + + aopOp ((left = IC_LEFT (ic)), ic, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, TRUE); + +#ifdef DEBUG_TYPE + emitcode (";", "Type res[%d] = l[%d]&r[%d]", + AOP_TYPE (result), + AOP_TYPE (left), AOP_TYPE (right)); + emitcode (";", "Size res[%d] = l[%d]&r[%d]", + AOP_SIZE (result), + AOP_SIZE (left), AOP_SIZE (right)); +#endif + + /* if left is a literal & right is not then exchange them */ + if ((AOP_TYPE (left) == AOP_LIT && AOP_TYPE (right) != AOP_LIT) || + AOP_NEEDSACC (left)) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if result = right then exchange them */ + if (sameRegs (AOP (result), AOP (right))) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if right is bit then exchange them */ + if (AOP_TYPE (right) == AOP_CRY && + AOP_TYPE (left) != AOP_CRY) + { + operand *tmp = right; + right = left; + left = tmp; + } + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + size = AOP_SIZE (result); + + // if(bit | yy) + // xx = bit | yy; + if (AOP_TYPE (left) == AOP_CRY) + { + if (AOP_TYPE (right) == AOP_LIT) + { + // c = bit | literal; + if (lit) + { + // lit != 0 => result = 1 + if (AOP_TYPE (result) == AOP_CRY) + { + if (size) + emitcode ("setb", "%s", AOP (result)->aopu.aop_dir); + else if (ifx) + continueIfTrue (ifx); + goto release; + } + emitcode ("setb", "c"); + } + else + { + // lit == 0 => result = left + if (size && sameRegs (AOP (result), AOP (left))) + goto release; + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + } + } + else + { + if (AOP_TYPE (right) == AOP_CRY) + { + // c = bit | bit; + if (IS_OP_ACCUSE (left)) + { + emitcode ("orl", "c,%s", AOP (right)->aopu.aop_dir); + } + else + { + emitcode ("mov", "c,%s", AOP (right)->aopu.aop_dir); + emitcode ("orl", "c,%s", AOP (left)->aopu.aop_dir); + } + } + else + { + // c = bit | val; + if ((AOP_TYPE (result) == AOP_CRY) && ifx) + { + symbol *tlbl = newiTempLabel (NULL); + emitcode ("jb", "%s,%05d$", + AOP (left)->aopu.aop_dir, tlbl->key + 100); + toBoolean (right); + emitcode ("jnz", "%05d$", tlbl->key + 100); + jmpTrueOrFalse (ifx, tlbl, left, right, result); + goto release; + } + else + { + toCarry (right); + emitcode ("orl", "c,%s", AOP (left)->aopu.aop_dir); + } + } + } + // bit = c + // val = c + if (size) + outBitC (result); + // if(bit | ...) + else if ((AOP_TYPE (result) == AOP_CRY) && ifx) + genIfxJump (ifx, "c", left, right, result, ic->next); + goto release; + } + + // if(val | 0xZZ) - size = 0, ifx != FALSE - + // bit = val | 0xZZ - size = 1, ifx = FALSE - + if ((AOP_TYPE (right) == AOP_LIT) && + (AOP_TYPE (result) == AOP_CRY) && + (AOP_TYPE (left) != AOP_CRY)) + { + if (lit) + { + // result = 1 + if (size) + emitcode ("setb", "%s", AOP (result)->aopu.aop_dir); + else if(ifx) + continueIfTrue (ifx); + goto release; + } + else + { + // lit = 0, result = boolean(left) + if (size) + emitcode ("setb", "c"); + toBoolean (right); + if (size) + { + symbol *tlbl = newiTempLabel (NULL); + emitcode ("jnz", "%05d$", tlbl->key + 100); + CLRC; + emitLabel (tlbl); + } + else + { /* FIXME, thats pretty fishy, check for ifx!=0, testcase .. */ + genIfxJump (ifx, "a", left, right, result, ic->next); + goto release; + } + } + outBitC (result); + goto release; + } + + /* if left is same as result */ + if (sameRegs (AOP (result), AOP (left))) + { + for (; size--; offset++) + { + if (AOP_TYPE (right) == AOP_LIT) + { + bytelit = (int) ((lit >> (offset * 8)) & 0x0FFL); + if (bytelit == 0) + { + /* dummy read of volatile operand */ + if (isOperandVolatile (left, FALSE)) + MOVA (aopGet (left, offset, FALSE, FALSE)); + else + continue; + } + else if (bytelit == 0x0FF) + { + aopPut (result, "#0xff", offset); + } + else if (IS_AOP_PREG (left)) + { + MOVA (aopGet (left, offset, FALSE, TRUE)); + emitcode ("orl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + aopPut (result, "a", offset); + } + else + { + emitcode ("orl", "%s,%s", + aopGet (left, offset, FALSE, TRUE), + aopGet (right, offset, FALSE, FALSE)); + } + } + else + { + if (AOP_TYPE (left) == AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("orl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + MOVB (aopGet (left, offset, FALSE, FALSE)); + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode ("orl", "a,b"); + aopPut (result, "a", offset); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE)); + emitcode ("orl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + aopPut (result, "a", offset); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE)); + if (IS_AOP_PREG (left)) + { + emitcode ("orl", "a,%s", aopGet (left, offset, FALSE, TRUE)); + aopPut (result, "a", offset); + } + else + { + emitcode ("orl", "%s,a", aopGet (left, offset, FALSE, TRUE)); + } + } + } + } + } + else + { + // left & result in different registers + if (AOP_TYPE (result) == AOP_CRY) + { + // result = bit + // if(size), result in bit + // if(!size && ifx), conditional oper: if(left | right) + symbol *tlbl = newiTempLabel (NULL); + int sizer = max (AOP_SIZE (left), AOP_SIZE (right)); + if (size) + emitcode ("setb", "c"); + while (sizer--) + { + if ((AOP_TYPE(right)==AOP_REG || IS_AOP_PREG(right) || AOP_TYPE(right)==AOP_DIR) + && AOP_TYPE(left)==AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("orl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + else if (AOP_TYPE(left)==AOP_ACC) + { + if (!offset) + { + bool pushedB = pushB (); + emitcode("mov", "b,a"); + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode("orl", "a,b"); + popB (pushedB); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode("orl", "a,b"); + } + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + MOVB (aopGet (left, offset, FALSE, FALSE)); + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode ("orl", "a,b"); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE)); + emitcode ("orl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode ("orl", "a,%s", aopGet (left, offset, FALSE, FALSE)); + } + + emitcode ("jnz", "%05d$", tlbl->key + 100); + offset++; + } + if (size) + { + CLRC; + emitLabel (tlbl); + outBitC (result); + } + else if (ifx) + jmpTrueOrFalse (ifx, tlbl, left, right, result); + else + emitLabel (tlbl); + } + else + { + for (; (size--); offset++) + { + // normal case + // result = left | right + if (AOP_TYPE (right) == AOP_LIT) + { + bytelit = (int) ((lit >> (offset * 8)) & 0x0FFL); + if (bytelit == 0) + { + aopPut (result, + aopGet (left, offset, FALSE, FALSE), + offset); + continue; + } + else if (bytelit == 0x0FF) + { + /* dummy read of volatile operand */ + if (isOperandVolatile (left, FALSE)) + MOVA (aopGet (left, offset, FALSE, FALSE)); + aopPut (result, "#0xff", offset); + continue; + } + } + // faster than result <- left, orl result,right + // and better if result is SFR + if ((AOP_TYPE(right)==AOP_REG || IS_AOP_PREG(right) || AOP_TYPE(right)==AOP_DIR) + && AOP_TYPE(left)==AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("orl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + else if (AOP_TYPE(left)==AOP_ACC) + { + if (!offset) + { + bool pushedB = pushB (); + emitcode("mov", "b,a"); + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode("orl", "a,b"); + popB (pushedB); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode("orl", "a,b"); + } + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + MOVB (aopGet (left, offset, FALSE, FALSE)); + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode ("orl", "a,b"); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE)); + emitcode ("orl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode ("orl", "a,%s", aopGet (left, offset, FALSE, FALSE)); + } + aopPut (result, "a", offset); + } + } + } + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); +} + +/*-----------------------------------------------------------------*/ +/* genXor - code for xclusive or */ +/*-----------------------------------------------------------------*/ +static void +genXor (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + int size, offset = 0; + unsigned long lit = 0L; + int bytelit = 0; + + D (emitcode (";", "genXor")); + + aopOp ((left = IC_LEFT (ic)), ic, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, TRUE); + +#ifdef DEBUG_TYPE + emitcode (";", "Type res[%d] = l[%d]&r[%d]", + AOP_TYPE (result), + AOP_TYPE (left), AOP_TYPE (right)); + emitcode (";", "Size res[%d] = l[%d]&r[%d]", + AOP_SIZE (result), + AOP_SIZE (left), AOP_SIZE (right)); +#endif + + /* if left is a literal & right is not || + if left needs acc & right does not */ + if ((AOP_TYPE (left) == AOP_LIT && AOP_TYPE (right) != AOP_LIT) || + (AOP_NEEDSACC (left) && !AOP_NEEDSACC (right))) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if result = right then exchange them */ + if (sameRegs (AOP (result), AOP (right))) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if right is bit then exchange them */ + if (AOP_TYPE (right) == AOP_CRY && + AOP_TYPE (left) != AOP_CRY) + { + operand *tmp = right; + right = left; + left = tmp; + } + + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + size = AOP_SIZE (result); + + // if(bit ^ yy) + // xx = bit ^ yy; + if (AOP_TYPE (left) == AOP_CRY) + { + if (AOP_TYPE (right) == AOP_LIT) + { + // c = bit & literal; + if (lit >> 1) + { + // lit>>1 != 0 => result = 1 + if (AOP_TYPE (result) == AOP_CRY) + { + if (size) + emitcode ("setb", "%s", AOP (result)->aopu.aop_dir); + else if (ifx) + continueIfTrue (ifx); + goto release; + } + emitcode ("setb", "c"); + } + else + { + // lit == (0 or 1) + if (lit == 0) + { + // lit == 0, result = left + if (size && sameRegs (AOP (result), AOP (left))) + goto release; + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + } + else + { + // lit == 1, result = not(left) + if (size && sameRegs (AOP (result), AOP (left))) + { + emitcode ("cpl", "%s", AOP (result)->aopu.aop_dir); + goto release; + } + else + { + emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir); + emitcode ("cpl", "c"); + } + } + } + } + else + { + // right != literal + symbol *tlbl = newiTempLabel (NULL); + if (AOP_TYPE (right) == AOP_CRY) + { + // c = bit ^ bit; + if (IS_OP_ACCUSE (left)) + {// left already is in the carry + operand *tmp = right; + right = left; + left = tmp; + } + else + { + toCarry (right); + } + } + else + { + // c = bit ^ val + toCarry (right); + } + emitcode ("jnb", "%s,%05d$", AOP (left)->aopu.aop_dir, (tlbl->key + 100)); + emitcode ("cpl", "c"); + emitLabel (tlbl); + } + // bit = c + // val = c + if (size) + outBitC (result); + // if(bit ^ ...) + else if ((AOP_TYPE (result) == AOP_CRY) && ifx) + genIfxJump (ifx, "c", left, right, result, ic->next); + goto release; + } + + /* if left is same as result */ + if (sameRegs (AOP (result), AOP (left))) + { + for (; size--; offset++) + { + if (AOP_TYPE (right) == AOP_LIT) + { + bytelit = (int) ((lit >> (offset * 8)) & 0x0FFL); + if (bytelit == 0) + { + /* dummy read of volatile operand */ + if (isOperandVolatile (left, FALSE)) + MOVA (aopGet (left, offset, FALSE, FALSE)); + else + continue; + } + else if (IS_AOP_PREG (left)) + { + MOVA (aopGet (left, offset, FALSE, TRUE)); + emitcode ("xrl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + aopPut (result, "a", offset); + } + else + { + emitcode ("xrl", "%s,%s", + aopGet (left, offset, FALSE, TRUE), + aopGet (right, offset, FALSE, FALSE)); + } + } + else + { + if (AOP_TYPE (left) == AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("xrl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + MOVB (aopGet (left, offset, FALSE, FALSE)); + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode ("xrl", "a,b"); + aopPut (result, "a", offset); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE)); + emitcode ("xrl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + aopPut (result, "a", offset); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE)); + if (IS_AOP_PREG (left)) + { + emitcode ("xrl", "a,%s", aopGet (left, offset, FALSE, TRUE)); + aopPut (result, "a", offset); + } + else + emitcode ("xrl", "%s,a", aopGet (left, offset, FALSE, TRUE)); + } + } + } + } + else + { + // left & result in different registers + if (AOP_TYPE (result) == AOP_CRY) + { + // result = bit + // if(size), result in bit + // if(!size && ifx), conditional oper: if(left ^ right) + symbol *tlbl = newiTempLabel (NULL); + int sizer = max (AOP_SIZE (left), AOP_SIZE (right)); + + if (size) + emitcode ("setb", "c"); + while (sizer--) + { + if ((AOP_TYPE (right) == AOP_LIT) && + (((lit >> (offset * 8)) & 0x0FFL) == 0x00L)) + { + MOVA (aopGet (left, offset, FALSE, FALSE)); + } + else if ((AOP_TYPE(right)==AOP_REG || IS_AOP_PREG(right) || AOP_TYPE(right)==AOP_DIR) + && AOP_TYPE(left)==AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("xrl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + else if (AOP_TYPE(left)==AOP_ACC) + { + if (!offset) + { + bool pushedB = pushB (); + emitcode("mov", "b,a"); + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode("xrl", "a,b"); + popB (pushedB); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode("xrl", "a,b"); + } + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + MOVB (aopGet (left, offset, FALSE, FALSE)); + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode ("xrl", "a,b"); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE)); + emitcode ("xrl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode ("xrl", "a,%s", aopGet (left, offset, FALSE, TRUE)); + } + + emitcode ("jnz", "%05d$", tlbl->key + 100); + offset++; + } + if (size) + { + CLRC; + emitLabel (tlbl); + outBitC (result); + } + else if (ifx) + jmpTrueOrFalse (ifx, tlbl, left, right, result); + } + else + { + for (; (size--); offset++) + { + // normal case + // result = left ^ right + if (AOP_TYPE (right) == AOP_LIT) + { + bytelit = (int) ((lit >> (offset * 8)) & 0x0FFL); + if (bytelit == 0) + { + aopPut (result, + aopGet (left, offset, FALSE, FALSE), + offset); + continue; + } + } + // faster than result <- left, xrl result,right + // and better if result is SFR + if ((AOP_TYPE(right)==AOP_REG || IS_AOP_PREG(right) || AOP_TYPE(right)==AOP_DIR) + && AOP_TYPE(left)==AOP_ACC) + { + if (offset) + emitcode("mov", "a,b"); + emitcode ("xrl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + else if (AOP_TYPE(left)==AOP_ACC) + { + if (!offset) + { + bool pushedB = pushB (); + emitcode("mov", "b,a"); + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode("xrl", "a,b"); + popB (pushedB); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode("xrl", "a,b"); + } + } + else if (aopGetUsesAcc (left, offset) && aopGetUsesAcc (right, offset)) + { + MOVB (aopGet (left, offset, FALSE, FALSE)); + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode ("xrl", "a,b"); + } + else if (aopGetUsesAcc (left, offset)) + { + MOVA (aopGet (left, offset, FALSE, FALSE)); + emitcode ("xrl", "a,%s", aopGet (right, offset, FALSE, FALSE)); + } + else + { + MOVA (aopGet (right, offset, FALSE, FALSE)); + emitcode ("xrl", "a,%s", aopGet (left, offset, FALSE, TRUE)); + } + aopPut (result, "a", offset); + } + } + } + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); + freeAsmop (left, NULL, ic, (RESULTONSTACK (ic) ? FALSE : TRUE)); +} + +/*-----------------------------------------------------------------*/ +/* genInline - write the inline code out */ +/*-----------------------------------------------------------------*/ +static void +genInline (iCode * ic) +{ + char *buffer, *bp, *bp1; + bool inComment = FALSE; + + D (emitcode (";", "genInline")); + + _G.inLine += (!options.asmpeep); + + buffer = bp = bp1 = Safe_strdup (IC_INLINE (ic)); + + /* emit each line as a code */ + while (*bp) + { + switch (*bp) + { + case ';': + inComment = TRUE; + ++bp; + break; + + case '\n': + inComment = FALSE; + *bp++ = '\0'; + emitcode (bp1, ""); + bp1 = bp; + break; + + default: + /* Add \n for labels, not dirs such as c:\mydir */ + if (!inComment && (*bp == ':') && (isspace((unsigned char)bp[1]))) + { + ++bp; + *bp = '\0'; + ++bp; + emitcode (bp1, ""); + bp1 = bp; + } + else + ++bp; + break; + } + } + if (bp1 != bp) + emitcode (bp1, ""); + + Safe_free (buffer); + + _G.inLine -= (!options.asmpeep); +} + +/*-----------------------------------------------------------------*/ +/* genRRC - rotate right with carry */ +/*-----------------------------------------------------------------*/ +static void +genRRC (iCode * ic) +{ + operand *left, *result; + int size, offset; + char *l; + + D (emitcode (";", "genRRC")); + + /* rotate right with carry */ + left = IC_LEFT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + + /* move it to the result */ + size = AOP_SIZE (result); + offset = size - 1; + if (size == 1) { /* special case for 1 byte */ + l = aopGet (left, offset, FALSE, FALSE); + MOVA (l); + emitcode ("rr", "a"); + goto release; + } + /* no need to clear carry, bit7 will be written later */ + while (size--) + { + l = aopGet (left, offset, FALSE, FALSE); + MOVA (l); + emitcode ("rrc", "a"); + if (AOP_SIZE (result) > 1) + aopPut (result, "a", offset--); + } + /* now we need to put the carry into the + highest order byte of the result */ + if (AOP_SIZE (result) > 1) + { + l = aopGet (result, AOP_SIZE (result) - 1, FALSE, FALSE); + MOVA (l); + } + emitcode ("mov", "acc.7,c"); + release: + aopPut (result, "a", AOP_SIZE (result) - 1); + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genRLC - generate code for rotate left with carry */ +/*-----------------------------------------------------------------*/ +static void +genRLC (iCode * ic) +{ + operand *left, *result; + int size, offset; + char *l; + + D (emitcode (";", "genRLC")); + + /* rotate right with carry */ + left = IC_LEFT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + + /* move it to the result */ + size = AOP_SIZE (result); + offset = 0; + if (size--) + { + l = aopGet (left, offset, FALSE, FALSE); + MOVA (l); + if (size == 0) { /* special case for 1 byte */ + emitcode("rl","a"); + goto release; + } + emitcode("rlc","a"); /* bit0 will be written later */ + if (AOP_SIZE (result) > 1) + { + aopPut (result, "a", offset++); + } + + while (size--) + { + l = aopGet (left, offset, FALSE, FALSE); + MOVA (l); + emitcode ("rlc", "a"); + if (AOP_SIZE (result) > 1) + aopPut (result, "a", offset++); + } + } + /* now we need to put the carry into the + highest order byte of the result */ + if (AOP_SIZE (result) > 1) + { + l = aopGet (result, 0, FALSE, FALSE); + MOVA (l); + } + emitcode ("mov", "acc.0,c"); + release: + aopPut (result, "a", 0); + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genGetHbit - generates code get highest order bit */ +/*-----------------------------------------------------------------*/ +static void +genGetHbit (iCode * ic) +{ + operand *left, *result; + + D (emitcode (";", "genGetHbit")); + + left = IC_LEFT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + + /* get the highest order byte into a */ + MOVA (aopGet (left, AOP_SIZE (left) - 1, FALSE, FALSE)); + if (AOP_TYPE (result) == AOP_CRY) + { + emitcode ("rlc", "a"); + outBitC (result); + } + else + { + emitcode ("rl", "a"); + emitcode ("anl", "a,#0x01"); + outAcc (result); + } + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genGetAbit - generates code get a single bit */ +/*-----------------------------------------------------------------*/ +static void +genGetAbit (iCode * ic) +{ + operand *left, *right, *result; + int shCount; + + D (emitcode (";", "genGetAbit")); + + left = IC_LEFT (ic); + right = IC_RIGHT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE); + aopOp (right, ic, FALSE); + aopOp (result, ic, FALSE); + + shCount = (int) ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit); + + /* get the needed byte into a */ + MOVA (aopGet (left, shCount / 8, FALSE, FALSE)); + shCount %= 8; + if (AOP_TYPE (result) == AOP_CRY) + { + if ((shCount) == 7) + emitcode ("rlc", "a"); + else if ((shCount) == 0) + emitcode ("rrc", "a"); + else + emitcode ("mov", "c,acc[%d]", shCount); + outBitC (result); + } + else + { + switch (shCount) + { + case 2: + emitcode ("rr", "a"); + //fallthrough + case 1: + emitcode ("rr", "a"); + //fallthrough + case 0: + emitcode ("anl", "a,#0x01"); + break; + case 3: + case 5: + emitcode ("mov", "c,acc[%d]", shCount); + emitcode ("clr", "a"); + emitcode ("rlc", "a"); + break; + case 4: + emitcode ("swap", "a"); + emitcode ("anl", "a,#0x01"); + break; + case 6: + emitcode ("rl", "a"); + //fallthrough + case 7: + emitcode ("rl", "a"); + emitcode ("anl", "a,#0x01"); + break; + } + outAcc (result); + } + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genGetByte - generates code get a single byte */ +/*-----------------------------------------------------------------*/ +static void +genGetByte (iCode * ic) +{ + operand *left, *right, *result; + int offset; + + D (emitcode (";", "genGetByte")); + + left = IC_LEFT (ic); + right = IC_RIGHT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE); + aopOp (right, ic, FALSE); + aopOp (result, ic, FALSE); + + offset = (int) ulFromVal (AOP (right)->aopu.aop_lit) / 8; + aopPut (result, + aopGet (left, offset, FALSE, FALSE), + 0); + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genGetWord - generates code get two bytes */ +/*-----------------------------------------------------------------*/ +static void +genGetWord (iCode * ic) +{ + operand *left, *right, *result; + int offset; + + D (emitcode (";", "genGetWord")); + + left = IC_LEFT (ic); + right = IC_RIGHT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE); + aopOp (right, ic, FALSE); + aopOp (result, ic, FALSE); + + offset = (int) ulFromVal (AOP (right)->aopu.aop_lit) / 8; + aopPut (result, + aopGet (left, offset, FALSE, FALSE), + 0); + aopPut (result, + aopGet (left, offset+1, FALSE, FALSE), + 1); + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genSwap - generates code to swap nibbles or bytes */ +/*-----------------------------------------------------------------*/ +static void +genSwap (iCode * ic) +{ + operand *left, *result; + + D(emitcode (";", "genSwap")); + + left = IC_LEFT (ic); + result = IC_RESULT (ic); + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + + switch (AOP_SIZE (left)) + { + case 1: /* swap nibbles in byte */ + MOVA (aopGet (left, 0, FALSE, FALSE)); + emitcode ("swap", "a"); + aopPut (result, "a", 0); + break; + case 2: /* swap bytes in word */ + if (AOP_TYPE(left) == AOP_REG && sameRegs(AOP(left), AOP(result))) + { + MOVA (aopGet (left, 0, FALSE, FALSE)); + aopPut (result, aopGet (left, 1, FALSE, FALSE), 0); + aopPut (result, "a", 1); + } + else if (operandsEqu (left, result)) + { + char * reg = "a"; + bool pushedB = FALSE, leftInB = FALSE; + + MOVA (aopGet (left, 0, FALSE, FALSE)); + if (aopGetUsesAcc(left, 1) || aopGetUsesAcc(result, 0)) + { + pushedB = pushB (); + emitcode ("mov", "b,a"); + reg = "b"; + leftInB = TRUE; + } + aopPut (result, aopGet (left, 1, FALSE, FALSE), 0); + aopPut (result, reg, 1); + + if (leftInB) + popB (pushedB); + } + else + { + aopPut (result, aopGet (left, 1, FALSE, FALSE), 0); + aopPut (result, aopGet (left, 0, FALSE, FALSE), 1); + } + break; + default: + wassertl(FALSE, "unsupported SWAP operand size"); + } + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* AccRol - rotate left accumulator by known count */ +/*-----------------------------------------------------------------*/ +static void +AccRol (int shCount) +{ + shCount &= 0x0007; // shCount : 0..7 + + switch (shCount) + { + case 0: + break; + case 1: + emitcode ("rl", "a"); + break; + case 2: + emitcode ("rl", "a"); + emitcode ("rl", "a"); + break; + case 3: + emitcode ("swap", "a"); + emitcode ("rr", "a"); + break; + case 4: + emitcode ("swap", "a"); + break; + case 5: + emitcode ("swap", "a"); + emitcode ("rl", "a"); + break; + case 6: + emitcode ("rr", "a"); + emitcode ("rr", "a"); + break; + case 7: + emitcode ("rr", "a"); + break; + } +} + +/*-----------------------------------------------------------------*/ +/* AccLsh - left shift accumulator by known count */ +/*-----------------------------------------------------------------*/ +static void +AccLsh (int shCount) +{ + if (shCount != 0) + { + if (shCount == 1) + emitcode ("add", "a,acc"); + else if (shCount == 2) + { + emitcode ("add", "a,acc"); + emitcode ("add", "a,acc"); + } + else + { + /* rotate left accumulator */ + AccRol (shCount); + /* and kill the lower order bits */ + emitcode ("anl", "a,#0x%02x", SLMask[shCount]); + } + } +} + +/*-----------------------------------------------------------------*/ +/* AccRsh - right shift accumulator by known count */ +/*-----------------------------------------------------------------*/ +static void +AccRsh (int shCount) +{ + if (shCount != 0) + { + if (shCount == 1) + { + CLRC; + emitcode ("rrc", "a"); + } + else + { + /* rotate right accumulator */ + AccRol (8 - shCount); + /* and kill the higher order bits */ + emitcode ("anl", "a,#0x%02x", SRMask[shCount]); + } + } +} + +/*-----------------------------------------------------------------*/ +/* AccSRsh - signed right shift accumulator by known count */ +/*-----------------------------------------------------------------*/ +static void +AccSRsh (int shCount) +{ + symbol *tlbl; + if (shCount != 0) + { + if (shCount == 1) + { + emitcode ("mov", "c,acc.7"); + emitcode ("rrc", "a"); + } + else if (shCount == 2) + { + emitcode ("mov", "c,acc.7"); + emitcode ("rrc", "a"); + emitcode ("mov", "c,acc.7"); + emitcode ("rrc", "a"); + } + else + { + tlbl = newiTempLabel (NULL); + /* rotate right accumulator */ + AccRol (8 - shCount); + /* and kill the higher order bits */ + emitcode ("anl", "a,#0x%02x", SRMask[shCount]); + emitcode ("jnb", "acc.%d,%05d$", 7 - shCount, tlbl->key + 100); + emitcode ("orl", "a,#0x%02x", + (unsigned char) ~SRMask[shCount]); + emitLabel (tlbl); + } + } +} + +/*-----------------------------------------------------------------*/ +/* shiftR1Left2Result - shift right one byte from left to result */ +/*-----------------------------------------------------------------*/ +static void +shiftR1Left2Result (operand * left, int offl, + operand * result, int offr, + int shCount, int sign) +{ + MOVA (aopGet (left, offl, FALSE, FALSE)); + /* shift right accumulator */ + if (sign) + AccSRsh (shCount); + else + AccRsh (shCount); + aopPut (result, "a", offr); +} + +/*-----------------------------------------------------------------*/ +/* shiftL1Left2Result - shift left one byte from left to result */ +/*-----------------------------------------------------------------*/ +static void +shiftL1Left2Result (operand * left, int offl, + operand * result, int offr, int shCount) +{ + char *l; + l = aopGet (left, offl, FALSE, FALSE); + MOVA (l); + /* shift left accumulator */ + AccLsh (shCount); + aopPut (result, "a", offr); +} + +/*-----------------------------------------------------------------*/ +/* movLeft2Result - move byte from left to result */ +/*-----------------------------------------------------------------*/ +static void +movLeft2Result (operand * left, int offl, + operand * result, int offr, int sign) +{ + char *l; + if (!sameRegs (AOP (left), AOP (result)) || (offl != offr)) + { + l = aopGet (left, offl, FALSE, FALSE); + + if (*l == '@' && (IS_AOP_PREG (result))) + { + emitcode ("mov", "a,%s", l); + aopPut (result, "a", offr); + } + else + { + if (!sign) + { + aopPut (result, l, offr); + } + else + { + /* MSB sign in acc.7 ! */ + if (getDataSize (left) == offl + 1) + { + MOVA (l); + aopPut (result, "a", offr); + } + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* AccAXRrl1 - right rotate c->a:x->c by 1 */ +/*-----------------------------------------------------------------*/ +static void +AccAXRrl1 (char *x) +{ + emitcode ("rrc", "a"); + emitcode ("xch", "a,%s", x); + emitcode ("rrc", "a"); + emitcode ("xch", "a,%s", x); +} + +/*-----------------------------------------------------------------*/ +/* AccAXLrl1 - left rotate c<-a:x<-c by 1 */ +/*-----------------------------------------------------------------*/ +static void +AccAXLrl1 (char *x) +{ + emitcode ("xch", "a,%s", x); + emitcode ("rlc", "a"); + emitcode ("xch", "a,%s", x); + emitcode ("rlc", "a"); +} + +/*-----------------------------------------------------------------*/ +/* AccAXLsh1 - left shift a:x<-0 by 1 */ +/*-----------------------------------------------------------------*/ +static void +AccAXLsh1 (char *x) +{ + emitcode ("xch", "a,%s", x); + emitcode ("add", "a,acc"); + emitcode ("xch", "a,%s", x); + emitcode ("rlc", "a"); +} + +/*-----------------------------------------------------------------*/ +/* AccAXLsh - left shift a:x by known count (0..7) */ +/*-----------------------------------------------------------------*/ +static void +AccAXLsh (char *x, int shCount) +{ + switch (shCount) + { + case 0: + break; + case 1: + AccAXLsh1 (x); + break; + case 2: + AccAXLsh1 (x); + AccAXLsh1 (x); + break; + case 3: + case 4: + case 5: // AAAAABBB:CCCCCDDD + + AccRol (shCount); // BBBAAAAA:CCCCCDDD + + emitcode ("anl", "a,#0x%02x", + SLMask[shCount]); // BBB00000:CCCCCDDD + + emitcode ("xch", "a,%s", x); // CCCCCDDD:BBB00000 + + AccRol (shCount); // DDDCCCCC:BBB00000 + + emitcode ("xch", "a,%s", x); // BBB00000:DDDCCCCC + + emitcode ("xrl", "a,%s", x); // (BBB^DDD)CCCCC:DDDCCCCC + + emitcode ("xch", "a,%s", x); // DDDCCCCC:(BBB^DDD)CCCCC + + emitcode ("anl", "a,#0x%02x", + SLMask[shCount]); // DDD00000:(BBB^DDD)CCCCC + + emitcode ("xch", "a,%s", x); // (BBB^DDD)CCCCC:DDD00000 + + emitcode ("xrl", "a,%s", x); // BBBCCCCC:DDD00000 + + break; + case 6: // AAAAAABB:CCCCCCDD + emitcode ("anl", "a,#0x%02x", + SRMask[shCount]); // 000000BB:CCCCCCDD + emitcode ("mov", "c,acc.0"); // c = B + emitcode ("xch", "a,%s", x); // CCCCCCDD:000000BB +#if 0 // REMOVE ME + AccAXRrl1 (x); // BCCCCCCD:D000000B + AccAXRrl1 (x); // BBCCCCCC:DD000000 +#else + emitcode("rrc","a"); + emitcode("xch","a,%s", x); + emitcode("rrc","a"); + emitcode("mov","c,acc.0"); //<< get correct bit + emitcode("xch","a,%s", x); + + emitcode("rrc","a"); + emitcode("xch","a,%s", x); + emitcode("rrc","a"); + emitcode("xch","a,%s", x); +#endif + break; + case 7: // a:x <<= 7 + + emitcode ("anl", "a,#0x%02x", + SRMask[shCount]); // 0000000B:CCCCCCCD + + emitcode ("mov", "c,acc.0"); // c = B + + emitcode ("xch", "a,%s", x); // CCCCCCCD:0000000B + + AccAXRrl1 (x); // BCCCCCCC:D0000000 + + break; + default: + break; + } +} + +/*-----------------------------------------------------------------*/ +/* AccAXRsh - right shift a:x known count (0..7) */ +/*-----------------------------------------------------------------*/ +static void +AccAXRsh (char *x, int shCount) +{ + switch (shCount) + { + case 0: + break; + case 1: + CLRC; + AccAXRrl1 (x); // 0->a:x + + break; + case 2: + CLRC; + AccAXRrl1 (x); // 0->a:x + + CLRC; + AccAXRrl1 (x); // 0->a:x + + break; + case 3: + case 4: + case 5: // AAAAABBB:CCCCCDDD = a:x + + AccRol (8 - shCount); // BBBAAAAA:DDDCCCCC + + emitcode ("xch", "a,%s", x); // CCCCCDDD:BBBAAAAA + + AccRol (8 - shCount); // DDDCCCCC:BBBAAAAA + + emitcode ("anl", "a,#0x%02x", + SRMask[shCount]); // 000CCCCC:BBBAAAAA + + emitcode ("xrl", "a,%s", x); // BBB(CCCCC^AAAAA):BBBAAAAA + + emitcode ("xch", "a,%s", x); // BBBAAAAA:BBB(CCCCC^AAAAA) + + emitcode ("anl", "a,#0x%02x", + SRMask[shCount]); // 000AAAAA:BBB(CCCCC^AAAAA) + + emitcode ("xch", "a,%s", x); // BBB(CCCCC^AAAAA):000AAAAA + + emitcode ("xrl", "a,%s", x); // BBBCCCCC:000AAAAA + + emitcode ("xch", "a,%s", x); // 000AAAAA:BBBCCCCC + + break; + case 6: // AABBBBBB:CCDDDDDD + + emitcode ("mov", "c,acc.7"); + AccAXLrl1 (x); // ABBBBBBC:CDDDDDDA + + emitcode ("mov", "c,acc.7"); + AccAXLrl1 (x); // BBBBBBCC:DDDDDDAA + + emitcode ("xch", "a,%s", x); // DDDDDDAA:BBBBBBCC + + emitcode ("anl", "a,#0x%02x", + SRMask[shCount]); // 000000AA:BBBBBBCC + + break; + case 7: // ABBBBBBB:CDDDDDDD + + emitcode ("mov", "c,acc.7"); // c = A + + AccAXLrl1 (x); // BBBBBBBC:DDDDDDDA + + emitcode ("xch", "a,%s", x); // DDDDDDDA:BBBBBBCC + + emitcode ("anl", "a,#0x%02x", + SRMask[shCount]); // 0000000A:BBBBBBBC + + break; + default: + break; + } +} + +/*-----------------------------------------------------------------*/ +/* AccAXRshS - right shift signed a:x known count (0..7) */ +/*-----------------------------------------------------------------*/ +static void +AccAXRshS (char *x, int shCount) +{ + symbol *tlbl; + switch (shCount) + { + case 0: + break; + case 1: + emitcode ("mov", "c,acc.7"); + AccAXRrl1 (x); // s->a:x + + break; + case 2: + emitcode ("mov", "c,acc.7"); + AccAXRrl1 (x); // s->a:x + + emitcode ("mov", "c,acc.7"); + AccAXRrl1 (x); // s->a:x + + break; + case 3: + case 4: + case 5: // AAAAABBB:CCCCCDDD = a:x + + tlbl = newiTempLabel (NULL); + AccRol (8 - shCount); // BBBAAAAA:CCCCCDDD + + emitcode ("xch", "a,%s", x); // CCCCCDDD:BBBAAAAA + + AccRol (8 - shCount); // DDDCCCCC:BBBAAAAA + + emitcode ("anl", "a,#0x%02x", + SRMask[shCount]); // 000CCCCC:BBBAAAAA + + emitcode ("xrl", "a,%s", x); // BBB(CCCCC^AAAAA):BBBAAAAA + + emitcode ("xch", "a,%s", x); // BBBAAAAA:BBB(CCCCC^AAAAA) + + emitcode ("anl", "a,#0x%02x", + SRMask[shCount]); // 000AAAAA:BBB(CCCCC^AAAAA) + + emitcode ("xch", "a,%s", x); // BBB(CCCCC^AAAAA):000AAAAA + + emitcode ("xrl", "a,%s", x); // BBBCCCCC:000AAAAA + + emitcode ("xch", "a,%s", x); // 000SAAAA:BBBCCCCC + + emitcode ("jnb", "acc.%d,%05d$", 7 - shCount, tlbl->key + 100); + emitcode ("orl", "a,#0x%02x", + (unsigned char) ~SRMask[shCount]); // 111AAAAA:BBBCCCCC + + emitLabel (tlbl); + break; // SSSSAAAA:BBBCCCCC + + case 6: // AABBBBBB:CCDDDDDD + + tlbl = newiTempLabel (NULL); + emitcode ("mov", "c,acc.7"); + AccAXLrl1 (x); // ABBBBBBC:CDDDDDDA + + emitcode ("mov", "c,acc.7"); + AccAXLrl1 (x); // BBBBBBCC:DDDDDDAA + + emitcode ("xch", "a,%s", x); // DDDDDDAA:BBBBBBCC + + emitcode ("anl", "a,#0x%02x", + SRMask[shCount]); // 000000AA:BBBBBBCC + + emitcode ("jnb", "acc.%d,%05d$", 7 - shCount, tlbl->key + 100); + emitcode ("orl", "a,#0x%02x", + (unsigned char) ~SRMask[shCount]); // 111111AA:BBBBBBCC + + emitLabel (tlbl); + break; + case 7: // ABBBBBBB:CDDDDDDD + + tlbl = newiTempLabel (NULL); + emitcode ("mov", "c,acc.7"); // c = A + + AccAXLrl1 (x); // BBBBBBBC:DDDDDDDA + + emitcode ("xch", "a,%s", x); // DDDDDDDA:BBBBBBCC + + emitcode ("anl", "a,#0x%02x", + SRMask[shCount]); // 0000000A:BBBBBBBC + + emitcode ("jnb", "acc.%d,%05d$", 7 - shCount, tlbl->key + 100); + emitcode ("orl", "a,#0x%02x", + (unsigned char) ~SRMask[shCount]); // 1111111A:BBBBBBBC + + emitLabel (tlbl); + break; + default: + break; + } +} + +/*-----------------------------------------------------------------*/ +/* shiftL2Left2Result - shift left two bytes from left to result */ +/*-----------------------------------------------------------------*/ +static void +shiftL2Left2Result (operand * left, int offl, + operand * result, int offr, int shCount) +{ + char * x; + bool pushedB = FALSE; + bool usedB = FALSE; + + if (sameRegs (AOP (result), AOP (left)) && + ((offl + MSB16) == offr)) + { + /* don't crash result[offr] */ + MOVA (aopGet (left, offl, FALSE, FALSE)); + x = xch_a_aopGet (left, offl + MSB16, FALSE, FALSE); + usedB = !strncmp(x, "b", 1); + } + else if (aopGetUsesAcc (result, offr)) + { + movLeft2Result (left, offl, result, offr, 0); + pushedB = pushB (); + usedB = TRUE; + emitcode ("mov", "b,%s", aopGet (left, offl + MSB16, FALSE, FALSE)); + MOVA (aopGet (result, offr, FALSE, FALSE)); + emitcode ("xch", "a,b"); + x = "b"; + } + else + { + movLeft2Result (left, offl, result, offr, 0); + MOVA (aopGet (left, offl + MSB16, FALSE, FALSE)); + x = aopGet (result, offr, FALSE, FALSE); + } + /* ax << shCount (x = lsb(result)) */ + AccAXLsh (x, shCount); + if (usedB) + { + emitcode ("xch", "a,b"); + aopPut (result, "a", offr); + aopPut (result, "b", offr + MSB16); + popB (pushedB); + } + else + { + aopPut (result, "a", offr + MSB16); + } +} + + +/*-----------------------------------------------------------------*/ +/* shiftR2Left2Result - shift right two bytes from left to result */ +/*-----------------------------------------------------------------*/ +static void +shiftR2Left2Result (operand * left, int offl, + operand * result, int offr, + int shCount, int sign) +{ + char * x; + bool pushedB = FALSE; + bool usedB = FALSE; + + if (sameRegs (AOP (result), AOP (left)) && + ((offl + MSB16) == offr)) + { + /* don't crash result[offr] */ + MOVA (aopGet (left, offl, FALSE, FALSE)); + x = xch_a_aopGet (left, offl + MSB16, FALSE, FALSE); + usedB = !strncmp(x, "b", 1); + } + else if (aopGetUsesAcc (result, offr)) + { + movLeft2Result (left, offl, result, offr, 0); + pushedB = pushB (); + usedB = TRUE; + emitcode ("mov", "b,%s", aopGet (result, offr, FALSE, FALSE)); + MOVA (aopGet (left, offl + MSB16, FALSE, FALSE)); + x = "b"; + } + else + { + movLeft2Result (left, offl, result, offr, 0); + MOVA (aopGet (left, offl + MSB16, FALSE, FALSE)); + x = aopGet (result, offr, FALSE, FALSE); + } + /* a:x >> shCount (x = lsb(result)) */ + if (sign) + AccAXRshS (x, shCount); + else + AccAXRsh (x, shCount); + if (usedB) + { + emitcode ("xch", "a,b"); + aopPut (result, "a", offr); + emitcode ("xch", "a,b"); + popB (pushedB); + } + if (getDataSize (result) > 1) + aopPut (result, "a", offr + MSB16); +} + +/*-----------------------------------------------------------------*/ +/* shiftLLeftOrResult - shift left one byte from left, or to result */ +/*-----------------------------------------------------------------*/ +static void +shiftLLeftOrResult (operand * left, int offl, + operand * result, int offr, int shCount) +{ + MOVA (aopGet (left, offl, FALSE, FALSE)); + /* shift left accumulator */ + AccLsh (shCount); + /* or with result */ + if (aopGetUsesAcc (result, offr)) + { + emitcode ("xch", "a,b"); + MOVA (aopGet (result, offr, FALSE, FALSE)); + emitcode ("orl", "a,b"); + } + else + { + emitcode ("orl", "a,%s", aopGet (result, offr, FALSE, FALSE)); + } + /* back to result */ + aopPut (result, "a", offr); +} + +/*-----------------------------------------------------------------*/ +/* shiftRLeftOrResult - shift right one byte from left,or to result */ +/*-----------------------------------------------------------------*/ +static void +shiftRLeftOrResult (operand * left, int offl, + operand * result, int offr, int shCount) +{ + MOVA (aopGet (left, offl, FALSE, FALSE)); + /* shift right accumulator */ + AccRsh (shCount); + /* or with result */ + if (aopGetUsesAcc(result, offr)) + { + emitcode ("xch", "a,b"); + MOVA (aopGet (result, offr, FALSE, FALSE)); + emitcode ("orl", "a,b"); + } + else + { + emitcode ("orl", "a,%s", aopGet (result, offr, FALSE, FALSE)); + } + /* back to result */ + aopPut (result, "a", offr); +} + +/*-----------------------------------------------------------------*/ +/* genlshOne - left shift a one byte quantity by known count */ +/*-----------------------------------------------------------------*/ +static void +genlshOne (operand * result, operand * left, int shCount) +{ + D (emitcode (";", "genlshOne")); + + shiftL1Left2Result (left, LSB, result, LSB, shCount); +} + +/*-----------------------------------------------------------------*/ +/* genlshTwo - left shift two bytes by known amount != 0 */ +/*-----------------------------------------------------------------*/ +static void +genlshTwo (operand * result, operand * left, int shCount) +{ + int size; + + D (emitcode (";", "genlshTwo")); + + size = getDataSize (result); + + /* if shCount >= 8 */ + if (shCount >= 8) + { + shCount -= 8; + + if (size > 1) + { + if (shCount) + { + shiftL1Left2Result (left, LSB, result, MSB16, shCount); + } + else + { + movLeft2Result (left, LSB, result, MSB16, 0); + } + } + aopPut (result, zero, LSB); + } + + /* 1 <= shCount <= 7 */ + else + { + if (size == 1) + shiftL1Left2Result (left, LSB, result, LSB, shCount); + else + shiftL2Left2Result (left, LSB, result, LSB, shCount); + } +} + +/*-----------------------------------------------------------------*/ +/* shiftLLong - shift left one long from left to result */ +/* offl = LSB or MSB16 */ +/*-----------------------------------------------------------------*/ +static void +shiftLLong (operand * left, operand * result, int offr) +{ + char *l; + int size = AOP_SIZE (result); + + if (size >= LSB + offr) + { + l = aopGet (left, LSB, FALSE, FALSE); + MOVA (l); + emitcode ("add", "a,acc"); + if (sameRegs (AOP (left), AOP (result)) && + size >= MSB16 + offr && offr != LSB) + xch_a_aopGet (left, LSB + offr, FALSE, FALSE); + else + aopPut (result, "a", LSB + offr); + } + + if (size >= MSB16 + offr) + { + if (!(sameRegs (AOP (result), AOP (left)) && size >= MSB16 + offr && offr != LSB)) + { + l = aopGet (left, MSB16, FALSE, FALSE); + MOVA (l); + } + emitcode ("rlc", "a"); + if (sameRegs (AOP (left), AOP (result)) && + size >= MSB24 + offr && offr != LSB) + xch_a_aopGet (left, MSB16 + offr, FALSE, FALSE); + else + aopPut (result, "a", MSB16 + offr); + } + + if (size >= MSB24 + offr) + { + if (!(sameRegs (AOP (result), AOP (left)) && size >= MSB24 + offr && offr != LSB)) + { + l = aopGet (left, MSB24, FALSE, FALSE); + MOVA (l); + } + emitcode ("rlc", "a"); + if (sameRegs (AOP (left), AOP (result)) && + size >= MSB32 + offr && offr != LSB) + xch_a_aopGet (left, MSB24 + offr, FALSE, FALSE); + else + aopPut (result, "a", MSB24 + offr); + } + + if (size > MSB32 + offr) + { + if (!(sameRegs (AOP (result), AOP (left)) && size >= MSB32 + offr && offr != LSB)) + { + l = aopGet (left, MSB32, FALSE, FALSE); + MOVA (l); + } + emitcode ("rlc", "a"); + aopPut (result, "a", MSB32 + offr); + } + if (offr != LSB) + aopPut (result, zero, LSB); +} + +/*-----------------------------------------------------------------*/ +/* genlshFour - shift four byte by a known amount != 0 */ +/*-----------------------------------------------------------------*/ +static void +genlshFour (operand * result, operand * left, int shCount) +{ + int size; + + D (emitcode (";", "genlshFour")); + + size = AOP_SIZE (result); + + /* if shifting more that 3 bytes */ + if (shCount >= 24) + { + shCount -= 24; + if (shCount) + /* lowest order of left goes to the highest + order of the destination */ + shiftL1Left2Result (left, LSB, result, MSB32, shCount); + else + movLeft2Result (left, LSB, result, MSB32, 0); + aopPut (result, zero, LSB); + aopPut (result, zero, MSB16); + aopPut (result, zero, MSB24); + return; + } + + /* more than two bytes */ + else if (shCount >= 16) + { + /* lower order two bytes goes to higher order two bytes */ + shCount -= 16; + /* if some more remaining */ + if (shCount) + shiftL2Left2Result (left, LSB, result, MSB24, shCount); + else + { + movLeft2Result (left, MSB16, result, MSB32, 0); + movLeft2Result (left, LSB, result, MSB24, 0); + } + aopPut (result, zero, MSB16); + aopPut (result, zero, LSB); + return; + } + + /* if more than 1 byte */ + else if (shCount >= 8) + { + /* lower order three bytes goes to higher order three bytes */ + shCount -= 8; + if (size == 2) + { + if (shCount) + shiftL1Left2Result (left, LSB, result, MSB16, shCount); + else + movLeft2Result (left, LSB, result, MSB16, 0); + } + else + { /* size = 4 */ + if (shCount == 0) + { + movLeft2Result (left, MSB24, result, MSB32, 0); + movLeft2Result (left, MSB16, result, MSB24, 0); + movLeft2Result (left, LSB, result, MSB16, 0); + aopPut (result, zero, LSB); + } + else if (shCount == 1) + shiftLLong (left, result, MSB16); + else + { + shiftL2Left2Result (left, MSB16, result, MSB24, shCount); + shiftL1Left2Result (left, LSB, result, MSB16, shCount); + shiftRLeftOrResult (left, LSB, result, MSB24, 8 - shCount); + aopPut (result, zero, LSB); + } + } + } + + /* 1 <= shCount <= 7 */ + else if (shCount <= 2) + { + shiftLLong (left, result, LSB); + if (shCount == 2) + shiftLLong (result, result, LSB); + } + /* 3 <= shCount <= 7, optimize */ + else + { + shiftL2Left2Result (left, MSB24, result, MSB24, shCount); + shiftRLeftOrResult (left, MSB16, result, MSB24, 8 - shCount); + shiftL2Left2Result (left, LSB, result, LSB, shCount); + } +} + +/*-----------------------------------------------------------------*/ +/* genLeftShiftLiteral - left shifting by known count */ +/*-----------------------------------------------------------------*/ +static void +genLeftShiftLiteral (operand * left, + operand * right, + operand * result, + iCode * ic) +{ + int shCount = (int) ulFromVal (AOP (right)->aopu.aop_lit); + int size; + + D (emitcode (";", "genLeftShiftLiteral")); + + freeAsmop (right, NULL, ic, TRUE); + + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + + size = getSize (operandType (result)); + +#if VIEW_SIZE + emitcode ("; shift left ", "result %d, left %d", size, + AOP_SIZE (left)); +#endif + + /* I suppose that the left size >= result size */ + if (shCount == 0) + { + while (size--) + { + movLeft2Result (left, size, result, size, 0); + } + } + else if (shCount >= (size * 8)) + { + while (size--) + { + aopPut (result, zero, size); + } + } + else + { + switch (size) + { + case 1: + genlshOne (result, left, shCount); + break; + + case 2: + genlshTwo (result, left, shCount); + break; + + case 4: + genlshFour (result, left, shCount); + break; + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "*** ack! mystery literal shift!\n"); + break; + } + } + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genLeftShift - generates code for left shifting */ +/*-----------------------------------------------------------------*/ +static void +genLeftShift (iCode * ic) +{ + operand *left, *right, *result; + int size, offset; + char *l; + symbol *tlbl, *tlbl1; + bool pushedB; + + D (emitcode (";", "genLeftShift")); + + right = IC_RIGHT (ic); + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + aopOp (right, ic, FALSE); + + /* if the shift count is known then do it + as efficiently as possible */ + if (AOP_TYPE (right) == AOP_LIT) + { + genLeftShiftLiteral (left, right, result, ic); + return; + } + + /* shift count is unknown then we have to form + a loop get the loop count in B : Note: we take + only the lower order byte since shifting + more that 32 bits make no sense anyway, ( the + largest size of an object can be only 32 bits ) */ + + pushedB = pushB (); + MOVB (aopGet (right, 0, FALSE, FALSE)); + emitcode ("inc", "b"); + freeAsmop (right, NULL, ic, TRUE); + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + + /* now move the left to the result if they are not the same */ + if (!sameRegs (AOP (left), AOP (result)) && + AOP_SIZE (result) > 1) + { + + size = AOP_SIZE (result); + offset = 0; + while (size--) + { + l = aopGet (left, offset, FALSE, TRUE); + if (*l == '@' && (IS_AOP_PREG (result))) + { + + emitcode ("mov", "a,%s", l); + aopPut (result, "a", offset); + } + else + aopPut (result, l, offset); + offset++; + } + } + + tlbl = newiTempLabel (NULL); + size = AOP_SIZE (result); + offset = 0; + tlbl1 = newiTempLabel (NULL); + + /* if it is only one byte then */ + if (size == 1) + { + symbol *tlbl1 = newiTempLabel (NULL); + + l = aopGet (left, 0, FALSE, FALSE); + MOVA (l); + emitcode ("sjmp", "%05d$", tlbl1->key + 100); + emitLabel (tlbl); + emitcode ("add", "a,acc"); + emitLabel (tlbl1); + emitcode ("djnz", "b,%05d$", tlbl->key + 100); + popB (pushedB); + aopPut (result, "a", 0); + goto release; + } + + reAdjustPreg (AOP (result)); + + emitcode ("sjmp", "%05d$", tlbl1->key + 100); + emitLabel (tlbl); + l = aopGet (result, offset, FALSE, FALSE); + MOVA (l); + emitcode ("add", "a,acc"); + aopPut (result, "a", offset++); + while (--size) + { + l = aopGet (result, offset, FALSE, FALSE); + MOVA (l); + emitcode ("rlc", "a"); + aopPut (result, "a", offset++); + } + reAdjustPreg (AOP (result)); + + emitLabel (tlbl1); + emitcode ("djnz", "b,%05d$", tlbl->key + 100); + popB (pushedB); +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genrshOne - right shift a one byte quantity by known count */ +/*-----------------------------------------------------------------*/ +static void +genrshOne (operand * result, operand * left, + int shCount, int sign) +{ + D (emitcode (";", "genrshOne")); + + shiftR1Left2Result (left, LSB, result, LSB, shCount, sign); +} + +/*-----------------------------------------------------------------*/ +/* genrshTwo - right shift two bytes by known amount != 0 */ +/*-----------------------------------------------------------------*/ +static void +genrshTwo (operand * result, operand * left, + int shCount, int sign) +{ + D (emitcode (";", "genrshTwo")); + + /* if shCount >= 8 */ + if (shCount >= 8) + { + shCount -= 8; + if (shCount) + shiftR1Left2Result (left, MSB16, result, LSB, shCount, sign); + else + movLeft2Result (left, MSB16, result, LSB, sign); + addSign (result, MSB16, sign); + } + + /* 1 <= shCount <= 7 */ + else + shiftR2Left2Result (left, LSB, result, LSB, shCount, sign); +} + +/*-----------------------------------------------------------------*/ +/* shiftRLong - shift right one long from left to result */ +/* offl = LSB or MSB16 */ +/*-----------------------------------------------------------------*/ +static void +shiftRLong (operand * left, int offl, + operand * result, int sign) +{ + bool overlapping = regsInCommon (left, result) || operandsEqu(left, result); + + if (overlapping && offl>1) + { + // we are in big trouble, but this shouldn't happen + werror(E_INTERNAL_ERROR, __FILE__, __LINE__); + } + + MOVA (aopGet (left, MSB32, FALSE, FALSE)); + + if (offl==MSB16) + { + // shift is > 8 + if (sign) + { + emitcode ("rlc", "a"); + emitcode ("subb", "a,acc"); + if (overlapping && sameByte (AOP (left), MSB32, AOP (result), MSB32)) + { + xch_a_aopGet (left, MSB32, FALSE, FALSE); + } + else + { + aopPut (result, "a", MSB32); + MOVA (aopGet (left, MSB32, FALSE, FALSE)); + } + } + else + { + if (aopPutUsesAcc (result, zero, MSB32)) + { + emitcode("xch", "a,b"); + aopPut (result, zero, MSB32); + emitcode("xch", "a,b"); + } + else + { + aopPut (result, zero, MSB32); + } + } + } + + if (!sign) + { + emitcode ("clr", "c"); + } + else + { + emitcode ("mov", "c,acc.7"); + } + + emitcode ("rrc", "a"); + + if (overlapping && offl==MSB16 && + sameByte (AOP (left), MSB24, AOP (result), MSB32-offl)) + { + xch_a_aopGet (left, MSB24, FALSE, FALSE); + } + else + { + aopPut (result, "a", MSB32 - offl); + MOVA (aopGet (left, MSB24, FALSE, FALSE)); + } + + emitcode ("rrc", "a"); + if (overlapping && offl==MSB16 && + sameByte (AOP (left), MSB16, AOP (result), MSB24-offl)) + { + xch_a_aopGet (left, MSB16, FALSE, FALSE); + } + else + { + aopPut (result, "a", MSB24 - offl); + MOVA (aopGet (left, MSB16, FALSE, FALSE)); + } + + emitcode ("rrc", "a"); + if (offl != LSB) + { + aopPut (result, "a", MSB16 - offl); + } + else + { + if (overlapping && + sameByte (AOP (left), LSB, AOP (result), MSB16-offl)) + { + xch_a_aopGet (left, LSB, FALSE, FALSE); + } + else + { + aopPut (result, "a", MSB16 - offl); + MOVA (aopGet (left, LSB, FALSE, FALSE)); + } + emitcode ("rrc", "a"); + aopPut (result, "a", LSB); + } +} + +/*-----------------------------------------------------------------*/ +/* genrshFour - shift four byte by a known amount != 0 */ +/*-----------------------------------------------------------------*/ +static void +genrshFour (operand * result, operand * left, + int shCount, int sign) +{ + D (emitcode (";", "genrshFour")); + + /* if shifting more that 3 bytes */ + if (shCount >= 24) + { + shCount -= 24; + if (shCount) + shiftR1Left2Result (left, MSB32, result, LSB, shCount, sign); + else + movLeft2Result (left, MSB32, result, LSB, sign); + addSign (result, MSB16, sign); + } + else if (shCount >= 16) + { + shCount -= 16; + if (shCount) + shiftR2Left2Result (left, MSB24, result, LSB, shCount, sign); + else + { + movLeft2Result (left, MSB24, result, LSB, 0); + movLeft2Result (left, MSB32, result, MSB16, sign); + } + addSign (result, MSB24, sign); + } + else if (shCount >= 8) + { + shCount -= 8; + if (shCount == 1) + { + shiftRLong (left, MSB16, result, sign); + } + else if (shCount == 0) + { + movLeft2Result (left, MSB16, result, LSB, 0); + movLeft2Result (left, MSB24, result, MSB16, 0); + movLeft2Result (left, MSB32, result, MSB24, sign); + addSign (result, MSB32, sign); + } + else + { + shiftR2Left2Result (left, MSB16, result, LSB, shCount, 0); + shiftLLeftOrResult (left, MSB32, result, MSB16, 8 - shCount); + /* the last shift is signed */ + shiftR1Left2Result (left, MSB32, result, MSB24, shCount, sign); + addSign (result, MSB32, sign); + } + } + else + { + /* 1 <= shCount <= 7 */ + if (shCount <= 2) + { + shiftRLong (left, LSB, result, sign); + if (shCount == 2) + shiftRLong (result, LSB, result, sign); + } + else + { + shiftR2Left2Result (left, LSB, result, LSB, shCount, 0); + shiftLLeftOrResult (left, MSB24, result, MSB16, 8 - shCount); + shiftR2Left2Result (left, MSB24, result, MSB24, shCount, sign); + } + } +} + +/*-----------------------------------------------------------------*/ +/* genRightShiftLiteral - right shifting by known count */ +/*-----------------------------------------------------------------*/ +static void +genRightShiftLiteral (operand * left, + operand * right, + operand * result, + iCode * ic, + int sign) +{ + int shCount = (int) ulFromVal (AOP (right)->aopu.aop_lit); + int size; + + D (emitcode (";", "genRightShiftLiteral")); + + freeAsmop (right, NULL, ic, TRUE); + + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + +#if VIEW_SIZE + emitcode ("; shift right ", "result %d, left %d", AOP_SIZE (result), + AOP_SIZE (left)); +#endif + + size = getDataSize (left); + /* test the LEFT size !!! */ + + /* I suppose that the left size >= result size */ + if (shCount == 0) + { + size = getDataSize (result); + while (size--) + movLeft2Result (left, size, result, size, 0); + } + else if (shCount >= (size * 8)) + { + if (sign) + { + /* get sign in acc.7 */ + MOVA (aopGet (left, size - 1, FALSE, FALSE)); + } + addSign (result, LSB, sign); + } + else + { + switch (size) + { + case 1: + genrshOne (result, left, shCount, sign); + break; + + case 2: + genrshTwo (result, left, shCount, sign); + break; + + case 4: + genrshFour (result, left, shCount, sign); + break; + default: + break; + } + } + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genSignedRightShift - right shift of signed number */ +/*-----------------------------------------------------------------*/ +static void +genSignedRightShift (iCode * ic) +{ + operand *right, *left, *result; + int size, offset; + char *l; + symbol *tlbl, *tlbl1; + bool pushedB; + + D (emitcode (";", "genSignedRightShift")); + + /* we do it the hard way put the shift count in b + and loop thru preserving the sign */ + + right = IC_RIGHT (ic); + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + aopOp (right, ic, FALSE); + + + if (AOP_TYPE (right) == AOP_LIT) + { + genRightShiftLiteral (left, right, result, ic, 1); + return; + } + /* shift count is unknown then we have to form + a loop get the loop count in B : Note: we take + only the lower order byte since shifting + more that 32 bits make no sense anyway, ( the + largest size of an object can be only 32 bits ) */ + + pushedB = pushB (); + MOVB (aopGet (right, 0, FALSE, FALSE)); + emitcode ("inc", "b"); + freeAsmop (right, NULL, ic, TRUE); + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + + /* now move the left to the result if they are not the + same */ + if (!sameRegs (AOP (left), AOP (result)) && + AOP_SIZE (result) > 1) + { + + size = AOP_SIZE (result); + offset = 0; + while (size--) + { + l = aopGet (left, offset, FALSE, TRUE); + if (*l == '@' && IS_AOP_PREG (result)) + { + + emitcode ("mov", "a,%s", l); + aopPut (result, "a", offset); + } + else + aopPut (result, l, offset); + offset++; + } + } + + /* mov the highest order bit to OVR */ + tlbl = newiTempLabel (NULL); + tlbl1 = newiTempLabel (NULL); + + size = AOP_SIZE (result); + offset = size - 1; + MOVA (aopGet (left, offset, FALSE, FALSE)); + emitcode ("rlc", "a"); + emitcode ("mov", "ov,c"); + /* if it is only one byte then */ + if (size == 1) + { + l = aopGet (left, 0, FALSE, FALSE); + MOVA (l); + emitcode ("sjmp", "%05d$", tlbl1->key + 100); + emitLabel (tlbl); + emitcode ("mov", "c,ov"); + emitcode ("rrc", "a"); + emitLabel (tlbl1); + emitcode ("djnz", "b,%05d$", tlbl->key + 100); + popB (pushedB); + aopPut (result, "a", 0); + goto release; + } + + reAdjustPreg (AOP (result)); + emitcode ("sjmp", "%05d$", tlbl1->key + 100); + emitLabel (tlbl); + emitcode ("mov", "c,ov"); + while (size--) + { + l = aopGet (result, offset, FALSE, FALSE); + MOVA (l); + emitcode ("rrc", "a"); + aopPut (result, "a", offset--); + } + reAdjustPreg (AOP (result)); + emitLabel (tlbl1); + emitcode ("djnz", "b,%05d$", tlbl->key + 100); + popB (pushedB); + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genRightShift - generate code for right shifting */ +/*-----------------------------------------------------------------*/ +static void +genRightShift (iCode * ic) +{ + operand *right, *left, *result; + sym_link *letype; + int size, offset; + char *l; + symbol *tlbl, *tlbl1; + bool pushedB; + + D (emitcode (";", "genRightShift")); + + /* if signed then we do it the hard way preserve the + sign bit moving it inwards */ + letype = getSpec (operandType (IC_LEFT (ic))); + + if (!SPEC_USIGN (letype)) + { + genSignedRightShift (ic); + return; + } + + /* signed & unsigned types are treated the same : i.e. the + signed is NOT propagated inwards : quoting from the + ANSI - standard : "for E1 >> E2, is equivalent to division + by 2**E2 if unsigned or if it has a non-negative value, + otherwise the result is implementation defined ", MY definition + is that the sign does not get propagated */ + + right = IC_RIGHT (ic); + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + aopOp (right, ic, FALSE); + + /* if the shift count is known then do it + as efficiently as possible */ + if (AOP_TYPE (right) == AOP_LIT) + { + genRightShiftLiteral (left, right, result, ic, 0); + return; + } + + /* shift count is unknown then we have to form + a loop get the loop count in B : Note: we take + only the lower order byte since shifting + more that 32 bits make no sense anyway, ( the + largest size of an object can be only 32 bits ) */ + + pushedB = pushB (); + MOVB (aopGet (right, 0, FALSE, FALSE)); + emitcode ("inc", "b"); + freeAsmop (right, NULL, ic, TRUE); + aopOp (left, ic, FALSE); + aopOp (result, ic, FALSE); + + /* now move the left to the result if they are not the + same */ + if (!sameRegs (AOP (left), AOP (result)) && + AOP_SIZE (result) > 1) + { + size = AOP_SIZE (result); + offset = 0; + while (size--) + { + l = aopGet (left, offset, FALSE, TRUE); + if (*l == '@' && IS_AOP_PREG (result)) + { + + emitcode ("mov", "a,%s", l); + aopPut (result, "a", offset); + } + else + aopPut (result, l, offset); + offset++; + } + } + + tlbl = newiTempLabel (NULL); + tlbl1 = newiTempLabel (NULL); + size = AOP_SIZE (result); + offset = size - 1; + + /* if it is only one byte then */ + if (size == 1) + { + l = aopGet (left, 0, FALSE, FALSE); + MOVA (l); + emitcode ("sjmp", "%05d$", tlbl1->key + 100); + emitLabel (tlbl); + CLRC; + emitcode ("rrc", "a"); + emitLabel (tlbl1); + emitcode ("djnz", "b,%05d$", tlbl->key + 100); + popB (pushedB); + aopPut (result, "a", 0); + goto release; + } + + reAdjustPreg (AOP (result)); + emitcode ("sjmp", "%05d$", tlbl1->key + 100); + emitLabel (tlbl); + CLRC; + while (size--) + { + l = aopGet (result, offset, FALSE, FALSE); + MOVA (l); + emitcode ("rrc", "a"); + aopPut (result, "a", offset--); + } + reAdjustPreg (AOP (result)); + + emitLabel (tlbl1); + emitcode ("djnz", "b,%05d$", tlbl->key + 100); + popB (pushedB); + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* emitPtrByteGet - emits code to get a byte into A through a */ +/* pointer register (R0, R1, or DPTR). The */ +/* original value of A can be preserved in B. */ +/*-----------------------------------------------------------------*/ +static void +emitPtrByteGet (char *rname, int p_type, bool preserveAinB) +{ + switch (p_type) + { + case IPOINTER: + case POINTER: + if (preserveAinB) + emitcode ("mov", "b,a"); + emitcode ("mov", "a,@%s", rname); + break; + + case PPOINTER: + if (preserveAinB) + emitcode ("mov", "b,a"); + emitcode ("movx", "a,@%s", rname); + break; + + case FPOINTER: + if (preserveAinB) + emitcode ("mov", "b,a"); + emitcode ("movx", "a,@dptr"); + break; + + case CPOINTER: + if (preserveAinB) + emitcode ("mov", "b,a"); + emitcode ("clr", "a"); + emitcode ("movc", "a,@a+dptr"); + break; + + case GPOINTER: + if (preserveAinB) + { + emitcode ("push", "b"); + emitcode ("push", "acc"); + } + emitcode ("lcall", "__gptrget"); + if (preserveAinB) + emitcode ("pop", "b"); + break; + } +} + +/*-----------------------------------------------------------------*/ +/* emitPtrByteSet - emits code to set a byte from src through a */ +/* pointer register (R0, R1, or DPTR). */ +/*-----------------------------------------------------------------*/ +static void +emitPtrByteSet (char *rname, int p_type, char *src) +{ + switch (p_type) + { + case IPOINTER: + case POINTER: + if (*src=='@') + { + MOVA (src); + emitcode ("mov", "@%s,a", rname); + } + else + emitcode ("mov", "@%s,%s", rname, src); + break; + + case PPOINTER: + MOVA (src); + emitcode ("movx", "@%s,a", rname); + break; + + case FPOINTER: + MOVA (src); + emitcode ("movx", "@dptr,a"); + break; + + case GPOINTER: + MOVA (src); + emitcode ("lcall", "__gptrput"); + break; + } +} + +/*-----------------------------------------------------------------*/ +/* genUnpackBits - generates code for unpacking bits */ +/*-----------------------------------------------------------------*/ +static char* +genUnpackBits (operand * result, char *rname, int ptype, iCode *ifx) +{ + int offset = 0; /* result byte offset */ + int rsize; /* result size */ + int rlen = 0; /* remaining bitfield length */ + sym_link *etype; /* bitfield type information */ + int blen; /* bitfield length */ + int bstr; /* bitfield starting bit within byte */ + static char* const accBits[] = {"acc.0", "acc.1", "acc.2", "acc.3", + "acc.4", "acc.5", "acc.6", "acc.7"}; + + D(emitcode (";", "genUnpackBits")); + + etype = getSpec (operandType (result)); + rsize = getSize (operandType (result)); + blen = SPEC_BLEN (etype); + bstr = SPEC_BSTR (etype); + + if (ifx && blen <= 8) + { + emitPtrByteGet (rname, ptype, FALSE); + if (blen == 1) + { + return accBits[bstr];; + } + else + { + if (blen < 8) + emitcode ("anl", "a,#0x%02x", + (((unsigned char) -1) >> (8 - blen)) << bstr); + return "a"; + } + } + wassert (!ifx); + + /* If the bitfield length is less than a byte */ + if (blen < 8) + { + emitPtrByteGet (rname, ptype, FALSE); + AccRol (8 - bstr); + emitcode ("anl", "a,#0x%02x", ((unsigned char) -1) >> (8 - blen)); + if (!SPEC_USIGN (etype)) + { + /* signed bitfield */ + symbol *tlbl = newiTempLabel (NULL); + + emitcode ("jnb", "acc.%d,%05d$", blen - 1, tlbl->key + 100); + emitcode ("orl", "a,#0x%02x", (unsigned char) (0xff << blen)); + emitLabel (tlbl); + } + aopPut (result, "a", offset++); + goto finish; + } + + /* Bit field did not fit in a byte. Copy all + but the partial byte at the end. */ + for (rlen=blen;rlen>=8;rlen-=8) + { + emitPtrByteGet (rname, ptype, FALSE); + aopPut (result, "a", offset++); + if (rlen>8) + emitcode ("inc", "%s", rname); + } + + /* Handle the partial byte at the end */ + if (rlen) + { + emitPtrByteGet (rname, ptype, FALSE); + emitcode ("anl", "a,#0x%02x", ((unsigned char) -1) >> (8-rlen)); + if (!SPEC_USIGN (etype)) + { + /* signed bitfield */ + symbol *tlbl = newiTempLabel (NULL); + + emitcode ("jnb", "acc.%d,%05d$", rlen - 1, tlbl->key + 100); + emitcode ("orl", "a,#0x%02x", (unsigned char) (0xff << rlen)); + emitLabel (tlbl); + } + aopPut (result, "a", offset++); + } + +finish: + if (offset < rsize) + { + char *source; + + if (SPEC_USIGN (etype)) + source = zero; + else + { + /* signed bitfield: sign extension with 0x00 or 0xff */ + emitcode ("rlc", "a"); + emitcode ("subb", "a,acc"); + + source = "a"; + } + rsize -= offset; + while (rsize--) + aopPut (result, source, offset++); + } + return NULL; +} + + +/*-----------------------------------------------------------------*/ +/* genDataPointerGet - generates code when ptr offset is known */ +/*-----------------------------------------------------------------*/ +static void +genDataPointerGet (operand * left, + operand * result, + iCode * ic) +{ + char *l; + char buffer[256]; + int size, offset = 0; + + D (emitcode (";", "genDataPointerGet")); + + aopOp (result, ic, TRUE); + + /* get the string representation of the name */ + l = aopGet (left, 0, FALSE, TRUE); + l++; // remove # + size = AOP_SIZE (result); + while (size--) + { + if (offset) + { + SNPRINTF (buffer, sizeof(buffer), "(%s + %d)", l, offset); + } + else + { + SNPRINTF (buffer, sizeof(buffer), "%s", l); + } + aopPut (result, buffer, offset++); + } + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genNearPointerGet - emitcode for near pointer fetch */ +/*-----------------------------------------------------------------*/ +static void +genNearPointerGet (operand * left, + operand * result, + iCode * ic, + iCode * pi, + iCode * ifx) +{ + asmop *aop = NULL; + regs *preg = NULL; + char *rname; + char *ifxCond = "a"; + sym_link *rtype, *retype; + sym_link *ltype = operandType (left); + + D (emitcode (";", "genNearPointerGet")); + + rtype = operandType (result); + retype = getSpec (rtype); + + aopOp (left, ic, FALSE); + + /* if left is rematerialisable and + result is not bitfield variable type and + the left is pointer to data space i.e + lower 128 bytes of space */ + if (AOP_TYPE (left) == AOP_IMMD && + !IS_BITFIELD (retype) && + DCL_TYPE (ltype) == POINTER) + { + genDataPointerGet (left, result, ic); + return; + } + + //aopOp (result, ic, FALSE); + aopOp (result, ic, result?TRUE:FALSE); + + /* if the value is already in a pointer register + then don't need anything more */ + if (!AOP_INPREG (AOP (left))) + { + if (IS_AOP_PREG (left)) + { + // Aha, it is a pointer, just in disguise. + rname = aopGet (left, 0, FALSE, FALSE); + if (strcmp (rname, "a") == 0) + { + // It's in pdata or on xstack + rname = AOP (left)->aopu.aop_ptr->name; + emitcode ("mov", "%s,a", rname); + } + else if (*rname != '@') + { + fprintf(stderr, "probable internal error: unexpected rname '%s' @ %s:%d\n", + rname, __FILE__, __LINE__); + } + else + { + // Expected case. + emitcode ("mov", "a%s,%s", rname + 1, rname); + rname++; // skip the '@'. + } + } + else + { + /* otherwise get a free pointer register */ + aop = newAsmop (0); + preg = getFreePtr (ic, &aop, FALSE); + emitcode ("mov", "%s,%s", + preg->name, + aopGet (left, 0, FALSE, TRUE)); + rname = preg->name; + } + } + else + rname = aopGet (left, 0, FALSE, FALSE); + + /* if bitfield then unpack the bits */ + if (IS_BITFIELD (retype)) + ifxCond = genUnpackBits (result, rname, POINTER, ifx); + else + { + /* we have can just get the values */ + int size = AOP_SIZE (result); + int offset = 0; + + while (size--) + { + if (ifx || IS_AOP_PREG (result) || AOP_TYPE (result) == AOP_STK) + { + + emitcode ("mov", "a,@%s", rname); + if (!ifx) + aopPut (result, "a", offset); + } + else + { + char buffer[80]; + + SNPRINTF (buffer, sizeof(buffer), "@%s", rname); + aopPut (result, buffer, offset); + } + offset++; + if (size || pi) + emitcode ("inc", "%s", rname); + } + } + + /* now some housekeeping stuff */ + if (aop) /* we had to allocate for this iCode */ + { + if (pi) { /* post increment present */ + aopPut (left, rname, 0); + } + freeAsmop (NULL, aop, ic, RESULTONSTACK (ic) ? FALSE : TRUE); + } + else + { + /* we did not allocate which means left + already in a pointer register, then + if size > 0 && this could be used again + we have to point it back to where it + belongs */ + if ((AOP_SIZE (result) > 1 && + !OP_SYMBOL (left)->remat && + (OP_SYMBOL (left)->liveTo > ic->seq || + ic->depth)) && + !pi) + { + int size = AOP_SIZE (result) - 1; + while (size--) + emitcode ("dec", "%s", rname); + } + } + + if (ifx && !ifx->generated) + { + genIfxJump (ifx, ifxCond, left, NULL, result, ic->next); + } + + /* done */ + freeAsmop (result, NULL, ic, RESULTONSTACK (ic) ? FALSE : TRUE); + freeAsmop (left, NULL, ic, TRUE); + if (pi) pi->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genPagedPointerGet - emitcode for paged pointer fetch */ +/*-----------------------------------------------------------------*/ +static void +genPagedPointerGet (operand * left, + operand * result, + iCode * ic, + iCode *pi, + iCode *ifx) +{ + asmop *aop = NULL; + regs *preg = NULL; + char *rname; + char *ifxCond = "a"; + sym_link *rtype, *retype; + + D (emitcode (";", "genPagedPointerGet")); + + rtype = operandType (result); + retype = getSpec (rtype); + + aopOp (left, ic, FALSE); + + aopOp (result, ic, FALSE); + + /* if the value is already in a pointer register + then don't need anything more */ + if (!AOP_INPREG (AOP (left))) + { + /* otherwise get a free pointer register */ + aop = newAsmop (0); + preg = getFreePtr (ic, &aop, FALSE); + emitcode ("mov", "%s,%s", + preg->name, + aopGet (left, 0, FALSE, TRUE)); + rname = preg->name; + } + else + rname = aopGet (left, 0, FALSE, FALSE); + + /* if bitfield then unpack the bits */ + if (IS_BITFIELD (retype)) + ifxCond = genUnpackBits (result, rname, PPOINTER, ifx); + else + { + /* we have can just get the values */ + int size = AOP_SIZE (result); + int offset = 0; + + while (size--) + { + + emitcode ("movx", "a,@%s", rname); + if (!ifx) + aopPut (result, "a", offset); + + offset++; + + if (size || pi) + emitcode ("inc", "%s", rname); + } + } + + /* now some housekeeping stuff */ + if (aop) /* we had to allocate for this iCode */ + { + if (pi) + aopPut (left, rname, 0); + freeAsmop (NULL, aop, ic, TRUE); + } + else + { + /* we did not allocate which means left + already in a pointer register, then + if size > 0 && this could be used again + we have to point it back to where it + belongs */ + if ((AOP_SIZE (result) > 1 && + !OP_SYMBOL (left)->remat && + (OP_SYMBOL (left)->liveTo > ic->seq || + ic->depth)) && + !pi) + { + int size = AOP_SIZE (result) - 1; + while (size--) + emitcode ("dec", "%s", rname); + } + } + + if (ifx && !ifx->generated) + { + genIfxJump (ifx, ifxCond, left, NULL, result, ic->next); + } + + /* done */ + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); + if (pi) pi->generated = 1; +} + +/*--------------------------------------------------------------------*/ +/* loadDptrFromOperand - load dptr (and optionally B) from operand op */ +/*--------------------------------------------------------------------*/ +static void +loadDptrFromOperand (operand *op, bool loadBToo) +{ + if (AOP_TYPE (op) != AOP_STR) + { + /* if this is rematerializable */ + if (AOP_TYPE (op) == AOP_IMMD) + { + emitcode ("mov", "dptr,%s", aopGet (op, 0, TRUE, FALSE)); + if (loadBToo) + { + if (AOP(op)->aopu.aop_immd.from_cast_remat) + emitcode ("mov", "b,%s",aopGet (op, AOP_SIZE(op)-1, FALSE, FALSE)); + else + { + wassertl(FALSE, "need pointerCode"); + emitcode (";", "mov b,???"); + /* genPointerGet and genPointerSet originally did different + ** things for this case. Both seem wrong. + ** from genPointerGet: + ** emitcode ("mov", "b,#%d", pointerCode (retype)); + ** from genPointerSet: + ** emitcode ("mov", "b,%s + 1", aopGet (result, 0, TRUE, FALSE)); + */ + } + } + } + else if (AOP_TYPE (op) == AOP_DPTR) + { + if (loadBToo) + { + MOVA (aopGet (op, 0, FALSE, FALSE)); + emitcode ("push", "acc"); + MOVA (aopGet (op, 1, FALSE, FALSE)); + emitcode ("push", "acc"); + emitcode ("mov", "b,%s", aopGet (op, 2, FALSE, FALSE)); + emitcode ("pop", "dph"); + emitcode ("pop", "dpl"); + } + else + { + MOVA (aopGet (op, 0, FALSE, FALSE)); + emitcode ("push", "acc"); + emitcode ("mov", "dph,%s", aopGet (op, 1, FALSE, FALSE)); + emitcode ("pop", "dpl"); + } + } + else + { /* we need to get it byte by byte */ + emitcode ("mov", "dpl,%s", aopGet (op, 0, FALSE, FALSE)); + emitcode ("mov", "dph,%s", aopGet (op, 1, FALSE, FALSE)); + if (loadBToo) + emitcode ("mov", "b,%s", aopGet (op, 2, FALSE, FALSE)); + } + } +} + +/*-----------------------------------------------------------------*/ +/* genFarPointerGet - get value from far space */ +/*-----------------------------------------------------------------*/ +static void +genFarPointerGet (operand * left, + operand * result, iCode * ic, iCode * pi, iCode * ifx) +{ + int size, offset; + char *ifxCond = "a"; + sym_link *retype = getSpec (operandType (result)); + + D (emitcode (";", "genFarPointerGet")); + + aopOp (left, ic, FALSE); + loadDptrFromOperand (left, FALSE); + + /* so dptr now contains the address */ + aopOp (result, ic, FALSE); + + /* if bit then unpack */ + if (IS_BITFIELD (retype)) + ifxCond = genUnpackBits (result, "dptr", FPOINTER, ifx); + else + { + size = AOP_SIZE (result); + offset = 0; + + while (size--) + { + emitcode ("movx", "a,@dptr"); + if (!ifx) + aopPut (result, "a", offset++); + if (size || pi) + emitcode ("inc", "dptr"); + } + } + + if (pi && AOP_TYPE (left) != AOP_IMMD && AOP_TYPE (left) != AOP_STR) + { + aopPut (left, "dpl", 0); + aopPut (left, "dph", 1); + pi->generated = 1; + } + + if (ifx && !ifx->generated) + { + genIfxJump (ifx, ifxCond, left, NULL, result, ic->next); + } + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genCodePointerGet - get value from code space */ +/*-----------------------------------------------------------------*/ +static void +genCodePointerGet (operand * left, + operand * result, iCode * ic, iCode *pi, iCode *ifx) +{ + int size, offset; + char *ifxCond = "a"; + sym_link *retype = getSpec (operandType (result)); + + D (emitcode (";", "genCodePointerGet")); + + aopOp (left, ic, FALSE); + loadDptrFromOperand (left, FALSE); + + /* so dptr now contains the address */ + aopOp (result, ic, FALSE); + + /* if bit then unpack */ + if (IS_BITFIELD (retype)) + ifxCond = genUnpackBits (result, "dptr", CPOINTER, ifx); + else + { + size = AOP_SIZE (result); + offset = 0; + + while (size--) + { + emitcode ("clr", "a"); + emitcode ("movc", "a,@a+dptr"); + if (!ifx) + aopPut (result, "a", offset++); + if (size || pi) + emitcode ("inc", "dptr"); + } + } + + if (pi && AOP_TYPE (left) != AOP_IMMD && AOP_TYPE (left) != AOP_STR) + { + aopPut (left, "dpl", 0); + aopPut (left, "dph", 1); + pi->generated = 1; + } + + if (ifx && !ifx->generated) + { + genIfxJump (ifx, ifxCond, left, NULL, result, ic->next); + } + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genGenPointerGet - get value from generic pointer space */ +/*-----------------------------------------------------------------*/ +static void +genGenPointerGet (operand * left, + operand * result, iCode * ic, iCode *pi, iCode *ifx) +{ + int size, offset; + char *ifxCond = "a"; + sym_link *retype = getSpec (operandType (result)); + + D (emitcode (";", "genGenPointerGet")); + + aopOp (left, ic, FALSE); + loadDptrFromOperand (left, TRUE); + + /* so dptr now contains the address */ + aopOp (result, ic, FALSE); + + /* if bit then unpack */ + if (IS_BITFIELD (retype)) + { + ifxCond = genUnpackBits (result, "dptr", GPOINTER, ifx); + } + else + { + size = AOP_SIZE (result); + offset = 0; + + while (size--) + { + emitcode ("lcall", "__gptrget"); + if (!ifx) + aopPut (result, "a", offset++); + if (size || pi) + emitcode ("inc", "dptr"); + } + } + + if (pi && AOP_TYPE (left) != AOP_IMMD && AOP_TYPE (left) != AOP_STR) + { + aopPut (left, "dpl", 0); + aopPut (left, "dph", 1); + pi->generated = 1; + } + + if (ifx && !ifx->generated) + { + genIfxJump (ifx, ifxCond, left, NULL, result, ic->next); + } + + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (left, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genPointerGet - generate code for pointer get */ +/*-----------------------------------------------------------------*/ +static void +genPointerGet (iCode * ic, iCode *pi, iCode *ifx) +{ + operand *left, *result; + sym_link *type, *etype; + int p_type; + + D (emitcode (";", "genPointerGet")); + + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + if (getSize (operandType (result))>1) + ifx = NULL; + + /* depending on the type of pointer we need to + move it to the correct pointer register */ + type = operandType (left); + etype = getSpec (type); + /* if left is of type of pointer then it is simple */ + if (IS_PTR (type) && !IS_FUNC (type->next)) + { + p_type = DCL_TYPE (type); + } + else + { + /* we have to go by the storage class */ + p_type = PTR_TYPE (SPEC_OCLS (etype)); + } + + /* special case when cast remat */ + if (p_type == GPOINTER && OP_SYMBOL(left)->remat && + IS_CAST_ICODE(OP_SYMBOL(left)->rematiCode)) + { + left = IC_RIGHT(OP_SYMBOL(left)->rematiCode); + type = operandType (left); + p_type = DCL_TYPE (type); + } + /* now that we have the pointer type we assign + the pointer values */ + switch (p_type) + { + + case POINTER: + case IPOINTER: + genNearPointerGet (left, result, ic, pi, ifx); + break; + + case PPOINTER: + genPagedPointerGet (left, result, ic, pi, ifx); + break; + + case FPOINTER: + genFarPointerGet (left, result, ic, pi, ifx); + break; + + case CPOINTER: + genCodePointerGet (left, result, ic, pi, ifx); + break; + + case GPOINTER: + genGenPointerGet (left, result, ic, pi, ifx); + break; + } +} + + +/*-----------------------------------------------------------------*/ +/* genPackBits - generates code for packed bit storage */ +/*-----------------------------------------------------------------*/ +static void +genPackBits (sym_link * etype, + operand * right, + char *rname, int p_type) +{ + int offset = 0; /* source byte offset */ + int rlen = 0; /* remaining bitfield length */ + int blen; /* bitfield length */ + int bstr; /* bitfield starting bit within byte */ + int litval; /* source literal value (if AOP_LIT) */ + unsigned char mask; /* bitmask within current byte */ + + D(emitcode (";", "genPackBits")); + + blen = SPEC_BLEN (etype); + bstr = SPEC_BSTR (etype); + + /* If the bitfield length is less than a byte */ + if (blen < 8) + { + mask = ((unsigned char) (0xFF << (blen + bstr)) | + (unsigned char) (0xFF >> (8 - bstr))); + + if (AOP_TYPE (right) == AOP_LIT) + { + /* Case with a bitfield length <8 and literal source + */ + litval = (int) ulFromVal (AOP (right)->aopu.aop_lit); + litval <<= bstr; + litval &= (~mask) & 0xff; + emitPtrByteGet (rname, p_type, FALSE); + if ((mask|litval)!=0xff) + emitcode ("anl","a,#0x%02x", mask); + if (litval) + emitcode ("orl","a,#0x%02x", litval); + } + else + { + if ((blen==1) && (p_type!=GPOINTER)) + { + /* Case with a bitfield length == 1 and no generic pointer + */ + if (AOP_TYPE (right) == AOP_CRY) + emitcode ("mov", "c,%s", AOP(right)->aopu.aop_dir); + else + { + MOVA (aopGet (right, 0, FALSE, FALSE)); + emitcode ("rrc","a"); + } + emitPtrByteGet (rname, p_type, FALSE); + emitcode ("mov","acc.%d,c",bstr); + } + else + { + bool pushedB; + /* Case with a bitfield length < 8 and arbitrary source + */ + MOVA (aopGet (right, 0, FALSE, FALSE)); + /* shift and mask source value */ + AccLsh (bstr); + emitcode ("anl", "a,#0x%02x", (~mask) & 0xff); + + pushedB = pushB (); + /* transfer A to B and get next byte */ + emitPtrByteGet (rname, p_type, TRUE); + + emitcode ("anl", "a,#0x%02x", mask); + emitcode ("orl", "a,b"); + if (p_type == GPOINTER) + emitcode ("pop", "b"); + + popB (pushedB); + } + } + + emitPtrByteSet (rname, p_type, "a"); + return; + } + + /* Bit length is greater than 7 bits. In this case, copy */ + /* all except the partial byte at the end */ + for (rlen=blen;rlen>=8;rlen-=8) + { + emitPtrByteSet (rname, p_type, + aopGet (right, offset++, FALSE, TRUE) ); + if (rlen>8) + emitcode ("inc", "%s", rname); + } + + /* If there was a partial byte at the end */ + if (rlen) + { + mask = (((unsigned char) -1 << rlen) & 0xff); + + if (AOP_TYPE (right) == AOP_LIT) + { + /* Case with partial byte and literal source + */ + litval = (int) ulFromVal (AOP (right)->aopu.aop_lit); + litval >>= (blen-rlen); + litval &= (~mask) & 0xff; + emitPtrByteGet (rname, p_type, FALSE); + if ((mask|litval)!=0xff) + emitcode ("anl","a,#0x%02x", mask); + if (litval) + emitcode ("orl","a,#0x%02x", litval); + } + else + { + bool pushedB; + /* Case with partial byte and arbitrary source + */ + MOVA (aopGet (right, offset++, FALSE, FALSE)); + emitcode ("anl", "a,#0x%02x", (~mask) & 0xff); + + pushedB = pushB (); + /* transfer A to B and get next byte */ + emitPtrByteGet (rname, p_type, TRUE); + + emitcode ("anl", "a,#0x%02x", mask); + emitcode ("orl", "a,b"); + if (p_type == GPOINTER) + emitcode ("pop", "b"); + + popB (pushedB); + } + emitPtrByteSet (rname, p_type, "a"); + } +} + + +/*-----------------------------------------------------------------*/ +/* genDataPointerSet - remat pointer to data space */ +/*-----------------------------------------------------------------*/ +static void +genDataPointerSet (operand * right, + operand * result, + iCode * ic) +{ + int size, offset = 0; + char *l, buffer[256]; + + D (emitcode (";", "genDataPointerSet")); + + aopOp (right, ic, FALSE); + + l = aopGet (result, 0, FALSE, TRUE); + l++; //remove # + size = max (AOP_SIZE (right), AOP_SIZE (result)); + while (size--) + { + if (offset) + SNPRINTF (buffer, sizeof(buffer), "(%s + %d)", l, offset); + else + SNPRINTF (buffer, sizeof(buffer), "%s", l); + emitcode ("mov", "%s,%s", buffer, + aopGet (right, offset++, FALSE, FALSE)); + } + + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genNearPointerSet - emitcode for near pointer put */ +/*-----------------------------------------------------------------*/ +static void +genNearPointerSet (operand * right, + operand * result, + iCode * ic, + iCode * pi) +{ + asmop *aop = NULL; + regs *preg = NULL; + char *rname, *l; + sym_link *retype, *letype; + sym_link *ptype = operandType (result); + + D (emitcode (";", "genNearPointerSet")); + + retype = getSpec (operandType (right)); + letype = getSpec (ptype); + + aopOp (result, ic, FALSE); + + /* if the result is rematerializable & + in data space & not a bit variable */ + if (AOP_TYPE (result) == AOP_IMMD && + DCL_TYPE (ptype) == POINTER && + !IS_BITVAR (retype) && + !IS_BITVAR (letype)) + { + genDataPointerSet (right, result, ic); + return; + } + + /* if the value is already in a pointer register + then don't need anything more */ + if (!AOP_INPREG (AOP (result))) + { + if (IS_AOP_PREG (result)) + { + // Aha, it is a pointer, just in disguise. + rname = aopGet (result, 0, FALSE, FALSE); + if (strcmp (rname, "a") == 0) + { + // It's in pdata or on xstack + rname = AOP (result)->aopu.aop_ptr->name; + emitcode ("mov", "%s,a", rname); + } + else if (*rname != '@') + { + fprintf(stderr, "probable internal error: unexpected rname @ %s:%d\n", + __FILE__, __LINE__); + } + else + { + // Expected case. + emitcode ("mov", "a%s,%s", rname + 1, rname); + rname++; // skip the '@'. + } + } + else + { + /* otherwise get a free pointer register */ + aop = newAsmop (0); + preg = getFreePtr (ic, &aop, FALSE); + emitcode ("mov", "%s,%s", + preg->name, + aopGet (result, 0, FALSE, TRUE)); + rname = preg->name; + } + } + else + { + rname = aopGet (result, 0, FALSE, FALSE); + } + + aopOp (right, ic, FALSE); + + /* if bitfield then unpack the bits */ + if (IS_BITFIELD (retype) || IS_BITFIELD (letype)) + genPackBits ((IS_BITFIELD (retype) ? retype : letype), right, rname, POINTER); + else + { + /* we can just get the values */ + int size = AOP_SIZE (right); + int offset = 0; + + while (size--) + { + l = aopGet (right, offset, FALSE, TRUE); + if ((*l == '@') || (strcmp (l, "acc") == 0)) + { + MOVA (l); + emitcode ("mov", "@%s,a", rname); + } + else + emitcode ("mov", "@%s,%s", rname, l); + if (size || pi) + emitcode ("inc", "%s", rname); + offset++; + } + } + + /* now some housekeeping stuff */ + if (aop) /* we had to allocate for this iCode */ + { + if (pi) + aopPut (result, rname, 0); + freeAsmop (NULL, aop, ic, TRUE); + } + else + { + /* we did not allocate which means left + already in a pointer register, then + if size > 0 && this could be used again + we have to point it back to where it + belongs */ + if ((AOP_SIZE (right) > 1 && + !OP_SYMBOL (result)->remat && + (OP_SYMBOL (result)->liveTo > ic->seq || + ic->depth)) && + !pi) + { + int size = AOP_SIZE (right) - 1; + while (size--) + emitcode ("dec", "%s", rname); + } + } + + /* done */ + if (pi) + pi->generated = 1; + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genPagedPointerSet - emitcode for Paged pointer put */ +/*-----------------------------------------------------------------*/ +static void +genPagedPointerSet (operand * right, + operand * result, + iCode * ic, + iCode * pi) +{ + asmop *aop = NULL; + regs *preg = NULL; + char *rname, *l; + sym_link *retype, *letype; + + D (emitcode (";", "genPagedPointerSet")); + + retype = getSpec (operandType (right)); + letype = getSpec (operandType (result)); + + aopOp (result, ic, FALSE); + + /* if the value is already in a pointer register + then don't need anything more */ + if (!AOP_INPREG (AOP (result))) + { + if (IS_AOP_PREG (result)) + { + // Aha, it is a pointer, just in disguise. + rname = aopGet (result, 0, FALSE, FALSE); + if (*rname != '@') + { + fprintf(stderr, "probable internal error: unexpected rname @ %s:%d\n", + __FILE__, __LINE__); + } + else + { + // Expected case. + emitcode ("mov", "a%s,%s", rname + 1, rname); + rname++; // skip the '@'. + } + } + else + { + /* otherwise get a free pointer register */ + aop = newAsmop (0); + preg = getFreePtr (ic, &aop, FALSE); + emitcode ("mov", "%s,%s", + preg->name, + aopGet (result, 0, FALSE, TRUE)); + rname = preg->name; + } + } + else + { + rname = aopGet (result, 0, FALSE, FALSE); + } + + aopOp (right, ic, FALSE); + + /* if bitfield then unpack the bits */ + if (IS_BITFIELD (retype) || IS_BITFIELD (letype)) + genPackBits ((IS_BITFIELD (retype) ? retype : letype), right, rname, PPOINTER); + else + { + /* we can just get the values */ + int size = AOP_SIZE (right); + int offset = 0; + + while (size--) + { + l = aopGet (right, offset, FALSE, TRUE); + MOVA (l); + emitcode ("movx", "@%s,a", rname); + if (size || pi) + emitcode ("inc", "%s", rname); + offset++; + } + } + + /* now some housekeeping stuff */ + if (aop) /* we had to allocate for this iCode */ + { + if (pi) + aopPut (result, rname, 0); + freeAsmop (NULL, aop, ic, TRUE); + } + else + { + /* we did not allocate which means left + already in a pointer register, then + if size > 0 && this could be used again + we have to point it back to where it + belongs */ + if (AOP_SIZE (right) > 1 && + !OP_SYMBOL (result)->remat && + (OP_SYMBOL (result)->liveTo > ic->seq || ic->depth) && + !pi) + { + int size = AOP_SIZE (right) - 1; + while (size--) + emitcode ("dec", "%s", rname); + } + } + + /* done */ + if (pi) + pi->generated = 1; + freeAsmop (right, NULL, ic, TRUE); + freeAsmop (result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genFarPointerSet - set value from far space */ +/*-----------------------------------------------------------------*/ +static void +genFarPointerSet (operand * right, + operand * result, iCode * ic, iCode * pi) +{ + int size, offset; + sym_link *retype = getSpec (operandType (right)); + sym_link *letype = getSpec (operandType (result)); + + D(emitcode (";", "genFarPointerSet")); + + aopOp (result, ic, FALSE); + loadDptrFromOperand (result, FALSE); + + /* so dptr now contains the address */ + aopOp (right, ic, FALSE); + + /* if bit then unpack */ + if (IS_BITFIELD (retype) || IS_BITFIELD (letype)) + genPackBits ((IS_BITFIELD (retype) ? retype : letype), right, "dptr", FPOINTER); + else + { + size = AOP_SIZE (right); + offset = 0; + + while (size--) + { + char *l = aopGet (right, offset++, FALSE, FALSE); + MOVA (l); + emitcode ("movx", "@dptr,a"); + if (size || pi) + emitcode ("inc", "dptr"); + } + } + if (pi && AOP_TYPE (result) != AOP_STR && AOP_TYPE (result) != AOP_IMMD) { + aopPut (result, "dpl", 0); + aopPut (result, "dph", 1); + pi->generated=1; + } + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genGenPointerSet - set value from generic pointer space */ +/*-----------------------------------------------------------------*/ +static void +genGenPointerSet (operand * right, + operand * result, iCode * ic, iCode * pi) +{ + int size, offset; + sym_link *retype = getSpec (operandType (right)); + sym_link *letype = getSpec (operandType (result)); + + D (emitcode (";", "genGenPointerSet")); + + aopOp (result, ic, FALSE); + loadDptrFromOperand (result, TRUE); + + /* so dptr now contains the address */ + aopOp (right, ic, FALSE); + + /* if bit then unpack */ + if (IS_BITFIELD (retype) || IS_BITFIELD (letype)) + { + genPackBits ((IS_BITFIELD (retype) ? retype : letype), right, "dptr", GPOINTER); + } + else + { + size = AOP_SIZE (right); + offset = 0; + + while (size--) + { + char *l = aopGet (right, offset++, FALSE, FALSE); + MOVA (l); + emitcode ("lcall", "__gptrput"); + if (size || pi) + emitcode ("inc", "dptr"); + } + } + + if (pi && AOP_TYPE (result) != AOP_STR && AOP_TYPE (result) != AOP_IMMD) { + aopPut (result, "dpl", 0); + aopPut (result, "dph", 1); + pi->generated=1; + } + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genPointerSet - stores the value into a pointer location */ +/*-----------------------------------------------------------------*/ +static void +genPointerSet (iCode * ic, iCode *pi) +{ + operand *right, *result; + sym_link *type, *etype; + int p_type; + + D (emitcode (";", "genPointerSet")); + + right = IC_RIGHT (ic); + result = IC_RESULT (ic); + + /* depending on the type of pointer we need to + move it to the correct pointer register */ + type = operandType (result); + etype = getSpec (type); + /* if left is of type of pointer then it is simple */ + if (IS_PTR (type) && !IS_FUNC (type->next)) + { + p_type = DCL_TYPE (type); + } + else + { + /* we have to go by the storage class */ + p_type = PTR_TYPE (SPEC_OCLS (etype)); + } + + /* special case when cast remat */ + if (p_type == GPOINTER && OP_SYMBOL(result)->remat && + IS_CAST_ICODE(OP_SYMBOL(result)->rematiCode)) { + result = IC_RIGHT(OP_SYMBOL(result)->rematiCode); + type = operandType (result); + p_type = DCL_TYPE (type); + } + + /* now that we have the pointer type we assign + the pointer values */ + switch (p_type) + { + + case POINTER: + case IPOINTER: + genNearPointerSet (right, result, ic, pi); + break; + + case PPOINTER: + genPagedPointerSet (right, result, ic, pi); + break; + + case FPOINTER: + genFarPointerSet (right, result, ic, pi); + break; + + case GPOINTER: + genGenPointerSet (right, result, ic, pi); + break; + + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "genPointerSet: illegal pointer type"); + } +} + +/*-----------------------------------------------------------------*/ +/* genIfx - generate code for Ifx statement */ +/*-----------------------------------------------------------------*/ +static void +genIfx (iCode * ic, iCode * popIc) +{ + operand *cond = IC_COND (ic); + int isbit = 0; + char *dup = NULL; + + D (emitcode (";", "genIfx")); + + aopOp (cond, ic, FALSE); + + /* get the value into acc */ + if (AOP_TYPE (cond) != AOP_CRY) + { + toBoolean (cond); + } + else + { + isbit = 1; + if (AOP(cond)->aopu.aop_dir) + dup = Safe_strdup(AOP(cond)->aopu.aop_dir); + } + + /* the result is now in the accumulator or a directly addressable bit */ + freeAsmop (cond, NULL, ic, TRUE); + + /* if the condition is a bit variable */ + if (isbit && dup) + genIfxJump(ic, dup, NULL, NULL, NULL, popIc); + else if (isbit && IS_ITEMP (cond) && SPIL_LOC (cond)) + genIfxJump (ic, SPIL_LOC (cond)->rname, NULL, NULL, NULL, popIc); + else if (isbit && !IS_ITEMP (cond)) + genIfxJump (ic, OP_SYMBOL (cond)->rname, NULL, NULL, NULL, popIc); + else + genIfxJump (ic, "a", NULL, NULL, NULL, popIc); + + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genAddrOf - generates code for address of */ +/*-----------------------------------------------------------------*/ +static void +genAddrOf (iCode * ic) +{ + symbol *sym = OP_SYMBOL (IC_LEFT (ic)); + int size, offset; + + D (emitcode (";", "genAddrOf")); + + aopOp (IC_RESULT (ic), ic, FALSE); + + /* if the operand is on the stack then we + need to get the stack offset of this + variable */ + if (sym->onStack) + { + /* if it has an offset then we need to compute it */ + if (sym->stack) + { + int stack_offset = ((sym->stack < 0) ? + ((char) (sym->stack - _G.nRegsSaved)) : + ((char) sym->stack)) & 0xff; + if ((abs(stack_offset) == 1) && + !AOP_NEEDSACC(IC_RESULT (ic)) && + !isOperandVolatile (IC_RESULT (ic), FALSE)) + { + aopPut (IC_RESULT (ic), SYM_BP (sym), 0); + if (stack_offset > 0) + emitcode ("inc", "%s", aopGet (IC_RESULT (ic), LSB, FALSE, FALSE)); + else + emitcode ("dec", "%s", aopGet (IC_RESULT (ic), LSB, FALSE, FALSE)); + } + else + { + emitcode ("mov", "a,%s", SYM_BP (sym)); + emitcode ("add", "a,#0x%02x", stack_offset & 0xff); + aopPut (IC_RESULT (ic), "a", 0); + } + } + else + { + /* we can just move _bp */ + aopPut (IC_RESULT (ic), SYM_BP (sym), 0); + } + /* fill the result with zero */ + size = AOP_SIZE (IC_RESULT (ic)) - 1; + + offset = 1; + while (size--) + { + aopPut (IC_RESULT (ic), zero, offset++); + } + goto release; + } + + /* object not on stack then we need the name */ + size = getDataSize (IC_RESULT (ic)); + offset = 0; + + while (size--) + { + char s[SDCC_NAME_MAX]; + if (offset) + { + sprintf (s, "#(%s >> %d)", + sym->rname, + offset * 8); + } + else + { + SNPRINTF (s, sizeof(s), "#%s", sym->rname); + } + aopPut (IC_RESULT (ic), s, offset++); + } + if (opIsGptr (IC_RESULT (ic))) + { + char buffer[10]; + SNPRINTF (buffer, sizeof(buffer), + "#0x%02x", pointerTypeToGPByte (pointerCode (getSpec (operandType (IC_LEFT (ic)))), NULL, NULL)); + aopPut (IC_RESULT (ic), buffer, GPTRSIZE - 1); + } + +release: + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genFarFarAssign - assignment when both are in far space */ +/*-----------------------------------------------------------------*/ +static void +genFarFarAssign (operand * result, operand * right, iCode * ic) +{ + int size = AOP_SIZE (right); + int offset = 0; + char *l; + + D (emitcode (";", "genFarFarAssign")); + + /* first push the right side on to the stack */ + while (size--) + { + l = aopGet (right, offset++, FALSE, FALSE); + MOVA (l); + emitcode ("push", "acc"); + } + + freeAsmop (right, NULL, ic, FALSE); + /* now assign DPTR to result */ + aopOp (result, ic, FALSE); + size = AOP_SIZE (result); + while (size--) + { + emitcode ("pop", "acc"); + aopPut (result, "a", --offset); + } + freeAsmop (result, NULL, ic, FALSE); +} + +/*-----------------------------------------------------------------*/ +/* genAssign - generate code for assignment */ +/*-----------------------------------------------------------------*/ +static void +genAssign (iCode * ic) +{ + operand *result, *right; + int size, offset; + unsigned long lit = 0L; + + D (emitcode (";", "genAssign")); + + result = IC_RESULT (ic); + right = IC_RIGHT (ic); + + /* if they are the same */ + if (operandsEqu (result, right) && + !isOperandVolatile (result, FALSE) && + !isOperandVolatile (right, FALSE)) + return; + + aopOp (right, ic, FALSE); + + /* special case both in far space */ + if (AOP_TYPE (right) == AOP_DPTR && + IS_TRUE_SYMOP (result) && + isOperandInFarSpace (result)) + { + genFarFarAssign (result, right, ic); + return; + } + + aopOp (result, ic, TRUE); + + /* if they are the same registers */ + if (sameRegs (AOP (right), AOP (result)) && + !isOperandVolatile (result, FALSE) && + !isOperandVolatile (right, FALSE)) + goto release; + + /* if the result is a bit */ + if (AOP_TYPE (result) == AOP_CRY) + { + assignBit (result, right); + goto release; + } + + /* bit variables done */ + /* general case */ + size = getDataSize (result); + offset = 0; + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + if ((size > 1) && + (AOP_TYPE (result) != AOP_REG) && + (AOP_TYPE (right) == AOP_LIT) && + !IS_FLOAT (operandType (right)) && + (lit < 256L)) + { + while ((size) && (lit)) + { + aopPut (result, + aopGet (right, offset, FALSE, FALSE), + offset); + lit >>= 8; + offset++; + size--; + } + /* And now fill the rest with zeros. */ + if (size) + { + emitcode ("clr", "a"); + } + while (size--) + { + aopPut (result, "a", offset); + offset++; + } + } + else + { + while (size--) + { + aopPut (result, + aopGet (right, offset, FALSE, FALSE), + offset); + offset++; + } + } + adjustArithmeticResult (ic); + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genJumpTab - generates code for jump table */ +/*-----------------------------------------------------------------*/ +static void +genJumpTab (iCode * ic) +{ + symbol *jtab,*jtablo,*jtabhi; + char *l; + unsigned int count; + + D (emitcode (";", "genJumpTab")); + + count = elementsInSet( IC_JTLABELS (ic) ); + + if( count <= 16 ) + { + /* this algorithm needs 9 cycles and 7 + 3*n bytes + if the switch argument is in a register. + (8 cycles and 6+2*n bytes if peepholes can change ljmp to sjmp) */ + /* Peephole may not convert ljmp to sjmp or ret + labelIsReturnOnly & labelInRange must check + currPl->ic->op != JUMPTABLE */ + aopOp (IC_JTCOND (ic), ic, FALSE); + /* get the condition into accumulator */ + l = aopGet (IC_JTCOND (ic), 0, FALSE, FALSE); + MOVA (l); + /* multiply by three */ + if (aopGetUsesAcc (IC_JTCOND (ic), 0)) + { + emitcode ("mov", "b,#0x03"); + emitcode ("mul", "ab"); + } + else + { + emitcode ("add", "a,acc"); + emitcode ("add", "a,%s", aopGet (IC_JTCOND (ic), 0, FALSE, FALSE)); + } + freeAsmop (IC_JTCOND (ic), NULL, ic, TRUE); + + jtab = newiTempLabel (NULL); + emitcode ("mov", "dptr,#%05d$", jtab->key + 100); + emitcode ("jmp", "@a+dptr"); + emitLabel (jtab); + /* now generate the jump labels */ + for (jtab = setFirstItem (IC_JTLABELS (ic)); jtab; + jtab = setNextItem (IC_JTLABELS (ic))) + emitcode ("ljmp", "%05d$", jtab->key + 100); + } + else + { + /* this algorithm needs 14 cycles and 13 + 2*n bytes + if the switch argument is in a register. + For n>6 this algorithm may be more compact */ + jtablo = newiTempLabel (NULL); + jtabhi = newiTempLabel (NULL); + + /* get the condition into accumulator. + Using b as temporary storage, if register push/pop is needed */ + aopOp (IC_JTCOND (ic), ic, FALSE); + l = aopGet (IC_JTCOND (ic), 0, FALSE, FALSE); + if ((AOP_TYPE (IC_JTCOND (ic)) == AOP_R0 && _G.r0Pushed) || + (AOP_TYPE (IC_JTCOND (ic)) == AOP_R1 && _G.r1Pushed)) + { + // (MB) what if B is in use??? + wassertl(!BINUSE, "B was in use"); + emitcode ("mov", "b,%s", l); + l = "b"; + } + freeAsmop (IC_JTCOND (ic), NULL, ic, TRUE); + MOVA (l); + if( count <= 112 ) + { + emitcode ("add", "a,#(%05d$-3-.)", jtablo->key + 100); + emitcode ("movc", "a,@a+pc"); + emitcode ("push", "acc"); + + MOVA (l); + emitcode ("add", "a,#(%05d$-3-.)", jtabhi->key + 100); + emitcode ("movc", "a,@a+pc"); + emitcode ("push", "acc"); + } + else + { + /* this scales up to n<=255, but needs two more bytes + and changes dptr */ + emitcode ("mov", "dptr,#%05d$", jtablo->key + 100); + emitcode ("movc", "a,@a+dptr"); + emitcode ("push", "acc"); + + MOVA (l); + emitcode ("mov", "dptr,#%05d$", jtabhi->key + 100); + emitcode ("movc", "a,@a+dptr"); + emitcode ("push", "acc"); + } + + emitcode ("ret", ""); + + /* now generate jump table, LSB */ + emitLabel (jtablo); + for (jtab = setFirstItem (IC_JTLABELS (ic)); jtab; + jtab = setNextItem (IC_JTLABELS (ic))) + emitcode (".db", "%05d$", jtab->key + 100); + + /* now generate jump table, MSB */ + emitLabel (jtabhi); + for (jtab = setFirstItem (IC_JTLABELS (ic)); jtab; + jtab = setNextItem (IC_JTLABELS (ic))) + emitcode (".db", "%05d$>>8", jtab->key + 100); + } +} + +/*-----------------------------------------------------------------*/ +/* genCast - gen code for casting */ +/*-----------------------------------------------------------------*/ +static void +genCast (iCode * ic) +{ + operand *result = IC_RESULT (ic); + sym_link *ctype = operandType (IC_LEFT (ic)); + sym_link *rtype = operandType (IC_RIGHT (ic)); + operand *right = IC_RIGHT (ic); + int size, offset; + + D (emitcode (";", "genCast")); + + /* if they are equivalent then do nothing */ + if (operandsEqu (IC_RESULT (ic), IC_RIGHT (ic))) + return; + + aopOp (right, ic, FALSE); + aopOp (result, ic, FALSE); + + /* if the result is a bit (and not a bitfield) */ + if (IS_BIT (OP_SYMBOL (result)->type)) + { + assignBit (result, right); + goto release; + } + + /* if they are the same size : or less */ + if (AOP_SIZE (result) <= AOP_SIZE (right)) + { + + /* if they are in the same place */ + if (sameRegs (AOP (right), AOP (result))) + goto release; + + /* if they in different places then copy */ + size = AOP_SIZE (result); + offset = 0; + while (size--) + { + aopPut (result, + aopGet (right, offset, FALSE, FALSE), + offset); + offset++; + } + goto release; + } + + /* if the result is of type pointer */ + if (IS_PTR (ctype)) + { + int p_type; + sym_link *type = operandType (right); + sym_link *etype = getSpec (type); + + /* pointer to generic pointer */ + if (IS_GENPTR (ctype)) + { + if (IS_PTR (type)) + { + p_type = DCL_TYPE (type); + } + else + { + if (SPEC_SCLS(etype)==S_REGISTER) { + // let's assume it is a generic pointer + p_type=GPOINTER; + } else { + /* we have to go by the storage class */ + p_type = PTR_TYPE (SPEC_OCLS (etype)); + } + } + + /* the first two bytes are known */ + size = GPTRSIZE - 1; + offset = 0; + while (size--) + { + aopPut (result, + aopGet (right, offset, FALSE, FALSE), + offset); + offset++; + } + /* the last byte depending on type */ + { + int gpVal = pointerTypeToGPByte(p_type, NULL, NULL); + char gpValStr[10]; + + if (gpVal == -1) + { + // pointerTypeToGPByte will have bitched. + exit(1); + } + + sprintf(gpValStr, "#0x%02x", gpVal); + aopPut (result, gpValStr, GPTRSIZE - 1); + } + goto release; + } + + /* just copy the pointers */ + size = AOP_SIZE (result); + offset = 0; + while (size--) + { + aopPut (result, + aopGet (right, offset, FALSE, FALSE), + offset); + offset++; + } + goto release; + } + + /* so we now know that the size of destination is greater + than the size of the source */ + /* we move to result for the size of source */ + size = AOP_SIZE (right); + offset = 0; + while (size--) + { + aopPut (result, + aopGet (right, offset, FALSE, FALSE), + offset); + offset++; + } + + /* now depending on the sign of the source && destination */ + size = AOP_SIZE (result) - AOP_SIZE (right); + /* if unsigned or not an integral type */ + if (!IS_SPEC (rtype) || SPEC_USIGN (rtype) || AOP_TYPE(right)==AOP_CRY) + { + while (size--) + aopPut (result, zero, offset++); + } + else + { + /* we need to extend the sign :{ */ + char *l = aopGet (right, AOP_SIZE (right) - 1, + FALSE, FALSE); + MOVA (l); + emitcode ("rlc", "a"); + emitcode ("subb", "a,acc"); + while (size--) + aopPut (result, "a", offset++); + } + + /* we are done hurray !!!! */ + +release: + freeAsmop (result, NULL, ic, TRUE); + freeAsmop (right, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genDjnz - generate decrement & jump if not zero instrucion */ +/*-----------------------------------------------------------------*/ +static int +genDjnz (iCode * ic, iCode * ifx) +{ + symbol *lbl, *lbl1; + if (!ifx) + return 0; + + /* if the if condition has a false label + then we cannot save */ + if (IC_FALSE (ifx)) + return 0; + + /* if the minus is not of the form a = a - 1 */ + if (!isOperandEqual (IC_RESULT (ic), IC_LEFT (ic)) || + !IS_OP_LITERAL (IC_RIGHT (ic))) + return 0; + + if (operandLitValue (IC_RIGHT (ic)) != 1) + return 0; + + /* if the size of this greater than one then no + saving */ + if (getSize (operandType (IC_RESULT (ic))) > 1) + return 0; + + /* otherwise we can save BIG */ + + D (emitcode (";", "genDjnz")); + + lbl = newiTempLabel (NULL); + lbl1 = newiTempLabel (NULL); + + aopOp (IC_RESULT (ic), ic, FALSE); + + if (AOP_NEEDSACC(IC_RESULT(ic))) + { + /* If the result is accessed indirectly via + * the accumulator, we must explicitly write + * it back after the decrement. + */ + char *rByte = aopGet (IC_RESULT(ic), 0, FALSE, FALSE); + + if (strcmp(rByte, "a")) + { + /* Something is hopelessly wrong */ + fprintf(stderr, "*** warning: internal error at %s:%d\n", + __FILE__, __LINE__); + /* We can just give up; the generated code will be inefficient, + * but what the hey. + */ + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + return 0; + } + emitcode ("dec", "%s", rByte); + aopPut (IC_RESULT (ic), rByte, 0); + emitcode ("jnz", "%05d$", lbl->key + 100); + } + else if (IS_AOP_PREG (IC_RESULT (ic))) + { + emitcode ("dec", "%s", + aopGet (IC_RESULT (ic), 0, FALSE, FALSE)); + MOVA (aopGet (IC_RESULT (ic), 0, FALSE, FALSE)); + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + ifx->generated = 1; + emitcode ("jnz", "%05d$", lbl->key + 100); + } + else + { + emitcode ("djnz", "%s,%05d$", aopGet (IC_RESULT (ic), 0, FALSE, FALSE), + lbl->key + 100); + } + emitcode ("sjmp", "%05d$", lbl1->key + 100); + emitLabel (lbl); + emitcode ("ljmp", "%05d$", IC_TRUE (ifx)->key + 100); + emitLabel (lbl1); + + if (!ifx->generated) + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + ifx->generated = 1; + return 1; +} + +/*-----------------------------------------------------------------*/ +/* genReceive - generate code for a receive iCode */ +/*-----------------------------------------------------------------*/ +static void +genReceive (iCode * ic) +{ + int size = getSize (operandType (IC_RESULT (ic))); + int offset = 0; + + D (emitcode (";", "genReceive")); + + if (ic->argreg == 1) + { /* first parameter */ + if ((isOperandInFarSpace (IC_RESULT (ic)) || + isOperandInPagedSpace (IC_RESULT (ic))) && + (OP_SYMBOL (IC_RESULT (ic))->isspilt || + IS_TRUE_SYMOP (IC_RESULT (ic)))) + { + regs *tempRegs[4]; + int receivingA = 0; + int roffset = 0; + + for (offset = 0; offset0; offset--) + emitcode("mov","%s,%s", tempRegs[roffset++]->name, fReturn[offset]); + emitcode("mov","a,%s", fReturn[0]); + _G.accInUse++; + aopOp (IC_RESULT (ic), ic, FALSE); + _G.accInUse--; + aopPut (IC_RESULT (ic), "a", offset); + for (offset = 1; offsetname, offset); + goto release; + } + } + else + { + if (getTempRegs(tempRegs, size, ic)) + { + for (offset = 0; offsetname, fReturn[offset]); + aopOp (IC_RESULT (ic), ic, FALSE); + for (offset = 0; offsetname, offset); + goto release; + } + } + + offset = fReturnSizeMCS51 - size; + while (size--) + { + emitcode ("push", "%s", (strcmp (fReturn[fReturnSizeMCS51 - offset - 1], "a") ? + fReturn[fReturnSizeMCS51 - offset - 1] : "acc")); + offset++; + } + aopOp (IC_RESULT (ic), ic, FALSE); + size = AOP_SIZE (IC_RESULT (ic)); + offset = 0; + while (size--) + { + emitcode ("pop", "acc"); + aopPut (IC_RESULT (ic), "a", offset++); + } + } + else + { + _G.accInUse++; + aopOp (IC_RESULT (ic), ic, FALSE); + _G.accInUse--; + assignResultValue (IC_RESULT (ic), NULL); + } + } + else if (ic->argreg > 12) + { /* bit parameters */ + regs *reg = OP_SYMBOL (IC_RESULT (ic))->regs[0]; + + BitBankUsed = 1; + if (!reg || reg->rIdx != ic->argreg-5) + { + aopOp (IC_RESULT (ic), ic, FALSE); + emitcode ("mov", "c,%s", rb1regs[ic->argreg-5]); + outBitC(IC_RESULT (ic)); + } + } + else + { /* other parameters */ + int rb1off ; + aopOp (IC_RESULT (ic), ic, FALSE); + rb1off = ic->argreg; + while (size--) + { + aopPut (IC_RESULT (ic), rb1regs[rb1off++ -5], offset++); + } + } + +release: + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genDummyRead - generate code for dummy read of volatiles */ +/*-----------------------------------------------------------------*/ +static void +genDummyRead (iCode * ic) +{ + operand *op; + int size, offset; + + D (emitcode(";", "genDummyRead")); + + op = IC_RIGHT (ic); + if (op && IS_SYMOP (op)) + { + aopOp (op, ic, FALSE); + + /* if the result is a bit */ + if (AOP_TYPE (op) == AOP_CRY) + emitcode ("mov", "c,%s", AOP (op)->aopu.aop_dir); + else + { + /* bit variables done */ + /* general case */ + size = AOP_SIZE (op); + offset = 0; + while (size--) + { + MOVA (aopGet (op, offset, FALSE, FALSE)); + offset++; + } + } + + freeAsmop (op, NULL, ic, TRUE); + } + + op = IC_LEFT (ic); + if (op && IS_SYMOP (op)) + { + aopOp (op, ic, FALSE); + + /* if the result is a bit */ + if (AOP_TYPE (op) == AOP_CRY) + emitcode ("mov", "c,%s", AOP (op)->aopu.aop_dir); + else + { + /* bit variables done */ + /* general case */ + size = AOP_SIZE (op); + offset = 0; + while (size--) + { + MOVA (aopGet (op, offset, FALSE, FALSE)); + offset++; + } + } + + freeAsmop (op, NULL, ic, TRUE); + } +} + +/*-----------------------------------------------------------------*/ +/* genCritical - generate code for start of a critical sequence */ +/*-----------------------------------------------------------------*/ +static void +genCritical (iCode *ic) +{ + symbol *tlbl = newiTempLabel (NULL); + + D (emitcode(";", "genCritical")); + + if (IC_RESULT (ic)) + { + aopOp (IC_RESULT (ic), ic, TRUE); + aopPut (IC_RESULT (ic), one, 0); /* save old ea in an operand */ + emitcode ("jbc", "ea,%05d$", (tlbl->key + 100)); /* atomic test & clear */ + aopPut (IC_RESULT (ic), zero, 0); + emitLabel (tlbl); + freeAsmop (IC_RESULT (ic), NULL, ic, TRUE); + } + else + { + emitcode ("setb", "c"); + emitcode ("jbc", "ea,%05d$", (tlbl->key + 100)); /* atomic test & clear */ + emitcode ("clr", "c"); + emitLabel (tlbl); + emitcode ("push", "psw"); /* save old ea via c in psw on top of stack*/ + } +} + +/*-----------------------------------------------------------------*/ +/* genEndCritical - generate code for end of a critical sequence */ +/*-----------------------------------------------------------------*/ +static void +genEndCritical (iCode *ic) +{ + D(emitcode(";", "genEndCritical")); + + if (IC_RIGHT (ic)) + { + aopOp (IC_RIGHT (ic), ic, FALSE); + if (AOP_TYPE (IC_RIGHT (ic)) == AOP_CRY) + { + emitcode ("mov", "c,%s", IC_RIGHT (ic)->aop->aopu.aop_dir); + emitcode ("mov", "ea,c"); + } + else + { + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_DUMMY) + MOVA (aopGet (IC_RIGHT (ic), 0, FALSE, FALSE)); + emitcode ("rrc", "a"); + emitcode ("mov", "ea,c"); + } + freeAsmop (IC_RIGHT (ic), NULL, ic, TRUE); + } + else + { + emitcode ("pop", "psw"); /* restore ea via c in psw on top of stack */ + emitcode ("mov", "ea,c"); + } +} + +/*-----------------------------------------------------------------*/ +/* gen51Code - generate code for 8051 based controllers */ +/*-----------------------------------------------------------------*/ +void +gen51Code (iCode * lic) +{ + iCode *ic; + int cln = 0; + /* int cseq = 0; */ + + _G.currentFunc = NULL; + lineHead = lineCurr = NULL; + + /* print the allocation information */ + if (allocInfo && currFunc) + printAllocInfo (currFunc, codeOutBuf); + /* if debug information required */ + if (options.debug && currFunc) + { + debugFile->writeFunction (currFunc, lic); + } + /* stack pointer name */ + if (options.useXstack) + spname = "_spx"; + else + spname = "sp"; + + + for (ic = lic; ic; ic = ic->next) + { + _G.current_iCode = ic; + + if (ic->lineno && cln != ic->lineno) + { + if (options.debug) + { + debugFile->writeCLine (ic); + } + if (!options.noCcodeInAsm) { + emitcode (";", "%s:%d: %s", ic->filename, ic->lineno, + printCLine(ic->filename, ic->lineno)); + } + cln = ic->lineno; + } + #if 0 + if (ic->seqPoint && ic->seqPoint != cseq) + { + emitcode (";", "sequence point %d", ic->seqPoint); + cseq = ic->seqPoint; + } + #endif + if (options.iCodeInAsm) { + char regsInUse[80]; + int i; + const char *iLine; + + #if 0 + for (i=0; i<8; i++) { + sprintf (®sInUse[i], + "%c", ic->riu & (1<rMask, i)) + { + int offset = regs8051[i].offset; + regsInUse[offset] = offset + '0'; /* show rMask */ + } + #endif + } + iLine = printILine(ic); + emitcode(";", "[%s] ic:%d: %s", regsInUse, ic->seq, iLine); + dbuf_free(iLine); + } + /* if the result is marked as + spilt and rematerializable or code for + this has already been generated then + do nothing */ + if (resultRemat (ic) || ic->generated) + continue; + + /* depending on the operation */ + switch (ic->op) + { + case '!': + genNot (ic); + break; + + case '~': + genCpl (ic); + break; + + case UNARYMINUS: + genUminus (ic); + break; + + case IPUSH: + genIpush (ic); + break; + + case IPOP: + { + iCode *ifxIc, *popIc; + bool CommonRegs = FALSE; + + /* IPOP happens only when trying to restore a + spilt live range, if there is an ifx statement + following this pop (or several) then the if statement might + be using some of the registers being popped which + would destory the contents of the register so + we need to check for this condition and handle it */ + for (ifxIc = ic->next; ifxIc && ifxIc->op == IPOP; ifxIc = ifxIc->next); + for (popIc = ic; popIc && popIc->op == IPOP; popIc = popIc->next) + CommonRegs |= (ifxIc && ifxIc->op == IFX && !ifxIc->generated && + regsInCommon (IC_LEFT (popIc), IC_COND (ifxIc))); + if (CommonRegs) + genIfx (ifxIc, ic); + else + genIpop (ic); + } + break; + + case CALL: + genCall (ic); + break; + + case PCALL: + genPcall (ic); + break; + + case FUNCTION: + genFunction (ic); + break; + + case ENDFUNCTION: + genEndFunction (ic); + break; + + case RETURN: + genRet (ic); + break; + + case LABEL: + genLabel (ic); + break; + + case GOTO: + genGoto (ic); + break; + + case '+': + genPlus (ic); + break; + + case '-': + if (!genDjnz (ic, ifxForOp (IC_RESULT (ic), ic))) + genMinus (ic); + break; + + case '*': + genMult (ic); + break; + + case '/': + genDiv (ic); + break; + + case '%': + genMod (ic); + break; + + case '>': + genCmpGt (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case '<': + genCmpLt (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case LE_OP: + case GE_OP: + case NE_OP: + + /* note these two are xlated by algebraic equivalence + in decorateType() in SDCCast.c */ + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "got '>=' or '<=' shouldn't have come here"); + break; + + case EQ_OP: + genCmpEq (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case AND_OP: + genAndOp (ic); + break; + + case OR_OP: + genOrOp (ic); + break; + + case '^': + genXor (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case '|': + genOr (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case BITWISEAND: + genAnd (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case INLINEASM: + genInline (ic); + break; + + case RRC: + genRRC (ic); + break; + + case RLC: + genRLC (ic); + break; + + case GETHBIT: + genGetHbit (ic); + break; + + case GETABIT: + genGetAbit (ic); + break; + + case GETBYTE: + genGetByte (ic); + break; + + case GETWORD: + genGetWord (ic); + break; + + case LEFT_OP: + genLeftShift (ic); + break; + + case RIGHT_OP: + genRightShift (ic); + break; + + case GET_VALUE_AT_ADDRESS: + genPointerGet (ic, + hasInc (IC_LEFT (ic), ic, + getSize (operandType (IC_RESULT (ic)))), + ifxForOp (IC_RESULT (ic), ic) ); + break; + + case '=': + if (POINTER_SET (ic)) + genPointerSet (ic, + hasInc (IC_RESULT (ic), ic, + getSize (operandType (IC_RIGHT (ic))))); + else + genAssign (ic); + break; + + case IFX: + genIfx (ic, NULL); + break; + + case ADDRESS_OF: + genAddrOf (ic); + break; + + case JUMPTABLE: + genJumpTab (ic); + break; + + case CAST: + genCast (ic); + break; + + case RECEIVE: + genReceive (ic); + break; + + case SEND: + addSet (&_G.sendSet, ic); + break; + + case DUMMY_READ_VOLATILE: + genDummyRead (ic); + break; + + case CRITICAL: + genCritical (ic); + break; + + case ENDCRITICAL: + genEndCritical (ic); + break; + + case SWAP: + genSwap (ic); + break; + + default: + ic = ic; + } + } + + _G.current_iCode = NULL; + + /* now we are ready to call the + peep hole optimizer */ + if (!options.nopeep) + peepHole (&lineHead); + + /* now do the actual printing */ + printLine (lineHead, codeOutBuf); + return; +} diff --git a/src/mcs51/gen.h b/src/mcs51/gen.h new file mode 100644 index 0000000..3cd811f --- /dev/null +++ b/src/mcs51/gen.h @@ -0,0 +1,88 @@ +/*------------------------------------------------------------------------- + SDCCgen51.h - header file for code generation for 8051 + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCGEN51_H +#define SDCCGEN51_H + +enum + { + AOP_LIT = 1, + AOP_REG, AOP_DIR, + AOP_DPTR, AOP_R0, AOP_R1, + AOP_STK, AOP_IMMD, AOP_STR, + AOP_CRY, AOP_ACC, AOP_DUMMY + }; + +/* type asmop : a homogenised type for + all the different spaces an operand can be + in */ +typedef struct asmop + { + + short type; + /* can have values + AOP_LIT - operand is a literal value + AOP_REG - is in registers + AOP_DIR - direct just a name + AOP_DPTR - dptr contains address of operand + AOP_R0/R1 - r0/r1 contains address of operand + AOP_STK - should be pushed on stack this + can happen only for the result + AOP_IMMD - immediate value for eg. remateriazable + AOP_CRY - carry contains the value of this + AOP_STR - array of strings + AOP_ACC - result is in the acc:b pair + AOP_DUMMY - read as 0, discard writes + */ + short coff; /* current offset */ + short size; /* total size */ + unsigned code:1; /* is in Code space */ + unsigned paged:1; /* in paged memory */ + unsigned short allocated; /* number of times allocated */ + union + { + value *aop_lit; /* if literal */ + regs *aop_reg[4]; /* array of registers */ + char *aop_dir; /* if direct */ + regs *aop_ptr; /* either -> to r0 or r1 */ + struct { + int from_cast_remat; /* cast remat created this : immd2 field used for highest order*/ + char *aop_immd1; /* if immediate others are implied */ + char *aop_immd2; /* cast remat will generate this */ + } aop_immd; + int aop_stk; /* stack offset when AOP_STK */ + char *aop_str[4]; /* just a string array containing the location */ + } + aopu; + } +asmop; + +void gen51Code (iCode *); +void mcs51_emitDebuggerSymbol (char *); + +//extern char *fReturn8051[]; +extern unsigned fReturnSizeMCS51; +//extern char **fReturn; + +#endif diff --git a/src/mcs51/main.c b/src/mcs51/main.c new file mode 100644 index 0000000..1904e14 --- /dev/null +++ b/src/mcs51/main.c @@ -0,0 +1,842 @@ +/** @file main.c + mcs51 specific general functions. + + Note that mlh prepended _mcs51_ on the static functions. Makes + it easier to set a breakpoint using the debugger. +*/ +#include "common.h" +#include "main.h" +#include "ralloc.h" +#include "gen.h" +#include "peep.h" +#include "dbuf_string.h" +#include "../SDCCutil.h" + +static char _defaultRules[] = +{ +#include "peeph.rul" +}; + +#define OPTION_STACK_SIZE "--stack-size" + +static OPTION _mcs51_options[] = + { + { 0, OPTION_STACK_SIZE, &options.stack_size, "Tells the linker to allocate this space for stack", CLAT_INTEGER }, + { 0, "--parms-in-bank1", &options.parms_in_bank1, "use Bank1 for parameter passing"}, + { 0, "--pack-iram", NULL, "Tells the linker to pack variables in internal ram (default)"}, + { 0, "--no-pack-iram", &options.no_pack_iram, "Tells the linker not to pack variables in internal ram"}, + { 0, "--acall-ajmp", &options.acall_ajmp, "Use acall/ajmp instead of lcall/ljmp" }, + { 0, NULL } + }; + +/* list of key words used by msc51 */ +static char *_mcs51_keywords[] = +{ + "at", + "banked", + "bit", + "code", + "critical", + "data", + "far", + "idata", + "interrupt", + "near", + "pdata", + "reentrant", + "sfr", + "sfr16", + "sfr32", + "sbit", + "using", + "xdata", + "_data", + "_code", + "_generic", + "_near", + "_xdata", + "_pdata", + "_idata", + "_naked", + "_overlay", + NULL +}; + + + +void mcs51_assignRegisters (ebbIndex *); + +static int regParmFlg = 0; /* determine if we can register a parameter */ +static int regBitParmFlg = 0; /* determine if we can register a bit parameter */ + +static void +_mcs51_init (void) +{ + asm_addTree (&asm_asxxxx_mapping); +} + +static void +_mcs51_reset_regparm (void) +{ + regParmFlg = 0; + regBitParmFlg = 0; +} + +static int +_mcs51_regparm (sym_link * l, bool reentrant) +{ + if (IS_SPEC(l) && (SPEC_NOUN(l) == V_BIT)) { + /* bit parameters go to b0 thru b7 */ + if (reentrant && (regBitParmFlg < 8)) { + regBitParmFlg++; + return 12 + regBitParmFlg; + } + return 0; + } + if (options.parms_in_bank1 == 0) { + /* simple can pass only the first parameter in a register */ + if (regParmFlg) + return 0; + + regParmFlg = 1; + return 1; + } else { + int size = getSize(l); + int remain ; + + /* first one goes the usual way to DPTR */ + if (regParmFlg == 0) { + regParmFlg += 4 ; + return 1; + } + /* second one onwards goes to RB1_0 thru RB1_7 */ + remain = regParmFlg - 4; + if (size > (8 - remain)) { + regParmFlg = 12 ; + return 0; + } + regParmFlg += size ; + return regParmFlg - size + 1; + } +} + +static bool +_mcs51_parseOptions (int *pargc, char **argv, int *i) +{ + /* TODO: allow port-specific command line options to specify + * segment names here. + */ + return FALSE; +} + +static void +_mcs51_finaliseOptions (void) +{ + if (options.noXinitOpt) { + port->genXINIT=0; + } + + switch (options.model) + { + case MODEL_SMALL: + port->mem.default_local_map = data; + port->mem.default_globl_map = data; + port->s.gptr_size = 3; + break; + case MODEL_MEDIUM: + port->mem.default_local_map = pdata; + port->mem.default_globl_map = pdata; + port->s.gptr_size = 3; + break; + case MODEL_LARGE: + port->mem.default_local_map = xdata; + port->mem.default_globl_map = xdata; + port->s.gptr_size = 3; + break; + default: + port->mem.default_local_map = data; + port->mem.default_globl_map = data; + break; + } + + if (options.parms_in_bank1) { + addSet(&preArgvSet, Safe_strdup("-DSDCC_PARMS_IN_BANK1")); + } +} + +static void +_mcs51_setDefaultOptions (void) +{ +} + +static const char * +_mcs51_getRegName (struct regs *reg) +{ + if (reg) + return reg->name; + return "err"; +} + +static void +_mcs51_genAssemblerPreamble (FILE * of) +{ + if (options.parms_in_bank1) { + int i ; + for (i=0; i < 8 ; i++ ) + fprintf (of,"b1_%d = 0x%x \n",i,8+i); + } +} + +/* Generate interrupt vector table. */ +static int +_mcs51_genIVT (struct dbuf_s * oBuf, symbol ** interrupts, int maxInterrupts) +{ + int i; + + dbuf_printf (oBuf, "\t%cjmp\t__sdcc_gsinit_startup\n", options.acall_ajmp?'a':'l'); + if((options.acall_ajmp)&&(maxInterrupts)) dbuf_printf (oBuf, "\t.ds\t1\n"); + + /* now for the other interrupts */ + for (i = 0; i < maxInterrupts; i++) + { + if (interrupts[i]) + { + dbuf_printf (oBuf, "\t%cjmp\t%s\n", options.acall_ajmp?'a':'l', interrupts[i]->rname); + if ( i != maxInterrupts - 1 ) + dbuf_printf (oBuf, "\t.ds\t%d\n", options.acall_ajmp?6:5); + } + else + { + dbuf_printf (oBuf, "\treti\n"); + if ( i != maxInterrupts - 1 ) + dbuf_printf (oBuf, "\t.ds\t7\n"); + } + } + return TRUE; +} + +static void +_mcs51_genExtraAreas(FILE *of, bool hasMain) +{ + tfprintf (of, "\t!area\n", HOME_NAME); + tfprintf (of, "\t!area\n", "GSINIT0 (CODE)"); + tfprintf (of, "\t!area\n", "GSINIT1 (CODE)"); + tfprintf (of, "\t!area\n", "GSINIT2 (CODE)"); + tfprintf (of, "\t!area\n", "GSINIT3 (CODE)"); + tfprintf (of, "\t!area\n", "GSINIT4 (CODE)"); + tfprintf (of, "\t!area\n", "GSINIT5 (CODE)"); + tfprintf (of, "\t!area\n", STATIC_NAME); + tfprintf (of, "\t!area\n", port->mem.post_static_name); + tfprintf (of, "\t!area\n", CODE_NAME); +} + +static void +_mcs51_genInitStartup (FILE *of) +{ + tfprintf (of, "\t!global\n", "__sdcc_gsinit_startup"); + tfprintf (of, "\t!global\n", "__sdcc_program_startup"); + tfprintf (of, "\t!global\n", "__start__stack"); + + if (options.useXstack) + { + tfprintf (of, "\t!global\n", "__sdcc_init_xstack"); + tfprintf (of, "\t!global\n", "__start__xstack"); + } + + // if the port can copy the XINIT segment to XISEG + if (port->genXINIT) + { + port->genXINIT(of); + } + + if (!getenv("SDCC_NOGENRAMCLEAR")) + tfprintf (of, "\t!global\n", "__mcs51_genRAMCLEAR"); +} + + +/* Generate code to copy XINIT to XISEG */ +static void _mcs51_genXINIT (FILE * of) { + tfprintf (of, "\t!global\n", "__mcs51_genXINIT"); + + if (!getenv("SDCC_NOGENRAMCLEAR")) + tfprintf (of, "\t!global\n", "__mcs51_genXRAMCLEAR"); +} + + +/* Do CSE estimation */ +static bool cseCostEstimation (iCode *ic, iCode *pdic) +{ + operand *result = IC_RESULT(ic); + sym_link *result_type = operandType(result); + + /* if it is a pointer then return ok for now */ + if (IC_RESULT(ic) && IS_PTR(result_type)) return 1; + + /* if bitwise | add & subtract then no since mcs51 is pretty good at it + so we will cse only if they are local (i.e. both ic & pdic belong to + the same basic block */ + if (IS_BITWISE_OP(ic) || ic->op == '+' || ic->op == '-') { + /* then if they are the same Basic block then ok */ + if (ic->eBBlockNum == pdic->eBBlockNum) return 1; + else return 0; + } + + /* for others it is cheaper to do the cse */ + return 1; +} + +/* Indicate which extended bit operations this port supports */ +static bool +hasExtBitOp (int op, int size) +{ + if (op == RRC + || op == RLC + || op == GETHBIT + || op == GETABIT + || op == GETBYTE + || op == GETWORD + || (op == SWAP && size <= 2) + ) + return TRUE; + else + return FALSE; +} + +/* Indicate the expense of an access to an output storage class */ +static int +oclsExpense (struct memmap *oclass) +{ + if (IN_FARSPACE(oclass)) + return 1; + + return 0; +} + + + +static int +instructionSize(char *inst, char *op1, char *op2) +{ + #define ISINST(s) (strncmp(inst, (s), sizeof(s)-1) == 0) + #define IS_A(s) (*(s) == 'a' && *(s+1) == '\0') + #define IS_C(s) (*(s) == 'c' && *(s+1) == '\0') + #define IS_Rn(s) (*(s) == 'r' && *(s+1) >= '0' && *(s+1) <= '7') + #define IS_atRi(s) (*(s) == '@' && *(s+1) == 'r') + + /* Based on the current (2003-08-22) code generation for the + small library, the top instruction probability is: + + 57% mov/movx/movc + 6% push + 6% pop + 4% inc + 4% lcall + 4% add + 3% clr + 2% subb + */ + /* mov, push, & pop are the 69% of the cases. Check them first! */ + if (ISINST ("mov")) + { + if (*(inst+3)=='x') return 1; /* movx */ + if (*(inst+3)=='c') return 1; /* movc */ + if (IS_C (op1) || IS_C (op2)) return 2; + if (IS_A (op1)) + { + if (IS_Rn (op2) || IS_atRi (op2)) return 1; + return 2; + } + if (IS_Rn(op1) || IS_atRi(op1)) + { + if (IS_A(op2)) return 1; + return 2; + } + if (strcmp (op1, "dptr") == 0) return 3; + if (IS_A (op2) || IS_Rn (op2) || IS_atRi (op2)) return 2; + return 3; + } + + if (ISINST ("push")) return 2; + if (ISINST ("pop")) return 2; + + if (ISINST ("lcall")) return 3; + if (ISINST ("ret")) return 1; + if (ISINST ("ljmp")) return 3; + if (ISINST ("sjmp")) return 2; + if (ISINST ("rlc")) return 1; + if (ISINST ("rrc")) return 1; + if (ISINST ("rl")) return 1; + if (ISINST ("rr")) return 1; + if (ISINST ("swap")) return 1; + if (ISINST ("jc")) return 2; + if (ISINST ("jnc")) return 2; + if (ISINST ("jb")) return 3; + if (ISINST ("jnb")) return 3; + if (ISINST ("jbc")) return 3; + if (ISINST ("jmp")) return 1; // always jmp @a+dptr + if (ISINST ("jz")) return 2; + if (ISINST ("jnz")) return 2; + if (ISINST ("cjne")) return 3; + if (ISINST ("mul")) return 1; + if (ISINST ("div")) return 1; + if (ISINST ("da")) return 1; + if (ISINST ("xchd")) return 1; + if (ISINST ("reti")) return 1; + if (ISINST ("nop")) return 1; + if (ISINST ("acall")) return 2; + if (ISINST ("ajmp")) return 2; + + + if (ISINST ("add") || ISINST ("addc") || ISINST ("subb") || ISINST ("xch")) + { + if (IS_Rn(op2) || IS_atRi(op2)) return 1; + return 2; + } + if (ISINST ("inc") || ISINST ("dec")) + { + if (IS_A(op1) || IS_Rn(op1) || IS_atRi(op1)) return 1; + if (strcmp(op1, "dptr") == 0) return 1; + return 2; + } + if (ISINST ("anl") || ISINST ("orl") || ISINST ("xrl")) + { + if (IS_C(op1)) return 2; + if (IS_A(op1)) + { + if (IS_Rn(op2) || IS_atRi(op2)) return 1; + return 2; + } + else + { + if (IS_A(op2)) return 2; + return 3; + } + } + if (ISINST ("clr") || ISINST ("setb") || ISINST ("cpl")) + { + if (IS_A(op1) || IS_C(op1)) return 1; + return 2; + } + if (ISINST ("djnz")) + { + if (IS_Rn(op1)) return 2; + return 3; + } + + /* If the instruction is unrecognized, we shouldn't try to optimize. */ + /* Return a large value to discourage optimization. */ + return 999; +} + +static asmLineNode * +newAsmLineNode (void) +{ + asmLineNode *aln; + + aln = Safe_alloc ( sizeof (asmLineNode)); + aln->size = 0; + aln->regsRead = NULL; + aln->regsWritten = NULL; + + return aln; +} + + +typedef struct mcs51operanddata + { + char name[6]; + int regIdx1; + int regIdx2; + } +mcs51operanddata; + +static mcs51operanddata mcs51operandDataTable[] = + { + {"a", A_IDX, -1}, + {"ab", A_IDX, B_IDX}, + {"ac", CND_IDX, -1}, + {"acc", A_IDX, -1}, + {"ar0", R0_IDX, -1}, + {"ar1", R1_IDX, -1}, + {"ar2", R2_IDX, -1}, + {"ar3", R3_IDX, -1}, + {"ar4", R4_IDX, -1}, + {"ar5", R5_IDX, -1}, + {"ar6", R6_IDX, -1}, + {"ar7", R7_IDX, -1}, + {"b", B_IDX, -1}, + {"c", CND_IDX, -1}, + {"cy", CND_IDX, -1}, + {"dph", DPH_IDX, -1}, + {"dpl", DPL_IDX, -1}, + {"dptr", DPL_IDX, DPH_IDX}, + {"f0", CND_IDX, -1}, + {"f1", CND_IDX, -1}, + {"ov", CND_IDX, -1}, + {"p", CND_IDX, -1}, + {"psw", CND_IDX, -1}, + {"r0", R0_IDX, -1}, + {"r1", R1_IDX, -1}, + {"r2", R2_IDX, -1}, + {"r3", R3_IDX, -1}, + {"r4", R4_IDX, -1}, + {"r5", R5_IDX, -1}, + {"r6", R6_IDX, -1}, + {"r7", R7_IDX, -1}, + }; + +static int +mcs51operandCompare (const void *key, const void *member) +{ + return strcmp((const char *)key, ((mcs51operanddata *)member)->name); +} + +static void +updateOpRW (asmLineNode *aln, char *op, char *optype) +{ + mcs51operanddata *opdat; + char *dot; + + dot = strchr(op, '.'); + if (dot) + *dot = '\0'; + + opdat = bsearch (op, mcs51operandDataTable, + sizeof(mcs51operandDataTable)/sizeof(mcs51operanddata), + sizeof(mcs51operanddata), mcs51operandCompare); + + if (opdat && strchr(optype,'r')) + { + if (opdat->regIdx1 >= 0) + aln->regsRead = bitVectSetBit (aln->regsRead, opdat->regIdx1); + if (opdat->regIdx2 >= 0) + aln->regsRead = bitVectSetBit (aln->regsRead, opdat->regIdx2); + } + if (opdat && strchr(optype,'w')) + { + if (opdat->regIdx1 >= 0) + aln->regsWritten = bitVectSetBit (aln->regsWritten, opdat->regIdx1); + if (opdat->regIdx2 >= 0) + aln->regsWritten = bitVectSetBit (aln->regsWritten, opdat->regIdx2); + } + if (op[0] == '@') + { + if (!strcmp(op, "@r0")) + aln->regsRead = bitVectSetBit (aln->regsRead, R0_IDX); + if (!strcmp(op, "@r1")) + aln->regsRead = bitVectSetBit (aln->regsRead, R1_IDX); + if (strstr(op, "dptr")) + { + aln->regsRead = bitVectSetBit (aln->regsRead, DPL_IDX); + aln->regsRead = bitVectSetBit (aln->regsRead, DPH_IDX); + } + if (strstr(op, "a+")) + aln->regsRead = bitVectSetBit (aln->regsRead, A_IDX); + } +} + +typedef struct mcs51opcodedata + { + char name[6]; + char class[3]; + char pswtype[3]; + char op1type[3]; + char op2type[3]; + } +mcs51opcodedata; + +static mcs51opcodedata mcs51opcodeDataTable[] = + { + {"acall","j", "", "", ""}, + {"add", "", "w", "rw", "r"}, + {"addc", "", "rw", "rw", "r"}, + {"ajmp", "j", "", "", ""}, + {"anl", "", "", "rw", "r"}, + {"cjne", "j", "w", "r", "r"}, + {"clr", "", "", "w", ""}, + {"cpl", "", "", "rw", ""}, + {"da", "", "rw", "rw", ""}, + {"dec", "", "", "rw", ""}, + {"div", "", "w", "rw", ""}, + {"djnz", "j", "", "rw", ""}, + {"inc", "", "", "rw", ""}, + {"jb", "j", "", "r", ""}, + {"jbc", "j", "", "rw", ""}, + {"jc", "j", "", "", ""}, + {"jmp", "j", "", "", ""}, + {"jnb", "j", "", "r", ""}, + {"jnc", "j", "", "", ""}, + {"jnz", "j", "", "", ""}, + {"jz", "j", "", "", ""}, + {"lcall","j", "", "", ""}, + {"ljmp", "j", "", "", ""}, + {"mov", "", "", "w", "r"}, + {"movc", "", "", "w", "r"}, + {"movx", "", "", "w", "r"}, + {"mul", "", "w", "rw", ""}, + {"nop", "", "", "", ""}, + {"orl", "", "", "rw", "r"}, + {"pop", "", "", "w", ""}, + {"push", "", "", "r", ""}, + {"ret", "j", "", "", ""}, + {"reti", "j", "", "", ""}, + {"rl", "", "", "rw", ""}, + {"rlc", "", "rw", "rw", ""}, + {"rr", "", "", "rw", ""}, + {"rrc", "", "rw", "rw", ""}, + {"setb", "", "", "w", ""}, + {"sjmp", "j", "", "", ""}, + {"subb", "", "rw", "rw", "r"}, + {"swap", "", "", "rw", ""}, + {"xch", "", "", "rw", "rw"}, + {"xchd", "", "", "rw", "rw"}, + {"xrl", "", "", "rw", "r"}, + }; + +static int +mcs51opcodeCompare (const void *key, const void *member) +{ + return strcmp((const char *)key, ((mcs51opcodedata *)member)->name); +} + +static asmLineNode * +asmLineNodeFromLineNode (lineNode *ln) +{ + asmLineNode *aln = newAsmLineNode(); + char *op, op1[256], op2[256]; + int opsize; + const char *p; + char inst[8]; + mcs51opcodedata *opdat; + + p = ln->line; + + while (*p && isspace(*p)) p++; + for (op = inst, opsize=1; *p; p++) + { + if (isspace(*p) || *p == ';' || *p == ':' || *p == '=') + break; + else + if (opsize < sizeof(inst)) + *op++ = tolower(*p), opsize++; + } + *op = '\0'; + + if (*p == ';' || *p == ':' || *p == '=') + return aln; + + while (*p && isspace(*p)) p++; + if (*p == '=') + return aln; + + for (op = op1, opsize=1; *p && *p != ','; p++) + { + if (!isspace(*p) && opsize < sizeof(op1)) + *op++ = tolower(*p), opsize++; + } + *op = '\0'; + + if (*p == ',') p++; + for (op = op2, opsize=1; *p && *p != ','; p++) + { + if (!isspace(*p) && opsize < sizeof(op2)) + *op++ = tolower(*p), opsize++; + } + *op = '\0'; + + aln->size = instructionSize(inst, op1, op2); + + aln->regsRead = newBitVect (END_IDX); + aln->regsWritten = newBitVect (END_IDX); + + opdat = bsearch (inst, mcs51opcodeDataTable, + sizeof(mcs51opcodeDataTable)/sizeof(mcs51opcodedata), + sizeof(mcs51opcodedata), mcs51opcodeCompare); + + if (opdat) + { + updateOpRW (aln, op1, opdat->op1type); + updateOpRW (aln, op2, opdat->op2type); + if (strchr(opdat->pswtype,'r')) + aln->regsRead = bitVectSetBit (aln->regsRead, CND_IDX); + if (strchr(opdat->pswtype,'w')) + aln->regsWritten = bitVectSetBit (aln->regsWritten, CND_IDX); + } + + return aln; +} + +static int +getInstructionSize (lineNode *line) +{ + if (!line->aln) + line->aln = asmLineNodeFromLineNode (line); + + return line->aln->size; +} + +static bitVect * +getRegsRead (lineNode *line) +{ + if (!line->aln) + line->aln = asmLineNodeFromLineNode (line); + + return line->aln->regsRead; +} + +static bitVect * +getRegsWritten (lineNode *line) +{ + if (!line->aln) + line->aln = asmLineNodeFromLineNode (line); + + return line->aln->regsWritten; +} + + +/** $1 is always the basename. + $2 is always the output file. + $3 varies + $l is the list of extra options that should be there somewhere... + MUST be terminated with a NULL. +*/ +static const char *_linkCmd[] = +{ + "aslink", "-nf", "\"$1\"", NULL +}; + +/* $3 is replaced by assembler.debug_opts resp. port->assembler.plain_opts */ +static const char *_asmCmd[] = +{ + "asx8051", "$l", "$3", "\"$1.asm\"", NULL +}; + +/* Globals */ +PORT mcs51_port = +{ + TARGET_ID_MCS51, + "mcs51", + "MCU 8051", /* Target name */ + NULL, /* Processor name */ + { + glue, + TRUE, /* Emit glue around main */ + MODEL_SMALL | MODEL_MEDIUM | MODEL_LARGE, + MODEL_SMALL + }, + { /* Assembler */ + _asmCmd, + NULL, + "-plosgffc", /* Options with debug */ + "-plosgff", /* Options without debug */ + 0, + ".asm", + NULL /* no do_assemble function */ + }, + { /* Linker */ + _linkCmd, + NULL, + NULL, + ".rel", + 1 + }, + { /* Peephole optimizer */ + _defaultRules, + getInstructionSize, + getRegsRead, + getRegsWritten, + mcs51DeadMove, + 0 + }, + { + /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ + 1, 2, 2, 4, 1, 2, 3, 1, 4, 4 + }, + /* tags for generic pointers */ + { 0x00, 0x40, 0x60, 0x80 }, /* far, near, xstack, code */ + { + "XSTK (PAG,XDATA)", // xstack_name + "STACK (DATA)", // istack_name + "CSEG (CODE)", // code_name + "DSEG (DATA)", // data_name + "ISEG (DATA)", // idata_name + "PSEG (PAG,XDATA)", // pdata_name + "XSEG (XDATA)", // xdata_name + "BSEG (BIT)", // bit_name + "RSEG (DATA)", // reg_name + "GSINIT (CODE)", // static_name + "OSEG (OVR,DATA)", // overlay_name + "GSFINAL (CODE)", // post_static_name + "HOME (CODE)", // home_name + "XISEG (XDATA)", // xidata_name - initialized xdata initialized xdata + "XINIT (CODE)", // xinit_name - a code copy of xiseg + "CONST (CODE)", // const_name - const data (code or not) + "CABS (ABS,CODE)", // cabs_name - const absolute data (code or not) + "XABS (ABS,XDATA)", // xabs_name - absolute xdata/pdata + "IABS (ABS,DATA)", // iabs_name - absolute idata/data + NULL, + NULL, + 1 + }, + { _mcs51_genExtraAreas, NULL }, + { + +1, /* direction (+1 = stack grows up) */ + 0, /* bank_overhead (switch between register banks) */ + 4, /* isr_overhead */ + 1, /* call_overhead (2 for return address - 1 for pre-incrementing push */ + 1, /* reent_overhead */ + 0 /* banked_overhead (switch between code banks) */ + }, + { + /* mcs51 has an 8 bit mul */ + 1, -1 + }, + { + mcs51_emitDebuggerSymbol + }, + { + 256, /* maxCount */ + 2, /* sizeofElement */ + {6,9,15}, /* sizeofMatchJump[] */ + {9,18,36}, /* sizeofRangeCompare[] */ + 4, /* sizeofSubtract */ + 6, /* sizeofDispatch */ + }, + "_", + _mcs51_init, + _mcs51_parseOptions, + _mcs51_options, + NULL, + _mcs51_finaliseOptions, + _mcs51_setDefaultOptions, + mcs51_assignRegisters, + _mcs51_getRegName, + _mcs51_keywords, + _mcs51_genAssemblerPreamble, + NULL, /* no genAssemblerEnd */ + _mcs51_genIVT, + _mcs51_genXINIT, + _mcs51_genInitStartup, + _mcs51_reset_regparm, + _mcs51_regparm, + NULL, + NULL, + NULL, + hasExtBitOp, /* hasExtBitOp */ + oclsExpense, /* oclsExpense */ + FALSE, + TRUE, /* little endian */ + 0, /* leave lt */ + 0, /* leave gt */ + 1, /* transform <= to ! > */ + 1, /* transform >= to ! < */ + 1, /* transform != to !(a == b) */ + 0, /* leave == */ + FALSE, /* No array initializer support. */ + cseCostEstimation, + NULL, /* no builtin functions */ + GPOINTER, /* treat unqualified pointers as "generic" pointers */ + 1, /* reset labelKey to 1 */ + 1, /* globals & local static allowed */ + PORT_MAGIC +}; diff --git a/src/mcs51/main.h b/src/mcs51/main.h new file mode 100644 index 0000000..4c423f6 --- /dev/null +++ b/src/mcs51/main.h @@ -0,0 +1,16 @@ +#ifndef MAIN_INCLUDE +#define MAIN_INCLUDE + +typedef struct asmLineNode + { + int size; + bitVect *regsRead; + bitVect *regsWritten; + } +asmLineNode; + +bool x_parseOptions (char **argv, int *pargc); +void x_setDefaultOptions (void); +void x_finaliseOptions (void); + +#endif diff --git a/src/mcs51/mcs51.dsp b/src/mcs51/mcs51.dsp new file mode 100644 index 0000000..b7966da --- /dev/null +++ b/src/mcs51/mcs51.dsp @@ -0,0 +1,132 @@ +# Microsoft Developer Studio Project File - Name="mcs51" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Static Library" 0x0104 + +CFG=mcs51 - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "mcs51.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "mcs51.mak" CFG="mcs51 - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "mcs51 - Win32 Debug" (based on "Win32 (x86) Static Library") +!MESSAGE "mcs51 - Win32 Release" (based on "Win32 (x86) Static Library") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "mcs51 - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /FR /FD /GZ /Zm500 /c +# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /FR /FD /GZ /Zm1500 /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LIB32=link.exe -lib +# ADD BASE LIB32 /nologo /out:"Debug\port.lib" +# ADD LIB32 /nologo /out:"Debug\port.lib" + +!ELSEIF "$(CFG)" == "mcs51 - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /ML /W3 /GX /O2 /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /FD /Zm500 /c +# ADD CPP /nologo /ML /W3 /GX /O2 /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /FD /Zm1500 /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LIB32=link.exe -lib +# ADD BASE LIB32 /nologo /out:"Release\port.lib" +# ADD LIB32 /nologo /out:"Release\port.lib" + +!ENDIF + +# Begin Target + +# Name "mcs51 - Win32 Debug" +# Name "mcs51 - Win32 Release" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\gen.c +# End Source File +# Begin Source File + +SOURCE=.\main.c +# End Source File +# Begin Source File + +SOURCE=.\peep.c +# End Source File +# Begin Source File + +SOURCE=.\ralloc.c +# End Source File +# Begin Source File + +SOURCE=.\rtrack.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=.\gen.h +# End Source File +# Begin Source File + +SOURCE=.\main.h +# End Source File +# Begin Source File + +SOURCE=.\peep.h +# End Source File +# Begin Source File + +SOURCE=.\ralloc.h +# End Source File +# Begin Source File + +SOURCE=..\..\sdcc_vc.h +# End Source File +# End Group +# End Target +# End Project diff --git a/src/mcs51/mcs51a.dsp b/src/mcs51/mcs51a.dsp new file mode 100644 index 0000000..579cca7 --- /dev/null +++ b/src/mcs51/mcs51a.dsp @@ -0,0 +1,90 @@ +# Microsoft Developer Studio Project File - Name="mcs51a" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Generic Project" 0x010a + +CFG=mcs51a - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "mcs51a.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "mcs51a.mak" CFG="mcs51a - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "mcs51a - Win32 Debug" (based on "Win32 (x86) Generic Project") +!MESSAGE "mcs51a - Win32 Release" (based on "Win32 (x86) Generic Project") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +MTL=midl.exe + +!IF "$(CFG)" == "mcs51a - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "" +# PROP Intermediate_Dir "" +# PROP Target_Dir "" + +!ELSEIF "$(CFG)" == "mcs51a - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Win32_Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "" +# PROP Intermediate_Dir "" +# PROP Target_Dir "" + +!ENDIF + +# Begin Target + +# Name "mcs51a - Win32 Debug" +# Name "mcs51a - Win32 Release" +# Begin Source File + +SOURCE=.\peeph.def + +!IF "$(CFG)" == "mcs51a - Win32 Debug" + +# Begin Custom Build +InputPath=.\peeph.def + +"peeph.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph.rul + +# End Custom Build + +!ELSEIF "$(CFG)" == "mcs51a - Win32 Release" + +# Begin Custom Build +InputPath=.\peeph.def + +"peeph.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph.rul + +# End Custom Build + +!ENDIF + +# End Source File +# End Target +# End Project diff --git a/src/mcs51/peep.c b/src/mcs51/peep.c new file mode 100644 index 0000000..c0dcb01 --- /dev/null +++ b/src/mcs51/peep.c @@ -0,0 +1,731 @@ +/*------------------------------------------------------------------------- + peep.c - source file for peephole optimizer helper functions + + Written By - Bernhard Held + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" +#include "ralloc.h" + +#define D(x) x +#define DEADMOVEERROR() do {werror(E_INTERNAL_ERROR, __FILE__, __LINE__, "error in deadmove");} while(0) + +typedef enum +{ + S4O_FOUNDOPCODE, + S4O_PUSHPOP, + S4O_CONDJMP, + S4O_WR_OP, + S4O_RD_OP, + S4O_TERM, + S4O_VISITED, + S4O_ABORT, + S4O_CONTINUE +} S4O_RET; + +static struct +{ + lineNode *head; +} _G; + +/*-----------------------------------------------------------------*/ +/* univisitLines - clear "visited" flag in all lines */ +/*-----------------------------------------------------------------*/ +static void +unvisitLines (lineNode *pl) +{ + for (; pl; pl = pl->next) + pl->visited = FALSE; +} + +/*-----------------------------------------------------------------*/ +/* cleanLabelRef - clear label jump-counter and pass-flag */ +/*-----------------------------------------------------------------*/ +static void +cleanLabelRef (void) +{ + int key; + labelHashEntry *entry; + + if (!labelHash) + return; + for (entry = (labelHashEntry *) hTabFirstItem (labelHash, &key); + entry; + entry = (labelHashEntry *) hTabNextItem (labelHash, &key)) + { + entry->passedLabel = FALSE; + entry->jmpToCount = 0; + } +} + +/*-----------------------------------------------------------------*/ +/* checkLabelRef - check all entries in labelHash */ +/* The path from 'pop' to 'push' must be the only possible path. */ +/* There must not be any paths in or out of this path. */ +/* This is checked by counting the label references. */ +/*-----------------------------------------------------------------*/ +static bool +checkLabelRef (void) +{ + int key; + labelHashEntry *entry; + + if (!labelHash) + { + /* no labels at all: no problems ;-) */ + return TRUE; + } + + for (entry = (labelHashEntry *) hTabFirstItem (labelHash, &key); + entry; + entry = (labelHashEntry *) hTabNextItem (labelHash, &key)) + { + + /* In our path we passed a label, + but we didn't meet all references (jumps) to this label. + This means that the code jumps from outside into this path. */ + if (entry->passedLabel && + entry->jmpToCount != entry->refCount) + { + return FALSE; + } + + /* In our path we jumped to (referenced) a label, + but we we didn't pass it. + This means that there's a code path into our path. */ + if (!entry->passedLabel && + entry->jmpToCount != 0) + { + return FALSE; + } + } + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* setLabelRefPassedLabel - set flag "passedLabel" in entry */ +/* of the list labelHash */ +/*-----------------------------------------------------------------*/ +static bool +setLabelRefPassedLabel (const char *label) +{ + labelHashEntry *entry; + + entry = getLabelRef (label, _G.head); + if (!entry) + return FALSE; + entry->passedLabel = TRUE; + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* incLabelJmpToCount - increment counter "jmpToCount" in entry */ +/* of the list labelHash */ +/*-----------------------------------------------------------------*/ +static bool +incLabelJmpToCount (const char *label) +{ + labelHashEntry *entry; + + entry = getLabelRef (label, _G.head); + if (!entry) + return FALSE; + entry->jmpToCount++; + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* findLabel - */ +/* 1. extracts label in the opcode pl */ +/* 2. increment "label jump-to count" in labelHash */ +/* 3. search lineNode with label definition and return it */ +/*-----------------------------------------------------------------*/ +static lineNode * +findLabel (const lineNode *pl) +{ + char *p; + lineNode *cpl; + + /* 1. extract label in opcode */ + + /* In each mcs51 jumping opcode the label is at the end of the opcode */ + p = strlen (pl->line) - 1 + pl->line; + + /* scan backward until ',' or '\t' */ + for (; p > pl->line; p--) + if (*p == ',' || *p == '\t') + break; + + /* sanity check */ + if (p == pl->line) + { + DEADMOVEERROR(); + return NULL; + } + + /* skip ',' resp. '\t' */ + ++p; + + /* 2. increment "label jump-to count" */ + if (!incLabelJmpToCount (p)) + return NULL; + + /* 3. search lineNode with label definition and return it */ + for (cpl = _G.head; cpl; cpl = cpl->next) + { + if ( cpl->isLabel + && strcmp (p, cpl->line) == 0) + { + return cpl; + } + } + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* isFunc - returns TRUE if it's a CALL or PCALL (not _gptrget()) */ +/*-----------------------------------------------------------------*/ +static bool +isFunc (const lineNode *pl) +{ + if (pl && pl->ic) + { + if ( pl->ic->op == CALL + || pl->ic->op == PCALL) + return TRUE; + } + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* termScanAtFunc - returns S4O_TERM if it's a 'normal' function */ +/* call and it's a 'caller save'. returns S4O_CONTINUE if it's */ +/* 'callee save' or 'naked'. returns S4O_ABORT if it's 'banked' */ +/* uses the register for the destination. */ +/*-----------------------------------------------------------------*/ +static S4O_RET +termScanAtFunc (const lineNode *pl, int rIdx) +{ + sym_link *ftype; + + if (!isFunc (pl)) + return S4O_CONTINUE; + // let's assume calls to literally given locations use the default + // most notably : (*(void (*)()) 0) (); see bug 1749275 + if (IS_VALOP (IC_LEFT (pl->ic))) + return !options.all_callee_saves; + + ftype = OP_SYM_TYPE(IC_LEFT(pl->ic)); + if (IS_FUNCPTR (ftype)) + ftype = ftype->next; + if (FUNC_CALLEESAVES(ftype)) + return S4O_CONTINUE; + if (FUNC_ISNAKED(ftype)) + return S4O_CONTINUE; + if (FUNC_BANKED(ftype) && + ((rIdx == R0_IDX) || (rIdx == R1_IDX) || (rIdx == R2_IDX))) + return S4O_ABORT; + return S4O_TERM; +} + +/*-----------------------------------------------------------------*/ +/* scan4op - "executes" and examines the assembler opcodes, */ +/* follows conditional and un-conditional jumps. */ +/* Moreover it registers all passed labels. */ +/* */ +/* Parameter: */ +/* lineNode **pl */ +/* scanning starts from pl; */ +/* pl also returns the last scanned line */ +/* const char *pReg */ +/* points to a register (e.g. "ar0"). scan4op() tests for */ +/* read or write operations with this register */ +/* const char *untilOp */ +/* points to NULL or a opcode (e.g. "push"). */ +/* scan4op() returns if it hits this opcode. */ +/* lineNode **plCond */ +/* If a conditional branch is met plCond points to the */ +/* lineNode of the conditional branch */ +/* */ +/* Returns: */ +/* S4O_ABORT */ +/* on error */ +/* S4O_VISITED */ +/* hit lineNode with "visited" flag set: scan4op() already */ +/* scanned this opcode. */ +/* S4O_FOUNDOPCODE */ +/* found opcode and operand, to which untilOp and pReg are */ +/* pointing to. */ +/* S4O_RD_OP, S4O_WR_OP */ +/* hit an opcode reading or writing from pReg */ +/* S4O_PUSHPOP */ +/* hit a "push" or "pop" opcode */ +/* S4O_CONDJMP */ +/* hit a conditional jump opcode. pl and plCond return the */ +/* two possible branches. */ +/* S4O_TERM */ +/* acall, lcall, ret and reti "terminate" a scan. */ +/*-----------------------------------------------------------------*/ +static S4O_RET +scan4op (lineNode **pl, const char *pReg, const char *untilOp, + lineNode **plCond) +{ + char *p; + int len; + bool isConditionalJump; + int rIdx; + S4O_RET ret; + + /* pReg points to e.g. "ar0"..."ar7" */ + len = strlen (pReg); + + /* get index into pReg table */ + for (rIdx = 0; rIdx < mcs51_nRegs; ++rIdx) + if (strcmp (regs8051[rIdx].name, pReg + 1) == 0) + break; + + /* sanity check */ + if (rIdx >= mcs51_nRegs) + { + DEADMOVEERROR(); + return S4O_ABORT; + } + + for (; *pl; *pl = (*pl)->next) + { + if (!(*pl)->line || (*pl)->isDebug || (*pl)->isComment) + continue; + + /* don't optimize across inline assembler, + e.g. isLabel doesn't work there */ + if ((*pl)->isInline) + return S4O_ABORT; + + if ((*pl)->visited) + return S4O_VISITED; + (*pl)->visited = TRUE; + + /* found untilOp? */ + if (untilOp && strncmp ((*pl)->line, untilOp, strlen (untilOp)) == 0) + { + p = (*pl)->line + strlen (untilOp); + if (*p == '\t' && strncmp (p + 1, pReg, len) == 0) + return S4O_FOUNDOPCODE; + else + { + /* found untilOp but without our pReg */ + return S4O_ABORT; + } + } + + /* found pReg? */ + p = strchr ((*pl)->line, '\t'); + if (p) + { + /* skip '\t' */ + p++; + + /* course search */ + if (strstr (p, pReg + 1)) + { + /* ok, let's have a closer look */ + + /* does opcode read from pReg? */ + if (bitVectBitValue (port->peep.getRegsRead ((*pl)), rIdx)) + return S4O_RD_OP; + /* does opcode write to pReg? */ + if (bitVectBitValue (port->peep.getRegsWritten ((*pl)), rIdx)) + return S4O_WR_OP; + + /* we can get here, if the register name is + part of a variable name: ignore it */ + } + } + + /* found label? */ + if ((*pl)->isLabel) + { + const char *start; + char label[SDCC_NAME_MAX + 1]; + int len; + + if (!isLabelDefinition ((*pl)->line, &start, &len, FALSE)) + return S4O_ABORT; + memcpy (label, start, len); + label[len] = '\0'; + /* register passing this label */ + if (!setLabelRefPassedLabel (label)) + { + DEADMOVEERROR(); + return S4O_ABORT; + } + continue; + } + + /* branch or terminate? */ + isConditionalJump = FALSE; + switch ((*pl)->line[0]) + { + case 'a': + if (strncmp ("acall", (*pl)->line, 5) == 0) + { + /* for comments see 'lcall' */ + ret = termScanAtFunc (*pl, rIdx); + if (ret != S4O_CONTINUE) + return ret; + break; + } + if (strncmp ("ajmp", (*pl)->line, 4) == 0) + { + *pl = findLabel (*pl); + if (!*pl) + return S4O_ABORT; + } + break; + case 'c': + if (strncmp ("cjne", (*pl)->line, 4) == 0) + { + isConditionalJump = TRUE; + break; + } + break; + case 'd': + if (strncmp ("djnz", (*pl)->line, 4) == 0) + { + isConditionalJump = TRUE; + break; + } + break; + case 'j': + if (strncmp ("jmp", (*pl)->line, 3) == 0) + /* "jmp @a+dptr": no chance to trace execution */ + return S4O_ABORT; + if (strncmp ("jc", (*pl)->line, 2) == 0 || + strncmp ("jnc", (*pl)->line, 3) == 0 || + strncmp ("jz", (*pl)->line, 2) == 0 || + strncmp ("jnz", (*pl)->line, 3) == 0) + { + isConditionalJump = TRUE; + break; + } + if (strncmp ("jbc", (*pl)->line, 3) == 0 || + strncmp ("jb", (*pl)->line, 2) == 0 || + strncmp ("jnb", (*pl)->line, 3) == 0) + { + isConditionalJump = TRUE; + break; + } + break; + case 'l': + if (strncmp ("lcall", (*pl)->line, 5) == 0) + { + ret = termScanAtFunc (*pl, rIdx); + /* If it's a 'normal' 'caller save' function call, all + registers have been saved until the 'lcall'. The + 'life range' of all registers end at the lcall, + and we can terminate our search. + * If the function is 'banked', the registers r0, r1 and r2 + are used to tell the trampoline the destination. After + that their 'life range' ends just like the other registers. + * If it's a 'callee save' function call, registers are saved + by the callee. We've got no information, if the register + might live beyond the lcall. Therefore we've to continue + the search. + */ + if (ret != S4O_CONTINUE) + return ret; + break; + } + if (strncmp ("ljmp", (*pl)->line, 4) == 0) + { + *pl = findLabel (*pl); + if (!*pl) + return S4O_ABORT; + } + break; + case 'p': + if (strncmp ("pop", (*pl)->line, 3) == 0 || + strncmp ("push", (*pl)->line, 4) == 0) + return S4O_PUSHPOP; + break; + case 'r': + if (strncmp ("reti", (*pl)->line, 4) == 0) + return S4O_TERM; + + if (strncmp ("ret", (*pl)->line, 3) == 0) + { + /* pcall uses 'ret' */ + if (isFunc (*pl)) + { + /* for comments see 'lcall' */ + ret = termScanAtFunc (*pl, rIdx); + if (ret != S4O_CONTINUE) + return ret; + break; + } + + /* it's a normal function return */ + return S4O_TERM; + } + break; + case 's': + if (strncmp ("sjmp", (*pl)->line, 4) == 0) + { + *pl = findLabel (*pl); + if (!*pl) + return S4O_ABORT; + } + break; + default: + break; + } /* switch ((*pl)->line[0]) */ + + if (isConditionalJump) + { + *plCond = findLabel (*pl); + if (!*plCond) + return S4O_ABORT; + return S4O_CONDJMP; + } + } /* for (; *pl; *pl = (*pl)->next) */ + return S4O_ABORT; +} + +/*-----------------------------------------------------------------*/ +/* doPushScan - scan through area 1. This small wrapper handles: */ +/* - action required on different return values */ +/* - recursion in case of conditional branches */ +/*-----------------------------------------------------------------*/ +static bool +doPushScan (lineNode **pl, const char *pReg) +{ + lineNode *plConditional, *pushPl = NULL; + + for (;; *pl = (*pl)->next) + { + switch (scan4op (pl, pReg, "push", &plConditional)) + { + case S4O_FOUNDOPCODE: + /* this is what we're looking for */ + return TRUE; + case S4O_VISITED: + if (!pushPl) + { + DEADMOVEERROR(); + return FALSE; + } + *pl = pushPl; + /* already checked */ + return TRUE; + case S4O_CONDJMP: + /* two possible destinations: recurse */ + { + lineNode *pushPl2 = plConditional; + + if (!doPushScan (&pushPl2, pReg)) + return FALSE; + pushPl = pushPl2; + } + continue; + default: + return FALSE; + } + } +} + +/*-----------------------------------------------------------------*/ +/* doTermScan - scan through area 2. This small wrapper handles: */ +/* - action required on different return values */ +/* - recursion in case of conditional branches */ +/*-----------------------------------------------------------------*/ +static bool +doTermScan (lineNode **pl, const char *pReg) +{ + lineNode *plConditional; + + for (;; *pl = (*pl)->next) + { + switch (scan4op (pl, pReg, NULL, &plConditional)) + { + case S4O_TERM: + case S4O_VISITED: + case S4O_WR_OP: + /* all these are terminating condtions */ + return TRUE; + case S4O_PUSHPOP: + /* don't care, go on */ + continue; + case S4O_CONDJMP: + /* two possible destinations: recurse */ + { + lineNode *pl2 = plConditional; + + if (!doTermScan (&pl2, pReg)) + return FALSE; + } + continue; + case S4O_RD_OP: + default: + /* no go */ + return FALSE; + } + } +} + +/*-----------------------------------------------------------------*/ +/* removeDeadPopPush - remove pop/push pair if possible */ +/*-----------------------------------------------------------------*/ +static bool +removeDeadPopPush (const char *pReg, lineNode *currPl, lineNode *head) +{ + lineNode *pushPl, *pl; + + /* A pop/push pair can be removed, if these criteria are met + (ar0 is just an example here, ar0...ar7 are possible): + + pop ar0 + + ; area 1 + + ; There must not be in area 1: + ; - read or write access of ar0 + ; - "acall", "lcall", "pop", "ret", "reti" or "jmp @a+dptr" opcodes + ; - "push" opcode, which doesn't push ar0 + ; - inline assembly + ; - a jump in or out of area 1 (see checkLabelRef()) + + ; Direct manipulation of sp is not detected. This isn't necessary + ; as long as sdcc doesn't emit such code in area 1. + + ; area 1 must be terminated by a: + push ar0 + + ; area 2 + + ; There must not be: + ; - read access of ar0 + ; - "jmp @a+dptr" opcode + ; - inline assembly + ; - a jump in or out of area 2 (see checkLabelRef()) + + ; An "acall", "lcall" (not callee save), "ret" (not PCALL with + ; callee save), "reti" or write access of r0 terminate + ; the search, and the "mov r0,a" can safely be removed. + */ + + /* area 1 */ + pushPl = currPl->next; + if (!doPushScan (&pushPl, pReg)) + return FALSE; + + if (!checkLabelRef()) + return FALSE; + + /* area 2 */ + pl = pushPl->next; + if (!doTermScan (&pl, pReg)) + return FALSE; + if (!checkLabelRef()) + return FALSE; + + /* Success! */ + if (options.noPeepComments) + { + /* remove pushPl from list */ + pushPl->prev->next = pushPl->next; + pushPl->next->prev = pushPl->prev; + } + else + { + /* replace 'push ar0' by comment */ + #define STR ";\tPeephole\tpush %s removed" + int size = sizeof(STR) + 2; + + pushPl->line = Safe_alloc (size); + SNPRINTF (pushPl->line, size, STR, pReg); + pushPl->isComment = TRUE; + } + + /* 'pop ar0' will be removed by peephole framework after returning TRUE */ + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* removeDeadMove - remove superflous 'mov r%1,%2' */ +/*-----------------------------------------------------------------*/ +static bool +removeDeadMove (const char *pReg, lineNode *currPl, lineNode *head) +{ + lineNode *pl; + + /* "mov r0,a" can be removed, if these criteria are met + (r0 is just an example here, r0...r7 are possible): + + ; There must not be: + ; - read access of r0 + ; - "jmp @a+dptr" opcode + ; - inline assembly + ; - a jump in or out of this area (see checkLabelRef()) + + ; An "acall", "lcall" (not callee save), "ret" (not PCALL with + ; callee save), "reti" or write access of r0 terminate + ; the search, and the "mov r0,a" can safely be removed. + */ + pl = currPl->next; + if (!doTermScan (&pl, pReg)) + return FALSE; + + if (!checkLabelRef()) + return FALSE; + + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* mcs51DeadMove - dispatch condition deadmove between */ +/* - remove pop/push */ +/* - remove mov r%1,%2 */ +/*-----------------------------------------------------------------*/ +bool +mcs51DeadMove (const char *reg, lineNode *currPl, lineNode *head) +{ + char pReg[5] = "ar"; + + _G.head = head; + strcat (pReg, reg); + + unvisitLines (_G.head); + cleanLabelRef(); + + if (strncmp (currPl->line, "pop", 3) == 0) + return removeDeadPopPush (pReg, currPl, head); + else if ( strncmp (currPl->line, "mov", 3) == 0 + && (currPl->line[3] == ' ' || currPl->line[3] == '\t')) + return removeDeadMove (pReg, currPl, head); + else + { + fprintf (stderr, "Error: " + "peephole rule with condition deadMove " + "used with unknown opocde:\n" + "\t%s\n", currPl->line); + return FALSE; + } +} diff --git a/src/mcs51/peep.h b/src/mcs51/peep.h new file mode 100644 index 0000000..fec1dd8 --- /dev/null +++ b/src/mcs51/peep.h @@ -0,0 +1,25 @@ +/*------------------------------------------------------------------------- + peep.h - header file for peephole optimizer helper functions + + Written By - Bernhard Held + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +bool mcs51DeadMove (const char *reg, lineNode *currPl, lineNode *head); diff --git a/src/mcs51/peeph.def b/src/mcs51/peeph.def new file mode 100644 index 0000000..08f8b02 --- /dev/null +++ b/src/mcs51/peeph.def @@ -0,0 +1,4758 @@ +// added by Jean Louis VERN for +// his shift stuff +replace { + xch a,%1 + xch a,%1 +} by { + ; Peephole 2.a removed redundant xch xch +} + +replace { +// saving 2 byte + mov %1,#0x00 + mov a,#0x00 +} by { + ; Peephole 3.a changed mov to clr + clr a + mov %1,a +} + +replace { +// saving 1 byte + mov %1,#0x00 + clr a +} by { + ; Peephole 3.b changed mov to clr + clr a + mov %1,a +} + +replace restart { +// saving 1 byte, loosing 1 cycle but maybe allowing peephole 3.b to start + mov %1,#0x00 + mov %2,#0x00 + mov a,%3 +} by { + ; Peephole 3.c changed mov to clr + clr a + mov %1,a + mov %2,a + mov a,%3 +} + +replace { + clr a + mov %1,a + mov %2,a + clr a +} by { + clr a + mov %1,a + mov %2,a + ; Peephole 3.d removed redundant clr +} + +replace { + clr a + mov %1,a + mov %2,a + mov %3,a + clr a +} by { + clr a + mov %1,a + mov %2,a + mov %3,a + ; Peephole 3.e removed redundant clr +} + +replace { + clr a + mov %1,a + mov %2,a + mov %3,a + mov %4,a + clr a +} by { + clr a + mov %1,a + mov %2,a + mov %3,a + mov %4,a + ; Peephole 3.f removed redundant clr +} + +replace { + clr a + mov %1,a + mov %2,a + mov %3,a + mov %4,a + mov %5,a + clr a +} by { + clr a + mov %1,a + mov %2,a + mov %3,a + mov %4,a + mov %5,a + ; Peephole 3.g removed redundant clr +} + +replace { + clr a + mov %1,a + mov %2,a + mov %3,#0x00 +} by { + clr a + mov %1,a + mov %2,a + ; Peephole 3.h changed mov %3,#0x00 to ...,a + mov %3,a +} + +replace { + clr a + mov %1,a + mov %2,a + mov %3,a + mov %4,#0x00 +} by { + clr a + mov %1,a + mov %2,a + mov %3,a + ; Peephole 3.i changed mov %4,#0x00 to ...,a + mov %4,a +} + +replace { + clr a + mov %1,a + mov %2,a + mov %3,a + mov %4,a + mov %5,#0x00 +} by { + clr a + mov %1,a + mov %2,a + mov %3,a + mov %4,a + ; Peephole 3.j changed mov %5,#0x00 to ...,a + mov %5,a +} + +replace { + clr a + mov %1,a + mov %2,a + mov %3,a + mov %4,a + mov %5,a + mov %6,#0x00 +} by { + clr a + mov %1,a + mov %2,a + mov %3,a + mov %4,a + mov %5,a + ; Peephole 3.k changed mov %6,#0x00 to ...,a + mov %6,a +} + +replace { + mov %1,a + mov dptr,#%2 + mov a,%1 + movx @dptr,a +} by { + mov %1,a + mov dptr,#%2 + ; Peephole 100 removed redundant mov + movx @dptr,a +} if notVolatile %1 + +// applies to f.e. lib/src/time.c (--model-large) +replace { + mov a,%1 + movx @dptr,a + inc dptr + mov a,%1 + movx @dptr,a + inc dptr + mov a,%1 + movx @dptr,a + inc dptr + mov a,%1 + movx @dptr,a +} by { + mov a,%1 + movx @dptr,a + inc dptr + ; Peephole 101.a removed redundant moves + movx @dptr,a + inc dptr + movx @dptr,a + inc dptr + movx @dptr,a +} if notVolatile %1 + +// applies to f.e. support/regression/tests/literalop.c (--model-large) +replace { + mov a,%1 + movx @dptr,a + inc dptr + mov a,%1 + movx @dptr,a + inc dptr + mov a,%1 + movx @dptr,a +} by { + mov a,%1 + movx @dptr,a + inc dptr + ; Peephole 101.b removed redundant moves + movx @dptr,a + inc dptr + movx @dptr,a +} if notVolatile %1 + +// applies to f.e. support/regression/tests/onebyte.c (--model-large) +replace { + mov a,%1 + movx @dptr,a + inc dptr + mov a,%1 + movx @dptr,a +} by { + mov a,%1 + movx @dptr,a + inc dptr + ; Peephole 101.c removed redundant mov + movx @dptr,a +} if notVolatile %1 + +replace { + mov %1,%2 + ljmp %3 +%4: + mov %1,%5 +%3: + mov dpl,%1 +%7: + mov sp,_bp + pop _bp +} by { + ; Peephole 102 removed redundant mov to %1 + mov dpl,%2 + ljmp %3 +%4: + mov dpl,%5 +%3: +%7: + mov sp,_bp + pop _bp +} if notVolatile(%1), labelRefCount(%3 1) + +replace { + mov %1,%2 + ljmp %3 +%4: + mov a%1,%5 +%3: + mov dpl,%1 +%7: + mov sp,_bp + pop _bp +} by { + ; Peephole 103 removed redundant mov to %1 + mov dpl,%2 + ljmp %3 +%4: + mov dpl,%5 +%3: +%7: + mov sp,_bp + pop _bp +} if labelRefCount(%3 1) + +// Does not seem to be triggered anymore +//replace { +// mov a,_bp +// clr c +// add a,#0x01 +// mov r%1,a +//} by { +// ; Peephole 104 optimized increment (acc not set to r%1, flags undefined) +// mov r%1,_bp +// inc r%1 +//} + +replace { + mov %1,a + mov a,%1 +} by { + mov %1,a + ; Peephole 105 removed redundant mov +} if notVolatile %1 + +replace { + mov %1,a + clr c + mov a,%1 +} by { + mov %1,a + clr c + ; Peephole 106 removed redundant mov +} if notVolatile %1 + +replace { + ljmp %1 +%1: +} by { + ; Peephole 107 removed redundant ljmp +%1: +} if labelRefCountChange(%1 -1) + +replace { + jc %1 + ljmp %5 +%1: +} by { + ; Peephole 108.a removed ljmp by inverse jump logic + jnc %5 +%1: +} if labelInRange(), labelRefCountChange(%1 -1) + +replace { + jz %1 + ljmp %5 +%1: +} by { + ; Peephole 108.b removed ljmp by inverse jump logic + jnz %5 +%1: +} if labelInRange(), labelRefCountChange(%1 -1) + +replace { + jnz %1 + ljmp %5 +%1: +} by { + ; Peephole 108.c removed ljmp by inverse jump logic + jz %5 +%1: +} if labelInRange(), labelRefCountChange(%1 -1) + +replace { + jb %1,%2 + ljmp %5 +%2: +} by { + ; Peephole 108.d removed ljmp by inverse jump logic + jnb %1,%5 +%2: +} if labelInRange(), labelRefCountChange(%2 -1) + +replace { + jnb %1,%2 + ljmp %5 +%2: +} by { + ; Peephole 108.e removed ljmp by inverse jump logic + jb %1,%5 +%2: +} if labelInRange(), labelRefCountChange(%2 -1) + +replace { + ljmp %5 +%1: +} by { + ; Peephole 112.b changed ljmp to sjmp + sjmp %5 +%1: +} if labelInRange + +replace { + clr a + cjne %1,%2,%3 + cpl a +%3: + rrc a + mov %4,c +} by { + ; Peephole 113.a optimized misc sequence + clr %4 + cjne %1,%2,%3 + setb %4 +%3: +} if labelRefCount %3 1 + +replace { + clr a + cjne %1,%2,%3 + cjne %10,%11,%3 + cpl a +%3: + rrc a + mov %4,c +} by { + ; Peephole 113.b optimized misc sequence + clr %4 + cjne %1,%2,%3 + cjne %10,%11,%3 + setb %4 +%3: +} if labelRefCount %3 2 + +replace { + clr a + cjne %1,%2,%3 + cpl a +%3: + jnz %4 +} by { + ; Peephole 115.a jump optimization (acc not set) + cjne %1,%2,%3 + sjmp %4 +%3: +} if labelRefCount %3 1 + +replace { + mov %1,a + cjne %1,#0x00,%2 + sjmp %3 +%2: +} by { + mov %1,a + ; Peephole 115.b jump optimization + jz %3 +%2: +} if labelRefCountChange(%2 -1) + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cpl a +%3: + jnz %4 +} by { + ; Peephole 115.c jump optimization (acc not set) + cjne %1,%2,%3 + cjne %9,%10,%3 + sjmp %4 +%3: +} if labelRefCount %3 2 + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + cpl a +%3: + jnz %4 +} by { + ; Peephole 115.d jump optimization (acc not set) + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + sjmp %4 +%3: +} if labelRefCount %3 3 + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + cjne %13,%14,%3 + cpl a +%3: + jnz %4 +} by { + ; Peephole 115.e jump optimization (acc not set) + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + cjne %13,%14,%3 + sjmp %4 +%3: +} if labelRefCount %3 4 + +replace { + mov a,#0x01 + cjne %1,%2,%3 + clr a +%3: + jnz %4 +} by { + ; Peephole 115.f jump optimization (acc not set) + cjne %1,%2,%4 +%3: +} if labelRefCount(%3 1), labelRefCountChange(%3 -1) + +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + clr a +%3: + jnz %4 +} by { + ; Peephole 115.g jump optimization (acc not set) + cjne %1,%2,%4 + cjne %10,%11,%4 +%3: +} if labelRefCount(%3 2), labelRefCountChange(%3 -2), labelRefCountChange(%4 1) + +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + clr a +%3: + jnz %4 +} by { + ; Peephole 115.h jump optimization (acc not set) + cjne %1,%2,%4 + cjne %10,%11,%4 + cjne %12,%13,%4 +%3: +} if labelRefCount(%3 3), labelRefCountChange(%3 -3), labelRefCountChange(%4 2) + +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + cjne %14,%15,%3 + clr a +%3: + jnz %4 +} by { + ; Peephole 115.i jump optimization (acc not set) + cjne %1,%2,%4 + cjne %10,%11,%4 + cjne %12,%13,%4 + cjne %14,%15,%4 +%3: +} if labelRefCount(%3 4), labelRefCountChange(%3 -4), labelRefCountChange(%4 3) + +replace { + mov a,#0x01 + cjne %1,%2,%3 + clr a +%3: + jz %4 +} by { + ; Peephole 115.j jump optimization (acc not set) + cjne %1,%2,%3 + sjmp %4 +%3: +} if labelRefCount %3 1 + +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + clr a +%3: + jz %4 +} by { + ; Peephole 115.k jump optimization (acc not set) + cjne %1,%2,%3 + cjne %10,%11,%3 + sjmp %4 +%3: +} if labelRefCount %3 2 + +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + clr a +%3: + jz %4 +} by { + ; Peephole 115.l jump optimization (acc not set) + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + sjmp %4 +%3: +} if labelRefCount %3 3 + +replace { + mov a,#0x01 + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + cjne %14,%15,%3 + clr a +%3: + jz %4 +} by { + ; Peephole 115.m jump optimization (acc not set) + cjne %1,%2,%3 + cjne %10,%11,%3 + cjne %12,%13,%3 + cjne %14,%15,%3 + sjmp %4 +%3: +} if labelRefCount %3 4 + +replace { + push psw + mov psw,%1 + push _bp + mov _bp,%2 +%3: + mov %2,_bp + pop _bp + pop psw + ret +} by { + ; Peephole 127 removed misc sequence + ret +} if labelRefCount %3 0 + +replace { + clr a + rlc a + jz %1 +} by { + ; Peephole 128 jump optimization + jnc %1 +} + +// applies to: bug-524691.c --model-large: while (uRight - uLeft > 1) +replace { + clr a + rlc a + jnz %0 +} by { + ; Peephole 129.a jump optimization + jc %0 +} + +// applies to: _fsdiv.c --xstack: if (mant1 < mant2) +replace { + clr a + rlc a + pop %1 + jnz %0 +} by { + ; Peephole 129.b optimized condition + pop %1 + jc %0 +} if notVolatile %1 + +// applies to: time.c --xstack: while((days += (LEAP_YEAR(year) ? 366 : 365)) <= epoch) +replace { + clr a + rlc a + pop %1 + pop %2 + jnz %0 +} by { + ; Peephole 129.c optimized condition + pop %1 + pop %2 + jc %0 +} if notVolatile %1 %2 + +// applies to: _memmove.c --xstack: if (((int)src < (int)dst) && ((((int)src)+acount) > (int)dst)) +replace { + clr a + rlc a + pop %1 + pop %2 + pop %3 + jnz %0 +} by { + ; Peephole 129.d optimized condition + pop %1 + pop %2 + pop %3 + jc %0 +} if notVolatile %1 %2 %3 + +replace { + mov r%1,@r%2 +} by { + ; Peephole 130 changed target address mode r%1 to ar%1 + mov ar%1,@r%2 +} + +replace { + mov a,%1 + subb a,#0x01 + mov %2,a + mov %1,%2 +} by { + ; Peephole 131 optimized decrement (not caring for c) + dec %1 + mov %2,%1 +} + +// ideally the optimizations of rules 132.x should be done in genCmpXX +replace { + clr c + mov a,#%1 + subb a,%2 + mov %3,c +} by { + ; Peephole 132.a optimized genCmpGt by inverse logic (acc differs) + mov a,%2 + add a,#0xff - %1 + mov %3,c +} if operandsLiteral(%1) + +replace { + clr c + mov a,#%1 + subb a,%2 + jnc %5 +} by { + ; Peephole 132.b optimized genCmpGt by inverse logic (acc differs) + mov a,%2 + add a,#0xff - %1 + jnc %5 +} if operandsLiteral(%1) + +replace { + clr c + mov a,#%1 + subb a,%2 + jc %5 +} by { + ; Peephole 132.c optimized genCmpGt by inverse logic (acc differs) + mov a,%2 + add a,#0xff - %1 + jc %5 +} if operandsLiteral(%1) + +// disabled. See bug1734654.c +//replace { +// clr c +// mov a,%1 +// subb a,#%2 +// mov %3,c +//} by { +// ; Peephole 132.d optimized genCmpGt by inverse logic +// mov a,#0x100 - %2 +// add a,%1 +// mov %3,c +//} if operandsNotRelated('0x00' %2), operandsLiteral(%2) + +replace { + clr c + mov a,%1 + subb a,#%2 + jnc %5 +} by { + ; Peephole 132.e optimized genCmpLt by inverse logic (carry differs) + mov a,#0x100 - %2 + add a,%1 + jc %5 +} if operandsNotRelated('0x00' %2), operandsLiteral(%2) + +replace { + clr c + mov a,%1 + subb a,#%2 + jc %5 +} by { + ; Peephole 132.f optimized genCmpLt by inverse logic (carry differs) + mov a,#0x100 - %2 + add a,%1 + jnc %5 +} if operandsNotRelated('0x00' %2), operandsLiteral(%2) + + +replace { + mov r%1,%2 + mov ar%3,@r%1 + inc r%3 + mov r%4,%2 + mov @r%4,ar%3 +} by { + mov r%1,%2 + ; Peephole 133 removed redundant moves + inc @r%1 + mov ar%3,@r%1 +} if notVolatile + +replace { + mov r%1,%2 + mov ar%3,@r%1 + dec r%3 + mov r%4,%2 + mov @r%4,ar%3 +} by { + mov r%1,%2 + ; Peephole 134 removed redundant moves + dec @r%1 + mov ar%3,@r%1 +} if notVolatile + +replace { + mov r%1,a + mov a,r%2 + orl a,r%1 +} by { + mov r%1,a + ; Peephole 135 removed redundant mov + orl a,r%2 +} + +replace { + mov %1,a + mov dpl,%2 + mov dph,%3 + mov a,%1 +} by { + mov %1,a + mov dpl,%2 + mov dph,%3 + ; Peephole 136 removed redundant mov +} if notVolatile %1 + +// WTF? Doesn't look sensible to me... +//replace { +// mov b,#0x00 +// mov a,%1 +// cjne %2,%3,%4 +// mov b,#0x01 +//%4: +// mov a,b +// jz %5 +//} by { +// ; Peephole 137 optimized misc jump sequence +// mov a,%1 +// cjne %2,%3,%5 +//%4: +//} if labelRefCount %4 1 +// +//replace { +// mov b,#0x00 +// mov a,%1 +// cjne %2,%3,%4 +// mov b,#0x01 +//%4: +// mov a,b +// jnz %5 +//} by { +// ; Peephole 138 optimized misc jump sequence +// mov a,%1 +// cjne %2,%3,%4 +// sjmp %5 +//%4: +//} if labelRefCount %4 1 + +replace { + mov r%1,a + anl ar%1,%2 + mov a,r%1 +} by { + ; Peephole 139.a removed redundant mov + anl a,%2 + mov r%1,a +} + +replace { + mov r%1,a + orl ar%1,%2 + mov a,r%1 +} by { + ; Peephole 139.b removed redundant mov + orl a,%2 + mov r%1,a +} + +replace { + mov r%1,a + xrl ar%1,%2 + mov a,r%1 +} by { + ; Peephole 139.c removed redundant mov + xrl a,%2 + mov r%1,a +} + +// applies to genlshOne +replace { + mov ar%1,@%2 + mov a,r%1 + add a,acc + mov r%1,a +} by { + ; Peephole 140 removed redundant mov + mov a,@%2 + add a,@%2 + mov r%1,a +} + +replace { + mov r%1,a + mov r%2,ar%1 + mov ar%1,@r%2 +} by { + ; Peephole 142 removed redundant mov + mov r%2,a + mov ar%1,@r%2 +} + +replace { + rlc a + mov acc.0,c +} by { + ; Peephole 143.a converted rlc to rl + rl a +} + +replace { + rrc a + mov acc.7,c +} by { + ; Peephole 143.b converted rrc to rc + rr a +} + +replace { + clr c + addc a,%1 +} by { + ; Peephole 145.a changed to add without carry + add a,%1 +} + +replace { + clr c + mov a,%1 + addc a,%2 +} by { + ; Peephole 145.b changed to add without carry + mov a,%1 + add a,%2 +} + +// 147: Fix compiler output to comply with 8051 instruction set. +replace { + orl r%1,a +} by { + ; Peephole 147.a changed target address mode r%1 to ar%1 + orl ar%1,a +} + +replace { + anl r%1,a +} by { + ; Peephole 147.b changed target address mode r%1 to ar%1 + anl ar%1,a +} + +replace { + xrl r%1,a +} by { + ; Peephole 147.c changed target address mode r%1 to ar%1 + xrl ar%1,a +} + +replace { + mov r%1,dpl + mov dpl,r%1 +%9: + ret +} by { + ; Peephole 150.a removed misc moves via dpl before return +%9: + ret +} + +replace { + mov r%1,dpl + mov r%2,dph + mov dpl,r%1 + mov dph,r%2 +%9: + ret +} by { + ; Peephole 150.b removed misc moves via dph, dpl before return +%9: + ret +} + +replace { + mov r%1,dpl + mov r%2,dph + mov dpl,r%1 +%9: + ret +} by { + ; Peephole 150.c removed misc moves via dph, dpl before return +%9: + ret +} + +replace { + mov r%1,dpl + mov r%2,dph + mov r%3,b + mov dpl,r%1 + mov dph,r%2 + mov b,r%3 +%9: + ret +} by { + ; Peephole 150.d removed misc moves via dph, dpl, b before return +%9: + ret +} + +replace { + mov r%1,dpl + mov r%2,dph + mov r%3,b + mov dpl,r%1 +%9: + ret +} by { + ; Peephole 150.e removed misc moves via dph, dpl, b before return +%9: + ret +} + +replace { + mov r%1,dpl + mov r%2,dph + mov r%3,b + mov dpl,r%1 + mov dph,r%2 +%9: + ret +} by { + ; Peephole 150.f removed misc moves via dph, dpl, b before return +%9: + ret +} + +replace { + mov r%1,dpl + mov r%2,dph + mov r%3,b + mov r%4,a + mov dpl,r%1 + mov dph,r%2 + mov b,r%3 + mov a,r%4 +%9: + ret +} by { + ; Peephole 150.g removed misc moves via dph, dpl, b, a before return +%9: + ret +} + +replace { + mov r%1,dpl + mov r%2,dph + mov r%3,b + mov r%4,a + mov dpl,r%1 + mov dph,r%2 +%9: + ret +} by { + ; Peephole 150.h removed misc moves via dph, dpl, b, a before return +%9: + ret +} + +replace { + mov r%1,dpl + mov r%2,dph + mov r%3,b + mov r%4,a + mov dpl,r%1 +%9: + ret +} by { + ; Peephole 150.i removed misc moves via dph, dpl, b, a before return +%9: + ret +} + +// peephole 213.a might revert this +replace { + mov %1,#%2 + xrl %1,#0x80 +} by { + ; Peephole 159 avoided xrl during execution + mov %1,#(%2 ^ 0x80) +} + +replace { + jnc %1 + sjmp %2 +%1: +} by { + ; Peephole 160.a removed sjmp by inverse jump logic + jc %2 +%1: +} if labelRefCountChange(%1 -1) + +replace { + jc %1 + sjmp %2 +%1: +} by { + ; Peephole 160.b removed sjmp by inverse jump logic + jnc %2 +%1: +} if labelRefCountChange(%1 -1) + +replace { + jnz %1 + sjmp %2 +%1: +} by { + ; Peephole 160.c removed sjmp by inverse jump logic + jz %2 +%1: +} if labelRefCountChange(%1 -1) + +replace { + jz %1 + sjmp %2 +%1: +} by { + ; Peephole 160.d removed sjmp by inverse jump logic + jnz %2 +%1: +} if labelRefCountChange(%1 -1) + +replace { + jnb %3,%1 + sjmp %2 +%1: +} by { + ; Peephole 160.e removed sjmp by inverse jump logic + jb %3,%2 +%1: +} if labelRefCountChange(%1 -1) + +replace { + jb %3,%1 + sjmp %2 +%1: +} by { + ; Peephole 160.f removed sjmp by inverse jump logic + jnb %3,%2 +%1: +} if labelRefCountChange(%1 -1) + +replace { + mov %1,%2 + mov %3,%1 + mov %2,%1 +} by { + mov %1,%2 + mov %3,%1 + ; Peephole 166 removed redundant mov +} if notVolatile %1 %2 + +replace { + mov c,%1 + cpl c + mov %1,c +} by { + ; Peephole 167 removed redundant bit moves (c not set to %1) + cpl %1 +} + +replace { + jnb %1,%2 + sjmp %3 +%2: +} by { + ; Peephole 168 jump optimization + jb %1,%3 +%2: +} if labelRefCountChange(%2 -1) + +replace { + jb %1,%2 + sjmp %3 +%2: +} by { + ; Peephole 169 jump optimization + jnb %1,%3 +%2: +} if labelRefCountChange(%2 -1) + +replace { + clr a + cjne %1,%2,%3 + cpl a +%3: + jz %4 +} by { + ; Peephole 170 jump optimization + cjne %1,%2,%4 +%3: +} if labelRefCount(%3 1), labelRefCountChange(%3 -1) + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cpl a +%3: + jz %4 +} by { + ; Peephole 171 jump optimization + cjne %1,%2,%4 + cjne %9,%10,%4 +%3: +} if labelRefCount(%3 2), labelRefCountChange(%3 -2), labelRefCountChange(%4 1) + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + cpl a +%3: + jz %4 +} by { + ; Peephole 172 jump optimization + cjne %1,%2,%4 + cjne %9,%10,%4 + cjne %11,%12,%4 +%3: +} if labelRefCount(%3 3), labelRefCountChange(%3 -3), labelRefCountChange(%4 2) + +replace { + clr a + cjne %1,%2,%3 + cjne %9,%10,%3 + cjne %11,%12,%3 + cjne %13,%14,%3 + cpl a +%3: + jz %4 +} by { + ; Peephole 173 jump optimization + cjne %1,%2,%4 + cjne %9,%10,%4 + cjne %11,%12,%4 + cjne %13,%14,%4 +%3: +} if labelRefCount(%3 4), labelRefCountChange(%3 -4), labelRefCountChange(%4 3) + +replace { + mov r%1,%2 + clr c + mov a,r%1 + subb a,#0x01 + mov %2,a +} by { + mov r%1,%2 + ; Peephole 174.a optimized decrement (acc not set to %2, flags undefined) + dec %2 +} + +replace { + mov r%1,%2 + mov a,r%1 + add a,#0x01 + mov %2,a +} by { + mov r%1,%2 + ; Peephole 174.b optimized increment (acc not set to %2, flags undefined) + inc %2 +} + +replace { + mov %1,@r%2 + inc %1 + mov @r%2,%1 +} by { + ; Peephole 174.c optimized increment, removed redundant mov + inc @r%2 + mov %1,@r%2 +} if notVolatile + +// this one will screw assignes to volatile/sfr's +replace { + mov %1,%2 + mov %2,%1 +} by { + mov %1,%2 + ; Peephole 177.a removed redundant mov +} if notVolatile %1 %2 + +// applies to f.e. scott-add.asm (--model-large) +replace { + mov r%1,a + mov a,ar%1 +} by { + mov r%1,a + ; Peephole 177.b removed redundant mov +} + +// applies to f.e. bug-408972.c +replace { + mov %1,%2 + mov %1,%3 +} by { + ; Peephole 177.c removed redundant mov + mov %1,%3 +} if notVolatile(%1 %2),operandsNotRelated(%1 %3) + +// applies to f.e. bug-408972.c +// not before peephole 177.c +replace restart { + mov %1,%2 + mov %3,%4 + mov %2,%1 +} by { + mov %1,%2 + mov %3,%4 + ; Peephole 177.d removed redundant mov +} if notVolatile(%1 %2),operandsNotRelated(%1 %2 %3) + +// applies to f.e. bug-607243.c +replace { + mov %1,%2 + mov a%1,%3 +} by { + ; peephole 177.e removed redundant mov %1,%2 + mov a%1,%3 +} if notVolatile(%2), operandsNotRelated(%1 %3) + +replace { + mov ar%1,%2 + mov r%1,%3 +} by { + ; peephole 177.f removed redundant mov + mov r%1,%3 +} if notVolatile %2 + +replace { + mov %1,%2 + mov a,%1 +} by { + ; peephole 177.g optimized mov sequence + mov a,%2 + mov %1,a +} if notVolatile %1 + +replace { + mov %1,%2 + mov a,%2 +} by { + ; peephole 177.h optimized mov sequence + mov a,%2 + mov %1,a +} if notVolatile %2 + +// applies to f.e. testfwk.c +replace { + mov r%1,a + mov ar%2,r%1 +} by { + mov r%1,a + ; peephole 177.i optimized mov sequence + mov r%2,a +} + +replace { + mov r%1,%2 + mov ar%3,r%1 + mov r%1,%4 +} by { + ; peephole 177.j optimized mov sequence + mov r%3,%2 + mov r%1,%4 +} + +replace { + mov a,%1 + mov b,a + mov a,%2 +} by { + ; Peephole 178 removed redundant mov + mov b,%1 + mov a,%2 +} + +// rules 179-182 provided by : Frieder +// saving 2 byte, 1 cycle +replace { + mov b,#0x00 + mov a,#0x00 +} by { + ; Peephole 179 changed mov to clr + clr a + mov b,a +} + +// applies to: +// volatile xdata char t; t=0x01; t=0x03; +replace { + mov dptr,%1 + mov a,%2 + movx @dptr,a + mov dptr,%1 +} by { + mov dptr,%1 + mov a,%2 + movx @dptr,a + ; Peephole 180.a removed redundant mov to dptr +} + +// volatile xdata char t; t=0x01; t=0x03; t=0x01; +replace { + mov dptr,%1 + mov a,%2 + movx @dptr,a + mov a,%3 + movx @dptr,a + mov dptr,%1 +} by { + mov dptr,%1 + mov a,%2 + movx @dptr,a + mov a,%3 + movx @dptr,a + ; Peephole 180.b removed redundant mov to dptr +} + +// saving 1 byte, 0 cycles +replace { + mov a,#0x00 +} by { + ; Peephole 181 changed mov to clr + clr a +} + +// saving 3 bytes, 2 cycles +// provided by Bernhard Held +replace { + mov dpl,#%1 + mov dph,#(%1 >> 8) +} by { + ; Peephole 182.a used 16 bit load of DPTR + mov dptr,#%1 +} + +// saving 3 byte, 2 cycles, return(NULL) profits here +replace { + mov dpl,#0x%1 + mov dph,#0x%2 +} by { + ; Peephole 182.b used 16 bit load of dptr + mov dptr,#0x%2%1 +} + +// saving 3 byte, 2 cycles. Probably obsoleted by 182.b +replace { + mov dpl,#%1 + mov dph,#%2 +} by { + ; Peephole 182.c used 16 bit load of dptr + mov dptr,#(((%2)<<8) + %1) +} + +// applies to return 0.0; in f.e. sincosf.c +replace { + mov dpl,#%1 + clr a + mov dph,a +} by { + ; Peephole 182.d used 16 bit load of dptr + mov dptr,#(%1&0x00ff) + clr a +} + +replace { + anl %1,#%2 + anl %1,#%3 +} by { + ; Peephole 183 avoided anl during execution + anl %1,#(%2&%3) +} + +replace { + mov %1,a + cpl a + mov %1,a +} by { + ; Peephole 184 removed redundant mov + cpl a + mov %1,a +} if notVolatile %1 + +//replace { +// acc being incremented might cause problems with register tracking +// mov %1,a +// inc %1 +//} by { +// ; Peephole 185 changed order of increment (acc incremented also!) +// inc a +// mov %1,a +//} if notVolatile %1 + +// char indexed access to: long code table[] = {4,3,2,1}; +replace restart { + add a,#%1 + mov dpl,a + clr a + addc a,#(%1 >> 8) + mov dph,a + clr a + movc a,@a+dptr + mov %2,a + inc dptr + clr a + movc a,@a+dptr + mov %3,a + inc dptr + clr a + movc a,@a+dptr + mov %4,a + inc dptr + clr a + movc a,@a+dptr +} by { + ; Peephole 186.a optimized movc sequence + mov b,a + mov dptr,#%1 + movc a,@a+dptr + mov %2,a + inc dptr + mov a,b + movc a,@a+dptr + mov %3,a + inc dptr + mov a,b + movc a,@a+dptr + mov %4,a + inc dptr + mov a,b + movc a,@a+dptr +} + +// char indexed access to: void* code table[] = {4,3,2,1}; +replace restart { + add a,#%1 + mov dpl,a + clr a + addc a,#(%1 >> 8) + mov dph,a + clr a + movc a,@a+dptr + mov %2,a + inc dptr + clr a + movc a,@a+dptr + mov %3,a + inc dptr + clr a + movc a,@a+dptr +} by { + ; Peephole 186.b optimized movc sequence + mov b,a + mov dptr,#%1 + movc a,@a+dptr + mov %2,a + inc dptr + mov a,b + movc a,@a+dptr + mov %3,a + inc dptr + mov a,b + movc a,@a+dptr +} + +// char indexed access to: int code table[] = {4,3,2,1}; +replace restart { + add a,#%1 + mov dpl,a + clr a + addc a,#(%1 >> 8) + mov dph,a + clr a + movc a,@a+dptr + mov %2,a + inc dptr + clr a + movc a,@a+dptr +} by { + ; Peephole 186.c optimized movc sequence + mov %2,a + mov dptr,#%1 + movc a,@a+dptr + xch a,%2 + inc dptr + movc a,@a+dptr +} + +// char indexed access to: char code table[] = {4,3,2,1}; +replace { + add a,#%1 + mov dpl,a + clr a + addc a,#(%1 >> 8) + mov dph,a + clr a + movc a,@a+dptr +} by { + ; Peephole 186.d optimized movc sequence + mov dptr,#%1 + movc a,@a+dptr +} + +// char indexed access to: int code table[] = {4,3,2,1}; +replace { + mov b,#0x02 + mul ab + add a,#%2 + mov dpl,a + mov a,#(%2 >> 8) + addc a,b + mov dph,a + clr a + movc a,@a+dptr + mov %3,a + mov a,#0x01 + movc a,@a+dptr +} by { + ; Peephole 186.e optimized movc sequence (b, dptr differ) + add a,acc + mov b,a + mov dptr,#%2 + jnc .+3 + inc dph + movc a,@a+dptr + mov %3,a + mov a,b + inc a + movc a,@a+dptr +} + +replace { + mov r%1,%2 + anl ar%1,#%3 + mov a,r%1 +} by { + ; Peephole 187 used a instead of ar%1 for anl + mov a,%2 + anl a,#%3 + mov r%1,a +} + +replace { + mov %1,a + mov dptr,%2 + movc a,@a+dptr + mov %1,a +} by { + ; Peephole 188 removed redundant mov + mov dptr,%2 + movc a,@a+dptr + mov %1,a +} if notVolatile %1 + +replace { + anl a,#0x0f + mov %1,a + mov a,#0x0f + anl a,%1 +} by { + anl a,#0x0f + mov %1,a + ; Peephole 189 removed redundant mov and anl +} if notVolatile %1 + +// rules 190 & 191 need to be in order +replace { + mov a,%1 + lcall __gptrput + mov a,%1 +} by { + mov a,%1 + lcall __gptrput + ; Peephole 190 removed redundant mov +} if notVolatile %1 + +replace { + mov %1,a + mov dpl,%2 + mov dph,%3 + mov b,%4 + mov a,%1 +} by { + mov %1,a + mov dpl,%2 + mov dph,%3 + mov b,%4 + ; Peephole 191 removed redundant mov +} if notVolatile %1 + +// applies to f.e. regression/ports/mcs51/support.c +replace { + mov r%1,a + mov @r%2,ar%1 +} by { + mov r%1,a + ; Peephole 192.a used a instead of ar%1 as source + mov @r%2,a +} + +// applies to f.e. printf_large.c +replace { + mov ar%1,@r%2 + mov a,r%1 +} by { + ; Peephole 192.b used a instead of ar%1 as destination + mov a,@r%2 + mov r%1,a +} + +replace { + jnz %3 + mov a,%4 + jnz %3 + mov a,%9 + jnz %3 + mov a,%12 + cjne %13,%14,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 193.a optimized misc jump sequence + jnz %8 + mov a,%4 + jnz %8 + mov a,%9 + jnz %8 + mov a,%12 + cjne %13,%14,%8 + sjmp %7 +%3: +} if labelInRange(%8), labelRefCount(%3 4), labelRefCountChange(%3 -4), labelRefCountChange(%8 3) + +replace { + cjne %1,%2,%3 + mov a,%4 + cjne %5,%6,%3 + mov a,%9 + cjne %10,%11,%3 + mov a,%12 + cjne %13,%14,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 193.b optimized misc jump sequence + cjne %1,%2,%8 + mov a,%4 + cjne %5,%6,%8 + mov a,%9 + cjne %10,%11,%8 + mov a,%12 + cjne %13,%14,%8 + sjmp %7 +%3: +} if labelInRange(%8), labelRefCount(%3 4), labelRefCountChange(%3 -4), labelRefCountChange(%8 3) + +replace { + cjne @%1,%2,%3 + inc %1 + cjne @%1,%6,%3 + inc %1 + cjne @%1,%11,%3 + inc %1 + cjne @%1,%14,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 193.c optimized misc jump sequence + cjne @%1,%2,%8 + inc %1 + cjne @%1,%6,%8 + inc %1 + cjne @%1,%11,%8 + inc %1 + cjne @%1,%14,%8 + sjmp %7 +%3: +} if labelInRange(%8), labelRefCount(%3 4), labelRefCountChange(%3 -4), labelRefCountChange(%8 3) + +replace { + cjne %1,%2,%3 + cjne %5,%6,%3 + cjne %10,%11,%3 + cjne %13,%14,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 194 optimized misc jump sequence + cjne %1,%2,%8 + cjne %5,%6,%8 + cjne %10,%11,%8 + cjne %13,%14,%8 + sjmp %7 +%3: +} if labelInRange(%8), labelRefCount(%3 4), labelRefCountChange(%3 -4), labelRefCountChange(%8 3) + +replace { + jnz %3 + mov a,%4 + jnz %3 + mov a,%9 + cjne %10,%11,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 195.a optimized misc jump sequence + jnz %8 + mov a,%4 + jnz %8 + mov a,%9 + cjne %10,%11,%8 + sjmp %7 +%3: +} if labelInRange(%8), labelRefCount(%3 3), labelRefCountChange(%3 -3), labelRefCountChange(%8 2) + +replace { + cjne %1,%2,%3 + mov a,%4 + cjne %5,%6,%3 + mov a,%9 + cjne %10,%11,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 195.b optimized misc jump sequence + cjne %1,%2,%8 + mov a,%4 + cjne %5,%6,%8 + mov a,%9 + cjne %10,%11,%8 + sjmp %7 +%3: +} if labelInRange(%8), labelRefCount(%3 3), labelRefCountChange(%3 -3), labelRefCountChange(%8 2) + +replace { + cjne @%1,%2,%3 + inc %1 + cjne @%1,%6,%3 + inc %1 + cjne @%1,%11,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 195.c optimized misc jump sequence + cjne @%1,%2,%8 + inc %1 + cjne @%1,%6,%8 + inc %1 + cjne @%1,%11,%8 + sjmp %7 +%3: +} if labelInRange(%8), labelRefCount(%3 3), labelRefCountChange(%3 -3), labelRefCountChange(%8 2) + +replace { + cjne %1,%2,%3 + cjne %5,%6,%3 + cjne %10,%11,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 196 optimized misc jump sequence + cjne %1,%2,%8 + cjne %5,%6,%8 + cjne %10,%11,%8 + sjmp %7 +%3: +} if labelInRange(%8), labelRefCount(%3 3), labelRefCountChange(%3 -3), labelRefCountChange(%8 2) + +replace { + jnz %3 + mov a,%4 + cjne %5,%6,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 197.a optimized misc jump sequence + jnz %8 + mov a,%4 + cjne %5,%6,%8 + sjmp %7 +%3: +} if labelInRange(%8), labelRefCount(%3 2), labelRefCountChange(%3 -2), labelRefCountChange(%8 1) + +replace { + cjne %1,%2,%3 + mov a,%4 + cjne %5,%6,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 197.b optimized misc jump sequence + cjne %1,%2,%8 + mov a,%4 + cjne %5,%6,%8 + sjmp %7 +%3: +} if labelInRange(%8), labelRefCount(%3 2), labelRefCountChange(%3 -2), labelRefCountChange(%8 1) + +replace { + cjne @%1,%2,%3 + inc %1 + cjne @%1,%6,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 197.c optimized misc jump sequence + cjne @%1,%2,%8 + inc %1 + cjne @%1,%6,%8 + sjmp %7 +%3: +} if labelInRange(%8), labelRefCount(%3 2), labelRefCountChange(%3 -2), labelRefCountChange(%8 1) + +replace { + cjne %1,%2,%3 + cjne %5,%6,%3 + sjmp %7 +%3: + sjmp %8 +} by { + ; Peephole 198.a optimized misc jump sequence + cjne %1,%2,%8 + cjne %5,%6,%8 + sjmp %7 +%3: +} if labelInRange(%8), labelRefCount(%3 2), labelRefCountChange(%3 -2), labelRefCountChange(%8 1) + +replace { + cjne %1,%2,%3 + sjmp %4 +%3: + sjmp %5 +} by { + ; Peephole 198.b optimized misc jump sequence + cjne %1,%2,%5 + sjmp %4 +%3: +} if labelInRange(%5), labelRefCount(%3 1), labelRefCountChange(%3 -1) + +replace { + sjmp %1 +%1: +} by { + ; Peephole 200.a removed redundant sjmp +%1: +} if labelRefCountChange(%1 -1) + +replace { + sjmp %1 +%2: +%1: +} by { + ; Peephole 200.b removed redundant sjmp +%2: +%1: +} if labelRefCountChange(%1 -1) + +replace { + push acc + mov dptr,%1 + pop acc +} by { + ; Peephole 202 removed redundant push pop + mov dptr,%1 +} + +replace { + mov r%1,_spx + lcall %2 + mov r%1,_spx +} by { + ; Peephole 203 removed mov r%1,_spx + lcall %2 +} + +replace { + mov %1,a + add a,acc + mov %1,a +} by { + ; Peephole 204 removed redundant mov + add a,acc + mov %1,a +} if notVolatile %1 + +replace { + djnz %1,%2 + sjmp %3 +%2: + sjmp %4 +%3: +} by { + ; Peephole 205 optimized misc jump sequence + djnz %1,%4 +%2: +%3: +} if labelRefCount(%2 1), labelRefCountChange(%2 -1), labelRefCountChange(%3 -1) + +replace { + mov %1,%1 +} by { + ; Peephole 206 removed redundant mov %1,%1 +} if notVolatile %1 + +// Does not seem to be triggered anymore +//replace { +// mov a,_bp +// add a,#0x00 +// mov %1,a +//} by { +// ; Peephole 207 removed zero add (acc not set to %1, flags undefined) +// mov %1,_bp +//} + +replace { + push acc + mov r%1,_bp + pop acc +} by { + ; Peephole 208 removed redundant push pop + mov r%1,_bp +} + +// Does not seem to be triggered anymore +//replace { +// mov a,_bp +// add a,#0x00 +// inc a +// mov %1,a +//} by { +// ; Peephole 209 optimized increment (acc not set to %1, flags undefined) +// mov %1,_bp +// inc %1 +//} + +replace { + mov dptr,#((((%1 >> 8)) <<8) + %1) +} by { + ; Peephole 210 simplified expression + mov dptr,#%1 +} + +replace { + push %1 + pop %1 +} by { + ; Peephole 211 removed redundant push %1 pop %1 +} + +// Does not seem to be triggered anymore +//replace { +// mov a,_bp +// add a,#0x01 +// mov r%1,a +//} by { +// ; Peephole 212 reduced add sequence to inc +// mov r%1,_bp +// inc r%1 +//} + +// reverts peephole 159? asx8051 cannot handle, too complex? +replace { + mov %1,#(( %2 >> 8 ) ^ 0x80) +} by { + ; Peephole 213.a inserted fix + mov %1,#(%2 >> 8) + xrl %1,#0x80 +} + +replace { + mov %1,#(( %2 + %3 >> 8 ) ^ 0x80) +} by { + ; Peephole 213.b inserted fix + mov %1,#((%2 + %3) >> 8) + xrl %1,#0x80 +} + + +replace { + mov %1,a + mov a,%2 + add a,%1 +} by { + mov %1,a + ; Peephole 214.a removed redundant mov + add a,%2 +} if operandsNotSame + +replace { + mov %1,a + add a,%2 + mov %1,a +} by { + ; Peephole 214.b removed redundant mov + add a,%2 + mov %1,a +} if operandsNotSame + +replace { + mov r%1,%2 + clr a + inc r%1 + mov @r%1,a + dec r%1 + mov @r%1,a +} by { + mov r%1,%2 + clr a + ; Peephole 216.a simplified clear (2 bytes) + mov @r%1,a + inc r%1 + mov @r%1,a +} + +replace { + mov r%1,%2 + clr a + inc r%1 + inc r%1 + mov @r%1,a + dec r%1 + mov @r%1,a + dec r%1 + mov @r%1,a +} by { + mov r%1,%2 + clr a + ; Peephole 216.b simplified clear (3 bytes) + mov @r%1,a + inc r%1 + mov @r%1,a + inc r%1 + mov @r%1,a +} + +replace { + mov r%1,%2 + clr a + inc r%1 + inc r%1 + inc r%1 + mov @r%1,a + dec r%1 + mov @r%1,a + dec r%1 + mov @r%1,a + dec r%1 + mov @r%1,a +} by { + mov r%1,%2 + clr a + ; Peephole 216.c simplified clear (4 bytes) + mov @r%1,a + inc r%1 + mov @r%1,a + inc r%1 + mov @r%1,a + inc r%1 + mov @r%1,a +} + +replace { + clr a + movx @dptr,a + mov dptr,%1 + clr a + movx @dptr,a +} by { + ; Peephole 219.a removed redundant clear + clr a + movx @dptr,a + mov dptr,%1 + movx @dptr,a +} + +replace { + clr a + movx @dptr,a + mov dptr,%1 + movx @dptr,a + mov dptr,%2 + clr a + movx @dptr,a +} by { + clr a + movx @dptr,a + mov dptr,%1 + movx @dptr,a + mov dptr,%2 + ; Peephole 219.b removed redundant clear + movx @dptr,a +} + +replace { + mov dps,#0x00 + mov dps,#0x01 +} by { + ; Peephole 220.a removed bogus DPS set + mov dps,#0x01 +} + +replace { + mov dps,#0x01 + mov dps,#0x00 +} by { + ; Peephole 220.b removed bogus DPS set + mov dps,#0x00 +} + +replace { + mov %1 + %2,(%2 + %1) +} by { + ; Peephole 221.a remove redundant mov +} if notVolatile + +replace { + mov (%1 + %2 + %3),((%2 + %1) + %3) +} by { + ; Peephole 221.b remove redundant mov +} if notVolatile + +replace { + dec r%1 + inc r%1 +} by { + ; Peephole 222 removed dec/inc pair +} + +replace { + mov %1,dpl + mov %2,dph + mov dpl,%1 + mov dph,%2 +} by { + mov %1,dpl + mov %2,dph + ; Peephole 223.a removed redundant dph/dpl moves +} if notVolatile %1 %2 + +replace { + mov %1,dpl + mov (%1 + 1),dph + mov dpl,%1 + mov dph,(%1 + 1) +} by { + mov %1,dpl + mov (%1 + 1),dph + ; Peephole 223.b removed redundant dph/dpl moves +} if notVolatile %1 + +replace { + mov a,%1 + movx @dptr,a + mov dpl,%2 + mov dph,%3 + mov b,%4 + mov a,%1 +} by { + mov a,%1 + movx @dptr,a + mov dpl,%2 + mov dph,%3 + mov b,%4 + ; Peephole 225 removed redundant move to acc +} if notVolatile %1 + +replace { + clr a + movx @%1,a + inc %1 + clr a +} by { + clr a + movx @%1,a + inc %1 + ; Peephole 226.a removed unnecessary clr +} + +replace { + clr a + movx @%1,a + inc %1 + movx @%1,a + inc %1 + clr a +} by { + clr a + movx @%1,a + inc %1 + movx @%1,a + inc %1 + ; Peephole 226.b removed unnecessary clr +} + +replace { + mov dptr,#%1 + clr a + inc dptr + inc dptr + inc dptr + movx @dptr,a + lcall __decdptr + movx @dptr,a + lcall __decdptr + movx @dptr,a + lcall __decdptr + movx @dptr,a +} by { + mov dptr,#%1 + clr a + ; Peephole 227.a replaced inefficient 32 bit clear + movx @dptr,a + inc dptr + movx @dptr,a + inc dptr + movx @dptr,a + inc dptr + movx @dptr,a + mov dptr,#%1 +} + +replace { + mov dptr,#%1 + clr a + inc dptr + inc dptr + inc dptr + movx @dptr,a + lcall __decdptr + movx @dptr,a + lcall __decdptr + movx @dptr,a + lcall __decdptr + mov a,#%2 + movx @dptr,a +} by { + mov dptr,#%1 + ; Peephole 227.b replaced inefficient 32 constant + mov a,#%2 + movx @dptr,a + inc dptr + clr a + movx @dptr,a + inc dptr + movx @dptr,a + inc dptr + movx @dptr,a + mov dptr,#%1 +} + +replace { + mov dptr,#%1 + clr a + inc dptr + movx @dptr,a + lcall __decdptr + movx @dptr,a +} by { + mov dptr,#%1 + clr a + ; Peephole 227.c replaced inefficient 16 bit clear + movx @dptr,a + inc dptr + movx @dptr,a + mov dptr,#%1 +} + +replace { + mov dptr,#%1 + clr a + inc dptr + movx @dptr,a + lcall __decdptr + mov a,#%2 + movx @dptr,a +} by { + mov dptr,#%1 + ; Peephole 227.d replaced inefficient 16 bit constant + mov a,#%2 + movx @dptr,a + inc dptr + clr a + movx @dptr,a + mov dptr,#%1 +} + +// this last peephole often removes the last mov from 227.a - 227.d +replace { + mov dptr,#%1 + mov dptr,#%2 +} by { + ; Peephole 227.e removed redundant mov to dptr + mov dptr,#%2 +} + +replace { + movx a,@dptr +} by { + ; Peephole 232 using movc to read xdata (--xram-movc) + clr a + movc a,@a+dptr +} if xramMovcOption + +replace { + lcall _gptrget +} by { + ; Peephole 233 using _gptrgetc instead of _gptrget (--xram-movc) + lcall _gptrgetc +} if xramMovcOption + +replace { + mov r%1,a + mov dpl,r%1 +%2: + ret +} by { + ; Peephole 234.a loading dpl directly from a(ccumulator), r%1 not set + mov dpl,a +%2: + ret +} + +replace { + mov r%1,a + mov dpl,r%2 + mov dph,r%1 +%3: + ret +} by { + ; Peephole 234.b loading dph directly from a(ccumulator), r%1 not set + mov dpl,r%2 + mov dph,a +%3: + ret +} + +// 14 rules by Fiorenzo D. Ramaglia + +replace { + add a,ar%1 +} by { + ; Peephole 236.a used r%1 instead of ar%1 + add a,r%1 +} + +replace { + addc a,ar%1 +} by { + ; Peephole 236.b used r%1 instead of ar%1 + addc a,r%1 +} + +replace { + anl a,ar%1 +} by { + ; Peephole 236.c used r%1 instead of ar%1 + anl a,r%1 +} + +replace { + dec ar%1 +} by { + ; Peephole 236.d used r%1 instead of ar%1 + dec r%1 +} + +replace { + djnz ar%1,%2 +} by { + ; Peephole 236.e used r%1 instead of ar%1 + djnz r%1,%2 +} + +replace { + inc ar%1 +} by { + ; Peephole 236.f used r%1 instead of ar%1 + inc r%1 +} + +replace { + mov a,ar%1 +} by { + ; Peephole 236.g used r%1 instead of ar%1 + mov a,r%1 +} + +replace { + mov ar%1,#%2 +} by { + ; Peephole 236.h used r%1 instead of ar%1 + mov r%1,#%2 +} + +replace { + mov ar%1,a +} by { + ; Peephole 236.i used r%1 instead of ar%1 + mov r%1,a +} + +replace { + mov ar%1,ar%2 +} by { + ; Peephole 236.j used r%1 instead of ar%1 + mov r%1,ar%2 +} + +replace { + orl a,ar%1 +} by { + ; Peephole 236.k used r%1 instead of ar%1 + orl a,r%1 +} + +replace { + subb a,ar%1 +} by { + ; Peephole 236.l used r%1 instead of ar%1 + subb a,r%1 +} + +replace { + xch a,ar%1 +} by { + ; Peephole 236.m used r%1 instead of ar%1 + xch a,r%1 +} + +replace { + xrl a,ar%1 +} by { + ; Peephole 236.n used r%1 instead of ar%1 + xrl a,r%1 +} + +replace { + sjmp %1 +%2: + mov %3,%4 +%1: + ret +} by { + ; Peephole 237.a removed sjmp to ret + ret +%2: + mov %3,%4 +%1: + ret +} if labelRefCountChange(%1 -1) + +replace { + sjmp %1 +%2: + mov %3,%4 + mov dpl,%5 + mov dph,%6 +%1: + ret +} by { + ; Peephole 237.b removed sjmp to ret + ret +%2: + mov %3,%4 + mov dpl,%5 + mov dph,%6 +%1: + ret +} if labelRefCountChange(%1 -1) + +// applies to f.e. device/lib/log10f.c +replace { + mov %1,%9 + mov %2,%10 + mov %3,%11 + mov %4,%12 + + mov %5,%13 + mov %6,%14 + mov %7,%15 + mov %8,%16 + + mov %9,%1 + mov %10,%2 + mov %11,%3 + mov %12,%4 +} by { + mov %1,%9 + mov %2,%10 + mov %3,%11 + mov %4,%12 + + mov %5,%13 + mov %6,%14 + mov %7,%15 + mov %8,%16 + ; Peephole 238.a removed 4 redundant moves +} if operandsNotSame8(%1 %2 %3 %4 %5 %6 %7 %8), notVolatile(%1 %2 %3 %4 %9 %10 %11 %12) + +// applies to device/lib/log10f.c +replace { + mov %1,%5 + mov %2,%6 + mov %3,%7 + mov %4,%8 + + mov %5,%1 + mov %6,%2 + mov %7,%3 +} by { + mov %1,%5 + mov %2,%6 + mov %3,%7 + mov %4,%8 + ; Peephole 238.b removed 3 redundant moves +} if operandsNotSame7(%1 %2 %3 %4 %5 %6 %7), notVolatile(%1 %2 %3 %5 %6 %7) + +// applies to f.e. device/lib/time.c +replace { + mov %1,%5 + mov %2,%6 + + mov %3,%7 + mov %4,%8 + + mov %5,%1 + mov %6,%2 +} by { + mov %1,%5 + mov %2,%6 + + mov %3,%7 + mov %4,%8 + ; Peephole 238.c removed 2 redundant moves +} if operandsNotSame4(%1 %2 %3 %4), notVolatile(%1 %2 %5 %6) + +// applies to f.e. support/regression/tests/bug-524209.c +replace { + mov %1,%4 + mov %2,%5 + mov %3,%6 + + mov %4,%1 + mov %5,%2 + mov %6,%3 +} by { + mov %1,%4 + mov %2,%5 + mov %3,%6 + ; Peephole 238.d removed 3 redundant moves +} if operandsNotSame6(%1 %2 %3 %4 %5 %6), notVolatile(%1 %2 %3 %4 %5 %6) + +// applies to f.e. ser_ir.asm +replace { + mov r%1,acc +} by { + ; Peephole 239 used a instead of acc + mov r%1,a +} + +replace restart { + mov a,%1 + addc a,#0x00 +} by { + ; Peephole 240 use clr instead of addc a,#0 + clr a + addc a,%1 +} + +// peepholes 241.a to 241.d and 241.e to 241.h need to be in order +replace { + cjne r%2,#%3,%0 + cjne r%4,#%5,%0 + cjne r%6,#%7,%0 + cjne r%8,#%9,%0 + mov a,#0x01 + sjmp %1 +%0: + clr a +%1: +} by { + ; Peephole 241.a optimized compare + clr a + cjne r%2,#%3,%0 + cjne r%4,#%5,%0 + cjne r%6,#%7,%0 + cjne r%8,#%9,%0 + inc a +%0: +%1: +} if labelRefCountChange(%1 -1) + +// applies to generic pointer compare +replace { + cjne r%2,#%3,%0 + cjne r%4,#%5,%0 + cjne r%6,#%7,%0 + mov a,#0x01 + sjmp %1 +%0: + clr a +%1: +} by { + ; Peephole 241.b optimized compare + clr a + cjne r%2,#%3,%0 + cjne r%4,#%5,%0 + cjne r%6,#%7,%0 + inc a +%0: +%1: +} if labelRefCountChange(%1 -1) + +// applies to f.e. time.c +replace { + cjne r%2,#%3,%0 + cjne r%4,#%5,%0 + mov a,#0x01 + sjmp %1 +%0: + clr a +%1: +} by { + ; Peephole 241.c optimized compare + clr a + cjne r%2,#%3,%0 + cjne r%4,#%5,%0 + inc a +%0: +%1: +} if labelRefCountChange(%1 -1) + +// applies to f.e. malloc.c +replace { + cjne r%2,#%3,%0 + mov a,#0x01 + sjmp %1 +%0: + clr a +%1: +} by { + ; Peephole 241.d optimized compare + clr a + cjne r%2,#%3,%0 + inc a +%0: +%1: +} if labelRefCountChange(%1 -1) + +// applies to f.e. j = (k!=0x1000); +// with volatile idata long k; +replace { + cjne @r%0,#%3,%1 + inc r%0 + cjne @r%0,#%4,%1 + inc r%0 + cjne @r%0,#%5,%1 + inc r%0 + cjne @r%0,#%6,%1 + mov a,#0x01 + sjmp %2 +%1: + clr a +%2: +} by { + ; Peephole 241.e optimized compare + clr a + cjne @r%0,#%3,%1 + inc r%0 + cjne @r%0,#%4,%1 + inc r%0 + cjne @r%0,#%5,%1 + inc r%0 + cjne @r%0,#%6,%1 + inc a +%1: +%2: +} if labelRefCountChange(%2 -1) + +// applies to f.e. j = (p!=NULL); +// with volatile idata char *p; +replace { + cjne @r%0,#%3,%1 + inc r%0 + cjne @r%0,#%4,%1 + inc r%0 + cjne @r%0,#%5,%1 + mov a,#0x01 + sjmp %2 +%1: + clr a +%2: +} by { + ; Peephole 241.f optimized compare + clr a + cjne @r%0,#%3,%1 + inc r%0 + cjne @r%0,#%4,%1 + inc r%0 + cjne @r%0,#%5,%1 + inc a +%1: +%2: +} if labelRefCountChange(%2 -1) + +// applies to f.e. j = (k!=0x1000); +// with volatile idata int k; +replace { + cjne @r%0,#%3,%1 + inc r%0 + cjne @r%0,#%4,%1 + mov a,#0x01 + sjmp %2 +%1: + clr a +%2: +} by { + ; Peephole 241.g optimized compare + clr a + cjne @r%0,#%3,%1 + inc r%0 + cjne @r%0,#%4,%1 + inc a +%1: +%2: +} if labelRefCountChange(%2 -1) + +// applies to f.e. vprintf.asm (--stack-auto) +replace { + cjne @r%0,#%3,%1 + mov a,#0x01 + sjmp %2 +%1: + clr a +%2: +} by { + ; Peephole 241.h optimized compare + clr a + cjne @r%0,#%3,%1 + inc a +%1: +%2: +} if labelRefCountChange(%2 -1) + +// applies to f.e. scott-bool1.c +replace { + jnz %1 + mov %2,%3 +%1: + jz %4 +} by { + jnz %1 + mov %2,%3 + ; Peephole 242.a avoided branch jnz to jz + jz %4 +%1: +} if labelRefCount %1 1 + +// applies to f.e. scott-bool1.c +replace { + jnz %1 + mov %2,%3 + orl a,%5 +%1: + jz %4 +} by { + jnz %1 + mov %2,%3 + orl a,%5 + ; Peephole 242.b avoided branch jnz to jz + jz %4 +%1: +} if labelRefCount %1 1 + +// applies to f.e. logic.c +replace { + jnz %1 + mov %2,%3 + orl a,%5 + orl a,%6 + orl a,%7 +%1: + jz %4 +} by { + jnz %1 + mov %2,%3 + orl a,%5 + orl a,%6 + orl a,%7 + ; Peephole 242.c avoided branch jnz to jz + jz %4 +%1: +} if labelRefCount %1 1 + +// applies to f.e. vprintf.c +// this is a rare case, usually the "tail increment" is noticed earlier +replace { + cjne %1,%2,%3 + inc %4 +%3: + sjmp %5 +} by { + ; Peephole 243 avoided branch to sjmp + cjne %1,%2,%5 + inc %4 +%3: + sjmp %5 +} if labelInRange(), labelRefCountChange(%3 -1), labelRefCountChange(%5 1) + +// applies to f.e. simplefloat.c (saving 1 cycle) +replace { + mov r%1,dpl + mov a,r%1 +} by { + ; Peephole 244.a moving first to a instead of r%1 + mov a,dpl + mov r%1,a +} + +// applies to f.e. _itoa.c (saving 1 cycle) +replace { + mov r%1,dph + mov a,r%1 +} by { + ; Peephole 244.b moving first to a instead of r%1 + mov a,dph + mov r%1,a +} + + +// applies to f.e. bug-460010.c (saving 1 cycle) +replace { + mov r%1,a + mov dpl,r%1 +} by { + mov r%1,a + ; Peephole 244.c loading dpl from a instead of r%1 + mov dpl,a +} + +replace { + mov r%1,a + mov dph,r%1 +} by { + mov r%1,a + ; Peephole 244.d loading dph from a instead of r%1 + mov dph,a +} + +// this one is safe but disables 245.a 245.b +// please remove 245 if 245.a 245.b are found to be safe +// applies to f.e. scott-compare.c +replace { + clr a + rlc a + mov r%1,a + cjne a,#0x01,%2 +%2: + clr a + rlc a + mov r%1,a +} by { + ; Peephole 245 optimized complement (r%1 and acc set needed?) + cpl c + clr a + rlc a + mov r%1,a +} if labelRefCount(%2 1), labelRefCountChange(%2 -1) + +// this one will not be triggered if 245 is present +// please remove 245 if 245.a 245.b are found to be safe +// applies to f.e. vprintf.c +replace { + clr a + rlc a + mov r%1,a + cjne a,#0x01,%2 +%2: + clr a + rlc a + mov r%1,a + jz %3 +} by { + ; Peephole 245.a optimized conditional jump (r%1 and acc not set!) + jc %3 +} if labelRefCount(%2 1), labelRefCountChange(%2 -1) + +// this one will not be triggered if 245 is present +// please remove 245 if 245.a 245.b are found to be safe +// applies to f.e. scott-compare.c +replace { + clr a + rlc a + mov r%1,a + cjne a,#0x01,%2 +%2: + clr a + rlc a + mov r%1,a + jnz %3 +} by { + ; Peephole 245.b optimized conditional jump (r%1 and acc not set!) + jnc %3 +} if labelRefCount(%2 1), labelRefCountChange(%2 -1) + + +// rules 246.x apply to f.e. bitfields.c +replace { + mov dptr,#%1 + movx a,@dptr + anl a,#%2 + movx @dptr,a + mov dptr,#%1 + movx a,@dptr + anl a,#%3 + movx @dptr,a +} by { + mov dptr,#%1 + movx a,@dptr + ; Peephole 246.a combined clr/clr + anl a,#%2&%3 + movx @dptr,a +} if notVolatile %1 + +replace { + mov dptr,#%1 + movx a,@dptr + orl a,#%2 + movx @dptr,a + mov dptr,#%1 + movx a,@dptr + orl a,#%3 + movx @dptr,a +} by { + mov dptr,#%1 + movx a,@dptr + ; Peephole 246.b combined set/set + orl a,#%2|%3 + movx @dptr,a +} if notVolatile %1 + +replace { + mov dptr,#%1 + movx a,@dptr + orl a,#%2 + movx @dptr,a + mov dptr,#%1 + movx a,@dptr + anl a,#%3 + movx @dptr,a +} by { + mov dptr,#%1 + movx a,@dptr + orl a,#%2 + ; Peephole 246.c combined set/clr + anl a,#%3 + movx @dptr,a +} if notVolatile %1 + +replace { + mov dptr,#%1 + movx a,@dptr + anl a,#%2 + movx @dptr,a + mov dptr,#%1 + movx a,@dptr + orl a,#%3 + movx @dptr,a +} by { + mov dptr,#%1 + movx a,@dptr + anl a,#%2 + ; Peephole 246.d combined clr/set + orl a,#%3 + movx @dptr,a +} if notVolatile %1 + +replace { + mov dptr,#%1 + movx a,@dptr + orl a,#%2 + anl a,#%3 + movx @dptr,a + mov dptr,#%1 + movx a,@dptr + anl a,#%4 + movx @dptr,a +} by { + mov dptr,#%1 + movx a,@dptr + orl a,#%2 + ; Peephole 246.e combined set/clr/clr + anl a,#%3&%4 + movx @dptr,a +} if notVolatile %1 + +replace { + mov dptr,#%1 + movx a,@dptr + orl a,#%2 + anl a,#%3 + movx @dptr,a + mov dptr,#%1 + movx a,@dptr + orl a,#%4 + movx @dptr,a +} by { + mov dptr,#%1 + movx a,@dptr + orl a,#%2 + anl a,#%3 + ; Peephole 246.f combined set/clr/set + orl a,#%4 + movx @dptr,a +} if notVolatile %1 + +replace { + mov dptr,#%1 + movx a,@dptr + anl a,#%2 + orl a,#%3 + movx @dptr,a + mov dptr,#%1 + movx a,@dptr + anl a,#%4 + movx @dptr,a +} by { + mov dptr,#%1 + movx a,@dptr + anl a,#%2 + orl a,#%3 + ; Peephole 246.g combined clr/set/clr + anl a,#%4 + movx @dptr,a +} if notVolatile %1 + +replace { + mov dptr,#%1 + movx a,@dptr + anl a,#%2 + orl a,#%3 + movx @dptr,a + mov dptr,#%1 + movx a,@dptr + orl a,#%4 + movx @dptr,a +} by { + mov dptr,#%1 + movx a,@dptr + anl a,#%2 + ; Peephole 246.h combined clr/set/set + orl a,#%3|%4 + movx @dptr,a +} if notVolatile %1 + + +// rules 247.x apply to f.e. bitfields.c +replace { + mov r%5,#%1 + mov a,@r%5 + anl a,#%2 + mov @r%5,a + mov r%5,#%1 + mov a,@r%5 + anl a,#%3 + mov @r%5,a +} by { + mov r%5,#%1 + mov a,@r%5 + ; Peephole 247.a combined clr/clr + anl a,#%2&%3 + mov @r%5,a +} if notVolatile %1 + +replace { + mov r%5,#%1 + mov a,@r%5 + orl a,#%2 + mov @r%5,a + mov r%5,#%1 + mov a,@r%5 + orl a,#%3 + mov @r%5,a +} by { + mov r%5,#%1 + mov a,@r%5 + ; Peephole 247.b combined set/set + orl a,#%2|%3 + mov @r%5,a +} if notVolatile %1 + +replace { + mov r%5,#%1 + mov a,@r%5 + orl a,#%2 + mov @r%5,a + mov r%5,#%1 + mov a,@r%5 + anl a,#%3 + mov @r%5,a +} by { + mov r%5,#%1 + mov a,@r%5 + orl a,#%2 + ; Peephole 247.c combined set/clr + anl a,#%3 + mov @r%5,a +} if notVolatile %1 + +replace { + mov r%5,#%1 + mov a,@r%5 + anl a,#%2 + mov @r%5,a + mov r%5,#%1 + mov a,@r%5 + orl a,#%3 + mov @r%5,a +} by { + mov r%5,#%1 + mov a,@r%5 + anl a,#%2 + ; Peephole 247.d combined clr/set + orl a,#%3 + mov @r%5,a +} if notVolatile %1 + +replace { + mov r%5,#%1 + mov a,@r%5 + orl a,#%2 + anl a,#%3 + mov @r%5,a + mov r%5,#%1 + mov a,@r%5 + anl a,#%4 + mov @r%5,a +} by { + mov r%5,#%1 + mov a,@r%5 + orl a,#%2 + ; Peephole 247.e combined set/clr/clr + anl a,#%3&%4 + mov @r%5,a +} if notVolatile %1 + +replace { + mov r%5,#%1 + mov a,@r%5 + orl a,#%2 + anl a,#%3 + mov @r%5,a + mov r%5,#%1 + mov a,@r%5 + orl a,#%4 + mov @r%5,a +} by { + mov r%5,#%1 + mov a,@r%5 + orl a,#%2 + anl a,#%3 + ; Peephole 247.f combined set/clr/set + orl a,#%4 + mov @r%5,a +} if notVolatile %1 + +replace { + mov r%5,#%1 + mov a,@r%5 + anl a,#%2 + orl a,#%3 + mov @r%5,a + mov r%5,#%1 + mov a,@r%5 + anl a,#%4 + mov @r%5,a +} by { + mov r%5,#%1 + mov a,@r%5 + anl a,#%2 + orl a,#%3 + ; Peephole 247.g combined clr/set/clr + anl a,#%4 + mov @r%5,a +} if notVolatile %1 + +replace { + mov r%5,#%1 + mov a,@r%5 + anl a,#%2 + orl a,#%3 + mov @r%5,a + mov r%5,#%1 + mov a,@r%4 + orl a,#%4 + mov @r%5,a +} by { + mov r%5,#%1 + mov a,@r%5 + anl a,#%2 + ; Peephole 247.h combined clr/set/set + orl a,#%3|%4 + mov @r%5,a +} if notVolatile %1 + + +// Peepholes 248.x have to be compatible with the keyword volatile. +// They optimize typical accesses to memory mapped I/O devices: +// volatile xdata char t; t|=0x01; +replace { + mov dptr,%1 + movx a,@dptr + mov r%2,a + mov dptr,%1 + mov a,%3 + orl a,r%2 + movx @dptr,a +} by { + mov dptr,%1 + movx a,@dptr + mov r%2,a + ; Peephole 248.a optimized or to xdata + orl a,%3 + movx @dptr,a +} + +// volatile xdata char t; t&=0x01; +replace { + mov dptr,%1 + movx a,@dptr + mov r%2,a + mov dptr,%1 + mov a,%3 + anl a,r%2 + movx @dptr,a +} by { + mov dptr,%1 + movx a,@dptr + mov r%2,a + ; Peephole 248.b optimized and to xdata + anl a,%3 + movx @dptr,a +} + +// volatile xdata char t; t^=0x01; +replace { + mov dptr,%1 + movx a,@dptr + mov r%2,a + mov dptr,%1 + mov a,%3 + xrl a,r%2 + movx @dptr,a +} by { + mov dptr,%1 + movx a,@dptr + mov r%2,a + ; Peephole 248.c optimized xor to xdata + xrl a,%3 + movx @dptr,a +} + +// volatile xdata char t; t|=0x01; t&=~0x01; t|=0x01; +replace { + mov dptr,%1 + movx a,@dptr + mov r%2,a + orl a,%3 + movx @dptr,a + + mov dptr,%1 + movx a,@dptr + mov r%2,a + anl a,%4 + movx @dptr,a + + mov dptr,%1 + movx a,@dptr + mov r%2,a + orl a,%5 + movx @dptr,a +} by { + mov dptr,%1 + movx a,@dptr + ; Peephole 248.d optimized or/and/or to volatile xdata + orl a,%3 + movx @dptr,a + movx a,@dptr + anl a,%4 + movx @dptr,a + movx a,@dptr + mov r%2,a + orl a,%5 + movx @dptr,a +} + +// volatile xdata char t; t&=~0x01; t|=0x01; t&=~0x01; +replace { + mov dptr,%1 + movx a,@dptr + mov r%2,a + anl a,%3 + movx @dptr,a + + mov dptr,%1 + movx a,@dptr + mov r%2,a + orl a,%4 + movx @dptr,a + + mov dptr,%1 + movx a,@dptr + mov r%2,a + anl a,%5 + movx @dptr,a +} by { + mov dptr,%1 + movx a,@dptr + ; Peephole 248.e optimized and/or/and to volatile xdata + anl a,%3 + movx @dptr,a + movx a,@dptr + orl a,%4 + movx @dptr,a + movx a,@dptr + mov r%2,a + anl a,%5 + movx @dptr,a +} + +// volatile xdata char t; t|=0x01; t&=~0x01; +replace { + mov dptr,%1 + movx a,@dptr + mov r%2,a + orl a,%3 + movx @dptr,a + + mov dptr,%1 + movx a,@dptr + mov r%2,a + anl a,%4 + movx @dptr,a +} by { + mov dptr,%1 + movx a,@dptr + ; Peephole 248.f optimized or/and to volatile xdata + orl a,%3 + movx @dptr,a + movx a,@dptr + mov r%2,a + anl a,%4 + movx @dptr,a +} + +// volatile xdata char t; t&=~0x01; t|=0x01; +replace { + mov dptr,%1 + movx a,@dptr + mov r%2,a + anl a,%3 + movx @dptr,a + + mov dptr,%1 + movx a,@dptr + mov r%2,a + orl a,%4 + movx @dptr,a +} by { + mov dptr,%1 + movx a,@dptr + ; Peephole 248.g optimized and/or to volatile xdata + anl a,%3 + movx @dptr,a + movx a,@dptr + mov r%2,a + orl a,%4 + movx @dptr,a +} + +// volatile xdata char t; t^=0x01; t^=0x01; +replace { + mov dptr,%1 + movx a,@dptr + mov r%2,a + xrl a,%3 + movx @dptr,a + + mov dptr,%1 + movx a,@dptr + mov r%2,a + xrl a,%4 + movx @dptr,a +} by { + mov dptr,%1 + movx a,@dptr + ; Peephole 248.h optimized xor/xor to volatile xdata + xrl a,%3 + movx @dptr,a + movx a,@dptr + mov r%2,a + xrl a,%4 + movx @dptr,a +} + +// Peeepholes 248.i to 248.m are like 248.d to 248.h except they apply to bitfields: +// xdata struct { unsigned b0:1; unsigned b1:1; unsigned b2:1; } xport; +// xport.b0=1; xport.b0=0; xport.b0=1; +replace { + mov dptr,%1 + movx a,@dptr + orl a,%3 + movx @dptr,a + + mov dptr,%1 + movx a,@dptr + anl a,%4 + movx @dptr,a + + mov dptr,%1 + movx a,@dptr + orl a,%5 + movx @dptr,a +} by { + mov dptr,%1 + movx a,@dptr + orl a,%3 + movx @dptr,a + ; Peephole 248.i optimized or/and/or to xdata bitfield + movx a,@dptr + anl a,%4 + movx @dptr,a + movx a,@dptr + orl a,%5 + movx @dptr,a +} + +replace { + mov dptr,%1 + movx a,@dptr + anl a,%3 + movx @dptr,a + + mov dptr,%1 + movx a,@dptr + orl a,%4 + movx @dptr,a + + mov dptr,%1 + movx a,@dptr + anl a,%5 + movx @dptr,a +} by { + mov dptr,%1 + movx a,@dptr + anl a,%3 + movx @dptr,a + ; Peephole 248.j optimized and/or/and to xdata bitfield + movx a,@dptr + orl a,%4 + movx @dptr,a + movx a,@dptr + anl a,%5 + movx @dptr,a +} + +replace { + mov dptr,%1 + movx a,@dptr + orl a,%3 + movx @dptr,a + + mov dptr,%1 + movx a,@dptr + anl a,%4 + movx @dptr,a +} by { + mov dptr,%1 + movx a,@dptr + orl a,%3 + movx @dptr,a + ; Peephole 248.k optimized or/and to xdata bitfield + movx a,@dptr + anl a,%4 + movx @dptr,a +} + +replace { + mov dptr,%1 + movx a,@dptr + anl a,%3 + movx @dptr,a + + mov dptr,%1 + movx a,@dptr + orl a,%4 + movx @dptr,a +} by { + mov dptr,%1 + movx a,@dptr + anl a,%3 + movx @dptr,a + ; Peephole 248.l optimized and/or to xdata bitfield + movx a,@dptr + orl a,%4 + movx @dptr,a +} + +replace { + mov dptr,%1 + movx a,@dptr + xrl a,%3 + movx @dptr,a + + mov dptr,%1 + movx a,@dptr + xrl a,%4 + movx @dptr,a +} by { + mov dptr,%1 + movx a,@dptr + xrl a,%3 + movx @dptr,a + ; Peephole 248.m optimized xor/xor to xdata bitfield + movx a,@dptr + xrl a,%4 + movx @dptr,a +} + + +replace { + jnz %1 +%1: +} by { + ; Peephole 249.a jump optimization +} if labelRefCount(%1 1), labelRefCountChange(%1 -1) + +replace { + jz %1 +%1: +} by { + ; Peephole 249.b jump optimization +} if labelRefCount(%1 1), labelRefCountChange(%1 -1) + + +// This allows non-interrupt and interrupt code to safely compete +// for a resource without the non-interrupt code having to disable +// interrupts: +// volatile bit resource_is_free; +// if( resource_is_free ) { +// resource_is_free=0; do_something; resource_is_free=1; +// } +replace { + jnb %1,%2 +%3: + clr %1 +} by { + ; Peephole 250.a using atomic test and clear + jbc %1,%3 + sjmp %2 +%3: +} if labelRefCount(%3 0), labelRefCountChange(%3 1) + +replace { + jb %1,%2 + ljmp %3 +%2: + clr %1 +} by { + ; Peephole 250.b using atomic test and clear + jbc %1,%2 + ljmp %3 +%2: +} if labelRefCount %2 1 + + +// not before peephole 250.b +replace { + ljmp %5 +} by { + ; Peephole 251.a replaced ljmp to ret with ret + ret +} if labelIsReturnOnly(), labelRefCountChange(%5 -1) + +// not before peephole 250.b +replace { + sjmp %5 +} by { + ; Peephole 251.b replaced sjmp to ret with ret + ret +} if labelIsReturnOnly(), labelRefCountChange(%5 -1) + +// applies to shifts.c and when accessing arrays with an unsigned integer index +// saving 1 byte, 2 cycles +replace { + mov r%1,%2 + mov a,(%2 + 1) + xch a,r%1 + add a,acc + xch a,r%1 + rlc a + mov r%3,a +} by { + ; Peephole 252 optimized left shift + mov a,%2 + add a,acc + mov r%1,a + mov a,(%2 + 1) + rlc a + mov r%3,a +} + +// unsigned char i=8; do{ } while(--i != 0); +// this applies if i is kept in a register +replace { + dec %1 + cjne %1,#0x00,%2 +} by { + ; Peephole 253.a optimized decrement with compare + djnz %1,%2 +} if notVolatile(%1) + +// unsigned char i=8; do{ } while(--i != 0); +// this applies if i is kept in data memory +// must come before 256, see bug 1721024 +replace { + dec %1 + mov a,%1 + jnz %2 +} by { + ; Peephole 253.b optimized decrement with compare + djnz %1,%2 +} if notVolatile(%1), operandsNotRelated(%1 '@r0' '@r1') + + +// applies to f.e. funptrs.c +// saves one byte if %1 is a register or @register +replace { + mov a,%1 + add a,acc +} by { + mov a,%1 + ; Peephole 254 optimized left shift + add a,%1 +} if notVolatile %1 + +// applies to f.e. switch.c +replace { + clr c + mov a,#%1 + subb a,%2 + jc %3 +%4: + mov a,%2 + add a,%2 + add a,%2 + mov dptr,%5 + jmp @a+dptr +} by { + ; Peephole 255 optimized jump table index calculation + mov a,%2 + cjne a,#(%1+0x01),.+1 + jnc %3 +%4: + add a,%2 + add a,%2 + mov dptr,%5 + jmp @a+dptr +} + +// applies to f.e. jump tables and scott-bool1.c. +// similar peepholes can be constructed for other instructions +// after which a flag or a register is known (like: djnz, cjne, jnc) +replace { + jc %1 +%2: + clr c +} by { + jc %1 +%2: + ; Peephole 256.a removed redundant clr c +} if labelRefCount %2 0 + +// applies to f.e. logf.c +replace { + jnz %1 +%2: + clr a +} by { + jnz %1 +%2: + ; Peephole 256.b removed redundant clr a +} if labelRefCount %2 0 + +// applies to f.e. bug-905492.c +replace { + jnz %1 +%2: + mov %3,#0x00 +} by { + jnz %1 +%2: + ; Peephole 256.c loading %3 with zero from a + mov %3,a +} if labelRefCount %2 0 + +// applies to f.e. malloc.c +replace { + jnz %1 +%2: + mov %4,%5 + mov %3,#0x00 +} by { + jnz %1 +%2: + mov %4,%5 + ; Peephole 256.d loading %3 with zero from a + mov %3,a +} if labelRefCount(%2 0),operandsNotRelated('a' %4) + +replace { + jnz %1 +%2: + mov %4,%5 + mov %6,%7 + mov %3,#0x00 +} by { + jnz %1 +%2: + mov %4,%5 + mov %6,%7 + ; Peephole 256.e loading %3 with zero from a + mov %3,a +} if labelRefCount(%2 0),operandsNotRelated('a' %4 %6) + +replace { + jnz %1 +%2: + mov %4,%5 + mov %6,%7 + mov %8,%9 + mov %3,#0x00 +} by { + jnz %1 +%2: + mov %4,%5 + mov %6,%7 + mov %8,%9 + ; Peephole 256.f loading %2 with zero from a + mov %3,a +} if labelRefCount(%2 0),operandsNotRelated('a' %4 %6 %8) + + +// in_byte<<=1; if(in_bit) in_byte|=1; +// helps f.e. reading data on a 3-wire (SPI) bus +replace { + mov a,%1 + add a,%1 + mov %1,a + jnb %2,%3 +%4: + orl %1,#0x01 +%3: +} by { + mov a,%1 + ; Peephole 258.a optimized bitbanging + mov c,%2 + addc a,%1 + mov %1,a +%4: +%3: +} if notVolatile(%1), labelRefCountChange(%3 -1) + +// in_byte<<=1; if(in_bit) in_byte|=1; +replace { + mov a,r%1 + add a,r%1 + mov r%1,a + jnb %2,%3 +%4: + orl ar%1,#0x01 +%3: +} by { + mov a,r%1 + ; Peephole 258.b optimized bitbanging + mov c,%2 + addc a,r%1 + mov r%1,a +%4: +%3: +} if labelRefCountChange(%3 -1) + +// in_byte>>=1; if(in_bit) in_byte|=0x80; +replace { + mov a,%1 + clr c + rrc a + mov %1,a + jnb %2,%3 +%4: + orl %1,#0x80 +%3: +} by { + mov a,%1 + ; Peephole 258.c optimized bitbanging + mov c,%2 + rrc a + mov %1,a +%4: +%3: +} if notVolatile(%1), labelRefCountChange(%3 -1) + +// in_byte>>=1; if(in_bit) in_byte|=0x80; +replace { + mov a,r%1 + clr c + rrc a + mov r%1,a + jnb %2,%3 +%4: + orl ar%1,#0x80 +%3: +} by { + mov a,r%1 + ; Peephole 258.d optimized bitbanging + mov c,%2 + rrc a + mov r%1,a +%4: +%3: +} if labelRefCountChange(%3 -1) + +// out_bit=out_byte&0x80; out_byte<<=1; +// helps f.e. writing data on a 3-wire (SPI) bus +replace { + mov a,%1 + rlc a + mov %2,c + mov a,%1 + add a,%1 + mov %1,a +} by { + mov a,%1 + ; Peephole 258.e optimized bitbanging + add a,%1 + mov %2,c + mov %1,a +} if notVolatile %1 + +// out_bit=out_byte&0x01; out_byte>>=1; +replace { + mov a,%1 + rrc a + mov %2,c + mov a,%1 + clr c + rrc a + mov %1,a +} by { + mov a,%1 + ; Peephole 258.f optimized bitbanging + clr c + rrc a + mov %2,c + mov %1,a +} if notVolatile %1 + +// Peepholes 259.x rely on the correct labelRefCount. Otherwise they are +// not compatible with peepholes 250.x +// Peepholes 250.x add jumps to a previously unused label. If the +// labelRefCount is not increased, peepholes 259.x are (mistakenly) applied. +// (Mail on sdcc-devel 2004-10-25) +// +// applies to f.e. vprintf.c +replace { + sjmp %1 +%2: + ret +} by { + sjmp %1 + ; Peephole 259.a removed redundant label %2 and ret + ; +} if labelRefCount %2 0 + +// applies to f.e. gets.c +replace { + ljmp %1 +%2: + ret +} by { + ljmp %1 + ; Peephole 259.b removed redundant label %2 and ret + ; +} if labelRefCount %2 0 + +// optimizing jumptables +// Please note: to enable peephole 260.x you currently have to set +// the environment variable SDCC_SJMP_JUMPTABLE +replace { + add a,%1 + mov dptr,#%2 + jmp @a+dptr +%2: + ljmp %5 + ljmp %6 + ljmp %7 + ljmp %8 +%3: +} by { + ; Peephole 260.a used sjmp in jumptable + mov dptr,#%2 + jmp @a+dptr +%2: + sjmp %5 + sjmp %6 + sjmp %7 + sjmp %8 +%3: +} if labelJTInRange + +// optimizing jumptables +replace { + add a,%1 + mov dptr,#%2 + jmp @a+dptr +%2: + ljmp %5 + ljmp %6 + ljmp %7 + ljmp %8 + ljmp %9 +%3: +} by { + ; Peephole 260.b used sjmp in jumptable + mov dptr,#%2 + jmp @a+dptr +%2: + sjmp %5 + sjmp %6 + sjmp %7 + sjmp %8 + sjmp %9 +%3: +} if labelJTInRange + +// optimizing jumptables +replace { + add a,%1 + mov dptr,#%2 + jmp @a+dptr +%2: + ljmp %5 + ljmp %6 + ljmp %7 + ljmp %8 + ljmp %9 + ljmp %10 +%3: +} by { + ; Peephole 260.c used sjmp in jumptable + mov dptr,#%2 + jmp @a+dptr +%2: + sjmp %5 + sjmp %6 + sjmp %7 + sjmp %8 + sjmp %9 + sjmp %10 +%3: +} if labelJTInRange + +// optimizing jumptables +replace { + add a,%1 + mov dptr,#%2 + jmp @a+dptr +%2: + ljmp %5 + ljmp %6 + ljmp %7 + ljmp %8 + ljmp %9 + ljmp %10 + ljmp %11 +%3: +} by { + ; Peephole 260.d used sjmp in jumptable + mov dptr,#%2 + jmp @a+dptr +%2: + sjmp %5 + sjmp %6 + sjmp %7 + sjmp %8 + sjmp %9 + sjmp %10 + sjmp %11 +%3: +} if labelJTInRange + +// optimizing jumptables +replace { + add a,%1 + mov dptr,#%2 + jmp @a+dptr +%2: + ljmp %5 + ljmp %6 + ljmp %7 + ljmp %8 + ljmp %9 + ljmp %10 + ljmp %11 + ljmp %12 +%3: +} by { + ; Peephole 260.e used sjmp in jumptable + mov dptr,#%2 + jmp @a+dptr +%2: + sjmp %5 + sjmp %6 + sjmp %7 + sjmp %8 + sjmp %9 + sjmp %10 + sjmp %11 + sjmp %12 +%3: +} if labelJTInRange + +// optimizing jumptables +replace { + add a,%1 + mov dptr,#%2 + jmp @a+dptr +%2: + ljmp %5 + ljmp %6 + ljmp %7 + ljmp %8 + ljmp %9 + ljmp %10 + ljmp %11 + ljmp %12 + + ljmp %13 +%3: +} by { + ; Peephole 260.f used sjmp in jumptable + mov dptr,#%2 + jmp @a+dptr +%2: + sjmp %5 + sjmp %6 + sjmp %7 + sjmp %8 + sjmp %9 + sjmp %10 + sjmp %11 + sjmp %12 + + sjmp %13 +%3: +} if labelJTInRange + +// optimizing jumptables +replace { + add a,%1 + mov dptr,#%2 + jmp @a+dptr +%2: + ljmp %5 + ljmp %6 + ljmp %7 + ljmp %8 + ljmp %9 + ljmp %10 + ljmp %11 + ljmp %12 + + ljmp %13 + ljmp %14 +%3: +} by { + ; Peephole 260.g used sjmp in jumptable + mov dptr,#%2 + jmp @a+dptr +%2: + sjmp %5 + sjmp %6 + sjmp %7 + sjmp %8 + sjmp %9 + sjmp %10 + sjmp %11 + sjmp %12 + + sjmp %13 + sjmp %14 +%3: +} if labelJTInRange + +// optimizing jumptables +replace { + add a,%1 + mov dptr,#%2 + jmp @a+dptr +%2: + ljmp %5 + ljmp %6 + ljmp %7 + ljmp %8 + ljmp %9 + ljmp %10 + ljmp %11 + ljmp %12 + + ljmp %13 + ljmp %14 + ljmp %15 +%3: +} by { + ; Peephole 260.h used sjmp in jumptable + mov dptr,#%2 + jmp @a+dptr +%2: + sjmp %5 + sjmp %6 + sjmp %7 + sjmp %8 + sjmp %9 + sjmp %10 + sjmp %11 + sjmp %12 + + sjmp %13 + sjmp %14 + sjmp %15 +%3: +} if labelJTInRange + +// optimizing jumptables +replace { + add a,%1 + mov dptr,#%2 + jmp @a+dptr +%2: + ljmp %5 + ljmp %6 + ljmp %7 + ljmp %8 + ljmp %9 + ljmp %10 + ljmp %11 + ljmp %12 + + ljmp %13 + ljmp %14 + ljmp %15 + ljmp %16 +%3: +} by { + ; Peephole 260.i used sjmp in jumptable + mov dptr,#%2 + jmp @a+dptr +%2: + sjmp %5 + sjmp %6 + sjmp %7 + sjmp %8 + sjmp %9 + sjmp %10 + sjmp %11 + sjmp %12 + + sjmp %13 + sjmp %14 + sjmp %15 + sjmp %16 +%3: +} if labelJTInRange + +// optimizing jumptables +replace { + add a,%1 + mov dptr,#%2 + jmp @a+dptr +%2: + ljmp %5 + ljmp %6 + ljmp %7 + ljmp %8 + ljmp %9 + ljmp %10 + ljmp %11 + ljmp %12 + + ljmp %13 + ljmp %14 + ljmp %15 + ljmp %16 + ljmp %17 +%3: +} by { + ; Peephole 260.j used sjmp in jumptable + mov dptr,#%2 + jmp @a+dptr +%2: + sjmp %5 + sjmp %6 + sjmp %7 + sjmp %8 + sjmp %9 + sjmp %10 + sjmp %11 + sjmp %12 + + sjmp %13 + sjmp %14 + sjmp %15 + sjmp %16 + sjmp %17 +%3: +} if labelJTInRange + +// optimizing jumptables +replace { + add a,%1 + mov dptr,#%2 + jmp @a+dptr +%2: + ljmp %5 + ljmp %6 + ljmp %7 + ljmp %8 + ljmp %9 + ljmp %10 + ljmp %11 + ljmp %12 + + ljmp %13 + ljmp %14 + ljmp %15 + ljmp %16 + ljmp %17 + ljmp %18 +%3: +} by { + ; Peephole 260.k used sjmp in jumptable + mov dptr,#%2 + jmp @a+dptr +%2: + sjmp %5 + sjmp %6 + sjmp %7 + sjmp %8 + sjmp %9 + sjmp %10 + sjmp %11 + sjmp %12 + + sjmp %13 + sjmp %14 + sjmp %15 + sjmp %16 + sjmp %17 + sjmp %18 +%3: +} if labelJTInRange + +// optimizing jumptables +replace { + add a,%1 + mov dptr,#%2 + jmp @a+dptr +%2: + ljmp %5 + ljmp %6 + ljmp %7 + ljmp %8 + ljmp %9 + ljmp %10 + ljmp %11 + ljmp %12 + + ljmp %13 + ljmp %14 + ljmp %15 + ljmp %16 + ljmp %17 + ljmp %18 + ljmp %19 +%3: +} by { + ; Peephole 260.l used sjmp in jumptable + mov dptr,#%2 + jmp @a+dptr +%2: + sjmp %5 + sjmp %6 + sjmp %7 + sjmp %8 + sjmp %9 + sjmp %10 + sjmp %11 + sjmp %12 + + sjmp %13 + sjmp %14 + sjmp %15 + sjmp %16 + sjmp %17 + sjmp %18 + sjmp %19 +%3: +} if labelJTInRange + +// optimizing jumptables +replace { + add a,%1 + mov dptr,#%2 + jmp @a+dptr +%2: + ljmp %5 + ljmp %6 + ljmp %7 + ljmp %8 + ljmp %9 + ljmp %10 + ljmp %11 + ljmp %12 + + ljmp %13 + ljmp %14 + ljmp %15 + ljmp %16 + ljmp %17 + ljmp %18 + ljmp %19 + ljmp %20 +%3: +} by { + ; Peephole 260.m used sjmp in jumptable + mov dptr,#%2 + jmp @a+dptr +%2: + sjmp %5 + sjmp %6 + sjmp %7 + sjmp %8 + sjmp %9 + sjmp %10 + sjmp %11 + sjmp %12 + + sjmp %13 + sjmp %14 + sjmp %15 + sjmp %16 + sjmp %17 + sjmp %18 + sjmp %19 + sjmp %20 +%3: +} if labelJTInRange + +// applies to: a = (a << 1) | (a >> 15); +replace { + mov a,%1 + rlc a + mov %1,a + mov a,%2 + rlc a + mov %2,a + mov a,%1 + mov acc.0,c + mov %1,a +} by { + mov a,%1 + rlc a + ; Peephole 261.a optimized left rol + xch a,%2 + rlc a + xch a,%2 + mov acc.0,c + mov %1,a +} + +// applies to: a = (a << 15) | (a >> 1); +replace { + mov a,%1 + rrc a + mov %1,a + mov a,%2 + rrc a + mov %2,a + mov a,%1 + mov acc.7,c + mov %1,a +} by { + mov a,%1 + rrc a + ; Peephole 261.b optimized right rol + xch a,%2 + rrc a + xch a,%2 + mov acc.7,c + mov %1,a +} + +replace { + cpl c + cpl c +} by { + ; Peephole 262 removed redundant cpl c +} + +replace { + mov %1,#%2 + inc %1 + inc %1 + inc %1 +} by { + ; Peephole 263.a optimized loading const + mov %1,#(%2 + 3) +} if notVolatile(%1) + +replace { + mov %1,#%2 + inc %1 + inc %1 +} by { + ; Peephole 263.b optimized loading const + mov %1,#(%2 + 2) +} if notVolatile(%1) + +replace { + mov %1,#%2 + inc %1 +} by { + ; Peephole 263.c optimized loading const + mov %1,#(%2 + 1) +} if notVolatile(%1) + + +replace { + clr a + cjne %1,%2,%3 + inc a +%3: + jz %4 +} by { + ; Peephole 264 jump optimization (acc not set) + cjne %1,%2,%4 +%3: +} if labelRefCount(%3 1), labelRefCountChange(%3 -1) + + +replace { + mov %1,c + cpl %1 +} by { + ; Peephole 265 optimized mov/cpl sequence (carry differs) + cpl c + mov %1,c +} if notVolatile(%1) + +replace { + mov %1,c + jb %1,%2 +} by { + ; Peephole 266.a optimized mov/jump sequence + mov %1,c + jc %2 +} if notVolatile(%1) + +replace { + mov %1,c + jnb %1,%2 +} by { + ; Peephole 266.b optimized mov/jump sequence + mov %1,c + jnc %2 +} if notVolatile(%1) + +replace { + jnc %1 + setb %2 + sjmp %3 +%1: + clr %2 +%3: +} by { + ; Peephole 267.a optimized mov bit sequence + mov %2,c +%1: +%3: +} if labelRefCount(%1 1), labelRefCountChange(%1 -1), labelRefCountChange(%3 -1) + +replace { + jc %1 + clr %2 + sjmp %3 +%1: + setb %2 +%3: +} by { + ; Peephole 267.b optimized mov bit sequence + mov %2,c +%1: +%3: +} if labelRefCount(%1 1), labelRefCountChange(%1 -1), labelRefCountChange(%3 -1) + +replace { + mov %1,c + mov %1,c +} by { + ; Peephole 268 removed redundant mov + mov %1,c +} if notVolatile(%1) + +replace { + mov %1,c + mov c,%1 +} by { + ; Peephole 269 removed redundant mov + mov %1,c +} if notVolatile(%1) + +//accessing struct/array on stack +replace { + add a,#%1 + add a,#%2 +} by { + ; Peephole 270 removed redundant add + add a,#%1+%2 +} + +replace { + jz %1 + mov %2,%4 + sjmp %3 +%1: + mov %2,#0x00 +%3: +} by { + jz %1 + ; Peephole 271 optimized ternary operation (acc different) + mov a,%4 +%1: + mov %2,a +%3: +} if operandsNotRelated('a' 'dptr' %2), labelRefCount(%1 1), labelRefCountChange(%3 -1) + + +replace restart { + pop ar%1 +} by { + ; Peephole 300 pop ar%1 removed +} if deadMove(%1) + +replace { + mov r%1,%2 +} by { + ; Peephole 301 mov r%1,%2 removed +} if notVolatile(%2), deadMove(%1) + + +// applies to: void test( char c ) { if( c ) func1(); else func2(); } +replace { + lcall %1 + ret +} by { + ; Peephole 400.a replaced lcall/ret with ljmp + ljmp %1 +} + +// applies to: void test( char c ) { if( c ) func1(); else func2(); } +replace { + lcall %1 +%2: + ret +} by { + ; Peephole 400.b replaced lcall/ret with ljmp + ljmp %1 + ; +} if labelRefCount %2 0 + +// applies to f.e. scott-bool1.c +replace { + lcall %1 +%2: + ret +} by { + ; Peephole 400.c replaced lcall with ljmp + ljmp %1 +%2: + ret +} + +// for programs less than 2k +replace { + lcall %1 +} by { + ; Peephole 400.d replaced lcall with acall + acall %1 +} if useAcallAjmp + +// for programs less than 2k +replace { + ljmp %1 +} by { + ; Peephole 400.e replaced ljmp with ajmp + ajmp %1 +} if useAcallAjmp + + +// should be one of the last peepholes +replace{ +%1: +} by { + ; Peephole 500 removed redundant label %1 +} if labelRefCount(%1 0) diff --git a/src/mcs51/ralloc.c b/src/mcs51/ralloc.c new file mode 100644 index 0000000..589da66 --- /dev/null +++ b/src/mcs51/ralloc.c @@ -0,0 +1,3381 @@ +/*------------------------------------------------------------------------ + + SDCCralloc.c - source file for register allocation. (8051) specific + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" +#include "ralloc.h" +#include "gen.h" + +/*-----------------------------------------------------------------*/ +/* At this point we start getting processor specific although */ +/* some routines are non-processor specific & can be reused when */ +/* targetting other processors. The decision for this will have */ +/* to be made on a routine by routine basis */ +/* routines used to pack registers are most definitely not reusable */ +/* since the pack the registers depending strictly on the MCU */ +/*-----------------------------------------------------------------*/ + +extern void gen51Code (iCode *); +#define D(x) + +/* Global data */ +static struct + { + bitVect *spiltSet; + set *stackSpil; + bitVect *regAssigned; + bitVect *totRegAssigned; /* final set of LRs that got into registers */ + short blockSpil; + int slocNum; + bitVect *funcrUsed; /* registers used in a function */ + int stackExtend; + int dataExtend; + bitVect *allBitregs; /* all bit registers */ + } +_G; + +/* Shared with gen.c */ +int mcs51_ptrRegReq; /* one byte pointer register required */ + +/* 8051 registers */ +regs regs8051[] = +{ + {REG_GPR, R2_IDX, REG_GPR, "r2", "ar2", "0", 2, 1}, + {REG_GPR, R3_IDX, REG_GPR, "r3", "ar3", "0", 3, 1}, + {REG_GPR, R4_IDX, REG_GPR, "r4", "ar4", "0", 4, 1}, + {REG_GPR, R5_IDX, REG_GPR, "r5", "ar5", "0", 5, 1}, + {REG_GPR, R6_IDX, REG_GPR, "r6", "ar6", "0", 6, 1}, + {REG_GPR, R7_IDX, REG_GPR, "r7", "ar7", "0", 7, 1}, + {REG_PTR, R0_IDX, REG_PTR, "r0", "ar0", "0", 0, 1}, + {REG_PTR, R1_IDX, REG_PTR, "r1", "ar1", "0", 1, 1}, + {REG_BIT, B0_IDX, REG_BIT, "b0", "b0", "bits", 0, 1}, + {REG_BIT, B1_IDX, REG_BIT, "b1", "b1", "bits", 1, 1}, + {REG_BIT, B2_IDX, REG_BIT, "b2", "b2", "bits", 2, 1}, + {REG_BIT, B3_IDX, REG_BIT, "b3", "b3", "bits", 3, 1}, + {REG_BIT, B4_IDX, REG_BIT, "b4", "b4", "bits", 4, 1}, + {REG_BIT, B5_IDX, REG_BIT, "b5", "b5", "bits", 5, 1}, + {REG_BIT, B6_IDX, REG_BIT, "b6", "b6", "bits", 6, 1}, + {REG_BIT, B7_IDX, REG_BIT, "b7", "b7", "bits", 7, 1}, + {REG_GPR, X8_IDX, REG_GPR, "x8", "x8", "xreg", 0, 1}, + {REG_GPR, X9_IDX, REG_GPR, "x9", "x9", "xreg", 1, 1}, + {REG_GPR, X10_IDX, REG_GPR, "x10", "x10", "xreg", 2, 1}, + {REG_GPR, X11_IDX, REG_GPR, "x11", "x11", "xreg", 3, 1}, + {REG_GPR, X12_IDX, REG_GPR, "x12", "x12", "xreg", 4, 1}, + {REG_CND, CND_IDX, REG_CND, "C", "psw", "0xd0", 0, 1}, + {0, DPL_IDX, 0, "dpl", "dpl", "0x82", 0, 0}, + {0, DPH_IDX, 0, "dph", "dph", "0x83", 0, 0}, + {0, B_IDX, 0, "b", "b", "0xf0", 0, 0}, + {0, A_IDX, 0, "a", "acc", "0xe0", 0, 0}, +}; +int mcs51_nRegs = 16; +static void spillThis (symbol *); +static void freeAllRegs (); + +/*-----------------------------------------------------------------*/ +/* allocReg - allocates register of given type */ +/*-----------------------------------------------------------------*/ +static regs * +allocReg (short type) +{ + int i; + + for (i = 0; i < mcs51_nRegs; i++) + { + /* if type is given as 0 then any + free register will do */ + if (!type && regs8051[i].isFree) + { + regs8051[i].isFree = 0; + if (currFunc) + currFunc->regsUsed = bitVectSetBit (currFunc->regsUsed, i); + return ®s8051[i]; + } + /* other wise look for specific type + of register */ + if (regs8051[i].isFree && regs8051[i].type == type) + { + regs8051[i].isFree = 0; + if (currFunc) + currFunc->regsUsed = bitVectSetBit (currFunc->regsUsed, i); + return ®s8051[i]; + } + } + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* allocThisReg - allocates a particular register (if free) */ +/*-----------------------------------------------------------------*/ +static regs * +allocThisReg (regs * reg) +{ + if (!reg->isFree) + return NULL; + + reg->isFree = 0; + if (currFunc) + currFunc->regsUsed = bitVectSetBit (currFunc->regsUsed, reg->rIdx); + + return reg; +} + + +/*-----------------------------------------------------------------*/ +/* mcs51_regWithIdx - returns pointer to register with index number*/ +/*-----------------------------------------------------------------*/ +regs * +mcs51_regWithIdx (int idx) +{ + int i; + + for (i = 0; i < sizeof(regs8051)/sizeof(regs); i++) + if (regs8051[i].rIdx == idx) + return ®s8051[i]; + + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "regWithIdx not found"); + exit (1); +} + +/*-----------------------------------------------------------------*/ +/* freeReg - frees a register */ +/*-----------------------------------------------------------------*/ +static void +freeReg (regs * reg) +{ + if (!reg) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "freeReg - Freeing NULL register"); + exit (1); + } + + reg->isFree = 1; +} + + +/*-----------------------------------------------------------------*/ +/* nFreeRegs - returns number of free registers */ +/*-----------------------------------------------------------------*/ +static int +nFreeRegs (int type) +{ + int i; + int nfr = 0; + + for (i = 0; i < mcs51_nRegs; i++) + if (regs8051[i].isFree && regs8051[i].type == type) + nfr++; + return nfr; +} + +/*-----------------------------------------------------------------*/ +/* nfreeRegsType - free registers with type */ +/*-----------------------------------------------------------------*/ +static int +nfreeRegsType (int type) +{ + int nfr; + if (type == REG_PTR) + { + if ((nfr = nFreeRegs (type)) == 0) + return nFreeRegs (REG_GPR); + } + + return nFreeRegs (type); +} + +/*-----------------------------------------------------------------*/ +/* useReg - marks a register as used */ +/*-----------------------------------------------------------------*/ +static void +useReg (regs * reg) +{ + reg->isFree = 0; +} + +/*-----------------------------------------------------------------*/ +/* computeSpillable - given a point find the spillable live ranges */ +/*-----------------------------------------------------------------*/ +static bitVect * +computeSpillable (iCode * ic) +{ + bitVect *spillable; + + /* spillable live ranges are those that are live at this + point . the following categories need to be subtracted + from this set. + a) - those that are already spilt + b) - if being used by this one + c) - defined by this one */ + + spillable = bitVectCopy (ic->rlive); + spillable = + bitVectCplAnd (spillable, _G.spiltSet); /* those already spilt */ + spillable = + bitVectCplAnd (spillable, ic->uses); /* used in this one */ + bitVectUnSetBit (spillable, ic->defKey); + spillable = bitVectIntersect (spillable, _G.regAssigned); + return spillable; +} + +/*-----------------------------------------------------------------*/ +/* bitType - will return 1 if the symbol has type REG_BIT */ +/*-----------------------------------------------------------------*/ +static int +bitType (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return (sym->regType == REG_BIT ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* noSpilLoc - return true if a variable has no spil location */ +/*-----------------------------------------------------------------*/ +static int +noSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return (sym->usl.spillLoc ? 0 : 1); +} + +/*-----------------------------------------------------------------*/ +/* hasSpilLoc - will return 1 if the symbol has spil location */ +/*-----------------------------------------------------------------*/ +static int +hasSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return (sym->usl.spillLoc ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* directSpilLoc - will return 1 if the spillocation is in direct */ +/*-----------------------------------------------------------------*/ +static int +directSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + if (sym->usl.spillLoc && + (IN_DIRSPACE (SPEC_OCLS (sym->usl.spillLoc->etype)))) + return 1; + else + return 0; +} + +/*-----------------------------------------------------------------*/ +/* hasSpilLocnoUptr - will return 1 if the symbol has spil location */ +/* but is not used as a pointer */ +/*-----------------------------------------------------------------*/ +static int +hasSpilLocnoUptr (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return ((sym->usl.spillLoc && !sym->uptr) ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* rematable - will return 1 if the remat flag is set */ +/*-----------------------------------------------------------------*/ +static int +rematable (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return sym->remat; +} + +/*-----------------------------------------------------------------*/ +/* notUsedInRemaining - not used or defined in remain of the block */ +/*-----------------------------------------------------------------*/ +static int +notUsedInRemaining (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return ((usedInRemaining (operandFromSymbol (sym), ic) ? 0 : 1) && + allDefsOutOfRange (sym->defs, ebp->fSeq, ebp->lSeq)); +} + +/*-----------------------------------------------------------------*/ +/* allLRs - return true for all */ +/*-----------------------------------------------------------------*/ +static int +allLRs (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return 1; +} + +/*-----------------------------------------------------------------*/ +/* liveRangesWith - applies function to a given set of live range */ +/*-----------------------------------------------------------------*/ +static set * +liveRangesWith (bitVect * lrs, int (func) (symbol *, eBBlock *, iCode *), + eBBlock * ebp, iCode * ic) +{ + set *rset = NULL; + int i; + + if (!lrs || !lrs->size) + return NULL; + + for (i = 1; i < lrs->size; i++) + { + symbol *sym; + if (!bitVectBitValue (lrs, i)) + continue; + + /* if we don't find it in the live range + hash table we are in serious trouble */ + if (!(sym = hTabItemWithKey (liveRanges, i))) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "liveRangesWith could not find liveRange"); + exit (1); + } + + if (func (sym, ebp, ic) && bitVectBitValue (_G.regAssigned, sym->key)) + addSetHead (&rset, sym); + } + + return rset; +} + + +/*-----------------------------------------------------------------*/ +/* leastUsedLR - given a set determines which is the least used */ +/*-----------------------------------------------------------------*/ +static symbol * +leastUsedLR (set * sset) +{ + symbol *sym = NULL, *lsym = NULL; + + sym = lsym = setFirstItem (sset); + + if (!lsym) + return NULL; + + for (; lsym; lsym = setNextItem (sset)) + { + /* if usage is the same then prefer + to spill the smaller of the two */ + if (lsym->used == sym->used) + if (getSize (lsym->type) < getSize (sym->type)) + sym = lsym; + + /* if less usage */ + if (lsym->used < sym->used) + sym = lsym; + } + + setToNull ((void *) &sset); + sym->blockSpil = 0; + return sym; +} + +/*-----------------------------------------------------------------*/ +/* noOverLap - will iterate through the list looking for over lap */ +/*-----------------------------------------------------------------*/ +static int +noOverLap (set * itmpStack, symbol * fsym) +{ + symbol *sym; + + for (sym = setFirstItem (itmpStack); sym; + sym = setNextItem (itmpStack)) + { + if (bitVectBitValue(sym->clashes,fsym->key)) return 0; + } + return 1; +} + +/*-----------------------------------------------------------------*/ +/* isFree - will return 1 if the a free spil location is found */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (isFree) +{ + symbol *sym = item; + V_ARG (symbol **, sloc); + V_ARG (symbol *, fsym); + + /* if already found */ + if (*sloc) + return 0; + + /* if it is free && and the itmp assigned to + this does not have any overlapping live ranges + with the one currently being assigned and + the size can be accomodated */ + if (sym->isFree && + noOverLap (sym->usl.itmpStack, fsym) && + getSize (sym->type) >= getSize (fsym->type)) + { + *sloc = sym; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* spillLRWithPtrReg :- will spil those live ranges which use PTR */ +/*-----------------------------------------------------------------*/ +static void +spillLRWithPtrReg (symbol * forSym) +{ + symbol *lrsym; + regs *r0, *r1; + int k; + + if (!_G.regAssigned || bitVectIsZero (_G.regAssigned)) + return; + + r0 = mcs51_regWithIdx (R0_IDX); + r1 = mcs51_regWithIdx (R1_IDX); + + /* for all live ranges */ + for (lrsym = hTabFirstItem (liveRanges, &k); lrsym; + lrsym = hTabNextItem (liveRanges, &k)) + { + int j; + + /* if no registers assigned to it or spilt */ + /* if it does not overlap this then + no need to spill it */ + + if (lrsym->isspilt || !lrsym->nRegs || + (lrsym->liveTo < forSym->liveFrom)) + continue; + + /* go thru the registers : if it is either + r0 or r1 then spill it */ + for (j = 0; j < lrsym->nRegs; j++) + if (lrsym->regs[j] == r0 || + lrsym->regs[j] == r1) + { + spillThis (lrsym); + break; + } + } +} + +/*-----------------------------------------------------------------*/ +/* createStackSpil - create a location on the stack to spil */ +/*-----------------------------------------------------------------*/ +static symbol * +createStackSpil (symbol * sym) +{ + symbol *sloc = NULL; + int useXstack, model; + + char slocBuffer[30]; + + /* first go try and find a free one that is already + existing on the stack */ + if (applyToSet (_G.stackSpil, isFree, &sloc, sym)) + { + /* found a free one : just update & return */ + sym->usl.spillLoc = sloc; + sym->stackSpil = 1; + sloc->isFree = 0; + addSetHead (&sloc->usl.itmpStack, sym); + return sym; + } + + /* could not then have to create one , this is the hard part + we need to allocate this on the stack : this is really a + hack!! but cannot think of anything better at this time */ + + if (SNPRINTF (slocBuffer, sizeof(slocBuffer), + "sloc%d", _G.slocNum++) >= sizeof (slocBuffer)) + { + fprintf (stderr, "***Internal error: slocBuffer overflowed: %s:%d\n", + __FILE__, __LINE__); + exit (1); + } + + sloc = newiTemp (slocBuffer); + + /* set the type to the spilling symbol */ + sloc->type = copyLinkChain (sym->type); + sloc->etype = getSpec (sloc->type); + if (!IS_BIT (sloc->etype)) + { + SPEC_SCLS (sloc->etype) = S_DATA; + } + else if (SPEC_SCLS (sloc->etype) == S_SBIT) + { + SPEC_SCLS (sloc->etype) = S_BIT; + } + SPEC_EXTR (sloc->etype) = 0; + SPEC_STAT (sloc->etype) = 0; + SPEC_VOLATILE(sloc->etype) = 0; + SPEC_ABSA(sloc->etype) = 0; + + /* we don't allow it to be allocated + onto the external stack since : so we + temporarily turn it off ; we also + turn off memory model to prevent + the spil from going to the external storage + */ + + useXstack = options.useXstack; + model = options.model; +/* noOverlay = options.noOverlay; */ +/* options.noOverlay = 1; */ + options.model = options.useXstack = 0; + + allocLocal (sloc); + + options.useXstack = useXstack; + options.model = model; +/* options.noOverlay = noOverlay; */ + sloc->isref = 1; /* to prevent compiler warning */ + + /* if it is on the stack then update the stack */ + if (IN_STACK (sloc->etype)) + { + currFunc->stack += getSize (sloc->type); + _G.stackExtend += getSize (sloc->type); + } + else + _G.dataExtend += getSize (sloc->type); + + /* add it to the _G.stackSpil set */ + addSetHead (&_G.stackSpil, sloc); + sym->usl.spillLoc = sloc; + sym->stackSpil = 1; + + /* add it to the set of itempStack set + of the spill location */ + addSetHead (&sloc->usl.itmpStack, sym); + return sym; +} + +/*-----------------------------------------------------------------*/ +/* isSpiltOnStack - returns true if the spil location is on stack */ +/* or otherwise needs a pointer register */ +/*-----------------------------------------------------------------*/ +static bool +isSpiltOnStack (symbol * sym) +{ + sym_link *etype; + + if (!sym) + return FALSE; + + if (!sym->isspilt) + return FALSE; + +/* if (sym->_G.stackSpil) */ +/* return TRUE; */ + + if (!sym->usl.spillLoc) + return FALSE; + + if (sym->usl.spillLoc->onStack || sym->usl.spillLoc->iaccess) + return TRUE; + + etype = getSpec (sym->usl.spillLoc->type); + if (IN_STACK (etype)) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* spillThis - spils a specific operand */ +/*-----------------------------------------------------------------*/ +static void +spillThis (symbol * sym) +{ + int i; + /* if this is rematerializable or has a spillLocation + we are okay, else we need to create a spillLocation + for it */ + if (!(sym->remat || sym->usl.spillLoc)) + createStackSpil (sym); + + /* mark it has spilt & put it in the spilt set */ + sym->isspilt = sym->spillA = 1; + _G.spiltSet = bitVectSetBit (_G.spiltSet, sym->key); + + bitVectUnSetBit (_G.regAssigned, sym->key); + bitVectUnSetBit (_G.totRegAssigned, sym->key); + + for (i = 0; i < sym->nRegs; i++) + { + if (sym->regs[i]) + { + freeReg (sym->regs[i]); + sym->regs[i] = NULL; + } + } + + /* if spilt on stack then free up r0 & r1 + if they could have been assigned to some + LIVE ranges */ + if (!mcs51_ptrRegReq && isSpiltOnStack (sym)) + { + spillLRWithPtrReg (sym); + mcs51_ptrRegReq++; + } + + if (sym->usl.spillLoc && !sym->remat) + sym->usl.spillLoc->allocreq++; + return; +} + +/*-----------------------------------------------------------------*/ +/* selectSpil - select a iTemp to spil : rather a simple procedure */ +/*-----------------------------------------------------------------*/ +static symbol * +selectSpil (iCode * ic, eBBlock * ebp, symbol * forSym) +{ + bitVect *lrcs = NULL; + set *selectS; + symbol *sym; + + /* get the spillable live ranges */ + lrcs = computeSpillable (ic); + + /* remove incompatible registers */ + if ((forSym->regType == REG_PTR) || (forSym->regType == REG_GPR)) + { + selectS = liveRangesWith (lrcs, bitType, ebp, ic); + + for (sym = setFirstItem (selectS); sym; sym = setNextItem (selectS)) + { + bitVectUnSetBit (lrcs, sym->key); + } + } + + /* get all live ranges that are rematerializable */ + if ((selectS = liveRangesWith (lrcs, rematable, ebp, ic))) + { + /* return the least used of these */ + return leastUsedLR (selectS); + } + + /* get live ranges with spillLocations in direct space */ + if ((selectS = liveRangesWith (lrcs, directSpilLoc, ebp, ic))) + { + sym = leastUsedLR (selectS); + strncpyz (sym->rname, + sym->usl.spillLoc->rname[0] ? + sym->usl.spillLoc->rname : sym->usl.spillLoc->name, + sizeof(sym->rname)); + sym->spildir = 1; + /* mark it as allocation required */ + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* if the symbol is local to the block then */ + if (forSym->liveTo < ebp->lSeq) + { + /* check if there are any live ranges allocated + to registers that are not used in this block */ + if (!_G.blockSpil && (selectS = liveRangesWith (lrcs, notUsedInBlock, ebp, ic))) + { + sym = leastUsedLR (selectS); + /* if this is not rematerializable */ + if (!sym->remat) + { + _G.blockSpil++; + sym->blockSpil = 1; + } + return sym; + } + + /* check if there are any live ranges that are + not used in the remainder of the block */ + if (!_G.blockSpil && + !isiCodeInFunctionCall (ic) && + (selectS = liveRangesWith (lrcs, notUsedInRemaining, ebp, ic))) + { + sym = leastUsedLR (selectS); + if (sym != forSym) + { + if (!sym->remat) + { + sym->remainSpil = 1; + _G.blockSpil++; + } + return sym; + } + } + } + + /* find live ranges with spillocation && not used as pointers */ + if ((selectS = liveRangesWith (lrcs, hasSpilLocnoUptr, ebp, ic))) + { + sym = leastUsedLR (selectS); + /* mark this as allocation required */ + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* find live ranges with spillocation */ + if ((selectS = liveRangesWith (lrcs, hasSpilLoc, ebp, ic))) + { + sym = leastUsedLR (selectS); + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* couldn't find then we need to create a spil + location on the stack, for which one? + the least used ofcourse */ + if ((selectS = liveRangesWith (lrcs, noSpilLoc, ebp, ic))) + { + /* return a created spil location */ + sym = createStackSpil (leastUsedLR (selectS)); + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* this is an extreme situation we will spill + this one : happens very rarely but it does happen */ + spillThis (forSym); + return forSym; +} + +/*-----------------------------------------------------------------*/ +/* spilSomething - spil some variable & mark registers as free */ +/*-----------------------------------------------------------------*/ +static bool +spilSomething (iCode * ic, eBBlock * ebp, symbol * forSym) +{ + symbol *ssym; + int i; + + /* get something we can spil */ + ssym = selectSpil (ic, ebp, forSym); + + /* mark it as spilt */ + ssym->isspilt = ssym->spillA = 1; + _G.spiltSet = bitVectSetBit (_G.spiltSet, ssym->key); + + /* mark it as not register assigned & + take it away from the set */ + bitVectUnSetBit (_G.regAssigned, ssym->key); + bitVectUnSetBit (_G.totRegAssigned, ssym->key); + + /* mark the registers as free */ + for (i = 0; i < ssym->nRegs; i++) + if (ssym->regs[i]) + freeReg (ssym->regs[i]); + + /* if spilt on stack then free up r0 & r1 + if they could have been assigned to as gprs */ + if (!mcs51_ptrRegReq && isSpiltOnStack (ssym)) + { + spillLRWithPtrReg (ssym); + mcs51_ptrRegReq++; + } + + /* if this was a block level spil then insert push & pop + at the start & end of block respectively */ + if (ssym->blockSpil) + { + iCode *nic = newiCode (IPUSH, operandFromSymbol (ssym), NULL); + /* add push to the start of the block */ + addiCodeToeBBlock (ebp, nic, (ebp->sch->op == LABEL ? + ebp->sch->next : ebp->sch)); + nic = newiCode (IPOP, operandFromSymbol (ssym), NULL); + /* add pop to the end of the block */ + addiCodeToeBBlock (ebp, nic, NULL); + } + + /* if spilt because not used in the remainder of the + block then add a push before this instruction and + a pop at the end of the block */ + if (ssym->remainSpil) + { + iCode *nic = newiCode (IPUSH, operandFromSymbol (ssym), NULL); + /* add push just before this instruction */ + addiCodeToeBBlock (ebp, nic, ic); + + nic = newiCode (IPOP, operandFromSymbol (ssym), NULL); + /* add pop to the end of the block */ + addiCodeToeBBlock (ebp, nic, NULL); + } + + if (ssym == forSym) + return FALSE; + else + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* getRegPtr - will try for PTR if not a GPR type if not spil */ +/*-----------------------------------------------------------------*/ +static regs * +getRegPtr (iCode * ic, eBBlock * ebp, symbol * sym) +{ + regs *reg; + int j; + +tryAgain: + /* try for a ptr type */ + if ((reg = allocReg (REG_PTR))) + return reg; + + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + /* we have to spil */ + if (!spilSomething (ic, ebp, sym)) + return NULL; + + /* make sure partially assigned registers aren't reused */ + for (j=0; j<=sym->nRegs; j++) + if (sym->regs[j]) + sym->regs[j]->isFree = 0; + + /* this looks like an infinite loop but + in really selectSpil will abort */ + goto tryAgain; +} + +/*-----------------------------------------------------------------*/ +/* getRegGpr - will try for GPR if not spil */ +/*-----------------------------------------------------------------*/ +static regs * +getRegGpr (iCode * ic, eBBlock * ebp, symbol * sym) +{ + regs *reg; + int j; + +tryAgain: + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + if (!mcs51_ptrRegReq) + if ((reg = allocReg (REG_PTR))) + return reg; + + /* we have to spil */ + if (!spilSomething (ic, ebp, sym)) + return NULL; + + /* make sure partially assigned registers aren't reused */ + for (j=0; j<=sym->nRegs; j++) + if (sym->regs[j]) + sym->regs[j]->isFree = 0; + + /* this looks like an infinite loop but + in really selectSpil will abort */ + goto tryAgain; +} + +/*-----------------------------------------------------------------*/ +/* getRegBit - will try for Bit if not spill this */ +/*-----------------------------------------------------------------*/ +static regs *getRegBit (symbol * sym) +{ + regs *reg; + + /* try for a bit type */ + if ((reg = allocReg (REG_BIT))) + return reg; + + spillThis (sym); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* getRegPtrNoSpil - get it cannot be spilt */ +/*-----------------------------------------------------------------*/ +static regs *getRegPtrNoSpil() +{ + regs *reg; + + /* try for a ptr type */ + if ((reg = allocReg (REG_PTR))) + return reg; + + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + assert(0); + + /* just to make the compiler happy */ + return 0; +} + +/*-----------------------------------------------------------------*/ +/* getRegGprNoSpil - get it cannot be spilt */ +/*-----------------------------------------------------------------*/ +static regs *getRegGprNoSpil() +{ + regs *reg; + if ((reg = allocReg (REG_GPR))) + return reg; + + if (!mcs51_ptrRegReq) + if ((reg = allocReg (REG_PTR))) + return reg; + + assert(0); + + /* just to make the compiler happy */ + return 0; +} + +/*-----------------------------------------------------------------*/ +/* getRegBitNoSpil - get it cannot be spilt */ +/*-----------------------------------------------------------------*/ +static regs *getRegBitNoSpil() +{ + regs *reg; + + /* try for a ptr type */ + if ((reg = allocReg (REG_BIT))) + return reg; + + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + assert(0); + + /* just to make the compiler happy */ + return 0; +} + +/*-----------------------------------------------------------------*/ +/* symHasReg - symbol has a given register */ +/*-----------------------------------------------------------------*/ +static bool +symHasReg (symbol * sym, regs * reg) +{ + int i; + + for (i = 0; i < sym->nRegs; i++) + if (sym->regs[i] == reg) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* updateRegUsage - update the registers in use at the start of */ +/* this icode */ +/*-----------------------------------------------------------------*/ +static void +updateRegUsage (iCode * ic) +{ + int reg; + + for (reg=0; regriu &= ~(1<riu |= (1<= 8); + } + } +} + +/*-----------------------------------------------------------------*/ +/* deassignLRs - check the live to and if they have registers & are */ +/* not spilt then free up the registers */ +/*-----------------------------------------------------------------*/ +static void +deassignLRs (iCode * ic, eBBlock * ebp) +{ + symbol *sym; + int k; + symbol *result; + + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) + { + symbol *psym = NULL; + /* if it does not end here */ + if (sym->liveTo > ic->seq) + continue; + + /* if it was spilt on stack then we can + mark the stack spil location as free */ + if (sym->isspilt) + { + if (sym->stackSpil) + { + sym->usl.spillLoc->isFree = 1; + sym->stackSpil = 0; + } + continue; + } + + if (!bitVectBitValue (_G.regAssigned, sym->key)) + continue; + + /* special case check if this is an IFX & + the privious one was a pop and the + previous one was not spilt then keep track + of the symbol */ + if (ic->op == IFX && ic->prev && + ic->prev->op == IPOP && + !ic->prev->parmPush && + !OP_SYMBOL (IC_LEFT (ic->prev))->isspilt) + psym = OP_SYMBOL (IC_LEFT (ic->prev)); + + if (sym->nRegs) + { + int i = 0; + + bitVectUnSetBit (_G.regAssigned, sym->key); + + /* if the result of this one needs registers + and does not have it then assign it right + away */ + if (IC_RESULT (ic) && + !(SKIP_IC2 (ic) || /* not a special icode */ + ic->op == JUMPTABLE || + ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP || + ic->op == RETURN || + POINTER_SET (ic)) && + (result = OP_SYMBOL (IC_RESULT (ic))) && /* has a result */ + result->liveTo > ic->seq && /* and will live beyond this */ + result->liveTo <= ebp->lSeq && /* does not go beyond this block */ + result->liveFrom == ic->seq && /* does not start before here */ + result->regType == sym->regType && /* same register types */ + result->nRegs && /* which needs registers */ + !result->isspilt && /* and does not already have them */ + !result->remat && + !bitVectBitValue (_G.regAssigned, result->key) && + /* the number of free regs + number of regs in this LR + can accomodate the what result Needs */ + ((nfreeRegsType (result->regType) + + sym->nRegs) >= result->nRegs) + ) + { + for (i = 0; i < result->nRegs; i++) + if (i < sym->nRegs) + result->regs[i] = sym->regs[i]; + else + result->regs[i] = getRegGpr (ic, ebp, result); + + _G.regAssigned = bitVectSetBit (_G.regAssigned, result->key); + _G.totRegAssigned = bitVectSetBit (_G.totRegAssigned, result->key); + + } + + /* free the remaining */ + for (; i < sym->nRegs; i++) + { + if (psym) + { + if (!symHasReg (psym, sym->regs[i])) + freeReg (sym->regs[i]); + } + else + freeReg (sym->regs[i]); + } + } + } +} + + +/*-----------------------------------------------------------------*/ +/* reassignLR - reassign this to registers */ +/*-----------------------------------------------------------------*/ +static void +reassignLR (operand * op) +{ + symbol *sym = OP_SYMBOL (op); + int i; + + /* not spilt any more */ + sym->isspilt = sym->spillA = sym->blockSpil = sym->remainSpil = 0; + bitVectUnSetBit (_G.spiltSet, sym->key); + + _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); + _G.totRegAssigned = bitVectSetBit (_G.totRegAssigned, sym->key); + + _G.blockSpil--; + + for (i = 0; i < sym->nRegs; i++) + sym->regs[i]->isFree = 0; +} + +/*-----------------------------------------------------------------*/ +/* willCauseSpill - determines if allocating will cause a spill */ +/*-----------------------------------------------------------------*/ +static int +willCauseSpill (int nr, int rt) +{ + /* first check if there are any available registers + of the type required */ + if (rt == REG_PTR) + { + /* special case for pointer type + if pointer type not avlb then + check for type gpr */ + if (nFreeRegs (rt) >= nr) + return 0; + if (nFreeRegs (REG_GPR) >= nr) + return 0; + } + else if (rt == REG_BIT) + { + if (nFreeRegs (rt) >= nr) + return 0; + } + else + { + if (mcs51_ptrRegReq) + { + if (nFreeRegs (rt) >= nr) + return 0; + } + else + { + if (nFreeRegs (REG_PTR) + + nFreeRegs (REG_GPR) >= nr) + return 0; + } + } + + /* it will cause a spil */ + return 1; +} + +/*-----------------------------------------------------------------*/ +/* positionRegs - the allocator can allocate same registers to res- */ +/* ult and operand, if this happens make sure they are in the same */ +/* position as the operand otherwise chaos results */ +/*-----------------------------------------------------------------*/ +static int +positionRegs (symbol * result, symbol * opsym) +{ + int count = min (result->nRegs, opsym->nRegs); + int i, j = 0, shared = 0; + int change = 0; + + /* if the result has been spilt then cannot share */ + if (opsym->isspilt) + return 0; +again: + shared = 0; + /* first make sure that they actually share */ + for (i = 0; i < count; i++) + { + for (j = 0; j < count; j++) + { + if (result->regs[i] == opsym->regs[j] && i != j) + { + shared = 1; + goto xchgPositions; + } + } + } +xchgPositions: + if (shared) + { + regs *tmp = result->regs[i]; + result->regs[i] = result->regs[j]; + result->regs[j] = tmp; + change ++; + goto again; + } + return change; +} + +/*------------------------------------------------------------------*/ +/* verifyRegsAssigned - make sure an iTemp is properly initialized; */ +/* it should either have registers or have beed spilled. Otherwise, */ +/* there was an uninitialized variable, so just spill this to get */ +/* the operand in a valid state. */ +/*------------------------------------------------------------------*/ +static void +verifyRegsAssigned (operand *op, iCode * ic) +{ + symbol * sym; + + if (!op) return; + if (!IS_ITEMP (op)) return; + + sym = OP_SYMBOL (op); + if (sym->isspilt) return; + if (!sym->nRegs) return; + if (sym->regs[0]) return; + + werrorfl (ic->filename, ic->lineno, W_LOCAL_NOINIT, + sym->prereqv ? sym->prereqv->name : sym->name); + spillThis (sym); +} + + +/*-----------------------------------------------------------------*/ +/* serialRegAssign - serially allocate registers to the variables */ +/*-----------------------------------------------------------------*/ +static void +serialRegAssign (eBBlock ** ebbs, int count) +{ + int i; + + /* for all blocks */ + for (i = 0; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + /* for all instructions do */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + updateRegUsage(ic); + + /* if this is an ipop that means some live + range will have to be assigned again */ + if (ic->op == IPOP) + reassignLR (IC_LEFT (ic)); + + /* if result is present && is a true symbol */ + if (IC_RESULT (ic) && ic->op != IFX && + IS_TRUE_SYMOP (IC_RESULT (ic))) + { + OP_SYMBOL (IC_RESULT (ic))->allocreq++; + } + + /* take away registers from live + ranges that end at this instruction */ + deassignLRs (ic, ebbs[i]); + + /* some don't need registers */ + if (SKIP_IC2 (ic) || + ic->op == JUMPTABLE || + ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP || + (IC_RESULT (ic) && POINTER_SET (ic))) + { + continue; + } + + /* now we need to allocate registers + only for the result */ + if (IC_RESULT (ic)) + { + symbol *sym = OP_SYMBOL (IC_RESULT (ic)); + bitVect *spillable; + int willCS; + int j; + int ptrRegSet = 0; + + /* Make sure any spill location is definitely allocated */ + if (sym->isspilt && !sym->remat && sym->usl.spillLoc && + !sym->usl.spillLoc->allocreq) + { + sym->usl.spillLoc->allocreq++; + } + + /* if it does not need or is spilt + or is already assigned to registers + or will not live beyond this instructions */ + if (!sym->nRegs || + sym->isspilt || + bitVectBitValue (_G.regAssigned, sym->key) || + sym->liveTo <= ic->seq) + { + continue; + } + + /* do not try to spil bit registers as it won't work */ + if (sym->regType != REG_BIT) + { + /* if some liverange has been spilt at the block level + and this one live beyond this block then spil this + to be safe */ + if (_G.blockSpil && sym->liveTo > ebbs[i]->lSeq) + { + spillThis (sym); + continue; + } + + willCS = willCauseSpill (sym->nRegs, sym->regType); + /* if this is a bit variable then don't use precious registers + along with expensive bit-to-char conversions but just spill + it */ + if (willCS && SPEC_NOUN(sym->etype) == V_BIT) + { + spillThis (sym); + continue; + } + + /* if trying to allocate this will cause + a spill and there is nothing to spill + or this one is rematerializable then + spill this one */ + spillable = computeSpillable (ic); + if (sym->remat || (willCS && bitVectIsZero (spillable))) + { + spillThis (sym); + continue; + } + + /* If the live range preceeds the point of definition + then ideally we must take into account registers that + have been allocated after sym->liveFrom but freed + before ic->seq. This is complicated, so spill this + symbol instead and let fillGaps handle the allocation. */ + if (sym->liveFrom < ic->seq) + { + spillThis (sym); + continue; + } + + /* if it has a spillocation & is used less than + all other live ranges then spill this */ + if (willCS) + { + if (sym->usl.spillLoc) + { + symbol *leastUsed = leastUsedLR (liveRangesWith (spillable, + allLRs, ebbs[i], ic)); + if (leastUsed && leastUsed->used > sym->used) + { + spillThis (sym); + continue; + } + } + else + { + /* if none of the liveRanges have a spillLocation then better + to spill this one than anything else already assigned to registers */ + if (liveRangesWith(spillable,noSpilLoc,ebbs[i],ic)) + { + /* if this is local to this block then we might find a block spil */ + if (!(sym->liveFrom >= ebbs[i]->fSeq && sym->liveTo <= ebbs[i]->lSeq)) + { + spillThis (sym); + continue; + } + } + } + } + } + /* if we need ptr regs for the right side + then mark it */ + if (POINTER_GET (ic) && IS_SYMOP (IC_LEFT (ic)) + && getSize (OP_SYMBOL (IC_LEFT (ic))->type) <= (unsigned int) PTRSIZE) + { + mcs51_ptrRegReq++; + ptrRegSet = 1; + } + if (IC_LEFT (ic) && IS_SYMOP (IC_LEFT (ic)) + && SPEC_OCLS(OP_SYMBOL (IC_LEFT (ic))->etype) == idata) + { + mcs51_ptrRegReq++; + ptrRegSet = 1; + } + if (IC_RIGHT (ic) && IS_SYMOP (IC_RIGHT (ic)) + && SPEC_OCLS(OP_SYMBOL (IC_RIGHT (ic))->etype) == idata) + { + mcs51_ptrRegReq++; + ptrRegSet = 1; + } + + /* else we assign registers to it */ + _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); + _G.totRegAssigned = bitVectSetBit (_G.totRegAssigned, sym->key); + + for (j = 0; j < sym->nRegs; j++) + { + sym->regs[j] = NULL; + if (sym->regType == REG_PTR) + sym->regs[j] = getRegPtr (ic, ebbs[i], sym); + else if (sym->regType == REG_BIT) + sym->regs[j] = getRegBit (sym); + else + { + if (ic->op == CAST && IS_SYMOP (IC_RIGHT (ic))) + { + symbol * right = OP_SYMBOL (IC_RIGHT (ic)); + + if (right->regs[j] && (right->regType != REG_BIT)) + sym->regs[j] = allocThisReg (right->regs[j]); + } + if (!sym->regs[j]) + sym->regs[j] = getRegGpr (ic, ebbs[i], sym); + } + + /* if the allocation failed which means + this was spilt then break */ + if (!sym->regs[j]) + { + int i; + for (i=0; i < sym->nRegs ; i++ ) + sym->regs[i] = NULL; + break; + } + } + + if (!POINTER_SET(ic) && !POINTER_GET(ic)) + { + /* if it shares registers with operands make sure + that they are in the same position */ + if (IC_LEFT (ic) && IS_SYMOP (IC_LEFT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->nRegs) + { + positionRegs (OP_SYMBOL (IC_RESULT (ic)), + OP_SYMBOL (IC_LEFT (ic))); + } + /* do the same for the right operand */ + if (IC_RIGHT (ic) && IS_SYMOP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->nRegs) + { + positionRegs (OP_SYMBOL (IC_RESULT (ic)), + OP_SYMBOL (IC_RIGHT (ic))); + } + } + + if (ptrRegSet) + { + mcs51_ptrRegReq--; + ptrRegSet = 0; + } + } + } + } + + /* Check for and fix any problems with uninitialized operands */ + for (i = 0; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + { + continue; + } + + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + if (SKIP_IC2 (ic)) + continue; + + if (ic->op == IFX) + { + verifyRegsAssigned (IC_COND (ic), ic); + continue; + } + + if (ic->op == JUMPTABLE) + { + verifyRegsAssigned (IC_JTCOND (ic), ic); + continue; + } + + verifyRegsAssigned (IC_RESULT (ic), ic); + verifyRegsAssigned (IC_LEFT (ic), ic); + verifyRegsAssigned (IC_RIGHT (ic), ic); + } + } +} + +/*-----------------------------------------------------------------*/ +/* fillGaps - Try to fill in the Gaps left by Pass1 */ +/*-----------------------------------------------------------------*/ +static void fillGaps() +{ + symbol *sym =NULL; + int key =0; + int pass; + iCode *ic = NULL; + + if (getenv("DISABLE_FILL_GAPS")) + return; + + /* look for liveranges that were spilt by the allocator */ + for (sym = hTabFirstItem(liveRanges, &key) ; sym ; + sym = hTabNextItem(liveRanges, &key)) + { + int i; + int pdone = 0; + + if (!sym->spillA || !sym->clashes || sym->remat) + continue; + + /* if spilt in direct space the original rname is lost */ + if (sym->usl.spillLoc && (IN_DIRSPACE (SPEC_OCLS (sym->usl.spillLoc->etype)))) + continue; + + /* find the liveRanges this one clashes with, that are + still assigned to registers & mark the registers as used*/ + for ( i = 0 ; i < sym->clashes->size ; i ++) + { + int k; + symbol *clr; + + if (bitVectBitValue(sym->clashes,i) == 0 || /* those that clash with this */ + bitVectBitValue(_G.totRegAssigned,i) == 0) /* and are still assigned to registers */ + continue ; + + clr = hTabItemWithKey(liveRanges, i); + assert(clr); + + /* mark these registers as used */ + for (k = 0 ; k < clr->nRegs ; k++ ) + useReg(clr->regs[k]); + } + + if (willCauseSpill(sym->nRegs, sym->regType)) + { + /* NOPE :( clear all registers & and continue */ + freeAllRegs(); + continue ; + } + + ic = NULL; + for (i = 0 ; i < sym->defs->size ; i++ ) + { + if (bitVectBitValue(sym->defs, i)) + { + if (!(ic = hTabItemWithKey(iCodehTab, i))) + continue; + if (ic->op == CAST) + break; + } + } + + D(printf("Attempting fillGaps on %s: [", sym->name)); + /* THERE IS HOPE !!!! */ + for (i=0; i < sym->nRegs ; i++ ) + { + if (sym->regType == REG_PTR) + sym->regs[i] = getRegPtrNoSpil (); + else if (sym->regType == REG_BIT) + sym->regs[i] = getRegBitNoSpil (); + else + { + sym->regs[i] = NULL; + if (ic && ic->op == CAST && IS_SYMOP (IC_RIGHT (ic))) + { + symbol * right = OP_SYMBOL (IC_RIGHT (ic)); + + if (right->regs[i]) + sym->regs[i] = allocThisReg (right->regs[i]); + } + if (!sym->regs[i]) + sym->regs[i] = getRegGprNoSpil (); + } + D(printf("%s ", sym->regs[i]->name)); + } + D(printf("]\n")); + + /* For all its definitions check if the registers + allocated needs positioning NOTE: we can position + only ONCE if more than One positioning required + then give up. + We may need to perform the checks twice; once to + position the registers as needed, the second to + verify any register repositioning is still + compatible. + */ + sym->isspilt = 0; + for (pass=0; pass<2; pass++) + { + D(printf(" checking definitions\n")); + for (i = 0 ; i < sym->defs->size ; i++ ) + { + if (bitVectBitValue(sym->defs,i)) + { + if (!(ic = hTabItemWithKey(iCodehTab,i))) + continue; + D(printf(" ic->seq = %d\n", ic->seq)); + if (SKIP_IC(ic)) + continue; + assert(isSymbolEqual(sym,OP_SYMBOL(IC_RESULT(ic)))); /* just making sure */ + /* if left is assigned to registers */ + if (IS_SYMOP(IC_LEFT(ic))) + { + D(printf(" left = ")); + D(printOperand(IC_LEFT(ic),NULL)); + } + if (IS_SYMOP(IC_LEFT(ic)) && + bitVectBitValue(_G.totRegAssigned,OP_SYMBOL(IC_LEFT(ic))->key)) + { + pdone += (positionRegs(sym,OP_SYMBOL(IC_LEFT(ic)))>0); + } + if (IS_SYMOP(IC_RIGHT(ic))) + { + D(printf(" right = ")); + D(printOperand(IC_RIGHT(ic),NULL)); + } + if (IS_SYMOP(IC_RIGHT(ic)) && + bitVectBitValue(_G.totRegAssigned,OP_SYMBOL(IC_RIGHT(ic))->key)) + { + pdone += (positionRegs(sym,OP_SYMBOL(IC_RIGHT(ic)))>0); + } + D(printf(" pdone = %d\n", pdone)); + if (pdone > 1) + break; + } + } + D(printf(" checking uses\n")); + for (i = 0 ; i < sym->uses->size ; i++ ) + { + if (bitVectBitValue(sym->uses,i)) + { + iCode *ic; + if (!(ic = hTabItemWithKey(iCodehTab, i))) + continue; + D(printf(" ic->seq = %d\n", ic->seq)); + if (SKIP_IC(ic)) + continue; + if (POINTER_SET(ic) || POINTER_GET(ic)) + continue; + + /* if result is assigned to registers */ + if (IS_SYMOP (IC_RESULT (ic))) + { + D(printf(" result = ")); + D(printOperand(IC_RESULT (ic), NULL)); + } + if (IS_SYMOP (IC_RESULT (ic)) && + bitVectBitValue(_G.totRegAssigned, OP_SYMBOL (IC_RESULT (ic))->key)) + { + pdone += (positionRegs(sym, OP_SYMBOL (IC_RESULT (ic)))>0); + } + D(printf(" pdone = %d\n", pdone)); + if (pdone > 1) + break; + } + } + if (pdone == 0) + break; /* second pass only if regs repositioned */ + if (pdone > 1) + break; + } + D(printf(" sym->regs = [")); + for (i=0; i < sym->nRegs ; i++ ) + D(printf("%s ", sym->regs[i]->name)); + D(printf("]\n")); + /* had to position more than once GIVE UP */ + if (pdone > 1) + { + /* UNDO all the changes we made to try this */ + sym->isspilt = 1; + for (i=0; i < sym->nRegs ; i++ ) + { + sym->regs[i] = NULL; + } + freeAllRegs(); + D(printf ("Fill Gap gave up due to positioning for %s in function %s\n",sym->name, currFunc ? currFunc->name : "UNKNOWN")); + continue ; + } + D(printf ("FILLED GAP for %s in function %s\n",sym->name, currFunc ? currFunc->name : "UNKNOWN")); + + _G.totRegAssigned = bitVectSetBit(_G.totRegAssigned,sym->key); + sym->isspilt = sym->spillA = 0 ; + sym->usl.spillLoc->allocreq--; + freeAllRegs(); + } +} + +/*-----------------------------------------------------------------*/ +/* findAllBitregs :- returns bit vector of all bit registers */ +/*-----------------------------------------------------------------*/ +static bitVect * +findAllBitregs (void) +{ + bitVect *rmask = newBitVect (mcs51_nRegs); + int j; + + for (j = 0; j < mcs51_nRegs; j++) + { + if (regs8051[j].type == REG_BIT) + rmask = bitVectSetBit (rmask, regs8051[j].rIdx); + } + + return rmask; +} + +/*-----------------------------------------------------------------*/ +/* mcs51_allBitregs :- returns bit vector of all bit registers */ +/*-----------------------------------------------------------------*/ +bitVect * +mcs51_allBitregs (void) +{ + return _G.allBitregs; +} + +/*-----------------------------------------------------------------*/ +/* rUmaskForOp :- returns register mask for an operand */ +/*-----------------------------------------------------------------*/ +bitVect * +mcs51_rUmaskForOp (operand * op) +{ + bitVect *rumask; + symbol *sym; + int j; + + /* only temporaries are assigned registers */ + if (!IS_ITEMP (op)) + return NULL; + + sym = OP_SYMBOL (op); + + /* if spilt or no registers assigned to it + then nothing */ + if (sym->isspilt || !sym->nRegs) + return NULL; + + rumask = newBitVect (mcs51_nRegs); + + for (j = 0; j < sym->nRegs; j++) + { + if (sym->regs[j]) /* EEP - debug */ + rumask = bitVectSetBit (rumask, sym->regs[j]->rIdx); + } + + return rumask; +} + +/*-----------------------------------------------------------------*/ +/* regsUsedIniCode :- returns bit vector of registers used in iCode */ +/*-----------------------------------------------------------------*/ +static bitVect * +regsUsedIniCode (iCode * ic) +{ + bitVect *rmask = newBitVect (mcs51_nRegs); + + /* do the special cases first */ + if (ic->op == IFX) + { + rmask = bitVectUnion (rmask, mcs51_rUmaskForOp (IC_COND (ic))); + goto ret; + } + + /* for the jumptable */ + if (ic->op == JUMPTABLE) + { + rmask = bitVectUnion (rmask, mcs51_rUmaskForOp (IC_JTCOND (ic))); + goto ret; + } + + /* of all other cases */ + if (IC_LEFT (ic)) + rmask = bitVectUnion (rmask, mcs51_rUmaskForOp (IC_LEFT (ic))); + + if (IC_RIGHT (ic)) + rmask = bitVectUnion (rmask, mcs51_rUmaskForOp (IC_RIGHT (ic))); + + if (IC_RESULT (ic)) + rmask = bitVectUnion (rmask, mcs51_rUmaskForOp (IC_RESULT (ic))); + +ret: + return rmask; +} + +/*-----------------------------------------------------------------*/ +/* createRegMask - for each instruction will determine the regsUsed */ +/*-----------------------------------------------------------------*/ +static void +createRegMask (eBBlock ** ebbs, int count) +{ + int i; + + /* for all blocks */ + for (i = 0; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + /* for all instructions */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + int j; + + if (SKIP_IC2 (ic) || !ic->rlive) + continue; + + /* first mark the registers used in this + instruction */ + ic->rUsed = regsUsedIniCode (ic); + _G.funcrUsed = bitVectUnion (_G.funcrUsed, ic->rUsed); + + /* now create the register mask for those + registers that are in use : this is a + super set of ic->rUsed */ + ic->rMask = newBitVect (mcs51_nRegs + 1); + + /* for all live Ranges alive at this point */ + for (j = 1; j < ic->rlive->size; j++) + { + symbol *sym; + int k; + + /* if not alive then continue */ + if (!bitVectBitValue (ic->rlive, j)) + continue; + + /* find the live range we are interested in */ + if (!(sym = hTabItemWithKey (liveRanges, j))) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "createRegMask cannot find live range"); + fprintf(stderr, "\tmissing live range: key=%d\n", j); + exit (0); + } + + /* if no register assigned to it */ + if (!sym->nRegs || sym->isspilt) + continue; + + /* for all the registers allocated to it */ + for (k = 0; k < sym->nRegs; k++) + if (sym->regs[k]) + ic->rMask = bitVectSetBit (ic->rMask, sym->regs[k]->rIdx); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* rematStr - returns the rematerialized string for a remat var */ +/*-----------------------------------------------------------------*/ +static char * +rematStr (symbol * sym) +{ + iCode *ic = sym->rematiCode; + int offset = 0; + + while (1) + { + /* if plus adjust offset to right hand side */ + if (ic->op == '+') + { + offset += (int) operandLitValue (IC_RIGHT (ic)); + ic = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + continue; + } + + /* if minus adjust offset to right hand side */ + if (ic->op == '-') + { + offset -= (int) operandLitValue (IC_RIGHT (ic)); + ic = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + continue; + } + + /* cast then continue */ + if (IS_CAST_ICODE(ic)) + { + ic = OP_SYMBOL (IC_RIGHT (ic))->rematiCode; + continue; + } + /* we reached the end */ + break; + } + + if (offset) + { + SNPRINTF (buffer, sizeof(buffer), + "(%s %c 0x%04x)", + OP_SYMBOL (IC_LEFT (ic))->rname, + offset >= 0 ? '+' : '-', + abs (offset) & 0xffff); + } + else + { + strncpyz (buffer, OP_SYMBOL (IC_LEFT (ic))->rname, sizeof(buffer)); + } + return buffer; +} + +/*-----------------------------------------------------------------*/ +/* regTypeNum - computes the type & number of registers required */ +/*-----------------------------------------------------------------*/ +static void +regTypeNum (eBBlock *ebbs) +{ + symbol *sym; + int k; + iCode *ic; + + /* for each live range do */ + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) + { + /* if used zero times then no registers needed */ + if ((sym->liveTo - sym->liveFrom) == 0) + continue; + + /* if the live range is a temporary */ + if (sym->isitmp) + { + /* if the type is marked as a conditional */ + if (sym->regType == REG_CND) + continue; + + /* if used in return only then we don't + need registers */ + if (sym->ruonly || sym->accuse) + { + if (IS_AGGREGATE (sym->type) || sym->isptr) + sym->type = aggrToPtr (sym->type, FALSE); + else if (IS_BIT(sym->type)) + sym->regType = REG_CND; + continue; + } + + /* if the symbol has only one definition & + that definition is a get_pointer */ + if (bitVectnBitsOn (sym->defs) == 1 && + (ic = hTabItemWithKey (iCodehTab, bitVectFirstBit (sym->defs))) && + POINTER_GET (ic) && + !IS_BITVAR (sym->etype) && + (aggrToPtrDclType (operandType (IC_LEFT (ic)), FALSE) == POINTER)) + { + if (ptrPseudoSymSafe (sym, ic)) + { + ptrPseudoSymConvert (sym, ic, rematStr (OP_SYMBOL (IC_LEFT (ic)))); + continue; + } + + /* if in data space or idata space then try to + allocate pointer register */ + } + + /* if not then we require registers */ + sym->nRegs = ((IS_AGGREGATE (sym->type) || sym->isptr) ? + getSize (sym->type = aggrToPtr (sym->type, FALSE)) : + getSize (sym->type)); + + if (sym->nRegs > 4) + { + fprintf (stderr, "allocated more than 4 or 0 registers for type "); + printTypeChain (sym->type, stderr); + fprintf (stderr, "\n"); + } + + /* determine the type of register required */ + if (sym->nRegs == 1 && IS_PTR (sym->type) && sym->uptr) + sym->regType = REG_PTR; + else if (IS_BIT(sym->type)) + sym->regType = REG_BIT; + else + sym->regType = REG_GPR; + } + else + /* for the first run we don't provide */ + /* registers for true symbols we will */ + /* see how things go */ + sym->nRegs = 0; + } +} + +/*-----------------------------------------------------------------*/ +/* freeAllRegs - mark all registers as free */ +/*-----------------------------------------------------------------*/ +static void +freeAllRegs () +{ + int i; + + for (i = 0; i < mcs51_nRegs; i++) + regs8051[i].isFree = 1; +} + +/*-----------------------------------------------------------------*/ +/* deallocStackSpil - this will set the stack pointer back */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (deallocStackSpil) +{ + symbol *sym = item; + + deallocLocal (sym); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* farSpacePackable - returns the packable icode for far variables */ +/*-----------------------------------------------------------------*/ +static iCode * +farSpacePackable (iCode * ic) +{ + iCode *dic; + + /* go thru till we find a definition for the + symbol on the right */ + for (dic = ic->prev; dic; dic = dic->prev) + { + /* if the definition is a call then no */ + if ((dic->op == CALL || dic->op == PCALL) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + { + return NULL; + } + + /* if shift by unknown amount then not */ + if ((dic->op == LEFT_OP || dic->op == RIGHT_OP) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + return NULL; + + /* if pointer get and size > 1 */ + if (POINTER_GET (dic) && + getSize (aggrToPtr (operandType (IC_LEFT (dic)), FALSE)) > 1) + return NULL; + + if (POINTER_SET (dic) && + getSize (aggrToPtr (operandType (IC_RESULT (dic)), FALSE)) > 1) + return NULL; + + if (dic->op == IFX) + { + if (IC_COND (dic) && + IS_TRUE_SYMOP (IC_COND (dic)) && + isOperandInFarSpace (IC_COND (dic))) + return NULL; + } + else if (dic->op == JUMPTABLE) + { + if (IC_JTCOND (dic) && + IS_TRUE_SYMOP (IC_JTCOND (dic)) && + isOperandInFarSpace (IC_JTCOND (dic))) + return NULL; + } + else + { + /* if any tree is a true symbol in far space */ + if (IC_RESULT (dic) && + IS_TRUE_SYMOP (IC_RESULT (dic)) && + isOperandInFarSpace (IC_RESULT (dic))) + return NULL; + + if (IC_RIGHT (dic) && + IS_TRUE_SYMOP (IC_RIGHT (dic)) && + isOperandInFarSpace (IC_RIGHT (dic)) && + !isOperandEqual (IC_RIGHT (dic), IC_RESULT (ic))) + return NULL; + + if (IC_LEFT (dic) && + IS_TRUE_SYMOP (IC_LEFT (dic)) && + isOperandInFarSpace (IC_LEFT (dic)) && + !isOperandEqual (IC_LEFT (dic), IC_RESULT (ic))) + return NULL; + } + + if (isOperandEqual (IC_RIGHT (ic), IC_RESULT (dic))) + { + if ((dic->op == LEFT_OP || + dic->op == RIGHT_OP || + dic->op == '-') && + IS_OP_LITERAL (IC_RIGHT (dic))) + return NULL; + else + return dic; + } + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* packRegsForAssign - register reduction for assignment */ +/*-----------------------------------------------------------------*/ +static int +packRegsForAssign (iCode * ic, eBBlock * ebp) +{ + iCode *dic, *sic; + + if (!IS_ITEMP (IC_RIGHT (ic)) || + OP_SYMBOL (IC_RIGHT (ic))->isind || + OP_LIVETO (IC_RIGHT (ic)) > ic->seq) + { + return 0; + } + + /* if the true symbol is defined in far space or on stack + then we should not since this will increase register pressure */ + if (isOperandInFarSpace(IC_RESULT(ic)) && !farSpacePackable(ic)) + { + return 0; + } + + /* find the definition of iTempNN scanning backwards if we find a + a use of the true symbol in before we find the definition then + we cannot */ + for (dic = ic->prev; dic; dic = dic->prev) + { + int crossedCall = 0; + + /* We can pack across a function call only if it's a local */ + /* variable or our parameter. Never pack global variables */ + /* or parameters to a function we call. */ + if ((dic->op == CALL || dic->op == PCALL)) + { + if (!OP_SYMBOL (IC_RESULT (ic))->ismyparm + && !OP_SYMBOL (IC_RESULT (ic))->islocal) + { + crossedCall = 1; + } + } + + /* Don't move an assignment out of a critical block */ + if (dic->op == CRITICAL) + { + dic = NULL; + break; + } + + if (SKIP_IC2 (dic)) + continue; + + if (dic->op == IFX) + { + if (IS_SYMOP (IC_COND (dic)) && + (IC_COND (dic)->key == IC_RESULT (ic)->key || + IC_COND (dic)->key == IC_RIGHT (ic)->key)) + { + dic = NULL; + break; + } + } + else + { + if (IS_TRUE_SYMOP (IC_RESULT (dic)) && + IS_OP_VOLATILE (IC_RESULT (dic))) + { + dic = NULL; + break; + } + + if (IS_SYMOP (IC_RESULT (dic)) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + { + if (POINTER_SET (dic)) + dic = NULL; + + break; + } + + if (IS_SYMOP (IC_RIGHT (dic)) && + (IC_RIGHT (dic)->key == IC_RESULT (ic)->key || + IC_RIGHT (dic)->key == IC_RIGHT (ic)->key)) + { + dic = NULL; + break; + } + + if (IS_SYMOP (IC_LEFT (dic)) && + (IC_LEFT (dic)->key == IC_RESULT (ic)->key || + IC_LEFT (dic)->key == IC_RIGHT (ic)->key)) + { + dic = NULL; + break; + } + + if (IS_SYMOP (IC_RESULT (dic)) && + IC_RESULT (dic)->key == IC_RESULT (ic)->key) + { + dic = NULL; + break; + } + + if (crossedCall) + { + dic = NULL; + break; + } + } + } + + if (!dic) + return 0; /* did not find */ + + /* if assignment then check that right is not a bit */ + if (ASSIGNMENT (ic) && !POINTER_SET (ic)) + { + sym_link *etype = operandType (IC_RESULT (dic)); + if (IS_BITFIELD (etype)) + { + /* if result is a bit too then it's ok */ + etype = operandType (IC_RESULT (ic)); + if (!IS_BITFIELD (etype)) + { + return 0; + } + } + } + + /* if the result is on stack or iaccess then it must be + the same atleast one of the operands */ + if (OP_SYMBOL (IC_RESULT (ic))->onStack || + OP_SYMBOL (IC_RESULT (ic))->iaccess) + { + /* the operation has only one symbol + operator then we can pack */ + if ((IC_LEFT (dic) && !IS_SYMOP (IC_LEFT (dic))) || + (IC_RIGHT (dic) && !IS_SYMOP (IC_RIGHT (dic)))) + goto pack; + + if (!((IC_LEFT (dic) && + IC_RESULT (ic)->key == IC_LEFT (dic)->key) || + (IC_RIGHT (dic) && + IC_RESULT (ic)->key == IC_RIGHT (dic)->key))) + return 0; + } +pack: + /* found the definition */ + /* replace the result with the result of */ + /* this assignment and remove this assignment */ + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + ReplaceOpWithCheaperOp(&IC_RESULT (dic), IC_RESULT (ic)); + + if (IS_ITEMP (IC_RESULT (dic)) && OP_SYMBOL (IC_RESULT (dic))->liveFrom > dic->seq) + { + OP_SYMBOL (IC_RESULT (dic))->liveFrom = dic->seq; + } + // TODO: and the otherway around? + + /* delete from liverange table also + delete from all the points inbetween and the new + one */ + for (sic = dic; sic != ic; sic = sic->next) + { + bitVectUnSetBit (sic->rlive, IC_RESULT (ic)->key); + if (IS_ITEMP (IC_RESULT (dic))) + bitVectSetBit (sic->rlive, IC_RESULT (dic)->key); + } + + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_DEFS (IC_RESULT (ic)), ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS(IC_RESULT (dic)) = bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + return 1; +} + +/*------------------------------------------------------------------*/ +/* findAssignToSym : scanning backwards looks for first assig found */ +/*------------------------------------------------------------------*/ +static iCode * +findAssignToSym (operand * op, iCode * ic) +{ + iCode *dic; + + /* This routine is used to find sequences like + iTempAA = FOO; + ...; (intervening ops don't use iTempAA or modify FOO) + blah = blah + iTempAA; + + and eliminate the use of iTempAA, freeing up its register for + other uses. + */ + + for (dic = ic->prev; dic; dic = dic->prev) + { + /* if definition by assignment */ + if (dic->op == '=' && + !POINTER_SET (dic) && + IC_RESULT (dic)->key == op->key +/* && IS_TRUE_SYMOP(IC_RIGHT(dic)) */ + ) + break; /* found where this temp was defined */ + + /* if we find an usage then we cannot delete it */ + + if (dic->op == IFX) + { + if (IC_COND (dic) && IC_COND (dic)->key == op->key) + return NULL; + } + else if (dic->op == JUMPTABLE) + { + if (IC_JTCOND (dic) && IC_JTCOND (dic)->key == op->key) + return NULL; + } + else + { + if (IC_LEFT (dic) && IC_LEFT (dic)->key == op->key) + return NULL; + + if (IC_RIGHT (dic) && IC_RIGHT (dic)->key == op->key) + return NULL; + + if (POINTER_SET (dic) && IC_RESULT (dic)->key == op->key) + return NULL; + } + } + + if (!dic) + return NULL; /* didn't find any assignment to op */ + + /* we are interested only if defined in far space */ + /* or in stack space in case of + & - */ + + /* if assigned to a non-symbol then don't repack regs */ + if (!IS_SYMOP (IC_RIGHT (dic))) + return NULL; + + /* if the symbol is volatile then we should not */ + if (isOperandVolatile (IC_RIGHT (dic), TRUE)) + return NULL; + /* XXX TODO --- should we be passing FALSE to isOperandVolatile()? + What does it mean for an iTemp to be volatile, anyway? Passing + TRUE is more cautious but may prevent possible optimizations */ + + /* if the symbol is in far space then we should not */ + if (isOperandInFarSpace (IC_RIGHT (dic))) + return NULL; + + /* for + & - operations make sure that + if it is on the stack it is the same + as one of the three operands */ + if ((ic->op == '+' || ic->op == '-') && + OP_SYMBOL (IC_RIGHT (dic))->onStack) + { + if (IC_RESULT (ic)->key != IC_RIGHT (dic)->key && + IC_LEFT (ic)->key != IC_RIGHT (dic)->key && + IC_RIGHT (ic)->key != IC_RIGHT (dic)->key) + return NULL; + } + + /* now make sure that the right side of dic + is not defined between ic & dic */ + if (dic) + { + iCode *sic = dic->next; + + for (; sic != ic; sic = sic->next) + if (IC_RESULT (sic) && + IC_RESULT (sic)->key == IC_RIGHT (dic)->key) + return NULL; + } + + return dic; +} + +/*-----------------------------------------------------------------*/ +/* reassignAliasedSym - used by packRegsForSupport to replace */ +/* redundant iTemp with equivalent symbol */ +/*-----------------------------------------------------------------*/ +static void +reassignAliasedSym (eBBlock *ebp, iCode *assignment, iCode *use, operand *op) +{ + iCode *ic; + unsigned oldSymKey, newSymKey; + + oldSymKey = op->key; + newSymKey = IC_RIGHT(assignment)->key; + + /* only track live ranges of compiler-generated temporaries */ + if (!IS_ITEMP(IC_RIGHT(assignment))) + newSymKey = 0; + + /* update the live-value bitmaps */ + for (ic = assignment; ic != use; ic = ic->next) { + bitVectUnSetBit (ic->rlive, oldSymKey); + if (newSymKey != 0) + ic->rlive = bitVectSetBit (ic->rlive, newSymKey); + } + + /* update the sym of the used operand */ + OP_SYMBOL(op) = OP_SYMBOL(IC_RIGHT(assignment)); + op->key = OP_SYMBOL(op)->key; + OP_SYMBOL(op)->accuse = 0; + + /* update the sym's liverange */ + if ( OP_LIVETO(op) < ic->seq ) + setToRange(op, ic->seq, FALSE); + + /* remove the assignment iCode now that its result is unused */ + remiCodeFromeBBlock (ebp, assignment); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(assignment))->defs, assignment->key); + hTabDeleteItem (&iCodehTab, assignment->key, assignment, DELETE_ITEM, NULL); +} + + +/*-----------------------------------------------------------------*/ +/* packRegsForSupport :- reduce some registers for support calls */ +/*-----------------------------------------------------------------*/ +static int +packRegsForSupport (iCode * ic, eBBlock * ebp) +{ + iCode *dic; + + /* for the left & right operand :- look to see if the + left was assigned a true symbol in far space in that + case replace them */ + + if (IS_ITEMP (IC_LEFT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->liveTo <= ic->seq) + { + dic = findAssignToSym (IC_LEFT (ic), ic); + + if (dic) + { + /* found it we need to remove it from the block */ + reassignAliasedSym (ebp, dic, ic, IC_LEFT(ic)); + return 1; + } + } + + /* do the same for the right operand */ + if (IS_ITEMP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->liveTo <= ic->seq) + { + iCode *dic = findAssignToSym (IC_RIGHT (ic), ic); + + if (dic) + { + /* if this is a subtraction & the result + is a true symbol in far space then don't pack */ + if (ic->op == '-' && IS_TRUE_SYMOP (IC_RESULT (dic))) + { + sym_link *etype = getSpec (operandType (IC_RESULT (dic))); + if (IN_FARSPACE (SPEC_OCLS (etype))) + return 0; + } + /* found it we need to remove it from the + block */ + reassignAliasedSym (ebp, dic, ic, IC_RIGHT(ic)); + + return 1; + } + } + + return 0; +} + + +/*-----------------------------------------------------------------*/ +/* packRegsForOneuse : - will reduce some registers for single Use */ +/*-----------------------------------------------------------------*/ +static iCode * +packRegsForOneuse (iCode * ic, operand * op, eBBlock * ebp) +{ + iCode *dic, *sic; + + /* if returning a literal then do nothing */ + if (!IS_ITEMP (op)) + return NULL; + + /* if rematerializable or already return use then do nothing */ + if (OP_SYMBOL(op)->remat || OP_SYMBOL(op)->ruonly) + return NULL; + + /* only upto 2 bytes since we cannot predict + the usage of b, & acc */ + if (getSize (operandType (op)) > (fReturnSizeMCS51 - 2)) + return NULL; + + if (ic->op != RETURN && + ic->op != SEND && + !POINTER_SET (ic) && + !POINTER_GET (ic)) + return NULL; + + if (ic->op == SEND && ic->argreg != 1) return NULL; + + /* this routine will mark the symbol as used in one + instruction use only && if the definition is local + (ie. within the basic block) && has only one definition && + that definition is either a return value from a + function or does not contain any variables in + far space */ + if (bitVectnBitsOn (OP_USES (op)) > 1) + return NULL; + + /* if it has only one definition */ + if (bitVectnBitsOn (OP_DEFS (op)) > 1) + return NULL; /* has more than one definition */ + + /* get that definition */ + if (!(dic = hTabItemWithKey (iCodehTab, bitVectFirstBit (OP_DEFS (op))))) + return NULL; + + /* if that only usage is a cast */ + if (dic->op == CAST) + { + /* to a bigger type */ + if (getSize(OP_SYM_TYPE(IC_RESULT(dic))) > + getSize(OP_SYM_TYPE(IC_RIGHT(dic)))) + { + /* then we can not, since we cannot predict the usage of b & acc */ + return NULL; + } + } + + /* found the definition now check if it is local */ + if (dic->seq < ebp->fSeq || + dic->seq > ebp->lSeq) + return NULL; /* non-local */ + + /* now check if it is the return from + a function call */ + if (dic->op == CALL || dic->op == PCALL) + { + if (ic->op != SEND && ic->op != RETURN && + !POINTER_SET(ic) && !POINTER_GET(ic)) + { + OP_SYMBOL (op)->ruonly = 1; + return dic; + } + } + else + { + /* otherwise check that the definition does + not contain any symbols in far space */ + if (isOperandInFarSpace (IC_LEFT (dic)) || + isOperandInFarSpace (IC_RIGHT (dic)) || + IS_OP_RUONLY (IC_LEFT (ic)) || + IS_OP_RUONLY (IC_RIGHT (ic))) + { + return NULL; + } + + /* if pointer set then make sure the pointer + is one byte */ + if (POINTER_SET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_RESULT (dic)), FALSE))) + return NULL; + + if (POINTER_GET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_LEFT (dic)), FALSE))) + return NULL; + } + + /* Make sure no overlapping liverange is already assigned to DPTR */ + if (OP_SYMBOL(op)->clashes) + { + symbol *sym; + int i; + + for (i = 0 ; i < OP_SYMBOL(op)->clashes->size ; i++ ) + { + if (bitVectBitValue(OP_SYMBOL(op)->clashes,i)) + { + sym = hTabItemWithKey(liveRanges,i); + if (sym->ruonly) + return NULL ; + } + } + } + + sic = dic; + + /* also make sure the intervening instructions + don't have anything in far space */ + for (dic = dic->next; dic && dic != ic && sic != ic; dic = dic->next) + { + /* if there is an intervening function call then no */ + if (dic->op == CALL || dic->op == PCALL) + return NULL; + /* if pointer set then make sure the pointer + is one byte */ + if (POINTER_SET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_RESULT (dic)), FALSE))) + return NULL; + + if (POINTER_GET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_LEFT (dic)), FALSE))) + return NULL; + + /* if address of & the result is remat the okay */ + if (dic->op == ADDRESS_OF && + OP_SYMBOL (IC_RESULT (dic))->remat) + continue; + + /* if operand has size of three or more & this + operation is a '*','/' or '%' then 'b' may + cause a problem */ + if ((dic->op == '%' || dic->op == '/' || dic->op == '*') && + getSize (operandType (op)) >= 3) + return NULL; + + /* if left or right or result is in far space */ + if (isOperandInFarSpace (IC_LEFT (dic)) || + isOperandInFarSpace (IC_RIGHT (dic)) || + isOperandInFarSpace (IC_RESULT (dic)) || + IS_OP_RUONLY (IC_LEFT (dic)) || + IS_OP_RUONLY (IC_RIGHT (dic)) || + IS_OP_RUONLY (IC_RESULT (dic))) + { + return NULL; + } + /* if left or right or result is on stack */ + if (isOperandOnStack(IC_LEFT(dic)) || + isOperandOnStack(IC_RIGHT(dic)) || + isOperandOnStack(IC_RESULT(dic))) + { + return NULL; + } + } + + OP_SYMBOL (op)->ruonly = 1; + return sic; +} + +/*-----------------------------------------------------------------*/ +/* isBitwiseOptimizable - requirements of JEAN LOUIS VERN */ +/*-----------------------------------------------------------------*/ +static bool +isBitwiseOptimizable (iCode * ic) +{ + sym_link *ltype = getSpec (operandType (IC_LEFT (ic))); + sym_link *rtype = getSpec (operandType (IC_RIGHT (ic))); + + /* bitwise operations are considered optimizable + under the following conditions (Jean-Louis VERN) + + x & lit + bit & bit + bit & x + bit ^ bit + bit ^ x + x ^ lit + x | lit + bit | bit + bit | x + */ + if (IS_LITERAL(rtype) || + (IS_BITVAR (ltype) && IN_BITSPACE (SPEC_OCLS (ltype)))) + return TRUE; + else + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* isCommutativeOp - tests whether this op cares what order its */ +/* operands are in */ +/*-----------------------------------------------------------------*/ +bool isCommutativeOp(unsigned int op) +{ + if (op == '+' || op == '*' || op == EQ_OP || + op == '^' || op == '|' || op == BITWISEAND) + return TRUE; + else + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* operandUsesAcc - determines whether the code generated for this */ +/* operand will have to use the accumulator */ +/*-----------------------------------------------------------------*/ +bool operandUsesAcc(operand *op, bool allowBitspace) +{ + if (!op) + return FALSE; + + if (IS_SYMOP(op)) { + symbol *sym = OP_SYMBOL(op); + memmap *symspace; + + if (sym->accuse) + return TRUE; /* duh! */ + + if (IN_STACK(sym->etype) || sym->onStack || + (SPIL_LOC(op) && SPIL_LOC(op)->onStack)) + return TRUE; /* acc is used to calc stack offset */ + + if (IS_ITEMP(op)) + { + if (SPIL_LOC(op)) { + sym = SPIL_LOC(op); /* if spilled, look at spill location */ + } else { + return FALSE; /* more checks? */ + } + } + + symspace = SPEC_OCLS(sym->etype); + + if (sym->iaccess && symspace->paged) + return TRUE; /* must fetch paged indirect sym via accumulator */ + + if (!allowBitspace && IN_BITSPACE(symspace)) + return TRUE; /* fetching bit vars uses the accumulator */ + + if (IN_FARSPACE(symspace) || IN_CODESPACE(symspace)) + return TRUE; /* fetched via accumulator and dptr */ + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* packRegsForAccUse - pack registers for acc use */ +/*-----------------------------------------------------------------*/ +static void +packRegsForAccUse (iCode * ic) +{ + iCode *uic; + + /* if this is an aggregate, e.g. a one byte char array */ + if (IS_AGGREGATE(operandType(IC_RESULT(ic)))) + return; + + /* if we are calling a reentrant function that has stack parameters */ + if (ic->op == CALL && + IFFUNC_ISREENT(operandType(IC_LEFT(ic))) && + FUNC_HASSTACKPARM(operandType(IC_LEFT(ic)))) + return; + + if (ic->op == PCALL && + IFFUNC_ISREENT(operandType(IC_LEFT(ic))->next) && + FUNC_HASSTACKPARM(operandType(IC_LEFT(ic))->next)) + return; + + /* if + or - then it has to be one byte result */ + if ((ic->op == '+' || ic->op == '-') + && getSize (operandType (IC_RESULT (ic))) > 1) + return; + + /* if shift operation make sure right side is not a literal */ + if (ic->op == RIGHT_OP && + (isOperandLiteral (IC_RIGHT (ic)) || + getSize (operandType (IC_RESULT (ic))) > 1)) + return; + + if (ic->op == LEFT_OP && + (isOperandLiteral (IC_RIGHT (ic)) || + getSize (operandType (IC_RESULT (ic))) > 1)) + return; + + if (IS_BITWISE_OP (ic) && + getSize (operandType (IC_RESULT (ic))) > 1) + return; + + /* has only one definition */ + if (bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) > 1) + return; + + /* has only one use */ + if (bitVectnBitsOn (OP_USES (IC_RESULT (ic))) > 1) + return; + + /* and the usage immediately follows this iCode */ + if (!(uic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_USES (IC_RESULT (ic)))))) + return; + + if (ic->next != uic) + return; + + /* if it is a conditional branch then we definitely can */ + if (uic->op == IFX) + goto accuse; + + if (uic->op == JUMPTABLE) + return; + + if (POINTER_SET (uic) && + getSize (aggrToPtr (operandType (IC_RESULT (uic)), FALSE)) > 1) + return; + + /* if the usage is not an assignment + or an arithmetic / bitwise / shift operation then not */ + if (uic->op != '=' && + !IS_ARITHMETIC_OP (uic) && + !IS_BITWISE_OP (uic) && + uic->op != LEFT_OP && + uic->op != RIGHT_OP) + return; + + /* if used in ^ operation then make sure right is not a + literal (WIML: Why is this?) */ + if (uic->op == '^' && isOperandLiteral (IC_RIGHT (uic))) + return; + + /* if shift operation make sure right side is not a literal */ + /* WIML: Why is this? */ + if (uic->op == RIGHT_OP && + (isOperandLiteral (IC_RIGHT (uic)) || + getSize (operandType (IC_RESULT (uic))) > 1)) + return; + if (uic->op == LEFT_OP && + (isOperandLiteral (IC_RIGHT (uic)) || + getSize (operandType (IC_RESULT (uic))) > 1)) + return; + + /* make sure that the result of this icode is not on the + stack, since acc is used to compute stack offset */ +#if 0 + if (IS_TRUE_SYMOP (IC_RESULT (uic)) && + OP_SYMBOL (IC_RESULT (uic))->onStack) + return; +#else + if (isOperandOnStack(IC_RESULT(uic))) + return; +#endif + + /* if the usage has only one operand then we can */ + if (IC_LEFT (uic) == NULL || + IC_RIGHT (uic) == NULL) + goto accuse; + + /* if the other operand uses the accumulator then we cannot */ + if ( (IC_LEFT (uic)->key == IC_RESULT (ic)->key && + operandUsesAcc (IC_RIGHT (uic), IS_BIT (operandType (IC_LEFT (uic))))) || + (IC_RIGHT(uic)->key == IC_RESULT(ic)->key && + operandUsesAcc (IC_LEFT (uic), IS_BIT (operandType (IC_RIGHT (uic))))) ) + return; + + /* make sure this is on the left side if not commutative */ + /* except for '-', which has been written to be able to + handle reversed operands */ + if (!(isCommutativeOp(ic->op) || ic->op == '-') && + IC_LEFT (uic)->key != IC_RESULT (ic)->key) + return; + +#if 0 + // this is too dangerous and need further restrictions + // see bug #447547 + + /* if one of them is a literal then we can */ + if ((IC_LEFT (uic) && IS_OP_LITERAL (IC_LEFT (uic))) || + (IC_RIGHT (uic) && IS_OP_LITERAL (IC_RIGHT (uic)))) + { + OP_SYMBOL (IC_RESULT (ic))->accuse = 1; + return; + } +#endif + +accuse: + OP_SYMBOL (IC_RESULT (ic))->accuse = 1; + +} + +/*-----------------------------------------------------------------*/ +/* packForPush - heuristics to reduce iCode for pushing */ +/*-----------------------------------------------------------------*/ +static void +packForPush (iCode * ic, eBBlock ** ebpp, int blockno) +{ + iCode *dic, *lic; + bitVect *dbv; + struct eBBlock * ebp=ebpp[blockno]; + + if (ic->op != IPUSH || !IS_ITEMP (IC_LEFT (ic))) + return; + + /* must have only definition & one usage */ + if (bitVectnBitsOn (OP_DEFS (IC_LEFT (ic))) != 1 || + bitVectnBitsOn (OP_USES (IC_LEFT (ic))) != 1) + return; + + /* find the definition */ + if (!(dic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_DEFS (IC_LEFT (ic)))))) + return; + + if (dic->op != '=' || POINTER_SET (dic)) + return; + + if (dic->seq < ebp->fSeq) // Evelyn did this + { + int i; + for (i=0; iseq >= ebpp[i]->fSeq && dic->seq <= ebpp[i]->lSeq) + { + ebp=ebpp[i]; + break; + } + } + wassert (i!=blockno); // no way to recover from here + } + + if (IS_SYMOP(IC_RIGHT(dic))) + { + /* make sure the right side does not have any definitions + inbetween */ + dbv = OP_DEFS(IC_RIGHT(dic)); + for (lic = ic; lic && lic != dic ; lic = lic->prev) + { + if (bitVectBitValue(dbv,lic->key)) + return ; + } + /* make sure they have the same type */ + if (IS_SPEC(operandType(IC_LEFT(ic)))) + { + sym_link *itype=operandType(IC_LEFT(ic)); + sym_link *ditype=operandType(IC_RIGHT(dic)); + + if (SPEC_USIGN(itype)!=SPEC_USIGN(ditype) || + SPEC_LONG(itype)!=SPEC_LONG(ditype)) + return; + } + /* extend the live range of replaced operand if needed */ + if (OP_SYMBOL(IC_RIGHT(dic))->liveTo < ic->seq) + { + OP_SYMBOL(IC_RIGHT(dic))->liveTo = ic->seq; + } + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + } + + /* we now we know that it has one & only one def & use + and the that the definition is an assignment */ + ReplaceOpWithCheaperOp(&IC_LEFT (ic), IC_RIGHT (dic)); + remiCodeFromeBBlock (ebp, dic); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); +} + +/*-----------------------------------------------------------------*/ +/* packRegisters - does some transformations to reduce register */ +/* pressure */ +/*-----------------------------------------------------------------*/ +static void +packRegisters (eBBlock ** ebpp, int blockno) +{ + iCode *ic; + int change = 0; + eBBlock *ebp=ebpp[blockno]; + + do + { + change = 0; + + /* look for assignments of the form */ + /* iTempNN = TrueSym (someoperation) SomeOperand */ + /* .... */ + /* TrueSym := iTempNN:1 */ + for (ic = ebp->sch; ic; ic = ic->next) + { + /* find assignment of the form TrueSym := iTempNN:1 */ + if (ic->op == '=' && !POINTER_SET (ic)) + change += packRegsForAssign (ic, ebp); + } + } + while (change); + + for (ic = ebp->sch; ic; ic = ic->next) + { + /* Fix for bug #979599: */ + /* P0 &= ~1; */ + + /* Look for two subsequent iCodes with */ + /* iTemp := _c; */ + /* _c = iTemp & op; */ + /* and replace them by */ + /* iTemp := _c; */ + /* _c = _c & op; */ + if ((ic->op == BITWISEAND || ic->op == '|' || ic->op == '^') && + ic->prev && + ic->prev->op == '=' && + IS_ITEMP (IC_LEFT (ic)) && + IC_LEFT (ic) == IC_RESULT (ic->prev) && + isOperandEqual (IC_RESULT(ic), IC_RIGHT(ic->prev))) + { + iCode* ic_prev = ic->prev; + symbol* prev_result_sym = OP_SYMBOL (IC_RESULT (ic_prev)); + + ReplaceOpWithCheaperOp (&IC_LEFT (ic), IC_RESULT (ic)); + if (IC_RESULT (ic_prev) != IC_RIGHT (ic)) + { + bitVectUnSetBit (OP_USES (IC_RESULT (ic_prev)), ic->key); + if (/*IS_ITEMP (IC_RESULT (ic_prev)) && */ + prev_result_sym->liveTo == ic->seq) + { + prev_result_sym->liveTo = ic_prev->seq; + } + } + bitVectSetBit (OP_USES (IC_RESULT (ic)), ic->key); + + bitVectSetBit (ic->rlive, IC_RESULT (ic)->key); + + if (bitVectIsZero (OP_USES (IC_RESULT (ic_prev)))) + { + bitVectUnSetBit (ic->rlive, IC_RESULT (ic)->key); + bitVectUnSetBit (OP_DEFS (IC_RESULT (ic_prev)), ic_prev->key); + remiCodeFromeBBlock (ebp, ic_prev); + hTabDeleteItem (&iCodehTab, ic_prev->key, ic_prev, DELETE_ITEM, NULL); + } + } + + /* if this is an itemp & result of an address of a true sym + then mark this as rematerialisable */ + if (ic->op == ADDRESS_OF && + IS_ITEMP (IC_RESULT (ic)) && + IS_TRUE_SYMOP (IC_LEFT (ic)) && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1 && + !OP_SYMBOL (IC_LEFT (ic))->onStack) + { + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + } + + /* if straight assignment then carry remat flag if + this is the only definition */ + if (ic->op == '=' && + !POINTER_SET (ic) && + IS_SYMOP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->remat && + !IS_CAST_ICODE(OP_SYMBOL (IC_RIGHT (ic))->rematiCode) && + !isOperandGlobal(IC_RESULT(ic)) && /* due to bug 1618050 */ + bitVectnBitsOn (OP_SYMBOL (IC_RESULT (ic))->defs) <= 1) + { + OP_SYMBOL (IC_RESULT (ic))->remat = + OP_SYMBOL (IC_RIGHT (ic))->remat; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = + OP_SYMBOL (IC_RIGHT (ic))->rematiCode; + } + + /* if cast to a generic pointer & the pointer being + cast is remat, then we can remat this cast as well */ + if (ic->op == CAST && + IS_SYMOP(IC_RIGHT(ic)) && + OP_SYMBOL(IC_RIGHT(ic))->remat && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1) + { + sym_link *to_type = operandType(IC_LEFT(ic)); + sym_link *from_type = operandType(IC_RIGHT(ic)); + if (IS_GENPTR(to_type) && IS_PTR(from_type)) + { + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + } + } + + /* if this is a +/- operation with a rematerizable + then mark this as rematerializable as well */ + if ((ic->op == '+' || ic->op == '-') && + (IS_SYMOP (IC_LEFT (ic)) && + IS_ITEMP (IC_RESULT (ic)) && + IS_OP_LITERAL (IC_RIGHT (ic))) && + OP_SYMBOL (IC_LEFT (ic))->remat && + (!IS_SYMOP (IC_RIGHT (ic)) || !IS_CAST_ICODE(OP_SYMBOL (IC_RIGHT (ic))->rematiCode)) && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1) + { + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + } + + /* mark the pointer usages */ + if (POINTER_SET (ic) && IS_SYMOP (IC_RESULT (ic))) + OP_SYMBOL (IC_RESULT (ic))->uptr = 1; + + if (POINTER_GET (ic) && IS_SYMOP (IC_LEFT (ic))) + OP_SYMBOL (IC_LEFT (ic))->uptr = 1; + + if (!SKIP_IC2 (ic)) + { + /* if we are using a symbol on the stack + then we should say mcs51_ptrRegReq */ + if (options.useXstack && ic->parmPush + && (ic->op == IPUSH || ic->op == IPOP)) + mcs51_ptrRegReq++; + if (ic->op == IFX && IS_SYMOP (IC_COND (ic))) + mcs51_ptrRegReq += ((OP_SYMBOL (IC_COND (ic))->onStack || + OP_SYMBOL (IC_COND (ic))->iaccess || + SPEC_OCLS(OP_SYMBOL (IC_COND (ic))->etype) == idata) ? 1 : 0); + else if (ic->op == JUMPTABLE && IS_SYMOP (IC_JTCOND (ic))) + mcs51_ptrRegReq += ((OP_SYMBOL (IC_JTCOND (ic))->onStack || + OP_SYMBOL (IC_JTCOND (ic))->iaccess || + SPEC_OCLS(OP_SYMBOL (IC_JTCOND (ic))->etype) == idata) ? 1 : 0); + else + { + if (IS_SYMOP (IC_LEFT (ic))) + mcs51_ptrRegReq += ((OP_SYMBOL (IC_LEFT (ic))->onStack || + OP_SYMBOL (IC_LEFT (ic))->iaccess || + SPEC_OCLS(OP_SYMBOL (IC_LEFT (ic))->etype) == idata) ? 1 : 0); + if (IS_SYMOP (IC_RIGHT (ic))) + mcs51_ptrRegReq += ((OP_SYMBOL (IC_RIGHT (ic))->onStack || + OP_SYMBOL (IC_RIGHT (ic))->iaccess || + SPEC_OCLS(OP_SYMBOL (IC_RIGHT (ic))->etype) == idata) ? 1 : 0); + if (IS_SYMOP (IC_RESULT (ic))) + mcs51_ptrRegReq += ((OP_SYMBOL (IC_RESULT (ic))->onStack || + OP_SYMBOL (IC_RESULT (ic))->iaccess || + SPEC_OCLS(OP_SYMBOL (IC_RESULT (ic))->etype) == idata) ? 1 : 0); + if (POINTER_GET (ic) && IS_SYMOP (IC_LEFT (ic)) + && getSize (OP_SYMBOL (IC_LEFT (ic))->type) <= (unsigned int) PTRSIZE) + mcs51_ptrRegReq ++; + if (POINTER_SET (ic) && IS_SYMOP (IC_RESULT (ic)) + && getSize (OP_SYMBOL (IC_RESULT (ic))->type) <= (unsigned int) PTRSIZE) + mcs51_ptrRegReq ++; + } + } + + /* if the condition of an if instruction + is defined in the previous instruction and + this is the only usage then + mark the itemp as a conditional */ + if ((IS_CONDITIONAL (ic) || + (IS_BITWISE_OP(ic) && isBitwiseOptimizable (ic))) && + ic->next && ic->next->op == IFX && + bitVectnBitsOn (OP_USES(IC_RESULT(ic)))==1 && + isOperandEqual (IC_RESULT (ic), IC_COND (ic->next)) && + OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq) + { + OP_SYMBOL (IC_RESULT (ic))->regType = REG_CND; + continue; + } + + /* if the condition of an if instruction + is defined in the previous GET_POINTER instruction and + this is the only usage then + mark the itemp as accumulator use */ + if ((POINTER_GET (ic) && getSize (operandType (IC_RESULT (ic))) <=1) && + ic->next && ic->next->op == IFX && + bitVectnBitsOn (OP_USES(IC_RESULT(ic)))==1 && + isOperandEqual (IC_RESULT (ic), IC_COND (ic->next)) && + OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq) + { + OP_SYMBOL (IC_RESULT (ic))->accuse = 1; + continue; + } + + /* reduce for support function calls */ + if (ic->supportRtn || ic->op == '+' || ic->op == '-') + packRegsForSupport (ic, ebp); + + /* some cases the redundant moves can + can be eliminated for return statements */ + if ((ic->op == RETURN || (ic->op == SEND && ic->argreg == 1)) && + !isOperandInFarSpace (IC_LEFT (ic)) && + options.model == MODEL_SMALL) { + packRegsForOneuse (ic, IC_LEFT (ic), ebp); + } + + /* if pointer set & left has a size more than + one and right is not in far space */ + if (POINTER_SET (ic) && + IS_SYMOP (IC_RESULT (ic)) && + !isOperandInFarSpace (IC_RIGHT (ic)) && + !OP_SYMBOL (IC_RESULT (ic))->remat && + !IS_OP_RUONLY (IC_RIGHT (ic)) && + getSize (aggrToPtr (operandType (IC_RESULT (ic)), FALSE)) > 1) + packRegsForOneuse (ic, IC_RESULT (ic), ebp); + + /* if pointer get */ + if (POINTER_GET (ic) && + IS_SYMOP (IC_LEFT (ic)) && + !isOperandInFarSpace (IC_RESULT (ic)) && + !OP_SYMBOL (IC_LEFT (ic))->remat && + !IS_OP_RUONLY (IC_RESULT (ic)) && + getSize (aggrToPtr (operandType (IC_LEFT (ic)), FALSE)) > 1) + packRegsForOneuse (ic, IC_LEFT (ic), ebp); + + /* if this is a cast for intergral promotion then + check if it's the only use of the definition of the + operand being casted/ if yes then replace + the result of that arithmetic operation with + this result and get rid of the cast */ + if (ic->op == CAST) + { + sym_link *fromType = operandType (IC_RIGHT (ic)); + sym_link *toType = operandType (IC_LEFT (ic)); + + if (IS_INTEGRAL (fromType) && IS_INTEGRAL (toType) && + getSize (fromType) != getSize (toType) && + SPEC_USIGN (fromType) == SPEC_USIGN (toType)) + { + + iCode *dic = packRegsForOneuse (ic, IC_RIGHT (ic), ebp); + if (dic) + { + if (IS_ARITHMETIC_OP (dic)) + { + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + ReplaceOpWithCheaperOp(&IC_RESULT (dic), IC_RESULT (ic)); + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS(IC_RESULT (dic))=bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + ic = ic->prev; + } + else + OP_SYMBOL (IC_RIGHT (ic))->ruonly = 0; + } + } + else + { + /* if the type from and type to are the same + then if this is the only use then packit */ + if (compareType (operandType (IC_RIGHT (ic)), + operandType (IC_LEFT (ic))) == 1) + { + iCode *dic = packRegsForOneuse (ic, IC_RIGHT (ic), ebp); + if (dic) + { + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + ReplaceOpWithCheaperOp(&IC_RESULT (dic), IC_RESULT (ic)); + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS(IC_RESULT (dic))=bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + ic = ic->prev; + } + } + } + } + + /* pack for PUSH + iTempNN := (some variable in farspace) V1 + push iTempNN ; + ------------- + push V1 + */ + if (ic->op == IPUSH) + { + packForPush (ic, ebpp, blockno); + } + + /* pack registers for accumulator use, when the + result of an arithmetic or bit wise operation + has only one use, that use is immediately following + the definition and the using iCode has only one + operand or has two operands but one is literal & + the result of that operation is not on stack then + we can leave the result of this operation in acc:b + combination */ + if ((IS_ARITHMETIC_OP (ic) + || IS_CONDITIONAL(ic) + || IS_BITWISE_OP (ic) + || ic->op == LEFT_OP || ic->op == RIGHT_OP || ic->op == CALL + || (ic->op == ADDRESS_OF && isOperandOnStack (IC_LEFT (ic))) + ) && + IS_ITEMP (IC_RESULT (ic)) && + getSize (operandType (IC_RESULT (ic))) <= 2) + { + packRegsForAccUse (ic); + } + } +} + +/*-----------------------------------------------------------------*/ +/* assignRegisters - assigns registers to each live range as need */ +/*-----------------------------------------------------------------*/ +void +mcs51_assignRegisters (ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->bbOrder; + int count = ebbi->count; + iCode *ic; + int i; + + setToNull ((void *) &_G.funcrUsed); + setToNull ((void *) &_G.regAssigned); + setToNull ((void *) &_G.totRegAssigned); + mcs51_ptrRegReq = _G.stackExtend = _G.dataExtend = 0; + if ((currFunc && IFFUNC_ISREENT (currFunc->type)) || options.stackAuto) + { + mcs51_nRegs = 16; + } + else + { + mcs51_nRegs = 8; + } + _G.allBitregs = findAllBitregs (); + + /* change assignments this will remove some + live ranges reducing some register pressure */ + + for (i = 0; i < count; i++) + packRegisters (ebbs, i); + + /* liveranges probably changed by register packing + so we compute them again */ + recomputeLiveRanges (ebbs, count); + + if (options.dump_pack) + dumpEbbsToFileExt (DUMP_PACK, ebbi); + + /* first determine for each live range the number of + registers & the type of registers required for each */ + regTypeNum (*ebbs); + + /* and serially allocate registers */ + serialRegAssign (ebbs, count); + + freeAllRegs (); + //setToNull ((void *) &_G.regAssigned); + //setToNull ((void *) &_G.totRegAssigned); + fillGaps(); + + /* if stack was extended then tell the user */ + if (_G.stackExtend) + { +/* werror(W_TOOMANY_SPILS,"stack", */ +/* _G.stackExtend,currFunc->name,""); */ + _G.stackExtend = 0; + } + + if (_G.dataExtend) + { +/* werror(W_TOOMANY_SPILS,"data space", */ +/* _G.dataExtend,currFunc->name,""); */ + _G.dataExtend = 0; + } + + /* after that create the register mask + for each of the instruction */ + createRegMask (ebbs, count); + + /* redo that offsets for stacked automatic variables */ + if (currFunc) { + redoStackOffsets (); + } + + /* make sure r0 & r1 are flagged as used if they might be used */ + /* as pointers */ + if (currFunc && mcs51_ptrRegReq) + { + currFunc->regsUsed = bitVectSetBit (currFunc->regsUsed, R0_IDX); + currFunc->regsUsed = bitVectSetBit (currFunc->regsUsed, R1_IDX); + } + + if (options.dump_rassgn) + { + dumpEbbsToFileExt (DUMP_RASSGN, ebbi); + dumpLiveRanges (DUMP_LRANGE, liveRanges); + } + + /* do the overlaysegment stuff SDCCmem.c */ + doOverlays (ebbs, count); + + /* now get back the chain */ + ic = iCodeLabelOptimize (iCodeFromeBBlock (ebbs, count)); + + gen51Code (ic); + + /* free up any _G.stackSpil locations allocated */ + applyToSet (_G.stackSpil, deallocStackSpil); + _G.slocNum = 0; + setToNull ((void *) &_G.stackSpil); + setToNull ((void *) &_G.spiltSet); + /* mark all registers as free */ + freeAllRegs (); + + return; +} diff --git a/src/mcs51/ralloc.h b/src/mcs51/ralloc.h new file mode 100644 index 0000000..9d851a8 --- /dev/null +++ b/src/mcs51/ralloc.h @@ -0,0 +1,74 @@ +/*------------------------------------------------------------------------- + + SDCCralloc.h - header file register allocation + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "SDCCicode.h" +#include "SDCCBBlock.h" +#ifndef SDCCRALLOC_H +#define SDCCRALLOC_H 1 + +enum + { + R2_IDX = 0, R3_IDX, R4_IDX, R5_IDX, + R6_IDX, R7_IDX, R0_IDX, R1_IDX, + B0_IDX, B1_IDX, B2_IDX, B3_IDX, + B4_IDX, B5_IDX, B6_IDX, B7_IDX, + X8_IDX, X9_IDX, X10_IDX, X11_IDX, + X12_IDX, CND_IDX, + DPL_IDX, DPH_IDX, B_IDX, A_IDX, + END_IDX + }; + + +#define REG_PTR 0x01 +#define REG_GPR 0x02 +#define REG_CND 0x04 +#define REG_BIT 0x08 +/* definition for the registers */ +typedef struct regs + { + short type; /* can have value + REG_GPR, REG_PTR or REG_CND */ + short rIdx; /* index into register table */ + short otype; + char *name; /* name */ + char *dname; /* name when direct access needed */ + char *base; /* base address */ + short offset; /* offset from the base */ + unsigned isFree:1; /* is currently unassigned */ + unsigned valueKnown:1; /* from rtrack.c */ + unsigned char value; /* from rtrack.c only valid when valueKnown is set */ + + } +regs; +extern regs regs8051[]; + +regs *mcs51_regWithIdx (int); + +bitVect *mcs51_rUmaskForOp (operand * op); +bitVect *mcs51_allBitregs (void); + +extern int mcs51_ptrRegReq; +extern int mcs51_nRegs; + +#endif diff --git a/src/mcs51/rtrack.c b/src/mcs51/rtrack.c new file mode 100644 index 0000000..2d0212d --- /dev/null +++ b/src/mcs51/rtrack.c @@ -0,0 +1,686 @@ +/*------------------------------------------------------------------------- + rtrack.c - tracking content of registers on an mcs51 + + Copyright 2007 Frieder Ferlemann (Frieder Ferlemann AT web.de) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +-------------------------------------------------------------------------*/ + +/*------------------------------------------------------------------------- + Status: + - passes regression test suite, still bugs are likely + - only active if environment variable SDCC_RTRACK is set + + Missed opportunities: + - does not track symbols as in "mov a,#_my_int" or "mov a,#(_my_int+1)" + - only used with moves to acc so chances to use: "inc dptr", + "inc r2", "add a,r2" or "mov r2,a" would not be detected) + - a label causes loss of tracking (no handling of information of blocks + known to follow/preceed the current block) + - not used in aopGet or genRet + - does not track which registers are known to be unchanged within + a function (would not have to be saved when calling the function) +-------------------------------------------------------------------------*/ + + +#include +#include +#include "SDCCglobl.h" + +#include "common.h" +#include "ralloc.h" +#include "gen.h" + +#define DEBUG(x) +//#define DEBUG(x) x + +#define D(x) do if (options.verboseAsm) {x;} while(0) + +#define REGS8051_SET(idx,val) do{ \ + regs8051[idx].value = (val) & 0xff; \ + regs8051[idx].valueKnown = 1; \ + DEBUG(printf("%s:0x%02x\n",regs8051[idx].name, \ + regs8051[idx].value);) \ + } while(0) + +#define REGS8051_UNSET(idx) do{ \ + regs8051[idx].valueKnown = 0; \ + DEBUG(printf("%s:*\n",regs8051[idx].name);) \ + } while(0) + +/* r0..r7 are not in numerical order in struct regs: r2..r7,r0,r1 */ +#define Rx_NUM_TO_IDX(num) (R2_IDX+((num-2)&0x07)) + + +/* move this (or rtrackGetLit() and rtrackMoveALit() + elsewhere? stealing emitcode from gen.c */ +void emitcode (const char *inst, const char *fmt,...); + + +static int enable = -1; + +/* +static void dumpAll() +{ + unsigned int i; + unsigned int nl=0; + + for (i=0; ivalueKnown) + { + REGS8051_SET (A_IDX, r->value); + return; + } + REGS8051_UNSET (A_IDX); + return; + } + + if (!strncmp (line,"mov\ta",5)) + { + REGS8051_UNSET (A_IDX); + return; + } + + if (!strncmp (line,"movc\ta",6) || + !strncmp (line,"movx\ta",6)) + { + REGS8051_UNSET (A_IDX); + return; + } + + /* move direct to symbol, do not care */ + if (!strncmp (line,"mov\t_",5) || + !strncmp (line,"mov\t(_",6)) + return; + + /* check literal mov to register */ + if (!strncmp (line,"mov\tr",5)) + { + char *s; + int value; + int regNum; + + regNum = strtol (line+5, &s, 16); + if (s == line+6) + { + value = strtol (line+8, &s, 16); + if ((s != line+8) && !strncmp (line+6,",#0x",4)) + REGS8051_SET (Rx_NUM_TO_IDX(regNum), value); + else + REGS8051_UNSET (Rx_NUM_TO_IDX(regNum)); + return; + } + } + + /* mov to psw can change register bank */ + if (!strncmp (line,"mov\tpsw,",8)) + { + invalidateAllRx(); + return; + } + + /* no tracking of these, so we do not care */ + if (!strncmp (line,"mov\tdptr,#",10) || + !strncmp (line,"mov\tdpl,",8) || + !strncmp (line,"mov\tdph,",8) || + !strncmp (line,"mov\tsp,",7) || + !strncmp (line,"mov\tb,",6)) + return; + + /* mov to xdata memory does not change registers */ + if (!strncmp (line,"movx\t@",6)) + return; + + if (!strncmp (line,"mov\t@",5)) + { + invalidateAllRx(); + return; + } + } + + /* no tracking of SP */ + if (!strncmp (line,"push",4)) + return; + + if (!strncmp (line,"pop\ta",5)) + { + if (!strncmp (line+4,"acc",3)){ REGS8051_UNSET (A_IDX); return; } + if (!strncmp (line+4,"ar2",3)){ REGS8051_UNSET (Rx_NUM_TO_IDX (2)); return; } + if (!strncmp (line+4,"ar3",3)){ REGS8051_UNSET (Rx_NUM_TO_IDX (3)); return; } + if (!strncmp (line+4,"ar4",3)){ REGS8051_UNSET (Rx_NUM_TO_IDX (4)); return; } + if (!strncmp (line+4,"ar5",3)){ REGS8051_UNSET (Rx_NUM_TO_IDX (5)); return; } + if (!strncmp (line+4,"ar6",3)){ REGS8051_UNSET (Rx_NUM_TO_IDX (6)); return; } + if (!strncmp (line+4,"ar7",3)){ REGS8051_UNSET (Rx_NUM_TO_IDX (7)); return; } + if (!strncmp (line+4,"ar0",3)){ REGS8051_UNSET (Rx_NUM_TO_IDX (0)); return; } + if (!strncmp (line+4,"ar1",3)){ REGS8051_UNSET (Rx_NUM_TO_IDX (1)); return; } + } + + if (!strncmp (line,"inc",3)) + { + /* no tracking of dptr, ignore */ + if (!strcmp (line,"inc\tdptr") || + !strcmp (line,"inc\tdph") || + !strcmp (line,"inc\tdpl")) + return; + + if (!strcmp (line,"inc\ta")) + { + if (regs8051[A_IDX].valueKnown) + REGS8051_SET (A_IDX, regs8051[A_IDX].value+1); + return; + } + + if(!strncmp (line,"inc\tr",5)) + { + regs *r = getReg(line+5); + if (r && r->valueKnown) + { + REGS8051_SET (r->rIdx, r->value+1); + } + return; + } + } + + /* some bit in acc is cleared + MB: I'm too lazy to find out which right now */ + if (!strncmp (line,"jbc\tacc",7)) + { + REGS8051_UNSET (A_IDX); + return; + } + + /* unfortunately the label typically following these + will cause loss of tracking */ + if (!strncmp (line,"jc\t",3) || + !strncmp (line,"jnc\t",4) || + !strncmp (line,"jb\t",3) || + !strncmp (line,"jnb\t",4) || + !strncmp (line,"jbc\t",4)) + return; + + /* if branch not taken in "cjne r2,#0x08,somewhere" + r2 is known to be 8 */ + if (!strncmp (line,"cjne",4)) + { + if(!strncmp (line,"cjne\ta,#0x",10)) + { + char *s; + int value; + + value = strtol (line+8, &s, 16); + if (s != line+8) + REGS8051_SET (A_IDX, value); /* valid hex found */ + } + if(!strncmp (line,"cjne\tr",6)) + { + char *s; + int value; + regs *r = getReg(line+6); + value = strtol (line+8, &s, 16); + if (r && s != line+8) + REGS8051_SET (r->rIdx, value); /* valid hex found */ + } + return; + } + + /* acc eventually known to be zero */ + if (!strncmp (line,"jz\t",3)) + return; + + /* acc eventually known to be zero */ + if (!strncmp (line,"jnz\t",4)) + { + REGS8051_SET (A_IDX, 0x00); // branch not taken + return; + } + + if (!strncmp (line,"djnz\tr",6)) + { + char *s; + int regNum; + + regNum = strtol (line+6, &s, 16); + if (s == line+7) + { + //REGS8051_UNSET (Rx_NUM_TO_IDX(regNum)); + REGS8051_SET (Rx_NUM_TO_IDX(regNum), 0x00); // branch not taken + return; + } + } + + /* only carry bit, so we do not care */ + if (!strncmp (line,"setb\tc",6) || + !strncmp (line,"clr\tc",5) || + !strncmp (line,"cpl\tc",5)) + return; + + if (!strncmp (line,"add\ta,",6) || + !strncmp (line,"addc\ta,",7)|| + !strncmp (line,"subb\ta,",7)|| + !strncmp (line,"xrl\ta,",6) || + !strncmp (line,"orl\ta,",6) || + !strncmp (line,"anl\ta,",6) || + !strncmp (line,"da\ta",4) || + !strncmp (line,"rlc\ta,",6) || + !strncmp (line,"rrc\ta,",6) || + !strncmp (line,"setb\ta",6) || + !strncmp (line,"clrb\ta,",7)|| + !strncmp (line,"cpl\tacc",7)) + { + /* could also handle f.e. "add a,Rx" if a, Rx are known or "xrl a,#0x08" */ + REGS8051_UNSET (A_IDX); + return; + } + + + if (!strncmp (line,"dec",3)) + { + /* no tracking of dptr, so we would not care */ + if (!strcmp (line,"dec\tdph") || + !strcmp (line,"dec\tdpl")) + return; + + if (!strcmp (line,"dec\ta")) + { + if (regs8051[A_IDX].valueKnown) + REGS8051_SET (A_IDX, regs8051[A_IDX].value-1); + return; + } + + if(!strncmp (line,"dec\tr",5)) + { + regs *r = getReg(line+5); + if (r && r->valueKnown) + { + REGS8051_SET (r->rIdx, r->value-1); + } + return; + } + } + + + if (!strcmp (line,"clr\ta")) + { + REGS8051_SET (A_IDX, 0); + return; + } + + if (!strcmp (line,"cpl\ta")) + { + if (regs8051[A_IDX].valueKnown) + REGS8051_SET (A_IDX, ~regs8051[A_IDX].value); + return; + } + if (!strcmp (line,"rl\ta")) + { + if (regs8051[A_IDX].valueKnown) + REGS8051_SET (A_IDX, (regs8051[A_IDX].value<<1) | + (regs8051[A_IDX].value>>7) ); + return; + } + if (!strcmp (line,"rr\ta")) + { + if (regs8051[A_IDX].valueKnown) + REGS8051_SET (A_IDX, (regs8051[A_IDX].value>>1) | + (regs8051[A_IDX].value<<7)); + return; + } + if (!strcmp (line,"swap\ta")) + { + if (regs8051[A_IDX].valueKnown) + REGS8051_SET (A_IDX, (regs8051[A_IDX].value>>4) | + (regs8051[A_IDX].value<<4)); + return; + } + + if (!strncmp (line,"mul",3) || + !strncmp (line,"div",3) + ) + { + REGS8051_UNSET (A_IDX); + REGS8051_UNSET (B_IDX); + return; + } + + /* assuming these library functions have no side-effects */ + if (!strcmp (line,"lcall")) + { + if (!strcmp (line,"lcall\t__gptrput")) + { + /* invalidate R0..R7 because they might have been changed */ + /* MB: too paranoid ? */ + //invalidateAllRx(); + return; + } + if (!strcmp (line,"lcall\t__gptrget")) + { + REGS8051_UNSET (A_IDX); + return; + } + if (!strcmp (line,"lcall\t__decdptr")) + { + return; + } + } + + if (!strncmp (line,"xch\ta,r",7)) + { + /* handle xch acc with Rn */ + regs *r = getReg(line+7); + if (r) + { + unsigned swap; + swap = r->valueKnown; + r->valueKnown = regs8051[A_IDX].valueKnown; + regs8051[A_IDX].valueKnown = swap; + + swap = r->value; + r->value = regs8051[A_IDX].value; + regs8051[A_IDX].value = swap; + return; + } + } + + /* all others unrecognized, invalidate */ + invalidateAll(); +} + + +/* expects f.e. "#0x01" and returns either "#0x01" + if the value is not known to be within registers + or "a" or "r0".."r7". + (mov a,r7 or add a,r7 need one byte whereas + mov a,#0x01 or add a,#0x01 would take two + */ +char * rtrackGetLit(const char *x) +{ + unsigned int i; + + char *s; + + if (enable != 1) + return (char *)x; + + /* was it a numerical literal? */ + if (*x == '#') + { + int val = strtol (x+1, &s, 16); + if (x+1 != s) + { + /* try to get from acc */ + regs *r = ®s8051[A_IDX]; + if (r->valueKnown && + r->value == val) + { + D(emitcode (";", "genFromRTrack 0x%02x=%s", val, r->name)); + return r->name; + } + /* try to get from register R0..R7 */ + for (i=0; i<8; i++) + { + regs *r = ®s8051[Rx_NUM_TO_IDX(i)]; + if (r->valueKnown && + r->value == val) + { + D(emitcode (";", "genFromRTrack 0x%02x=%s", val, r->name)); + return r->name; + } + } + } + else + { + /* probably a symbolic literal as in "mov r3,#(_i+1)", + not handled... */ + } + } + + return (char *)x; +} + +/* Similar to the above function + As the destination is the accumulator try harder yet and + try to generate the result with arithmetic operations */ +int rtrackMoveALit (const char *x) +{ + + if (enable != 1) + return 0; + + /* if it is a literal mov try to get it cheaper */ + if ( *x == '#' ) + { + regs *a = ®s8051[A_IDX]; + + char *s; + int val = strtol (x+1, &s, 16); + + /* was it a numerical literal? */ + if (x+1 != s) + { + /* prefer mov a,#0x00 */ + if (val == 0 && + ((a->valueKnown && a->value != 0) || + !a->valueKnown)) + { + /* peepholes convert to clr a */ + /* MB: why not here ? */ + emitcode ("mov", "a,#0x00"); + return 1; + } + + if (a->valueKnown) + { + /* already there? */ + if (val == a->value) + { + D(emitcode (";", "genFromRTrack acc=0x%02x", a->value)); + return 1; + } + + /* can be calculated with an instruction + that does not change flags from acc itself? */ + if (val == ((a->value+1) & 0xff) ) + { + D(emitcode (";", "genFromRTrack 0x%02x=0x%02x+1", val, a->value)); + emitcode ("inc", "a"); + return 1; + } + if (val == ((a->value-1) & 0xff) ) + { + D(emitcode (";", "genFromRTrack 0x%02x=0x%02x-1", val, a->value)); + emitcode ("dec", "a"); + return 1; + } + if (val == ((~a->value) & 0xff) ) + { + D(emitcode (";", "genFromRTrack 0x%02x=~0x%02x", val, a->value)); + emitcode ("cpl", "a"); + return 1; + } + if (val == (((a->value>>1) | + (a->value<<7)) & 0xff)) + { + D(emitcode (";", "genFromRTrack 0x%02x=rr(0x%02x)", val, a->value)); + emitcode ("rr", "a"); + return 1; + } + if (val == (((a->value<<1) | + (a->value>>7)) & 0xff )) + { + D(emitcode (";", "genFromRTrack 0x%02x=rl(0x%02x)", val, a->value)); + emitcode ("rl", "a"); + return 1; + } + if (val == ( ((a->value & 0x0f)<<4) | + ((a->value & 0xf0)>>4) )) + { + D(emitcode (";", "genFromRTrack 0x%02x=swap(0x%02x)", val, a->value)); + emitcode ("swap", "a"); + return 1; + } + /* Decimal Adjust Accumulator (da a) changes flags so not used */ + } + + + { + unsigned int i; + char *ptr= rtrackGetLit(x); + + if (x != ptr) + { + /* could get from register, fine */ + emitcode ("mov", "a,%s", ptr); + return 1; + } + + /* not yet giving up - try to calculate from register R0..R7 */ + for (i=0; i<8; i++) + { + regs *r = ®s8051[Rx_NUM_TO_IDX(i)]; + + if (a->valueKnown && r->valueKnown) + { + /* calculate with a single byte instruction from R0..R7? */ + if (val == (a->value | r->value)) + { + D(emitcode (";", "genFromRTrack 0x%02x=0x%02x|0x%02x", + val, a->value, r->value)); + emitcode ("orl", "a,%s",r->name); + return 1; + } + if (val == (a->value & r->value)) + { + D(emitcode (";", "genFromRTrack 0x%02x=0x%02x&0x%02x", + val, a->value, r->value)); + emitcode ("anl", "a,%s", r->name); + return 1; + } + if (val == (a->value ^ r->value)) + { + D(emitcode (";", "genFromRTrack 0x%02x=0x%02x^0x%02x", + val, a->value, r->value)); + emitcode ("xrl", "a,%s", r->name); + return 1; + } + /* changes flags (does that matter?) + if (val == (a->value + r->value)) + { + D(emitcode (";", "genFromRTrack 0x%02x=0x%02x+%0x02x", + val, a->value, r->value)); + emitcode ("add", "a,%s",r->name); + return 1; + } + so not used */ + } + } + } + } + } + + return 0; +} + diff --git a/src/mcs51/rtrack.h b/src/mcs51/rtrack.h new file mode 100644 index 0000000..8a329d6 --- /dev/null +++ b/src/mcs51/rtrack.h @@ -0,0 +1,25 @@ +/*------------------------------------------------------------------------- + rtrack.h - header file for tracking content of registers on an mcs51 + + Copyright 2007 Frieder Ferlemann (Frieder Ferlemann AT web.de) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +-------------------------------------------------------------------------*/ + +void rtrackUpdate (const char *line); + +char * rtrackGetLit(const char *x); + +int rtrackMoveALit (const char *x); diff --git a/src/pic/Makefile.bcc b/src/pic/Makefile.bcc new file mode 100644 index 0000000..ca21fa6 --- /dev/null +++ b/src/pic/Makefile.bcc @@ -0,0 +1,23 @@ +# Makefile for Borlad C++ + +PRJDIR = ../.. + +OBJ = device.obj gen.obj genarith.obj ralloc.obj main.obj glue.obj pcode.obj pcodeflow.obj pcodepeep.obj pcoderegs.obj +LIB = port.lib + +!include $(PRJDIR)/Bcc.inc +CFLAGS = $(CFLAGS) -I.. -I$(PRJDIR) + +all: $(LIB) + +main.obj: main.c peeph.rul + +$(LIB): $(OBJ) + if exist $(LIB) del $(LIB) + tlib $@ @&&! ++$(**: = &^ ++) +! + +.def.rul: + gawk -f ../SDCCpeeph.awk $< > $@ diff --git a/src/pic/Makefile.in b/src/pic/Makefile.in new file mode 100644 index 0000000..8f8d493 --- /dev/null +++ b/src/pic/Makefile.in @@ -0,0 +1,9 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +# Make all in this directory +PORT = pic + +include $(srcdir)/../port.mk diff --git a/src/pic/device.c b/src/pic/device.c new file mode 100644 index 0000000..ffb95d0 --- /dev/null +++ b/src/pic/device.c @@ -0,0 +1,802 @@ +/*------------------------------------------------------------------------- + + device.c - Accomodates subtle variations in PIC devices + Written By - Scott Dattalo scott@dattalo.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +-------------------------------------------------------------------------*/ + +#include "device.h" + +/* + * Imports + */ +extern set *includeDirsSet; +extern set *userIncDirsSet; +extern set *libDirsSet; +extern set *libPathsSet; + +#define MAX_PICLIST 200 +static PIC_device *Pics[MAX_PICLIST]; +static PIC_device *pic = NULL; +static int num_of_supported_PICS = 0; +static int maxRAMaddress = 0; + +#define CONFIG_WORD_ADDRESS 0x2007 +#define CONFIG2_WORD_ADDRESS 0x2008 +#define DEFAULT_CONFIG_WORD 0x3fff +#define DEFAULT_CONFIG2_WORD 0x3ffc + +#define DEVICE_FILE_NAME "pic14devices.txt" +#define PIC14_STRING_LEN 256 +#define SPLIT_WORDS_MAX 16 + +/* Keep track of whether we found an assignment to the __config words. */ +static int pic14_hasSetConfigWord = 0; +static unsigned int config_word = DEFAULT_CONFIG_WORD; +static unsigned int config2_word = DEFAULT_CONFIG2_WORD; +static memRange *rangeRAM = NULL; + + +/* parse a value from the configuration file */ +static int +parse_config_value (char *str) +{ + if (str[strlen (str) - 1] == 'K') + return atoi (str) * 1024; /* like "1K" */ + + else if (STRNCASECMP (str, "0x", 2) == 0) + return strtol (str+2, NULL, 16); /* like "0x400" */ + + else + return atoi (str); /* like "1024" */ +} + + +/* split a line into words */ +static int +split_words (char **result_word, char *str) +{ + static const char delim[] = " \f\n\r\t\v,"; + char *token; + int num_words; + + /* release previously allocated words */ + for (num_words = 0; num_words < SPLIT_WORDS_MAX; num_words++) + { + if (result_word[num_words]) + { + free (result_word[num_words]); + result_word[num_words] = NULL; + } // if + } // for + + /* split line */ + token = strtok (str, delim); + num_words = 0; + while (token && (num_words < SPLIT_WORDS_MAX)) + { + result_word[num_words] = Safe_strdup (token); + num_words++; + token = strtok (NULL, delim); + } // while + + return num_words; +} + + +/* remove annoying prefixes from the processor name */ +static char * +sanitise_processor_name (char *name) +{ + char *proc_pos = name; + + if (name == NULL) + return NULL; + + if (STRNCASECMP (proc_pos, "pic", 3) == 0) + proc_pos += 3; + + else if (tolower (*proc_pos) == 'p') + proc_pos += 1; + + return proc_pos; +} + + +/* create a structure for a pic processor */ +static PIC_device * +create_pic (char *pic_name, int maxram, int bankmsk, int confsiz, + int program, int data, int eeprom, int io) +{ + PIC_device *new_pic; + char *simple_pic_name = sanitise_processor_name (pic_name); + + new_pic = Safe_calloc (1, sizeof (PIC_device)); + new_pic->name = Safe_strdup (simple_pic_name); + + new_pic->defMaxRAMaddrs = maxram; + new_pic->bankMask = bankmsk; + new_pic->hasSecondConfigReg = confsiz > 1; + + new_pic->programMemSize = program; + new_pic->dataMemSize = data; + new_pic->eepromMemSize = eeprom; + new_pic->ioPins = io; + + new_pic->ram = rangeRAM; + + Pics[num_of_supported_PICS] = new_pic; + num_of_supported_PICS++; + + return new_pic; +} + + +/* mark some registers as being duplicated across banks */ +static void +register_map (int num_words, char **word) +{ + memRange *r; + int pcount; + + if (num_words < 3) + { + fprintf (stderr, "WARNING: not enough values in %s regmap directive\n", + DEVICE_FILE_NAME); + return; + } // if + + for (pcount = 2; pcount < num_words; pcount++) + { + r = Safe_calloc (1, sizeof (memRange)); + + r->start_address = parse_config_value (word[pcount]); + r->end_address = parse_config_value (word[pcount]); + r->alias = parse_config_value (word[1]); + r->bank = (r->start_address >> 7) & 3; + // add memRange to device entry for future lookup (sharebanks) + r->next = rangeRAM; + rangeRAM = r; + } // for +} + + +/* define ram areas - may be duplicated across banks */ +static void +ram_map (int num_words, char **word) +{ + memRange *r; + + if (num_words < 4) + { + fprintf (stderr, "WARNING: not enough values in %s memmap directive\n", + DEVICE_FILE_NAME); + return; + } // if + + r = Safe_calloc (1, sizeof (memRange)); + //fprintf (stderr, "%s: %s %s %s\n", __FUNCTION__, word[1], word[2], word[3]); + + r->start_address = parse_config_value (word[1]); + r->end_address = parse_config_value (word[2]); + r->alias = parse_config_value (word[3]); + r->bank = (r->start_address >> 7) & 3; + + // add memRange to device entry for future lookup (sharebanks) + r->next = rangeRAM; + rangeRAM = r; +} + +static void +setMaxRAM (int size) +{ + maxRAMaddress = size; + + if (maxRAMaddress < 0) + { + fprintf (stderr, "invalid maxram 0x%x setting in %s\n", + maxRAMaddress, DEVICE_FILE_NAME); + return; + } // if +} + +/* read the file with all the pic14 definitions and pick out the definition + * for a processor if specified. if pic_name is NULL reads everything */ +static PIC_device * +find_device (char *pic_name) +{ + FILE *pic_file; + char pic_buf[PIC14_STRING_LEN]; + int found_processor = FALSE; + int done = FALSE; + char **processor_name; + int num_processor_names = 0; + int pic_maxram = 0; + int pic_bankmsk = 0; + int pic_confsiz = 0; + int pic_program = 0; + int pic_data = 0; + int pic_eeprom = 0; + int pic_io = 0; + char *simple_pic_name; + char *dir; + char filename[512]; + int len = 512; + char **pic_word; + int num_pic_words; + int wcount; + + pic_word = Safe_calloc (sizeof (char *), SPLIT_WORDS_MAX); + processor_name = Safe_calloc (sizeof (char *), SPLIT_WORDS_MAX); + + /* allow abbreviations of the form "f877" - convert to "16f877" */ + simple_pic_name = sanitise_processor_name (pic_name); + num_of_supported_PICS = 0; + + /* open the piclist file */ + /* first scan all include directories */ + pic_file = NULL; + //fprintf (stderr, "%s: searching %s\n", __FUNCTION__, DEVICE_FILE_NAME); + for (dir = setFirstItem (userIncDirsSet); + !pic_file && dir; + dir = setNextItem (userIncDirsSet)) + { + //fprintf (stderr, "searching1 %s\n", dir); + SNPRINTF (&filename[0], len, "%s%s", dir, + DIR_SEPARATOR_STRING DEVICE_FILE_NAME); + pic_file = fopen (filename, "rt"); + if (pic_file) break; + } // for + + for (dir = setFirstItem (includeDirsSet); + !pic_file && dir; + dir = setNextItem (includeDirsSet)) + { + //fprintf (stderr, "searching2 %s\n", dir); + SNPRINTF (&filename[0], len, "%s%s", dir, + DIR_SEPARATOR_STRING DEVICE_FILE_NAME); + pic_file = fopen (filename, "rt"); + if (pic_file) break; + } // for + + for (dir = setFirstItem (libDirsSet); + !pic_file && dir; + dir = setNextItem (libDirsSet)) + { + //fprintf (stderr, "searching3 %s\n", dir); + SNPRINTF (&filename[0], len, "%s%s", dir, + DIR_SEPARATOR_STRING DEVICE_FILE_NAME); + pic_file = fopen (filename, "rt"); + if (pic_file) break; + } // for + + for (dir = setFirstItem (libPathsSet); + !pic_file && dir; + dir = setNextItem (libPathsSet)) + { + //fprintf (stderr, "searching4 %s\n", dir); + SNPRINTF (&filename[0], len, "%s%s", dir, + DIR_SEPARATOR_STRING DEVICE_FILE_NAME); + pic_file = fopen (filename, "rt"); + if (pic_file) break; + } // for + + if (!pic_file) + { + SNPRINTF (&filename[0], len, "%s", + DATADIR LIB_DIR_SUFFIX + DIR_SEPARATOR_STRING "pic" + DIR_SEPARATOR_STRING DEVICE_FILE_NAME); + pic_file = fopen (filename, "rt"); + } // if + + if (pic_file == NULL) + { + fprintf (stderr, "can't find %s\n", DEVICE_FILE_NAME); + return NULL; + } // if + + if (options.verbose) + printf ("Using devices from %s.\n", filename); + + /* read line by line */ + pic_buf[sizeof (pic_buf)-1] = '\0'; + while (fgets (pic_buf, sizeof (pic_buf)-1, pic_file) != NULL && !done) + { + /* strip comments */ + { + char *comment = strchr (pic_buf, '#'); + if (comment) + *comment = 0; + } + + /* split into fields */ + num_pic_words = split_words (pic_word, pic_buf); + + /* ignore comment / empty lines */ + if (num_pic_words > 0) + { + + if (STRCASECMP (pic_word[0], "processor") == 0) + { + if (pic_name == NULL) + { + int dcount; + + /* this is the mode where we read all the processors in - store the names for now */ + if (num_processor_names > 0) + { + /* store away all the previous processor definitions */ + for (dcount = 1; dcount < num_processor_names; dcount++) + { + create_pic (processor_name[dcount], pic_maxram, + pic_bankmsk, pic_confsiz, pic_program, + pic_data, pic_eeprom, pic_io); + } // for + } // if + + /* copy processor names */ + num_processor_names = num_pic_words; + for (dcount = 1; dcount < num_processor_names; dcount++) + { + processor_name[dcount] = pic_word[dcount]; + pic_word[dcount] = NULL; + } // for + } // if + else + { + /* if we've just completed reading a processor definition stop now */ + if (found_processor) + done = TRUE; + else + { + /* check if this processor name is a match */ + for (wcount = 1; wcount < num_pic_words; wcount++) + { + /* skip uninteresting prefixes */ + char *found_name = sanitise_processor_name (pic_word[wcount]); + + if (STRCASECMP (found_name, simple_pic_name) == 0) + found_processor = TRUE; + } // for + } // if + } // if + } // if + else + { + if (found_processor || pic_name == NULL) + { + /* only parse a processor section if we've found the one we want */ + if (STRCASECMP (pic_word[0], "maxram") == 0 && num_pic_words > 1) + { + pic_maxram = parse_config_value (pic_word[1]); + setMaxRAM (pic_maxram); + } // if + + else if (STRCASECMP (pic_word[0], "bankmsk") == 0 && num_pic_words > 1) + pic_bankmsk = parse_config_value (pic_word[1]); + + else if (STRCASECMP (pic_word[0], "confsiz") == 0 && num_pic_words > 1) + pic_confsiz = parse_config_value (pic_word[1]); + + else if (STRCASECMP (pic_word[0], "program") == 0 && num_pic_words > 1) + pic_program = parse_config_value (pic_word[1]); + + else if (STRCASECMP (pic_word[0], "data") == 0 && num_pic_words > 1) + pic_data = parse_config_value (pic_word[1]); + + else if (STRCASECMP (pic_word[0], "eeprom") == 0 && num_pic_words > 1) + pic_eeprom = parse_config_value (pic_word[1]); + + else if (STRCASECMP (pic_word[0], "io") == 0 && num_pic_words > 1) + pic_io = parse_config_value (pic_word[1]); + + else if (STRCASECMP (pic_word[0], "regmap") == 0 && num_pic_words > 2) + { + if (found_processor) + register_map (num_pic_words, pic_word); + } // if + + else if (STRCASECMP (pic_word[0], "memmap") == 0 && num_pic_words > 2) + { + if (found_processor) + ram_map (num_pic_words, pic_word); + } // if + + else + { + fprintf (stderr, "WARNING: %s: bad syntax `%s'\n", + DEVICE_FILE_NAME, pic_word[0]); + } // if + } // if + } // if + } // if + } // while + + fclose (pic_file); + + split_words (pic_word, NULL); + free (pic_word); + + /* if we're in read-the-lot mode then create the final processor definition */ + if (pic_name == NULL) + { + if (num_processor_names > 0) + { + /* store away all the previous processor definitions */ + int dcount; + + for (dcount = 1; dcount < num_processor_names; dcount++) + { + create_pic (processor_name[dcount], pic_maxram, pic_bankmsk, + pic_confsiz, pic_program, pic_data, pic_eeprom, + pic_io); + } // for + } // if + } // if + else + { + /* in search mode */ + if (found_processor) + { + split_words (processor_name, NULL); + free (processor_name); + + /* create a new pic entry */ + return create_pic (pic_name, pic_maxram, pic_bankmsk, + pic_confsiz, pic_program, pic_data, + pic_eeprom, pic_io); + } // if + } // if + + split_words (processor_name, NULL); + free (processor_name); + + return NULL; +} + +/*-----------------------------------------------------------------* + * void list_valid_pics(int ncols, int list_alias) + * + * Print out a formatted list of valid PIC devices + * + * ncols - number of columns in the list. + * + * list_alias - if non-zero, print all of the supported aliases + * for a device (e.g. F84, 16F84, etc...) + *-----------------------------------------------------------------*/ +static void +list_valid_pics(int ncols) +{ + int col=0,longest; + int i,k,l; + + if (num_of_supported_PICS == 0) + find_device(NULL); /* load all the definitions */ + + /* decrement the column number if it's greater than zero */ + ncols = (ncols > 1) ? ncols-1 : 4; + + /* Find the device with the longest name */ + for(i=0,longest=0; iname); + if(k>longest) + longest = k; + } + +#if 1 + /* heading */ + fprintf(stderr, "\nPIC14 processors and their characteristics:\n\n"); + fprintf(stderr, " processor"); + for(k=0; kname); + l = longest + 2 - strlen(Pics[i]->name); + for(k=0; kprogramMemSize % 1024 == 0) + fprintf(stderr, "%4dK", Pics[i]->programMemSize / 1024); + else + fprintf(stderr, "%5d", Pics[i]->programMemSize); + + fprintf(stderr, " %5d %5d %4d\n", + Pics[i]->dataMemSize, Pics[i]->eepromMemSize, Pics[i]->ioPins); + } + + col = 0; + + fprintf(stderr, "\nPIC14 processors supported:\n"); + for(i=0; i < num_of_supported_PICS; i++) { + + fprintf(stderr,"%s", Pics[i]->name); + if(colname); + for(k=0; k 0) + return 1; + + return 0; + +} + +/*-----------------------------------------------------------------* +* char *processor_base_name(void) - Include file is derived from this. +*-----------------------------------------------------------------*/ +char *processor_base_name(void) +{ + + if(!pic) + return NULL; + + return pic->name; +} + +int IS_CONFIG_ADDRESS(int address) +{ + + return ((address == CONFIG_WORD_ADDRESS) + || (address == CONFIG2_WORD_ADDRESS)); +} + +/*-----------------------------------------------------------------* + * void pic14_assignConfigWordValue(int address, int value) + * + * Most midrange PICs have one config word at address 0x2007. + * Newer PIC14s have a second config word at address 0x2008. + * This routine will assign values to those addresses. + * + *-----------------------------------------------------------------*/ + +void pic14_assignConfigWordValue(int address, int value) +{ + if (CONFIG_WORD_ADDRESS == address) + config_word = value; + + else if (CONFIG2_WORD_ADDRESS == address) + config2_word = value; + + //fprintf(stderr,"setting config word 0x%x to 0x%x\n", address, value); + pic14_hasSetConfigWord = 1; +} + +/*-----------------------------------------------------------------* + * int pic14_getConfigWord(int address) + * + * Get the current value of a config word. + * + *-----------------------------------------------------------------*/ + +static int pic14_getConfigWord(int address) +{ + switch (address) + { + case CONFIG_WORD_ADDRESS: + return config_word; + + case CONFIG2_WORD_ADDRESS: + return config2_word; + + default: + return 0; + } +} + +/*-----------------------------------------------------------------* +* int getHasSecondConfigReg(void) - check if the device has a +* second config register, rather than just one. +*-----------------------------------------------------------------*/ +static int pic14_getHasSecondConfigReg(void) +{ + if(!pic) + return 0; + else + return pic->hasSecondConfigReg; +} + +/*-----------------------------------------------------------------* + * int pic14_emitConfigWord (FILE * vFile) + * + * Emit the __config directives iff we found a previous assignment + * to the config word. + *-----------------------------------------------------------------*/ +int pic14_emitConfigWord (FILE * vFile) +{ + if (pic14_hasSetConfigWord) + { + fprintf (vFile, "%s", iComments2); + fprintf (vFile, "; config word \n"); + fprintf (vFile, "%s", iComments2); + if (pic14_getHasSecondConfigReg()) + { + fprintf (vFile, "\t__config _CONFIG1, 0x%x\n", pic14_getConfigWord(0x2007)); + fprintf (vFile, "\t__config _CONFIG2, 0x%x\n", pic14_getConfigWord(0x2008)); + } + else + fprintf (vFile, "\t__config 0x%x\n", pic14_getConfigWord(0x2007)); + + return 1; + } + return 0; +} + +/*-----------------------------------------------------------------* + * True iff the device has memory aliased in every bank. + * If true, low and high will be set to the low and high address + * occupied by the (last) sharebank found. + *-----------------------------------------------------------------*/ +static int pic14_hasSharebank(int *low, int *high, int *size) +{ + memRange *r; + + assert(pic); + r = pic->ram; + + while (r) { + //fprintf (stderr, "%s: region %x..%x, bank %x, alias %x, pic->bankmask %x, min_size %d\n", __FUNCTION__, r->start_address, r->end_address, r->bank, r->alias, pic->bankMask, size ? *size : 0); + // find sufficiently large shared region + if ((r->alias == pic->bankMask) + && (r->end_address != r->start_address) // ignore SFRs + && (!size || (*size <= (r->end_address - r->start_address + 1)))) + { + if (low) *low = r->start_address; + if (high) *high = r->end_address; + if (size) *size = r->end_address - r->start_address + 1; + return 1; + } // if + r = r->next; + } // while + + if (low) *low = 0x0; + if (high) *high = 0x0; + if (size) *size = 0x0; + //fprintf (stderr, "%s: no shared bank found\n", __FUNCTION__); + return 0; +} + +/* + * True iff the memory region [low, high] is aliased in all banks. + */ +static int pic14_isShared(int low, int high) +{ + memRange *r; + + assert(pic); + r = pic->ram; + + while (r) { + //fprintf (stderr, "%s: region %x..%x, bank %x, alias %x, pic->bankmask %x\n", __FUNCTION__, r->start_address, r->end_address, r->bank, r->alias, pic->bankMask); + if ((r->alias == pic->bankMask) && (r->start_address <= low) && (r->end_address >= high)) { + return 1; + } // if + r = r->next; + } // while + + return 0; +} + +/* + * True iff all RAM is aliased in all banks (no BANKSELs required except for + * SFRs). + */ +int pic14_allRAMShared(void) +{ + memRange *r; + + assert(pic); + r = pic->ram; + + while (r) { + if (r->alias != pic->bankMask) return 0; + r = r->next; + } // while + + return 1; +} + +/* + * True iff the pseudo stack is a sharebank --> let linker place it. + * [low, high] denotes a size byte long block of (shared or banked) + * memory to be used. + */ +int pic14_getSharedStack(int *low, int *high, int *size) +{ + int haveShared; + int l, h, s; + + s = options.stack_size ? options.stack_size : 0x10; + haveShared = pic14_hasSharebank(&l, &h, &s); + if ((options.stack_loc != 0) || !haveShared) + { + // sharebank not available or not to be used + s = options.stack_size ? options.stack_size : 0x10; + l = options.stack_loc ? options.stack_loc : 0x20; + h = l + s - 1; + if (low) *low = l; + if (high) *high = h; + if (size) *size = s; + // return 1 iff [low, high] is present in all banks + //fprintf(stderr, "%s: low %x, high %x, size %x, shared %d\n", __FUNCTION__, l, h, s, pic14_isShared(l, h)); + return (pic14_isShared(l, h)); + } else { + // sharebanks available for use by the stack + if (options.stack_size) s = options.stack_size; + else if (!s || s > 16) s = 16; // limit stack to 16 bytes in SHAREBANK + + // provide addresses for sharebank + if (low) *low = l; + if (high) *high = l + s - 1; + if (size) *size = s; + //fprintf(stderr, "%s: low %x, high %x, size %x, shared 1\n", __FUNCTION__, l, h, s); + return 1; + } +} + +PIC_device * pic14_getPIC(void) +{ + return pic; +} diff --git a/src/pic/device.h b/src/pic/device.h new file mode 100644 index 0000000..ccf3616 --- /dev/null +++ b/src/pic/device.h @@ -0,0 +1,90 @@ +/*------------------------------------------------------------------------- + + device.c - Accomodates subtle variations in PIC devices + Written By - Scott Dattalo scott@dattalo.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +-------------------------------------------------------------------------*/ + +/* + PIC device abstraction + + There are dozens of variations of PIC microcontrollers. This include + file attempts to abstract those differences so that SDCC can easily + deal with them. +*/ + +#ifndef __DEVICE_H__ +#define __DEVICE_H__ + +#include "common.h" + +/* + * Imports + */ +extern char *iComments2; + +/* memRange - a structure to define a range of valid memory addresses + * + * The Memory of most PICs (and other micros) is a collection of + * disjoint chunks. The memRange structure will define the start + * and end address of one of these chunks. The memory map of a + * particular device is a collection of memRange struct's. + */ + +typedef struct memRange { + int start_address; /* first address in range */ + int end_address; /* last */ + int alias; /* bit mask defining how/if memory range is aliased + * e.g. alias = 0x80 means start_address is identical + * to the memory location at (0x80 | start_address) */ + int bank; /* PIC memory bank this range occupies */ + struct memRange *next; /* linked list */ + +} memRange; + +/* Processor unique attributes */ +typedef struct PIC_device { + char *name; /* the processor name */ + + memRange *ram; /* RAM memory map */ + memRange *sfr; /* SFR memory map */ + + int maxRAMaddress; /* maximum value for a data address */ + int defMaxRAMaddrs; /* default maximum value for a data address */ + int bankMask; /* Bitmask that is ANDed with address to extract banking bits */ + // int hasAliasedRAM:1; /* True if there are bank independent registers */ + int hasSecondConfigReg; /* True if there is a second configuration register */ + + int programMemSize; /* program memory size in words - for device listing only */ + int dataMemSize; /* data (RAM) memory size in bytes - for device listing only */ + int eepromMemSize; /* EEPROM memory size in bytes - for device listing only */ + int ioPins; /* number of I/O pins - for device listing only */ + +} PIC_device; + + +PIC_device *init_pic(char *pic_type); +int picIsInitialized(void); +char *processor_base_name(void); +int IS_CONFIG_ADDRESS(int addr); +void pic14_assignConfigWordValue(int address, int value); +int pic14_emitConfigWord(FILE *vFile); + +int pic14_allRAMShared(void); +int pic14_getSharedStack(int *low, int *high, int *size); +PIC_device * pic14_getPIC(void); + +#endif /* __DEVICE_H__ */ diff --git a/src/pic/gen.c b/src/pic/gen.c new file mode 100644 index 0000000..04b5cf9 --- /dev/null +++ b/src/pic/gen.c @@ -0,0 +1,7087 @@ +/*------------------------------------------------------------------------- + gen.c - source file for code generation for pic + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + and - Jean-Louis VERN.jlvern@writeme.com (1999) + Bug Fixes - Wojciech Stryjewski wstryj1@tiger.lsu.edu (1999 v2.1.9a) + PIC port - Scott Dattalo scott@dattalo.com (2000) + cont'd - Raphael Neider (2005) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + Notes: + 000123 mlh Moved aopLiteral to SDCCglue.c to help the split + Made everything static +-------------------------------------------------------------------------*/ + +/* + * This is the down and dirty file with all kinds of + * kludgy & hacky stuff. This is what it is all about + * CODE GENERATION for a specific MCU . some of the + * routines may be reusable, will have to see. + */ + +#include "gen.h" +#include "glue.h" + +/* + * Imports + */ +extern struct dbuf_s *codeOutBuf; +extern set *externs; + + +static pCodeOp *popGetImmd(char *name, unsigned int offset, int index,int is_func); +static pCodeOp *popRegFromString(char *str, int size, int offset); +static int aop_isLitLike(asmop *aop); + +/* The PIC port(s) need not differentiate between POINTER and FPOINTER. */ +#define PIC_IS_DATA_PTR(x) (IS_DATA_PTR(x) || IS_FARPTR(x)) + +/* + * max_key keeps track of the largest label number used in + * a function. This is then used to adjust the label offset + * for the next function. + */ +static int max_key = 0; +static int labelOffset = 0; +static int GpsuedoStkPtr = 0; +static int pic14_inISR = 0; + +static char *zero = "0x00"; +static char *one = "0x01"; +static char *spname = "sp"; + +unsigned fReturnSizePic = 4; /* shared with ralloc.c */ +static char *fReturnpic14[] = {"temp1","temp2","temp3","temp4" }; +static char **fReturn = fReturnpic14; + +static struct { + short accInUse; + short inLine; + short debugLine; + short nRegsSaved; + set *sendSet; +} _G; + +/* + * Resolved ifx structure. This structure stores information + * about an iCode ifx that makes it easier to generate code. + */ +typedef struct resolvedIfx { + symbol *lbl; /* pointer to a label */ + int condition; /* true or false ifx */ + int generated; /* set true when the code associated with the ifx + * is generated */ +} resolvedIfx; + +static lineNode *lineHead = NULL; +static lineNode *lineCurr = NULL; +static pBlock *pb; + +/*-----------------------------------------------------------------*/ +/* my_powof2(n) - If `n' is an integaer power of 2, then the */ +/* exponent of 2 is returned, otherwise -1 is */ +/* returned. */ +/* note that this is similar to the function `powof2' in SDCCsymt */ +/* if(n == 2^y) */ +/* return y; */ +/* return -1; */ +/*-----------------------------------------------------------------*/ +static int my_powof2 (unsigned long num) +{ + if(num) { + if( (num & (num-1)) == 0) { + int nshifts = -1; + while(num) { + num>>=1; + nshifts++; + } + return nshifts; + } + } + + return -1; +} + +void DEBUGpic14_AopType(int line_no, operand *left, operand *right, operand *result) +{ + + DEBUGpic14_emitcode ("; ","line = %d result %s=%s, size=%d, left %s=%s, size=%d, right %s=%s, size=%d", + line_no, + ((result) ? AopType(AOP_TYPE(result)) : "-"), + ((result) ? aopGet(AOP(result),0,TRUE,FALSE) : "-"), + ((result) ? AOP_SIZE(result) : 0), + ((left) ? AopType(AOP_TYPE(left)) : "-"), + ((left) ? aopGet(AOP(left),0,TRUE,FALSE) : "-"), + ((left) ? AOP_SIZE(left) : 0), + ((right) ? AopType(AOP_TYPE(right)) : "-"), + ((right) ? aopGet(AOP(right),0,FALSE,FALSE) : "-"), + ((right) ? AOP_SIZE(right) : 0)); + +} + +static void DEBUGpic14_AopTypeSign(int line_no, operand *left, operand *right, operand *result) +{ + + DEBUGpic14_emitcode ("; ","line = %d, signs: result %s=%c, left %s=%c, right %s=%c", + line_no, + ((result) ? AopType(AOP_TYPE(result)) : "-"), + ((result) ? (SPEC_USIGN(operandType(result)) ? 'u' : 's') : '-'), + ((left) ? AopType(AOP_TYPE(left)) : "-"), + ((left) ? (SPEC_USIGN(operandType(left)) ? 'u' : 's') : '-'), + ((right) ? AopType(AOP_TYPE(right)) : "-"), + ((right) ? (SPEC_USIGN(operandType(right)) ? 'u' : 's') : '-')); + +} + +void DEBUGpic14_emitcode (char *inst,char *fmt, ...) +{ + va_list ap; + char lb[INITIAL_INLINEASM]; + unsigned char *lbp = (unsigned char *)lb; + + if(!debug_verbose && !options.debug) + return; + + va_start(ap,fmt); + + if (inst && *inst) { + if (fmt && *fmt) + sprintf(lb,"%s\t",inst); + else + sprintf(lb,"%s",inst); + vsprintf(lb+(strlen(lb)),fmt,ap); + } else + vsprintf(lb,fmt,ap); + + while (isspace(*lbp)) lbp++; + + if (lbp && *lbp) + lineCurr = (lineCurr ? + connectLine(lineCurr,newLineNode(lb)) : + (lineHead = newLineNode(lb))); + lineCurr->isInline = _G.inLine; + lineCurr->isDebug = _G.debugLine; + + addpCode2pBlock(pb,newpCodeCharP(lb)); + + va_end(ap); +} + +static void Safe_vsnprintf (char *buf, size_t size, const char *fmt, va_list ap) +{ +#if defined (HAVE_VSNPRINTF) + vsnprintf (buf, size, fmt, ap); +#elif defined (HAVE_VSPRINTF) + vsprintf (buf, size, fmt, ap); + if (strlen (buf) >= size) + { + fprintf (stderr, "Safe_vsnprintf: buffer (size %u) has overflown\n", size); + } +#elif defined (HAVE_SNPRINTF) + snprintf (buf, size, "vs(n)printf required"); +#elif defined (HAVE_SRINTF) + sprintf (buf, "vs(n)printf required"); + if (strlen (buf) >= size) + { + fprintf (stderr, "Safe_vsnprintf: buffer (size %u) has overflown\n", size); + } +#else + assert ( !"neither vsnprintf nor vsprintf is present -- unable to proceed" ); +#endif +} + +void emitpComment (const char *fmt, ...) +{ + va_list va; + char buffer[4096]; + + va_start (va, fmt); + if (pb) { + Safe_vsnprintf (buffer, 4096, fmt, va); + //fprintf (stderr, "%s\n" ,buffer); + addpCode2pBlock (pb, newpCodeCharP (buffer)); + } + va_end (va); +} + +void emitpLabel(int key) +{ + addpCode2pBlock(pb,newpCodeLabel(NULL,key+100+labelOffset)); +} + +/* gen.h defines a macro emitpcode that should be used to call emitpcode + * as this allows for easy debugging (ever asked the question: where was + * this instruction geenrated? Here is the answer... */ +void emitpcode_real(PIC_OPCODE poc, pCodeOp *pcop) +{ + if(pcop) + addpCode2pBlock(pb,newpCode(poc,pcop)); + else { + static int has_warned = 0; + + DEBUGpic14_emitcode(";","%s ignoring NULL pcop",__FUNCTION__); + if (!has_warned) { + has_warned = 1; + fprintf( stderr, "WARNING: encountered NULL pcop--this is probably a compiler bug...\n" ); + } + } +} + +static void emitpcodeNULLop(PIC_OPCODE poc) +{ + addpCode2pBlock(pb,newpCode(poc,NULL)); +} + +/*-----------------------------------------------------------------*/ +/* pic14_emitcode - writes the code into a file : for now it is simple */ +/*-----------------------------------------------------------------*/ +void pic14_emitcode (char *inst,char *fmt, ...) +{ + va_list ap; + char lb[INITIAL_INLINEASM]; + char *lbp = lb; + + va_start(ap,fmt); + + if (inst && *inst) { + if (fmt && *fmt) + sprintf(lb,"%s\t",inst); + else + sprintf(lb,"%s",inst); + vsprintf(lb+(strlen(lb)),fmt,ap); + } else + vsprintf(lb,fmt,ap); + + while (isspace(*lbp)) lbp++; + + if (lbp && *lbp) + lineCurr = (lineCurr ? + connectLine(lineCurr,newLineNode(lb)) : + (lineHead = newLineNode(lb))); + lineCurr->isInline = _G.inLine; + lineCurr->isDebug = _G.debugLine; + lineCurr->isLabel = (lbp[strlen (lbp) - 1] == ':'); + + if(debug_verbose) + addpCode2pBlock(pb,newpCodeCharP(lb)); + + va_end(ap); +} + +/*-----------------------------------------------------------------*/ +/* pic14_emitDebuggerSymbol - associate the current code location */ +/* with a debugger symbol */ +/*-----------------------------------------------------------------*/ +void +pic14_emitDebuggerSymbol (char * debugSym) +{ + _G.debugLine = 1; + pic14_emitcode ("", ";%s ==.", debugSym); + _G.debugLine = 0; +} + +/*-----------------------------------------------------------------*/ +/* newAsmop - creates a new asmOp */ +/*-----------------------------------------------------------------*/ +static asmop *newAsmop (short type) +{ + asmop *aop; + + aop = Safe_calloc(1,sizeof(asmop)); + aop->type = type; + return aop; +} + +/*-----------------------------------------------------------------*/ +/* resolveIfx - converts an iCode ifx into a form more useful for */ +/* generating code */ +/*-----------------------------------------------------------------*/ +static void resolveIfx(resolvedIfx *resIfx, iCode *ifx) +{ + if(!resIfx) + return; + + // DEBUGpic14_emitcode("; ***","%s %d",__FUNCTION__,__LINE__); + + resIfx->condition = 1; /* assume that the ifx is true */ + resIfx->generated = 0; /* indicate that the ifx has not been used */ + + if(!ifx) { + resIfx->lbl = NULL; /* this is wrong: newiTempLabel(NULL); / * oops, there is no ifx. so create a label */ + } else { + if(IC_TRUE(ifx)) { + resIfx->lbl = IC_TRUE(ifx); + } else { + resIfx->lbl = IC_FALSE(ifx); + resIfx->condition = 0; + } + } + + // DEBUGpic14_emitcode("; ***","%s lbl->key=%d, (lab offset=%d)",__FUNCTION__,resIfx->lbl->key,labelOffset); + +} + +/*-----------------------------------------------------------------*/ +/* aopForSym - for a true symbol */ +/*-----------------------------------------------------------------*/ +static asmop *aopForSym (iCode *ic,symbol *sym,bool result) +{ + asmop *aop; + memmap *space= SPEC_OCLS(sym->etype); + + DEBUGpic14_emitcode("; ***","%s %d",__FUNCTION__,__LINE__); + /* if already has one */ + if (sym->aop) + return sym->aop; + + //DEBUGpic14_emitcode(";","%d",__LINE__); + /* if it is in direct space */ + if (IN_DIRSPACE(space)) { + sym->aop = aop = newAsmop (AOP_DIR); + aop->aopu.aop_dir = sym->rname ; + aop->size = getSize(sym->type); + DEBUGpic14_emitcode(";","%d sym->rname = %s, size = %d",__LINE__,sym->rname,aop->size); + return aop; + } + + /* special case for a function */ + if (IS_FUNC(sym->type)) { + + sym->aop = aop = newAsmop(AOP_PCODE); + aop->aopu.pcop = popGetImmd(sym->rname,0,0,1); + PCOI(aop->aopu.pcop)->_const = IN_CODESPACE(space); + PCOI(aop->aopu.pcop)->_function = 1; + PCOI(aop->aopu.pcop)->index = 0; + aop->size = FPTRSIZE; + DEBUGpic14_emitcode(";","%d size = %d, name =%s",__LINE__,aop->size,sym->rname); + return aop; + } + + if (IS_ARRAY(sym->type)) { + sym->aop = aop = newAsmop(AOP_PCODE); + aop->aopu.pcop = popGetImmd(sym->rname,0,0,1); + PCOI(aop->aopu.pcop)->_const = IN_CODESPACE(space); + PCOI(aop->aopu.pcop)->_function = 0; + PCOI(aop->aopu.pcop)->index = 0; + aop->size = getSize(sym->etype) * DCL_ELEM(sym->type); + + DEBUGpic14_emitcode(";","%d size = %d, name =%s",__LINE__,aop->size,sym->rname); + return aop; + } + + /* only remaining is far space */ + /* in which case DPTR gets the address */ + sym->aop = aop = newAsmop(AOP_PCODE); + + aop->aopu.pcop = popGetImmd(sym->rname,0,0,0); + PCOI(aop->aopu.pcop)->_const = IN_CODESPACE(space); + PCOI(aop->aopu.pcop)->index = 0; + + DEBUGpic14_emitcode(";","%d: rname %s, val %d, const = %d", + __LINE__,sym->rname, 0, PCOI(aop->aopu.pcop)->_const); + + allocDirReg (IC_LEFT(ic)); + + aop->size = FPTRSIZE; + + /* if it is in code space */ + if (IN_CODESPACE(space)) + aop->code = 1; + + return aop; +} + +/*-----------------------------------------------------------------*/ +/* aopForRemat - rematerialzes an object */ +/*-----------------------------------------------------------------*/ +static asmop *aopForRemat (operand *op) // x symbol *sym) +{ + symbol *sym = OP_SYMBOL(op); + iCode *ic = NULL; + asmop *aop = newAsmop(AOP_PCODE); + int val = 0; + int offset = 0; + + ic = sym->rematiCode; + + DEBUGpic14_emitcode(";","%s %d",__FUNCTION__,__LINE__); + if(IS_OP_POINTER(op)) { + DEBUGpic14_emitcode(";","%s %d IS_OP_POINTER",__FUNCTION__,__LINE__); + } + for (;;) { + if (ic->op == '+') { + val += (int) operandLitValue(IC_RIGHT(ic)); + } else if (ic->op == '-') { + val -= (int) operandLitValue(IC_RIGHT(ic)); + } else + break; + + ic = OP_SYMBOL(IC_LEFT(ic))->rematiCode; + } + + offset = OP_SYMBOL(IC_LEFT(ic))->offset; + aop->aopu.pcop = popGetImmd(OP_SYMBOL(IC_LEFT(ic))->rname,0,val,0); + PCOI(aop->aopu.pcop)->_const = IS_PTR_CONST(operandType(op)); + PCOI(aop->aopu.pcop)->index = val; + + DEBUGpic14_emitcode(";","%d: rname %s, val %d, const = %d", + __LINE__,OP_SYMBOL(IC_LEFT(ic))->rname, + val, IS_PTR_CONST(operandType(op))); + + // DEBUGpic14_emitcode(";","aop type %s",AopType(AOP_TYPE(IC_LEFT(ic)))); + + allocDirReg (IC_LEFT(ic)); + + return aop; +} + +static int aopIdx (asmop *aop, int offset) +{ + if(!aop) + return -1; + + if(aop->type != AOP_REG) + return -2; + + return aop->aopu.aop_reg[offset]->rIdx; + +} + +/*-----------------------------------------------------------------*/ +/* regsInCommon - two operands have some registers in common */ +/*-----------------------------------------------------------------*/ +static bool regsInCommon (operand *op1, operand *op2) +{ + symbol *sym1, *sym2; + int i; + + /* if they have registers in common */ + if (!IS_SYMOP(op1) || !IS_SYMOP(op2)) + return FALSE ; + + sym1 = OP_SYMBOL(op1); + sym2 = OP_SYMBOL(op2); + + if (sym1->nRegs == 0 || sym2->nRegs == 0) + return FALSE ; + + for (i = 0 ; i < sym1->nRegs ; i++) { + int j; + if (!sym1->regs[i]) + continue ; + + for (j = 0 ; j < sym2->nRegs ;j++ ) { + if (!sym2->regs[j]) + continue ; + + if (sym2->regs[j] == sym1->regs[i]) + return TRUE ; + } + } + + return FALSE ; +} + +/*-----------------------------------------------------------------*/ +/* operandsEqu - equivalent */ +/*-----------------------------------------------------------------*/ +static bool operandsEqu ( operand *op1, operand *op2) +{ + symbol *sym1, *sym2; + + /* if they not symbols */ + if (!IS_SYMOP(op1) || !IS_SYMOP(op2)) + return FALSE; + + sym1 = OP_SYMBOL(op1); + sym2 = OP_SYMBOL(op2); + + /* if both are itemps & one is spilt + and the other is not then false */ + if (IS_ITEMP(op1) && IS_ITEMP(op2) && + sym1->isspilt != sym2->isspilt ) + return FALSE ; + + /* if they are the same */ + if (sym1 == sym2) + return TRUE ; + + if (sym1->rname[0] && sym2->rname[0] + && strcmp (sym1->rname, sym2->rname) == 0) + return TRUE; + + + /* if left is a tmp & right is not */ + if (IS_ITEMP(op1) && + !IS_ITEMP(op2) && + sym1->isspilt && + (sym1->usl.spillLoc == sym2)) + return TRUE; + + if (IS_ITEMP(op2) && + !IS_ITEMP(op1) && + sym2->isspilt && + sym1->level > 0 && + (sym2->usl.spillLoc == sym1)) + return TRUE ; + + return FALSE ; +} + +/*-----------------------------------------------------------------*/ +/* pic14_sameRegs - two asmops have the same registers */ +/*-----------------------------------------------------------------*/ +bool pic14_sameRegs (asmop *aop1, asmop *aop2 ) +{ + int i; + + if (aop1 == aop2) + return TRUE ; + + if (aop1->type != AOP_REG || + aop2->type != AOP_REG ) + return FALSE ; + + if (aop1->size != aop2->size ) + return FALSE ; + + for (i = 0 ; i < aop1->size ; i++ ) + if (aop1->aopu.aop_reg[i] != + aop2->aopu.aop_reg[i] ) + return FALSE ; + + return TRUE ; +} + +/*-----------------------------------------------------------------*/ +/* aopOp - allocates an asmop for an operand : */ +/*-----------------------------------------------------------------*/ +void aopOp (operand *op, iCode *ic, bool result) +{ + asmop *aop; + symbol *sym; + int i; + + if (!op) + return ; + + /* if this a literal */ + if (IS_OP_LITERAL(op)) { + op->aop = aop = newAsmop(AOP_LIT); + aop->aopu.aop_lit = op->operand.valOperand; + aop->size = getSize(operandType(op)); + return; + } + + { + sym_link *type = operandType(op); + if(IS_PTR_CONST(type)) + DEBUGpic14_emitcode(";","%d aop type is const pointer",__LINE__); + } + + /* if already has a asmop then continue */ + if (op->aop) + return ; + + /* if the underlying symbol has a aop */ + if (IS_SYMOP(op) && OP_SYMBOL(op)->aop) { + DEBUGpic14_emitcode(";","%d",__LINE__); + op->aop = OP_SYMBOL(op)->aop; + return; + } + + /* if this is a true symbol */ + if (IS_TRUE_SYMOP(op)) { + //DEBUGpic14_emitcode(";","%d - true symop",__LINE__); + op->aop = aopForSym(ic,OP_SYMBOL(op),result); + return ; + } + + /* this is a temporary : this has + only four choices : + a) register + b) spillocation + c) rematerialize + d) conditional + e) can be a return use only */ + + sym = OP_SYMBOL(op); + + + /* if the type is a conditional */ + if (sym->regType == REG_CND) { + aop = op->aop = sym->aop = newAsmop(AOP_CRY); + aop->size = 0; + return; + } + + /* if it is spilt then two situations + a) is rematerialize + b) has a spill location */ + if (sym->isspilt || sym->nRegs == 0) { + + DEBUGpic14_emitcode(";","%d",__LINE__); + /* rematerialize it NOW */ + if (sym->remat) { + + sym->aop = op->aop = aop = aopForRemat (op); + aop->size = getSize(sym->type); + //DEBUGpic14_emitcode(";"," %d: size %d, %s\n",__LINE__,aop->size,aop->aopu.aop_immd); + return; + } + + if (sym->ruonly ) { + if(sym->isptr) { // && sym->uptr + aop = op->aop = sym->aop = newAsmop(AOP_PCODE); + aop->aopu.pcop = newpCodeOp(NULL,PO_GPR_POINTER); //popCopyReg(&pc_fsr); + + //PCOI(aop->aopu.pcop)->_const = 0; + //PCOI(aop->aopu.pcop)->index = 0; + /* + DEBUGpic14_emitcode(";","%d: rname %s, val %d, const = %d", + __LINE__,sym->rname, 0, PCOI(aop->aopu.pcop)->_const); + */ + //allocDirReg (IC_LEFT(ic)); + + aop->size = getSize(sym->type); + DEBUGpic14_emitcode(";","%d",__LINE__); + return; + + } else { + + unsigned i; + + aop = op->aop = sym->aop = newAsmop(AOP_STR); + aop->size = getSize(sym->type); + for ( i = 0 ; i < fReturnSizePic ; i++ ) + aop->aopu.aop_str[i] = fReturn[i]; + + DEBUGpic14_emitcode(";","%d",__LINE__); + return; + } + } + + /* else spill location */ + if (sym->usl.spillLoc) + { + asmop *oldAsmOp = NULL; + + if (getSize(sym->type) != getSize(sym->usl.spillLoc->type)) + { + /* force a new aop if sizes differ */ + oldAsmOp = sym->usl.spillLoc->aop; + sym->usl.spillLoc->aop = NULL; + } + DEBUGpic14_emitcode(";","%s %d %s sym->rname = %s, offset %d", + __FUNCTION__,__LINE__, + sym->usl.spillLoc->rname, + sym->rname, sym->usl.spillLoc->offset); + + sym->aop = op->aop = aop = newAsmop(AOP_PCODE); + if (getSize(sym->type) != getSize(sym->usl.spillLoc->type)) + { + /* Don't reuse the new aop, go with the last one */ + sym->usl.spillLoc->aop = oldAsmOp; + } + //aop->aopu.pcop = popGetImmd(sym->usl.spillLoc->rname,0,sym->usl.spillLoc->offset); + aop->aopu.pcop = popRegFromString(sym->usl.spillLoc->rname, + getSize(sym->type), + sym->usl.spillLoc->offset); + aop->size = getSize(sym->type); + + return; + } + } + + { + sym_link *type = operandType(op); + if(IS_PTR_CONST(type)) + DEBUGpic14_emitcode(";","%d aop type is const pointer",__LINE__); + } + + /* must be in a register */ + DEBUGpic14_emitcode(";","%d register type nRegs=%d",__LINE__,sym->nRegs); + sym->aop = op->aop = aop = newAsmop(AOP_REG); + aop->size = sym->nRegs; + for ( i = 0 ; i < sym->nRegs ;i++) + aop->aopu.aop_reg[i] = sym->regs[i]; +} + +/*-----------------------------------------------------------------*/ +/* freeAsmop - free up the asmop given to an operand */ +/*----------------------------------------------------------------*/ +void freeAsmop (operand *op, asmop *aaop, iCode *ic, bool pop) +{ + asmop *aop ; + + if (!op) + aop = aaop; + else + aop = op->aop; + + if (!aop) + return ; + + aop->freed = 1; + + /* all other cases just dealloc */ + if (op) { + op->aop = NULL; + if (IS_SYMOP(op)) { + OP_SYMBOL(op)->aop = NULL; + /* if the symbol has a spill */ + if (SPIL_LOC(op)) + SPIL_LOC(op)->aop = NULL; + } + } +} + +/*-----------------------------------------------------------------*/ +/* pic14aopLiteral - string from a literal value */ +/*-----------------------------------------------------------------*/ +static unsigned int pic14aopLiteral (value *val, int offset) +{ + union { + float f; + unsigned char c[4]; + } fl; + + /* if it is a float then it gets tricky */ + /* otherwise it is fairly simple */ + if (!IS_FLOAT(val->type)) { + unsigned long v = ulFromVal (val); + + return ( (v >> (offset * 8)) & 0xff); + } + + /* it is type float */ + fl.f = (float) floatFromVal(val); +#ifdef WORDS_BIGENDIAN + return fl.c[3-offset]; +#else + return fl.c[offset]; +#endif +} + +/*-----------------------------------------------------------------*/ +/* aopGet - for fetching value of the aop */ +/*-----------------------------------------------------------------*/ +char *aopGet (asmop *aop, int offset, bool bit16, bool dname) +{ + char *s = buffer ; + char *rs; + + //DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* offset is greater than + size then zero */ + assert(aop); + if (offset > (aop->size - 1) && + aop->type != AOP_LIT) + return zero; + + /* depending on type */ + switch (aop->type) { + + case AOP_IMMD: + if (bit16) + sprintf (s,"%s",aop->aopu.aop_immd); + else + if (offset) + sprintf(s,"(%s >> %d)", + aop->aopu.aop_immd, + offset*8); + else + sprintf(s,"%s", + aop->aopu.aop_immd); + DEBUGpic14_emitcode(";","%d immd %s",__LINE__,s); + rs = Safe_calloc(1,strlen(s)+1); + strcpy(rs,s); + return rs; + + case AOP_DIR: + if (offset) { + sprintf(s,"(%s + %d)", + aop->aopu.aop_dir, + offset); + DEBUGpic14_emitcode(";","oops AOP_DIR did this %s\n",s); + } else + sprintf(s,"%s",aop->aopu.aop_dir); + rs = Safe_calloc(1,strlen(s)+1); + strcpy(rs,s); + return rs; + + case AOP_REG: + //if (dname) + // return aop->aopu.aop_reg[offset]->dname; + //else + return aop->aopu.aop_reg[offset]->name; + + case AOP_CRY: + //pic14_emitcode(";","%d",__LINE__); + return aop->aopu.aop_dir; + + case AOP_LIT: + sprintf(s, "0x%02x", pic14aopLiteral (aop->aopu.aop_lit, offset)); + rs = Safe_strdup(s); + return rs; + + case AOP_STR: + aop->coff = offset ; + if (strcmp(aop->aopu.aop_str[offset],"a") == 0 && + dname) + return "acc"; + DEBUGpic14_emitcode(";","%d - %s",__LINE__, aop->aopu.aop_str[offset]); + + return aop->aopu.aop_str[offset]; + + case AOP_PCODE: + { + pCodeOp *pcop = aop->aopu.pcop; + DEBUGpic14_emitcode(";","%d: aopGet AOP_PCODE type %s",__LINE__,pCodeOpType(pcop)); + if(pcop->name) { + if (pcop->type == PO_IMMEDIATE) { + offset += PCOI(pcop)->index; + } + if (offset) { + DEBUGpic14_emitcode(";","%s offset %d",pcop->name,offset); + sprintf(s,"(%s+%d)", pcop->name,offset); + } else { + DEBUGpic14_emitcode(";","%s",pcop->name); + sprintf(s,"%s", pcop->name); + } + } else + sprintf(s,"0x%02x", PCOI(aop->aopu.pcop)->offset); + + } + rs = Safe_calloc(1,strlen(s)+1); + strcpy(rs,s); + return rs; + + } + + werror(E_INTERNAL_ERROR,__FILE__,__LINE__, + "aopget got unsupported aop->type"); + exit(0); +} + +/*-----------------------------------------------------------------*/ +/* popGetTempReg - create a new temporary pCodeOp */ +/*-----------------------------------------------------------------*/ +static pCodeOp *popGetTempReg(void) +{ + + pCodeOp *pcop; + + pcop = newpCodeOp(NULL, PO_GPR_TEMP); + if(pcop && pcop->type == PO_GPR_TEMP && PCOR(pcop)->r) { + PCOR(pcop)->r->wasUsed=1; + PCOR(pcop)->r->isFree=0; + } + + return pcop; +} + +/*-----------------------------------------------------------------*/ +/* popReleaseTempReg - create a new temporary pCodeOp */ +/*-----------------------------------------------------------------*/ +static void popReleaseTempReg(pCodeOp *pcop) +{ + + if(pcop && pcop->type == PO_GPR_TEMP && PCOR(pcop)->r) + PCOR(pcop)->r->isFree = 1; + +} + +/*-----------------------------------------------------------------*/ +/* popGetLabel - create a new pCodeOp of type PO_LABEL */ +/*-----------------------------------------------------------------*/ +pCodeOp *popGetLabel(unsigned int key) +{ + + DEBUGpic14_emitcode ("; ***","%s key=%d, label offset %d",__FUNCTION__,key, labelOffset); + + if(key>(unsigned int)max_key) + max_key = key; + + return newpCodeOpLabel(NULL,key+100+labelOffset); +} + +/*-------------------------------------------------------------------*/ +/* popGetHighLabel - create a new pCodeOp of type PO_LABEL with offset=1 */ +/*-------------------------------------------------------------------*/ +static pCodeOp *popGetHighLabel(unsigned int key) +{ + pCodeOp *pcop; + pcop = popGetLabel(key); + PCOLAB(pcop)->offset = 1; + return pcop; +} + +/*-----------------------------------------------------------------*/ +/* popGetLit - asm operator to pcode operator conversion */ +/*-----------------------------------------------------------------*/ +pCodeOp *popGetLit(unsigned int lit) +{ + + return newpCodeOpLit((unsigned char)lit); +} + +/*-----------------------------------------------------------------*/ +/* popGetImmd - asm operator to pcode immediate conversion */ +/*-----------------------------------------------------------------*/ +static pCodeOp *popGetImmd(char *name, unsigned int offset, int index,int is_func) +{ + + return newpCodeOpImmd(name, offset,index, 0, is_func); +} + +/*-----------------------------------------------------------------*/ +/* popGetWithString - asm operator to pcode operator conversion */ +/*-----------------------------------------------------------------*/ +static pCodeOp *popGetWithString(char *str, int isExtern) +{ + pCodeOp *pcop; + + + if(!str) { + fprintf(stderr,"NULL string %s %d\n",__FILE__,__LINE__); + exit (1); + } + + pcop = newpCodeOp(str,PO_STR); + PCOS(pcop)->isPublic = isExtern ? 1 : 0; + + return pcop; +} + +pCodeOp *popGetExternal (char *str, int isReg) +{ + pCodeOp *pcop; + + if (isReg) { + pcop = newpCodeOpRegFromStr(str); + } else { + pcop = popGetWithString (str, 1); + } + + if (str) { + symbol *sym; + + for (sym = setFirstItem (externs); sym; sym = setNextItem (externs)) + { + if (!strcmp (str, sym->rname)) break; + } + + if (!sym) + { + sym = newSymbol(str, 0); + strncpy(sym->rname, str, SDCC_NAME_MAX); + addSet (&externs, sym); + } // if + sym->used++; + } + return pcop; +} + +/*-----------------------------------------------------------------*/ +/* popRegFromString - */ +/*-----------------------------------------------------------------*/ +static pCodeOp *popRegFromString(char *str, int size, int offset) +{ + + pCodeOp *pcop = Safe_calloc(1,sizeof(pCodeOpReg) ); + pcop->type = PO_DIR; + + DEBUGpic14_emitcode(";","%d",__LINE__); + + if(!str) + str = "BAD_STRING"; + + pcop->name = Safe_calloc(1,strlen(str)+1); + strcpy(pcop->name,str); + + //pcop->name = Safe_strdup( ( (str) ? str : "BAD STRING")); + + PCOR(pcop)->r = dirregWithName(pcop->name); + if(PCOR(pcop)->r == NULL) { + //fprintf(stderr,"%d - couldn't find %s in allocated registers, size =%d\n",__LINE__,aop->aopu.aop_dir,aop->size); + PCOR(pcop)->r = allocRegByName (pcop->name,size); + DEBUGpic14_emitcode(";","%d %s offset=%d - had to alloc by reg name",__LINE__,pcop->name,offset); + } else { + DEBUGpic14_emitcode(";","%d %s offset=%d",__LINE__,pcop->name,offset); + } + PCOR(pcop)->instance = offset; + + return pcop; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static pCodeOp *popRegFromIdx(int rIdx) +{ + pCodeOp *pcop; + + DEBUGpic14_emitcode ("; ***","%s,%d , rIdx=0x%x", + __FUNCTION__,__LINE__,rIdx); + + pcop = Safe_calloc(1,sizeof(pCodeOpReg) ); + + PCOR(pcop)->rIdx = rIdx; + PCOR(pcop)->r = typeRegWithIdx(rIdx,REG_STK,1); + PCOR(pcop)->r->isFree = 0; + PCOR(pcop)->r->wasUsed = 1; + + pcop->type = PCOR(pcop)->r->pc_type; + + + return pcop; +} + +/*-----------------------------------------------------------------*/ +/* popGet - asm operator to pcode operator conversion */ +/*-----------------------------------------------------------------*/ +pCodeOp *popGet (asmop *aop, int offset) //, bool bit16, bool dname) +{ + //char *s = buffer ; + //char *rs; + + pCodeOp *pcop; + + //DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* offset is greater than + size then zero */ + + assert (aop); + + + /* XXX: still needed for BIT operands (AOP_CRY) */ + if (offset > (aop->size - 1) && + aop->type != AOP_LIT && + aop->type != AOP_PCODE) + { + printf( "%s: (offset[%d] > AOP_SIZE(op)[%d]-1) && AOP_TYPE(op) != AOP_LIT)\n", __FUNCTION__, offset, aop->size); + return NULL; //zero; + } + + /* depending on type */ + switch (aop->type) { + + case AOP_IMMD: + DEBUGpic14_emitcode(";","%d",__LINE__); + return popGetImmd(aop->aopu.aop_immd,offset,0,0); + + case AOP_DIR: + return popRegFromString(aop->aopu.aop_dir, aop->size, offset); + + case AOP_REG: + { + int rIdx; + assert (offset < aop->size); + rIdx = aop->aopu.aop_reg[offset]->rIdx; + + pcop = Safe_calloc(1,sizeof(pCodeOpReg) ); + PCOR(pcop)->rIdx = rIdx; + PCOR(pcop)->r = pic14_regWithIdx(rIdx); + PCOR(pcop)->r->wasUsed=1; + PCOR(pcop)->r->isFree=0; + + PCOR(pcop)->instance = offset; + pcop->type = PCOR(pcop)->r->pc_type; + //rs = aop->aopu.aop_reg[offset]->name; + DEBUGpic14_emitcode(";","%d rIdx = r0x%X ",__LINE__,rIdx); + return pcop; + } + + case AOP_CRY: + pcop = newpCodeOpBit(aop->aopu.aop_dir,-1,1); + PCOR(pcop)->r = dirregWithName(aop->aopu.aop_dir); + //if(PCOR(pcop)->r == NULL) + //fprintf(stderr,"%d - couldn't find %s in allocated registers\n",__LINE__,aop->aopu.aop_dir); + return pcop; + + case AOP_LIT: + return newpCodeOpLit(pic14aopLiteral (aop->aopu.aop_lit,offset)); + + case AOP_STR: + DEBUGpic14_emitcode(";","%d %s",__LINE__,aop->aopu.aop_str[offset]); + return newpCodeOpRegFromStr(aop->aopu.aop_str[offset]); + + case AOP_PCODE: + pcop = NULL; + DEBUGpic14_emitcode(";","popGet AOP_PCODE (%s + %i) %d %s",pCodeOpType(aop->aopu.pcop), offset, + __LINE__, + ((aop->aopu.pcop->name)? (aop->aopu.pcop->name) : "no name")); + //emitpComment ("popGet; name %s, offset: %i, pcop-type: %s\n", aop->aopu.pcop->name, offset, pCodeOpType (aop->aopu.pcop)); + switch (aop->aopu.pcop->type) + { + case PO_IMMEDIATE: + pcop = pCodeOpCopy (aop->aopu.pcop); + /* usually we want to access the memory at " + offset" (using ->index), + * but sometimes we want to access the high byte of the symbol's address (using ->offset) */ + PCOI(pcop)->index += offset; + //PCOI(pcop)->offset = 0; + break; + case PO_DIR: + pcop = pCodeOpCopy (aop->aopu.pcop); + PCOR(pcop)->instance = offset; + break; + default: + assert ( !"unhandled pCode type" ); + break; + } // switch + return pcop; + } + + werror(E_INTERNAL_ERROR,__FILE__,__LINE__, + "popGet got unsupported aop->type"); + exit(0); +} + +/*-----------------------------------------------------------------*/ +/* popGetAddr - access the low/high word of a symbol (immediate) */ +/* (for non-PO_IMMEDIATEs this is the same as popGet) */ +/*-----------------------------------------------------------------*/ +pCodeOp *popGetAddr (asmop *aop, int offset, int index) +{ + if (aop->type == AOP_PCODE && aop->aopu.pcop->type == PO_IMMEDIATE) + { + pCodeOp *pcop = aop->aopu.pcop; + assert (offset <= GPTRSIZE); + + /* special case: index >= 2 should return GPOINTER-style values */ + if (offset == 2) + { + pcop = popGetLit (aop->code ? GPTRTAG_CODE : GPTRTAG_DATA); + return pcop; + } + + pcop = pCodeOpCopy (pcop); + /* usually we want to access the memory at " + offset" (using ->index), + * but sometimes we want to access the high byte of the symbol's address (using ->offset) */ + PCOI(pcop)->offset += offset; + PCOI(pcop)->index += index; + //fprintf (stderr, "is PO_IMMEDIATE: %s+o%d+i%d (new o%d,i%d)\n", pcop->name,PCOI(pcop)->offset,PCOI(pcop)->index, offset, index); + return pcop; + } else { + return popGet (aop, offset + index); + } +} + +/*-----------------------------------------------------------------*/ +/* aopPut - puts a string for a aop */ +/*-----------------------------------------------------------------*/ +void aopPut (asmop *aop, char *s, int offset) +{ + char *d = buffer ; + symbol *lbl ; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if (aop->size && offset > ( aop->size - 1)) { + werror(E_INTERNAL_ERROR,__FILE__,__LINE__, + "aopPut got offset > aop->size"); + exit(0); + } + + /* will assign value to value */ + /* depending on where it is ofcourse */ + switch (aop->type) { + case AOP_DIR: + if (offset) { + sprintf(d,"(%s + %d)", + aop->aopu.aop_dir,offset); + fprintf(stderr,"oops aopPut:AOP_DIR did this %s\n",s); + + } else + sprintf(d,"%s",aop->aopu.aop_dir); + + if (strcmp(d,s)) { + DEBUGpic14_emitcode(";","%d",__LINE__); + if(strcmp(s,"W")) + pic14_emitcode("movf","%s,w",s); + pic14_emitcode("movwf","%s",d); + + if(strcmp(s,"W")) { + pic14_emitcode(";BUG!? should have this:movf","%s,w %d",s,__LINE__); + if(offset >= aop->size) { + emitpcode(POC_CLRF,popGet(aop,offset)); + break; + } else { + emitpcode(POC_MOVFW, popGetImmd(s,0,offset,0)); + } + } + emitpcode(POC_MOVWF,popGet(aop,offset)); + + } + break; + + case AOP_REG: + if (strcmp(aop->aopu.aop_reg[offset]->name,s) != 0) { + if(strcmp(s,"W")==0 ) + pic14_emitcode("movf","%s,w ; %d",s,__LINE__); + + pic14_emitcode("movwf","%s", + aop->aopu.aop_reg[offset]->name); + + if(strcmp(s,zero)==0) { + emitpcode(POC_CLRF,popGet(aop,offset)); + + } else if(strcmp(s,"W")==0) { + pCodeOp *pcop = Safe_calloc(1,sizeof(pCodeOpReg) ); + pcop->type = PO_GPR_REGISTER; + + PCOR(pcop)->rIdx = -1; + PCOR(pcop)->r = NULL; + + DEBUGpic14_emitcode(";","%d",__LINE__); + pcop->name = Safe_strdup(s); + emitpcode(POC_MOVFW,pcop); + emitpcode(POC_MOVWF,popGet(aop,offset)); + } else if(strcmp(s,one)==0) { + emitpcode(POC_CLRF,popGet(aop,offset)); + emitpcode(POC_INCF,popGet(aop,offset)); + } else { + emitpcode(POC_MOVWF,popGet(aop,offset)); + } + } + break; + + case AOP_STK: + if (strcmp(s,"a") == 0) + pic14_emitcode("push","acc"); + else + pic14_emitcode("push","%s",s); + + break; + + case AOP_CRY: + /* if bit variable */ + if (!aop->aopu.aop_dir) { + pic14_emitcode("clr","a"); + pic14_emitcode("rlc","a"); + } else { + if (s == zero) + pic14_emitcode("clr","%s",aop->aopu.aop_dir); + else + if (s == one) + pic14_emitcode("setb","%s",aop->aopu.aop_dir); + else + if (!strcmp(s,"c")) + pic14_emitcode("mov","%s,c",aop->aopu.aop_dir); + else { + lbl = newiTempLabel(NULL); + + if (strcmp(s,"a")) { + MOVA(s); + } + pic14_emitcode("clr","c"); + pic14_emitcode("jz","%05d_DS_",lbl->key+100); + pic14_emitcode("cpl","c"); + pic14_emitcode("","%05d_DS_:",lbl->key+100); + pic14_emitcode("mov","%s,c",aop->aopu.aop_dir); + } + } + break; + + case AOP_STR: + aop->coff = offset; + if (strcmp(aop->aopu.aop_str[offset],s)) + pic14_emitcode ("mov","%s,%s ; %d",aop->aopu.aop_str[offset],s,__LINE__); + break; + + default : + werror(E_INTERNAL_ERROR,__FILE__,__LINE__, + "aopPut got unsupported aop->type"); + exit(0); + } + +} + +/*-----------------------------------------------------------------*/ +/* mov2w_op - generate either a MOVLW or MOVFW based operand type */ +/*-----------------------------------------------------------------*/ +static void mov2w_op (operand *op, int offset) +{ + assert (op); + FENTRY; + + /* for PO_IMMEDIATEs: use address or value? */ + if (op_isLitLike (op)) + { + /* access address of op */ + if (AOP_TYPE(op) != AOP_LIT) { assert (offset < 3); } + if (IS_SYMOP(op) && IS_GENPTR(OP_SYM_TYPE(op)) && AOP_SIZE(op) < offset) + { + if (offset == GPTRSIZE-1) + emitpcode (POC_MOVLW, popGetLit (GPTRTAG_DATA)); + else + emitpcode (POC_MOVLW, popGetLit (0)); + } + else + emitpcode (POC_MOVLW, popGetAddr(AOP(op), offset, 0)); + } else { + /* access value stored in op */ + mov2w (AOP(op), offset); + } +} + + +/*-----------------------------------------------------------------*/ +/* mov2w - generate either a MOVLW or MOVFW based operand type */ +/*-----------------------------------------------------------------*/ +void mov2w (asmop *aop, int offset) +{ + + if(!aop) + return; + + DEBUGpic14_emitcode ("; ***","%s %d offset=%d",__FUNCTION__,__LINE__,offset); + + if ( aop_isLitLike (aop) ) + emitpcode(POC_MOVLW,popGetAddr(aop,offset,0)); + else + emitpcode(POC_MOVFW,popGet(aop,offset)); + +} + +static void movwf (asmop *op, int offset) +{ + emitpcode (POC_MOVWF, popGet(op, offset)); +} + +static pCodeOp *get_argument_pcop (int idx) +{ + assert (idx > 0 && "the 0th (first) argument is passed via WREG"); + return popRegFromIdx (Gstack_base_addr - (idx - 1)); +} + +static pCodeOp *get_return_val_pcop (int offset) +{ + assert (offset > 0 && "the most significant byte is returned via WREG"); + return popRegFromIdx (Gstack_base_addr - (offset - 1)); +} + +static void pass_argument (operand *op, int offset, int idx) +{ + if (op) + mov2w_op (op, offset); + if (idx != 0) + emitpcode(POC_MOVWF, get_argument_pcop (idx)); +} + +static void get_returnvalue (operand *op, int offset, int idx) +{ + if (idx != 0) + emitpcode(POC_MOVFW, get_return_val_pcop (idx)); + movwf(AOP(op), offset); +} + +static void call_libraryfunc (char *name) +{ + symbol *sym; + + /* library code might reside in different page... */ + emitpcode (POC_PAGESEL, popGetWithString (name, 1)); + /* call the library function */ + emitpcode (POC_CALL, popGetExternal (name, 0)); + /* might return from different page... */ + emitpcode (POC_PAGESEL, popGetWithString ("$", 0)); + + /* create symbol, mark it as `extern' */ + sym = findSym(SymbolTab, NULL, name); + if (!sym) { + sym = newSymbol(name, 0); + strncpy(sym->rname, name, SDCC_NAME_MAX); + addSym(SymbolTab, sym, sym->rname, 0, 0, 0); + addSet(&externs, sym); + } // if + sym->used++; +} + +/*-----------------------------------------------------------------*/ +/* pic14_getDataSize - get the operand data size */ +/*-----------------------------------------------------------------*/ +int pic14_getDataSize(operand *op) +{ + int size; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + +#if 0 + size = getSize(OP_SYM_ETYPE(op)); + return size; + //return AOP_SIZE(op); + + // tsd- in the pic port, the genptr size is 1, so this code here + // fails. ( in the 8051 port, the size was 4). +#else + size = AOP_SIZE(op); + if (IS_SYMOP(op) && IS_GENPTR(OP_SYM_TYPE(op))) + { + sym_link *type = operandType(op); + if (IS_GENPTR(type)) + { + /* generic pointer; arithmetic operations + * should ignore the high byte (pointer type). + */ + size--; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + } + } + return size; +#endif +} + +/*-----------------------------------------------------------------*/ +/* pic14_outAcc - output Acc */ +/*-----------------------------------------------------------------*/ +void pic14_outAcc(operand *result) +{ + int size,offset; + DEBUGpic14_emitcode ("; ***","%s %d - ",__FUNCTION__,__LINE__); + DEBUGpic14_AopType(__LINE__,NULL,NULL,result); + + + size = pic14_getDataSize(result); + if(size){ + emitpcode(POC_MOVWF,popGet(AOP(result),0)); + size--; + offset = 1; + /* unsigned or positive */ + while(size--) + emitpcode(POC_CLRF,popGet(AOP(result),offset++)); + } + +} + +/*-----------------------------------------------------------------*/ +/* pic14_outBitC - output a bit C */ +/*-----------------------------------------------------------------*/ +static void pic14_outBitC(operand *result) +{ + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* if the result is bit */ + if (AOP_TYPE(result) == AOP_CRY) + aopPut(AOP(result),"c",0); + else { + pic14_emitcode("clr","a ; %d", __LINE__); + pic14_emitcode("rlc","a"); + pic14_outAcc(result); + } +} + +/*-----------------------------------------------------------------*/ +/* pic14_toBoolean - emit code for orl a,operator(sizeop) */ +/*-----------------------------------------------------------------*/ +static void pic14_toBoolean(operand *oper) +{ + int size = AOP_SIZE(oper); + int offset = 0; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + assert (size > 0); + + if (size == 1) { + /* MOVFW does not load the flags... */ + emitpcode(POC_MOVLW, popGetLit(0)); + offset = 0; + } else { + emitpcode(POC_MOVFW,popGet(AOP(oper),0)); + offset = 1; + } + + while (offset < size) { + emitpcode(POC_IORFW, popGet(AOP(oper),offset++)); + } + /* Z is set iff (oper == 0) */ +} + + +/*-----------------------------------------------------------------*/ +/* genNot - generate code for ! operation */ +/*-----------------------------------------------------------------*/ +static void genNot (iCode *ic) +{ + //symbol *tlbl; + int size; + + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* assign asmOps to operand & result */ + aopOp (IC_LEFT(ic),ic,FALSE); + aopOp (IC_RESULT(ic),ic,TRUE); + + DEBUGpic14_AopType(__LINE__,IC_LEFT(ic),NULL,IC_RESULT(ic)); + /* if in bit space then a special case */ + if (AOP_TYPE(IC_LEFT(ic)) == AOP_CRY) { + if (AOP_TYPE(IC_RESULT(ic)) == AOP_CRY) { + emitpcode(POC_MOVLW,popGet(AOP(IC_LEFT(ic)),0)); + emitpcode(POC_XORWF,popGet(AOP(IC_RESULT(ic)),0)); + } else { + emitpcode(POC_CLRF,popGet(AOP(IC_RESULT(ic)),0)); + emitpcode(POC_BTFSS,popGet(AOP(IC_LEFT(ic)),0)); + emitpcode(POC_INCF,popGet(AOP(IC_RESULT(ic)),0)); + } + goto release; + } + + size = AOP_SIZE(IC_LEFT(ic)); + mov2w (AOP(IC_LEFT(ic)),0); + while (--size > 0) + { + if (op_isLitLike (IC_LEFT(ic))) + emitpcode (POC_IORLW, popGetAddr (AOP(IC_LEFT(ic)), size, 0)); + else + emitpcode (POC_IORFW, popGet (AOP(IC_LEFT(ic)), size)); + } + emitpcode(POC_MOVLW, popGetLit (0)); + emitSKPNZ; + emitpcode(POC_MOVLW, popGetLit (1)); + movwf(AOP(IC_RESULT(ic)), 0); + + for (size = 1; size < AOP_SIZE(IC_RESULT(ic)); size++) + { + emitpcode(POC_CLRF, popGet (AOP(IC_RESULT(ic)), size)); + } + goto release; + +release: + /* release the aops */ + freeAsmop(IC_LEFT(ic),NULL,ic,(RESULTONSTACK(ic) ? 0 : 1)); + freeAsmop(IC_RESULT(ic),NULL,ic,TRUE); +} + + +/*-----------------------------------------------------------------*/ +/* genCpl - generate code for complement */ +/*-----------------------------------------------------------------*/ +static void genCpl (iCode *ic) +{ + operand *left, *result; + int size, offset=0; + + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + aopOp((left = IC_LEFT(ic)),ic,FALSE); + aopOp((result=IC_RESULT(ic)),ic,TRUE); + + /* if both are in bit space then + a special case */ + if (AOP_TYPE(result) == AOP_CRY && + AOP_TYPE(left) == AOP_CRY ) { + + pic14_emitcode("mov","c,%s",left->aop->aopu.aop_dir); + pic14_emitcode("cpl","c"); + pic14_emitcode("mov","%s,c",result->aop->aopu.aop_dir); + goto release; + } + + size = AOP_SIZE(result); + if (AOP_SIZE(left) < size) size = AOP_SIZE(left); + while (size--) { + emitpcode(POC_COMFW,popGet(AOP(left),offset)); + emitpcode(POC_MOVWF,popGet(AOP(result),offset)); + offset++; + } + addSign (result, AOP_SIZE(left), !SPEC_USIGN(operandType(result))); + + +release: + /* release the aops */ + freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? 0 : 1)); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genUminusFloat - unary minus for floating points */ +/*-----------------------------------------------------------------*/ +static void genUminusFloat(operand *op,operand *result) +{ + int size ,offset =0 ; + char *l; + + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* for this we just need to flip the + first it then copy the rest in place */ + size = AOP_SIZE(op) - 1; + l = aopGet(AOP(op),3,FALSE,FALSE); + + MOVA(l); + + pic14_emitcode("cpl","acc.7"); + aopPut(AOP(result),"a",3); + + while(size--) { + aopPut(AOP(result), + aopGet(AOP(op),offset,FALSE,FALSE), + offset); + offset++; + } +} + +/*-----------------------------------------------------------------*/ +/* genUminus - unary minus code generation */ +/*-----------------------------------------------------------------*/ +static void genUminus (iCode *ic) +{ + int size, i; + sym_link *optype, *rtype; + + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* assign asmops */ + aopOp(IC_LEFT(ic),ic,FALSE); + aopOp(IC_RESULT(ic),ic,TRUE); + + /* if both in bit space then special + case */ + if (AOP_TYPE(IC_RESULT(ic)) == AOP_CRY && + AOP_TYPE(IC_LEFT(ic)) == AOP_CRY ) { + + emitpcode(POC_BCF, popGet(AOP(IC_RESULT(ic)),0)); + emitpcode(POC_BTFSS, popGet(AOP(IC_LEFT(ic)),0)); + emitpcode(POC_BSF, popGet(AOP(IC_RESULT(ic)),0)); + + goto release; + } + + optype = operandType(IC_LEFT(ic)); + rtype = operandType(IC_RESULT(ic)); + + /* if float then do float stuff */ + if (IS_FLOAT(optype)) { + genUminusFloat(IC_LEFT(ic),IC_RESULT(ic)); + goto release; + } + + /* otherwise subtract from zero by taking the 2's complement */ + size = AOP_SIZE(IC_LEFT(ic)); + + for(i=0; iname); + + } + + for (i = 0 ; i < pic14_nRegs ;i++) { + if (options.useXstack) { + pic14_emitcode("inc","%s",r->name); + //pic14_emitcode("mov","a,(%s+%d)", + // regspic14[i].base,8*bank+regspic14[i].offset); + pic14_emitcode("movx","@%s,a",r->name); + } else + pic14_emitcode("push","");// "(%s+%d)", + //regspic14[i].base,8*bank+regspic14[i].offset); + } + + if (pushPsw) { + if (options.useXstack) { + pic14_emitcode("mov","a,psw"); + pic14_emitcode("movx","@%s,a",r->name); + pic14_emitcode("inc","%s",r->name); + pic14_emitcode("mov","_spx,%s",r->name); + freeAsmop (NULL,aop,ic,TRUE); + + } else + pic14_emitcode("push","psw"); + + pic14_emitcode("mov","psw,#0x%02x",(bank << 3)&0x00ff); + } + ic->bankSaved = 1; +#endif +} + +/*-----------------------------------------------------------------*/ +/* saveRegisters - will look for a call and save the registers */ +/*-----------------------------------------------------------------*/ +static void saveRegisters(iCode *lic) +{ + iCode *ic; + bitVect *rsave; + sym_link *dtype; + + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* look for call */ + for (ic = lic ; ic ; ic = ic->next) + if (ic->op == CALL || ic->op == PCALL) + break; + + if (!ic) { + fprintf(stderr,"found parameter push with no function call\n"); + return ; + } + + /* if the registers have been saved already then + do nothing */ + if (ic->regsSaved || IFFUNC_CALLEESAVES(OP_SYMBOL(IC_LEFT(ic))->type)) + return ; + + /* find the registers in use at this time + and push them away to safety */ + rsave = bitVectCplAnd(bitVectCopy(ic->rMask), + ic->rUsed); + + ic->regsSaved = 1; + + //fprintf(stderr, "ERROR: saveRegisters did not do anything to save registers, please report this as a bug.\n"); + + dtype = operandType(IC_LEFT(ic)); + if (currFunc && dtype && + (FUNC_REGBANK(currFunc->type) != FUNC_REGBANK(dtype)) && + IFFUNC_ISISR(currFunc->type) && + !ic->bankSaved) + + saverbank(FUNC_REGBANK(dtype),ic,TRUE); + +} +/*-----------------------------------------------------------------*/ +/* unsaveRegisters - pop the pushed registers */ +/*-----------------------------------------------------------------*/ +static void unsaveRegisters (iCode *ic) +{ + int i; + bitVect *rsave; + + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* find the registers in use at this time + and push them away to safety */ + rsave = bitVectCplAnd(bitVectCopy(ic->rMask), + ic->rUsed); + + if (options.useXstack) { + pic14_emitcode("mov","r0,%s",spname); + for (i = pic14_nRegs ; i >= 0 ; i--) { + if (bitVectBitValue(rsave,i)) { + pic14_emitcode("dec","r0"); + pic14_emitcode("movx","a,@r0"); + pic14_emitcode("mov","%s,a",pic14_regWithIdx(i)->name); + } + + } + pic14_emitcode("mov","%s,r0",spname); + } //else + //for (i = pic14_nRegs ; i >= 0 ; i--) { + // if (bitVectBitValue(rsave,i)) + // pic14_emitcode("pop","%s",pic14_regWithIdx(i)->dname); + //} + +} + + +/*-----------------------------------------------------------------*/ +/* pushSide - */ +/*-----------------------------------------------------------------*/ +static void pushSide(operand * oper, int size) +{ +#if 0 + int offset = 0; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + while (size--) { + char *l = aopGet(AOP(oper),offset++,FALSE,TRUE); + if (AOP_TYPE(oper) != AOP_REG && + AOP_TYPE(oper) != AOP_DIR && + strcmp(l,"a") ) { + pic14_emitcode("mov","a,%s",l); + pic14_emitcode("push","acc"); + } else + pic14_emitcode("push","%s",l); + } +#endif +} + +/*-----------------------------------------------------------------*/ +/* assignResultValue - */ +/*-----------------------------------------------------------------*/ +static void assignResultValue(operand * oper) +{ + int size = AOP_SIZE(oper); + int offset = 0; + + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + DEBUGpic14_AopType(__LINE__,oper,NULL,NULL); + + /* assign MSB first (passed via WREG) */ + while (size--) { + get_returnvalue (oper, size, offset + GpsuedoStkPtr); + GpsuedoStkPtr++; + } +} + + +/*-----------------------------------------------------------------*/ +/* genIpush - genrate code for pushing this gets a little complex */ +/*-----------------------------------------------------------------*/ +static void genIpush (iCode *ic) +{ + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d - WARNING no code generated",__FUNCTION__,__LINE__); +#if 0 + int size, offset = 0 ; + char *l; + + + /* if this is not a parm push : ie. it is spill push + and spill push is always done on the local stack */ + if (!ic->parmPush) { + + /* and the item is spilt then do nothing */ + if (OP_SYMBOL(IC_LEFT(ic))->isspilt) + return ; + + aopOp(IC_LEFT(ic),ic,FALSE); + size = AOP_SIZE(IC_LEFT(ic)); + /* push it on the stack */ + while(size--) { + l = aopGet(AOP(IC_LEFT(ic)),offset++,FALSE,TRUE); + if (*l == '#') { + MOVA(l); + l = "acc"; + } + pic14_emitcode("push","%s",l); + } + return ; + } + + /* this is a paramter push: in this case we call + the routine to find the call and save those + registers that need to be saved */ + saveRegisters(ic); + + /* then do the push */ + aopOp(IC_LEFT(ic),ic,FALSE); + + + // pushSide(IC_LEFT(ic), AOP_SIZE(IC_LEFT(ic))); + size = AOP_SIZE(IC_LEFT(ic)); + + while (size--) { + l = aopGet(AOP(IC_LEFT(ic)),offset++,FALSE,TRUE); + if (AOP_TYPE(IC_LEFT(ic)) != AOP_REG && + AOP_TYPE(IC_LEFT(ic)) != AOP_DIR && + strcmp(l,"a") ) { + pic14_emitcode("mov","a,%s",l); + pic14_emitcode("push","acc"); + } else + pic14_emitcode("push","%s",l); + } + + freeAsmop(IC_LEFT(ic),NULL,ic,TRUE); +#endif +} + +/*-----------------------------------------------------------------*/ +/* genIpop - recover the registers: can happen only for spilling */ +/*-----------------------------------------------------------------*/ +static void genIpop (iCode *ic) +{ + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d - WARNING no code generated",__FUNCTION__,__LINE__); + assert (!"genIpop -- unimplemented"); +#if 0 + int size,offset ; + + + /* if the temp was not pushed then */ + if (OP_SYMBOL(IC_LEFT(ic))->isspilt) + return ; + + aopOp(IC_LEFT(ic),ic,FALSE); + size = AOP_SIZE(IC_LEFT(ic)); + offset = (size-1); + while (size--) + pic14_emitcode("pop","%s",aopGet(AOP(IC_LEFT(ic)),offset--, + FALSE,TRUE)); + + freeAsmop(IC_LEFT(ic),NULL,ic,TRUE); +#endif +} + +/*-----------------------------------------------------------------*/ +/* unsaverbank - restores the resgister bank from stack */ +/*-----------------------------------------------------------------*/ +static void unsaverbank (int bank,iCode *ic,bool popPsw) +{ + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d - WARNING no code generated",__FUNCTION__,__LINE__); +#if 0 + int i; + asmop *aop ; + regs *r = NULL; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if (popPsw) { + if (options.useXstack) { + aop = newAsmop(0); + r = getFreePtr(ic,&aop,FALSE); + + + pic14_emitcode("mov","%s,_spx",r->name); + pic14_emitcode("movx","a,@%s",r->name); + pic14_emitcode("mov","psw,a"); + pic14_emitcode("dec","%s",r->name); + + }else + pic14_emitcode ("pop","psw"); + } + + for (i = (pic14_nRegs - 1) ; i >= 0 ;i--) { + if (options.useXstack) { + pic14_emitcode("movx","a,@%s",r->name); + //pic14_emitcode("mov","(%s+%d),a", + // regspic14[i].base,8*bank+regspic14[i].offset); + pic14_emitcode("dec","%s",r->name); + + } else + pic14_emitcode("pop",""); //"(%s+%d)", + //regspic14[i].base,8*bank); //+regspic14[i].offset); + } + + if (options.useXstack) { + + pic14_emitcode("mov","_spx,%s",r->name); + freeAsmop(NULL,aop,ic,TRUE); + + } +#endif +} + +/*-----------------------------------------------------------------*/ +/* genCall - generates a call statement */ +/*-----------------------------------------------------------------*/ +static void genCall (iCode *ic) +{ + sym_link *dtype; + symbol *sym; + char *name; + int isExtern; + + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + /* if caller saves & we have not saved then */ + if (!ic->regsSaved) + saveRegisters(ic); + + /* if we are calling a function that is not using + the same register bank then we need to save the + destination registers on the stack */ + dtype = operandType(IC_LEFT(ic)); + if (currFunc && dtype && + (FUNC_REGBANK(currFunc->type) != FUNC_REGBANK(dtype)) && + IFFUNC_ISISR(currFunc->type) && + !ic->bankSaved) + + saverbank(FUNC_REGBANK(dtype),ic,TRUE); + + /* if send set is not empty the assign */ + if (_G.sendSet) { + iCode *sic; + /* For the Pic port, there is no data stack. + * So parameters passed to functions are stored + * in registers. (The pCode optimizer will get + * rid of most of these :). + */ + int psuedoStkPtr=-1; + int firstTimeThruLoop = 1; + + _G.sendSet = reverseSet(_G.sendSet); + + /* First figure how many parameters are getting passed */ + for (sic = setFirstItem(_G.sendSet) ; sic ; + sic = setNextItem(_G.sendSet)) { + + aopOp(IC_LEFT(sic),sic,FALSE); + psuedoStkPtr += AOP_SIZE(IC_LEFT(sic)); + freeAsmop (IC_LEFT(sic),NULL,sic,FALSE); + } + + for (sic = setFirstItem(_G.sendSet) ; sic ; + sic = setNextItem(_G.sendSet)) { + int size, offset = 0; + + aopOp(IC_LEFT(sic),sic,FALSE); + size = AOP_SIZE(IC_LEFT(sic)); + + while (size--) { + DEBUGpic14_emitcode ("; ","%d left %s",__LINE__, + AopType(AOP_TYPE(IC_LEFT(sic)))); + + if(!firstTimeThruLoop) { + /* If this is not the first time we've been through the loop + * then we need to save the parameter in a temporary + * register. The last byte of the last parameter is + * passed in W. */ + emitpcode(POC_MOVWF,popRegFromIdx(Gstack_base_addr - --psuedoStkPtr)); + + } + firstTimeThruLoop=0; + + mov2w_op (IC_LEFT(sic), offset); + offset++; + } + freeAsmop (IC_LEFT(sic),NULL,sic,TRUE); + } + _G.sendSet = NULL; + } + /* make the call */ + sym = OP_SYMBOL(IC_LEFT(ic)); + name = sym->rname[0] ? sym->rname : sym->name; + /* + * As SDCC emits code as soon as it reaches the end of each + * function's definition, prototyped functions that are implemented + * after the current one are always considered EXTERN, which + * introduces many unneccessary PAGESEL instructions. + * XXX: Use a post pass to iterate over all `CALL _name' statements + * and insert `PAGESEL _name' and `PAGESEL $' around the CALL + * only iff there is no definition of the function in the whole + * file (might include this in the PAGESEL pass). + */ + isExtern = IS_EXTERN(sym->etype) || pic14_inISR; + if (isExtern) { + /* Extern functions and ISRs maybe on a different page; + * must call pagesel */ + emitpcode(POC_PAGESEL,popGetWithString(name,1)); + } + emitpcode(POC_CALL,popGetWithString(name,isExtern)); + if (isExtern) { + /* May have returned from a different page; + * must use pagesel to restore PCLATH before next + * goto or call instruction */ + emitpcode(POC_PAGESEL,popGetWithString("$",0)); + } + GpsuedoStkPtr=0; + /* if we need assign a result value */ + if ((IS_ITEMP(IC_RESULT(ic)) && + (OP_SYMBOL(IC_RESULT(ic))->nRegs || + OP_SYMBOL(IC_RESULT(ic))->spildir )) || + IS_TRUE_SYMOP(IC_RESULT(ic)) ) { + + _G.accInUse++; + aopOp(IC_RESULT(ic),ic,FALSE); + _G.accInUse--; + + assignResultValue(IC_RESULT(ic)); + + DEBUGpic14_emitcode ("; ","%d left %s",__LINE__, + AopType(AOP_TYPE(IC_RESULT(ic)))); + + freeAsmop(IC_RESULT(ic),NULL, ic,TRUE); + } + + /* if register bank was saved then pop them */ + if (ic->bankSaved) + unsaverbank(FUNC_REGBANK(dtype),ic,TRUE); + + /* if we hade saved some registers then unsave them */ + if (ic->regsSaved && !IFFUNC_CALLEESAVES(dtype)) + unsaveRegisters (ic); + + +} + +/*-----------------------------------------------------------------*/ +/* genPcall - generates a call by pointer statement */ +/*-----------------------------------------------------------------*/ +static void genPcall (iCode *ic) +{ + sym_link *dtype; + symbol *albl = newiTempLabel(NULL); + symbol *blbl = newiTempLabel(NULL); + PIC_OPCODE poc; + pCodeOp *pcop; + operand *left; + + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* if caller saves & we have not saved then */ + if (!ic->regsSaved) + saveRegisters(ic); + + /* if we are calling a function that is not using + the same register bank then we need to save the + destination registers on the stack */ + dtype = operandType(IC_LEFT(ic)); + if (currFunc && dtype && + IFFUNC_ISISR(currFunc->type) && + (FUNC_REGBANK(currFunc->type) != FUNC_REGBANK(dtype))) + saverbank(FUNC_REGBANK(dtype),ic,TRUE); + + left = IC_LEFT(ic); + aopOp(left,ic,FALSE); + DEBUGpic14_AopType(__LINE__,left,NULL,NULL); + + poc = ( op_isLitLike (IC_LEFT(ic)) ? POC_MOVLW : POC_MOVFW ); + + pushSide(IC_LEFT(ic), FPTRSIZE); + + /* if send set is not empty, assign parameters */ + if (_G.sendSet) { + + DEBUGpic14_emitcode ("; ***","%s %d - WARNING arg-passing to indirect call not supported",__FUNCTION__,__LINE__); + /* no way to pass args - W always gets used to make the call */ + } + /* first idea - factor out a common helper function and call it. + But don't know how to get it generated only once in its own block + + if(AOP_TYPE(IC_LEFT(ic)) == AOP_DIR) { + char *rname; + char *buffer; + rname = IC_LEFT(ic)->aop->aopu.aop_dir; + DEBUGpic14_emitcode ("; ***","%s %d AOP_DIR %s",__FUNCTION__,__LINE__,rname); + buffer = Safe_calloc(1,strlen(rname)+16); + sprintf(buffer, "%s_goto_helper", rname); + addpCode2pBlock(pb,newpCode(POC_CALL,newpCodeOp(buffer,PO_STR))); + free(buffer); + } + */ + emitpcode(POC_CALL,popGetLabel(albl->key)); + pcop = popGetLabel(blbl->key); + emitpcode(POC_PAGESEL,pcop); /* Must restore PCLATH before goto, without destroying W */ + emitpcode(POC_GOTO,pcop); + emitpLabel(albl->key); + + emitpcode(poc,popGetAddr(AOP(left),1,0)); + emitpcode(POC_MOVWF,popCopyReg(&pc_pclath)); + emitpcode(poc,popGetAddr(AOP(left),0,0)); + emitpcode(POC_MOVWF,popCopyReg(&pc_pcl)); + + emitpLabel(blbl->key); + + freeAsmop(IC_LEFT(ic),NULL,ic,TRUE); + + /* if we need to assign a result value */ + if ((IS_ITEMP(IC_RESULT(ic)) && + (OP_SYMBOL(IC_RESULT(ic))->nRegs || + OP_SYMBOL(IC_RESULT(ic))->spildir)) || + IS_TRUE_SYMOP(IC_RESULT(ic)) ) { + + _G.accInUse++; + aopOp(IC_RESULT(ic),ic,FALSE); + _G.accInUse--; + + GpsuedoStkPtr = 0; + + assignResultValue(IC_RESULT(ic)); + + freeAsmop(IC_RESULT(ic),NULL,ic,TRUE); + } + + /* if register bank was saved then unsave them */ + if (currFunc && dtype && + (FUNC_REGBANK(currFunc->type) != FUNC_REGBANK(dtype))) + unsaverbank(FUNC_REGBANK(dtype),ic,TRUE); + + /* if we hade saved some registers then + unsave them */ + if (ic->regsSaved) + unsaveRegisters (ic); + +} + +/*-----------------------------------------------------------------*/ +/* resultRemat - result is rematerializable */ +/*-----------------------------------------------------------------*/ +static int resultRemat (iCode *ic) +{ + // DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + FENTRY; + + if (SKIP_IC(ic) || ic->op == IFX) + return 0; + + if (IC_RESULT(ic) && IS_ITEMP(IC_RESULT(ic))) { + symbol *sym = OP_SYMBOL(IC_RESULT(ic)); + if (sym->remat && !POINTER_SET(ic)) + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* genFunction - generated code for function entry */ +/*-----------------------------------------------------------------*/ +static void genFunction (iCode *ic) +{ + symbol *sym; + sym_link *ftype; + + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d curr label offset=%dprevious max_key=%d ",__FUNCTION__,__LINE__,labelOffset,max_key); + + labelOffset += (max_key+4); + max_key=0; + GpsuedoStkPtr=0; + _G.nRegsSaved = 0; + /* create the function header */ + pic14_emitcode(";","-----------------------------------------"); + pic14_emitcode(";"," function %s",(sym = OP_SYMBOL(IC_LEFT(ic)))->name); + pic14_emitcode(";","-----------------------------------------"); + + /* prevent this symbol from being emitted as 'extern' */ + pic14_stringInSet(sym->rname, &pic14_localFunctions, 1); + + pic14_emitcode("","%s:",sym->rname); + addpCode2pBlock(pb,newpCodeFunction(NULL,sym->rname,!IS_STATIC (sym->etype))); + + /* mark symbol as NOT extern (even if it was declared so previously) */ + assert(IS_SPEC(sym->etype)); + SPEC_EXTR(sym->etype) = 0; + sym->cdef = 0; + if (!SPEC_OCLS(sym->etype)) SPEC_OCLS(sym->etype) = code; + addSetIfnotP(&SPEC_OCLS(sym->etype)->syms, sym); + + ftype = operandType(IC_LEFT(ic)); + + /* if critical function then turn interrupts off */ + if (IFFUNC_ISCRITICAL(ftype)) + pic14_emitcode("clr","ea"); + + /* here we need to generate the equates for the + register bank if required */ +#if 0 + if (FUNC_REGBANK(ftype) != rbank) { + int i ; + + rbank = FUNC_REGBANK(ftype); + for ( i = 0 ; i < pic14_nRegs ; i++ ) { + if (strcmp(regspic14[i].base,"0") == 0) + pic14_emitcode("","%s = 0x%02x", + regspic14[i].dname, + 8*rbank+regspic14[i].offset); + else + pic14_emitcode ("","%s = %s + 0x%02x", + regspic14[i].dname, + regspic14[i].base, + 8*rbank+regspic14[i].offset); + } + } +#endif + + /* if this is an interrupt service routine */ + pic14_inISR = 0; + if (IFFUNC_ISISR(sym->type)) { + pic14_inISR = 1; + emitpcode(POC_MOVWF, popCopyReg(&pc_wsave)); + emitpcode(POC_SWAPFW, popCopyReg(&pc_status)); + /* XXX: Why? Does this assume that ssave and psave reside + * in a shared bank or bank0? We cannot guarantee the + * latter... + */ + emitpcode(POC_CLRF, popCopyReg(&pc_status)); + emitpcode(POC_MOVWF, popCopyReg(&pc_ssave)); + //emitpcode(POC_MOVWF, popGetExternal("___sdcc_saved_status",1 )); + emitpcode(POC_MOVFW, popCopyReg(&pc_pclath)); + /* during an interrupt PCLATH must be cleared before a goto or call statement */ + emitpcode(POC_CLRF, popCopyReg(&pc_pclath)); + emitpcode(POC_MOVWF, popCopyReg(&pc_psave)); + //emitpcode(POC_MOVWF, popGetExternal("___sdcc_saved_pclath", 1)); + emitpcode(POC_MOVFW, popCopyReg(&pc_fsr)); + emitpcode(POC_MOVWF, popGetExternal("___sdcc_saved_fsr", 1)); + + pBlockConvert2ISR(pb); + pic14_hasInterrupt = 1; + } else { + /* if callee-save to be used for this function + then save the registers being used in this function */ + if (IFFUNC_CALLEESAVES(sym->type)) { + int i; + + /* if any registers used */ + if (sym->regsUsed) { + /* save the registers used */ + for ( i = 0 ; i < sym->regsUsed->size ; i++) { + if (bitVectBitValue(sym->regsUsed,i)) { + //pic14_emitcode("push","%s",pic14_regWithIdx(i)->dname); + _G.nRegsSaved++; + } + } + } + } + } + + /* set the register bank to the desired value */ + if (FUNC_REGBANK(sym->type) || FUNC_ISISR(sym->type)) { + pic14_emitcode("push","psw"); + pic14_emitcode("mov","psw,#0x%02x",(FUNC_REGBANK(sym->type) << 3)&0x00ff); + } + + if (IFFUNC_ISREENT(sym->type) || options.stackAuto) { + + if (options.useXstack) { + pic14_emitcode("mov","r0,%s",spname); + pic14_emitcode("mov","a,_bp"); + pic14_emitcode("movx","@r0,a"); + pic14_emitcode("inc","%s",spname); + } + else + { + /* set up the stack */ + pic14_emitcode ("push","_bp"); /* save the callers stack */ + } + pic14_emitcode ("mov","_bp,%s",spname); + } + + /* adjust the stack for the function */ + if (sym->stack) { + + int i = sym->stack; + if (i > 256 ) + werror(W_STACK_OVERFLOW,sym->name); + + if (i > 3 && sym->recvSize < 4) { + + pic14_emitcode ("mov","a,sp"); + pic14_emitcode ("add","a,#0x%02x",((char)sym->stack & 0xff)); + pic14_emitcode ("mov","sp,a"); + + } + else + while(i--) + pic14_emitcode("inc","sp"); + } + + if (sym->xstack) { + + pic14_emitcode ("mov","a,_spx"); + pic14_emitcode ("add","a,#0x%02x",((char)sym->xstack & 0xff)); + pic14_emitcode ("mov","_spx,a"); + } + +} + +/*-----------------------------------------------------------------*/ +/* genEndFunction - generates epilogue for functions */ +/*-----------------------------------------------------------------*/ +static void genEndFunction (iCode *ic) +{ + symbol *sym = OP_SYMBOL(IC_LEFT(ic)); + + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if (IFFUNC_ISREENT(sym->type) || options.stackAuto) + { + pic14_emitcode ("mov","%s,_bp",spname); + } + + /* if use external stack but some variables were + added to the local stack then decrement the + local stack */ + if (options.useXstack && sym->stack) { + pic14_emitcode("mov","a,sp"); + pic14_emitcode("add","a,#0x%02x",((char)-sym->stack) & 0xff); + pic14_emitcode("mov","sp,a"); + } + + + if ((IFFUNC_ISREENT(sym->type) || options.stackAuto)) { + if (options.useXstack) { + pic14_emitcode("mov","r0,%s",spname); + pic14_emitcode("movx","a,@r0"); + pic14_emitcode("mov","_bp,a"); + pic14_emitcode("dec","%s",spname); + } + else + { + pic14_emitcode ("pop","_bp"); + } + } + + /* restore the register bank */ + if (FUNC_REGBANK(sym->type) || FUNC_ISISR(sym->type)) + pic14_emitcode ("pop","psw"); + + if (IFFUNC_ISISR(sym->type)) { + + /* now we need to restore the registers */ + /* if this isr has no bank i.e. is going to + run with bank 0 , then we need to save more +registers :-) */ + if (!FUNC_REGBANK(sym->type)) { + + /* if this function does not call any other + function then we can be economical and + save only those registers that are used */ + if (! IFFUNC_HASFCALL(sym->type)) { + int i; + + /* if any registers used */ + if (sym->regsUsed) { + /* save the registers used */ + for ( i = sym->regsUsed->size ; i >= 0 ; i--) { + if (bitVectBitValue(sym->regsUsed,i)) { + pic14_emitcode("pop","junk");//"%s",pic14_regWithIdx(i)->dname); + } + } + } + + } else { + /* this function has a function call; cannot + determines register usage so we will have the + entire bank */ + unsaverbank(0,ic,FALSE); + } + } + + /* if debug then send end of function */ + if (options.debug && debugFile && currFunc) { + debugFile->writeEndFunction (currFunc, ic, 1); + } + + emitpcode(POC_MOVFW, popGetExternal("___sdcc_saved_fsr", 1)); + emitpcode(POC_MOVWF, popCopyReg(&pc_fsr)); + //emitpcode(POC_MOVFW, popGetExternal("___sdcc_saved_pclath", 1)); + emitpcode(POC_MOVFW, popCopyReg(&pc_psave)); + emitpcode(POC_MOVWF, popCopyReg(&pc_pclath)); + emitpcode(POC_CLRF, popCopyReg(&pc_status)); // see genFunction + //emitpcode(POC_SWAPFW, popGetExternal("___sdcc_saved_status", 1)); + emitpcode(POC_SWAPFW, popCopyReg(&pc_ssave)); + emitpcode(POC_MOVWF, popCopyReg(&pc_status)); + emitpcode(POC_SWAPF, popCopyReg(&pc_wsave)); + emitpcode(POC_SWAPFW, popCopyReg(&pc_wsave)); + addpCode2pBlock(pb,newpCodeLabel("END_OF_INTERRUPT",-1)); + emitpcodeNULLop(POC_RETFIE); + } + else { + if (IFFUNC_ISCRITICAL(sym->type)) + pic14_emitcode("setb","ea"); + + if (IFFUNC_CALLEESAVES(sym->type)) { + int i; + + /* if any registers used */ + if (sym->regsUsed) { + /* save the registers used */ + for ( i = sym->regsUsed->size ; i >= 0 ; i--) { + if (bitVectBitValue(sym->regsUsed,i)) { + pic14_emitcode("pop","junk");//"%s",pic14_regWithIdx(i)->dname); + } + } + } + } + + /* if debug then send end of function */ + if (options.debug && debugFile && currFunc) { + debugFile->writeEndFunction (currFunc, ic, 1); + } + + pic14_emitcode ("return",""); + emitpcodeNULLop(POC_RETURN); + + /* Mark the end of a function */ + addpCode2pBlock(pb,newpCodeFunction(NULL,NULL,0)); + } + +} + +/*-----------------------------------------------------------------*/ +/* genRet - generate code for return statement */ +/*-----------------------------------------------------------------*/ +static void genRet (iCode *ic) +{ + int size,offset = 0; + + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* if we have no return value then + just generate the "ret" */ + if (!IC_LEFT(ic)) + goto jumpret; + + /* we have something to return then + move the return value into place */ + aopOp(IC_LEFT(ic),ic,FALSE); + size = AOP_SIZE(IC_LEFT(ic)); + + for (offset = 0; offset < size; offset++) + { + pass_argument (IC_LEFT(ic), offset, size - 1 - offset); + } + + freeAsmop (IC_LEFT(ic),NULL,ic,TRUE); + +jumpret: + /* generate a jump to the return label + if the next is not the return statement */ + if (!(ic->next && ic->next->op == LABEL && + IC_LABEL(ic->next) == returnLabel)) { + + emitpcode(POC_GOTO,popGetLabel(returnLabel->key)); + } + +} + +/*-----------------------------------------------------------------*/ +/* genLabel - generates a label */ +/*-----------------------------------------------------------------*/ +static void genLabel (iCode *ic) +{ + FENTRY; + + /* special case never generate */ + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if (IC_LABEL(ic) == entryLabel) + return ; + + emitpLabel(IC_LABEL(ic)->key); + pic14_emitcode("","_%05d_DS_:",(IC_LABEL(ic)->key+100 + labelOffset)); +} + +/*-----------------------------------------------------------------*/ +/* genGoto - generates a goto */ +/*-----------------------------------------------------------------*/ +//tsd +static void genGoto (iCode *ic) +{ + FENTRY; + + emitpcode(POC_GOTO,popGetLabel(IC_LABEL(ic)->key)); + pic14_emitcode ("goto","_%05d_DS_",(IC_LABEL(ic)->key+100)+labelOffset); +} + + +/*-----------------------------------------------------------------*/ +/* genMultbits :- multiplication of bits */ +/*-----------------------------------------------------------------*/ +static void genMultbits (operand *left, + operand *right, + operand *result) +{ + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if(!pic14_sameRegs(AOP(result),AOP(right))) + emitpcode(POC_BSF, popGet(AOP(result),0)); + + emitpcode(POC_BTFSC,popGet(AOP(right),0)); + emitpcode(POC_BTFSS,popGet(AOP(left),0)); + emitpcode(POC_BCF, popGet(AOP(result),0)); + +} + + +/*-----------------------------------------------------------------*/ +/* genMultOneByte : 8 bit multiplication & division */ +/*-----------------------------------------------------------------*/ +static void genMultOneByte (operand *left, + operand *right, + operand *result) +{ + char *func[] = { NULL, "__mulchar", "__mulint", NULL, "__mullong" }; + + // symbol *lbl ; + int size,offset,i; + + + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + DEBUGpic14_AopType(__LINE__,left,right,result); + DEBUGpic14_AopTypeSign(__LINE__,left,right,result); + + /* (if two literals, the value is computed before) */ + /* if one literal, literal on the right */ + if (AOP_TYPE(left) == AOP_LIT){ + operand *t = right; + right = left; + left = t; + } + + assert (AOP_SIZE(left) == AOP_SIZE(right)); + + size = min(AOP_SIZE(result),AOP_SIZE(left)); + offset = Gstack_base_addr - (2*size - 1); + + /* pass right operand as argument */ + for (i=0; i < size; i++) + { + mov2w (AOP(right), i); + emitpcode(POC_MOVWF, popRegFromIdx (++offset)); + } // for + + /* pass left operand as argument */ + for (i=0; i < size; i++) + { + mov2w (AOP(left), i); + if (i != size-1) emitpcode(POC_MOVWF, popRegFromIdx (++offset)); + } // for + assert (offset == Gstack_base_addr); + + /* call library routine */ + assert (size > 0 && size <= 4); + call_libraryfunc (func[size]); + + /* assign result */ + movwf (AOP(result), size-1); + for (i=0; i < size - 1; i++) + { + emitpcode(POC_MOVFW, popRegFromIdx (Gstack_base_addr - i)); + movwf (AOP(result), size - 2 - i); + } // for + + /* now (zero-/sign) extend the result to its size */ + addSign (result, AOP_SIZE(left), !SPEC_USIGN(operandType(result))); +} + +/*-----------------------------------------------------------------*/ +/* genMult - generates code for multiplication */ +/*-----------------------------------------------------------------*/ +static void genMult (iCode *ic) +{ + operand *left = IC_LEFT(ic); + operand *right = IC_RIGHT(ic); + operand *result= IC_RESULT(ic); + + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* assign the amsops */ + aopOp (left,ic,FALSE); + aopOp (right,ic,FALSE); + aopOp (result,ic,TRUE); + + DEBUGpic14_AopType(__LINE__,left,right,result); + + /* special cases first */ + /* both are bits */ + if (AOP_TYPE(left) == AOP_CRY && + AOP_TYPE(right)== AOP_CRY) { + genMultbits(left,right,result); + goto release ; + } + + /* if both are of size == 1 */ + if (AOP_SIZE(left) == 1 && + AOP_SIZE(right) == 1 ) { + genMultOneByte(left,right,result); + goto release ; + } + + /* should have been converted to function call */ + assert(0) ; + +release : + freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genDivbits :- division of bits */ +/*-----------------------------------------------------------------*/ +static void genDivbits (operand *left, + operand *right, + operand *result) +{ + + char *l; + + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* the result must be bit */ + pic14_emitcode("mov","b,%s",aopGet(AOP(right),0,FALSE,FALSE)); + l = aopGet(AOP(left),0,FALSE,FALSE); + + MOVA(l); + + pic14_emitcode("div","ab"); + pic14_emitcode("rrc","a"); + aopPut(AOP(result),"c",0); +} + +/*-----------------------------------------------------------------*/ +/* genDivOneByte : 8 bit division */ +/*-----------------------------------------------------------------*/ +static void genDivOneByte (operand *left, + operand *right, + operand *result) +{ + int size; + int sign; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + assert (AOP_SIZE(right) == 1); + assert (AOP_SIZE(left) == 1); + + size = min(AOP_SIZE(result),AOP_SIZE(left)); + sign = !(SPEC_USIGN(operandType(left)) + && SPEC_USIGN(operandType(right))); + + if (AOP_TYPE(right) == AOP_LIT) + { + /* XXX: might add specialized code */ + } + + if (!sign) + { + /* unsigned division */ + #if 1 + mov2w(AOP(right),0); + emitpcode(POC_MOVWF, popRegFromIdx(Gstack_base_addr)); + mov2w(AOP(left),0); + call_libraryfunc("__divuchar"); + movwf(AOP(result),0); + #else + pCodeOp *temp; + symbol *lbl; + + temp = popGetTempReg(); + lbl = newiTempLabel(NULL); + + /* XXX: improve this naive approach: + [result] = [a] / [b] + ::= [result] = 0; while ([a] > [b]) do [a] -= [b]; [result]++ done + + In PIC assembler: + movf left,W + movwf temp // temp <-- left + movf right,W // W <-- right + clrf result + label1: + incf result + subwf temp,F // temp <-- temp - W + skipNC // subwf clears CARRY (i.e. sets BORROW) if temp < W + goto label1 + decf result // we just subtract once too often + */ + + /* XXX: This loops endlessly on DIVIDE BY ZERO */ + /* We need 1..128 iterations of the loop body (`4 / 5' .. `255 / 2'). */ + + mov2w(AOP(left),0); + emitpcode(POC_MOVWF, temp); + mov2w(AOP(right),0); + emitpcode(POC_CLRF, popGet(AOP(result),0)); + + emitpLabel(lbl->key); + emitpcode(POC_INCF, popGet(AOP(result),0)); + emitpcode(POC_SUBWF, temp); + emitSKPNC; + emitpcode(POC_GOTO, popGetLabel(lbl->key)); + emitpcode(POC_DECF, popGet(AOP(result),0)); + popReleaseTempReg(temp); + #endif + } + else + { + /* signed division */ + mov2w(AOP(right),0); + emitpcode(POC_MOVWF, popRegFromIdx(Gstack_base_addr)); + mov2w(AOP(left),0); + call_libraryfunc("__divschar"); + movwf(AOP(result),0); + } + + /* now performed the signed/unsigned division -- extend result */ + addSign(result, 1, sign); +} + +/*-----------------------------------------------------------------*/ +/* genDiv - generates code for division */ +/*-----------------------------------------------------------------*/ +static void genDiv (iCode *ic) +{ + operand *left = IC_LEFT(ic); + operand *right = IC_RIGHT(ic); + operand *result= IC_RESULT(ic); + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* assign the amsops */ + aopOp (left,ic,FALSE); + aopOp (right,ic,FALSE); + aopOp (result,ic,TRUE); + + /* special cases first */ + /* both are bits */ + if (AOP_TYPE(left) == AOP_CRY && + AOP_TYPE(right)== AOP_CRY) { + genDivbits(left,right,result); + goto release ; + } + + /* if both are of size == 1 */ + if (AOP_SIZE(left) == 1 && + AOP_SIZE(right) == 1 ) { + genDivOneByte(left,right,result); + goto release ; + } + + /* should have been converted to function call */ + assert(0); +release : + freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genModOneByte : 8 bit modulus */ +/*-----------------------------------------------------------------*/ +static void genModOneByte (operand *left, + operand *right, + operand *result) +{ + int size; + int sign; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + assert (AOP_SIZE(right) == 1); + assert (AOP_SIZE(left) == 1); + + size = min(AOP_SIZE(result),AOP_SIZE(left)); + sign = !(SPEC_USIGN(operandType(left)) + && SPEC_USIGN(operandType(right))); + + if (AOP_TYPE(right) == AOP_LIT) + { + /* XXX: might add specialized code */ + } + + if (!sign) + { + /* unsigned division */ + #if 1 + mov2w(AOP(right),0); + emitpcode(POC_MOVWF, popRegFromIdx(Gstack_base_addr)); + mov2w(AOP(left),0); + call_libraryfunc("__moduchar"); + movwf(AOP(result),0); + #else + pCodeOp *temp; + symbol *lbl; + + lbl = newiTempLabel(NULL); + + assert(!pic14_sameRegs(AOP(right),AOP(result))); + + /* XXX: improve this naive approach: + [result] = [a] % [b] + ::= [result] = [a]; while ([result] > [b]) do [result] -= [b]; done + + In PIC assembler: + movf left,W + movwf result // result <-- left + movf right,W // W <-- right + label1: + subwf result,F // result <-- result - W + skipNC // subwf clears CARRY (i.e. sets BORROW) if result < W + goto label1 + addwf result, F // we just subtract once too often + */ + + /* XXX: This loops endlessly on DIVIDE BY ZERO */ + /* We need 1..128 iterations of the loop body (`4 % 5' .. `255 % 2'). */ + + if (!pic14_sameRegs(AOP(left), AOP(result))) + { + mov2w(AOP(left),0); + emitpcode(POC_MOVWF, popGet(AOP(result),0)); + } + mov2w(AOP(right),0); + + emitpLabel(lbl->key); + emitpcode(POC_SUBWF, popGet(AOP(result),0)); + emitSKPNC; + emitpcode(POC_GOTO, popGetLabel(lbl->key)); + emitpcode(POC_ADDWF, popGet(AOP(result),0)); + #endif + } + else + { + /* signed division */ + mov2w(AOP(right),0); + emitpcode(POC_MOVWF, popRegFromIdx(Gstack_base_addr)); + mov2w(AOP(left),0); + call_libraryfunc("__modschar"); + movwf(AOP(result),0); + } + + /* now we performed the signed/unsigned modulus -- extend result */ + addSign(result, 1, sign); +} + +/*-----------------------------------------------------------------*/ +/* genMod - generates code for division */ +/*-----------------------------------------------------------------*/ +static void genMod (iCode *ic) +{ + operand *left = IC_LEFT(ic); + operand *right = IC_RIGHT(ic); + operand *result= IC_RESULT(ic); + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* assign the amsops */ + aopOp (left,ic,FALSE); + aopOp (right,ic,FALSE); + aopOp (result,ic,TRUE); + + /* if both are of size == 1 */ + if (AOP_SIZE(left) == 1 && + AOP_SIZE(right) == 1 ) { + genModOneByte(left,right,result); + goto release ; + } + + /* should have been converted to function call */ + assert(0); + +release : + freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genIfxJump :- will create a jump depending on the ifx */ +/*-----------------------------------------------------------------*/ +/* +note: May need to add parameter to indicate when a variable is in bit space. +*/ +static void genIfxJump (iCode *ic, char *jval) +{ + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* if true label then we jump if condition + supplied is true */ + if ( IC_TRUE(ic) ) { + + if(strcmp(jval,"a") == 0) + emitSKPZ; + else if (strcmp(jval,"c") == 0) + emitSKPC; + else { + DEBUGpic14_emitcode ("; ***","%d - assuming %s is in bit space",__LINE__,jval); + emitpcode(POC_BTFSC, newpCodeOpBit(jval,-1,1)); + } + + emitpcode(POC_GOTO,popGetLabel(IC_TRUE(ic)->key)); + pic14_emitcode(" goto","_%05d_DS_",IC_TRUE(ic)->key+100 + labelOffset); + + } + else { + /* false label is present */ + if(strcmp(jval,"a") == 0) + emitSKPNZ; + else if (strcmp(jval,"c") == 0) + emitSKPNC; + else { + DEBUGpic14_emitcode ("; ***","%d - assuming %s is in bit space",__LINE__,jval); + emitpcode(POC_BTFSS, newpCodeOpBit(jval,-1,1)); + } + + emitpcode(POC_GOTO,popGetLabel(IC_FALSE(ic)->key)); + pic14_emitcode(" goto","_%05d_DS_",IC_FALSE(ic)->key+100 + labelOffset); + + } + + + /* mark the icode as generated */ + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genSkipc */ +/*-----------------------------------------------------------------*/ +static void genSkipc(resolvedIfx *rifx) +{ + FENTRY; + if(!rifx) + return; + + if(rifx->condition) + emitSKPNC; + else + emitSKPC; + + emitpcode(POC_GOTO,popGetLabel(rifx->lbl->key)); + emitpComment ("%s:%u: created from rifx:%p", __FUNCTION__, __LINE__, rifx); + rifx->generated = 1; +} + +#define isAOP_REGlike(x) (AOP_TYPE(x) == AOP_REG || AOP_TYPE(x) == AOP_DIR || AOP_TYPE(x) == AOP_PCODE) +#define isAOP_LIT(x) (AOP_TYPE(x) == AOP_LIT) +#define DEBUGpc emitpComment + +/*-----------------------------------------------------------------*/ +/* mov2w_regOrLit :- move to WREG either the offset's byte from */ +/* aop (if it's NOT a literal) or from lit (if */ +/* aop is a literal) */ +/*-----------------------------------------------------------------*/ +static void pic14_mov2w_regOrLit (asmop *aop, unsigned long lit, int offset) +{ + if (aop->type == AOP_LIT) { + emitpcode (POC_MOVLW, popGetLit((lit >> (offset*8)) & 0x00FF)); + } else { + emitpcode (POC_MOVFW, popGet (aop, offset)); + } +} + +/* genCmp performs a left < right comparison, stores + * the outcome in result (if != NULL) and generates + * control flow code for the ifx (if != NULL). + * + * This version leaves in sequences like + * "B[CS]F STATUS,0; BTFS[CS] STATUS,0" + * which should be optmized by the peephole + * optimizer - RN 2005-01-01 */ +static void genCmp (operand *left,operand *right, + operand *result, iCode *ifx, int sign) +{ + resolvedIfx rIfx; + int size; + int offs; + symbol *templbl; + operand *dummy; + unsigned long lit; + unsigned long mask; + int performedLt; + int invert_result = 0; + + FENTRY; + + assert (AOP_SIZE(left) == AOP_SIZE(right)); + assert (left && right); + + size = AOP_SIZE(right) - 1; + mask = (0x100UL << (size*8)) - 1; + // in the end CARRY holds "left < right" (performedLt == 1) or "left >= right" (performedLt == 0) + performedLt = 1; + templbl = NULL; + lit = 0; + + resolveIfx (&rIfx, ifx); + + /********************************************************************** + * handle bits - bit compares are promoted to int compares seemingly! * + **********************************************************************/ +#if 0 + // THIS IS COMPLETELY UNTESTED! + if (AOP_TYPE(left) == AOP_CRY && AOP_TYPE(right) == AOP_CRY) { + pCodeOp *pcleft = pic16_popGet(AOP(left), 0); + pCodeOp *pcright = pic16_popGet(AOP(right), 0); + assert (pcleft->type == PO_GPR_BIT && pcright->type == PO_GPR_BIT); + + emitSETC; + // 1 < {0,1} is false --> clear C by skipping the next instruction + //pic16_emitpcode (POC_BTFSS, pic16_popCopyGPR2Bit (AOP(left),0), PCORB(pcleft)->bit); + pic16_emitpcode (POC_BTFSS, pic16_popGet (AOP(left), 0)); + // {0,1} < 0 is false --> clear C by NOT skipping the next instruction + pic16_emitpcode (POC_BTFSS, pic16_popCopyGPR2Bit (pic16_popGet(AOP(right),0), PCORB(pcright)->bit)); + emitCLRC; // only skipped for left=0 && right=1 + + goto correct_result_in_carry; + } // if +#endif + + /************************************************* + * make sure that left is register (or the like) * + *************************************************/ + if (!isAOP_REGlike(left)) { + DEBUGpc ("swapping arguments (AOP_TYPEs %d/%d)", AOP_TYPE(left), AOP_TYPE(right)); + assert (isAOP_LIT(left)); + assert (isAOP_REGlike(right)); + // swap left and right + // left < right <==> right > left <==> (right >= left + 1) + lit = ulFromVal(AOP(left)->aopu.aop_lit); + + if ( (!sign && (lit & mask) == mask) || (sign && (lit & mask) == (mask >> 1)) ) { + // MAXVALUE < right? always false + if (performedLt) emitCLRC; else emitSETC; + goto correct_result_in_carry; + } // if + + // This fails for lit = 0xFF (unsigned) AND lit = 0x7F (signed), + // that's why we handled it above. + lit++; + + dummy = left; + left = right; + right = dummy; + + performedLt ^= 1; // instead of "left < right" we check for "right >= left+1, i.e. "right < left+1" + } else if (isAOP_LIT(right)) { + lit = ulFromVal(AOP(right)->aopu.aop_lit); + } // if + + assert (isAOP_REGlike(left)); // left must be register or the like + assert (isAOP_REGlike(right) || isAOP_LIT(right)); // right may be register-like or a literal + + /************************************************* + * special cases go here * + *************************************************/ + + if (isAOP_LIT(right)) { + if (!sign) { + // unsigned comparison to a literal + DEBUGpc ("unsigned compare: left %s lit(0x%X=%lu), size=%d", performedLt ? "<" : ">=", lit, lit, size+1); + if (lit == 0) { + // unsigned left < 0? always false + if (performedLt) emitCLRC; else emitSETC; + goto correct_result_in_carry; + } + } else { + // signed comparison to a literal + DEBUGpc ("signed compare: left %s lit(0x%X=%ld), size=%d, mask=%x", performedLt ? "<" : ">=", lit, lit, size+1, mask); + if ((lit & mask) == ((0x80 << (size*8)) & mask)) { + // signed left < 0x80000000? always false + if (performedLt) emitCLRC; else emitSETC; + goto correct_result_in_carry; + } else if (lit == 0) { + // compare left < 0; set CARRY if SIGNBIT(left) is set + if (performedLt) emitSETC; else emitCLRC; + emitpcode (POC_BTFSS, newpCodeOpBit (aopGet (AOP(left), size, FALSE, FALSE), 7, 0)); + if (performedLt) emitCLRC; else emitSETC; + goto correct_result_in_carry; + } + } // if (!sign) + } // right is literal + + /************************************************* + * perform a general case comparison * + * make sure we get CARRY==1 <==> left >= right * + *************************************************/ + // compare most significant bytes + //DEBUGpc ("comparing bytes at offset %d", size); + if (!sign) { + // unsigned comparison + pic14_mov2w_regOrLit (AOP(right), lit, size); + emitpcode (POC_SUBFW, popGet (AOP(left), size)); + } else { + // signed comparison + // (add 2^n to both operands then perform an unsigned comparison) + if (isAOP_LIT(right)) { + // left >= LIT <-> LIT-left <= 0 <-> LIT-left == 0 OR !(LIT-left >= 0) + unsigned char litbyte = (lit >> (8*size)) & 0xFF; + + if (litbyte == 0x80) { + // left >= 0x80 -- always true, but more bytes to come + mov2w (AOP(left), size); + emitpcode (POC_XORLW, popGetLit (0x80)); // set ZERO flag + emitSETC; + } else { + // left >= LIT <-> left + (-LIT) >= 0 <-> left + (0x100-LIT) >= 0x100 + mov2w (AOP(left), size); + emitpcode (POC_ADDLW, popGetLit (0x80)); + emitpcode (POC_ADDLW, popGetLit ((0x100 - (litbyte + 0x80)) & 0x00FF)); + } // if + } else { + pCodeOp *pctemp = popGetTempReg(); + mov2w (AOP(left), size); + emitpcode (POC_ADDLW, popGetLit (0x80)); + emitpcode (POC_MOVWF, pctemp); + mov2w (AOP(right), size); + emitpcode (POC_ADDLW, popGetLit (0x80)); + emitpcode (POC_SUBFW, pctemp); + popReleaseTempReg(pctemp); + } + } // if (!sign) + + // compare remaining bytes (treat as unsigned case from above) + templbl = newiTempLabel ( NULL ); + offs = size; + while (offs--) { + //DEBUGpc ("comparing bytes at offset %d", offs); + emitSKPZ; + emitpcode (POC_GOTO, popGetLabel (templbl->key)); + pic14_mov2w_regOrLit (AOP(right), lit, offs); + emitpcode (POC_SUBFW, popGet (AOP(left), offs)); + } // while (offs) + emitpLabel (templbl->key); + goto result_in_carry; + +result_in_carry: + + /**************************************************** + * now CARRY contains the result of the comparison: * + * SUBWF sets CARRY iff * + * F-W >= 0 <==> F >= W <==> !(F < W) * + * (F=left, W=right) * + ****************************************************/ + + if (performedLt) { + invert_result = 1; + // value will be used in the following genSkipc() + rIfx.condition ^= 1; + } // if + +correct_result_in_carry: + + // assign result to variable (if neccessary) + if (result && AOP_TYPE(result) != AOP_CRY) { + //DEBUGpc ("assign result"); + size = AOP_SIZE(result); + while (size--) { + emitpcode (POC_CLRF, popGet (AOP(result), size)); + } // while + if (invert_result) { + emitSKPC; + emitpcode (POC_BSF, newpCodeOpBit (aopGet (AOP(result), 0, FALSE, FALSE), 0, 0)); + } else { + emitpcode (POC_RLF, popGet (AOP(result), 0)); + } + } // if (result) + + // perform conditional jump + if (ifx) { + //DEBUGpc ("generate control flow"); + genSkipc (&rIfx); + ifx->generated = 1; + } // if +} + +/*-----------------------------------------------------------------*/ +/* genCmpGt :- greater than comparison */ +/*-----------------------------------------------------------------*/ +static void genCmpGt (iCode *ic, iCode *ifx) +{ + operand *left, *right, *result; + sym_link *letype , *retype; + int sign ; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + left = IC_LEFT(ic); + right= IC_RIGHT(ic); + result = IC_RESULT(ic); + + letype = getSpec(operandType(left)); + retype =getSpec(operandType(right)); + sign = !(SPEC_USIGN(letype) | SPEC_USIGN(retype)); + /* assign the amsops */ + aopOp (left,ic,FALSE); + aopOp (right,ic,FALSE); + aopOp (result,ic,TRUE); + + genCmp(right, left, result, ifx, sign); + + freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genCmpLt - less than comparisons */ +/*-----------------------------------------------------------------*/ +static void genCmpLt (iCode *ic, iCode *ifx) +{ + operand *left, *right, *result; + sym_link *letype , *retype; + int sign ; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + left = IC_LEFT(ic); + right= IC_RIGHT(ic); + result = IC_RESULT(ic); + + letype = getSpec(operandType(left)); + retype =getSpec(operandType(right)); + sign = !(SPEC_USIGN(letype) | SPEC_USIGN(retype)); + + /* assign the amsops */ + aopOp (left,ic,FALSE); + aopOp (right,ic,FALSE); + aopOp (result,ic,TRUE); + + genCmp(left, right, result, ifx, sign); + + freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genCmpEq - generates code for equal to */ +/*-----------------------------------------------------------------*/ +static void genCmpEq (iCode *ic, iCode *ifx) +{ + operand *left, *right, *result; + int size; + symbol *false_label; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if(ifx) + DEBUGpic14_emitcode ("; ifx is non-null",""); + else + DEBUGpic14_emitcode ("; ifx is null",""); + + aopOp((left=IC_LEFT(ic)),ic,FALSE); + aopOp((right=IC_RIGHT(ic)),ic,FALSE); + aopOp((result=IC_RESULT(ic)),ic,TRUE); + + DEBUGpic14_AopType(__LINE__,left,right,result); + + /* if literal, move literal to right */ + if (op_isLitLike (IC_LEFT(ic))) { + operand *tmp = right ; + right = left; + left = tmp; + } + + false_label = NULL; + if (ifx && !IC_TRUE(ifx)) + { + assert (IC_FALSE(ifx)); + false_label = IC_FALSE(ifx); + } + + size = min(AOP_SIZE(left),AOP_SIZE(right)); + assert(!pic14_sameRegs(AOP(result),AOP(left))); + assert(!pic14_sameRegs(AOP(result),AOP(right))); + + /* assume left != right */ + { + int i; + for (i=0; i < AOP_SIZE(result); i++) + { + emitpcode(POC_CLRF, popGet(AOP(result),i)); + } + } + + if (AOP_TYPE(right) == AOP_LIT) + { + unsigned long lit = ulFromVal (AOP(right)->aopu.aop_lit); + int i; + size = AOP_SIZE(left); + assert(!op_isLitLike(left)); + + switch (lit) + { + case 0: + mov2w(AOP(left), 0); + for (i=1; i < size; i++) + emitpcode(POC_IORFW,popGet(AOP(left),i)); + /* now Z is set iff `left == right' */ + emitSKPZ; + if (!false_label) false_label = newiTempLabel(NULL); + emitpcode(POC_GOTO, popGetLabel(false_label->key)); + break; + + default: + for (i=0; i < size; i++) + { + mov2w(AOP(left),i); + emitpcode(POC_XORLW, popGetLit(lit >> (8*i))); + /* now Z is cleared if `left != right' */ + emitSKPZ; + if (!false_label) false_label = newiTempLabel(NULL); + emitpcode(POC_GOTO, popGetLabel(false_label->key)); + } // for i + break; + } // switch (lit) + } + else + { + /* right is no literal */ + int i; + + for (i=0; i < size; i++) + { + mov2w(AOP(right),i); + emitpcode(POC_XORFW,popGet(AOP(left),i)); + /* now Z is cleared if `left != right' */ + emitSKPZ; + if (!false_label) false_label = newiTempLabel(NULL); + emitpcode(POC_GOTO, popGetLabel(false_label->key)); + } // for i + } + + /* if we reach here, left == right */ + + if (AOP_SIZE(result) > 0) + { + emitpcode(POC_INCF, popGet(AOP(result),0)); + } + + if (ifx && IC_TRUE(ifx)) + { + emitpcode(POC_GOTO,popGetLabel(IC_TRUE(ifx)->key)); + } + + if (false_label && (!ifx || IC_TRUE(ifx))) + emitpLabel(false_label->key); + + if (ifx) ifx->generated = 1; + + freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* ifxForOp - returns the icode containing the ifx for operand */ +/*-----------------------------------------------------------------*/ +static iCode *ifxForOp ( operand *op, iCode *ic ) +{ + FENTRY; + /* if true symbol then needs to be assigned */ + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if (IS_TRUE_SYMOP(op)) + return NULL ; + + /* if this has register type condition and + the next instruction is ifx with the same operand + and live to of the operand is upto the ifx only then */ + if (ic->next && + ic->next->op == IFX && + IC_COND(ic->next)->key == op->key && + OP_SYMBOL(op)->liveTo <= ic->next->seq ) + return ic->next; + + if (ic->next && + ic->next->op == IFX && + IC_COND(ic->next)->key == op->key) { + DEBUGpic14_emitcode ("; WARNING ","%d IGNORING liveTo range in %s",__LINE__,__FUNCTION__); + return ic->next; + } + + DEBUGpic14_emitcode ("; NULL :(","%d",__LINE__); + if (ic->next && + ic->next->op == IFX) + DEBUGpic14_emitcode ("; ic-next"," is an IFX"); + + if (ic->next && + ic->next->op == IFX && + IC_COND(ic->next)->key == op->key) { + DEBUGpic14_emitcode ("; "," key is okay"); + DEBUGpic14_emitcode ("; "," key liveTo %d, next->seq = %d", + OP_SYMBOL(op)->liveTo, + ic->next->seq); + } + + + return NULL; +} +/*-----------------------------------------------------------------*/ +/* genAndOp - for && operation */ +/*-----------------------------------------------------------------*/ +static void genAndOp (iCode *ic) +{ + operand *left,*right, *result; + /* symbol *tlbl; */ + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* note here that && operations that are in an + if statement are taken away by backPatchLabels + only those used in arthmetic operations remain */ + aopOp((left=IC_LEFT(ic)),ic,FALSE); + aopOp((right=IC_RIGHT(ic)),ic,FALSE); + aopOp((result=IC_RESULT(ic)),ic,FALSE); + + DEBUGpic14_AopType(__LINE__,left,right,result); + + emitpcode(POC_MOVFW,popGet(AOP(left),0)); + emitpcode(POC_ANDFW,popGet(AOP(right),0)); + emitpcode(POC_MOVWF,popGet(AOP(result),0)); + + /* if both are bit variables */ + /* if (AOP_TYPE(left) == AOP_CRY && */ + /* AOP_TYPE(right) == AOP_CRY ) { */ + /* pic14_emitcode("mov","c,%s",AOP(left)->aopu.aop_dir); */ + /* pic14_emitcode("anl","c,%s",AOP(right)->aopu.aop_dir); */ + /* pic14_outBitC(result); */ + /* } else { */ + /* tlbl = newiTempLabel(NULL); */ + /* pic14_toBoolean(left); */ + /* pic14_emitcode("jz","%05d_DS_",tlbl->key+100); */ + /* pic14_toBoolean(right); */ + /* pic14_emitcode("","%05d_DS_:",tlbl->key+100); */ + /* pic14_outBitAcc(result); */ + /* } */ + + freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(result,NULL,ic,TRUE); +} + + +/*-----------------------------------------------------------------*/ +/* genOrOp - for || operation */ +/*-----------------------------------------------------------------*/ +/* +tsd pic port - +modified this code, but it doesn't appear to ever get called +*/ + +static void genOrOp (iCode *ic) +{ + operand *left,*right, *result; + symbol *tlbl; + int i; + + /* note here that || operations that are in an + if statement are taken away by backPatchLabels + only those used in arthmetic operations remain */ + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + aopOp((left=IC_LEFT(ic)),ic,FALSE); + aopOp((right=IC_RIGHT(ic)),ic,FALSE); + aopOp((result=IC_RESULT(ic)),ic,FALSE); + + DEBUGpic14_AopType(__LINE__,left,right,result); + + for (i=0; i < AOP_SIZE(result); i++) + { + emitpcode(POC_CLRF, popGet(AOP(result), i)); + } // for i + + tlbl = newiTempLabel(NULL); + pic14_toBoolean(left); + emitSKPZ; + emitpcode(POC_GOTO, popGetLabel(tlbl->key)); + pic14_toBoolean(right); + emitpLabel(tlbl->key); + /* here Z is clear IFF `left || right' */ + emitSKPZ; + emitpcode(POC_INCF, popGet(AOP(result), 0)); + + freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* isLiteralBit - test if lit == 2^n */ +/*-----------------------------------------------------------------*/ +static int isLiteralBit(unsigned long lit) +{ + unsigned long pw[32] = {1L,2L,4L,8L,16L,32L,64L,128L, + 0x100L,0x200L,0x400L,0x800L, + 0x1000L,0x2000L,0x4000L,0x8000L, + 0x10000L,0x20000L,0x40000L,0x80000L, + 0x100000L,0x200000L,0x400000L,0x800000L, + 0x1000000L,0x2000000L,0x4000000L,0x8000000L, + 0x10000000L,0x20000000L,0x40000000L,0x80000000L}; + int idx; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + for(idx = 0; idx < 32; idx++) + if(lit == pw[idx]) + return idx+1; + return 0; +} + +/*-----------------------------------------------------------------*/ +/* continueIfTrue - */ +/*-----------------------------------------------------------------*/ +static void continueIfTrue (iCode *ic) +{ + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if(IC_TRUE(ic)) + { + // Why +100?!? + emitpcode(POC_GOTO, popGetLabel(IC_TRUE(ic)->key+100)); + pic14_emitcode("ljmp","%05d_DS_",IC_FALSE(ic)->key+100); + } + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* jmpIfTrue - */ +/*-----------------------------------------------------------------*/ +static void jumpIfTrue (iCode *ic) +{ + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if(!IC_TRUE(ic)) + { + // Why +100?!? + emitpcode(POC_GOTO, popGetLabel(IC_TRUE(ic)->key+100)); + pic14_emitcode("ljmp","%05d_DS_",IC_FALSE(ic)->key+100); + } + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* jmpTrueOrFalse - */ +/*-----------------------------------------------------------------*/ +static void jmpTrueOrFalse (iCode *ic, symbol *tlbl) +{ + FENTRY; + // ugly but optimized by peephole + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if(IC_TRUE(ic)){ + symbol *nlbl = newiTempLabel(NULL); + pic14_emitcode("sjmp","%05d_DS_",nlbl->key+100); + pic14_emitcode("","%05d_DS_:",tlbl->key+100); + pic14_emitcode("ljmp","%05d_DS_",IC_TRUE(ic)->key+100); + pic14_emitcode("","%05d_DS_:",nlbl->key+100); + } + else{ + pic14_emitcode("ljmp","%05d_DS_",IC_FALSE(ic)->key+100); + pic14_emitcode("","%05d_DS_:",tlbl->key+100); + } + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genAnd - code for and */ +/*-----------------------------------------------------------------*/ +static void genAnd (iCode *ic, iCode *ifx) +{ + operand *left, *right, *result; + int size, offset=0; + unsigned long lit = 0L; + int bytelit = 0; + resolvedIfx rIfx; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + aopOp((left = IC_LEFT(ic)),ic,FALSE); + aopOp((right= IC_RIGHT(ic)),ic,FALSE); + aopOp((result=IC_RESULT(ic)),ic,TRUE); + + resolveIfx(&rIfx,ifx); + + /* if left is a literal & right is not then exchange them */ + if ((AOP_TYPE(left) == AOP_LIT && AOP_TYPE(right) != AOP_LIT) || + AOP_NEEDSACC(left)) { + operand *tmp = right ; + right = left; + left = tmp; + } + + /* if result = right then exchange them */ + if(pic14_sameRegs(AOP(result),AOP(right))){ + operand *tmp = right ; + right = left; + left = tmp; + } + + /* if right is bit then exchange them */ + if (AOP_TYPE(right) == AOP_CRY && + AOP_TYPE(left) != AOP_CRY){ + operand *tmp = right ; + right = left; + left = tmp; + } + if(AOP_TYPE(right) == AOP_LIT) + lit = ulFromVal (AOP(right)->aopu.aop_lit); + + size = AOP_SIZE(result); + + DEBUGpic14_AopType(__LINE__,left,right,result); + + // if(bit & yy) + // result = bit & yy; + if (AOP_TYPE(left) == AOP_CRY){ + // c = bit & literal; + if(AOP_TYPE(right) == AOP_LIT){ + if(lit & 1) { + if(size && pic14_sameRegs(AOP(result),AOP(left))) + // no change + goto release; + pic14_emitcode("mov","c,%s",AOP(left)->aopu.aop_dir); + } else { + // bit(result) = 0; + if(size && (AOP_TYPE(result) == AOP_CRY)){ + pic14_emitcode("clr","%s",AOP(result)->aopu.aop_dir); + goto release; + } + if((AOP_TYPE(result) == AOP_CRY) && ifx){ + jumpIfTrue(ifx); + goto release; + } + pic14_emitcode("clr","c"); + } + } else { + if (AOP_TYPE(right) == AOP_CRY){ + // c = bit & bit; + pic14_emitcode("mov","c,%s",AOP(right)->aopu.aop_dir); + pic14_emitcode("anl","c,%s",AOP(left)->aopu.aop_dir); + } else { + // c = bit & val; + MOVA(aopGet(AOP(right),0,FALSE,FALSE)); + // c = lsb + pic14_emitcode("rrc","a"); + pic14_emitcode("anl","c,%s",AOP(left)->aopu.aop_dir); + } + } + // bit = c + // val = c + if(size) + pic14_outBitC(result); + // if(bit & ...) + else if((AOP_TYPE(result) == AOP_CRY) && ifx) + genIfxJump(ifx, "c"); + goto release ; + } + + // if(val & 0xZZ) - size = 0, ifx != FALSE - + // bit = val & 0xZZ - size = 1, ifx = FALSE - + if((AOP_TYPE(right) == AOP_LIT) && + (AOP_TYPE(result) == AOP_CRY) && + (AOP_TYPE(left) != AOP_CRY)){ + int posbit = isLiteralBit(lit); + /* left & 2^n */ + if(posbit){ + posbit--; + //MOVA(aopGet(AOP(left),posbit>>3,FALSE,FALSE)); + // bit = left & 2^n + if(size) + pic14_emitcode("mov","c,acc.%d",posbit&0x07); + // if(left & 2^n) + else{ + if(ifx){ + int offset = 0; + while (posbit > 7) { + posbit -= 8; + offset++; + } + emitpcode(((rIfx.condition) ? POC_BTFSC : POC_BTFSS), + newpCodeOpBit(aopGet(AOP(left),offset,FALSE,FALSE),posbit,0)); + emitpcode(POC_GOTO,popGetLabel(rIfx.lbl->key)); + + ifx->generated = 1; + } + goto release; + } + } else { + symbol *tlbl = newiTempLabel(NULL); + int sizel = AOP_SIZE(left); + if(size) + pic14_emitcode("setb","c"); + while(sizel--){ + if((bytelit = ((lit >> (offset*8)) & 0x0FFL)) != 0x0L){ + mov2w( AOP(left), offset); + // byte == 2^n ? + if((posbit = isLiteralBit(bytelit)) != 0) { + emitpcode(rIfx.condition ? POC_BTFSC : POC_BTFSS, // XXX: or the other way round? + newpCodeOpBit(aopGet(AOP(left),offset,FALSE,FALSE),posbit - 1, 0)); + pic14_emitcode("jb","acc.%d,%05d_DS_",(posbit-1)&0x07,tlbl->key+100); + } + else{ + emitpcode(POC_ANDLW, newpCodeOpLit(bytelit & 0x0ff)); + if (rIfx.condition) emitSKPZ; + else emitSKPNZ; + + if(bytelit != 0x0FFL) + { + pic14_emitcode("anl","a,%s", + aopGet(AOP(right),offset,FALSE,TRUE)); + } + pic14_emitcode("jnz","%05d_DS_",tlbl->key+100); + } + + emitpcode(POC_GOTO, popGetLabel(rIfx.lbl->key)); + ifx->generated = 1; + + } + offset++; + } + // bit = left & literal + if(size){ + pic14_emitcode("clr","c"); + pic14_emitcode("","%05d_DS_:",tlbl->key+100); + } + // if(left & literal) + else{ + if(ifx) + jmpTrueOrFalse(ifx, tlbl); + goto release ; + } + } + pic14_outBitC(result); + goto release ; + } + + /* if left is same as result */ + if(pic14_sameRegs(AOP(result),AOP(left))){ + int know_W = -1; + for(;size--; offset++,lit>>=8) { + if(AOP_TYPE(right) == AOP_LIT){ + switch(lit & 0xff) { + case 0x00: + /* and'ing with 0 has clears the result */ + emitpcode(POC_CLRF,popGet(AOP(result),offset)); + break; + case 0xff: + /* and'ing with 0xff is a nop when the result and left are the same */ + break; + + default: + { + int p = my_powof2( (~lit) & 0xff ); + if(p>=0) { + /* only one bit is set in the literal, so use a bcf instruction */ + emitpcode(POC_BCF,newpCodeOpBit(aopGet(AOP(left),offset,FALSE,FALSE),p,0)); + + } else { + if(know_W != (int)(lit&0xff)) + emitpcode(POC_MOVLW, popGetLit(lit & 0xff)); + know_W = lit &0xff; + emitpcode(POC_ANDWF,popGet(AOP(left),offset)); + } + } + } + } else { + emitpcode(POC_MOVFW,popGet(AOP(right),offset)); + emitpcode(POC_ANDWF,popGet(AOP(left),offset)); + } + } + + } else { + // left & result in different registers + if(AOP_TYPE(result) == AOP_CRY){ + // result = bit + // if(size), result in bit + // if(!size && ifx), conditional oper: if(left & right) + symbol *tlbl = newiTempLabel(NULL); + int sizer = min(AOP_SIZE(left),AOP_SIZE(right)); + if(size) + pic14_emitcode("setb","c"); + while(sizer--){ + MOVA(aopGet(AOP(right),offset,FALSE,FALSE)); + pic14_emitcode("anl","a,%s", + aopGet(AOP(left),offset,FALSE,FALSE)); + pic14_emitcode("jnz","%05d_DS_",tlbl->key+100); + offset++; + } + if(size){ + CLRC; + pic14_emitcode("","%05d_DS_:",tlbl->key+100); + pic14_outBitC(result); + } else if(ifx) + jmpTrueOrFalse(ifx, tlbl); + } else { + for(;(size--);offset++) { + // normal case + // result = left & right + if(AOP_TYPE(right) == AOP_LIT){ + int t = (lit >> (offset*8)) & 0x0FFL; + switch(t) { + case 0x00: + emitpcode(POC_CLRF,popGet(AOP(result),offset)); + break; + case 0xff: + emitpcode(POC_MOVFW,popGet(AOP(left),offset)); + emitpcode(POC_MOVWF,popGet(AOP(result),offset)); + break; + default: + emitpcode(POC_MOVLW, popGetLit(t)); + emitpcode(POC_ANDFW,popGet(AOP(left),offset)); + emitpcode(POC_MOVWF,popGet(AOP(result),offset)); + } + continue; + } + + emitpcode(POC_MOVFW,popGet(AOP(right),offset)); + emitpcode(POC_ANDFW,popGet(AOP(left),offset)); + emitpcode(POC_MOVWF,popGet(AOP(result),offset)); + } + } + } + +release : + freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genOr - code for or */ +/*-----------------------------------------------------------------*/ +static void genOr (iCode *ic, iCode *ifx) +{ + operand *left, *right, *result; + int size, offset=0; + unsigned long lit = 0L; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + aopOp((left = IC_LEFT(ic)),ic,FALSE); + aopOp((right= IC_RIGHT(ic)),ic,FALSE); + aopOp((result=IC_RESULT(ic)),ic,TRUE); + + DEBUGpic14_AopType(__LINE__,left,right,result); + + /* if left is a literal & right is not then exchange them */ + if ((AOP_TYPE(left) == AOP_LIT && AOP_TYPE(right) != AOP_LIT) || + AOP_NEEDSACC(left)) { + operand *tmp = right ; + right = left; + left = tmp; + } + + /* if result = right then exchange them */ + if(pic14_sameRegs(AOP(result),AOP(right))){ + operand *tmp = right ; + right = left; + left = tmp; + } + + /* if right is bit then exchange them */ + if (AOP_TYPE(right) == AOP_CRY && + AOP_TYPE(left) != AOP_CRY){ + operand *tmp = right ; + right = left; + left = tmp; + } + + DEBUGpic14_AopType(__LINE__,left,right,result); + + if(AOP_TYPE(right) == AOP_LIT) + lit = ulFromVal (AOP(right)->aopu.aop_lit); + + size = AOP_SIZE(result); + + // if(bit | yy) + // xx = bit | yy; + if (AOP_TYPE(left) == AOP_CRY){ + if(AOP_TYPE(right) == AOP_LIT){ + // c = bit & literal; + if(lit){ + // lit != 0 => result = 1 + if(AOP_TYPE(result) == AOP_CRY){ + if(size) + emitpcode(POC_BSF, popGet(AOP(result),0)); + //pic14_emitcode("bsf","(%s >> 3), (%s & 7)", + // AOP(result)->aopu.aop_dir, + // AOP(result)->aopu.aop_dir); + else if(ifx) + continueIfTrue(ifx); + goto release; + } + } else { + // lit == 0 => result = left + if(size && pic14_sameRegs(AOP(result),AOP(left))) + goto release; + pic14_emitcode(";XXX mov","c,%s %s,%d",AOP(left)->aopu.aop_dir,__FILE__,__LINE__); + } + } else { + if (AOP_TYPE(right) == AOP_CRY){ + if(pic14_sameRegs(AOP(result),AOP(left))){ + // c = bit | bit; + emitpcode(POC_BCF, popGet(AOP(result),0)); + emitpcode(POC_BTFSC, popGet(AOP(right),0)); + emitpcode(POC_BSF, popGet(AOP(result),0)); + + pic14_emitcode("bcf","(%s >> 3), (%s & 7)", + AOP(result)->aopu.aop_dir, + AOP(result)->aopu.aop_dir); + pic14_emitcode("btfsc","(%s >> 3), (%s & 7)", + AOP(right)->aopu.aop_dir, + AOP(right)->aopu.aop_dir); + pic14_emitcode("bsf","(%s >> 3), (%s & 7)", + AOP(result)->aopu.aop_dir, + AOP(result)->aopu.aop_dir); + } else { + emitpcode(POC_BCF, popGet(AOP(result),0)); + emitpcode(POC_BTFSS, popGet(AOP(right),0)); + emitpcode(POC_BTFSC, popGet(AOP(left),0)); + emitpcode(POC_BSF, popGet(AOP(result),0)); + } + } else { + // c = bit | val; + symbol *tlbl = newiTempLabel(NULL); + pic14_emitcode(";XXX "," %s,%d",__FILE__,__LINE__); + + + emitpcode(POC_BCF, popGet(AOP(result),0)); + + if(!((AOP_TYPE(result) == AOP_CRY) && ifx)) + pic14_emitcode(";XXX setb","c"); + pic14_emitcode(";XXX jb","%s,%05d_DS_", + AOP(left)->aopu.aop_dir,tlbl->key+100); + pic14_toBoolean(right); + pic14_emitcode(";XXX jnz","%05d_DS_",tlbl->key+100); + if((AOP_TYPE(result) == AOP_CRY) && ifx){ + jmpTrueOrFalse(ifx, tlbl); + goto release; + } else { + CLRC; + pic14_emitcode("","%05d_DS_:",tlbl->key+100); + } + } + } + // bit = c + // val = c + if(size) + pic14_outBitC(result); + // if(bit | ...) + else if((AOP_TYPE(result) == AOP_CRY) && ifx) + genIfxJump(ifx, "c"); + goto release ; + } + + // if(val | 0xZZ) - size = 0, ifx != FALSE - + // bit = val | 0xZZ - size = 1, ifx = FALSE - + if((AOP_TYPE(right) == AOP_LIT) && + (AOP_TYPE(result) == AOP_CRY) && + (AOP_TYPE(left) != AOP_CRY)){ + if(lit){ + pic14_emitcode(";XXX "," %s,%d",__FILE__,__LINE__); + // result = 1 + if(size) + pic14_emitcode(";XXX setb","%s",AOP(result)->aopu.aop_dir); + else + continueIfTrue(ifx); + goto release; + } else { + pic14_emitcode(";XXX "," %s,%d",__FILE__,__LINE__); + // lit = 0, result = boolean(left) + if(size) + pic14_emitcode(";XXX setb","c"); + pic14_toBoolean(right); + if(size){ + symbol *tlbl = newiTempLabel(NULL); + pic14_emitcode(";XXX jnz","%05d_DS_",tlbl->key+100); + CLRC; + pic14_emitcode("","%05d_DS_:",tlbl->key+100); + } else { + genIfxJump (ifx,"a"); + goto release; + } + } + pic14_outBitC(result); + goto release ; + } + + /* if left is same as result */ + if(pic14_sameRegs(AOP(result),AOP(left))){ + int know_W = -1; + for(;size--; offset++,lit>>=8) { + if(AOP_TYPE(right) == AOP_LIT){ + if((lit & 0xff) == 0) + /* or'ing with 0 has no effect */ + continue; + else { + int p = my_powof2(lit & 0xff); + if(p>=0) { + /* only one bit is set in the literal, so use a bsf instruction */ + emitpcode(POC_BSF, + newpCodeOpBit(aopGet(AOP(left),offset,FALSE,FALSE),p,0)); + } else { + if(know_W != (int)(lit & 0xff)) + emitpcode(POC_MOVLW, popGetLit(lit & 0xff)); + know_W = lit & 0xff; + emitpcode(POC_IORWF, popGet(AOP(left),offset)); + } + + } + } else { + emitpcode(POC_MOVFW, popGet(AOP(right),offset)); + emitpcode(POC_IORWF, popGet(AOP(left),offset)); + } + } + } else { + // left & result in different registers + if(AOP_TYPE(result) == AOP_CRY){ + // result = bit + // if(size), result in bit + // if(!size && ifx), conditional oper: if(left | right) + symbol *tlbl = newiTempLabel(NULL); + int sizer = max(AOP_SIZE(left),AOP_SIZE(right)); + pic14_emitcode(";XXX "," %s,%d",__FILE__,__LINE__); + + + if(size) + pic14_emitcode(";XXX setb","c"); + while(sizer--){ + MOVA(aopGet(AOP(right),offset,FALSE,FALSE)); + pic14_emitcode(";XXX orl","a,%s", + aopGet(AOP(left),offset,FALSE,FALSE)); + pic14_emitcode(";XXX jnz","%05d_DS_",tlbl->key+100); + offset++; + } + if(size){ + CLRC; + pic14_emitcode("","%05d_DS_:",tlbl->key+100); + pic14_outBitC(result); + } else if(ifx) + jmpTrueOrFalse(ifx, tlbl); + } else for(;(size--);offset++){ + // normal case + // result = left | right + if(AOP_TYPE(right) == AOP_LIT){ + int t = (lit >> (offset*8)) & 0x0FFL; + switch(t) { + case 0x00: + emitpcode(POC_MOVFW, popGet(AOP(left),offset)); + emitpcode(POC_MOVWF, popGet(AOP(result),offset)); + + break; + default: + emitpcode(POC_MOVLW, popGetLit(t)); + emitpcode(POC_IORFW, popGet(AOP(left),offset)); + emitpcode(POC_MOVWF, popGet(AOP(result),offset)); + } + continue; + } + + // faster than result <- left, anl result,right + // and better if result is SFR + emitpcode(POC_MOVFW,popGet(AOP(right),offset)); + emitpcode(POC_IORFW,popGet(AOP(left),offset)); + emitpcode(POC_MOVWF, popGet(AOP(result),offset)); + } + } + +release : + freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genXor - code for xclusive or */ +/*-----------------------------------------------------------------*/ +static void genXor (iCode *ic, iCode *ifx) +{ + operand *left, *right, *result; + int size, offset=0; + unsigned long lit = 0L; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + aopOp((left = IC_LEFT(ic)),ic,FALSE); + aopOp((right= IC_RIGHT(ic)),ic,FALSE); + aopOp((result=IC_RESULT(ic)),ic,TRUE); + + /* if left is a literal & right is not || + if left needs acc & right does not */ + if ((AOP_TYPE(left) == AOP_LIT && AOP_TYPE(right) != AOP_LIT) || + (AOP_NEEDSACC(left) && !AOP_NEEDSACC(right))) { + operand *tmp = right ; + right = left; + left = tmp; + } + + /* if result = right then exchange them */ + if(pic14_sameRegs(AOP(result),AOP(right))){ + operand *tmp = right ; + right = left; + left = tmp; + } + + /* if right is bit then exchange them */ + if (AOP_TYPE(right) == AOP_CRY && + AOP_TYPE(left) != AOP_CRY){ + operand *tmp = right ; + right = left; + left = tmp; + } + if(AOP_TYPE(right) == AOP_LIT) + lit = ulFromVal (AOP(right)->aopu.aop_lit); + + size = AOP_SIZE(result); + + // if(bit ^ yy) + // xx = bit ^ yy; + if (AOP_TYPE(left) == AOP_CRY){ + if(AOP_TYPE(right) == AOP_LIT){ + // c = bit & literal; + if(lit>>1){ + // lit>>1 != 0 => result = 1 + if(AOP_TYPE(result) == AOP_CRY){ + if(size) + {emitpcode(POC_BSF, popGet(AOP(result),offset)); + pic14_emitcode("setb","%s",AOP(result)->aopu.aop_dir);} + else if(ifx) + continueIfTrue(ifx); + goto release; + } + pic14_emitcode("setb","c"); + } else{ + // lit == (0 or 1) + if(lit == 0){ + // lit == 0, result = left + if(size && pic14_sameRegs(AOP(result),AOP(left))) + goto release; + pic14_emitcode("mov","c,%s",AOP(left)->aopu.aop_dir); + } else{ + // lit == 1, result = not(left) + if(size && pic14_sameRegs(AOP(result),AOP(left))){ + emitpcode(POC_MOVLW, popGet(AOP(result),offset)); + emitpcode(POC_XORWF, popGet(AOP(result),offset)); + pic14_emitcode("cpl","%s",AOP(result)->aopu.aop_dir); + goto release; + } else { + assert ( !"incomplete genXor" ); + pic14_emitcode("mov","c,%s",AOP(left)->aopu.aop_dir); + pic14_emitcode("cpl","c"); + } + } + } + + } else { + // right != literal + symbol *tlbl = newiTempLabel(NULL); + if (AOP_TYPE(right) == AOP_CRY){ + // c = bit ^ bit; + pic14_emitcode("mov","c,%s",AOP(right)->aopu.aop_dir); + } + else{ + int sizer = AOP_SIZE(right); + // c = bit ^ val + // if val>>1 != 0, result = 1 + pic14_emitcode("setb","c"); + while(sizer){ + MOVA(aopGet(AOP(right),sizer-1,FALSE,FALSE)); + if(sizer == 1) + // test the msb of the lsb + pic14_emitcode("anl","a,#0xfe"); + pic14_emitcode("jnz","%05d_DS_",tlbl->key+100); + sizer--; + } + // val = (0,1) + pic14_emitcode("rrc","a"); + } + pic14_emitcode("jnb","%s,%05d_DS_",AOP(left)->aopu.aop_dir,(tlbl->key+100)); + pic14_emitcode("cpl","c"); + pic14_emitcode("","%05d_DS_:",(tlbl->key+100)); + } + // bit = c + // val = c + if(size) + pic14_outBitC(result); + // if(bit | ...) + else if((AOP_TYPE(result) == AOP_CRY) && ifx) + genIfxJump(ifx, "c"); + goto release ; + } + + if(pic14_sameRegs(AOP(result),AOP(left))){ + /* if left is same as result */ + for(;size--; offset++) { + if(AOP_TYPE(right) == AOP_LIT){ + int t = (lit >> (offset*8)) & 0x0FFL; + if(t == 0x00L) + continue; + else { + emitpcode(POC_MOVLW, popGetLit(t)); + emitpcode(POC_XORWF,popGet(AOP(left),offset)); + } + } else { + emitpcode(POC_MOVFW,popGet(AOP(right),offset)); + emitpcode(POC_XORWF,popGet(AOP(left),offset)); + } + } + } else { + // left & result in different registers + if(AOP_TYPE(result) == AOP_CRY){ + // result = bit + // if(size), result in bit + // if(!size && ifx), conditional oper: if(left ^ right) + symbol *tlbl = newiTempLabel(NULL); + int sizer = max(AOP_SIZE(left),AOP_SIZE(right)); + if(size) + pic14_emitcode("setb","c"); + while(sizer--){ + if((AOP_TYPE(right) == AOP_LIT) && + (((lit >> (offset*8)) & 0x0FFL) == 0x00L)){ + MOVA(aopGet(AOP(left),offset,FALSE,FALSE)); + } else { + MOVA(aopGet(AOP(right),offset,FALSE,FALSE)); + pic14_emitcode("xrl","a,%s", + aopGet(AOP(left),offset,FALSE,FALSE)); + } + pic14_emitcode("jnz","%05d_DS_",tlbl->key+100); + offset++; + } + if(size){ + CLRC; + pic14_emitcode("","%05d_DS_:",tlbl->key+100); + pic14_outBitC(result); + } else if(ifx) + jmpTrueOrFalse(ifx, tlbl); + } else for(;(size--);offset++){ + // normal case + // result = left & right + if(AOP_TYPE(right) == AOP_LIT){ + int t = (lit >> (offset*8)) & 0x0FFL; + switch(t) { + case 0x00: + emitpcode(POC_MOVFW,popGet(AOP(left),offset)); + emitpcode(POC_MOVWF,popGet(AOP(result),offset)); + break; + case 0xff: + emitpcode(POC_COMFW,popGet(AOP(left),offset)); + emitpcode(POC_MOVWF,popGet(AOP(result),offset)); + break; + default: + emitpcode(POC_MOVLW, popGetLit(t)); + emitpcode(POC_XORFW,popGet(AOP(left),offset)); + emitpcode(POC_MOVWF,popGet(AOP(result),offset)); + } + continue; + } + + // faster than result <- left, anl result,right + // and better if result is SFR + emitpcode(POC_MOVFW,popGet(AOP(right),offset)); + emitpcode(POC_XORFW,popGet(AOP(left),offset)); + emitpcode(POC_MOVWF,popGet(AOP(result),offset)); + } + } + +release : + freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genInline - write the inline code out */ +/*-----------------------------------------------------------------*/ +static void genInline (iCode *ic) +{ + char *buffer, *bp, *bp1; + bool inComment = FALSE; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + _G.inLine += (!options.asmpeep); + + buffer = bp = bp1 = Safe_strdup (IC_INLINE (ic)); + + while (*bp) + { + switch (*bp) + { + case ';': + inComment = TRUE; + ++bp; + break; + + case '\n': + inComment = FALSE; + *bp++ = '\0'; + if (*bp1) + addpCode2pBlock(pb, newpCodeAsmDir(bp1, NULL)); // inline directly, no process + bp1 = bp; + break; + + default: + /* Add \n for labels, not dirs such as c:\mydir */ + if (!inComment && (*bp == ':') && (isspace((unsigned char)bp[1]))) + { + ++bp; + *bp = '\0'; + ++bp; + /* print label, use this special format with NULL directive + * to denote that the argument should not be indented with tab */ + addpCode2pBlock(pb, newpCodeAsmDir(NULL, bp1)); // inline directly, no process + bp1 = bp; + } + else + ++bp; + break; + } + } + if ((bp1 != bp) && *bp1) + addpCode2pBlock(pb, newpCodeAsmDir(bp1, NULL)); // inline directly, no process + + Safe_free (buffer); + + _G.inLine -= (!options.asmpeep); +} + +/*-----------------------------------------------------------------*/ +/* genRRC - rotate right with carry */ +/*-----------------------------------------------------------------*/ +static void genRRC (iCode *ic) +{ + operand *left , *result ; + int size, offset = 0, same; + + FENTRY; + /* rotate right with carry */ + left = IC_LEFT(ic); + result=IC_RESULT(ic); + aopOp (left,ic,FALSE); + aopOp (result,ic,FALSE); + + DEBUGpic14_AopType(__LINE__,left,NULL,result); + + same = pic14_sameRegs(AOP(result),AOP(left)); + + size = AOP_SIZE(result); + + /* get the lsb and put it into the carry */ + emitpcode(POC_RRFW, popGet(AOP(left),size-1)); + + offset = 0 ; + + while(size--) { + + if(same) { + emitpcode(POC_RRF, popGet(AOP(left),offset)); + } else { + emitpcode(POC_RRFW, popGet(AOP(left),offset)); + emitpcode(POC_MOVWF, popGet(AOP(result),offset)); + } + + offset++; + } + + freeAsmop(left,NULL,ic,TRUE); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genRLC - generate code for rotate left with carry */ +/*-----------------------------------------------------------------*/ +static void genRLC (iCode *ic) +{ + operand *left , *result ; + int size, offset = 0; + int same; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* rotate right with carry */ + left = IC_LEFT(ic); + result=IC_RESULT(ic); + aopOp (left,ic,FALSE); + aopOp (result,ic,FALSE); + + DEBUGpic14_AopType(__LINE__,left,NULL,result); + + same = pic14_sameRegs(AOP(result),AOP(left)); + + /* move it to the result */ + size = AOP_SIZE(result); + + /* get the msb and put it into the carry */ + emitpcode(POC_RLFW, popGet(AOP(left),size-1)); + + offset = 0 ; + + while(size--) { + + if(same) { + emitpcode(POC_RLF, popGet(AOP(left),offset)); + } else { + emitpcode(POC_RLFW, popGet(AOP(left),offset)); + emitpcode(POC_MOVWF, popGet(AOP(result),offset)); + } + + offset++; + } + + + freeAsmop(left,NULL,ic,TRUE); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genGetHbit - generates code get highest order bit */ +/*-----------------------------------------------------------------*/ +static void genGetHbit (iCode *ic) +{ + operand *left, *result; + left = IC_LEFT(ic); + result=IC_RESULT(ic); + aopOp (left,ic,FALSE); + aopOp (result,ic,FALSE); + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* get the highest order byte into a */ + MOVA(aopGet(AOP(left),AOP_SIZE(left) - 1,FALSE,FALSE)); + if(AOP_TYPE(result) == AOP_CRY){ + pic14_emitcode("rlc","a"); + pic14_outBitC(result); + } + else{ + pic14_emitcode("rl","a"); + pic14_emitcode("anl","a,#0x01"); + pic14_outAcc(result); + } + + + freeAsmop(left,NULL,ic,TRUE); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* AccLsh - shift left accumulator by known count */ +/* MARK: pic14 always rotates through CARRY! */ +/*-----------------------------------------------------------------*/ +static void AccLsh (pCodeOp *pcop,int shCount) +{ + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + shCount &= 0x0007; // shCount : 0..7 + switch(shCount){ + case 0 : + return; + break; + case 1 : + emitCLRC; + emitpcode(POC_RLF,pcop); + return; + break; + case 2 : + emitpcode(POC_RLF,pcop); + emitpcode(POC_RLF,pcop); + break; + case 3 : + emitpcode(POC_RLF,pcop); + emitpcode(POC_RLF,pcop); + emitpcode(POC_RLF,pcop); + break; + case 4 : + emitpcode(POC_SWAPF,pcop); + break; + case 5 : + emitpcode(POC_SWAPF,pcop); + emitpcode(POC_RLF,pcop); + break; + case 6 : + emitpcode(POC_SWAPF,pcop); + emitpcode(POC_RLF,pcop); + emitpcode(POC_RLF,pcop); + break; + case 7 : + emitpcode(POC_RRFW,pcop); + emitpcode(POC_RRF,pcop); + break; + } + /* clear invalid bits */ + emitpcode(POC_MOVLW, popGetLit ((unsigned char)(~((1UL << shCount) - 1)))); + emitpcode(POC_ANDWF, pcop); +} + +/*-----------------------------------------------------------------*/ +/* AccRsh - shift right accumulator by known count */ +/* MARK: pic14 always rotates through CARRY! */ +/* maskmode - 0: leave invalid bits undefined (caller should mask) */ +/* 1: mask out invalid bits (zero-extend) */ +/* 2: sign-extend result (pretty slow) */ +/*-----------------------------------------------------------------*/ +static void AccRsh (pCodeOp *pcop,int shCount, int mask_mode) +{ + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + shCount &= 0x0007; // shCount : 0..7 + switch(shCount){ + case 0 : + return; + break; + case 1 : + /* load sign if needed */ + if (mask_mode == 2) emitpcode(POC_RLFW,pcop); + else if (mask_mode == 1) emitCLRC; + emitpcode(POC_RRF,pcop); + return; + break; + case 2 : + /* load sign if needed */ + if (mask_mode == 2) emitpcode(POC_RLFW,pcop); + emitpcode(POC_RRF,pcop); + /* load sign if needed */ + if (mask_mode == 2) emitpcode(POC_RLFW,pcop); + emitpcode(POC_RRF,pcop); + if (mask_mode == 2) return; + break; + case 3 : + /* load sign if needed */ + if (mask_mode == 2) emitpcode(POC_RLFW,pcop); + emitpcode(POC_RRF,pcop); + /* load sign if needed */ + if (mask_mode == 2) emitpcode(POC_RLFW,pcop); + emitpcode(POC_RRF,pcop); + /* load sign if needed */ + if (mask_mode == 2) emitpcode(POC_RLFW,pcop); + emitpcode(POC_RRF,pcop); + if (mask_mode == 2) return; + break; + case 4 : + emitpcode(POC_SWAPF,pcop); + break; + case 5 : + emitpcode(POC_SWAPF,pcop); + emitpcode(POC_RRF,pcop); + break; + case 6 : + emitpcode(POC_SWAPF,pcop); + emitpcode(POC_RRF,pcop); + emitpcode(POC_RRF,pcop); + break; + case 7 : + if (mask_mode == 2) + { + /* load sign */ + emitpcode(POC_RLFW,pcop); + emitpcode(POC_CLRF,pcop); + emitSKPNC; + emitpcode(POC_COMF,pcop); + return; + } else { + emitpcode(POC_RLFW,pcop); + emitpcode(POC_RLF,pcop); + } + break; + } + + if (mask_mode == 0) + { + /* leave invalid bits undefined */ + return; + } + + /* clear invalid bits -- zero-extend */ + emitpcode(POC_MOVLW, popGetLit (0x00ff >> shCount)); + emitpcode(POC_ANDWF, pcop); + + if (mask_mode == 2) { + /* sign-extend */ + emitpcode(POC_MOVLW, popGetLit (0x00ff << (8 - shCount))); + emitpcode(POC_BTFSC, newpCodeOpBit (get_op(pcop,NULL,0), 7 - shCount ,0)); + emitpcode(POC_IORWF, pcop); + } +} + +/*-----------------------------------------------------------------*/ +/* movLeft2Result - move byte from left to result */ +/*-----------------------------------------------------------------*/ +static void movLeft2Result (operand *left, int offl, + operand *result, int offr) +{ + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if(!pic14_sameRegs(AOP(left),AOP(result)) || (offl != offr)){ + aopGet(AOP(left),offl,FALSE,FALSE); + + emitpcode(POC_MOVFW, popGet(AOP(left),offl)); + emitpcode(POC_MOVWF, popGet(AOP(result),offr)); + } +} + +/*-----------------------------------------------------------------*/ +/* shiftLeft_Left2ResultLit - shift left by known count */ +/*-----------------------------------------------------------------*/ + +static void shiftLeft_Left2ResultLit (operand *left, operand *result, int shCount) +{ + int size, same, offr, i; + + size = AOP_SIZE(left); + if (AOP_SIZE(result) < size) size = AOP_SIZE(result); + + same = pic14_sameRegs (AOP(left), AOP(result)); + + offr = shCount / 8; + shCount = shCount & 0x07; + + size -= offr; + + switch (shCount) + { + case 0: /* takes 0 or 2N cycles (for offr==0) */ + if (!same || offr) { + for (i=size-1; i >= 0; i--) + movLeft2Result (left, i, result, offr + i); + } // if + break; + + case 1: /* takes 1N+1 or 2N+1 cycles (or offr==0) */ + if (same && offr) { + shiftLeft_Left2ResultLit (left, result, 8 * offr); + shiftLeft_Left2ResultLit (result, result, shCount); + return; /* prevent clearing result again */ + } else { + emitCLRC; + for (i=0; i < size; i++) { + if (same && !offr) { + emitpcode (POC_RLF, popGet (AOP(left), i)); + } else { + emitpcode (POC_RLFW, popGet (AOP(left), i)); + emitpcode (POC_MOVWF, popGet (AOP(result), i + offr)); + } // if + } // for + } // if (offr) + break; + + case 4: /* takes 3+5(N-1) = 5N-2 cycles (for offr==0) */ + /* works in-place/with offr as well */ + emitpcode (POC_SWAPFW, popGet (AOP(left), size-1)); + emitpcode (POC_ANDLW, popGetLit (0xF0)); + emitpcode (POC_MOVWF, popGet(AOP(result), size-1+offr)); + + for (i = size - 2; i >= 0; i--) + { + emitpcode (POC_SWAPFW, popGet (AOP(left), i)); + emitpcode (POC_MOVWF, popGet (AOP(result), i + offr)); + emitpcode (POC_ANDLW, popGetLit (0x0F)); + emitpcode (POC_IORWF, popGet (AOP(result), i + offr + 1)); + emitpcode (POC_XORWF, popGet (AOP(result), i + offr)); + } // for i + break; + + case 7: /* takes 2(N-1)+3 = 2N+1 cycles */ + /* works in-place/with offr as well */ + emitpcode (POC_RRFW, popGet (AOP(left), size-1)); + for (i = size-2; i >= 0; i--) { + emitpcode (POC_RRFW, popGet (AOP(left), i)); + emitpcode (POC_MOVWF, popGet (AOP(result), offr + i + 1)); + } // for i + emitpcode (POC_CLRF, popGet (AOP(result), offr)); + emitpcode (POC_RRF, popGet (AOP(result), offr)); + break; + + default: + shiftLeft_Left2ResultLit (left, result, offr * 8 + shCount-1); + shiftLeft_Left2ResultLit (result, result, 1); + return; /* prevent clearing result again */ + break; + } // switch + + while (0 < offr--) + { + emitpcode (POC_CLRF, popGet (AOP(result), offr)); + } // while +} + +/*-----------------------------------------------------------------*/ +/* shiftRight_Left2ResultLit - shift right by known count */ +/*-----------------------------------------------------------------*/ + +static void shiftRight_Left2ResultLit (operand *left, operand *result, int shCount, int sign) +{ + int size, same, offr, i; + + size = AOP_SIZE(left); + if (AOP_SIZE(result) < size) size = AOP_SIZE(result); + + same = pic14_sameRegs (AOP(left), AOP(result)); + + offr = shCount / 8; + shCount = shCount & 0x07; + + size -= offr; + + if (size) + { + switch (shCount) + { + case 0: /* takes 0 or 2N cycles (for offr==0) */ + if (!same || offr) { + for (i=0; i < size; i++) + movLeft2Result (left, i + offr, result, i); + } // if + break; + + case 1: /* takes 1N+1(3) or 2N+1(3) cycles (or offr==0) */ + emitpComment ("%s:%d: shCount=%d, size=%d, sign=%d, same=%d, offr=%d", __FUNCTION__, __LINE__, shCount, size, sign, same, offr); + if (same && offr) { + shiftRight_Left2ResultLit (left, result, 8 * offr, sign); + shiftRight_Left2ResultLit (result, result, shCount, sign); + return; /* prevent sign-extending result again */ + } else { + emitCLRC; + if (sign) { + emitpcode (POC_BTFSC, newpCodeOpBit (aopGet (AOP(left), AOP_SIZE(left)-1, FALSE, FALSE), 7, 0)); + emitSETC; + } + for (i = size-1; i >= 0; i--) { + if (same && !offr) { + emitpcode (POC_RRF, popGet (AOP(left), i)); + } else { + emitpcode (POC_RRFW, popGet (AOP(left), i + offr)); + emitpcode (POC_MOVWF, popGet (AOP(result), i)); + } + } // for i + } // if (offr) + break; + + case 4: /* takes 3(6)+5(N-1) = 5N-2(+1) cycles (for offr==0) */ + /* works in-place/with offr as well */ + emitpcode (POC_SWAPFW, popGet (AOP(left), offr)); + emitpcode (POC_ANDLW, popGetLit (0x0F)); + emitpcode (POC_MOVWF, popGet(AOP(result), 0)); + + for (i = 1; i < size; i++) + { + emitpcode (POC_SWAPFW, popGet (AOP(left), i + offr)); + emitpcode (POC_MOVWF, popGet (AOP(result), i)); + emitpcode (POC_ANDLW, popGetLit (0xF0)); + emitpcode (POC_IORWF, popGet (AOP(result), i - 1)); + emitpcode (POC_XORWF, popGet (AOP(result), i)); + } // for i + + if (sign) + { + emitpcode (POC_MOVLW, popGetLit (0xF0)); + emitpcode (POC_BTFSC, newpCodeOpBit (aopGet (AOP(result), size-1, FALSE, FALSE), 3, 0)); + emitpcode (POC_IORWF, popGet (AOP(result), size-1)); + } // if + break; + + case 7: /* takes 2(N-1)+3(4) = 2N+1(2) cycles */ + /* works in-place/with offr as well */ + emitpcode (POC_RLFW, popGet (AOP(left), offr)); + for (i = 0; i < size-1; i++) { + emitpcode (POC_RLFW, popGet (AOP(left), offr + i + 1)); + emitpcode (POC_MOVWF, popGet (AOP(result), i)); + } // for i + emitpcode (POC_CLRF, popGet (AOP(result), size-1)); + if (!sign) { + emitpcode (POC_RLF, popGet (AOP(result), size-1)); + } else { + emitSKPNC; + emitpcode (POC_DECF, popGet (AOP(result), size-1)); + } + break; + + default: + shiftRight_Left2ResultLit (left, result, offr * 8 + shCount-1, sign); + shiftRight_Left2ResultLit (result, result, 1, sign); + return; /* prevent sign extending result again */ + break; + } // switch + } // if + + addSign (result, size, sign); +} + +/*-----------------------------------------------------------------* +* genMultiAsm - repeat assembly instruction for size of register. +* if endian == 1, then the high byte (i.e base address + size of +* register) is used first else the low byte is used first; +*-----------------------------------------------------------------*/ +static void genMultiAsm( PIC_OPCODE poc, operand *reg, int size, int endian) +{ + + int offset = 0; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if(!reg) + return; + + if(!endian) { + endian = 1; + } else { + endian = -1; + offset = size-1; + } + + while(size--) { + emitpcode(poc, popGet(AOP(reg),offset)); + offset += endian; + } + +} + +/*-----------------------------------------------------------------*/ +/* loadSignToC - load the operand's sign bit into CARRY */ +/*-----------------------------------------------------------------*/ + +static void loadSignToC (operand *op) +{ + FENTRY; + assert (op && AOP(op) && AOP_SIZE(op)); + + emitCLRC; + emitpcode(POC_BTFSC, newpCodeOpBit(aopGet(AOP(op),AOP_SIZE(op)-1,FALSE,FALSE),7,0)); + emitSETC; +} + +/*-----------------------------------------------------------------*/ +/* genRightShift - generate code for right shifting */ +/*-----------------------------------------------------------------*/ +static void genGenericShift (iCode *ic, int shiftRight) +{ + operand *right, *left, *result; + sym_link *retype ; + int size; + symbol *tlbl, *tlbl1, *inverselbl; + + FENTRY; + /* if signed then we do it the hard way preserve the + sign bit moving it inwards */ + retype = getSpec(operandType(IC_RESULT(ic))); + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + /* signed & unsigned types are treated the same : i.e. the + signed is NOT propagated inwards : quoting from the + ANSI - standard : "for E1 >> E2, is equivalent to division + by 2**E2 if unsigned or if it has a non-negative value, + otherwise the result is implementation defined ", MY definition + is that the sign does not get propagated */ + + right = IC_RIGHT(ic); + left = IC_LEFT(ic); + result = IC_RESULT(ic); + + aopOp(right,ic,FALSE); + aopOp(left,ic,FALSE); + aopOp(result,ic,FALSE); + + /* if the shift count is known then do it + as efficiently as possible */ + if (AOP_TYPE(right) == AOP_LIT) { + int lit = (int) ulFromVal (AOP(right)->aopu.aop_lit); + if (lit < 0) + { + lit = -lit; + shiftRight = !shiftRight; + } + + if (shiftRight) + shiftRight_Left2ResultLit (left, result, lit, !SPEC_USIGN(operandType(left))); + else + shiftLeft_Left2ResultLit (left, result, lit); + //genRightShiftLiteral (left,right,result,ic, 0); + return ; + } + + /* shift count is unknown then we have to form + a loop get the loop count in B : Note: we take + only the lower order byte since shifting + more that 32 bits make no sense anyway, ( the + largest size of an object can be only 32 bits ) */ + + /* we must not overwrite the shift counter */ + assert (!pic14_sameRegs(AOP(right),AOP(result))); + + /* now move the left to the result if they are not the + same */ + if (!pic14_sameRegs(AOP(left),AOP(result))) + { + size = min(AOP_SIZE(result), AOP_SIZE(left)); + while (size--) { + mov2w(AOP(left), size); + movwf(AOP(result), size); + } + addSign (result, AOP_SIZE(left), !SPEC_USIGN(operandType(left))); + } + + tlbl = newiTempLabel(NULL); + tlbl1= newiTempLabel(NULL); + inverselbl = NULL; + size = AOP_SIZE(result); + + mov2w(AOP(right),0); + if (!SPEC_USIGN(operandType(right))) + { + inverselbl = newiTempLabel(NULL); + /* signed shift count -- invert shift direction for c<0 */ + emitpcode(POC_BTFSC, newpCodeOpBit(aopGet(AOP(right),0,FALSE,FALSE),7,0)); + emitpcode(POC_GOTO, popGetLabel(inverselbl->key)); + } // if + emitpcode(POC_SUBLW, popGetLit(0)); /* -count in WREG, 0-x > 0 --> BORROW = !CARRY --> CARRY is clear! */ + /* check for `a = b >> c' with `-c == 0' */ + emitSKPNZ; + emitpcode(POC_GOTO, popGetLabel(tlbl1->key)); + emitpLabel(tlbl->key); + /* propagate the sign bit inwards for SIGNED result */ + if (shiftRight && !SPEC_USIGN(operandType(result))) loadSignToC(result); + genMultiAsm(shiftRight ? POC_RRF : POC_RLF, result, size, shiftRight); + emitpcode(POC_ADDLW, popGetLit(1)); /* clears CARRY (unless W==0 afterwards) */ + emitSKPC; + emitpcode(POC_GOTO,popGetLabel(tlbl->key)); + + if (!SPEC_USIGN(operandType(right))) + { + symbol *inv_loop = newiTempLabel(NULL); + + shiftRight = !shiftRight; /* invert shift direction */ + + /* we came here from the code above -- we are done */ + emitpcode(POC_GOTO, popGetLabel(tlbl1->key)); + + /* emit code for shifting N<0 steps, count is already in W */ + emitpLabel(inverselbl->key); + if (!shiftRight || SPEC_USIGN(operandType(result))) emitCLRC; + emitpLabel(inv_loop->key); + /* propagate the sign bit inwards for SIGNED result */ + if (shiftRight && !SPEC_USIGN(operandType(result))) loadSignToC(result); + genMultiAsm(shiftRight ? POC_RRF : POC_RLF, result, size, shiftRight); + emitpcode(POC_ADDLW, popGetLit(1)); + emitSKPC; + emitpcode(POC_GOTO, popGetLabel(inv_loop->key)); + } // if + + emitpLabel(tlbl1->key); + + freeAsmop(left,NULL,ic,TRUE); + freeAsmop (right,NULL,ic,TRUE); + freeAsmop(result,NULL,ic,TRUE); +} + +static void genRightShift (iCode *ic) +{ + genGenericShift(ic, 1); +} + +static void genLeftShift (iCode *ic) +{ + genGenericShift(ic, 0); +} + +/*-----------------------------------------------------------------*/ +/* SetIrp - Set IRP bit */ +/*-----------------------------------------------------------------*/ +static void SetIrp(operand *result) +{ + FENTRY; + if (AOP_TYPE(result) == AOP_LIT) { + unsigned lit = (unsigned) double2ul (operandLitValue(result)); + if (lit&0x100) + emitSETIRP; + else + emitCLRIRP; + } else { + if ((AOP_TYPE(result) == AOP_PCODE) + && (AOP(result)->aopu.pcop->type == PO_LITERAL)) + { + int addrs = PCOL(AOP(result)->aopu.pcop)->lit; + if (addrs & 0x100) + emitSETIRP; + else + emitCLRIRP; + } else { + emitCLRIRP; /* always ensure this is clear as it may have previouly been set */ + if(AOP_SIZE(result) > 1) { + emitpcode(POC_BTFSC,newpCodeOpBit(aopGet(AOP(result),1,FALSE,FALSE),0,0)); + emitSETIRP; + } + } + } +} + +static void +setup_fsr (operand *ptr) +{ + mov2w_op(ptr, 0); + emitpcode(POC_MOVWF, popCopyReg (&pc_fsr)); + + /* also setup-up IRP */ + SetIrp (ptr); +} + +/*-----------------------------------------------------------------*/ +/* emitPtrByteGet - emits code to get a byte into WREG from an */ +/* arbitrary pointer (__code, __data, generic) */ +/*-----------------------------------------------------------------*/ +static void +emitPtrByteGet (operand *src, int p_type, bool alreadyAddressed) +{ + FENTRY; + switch (p_type) + { + case POINTER: + case FPOINTER: + if (!alreadyAddressed) setup_fsr (src); + emitpcode(POC_MOVFW, popCopyReg (&pc_fsr)); + break; + + case CPOINTER: + assert( AOP_SIZE(src) == 2 ); + mov2w_op(src, 0); + emitpcode(POC_MOVWF, popRegFromIdx (Gstack_base_addr-1)); + mov2w_op(src, 1); + emitpcode(POC_MOVWF, popRegFromIdx (Gstack_base_addr)); + emitpcode(POC_MOVLW, popGetLit (GPTRTAG_CODE)); /* GPOINTER tag for __code space */ + call_libraryfunc ("__gptrget1"); + break; + + case GPOINTER: + assert( AOP_SIZE(src) == 3 ); + mov2w_op(src, 0); + emitpcode(POC_MOVWF, popRegFromIdx (Gstack_base_addr-1)); + mov2w_op(src, 1); + emitpcode(POC_MOVWF, popRegFromIdx (Gstack_base_addr)); + mov2w_op(src, 2); + call_libraryfunc ("__gptrget1"); + break; + + default: + assert( !"unhandled pointer type" ); + break; + } +} + +/*-----------------------------------------------------------------*/ +/* emitPtrByteSet - emits code to set a byte from src through a */ +/* pointer register INDF (legacy 8051 uses R0, R1, or DPTR). */ +/*-----------------------------------------------------------------*/ +static void +emitPtrByteSet (operand *dst, int p_type, bool alreadyAddressed) +{ + FENTRY; + switch (p_type) + { + case POINTER: + case FPOINTER: + if (!alreadyAddressed) setup_fsr (dst); + emitpcode(POC_MOVWF, popCopyReg (&pc_fsr)); + break; + + case CPOINTER: + assert( !"trying to assign to __code pointer" ); + break; + + case GPOINTER: + emitpcode(POC_MOVWF, popRegFromIdx (Gstack_base_addr-2)); + mov2w_op(dst, 0); + emitpcode(POC_MOVWF, popRegFromIdx (Gstack_base_addr-1)); + mov2w_op(dst, 1); + emitpcode(POC_MOVWF, popRegFromIdx (Gstack_base_addr)); + mov2w_op(dst, 2); + call_libraryfunc ("__gptrput1"); + break; + + default: + assert( !"unhandled pointer type" ); + break; + } +} + +/*-----------------------------------------------------------------*/ +/* genUnpackBits - generates code for unpacking bits */ +/*-----------------------------------------------------------------*/ +static void genUnpackBits (operand *result, operand *left, int ptype, iCode *ifx) +{ + int rsize; /* result size */ + sym_link *etype; /* bitfield type information */ + int blen; /* bitfield length */ + int bstr; /* bitfield starting bit within byte */ + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + etype = getSpec(operandType(result)); + rsize = getSize (operandType (result)); + blen = SPEC_BLEN (etype); + bstr = SPEC_BSTR (etype); + + /* single bit field case */ + if (blen == 1) { + if (ifx) { /* that is for an if statement */ + pCodeOp *pcop; + resolvedIfx rIfx; + resolveIfx(&rIfx,ifx); + if (ptype == -1) /* direct */ + pcop = newpCodeOpBit(aopGet (AOP(left),0,FALSE,FALSE),bstr,0); + else + pcop = newpCodeOpBit(pc_indf.pcop.name,bstr,0); + emitpcode((rIfx.condition) ? POC_BTFSC : POC_BTFSS,pcop); + emitpcode(POC_GOTO,popGetLabel(rIfx.lbl->key)); + ifx->generated=1; + } else { + int i; + assert (!pic14_sameRegs (AOP(result), AOP(left))); + for (i=0; i < AOP_SIZE(result); i++) + emitpcode (POC_CLRF, popGet (AOP(result), i)); + + switch (ptype) + { + case -1: + emitpcode(POC_BTFSC,newpCodeOpBit(aopGet (AOP(left),0,FALSE,FALSE),bstr,0)); + /* adjust result below */ + break; + + case POINTER: + case FPOINTER: + case GPOINTER: + case CPOINTER: + emitPtrByteGet (left, ptype, FALSE); + emitpcode(POC_ANDLW, popGetLit (1UL << bstr)); + emitSKPZ; + /* adjust result below */ + break; + + default: + assert( !"unhandled pointer type" ); + } // switch + + /* move sign-/zero extended bit to result */ + if (SPEC_USIGN(OP_SYM_ETYPE(left))) { + emitpcode (POC_INCF, popGet (AOP(result), 0)); + } else { + emitpcode (POC_DECF, popGet (AOP(result), 0)); + } + addSign (result, 1, !SPEC_USIGN(OP_SYM_ETYPE(left))); + } + return; + } + else if (blen <= 8 && ((blen + bstr) <= 8)) + { + /* blen > 1 */ + int i; + + for (i=0; i < AOP_SIZE(result); i++) + emitpcode (POC_CLRF, popGet (AOP(result), i)); + + switch (ptype) + { + case -1: + mov2w(AOP(left), 0); + break; + + case POINTER: + case FPOINTER: + case GPOINTER: + case CPOINTER: + emitPtrByteGet (left, ptype, FALSE); + break; + + default: + assert( !"unhandled pointer type" ); + } // switch + + if (blen < 8) + emitpcode(POC_ANDLW, popGetLit ((((1UL << blen)-1) << bstr) & 0x00ff)); + movwf(AOP(result), 0); + AccRsh (popGet(AOP(result), 0), bstr, 1); /* zero extend the bitfield */ + + if (!SPEC_USIGN(OP_SYM_ETYPE(left)) && (bstr + blen != 8)) + { + /* signed bitfield */ + assert (bstr + blen > 0); + emitpcode(POC_MOVLW, popGetLit (0x00ff << (bstr + blen))); + emitpcode(POC_BTFSC, newpCodeOpBit(aopGet(AOP(result),0,FALSE,FALSE), bstr + blen - 1, 0)); + emitpcode(POC_IORWF, popGet(AOP(result),0)); + } + addSign (result, 1, !SPEC_USIGN(OP_SYM_ETYPE(left))); + return; + } + + assert( !"bitfields larger than 8 bits or crossing byte boundaries are not yet supported" ); +} + +#if 1 +/*-----------------------------------------------------------------*/ +/* genDataPointerGet - generates code when ptr offset is known */ +/*-----------------------------------------------------------------*/ +static void genDataPointerGet (operand *left, + operand *result, + iCode *ic) +{ + int size , offset = 0; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + + /* optimization - most of the time, left and result are the same + * address, but different types. for the pic code, we could omit + * the following + */ + aopOp(result,ic,TRUE); + + if (pic14_sameRegs (AOP(left), AOP(result))) + return; + + DEBUGpic14_AopType(__LINE__,left,NULL,result); + + //emitpcode(POC_MOVFW, popGet(AOP(left),0)); + + size = AOP_SIZE(result); + if (size > getSize(OP_SYM_ETYPE(left))) size = getSize(OP_SYM_ETYPE(left)); + + offset = 0; + while (size--) { + emitpcode(POC_MOVFW, popGet(AOP(left),offset)); + emitpcode(POC_MOVWF, popGet(AOP(result),offset)); + offset++; + } + + freeAsmop(left,NULL,ic,TRUE); + freeAsmop(result,NULL,ic,TRUE); +} +#endif + +/*-----------------------------------------------------------------*/ +/* genNearPointerGet - pic14_emitcode for near pointer fetch */ +/*-----------------------------------------------------------------*/ +static void genNearPointerGet (operand *left, + operand *result, + iCode *ic) +{ + asmop *aop = NULL; + sym_link *ltype = operandType(left); + sym_link *rtype = operandType(result); + sym_link *retype= getSpec(rtype); /* bitfield type information */ + int direct = 0; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + + aopOp(left,ic,FALSE); + + /* if left is rematerialisable and + result is not bit variable type and + the left is pointer to data space i.e + lower 128 bytes of space */ + if (AOP_TYPE(left) == AOP_PCODE && //AOP_TYPE(left) == AOP_IMMD && + !IS_BITVAR(retype) && + PIC_IS_DATA_PTR(ltype)) { + genDataPointerGet (left,result,ic); + return ; + } + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + aopOp (result,ic,FALSE); + + /* Check if can access directly instead of via a pointer */ + if ((AOP_TYPE(left) == AOP_PCODE) + && (AOP(left)->aopu.pcop->type == PO_IMMEDIATE) + && (AOP_SIZE(result) == 1)) + { + direct = 1; + } + + if (IS_BITFIELD(getSpec(operandType(result)))) + { + genUnpackBits (result,left,direct?-1:POINTER,ifxForOp(IC_RESULT(ic),ic)); + goto release; + } + + /* If the pointer value is not in a the FSR then need to put it in */ + /* Must set/reset IRP bit for use with FSR. */ + if (!direct) + setup_fsr (left); + +// sym_link *etype; + /* if bitfield then unpack the bits */ + { + /* we have can just get the values */ + int size = AOP_SIZE(result); + int offset = 0 ; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + while(size--) { + if (direct) + emitpcode(POC_MOVWF,popGet(AOP(left),0)); + else + emitpcode(POC_MOVFW,popCopyReg(&pc_indf)); + if (AOP_TYPE(result) == AOP_LIT) { + emitpcode(POC_MOVLW,popGet(AOP(result),offset)); + } else { + emitpcode(POC_MOVWF,popGet(AOP(result),offset)); + } + if (size && !direct) + emitpcode(POC_INCF,popCopyReg(&pc_fsr)); + offset++; + } + } + + /* now some housekeeping stuff */ + if (aop) { + /* we had to allocate for this iCode */ + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + freeAsmop(NULL,aop,ic,TRUE); + } else { + /* we did not allocate which means left + already in a pointer register, then + if size > 0 && this could be used again + we have to point it back to where it + belongs */ + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if (AOP_SIZE(result) > 1 && + !OP_SYMBOL(left)->remat && + ( OP_SYMBOL(left)->liveTo > ic->seq || + ic->depth )) { + int size = AOP_SIZE(result) - 1; + while (size--) + emitpcode(POC_DECF, popCopyReg(&pc_fsr)); + } + } + +release: + /* done */ + freeAsmop(left,NULL,ic,TRUE); + freeAsmop(result,NULL,ic,TRUE); + +} + +/*-----------------------------------------------------------------*/ +/* genGenPointerGet - gget value from generic pointer space */ +/*-----------------------------------------------------------------*/ +static void genGenPointerGet (operand *left, + operand *result, iCode *ic) +{ + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + aopOp(left,ic,FALSE); + aopOp(result,ic,FALSE); + + + DEBUGpic14_AopType(__LINE__,left,NULL,result); + + if (IS_BITFIELD(getSpec(operandType(result)))) + { + genUnpackBits (result, left, GPOINTER, ifxForOp (IC_RESULT(ic), ic)); + return; + } + + { + /* emit call to __gptrget */ + char *func[] = {NULL, "__gptrget1", "__gptrget2", "__gptrget3", "__gptrget4"}; + int size = AOP_SIZE(result); + int idx = 0; + + assert (size > 0 && size <= 4); + + /* pass arguments */ + assert (AOP_SIZE(left) == 3); + mov2w(AOP(left), 0); + emitpcode(POC_MOVWF, popRegFromIdx (Gstack_base_addr-1)); + mov2w(AOP(left), 1); + emitpcode(POC_MOVWF, popRegFromIdx (Gstack_base_addr)); + mov2w(AOP(left), 2); + call_libraryfunc (func[size]); + + /* save result */ + movwf (AOP(result), --size); + while (size--) { + emitpcode (POC_MOVFW,popRegFromIdx (Gstack_base_addr - idx++)); + movwf (AOP(result), size); + } // while + } + + freeAsmop(left,NULL,ic,TRUE); + freeAsmop(result,NULL,ic,TRUE); + +} + +/*-----------------------------------------------------------------*/ +/* genConstPointerGet - get value from const generic pointer space */ +/*-----------------------------------------------------------------*/ +static void genConstPointerGet (operand *left, + operand *result, iCode *ic) +{ + //sym_link *retype = getSpec(operandType(result)); + #if 0 + symbol *albl, *blbl;//, *clbl; + pCodeOp *pcop; + #endif + PIC_OPCODE poc; + int i, size, lit; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + aopOp(left,ic,FALSE); + aopOp(result,ic,FALSE); + + size = AOP_SIZE(result); + + DEBUGpic14_AopType(__LINE__,left,NULL,result); + + DEBUGpic14_emitcode ("; "," %d getting const pointer",__LINE__); + + lit = op_isLitLike (left); + poc = lit ? POC_MOVLW : POC_MOVFW; + + if (IS_BITFIELD(getSpec(operandType(result)))) + { + genUnpackBits (result, left, lit ? -1 : CPOINTER, ifxForOp (IC_RESULT(ic), ic)); + goto release; + } + + { + char *func[] = { NULL, "__gptrget1", "__gptrget2", "__gptrget3", "__gptrget4" }; + int size = min(getSize(OP_SYM_ETYPE(left)), AOP_SIZE(result)); + assert (size > 0 && size <= 4); + + mov2w_op(left, 0); + emitpcode(POC_MOVWF, popRegFromIdx (Gstack_base_addr-1)); + mov2w_op(left, 1); + emitpcode(POC_MOVWF, popRegFromIdx (Gstack_base_addr)); + emitpcode(POC_MOVLW, popGetLit (GPTRTAG_CODE)); /* GPOINTER tag for __code space */ + call_libraryfunc (func[size]); + + movwf(AOP(result),size-1); + for (i = 1; i < size; i++) + { + emitpcode(POC_MOVFW, popRegFromIdx (Gstack_base_addr+1-i)); + movwf(AOP(result),size - 1 - i); + } // for + } + +release: + freeAsmop(left,NULL,ic,TRUE); + freeAsmop(result,NULL,ic,TRUE); + +} +/*-----------------------------------------------------------------*/ +/* genPointerGet - generate code for pointer get */ +/*-----------------------------------------------------------------*/ +static void genPointerGet (iCode *ic) +{ + operand *left, *result ; + sym_link *type, *etype; + int p_type = -1; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + left = IC_LEFT(ic); + result = IC_RESULT(ic) ; + + /* depending on the type of pointer we need to + move it to the correct pointer register */ + type = operandType(left); + etype = getSpec(type); + + if (IS_PTR_CONST(type)) + DEBUGpic14_emitcode ("; ***","%d - const pointer",__LINE__); + + /* if left is of type of pointer then it is simple */ + if (IS_PTR(type) && !IS_FUNC(type->next)) + p_type = DCL_TYPE(type); + else { + /* we have to go by the storage class */ + p_type = PTR_TYPE(SPEC_OCLS(etype)); + + DEBUGpic14_emitcode ("; ***","%d - resolve pointer by storage class",__LINE__); + + if (SPEC_OCLS(etype)->codesp ) { + DEBUGpic14_emitcode ("; ***","%d - cpointer",__LINE__); + //p_type = CPOINTER ; + } + else + if (SPEC_OCLS(etype)->fmap && !SPEC_OCLS(etype)->paged) + DEBUGpic14_emitcode ("; ***","%d - fpointer",__LINE__); + /*p_type = FPOINTER ;*/ + else + if (SPEC_OCLS(etype)->fmap && SPEC_OCLS(etype)->paged) + DEBUGpic14_emitcode ("; ***","%d - ppointer",__LINE__); + /* p_type = PPOINTER; */ + else + if (SPEC_OCLS(etype) == idata ) + DEBUGpic14_emitcode ("; ***","%d - ipointer",__LINE__); + /* p_type = IPOINTER; */ + else + DEBUGpic14_emitcode ("; ***","%d - pointer",__LINE__); + /* p_type = POINTER ; */ + } + + /* now that we have the pointer type we assign + the pointer values */ + switch (p_type) { + + case POINTER: + case FPOINTER: + //case IPOINTER: + genNearPointerGet (left,result,ic); + break; +/* + case PPOINTER: + genPagedPointerGet(left,result,ic); + break; + + case FPOINTER: + genFarPointerGet (left,result,ic); + break; +*/ + case CPOINTER: + genConstPointerGet (left,result,ic); + break; + + case GPOINTER: + genGenPointerGet (left,result,ic); + break; + default: + assert ( !"unhandled pointer type" ); + break; + } + +} + +/*-----------------------------------------------------------------*/ +/* genPackBits - generates code for packed bit storage */ +/*-----------------------------------------------------------------*/ +static void genPackBits(sym_link *etype,operand *result,operand *right,int p_type) +{ + int blen; /* bitfield length */ + int bstr; /* bitfield starting bit within byte */ + int litval; /* source literal value (if AOP_LIT) */ + unsigned char mask; /* bitmask within current byte */ + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + blen = SPEC_BLEN (etype); + bstr = SPEC_BSTR (etype); + + /* If the bitfield length is less than a byte and does not cross byte boundaries */ + if ((blen <= 8) && ((bstr + blen) <= 8)) + { + mask = ((unsigned char) (0xFF << (blen + bstr)) | + (unsigned char) (0xFF >> (8 - bstr))); + + if (AOP_TYPE (right) == AOP_LIT) + { + /* Case with a bitfield length <8 and literal source */ + int lit = (int) ulFromVal (AOP (right)->aopu.aop_lit); + if (blen == 1) { + pCodeOp *pcop; + + switch (p_type) + { + case -1: + if (AOP(result)->type == AOP_PCODE) + pcop = newpCodeOpBit(aopGet(AOP(result),0,FALSE,FALSE),bstr,0); + else + pcop = popGet(AOP(result),0); + emitpcode(lit?POC_BSF:POC_BCF,pcop); + break; + + case POINTER: + case FPOINTER: + setup_fsr (result); + emitpcode(lit?POC_BSF:POC_BCF,newpCodeOpBit(PCOP(&pc_indf)->name,bstr,0)); + break; + + case CPOINTER: + assert( !"trying to assign to bitfield via pointer to __code space" ); + break; + + case GPOINTER: + emitPtrByteGet(result, p_type, FALSE); + if (lit) { + emitpcode(POC_IORLW, newpCodeOpLit (1UL << bstr)); + } else { + emitpcode(POC_ANDLW, newpCodeOpLit ((~(1UL << bstr)) & 0x0ff)); + } + emitPtrByteSet(result, p_type, TRUE); + break; + + default: + assert( !"unhandled pointer type" ); + break; + } // switch (p_type) + } else { + /* blen > 1 */ + litval = lit << bstr; + litval &= (~mask) & 0x00ff; + + switch (p_type) + { + case -1: + mov2w (AOP(result), 0); + if ((litval|mask) != 0x00ff) + emitpcode(POC_ANDLW, popGetLit (mask)); + if (litval != 0x00) + emitpcode(POC_IORLW, popGetLit (litval)); + movwf (AOP(result), 0); + break; + + case POINTER: + case FPOINTER: + case GPOINTER: + emitPtrByteGet(result, p_type, FALSE); + if ((litval|mask) != 0x00ff) + emitpcode(POC_ANDLW, popGetLit (mask)); + if (litval != 0x00) + emitpcode(POC_IORLW, popGetLit (litval)); + emitPtrByteSet(result, p_type, TRUE); + break; + + case CPOINTER: + assert( !"trying to assign to bitfield via pointer to __code space" ); + break; + + default: + assert( !"unhandled pointer type" ); + break; + } // switch + } // if (blen > 1) + } + else + { + /* right is no literal */ + if (blen==1) { + switch (p_type) + { + case -1: + /* Note more efficient code, of pre clearing bit then only setting it if required, + * can only be done if it is known that the result is not a SFR */ + emitpcode(POC_RRFW,popGet(AOP(right),0)); + emitSKPC; + emitpcode(POC_BCF,newpCodeOpBit (aopGet(AOP(result), 0, FALSE, FALSE), bstr, 0)); + emitSKPNC; + emitpcode(POC_BSF,newpCodeOpBit (aopGet(AOP(result), 0, FALSE, FALSE), bstr, 0)); + break; + + case POINTER: + case FPOINTER: + case GPOINTER: + emitPtrByteGet (result, p_type, FALSE); + emitpcode(POC_BTFSS, newpCodeOpBit (aopGet(AOP(right), 0, FALSE, FALSE), bstr, 0)); + emitpcode(POC_ANDLW, newpCodeOpLit (~(1UL << bstr) & 0x0ff)); + emitpcode(POC_BTFSC, newpCodeOpBit (aopGet(AOP(right), 0, FALSE, FALSE), bstr, 0)); + emitpcode(POC_IORLW, newpCodeOpLit ((1UL << bstr) & 0x0ff)); + emitPtrByteSet (result, p_type, TRUE); + break; + + case CPOINTER: + assert( !"trying to assign to bitfield via pointer to __code space" ); + break; + + default: + assert( !"unhandled pointer type" ); + break; + } // switch + return; + } else { + /* Case with a bitfield 1 < length <= 8 and arbitrary source */ + pCodeOp *temp = popGetTempReg (); + + mov2w (AOP(right), 0); + if (blen < 8) { + emitpcode (POC_ANDLW, popGetLit ((1UL << blen)-1)); + } + emitpcode(POC_MOVWF, temp); + if (bstr) { + AccLsh (temp, bstr); + } + + switch (p_type) + { + case -1: + mov2w (AOP(result), 0); + emitpcode(POC_ANDLW, popGetLit (mask)); + emitpcode(POC_IORFW, temp); + movwf (AOP(result), 0); + break; + + case POINTER: + case FPOINTER: + case GPOINTER: + emitPtrByteGet (result, p_type, FALSE); + emitpcode(POC_ANDLW, popGetLit (mask)); + emitpcode(POC_IORFW, temp); + emitPtrByteSet (result, p_type, TRUE); + break; + + case CPOINTER: + assert( !"trying to assign to bitfield via pointer to __code space" ); + break; + + default: + assert( !"unhandled pointer type" ); + break; + } // switch + + popReleaseTempReg (temp); + } // if (blen > 1) + } // if (AOP(right)->type != AOP_LIT) + return; + } // if (blen <= 8 && ((blen + bstr) <= 8)) + + assert( !"bitfields larger than 8 bits or crossing byte boundaries are not yet supported" ); +} + +/*-----------------------------------------------------------------*/ +/* genDataPointerSet - remat pointer to data space */ +/*-----------------------------------------------------------------*/ +static void genDataPointerSet(operand *right, + operand *result, + iCode *ic) +{ + int size, offset = 0 ; + int ressize; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + aopOp(right,ic,FALSE); + aopOp(result,ic,FALSE); + + assert (IS_SYMOP(result)); + assert (IS_PTR(OP_SYM_TYPE(result))); + + if (AOP_TYPE(right) == AOP_LIT) + size = 4; + else + size = AOP_SIZE(right); + ressize = getSize(OP_SYM_ETYPE(result)); + if (size > ressize) size = ressize; + //fprintf (stderr, "%s:%u: size(right): %d, size(result): %d\n", __FUNCTION__,__LINE__, AOP_SIZE(right), ressize); + + //assert( !"what's going on here?" ); + + /* + if ( AOP_TYPE(result) == AOP_PCODE) { + fprintf(stderr,"genDataPointerSet %s, %d\n", + AOP(result)->aopu.pcop->name, + PCOI(AOP(result)->aopu.pcop)->offset); + } + */ + + // tsd, was l+1 - the underline `_' prefix was being stripped + while (size--) { + emitpComment ("%s:%u: size=%d/%d, offset=%d, AOP_TYPE(res)=%d", __FILE__,__LINE__, size, ressize, offset, AOP_TYPE(result)); + + if (AOP_TYPE(right) == AOP_LIT) { + unsigned int lit = pic14aopLiteral(AOP(IC_RIGHT(ic))->aopu.aop_lit, offset); + //fprintf (stderr, "%s:%u: lit %d 0x%x\n", __FUNCTION__,__LINE__, lit, lit); + if(lit&0xff) { + emitpcode(POC_MOVLW, popGetLit(lit&0xff)); + emitpcode(POC_MOVWF, popGet(AOP(result), offset)); + } else { + emitpcode(POC_CLRF, popGet(AOP(result), offset)); + } + } else { + //fprintf (stderr, "%s:%u: no lit\n", __FUNCTION__,__LINE__); + emitpcode(POC_MOVFW, popGet(AOP(right), offset)); + emitpcode(POC_MOVWF, popGet(AOP(result), offset)); + } + + offset++; + } + + freeAsmop(right,NULL,ic,TRUE); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genNearPointerSet - pic14_emitcode for near pointer put */ +/*-----------------------------------------------------------------*/ +static void genNearPointerSet (operand *right, + operand *result, + iCode *ic) +{ + asmop *aop = NULL; + sym_link *ptype = operandType(result); + sym_link *retype = getSpec(operandType(right)); + sym_link *letype = getSpec(ptype); + int direct = 0; + + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + aopOp(result,ic,FALSE); + +#if 1 + /* if the result is rematerializable & + in data space & not a bit variable */ + //if (AOP_TYPE(result) == AOP_IMMD && + if (AOP_TYPE(result) == AOP_PCODE && + PIC_IS_DATA_PTR(ptype) && + !IS_BITVAR (retype) && + !IS_BITVAR (letype)) { + genDataPointerSet (right,result,ic); + freeAsmop(result,NULL,ic,TRUE); + return; + } +#endif + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + aopOp(right,ic,FALSE); + DEBUGpic14_AopType(__LINE__,NULL,right,result); + + /* Check if can access directly instead of via a pointer */ + if ((AOP_TYPE(result) == AOP_PCODE) + && (AOP(result)->aopu.pcop->type == PO_IMMEDIATE) + && (AOP_SIZE(right) == 1)) + { + direct = 1; + } + + if (IS_BITFIELD (letype)) + { + genPackBits (letype, result, right, direct?-1:POINTER); + return; + } + + /* If the pointer value is not in a the FSR then need to put it in */ + /* Must set/reset IRP bit for use with FSR. */ + /* Note only do this once - assuming that never need to cross a bank boundary at address 0x100. */ + if (!direct) + setup_fsr (result); + + { + /* we have can just get the values */ + int size = AOP_SIZE(right); + int offset = 0 ; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + while (size--) { + char *l = aopGet(AOP(right),offset,FALSE,TRUE); + if (*l == '@' ) { + emitpcode(POC_MOVFW,popCopyReg(&pc_indf)); + } else { + if (AOP_TYPE(right) == AOP_LIT) { + emitpcode(POC_MOVLW,popGet(AOP(right),offset)); + } else { + emitpcode(POC_MOVFW,popGet(AOP(right),offset)); + } + if (direct) + emitpcode(POC_MOVWF,popGet(AOP(result),0)); + else + emitpcode(POC_MOVWF,popCopyReg(&pc_indf)); + } + if (size && !direct) + emitpcode(POC_INCF,popCopyReg(&pc_fsr)); + offset++; + } + } + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* now some housekeeping stuff */ + if (aop) { + /* we had to allocate for this iCode */ + freeAsmop(NULL,aop,ic,TRUE); + } else { + /* we did not allocate which means left + already in a pointer register, then + if size > 0 && this could be used again + we have to point it back to where it + belongs */ + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if (AOP_SIZE(right) > 1 && + !OP_SYMBOL(result)->remat && + ( OP_SYMBOL(result)->liveTo > ic->seq || + ic->depth )) { + int size = AOP_SIZE(right) - 1; + while (size--) + emitpcode(POC_DECF, popCopyReg(&pc_fsr)); + } + } + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* done */ + + freeAsmop(right,NULL,ic,TRUE); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genGenPointerSet - set value from generic pointer space */ +/*-----------------------------------------------------------------*/ +static void genGenPointerSet (operand *right, operand *result, iCode *ic) +{ + sym_link *retype = getSpec(operandType(result)); + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + aopOp(right,ic,FALSE); + aopOp(result,ic,FALSE); + + + DEBUGpic14_AopType(__LINE__,right,NULL,result); + + if (IS_BITFIELD(retype)) + { + genPackBits (retype, result, right, GPOINTER); + return; + } + + { + /* emit call to __gptrput */ + char *func[] = {NULL, "__gptrput1", "__gptrput2", "__gptrput3", "__gptrput4"}; + int size = AOP_SIZE(right); + int idx = 0; + + /* The following assertion fails for + * struct foo { char a; char b; } bar; + * void demo(struct foo *dst, char c) { dst->b = c; } + * as size will be 1 (sizeof(c)), whereas dst->b will be accessed + * using (((char *)dst)+1), whose OP_SYM_ETYPE still is struct foo + * of size 2. + * The frontend seems to guarantee that IC_LEFT has the correct size, + * it works fine both for larger and smaller types of `char c'. + * */ + //assert (size == getSize(OP_SYM_ETYPE(result))); + assert (size > 0 && size <= 4); + + /* pass arguments */ + /* - value (MSB in Gstack_base_addr-2, growing downwards) */ + { + int off = size; + idx = 2; + while (off--) + { + mov2w_op (right, off); + emitpcode (POC_MOVWF, popRegFromIdx (Gstack_base_addr - idx++)); + } + idx = 0; + } + /* - address */ + assert (AOP_SIZE(result) == 3); + mov2w(AOP(result), 0); + emitpcode(POC_MOVWF, popRegFromIdx (Gstack_base_addr - 1)); + mov2w(AOP(result), 1); + emitpcode(POC_MOVWF, popRegFromIdx (Gstack_base_addr)); + mov2w(AOP(result), 2); + call_libraryfunc (func[size]); + } + + freeAsmop(right,NULL,ic,TRUE); + freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genPointerSet - stores the value into a pointer location */ +/*-----------------------------------------------------------------*/ +static void genPointerSet (iCode *ic) +{ + operand *right, *result ; + sym_link *type, *etype; + int p_type; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + right = IC_RIGHT(ic); + result = IC_RESULT(ic) ; + + /* depending on the type of pointer we need to + move it to the correct pointer register */ + type = operandType(result); + etype = getSpec(type); + /* if left is of type of pointer then it is simple */ + if (IS_PTR(type) && !IS_FUNC(type->next)) { + p_type = DCL_TYPE(type); + } + else { + /* we have to go by the storage class */ + p_type = PTR_TYPE(SPEC_OCLS(etype)); + + /* if (SPEC_OCLS(etype)->codesp ) { */ + /* p_type = CPOINTER ; */ + /* } */ + /* else */ + /* if (SPEC_OCLS(etype)->fmap && !SPEC_OCLS(etype)->paged) */ + /* p_type = FPOINTER ; */ + /* else */ + /* if (SPEC_OCLS(etype)->fmap && SPEC_OCLS(etype)->paged) */ + /* p_type = PPOINTER ; */ + /* else */ + /* if (SPEC_OCLS(etype) == idata ) */ + /* p_type = IPOINTER ; */ + /* else */ + /* p_type = POINTER ; */ + } + + /* now that we have the pointer type we assign + the pointer values */ + switch (p_type) { + + case POINTER: + case FPOINTER: + //case IPOINTER: + genNearPointerSet (right,result,ic); + break; +/* + case PPOINTER: + genPagedPointerSet (right,result,ic); + break; + + case FPOINTER: + genFarPointerSet (right,result,ic); + break; +*/ + case GPOINTER: + genGenPointerSet (right,result,ic); + break; + + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "genPointerSet: illegal pointer type"); + } +} + +/*-----------------------------------------------------------------*/ +/* genIfx - generate code for Ifx statement */ +/*-----------------------------------------------------------------*/ +static void genIfx (iCode *ic, iCode *popIc) +{ + operand *cond = IC_COND(ic); + int isbit =0; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + aopOp(cond,ic,FALSE); + + /* get the value into acc */ + if (AOP_TYPE(cond) != AOP_CRY) + pic14_toBoolean(cond); + else + isbit = 1; + + /* if there was something to be popped then do it */ + if (popIc) + genIpop(popIc); + + if (isbit) + { + /* This assumes that CARRY is set iff cond is true */ + if (IC_TRUE(ic)) + { + assert (!IC_FALSE(ic)); + emitpcode(POC_BTFSC, popGet(AOP(cond), 0)); + //emitSKPNC; + emitpcode(POC_GOTO, popGetLabel(IC_TRUE(ic)->key)); + } else { + assert (IC_FALSE(ic)); + emitpcode(POC_BTFSS, popGet(AOP(cond), 0)); + //emitSKPC; + emitpcode(POC_GOTO, popGetLabel(IC_FALSE(ic)->key)); + } + if (0) + { + static int hasWarned = 0; + if (!hasWarned) + { + fprintf (stderr, "WARNING: using untested code for %s:%u -- please check the .asm output and report bugs.\n", ic->filename, ic->lineno); + hasWarned = 1; + } + } + } + else + { + /* now Z is set iff !cond */ + if (IC_TRUE(ic)) + { + assert (!IC_FALSE(ic)); + emitSKPZ; + emitpcode(POC_GOTO, popGetLabel(IC_TRUE(ic)->key)); + } else { + emitSKPNZ; + emitpcode(POC_GOTO, popGetLabel(IC_FALSE(ic)->key)); + } + } + + ic->generated = 1; + + /* the result is now in the accumulator */ + freeAsmop(cond,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genAddrOf - generates code for address of */ +/*-----------------------------------------------------------------*/ +static void genAddrOf (iCode *ic) +{ + operand *right, *result, *left; + int size, offset ; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + + //aopOp(IC_RESULT(ic),ic,FALSE); + + aopOp((left=IC_LEFT(ic)),ic,FALSE); + aopOp((right=IC_RIGHT(ic)),ic,FALSE); + aopOp((result=IC_RESULT(ic)),ic,TRUE); + + DEBUGpic14_AopType(__LINE__,left,right,result); + assert (IS_SYMOP (left)); + + /* sanity check: generic pointers to code space are not yet supported, + * pionters to codespace must not be assigned addresses of __data values. */ + #if 0 + fprintf (stderr, "result: %s, left: %s\n", OP_SYMBOL(result)->name, OP_SYMBOL(left)->name); + fprintf (stderr, "result->type : "); printTypeChain (OP_SYM_TYPE(result), stderr); fprintf (stderr, ", codesp:%d, codeptr:%d, constptr:%d\n", IN_CODESPACE(SPEC_OCLS(getSpec (OP_SYM_TYPE(result)))), IS_CODEPTR(OP_SYM_TYPE(result)), IS_PTR_CONST(OP_SYM_TYPE(result))); + fprintf (stderr, "result->etype: "); printTypeChain (OP_SYM_ETYPE(result), stderr); fprintf (stderr, ", codesp:%d, codeptr:%d, constptr:%d\n", IN_CODESPACE(SPEC_OCLS(getSpec (OP_SYM_ETYPE(result)))), IS_CODEPTR(OP_SYM_ETYPE(result)), IS_PTR_CONST(OP_SYM_ETYPE(result))); + fprintf (stderr, "left->type : "); printTypeChain (OP_SYM_TYPE(left), stderr); fprintf (stderr, ", codesp:%d, codeptr:%d, constptr:%d\n", IN_CODESPACE(SPEC_OCLS(getSpec (OP_SYM_TYPE(left)))), IS_CODEPTR(OP_SYM_TYPE(left)), IS_PTR_CONST(OP_SYM_TYPE(left))); + fprintf (stderr, "left->etype : "); printTypeChain (OP_SYM_ETYPE(left), stderr); fprintf (stderr, ", codesp:%d, codeptr:%d, constptr:%d\n",IN_CODESPACE(SPEC_OCLS(getSpec (OP_SYM_ETYPE(left)))), IS_CODEPTR(OP_SYM_ETYPE(left)), IS_PTR_CONST(OP_SYM_ETYPE(left))); +#endif + + if (IS_SYMOP(result) && IS_CODEPTR(OP_SYM_TYPE(result)) && !IN_CODESPACE(SPEC_OCLS(getSpec (OP_SYM_TYPE(left))))) { + fprintf (stderr, "trying to assign __code pointer (%s) an address in __data space (&%s) -- expect trouble\n", + IS_SYMOP(result) ? OP_SYMBOL(result)->name : "unknown", + OP_SYMBOL(left)->name); + } else if (IS_SYMOP(result) && !IS_CODEPTR (OP_SYM_TYPE(result)) && IN_CODESPACE(SPEC_OCLS(getSpec(OP_SYM_TYPE(left))))) { + fprintf (stderr, "trying to assign __data pointer (%s) an address in __code space (&%s) -- expect trouble\n", + IS_SYMOP(result) ? OP_SYMBOL(result)->name : "unknown", + OP_SYMBOL(left)->name); + } + + size = AOP_SIZE(IC_RESULT(ic)); + if (IS_SYMOP(result) && IS_GENPTR(OP_SYM_TYPE(result))) { + /* strip tag */ + if (size > GPTRSIZE-1) size = GPTRSIZE-1; + } + offset = 0; + + while (size--) { + /* fixing bug #863624, reported from (errolv) */ + emitpcode(POC_MOVLW, popGetImmd(OP_SYMBOL(left)->rname, offset, 0, IS_FUNC(OP_SYM_TYPE(left)))); + emitpcode(POC_MOVWF, popGet(AOP(result), offset)); + +#if 0 + emitpcode(POC_MOVLW, popGet(AOP(left),offset)); + emitpcode(POC_MOVWF, popGet(AOP(result),offset)); +#endif + offset++; + } + + if (IS_SYMOP(result) && IS_GENPTR(OP_SYM_TYPE(result))) + { + /* provide correct tag */ + int isCode = IN_CODESPACE(SPEC_OCLS(getSpec(OP_SYM_TYPE(left)))); + emitpcode (POC_MOVLW, popGetLit (isCode ? GPTRTAG_CODE : GPTRTAG_DATA)); + movwf (AOP(result), 2); + } + + freeAsmop(left,NULL,ic,FALSE); + freeAsmop(result,NULL,ic,TRUE); + +} + +/*-----------------------------------------------------------------*/ +/* genAssign - generate code for assignment */ +/*-----------------------------------------------------------------*/ +static void genAssign (iCode *ic) +{ + operand *result, *right; + int size, offset,know_W; + unsigned long lit = 0L; + + result = IC_RESULT(ic); + right = IC_RIGHT(ic) ; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + /* if they are the same */ + if (operandsEqu (IC_RESULT(ic),IC_RIGHT(ic))) + return ; + + aopOp(right,ic,FALSE); + aopOp(result,ic,TRUE); + + DEBUGpic14_AopType(__LINE__,NULL,right,result); + + /* if they are the same registers */ + if (pic14_sameRegs(AOP(right),AOP(result))) + goto release; + + /* special case: assign from __code */ + if (!IS_ITEMP(right) /* --> iTemps never reside in __code */ + && IS_SYMOP (right) /* --> must be an immediate (otherwise we would be in genConstPointerGet) */ + && !IS_FUNC(OP_SYM_TYPE(right)) /* --> we would want its address instead of the first instruction */ + && !IS_CODEPTR(OP_SYM_TYPE(right)) /* --> get symbols address instread */ + && IN_CODESPACE (SPEC_OCLS (getSpec (OP_SYM_TYPE(right))))) + { + emitpComment ("genAssign from CODESPACE"); + genConstPointerGet (right, result, ic); + goto release; + } + + /* just for symmetry reasons... */ + if (!IS_ITEMP(result) + && IS_SYMOP (result) + && IN_CODESPACE (SPEC_OCLS (getSpec (OP_SYM_TYPE(result))))) + { + assert ( !"cannot write to CODESPACE" ); + } + + /* if the result is a bit */ + if (AOP_TYPE(result) == AOP_CRY) { + + /* if the right size is a literal then + we know what the value is */ + if (AOP_TYPE(right) == AOP_LIT) { + + emitpcode( ( ((int) operandLitValue(right)) ? POC_BSF : POC_BCF), + popGet(AOP(result),0)); + + if (((int) operandLitValue(right))) + pic14_emitcode("bsf","(%s >> 3),(%s & 7)", + AOP(result)->aopu.aop_dir, + AOP(result)->aopu.aop_dir); + else + pic14_emitcode("bcf","(%s >> 3),(%s & 7)", + AOP(result)->aopu.aop_dir, + AOP(result)->aopu.aop_dir); + goto release; + } + + /* the right is also a bit variable */ + if (AOP_TYPE(right) == AOP_CRY) { + emitpcode(POC_BCF, popGet(AOP(result),0)); + emitpcode(POC_BTFSC, popGet(AOP(right),0)); + emitpcode(POC_BSF, popGet(AOP(result),0)); + + pic14_emitcode("bcf","(%s >> 3),(%s & 7)", + AOP(result)->aopu.aop_dir, + AOP(result)->aopu.aop_dir); + pic14_emitcode("btfsc","(%s >> 3),(%s & 7)", + AOP(right)->aopu.aop_dir, + AOP(right)->aopu.aop_dir); + pic14_emitcode("bsf","(%s >> 3),(%s & 7)", + AOP(result)->aopu.aop_dir, + AOP(result)->aopu.aop_dir); + goto release ; + } + + /* we need to or */ + emitpcode(POC_BCF, popGet(AOP(result),0)); + pic14_toBoolean(right); + emitSKPZ; + emitpcode(POC_BSF, popGet(AOP(result),0)); + //aopPut(AOP(result),"a",0); + goto release ; + } + + /* bit variables done */ + /* general case */ + size = AOP_SIZE(result); + offset = 0 ; + if( AOP_TYPE(right) == AOP_DIR && (AOP_TYPE(result) == AOP_REG) && size==1) { + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if(aopIdx(AOP(result),0) == 4) { + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + emitpcode(POC_MOVFW, popGet(AOP(right),offset)); + emitpcode(POC_MOVWF, popGet(AOP(result),offset)); + goto release; + } else + DEBUGpic14_emitcode ("; WARNING","%s %d ignoring register storage",__FUNCTION__,__LINE__); + } + + know_W=-1; + while (size--) { + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if(AOP_TYPE(right) == AOP_LIT) { + lit = (unsigned long)pic14aopLiteral(AOP(right)->aopu.aop_lit, offset) & 0x0ff; + if(lit&0xff) { + if(know_W != (int)(lit&0xff)) + emitpcode(POC_MOVLW,popGetLit(lit&0xff)); + know_W = lit&0xff; + emitpcode(POC_MOVWF, popGet(AOP(result),offset)); + } else + emitpcode(POC_CLRF, popGet(AOP(result),offset)); + + } else if (AOP_TYPE(right) == AOP_CRY) { + emitpcode(POC_CLRF, popGet(AOP(result),offset)); + if(offset == 0) { + emitpcode(POC_BTFSS, popGet(AOP(right),0)); + emitpcode(POC_INCF, popGet(AOP(result),0)); + } + } else { + mov2w_op (right, offset); + emitpcode(POC_MOVWF, popGet(AOP(result),offset)); + } + + offset++; + } + + +release: + freeAsmop (right,NULL,ic,FALSE); + freeAsmop (result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genJumpTab - genrates code for jump table */ +/*-----------------------------------------------------------------*/ +static void genJumpTab (iCode *ic) +{ + symbol *jtab; + char *l; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + aopOp(IC_JTCOND(ic),ic,FALSE); + /* get the condition into accumulator */ + l = aopGet(AOP(IC_JTCOND(ic)),0,FALSE,FALSE); + MOVA(l); + /* multiply by three */ + pic14_emitcode("add","a,acc"); + pic14_emitcode("add","a,%s",aopGet(AOP(IC_JTCOND(ic)),0,FALSE,FALSE)); + + jtab = newiTempLabel(NULL); + pic14_emitcode("mov","dptr,#%05d_DS_",jtab->key+100); + pic14_emitcode("jmp","@a+dptr"); + pic14_emitcode("","%05d_DS_:",jtab->key+100); + + emitpcode(POC_MOVLW, popGetHighLabel(jtab->key)); + emitpcode(POC_MOVWF, popCopyReg(&pc_pclath)); + emitpcode(POC_MOVLW, popGetLabel(jtab->key)); + emitpcode(POC_ADDFW, popGet(AOP(IC_JTCOND(ic)),0)); + emitSKPNC; + emitpcode(POC_INCF, popCopyReg(&pc_pclath)); + emitpcode(POC_MOVWF, popCopyReg(&pc_pcl)); + emitpLabel(jtab->key); + + freeAsmop(IC_JTCOND(ic),NULL,ic,TRUE); + + /* now generate the jump labels */ + for (jtab = setFirstItem(IC_JTLABELS(ic)) ; jtab; + jtab = setNextItem(IC_JTLABELS(ic))) { + pic14_emitcode("ljmp","%05d_DS_",jtab->key+100); + emitpcode(POC_GOTO,popGetLabel(jtab->key)); + + } + +} + +/*-----------------------------------------------------------------*/ +/* genCast - gen code for casting */ +/*-----------------------------------------------------------------*/ +static void genCast (iCode *ic) +{ + operand *result = IC_RESULT(ic); + sym_link *restype = operandType(result); + sym_link *rtype = operandType(IC_RIGHT(ic)); + operand *right = IC_RIGHT(ic); + int size, offset ; + + FENTRY; + DEBUGpic14_emitcode("; ***","%s %d",__FUNCTION__,__LINE__); + /* if they are equivalent then do nothing */ + if (operandsEqu(IC_RESULT(ic),IC_RIGHT(ic))) + return ; + + aopOp(right,ic,FALSE) ; + aopOp(result,ic,FALSE); + + DEBUGpic14_AopType(__LINE__,NULL,right,result); + + /* if the result is a bit */ + if (AOP_TYPE(result) == AOP_CRY) { + assert(!"assigning to bit variables is not supported"); + } + + if ((AOP_TYPE(right) == AOP_CRY) && (AOP_TYPE(result) == AOP_REG)) { + int offset = 1; + size = AOP_SIZE(result); + + DEBUGpic14_emitcode("; ***","%s %d",__FUNCTION__,__LINE__); + + emitpcode(POC_CLRF, popGet(AOP(result),0)); + emitpcode(POC_BTFSC, popGet(AOP(right),0)); + emitpcode(POC_INCF, popGet(AOP(result),0)); + + while (size--) + emitpcode(POC_CLRF, popGet(AOP(result),offset++)); + + goto release; + } + + if (IS_PTR(restype)) + { + operand *result = IC_RESULT(ic); + //operand *left = IC_LEFT(ic); + operand *right = IC_RIGHT(ic); + int tag = 0xff; + + /* copy common part */ + int max, size = AOP_SIZE(result); + if (size > AOP_SIZE(right)) size = AOP_SIZE(right); + DEBUGpic14_emitcode("; ***","%s %d",__FUNCTION__,__LINE__); + + /* warn if we discard generic opinter tag */ + if (!IS_GENPTR(restype) && IS_GENPTR(rtype) && (AOP_SIZE(result) < AOP_SIZE(right))) + { + //fprintf (stderr, "%s:%u: discarding generic pointer type tag\n", __FUNCTION__, __LINE__); + } // if + + max = size; + while (size--) + { + mov2w_op (right, size); + movwf (AOP(result), size); + } // while + + /* upcast into generic pointer type? */ + if (IS_GENPTR(restype) + && (size < AOP_SIZE(result)) + && (!IS_GENPTR(rtype) || AOP_SIZE(right) < GPTRSIZE)) + { + //fprintf (stderr, "%s:%u: must determine pointer type\n", __FUNCTION__, __LINE__); + if (IS_PTR(rtype)) + { + switch (DCL_TYPE(rtype)) + { + case POINTER: /* __data */ + case FPOINTER: /* __data */ + assert (AOP_SIZE(right) == 2); + tag = GPTRTAG_DATA; + break; + + case CPOINTER: /* __code */ + assert (AOP_SIZE(right) == 2); + tag = GPTRTAG_CODE; + break; + + case GPOINTER: /* unknown destination, __data or __code */ + /* assume __data space (address of immediate) */ + assert (AOP_TYPE(right) == AOP_PCODE && AOP(right)->aopu.pcop->type == PO_IMMEDIATE); + if (AOP(right)->code) + tag = GPTRTAG_CODE; + else + tag = GPTRTAG_DATA; + break; + + default: + assert (!"unhandled pointer type"); + } // switch + } else { + /* convert other values into pointers to __data space */ + tag = GPTRTAG_DATA; + } + + assert (AOP_SIZE(result) == 3); + if (tag == 0) { + emitpcode(POC_CLRF, popGet(AOP(result), 2)); + } else { + emitpcode(POC_MOVLW, popGetLit(tag)); + movwf(AOP(result), 2); + } + } else { + addSign(result, max, 0); + } // if + goto release; + } + + /* if they are the same size : or less */ + if (AOP_SIZE(result) <= AOP_SIZE(right)) { + + /* if they are in the same place */ + if (pic14_sameRegs(AOP(right),AOP(result))) + goto release; + + DEBUGpic14_emitcode("; ***","%s %d",__FUNCTION__,__LINE__); + if (IS_PTR_CONST(rtype)) + DEBUGpic14_emitcode ("; ***","%d - right is const pointer",__LINE__); + if (IS_PTR_CONST(operandType(IC_RESULT(ic)))) + DEBUGpic14_emitcode ("; ***","%d - result is const pointer",__LINE__); + + if ((AOP_TYPE(right) == AOP_PCODE) && AOP(right)->aopu.pcop->type == PO_IMMEDIATE) { + emitpcode(POC_MOVLW, popGetAddr(AOP(right),0,0)); + emitpcode(POC_MOVWF, popGet(AOP(result),0)); + emitpcode(POC_MOVLW, popGetAddr(AOP(right),1,0)); + emitpcode(POC_MOVWF, popGet(AOP(result),1)); + if(AOP_SIZE(result) <2) + fprintf(stderr,"%d -- result is not big enough to hold a ptr\n",__LINE__); + + } else { + + /* if they in different places then copy */ + size = AOP_SIZE(result); + offset = 0 ; + while (size--) { + emitpcode(POC_MOVFW, popGet(AOP(right),offset)); + emitpcode(POC_MOVWF, popGet(AOP(result),offset)); + + //aopPut(AOP(result), + // aopGet(AOP(right),offset,FALSE,FALSE), + // offset); + + offset++; + } + } + goto release; + } + + /* so we now know that the size of destination is greater + than the size of the source. */ + + /* we move to result for the size of source */ + size = AOP_SIZE(right); + offset = 0 ; + while (size--) { + emitpcode(POC_MOVFW, popGet(AOP(right),offset)); + emitpcode(POC_MOVWF, popGet(AOP(result),offset)); + offset++; + } + + addSign (result, AOP_SIZE(right), !SPEC_USIGN(rtype)); + +release: + freeAsmop(right,NULL,ic,TRUE); + freeAsmop(result,NULL,ic,TRUE); + +} + +/*-----------------------------------------------------------------*/ +/* genDjnz - generate decrement & jump if not zero instrucion */ +/*-----------------------------------------------------------------*/ +static int genDjnz (iCode *ic, iCode *ifx) +{ + symbol *lbl, *lbl1; + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if (!ifx) + return 0; + + /* if the if condition has a false label + then we cannot save */ + if (IC_FALSE(ifx)) + return 0; + + /* if the minus is not of the form + a = a - 1 */ + if (!isOperandEqual(IC_RESULT(ic),IC_LEFT(ic)) || + !IS_OP_LITERAL(IC_RIGHT(ic))) + return 0; + + if (operandLitValue(IC_RIGHT(ic)) != 1) + return 0; + + /* if the size of this greater than one then no + saving */ + if (getSize(operandType(IC_RESULT(ic))) > 1) + return 0; + + /* otherwise we can save BIG */ + lbl = newiTempLabel(NULL); + lbl1= newiTempLabel(NULL); + + aopOp(IC_RESULT(ic),ic,FALSE); + + emitpcode(POC_DECFSZ,popGet(AOP(IC_RESULT(ic)),0)); + emitpcode(POC_GOTO,popGetLabel(IC_TRUE(ifx)->key)); + + freeAsmop(IC_RESULT(ic),NULL,ic,TRUE); + ifx->generated = 1; + return 1; +} + +/*-----------------------------------------------------------------*/ +/* genReceive - generate code for a receive iCode */ +/*-----------------------------------------------------------------*/ +static void genReceive (iCode *ic) +{ + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if (isOperandInFarSpace(IC_RESULT(ic)) && + ( OP_SYMBOL(IC_RESULT(ic))->isspilt || + IS_TRUE_SYMOP(IC_RESULT(ic))) ) { + + int size = getSize(operandType(IC_RESULT(ic))); + int offset = fReturnSizePic - size; + while (size--) { + pic14_emitcode ("push","%s", (strcmp(fReturn[fReturnSizePic - offset - 1],"a") ? + fReturn[fReturnSizePic - offset - 1] : "acc")); + offset++; + } + aopOp(IC_RESULT(ic),ic,FALSE); + size = AOP_SIZE(IC_RESULT(ic)); + offset = 0; + while (size--) { + pic14_emitcode ("pop","acc"); + aopPut (AOP(IC_RESULT(ic)),"a",offset++); + } + + } else { + _G.accInUse++; + aopOp(IC_RESULT(ic),ic,FALSE); + _G.accInUse--; + GpsuedoStkPtr = ic->parmBytes; // address used arg on stack + assignResultValue(IC_RESULT(ic)); + } + + freeAsmop(IC_RESULT(ic),NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genDummyRead - generate code for dummy read of volatiles */ +/*-----------------------------------------------------------------*/ +static void +genDummyRead (iCode * ic) +{ + FENTRY; + pic14_emitcode ("; genDummyRead",""); + pic14_emitcode ("; not implemented",""); + + ic = ic; +} + +/*-----------------------------------------------------------------*/ +/* genpic14Code - generate code for pic14 based controllers */ +/*-----------------------------------------------------------------*/ +/* +* At this point, ralloc.c has gone through the iCode and attempted +* to optimize in a way suitable for a PIC. Now we've got to generate +* PIC instructions that correspond to the iCode. +* +* Once the instructions are generated, we'll pass through both the +* peep hole optimizer and the pCode optimizer. +*-----------------------------------------------------------------*/ + +void genpic14Code (iCode *lic) +{ + iCode *ic; + int cln = 0; + const char *cline; + + FENTRY; + lineHead = lineCurr = NULL; + + pb = newpCodeChain(GcurMemmap,0,newpCodeCharP("; Starting pCode block")); + addpBlock(pb); + + /* if debug information required */ + if (options.debug && debugFile && currFunc) { + debugFile->writeFunction (currFunc, lic); + } + + + for (ic = lic ; ic ; ic = ic->next ) { + + //DEBUGpic14_emitcode(";ic",""); + //fprintf (stderr, "in ic loop\n"); + //pic14_emitcode ("", ";\t%s:%d: %s", ic->filename, + //ic->lineno, printCLine(ic->filename, ic->lineno)); + + if (!options.noCcodeInAsm && (cln != ic->lineno)) { + cln = ic->lineno; + //fprintf (stderr, "%s\n", printCLine (ic->filename, ic->lineno)); + cline = printCLine (ic->filename, ic->lineno); + if (!cline || strlen (cline) == 0) cline = printCLine (ic->filename, ic->lineno); + addpCode2pBlock (pb, newpCodeCSource (ic->lineno, ic->filename, cline)); + //emitpComment ("[C-SRC] %s:%d: %s", ic->filename, cln, cline); + } + + if (options.iCodeInAsm) { + const char *iLine = printILine(ic); + emitpComment ("[ICODE] %s:%d: %s", ic->filename, ic->lineno, printILine (ic)); + dbuf_free(iLine); + } + /* if the result is marked as + spilt and rematerializable or code for + this has already been generated then + do nothing */ + if (resultRemat(ic) || ic->generated ) + continue ; + + /* depending on the operation */ + switch (ic->op) { + case '!' : + genNot(ic); + break; + + case '~' : + genCpl(ic); + break; + + case UNARYMINUS: + genUminus (ic); + break; + + case IPUSH: + genIpush (ic); + break; + + case IPOP: + /* IPOP happens only when trying to restore a + spilt live range, if there is an ifx statement + following this pop then the if statement might + be using some of the registers being popped which + would destory the contents of the register so + we need to check for this condition and handle it */ + if (ic->next && + ic->next->op == IFX && + regsInCommon(IC_LEFT(ic),IC_COND(ic->next))) + genIfx (ic->next,ic); + else + genIpop (ic); + break; + + case CALL: + genCall (ic); + break; + + case PCALL: + genPcall (ic); + break; + + case FUNCTION: + genFunction (ic); + break; + + case ENDFUNCTION: + genEndFunction (ic); + break; + + case RETURN: + genRet (ic); + break; + + case LABEL: + genLabel (ic); + break; + + case GOTO: + genGoto (ic); + break; + + case '+' : + genPlus (ic) ; + break; + + case '-' : + if ( ! genDjnz (ic,ifxForOp(IC_RESULT(ic),ic))) + genMinus (ic); + break; + + case '*' : + genMult (ic); + break; + + case '/' : + genDiv (ic) ; + break; + + case '%' : + genMod (ic); + break; + + case '>' : + genCmpGt (ic,ifxForOp(IC_RESULT(ic),ic)); + break; + + case '<' : + genCmpLt (ic,ifxForOp(IC_RESULT(ic),ic)); + break; + + case LE_OP: + case GE_OP: + case NE_OP: + + /* note these two are xlated by algebraic equivalence + during parsing SDCC.y */ + werror(E_INTERNAL_ERROR,__FILE__,__LINE__, + "got '>=' or '<=' shouldn't have come here"); + break; + + case EQ_OP: + genCmpEq (ic,ifxForOp(IC_RESULT(ic),ic)); + break; + + case AND_OP: + genAndOp (ic); + break; + + case OR_OP: + genOrOp (ic); + break; + + case '^' : + genXor (ic,ifxForOp(IC_RESULT(ic),ic)); + break; + + case '|' : + genOr (ic,ifxForOp(IC_RESULT(ic),ic)); + break; + + case BITWISEAND: + genAnd (ic,ifxForOp(IC_RESULT(ic),ic)); + break; + + case INLINEASM: + genInline (ic); + break; + + case RRC: + genRRC (ic); + break; + + case RLC: + genRLC (ic); + break; + + case GETHBIT: + genGetHbit (ic); + break; + + case LEFT_OP: + genLeftShift (ic); + break; + + case RIGHT_OP: + genRightShift (ic); + break; + + case GET_VALUE_AT_ADDRESS: + genPointerGet(ic); + break; + + case '=' : + if (POINTER_SET(ic)) + genPointerSet(ic); + else + genAssign(ic); + break; + + case IFX: + genIfx (ic,NULL); + break; + + case ADDRESS_OF: + genAddrOf (ic); + break; + + case JUMPTABLE: + genJumpTab (ic); + break; + + case CAST: + genCast (ic); + break; + + case RECEIVE: + genReceive(ic); + break; + + case SEND: + addSet(&_G.sendSet,ic); + break; + + case DUMMY_READ_VOLATILE: + genDummyRead (ic); + break; + + default : + fprintf(stderr, "UNHANDLED iCode: "); piCode(ic, stderr); + ic = ic; + break; + } + } + + + /* now we are ready to call the + peep hole optimizer */ + if (!options.nopeep) { + peepHole (&lineHead); + } + /* now do the actual printing */ + printLine (lineHead,codeOutBuf); + +#ifdef PCODE_DEBUG + DFPRINTF((stderr,"printing pBlock\n\n")); + printpBlock(stdout,pb); +#endif + + return; +} + +/* This is not safe, as a AOP_PCODE/PO_IMMEDIATE might be used both as literal + * (meaning: representing its own address) or not (referencing its contents). + * This can only be decided based on the operand's type. */ +static int +aop_isLitLike (asmop *aop) +{ + assert (aop); + if (aop->type == AOP_LIT) return 1; + if (aop->type == AOP_IMMD) return 1; + if ((aop->type == AOP_PCODE) && + ((aop->aopu.pcop->type == PO_LITERAL))) + { + /* this should be treated like a literal/immediate (use MOVLW/ADDLW/SUBLW + * instead of MOVFW/ADDFW/SUBFW, use popGetAddr instead of popGet) */ + return 1; + } + return 0; +} + +int +op_isLitLike (operand *op) +{ + assert (op); + if (aop_isLitLike (AOP(op))) return 1; + if (IS_SYMOP(op) && IS_FUNC(OP_SYM_TYPE(op))) return 1; + if (IS_SYMOP(op) && IS_PTR(OP_SYM_TYPE(op)) + && (AOP_TYPE(op) == AOP_PCODE) + && (AOP(op)->aopu.pcop->type == PO_IMMEDIATE)) { + return 1; + } + + return 0; +} + diff --git a/src/pic/gen.h b/src/pic/gen.h new file mode 100644 index 0000000..6419836 --- /dev/null +++ b/src/pic/gen.h @@ -0,0 +1,174 @@ +/*------------------------------------------------------------------------- + SDCCgen51.h - header file for code generation for 8051 + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + PIC port - T. Scott Dattalo scott@dattalo.com (2000) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCGENPIC14_H +#define SDCCGENPIC14_H + +#include "common.h" + +#include "main.h" +#include "pcode.h" +#include "ralloc.h" + +#define FENTRY do { \ + /*fprintf (stderr, "%s:%u:%s: *{*\n", __FILE__, __LINE__, __FUNCTION__);*/ \ + if (options.debug || debug_verbose) { \ + emitpComment ("; %s:%u:%s *{*", __FILE__, __LINE__, __FUNCTION__); \ + } \ +} while (0) +#define FEXIT do { \ + /*fprintf (stderr, "%s:%u:%s: *}*\n", __FILE__, __LINE__, __FUNCTION__);*/ \ + if (options.debug || debug.verbose) { \ + emitpComment ("; %s:%u:%s *}*", __FILE__, __LINE__, __FUNCTION__); \ + } \ +} while (0) + +enum +{ + AOP_LIT = 1, + AOP_REG, + AOP_DIR, + AOP_STK, + AOP_IMMD, + AOP_STR, + AOP_CRY, + AOP_PCODE + +}; + +/* type asmop : a homogenised type for + all the different spaces an operand can be + in */ +typedef struct asmop +{ + + short type; /* can have values + AOP_LIT - operand is a literal value + AOP_REG - is in registers + AOP_DIR - direct just a name + AOP_STK - should be pushed on stack this + can happen only for the result + AOP_IMMD - immediate value for eg. remateriazable + AOP_CRY - carry contains the value of this + AOP_STR - array of strings + */ + short coff; /* current offset */ + short size; /* total size */ + unsigned code:1; /* is in Code space */ + unsigned paged:1; /* in paged memory */ + unsigned freed:1; /* already freed */ + union + { + value *aop_lit; /* if literal */ + regs *aop_reg[4]; /* array of registers */ + char *aop_dir; /* if direct */ + regs *aop_ptr; /* either -> to r0 or r1 */ + char *aop_immd; /* if immediate others are implied */ + int aop_stk; /* stack offset when AOP_STK */ + char *aop_str[4]; /* just a string array containing the location */ + pCodeOp *pcop; + } + aopu; +} +asmop; + +extern unsigned fReturnSizePic; + + +#define AOP(op) op->aop +#define AOP_TYPE(op) AOP(op)->type +#define AOP_SIZE(op) AOP(op)->size + +#define AOP_NEEDSACC(x) (AOP(x) && (AOP_TYPE(x) == AOP_CRY || AOP(x)->paged)) + +#define RESULTONSTACK(x) \ + (IC_RESULT(x) && IC_RESULT(x)->aop && \ + IC_RESULT(x)->aop->type == AOP_STK ) + +#define MOVA(x) if (strcmp(x,"a") && strcmp(x,"acc")) pic14_emitcode(";XXX mov","a,%s %s,%d",x,__FILE__,__LINE__); +#define CLRC pic14_emitcode(";XXX clr","c %s,%d",__FILE__,__LINE__); + +#define LSB 0 +#define MSB16 1 +#define MSB24 2 +#define MSB32 3 + +/*-----------------------------------------------------------------*/ +/* Macros for emitting skip instructions */ +/*-----------------------------------------------------------------*/ + +#define emitSKPC emitpcode(POC_BTFSS,popCopyGPR2Bit(PCOP(&pc_status),PIC_C_BIT)) +#define emitSKPNC emitpcode(POC_BTFSC,popCopyGPR2Bit(PCOP(&pc_status),PIC_C_BIT)) +#define emitSKPZ emitpcode(POC_BTFSS,popCopyGPR2Bit(PCOP(&pc_status),PIC_Z_BIT)) +#define emitSKPNZ emitpcode(POC_BTFSC,popCopyGPR2Bit(PCOP(&pc_status),PIC_Z_BIT)) +#define emitSKPDC emitpcode(POC_BTFSS,popCopyGPR2Bit(PCOP(&pc_status),PIC_DC_BIT)) +#define emitSKPNDC emitpcode(POC_BTFSC,popCopyGPR2Bit(PCOP(&pc_status),PIC_DC_BIT)) +#define emitCLRZ emitpcode(POC_BCF, popCopyGPR2Bit(PCOP(&pc_status),PIC_Z_BIT)) +#define emitCLRC emitpcode(POC_BCF, popCopyGPR2Bit(PCOP(&pc_status),PIC_C_BIT)) +#define emitCLRDC emitpcode(POC_BCF, popCopyGPR2Bit(PCOP(&pc_status),PIC_DC_BIT)) +#define emitCLRIRP emitpcode(POC_BCF, popCopyGPR2Bit(PCOP(&pc_status),PIC_IRP_BIT)) +#define emitSETZ emitpcode(POC_BSF, popCopyGPR2Bit(PCOP(&pc_status),PIC_Z_BIT)) +#define emitSETC emitpcode(POC_BSF, popCopyGPR2Bit(PCOP(&pc_status),PIC_C_BIT)) +#define emitSETDC emitpcode(POC_BSF, popCopyGPR2Bit(PCOP(&pc_status),PIC_DC_BIT)) +#define emitSETIRP emitpcode(POC_BSF, popCopyGPR2Bit(PCOP(&pc_status),PIC_IRP_BIT)) + +int pic14_getDataSize(operand *op); +void emitpcode_real(PIC_OPCODE poc, pCodeOp *pcop); +#define emitpcode(poc,pcop) do { if (options.debug || debug_verbose) { emitpComment (" >>> %s:%d:%s", __FILE__, __LINE__, __FUNCTION__); } emitpcode_real(poc,pcop); } while(0) +void emitpComment (const char *fmt, ...); +void emitpLabel(int key); +void pic14_emitcode (char *inst,char *fmt, ...); +void DEBUGpic14_emitcode (char *inst,char *fmt, ...); +void pic14_emitDebuggerSymbol (char *); +bool pic14_sameRegs (asmop *aop1, asmop *aop2 ); +char *aopGet (asmop *aop, int offset, bool bit16, bool dname); +void DEBUGpic14_AopType(int line_no, operand *left, operand *right, operand *result); +void genpic14Code (iCode *lic); + + +pCodeOp *popGet (asmop *aop, int offset);//, bool bit16, bool dname); +pCodeOp *popGetAddr (asmop *aop, int offset, int index); +pCodeOp *popGetExternal (char *str, int isReg); +pCodeOp *popGetLabel(unsigned int key); +pCodeOp *popGetLit(unsigned int lit); + + +void aopPut (asmop *aop, char *s, int offset); +void pic14_outAcc(operand *result); +void aopOp (operand *op, iCode *ic, bool result); +void freeAsmop (operand *op, asmop *aaop, iCode *ic, bool pop); +void mov2w (asmop *aop, int offset); +int op_isLitLike (operand *op); + +/* + * From genarith.c: + */ +const char *AopType(short type); +const char *pCodeOpType(pCodeOp *pcop); +void genPlus (iCode *ic); +void addSign(operand *result, int offset, int sign); +void genMinus (iCode *ic); + +#endif diff --git a/src/pic/genarith.c b/src/pic/genarith.c new file mode 100644 index 0000000..d4a2b77 --- /dev/null +++ b/src/pic/genarith.c @@ -0,0 +1,1229 @@ +/*------------------------------------------------------------------------- + genarith.c - source file for code generation - arithmetic + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + and - Jean-Louis VERN.jlvern@writeme.com (1999) + Bug Fixes - Wojciech Stryjewski wstryj1@tiger.lsu.edu (1999 v2.1.9a) + PIC port - Scott Dattalo scott@dattalo.com (2000) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + Notes: + 000123 mlh Moved aopLiteral to SDCCglue.c to help the split + Made everything static +-------------------------------------------------------------------------*/ + +#if defined(_MSC_VER) && (_MSC_VER < 1300) +#define __FUNCTION__ __FILE__ +#endif + +#include "common.h" +#include "newalloc.h" +//#include "SDCCglobl.h" +//#include "SDCCpeeph.h" + +#include "gen.h" +#include "pcode.h" +#include "ralloc.h" + + +#define BYTEofLONG(l,b) ( (l>> (b<<3)) & 0xff) + +const char *AopType(short type) +{ + switch(type) { + case AOP_LIT: + return "AOP_LIT"; + break; + case AOP_REG: + return "AOP_REG"; + break; + case AOP_DIR: + return "AOP_DIR"; + break; + case AOP_STK: + return "AOP_STK"; + break; + case AOP_IMMD: + return "AOP_IMMD"; + break; + case AOP_STR: + return "AOP_STR"; + break; + case AOP_CRY: + return "AOP_CRY"; + break; + case AOP_PCODE: + return "AOP_PCODE"; + break; + } + + return "BAD TYPE"; +} + +const char *pCodeOpType(pCodeOp *pcop) +{ + + if(pcop) { + + switch(pcop->type) { + + case PO_NONE: + return "PO_NONE"; + case PO_W: + return "PO_W"; + case PO_STATUS: + return "PO_STATUS"; + case PO_FSR: + return "PO_FSR"; + case PO_INDF: + return "PO_INDF"; + case PO_INTCON: + return "PO_INTCON"; + case PO_GPR_REGISTER: + return "PO_GPR_REGISTER"; + case PO_GPR_POINTER: + return "PO_GPR_POINTER"; + case PO_GPR_BIT: + return "PO_GPR_BIT"; + case PO_GPR_TEMP: + return "PO_GPR_TEMP"; + case PO_SFR_REGISTER: + return "PO_SFR_REGISTER"; + case PO_PCL: + return "PO_PCL"; + case PO_PCLATH: + return "PO_PCLATH"; + case PO_LITERAL: + return "PO_LITERAL"; + case PO_IMMEDIATE: + return "PO_IMMEDIATE"; + case PO_DIR: + return "PO_DIR"; + case PO_CRY: + return "PO_CRY"; + case PO_BIT: + return "PO_BIT"; + case PO_STR: + return "PO_STR"; + case PO_LABEL: + return "PO_LABEL"; + case PO_WILD: + return "PO_WILD"; + } + } + + return "BAD PO_TYPE"; +} + +/*-----------------------------------------------------------------*/ +/* genPlusIncr :- does addition with increment if possible */ +/*-----------------------------------------------------------------*/ +static bool genPlusIncr (iCode *ic) +{ + unsigned int icount ; + unsigned int size = pic14_getDataSize(IC_RESULT(ic)); + FENTRY; + + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + DEBUGpic14_emitcode ("; ","result %s, left %s, right %s", + AopType(AOP_TYPE(IC_RESULT(ic))), + AopType(AOP_TYPE(IC_LEFT(ic))), + AopType(AOP_TYPE(IC_RIGHT(ic)))); + + /* will try to generate an increment */ + /* if the right side is not a literal + we cannot */ + if (AOP_TYPE(IC_RIGHT(ic)) != AOP_LIT) + return FALSE ; + + DEBUGpic14_emitcode ("; ","%s %d",__FUNCTION__,__LINE__); + /* if the literal value of the right hand side + is greater than 1 then it is faster to add */ + if ((icount = (unsigned int) ulFromVal (AOP(IC_RIGHT(ic))->aopu.aop_lit)) > 2) + return FALSE ; + + /* if increment 16 bits in register */ + if (pic14_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic))) && + (icount == 1)) { + + int offset = MSB16; + + emitpcode(POC_INCF, popGet(AOP(IC_RESULT(ic)),LSB)); + //pic14_emitcode("incf","%s,f",aopGet(AOP(IC_RESULT(ic)),LSB,FALSE,FALSE)); + + while(--size) { + emitSKPNZ; + emitpcode(POC_INCF, popGet(AOP(IC_RESULT(ic)),offset++)); + //pic14_emitcode(" incf","%s,f",aopGet(AOP(IC_RESULT(ic)),offset++,FALSE,FALSE)); + } + + return TRUE; + } + + DEBUGpic14_emitcode ("; ","%s %d",__FUNCTION__,__LINE__); + /* if left is in accumulator - probably a bit operation*/ + if( strcmp(aopGet(AOP(IC_LEFT(ic)),0,FALSE,FALSE),"a") && + (AOP_TYPE(IC_RESULT(ic)) == AOP_CRY) ) { + + emitpcode(POC_BCF, popGet(AOP(IC_RESULT(ic)),0)); + pic14_emitcode("bcf","(%s >> 3), (%s & 7)", + AOP(IC_RESULT(ic))->aopu.aop_dir, + AOP(IC_RESULT(ic))->aopu.aop_dir); + if(icount) + emitpcode(POC_XORLW,popGetLit(1)); + //pic14_emitcode("xorlw","1"); + else + emitpcode(POC_ANDLW,popGetLit(1)); + //pic14_emitcode("andlw","1"); + + emitSKPZ; + emitpcode(POC_BSF, popGet(AOP(IC_RESULT(ic)),0)); + pic14_emitcode("bsf","(%s >> 3), (%s & 7)", + AOP(IC_RESULT(ic))->aopu.aop_dir, + AOP(IC_RESULT(ic))->aopu.aop_dir); + + return TRUE; + } + + + + /* if the sizes are greater than 1 then we cannot */ + if (AOP_SIZE(IC_RESULT(ic)) > 1 || + AOP_SIZE(IC_LEFT(ic)) > 1 ) + return FALSE ; + + /* If we are incrementing the same register by two: */ + + if (pic14_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic))) ) { + + while (icount--) + emitpcode(POC_INCF, popGet(AOP(IC_RESULT(ic)),0)); + //pic14_emitcode("incf","%s,f",aopGet(AOP(IC_RESULT(ic)),0,FALSE,FALSE)); + + return TRUE ; + } + + DEBUGpic14_emitcode ("; ","couldn't increment "); + + return FALSE ; +} + +/*-----------------------------------------------------------------*/ +/* genAddlit - generates code for addition */ +/*-----------------------------------------------------------------*/ +static void genAddLit2byte (operand *result, int offr, int lit) +{ + FENTRY; + + switch(lit & 0xff) { + case 0: + break; + case 1: + emitpcode(POC_INCF, popGet(AOP(result),offr)); + break; + case 0xff: + emitpcode(POC_DECF, popGet(AOP(result),offr)); + break; + default: + emitpcode(POC_MOVLW,popGetLit(lit&0xff)); + emitpcode(POC_ADDWF,popGet(AOP(result),offr)); + } + +} + +static void emitMOVWF(operand *reg, int offset) +{ + FENTRY; + if(!reg) + return; + + emitpcode(POC_MOVWF, popGet(AOP(reg),offset)); + +} + +static void genAddLit (iCode *ic, int lit) +{ + + int size,same; + int lo; + + operand *result; + operand *left; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + + left = IC_LEFT(ic); + result = IC_RESULT(ic); + same = pic14_sameRegs(AOP(left), AOP(result)); + size = pic14_getDataSize(result); + if (size > pic14_getDataSize(left)) + size = pic14_getDataSize(left); + + if(same) { + + /* Handle special cases first */ + if(size == 1) + genAddLit2byte (result, 0, lit); + + else if(size == 2) { + int hi = 0xff & (lit >> 8); + lo = lit & 0xff; + + switch(hi) { + case 0: + + /* lit = 0x00LL */ + DEBUGpic14_emitcode ("; hi = 0","%s %d",__FUNCTION__,__LINE__); + switch(lo) { + case 0: + break; + case 1: + emitpcode(POC_INCF, popGet(AOP(result),0)); + emitSKPNZ; + emitpcode(POC_INCF, popGet(AOP(result),MSB16)); + break; + case 0xff: + emitpcode(POC_DECF, popGet(AOP(result),0)); + emitpcode(POC_INCFSZW, popGet(AOP(result),0)); + emitpcode(POC_INCF, popGet(AOP(result),MSB16)); + + break; + default: + emitpcode(POC_MOVLW,popGetLit(lit&0xff)); + emitpcode(POC_ADDWF,popGet(AOP(result),0)); + emitSKPNC; + emitpcode(POC_INCF, popGet(AOP(result),MSB16)); + + + } + break; + + case 1: + /* lit = 0x01LL */ + DEBUGpic14_emitcode ("; hi = 1","%s %d",__FUNCTION__,__LINE__); + switch(lo) { + case 0: /* 0x0100 */ + emitpcode(POC_INCF, popGet(AOP(result),MSB16)); + break; + case 1: /* 0x0101 */ + emitpcode(POC_INCF, popGet(AOP(result),MSB16)); + emitpcode(POC_INCF, popGet(AOP(result),0)); + emitSKPNZ; + emitpcode(POC_INCF, popGet(AOP(result),MSB16)); + break; + case 0xff: /* 0x01ff */ + emitpcode(POC_DECF, popGet(AOP(result),0)); + emitpcode(POC_INCFSZW, popGet(AOP(result),0)); + emitpcode(POC_INCF, popGet(AOP(result),MSB16)); + emitpcode(POC_INCF, popGet(AOP(result),MSB16)); + } + break; + + case 0xff: + DEBUGpic14_emitcode ("; hi = ff","%s %d",__FUNCTION__,__LINE__); + /* lit = 0xffLL */ + switch(lo) { + case 0: /* 0xff00 */ + emitpcode(POC_DECF, popGet(AOP(result),MSB16)); + break; + case 1: /*0xff01 */ + emitpcode(POC_INCFSZ, popGet(AOP(result),0)); + emitpcode(POC_DECF, popGet(AOP(result),MSB16)); + break; + default: + emitpcode(POC_MOVLW,popGetLit(lo)); + emitpcode(POC_ADDWF,popGet(AOP(result),0)); + emitSKPC; + emitpcode(POC_DECF, popGet(AOP(result),MSB16)); + + } + + break; + + default: + DEBUGpic14_emitcode ("; hi is generic","%d %s %d",hi,__FUNCTION__,__LINE__); + + /* lit = 0xHHLL */ + switch(lo) { + case 0: /* 0xHH00 */ + genAddLit2byte (result, MSB16, hi); + break; + case 1: /* 0xHH01 */ + emitpcode(POC_MOVLW,popGetLit((hi+1)&0xff)); + emitpcode(POC_INCFSZ, popGet(AOP(result),0)); + emitpcode(POC_MOVLW,popGetLit(hi)); + emitpcode(POC_ADDWF,popGet(AOP(result),MSB16)); + break; + default: /* 0xHHLL */ + emitpcode(POC_MOVLW,popGetLit(lo)); + emitpcode(POC_ADDWF, popGet(AOP(result),0)); + emitpcode(POC_MOVLW,popGetLit(hi)); + emitSKPNC; + emitpcode(POC_MOVLW,popGetLit((hi+1) & 0xff)); + emitpcode(POC_ADDWF,popGet(AOP(result),MSB16)); + break; + } + + } + } else { + int carry_info = 0; + int offset = 0; + /* size > 2 */ + DEBUGpic14_emitcode ("; add lit to long","%s %d",__FUNCTION__,__LINE__); + + while(size--) { + lo = BYTEofLONG(lit,0); + + if(carry_info) { + switch(lo) { + case 0: + switch(carry_info) { + case 1: + emitSKPNZ; + emitpcode(POC_INCF, popGet(AOP(result),offset)); + break; + case 2: + emitpcode(POC_RLFW, popGet(AOP(result),offset)); + emitpcode(POC_ANDLW,popGetLit(1)); + emitpcode(POC_ADDWF, popGet(AOP(result),offset)); + break; + default: /* carry_info = 3 */ + emitSKPNC; + emitpcode(POC_INCF, popGet(AOP(result),offset)); + carry_info = 1; + break; + } + break; + case 0xff: + emitpcode(POC_MOVLW,popGetLit(lo)); + if(carry_info==1) + emitSKPZ; + else + emitSKPC; + emitpcode(POC_ADDWF, popGet(AOP(result),offset)); + break; + default: + emitpcode(POC_MOVLW,popGetLit(lo)); + if(carry_info==1) + emitSKPNZ; + else + emitSKPNC; + emitpcode(POC_MOVLW,popGetLit(lo+1)); + emitpcode(POC_ADDWF, popGet(AOP(result),offset)); + carry_info=2; + break; + } + }else { + /* no carry info from previous step */ + /* this means this is the first time to add */ + switch(lo) { + case 0: + break; + case 1: + emitpcode(POC_INCF, popGet(AOP(result),offset)); + carry_info=1; + break; + default: + emitpcode(POC_MOVLW,popGetLit(lo)); + emitpcode(POC_ADDWF, popGet(AOP(result),offset)); + if(lit <0x100) + carry_info = 3; /* Were adding only one byte and propogating the carry */ + else + carry_info = 2; + break; + } + } + offset++; + lit >>= 8; + } + } + } else { + int offset = 1; + DEBUGpic14_emitcode ("; left and result aren't same","%s %d",__FUNCTION__,__LINE__); + + if(size == 1) { + + /* left addend is in a register */ + switch(lit & 0xff) { + case 0: + emitpcode(POC_MOVFW, popGet(AOP(left),0)); + emitMOVWF(result, 0); + emitMOVWF(result,0); + break; + case 1: + emitpcode(POC_INCFW, popGet(AOP(left),0)); + emitMOVWF(result,0); + break; + case 0xff: + emitpcode(POC_DECFW, popGet(AOP(left),0)); + emitMOVWF(result,0); + break; + default: + emitpcode(POC_MOVLW, popGetLit(lit & 0xff)); + emitpcode(POC_ADDFW, popGet(AOP(left),0)); + emitMOVWF(result,0); + } + + } else { + int clear_carry=0; + + /* left is not the accumulator */ + if(lit & 0xff) { + emitpcode(POC_MOVLW, popGetLit(lit & 0xff)); + emitpcode(POC_ADDFW, popGet(AOP(left),0)); + } else { + emitpcode(POC_MOVFW, popGet(AOP(left),0)); + /* We don't know the state of the carry bit at this point */ + clear_carry = 1; + } + emitMOVWF(result,0); + while(--size) { + + lit >>= 8; + if(lit & 0xff) { + if(clear_carry) { + /* The ls byte of the lit must've been zero - that + means we don't have to deal with carry */ + + emitpcode(POC_MOVLW, popGetLit(lit & 0xff)); + emitpcode(POC_ADDFW, popGet(AOP(left),offset)); + emitpcode(POC_MOVWF, popGet(AOP(left),offset)); + + clear_carry = 0; + + } else { + emitpcode(POC_MOVLW, popGetLit(lit & 0xff)); + emitMOVWF(result,offset); + emitpcode(POC_MOVFW, popGet(AOP(left),offset)); + emitSKPNC; + emitpcode(POC_INCFSZW,popGet(AOP(left),offset)); + emitpcode(POC_ADDWF, popGet(AOP(result),offset)); + } + + } else { + emitpcode(POC_CLRF, popGet(AOP(result),offset)); + emitpcode(POC_RLF, popGet(AOP(result),offset)); + emitpcode(POC_MOVFW, popGet(AOP(left),offset)); + emitpcode(POC_ADDWF, popGet(AOP(result),offset)); + } + offset++; + } + } + } + + size = pic14_getDataSize(result); + if (size > pic14_getDataSize(left)) + size = pic14_getDataSize(left); + addSign(result, size, 0); +} + +/*-----------------------------------------------------------------*/ +/* genPlus - generates code for addition */ +/*-----------------------------------------------------------------*/ +void genPlus (iCode *ic) +{ + int size, offset = 0; + + /* special cases :- */ + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + FENTRY; + + aopOp (IC_LEFT(ic),ic,FALSE); + aopOp (IC_RIGHT(ic),ic,FALSE); + aopOp (IC_RESULT(ic),ic,TRUE); + + DEBUGpic14_AopType(__LINE__,IC_LEFT(ic),IC_RIGHT(ic),IC_RESULT(ic)); + + /* if literal, literal on the right or + if left requires ACC or right is already + in ACC */ + + if (AOP_TYPE(IC_LEFT(ic)) == AOP_LIT) { + operand *t = IC_RIGHT(ic); + IC_RIGHT(ic) = IC_LEFT(ic); + IC_LEFT(ic) = t; + } + + /* if left in bit space & right literal */ + if (AOP_TYPE(IC_LEFT(ic)) == AOP_CRY && + AOP_TYPE(IC_RIGHT(ic)) == AOP_LIT) { + /* if result in bit space */ + if(AOP_TYPE(IC_RESULT(ic)) == AOP_CRY){ + if(ulFromVal (AOP(IC_RIGHT(ic))->aopu.aop_lit) != 0L) { + emitpcode(POC_MOVLW, popGet(AOP(IC_RESULT(ic)),0)); + if (!pic14_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic))) ) + emitpcode(POC_BTFSC, popGet(AOP(IC_LEFT(ic)),0)); + emitpcode(POC_XORWF, popGet(AOP(IC_RESULT(ic)),0)); + } + } else { + size = pic14_getDataSize(IC_RESULT(ic)); + while (size--) { + MOVA(aopGet(AOP(IC_RIGHT(ic)),offset,FALSE,FALSE)); + pic14_emitcode("addc","a,#00 ;%d",__LINE__); + aopPut(AOP(IC_RESULT(ic)),"a",offset++); + } + } + goto release ; + } + + /* if I can do an increment instead + of add then GOOD for ME */ + if (genPlusIncr (ic) == TRUE) + goto release; + + size = pic14_getDataSize(IC_RESULT(ic)); + + if(AOP(IC_RIGHT(ic))->type == AOP_LIT) { + /* Add a literal to something else */ + unsigned lit = (unsigned) ulFromVal (AOP(IC_RIGHT(ic))->aopu.aop_lit); + DEBUGpic14_emitcode(";","adding lit to something. size %d",size); + + genAddLit (ic, lit); + goto release; + + } else if(AOP_TYPE(IC_RIGHT(ic)) == AOP_CRY) { + + pic14_emitcode(";bitadd","right is bit: %s",aopGet(AOP(IC_RIGHT(ic)),0,FALSE,FALSE)); + pic14_emitcode(";bitadd","left is bit: %s",aopGet(AOP(IC_LEFT(ic)),0,FALSE,FALSE)); + pic14_emitcode(";bitadd","result is bit: %s",aopGet(AOP(IC_RESULT(ic)),0,FALSE,FALSE)); + + /* here we are adding a bit to a char or int */ + if(size == 1) { + if (pic14_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic))) ) { + emitpcode(POC_BTFSC , popGet(AOP(IC_RIGHT(ic)),0)); + emitpcode(POC_INCF , popGet(AOP(IC_RESULT(ic)),0)); + } else { + + emitpcode(POC_MOVFW , popGet(AOP(IC_LEFT(ic)),0)); + emitpcode(POC_BTFSC , popGet(AOP(IC_RIGHT(ic)),0)); + emitpcode(POC_INCFW , popGet(AOP(IC_LEFT(ic)),0)); + + if(AOP_TYPE(IC_RESULT(ic)) == AOP_CRY) { + emitpcode(POC_ANDLW , popGetLit(1)); + emitpcode(POC_BCF , popGet(AOP(IC_RESULT(ic)),0)); + emitSKPZ; + emitpcode(POC_BSF , popGet(AOP(IC_RESULT(ic)),0)); + } else { + emitpcode(POC_MOVWF , popGet(AOP(IC_RESULT(ic)),0)); + } + } + + } else { + int offset = 1; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if (pic14_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic))) ) { + emitCLRZ; + emitpcode(POC_BTFSC, popGet(AOP(IC_RIGHT(ic)),0)); + emitpcode(POC_INCF, popGet(AOP(IC_RESULT(ic)),0)); + } else { + + emitpcode(POC_MOVFW, popGet(AOP(IC_LEFT(ic)),0)); + emitpcode(POC_BTFSC, popGet(AOP(IC_RIGHT(ic)),0)); + emitpcode(POC_INCFW, popGet(AOP(IC_LEFT(ic)),0)); + emitMOVWF(IC_RIGHT(ic),0); + } + + while(--size){ + emitSKPZ; + emitpcode(POC_INCF, popGet(AOP(IC_RESULT(ic)),offset++)); + } + + } + + } else { + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + /* Add the first bytes */ + + if(strcmp(aopGet(AOP(IC_LEFT(ic)),0,FALSE,FALSE),"a") == 0 ) { + emitpcode(POC_ADDFW, popGet(AOP(IC_RIGHT(ic)),0)); + emitpcode(POC_MOVWF,popGet(AOP(IC_RESULT(ic)),0)); + } else { + + emitpcode(POC_MOVFW,popGet(AOP(IC_RIGHT(ic)),0)); + + if (pic14_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic))) ) + emitpcode(POC_ADDWF, popGet(AOP(IC_LEFT(ic)),0)); + else { + PIC_OPCODE poc = POC_ADDFW; + + if (op_isLitLike (IC_LEFT (ic))) + poc = POC_ADDLW; + emitpcode(poc, popGetAddr(AOP(IC_LEFT(ic)),0,0)); + emitpcode(POC_MOVWF,popGet(AOP(IC_RESULT(ic)),0)); + } + } + + size = min( AOP_SIZE(IC_RESULT(ic)), AOP_SIZE(IC_RIGHT(ic))) - 1; + offset = 1; + + + if(size){ + if (pic14_sameRegs(AOP(IC_RIGHT(ic)), AOP(IC_RESULT(ic)))) { + if (op_isLitLike (IC_LEFT(ic))) + { + while(size--){ + emitpcode(POC_MOVFW, popGet(AOP(IC_RIGHT(ic)),offset)); + emitSKPNC; + emitpcode(POC_INCFSZW, popGet(AOP(IC_RIGHT(ic)),offset)); + emitpcode(POC_ADDLW, popGetAddr(AOP(IC_LEFT(ic)),offset,0)); + emitpcode(POC_MOVWF, popGet(AOP(IC_RESULT(ic)),offset)); + offset++; + } + } else { + while(size--){ + emitpcode(POC_MOVFW, popGet(AOP(IC_LEFT(ic)),offset)); + emitSKPNC; + emitpcode(POC_INCFSZW, popGet(AOP(IC_LEFT(ic)),offset)); + emitpcode(POC_ADDWF, popGet(AOP(IC_RESULT(ic)),offset)); + offset++; + } + } + } else { + PIC_OPCODE poc = POC_MOVFW; + if (op_isLitLike (IC_LEFT(ic))) + poc = POC_MOVLW; + while(size--){ + if (!pic14_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic))) ) { + emitpcode(poc, popGetAddr(AOP(IC_LEFT(ic)),offset,0)); + emitpcode(POC_MOVWF, popGet(AOP(IC_RESULT(ic)),offset)); + } + emitpcode(POC_MOVFW, popGet(AOP(IC_RIGHT(ic)),offset)); + emitSKPNC; + emitpcode(POC_INCFSZW, popGet(AOP(IC_RIGHT(ic)),offset)); + emitpcode(POC_ADDWF, popGet(AOP(IC_RESULT(ic)),offset)); + offset++; + } + } + } + } + + if (AOP_SIZE(IC_RESULT(ic)) > AOP_SIZE(IC_RIGHT(ic))) { + int sign = !(SPEC_USIGN(getSpec(operandType(IC_LEFT(ic)))) | + SPEC_USIGN(getSpec(operandType(IC_RIGHT(ic)))) ); + + + /* Need to extend result to higher bytes */ + size = AOP_SIZE(IC_RESULT(ic)) - AOP_SIZE(IC_RIGHT(ic)) - 1; + + /* First grab the carry from the lower bytes */ + if (AOP_SIZE(IC_LEFT(ic)) > AOP_SIZE(IC_RIGHT(ic))) { + int leftsize = AOP_SIZE(IC_LEFT(ic)) - AOP_SIZE(IC_RIGHT(ic)); + PIC_OPCODE poc = POC_MOVFW; + if (op_isLitLike (IC_LEFT(ic))) + poc = POC_MOVLW; + while(leftsize-- > 0) { + emitpcode(poc, popGetAddr(AOP(IC_LEFT(ic)),offset,0)); + emitSKPNC; + emitpcode(POC_ADDLW, popGetLit(0x01)); + emitpcode(POC_MOVWF, popGet(AOP(IC_RESULT(ic)),offset)); + //emitSKPNC; + //emitpcode(POC_INCF, popGet(AOP(IC_RESULT(ic)),offset)); /* INCF does not update Carry! */ + offset++; + if (size) + size--; + else + break; + } + } else { + emitpcode(POC_CLRF, popGet(AOP(IC_RESULT(ic)),offset)); + emitpcode(POC_RLF, popGet(AOP(IC_RESULT(ic)),offset)); + } + + + if(sign && offset > 0 && offset < AOP_SIZE(IC_RESULT(ic))) { + /* Now this is really horrid. Gotta check the sign of the addends and propogate + * to the result */ + + emitpcode(POC_BTFSC, newpCodeOpBit(aopGet(AOP(IC_LEFT(ic)),offset-1,FALSE,FALSE),7,0)); + emitpcode(POC_DECF, popGet(AOP(IC_RESULT(ic)),offset)); + emitpcode(POC_BTFSC, newpCodeOpBit(aopGet(AOP(IC_RIGHT(ic)),offset-1,FALSE,FALSE),7,0)); + emitpcode(POC_DECF, popGet(AOP(IC_RESULT(ic)),offset)); + + /* if chars or ints or being signed extended to longs: */ + if(size) { + emitpcode(POC_MOVLW, popGetLit(0)); + emitpcode(POC_BTFSC, newpCodeOpBit(aopGet(AOP(IC_RESULT(ic)),offset,FALSE,FALSE),7,0)); + emitpcode(POC_MOVLW, popGetLit(0xff)); + } + } + + offset++; + while(size--) { + + if(sign) + emitpcode(POC_MOVWF, popGet(AOP(IC_RESULT(ic)),offset)); + else + emitpcode(POC_CLRF, popGet(AOP(IC_RESULT(ic)),offset)); + + offset++; + } + } + + + //adjustArithmeticResult(ic); + +release: + freeAsmop(IC_LEFT(ic),NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(IC_RIGHT(ic),NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(IC_RESULT(ic),NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* addSign - propogate sign bit to higher bytes */ +/*-----------------------------------------------------------------*/ +void addSign(operand *result, int offset, int sign) +{ + int size = (pic14_getDataSize(result) - offset); + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + FENTRY; + + if(size > 0){ + if(sign && offset) { + + if(size == 1) { + emitpcode(POC_CLRF,popGet(AOP(result),offset)); + emitpcode(POC_BTFSC,newpCodeOpBit(aopGet(AOP(result),offset-1,FALSE,FALSE),7,0)); + emitpcode(POC_DECF, popGet(AOP(result),offset)); + } else { + + emitpcode(POC_MOVLW, popGetLit(0)); + emitpcode(POC_BTFSC, newpCodeOpBit(aopGet(AOP(result),offset-1,FALSE,FALSE),7,0)); + emitpcode(POC_MOVLW, popGetLit(0xff)); + while(size--) + emitpcode(POC_MOVWF, popGet(AOP(result),offset+size)); + } + } else + while(size--) + emitpcode(POC_CLRF,popGet(AOP(result),offset++)); + } +} + +/*-----------------------------------------------------------------*/ +/* genMinus - generates code for subtraction */ +/*-----------------------------------------------------------------*/ +void genMinus (iCode *ic) +{ + int size, offset = 0, same=0; + unsigned long lit = 0L; + int isLit; + symbol *lbl_comm, *lbl_next; + asmop *left, *right, *result; + + FENTRY; + DEBUGpic14_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + aopOp (IC_LEFT(ic),ic,FALSE); + aopOp (IC_RIGHT(ic),ic,FALSE); + aopOp (IC_RESULT(ic),ic,TRUE); + + if (AOP_TYPE(IC_RESULT(ic)) == AOP_CRY && + AOP_TYPE(IC_RIGHT(ic)) == AOP_LIT) { + operand *t = IC_RIGHT(ic); + IC_RIGHT(ic) = IC_LEFT(ic); + IC_LEFT(ic) = t; + } + + DEBUGpic14_emitcode ("; ","result %s, left %s, right %s", + AopType(AOP_TYPE(IC_RESULT(ic))), + AopType(AOP_TYPE(IC_LEFT(ic))), + AopType(AOP_TYPE(IC_RIGHT(ic)))); + + left = AOP(IC_LEFT(ic)); + right = AOP(IC_RIGHT(ic)); + result = AOP(IC_RESULT(ic)); + + size = pic14_getDataSize(IC_RESULT(ic)); + same = pic14_sameRegs(right, result); + + if((AOP_TYPE(IC_LEFT(ic)) != AOP_LIT) + && (pic14_getDataSize(IC_LEFT(ic)) < size)) + { + fprintf(stderr, "%s:%d(%s):WARNING: left operand too short for result\n", + ic->filename, ic->lineno, __FUNCTION__); + } // if + if((AOP_TYPE(IC_RIGHT(ic)) != AOP_LIT) + && (pic14_getDataSize(IC_RIGHT(ic)) < size)) + { + fprintf(stderr, "%s:%d(%s):WARNING: right operand too short for result\n", + ic->filename, ic->lineno, __FUNCTION__ ); + } // if + + if(AOP_TYPE(IC_RIGHT(ic)) == AOP_LIT) { + /* Add a literal to something else */ + + lit = ulFromVal(right->aopu.aop_lit); + lit = -(long)lit; + + genAddLit(ic, lit); + + } else if(AOP_TYPE(IC_RIGHT(ic)) == AOP_CRY) { + // bit subtraction + + pic14_emitcode(";bitsub","right is bit: %s",aopGet(right,0,FALSE,FALSE)); + pic14_emitcode(";bitsub","left is bit: %s",aopGet(left,0,FALSE,FALSE)); + pic14_emitcode(";bitsub","result is bit: %s",aopGet(result,0,FALSE,FALSE)); + + /* here we are subtracting a bit from a char or int */ + if(size == 1) { + if(pic14_sameRegs(left, result)) { + + emitpcode(POC_BTFSC, popGet(right, 0)); + emitpcode(POC_DECF , popGet(result, 0)); + + } else { + + if( (AOP_TYPE(IC_LEFT(ic)) == AOP_IMMD) || + (AOP_TYPE(IC_LEFT(ic)) == AOP_LIT) ) { + /* + * result = literal - bit + * + * XXX: probably fails for AOP_IMMDs! + */ + + lit = ulFromVal (left->aopu.aop_lit); + + if(AOP_TYPE(IC_RESULT(ic)) == AOP_CRY) { + if(pic14_sameRegs(right, result)) { + if(lit & 1) { + emitpcode(POC_MOVLW, popGet(right, 0)); + emitpcode(POC_XORWF, popGet(result, 0)); + } + } else { + emitpcode(POC_BCF, popGet(result, 0)); + if(lit & 1) + emitpcode(POC_BTFSS, popGet(right, 0)); + else + emitpcode(POC_BTFSC, popGet(right, 0)); + emitpcode(POC_BSF, popGet(result, 0)); + } + goto release; + } else { + emitpcode(POC_MOVLW, popGetLit(lit & 0xff)); + emitpcode(POC_BTFSC, popGet(right, 0)); + emitpcode(POC_MOVLW, popGetLit((lit-1) & 0xff)); + emitpcode(POC_MOVWF, popGet(result, 0)); + } + + } else { + // result = register - bit + // XXX: Fails for lit-like left operands + emitpcode(POC_MOVFW, popGet(left, 0)); + emitpcode(POC_BTFSC, popGet(right, 0)); + emitpcode(POC_DECFW, popGet(left, 0)); + emitpcode(POC_MOVWF, popGet(result, 0)); + } + } + } else { + fprintf(stderr, "WARNING: subtracting bit from multi-byte operands is incomplete.\n"); + //exit(EXIT_FAILURE); + } // if + } else { + /* + * RIGHT is not a literal and not a bit operand, + * LEFT is unknown (register, literal, bit, ...) + */ + lit = 0; + isLit = 0; + + if(AOP_TYPE(IC_LEFT(ic)) == AOP_LIT) { + lit = ulFromVal (left->aopu.aop_lit); + isLit = 1; + DEBUGpic14_emitcode ("; left is lit","line %d result %s, left %s, right %s",__LINE__, + AopType(AOP_TYPE(IC_RESULT(ic))), + AopType(AOP_TYPE(IC_LEFT(ic))), + AopType(AOP_TYPE(IC_RIGHT(ic)))); + } // if + + + /* + * First byte, no carry-in. + * Any optimizations that are longer than 2 instructions are + * useless. + */ + if(same && isLit && ((lit & 0xff) == 0xff)) { + // right === res = 0xFF - right = ~right + emitpcode(POC_COMF, popGet(right, 0)); + if(size > 1) { + // setup CARRY/#BORROW + emitSETC; + } // if + } else if((size == 1) && isLit && ((lit & 0xff) == 0xff)) { + // res = 0xFF - right = ~right + emitpcode(POC_COMFW, popGet(right, 0)); + emitpcode(POC_MOVWF, popGet(result, 0)); + // CARRY/#BORROW is not setup correctly + } else if((size == 1) && same && isLit && ((lit & 0xff) == 0)) { + // right === res = 0 - right = ~right + 1 + emitpcode(POC_COMF, popGet(right, 0)); + emitpcode(POC_INCF, popGet(right, 0)); + // CARRY/#BORROW is not setup correctly + } else { + // general case, should always work + mov2w(right, 0); + if (pic14_sameRegs(left, result)) { + // result === left = left - right (in place) + emitpcode(POC_SUBWF, popGet(result, 0)); + } else { + // works always: result = left - right + emitpcode(op_isLitLike(IC_LEFT(ic)) + ? POC_SUBLW : POC_SUBFW, + popGetAddr(left, 0, 0)); + emitpcode(POC_MOVWF, popGet(result, 0)); + } // if + } // if + + /* + * Now for the remaining bytes with carry-in (and carry-out). + */ + offset = 0; + while(--size) { + lit >>= 8; + offset++; + + /* + * The following code generation templates are ordered + * according to increasing length; the first template + * that matches will thus be the shortest and produce + * the best code possible with thees templates. + */ + + if(pic14_sameRegs(left, right)) { + /* + * This case should not occur; however, the + * template works if LEFT, RIGHT, and RESULT are + * register operands and LEFT and RIGHT are the + * same register(s) and at least as long as the + * result. + * + * CLRF result + * + * 1 cycle + */ + emitpcode(POC_CLRF, popGet(result, offset)); + } else if(pic14_sameRegs(left, result)) { + /* + * This template works if LEFT, RIGHT, and + * RESULT are register operands and LEFT and + * RESULT are the same register(s). + * + * MOVF right, W ; W := right + * BTFSS STATUS, C + * INCFSZ right, W ; W := right + BORROW + * SUBWF result, F ; res === left := left - (right + BORROW) + * + * The SUBWF *must* be skipped if we have a + * BORROW bit and right == 0xFF in order to + * keep the BORROW bit intact! + * + * 4 cycles + */ + mov2w(right, offset); + emitSKPC; + emitpcode(POC_INCFSZW, popGet(right, offset)); + emitpcode(POC_SUBWF, popGet(result, offset)); + } else if((size == 1) && isLit && ((lit & 0xff) == 0xff)) { + /* + * This template works for the last byte (MSB) of + * the subtraction and ignores correct propagation + * of the outgoing BORROW bit. RIGHT and RESULT + * must be register operands, LEFT must be the + * literal 0xFF. + * + * (The case LEFT === RESULT is optimized above.) + * + * 0xFF - right - BORROW = ~right - BORROW + * + * COMF right, W ; W := 0xff - right + * BTFSS STATUS, C + * ADDLW 0xFF ; W := 0xff - right - BORROW + * MOVWF result + * + * 4 cycles + */ + emitpcode(POC_COMFW, popGet(right, offset)); + emitSKPC; + emitpcode(POC_ADDLW, popGetLit(0xff)); + emitpcode(POC_MOVWF, popGet(result, offset)); + } else if(size == 1) { + /* + * This template works for the last byte (MSB) of + * the subtraction and ignores correct propagation + * of the outgoing BORROW bit. RIGHT and RESULT + * must be register operands, LEFT can be a + * register or a literal operand. + * + * (The case LEFT === RESULT is optimized above.) + * + * MOVF right, W ; W := right + * BTFSS STATUS, C + * INCF right, W ; W := right + BORROW + * SUBxW left, W ; W := left - right - BORROW + * MOVWF result + * + * 5 cycles + */ + mov2w(right, offset); + emitSKPC; + emitpcode(POC_INCFW, popGet(right, offset)); + emitpcode(op_isLitLike(IC_LEFT(ic)) + ? POC_SUBLW : POC_SUBFW, + popGetAddr(left, offset, 0)); + emitpcode(POC_MOVWF, popGet(result, offset)); + } else if(IS_ITEMP(IC_RESULT(ic)) + && !pic14_sameRegs(right, result)) { + /* + * This code template works if RIGHT and RESULT + * are different register operands and RESULT + * is not volatile/an SFR (written twice). + * + * ######################################### + * Since we cannot determine that for sure, + * we approximate via IS_ITEMP() for now. + * ######################################### + * + * MOVxW left, W ; copy left to result + * MOVWF result + * MOVF right, W ; W := right + * BTFSS STATUS, C + * INCFSZ right, W ; W := right + BORROW + * SUBWF result, F ; res === left := left - (right + BORROW) + * + * 6 cycles, but fails for SFR RESULT operands + */ + mov2w(left, offset); + emitpcode(POC_MOVWF, popGet(result, offset)); + mov2w(right, offset); + emitSKPC; + emitpcode(POC_INCFSZW, popGet(right, offset)); + emitpcode(POC_SUBWF, popGet(result, offset)); + } else if(!optimize.codeSize && isLit && ((lit & 0xff) != 0)) { + /* + * This template works if RIGHT and RESULT are + * register operands and LEFT is a literal + * operand != 0. + * + * MOVxW right, W + * BTFSC STATUS, C + * GOTO next + * SUBLW left-1 + * GOTO common + * next: + * SUBLW left + * common: + * MOVWF result + * + * 6 cycles, 7 iff BORROW + * (9 instructions) + */ + lbl_comm = newiTempLabel(NULL); + lbl_next = newiTempLabel(NULL); + + mov2w(right, offset); + emitSKPNC; + emitpcode(POC_GOTO, popGetLabel(lbl_next->key)); + emitpcode(POC_SUBLW, popGetLit((lit - 1) & 0xff)); + emitpcode(POC_GOTO, popGetLabel(lbl_comm->key)); + emitpLabel(lbl_next->key); + emitpcode(POC_SUBLW, popGetLit(lit & 0xff)); + emitpLabel(lbl_comm->key); + emitpcode(POC_MOVWF, popGet(result, offset)); + } else { + /* + * This code template works if RIGHT and RESULT + * are register operands. + * + * MOVF right, W ; W := right + * BTFSS STATUS, C + * INCFSZ right, W ; W := right + BORROW + * GOTO common + * MOVxW left ; if we subtract 0x100 = 0xFF + 1, ... + * GOTO next ; res := left, but keep BORROW intact + * common: + * SUBxW left, W ; W := left - (right + BORROW) + * next: + * MOVW result ; res := left - (right + BORROW) + * + * 7 cycles, 8 iff BORROW and (right == 0xFF) + * (8 instructions) + * + * + * + * Alternative approach using -x = ~x + 1 ==> ~x = -x - 1 = -(x + 1) + * + * COMFW right, W ; W := -right - (assumed BORROW) + * BTFSC STATUS, C ; SKIP if we have a BORROW + * ADDLW 1 ; W := -right (no BORROW) + * BTFSC STATUS, C ; (***) + * MOVLW left ; (***) + * BTFSS STATUS, C ; (***) + * ADDFW left, W ; W := left - right - BORROW (if any) + * MOVWF result ; result := left - right - BORROW (if any) + * + * 8 cycles + * + * Case A: C=0 (BORROW) + * r=0x00, W=0xFF, W=left+0xFF, C iff left>0x00 + * r=0x01, W=0xFE, W=left+0xFE, C iff left>0x01 + * r=0xFE, W=0x01, W=left+0x01, C iff left>0xFE + * r=0xFF, W=0x00, W=left+0x00, C iff left>0xFF + * + * Case B: C=1 (no BORROW) + * r=0x00, W=0xFF, W=0x00/C=1, W=left+0x00, C iff left>=0x100 (***) + * r=0x01, W=0xFE, W=0xFF/C=0, W=left+0xFF, C iff left>=0x01 + * r=0xFE, W=0x01, W=0x02/C=0, W=left+0x02, C iff left>=0xFE + * r=0xFF, W=0x00, W=0x01/C=0, W=left+0x01, C iff left>=0xFF + */ + lbl_comm = newiTempLabel(NULL); + lbl_next = newiTempLabel(NULL); + + mov2w(right, offset); + emitSKPC; + emitpcode(POC_INCFSZW, popGet(right, offset)); + emitpcode(POC_GOTO, popGetLabel(lbl_comm->key)); + mov2w(left, offset); + emitpcode(POC_GOTO, popGetLabel(lbl_next->key)); + emitpLabel(lbl_comm->key); + emitpcode(op_isLitLike(IC_LEFT(ic)) + ? POC_SUBLW : POC_SUBFW, + popGetAddr(left, offset, 0)); + emitpLabel(lbl_next->key); + emitpcode(POC_MOVWF, popGet(result, offset)); + } // if + } // while + } // if + + if(AOP_TYPE(IC_RESULT(ic)) == AOP_CRY) { + fprintf(stderr, "WARNING: AOP_CRY (bit-) results are probably broken. Please report this with source code as a bug.\n"); + mov2w(result, 0); // load Z flag + emitpcode(POC_BCF, popGet(result, 0)); + emitSKPZ; + emitpcode(POC_BSF, popGet(result, 0)); + } // if + + // adjustArithmeticResult(ic); + +release: + freeAsmop(IC_LEFT(ic),NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(IC_RIGHT(ic),NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + freeAsmop(IC_RESULT(ic),NULL,ic,TRUE); +} + diff --git a/src/pic/glue.c b/src/pic/glue.c new file mode 100644 index 0000000..41afbc4 --- /dev/null +++ b/src/pic/glue.c @@ -0,0 +1,1175 @@ +/*------------------------------------------------------------------------- + + glue.c - glues everything we have done together into one file. + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "glue.h" +#include "dbuf_string.h" + +#include "device.h" +#include "gen.h" +#include "main.h" + +/* + * Imports + */ +extern set *publics; +extern set *externs; +extern symbol *mainf; +extern struct dbuf_s *codeOutBuf; + +extern void initialComments (FILE *afile); +extern operand *operandFromAst (ast *tree, int lvl); +extern value *initPointer (initList *ilist, sym_link *toType); + + +set *pic14_localFunctions = NULL; +int pic14_hasInterrupt = 0; // Indicates whether to emit interrupt handler or not + +int pic14_stringInSet(const char *str, set **world, int autoAdd); + + +#ifdef WORDS_BIGENDIAN +#define _ENDIAN(x) (3-x) +#else +#define _ENDIAN(x) (x) +#endif + +#define BYTE_IN_LONG(x,b) ((x>>(8*_ENDIAN(b)))&0xff) +#define IS_GLOBAL(sym) ((sym)->level == 0) +#define IS_DEFINED_HERE(sym) (!IS_EXTERN(sym->etype)) + +/* dbufs for initialized data (idata and code sections), + * extern, and global declarations */ +static struct dbuf_s *ivalBuf, *extBuf, *gloBuf, *gloDefBuf; + +static set *emitted = NULL; + +static void showAllMemmaps (FILE *of); // XXX: emits initialized symbols + +static void +emitPseudoStack(struct dbuf_s *oBuf, struct dbuf_s *oBufExt) +{ + int shared, low, high, size, i; + PIC_device *pic; + + /* also emit STK symbols + * XXX: This is ugly and fails as soon as devices start to get + * differently sized sharebanks, since STK12 will be + * required by larger devices but only up to STK03 might + * be defined using smaller devices. */ + shared = pic14_getSharedStack(&low, &high, &size); + if (!pic14_options.isLibrarySource) + { + pic = pic14_getPIC(); + + dbuf_printf (oBuf, "\n"); + dbuf_printf (oBuf, "\tglobal PSAVE\n"); + dbuf_printf (oBuf, "\tglobal SSAVE\n"); + dbuf_printf (oBuf, "\tglobal WSAVE\n"); + for (i = size - 4; i >= 0; i--) { + dbuf_printf (oBuf, "\tglobal STK%02d\n", i); + } // for i + dbuf_printf (oBuf, "\n"); + + // 16f84 has no SHAREBANK (in linkerscript) but memory aliased in two + // banks, sigh... + if (1 || !shared) { + // for single banked devices: use normal, "banked" RAM + dbuf_printf (oBuf, "sharebank udata_ovr 0x%04X\n", low); + } else { + // for devices with at least two banks, require a sharebank section + dbuf_printf (oBuf, "sharebank udata_shr\n"); + } + dbuf_printf (oBuf, "PSAVE\tres 1\n"); + dbuf_printf (oBuf, "SSAVE\tres 1\n"); + dbuf_printf (oBuf, "WSAVE\tres 1\n"); // WSAVE *must* be in sharebank (IRQ handlers) + /* fill rest of sharebank with stack STKxx .. STK00 */ + for (i = size - 4; i >= 0; i--) { + dbuf_printf (oBuf, "STK%02d\tres 1\n", i); + } // for i + } else { + /* declare STKxx as extern for all files + * except the one containing main() */ + dbuf_printf (oBufExt, "\n"); + dbuf_printf (oBufExt, "\textern PSAVE\n"); + dbuf_printf (oBufExt, "\textern SSAVE\n"); + dbuf_printf (oBufExt, "\textern WSAVE\n"); + for (i = size - 4; i >= 0; i--) { + char buffer[128]; + SNPRINTF(&buffer[0], 127, "STK%02d", i); + dbuf_printf (oBufExt, "\textern %s\n", &buffer[0]); + pic14_stringInSet(&buffer[0], &emitted, 1); + } // for i + } + dbuf_printf (oBuf, "\n"); +} + +static int +emitIfNew(struct dbuf_s *oBuf, set **emitted, const char *fmt, + const char *name) +{ + int wasPresent = pic14_stringInSet(name, emitted, 1); + + if (!wasPresent) { + dbuf_printf (oBuf, fmt, name); + } // if + return (!wasPresent); +} + +static void +pic14_constructAbsMap (struct dbuf_s *oBuf, struct dbuf_s *gloBuf) +{ + memmap *maps[] = { data, sfr, NULL }; + int i; + hTab *ht = NULL; + symbol *sym; + set *aliases; + int addr, min=-1, max=-1; + int size; + + for (i=0; maps[i] != NULL; i++) + { + for (sym = (symbol *)setFirstItem (maps[i]->syms); + sym; sym = setNextItem (maps[i]->syms)) + { + if (IS_DEFINED_HERE(sym) && SPEC_ABSA(sym->etype)) + { + addr = SPEC_ADDR(sym->etype); + + /* handle CONFIG words here */ + if (IS_CONFIG_ADDRESS( addr )) + { + //fprintf( stderr, "%s: assignment to CONFIG@0x%x found\n", __FUNCTION__, addr ); + //fprintf( stderr, "ival: %p (0x%x)\n", sym->ival, (int)list2int( sym->ival ) ); + if (sym->ival) { + pic14_assignConfigWordValue( addr, (int)list2int( sym->ival ) ); + } else { + fprintf( stderr, "ERROR: Symbol %s, which is covering a __CONFIG word must be initialized!\n", sym->name ); + } + continue; + } + + if (max == -1 || addr > max) max = addr; + if (min == -1 || addr < min) min = addr; + //fprintf (stderr, "%s: sym %s @ 0x%x\n", __FUNCTION__, sym->name, addr); + aliases = hTabItemWithKey (ht, addr); + if (aliases) { + /* May not use addSetHead, as we cannot update the + * list's head in the hastable `ht'. */ + addSet (&aliases, sym); +#if 0 + fprintf( stderr, "%s: now %d aliases for %s @ 0x%x\n", + __FUNCTION__, elementsInSet(aliases), sym->name, addr); +#endif + } else { + addSet (&aliases, sym); + hTabAddItem (&ht, addr, aliases); + } // if + } // if + } // for sym + } // for i + + /* now emit definitions for all absolute symbols */ + dbuf_printf (oBuf, "%s", iComments2); + dbuf_printf (oBuf, "; absolute symbol definitions\n"); + dbuf_printf (oBuf, "%s", iComments2); + for (addr=min; addr <= max; addr++) + { + size = 1; + aliases = hTabItemWithKey (ht, addr); + if (aliases && elementsInSet(aliases)) { + /* Make sure there is no initialized value at this location! */ + for (sym = setFirstItem(aliases); sym; sym = setNextItem(aliases)) { + if (sym->ival) break; + } // for + if (sym) continue; + + dbuf_printf (oBuf, "UD_abs_%s_%x\tudata_ovr\t0x%04x\n", + moduleName, addr, addr); + for (sym = setFirstItem (aliases); sym; + sym = setNextItem (aliases)) + { + if (getSize(sym->type) > size) { + size = getSize(sym->type); + } + + /* initialized values are handled somewhere else */ + if (sym->ival) continue; + + /* emit STATUS as well as _STATUS, required for SFRs only */ + //dbuf_printf (oBuf, "%s\tres\t0\n", sym->name); + dbuf_printf (oBuf, "%s\n", sym->rname); + + if (IS_GLOBAL(sym) && !IS_STATIC(sym->etype)) { + //emitIfNew(gloBuf, &emitted, "\tglobal\t%s\n", sym->name); + emitIfNew(gloBuf, &emitted, "\tglobal\t%s\n", sym->rname); + } // if + } // for + dbuf_printf (oBuf, "\tres\t%d\n", size); + } // if + } // for i +} + +/*-----------------------------------------------------------------*/ +/* createInterruptVect - creates the interrupt vector */ +/*-----------------------------------------------------------------*/ +static void +pic14createInterruptVect (struct dbuf_s * vBuf) +{ + mainf = newSymbol ("main", 0); + mainf->block = 0; + + /* only if the main function exists */ + if (!(mainf = findSymWithLevel (SymbolTab, mainf))) + { + struct options *op = &options; + if (!(op->cc_only || noAssemble)) + // werror (E_NO_MAIN); + fprintf(stderr,"WARNING: function 'main' undefined\n"); + return; + } + + /* if the main is only a prototype ie. no body then do nothing */ + if (!IFFUNC_HASBODY(mainf->type)) + { + /* if ! compile only then main function should be present */ + if (!(options.cc_only || noAssemble)) + // werror (E_NO_MAIN); + fprintf(stderr,"WARNING: function 'main' undefined\n"); + return; + } + + dbuf_printf (vBuf, "%s", iComments2); + dbuf_printf (vBuf, "; reset vector \n"); + dbuf_printf (vBuf, "%s", iComments2); + // Lkr file should place section STARTUP at address 0x0, but does not ... + dbuf_printf (vBuf, "STARTUP\t%s 0x0000\n", CODE_NAME); + dbuf_printf (vBuf, "\tnop\n"); /* first location for used by incircuit debugger */ + dbuf_printf (vBuf, "\tpagesel __sdcc_gsinit_startup\n"); + dbuf_printf (vBuf, "\tgoto\t__sdcc_gsinit_startup\n"); + popGetExternal("__sdcc_gsinit_startup", 0); +} + + +/*-----------------------------------------------------------------*/ +/* initialComments - puts in some initial comments */ +/*-----------------------------------------------------------------*/ +static void +pic14initialComments (FILE * afile) +{ + initialComments (afile); + fprintf (afile, "; PIC port for the 14-bit core\n"); + fprintf (afile, "%s", iComments2); + +} + +int +pic14_stringInSet(const char *str, set **world, int autoAdd) +{ + char *s; + + if (!str) return 1; + assert(world); + + for (s = setFirstItem(*world); s; s = setNextItem(*world)) + { + /* found in set */ + if (0 == strcmp(s, str)) return 1; + } + + /* not found */ + if (autoAdd) addSet(world, Safe_strdup(str)); + return 0; +} + +static void +pic14printLocals (struct dbuf_s *oBuf) +{ + set *allregs[6] = { dynAllocRegs/*, dynStackRegs, dynProcessorRegs*/, + dynDirectRegs, dynDirectBitRegs/*, dynInternalRegs */ }; + regs *reg; + int i, is_first = 1; + static unsigned sectionNr = 0; + + /* emit all registers from all possible sets */ + for (i = 0; i < 6; i++) { + if (allregs[i] == NULL) continue; + + for (reg = setFirstItem(allregs[i]); reg; reg = setNextItem(allregs[i])) { + if (reg->isEmitted) continue; + + if (reg->wasUsed && !reg->isExtern) { + if (!pic14_stringInSet(reg->name, &emitted, 1)) { + if (reg->isFixed) { + // Should not happen, really... + assert ( !"Compiler-assigned variables should not be pinned... This is a bug." ); + dbuf_printf(oBuf, "UDL_%s_%u\tudata\t0x%04X\n%s\tres\t%d\n", + moduleName, sectionNr++, reg->address, reg->name, reg->size); + } else { + if (getenv("SDCC_PIC14_SPLIT_LOCALS")) { + // assign each local register into its own section + dbuf_printf(oBuf, "UDL_%s_%u\tudata\n%s\tres\t%d\n", + moduleName, sectionNr++, reg->name, reg->size); + } else { + // group all local registers into a single section + // This should greatly improve BANKSEL generation... + if (is_first) { + dbuf_printf(oBuf, "UDL_%s_%u\tudata\n", moduleName, sectionNr++); + is_first = 0; + } + dbuf_printf(oBuf, "%s\tres\t%d\n", reg->name, reg->size); + } + } + } + } + reg->isEmitted = 1; + } // for + } // for +} + +/*-----------------------------------------------------------------*/ +/* emitOverlay - will emit code for the overlay stuff */ +/*-----------------------------------------------------------------*/ +static void +pic14emitOverlay (struct dbuf_s * aBuf) +{ + set *ovrset; + + /* if (!elementsInSet (ovrSetSets))*/ + + /* the hack below, fixes translates for devices which + * only have udata_shr memory */ + dbuf_printf (aBuf, "%s\t%s\n", + (elementsInSet(ovrSetSets)?"":";"), + port->mem.overlay_name); + + /* for each of the sets in the overlay segment do */ + for (ovrset = setFirstItem (ovrSetSets); ovrset; + ovrset = setNextItem (ovrSetSets)) + { + + symbol *sym; + + if (elementsInSet (ovrset)) + { + /* this dummy area is used to fool the assembler + otherwise the assembler will append each of these + declarations into one chunk and will not overlay + sad but true */ + + /* I don't think this applies to us. We are using gpasm. CRF */ + + dbuf_printf (aBuf, ";\t.area _DUMMY\n"); + /* output the area informtion */ + dbuf_printf (aBuf, ";\t.area\t%s\n", port->mem.overlay_name); /* MOF */ + } + + for (sym = setFirstItem (ovrset); sym; + sym = setNextItem (ovrset)) + { + + /* if extern then do nothing */ + if (IS_EXTERN (sym->etype)) + continue; + + /* if allocation required check is needed + then check if the symbol really requires + allocation only for local variables */ + if (!IS_AGGREGATE (sym->type) && + !(sym->_isparm && !IS_REGPARM (sym->etype)) + && !sym->allocreq && sym->level) + continue; + + /* if global variable & not static or extern + and addPublics allowed then add it to the public set */ + if ((sym->_isparm && !IS_REGPARM (sym->etype)) + && !IS_STATIC (sym->etype)) + addSetHead (&publics, sym); + + /* if extern then do nothing or is a function + then do nothing */ + if (IS_FUNC (sym->type)) + continue; + + /* print extra debug info if required */ + if (options.debug || sym->level == 0) + { + if (!sym->level) + { /* global */ + if (IS_STATIC (sym->etype)) + dbuf_printf (aBuf, "F%s_", moduleName); /* scope is file */ + else + dbuf_printf (aBuf, "G_"); /* scope is global */ + } + else + /* symbol is local */ + dbuf_printf (aBuf, "L%s_", + (sym->localof ? sym->localof->name : "-null-")); + dbuf_printf (aBuf, "%s_%d_%d", sym->name, sym->level, sym->block); + } + + /* if is has an absolute address then generate + an equate for this no need to allocate space */ + if (SPEC_ABSA (sym->etype)) + { + + if (options.debug || sym->level == 0) + dbuf_printf (aBuf, " == 0x%04x\n", SPEC_ADDR (sym->etype)); + + dbuf_printf (aBuf, "%s\t=\t0x%04x\n", + sym->rname, + SPEC_ADDR (sym->etype)); + } + else + { + if (options.debug || sym->level == 0) + dbuf_printf (aBuf, "==.\n"); + + /* allocate space */ + dbuf_printf (aBuf, "%s:\n", sym->rname); + dbuf_printf (aBuf, "\t.ds\t0x%04x\n", (unsigned int) getSize (sym->type) & 0xffff); + } + + } + } +} + + +static void +pic14_emitInterruptHandler (FILE * asmFile) +{ + if (pic14_hasInterrupt) + { + + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; interrupt and initialization code\n"); + fprintf (asmFile, "%s", iComments2); + // Note - for mplink may have to enlarge section vectors in .lnk file + // Note: Do NOT name this code_interrupt to avoid nameclashes with + // source files's code segment (interrupt.c -> code_interrupt) + fprintf (asmFile, "c_interrupt\t%s\t0x4\n", CODE_NAME); + + /* interrupt service routine */ + fprintf (asmFile, "__sdcc_interrupt\n"); + copypCode(asmFile, 'I'); + } +} + +/*-----------------------------------------------------------------*/ +/* glue - the final glue that hold the whole thing together */ +/*-----------------------------------------------------------------*/ +void +picglue () +{ + FILE *asmFile; + struct dbuf_s ovrBuf; + struct dbuf_s vBuf; + + dbuf_init(&ovrBuf, 4096); + dbuf_init(&vBuf, 4096); + + pCodeInitRegisters(); + + /* check for main() */ + mainf = newSymbol ("main", 0); + mainf->block = 0; + mainf = findSymWithLevel (SymbolTab, mainf); + + if (!mainf || !IFFUNC_HASBODY(mainf->type)) + { + /* main missing -- import stack from main module */ + //fprintf (stderr, "main() missing -- assuming we are NOT the main module\n"); + pic14_options.isLibrarySource = 1; + } + + /* At this point we've got all the code in the form of pCode structures */ + /* Now it needs to be rearranged into the order it should be placed in the */ + /* code space */ + + movepBlock2Head('P'); // Last + movepBlock2Head(code->dbName); + movepBlock2Head('X'); + movepBlock2Head(statsg->dbName); // First + + + /* print the global struct definitions */ + if (options.debug) + cdbStructBlock (0); + + /* do the overlay segments */ + pic14emitOverlay(&ovrBuf); + + /* PENDING: this isnt the best place but it will do */ + if (port->general.glue_up_main) { + /* create the interrupt vector table */ + pic14createInterruptVect (&vBuf); + } + + AnalyzepCode('*'); + + ReuseReg(); // ReuseReg where call tree permits + + InlinepCode(); + + AnalyzepCode('*'); + + if (options.debug) pcode_test(); + + + /* now put it all together into the assembler file */ + /* create the assembler file name */ + + if ((noAssemble || options.c1mode) && fullDstFileName) + { + sprintf (buffer, "%s", fullDstFileName); + } + else + { + sprintf (buffer, "%s", dstFileName); + strcat (buffer, ".asm"); + } + + if (!(asmFile = fopen (buffer, "w"))) { + werror (E_FILE_OPEN_ERR, buffer); + exit (1); + } + + /* prepare statistics */ + resetpCodeStatistics (); + + /* initial comments */ + pic14initialComments (asmFile); + + /* print module name */ + fprintf (asmFile, "%s\t.file\t\"%s\"\n", + options.debug ? "" : ";", fullSrcFileName); + + /* Let the port generate any global directives, etc. */ + if (port->genAssemblerPreamble) + { + port->genAssemblerPreamble(asmFile); + } + + /* Put all variables into a cblock */ + AnalyzeBanking(); + + /* emit initialized data */ + showAllMemmaps(asmFile); + + /* print the locally defined variables in this module */ + writeUsedRegs(asmFile); + + /* create the overlay segments */ + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; overlayable items in internal ram \n"); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&ovrBuf, asmFile); + + /* copy the interrupt vector table */ + if (mainf && IFFUNC_HASBODY(mainf->type)) + dbuf_write_and_destroy (&vBuf, asmFile); + else + dbuf_destroy(&vBuf); + + /* create interupt ventor handler */ + pic14_emitInterruptHandler (asmFile); + + /* copy over code */ + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; code\n"); + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "code_%s\t%s\n", moduleName, port->mem.code_name); + + /* unknown */ + copypCode(asmFile, 'X'); + + /* _main function */ + copypCode(asmFile, 'M'); + + /* other functions */ + copypCode(asmFile, code->dbName); + + /* unknown */ + copypCode(asmFile, 'P'); + + dumppCodeStatistics (asmFile); + + fprintf (asmFile,"\tend\n"); + + fclose (asmFile); + pic14_debugLogClose(); +} + +/* + * Deal with initializers. + */ +#undef DEBUGprintf +#if 0 +// debugging output +#define DEBUGprintf printf +#else +// be quiet +#define DEBUGprintf 1 ? (void)0 : (void)printf +#endif + +static char * +parseIvalAst (ast *node, int *inCodeSpace) { +#define LEN 4096 + char *buffer = NULL; + char *left, *right; + + if (IS_AST_VALUE(node)) { + value *val = AST_VALUE(node); + symbol *sym = IS_AST_SYM_VALUE(node) ? AST_SYMBOL(node) : NULL; + if (inCodeSpace && val->type + && (IS_FUNC(val->type) || IS_CODE(getSpec(val->type)))) + { + *inCodeSpace = 1; + } + if (inCodeSpace && sym + && (IS_FUNC(sym->type) + || IS_CODE(getSpec(sym->type)))) + { + *inCodeSpace = 1; + } + + DEBUGprintf ("%s: AST_VALUE\n", __FUNCTION__); + if (IS_AST_LIT_VALUE(node)) { + buffer = Safe_alloc(LEN); + SNPRINTF(buffer, LEN, "0x%lx", AST_ULONG_VALUE (node)); + } else if (IS_AST_SYM_VALUE(node)) { + assert ( AST_SYMBOL(node) ); + /* + printf ("sym %s: ", AST_SYMBOL(node)->rname); + printTypeChain(AST_SYMBOL(node)->type, stdout); + printTypeChain(AST_SYMBOL(node)->etype, stdout); + printf ("\n---sym %s: done\n", AST_SYMBOL(node)->rname); + */ + buffer = Safe_strdup(AST_SYMBOL(node)->rname); + } else { + assert ( !"Invalid values type for initializers in AST." ); + } + } else if (IS_AST_OP(node)) { + DEBUGprintf ("%s: AST_OP\n", __FUNCTION__); + switch (node->opval.op) { + case CAST: + assert (node->right); + buffer = parseIvalAst(node->right, inCodeSpace); + DEBUGprintf ("%s: %s\n", __FUNCTION__, buffer); + break; + case '&': + assert ( node->left && !node->right ); + buffer = parseIvalAst(node->left, inCodeSpace); + DEBUGprintf ("%s: %s\n", __FUNCTION__, buffer); + break; + case '+': + assert (node->left && node->right ); + left = parseIvalAst(node->left, inCodeSpace); + right = parseIvalAst(node->right, inCodeSpace); + buffer = Safe_alloc(LEN); + SNPRINTF(buffer, LEN, "(%s + %s)", left, right); + DEBUGprintf ("%s: %s\n", __FUNCTION__, buffer); + Safe_free(left); + Safe_free(right); + break; + case '[': + assert ( node->left && node->right ); + assert ( IS_AST_VALUE(node->left) && AST_VALUE(node->left)->sym ); + right = parseIvalAst(node->right, inCodeSpace); + buffer = Safe_alloc(LEN); + SNPRINTF(buffer, LEN, "(%s + %u * %s)", + AST_VALUE(node->left)->sym->rname, getSize(AST_VALUE(node->left)->type), right); + Safe_free(right); + DEBUGprintf ("%s: %s\n", __FUNCTION__, &buffer[0]); + break; + default: + assert ( !"Unhandled operation in initializer." ); + break; + } + } else { + assert ( !"Invalid construct in initializer." ); + } + + return (buffer); +} + +/* + * Emit the section preamble, absolute location (if any) and + * symbol name(s) for intialized data. + */ +static int +emitIvalLabel(struct dbuf_s *oBuf, symbol *sym) +{ + char *segname; + static int in_code = 0; + static int sectionNr = 0; + + if (sym) { + // code or data space? + if (IS_CODE(getSpec(sym->type))) { + segname = "code"; + in_code = 1; + } else { + segname = "idata"; + in_code = 0; + } + dbuf_printf(oBuf, "\nID_%s_%d\t%s", moduleName, sectionNr++, segname); + if (SPEC_ABSA(getSpec(sym->type))) { + // specify address for absolute symbols + dbuf_printf(oBuf, "\t0x%04X", SPEC_ADDR(getSpec(sym->type))); + } // if + dbuf_printf(oBuf, "\n%s\n", sym->rname); + + addSet(&emitted, sym->rname); + } + return (in_code); +} + +/* + * Actually emit the initial values in .asm format. + */ +static void +emitIvals(struct dbuf_s *oBuf, symbol *sym, initList *list, long lit, int size) +{ + int i; + ast *node; + operand *op; + value *val = NULL; + int inCodeSpace = 0; + char *str = NULL; + int in_code; + + assert (size <= sizeof(long)); + assert (!list || (list->type == INIT_NODE)); + node = list ? list->init.node : NULL; + + in_code = emitIvalLabel(oBuf, sym); + if (!in_code) dbuf_printf (oBuf, "\tdb\t"); + + if (!node) { + // initialize as zero + for (i=0; i < size; i++) { + if (in_code) { + dbuf_printf (oBuf, "\tretlw 0x00"); + } else { + dbuf_printf (oBuf, "%s0x00", (i == 0) ? "" : ", "); + } + } // for + dbuf_printf (oBuf, "\n"); + return; + } // if + + op = NULL; + if (constExprTree(node) && (val = constExprValue(node, 0))) { + op = operandFromValue(val); + DEBUGprintf ("%s: constExpr ", __FUNCTION__); + } else if (IS_AST_VALUE(node)) { + op = operandFromAst(node, 0); + } else if (IS_AST_OP(node)) { + str = parseIvalAst(node, &inCodeSpace); + DEBUGprintf("%s: AST_OP: %s\n", __FUNCTION__, str); + op = NULL; + } else { + assert ( !"Unhandled construct in intializer." ); + } + + if (op) { + aopOp(op, NULL, 1); + assert(AOP(op)); + //printOperand(op, of); + } + + for (i=0; i < size; i++) { + char *text; + + /* + * FIXME: This is hacky and needs some more thought. + */ + if (op && IS_SYMOP(op) && IS_FUNC(OP_SYM_TYPE(op))) { + /* This branch is introduced to fix #1427663. */ + PCOI(AOP(op)->aopu.pcop)->offset+=i; + text = get_op(AOP(op)->aopu.pcop, NULL, 0); + PCOI(AOP(op)->aopu.pcop)->offset-=i; + } else { + text = op ? aopGet(AOP(op), i, 0, 0) + : get_op(newpCodeOpImmd(str, i, 0, inCodeSpace, 0), NULL, 0); + } // if + if (in_code) { + dbuf_printf (oBuf, "\tretlw %s\n", text); + } else { + dbuf_printf (oBuf, "%s%s", (i == 0) ? "" : ", ", text); + } + } // for + dbuf_printf (oBuf, "\n"); +} + +/* + * For UNIONs, we first have to find the correct alternative to map the + * initializer to. This function maps the structure of the initializer to + * the UNION members recursively. + * Returns the type of the first `fitting' member. + */ +static sym_link * +matchIvalToUnion (initList *list, sym_link *type, int size) +{ + symbol *sym; + + assert (type); + + if (IS_PTR(type) || IS_CHAR(type) || IS_INT(type) || IS_LONG(type) + || IS_FLOAT(type)) + { + if (!list || (list->type == INIT_NODE)) { + DEBUGprintf ("OK, simple type\n"); + return (type); + } else { + DEBUGprintf ("ERROR, simple type\n"); + return (NULL); + } + } else if (IS_BITFIELD(type)) { + if (!list || (list->type == INIT_NODE)) { + DEBUGprintf ("OK, bitfield\n"); + return (type); + } else { + DEBUGprintf ("ERROR, bitfield\n"); + return (NULL); + } + } else if (IS_STRUCT(type) && SPEC_STRUCT(getSpec(type))->type == STRUCT) { + if (!list || (list->type == INIT_DEEP)) { + if (list) list = list->init.deep; + sym = SPEC_STRUCT(type)->fields; + while (sym) { + DEBUGprintf ("Checking STRUCT member %s\n", sym->name); + if (!matchIvalToUnion(list, sym->type, 0)) { + DEBUGprintf ("ERROR, STRUCT member %s\n", sym->name); + return (NULL); + } + if (list) list = list->next; + sym = sym->next; + } // while + + // excess initializers? + if (list) { + DEBUGprintf ("ERROR, excess initializers\n"); + return (NULL); + } + + DEBUGprintf ("OK, struct\n"); + return (type); + } + return (NULL); + } else if (IS_STRUCT(type) && SPEC_STRUCT(getSpec(type))->type == UNION) { + if (!list || (list->type == INIT_DEEP)) { + if (list) list = list->init.deep; + sym = SPEC_STRUCT(type)->fields; + while (sym) { + DEBUGprintf ("Checking UNION member %s.\n", sym->name); + if (((IS_STRUCT(sym->type) || getSize(sym->type) == size)) + && matchIvalToUnion(list, sym->type, size)) + { + DEBUGprintf ("Matched UNION member %s.\n", sym->name); + return (sym->type); + } + sym = sym->next; + } // while + } // if + // no match found + DEBUGprintf ("ERROR, no match found.\n"); + return (NULL); + } else { + assert ( !"Unhandled type in UNION." ); + } + + assert ( !"No match found in UNION for the given initializer structure." ); + return (NULL); +} + +/* + * Parse the type and its initializer and emit it (recursively). + */ +static void +emitInitVal(struct dbuf_s *oBuf, symbol *topsym, sym_link *my_type, initList *list) +{ + symbol *sym; + int size, i; + long lit; + unsigned char *str; + + size = getSize(my_type); + + if (IS_PTR(my_type)) { + DEBUGprintf ("(pointer, %d byte) %p\n", size, list ? (void *)(long)list2int(list) : NULL); + emitIvals(oBuf, topsym, list, 0, size); + return; + } + + if (IS_ARRAY(my_type) && topsym && topsym->isstrlit) { + str = (unsigned char *)SPEC_CVAL(topsym->etype).v_char; + emitIvalLabel(oBuf, topsym); + do { + dbuf_printf (oBuf, "\tretlw 0x%02x ; '%c'\n", str[0], (str[0] >= 0x20 && str[0] < 128) ? str[0] : '.'); + } while (*(str++)); + return; + } + + if (IS_ARRAY(my_type) && list && list->type == INIT_NODE) { + fprintf (stderr, "Unhandled initialized symbol: %s\n", topsym->name); + assert ( !"Initialized char-arrays are not yet supported, assign at runtime instead." ); + return; + } + + if (IS_ARRAY(my_type)) { + DEBUGprintf ("(array, %d items, %d byte) below\n", DCL_ELEM(my_type), size); + assert (!list || list->type == INIT_DEEP); + if (list) list = list->init.deep; + for (i = 0; i < DCL_ELEM(my_type); i++) { + emitInitVal(oBuf, topsym, my_type->next, list); + topsym = NULL; + if (list) list = list->next; + } // for i + return; + } + + if (IS_FLOAT(my_type)) { + // float, 32 bit + DEBUGprintf ("(float, %d byte) %lf\n", size, list ? list2int(list) : 0.0); + emitIvals(oBuf, topsym, list, 0, size); + return; + } + + if (IS_CHAR(my_type) || IS_INT(my_type) || IS_LONG(my_type)) { + // integral type, 8, 16, or 32 bit + DEBUGprintf ("(integral, %d byte) 0x%lx/%ld\n", size, list ? (long)list2int(list) : 0, list ? (long)list2int(list) : 0); + emitIvals(oBuf, topsym, list, 0, size); + return; + + } else if (IS_STRUCT(my_type) && SPEC_STRUCT(my_type)->type == STRUCT) { + // struct + DEBUGprintf ("(struct, %d byte) handled below\n", size); + assert (!list || (list->type == INIT_DEEP)); + + // iterate over struct members and initList + if (list) list = list->init.deep; + sym = SPEC_STRUCT(my_type)->fields; + while (sym) { + long bitfield = 0; + int len = 0; + if (IS_BITFIELD(sym->type)) { + while (sym && IS_BITFIELD(sym->type)) { + assert (!list || ((list->type == INIT_NODE) + && IS_AST_LIT_VALUE(list->init.node))); + lit = (long) (list ? list2int(list) : 0); + DEBUGprintf ( "(bitfield member) %02lx (%d bit, starting at %d, bitfield %02lx)\n", + lit, SPEC_BLEN(getSpec(sym->type)), + SPEC_BSTR(getSpec(sym->type)), bitfield); + bitfield |= (lit & ((1ul << SPEC_BLEN(getSpec(sym->type))) - 1)) << SPEC_BSTR(getSpec(sym->type)); + len += SPEC_BLEN(getSpec(sym->type)); + + sym = sym->next; + if (list) list = list->next; + } // while + assert (len < sizeof (long) * 8); // did we overflow our initializer?!? + len = (len + 7) & ~0x07; // round up to full bytes + emitIvals(oBuf, topsym, NULL, bitfield, len / 8); + topsym = NULL; + } // if + + if (sym) { + emitInitVal(oBuf, topsym, sym->type, list); + topsym = NULL; + sym = sym->next; + if (list) list = list->next; + } // if + } // while + if (list) { + assert ( !"Excess initializers." ); + } // if + return; + + } else if (IS_STRUCT(my_type) && SPEC_STRUCT(my_type)->type == UNION) { + // union + DEBUGprintf ("(union, %d byte) handled below\n", size); + assert (list && list->type == INIT_DEEP); + + // iterate over union members and initList, try to map number and type of fields and initializers + my_type = matchIvalToUnion(list, my_type, size); + if (my_type) { + emitInitVal(oBuf, topsym, my_type, list->init.deep); + topsym = NULL; + size -= getSize(my_type); + if (size > 0) { + // pad with (leading) zeros + emitIvals(oBuf, NULL, NULL, 0, size); + } + return; + } // if + + assert ( !"No UNION member matches the initializer structure."); + } else if (IS_BITFIELD(my_type)) { + assert ( !"bitfields should only occur in structs..." ); + + } else { + printf ("SPEC_NOUN: %d\n", SPEC_NOUN(my_type)); + assert( !"Unhandled initialized type."); + } +} + +/* + * Emit a set of symbols. + * type - 0: have symbol tell whether it is local, extern or global + * 1: assume all symbols in set to be global + * 2: assume all symbols in set to be extern + */ +static void +emitSymbolSet(set *s, int type) +{ + symbol *sym; + initList *list; + unsigned sectionNr = 0; + + for (sym = setFirstItem(s); sym; sym = setNextItem(s)) { +#if 0 + fprintf (stdout, "; name %s, rname %s, level %d, block %d, key %d, local %d, ival %p, static %d, cdef %d, used %d\n", + sym->name, sym->rname, sym->level, sym->block, sym->key, sym->islocal, sym->ival, IS_STATIC(sym->etype), sym->cdef, sym->used); +#endif + + if (sym->etype && SPEC_ABSA(sym->etype) + && IS_CONFIG_ADDRESS(SPEC_ADDR(sym->etype)) + && sym->ival) + { + // handle config words + pic14_assignConfigWordValue(SPEC_ADDR(sym->etype), + (int)list2int(sym->ival)); + pic14_stringInSet(sym->rname, &emitted, 1); + continue; + } + + if (sym->isstrlit) { + // special case: string literals + emitInitVal(ivalBuf, sym, sym->type, NULL); + continue; + } + + if (type != 0 || sym->cdef + || (!IS_STATIC(sym->etype) + && IS_GLOBAL(sym))) + { + // bail out for ___fsadd and friends + if (sym->cdef && !sym->used) continue; + + /* export or import non-static globals */ + if (!pic14_stringInSet(sym->rname, &emitted, 0)) { + + if (type == 2 || IS_EXTERN(sym->etype) || sym->cdef) + { + /* do not add to emitted set, it might occur again! */ + //if (!sym->used) continue; + // declare symbol + emitIfNew (extBuf, &emitted, "\textern\t%s\n", sym->rname); + } else { + // declare symbol + emitIfNew (gloBuf, &emitted, "\tglobal\t%s\n", sym->rname); + if (!sym->ival && !IS_FUNC(sym->type)) { + // also define symbol + if (IS_ABSOLUTE(sym->etype)) { + // absolute location? + //dbuf_printf (gloDefBuf, "UD_%s_%u\tudata\t0x%04X\n", moduleName, sectionNr++, SPEC_ADDR(sym->etype)); + // deferred to pic14_constructAbsMap + } else { + dbuf_printf (gloDefBuf, "UD_%s_%u\tudata\n", moduleName, sectionNr++); + dbuf_printf (gloDefBuf, "%s\tres\t%d\n\n", sym->rname, getSize(sym->type)); + } + } // if + } // if + pic14_stringInSet(sym->rname, &emitted, 1); + } // if + } // if + list = sym->ival; + //if (list) showInitList(list, 0); + if (list) { + resolveIvalSym( list, sym->type ); + emitInitVal(ivalBuf, sym, sym->type, sym->ival); + dbuf_printf (ivalBuf, "\n"); + } + } // for sym +} + +/* + * Iterate over all memmaps and emit their contents (attributes, symbols). + */ +static void +showAllMemmaps(FILE *of) +{ + struct dbuf_s locBuf; + memmap *maps[] = { + xstack, istack, code, data, pdata, xdata, xidata, xinit, + idata, bit, statsg, c_abs, x_abs, i_abs, d_abs, + sfr, sfrbit, reg, generic, overlay, eeprom, home }; + memmap * map; + int i; + + DEBUGprintf ("---begin memmaps---\n"); + if (!extBuf) extBuf = dbuf_new(1024); + if (!gloBuf) gloBuf = dbuf_new(1024); + if (!gloDefBuf) gloDefBuf = dbuf_new(1024); + if (!ivalBuf) ivalBuf = dbuf_new(1024); + dbuf_init(&locBuf, 1024); + + dbuf_printf (extBuf, "%s; external declarations\n%s", iComments2, iComments2); + dbuf_printf (gloBuf, "%s; global declarations\n%s", iComments2, iComments2); + dbuf_printf (gloDefBuf, "%s; global definitions\n%s", iComments2, iComments2); + dbuf_printf (ivalBuf, "%s; initialized data\n%s", iComments2, iComments2); + dbuf_printf (&locBuf, "%s; compiler-defined variables\n%s", iComments2, iComments2); + + for (i = 0; i < sizeof(maps) / sizeof (memmap *); i++) { + map = maps[i]; + //DEBUGprintf ("memmap %i: %p\n", i, map); + if (map) { +#if 0 + fprintf (stdout, "; pageno %c, sname %s, dbName %c, ptrType %d, slbl %d, sloc %u, fmap %u, paged %u, direct %u, bitsp %u, codesp %u, regsp %u, syms %p\n", + map->pageno, map->sname, map->dbName, map->ptrType, map->slbl, + map->sloc, map->fmap, map->paged, map->direct, map->bitsp, + map->codesp, map->regsp, map->syms); +#endif + emitSymbolSet(map->syms, 0); + } // if (map) + } // for i + DEBUGprintf ("---end of memmaps---\n"); + + emitSymbolSet(publics, 1); + emitSymbolSet(externs, 2); + + emitPseudoStack(gloBuf, extBuf); + pic14_constructAbsMap(gloDefBuf, gloBuf); + pic14printLocals (&locBuf); + pic14_emitConfigWord(of); // must be done after all the rest + + dbuf_write_and_destroy(extBuf, of); + dbuf_write_and_destroy(gloBuf, of); + dbuf_write_and_destroy(gloDefBuf, of); + dbuf_write_and_destroy(&locBuf, of); + dbuf_write_and_destroy(ivalBuf, of); + + extBuf = gloBuf = gloDefBuf = ivalBuf = NULL; +} + diff --git a/src/pic/glue.h b/src/pic/glue.h new file mode 100644 index 0000000..f4a9407 --- /dev/null +++ b/src/pic/glue.h @@ -0,0 +1,36 @@ +/*------------------------------------------------------------------------- + + SDCCglue.h - glues everything we have done together into one file. + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef PIC_GLUE_H +#define PIC_GLUE_H + +#include "common.h" + +extern int pic14_hasInterrupt; +extern set *pic14_localFunctions; + +void picglue (void); +int pic14_stringInSet(const char *str, set **world, int autoAdd); + +#endif diff --git a/src/pic/main.c b/src/pic/main.c new file mode 100644 index 0000000..8707cc9 --- /dev/null +++ b/src/pic/main.c @@ -0,0 +1,435 @@ +/** @file main.c + pic14 specific general functions. + + Note that mlh prepended _pic14_ on the static functions. Makes + it easier to set a breakpoint using the debugger. +*/ +#include "common.h" +#include "MySystem.h" +#include "SDCCmacro.h" + +#include "device.h" +#include "gen.h" +#include "glue.h" +#include "main.h" +#include "pcode.h" +#include "ralloc.h" + +/* + * Imports + */ +extern set *dataDirsSet; +extern set *includeDirsSet; +extern set *libDirsSet; +extern set *libPathsSet; +extern set *linkOptionsSet; + + +pic14_options_t pic14_options; +int debug_verbose = 0; + + +#define OPTION_STACK_SIZE "--stack-size" + +static char _defaultRules[] = +{ +#include "peeph.rul" +}; + +static OPTION _pic14_poptions[] = + { + { 0, "--debug-xtra", &debug_verbose, "show more debug info in assembly output" }, + { 0, "--no-pcode-opt", &pic14_options.disable_df, "disable (slightly faulty) optimization on pCode" }, + { 0, OPTION_STACK_SIZE, &options.stack_size, "sets the size if the argument passing stack (default: 16, minimum: 4)", CLAT_INTEGER }, + { 0, NULL, NULL, NULL } + }; + +/* list of key words used by pic14 */ +static char *_pic14_keywords[] = +{ + "at", + //"bit", + "code", + "critical", + "data", + "far", + "idata", + "interrupt", + "near", + "pdata", + "reentrant", + "sfr", + //"sbit", + "using", + "xdata", + "_data", + "_code", + "_generic", + "_near", + "_xdata", + "_pdata", + "_idata", + NULL +}; + +static int regParmFlg = 0; /* determine if we can register a parameter */ + + +/** $1 is always the basename. + $2 is always the output file. + $3 varies + $l is the list of extra options that should be there somewhere... + MUST be terminated with a NULL. +*/ +static const char *_linkCmd[] = +{ + "gplink", "$l", "-w", "-r", "-o \"$2\"", "\"$1\"", "$3", NULL +}; + +static const char *_asmCmd[] = +{ + "gpasm", "$l", "$3", "-c", "\"$1.asm\"", NULL +}; + +static void +_pic14_init (void) +{ + asm_addTree (&asm_asxxxx_mapping); + memset (&pic14_options, 0, sizeof (pic14_options)); +} + +static void +_pic14_reset_regparm (void) +{ + regParmFlg = 0; +} + +static int +_pic14_regparm (sym_link * l, bool reentrant) +{ +/* for this processor it is simple + can pass only the first parameter in a register */ + //if (regParmFlg) + // return 0; + + regParmFlg++;// = 1; + return 1; +} + +static bool +_pic14_parseOptions (int *pargc, char **argv, int *i) +{ + /* TODO: allow port-specific command line options to specify + * segment names here. + */ + return FALSE; +} + +/* pic14 port uses include/pic and lib/pic instead of + * include/pic14 and lib/pic14 as indicated by SDCCmain.c's + * setIncludePaths routine. */ +static void +_pic14_initPaths (void) +{ + char *p; + char *p2=NULL; + set *tempSet=NULL; + + if (options.nostdinc) + return; + + tempSet = appendStrSet(dataDirsSet, NULL, INCLUDE_DIR_SUFFIX DIR_SEPARATOR_STRING "pic"); + mergeSets(&includeDirsSet, tempSet); + + if ((p = getenv(SDCC_INCLUDE_NAME)) != NULL) + { + addSetHead(&includeDirsSet, p); + p2=Safe_alloc(strlen(p)+strlen(DIR_SEPARATOR_STRING)+strlen("pic")+1); + if(p2!=NULL) + { + strcpy(p2, p); + strcat(p2, DIR_SEPARATOR_STRING); + strcat(p2, "pic"); + addSetHead(&includeDirsSet, p2); + } + } +} + +static void +_pic14_finaliseOptions (void) +{ + pCodeInitRegisters(); + + port->mem.default_local_map = data; + port->mem.default_globl_map = data; +} + +static void +_pic14_setDefaultOptions (void) +{ +} + +static const char * +_pic14_getRegName (struct regs *reg) +{ + if (reg) + return reg->name; + return "err"; +} + +static void +_pic14_genAssemblerPreamble (FILE * of) +{ + char * name = processor_base_name(); + + if(!name) { + + name = "16f877"; + fprintf(stderr,"WARNING: No Pic has been selected, defaulting to %s\n",name); + } + + fprintf (of, "\tlist\tp=%s\n",name); + fprintf (of, "\tradix dec\n"); + fprintf (of, "\tinclude \"p%s.inc\"\n",name); +} + +/* Generate interrupt vector table. */ +static int +_pic14_genIVT (struct dbuf_s * oBuf, symbol ** interrupts, int maxInterrupts) +{ + /* Let the default code handle it. */ + return FALSE; +} + +static bool +_hasNativeMulFor (iCode *ic, sym_link *left, sym_link *right) +{ + if ( ic->op != '*') + { + return FALSE; + } + + /* multiply chars in-place */ + if (getSize(left) == 1 && getSize(right) == 1) + return TRUE; + + /* use library functions for more complex maths */ + return FALSE; +} + +/* Indicate which extended bit operations this port supports */ +static bool +hasExtBitOp (int op, int size) +{ + if (op == RRC + || op == RLC + /* || op == GETHBIT */ /* GETHBIT doesn't look complete for PIC */ + ) + return TRUE; + else + return FALSE; +} + +/* Indicate the expense of an access to an output storage class */ +static int +oclsExpense (struct memmap *oclass) +{ + /* The IN_FARSPACE test is compatible with historical behaviour, */ + /* but I don't think it is applicable to PIC. If so, please feel */ + /* free to remove this test -- EEP */ + if (IN_FARSPACE(oclass)) + return 1; + + return 0; +} + +static void _pic14_do_link (void) +{ + hTab *linkValues=NULL; + char lfrm[256]; + char *lcmd; + char temp[128]; + set *tSet=NULL; + int ret; + char * procName; + + /* + * link command format: + * {linker} {incdirs} {lflags} -o {outfile} {spec_ofiles} {ofiles} {libs} + * + */ + + sprintf(lfrm, "{linker} {incdirs} {sysincdirs} {lflags} -w -r -o {outfile} {user_ofile} {spec_ofiles} {ofiles} {libs}"); + + shash_add(&linkValues, "linker", "gplink"); + + /* LIBRARY SEARCH DIRS */ + mergeSets(&tSet, libPathsSet); + mergeSets(&tSet, libDirsSet); + shash_add(&linkValues, "incdirs", joinStrSet(appendStrSet(tSet, "-I\"", "\""))); + + SNPRINTF (&temp[0], 128, "%cpic\"", DIR_SEPARATOR_CHAR); + joinStrSet(appendStrSet(libDirsSet, "-I\"", &temp[0])); + shash_add(&linkValues, "sysincdirs", joinStrSet(appendStrSet(libDirsSet, "-I\"", &temp[0]))); + + shash_add(&linkValues, "lflags", joinStrSet(linkOptionsSet)); + + shash_add(&linkValues, "outfile", fullDstFileName ? fullDstFileName : dstFileName); + + if(fullSrcFileName) { + sprintf(temp, "%s.o", fullDstFileName ? fullDstFileName : dstFileName ); + shash_add(&linkValues, "user_ofile", temp); + } + + shash_add(&linkValues, "ofiles", joinStrSet(relFilesSet)); + + /* LIBRARIES */ + procName = processor_base_name(); + if (!procName) { + procName = "16f877"; + } + + addSet(&libFilesSet, "libsdcc.lib"); + SNPRINTF(&temp[0], 128, "pic%s.lib", procName); + addSet(&libFilesSet, temp); + shash_add(&linkValues, "libs", joinStrSet(libFilesSet)); + + lcmd = msprintf(linkValues, lfrm); + + ret = my_system( lcmd ); + + Safe_free( lcmd ); + + if(ret) + exit(1); +} + +/* Globals */ +PORT pic_port = +{ + TARGET_ID_PIC, + "pic14", + "MCU pic", /* Target name */ + "", /* Processor */ + { + picglue, + TRUE, /* Emit glue around main */ + MODEL_SMALL | MODEL_LARGE | MODEL_FLAT24, + MODEL_SMALL + }, + { + _asmCmd, + NULL, + "-g", /* options with --debug */ + NULL, /* options without --debug */ + //"-plosgffc", /* Options with debug */ + //"-plosgff", /* Options without debug */ + 0, + ".asm", + NULL /* no do_assemble function */ + }, + { + _linkCmd, + NULL, + _pic14_do_link, /* own do link function */ + ".o", + 0 + }, + { + _defaultRules + }, + { + /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ + 1, 2, 2, 4, 2, 2, 3, 1, 4, 4 + /* TSD - I changed the size of gptr from 3 to 1. However, it should be + 2 so that we can accomodate the PIC's with 4 register banks (like the + 16f877) + */ + }, + /* tags for generic pointers */ + { 0x00, 0x00, 0x00, 0x80 }, /* far, near, xstack, code */ + { + "XSEG (XDATA)", + "STACK (DATA)", + "code", + "DSEG (DATA)", + "ISEG (DATA)", + NULL, /* pdata */ + "XSEG (XDATA)", + "BSEG (BIT)", + "RSEG (DATA)", + "GSINIT (CODE)", + "udata_ovr", + "GSFINAL (CODE)", + "HOME (CODE)", + NULL, // xidata + NULL, // xinit + "CONST (CODE)", // const_name - const data (code or not) + "CABS (ABS,CODE)", // cabs_name - const absolute data (code or not) + "XABS (ABS,XDATA)", // xabs_name - absolute xdata + "IABS (ABS,DATA)", // iabs_name - absolute data + NULL, + NULL, + 1 // code is read only + }, + { NULL, NULL }, + { + +1, 1, 4, 1, 1, 0 + }, + /* pic14 has an 8 bit mul */ + { + 1, -1 + }, + { + pic14_emitDebuggerSymbol + }, + { + 255/3, /* maxCount */ + 3, /* sizeofElement */ + /* The rest of these costs are bogus. They approximate */ + /* the behavior of src/SDCCicode.c 1.207 and earlier. */ + {4,4,4}, /* sizeofMatchJump[] */ + {0,0,0}, /* sizeofRangeCompare[] */ + 0, /* sizeofSubtract */ + 3, /* sizeofDispatch */ + }, + "_", + _pic14_init, + _pic14_parseOptions, + _pic14_poptions, + _pic14_initPaths, + _pic14_finaliseOptions, + _pic14_setDefaultOptions, + pic14_assignRegisters, + _pic14_getRegName, + _pic14_keywords, + _pic14_genAssemblerPreamble, + NULL, /* no genAssemblerEnd */ + _pic14_genIVT, + NULL, // _pic14_genXINIT + NULL, /* genInitStartup */ + _pic14_reset_regparm, + _pic14_regparm, + NULL, /* process a pragma */ + NULL, + _hasNativeMulFor, + hasExtBitOp, /* hasExtBitOp */ + oclsExpense, /* oclsExpense */ + FALSE, +// TRUE, /* little endian */ + FALSE, /* little endian - PIC code enumlates big endian */ + 0, /* leave lt */ + 0, /* leave gt */ + 1, /* transform <= to ! > */ + 1, /* transform >= to ! < */ + 1, /* transform != to !(a == b) */ + 0, /* leave == */ + FALSE, /* No array initializer support. */ + 0, /* no CSE cost estimation yet */ + NULL, /* no builtin functions */ + GPOINTER, /* treat unqualified pointers as "generic" pointers */ + 1, /* reset labelKey to 1 */ + 1, /* globals & local static allowed */ + PORT_MAGIC +}; + diff --git a/src/pic/main.h b/src/pic/main.h new file mode 100644 index 0000000..b185ad7 --- /dev/null +++ b/src/pic/main.h @@ -0,0 +1,13 @@ +#ifndef MAIN_INCLUDE +#define MAIN_INCLUDE + +typedef struct { + unsigned int isLibrarySource:1; + int disable_df; +} pic14_options_t; + +extern pic14_options_t pic14_options; +extern int debug_verbose; + +#endif + diff --git a/src/pic/pcode.c b/src/pic/pcode.c new file mode 100644 index 0000000..b97ff17 --- /dev/null +++ b/src/pic/pcode.c @@ -0,0 +1,5413 @@ +/*------------------------------------------------------------------------- + + pcode.c - post code generation + Written By - Scott Dattalo scott@dattalo.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +-------------------------------------------------------------------------*/ + +#include "device.h" +#include "gen.h" +#include "pcode.h" +#include "pcodeflow.h" +#include "ralloc.h" + +/****************************************************************/ +/****************************************************************/ + +// Eventually this will go into device dependent files: +pCodeOpReg pc_status = {{PO_STATUS, "STATUS"}, -1, NULL,0,NULL}; +pCodeOpReg pc_indf = {{PO_INDF, "INDF"}, -1, NULL,0,NULL}; +pCodeOpReg pc_fsr = {{PO_FSR, "FSR"}, -1, NULL,0,NULL}; +pCodeOpReg pc_intcon = {{PO_INTCON, "INTCON"}, -1, NULL,0,NULL}; +pCodeOpReg pc_pcl = {{PO_PCL, "PCL"}, -1, NULL,0,NULL}; +pCodeOpReg pc_pclath = {{PO_PCLATH, "PCLATH"}, -1, NULL,0,NULL}; + +pCodeOpReg pc_wsave = {{PO_GPR_REGISTER, "WSAVE"}, -1, NULL,0,NULL}; +pCodeOpReg pc_ssave = {{PO_GPR_REGISTER, "SSAVE"}, -1, NULL,0,NULL}; +pCodeOpReg pc_psave = {{PO_GPR_REGISTER, "PSAVE"}, -1, NULL,0,NULL}; + +pFile *the_pFile = NULL; + + +#define SET_BANK_BIT (1 << 16) +#define CLR_BANK_BIT 0 + +static peepCommand peepCommands[] = { + + {NOTBITSKIP, "_NOTBITSKIP_"}, + {BITSKIP, "_BITSKIP_"}, + {INVERTBITSKIP, "_INVERTBITSKIP_"}, + + {-1, NULL} +}; + +static int mnemonics_initialized = 0; + +static hTab *pic14MnemonicsHash = NULL; +static hTab *pic14pCodePeepCommandsHash = NULL; + +static pBlock *pb_dead_pcodes = NULL; + +/* Hardcoded flags to change the behavior of the PIC port */ +static int functionInlining = 1; /* inline functions if nonzero */ + +// static int GpCodeSequenceNumber = 1; +static int GpcFlowSeq = 1; + +/* statistics (code size estimation) */ +static unsigned int pcode_insns = 0; +static unsigned int pcode_doubles = 0; + +static unsigned peakIdx = 0; /* This keeps track of the peak register index for call tree register reuse */ + + +/****************************************************************/ +/* Forward declarations */ +/****************************************************************/ + +static void genericDestruct(pCode *pc); +static void genericPrint(FILE *of,pCode *pc); + +static void pBlockStats(FILE *of, pBlock *pb); +static pCode *findFunction(char *fname); +static void pCodePrintLabel(FILE *of, pCode *pc); +static void pCodePrintFunction(FILE *of, pCode *pc); +static void pCodeOpPrint(FILE *of, pCodeOp *pcop); +static char *get_op_from_instruction( pCodeInstruction *pcc); +static pBlock *newpBlock(void); + + +/****************************************************************/ +/* PIC Instructions */ +/****************************************************************/ + +static pCodeInstruction pciADDWF = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_ADDWF, + "ADDWF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_REGISTER | PCC_C | PCC_DC | PCC_Z) // outCond +}; + +static pCodeInstruction pciADDFW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_ADDFW, + "ADDWF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_W | PCC_C | PCC_DC | PCC_Z) // outCond +}; + +static pCodeInstruction pciADDLW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_ADDLW, + "ADDLW", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 1, // literal operand + POC_NOP, + (PCC_W | PCC_LITERAL), // inCond + (PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond +}; + +static pCodeInstruction pciANDLW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_ANDLW, + "ANDLW", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 1, // literal operand + POC_NOP, + (PCC_W | PCC_LITERAL), // inCond + (PCC_W | PCC_Z) // outCond +}; + +static pCodeInstruction pciANDWF = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_ANDWF, + "ANDWF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_REGISTER | PCC_Z) // outCond +}; + +static pCodeInstruction pciANDFW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_ANDFW, + "ANDWF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_W | PCC_Z) // outCond +}; + +static pCodeInstruction pciBCF = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_BCF, + "BCF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,1, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_BSF, + (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond + (PCC_REGISTER | PCC_EXAMINE_PCOP) // outCond +}; + +static pCodeInstruction pciBSF = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_BSF, + "BSF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,1, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_BCF, + (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond + (PCC_REGISTER | PCC_EXAMINE_PCOP) // outCond +}; + +static pCodeInstruction pciBTFSC = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_BTFSC, + "BTFSC", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,1, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + POC_BTFSS, + (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond + PCC_NONE // outCond +}; + +static pCodeInstruction pciBTFSS = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_BTFSS, + "BTFSS", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,1, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + POC_BTFSC, + (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond + PCC_NONE // outCond +}; + +static pCodeInstruction pciCALL = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_CALL, + "CALL", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_NONE | PCC_W), // inCond, reads argument from WREG + (PCC_NONE | PCC_W | PCC_C | PCC_DC | PCC_Z) // outCond, flags are destroyed by called function +}; + +static pCodeInstruction pciCOMF = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_COMF, + "COMF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_REGISTER, // inCond + PCC_REGISTER | PCC_Z // outCond +}; + +static pCodeInstruction pciCOMFW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_COMFW, + "COMF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_REGISTER, // inCond + PCC_W | PCC_Z // outCond +}; + +static pCodeInstruction pciCLRF = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_CLRF, + "CLRF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_REGISTER | PCC_Z // outCond +}; + +static pCodeInstruction pciCLRW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_CLRW, + "CLRW", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_W | PCC_Z // outCond +}; + +static pCodeInstruction pciCLRWDT = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_CLRWDT, + "CLRWDT", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE // outCond +}; + +static pCodeInstruction pciDECF = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_DECF, + "DECF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_REGISTER, // inCond + PCC_REGISTER | PCC_Z // outCond +}; + +static pCodeInstruction pciDECFW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_DECFW, + "DECF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_REGISTER, // inCond + PCC_W | PCC_Z // outCond +}; + +static pCodeInstruction pciDECFSZ = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_DECFSZ, + "DECFSZ", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,0, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + POC_DECF, // followed by BTFSC STATUS, Z --> also kills STATUS + PCC_REGISTER, // inCond + PCC_REGISTER | PCC_Z // outCond +}; + +static pCodeInstruction pciDECFSZW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_DECFSZW, + "DECFSZ", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + POC_DECFW, // followed by BTFSC STATUS, Z --> also kills STATUS + PCC_REGISTER, // inCond + PCC_W | PCC_Z // outCond +}; + +static pCodeInstruction pciGOTO = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_GOTO, + "GOTO", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE // outCond +}; + +static pCodeInstruction pciINCF = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_INCF, + "INCF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_REGISTER, // inCond + PCC_REGISTER | PCC_Z // outCond +}; + +static pCodeInstruction pciINCFW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_INCFW, + "INCF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_REGISTER, // inCond + PCC_W | PCC_Z // outCond +}; + +static pCodeInstruction pciINCFSZ = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_INCFSZ, + "INCFSZ", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,0, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + POC_INCF, // followed by BTFSC STATUS, Z --> also kills STATUS + PCC_REGISTER, // inCond + PCC_REGISTER | PCC_Z // outCond +}; + +static pCodeInstruction pciINCFSZW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_INCFSZW, + "INCFSZ", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + POC_INCFW, // followed by BTFSC STATUS, Z --> also kills STATUS + PCC_REGISTER, // inCond + PCC_W | PCC_Z // outCond +}; + +static pCodeInstruction pciIORWF = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_IORWF, + "IORWF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_REGISTER | PCC_Z) // outCond +}; + +static pCodeInstruction pciIORFW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_IORFW, + "IORWF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_W | PCC_Z) // outCond +}; + +static pCodeInstruction pciIORLW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_IORLW, + "IORLW", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 1, // literal operand + POC_NOP, + (PCC_W | PCC_LITERAL), // inCond + (PCC_W | PCC_Z) // outCond +}; + +static pCodeInstruction pciMOVF = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_MOVF, + "MOVF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_REGISTER, // inCond + PCC_Z // outCond +}; + +static pCodeInstruction pciMOVFW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_MOVFW, + "MOVF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_REGISTER, // inCond + (PCC_W | PCC_Z) // outCond +}; + +static pCodeInstruction pciMOVWF = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_MOVWF, + "MOVWF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_W, // inCond + PCC_REGISTER // outCond +}; + +static pCodeInstruction pciMOVLW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_MOVLW, + "MOVLW", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 1, // literal operand + POC_NOP, + (PCC_NONE | PCC_LITERAL), // inCond + PCC_W // outCond +}; + +static pCodeInstruction pciNOP = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_NOP, + "NOP", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE // outCond +}; + +static pCodeInstruction pciRETFIE = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_RETFIE, + "RETFIE", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_NONE, // inCond + (PCC_NONE | PCC_C | PCC_DC | PCC_Z) // outCond (not true... affects the GIE bit too), STATUS bit are retored +}; + +static pCodeInstruction pciRETLW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_RETLW, + "RETLW", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 1, // literal operand + POC_NOP, + PCC_LITERAL, // inCond + (PCC_W| PCC_C | PCC_DC | PCC_Z) // outCond, STATUS bits are irrelevant after RETLW +}; + +static pCodeInstruction pciRETURN = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_RETURN, + "RETURN", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_NONE | PCC_W, // inCond, return value is possibly present in W + (PCC_NONE | PCC_C | PCC_DC | PCC_Z) // outCond, STATUS bits are irrelevant after RETURN +}; + +static pCodeInstruction pciRLF = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_RLF, + "RLF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_C | PCC_REGISTER), // inCond + (PCC_REGISTER | PCC_C ) // outCond +}; + +static pCodeInstruction pciRLFW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_RLFW, + "RLF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_C | PCC_REGISTER), // inCond + (PCC_W | PCC_C) // outCond +}; + +static pCodeInstruction pciRRF = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_RRF, + "RRF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_C | PCC_REGISTER), // inCond + (PCC_REGISTER | PCC_C) // outCond +}; + +static pCodeInstruction pciRRFW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_RRFW, + "RRF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_C | PCC_REGISTER), // inCond + (PCC_W | PCC_C) // outCond +}; + +static pCodeInstruction pciSUBWF = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_SUBWF, + "SUBWF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_REGISTER | PCC_C | PCC_DC | PCC_Z) // outCond +}; + +static pCodeInstruction pciSUBFW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_SUBFW, + "SUBWF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_W | PCC_C | PCC_DC | PCC_Z) // outCond +}; + +static pCodeInstruction pciSUBLW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_SUBLW, + "SUBLW", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 1, // literal operand + POC_NOP, + (PCC_W | PCC_LITERAL), // inCond + (PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond +}; + +static pCodeInstruction pciSWAPF = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_SWAPF, + "SWAPF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_REGISTER), // inCond + (PCC_REGISTER) // outCond +}; + +static pCodeInstruction pciSWAPFW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_SWAPFW, + "SWAPF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_REGISTER), // inCond + (PCC_W) // outCond +}; + +static pCodeInstruction pciTRIS = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_TRIS, + "TRIS", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_NONE, // inCond /* FIXME: what's TRIS doing? */ + PCC_REGISTER // outCond /* FIXME: what's TRIS doing */ +}; + +static pCodeInstruction pciXORWF = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_XORWF, + "XORWF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_REGISTER | PCC_Z) // outCond +}; + +static pCodeInstruction pciXORFW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_XORFW, + "XORWF", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_W | PCC_Z) // outCond +}; + +static pCodeInstruction pciXORLW = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_XORLW, + "XORLW", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 1, // literal operand + POC_NOP, + (PCC_W | PCC_LITERAL), // inCond + (PCC_W | PCC_Z) // outCond +}; + + +static pCodeInstruction pciBANKSEL = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_BANKSEL, + "BANKSEL", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE // outCond +}; + +static pCodeInstruction pciPAGESEL = { + {PC_OPCODE, NULL, NULL, 0, 0, NULL, + genericDestruct, + genericPrint}, + POC_PAGESEL, + "PAGESEL", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE // outCond +}; + +pCodeInstruction *pic14Mnemonics[MAX_PIC14MNEMONICS]; + + +/*-----------------------------------------------------------------*/ +/* return a unique ID number to assist pCodes debuging */ +/*-----------------------------------------------------------------*/ +static unsigned PCodeID(void) { + static unsigned int pcodeId = 1; /* unique ID number to be assigned to all pCodes */ + /* + static unsigned int stop; + if (pcodeId == 1448) + stop++; // Place break point here + */ + return pcodeId++; +} + +void pCodeInitRegisters(void) +{ + static int initialized=0; + int shareBankAddress, stkSize, haveShared; + PIC_device *pic; + + if(initialized) + return; + initialized = 1; + + pic = init_pic(port->processor); + haveShared = pic14_getSharedStack(NULL, &shareBankAddress, &stkSize); + /* Set pseudo stack size to SHAREBANKSIZE - 3. + * On multi memory bank ICs this leaves room for WSAVE/SSAVE/PSAVE + * (used for interrupts) to fit into the shared portion of the + * memory bank. */ + stkSize = stkSize - 3; + assert(stkSize >= 0); + initStack(shareBankAddress, stkSize, haveShared); + + /* TODO: Read aliases for SFRs from regmap lines in device description. */ + pc_status.r = allocProcessorRegister(IDX_STATUS,"STATUS", PO_STATUS, 0x180); + pc_pcl.r = allocProcessorRegister(IDX_PCL,"PCL", PO_PCL, 0x80); + pc_pclath.r = allocProcessorRegister(IDX_PCLATH,"PCLATH", PO_PCLATH, 0x180); + pc_fsr.r = allocProcessorRegister(IDX_FSR,"FSR", PO_FSR, 0x180); + pc_indf.r = allocProcessorRegister(IDX_INDF,"INDF", PO_INDF, 0x180); + pc_intcon.r = allocProcessorRegister(IDX_INTCON,"INTCON", PO_INTCON, 0x180); + + pc_status.rIdx = IDX_STATUS; + pc_fsr.rIdx = IDX_FSR; + pc_indf.rIdx = IDX_INDF; + pc_intcon.rIdx = IDX_INTCON; + pc_pcl.rIdx = IDX_PCL; + pc_pclath.rIdx = IDX_PCLATH; + + /* Interrupt storage for working register - must be same address in all banks ie section SHAREBANK. */ + pc_wsave.r = allocInternalRegister(IDX_WSAVE,pc_wsave.pcop.name,pc_wsave.pcop.type, pic ? pic->bankMask : 0x180); + /* Interrupt storage for status register. */ + pc_ssave.r = allocInternalRegister(IDX_SSAVE,pc_ssave.pcop.name,pc_ssave.pcop.type, (pic && haveShared) ? pic->bankMask : 0); + /* Interrupt storage for pclath register. */ + pc_psave.r = allocInternalRegister(IDX_PSAVE,pc_psave.pcop.name,pc_psave.pcop.type, (pic && haveShared) ? pic->bankMask : 0); + + pc_wsave.rIdx = pc_wsave.r->rIdx; + pc_ssave.rIdx = pc_ssave.r->rIdx; + pc_psave.rIdx = pc_psave.r->rIdx; + + pc_wsave.r->isFixed = 1; /* Some PIC ICs do not have a sharebank - this register needs to be reserved across all banks. */ + pc_wsave.r->address = shareBankAddress-stkSize; + pc_ssave.r->isFixed = 1; /* This register must be in the first bank. */ + pc_ssave.r->address = shareBankAddress-stkSize-1; + pc_psave.r->isFixed = 1; /* This register must be in the first bank. */ + pc_psave.r->address = shareBankAddress-stkSize-2; + + /* probably should put this in a separate initialization routine */ + pb_dead_pcodes = newpBlock(); + +} + +/*-----------------------------------------------------------------*/ +/* mnem2key - convert a pic mnemonic into a hash key */ +/* (BTW - this spreads the mnemonics quite well) */ +/* */ +/*-----------------------------------------------------------------*/ + +static int mnem2key(unsigned char const *mnem) +{ + int key = 0; + + if(!mnem) + return 0; + + while(*mnem) { + + key += toupper(*mnem++) +1; + + } + + return (key & 0x1f); + +} + +static void pic14initMnemonics(void) +{ + int i = 0; + int key; + // char *str; + pCodeInstruction *pci; + + if(mnemonics_initialized) + return; + + //FIXME - probably should NULL out the array before making the assignments + //since we check the array contents below this initialization. + + pic14Mnemonics[POC_ADDLW] = &pciADDLW; + pic14Mnemonics[POC_ADDWF] = &pciADDWF; + pic14Mnemonics[POC_ADDFW] = &pciADDFW; + pic14Mnemonics[POC_ANDLW] = &pciANDLW; + pic14Mnemonics[POC_ANDWF] = &pciANDWF; + pic14Mnemonics[POC_ANDFW] = &pciANDFW; + pic14Mnemonics[POC_BCF] = &pciBCF; + pic14Mnemonics[POC_BSF] = &pciBSF; + pic14Mnemonics[POC_BTFSC] = &pciBTFSC; + pic14Mnemonics[POC_BTFSS] = &pciBTFSS; + pic14Mnemonics[POC_CALL] = &pciCALL; + pic14Mnemonics[POC_COMF] = &pciCOMF; + pic14Mnemonics[POC_COMFW] = &pciCOMFW; + pic14Mnemonics[POC_CLRF] = &pciCLRF; + pic14Mnemonics[POC_CLRW] = &pciCLRW; + pic14Mnemonics[POC_CLRWDT] = &pciCLRWDT; + pic14Mnemonics[POC_DECF] = &pciDECF; + pic14Mnemonics[POC_DECFW] = &pciDECFW; + pic14Mnemonics[POC_DECFSZ] = &pciDECFSZ; + pic14Mnemonics[POC_DECFSZW] = &pciDECFSZW; + pic14Mnemonics[POC_GOTO] = &pciGOTO; + pic14Mnemonics[POC_INCF] = &pciINCF; + pic14Mnemonics[POC_INCFW] = &pciINCFW; + pic14Mnemonics[POC_INCFSZ] = &pciINCFSZ; + pic14Mnemonics[POC_INCFSZW] = &pciINCFSZW; + pic14Mnemonics[POC_IORLW] = &pciIORLW; + pic14Mnemonics[POC_IORWF] = &pciIORWF; + pic14Mnemonics[POC_IORFW] = &pciIORFW; + pic14Mnemonics[POC_MOVF] = &pciMOVF; + pic14Mnemonics[POC_MOVFW] = &pciMOVFW; + pic14Mnemonics[POC_MOVLW] = &pciMOVLW; + pic14Mnemonics[POC_MOVWF] = &pciMOVWF; + pic14Mnemonics[POC_NOP] = &pciNOP; + pic14Mnemonics[POC_RETFIE] = &pciRETFIE; + pic14Mnemonics[POC_RETLW] = &pciRETLW; + pic14Mnemonics[POC_RETURN] = &pciRETURN; + pic14Mnemonics[POC_RLF] = &pciRLF; + pic14Mnemonics[POC_RLFW] = &pciRLFW; + pic14Mnemonics[POC_RRF] = &pciRRF; + pic14Mnemonics[POC_RRFW] = &pciRRFW; + pic14Mnemonics[POC_SUBLW] = &pciSUBLW; + pic14Mnemonics[POC_SUBWF] = &pciSUBWF; + pic14Mnemonics[POC_SUBFW] = &pciSUBFW; + pic14Mnemonics[POC_SWAPF] = &pciSWAPF; + pic14Mnemonics[POC_SWAPFW] = &pciSWAPFW; + pic14Mnemonics[POC_TRIS] = &pciTRIS; + pic14Mnemonics[POC_XORLW] = &pciXORLW; + pic14Mnemonics[POC_XORWF] = &pciXORWF; + pic14Mnemonics[POC_XORFW] = &pciXORFW; + pic14Mnemonics[POC_BANKSEL] = &pciBANKSEL; + pic14Mnemonics[POC_PAGESEL] = &pciPAGESEL; + + for(i=0; imnemonic), pic14Mnemonics[i]); + pci = hTabFirstItem(pic14MnemonicsHash, &key); + + while(pci) { + DFPRINTF((stderr, "element %d key %d, mnem %s\n",i++,key,pci->mnemonic)); + pci = hTabNextItem(pic14MnemonicsHash, &key); + } + + mnemonics_initialized = 1; +} + +int getpCode(char *mnem,unsigned dest) +{ + + pCodeInstruction *pci; + int key = mnem2key((unsigned char *)mnem); + + if(!mnemonics_initialized) + pic14initMnemonics(); + + pci = hTabFirstItemWK(pic14MnemonicsHash, key); + + while(pci) { + + if(STRCASECMP(pci->mnemonic, mnem) == 0) { + if((pci->num_ops <= 1) || (pci->isModReg == dest) || (pci->isBitInst)) + return(pci->op); + } + + pci = hTabNextItemWK (pic14MnemonicsHash); + + } + + return -1; +} + +/*-----------------------------------------------------------------* +* pic14initpCodePeepCommands +* +*-----------------------------------------------------------------*/ +void pic14initpCodePeepCommands(void) +{ + + int key, i; + peepCommand *pcmd; + + i = 0; + do { + hTabAddItem(&pic14pCodePeepCommandsHash, + mnem2key((unsigned char *)peepCommands[i].cmd), &peepCommands[i]); + i++; + } while (peepCommands[i].cmd); + + pcmd = hTabFirstItem(pic14pCodePeepCommandsHash, &key); + + while(pcmd) { + //fprintf(stderr, "peep command %s key %d\n",pcmd->cmd,pcmd->id); + pcmd = hTabNextItem(pic14pCodePeepCommandsHash, &key); + } + +} + +/*----------------------------------------------------------------- +* +* +*-----------------------------------------------------------------*/ + +int getpCodePeepCommand(char *cmd) +{ + + peepCommand *pcmd; + int key = mnem2key((unsigned char *)cmd); + + + pcmd = hTabFirstItemWK(pic14pCodePeepCommandsHash, key); + + while(pcmd) { + // fprintf(stderr," comparing %s to %s\n",pcmd->cmd,cmd); + if(STRCASECMP(pcmd->cmd, cmd) == 0) { + return pcmd->id; + } + + pcmd = hTabNextItemWK (pic14pCodePeepCommandsHash); + + } + + return -1; +} + +static char getpBlock_dbName(pBlock *pb) +{ + if(!pb) + return 0; + + if(pb->cmemmap) + return pb->cmemmap->dbName; + + return pb->dbName; +} + +void pBlockConvert2ISR(pBlock *pb) +{ + if(!pb) + return; + + if(pb->cmemmap) + pb->cmemmap = NULL; + + pb->dbName = 'I'; +} + +/*-----------------------------------------------------------------*/ +/* movepBlock2Head - given the dbname of a pBlock, move all */ +/* instances to the front of the doubly linked */ +/* list of pBlocks */ +/*-----------------------------------------------------------------*/ + +void movepBlock2Head(char dbName) +{ + pBlock *pb; + + if (!the_pFile) + return; + + pb = the_pFile->pbHead; + + while(pb) { + + if(getpBlock_dbName(pb) == dbName) { + pBlock *pbn = pb->next; + pb->next = the_pFile->pbHead; + the_pFile->pbHead->prev = pb; + the_pFile->pbHead = pb; + + if(pb->prev) + pb->prev->next = pbn; + + // If the pBlock that we just moved was the last + // one in the link of all of the pBlocks, then we + // need to point the tail to the block just before + // the one we moved. + // Note: if pb->next is NULL, then pb must have + // been the last pBlock in the chain. + + if(pbn) + pbn->prev = pb->prev; + else + the_pFile->pbTail = pb->prev; + + pb = pbn; + + } else + pb = pb->next; + + } + +} + +void copypCode(FILE *of, char dbName) +{ + pBlock *pb; + + if(!of || !the_pFile) + return; + + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + if(getpBlock_dbName(pb) == dbName) { + pBlockStats(of,pb); + printpBlock(of,pb); + fprintf (of, "\n"); + } + } + +} + +void resetpCodeStatistics (void) +{ + pcode_insns = pcode_doubles = 0; +} + +void dumppCodeStatistics (FILE *of) +{ + /* dump statistics */ + fprintf (of, "\n"); + fprintf (of, ";\tcode size estimation:\n"); + fprintf (of, ";\t%5u+%5u = %5u instructions (%5u byte)\n", pcode_insns, pcode_doubles, pcode_insns + pcode_doubles, 2*(pcode_insns + 2*pcode_doubles)); + fprintf (of, "\n"); +} + +void pcode_test(void) +{ + + DFPRINTF((stderr,"pcode is alive!\n")); + + //initMnemonics(); + + if(the_pFile) { + + pBlock *pb; + FILE *pFile; + char buffer[100]; + + /* create the file name */ + strcpy(buffer,dstFileName); + strcat(buffer,".p"); + + if( !(pFile = fopen(buffer, "w" ))) { + werror(E_FILE_OPEN_ERR,buffer); + exit(1); + } + + fprintf(pFile,"pcode dump\n\n"); + + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + fprintf(pFile,"\n\tNew pBlock\n\n"); + if(pb->cmemmap) + fprintf(pFile,"%s",pb->cmemmap->sname); + else + fprintf(pFile,"internal pblock"); + + fprintf(pFile,", dbName =%c\n",getpBlock_dbName(pb)); + printpBlock(pFile,pb); + } + } +} + +/*-----------------------------------------------------------------*/ +/* int RegCond(pCodeOp *pcop) - if pcop points to the STATUS reg- */ +/* ister, RegCond will return the bit being referenced. */ +/* */ +/* fixme - why not just OR in the pcop bit field */ +/*-----------------------------------------------------------------*/ + +static int RegCond(pCodeOp *pcop) +{ + + if(!pcop) + return 0; + + if (pcop->type == PO_GPR_BIT) { + char *name = pcop->name; + if (!name) + name = PCOR(pcop)->r->name; + if (strcmp(name, pc_status.pcop.name) == 0) + { + switch(PCORB(pcop)->bit) { + case PIC_C_BIT: + return PCC_C; + case PIC_DC_BIT: + return PCC_DC; + case PIC_Z_BIT: + return PCC_Z; + } + } + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* newpCode - create and return a newly initialized pCode */ +/* */ +/* fixme - rename this */ +/* */ +/* The purpose of this routine is to create a new Instruction */ +/* pCode. This is called by gen.c while the assembly code is being */ +/* generated. */ +/* */ +/* Inouts: */ +/* PIC_OPCODE op - the assembly instruction we wish to create. */ +/* (note that the op is analogous to but not the */ +/* same thing as the opcode of the instruction.) */ +/* pCdoeOp *pcop - pointer to the operand of the instruction. */ +/* */ +/* Outputs: */ +/* a pointer to the new malloc'd pCode is returned. */ +/* */ +/* */ +/* */ +/*-----------------------------------------------------------------*/ +pCode *newpCode (PIC_OPCODE op, pCodeOp *pcop) +{ + pCodeInstruction *pci ; + + if(!mnemonics_initialized) + pic14initMnemonics(); + + pci = Safe_calloc(1, sizeof(pCodeInstruction)); + + if((op>=0) && (op < MAX_PIC14MNEMONICS) && pic14Mnemonics[op]) { + memcpy(pci, pic14Mnemonics[op], sizeof(pCodeInstruction)); + pci->pc.id = PCodeID(); + pci->pcop = pcop; + + if(pci->inCond & PCC_EXAMINE_PCOP) + pci->inCond |= RegCond(pcop); + + if(pci->outCond & PCC_EXAMINE_PCOP) + pci->outCond |= RegCond(pcop); + + pci->pc.prev = pci->pc.next = NULL; + return (pCode *)pci; + } + + fprintf(stderr, "pCode mnemonic error %s,%d\n",__FUNCTION__,__LINE__); + exit(1); + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* newpCodeWild - create a "wild" as in wild card pCode */ +/* */ +/* Wild pcodes are used during the peep hole optimizer to serve */ +/* as place holders for any instruction. When a snippet of code is */ +/* compared to a peep hole rule, the wild card opcode will match */ +/* any instruction. However, the optional operand and label are */ +/* additional qualifiers that must also be matched before the */ +/* line (of assembly code) is declared matched. Note that the */ +/* operand may be wild too. */ +/* */ +/* Note, a wild instruction is specified just like a wild var: */ +/* %4 ; A wild instruction, */ +/* See the peeph.def file for additional examples */ +/* */ +/*-----------------------------------------------------------------*/ + +pCode *newpCodeWild(int pCodeID, pCodeOp *optional_operand, pCodeOp *optional_label) +{ + + pCodeWild *pcw; + + pcw = Safe_calloc(1,sizeof(pCodeWild)); + + pcw->pci.pc.type = PC_WILD; + pcw->pci.pc.prev = pcw->pci.pc.next = NULL; + pcw->id = PCodeID(); + pcw->pci.from = pcw->pci.to = pcw->pci.label = NULL; + pcw->pci.pc.pb = NULL; + + pcw->pci.pc.destruct = genericDestruct; + pcw->pci.pc.print = genericPrint; + + pcw->id = pCodeID; // this is the 'n' in %n + pcw->operand = optional_operand; + pcw->label = optional_label; + + pcw->mustBeBitSkipInst = 0; + pcw->mustNotBeBitSkipInst = 0; + pcw->invertBitSkipInst = 0; + + return ( (pCode *)pcw); + +} + +/*-----------------------------------------------------------------*/ +/* newPcodeCharP - create a new pCode from a char string */ +/*-----------------------------------------------------------------*/ + +pCode *newpCodeCharP(char *cP) +{ + + pCodeComment *pcc ; + + pcc = Safe_calloc(1,sizeof(pCodeComment)); + + pcc->pc.type = PC_COMMENT; + pcc->pc.prev = pcc->pc.next = NULL; + pcc->pc.id = PCodeID(); + //pcc->pc.from = pcc->pc.to = pcc->pc.label = NULL; + pcc->pc.pb = NULL; + + pcc->pc.destruct = genericDestruct; + pcc->pc.print = genericPrint; + + if(cP) + pcc->comment = Safe_strdup(cP); + else + pcc->comment = NULL; + + return ( (pCode *)pcc); + +} + +/*-----------------------------------------------------------------*/ +/* newpCodeFunction - */ +/*-----------------------------------------------------------------*/ + + +pCode *newpCodeFunction(char *mod,char *f,int isPublic) +{ + pCodeFunction *pcf; + + pcf = Safe_calloc(1,sizeof(pCodeFunction)); + //_ALLOC(pcf,sizeof(pCodeFunction)); + + pcf->pc.type = PC_FUNCTION; + pcf->pc.prev = pcf->pc.next = NULL; + pcf->pc.id = PCodeID(); + //pcf->pc.from = pcf->pc.to = pcf->pc.label = NULL; + pcf->pc.pb = NULL; + + pcf->pc.destruct = genericDestruct; + pcf->pc.print = pCodePrintFunction; + + pcf->ncalled = 0; + + if(mod) { + //_ALLOC_ATOMIC(pcf->modname,strlen(mod)+1); + pcf->modname = Safe_calloc(1,strlen(mod)+1); + strcpy(pcf->modname,mod); + } else + pcf->modname = NULL; + + if(f) { + //_ALLOC_ATOMIC(pcf->fname,strlen(f)+1); + pcf->fname = Safe_calloc(1,strlen(f)+1); + strcpy(pcf->fname,f); + } else + pcf->fname = NULL; + + pcf->isPublic = (unsigned)isPublic; + + return ( (pCode *)pcf); + +} + +/*-----------------------------------------------------------------*/ +/* newpCodeFlow */ +/*-----------------------------------------------------------------*/ +static void destructpCodeFlow(pCode *pc) +{ + if(!pc || !isPCFL(pc)) + return; + + /* + if(PCFL(pc)->from) + if(PCFL(pc)->to) + */ + unlinkpCode(pc); + + deleteSet(&PCFL(pc)->registers); + deleteSet(&PCFL(pc)->from); + deleteSet(&PCFL(pc)->to); + free(pc); + +} + +static pCode *newpCodeFlow(void ) +{ + pCodeFlow *pcflow; + + //_ALLOC(pcflow,sizeof(pCodeFlow)); + pcflow = Safe_calloc(1,sizeof(pCodeFlow)); + + pcflow->pc.type = PC_FLOW; + pcflow->pc.prev = pcflow->pc.next = NULL; + pcflow->pc.pb = NULL; + + pcflow->pc.destruct = destructpCodeFlow; + pcflow->pc.print = genericPrint; + + pcflow->pc.seq = GpcFlowSeq++; + + pcflow->from = pcflow->to = NULL; + + pcflow->inCond = PCC_NONE; + pcflow->outCond = PCC_NONE; + + pcflow->firstBank = 'U'; /* Undetermined */ + pcflow->lastBank = 'U'; /* Undetermined */ + + pcflow->FromConflicts = 0; + pcflow->ToConflicts = 0; + + pcflow->end = NULL; + + pcflow->registers = newSet(); + + return ( (pCode *)pcflow); + +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static pCodeFlowLink *newpCodeFlowLink(pCodeFlow *pcflow) +{ + pCodeFlowLink *pcflowLink; + + pcflowLink = Safe_calloc(1,sizeof(pCodeFlowLink)); + + pcflowLink->pcflow = pcflow; + pcflowLink->bank_conflict = 0; + + return pcflowLink; +} + +/*-----------------------------------------------------------------*/ +/* newpCodeCSource - create a new pCode Source Symbol */ +/*-----------------------------------------------------------------*/ + +pCode *newpCodeCSource(int ln, char *f, const char *l) +{ + + pCodeCSource *pccs; + + pccs = Safe_calloc(1,sizeof(pCodeCSource)); + + pccs->pc.type = PC_CSOURCE; + pccs->pc.prev = pccs->pc.next = NULL; + pccs->pc.id = PCodeID(); + pccs->pc.pb = NULL; + + pccs->pc.destruct = genericDestruct; + pccs->pc.print = genericPrint; + + pccs->line_number = ln; + if(l) + pccs->line = Safe_strdup(l); + else + pccs->line = NULL; + + if(f) + pccs->file_name = Safe_strdup(f); + else + pccs->file_name = NULL; + + return ( (pCode *)pccs); + +} + +/*******************************************************************/ +/* pic16_newpCodeAsmDir - create a new pCode Assembler Directive */ +/* added by VR 6-Jun-2003 */ +/*******************************************************************/ + +pCode *newpCodeAsmDir(char *asdir, char *argfmt, ...) +{ + pCodeAsmDir *pcad; + va_list ap; + char buffer[512]; + char *lbp=buffer; + + pcad = Safe_calloc(1, sizeof(pCodeAsmDir)); + pcad->pci.pc.type = PC_ASMDIR; + pcad->pci.pc.prev = pcad->pci.pc.next = NULL; + pcad->pci.pc.pb = NULL; + pcad->pci.pc.destruct = genericDestruct; + pcad->pci.pc.print = genericPrint; + + if(asdir && *asdir) { + + while(isspace((unsigned char)*asdir))asdir++; // strip any white space from the beginning + + pcad->directive = Safe_strdup( asdir ); + } + + va_start(ap, argfmt); + + memset(buffer, 0, sizeof(buffer)); + if(argfmt && *argfmt) + vsprintf(buffer, argfmt, ap); + + va_end(ap); + + while(isspace((unsigned char)*lbp))lbp++; + + if(lbp && *lbp) + pcad->arg = Safe_strdup( lbp ); + + return ((pCode *)pcad); +} + +/*-----------------------------------------------------------------*/ +/* pCodeLabelDestruct - free memory used by a label. */ +/*-----------------------------------------------------------------*/ +static void pCodeLabelDestruct(pCode *pc) +{ + + if(!pc) + return; + + if((pc->type == PC_LABEL) && PCL(pc)->label) + free(PCL(pc)->label); + + free(pc); + +} + +pCode *newpCodeLabel(char *name, int key) +{ + + char *s = buffer; + pCodeLabel *pcl; + + pcl = Safe_calloc(1,sizeof(pCodeLabel) ); + + pcl->pc.type = PC_LABEL; + pcl->pc.prev = pcl->pc.next = NULL; + pcl->pc.id = PCodeID(); + //pcl->pc.from = pcl->pc.to = pcl->pc.label = NULL; + pcl->pc.pb = NULL; + + pcl->pc.destruct = pCodeLabelDestruct; + pcl->pc.print = pCodePrintLabel; + + pcl->key = key; + + pcl->label = NULL; + if(key>0) { + sprintf(s,"_%05d_DS_",key); + } else + s = name; + + if(s) + pcl->label = Safe_strdup(s); + + //fprintf(stderr,"newpCodeLabel: key=%d, name=%s\n",key, ((s)?s:"")); + return ( (pCode *)pcl); + +} + + +/*-----------------------------------------------------------------*/ +/* newpBlock - create and return a pointer to a new pBlock */ +/*-----------------------------------------------------------------*/ +static pBlock *newpBlock(void) +{ + + pBlock *PpB; + + PpB = Safe_calloc(1,sizeof(pBlock) ); + PpB->next = PpB->prev = NULL; + + PpB->function_entries = PpB->function_exits = PpB->function_calls = NULL; + PpB->tregisters = NULL; + PpB->visited = 0; + PpB->FlowTree = NULL; + + return PpB; + +} + +/*-----------------------------------------------------------------*/ +/* newpCodeChain - create a new chain of pCodes */ +/*-----------------------------------------------------------------* +* +* This function will create a new pBlock and the pointer to the +* pCode that is passed in will be the first pCode in the block. +*-----------------------------------------------------------------*/ + + +pBlock *newpCodeChain(memmap *cm,char c, pCode *pc) +{ + + pBlock *pB = newpBlock(); + + pB->pcHead = pB->pcTail = pc; + pB->cmemmap = cm; + pB->dbName = c; + + return pB; +} + +/*-----------------------------------------------------------------*/ +/* newpCodeOpLabel - Create a new label given the key */ +/* Note, a negative key means that the label is part of wild card */ +/* (and hence a wild card label) used in the pCodePeep */ +/* optimizations). */ +/*-----------------------------------------------------------------*/ + +pCodeOp *newpCodeOpLabel(char *name, int key) +{ + char *s=NULL; + static int label_key=-1; + + pCodeOp *pcop; + + pcop = Safe_calloc(1,sizeof(pCodeOpLabel) ); + pcop->type = PO_LABEL; + + pcop->name = NULL; + + if(key>0) + sprintf(s=buffer,"_%05d_DS_",key); + else + s = name, key = label_key--; + + PCOLAB(pcop)->offset = 0; + if(s) + pcop->name = Safe_strdup(s); + + ((pCodeOpLabel *)pcop)->key = key; + + //fprintf(stderr,"newpCodeOpLabel: key=%d, name=%s\n",key,((s)?s:"")); + return pcop; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +pCodeOp *newpCodeOpLit(int lit) +{ + char *s = buffer; + pCodeOp *pcop; + + + pcop = Safe_calloc(1,sizeof(pCodeOpLit) ); + pcop->type = PO_LITERAL; + + pcop->name = NULL; + if(lit>=0) { + sprintf(s,"0x%02x", (unsigned char)lit); + if(s) + pcop->name = Safe_strdup(s); + } + + ((pCodeOpLit *)pcop)->lit = (unsigned char)lit; + + return pcop; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +pCodeOp *newpCodeOpImmd(char *name, int offset, int index, int code_space, int is_func) +{ + pCodeOp *pcop; + + pcop = Safe_calloc(1,sizeof(pCodeOpImmd) ); + pcop->type = PO_IMMEDIATE; + if(name) { + regs *r = NULL; + pcop->name = Safe_strdup(name); + + if(!is_func) + r = dirregWithName(name); + + PCOI(pcop)->r = r; + if(r) { + //fprintf(stderr, " newpCodeOpImmd reg %s exists\n",name); + PCOI(pcop)->rIdx = r->rIdx; + } else { + //fprintf(stderr, " newpCodeOpImmd reg %s doesn't exist\n",name); + PCOI(pcop)->rIdx = -1; + } + //fprintf(stderr,"%s %s %d\n",__FUNCTION__,name,offset); + } else { + pcop->name = NULL; + } + + PCOI(pcop)->index = index; + PCOI(pcop)->offset = offset; + PCOI(pcop)->_const = code_space; + PCOI(pcop)->_function = is_func; + + return pcop; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +pCodeOp *newpCodeOpWild(int id, pCodeWildBlock *pcwb, pCodeOp *subtype) +{ + char *s = buffer; + pCodeOp *pcop; + + + if(!pcwb || !subtype) { + fprintf(stderr, "Wild opcode declaration error: %s-%d\n",__FILE__,__LINE__); + exit(1); + } + + pcop = Safe_calloc(1,sizeof(pCodeOpWild)); + pcop->type = PO_WILD; + sprintf(s,"%%%d",id); + pcop->name = Safe_strdup(s); + + PCOW(pcop)->id = id; + PCOW(pcop)->pcwb = pcwb; + PCOW(pcop)->subtype = subtype; + PCOW(pcop)->matched = NULL; + + return pcop; +} +/*-----------------------------------------------------------------*/ +/* Find a symbol with matching name */ +/*-----------------------------------------------------------------*/ +static symbol *symFindWithName(memmap * map, const char *name) +{ + symbol *sym; + + for (sym = setFirstItem(map->syms); sym; sym = setNextItem (map->syms)) { + if (sym->rname && (strcmp(sym->rname,name)==0)) + return sym; + } + return 0; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +pCodeOp *newpCodeOpBit(char *name, int ibit, int inBitSpace) +{ + pCodeOp *pcop; + struct regs *r = 0; + + pcop = Safe_calloc(1,sizeof(pCodeOpRegBit) ); + pcop->type = PO_GPR_BIT; + + PCORB(pcop)->bit = ibit; + PCORB(pcop)->inBitSpace = inBitSpace; + + if (name) r = regFindWithName(name); + if (!r) { + // Register has not been allocated - check for symbol information + symbol *sym; + sym = symFindWithName(bit, name); + if (!sym) sym = symFindWithName(sfrbit, name); + if (!sym) sym = symFindWithName(sfr, name); + if (!sym) sym = symFindWithName(reg, name); + // Hack to fix accesses to _INTCON_bits (e.g. GIE=0), see #1579535. + // XXX: This ignores nesting levels, but works for globals... + if (!sym) sym = findSym(SymbolTab, NULL, name); + if (!sym && name && name[0] == '_') sym = findSym(SymbolTab, NULL, &name[1]); + if (sym) { + r = allocNewDirReg(sym->etype,name); + } + } + if (r) { + pcop->name = NULL; + PCOR(pcop)->r = r; + PCOR(pcop)->rIdx = r->rIdx; + } else { + pcop->name = Safe_strdup(name); + PCOR(pcop)->r = NULL; + PCOR(pcop)->rIdx = 0; + } + return pcop; +} + +/*-----------------------------------------------------------------* +* pCodeOp *newpCodeOpReg(int rIdx) - allocate a new register +* +* If rIdx >=0 then a specific register from the set of registers +* will be selected. If rIdx <0, then a new register will be searched +* for. +*-----------------------------------------------------------------*/ + +static pCodeOp *newpCodeOpReg(int rIdx) +{ + pCodeOp *pcop; + + pcop = Safe_calloc(1,sizeof(pCodeOpReg) ); + + pcop->name = NULL; + + if(rIdx >= 0) { + PCOR(pcop)->rIdx = rIdx; + PCOR(pcop)->r = pic14_regWithIdx(rIdx); + } else { + PCOR(pcop)->r = pic14_findFreeReg(REG_GPR); + + if(PCOR(pcop)->r) + PCOR(pcop)->rIdx = PCOR(pcop)->r->rIdx; + } + + if(PCOR(pcop)->r) + pcop->type = PCOR(pcop)->r->pc_type; + + return pcop; +} + +pCodeOp *newpCodeOpRegFromStr(char *name) +{ + pCodeOp *pcop; + + pcop = Safe_calloc(1,sizeof(pCodeOpReg) ); + PCOR(pcop)->r = allocRegByName(name, 1); + PCOR(pcop)->rIdx = PCOR(pcop)->r->rIdx; + pcop->type = PCOR(pcop)->r->pc_type; + pcop->name = PCOR(pcop)->r->name; + + return pcop; +} + +static pCodeOp *newpCodeOpStr(char *name) +{ + pCodeOp *pcop; + + pcop = Safe_calloc(1,sizeof(pCodeOpStr)); + pcop->type = PO_STR; + pcop->name = Safe_strdup(name); + + PCOS(pcop)->isPublic = 0; + + return pcop; +} + + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ + +pCodeOp *newpCodeOp(char *name, PIC_OPTYPE type) +{ + pCodeOp *pcop; + + switch(type) { + case PO_BIT: + case PO_GPR_BIT: + pcop = newpCodeOpBit(name, -1,0); + break; + + case PO_LITERAL: + pcop = newpCodeOpLit(-1); + break; + + case PO_LABEL: + pcop = newpCodeOpLabel(NULL,-1); + break; + + case PO_GPR_TEMP: + pcop = newpCodeOpReg(-1); + break; + + case PO_GPR_POINTER: + case PO_GPR_REGISTER: + if(name) + pcop = newpCodeOpRegFromStr(name); + else + pcop = newpCodeOpReg(-1); + break; + + case PO_STR: + pcop = newpCodeOpStr(name); + break; + + default: + pcop = Safe_calloc(1,sizeof(pCodeOp) ); + pcop->type = type; + if(name) + pcop->name = Safe_strdup(name); + else + pcop->name = NULL; + } + + return pcop; +} + +/*-----------------------------------------------------------------*/ +/* addpCode2pBlock - place the pCode into the pBlock linked list */ +/*-----------------------------------------------------------------*/ +void addpCode2pBlock(pBlock *pb, pCode *pc) +{ + + if(!pb || !pc) + return; + + if(!pb->pcHead) { + /* If this is the first pcode to be added to a block that + * was initialized with a NULL pcode, then go ahead and + * make this pcode the head and tail */ + pb->pcHead = pb->pcTail = pc; + } else { + // if(pb->pcTail) + pb->pcTail->next = pc; + + pc->prev = pb->pcTail; + pc->pb = pb; + + pb->pcTail = pc; + } +} + +/*-----------------------------------------------------------------*/ +/* addpBlock - place a pBlock into the pFile */ +/*-----------------------------------------------------------------*/ +void addpBlock(pBlock *pb) +{ + // fprintf(stderr," Adding pBlock: dbName =%c\n",getpBlock_dbName(pb)); + + if(!the_pFile) { + /* First time called, we'll pass through here. */ + //_ALLOC(the_pFile,sizeof(pFile)); + the_pFile = Safe_calloc(1,sizeof(pFile)); + the_pFile->pbHead = the_pFile->pbTail = pb; + the_pFile->functions = NULL; + return; + } + + the_pFile->pbTail->next = pb; + pb->prev = the_pFile->pbTail; + pb->next = NULL; + the_pFile->pbTail = pb; +} + +/*-----------------------------------------------------------------*/ +/* removepBlock - remove a pBlock from the pFile */ +/*-----------------------------------------------------------------*/ +static void removepBlock(pBlock *pb) +{ + pBlock *pbs; + + if(!the_pFile) + return; + + + //fprintf(stderr," Removing pBlock: dbName =%c\n",getpBlock_dbName(pb)); + + for(pbs = the_pFile->pbHead; pbs; pbs = pbs->next) { + if(pbs == pb) { + + if(pbs == the_pFile->pbHead) + the_pFile->pbHead = pbs->next; + + if (pbs == the_pFile->pbTail) + the_pFile->pbTail = pbs->prev; + + if(pbs->next) + pbs->next->prev = pbs->prev; + + if(pbs->prev) + pbs->prev->next = pbs->next; + + return; + + } + } + + fprintf(stderr, "Warning: call to %s:%s didn't find pBlock\n",__FILE__,__FUNCTION__); + +} + +/*-----------------------------------------------------------------*/ +/* printpCode - write the contents of a pCode to a file */ +/*-----------------------------------------------------------------*/ +void printpCode(FILE *of, pCode *pc) +{ + + if(!pc || !of) + return; + + if(pc->print) { + pc->print(of,pc); + return; + } + + fprintf(of,"warning - unable to print pCode\n"); +} + +/*-----------------------------------------------------------------*/ +/* printpBlock - write the contents of a pBlock to a file */ +/*-----------------------------------------------------------------*/ +void printpBlock(FILE *of, pBlock *pb) +{ + pCode *pc; + + if(!pb) + return; + + if(!of) + of = stderr; + + for(pc = pb->pcHead; pc; pc = pc->next) { + printpCode(of,pc); + + if (isPCI(pc)) + { + if (isPCI(pc) && (PCI(pc)->op == POC_PAGESEL || PCI(pc)->op == POC_BANKSEL)) { + pcode_doubles++; + } else { + pcode_insns++; + } + } + } // for + +} + +/*-----------------------------------------------------------------*/ +/* */ +/* pCode processing */ +/* */ +/* */ +/* */ +/*-----------------------------------------------------------------*/ + +void unlinkpCode(pCode *pc) +{ + + + if(pc) { +#ifdef PCODE_DEBUG + fprintf(stderr,"Unlinking: "); + printpCode(stderr, pc); +#endif + if(pc->prev) + pc->prev->next = pc->next; + if(pc->next) + pc->next->prev = pc->prev; + +#if 0 + /* RN: I believe this should be right here, but this did not + * cure the bug I was hunting... */ + /* must keep labels -- attach to following instruction */ + if (isPCI(pc) && PCI(pc)->label && pc->next) + { + pCodeInstruction *pcnext = PCI(findNextInstruction (pc->next)); + if (pcnext) + { + pBranchAppend (pcnext->label, PCI(pc)->label); + } + } +#endif + pc->prev = pc->next = NULL; + } +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ + +static void genericDestruct(pCode *pc) +{ + + unlinkpCode(pc); + + if(isPCI(pc)) { + /* For instructions, tell the register (if there's one used) + * that it's no longer needed */ + regs *reg = getRegFromInstruction(pc); + if(reg) + deleteSetItem (&(reg->reglives.usedpCodes),pc); + } + + /* Instead of deleting the memory used by this pCode, mark + * the object as bad so that if there's a pointer to this pCode + * dangling around somewhere then (hopefully) when the type is + * checked we'll catch it. + */ + + pc->type = PC_BAD; + + addpCode2pBlock(pb_dead_pcodes, pc); + + //free(pc); + +} + + +/*-----------------------------------------------------------------*/ +/* Copies the pCodeInstruction flow pointer from source pCode */ +/*-----------------------------------------------------------------*/ +static void CopyFlow(pCodeInstruction *pcd, pCode *pcs) { + pCode *p; + pCodeFlow *pcflow = 0; + for (p=pcs; p; p=p->prev) { + if (isPCI(p)) { + pcflow = PCI(p)->pcflow; + break; + } + if (isPCF(p)) { + pcflow = (pCodeFlow*)p; + break; + } + } + PCI(pcd)->pcflow = pcflow; +} + +/*-----------------------------------------------------------------*/ +/* pCodeInsertAfter - splice in the pCode chain starting with pc2 */ +/* into the pCode chain containing pc1 */ +/*-----------------------------------------------------------------*/ +void pCodeInsertAfter(pCode *pc1, pCode *pc2) +{ + + if(!pc1 || !pc2) + return; + + pc2->next = pc1->next; + if(pc1->next) + pc1->next->prev = pc2; + + pc2->pb = pc1->pb; + pc2->prev = pc1; + pc1->next = pc2; + + /* If this is an instrution type propogate the flow */ + if (isPCI(pc2)) + CopyFlow(PCI(pc2),pc1); +} + +/*------------------------------------------------------------------*/ +/* pCodeInsertBefore - splice in the pCode chain starting with pc2 */ +/* into the pCode chain containing pc1 */ +/*------------------------------------------------------------------*/ +void pCodeInsertBefore(pCode *pc1, pCode *pc2) +{ + + if(!pc1 || !pc2) + return; + + pc2->prev = pc1->prev; + if(pc1->prev) + pc1->prev->next = pc2; + + pc2->pb = pc1->pb; + pc2->next = pc1; + pc1->prev = pc2; + + /* If this is an instrution type propogate the flow */ + if (isPCI(pc2)) + CopyFlow(PCI(pc2),pc1); +} + +/*-----------------------------------------------------------------*/ +/* pCodeOpCopy - copy a pcode operator */ +/*-----------------------------------------------------------------*/ +pCodeOp *pCodeOpCopy(pCodeOp *pcop) +{ + pCodeOp *pcopnew=NULL; + + if(!pcop) + return NULL; + + switch(pcop->type) { + case PO_NONE: + case PO_STR: + pcopnew = Safe_calloc (1, sizeof (pCodeOp)); + memcpy (pcopnew, pcop, sizeof (pCodeOp)); + break; + + case PO_W: + case PO_STATUS: + case PO_FSR: + case PO_INDF: + case PO_INTCON: + case PO_GPR_REGISTER: + case PO_GPR_TEMP: + case PO_GPR_POINTER: + case PO_SFR_REGISTER: + case PO_PCL: + case PO_PCLATH: + case PO_DIR: + //DFPRINTF((stderr,"pCodeOpCopy GPR register\n")); + pcopnew = Safe_calloc(1,sizeof(pCodeOpReg) ); + memcpy (pcopnew, pcop, sizeof (pCodeOpReg)); + DFPRINTF((stderr," register index %d\n", PCOR(pcop)->r->rIdx)); + break; + + case PO_LITERAL: + //DFPRINTF((stderr,"pCodeOpCopy lit\n")); + pcopnew = Safe_calloc(1,sizeof(pCodeOpLit) ); + memcpy (pcopnew, pcop, sizeof (pCodeOpLit)); + break; + + case PO_IMMEDIATE: + pcopnew = Safe_calloc(1,sizeof(pCodeOpImmd) ); + memcpy (pcopnew, pcop, sizeof (pCodeOpImmd)); + break; + + case PO_GPR_BIT: + case PO_CRY: + case PO_BIT: + //DFPRINTF((stderr,"pCodeOpCopy bit\n")); + pcopnew = Safe_calloc(1,sizeof(pCodeOpRegBit) ); + memcpy (pcopnew, pcop, sizeof (pCodeOpRegBit)); + break; + + case PO_LABEL: + //DFPRINTF((stderr,"pCodeOpCopy label\n")); + pcopnew = Safe_calloc(1,sizeof(pCodeOpLabel) ); + memcpy (pcopnew, pcop, sizeof(pCodeOpLabel)); + break; + + case PO_WILD: + /* Here we expand the wild card into the appropriate type: */ + /* By recursively calling pCodeOpCopy */ + //DFPRINTF((stderr,"pCodeOpCopy wild\n")); + if(PCOW(pcop)->matched) + pcopnew = pCodeOpCopy(PCOW(pcop)->matched); + else { + // Probably a label + pcopnew = pCodeOpCopy(PCOW(pcop)->subtype); + pcopnew->name = Safe_strdup(PCOW(pcop)->pcwb->vars[PCOW(pcop)->id]); + //DFPRINTF((stderr,"copied a wild op named %s\n",pcopnew->name)); + } + + return pcopnew; + break; + + default: + assert ( !"unhandled pCodeOp type copied" ); + break; + } // switch + + if(pcop->name) + pcopnew->name = Safe_strdup(pcop->name); + else + pcopnew->name = NULL; + + return pcopnew; +} + +/*-----------------------------------------------------------------*/ +/* popCopyReg - copy a pcode operator */ +/*-----------------------------------------------------------------*/ +pCodeOp *popCopyReg(pCodeOpReg *pc) +{ + pCodeOpReg *pcor; + + pcor = Safe_calloc(1,sizeof(pCodeOpReg) ); + pcor->pcop.type = pc->pcop.type; + if(pc->pcop.name) { + if(!(pcor->pcop.name = Safe_strdup(pc->pcop.name))) + fprintf(stderr,"oops %s %d",__FILE__,__LINE__); + } else + pcor->pcop.name = NULL; + + if (pcor->pcop.type == PO_IMMEDIATE){ + PCOL(pcor)->lit = PCOL(pc)->lit; + } else { + pcor->r = pc->r; + pcor->rIdx = pc->rIdx; + if (pcor->r) + pcor->r->wasUsed=1; + } + //DEBUGpic14_emitcode ("; ***","%s , copying %s, rIdx=%d",__FUNCTION__,pc->pcop.name,pc->rIdx); + + return PCOP(pcor); +} + +/*-----------------------------------------------------------------*/ +/* pCodeInstructionCopy - copy a pCodeInstructionCopy */ +/*-----------------------------------------------------------------*/ +pCode *pCodeInstructionCopy(pCodeInstruction *pci,int invert) +{ + pCodeInstruction *new_pci; + + if(invert) + new_pci = PCI(newpCode(pci->inverted_op,pci->pcop)); + else + new_pci = PCI(newpCode(pci->op,pci->pcop)); + + new_pci->pc.pb = pci->pc.pb; + new_pci->from = pci->from; + new_pci->to = pci->to; + new_pci->label = pci->label; + new_pci->pcflow = pci->pcflow; + + return PCODE(new_pci); +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +void pCodeDeleteChain(pCode *f,pCode *t) +{ + pCode *pc; + + while(f && f!=t) { + DFPRINTF((stderr,"delete pCode:\n")); + pc = f->next; + //f->print(stderr,f); + //f->delete(f); this dumps core... + f = pc; + } +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +char *get_op(pCodeOp *pcop,char *buffer, size_t size) +{ + regs *r; + static char b[50]; + char *s; + int use_buffer = 1; // copy the string to the passed buffer pointer + + if(!buffer) { + buffer = b; + size = sizeof(b); + use_buffer = 0; // Don't bother copying the string to the buffer. + } + + if(pcop) { + switch(pcop->type) { + case PO_INDF: + case PO_FSR: + if(use_buffer) { + SNPRINTF(buffer,size,"%s",PCOR(pcop)->r->name); + return buffer; + } + return pcop->name; + break; + case PO_GPR_TEMP: + if (PCOR(pcop)->r->type == REG_STK) + r = typeRegWithIdx(PCOR(pcop)->r->rIdx,REG_STK,1); + else + r = pic14_regWithIdx(PCOR(pcop)->r->rIdx); + + if(use_buffer) { + SNPRINTF(buffer,size,"%s",r->name); + return buffer; + } + + return r->name; + break; + + case PO_IMMEDIATE: + s = buffer; + if(PCOI(pcop)->_const) { + + if( PCOI(pcop)->offset >= 0 && PCOI(pcop)->offset<4) { + switch(PCOI(pcop)->offset) { + case 0: + SNPRINTF(s,size,"low (%s+%d)",pcop->name, PCOI(pcop)->index); + break; + case 1: + SNPRINTF(s,size,"high (%s+%d)",pcop->name, PCOI(pcop)->index); + break; + case 2: + SNPRINTF(s,size,"0x%02x",PCOI(pcop)->_const ? GPTRTAG_CODE : GPTRTAG_DATA); + break; + default: + fprintf (stderr, "PO_IMMEDIATE/_const/offset=%d\n", PCOI(pcop)->offset); + assert ( !"offset too large" ); + SNPRINTF(s,size,"(((%s+%d) >> %d)&0xff)", + pcop->name, + PCOI(pcop)->index, + 8 * PCOI(pcop)->offset ); + } + } else + SNPRINTF(s,size,"LOW (%s+%d)",pcop->name,PCOI(pcop)->index); + } else { + if( !PCOI(pcop)->offset) { // && PCOI(pcc->pcop)->offset<4) + SNPRINTF(s,size,"(%s + %d)", + pcop->name, + PCOI(pcop)->index); + } else { + switch(PCOI(pcop)->offset) { + case 0: + SNPRINTF(s,size,"(%s + %d)",pcop->name, PCOI(pcop)->index); + break; + case 1: + SNPRINTF(s,size,"high (%s + %d)",pcop->name, PCOI(pcop)->index); + break; + case 2: + SNPRINTF(s,size,"0x%02x",PCOI(pcop)->_const ? GPTRTAG_CODE : GPTRTAG_DATA); + break; + default: + fprintf (stderr, "PO_IMMEDIATE/mutable/offset=%d\n", PCOI(pcop)->offset); + assert ( !"offset too large" ); + SNPRINTF(s,size,"((%s + %d) >> %d)&0xff",pcop->name, PCOI(pcop)->index, 8*PCOI(pcop)->offset); + break; + } + } + } + return buffer; + break; + + case PO_DIR: + s = buffer; + if( PCOR(pcop)->instance) { + SNPRINTF(s,size,"(%s + %d)", + pcop->name, + PCOR(pcop)->instance ); + } else + SNPRINTF(s,size,"%s",pcop->name); + return buffer; + break; + + case PO_LABEL: + s = buffer; + if (pcop->name) { + if(PCOLAB(pcop)->offset == 1) + SNPRINTF(s,size,"HIGH(%s)",pcop->name); + else + SNPRINTF(s,size,"%s",pcop->name); + } + return buffer; + break; + + case PO_GPR_BIT: + if(PCOR(pcop)->r) { + if(use_buffer) { + SNPRINTF(buffer,size,"%s",PCOR(pcop)->r->name); + return buffer; + } + return PCOR(pcop)->r->name; + } + /* fall through to the default case */ + + default: + if(pcop->name) { + if(use_buffer) { + SNPRINTF(buffer,size,"%s",pcop->name); + return buffer; + } + return pcop->name; + } + } + } + + printf("PIC port internal warning: (%s:%d(%s)) %s not found\n", + __FILE__, __LINE__, __FUNCTION__, + pCodeOpType(pcop)); + + return "NO operand"; + +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static char *get_op_from_instruction( pCodeInstruction *pcc) +{ + + if(pcc) + return get_op(pcc->pcop,NULL,0); + + return ("ERROR Null: get_op_from_instruction"); + +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void pCodeOpPrint(FILE *of, pCodeOp *pcop) +{ + fprintf(of,"pcodeopprint- not implemented\n"); +} + +/*-----------------------------------------------------------------*/ +/* pCode2str - convert a pCode instruction to string */ +/*-----------------------------------------------------------------*/ +char *pCode2str(char *str, size_t size, pCode *pc) +{ + char *s = str; + + switch(pc->type) { + + case PC_OPCODE: + + SNPRINTF(s,size, "\t%s\t", PCI(pc)->mnemonic); + size -= strlen(s); + s += strlen(s); + + if( (PCI(pc)->num_ops >= 1) && (PCI(pc)->pcop)) { + if(PCI(pc)->isBitInst) { + if(PCI(pc)->pcop->type == PO_GPR_BIT) { + char *name = PCI(pc)->pcop->name; + if (!name) + name = PCOR(PCI(pc)->pcop)->r->name; + if( (((pCodeOpRegBit *)(PCI(pc)->pcop))->inBitSpace) ) + SNPRINTF(s,size,"(%s >> 3), (%s & 7)", name, name); + else + SNPRINTF(s,size,"%s,%d", name, (((pCodeOpRegBit *)(PCI(pc)->pcop))->bit)&7); + } else if(PCI(pc)->pcop->type == PO_GPR_BIT) { + SNPRINTF(s,size,"%s,%d", get_op_from_instruction(PCI(pc)),PCORB(PCI(pc)->pcop)->bit); + } else + SNPRINTF(s,size,"%s,0 ; ?bug", get_op_from_instruction(PCI(pc))); + } else { + if(PCI(pc)->pcop->type == PO_GPR_BIT) { + if( PCI(pc)->num_ops == 2) + SNPRINTF(s,size,"(%s >> 3),%c",get_op_from_instruction(PCI(pc)),((PCI(pc)->isModReg) ? 'F':'W')); + else + SNPRINTF(s,size,"(1 << (%s & 7))",get_op_from_instruction(PCI(pc))); + } else { + SNPRINTF(s,size,"%s",get_op_from_instruction(PCI(pc))); + size -= strlen(s); + s += strlen(s); + if( PCI(pc)->num_ops == 2) + SNPRINTF(s,size,",%c", ( (PCI(pc)->isModReg) ? 'F':'W')); + } + } + } + break; + + case PC_COMMENT: + /* assuming that comment ends with a \n */ + SNPRINTF(s,size,";%s", ((pCodeComment *)pc)->comment); + break; + + case PC_INLINE: + /* assuming that inline code ends with a \n */ + SNPRINTF(s,size,"%s", ((pCodeComment *)pc)->comment); + break; + + case PC_LABEL: + SNPRINTF(s,size,";label=%s, key=%d\n",PCL(pc)->label,PCL(pc)->key); + break; + case PC_FUNCTION: + SNPRINTF(s,size,";modname=%s,function=%s: id=%d\n",PCF(pc)->modname,PCF(pc)->fname); + break; + case PC_WILD: + SNPRINTF(s,size,";\tWild opcode: id=%d\n",PCW(pc)->id); + break; + case PC_FLOW: + SNPRINTF(s,size,";\t--FLOW change\n"); + break; + case PC_CSOURCE: + SNPRINTF(s,size,"%s\t.line\t%d; \"%s\"\t%s\n",(options.debug?"":";"),PCCS(pc)->line_number, PCCS(pc)->file_name, PCCS(pc)->line); + break; + case PC_ASMDIR: + if(PCAD(pc)->directive) { + SNPRINTF(s,size,"\t%s%s%s\n", PCAD(pc)->directive, PCAD(pc)->arg?"\t":"", PCAD(pc)->arg?PCAD(pc)->arg:""); + } else if(PCAD(pc)->arg) { + /* special case to handle inline labels without a tab */ + SNPRINTF(s,size,"%s\n", PCAD(pc)->arg); + } + break; + + case PC_BAD: + SNPRINTF(s,size,";A bad pCode is being used\n"); + } + + return str; +} + +/*-----------------------------------------------------------------*/ +/* genericPrint - the contents of a pCode to a file */ +/*-----------------------------------------------------------------*/ +static void genericPrint(FILE *of, pCode *pc) +{ + if(!pc || !of) + return; + + switch(pc->type) { + case PC_COMMENT: + fprintf(of,";%s\n", ((pCodeComment *)pc)->comment); + break; + + case PC_INLINE: + fprintf(of,"%s\n", ((pCodeComment *)pc)->comment); + break; + + case PC_OPCODE: + // If the opcode has a label, print that first + { + char str[256]; + pCodeInstruction *pci = PCI(pc); + pBranch *pbl = pci->label; + while(pbl && pbl->pc) { + if(pbl->pc->type == PC_LABEL) + pCodePrintLabel(of, pbl->pc); + pbl = pbl->next; + } + + if(pci->cline) + genericPrint(of,PCODE(pci->cline)); + + + pCode2str(str, 256, pc); + + fprintf(of,"%s",str); + + /* Debug */ + if(debug_verbose) { + pCodeOpReg *pcor = PCOR(pci->pcop); + fprintf(of, "\t;id=%u,key=%03x,inCond:%x,outCond:%x",pc->id,pc->seq, pci->inCond, pci->outCond); + if(pci->pcflow) + fprintf(of,",flow seq=%03x",pci->pcflow->pc.seq); + if (pcor && pcor->pcop.type==PO_GPR_TEMP && !pcor->r->isFixed) + fprintf(of,",rIdx=r0x%X",pcor->rIdx); + } + } + fprintf(of,"\n"); + break; + + case PC_WILD: + fprintf(of,";\tWild opcode: id=%d\n",PCW(pc)->id); + if(PCW(pc)->pci.label) + pCodePrintLabel(of, PCW(pc)->pci.label->pc); + + if(PCW(pc)->operand) { + fprintf(of,";\toperand "); + pCodeOpPrint(of,PCW(pc)->operand ); + } + break; + + case PC_FLOW: + if(debug_verbose) { + fprintf(of,";<>Start of new flow, seq=0x%x",pc->seq); + if(PCFL(pc)->ancestor) + fprintf(of," ancestor = 0x%x", PCODE(PCFL(pc)->ancestor)->seq); + fprintf(of,"\n"); + fprintf(of,"; from: "); + { + pCodeFlowLink *link; + for (link = setFirstItem(PCFL(pc)->from); link; link = setNextItem (PCFL(pc)->from)) + { + fprintf(of,"%03x ",link->pcflow->pc.seq); + } + } + fprintf(of,"; to: "); + { + pCodeFlowLink *link; + for (link = setFirstItem(PCFL(pc)->to); link; link = setNextItem (PCFL(pc)->to)) + { + fprintf(of,"%03x ",link->pcflow->pc.seq); + } + } + fprintf(of,"\n"); + } + break; + + case PC_CSOURCE: + fprintf(of,"%s\t.line\t%d; \"%s\"\t%s\n", (options.debug?"":";"), PCCS(pc)->line_number, PCCS(pc)->file_name, PCCS(pc)->line); + break; + + case PC_ASMDIR: + { + pBranch *pbl = PCAD(pc)->pci.label; + while(pbl && pbl->pc) { + if(pbl->pc->type == PC_LABEL) + pCodePrintLabel(of, pbl->pc); + pbl = pbl->next; + } + } + if(PCAD(pc)->directive) { + fprintf(of, "\t%s%s%s\n", PCAD(pc)->directive, PCAD(pc)->arg?"\t":"", PCAD(pc)->arg?PCAD(pc)->arg:""); + } else + if(PCAD(pc)->arg) { + /* special case to handle inline labels without tab */ + fprintf(of, "%s\n", PCAD(pc)->arg); + } + break; + + case PC_LABEL: + default: + fprintf(of,"unknown pCode type %d\n",pc->type); + } +} + +/*-----------------------------------------------------------------*/ +/* pCodePrintFunction - prints function begin/end */ +/*-----------------------------------------------------------------*/ + +static void pCodePrintFunction(FILE *of, pCode *pc) +{ + + if(!pc || !of) + return; + + if( ((pCodeFunction *)pc)->modname) + fprintf(of,"F_%s",((pCodeFunction *)pc)->modname); + + if(PCF(pc)->fname) { + pBranch *exits = PCF(pc)->to; + int i=0; + fprintf(of,"%s\t;Function start\n",PCF(pc)->fname); + while(exits) { + i++; + exits = exits->next; + } + //if(i) i--; + fprintf(of,"; %d exit point%c\n",i, ((i==1) ? ' ':'s')); + + }else { + if((PCF(pc)->from && + PCF(pc)->from->pc->type == PC_FUNCTION && + PCF(PCF(pc)->from->pc)->fname) ) + fprintf(of,"; exit point of %s\n",PCF(PCF(pc)->from->pc)->fname); + else + fprintf(of,"; exit point [can't find entry point]\n"); + } +} + +/*-----------------------------------------------------------------*/ +/* pCodePrintLabel - prints label */ +/*-----------------------------------------------------------------*/ + +static void pCodePrintLabel(FILE *of, pCode *pc) +{ + + if(!pc || !of) + return; + + if(PCL(pc)->label) + fprintf(of,"%s\n",PCL(pc)->label); + else if (PCL(pc)->key >=0) + fprintf(of,"_%05d_DS_:\n",PCL(pc)->key); + else + fprintf(of,";wild card label: id=%d\n",-PCL(pc)->key); + +} + +/*-----------------------------------------------------------------*/ +/* unlinkpCodeFromBranch - Search for a label in a pBranch and */ +/* remove it if it is found. */ +/*-----------------------------------------------------------------*/ +static void unlinkpCodeFromBranch(pCode *pcl , pCode *pc) +{ + pBranch *b, *bprev; + + bprev = NULL; + + if(pcl->type == PC_OPCODE || pcl->type == PC_INLINE || pcl->type == PC_ASMDIR) + b = PCI(pcl)->label; + else { + fprintf(stderr, "LINE %d. can't unlink from non opcode\n",__LINE__); + exit(1); + } + + //fprintf (stderr, "%s \n",__FUNCTION__); + //pcl->print(stderr,pcl); + //pc->print(stderr,pc); + while(b) { + if(b->pc == pc) { + //fprintf (stderr, "found label\n"); + + /* Found a label */ + if(bprev) { + bprev->next = b->next; /* Not first pCode in chain */ + free(b); + } else { + pc->destruct(pc); + PCI(pcl)->label = b->next; /* First pCode in chain */ + free(b); + } + return; /* A label can't occur more than once */ + } + bprev = b; + b = b->next; + } +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +pBranch * pBranchAppend(pBranch *h, pBranch *n) +{ + pBranch *b; + + if(!h) + return n; + + if(h == n) + return n; + + b = h; + while(b->next) + b = b->next; + + b->next = n; + + return h; + +} + +/*-----------------------------------------------------------------*/ +/* pBranchLink - given two pcodes, this function will link them */ +/* together through their pBranches */ +/*-----------------------------------------------------------------*/ +static void pBranchLink(pCodeFunction *f, pCodeFunction *t) +{ + pBranch *b; + + // Declare a new branch object for the 'from' pCode. + + //_ALLOC(b,sizeof(pBranch)); + b = Safe_calloc(1,sizeof(pBranch)); + b->pc = PCODE(t); // The link to the 'to' pCode. + b->next = NULL; + + f->to = pBranchAppend(f->to,b); + + // Now do the same for the 'to' pCode. + + //_ALLOC(b,sizeof(pBranch)); + b = Safe_calloc(1,sizeof(pBranch)); + b->pc = PCODE(f); + b->next = NULL; + + t->from = pBranchAppend(t->from,b); + +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static int compareLabel(pCode *pc, pCodeOpLabel *pcop_label) +{ + pBranch *pbr; + + if(pc->type == PC_LABEL) { + if( ((pCodeLabel *)pc)->key == pcop_label->key) + return TRUE; + } + if(pc->type == PC_OPCODE || pc->type == PC_ASMDIR) { + pbr = PCI(pc)->label; + while(pbr) { + if(pbr->pc->type == PC_LABEL) { + if( ((pCodeLabel *)(pbr->pc))->key == pcop_label->key) + return TRUE; + } + pbr = pbr->next; + } + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static int checkLabel(pCode *pc) +{ + pBranch *pbr; + + if(pc && isPCI(pc)) { + pbr = PCI(pc)->label; + while(pbr) { + if(isPCL(pbr->pc) && (PCL(pbr->pc)->key >= 0)) + return TRUE; + + pbr = pbr->next; + } + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* findLabelinpBlock - Search the pCode for a particular label */ +/*-----------------------------------------------------------------*/ +static pCode * findLabelinpBlock(pBlock *pb,pCodeOpLabel *pcop_label) +{ + pCode *pc; + + if(!pb) + return NULL; + + for(pc = pb->pcHead; pc; pc = pc->next) + if(compareLabel(pc,pcop_label)) + return pc; + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* findNextpCode - given a pCode, find the next of type 'pct' */ +/* in the linked list */ +/*-----------------------------------------------------------------*/ +pCode * findNextpCode(pCode *pc, PC_TYPE pct) +{ + + while(pc) { + if(pc->type == pct) + return pc; + + pc = pc->next; + } + + return NULL; +} + +#if 0 +/*-----------------------------------------------------------------*/ +/* findPrevpCode - given a pCode, find the previous of type 'pct' */ +/* in the linked list */ +/*-----------------------------------------------------------------*/ +static pCode * findPrevpCode(pCode *pc, PC_TYPE pct) +{ + + while(pc) { + if(pc->type == pct) { + /* + static unsigned int stop; + if (pc->id == 524) + stop++; // Place break point here + */ + return pc; + } + + pc = pc->prev; + } + + return NULL; +} +#endif + +/*-----------------------------------------------------------------*/ +/* findNextInstruction - given a pCode, find the next instruction */ +/* in the linked list */ +/*-----------------------------------------------------------------*/ +pCode * findNextInstruction(pCode *pci) +{ + pCode *pc = pci; + + while(pc) { + if((pc->type == PC_OPCODE) + || (pc->type == PC_WILD) + || (pc->type == PC_ASMDIR)) + return pc; + +#ifdef PCODE_DEBUG + fprintf(stderr,"findNextInstruction: "); + printpCode(stderr, pc); +#endif + pc = pc->next; + } + + //fprintf(stderr,"Couldn't find instruction\n"); + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* findNextInstruction - given a pCode, find the next instruction */ +/* in the linked list */ +/*-----------------------------------------------------------------*/ +pCode * findPrevInstruction(pCode *pci) +{ + pCode *pc = pci; + + while(pc) { + + if((pc->type == PC_OPCODE) + || (pc->type == PC_WILD) + || (pc->type == PC_ASMDIR)) + return pc; + + +#ifdef PCODE_DEBUG + fprintf(stderr,"pic16_findPrevInstruction: "); + printpCode(stderr, pc); +#endif + pc = pc->prev; + } + + //fprintf(stderr,"Couldn't find instruction\n"); + return NULL; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +regs * getRegFromInstruction(pCode *pc) +{ + regs *r; + if(!pc || + !isPCI(pc) || + !PCI(pc)->pcop || + PCI(pc)->num_ops == 0 ) + return NULL; + + switch(PCI(pc)->pcop->type) { + case PO_STATUS: + case PO_FSR: + case PO_INDF: + case PO_INTCON: + case PO_BIT: + case PO_GPR_TEMP: + case PO_SFR_REGISTER: + case PO_PCL: + case PO_PCLATH: + return PCOR(PCI(pc)->pcop)->r; + + case PO_GPR_REGISTER: + case PO_GPR_BIT: + case PO_DIR: + r = PCOR(PCI(pc)->pcop)->r; + if (r) + return r; + return dirregWithName(PCI(pc)->pcop->name); + + case PO_LITERAL: + break; + + case PO_IMMEDIATE: + r = PCOI(PCI(pc)->pcop)->r; + if (r) + return r; + return dirregWithName(PCI(pc)->pcop->name); + + default: + break; + } + + return NULL; + +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ + +static void AnalyzepBlock(pBlock *pb) +{ + pCode *pc; + + if(!pb) + return; + + /* Find all of the registers used in this pBlock + * by looking at each instruction and examining it's + * operands + */ + for(pc = pb->pcHead; pc; pc = pc->next) { + + /* Is this an instruction with operands? */ + if(pc->type == PC_OPCODE && PCI(pc)->pcop) { + + if((PCI(pc)->pcop->type == PO_GPR_TEMP) + || ((PCI(pc)->pcop->type == PO_GPR_BIT) && PCOR(PCI(pc)->pcop)->r && (PCOR(PCI(pc)->pcop)->r->pc_type == PO_GPR_TEMP))) { + + /* Loop through all of the registers declared so far in + this block and see if we find this one there */ + + regs *r = setFirstItem(pb->tregisters); + + while(r) { + if((r->rIdx == PCOR(PCI(pc)->pcop)->r->rIdx) && (r->type == PCOR(PCI(pc)->pcop)->r->type)) { + PCOR(PCI(pc)->pcop)->r = r; + break; + } + r = setNextItem(pb->tregisters); + } + + if(!r) { + /* register wasn't found */ + //r = Safe_calloc(1, sizeof(regs)); + //memcpy(r,PCOR(PCI(pc)->pcop)->r, sizeof(regs)); + //addSet(&pb->tregisters, r); + addSet(&pb->tregisters, PCOR(PCI(pc)->pcop)->r); + //PCOR(PCI(pc)->pcop)->r = r; + //fprintf(stderr,"added register to pblock: reg %d\n",r->rIdx); + }/* else + fprintf(stderr,"found register in pblock: reg %d\n",r->rIdx); + */ + } + if(PCI(pc)->pcop->type == PO_GPR_REGISTER) { + if(PCOR(PCI(pc)->pcop)->r) { + pic14_allocWithIdx (PCOR(PCI(pc)->pcop)->r->rIdx); + DFPRINTF((stderr,"found register in pblock: reg 0x%x\n",PCOR(PCI(pc)->pcop)->r->rIdx)); + } else { + if(PCI(pc)->pcop->name) + fprintf(stderr,"ERROR: %s is a NULL register\n",PCI(pc)->pcop->name ); + else + fprintf(stderr,"ERROR: NULL register\n"); + } + } + } + + + } +} + +/*-----------------------------------------------------------------*/ +/* */ +/*-----------------------------------------------------------------*/ +static void InsertpFlow(pCode *pc, pCode **pflow) +{ + if(*pflow) + PCFL(*pflow)->end = pc; + + if(!pc || !pc->next) + return; + + *pflow = newpCodeFlow(); + pCodeInsertAfter(pc, *pflow); +} + +/*-----------------------------------------------------------------*/ +/* BuildFlow(pBlock *pb) - examine the code in a pBlock and build */ +/* the flow blocks. */ +/* +* BuildFlow inserts pCodeFlow objects into the pCode chain at each +* point the instruction flow changes. +*/ +/*-----------------------------------------------------------------*/ +static void BuildFlow(pBlock *pb) +{ + pCode *pc; + pCode *last_pci=NULL; + pCode *pflow=NULL; + int seq = 0; + + if(!pb) + return; + + //fprintf (stderr,"build flow start seq %d ",GpcFlowSeq); + /* Insert a pCodeFlow object at the beginning of a pBlock */ + + InsertpFlow(pb->pcHead, &pflow); + + //pflow = newpCodeFlow(); /* Create a new Flow object */ + //pflow->next = pb->pcHead; /* Make the current head the next object */ + //pb->pcHead->prev = pflow; /* let the current head point back to the flow object */ + //pb->pcHead = pflow; /* Make the Flow object the head */ + //pflow->pb = pb; + + for( pc = findNextInstruction(pb->pcHead); + pc != NULL; + pc=findNextInstruction(pc)) { + + pc->seq = seq++; + PCI(pc)->pcflow = PCFL(pflow); + + //fprintf(stderr," build: "); + //pc->print(stderr, pc); + //pflow->print(stderr,pflow); + + if (checkLabel(pc)) { + + /* This instruction marks the beginning of a + * new flow segment */ + + pc->seq = 0; + seq = 1; + + /* If the previous pCode is not a flow object, then + * insert a new flow object. (This check prevents + * two consecutive flow objects from being insert in + * the case where a skip instruction preceeds an + * instruction containing a label.) */ + + last_pci = findPrevInstruction (pc->prev); + + if(last_pci && (PCI(last_pci)->pcflow == PCFL(pflow))) + InsertpFlow(last_pci, &pflow); + + PCI(pc)->pcflow = PCFL(pflow); + + } + + if(isPCI_SKIP(pc)) { + + /* The two instructions immediately following this one + * mark the beginning of a new flow segment */ + + while(pc && isPCI_SKIP(pc)) { + + PCI(pc)->pcflow = PCFL(pflow); + pc->seq = seq-1; + seq = 1; + + InsertpFlow(pc, &pflow); + pc=findNextInstruction(pc->next); + } + + seq = 0; + + if(!pc) + break; + + PCI(pc)->pcflow = PCFL(pflow); + pc->seq = 0; + InsertpFlow(pc, &pflow); + + } else if ( isPCI_BRANCH(pc) && !checkLabel(findNextInstruction(pc->next))) { + + InsertpFlow(pc, &pflow); + seq = 0; + + } + + last_pci = pc; + pc = pc->next; + } + + //fprintf (stderr,",end seq %d",GpcFlowSeq); + if(pflow) + PCFL(pflow)->end = pb->pcTail; +} + +/*-------------------------------------------------------------------*/ +/* unBuildFlow(pBlock *pb) - examine the code in a pBlock and build */ +/* the flow blocks. */ +/* +* unBuildFlow removes pCodeFlow objects from a pCode chain +*/ +/*-----------------------------------------------------------------*/ +static void unBuildFlow(pBlock *pb) +{ + pCode *pc,*pcnext; + + if(!pb) + return; + + pc = pb->pcHead; + + while(pc) { + pcnext = pc->next; + + if(isPCI(pc)) { + + pc->seq = 0; + if(PCI(pc)->pcflow) { + //free(PCI(pc)->pcflow); + PCI(pc)->pcflow = NULL; + } + + } else if(isPCFL(pc) ) + pc->destruct(pc); + + pc = pcnext; + } + + +} + +#if 0 +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void dumpCond(int cond) +{ + + static char *pcc_str[] = { + //"PCC_NONE", + "PCC_REGISTER", + "PCC_C", + "PCC_Z", + "PCC_DC", + "PCC_W", + "PCC_EXAMINE_PCOP", + "PCC_REG_BANK0", + "PCC_REG_BANK1", + "PCC_REG_BANK2", + "PCC_REG_BANK3" + }; + + int ncond = sizeof(pcc_str) / sizeof(char *); + int i,j; + + fprintf(stderr, "0x%04X\n",cond); + + for(i=0,j=1; ipc.seq); + + pc = findNextpCode(PCODE(pcflow), PC_OPCODE); + + if(!pc) { + fprintf(stderr, " FlowStats - empty flow (seq=%d)\n", pcflow->pc.seq); + return; + } + + + fprintf(stderr, " FlowStats inCond: "); + dumpCond(pcflow->inCond); + fprintf(stderr, " FlowStats outCond: "); + dumpCond(pcflow->outCond); + +} +#endif + +/*-----------------------------------------------------------------* +* int isBankInstruction(pCode *pc) - examine the pCode *pc to determine +* if it affects the banking bits. +* +* return: -1 == Banking bits are unaffected by this pCode. +* +* return: > 0 == Banking bits are affected. +* +* If the banking bits are affected, then the returned value describes +* which bits are affected and how they're affected. The lower half +* of the integer maps to the bits that are affected, the upper half +* to whether they're set or cleared. +* +*-----------------------------------------------------------------*/ +/* +static int isBankInstruction(pCode *pc) +{ + regs *reg; + int bank = -1; + + if(!isPCI(pc)) + return -1; + + if( ( (reg = getRegFromInstruction(pc)) != NULL) && isSTATUS_REG(reg)) { + + // Check to see if the register banks are changing + if(PCI(pc)->isModReg) { + + pCodeOp *pcop = PCI(pc)->pcop; + switch(PCI(pc)->op) { + + case POC_BSF: + if(PCORB(pcop)->bit == PIC_RP0_BIT) { + //fprintf(stderr, " isBankInstruction - Set RP0\n"); + return SET_BANK_BIT | PIC_RP0_BIT; + } + + if(PCORB(pcop)->bit == PIC_RP1_BIT) { + //fprintf(stderr, " isBankInstruction - Set RP1\n"); + return CLR_BANK_BIT | PIC_RP0_BIT; + } + break; + + case POC_BCF: + if(PCORB(pcop)->bit == PIC_RP0_BIT) { + //fprintf(stderr, " isBankInstruction - Clr RP0\n"); + return CLR_BANK_BIT | PIC_RP1_BIT; + } + if(PCORB(pcop)->bit == PIC_RP1_BIT) { + //fprintf(stderr, " isBankInstruction - Clr RP1\n"); + return CLR_BANK_BIT | PIC_RP1_BIT; + } + break; + default: + //fprintf(stderr, " isBankInstruction - Status register is getting Modified by:\n"); + //genericPrint(stderr, pc); + ; + } + } + + } + + return bank; +} +*/ + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +/* +static void FillFlow(pCodeFlow *pcflow) +{ + pCode *pc; + int cur_bank; + + if(!isPCFL(pcflow)) + return; + + // fprintf(stderr, " FillFlow - flow block (seq=%d)\n", pcflow->pc.seq); + + pc = findNextpCode(PCODE(pcflow), PC_OPCODE); + + if(!pc) { + //fprintf(stderr, " FillFlow - empty flow (seq=%d)\n", pcflow->pc.seq); + return; + } + + cur_bank = -1; + + do { + isBankInstruction(pc); + pc = pc->next; + } while (pc && (pc != pcflow->end) && !isPCFL(pc)); + / * + if(!pc ) { + fprintf(stderr, " FillFlow - Bad end of flow\n"); + } else { + fprintf(stderr, " FillFlow - Ending flow with\n "); + pc->print(stderr,pc); + } + + fprintf(stderr, " FillFlow inCond: "); + dumpCond(pcflow->inCond); + fprintf(stderr, " FillFlow outCond: "); + dumpCond(pcflow->outCond); + * / +} +*/ + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void LinkFlow_pCode(pCodeInstruction *from, pCodeInstruction *to) +{ + pCodeFlowLink *fromLink, *toLink; +#if 0 + fprintf(stderr, "%s: linking ", __FUNCTION__ ); + if (from) from->pc.print(stderr, &from->pc); + else fprintf(stderr, "(null)"); + fprintf(stderr, " -(%u)-> with -(%u)-> ", + from && from->pcflow ? from->pcflow->pc.seq : 0, + to && to->pcflow ? to->pcflow->pc.seq : 0); + if (to) to->pc.print(stderr, &to->pc); + else fprintf(stderr, "(null)"); +#endif + + if(!from || !to || !to->pcflow || !from->pcflow) + return; + + fromLink = newpCodeFlowLink(from->pcflow); + toLink = newpCodeFlowLink(to->pcflow); + + addSetIfnotP(&(from->pcflow->to), toLink); //to->pcflow); + addSetIfnotP(&(to->pcflow->from), fromLink); //from->pcflow); + +} + +/*-----------------------------------------------------------------* +* void LinkFlow(pBlock *pb) +* +* In BuildFlow, the PIC code has been partitioned into contiguous +* non-branching segments. In LinkFlow, we determine the execution +* order of these segments. For example, if one of the segments ends +* with a skip, then we know that there are two possible flow segments +* to which control may be passed. +*-----------------------------------------------------------------*/ +static void LinkFlow(pBlock *pb) +{ + pCode *pc=NULL; + pCode *pcflow; + pCode *pct; + + //fprintf(stderr,"linkflow \n"); + + if (!pb) return; + + for( pcflow = findNextpCode(pb->pcHead, PC_FLOW); + pcflow != NULL; + pcflow = findNextpCode(pcflow->next, PC_FLOW) ) { + + if(!isPCFL(pcflow)) + fprintf(stderr, "LinkFlow - pcflow is not a flow object "); + + //fprintf(stderr," link: "); + //pcflow->print(stderr,pcflow); + + //FillFlow(PCFL(pcflow)); + + /* find last instruction in flow */ + pc = findPrevInstruction (PCFL(pcflow)->end); + if (!pc) { + fprintf(stderr, "%s: flow without end (%u)?\n", + __FUNCTION__, pcflow->seq ); + continue; + } + + //fprintf(stderr, "LinkFlow - flow block (seq=%d) ", pcflow->seq); + //pc->print(stderr, pc); + if(isPCI_SKIP(pc)) { + //fprintf(stderr, "ends with skip\n"); + //pc->print(stderr,pc); + pct=findNextInstruction(pc->next); + LinkFlow_pCode(PCI(pc),PCI(pct)); + pct=findNextInstruction(pct->next); + LinkFlow_pCode(PCI(pc),PCI(pct)); + continue; + } + + if(isPCI_BRANCH(pc)) { + pCodeOpLabel *pcol = PCOLAB(PCI(pc)->pcop); + + //fprintf(stderr, "ends with branch\n "); + //pc->print(stderr,pc); + + if(!(pcol && isPCOLAB(pcol))) { + if((PCI(pc)->op != POC_RETLW) + && (PCI(pc)->op != POC_RETURN) + && (PCI(pc)->op != POC_CALL) + && (PCI(pc)->op != POC_RETFIE) ) + { + pc->print(stderr,pc); + fprintf(stderr, "ERROR: %s, branch instruction doesn't have label\n",__FUNCTION__); + } + } else { + + if( (pct = findLabelinpBlock(pb,pcol)) != NULL) + LinkFlow_pCode(PCI(pc),PCI(pct)); + else + fprintf(stderr, "ERROR: %s, couldn't find label. key=%d,lab=%s\n", + __FUNCTION__,pcol->key,((PCOP(pcol)->name)?PCOP(pcol)->name:"-")); + //fprintf(stderr,"newpCodeOpLabel: key=%d, name=%s\n",key,((s)?s:"")); + } + /* link CALLs to next instruction */ + if (PCI(pc)->op != POC_CALL) continue; + } + + if(isPCI(pc)) { + //fprintf(stderr, "ends with non-branching instruction:\n"); + //pc->print(stderr,pc); + + LinkFlow_pCode(PCI(pc),PCI(findNextInstruction(pc->next))); + + continue; + } + + if(pc) { + //fprintf(stderr, "ends with unknown\n"); + //pc->print(stderr,pc); + continue; + } + + fprintf(stderr, "ends with nothing: ERROR\n"); + + } +} + +static void pCodeReplace (pCode *old, pCode *new) +{ + pCodeInsertAfter (old, new); + + /* special handling for pCodeInstructions */ + if (isPCI(new) && isPCI(old)) + { + //assert (!PCI(new)->from && !PCI(new)->to && !PCI(new)->label && /*!PCI(new)->pcflow && */!PCI(new)->cline); + PCI(new)->from = PCI(old)->from; + PCI(new)->to = PCI(old)->to; + PCI(new)->label = PCI(old)->label; + PCI(new)->pcflow = PCI(old)->pcflow; + PCI(new)->cline = PCI(old)->cline; + } // if + + old->destruct (old); +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void addpCodeComment(pCode *pc, const char *fmt, ...) +{ + va_list ap; + char buffer[4096]; + pCode *newpc; + + va_start(ap, fmt); + if (options.verbose || debug_verbose) { + buffer[0] = ';'; + buffer[1] = ' '; + vsprintf(&buffer[2], fmt, ap); + + newpc = newpCodeCharP(&buffer[0]); // strdup's the string + pCodeInsertAfter(pc, newpc); + } + va_end(ap); +} + +/*-----------------------------------------------------------------*/ +/* Inserts a new pCodeInstruction before an existing one */ +/*-----------------------------------------------------------------*/ +static void insertPCodeInstruction(pCodeInstruction *pci, pCodeInstruction *new_pci) +{ + pCode *pcprev; + + pcprev = findPrevInstruction(pci->pc.prev); + + pCodeInsertAfter(pci->pc.prev, &new_pci->pc); + + /* Move the label, if there is one */ + + if(pci->label) { + new_pci->label = pci->label; + pci->label = NULL; + } + + /* Move the C code comment, if there is one */ + + if(pci->cline) { + new_pci->cline = pci->cline; + pci->cline = NULL; + } + + /* The new instruction has the same pcflow block */ + new_pci->pcflow = pci->pcflow; + + /* Arrrrg: is pci's previous instruction is a skip, we need to + * change that into a jump (over pci and the new instruction) ... */ + if (pcprev && isPCI_SKIP(pcprev)) + { + symbol *lbl = newiTempLabel (NULL); + pCode *label = newpCodeLabel (NULL, lbl->key); + pCode *jump = newpCode(POC_GOTO, newpCodeOpLabel(NULL, lbl->key)); + + pCodeInsertAfter (pcprev, jump); + + // Yuck: Cannot simply replace INCFSZ/INCFSZW/DECFSZ/DECFSZW + // We replace them with INCF/INCFW/DECF/DECFW followed by 'BTFSS STATUS, Z' + switch (PCI(pcprev)->op) { + case POC_INCFSZ: + case POC_INCFSZW: + case POC_DECFSZ: + case POC_DECFSZW: + // These are turned into non-skipping instructions, so + // insert 'BTFSC STATUS, Z' after pcprev + pCodeInsertAfter (jump->prev, newpCode(POC_BTFSC, popCopyGPR2Bit(PCOP(&pc_status), PIC_Z_BIT))); + break; + default: + // no special actions required + break; + } + pCodeReplace (pcprev, pCodeInstructionCopy (PCI(pcprev), 1)); + pcprev = NULL; + pCodeInsertAfter((pCode*)pci, label); + pBlockMergeLabels(pci->pc.pb); + } +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static int insertBankSel(pCodeInstruction *pci, const char *name) +{ + pCode *new_pc; + + pCodeOp *pcop; + + // Never BANKSEL STATUS, this breaks all kinds of code (e.g., interrupt handlers). + if (!strcmp("STATUS", name) || !strcmp("_STATUS", name)) return 0; + + pcop = popCopyReg(PCOR(pci->pcop)); + pcop->type = PO_GPR_REGISTER; // Sometimes the type is set to legacy 8051 - so override it + if (pcop->name == 0) + pcop->name = strdup(name); + new_pc = newpCode(POC_BANKSEL, pcop); + + insertPCodeInstruction(pci, PCI(new_pc)); + return 1; +} + +/* + * isValidIdChar - check if c may be present in an identifier + */ +static int isValidIdChar (char c) +{ + if (c >= 'a' && c <= 'z') return 1; + if (c >= 'A' && c <= 'Z') return 1; + if (c >= '0' && c <= '9') return 1; + if (c == '_') return 1; + return 0; +} + +/* + * bankcompare - check if two operand string refer to the same register + * This functions handles NAME and (NAME + x) in both operands. + * Returns 1 on same register, 0 on different (or unknown) registers. + */ +static int bankCompare(const char *op1, const char *op2) +{ + int i; + + if (!op1 && !op2) return 0; // both unknown, might be different though! + if (!op1 || !op2) return 0; + + // find start of operand name + while (op1[0] == '(' || op1[0] == ' ') op1++; + while (op2[0] == '(' || op2[0] == ' ') op2++; + + // compare till first non-identifier character + for (i = 0; (op1[i] == op2[i]) && isValidIdChar(op1[i]); i++); + if (!isValidIdChar(op1[i]) && !isValidIdChar(op2[i])) return 1; + + // play safe---assume different operands + return 0; +} + +/* + * Interface to BANKSEL generation. + * This function should return != 0 iff str1 and str2 denote operands that + * are known to be allocated into the same bank. Consequently, there will + * be no BANKSEL emitted if str2 is accessed while str1 has been used to + * select the current bank just previously. + * + * If in doubt, return 0. + */ +static int +pic14_operandsAllocatedInSameBank(const char *str1, const char *str2) { + // see glue.c(pic14printLocals) + + if (getenv("SDCC_PIC14_SPLIT_LOCALS")) { + // no clustering applied, each register resides in its own bank + } else { + // check whether BOTH names are local registers + // XXX: This is some kind of shortcut, should be safe... + // In this model, all r0xXXXX are allocated into a single section + // per file, so no BANKSEL required if accessing a r0xXXXX after a + // (different) r0xXXXX. Works great for multi-byte operands. + if (str1 && str2 && str1[0] == 'r' && str2[0] == 'r') return (1); + } // if + + // assume operands in different banks + return (0); +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static int sameBank(regs *reg, regs *previous_reg, const char *new_bank, const char *cur_bank, unsigned max_mask) +{ + if (!cur_bank) return 0; + + if (previous_reg && reg && previous_reg->isFixed && reg->isFixed && ((previous_reg->address & max_mask) == (reg->address & max_mask))) // only if exists + return 1; // if we have address info, we use it for banksel optimization + + // regard '(regname + X)' and '(regname + Y)' as equal + if (reg && reg->name && bankCompare(reg->name, cur_bank)) return 1; + if (new_bank && bankCompare(new_bank, cur_bank)) return 1; + + // check allocation policy from glue.c + if (reg && reg->name && pic14_operandsAllocatedInSameBank(reg->name, cur_bank)) return 1; + if (new_bank && pic14_operandsAllocatedInSameBank(new_bank, cur_bank)) return 1; + + // seems to be a different operand--might be a different bank + //printf ("BANKSEL from %s to %s/%s\n", cur_bank, reg->name, new_bank); + return 0; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void FixRegisterBanking(pBlock *pb) +{ + pCode *pc; + pCodeInstruction *pci; + regs *reg; + regs *previous_reg; // contains the previous variable access info + const char *cur_bank, *new_bank; + unsigned cur_mask, new_mask, max_mask; + int allRAMmshared; + + if (!pb) return; + + max_mask = pic14_getPIC()->bankMask; + cur_mask = max_mask; + cur_bank = NULL; + previous_reg = NULL; + + allRAMmshared = pic14_allRAMShared(); + + for (pc = pb->pcHead; pc; pc = pc->next) + { + // this one has a label---might check bank at all jumps here... + if (isPCI(pc) && (PCI(pc)->label || PCI(pc)->op == POC_CALL)) { + addpCodeComment(pc->prev, "BANKOPT3 drop assumptions: PCI with label or call found"); + previous_reg = NULL; + cur_bank = NULL; // start new flow + cur_mask = max_mask; + } + + // this one is/might be a label or BANKSEL---assume nothing + if (isPCL(pc) || isPCASMDIR(pc)) { + addpCodeComment(pc->prev, "BANKOPT4 drop assumptions: label or ASMDIR found"); + previous_reg = NULL; + cur_bank = NULL; + cur_mask = max_mask; + } + + // this one modifies STATUS + // XXX: this should be checked, but usually BANKSELs are not done this way in generated code + + if (isPCI(pc)) { + pci = PCI(pc); + if ((pci->inCond | pci->outCond) & PCC_REGISTER) { + // might need a BANKSEL + reg = getRegFromInstruction(pc); + + if (reg) { + new_bank = reg->name; + // reg->alias == 0: reg is in only one bank, we do not know which (may be any bank) + // reg->alias != 0: reg is in 2/4/8/2**N banks, we select one of them + new_mask = reg->alias; + } else if (pci->pcop && pci->pcop->name) { + new_bank = pci->pcop->name; + new_mask = 0; // unknown, assume worst case + } else { + assert(!"Could not get register from instruction."); + new_bank = "UNKNOWN"; + new_mask = 0; // unknown, assume worst case + } + + // optimizations... + // XXX: add switch to disable these + if (1) { + // reg present in all banks possibly selected? + if (new_mask == max_mask || (cur_mask && ((new_mask & cur_mask) == cur_mask))) { + // no BANKSEL required + addpCodeComment(pc->prev, "BANKOPT1 BANKSEL dropped; %s present in all of %s's banks", new_bank, cur_bank); + continue; + } + + // only one bank of memory and no SFR accessed? + // XXX: We can do better with fixed registers. + if (allRAMmshared && reg && (reg->type != REG_SFR) && (!reg->isFixed)) { + // no BANKSEL required + addpCodeComment(pc->prev, "BANKOPT1b BANKSEL dropped; %s present in all (of %s's) banks", new_bank, cur_bank); + continue; + } + + if (sameBank(reg, previous_reg, new_bank, cur_bank, max_mask)) { + // no BANKSEL required + addpCodeComment(pc->prev, "BANKOPT2 BANKSEL dropped; %s present in same bank as %s", new_bank, cur_bank); + continue; + } + } // if + + if (insertBankSel(pci, new_bank)) { + cur_mask = new_mask; + cur_bank = new_bank; + previous_reg = reg; + } // if + } // if + } // if + } // for +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static int OptimizepBlock(pBlock *pb) +{ + pCode *pc, *pcprev; + int matches =0; + + if(!pb || options.nopeep) + return 0; + + DFPRINTF((stderr," Optimizing pBlock: %c\n",getpBlock_dbName(pb))); + /* + for(pc = pb->pcHead; pc; pc = pc->next) + matches += pCodePeepMatchRule(pc); + */ + + pc = findNextInstruction(pb->pcHead); + if(!pc) + return 0; + + pcprev = pc->prev; + do { + + + if(pCodePeepMatchRule(pc)) { + + matches++; + + if(pcprev) + pc = findNextInstruction(pcprev->next); + else + pc = findNextInstruction(pb->pcHead); + } else + pc = findNextInstruction(pc->next); + } while(pc); + + if(matches) + DFPRINTF((stderr," Optimizing pBlock: %c - matches=%d\n",getpBlock_dbName(pb),matches)); + return matches; + +} + +/*-----------------------------------------------------------------*/ +/* pBlockRemoveUnusedLabels - remove the pCode labels from the */ +/*-----------------------------------------------------------------*/ +static pCode * findInstructionUsingLabel(pCodeLabel *pcl, pCode *pcs) +{ + pCode *pc; + + for(pc = pcs; pc; pc = pc->next) { + + if(((pc->type == PC_OPCODE) || (pc->type == PC_INLINE) || (pc->type == PC_ASMDIR)) && + (PCI(pc)->pcop) && + (PCI(pc)->pcop->type == PO_LABEL) && + (PCOLAB(PCI(pc)->pcop)->key == pcl->key)) + return pc; + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void exchangeLabels(pCodeLabel *pcl, pCode *pc) +{ + + char *s=NULL; + + if(isPCI(pc) && + (PCI(pc)->pcop) && + (PCI(pc)->pcop->type == PO_LABEL)) { + + pCodeOpLabel *pcol = PCOLAB(PCI(pc)->pcop); + + //fprintf(stderr,"changing label key from %d to %d\n",pcol->key, pcl->key); + if(pcol->pcop.name) + free(pcol->pcop.name); + + /* If the key is negative, then we (probably) have a label to + * a function and the name is already defined */ + + if(pcl->key>0) + sprintf(s=buffer,"_%05d_DS_",pcl->key); + else + s = pcl->label; + + //sprintf(buffer,"_%05d_DS_",pcl->key); + if(!s) { + fprintf(stderr, "ERROR %s:%d function label is null\n",__FUNCTION__,__LINE__); + } + pcol->pcop.name = Safe_strdup(s); + pcol->key = pcl->key; + //pc->print(stderr,pc); + + } + + +} + +/*-----------------------------------------------------------------*/ +/* pBlockRemoveUnusedLabels - remove the pCode labels from the */ +/* pCode chain if they're not used. */ +/*-----------------------------------------------------------------*/ +static void pBlockRemoveUnusedLabels(pBlock *pb) +{ + pCode *pc; pCodeLabel *pcl; + + if(!pb || !pb->pcHead) + return; + + for(pc = pb->pcHead; (pc=findNextInstruction(pc->next)) != NULL; ) { + + pBranch *pbr = PCI(pc)->label; + if(pbr && pbr->next) { + pCode *pcd = pb->pcHead; + + //fprintf(stderr, "multiple labels\n"); + //pc->print(stderr,pc); + + pbr = pbr->next; + while(pbr) { + + while ( (pcd = findInstructionUsingLabel(PCL(PCI(pc)->label->pc), pcd)) != NULL) { + //fprintf(stderr,"Used by:\n"); + //pcd->print(stderr,pcd); + + exchangeLabels(PCL(pbr->pc),pcd); + + pcd = pcd->next; + } + pbr = pbr->next; + } + } + } + + for(pc = pb->pcHead; pc; pc = pc->next) { + + if(isPCL(pc)) // Label pcode + pcl = PCL(pc); + else if (isPCI(pc) && PCI(pc)->label) // pcode instruction with a label + pcl = PCL(PCI(pc)->label->pc); + else continue; + + //fprintf(stderr," found A LABEL !!! key = %d, %s\n", pcl->key,pcl->label); + + /* This pCode is a label, so search the pBlock to see if anyone + * refers to it */ + + if( (pcl->key>0) && (!findInstructionUsingLabel(pcl, pb->pcHead))) { + /* Couldn't find an instruction that refers to this label + * So, unlink the pCode label from it's pCode chain + * and destroy the label */ + //fprintf(stderr," removed A LABEL !!! key = %d, %s\n", pcl->key,pcl->label); + + DFPRINTF((stderr," !!! REMOVED A LABEL !!! key = %d, %s\n", pcl->key,pcl->label)); + if(pc->type == PC_LABEL) { + unlinkpCode(pc); + pCodeLabelDestruct(pc); + } else { + unlinkpCodeFromBranch(pc, PCODE(pcl)); + /*if(pc->label->next == NULL && pc->label->pc == NULL) { + free(pc->label); + }*/ + } + + } + } + +} + + +/*-----------------------------------------------------------------*/ +/* pBlockMergeLabels - remove the pCode labels from the pCode */ +/* chain and put them into pBranches that are */ +/* associated with the appropriate pCode */ +/* instructions. */ +/*-----------------------------------------------------------------*/ +void pBlockMergeLabels(pBlock *pb) +{ + pBranch *pbr; + pCode *pc, *pcnext=NULL; + + if(!pb) + return; + + /* First, Try to remove any unused labels */ + //pBlockRemoveUnusedLabels(pb); + + /* Now loop through the pBlock and merge the labels with the opcodes */ + + pc = pb->pcHead; + + while(pc) { + pCode *pcn = pc->next; + + if(pc->type == PC_LABEL) { + + //fprintf(stderr," checking merging label %s\n",PCL(pc)->label); + //fprintf(stderr,"Checking label key = %d\n",PCL(pc)->key); + if((pcnext = findNextInstruction(pc) )) { + + // Unlink the pCode label from it's pCode chain + unlinkpCode(pc); + + //fprintf(stderr,"Merged label key = %d\n",PCL(pc)->key); + // And link it into the instruction's pBranch labels. (Note, since + // it's possible to have multiple labels associated with one instruction + // we must provide a means to accomodate the additional labels. Thus + // the labels are placed into the singly-linked list "label" as + // opposed to being a single member of the pCodeInstruction.) + + //_ALLOC(pbr,sizeof(pBranch)); + pbr = Safe_calloc(1,sizeof(pBranch)); + pbr->pc = pc; + pbr->next = NULL; + + PCI(pcnext)->label = pBranchAppend(PCI(pcnext)->label,pbr); + + } else { + fprintf(stderr, "WARNING: couldn't associate label %s with an instruction\n",PCL(pc)->label); + } + } else if(pc->type == PC_CSOURCE) { + + /* merge the source line symbolic info into the next instruction */ + if((pcnext = findNextInstruction(pc) )) { + + // Unlink the pCode label from it's pCode chain + unlinkpCode(pc); + PCI(pcnext)->cline = PCCS(pc); + //fprintf(stderr, "merging CSRC\n"); + //genericPrint(stderr,pcnext); + } + + } + pc = pcn; + } + pBlockRemoveUnusedLabels(pb); + +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static int OptimizepCode(char dbName) +{ +#define MAX_PASSES 4 + + int matches = 0; + int passes = 0; + pBlock *pb; + + if(!the_pFile) + return 0; + + DFPRINTF((stderr," Optimizing pCode\n")); + + do { + matches = 0; + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + if('*' == dbName || getpBlock_dbName(pb) == dbName) + matches += OptimizepBlock(pb); + } + } + while(matches && ++passes < MAX_PASSES); + + return matches; +} + +/*-----------------------------------------------------------------*/ +/* popCopyGPR2Bit - copy a pcode operator */ +/*-----------------------------------------------------------------*/ + +pCodeOp *popCopyGPR2Bit(pCodeOp *pc, int bitval) +{ + pCodeOp *pcop; + + pcop = newpCodeOpBit(pc->name, bitval, 0); + + if( !( (pcop->type == PO_LABEL) || + (pcop->type == PO_LITERAL) || + (pcop->type == PO_STR) )) + PCOR(pcop)->r = PCOR(pc)->r; /* This is dangerous... */ + + return pcop; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void pBlockDestruct(pBlock *pb) +{ + + if(!pb) + return; + + + free(pb); + +} + +/*-----------------------------------------------------------------*/ +/* void mergepBlocks(char dbName) - Search for all pBlocks with the*/ +/* name dbName and combine them */ +/* into one block */ +/*-----------------------------------------------------------------*/ +static void mergepBlocks(char dbName) +{ + + pBlock *pb, *pbmerged = NULL,*pbn; + + pb = the_pFile->pbHead; + + //fprintf(stderr," merging blocks named %c\n",dbName); + while(pb) { + + pbn = pb->next; + //fprintf(stderr,"looking at %c\n",getpBlock_dbName(pb)); + if( getpBlock_dbName(pb) == dbName) { + + //fprintf(stderr," merged block %c\n",dbName); + + if(!pbmerged) { + pbmerged = pb; + } else { + addpCode2pBlock(pbmerged, pb->pcHead); + /* addpCode2pBlock doesn't handle the tail: */ + pbmerged->pcTail = pb->pcTail; + + pb->prev->next = pbn; + if(pbn) + pbn->prev = pb->prev; + + + pBlockDestruct(pb); + } + //printpBlock(stderr, pbmerged); + } + pb = pbn; + } + +} + +/*-----------------------------------------------------------------*/ +/* AnalyzeFlow - Examine the flow of the code and optimize */ +/* */ +/* level 0 == minimal optimization */ +/* optimize registers that are used only by two instructions */ +/* level 1 == maximal optimization */ +/* optimize by looking at pairs of instructions that use the */ +/* register. */ +/*-----------------------------------------------------------------*/ + +static void AnalyzeFlow(int level) +{ + static int times_called=0; + + pBlock *pb; + + if(!the_pFile) + return; + + + /* if this is not the first time this function has been called, + then clean up old flow information */ + if(times_called++) { + for(pb = the_pFile->pbHead; pb; pb = pb->next) + unBuildFlow(pb); + + RegsUnMapLiveRanges(); + + } + + GpcFlowSeq = 1; + + /* Phase 2 - Flow Analysis - Register Banking + * + * In this phase, the individual flow blocks are examined + * and register banking is fixed. + */ + + //for(pb = the_pFile->pbHead; pb; pb = pb->next) + //FixRegisterBanking(pb); + + /* Phase 2 - Flow Analysis + * + * In this phase, the pCode is partition into pCodeFlow + * blocks. The flow blocks mark the points where a continuous + * stream of instructions changes flow (e.g. because of + * a call or goto or whatever). + */ + + for(pb = the_pFile->pbHead; pb; pb = pb->next) + BuildFlow(pb); + + + /* Phase 2 - Flow Analysis - linking flow blocks + * + * In this phase, the individual flow blocks are examined + * to determine their order of excution. + */ + + for(pb = the_pFile->pbHead; pb; pb = pb->next) + LinkFlow(pb); + + /* Phase 3 - Flow Analysis - Flow Tree + * + * In this phase, the individual flow blocks are examined + * to determine their order of excution. + */ + + for(pb = the_pFile->pbHead; pb; pb = pb->next) + BuildFlowTree(pb); + + + /* Phase x - Flow Analysis - Used Banks + * + * In this phase, the individual flow blocks are examined + * to determine the Register Banks they use + */ + +// for(pb = the_pFile->pbHead; pb; pb = pb->next) +// FixBankFlow(pb); + + + for(pb = the_pFile->pbHead; pb; pb = pb->next) + pCodeRegMapLiveRanges(pb); + + RemoveUnusedRegisters(); + +// for(pb = the_pFile->pbHead; pb; pb = pb->next) + pCodeRegOptimizeRegUsage(level); + + OptimizepCode('*'); + + /* + for(pb = the_pFile->pbHead; pb; pb = pb->next) + DumpFlow(pb); + */ + /* debug stuff */ + /* + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + pCode *pcflow; + for( pcflow = findNextpCode(pb->pcHead, PC_FLOW); + (pcflow = findNextpCode(pcflow, PC_FLOW)) != NULL; + pcflow = pcflow->next) { + + FillFlow(PCFL(pcflow)); + } + } + */ + /* + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + pCode *pcflow; + for( pcflow = findNextpCode(pb->pcHead, PC_FLOW); + (pcflow = findNextpCode(pcflow, PC_FLOW)) != NULL; + pcflow = pcflow->next) { + + FlowStats(PCFL(pcflow)); + } + } + */ +} + +/*-----------------------------------------------------------------*/ +/* AnalyzeBanking - Called after the memory addresses have been */ +/* assigned to the registers. */ +/* */ +/*-----------------------------------------------------------------*/ + +void AnalyzeBanking(void) +{ + pBlock *pb; + + if(!picIsInitialized()) { + werror(E_FILE_OPEN_ERR, "no memory size is known for this processor"); + exit(1); + } + + if (!the_pFile) return; + + /* Phase x - Flow Analysis - Used Banks + * + * In this phase, the individual flow blocks are examined + * to determine the Register Banks they use + */ + + AnalyzeFlow(0); + AnalyzeFlow(1); + + for(pb = the_pFile->pbHead; pb; pb = pb->next) + FixRegisterBanking(pb); + + AnalyzeFlow(0); + AnalyzeFlow(1); + +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static DEFSETFUNC (resetrIdx) +{ + regs *r = (regs *)item; + if (!r->isFixed) { + r->rIdx = 0; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* InitRegReuse - Initialises variables for code analyzer */ +/*-----------------------------------------------------------------*/ +static void InitReuseReg(void) +{ + /* Find end of statically allocated variables for start idx */ + /* Start from begining of GPR. Note may not be 0x20 on some PICs */ + /* XXX: Avoid clashes with fixed registers, start late. */ + unsigned maxIdx = 0x1000; + regs *r; + for (r = setFirstItem(dynDirectRegs); r; r = setNextItem(dynDirectRegs)) { + if (r->type != REG_SFR) { + maxIdx += r->size; /* Increment for all statically allocated variables */ + } + } + peakIdx = maxIdx; + applyToSet(dynAllocRegs,resetrIdx); /* Reset all rIdx to zero. */ +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static unsigned +register_reassign(pBlock *pb, unsigned startIdx, unsigned level) +{ + pCode *pc; + unsigned temp; + unsigned idx = startIdx; + + /* check recursion */ + pc = setFirstItem(pb->function_entries); + if (!pc) + return idx; + + if (pb->visited) + { + set *regset; + /* TODO: Recursion detection missing, should emit a warning as recursive code will fail. */ + + // Find the highest rIdx used by this function for return. + regset = pb->tregisters; + idx = 0; + while (regset) + { + temp = ((regs *)regset->item)->rIdx; + if (temp > idx) + idx = temp; + regset = regset->next; + } // while + DFPRINTF((stderr, + "%*s(%u) function \"%s\" already visited: max idx = %04x\n", + 4 * level, "", level,PCF(pc)->fname, idx)); + return idx + 1; + } // if + + /* + * We now traverse the call tree depth first, assigning indices > startIdx + * to the registers of all called functions before assigning indices to + * the registers of the calling function, starting with one greater than + * the max. index used by any child function. + * This approach guarantees that, if f calls g, all registers of f have + * greater indices than those of g (also holds transitively). + * + * XXX: If a function f calls a function g in a different module, + * we should handle the case that g could call a function h + * in f's module. + * The consequence of this is that even though f and h might + * share registers (they do not call each other locally) when + * looking only at f's module, they actually must not do so! + * + * For a non-static function f, let ES(f) be the set of functions + * (including f) that can only be reached via f in the module-local + * call graph (ES(f) will hence be a subgraph). + * Let further REG(ES(f)) be the set of registers assigned to + * functions in ES(f). + * Then we should make sure that REG(ES(f)) and REG(ES(g)) are + * disjoint for all non-static functions f and g. + * + * Unfortunately, determining the sets ES(f) is non-trivial, + * so we ignore this problem and declare all modules non-reentrant. + * This is a bug. + */ + pb->visited = 1; + + DFPRINTF((stderr, + "%*s(%u) reassigning registers for functions called by \"%s\":base idx = %04x\n", + 4 * level, "", level, PCF(pc)->fname, startIdx)); + + for (pc = setFirstItem(pb->function_calls); pc; pc = setNextItem(pb->function_calls)) + { + if (pc->type == PC_OPCODE && PCI(pc)->op == POC_CALL) + { + char *dest = get_op_from_instruction(PCI(pc)); + pCode *pcn = findFunction(dest); + + if (pcn) + { + /* + * Reassign the registers of all called functions and record + * the max. index I used by any child function --> I+1 will be + * the first index available to this function. + * (Problem shown with regression test src/regression/sub2.c) + */ + unsigned childsMaxIdx; + childsMaxIdx = register_reassign(pcn->pb,startIdx,level+1); + if (childsMaxIdx > idx) + idx = childsMaxIdx; + } // if + } // if + } // for + + pc = setFirstItem(pb->function_entries); + DFPRINTF((stderr, + "%*s(%u) reassigning registers for function \"%s\":idx = %04x\n", + 4 * level, "", level, PCF(pc)->fname, idx)); + + if (pb->tregisters) + { + regs *r; + for (r = setFirstItem(pb->tregisters); r; r = setNextItem(pb->tregisters)) + { + if ((r->type == REG_GPR) && (!r->isFixed) && (r->rIdx < (int)idx)) + { + char s[20]; + set *regset; + /* + * Make sure, idx is not yet used in this routine ... + * XXX: This should no longer be required, as all functions + * are reassigned at most once ... + */ + do + { + regset = pb->tregisters; + // do not touch s->curr ==> outer loop! + while (regset && ((regs *)regset->item)->rIdx != idx) + regset = regset->next; + if (regset) + idx++; + } + while (regset); + r->rIdx = idx++; + if (peakIdx < idx) + peakIdx = idx; + sprintf(s,"r0x%02X", r->rIdx); + DFPRINTF((stderr, + "%*s(%u) reassigning register %p \"%s\" to \"%s\"\n", + 4 * level, "", level, r, r->name, s)); + free(r->name); + r->name = Safe_strdup(s); + } // if + } // for + } // if + + /* return lowest index available for caller's registers */ + return idx; +} + +/*------------------------------------------------------------------*/ +/* ReuseReg were call tree permits */ +/* */ +/* Re-allocate the GPR for optimum reuse for a given pblock */ +/* eg if a function m() calls function f1() and f2(), where f1 */ +/* allocates a local variable vf1 and f2 allocates a local */ +/* variable vf2. Then providing f1 and f2 do not call each other */ +/* they may share the same general purpose registers for vf1 and */ +/* vf2. */ +/* This is done by first setting the the regs rIdx to start after */ +/* all the global variables, then walking through the call tree */ +/* renaming the registers to match their new idx and incrementng */ +/* it as it goes. If a function has already been called it will */ +/* only rename the registers if it has already used up those */ +/* registers ie rIdx of the function's registers is lower than the */ +/* current rIdx. That way the register will not be reused while */ +/* still being used by an eariler function call. */ +/* */ +/* Note for this to work the functions need to be declared static. */ +/* */ +/*------------------------------------------------------------------*/ +void +ReuseReg(void) +{ + pBlock *pb; + + if (options.noOverlay || !the_pFile) + return; + + InitReuseReg(); + + for(pb = the_pFile->pbHead; pb; pb = pb->next) + { + /* Non static functions can be called from other modules, + * so their registers must reassign */ + if (pb->function_entries + && (PCF(setFirstItem(pb->function_entries))->isPublic || !pb->visited)) + { + register_reassign(pb,peakIdx,0); + } // if + } // for +} + +/*-----------------------------------------------------------------*/ +/* buildCallTree - look at the flow and extract all of the calls */ +/* */ +/*-----------------------------------------------------------------*/ + +static void buildCallTree(void) +{ + pBranch *pbr; + pBlock *pb; + pCode *pc; + + if(!the_pFile) + return; + + /* Now build the call tree. + First we examine all of the pCodes for functions. + Keep in mind that the function boundaries coincide + with pBlock boundaries. + + The algorithm goes something like this: + We have two nested loops. The outer loop iterates + through all of the pBlocks/functions. The inner + loop iterates through all of the pCodes for + a given pBlock. When we begin iterating through + a pBlock, the variable pc_fstart, pCode of the start + of a function, is cleared. We then search for pCodes + of type PC_FUNCTION. When one is encountered, we + initialize pc_fstart to this and at the same time + associate a new pBranch object that signifies a + branch entry. If a return is found, then this signifies + a function exit point. We'll link the pCodes of these + returns to the matching pc_fstart. + + When we're done, a doubly linked list of pBranches + will exist. The head of this list is stored in + `the_pFile', which is the meta structure for all + of the pCode. Look at the printCallTree function + on how the pBranches are linked together. + */ + + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + pCode *pc_fstart=NULL; + for(pc = pb->pcHead; pc; pc = pc->next) { + if(isPCF(pc)) { + pCodeFunction *pcf = PCF(pc); + if (pcf->fname) { + + if(STRCASECMP(pcf->fname, "_main") == 0) { + //fprintf(stderr," found main \n"); + pb->cmemmap = NULL; /* FIXME do we need to free ? */ + pb->dbName = 'M'; + } + + pbr = Safe_calloc(1,sizeof(pBranch)); + pbr->pc = pc_fstart = pc; + pbr->next = NULL; + + the_pFile->functions = pBranchAppend(the_pFile->functions,pbr); + + // Here's a better way of doing the same: + addSet(&pb->function_entries, pc); + + } else { + // Found an exit point in a function, e.g. return + // (Note, there may be more than one return per function) + if(pc_fstart) + pBranchLink(PCF(pc_fstart), pcf); + + addSet(&pb->function_exits, pc); + } + } else if(isCALL(pc)) { + addSet(&pb->function_calls,pc); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* AnalyzepCode - parse the pCode that has been generated and form */ +/* all of the logical connections. */ +/* */ +/* Essentially what's done here is that the pCode flow is */ +/* determined. */ +/*-----------------------------------------------------------------*/ + +void AnalyzepCode(char dbName) +{ + pBlock *pb; + int i,changes; + + if(!the_pFile) + return; + + mergepBlocks('D'); + + + /* Phase 1 - Register allocation and peep hole optimization + * + * The first part of the analysis is to determine the registers + * that are used in the pCode. Once that is done, the peep rules + * are applied to the code. We continue to loop until no more + * peep rule optimizations are found (or until we exceed the + * MAX_PASSES threshold). + * + * When done, the required registers will be determined. + * + */ + i = 0; + do { + + DFPRINTF((stderr," Analyzing pCode: PASS #%d\n",i+1)); + + /* First, merge the labels with the instructions */ + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + if('*' == dbName || getpBlock_dbName(pb) == dbName) { + + DFPRINTF((stderr," analyze and merging block %c\n",dbName)); + pBlockMergeLabels(pb); + AnalyzepBlock(pb); + } else { + DFPRINTF((stderr," skipping block analysis dbName=%c blockname=%c\n",dbName,getpBlock_dbName(pb))); + } + } + + changes = OptimizepCode(dbName); + + } while(changes && (i++ < MAX_PASSES)); + + buildCallTree(); +} + +/*-----------------------------------------------------------------*/ +/* findFunction - Search for a function by name (given the name) */ +/* in the set of all functions that are in a pBlock */ +/* (note - I expect this to change because I'm planning to limit */ +/* pBlock's to just one function declaration */ +/*-----------------------------------------------------------------*/ +static pCode *findFunction(char *fname) +{ + pBlock *pb; + pCode *pc; + if(!fname) + return NULL; + + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + + pc = setFirstItem(pb->function_entries); + while(pc) { + + if((pc->type == PC_FUNCTION) && + (PCF(pc)->fname) && + (strcmp(fname, PCF(pc)->fname)==0)) + return pc; + + pc = setNextItem(pb->function_entries); + + } + + } + return NULL; +} + +static void pBlockStats(FILE *of, pBlock *pb) +{ + + pCode *pc; + regs *r; + + fprintf(of,";***\n; pBlock Stats: dbName = %c\n;***\n",getpBlock_dbName(pb)); + + // for now just print the first element of each set + pc = setFirstItem(pb->function_entries); + if(pc) { + fprintf(of,";entry: "); + pc->print(of,pc); + } + pc = setFirstItem(pb->function_exits); + if(pc) { + fprintf(of,";has an exit\n"); + //pc->print(of,pc); + } + + pc = setFirstItem(pb->function_calls); + if(pc) { + fprintf(of,";functions called:\n"); + + while(pc) { + if(pc->type == PC_OPCODE && PCI(pc)->op == POC_CALL) { + fprintf(of,"; %s\n",get_op_from_instruction(PCI(pc))); + } + pc = setNextItem(pb->function_calls); + } + } + + r = setFirstItem(pb->tregisters); + if(r) { + int n = elementsInSet(pb->tregisters); + + fprintf(of,";%d compiler assigned register%c:\n",n, ( (n!=1) ? 's' : ' ')); + + while (r) { + fprintf(of,"; %s\n",r->name); + r = setNextItem(pb->tregisters); + } + } +} + +#if 0 +/*-----------------------------------------------------------------*/ +/* printCallTree - writes the call tree to a file */ +/* */ +/*-----------------------------------------------------------------*/ +static void pct2(FILE *of,pBlock *pb,int indent) +{ + pCode *pc,*pcn; + int i; + // set *registersInCallPath = NULL; + + if(!of) + return; + + if(indent > 10) + return; //recursion ? + + pc = setFirstItem(pb->function_entries); + + if(!pc) + return; + + pb->visited = 0; + + for(i=0;itype == PC_FUNCTION) + fprintf(of,"%s\n",PCF(pc)->fname); + else + return; // ??? + + + pc = setFirstItem(pb->function_calls); + for( ; pc; pc = setNextItem(pb->function_calls)) { + + if(pc->type == PC_OPCODE && PCI(pc)->op == POC_CALL) { + char *dest = get_op_from_instruction(PCI(pc)); + + pcn = findFunction(dest); + if(pcn) + pct2(of,pcn->pb,indent+1); + } else + fprintf(of,"BUG? pCode isn't a POC_CALL %d\n",__LINE__); + + } + + +} +#endif + +#if 0 +/*-----------------------------------------------------------------*/ +/* ispCodeFunction - returns true if *pc is the pCode of a */ +/* function */ +/*-----------------------------------------------------------------*/ +static bool ispCodeFunction(pCode *pc) +{ + + if(pc && pc->type == PC_FUNCTION && PCF(pc)->fname) + return 1; + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* printCallTree - writes the call tree to a file */ +/* */ +/*-----------------------------------------------------------------*/ + +static void printCallTree(FILE *of) +{ + pBranch *pbr; + pBlock *pb; + pCode *pc; + + if(!the_pFile) + return; + + if(!of) + of = stderr; + + fprintf(of, "\npBlock statistics\n"); + for(pb = the_pFile->pbHead; pb; pb = pb->next ) + pBlockStats(of,pb); + + + + fprintf(of,"Call Tree\n"); + pbr = the_pFile->functions; + while(pbr) { + if(pbr->pc) { + pc = pbr->pc; + if(!ispCodeFunction(pc)) + fprintf(of,"bug in call tree"); + + + fprintf(of,"Function: %s\n", PCF(pc)->fname); + + while(pc->next && !ispCodeFunction(pc->next)) { + pc = pc->next; + if(pc->type == PC_OPCODE && PCI(pc)->op == POC_CALL) + fprintf(of,"\t%s\n",get_op_from_instruction(PCI(pc))); + } + } + + pbr = pbr->next; + } + + + fprintf(of,"\n**************\n\na better call tree\n"); + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + if(pb->visited) + pct2(of,pb,0); + } + + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + fprintf(of,"block dbname: %c\n", getpBlock_dbName(pb)); + } +} +#endif + + +/*-----------------------------------------------------------------*/ +/* */ +/*-----------------------------------------------------------------*/ + +static void InlineFunction(pBlock *pb) +{ + pCode *pc; + pCode *pc_call; + + if(!pb) + return; + + pc = setFirstItem(pb->function_calls); + + for( ; pc; pc = setNextItem(pb->function_calls)) { + + if(isCALL(pc)) { + pCode *pcn = findFunction(get_op_from_instruction(PCI(pc))); + pCode *pcp = pc->prev; + pCode *pct; + pCode *pce; + + pBranch *pbr; + + if(pcn && isPCF(pcn) && (PCF(pcn)->ncalled == 1) && !PCF(pcn)->isPublic && (pcp && (isPCI_BITSKIP(pcp)||!isPCI_SKIP(pcp)))) { /* Bit skips can be inverted other skips can not */ + + InlineFunction(pcn->pb); + + /* + At this point, *pc points to a CALL mnemonic, and + *pcn points to the function that is being called. + + To in-line this call, we need to remove the CALL + and RETURN(s), and link the function pCode in with + the CALLee pCode. + + */ + + pc_call = pc; + + /* Check if previous instruction was a bit skip */ + if (isPCI_BITSKIP(pcp)) { + pCodeLabel *pcl; + /* Invert skip instruction and add a goto */ + PCI(pcp)->op = (PCI(pcp)->op == POC_BTFSS) ? POC_BTFSC : POC_BTFSS; + + if(isPCL(pc_call->next)) { // Label pcode + pcl = PCL(pc_call->next); + } else if (isPCI(pc_call->next) && PCI(pc_call->next)->label) { // pcode instruction with a label + pcl = PCL(PCI(pc_call->next)->label->pc); + } else { + pcl = PCL(newpCodeLabel(NULL, newiTempLabel(NULL)->key+100)); + PCI(pc_call->next)->label->pc = (struct pCode*)pcl; + } + pCodeInsertAfter(pcp, newpCode(POC_GOTO, newpCodeOp(pcl->label,PO_STR))); + } + + /* remove callee pBlock from the pBlock linked list */ + removepBlock(pcn->pb); + + pce = pcn; + while(pce) { + pce->pb = pb; + pce = pce->next; + } + + /* Remove the Function pCode */ + pct = findNextInstruction(pcn->next); + + /* Link the function with the callee */ + if (pcp) pcp->next = pcn->next; + pcn->next->prev = pcp; + + /* Convert the function name into a label */ + + pbr = Safe_calloc(1,sizeof(pBranch)); + pbr->pc = newpCodeLabel(PCF(pcn)->fname, -1); + pbr->next = NULL; + PCI(pct)->label = pBranchAppend(PCI(pct)->label,pbr); + PCI(pct)->label = pBranchAppend(PCI(pct)->label,PCI(pc_call)->label); + + /* turn all of the return's except the last into goto's */ + /* check case for 2 instruction pBlocks */ + pce = findNextInstruction(pcn->next); + while(pce) { + pCode *pce_next = findNextInstruction(pce->next); + + if(pce_next == NULL) { + /* found the last return */ + pCode *pc_call_next = findNextInstruction(pc_call->next); + + //fprintf(stderr,"found last return\n"); + //pce->print(stderr,pce); + pce->prev->next = pc_call->next; + pc_call->next->prev = pce->prev; + PCI(pc_call_next)->label = pBranchAppend(PCI(pc_call_next)->label, + PCI(pce)->label); + } + + pce = pce_next; + } + + } + } else + fprintf(stderr,"BUG? pCode isn't a POC_CALL %d\n",__LINE__); + + } + +} + +/*-----------------------------------------------------------------*/ +/* */ +/*-----------------------------------------------------------------*/ + +void InlinepCode(void) +{ + + pBlock *pb; + pCode *pc; + + if(!the_pFile) + return; + + if(!functionInlining) + return; + + /* Loop through all of the function definitions and count the + * number of times each one is called */ + //fprintf(stderr,"inlining %d\n",__LINE__); + + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + + pc = setFirstItem(pb->function_calls); + + for( ; pc; pc = setNextItem(pb->function_calls)) { + + if(isCALL(pc)) { + pCode *pcn = findFunction(get_op_from_instruction(PCI(pc))); + if(pcn && isPCF(pcn)) { + PCF(pcn)->ncalled++; + } + } else + fprintf(stderr,"BUG? pCode isn't a POC_CALL %d\n",__LINE__); + + } + } + + //fprintf(stderr,"inlining %d\n",__LINE__); + + /* Now, Loop through the function definitions again, but this + * time inline those functions that have only been called once. */ + + InlineFunction(the_pFile->pbHead); + //fprintf(stderr,"inlining %d\n",__LINE__); + + for(pb = the_pFile->pbHead; pb; pb = pb->next) + unBuildFlow(pb); + +} + diff --git a/src/pic/pcode.h b/src/pic/pcode.h new file mode 100644 index 0000000..e8cefd8 --- /dev/null +++ b/src/pic/pcode.h @@ -0,0 +1,881 @@ +/*------------------------------------------------------------------------- + + pcode.h - post code generation + Written By - Scott Dattalo scott@dattalo.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +-------------------------------------------------------------------------*/ + +#ifndef __PCODE_H__ +#define __PCODE_H__ + +#include "common.h" + +/* When changing these, you must also update the assembler template + * in device/lib/libsdcc/macros.inc */ +#define GPTRTAG_DATA 0x00 +#define GPTRTAG_CODE 0x80 + +/* Cyclic dependency with ralloc.h: */ +struct regs; + +/* + Post code generation + + The post code generation is an assembler optimizer. The assembly code + produced by all of the previous steps is fully functional. This step + will attempt to analyze the flow of the assembly code and agressively + optimize it. The peep hole optimizer attempts to do the same thing. + As you may recall, the peep hole optimizer replaces blocks of assembly + with more optimal blocks (e.g. removing redundant register loads). + However, the peep hole optimizer has to be somewhat conservative since + an assembly program has implicit state information that's unavailable + when only a few instructions are examined. + Consider this example: + + example1: + movwf t1 + movf t1,w + + The movf seems redundant since we know that the W register already + contains the same value of t1. So a peep hole optimizer is tempted to + remove the "movf". However, this is dangerous since the movf affects + the flags in the status register (specifically the Z flag) and subsequent + code may depend upon this. Look at these two examples: + + example2: + movwf t1 + movf t1,w ; Can't remove this movf + skpz + return + + example3: + movwf t1 + movf t1,w ; This movf can be removed + xorwf t2,w ; since xorwf will over write Z + skpz + return + +*/ + + +/*********************************************************************** + * debug stuff + * + * The DFPRINTF macro will call fprintf if PCODE_DEBUG is defined. + * The macro is used like: + * + * DPRINTF(("%s #%d\n","test", 1)); + * + * The double parenthesis (()) are necessary + * + ***********************************************************************/ +//#define PCODE_DEBUG + +#ifdef PCODE_DEBUG +#define DFPRINTF(args) (fprintf args) +#else +#define DFPRINTF(args) ((void)0) +#endif + + +/*********************************************************************** + * PIC status bits - this will move into device dependent headers + ***********************************************************************/ +#define PIC_C_BIT 0 +#define PIC_DC_BIT 1 +#define PIC_Z_BIT 2 +#define PIC_RP0_BIT 5 /* Register Bank select bits RP1:0 : */ +#define PIC_RP1_BIT 6 /* 00 - bank 0, 01 - bank 1, 10 - bank 2, 11 - bank 3 */ +#define PIC_IRP_BIT 7 /* Indirect register page select */ + +/*********************************************************************** + * PIC INTCON bits - this will move into device dependent headers + ***********************************************************************/ +#define PIC_RBIF_BIT 0 /* Port B level has changed flag */ +#define PIC_INTF_BIT 1 /* Port B bit 0 interrupt on edge flag */ +#define PIC_T0IF_BIT 2 /* TMR0 has overflowed flag */ +#define PIC_RBIE_BIT 3 /* Port B level has changed - Interrupt Enable */ +#define PIC_INTE_BIT 4 /* Port B bit 0 interrupt on edge - Int Enable */ +#define PIC_T0IE_BIT 5 /* TMR0 overflow Interrupt Enable */ +#define PIC_PIE_BIT 6 /* Peripheral Interrupt Enable */ +#define PIC_GIE_BIT 7 /* Global Interrupt Enable */ + + +/*********************************************************************** + * + * PIC_OPTYPE - Operand types that are specific to the PIC architecture + * + * If a PIC assembly instruction has an operand then here is where we + * associate a type to it. For example, + * + * movf reg,W + * + * The movf has two operands: 'reg' and the W register. 'reg' is some + * arbitrary general purpose register, hence it has the type PO_GPR_REGISTER. + * The W register, which is the PIC's accumulator, has the type PO_W. + * + ***********************************************************************/ + + + +typedef enum +{ + PO_NONE=0, // No operand e.g. NOP + PO_W, // The 'W' register + PO_STATUS, // The 'STATUS' register + PO_FSR, // The "file select register" (in 18c it's one of three) + PO_INDF, // The Indirect register + PO_INTCON, // Interrupt Control register + PO_GPR_REGISTER, // A general purpose register + PO_GPR_BIT, // A bit of a general purpose register + PO_GPR_TEMP, // A general purpose temporary register + PO_GPR_POINTER, // A general purpose pointer + PO_SFR_REGISTER, // A special function register (e.g. PORTA) + PO_PCL, // Program counter Low register + PO_PCLATH, // Program counter Latch high register + PO_LITERAL, // A constant + PO_IMMEDIATE, // (8051 legacy) + PO_DIR, // Direct memory (8051 legacy) + PO_CRY, // bit memory (8051 legacy) + PO_BIT, // bit operand. + PO_STR, // (8051 legacy) + PO_LABEL, + PO_WILD // Wild card operand in peep optimizer +} PIC_OPTYPE; + + +/*********************************************************************** + * + * PIC_OPCODE + * + * This is not a list of the PIC's opcodes per se, but instead + * an enumeration of all of the different types of pic opcodes. + * + ***********************************************************************/ + +typedef enum +{ + POC_WILD=-1, /* Wild card - used in the pCode peep hole optimizer + * to represent ANY pic opcode */ + POC_ADDLW=0, + POC_ADDWF, + POC_ADDFW, + POC_ANDLW, + POC_ANDWF, + POC_ANDFW, + POC_BCF, + POC_BSF, + POC_BTFSC, + POC_BTFSS, + POC_CALL, + POC_COMF, + POC_COMFW, + POC_CLRF, + POC_CLRW, + POC_CLRWDT, + POC_DECF, + POC_DECFW, + POC_DECFSZ, + POC_DECFSZW, + POC_GOTO, + POC_INCF, + POC_INCFW, + POC_INCFSZ, + POC_INCFSZW, + POC_IORLW, + POC_IORWF, + POC_IORFW, + POC_MOVF, + POC_MOVFW, + POC_MOVLW, + POC_MOVWF, + POC_NOP, + POC_RETLW, + POC_RETURN, + POC_RETFIE, + POC_RLF, + POC_RLFW, + POC_RRF, + POC_RRFW, + POC_SUBLW, + POC_SUBWF, + POC_SUBFW, + POC_SWAPF, + POC_SWAPFW, + POC_TRIS, + POC_XORLW, + POC_XORWF, + POC_XORFW, + POC_BANKSEL, + POC_PAGESEL, + + MAX_PIC14MNEMONICS +} PIC_OPCODE; + + +/*********************************************************************** + * PC_TYPE - pCode Types + ***********************************************************************/ + +typedef enum +{ + PC_COMMENT=0, /* pCode is a comment */ + PC_INLINE, /* user's inline code */ + PC_OPCODE, /* PORT dependent opcode */ + PC_LABEL, /* assembly label */ + PC_FLOW, /* flow analysis */ + PC_FUNCTION, /* Function start or end */ + PC_WILD, /* wildcard - an opcode place holder used + * in the pCode peep hole optimizer */ + PC_CSOURCE, /* C-Source Line */ + PC_ASMDIR, /* Assembler directive */ + PC_BAD /* Mark the pCode object as being bad */ +} PC_TYPE; + +/************************************************/ +/*************** Structures ********************/ +/************************************************/ +/* These are here as forward references - the + * full definition of these are below */ +struct pCode; +struct pCodeWildBlock; +struct pCodeRegLives; + +/************************************************* + pBranch + + The first step in optimizing pCode is determining + the program flow. This information is stored in + single-linked lists in the for of 'from' and 'to' + objects with in a pcode. For example, most instructions + don't involve any branching. So their from branch + points to the pCode immediately preceding them and + their 'to' branch points to the pcode immediately + following them. A skip instruction is an example of + a pcode that has multiple (in this case two) elements + in the 'to' branch. A 'label' pcode is an where there + may be multiple 'from' branches. + *************************************************/ + +typedef struct pBranch +{ + struct pCode *pc; // Next pCode in a branch + struct pBranch *next; /* If more than one branch + * the next one is here */ + +} pBranch; + +/************************************************* + pCodeOp + + pCode Operand structure. + For those assembly instructions that have arguments, + the pCode will have a pCodeOp in which the argument + can be stored. For example + + movf some_register,w + + 'some_register' will be stored/referenced in a pCodeOp + + *************************************************/ + +typedef struct pCodeOp +{ + PIC_OPTYPE type; + char *name; + +} pCodeOp; + +typedef struct pCodeOpLit +{ + pCodeOp pcop; + int lit; +} pCodeOpLit; + +typedef struct pCodeOpImmd +{ + pCodeOp pcop; + int offset; /* low,med, or high byte of immediate value */ + int index; /* add this to the immediate value */ + unsigned _const:1; /* is in code space */ + unsigned _function:1; /* is a (pointer to a) function */ + + int rIdx; /* If this immd points to a register */ + struct regs *r; /* then this is the reg. */ + +} pCodeOpImmd; + +typedef struct pCodeOpLabel +{ + pCodeOp pcop; + int key; + int offset; /* low or high byte of label */ +} pCodeOpLabel; + +typedef struct pCodeOpReg +{ + pCodeOp pcop; // Can be either GPR or SFR + int rIdx; // Index into the register table + struct regs *r; + int instance; // byte # of Multi-byte registers + struct pBlock *pb; +} pCodeOpReg; + +typedef struct pCodeOpRegBit +{ + pCodeOpReg pcor; // The Register containing this bit + int bit; // 0-7 bit number. + PIC_OPTYPE subtype; // The type of this register. + unsigned int inBitSpace: 1; /* True if in bit space, else + just a bit of a register */ +} pCodeOpRegBit; + +typedef struct pCodeOpStr /* Only used here for the name of fn being called or jumped to */ +{ + pCodeOp pcop; + unsigned isPublic: 1; /* True if not static ie extern */ +} pCodeOpStr; + +typedef struct pCodeOpWild +{ + pCodeOp pcop; + + struct pCodeWildBlock *pcwb; + + int id; /* index into an array of char *'s that will match + * the wild card. The array is in *pcp. */ + pCodeOp *subtype; /* Pointer to the Operand type into which this wild + * card will be expanded */ + pCodeOp *matched; /* When a wild matches, we'll store a pointer to the + * opcode we matched */ + +} pCodeOpWild; + + +/************************************************* + pCode + + Here is the basic build block of a PIC instruction. + Each pic instruction will get allocated a pCode. + A linked list of pCodes makes a program. + +**************************************************/ + +typedef struct pCode +{ + PC_TYPE type; + + struct pCode *prev; // The pCode objects are linked together + struct pCode *next; // in doubly linked lists. + + unsigned id; // unique ID number for all pCodes to assist in debugging + int seq; // sequence number + + struct pBlock *pb; // The pBlock that contains this pCode. + + /* "virtual functions" + * The pCode structure is like a base class + * in C++. The subsequent structures that "inherit" + * the pCode structure will initialize these function + * pointers to something useful */ + void (*destruct)(struct pCode *_this); + void (*print) (FILE *of,struct pCode *_this); + +} pCode; + + +/************************************************* + pCodeComment +**************************************************/ + +typedef struct pCodeComment +{ + + pCode pc; + + char *comment; + +} pCodeComment; + + +/************************************************* + pCodeComment +**************************************************/ + +typedef struct pCodeCSource +{ + + pCode pc; + + int line_number; + char *line; + char *file_name; + +} pCodeCSource; + + +/************************************************* + pCodeFlow + + The Flow object is used as marker to separate + the assembly code into contiguous chunks. In other + words, everytime an instruction cause or potentially + causes a branch, a Flow object will be inserted into + the pCode chain to mark the beginning of the next + contiguous chunk. + +**************************************************/ + +typedef struct pCodeFlow +{ + + pCode pc; + + pCode *end; /* Last pCode in this flow. Note that + the first pCode is pc.next */ + + set *from; /* flow blocks that can send control to this flow block */ + set *to; /* flow blocks to which this one can send control */ + struct pCodeFlow *ancestor; /* The most immediate "single" pCodeFlow object that + * executes prior to this one. In many cases, this + * will be just the previous */ + + int inCond; /* Input conditions - stuff assumed defined at entry */ + int outCond; /* Output conditions - stuff modified by flow block */ + + int firstBank; /* The first and last bank flags are the first and last */ + int lastBank; /* register banks used within one flow object */ + + int FromConflicts; + int ToConflicts; + + set *registers;/* Registers used in this flow */ + +} pCodeFlow; + + +/************************************************* + pCodeFlowLink + + The Flow Link object is used to record information + about how consecutive excutive Flow objects are related. + The pCodeFlow objects demarcate the pCodeInstructions + into contiguous chunks. The FlowLink records conflicts + in the discontinuities. For example, if one Flow object + references a register in bank 0 and the next Flow object + references a register in bank 1, then there is a discontinuity + in the banking registers. + +*/ +typedef struct pCodeFlowLink +{ + pCodeFlow *pcflow; /* pointer to linked pCodeFlow object */ + + int bank_conflict; /* records bank conflicts */ + +} pCodeFlowLink; + + +/************************************************* + pCodeInstruction + + Here we describe all the facets of a PIC instruction + (expansion for the 18cxxx is also provided). + +**************************************************/ + +typedef struct pCodeInstruction +{ + + pCode pc; + + PIC_OPCODE op; // The opcode of the instruction. + + char const * const mnemonic; // Pointer to mnemonic string + + pBranch *from; // pCodes that execute before this one + pBranch *to; // pCodes that execute after + pBranch *label; // pCode instructions that have labels + + pCodeOp *pcop; /* Operand, if this instruction has one */ + pCodeFlow *pcflow; /* flow block to which this instruction belongs */ + pCodeCSource *cline; /* C Source from which this instruction was derived */ + + unsigned int num_ops; /* Number of operands (0,1,2 for mid range pics) */ + unsigned int isModReg: 1; /* If destination is W or F, then 1==F */ + unsigned int isBitInst: 1; /* e.g. BCF */ + unsigned int isBranch: 1; /* True if this is a branching instruction */ + unsigned int isSkip: 1; /* True if this is a skip instruction */ + unsigned int isLit: 1; /* True if this instruction has an literal operand */ + + PIC_OPCODE inverted_op; /* Opcode of instruction that's the opposite of this one */ + unsigned int inCond; // Input conditions for this instruction + unsigned int outCond; // Output conditions for this instruction + +} pCodeInstruction; + + +/************************************************* + pCodeAsmDir +**************************************************/ + +typedef struct pCodeAsmDir +{ + pCodeInstruction pci; + + char *directive; + char *arg; +} pCodeAsmDir; + + +/************************************************* + pCodeLabel +**************************************************/ + +typedef struct pCodeLabel +{ + + pCode pc; + + char *label; + int key; + +} pCodeLabel; + + +/************************************************* + pCodeFunction +**************************************************/ + +typedef struct pCodeFunction +{ + + pCode pc; + + char *modname; + char *fname; /* If NULL, then this is the end of + a function. Otherwise, it's the + start and the name is contained + here */ + + pBranch *from; // pCodes that execute before this one + pBranch *to; // pCodes that execute after + pBranch *label; // pCode instructions that have labels + + int ncalled; /* Number of times function is called */ + unsigned isPublic:1; /* True if the fn is not static and can be called from another module (ie a another c or asm file) */ + +} pCodeFunction; + + +/************************************************* + pCodeWild +**************************************************/ + +typedef struct pCodeWild +{ + + pCodeInstruction pci; + + int id; /* Index into the wild card array of a peepBlock + * - this wild card will get expanded into that pCode + * that is stored at this index */ + + /* Conditions on wild pcode instruction */ + int mustBeBitSkipInst:1; + int mustNotBeBitSkipInst:1; + int invertBitSkipInst:1; + + pCodeOp *operand; // Optional operand + pCodeOp *label; // Optional label + +} pCodeWild; + +/************************************************* + pBlock + + Here are PIC program snippets. There's a strong + correlation between the eBBlocks and pBlocks. + SDCC subdivides a C program into managable chunks. + Each chunk becomes a eBBlock and ultimately in the + PIC port a pBlock. + +**************************************************/ + +typedef struct pBlock +{ + memmap *cmemmap; /* The snippet is from this memmap */ + char dbName; /* if cmemmap is NULL, then dbName will identify the block */ + pCode *pcHead; /* A pointer to the first pCode in a link list of pCodes */ + pCode *pcTail; /* A pointer to the last pCode in a link list of pCodes */ + + struct pBlock *next; /* The pBlocks will form a doubly linked list */ + struct pBlock *prev; + + set *function_entries; /* dll of functions in this pblock */ + set *function_exits; + set *function_calls; + set *tregisters; + + set *FlowTree; + unsigned visited:1; /* set true if traversed in call tree */ + + unsigned seq; /* sequence number of this pBlock */ + +} pBlock; + +/************************************************* + pFile + + The collection of pBlock program snippets are + placed into a linked list that is implemented + in the pFile structure. + + The pcode optimizer will parse the pFile. + +**************************************************/ + +typedef struct pFile +{ + pBlock *pbHead; /* A pointer to the first pBlock */ + pBlock *pbTail; /* A pointer to the last pBlock */ + + pBranch *functions; /* A SLL of functions in this pFile */ + +} pFile; + + + +/************************************************* + pCodeWildBlock + + The pCodeWildBlock object keeps track of the wild + variables, operands, and opcodes that exist in + a pBlock. +**************************************************/ +typedef struct pCodeWildBlock { + pBlock *pb; + struct pCodePeep *pcp; // pointer back to ... I don't like this... + + int nvars; // Number of wildcard registers in target. + char **vars; // array of pointers to them + + int nops; // Number of wildcard operands in target. + pCodeOp **wildpCodeOps; // array of pointers to the pCodeOp's. + + int nwildpCodes; // Number of wildcard pCodes in target/replace + pCode **wildpCodes; // array of pointers to the pCode's. + +} pCodeWildBlock; + +/************************************************* + pCodePeep + + The pCodePeep object mimics the peep hole optimizer + in the main SDCC src (e.g. SDCCpeeph.c). Essentially + there is a target pCode chain and a replacement + pCode chain. The target chain is compared to the + pCode that is generated by gen.c. If a match is + found then the pCode is replaced by the replacement + pCode chain. +**************************************************/ +typedef struct pCodePeep { + pCodeWildBlock target; // code we'd like to optimize + pCodeWildBlock replace; // and this is what we'll optimize it with. + + /* (Note: a wildcard register is a place holder. Any register + * can be replaced by the wildcard when the pcode is being + * compared to the target. */ + + /* Post Conditions. A post condition is a condition that + * must be either true or false before the peep rule is + * accepted. For example, a certain rule may be accepted + * if and only if the Z-bit is not used as an input to + * the subsequent instructions in a pCode chain. + */ + unsigned int postFalseCond; + unsigned int postTrueCond; + +} pCodePeep; + +/************************************************* + + pCode peep command definitions + + Here are some special commands that control the +way the peep hole optimizer behaves + +**************************************************/ + +enum peepCommandTypes{ + NOTBITSKIP = 0, + BITSKIP, + INVERTBITSKIP, + _LAST_PEEP_COMMAND_ +}; + +/************************************************* + peepCommand structure stores the peep commands. + +**************************************************/ + +typedef struct peepCommand { + int id; + char *cmd; +} peepCommand; + +/************************************************* + pCode Macros + +**************************************************/ +#define PCODE(x) ((pCode *)(x)) +#define PCI(x) ((pCodeInstruction *)(x)) +#define PCL(x) ((pCodeLabel *)(x)) +#define PCF(x) ((pCodeFunction *)(x)) +#define PCFL(x) ((pCodeFlow *)(x)) +#define PCFLINK(x)((pCodeFlowLink *)(x)) +#define PCW(x) ((pCodeWild *)(x)) +#define PCCS(x) ((pCodeCSource *)(x)) +#define PCAD(x) ((pCodeAsmDir *)(x)) + +#define PCOP(x) ((pCodeOp *)(x)) +#define PCOL(x) ((pCodeOpLit *)(x)) +#define PCOI(x) ((pCodeOpImmd *)(x)) +#define PCOLAB(x) ((pCodeOpLabel *)(x)) +#define PCOR(x) ((pCodeOpReg *)(x)) +#define PCORB(x) ((pCodeOpRegBit *)(x)) +#define PCOS(x) ((pCodeOpStr *)(x)) +#define PCOW(x) ((pCodeOpWild *)(x)) + +#define PBR(x) ((pBranch *)(x)) + +#define PCWB(x) ((pCodeWildBlock *)(x)) + +#define isPCOLAB(x) ((PCOP(x)->type) == PO_LABEL) +#define isPCOS(x) ((PCOP(x)->type) == PO_STR) + + +/* + macros for checking pCode types +*/ +#define isPCI(x) ((PCODE(x)->type == PC_OPCODE)) +#define isPCFL(x) ((PCODE(x)->type == PC_FLOW)) +#define isPCF(x) ((PCODE(x)->type == PC_FUNCTION)) +#define isPCL(x) ((PCODE(x)->type == PC_LABEL)) +#define isPCW(x) ((PCODE(x)->type == PC_WILD)) +#define isPCCS(x) ((PCODE(x)->type == PC_CSOURCE)) +#define isPCASMDIR(x) ((PCODE(x)->type == PC_ASMDIR)) + +/* + macros for checking pCodeInstruction types +*/ +#define isCALL(x) (isPCI(x) && (PCI(x)->op == POC_CALL)) +#define isPCI_BRANCH(x) (isPCI(x) && PCI(x)->isBranch) +#define isPCI_SKIP(x) (isPCI(x) && PCI(x)->isSkip) +#define isPCI_LIT(x) (isPCI(x) && PCI(x)->isLit) +#define isPCI_BITSKIP(x)(isPCI_SKIP(x) && PCI(x)->isBitInst) + + +#define isSTATUS_REG(r) ((r)->pc_type == PO_STATUS) + +/*-----------------------------------------------------------------* + * pCode functions. + *-----------------------------------------------------------------*/ + +pCode *newpCode (PIC_OPCODE op, pCodeOp *pcop); // Create a new pCode given an operand +pCode *newpCodeCharP(char *cP); // Create a new pCode given a char * +pCode *newpCodeFunction(char *g, char *f,int); // Create a new function +pCode *newpCodeLabel(char *name,int key); // Create a new label given a key +pCode *newpCodeCSource(int ln, char *f, const char *l); // Create a new symbol line +pCode *newpCodeWild(int pCodeID, pCodeOp *optional_operand, pCodeOp *optional_label); +pCode *findNextInstruction(pCode *pci); +pCode *findPrevInstruction(pCode *pci); +pCode *findNextpCode(pCode *pc, PC_TYPE pct); +pCode *pCodeInstructionCopy(pCodeInstruction *pci,int invert); + +pBlock *newpCodeChain(memmap *cm,char c, pCode *pc); // Create a new pBlock +void printpBlock(FILE *of, pBlock *pb); // Write a pBlock to a file +void printpCode(FILE *of, pCode *pc); // Write a pCode to a file +void addpCode2pBlock(pBlock *pb, pCode *pc); // Add a pCode to a pBlock +void addpBlock(pBlock *pb); // Add a pBlock to a pFile +void unlinkpCode(pCode *pc); +void copypCode(FILE *of, char dbName); // Write all pBlocks with dbName to *of +void movepBlock2Head(char dbName); // move pBlocks around +void AnalyzeBanking(void); +void ReuseReg(void); +void AnalyzepCode(char dbName); +void InlinepCode(void); +void pCodeInitRegisters(void); +void pic14initpCodePeepCommands(void); +void pBlockConvert2ISR(pBlock *pb); +void pBlockMergeLabels(pBlock *pb); +void pCodeInsertAfter(pCode *pc1, pCode *pc2); +void pCodeInsertBefore(pCode *pc1, pCode *pc2); +void pCodeDeleteChain(pCode *f,pCode *t); + +pCode *newpCodeAsmDir(char *asdir, char *argfmt, ...); + +pCodeOp *newpCodeOpLabel(char *name, int key); +pCodeOp *newpCodeOpImmd(char *name, int offset, int index, int code_space,int is_func); +pCodeOp *newpCodeOpLit(int lit); +pCodeOp *newpCodeOpBit(char *name, int bit,int inBitSpace); +pCodeOp *newpCodeOpWild(int id, pCodeWildBlock *pcwb, pCodeOp *subtype); +pCodeOp *newpCodeOpRegFromStr(char *name); +pCodeOp *newpCodeOp(char *name, PIC_OPTYPE p); +pCodeOp *pCodeOpCopy(pCodeOp *pcop); +pCodeOp *popCopyGPR2Bit(pCodeOp *pc, int bitval); +pCodeOp *popCopyReg(pCodeOpReg *pc); + +pBranch *pBranchAppend(pBranch *h, pBranch *n); + +struct regs * getRegFromInstruction(pCode *pc); + +char *get_op(pCodeOp *pcop, char *buff, size_t buf_size); +char *pCode2str(char *str, size_t size, pCode *pc); + +int pCodePeepMatchRule(pCode *pc); + +void pcode_test(void); +void resetpCodeStatistics (void); +void dumppCodeStatistics (FILE *of); + +/*-----------------------------------------------------------------* + * pCode objects. + *-----------------------------------------------------------------*/ + +extern pCodeOpReg pc_status; +extern pCodeOpReg pc_intcon; +extern pCodeOpReg pc_indf; +extern pCodeOpReg pc_fsr; +extern pCodeOpReg pc_pcl; +extern pCodeOpReg pc_pclath; +extern pCodeOpReg pc_wsave; /* wsave, ssave and psave are used to save W, the Status and PCLATH*/ +extern pCodeOpReg pc_ssave; /* registers during an interrupt */ +extern pCodeOpReg pc_psave; /* registers during an interrupt */ + +extern pFile *the_pFile; +extern pCodeInstruction *pic14Mnemonics[MAX_PIC14MNEMONICS]; + +/* + * From pcodepeep.h: + */ +int getpCode(char *mnem, unsigned dest); +int getpCodePeepCommand(char *cmd); +int pCodeSearchCondition(pCode *pc, unsigned int cond, int contIfSkip); + +#endif // __PCODE_H__ + diff --git a/src/pic/pcodeflow.c b/src/pic/pcodeflow.c new file mode 100644 index 0000000..decf088 --- /dev/null +++ b/src/pic/pcodeflow.c @@ -0,0 +1,226 @@ +/*------------------------------------------------------------------------- + + pcodeflow.c - post code generation flow analysis + + Written By - Scott Dattalo scott@dattalo.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +-------------------------------------------------------------------------*/ +/* + pcodeflow.c + + The purpose of the code in this file is to analyze the flow of the + pCode. + +*/ + +#include "pcodeflow.h" + +#if 0 +static void dbg_dumpFlow(pBlock *pb) +{ + pCode *pcflow; + + for( pcflow = findNextpCode(pb->pcHead, PC_FLOW); + pcflow != NULL; + pcflow = findNextpCode(pcflow->next, PC_FLOW) ) { + + if(!isPCFL(pcflow)) + fprintf(stderr, "LinkFlow - pcflow is not a flow object "); + + fprintf(stderr, "Flow: 0x%x",pcflow->seq); + if(PCFL(pcflow) && PCFL(pcflow)->ancestor) + fprintf(stderr,", ancestor 0x%x\n", + PCFL(pcflow)->ancestor->pc.seq); + else { + pCodeFlowLink *from = (PCFL(pcflow)->from) ? (PCFLINK(setFirstItem(PCFL(pcflow)->from))) : NULL; + fprintf(stderr," no ancestor"); + while(from) { + fprintf(stderr," (0x%x)",from->pcflow->pc.seq); + from = setNextItem(PCFL(pcflow)->from); + } + fprintf(stderr,"\n"); + } + } + +} +#endif + +#if 0 +/*-----------------------------------------------------------------* +* void BuildFlowSegment(set *segment, pCodeFlow *pcflow) +*-----------------------------------------------------------------*/ +static void BuildFlowSegment(pCodeFlow *pcflow) +{ + static int recursion=0; + pCodeFlow *pcflow_other; + set *flowset; + + if(!pcflow) + return; + + if(recursion++ > 200) { + fprintf(stderr, " exceeded recursion\n"); + return; + } + + fprintf(stderr,"examining 0x%x\n",pcflow->pc.seq); + + if(pcflow->from) { + + + flowset = pcflow->from; + + if(flowset && flowset->next == NULL) { + + /* + There is a flow before this one. In fact, there's + exactly one flow before this one (because ->next is + NULL). That means all children of this node pass + through both this node and the node immediately + before this one; i.e. they have the same ancestor. + */ + + if( (NULL == (pcflow_other = PCFLINK(flowset->item)->pcflow)) || + (NULL == pcflow_other)) { + fprintf(stderr,"2 error in flow link\n"); + exit(1); + } + pcflow->ancestor = pcflow_other->ancestor ; + + fprintf(stderr,"Assigning ancestor 0x%x from flow 0x%x\n", + pcflow->ancestor->pc.seq, pcflow_other->pc.seq); + + } else { + + if(flowset == NULL) { + + /* There are no flows before this one. + * If this is not the first flow object in the pBlock then + * there's an error */ + + if(!pcflow->ancestor) { + fprintf(stderr,"error in flow link\n"); + exit(1); + + } + + } else { + + /* Flow passes to this flow from multiple flows. Let's + look at just one of these. If the one we look at has + an ancestor, then that's our ancestor too. If the one + we look at doesn't have an ancestor, then that means + we haven't traversed that branch of the call tree + yet - but we will */ + + pcflow_other = PCFLINK(flowset->item)->pcflow; + if(pcflow_other) { + fprintf(stderr, "coming from 0x%x\n",pcflow_other->pc.seq); + if( pcflow_other->ancestor) + pcflow->ancestor = pcflow_other->ancestor; + } + } + + + } + + } else { + /* there are no nodes before this one */ + if(!pcflow->ancestor) + fprintf(stderr,"3 Error in flow link\n"); + } + + /* Now let's recursively expand the call tree */ + + if(pcflow->ancestor && pcflow->to) { + flowset = pcflow->to; + while(flowset) { + BuildFlowSegment(PCFLINK(flowset->item)->pcflow); + flowset = flowset->next; + } + } + +} +#endif + +void BuildFlowTree(pBlock *pb) +{ + pCodeFlow *first_pcflow, *pcflow; + + + // fprintf(stderr,"BuildFlowTree \n"); + + first_pcflow = PCFL(findNextpCode(pb->pcHead, PC_FLOW)); + if(!first_pcflow) + return; + + /* The very first node is like Adam, it's its own ancestor (i.e. + * there are no other flows in this pBlock prior to the first one). + */ + + first_pcflow->ancestor = first_pcflow; + + /* For each flow that has only one predecessor, it's easy to + identify the ancestor */ + pcflow = PCFL(findNextpCode(first_pcflow->pc.next, PC_FLOW)); + + while(pcflow) { + if(elementsInSet(pcflow->from) == 1) { + pCodeFlowLink *from = PCFLINK(setFirstItem(pcflow->from)); + + pcflow->ancestor = from->pcflow; + /* + fprintf(stderr,"Assigning ancestor 0x%x to flow 0x%x\n", + pcflow->ancestor->pc.seq, pcflow->pc.seq); + */ + } + + pcflow = PCFL(findNextpCode(pcflow->pc.next, PC_FLOW)); + + } + + pcflow = PCFL(findNextpCode(first_pcflow->pc.next, PC_FLOW)); + + while(pcflow) { + if(elementsInSet(pcflow->from) > 1) { + pCodeFlow *min_pcflow; + pCodeFlowLink *from = PCFLINK(setFirstItem(pcflow->from)); + + min_pcflow = from->pcflow; + + while( (from = setNextItem(pcflow->from)) != NULL) { + if(from->pcflow->pc.seq < min_pcflow->pc.seq) + min_pcflow = from->pcflow; + } + + pcflow->ancestor = min_pcflow; + /* + fprintf(stderr,"Assigning ancestor 0x%x to flow 0x%x from multiple\n", + pcflow->ancestor->pc.seq, pcflow->pc.seq); + */ + + } + + pcflow = PCFL(findNextpCode(pcflow->pc.next, PC_FLOW)); + + } + + // BuildFlowSegment(pcflow); + + //dbg_dumpFlow(pb); + +} diff --git a/src/pic/pcodeflow.h b/src/pic/pcodeflow.h new file mode 100644 index 0000000..1577770 --- /dev/null +++ b/src/pic/pcodeflow.h @@ -0,0 +1,68 @@ +/*------------------------------------------------------------------------- + + pcode.h - post code generation + Written By - Scott Dattalo scott@dattalo.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +-------------------------------------------------------------------------*/ + +#ifndef __PCODEFLOW_H__ +#define __PCODEFLOW_H__ + +#include "pcode.h" + +/************************************************* + * pCode conditions: + * + * The "conditions" are bit-mapped flags that describe + * input and/or output conditions that are affected by + * the instructions. For example: + * + * MOVF SOME_REG,W + * + * This instruction depends upon 'SOME_REG'. Consequently + * it has the input condition PCC_REGISTER set to true. + * + * In addition, this instruction affects the Z bit in the + * status register and affects W. Thus the output conditions + * are the logical or: + * PCC_ZERO_BIT | PCC_W + * + * The conditions are intialized when the pCode for an + * instruction is created. They're subsequently used + * by the pCode optimizer determine state information + * in the program flow. + *************************************************/ + +#define PCC_NONE 0 +#define PCC_REGISTER (1<<0) +#define PCC_C (1<<1) +#define PCC_Z (1<<2) +#define PCC_DC (1<<3) +#define PCC_W (1<<4) +#define PCC_EXAMINE_PCOP (1<<5) +#define PCC_REG_BANK0 (1<<6) +#define PCC_REG_BANK1 (1<<7) +#define PCC_REG_BANK2 (1<<8) +#define PCC_REG_BANK3 (1<<9) +#define PCC_LITERAL (1<<10) + +/*------------------------------------------------------------*/ + +void BuildFlowTree(pBlock *pb); + +#endif // __PCODEFLOW_H__ + diff --git a/src/pic/pcodepeep.c b/src/pic/pcodepeep.c new file mode 100644 index 0000000..c3f3602 --- /dev/null +++ b/src/pic/pcodepeep.c @@ -0,0 +1,2014 @@ +/*------------------------------------------------------------------------- + + pcodepeep.c - post code generation + Written By - Scott Dattalo scott@dattalo.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +-------------------------------------------------------------------------*/ + +#include "pcode.h" +#include "pcodeflow.h" +#include "ralloc.h" + +//#define PCODE_DEBUG + +#define IS_PCCOMMENT(x) ( x && (x->type==PC_COMMENT)) + + +/****************************************************************/ +/****************************************************************/ +typedef struct _DLL { + struct _DLL *prev; + struct _DLL *next; + // void *data; +} _DLL; + + +typedef struct pCodePeepSnippets +{ + _DLL dll; + pCodePeep *peep; +} pCodePeepSnippets; + + +/****************************************************************/ +/* */ +/* peepSnippets - */ +/* */ +/****************************************************************/ + +static pCodePeepSnippets *peepSnippets=NULL; + + +typedef struct pCodeToken +{ + int tt; // token type; + union { + char c; // character + int n; // number + char *s; // string + } tok; + +} pCodeToken; + +static pCodeToken tokArr[50]; +static unsigned tokIdx=0; + + +typedef enum { + PCT_NULL=0, + PCT_SPACE=1, + PCT_PERCENT, + PCT_LESSTHAN, + PCT_GREATERTHAN, + PCT_COLON, + PCT_COMMA, + PCT_COMMENT, + PCT_STRING, + PCT_NUMBER + +} pCodeTokens; + + +typedef struct parsedPattern { + struct pcPattern *pcp; + pCodeToken *pct; +} parsedPattern; + +#define MAX_PARSEDPATARR 50 +static parsedPattern parsedPatArr[MAX_PARSEDPATARR]; + +typedef enum { + PCP_LABEL=1, + PCP_NUMBER, + PCP_STR, + PCP_WILDVAR, + PCP_WILDSTR, + PCP_COMMA, + PCP_COMMENT +} pCodePatterns; + +static char pcpat_label[] = {PCT_PERCENT, PCT_NUMBER, PCT_COLON, 0}; +static char pcpat_number[] = {PCT_NUMBER, 0}; +static char pcpat_string[] = {PCT_STRING, 0}; +static char pcpat_wildString[] = {PCT_PERCENT, PCT_STRING, 0}; +static char pcpat_wildVar[] = {PCT_PERCENT, PCT_NUMBER, 0}; +static char pcpat_comma[] = {PCT_COMMA, 0}; +static char pcpat_comment[] = {PCT_COMMENT, 0}; + + +typedef struct pcPattern { + char pt; // Pattern type + char *tokens; // list of tokens that describe the pattern + void * (*f) (void *,pCodeWildBlock *); +} pcPattern; + +static pcPattern pcpArr[] = { + {PCP_LABEL, pcpat_label, NULL}, + {PCP_WILDSTR, pcpat_wildString, NULL}, + {PCP_STR, pcpat_string, NULL}, + {PCP_WILDVAR, pcpat_wildVar, NULL}, + {PCP_COMMA, pcpat_comma, NULL}, + {PCP_COMMENT, pcpat_comment, NULL}, + {PCP_NUMBER, pcpat_number, NULL} +}; + +#define PCPATTERNS (sizeof(pcpArr)/sizeof(pcPattern)) + +// Assembly Line Token +typedef enum { + ALT_LABEL=1, + ALT_COMMENT, + ALT_MNEM0, + ALT_MNEM0A, + ALT_MNEM1, + ALT_MNEM1A, + ALT_MNEM1B, + ALT_MNEM2, + ALT_MNEM2A, + ALT_MNEM3 +} altPatterns; + +static char alt_comment[] = { PCP_COMMENT, 0}; +static char alt_label[] = { PCP_LABEL, 0}; +static char alt_mnem0[] = { PCP_STR, 0}; +static char alt_mnem0a[] = { PCP_WILDVAR, 0}; +static char alt_mnem1[] = { PCP_STR, PCP_STR, 0}; +static char alt_mnem1a[] = { PCP_STR, PCP_WILDVAR, 0}; +static char alt_mnem1b[] = { PCP_STR, PCP_NUMBER, 0}; +static char alt_mnem2[] = { PCP_STR, PCP_STR, PCP_COMMA, PCP_STR, 0}; +static char alt_mnem2a[] = { PCP_STR, PCP_WILDVAR, PCP_COMMA, PCP_STR, 0}; +static char alt_mnem3[] = { PCP_STR, PCP_STR, PCP_COMMA, PCP_NUMBER, 0}; + +static void * cvt_altpat_label(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_comment(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem0(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem0a(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem1(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem1a(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem1b(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem2(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem2a(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem3(void *pp,pCodeWildBlock *pcwb); + +static pcPattern altArr[] = { + {ALT_LABEL, alt_label, cvt_altpat_label}, + {ALT_COMMENT, alt_comment,cvt_altpat_comment}, + {ALT_MNEM3, alt_mnem3, cvt_altpat_mnem3}, + {ALT_MNEM2A, alt_mnem2a, cvt_altpat_mnem2a}, + {ALT_MNEM2, alt_mnem2, cvt_altpat_mnem2}, + {ALT_MNEM1B, alt_mnem1b, cvt_altpat_mnem1b}, + {ALT_MNEM1A, alt_mnem1a, cvt_altpat_mnem1a}, + {ALT_MNEM1, alt_mnem1, cvt_altpat_mnem1}, + {ALT_MNEM0A, alt_mnem0a, cvt_altpat_mnem0a}, + {ALT_MNEM0, alt_mnem0, cvt_altpat_mnem0}, + +}; + +#define ALTPATTERNS (sizeof(altArr)/sizeof(pcPattern)) + +// forward declarations +static void * DLL_append(_DLL *list, _DLL *next); + +/*-----------------------------------------------------------------*/ +/* cvt_extract_destination - helper function extracts the register */ +/* destination from a parsedPattern. */ +/* */ +/*-----------------------------------------------------------------*/ +static int cvt_extract_destination(parsedPattern *pp) +{ + + if(pp->pct[0].tt == PCT_STRING) { + + // just check first letter for now + + if(toupper((unsigned char)*pp->pct[0].tok.s) == 'F') + return 1; + + } else if (pp->pct[0].tt == PCT_NUMBER) { + + if(pp->pct[0].tok.n) + return 1; + } + + return 0; + +} + +/*-----------------------------------------------------------------*/ +/* pCodeOp *cvt_extract_status(char *reg, char *bit) */ +/* if *reg is the "status" register and *bit is one of the */ +/* status bits, then this function will create a new pCode op */ +/* containing the status register. */ +/*-----------------------------------------------------------------*/ + +static pCodeOp *cvt_extract_status(char *reg, char *bit) +{ + int len; + + if(STRCASECMP(reg, pc_status.pcop.name)) + return NULL; + + len = strlen(bit); + + if(len == 1) { + // check C,Z + if(toupper((unsigned char)*bit) == 'C') + return PCOP(popCopyGPR2Bit(PCOP(&pc_status),PIC_C_BIT)); + if(toupper((unsigned char)*bit) == 'Z') + return PCOP(popCopyGPR2Bit(PCOP(&pc_status),PIC_Z_BIT)); + } + + // Check DC + if(len ==2 && toupper((unsigned char)bit[0]) == 'D' && toupper((unsigned char)bit[1]) == 'C') + return PCOP(popCopyGPR2Bit(PCOP(&pc_status),PIC_DC_BIT)); + + return NULL; + +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_label - convert assembly line type to a pCode label */ +/* INPUT: pointer to the parsedPattern */ +/* */ +/* pp[0] - label */ +/* */ +/* label pattern => '%' number ':' */ +/* at this point, we wish to extract only the 'number' */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_label(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + + DFPRINTF((stderr,"altpat_label with ID = %d\n",p->pct[1].tok.n)); + return newpCodeLabel(NULL,-p->pct[1].tok.n); + +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_comment - convert assembly line type to a comment */ +/* INPUT: pointer to the parsedPattern */ +/* */ +/* pp[0] - comment */ +/* */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_comment(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + + DFPRINTF((stderr,"altpat_comment = %s\n",p->pct[0].tok.s)); + return newpCodeCharP(p->pct[0].tok.s); + +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mem0 - convert assembly line type to a wild pCode */ +/* instruction */ +/* */ +/* pp[0] - str */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem0(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + int opcode; + + pCodeInstruction *pci=NULL; + + DFPRINTF((stderr,"altpat_mnem0 %s\n", p->pct[0].tok.s)); + + opcode = getpCode(p->pct[0].tok.s,0); + + if(opcode < 0) { + /* look for special command strings like _NOTBITSKIP_ */ + + //fprintf(stderr, "Bad mnemonic\n"); + + opcode = getpCodePeepCommand(p->pct[0].tok.s); + //if(opcode > 0) + // fprintf(stderr," but valid peep command: %s, key = %d\n",p->pct[0].tok.s,opcode); + return NULL; + } + + pci = PCI(newpCode(opcode, NULL)); + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + + return pci; +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mem0a - convert assembly line type to a wild pCode */ +/* instruction */ +/* */ +/* pp[0] - wild var */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem0a(void *pp, pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + + DFPRINTF((stderr,"altpat_mnem0a wild mnem # %d\n", p[0].pct[1].tok.n)); + + /* Save the index of the maximum wildcard mnemonic */ + if(p[0].pct[1].tok.n > pcwb->nwildpCodes) + pcwb->nwildpCodes = p[0].pct[1].tok.n; + + return newpCodeWild(p[0].pct[1].tok.n,NULL,NULL); + +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mem1 - convert assembly line type to a pCode */ +/* instruction with 1 operand. */ +/* */ +/* pp[0] - mnem */ +/* pp[1] - Operand */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem1(void *pp,pCodeWildBlock *pcwb) +{ + + parsedPattern *p = pp; + int opcode; + + pCodeInstruction *pci=NULL; + pCodeOp *pcosubtype; + + DFPRINTF((stderr,"altpat_mnem1 %s var %s\n", p->pct[0].tok.s,p[1].pct[0].tok.s)); + + opcode = getpCode(p->pct[0].tok.s,0); + if(opcode < 0) { + //fprintf(stderr, "Bad mnemonic\n"); + opcode = getpCodePeepCommand(p->pct[0].tok.s); + //if(opcode > 0) + //fprintf(stderr," but valid peep command: %s, key = %d\n",p->pct[0].tok.s,opcode); + + return NULL; + } + + if(pic14Mnemonics[opcode]->isBitInst) + pcosubtype = newpCodeOp(p[1].pct[0].tok.s,PO_BIT); + else + pcosubtype = newpCodeOp(p[1].pct[0].tok.s,PO_GPR_REGISTER); + + + pci = PCI(newpCode(opcode, pcosubtype)); + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + + return pci; +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mem1a - convert assembly line type to a pCode */ +/* instruction with 1 wild operand. */ +/* */ +/* pp[0] - mnem */ +/* pp[1] - wild var */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem1a(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + int opcode; + + pCodeInstruction *pci=NULL; + pCodeOp *pcosubtype; + + DFPRINTF((stderr,"altpat_mnem1a %s var %d\n", p->pct[0].tok.s,p[1].pct[1].tok.n)); + + opcode = getpCode(p->pct[0].tok.s,0); + if(opcode < 0) { + int cmd_id = getpCodePeepCommand(p->pct[0].tok.s); + pCode *pc=NULL; + + if(cmd_id<0) { + fprintf(stderr, "Bad mnemonic\n"); + return NULL; + } + + if(p[0].pct[1].tok.n > pcwb->nwildpCodes) + pcwb->nwildpCodes = p[0].pct[1].tok.n; + + pc = newpCodeWild(p[1].pct[1].tok.n,NULL,NULL); + + switch(cmd_id) { + case NOTBITSKIP: + PCW(pc)->mustNotBeBitSkipInst = 1; + break; + case BITSKIP: + PCW(pc)->mustBeBitSkipInst = 1; + break; + case INVERTBITSKIP: + PCW(pc)->invertBitSkipInst = 1; + } + return pc; + } + + if(pic14Mnemonics[opcode]->isBitInst) + pcosubtype = newpCodeOpBit(NULL,-1,0); + else + pcosubtype = newpCodeOp(NULL,PO_GPR_REGISTER); + + + pci = PCI(newpCode(opcode, + newpCodeOpWild(p[1].pct[1].tok.n, pcwb, pcosubtype))); + + /* Save the index of the maximum wildcard variable */ + if(p[1].pct[1].tok.n > pcwb->nvars) + pcwb->nvars = p[1].pct[1].tok.n; + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + + return pci; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem1b(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + int opcode; + + pCodeInstruction *pci=NULL; + + DFPRINTF((stderr,"altpat_mnem1b %s var %d\n", p->pct[0].tok.s,p[1].pct[0].tok.n)); + + opcode = getpCode(p->pct[0].tok.s,0); + if(opcode < 0) { + fprintf(stderr, "Bad mnemonic\n"); + return NULL; + } + + pci = PCI(newpCode(opcode, newpCodeOpLit(p[1].pct[0].tok.n) )); + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + + return pci; +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mnem2 */ +/* */ +/* pp[0] - mnem */ +/* pp[1] - var */ +/* pp[2] - comma */ +/* pp[3] - destination */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem2(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + int opcode; + int dest; + + pCodeInstruction *pci=NULL; + pCodeOp *pcosubtype; + + dest = cvt_extract_destination(&p[3]); + + DFPRINTF((stderr,"altpat_mnem2 %s var %s destination %s(%d)\n", + p->pct[0].tok.s, + p[1].pct[0].tok.s, + p[3].pct[0].tok.s, + dest)); + + + opcode = getpCode(p->pct[0].tok.s,dest); + if(opcode < 0) { + fprintf(stderr, "Bad mnemonic\n"); + return NULL; + } + + if(pic14Mnemonics[opcode]->isBitInst) { + pcosubtype = cvt_extract_status(p[1].pct[0].tok.s, p[3].pct[0].tok.s); + if(pcosubtype == NULL) { + fprintf(stderr, "bad operand?\n"); + return NULL; + } + + } else + pcosubtype = newpCodeOp(p[1].pct[0].tok.s,PO_GPR_REGISTER); + + + pci = PCI(newpCode(opcode,pcosubtype)); + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + return pci; + +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mem2a - convert assembly line type to a pCode */ +/* instruction with 1 wild operand and a */ +/* destination operand (e.g. w or f) */ +/* */ +/* pp[0] - mnem */ +/* pp[1] - wild var */ +/* pp[2] - comma */ +/* pp[3] - destination */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem2a(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + int opcode; + int dest; + + pCodeInstruction *pci=NULL; + pCodeOp *pcosubtype; + + if(!pcwb) { + fprintf(stderr,"ERROR %s:%d - can't assemble line\n",__FILE__,__LINE__); + return NULL; + } + + dest = cvt_extract_destination(&p[3]); + + DFPRINTF((stderr,"altpat_mnem2a %s var %d destination %s(%d)\n", + p->pct[0].tok.s, + p[1].pct[1].tok.n, + p[3].pct[0].tok.s, + dest)); + + + opcode = getpCode(p->pct[0].tok.s,dest); + if(opcode < 0) { + fprintf(stderr, "Bad mnemonic\n"); + return NULL; + } + + if(pic14Mnemonics[opcode]->isBitInst) + pcosubtype = newpCodeOp(NULL,PO_BIT); + else + pcosubtype = newpCodeOp(NULL,PO_GPR_REGISTER); + + + pci = PCI(newpCode(opcode, + newpCodeOpWild(p[1].pct[1].tok.n, pcwb, pcosubtype))); + + /* Save the index of the maximum wildcard variable */ + if(p[1].pct[1].tok.n > pcwb->nvars) + pcwb->nvars = p[1].pct[1].tok.n; + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + return pci; + +} + + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mem3 - convert assembly line type to a pCode */ +/* This rule is for bsf/bcf type instructions */ +/* */ +/* */ +/* pp[0] - mnem */ +/* pp[1] - register */ +/* pp[2] - comma */ +/* pp[3] - number */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem3(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + int opcode; + int dest; // or could be bit position in the register + + pCodeInstruction *pci=NULL; + pCodeOp *pcosubtype=NULL; + + dest = cvt_extract_destination(&p[3]); + + DFPRINTF((stderr,"altpat_mnem3 %s var %s bit (%d)\n", + p->pct[0].tok.s, + p[1].pct[0].tok.s, + p[3].pct[0].tok.n)); + + + opcode = getpCode(p->pct[0].tok.s,0); + if(opcode < 0) { + fprintf(stderr, "Bad mnemonic\n"); + return NULL; + } + + + if(pic14Mnemonics[opcode]->isBitInst) { + //pcosubtype = cvt_extract_status(p[1].pct[0].tok.s, p[3].pct[0].tok.s); + + //if(pcosubtype == NULL) { + pcosubtype = newpCodeOpBit(p[1].pct[0].tok.s,p[3].pct[0].tok.n,0); + //} + } else + pcosubtype = newpCodeOp(p[1].pct[0].tok.s,PO_GPR_REGISTER); + + if(pcosubtype == NULL) { + fprintf(stderr, "Bad operand\n"); + return NULL; + } + + pci = PCI(newpCode(opcode, pcosubtype)); + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + return pci; + +} + +/*-----------------------------------------------------------------*/ +/* tokenizeLineNode - Convert a string (of char's) that was parsed */ +/* by SDCCpeeph.c into a string of tokens. */ +/* */ +/* */ +/* The tokenizer is of the classic type. When an item is encounterd*/ +/* it is converted into a token. The token is a structure that */ +/* encodes the item's type and it's value (when appropriate). */ +/* */ +/* Accepted token types: */ +/* SPACE NUMBER STRING % : , ; */ +/* */ +/* */ +/* */ +/*-----------------------------------------------------------------*/ + + +static void tokenizeLineNode(char *ln) +{ + char *lnstart=ln; + tokIdx = 0; // Starting off at the beginning + tokArr[0].tt = PCT_NULL; // and assume invalid character for first token. + + if(!ln || !*ln) + return; + + + while(*ln) { + + if(isspace((unsigned char)*ln)) { + // add a SPACE token and eat the extra spaces. + tokArr[tokIdx++].tt = PCT_SPACE; + while (isspace ((unsigned char)*ln)) + ln++; + continue; + } + + if(isdigit((unsigned char)*ln)) { + + tokArr[tokIdx].tt = PCT_NUMBER; + tokArr[tokIdx++].tok.n = strtol(ln, &ln, 0); + + continue; + + } + + switch(*ln) { + case '%': + tokArr[tokIdx++].tt = PCT_PERCENT; + break; + case '<': + tokArr[tokIdx++].tt = PCT_LESSTHAN; + break; + case '>': + tokArr[tokIdx++].tt = PCT_GREATERTHAN; + break; + case ':': + tokArr[tokIdx++].tt = PCT_COLON; + break; + case ';': + tokArr[tokIdx].tok.s = Safe_strdup(ln); + tokArr[tokIdx++].tt = PCT_COMMENT; + tokArr[tokIdx].tt = PCT_NULL; + return; + case ',': + tokArr[tokIdx++].tt = PCT_COMMA; + break; + + + default: + if(isalpha((unsigned char)*ln) || (*ln == '_') ) { + char buffer[50]; + int i=0; + + while( (isalpha((unsigned char)*ln) || isdigit((unsigned char)*ln) || (*ln == '_')) && i<49) + buffer[i++] = *ln++; + + ln--; + buffer[i] = 0; + + tokArr[tokIdx].tok.s = Safe_strdup(buffer); + tokArr[tokIdx++].tt = PCT_STRING; + + } else { + fprintf(stderr, "Error while parsing peep rules (check peeph.def)\n"); + fprintf(stderr, "Line: %s\n",lnstart); + fprintf(stderr, "Token: '%c'\n",*ln); + exit(1); + } + } + + /* Advance to next character in input string . + * Note, if none of the tests passed above, then + * we effectively ignore the `bad' character. + * Since the line has already been parsed by SDCCpeeph, + * chance are that there are no invalid characters... */ + + ln++; + + } + + tokArr[tokIdx].tt = 0; +} + + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ + + + +static void dump1Token(pCodeTokens tt) +{ + + switch(tt) { + case PCT_SPACE: + fprintf(stderr, " space "); + break; + case PCT_PERCENT: + fprintf(stderr, " pct %%"); + break; + case PCT_LESSTHAN: + fprintf(stderr, " pct <"); + break; + case PCT_GREATERTHAN: + fprintf(stderr, " pct >"); + break; + case PCT_COLON: + fprintf(stderr, " col :"); + break; + case PCT_COMMA: + fprintf(stderr, " comma , "); + break; + case PCT_COMMENT: + fprintf(stderr, " comment "); + //fprintf(stderr,"%s",tokArr[i].tok.s); + break; + case PCT_STRING: + fprintf(stderr, " str "); + //fprintf(stderr,"%s",tokArr[i].tok.s); + break; + case PCT_NUMBER: + fprintf(stderr, " num "); + //fprintf(stderr,"%d",tokArr[i].tok.n); + break; + case PCT_NULL: + fprintf(stderr, " null "); + + } + +} + + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ + +static int pcComparePattern(pCodeToken *pct, char *pat, int max_tokens) +{ + int i=0; + + if(!pct || !pat || !*pat) + return 0; + + //DFPRINTF((stderr,"comparing against:\n")); + + while(i < max_tokens) { + + if(*pat == 0){ + //DFPRINTF((stderr,"matched\n")); + return (i+1); + } + + //dump1Token(*pat); DFPRINTF((stderr,"\n")); + + if(pct->tt != *pat) + return 0; + + + pct++; + pat++; + } + + return 0; + +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ + +static int altComparePattern(char *pct, parsedPattern *pat, int max_tokens) +{ + int i=0; + + if(!pct || !pat || !*pct) + return 0; + + + while(i < max_tokens) { + + if(*pct == 0) { + //DFPRINTF((stderr,"matched\n")); + return i; + } + + //dump1Token(*pat); DFPRINTF((stderr,"\n")); + + if( !pat || !pat->pcp ) + return 0; + + if (pat->pcp->pt != *pct) + return 0; + + //DFPRINTF((stderr," pct=%d\n",*pct)); + pct++; + pat++; + i++; + } + + return 0; + +} +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ + +static int advTokIdx(int *v, int amt) +{ + + if((unsigned) (*v + amt) > tokIdx) + return 1; + + *v += amt; + return 0; + +} + +/*-----------------------------------------------------------------*/ +/* parseTokens - convert the tokens corresponding to a single line */ +/* of a peep hole assembly into a pCode object. */ +/* */ +/* */ +/* */ +/* */ +/* This is a simple parser that looks for strings of the type */ +/* allowed in the peep hole definition file. Essentially the format*/ +/* is the same as a line of assembly: */ +/* */ +/* label: mnemonic op1, op2, op3 ; comment */ +/* */ +/* Some of these items aren't present. It's the job of the parser */ +/* to determine which are and convert those into the appropriate */ +/* pcode. */ +/*-----------------------------------------------------------------*/ + +static int parseTokens(pCodeWildBlock *pcwb, pCode **pcret) +{ + pCode *pc; + int error = 0; + + if(!tokIdx) + return error; + +#ifdef PCODE_DEBUG + { + unsigned i; + for(i=0; i<=tokIdx; i++) + dump1Token(tokArr[i].tt); + fputc('\n',stderr); + } +#endif + + { + int lparsedPatIdx=0; + int lpcpIdx; + int ltokIdx =0; + int matching = 0; + int j=0; + int k=0; + + char * cPmnem = NULL; // Pointer to non-wild mnemonic (if any) + char * cP1stop = NULL; + char * cP2ndop = NULL; + + //pCodeOp *pcl = NULL; // Storage for a label + //pCodeOp *pco1 = NULL; // 1st operand + //pCodeOp *pco2 = NULL; // 2nd operand + //pCode *pc = NULL; // Mnemonic + + typedef enum { + PS_START, + PS_HAVE_LABEL, + PS_HAVE_MNEM, + PS_HAVE_1OPERAND, + PS_HAVE_COMMA, + PS_HAVE_2OPERANDS + } ParseStates; + + ParseStates state = PS_START; + + do { + + lpcpIdx=0; + matching = 0; + + if( ((tokArr[ltokIdx].tt == PCT_SPACE) ) + && (advTokIdx(<okIdx, 1)) ) // eat space + break; + + do { + j = pcComparePattern(&tokArr[ltokIdx], pcpArr[lpcpIdx].tokens, tokIdx +1); + if( j ) { + + switch(pcpArr[lpcpIdx].pt) { + case PCP_LABEL: + if(state == PS_START){ + DFPRINTF((stderr," label\n")); + state = PS_HAVE_LABEL; + } else + DFPRINTF((stderr," bad state (%d) for label\n",state)); + break; + + case PCP_STR: + DFPRINTF((stderr," %s is",tokArr[ltokIdx].tok.s)); + switch(state) { + case PS_START: + case PS_HAVE_LABEL: + DFPRINTF((stderr," mnem\n")); + cPmnem = tokArr[ltokIdx].tok.s; + state = PS_HAVE_MNEM; + break; + case PS_HAVE_MNEM: + DFPRINTF((stderr," 1st operand\n")); + cP1stop = tokArr[ltokIdx].tok.s; + //pco1 = newpCodeOp(NULL,PO_GPR_REGISTER); + state = PS_HAVE_1OPERAND; + break; + case PS_HAVE_1OPERAND: + DFPRINTF((stderr," error expecting comma\n")); + break; + case PS_HAVE_COMMA: + DFPRINTF((stderr," 2 operands\n")); + cP2ndop = tokArr[ltokIdx].tok.s; + break; + case PS_HAVE_2OPERANDS: + break; + } + break; + + case PCP_WILDVAR: + switch(state) { + case PS_START: + case PS_HAVE_LABEL: + DFPRINTF((stderr," wild mnem\n")); + state = PS_HAVE_MNEM; + break; + case PS_HAVE_MNEM: + DFPRINTF((stderr," 1st operand is wild\n")); + state = PS_HAVE_1OPERAND; + break; + case PS_HAVE_1OPERAND: + DFPRINTF((stderr," error expecting comma\n")); + break; + case PS_HAVE_COMMA: + DFPRINTF((stderr," 2nd operand is wild\n")); + break; + case PS_HAVE_2OPERANDS: + break; + } + break; + + case PCP_NUMBER: + switch(state) { + case PS_START: + case PS_HAVE_LABEL: + fprintf(stderr," ERROR number\n"); + break; + case PS_HAVE_MNEM: + DFPRINTF((stderr," 1st operand is a number\n")); + state = PS_HAVE_1OPERAND; + break; + case PS_HAVE_1OPERAND: + fprintf(stderr," error expecting comma\n"); + break; + case PS_HAVE_COMMA: + DFPRINTF((stderr," 2nd operand is a number\n")); + break; + case PS_HAVE_2OPERANDS: + break; + } + break; + + case PCP_WILDSTR: + break; + case PCP_COMMA: + if(state == PS_HAVE_1OPERAND){ + DFPRINTF((stderr," got a comma\n")); + state = PS_HAVE_COMMA; + } else + fprintf(stderr," unexpected comma\n"); + break; + + } + + matching = 1; + parsedPatArr[lparsedPatIdx].pcp = &pcpArr[lpcpIdx]; + parsedPatArr[lparsedPatIdx].pct = &tokArr[ltokIdx]; + lparsedPatIdx++; + + //dump1Token(tokArr[ltokIdx].tt); + + if(advTokIdx(<okIdx, strlen(pcpArr[lpcpIdx].tokens) ) ) { + DFPRINTF((stderr," reached end \n")); + matching = 0; + //return; + } + } + + + } while ((++lpcpIdx < PCPATTERNS) && !matching); + + } while (matching); + + parsedPatArr[lparsedPatIdx].pcp = NULL; + parsedPatArr[lparsedPatIdx].pct = NULL; + + j=k=0; + do { + int c; + + if( (c=altComparePattern( altArr[k].tokens, &parsedPatArr[j],10) ) ) { + + if( altArr[k].f) { + pc = altArr[k].f(&parsedPatArr[j],pcwb); + //if(pc && pc->print) + // pc->print(stderr,pc); + //if(pc && pc->destruct) pc->destruct(pc); dumps core? + + if(pc) { + if (pcret) { + *pcret = pc; + return 0; // Only accept one line for now. + } else + addpCode2pBlock(pcwb->pb, pc); + } else + error++; + } + j += c; + } + k++; + } + while(j<=lparsedPatIdx && kf ) + parsedPatArr[j].pcp->f(&parsedPatArr[j]); + DFPRINTF((stderr," %d",parsedPatArr[j].pcp->pt)); + j++; + } + while(jnext) { + + //DFPRINTF((stderr,"%s\n",ln->line)); + + tokenizeLineNode(ln->line); + + if(parseTokens(pcwb,NULL)) { + int i; + fprintf(stderr,"ERROR assembling line:\n%s\n",ln->line); + fprintf(stderr,"Tokens:\n"); + for(i=0; i<5; i++) + dump1Token(tokArr[i].tt); + fputc('\n',stderr); + exit (1); + } + } +} + +/*-----------------------------------------------------------------*/ +/* peepRuleCondition */ +/*-----------------------------------------------------------------*/ +static void peepRuleCondition(char *cond, pCodePeep *pcp) +{ + if(!cond || !pcp) + return; + + //DFPRINTF((stderr,"\nCondition: %s\n",cond)); + /* brute force compares for now */ + + if(STRCASECMP(cond, "NZ") == 0) { + //DFPRINTF((stderr,"found NZ\n")); + pcp->postFalseCond = PCC_Z; + + } + +} + +static void initpCodeWildBlock(pCodeWildBlock *pcwb) +{ + + // pcwb = Safe_calloc(1,sizeof(pCodeWildBlock)); + + if(!pcwb) + return; + + pcwb->vars = NULL; + pcwb->wildpCodes = NULL; + pcwb->wildpCodeOps = NULL; + + pcwb->nvars = 0; + pcwb->nwildpCodes = 0; + pcwb->nops = 0; + +} + +static void postinit_pCodeWildBlock(pCodeWildBlock *pcwb) +{ + + if(!pcwb) + return; + + pcwb->nvars+=2; + pcwb->nops = pcwb->nvars; + + pcwb->vars = Safe_calloc(pcwb->nvars, sizeof(char *)); + pcwb->wildpCodeOps = Safe_calloc(pcwb->nvars, sizeof(pCodeOp *)); + + pcwb->nwildpCodes+=2; + pcwb->wildpCodes = Safe_calloc(pcwb->nwildpCodes, sizeof(pCode *)); + +} + +static void initpCodePeep(pCodePeep *pcp) +{ + + // pcwb = Safe_calloc(1,sizeof(pCodeWildBlock)); + + if(!pcp) + return; + + initpCodeWildBlock(&pcp->target); + pcp->target.pb = newpCodeChain(NULL, 'W', NULL); + + initpCodeWildBlock(&pcp->replace); + pcp->replace.pb = newpCodeChain(NULL, 'W', NULL); + +} + +/*-----------------------------------------------------------------*/ +/* peepRules2pCode - parse the "parsed" peep hole rules to generate*/ +/* pCode. */ +/* */ +/* SDCCpeeph parses the peep rules file and extracts variables, */ +/* removes white space, and checks the syntax. This function */ +/* extends that processing to produce pCode objects. You can kind */ +/* think of this function as an "assembler", though instead of */ +/* taking raw text to produce machine code, it produces pCode. */ +/* */ +/*-----------------------------------------------------------------*/ +void peepRules2pCode(peepRule *rules) +{ + peepRule *pr; + + pCodePeep *currentRule; + pCodePeepSnippets *pcps; + + pic14initpCodePeepCommands(); + + /* The rules are in a linked-list. Each rule has two portions */ + /* There's the `target' and there's the `replace'. The target */ + /* is compared against the SDCC generated code and if it */ + /* matches, it gets replaced by the `replace' block of code. */ + /* */ + /* Here we loop through each rule and convert the target's and*/ + /* replace's into pCode target and replace blocks */ + + for (pr = rules; pr; pr = pr->next) { + + //DFPRINTF((stderr,"\nRule:\n\n")); + + pcps = Safe_calloc(1,sizeof(pCodePeepSnippets)); + peepSnippets = DLL_append((_DLL*)peepSnippets,(_DLL*)pcps); + + currentRule = pcps->peep = Safe_calloc(1,sizeof(pCodePeep)); + initpCodePeep(currentRule); + + /* Convert the target block */ + peepRuleBlock2pCodeBlock(pr->match, ¤tRule->target); + + //DFPRINTF((stderr,"finished target, here it is in pcode form:\n")); + //printpBlock(stderr, currentRule->target.pb); + + pBlockMergeLabels(currentRule->target.pb); + //printpBlock(stderr, currentRule->replace.pb); + + /* Convert the replace block */ + peepRuleBlock2pCodeBlock(pr->replace, ¤tRule->replace); + + //DFPRINTF((stderr,"replace with labels merged:\n")); + + pBlockMergeLabels(currentRule->replace.pb); + //printpBlock(stderr, currentRule->replace.pb); + + peepRuleCondition(pr->cond,currentRule); + + /* The rule has been converted to pCode. Now allocate + * space for the wildcards */ + + postinit_pCodeWildBlock(¤tRule->target); + postinit_pCodeWildBlock(¤tRule->replace); + + //return; // debug ... don't want to go through all the rules yet + } + + { + pCodePeep *peepBlock; + _DLL *peeprules; + + peeprules = (_DLL *)peepSnippets; + //fprintf(stderr,"target rules\n"); + while(peeprules) { + //fprintf(stderr," rule:\n"); + peepBlock = ((pCodePeepSnippets*)peeprules)->peep; + //printpBlock(stderr, peepBlock->target.pb); + peeprules = peeprules->next; + } + //fprintf(stderr," ... done\n"); + } + +} + +/*-----------------------------------------------------------------*/ +/* _DLL * DLL_append */ +/* */ +/* Append a _DLL object to the end of a _DLL (doubly linked list) */ +/* If The list to which we want to append is non-existant then one */ +/* is created. Other wise, the end of the list is sought out and */ +/* a new DLL object is appended to it. In either case, the void */ +/* *data is added to the newly created DLL object. */ +/*-----------------------------------------------------------------*/ + +static void * DLL_append(_DLL *list, _DLL *next) +{ + _DLL *b; + + + /* If there's no list, then create one: */ + if(!list) { + next->next = next->prev = NULL; + return next; + } + + + /* Search for the end of the list. */ + b = list; + while(b->next) + b = b->next; + + /* Now append the new DLL object */ + b->next = next; + b->next->prev = b; + b = b->next; + b->next = NULL; + + return list; + +} + + +/*----------------------------------------------------------------- + + pCode peephole optimization + + + The pCode "peep hole" optimization is not too unlike the peep hole + optimization in SDCCpeeph.c. The major difference is that here we + use pCode's whereas there we use ASCII strings. The advantage with + pCode's is that we can ascertain flow information in the instructions + being optimized. + + + - elaborate... + +-----------------------------------------------------------------*/ + + + +/*-----------------------------------------------------------------*/ +/* pCodeSearchCondition - Search a pCode chain for a 'condition' */ +/* */ +/* return conditions */ +/* 1 - The Condition was found for a pCode's input */ +/* 0 - No matching condition was found for the whole chain */ +/* -1 - The Condition was found for a pCode's output */ +/* */ +/*-----------------------------------------------------------------*/ +int pCodeSearchCondition(pCode *pc, unsigned int cond, int contIfSkip) +{ + while(pc) { + + /* If we reach a function end (presumably an end since we most + probably began the search in the middle of a function), then + the condition was not found. */ + if(pc->type == PC_FUNCTION) + return 0; + + if(pc->type == PC_OPCODE) { + if(PCI(pc)->inCond & cond) { + if (contIfSkip) { + /* If previous instruction is a skip then continue search as condiction is not certain */ + pCode *pcp = findPrevInstruction(pc->prev); + if (pcp && !isPCI_SKIP(pcp)) { + return 1; + } + } else { + return 1; + } + } + if(PCI(pc)->outCond & cond) { + if (contIfSkip) { + /* If previous instruction is a skip then continue search as condiction is not certain */ + pCode *pcp = findPrevInstruction(pc->prev); + if (pcp && !isPCI_SKIP(pcp)) { + return -1; + } + } else { + return -1; + } + } + } + + pc = pc->next; + } + + return 0; +} + +/*----------------------------------------------------------------- +* int pCodeOpCompare(pCodeOp *pcops, pCodeOp *pcopd) +* +* Compare two pCodeOp's and return 1 if they're the same +*-----------------------------------------------------------------*/ +static int pCodeOpCompare(pCodeOp *pcops, pCodeOp *pcopd) +{ + char b[50], *n2; + + if(!pcops || !pcopd) + return 0; + /* + fprintf(stderr," Comparing operands %s", + get_op( pcops,NULL,0)); + + fprintf(stderr," to %s\n", + get_op( pcopd,NULL,0)); + */ + + if(pcops->type != pcopd->type) { + //fprintf(stderr," - fail - diff types\n"); + return 0; // different types + } + + if(pcops->type == PO_LITERAL) { + + if((PCOL(pcops)->lit >= 0) && (PCOL(pcops)->lit == PCOL(pcopd)->lit)) + return 1; + + return 0; + } + + b[0]=0; + get_op(pcops,b,50); + + n2 = get_op(pcopd,NULL,0); + + if( !n2 || strcmp(b,n2)) { + //fprintf(stderr," - fail - diff names: %s, len=%d, %s, len=%d\n",b,strlen(b), n2, strlen(n2) ); + return 0; // different names + } + + switch(pcops->type) { + case PO_DIR: + if( PCOR(pcops)->instance != PCOR(pcopd)->instance) { + //fprintf(stderr, " - fail different instances\n"); + return 0; + } + break; + default: + break; + } + + //fprintf(stderr," - pass\n"); + + return 1; +} + +static int pCodePeepMatchLabels(pCodePeep *peepBlock, pCode *pcs, pCode *pcd) +{ + int labindex; + + /* Check for a label associated with this wild pCode */ + // If the wild card has a label, make sure the source code does too. + if(PCI(pcd)->label) { + pCode *pcl = PCI(pcd)->label->pc; + +#ifdef PCODE_DEBUG + int li = -PCL(pcl)->key; + + if(peepBlock->target.vars[li] == NULL) { + if(PCI(pcs)->label) { + DFPRINTF((stderr,"first time for a label: %d %s\n",li,PCL(PCI(pcs)->label->pc)->label)); + } + } else { + // DFPRINTF((stderr,"label id = %d \n",PCL(PCI(pcd)->label->pc)->key)); + DFPRINTF((stderr," label id: %d %s\n",li,peepBlock->target.vars[li])); + if(PCI(pcs)->label) { + DFPRINTF((stderr," src %s\n",PCL(PCI(pcs)->label->pc)->label)); + } + } +#endif + + + if(!PCI(pcs)->label) + return 0; + + labindex = -PCL(pcl)->key; + if(peepBlock->target.vars[labindex] == NULL) { + // First time to encounter this label + peepBlock->target.vars[labindex] = PCL(PCI(pcs)->label->pc)->label; + DFPRINTF((stderr,"first time for a label: %d %s\n",labindex,PCL(PCI(pcs)->label->pc)->label)); + + } else { + if(strcmp(peepBlock->target.vars[labindex],PCL(PCI(pcs)->label->pc)->label) != 0) { + DFPRINTF((stderr,"labels don't match dest %s != src %s\n",peepBlock->target.vars[labindex],PCL(PCI(pcs)->label->pc)->label)); + return 0; + } + DFPRINTF((stderr,"matched a label %d %s -hey\n",labindex,peepBlock->target.vars[labindex])); + } + } else { + //DFPRINTF((stderr,"destination doesn't have a label\n")); + + if(PCI(pcs)->label) + return 0; + + //DFPRINTF((stderr,"neither src nor dest have labels\n")); + + } + + return 1; + +} + +/*-----------------------------------------------------------------*/ +/* pCodePeepMatchLine - Compare source and destination pCodes to */ +/* see they're the same. */ +/* */ +/* In this context, "source" refers to the coded generated by gen.c*/ +/* and "destination" refers to a pcode in a peep rule. If the dest-*/ +/* ination has no wild cards, then MatchLine will compare the two */ +/* pcodes (src and dest) for a one-to-one match. If the destination*/ +/* has wildcards, then those get expanded. When a wild card is */ +/* encountered for the first time it autmatically is considered a */ +/* match and the object that matches it is referenced in the */ +/* variables or opcodes array (depending on the type of match). */ +/* */ +/* */ +/* Inputs: */ +/* *peepBlock - A pointer to the peepBlock that contains the */ +/* entire rule to which the destination pcode belongs*/ +/* *pcs - a pointer to the source pcode */ +/* *pcd - a pointer to the destination pcode */ +/* */ +/* Returns: */ +/* 1 - pcodes match */ +/* 0 - pcodes don't match */ +/* */ +/* */ +/*-----------------------------------------------------------------*/ + +static int pCodePeepMatchLine(pCodePeep *peepBlock, pCode *pcs, pCode *pcd) +{ + int index; // index into wild card arrays + + /* one-for-one match. Here the source and destination opcodes + * are not wild. However, there may be a label or a wild operand */ + + if(pcs) { + if(PCI(pcs)->label) { + DFPRINTF((stderr,"Match line source label: %s\n",PCL(PCI(pcs)->label->pc)->label)); + } + } + + if(pcs->type == pcd->type) { + + if(pcs->type == PC_OPCODE) { + + /* If the opcodes don't match then the line doesn't match */ + if(PCI(pcs)->op != PCI(pcd)->op) + return 0; + +#ifdef PCODE_DEBUG + DFPRINTF((stderr,"%s comparing\n",__FUNCTION__)); + pcs->print(stderr,pcs); + pcd->print(stderr,pcd); +#endif + + if(!pCodePeepMatchLabels(peepBlock, pcs, pcd)) + return 0; + + /* Compare the operands */ + if(PCI(pcd)->pcop) { + // Volatile types should not be deleted or modified, these include SFR, externs and publics + // They can be used as a matched, however if a match is found then the optimiser intends + // to change some aspect of a block of code, which is most likely a critcal one. As this + // method of optimisation does not allow a means to distiguishing what may change, it is + // best to just negate any match. + if (PCI(pcs)->pcop) { + struct regs *r; + pCodeOp *pcop = PCI(pcs)->pcop; + switch(pcop->type) { + case PO_W: + case PO_STATUS: + case PO_FSR: + case PO_INDF: + case PO_INTCON: + case PO_PCL: + case PO_PCLATH: + case PO_SFR_REGISTER: + return 0; // SFR - do not modify + case PO_DIR: + case PO_GPR_REGISTER: + case PO_GPR_BIT: + case PO_GPR_TEMP: + case PO_GPR_POINTER: + r = PCOR(pcop)->r; + if (r->isPublic||r->isExtern||r->isFixed) // Changes to these types of registers should not be changed as they may be used else where + return 0; + default: + break; + } + } + if (PCI(pcd)->pcop->type == PO_WILD) { + char *n; + index = PCOW(PCI(pcd)->pcop)->id; + //DFPRINTF((stderr,"destination is wild\n")); +#ifdef DEBUG_PCODEPEEP + if (index > peepBlock->nops) { + DFPRINTF((stderr,"%s - variables exceeded\n",__FUNCTION__)); + exit(1); + } +#endif + n = PCI(pcs)->pcop->name; + if(peepBlock->target.vars[index]) { + if ((!n)||(strcmp(peepBlock->target.vars[index],n) != 0)) + return 0; // variable is different + } else { + DFPRINTF((stderr,"first time for a variable: %d, %s\n",index,n)); + peepBlock->target.vars[index] = n; + } + + PCOW(PCI(pcd)->pcop)->matched = PCI(pcs)->pcop; + if(!peepBlock->target.wildpCodeOps[index]) { + peepBlock->target.wildpCodeOps[index] = PCI(pcs)->pcop; + + //fprintf(stderr, "first time for wild opcode #%d\n",index); + return 1; + + } else { + /* + pcs->print(stderr,pcs); + pcd->print(stderr,pcd); + fprintf(stderr, "comparing operands of these instructions, result %d\n", + pCodeOpCompare(PCI(pcs)->pcop, peepBlock->target.wildpCodeOps[index]) + ); + */ + + return pCodeOpCompare(PCI(pcs)->pcop, peepBlock->target.wildpCodeOps[index]); + } + /* + { + char *n; + + switch(PCI(pcs)->pcop->type) { + case PO_GPR_TEMP: + case PO_FSR: + //case PO_INDF: + //n = PCOR(PCI(pcs)->pcop)->r->name; + n = PCI(pcs)->pcop->name; + + break; + default: + n = PCI(pcs)->pcop->name; + } + + if(peepBlock->target.vars[index]) + return (strcmp(peepBlock->target.vars[index],n) == 0); + else { + DFPRINTF((stderr,"first time for a variable: %d, %s\n",index,n)); + peepBlock->target.vars[index] = n; + return 1; + } + } + */ + } else if (PCI(pcd)->pcop->type == PO_LITERAL) { + /* + pcs->print(stderr,pcs); + pcd->print(stderr,pcd); + + fprintf(stderr, "comparing literal operands of these instructions, result %d\n", + pCodeOpCompare(PCI(pcs)->pcop, PCI(pcd)->pcop)); + */ + return pCodeOpCompare(PCI(pcs)->pcop, PCI(pcd)->pcop); + + } else { + /* FIXME - need an else to check the case when the destination + * isn't a wild card */ + /* + fprintf(stderr, "Destination is not wild: operand compare =%d\n", + pCodeOpCompare(PCI(pcs)->pcop, PCI(pcd)->pcop)); + */ + return pCodeOpCompare(PCI(pcs)->pcop, PCI(pcd)->pcop); + + } + } else + /* The pcd has no operand. Lines match if pcs has no operand either*/ + return (PCI(pcs)->pcop == NULL); + } + } + + /* Compare a wild instruction to a regular one. */ + + if((pcd->type == PC_WILD) && (pcs->type == PC_OPCODE)) { + + index = PCW(pcd)->id; +#ifdef PCODE_DEBUG + DFPRINTF((stderr,"%s comparing wild cards\n",__FUNCTION__)); + pcs->print(stderr,pcs); + pcd->print(stderr,pcd); +#endif + peepBlock->target.wildpCodes[PCW(pcd)->id] = pcs; + + if(!pCodePeepMatchLabels(peepBlock, pcs, pcd)) { + DFPRINTF((stderr," Failing because labels don't match\n")); + return 0; + } + + if(PCW(pcd)->mustBeBitSkipInst & !(PCI(pcs)->isBitInst && PCI(pcs)->isSkip)) { + // doesn't match because the wild pcode must be a bit skip + DFPRINTF((stderr," Failing match because bit skip is req\n")); + //pcd->print(stderr,pcd); + //pcs->print(stderr,pcs); + return 0; + } + + if(PCW(pcd)->mustNotBeBitSkipInst & (PCI(pcs)->isBitInst && PCI(pcs)->isSkip)) { + // doesn't match because the wild pcode must *not* be a bit skip + DFPRINTF((stderr," Failing match because shouldn't be bit skip\n")); + //pcd->print(stderr,pcd); + //pcs->print(stderr,pcs); + return 0; + } + + if(PCW(pcd)->operand) { + PCOW(PCI(pcd)->pcop)->matched = PCI(pcs)->pcop; + if(peepBlock->target.vars[index]) { + int i = (strcmp(peepBlock->target.vars[index],PCI(pcs)->pcop->name) == 0); +#ifdef PCODE_DEBUG + + if(i) + DFPRINTF((stderr," (matched)\n")); + else { + DFPRINTF((stderr," (no match: wild card operand mismatch\n")); + DFPRINTF((stderr," peepblock= %s, pcodeop= %s\n", + peepBlock->target.vars[index], + PCI(pcs)->pcop->name)); + } +#endif + return i; + } else { + DFPRINTF((stderr," (matched %s\n",PCI(pcs)->pcop->name)); + peepBlock->target.vars[index] = PCI(pcs)->pcop->name; + return 1; + } + } + + pcs = findNextInstruction(pcs->next); + if(pcs) { + //DFPRINTF((stderr," (next to match)\n")); + //pcs->print(stderr,pcs); + } else if(pcd->next) { + /* oops, we ran out of code, but there's more to the rule */ + return 0; + } + + return 1; /* wild card matches */ + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void pCodePeepClrVars(pCodePeep *pcp) +{ + + int i; + if(!pcp) + return; + /* + DFPRINTF((stderr," Clearing peep rule vars\n")); + DFPRINTF((stderr," %d %d %d %d %d %d\n", + pcp->target.nvars,pcp->target.nops,pcp->target.nwildpCodes, + pcp->replace.nvars,pcp->replace.nops,pcp->replace.nwildpCodes)); + */ + for(i=0;itarget.nvars; i++) + pcp->target.vars[i] = NULL; + for(i=0;itarget.nops; i++) + pcp->target.wildpCodeOps[i] = NULL; + for(i=0;itarget.nwildpCodes; i++) + pcp->target.wildpCodes[i] = NULL; + + for(i=0;ireplace.nvars; i++) + pcp->replace.vars[i] = NULL; + for(i=0;ireplace.nops; i++) + pcp->replace.wildpCodeOps[i] = NULL; + for(i=0;ireplace.nwildpCodes; i++) + pcp->replace.wildpCodes[i] = NULL; + + + +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +int pCodePeepMatchRule(pCode *pc) +{ + pCodePeep *peepBlock; + pCode *pct, *pcin; + pCodeCSource *pc_cline=NULL; + _DLL *peeprules; + int matched; + + peeprules = (_DLL *)peepSnippets; + + while(peeprules) { + peepBlock = ((pCodePeepSnippets*)peeprules)->peep; + + if(!peepBlock || /*!peepBlock->target ||*/ !peepBlock->target.pb->pcHead) { + fprintf(stderr, "skipping rule because target pb is NULL\n"); + goto next_rule; + } + + pCodePeepClrVars(peepBlock); + /* + pcin = pc; + if(IS_PCCOMMENT(pcin)) + pc = pcin = findNextInstruction(pcin->next); + */ + pcin = pc = findNextInstruction(pc); + + pct = peepBlock->target.pb->pcHead; +#ifdef PCODE_DEBUG + { + pCode *pcr = peepBlock->replace.pb->pcHead; + if(pcr) pct->print(stderr,pcr); + } +#endif + matched = 0; + while(pct && pcin) { + + if(! (matched = pCodePeepMatchLine(peepBlock, pcin,pct))) + break; + + pcin = findNextInstruction(pcin->next); + pct = pct->next; + //debug: + //DFPRINTF((stderr," matched\n")); + + if(!pcin && pct) { + DFPRINTF((stderr," partial match... no more code\n")); + matched = 0; + } + if(!pct) { + DFPRINTF((stderr," end of rule\n")); + } + } + + if(matched && pcin) { + + /* So far we matched the rule up to the point of the conditions . + * In other words, all of the opcodes match. Now we need to see + * if the post conditions are satisfied. + * First we check the 'postFalseCond'. This means that we check + * to see if any of the subsequent pCode's in the pCode chain + * following the point just past where we have matched depend on + * the `postFalseCond' as input then we abort the match + */ + DFPRINTF((stderr," matched rule so far, now checking conditions\n")); + //pcin->print(stderr,pcin); + + if (pcin && peepBlock->postFalseCond && + (pCodeSearchCondition(pcin,peepBlock->postFalseCond,0) > 0) ) + matched = 0; + + //fprintf(stderr," condition results = %d\n",pCodeSearchCondition(pcin,peepBlock->postFalseCond)); + + + //if(!matched) fprintf(stderr,"failed on conditions\n"); + } + + if(matched) { + + pCode *pcprev; + pCode *pcr, *pcout; + + + /* We matched a rule! Now we have to go through and remove the + inefficient code with the optimized version */ +#ifdef PCODE_DEBUG + DFPRINTF((stderr, "Found a pcode peep match:\nRule:\n")); + //printpCodeString(stderr,peepBlock->target.pb->pcHead,10); + DFPRINTF((stderr,"first thing matched\n")); + pc->print(stderr,pc); + if(pcin) { + DFPRINTF((stderr,"last thing matched\n")); + pcin->print(stderr,pcin); + } +#endif + + + /* Unlink the original code */ + pcout = pc; + pcprev = pc->prev; + pcprev->next = pcin; + if(pcin) + pcin->prev = pc->prev; + + +#if 0 + { + /* DEBUG */ + /* Converted the deleted pCodes into comments */ + + char buf[256]; + pCodeCSource *pc_cline2=NULL; + + buf[0] = ';'; + buf[1] = '#'; + + while(pc && pc!=pcin) { + + if(pc->type == PC_OPCODE && PCI(pc)->cline) { + if(pc_cline) { + pc_cline2->pc.next = PCODE(PCI(pc)->cline); + pc_cline2 = PCCS(pc_cline2->pc.next); + } else { + pc_cline = pc_cline2 = PCI(pc)->cline; + pc_cline->pc.seq = pc->seq; + } + } + + pCode2str(&buf[2], 254, pc); + pCodeInsertAfter(pcprev, newpCodeCharP(buf)); + pcprev = pcprev->next; + pc = pc->next; + + } + if(pc_cline2) + pc_cline2->pc.next = NULL; + } +#endif + + if(pcin) + pCodeDeleteChain(pc,pcin); + + /* Generate the replacement code */ + pc = pcprev; + pcr = peepBlock->replace.pb->pcHead; // This is the replacement code + while (pcr) { + pCodeOp *pcop=NULL; + + /* If the replace pcode is an instruction with an operand, */ + /* then duplicate the operand (and expand wild cards in the process). */ + if(pcr->type == PC_OPCODE) { + if(PCI(pcr)->pcop) { + /* The replacing instruction has an operand. + * Is it wild? */ + if(PCI(pcr)->pcop->type == PO_WILD) { + int index = PCOW(PCI(pcr)->pcop)->id; + //DFPRINTF((stderr,"copying wildopcode\n")); + if(peepBlock->target.wildpCodeOps[index]) + pcop = pCodeOpCopy(peepBlock->target.wildpCodeOps[index]); + else + DFPRINTF((stderr,"error, wildopcode in replace but not source?\n")); + } else + pcop = pCodeOpCopy(PCI(pcr)->pcop); + } + //DFPRINTF((stderr,"inserting pCode\n")); + pCodeInsertAfter(pc, newpCode(PCI(pcr)->op,pcop)); + } else if (pcr->type == PC_WILD) { + if(PCW(pcr)->invertBitSkipInst) + DFPRINTF((stderr,"We need to invert the bit skip instruction\n")); + pCodeInsertAfter(pc, + pCodeInstructionCopy(PCI(peepBlock->target.wildpCodes[PCW(pcr)->id]), + PCW(pcr)->invertBitSkipInst)); + } else if (pcr->type == PC_COMMENT) { + pCodeInsertAfter(pc, newpCodeCharP( ((pCodeComment *)(pcr))->comment)); + } + + pc = pc->next; +#ifdef PCODE_DEBUG + DFPRINTF((stderr," NEW Code:")); + if(pc) pc->print(stderr,pc); +#endif + pcr = pcr->next; + } + + /* We have just replaced the inefficient code with the rule. + * Now, we need to re-add the C-source symbols if there are any */ + pc = pcprev; + while(pc && pc_cline ) { + + pc = findNextInstruction(pc->next); + if (!pc) break; + PCI(pc)->cline = pc_cline; + pc_cline = PCCS(pc_cline->pc.next); + + } + + /* Copy C code comments to new code. */ + pc = pcprev->next; + if (pc) { + for (; pc && pcout!=pcin; pcout=pcout->next) { + if (pcout->type==PC_OPCODE && PCI(pcout)->cline) { + while (pc->type!=PC_OPCODE || PCI(pc)->cline) { + pc = pc->next; + if (!pc) + break; + } + if (!pc) break; + PCI(pc)->cline = PCI(pcout)->cline; + } + } + } + + return 1; + } +next_rule: + peeprules = peeprules->next; + } + DFPRINTF((stderr," no rule matched\n")); + + return 0; +} diff --git a/src/pic/pcoderegs.c b/src/pic/pcoderegs.c new file mode 100644 index 0000000..c115b32 --- /dev/null +++ b/src/pic/pcoderegs.c @@ -0,0 +1,802 @@ +/*------------------------------------------------------------------------- + + pcoderegs.c - post code generation register optimizations + + Written By - Scott Dattalo scott@dattalo.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +-------------------------------------------------------------------------*/ + +/* +pcoderegs.c + + The purpose of the code in this file is to optimize the register usage. + +*/ + +#include "main.h" +#include "pcoderegs.h" +#include "pcodeflow.h" +#include "ralloc.h" + + +static int total_registers_saved=0; +static int register_optimization=1; + +/*-----------------------------------------------------------------* +* void pCodeRegMapLiveRangesInFlow(pCodeFlow *pcfl) +*-----------------------------------------------------------------*/ +static void pCodeRegMapLiveRangesInFlow(pCodeFlow *pcfl) +{ + + pCode *pc=NULL; + + regs *reg; + + if(!pcfl) + return; + + + pc = findNextInstruction(pcfl->pc.next); + + while(pc && !isPCFL(pc)) { + while (pc && !isPCI(pc) && !isPCFL(pc)) + { + pc = pc->next; + } // while + if (!pc || isPCFL(pc)) continue; + assert( isPCI(pc) ); + + reg = getRegFromInstruction(pc); + #if 0 + pc->print(stderr, pc); + fprintf( stderr, "--> reg %p (%s,%u), inCond/outCond: %x/%x\n", + reg, reg ? reg->name : "(null)", reg ? reg->rIdx : -1, + PCI(pc)->inCond, PCI(pc)->outCond ); + #endif + if(reg) { + /* + fprintf(stderr, "flow seq %d, inst seq %d %s ",PCODE(pcfl)->seq,pc->seq,reg->name); + fprintf(stderr, "addr = 0x%03x, type = %d rIdx=0x%03x\n", + reg->address,reg->type,reg->rIdx); + */ + + addSetIfnotP(& (PCFL(pcfl)->registers), reg); + + if(PCC_REGISTER & PCI(pc)->inCond) + addSetIfnotP(& (reg->reglives.usedpFlows), pcfl); + + if(PCC_REGISTER & PCI(pc)->outCond) + addSetIfnotP(& (reg->reglives.assignedpFlows), pcfl); + + addSetIfnotP(& (reg->reglives.usedpCodes), pc); + reg->wasUsed = 1; + } + + + //pc = findNextInstruction(pc->next); + pc = pc->next; + + } + +} + +/*-----------------------------------------------------------------* +* void pCodeRegMapLiveRanges(pBlock *pb) +*-----------------------------------------------------------------*/ +void pCodeRegMapLiveRanges(pBlock *pb) +{ + pCode *pcflow; + + for( pcflow = findNextpCode(pb->pcHead, PC_FLOW); + pcflow != NULL; + pcflow = findNextpCode(pcflow->next, PC_FLOW) ) { + + if(!isPCFL(pcflow)) { + fprintf(stderr, "pCodeRegMapLiveRanges - pcflow is not a flow object "); + continue; + } + pCodeRegMapLiveRangesInFlow(PCFL(pcflow)); + } + +#if 0 + for( pcflow = findNextpCode(pb->pcHead, PC_FLOW); + pcflow != NULL; + pcflow = findNextpCode(pcflow->next, PC_FLOW) ) { + + regs *r = setFirstItem(PCFL(pcflow)->registers); + fprintf(stderr,"flow seq %d\n", pcflow->seq); + + while (r) { + fprintf(stderr, " %s\n",r->name); + r = setNextItem(PCFL(pcflow)->registers); + + } + + } +#endif + +} + + +/*-----------------------------------------------------------------* +* +*-----------------------------------------------------------------*/ +static void Remove1pcode(pCode *pc, regs *reg, int debug_code) +{ + + pCode *pcn=NULL; + + if(!reg || !pc) + return; + + deleteSetItem (&(reg->reglives.usedpCodes),pc); + + if(PCI(pc)->label) { + pcn = findNextInstruction(pc->next); + + if(pcn) + PCI(pcn)->label = pBranchAppend(PCI(pcn)->label,PCI(pc)->label); + } + + if(PCI(pc)->cline) { + if(!pcn) + pcn = findNextInstruction(pc->next); + + if(pcn) { + if(PCI(pcn)->cline) { + //fprintf(stderr, "source line has been optimized completely out\n"); + //pc->print(stderr,pc); + } else { + PCI(pcn)->cline = PCI(pc)->cline; + } + } + } + + + if(1) { + /* + * Debug stuff. Comment out the instruction we're about to delete. + */ + + char buff1[256]; + size_t size = 256; + + char *pbuff; + pbuff = &buff1[0]; + + SNPRINTF(pbuff, size, ";%d", debug_code); + size -= strlen(pbuff); + pbuff += strlen(pbuff); + pCode2str(pbuff, size, pc); + pCodeInsertBefore(pc, newpCodeCharP(buff1)); + //fprintf(stderr,"removing instruction:\n%s\n",buff1); + } + + pc->destruct(pc); + +} + +/*-----------------------------------------------------------------* +* void RemoveRegsFromSet(set *regset) +* +*-----------------------------------------------------------------*/ +static void RemoveRegsFromSet(set *regset) +{ + regs *reg; + int used; + + while(regset) { + reg = regset->item; + regset = regset->next; + + used = elementsInSet(reg->reglives.usedpCodes); + + if(used <= 1) { + + //fprintf(stderr," reg %s isfree=%d, wasused=%d\n",reg->name,reg->isFree,reg->wasUsed); + if(used == 0) { + //fprintf(stderr," getting rid of reg %s\n",reg->name); + reg->isFree = 1; + reg->wasUsed = 0; + } else { + pCode *pc; + + + pc = setFirstItem(reg->reglives.usedpCodes); + + if(reg->type == REG_SFR || reg->type == REG_STK || reg->isPublic || reg->isExtern) { + //fprintf(stderr, "not removing SFR reg %s even though used only once\n",reg->name); + continue; + } + + + if(isPCI(pc)) { + if(PCI(pc)->label) { + pCode *pcn = findNextInstruction(pc->next); + + if(pcn && PCI(pcn)->label) { + //fprintf(stderr,"can't delete instruction with label...\n"); + //pc->print(stderr,pc); + continue; + } + /* Move the label to the next instruction */ + + PCI(pcn)->label = PCI(pc)->label; + + } + + if(isPCI_SKIP(pc)) { + regs *r = getRegFromInstruction(pc); + fprintf(stderr, "WARNING, a skip instruction is being optimized out\n"); + pc->print(stderr,pc); + fprintf(stderr,"reg %s, type =%d\n",r->name, r->type); + } + //fprintf(stderr," removing reg %s because it is used only once\n",reg->name); + Remove1pcode(pc, reg, 1); + /* + unlinkpCode(pc); + deleteSetItem (&(reg->reglives.usedpCodes),pc); + */ + reg->isFree = 1; + reg->wasUsed = 0; + total_registers_saved++; // debugging stats. + } + } + } + + } +} + +static void pic14_ReMapLiveRanges(void) +{ + pBlock *pb; + if (!the_pFile) return; + RegsUnMapLiveRanges(); + for (pb = the_pFile->pbHead; pb; pb = pb->next) + { + #if 0 + pCode *pc = findNextpCode(pb->pcHead, PC_FLOW); + if (pc) { + pc->print( stderr, pc ); + } else { + fprintf( stderr, "unnamed pBlock\n"); + } + pc = findNextInstruction(pb->pcHead); + while (pc) { + pc->print( stderr, pc ); + pc = findNextInstruction(pc->next);; + } + #endif + pCodeRegMapLiveRanges(pb); + } // for +} + +/*-----------------------------------------------------------------* +* void RemoveUnusedRegisters(void) +* +*-----------------------------------------------------------------*/ +void RemoveUnusedRegisters(void) +{ + /* First, get rid of registers that are used only one time */ + pic14_ReMapLiveRanges(); + + //RemoveRegsFromSet(dynInternalRegs); + RemoveRegsFromSet(dynAllocRegs); + RemoveRegsFromSet(dynStackRegs); + /* + don't do DirectRegs yet - there's a problem with arrays + RemoveRegsFromSet(dynDirectRegs); + */ + RemoveRegsFromSet(dynDirectBitRegs); + + if(total_registers_saved) DFPRINTF((stderr, " *** Saved %d registers ***\n", total_registers_saved)); +} + + +/*-----------------------------------------------------------------* +* +*-----------------------------------------------------------------*/ +static void Remove2pcodes(pCode *pcflow, pCode *pc1, pCode *pc2, regs *reg, int can_free) +{ + static int debug_code=99; + if(!reg) + return; +#if 0 + fprintf (stderr, "%s:%d(%s): %d (reg:%s)\n", __FILE__, __LINE__, __FUNCTION__, debug_code, reg ? reg->name : "???"); + printpCode (stderr, pc1); + printpCode (stderr, pc2); +#endif + + //fprintf(stderr,"%s\n",__FUNCTION__); + if(pc1) + Remove1pcode(pc1, reg, debug_code++); + + if(pc2) { + Remove1pcode(pc2, reg, debug_code++); + deleteSetItem (&(PCFL(pcflow)->registers), reg); + + if(can_free) { + reg->isFree = 1; + reg->wasUsed = 0; + } + + } + + pCodeRegMapLiveRangesInFlow(PCFL(pcflow)); +} + +/*-----------------------------------------------------------------* +* +*-----------------------------------------------------------------*/ +static int regUsedinRange(pCode *pc1, pCode *pc2, regs *reg) +{ + int i=0; + regs *testreg; + + do { + testreg = getRegFromInstruction(pc1); + if(testreg && (testreg->rIdx == reg->rIdx)) { + return 1; + } + if (i++ > 1000) { + fprintf(stderr, "warning, regUsedinRange searched through too many pcodes\n"); + return 0; + } + + pc1 = findNextInstruction(pc1->next); + + } while (pc1 && (pc1 != pc2)) ; + + return 0; +} + +static int regIsSpecial (regs *reg, int mayBeGlobal) +{ + if (!reg) return 0; + + if (reg->type == REG_SFR || reg->type == REG_STK || (!mayBeGlobal && (reg->isPublic || reg->isExtern))) return 1; + + return 0; +} + +/*-----------------------------------------------------------------* +* void pCodeOptime2pCodes(pCode *pc1, pCode *pc2) +* +* ADHOC pattern checking +* Now look for specific sequences that are easy to optimize. +* Many of these sequences are characteristic of the compiler +* (i.e. it'd probably be a waste of time to apply these adhoc +* checks to hand written assembly.) +* +* +*-----------------------------------------------------------------*/ +static int pCodeOptime2pCodes(pCode *pc1, pCode *pc2, pCode *pcfl_used, regs *reg, int can_free, int optimize_level) +{ + pCode *pct1, *pct2; + regs *reg1, *reg2; + + int t = total_registers_saved; + + if (!isPCI(pc1) || !isPCI(pc2)) return 0; + if (PCI(pc1)->pcflow != PCI(pc2)->pcflow) return 0; + + if (pc2->seq < pc1->seq) { + pct1 = pc2; + pc2 = pc1; + pc1 = pct1; + } + + /* disable this optimization for now -- it's buggy */ + if (pic14_options.disable_df) return 0; + + //fprintf(stderr,"pCodeOptime2pCodes\n"); + //pc1->print(stderr,pc1); + //pc2->print(stderr,pc2); + + if((PCI(pc1)->op == POC_CLRF) && (PCI(pc2)->op == POC_MOVFW) ){ + /* + * CLRF sets Z + * MOVFW affects Z + * MOVWF does not touch Z + * MOVLW does not touch Z + */ + pCode *newpc; + /* + clrf reg ; pc1 + stuff... + movf reg,w ; pc2 + + can be replaced with (only if following instructions are not going to use W and reg is not used again later) + + stuff... + movlw 0 or clrf reg + */ + DFPRINTF((stderr, " optimising CLRF reg ... MOVF reg,W to ... MOVLW 0\n")); + pct2 = findNextInstruction(pc2->next); + if (pCodeSearchCondition(pct2, PCC_Z, 0) == -1) { + /* Z is definitely overwritten before use */ + newpc = newpCode(POC_MOVLW, newpCodeOpLit(0)); + + pCodeInsertAfter(pc2, newpc); + PCI(newpc)->pcflow = PCFL(pcfl_used); + newpc->seq = pc2->seq; + + //fprintf (stderr, "%s:%d(%s): Remove2pcodes (CLRF reg, ..., MOVF reg,W)\n", __FILE__, __LINE__, __FUNCTION__); + //Remove2pcodes(pcfl_used, pc2, NULL, reg, 0); + pc2->destruct(pc2); + //total_registers_saved++; // debugging stats. + } + } else if((PCI(pc1)->op == POC_CLRF) && (PCI(pc2)->op == POC_IORFW) ){ + DFPRINTF((stderr, " optimising CLRF/IORFW\n")); + + pct2 = findNextInstruction(pc2->next); + + /* We must ensure that Z is destroyed before being read---IORLW must be performed unless this is proven. */ + if (pCodeSearchCondition(pct2, PCC_Z, 0) != -1) { + pct2 = newpCode(POC_IORLW, newpCodeOpLit(0)); + pct2->seq = pc2->seq; + PCI(pct2)->pcflow = PCFL(pcfl_used); + pCodeInsertAfter(pc1,pct2); + } + //fprintf (stderr, "%s:%d(%s): Remove2pcodes (CLRF/IORFW)\n", __FILE__, __LINE__, __FUNCTION__); + Remove2pcodes(pcfl_used, pc1, pc2, reg, can_free); + total_registers_saved++; // debugging stats. + + } else if(PCI(pc1)->op == POC_MOVWF) { + // Optimising MOVWF reg ... + + pct2 = findNextInstruction(pc2->next); + + if(PCI(pc2)->op == POC_MOVFW) { + // Optimising MOVWF reg ... MOVF reg,W + + if(PCI(pct2)->op == POC_MOVWF) { + /* + Change: + + movwf reg ; pc1 + stuff... + movf reg,w ; pc2 + movwf reg2 ; pct2 + + To: ( as long as 'stuff' does not use reg2 or if following instructions do not use W or reg is not used later) + + movwf reg2 + stuff... + + */ + reg2 = getRegFromInstruction(pct2); + /* Check reg2 is not used for something else before it is loaded with reg */ + if (reg2 && !regIsSpecial (reg2, 1) && !regUsedinRange(pc1,pc2,reg2)) { + pCode *pct3 = findNextInstruction(pct2->next); + /* Check following instructions are not relying on the use of W or the Z flag condiction */ + /* XXX: We must ensure that this value is destroyed before use---otherwise it might be used in + * subsequent flows (checking for < 1 is insufficient). */ + if ((pCodeSearchCondition(pct3,PCC_Z,0) == -1) && (pCodeSearchCondition(pct3,PCC_W,0) == -1)) { + DFPRINTF((stderr, " optimising MOVF reg ... MOVF reg,W MOVWF reg2 to MOVWF reg2 ...\n")); + pct2->seq = pc1->seq; + unlinkpCode(pct2); + pCodeInsertBefore(pc1,pct2); + if(regUsedinRange(pct2,0,reg)) + { + //fprintf (stderr, "%s:%d(%s): Remove2pcodes IF (MOVWF reg, ..., MOVW reg,W MOVWF reg2)\n", __FILE__, __LINE__, __FUNCTION__); + Remove2pcodes(pcfl_used, pc2, NULL, reg, can_free); + } else { + //fprintf (stderr, "%s:%d(%s): Remove2pcodes ELSE (MOVWF reg, ..., MOVW reg,W MOVWF reg2)\n", __FILE__, __LINE__, __FUNCTION__); + Remove2pcodes(pcfl_used, pc1, pc2, reg, can_free); + } + total_registers_saved++; // debugging stats. + return 1; + } + } + } + } + + pct1 = findPrevInstruction(pc1->prev); + if(pct1 && (PCI(pct1)->pcflow == PCI(pc1)->pcflow)) { + + if ( (PCI(pct1)->op == POC_MOVFW) && + (PCI(pc2)->op == POC_MOVFW)) { + + reg1 = getRegFromInstruction(pct1); + if(reg1 && !regIsSpecial (reg1, 0) && !regUsedinRange(pc1,pc2,reg1)) { + DFPRINTF((stderr, " optimising MOVF reg1,W MOVWF reg ... MOVF reg,W\n")); + /* + Change: + + movf reg1,w + movwf reg + + stuff... + movf reg,w + + To: + + stuff... + + movf reg1,w + + Or, if we're not deleting the register then the "To" is: + + stuff... + + movf reg1,w + movwf reg + */ + pct2 = newpCode(PCI(pc2)->op, PCI(pct1)->pcop); + pCodeInsertAfter(pc2, pct2); + PCI(pct2)->pcflow = PCFL(pcfl_used); + pct2->seq = pc2->seq; + + if(can_free) { + //fprintf (stderr, "%s:%d(%s): Remove2pcodes CANFREE (MOVF reg1,W; MOVWF reg2; MOVF reg2,W)\n", __FILE__, __LINE__, __FUNCTION__); + Remove2pcodes(pcfl_used, pc1, pc2, reg, can_free); + } else { + /* If we're not freeing the register then that means (probably) + * the register is needed somewhere else.*/ + unlinkpCode(pc1); + pCodeInsertAfter(pct2, pc1); + + //fprintf (stderr, "%s:%d(%s): Remove2pcodes ELSE (MOVF reg1,W; MOVWF reg2; MOVF reg2,W)\n", __FILE__, __LINE__, __FUNCTION__); + Remove2pcodes(pcfl_used, pc2, NULL, reg, can_free); + } + + //fprintf (stderr, "%s:%d(%s): Remove2pcodes ALWAYS (MOVF reg1,W; MOVWF reg2; MOVF reg2,W)\n", __FILE__, __LINE__, __FUNCTION__); + Remove2pcodes(pcfl_used, pct1, NULL, reg1, 0); + total_registers_saved++; // debugging stats. + + } + } + } + } + + return (total_registers_saved != t); +} + +/*-----------------------------------------------------------------* +* void pCodeRegOptimeRegUsage(pBlock *pb) +*-----------------------------------------------------------------*/ +static void OptimizeRegUsage(set *fregs, int optimize_multi_uses, int optimize_level) +{ + regs *reg; + int used; + pCode *pc1=NULL, *pc2=NULL; + + + while(fregs) { + pCode *pcfl_used, *pcfl_assigned; + + /* Step through the set by directly accessing the 'next' pointer. + * We could also step through by using the set API, but the + * the (debug) calls to print instructions affect the state + * of the set pointers */ + + reg = fregs->item; + fregs = fregs->next; + /* + if (strcmp(reg->name,"_SubState")==0) + fprintf(stderr,"Reg: %s\n",reg->name); + */ + + /* Catch inconsistently set-up live ranges + * (see tracker items #1469504 + #1474602) + * FIXME: Actually we should rather fix the + * computation of the liveranges instead... + */ + if (!reg || !reg->reglives.usedpFlows + || !reg->reglives.assignedpFlows) + { + //fprintf( stderr, "skipping reg w/o liveranges: %s\n", reg ? reg->name : "(unknown)"); + continue; + } + + if(reg->type == REG_SFR || reg->type == REG_STK || reg->isPublic || reg->isExtern|| reg->isFixed) { + //fprintf(stderr,"skipping SFR: %s\n",reg->name); + continue; + } + + pcfl_used = setFirstItem(reg->reglives.usedpFlows); + pcfl_assigned = setFirstItem(reg->reglives.assignedpFlows); + + used = elementsInSet(reg->reglives.usedpCodes); + if(used == 2) { + /* + In this section, all registers that are used in only in two + instructions are examined. If possible, they're optimized out. + */ + + /* + fprintf (stderr, "OptimizeRegUsage: %s addr=0x%03x rIdx=0x%03x type=%d used=%d\n", + reg->name, + reg->address, + reg->rIdx, reg->type, used); + */ + pc1 = setFirstItem(reg->reglives.usedpCodes); + pc2 = setNextItem(reg->reglives.usedpCodes); + + if(pcfl_used && pcfl_assigned) { + /* + expected case - the register has been assigned a value and is + subsequently used + */ + + //fprintf(stderr," used only twice\n"); + if(pcfl_used->seq == pcfl_assigned->seq) { + + //fprintf(stderr, " and used in same flow\n"); + + pCodeOptime2pCodes(pc1, pc2, pcfl_used, reg, 1,optimize_level); + + } else { + // fprintf(stderr, " and used in different flows\n"); + + } + + } else if(pcfl_used) { + + /* register has been used twice without ever being assigned */ + fprintf(stderr,"WARNING %s: reg %s used without being assigned\n",__FUNCTION__,reg->name); + + } else { + //fprintf(stderr,"WARNING %s.1: reg %s assigned without being used\n",__FUNCTION__,reg->name); + Remove2pcodes(pcfl_assigned, pc1, pc2, reg, 1); + total_registers_saved++; // debugging stats. + } + } else { + + /* register has been used either once, or more than twice */ + + if(used && !pcfl_used && pcfl_assigned) { + pCode *pc; + + //fprintf(stderr,"WARNING %s.2: reg %s assigned without being used\n",__FUNCTION__,reg->name); + + pc = setFirstItem(reg->reglives.usedpCodes); + while(pc) { + + pcfl_assigned = PCODE(PCI(pc)->pcflow); + Remove1pcode(pc, reg,2); + + deleteSetItem (&(PCFL(pcfl_assigned)->registers), reg); + /* + deleteSetItem (&(reg->reglives.usedpCodes),pc); + pc->destruct(pc); + */ + pc = setNextItem(reg->reglives.usedpCodes); + } + + + reg->isFree = 1; + reg->wasUsed = 0; + + total_registers_saved++; // debugging stats. + } else if( (used > 2) && optimize_multi_uses) { + + set *rset1=NULL; + set *rset2=NULL; + int searching=1; + + pCodeFlow *pcfl1=NULL, *pcfl2=NULL; + + /* examine the number of times this register is used */ + + + rset1 = reg->reglives.usedpCodes; + while(rset1 && searching) { + + pc1 = rset1->item; + rset2 = rset1->next; + + if(pc1 && isPCI(pc1) && ( (pcfl1 = PCI(pc1)->pcflow) != NULL) ) { + + if(rset2) { + + pc2 = rset2->item; + if(pc2 && isPCI(pc2) && ( (pcfl2 = PCI(pc2)->pcflow) != NULL) ) { + if(pcfl2 == pcfl1) { + + if(pCodeOptime2pCodes(pc1, pc2, pcfl_used, reg, 0,optimize_level)) + searching = 0; + } + } + + //rset2 = rset2->next; + + } + } + rset1 = rset2; + } + } + } + } +} + +/*-----------------------------------------------------------------* +* void pCodeRegOptimeRegUsage(pBlock *pb) +*-----------------------------------------------------------------*/ +void pCodeRegOptimizeRegUsage(int level) +{ + + int passes; + int saved = 0; + int t = total_registers_saved; + +#if 0 + /* This is currently broken (need rewrite to correctly + * handle arbitrary pCodeOps instead of registers only). */ + if (!pic14_options.disable_df) + optimizeDataflow (); +#endif + + if(!register_optimization) + return; +#define OPT_PASSES 4 + passes = OPT_PASSES; + + do { + saved = total_registers_saved; + + /* Identify registers used in one flow sequence */ + OptimizeRegUsage(dynAllocRegs,level, (OPT_PASSES-passes)); + OptimizeRegUsage(dynStackRegs,level, (OPT_PASSES-passes)); + OptimizeRegUsage(dynDirectRegs,0, (OPT_PASSES-passes)); + + if(total_registers_saved != saved) + DFPRINTF((stderr, " *** pass %d, Saved %d registers, total saved %d ***\n", + (1+OPT_PASSES-passes),total_registers_saved-saved,total_registers_saved)); + + passes--; + + } while( passes && ((total_registers_saved != saved) || (passes==OPT_PASSES-1)) ); + + if(total_registers_saved == t) + DFPRINTF((stderr, "No registers saved on this pass\n")); +} + + +/*-----------------------------------------------------------------* +* void RegsUnMapLiveRanges(set *regset) +* +*-----------------------------------------------------------------*/ +static void RegsSetUnMapLiveRanges(set *regset) +{ + regs *reg; + + while(regset) { + reg = regset->item; + regset = regset->next; + + + deleteSet(®->reglives.usedpCodes); + deleteSet(®->reglives.usedpFlows); + deleteSet(®->reglives.assignedpFlows); + + } + +} + +void RegsUnMapLiveRanges(void) +{ + + RegsSetUnMapLiveRanges(dynAllocRegs); + RegsSetUnMapLiveRanges(dynStackRegs); + RegsSetUnMapLiveRanges(dynDirectRegs); + RegsSetUnMapLiveRanges(dynProcessorRegs); + RegsSetUnMapLiveRanges(dynDirectBitRegs); + RegsSetUnMapLiveRanges(dynInternalRegs); + +} diff --git a/src/pic/pcoderegs.h b/src/pic/pcoderegs.h new file mode 100644 index 0000000..fb362ea --- /dev/null +++ b/src/pic/pcoderegs.h @@ -0,0 +1,50 @@ +/*------------------------------------------------------------------------- + + pcoderegs.h - post code generation register optimizations + + Written By - Scott Dattalo scott@dattalo.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +-------------------------------------------------------------------------*/ + +#ifndef __PCODEREGS_H__ +#define __PCODEREGS_H__ + +#include "common.h" + +#include "pcode.h" + +/************************************************* + + pCodeRegLives + + Records the set of registers used in a flow object. + +**************************************************/ + +typedef struct pCodeRegLives { + set *usedpFlows; /* set of pFlow objects that use this register */ + set *assignedpFlows; /* set of pFlow objects that assign values to this register */ + set *usedpCodes; /* set of all instructions that use this register */ + +} pCodeRegLives; + +void pCodeRegMapLiveRanges(struct pBlock *pb); +void pCodeRegOptimizeRegUsage(int level); +void RegsUnMapLiveRanges(void); +void RemoveUnusedRegisters(void); + +#endif // __PCODEREGS_H__ diff --git a/src/pic/peeph.def b/src/pic/peeph.def new file mode 100644 index 0000000..8e6df14 --- /dev/null +++ b/src/pic/peeph.def @@ -0,0 +1,331 @@ +// PIC Port Peep rules +// +// +// INTRODUCTION: +// +// The peep hole optimizer searchs the +// the SDCC generated code for small snippets +// that can be optimized. As a user, you have +// control over this optimization process without +// having to learn the SDCC source code. (However +// you'll still need access to the source since +// these rules are compiled into the source.) +// +// The way it works is you specify the target +// snippet that you want replaced with a more +// efficient snippet that you write. Wild card +// variables allow the rules to be parameterized. +// +// In all of the SDCC ports, labels and operands +// can be wild cards. However, in the PIC even the +// instructions can be wild cards. +// +// EXAMPLE: +// +// Consider Peep Rule 1 as an example. This rule +// replaces some code like: +// +// skpz ;i.e. btfss status,Z +// goto lab1 +// clrw +//lab1: +// +// with: +// +// skpnz ;i.e. btfsc status,Z +// clrw +//lab1 +// +// However, the Rule has four wild cards. +// The first allows the btfss instruction operator +// be anything, not just the Z bit in status register. +// The second wild card applies to a label. +// The third wild card is for an instruction - any +// single instruction can be substituted. +// The fourth wild card is also an instruction. It's +// just an instruction place holder associated with +// a label (think of it as the PIC Port author's laziness +// imposed upon the user). +// +// +// CONDITIONS +// +// There are certain instances where a peep rule may not +// be applicable. Consider this subtle example: +// +// movwf R0 +// movf R0,W +// +// It would seem that the second move is unnecessary. But +// be careful! The movf instruction affects the 'Z' bit. +// So if this sequence is followed by a btfsc status,Z, you +// will have to leave the second move in. +// +// To get around this proble, the peep rule can be followed +// by a conditon: "if NZ". Which is to say, apply the rule +// if Z bit is not needed in the code that follows. The optimizer +// is smart enough to look more than one instruction past the +// target block... +// +// Special commands +// +// +// _NOTBITSKIP_ %1 - Creates a wild card instruction that +// will match all instructions except for +// bit skip instructions (btfsc or btfss) +// _BITSKIP_ %1 - Creates a wild card instruction that only +// will match a bit skip instruction (btfsc +// or btfss) +// _INVERTBITSKIP_ %1 - For the wild card instruction %1, invert +// the state of the bit skip. If %1 is not +// a bit skip instruction, then there's an +// error in the peep rule. +// +// +// + + +// Peep 1 +// Converts +// +// btfss reg1,bit +// goto label +// incf reg2,f +//label +// +// Into: +// +// btfsc reg1,bit +// incf reg2,f +//label +// +// Notice that wild cards will allow any instruction +// besides incf to be used in the above. +// +// Also, notice that this snippet is not valid if +// it follows another skip + +replace restart { + _NOTBITSKIP_ %1 + _BITSKIP_ %2 + goto %3 + %4 +%3: %5 +} by { + ; peep 1 - test/jump to test/skip + %1 + _INVERTBITSKIP_ %2 + %4 +%3: %5 +} + +replace restart { + _NOTBITSKIP_ %1 + _BITSKIP_ %2 + goto %3 +%4: %5 +%3: %6 +} by { + ; peep 1b - test/jump to test/skip + %1 + _INVERTBITSKIP_ %2 +%4: %5 +%3: %6 +} + + +//bogus test for pcode +//replace restart { +// movf %1,w ;comment at end +//%4: movf %1,w +// RETURN +// clrf INDF +// movlw 0xa5 +// movf fsr,w +// incf indf,f +// %2 +//} by { +// ; peep test remove redundant move +//%4: movf %1,w ;another comment +// %2 +//} if AYBABTU %3 + + +// peep 2 +replace restart { + movwf %1 + movf %1,w +} by { + ; peep 2 - Removed redundant move + movwf %1 +} if NZ + +// peep 3 +replace restart { + decf %1,f + movf %1,w + btfss STATUS,z + goto %2 +} by { + ; peep 3 - decf/mov/skpz to decfsz + decfsz %1,f + goto %2 +} + + +replace restart { + movf %1,w + movf %1,w +} by { + ; peep 4 - Removed redundant move + movf %1,w +} + + +replace restart { + movlw %1 + movwf %2 + movlw %1 +} by { + ; peep 5 - Removed redundant move + movlw %1 + movwf %2 +} + +replace restart { + movwf %1 + movwf %1 +} by { + ; peep 6 - Removed redundant move + movwf %1 +} + +replace restart { + movlw 0 + iorwf %1,w +} by { + ; peep 7 - Removed redundant move + movf %1,w +} + +replace restart { + movf %1,w + movwf %2 + decf %2,f +} by { + ; peep 8 - Removed redundant move + decf %1,w + movwf %2 +} + +replace restart { + movwf %1 + movf %2,w + xorwf %1,w +} by { + ; peep 9a - Removed redundant move + movwf %1 + xorwf %2,w +} + +replace restart { + movwf %1 + movf %2,w + iorwf %1,w +} by { + ; peep 9b - Removed redundant move + movwf %1 + iorwf %2,w +} + +replace restart { + movf %1,w + movwf %2 + movf %2,w +} by { + ; peep 9c - Removed redundant move + movf %1,w + movwf %2 +} + +replace restart { + movwf %1 + movf %1,w + movwf %2 +} by { + ; peep 9d - Removed redundant move + movwf %1 + movwf %2 +} if NZ + +// From: Frieder Ferlemann + +replace restart { + iorlw 0 +} by { + ; peep 10a - Removed unnecessary iorlw +} if NZ + +// From: Frieder Ferlemann + +replace restart { + xorlw 0 +} by { + ; peep 10b - Removed unnecessary xorlw +} if NZ + +// From: Frieder Ferlemann + +replace restart { + movf %1,w + movwf %1 +} by { + ; peep 11 - Removed redundant move + movf %1,w +} + +replace restart { + comf %1,w + movwf %1 +} by { + ; peep 12 - Removed redundant move + comf %1,f +} + +replace restart { + clrf %1 + rlf %1,f + movlw 0x01 + xorwf %1,f + movf %1,w + btfss STATUS,2 + goto %2 + +} by { + ; peep 13 - Optimized carry sequence + clrf %1 + incf %1,F + btfss status,C + goto %2 + clrf %1 + +} + +replace restart { + clrf %1 + rlf %1,f + movlw 0x01 + xorwf %1,f + movf %1,w + btfsc STATUS,2 + goto %2 + +} by { + ; peep 13a - Optimized carry sequence + clrf %1 + incf %1,F + btfsc status,C + goto %2 + clrf %1 + +} diff --git a/src/pic/pic.dsp b/src/pic/pic.dsp new file mode 100644 index 0000000..2a15ede --- /dev/null +++ b/src/pic/pic.dsp @@ -0,0 +1,164 @@ +# Microsoft Developer Studio Project File - Name="pic" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Static Library" 0x0104 + +CFG=pic - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "pic.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "pic.mak" CFG="pic - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "pic - Win32 Debug" (based on "Win32 (x86) Static Library") +!MESSAGE "pic - Win32 Release" (based on "Win32 (x86) Static Library") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "pic - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /FR /FD /GZ /Zm500 /c +# ADD CPP /nologo /W2 /Gm /GX /ZI /Od /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /FR /FD /GZ /Zm1000 /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LIB32=link.exe -lib +# ADD BASE LIB32 /nologo /out:"Debug\port.lib" +# ADD LIB32 /nologo /out:"Debug\port.lib" + +!ELSEIF "$(CFG)" == "pic - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /ML /W3 /GX /O2 /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /FD /Zm500 /c +# ADD CPP /nologo /ML /W3 /GX /O2 /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /FD /Zm1000 /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LIB32=link.exe -lib +# ADD BASE LIB32 /nologo /out:"Release\port.lib" +# ADD LIB32 /nologo /out:"Release\port.lib" + +!ENDIF + +# Begin Target + +# Name "pic - Win32 Debug" +# Name "pic - Win32 Release" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\device.c +# End Source File +# Begin Source File + +SOURCE=.\gen.c +# End Source File +# Begin Source File + +SOURCE=.\genarith.c +# End Source File +# Begin Source File + +SOURCE=.\glue.c +# End Source File +# Begin Source File + +SOURCE=.\main.c +# End Source File +# Begin Source File + +SOURCE=.\pcode.c +# End Source File +# Begin Source File + +SOURCE=.\pcodeflow.c +# End Source File +# Begin Source File + +SOURCE=.\pcodepeep.c +# End Source File +# Begin Source File + +SOURCE=.\pcoderegs.c +# End Source File +# Begin Source File + +SOURCE=.\ralloc.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=.\device.h +# End Source File +# Begin Source File + +SOURCE=.\gen.h +# End Source File +# Begin Source File + +SOURCE=.\glue.h +# End Source File +# Begin Source File + +SOURCE=.\main.h +# End Source File +# Begin Source File + +SOURCE=.\pcode.h +# End Source File +# Begin Source File + +SOURCE=.\pcodeflow.h +# End Source File +# Begin Source File + +SOURCE=.\pcoderegs.h +# End Source File +# Begin Source File + +SOURCE=.\ralloc.h +# End Source File +# End Group +# End Target +# End Project diff --git a/src/pic/pica.dsp b/src/pic/pica.dsp new file mode 100644 index 0000000..24a2b43 --- /dev/null +++ b/src/pic/pica.dsp @@ -0,0 +1,90 @@ +# Microsoft Developer Studio Project File - Name="pica" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Generic Project" 0x010a + +CFG=pica - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "pica.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "pica.mak" CFG="pica - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "pica - Win32 Debug" (based on "Win32 (x86) Generic Project") +!MESSAGE "pica - Win32 Release" (based on "Win32 (x86) Generic Project") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +MTL=midl.exe + +!IF "$(CFG)" == "pica - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "" +# PROP Intermediate_Dir "" +# PROP Target_Dir "" + +!ELSEIF "$(CFG)" == "pica - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "" +# PROP Intermediate_Dir "" +# PROP Target_Dir "" + +!ENDIF + +# Begin Target + +# Name "pica - Win32 Debug" +# Name "pica - Win32 Release" +# Begin Source File + +SOURCE=.\peeph.def + +!IF "$(CFG)" == "pica - Win32 Debug" + +# Begin Custom Build +InputPath=.\peeph.def + +"peeph.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph.rul + +# End Custom Build + +!ELSEIF "$(CFG)" == "pica - Win32 Release" + +# Begin Custom Build +InputPath=.\peeph.def + +"peeph.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph.rul + +# End Custom Build + +!ENDIF + +# End Source File +# End Target +# End Project diff --git a/src/pic/ralloc.c b/src/pic/ralloc.c new file mode 100644 index 0000000..46c8723 --- /dev/null +++ b/src/pic/ralloc.c @@ -0,0 +1,3936 @@ +/*------------------------------------------------------------------------ + + SDCCralloc.c - source file for register allocation. (8051) specific + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + Added Pic Port T.scott Dattalo scott@dattalo.com (2000) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "device.h" +#include "gen.h" +#include "ralloc.h" + + +set *dynAllocRegs=NULL; +set *dynStackRegs=NULL; +set *dynProcessorRegs=NULL; +set *dynDirectRegs=NULL; +set *dynDirectBitRegs=NULL; +set *dynInternalRegs=NULL; + + +#define FENTRY2 1 ? (void)0 : printf + +/* this should go in SDCCicode.h, but it doesn't. */ +#define IS_REF(op) (IS_SYMOP(op) && op->operand.symOperand->isref == 1) + +/*-----------------------------------------------------------------*/ +/* At this point we start getting processor specific although */ +/* some routines are non-processor specific & can be reused when */ +/* targetting other processors. The decision for this will have */ +/* to be made on a routine by routine basis */ +/* routines used to pack registers are most definitely not reusable */ +/* since the pack the registers depending strictly on the MCU */ +/*-----------------------------------------------------------------*/ + +/* Global data */ +static struct +{ + bitVect *spiltSet; + set *stackSpil; + bitVect *regAssigned; + short blockSpil; + int slocNum; + bitVect *funcrUsed; /* registers used in a function */ + int stackExtend; + int dataExtend; +} +_G; + +static int pic14_ptrRegReq; /* one byte pointer register required */ + +static hTab *dynDirectRegNames= NULL; +// static hTab *regHash = NULL; /* a hash table containing ALL registers */ + +static int dynrIdx = 0x1000; + +int Gstack_base_addr=0; /* The starting address of registers that + * are used to pass and return parameters */ +static int Gstack_size = 0; + +static int debug = 0; // should be 0 when committed, creates .d files +static FILE *debugF = NULL; + +/*-----------------------------------------------------------------*/ +/* debugLog - open a file for debugging information */ +/*-----------------------------------------------------------------*/ +static void +debugLog (char *fmt,...) +{ + static int append = 0; // First time through, open the file without append. + + char buffer[256]; + //char *bufferP=buffer; + va_list ap; + + if (!debug || !dstFileName) + return; + + + if (!debugF) + { + /* create the file name */ + strcpy (buffer, dstFileName); + strcat (buffer, ".d"); + + if (!(debugF = fopen (buffer, (append ? "a+" : "w")))) + { + werror (E_FILE_OPEN_ERR, buffer); + exit (1); + } + append = 1; // Next time debugLog is called, we'll append the debug info + + } + + va_start (ap, fmt); + vsprintf (buffer, fmt, ap); + va_end (ap); + + fprintf (debugF, "%s", buffer); + //if (options.verbose) fprintf (stderr, "%s: %s", __FUNCTION__, buffer); +} + +static void +debugNewLine (void) +{ + if (debugF) + fputc ('\n', debugF); +} + /*-----------------------------------------------------------------*/ + /* pic14_debugLogClose - closes the debug log file (if opened) */ + /*-----------------------------------------------------------------*/ +void +pic14_debugLogClose (void) +{ + if (debugF) + { + fclose (debugF); + debugF = NULL; + } +} + +static char * +debugAopGet (char *str, operand * op) +{ + if (!debug) return NULL; + + if (str) debugLog (str); + + printOperand (op, debugF); + debugNewLine (); + + return NULL; +} + +static char * +decodeOp (unsigned int op) +{ + + if (op < 128 && op > ' ') + { + buffer[0] = (op & 0xff); + buffer[1] = 0; + return buffer; + } + + switch (op) + { + case IDENTIFIER: return "IDENTIFIER"; + case TYPE_NAME: return "TYPE_NAME"; + case CONSTANT: return "CONSTANT"; + case STRING_LITERAL: return "STRING_LITERAL"; + case SIZEOF: return "SIZEOF"; + case PTR_OP: return "PTR_OP"; + case INC_OP: return "INC_OP"; + case DEC_OP: return "DEC_OP"; + case LEFT_OP: return "LEFT_OP"; + case RIGHT_OP: return "RIGHT_OP"; + case LE_OP: return "LE_OP"; + case GE_OP: return "GE_OP"; + case EQ_OP: return "EQ_OP"; + case NE_OP: return "NE_OP"; + case AND_OP: return "AND_OP"; + case OR_OP: return "OR_OP"; + case MUL_ASSIGN: return "MUL_ASSIGN"; + case DIV_ASSIGN: return "DIV_ASSIGN"; + case MOD_ASSIGN: return "MOD_ASSIGN"; + case ADD_ASSIGN: return "ADD_ASSIGN"; + case SUB_ASSIGN: return "SUB_ASSIGN"; + case LEFT_ASSIGN: return "LEFT_ASSIGN"; + case RIGHT_ASSIGN: return "RIGHT_ASSIGN"; + case AND_ASSIGN: return "AND_ASSIGN"; + case XOR_ASSIGN: return "XOR_ASSIGN"; + case OR_ASSIGN: return "OR_ASSIGN"; + case TYPEDEF: return "TYPEDEF"; + case EXTERN: return "EXTERN"; + case STATIC: return "STATIC"; + case AUTO: return "AUTO"; + case REGISTER: return "REGISTER"; + case CODE: return "CODE"; + case EEPROM: return "EEPROM"; + case INTERRUPT: return "INTERRUPT"; + case SFR: return "SFR"; + case AT: return "AT"; + case SBIT: return "SBIT"; + case REENTRANT: return "REENTRANT"; + case USING: return "USING"; + case XDATA: return "XDATA"; + case DATA: return "DATA"; + case IDATA: return "IDATA"; + case PDATA: return "PDATA"; + case VAR_ARGS: return "VAR_ARGS"; + case CRITICAL: return "CRITICAL"; + case NONBANKED: return "NONBANKED"; + case BANKED: return "BANKED"; + case CHAR: return "CHAR"; + case SHORT: return "SHORT"; + case INT: return "INT"; + case LONG: return "LONG"; + case SIGNED: return "SIGNED"; + case UNSIGNED: return "UNSIGNED"; + case FLOAT: return "FLOAT"; + case DOUBLE: return "DOUBLE"; + case CONST: return "CONST"; + case VOLATILE: return "VOLATILE"; + case VOID: return "VOID"; + case BIT: return "BIT"; + case STRUCT: return "STRUCT"; + case UNION: return "UNION"; + case ENUM: return "ENUM"; + case RANGE: return "RANGE"; + case FAR: return "FAR"; + case CASE: return "CASE"; + case DEFAULT: return "DEFAULT"; + case IF: return "IF"; + case ELSE: return "ELSE"; + case SWITCH: return "SWITCH"; + case WHILE: return "WHILE"; + case DO: return "DO"; + case FOR: return "FOR"; + case GOTO: return "GOTO"; + case CONTINUE: return "CONTINUE"; + case BREAK: return "BREAK"; + case RETURN: return "RETURN"; + case INLINEASM: return "INLINEASM"; + case IFX: return "IFX"; + case ADDRESS_OF: return "ADDRESS_OF"; + case GET_VALUE_AT_ADDRESS: return "GET_VALUE_AT_ADDRESS"; + case SPIL: return "SPIL"; + case UNSPIL: return "UNSPIL"; + case GETHBIT: return "GETHBIT"; + case BITWISEAND: return "BITWISEAND"; + case UNARYMINUS: return "UNARYMINUS"; + case IPUSH: return "IPUSH"; + case IPOP: return "IPOP"; + case PCALL: return "PCALL"; + case ENDFUNCTION: return "ENDFUNCTION"; + case JUMPTABLE: return "JUMPTABLE"; + case RRC: return "RRC"; + case RLC: return "RLC"; + case CAST: return "CAST"; + case CALL: return "CALL"; + case PARAM: return "PARAM "; + case NULLOP: return "NULLOP"; + case BLOCK: return "BLOCK"; + case LABEL: return "LABEL"; + case RECEIVE: return "RECEIVE"; + case SEND: return "SEND"; + } + sprintf (buffer, "unknown op %d %c", op, op & 0xff); + return buffer; +} +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static char * +debugLogRegType (short type) +{ + + switch (type) + { + case REG_GPR: return "REG_GPR"; + case REG_PTR: return "REG_PTR"; + case REG_CND: return "REG_CND"; + } + + sprintf (buffer, "unknown reg type %d", type); + return buffer; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static int regname2key(char const *name) +{ + int key = 0; + + if(!name) + return 0; + + while(*name) { + + key += (*name++) + 1; + + } + + return ( (key + (key >> 4) + (key>>8)) & 0x3f); + +} + +/*-----------------------------------------------------------------*/ +/* regWithIdx - Search through a set of registers that matches idx */ +/*-----------------------------------------------------------------*/ +static regs * +regWithIdx (set *dRegs, int idx, int fixed) +{ + regs *dReg; + + for (dReg = setFirstItem(dRegs) ; dReg ; + dReg = setNextItem(dRegs)) { + + if(idx == dReg->rIdx && (fixed == (int)dReg->isFixed)) { + while (dReg->reg_alias) dReg = dReg->reg_alias; + return dReg; + } + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* newReg - allocate and init memory for a new register */ +/*-----------------------------------------------------------------*/ +static regs* newReg(short type, PIC_OPTYPE pc_type, int rIdx, char *name, int size, int alias) +{ + + regs *dReg, *reg_alias; + + /* check whether a matching register already exists */ + dReg = dirregWithName( name ); + if (dReg) { + //printf( "%s: already present: %s\n", __FUNCTION__, name ); + return (dReg); + } + + // check whether a register at that location exists + reg_alias = regWithIdx( dynDirectRegs, rIdx, 0 ); + if (!reg_alias) reg_alias = regWithIdx( dynDirectRegs, rIdx, 1 ); + + // create a new register + dReg = Safe_calloc(1,sizeof(regs)); + dReg->type = type; + dReg->pc_type = pc_type; + dReg->rIdx = rIdx; + if(name) { + dReg->name = Safe_strdup(name); + } else { + sprintf(buffer,"r0x%02X", dReg->rIdx); + dReg->name = Safe_strdup(buffer); + } + dReg->isFree = 0; + dReg->wasUsed = 0; + if (type == REG_SFR) + dReg->isFixed = 1; + else + dReg->isFixed = 0; + + dReg->isMapped = 0; + dReg->isEmitted = 0; + dReg->isPublic = 0; + dReg->isExtern = 0; + dReg->address = 0; + dReg->size = size; + dReg->alias = alias; + dReg->reg_alias = reg_alias; + dReg->reglives.usedpFlows = newSet(); + dReg->reglives.assignedpFlows = newSet(); + if (type != REG_STK) hTabAddItem(&dynDirectRegNames, regname2key(dReg->name), dReg); + debugLog( "%s: Created register %s.\n", __FUNCTION__, dReg->name); + + return dReg; +} + +/*-----------------------------------------------------------------*/ +/* regWithName - Search through a set of registers that matches name */ +/*-----------------------------------------------------------------*/ +static regs * +regWithName (set *dRegs, const char *name) +{ + regs *dReg; + + for (dReg = setFirstItem(dRegs) ; dReg ; + dReg = setNextItem(dRegs)) { + + if((strcmp(name,dReg->name)==0)) { + return dReg; + } + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* regWithName - Search for a registers that matches name */ +/*-----------------------------------------------------------------*/ +regs * +regFindWithName (const char *name) +{ + regs *dReg; + + if( (dReg = regWithName ( dynDirectRegs, name)) != NULL ) { + debugLog ("Found a Direct Register!\n"); + return dReg; + } + if( (dReg = regWithName ( dynDirectBitRegs, name)) != NULL) { + debugLog ("Found a Direct Bit Register!\n"); + return dReg; + } + + if (*name=='_') name++; // Step passed '_' + + if( (dReg = regWithName ( dynAllocRegs, name)) != NULL) { + debugLog ("Found a Dynamic Register!\n"); + return dReg; + } + if( (dReg = regWithName ( dynProcessorRegs, name)) != NULL) { + debugLog ("Found a Processor Register!\n"); + return dReg; + } + if( (dReg = regWithName ( dynInternalRegs, name)) != NULL) { + debugLog ("Found an Internal Register!\n"); + return dReg; + } + if( (dReg = regWithName ( dynStackRegs, name)) != NULL) { + debugLog ("Found an Stack Register!\n"); + return dReg; + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* regFindFree - Search for a free register in a set of registers */ +/*-----------------------------------------------------------------*/ +static regs * +regFindFree (set *dRegs) +{ + regs *dReg; + + for (dReg = setFirstItem(dRegs) ; dReg ; + dReg = setNextItem(dRegs)) { + + if(dReg->isFree) + return dReg; + } + + return NULL; +} +/*-----------------------------------------------------------------*/ +/* initStack - allocate registers for a pseudo stack */ +/*-----------------------------------------------------------------*/ +void initStack(int base_address, int size, int shared) +{ + + int i; + PIC_device *pic; + + pic = pic14_getPIC(); + Gstack_base_addr = base_address; + Gstack_size = size; + //fprintf(stderr,"initStack [base:0x%02x, size:%d]\n", base_address, size); + + for(i = 0; ibankMask : 0x180) : 0x0); + r->isFixed = 1; + r->isPublic = 1; + r->isEmitted = 1; + //r->name[0] = 's'; + addSet(&dynStackRegs,r); + } +} + +/*-----------------------------------------------------------------* +*-----------------------------------------------------------------*/ +regs * +allocProcessorRegister(int rIdx, char * name, short po_type, int alias) +{ + + //fprintf(stderr,"allocProcessorRegister %s addr =0x%x\n",name,rIdx); + return addSet(&dynProcessorRegs,newReg(REG_SFR, po_type, rIdx, name,1,alias)); +} + +/*-----------------------------------------------------------------* +*-----------------------------------------------------------------*/ + +regs * +allocInternalRegister(int rIdx, char * name, PIC_OPTYPE po_type, int alias) +{ + regs * reg = newReg(REG_GPR, po_type, rIdx, name,1,alias); + + //fprintf(stderr,"allocInternalRegister %s addr =0x%x\n",name,rIdx); + if(reg) { + reg->wasUsed = 0; + return addSet(&dynInternalRegs,reg); + } + + return NULL; +} +/*-----------------------------------------------------------------*/ +/* allocReg - allocates register of given type */ +/*-----------------------------------------------------------------*/ +static regs * +allocReg (short type) +{ + regs *reg; + + debugLog ("%s of type %s\n", __FUNCTION__, debugLogRegType (type)); + //fprintf(stderr,"allocReg\n"); + + reg = pic14_findFreeReg (type); + + reg->isFree = 0; + reg->wasUsed = 1; + + return reg; + + + //return addSet(&dynAllocRegs,newReg(REG_GPR, PO_GPR_TEMP,dynrIdx++,NULL,1,0)); + +} + + +/*-----------------------------------------------------------------*/ +/* dirregWithName - search for register by name */ +/*-----------------------------------------------------------------*/ +regs * +dirregWithName (char *name) +{ + int hkey; + regs *reg; + + if(!name) + return NULL; + + /* hash the name to get a key */ + + hkey = regname2key(name); + + reg = hTabFirstItemWK(dynDirectRegNames, hkey); + + while(reg) { + + if(STRCASECMP(reg->name, name) == 0) { + // handle registers with multiple names + while (reg->reg_alias) reg = reg->reg_alias; + return(reg); + } + + reg = hTabNextItemWK (dynDirectRegNames); + + } + + return NULL; // name wasn't found in the hash table +} + +/*-----------------------------------------------------------------*/ +/* allocNewDirReg - allocates a new register of given type */ +/*-----------------------------------------------------------------*/ +regs * +allocNewDirReg (sym_link *symlnk,const char *name) +{ + regs *reg; + int address = 0; + sym_link *spec = getSpec (symlnk); + + /* if this is at an absolute address, then get the address. */ + if (SPEC_ABSA (spec) ) { + address = SPEC_ADDR (spec); + //fprintf(stderr,"reg %s is at an absolute address: 0x%03x\n",name,address); + } + + /* Register wasn't found in hash, so let's create + * a new one and put it in the hash table AND in the + * dynDirectRegNames set */ + if (IS_CONFIG_ADDRESS(address)) { + debugLog (" -- %s is declared at address 0x2007\n",name); + reg = 0; + } else { + int idx; + if (address) { + if (IS_BITVAR (spec)) + idx = address >> 3; + else + idx = address; + } else { + idx = dynrIdx++; + } + reg = newReg(REG_GPR, PO_DIR, idx, (char*)name,getSize (symlnk),0 ); + debugLog (" -- added %s to hash, size = %d\n", (char*)name,reg->size); + + if (SPEC_ABSA (spec) ) { + reg->type = REG_SFR; + } + + if (IS_BITVAR (spec)) { + addSet(&dynDirectBitRegs, reg); + reg->isBitField = 1; + } else + addSet(&dynDirectRegs, reg); + + if (!IS_STATIC (spec)) { + reg->isPublic = 1; + } + if (IS_EXTERN (spec)) { + reg->isExtern = 1; + } + + } + + if (address && reg) { + reg->isFixed = 1; + reg->address = address; + debugLog (" -- and it is at a fixed address 0x%02x\n",reg->address); + } + + return reg; +} + +/*-----------------------------------------------------------------*/ +/* allocDirReg - allocates register of given type */ +/*-----------------------------------------------------------------*/ +regs * +allocDirReg (operand *op ) +{ + + regs *reg; + char *name; + + if(!IS_SYMOP(op)) { + debugLog ("%s BAD, op is NULL\n", __FUNCTION__); + return NULL; + } + + name = OP_SYMBOL (op)->rname[0] ? OP_SYMBOL (op)->rname : OP_SYMBOL (op)->name; + + /* If the symbol is at a fixed address, then remove the leading underscore + * from the name. This is hack to allow the .asm include file named registers + * to match the .c declared register names */ + + //if (SPEC_ABSA ( OP_SYM_ETYPE(op)) && (*name == '_')) + //name++; + + debugLog ("%s symbol name %s\n", __FUNCTION__,name); + { + if(SPEC_CONST ( OP_SYM_ETYPE(op)) && (IS_CHAR ( OP_SYM_ETYPE(op)) )) { + debugLog(" %d const char\n",__LINE__); + debugLog(" value = %s \n",SPEC_CVAL( OP_SYM_ETYPE(op))); + } + + debugLog(" %d storage class %d \n",__LINE__,SPEC_SCLS( OP_SYM_ETYPE(op))); + if (IS_CODE ( OP_SYM_ETYPE(op)) ) + debugLog(" %d code space\n",__LINE__); + + if (IS_INTEGRAL ( OP_SYM_ETYPE(op)) ) + debugLog(" %d integral\n",__LINE__); + if (IS_LITERAL ( OP_SYM_ETYPE(op)) ) + debugLog(" %d literal\n",__LINE__); + if (IS_SPEC ( OP_SYM_ETYPE(op)) ) + debugLog(" %d specifier\n",__LINE__); + debugAopGet(NULL, op); + } + + if (IS_CODE ( OP_SYM_ETYPE(op)) ) + return NULL; + + /* First, search the hash table to see if there is a register with this name */ + if (SPEC_ABSA ( OP_SYM_ETYPE(op)) && !(IS_BITVAR (OP_SYM_ETYPE(op))) ) { + reg = regWithIdx (dynProcessorRegs, SPEC_ADDR ( OP_SYM_ETYPE(op)), 1); + /* + if(!reg) + fprintf(stderr,"ralloc %s is at fixed address but not a processor reg, addr=0x%x\n", + name, SPEC_ADDR ( OP_SYM_ETYPE(op))); + else + fprintf(stderr,"ralloc %s at fixed address has already been declared, addr=0x%x\n", + name, SPEC_ADDR ( OP_SYM_ETYPE(op))); + */ + } else { + //fprintf(stderr,"ralloc:%d %s \n", __LINE__,name); + + reg = dirregWithName(name); + } + +#if 0 + if(!reg) { + int address = 0; + + /* if this is at an absolute address, then get the address. */ + if (SPEC_ABSA ( OP_SYM_ETYPE(op)) ) { + address = SPEC_ADDR ( OP_SYM_ETYPE(op)); + //fprintf(stderr,"reg %s is at an absolute address: 0x%03x\n",name,address); + } + + /* Register wasn't found in hash, so let's create + * a new one and put it in the hash table AND in the + * dynDirectRegNames set */ + if(!IS_CONFIG_ADDRESS(address)) { + //fprintf(stderr,"allocating new reg %s\n",name); + + reg = newReg(REG_GPR, PO_DIR, dynrIdx++, name,getSize (OP_SYMBOL (op)->type),0 ); + debugLog (" -- added %s to hash, size = %d\n", name,reg->size); + + //hTabAddItem(&dynDirectRegNames, regname2key(name), reg); + + if (SPEC_ABSA ( OP_SYM_ETYPE(op)) ) { + + //fprintf(stderr, " ralloc.c at fixed address: %s - changing to REG_SFR\n",name); + reg->type = REG_SFR; + } + + if (IS_BITVAR (OP_SYM_ETYPE(op))) { + addSet(&dynDirectBitRegs, reg); + reg->isBitField = 1; + } else + addSet(&dynDirectRegs, reg); + + if (!IS_STATIC (OP_SYM_ETYPE(op))) { + reg->isPublic = 1; + } + if (IS_EXTERN (OP_SYM_ETYPE(op))) { + reg->isExtern = 1; + } + + + } else { + debugLog (" -- %s is declared at address 0x2007\n",name); + + } + } + + if (SPEC_ABSA ( OP_SYM_ETYPE(op)) ) { + reg->isFixed = 1; + reg->address = SPEC_ADDR ( OP_SYM_ETYPE(op)); + debugLog (" -- and it is at a fixed address 0x%02x\n",reg->address); + } +#endif + + if(reg) { + if (SPEC_ABSA ( OP_SYM_ETYPE(op)) ) { + reg->isFixed = 1; + reg->address = SPEC_ADDR ( OP_SYM_ETYPE(op)); + debugLog (" -- and it is at a fixed address 0x%02x\n",reg->address); + } + } else { + allocNewDirReg (OP_SYM_TYPE(op),name); + } + + return reg; +} + + +/*-----------------------------------------------------------------*/ +/* allocRegByName - allocates register with given name */ +/*-----------------------------------------------------------------*/ +regs * +allocRegByName (char *name, int size) +{ + + regs *reg; + + if(!name) { + fprintf(stderr, "%s - allocating a NULL register\n",__FUNCTION__); + exit(1); + } + + /* First, search the hash table to see if there is a register with this name */ + reg = dirregWithName(name); + + + if(!reg) { + int found = 0; + symbol *sym; + /* Register wasn't found in hash, so let's create + * a new one and put it in the hash table AND in the + * dynDirectRegNames set */ + //fprintf (stderr,"%s symbol name %s, size:%d\n", __FUNCTION__,name,size); + reg = newReg(REG_GPR, PO_DIR, dynrIdx++, name,size,0 ); + for (sym = setFirstItem(sfr->syms); sym; sym = setNextItem(sfr->syms)) { + if (strcmp(reg->name+1,sym->name)==0) { + unsigned a = SPEC_ADDR(sym->etype); + reg->address = a; + reg->isFixed = 1; + reg->type = REG_SFR; + if (!IS_STATIC (sym->etype)) { + reg->isPublic = 1; + } + if (IS_EXTERN (sym->etype)) { + reg->isExtern = 1; + } + if (IS_BITVAR (sym->etype)) + reg->isBitField = 1; + found = 1; + break; + } + } + if (!found) { + for (sym = setFirstItem(data->syms); sym; sym = setNextItem(data->syms)) { + if (strcmp(reg->name+1,sym->name)==0) { + unsigned a = SPEC_ADDR(sym->etype); + reg->address = a; + if (!IS_STATIC (sym->etype)) { + reg->isPublic = 1; + } + if (IS_EXTERN (sym->etype)) { + reg->isExtern = 1; + } + if (IS_BITVAR (sym->etype)) + reg->isBitField = 1; + found = 1; + break; + } + } + } + + debugLog (" -- added %s to hash, size = %d\n", name,reg->size); + + //hTabAddItem(&dynDirectRegNames, regname2key(name), reg); + if (reg->isBitField) { + addSet(&dynDirectBitRegs, reg); + } else + addSet(&dynDirectRegs, reg); + } + + return reg; +} + +/*-----------------------------------------------------------------*/ +/* RegWithIdx - returns pointer to register with index number */ +/*-----------------------------------------------------------------*/ +regs * +typeRegWithIdx (int idx, int type, int fixed) +{ + + regs *dReg; + + debugLog ("%s - requesting index = 0x%x\n", __FUNCTION__,idx); + + switch (type) { + + case REG_GPR: + if( (dReg = regWithIdx ( dynAllocRegs, idx, fixed)) != NULL) { + + debugLog ("Found a Dynamic Register!\n"); + return dReg; + } + if( (dReg = regWithIdx ( dynDirectRegs, idx, fixed)) != NULL ) { + debugLog ("Found a Direct Register!\n"); + return dReg; + } + + break; + case REG_STK: + if( (dReg = regWithIdx ( dynStackRegs, idx, 0)) != NULL ) { + debugLog ("Found a Stack Register!\n"); + return dReg; + } else + if( (dReg = regWithIdx ( dynStackRegs, idx, 1)) != NULL ) { + debugLog ("Found a Stack Register!\n"); + return dReg; + } + else { + werror (E_STACK_OUT, "Register"); + /* return an existing register just to avoid the SDCC crash */ + return regWithIdx ( dynStackRegs, 0x7f, 0); + } + break; + case REG_SFR: + if( (dReg = regWithIdx ( dynProcessorRegs, idx, fixed)) != NULL ) { + debugLog ("Found a Processor Register!\n"); + return dReg; + } + + case REG_CND: + case REG_PTR: + default: + break; + } + + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* pic14_regWithIdx - returns pointer to register with index number*/ +/*-----------------------------------------------------------------*/ +regs * +pic14_regWithIdx (int idx) +{ + regs *dReg; + + if( (dReg = typeRegWithIdx(idx,REG_GPR,0)) != NULL) + return dReg; + + if( (dReg = typeRegWithIdx(idx,REG_SFR,0)) != NULL) + return dReg; + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* pic14_regWithIdx - returns pointer to register with index number */ +/*-----------------------------------------------------------------*/ +regs * +pic14_allocWithIdx (int idx) +{ + + regs *dReg; + + debugLog ("%s - allocating with index = 0x%x\n", __FUNCTION__,idx); + + if( (dReg = regWithIdx ( dynAllocRegs, idx,0)) != NULL) { + + debugLog ("Found a Dynamic Register!\n"); + } else if( (dReg = regWithIdx ( dynStackRegs, idx,0)) != NULL ) { + debugLog ("Found a Stack Register!\n"); + } else if( (dReg = regWithIdx ( dynProcessorRegs, idx,0)) != NULL ) { + debugLog ("Found a Processor Register!\n"); + } else if( (dReg = regWithIdx ( dynInternalRegs, idx,0)) != NULL ) { + debugLog ("Found an Internal Register!\n"); + } else if( (dReg = regWithIdx ( dynInternalRegs, idx,1)) != NULL ) { + debugLog ("Found an Internal Register!\n"); + } else { + + debugLog ("Dynamic Register not found\n"); + + + //fprintf(stderr,"%s %d - requested register: 0x%x\n",__FUNCTION__,__LINE__,idx); + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "regWithIdx not found"); + exit (1); + + } + + dReg->wasUsed = 1; + dReg->isFree = 0; + + return dReg; +} +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +regs * +pic14_findFreeReg(short type) +{ + // int i; + regs* dReg; + + switch (type) { + case REG_GPR: + if((dReg = regFindFree(dynAllocRegs)) != NULL) + return dReg; + return addSet(&dynAllocRegs,newReg(REG_GPR, PO_GPR_TEMP,dynrIdx++,NULL,1,0)); + + case REG_STK: + + if((dReg = regFindFree(dynStackRegs)) != NULL) + return dReg; + + return NULL; + + case REG_PTR: + case REG_CND: + case REG_SFR: + default: + return NULL; + } +} +/*-----------------------------------------------------------------*/ +/* freeReg - frees a register */ +/*-----------------------------------------------------------------*/ +static void +freeReg (regs * reg) +{ + debugLog ("%s\n", __FUNCTION__); + reg->isFree = 1; +} + + +/*-----------------------------------------------------------------*/ +/* nFreeRegs - returns number of free registers */ +/*-----------------------------------------------------------------*/ +static int +nFreeRegs (int type) +{ +/* dynamically allocate as many as we need and worry about + * fitting them into a PIC later */ + + return 100; +#if 0 + int i; + int nfr = 0; + + debugLog ("%s\n", __FUNCTION__); + for (i = 0; i < pic14_nRegs; i++) + if (regspic14[i].isFree && regspic14[i].type == type) + nfr++; + return nfr; +#endif +} + +/*-----------------------------------------------------------------*/ +/* nfreeRegsType - free registers with type */ +/*-----------------------------------------------------------------*/ +static int +nfreeRegsType (int type) +{ + int nfr; + debugLog ("%s\n", __FUNCTION__); + if (type == REG_PTR) + { + if ((nfr = nFreeRegs (type)) == 0) + return nFreeRegs (REG_GPR); + } + + return nFreeRegs (type); +} + +static void packBits(set *bregs) +{ + set *regset; + regs *breg; + regs *bitfield=NULL; + regs *relocbitfield=NULL; + int bit_no=0; + int byte_no=-1; + char buffer[20]; + + + for (regset = bregs ; regset ; + regset = regset->next) { + + breg = regset->item; + breg->isBitField = 1; + //fprintf(stderr,"bit reg: %s\n",breg->name); + + if(breg->isFixed) { + //fprintf(stderr,"packing bit at fixed address = 0x%03x\n",breg->address); + + bitfield = typeRegWithIdx (breg->address >> 3, -1 , 1); + breg->rIdx = breg->address & 7; + breg->address >>= 3; + + if(!bitfield) { + //sprintf (buffer, "fbitfield%02x", breg->address); + sprintf (buffer, "0x%02x", breg->address); + //fprintf(stderr,"new bit field\n"); + bitfield = newReg(REG_SFR, PO_GPR_BIT,breg->address,buffer,1,0); + bitfield->isBitField = 1; + bitfield->isFixed = 1; + bitfield->address = breg->address; + //addSet(&dynDirectRegs,bitfield); + addSet(&dynInternalRegs,bitfield); + //hTabAddItem(&dynDirectRegNames, regname2key(buffer), bitfield); + } else { + //fprintf(stderr," which is occupied by %s (addr = %d)\n",bitfield->name,bitfield->address); + ; + } + breg->reg_alias = bitfield; + bitfield = NULL; + + } else { + if(!relocbitfield || bit_no >7) { + byte_no++; + bit_no=0; + sprintf (buffer, "bitfield%d", byte_no); + //fprintf(stderr,"new relocatable bit field\n"); + relocbitfield = newReg(REG_GPR, PO_GPR_BIT,dynrIdx++,buffer,1,0); + relocbitfield->isBitField = 1; + //addSet(&dynDirectRegs,relocbitfield); + addSet(&dynInternalRegs,relocbitfield); + //hTabAddItem(&dynDirectRegNames, regname2key(buffer), relocbitfield); + + } + + breg->reg_alias = relocbitfield; + breg->address = dynrIdx; /* byte_no; */ + breg->rIdx = bit_no++; + } + } + +} + + + +static void bitEQUs(FILE *of, set *bregs) +{ + regs *breg,*bytereg; + int bit_no=0; + + //fprintf(stderr," %s\n",__FUNCTION__); + for (breg = setFirstItem(bregs) ; breg ; + breg = setNextItem(bregs)) { + + //fprintf(stderr,"bit reg: %s\n",breg->name); + + bytereg = breg->reg_alias; + if(bytereg) + fprintf (of, "%s\tEQU\t( (%s<<3)+%d)\n", + breg->name, + bytereg->name, + breg->rIdx & 0x0007); + + else { + //fprintf(stderr, "bit field is not assigned to a register\n"); + fprintf (of, "%s\tEQU\t( (bitfield%d<<3)+%d)\n", + breg->name, + bit_no>>3, + bit_no & 0x0007); + + bit_no++; + } + } + +} + +void writeUsedRegs(FILE *of) +{ + + packBits(dynDirectBitRegs); + + bitEQUs(of,dynDirectBitRegs); +} + +/*-----------------------------------------------------------------*/ +/* computeSpillable - given a point find the spillable live ranges */ +/*-----------------------------------------------------------------*/ +static bitVect * +computeSpillable (iCode * ic) +{ + bitVect *spillable; + + debugLog ("%s\n", __FUNCTION__); + /* spillable live ranges are those that are live at this + point . the following categories need to be subtracted + from this set. + a) - those that are already spilt + b) - if being used by this one + c) - defined by this one */ + + spillable = bitVectCopy (ic->rlive); + spillable = + bitVectCplAnd (spillable, _G.spiltSet); /* those already spilt */ + spillable = + bitVectCplAnd (spillable, ic->uses); /* used in this one */ + bitVectUnSetBit (spillable, ic->defKey); + spillable = bitVectIntersect (spillable, _G.regAssigned); + return spillable; + +} + +/*-----------------------------------------------------------------*/ +/* noSpilLoc - return true if a variable has no spil location */ +/*-----------------------------------------------------------------*/ +static int +noSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + debugLog ("%s\n", __FUNCTION__); + return (sym->usl.spillLoc ? 0 : 1); +} + +/*-----------------------------------------------------------------*/ +/* hasSpilLoc - will return 1 if the symbol has spil location */ +/*-----------------------------------------------------------------*/ +static int +hasSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + debugLog ("%s\n", __FUNCTION__); + return (sym->usl.spillLoc ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* directSpilLoc - will return 1 if the splilocation is in direct */ +/*-----------------------------------------------------------------*/ +static int +directSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + debugLog ("%s\n", __FUNCTION__); + if (sym->usl.spillLoc && + (IN_DIRSPACE (SPEC_OCLS (sym->usl.spillLoc->etype)))) + return 1; + else + return 0; +} + +/*-----------------------------------------------------------------*/ +/* hasSpilLocnoUptr - will return 1 if the symbol has spil location */ +/* but is not used as a pointer */ +/*-----------------------------------------------------------------*/ +static int +hasSpilLocnoUptr (symbol * sym, eBBlock * ebp, iCode * ic) +{ + debugLog ("%s\n", __FUNCTION__); + return ((sym->usl.spillLoc && !sym->uptr) ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* rematable - will return 1 if the remat flag is set */ +/*-----------------------------------------------------------------*/ +static int +rematable (symbol * sym, eBBlock * ebp, iCode * ic) +{ + debugLog ("%s\n", __FUNCTION__); + return sym->remat; +} + +/*-----------------------------------------------------------------*/ +/* notUsedInRemaining - not used or defined in remain of the block */ +/*-----------------------------------------------------------------*/ +static int +notUsedInRemaining (symbol * sym, eBBlock * ebp, iCode * ic) +{ + debugLog ("%s\n", __FUNCTION__); + return ((usedInRemaining (operandFromSymbol (sym), ic) ? 0 : 1) && + allDefsOutOfRange (sym->defs, ebp->fSeq, ebp->lSeq)); +} + +/*-----------------------------------------------------------------*/ +/* allLRs - return true for all */ +/*-----------------------------------------------------------------*/ +static int +allLRs (symbol * sym, eBBlock * ebp, iCode * ic) +{ + debugLog ("%s\n", __FUNCTION__); + return 1; +} + +/*-----------------------------------------------------------------*/ +/* liveRangesWith - applies function to a given set of live range */ +/*-----------------------------------------------------------------*/ +static set * +liveRangesWith (bitVect * lrs, int (func) (symbol *, eBBlock *, iCode *), + eBBlock * ebp, iCode * ic) +{ + set *rset = NULL; + int i; + + debugLog ("%s\n", __FUNCTION__); + if (!lrs || !lrs->size) + return NULL; + + for (i = 1; i < lrs->size; i++) + { + symbol *sym; + if (!bitVectBitValue (lrs, i)) + continue; + + /* if we don't find it in the live range + hash table we are in serious trouble */ + if (!(sym = hTabItemWithKey (liveRanges, i))) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "liveRangesWith could not find liveRange"); + exit (1); + } + + if (func (sym, ebp, ic) && bitVectBitValue (_G.regAssigned, sym->key)) + addSetHead (&rset, sym); + } + + return rset; +} + + +/*-----------------------------------------------------------------*/ +/* leastUsedLR - given a set determines which is the least used */ +/*-----------------------------------------------------------------*/ +static symbol * +leastUsedLR (set * sset) +{ + symbol *sym = NULL, *lsym = NULL; + + debugLog ("%s\n", __FUNCTION__); + sym = lsym = setFirstItem (sset); + + if (!lsym) + return NULL; + + for (; lsym; lsym = setNextItem (sset)) + { + + /* if usage is the same then prefer + the spill the smaller of the two */ + if (lsym->used == sym->used) + if (getSize (lsym->type) < getSize (sym->type)) + sym = lsym; + + /* if less usage */ + if (lsym->used < sym->used) + sym = lsym; + + } + + setToNull ((void *) &sset); + sym->blockSpil = 0; + return sym; +} + +/*-----------------------------------------------------------------*/ +/* noOverLap - will iterate through the list looking for over lap */ +/*-----------------------------------------------------------------*/ +static int +noOverLap (set * itmpStack, symbol * fsym) +{ + symbol *sym; + debugLog ("%s\n", __FUNCTION__); + + + for (sym = setFirstItem (itmpStack); sym; + sym = setNextItem (itmpStack)) + { + if (sym->liveTo > fsym->liveFrom) + return 0; + + } + + return 1; +} + +/*-----------------------------------------------------------------*/ +/* isFree - will return 1 if the a free spil location is found */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (isFree) +{ + symbol *sym = item; + V_ARG (symbol **, sloc); + V_ARG (symbol *, fsym); + + debugLog ("%s\n", __FUNCTION__); + /* if already found */ + if (*sloc) + return 0; + + /* if it is free && and the itmp assigned to + this does not have any overlapping live ranges + with the one currently being assigned and + the size can be accomodated */ + if (sym->isFree && + noOverLap (sym->usl.itmpStack, fsym) && + getSize (sym->type) >= getSize (fsym->type)) + { + *sloc = sym; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* spillLRWithPtrReg :- will spil those live ranges which use PTR */ +/*-----------------------------------------------------------------*/ +static void +spillLRWithPtrReg (symbol * forSym) +{ + symbol *lrsym; + int k; + + debugLog ("%s\n", __FUNCTION__); + if (!_G.regAssigned || + bitVectIsZero (_G.regAssigned)) + return; + + /* for all live ranges */ + for (lrsym = hTabFirstItem (liveRanges, &k); lrsym; + lrsym = hTabNextItem (liveRanges, &k)) + { + /* if no registers assigned to it or + spilt */ + /* if it does not overlap with this then + not need to spill it */ + + if (lrsym->isspilt || !lrsym->nRegs || + (lrsym->liveTo < forSym->liveFrom)) + continue; + + } + +} + +/*-----------------------------------------------------------------*/ +/* createStackSpil - create a location on the stack to spil */ +/*-----------------------------------------------------------------*/ +static symbol * +createStackSpil (symbol * sym) +{ + symbol *sloc = NULL; + int useXstack, model, noOverlay; + + char slocBuffer[30]; + debugLog ("%s\n", __FUNCTION__); + + FENTRY2("called."); + + /* first go try and find a free one that is already + existing on the stack */ + if (applyToSet (_G.stackSpil, isFree, &sloc, sym)) + { + /* found a free one : just update & return */ + sym->usl.spillLoc = sloc; + sym->stackSpil = 1; + sloc->isFree = 0; + addSetHead (&sloc->usl.itmpStack, sym); + return sym; + } + + /* could not then have to create one , this is the hard part + we need to allocate this on the stack : this is really a + hack!! but cannot think of anything better at this time */ + + if (sprintf (slocBuffer, "sloc%d", _G.slocNum++) >= sizeof (slocBuffer)) + { + fprintf (stderr, "kkkInternal error: slocBuffer overflowed: %s:%d\n", + __FILE__, __LINE__); + exit (1); + } + + sloc = newiTemp (slocBuffer); + + /* set the type to the spilling symbol */ + sloc->type = copyLinkChain (sym->type); + sloc->etype = getSpec (sloc->type); + SPEC_SCLS (sloc->etype) = S_DATA; + SPEC_EXTR (sloc->etype) = 0; + SPEC_STAT (sloc->etype) = 0; + + /* we don't allow it to be allocated` + onto the external stack since : so we + temporarily turn it off ; we also + turn off memory model to prevent + the spil from going to the external storage + and turn off overlaying + */ + + useXstack = options.useXstack; + model = options.model; + noOverlay = options.noOverlay; + options.noOverlay = 1; + options.model = options.useXstack = 0; + + allocLocal (sloc); + + options.useXstack = useXstack; + options.model = model; + options.noOverlay = noOverlay; + sloc->isref = 1; /* to prevent compiler warning */ + + /* if it is on the stack then update the stack */ + if (IN_STACK (sloc->etype)) + { + currFunc->stack += getSize (sloc->type); + _G.stackExtend += getSize (sloc->type); + } + else + _G.dataExtend += getSize (sloc->type); + + /* add it to the _G.stackSpil set */ + addSetHead (&_G.stackSpil, sloc); + sym->usl.spillLoc = sloc; + sym->stackSpil = 1; + + /* add it to the set of itempStack set + of the spill location */ + addSetHead (&sloc->usl.itmpStack, sym); + return sym; +} + +/*-----------------------------------------------------------------*/ +/* isSpiltOnStack - returns true if the spil location is on stack */ +/*-----------------------------------------------------------------*/ +static bool +isSpiltOnStack (symbol * sym) +{ + sym_link *etype; + + debugLog ("%s\n", __FUNCTION__); + FENTRY2("called."); + + if (!sym) + return FALSE; + + if (!sym->isspilt) + return FALSE; + + /* if (sym->_G.stackSpil) */ + /* return TRUE; */ + + if (!sym->usl.spillLoc) + return FALSE; + + etype = getSpec (sym->usl.spillLoc->type); + if (IN_STACK (etype)) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* spillThis - spils a specific operand */ +/*-----------------------------------------------------------------*/ +static void +spillThis (symbol * sym) +{ + int i; + debugLog ("%s : %s\n", __FUNCTION__, sym->rname); + FENTRY2("sym: %s, spillLoc:%p (%s)\n", sym->rname, sym->usl.spillLoc, sym->usl.spillLoc ? sym->usl.spillLoc->rname : ""); + + /* if this is rematerializable or has a spillLocation + we are okay, else we need to create a spillLocation + for it */ + if (!(sym->remat || sym->usl.spillLoc)) + createStackSpil (sym); + + + /* mark it has spilt & put it in the spilt set */ + sym->isspilt = 1; + _G.spiltSet = bitVectSetBit (_G.spiltSet, sym->key); + + bitVectUnSetBit (_G.regAssigned, sym->key); + + for (i = 0; i < sym->nRegs; i++) + { + if (sym->regs[i]) + { + freeReg (sym->regs[i]); + sym->regs[i] = NULL; + } + } + + /* if spilt on stack then free up r0 & r1 + if they could have been assigned to some + LIVE ranges */ + if (!pic14_ptrRegReq && isSpiltOnStack (sym)) + { + pic14_ptrRegReq++; + spillLRWithPtrReg (sym); + } + + if (sym->usl.spillLoc && !sym->remat) + sym->usl.spillLoc->allocreq = 1; + + return; +} + +/*-----------------------------------------------------------------*/ +/* selectSpil - select a iTemp to spil : rather a simple procedure */ +/*-----------------------------------------------------------------*/ +static symbol * +selectSpil (iCode * ic, eBBlock * ebp, symbol * forSym) +{ + bitVect *lrcs = NULL; + set *selectS; + symbol *sym; + + debugLog ("%s\n", __FUNCTION__); + FENTRY2("called."); + /* get the spillable live ranges */ + lrcs = computeSpillable (ic); + + + /* get all live ranges that are rematerizable */ + if ((selectS = liveRangesWith (lrcs, rematable, ebp, ic))) + { + /* return the least used of these */ + return leastUsedLR (selectS); + } + + /* get live ranges with spillLocations in direct space */ + if ((selectS = liveRangesWith (lrcs, directSpilLoc, ebp, ic))) + { + sym = leastUsedLR (selectS); + strcpy (sym->rname, (sym->usl.spillLoc->rname[0] ? + sym->usl.spillLoc->rname : + sym->usl.spillLoc->name)); + sym->spildir = 1; + /* mark it as allocation required */ + sym->usl.spillLoc->allocreq = 1; + return sym; + } + + /* if the symbol is local to the block then */ + if (forSym->liveTo < ebp->lSeq) + { + + /* check if there are any live ranges allocated + to registers that are not used in this block */ + if (!_G.blockSpil && (selectS = liveRangesWith (lrcs, notUsedInBlock, ebp, ic))) + { + sym = leastUsedLR (selectS); + /* if this is not rematerializable */ + if (!sym->remat) + { + _G.blockSpil++; + sym->blockSpil = 1; + } + return sym; + } + + /* check if there are any live ranges that not + used in the remainder of the block */ + if (!_G.blockSpil && + !isiCodeInFunctionCall (ic) && + (selectS = liveRangesWith (lrcs, notUsedInRemaining, ebp, ic))) + { + sym = leastUsedLR (selectS); + if (!sym->remat) + { + sym->remainSpil = 1; + _G.blockSpil++; + } + return sym; + } + } + + /* find live ranges with spillocation && not used as pointers */ + if ((selectS = liveRangesWith (lrcs, hasSpilLocnoUptr, ebp, ic))) + { + + sym = leastUsedLR (selectS); + /* mark this as allocation required */ + sym->usl.spillLoc->allocreq = 1; + return sym; + } + + /* find live ranges with spillocation */ + if ((selectS = liveRangesWith (lrcs, hasSpilLoc, ebp, ic))) + { + + sym = leastUsedLR (selectS); + sym->usl.spillLoc->allocreq = 1; + return sym; + } + + /* couldn't find then we need to create a spil + location on the stack , for which one? the least + used ofcourse */ + if ((selectS = liveRangesWith (lrcs, noSpilLoc, ebp, ic))) + { + + /* return a created spil location */ + sym = createStackSpil (leastUsedLR (selectS)); + sym->usl.spillLoc->allocreq = 1; + return sym; + } + + /* this is an extreme situation we will spill + this one : happens very rarely but it does happen */ + spillThis (forSym); + return forSym; + +} + +/*-----------------------------------------------------------------*/ +/* spilSomething - spil some variable & mark registers as free */ +/*-----------------------------------------------------------------*/ +static bool +spilSomething (iCode * ic, eBBlock * ebp, symbol * forSym) +{ + symbol *ssym; + int i; + + debugLog ("%s\n", __FUNCTION__); + /* get something we can spil */ + ssym = selectSpil (ic, ebp, forSym); + + /* mark it as spilt */ + ssym->isspilt = 1; + _G.spiltSet = bitVectSetBit (_G.spiltSet, ssym->key); + + /* mark it as not register assigned & + take it away from the set */ + bitVectUnSetBit (_G.regAssigned, ssym->key); + + /* mark the registers as free */ + for (i = 0; i < ssym->nRegs; i++) + if (ssym->regs[i]) + freeReg (ssym->regs[i]); + + /* if spilt on stack then free up r0 & r1 + if they could have been assigned to as gprs */ + if (!pic14_ptrRegReq && isSpiltOnStack (ssym)) + { + pic14_ptrRegReq++; + spillLRWithPtrReg (ssym); + } + + /* if this was a block level spil then insert push & pop + at the start & end of block respectively */ + if (ssym->blockSpil) + { + iCode *nic = newiCode (IPUSH, operandFromSymbol (ssym), NULL); + /* add push to the start of the block */ + addiCodeToeBBlock (ebp, nic, (ebp->sch->op == LABEL ? + ebp->sch->next : ebp->sch)); + nic = newiCode (IPOP, operandFromSymbol (ssym), NULL); + /* add pop to the end of the block */ + addiCodeToeBBlock (ebp, nic, NULL); + } + + /* if spilt because not used in the remainder of the + block then add a push before this instruction and + a pop at the end of the block */ + if (ssym->remainSpil) + { + + iCode *nic = newiCode (IPUSH, operandFromSymbol (ssym), NULL); + /* add push just before this instruction */ + addiCodeToeBBlock (ebp, nic, ic); + + nic = newiCode (IPOP, operandFromSymbol (ssym), NULL); + /* add pop to the end of the block */ + addiCodeToeBBlock (ebp, nic, NULL); + } + + if (ssym == forSym) + return FALSE; + else + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* getRegPtr - will try for PTR if not a GPR type if not spil */ +/*-----------------------------------------------------------------*/ +static regs * +getRegPtr (iCode * ic, eBBlock * ebp, symbol * sym) +{ + regs *reg; + int j; + + debugLog ("%s\n", __FUNCTION__); +tryAgain: + /* try for a ptr type */ + if ((reg = allocReg (REG_PTR))) + return reg; + + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + /* we have to spil */ + if (!spilSomething (ic, ebp, sym)) + return NULL; + + /* make sure partially assigned registers aren't reused */ + for (j=0; j<=sym->nRegs; j++) + if (sym->regs[j]) + sym->regs[j]->isFree = 0; + + /* this looks like an infinite loop but + in really selectSpil will abort */ + goto tryAgain; +} + +/*-----------------------------------------------------------------*/ +/* getRegGpr - will try for GPR if not spil */ +/*-----------------------------------------------------------------*/ +static regs * +getRegGpr (iCode * ic, eBBlock * ebp, symbol * sym) +{ + regs *reg; + int j; + + debugLog ("%s\n", __FUNCTION__); +tryAgain: + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + if (!pic14_ptrRegReq) + if ((reg = allocReg (REG_PTR))) + return reg; + + /* we have to spil */ + if (!spilSomething (ic, ebp, sym)) + return NULL; + + /* make sure partially assigned registers aren't reused */ + for (j=0; j<=sym->nRegs; j++) + if (sym->regs[j]) + sym->regs[j]->isFree = 0; + + /* this looks like an infinite loop but + in really selectSpil will abort */ + goto tryAgain; +} + +/*-----------------------------------------------------------------*/ +/* symHasReg - symbol has a given register */ +/*-----------------------------------------------------------------*/ +static bool +symHasReg (symbol * sym, regs * reg) +{ + int i; + + debugLog ("%s\n", __FUNCTION__); + for (i = 0; i < sym->nRegs; i++) + if (sym->regs[i] == reg) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* deassignLRs - check the live to and if they have registers & are */ +/* not spilt then free up the registers */ +/*-----------------------------------------------------------------*/ +static void +deassignLRs (iCode * ic, eBBlock * ebp) +{ + symbol *sym; + int k; + symbol *result; + + debugLog ("%s\n", __FUNCTION__); + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) + { + + symbol *psym = NULL; + /* if it does not end here */ + if (sym->liveTo > ic->seq) + continue; + + /* Prevent the result from being assigned the same registers as (one) + * operand as many genXXX-functions fail otherwise. + * POINTER_GET(ic) || ic->op == LEFT_OP || ic->op == RIGHT_OP || ic->op == NOT + * are known to fail. */ + if (sym->liveTo == ic->seq && IC_RESULT(ic)) + { + switch (ic->op) + { + case '=': /* assignment */ + case BITWISEAND: /* bitwise AND */ + case '|': /* bitwise OR */ + case '^': /* bitwise XOR */ + case '~': /* bitwise negate */ + case RLC: /* rotate through carry */ + case RRC: + case UNARYMINUS: + case '+': /* addition */ + case '-': /* subtraction */ + /* go ahead, these are safe to use with + * non-disjoint register sets */ + break; + + default: + /* do not release operand registers */ + //fprintf (stderr, "%s:%u: operand not freed: ", __FILE__, __LINE__); piCode (ic, stderr); fprintf (stderr, "\n"); + continue; + } // switch + } + + /* if it was spilt on stack then we can + mark the stack spil location as free */ + if (sym->isspilt) + { + if (sym->stackSpil) + { + sym->usl.spillLoc->isFree = 1; + sym->stackSpil = 0; + } + continue; + } + + if (!bitVectBitValue (_G.regAssigned, sym->key)) + continue; + /* special case check if this is an IFX & + the privious one was a pop and the + previous one was not spilt then keep track + of the symbol */ + if (ic->op == IFX && ic->prev && + ic->prev->op == IPOP && + !ic->prev->parmPush && + IS_SYMOP(IC_LEFT (ic->prev)) && + !OP_SYMBOL (IC_LEFT (ic->prev))->isspilt) + psym = OP_SYMBOL (IC_LEFT (ic->prev)); + + if (sym->nRegs) + { + int i = 0; + + bitVectUnSetBit (_G.regAssigned, sym->key); + + /* if the result of this one needs registers + and does not have it then assign it right + away */ + if (IC_RESULT (ic) && + !(SKIP_IC2 (ic) || /* not a special icode */ + ic->op == JUMPTABLE || + ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP || + ic->op == RETURN || + POINTER_SET (ic)) && + IS_SYMOP (IC_RESULT (ic)) && + (result = OP_SYMBOL (IC_RESULT (ic))) && /* has a result */ + result->liveTo > ic->seq && /* and will live beyond this */ + result->liveTo <= ebp->lSeq && /* does not go beyond this block */ + result->liveFrom == ic->seq && /* does not start before here */ + result->regType == sym->regType && /* same register types */ + result->regType == sym->regType && /* same register types */ + result->nRegs && /* which needs registers */ + !result->isspilt && /* and does not already have them */ + !result->remat && + !bitVectBitValue (_G.regAssigned, result->key) && + /* the number of free regs + number of regs in this LR + can accomodate the what result Needs */ + ((nfreeRegsType (result->regType) + + sym->nRegs) >= result->nRegs) + ) + { + + for (i = 0; i < max (sym->nRegs, result->nRegs); i++) + if (i < sym->nRegs) + result->regs[i] = sym->regs[i]; + else + result->regs[i] = getRegGpr (ic, ebp, result); + + _G.regAssigned = bitVectSetBit (_G.regAssigned, result->key); + + } + + /* free the remaining */ + for (; i < sym->nRegs; i++) + { + if (psym) + { + if (!symHasReg (psym, sym->regs[i])) + freeReg (sym->regs[i]); + } + else + freeReg (sym->regs[i]); + } + } + } +} + + +/*-----------------------------------------------------------------*/ +/* reassignLR - reassign this to registers */ +/*-----------------------------------------------------------------*/ +static void +reassignLR (operand * op) +{ + symbol *sym = OP_SYMBOL (op); + int i; + + debugLog ("%s\n", __FUNCTION__); + /* not spilt any more */ + sym->isspilt = sym->blockSpil = sym->remainSpil = 0; + bitVectUnSetBit (_G.spiltSet, sym->key); + + _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); + + _G.blockSpil--; + + for (i = 0; i < sym->nRegs; i++) + sym->regs[i]->isFree = 0; +} + +/*-----------------------------------------------------------------*/ +/* willCauseSpill - determines if allocating will cause a spill */ +/*-----------------------------------------------------------------*/ +static int +willCauseSpill (int nr, int rt) +{ + debugLog ("%s\n", __FUNCTION__); + /* first check if there are any avlb registers + of te type required */ + if (rt == REG_PTR) + { + /* special case for pointer type + if pointer type not avlb then + check for type gpr */ + if (nFreeRegs (rt) >= nr) + return 0; + if (nFreeRegs (REG_GPR) >= nr) + return 0; + } + else + { + if (pic14_ptrRegReq) + { + if (nFreeRegs (rt) >= nr) + return 0; + } + else + { + if (nFreeRegs (REG_PTR) + + nFreeRegs (REG_GPR) >= nr) + return 0; + } + } + + debugLog (" ... yep it will (cause a spill)\n"); + /* it will cause a spil */ + return 1; +} + +/*-----------------------------------------------------------------*/ +/* positionRegs - the allocator can allocate same registers to res- */ +/* ult and operand, if this happens make sure they are in the same */ +/* position as the operand otherwise chaos results */ +/*-----------------------------------------------------------------*/ +static void +positionRegs (symbol * result, symbol * opsym, int lineno) +{ + int count = min (result->nRegs, opsym->nRegs); + int i, j = 0, shared = 0; + + debugLog ("%s\n", __FUNCTION__); + /* if the result has been spilt then cannot share */ + if (opsym->isspilt) + return; +again: + shared = 0; + /* first make sure that they actually share */ + for (i = 0; i < count; i++) + { + for (j = 0; j < count; j++) + { + if (result->regs[i] == opsym->regs[j] && i != j) + { + shared = 1; + goto xchgPositions; + } + } + } +xchgPositions: + if (shared) + { + regs *tmp = result->regs[i]; + result->regs[i] = result->regs[j]; + result->regs[j] = tmp; + goto again; + } +} + +/*------------------------------------------------------------------*/ +/* verifyRegsAssigned - make sure an iTemp is properly initialized; */ +/* it should either have registers or have beed spilled. Otherwise, */ +/* there was an uninitialized variable, so just spill this to get */ +/* the operand in a valid state. */ +/*------------------------------------------------------------------*/ +static void +verifyRegsAssigned (operand *op, iCode * ic) +{ + symbol * sym; + + if (!op) return; + if (!IS_ITEMP (op)) return; + + sym = OP_SYMBOL (op); + if (sym->isspilt) return; + if (!sym->nRegs) return; + if (sym->regs[0]) return; + + werrorfl (ic->filename, ic->lineno, W_LOCAL_NOINIT, + sym->prereqv ? sym->prereqv->name : sym->name); + spillThis (sym); +} + + +/*-----------------------------------------------------------------*/ +/* serialRegAssign - serially allocate registers to the variables */ +/*-----------------------------------------------------------------*/ +static void +serialRegAssign (eBBlock ** ebbs, int count) +{ + int i; + + debugLog ("%s\n", __FUNCTION__); + /* for all blocks */ + for (i = 0; i < count; i++) + { + + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + /* of all instructions do */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + debugLog (" op: %s\n", decodeOp (ic->op)); + + /* if this is an ipop that means some live + range will have to be assigned again */ + if (ic->op == IPOP) + reassignLR (IC_LEFT (ic)); + + /* if result is present && is a true symbol */ + if (IC_RESULT (ic) && ic->op != IFX && + IS_TRUE_SYMOP (IC_RESULT (ic))) + OP_SYMBOL (IC_RESULT (ic))->allocreq = 1; + + /* take away registers from live + ranges that end at this instruction */ + deassignLRs (ic, ebbs[i]); + + /* some don't need registers */ + if (SKIP_IC2 (ic) || + ic->op == JUMPTABLE || + ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP || + (IC_RESULT (ic) && POINTER_SET (ic))) + continue; + + /* now we need to allocate registers + only for the result */ + if (IC_RESULT (ic) && IS_SYMOP (IC_RESULT (ic))) + { + symbol *sym = OP_SYMBOL (IC_RESULT (ic)); + bitVect *spillable; + int willCS; + int j; + int ptrRegSet = 0; + + /* Make sure any spill location is definately allocated */ + if (sym->isspilt && !sym->remat && sym->usl.spillLoc && + !sym->usl.spillLoc->allocreq) + { + sym->usl.spillLoc->allocreq++; + } + + /* if it does not need or is spilt + or is already assigned to registers + or will not live beyond this instructions */ + if (!sym->nRegs || + sym->isspilt || + bitVectBitValue (_G.regAssigned, sym->key) || + sym->liveTo <= ic->seq) + continue; + + /* if some liverange has been spilt at the block level + and this one live beyond this block then spil this + to be safe */ + if (_G.blockSpil && sym->liveTo > ebbs[i]->lSeq) + { + spillThis (sym); + continue; + } + /* if trying to allocate this will cause + a spill and there is nothing to spill + or this one is rematerializable then + spill this one */ + willCS = willCauseSpill (sym->nRegs, sym->regType); + spillable = computeSpillable (ic); + if (sym->remat || + (willCS && bitVectIsZero (spillable))) + { + + spillThis (sym); + continue; + + } + + /* If the live range preceeds the point of definition + then ideally we must take into account registers that + have been allocated after sym->liveFrom but freed + before ic->seq. This is complicated, so spill this + symbol instead and let fillGaps handle the allocation. */ + if (sym->liveFrom < ic->seq) + { + spillThis (sym); + continue; + } + + /* if it has a spillocation & is used less than + all other live ranges then spill this */ + if (willCS) { + if (sym->usl.spillLoc) { + symbol *leastUsed = leastUsedLR (liveRangesWith (spillable, + allLRs, ebbs[i], ic)); + if (leastUsed && leastUsed->used > sym->used) { + spillThis (sym); + continue; + } + } else { + /* if none of the liveRanges have a spillLocation then better + to spill this one than anything else already assigned to registers */ + if (liveRangesWith(spillable,noSpilLoc,ebbs[i],ic)) { + /* if this is local to this block then we might find a block spil */ + if (!(sym->liveFrom >= ebbs[i]->fSeq && sym->liveTo <= ebbs[i]->lSeq)) { + spillThis (sym); + continue; + } + } + } + } + + if (ic->op == RECEIVE) + debugLog ("When I get clever, I'll optimize the receive logic\n"); + + /* if we need ptr regs for the right side + then mark it */ + if (POINTER_GET (ic) + && IS_SYMOP(IC_LEFT(ic)) + && getSize (OP_SYMBOL (IC_LEFT (ic))->type) + <= (unsigned) PTRSIZE) + { + pic14_ptrRegReq++; + ptrRegSet = 1; + } + /* else we assign registers to it */ + _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); + + debugLog (" %d - \n", __LINE__); + if(debugF) + bitVectDebugOn(_G.regAssigned, debugF); + for (j = 0; j < sym->nRegs; j++) + { + if (sym->regType == REG_PTR) + sym->regs[j] = getRegPtr (ic, ebbs[i], sym); + else + sym->regs[j] = getRegGpr (ic, ebbs[i], sym); + + /* if the allocation failed which means + this was spilt then break */ + if (!sym->regs[j]) + break; + } + debugLog (" %d - \n", __LINE__); + + /* if it shares registers with operands make sure + that they are in the same position */ + if (IC_LEFT (ic) && IS_SYMOP (IC_LEFT (ic)) && + IS_SYMOP(IC_RESULT(ic)) && + OP_SYMBOL (IC_LEFT (ic))->nRegs && ic->op != '=') + positionRegs (OP_SYMBOL (IC_RESULT (ic)), + OP_SYMBOL (IC_LEFT (ic)), ic->lineno); + /* do the same for the right operand */ + if (IC_RIGHT (ic) && IS_SYMOP (IC_RIGHT (ic)) && + IS_SYMOP(IC_RESULT(ic)) && + OP_SYMBOL (IC_RIGHT (ic))->nRegs && ic->op != '=') + positionRegs (OP_SYMBOL (IC_RESULT (ic)), + OP_SYMBOL (IC_RIGHT (ic)), ic->lineno); + + debugLog (" %d - \n", __LINE__); + if (ptrRegSet) + { + debugLog (" %d - \n", __LINE__); + pic14_ptrRegReq--; + ptrRegSet = 0; + } + + } + } + } + + /* Check for and fix any problems with uninitialized operands */ + for (i = 0; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + if (SKIP_IC2 (ic)) + continue; + + if (ic->op == IFX) + { + verifyRegsAssigned (IC_COND (ic), ic); + continue; + } + + if (ic->op == JUMPTABLE) + { + verifyRegsAssigned (IC_JTCOND (ic), ic); + continue; + } + + verifyRegsAssigned (IC_RESULT (ic), ic); + verifyRegsAssigned (IC_LEFT (ic), ic); + verifyRegsAssigned (IC_RIGHT (ic), ic); + } + } + +} + +/*-----------------------------------------------------------------*/ +/* rUmaskForOp :- returns register mask for an operand */ +/*-----------------------------------------------------------------*/ +static bitVect * +rUmaskForOp (operand * op) +{ + bitVect *rumask; + symbol *sym; + int j; + + debugLog ("%s\n", __FUNCTION__); + /* only temporaries are assigned registers */ + if (!IS_ITEMP (op)) + return NULL; + + sym = OP_SYMBOL (op); + + /* if spilt or no registers assigned to it + then nothing */ + if (sym->isspilt || !sym->nRegs) + return NULL; + + rumask = newBitVect (pic14_nRegs); + + for (j = 0; j < sym->nRegs; j++) + { + rumask = bitVectSetBit (rumask, + sym->regs[j]->rIdx); + } + + return rumask; +} + +/*-----------------------------------------------------------------*/ +/* regsUsedIniCode :- returns bit vector of registers used in iCode */ +/*-----------------------------------------------------------------*/ +static bitVect * +regsUsedIniCode (iCode * ic) +{ + bitVect *rmask = newBitVect (pic14_nRegs); + + debugLog ("%s\n", __FUNCTION__); + /* do the special cases first */ + if (ic->op == IFX) + { + rmask = bitVectUnion (rmask, + rUmaskForOp (IC_COND (ic))); + goto ret; + } + + /* for the jumptable */ + if (ic->op == JUMPTABLE) + { + rmask = bitVectUnion (rmask, + rUmaskForOp (IC_JTCOND (ic))); + + goto ret; + } + + /* of all other cases */ + if (IC_LEFT (ic)) + rmask = bitVectUnion (rmask, + rUmaskForOp (IC_LEFT (ic))); + + + if (IC_RIGHT (ic)) + rmask = bitVectUnion (rmask, + rUmaskForOp (IC_RIGHT (ic))); + + if (IC_RESULT (ic)) + rmask = bitVectUnion (rmask, + rUmaskForOp (IC_RESULT (ic))); + +ret: + return rmask; +} + +/*-----------------------------------------------------------------*/ +/* createRegMask - for each instruction will determine the regsUsed */ +/*-----------------------------------------------------------------*/ +static void +createRegMask (eBBlock ** ebbs, int count) +{ + int i; + + debugLog ("%s\n", __FUNCTION__); + /* for all blocks */ + for (i = 0; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + /* for all instructions */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + + int j; + + if (SKIP_IC2 (ic) || !ic->rlive) + continue; + + /* first mark the registers used in this + instruction */ + ic->rUsed = regsUsedIniCode (ic); + _G.funcrUsed = bitVectUnion (_G.funcrUsed, ic->rUsed); + + /* now create the register mask for those + registers that are in use : this is a + super set of ic->rUsed */ + ic->rMask = newBitVect (pic14_nRegs + 1); + + /* for all live Ranges alive at this point */ + for (j = 1; j < ic->rlive->size; j++) + { + symbol *sym; + int k; + + /* if not alive then continue */ + if (!bitVectBitValue (ic->rlive, j)) + continue; + + /* find the live range we are interested in */ + if (!(sym = hTabItemWithKey (liveRanges, j))) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "createRegMask cannot find live range"); + exit (0); + } + + /* if no register assigned to it */ + if (!sym->nRegs || sym->isspilt) + continue; + + /* for all the registers allocated to it */ + for (k = 0; k < sym->nRegs; k++) + if (sym->regs[k]) + ic->rMask = + bitVectSetBit (ic->rMask, sym->regs[k]->rIdx); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* regTypeNum - computes the type & number of registers required */ +/*-----------------------------------------------------------------*/ +static void +regTypeNum () +{ + symbol *sym; + int k; + //iCode *ic; + + debugLog ("%s\n", __FUNCTION__); + /* for each live range do */ + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) { + + debugLog (" %d - %s\n", __LINE__, sym->rname); + + /* if used zero times then no registers needed */ + if ((sym->liveTo - sym->liveFrom) == 0) + continue; + + + /* if the live range is a temporary */ + if (sym->isitmp) { + + debugLog (" %d - itemp register\n", __LINE__); + + /* if the type is marked as a conditional */ + if (sym->regType == REG_CND) + continue; + + /* if used in return only then we don't + need registers */ + if (sym->accuse) { + if (IS_AGGREGATE (sym->type) || sym->isptr) + sym->type = aggrToPtr (sym->type, FALSE); + debugLog (" %d - no reg needed - accumulator used\n", __LINE__); + + continue; + } + + if (sym->ruonly) { + //if (IS_AGGREGATE (sym->type) || sym->isptr) + // sym->type = aggrToPtr (sym->type, FALSE); + debugLog (" %d - used as a return\n", __LINE__); + + //continue; + } + + /* if the symbol has only one definition & + that definition is a get_pointer and the + pointer we are getting is rematerializable and + in "data" space */ + +#if 0 + if (bitVectnBitsOn (sym->defs) == 1 && + (ic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (sym->defs))) && + POINTER_GET (ic) && + !IS_BITVAR (sym->etype) && + (aggrToPtrDclType (operandType (IC_LEFT (ic)), FALSE) == POINTER)) { + + if (ptrPseudoSymSafe (sym, ic)) { + + symbol *psym; + + debugLog (" %d - \n", __LINE__); + + /* create a pseudo symbol & force a spil */ + //X symbol *psym = newSymbol (rematStr (OP_SYMBOL (IC_LEFT (ic))), 1); + psym = rematStr (OP_SYMBOL (IC_LEFT (ic))); + psym->type = sym->type; + psym->etype = sym->etype; + psym->psbase = ptrBaseRematSym (OP_SYMBOL (IC_LEFT (ic))); + strcpy (psym->rname, psym->name); + sym->isspilt = 1; + sym->usl.spillLoc = psym; + continue; + } + + /* if in data space or idata space then try to + allocate pointer register */ + + } +#endif + + /* if not then we require registers */ + sym->nRegs = ((IS_AGGREGATE (sym->type) || sym->isptr) ? + getSize (sym->type = aggrToPtr (sym->type, FALSE)) : + getSize (sym->type)); + + + if(IS_PTR_CONST (sym->type)) { + debugLog (" %d const pointer type requires %d registers, changing to 2\n",__LINE__,sym->nRegs); + sym->nRegs = 2; + } + + if (sym->nRegs > 4) { + fprintf (stderr, "allocated more than 4 or 0 registers for type "); + printTypeChain (sym->type, stderr); + fprintf (stderr, "\n"); + } + + /* determine the type of register required */ + if (sym->nRegs == 1 && + IS_PTR (sym->type) && + sym->uptr) + sym->regType = REG_PTR; + else + sym->regType = REG_GPR; + + + debugLog (" reg name %s, reg type %s\n", sym->rname, debugLogRegType (sym->regType)); + + } + else + /* for the first run we don't provide */ + /* registers for true symbols we will */ + /* see how things go */ + sym->nRegs = 0; + } + +} + +/*-----------------------------------------------------------------*/ +/* deallocStackSpil - this will set the stack pointer back */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (deallocStackSpil) +{ + symbol *sym = item; + + debugLog ("%s\n", __FUNCTION__); + deallocLocal (sym); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* farSpacePackable - returns the packable icode for far variables */ +/*-----------------------------------------------------------------*/ +static iCode * +farSpacePackable (iCode * ic) +{ + iCode *dic; + + debugLog ("%s\n", __FUNCTION__); + /* go thru till we find a definition for the + symbol on the right */ + for (dic = ic->prev; dic; dic = dic->prev) + { + + /* if the definition is a call then no */ + if ((dic->op == CALL || dic->op == PCALL) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + { + return NULL; + } + + /* if shift by unknown amount then not */ + if ((dic->op == LEFT_OP || dic->op == RIGHT_OP) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + return NULL; + + /* if pointer get and size > 1 */ + if (POINTER_GET (dic) && + getSize (aggrToPtr (operandType (IC_LEFT (dic)), FALSE)) > 1) + return NULL; + + if (POINTER_SET (dic) && + getSize (aggrToPtr (operandType (IC_RESULT (dic)), FALSE)) > 1) + return NULL; + + /* if any three is a true symbol in far space */ + if (IC_RESULT (dic) && + IS_TRUE_SYMOP (IC_RESULT (dic)) && + isOperandInFarSpace (IC_RESULT (dic))) + return NULL; + + if (IC_RIGHT (dic) && + IS_TRUE_SYMOP (IC_RIGHT (dic)) && + isOperandInFarSpace (IC_RIGHT (dic)) && + !isOperandEqual (IC_RIGHT (dic), IC_RESULT (ic))) + return NULL; + + if (IC_LEFT (dic) && + IS_TRUE_SYMOP (IC_LEFT (dic)) && + isOperandInFarSpace (IC_LEFT (dic)) && + !isOperandEqual (IC_LEFT (dic), IC_RESULT (ic))) + return NULL; + + if (isOperandEqual (IC_RIGHT (ic), IC_RESULT (dic))) + { + if ((dic->op == LEFT_OP || + dic->op == RIGHT_OP || + dic->op == '-') && + IS_OP_LITERAL (IC_RIGHT (dic))) + return NULL; + else + return dic; + } + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* packRegsForAssign - register reduction for assignment */ +/*-----------------------------------------------------------------*/ +static int +packRegsForAssign (iCode * ic, eBBlock * ebp) +{ + + iCode *dic, *sic; + + debugLog ("%s\n", __FUNCTION__); + + debugAopGet (" result:", IC_RESULT (ic)); + debugAopGet (" left:", IC_LEFT (ic)); + debugAopGet (" right:", IC_RIGHT (ic)); + + /* if this is at an absolute address, then get the address. */ + if (SPEC_ABSA ( OP_SYM_ETYPE(IC_RESULT(ic))) ) { + if(IS_CONFIG_ADDRESS( SPEC_ADDR ( OP_SYM_ETYPE(IC_RESULT(ic))))) { + debugLog (" %d - found config word declaration\n", __LINE__); + if(IS_VALOP(IC_RIGHT(ic))) { + debugLog (" setting config word to %x\n", + (int) ulFromVal (IC_RIGHT(ic)->operand.valOperand)); + pic14_assignConfigWordValue( SPEC_ADDR ( OP_SYM_ETYPE(IC_RESULT(ic))), + (int) ulFromVal (IC_RIGHT(ic)->operand.valOperand)); + } + + /* remove the assignment from the iCode chain. */ + + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + + return 1; + + } + } + + if (!IS_ITEMP (IC_RESULT (ic))) { + allocDirReg(IC_RESULT (ic)); + debugLog (" %d - result is not temp\n", __LINE__); + } + /* + if (IC_LEFT (ic) && !IS_ITEMP (IC_LEFT (ic))) { + debugLog (" %d - left is not temp, allocating\n", __LINE__); + allocDirReg(IC_LEFT (ic)); + } + */ + + if (!IS_ITEMP (IC_RIGHT (ic))) { + debugLog (" %d - not packing - right is not temp\n", __LINE__); + + /* only pack if this is not a function pointer */ + if (!IS_REF (IC_RIGHT (ic))) + allocDirReg(IC_RIGHT (ic)); + return 0; + } + + if (OP_SYMBOL (IC_RIGHT (ic))->isind || + OP_LIVETO (IC_RIGHT (ic)) > ic->seq) + { + debugLog (" %d - not packing - right side fails \n", __LINE__); + return 0; + } + + /* if the true symbol is defined in far space or on stack + then we should not since this will increase register pressure */ + if (isOperandInFarSpace (IC_RESULT (ic))) + { + if ((dic = farSpacePackable (ic))) + goto pack; + else + return 0; + + } + /* find the definition of iTempNN scanning backwards if we find a + a use of the true symbol before we find the definition then + we cannot pack */ + for (dic = ic->prev; dic; dic = dic->prev) + { + + /* if there is a function call and this is + a parameter & not my parameter then don't pack it */ + if ((dic->op == CALL || dic->op == PCALL) && + (OP_SYMBOL (IC_RESULT (ic))->_isparm && + !OP_SYMBOL (IC_RESULT (ic))->ismyparm)) + { + debugLog (" %d - \n", __LINE__); + dic = NULL; + break; + } + + if (SKIP_IC2 (dic)) + continue; + + if (IS_TRUE_SYMOP (IC_RESULT (dic)) && + IS_OP_VOLATILE (IC_RESULT (dic))) + { + debugLog (" %d - dic is VOLATILE \n", __LINE__); + dic = NULL; + break; + } + + if (IS_SYMOP (IC_RESULT (dic)) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + { + /* A previous result was assigned to the same register - we'll our definition */ + debugLog (" %d - dic result key == ic right key -- pointer set=%c\n", + __LINE__, ((POINTER_SET (dic)) ? 'Y' : 'N')); + if (POINTER_SET (dic)) + dic = NULL; + + break; + } + + if (IS_SYMOP (IC_RIGHT (dic)) && + (IC_RIGHT (dic)->key == IC_RESULT (ic)->key || + IC_RIGHT (dic)->key == IC_RIGHT (ic)->key)) + { + debugLog (" %d - dic right key == ic rightor result key\n", __LINE__); + dic = NULL; + break; + } + + if (IS_SYMOP (IC_LEFT (dic)) && + (IC_LEFT (dic)->key == IC_RESULT (ic)->key || + IC_LEFT (dic)->key == IC_RIGHT (ic)->key)) + { + debugLog (" %d - dic left key == ic rightor result key\n", __LINE__); + dic = NULL; + break; + } + + if (POINTER_SET (dic) && + IC_RESULT (dic)->key == IC_RESULT (ic)->key) + { + debugLog (" %d - dic result key == ic result key -- pointer set=Y\n", + __LINE__); + dic = NULL; + break; + } + } + + if (!dic) + return 0; /* did not find */ + + /* if assignment then check that right is not a bit */ + if (ASSIGNMENT (ic) && !POINTER_SET (ic)) + { + sym_link *etype = operandType (IC_RESULT (dic)); + if (IS_BITFIELD (etype)) + { + /* if result is a bit too then it's ok */ + etype = operandType (IC_RESULT (ic)); + if (!IS_BITFIELD (etype)) + return 0; + } + } + + /* if the result is on stack or iaccess then it must be + the same at least one of the operands */ + if (OP_SYMBOL (IC_RESULT (ic))->onStack || + OP_SYMBOL (IC_RESULT (ic))->iaccess) + { + + /* the operation has only one symbol + operator then we can pack */ + if ((IC_LEFT (dic) && !IS_SYMOP (IC_LEFT (dic))) || + (IC_RIGHT (dic) && !IS_SYMOP (IC_RIGHT (dic)))) + goto pack; + + if (!((IC_LEFT (dic) && + IC_RESULT (ic)->key == IC_LEFT (dic)->key) || + (IC_RIGHT (dic) && + IC_RESULT (ic)->key == IC_RIGHT (dic)->key))) + return 0; + } +pack: + debugLog (" packing. removing %s\n", OP_SYMBOL (IC_RIGHT (ic))->rname); + debugLog (" replacing with %s\n", OP_SYMBOL (IC_RESULT (dic))->rname); + /* found the definition */ + /* replace the result with the result of */ + /* this assignment and remove this assignment */ + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + IC_RESULT (dic) = IC_RESULT (ic); + + if (IS_ITEMP (IC_RESULT (dic)) && OP_SYMBOL (IC_RESULT (dic))->liveFrom > dic->seq) + { + OP_SYMBOL (IC_RESULT (dic))->liveFrom = dic->seq; + } + /* delete from liverange table also + delete from all the points inbetween and the new + one */ + for (sic = dic; sic != ic; sic = sic->next) + { + bitVectUnSetBit (sic->rlive, IC_RESULT (ic)->key); + if (IS_ITEMP (IC_RESULT (dic))) + bitVectSetBit (sic->rlive, IC_RESULT (dic)->key); + } + + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS(IC_RESULT (dic))=bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + return 1; + + +} + +/*-----------------------------------------------------------------*/ +/* findAssignToSym : scanning backwards looks for first assig found */ +/*-----------------------------------------------------------------*/ +static iCode * +findAssignToSym (operand * op, iCode * ic) +{ + iCode *dic; + + debugLog ("%s\n", __FUNCTION__); + for (dic = ic->prev; dic; dic = dic->prev) + { + + /* if definition by assignment */ + if (dic->op == '=' && + !POINTER_SET (dic) && + IC_RESULT (dic)->key == op->key + /* && IS_TRUE_SYMOP(IC_RIGHT(dic)) */ + ) + { + + /* we are interested only if defined in far space */ + /* or in stack space in case of + & - */ + + /* if assigned to a non-symbol then return + true */ + if (!IS_SYMOP (IC_RIGHT (dic))) + break; + + /* if the symbol is in far space then + we should not */ + if (isOperandInFarSpace (IC_RIGHT (dic))) + return NULL; + + /* for + & - operations make sure that + if it is on the stack it is the same + as one of the three operands */ + if ((ic->op == '+' || ic->op == '-') && + OP_SYMBOL (IC_RIGHT (dic))->onStack) + { + + if (IC_RESULT (ic)->key != IC_RIGHT (dic)->key && + IC_LEFT (ic)->key != IC_RIGHT (dic)->key && + IC_RIGHT (ic)->key != IC_RIGHT (dic)->key) + return NULL; + } + + break; + + } + + /* if we find an usage then we cannot delete it */ + if (IC_LEFT (dic) && IC_LEFT (dic)->key == op->key) + return NULL; + + if (IC_RIGHT (dic) && IC_RIGHT (dic)->key == op->key) + return NULL; + + if (POINTER_SET (dic) && IC_RESULT (dic)->key == op->key) + return NULL; + } + + /* now make sure that the right side of dic + is not defined between ic & dic */ + if (dic) + { + iCode *sic = dic->next; + + for (; sic != ic; sic = sic->next) + if (IC_RESULT (sic) && + IC_RESULT (sic)->key == IC_RIGHT (dic)->key) + return NULL; + } + + return dic; + + +} + +/*-----------------------------------------------------------------*/ +/* packRegsForSupport :- reduce some registers for support calls */ +/*-----------------------------------------------------------------*/ +static int +packRegsForSupport (iCode * ic, eBBlock * ebp) +{ + int change = 0; + + debugLog ("%s\n", __FUNCTION__); + /* for the left & right operand :- look to see if the + left was assigned a true symbol in far space in that + case replace them */ + if (IS_ITEMP (IC_LEFT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->liveTo <= ic->seq) + { + iCode *dic = findAssignToSym (IC_LEFT (ic), ic); + iCode *sic; + + if (!dic) + goto right; + + debugAopGet ("removing left:", IC_LEFT (ic)); + + /* found it we need to remove it from the + block */ + for (sic = dic; sic != ic; sic = sic->next) + bitVectUnSetBit (sic->rlive, IC_LEFT (ic)->key); + + IC_LEFT (ic)->operand.symOperand = + IC_RIGHT (dic)->operand.symOperand; + IC_LEFT (ic)->key = IC_RIGHT (dic)->operand.symOperand->key; + remiCodeFromeBBlock (ebp, dic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); + change++; + } + + /* do the same for the right operand */ +right: + if (!change && + IS_ITEMP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->liveTo <= ic->seq) + { + iCode *dic = findAssignToSym (IC_RIGHT (ic), ic); + iCode *sic; + + if (!dic) + return change; + + /* if this is a subtraction & the result + is a true symbol in far space then don't pack */ + if (ic->op == '-' && IS_TRUE_SYMOP (IC_RESULT (dic))) + { + sym_link *etype = getSpec (operandType (IC_RESULT (dic))); + if (IN_FARSPACE (SPEC_OCLS (etype))) + return change; + } + + debugAopGet ("removing right:", IC_RIGHT (ic)); + + /* found it we need to remove it from the + block */ + for (sic = dic; sic != ic; sic = sic->next) + bitVectUnSetBit (sic->rlive, IC_RIGHT (ic)->key); + + IC_RIGHT (ic)->operand.symOperand = + IC_RIGHT (dic)->operand.symOperand; + IC_RIGHT (ic)->key = IC_RIGHT (dic)->operand.symOperand->key; + + remiCodeFromeBBlock (ebp, dic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); + change++; + } + + return change; +} + + +/*-----------------------------------------------------------------*/ +/* packRegsForOneuse : - will reduce some registers for single Use */ +/*-----------------------------------------------------------------*/ +static iCode * +packRegsForOneuse (iCode * ic, operand * op, eBBlock * ebp) +{ + bitVect *uses; + iCode *dic, *sic; + + debugLog ("%s\n", __FUNCTION__); + /* if returning a literal then do nothing */ + if (!IS_SYMOP (op)) + return NULL; + + /* only upto 2 bytes since we cannot predict + the usage of b, & acc */ + if (getSize (operandType (op)) > (fReturnSizePic - 2) && + ic->op != RETURN && + ic->op != SEND) + return NULL; + + /* this routine will mark the a symbol as used in one + instruction use only && if the definition is local + (ie. within the basic block) && has only one definition && + that definition is either a return value from a + function or does not contain any variables in + far space */ + uses = bitVectCopy (OP_USES (op)); + bitVectUnSetBit (uses, ic->key); /* take away this iCode */ + if (!bitVectIsZero (uses)) /* has other uses */ + return NULL; + + /* if it has only one defintion */ + if (bitVectnBitsOn (OP_DEFS (op)) > 1) + return NULL; /* has more than one definition */ + + /* get that definition */ + if (!(dic = + hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_DEFS (op))))) + return NULL; + + /* found the definition now check if it is local */ + if (dic->seq < ebp->fSeq || + dic->seq > ebp->lSeq) + return NULL; /* non-local */ + + /* now check if it is the return from + a function call */ + if (dic->op == CALL || dic->op == PCALL) + { + if (ic->op != SEND && ic->op != RETURN && + !POINTER_SET(ic) && !POINTER_GET(ic)) + { + OP_SYMBOL (op)->ruonly = 1; + return dic; + } + dic = dic->next; + } + + + /* otherwise check that the definition does + not contain any symbols in far space */ + if (isOperandInFarSpace (IC_LEFT (dic)) || + isOperandInFarSpace (IC_RIGHT (dic)) || + IS_OP_RUONLY (IC_LEFT (ic)) || + IS_OP_RUONLY (IC_RIGHT (ic))) + { + return NULL; + } + + /* if pointer set then make sure the pointer + is one byte */ + if (POINTER_SET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_RESULT (dic)), FALSE))) + return NULL; + + if (POINTER_GET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_LEFT (dic)), FALSE))) + return NULL; + + sic = dic; + + /* also make sure the intervenening instructions + don't have any thing in far space */ + for (dic = dic->next; dic && dic != ic; dic = dic->next) + { + + /* if there is an intervening function call then no */ + if (dic->op == CALL || dic->op == PCALL) + return NULL; + /* if pointer set then make sure the pointer + is one byte */ + if (POINTER_SET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_RESULT (dic)), FALSE))) + return NULL; + + if (POINTER_GET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_LEFT (dic)), FALSE))) + return NULL; + + /* if address of & the result is remat then okay */ + if (dic->op == ADDRESS_OF && + OP_SYMBOL (IC_RESULT (dic))->remat) + continue; + + /* if operand has size of three or more & this + operation is a '*','/' or '%' then 'b' may + cause a problem */ + if ((dic->op == '%' || dic->op == '/' || dic->op == '*') && + getSize (operandType (op)) >= 3) + return NULL; + + /* if left or right or result is in far space */ + if (isOperandInFarSpace (IC_LEFT (dic)) || + isOperandInFarSpace (IC_RIGHT (dic)) || + isOperandInFarSpace (IC_RESULT (dic)) || + IS_OP_RUONLY (IC_LEFT (dic)) || + IS_OP_RUONLY (IC_RIGHT (dic)) || + IS_OP_RUONLY (IC_RESULT (dic))) + { + return NULL; + } + } + + OP_SYMBOL (op)->ruonly = 1; + return sic; + +} + +/*-----------------------------------------------------------------*/ +/* isBitwiseOptimizable - requirements of JEAN LOUIS VERN */ +/*-----------------------------------------------------------------*/ +static bool +isBitwiseOptimizable (iCode * ic) +{ + sym_link *ltype = getSpec (operandType (IC_LEFT (ic))); + sym_link *rtype = getSpec (operandType (IC_RIGHT (ic))); + + debugLog ("%s\n", __FUNCTION__); + /* bitwise operations are considered optimizable + under the following conditions (Jean-Louis VERN) + + x & lit + bit & bit + bit & x + bit ^ bit + bit ^ x + x ^ lit + x | lit + bit | bit + bit | x + */ + if (IS_LITERAL (rtype) || + (IS_BITVAR (ltype) && IN_BITSPACE (SPEC_OCLS (ltype)))) + return TRUE; + else + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* packRegsForAccUse - pack registers for acc use */ +/*-----------------------------------------------------------------*/ +static void +packRegsForAccUse (iCode * ic) +{ + //iCode *uic; + + debugLog ("%s\n", __FUNCTION__); + + /* result too large for WREG? */ + if (getSize (operandType (IC_RESULT (ic))) > 1) + return; + + /* We have to make sure that OP_SYMBOL(IC_RESULT(ic)) + * is never used as an operand to an instruction that + * cannot have WREG as an operand (e.g. BTFSx cannot + * operate on WREG... + * For now, store all results into proper registers. */ + return; + +#if 0 + /* if this is an aggregate, e.g. a one byte char array */ + if (IS_AGGREGATE(operandType(IC_RESULT(ic)))) { + return; + } + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + + /* if + or - then it has to be one byte result */ + if ((ic->op == '+' || ic->op == '-') + && getSize (operandType (IC_RESULT (ic))) > 1) + return; + + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + /* if shift operation make sure right side is not a literal */ + if (ic->op == RIGHT_OP && + (isOperandLiteral (IC_RIGHT (ic)) || + getSize (operandType (IC_RESULT (ic))) > 1)) + return; + + if (ic->op == LEFT_OP && + (isOperandLiteral (IC_RIGHT (ic)) || + getSize (operandType (IC_RESULT (ic))) > 1)) + return; + + if (IS_BITWISE_OP (ic) && + getSize (operandType (IC_RESULT (ic))) > 1) + return; + + + /* has only one definition */ + if (bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) > 1) + return; + + /* has only one use */ + if (bitVectnBitsOn (OP_USES (IC_RESULT (ic))) > 1) + return; + + /* and the usage immediately follows this iCode */ + if (!(uic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_USES (IC_RESULT (ic)))))) + return; + + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + if (ic->next != uic) + return; + + /* if it is a conditional branch then we definitely can */ + if (uic->op == IFX) + goto accuse; + + if (uic->op == JUMPTABLE) + return; + + /* if the usage is not is an assignment + or an arithmetic / bitwise / shift operation then not */ + if (POINTER_SET (uic) && + getSize (aggrToPtr (operandType (IC_RESULT (uic)), FALSE)) > 1) + return; + + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + if (uic->op != '=' && + !IS_ARITHMETIC_OP (uic) && + !IS_BITWISE_OP (uic) && + uic->op != LEFT_OP && + uic->op != RIGHT_OP) + return; + + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + /* if used in ^ operation then make sure right is not a + literl */ + if (uic->op == '^' && isOperandLiteral (IC_RIGHT (uic))) + return; + + /* if shift operation make sure right side is not a literal */ + if (uic->op == RIGHT_OP && + (isOperandLiteral (IC_RIGHT (uic)) || + getSize (operandType (IC_RESULT (uic))) > 1)) + return; + + if (uic->op == LEFT_OP && + (isOperandLiteral (IC_RIGHT (uic)) || + getSize (operandType (IC_RESULT (uic))) > 1)) + return; + + /* make sure that the result of this icode is not on the + stack, since acc is used to compute stack offset */ + if (IS_TRUE_SYMOP (IC_RESULT (uic)) && + OP_SYMBOL (IC_RESULT (uic))->onStack) + return; + + /* if either one of them in far space then we cannot */ + if ((IS_TRUE_SYMOP (IC_LEFT (uic)) && + isOperandInFarSpace (IC_LEFT (uic))) || + (IS_TRUE_SYMOP (IC_RIGHT (uic)) && + isOperandInFarSpace (IC_RIGHT (uic)))) + return; + + /* if the usage has only one operand then we can */ + if (IC_LEFT (uic) == NULL || + IC_RIGHT (uic) == NULL) + goto accuse; + + /* make sure this is on the left side if not + a '+' since '+' is commutative */ + if (ic->op != '+' && + IC_LEFT (uic)->key != IC_RESULT (ic)->key) + return; + + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + /* if one of them is a literal then we can */ + if ( ((IC_LEFT (uic) && IS_OP_LITERAL (IC_LEFT (uic))) || + (IC_RIGHT (uic) && IS_OP_LITERAL (IC_RIGHT (uic)))) && + (getSize (operandType (IC_RESULT (uic))) <= 1)) + { + OP_SYMBOL (IC_RESULT (ic))->accuse = 1; + return; + } + + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + /* if the other one is not on stack then we can */ + if (IC_LEFT (uic)->key == IC_RESULT (ic)->key && + (IS_ITEMP (IC_RIGHT (uic)) || + (IS_TRUE_SYMOP (IC_RIGHT (uic)) && + !OP_SYMBOL (IC_RIGHT (uic))->onStack))) + goto accuse; + + if (IC_RIGHT (uic)->key == IC_RESULT (ic)->key && + (IS_ITEMP (IC_LEFT (uic)) || + (IS_TRUE_SYMOP (IC_LEFT (uic)) && + !OP_SYMBOL (IC_LEFT (uic))->onStack))) + goto accuse; + + return; + +accuse: + debugLog ("%s - Yes we are using the accumulator\n", __FUNCTION__); + OP_SYMBOL (IC_RESULT (ic))->accuse = 1; +#endif +} + +/*-----------------------------------------------------------------*/ +/* packForPush - hueristics to reduce iCode for pushing */ +/*-----------------------------------------------------------------*/ +static void +packForReceive (iCode * ic, eBBlock * ebp) +{ + iCode *dic; + + debugLog ("%s\n", __FUNCTION__); + debugAopGet (" result:", IC_RESULT (ic)); + debugAopGet (" left:", IC_LEFT (ic)); + debugAopGet (" right:", IC_RIGHT (ic)); + + if (!ic->next) + return; + + for (dic = ic->next; dic; dic = dic->next) + { + + + + if (IC_LEFT (dic) && (IC_RESULT (ic)->key == IC_LEFT (dic)->key)) + debugLog (" used on left\n"); + if (IC_RIGHT (dic) && IC_RESULT (ic)->key == IC_RIGHT (dic)->key) + debugLog (" used on right\n"); + if (IC_RESULT (dic) && IC_RESULT (ic)->key == IC_RESULT (dic)->key) + debugLog (" used on result\n"); + + if ((IC_LEFT (dic) && (IC_RESULT (ic)->key == IC_LEFT (dic)->key)) || + (IC_RESULT (dic) && IC_RESULT (ic)->key == IC_RESULT (dic)->key)) + return; + + } + + debugLog (" hey we can remove this unnecessary assign\n"); +} +/*-----------------------------------------------------------------*/ +/* packForPush - hueristics to reduce iCode for pushing */ +/*-----------------------------------------------------------------*/ +static void +packForPush (iCode * ic, eBBlock * ebp) +{ + iCode *dic; + + debugLog ("%s\n", __FUNCTION__); + if (ic->op != IPUSH || !IS_ITEMP (IC_LEFT (ic))) + return; + + /* must have only definition & one usage */ + if (bitVectnBitsOn (OP_DEFS (IC_LEFT (ic))) != 1 || + bitVectnBitsOn (OP_USES (IC_LEFT (ic))) != 1) + return; + + /* find the definition */ + if (!(dic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_DEFS (IC_LEFT (ic)))))) + return; + + if (dic->op != '=' || POINTER_SET (dic)) + return; + + /* we now we know that it has one & only one def & use + and the that the definition is an assignment */ + IC_LEFT (ic) = IC_RIGHT (dic); + + remiCodeFromeBBlock (ebp, dic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); +} + +static void printSymType(char * str, sym_link *sl) +{ + if (debug) { + debugLog (" %s Symbol type: ",str); + printTypeChain( sl, debugF); + debugLog ("\n"); + } +} + +/*-----------------------------------------------------------------*/ +/* some debug code to print the symbol S_TYPE. Note that +* the function checkSClass in src/SDCCsymt.c dinks with +* the S_TYPE in ways the PIC port doesn't fully like...*/ +/*-----------------------------------------------------------------*/ +static void isData(sym_link *sl) +{ + FILE *of = stderr; + + // avoid garbage `data' and `sfr' output + if(!sl || !debugF) + return; + + if(debugF) + of = debugF; + + for ( ; sl; sl=sl->next) { + if(!IS_DECL(sl) ) { + switch (SPEC_SCLS(sl)) { + + case S_DATA: fprintf (of, "data "); break; + case S_XDATA: fprintf (of, "xdata "); break; + case S_SFR: fprintf (of, "sfr "); break; + case S_SBIT: fprintf (of, "sbit "); break; + case S_CODE: fprintf (of, "code "); break; + case S_IDATA: fprintf (of, "idata "); break; + case S_PDATA: fprintf (of, "pdata "); break; + case S_LITERAL: fprintf (of, "literal "); break; + case S_STACK: fprintf (of, "stack "); break; + case S_XSTACK: fprintf (of, "xstack "); break; + case S_BIT: fprintf (of, "bit "); break; + case S_EEPROM: fprintf (of, "eeprom "); break; + default: break; + } + + } + + } + +} + +/*-----------------------------------------------------------------*/ +/* packRegisters - does some transformations to reduce register */ +/* pressure */ +/*-----------------------------------------------------------------*/ +static void +packRegisters (eBBlock * ebp) +{ + iCode *ic; + int change = 0; + + debugLog ("%s\n", __FUNCTION__); + + while (1) { + + change = 0; + + /* look for assignments of the form */ + /* iTempNN = TRueSym (someoperation) SomeOperand */ + /* .... */ + /* TrueSym := iTempNN:1 */ + for (ic = ebp->sch; ic; ic = ic->next) + { + + /* find assignment of the form TrueSym := iTempNN:1 */ + if (ic->op == '=' && !POINTER_SET (ic)) + change += packRegsForAssign (ic, ebp); + /* debug stuff */ + if (ic->op == '=') + { + if (POINTER_SET (ic)) + debugLog ("pointer is set\n"); + debugAopGet (" result:", IC_RESULT (ic)); + debugAopGet (" left:", IC_LEFT (ic)); + debugAopGet (" right:", IC_RIGHT (ic)); + } + + } + + if (!change) + break; + } + + for (ic = ebp->sch; ic; ic = ic->next) { + + if(IS_SYMOP ( IC_LEFT(ic))) { + sym_link *etype = getSpec (operandType (IC_LEFT (ic))); + + debugAopGet (" left:", IC_LEFT (ic)); + if(IS_PTR_CONST(OP_SYMBOL(IC_LEFT(ic))->type)) + debugLog (" is a pointer\n"); + + if(IS_OP_VOLATILE(IC_LEFT(ic))) + debugLog (" is volatile\n"); + + isData(etype); + + printSymType(" ", OP_SYMBOL(IC_LEFT(ic))->type); + } + + if(IS_SYMOP ( IC_RIGHT(ic))) { + debugAopGet (" right:", IC_RIGHT (ic)); + printSymType(" ", OP_SYMBOL(IC_RIGHT(ic))->type); + } + + if(IS_SYMOP ( IC_RESULT(ic))) { + debugAopGet (" result:", IC_RESULT (ic)); + printSymType(" ", OP_SYMBOL(IC_RESULT(ic))->type); + } + + if (POINTER_SET (ic)) + debugLog (" %d - Pointer set\n", __LINE__); + + + /* Look for two subsequent iCodes with */ + /* iTemp := _c; */ + /* _c = iTemp & op; */ + /* and replace them by */ + /* iTemp := _c; */ + /* _c = _c & op; */ + if ((ic->op == BITWISEAND || ic->op == '|' || ic->op == '^') && + ic->prev && + ic->prev->op == '=' && + IS_ITEMP (IC_LEFT (ic)) && + IC_LEFT (ic) == IC_RESULT (ic->prev) && + isOperandEqual (IC_RESULT(ic), IC_RIGHT(ic->prev))) + { + iCode* ic_prev = ic->prev; + symbol* prev_result_sym = OP_SYMBOL (IC_RESULT (ic_prev)); + + ReplaceOpWithCheaperOp (&IC_LEFT (ic), IC_RESULT (ic)); + if (IC_RESULT (ic_prev) != IC_RIGHT (ic)) + { + bitVectUnSetBit (OP_USES (IC_RESULT (ic_prev)), ic->key); + if (/*IS_ITEMP (IC_RESULT (ic_prev)) && */ + prev_result_sym->liveTo == ic->seq) + { + prev_result_sym->liveTo = ic_prev->seq; + } + } + bitVectSetBit (OP_USES (IC_RESULT (ic)), ic->key); + + bitVectSetBit (ic->rlive, IC_RESULT (ic)->key); + + if (bitVectIsZero (OP_USES (IC_RESULT (ic_prev)))) + { + bitVectUnSetBit (ic->rlive, IC_RESULT (ic)->key); + bitVectUnSetBit (OP_DEFS (IC_RESULT (ic_prev)), ic_prev->key); + remiCodeFromeBBlock (ebp, ic_prev); + hTabDeleteItem (&iCodehTab, ic_prev->key, ic_prev, DELETE_ITEM, NULL); + } + } + + /* if this is an itemp & result of a address of a true sym + then mark this as rematerialisable */ + if (ic->op == ADDRESS_OF && + IS_ITEMP (IC_RESULT (ic)) && + IS_TRUE_SYMOP (IC_LEFT (ic)) && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1 && + !OP_SYMBOL (IC_LEFT (ic))->onStack) + { + + debugLog (" %d - %s. result is rematerializable\n", __LINE__,__FUNCTION__); + + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + + } + + /* if straight assignment then carry remat flag if + this is the only definition */ + if (ic->op == '=' && + !POINTER_SET (ic) && + IS_SYMOP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->remat && + bitVectnBitsOn (OP_SYMBOL (IC_RESULT (ic))->defs) <= 1) + { + debugLog (" %d - %s. straight rematerializable\n", __LINE__,__FUNCTION__); + + OP_SYMBOL (IC_RESULT (ic))->remat = + OP_SYMBOL (IC_RIGHT (ic))->remat; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = + OP_SYMBOL (IC_RIGHT (ic))->rematiCode; + } + + /* if this is a +/- operation with a rematerizable + then mark this as rematerializable as well */ + if ((ic->op == '+' || ic->op == '-') && + (IS_SYMOP (IC_LEFT (ic)) && + IS_ITEMP (IC_RESULT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->remat && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1 && + IS_OP_LITERAL (IC_RIGHT (ic)))) + { + debugLog (" %d - %s. rematerializable because op is +/-\n", __LINE__,__FUNCTION__); + //int i = + operandLitValue (IC_RIGHT (ic)); + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + } + + /* mark the pointer usages */ + if (POINTER_SET (ic) && IS_SYMOP(IC_RESULT(ic))) + { + OP_SYMBOL (IC_RESULT (ic))->uptr = 1; + debugLog (" marking as a pointer (set) =>"); + debugAopGet (" result:", IC_RESULT (ic)); + } + if (POINTER_GET (ic) && IS_SYMOP(IC_LEFT(ic))) + { + OP_SYMBOL (IC_LEFT (ic))->uptr = 1; + debugLog (" marking as a pointer (get) =>"); + debugAopGet (" left:", IC_LEFT (ic)); + } + + if (!SKIP_IC2 (ic)) + { + /* if we are using a symbol on the stack + then we should say pic14_ptrRegReq */ + if (ic->op == IFX && IS_SYMOP (IC_COND (ic))) + pic14_ptrRegReq += ((OP_SYMBOL (IC_COND (ic))->onStack || + OP_SYMBOL (IC_COND (ic))->iaccess) ? 1 : 0); + else if (ic->op == JUMPTABLE && IS_SYMOP (IC_JTCOND (ic))) + pic14_ptrRegReq += ((OP_SYMBOL (IC_JTCOND (ic))->onStack || + OP_SYMBOL (IC_JTCOND (ic))->iaccess) ? 1 : 0); + else + { + if (IS_SYMOP (IC_LEFT (ic))) + pic14_ptrRegReq += ((OP_SYMBOL (IC_LEFT (ic))->onStack || + OP_SYMBOL (IC_LEFT (ic))->iaccess) ? 1 : 0); + if (IS_SYMOP (IC_RIGHT (ic))) + pic14_ptrRegReq += ((OP_SYMBOL (IC_RIGHT (ic))->onStack || + OP_SYMBOL (IC_RIGHT (ic))->iaccess) ? 1 : 0); + if (IS_SYMOP (IC_RESULT (ic))) + pic14_ptrRegReq += ((OP_SYMBOL (IC_RESULT (ic))->onStack || + OP_SYMBOL (IC_RESULT (ic))->iaccess) ? 1 : 0); + } + + debugLog (" %d - pointer reg req = %d\n", __LINE__,pic14_ptrRegReq); + + } + + /* if the condition of an if instruction + is defined in the previous instruction then + mark the itemp as a conditional */ + if ((IS_CONDITIONAL (ic) || + ((ic->op == BITWISEAND || + ic->op == '|' || + ic->op == '^') && + isBitwiseOptimizable (ic))) && + ic->next && ic->next->op == IFX && + isOperandEqual (IC_RESULT (ic), IC_COND (ic->next)) && + OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq) + { + + debugLog (" %d\n", __LINE__); + OP_SYMBOL (IC_RESULT (ic))->regType = REG_CND; + continue; + } + + /* reduce for support function calls */ + if (ic->supportRtn || ic->op == '+' || ic->op == '-') + packRegsForSupport (ic, ebp); + + /* if a parameter is passed, it's in W, so we may not + need to place a copy in a register */ + if (ic->op == RECEIVE) + packForReceive (ic, ebp); + + /* some cases the redundant moves can + can be eliminated for return statements */ + if ((ic->op == RETURN || ic->op == SEND) && + !isOperandInFarSpace (IC_LEFT (ic)) && + !options.model) + packRegsForOneuse (ic, IC_LEFT (ic), ebp); + + /* if pointer set & left has a size more than + one and right is not in far space */ + if (POINTER_SET (ic) && + !isOperandInFarSpace (IC_RIGHT (ic)) && + IS_SYMOP(IC_RESULT(ic)) && + !OP_SYMBOL (IC_RESULT (ic))->remat && + !IS_OP_RUONLY (IC_RIGHT (ic)) && + getSize (aggrToPtr (operandType (IC_RESULT (ic)), FALSE)) > 1) + + packRegsForOneuse (ic, IC_RESULT (ic), ebp); + + /* if pointer get */ + if (POINTER_GET (ic) && + !isOperandInFarSpace (IC_RESULT (ic)) && + IS_SYMOP(IC_LEFT(ic)) && + !OP_SYMBOL (IC_LEFT (ic))->remat && + !IS_OP_RUONLY (IC_RESULT (ic)) && + getSize (aggrToPtr (operandType (IC_LEFT (ic)), FALSE)) > 1) + + packRegsForOneuse (ic, IC_LEFT (ic), ebp); + + + /* if this is cast for intergral promotion then + check if only use of the definition of the + operand being casted/ if yes then replace + the result of that arithmetic operation with + this result and get rid of the cast */ + if (ic->op == CAST) { + + sym_link *fromType = operandType (IC_RIGHT (ic)); + sym_link *toType = operandType (IC_LEFT (ic)); + + debugLog (" %d - casting\n", __LINE__); + + if (IS_INTEGRAL (fromType) && IS_INTEGRAL (toType) && + getSize (fromType) != getSize (toType)) { + + + iCode *dic = packRegsForOneuse (ic, IC_RIGHT (ic), ebp); + if (dic) { + + if (IS_ARITHMETIC_OP (dic)) { + + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + IC_RESULT (dic) = IC_RESULT (ic); + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS(IC_RESULT (dic))=bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + ic = ic->prev; + } else + + OP_SYMBOL (IC_RIGHT (ic))->ruonly = 0; + } + } else { + + /* if the type from and type to are the same + then if this is the only use then packit */ + if (compareType (operandType (IC_RIGHT (ic)), + operandType (IC_LEFT (ic))) == 1) { + + iCode *dic = packRegsForOneuse (ic, IC_RIGHT (ic), ebp); + if (dic) { + + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + IC_RESULT (dic) = IC_RESULT (ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + remiCodeFromeBBlock (ebp, ic); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS(IC_RESULT (dic))=bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + ic = ic->prev; + } + } + } + } + + /* pack for PUSH + iTempNN := (some variable in farspace) V1 + push iTempNN ; + ------------- + push V1 + */ + if (ic->op == IPUSH) + { + packForPush (ic, ebp); + } + + + /* pack registers for accumulator use, when the + result of an arithmetic or bit wise operation + has only one use, that use is immediately following + the defintion and the using iCode has only one + operand or has two operands but one is literal & + the result of that operation is not on stack then + we can leave the result of this operation in acc:b + combination */ + if ((IS_ARITHMETIC_OP (ic) + + || IS_BITWISE_OP (ic) + + || ic->op == LEFT_OP || ic->op == RIGHT_OP + + ) && + IS_ITEMP (IC_RESULT (ic)) && + getSize (operandType (IC_RESULT (ic))) <= 2) + + packRegsForAccUse (ic); + + } +} + +static void +dumpEbbsToDebug (eBBlock ** ebbs, int count) +{ + int i; + + if (!debug || !debugF) + return; + + for (i = 0; i < count; i++) + { + fprintf (debugF, "\n----------------------------------------------------------------\n"); + fprintf (debugF, "Basic Block %s : loop Depth = %d noPath = %d , lastinLoop = %d\n", + ebbs[i]->entryLabel->name, + ebbs[i]->depth, + ebbs[i]->noPath, + ebbs[i]->isLastInLoop); + fprintf (debugF, "depth 1st num %d : bbnum = %d 1st iCode = %d , last iCode = %d\n", + ebbs[i]->dfnum, + ebbs[i]->bbnum, + ebbs[i]->fSeq, + ebbs[i]->lSeq); + fprintf (debugF, "visited %d : hasFcall = %d\n", + ebbs[i]->visited, + ebbs[i]->hasFcall); + + fprintf (debugF, "\ndefines bitVector :"); + bitVectDebugOn (ebbs[i]->defSet, debugF); + fprintf (debugF, "\nlocal defines bitVector :"); + bitVectDebugOn (ebbs[i]->ldefs, debugF); + fprintf (debugF, "\npointers Set bitvector :"); + bitVectDebugOn (ebbs[i]->ptrsSet, debugF); + fprintf (debugF, "\nin pointers Set bitvector :"); + bitVectDebugOn (ebbs[i]->inPtrsSet, debugF); + fprintf (debugF, "\ninDefs Set bitvector :"); + bitVectDebugOn (ebbs[i]->inDefs, debugF); + fprintf (debugF, "\noutDefs Set bitvector :"); + bitVectDebugOn (ebbs[i]->outDefs, debugF); + fprintf (debugF, "\nusesDefs Set bitvector :"); + bitVectDebugOn (ebbs[i]->usesDefs, debugF); + fprintf (debugF, "\n----------------------------------------------------------------\n"); + printiCChain (ebbs[i]->sch, debugF); + } +} +/*-----------------------------------------------------------------*/ +/* assignRegisters - assigns registers to each live range as need */ +/*-----------------------------------------------------------------*/ +void +pic14_assignRegisters (ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->bbOrder; + int count = ebbi->count; + iCode *ic; + int i; + + debugLog ("<><><><><><><><><><><><><><><><><>\nstarting\t%s:%s\n", __FILE__, __FUNCTION__); + debugLog ("ebbs before optimizing:\n"); + dumpEbbsToDebug (ebbs, count); + + setToNull ((void *) &_G.funcrUsed); + pic14_ptrRegReq = _G.stackExtend = _G.dataExtend = 0; + + + /* change assignments this will remove some + live ranges reducing some register pressure */ + for (i = 0; i < count; i++) + packRegisters (ebbs[i]); + + { + regs *reg; + int hkey; + int i=0; + + debugLog("dir registers allocated so far:\n"); + reg = hTabFirstItem(dynDirectRegNames, &hkey); + + while(reg) { + debugLog(" -- #%d reg = %s key %d, rIdx = %d, size %d\n",i++,reg->name,hkey, reg->rIdx,reg->size); + reg = hTabNextItem(dynDirectRegNames, &hkey); + } + + } + + if (options.dump_pack) + dumpEbbsToFileExt (DUMP_PACK, ebbi); + + /* first determine for each live range the number of + registers & the type of registers required for each */ + regTypeNum (); + + /* and serially allocate registers */ + serialRegAssign (ebbs, count); + + /* if stack was extended then tell the user */ + if (_G.stackExtend) + { + /* werror(W_TOOMANY_SPILS,"stack", */ + /* _G.stackExtend,currFunc->name,""); */ + _G.stackExtend = 0; + } + + if (_G.dataExtend) + { + /* werror(W_TOOMANY_SPILS,"data space", */ + /* _G.dataExtend,currFunc->name,""); */ + _G.dataExtend = 0; + } + + /* after that create the register mask + for each of the instruction */ + createRegMask (ebbs, count); + + /* redo that offsets for stacked automatic variables */ + redoStackOffsets (); + + if (options.dump_rassgn) + dumpEbbsToFileExt (DUMP_RASSGN, ebbi); + + /* now get back the chain */ + ic = iCodeLabelOptimize (iCodeFromeBBlock (ebbs, count)); + + debugLog ("ebbs after optimizing:\n"); + dumpEbbsToDebug (ebbs, count); + + + genpic14Code (ic); + + /* free up any _G.stackSpil locations allocated */ + applyToSet (_G.stackSpil, deallocStackSpil); + _G.slocNum = 0; + setToNull ((void *) &_G.stackSpil); + setToNull ((void *) &_G.spiltSet); + + debugLog ("leaving\n<><><><><><><><><><><><><><><><><>\n"); + pic14_debugLogClose (); + return; +} diff --git a/src/pic/ralloc.h b/src/pic/ralloc.h new file mode 100644 index 0000000..7835c48 --- /dev/null +++ b/src/pic/ralloc.h @@ -0,0 +1,122 @@ +/*------------------------------------------------------------------------- + + SDCCralloc.h - header file register allocation + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + PIC port - T. Scott Dattalo scott@dattalo.com (2000) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCRALLOC_H +#define SDCCRALLOC_H 1 + +#include "common.h" + +#include "pcoderegs.h" + + +enum { + REG_PTR=1, + REG_GPR, + REG_CND, + REG_SFR, + REG_STK, + REG_TMP +}; + +/* definition for the registers */ +typedef struct regs +{ + short type; /* can have value + * REG_GPR, REG_PTR or REG_CND + * This like the "meta-type" */ + short pc_type; /* pcode type */ + short rIdx; /* index into register table */ + char *name; /* name */ + + unsigned isFree:1; /* is currently unassigned */ + unsigned wasUsed:1; /* becomes true if register has been used */ + unsigned isFixed:1; /* True if address can't change */ + unsigned isMapped:1; /* The Register's address has been mapped to physical RAM */ + unsigned isBitField:1; /* True if reg is type bit OR is holder for several bits */ + unsigned isEmitted:1; /* True if the reg has been written to a .asm file */ + unsigned isPublic:1; /* True if the reg is not static and can be modified in another module (ie a another c or asm file) */ + unsigned isExtern:1; /* True if the reg is in another module */ + unsigned address; /* reg's address if isFixed | isMapped is true */ + unsigned size; /* 0 for byte, 1 for int, 4 for long */ + unsigned alias; /* Alias mask if register appears in multiple banks */ + struct regs *reg_alias; /* If more than one register share the same address + * then they'll point to each other. (primarily for bits)*/ + pCodeRegLives reglives; /* live range mapping */ +} +regs; +extern regs regspic14[]; +extern int Gstack_base_addr; + +/* + As registers are created, they're added to a set (based on the + register type). Here are the sets of registers that are supported + in the PIC port: +*/ +extern set *dynAllocRegs; +extern set *dynStackRegs; +extern set *dynProcessorRegs; +extern set *dynDirectRegs; +extern set *dynDirectBitRegs; +extern set *dynInternalRegs; + + +void initStack(int base_address, int size, int shared); +regs *pic14_regWithIdx (int); +regs *dirregWithName (char *name ); +void pic14_assignRegisters (ebbIndex *ebbi); +regs *pic14_findFreeReg(short type); +regs *pic14_allocWithIdx (int idx); +regs *typeRegWithIdx (int idx, int type, int fixed); +regs *regFindWithName (const char *name); + +void pic14_debugLogClose(void); +void writeUsedRegs(FILE *of); + +regs *allocDirReg (operand *op ); +regs *allocInternalRegister(int rIdx, char * name, PIC_OPTYPE po_type, int alias); +regs *allocProcessorRegister(int rIdx, char * name, short po_type, int alias); +regs *allocRegByName (char *name, int size ); +regs *allocNewDirReg (sym_link *symlnk,const char *name); + +/* Define register address that are constant across PIC family */ +#define IDX_INDF 0 +#define IDX_TMR0 1 +#define IDX_PCL 2 +#define IDX_STATUS 3 +#define IDX_FSR 4 +#define IDX_PORTA 5 +#define IDX_PORTB 6 +#define IDX_PCLATH 0x0a +#define IDX_INTCON 0x0b + +#define IDX_KZ 0x7fff /* Known zero - actually just a general purpose reg. */ +#define IDX_WSAVE 0x7ffe +#define IDX_SSAVE 0x7ffd +#define IDX_PSAVE 0x7ffc + +#define pic14_nRegs 128 + +#endif diff --git a/src/pic16/Makefile.bcc b/src/pic16/Makefile.bcc new file mode 100644 index 0000000..b932180 --- /dev/null +++ b/src/pic16/Makefile.bcc @@ -0,0 +1,23 @@ +# Makefile for Borlad C++ + +PRJDIR = ../.. + +OBJ = gen.obj genarith.obj ralloc.obj main.obj glue.obj pcode.obj pcodepeep.obj graph.obj +LIB = port.lib + +!include $(PRJDIR)/Bcc.inc +CFLAGS = $(CFLAGS) -I.. -I$(PRJDIR) + +all: $(LIB) + +main.obj: main.c peeph.rul + +$(LIB): $(OBJ) + if exist $(LIB) del $(LIB) + tlib $@ @&&! ++$(**: = &^ ++) +! + +.def.rul: + gawk -f ../SDCCpeeph.awk $< > $@ diff --git a/src/pic16/Makefile.in b/src/pic16/Makefile.in new file mode 100644 index 0000000..dfb8a52 --- /dev/null +++ b/src/pic16/Makefile.in @@ -0,0 +1,7 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +# Make all in this directory +include $(srcdir)/../port.mk diff --git a/src/pic16/NOTES b/src/pic16/NOTES new file mode 100644 index 0000000..191ddc4 --- /dev/null +++ b/src/pic16/NOTES @@ -0,0 +1,210 @@ +NOTES file for SDCC pic16 port +$Id: NOTES 4121 2006-04-24 20:29:10Z bernhardheld $ + +Current pic16 port status is: Development + +Some things may change without notification between port updates. The latest +SVN snapshot is guarenteed to compile without problems, but does not +guarantee backwards compatibility. + +For any questions please ask the current port +developers. + +Current developer: +Raphael Neider + +Other people to contact: +Vangelis Rokas +Scott Dattalo + +====================================================================== +====================================================================== +2006-Mar-14 Vangelis Rokas +1. Added enviroment variable 'PIC16_PACKED_BITFIELDS' which agressively +packs bitfields in structures + +2005-Mar-23 Vangelis Rokas +1. I have added some optimizations that are controlled via enviroment +variables to allow checking. Later these will be either enabled globally +or controlled by command line options. The variables are: + a. OPTIMIZE_BITFIELD_POINTER_GET : optimizes bit field pointer reads + + b. NO_REG_OPT : there is no register optimization performed by pCode + optimizer + + + +2004-Oct-29 Vangelis Rokas +1. Function parameters are passed now all via stack. This might +lower performance, but some issues are solved this way. Later +we can enable passing through WREG,PRODL,PRODH,FSR0L by implementing +specific pragmas + + +2004-Sep-27 Vangelis Rokas +1. Function parameters have been extended to cover functions with +variable arguments. Now function parameters follow the rules below: + + a) void foo(long a, int b, char c) + void foo(long a, int b, char c) reentrant + +Stack layout: c, b+1, b, a+3, a+2, a+1 and WREG = a + + b) prototype: void foo(long a, int b, ...) + + example: foo(0xaaffeedd, 0xbbcc, 0x4455, 0x7788); + +Stack layout: 0x77, 0x88, 0x44, 0x55, 0xbb, 0xcc, 0xaa, 0xff, 0xee, 0xdd + +WREG is not used in functions with variable arguments so that the address +of the first parameter can be taken. + + + + +2004-Sep-24 Vangelis Rokas +1. Began implementation of generic pointers, current specs are: + 0x0 xxxxxxx -> code pointer + 0x8 xxxxxxx -> data pointer + 0x4 xxxxxxx -> eeprom pointer (currently unimplemented) + + +2004-Aug-30 Vangelis Rokas +1. A few months ago Hans Dorn had the idea to support general pointer +for accessing all code, eeprom data and data ram memory. These pointers +would have 3 bytes of size (24-bits), of which only the 21 lower bits +would be useful. The rest of them could be used to indicate the pointer +type. I.e. +0x4xxxxxxx would mean code pointer +0x8xxxxxxx would mean eeprom pointer +0xcxxxxxxx would mean data ram pointer + +The implementatio of such pointers needs a lot of work and general +reform of pointer access, data initializing functions and the writing +of support functions for decoding their type. + +The implementation of such pointers along with the implementation of +a more SDCC like stack access system will allow the writing of variable +arguments functions like printf etc... Also one set of functions will be +able to handle all data types without having to worry about where they +are placed. + + +2004-May-23 Vangelis Rokas + +1. The improvement of the port has been stalled a bit. But, struct/union +SFR headers are ready for the PIC18F[45][45][28] chips along with their +respective sources. + +2. The genCmp function should be rewritten from scratch. + +3. The internal helper functions for char/int/long/float arithmetic +now compile and will be placed in the appropriate directory under device/ + + + +2004-Feb-20 Vangelis Rokas +Major update with many bugfixes. + +1. The most of the pic16 regression tests (former pic regression tests) pass +successfully. Many thanks to Hans Dorn who did a great job with the +arithmetic, shift and pointer functions. + +2. Bit fields now work properly. + +3. Stack is permanently enabled. Command argument -pstack-enable is deleted +and no more recognized by the port. + + +2004-Feb-07 Vangelis Rokas + +1. Fixed a bug so that compiler allocated internal registered, will +be shared along multiple sources via '.registers' section placed +in absolute data memory address 0x0000. Registers 0x00 to 0x7f are +considered as internal since they can be used for fast access. + + + +2004-Jan-11 Vangelis Rokas + +1. Compiling +The current release of the port can produce object code which is not +completely bug free. To use the new features the user should enable them via +command line arguments. A sane set of command arguments that I use to test +programs is: + +- debug options + --debug enable sdcc debug information + --debug-xtra enable pic16 port debug information (most useful) + --debug-ralloc enable register allocator debug messages + --pcode-verbose enable verbose pcode generator messages + +- port options + --pno-banksel disable banksel directives for the assembler + --pomit-config-words does not emit configuration instruction in + the translation This is useful when copmiling + multiple sources, when you do not want multiple + config instructions in the end file + --pomit-ivt disables the dumping of the interrupt vector tables + in the translation for the same reasons as above + --penable-stack enables stack support. This option uses stack to + pass function arguments, and reuses registers between + functions by saving the registers used in the function + on the stack + +- compiler options + --all-callee-saves you may omit this options as the port + enables it by default, all functions are currently + compiled as reentrant and they are marked as + callee-saves + --no-peep peephole optimizer is better to be switched off, + because it behaves strangely in some cases + --fommit-frame-pointer this omits frame pointer in functions that + don't use registers (maybe changed later, not + important) + + +2. Functions +The current implementation puts every function in its own code section in +PIC's program memory. This may not be the standard, but I think its more +flexible. + +3. Pragmas +Since SDCC is goind for a release, its better to document pragmas available. + +3.1. code +The 'code' pragma emits a function's code at a specific address in program +memory. Currently it is only used for functions. +Syntax: +#pragma code [function_name] [address] + +3.2. stack +The 'stack' pragma initializes the stack/frame pointer at an address of the +data ram other than the default (which is the end of the available data ram) +Synatx: +#pragma stack [address] + +3.3. maxram +The 'maxram' pragma sets maximum data ram of the device. Currently is not +used at all, but it may be useful in the future when devices with external +memory will be supported. +Syntax: +#pragma maxram [max_address] + + +4. Internal compiler functions +Internal SDCC functions like, __fsmul, etc... are currently supported by the +port, but the libraries for the pic16 port are not yet ready. So one cannot +use long and float variables. + + +5. Special Function Registers (SFRs) +The processor SFRs are not anymore declared in any header file. The user can +define by himself all the needed SFR's. The code to that is: + +sfr at [sfr_address] [sfr_name]; + +Where sfr_address is the SFR address in the data ram, and sfr_name is the +name of the SFR. i.e.: + +sfr at 0xf80 PORTA; diff --git a/src/pic16/device.c b/src/pic16/device.c new file mode 100644 index 0000000..589b89d --- /dev/null +++ b/src/pic16/device.c @@ -0,0 +1,1128 @@ +/*------------------------------------------------------------------------- + + device.c - Accomodates subtle variations in PIC16 devices + + Written By - Scott Dattalo scott@dattalo.com + Ported to PIC16 By - Martin Dubuc m.dubuc@rogers.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +-------------------------------------------------------------------------*/ + +#include + +#include "common.h" // Include everything in the SDCC src directory +#include "newalloc.h" +#include "dbuf_string.h" + +#include "main.h" +#include "pcode.h" +#include "ralloc.h" +#include "device.h" + +void pic16_printIval (symbol * sym, sym_link * type, initList * ilist, char ptype, void *p); +extern void pic16_pCodeConstString (char *name, char *value, unsigned length); + +stats_t statistics = { 0, 0, 0, 0 }; + +#define DEVICE_FILE_NAME "pic16devices.txt" + +static PIC16_device default_device = { + { "p18f452", "18f452", "pic18f452", "f452" }, + 0x600, + 0x80, + { /* configuration words */ + 0x300001, 0x30000d, + { { 0x27, 0, 0xff } /* 1 */ , { 0x0f, 0, 0xff } /* 2 */ , + { 0x0f, 0, 0xff } /* 3 */ , { -1 , 0, 0xff } /* 4 */ , + { 0x01, 0, 0xff } /* 5 */ , { 0x85, 0, 0xff } /* 6 */ , + { -1 , 0, 0xff } /* 7 */ , { 0x0f, 0, 0xff } /* 8 */ , + { 0xc0, 0, 0xff } /* 9 */ , { 0x0f, 0, 0xff } /* a */ , + { 0xe0, 0, 0xff } /* b */ , { 0x0f, 0, 0xff } /* c */ , + { 0x40, 0, 0xff } /* d */ } + }, + { /* ID locations */ + 0x200000, 0x200007, + { { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, + { 0, 0 }, { 0, 0 }, { 0, 0 } } + }, + NULL +}; + +PIC16_device *pic16 = &default_device; +static PIC16_device *devices = NULL; + +extern set *includeDirsSet; +extern set *userIncDirsSet; + +extern char *iComments2; + +void +pic16_dump_equates (FILE *of, set *equs) +{ + regs *r; + + r = setFirstItem (equs); + if (!r) + return; + + fprintf (of, "%s", iComments2); + fprintf (of, ";\tEquates to used internal registers\n"); + fprintf (of, "%s", iComments2); + + for (; r; r = setNextItem (equs)) + { + fprintf (of, "%s\tequ\t0x%02x\n", r->name, r->address); + } // for +} + + +void +pic16_dump_access (FILE *of, set *section) +{ + regs *r; + + r = setFirstItem (section); + if (!r) + return; + + fprintf (of, "%s", iComments2); + fprintf (of, ";\tAccess bank symbols\n"); + fprintf (of, "%s", iComments2); + + fprintf (of, "\tudata_acs\n"); + for (; r; r = setNextItem (section)) + { + fprintf (of, "%s\tres\t%d\n", r->name, r->size); + statistics.adsize += r->size; + } // for +} + +int +regCompare (const void *a, const void *b) +{ + const regs *const *i = a; + const regs *const *j = b; + + /* Sort primarily by the address ... */ + if ((*i)->address > (*j)->address) + return (1); + + if ((*i)->address < (*j)->address) + return (-1); + + /* ... and secondarily by size. */ + /* Register size sorting may have strange results, use with care! */ + if ((*i)->size > (*j)->size) + return (1); + + if ((*i)->size < (*j)->size) + return (-1); + + /* Finally, if in same address and same size, sort by name. */ + return (strcmp ((*i)->name, (*j)->name)); +} + +int +symCompare (const void *a, const void *b) +{ + const symbol *const *i = a; + const symbol *const *j = b; + + /* Sort primarily by the address ... */ + if (SPEC_ADDR ((*i)->etype) > SPEC_ADDR ((*j)->etype)) + return (1); + + if (SPEC_ADDR ((*i)->etype) < SPEC_ADDR ((*j)->etype)) + return (-1); + + /* ... and secondarily by size. */ + /* Register size sorting may have strange results, use with care! */ + if (getSize ((*i)->etype) > getSize ((*j)->etype)) + return (1); + + if (getSize ((*i)->etype) < getSize ((*j)->etype)) + return (-1); + + /* Finally, if in same address and same size, sort by name. */ + return (strcmp ((*i)->rname, (*j)->rname)); +} + +void +pic16_dump_usection (FILE *of, set *section, int fix) +{ + static int abs_usection_no = 0; + static unsigned int usection_no = 0; + regs *r, *rprev; + unsigned int init_addr, i; + regs **rlist; + regs *r1; + + /* put all symbols in an array */ + if (!elementsInSet (section)) + return; + + rlist = Safe_calloc (elementsInSet (section), sizeof (regs *)); + r = rlist[0]; + i = 0; + for (rprev = setFirstItem (section); rprev; rprev = setNextItem (section)) + { + rlist[i] = rprev; + i++; + } // for + + if (!i) + { + if (rlist) + Safe_free (rlist); + + return; + } // if + + /* sort symbols according to their address */ + qsort (rlist, i, sizeof (regs *), regCompare); + + if (!fix) + { +#define EMIT_SINGLE_UDATA_SECTION 0 +#if EMIT_SINGLE_UDATA_SECTION + fprintf (of, "\n\n\tudata\n"); + for (r = setFirstItem (section); r; r = setNextItem (section)) + { + fprintf (of, "%s\tres\t%d\n", r->name, r->size); + statistics.udsize += r->size; + } // for +#else + for (r = setFirstItem (section); r; r = setNextItem (section)) + { + //fprintf (of, "\nudata_%s_%s\tudata\n", moduleName, r->name); + fprintf (of, "\nudata_%s_%u\tudata\n", moduleName, usection_no++); + fprintf (of, "%s\tres\t%d\n", r->name, r->size); + statistics.udsize += r->size; + } // for +#endif + } + else + { + unsigned int j = 0; + unsigned int prev_size = 0; + + rprev = NULL; + init_addr = (rlist[j]->address & 0x0FFF); // warning(s) emitted below + fprintf (of, "\n\nustat_%s_%02d\tudata\t0X%04X\n", moduleName, abs_usection_no++, (init_addr & 0x0FFF)); + + for (j = 0; j < i; j++) + { + r = rlist[j]; + r1 = NULL; + if (j < i - 1) + r1 = rlist[j + 1]; + + init_addr = (r->address & 0x0FFF); + if (init_addr != r->address) + { + fprintf (stderr, "%s: WARNING: Changed address of pinned variable %s from 0x%x to 0x%x\n", + moduleName, r->name, r->address, init_addr); + } // if + + if ((rprev && (init_addr != ((rprev->address & 0x0FFF) + prev_size)))) + fprintf (of, "\n\nustat_%s_%02d\tudata\t0X%04X\n", moduleName, abs_usection_no++, init_addr); + + /* XXX: Does not handle partial overlap correctly. */ + if (r1 && (init_addr == (r1->address & 0x0FFF))) + { + prev_size = 0; + fprintf (of, "%-15s\n", r->name); + } + else + { + prev_size = r->size; + fprintf (of, "%-15s\tres\t%d\n", r->name, prev_size); + statistics.udsize += prev_size; + } + + rprev = r; + } // for + } // if + + Safe_free (rlist); +} + +void +pic16_dump_gsection (FILE *of, set *sections) +{ + regs *r; + sectName *sname; + + for (sname = setFirstItem (sections); sname; sname = setNextItem (sections)) + { + if (!strcmp (sname->name, "access")) + continue; + + fprintf (of, "\n\n%s\tudata\n", sname->name); + + for (r = setFirstItem (sname->regsSet); r; r = setNextItem (sname->regsSet)) + { +#if 0 + fprintf (stderr, "%s:%d emitting variable %s for section %s (%p)\n", + __FILE__, __LINE__, r->name, sname->name, sname); +#endif + fprintf (of, "%s\tres\t%d\n", r->name, r->size); + statistics.udsize += r->size; + } // for + } // for +} + +void +pic16_dump_isection (FILE *of, set *section, int fix) +{ + static int abs_isection_no = 0; + symbol *s, *sprev; + unsigned int init_addr, i; + symbol **slist; + + /* put all symbols in an array */ + if (!elementsInSet (section)) + return; + + slist = Safe_calloc (elementsInSet (section), sizeof (symbol *)); + s = slist[0]; + i = 0; + for (sprev = setFirstItem (section); sprev; sprev = setNextItem (section)) + { + slist[i] = sprev; + i++; + } // for + + if (!i) + { + if (slist) + Safe_free (slist); + + return; + } // if + + /* sort symbols according to their address */ + qsort (slist, i, sizeof (symbol *), symCompare); + + pic16_initDB (); + + if (!fix) + { + fprintf (of, "\n\n\tidata\n"); + for (s = setFirstItem (section); s; s = setNextItem (section)) + { + if (s->ival) + { + fprintf (of, "%s", s->rname); + pic16_printIval (s, s->type, s->ival, 'f', (void *)of); + pic16_flushDB ('f', (void *)of); + } + else + { + if (IS_ARRAY (s->type) && IS_CHAR (s->type->next) + && SPEC_CVAL (s->etype).v_char) + { + //fprintf (stderr, "%s:%d printing code string from %s\n", __FILE__, __LINE__, s->rname); + pic16_pCodeConstString (s->rname , SPEC_CVAL (s->etype).v_char, getSize (s->type)); + } + else + { + assert (0); + } // if + } // if + } // for + } + else + { + unsigned int j = 0; + symbol *s1; + + sprev = NULL; + init_addr = SPEC_ADDR (slist[j]->etype); + fprintf (of, "\n\nistat_%s_%02d\tidata\t0X%04X\n", moduleName, abs_isection_no++, init_addr); + + for (j = 0; j < i; j++) + { + s = slist[j]; + s1 = NULL; + if (j < i - 1) + s1 = slist[j + 1]; + + init_addr = SPEC_ADDR (s->etype); + + if (sprev && (init_addr > (SPEC_ADDR (sprev->etype) + getSize (sprev->etype)))) + fprintf(of, "\nistat_%s_%02d\tidata\t0X%04X\n", moduleName, abs_isection_no++, init_addr); + + if (s->ival) + { + fprintf (of, "%s", s->rname); + pic16_printIval (s, s->type, s->ival, 'f', (void *)of); + pic16_flushDB ('f', (void *)of); + } + else + { + if (IS_ARRAY (s->type) && IS_CHAR (s->type->next) + && SPEC_CVAL (s->etype).v_char) + { + //fprintf (stderr, "%s:%d printing code string from %s\n", __FILE__, __LINE__, s->rname); + pic16_pCodeConstString (s->rname , SPEC_CVAL (s->etype).v_char, getSize (s->type)); + } + else + { + assert (0); + } // if + } // if + + sprev = s; + } // for + } // if + + Safe_free (slist); +} + +void +pic16_dump_int_registers (FILE *of, set *section) +{ + regs *r, *rprev; + int i; + regs **rlist; + + /* put all symbols in an array */ + if (!elementsInSet (section)) + return; + + rlist = Safe_calloc (elementsInSet (section), sizeof (regs *)); + r = rlist[0]; + i = 0; + for (rprev = setFirstItem (section); rprev; rprev = setNextItem (section)) + { + rlist[i] = rprev; + i++; + } // for + + if (!i) + { + if (rlist) + Safe_free (rlist); + + return; + } // if + + /* sort symbols according to their address */ + qsort (rlist, i, sizeof (regs *), regCompare); + + fprintf (of, "\n\n; Internal registers\n"); + + fprintf (of, "%s\tudata_ovr\t0x0000\n", ".registers"); + for (r = setFirstItem (section); r; r = setNextItem (section)) + { + fprintf (of, "%s\tres\t%d\n", r->name, r->size); + statistics.intsize += r->size; + } // for + + Safe_free (rlist); +} + +/** + * Find the device structure for the named device. + * Consider usind pic16_find_device() instead! + * + * @param name + * a name for the desired device + * @param head + * a pointer to the head of the list of devices + * @return + * a pointer to the structure for the desired + * device, or NULL + */ +static PIC16_device * +find_in_list(const char *name, PIC16_device *head) +{ + int i; + + while (head) { + for (i = 0; i < 4; i++) { + if (0 == strcmp(head->name[i], name)) { + return (head); + } // if + } // for + + head = head->next; + } // while + + return (NULL); +} + +/** + * Print a list of supported devices. + * If --verbose was given, also emit key characteristics (memory size, + * access bank split point, address range of SFRs and config words). + * + * @param head + * a pointer to the head of the list of devices + */ +static void +pic16_list_devices(PIC16_device *head) +{ + int i = 0; + + if (options.verbose) { + printf("device RAM split config words\n"); + } // if + while (head) { + printf("%-10s ", head->name[0]); + if (options.verbose) { + printf("%5d 0x%02x 0x%06x..0x%06x\n", + head->RAMsize, + head->acsSplitOfs, + head->cwInfo.confAddrStart, + head->cwInfo.confAddrEnd); + } else { + i++; + if (0 == (i % 6)) { + printf("\n"); + } // if + } // if + head = head->next; + } // while + printf("\n"); +} + +/** + * Read a single line from the given file. + * + * @param file + * a pointer to the open file to read + * @return + * a pointer to a malloc'ed copy of the (next) line, or NULL + */ +static char * +get_line (FILE *file) +{ + static struct dbuf_s dbuf; + static int initialized = 0; + + if (!initialized) + { + dbuf_init (&dbuf, 129); + initialized = 1; + } + else + dbuf_set_length (&dbuf, 0); + + + if (dbuf_getline (&dbuf, file) != 0) + { + dbuf_chomp (&dbuf); + /* (char *) type cast is an ugly hack since pic16_find_device() modifies the buffer */ + return (char *)dbuf_get_buf (&dbuf); + } + else + { + dbuf_destroy(&dbuf); + initialized = 0; + return NULL; + } +} + +/** + * Truncate the given string in place (!) at the first '#' character (if any). + * + * @param line + * a pointer to the string to truncate + * @return + * a pointer to the truncated string (i.e., line) + */ +static char * +strip_comment (char *line) +{ + char *l = line; + char c; + + if (!line) + { + return (line); + } // if + + while (0 != (c = *l)) + { + if ('#' == c) + { + *l = 0; + return (line); + } // if + l++; + } // while + + return (line); +} + +/** + * Report errors in the device specification. + * + * @param msg + * a pointer to the detailed message + */ +#define SYNTAX(msg) do { \ + fprintf(stderr, "%s:%d: Syntax error: %s\n", \ + DEVICE_FILE_NAME, lineno, msg); \ +} while (0) + +/** + * Locate and read in the device specification (if required) and + * return the device structure for the named device. + * + * @param name + * a pointer to the name of the desired device + * @return + * a pointer to the device structure, or NULL + */ +static PIC16_device * +pic16_find_device(const char *name) +{ + const char *path; + char buffer[PATH_MAX]; + char *line, *key; + const char *sep = " \t\n\r"; + FILE *f = NULL; + PIC16_device *d = NULL, *template; + PIC16_device *head = NULL, *tail = NULL; + set *_sets[] = { userIncDirsSet, includeDirsSet }; + set **sets = &_sets[0]; + int lineno = 0; + int res, i; + int val[4]; + + if (!devices) + { + //printf("%s: searching %s\n", __func__, DEVICE_FILE_NAME); + + // locate the specification file in the include search paths + for (i = 0; (NULL == f) && (i < 2); i++) + { + for (path = setFirstItem(sets[i]); + (NULL == f) && path; + path = setNextItem(sets[i])) + { + SNPRINTF(&buffer[0], PATH_MAX, "%s%s%s", + path, DIR_SEPARATOR_STRING, DEVICE_FILE_NAME); + //printf("%s: checking %s\n", __func__, &buffer[0]); + f = fopen(&buffer[0], "r"); + } // for + } // for + } // if + + if (devices) + { + // list already set up, nothing to do + } + else if (NULL == f) + { + fprintf(stderr, "ERROR: device list %s not found, specify its path via -I\n", + DEVICE_FILE_NAME); + d = &default_device; + } + else + { + // parse the specification file and construct a linked list of + // supported devices + d = NULL; + while (NULL != (line = get_line(f))) + { + strip_comment(line); + //printf("%s: read %s\n", __func__, line); + lineno++; + key = strtok(line, sep); + if (!key) + { + // empty line---ignore + } + else if (0 == strcmp(key, "name")) + { + // name %s + if (d) + { + if (tail) + { + tail->next = d; + } + else + { + head = d; + } // if + tail = d; + d = NULL; + } // if + + res = sscanf(&line[1 + strlen(key)], " %16s", &buffer[3]); + if ((1 < res) || (3 > strlen(&buffer[3]))) + { + SYNTAX(" (e.g., 18f452) expected."); + } + else + { + d = Safe_calloc(1, sizeof(PIC16_device)); + + // { "p18f452", "18f452", "pic18f452", "f452" } + buffer[0] = 'p'; + buffer[1] = 'i'; + buffer[2] = 'c'; + d->name[3] = Safe_strdup(&buffer[5]); + d->name[2] = Safe_strdup(&buffer[0]); + d->name[1] = Safe_strdup(&buffer[3]); + buffer[2] = 'p'; + d->name[0] = Safe_strdup(&buffer[2]); + } // if + } + else if (0 == strcmp(key, "using")) + { + // using %s + res = sscanf(&line[1 + strlen(key)], " %16s", &buffer[0]); + if ((1 < res) || (3 > strlen(&buffer[3]))) + { + SYNTAX(" (e.g., 18f452) expected."); + } + else + { + template = find_in_list(&buffer[0], head); + if (!template) + { + SYNTAX(" (e.g., 18f452) expected."); + } + else + { + memcpy(&d->RAMsize, &template->RAMsize, + ((char *)&d->next) - ((char *)&d->RAMsize)); + } // if + } // if + } + else if (0 == strcmp(key, "ramsize")) + { + // ramsize %i + res = sscanf(&line[1 + strlen(key)], " %i", &val[0]); + if (res < 1) + { + SYNTAX(" (e.g., 256) expected."); + } + else + { + d->RAMsize = val[0]; + } // if + } + else if (0 == strcmp(key, "split")) + { + // split %i + res = sscanf(&line[1 + strlen(key)], " %i", &val[0]); + if (res < 1) + { + SYNTAX(" (e.g., 0x80) expected."); + } + else + { + d->acsSplitOfs = val[0]; + } // if + } + else if (0 == strcmp(key, "configrange")) + { + // configrange %i %i + res = sscanf(&line[1 + strlen(key)], " %i %i", + &val[0], &val[1]); + if (res < 2) + { + SYNTAX(" (e.g., 0xf60 0xfff) expected."); + } + else + { + d->cwInfo.confAddrStart = val[0]; + d->cwInfo.confAddrEnd = val[1]; + } // if + } + else if (0 == strcmp(key, "configword")) + { + // configword %
i %i %i [%i] + res = sscanf(&line[1 + strlen(key)], " %i %i %i %i", + &val[0], &val[1], &val[2], &val[3]); + if (res < 3) + { + SYNTAX("
[] (e.g., 0x200001 0x0f 0x07) expected."); + } + else + { + val[0] -= d->cwInfo.confAddrStart; + if ((val[0] < 0) + || (val[0] > (d->cwInfo.confAddrEnd - d->cwInfo.confAddrStart)) + || (val[0] >= CONFIGURATION_WORDS)) + { + SYNTAX("address out of bounds."); + } + else + { + d->cwInfo.crInfo[val[0]].mask = val[1]; + d->cwInfo.crInfo[val[0]].value = val[2]; + d->cwInfo.crInfo[val[0]].andmask = 0; + if (res >= 4) + { + // apply extra mask (e.g., to disable XINST) + d->cwInfo.crInfo[val[0]].andmask = val[3]; + } // if + } // if + } // if + } + else if (0 == strcmp(key, "idlocrange")) + { + // idlocrange %i %i + res = sscanf(&line[1 + strlen(key)], " %i %i", + &val[0], &val[1]); + if (res < 2) + { + SYNTAX(" (e.g., 0xf60 0xfff) expected."); + } + else + { + d->idInfo.idAddrStart = val[0]; + d->idInfo.idAddrEnd = val[1]; + } // if + } + else if (0 == strcmp(key, "idword")) + { + // idword %
i %i + res = sscanf(&line[1 + strlen(key)], " %i %i", + &val[0], &val[1]); + if (res < 2) + { + SYNTAX("
(e.g., 0x3fffff 0x00) expected."); + } + else + { + val[0] -= d->idInfo.idAddrStart; + if ((val[0] < 0) + || (val[0] > (d->idInfo.idAddrEnd - d->idInfo.idAddrStart)) + || (val[0] >= IDLOCATION_BYTES)) + { + SYNTAX("address out of bounds."); + } + else + { + d->idInfo.irInfo[val[0]].value = val[1]; + } // if + } // if + } + else + { + printf("%s: Invalid keyword in %s ignored: %s\n", + __func__, DEVICE_FILE_NAME, key); + } // if + } // while + + if (d) + { + if (tail) + { + tail->next = d; + } + else + { + head = d; + } // if + tail = d; + d = NULL; + } // if + + devices = head; + + fclose(f); + } // if + + d = find_in_list(name, devices); + if (!d) + { + d = &default_device; + } // if + + return (d); +} + +/*-----------------------------------------------------------------* + * + *-----------------------------------------------------------------*/ +void pic16_init_pic(const char *pic_type) +{ + pic16 = pic16_find_device(pic_type); + + if (&default_device == pic16) { + if (pic_type) { + fprintf(stderr, "'%s' was not found.\n", pic_type); + } else { + fprintf(stderr, "No processor has been specified (use -pPROCESSOR_NAME)\n"); + } // if + + if (devices) { + fprintf(stderr,"Valid devices are (use --verbose for more details):\n"); + pic16_list_devices(devices); + } // if + exit(EXIT_FAILURE); + } // if +} + +/*-----------------------------------------------------------------* + * char *pic16_processor_base_name(void) - Include file is derived from this. + *-----------------------------------------------------------------*/ +char *pic16_processor_base_name(void) +{ + + if(!pic16) + return NULL; + + return pic16->name[0]; +} + +#define DEBUG_CHECK 0 + +/* + * return 1 if register wasn't found and added, 0 otherwise + */ +int checkAddReg(set **set, regs *reg) +{ + regs *tmp; + + + if(!reg)return 0; +#if DEBUG_CHECK + fprintf(stderr, "%s: about to insert REGister: %s ... ", __FUNCTION__, reg->name); +#endif + + for(tmp = setFirstItem(*set); tmp; tmp = setNextItem(*set)) { + if(!strcmp(tmp->name, reg->name))break; + } + + if(!tmp) { + addSet(set, reg); +#if DEBUG_CHECK + fprintf(stderr, "added\n"); +#endif + return 1; + } + +#if DEBUG_CHECK + fprintf(stderr, "already added\n"); +#endif + return 0; +} + +int checkAddSym(set **set, symbol *sym) +{ + symbol *tmp; + + if(!sym)return 0; +#if DEBUG_CHECK + fprintf(stderr, "%s: about to add SYMbol: %s ... ", __FUNCTION__, sym->name); +#endif + + for(tmp = setFirstItem( *set ); tmp; tmp = setNextItem(*set)) { + if(!strcmp(tmp->name, sym->name))break; + } + + if(!tmp) { + addSet(set, sym); +#if DEBUG_CHECK + fprintf(stderr, "added\n"); +#endif + return 1; + } + +#if DEBUG_CHECK + fprintf(stderr, "already added\n"); +#endif + + return 0; +} + +int checkSym(set *set, symbol *sym) +{ + symbol *tmp; + + if(!sym)return 0; + +#if DEUG_CHECK + fprintf(stderr, "%s: about to search for SYMbol: %s ... ", __FUNCTION__, sym->name); +#endif + + for(tmp = setFirstItem( set ); tmp; tmp = setNextItem( set )) { + if(!strcmp(tmp->name, sym->name))break; + } + + if(!tmp) { +#if DEBUG_CHECK + fprintf(stderr, "not found\n"); +#endif + return 0; + } + +#if DEBUG_CHECK + fprintf(stderr, "found\n"); +#endif + + return 1; +} + +/*-----------------------------------------------------------------* + * void pic16_groupRegistersInSection - add each register to its * + * corresponding section * + *-----------------------------------------------------------------*/ +void pic16_groupRegistersInSection(set *regset) +{ + regs *reg; + sectSym *ssym; + int docontinue=0; + + for(reg=setFirstItem(regset); reg; reg = setNextItem(regset)) { + +#if 0 + fprintf(stderr, "%s:%d group registers in section, reg: %s (used: %d, %p)\n", + __FILE__, __LINE__, reg->name, reg->wasUsed, reg); +#endif + if((reg->wasUsed + && !(reg->regop && SPEC_EXTR(OP_SYM_ETYPE(reg->regop)))) + ) { + + /* avoid grouping registers that have an initial value, + * they will be added later in idataSymSet */ + if(reg->regop && (OP_SYMBOL(reg->regop)->ival && !OP_SYMBOL(reg->regop)->level)) + continue; + +#if 0 + fprintf(stderr, "%s:%d register %s alias:%d fix:%d ival=%i level=%i code=%i\n", + __FILE__, __LINE__, reg->name, reg->alias, reg->isFixed, + (reg->regop?(OP_SYMBOL(reg->regop)->ival?1:0):-1), + (reg->regop?(OP_SYMBOL(reg->regop)->level):-1), + (reg->regop?(IS_CODE(OP_SYM_ETYPE(reg->regop))):-1) ); +#endif + + docontinue=0; + for(ssym=setFirstItem(sectSyms);ssym;ssym=setNextItem(sectSyms)) { + if(!strcmp(ssym->name, reg->name)) { +// fprintf(stderr, "%s:%d section found %s (%p) with var %s\n", +// __FILE__, __LINE__, ssym->section->name, ssym->section, ssym->name); + if(strcmp(ssym->section->name, "access")) { + addSet(&ssym->section->regsSet, reg); + docontinue=1; + break; + } else { + docontinue=0; + reg->accessBank = 1; + break; + } + } + } + + if(docontinue)continue; + +// fprintf(stderr, "%s:%d reg: %s\n", __FILE__, __LINE__, reg->name); + + if(reg->alias == 0x80) { + checkAddReg(&pic16_equ_data, reg); + } else + if(reg->isFixed) { + checkAddReg(&pic16_fix_udata, reg); + } else + if(!reg->isFixed) { + if(reg->pc_type == PO_GPR_TEMP) + checkAddReg(&pic16_int_regs, reg); + else { + if(reg->accessBank) { + if(reg->alias != 0x40) + checkAddReg(&pic16_acs_udata, reg); + } else + checkAddReg(&pic16_rel_udata, reg); + } + } + } + } +} + + + + + +/*-----------------------------------------------------------------* + * void pic16_assignConfigWordValue(int address, int value) + * + * All high performance RISC CPU PICs have seven config word starting + * at address 0x300000. + * This routine will assign a value to that address. + * + *-----------------------------------------------------------------*/ +void +pic16_assignConfigWordValue(int address, unsigned int value) +{ + int i; + + for (i = 0; i < pic16->cwInfo.confAddrEnd - pic16->cwInfo.confAddrStart + 1; i++) + { + if ((address == pic16->cwInfo.confAddrStart + i) + && (pic16->cwInfo.crInfo[i].mask != -1) + && (pic16->cwInfo.crInfo[i].mask != 0)) + { + +#if 0 + fprintf(stderr, "setting location 0x%x to value 0x%x, mask: 0x%x, test: 0x%x\n", + pic16->cwInfo.confAddrStart + i, + (~value) & 0xff, + pic16->cwInfo.crInfo[i].mask, + (pic16->cwInfo.crInfo[i].mask) & (~value)); +#endif + +#if 0 + if ((((pic16->cwInfo.crInfo[i].mask) & (~value)) & 0xff) != ((~value) & 0xff)) + { + fprintf(stderr, "%s:%d a wrong value has been given for configuration register 0x%x\n", + __FILE__, __LINE__, address); + return; + } // if +#endif + + pic16->cwInfo.crInfo[i].value = (value & 0xff); + if (pic16->cwInfo.crInfo[i].andmask + && ((value & 0xff) != (value & 0xff & pic16->cwInfo.crInfo[i].andmask))) + { + // apply andmask if effective + printf ("INFO: changing configuration word at 0x%x from 0x%x to 0x%x due to %s\n", + address, + (value & 0xff), + (value & 0xff & pic16->cwInfo.crInfo[i].andmask), + DEVICE_FILE_NAME); + pic16->cwInfo.crInfo[i].value &= pic16->cwInfo.crInfo[i].andmask; + } // if + pic16->cwInfo.crInfo[i].emit = 1; + return; + } // if + } // for +} + +void +pic16_assignIdByteValue(int address, char value) +{ + int i; + + for (i = 0; i < pic16->idInfo.idAddrEnd - pic16->idInfo.idAddrStart + 1; i++) + { + if (address == pic16->idInfo.idAddrStart + i) + { + pic16->idInfo.irInfo[i].value = value; + pic16->idInfo.irInfo[i].emit = 1; + } // if + } // for +} + diff --git a/src/pic16/device.h b/src/pic16/device.h new file mode 100644 index 0000000..40361ea --- /dev/null +++ b/src/pic16/device.h @@ -0,0 +1,138 @@ +/*------------------------------------------------------------------------- + + device.c - Accomodates subtle variations in PIC16 devices + + Written By - Scott Dattalo scott@dattalo.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +-------------------------------------------------------------------------*/ + +/* + PIC device abstraction + + There are dozens of variations of PIC microcontrollers. This include + file attempts to abstract those differences so that SDCC can easily + deal with them. +*/ + +#ifndef __DEVICE_H__ +#define __DEVICE_H__ + +#define CONFIGURATION_WORDS 20 +#define IDLOCATION_BYTES 20 + +typedef struct { + unsigned int mask; + int emit; + unsigned int value; + unsigned int andmask; +} configRegInfo_t; + +typedef struct { + int confAddrStart; /* starting address */ + int confAddrEnd; /* ending address */ + configRegInfo_t crInfo[ CONFIGURATION_WORDS ]; +} configWordsInfo_t; + +typedef struct { + unsigned char emit; + unsigned char value; +} idRegInfo_t; + +typedef struct { + int idAddrStart; /* starting ID address */ + int idAddrEnd; /* ending ID address */ + idRegInfo_t irInfo[ IDLOCATION_BYTES ]; +} idBytesInfo_t; + + +#define PROCESSOR_NAMES 4 +/* Processor unique attributes */ +typedef struct PIC16_device { + char *name[PROCESSOR_NAMES]; /* aliases for the processor name */ + /* RAMsize *must* be the first item to copy for 'using' */ + int RAMsize; /* size of Data RAM - VR 031120 */ + int acsSplitOfs; /* access bank split offset */ + configWordsInfo_t cwInfo; /* configuration words info */ + idBytesInfo_t idInfo; /* ID Locations info */ + /* next *must* be the first field NOT being copied via 'using' */ + struct PIC16_device *next; /* linked list */ +} PIC16_device; + +extern PIC16_device *pic16; + +/* Given a pointer to a register, this macro returns the bank that it is in */ +#define REG_ADDR(r) ((r)->isBitField ? (((r)->address)>>3) : (r)->address) + +#define OF_LR_SUPPORT 0x00000001 +#define OF_NO_OPTIMIZE_GOTO 0x00000002 +#define OF_OPTIMIZE_CMP 0x00000004 +#define OF_OPTIMIZE_DF 0x00000008 + +typedef struct { + int no_banksel; + int opt_banksel; + int omit_configw; + int omit_ivt; + int leave_reset; + int stack_model; + int ivt_loc; + int nodefaultlibs; + int dumpcalltree; + char *crt_name; + int no_crt; + int ip_stack; + unsigned long opt_flags; + int gstack; + unsigned int debgen; + int xinst; +} pic16_options_t; + +extern pic16_options_t pic16_options; + +#define STACK_MODEL_SMALL (pic16_options.stack_model == 0) +#define STACK_MODEL_LARGE (pic16_options.stack_model == 1) + +extern set *fix_idataSymSet; +extern set *rel_idataSymSet; + +#if 0 +/* This is an experimental code for #pragma inline + and is temporarily disabled for 2.5.0 release */ +extern set *asmInlineMap; +#endif /* 0 */ + +typedef struct { + unsigned long isize; + unsigned long adsize; + unsigned long udsize; + unsigned long idsize; + unsigned long intsize; +} stats_t; + +extern stats_t statistics; + +/****************************************/ +void pic16_assignConfigWordValue(int address, unsigned int value); +void pic16_assignIdByteValue(int address, char value); +int pic16_isREGinBank(regs *reg, int bank); +int pic16_REGallBanks(regs *reg); + +int checkAddReg(set **set, regs *reg); +int checkAddSym(set **set, symbol *reg); +int checkSym(set *set, symbol *reg); + +#endif /* __DEVICE_H__ */ + diff --git a/src/pic16/gen.c b/src/pic16/gen.c new file mode 100644 index 0000000..fa1d7a0 --- /dev/null +++ b/src/pic16/gen.c @@ -0,0 +1,10349 @@ + /*------------------------------------------------------------------------- + gen.c - source file for code generation for pic16 + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + and - Jean-Louis VERN.jlvern@writeme.com (1999) + Bug Fixes - Wojciech Stryjewski wstryj1@tiger.lsu.edu (1999 v2.1.9a) + PIC port - Scott Dattalo scott@dattalo.com (2000) + PIC16 port - Martin Dubuc m.dubuc@rogers.com (2002) + - Vangelis Rokas (2003-2006) + Bug Fixes - Raphael Neider (2004,2005) + Bug Fixes - Borut Razem (2007) + Bug Fixes - Mauro Giachero (2008) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + Notes: + 000123 mlh Moved aopLiteral to SDCCglue.c to help the split + Made everything static +-------------------------------------------------------------------------*/ + +#include +#include +#include +#include +#include "SDCCglobl.h" +#include "newalloc.h" + +#include "common.h" +#include "SDCCpeeph.h" +#include "ralloc.h" +#include "pcode.h" +#include "gen.h" +#include "genutils.h" +#include "device.h" +#include "main.h" +#include "glue.h" + +/* The PIC port(s) do not need to distinguish between POINTER and FPOINTER. */ +#define PIC_IS_DATA_PTR(x) (IS_DATA_PTR(x) || IS_FARPTR(x)) +#define PIC_IS_FARPTR(x) (IS_DATA_PTR(x) || IS_FARPTR(x)) +#define PIC_IS_TAGGED(x) (IS_GENPTR(x) || IS_CODEPTR(x)) +#define IS_DIRECT(op) ((AOP_TYPE(op) == AOP_PCODE) && (AOP(op)->aopu.pcop->type == PO_DIR)) + +/* Wrapper to execute `code' at most once. */ +#define PERFORM_ONCE(id,code) do { static char id = 0; if (!id) { id = 1; code } } while (0) + +void pic16_genMult8X8_n (operand *, operand *,operand *); +extern void pic16_printpBlock(FILE *of, pBlock *pb); +static asmop *newAsmop (short type); +static pCodeOp *pic16_popRegFromString(char *str, int size, int offset, operand *op); +extern pCode *pic16_newpCodeAsmDir(char *asdir, char *argfmt, ...); +static void mov2fp(pCodeOp *dst, asmop *src, int offset); +static pCodeOp *pic16_popRegFromIdx(int rIdx); + +int pic16_labelOffset=0; +extern int pic16_debug_verbose; + +extern set *externs; + +/* max_key keeps track of the largest label number used in + a function. This is then used to adjust the label offset + for the next function. +*/ +static int max_key=0; +static int GpsuedoStkPtr=0; + +pCodeOp *pic16_popGetImmd(char *name, unsigned int offset, int index); + +const char *pic16_AopType(short type); +static iCode *ifxForOp ( operand *op, iCode *ic ); + +void pic16_pushpCodeOp(pCodeOp *pcop); +void pic16_poppCodeOp(pCodeOp *pcop); + + +#define BYTEofLONG(l,b) ( (l>> (b<<3)) & 0xff) + +/* set the following macro to 1 to enable passing the + * first byte of functions parameters via WREG */ +#define USE_WREG_IN_FUNC_PARAMS 0 + + +/* this is the down and dirty file with all kinds of + kludgy & hacky stuff. This is what it is all about + CODE GENERATION for a specific MCU . some of the + routines may be reusable, will have to see */ +static char *zero = "#0x00"; +static char *one = "#0x01"; + + +/* + * Function return value policy (MSB-->LSB): + * 8 bits -> WREG + * 16 bits -> PRODL:WREG + * 24 bits -> PRODH:PRODL:WREG + * 32 bits -> FSR0L:PRODH:PRODL:WREG + * >32 bits -> on stack, and FSR0 points to the beginning + */ +char *fReturnpic16[] = { "WREG", "PRODL", "PRODH", "FSR0L" }; +int fReturnIdx[] = { IDX_WREG, IDX_PRODL, IDX_PRODH, IDX_FSR0L }; +unsigned pic16_fReturnSizePic = 4; /* shared with ralloc.c */ +static char **fReturn = fReturnpic16; + +static char *accUse[] = {"WREG"}; + +static struct { + short accInUse; + short inLine; + short debugLine; + short nRegsSaved; + set *sendSet; + set *stackRegSet; + int usefastretfie; + bitVect *fregsUsed; /* registers used in function */ + bitVect *sregsAlloc; + set *sregsAllocSet; /* registers used to store stack variables */ + int stack_lat; /* stack offset latency */ + int resDirect; + int useWreg; /* flag when WREG is used to pass function parameter */ +} _G; + +extern struct dbuf_s *codeOutBuf; + +static lineNode *lineHead = NULL; +static lineNode *lineCurr = NULL; + +static unsigned char SLMask[] = {0xFF ,0xFE, 0xFC, 0xF8, 0xF0, +0xE0, 0xC0, 0x80, 0x00}; +static unsigned char SRMask[] = {0xFF, 0x7F, 0x3F, 0x1F, 0x0F, +0x07, 0x03, 0x01, 0x00}; + +static pBlock *pb; + +/*-----------------------------------------------------------------*/ +/* my_powof2(n) - If `n' is an integaer power of 2, then the */ +/* exponent of 2 is returned, otherwise -1 is */ +/* returned. */ +/* note that this is similar to the function `powof2' in SDCCsymt */ +/* if(n == 2^y) */ +/* return y; */ +/* return -1; */ +/*-----------------------------------------------------------------*/ +int pic16_my_powof2 (unsigned long num) +{ + if(num) { + if( (num & (num-1)) == 0) { + int nshifts = -1; + while(num) { + num>>=1; + nshifts++; + } + return nshifts; + } + } + + return -1; +} + +void DEBUGpic16_pic16_AopType(int line_no, operand *left, operand *right, operand *result) +{ + DEBUGpic16_emitcode ("; ","line = %d result %s=%s, left %s=%s, right %s=%s, size = %d", + line_no, + ((result) ? pic16_AopType(AOP_TYPE(result)) : "-"), + ((result) ? pic16_aopGet(AOP(result),0,TRUE,FALSE) : "-"), + ((left) ? pic16_AopType(AOP_TYPE(left)) : "-"), + ((left) ? pic16_aopGet(AOP(left),0,TRUE,FALSE) : "-"), + ((right) ? pic16_AopType(AOP_TYPE(right)) : "-"), + ((right) ? pic16_aopGet(AOP(right),0,FALSE,FALSE) : "-"), + ((result) ? AOP_SIZE(result) : 0)); +} + +void DEBUGpic16_pic16_AopTypeSign(int line_no, operand *left, operand *right, operand *result) +{ + + DEBUGpic16_emitcode ("; ","line = %d, signs: result %s=%c, left %s=%c, right %s=%c", + line_no, + ((result) ? pic16_AopType(AOP_TYPE(result)) : "-"), + ((result) ? (SPEC_USIGN(operandType(result)) ? 'u' : 's') : '-'), + ((left) ? pic16_AopType(AOP_TYPE(left)) : "-"), + ((left) ? (SPEC_USIGN(operandType(left)) ? 'u' : 's') : '-'), + ((right) ? pic16_AopType(AOP_TYPE(right)) : "-"), + ((right) ? (SPEC_USIGN(operandType(right)) ? 'u' : 's') : '-')); + +} + +void pic16_emitpcomment (char *fmt, ...) +{ + va_list ap; + char lb[INITIAL_INLINEASM]; + unsigned char *lbp = (unsigned char *)lb; + + va_start(ap,fmt); + + lb[0] = ';'; + vsprintf(lb+1,fmt,ap); + + while (isspace(*lbp)) lbp++; + + if (lbp && *lbp) + lineCurr = (lineCurr ? + connectLine(lineCurr,newLineNode(lb)) : + (lineHead = newLineNode(lb))); + lineCurr->isInline = _G.inLine; + lineCurr->isDebug = _G.debugLine; + lineCurr->isComment = 1; + + pic16_addpCode2pBlock(pb,pic16_newpCodeCharP(lb)); + va_end(ap); + +// fprintf(stderr, "%s\n", lb); +} + +void DEBUGpic16_emitcode (char *inst,char *fmt, ...) +{ + va_list ap; + char lb[INITIAL_INLINEASM]; + unsigned char *lbp = (unsigned char *)lb; + + if(!pic16_debug_verbose) + return; + + va_start(ap,fmt); + + if (inst && *inst) { + if (fmt && *fmt) + sprintf(lb,"%s\t",inst); + else + sprintf(lb,"%s",inst); + vsprintf(lb+(strlen(lb)),fmt,ap); + } else + vsprintf(lb,fmt,ap); + + while (isspace(*lbp)) lbp++; + + if (lbp && *lbp) + lineCurr = (lineCurr ? + connectLine(lineCurr,newLineNode(lb)) : + (lineHead = newLineNode(lb))); + lineCurr->isInline = _G.inLine; + lineCurr->isDebug = _G.debugLine; + + pic16_addpCode2pBlock(pb,pic16_newpCodeCharP(lb)); + va_end(ap); + +// fprintf(stderr, "%s\n", lb); +} + + + +void pic16_emitpLabel(int key) +{ + if(key>max_key) + max_key = key; + + pic16_addpCode2pBlock(pb,pic16_newpCodeLabel(NULL,key+100+pic16_labelOffset)); +} + +void pic16_emitpLabelFORCE(int key) +{ + if(key>max_key) + max_key = key; + + pic16_addpCode2pBlock(pb,pic16_newpCodeLabelFORCE(NULL,key+100+pic16_labelOffset)); +} + +/* gen.h defines a macro pic16_emitpcode that allows for debug information to be inserted on demand + * NEVER call pic16_emitpcode_real directly, please... */ +void pic16_emitpcode_real(PIC_OPCODE poc, pCodeOp *pcop) +{ + + if(pcop) + pic16_addpCode2pBlock(pb,pic16_newpCode(poc,pcop)); + else + DEBUGpic16_emitcode(";","%s ignoring NULL pcop",__FUNCTION__); +} + +void pic16_emitpinfo(INFO_TYPE itype, pCodeOp *pcop) +{ + if(pcop) + pic16_addpCode2pBlock(pb, pic16_newpCodeInfo(itype, pcop)); + else + DEBUGpic16_emitcode(";","%s ignoring NULL pcop",__FUNCTION__); +} + +void pic16_emitpcodeNULLop(PIC_OPCODE poc) +{ + + pic16_addpCode2pBlock(pb,pic16_newpCode(poc,NULL)); + +} + + +#if 1 +#define pic16_emitcode DEBUGpic16_emitcode +#else +/*-----------------------------------------------------------------*/ +/* pic16_emitcode - writes the code into a file : for now it is simple */ +/*-----------------------------------------------------------------*/ +void pic16_emitcode (char *inst,char *fmt, ...) +{ + va_list ap; + char lb[INITIAL_INLINEASM]; + unsigned char *lbp = lb; + + va_start(ap,fmt); + + if (inst && *inst) { + if (fmt && *fmt) + sprintf(lb,"%s\t",inst); + else + sprintf(lb,"%s",inst); + vsprintf(lb+(strlen(lb)),fmt,ap); + } else + vsprintf(lb,fmt,ap); + + while (isspace(*lbp)) lbp++; + + if (lbp && *lbp) + lineCurr = (lineCurr ? + connectLine(lineCurr,newLineNode(lb)) : + (lineHead = newLineNode(lb))); + lineCurr->isInline = _G.inLine; + lineCurr->isDebug = _G.debugLine; + lineCurr->isLabel = (lbp[strlen (lbp) - 1] == ':'); + lineCurr->isComment = (*lbp == ';'); + +// VR fprintf(stderr, "lb = <%s>\n", lbp); + +// if(pic16_debug_verbose) +// pic16_addpCode2pBlock(pb,pic16_newpCodeCharP(lb)); + + va_end(ap); +} +#endif + + +/*-----------------------------------------------------------------*/ +/* pic16_emitDebuggerSymbol - associate the current code location */ +/* with a debugger symbol */ +/*-----------------------------------------------------------------*/ +void +pic16_emitDebuggerSymbol (char * debugSym) +{ + _G.debugLine = 1; + pic16_emitcode (";", "%s ==.", debugSym); + _G.debugLine = 0; +} + +/*-----------------------------------------------------------------*/ +/* newAsmop - creates a new asmOp */ +/*-----------------------------------------------------------------*/ +static asmop *newAsmop (short type) +{ + asmop *aop; + + aop = Safe_calloc(1,sizeof(asmop)); + aop->type = type; + return aop; +} + +/*-----------------------------------------------------------------*/ +/* resolveIfx - converts an iCode ifx into a form more useful for */ +/* generating code */ +/*-----------------------------------------------------------------*/ +static void resolveIfx(resolvedIfx *resIfx, iCode *ifx) +{ + FENTRY2; + +// DEBUGpic16_emitcode("; ***","%s %d",__FUNCTION__,__LINE__); + + if(!resIfx) + return; + + + resIfx->condition = 1; /* assume that the ifx is true */ + resIfx->generated = 0; /* indicate that the ifx has not been used */ + + if(!ifx) { + resIfx->lbl = newiTempLabel(NULL); /* oops, there is no ifx. so create a label */ + +#if 1 + DEBUGpic16_emitcode("; ***","%s %d null ifx creating new label key =%d", + __FUNCTION__,__LINE__,resIfx->lbl->key); +#endif + + } else { + if(IC_TRUE(ifx)) { + resIfx->lbl = IC_TRUE(ifx); + } else { + resIfx->lbl = IC_FALSE(ifx); + resIfx->condition = 0; + } + +#if 1 + if(IC_TRUE(ifx)) + DEBUGpic16_emitcode("; +++","ifx true is non-null"); + else + DEBUGpic16_emitcode("; +++","ifx true is null"); + if(IC_FALSE(ifx)) + DEBUGpic16_emitcode("; +++","ifx false is non-null"); + else + DEBUGpic16_emitcode("; +++","ifx false is null"); +#endif + } + + DEBUGpic16_emitcode("; ***","%s lbl->key=%d, (lab offset=%d)",__FUNCTION__,resIfx->lbl->key,pic16_labelOffset); + +} +#if 0 +/*-----------------------------------------------------------------*/ +/* pointerCode - returns the code for a pointer type */ +/*-----------------------------------------------------------------*/ +static int pointerCode (sym_link *etype) +{ + + return PTR_TYPE(SPEC_OCLS(etype)); + +} +#endif + +/*-----------------------------------------------------------------*/ +/* aopForSym - for a true symbol */ +/*-----------------------------------------------------------------*/ +static asmop *aopForSym (iCode *ic, operand *op, bool result) +{ + symbol *sym=OP_SYMBOL(op); + asmop *aop; + memmap *space= SPEC_OCLS(sym->etype); + + FENTRY2; + + _G.resDirect = 0; /* clear flag that instructs the result is loaded directly from aopForSym */ + +// sym = OP_SYMBOL(op); + + /* if already has one */ + if (sym->aop) { + DEBUGpic16_emitcode("; ***", "already has sym %s %d", __FUNCTION__, __LINE__); + return sym->aop; + } + +#if 0 + /* if symbol was initially placed onStack then we must re-place it + * to direct memory, since pic16 does not have a specific stack */ + if(sym->onStack) { + fprintf(stderr, "%s:%d symbol %s on stack\n", __FILE__, __LINE__, OP_SYMBOL(op)->name); + } +#endif + + +#if 0 + if(sym->iaccess) { + if(space->paged) { + fprintf(stderr, "%s:%d symbol %s points to paged data\n", __FILE__, __LINE__, sym->name); + + sym->aop = aop = newAsmop (AOP_PAGED); + aop->aopu.aop_dir = sym->rname ; + aop->size = getSize(sym->type); + DEBUGpic16_emitcode(";","%d sym->rname = %s, size = %d",__LINE__,sym->rname,aop->size); + pic16_allocDirReg( IC_LEFT(ic) ); + return aop; + } + assert( 0 ); + } +#endif + +#if 1 + /* assign depending on the storage class */ + /* if it is on the stack or indirectly addressable */ + /* space we need to assign either r0 or r1 to it */ + if (sym->onStack) // || sym->iaccess) + { + pCodeOp *pcop[4]; + int i; + + DEBUGpic16_emitcode("; ***", "%s:%d sym->onStack:%d || sym->iaccess:%d", + __FUNCTION__, __LINE__, sym->onStack, sym->iaccess); + + /* acquire a temporary register -- it is saved in function */ + + sym->aop = aop = newAsmop(AOP_STA); + aop->aopu.stk.stk = sym->stack; + aop->size = getSize(sym->type); + + + DEBUGpic16_emitcode("; +++ ", "%s:%d\top = %s", __FILE__, __LINE__, pic16_decodeOp(ic->op)); + if((ic->op == '=' /*|| ic->op == CAST*/) && IC_RESULT(ic) && AOP( IC_RESULT(ic) ) + && (AOP_TYPE(IC_RESULT(ic)) == AOP_REG)) { +// pic16_DumpAop("aopForSym", AOP( IC_RESULT(ic) )); + + for(i=0;isize;i++) + aop->aopu.stk.pop[i] = pcop[i] = pic16_popRegFromIdx( AOP(IC_RESULT(ic))->aopu.aop_reg[i]->rIdx); + _G.resDirect = 1; /* notify that result will be loaded directly from aopForSym */ + } else + if(1 && ic->op == SEND) { + + /* if SEND do the send here */ + _G.resDirect = 1; + } else { +// debugf3("symbol `%s' level = %d / %d\n", sym->name, ic->level, ic->seq); + for(i=0;isize;i++) { + aop->aopu.stk.pop[i] = pcop[i] = pic16_popGetTempRegCond(_G.fregsUsed, _G.sregsAlloc, 0 ); + _G.sregsAlloc = bitVectSetBit(_G.sregsAlloc, PCOR(pcop[i])->r->rIdx); + } + } + + +// fprintf(stderr, "%s:%d\t%s\tsym size %d\n", __FILE__, __LINE__, __FUNCTION__, aop->size); + +#if 1 + DEBUGpic16_emitcode(";","%d sym->rname = %s, size = %d stack = %d",__LINE__,sym->rname,aop->size, sym->stack); + + // we do not need to load the value if it is to be defined... + if (result) return aop; + + if(_G.accInUse) { + pic16_pushpCodeOp( pic16_popCopyReg(&pic16_pc_wreg) ); + } + + for(i=0;isize;i++) { + + /* initialise for stack access via frame pointer */ + // operands on stack are accessible via "{FRAME POINTER} + index" with index + // starting at 2 for arguments and growing from 0 downwards for + // local variables (index == 0 is not assigned so we add one here) + { + int soffs = sym->stack; + if (soffs <= 0) { + assert (soffs < 0); + soffs++; + } // if + + if(1 && ic->op == SEND) { + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(soffs + aop->size - i - 1 /*+ _G.stack_lat*/)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg( pic16_frame_plusw ), + pic16_popCopyReg(pic16_stack_postdec ))); + } else { + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(soffs + i /*+ _G.stack_lat*/)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg( pic16_frame_plusw ), pcop[i])); + } + } + } + + if(_G.accInUse) { + pic16_poppCodeOp( pic16_popCopyReg(&pic16_pc_wreg) ); + } + + return (aop); +#endif + +#if 0 + /* now assign the address of the variable to + the pointer register */ + if (aop->type != AOP_STK) { + + if (sym->onStack) { + if ( _G.accInUse ) + pic16_emitcode("push","acc"); + + pic16_emitcode("mov","a,_bp"); + pic16_emitcode("add","a,#0x%02x", + ((sym->stack < 0) ? + ((char)(sym->stack - _G.nRegsSaved )) : + ((char)sym->stack)) & 0xff); + pic16_emitcode("mov","%s,a", + aop->aopu.aop_ptr->name); + + if ( _G.accInUse ) + pic16_emitcode("pop","acc"); + } else + pic16_emitcode("mov","%s,#%s", + aop->aopu.aop_ptr->name, + sym->rname); + aop->paged = space->paged; + } else + aop->aopu.aop_stk = sym->stack; + return aop; +#endif + + } +#endif + +#if 1 + /* special case for a function */ + if (IS_FUNC(sym->type)) { + sym->aop = aop = newAsmop(AOP_PCODE); + aop->aopu.pcop = pic16_popGetImmd(sym->rname, 0, 0); + PCOI(aop->aopu.pcop)->_const = IN_CODESPACE(space); + PCOI(aop->aopu.pcop)->index = 0; + aop->size = FPTRSIZE; + DEBUGpic16_emitcode(";","%d size = %d, name =%s",__LINE__,aop->size,sym->rname); + return aop; + } +#endif + + + + //DEBUGpic16_emitcode(";","%d",__LINE__); + /* if in bit space */ + if (IN_BITSPACE(space)) { + sym->aop = aop = newAsmop (AOP_CRY); + aop->aopu.aop_dir = sym->rname ; + aop->size = getSize(sym->type); + DEBUGpic16_emitcode(";","%d sym->rname = %s, size = %d",__LINE__,sym->rname,aop->size); + return aop; + } + /* if it is in direct space */ + if (IN_DIRSPACE(space)) { + if(!strcmp(sym->rname, "_WREG")) { + sym->aop = aop = newAsmop (AOP_ACC); + aop->size = getSize(sym->type); /* should always be 1 */ + assert(aop->size == 1); + DEBUGpic16_emitcode(";","%d sym->rname (AOP_ACC) = %s, size = %d",__LINE__,sym->rname,aop->size); + return (aop); + } else { + sym->aop = aop = newAsmop (AOP_DIR); + aop->aopu.aop_dir = sym->rname ; + aop->size = getSize(sym->type); + DEBUGpic16_emitcode(";","%d sym->rname (AOP_DIR) = %s, size = %d",__LINE__,sym->rname,aop->size); + pic16_allocDirReg( IC_LEFT(ic) ); + return (aop); + } + } + + if (IN_FARSPACE(space) && !IN_CODESPACE(space)) { + sym->aop = aop = newAsmop (AOP_DIR); + aop->aopu.aop_dir = sym->rname ; + aop->size = getSize(sym->type); + DEBUGpic16_emitcode(";","%d sym->rname = %s, size = %d",__LINE__,sym->rname,aop->size); + pic16_allocDirReg( IC_LEFT(ic) ); + return aop; + } + + + /* only remaining is far space */ + sym->aop = aop = newAsmop(AOP_PCODE); + +/* change the next if to 1 to revert to good old immediate code */ + if(IN_CODESPACE(space)) { + aop->aopu.pcop = pic16_popGetImmd(sym->rname, 0, 0); + PCOI(aop->aopu.pcop)->_const = IN_CODESPACE(space); + PCOI(aop->aopu.pcop)->index = 0; + } else { + /* try to allocate via direct register */ + aop->aopu.pcop = pic16_popRegFromString(sym->rname, getSize(sym->type), sym->offset, op); // Patch 8 +// aop->size = getSize( sym->type ); + } + + DEBUGpic16_emitcode(";","%d: rname %s, val %d, const = %d", + __LINE__,sym->rname, 0, PCOI(aop->aopu.pcop)->_const); + +#if 0 + if(!pic16_allocDirReg (IC_LEFT(ic))) + return NULL; +#endif + + if(IN_DIRSPACE( space )) + aop->size = PTRSIZE; + else if(IN_CODESPACE( space ) || IN_FARSPACE( space )) + aop->size = FPTRSIZE; + else if(IC_LEFT(ic) && AOP(IC_LEFT(ic))) aop->size = AOP_SIZE( IC_LEFT(ic) ); + else if(IC_RIGHT(ic) && AOP(IC_RIGHT(ic))) aop->size = AOP_SIZE( IC_RIGHT(ic) ); + else if(sym->onStack) { + aop->size = PTRSIZE; + } else { + if(SPEC_SCLS(sym->etype) == S_PDATA) { + fprintf(stderr, "%s: %d symbol in PDATA space\n", __FILE__, __LINE__); + aop->size = FPTRSIZE; + } else + assert( 0 ); + } + + DEBUGpic16_emitcode(";","%d size = %d",__LINE__,aop->size); + + /* if it is in code space */ + if (IN_CODESPACE(space)) + aop->code = 1; + + return aop; +} + +/*-----------------------------------------------------------------*/ +/* aopForRemat - rematerialzes an object */ +/*-----------------------------------------------------------------*/ +static asmop *aopForRemat (operand *op, bool result) // x symbol *sym) +{ + symbol *sym = OP_SYMBOL(op); + operand *refop; + iCode *ic = NULL, *oldic; + asmop *aop = newAsmop(AOP_PCODE); + int val = 0; + int offset = 0; + int viaimmd=0; + + FENTRY2; + + ic = sym->rematiCode; + + if(IS_OP_POINTER(op)) { + DEBUGpic16_emitcode(";","%s %d IS_OP_POINTER",__FUNCTION__,__LINE__); + } + +// if(!result) /* fixme-vr */ + for (;;) { + oldic = ic; + +// chat *iLine = printILine(ic); +// pic16_emitpcomment("ic: %s\n", iLine); +// dbuf_free(iLine); + + if (ic->op == '+') { + val += (int) operandLitValue(IC_RIGHT(ic)); + } else if (ic->op == '-') { + val -= (int) operandLitValue(IC_RIGHT(ic)); + } else + break; + + ic = OP_SYMBOL(IC_LEFT(ic))->rematiCode; + } + + offset = OP_SYMBOL(IC_LEFT(ic))->offset; + refop = IC_LEFT(ic); + + if(!op->isaddr)viaimmd++; else viaimmd=0; + +/* set the following if to 1 to revert to good old immediate code */ + if(IN_CODESPACE( SPEC_OCLS( OP_SYM_ETYPE(refop))) + || viaimmd) { + + DEBUGpic16_emitcode(";", "%s:%d immediate, size: %d", __FILE__, __LINE__, getSize( sym->type )); + + aop->aopu.pcop = pic16_popGetImmd(OP_SYMBOL(IC_LEFT(ic))->rname, 0, val); + +#if 0 + PCOI(aop->aopu.pcop)->_const = IS_PTR_CONST(operandType(op)); +#else + PCOI(aop->aopu.pcop)->_const = IS_CODEPTR(operandType(op)); +#endif + + PCOI(aop->aopu.pcop)->index = val; + + aop->size = getSize( sym->type ); + } else { + DEBUGpic16_emitcode(";", "%s:%d dir size: %d", __FILE__, __LINE__, getSize( OP_SYMBOL( IC_LEFT(ic))->type)); + + aop->aopu.pcop = pic16_popRegFromString(OP_SYMBOL(IC_LEFT(ic))->rname, + getSize( OP_SYMBOL( IC_LEFT(ic))->type), val, op); + + aop->size = getSize( OP_SYMBOL( IC_LEFT(ic))->type ); + } + + + DEBUGpic16_emitcode(";","%d: rname %s, val %d, const = %d", + __LINE__,OP_SYMBOL(IC_LEFT(ic))->rname, +#if 0 + val, IS_PTR_CONST(operandType(op))); +#else + val, IS_CODEPTR(operandType(op))); +#endif + +// DEBUGpic16_emitcode(";","aop type %s",pic16_AopType(AOP_TYPE(IC_LEFT(ic)))); + + pic16_allocDirReg (IC_LEFT(ic)); + + if(IN_CODESPACE( SPEC_OCLS( OP_SYM_ETYPE(op)) )) + aop->code = 1; + + return aop; +} + +#if 0 +static int aopIdx (asmop *aop, int offset) +{ + if(!aop) + return -1; + + if(aop->type != AOP_REG) + return -2; + + return aop->aopu.aop_reg[offset]->rIdx; + +} +#endif + +/*-----------------------------------------------------------------*/ +/* regsInCommon - two operands have some registers in common */ +/*-----------------------------------------------------------------*/ +static bool regsInCommon (operand *op1, operand *op2) +{ + symbol *sym1, *sym2; + int i; + + /* if they have registers in common */ + if (!IS_SYMOP(op1) || !IS_SYMOP(op2)) + return FALSE ; + + sym1 = OP_SYMBOL(op1); + sym2 = OP_SYMBOL(op2); + + if (sym1->nRegs == 0 || sym2->nRegs == 0) + return FALSE ; + + for (i = 0 ; i < sym1->nRegs ; i++) { + int j; + if (!sym1->regs[i]) + continue ; + + for (j = 0 ; j < sym2->nRegs ;j++ ) { + if (!sym2->regs[j]) + continue ; + + if (sym2->regs[j] == sym1->regs[i]) + return TRUE ; + } + } + + return FALSE ; +} + +/*-----------------------------------------------------------------*/ +/* operandsEqu - equivalent */ +/*-----------------------------------------------------------------*/ +static bool operandsEqu ( operand *op1, operand *op2) +{ + symbol *sym1, *sym2; + + /* if they not symbols */ + if (!IS_SYMOP(op1) || !IS_SYMOP(op2)) + return FALSE; + + sym1 = OP_SYMBOL(op1); + sym2 = OP_SYMBOL(op2); + + /* if both are itemps & one is spilt + and the other is not then false */ + if (IS_ITEMP(op1) && IS_ITEMP(op2) && + sym1->isspilt != sym2->isspilt ) + return FALSE ; + + /* if they are the same */ + if (sym1 == sym2) + return TRUE ; + + if (sym1->rname[0] && sym2->rname[0] + && strcmp (sym1->rname, sym2->rname) == 0) + return TRUE; + + + /* if left is a tmp & right is not */ + if (IS_ITEMP(op1) && + !IS_ITEMP(op2) && + sym1->isspilt && + (SYM_SPIL_LOC(sym1) == sym2)) + return TRUE; + + if (IS_ITEMP(op2) && + !IS_ITEMP(op1) && + sym2->isspilt && + sym1->level > 0 && + (SYM_SPIL_LOC(sym2) == sym1)) + return TRUE ; + + return FALSE ; +} + +/*-----------------------------------------------------------------*/ +/* pic16_sameRegs - two asmops have the same registers */ +/*-----------------------------------------------------------------*/ +bool pic16_sameRegs (asmop *aop1, asmop *aop2 ) +{ + int i; + + if (aop1 == aop2) + return TRUE ; + + DEBUGpic16_emitcode(";***", "%s aop1->type = %s\taop2->type = %s\n", __FUNCTION__, + pic16_AopType(aop1->type), pic16_AopType(aop2->type)); + + if(aop1->type == AOP_ACC && aop2->type == AOP_ACC)return TRUE; + + if (aop1->type != AOP_REG || + aop2->type != AOP_REG ) + return FALSE ; + + /* This is a bit too restrictive if one is a subset of the other... + if (aop1->size != aop2->size ) + return FALSE ; + */ + + for (i = 0 ; i < min(aop1->size, aop2->size) ; i++ ) { +// if(aop1->aopu.aop_reg[i]->type != aop2->aopu.aop_reg[i]->type)return FALSE; + +// if(aop1->aopu.aop_reg[i]->type == AOP_REG) + if (strcmp(aop1->aopu.aop_reg[i]->name, aop2->aopu.aop_reg[i]->name )) + return FALSE ; + } + + return TRUE ; +} + +bool pic16_sameRegsOfs(asmop *aop1, asmop *aop2, int offset) +{ + DEBUGpic16_emitcode(";***", "%s aop1->type = %s\taop2->type = %s (offset = %d)\n", __FUNCTION__, + pic16_AopType(aop1->type), pic16_AopType(aop2->type), offset); + + if(aop1 == aop2)return TRUE; + if(aop1->type != AOP_REG || aop2->type != AOP_REG)return FALSE; + + if(strcmp(aop1->aopu.aop_reg[offset]->name, aop2->aopu.aop_reg[offset]->name))return FALSE; + + return TRUE; +} + + +/*-----------------------------------------------------------------*/ +/* pic16_aopOp - allocates an asmop for an operand : */ +/*-----------------------------------------------------------------*/ +void pic16_aopOp (operand *op, iCode *ic, bool result) +{ + asmop *aop; + symbol *sym; + int i; + + if (!op) + return ; + + DEBUGpic16_emitcode(";","%s %d",__FUNCTION__, __LINE__); + + /* if this a literal */ + if (IS_OP_LITERAL(op)) { + op->aop = aop = newAsmop(AOP_LIT); + aop->aopu.aop_lit = op->operand.valOperand; + aop->size = getSize(operandType(op)); + return; + } + + { + sym_link *type = operandType(op); +#if 0 + if(IS_PTR_CONST(type)) +#else + if(IS_CODEPTR(type)) +#endif + DEBUGpic16_emitcode(";","%d aop type is const pointer",__LINE__); + } + + /* if already has a asmop then continue */ + if (op->aop) + return ; + + /* if the underlying symbol has a aop */ + if (IS_SYMOP(op) && OP_SYMBOL(op)->aop) { + DEBUGpic16_emitcode(";","%d has symbol",__LINE__); + op->aop = OP_SYMBOL(op)->aop; + return; + } + + /* if this is a true symbol */ + if (IS_TRUE_SYMOP(op)) { + DEBUGpic16_emitcode(";","%d - true symop",__LINE__); + op->aop = aopForSym(ic, op, result); + return ; + } + + /* this is a temporary : this has + only four choices : + a) register + b) spillocation + c) rematerialize + d) conditional + e) can be a return use only */ + + sym = OP_SYMBOL(op); + + DEBUGpic16_emitcode("; ***", "%d: symbol name = %s, regType = %d", __LINE__, sym->name, sym->regType); + /* if the type is a conditional */ + if (sym->regType == REG_CND) { + aop = op->aop = sym->aop = newAsmop(AOP_CRY); + aop->size = 0; + return; + } + + /* if it is spilt then two situations + a) is rematerialize + b) has a spill location */ + if (sym->isspilt || sym->nRegs == 0) { + +// debugf3("symbol %s\tisspilt: %d\tnRegs: %d\n", sym->rname, sym->isspilt, sym->nRegs); + DEBUGpic16_emitcode(";","%d",__LINE__); + /* rematerialize it NOW */ + if (sym->remat) { + + sym->aop = op->aop = aop = aopForRemat (op, result); + return; + } + +#if 1 + if (sym->accuse) { + int i; + aop = op->aop = sym->aop = newAsmop(AOP_ACC); + aop->size = getSize(sym->type); + for ( i = 0 ; i < 1 ; i++ ) { + aop->aopu.aop_str[i] = accUse[i]; +// aop->aopu.pcop = pic16_popRegFromString("WREG", aop->size, SYM_SPIL_LOC(sym)->offset); + } + fprintf(stderr, "%s:%d allocating AOP_ACC for sym= %s\n", __FILE__, __LINE__, sym->name); + DEBUGpic16_emitcode(";","%d size=%d",__LINE__,aop->size); + return; + } +#endif + +#if 1 + if (sym->ruonly) { + /* + sym->aop = op->aop = aop = newAsmop(AOP_PCODE); + aop->aopu.pcop = pic16_popGetImmd(SYM_SPIL_LOC(sym)->rname,0,SYM_SPIL_LOC(sym)->offset); + //pic16_allocDirReg (IC_LEFT(ic)); + aop->size = getSize(sym->type); + */ + + unsigned i; + + aop = op->aop = sym->aop = newAsmop(AOP_REG); + aop->size = getSize(sym->type); + for ( i = 0 ; i < pic16_fReturnSizePic ; i++ ) + aop->aopu.aop_reg[i] = PCOR(pic16_popRegFromIdx( fReturnIdx[i] ))->r; + + DEBUGpic16_emitcode(";","%d",__LINE__); + return; + } +#endif + /* else spill location */ + if (SYM_SPIL_LOC(sym) && getSize(sym->type) != getSize(SYM_SPIL_LOC(sym)->type)) { + /* force a new aop if sizes differ */ + SYM_SPIL_LOC(sym)->aop = NULL; + } + +#if 0 + DEBUGpic16_emitcode(";","%s %d %s sym->rname = %s, offset %d", + __FUNCTION__,__LINE__, + SYM_SPIL_LOC(sym)->rname, + sym->rname, SYM_SPIL_LOC(sym)->offset); +#endif + + //aop->aopu.pcop = pic16_popGetImmd(SYM_SPIL_LOC(sym)->rname,0,SYM_SPIL_LOC(sym)->offset); + if (SYM_SPIL_LOC(sym) && SYM_SPIL_LOC(sym)->rname) { + sym->aop = op->aop = aop = newAsmop(AOP_PCODE); + aop->aopu.pcop = pic16_popRegFromString(SYM_SPIL_LOC(sym)->rname, + getSize(sym->type), + SYM_SPIL_LOC(sym)->offset, op); + } else if (getSize(sym->type) <= 1) { + //fprintf (stderr, "%s:%d called for a spillLocation -- assigning WREG instead --- CHECK (size:%u)!\n", __FUNCTION__, __LINE__, getSize(sym->type)); + pic16_emitpcomment (";!!! %s:%d called for a spillLocation -- assigning WREG instead --- CHECK", __FUNCTION__, __LINE__); + assert (getSize(sym->type) <= 1); + sym->aop = op->aop = aop = newAsmop(AOP_PCODE); + aop->aopu.pcop = pic16_popCopyReg (&pic16_pc_wreg); + } else { + /* We need some kind of dummy area for getSize(sym->type) byte, + * use WREG for all storage locations. + * XXX: This only works if we are implementing a `dummy read', + * the stored value will not be retrievable... + * See #1503234 for a case requiring this. */ + sym->aop = op->aop = aop = newAsmop(AOP_REG); + aop->size = getSize(sym->type); + for ( i = 0 ; i < aop->size ;i++) + aop->aopu.aop_reg[i] = pic16_pc_wreg.r; + } + aop->size = getSize(sym->type); + + return; + } + + { + sym_link *type = operandType(op); +#if 0 + if(IS_PTR_CONST(type)) +#else + if(IS_CODEPTR(type)) +#endif + DEBUGpic16_emitcode(";","%d aop type is const pointer",__LINE__); + } + + /* must be in a register */ + DEBUGpic16_emitcode(";","%d register type nRegs=%d",__LINE__,sym->nRegs); + sym->aop = op->aop = aop = newAsmop(AOP_REG); + aop->size = sym->nRegs; + for ( i = 0 ; i < sym->nRegs ;i++) + aop->aopu.aop_reg[i] = sym->regs[i]; +} + +/*-----------------------------------------------------------------*/ +/* pic16_freeAsmop - free up the asmop given to an operand */ +/*----------------------------------------------------------------*/ +void pic16_freeAsmop (operand *op, asmop *aaop, iCode *ic, bool pop) +{ + asmop *aop ; + + if (!op) + aop = aaop; + else + aop = op->aop; + + if (!aop) + return ; + + if (aop->freed) + goto dealloc; + + aop->freed = 1; + +#if 1 + switch (aop->type) { + case AOP_STA: + { + int i; + + /* we must store the result on stack */ + if((op == IC_RESULT(ic)) && RESULTONSTA(ic)) { + // operands on stack are accessible via "FSR2 + index" with index + // starting at 2 for arguments and growing from 0 downwards for + // local variables (index == 0 is not assigned so we add one here) + int soffs = OP_SYMBOL(IC_RESULT(ic))->stack; + if (soffs <= 0) { + assert (soffs < 0); + soffs++; + } // if + if(_G.accInUse)pic16_pushpCodeOp( pic16_popCopyReg(&pic16_pc_wreg) ); + for(i=0;isize;i++) { + /* initialise for stack access via frame pointer */ + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(soffs + i /*+ _G.stack_lat*/)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + aop->aopu.stk.pop[i], pic16_popCopyReg(pic16_frame_plusw))); + } + + if(_G.accInUse)pic16_poppCodeOp( pic16_popCopyReg(&pic16_pc_wreg) ); + } + + if(!_G.resDirect) { + for(i=0;isize;i++) { + PCOR(aop->aopu.stk.pop[i] )->r->isFree = 1; + + if(bitVectBitValue(_G.sregsAlloc, PCOR(aop->aopu.stk.pop[i])->r->rIdx)) { + bitVectUnSetBit(_G.sregsAlloc, PCOR(aop->aopu.stk.pop[i])->r->rIdx); +// pic16_popReleaseTempReg(aop->aopu.stk.pop[i], 0); + } + } + + if (_G.sregsAllocSet) { + regs *sr; + + _G.sregsAllocSet = reverseSet( _G.sregsAllocSet ); + for(sr=setFirstItem(_G.sregsAllocSet) ; sr; sr=setFirstItem(_G.sregsAllocSet)) { + pic16_poppCodeOp( pic16_popRegFromIdx( sr->rIdx ) ); + deleteSetItem( &_G.sregsAllocSet, sr ); + } + } + } + _G.resDirect = 0; + } + break; +#if 0 + case AOP_STK : + { + int sz = aop->size; + int stk = aop->aopu.aop_stk + aop->size; + bitVectUnSetBit(ic->rUsed,R0_IDX); + bitVectUnSetBit(ic->rUsed,R1_IDX); + + getFreePtr(ic,&aop,FALSE); + + if (options.stack10bit) + { + /* I'm not sure what to do here yet... */ + /* #STUB */ + fprintf(stderr, + "*** Warning: probably generating bad code for " + "10 bit stack mode.\n"); + } + + if (stk) { + pic16_emitcode ("mov","a,_bp"); + pic16_emitcode ("add","a,#0x%02x",((char)stk) & 0xff); + pic16_emitcode ("mov","%s,a",aop->aopu.aop_ptr->name); + } else { + pic16_emitcode ("mov","%s,_bp",aop->aopu.aop_ptr->name); + } + + while (sz--) { + pic16_emitcode("pop","acc"); + pic16_emitcode("mov","@%s,a",aop->aopu.aop_ptr->name); + if (!sz) break; + pic16_emitcode("dec","%s",aop->aopu.aop_ptr->name); + } + op->aop = aop; + pic16_freeAsmop(op,NULL,ic,TRUE); + if (_G.r0Pushed) { + pic16_emitcode("pop","ar0"); + _G.r0Pushed--; + } + + if (_G.r1Pushed) { + pic16_emitcode("pop","ar1"); + _G.r1Pushed--; + } + } +#endif + + } +#endif + +dealloc: + /* all other cases just dealloc */ + if (op ) { + op->aop = NULL; + if (IS_SYMOP(op)) { + OP_SYMBOL(op)->aop = NULL; + /* if the symbol has a spill */ + if (SPIL_LOC(op)) + SPIL_LOC(op)->aop = NULL; + } + } +} + +/*-----------------------------------------------------------------*/ +/* pic16_aopGet - for fetching value of the aop */ +/*-----------------------------------------------------------------*/ +char *pic16_aopGet (asmop *aop, int offset, bool bit16, bool dname) +{ + char *s = buffer ; + char *rs; + + //DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + /* offset is greater than size then zero */ + if (offset > (aop->size - 1) && + aop->type != AOP_LIT) + return zero; + + /* depending on type */ + switch (aop->type) { + case AOP_DIR: + if (offset) { + sprintf(s,"(%s + %d)", + aop->aopu.aop_dir, + offset); + DEBUGpic16_emitcode(";","oops AOP_DIR did this %s\n",s); + } else + sprintf(s,"%s",aop->aopu.aop_dir); + rs = Safe_calloc(1,strlen(s)+1); + strcpy(rs,s); + return rs; + + case AOP_REG: + return aop->aopu.aop_reg[offset]->name; + + case AOP_CRY: + return aop->aopu.aop_dir; + + case AOP_ACC: + DEBUGpic16_emitcode(";Warning -pic port ignoring get(AOP_ACC)","%d\toffset: %d",__LINE__, offset); +// fprintf(stderr, "%s:%d Warning -pic port ignoring get(AOP_ACC)\n",__FILE__, __LINE__); +// assert( 0 ); +// return aop->aopu.aop_str[offset]; //->"AOP_accumulator_bug"; + rs = Safe_strdup("WREG"); + return (rs); + + case AOP_LIT: + sprintf(s,"0x%02x", pic16aopLiteral (aop->aopu.aop_lit,offset)); + rs = Safe_calloc(1,strlen(s)+1); + strcpy(rs,s); + return rs; + + case AOP_STR: + aop->coff = offset ; + +// if (strcmp(aop->aopu.aop_str[offset],"a") == 0 && +// dname) +// return "acc"; + if(!strcmp(aop->aopu.aop_str[offset], "WREG")) { + aop->type = AOP_ACC; + return Safe_strdup("_WREG"); + } + DEBUGpic16_emitcode(";","%d - %s",__LINE__, aop->aopu.aop_str[offset]); + + return aop->aopu.aop_str[offset]; + + case AOP_PCODE: + { + pCodeOp *pcop = aop->aopu.pcop; + DEBUGpic16_emitcode(";","%d: pic16_aopGet AOP_PCODE type %s",__LINE__,pic16_pCodeOpType(pcop)); + if(pcop->name) { + DEBUGpic16_emitcode(";","%s offset %d",pcop->name,PCOI(pcop)->offset); + //sprintf(s,"(%s+0x%02x)", pcop->name,PCOI(aop->aopu.pcop)->offset); + if (offset) { + sprintf(s,"(%s + %d)", pic16_get_op (pcop, NULL, 0), offset); + } else { + sprintf(s,"%s", pic16_get_op (pcop, NULL, 0)); + } + } else + sprintf(s,"0x%02x", PCOI(aop->aopu.pcop)->offset); + + } + rs = Safe_calloc(1,strlen(s)+1); + strcpy(rs,s); + return rs; + +#if 0 + case AOP_PAGED: + DEBUGpic16_emitcode(";","oops AOP_PAGED did this %s\n",s); + if (offset) { + sprintf(s,"(%s + %d)", + aop->aopu.aop_dir, + offset); + } else + sprintf(s,"%s",aop->aopu.aop_dir); + DEBUGpic16_emitcode(";","oops AOP_PAGED did this %s\n",s); + rs = Safe_calloc(1,strlen(s)+1); + strcpy(rs,s); + return rs; +#endif + + case AOP_STA: + rs = Safe_strdup(PCOR(aop->aopu.stk.pop[offset])->r->name); + return (rs); + + case AOP_STK: +// pCodeOp *pcop = aop->aop + break; + + } + + fprintf(stderr, "%s:%d unsupported aop->type: %s\n", __FILE__, __LINE__, pic16_AopType(aop->type)); + werror(E_INTERNAL_ERROR,__FILE__,__LINE__, + "aopget got unsupported aop->type"); + exit(0); +} + + + +/* lock has the following meaning: When allocating temporary registers + * for stack variables storage, the value of the temporary register is + * saved on stack. Its value is restored at the end. This procedure is + * done via calls to pic16_aopOp and pic16_freeAsmop functions. There is + * a possibility that before a call to pic16_aopOp, a temporary register + * is allocated for a while and it is freed after some time, this will + * mess the stack and values will not be restored properly. So use lock=1 + * to allocate temporary registers used internally by the programmer, and + * lock=0 to allocate registers for stack use. lock=1 will emit a warning + * to inform the compiler developer about a possible bug. This is an internal + * feature for developing the compiler -- VR */ + +int _TempReg_lock = 0; +/*-----------------------------------------------------------------*/ +/* pic16_popGetTempReg - create a new temporary pCodeOp */ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_popGetTempReg(int lock) +{ + pCodeOp *pcop=NULL; + symbol *cfunc; + +// DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if(_TempReg_lock) { +// werror(W_POSSBUG2, __FILE__, __LINE__); + } + + _TempReg_lock += lock; + + cfunc = currFunc; + currFunc = NULL; + + pcop = pic16_newpCodeOp(NULL, PO_GPR_TEMP); + if(pcop && pcop->type == PO_GPR_TEMP && PCOR(pcop)->r) { + PCOR(pcop)->r->wasUsed=1; + PCOR(pcop)->r->isFree=0; + + /* push value on stack */ + pic16_pushpCodeOp( pic16_pCodeOpCopy(pcop) ); + } + + currFunc = cfunc; + + return pcop; +} + +/*-----------------------------------------------------------------*/ +/* pic16_popGetTempRegCond - create a new temporary pCodeOp which */ +/* is not part of f, but don't save if */ +/* inside v */ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_popGetTempRegCond(bitVect *f, bitVect *v, int lock) +{ + pCodeOp *pcop=NULL; + symbol *cfunc; + int i; + +// DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if(_TempReg_lock) { +// werror(W_POSSBUG2, __FILE__, __LINE__); + } + + _TempReg_lock += lock; + + cfunc = currFunc; + currFunc = NULL; + + i = bitVectFirstBit(f); + while(i < 128) { + + /* bypass registers that are used by function */ + if(!bitVectBitValue(f, i)) { + + /* bypass registers that are already allocated for stack access */ + if(!bitVectBitValue(v, i)) { + +// debugf("getting register rIdx = %d\n", i); + /* ok, get the operand */ + pcop = pic16_newpCodeOpReg( i ); + + /* should never by NULL */ + assert( pcop != NULL ); + + + /* sanity check */ + if(pcop && pcop->type == PO_GPR_TEMP && PCOR(pcop)->r) { + int found=0; + + PCOR(pcop)->r->wasUsed=1; + PCOR(pcop)->r->isFree=0; + + + { + regs *sr; + + for(sr=setFirstItem(_G.sregsAllocSet);sr;sr=setNextItem(_G.sregsAllocSet)) { + + if(sr->rIdx == PCOR(pcop)->r->rIdx) { + /* already used in previous steps, break */ + found=1; + break; + } + } + } + + /* caller takes care of the following */ +// bitVectSetBit(v, i); + + if(!found) { + /* push value on stack */ + pic16_pushpCodeOp( pic16_pCodeOpCopy(pcop) ); + addSet(&_G.sregsAllocSet, PCOR(pcop)->r); + } + + break; + } + } + } + i++; + } + + currFunc = cfunc; + + return pcop; +} + + +/*-----------------------------------------------------------------*/ +/* pic16_popReleaseTempReg - create a new temporary pCodeOp */ +/*-----------------------------------------------------------------*/ +void pic16_popReleaseTempReg(pCodeOp *pcop, int lock) +{ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + _TempReg_lock -= lock; + + if(pcop && pcop->type == PO_GPR_TEMP && PCOR(pcop)->r) { + PCOR(pcop)->r->isFree = 1; + + pic16_poppCodeOp( pic16_pCodeOpCopy(pcop) ); + } +} +/*-----------------------------------------------------------------*/ +/* pic16_popGetLabel - create a new pCodeOp of type PO_LABEL */ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_popGetLabel(int key) +{ + + DEBUGpic16_emitcode ("; ***","%s key=%d, label offset %d",__FUNCTION__,key, pic16_labelOffset); + + if(key>max_key) + max_key = key; + + return pic16_newpCodeOpLabel(NULL,key+100+pic16_labelOffset); +} + +/*-----------------------------------------------------------------*/ +/* pic16_popCopyReg - copy a pcode operator */ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_popCopyReg(pCodeOpReg *pc) +{ + pCodeOpReg *pcor; + + pcor = Safe_calloc(1,sizeof(pCodeOpReg) ); + memcpy (pcor, pc, sizeof (pCodeOpReg)); + pcor->r->wasUsed = 1; + + //pcor->pcop.type = pc->pcop.type; + if(pc->pcop.name) { + if(!(pcor->pcop.name = Safe_strdup(pc->pcop.name))) + fprintf(stderr,"oops %s %d",__FILE__,__LINE__); + } else + pcor->pcop.name = NULL; + + //pcor->r = pc->r; + //pcor->rIdx = pc->rIdx; + //pcor->r->wasUsed=1; + //pcor->instance = pc->instance; + +// DEBUGpic16_emitcode ("; ***","%s , copying %s, rIdx=%d",__FUNCTION__,pc->pcop.name,pc->rIdx); + + return PCOP(pcor); +} + +/*-----------------------------------------------------------------*/ +/* pic16_popGetLit - asm operator to pcode operator conversion */ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_popGetLit(int lit) +{ + return pic16_newpCodeOpLit(lit); +} + +/* Allow for 12 bit literals (LFSR x, ). */ +pCodeOp *pic16_popGetLit12(int lit) +{ + return pic16_newpCodeOpLit12(lit); +} + +/*-----------------------------------------------------------------*/ +/* pic16_popGetLit2 - asm operator to pcode operator conversion */ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_popGetLit2(int lit, pCodeOp *arg2) +{ + return pic16_newpCodeOpLit2(lit, arg2); +} + + +/*-----------------------------------------------------------------*/ +/* pic16_popGetImmd - asm operator to pcode immediate conversion */ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_popGetImmd(char *name, unsigned int offset, int index) +{ + return pic16_newpCodeOpImmd(name, offset,index, 0); +} + + +/*-----------------------------------------------------------------*/ +/* pic16_popGet - asm operator to pcode operator conversion */ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_popGetWithString(char *str) +{ + pCodeOp *pcop; + + + if(!str) { + fprintf(stderr,"NULL string %s %d\n",__FILE__,__LINE__); + exit (1); + } + + pcop = pic16_newpCodeOp(str,PO_STR); + + return pcop; +} + +/*-----------------------------------------------------------------*/ +/* pic16_popRegFromString - */ +/*-----------------------------------------------------------------*/ +static pCodeOp *pic16_popRegFromString(char *str, int size, int offset, operand *op) +{ + + pCodeOp *pcop = Safe_calloc(1,sizeof(pCodeOpReg) ); + pcop->type = PO_DIR; + + DEBUGpic16_emitcode(";","%d %s %s %d/%d",__LINE__, __FUNCTION__, str, size, offset); // patch 14 + // fprintf(stderr, "%s:%d: register name = %s pos = %d/%d\n", __FUNCTION__, __LINE__, str, offset, size); + + if(!str) + str = "BAD_STRING"; + + pcop->name = Safe_calloc(1,strlen(str)+1); + strcpy(pcop->name,str); + + //pcop->name = Safe_strdup( ( (str) ? str : "BAD STRING")); + + PCOR(pcop)->r = pic16_dirregWithName(pcop->name); +// PCOR(pcop)->r->wasUsed = 1; + + /* make sure that register doesn't exist, + * and operand isn't NULL + * and symbol isn't in codespace (codespace symbols are handled elsewhere) */ + if((PCOR(pcop)->r == NULL) + && (op) + && !IN_CODESPACE(SPEC_OCLS(OP_SYM_ETYPE(op)))) { +// fprintf(stderr, "%s:%d - couldn't find %s in allocated regsters, size= %d ofs= %d\n", +// __FUNCTION__, __LINE__, str, size, offset); + + PCOR(pcop)->r = pic16_allocRegByName (pcop->name,size, op); + //fprintf(stderr, "%s:%d: WARNING: need to allocate new register by name -> %s\n", __FILE__, __LINE__, str); + + } + PCOR(pcop)->instance = offset; + + return pcop; +} + +static pCodeOp *pic16_popRegFromIdx(int rIdx) +{ + pCodeOp *pcop; + +// DEBUGpic16_emitcode ("; ***","%s,%d\trIdx=0x%x", __FUNCTION__,__LINE__,rIdx); +// fprintf(stderr, "%s:%d rIdx = 0x%0x\n", __FUNCTION__, __LINE__, rIdx); + + pcop = Safe_calloc(1,sizeof(pCodeOpReg) ); + PCOR(pcop)->rIdx = rIdx; + PCOR(pcop)->r = pic16_regWithIdx(rIdx); + if(!PCOR(pcop)->r) + PCOR(pcop)->r = pic16_allocWithIdx(rIdx); + + PCOR(pcop)->r->isFree = 0; + PCOR(pcop)->r->wasUsed = 1; + + pcop->type = PCOR(pcop)->r->pc_type; + + return pcop; +} + +/*---------------------------------------------------------------------------------*/ +/* pic16_popGet2 - a variant of pic16_popGet to handle two memory operand commands */ +/* VR 030601 */ +/*---------------------------------------------------------------------------------*/ +pCodeOp *pic16_popGet2(asmop *aop_src, asmop *aop_dst, int offset) +{ + pCodeOp2 *pcop2 = (pCodeOp2 *)pic16_newpCodeOp2( + pic16_popGet(aop_src, offset), pic16_popGet(aop_dst, offset)); + return PCOP(pcop2); +} + + + +/*--------------------------------------------------------------------------------.-*/ +/* pic16_popGet2p - a variant of pic16_popGet to handle two memory operand commands */ +/* VR 030601 , adapted by Hans Dorn */ +/*--------------------------------------------------------------------------------.-*/ +pCodeOp *pic16_popGet2p(pCodeOp *src, pCodeOp *dst) +{ + pCodeOp2 *pcop2; + pcop2 = (pCodeOp2 *)pic16_newpCodeOp2(src, dst); + return PCOP(pcop2); +} + +/*---------------------------------------------------------------------------------*/ +/* pic16_popCombine2 - combine two pCodeOpReg variables into one for use with */ +/* movff instruction */ +/*---------------------------------------------------------------------------------*/ +pCodeOp *pic16_popCombine2(pCodeOpReg *src, pCodeOpReg *dst, int noalloc) +{ + pCodeOp2 *pcop2 = (pCodeOp2 *)pic16_newpCodeOp2( + pic16_popCopyReg(src), pic16_popCopyReg(dst) ); + + return PCOP(pcop2); +} + + +/*-----------------------------------------------------------------*/ +/* pic16_popGet - asm operator to pcode operator conversion */ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_popGet (asmop *aop, int offset) //, bool bit16, bool dname) +{ +// char *s = buffer ; +// char *rs; + pCodeOp *pcop; + + FENTRY2; + + /* offset is greater than size then zero */ + +// if (offset > (aop->size - 1) && +// aop->type != AOP_LIT) +// return NULL; //zero; + + /* depending on type */ + switch (aop->type) { + case AOP_STA: + /* pCodeOp is already allocated from aopForSym */ + DEBUGpic16_emitcode(";---", "%d getting stack + offset %d\n", __LINE__, offset); + pcop = pic16_pCodeOpCopy(aop->aopu.stk.pop[offset]); + return (pcop); + + case AOP_ACC: + { + int rIdx = IDX_WREG; //aop->aopu.aop_reg[offset]->rIdx; + + fprintf(stderr, "%s:%d returning register AOP_ACC %s\n", __FILE__, __LINE__, aop->aopu.aop_str[offset]); + + DEBUGpic16_emitcode(";","%d\tAOP_ACC", __LINE__); + + pcop = Safe_calloc(1,sizeof(pCodeOpReg) ); + PCOR(pcop)->rIdx = rIdx; + PCOR(pcop)->r = pic16_typeRegWithIdx(rIdx, REG_SFR, 1); // pic16_regWithIdx(rIdx); + PCOR(pcop)->r->wasUsed=1; + PCOR(pcop)->r->isFree=0; + + PCOR(pcop)->instance = offset; + pcop->type = PCOR(pcop)->r->pc_type; +// DEBUGpic16_emitcode(";","%d register idx = %d name =%s",__LINE__,rIdx,rs); + return pcop; + + +// return pic16_popRegFromString(aop->aopu.aop_str[offset], aop->size, offset); +// return pic16_newpCodeOpRegFromStr(aop->aopu.aop_str[offset]); + +// assert( 0 ); + } + + case AOP_DIR: + DEBUGpic16_emitcode(";","%d\tAOP_DIR (name = %s)", __LINE__, aop->aopu.aop_dir); + return pic16_popRegFromString(aop->aopu.aop_dir, aop->size, offset, NULL); + +#if 0 + case AOP_PAGED: + DEBUGpic16_emitcode(";","%d\tAOP_DIR", __LINE__); + return pic16_popRegFromString(aop->aopu.aop_dir, aop->size, offset, NULL); +#endif + + case AOP_REG: + { + int rIdx; + +// debugf2("aop = %p\toffset = %d\n", aop, offset); +// assert (aop && aop->aopu.aop_reg[offset] != NULL); + rIdx = aop->aopu.aop_reg[offset]->rIdx; + + DEBUGpic16_emitcode(";","%d\tAOP_REG", __LINE__); + + pcop = Safe_calloc(1,sizeof(pCodeOpReg) ); +// pcop->type = PO_GPR_REGISTER; + PCOR(pcop)->rIdx = rIdx; + PCOR(pcop)->r = pic16_allocWithIdx( rIdx ); //pic16_regWithIdx(rIdx); + PCOR(pcop)->r->wasUsed=1; + PCOR(pcop)->r->isFree=0; + + PCOR(pcop)->instance = offset; + pcop->type = PCOR(pcop)->r->pc_type; + + DEBUGpic16_emitcode(";*+*", "%d\tAOP_REG type = %s", __LINE__, dumpPicOptype(pcop->type)); +// rs = aop->aopu.aop_reg[offset]->name; +// DEBUGpic16_emitcode(";","%d register idx = %d name = %s",__LINE__,rIdx,rs); + return pcop; + } + + case AOP_CRY: + DEBUGpic16_emitcode(";","%d\tAOP_CRY", __LINE__); + + pcop = pic16_newpCodeOpBit(aop->aopu.aop_dir,-1,1, PO_GPR_REGISTER); + PCOR(pcop)->instance = offset; + PCOR(pcop)->r = pic16_dirregWithName(aop->aopu.aop_dir); + //if(PCOR(pcop)->r == NULL) + //fprintf(stderr,"%d - couldn't find %s in allocated registers\n",__LINE__,aop->aopu.aop_dir); + return pcop; + + case AOP_LIT: + DEBUGpic16_emitcode(";","%d\tAOP_LIT", __LINE__); + return pic16_newpCodeOpLit(pic16aopLiteral (aop->aopu.aop_lit,offset)); + + case AOP_STR: + DEBUGpic16_emitcode(";","%d AOP_STR %s",__LINE__,aop->aopu.aop_str[offset]); + return pic16_newpCodeOpRegFromStr(aop->aopu.aop_str[offset]); + + /* + pcop = Safe_calloc(1,sizeof(pCodeOpReg) ); + PCOR(pcop)->r = pic16_allocRegByName(aop->aopu.aop_str[offset]); + PCOR(pcop)->rIdx = PCOR(pcop)->r->rIdx; + pcop->type = PCOR(pcop)->r->pc_type; + pcop->name = PCOR(pcop)->r->name; + + return pcop; + */ + + case AOP_PCODE: + DEBUGpic16_emitcode(";","pic16_popGet AOP_PCODE (%s) %d %s offset %d",pic16_pCodeOpType(aop->aopu.pcop), + __LINE__, + ((aop->aopu.pcop->name)? (aop->aopu.pcop->name) : "no name"), offset); + pcop = pic16_pCodeOpCopy(aop->aopu.pcop); + switch( aop->aopu.pcop->type ) { + case PO_DIR: PCOR(pcop)->instance += offset; break; + case PO_IMMEDIATE: PCOI(pcop)->offset = offset; break; + case PO_WREG: + assert (offset==0); + break; + default: + fprintf (stderr, "%s: unhandled aop->aopu.pcop->type %d\n", __FUNCTION__, aop->aopu.pcop->type); + assert( 0 ); /* should never reach here */; + } + return pcop; + } + + werror(E_INTERNAL_ERROR,__FILE__,__LINE__, + "pic16_popGet got unsupported aop->type"); + exit(0); +} +/*-----------------------------------------------------------------*/ +/* pic16_aopPut - puts a string for a aop */ +/*-----------------------------------------------------------------*/ +void pic16_aopPut (asmop *aop, char *s, int offset) +{ + char *d = buffer ; + symbol *lbl ; + + return; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if (aop->size && offset > ( aop->size - 1)) { + werror(E_INTERNAL_ERROR,__FILE__,__LINE__, + "pic16_aopPut got offset > aop->size"); + exit(0); + } + + /* will assign value to value */ + /* depending on where it is ofcourse */ + switch (aop->type) { + case AOP_DIR: + if (offset) { + sprintf(d,"(%s + %d)", + aop->aopu.aop_dir,offset); + fprintf(stderr,"oops pic16_aopPut:AOP_DIR did this %s\n",s); + + } else + sprintf(d,"%s",aop->aopu.aop_dir); + + if (strcmp(d,s)) { + DEBUGpic16_emitcode(";","%d",__LINE__); + if(strcmp(s,"W")) + pic16_emitcode("movf","%s,w",s); + pic16_emitcode("movwf","%s",d); + + if(strcmp(s,"W")) { + pic16_emitcode(";BUG!? should have this:movf","%s,w %d",s,__LINE__); + if(offset >= aop->size) { + pic16_emitpcode(POC_CLRF,pic16_popGet(aop,offset)); + break; + } else + pic16_emitpcode(POC_MOVLW,pic16_popGetImmd(s,offset,0)); + } + + pic16_emitpcode(POC_MOVWF,pic16_popGet(aop,offset)); + + + } + break; + + case AOP_REG: + if (strcmp(aop->aopu.aop_reg[offset]->name,s) != 0) { // && + //strcmp(aop->aopu.aop_reg[offset]->dname,s)!= 0){ + /* + if (*s == '@' || + strcmp(s,"r0") == 0 || + strcmp(s,"r1") == 0 || + strcmp(s,"r2") == 0 || + strcmp(s,"r3") == 0 || + strcmp(s,"r4") == 0 || + strcmp(s,"r5") == 0 || + strcmp(s,"r6") == 0 || + strcmp(s,"r7") == 0 ) + pic16_emitcode("mov","%s,%s ; %d", + aop->aopu.aop_reg[offset]->dname,s,__LINE__); + else + */ + + if(strcmp(s,"W")==0 ) + pic16_emitcode("movf","%s,w ; %d",s,__LINE__); + + pic16_emitcode("movwf","%s", + aop->aopu.aop_reg[offset]->name); + + if(strcmp(s,zero)==0) { + pic16_emitpcode(POC_CLRF,pic16_popGet(aop,offset)); + + } else if(strcmp(s,"W")==0) { + pCodeOp *pcop = Safe_calloc(1,sizeof(pCodeOpReg) ); + pcop->type = PO_GPR_REGISTER; + + PCOR(pcop)->rIdx = -1; + PCOR(pcop)->r = NULL; + + DEBUGpic16_emitcode(";","%d",__LINE__); + pcop->name = Safe_strdup(s); + pic16_emitpcode(POC_MOVFW,pcop); + pic16_emitpcode(POC_MOVWF,pic16_popGet(aop,offset)); + } else if(strcmp(s,one)==0) { + pic16_emitpcode(POC_CLRF,pic16_popGet(aop,offset)); + pic16_emitpcode(POC_INCF,pic16_popGet(aop,offset)); + } else { + pic16_emitpcode(POC_MOVWF,pic16_popGet(aop,offset)); + } + } + break; + + case AOP_STK: + if (strcmp(s,"a") == 0) + pic16_emitcode("push","acc"); + else + pic16_emitcode("push","%s",s); + + break; + + case AOP_CRY: + /* if bit variable */ + if (!aop->aopu.aop_dir) { + pic16_emitcode("clr","a"); + pic16_emitcode("rlc","a"); + } else { + if (s == zero) + pic16_emitcode("clr","%s",aop->aopu.aop_dir); + else + if (s == one) + pic16_emitcode("setb","%s",aop->aopu.aop_dir); + else + if (!strcmp(s,"c")) + pic16_emitcode("mov","%s,c",aop->aopu.aop_dir); + else { + lbl = newiTempLabel(NULL); + + if (strcmp(s,"a")) { + MOVA(s); + } + pic16_emitcode("clr","c"); + pic16_emitcode("jz","%05d_DS_",lbl->key+100); + pic16_emitcode("cpl","c"); + pic16_emitcode("","%05d_DS_:",lbl->key+100); + pic16_emitcode("mov","%s,c",aop->aopu.aop_dir); + } + } + break; + + case AOP_STR: + aop->coff = offset; + if (strcmp(aop->aopu.aop_str[offset],s)) + pic16_emitcode ("mov","%s,%s ; %d",aop->aopu.aop_str[offset],s,__LINE__); + break; + + case AOP_ACC: + aop->coff = offset; + if (!offset && (strcmp(s,"acc") == 0)) + break; + + if (strcmp(aop->aopu.aop_str[offset],s)) + pic16_emitcode ("mov","%s,%s ; %d",aop->aopu.aop_str[offset],s, __LINE__); + break; + + default : + fprintf(stderr, "%s:%d: unknown aop->type = 0x%x\n", __FILE__, __LINE__, aop->type); +// werror(E_INTERNAL_ERROR,__FILE__,__LINE__, +// "pic16_aopPut got unsupported aop->type"); +// exit(0); + } + +} + +/*-----------------------------------------------------------------*/ +/* pic16_mov2w - generate either a MOVLW or MOVFW based operand type */ +/*-----------------------------------------------------------------*/ +void pic16_mov2w (asmop *aop, int offset) +{ + DEBUGpic16_emitcode ("; ***","%s %d offset=%d",__FUNCTION__,__LINE__,offset); + + if(pic16_isLitAop(aop)) + pic16_emitpcode(POC_MOVLW,pic16_popGet(aop,offset)); + else + pic16_emitpcode(POC_MOVFW,pic16_popGet(aop,offset)); +} + +void pic16_mov2w_volatile (asmop *aop) +{ + int i; + + if(!pic16_isLitAop(aop)) { + // may need to protect this from the peepholer -- this is not nice but works... + pic16_addpCode2pBlock(pb, pic16_newpCodeAsmDir(";", "VOLATILE READ - BEGIN")); + for (i = 0; i < aop->size; i++) { + if (i > 0) { + pic16_addpCode2pBlock(pb, pic16_newpCodeAsmDir(";", "VOLATILE READ - MORE")); + } // if + pic16_emitpcode(POC_MOVFW, pic16_popGet(aop, i)); + } // for + pic16_addpCode2pBlock(pb, pic16_newpCodeAsmDir(";", "VOLATILE READ - END")); + } +} + +void pic16_mov2f(asmop *dst, asmop *src, int offset) +{ + if(pic16_isLitAop(src)) { + pic16_emitpcode(POC_MOVLW, pic16_popGet(src, offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(dst, offset)); + } else { + if(pic16_sameRegsOfs(src, dst, offset))return; + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( pic16_popGet(src, offset), + pic16_popGet(dst, offset))); + } +} + +static void pic16_movLit2f(pCodeOp *pc, int lit) +{ + if (0 == (lit & 0x00ff)) + { + pic16_emitpcode (POC_CLRF, pc); + } else if (0xff == (lit & 0x00ff)) + { + pic16_emitpcode (POC_SETF, pc); + } else { + pic16_emitpcode (POC_MOVLW, pic16_popGetLit (lit & 0x00ff)); + if (pc->type != PO_WREG) pic16_emitpcode (POC_MOVWF, pc); + } +} + +static void mov2fp(pCodeOp *dst, asmop *src, int offset) +{ + if(pic16_isLitAop(src)) { + pic16_emitpcode(POC_MOVLW, pic16_popGet(src, offset)); + pic16_emitpcode(POC_MOVWF, dst); + } else { + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popGet(src, offset), dst)); + } +} + +void pic16_testStackOverflow(void) +{ +#define GSTACK_TEST_NAME "_gstack_test" + + pic16_emitpcode(POC_CALL, pic16_popGetWithString( GSTACK_TEST_NAME )); + + { + symbol *sym; + + sym = newSymbol( GSTACK_TEST_NAME , 0 ); + sprintf(sym->rname, "%s", /*port->fun_prefix,*/ GSTACK_TEST_NAME); +// strcpy(sym->rname, GSTACK_TEST_NAME); + checkAddSym(&externs, sym); + } + +} + +/* push pcop into stack */ +void pic16_pushpCodeOp(pCodeOp *pcop) +{ +// DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if (pcop->type == PO_LITERAL) { + pic16_emitpcode(POC_MOVLW, pcop); + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg( pic16_stack_postdec )); + } else { + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pcop, pic16_popCopyReg( pic16_stack_postdec ))); + } + if(pic16_options.gstack) + pic16_testStackOverflow(); + +} + +/* pop pcop from stack */ +void pic16_poppCodeOp(pCodeOp *pcop) +{ + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popCopyReg( pic16_stack_preinc ), pcop)); + if(pic16_options.gstack) + pic16_testStackOverflow(); +} + + +/*-----------------------------------------------------------------*/ +/* pushw - pushes wreg to stack */ +/*-----------------------------------------------------------------*/ +void pushw(void) +{ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg( pic16_stack_postdec )); + if(pic16_options.gstack) + pic16_testStackOverflow(); +} + + +/*-----------------------------------------------------------------*/ +/* pushaop - pushes aop to stack */ +/*-----------------------------------------------------------------*/ +void pushaop(asmop *aop, int offset) +{ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if(_G.resDirect)return; + + if(pic16_isLitAop(aop)) { + pic16_emitpcode(POC_MOVLW, pic16_popGet(aop, offset)); + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg( pic16_stack_postdec )); + } else { + pic16_emitpcode(POC_MOVFF, + pic16_popGet2p(pic16_popGet(aop, offset), pic16_popCopyReg( pic16_stack_postdec ))); + } + + if(pic16_options.gstack) + pic16_testStackOverflow(); +} + +/*-----------------------------------------------------------------*/ +/* popaop - pops aop from stack */ +/*-----------------------------------------------------------------*/ +void popaop(asmop *aop, int offset) +{ + DEBUGpic16_emitcode("; ***", "%s %d", __FUNCTION__, __LINE__); + pic16_emitpcode(POC_MOVFF, pic16_popCombine2(pic16_stack_preinc, PCOR(pic16_popGet(aop, offset)), 0)); + if(pic16_options.gstack) + pic16_testStackOverflow(); +} + +void popaopidx(asmop *aop, int offset, int index) +{ + int ofs=1; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if(STACK_MODEL_LARGE)ofs++; + + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(index + ofs)); + pic16_emitpcode(POC_MOVFF, pic16_popCombine2(pic16_frame_plusw, PCOR(pic16_popGet(aop, offset)), 0)); + if(pic16_options.gstack) + pic16_testStackOverflow(); +} + +/*-----------------------------------------------------------------*/ +/* pic16_getDataSize - get the operand data size */ +/*-----------------------------------------------------------------*/ +int pic16_getDataSize(operand *op) +{ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + + return AOP_SIZE(op); + + // tsd- in the pic port, the genptr size is 1, so this code here + // fails. ( in the 8051 port, the size was 4). +#if 0 + int size; + size = AOP_SIZE(op); + if (size == GPTRSIZE) + { + sym_link *type = operandType(op); + if (IS_GENPTR(type)) + { + /* generic pointer; arithmetic operations + * should ignore the high byte (pointer type). + */ + size--; + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + } + } + return size; +#endif +} + +/*-----------------------------------------------------------------*/ +/* pic16_outAcc - output Acc */ +/*-----------------------------------------------------------------*/ +void pic16_outAcc(operand *result) +{ + int size,offset; + DEBUGpic16_emitcode ("; ***","%s %d - ",__FUNCTION__,__LINE__); + DEBUGpic16_pic16_AopType(__LINE__,NULL,NULL,result); + + + size = pic16_getDataSize(result); + if(size){ + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),0)); + size--; + offset = 1; + /* unsigned or positive */ + while(size--) + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),offset++)); + } + +} + +/*-----------------------------------------------------------------*/ +/* pic16_outBitC - output a bit C */ +/* Move to result the value of Carry flag -- VR */ +/*-----------------------------------------------------------------*/ +void pic16_outBitC(operand *result) +{ + int i; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + /* if the result is bit */ + if (AOP_TYPE(result) == AOP_CRY) { + fprintf(stderr, "%s:%d: pic16 port warning: unsupported case\n", __FILE__, __LINE__); + pic16_aopPut(AOP(result),"c",0); + } else { + + i = AOP_SIZE(result); + while(i--) { + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result), i)); + } + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result), 0)); + } +} + +/*-----------------------------------------------------------------*/ +/* pic16_outBitOp - output a bit from Op */ +/* Move to result the value of set/clr op -- VR */ +/*-----------------------------------------------------------------*/ +void pic16_outBitOp(operand *result, pCodeOp *pcop) +{ + int i; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + /* if the result is bit */ + if (AOP_TYPE(result) == AOP_CRY) { + fprintf(stderr, "%s:%d: pic16 port warning: unsupported case\n", __FILE__, __LINE__); + pic16_aopPut(AOP(result),"c",0); + } else { + + i = AOP_SIZE(result); + while(i--) { + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result), i)); + } + pic16_emitpcode(POC_RRCF, pcop); + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result), 0)); + } +} + +/*-----------------------------------------------------------------*/ +/* pic16_toBoolean - emit code for orl a,operator(sizeop) */ +/*-----------------------------------------------------------------*/ +void pic16_toBoolean(operand *oper) +{ + int size = AOP_SIZE(oper) - 1; + int offset = 1; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if ( AOP_TYPE(oper) != AOP_ACC) { + pic16_emitpcode(POC_MOVFW,pic16_popGet(AOP(oper),0)); + } + while (size--) { + pic16_emitpcode(POC_IORFW, pic16_popGet(AOP(oper),offset++)); + } +} + +/*-----------------------------------------------------------------*/ +/* genUminusFloat - unary minus for floating points */ +/*-----------------------------------------------------------------*/ +static void genUminusFloat(operand *op,operand *result) +{ + int size ,offset =0 ; + + FENTRY; + /* for this we just need to flip the + first it then copy the rest in place */ + size = AOP_SIZE(op); + assert( size == AOP_SIZE(result) ); + + while(size--) { + pic16_mov2f(AOP(result), AOP(op), offset); + offset++; + } + + /* toggle the MSB's highest bit */ + pic16_emitpcode(POC_BTG, pic16_popCopyGPR2Bit(pic16_popGet(AOP(result), offset-1), 7)); +} + +/*-----------------------------------------------------------------*/ +/* genUminus - unary minus code generation */ +/*-----------------------------------------------------------------*/ +static void genUminus (iCode *ic) +{ + int lsize, rsize, i; + sym_link *optype, *rtype; + symbol *label; + int needLabel=0; + + FENTRY; + + /* assign asmops */ + pic16_aopOp(IC_LEFT(ic),ic,FALSE); + pic16_aopOp(IC_RESULT(ic),ic,TRUE); + + /* if both in bit space then special case */ + if (AOP_TYPE(IC_RESULT(ic)) == AOP_CRY + && AOP_TYPE(IC_LEFT(ic)) == AOP_CRY ) { + + pic16_emitpcode(POC_BCF, pic16_popGet(AOP(IC_RESULT(ic)),0)); + pic16_emitpcode(POC_BTFSS, pic16_popGet(AOP(IC_LEFT(ic)),0)); + pic16_emitpcode(POC_BSF, pic16_popGet(AOP(IC_RESULT(ic)),0)); + goto release; + } + + optype = operandType(IC_LEFT(ic)); + rtype = operandType(IC_RESULT(ic)); + + + /* if float then do float stuff */ + if (IS_FLOAT(optype) || IS_FIXED(optype)) { + if(IS_FIXED(optype)) + debugf("implement fixed16x16 type\n", 0); + + genUminusFloat(IC_LEFT(ic),IC_RESULT(ic)); + goto release; + } + + /* otherwise subtract from zero by taking the 2's complement */ + lsize = AOP_SIZE(IC_LEFT(ic)); + rsize = AOP_SIZE(IC_RESULT(ic)); + label = newiTempLabel ( NULL ); + + if (pic16_sameRegs (AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic)))) { + /* If the result is longer than the operand, + store sign extension (0x00 or 0xff) in W */ + if (rsize > lsize) { + pic16_emitpcode (POC_MOVLW, pic16_popGetLit(0x00)); + pic16_emitpcode (POC_BTFSS, pic16_popCopyGPR2Bit(pic16_popGet(AOP(IC_LEFT(ic)), lsize-1), 7)); + pic16_emitpcode (POC_MOVLW, pic16_popGetLit(0xFF)); + } + for (i = rsize - 1; i > 0; --i) { + if (i > lsize - 1) { + pic16_emitpcode (POC_MOVWF, pic16_popGet (AOP(IC_RESULT(ic)), i)); + } else { + pic16_emitpcode (POC_COMF, pic16_popGet (AOP(IC_RESULT(ic)), i)); + } // if + } // for + pic16_emitpcode (POC_NEGF, pic16_popGet (AOP(IC_RESULT(ic)), 0)); + for (i = 1; i < rsize; ++i) { + if (i == rsize - 1) { + emitSKPNZ; + } else { + pic16_emitpcode (POC_BNZ, pic16_popGetLabel (label->key)); needLabel++; + } + pic16_emitpcode (POC_INCF, pic16_popGet (AOP(IC_RESULT(ic)), i)); + } // for + } else { + for (i = min(rsize, lsize) - 1; i >= 0; i--) { + pic16_emitpcode (POC_COMFW, pic16_popGet (AOP(IC_LEFT(ic)), i)); + pic16_emitpcode (POC_MOVWF, pic16_popGet (AOP(IC_RESULT(ic)), i)); + } // for + /* Sign extend if the result is longer than the operand */ + if (rsize > lsize) { + pic16_emitpcode (POC_MOVLW, pic16_popGetLit(0x00)); + pic16_emitpcode (POC_BTFSC, pic16_popCopyGPR2Bit(pic16_popGet(AOP(IC_RESULT(ic)), lsize - 1), 7)); + pic16_emitpcode (POC_MOVLW, pic16_popGetLit(0xFF)); + for (i = rsize - 1; i > lsize - 1; --i) { + pic16_emitpcode (POC_MOVWF, pic16_popGet (AOP(IC_RESULT(ic)), i)); + } // for + } // if + if (rsize > 1) { + for (i = 0; i < rsize - 2; i++) { + pic16_emitpcode (POC_INCF, pic16_popGet (AOP(IC_RESULT(ic)),i)); + pic16_emitpcode (POC_BNZ, pic16_popGetLabel (label->key)); + needLabel++; + } // for + pic16_emitpcode (POC_INFSNZ, pic16_popGet (AOP(IC_RESULT(ic)), rsize - 2)); + } // if + pic16_emitpcode (POC_INCF, pic16_popGet(AOP(IC_RESULT(ic)), rsize - 1)); + } + if (needLabel) + pic16_emitpLabel (label->key); + +release: + /* release the aops */ + pic16_freeAsmop(IC_LEFT(ic), NULL, ic, (RESULTONSTACK(ic) ? 0 : 1)); + pic16_freeAsmop(IC_RESULT(ic), NULL, ic, TRUE); +} + +void pic16_loadFromReturn(operand *op, int offset, pCodeOp *src) +{ + if((AOP(op)->type == AOP_PCODE) && (AOP(op)->aopu.pcop->type == PO_IMMEDIATE)) { + pic16_emitpcode(POC_MOVFW, src); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(op), offset)); + } else { + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + src, pic16_popGet(AOP(op), offset))); + } +} + + +/*-----------------------------------------------------------------*/ +/* assignResultValue - assign results to oper, rescall==1 is */ +/* called from genCall() or genPcall() */ +/*-----------------------------------------------------------------*/ +static void assignResultValue(operand * oper, int res_size, int rescall) +{ + int size = AOP_SIZE(oper); + int offset=0; + + FENTRY2; +// DEBUGpic16_emitcode ("; ***","%s %d rescall:%d size:%d",__FUNCTION__,__LINE__,rescall,size); // patch 14 + DEBUGpic16_pic16_AopType(__LINE__,oper,NULL,NULL); + + if(rescall) { + /* assign result from a call/pcall function() */ + + /* function results are stored in a special order, + * see top of file with Function return policy, or manual */ + + if(size <= 4) { + /* 8-bits, result in WREG */ + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(oper), 0)); + + if(size > 1 && res_size > 1) { + /* 16-bits, result in PRODL:WREG */ + pic16_loadFromReturn(oper, 1, pic16_popCopyReg(&pic16_pc_prodl)); + } + + if(size > 2 && res_size > 2) { + /* 24-bits, result in PRODH:PRODL:WREG */ + pic16_loadFromReturn(oper, 2, pic16_popCopyReg(&pic16_pc_prodh)); // patch 14 + } + + if(size > 3 && res_size > 3) { + /* 32-bits, result in FSR0L:PRODH:PRODL:WREG */ + pic16_loadFromReturn(oper, 3, pic16_popCopyReg(&pic16_pc_fsr0l)); // patch14 + } + + pic16_addSign(oper, res_size, IS_UNSIGNED(operandType(oper))); + + } else { + /* >32-bits, result on stack, and FSR0 points to beginning. + * Fix stack when done */ + /* FIXME FIXME */ +// debugf("WARNING: Possible bug when returning more than 4-bytes\n"); + while (size--) { +// DEBUGpic16_emitcode("; ", "POC_MOVLW %d", GpsuedoStkPtr); +// DEBUGpic16_emitcode("; ", "POC_MOVFW PLUSW2"); + + popaopidx(AOP(oper), size, GpsuedoStkPtr); + GpsuedoStkPtr++; + } + + /* fix stack */ + pic16_emitpcode(POC_MOVLW, pic16_popGetLit( AOP_SIZE(oper) )); + pic16_emitpcode(POC_ADDWF, pic16_popCopyReg( pic16_stackpnt_lo )); //&pic16_pc_fsr1l )); + if(STACK_MODEL_LARGE) { + emitSKPNC; + pic16_emitpcode(POC_INCF, pic16_popCopyReg( pic16_stackpnt_hi )); //&pic16_pc_fsr1h )); + } + } + } else { + int areg = 0; /* matching argument register */ + +// debugf("_G.useWreg = %d\tGpsuedoStkPtr = %d\n", _G.useWreg, GpsuedoStkPtr); + areg = SPEC_ARGREG( OP_SYM_ETYPE( oper ) ) - 1; + + + /* its called from genReceive (probably) -- VR */ + /* I hope this code will not be called from somewhere else in the future! + * We manually set the pseudo stack pointer in genReceive. - dw + */ + if(!GpsuedoStkPtr && _G.useWreg) { +// DEBUGpic16_emitcode("; ", "pop %d", GpsuedoStkPtr); + + /* The last byte in the assignment is in W */ + if(areg <= GpsuedoStkPtr) { + size--; + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(oper), offset /*size*/)); + offset++; +// debugf("receive from WREG\n", 0); + } + GpsuedoStkPtr++; /* otherwise the calculation below fails (-_G.useWreg) */ + } +// GpsuedoStkPtr++; + _G.stack_lat = AOP_SIZE(oper)-1; + + while (size) { + size--; + GpsuedoStkPtr++; + popaopidx(AOP(oper), offset, GpsuedoStkPtr - _G.useWreg); +// debugf("receive from STACK\n", 0); + offset++; + } + } +} + + +/*-----------------------------------------------------------------*/ +/* genIpush - generate code for pushing this gets a little complex */ +/*-----------------------------------------------------------------*/ +static void genIpush (iCode *ic) +{ +// int size, offset=0; + + FENTRY; + DEBUGpic16_emitcode ("; ***","%s %d - WARNING no code generated",__FUNCTION__,__LINE__); + + if(ic->parmPush) { + pic16_aopOp(IC_LEFT(ic), ic, FALSE ); + + /* send to stack as normal */ + addSet(&_G.sendSet,ic); +// addSetHead(&_G.sendSet,ic); + pic16_freeAsmop(IC_LEFT(ic),NULL,ic,TRUE); + } + + +#if 0 + int size, offset = 0 ; + char *l; + + + /* if this is not a parm push : ie. it is spill push + and spill push is always done on the local stack */ + if (!ic->parmPush) { + + /* and the item is spilt then do nothing */ + if (OP_SYMBOL(IC_LEFT(ic))->isspilt) + return ; + + pic16_aopOp(IC_LEFT(ic),ic,FALSE); + size = AOP_SIZE(IC_LEFT(ic)); + /* push it on the stack */ + while(size--) { + l = pic16_aopGet(AOP(IC_LEFT(ic)),offset++,FALSE,TRUE); + if (*l == '#') { + MOVA(l); + l = "acc"; + } + pic16_emitcode("push","%s",l); + } + return ; + } + + pic16_freeAsmop(IC_LEFT(ic),NULL,ic,TRUE); +#endif +} + +/*-----------------------------------------------------------------*/ +/* genIpop - recover the registers: can happen only for spilling */ +/*-----------------------------------------------------------------*/ +static void genIpop (iCode *ic) +{ + FENTRY; + DEBUGpic16_emitcode ("; ***","%s %d - WARNING no code generated",__FUNCTION__,__LINE__); +#if 0 + int size,offset ; + + + /* if the temp was not pushed then */ + if (OP_SYMBOL(IC_LEFT(ic))->isspilt) + return ; + + pic16_aopOp(IC_LEFT(ic),ic,FALSE); + size = AOP_SIZE(IC_LEFT(ic)); + offset = (size-1); + while (size--) + pic16_emitcode("pop","%s",pic16_aopGet(AOP(IC_LEFT(ic)),offset--, + FALSE,TRUE)); + + pic16_freeAsmop(IC_LEFT(ic),NULL,ic,TRUE); +#endif +} + +static int wparamCmp(void *p1, void *p2) +{ + return (!strcmp((char *)p1, (char *)p2)); +} + +int inWparamList(char *s) +{ + return isinSetWith(wparamList, s, wparamCmp); +} + + +/*-----------------------------------------------------------------*/ +/* genCall - generates a call statement */ +/*-----------------------------------------------------------------*/ +static void genCall (iCode *ic) +{ + sym_link *ftype; + int stackParms=0; + int use_wreg=0; + int inwparam=0; + char *fname; + + FENTRY; + + ftype = OP_SYM_TYPE(IC_LEFT(ic)); + /* if caller saves & we have not saved then */ +// if (!ic->regsSaved) +// saveRegisters(ic); + + /* initialise stackParms for IPUSH pushes */ +// stackParms = psuedoStkPtr; +// fprintf(stderr, "%s:%d ic parmBytes = %d\n", __FILE__, __LINE__, ic->parmBytes); + fname = OP_SYMBOL(IC_LEFT(ic))->rname[0]?OP_SYMBOL(IC_LEFT(ic))->rname:OP_SYMBOL(IC_LEFT(ic))->name; + inwparam = (inWparamList(OP_SYMBOL(IC_LEFT(ic))->name)) || (FUNC_ISWPARAM(OP_SYM_TYPE(IC_LEFT(ic)))); + +#if 0 + gpsimDebug_StackDump(__FILE__, __LINE__, fname ); +#endif + + /* if send set is not empty the assign */ + if (_G.sendSet) { + iCode *sic; + int psuedoStkPtr=-1; + int firstTimeThruLoop = 1; + + + /* reverse sendSet if function is not reentrant */ + if(!IFFUNC_ISREENT(ftype)) + _G.sendSet = reverseSet(_G.sendSet); + + /* First figure how many parameters are getting passed */ + stackParms = 0; + use_wreg = 0; + + for (sic = setFirstItem(_G.sendSet) ; sic ; sic = setNextItem(_G.sendSet)) { + int size; +// int offset = 0; + + pic16_aopOp(IC_LEFT(sic),sic,FALSE); + size = AOP_SIZE(IC_LEFT(sic)); + + stackParms += size; + + /* pass the last byte through WREG */ + if(inwparam) { + + while (size--) { + DEBUGpic16_emitcode ("; ","%d left %s",__LINE__, + pic16_AopType(AOP_TYPE(IC_LEFT(sic)))); + DEBUGpic16_emitcode("; ", "push %d", psuedoStkPtr-1); + + if(!firstTimeThruLoop) { + /* If this is not the first time we've been through the loop + * then we need to save the parameter in a temporary + * register. The last byte of the last parameter is + * passed in W. */ + + pushw(); +// --psuedoStkPtr; // sanity check + use_wreg = 1; + } + + firstTimeThruLoop=0; + + pic16_mov2w (AOP(IC_LEFT(sic)), size); + +// offset++; + } + } else { + /* all arguments are passed via stack */ + use_wreg = 0; + + while (size--) { + DEBUGpic16_emitcode ("; ","%d left %s",__LINE__, + pic16_AopType(AOP_TYPE(IC_LEFT(sic)))); + DEBUGpic16_emitcode("; ", "push %d", psuedoStkPtr-1); + +// pushaop(AOP(IC_LEFT(sic)), size); + pic16_mov2w( AOP(IC_LEFT(sic)), size ); + + if(!_G.resDirect) + pushw(); + } + } + + pic16_freeAsmop (IC_LEFT(sic),NULL,sic,TRUE); + } + + if(inwparam) { + if(IFFUNC_HASVARARGS(ftype) || IFFUNC_ISREENT(ftype)) { + pushw(); /* save last parameter to stack if functions has varargs */ + use_wreg = 0; + } else + use_wreg = 1; + } else use_wreg = 0; + + _G.stackRegSet = _G.sendSet; + _G.sendSet = NULL; + } + + /* make the call */ + pic16_emitpcode(POC_CALL,pic16_popGetWithString(fname)); + + GpsuedoStkPtr=0; + + /* if we need to assign a result value */ + if ((IS_ITEMP(IC_RESULT(ic)) + && (OP_SYMBOL(IC_RESULT(ic))->nRegs + || OP_SYMBOL(IC_RESULT(ic))->spildir )) + || IS_TRUE_SYMOP(IC_RESULT(ic)) ) { + + _G.accInUse++; + pic16_aopOp(IC_RESULT(ic),ic,FALSE); + _G.accInUse--; + + /* Must not assign an 8-bit result to a 16-bit variable; + * this would use (used...) the uninitialized PRODL! */ + /* FIXME: Need a proper way to obtain size of function result type, + * OP_SYM_ETYPE does not work: it dereferences pointer types! */ + assignResultValue(IC_RESULT(ic), getSize(OP_SYM_TYPE(IC_LEFT(ic))->next), 1); + + DEBUGpic16_emitcode ("; ","%d left %s",__LINE__, + pic16_AopType(AOP_TYPE(IC_RESULT(ic)))); + + pic16_freeAsmop(IC_RESULT(ic),NULL, ic,TRUE); + } + + if(!stackParms && ic->parmBytes) { + stackParms = ic->parmBytes; + } + + stackParms -= use_wreg; + + if(stackParms>0) { + if(stackParms == 1) { + pic16_emitpcode(POC_INCF, pic16_popCopyReg(pic16_stackpnt_lo )); //&pic16_pc_fsr1l)); + } else { + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(stackParms)); + pic16_emitpcode(POC_ADDWF, pic16_popCopyReg( pic16_stackpnt_lo )); //&pic16_pc_fsr1l )); + } + if(STACK_MODEL_LARGE) { + emitSKPNC; + pic16_emitpcode(POC_INCF, pic16_popCopyReg( pic16_stackpnt_hi )); //&pic16_pc_fsr1h )); + } + } + +#if 0 + gpsimDebug_StackDump(__FILE__, __LINE__, fname); +#endif + + /* adjust the stack for parameters if required */ +// fprintf(stderr, "%s:%d: %s ic->parmBytes= %d\n", __FILE__, __LINE__, OP_SYMBOL(IC_LEFT(ic))->name, ic->parmBytes); + +#if 0 + /* if register bank was saved then pop them */ + if (ic->bankSaved) + unsaverbank(FUNC_REGBANK(dtype),ic,TRUE); + + /* if we hade saved some registers then unsave them */ + if (ic->regsSaved && !IFFUNC_CALLEESAVES(dtype)) + unsaveRegisters (ic); +#endif +} + + + +/*-----------------------------------------------------------------*/ +/* genPcall - generates a call by pointer statement */ +/* new version, created from genCall - HJD */ +/*-----------------------------------------------------------------*/ +static void genPcall (iCode *ic) +{ + sym_link *fntype; + int stackParms=0; + symbol *retlbl = newiTempLabel(NULL); + pCodeOp *pcop_lbl = pic16_popGetLabel(retlbl->key); + + FENTRY; + + fntype = operandType( IC_LEFT(ic) )->next; + + /* if send set is not empty the assign */ + if (_G.sendSet) { + iCode *sic; + int psuedoStkPtr=-1; + + /* reverse sendSet if function is not reentrant */ + if(!IFFUNC_ISREENT(fntype)) + _G.sendSet = reverseSet(_G.sendSet); + + stackParms = 0; + + for (sic = setFirstItem(_G.sendSet) ; sic ; sic = setNextItem(_G.sendSet)) { + int size; + + pic16_aopOp(IC_LEFT(sic),sic,FALSE); + size = AOP_SIZE(IC_LEFT(sic)); + stackParms += size; + + /* all parameters are passed via stack, since WREG is clobbered + * by the calling sequence */ + while (size--) { + DEBUGpic16_emitcode ("; ","%d left %s",__LINE__, + pic16_AopType(AOP_TYPE(IC_LEFT(sic)))); + DEBUGpic16_emitcode("; ", "push %d", psuedoStkPtr-1); + + pic16_mov2w (AOP(IC_LEFT(sic)), size); + pushw(); + } + + pic16_freeAsmop (IC_LEFT(sic),NULL,sic,TRUE); + } + + _G.stackRegSet = _G.sendSet; + _G.sendSet = NULL; + } + + pic16_aopOp(IC_LEFT(ic),ic,FALSE); + + // push return address + // push $ on return stack, then replace with retlbl + + /* Thanks to Thorsten Klose for pointing out that the following + * snippet should be interrupt safe */ + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popCopyReg(&pic16_pc_intcon), pic16_popCopyReg(&pic16_pc_postdec1))); + pic16_emitpcode(POC_BCF, pic16_popCopyGPR2Bit(pic16_popCopyReg(&pic16_pc_intcon), 7)); + + pic16_emitpcodeNULLop(POC_PUSH); + + pic16_emitpcode(POC_MOVLW, pic16_popGetImmd(pcop_lbl->name, 0, 0)); + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg(&pic16_pc_tosl)); + pic16_emitpcode(POC_MOVLW, pic16_popGetImmd(pcop_lbl->name, 1, 0)); + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg(&pic16_pc_tosh)); + pic16_emitpcode(POC_MOVLW, pic16_popGetImmd(pcop_lbl->name, 2, 0)); + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg(&pic16_pc_tosu)); + + + /* restore interrupt control register */ + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(&pic16_pc_preinc1)); + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg(&pic16_pc_intcon)); + + /* make the call by writing the pointer into pc */ + mov2fp(pic16_popCopyReg(&pic16_pc_pclatu), AOP(IC_LEFT(ic)), 2); + mov2fp(pic16_popCopyReg(&pic16_pc_pclath), AOP(IC_LEFT(ic)), 1); + + // note: MOVFF to PCL not allowed + pic16_mov2w(AOP(IC_LEFT(ic)), 0); + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg(&pic16_pc_pcl)); + + + /* return address is here: (X) */ + pic16_emitpLabelFORCE(retlbl->key); + + pic16_freeAsmop (IC_LEFT(ic),NULL,ic,TRUE); + + GpsuedoStkPtr=0; + /* if we need assign a result value */ + if ((IS_ITEMP(IC_RESULT(ic)) + && (OP_SYMBOL(IC_RESULT(ic))->nRegs + || OP_SYMBOL(IC_RESULT(ic))->spildir )) + || IS_TRUE_SYMOP(IC_RESULT(ic)) ) { + + _G.accInUse++; + pic16_aopOp(IC_RESULT(ic),ic,FALSE); + _G.accInUse--; + + /* FIXME: Need proper way to obtain the function result's type. + * OP_SYM_TYPE(IC_LEFT(ic))->next does not work --> points to function pointer */ + assignResultValue(IC_RESULT(ic), getSize(OP_SYM_TYPE(IC_LEFT(ic))->next->next), 1); + + DEBUGpic16_emitcode ("; ","%d left %s",__LINE__, + pic16_AopType(AOP_TYPE(IC_RESULT(ic)))); + + pic16_freeAsmop(IC_RESULT(ic),NULL, ic,TRUE); + } + +// stackParms -= use_wreg; + + if(stackParms>0) { + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(stackParms)); + pic16_emitpcode(POC_ADDWF, pic16_popCopyReg( pic16_stackpnt_lo )); + if(STACK_MODEL_LARGE) { + emitSKPNC; + pic16_emitpcode(POC_INCF, pic16_popCopyReg( pic16_stackpnt_hi )); + } + } +} + +/*-----------------------------------------------------------------*/ +/* resultRemat - result is rematerializable */ +/*-----------------------------------------------------------------*/ +static int resultRemat (iCode *ic) +{ + // DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if (SKIP_IC(ic) || ic->op == IFX) + return 0; + + if (IC_RESULT(ic) && IS_ITEMP(IC_RESULT(ic))) { + symbol *sym = OP_SYMBOL(IC_RESULT(ic)); + if (sym->remat && !POINTER_SET(ic)) + return 1; + } + + return 0; +} + +#if 0 +/*-----------------------------------------------------------------*/ +/* inExcludeList - return 1 if the string is in exclude Reg list */ +/*-----------------------------------------------------------------*/ +static bool inExcludeList(char *s) +{ + DEBUGpic16_emitcode ("; ***","%s %d - WARNING no code generated",__FUNCTION__,__LINE__); + int i =0; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if (options.excludeRegs[i] && + STRCASECMP(options.excludeRegs[i],"none") == 0) + return FALSE ; + + for ( i = 0 ; options.excludeRegs[i]; i++) { + if (options.excludeRegs[i] && + STRCASECMP(s,options.excludeRegs[i]) == 0) + return TRUE; + } + return FALSE ; +} +#endif + +/*-----------------------------------------------------------------*/ +/* genFunction - generated code for function entry */ +/*-----------------------------------------------------------------*/ +static void genFunction (iCode *ic) +{ + symbol *sym; + sym_link *ftype; + + FENTRY; + DEBUGpic16_emitcode ("; ***","%s %d curr label offset=%dprevious max_key=%d ",__FUNCTION__,__LINE__,pic16_labelOffset,max_key); + + pic16_labelOffset += (max_key+4); + max_key=0; + GpsuedoStkPtr=0; + _G.nRegsSaved = 0; + + ftype = operandType(IC_LEFT(ic)); + sym = OP_SYMBOL(IC_LEFT(ic)); + + if(IFFUNC_ISISR(sym->type /*ftype*/)) { + /* create an absolute section at the interrupt vector: + * that is 0x0008 for interrupt 1 (high), 0x0018 interrupt 2 (low) */ + symbol *asym; + char asymname[128]; + pBlock *apb; + +// debugf("interrupt number: %hhi\n", FUNC_INTNO(sym->type)); + + if(FUNC_INTNO(sym->type) == INTNO_UNSPEC) + sprintf(asymname, "ivec_%s", sym->name); + else + sprintf(asymname, "ivec_0x%x_%s", FUNC_INTNO(sym->type), sym->name); + + /* when an interrupt is declared as naked, do not emit the special + * wrapper segment at vector address. The user should take care for + * this instead. -- VR */ + + if(!IFFUNC_ISNAKED(ftype) && (FUNC_INTNO(sym->type) != INTNO_UNSPEC)) { + asym = newSymbol(asymname, 0); + apb = pic16_newpCodeChain(NULL, 'A', pic16_newpCodeCharP("; Starting pCode block for absolute section")); + pic16_addpBlock( apb ); + + pic16_addpCode2pBlock(apb, pic16_newpCodeCharP(";-----------------------------------------")); + pic16_addpCode2pBlock(apb, pic16_newpCodeFunction(moduleName, asym->name)); + //pic16_addpCode2pBlock(apb, pic16_newpCode(POC_GOTO, pic16_popGetWithString( sym->rname ))); + //pic16_addpCode2pBlock(apb, pic16_newpCode(POC_GOTO, pic16_newpCodeOpLabel (sym->rname, 0))); + pic16_addpCode2pBlock(apb, pic16_newpCodeAsmDir ("GOTO", "%s", sym->rname)); /* this suppresses a warning in LinkFlow */ + + /* mark the end of this tiny function */ + pic16_addpCode2pBlock(apb,pic16_newpCodeFunction(NULL,NULL)); + } else { + sprintf(asymname, "%s", sym->rname); + } + + { + absSym *abSym; + + abSym = Safe_calloc(1, sizeof(absSym)); + strcpy(abSym->name, asymname); + + switch( FUNC_INTNO(sym->type) ) { + case 0: abSym->address = 0x000000; break; + case 1: abSym->address = 0x000008; break; + case 2: abSym->address = 0x000018; break; + + default: +// fprintf(stderr, "no interrupt number is given\n"); + abSym->address = -1; break; + } + + /* relocate interrupt vectors if needed */ + if(abSym->address != -1) + abSym->address += pic16_options.ivt_loc; + + addSet(&absSymSet, abSym); + } + } + + /* create the function header */ + pic16_emitcode(";","-----------------------------------------"); + pic16_emitcode(";"," function %s",sym->name); + pic16_emitcode(";","-----------------------------------------"); + + /* prevent this symbol from being emitted as 'extern' */ + pic16_stringInSet(sym->rname, &pic16_localFunctions, 1); + + pic16_emitcode("","%s:",sym->rname); + pic16_addpCode2pBlock(pb,pic16_newpCodeFunction(moduleName,sym->rname)); + + { + absSym *ab; + + for(ab = setFirstItem(absSymSet); ab; ab = setNextItem(absSymSet)) { + if(!strcmp(ab->name, sym->rname)) { + pic16_pBlockConvert2Absolute(pb); + break; + } + } + } + + if(IFFUNC_ISNAKED(ftype)) { + DEBUGpic16_emitcode("; ***", "_naked function, no prologue"); + return; + } + + /* if critical function then turn interrupts off */ + if (IFFUNC_ISCRITICAL(ftype)) { + //pic16_emitcode("clr","ea"); + } + + currFunc = sym; /* update the currFunc symbol */ + _G.fregsUsed = sym->regsUsed; + _G.sregsAlloc = newBitVect(128); + + + /* if this is an interrupt service routine then + * save wreg, status, bsr, prodl, prodh, fsr0l, fsr0h */ + if (IFFUNC_ISISR(sym->type)) { + _G.usefastretfie = 1; /* use shadow registers by default */ + + /* an ISR should save: WREG, STATUS, BSR, PRODL, PRODH, FSR0L, FSR0H */ + if(!FUNC_ISSHADOWREGS(sym->type)) { + /* do not save WREG,STATUS,BSR for high priority interrupts + * because they are stored in the hardware shadow registers already */ + _G.usefastretfie = 0; + pic16_pushpCodeOp( pic16_popCopyReg( &pic16_pc_wreg )); + pic16_pushpCodeOp( pic16_popCopyReg( &pic16_pc_status )); + pic16_pushpCodeOp( pic16_popCopyReg( &pic16_pc_bsr )); + } + + /* these should really be optimized somehow, because not all + * interrupt handlers modify them */ + pic16_pushpCodeOp( pic16_popCopyReg( &pic16_pc_prodl )); + pic16_pushpCodeOp( pic16_popCopyReg( &pic16_pc_prodh )); + pic16_pushpCodeOp( pic16_popCopyReg( &pic16_pc_fsr0l )); + pic16_pushpCodeOp( pic16_popCopyReg( &pic16_pc_fsr0h )); + pic16_pushpCodeOp( pic16_popCopyReg( &pic16_pc_pclath )); + pic16_pushpCodeOp( pic16_popCopyReg( &pic16_pc_pclatu )); + +// pic16_pBlockConvert2ISR(pb); + } + + /* emit code to setup stack frame if user enabled, + * and function is not main() */ + +// debugf(stderr, "function name: %s ARGS=%p\n", sym->name, FUNC_ARGS(sym->type)); + if(strcmp(sym->name, "main")) { + if(0 + || !options.ommitFramePtr +// || sym->regsUsed + || IFFUNC_ARGS(sym->type) + || FUNC_HASSTACKPARM(sym->etype) + ) { + /* setup the stack frame */ + if(STACK_MODEL_LARGE) + pic16_pushpCodeOp(pic16_popCopyReg(pic16_framepnt_hi)); + pic16_pushpCodeOp(pic16_popCopyReg(pic16_framepnt_lo)); + + if(STACK_MODEL_LARGE) + pic16_emitpcode(POC_MOVFF, pic16_popCombine2( pic16_stackpnt_hi, pic16_framepnt_hi, 0)); + pic16_emitpcode(POC_MOVFF, pic16_popCombine2( pic16_stackpnt_lo, pic16_framepnt_lo, 0)); + } + } + + if ((IFFUNC_ISREENT(sym->type) || options.stackAuto) + && sym->stack) { + + if (sym->stack > 127)werror(W_STACK_OVERFLOW, sym->name); + + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(sym->stack)); + pic16_emitpcode(POC_SUBWF, pic16_popCopyReg( pic16_stackpnt_lo )); //&pic16_pc_fsr1l)); + emitSKPC; + pic16_emitpcode(POC_DECF, pic16_popCopyReg( pic16_stackpnt_hi )); //&pic16_pc_fsr1h)); + } + + if(inWparamList(sym->name) || FUNC_ISWPARAM(sym->type)) { + if(IFFUNC_HASVARARGS(sym->type) || IFFUNC_ISREENT(sym->type)) + _G.useWreg = 0; + else + _G.useWreg = 1; + } else + _G.useWreg = 0; + + /* if callee-save to be used for this function + * then save the registers being used in this function */ +// if (IFFUNC_CALLEESAVES(sym->type)) + if(strcmp(sym->name, "main")) { + int i; + + /* if any registers used */ + if (sym->regsUsed) { + pic16_emitpinfo(INF_LOCALREGS, pic16_newpCodeOpLocalRegs(LR_ENTRY_BEGIN)); + + if(!pic16_options.xinst) { + /* save the registers used */ + DEBUGpic16_emitcode("; **", "Saving used registers in stack"); + for ( i = 0 ; i < sym->regsUsed->size ; i++) { + if (bitVectBitValue(sym->regsUsed,i)) { +#if 0 + fprintf(stderr, "%s:%d local register w/rIdx = %d is used in function\n", __FUNCTION__, __LINE__, i); +#endif + pic16_pushpCodeOp( pic16_popRegFromIdx(i) ); + _G.nRegsSaved++; + + if(!pic16_regWithIdx(i)->wasUsed) { + fprintf(stderr, "%s:%d register %s is used in function but was wasUsed = 0\n", + __FILE__, __LINE__, pic16_regWithIdx(i)->name); + pic16_regWithIdx(i)->wasUsed = 1; + } + } + } + } else { + + /* xinst */ + DEBUGpic16_emitcode("; **", "Allocate a space in stack to be used as temporary registers"); + for(i=0;iregsUsed->size;i++) { + if(bitVectBitValue(sym->regsUsed, i)) { + _G.nRegsSaved++; + } + } + +// pic16_emitpcode(POC_ADDFSR, pic16_popGetLit2(2, pic16_popGetLit(_G.nRegsSaved))); + } + + pic16_emitpinfo(INF_LOCALREGS, pic16_newpCodeOpLocalRegs(LR_ENTRY_END)); + + } + } + + DEBUGpic16_emitcode("; ", "need to adjust stack = %d", sym->stack); +// fprintf(stderr, "Function '%s' uses %d bytes of stack\n", sym->name, sym->stack); +} + +/*-----------------------------------------------------------------*/ +/* genEndFunction - generates epilogue for functions */ +/*-----------------------------------------------------------------*/ +static void genEndFunction (iCode *ic) +{ + symbol *sym = OP_SYMBOL(IC_LEFT(ic)); + + FENTRY; + + if(IFFUNC_ISNAKED(sym->type)) { + DEBUGpic16_emitcode("; ***", "_naked function, no epilogue"); + return; + } + + _G.stack_lat = 0; + + /* add code for ISCRITICAL */ + if(IFFUNC_ISCRITICAL(sym->type)) { + /* if critical function, turn on interrupts */ + + /* TODO: add code here -- VR */ + } + +// sym->regsUsed = _G.fregsUsed; + + /* now we need to restore the registers */ + /* if any registers used */ + + /* first restore registers that might be used for stack access */ + if(_G.sregsAllocSet) { + regs *sr; + + _G.sregsAllocSet = reverseSet( _G.sregsAllocSet ); + for(sr=setFirstItem(_G.sregsAllocSet) ; sr; sr=setNextItem(_G.sregsAllocSet)) { + pic16_poppCodeOp( pic16_popRegFromIdx( sr->rIdx ) ); + } + } + + if (strcmp(sym->name, "main") && sym->regsUsed) { + int i; + + pic16_emitpinfo(INF_LOCALREGS, pic16_newpCodeOpLocalRegs(LR_EXIT_BEGIN)); + /* restore registers used */ + DEBUGpic16_emitcode("; **", "Restoring used registers from stack"); + for ( i = sym->regsUsed->size; i >= 0; i--) { + if (bitVectBitValue(sym->regsUsed,i)) { + pic16_poppCodeOp( pic16_popRegFromIdx(i) ); + _G.nRegsSaved--; + } + } + pic16_emitpinfo(INF_LOCALREGS, pic16_newpCodeOpLocalRegs(LR_EXIT_END)); + } + + + + if ((IFFUNC_ISREENT(sym->type) || options.stackAuto) + && sym->stack) { + if (sym->stack == 1) { + pic16_emitpcode(POC_INFSNZ, pic16_popCopyReg( pic16_stackpnt_lo )); + pic16_emitpcode(POC_INCF, pic16_popCopyReg( pic16_stackpnt_hi )); + } else { + // we have to add more than one... + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg( pic16_stack_postinc )); // this holds a return value! + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(sym->stack-1)); + pic16_emitpcode(POC_ADDWF, pic16_popCopyReg( pic16_stackpnt_lo )); + emitSKPNC; + pic16_emitpcode(POC_INCF, pic16_popCopyReg( pic16_stackpnt_hi )); + pic16_emitpcode(POC_COMF, pic16_popCopyReg(&pic16_pc_wreg)); // WREG = -(WREG+1)! + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(pic16_stack_plusw)); // this holds a retrun value! + } + } + + if(strcmp(sym->name, "main")) { + if(0 + || !options.ommitFramePtr +// || sym->regsUsed + || IFFUNC_ARGS(sym->type) + || FUNC_HASSTACKPARM(sym->etype) + ) { + /* restore stack frame */ + pic16_poppCodeOp( pic16_popCopyReg( pic16_framepnt_lo )); + if(STACK_MODEL_LARGE) + pic16_poppCodeOp( pic16_popCopyReg( pic16_framepnt_hi )); + } + } + + _G.useWreg = 0; + + if (IFFUNC_ISISR(sym->type)) { + pic16_poppCodeOp( pic16_popCopyReg( &pic16_pc_pclatu )); + pic16_poppCodeOp( pic16_popCopyReg( &pic16_pc_pclath )); + pic16_poppCodeOp( pic16_popCopyReg( &pic16_pc_fsr0h )); + pic16_poppCodeOp( pic16_popCopyReg( &pic16_pc_fsr0l)); + pic16_poppCodeOp( pic16_popCopyReg( &pic16_pc_prodh )); + pic16_poppCodeOp( pic16_popCopyReg( &pic16_pc_prodl )); + + if(!FUNC_ISSHADOWREGS(sym->type)) { + /* do not restore interrupt vector for WREG,STATUS,BSR + * for high priority interrupt, see genFunction */ + pic16_poppCodeOp( pic16_popCopyReg( &pic16_pc_bsr )); + pic16_poppCodeOp( pic16_popCopyReg( &pic16_pc_status )); + pic16_poppCodeOp( pic16_popCopyReg( &pic16_pc_wreg )); + } +// _G.interruptvector = 0; /* sanity check */ + + + /* if debug then send end of function */ +/* if (options.debug && currFunc) */ + if (currFunc) { + debugFile->writeEndFunction (currFunc, ic, 1); + } + + if(_G.usefastretfie) + pic16_emitpcode(POC_RETFIE, pic16_newpCodeOpLit(1)); + else + pic16_emitpcodeNULLop(POC_RETFIE); + + pic16_addpCode2pBlock(pb,pic16_newpCodeFunction(NULL,NULL)); + + _G.usefastretfie = 0; + return; + } + + if (IFFUNC_ISCRITICAL(sym->type)) { + pic16_emitcode("setb","ea"); + } + + /* if debug then send end of function */ + if (currFunc) { + debugFile->writeEndFunction (currFunc, ic, 1); + } + + /* insert code to restore stack frame, if user enabled it + * and function is not main() */ + + + pic16_emitpcodeNULLop(POC_RETURN); + + /* Mark the end of a function */ + pic16_addpCode2pBlock(pb,pic16_newpCodeFunction(NULL,NULL)); +} + + +void pic16_storeForReturn(iCode *ic, /*operand *op,*/ int offset, pCodeOp *dest) +{ + unsigned long lit=1; + operand *op; + + op = IC_LEFT(ic); + + // this fails for pic16_isLitOp(op) (if op is an AOP_PCODE) + if(AOP_TYPE(op) == AOP_LIT) { + if(!IS_FLOAT(operandType( op ))) { + lit = ulFromVal (AOP(op)->aopu.aop_lit); + } else { + union { + unsigned long lit_int; + float lit_float; + } info; + + /* take care if literal is a float */ + info.lit_float = floatFromVal(AOP(op)->aopu.aop_lit); + lit = info.lit_int; + } + } + + if (AOP_TYPE(op) == AOP_LIT) { + /* FIXME: broken for + * char __at(0x456) foo; + * return &foo; + * (upper byte is 0x00 (__code space) instead of 0x80 (__data) */ + pic16_movLit2f(dest, (lit >> (8ul*offset))); + } else if (AOP_TYPE(op) == AOP_PCODE + && AOP(op)->aopu.pcop->type == PO_IMMEDIATE) { + /* char *s= "aaa"; return s; */ + /* XXX: Using UPPER(__str_0) will yield 0b00XXXXXX, so + * that the generic pointer is interpreted correctly + * as referring to __code space, but this is fragile! */ + pic16_emitpcode(POC_MOVLW, pic16_popGet( AOP(op), offset )); + /* XXX: should check that dest != WREG */ + pic16_emitpcode(POC_MOVWF, dest); + } else { + if(dest->type == PO_WREG && (offset == 0)) { + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(op), offset)); + return; + } + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popGet(AOP(op), offset), dest)); + } +} + +/*-----------------------------------------------------------------*/ +/* genRet - generate code for return statement */ +/*-----------------------------------------------------------------*/ +static void genRet (iCode *ic) +{ + int size; + operand *left; + + FENTRY; + /* if we have no return value then + * just generate the "ret" */ + + if (!IC_LEFT(ic)) + goto jumpret; + + /* we have something to return then + * move the return value into place */ + pic16_aopOp((left=IC_LEFT(ic)),ic,FALSE); + size = AOP_SIZE(IC_LEFT(ic)); + + if(size <= 4) { + if(size>3) + pic16_storeForReturn(ic, /*IC_LEFT(ic),*/ 3, pic16_popCopyReg(&pic16_pc_fsr0l)); + + if(size>2) + pic16_storeForReturn(ic, /*IC_LEFT(ic),*/ 2, pic16_popCopyReg(&pic16_pc_prodh)); + + if(size>1) + pic16_storeForReturn(ic, /*IC_LEFT(ic),*/ 1, pic16_popCopyReg(&pic16_pc_prodl)); + + pic16_storeForReturn(ic, /*IC_LEFT(ic),*/ 0, pic16_popCopyReg(&pic16_pc_wreg)); + + } else { + /* >32-bits, setup stack and FSR0 */ + while (size--) { +// DEBUGpic16_emitcode("; ", "POC_MOVLW %d", GpsuedoStkPtr); +// DEBUGpic16_emitcode("; ", "POC_MOVFW PLUSW2"); + + pic16_pushpCodeOp( pic16_popGet( AOP( IC_LEFT(ic) ), size) ); + +// popaopidx(AOP(oper), size, GpseudoStkPtr); + GpsuedoStkPtr++; + } + + /* setup FSR0 */ + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg( pic16_stackpnt_lo ), pic16_popCopyReg(&pic16_pc_fsr0l))); + + if(STACK_MODEL_LARGE) { + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg( pic16_stackpnt_hi ), pic16_popCopyReg(&pic16_pc_fsr0h))); + } else { + pic16_emitpcode(POC_CLRF, pic16_popCopyReg( pic16_stackpnt_hi )); + } + } + + pic16_freeAsmop (IC_LEFT(ic),NULL,ic,TRUE); + +jumpret: + /* generate a jump to the return label + * if the next is not the return statement */ + if (!(ic->next && ic->next->op == LABEL + && IC_LABEL(ic->next) == returnLabel)) { + + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(returnLabel->key)); + pic16_emitcode("goto","_%05d_DS_",returnLabel->key+100 + pic16_labelOffset); + } +} + +/*-----------------------------------------------------------------*/ +/* genLabel - generates a label */ +/*-----------------------------------------------------------------*/ +static void genLabel (iCode *ic) +{ + FENTRY; + + /* special case never generate */ + if (IC_LABEL(ic) == entryLabel) + return ; + + pic16_emitpLabel(IC_LABEL(ic)->key); +// pic16_emitcode("","_%05d_DS_:",(IC_LABEL(ic)->key+100 + pic16_labelOffset)); +} + +/*-----------------------------------------------------------------*/ +/* genGoto - generates a goto */ +/*-----------------------------------------------------------------*/ +//tsd +static void genGoto (iCode *ic) +{ + FENTRY; + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_LABEL(ic)->key)); +// pic16_emitcode ("goto","_%05d_DS_",(IC_LABEL(ic)->key+100)+pic16_labelOffset); +} + + +/*-----------------------------------------------------------------*/ +/* genMultbits :- multiplication of bits */ +/*-----------------------------------------------------------------*/ +static void genMultbits (operand *left, + operand *right, + operand *result) +{ + FENTRY; + + if(!pic16_sameRegs(AOP(result),AOP(right))) + pic16_emitpcode(POC_BSF, pic16_popGet(AOP(result),0)); + + pic16_emitpcode(POC_BTFSC,pic16_popGet(AOP(right),0)); + pic16_emitpcode(POC_BTFSS,pic16_popGet(AOP(left),0)); + pic16_emitpcode(POC_BCF, pic16_popGet(AOP(result),0)); + +} + + +/*-----------------------------------------------------------------*/ +/* genMultOneByte : 8 bit multiplication & division */ +/*-----------------------------------------------------------------*/ +static void genMultOneByte (operand *left, + operand *right, + operand *result) +{ + + FENTRY; + DEBUGpic16_pic16_AopType(__LINE__,left,right,result); + DEBUGpic16_pic16_AopTypeSign(__LINE__,left,right,result); + + /* (if two literals, the value is computed before) */ + /* if one literal, literal on the right */ + if (AOP_TYPE(left) == AOP_LIT){ + operand *t = right; + right = left; + left = t; + } + + /* size is already checked in genMult == 1 */ +// size = AOP_SIZE(result); + + if (AOP_TYPE(right) == AOP_LIT){ + pic16_emitpcomment("multiply lit val:%s by variable %s and store in %s", + pic16_aopGet(AOP(right),0,FALSE,FALSE), + pic16_aopGet(AOP(left),0,FALSE,FALSE), + pic16_aopGet(AOP(result),0,FALSE,FALSE)); + } else { + pic16_emitpcomment("multiply variable :%s by variable %s and store in %s", + pic16_aopGet(AOP(right),0,FALSE,FALSE), + pic16_aopGet(AOP(left),0,FALSE,FALSE), + pic16_aopGet(AOP(result),0,FALSE,FALSE)); + } + + pic16_genMult8X8_n (left, right,result); +} + +#if 0 +/*-----------------------------------------------------------------*/ +/* genMultOneWord : 16 bit multiplication */ +/*-----------------------------------------------------------------*/ +static void genMultOneWord (operand *left, + operand *right, + operand *result) +{ + FENTRY; + DEBUGpic16_pic16_AopType(__LINE__,left,right,result); + DEBUGpic16_pic16_AopTypeSign(__LINE__,left,right,result); + + /* (if two literals, the value is computed before) + * if one literal, literal on the right */ + if (AOP_TYPE(left) == AOP_LIT){ + operand *t = right; + right = left; + left = t; + } + + /* size is checked already == 2 */ +// size = AOP_SIZE(result); + + if (AOP_TYPE(right) == AOP_LIT) { + pic16_emitpcomment("multiply lit val:%s by variable %s and store in %s", + pic16_aopGet(AOP(right),0,FALSE,FALSE), + pic16_aopGet(AOP(left),0,FALSE,FALSE), + pic16_aopGet(AOP(result),0,FALSE,FALSE)); + } else { + pic16_emitpcomment("multiply variable :%s by variable %s and store in %s", + pic16_aopGet(AOP(right),0,FALSE,FALSE), + pic16_aopGet(AOP(left),0,FALSE,FALSE), + pic16_aopGet(AOP(result),0,FALSE,FALSE)); + } + + pic16_genMult16X16_16(left, right,result); +} +#endif + +#if 0 +/*-----------------------------------------------------------------*/ +/* genMultOneLong : 32 bit multiplication */ +/*-----------------------------------------------------------------*/ +static void genMultOneLong (operand *left, + operand *right, + operand *result) +{ + FENTRY; + DEBUGpic16_pic16_AopType(__LINE__,left,right,result); + DEBUGpic16_pic16_AopTypeSign(__LINE__,left,right,result); + + /* (if two literals, the value is computed before) + * if one literal, literal on the right */ + if (AOP_TYPE(left) == AOP_LIT){ + operand *t = right; + right = left; + left = t; + } + + /* size is checked already == 4 */ +// size = AOP_SIZE(result); + + if (AOP_TYPE(right) == AOP_LIT) { + pic16_emitpcomment("multiply lit val:%s by variable %s and store in %s", + pic16_aopGet(AOP(right),0,FALSE,FALSE), + pic16_aopGet(AOP(left),0,FALSE,FALSE), + pic16_aopGet(AOP(result),0,FALSE,FALSE)); + } else { + pic16_emitpcomment("multiply variable :%s by variable %s and store in %s", + pic16_aopGet(AOP(right),0,FALSE,FALSE), + pic16_aopGet(AOP(left),0,FALSE,FALSE), + pic16_aopGet(AOP(result),0,FALSE,FALSE)); + } + + pic16_genMult32X32_32(left, right,result); +} +#endif + + + +/*-----------------------------------------------------------------*/ +/* genMult - generates code for multiplication */ +/*-----------------------------------------------------------------*/ +static void genMult (iCode *ic) +{ + operand *left = IC_LEFT(ic); + operand *right = IC_RIGHT(ic); + operand *result= IC_RESULT(ic); + + FENTRY; + /* assign the amsops */ + pic16_aopOp (left,ic,FALSE); + pic16_aopOp (right,ic,FALSE); + pic16_aopOp (result,ic,TRUE); + + DEBUGpic16_pic16_AopType(__LINE__,left,right,result); + + /* special cases first * + * both are bits */ + if (AOP_TYPE(left) == AOP_CRY + && AOP_TYPE(right)== AOP_CRY) { + genMultbits(left,right,result); + goto release ; + } + + /* if both are of size == 1 */ + if(AOP_SIZE(left) == 1 + && AOP_SIZE(right) == 1) { + genMultOneByte(left,right,result); + goto release ; + } + +#if 0 + /* if both are of size == 2 */ + if(AOP_SIZE(left) == 2 + && AOP_SIZE(right) == 2) { + genMultOneWord(left, right, result); + goto release; + } + + /* if both are of size == 4 */ + if(AOP_SIZE(left) == 4 + && AOP_SIZE(right) == 4) { + genMultOneLong(left, right, result); + goto release; + } +#endif + + fprintf( stderr, "%s: should have been transformed into function call\n",__FUNCTION__ ); + assert( !"Multiplication should have been transformed into function call!" ); + + pic16_emitcode("multiply ","sizes are greater than 4 ... need to insert proper algor."); + + + fprintf(stderr, "operand sizes result: %d left: %d right: %d\n", AOP_SIZE(result), AOP_SIZE(left), AOP_SIZE(right)); + /* should have been converted to function call */ + assert(0) ; + +release : + pic16_freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + +#if 0 +/*-----------------------------------------------------------------*/ +/* genDivbits :- division of bits */ +/*-----------------------------------------------------------------*/ +static void genDivbits (operand *left, + operand *right, + operand *result) +{ + char *l; + + FENTRY; + /* the result must be bit */ + pic16_emitcode("mov","b,%s",pic16_aopGet(AOP(right),0,FALSE,FALSE)); + l = pic16_aopGet(AOP(left),0,FALSE,FALSE); + + MOVA(l); + + pic16_emitcode("div","ab"); + pic16_emitcode("rrc","a"); + pic16_aopPut(AOP(result),"c",0); +} + +/*-----------------------------------------------------------------*/ +/* genDivOneByte : 8 bit division */ +/*-----------------------------------------------------------------*/ +static void genDivOneByte (operand *left, + operand *right, + operand *result) +{ + sym_link *opetype = operandType(result); + char *l ; + symbol *lbl ; + int size,offset; + + /* result = divident / divisor + * - divident may be a register or a literal, + * - divisor may be a register or a literal, + * so there are 3 cases (literal / literal is optimized + * by the front-end) to handle. + * In addition we must handle signed and unsigned, which + * result in 6 final different cases -- VR */ + + FENTRY; + + size = AOP_SIZE(result) - 1; + offset = 1; + /* signed or unsigned */ + if (SPEC_USIGN(opetype)) { + pCodeOp *pct1, /* count */ + *pct2, /* reste */ + *pct3; /* temp */ + symbol *label1, *label2, *label3;; + + + /* unsigned is easy */ + + pct1 = pic16_popGetTempReg(1); + pct2 = pic16_popGetTempReg(1); + pct3 = pic16_popGetTempReg(1); + + label1 = newiTempLabel(NULL); + label2 = newiTempLabel(NULL); + label3 = newiTempLabel(NULL); + + /* the following algorithm is extracted from divuint.c */ + + pic16_emitpcode(POC_MOVLW, pic16_popGetLit( 8 )); + pic16_emitpcode(POC_MOVWF, pic16_pCodeOpCopy( pct1 )); + + pic16_emitpcode(POC_CLRF, pic16_pCodeOpCopy( pct2 )); + + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(left), 0)); + + pic16_emitpLabel(label1->key); + + emitCLRC; + pic16_emitpcode(POC_RLCF, pic16_pCodeOpCopy( pct2 )); + + + emitCLRC; + pic16_emitpcode(POC_RLCF, pic16_popCopyReg( &pic16_pc_wreg )); + + + emitSKPNC; + pic16_emitpcode(POC_INCF, pic16_pCodeOpCopy( pct2 )); + + pic16_emitpcode(POC_MOVWF, pic16_pCodeOpCopy( pct3 )); + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(right), 0)); + + pic16_emitpcode(POC_CPFSLT, pic16_pCodeOpCopy(pct2)); + pic16_emitpcode(POC_BRA, pic16_popGetLabel(label3->key)); + pic16_emitpcode(POC_BRA, pic16_popGetLabel(label2->key)); + + pic16_emitpLabel( label3->key ); + pic16_emitpcode(POC_SUBWF, pic16_pCodeOpCopy(pct2)); + pic16_emitpcode(POC_INCF, pic16_pCodeOpCopy(pct3)); + + + + pic16_emitpLabel(label2->key); + pic16_emitpcode(POC_MOVFW, pic16_pCodeOpCopy(pct3)); + pic16_emitpcode(POC_DECFSZ, pic16_pCodeOpCopy(pct1)); + pic16_emitpcode(POC_BRA, pic16_popGetLabel( label1->key )); + + /* result is in wreg */ + if(AOP_TYPE(result) != AOP_ACC) + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 0)); + + pic16_popReleaseTempReg( pct3, 1); + pic16_popReleaseTempReg( pct2, 1); + pic16_popReleaseTempReg( pct1, 1); + + return ; + } + + /* signed is a little bit more difficult */ + + /* save the signs of the operands */ + l = pic16_aopGet(AOP(left),0,FALSE,FALSE); + MOVA(l); + pic16_emitcode("xrl","a,%s",pic16_aopGet(AOP(right),0,FALSE,TRUE)); + pic16_emitcode("push","acc"); /* save it on the stack */ + + /* now sign adjust for both left & right */ + l = pic16_aopGet(AOP(right),0,FALSE,FALSE); + MOVA(l); + lbl = newiTempLabel(NULL); + pic16_emitcode("jnb","acc.7,%05d_DS_",(lbl->key+100)); + pic16_emitcode("cpl","a"); + pic16_emitcode("inc","a"); + pic16_emitcode("","%05d_DS_:",(lbl->key+100)); + pic16_emitcode("mov","b,a"); + + /* sign adjust left side */ + l = pic16_aopGet(AOP(left),0,FALSE,FALSE); + MOVA(l); + + lbl = newiTempLabel(NULL); + pic16_emitcode("jnb","acc.7,%05d_DS_",(lbl->key+100)); + pic16_emitcode("cpl","a"); + pic16_emitcode("inc","a"); + pic16_emitcode("","%05d_DS_:",(lbl->key+100)); + + /* now the division */ + pic16_emitcode("div","ab"); + /* we are interested in the lower order + only */ + pic16_emitcode("mov","b,a"); + lbl = newiTempLabel(NULL); + pic16_emitcode("pop","acc"); + /* if there was an over flow we don't + adjust the sign of the result */ + pic16_emitcode("jb","ov,%05d_DS_",(lbl->key+100)); + pic16_emitcode("jnb","acc.7,%05d_DS_",(lbl->key+100)); + CLRC; + pic16_emitcode("clr","a"); + pic16_emitcode("subb","a,b"); + pic16_emitcode("mov","b,a"); + pic16_emitcode("","%05d_DS_:",(lbl->key+100)); + + /* now we are done */ + pic16_aopPut(AOP(result),"b",0); + if(size > 0){ + pic16_emitcode("mov","c,b.7"); + pic16_emitcode("subb","a,acc"); + } + while (size--) + pic16_aopPut(AOP(result),"a",offset++); + +} +#endif + +/*-----------------------------------------------------------------*/ +/* genDiv - generates code for division */ +/*-----------------------------------------------------------------*/ +static void genDiv (iCode *ic) +{ + operand *left = IC_LEFT(ic); + operand *right = IC_RIGHT(ic); + operand *result= IC_RESULT(ic); + int negated = 0; + int leftVal = 0, rightVal = 0; + int signedLits = 0; + char *functions[2][2] = { { "__divschar", "__divuchar" }, { "__modschar", "__moduchar" } }; + int op = 0; + + /* Division is a very lengthy algorithm, so it is better + * to call support routines than inlining algorithm. + * Division functions written here just in case someone + * wants to inline and not use the support libraries -- VR */ + + FENTRY; + + /* assign the amsops */ + pic16_aopOp (left,ic,FALSE); + pic16_aopOp (right,ic,FALSE); + pic16_aopOp (result,ic,TRUE); + + if (ic->op == '/') + op = 0; + else if (ic->op == '%') + op = 1; + else + assert( !"invalid operation requested in genDivMod" ); + + /* get literal values */ + if (IS_VALOP(left)) { + leftVal = (int) ulFromVal ( OP_VALUE(left) ); + assert( leftVal >= -128 && leftVal < 256 ); + if (leftVal < 0) { signedLits++; } + } + if (IS_VALOP(right)) { + rightVal = (int) ulFromVal ( OP_VALUE(right) ); + assert( rightVal >= -128 && rightVal < 256 ); + if (rightVal < 0) { signedLits++; } + } + + /* We should only come here to convert all + * / : {u8_t, s8_t} x {u8_t, s8_t} -> {u8_t, s8_t} + * with exactly one operand being s8_t into + * u8_t x u8_t -> u8_t. All other cases should have been + * turned into calls to support routines beforehand... */ + if ((AOP_SIZE(left) == 1 || IS_VALOP(left)) + && (AOP_SIZE(right) == 1 || IS_VALOP(right))) + { + if ((!IS_UNSIGNED(operandType(right)) || rightVal < 0) + && (!IS_UNSIGNED(operandType(left)) || leftVal < 0)) + { + /* Both operands are signed or negative, use _divschar + * instead of _divuchar */ + pushaop(AOP(right), 0); + pushaop(AOP(left), 0); + + /* call _divschar */ + pic16_emitpcode(POC_CALL, pic16_popGetWithString(functions[op][0])); + + { + symbol *sym; + sym = newSymbol( functions[op][0], 0 ); + sym->used++; + strcpy(sym->rname, functions[op][0]); + checkAddSym(&externs, sym); + } + + /* assign result */ + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 0)); + if (AOP_SIZE(result) > 1) + { + pic16_emitpcode(POC_MOVFF, + pic16_popGet2p(pic16_popCopyReg(&pic16_pc_prodl), + pic16_popGet(AOP(result), 1))); + /* sign extend */ + pic16_addSign(result, 2, 1); + } + + /* clean up stack */ + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(pic16_stack_preinc)); + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(pic16_stack_preinc)); + + goto release; + } + + /* push right operand */ + if (IS_VALOP(right)) { + if (rightVal < 0) { + pic16_pushpCodeOp( pic16_popGetLit(-rightVal) ); + negated++; + } else { + pushaop(AOP(right), 0); + } + } else if (!IS_UNSIGNED(operandType(right))) { + pic16_mov2w(AOP(right), 0); + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit_simple(AOP(right), 0, 7)); + pic16_emitpcode(POC_NEGF, pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg(pic16_stack_postdec)); + negated++; + } else { + pushaop(AOP(right), 0); + } + + /* push left operand */ + if (IS_VALOP(left)) { + if (leftVal < 0) { + pic16_pushpCodeOp(pic16_popGetLit(-leftVal)); + negated++; + } else { + pushaop(AOP(left), 0); + } + } else if (!IS_UNSIGNED(operandType(left))) { + pic16_mov2w(AOP(left),0); + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit_simple(AOP(left), 0, 7)); + pic16_emitpcode(POC_NEGF, pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg(pic16_stack_postdec)); + negated++; + } else { + pushaop(AOP(left), 0); + } + + /* call _divuchar */ + pic16_emitpcode(POC_CALL, pic16_popGetWithString(functions[op][1])); + + { + symbol *sym; + sym = newSymbol( functions[op][1], 0 ); + sym->used++; + strcpy(sym->rname, functions[op][1]); + checkAddSym(&externs, sym); + } + + /* Revert negation(s) from above. + * This is inefficient: if both operands are negative, this + * should not touch WREG. However, determining that exactly + * one operand was negated costs at least 3 instructions, + * so there is nothing to be gained here, is there? + * + * I negate WREG because either operand might share registers with + * result, so assigning first might destroy an operand. */ + + /* For the modulus operator, (a/b)*b == a shall hold. + * Thus: a>0, b>0 --> a/b >= 0 and a%b >= 0 + * a>0, b<0 --> a/b <= 0 and a%b >= 0 (e.g. 128 / -5 = -25, -25*(-5) = 125 and +3 remaining) + * a<0, b>0 --> a/b <= 0 and a%b < 0 (e.g. -128 / 5 = -25, -25* 5 = -125 and -3 remaining) + * a<0, b<0 --> a/b >= 0 and a%b < 0 (e.g. -128 / -5 = 25, 25*(-5) = -125 and -3 remaining) + * Only invert the result if the left operand is negative (sigh). + */ + if (AOP_SIZE(result) <= 1 || !negated) + { + if (ic->op == '/') + { + if (IS_VALOP(right)) { + if (rightVal < 0) { + /* we negated this operand above */ + pic16_emitpcode(POC_NEGF, pic16_popCopyReg(&pic16_pc_wreg)); + } + } else if (!IS_UNSIGNED(operandType(right))) { + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit_simple(AOP(right), 0, 7)); + pic16_emitpcode(POC_NEGF, pic16_popCopyReg(&pic16_pc_wreg)); + } + } + + if (IS_VALOP(left)) { + if (leftVal < 0) { + /* we negated this operand above */ + pic16_emitpcode(POC_NEGF, pic16_popCopyReg(&pic16_pc_wreg)); + } + } else if (!IS_UNSIGNED(operandType(left))) { + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit_simple(AOP(left), 0, 7)); + pic16_emitpcode(POC_NEGF, pic16_popCopyReg(&pic16_pc_wreg)); + } + + /* Move result to destination. */ + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 0)); + + /* Zero-extend: no operand was signed (or result is just a byte). */ + pic16_addSign(result, 1, 0); + } else { + assert( AOP_SIZE(result) > 1 ); + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result), 1)); + if (ic->op == '/') + { + if (IS_VALOP(right)) { + if (rightVal < 0) { + /* we negated this operand above */ + pic16_emitpcode(POC_COMF, pic16_popGet(AOP(result), 1)); + } + } else if (!IS_UNSIGNED(operandType(right))) { + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit_simple(AOP(right), 0, 7)); + pic16_emitpcode(POC_COMF, pic16_popGet(AOP(result), 1)); + } + } + + if (IS_VALOP(left)) { + if (leftVal < 0) { + /* we negated this operand above */ + pic16_emitpcode(POC_COMF, pic16_popGet(AOP(result), 1)); + } + } else if (!IS_UNSIGNED(operandType(left))) { + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit_simple(AOP(left), 0, 7)); + pic16_emitpcode(POC_COMF, pic16_popGet(AOP(result), 1)); + } + + /* Move result to destination. */ + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 0)); + + /* Negate result if required. */ + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit_simple(AOP(result), 1, 7)); + pic16_emitpcode(POC_NEGF, pic16_popGet(AOP(result), 0)); + + /* Sign-extend. */ + pic16_addSign(result, 2, 1); + } + + /* clean up stack */ + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(pic16_stack_preinc)); + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(pic16_stack_preinc)); + goto release; + } + +#if 0 + /* special cases first */ + /* both are bits */ + if (AOP_TYPE(left) == AOP_CRY && + AOP_TYPE(right)== AOP_CRY) { + genDivbits(left,right,result); + goto release ; + } + + /* if both are of size == 1 */ + if (AOP_SIZE(left) == 1 && + AOP_SIZE(right) == 1 ) { + genDivOneByte(left,right,result); + goto release ; + } +#endif + + /* should have been converted to function call */ + assert(0); +release : + pic16_freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + +#if 0 +/*-----------------------------------------------------------------*/ +/* genModbits :- modulus of bits */ +/*-----------------------------------------------------------------*/ +static void genModbits (operand *left, + operand *right, + operand *result) +{ + char *l; + + FENTRY; + + werror(W_POSSBUG2, __FILE__, __LINE__); + /* the result must be bit */ + pic16_emitcode("mov","b,%s",pic16_aopGet(AOP(right),0,FALSE,FALSE)); + l = pic16_aopGet(AOP(left),0,FALSE,FALSE); + + MOVA(l); + + pic16_emitcode("div","ab"); + pic16_emitcode("mov","a,b"); + pic16_emitcode("rrc","a"); + pic16_aopPut(AOP(result),"c",0); +} + +/*-----------------------------------------------------------------*/ +/* genModOneByte : 8 bit modulus */ +/*-----------------------------------------------------------------*/ +static void genModOneByte (operand *left, + operand *right, + operand *result) +{ + sym_link *opetype = operandType(result); + char *l ; + symbol *lbl ; + + FENTRY; + werror(W_POSSBUG2, __FILE__, __LINE__); + + /* signed or unsigned */ + if (SPEC_USIGN(opetype)) { + /* unsigned is easy */ + pic16_emitcode("mov","b,%s", pic16_aopGet(AOP(right),0,FALSE,FALSE)); + l = pic16_aopGet(AOP(left),0,FALSE,FALSE); + MOVA(l); + pic16_emitcode("div","ab"); + pic16_aopPut(AOP(result),"b",0); + return ; + } + + /* signed is a little bit more difficult */ + + /* save the signs of the operands */ + l = pic16_aopGet(AOP(left),0,FALSE,FALSE); + MOVA(l); + + pic16_emitcode("xrl","a,%s",pic16_aopGet(AOP(right),0,FALSE,FALSE)); + pic16_emitcode("push","acc"); /* save it on the stack */ + + /* now sign adjust for both left & right */ + l = pic16_aopGet(AOP(right),0,FALSE,FALSE); + MOVA(l); + + lbl = newiTempLabel(NULL); + pic16_emitcode("jnb","acc.7,%05d_DS_",(lbl->key+100)); + pic16_emitcode("cpl","a"); + pic16_emitcode("inc","a"); + pic16_emitcode("","%05d_DS_:",(lbl->key+100)); + pic16_emitcode("mov","b,a"); + + /* sign adjust left side */ + l = pic16_aopGet(AOP(left),0,FALSE,FALSE); + MOVA(l); + + lbl = newiTempLabel(NULL); + pic16_emitcode("jnb","acc.7,%05d_DS_",(lbl->key+100)); + pic16_emitcode("cpl","a"); + pic16_emitcode("inc","a"); + pic16_emitcode("","%05d_DS_:",(lbl->key+100)); + + /* now the multiplication */ + pic16_emitcode("div","ab"); + /* we are interested in the lower order + only */ + lbl = newiTempLabel(NULL); + pic16_emitcode("pop","acc"); + /* if there was an over flow we don't + adjust the sign of the result */ + pic16_emitcode("jb","ov,%05d_DS_",(lbl->key+100)); + pic16_emitcode("jnb","acc.7,%05d_DS_",(lbl->key+100)); + CLRC ; + pic16_emitcode("clr","a"); + pic16_emitcode("subb","a,b"); + pic16_emitcode("mov","b,a"); + pic16_emitcode("","%05d_DS_:",(lbl->key+100)); + + /* now we are done */ + pic16_aopPut(AOP(result),"b",0); + +} +#endif + +/*-----------------------------------------------------------------*/ +/* genMod - generates code for division */ +/*-----------------------------------------------------------------*/ +static void genMod (iCode *ic) +{ + /* Task deferred to genDiv */ + genDiv(ic); +#if 0 + operand *left = IC_LEFT(ic); + operand *right = IC_RIGHT(ic); + operand *result= IC_RESULT(ic); + + FENTRY; + + /* assign the amsops */ + pic16_aopOp (left,ic,FALSE); + pic16_aopOp (right,ic,FALSE); + pic16_aopOp (result,ic,TRUE); + + /* special cases first */ + /* both are bits */ + if (AOP_TYPE(left) == AOP_CRY && + AOP_TYPE(right)== AOP_CRY) { + genModbits(left,right,result); + goto release ; + } + + /* if both are of size == 1 */ + if (AOP_SIZE(left) == 1 && + AOP_SIZE(right) == 1 ) { + genModOneByte(left,right,result); + goto release ; + } + + /* should have been converted to function call */ + assert(0); + +release : + pic16_freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(result,NULL,ic,TRUE); +#endif +} + +/*-----------------------------------------------------------------*/ +/* genIfxJump :- will create a jump depending on the ifx */ +/*-----------------------------------------------------------------*/ +/* + note: May need to add parameter to indicate when a variable is in bit space. +*/ +static void genIfxJump (iCode *ic, char *jval) +{ + FENTRY; + + /* if true label then we jump if condition + supplied is true */ + if ( IC_TRUE(ic) ) { + + if(strcmp(jval,"a") == 0) + emitSKPZ; + else if (strcmp(jval,"c") == 0) + emitSKPNC; + else { + DEBUGpic16_emitcode ("; ***","%d - assuming %s is in bit space",__LINE__,jval); + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit(jval,-1,1, PO_GPR_REGISTER)); + } + + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_TRUE(ic)->key)); + pic16_emitcode(" goto","_%05d_DS_",IC_TRUE(ic)->key+100 + pic16_labelOffset); + + } + else { + /* false label is present */ + if(strcmp(jval,"a") == 0) + emitSKPNZ; + else if (strcmp(jval,"c") == 0) + emitSKPC; + else { + DEBUGpic16_emitcode ("; ***","%d - assuming %s is in bit space",__LINE__,jval); + pic16_emitpcode(POC_BTFSS, pic16_newpCodeOpBit(jval,-1,1, PO_GPR_REGISTER)); + } + + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_FALSE(ic)->key)); + pic16_emitcode(" goto","_%05d_DS_",IC_FALSE(ic)->key+100 + pic16_labelOffset); + + } + + + /* mark the icode as generated */ + ic->generated = 1; +} + +static void genIfxpCOpJump (iCode *ic, pCodeOp *jop) +{ + FENTRY; + + /* if true label then we jump if condition + supplied is true */ + if ( IC_TRUE(ic) ) { + DEBUGpic16_emitcode ("; ***","%d - assuming is in bit space",__LINE__); + pic16_emitpcode(POC_BTFSC, jop); + + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_TRUE(ic)->key)); + pic16_emitcode(" goto","_%05d_DS_",IC_TRUE(ic)->key+100 + pic16_labelOffset); + + } else { + /* false label is present */ + DEBUGpic16_emitcode ("; ***","%d - assuming is in bit space",__LINE__); + pic16_emitpcode(POC_BTFSS, jop); + + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_FALSE(ic)->key)); + pic16_emitcode(" goto","_%05d_DS_",IC_FALSE(ic)->key+100 + pic16_labelOffset); + } + + + /* mark the icode as generated */ + ic->generated = 1; +} + +#if 0 +// not needed ATM + +/*-----------------------------------------------------------------*/ +/* genSkip */ +/*-----------------------------------------------------------------*/ +static void genSkip(iCode *ifx,int status_bit) +{ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if(!ifx) + return; + + if ( IC_TRUE(ifx) ) { + switch(status_bit) { + case 'z': + emitSKPNZ; + break; + + case 'c': + emitSKPNC; + break; + + case 'd': + emitSKPDC; + break; + + } + + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_TRUE(ifx)->key)); + // pic16_emitcode("goto","_%05d_DS_",IC_TRUE(ifx)->key+100+pic16_labelOffset); + + } else { + + switch(status_bit) { + + case 'z': + emitSKPZ; + break; + + case 'c': + emitSKPC; + break; + + case 'd': + emitSKPDC; + break; + } + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_FALSE(ifx)->key)); + // pic16_emitcode("goto","_%05d_DS_",IC_FALSE(ifx)->key+100+pic16_labelOffset); + + } + +} +#endif + +/*-----------------------------------------------------------------*/ +/* genSkipc */ +/*-----------------------------------------------------------------*/ +static void genSkipc(resolvedIfx *rifx) +{ + DEBUGpic16_emitcode ("; ***","%s %d rifx= %p",__FUNCTION__,__LINE__, rifx); + + if(!rifx) + return; + + if(rifx->condition) + emitSKPNC; + else + emitSKPC; + + pic16_emitpcode(POC_GOTO, pic16_popGetLabel(rifx->lbl->key)); + rifx->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* mov2w_regOrLit :- move to WREG either the offset's byte from */ +/* aop (if it's NOT a literal) or from lit (if */ +/* aop is a literal) */ +/*-----------------------------------------------------------------*/ +void mov2w_regOrLit (asmop *aop, unsigned long lit, int offset) { + if (aop->type == AOP_LIT) { + pic16_emitpcode (POC_MOVLW, pic16_popGetLit(lit >> (offset*8))); + } else { + pic16_emitpcode (POC_MOVFW, pic16_popGet (aop, offset)); + } +} + +/*-----------------------------------------------------------------*/ +/* genCmp :- greater or less than comparison */ +/*-----------------------------------------------------------------*/ + +/* genCmp performs a left < right comparison, stores + * the outcome in result (if != NULL) and generates + * control flow code for the ifx (if != NULL). + * + * This version leaves in sequences like + * "B[CS]F STATUS,0; BTFS[CS] STATUS,0" + * which should be optmized by the peephole + * optimizer - RN 2005-01-01 */ +static void genCmp (operand *left,operand *right, + operand *result, iCode *ifx, int sign) +{ + resolvedIfx rIfx; + int size; + int offs; + symbol *templbl; + operand *dummy; + unsigned long lit; + unsigned long mask; + int performedLt; + + FENTRY; + + assert (left && right); + assert (AOP_SIZE(left) == AOP_SIZE(right)); + + size = AOP_SIZE(right) - 1; + mask = (0x100UL << (size*8)) - 1; + // in the end CARRY holds "left < right" (performedLt == 1) or "left >= right" (performedLt == 0) + performedLt = 1; + templbl = NULL; + lit = 0; + + resolveIfx (&rIfx, ifx); + + /* handle for special cases */ + if(pic16_genCmp_special(left, right, result, ifx, &rIfx, sign)) + return; + + /********************************************************************** + * handle bits - bit compares are promoted to int compares seemingly! * + **********************************************************************/ +#if 0 + // THIS IS COMPLETELY UNTESTED! + if (AOP_TYPE(left) == AOP_CRY && AOP_TYPE(right) == AOP_CRY) { + pCodeOp *pcleft = pic16_popGet(AOP(left), 0); + pCodeOp *pcright = pic16_popGet(AOP(right), 0); + assert (pcleft->type == PO_GPR_BIT && pcright->type == PO_GPR_BIT); + + emitSETC; + // 1 < {0,1} is false --> clear C by skipping the next instruction + //pic16_emitpcode (POC_BTFSS, pic16_popCopyGPR2Bit (AOP(left),0), PCORB(pcleft)->bit); + pic16_emitpcode (POC_BTFSS, pic16_popGet (AOP(left), 0)); + // {0,1} < 0 is false --> clear C by NOT skipping the next instruction + pic16_emitpcode (POC_BTFSS, pic16_popCopyGPR2Bit (pic16_popGet(AOP(right),0), PCORB(pcright)->bit)); + emitCLRC; // only skipped for left=0 && right=1 + + goto correct_result_in_carry; + } // if +#endif + + /************************************************* + * make sure that left is register (or the like) * + *************************************************/ + if (!isAOP_REGlike(left)) { + DEBUGpc ("swapping arguments (AOP_TYPEs %d/%d)", AOP_TYPE(left), AOP_TYPE(right)); + assert (isAOP_LIT(left)); + assert (isAOP_REGlike(right)); + // swap left and right + // left < right <==> right > left <==> (right >= left + 1) + lit = ulFromVal (AOP(left)->aopu.aop_lit); + + if ( (!sign && (lit & mask) == mask) || (sign && (lit & mask) == (mask >> 1)) ) { + // MAXVALUE < right? always false + if (performedLt) emitCLRC; else emitSETC; + goto correct_result_in_carry; + } // if + + // This fails for lit = 0xFF (unsigned) AND lit = 0x7F (signed), + // that's why we handled it above. + lit++; + + dummy = left; + left = right; + right = dummy; + + performedLt ^= 1; // instead of "left < right" we check for "right >= left+1, i.e. "right < left+1" + } else if (isAOP_LIT(right)) { + lit = ulFromVal (AOP(right)->aopu.aop_lit); + } // if + + assert (isAOP_REGlike(left)); // left must be register or the like + assert (isAOP_REGlike(right) || isAOP_LIT(right)); // right may be register-like or a literal + + /************************************************* + * special cases go here * + *************************************************/ + + if (isAOP_LIT(right)) { + if (!sign) { + // unsigned comparison to a literal + DEBUGpc ("unsigned compare: left %s lit(0x%X=%lu), size=%d", performedLt ? "<" : ">=", lit, lit, size+1); + if (lit == 0) { + // unsigned left < 0? always false + if (performedLt) emitCLRC; else emitSETC; + goto correct_result_in_carry; + } + } else { + // signed comparison to a literal + DEBUGpc ("signed compare: left %s lit(0x%X=%ld), size=%d, mask=%x", performedLt ? "<" : ">=", lit, lit, size+1, mask); + if ((lit & mask) == ((0x80 << (size*8)) & mask)) { + // signed left < 0x80000000? always false + if (performedLt) emitCLRC; else emitSETC; + goto correct_result_in_carry; + } else if (lit == 0) { + // compare left < 0; set CARRY if SIGNBIT(left) is set + if (performedLt) emitSETC; else emitCLRC; + pic16_emitpcode (POC_BTFSS, pic16_popCopyGPR2Bit(pic16_popGet (AOP(left), size), 7)); + if (performedLt) emitCLRC; else emitSETC; + goto correct_result_in_carry; + } + } // if (!sign) + } // right is literal + + /************************************************* + * perform a general case comparison * + * make sure we get CARRY==1 <==> left >= right * + *************************************************/ + // compare most significant bytes + //DEBUGpc ("comparing bytes at offset %d", size); + if (!sign) { + // unsigned comparison + mov2w_regOrLit (AOP(right), lit, size); + pic16_emitpcode (POC_SUBFW, pic16_popGet (AOP(left), size)); + } else { + // signed comparison + // (add 2^n to both operands then perform an unsigned comparison) + if (isAOP_LIT(right)) { + // left >= LIT <-> LIT-left <= 0 <-> LIT-left == 0 OR !(LIT-left >= 0) + unsigned char litbyte = (lit >> (8*size)) & 0xFF; + + if (litbyte == 0x80) { + // left >= 0x80 -- always true, but more bytes to come + pic16_mov2w (AOP(left), size); + pic16_emitpcode (POC_XORLW, pic16_popGetLit (0x80)); // set ZERO flag + emitSETC; + } else { + // left >= LIT <-> left + (-LIT) >= 0 <-> left + (0x100-LIT) >= 0x100 + pic16_mov2w (AOP(left), size); + pic16_emitpcode (POC_ADDLW, pic16_popGetLit (0x80)); + pic16_emitpcode (POC_ADDLW, pic16_popGetLit ((0x100 - (litbyte + 0x80)) & 0x00FF)); + } // if + } else { + /* using PRODL as a temporary register here */ + pCodeOp *pctemp = pic16_popCopyReg(&pic16_pc_prodl); + //pCodeOp *pctemp = pic16_popGetTempReg(1); + pic16_mov2w (AOP(left), size); + pic16_emitpcode (POC_ADDLW, pic16_popGetLit (0x80)); + pic16_emitpcode (POC_MOVWF, pctemp); + pic16_mov2w (AOP(right), size); + pic16_emitpcode (POC_ADDLW, pic16_popGetLit (0x80)); + pic16_emitpcode (POC_SUBFW, pctemp); + //pic16_popReleaseTempReg(pctemp, 1); + } + } // if (!sign) + + // compare remaining bytes (treat as unsigned case from above) + templbl = newiTempLabel ( NULL ); + offs = size; + while (offs--) { + //DEBUGpc ("comparing bytes at offset %d", offs); + pic16_emitpcode (POC_BNZ, pic16_popGetLabel (templbl->key)); + mov2w_regOrLit (AOP(right), lit, offs); + pic16_emitpcode (POC_SUBFW, pic16_popGet (AOP(left), offs)); + } // while (offs) + pic16_emitpLabel (templbl->key); + goto result_in_carry; + +result_in_carry: + + /**************************************************** + * now CARRY contains the result of the comparison: * + * SUBWF sets CARRY iff * + * F-W >= 0 <==> F >= W <==> !(F < W) * + * (F=left, W=right) * + ****************************************************/ + + if (performedLt) { + if (result && AOP_TYPE(result) != AOP_CRY) { + // value will be stored + emitTOGC; + } else { + // value wil only be used in the following genSkipc() + rIfx.condition ^= 1; + } + } // if + +correct_result_in_carry: + + // assign result to variable (if neccessary) + if (result && AOP_TYPE(result) != AOP_CRY) { + //DEBUGpc ("assign result"); + size = AOP_SIZE(result); + while (size--) { + pic16_emitpcode (POC_CLRF, pic16_popGet (AOP(result), size)); + } // while + pic16_emitpcode (POC_RLCF, pic16_popGet (AOP(result), 0)); + } // if (result) + + // perform conditional jump + if (ifx) { + //DEBUGpc ("generate control flow"); + genSkipc (&rIfx); + ifx->generated = 1; + } // if +} + +/*-----------------------------------------------------------------*/ +/* genCmpGt :- greater than comparison */ +/*-----------------------------------------------------------------*/ +static void genCmpGt (iCode *ic, iCode *ifx) +{ + operand *left, *right, *result; + sym_link *letype , *retype; + int sign ; + + FENTRY; + + left = IC_LEFT(ic); + right= IC_RIGHT(ic); + result = IC_RESULT(ic); + + letype = getSpec(operandType(left)); + retype =getSpec(operandType(right)); + sign = !(SPEC_USIGN(letype) | SPEC_USIGN(retype)); + /* assign the amsops */ + pic16_aopOp (left,ic,FALSE); + pic16_aopOp (right,ic,FALSE); + pic16_aopOp (result,ic,TRUE); + + genCmp(right, left, result, ifx, sign); + + pic16_freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genCmpLt - less than comparisons */ +/*-----------------------------------------------------------------*/ +static void genCmpLt (iCode *ic, iCode *ifx) +{ + operand *left, *right, *result; + sym_link *letype , *retype; + int sign ; + + FENTRY; + + left = IC_LEFT(ic); + right= IC_RIGHT(ic); + result = IC_RESULT(ic); + + letype = getSpec(operandType(left)); + retype =getSpec(operandType(right)); + sign = !(SPEC_USIGN(letype) | SPEC_USIGN(retype)); + + /* assign the amsops */ + pic16_aopOp (left,ic,FALSE); + pic16_aopOp (right,ic,FALSE); + pic16_aopOp (result,ic,TRUE); + + genCmp(left, right, result, ifx, sign); + + pic16_freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* pic16_isLitOp - check if operand has to be treated as literal */ +/*-----------------------------------------------------------------*/ +bool pic16_isLitOp(operand *op) +{ + return ((AOP_TYPE(op) == AOP_LIT) + || ( (AOP_TYPE(op) == AOP_PCODE) + && ( (AOP(op)->aopu.pcop->type == PO_LITERAL) + || (AOP(op)->aopu.pcop->type == PO_IMMEDIATE) ))); +} + +/*-----------------------------------------------------------------*/ +/* pic16_isLitAop - check if operand has to be treated as literal */ +/*-----------------------------------------------------------------*/ +bool pic16_isLitAop(asmop *aop) +{ + return ((aop->type == AOP_LIT) + || ( (aop->type == AOP_PCODE) + && ( (aop->aopu.pcop->type == PO_LITERAL) + || (aop->aopu.pcop->type == PO_IMMEDIATE) ))); +} + + + +/*-----------------------------------------------------------------*/ +/* genCmpEq - generates code for equal to */ +/*-----------------------------------------------------------------*/ +static void genCmpEq (iCode *ic, iCode *ifx) +{ + operand *left, *right, *result; + symbol *falselbl = newiTempLabel(NULL); + symbol *donelbl = newiTempLabel(NULL); + + int preserve_result = 0; + int generate_result = 0; + int i=0; + unsigned long lit = -1; + + FENTRY; + + pic16_aopOp((left=IC_LEFT(ic)),ic,FALSE); + pic16_aopOp((right=IC_RIGHT(ic)),ic,FALSE); + pic16_aopOp((result=IC_RESULT(ic)),ic,TRUE); + + DEBUGpic16_pic16_AopType(__LINE__,left,right,result); + + if( (AOP_TYPE(right) == AOP_CRY) || (AOP_TYPE(left) == AOP_CRY) ) + { + werror(W_POSSBUG2, __FILE__, __LINE__); + DEBUGpic16_emitcode ("; ***","%s %d -- ERROR",__FUNCTION__,__LINE__); + fprintf(stderr, "%s %d error - left/right CRY operands not supported\n",__FUNCTION__,__LINE__); + goto release; + } + + if (pic16_isLitOp(left) || (AOP_TYPE(right) == AOP_ACC)) + { + operand *tmp = right ; + right = left; + left = tmp; + } + + if (AOP_TYPE(right) == AOP_LIT) { + lit = ulFromVal (AOP(right)->aopu.aop_lit); + } + + if ( regsInCommon(left, result) || regsInCommon(right, result) ) + preserve_result = 1; + + if(result && AOP_SIZE(result)) + generate_result = 1; + + if(generate_result && !preserve_result) + { + for(i = 0; i < AOP_SIZE(result); i++) + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),i)); + } + + assert( AOP_SIZE(left) == AOP_SIZE(right) ); + for(i=0; i < AOP_SIZE(left); i++) + { + if(AOP_TYPE(left) != AOP_ACC) + { + if(pic16_isLitOp(left)) + pic16_emitpcode(POC_MOVLW, pic16_popGet(AOP(left), i)); + else + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(left), i)); + } + if(pic16_isLitOp(right)) { + if (pic16_isLitOp(left) || (0 != ((lit >> (8*i))&0x00FF))) { + pic16_emitpcode(POC_XORLW, pic16_popGet(AOP(right), i)); + } + } else + pic16_emitpcode(POC_XORFW, pic16_popGet(AOP(right), i)); + + pic16_emitpcode(POC_BNZ,pic16_popGetLabel(falselbl->key)); + } + + // result == true + + if(generate_result && preserve_result) + { + for(i = 0; i < AOP_SIZE(result); i++) + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),i)); + } + + if(generate_result) + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result), 0)); // result = true + + if(generate_result && preserve_result) + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(donelbl->key)); + + if(ifx && IC_TRUE(ifx)) + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_TRUE(ifx)->key)); + + if(ifx && IC_FALSE(ifx)) + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(donelbl->key)); + + pic16_emitpLabel(falselbl->key); + + // result == false + + if(ifx && IC_FALSE(ifx)) + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_FALSE(ifx)->key)); + + if(generate_result && preserve_result) + { + for(i = 0; i < AOP_SIZE(result); i++) + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),i)); + } + + pic16_emitpLabel(donelbl->key); + + if(ifx) + ifx->generated = 1; + +release: + pic16_freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(result,NULL,ic,TRUE); + +} + + +#if 0 +// old version kept for reference + +/*-----------------------------------------------------------------*/ +/* genCmpEq - generates code for equal to */ +/*-----------------------------------------------------------------*/ +static void genCmpEq (iCode *ic, iCode *ifx) +{ + operand *left, *right, *result; + unsigned long lit = 0L; + int size,offset=0; + symbol *falselbl = newiTempLabel(NULL); + + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if(ifx) + DEBUGpic16_emitcode ("; ifx is non-null",""); + else + DEBUGpic16_emitcode ("; ifx is null",""); + + pic16_aopOp((left=IC_LEFT(ic)),ic,FALSE); + pic16_aopOp((right=IC_RIGHT(ic)),ic,FALSE); + pic16_aopOp((result=IC_RESULT(ic)),ic,TRUE); + + size = max(AOP_SIZE(left),AOP_SIZE(right)); + + DEBUGpic16_pic16_AopType(__LINE__,left,right,result); + + /* if literal, literal on the right or + if the right is in a pointer register and left + is not */ + if ((AOP_TYPE(IC_LEFT(ic)) == AOP_LIT)) { + operand *tmp = right ; + right = left; + left = tmp; + } + + + if(ifx && !AOP_SIZE(result)){ + symbol *tlbl; + DEBUGpic16_emitcode ("; ***","%s %d CASE 1",__FUNCTION__,__LINE__); + /* if they are both bit variables */ + if (AOP_TYPE(left) == AOP_CRY && + ((AOP_TYPE(right) == AOP_CRY) || (AOP_TYPE(right) == AOP_LIT))) { + DEBUGpic16_emitcode ("; ***","%s %d CASE 11",__FUNCTION__,__LINE__); + if(AOP_TYPE(right) == AOP_LIT){ + unsigned long lit = ulFromVal (AOP(right)->aopu.aop_lit); + if(lit == 0L){ + pic16_emitcode("mov","c,%s",AOP(left)->aopu.aop_dir); + pic16_emitcode("cpl","c"); + } else if(lit == 1L) { + pic16_emitcode("mov","c,%s",AOP(left)->aopu.aop_dir); + } else { + pic16_emitcode("clr","c"); + } + /* AOP_TYPE(right) == AOP_CRY */ + } else { + symbol *lbl = newiTempLabel(NULL); + pic16_emitcode("mov","c,%s",AOP(left)->aopu.aop_dir); + pic16_emitcode("jb","%s,%05d_DS_",AOP(right)->aopu.aop_dir,(lbl->key+100)); + pic16_emitcode("cpl","c"); + pic16_emitcode("","%05d_DS_:",(lbl->key+100)); + } + /* if true label then we jump if condition + supplied is true */ + tlbl = newiTempLabel(NULL); + if ( IC_TRUE(ifx) ) { + pic16_emitcode("jnc","%05d_DS_",tlbl->key+100); + pic16_emitcode("ljmp","%05d_DS_",IC_TRUE(ifx)->key+100); + } else { + pic16_emitcode("jc","%05d_DS_",tlbl->key+100); + pic16_emitcode("ljmp","%05d_DS_",IC_FALSE(ifx)->key+100); + } + pic16_emitcode("","%05d_DS_:",tlbl->key+100+pic16_labelOffset); + + { + /* left and right are both bit variables, result is carry */ + resolvedIfx rIfx; + + resolveIfx(&rIfx,ifx); + + pic16_emitpcode(POC_MOVLW,pic16_popGet(AOP(left),0)); + pic16_emitpcode(POC_ANDFW,pic16_popGet(AOP(left),0)); + pic16_emitpcode(POC_BTFSC,pic16_popGet(AOP(right),0)); + pic16_emitpcode(POC_ANDLW,pic16_popGet(AOP(left),0)); + genSkipz2(&rIfx,0); + } + } else { + + DEBUGpic16_emitcode ("; ***","%s %d CASE 12",__FUNCTION__,__LINE__); + + /* They're not both bit variables. Is the right a literal? */ + if(AOP_TYPE(right) == AOP_LIT) { + lit = ulFromVal (AOP(right)->aopu.aop_lit); + + switch(size) { + + case 1: + switch(lit & 0xff) { + case 1: + if ( IC_TRUE(ifx) ) { + pic16_emitpcode(POC_DECFW,pic16_popGet(AOP(left),offset)); + emitSKPNZ; + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_TRUE(ifx)->key)); + } else { + pic16_emitpcode(POC_DECFSZW,pic16_popGet(AOP(left),offset)); + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_FALSE(ifx)->key)); + } + break; + case 0xff: + if ( IC_TRUE(ifx) ) { + pic16_emitpcode(POC_INCFW,pic16_popGet(AOP(left),offset)); + emitSKPNZ; + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_TRUE(ifx)->key)); + } else { + pic16_emitpcode(POC_INCFSZW,pic16_popGet(AOP(left),offset)); + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_FALSE(ifx)->key)); + } + break; + default: + pic16_emitpcode(POC_MOVFW,pic16_popGet(AOP(left),offset)); + if(lit) + pic16_emitpcode(POC_XORLW,pic16_popGetLit(lit & 0xff)); + genSkip(ifx,'z'); + } // switch lit + + + /* end of size == 1 */ + break; + + case 2: + genc16bit2lit(left,lit,offset); + genSkip(ifx,'z'); + break; + /* end of size == 2 */ + + default: + /* size is 4 */ + if(lit==0) { + pic16_emitpcode(POC_MOVFW,pic16_popGet(AOP(left),0)); + pic16_emitpcode(POC_IORFW,pic16_popGet(AOP(left),1)); + pic16_emitpcode(POC_IORFW,pic16_popGet(AOP(left),2)); + pic16_emitpcode(POC_IORFW,pic16_popGet(AOP(left),3)); + genSkip(ifx,'z'); + } else { + /* search for patterns that can be optimized */ + + genc16bit2lit(left,lit,0); + lit >>= 16; + if(lit) { + if(IC_TRUE(ifx)) + emitSKPZ; // if hi word unequal + else + emitSKPNZ; // if hi word equal + // fail early + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(falselbl->key)); + genc16bit2lit(left,lit,2); + genSkip(ifx,'z'); + } else { + pic16_emitpcode(POC_IORFW,pic16_popGet(AOP(left),2)); + pic16_emitpcode(POC_IORFW,pic16_popGet(AOP(left),3)); + genSkip(ifx,'z'); + } + } + pic16_emitpLabel(falselbl->key); + break; + + } // switch size + + ifx->generated = 1; + goto release ; + + + } else if(AOP_TYPE(right) == AOP_CRY ) { + /* we know the left is not a bit, but that the right is */ + pic16_emitpcode(POC_MOVFW,pic16_popGet(AOP(left),offset)); + pic16_emitpcode( ( (IC_TRUE(ifx)) ? POC_BTFSC : POC_BTFSS), + pic16_popGet(AOP(right),offset)); + pic16_emitpcode(POC_XORLW,pic16_popGetLit(1)); + + /* if the two are equal, then W will be 0 and the Z bit is set + * we could test Z now, or go ahead and check the high order bytes if + * the variable we're comparing is larger than a byte. */ + + while(--size) + pic16_emitpcode(POC_IORFW,pic16_popGet(AOP(left),offset)); + + if ( IC_TRUE(ifx) ) { + emitSKPNZ; + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_TRUE(ifx)->key)); + // pic16_emitcode(" goto","_%05d_DS_",IC_TRUE(ifx)->key+100+pic16_labelOffset); + } else { + emitSKPZ; + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_FALSE(ifx)->key)); + // pic16_emitcode(" goto","_%05d_DS_",IC_FALSE(ifx)->key+100+pic16_labelOffset); + } + + } else { + /* They're both variables that are larger than bits */ + int s = size; + + tlbl = newiTempLabel(NULL); + + while(size--) { + pic16_emitpcode(POC_MOVFW,pic16_popGet(AOP(left),offset)); + pic16_emitpcode(POC_XORFW,pic16_popGet(AOP(right),offset)); + + if ( IC_TRUE(ifx) ) { + if(size) { + emitSKPZ; + + DEBUGpic16_emitcode (";","\tIC_TRUE emitSKPZ"); + + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(tlbl->key)); + pic16_emitcode(" goto","_%05d_DS_",tlbl->key+100+pic16_labelOffset); + } else { + emitSKPNZ; + + DEBUGpic16_emitcode (";","\tIC_TRUE emitSKPNZ"); + + + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_TRUE(ifx)->key)); + pic16_emitcode(" goto","_%05d_DS_",IC_TRUE(ifx)->key+100+pic16_labelOffset); + } + } else { + emitSKPZ; + + DEBUGpic16_emitcode (";","\tnot IC_TRUE emitSKPZ"); + + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_FALSE(ifx)->key)); + pic16_emitcode(" goto","_%05d_DS_",IC_FALSE(ifx)->key+100+pic16_labelOffset); + } + offset++; + } + if(s>1 && IC_TRUE(ifx)) { + pic16_emitpLabel(tlbl->key); + pic16_emitcode("","_%05d_DS_:",tlbl->key+100+pic16_labelOffset); + } + } + } + /* mark the icode as generated */ + ifx->generated = 1; + goto release ; + } + + /* if they are both bit variables */ + if (AOP_TYPE(left) == AOP_CRY && + ((AOP_TYPE(right) == AOP_CRY) || (AOP_TYPE(right) == AOP_LIT))) { + DEBUGpic16_emitcode ("; ***","%s %d CASE 2",__FUNCTION__,__LINE__); + if(AOP_TYPE(right) == AOP_LIT){ + unsigned long lit = ulFromVal (AOP(right)->aopu.aop_lit); + if(lit == 0L){ + pic16_emitcode("mov","c,%s",AOP(left)->aopu.aop_dir); + pic16_emitcode("cpl","c"); + } else if(lit == 1L) { + pic16_emitcode("mov","c,%s",AOP(left)->aopu.aop_dir); + } else { + pic16_emitcode("clr","c"); + } + /* AOP_TYPE(right) == AOP_CRY */ + } else { + symbol *lbl = newiTempLabel(NULL); + pic16_emitcode("mov","c,%s",AOP(left)->aopu.aop_dir); + pic16_emitcode("jb","%s,%05d_DS_",AOP(right)->aopu.aop_dir,(lbl->key+100)); + pic16_emitcode("cpl","c"); + pic16_emitcode("","%05d_DS_:",(lbl->key+100)); + } + /* c = 1 if egal */ + if (AOP_TYPE(result) == AOP_CRY && AOP_SIZE(result)){ + pic16_outBitC(result); + goto release ; + } + if (ifx) { + genIfxJump (ifx,"c"); + goto release ; + } + /* if the result is used in an arithmetic operation + then put the result in place */ + pic16_outBitC(result); + } else { + + DEBUGpic16_emitcode ("; ***","%s %d CASE 3",__FUNCTION__,__LINE__); + gencjne(left,right,result,ifx); +/* + if(ifx) + gencjne(left,right,newiTempLabel(NULL)); + else { + if(IC_TRUE(ifx)->key) + gencjne(left,right,IC_TRUE(ifx)->key); + else + gencjne(left,right,IC_FALSE(ifx)->key); + ifx->generated = 1; + goto release ; + } + if (AOP_TYPE(result) == AOP_CRY && AOP_SIZE(result)) { + pic16_aopPut(AOP(result),"a",0); + goto release ; + } + + if (ifx) { + genIfxJump (ifx,"a"); + goto release ; + } +*/ + /* if the result is used in an arithmetic operation + then put the result in place */ +/* + if (AOP_TYPE(result) != AOP_CRY) + pic16_outAcc(result); +*/ + /* leave the result in acc */ + } + +release: + pic16_freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(result,NULL,ic,TRUE); +} +#endif + +/*-----------------------------------------------------------------*/ +/* ifxForOp - returns the icode containing the ifx for operand */ +/*-----------------------------------------------------------------*/ +static iCode *ifxForOp ( operand *op, iCode *ic ) +{ + FENTRY2; + + /* if true symbol then needs to be assigned */ + if (IS_TRUE_SYMOP(op)) + return NULL ; + + /* if this has register type condition and + the next instruction is ifx with the same operand + and live to of the operand is upto the ifx only then */ + if (ic->next + && ic->next->op == IFX + && IC_COND(ic->next)->key == op->key + && OP_SYMBOL(op)->liveTo <= ic->next->seq + ) { + DEBUGpic16_emitcode(";", "%d %s", __LINE__, __FUNCTION__); + return ic->next; + } + + /* + if (ic->next && + ic->next->op == IFX && + IC_COND(ic->next)->key == op->key) { + DEBUGpic16_emitcode ("; WARNING ","%d IGNORING liveTo range in %s",__LINE__,__FUNCTION__); + return ic->next; + } + */ + + DEBUGpic16_emitcode ("; NULL :(","%d",__LINE__); + if (ic->next && + ic->next->op == IFX) + DEBUGpic16_emitcode ("; ic-next"," is an IFX"); + + if (ic->next && + ic->next->op == IFX && + IC_COND(ic->next)->key == op->key) { + DEBUGpic16_emitcode ("; "," key is okay"); + DEBUGpic16_emitcode ("; "," key liveTo %d, next->seq = %d", + OP_SYMBOL(op)->liveTo, + ic->next->seq); + } + +#if 0 + /* the code below is completely untested + * it just allows ulong2fs.c compile -- VR */ + + ic = ic->next; + fprintf(stderr, "WARNING (%s:%s:%d) untested hack might produce wrong code\n", + __FILE__, __FUNCTION__, __LINE__); + + /* if this has register type condition and + the next instruction is ifx with the same operand + and live to of the operand is upto the ifx only then */ + if (ic->next && + ic->next->op == IFX && + IC_COND(ic->next)->key == op->key && + OP_SYMBOL(op)->liveTo <= ic->next->seq ) + return ic->next; + + if (ic->next && + ic->next->op == IFX && + IC_COND(ic->next)->key == op->key) { + DEBUGpic16_emitcode ("; WARNING ","%d IGNORING liveTo range in %s",__LINE__,__FUNCTION__); + return ic->next; + } + + fprintf(stderr, "WARNING (%s:%s:%d) untested hack might produce wrong code (returning NULL)\n", + __FILE__, __FUNCTION__, __LINE__); + +// return ic->next->next; /* this just might work */ /* FIXME FIXME */ +#endif + + return NULL; +} +/*-----------------------------------------------------------------*/ +/* genAndOp - for && operation */ +/*-----------------------------------------------------------------*/ +static void genAndOp (iCode *ic) +{ + operand *left,*right, *result; +/* symbol *tlbl; */ + + FENTRY; + + /* note here that && operations that are in an + if statement are taken away by backPatchLabels + only those used in arthmetic operations remain */ + pic16_aopOp((left=IC_LEFT(ic)),ic,FALSE); + pic16_aopOp((right=IC_RIGHT(ic)),ic,FALSE); + pic16_aopOp((result=IC_RESULT(ic)),ic,TRUE); + + DEBUGpic16_pic16_AopType(__LINE__,left,right,result); + + pic16_emitpcode(POC_MOVFW,pic16_popGet(AOP(left),0)); + pic16_emitpcode(POC_ANDFW,pic16_popGet(AOP(right),0)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),0)); + + /* if both are bit variables */ +/* if (AOP_TYPE(left) == AOP_CRY && */ +/* AOP_TYPE(right) == AOP_CRY ) { */ +/* pic16_emitcode("mov","c,%s",AOP(left)->aopu.aop_dir); */ +/* pic16_emitcode("anl","c,%s",AOP(right)->aopu.aop_dir); */ +/* pic16_outBitC(result); */ +/* } else { */ +/* tlbl = newiTempLabel(NULL); */ +/* pic16_toBoolean(left); */ +/* pic16_emitcode("jz","%05d_DS_",tlbl->key+100); */ +/* pic16_toBoolean(right); */ +/* pic16_emitcode("","%05d_DS_:",tlbl->key+100); */ +/* pic16_outBitAcc(result); */ +/* } */ + + pic16_freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + + +/*-----------------------------------------------------------------*/ +/* genOrOp - for || operation */ +/*-----------------------------------------------------------------*/ +/* + tsd pic port - + modified this code, but it doesn't appear to ever get called +*/ + +static void genOrOp (iCode *ic) +{ + operand *left,*right, *result; + symbol *tlbl; + + FENTRY; + + /* note here that || operations that are in an + if statement are taken away by backPatchLabels + only those used in arthmetic operations remain */ + pic16_aopOp((left=IC_LEFT(ic)),ic,FALSE); + pic16_aopOp((right=IC_RIGHT(ic)),ic,FALSE); + pic16_aopOp((result=IC_RESULT(ic)),ic,TRUE); + + DEBUGpic16_pic16_AopType(__LINE__,left,right,result); + + /* if both are bit variables */ + if (AOP_TYPE(left) == AOP_CRY && + AOP_TYPE(right) == AOP_CRY ) { + pic16_emitcode("clrc",""); + pic16_emitcode("btfss","(%s >> 3), (%s & 7)", + AOP(left)->aopu.aop_dir, + AOP(left)->aopu.aop_dir); + pic16_emitcode("btfsc","(%s >> 3), (%s & 7)", + AOP(right)->aopu.aop_dir, + AOP(right)->aopu.aop_dir); + pic16_emitcode("setc",""); + + } else { + tlbl = newiTempLabel(NULL); + pic16_toBoolean(left); + emitSKPZ; + pic16_emitcode("goto","%05d_DS_",tlbl->key+100+pic16_labelOffset); + pic16_toBoolean(right); + pic16_emitcode("","%05d_DS_:",tlbl->key+100+pic16_labelOffset); + + pic16_outBitAcc(result); + } + + pic16_freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* isLiteralBit - test if lit == 2^n */ +/*-----------------------------------------------------------------*/ +static int isLiteralBit(unsigned long lit) +{ + unsigned long pw[32] = {1L,2L,4L,8L,16L,32L,64L,128L, + 0x100L,0x200L,0x400L,0x800L, + 0x1000L,0x2000L,0x4000L,0x8000L, + 0x10000L,0x20000L,0x40000L,0x80000L, + 0x100000L,0x200000L,0x400000L,0x800000L, + 0x1000000L,0x2000000L,0x4000000L,0x8000000L, + 0x10000000L,0x20000000L,0x40000000L,0x80000000L}; + int idx; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + for(idx = 0; idx < 32; idx++) + if(lit == pw[idx]) + return idx+1; + return 0; +} + +/*-----------------------------------------------------------------*/ +/* continueIfTrue - */ +/*-----------------------------------------------------------------*/ +static void continueIfTrue (iCode *ic) +{ + FENTRY; + if(IC_TRUE(ic)) + pic16_emitcode("ljmp","%05d_DS_",IC_TRUE(ic)->key+100); + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* jmpIfTrue - */ +/*-----------------------------------------------------------------*/ +static void jumpIfTrue (iCode *ic) +{ + FENTRY; + if(!IC_TRUE(ic)) + pic16_emitcode("ljmp","%05d_DS_",IC_FALSE(ic)->key+100); + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* jmpTrueOrFalse - */ +/*-----------------------------------------------------------------*/ +static void jmpTrueOrFalse (iCode *ic, symbol *tlbl) +{ + // ugly but optimized by peephole + FENTRY; + if(IC_TRUE(ic)){ + symbol *nlbl = newiTempLabel(NULL); + pic16_emitcode("sjmp","%05d_DS_",nlbl->key+100); + pic16_emitcode("","%05d_DS_:",tlbl->key+100); + pic16_emitcode("ljmp","%05d_DS_",IC_TRUE(ic)->key+100); + pic16_emitcode("","%05d_DS_:",nlbl->key+100); + } else { + pic16_emitcode("ljmp","%05d_DS_",IC_FALSE(ic)->key+100); + pic16_emitcode("","%05d_DS_:",tlbl->key+100); + } + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genAnd - code for and */ +/*-----------------------------------------------------------------*/ +static void genAnd (iCode *ic, iCode *ifx) +{ + operand *left, *right, *result; + int size, offset = 0; + unsigned long lit = 0L; + resolvedIfx rIfx; + + FENTRY; + + pic16_aopOp ((left = IC_LEFT (ic)), ic, FALSE); + pic16_aopOp ((right = IC_RIGHT (ic)), ic, FALSE); + pic16_aopOp ((result = IC_RESULT (ic)), ic, TRUE); + + resolveIfx (&rIfx, ifx); + + /* if left is a literal & right is not then exchange them */ + if ((AOP_TYPE (left) == AOP_LIT && AOP_TYPE (right) != AOP_LIT) || + AOP_NEEDSACC (left)) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if result = right then exchange them */ + if (pic16_sameRegs (AOP (result), AOP (right))) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if right is bit then exchange them */ + if (AOP_TYPE (right) == AOP_CRY && + AOP_TYPE (left) != AOP_CRY) + { + operand *tmp = right; + right = left; + left = tmp; + } + + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + size = AOP_SIZE (result); + + DEBUGpic16_pic16_AopType (__LINE__, left, right, result); + + // if(bit & yy) + // result = bit & yy; + if (AOP_TYPE(left) == AOP_CRY){ + // c = bit & literal; + if(AOP_TYPE(right) == AOP_LIT){ + if(lit & 1) { + if(size && pic16_sameRegs(AOP(result),AOP(left))) + // no change + goto release; + pic16_emitcode("mov","c,%s",AOP(left)->aopu.aop_dir); + } else { + // bit(result) = 0; + if(size && (AOP_TYPE(result) == AOP_CRY)){ + pic16_emitcode("clr","%s",AOP(result)->aopu.aop_dir); + goto release; + } + if((AOP_TYPE(result) == AOP_CRY) && ifx){ + jumpIfTrue(ifx); + goto release; + } + pic16_emitcode("clr","c"); + } + } else { + if (AOP_TYPE(right) == AOP_CRY){ + // c = bit & bit; + pic16_emitcode("mov","c,%s",AOP(right)->aopu.aop_dir); + pic16_emitcode("anl","c,%s",AOP(left)->aopu.aop_dir); + } else { + // c = bit & val; + MOVA(pic16_aopGet(AOP(right),0,FALSE,FALSE)); + // c = lsb + pic16_emitcode("rrc","a"); + pic16_emitcode("anl","c,%s",AOP(left)->aopu.aop_dir); + } + } + // bit = c + // val = c + if(size) + pic16_outBitC(result); + // if(bit & ...) + else if((AOP_TYPE(result) == AOP_CRY) && ifx) + genIfxJump(ifx, "c"); + goto release ; + } + + // if (val & 0xZZ) - size = 0, ifx != FALSE - + // bit = val & 0xZZ - size = 1, ifx = FALSE - + if ((AOP_TYPE (right) == AOP_LIT) && + (AOP_TYPE (result) == AOP_CRY) && + (AOP_TYPE (left) != AOP_CRY)) + { + symbol *tlbl = newiTempLabel (NULL); + int sizel = AOP_SIZE (left); + int nonnull = 0; + char emitBra; + + if (size) + emitSETC; + + /* get number of non null bytes in literal */ + while (sizel--) + { + if (lit & (0xff << (sizel * 8))) + ++nonnull; + } + + emitBra = nonnull || rIfx.condition; + + for (sizel = AOP_SIZE (left); sizel--; ++offset, lit >>= 8) + { + unsigned char bytelit = lit; + + if (bytelit != 0) + { + int posbit; + + --nonnull; + + /* patch provided by Aaron Colwell */ + if ((posbit = isLiteralBit (bytelit)) != 0) + { + if (nonnull) + { + pic16_emitpcode (POC_BTFSC, pic16_newpCodeOpBit(pic16_aopGet (AOP (left), offset, FALSE, FALSE), posbit - 1, 0, PO_GPR_REGISTER)); + pic16_emitpcode (POC_GOTO, pic16_popGetLabel (rIfx.condition ? rIfx.lbl->key : tlbl->key)); + } + else + { + pic16_emitpcode (rIfx.condition ? POC_BTFSC :POC_BTFSS, pic16_newpCodeOpBit(pic16_aopGet (AOP (left), offset, FALSE, FALSE), posbit - 1, 0, PO_GPR_REGISTER)); + } + } + else + { + if (bytelit == 0xff) + { + /* Aaron had a MOVF instruction here, changed to MOVFW cause + * a peephole could optimize it out -- VR */ + pic16_emitpcode (POC_MOVFW, pic16_popGet (AOP (left), offset)); + } + else + { + pic16_emitpcode (POC_MOVFW, pic16_popGet (AOP (left), offset)); + pic16_emitpcode (POC_ANDLW, pic16_popGetLit (bytelit)); + } + if (nonnull) + { + if (rIfx.condition) + { + emitSKPZ; + pic16_emitpcode (POC_GOTO, pic16_popGetLabel (rIfx.lbl->key)); /* to false */ + } + else + { + pic16_emitpcode (POC_BNZ, pic16_popGetLabel (tlbl->key)); /* to true */ + } + } + else + { + /* last non null byte */ + if (rIfx.condition) + emitSKPZ; + else + emitSKPNZ; + } + } + } + } + + // bit = left & literal + if (size) + { + emitCLRC; + pic16_emitpLabel (tlbl->key); + } + + // if(left & literal) + else + { + if (ifx) + { + if (emitBra) + pic16_emitpcode (POC_GOTO, pic16_popGetLabel (rIfx.lbl->key)); + ifx->generated = 1; + } + pic16_emitpLabel (tlbl->key); + goto release; + } + pic16_outBitC (result); + goto release; + } + + /* if left is same as result */ + if(pic16_sameRegs(AOP(result),AOP(left))){ + int know_W = -1; + for(;size--; offset++,lit>>=8) { + if(AOP_TYPE(right) == AOP_LIT){ + switch(lit & 0xff) { + case 0x00: + /* and'ing with 0 has clears the result */ +// pic16_emitcode("clrf","%s",pic16_aopGet(AOP(result),offset,FALSE,FALSE)); + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),offset)); + break; + case 0xff: + /* and'ing with 0xff is a nop when the result and left are the same */ + break; + + default: + { + int p = pic16_my_powof2( (~lit) & 0xff ); + if(p>=0) { + /* only one bit is set in the literal, so use a bcf instruction */ +// pic16_emitcode("bcf","%s,%d",pic16_aopGet(AOP(left),offset,FALSE,TRUE),p); + pic16_emitpcode(POC_BCF,pic16_newpCodeOpBit(pic16_aopGet(AOP(left),offset,FALSE,FALSE),p,0, PO_GPR_REGISTER)); + + } else { + pic16_emitcode("movlw","0x%x", (lit & 0xff)); + pic16_emitcode("andwf","%s,f",pic16_aopGet(AOP(left),offset,FALSE,TRUE)); + if(know_W != (lit&0xff)) + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(lit & 0xff)); + know_W = lit &0xff; + pic16_emitpcode(POC_ANDWF,pic16_popGet(AOP(left),offset)); + } + } + } + } else { + if (AOP_TYPE(left) == AOP_ACC) { + pic16_emitpcode(POC_ANDFW,pic16_popGet(AOP(right),offset)); + } else { + pic16_emitpcode(POC_MOVFW,pic16_popGet(AOP(right),offset)); + pic16_emitpcode(POC_ANDWF,pic16_popGet(AOP(left),offset)); + + } + } + } + + } else { + // left & result in different registers + if(AOP_TYPE(result) == AOP_CRY){ + // result = bit + // if(size), result in bit + // if(!size && ifx), conditional oper: if(left & right) + symbol *tlbl = newiTempLabel(NULL); + int sizer = min(AOP_SIZE(left),AOP_SIZE(right)); + if(size) + pic16_emitcode("setb","c"); + while(sizer--){ + MOVA(pic16_aopGet(AOP(right),offset,FALSE,FALSE)); + pic16_emitcode("anl","a,%s", + pic16_aopGet(AOP(left),offset,FALSE,FALSE)); + pic16_emitcode("jnz","%05d_DS_",tlbl->key+100); + offset++; + } + if(size){ + CLRC; + pic16_emitcode("","%05d_DS_:",tlbl->key+100); + pic16_outBitC(result); + } else if(ifx) + jmpTrueOrFalse(ifx, tlbl); + } else { + for(;(size--);offset++) { + // normal case + // result = left & right + if(AOP_TYPE(right) == AOP_LIT){ + int t = (lit >> (offset*8)) & 0x0FFL; + switch(t) { + case 0x00: + pic16_emitcode("clrf","%s", + pic16_aopGet(AOP(result),offset,FALSE,FALSE)); + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),offset)); + break; + case 0xff: + pic16_emitcode("movf","%s,w", + pic16_aopGet(AOP(left),offset,FALSE,FALSE)); + pic16_emitcode("movwf","%s", + pic16_aopGet(AOP(result),offset,FALSE,FALSE)); + pic16_emitpcode(POC_MOVFW,pic16_popGet(AOP(left),offset)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),offset)); + break; + default: + pic16_emitcode("movlw","0x%x",t); + pic16_emitcode("andwf","%s,w", + pic16_aopGet(AOP(left),offset,FALSE,FALSE)); + pic16_emitcode("movwf","%s", + pic16_aopGet(AOP(result),offset,FALSE,FALSE)); + + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(t)); + pic16_emitpcode(POC_ANDFW,pic16_popGet(AOP(left),offset)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),offset)); + } + continue; + } + + if (AOP_TYPE(left) == AOP_ACC) { + pic16_emitcode("andwf","%s,w",pic16_aopGet(AOP(right),offset,FALSE,FALSE)); + pic16_emitpcode(POC_ANDFW,pic16_popGet(AOP(right),offset)); + } else { + pic16_emitcode("movf","%s,w",pic16_aopGet(AOP(right),offset,FALSE,FALSE)); + pic16_emitcode("andwf","%s,w", + pic16_aopGet(AOP(left),offset,FALSE,FALSE)); + pic16_emitpcode(POC_MOVFW,pic16_popGet(AOP(right),offset)); + pic16_emitpcode(POC_ANDFW,pic16_popGet(AOP(left),offset)); + } + pic16_emitcode("movwf","%s",pic16_aopGet(AOP(result),offset,FALSE,FALSE)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),offset)); + } + } + } + +release : + pic16_freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genOr - code for or */ +/*-----------------------------------------------------------------*/ +static void genOr (iCode *ic, iCode *ifx) +{ + operand *left, *right, *result; + int size, offset = 0; + unsigned long lit = 0L; + resolvedIfx rIfx; + + FENTRY; + + pic16_aopOp ((left = IC_LEFT (ic)), ic, FALSE); + pic16_aopOp ((right= IC_RIGHT (ic)), ic, FALSE); + pic16_aopOp ((result=IC_RESULT (ic)), ic, TRUE); + + resolveIfx (&rIfx, ifx); + + /* if left is a literal & right is not then exchange them */ + if ((AOP_TYPE (left) == AOP_LIT && AOP_TYPE (right) != AOP_LIT) || + AOP_NEEDSACC (left)) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if result = right then exchange them */ + if (pic16_sameRegs (AOP (result), AOP (right))) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if right is bit then exchange them */ + if (AOP_TYPE (right) == AOP_CRY && + AOP_TYPE (left) != AOP_CRY) + { + operand *tmp = right; + right = left; + left = tmp; + } + + DEBUGpic16_pic16_AopType (__LINE__, left, right, result); + + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + size = AOP_SIZE (result); + + // if(bit | yy) + // xx = bit | yy; + if (AOP_TYPE(left) == AOP_CRY){ + if(AOP_TYPE(right) == AOP_LIT){ + // c = bit & literal; + if(lit){ + // lit != 0 => result = 1 + if(AOP_TYPE(result) == AOP_CRY){ + if(size) + pic16_emitpcode(POC_BSF, pic16_popGet(AOP(result),0)); + //pic16_emitcode("bsf","(%s >> 3), (%s & 7)", + // AOP(result)->aopu.aop_dir, + // AOP(result)->aopu.aop_dir); + else if(ifx) + continueIfTrue(ifx); + goto release; + } + } else { + // lit == 0 => result = left + if(size && pic16_sameRegs(AOP(result),AOP(left))) + goto release; + pic16_emitcode(";XXX mov","c,%s %s,%d",AOP(left)->aopu.aop_dir,__FILE__,__LINE__); + } + } else { + if (AOP_TYPE(right) == AOP_CRY){ + if(pic16_sameRegs(AOP(result),AOP(left))){ + // c = bit | bit; + pic16_emitpcode(POC_BCF, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(right),0)); + pic16_emitpcode(POC_BSF, pic16_popGet(AOP(result),0)); + + } else { + if( AOP_TYPE(result) == AOP_ACC) { + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(0)); + pic16_emitpcode(POC_BTFSS, pic16_popGet(AOP(right),0)); + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(left),0)); + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(1)); + + } else { + + pic16_emitpcode(POC_BCF, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_BTFSS, pic16_popGet(AOP(right),0)); + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(left),0)); + pic16_emitpcode(POC_BSF, pic16_popGet(AOP(result),0)); + + } + } + } else { + // c = bit | val; + symbol *tlbl = newiTempLabel(NULL); + pic16_emitcode(";XXX "," %s,%d",__FILE__,__LINE__); + + + pic16_emitpcode(POC_BCF, pic16_popGet(AOP(result),0)); + if( AOP_TYPE(right) == AOP_ACC) { + pic16_emitpcode(POC_IORLW, pic16_popGetLit(0)); + emitSKPNZ; + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(left),0)); + pic16_emitpcode(POC_BSF, pic16_popGet(AOP(result),0)); + } + + + + if(!((AOP_TYPE(result) == AOP_CRY) && ifx)) + pic16_emitcode(";XXX setb","c"); + pic16_emitcode(";XXX jb","%s,%05d_DS_", + AOP(left)->aopu.aop_dir,tlbl->key+100); + pic16_toBoolean(right); + pic16_emitcode(";XXX jnz","%05d_DS_",tlbl->key+100); + if((AOP_TYPE(result) == AOP_CRY) && ifx){ + jmpTrueOrFalse(ifx, tlbl); + goto release; + } else { + CLRC; + pic16_emitcode("","%05d_DS_:",tlbl->key+100); + } + } + } + // bit = c + // val = c + if(size) + pic16_outBitC(result); + // if(bit | ...) + else if((AOP_TYPE(result) == AOP_CRY) && ifx) + genIfxJump(ifx, "c"); + goto release ; + } + + // if(val | 0xZZ) - size = 0, ifx != FALSE - + // bit = val | 0xZZ - size = 1, ifx = FALSE - + if ((AOP_TYPE (right) == AOP_LIT) && + (AOP_TYPE (result) == AOP_CRY) && + (AOP_TYPE (left) != AOP_CRY)) + { + if (IS_OP_VOLATILE(left)) { + pic16_mov2w_volatile(AOP(left)); + } // if + if (lit) + { + if (rIfx.condition) + pic16_emitpcode (POC_GOTO, pic16_popGetLabel (rIfx.lbl->key)); /* to false */ + ifx->generated = 1; + } + else + wassert (0); + + goto release; + } + + /* if left is same as result */ + if(pic16_sameRegs(AOP(result),AOP(left))){ + int know_W = -1; + for(;size--; offset++,lit>>=8) { + if(AOP_TYPE(right) == AOP_LIT){ + if(((lit & 0xff) == 0) && !IS_OP_VOLATILE(left)) { + /* or'ing with 0 has no effect */ + continue; + } else { + int p = pic16_my_powof2(lit & 0xff); + if(p>=0) { + /* only one bit is set in the literal, so use a bsf instruction */ + pic16_emitpcode(POC_BSF, + pic16_newpCodeOpBit(pic16_aopGet(AOP(left),offset,FALSE,FALSE),p,0, PO_GPR_REGISTER)); + } else { + if(know_W != (lit & 0xff)) + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(lit & 0xff)); + know_W = lit & 0xff; + pic16_emitpcode(POC_IORWF, pic16_popGet(AOP(left),offset)); + } + + } + } else { + if (AOP_TYPE(left) == AOP_ACC) { + pic16_emitpcode(POC_IORFW, pic16_popGet(AOP(right),offset)); + } else { + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(right),offset)); + pic16_emitpcode(POC_IORWF, pic16_popGet(AOP(left),offset)); + } + } + } + } else { + // left & result in different registers + if(AOP_TYPE(result) == AOP_CRY){ + // result = bit + // if(size), result in bit + // if(!size && ifx), conditional oper: if(left | right) + symbol *tlbl = newiTempLabel(NULL); + int sizer = max(AOP_SIZE(left),AOP_SIZE(right)); + pic16_emitcode(";XXX "," %s,%d",__FILE__,__LINE__); + + + if(size) + pic16_emitcode(";XXX setb","c"); + while(sizer--){ + MOVA(pic16_aopGet(AOP(right),offset,FALSE,FALSE)); + pic16_emitcode(";XXX orl","a,%s", + pic16_aopGet(AOP(left),offset,FALSE,FALSE)); + pic16_emitcode(";XXX jnz","%05d_DS_",tlbl->key+100); + offset++; + } + if(size){ + CLRC; + pic16_emitcode("","%05d_DS_:",tlbl->key+100); + pic16_outBitC(result); + } else if(ifx) + jmpTrueOrFalse(ifx, tlbl); + } else for(;(size--);offset++){ + // normal case + // result = left & right + if(AOP_TYPE(right) == AOP_LIT){ + int t = (lit >> (offset*8)) & 0x0FFL; + switch(t) { + case 0x00: + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(left),offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset)); + break; + default: + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(t)); + pic16_emitpcode(POC_IORFW, pic16_popGet(AOP(left),offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset)); + } + continue; + } + + // faster than result <- left, anl result,right + // and better if result is SFR + if (AOP_TYPE(left) == AOP_ACC) { + pic16_emitpcode(POC_IORWF, pic16_popGet(AOP(right),offset)); + } else { + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(right),offset)); + pic16_emitpcode(POC_IORFW, pic16_popGet(AOP(left),offset)); + } + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset)); + } + } + +release : + pic16_freeAsmop(left,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(right,NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genXor - code for xclusive or */ +/*-----------------------------------------------------------------*/ +static void genXor (iCode *ic, iCode *ifx) +{ + operand *left, *right, *result; + int size, offset = 0; + unsigned long lit = 0L; + resolvedIfx rIfx; + + FENTRY; + + pic16_aopOp ((left = IC_LEFT (ic)), ic, FALSE); + pic16_aopOp ((right = IC_RIGHT (ic)), ic, FALSE); + pic16_aopOp ((result = IC_RESULT (ic)), ic, TRUE); + + resolveIfx (&rIfx,ifx); + + /* if left is a literal & right is not || + if left needs acc & right does not */ + if ((AOP_TYPE (left) == AOP_LIT && AOP_TYPE (right) != AOP_LIT) || + (AOP_NEEDSACC (left) && !AOP_NEEDSACC (right))) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if result = right then exchange them */ + if (pic16_sameRegs (AOP (result), AOP (right))) + { + operand *tmp = right ; + right = left; + left = tmp; + } + + /* if right is bit then exchange them */ + if (AOP_TYPE (right) == AOP_CRY && + AOP_TYPE (left) != AOP_CRY) + { + operand *tmp = right ; + right = left; + left = tmp; + } + + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + size = AOP_SIZE (result); + + // if(bit ^ yy) + // xx = bit ^ yy; + if (AOP_TYPE(left) == AOP_CRY) + { + if (AOP_TYPE(right) == AOP_LIT) + { + // c = bit & literal; + if (lit >> 1) + { + // lit>>1 != 0 => result = 1 + if (AOP_TYPE(result) == AOP_CRY) + { + if (size) + { + pic16_emitpcode(POC_BSF, pic16_popGet(AOP(result), offset)); + } + else if (ifx) + continueIfTrue(ifx); + goto release; + } + pic16_emitcode("setb", "c"); + } + else + { + // lit == (0 or 1) + if (lit == 0) + { + // lit == 0, result = left + if (size && pic16_sameRegs(AOP(result), AOP(left))) + goto release; + pic16_emitcode("mov", "c,%s", AOP(left)->aopu.aop_dir); + } + else + { + // lit == 1, result = not(left) + if (size && pic16_sameRegs(AOP(result), AOP(left))) + { + pic16_emitpcode(POC_MOVLW, pic16_popGet(AOP(result), offset)); + pic16_emitpcode(POC_XORWF, pic16_popGet(AOP(result), offset)); + pic16_emitcode("cpl", "%s", AOP(result)->aopu.aop_dir); + goto release; + } + else + { + pic16_emitcode("mov", "c,%s", AOP(left)->aopu.aop_dir); + pic16_emitcode("cpl", "c"); + } + } + } + } + else + { + // right != literal + symbol *tlbl = newiTempLabel(NULL); + if (AOP_TYPE(right) == AOP_CRY) + { + // c = bit ^ bit; + pic16_emitcode("mov", "c,%s", AOP(right)->aopu.aop_dir); + } + else + { + int sizer = AOP_SIZE(right); + // c = bit ^ val + // if val>>1 != 0, result = 1 + pic16_emitcode("setb", "c"); + while (sizer) + { + MOVA(pic16_aopGet(AOP(right), sizer - 1, FALSE, FALSE)); + if (sizer == 1) + // test the msb of the lsb + pic16_emitcode("anl", "a,#0xfe"); + pic16_emitcode("jnz", "%05d_DS_", tlbl->key+100); + sizer--; + } + // val = (0,1) + pic16_emitcode("rrc", "a"); + } + pic16_emitcode("jnb", "%s,%05d_DS_", AOP(left)->aopu.aop_dir, (tlbl->key + 100)); + pic16_emitcode("cpl", "c"); + pic16_emitcode("", "%05d_DS_:", (tlbl->key + 100)); + } + // bit = c + // val = c + if (size) + pic16_outBitC(result); + // if(bit | ...) + else if ((AOP_TYPE(result) == AOP_CRY) && ifx) + genIfxJump(ifx, "c"); + goto release; + } + + // if(val ^ 0xZZ) - size = 0, ifx != FALSE - + // bit = val ^ 0xZZ - size = 1, ifx = FALSE - + if ((AOP_TYPE (right) == AOP_LIT) && + (AOP_TYPE (result) == AOP_CRY) && + (AOP_TYPE (left) != AOP_CRY)) + { + symbol *tlbl = newiTempLabel (NULL); + int sizel; + + if (size) + emitSETC; + + for (sizel = AOP_SIZE(left); sizel--; ++offset, lit >>= 8) + { + unsigned char bytelit = lit; + + switch (bytelit) + { + case 0xff: + pic16_emitpcode (POC_COMFW, pic16_popGet (AOP (left), offset)); + break; + + case 0x00: + pic16_emitpcode (POC_MOVFW, pic16_popGet (AOP (left), offset)); + break; + + default: + pic16_emitpcode (POC_MOVLW, pic16_popGetLit (bytelit)); + pic16_emitpcode (POC_XORFW, pic16_popGet (AOP (left), offset)); + break; + } + if (sizel) + { + if (rIfx.condition) + { + /* rIfx.lbl might be far away... */ + emitSKPZ; + pic16_emitpcode (POC_GOTO, pic16_popGetLabel (rIfx.lbl->key)); /* to false */ + } + else + { + pic16_emitpcode (POC_BNZ, pic16_popGetLabel (tlbl->key)); /* to true */ + } + } + else + { + /* last non null byte */ + if (rIfx.condition) + emitSKPZ; + else + emitSKPNZ; + } + } + + // bit = left ^ literal + if (size) + { + emitCLRC; + pic16_emitpLabel (tlbl->key); + } + // if (left ^ literal) + else + { + if (ifx) + { + pic16_emitpcode (POC_GOTO, pic16_popGetLabel (rIfx.lbl->key)); + ifx->generated = 1; + } + pic16_emitpLabel (tlbl->key); + goto release; + } + + pic16_outBitC (result); + goto release; + } + + if (pic16_sameRegs(AOP(result), AOP(left))) + { + /* if left is same as result */ + for (; size--; offset++) + { + if (AOP_TYPE(right) == AOP_LIT) + { + int t = (lit >> (offset * 8)) & 0x0FFL; + if (t == 0x00L) + continue; + else + { + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(t)); + pic16_emitpcode(POC_XORWF, pic16_popGet(AOP(left), offset)); + } + } + else + { + if (AOP_TYPE(left) == AOP_ACC) + pic16_emitcode("xrl", "a,%s", pic16_aopGet(AOP(right), offset, FALSE, FALSE)); + else + { + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(right), offset)); + pic16_emitpcode(POC_XORWF, pic16_popGet(AOP(left), offset)); + } + } + } + } + else + { + // left ^ result in different registers + if (AOP_TYPE(result) == AOP_CRY) + { + // result = bit + // if(size), result in bit + // if(!size && ifx), conditional oper: if(left ^ right) + symbol *tlbl = newiTempLabel(NULL); + int sizer = max(AOP_SIZE(left), AOP_SIZE(right)); + if (size) + pic16_emitcode("setb", "c"); + while (sizer--) + { + if ((AOP_TYPE(right) == AOP_LIT) && + (((lit >> (offset*8)) & 0x0FFL) == 0x00L)) + { + MOVA(pic16_aopGet(AOP(left), offset, FALSE, FALSE)); + } + else + { + MOVA(pic16_aopGet(AOP(right), offset, FALSE, FALSE)); + pic16_emitcode("xrl", "a,%s", + pic16_aopGet(AOP(left), offset, FALSE, FALSE)); + } + pic16_emitcode("jnz", "%05d_DS_", tlbl->key + 100); + offset++; + } + if (size) + { + CLRC; + pic16_emitcode("", "%05d_DS_:", tlbl->key + 100); + pic16_outBitC(result); + } + else if (ifx) + jmpTrueOrFalse(ifx, tlbl); + } + else + { + for (; (size--); offset++) + { + // normal case + // result = left ^ right + if (AOP_TYPE(right) == AOP_LIT) + { + int t = (lit >> (offset * 8)) & 0x0FFL; + switch(t) + { + case 0x00: + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(left), offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offset)); + break; + + case 0xff: + pic16_emitpcode(POC_COMFW, pic16_popGet(AOP(left), offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offset)); + break; + + default: + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(t)); + pic16_emitpcode(POC_XORFW, pic16_popGet(AOP(left), offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offset)); + } + continue; + } + + // faster than result <- left, anl result,right + // and better if result is SFR + if (AOP_TYPE(left) == AOP_ACC) + { + pic16_emitpcode(POC_XORFW, pic16_popGet(AOP(right), offset)); + } + else + { + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(right), offset)); + pic16_emitpcode(POC_XORFW, pic16_popGet(AOP(left), offset)); + } + if ( AOP_TYPE(result) != AOP_ACC) + { + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offset)); + } + } + } + } + +release : + pic16_freeAsmop(left, NULL, ic, (RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(right, NULL, ic, (RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(result, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genInline - write the inline code out */ +/*-----------------------------------------------------------------*/ +static void genInline (iCode *ic) +{ + char *buffer, *bp, *bp1; + bool inComment = FALSE; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + _G.inLine += (!options.asmpeep); + + buffer = bp = bp1 = Safe_strdup (IC_INLINE (ic)); + + while((bp1=strstr(bp, "\\n"))) { + *bp1++ = '\n'; + *bp1++ = ' '; + bp = bp1; + } + bp = bp1 = buffer; + +#if 0 + /* This is an experimental code for #pragma inline + and is temporarily disabled for 2.5.0 release */ + if(asmInlineMap) + { + symbol *sym; + char *s; + char *cbuf; + int cblen; + + cbuf = Safe_strdup(buffer); + cblen = strlen(buffer)+1; + memset(cbuf, 0, cblen); + + bp = buffer; + bp1 = cbuf; + while(*bp) { + if(*bp != '%')*bp1++ = *bp++; + else { + int i; + + bp++; + i = *bp - '0'; + if(i>elementsInSet(asmInlineMap))break; + + bp++; + s = indexSet(asmInlineMap, i); + DEBUGpc("searching symbol s = `%s'", s); + sym = findSym(SymbolTab, NULL, s); + + if(sym->reqv) { + strcat(bp1, sym->reqv->operand.symOperand->regs[0]->name); + } else { + strcat(bp1, sym->rname); + } + + while(*bp1)bp1++; + } + + if(strlen(bp1) > cblen - 16) { + int i = strlen(cbuf); + cblen += 50; + cbuf = realloc(cbuf, cblen); + memset(cbuf+i, 0, 50); + bp1 = cbuf + i; + } + } + + free(buffer); + buffer = Safe_strdup( cbuf ); + free(cbuf); + + bp = bp1 = buffer; + } +#endif /* 0 */ + + /* emit each line as a code */ + while (*bp) + { + switch (*bp) + { + case ';': + inComment = TRUE; + ++bp; + break; + + case '\n': + inComment = FALSE; + *bp++ = '\0'; + if (*bp1) + pic16_addpCode2pBlock(pb, pic16_newpCodeAsmDir(bp1, NULL)); // inline directly, no process + bp1 = bp; + break; + + default: + /* Add \n for labels, not dirs such as c:\mydir */ + if (!inComment && (*bp == ':') && (isspace((unsigned char)bp[1]))) + { + ++bp; + *bp = '\0'; + ++bp; + /* print label, use this special format with NULL directive + * to denote that the argument should not be indented with tab */ + pic16_addpCode2pBlock(pb, pic16_newpCodeAsmDir(NULL, bp1)); // inline directly, no process + bp1 = bp; + } + else + ++bp; + break; + } + } + + if ((bp1 != bp) && *bp1) + pic16_addpCode2pBlock(pb, pic16_newpCodeAsmDir(bp1, NULL)); // inline directly, no process + + Safe_free (buffer); + + _G.inLine -= (!options.asmpeep); +} + +/*-----------------------------------------------------------------*/ +/* genRRC - rotate right with carry */ +/*-----------------------------------------------------------------*/ +static void genRRC (iCode *ic) +{ + operand *left , *result ; + int size, same; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + /* rotate right with carry */ + left = IC_LEFT(ic); + result=IC_RESULT(ic); + pic16_aopOp (left,ic,FALSE); + pic16_aopOp (result,ic,TRUE); + + DEBUGpic16_pic16_AopType(__LINE__,left,NULL,result); + + same = pic16_sameRegs(AOP(result),AOP(left)); + + size = AOP_SIZE(result); + + DEBUGpic16_emitcode ("; ***","%s %d size:%d same:%d",__FUNCTION__,__LINE__,size,same); + + /* get the lsb and put it into the carry */ + pic16_emitpcode(POC_RRCFW, pic16_popGet(AOP(left),0)); + + while(size--) { + + if(same) { + pic16_emitpcode(POC_RRCF, pic16_popGet(AOP(left),size)); + } else { + pic16_emitpcode(POC_RRCFW, pic16_popGet(AOP(left),size)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),size)); + } + } + + pic16_freeAsmop(left,NULL,ic,TRUE); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genRLC - generate code for rotate left with carry */ +/*-----------------------------------------------------------------*/ +static void genRLC (iCode *ic) +{ + operand *left , *result ; + int size, offset = 0; + int same; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* rotate right with carry */ + left = IC_LEFT(ic); + result=IC_RESULT(ic); + pic16_aopOp (left,ic,FALSE); + pic16_aopOp (result,ic,TRUE); + + DEBUGpic16_pic16_AopType(__LINE__,left,NULL,result); + + same = pic16_sameRegs(AOP(result),AOP(left)); + + /* move it to the result */ + size = AOP_SIZE(result); + + /* get the msb and put it into the carry */ + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(left),size-1)); + + offset = 0 ; + + while(size--) { + + if(same) { + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(left),offset)); + } else { + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(left),offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset)); + } + + offset++; + } + + + pic16_freeAsmop(left,NULL,ic,TRUE); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + + +/* gpasm can get the highest order bit with HIGH/UPPER + * so the following probably is not needed -- VR */ + +/*-----------------------------------------------------------------*/ +/* genGetHbit - generates code get highest order bit */ +/*-----------------------------------------------------------------*/ +static void genGetHbit (iCode *ic) +{ + operand *left, *result; + left = IC_LEFT(ic); + result=IC_RESULT(ic); + pic16_aopOp (left,ic,FALSE); + pic16_aopOp (result,ic,FALSE); + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* get the highest order byte into a */ + MOVA(pic16_aopGet(AOP(left),AOP_SIZE(left) - 1,FALSE,FALSE)); + if(AOP_TYPE(result) == AOP_CRY){ + pic16_emitcode("rlc","a"); + pic16_outBitC(result); + } + else{ + pic16_emitcode("rl","a"); + pic16_emitcode("anl","a,#0x01"); + pic16_outAcc(result); + } + + + pic16_freeAsmop(left,NULL,ic,TRUE); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + +#if 0 +/*-----------------------------------------------------------------*/ +/* AccRol - rotate left accumulator by known count */ +/*-----------------------------------------------------------------*/ +static void AccRol (int shCount) +{ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + shCount &= 0x0007; // shCount : 0..7 + switch(shCount){ + case 0 : + break; + case 1 : + pic16_emitcode("rl","a"); + break; + case 2 : + pic16_emitcode("rl","a"); + pic16_emitcode("rl","a"); + break; + case 3 : + pic16_emitcode("swap","a"); + pic16_emitcode("rr","a"); + break; + case 4 : + pic16_emitcode("swap","a"); + break; + case 5 : + pic16_emitcode("swap","a"); + pic16_emitcode("rl","a"); + break; + case 6 : + pic16_emitcode("rr","a"); + pic16_emitcode("rr","a"); + break; + case 7 : + pic16_emitcode("rr","a"); + break; + } +} +#endif + +/*-----------------------------------------------------------------*/ +/* AccLsh - left shift accumulator by known count */ +/*-----------------------------------------------------------------*/ +static void AccLsh (int shCount, int doMask) +{ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + switch(shCount){ + case 0 : + return; + break; + case 1 : + pic16_emitpcode(POC_RLNCFW,pic16_popCopyReg(&pic16_pc_wreg)); + break; + case 2 : + pic16_emitpcode(POC_RLNCFW,pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_RLNCFW,pic16_popCopyReg(&pic16_pc_wreg)); + break; + case 3 : + pic16_emitpcode(POC_SWAPFW,pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_RRNCFW,pic16_popCopyReg(&pic16_pc_wreg)); + break; + case 4 : + pic16_emitpcode(POC_SWAPFW,pic16_popCopyReg(&pic16_pc_wreg)); + break; + case 5 : + pic16_emitpcode(POC_SWAPFW,pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_RLNCFW,pic16_popCopyReg(&pic16_pc_wreg)); + break; + case 6 : + pic16_emitpcode(POC_RRNCFW,pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_RRNCFW,pic16_popCopyReg(&pic16_pc_wreg)); + break; + case 7 : + pic16_emitpcode(POC_RRNCFW,pic16_popCopyReg(&pic16_pc_wreg)); + break; + } + if (doMask) { + /* no masking is required in genPackBits */ + pic16_emitpcode(POC_ANDLW,pic16_popGetLit(SLMask[shCount])); + } +} + +/*-----------------------------------------------------------------*/ +/* AccRsh - right shift accumulator by known count */ +/*-----------------------------------------------------------------*/ +static void AccRsh (int shCount, int andmask) +{ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + assert ((shCount >= 0) && (shCount <= 8)); + switch (shCount) { + case 0 : + return; break; + case 1 : + pic16_emitpcode(POC_RRNCFW,pic16_popCopyReg(&pic16_pc_wreg)); + break; + case 2 : + pic16_emitpcode(POC_RRNCFW,pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_RRNCFW,pic16_popCopyReg(&pic16_pc_wreg)); + break; + case 3 : + pic16_emitpcode(POC_SWAPFW,pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_RLNCFW,pic16_popCopyReg(&pic16_pc_wreg)); + break; + case 4 : + pic16_emitpcode(POC_SWAPFW,pic16_popCopyReg(&pic16_pc_wreg)); + break; + case 5 : + pic16_emitpcode(POC_SWAPFW,pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_RRNCFW,pic16_popCopyReg(&pic16_pc_wreg)); + break; + case 6 : + pic16_emitpcode(POC_RLNCFW,pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_RLNCFW,pic16_popCopyReg(&pic16_pc_wreg)); + break; + case 7 : + pic16_emitpcode(POC_RLNCFW,pic16_popCopyReg(&pic16_pc_wreg)); + break; + default: + // Rotating by 8 is a NOP. + break; + } + + if (andmask) + pic16_emitpcode(POC_ANDLW,pic16_popGetLit(SRMask[shCount])); + else + DEBUGpic16_emitcode("; ***", "%s omitting masking the result", __FUNCTION__); +} + +/*-----------------------------------------------------------------*/ +/* shiftR1Left2Result - shift right one byte from left to result */ +/*-----------------------------------------------------------------*/ +static void shiftR1Left2ResultSigned (operand *left, int offl, + operand *result, int offr, + int shCount) +{ + int same; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + assert ((shCount >= 0) && (shCount <= 8)); + + same = ((left == result) || (AOP(left) == AOP(result))) && (offl == offr); + + /* Do NOT use result for intermediate results, it might be an SFR!. */ + switch (shCount) { + case 0: + if (!same) { + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + } + break; + + case 1: + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(left), offl)); + if (same) + pic16_emitpcode(POC_RRCF, pic16_popGet(AOP(result), offr)); + else { + pic16_emitpcode(POC_RRCFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + } + break; + + case 2: + pic16_emitpcode(POC_RRNCFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_RRNCFW, pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0x3f)); // keep sign bit in W<5> + pic16_emitpcode(POC_BTFSC, pic16_popCopyGPR2Bit(PCOP(&pic16_pc_wreg), 5)); + pic16_emitpcode(POC_IORLW, pic16_popGetLit(0xc0)); // sign-extend + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + case 3: + pic16_emitpcode(POC_SWAPFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_RLNCFW, pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0x1f)); // keep sign in W<4> + pic16_emitpcode(POC_BTFSC, pic16_popCopyGPR2Bit(PCOP(&pic16_pc_wreg), 4)); + pic16_emitpcode(POC_IORLW, pic16_popGetLit(0xe0)); // sign-extend + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + case 4: + pic16_emitpcode(POC_SWAPFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0x0f)); // keep sign in W<3> + pic16_emitpcode(POC_BTFSC, pic16_popCopyGPR2Bit(PCOP(&pic16_pc_wreg), 3)); + pic16_emitpcode(POC_IORLW, pic16_popGetLit(0xf0)); // sign-extend + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + case 5: + pic16_emitpcode(POC_SWAPFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_RRNCFW, pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0x07)); // keep sign in W<2> + pic16_emitpcode(POC_BTFSC, pic16_popCopyGPR2Bit(PCOP(&pic16_pc_wreg), 2)); + pic16_emitpcode(POC_IORLW, pic16_popGetLit(0xf8)); // sign-extend + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + case 6: + pic16_emitpcode(POC_RLNCFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_RLNCFW, pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0x03)); // keep sign bit in W<1> + pic16_emitpcode(POC_BTFSC, pic16_popCopyGPR2Bit(PCOP(&pic16_pc_wreg), 1)); + pic16_emitpcode(POC_IORLW, pic16_popGetLit(0xfc)); // sign-extend + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + case 7: + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(0x00)); + pic16_emitpcode(POC_BTFSC, pic16_popCopyGPR2Bit(pic16_popGet(AOP(left), offl), 7)); + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(0xff)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + default: + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result), offr)); + break; + } +} + +/*-----------------------------------------------------------------*/ +/* shiftR1Left2Result - shift right one byte from left to result */ +/*-----------------------------------------------------------------*/ +static void shiftR1Left2Result (operand *left, int offl, + operand *result, int offr, + int shCount, int sign) +{ + int same; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + assert ((shCount >= 0) && (shCount <= 8)); + + same = ((left == result) || (AOP(left) == AOP(result))) && (offl == offr); + + /* Copy the msb into the carry if signed. */ + if (sign) { + shiftR1Left2ResultSigned(left, offl, result, offr, shCount); + return; + } + + /* Do NOT use result for intermediate results, it might be an SFR!. */ + switch (shCount) { + case 0: + if (!same) { + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + } + break; + + case 1: + if (same) { + emitCLRC; + pic16_emitpcode(POC_RRCF, pic16_popGet(AOP(result), offr)); + } else { + pic16_emitpcode(POC_RRNCFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0x7f)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + } + break; + + case 2: + pic16_emitpcode(POC_RRNCFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_RRNCFW, pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0x3f)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + case 3: + pic16_emitpcode(POC_SWAPFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_RLNCFW, pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0x1f)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + case 4: + pic16_emitpcode(POC_SWAPFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0x0f)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + case 5: + pic16_emitpcode(POC_SWAPFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_RRNCFW, pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0x07)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + case 6: + pic16_emitpcode(POC_RLNCFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_RLNCFW, pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0x03)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + case 7: + pic16_emitpcode(POC_RLNCFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0x01)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + default: + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result), offr)); + break; + } +} + +/*-----------------------------------------------------------------*/ +/* shiftL1Left2Result - shift left one byte from left to result */ +/*-----------------------------------------------------------------*/ +static void shiftL1Left2Result (operand *left, int offl, + operand *result, int offr, int shCount) +{ + int same; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + assert ((shCount >= 0) && (shCount <= 8)); + + same = ((left == result) || (AOP(left) == AOP(result))) && (offl==offr); + + /* Do NOT use result for intermediate results, it might be an SFR!. */ + switch (shCount) { + case 0: + if (!same) { + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + } + break; + + case 1: + if (same) { + emitCLRC; + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(left), offl)); + } else { + pic16_emitpcode(POC_RLNCFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0xfe)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + } + break; + + case 2: + pic16_emitpcode(POC_RLNCFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_RLNCFW, pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0xfc)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + case 3: + pic16_emitpcode(POC_SWAPFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_RRNCFW, pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0xf8)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + case 4: + pic16_emitpcode(POC_SWAPFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0xf0)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + case 5: + pic16_emitpcode(POC_SWAPFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_RLNCFW, pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0xe0)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + case 6: + pic16_emitpcode(POC_RRNCFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_RRNCFW, pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0xc0)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + case 7: + pic16_emitpcode(POC_RRNCFW, pic16_popGet(AOP(left), offl)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0x80)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offr)); + break; + + default: + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result), offr)); + break; + } +} + +/*-----------------------------------------------------------------*/ +/* movLeft2Result - move byte from left to result */ +/*-----------------------------------------------------------------*/ +static void movLeft2Result (operand *left, int offl, + operand *result, int offr) +{ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if (!pic16_sameRegs(AOP(left),AOP(result)) || (offl != offr)) { + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(left),offl)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offr)); + } +} + +/*-----------------------------------------------------------------*/ +/* shiftL2Left2Result - shift left two bytes from left to result */ +/*-----------------------------------------------------------------*/ +static void shiftL2Left2Result (operand *left, int offl, + operand *result, int offr, int shCount) +{ + int same = pic16_sameRegs(AOP(result), AOP(left)); + int i; + + DEBUGpic16_emitcode ("; ***","%s %d shCount:%d same:%d offl:%d offr:%d",__FUNCTION__,__LINE__,shCount,same,offl,offr); + + if (same && (offl != offr)) { // shift bytes + if (offr > offl) { + for(i=1;i>-1;i--) { + pic16_emitpcode(POC_MOVFW,pic16_popGet(AOP(result),offl+i)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),offr+i)); + } + } else { // just treat as different later on + same = 0; + } + } + + if(same) { + switch(shCount) { + case 0: + break; + case 1: + case 2: + case 3: + + pic16_emitpcode(POC_MOVFW,pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_ADDWF,pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr+MSB16)); + + while(--shCount) { + emitCLRC; + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr+MSB16)); + } + + break; + case 4: + case 5: + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(0x0f)); + pic16_emitpcode(POC_ANDWF, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_SWAPF, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_SWAPF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_ANDFW, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_XORWF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_ADDWF, pic16_popGet(AOP(result),offr+MSB16)); + if(shCount >=5) { + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr+MSB16)); + } + break; + case 6: + pic16_emitpcode(POC_RRCF, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_RRCF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_RRCF, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_RRCF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_RRCFW, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_ANDLW,pic16_popGetLit(0xc0)); + pic16_emitpcode(POC_XORFW,pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_XORWF,pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_XORFW,pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),offr+MSB16)); + break; + case 7: + pic16_emitpcode(POC_RRCFW, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_RRCFW, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_RRCF, pic16_popGet(AOP(result),offr)); + } + + } else { + switch(shCount) { + case 0: + break; + case 1: + case 2: + case 3: + /* note, use a mov/add for the shift since the mov has a + chance of getting optimized out */ + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(left),offl)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_ADDWF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(left),offl+MSB16)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offr+MSB16)); + + while(--shCount) { + emitCLRC; + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr+MSB16)); + } + break; + + case 4: + case 5: + pic16_emitpcode(POC_SWAPFW,pic16_popGet(AOP(left),offl+MSB16)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0xF0)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_SWAPFW,pic16_popGet(AOP(left),offl)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0x0F)); + pic16_emitpcode(POC_XORWF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_ADDWF, pic16_popGet(AOP(result),offr+MSB16)); + + + if(shCount == 5) { + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr+MSB16)); + } + break; + case 6: + pic16_emitpcode(POC_RRNCFW, pic16_popGet(AOP(left),offl)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_RRNCF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_RRNCFW, pic16_popGet(AOP(left),offl+MSB16)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_RRNCF, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(0xc0)); + pic16_emitpcode(POC_ANDWF, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_ANDFW, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_XORFW, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_IORWF, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_XORWF, pic16_popGet(AOP(result),offr)); + break; + case 7: + pic16_emitpcode(POC_RRCFW, pic16_popGet(AOP(left),offl+MSB16)); + pic16_emitpcode(POC_RRCFW, pic16_popGet(AOP(left),offl)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_RRCF, pic16_popGet(AOP(result),offr)); + } + } + +} +/*-----------------------------------------------------------------*/ +/* shiftR2Left2Result - shift right two bytes from left to result */ +/*-----------------------------------------------------------------*/ +static void shiftR2Left2Result (operand *left, int offl, + operand *result, int offr, + int shCount, int sign) +{ + int same = pic16_sameRegs(AOP(result), AOP(left)); + int i; + DEBUGpic16_emitcode ("; ***","%s %d shCount:%d same:%d sign:%d",__FUNCTION__,__LINE__,shCount,same,sign); + + if (same && (offl != offr)) { // shift right bytes + if (offr < offl) { + for(i=0;i<2;i++) { + pic16_emitpcode(POC_MOVFW,pic16_popGet(AOP(result),offl+i)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),offr+i)); + } + } else { // just treat as different later on + same = 0; + } + } + + switch(shCount) { + case 0: + break; + case 1: + case 2: + case 3: + /* obtain sign from left operand */ + if(sign) + pic16_emitpcode(POC_RLCFW,pic16_popGet(AOP(left),offr+MSB16)); + else + emitCLRC; + + if(same) { + pic16_emitpcode(POC_RRCF,pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_RRCF,pic16_popGet(AOP(result),offr)); + } else { + pic16_emitpcode(POC_RRCFW, pic16_popGet(AOP(left),offl+MSB16)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_RRCFW, pic16_popGet(AOP(left),offl)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),offr)); + } + + while(--shCount) { + if(sign) + /* now get sign from already assigned result (avoid BANKSEL) */ + pic16_emitpcode(POC_RLCFW,pic16_popGet(AOP(result),offr+MSB16)); + else + emitCLRC; + pic16_emitpcode(POC_RRCF,pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_RRCF,pic16_popGet(AOP(result),offr)); + } + break; + case 4: + case 5: + if(same) { + + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(0xf0)); + pic16_emitpcode(POC_ANDWF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_SWAPF, pic16_popGet(AOP(result),offr)); + + pic16_emitpcode(POC_SWAPF, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_ANDFW, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_XORWF, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_ADDWF, pic16_popGet(AOP(result),offr)); + } else { + pic16_emitpcode(POC_SWAPFW,pic16_popGet(AOP(left),offl)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0x0f)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offr)); + + pic16_emitpcode(POC_SWAPFW,pic16_popGet(AOP(left),offl+MSB16)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(0xf0)); + pic16_emitpcode(POC_XORWF, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_ADDWF, pic16_popGet(AOP(result),offr)); + } + + if(shCount >=5) { + pic16_emitpcode(POC_RRCF, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_RRCF, pic16_popGet(AOP(result),offr)); + } + + if(sign) { + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(0xf0 + (shCount-4)*8 )); + pic16_emitpcode(POC_BTFSC, + pic16_newpCodeOpBit(pic16_aopGet(AOP(result),offr+MSB16,FALSE,FALSE),7-shCount,0, PO_GPR_REGISTER)); + pic16_emitpcode(POC_ADDWF, pic16_popGet(AOP(result),offr+MSB16)); + } + + break; + + case 6: + if(same) { + + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr+MSB16)); + + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_ANDLW,pic16_popGetLit(0x03)); + if(sign) { + pic16_emitpcode(POC_BTFSC, + pic16_newpCodeOpBit(pic16_aopGet(AOP(result),offr,FALSE,FALSE),0,0, PO_GPR_REGISTER)); + pic16_emitpcode(POC_IORLW,pic16_popGetLit(0xfc)); + } + pic16_emitpcode(POC_XORFW,pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_XORWF,pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_XORFW,pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),offr)); + } else { + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(left),offl)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(left),offl+MSB16)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(result),offr+MSB16)); + pic16_emitpcode(POC_ANDLW,pic16_popGetLit(0x03)); + if(sign) { + pic16_emitpcode(POC_BTFSC, + pic16_newpCodeOpBit(pic16_aopGet(AOP(result),offr+MSB16,FALSE,FALSE),0,0, PO_GPR_REGISTER)); + pic16_emitpcode(POC_IORLW,pic16_popGetLit(0xfc)); + } + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),offr+MSB16)); + //pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr)); + + + } + + break; + case 7: + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(left),offl)); + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(left),offl+MSB16)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),offr)); + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),offr+MSB16)); + if(sign) { + emitSKPNC; + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(result),offr+MSB16)); + } else + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),offr+MSB16)); + } +} + + +/*-----------------------------------------------------------------*/ +/* shiftLLeftOrResult - shift left one byte from left, or to result*/ +/*-----------------------------------------------------------------*/ +static void shiftLLeftOrResult (operand *left, int offl, + operand *result, int offr, int shCount) +{ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + pic16_emitpcode(POC_MOVFW,pic16_popGet(AOP(left),offl)); + /* shift left accumulator */ + AccLsh(shCount, 1); + /* or with result */ + /* back to result */ + pic16_emitpcode(POC_IORWF,pic16_popGet(AOP(result),offr)); +} + +/*-----------------------------------------------------------------*/ +/* shiftRLeftOrResult - shift right one byte from left,or to result*/ +/*-----------------------------------------------------------------*/ +static void shiftRLeftOrResult (operand *left, int offl, + operand *result, int offr, int shCount) +{ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + pic16_emitpcode(POC_MOVFW,pic16_popGet(AOP(left),offl)); + /* shift right accumulator */ + AccRsh(shCount, 1); + /* or with result */ + /* back to result */ + pic16_emitpcode(POC_IORWF,pic16_popGet(AOP(result),offr)); +} + +/*-----------------------------------------------------------------*/ +/* genlshOne - left shift a one byte quantity by known count */ +/*-----------------------------------------------------------------*/ +static void genlshOne (operand *result, operand *left, int shCount) +{ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + shiftL1Left2Result(left, LSB, result, LSB, shCount); +} + +/*-----------------------------------------------------------------*/ +/* genlshTwo - left shift two bytes by known amount != 0 */ +/*-----------------------------------------------------------------*/ +static void genlshTwo (operand *result,operand *left, int shCount) +{ + int size; + + DEBUGpic16_emitcode ("; ***","%s %d shCount:%d",__FUNCTION__,__LINE__,shCount); + size = pic16_getDataSize(result); + + /* if shCount >= 8 */ + if (shCount >= 8) { + shCount -= 8 ; + + if (size > 1){ + if (shCount) + shiftL1Left2Result(left, LSB, result, MSB16, shCount); + else + movLeft2Result(left, LSB, result, MSB16); + } + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),LSB)); + } + + /* 1 <= shCount <= 7 */ + else { + if(size == 1) + shiftL1Left2Result(left, LSB, result, LSB, shCount); + else + shiftL2Left2Result(left, LSB, result, LSB, shCount); + } +} + +/*-----------------------------------------------------------------*/ +/* shiftLLong - shift left one long from left to result */ +/* offr = LSB or MSB16 */ +/*-----------------------------------------------------------------*/ +static void shiftLLong (operand *left, operand *result, int offr ) +{ + int size = AOP_SIZE(result); + int same = pic16_sameRegs(AOP(left),AOP(result)); + int i; + + DEBUGpic16_emitcode ("; ***","%s %d offr:%d size:%d",__FUNCTION__,__LINE__,offr,size); + + if (same && (offr == MSB16)) { //shift one byte + for(i=size-1;i>=MSB16;i--) { + pic16_emitpcode(POC_MOVFW,pic16_popGet(AOP(left),i-1)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(left),i)); + } + } else { + pic16_emitpcode(POC_MOVFW,pic16_popGet(AOP(left),LSB)); + } + + if (size > LSB+offr ){ + if (same) { + pic16_emitpcode(POC_ADDWF,pic16_popGet(AOP(left),LSB+offr)); + } else { + pic16_emitpcode(POC_ADDFW,pic16_popGet(AOP(left),LSB)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),LSB+offr)); + } + } + + if(size > MSB16+offr){ + if (same) { + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(left),MSB16+offr)); + } else { + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(left),MSB16)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),MSB16+offr)); + } + } + + if(size > MSB24+offr){ + if (same) { + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(left),MSB24+offr)); + } else { + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(left),MSB24)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),MSB24+offr)); + } + } + + if(size > MSB32+offr){ + if (same) { + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(left),MSB32+offr)); + } else { + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(left),MSB32)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),MSB32+offr)); + } + } + if(offr != LSB) + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),LSB)); + +} + +/*-----------------------------------------------------------------*/ +/* genlshFour - shift four byte by a known amount != 0 */ +/*-----------------------------------------------------------------*/ +static void genlshFour (operand *result, operand *left, int shCount) +{ + int size; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + size = AOP_SIZE(result); + + /* if shifting more that 3 bytes */ + if (shCount >= 24 ) { + shCount -= 24; + if (shCount) + /* lowest order of left goes to the highest + order of the destination */ + shiftL1Left2Result(left, LSB, result, MSB32, shCount); + else + movLeft2Result(left, LSB, result, MSB32); + + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),LSB)); + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),MSB16)); + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),MSB24)); + + return; + } + + /* more than two bytes */ + else if ( shCount >= 16 ) { + /* lower order two bytes goes to higher order two bytes */ + shCount -= 16; + /* if some more remaining */ + if (shCount) + shiftL2Left2Result(left, LSB, result, MSB24, shCount); + else { + movLeft2Result(left, MSB16, result, MSB32); + movLeft2Result(left, LSB, result, MSB24); + } + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),LSB)); + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),MSB16)); + return; + } + + /* if more than 1 byte */ + else if ( shCount >= 8 ) { + /* lower order three bytes goes to higher order three bytes */ + shCount -= 8; + if(size == 2){ + if(shCount) + shiftL1Left2Result(left, LSB, result, MSB16, shCount); + else + movLeft2Result(left, LSB, result, MSB16); + } + else{ /* size = 4 */ + if(shCount == 0){ + movLeft2Result(left, MSB24, result, MSB32); + movLeft2Result(left, MSB16, result, MSB24); + movLeft2Result(left, LSB, result, MSB16); + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),LSB)); + } + else if(shCount == 1) + shiftLLong(left, result, MSB16); + else{ + shiftL2Left2Result(left, MSB16, result, MSB24, shCount); + shiftL1Left2Result(left, LSB, result, MSB16, shCount); + shiftRLeftOrResult(left, LSB, result, MSB24, 8 - shCount); + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),LSB)); + } + } + } + + /* 1 <= shCount <= 7 */ + else if(shCount <= 3) + { + shiftLLong(left, result, LSB); + while(--shCount >= 1) + shiftLLong(result, result, LSB); + } + /* 3 <= shCount <= 7, optimize */ + else{ + shiftL2Left2Result(left, MSB24, result, MSB24, shCount); + shiftRLeftOrResult(left, MSB16, result, MSB24, 8 - shCount); + shiftL2Left2Result(left, LSB, result, LSB, shCount); + } +} + +/*-----------------------------------------------------------------*/ +/* genLeftShiftLiteral - left shifting by known count */ +/*-----------------------------------------------------------------*/ +void pic16_genLeftShiftLiteral (operand *left, + operand *right, + operand *result, + iCode *ic) +{ + int shCount = abs((int) ulFromVal (AOP(right)->aopu.aop_lit)); + int size; + + FENTRY; + DEBUGpic16_emitcode ("; ***","shCount:%d", shCount); + pic16_freeAsmop(right,NULL,ic,TRUE); + + pic16_aopOp(left,ic,FALSE); + pic16_aopOp(result,ic,TRUE); + + size = getSize(operandType(result)); + +#if VIEW_SIZE + pic16_emitcode("; shift left ","result %d, left %d",size, + AOP_SIZE(left)); +#endif + + /* I suppose that the left size >= result size */ + if(shCount == 0){ + while(size--){ + movLeft2Result(left, size, result, size); + } + } + + else if(shCount >= (size * 8)) + while(size--) + pic16_aopPut(AOP(result),zero,size); + else{ + switch (size) { + case 1: + genlshOne (result,left,shCount); + break; + + case 2: + case 3: + genlshTwo (result,left,shCount); + break; + + case 4: + genlshFour (result,left,shCount); + break; + } + } + pic16_freeAsmop(left,NULL,ic,TRUE); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------* + * genMultiAsm - repeat assembly instruction for size of register. + * if endian == 1, then the high byte (i.e base address + size of + * register) is used first else the low byte is used first; + *-----------------------------------------------------------------*/ +static void genMultiAsm( PIC_OPCODE poc, operand *reg, int size, int endian) +{ + + int offset = 0; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if(!reg) + return; + + if(!endian) { + endian = 1; + } else { + endian = -1; + offset = size-1; + } + + while(size--) { + pic16_emitpcode(poc, pic16_popGet(AOP(reg),offset)); + offset += endian; + } + +} + +/*-----------------------------------------------------------------*/ +/* genrshOne - right shift a one byte quantity by known count */ +/*-----------------------------------------------------------------*/ +static void genrshOne (operand *result, operand *left, + int shCount, int sign) +{ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + shiftR1Left2Result(left, LSB, result, LSB, shCount, sign); +} + +/*-----------------------------------------------------------------*/ +/* genrshTwo - right shift two bytes by known amount != 0 */ +/*-----------------------------------------------------------------*/ +static void genrshTwo (operand *result,operand *left, + int shCount, int sign) +{ + DEBUGpic16_emitcode ("; ***","%s %d shCount:%d",__FUNCTION__,__LINE__,shCount); + /* if shCount >= 8 */ + if (shCount >= 8) { + shCount -= 8 ; + if (shCount) + shiftR1Left2Result(left, MSB16, result, LSB, + shCount, sign); + else + movLeft2Result(left, MSB16, result, LSB); + + pic16_addSign (result, 1, sign); + } + + /* 1 <= shCount <= 7 */ + else + shiftR2Left2Result(left, LSB, result, LSB, shCount, sign); +} + +/*-----------------------------------------------------------------*/ +/* shiftRLong - shift right one long from left to result */ +/* offl = LSB or MSB16 */ +/*-----------------------------------------------------------------*/ +static void shiftRLong (operand *left, int offl, + operand *result, int sign) +{ + int size = AOP_SIZE(result); + int same = pic16_sameRegs(AOP(left),AOP(result)); + int i; + DEBUGpic16_emitcode ("; ***","%s %d offl:%d size:%d",__FUNCTION__,__LINE__,offl,size); + + if (same && (offl == MSB16)) { //shift one byte right + for(i=MSB16;i= 24 ) { + shCount -= 24; + if(shCount) + shiftR1Left2Result(left, MSB32, result, LSB, shCount, sign); + else + movLeft2Result(left, MSB32, result, LSB); + + pic16_addSign(result, MSB16, sign); + } + else if(shCount >= 16){ + shCount -= 16; + if(shCount) + shiftR2Left2Result(left, MSB24, result, LSB, shCount, sign); + else{ + movLeft2Result(left, MSB24, result, LSB); + movLeft2Result(left, MSB32, result, MSB16); + } + pic16_addSign(result, MSB24, sign); + } + else if(shCount >= 8){ + shCount -= 8; + if(shCount == 1) + shiftRLong(left, MSB16, result, sign); + else if(shCount == 0){ + movLeft2Result(left, MSB16, result, LSB); + movLeft2Result(left, MSB24, result, MSB16); + movLeft2Result(left, MSB32, result, MSB24); + pic16_addSign(result, MSB32, sign); + } + else{ //shcount >= 2 + shiftR2Left2Result(left, MSB16, result, LSB, shCount, 0); + shiftLLeftOrResult(left, MSB32, result, MSB16, 8 - shCount); + /* the last shift is signed */ + shiftR1Left2Result(left, MSB32, result, MSB24, shCount, sign); + pic16_addSign(result, MSB32, sign); + } + } + else{ /* 1 <= shCount <= 7 */ + if(shCount <= 2){ + shiftRLong(left, LSB, result, sign); + if(shCount == 2) + shiftRLong(result, LSB, result, sign); + } + else{ + shiftR2Left2Result(left, LSB, result, LSB, shCount, 0); + shiftLLeftOrResult(left, MSB24, result, MSB16, 8 - shCount); + shiftR2Left2Result(left, MSB24, result, MSB24, shCount, sign); + } + } +} + +/*-----------------------------------------------------------------*/ +/* genRightShiftLiteral - right shifting by known count */ +/*-----------------------------------------------------------------*/ +static void genRightShiftLiteral (operand *left, + operand *right, + operand *result, + iCode *ic, + int sign) +{ + int shCount = abs((int) ulFromVal (AOP(right)->aopu.aop_lit)); + int lsize,res_size; + + pic16_freeAsmop(right,NULL,ic,TRUE); + + pic16_aopOp(left,ic,FALSE); + pic16_aopOp(result,ic,TRUE); + + DEBUGpic16_emitcode ("; ***","%s %d shCount:%d result:%d left:%d",__FUNCTION__,__LINE__,shCount,AOP_SIZE(result),AOP_SIZE(left)); + +#if VIEW_SIZE + pic16_emitcode("; shift right ","result %d, left %d",AOP_SIZE(result), + AOP_SIZE(left)); +#endif + + lsize = pic16_getDataSize(left); + res_size = pic16_getDataSize(result); + /* test the LEFT size !!! */ + + /* I suppose that the left size >= result size */ + if (shCount == 0) { + assert (res_size <= lsize); + while (res_size--) { + pic16_mov2f (AOP(result), AOP(left), res_size); + } // for + } else if (shCount >= (lsize * 8)) { + if (sign) { + /* + * Do NOT use + * CLRF result + * BTFSC left, 7 + * SETF result + * even for 8-bit operands; result might be an SFR. + */ + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(0x00)); + pic16_emitpcode(POC_BTFSC, pic16_popCopyGPR2Bit(pic16_popGet(AOP(left), lsize-1), 7)); + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(0xff)); + while (res_size--) { + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), res_size)); + } + } else { // unsigned + while (res_size--) { + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result), res_size)); + } + } + } else { // 0 < shCount < 8*lsize + switch (res_size) { + case 1: + genrshOne (result,left,shCount,sign); + break; + + case 2: + genrshTwo (result,left,shCount,sign); + break; + + case 4: + genrshFour (result,left,shCount,sign); + break; + default : + break; + } + } + + pic16_freeAsmop(left,NULL,ic,TRUE); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genGenericShift - generates code for left or right shifting */ +/*-----------------------------------------------------------------*/ +static void genGenericShift (iCode *ic, int isShiftLeft) +{ + operand *left,*right, *result; + int offset; + int sign, signedCount; + symbol *label_complete, *label_loop_pos, *label_loop_neg, *label_negative; + PIC_OPCODE pos_shift, neg_shift; + + FENTRY; + + right = IC_RIGHT(ic); + left = IC_LEFT(ic); + result = IC_RESULT(ic); + + pic16_aopOp(right,ic,FALSE); + pic16_aopOp(left,ic,FALSE); + pic16_aopOp(result,ic,TRUE); + + sign = !SPEC_USIGN(operandType (left)); + signedCount = !SPEC_USIGN(operandType (right)); + + /* if the shift count is known then do it + as efficiently as possible */ + if (AOP_TYPE(right) == AOP_LIT) { + long lit = (long) ulFromVal (AOP(right)->aopu.aop_lit); + if (signedCount && lit < 0) { lit = -lit; isShiftLeft = !isShiftLeft; } + // we should modify right->aopu.aop_lit here! + // Instead we use abs(shCount) in genXXXShiftLiteral()... + // lit > 8*size is handled in pic16_genXXXShiftLiteral() + if (isShiftLeft) + pic16_genLeftShiftLiteral (left,right,result,ic); + else + genRightShiftLiteral (left,right,result,ic, sign); + + goto release; + } // if (right is literal) + + /* shift count is unknown then we have to form a loop. + * Note: we take only the lower order byte since shifting + * more than 32 bits make no sense anyway, ( the + * largest size of an object can be only 32 bits ) + * Note: we perform arithmetic shifts if the left operand is + * signed and we do an (effective) right shift, i. e. we + * shift in the sign bit from the left. */ + + label_complete = newiTempLabel ( NULL ); + label_loop_pos = newiTempLabel ( NULL ); + label_loop_neg = NULL; + label_negative = NULL; + pos_shift = isShiftLeft ? POC_RLCF : POC_RRCF; + neg_shift = isShiftLeft ? POC_RRCF : POC_RLCF; + + if (signedCount) { + // additional labels needed + label_loop_neg = newiTempLabel ( NULL ); + label_negative = newiTempLabel ( NULL ); + } // if + + // copy source to result -- this will effectively truncate the left operand to the size of result! + // (e.g. char c = 0x100 << -3 will become c = 0x00 >> 3 == 0x00 instad of 0x20) + // This is fine, as it only occurs for left shifting with negative count which is not standardized! + for (offset=0; offset < min(AOP_SIZE(left), AOP_SIZE(result)); offset++) { + pic16_mov2f (AOP(result),AOP(left), offset); + } // for + + // if result is longer than left, fill with zeros (or sign) + if (AOP_SIZE(left) < AOP_SIZE(result)) { + if (sign && AOP_SIZE(left) > 0) { + // shift signed operand -- fill with sign + pic16_emitpcode (POC_CLRF, pic16_popCopyReg (&pic16_pc_wreg)); + pic16_emitpcode (POC_BTFSC, pic16_popCopyGPR2Bit(pic16_popGet(AOP(result), AOP_SIZE(left)-1), 7)); + pic16_emitpcode (POC_MOVLW, pic16_popGetLit (0xFF)); + for (offset=AOP_SIZE(left); offset < AOP_SIZE(result); offset++) { + pic16_emitpcode (POC_MOVWF, pic16_popGet (AOP(result), offset)); + } // for + } else { + // shift unsigned operand -- fill result with zeros + for (offset=AOP_SIZE(left); offset < AOP_SIZE(result); offset++) { + pic16_emitpcode (POC_CLRF, pic16_popGet (AOP(result), offset)); + } // for + } + } // if (size mismatch) + + pic16_mov2w (AOP(right), 0); + pic16_emitpcode (POC_BZ, pic16_popGetLabel (label_complete->key)); + if (signedCount) pic16_emitpcode (POC_BN, pic16_popGetLabel (label_negative->key)); + +#if 0 + // perform a shift by one (shift count is positive) + // cycles used for shifting {unsigned,signed} values on n bytes by [unsigned,signed] shift count c>0: + // 2n+[2,3]+({1,3}+n+3)c-2+[0,2]=({4,6}+n)c+2n+[0,3] ({5,7}c+[2,5] / {6,8}c+[4, 7] / {8,10}c+[ 8,11]) + pic16_emitpLabel (label_loop_pos->key); + emitCLRC; + if (sign && (pos_shift == POC_RRCF)) { + pic16_emitpcode (POC_BTFSC, pic16_popCopyGPR2Bit(pic16_popGet(AOP(result), AOP_SIZE(result)-1), 7)); + emitSETC; + } // if + genMultiAsm (pos_shift, result, AOP_SIZE(result), pos_shift == POC_RRCF); + pic16_emitpcode (POC_DECFSZ, pic16_popCopyReg (&pic16_pc_wreg)); + pic16_emitpcode (POC_BRA, pic16_popGetLabel (label_loop_pos->key)); +#else + // perform a shift by one (shift count is positive) + // cycles used for shifting {unsigned,signed} values on n bytes by [unsigned,signed] shift count c>0: + // 2n+[2,3]+2+({0,2}+n+3)c-1+[0,2]=({3,5}+n)c+2n+[3,6] ({4,6}c+[5,8] / {5,7}c+[7,10] / {7, 9}c+[11,14]) + // This variant is slower for 0key); + if (sign && (pos_shift == POC_RRCF)) { + pic16_emitpcode (POC_BTFSC, pic16_popCopyGPR2Bit(pic16_popGet(AOP(result), AOP_SIZE(result)-1), 7)); + emitSETC; + } // if + genMultiAsm (pos_shift, result, AOP_SIZE(result), pos_shift == POC_RRCF); + //pic16_emitpcode (POC_INCF, pic16_popCopyReg (&pic16_pc_wreg)); // gpsim does not like this... + pic16_emitpcode (POC_ADDLW, pic16_popGetLit (0x01)); + pic16_emitpcode (POC_BNC, pic16_popGetLabel (label_loop_pos->key)); +#endif + + if (signedCount) { + pic16_emitpcode (POC_BRA, pic16_popGetLabel (label_complete->key)); + + pic16_emitpLabel (label_negative->key); + // perform a shift by -1 (shift count is negative) + // 2n+4+1+({0,2}+n+3)*c-1=({3,5}+n)c+2n+4 ({4,6}c+6 / {5,7}c+8 / {7,9}c+12) + emitCLRC; + pic16_emitpLabel (label_loop_neg->key); + if (sign && (neg_shift == POC_RRCF)) { + pic16_emitpcode (POC_BTFSC, pic16_popCopyGPR2Bit(pic16_popGet(AOP(result), AOP_SIZE(result)-1), 7)); + emitSETC; + } // if + genMultiAsm (neg_shift, result, AOP_SIZE(result), neg_shift == POC_RRCF); + //pic16_emitpcode (POC_INCF, pic16_popCopyReg (&pic16_pc_wreg)); // gpsim does not like this... + pic16_emitpcode (POC_ADDLW, pic16_popGetLit (0x01)); + pic16_emitpcode (POC_BNC, pic16_popGetLabel (label_loop_neg->key)); + } // if (signedCount) + + pic16_emitpLabel (label_complete->key); + +release: + pic16_freeAsmop (right,NULL,ic,TRUE); + pic16_freeAsmop(left,NULL,ic,TRUE); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + +static void genLeftShift (iCode *ic) { + genGenericShift (ic, 1); +} + +static void genRightShift (iCode *ic) { + genGenericShift (ic, 0); +} + + +/* load FSR0 with address of/from op according to pic16_isLitOp() or if lit is 1 */ +void pic16_loadFSR0(operand *op, int lit) +{ + if((IS_SYMOP(op) && OP_SYMBOL(op)->remat) || pic16_isLitOp( op )) { + if (AOP_TYPE(op) == AOP_LIT) { + /* handle 12 bit integers correctly */ + unsigned int val = (unsigned int) ulFromVal (AOP(op)->aopu.aop_lit); + if ((val & 0x0fff) != val) { + fprintf (stderr, "WARNING: Accessing memory at 0x%x truncated to 0x%x.\n", + val, (val & 0x0fff) ); + val &= 0x0fff; + } + pic16_emitpcode(POC_LFSR, pic16_popGetLit2(0, pic16_popGetLit12(val))); + } else { + pic16_emitpcode(POC_LFSR, pic16_popGetLit2(0, pic16_popGet(AOP(op), 0))); + } + } else { + assert (!IS_SYMOP(op) || !OP_SYMBOL(op)->remat); + // set up FSR0 with address of result + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popGet(AOP(op),0), pic16_popCopyReg(&pic16_pc_fsr0l))); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popGet(AOP(op),1), pic16_popCopyReg(&pic16_pc_fsr0h))); + } +} + +/*----------------------------------------------------------------*/ +/* pic16_derefPtr - move one byte from the location ptr points to */ +/* to WREG (doWrite == 0) or one byte from WREG */ +/* to the location ptr points to (doWrite != 0) */ +/*----------------------------------------------------------------*/ +static void pic16_derefPtr (operand *ptr, int p_type, int doWrite, int *fsr0_setup) +{ + if (!IS_PTR(operandType(ptr))) + { + if (doWrite) pic16_emitpcode (POC_MOVWF, pic16_popGet (AOP(ptr), 0)); + else pic16_mov2w (AOP(ptr), 0); + return; + } + + //assert (IS_DECL(operandType(ptr)) && (p_type == DCL_TYPE(operandType(ptr)))); + /* We might determine pointer type right here: */ + p_type = DCL_TYPE(operandType(ptr)); + + switch (p_type) { + case POINTER: + case FPOINTER: + case IPOINTER: + case PPOINTER: + if (!fsr0_setup || !*fsr0_setup) + { + pic16_loadFSR0( ptr, 0 ); + if (fsr0_setup) *fsr0_setup = 1; + } + if (doWrite) + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg(&pic16_pc_indf0)); + else + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(&pic16_pc_indf0)); + break; + + case GPOINTER: + if (AOP(ptr)->aopu.aop_reg[2]) { + if (doWrite) pic16_emitpcode (POC_MOVWF, pic16_popCopyReg(pic16_stack_postdec)); + // prepare call to __gptrget1, this is actually genGenPointerGet(result, WREG, ?ic?) + mov2fp(pic16_popCopyReg(&pic16_pc_fsr0l), AOP(ptr), 0); + mov2fp(pic16_popCopyReg(&pic16_pc_prodl), AOP(ptr), 1); + pic16_mov2w(AOP(ptr), 2); + pic16_callGenericPointerRW(doWrite, 1); + } else { + // data pointer (just 2 byte given) + if (!fsr0_setup || !*fsr0_setup) + { + pic16_loadFSR0( ptr, 0 ); + if (fsr0_setup) *fsr0_setup = 1; + } + if (doWrite) + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg(&pic16_pc_indf0)); + else + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(&pic16_pc_indf0)); + } + break; + + case CPOINTER: + /* XXX: Writing to CPOINTERs not (yet) implemented. */ + assert ( !doWrite && "Cannot write into __code space!" ); + if( (AOP_TYPE(ptr) == AOP_PCODE) + && ((AOP(ptr)->aopu.pcop->type == PO_IMMEDIATE) + || (AOP(ptr)->aopu.pcop->type == PO_DIR))) + { + pic16_emitpcode(POC_MOVLW, pic16_popGet (AOP (ptr), 0)); + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg (&pic16_pc_tblptrl)); + pic16_emitpcode(POC_MOVLW, pic16_popGet (AOP (ptr), 1)); + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg (&pic16_pc_tblptrh)); + pic16_emitpcode(POC_MOVLW, pic16_popGet (AOP (ptr), 2)); + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg (&pic16_pc_tblptru)); + } else { + mov2fp(pic16_popCopyReg(&pic16_pc_tblptrl), AOP(ptr), 0); + mov2fp(pic16_popCopyReg(&pic16_pc_tblptrh), AOP(ptr), 1); + mov2fp(pic16_popCopyReg(&pic16_pc_tblptru), AOP(ptr), 2); + } // if + + pic16_emitpcodeNULLop (POC_TBLRD_POSTINC); + pic16_emitpcode (POC_MOVFW, pic16_popCopyReg (&pic16_pc_tablat)); + break; + + default: + assert (0 && "invalid pointer type specified"); + break; + } +} + +/*-----------------------------------------------------------------*/ +/* genUnpackBits - generates code for unpacking bits */ +/*-----------------------------------------------------------------*/ +static void genUnpackBits (operand *result, operand *left, char *rname, int ptype) +{ + int shCnt ; + sym_link *etype, *letype; + int blen=0, bstr=0; + int lbstr; + int same; + pCodeOp *op; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + etype = getSpec(operandType(result)); + letype = getSpec(operandType(left)); + + // if(IS_BITFIELD(etype)) { + blen = SPEC_BLEN(etype); + bstr = SPEC_BSTR(etype); + // } + + lbstr = SPEC_BSTR( letype ); + + DEBUGpic16_emitcode ("; ***","%s %d - reading %s bitfield int %s destination",__FUNCTION__,__LINE__, + SPEC_USIGN(OP_SYM_ETYPE(left)) ? "an unsigned" : "a signed", SPEC_USIGN(OP_SYM_TYPE(result)) ? "an unsigned" : "a signed"); + +#if 1 + if((blen == 1) && (bstr < 8) + && (!IS_PTR(operandType(left)) || IS_DIRECT(left) || PIC_IS_DATA_PTR(operandType(left)))) { + /* it is a single bit, so use the appropriate bit instructions */ + DEBUGpic16_emitcode (";","%s %d optimize bit read",__FUNCTION__,__LINE__); + + same = pic16_sameRegs(AOP(left),AOP(result)); + op = (same ? pic16_popCopyReg(&pic16_pc_wreg) : pic16_popGet (AOP(result),0)); + pic16_emitpcode(POC_CLRF, op); + + if(!IS_PTR(operandType(left)) || IS_DIRECT(left)) { + /* workaround to reduce the extra lfsr instruction */ + pic16_emitpcode(POC_BTFSC, + pic16_popCopyGPR2Bit(pic16_popGet(AOP(left), 0), bstr)); + } else { + assert (PIC_IS_DATA_PTR (operandType(left))); + pic16_loadFSR0 (left, 0); + pic16_emitpcode(POC_BTFSC, + pic16_popCopyGPR2Bit(pic16_popCopyReg(&pic16_pc_indf0), bstr)); + } + + if (SPEC_USIGN(OP_SYM_ETYPE(left))) { + /* unsigned bitfields result in either 0 or 1 */ + pic16_emitpcode(POC_INCF, op); + } else { + /* signed bitfields result in either 0 or -1 */ + pic16_emitpcode(POC_DECF, op); + } + if (same) { + pic16_emitpcode(POC_MOVWF, pic16_popGet( AOP(result), 0 )); + } + + pic16_addSign (result, 1, !SPEC_USIGN(OP_SYM_TYPE(result))); + return; + } + +#endif + + if (!IS_PTR(operandType(left)) || IS_DIRECT(left)) { + // access symbol directly + pic16_mov2w (AOP(left), 0); + } else { + pic16_derefPtr (left, ptype, 0, NULL); + } + + /* if we have bitdisplacement then it fits */ + /* into this byte completely or if length is */ + /* less than a byte */ + if ((shCnt = SPEC_BSTR(etype)) || (SPEC_BLEN(etype) <= 8)) { + + /* shift right acc */ + AccRsh(shCnt, 0); + + pic16_emitpcode(POC_ANDLW, pic16_popGetLit( + (((unsigned char) -1)>>(8 - SPEC_BLEN(etype))) & SRMask[ shCnt ])); + + /* VR -- normally I would use the following, but since we use the hack, + * to avoid the masking from AccRsh, why not mask it right now? */ + + /* + pic16_emitpcode(POC_ANDLW, pic16_popGetLit(((unsigned char) -1)>>(8 - SPEC_BLEN(etype)))); + */ + + /* extend signed bitfields to 8 bits */ + if (!SPEC_USIGN(OP_SYM_ETYPE(left)) && (bstr + blen < 8)) + { + assert (blen + bstr > 0); + pic16_emitpcode(POC_BTFSC, pic16_popCopyGPR2Bit(pic16_popCopyReg(&pic16_pc_wreg), bstr + blen - 1)); + pic16_emitpcode(POC_IORLW, pic16_popGetLit(0xFF << (bstr + blen))); + } + + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 0)); + + pic16_addSign (result, 1, !SPEC_USIGN(OP_SYM_TYPE(result))); + return ; + } + + fprintf(stderr, "SDCC pic16 port error: the port currently does not support *reading*\n"); + fprintf(stderr, "bitfields of size >=8. Instead of generating wrong code, bailling out...\n"); + exit(EXIT_FAILURE); + + return ; +} + + +static void genDataPointerGet(operand *left, operand *result, iCode *ic) +{ + int size, offset = 0, leoffset=0 ; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + pic16_aopOp(result, ic, TRUE); + + FENTRY; + + size = AOP_SIZE(result); +// fprintf(stderr, "%s:%d size= %d\n", __FILE__, __LINE__, size); + + +#if 1 + if(!strcmp(pic16_aopGet(AOP(result), 0, TRUE, FALSE), + pic16_aopGet(AOP(left), 0, TRUE, FALSE))) { + DEBUGpic16_emitcode("; ***", "left and result names are same, skipping moving"); + goto release; + } +#endif + + if(AOP(left)->aopu.pcop->type == PO_DIR) + leoffset=PCOR(AOP(left)->aopu.pcop)->instance; + + DEBUGpic16_pic16_AopType(__LINE__,left,NULL,result); + + while (size--) { + DEBUGpic16_emitcode("; ***", "%s loop offset=%d leoffset=%d", __FUNCTION__, offset, leoffset); + +// pic16_DumpOp("(result)",result); + if(pic16_isLitAop(AOP(result))) { + pic16_mov2w(AOP(left), offset); // patch 8 + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offset)); + } else { + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popGet(AOP(left), offset), //patch 8 + pic16_popGet(AOP(result), offset))); + } + + offset++; + leoffset++; + } + +release: + pic16_freeAsmop(result,NULL,ic,TRUE); +} + + + +/*-----------------------------------------------------------------*/ +/* genNearPointerGet - pic16_emitcode for near pointer fetch */ +/*-----------------------------------------------------------------*/ +static void genNearPointerGet (operand *left, + operand *result, + iCode *ic) +{ +// asmop *aop = NULL; + //regs *preg = NULL ; + sym_link *rtype, *retype; + sym_link *ltype, *letype; + + FENTRY; + + rtype = operandType(result); + retype= getSpec(rtype); + ltype = operandType(left); + letype= getSpec(ltype); + + pic16_aopOp(left,ic,FALSE); + +// pic16_DumpOp("(left)",left); +// pic16_DumpOp("(result)",result); + + /* if left is rematerialisable and + * result is not bit variable type and + * the left is pointer to data space i.e + * lower 128 bytes of space */ + + if (AOP_TYPE(left) == AOP_PCODE + && !IS_BITFIELD(retype) + && DCL_TYPE(ltype) == POINTER) { + + genDataPointerGet (left,result,ic); + pic16_freeAsmop(left, NULL, ic, TRUE); + return ; + } + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + pic16_aopOp (result,ic,TRUE); + + DEBUGpic16_pic16_AopType(__LINE__, left, NULL, result); + +#if 1 + if(IS_BITFIELD( retype ) + && (SPEC_BLEN(operandType(result))==1) + ) { + iCode *nextic; + pCodeOp *jop; + int bitstrt, bytestrt; + + /* if this is bitfield of size 1, see if we are checking the value + * of a single bit in an if-statement, + * if yes, then don't generate usual code, but execute the + * genIfx directly -- VR */ + + nextic = ic->next; + + /* CHECK: if next iCode is IFX + * and current result operand is nextic's conditional operand + * and current result operand live ranges ends at nextic's key number + */ + if((nextic->op == IFX) + && (result == IC_COND(nextic)) + && (OP_LIVETO(result) == nextic->seq) + && (OP_SYMBOL(left)->remat) // below fails for "if (p->bitfield)" + ) { + /* everything is ok then */ + /* find a way to optimize the genIfx iCode */ + + bytestrt = SPEC_BSTR(operandType(result))/8; + bitstrt = SPEC_BSTR(operandType(result))%8; + + jop = pic16_popCopyGPR2Bit(pic16_popGet(AOP(left), 0), bitstrt); + + genIfxpCOpJump(nextic, jop); + + pic16_freeAsmop(left, NULL, ic, TRUE); + pic16_freeAsmop(result, NULL, ic, TRUE); + return; + } + } +#endif + + /* if bitfield then unpack the bits */ + if (IS_BITFIELD(letype)) + genUnpackBits (result, left, NULL, POINTER); + else { + /* we have can just get the values */ + int size = AOP_SIZE(result); + int offset = 0; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + pic16_loadFSR0( left, 0 ); + + while(size--) { + if(size) { + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popCopyReg(&pic16_pc_postinc0), + pic16_popGet(AOP(result), offset++))); + } else { + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popCopyReg(&pic16_pc_indf0), + pic16_popGet(AOP(result), offset++))); + } + } + } + +#if 0 + /* now some housekeeping stuff */ + if (aop) { + /* we had to allocate for this iCode */ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + pic16_freeAsmop(NULL,aop,ic,TRUE); + } else { + /* we did not allocate which means left + * already in a pointer register, then + * if size > 0 && this could be used again + * we have to point it back to where it + * belongs */ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if (AOP_SIZE(result) > 1 + && !OP_SYMBOL(left)->remat + && ( OP_SYMBOL(left)->liveTo > ic->seq + || ic->depth )) { +// int size = AOP_SIZE(result) - 1; +// while (size--) +// pic16_emitcode("dec","%s",rname); + } + } +#endif + + /* done */ + pic16_freeAsmop(left,NULL,ic,TRUE); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genGenPointerGet - gget value from generic pointer space */ +/*-----------------------------------------------------------------*/ +static void genGenPointerGet (operand *left, + operand *result, iCode *ic) +{ + int size; + sym_link *letype = getSpec(operandType(left)); + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + pic16_aopOp(left,ic,FALSE); + pic16_aopOp(result,ic,TRUE); + size = AOP_SIZE(result); + + DEBUGpic16_pic16_AopType(__LINE__,left,NULL,result); + + /* if bit then unpack */ + if (IS_BITFIELD(letype)) { + genUnpackBits(result,left,"BAD",GPOINTER); + goto release; + } + + /* set up WREG:PRODL:FSR0L with address from left */ + mov2fp(pic16_popCopyReg(&pic16_pc_fsr0l), AOP(left), 0); + mov2fp(pic16_popCopyReg(&pic16_pc_prodl), AOP(left), 1); + pic16_mov2w(AOP(left), 2); + pic16_callGenericPointerRW(0, size); + + assignResultValue(result, size, 1); + +release: + pic16_freeAsmop(left,NULL,ic,TRUE); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genConstPointerGet - get value from const generic pointer space */ +/*-----------------------------------------------------------------*/ +static void genConstPointerGet (operand *left, + operand *result, iCode *ic) +{ + //sym_link *retype = getSpec(operandType(result)); + // symbol *albl = newiTempLabel(NULL); // patch 15 + // symbol *blbl = newiTempLabel(NULL); // + // PIC_OPCODE poc; // patch 15 + int size; + int offset = 0; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + pic16_aopOp(left,ic,FALSE); + pic16_aopOp(result,ic,TRUE); + size = AOP_SIZE(result); + + /* if bit then unpack */ + if (IS_BITFIELD(getSpec (operandType (left)))) { + genUnpackBits(result,left,"BAD",GPOINTER); + goto release; + } // if + + DEBUGpic16_pic16_AopType(__LINE__,left,NULL,result); + + DEBUGpic16_emitcode ("; "," %d getting const pointer",__LINE__); + + // set up table pointer + if( (AOP_TYPE(left) == AOP_PCODE) + && ((AOP(left)->aopu.pcop->type == PO_IMMEDIATE) + || (AOP(left)->aopu.pcop->type == PO_DIR))) + { + pic16_emitpcode(POC_MOVLW,pic16_popGet(AOP(left),0)); + pic16_emitpcode(POC_MOVWF,pic16_popCopyReg(&pic16_pc_tblptrl)); + pic16_emitpcode(POC_MOVLW,pic16_popGet(AOP(left),1)); + pic16_emitpcode(POC_MOVWF,pic16_popCopyReg(&pic16_pc_tblptrh)); + pic16_emitpcode(POC_MOVLW,pic16_popGet(AOP(left),2)); + pic16_emitpcode(POC_MOVWF,pic16_popCopyReg(&pic16_pc_tblptru)); + } else { + mov2fp(pic16_popCopyReg(&pic16_pc_tblptrl), AOP(left), 0); + mov2fp(pic16_popCopyReg(&pic16_pc_tblptrh), AOP(left), 1); + mov2fp(pic16_popCopyReg(&pic16_pc_tblptru), AOP(left), 2); + } + + while(size--) { + pic16_emitpcodeNULLop(POC_TBLRD_POSTINC); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popCopyReg(&pic16_pc_tablat), pic16_popGet(AOP(result),offset))); + offset++; + } + +release: + pic16_freeAsmop(left,NULL,ic,TRUE); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + + +/*-----------------------------------------------------------------*/ +/* genPointerGet - generate code for pointer get */ +/*-----------------------------------------------------------------*/ +static void genPointerGet (iCode *ic) +{ + operand *left, *result ; + sym_link *type, *etype; + int p_type; + + FENTRY; + + left = IC_LEFT(ic); + result = IC_RESULT(ic) ; + + /* depending on the type of pointer we need to + move it to the correct pointer register */ + type = operandType(left); + etype = getSpec(type); + +#if 0 + if (IS_PTR_CONST(type)) +#else + if (IS_CODEPTR(type)) +#endif + DEBUGpic16_emitcode ("; ***","%d - const pointer",__LINE__); + + /* if left is of type of pointer then it is simple */ + if (IS_PTR(type) && !IS_FUNC(type->next)) + p_type = DCL_TYPE(type); + else { + /* we have to go by the storage class */ + p_type = PTR_TYPE(SPEC_OCLS(etype)); + + DEBUGpic16_emitcode ("; ***","%d - resolve pointer by storage class",__LINE__); + + if (SPEC_OCLS(etype)->codesp ) { + DEBUGpic16_emitcode ("; ***","%d - cpointer",__LINE__); + //p_type = CPOINTER ; + } else + if (SPEC_OCLS(etype)->fmap && !SPEC_OCLS(etype)->paged) { + DEBUGpic16_emitcode ("; ***","%d - fpointer",__LINE__); + /*p_type = FPOINTER ;*/ + } else + if (SPEC_OCLS(etype)->fmap && SPEC_OCLS(etype)->paged) { + DEBUGpic16_emitcode ("; ***","%d - ppointer",__LINE__); + /* p_type = PPOINTER; */ + } else + if (SPEC_OCLS(etype) == idata ) { + DEBUGpic16_emitcode ("; ***","%d - ipointer",__LINE__); + /* p_type = IPOINTER; */ + } else { + DEBUGpic16_emitcode ("; ***","%d - pointer",__LINE__); + /* p_type = POINTER ; */ + } + } + + /* now that we have the pointer type we assign + the pointer values */ + switch (p_type) { + case POINTER: + case FPOINTER: + case IPOINTER: + case PPOINTER: + genNearPointerGet (left,result,ic); + break; + + case CPOINTER: + genConstPointerGet (left,result,ic); + //pic16_emitcodePointerGet (left,result,ic); + break; + + case GPOINTER: +#if 0 + if (IS_PTR_CONST(type)) + genConstPointerGet (left,result,ic); + else +#endif + genGenPointerGet (left,result,ic); + break; + + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "genPointerGet: illegal pointer type"); + + } +} + +/*-----------------------------------------------------------------*/ +/* genPackBits - generates code for packed bit storage */ +/*-----------------------------------------------------------------*/ +static void genPackBits (sym_link *etype , operand *result, + operand *right , + char *rname, int p_type) +{ + int shCnt = 0 ; + int offset = 0 ; + int rLen = 0 ; + int blen, bstr ; + int shifted_and_masked = 0; + unsigned long lit = (unsigned long)-1; + sym_link *retype; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + blen = SPEC_BLEN(etype); + bstr = SPEC_BSTR(etype); + + retype = getSpec(operandType(right)); + + if(AOP_TYPE(right) == AOP_LIT) { + lit = ulFromVal (AOP(right)->aopu.aop_lit); + + if((blen == 1) && (bstr < 8)) { + /* it is a single bit, so use the appropriate bit instructions */ + + DEBUGpic16_emitcode (";","%s %d optimize bit assignment",__FUNCTION__,__LINE__); + + if(!IS_PTR(operandType(result)) || IS_DIRECT(result)) { + /* workaround to reduce the extra lfsr instruction */ + if(lit) { + pic16_emitpcode(POC_BSF, + pic16_popCopyGPR2Bit(pic16_popGet(AOP(result), 0), bstr)); + } else { + pic16_emitpcode(POC_BCF, + pic16_popCopyGPR2Bit(pic16_popGet(AOP(result), 0), bstr)); + } + } else { + if (PIC_IS_DATA_PTR(operandType(result))) { + pic16_loadFSR0(result, 0); + pic16_emitpcode(lit ? POC_BSF : POC_BCF, + pic16_popCopyGPR2Bit(pic16_popCopyReg(&pic16_pc_indf0), bstr)); + } else { + /* get old value */ + pic16_derefPtr (result, p_type, 0, NULL); + pic16_emitpcode(lit ? POC_BSF : POC_BCF, + pic16_popCopyGPR2Bit(pic16_popCopyReg(&pic16_pc_wreg), bstr)); + /* write back new value */ + pic16_derefPtr (result, p_type, 1, NULL); + } + } + + return; + } + /* IORLW below is more efficient */ + //pic16_emitpcode(POC_MOVLW, pic16_popGetLit((lit & ((1UL << blen) - 1)) << bstr)); + lit = (lit & ((1UL << blen) - 1)) << bstr; + shifted_and_masked = 1; + offset++; + } else + if (IS_DIRECT(result) && !IS_PTR(operandType(result)) + && IS_BITFIELD(retype) + && (AOP_TYPE(right) == AOP_REG || AOP_TYPE(right) == AOP_DIR) + && (blen == 1)) { + int rblen, rbstr; + + rblen = SPEC_BLEN( retype ); + rbstr = SPEC_BSTR( retype ); + + if(IS_BITFIELD(etype)) { + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(result), 0)); + pic16_emitpcode(POC_BCF, pic16_popCopyGPR2Bit(pic16_popCopyReg(&pic16_pc_wreg), bstr)); + } else { + pic16_emitpcode(POC_CLRF, pic16_popCopyReg(&pic16_pc_wreg)); + } + + pic16_emitpcode(POC_BTFSC, pic16_popCopyGPR2Bit(pic16_popGet(AOP(right), 0), rbstr)); + + if(IS_BITFIELD(etype)) { + pic16_emitpcode(POC_BSF, pic16_popCopyGPR2Bit(pic16_popCopyReg(&pic16_pc_wreg), bstr)); + } else { + pic16_emitpcode(POC_INCF, pic16_popCopyReg(&pic16_pc_wreg)); + } + + pic16_emitpcode(POC_MOVWF, pic16_popGet( AOP(result), 0)); + + return; + } else { + /* move right to W */ + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(right), offset++)); + } + + /* if the bit length is less than or */ + /* it exactly fits a byte then */ + if((shCnt=SPEC_BSTR(etype)) + || SPEC_BLEN(etype) <= 8 ) { + int fsr0_setup = 0; + + if (blen != 8 || (bstr % 8) != 0) { + // we need to combine the value with the old value + if(!shifted_and_masked) + { + pic16_emitpcode(POC_ANDLW, pic16_popGetLit((1U << blen)-1)); + + DEBUGpic16_emitcode(";", "shCnt = %d SPEC_BSTR(etype) = %d:%d", shCnt, + SPEC_BSTR(etype), SPEC_BLEN(etype)); + + /* shift left acc, do NOT mask the result again */ + AccLsh(shCnt, 0); + + /* using PRODH as a temporary register here */ + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg(&pic16_pc_prodh)); + } + + if ((IS_SYMOP(result) && !IS_PTR(operandType (result))) + || IS_DIRECT(result)) { + /* access symbol directly */ + pic16_mov2w (AOP(result), 0); + } else { + /* get old value */ + pic16_derefPtr (result, p_type, 0, &fsr0_setup); + } +#if 1 + pic16_emitpcode(POC_ANDLW, pic16_popGetLit( + (unsigned char)((unsigned char)(0xff << (blen+bstr)) | + (unsigned char)(0xff >> (8-bstr))) )); + if (!shifted_and_masked) { + pic16_emitpcode(POC_IORFW, pic16_popCopyReg(&pic16_pc_prodh)); + } else { + /* We have the shifted and masked (literal) right value in `lit' */ + if (lit != 0) + pic16_emitpcode(POC_IORLW, pic16_popGetLit(lit)); + } + } else { // if (blen == 8 && (bstr % 8) == 0) + if (shifted_and_masked) { + // move right (literal) to WREG (only case where right is not yet in WREG) + pic16_mov2w(AOP(right), (bstr / 8)); + } + } + + /* write new value back */ + if ((IS_SYMOP(result) && !IS_PTR(operandType(result))) + || IS_DIRECT(result)) { + pic16_emitpcode (POC_MOVWF, pic16_popGet(AOP(result),0)); + } else { + pic16_derefPtr (result, p_type, 1, &fsr0_setup); + } +#endif + + return; + } + + +#if 0 + fprintf(stderr, "SDCC pic16 port error: the port currently does not support\n"); + fprintf(stderr, "bitfields of size >=8. Instead of generating wrong code, bailling out...\n"); + exit(EXIT_FAILURE); +#endif + + + pic16_loadFSR0(result, 0); // load FSR0 with address of result + rLen = SPEC_BLEN(etype)-8; + + /* now generate for lengths greater than one byte */ + while (1) { + rLen -= 8 ; + if (rLen <= 0 ) { + mov2fp(pic16_popCopyReg(&pic16_pc_prodh), AOP(right), offset); + break ; + } + + switch (p_type) { + case POINTER: + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg(&pic16_pc_postinc0)); + break; + + /* + case FPOINTER: + MOVA(l); + pic16_emitcode("movx","@dptr,a"); + break; + + case GPOINTER: + MOVA(l); + DEBUGpic16_emitcode(";lcall","__gptrput"); + break; + */ + default: + assert(0); + } + + + pic16_mov2w(AOP(right), offset++); + } + + /* last last was not complete */ + if (rLen) { + /* save the byte & read byte */ + switch (p_type) { + case POINTER: + // pic16_emitpcode(POC_MOVWF, pic16_popCopyReg(&pic16_pc_prodl)); + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(&pic16_pc_indf0)); + break; + + /* + case FPOINTER: + pic16_emitcode ("mov","b,a"); + pic16_emitcode("movx","a,@dptr"); + break; + + case GPOINTER: + pic16_emitcode ("push","b"); + pic16_emitcode ("push","acc"); + pic16_emitcode ("lcall","__gptrget"); + pic16_emitcode ("pop","b"); + break; + */ + default: + assert(0); + } + DEBUGpic16_emitcode(";", "rLen = %i", rLen); + pic16_emitpcode(POC_ANDLW, pic16_popGetLit((unsigned char)-1 << -rLen)); + pic16_emitpcode(POC_IORFW, pic16_popCopyReg(&pic16_pc_prodh)); + // pic16_emitcode ("anl","a,#0x%02x",((unsigned char)-1 << -rLen) ); + // pic16_emitcode ("orl","a,b"); + } + + // if (p_type == GPOINTER) + // pic16_emitcode("pop","b"); + + switch (p_type) { + + case POINTER: + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg(&pic16_pc_indf0)); + // pic16_emitcode("mov","@%s,a",rname); + break; + /* + case FPOINTER: + pic16_emitcode("movx","@dptr,a"); + break; + + case GPOINTER: + DEBUGpic16_emitcode(";lcall","__gptrput"); + break; + */ + default: + assert(0); + } + + // pic16_freeAsmop(right, NULL, ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genDataPointerSet - remat pointer to data space */ +/*-----------------------------------------------------------------*/ +static void genDataPointerSet(operand *right, + operand *result, + iCode *ic) +{ + int size, offset = 0, resoffset=0 ; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + pic16_aopOp(right,ic,FALSE); + + size = AOP_SIZE(right); + +// fprintf(stderr, "%s:%d size= %d\n", __FILE__, __LINE__, size); + +#if 0 + if ( AOP_TYPE(result) == AOP_PCODE) { + fprintf(stderr,"genDataPointerSet %s, %d\n", + AOP(result)->aopu.pcop->name, + (AOP(result)->aopu.pcop->type == PO_DIR)? + PCOR(AOP(result)->aopu.pcop)->instance: + PCOI(AOP(result)->aopu.pcop)->offset); + } +#endif + + if(AOP(result)->aopu.pcop->type == PO_DIR) + resoffset=PCOR(AOP(result)->aopu.pcop)->instance; + + while (size--) { + if (AOP_TYPE(right) == AOP_LIT) { + unsigned int lit = pic16aopLiteral(AOP(IC_RIGHT(ic))->aopu.aop_lit, offset); + pic16_movLit2f(pic16_popGet(AOP(result), offset), lit); + } else { + pic16_mov2w(AOP(right), offset); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offset)); // patch 8 + } + offset++; + resoffset++; + } + + pic16_freeAsmop(right,NULL,ic,TRUE); +} + + + +/*-----------------------------------------------------------------*/ +/* genNearPointerSet - pic16_emitcode for near pointer put */ +/*-----------------------------------------------------------------*/ +static void genNearPointerSet (operand *right, + operand *result, + iCode *ic) +{ + asmop *aop = NULL; + sym_link *retype; + sym_link *ptype = operandType(result); + sym_link *resetype; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + retype= getSpec(operandType(right)); + resetype = getSpec(operandType(result)); + + pic16_aopOp(result,ic,FALSE); + + /* if the result is rematerializable & + * in data space & not a bit variable */ + + /* and result is not a bit variable */ + if (AOP_TYPE(result) == AOP_PCODE + && DCL_TYPE(ptype) == POINTER + && !IS_BITFIELD(retype) + && !IS_BITFIELD(resetype)) { + + genDataPointerSet (right,result,ic); + pic16_freeAsmop(result,NULL,ic,TRUE); + return; + } + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + pic16_aopOp(right,ic,FALSE); + DEBUGpic16_pic16_AopType(__LINE__,NULL,right,result); + + /* if bitfield then unpack the bits */ + if (IS_BITFIELD(resetype)) { + genPackBits (resetype, result, right, NULL, POINTER); + } else { + /* we have can just get the values */ + int size = AOP_SIZE(right); + int offset = 0 ; + + pic16_loadFSR0(result, 0); + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + while (size--) { + if (pic16_isLitOp(right)) { + pic16_emitpcode(POC_MOVLW, pic16_popGet(AOP(right),offset)); + if (size) { + pic16_emitpcode(POC_MOVWF,pic16_popCopyReg(&pic16_pc_postinc0)); + } else { + pic16_emitpcode(POC_MOVWF,pic16_popCopyReg(&pic16_pc_indf0)); + } + } else { // no literal + if(size) { + pic16_emitpcode(POC_MOVFF, + pic16_popGet2p(pic16_popGet(AOP(right),offset), + pic16_popCopyReg(&pic16_pc_postinc0))); + } else { + pic16_emitpcode(POC_MOVFF, + pic16_popGet2p(pic16_popGet(AOP(right),offset), + pic16_popCopyReg(&pic16_pc_indf0))); + } + } + + offset++; + } + } + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* now some housekeeping stuff */ + if (aop) { + /* we had to allocate for this iCode */ + pic16_freeAsmop(NULL,aop,ic,TRUE); + } else { + /* we did not allocate which means left + * already in a pointer register, then + * if size > 0 && this could be used again + * we have to point it back to where it + * belongs */ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if (AOP_SIZE(right) > 1 + && !OP_SYMBOL(result)->remat + && ( OP_SYMBOL(result)->liveTo > ic->seq + || ic->depth )) { + + int size = AOP_SIZE(right) - 1; + + while (size--) + pic16_emitcode("decf","fsr0,f"); + //pic16_emitcode("dec","%s",rname); + } + } + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* done */ +//release: + pic16_freeAsmop(right,NULL,ic,TRUE); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genGenPointerSet - set value from generic pointer space */ +/*-----------------------------------------------------------------*/ +static void genGenPointerSet (operand *right, + operand *result, iCode *ic) +{ + int size; + sym_link *retype = getSpec(operandType(result)); + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + pic16_aopOp(result,ic,FALSE); + pic16_aopOp(right,ic,FALSE); + size = AOP_SIZE(right); + + DEBUGpic16_pic16_AopType(__LINE__,NULL,right,result); + + + /* if bit then unpack */ + if (IS_BITFIELD(retype)) { +// pic16_emitpcode(POC_LFSR,pic16_popGetLit2(0,pic16_popGetLit(lit))); + genPackBits(retype,result,right,"dptr",GPOINTER); + goto release; + } + + size = AOP_SIZE(right); + + DEBUGpic16_emitcode ("; ***","%s %d size=%d",__FUNCTION__,__LINE__,size); + + + /* load value to write in TBLPTRH:TBLPTRL:PRODH:[stack] */ + + /* value of right+0 is placed on stack, which will be retrieved + * by the support function thus restoring the stack. The important + * thing is that there is no need to manually restore stack pointer + * here */ + pushaop(AOP(right), 0); +// mov2fp(pic16_popCopyReg(&pic16_pc_postdec1), AOP(right), 0); + if(size>1)mov2fp(pic16_popCopyReg(&pic16_pc_prodh), AOP(right), 1); + if(size>2)mov2fp(pic16_popCopyReg(&pic16_pc_tblptrl), AOP(right), 2); + if(size>3)mov2fp(pic16_popCopyReg(&pic16_pc_tblptrh), AOP(right), 3); + + /* load address to write to in WREG:FSR0H:FSR0L */ + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popGet(AOP(result), 0), + pic16_popCopyReg(&pic16_pc_fsr0l))); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popGet(AOP(result), 1), + pic16_popCopyReg(&pic16_pc_prodl))); + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(result), 2)); + + pic16_callGenericPointerRW(1, size); + +release: + pic16_freeAsmop(right,NULL,ic,TRUE); + pic16_freeAsmop(result,NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genPointerSet - stores the value into a pointer location */ +/*-----------------------------------------------------------------*/ +static void genPointerSet (iCode *ic) +{ + operand *right, *result ; + sym_link *type, *etype; + int p_type; + + FENTRY; + + right = IC_RIGHT(ic); + result = IC_RESULT(ic) ; + + /* depending on the type of pointer we need to + move it to the correct pointer register */ + type = operandType(result); + etype = getSpec(type); + + /* if left is of type of pointer then it is simple */ + if (IS_PTR(type) && !IS_FUNC(type->next)) { + p_type = DCL_TYPE(type); + } + else { + /* we have to go by the storage class */ + p_type = PTR_TYPE(SPEC_OCLS(etype)); + +/* if (SPEC_OCLS(etype)->codesp ) { */ +/* p_type = CPOINTER ; */ +/* } */ +/* else */ +/* if (SPEC_OCLS(etype)->fmap && !SPEC_OCLS(etype)->paged) */ +/* p_type = FPOINTER ; */ +/* else */ +/* if (SPEC_OCLS(etype)->fmap && SPEC_OCLS(etype)->paged) */ +/* p_type = PPOINTER ; */ +/* else */ +/* if (SPEC_OCLS(etype) == idata ) */ +/* p_type = IPOINTER ; */ +/* else */ +/* p_type = POINTER ; */ + } + + /* now that we have the pointer type we assign + the pointer values */ + switch (p_type) { + case POINTER: + case FPOINTER: + case IPOINTER: + case PPOINTER: + genNearPointerSet (right,result,ic); + break; + + case GPOINTER: + genGenPointerSet (right,result,ic); + break; + + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "genPointerSet: illegal pointer type"); + } +} + +/*-----------------------------------------------------------------*/ +/* genIfx - generate code for Ifx statement */ +/*-----------------------------------------------------------------*/ +static void genIfx (iCode *ic, iCode *popIc) +{ + operand *cond = IC_COND(ic); + int isbit =0; + + FENTRY; + + pic16_aopOp(cond,ic,FALSE); + + /* get the value into acc */ + if (AOP_TYPE(cond) != AOP_CRY) + pic16_toBoolean(cond); + else + isbit = 1; + /* the result is now in the accumulator */ + pic16_freeAsmop(cond,NULL,ic,TRUE); + + /* if there was something to be popped then do it */ + if (popIc) + genIpop(popIc); + + /* if the condition is a bit variable */ + if (isbit && IS_ITEMP(cond) && + SPIL_LOC(cond)) { + genIfxJump(ic,"c"); + DEBUGpic16_emitcode ("; isbit SPIL_LOC","%s",SPIL_LOC(cond)->rname); + } else { + if (isbit && !IS_ITEMP(cond)) + genIfxJump(ic,OP_SYMBOL(cond)->rname); + else + genIfxJump(ic,"a"); + } + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genAddrOf - generates code for address of */ +/*-----------------------------------------------------------------*/ +static void genAddrOf (iCode *ic) +{ + operand *result, *left; + int size; + symbol *sym; // = OP_SYMBOL(IC_LEFT(ic)); + pCodeOp *pcop0, *pcop1, *pcop2; + + FENTRY; + + pic16_aopOp((result=IC_RESULT(ic)),ic,TRUE); + + sym = OP_SYMBOL( IC_LEFT(ic) ); + + if(sym->onStack) { + /* get address of symbol on stack */ + DEBUGpic16_emitcode("; ", "%s symbol %s on stack", __FUNCTION__, sym->name); +#if 0 + fprintf(stderr, "%s:%d symbol %s on stack offset %i\n", __FILE__, __LINE__, + OP_SYMBOL(IC_LEFT(ic))->name, OP_SYMBOL(IC_LEFT(ic))->stack); +#endif + + // operands on stack are accessible via "FSR2 + index" with index + // starting at 2 for arguments and growing from 0 downwards for + // local variables (index == 0 is not assigned so we add one here) + { + int soffs = OP_SYMBOL( IC_LEFT(ic))->stack; + + if (soffs <= 0) { + assert (soffs < 0); + soffs++; + } // if + + DEBUGpic16_emitcode("*!*", "accessing stack symbol at offset=%d", soffs); + pic16_emitpcode(POC_MOVLW , pic16_popGetLit( soffs & 0x00FF )); + pic16_emitpcode(POC_ADDFW , pic16_popCopyReg(pic16_framepnt_lo)); + pic16_emitpcode(POC_MOVWF , pic16_popGet(AOP(result), 0)); + pic16_emitpcode(POC_MOVLW , pic16_popGetLit( (soffs >> 8) & 0x00FF )); + pic16_emitpcode(POC_ADDFWC, pic16_popCopyReg(pic16_framepnt_hi)); + pic16_emitpcode(POC_MOVWF , pic16_popGet(AOP(result), 1)); + } + + goto release; + } + +// if(pic16_debug_verbose) { +// fprintf(stderr, "%s:%d %s symbol %s , codespace=%d\n", +// __FILE__, __LINE__, __FUNCTION__, sym->name, IN_CODESPACE( SPEC_OCLS(sym->etype))); +// } + + pic16_aopOp((left=IC_LEFT(ic)), ic, FALSE); + size = AOP_SIZE(IC_RESULT(ic)); + + pcop0 = PCOP(pic16_newpCodeOpImmd(sym->rname, 0, 0, IN_CODESPACE( SPEC_OCLS(sym->etype)))); + pcop1 = PCOP(pic16_newpCodeOpImmd(sym->rname, 1, 0, IN_CODESPACE( SPEC_OCLS(sym->etype)))); + pcop2 = PCOP(pic16_newpCodeOpImmd(sym->rname, 2, 0, IN_CODESPACE( SPEC_OCLS(sym->etype)))); + + if (size == 3) { + pic16_emitpcode(POC_MOVLW, pcop0); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 0)); + pic16_emitpcode(POC_MOVLW, pcop1); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 1)); + pic16_emitpcode(POC_MOVLW, pcop2); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 2)); + } else + if (size == 2) { + pic16_emitpcode(POC_MOVLW, pcop0); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_MOVLW, pcop1); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),1)); + } else { + pic16_emitpcode(POC_MOVLW, pcop0); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),0)); + } + + pic16_freeAsmop(left, NULL, ic, FALSE); +release: + pic16_freeAsmop(result,NULL,ic,TRUE); +} + + +/*-----------------------------------------------------------------*/ +/* genAssign - generate code for assignment */ +/*-----------------------------------------------------------------*/ +static void genAssign (iCode *ic) +{ + operand *result, *right; + sym_link *restype, *rtype; + int size, offset,know_W; + unsigned long lit = 0L; + + result = IC_RESULT(ic); + right = IC_RIGHT(ic) ; + + FENTRY; + + /* if they are the same */ + if (operandsEqu (IC_RESULT(ic),IC_RIGHT(ic))) + return ; + + /* reversed order operands are aopOp'ed so that result operand + * is effective in case right is a stack symbol. This maneauver + * allows to use the _G.resDirect flag later */ + pic16_aopOp(result,ic,TRUE); + pic16_aopOp(right,ic,FALSE); + + DEBUGpic16_pic16_AopType(__LINE__,NULL,right,result); + + /* if they are the same registers */ + if (pic16_sameRegs(AOP(right),AOP(result))) + goto release; + + /* if the result is a bit */ + if (AOP_TYPE(result) == AOP_CRY) { + /* if the right size is a literal then + we know what the value is */ + if (AOP_TYPE(right) == AOP_LIT) { + + pic16_emitpcode( ( ((int) operandLitValue(right)) ? POC_BSF : POC_BCF), + pic16_popGet(AOP(result),0)); + + if (((int) operandLitValue(right))) + pic16_emitcode("bsf","(%s >> 3),(%s & 7)", + AOP(result)->aopu.aop_dir, + AOP(result)->aopu.aop_dir); + else + pic16_emitcode("bcf","(%s >> 3),(%s & 7)", + AOP(result)->aopu.aop_dir, + AOP(result)->aopu.aop_dir); + + goto release; + } + + /* the right is also a bit variable */ + if (AOP_TYPE(right) == AOP_CRY) { + pic16_emitpcode(POC_BCF, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(right),0)); + pic16_emitpcode(POC_BSF, pic16_popGet(AOP(result),0)); + + goto release ; + } + + /* we need to or */ + pic16_emitpcode(POC_BCF, pic16_popGet(AOP(result),0)); + pic16_toBoolean(right); + emitSKPZ; + pic16_emitpcode(POC_BSF, pic16_popGet(AOP(result),0)); + //pic16_aopPut(AOP(result),"a",0); + goto release ; + } + + /* bit variables done */ + /* general case */ + size = AOP_SIZE(result); + offset = 0 ; + + /* bit variables done */ + /* general case */ + size = AOP_SIZE(result); + restype = operandType(result); + rtype = operandType(right); + offset = 0 ; + + if(AOP_TYPE(right) == AOP_LIT) { + if(!(IS_FLOAT(operandType( right )) || IS_FIXED(operandType(right)))) + { + lit = ulFromVal (AOP(right)->aopu.aop_lit); + + /* patch tag for literals that are cast to pointers */ + if (IS_CODEPTR(restype)) { + //fprintf (stderr, "%s:%u: INFO: `(__code*)literal'\n", ic->filename, ic->lineno); + lit = (lit & 0x00ffff) | (GPTR_TAG_CODE << 16); + } else { + if (IS_GENPTR(restype)) + { + if (IS_CODEPTR(rtype)) { + //fprintf (stderr, "%s:%u: INFO: `(generic*)(literal __code*)'\n", ic->filename, ic->lineno); + lit = (lit & 0x00ffff) | (GPTR_TAG_CODE << 16); + } else if (PIC_IS_DATA_PTR(rtype)) { + //fprintf (stderr, "%s:%u: INFO: `(generic*)(literal __data*)'\n", ic->filename, ic->lineno); + lit = (lit & 0x00ffff) | (GPTR_TAG_DATA << 16); + } else if (!IS_PTR(rtype) || IS_GENPTR(rtype)) { + //fprintf (stderr, "%s:%u: INFO: `(generic*)literal' -- accepting specified tag %02x\n", ic->filename, ic->lineno, (unsigned char)(lit >> 16)); + } else if (IS_PTR(rtype)) { + fprintf (stderr, "%s:%u: WARNING: `(generic*)literal' -- assuming __data space\n", ic->filename, ic->lineno); + lit = (lit & 0x00ffff) | (GPTR_TAG_DATA << 16); + } + } + } + } else { + union { + unsigned long lit_int; + float lit_float; + } info; + + + if(IS_FIXED16X16(operandType(right))) { + lit = (unsigned long)fixed16x16FromDouble( floatFromVal( AOP(right)->aopu.aop_lit)); + } else { + /* take care if literal is a float */ + info.lit_float = floatFromVal(AOP(right)->aopu.aop_lit); + lit = info.lit_int; + } + } + } + +// fprintf(stderr, "%s:%d: assigning value 0x%04lx (%d:%d)\n", __FUNCTION__, __LINE__, lit, +// sizeof(unsigned long int), sizeof(float)); + + + if (AOP_TYPE(right) == AOP_REG) { + DEBUGpic16_emitcode("; ", "%s:%d assign from register\n", __FUNCTION__, __LINE__); + while (size--) { + pic16_emitpcode (POC_MOVFF, pic16_popGet2(AOP(right), AOP(result), offset++)); + } // while + goto release; + } + + /* when do we have to read the program memory? + * - if right itself is a symbol in code space + * (we don't care what it points to if it's a pointer) + * - AND right is not a function (we would want its address) + */ + if(AOP_TYPE(right) != AOP_LIT + && IN_CODESPACE(SPEC_OCLS(OP_SYM_ETYPE(right))) + && !IS_FUNC(OP_SYM_TYPE(right)) + && !IS_ITEMP(right)) { + + DEBUGpic16_emitcode("; ", "%s:%d symbol in code space, take special care\n", __FUNCTION__, __LINE__); + //fprintf(stderr, "%s:%d symbol %s = [ %s ] is in code space\n", __FILE__, __LINE__, OP_SYMBOL(result)->name, OP_SYMBOL(right)->name); + + // set up table pointer + if(pic16_isLitOp(right)) { +// fprintf(stderr, "%s:%d inside block 1\n", __FILE__, __LINE__); + pic16_emitpcode(POC_MOVLW,pic16_popGet(AOP(right),0)); + pic16_emitpcode(POC_MOVWF,pic16_popCopyReg(&pic16_pc_tblptrl)); + pic16_emitpcode(POC_MOVLW,pic16_popGet(AOP(right),1)); + pic16_emitpcode(POC_MOVWF,pic16_popCopyReg(&pic16_pc_tblptrh)); + pic16_emitpcode(POC_MOVLW,pic16_popGet(AOP(right),2)); + pic16_emitpcode(POC_MOVWF,pic16_popCopyReg(&pic16_pc_tblptru)); + } else { +// fprintf(stderr, "%s:%d inside block 2\n", __FILE__, __LINE__); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popGet(AOP(right),0), + pic16_popCopyReg(&pic16_pc_tblptrl))); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popGet(AOP(right),1), + pic16_popCopyReg(&pic16_pc_tblptrh))); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popGet(AOP(right),2), + pic16_popCopyReg(&pic16_pc_tblptru))); + } + + /* must fetch 3 bytes for pointers (was OP_SYM_ETYPE before) */ + size = min(getSize(OP_SYM_TYPE(right)), AOP_SIZE(result)); + while(size--) { + pic16_emitpcodeNULLop(POC_TBLRD_POSTINC); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popCopyReg(&pic16_pc_tablat), + pic16_popGet(AOP(result),offset))); + offset++; + } + + /* FIXME: for pointers we need to extend differently (according + * to pointer type DATA/CODE/EEPROM/... :*/ + size = getSize(OP_SYM_TYPE(right)); + if(AOP_SIZE(result) > size) { + size = AOP_SIZE(result) - size; + while(size--) { + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result), offset)); + offset++; + } + } + goto release; + } + +#if 0 + /* VR - What is this?! */ + if( AOP_TYPE(right) == AOP_DIR && (AOP_TYPE(result) == AOP_REG) && size==1) { + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if(aopIdx(AOP(result),0) == 4) { + /* this is a workaround to save value of right into wreg too, + * value of wreg is going to be used later */ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(right),offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset)); + goto release; + } else +// assert(0); + DEBUGpic16_emitcode ("; WARNING","%s %d ignoring register storage",__FUNCTION__,__LINE__); + } +#endif + + size = AOP_SIZE(right); + if (size > AOP_SIZE(result)) size = AOP_SIZE(result); + know_W=-1; + while (size--) { + DEBUGpic16_emitcode ("; ***","%s %d size %d",__FUNCTION__,__LINE__, size); + if(AOP_TYPE(right) == AOP_LIT) { + if(lit&0xff) { + if(know_W != (lit&0xff)) + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(lit&0xff)); + know_W = lit&0xff; + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset)); + } else + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),offset)); + + lit >>= 8; + + } else if (AOP_TYPE(right) == AOP_CRY) { + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),offset)); + if(offset == 0) { + //debugf("%s: BTFSS offset == 0\n", __FUNCTION__); + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(right),0)); + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),0)); + } + } else if ( (AOP_TYPE(right) == AOP_PCODE) && (AOP(right)->aopu.pcop->type == PO_IMMEDIATE) ) { + pic16_emitpcode(POC_MOVLW, pic16_popGet(AOP(right),offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset)); + } else { + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if(!_G.resDirect) { /* use this aopForSym feature */ + if(AOP_TYPE(result) == AOP_ACC) { + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(right), offset)); + } else + if(AOP_TYPE(right) == AOP_ACC) { + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offset)); + } else { + pic16_emitpcode(POC_MOVFF, pic16_popGet2(AOP(right), AOP(result), offset)); + } + } + } + + offset++; + } + pic16_addSign(result, AOP_SIZE(right), !IS_UNSIGNED(operandType(right))); + +release: + pic16_freeAsmop (result,NULL,ic,TRUE); + pic16_freeAsmop (right,NULL,ic,FALSE); +} + +/*-----------------------------------------------------------------*/ +/* genJumpTab - generates code for jump table */ +/*-----------------------------------------------------------------*/ +static void genJumpTab (iCode *ic) +{ + symbol *jtab; + char *l; + pCodeOp *jt_offs; + pCodeOp *jt_offs_hi; + pCodeOp *jt_label; + + FENTRY; + + pic16_aopOp(IC_JTCOND(ic),ic,FALSE); + /* get the condition into accumulator */ + l = pic16_aopGet(AOP(IC_JTCOND(ic)),0,FALSE,FALSE); + MOVA(l); + /* multiply by three */ + pic16_emitcode("add","a,acc"); + pic16_emitcode("add","a,%s",pic16_aopGet(AOP(IC_JTCOND(ic)),0,FALSE,FALSE)); + + jtab = newiTempLabel(NULL); + pic16_emitcode("mov","dptr,#%05d_DS_",jtab->key+100); + pic16_emitcode("jmp","@a+dptr"); + pic16_emitcode("","%05d_DS_:",jtab->key+100); + +#if 0 + pic16_emitpcode(POC_MOVLW, pic16_popGetLabel(jtab->key)); + pic16_emitpcode(POC_ADDFW, pic16_popGet(AOP(IC_JTCOND(ic)),0)); + emitSKPNC; + pic16_emitpcode(POC_INCF, pic16_popCopyReg(&pic16_pc_pclath)); + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg(&pic16_pc_pcl)); + pic16_emitpLabel(jtab->key); + +#else + + jt_offs = pic16_popGetTempReg(0); + jt_offs_hi = pic16_popGetTempReg(1); + jt_label = pic16_popGetLabel (jtab->key); + //fprintf (stderr, "Creating jump table...\n"); + + // calculate offset into jump table (idx * sizeof (GOTO)) + pic16_emitpcode(POC_CLRF , jt_offs_hi); + pic16_emitpcode(POC_RLCFW , pic16_popGet(AOP(IC_JTCOND(ic)),0)); + pic16_emitpcode(POC_RLCF , jt_offs_hi); + pic16_emitpcode(POC_RLCFW , pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_RLCF , jt_offs_hi); + pic16_emitpcode(POC_ANDLW , pic16_popGetLit (0xFC)); + pic16_emitpcode(POC_MOVWF , jt_offs); + + // prepare PCLATx (set to first entry in jump table) + pic16_emitpcode(POC_MOVLW , pic16_popGetImmd(jt_label->name, 2, 0)); + pic16_emitpcode(POC_MOVWF , pic16_popCopyReg(&pic16_pc_pclatu)); + pic16_emitpcode(POC_MOVLW , pic16_popGetImmd(jt_label->name, 1, 0)); + pic16_emitpcode(POC_MOVWF , pic16_popCopyReg(&pic16_pc_pclath)); + pic16_emitpcode(POC_MOVLW , pic16_popGetImmd(jt_label->name, 0, 0)); + + // set PCLATx to selected entry (new PCL is stored in jt_offs) + pic16_emitpcode(POC_ADDWF , jt_offs); + pic16_emitpcode(POC_MOVFW , jt_offs_hi); + pic16_emitpcode(POC_ADDWFC, pic16_popCopyReg(&pic16_pc_pclath)); + emitSKPNC; + pic16_emitpcode(POC_INCF , pic16_popCopyReg(&pic16_pc_pclatu)); + + // release temporaries and prepare jump into table (new PCL --> WREG) + pic16_emitpcode(POC_MOVFW , jt_offs); + pic16_popReleaseTempReg (jt_offs_hi, 1); + pic16_popReleaseTempReg (jt_offs, 0); + + // jump into the table + pic16_emitpcode(POC_MOVWF , pic16_popCopyReg(&pic16_pc_pcl)); + + pic16_emitpLabelFORCE(jtab->key); +#endif + + pic16_freeAsmop(IC_JTCOND(ic),NULL,ic,TRUE); +// pic16_emitpinfo(INF_LOCALREGS, pic16_newpCodeOpLocalRegs(LR_ENTRY_BEGIN)); + + pic16_emitpinfo (INF_OPTIMIZATION, pic16_newpCodeOpOpt (OPT_JUMPTABLE_BEGIN, "")); + /* now generate the jump labels */ + for (jtab = setFirstItem(IC_JTLABELS(ic)) ; jtab; + jtab = setNextItem(IC_JTLABELS(ic))) { +// pic16_emitcode("ljmp","%05d_DS_",jtab->key+100); + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(jtab->key)); + + } + pic16_emitpinfo (INF_OPTIMIZATION, pic16_newpCodeOpOpt (OPT_JUMPTABLE_END, "")); + +} + +/*-----------------------------------------------------------------*/ +/* genMixedOperation - gen code for operators between mixed types */ +/*-----------------------------------------------------------------*/ +/* + TSD - Written for the PIC port - but this unfortunately is buggy. + This routine is good in that it is able to efficiently promote + types to different (larger) sizes. Unfortunately, the temporary + variables that are optimized out by this routine are sometimes + used in other places. So until I know how to really parse the + iCode tree, I'm going to not be using this routine :(. +*/ +static int genMixedOperation (iCode *ic) +{ +#if 0 + operand *result = IC_RESULT(ic); + sym_link *ctype = operandType(IC_LEFT(ic)); + operand *right = IC_RIGHT(ic); + int ret = 0; + int big,small; + int offset; + + iCode *nextic; + operand *nextright=NULL,*nextleft=NULL,*nextresult=NULL; + + pic16_emitcode("; ***","%s %d",__FUNCTION__,__LINE__); + + nextic = ic->next; + if(!nextic) + return 0; + + nextright = IC_RIGHT(nextic); + nextleft = IC_LEFT(nextic); + nextresult = IC_RESULT(nextic); + + pic16_aopOp(right,ic,FALSE); + pic16_aopOp(result,ic,FALSE); + pic16_aopOp(nextright, nextic, FALSE); + pic16_aopOp(nextleft, nextic, FALSE); + pic16_aopOp(nextresult, nextic, FALSE); + + if (pic16_sameRegs(AOP(IC_RESULT(ic)), AOP(IC_RIGHT(nextic)))) { + + operand *t = right; + right = nextright; + nextright = t; + + pic16_emitcode(";remove right +",""); + + } else if (pic16_sameRegs(AOP(IC_RESULT(ic)), AOP(IC_LEFT(nextic)))) { +/* + operand *t = right; + right = nextleft; + nextleft = t; +*/ + pic16_emitcode(";remove left +",""); + } else + return 0; + + big = AOP_SIZE(nextleft); + small = AOP_SIZE(nextright); + + switch(nextic->op) { + + case '+': + pic16_emitcode(";optimize a +",""); + /* if unsigned or not an integral type */ + if (AOP_TYPE(IC_LEFT(nextic)) == AOP_CRY) { + pic16_emitcode(";add a bit to something",""); + } else { + + pic16_emitcode("movf","%s,w",AOP(nextright)->aopu.aop_dir); + + if (!pic16_sameRegs(AOP(IC_LEFT(nextic)), AOP(IC_RESULT(nextic))) ) { + pic16_emitcode("addwf","%s,w",AOP(nextleft)->aopu.aop_dir); + pic16_emitcode("movwf","%s",pic16_aopGet(AOP(IC_RESULT(nextic)),0,FALSE,FALSE)); + } else + pic16_emitcode("addwf","%s,f",AOP(nextleft)->aopu.aop_dir); + + offset = 0; + while(--big) { + + offset++; + + if(--small) { + if (!pic16_sameRegs(AOP(IC_LEFT(nextic)), AOP(IC_RESULT(nextic))) ){ + pic16_emitcode("movf","%s,w",pic16_aopGet(AOP(IC_LEFT(nextic)),offset,FALSE,FALSE)); + pic16_emitcode("movwf","%s,f",pic16_aopGet(AOP(IC_RESULT(nextic)),offset,FALSE,FALSE) ); + } + + pic16_emitcode("movf","%s,w", pic16_aopGet(AOP(IC_LEFT(nextic)),offset,FALSE,FALSE)); + emitSKPNC; + pic16_emitcode("btfsc","(%s >> 3), (%s & 7)", + AOP(IC_RIGHT(nextic))->aopu.aop_dir, + AOP(IC_RIGHT(nextic))->aopu.aop_dir); + pic16_emitcode(" incf","%s,w", pic16_aopGet(AOP(IC_LEFT(nextic)),offset,FALSE,FALSE)); + pic16_emitcode("movwf","%s", pic16_aopGet(AOP(IC_RESULT(nextic)),offset,FALSE,FALSE)); + + } else { + pic16_emitcode("rlf","known_zero,w"); + + /* + if right is signed + btfsc right,7 + addlw ff + */ + if (!pic16_sameRegs(AOP(IC_LEFT(nextic)), AOP(IC_RESULT(nextic))) ){ + pic16_emitcode("addwf","%s,w",pic16_aopGet(AOP(IC_LEFT(nextic)),offset,FALSE,FALSE)); + pic16_emitcode("movwf","%s,f",pic16_aopGet(AOP(IC_RESULT(nextic)),offset,FALSE,FALSE) ); + } else { + pic16_emitcode("addwf","%s,f",pic16_aopGet(AOP(IC_RESULT(nextic)),offset,FALSE,FALSE) ); + } + } + } + ret = 1; + } + } + ret = 1; + +release: + pic16_freeAsmop(right,NULL,ic,TRUE); + pic16_freeAsmop(result,NULL,ic,TRUE); + pic16_freeAsmop(nextright,NULL,ic,TRUE); + pic16_freeAsmop(nextleft,NULL,ic,TRUE); + if(ret) + nextic->generated = 1; + + return ret; +#else + return 0; +#endif +} +/*-----------------------------------------------------------------*/ +/* genCast - gen code for casting */ +/*-----------------------------------------------------------------*/ +static void genCast (iCode *ic) +{ + operand *result = IC_RESULT(ic); + sym_link *ctype = operandType(IC_LEFT(ic)); + sym_link *rtype = operandType(IC_RIGHT(ic)); + sym_link *restype = operandType(IC_RESULT(ic)); + operand *right = IC_RIGHT(ic); + int size, offset ; + + + FENTRY; + + /* if they are equivalent then do nothing */ +// if (operandsEqu(IC_RESULT(ic),IC_RIGHT(ic))) +// return ; + + pic16_aopOp(result,ic,FALSE); + pic16_aopOp(right,ic,FALSE) ; + + DEBUGpic16_pic16_AopType(__LINE__,NULL,right,result); + + + /* if the result is a bit */ + if (AOP_TYPE(result) == AOP_CRY) { + + /* if the right size is a literal then + * we know what the value is */ + DEBUGpic16_emitcode("; ***","%s %d",__FUNCTION__,__LINE__); + + if (AOP_TYPE(right) == AOP_LIT) { + pic16_emitpcode( ( ((int) operandLitValue(right)) ? POC_BSF : POC_BCF), + pic16_popGet(AOP(result),0)); + + if (((int) operandLitValue(right))) + pic16_emitcode("bsf","(%s >> 3), (%s & 7)", + AOP(result)->aopu.aop_dir, + AOP(result)->aopu.aop_dir); + else + pic16_emitcode("bcf","(%s >> 3), (%s & 7)", + AOP(result)->aopu.aop_dir, + AOP(result)->aopu.aop_dir); + goto release; + } + + /* the right is also a bit variable */ + if (AOP_TYPE(right) == AOP_CRY) { + emitCLRC; + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(right),0)); + + pic16_emitcode("clrc",""); + pic16_emitcode("btfsc","(%s >> 3), (%s & 7)", + AOP(right)->aopu.aop_dir, + AOP(right)->aopu.aop_dir); + pic16_aopPut(AOP(result),"c",0); + goto release ; + } + + /* we need to or */ + if (AOP_TYPE(right) == AOP_REG) { + pic16_emitpcode(POC_BCF, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit(pic16_aopGet(AOP(right),0,FALSE,FALSE),0,0, PO_GPR_REGISTER)); + pic16_emitpcode(POC_BSF, pic16_popGet(AOP(result),0)); + } + pic16_toBoolean(right); + pic16_aopPut(AOP(result),"a",0); + goto release ; + } + + if ((AOP_TYPE(right) == AOP_CRY) && (AOP_TYPE(result) == AOP_REG)) { + int offset = 1; + + size = AOP_SIZE(result); + + DEBUGpic16_emitcode("; ***","%s %d",__FUNCTION__,__LINE__); + + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(right),0)); + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),0)); + + while (size--) + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),offset++)); + + goto release; + } + + if(IS_BITFIELD(getSpec(restype)) + && IS_BITFIELD(getSpec(rtype))) { + DEBUGpic16_emitcode("***", "%d casting a bit to another bit", __LINE__); + } + + /* port from pic14 to cope with generic pointers */ + if (PIC_IS_TAGGED(restype)) + { + operand *result = IC_RESULT(ic); + //operand *left = IC_LEFT(ic); + operand *right = IC_RIGHT(ic); + int tag = 0xff; + + /* copy common part */ + int max, size = AOP_SIZE(result); + if (size > AOP_SIZE(right)) size = AOP_SIZE(right); + DEBUGpic16_emitcode("; ***","%s %d",__FUNCTION__,__LINE__); + + max = size; + while (size--) + { + pic16_mov2w (AOP(right), size); + pic16_emitpcode(POC_MOVWF, pic16_popGet (AOP(result), size)); + } // while + + /* upcast into generic pointer type? */ + if (IS_GENPTR(restype) + && !PIC_IS_TAGGED(rtype) + && (AOP_SIZE(result) > max)) + { + /* determine appropriate tag for right */ + if (PIC_IS_DATA_PTR(rtype)) + tag = GPTR_TAG_DATA; + else if (IS_CODEPTR(rtype)) + tag = GPTR_TAG_CODE; + else if (PIC_IS_DATA_PTR(ctype)) { + //fprintf (stderr, "%s:%u: WARNING: casting `(generic*)(__data*)(non-pointer)'\n", ic->filename, ic->lineno); + tag = GPTR_TAG_DATA; + } else if (IS_CODEPTR(ctype)) { + //fprintf (stderr, "%s:%u: WARNING: casting `(generic*)(__code*)(non-pointer)'\n", ic->filename, ic->lineno); + tag = GPTR_TAG_CODE; + } else if (IS_PTR(rtype)) { + PERFORM_ONCE(weirdcast, + fprintf (stderr, "%s:%u: WARNING: casting `(generic*)(unknown*)' -- assuming __data space\n", ic->filename, ic->lineno); + ); + tag = GPTR_TAG_DATA; + } else { + PERFORM_ONCE(weirdcast, + fprintf (stderr, "%s:%u: WARNING: casting `(generic*)(non-pointer)' -- assuming __data space\n", ic->filename, ic->lineno); + ); + tag = GPTR_TAG_DATA; + } + + assert (AOP_SIZE(result) == 3); + /* zero-extend address... */ + for (size = max; size < AOP_SIZE(result)-1; size++) + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),size)); + /* ...and add tag */ + pic16_movLit2f(pic16_popGet(AOP(result), AOP_SIZE(result)-1), tag); + } else if (IS_CODEPTR(restype) && AOP_SIZE(result) > max) { + //fprintf (stderr, "%s:%u: INFO: code pointer\n", ic->filename, ic->lineno); + for (size = max; size < AOP_SIZE(result)-1; size++) + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result), size)); + /* add __code tag */ + pic16_movLit2f (pic16_popGet(AOP(result), AOP_SIZE(result)-1), GPTR_TAG_CODE); + } else if (AOP_SIZE(result) > max) { + /* extend non-pointers */ + //fprintf (stderr, "%s:%u: zero-extending value cast to pointer\n", ic->filename, ic->lineno); + pic16_addSign(result, max, 0); + } // if + goto release; + } + + /* if they are the same size : or less */ + if (AOP_SIZE(result) <= AOP_SIZE(right)) { + + /* if they are in the same place */ + if (pic16_sameRegs(AOP(right),AOP(result))) + goto release; + + DEBUGpic16_emitcode("; ***","%s %d",__FUNCTION__,__LINE__); +#if 0 + if (IS_PTR_CONST(rtype)) +#else + if (IS_CODEPTR(rtype)) +#endif + DEBUGpic16_emitcode ("; ***","%d - right is const pointer",__LINE__); + +#if 0 + if (IS_PTR_CONST(operandType(IC_RESULT(ic)))) +#else + if (IS_CODEPTR(operandType(IC_RESULT(ic)))) +#endif + DEBUGpic16_emitcode ("; ***","%d - result is const pointer",__LINE__); + + if ((AOP_TYPE(right) == AOP_PCODE) && AOP(right)->aopu.pcop->type == PO_IMMEDIATE) { + pic16_emitpcode(POC_MOVLW, pic16_popGet(AOP(right),0)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),0)); + + if(AOP_SIZE(result) < 2) { + fprintf(stderr,"%d -- casting a ptr to a char\n",__LINE__); + } else { + pic16_emitpcode(POC_MOVLW, pic16_popGet(AOP(right),1)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),1)); + } + } else { + /* if they in different places then copy */ + size = AOP_SIZE(result); + offset = 0 ; + while (size--) { + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(right),offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset)); + offset++; + } + } + goto release; + } + + /* if the result is of type pointer */ + if (IS_PTR(ctype)) { + int p_type; + sym_link *type = operandType(right); + sym_link *etype = getSpec(type); + + DEBUGpic16_emitcode("; ***","%s %d - pointer cast",__FUNCTION__,__LINE__); + + /* pointer to generic pointer */ + if (IS_GENPTR(ctype)) { + + if (IS_PTR(type)) + p_type = DCL_TYPE(type); + else { + /* we have to go by the storage class */ + p_type = PTR_TYPE(SPEC_OCLS(etype)); + +/* if (SPEC_OCLS(etype)->codesp ) */ +/* p_type = CPOINTER ; */ +/* else */ +/* if (SPEC_OCLS(etype)->fmap && !SPEC_OCLS(etype)->paged) */ +/* p_type = FPOINTER ; */ +/* else */ +/* if (SPEC_OCLS(etype)->fmap && SPEC_OCLS(etype)->paged) */ +/* p_type = PPOINTER; */ +/* else */ +/* if (SPEC_OCLS(etype) == idata ) */ +/* p_type = IPOINTER ; */ +/* else */ +/* p_type = POINTER ; */ + } + + /* the first two bytes are known */ + DEBUGpic16_emitcode("; ***","%s %d - pointer cast2",__FUNCTION__,__LINE__); + size = GPTRSIZE - 1; + offset = 0 ; + while (size--) { + if(offset < AOP_SIZE(right)) { + DEBUGpic16_emitcode("; ***","%s %d - pointer cast3 ptype = 0x%x",__FUNCTION__,__LINE__, p_type); + pic16_mov2f(AOP(result), AOP(right), offset); +/* + if ((AOP_TYPE(right) == AOP_PCODE) && + AOP(right)->aopu.pcop->type == PO_IMMEDIATE) { + pic16_emitpcode(POC_MOVLW, pic16_popGet(AOP(right),offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset)); + } else { + + pic16_aopPut(AOP(result), + pic16_aopGet(AOP(right),offset,FALSE,FALSE), + offset); + } +*/ + } else + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),offset)); + offset++; + } + /* the last byte depending on type */ + switch (p_type) { + case POINTER: + case FPOINTER: + case IPOINTER: + case PPOINTER: + pic16_movLit2f(pic16_popGet(AOP(result), GPTRSIZE-1), GPTR_TAG_DATA); + break; + + case CPOINTER: + pic16_emitpcode(POC_MOVFF, pic16_popGet2(AOP(right), AOP(result), GPTRSIZE-1)); + break; + + case GPOINTER: + if (GPTRSIZE > AOP_SIZE(right)) { + // assume __data pointer... THIS MIGHT BE WRONG! + pic16_movLit2f(pic16_popGet(AOP(result), GPTRSIZE-1), GPTR_TAG_DATA); + } else { + pic16_emitpcode(POC_MOVFF, pic16_popGet2(AOP(right), AOP(result), GPTRSIZE-1)); + } + break; + + default: + /* this should never happen */ + werror(E_INTERNAL_ERROR,__FILE__,__LINE__, + "got unknown pointer type"); + exit(1); + } + //pic16_aopPut(AOP(result),l, GPTRSIZE - 1); + goto release ; + } + + + assert( 0 ); + /* just copy the pointers */ + size = AOP_SIZE(result); + offset = 0 ; + while (size--) { + pic16_aopPut(AOP(result), + pic16_aopGet(AOP(right),offset,FALSE,FALSE), + offset); + offset++; + } + goto release ; + } + + + + /* so we now know that the size of destination is greater + than the size of the source. + Now, if the next iCode is an operator then we might be + able to optimize the operation without performing a cast. + */ + if(genMixedOperation(ic)) + goto release; + + DEBUGpic16_emitcode("; ***","%s %d",__FUNCTION__,__LINE__); + + /* we move to result for the size of source */ + size = AOP_SIZE(right); + offset = 0 ; + + while (size--) { + if(!_G.resDirect) + pic16_mov2f(AOP(result), AOP(right), offset); + offset++; + } + + /* now depending on the sign of the destination */ + size = AOP_SIZE(result) - AOP_SIZE(right); + /* if unsigned or not an integral type */ + if (SPEC_USIGN( getSpec(rtype) ) || !IS_SPEC(rtype)) { + while (size--) + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),offset++)); + } else { + /* we need to extend the sign :( */ + + if(size == 1) { + /* Save one instruction of casting char to int */ + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),offset)); + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit(pic16_aopGet(AOP(right),offset-1,FALSE,FALSE),7,0, PO_GPR_REGISTER)); + pic16_emitpcode(POC_SETF, pic16_popGet(AOP(result),offset)); + } else { + pic16_emitpcode(POC_CLRF,pic16_popCopyReg(&pic16_pc_wreg)); + + if(offset) + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit(pic16_aopGet(AOP(right),offset-1,FALSE,FALSE),7,0, PO_GPR_REGISTER)); + else + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit(pic16_aopGet(AOP(right),offset,FALSE,FALSE),7,0, PO_GPR_REGISTER)); + + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(0xff)); + + while (size--) + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset++)); + } + } + +release: + pic16_freeAsmop(right,NULL,ic,TRUE); + pic16_freeAsmop(result,NULL,ic,TRUE); + +} + +/*-----------------------------------------------------------------*/ +/* genDjnz - generate decrement & jump if not zero instrucion */ +/*-----------------------------------------------------------------*/ +static int genDjnz (iCode *ic, iCode *ifx) +{ + symbol *lbl, *lbl1; + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if (!ifx) + return 0; + + /* if the if condition has a false label + then we cannot save */ + if (IC_FALSE(ifx)) + return 0; + + /* if the minus is not of the form + a = a - 1 */ + if (!isOperandEqual(IC_RESULT(ic),IC_LEFT(ic)) || + !IS_OP_LITERAL(IC_RIGHT(ic))) + return 0; + + if (operandLitValue(IC_RIGHT(ic)) != 1) + return 0; + + /* if the size of this greater than one then no + saving */ + if (getSize(operandType(IC_RESULT(ic))) > 1) + return 0; + + /* otherwise we can save BIG */ + lbl = newiTempLabel(NULL); + lbl1= newiTempLabel(NULL); + + pic16_aopOp(IC_RESULT(ic),ic,FALSE); + + pic16_emitpcode(POC_DECFSZ,pic16_popGet(AOP(IC_RESULT(ic)),0)); + pic16_emitpcode(POC_GOTO,pic16_popGetLabel(IC_TRUE(ifx)->key)); + + pic16_freeAsmop(IC_RESULT(ic),NULL,ic,TRUE); + ifx->generated = 1; + return 1; +} + +/*-----------------------------------------------------------------*/ +/* genReceive - generate code for a receive iCode */ +/*-----------------------------------------------------------------*/ +static void genReceive (iCode *ic) +{ + + FENTRY; + +#if 0 + fprintf(stderr, "%s:%d %s for symbol %s\tonStack: %d\n", __FILE__, __LINE__, __FUNCTION__, + OP_SYMBOL( IC_RESULT(ic) )->rname, OP_SYMBOL( IC_RESULT(ic) )->onStack); +#endif +// pic16_DumpOp(__FUNCTION__, IC_RESULT(ic)); + + if (isOperandInFarSpace(IC_RESULT(ic)) + && ( OP_SYMBOL(IC_RESULT(ic))->isspilt + || IS_TRUE_SYMOP(IC_RESULT(ic))) ) { + + int size = getSize(operandType(IC_RESULT(ic))); + int offset = pic16_fReturnSizePic - size; + + assert( 0 ); + while (size--) { + pic16_emitcode ("push","%s", (strcmp(fReturn[pic16_fReturnSizePic - offset - 1],"a") ? + fReturn[pic16_fReturnSizePic - offset - 1] : "acc")); + offset++; + } + + DEBUGpic16_emitcode ("; ***","1 %s %d",__FUNCTION__,__LINE__); + + pic16_aopOp(IC_RESULT(ic),ic,FALSE); + size = AOP_SIZE(IC_RESULT(ic)); + offset = 0; + while (size--) { + pic16_emitcode ("pop","acc"); + pic16_aopPut (AOP(IC_RESULT(ic)),"a",offset++); + } + } else { + DEBUGpic16_emitcode ("; ***","2 %s %d argreg = %d",__FUNCTION__,__LINE__, SPEC_ARGREG(OP_SYM_ETYPE(IC_RESULT(ic)) )); + _G.accInUse++; + pic16_aopOp(IC_RESULT(ic),ic,FALSE); + _G.accInUse--; + + /* set pseudo stack pointer to where it should be - dw*/ + GpsuedoStkPtr = ic->parmBytes; + + /* setting GpsuedoStkPtr has side effects here: */ + /* FIXME: What's the correct size of the return(ed) value? + * For now, assuming '4' as before... */ + assignResultValue(IC_RESULT(ic), 4, 0); + } + + pic16_freeAsmop(IC_RESULT(ic),NULL,ic,TRUE); +} + +/*-----------------------------------------------------------------*/ +/* genDummyRead - generate code for dummy read of volatiles */ +/*-----------------------------------------------------------------*/ +static void +genDummyRead (iCode * ic) +{ + operand *op; + + op = IC_RIGHT(ic); + if (op && IS_SYMOP(op)) { + if (IN_CODESPACE(SPEC_OCLS(OP_SYM_ETYPE(op)))) { + fprintf (stderr, "%s: volatile symbols in codespace?!? -- might go wrong...\n", __FUNCTION__); + return; + } + pic16_aopOp (op, ic, FALSE); + pic16_mov2w_volatile(AOP(op)); + pic16_freeAsmop (op, NULL, ic, TRUE); + } else if (op) { + fprintf (stderr, "%s: not implemented for non-symbols (volatile operand might not be read)\n", __FUNCTION__); + } // if +} + +/*-----------------------------------------------------------------*/ +/* genpic16Code - generate code for pic16 based controllers */ +/*-----------------------------------------------------------------*/ +/* + * At this point, ralloc.c has gone through the iCode and attempted + * to optimize in a way suitable for a PIC. Now we've got to generate + * PIC instructions that correspond to the iCode. + * + * Once the instructions are generated, we'll pass through both the + * peep hole optimizer and the pCode optimizer. + *-----------------------------------------------------------------*/ + +void genpic16Code (iCode *lic) +{ + iCode *ic; + int cln = 0; + + lineHead = lineCurr = NULL; + + pb = pic16_newpCodeChain(GcurMemmap,0,pic16_newpCodeCharP("; Starting pCode block")); + pic16_addpBlock(pb); + +#if 0 + /* if debug information required */ + if (options.debug && currFunc) { + if (currFunc) { + cdbSymbol(currFunc,cdbFile,FALSE,TRUE); + } + } +#endif + + for (ic = lic ; ic ; ic = ic->next ) { + + DEBUGpic16_emitcode(";ic ", "\t%c 0x%x\t(%s)",ic->op, ic->op, pic16_decodeOp(ic->op)); + if ( cln != ic->lineno ) { + if ( options.debug ) { + debugFile->writeCLine (ic); + } + + if(!options.noCcodeInAsm) { + pic16_addpCode2pBlock(pb, pic16_newpCodeCSource(ic->lineno, ic->filename, + printCLine(ic->filename, ic->lineno))); + } + + cln = ic->lineno ; + } + + if(options.iCodeInAsm) { + const char *iLine; + + /* insert here code to print iCode as comment */ + iLine = printILine(ic); + pic16_emitpcomment("ic:%d: %s", ic->seq, iLine); + dbuf_free(iLine); + } + + /* if the result is marked as + * spilt and rematerializable or code for + * this has already been generated then + * do nothing */ + if (resultRemat(ic) || ic->generated ) + continue ; + + /* depending on the operation */ + switch (ic->op) { + case '!' : + pic16_genNot(ic); + break; + + case '~' : + pic16_genCpl(ic); + break; + + case UNARYMINUS: + genUminus (ic); + break; + + case IPUSH: + genIpush (ic); + break; + + case IPOP: + /* IPOP happens only when trying to restore a + * spilt live range, if there is an ifx statement + * following this pop then the if statement might + * be using some of the registers being popped which + * would destroy the contents of the register so + * we need to check for this condition and handle it */ + if (ic->next + && ic->next->op == IFX + && regsInCommon(IC_LEFT(ic),IC_COND(ic->next))) + genIfx (ic->next,ic); + else + genIpop (ic); + break; + + case CALL: + genCall (ic); + break; + + case PCALL: + genPcall (ic); + break; + + case FUNCTION: + genFunction (ic); + break; + + case ENDFUNCTION: + genEndFunction (ic); + break; + + case RETURN: + genRet (ic); + break; + + case LABEL: + genLabel (ic); + break; + + case GOTO: + genGoto (ic); + break; + + case '+' : + pic16_genPlus (ic) ; + break; + + case '-' : + if ( ! genDjnz (ic,ifxForOp(IC_RESULT(ic),ic))) + pic16_genMinus (ic); + break; + + case '*' : + genMult (ic); + break; + + case '/' : + genDiv (ic) ; + break; + + case '%' : + genMod (ic); + break; + + case '>' : + genCmpGt (ic,ifxForOp(IC_RESULT(ic),ic)); + break; + + case '<' : + genCmpLt (ic,ifxForOp(IC_RESULT(ic),ic)); + break; + + case LE_OP: + case GE_OP: + case NE_OP: + /* note these two are xlated by algebraic equivalence + * during parsing SDCC.y */ + werror(E_INTERNAL_ERROR,__FILE__,__LINE__, + "got '>=' or '<=' shouldn't have come here"); + break; + + case EQ_OP: + genCmpEq (ic,ifxForOp(IC_RESULT(ic),ic)); + break; + + case AND_OP: + genAndOp (ic); + break; + + case OR_OP: + genOrOp (ic); + break; + + case '^' : + genXor (ic,ifxForOp(IC_RESULT(ic),ic)); + break; + + case '|' : + genOr (ic,ifxForOp(IC_RESULT(ic),ic)); + break; + + case BITWISEAND: + genAnd (ic,ifxForOp(IC_RESULT(ic),ic)); + break; + + case INLINEASM: + genInline (ic); + break; + + case RRC: + genRRC (ic); + break; + + case RLC: + genRLC (ic); + break; + + case GETHBIT: + genGetHbit (ic); + break; + + case LEFT_OP: + genLeftShift (ic); + break; + + case RIGHT_OP: + genRightShift (ic); + break; + + case GET_VALUE_AT_ADDRESS: + genPointerGet(ic); + break; + + case '=' : + if (POINTER_SET(ic)) + genPointerSet(ic); + else + genAssign(ic); + break; + + case IFX: + genIfx (ic,NULL); + break; + + case ADDRESS_OF: + genAddrOf (ic); + break; + + case JUMPTABLE: + genJumpTab (ic); + break; + + case CAST: + genCast (ic); + break; + + case RECEIVE: + genReceive(ic); + break; + + case SEND: + addSet(&_G.sendSet,ic); + break; + + case DUMMY_READ_VOLATILE: + genDummyRead (ic); + break; + + default : + ic = ic; + } + } + + + /* now we are ready to call the + peep hole optimizer */ + if (!options.nopeep) + peepHole (&lineHead); + + /* now do the actual printing */ + printLine (lineHead, codeOutBuf); + +#ifdef PCODE_DEBUG + DFPRINTF((stderr,"printing pBlock\n\n")); + pic16_printpBlock(stdout,pb); +#endif + + return; +} diff --git a/src/pic16/gen.h b/src/pic16/gen.h new file mode 100644 index 0000000..437fa83 --- /dev/null +++ b/src/pic16/gen.h @@ -0,0 +1,224 @@ +/*------------------------------------------------------------------------- + gen.h - header file for code generation for PIC16 + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + PIC port - T. Scott Dattalo scott@dattalo.com (2000) + PIC16 port - Martin Dubuc m.dubuc@rogers.com (2000) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCGENPIC16_H +#define SDCCGENPIC16_H + +/* If you change these, you also have to update the library files + * device/lib/pic16/libsdcc/gptr{get,put}{1,2,3,4}.c */ +#define GPTR_TAG_DATA 0x80 +#define GPTR_TAG_EEPROM 0x40 +#define GPTR_TAG_CODE 0x00 /* must be 0 becaue of UPPER(sym)==0 */ + +struct pCodeOp; + +enum + { + AOP_LIT = 1, + AOP_REG, + AOP_DIR, + AOP_STK, + AOP_STR, + AOP_CRY, + AOP_ACC, + AOP_PCODE, + AOP_STA // asmop on stack + }; + +/* type asmop : a homogenised type for + all the different spaces an operand can be + in */ +typedef struct asmop + { + + short type; /* can have values + AOP_LIT - operand is a literal value + AOP_REG - is in registers + AOP_DIR - direct just a name + AOP_STK - should be pushed on stack this + can happen only for the result + AOP_CRY - carry contains the value of this + AOP_STR - array of strings + AOP_ACC - result is in the acc:b pair + */ + short coff; /* current offset */ + short size; /* total size */ + unsigned code:1; /* is in Code space */ + unsigned paged:1; /* in paged memory */ + unsigned freed:1; /* already freed */ + union + { + value *aop_lit; /* if literal */ + regs *aop_reg[4]; /* array of registers */ + char *aop_dir; /* if direct */ + regs *aop_ptr; /* either -> to r0 or r1 */ + int aop_stk; /* stack offset when AOP_STK */ + char *aop_str[4]; /* just a string array containing the location */ +/* regs *aop_alloc_reg; * points to a dynamically allocated register */ + pCodeOp *pcop; + struct { + int stk; + pCodeOp *pop[4]; + } stk; + } + aopu; + } +asmop; + +void genpic16Code (iCode *); + +extern unsigned pic16_fReturnSizePic; + + +#define AOP(op) op->aop +#define AOP_TYPE(op) AOP(op)->type +#define AOP_SIZE(op) AOP(op)->size + +#define AOP_NEEDSACC(x) (AOP(x) && (AOP_TYPE(x) == AOP_CRY || \ + AOP(x)->paged)) + +#define RESULTONSTACK(x) \ + (IC_RESULT(x) && IC_RESULT(x)->aop && \ + IC_RESULT(x)->aop->type == AOP_STK ) +#define RESULTONSTA(x) (IC_RESULT(x) && IC_RESULT(x)->aop && IC_RESULT(x)->aop->type == AOP_STA) + + +#define MOVA(x) if (strcmp(x,"a") && strcmp(x,"acc")) pic16_emitcode(";XXX mov","a,%s %s,%d",x,__FILE__,__LINE__); +#define CLRC pic16_emitcode(";XXX clr","c %s,%d",__FILE__,__LINE__); + + +#define BIT_NUMBER(x) (x & 7) +#define BIT_REGISTER(x) (x>>3) + + +#define LSB 0 +#define MSB16 1 +#define MSB24 2 +#define MSB32 3 + + +#define FUNCTION_LABEL_INC 40 + +/*-----------------------------------------------------------------*/ +/* Macros for emitting skip instructions */ +/*-----------------------------------------------------------------*/ + +#define emitSKPC pic16_emitpcode(POC_BTFSS,pic16_popCopyGPR2Bit(PCOP(&pic16_pc_status),PIC_C_BIT)) +#define emitSKPNC pic16_emitpcode(POC_BTFSC,pic16_popCopyGPR2Bit(PCOP(&pic16_pc_status),PIC_C_BIT)) +#define emitSKPZ pic16_emitpcode(POC_BTFSS,pic16_popCopyGPR2Bit(PCOP(&pic16_pc_status),PIC_Z_BIT)) +#define emitSKPNZ pic16_emitpcode(POC_BTFSC,pic16_popCopyGPR2Bit(PCOP(&pic16_pc_status),PIC_Z_BIT)) +#define emitSKPDC pic16_emitpcode(POC_BTFSS,pic16_popCopyGPR2Bit(PCOP(&pic16_pc_status),PIC_DC_BIT)) +#define emitSKPNDC pic16_emitpcode(POC_BTFSC,pic16_popCopyGPR2Bit(PCOP(&pic16_pc_status),PIC_DC_BIT)) +#define emitCLRZ pic16_emitpcode(POC_BCF, pic16_popCopyGPR2Bit(PCOP(&pic16_pc_status),PIC_Z_BIT)) +#define emitCLRC pic16_emitpcode(POC_BCF, pic16_popCopyGPR2Bit(PCOP(&pic16_pc_status),PIC_C_BIT)) +#define emitCLRDC pic16_emitpcode(POC_BCF, pic16_popCopyGPR2Bit(PCOP(&pic16_pc_status),PIC_DC_BIT)) +#define emitSETZ pic16_emitpcode(POC_BSF, pic16_popCopyGPR2Bit(PCOP(&pic16_pc_status),PIC_Z_BIT)) +#define emitSETC pic16_emitpcode(POC_BSF, pic16_popCopyGPR2Bit(PCOP(&pic16_pc_status),PIC_C_BIT)) +#define emitSETDC pic16_emitpcode(POC_BSF, pic16_popCopyGPR2Bit(PCOP(&pic16_pc_status),PIC_DC_BIT)) + +#define emitTOGC pic16_emitpcode(POC_BTG, pic16_popCopyGPR2Bit(PCOP(&pic16_pc_status),PIC_C_BIT)) + +int pic16_getDataSize(operand *op); +void pic16_emitpcode_real(PIC_OPCODE poc, pCodeOp *pcop); +#define pic16_emitpcode(poc,pcop) do { if (pic16_pcode_verbose) pic16_emitpcomment ("%s:%u(%s):", __FILE__, __LINE__, __FUNCTION__); pic16_emitpcode_real(poc,pcop); } while(0) +void pic16_emitpLabel(int key); +void pic16_emitcode (char *inst,char *fmt, ...); +void DEBUGpic16_emitcode (char *inst,char *fmt, ...); +void pic16_emitDebuggerSymbol (char *); +bool pic16_sameRegs (asmop *aop1, asmop *aop2 ); +char *pic16_aopGet (asmop *aop, int offset, bool bit16, bool dname); +void DEBUGpic16_pic16_AopType(int line_no, operand *left, operand *right, operand *result); +void DEBUGpic16_pic16_AopTypeSign(int line_no, operand *left, operand *right, operand *result); + + +bool pic16_genPlusIncr (iCode *ic); +void pic16_outBitAcc(operand *result); +void pic16_genPlusBits (iCode *ic); +void pic16_genPlus (iCode *ic); +bool pic16_genMinusDec (iCode *ic); +void pic16_addSign(operand *result, int offset, int sign); +void pic16_genMinusBits (iCode *ic); +void pic16_genMinus (iCode *ic); +void pic16_genLeftShiftLiteral (operand *left, operand *right, operand *result, iCode *ic); + +pCodeOp *pic16_popGet2p(pCodeOp *src, pCodeOp *dst); +void pic16_emitpcomment (char *fmt, ...); + +pCodeOp *pic16_popGetLabel(int key); +pCodeOp *pic16_popCopyReg(pCodeOpReg *pc); +pCodeOp *pic16_popCopyGPR2Bit(pCodeOp *pc, int bitval); +pCodeOp *pic16_popGetLit(int lit); +pCodeOp *pic16_popGetLit2(int lit, pCodeOp *arg2); +pCodeOp *popGetWithString(char *str); +pCodeOp *pic16_popGet (asmop *aop, int offset);//, bool bit16, bool dname); +pCodeOp *pic16_popGetTempReg(int lock); +pCodeOp *pic16_popGetTempRegCond(bitVect *, bitVect *, int lock); +void pic16_popReleaseTempReg(pCodeOp *pcop, int lock); + +pCodeOp *pic16_popCombine2(pCodeOpReg *src, pCodeOpReg *dst, int noalloc); + +void pic16_aopPut (asmop *aop, char *s, int offset); +void pic16_outAcc(operand *result); +void pic16_aopOp (operand *op, iCode *ic, bool result); +void pic16_outBitC(operand *result); +void pic16_toBoolean(operand *oper); +void pic16_freeAsmop (operand *op, asmop *aaop, iCode *ic, bool pop); +const char *pic16_pCodeOpType( pCodeOp *pcop); +int pic16_my_powof2 (unsigned long num); + +void pic16_mov2w (asmop *aop, int offset); +void pic16_mov2f(asmop *dst, asmop *src, int offset); + +bool pic16_isLitOp(operand *op); +bool pic16_isLitAop(asmop *aop); + +void dumpiCode(iCode *lic); + +int inWparamList(char *s); + +#include "device.h" + +#define DUMP_FUNCTION_ENTRY 1 +#define DUMP_FUNCTION_EXIT 0 + +#if DUMP_FUNCTION_ENTRY +#define FENTRY if(pic16_options.debgen&2)pic16_emitpcomment("**{\t%d %s", __LINE__, __FUNCTION__) +#define FENTRY2 if(pic16_options.debgen&2)pic16_emitpcomment("**{\t%d %s", __LINE__, __FUNCTION__) +#else +#define FENTRY +#define FENTRY2 +#endif + +#if DUMP_FUNCTION_EXIT +#define FEXIT if(pic16_options.debgen&2)pic16_emitpcomment("; **}", "%d %s", __LINE__, __FUNCTION__) +#define FEXIT2 if(pic16_options.debgen&2)pic16_emitpcomment("**{\t%d %s", __LINE__, __FUNCTION__) +#else +#define FEXIT +#define FEXIT2 +#endif + +#define ERROR werror(W_POSSBUG2, __FILE__, __LINE__) +#endif diff --git a/src/pic16/genarith.c b/src/pic16/genarith.c new file mode 100644 index 0000000..1e06e7b --- /dev/null +++ b/src/pic16/genarith.c @@ -0,0 +1,2521 @@ +/*------------------------------------------------------------------------- + + genarith.c - source file for code generation - arithmetic + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + and - Jean-Louis VERN.jlvern@writeme.com (1999) + Bug Fixes - Wojciech Stryjewski wstryj1@tiger.lsu.edu (1999 v2.1.9a) + PIC port - Scott Dattalo scott@dattalo.com (2000) + PIC16 port - Martin Dubuc m.dubuc@rogers.com (2002) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + Notes: + 000123 mlh Moved aopLiteral to SDCCglue.c to help the split + Made everything static +-------------------------------------------------------------------------*/ + +#include +#include +#include +#include +#include "SDCCglobl.h" +#include "newalloc.h" + +#if defined(_MSC_VER) && (_MSC_VER < 1300) +#define __FUNCTION__ __FILE__ +#endif + +#include "common.h" +#include "SDCCpeeph.h" +#include "ralloc.h" +#include "pcode.h" +#include "gen.h" + +#if 1 +#define pic16_emitcode DEBUGpic16_emitcode +#endif + +#define BYTEofLONG(l,b) ( (l>> (b<<3)) & 0xff) +void DEBUGpic16_pic16_AopType(int line_no, operand *left, operand *right, operand *result); +void pic16_emitpcomment(char *, ...); +pCodeOp *pic16_popGet2p(pCodeOp *src, pCodeOp *dst); +const char *pic16_AopType(short type) +{ + switch(type) { + case AOP_LIT: return "AOP_LIT"; + case AOP_REG: return "AOP_REG"; + case AOP_DIR: return "AOP_DIR"; + case AOP_STK: return "AOP_STK"; + case AOP_STR: return "AOP_STR"; + case AOP_CRY: return "AOP_CRY"; + case AOP_ACC: return "AOP_ACC"; + case AOP_PCODE: return "AOP_PCODE"; + case AOP_STA: return "AOP_STA"; + } + + return "BAD TYPE"; +} + +const char *pic16_pCodeOpType(pCodeOp *pcop) +{ + + if(pcop) { + + switch(pcop->type) { + + case PO_NONE: return "PO_NONE"; + case PO_W: return "PO_W"; + case PO_WREG: return "PO_WREG"; + case PO_STATUS: return "PO_STATUS"; + case PO_BSR: return "PO_BSR"; + case PO_FSR0: return "PO_FSR0"; + case PO_INDF0: return "PO_INDF0"; + case PO_INTCON: return "PO_INTCON"; + case PO_GPR_REGISTER: return "PO_GPR_REGISTER"; + case PO_GPR_BIT: return "PO_GPR_BIT"; + case PO_GPR_TEMP: return "PO_GPR_TEMP"; + case PO_SFR_REGISTER: return "PO_SFR_REGISTER"; + case PO_PCL: return "PO_PCL"; + case PO_PCLATH: return "PO_PCLATH"; + case PO_PCLATU: return "PO_PCLATU"; + case PO_PRODL: return "PO_PRODL"; + case PO_PRODH: return "PO_PRODH"; + case PO_LITERAL: return "PO_LITERAL"; + case PO_REL_ADDR: return "PO_REL_ADDR"; + case PO_IMMEDIATE: return "PO_IMMEDIATE"; + case PO_DIR: return "PO_DIR"; + case PO_CRY: return "PO_CRY"; + case PO_BIT: return "PO_BIT"; + case PO_STR: return "PO_STR"; + case PO_LABEL: return "PO_LABEL"; + case PO_WILD: return "PO_WILD"; + case PO_TWO_OPS: return "PO_TWO_OPS"; + } + } + + return "BAD PO_TYPE"; +} + +const char *pic16_pCodeOpSubType(pCodeOp *pcop) +{ + + if(pcop && (pcop->type == PO_GPR_BIT)) { + + switch(PCORB(pcop)->subtype) { + + case PO_NONE: return "PO_NONE"; + case PO_W: return "PO_W"; + case PO_WREG: return "PO_WREG"; + case PO_STATUS: return "PO_STATUS"; + case PO_BSR: return "PO_BSR"; + case PO_FSR0: return "PO_FSR0"; + case PO_INDF0: return "PO_INDF0"; + case PO_INTCON: return "PO_INTCON"; + case PO_GPR_REGISTER: return "PO_GPR_REGISTER"; + case PO_GPR_BIT: return "PO_GPR_BIT"; + case PO_GPR_TEMP: return "PO_GPR_TEMP"; + case PO_SFR_REGISTER: return "PO_SFR_REGISTER"; + case PO_PCL: return "PO_PCL"; + case PO_PCLATH: return "PO_PCLATH"; + case PO_PCLATU: return "PO_PCLATU"; + case PO_PRODL: return "PO_PRODL"; + case PO_PRODH: return "PO_PRODH"; + case PO_LITERAL: return "PO_LITERAL"; + case PO_REL_ADDR: return "PO_REL_ADDR"; + case PO_IMMEDIATE: return "PO_IMMEDIATE"; + case PO_DIR: return "PO_DIR"; + case PO_CRY: return "PO_CRY"; + case PO_BIT: return "PO_BIT"; + case PO_STR: return "PO_STR"; + case PO_LABEL: return "PO_LABEL"; + case PO_WILD: return "PO_WILD"; + case PO_TWO_OPS: return "PO_TWO_OPS"; + } + } + + return "BAD PO_TYPE"; +} + +/*-----------------------------------------------------------------*/ +/* pic16_genPlusIncr :- does addition with increment if possible */ +/*-----------------------------------------------------------------*/ +bool pic16_genPlusIncr (iCode *ic) +{ + unsigned int icount ; + unsigned int size = pic16_getDataSize(IC_RESULT(ic)); + + FENTRY; + + DEBUGpic16_emitcode ("; ","result %s, left %s, right %s", + pic16_AopType(AOP_TYPE(IC_RESULT(ic))), + pic16_AopType(AOP_TYPE(IC_LEFT(ic))), + pic16_AopType(AOP_TYPE(IC_RIGHT(ic)))); + + /* will try to generate an increment */ + /* if the right side is not a literal + we cannot */ + if (AOP_TYPE(IC_RIGHT(ic)) != AOP_LIT) + return FALSE ; + + DEBUGpic16_emitcode ("; ","%s %d",__FUNCTION__,__LINE__); + /* if the literal value of the right hand side + is greater than 2 then it is faster to add */ + if ((icount = (unsigned int) ulFromVal (AOP(IC_RIGHT(ic))->aopu.aop_lit)) > 2) + return FALSE ; + + /* if increment 16 bits in register */ + if (pic16_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic))) && + (icount == 1)) { + + int offset = MSB16; + + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(IC_RESULT(ic)),LSB)); + //pic16_emitcode("incf","%s,f",pic16_aopGet(AOP(IC_RESULT(ic)),LSB,FALSE,FALSE)); + + while(--size) { + emitSKPNC; + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(IC_RESULT(ic)),offset++)); + //pic16_emitcode(" incf","%s,f",pic16_aopGet(AOP(IC_RESULT(ic)),offset++,FALSE,FALSE)); + } + + return TRUE; + } + +// DEBUGpic16_emitcode ("; ","%s %d",__FUNCTION__,__LINE__); + /* if left is in accumulator - probably a bit operation*/ // VR - why this is a bit operation?! + if( (AOP_TYPE(IC_LEFT(ic)) == AOP_ACC) && + (AOP_TYPE(IC_RESULT(ic)) == AOP_CRY) ) { + + pic16_emitpcode(POC_BCF, pic16_popGet(AOP(IC_RESULT(ic)),0)); + if(icount) + pic16_emitpcode(POC_XORLW,pic16_popGetLit(1)); + //pic16_emitcode("xorlw","1"); + else + pic16_emitpcode(POC_ANDLW,pic16_popGetLit(1)); + //pic16_emitcode("andlw","1"); + + emitSKPZ; + pic16_emitpcode(POC_BSF, pic16_popGet(AOP(IC_RESULT(ic)),0)); + + return TRUE; + } + + + /* if the sizes are greater than 1 then we cannot */ + if (AOP_SIZE(IC_RESULT(ic)) > 1 || + AOP_SIZE(IC_LEFT(ic)) > 1 ) + return FALSE ; + + /* If we are incrementing the same register by two: */ + + if (pic16_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic))) ) { + + while (icount--) + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(IC_RESULT(ic)),0)); + //pic16_emitcode("incf","%s,f",pic16_aopGet(AOP(IC_RESULT(ic)),0,FALSE,FALSE)); + + return TRUE ; + } + + DEBUGpic16_emitcode ("; ","couldn't increment "); + + return FALSE ; +} + +/*-----------------------------------------------------------------*/ +/* pic16_outBitAcc - output a bit in acc */ +/*-----------------------------------------------------------------*/ +void pic16_outBitAcc(operand *result) +{ + symbol *tlbl = newiTempLabel(NULL); + /* if the result is a bit */ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + assert(0); // not implemented for PIC16? + + if (AOP_TYPE(result) == AOP_CRY){ + pic16_aopPut(AOP(result),"a",0); + } + else { + pic16_emitcode("jz","%05d_DS_",tlbl->key+100); + pic16_emitcode("mov","a,#01"); + pic16_emitcode("","%05d_DS_:",tlbl->key+100); + pic16_outAcc(result); + } +} + +/*-----------------------------------------------------------------*/ +/* pic16_genPlusBits - generates code for addition of two bits */ +/*-----------------------------------------------------------------*/ +void pic16_genPlusBits (iCode *ic) +{ + FENTRY; + + DEBUGpic16_emitcode ("; ","result %s, left %s, right %s", + pic16_AopType(AOP_TYPE(IC_RESULT(ic))), + pic16_AopType(AOP_TYPE(IC_LEFT(ic))), + pic16_AopType(AOP_TYPE(IC_RIGHT(ic)))); + /* + The following block of code will add two bits. + Note that it'll even work if the destination is + the carry (C in the status register). + It won't work if the 'Z' bit is a source or destination. + */ + + /* If the result is stored in the accumulator (w) */ + //if(strcmp(pic16_aopGet(AOP(IC_RESULT(ic)),0,FALSE,FALSE),"a") == 0 ) { + switch(AOP_TYPE(IC_RESULT(ic))) { + case AOP_ACC: + pic16_emitpcode(POC_CLRF, pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(IC_RIGHT(ic)),0)); + pic16_emitpcode(POC_XORLW, pic16_popGetLit(1)); + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(IC_LEFT(ic)),0)); + pic16_emitpcode(POC_XORLW, pic16_popGetLit(1)); + break; + case AOP_REG: + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(0)); + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(IC_RIGHT(ic)),0)); + pic16_emitpcode(POC_XORLW, pic16_popGetLit(1)); + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(IC_LEFT(ic)),0)); + pic16_emitpcode(POC_XORLW, pic16_popGetLit(1)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(IC_RESULT(ic)),0)); + break; + default: + pic16_emitpcode(POC_MOVLW, pic16_popGet(AOP(IC_RESULT(ic)),0)); + pic16_emitpcode(POC_BCF, pic16_popGet(AOP(IC_RESULT(ic)),0)); + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(IC_RIGHT(ic)),0)); + pic16_emitpcode(POC_XORWF, pic16_popGet(AOP(IC_RESULT(ic)),0)); + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(IC_LEFT(ic)),0)); + pic16_emitpcode(POC_XORWF, pic16_popGet(AOP(IC_RESULT(ic)),0)); + break; + } + +} + +#if 0 +/* This is the original version of this code. + * + * This is being kept around for reference, + * because I am not entirely sure I got it right... + */ +static void adjustArithmeticResult(iCode *ic) +{ + if (AOP_SIZE(IC_RESULT(ic)) == 3 && + AOP_SIZE(IC_LEFT(ic)) == 3 && + !pic16_sameRegs(AOP(IC_RESULT(ic)),AOP(IC_LEFT(ic)))) + pic16_aopPut(AOP(IC_RESULT(ic)), + pic16_aopGet(AOP(IC_LEFT(ic)),2,FALSE,FALSE), + 2); + + if (AOP_SIZE(IC_RESULT(ic)) == 3 && + AOP_SIZE(IC_RIGHT(ic)) == 3 && + !pic16_sameRegs(AOP(IC_RESULT(ic)),AOP(IC_RIGHT(ic)))) + pic16_aopPut(AOP(IC_RESULT(ic)), + pic16_aopGet(AOP(IC_RIGHT(ic)),2,FALSE,FALSE), + 2); + + if (AOP_SIZE(IC_RESULT(ic)) == 3 && + AOP_SIZE(IC_LEFT(ic)) < 3 && + AOP_SIZE(IC_RIGHT(ic)) < 3 && + !pic16_sameRegs(AOP(IC_RESULT(ic)),AOP(IC_LEFT(ic))) && + !pic16_sameRegs(AOP(IC_RESULT(ic)),AOP(IC_RIGHT(ic)))) { + char buffer[5]; + sprintf(buffer,"#%d",pointerCode(getSpec(operandType(IC_LEFT(ic))))); + pic16_aopPut(AOP(IC_RESULT(ic)),buffer,2); + } +} +//#else +/* This is the pure and virtuous version of this code. + * I'm pretty certain it's right, but not enough to toss the old + * code just yet... + */ +static void adjustArithmeticResult(iCode *ic) +{ + if (opIsGptr(IC_RESULT(ic)) && + opIsGptr(IC_LEFT(ic)) && + !pic16_sameRegs(AOP(IC_RESULT(ic)),AOP(IC_LEFT(ic)))) + { + pic16_aopPut(AOP(IC_RESULT(ic)), + pic16_aopGet(AOP(IC_LEFT(ic)), GPTRSIZE - 1,FALSE,FALSE), + GPTRSIZE - 1); + } + + if (opIsGptr(IC_RESULT(ic)) && + opIsGptr(IC_RIGHT(ic)) && + !pic16_sameRegs(AOP(IC_RESULT(ic)),AOP(IC_RIGHT(ic)))) + { + pic16_aopPut(AOP(IC_RESULT(ic)), + pic16_aopGet(AOP(IC_RIGHT(ic)),GPTRSIZE - 1,FALSE,FALSE), + GPTRSIZE - 1); + } + + if (opIsGptr(IC_RESULT(ic)) && + AOP_SIZE(IC_LEFT(ic)) < GPTRSIZE && + AOP_SIZE(IC_RIGHT(ic)) < GPTRSIZE && + !pic16_sameRegs(AOP(IC_RESULT(ic)),AOP(IC_LEFT(ic))) && + !pic16_sameRegs(AOP(IC_RESULT(ic)),AOP(IC_RIGHT(ic)))) { + char buffer[5]; + sprintf(buffer,"#%d",pointerCode(getSpec(operandType(IC_LEFT(ic))))); + pic16_aopPut(AOP(IC_RESULT(ic)),buffer,GPTRSIZE - 1); + } +} +#endif + +#if 1 +/*-----------------------------------------------------------------*/ +/* genAddlit - generates code for addition */ +/*-----------------------------------------------------------------*/ +static void genAddLit2byte (operand *result, int offr, int lit) +{ + FENTRY; + + switch(lit & 0xff) { + case 0: + break; + case 1: + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),offr)); + break; + case 0xff: + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(result),offr)); + break; + default: + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(lit&0xff)); + pic16_emitpcode(POC_ADDWF,pic16_popGet(AOP(result),offr)); + } + +} +#endif + +static void emitMOVWF(operand *reg, int offset) +{ + if(!reg) + return; + + if (AOP_TYPE(reg) == AOP_ACC) { + DEBUGpic16_emitcode ("; ***","%s %d ignoring mov into W",__FUNCTION__,__LINE__); + return; + } + + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(reg),offset)); + +} + + +#if 1 + +static void genAddLit (iCode *ic, int lit) +{ + + int size,same; + int lo, offset; + + operand *result; + operand *left; + + FENTRY; + + left = IC_LEFT(ic); + result = IC_RESULT(ic); + same = pic16_sameRegs(AOP(left), AOP(result)); + size = pic16_getDataSize(result); + + if ((AOP_PCODE == AOP_TYPE(left)) + && (PO_IMMEDIATE == AOP(left)->aopu.pcop->type)) + { + /* see #1888004 for an example case for this */ + for (offset = 0; offset < size; offset++) { + pic16_emitpcode(POC_MOVLW, pic16_newpCodeOpImmd(AOP(left)->aopu.pcop->name, + offset, PCOI(AOP(left)->aopu.pcop)->index + lit, 0)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), offset)); + } // for + return; + } // if + + if(same) { + + /* Handle special cases first */ + if(size == 1) + genAddLit2byte (result, 0, lit); + + else if(size == 2) { + int hi = 0xff & (lit >> 8); + lo = lit & 0xff; + + switch(hi) { + case 0: + + /* lit = 0x00LL */ + DEBUGpic16_emitcode ("; hi = 0","%s %d",__FUNCTION__,__LINE__); + switch(lo) { + case 0: + break; + case 1: + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),0)); + emitSKPNZ; + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + break; + case 0xff: + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_INCFSZW, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + + break; + default: + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(lit&0xff)); + pic16_emitpcode(POC_ADDWF,pic16_popGet(AOP(result),0)); + emitSKPNC; + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + + + } + break; + + case 1: + /* lit = 0x01LL */ + DEBUGpic16_emitcode ("; hi = 1","%s %d",__FUNCTION__,__LINE__); + switch(lo) { + case 0: /* 0x0100 */ + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + break; + case 1: /* 0x0101 */ + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),0)); + emitSKPNZ; + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + break; + case 0xff: /* 0x01ff */ + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_INCFSZW, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + break; + default: /* 0x01LL */ + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(lo)); + pic16_emitpcode(POC_ADDWF,pic16_popGet(AOP(result),0)); + emitSKPNC; + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + } + break; + + case 0xff: + DEBUGpic16_emitcode ("; hi = ff","%s %d",__FUNCTION__,__LINE__); + /* lit = 0xffLL */ + switch(lo) { + case 0: /* 0xff00 */ + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(result),MSB16)); + break; + case 1: /*0xff01 */ + pic16_emitpcode(POC_INCFSZ, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(result),MSB16)); + break; +/* case 0xff: * 0xffff * + pic16_emitpcode(POC_INCFSZW, pic16_popGet(AOP(result),0,FALSE,FALSE)); + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16,FALSE,FALSE)); + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + break; +*/ + default: + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(lo)); + pic16_emitpcode(POC_ADDWF,pic16_popGet(AOP(result),0)); + emitSKPC; + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(result),MSB16)); + + } + + break; + + default: + DEBUGpic16_emitcode ("; hi is generic","%d %s %d",hi,__FUNCTION__,__LINE__); + + /* lit = 0xHHLL */ + switch(lo) { + case 0: /* 0xHH00 */ + genAddLit2byte (result, MSB16, hi); + break; + case 1: /* 0xHH01 */ + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(hi)); + pic16_emitpcode(POC_ADDWFC,pic16_popGet(AOP(result),MSB16)); + break; +/* case 0xff: * 0xHHff * + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(result),0,FALSE,FALSE)); + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(result),MSB16,FALSE,FALSE)); + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(hi)); + pic16_emitpcode(POC_ADDWF,pic16_popGet(AOP(result),MSB16,FALSE,FALSE)); + break; +*/ default: /* 0xHHLL */ + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(lo)); + pic16_emitpcode(POC_ADDWF, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(hi)); + pic16_emitpcode(POC_ADDWFC,pic16_popGet(AOP(result),MSB16)); + break; + } + + } + } else { + int carry_info = 0; + int offset = 0; + /* size > 2 */ + DEBUGpic16_emitcode ("; add lit to long","%s %d",__FUNCTION__,__LINE__); + + while(size--) { + lo = BYTEofLONG(lit,0); + + if(carry_info) { + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(lo)); + pic16_emitpcode(POC_ADDWFC, pic16_popGet(AOP(result),offset)); + }else { + /* no carry info from previous step */ + /* this means this is the first time to add */ + switch(lo) { + case 0: + break; + case 1: + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),offset)); + carry_info=1; + break; + default: + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(lo)); + pic16_emitpcode(POC_ADDWF, pic16_popGet(AOP(result),offset)); + if(lit <0x100) + carry_info = 3; /* Were adding only one byte and propogating the carry */ + else + carry_info = 2; + break; + } + } + offset++; + lit >>= 8; + } + +/* + lo = BYTEofLONG(lit,0); + + if(lit < 0x100) { + if(lo) { + if(lo == 1) { + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + emitSKPNZ; + } else { + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(lo)); + pic16_emitpcode(POC_ADDWF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + emitSKPNC; + } + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),1,FALSE,FALSE)); + emitSKPNZ; + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),2,FALSE,FALSE)); + emitSKPNZ; + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),3,FALSE,FALSE)); + + } + } + +*/ + } + } else { + int offset = 1; + DEBUGpic16_emitcode ("; left and result aren't same","%s %d",__FUNCTION__,__LINE__); + + if(size == 1) { + + if(AOP_TYPE(left) == AOP_ACC) { + /* left addend is already in accumulator */ + switch(lit & 0xff) { + case 0: + //pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + emitMOVWF(result,0); + break; + default: + pic16_emitpcode(POC_ADDLW, pic16_popGetLit(lit & 0xff)); + //pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + emitMOVWF(result,0); + } + } else { + /* left addend is in a register */ + switch(lit & 0xff) { + case 0: + pic16_mov2w(AOP(left),0); + emitMOVWF(result, 0); + break; + case 1: + pic16_emitpcode(POC_INCFW, pic16_popGet(AOP(left),0)); + //pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + emitMOVWF(result,0); + break; + case 0xff: + pic16_emitpcode(POC_DECFW, pic16_popGet(AOP(left),0)); + //pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + emitMOVWF(result,0); + break; + default: + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(lit & 0xff)); + pic16_emitpcode(POC_ADDFW, pic16_popGet(AOP(left),0)); + //pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + emitMOVWF(result,0); + } + } + +// } else if (pic16_isLitAop(AOP(left))) { +// // adding two literals +// assert ( !"adding two literals is not yet supported" ); + } else { + int clear_carry=0; + + /* left is not the accumulator */ + if(lit & 0xff) { + pic16_mov2w(AOP(left),0); + pic16_emitpcode(POC_ADDLW, pic16_popGetLit(lit & 0xff)); + } else { + pic16_mov2w(AOP(left),0); + /* We don't know the state of the carry bit at this point */ + clear_carry = 1; + } + //pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + emitMOVWF(result,0); + while(--size) { + lit >>= 8; + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(lit & 0xff)); + if (offset < AOP_SIZE(left)) { + pic16_emitpcode(clear_carry ? POC_ADDFW : POC_ADDFWC, pic16_popGet(AOP(left),offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset)); + } else { + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),offset)); + if (!SPEC_USIGN(operandType(IC_LEFT(ic)))) { + /* sign-extend left (in result) */ + pic16_emitpcode (POC_BTFSC, pic16_newpCodeOpBit_simple(AOP(left),AOP_SIZE(left)-1,7)); + pic16_emitpcode(POC_SETF, pic16_popGet(AOP(result),offset)); + } + pic16_emitpcode(clear_carry ? POC_ADDWF : POC_ADDWFC, pic16_popGet(AOP(result),offset)); + } + clear_carry = 0; + offset++; + } + } + } +} + +#else + /* this fails when result is an SFR because value is written there + * during addition and not at the end */ + +static void genAddLit (iCode *ic, int lit) +{ + + int size,sizeL,same; + int i, llit; + + operand *result; + operand *left; + + FENTRY; + + + left = IC_LEFT(ic); + result = IC_RESULT(ic); + same = pic16_sameRegs(AOP(left), AOP(result)); + size = pic16_getDataSize(result); + sizeL = pic16_getDataSize(left); + llit = lit; + +#define MIN(a,b) (((a) < (b)) ? (a) : (b)) + /* move left to result -- possibly sign extend */ + for (i=0; i < MIN(size, sizeL); i++) { + pic16_mov2f (AOP(result), AOP(left), i); + } // for i +#undef MIN + + /* extend to result size */ + pic16_addSign(result, sizeL, !IS_UNSIGNED(operandType(left))); + + /* special cases */ + if (lit == 0) { + /* nothing to do */ + } else if (lit == 1) { + switch (size) { + case 1: + /* handled below */ + break; + case 2: + pic16_emitpcode (POC_INFSNZ, pic16_popGet (AOP(result), 0)); + break; + default: + assert (size > 2); + pic16_emitpcode (POC_INCF, pic16_popGet(AOP(result), 0)); + for (i=1; i < size-1; i++) { + emitSKPNC; /* a jump here saves up to 2(size-2)cycles */ + pic16_emitpcode (POC_INCF, pic16_popGet(AOP(result), i)); + } // for i + emitSKPNC; + break; + } // switch + + pic16_emitpcode (POC_INCF, pic16_popGet (AOP(result), size-1)); + } else { + /* general case */ + + /* add literal to result */ + for (i=0; i < size; i++) { + pic16_emitpcode (POC_MOVLW, pic16_popGetLit (llit)); + llit >>= 8; /* FIXME: arithmetic right shift for signed literals? */ + pic16_emitpcode (i == 0 ? POC_ADDWF : POC_ADDWFC, + pic16_popGet (AOP(result), i)); + } + } + +#if 0 + + if(same) { + + /* Handle special cases first */ + if(size == 1) + genAddLit2byte (result, 0, lit); + + else if(size == 2) { + int hi = 0xff & (lit >> 8); + lo = lit & 0xff; + + switch(hi) { + case 0: + + /* lit = 0x00LL */ + DEBUGpic16_emitcode ("; hi = 0","%s %d",__FUNCTION__,__LINE__); + switch(lo) { + case 0: + break; + case 1: + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),0)); + emitSKPNZ; + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + break; + case 0xff: + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_INCFSZW, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + + break; + default: + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(lit&0xff)); + pic16_emitpcode(POC_ADDWF,pic16_popGet(AOP(result),0)); + emitSKPNC; + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + + + } + break; + + case 1: + /* lit = 0x01LL */ + DEBUGpic16_emitcode ("; hi = 1","%s %d",__FUNCTION__,__LINE__); + switch(lo) { + case 0: /* 0x0100 */ + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + break; + case 1: /* 0x0101 */ + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),0)); + emitSKPNZ; + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + break; + case 0xff: /* 0x01ff */ + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_INCFSZW, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + break; + default: /* 0x01LL */ + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(lo)); + pic16_emitpcode(POC_ADDWF,pic16_popGet(AOP(result),0)); + emitSKPNC; + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16)); + } + break; + + case 0xff: + DEBUGpic16_emitcode ("; hi = ff","%s %d",__FUNCTION__,__LINE__); + /* lit = 0xffLL */ + switch(lo) { + case 0: /* 0xff00 */ + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(result),MSB16)); + break; + case 1: /*0xff01 */ + pic16_emitpcode(POC_INCFSZ, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(result),MSB16)); + break; +/* case 0xff: * 0xffff * + pic16_emitpcode(POC_INCFSZW, pic16_popGet(AOP(result),0,FALSE,FALSE)); + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),MSB16,FALSE,FALSE)); + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + break; +*/ + default: + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(lo)); + pic16_emitpcode(POC_ADDWF,pic16_popGet(AOP(result),0)); + emitSKPC; + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(result),MSB16)); + + } + + break; + + default: + DEBUGpic16_emitcode ("; hi is generic","%d %s %d",hi,__FUNCTION__,__LINE__); + + /* lit = 0xHHLL */ + switch(lo) { + case 0: /* 0xHH00 */ + genAddLit2byte (result, MSB16, hi); + break; + case 1: /* 0xHH01 */ + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(hi)); + pic16_emitpcode(POC_ADDWFC,pic16_popGet(AOP(result),MSB16)); + break; +/* case 0xff: * 0xHHff * + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(result),0,FALSE,FALSE)); + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(result),MSB16,FALSE,FALSE)); + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(hi)); + pic16_emitpcode(POC_ADDWF,pic16_popGet(AOP(result),MSB16,FALSE,FALSE)); + break; +*/ default: /* 0xHHLL */ + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(lo)); + pic16_emitpcode(POC_ADDWF, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(hi)); + pic16_emitpcode(POC_ADDWFC,pic16_popGet(AOP(result),MSB16)); + break; + } + + } + } else { + int carry_info = 0; + int offset = 0; + /* size > 2 */ + DEBUGpic16_emitcode ("; add lit to long","%s %d",__FUNCTION__,__LINE__); + + while(size--) { + lo = BYTEofLONG(lit,0); + + if(carry_info) { + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(lo)); + pic16_emitpcode(POC_ADDWFC, pic16_popGet(AOP(result),offset)); + }else { + /* no carry info from previous step */ + /* this means this is the first time to add */ + switch(lo) { + case 0: + break; + case 1: + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),offset)); + carry_info=1; + break; + default: + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(lo)); + pic16_emitpcode(POC_ADDWF, pic16_popGet(AOP(result),offset)); + if(lit <0x100) + carry_info = 3; /* Were adding only one byte and propogating the carry */ + else + carry_info = 2; + break; + } + } + offset++; + lit >>= 8; + } + +/* + lo = BYTEofLONG(lit,0); + + if(lit < 0x100) { + if(lo) { + if(lo == 1) { + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + emitSKPNZ; + } else { + pic16_emitpcode(POC_MOVLW,pic16_popGetLit(lo)); + pic16_emitpcode(POC_ADDWF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + emitSKPNC; + } + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),1,FALSE,FALSE)); + emitSKPNZ; + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),2,FALSE,FALSE)); + emitSKPNZ; + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),3,FALSE,FALSE)); + + } + } + +*/ + } + } else { + int offset = 1; + DEBUGpic16_emitcode ("; left and result aren't same","%s %d",__FUNCTION__,__LINE__); + + if(size == 1) { + + if(AOP_TYPE(left) == AOP_ACC) { + /* left addend is already in accumulator */ + switch(lit & 0xff) { + case 0: + //pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + emitMOVWF(result,0); + break; + default: + pic16_emitpcode(POC_ADDLW, pic16_popGetLit(lit & 0xff)); + //pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + emitMOVWF(result,0); + } + } else { + /* left addend is in a register */ + switch(lit & 0xff) { + case 0: + pic16_mov2w(AOP(left),0); + emitMOVWF(result, 0); + break; + case 1: + pic16_emitpcode(POC_INCFW, pic16_popGet(AOP(left),0)); + //pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + emitMOVWF(result,0); + break; + case 0xff: + pic16_emitpcode(POC_DECFW, pic16_popGet(AOP(left),0)); + //pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + emitMOVWF(result,0); + break; + default: + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(lit & 0xff)); + pic16_emitpcode(POC_ADDFW, pic16_popGet(AOP(left),0)); + //pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + emitMOVWF(result,0); + } + } + + } else { + int clear_carry=0; + + /* left is not the accumulator */ + if(lit & 0xff) { + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(lit & 0xff)); + pic16_emitpcode(POC_ADDFW, pic16_popGet(AOP(left),0)); + } else { + pic16_mov2w(AOP(left),0); + /* We don't know the state of the carry bit at this point */ + clear_carry = 1; + } + //pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),0,FALSE,FALSE)); + emitMOVWF(result,0); + while(--size) { + + lit >>= 8; + if(lit & 0xff) { + if(clear_carry) { + /* The ls byte of the lit must've been zero - that + means we don't have to deal with carry */ + + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(lit & 0xff)); + pic16_emitpcode(POC_ADDFW, pic16_popGet(AOP(left),offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset)); + + clear_carry = 0; + + } else { + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(lit & 0xff)); + pic16_emitpcode(POC_ADDFWC, pic16_popGet(AOP(left),offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset)); + } + + } else { + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),offset)); + pic16_mov2w(AOP(left),offset); + pic16_emitpcode(POC_ADDWFC, pic16_popGet(AOP(result),offset)); + } + offset++; + } + } + } +#endif +} + +#endif + +/*-----------------------------------------------------------------*/ +/* pic16_genPlus - generates code for addition */ +/*-----------------------------------------------------------------*/ +void pic16_genPlus (iCode *ic) +{ + int i, size, offset = 0; + operand *result, *left, *right; + + FENTRY; + + /* special cases :- */ + result = IC_RESULT(ic); + left = IC_LEFT(ic); + right = IC_RIGHT(ic); + pic16_aopOp (left,ic,FALSE); + pic16_aopOp (right,ic,FALSE); + pic16_aopOp (result,ic,TRUE); + DEBUGpic16_pic16_AopType(__LINE__,left, right, result); + // pic16_DumpOp("(left)",left); + + /* if literal, literal on the right or + if left requires ACC or right is already + in ACC */ + + if ( (AOP_TYPE(left) == AOP_LIT) || (pic16_sameRegs(AOP(right), AOP(result))) ) { + operand *t = right; + right = IC_RIGHT(ic) = left; + left = IC_LEFT(ic) = t; + } + + /* if both left & right are in bit space */ + if (AOP_TYPE(left) == AOP_CRY && + AOP_TYPE(right) == AOP_CRY) { + pic16_genPlusBits (ic); + goto release ; + } + + /* if left in bit space & right literal */ + if (AOP_TYPE(left) == AOP_CRY && + AOP_TYPE(right) == AOP_LIT) { + /* if result in bit space */ + if(AOP_TYPE(result) == AOP_CRY){ + if(ulFromVal (AOP(right)->aopu.aop_lit) != 0L) { + pic16_emitpcode(POC_MOVLW, pic16_popGet(AOP(result),0)); + if (!pic16_sameRegs(AOP(left), AOP(result)) ) + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(left),0)); + pic16_emitpcode(POC_XORWF, pic16_popGet(AOP(result),0)); + } + } else { + unsigned long lit = ulFromVal (AOP(right)->aopu.aop_lit); + size = pic16_getDataSize(result); + while (size--) { + pic16_emitpcode (POC_CLRF, pic16_popGet (AOP(result), offset)); + pic16_emitpcode (POC_MOVLW, pic16_popGetLit ((lit >> (8*offset)) & 0xFF)); + pic16_emitpcode (POC_ADDWFC, pic16_popGet(AOP(result), offset++)); + //MOVA(pic16_aopGet(AOP(right),offset,FALSE,FALSE)); + //pic16_emitcode("addc","a,#00 ;%d",__LINE__); + //pic16_aopPut(AOP(result),"a",offset++); + } + } + goto release ; + } // left == CRY + + /* if I can do an increment instead + of add then GOOD for ME */ + if (pic16_genPlusIncr (ic) == TRUE) + goto release; + + size = pic16_getDataSize(result); + + if(AOP(right)->type == AOP_LIT) { + /* Add a literal to something else */ + //bool know_W=0; + unsigned lit = (unsigned) ulFromVal (AOP(right)->aopu.aop_lit); + //unsigned l1=0; + + //offset = 0; + DEBUGpic16_emitcode(";","adding lit to something. size %d",size); + + genAddLit (ic, lit); + goto release; + + } else if(AOP_TYPE(right) == AOP_CRY) { + + pic16_emitcode(";bitadd","right is bit: %s",pic16_aopGet(AOP(right),0,FALSE,FALSE)); + pic16_emitcode(";bitadd","left is bit: %s",pic16_aopGet(AOP(left),0,FALSE,FALSE)); + pic16_emitcode(";bitadd","result is bit: %s",pic16_aopGet(AOP(result),0,FALSE,FALSE)); + + /* here we are adding a bit to a char or int */ + if(size == 1) { + if (pic16_sameRegs(AOP(left), AOP(result)) ) { + + pic16_emitpcode(POC_BTFSC , pic16_popGet(AOP(right),0)); + pic16_emitpcode(POC_INCF , pic16_popGet(AOP(result),0)); + } else { // not same + + if(AOP_TYPE(left) == AOP_ACC) { + pic16_emitpcode(POC_BTFSC , pic16_popGet(AOP(right),0)); + pic16_emitpcode(POC_XORLW , pic16_popGetLit(1)); + } else { + pic16_mov2w(AOP(left),0); + pic16_emitpcode(POC_BTFSC , pic16_popGet(AOP(right),0)); + pic16_emitpcode(POC_INCFW , pic16_popGet(AOP(left),0)); + } + + if(AOP_TYPE(result) != AOP_ACC) { + + if(AOP_TYPE(result) == AOP_CRY) { + pic16_emitpcode(POC_ANDLW , pic16_popGetLit(1)); + pic16_emitpcode(POC_BCF , pic16_popGet(AOP(result),0)); + emitSKPZ; + pic16_emitpcode(POC_BSF , pic16_popGet(AOP(result),0)); + } else { + pic16_emitpcode(POC_MOVWF , pic16_popGet(AOP(result),0)); + } + } + } + + } else { + int offset = 1; + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if (pic16_sameRegs(AOP(left), AOP(result)) ) { + emitCLRZ; + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(right),0)); + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),0)); + } else { + emitCLRZ; // needed here as well: INCFW is not always executed, Z is undefined then + pic16_mov2w(AOP(left),0); + pic16_emitpcode(POC_BTFSC, pic16_popGet(AOP(right),0)); + pic16_emitpcode(POC_INCFW, pic16_popGet(AOP(left),0)); + emitMOVWF(right,0); + } + + while(--size){ + emitSKPZ; + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(result),offset++)); + } + + } + + } else { + // add bytes + + // Note: the following is an example of WISC code, eg. + // it's supposed to run on a Weird Instruction Set Computer :o) + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if ( AOP_TYPE(left) == AOP_ACC) { + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + pic16_emitpcode(POC_ADDFW, pic16_popGet(AOP(right),0)); + if ( AOP_TYPE(result) != AOP_ACC) + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(result),0)); + goto release; // we're done, since WREG is 1 byte + } + + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + size = min( AOP_SIZE(result), AOP_SIZE(right) ); + size = min( size, AOP_SIZE(left) ); + offset = 0; + + if(pic16_debug_verbose) { +// fprintf(stderr, "%s:%d result: %d\tleft: %d\tright: %d\n", __FILE__, __LINE__, +// AOP_SIZE(result), AOP_SIZE(left), AOP_SIZE(right)); +// fprintf(stderr, "%s:%d size of operands: %d\n", __FILE__, __LINE__, size); + } + + + + if ((AOP_TYPE(left) == AOP_PCODE) && ( + (AOP(left)->aopu.pcop->type == PO_LITERAL) || +// (AOP(left)->aopu.pcop->type == PO_DIR) || // patch 9 + (AOP(left)->aopu.pcop->type == PO_IMMEDIATE))) + { + // add to literal operand + + // add first bytes + for(i=0; iaopu.aop_lit)); + + /* if the literal value of the right hand side + is greater than 4 then it is not worth it */ + if ((icount = (unsigned int) ulFromVal (AOP(IC_RIGHT(ic))->aopu.aop_lit)) > 2) + return FALSE ; + + /* if decrement 16 bits in register */ + if (pic16_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic))) && + (size > 1) && + (icount == 1)) { + + if(size == 2) { + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(IC_RESULT(ic)),LSB)); + emitSKPC; + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(IC_RESULT(ic)),MSB16)); + + pic16_emitcode("decf","%s,f",pic16_aopGet(AOP(IC_RESULT(ic)),LSB,FALSE,FALSE)); + pic16_emitcode("incfsz","%s,w",pic16_aopGet(AOP(IC_RESULT(ic)),LSB,FALSE,FALSE)); + pic16_emitcode(" decf","%s,f",pic16_aopGet(AOP(IC_RESULT(ic)),MSB16,FALSE,FALSE)); + } else { + /* size is 3 or 4 */ + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(IC_RESULT(ic)),LSB)); + pic16_emitpcode(POC_CLRF, pic16_popCopyReg(&pic16_pc_wreg)); + pic16_emitpcode(POC_SUBWFB_D1, pic16_popGet(AOP(IC_RESULT(ic)),MSB16)); + pic16_emitpcode(POC_SUBWFB_D1, pic16_popGet(AOP(IC_RESULT(ic)),MSB24)); + + pic16_emitcode("movlw","0xff"); + pic16_emitcode("addwf","%s,f",pic16_aopGet(AOP(IC_RESULT(ic)),LSB,FALSE,FALSE)); + + //emitSKPNC; + pic16_emitcode("addwf","%s,f",pic16_aopGet(AOP(IC_RESULT(ic)),MSB16,FALSE,FALSE)); + //emitSKPNC; + pic16_emitcode("addwf","%s,f",pic16_aopGet(AOP(IC_RESULT(ic)),MSB24,FALSE,FALSE)); + + if(size > 3) { + pic16_emitpcode(POC_SUBWFB_D1, pic16_popGet(AOP(IC_RESULT(ic)),MSB32)); + + pic16_emitcode("skpnc",""); + //emitSKPNC; + pic16_emitcode("addwf","%s,f",pic16_aopGet(AOP(IC_RESULT(ic)),MSB32,FALSE,FALSE)); + } + + } + + return TRUE; + + } + + /* if the sizes are greater than 1 then we cannot */ + if (AOP_SIZE(IC_RESULT(ic)) > 1 || + AOP_SIZE(IC_LEFT(ic)) > 1 ) + return FALSE ; + + /* we can if the aops of the left & result match or + if they are in registers and the registers are the + same */ + if (pic16_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic)))) { + + while (icount--) + pic16_emitpcode(POC_DECF, pic16_popGet(AOP(IC_RESULT(ic)),0)); + + //pic16_emitcode ("decf","%s,f",pic16_aopGet(AOP(IC_RESULT(ic)),0,FALSE,FALSE)); + + return TRUE ; + } + + DEBUGpic16_emitcode ("; returning"," result=%s, left=%s", + pic16_aopGet(AOP(IC_RESULT(ic)),0,FALSE,FALSE), + pic16_aopGet(AOP(IC_LEFT(ic)),0,FALSE,FALSE)); + if(size==1) { + + pic16_emitcode("decf","%s,w",pic16_aopGet(AOP(IC_LEFT(ic)),0,FALSE,FALSE)); + pic16_emitcode("movwf","%s",pic16_aopGet(AOP(IC_RESULT(ic)),0,FALSE,FALSE)); + + pic16_emitpcode(POC_DECFW, pic16_popGet(AOP(IC_LEFT(ic)),0)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(IC_RESULT(ic)),0)); + + return TRUE; + } + + return FALSE ; +} + +/*-----------------------------------------------------------------*/ +/* pic16_addSign - propogate sign bit to higher bytes */ +/*-----------------------------------------------------------------*/ +void pic16_addSign(operand *result, int offset, int sign) +{ + int size = (pic16_getDataSize(result) - offset); + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + if(size > 0){ + if(sign && offset) { + + if(size == 1) { + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),offset)); + pic16_emitpcode(POC_BTFSC,pic16_newpCodeOpBit(pic16_aopGet(AOP(result),offset-1,FALSE,FALSE),7,0, PO_GPR_REGISTER)); + pic16_emitpcode(POC_SETF, pic16_popGet(AOP(result),offset)); + } else { + + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(0)); + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit(pic16_aopGet(AOP(result),offset-1,FALSE,FALSE),7,0, PO_GPR_REGISTER)); + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(0xff)); + while(size--) + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset+size)); + + } + } else + while(size--) + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),offset++)); + } +} + +/*-----------------------------------------------------------------*/ +/* pic16_genMinus - generates code for subtraction */ +/*-----------------------------------------------------------------*/ +void pic16_genMinus (iCode *ic) +{ + int size, offset = 0, same=0; + unsigned long lit = 0L; + + FENTRY; + pic16_aopOp (IC_LEFT(ic),ic,FALSE); + pic16_aopOp (IC_RIGHT(ic),ic,FALSE); + pic16_aopOp (IC_RESULT(ic),ic,TRUE); + + if (AOP_TYPE(IC_RESULT(ic)) == AOP_CRY && + AOP_TYPE(IC_RIGHT(ic)) == AOP_LIT) { + operand *t = IC_RIGHT(ic); + IC_RIGHT(ic) = IC_LEFT(ic); + IC_LEFT(ic) = t; + } + + DEBUGpic16_emitcode ("; ","result %s, left %s, right %s", + pic16_AopType(AOP_TYPE(IC_RESULT(ic))), + pic16_AopType(AOP_TYPE(IC_LEFT(ic))), + pic16_AopType(AOP_TYPE(IC_RIGHT(ic)))); + + /* special cases :- */ + /* if both left & right are in bit space */ + if (AOP_TYPE(IC_LEFT(ic)) == AOP_CRY && + AOP_TYPE(IC_RIGHT(ic)) == AOP_CRY) { + pic16_genPlusBits (ic); + goto release ; + } + + /* if I can do an decrement instead + of subtract then GOOD for ME */ +// if (pic16_genMinusDec (ic) == TRUE) +// goto release; + + size = pic16_getDataSize(IC_RESULT(ic)); + same = pic16_sameRegs(AOP(IC_RIGHT(ic)), AOP(IC_RESULT(ic))); + + if(AOP(IC_RIGHT(ic))->type == AOP_LIT) { + /* Add a literal to something else */ + + lit = ulFromVal (AOP(IC_RIGHT(ic))->aopu.aop_lit); + lit = - (long)lit; + + genAddLit ( ic, lit); + } else if(AOP_TYPE(IC_RIGHT(ic)) == AOP_CRY) { + // bit subtraction + + pic16_emitcode(";bitsub","right is bit: %s",pic16_aopGet(AOP(IC_RIGHT(ic)),0,FALSE,FALSE)); + pic16_emitcode(";bitsub","left is bit: %s",pic16_aopGet(AOP(IC_LEFT(ic)),0,FALSE,FALSE)); + pic16_emitcode(";bitsub","result is bit: %s",pic16_aopGet(AOP(IC_RESULT(ic)),0,FALSE,FALSE)); + + /* here we are subtracting a bit from a char or int */ + if(size == 1) { + if (pic16_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic))) ) { + + pic16_emitpcode(POC_BTFSC , pic16_popGet(AOP(IC_RIGHT(ic)),0)); + pic16_emitpcode(POC_DECF , pic16_popGet(AOP(IC_RESULT(ic)),0)); + } else { + + if(AOP_TYPE(IC_LEFT(ic)) == AOP_ACC) { + pic16_emitpcode(POC_BTFSC , pic16_popGet(AOP(IC_RIGHT(ic)),0)); + pic16_emitpcode(POC_XORLW , pic16_popGetLit(1)); + }else if( (AOP_TYPE(IC_LEFT(ic)) == AOP_LIT) ) { + + lit = ulFromVal (AOP(IC_LEFT(ic))->aopu.aop_lit); + + if(AOP_TYPE(IC_RESULT(ic)) == AOP_CRY) { + if (pic16_sameRegs(AOP(IC_RIGHT(ic)), AOP(IC_RESULT(ic))) ) { + if(lit & 1) { + pic16_emitpcode(POC_MOVLW , pic16_popGetLit(1)); + pic16_emitpcode(POC_XORWF , pic16_popGet(AOP(IC_RIGHT(ic)),0)); + } + }else{ + pic16_emitpcode(POC_BCF , pic16_popGet(AOP(IC_RESULT(ic)),0)); + if(lit & 1) + pic16_emitpcode(POC_BTFSS , pic16_popGet(AOP(IC_RIGHT(ic)),0)); + else + pic16_emitpcode(POC_BTFSC , pic16_popGet(AOP(IC_RIGHT(ic)),0)); + pic16_emitpcode(POC_BSF , pic16_popGet(AOP(IC_RESULT(ic)),0)); + } + goto release; + } else { + pic16_emitpcode(POC_MOVLW , pic16_popGetLit(lit & 0xff)); + pic16_emitpcode(POC_BTFSC , pic16_popGet(AOP(IC_RIGHT(ic)),0)); + pic16_emitpcode(POC_MOVLW , pic16_popGetLit((lit-1) & 0xff)); + //pic16_emitpcode(POC_MOVWF , pic16_popGet(AOP(IC_RESULT(ic)),0)); + + } + + } else { + pic16_mov2w(AOP(IC_LEFT(ic)),0); + pic16_emitpcode(POC_BTFSC , pic16_popGet(AOP(IC_RIGHT(ic)),0)); + pic16_emitpcode(POC_DECFW , pic16_popGet(AOP(IC_LEFT(ic)),0)); + } + + if(AOP_TYPE(IC_RESULT(ic)) != AOP_ACC) { + + pic16_emitpcode(POC_MOVWF , pic16_popGet(AOP(IC_RESULT(ic)),0)); + + } else { + pic16_emitpcode(POC_ANDLW , pic16_popGetLit(1)); +/* + pic16_emitpcode(POC_BCF , pic16_popGet(AOP(IC_RESULT(ic)),0,FALSE,FALSE)); + emitSKPZ; + pic16_emitpcode(POC_BSF , pic16_popGet(AOP(IC_RESULT(ic)),0,FALSE,FALSE)); +*/ + } + + } + + } + } else if((AOP(IC_LEFT(ic))->type == AOP_LIT) && + (AOP_TYPE(IC_RIGHT(ic)) != AOP_ACC)) { + + lit = ulFromVal (AOP(IC_LEFT(ic))->aopu.aop_lit); + DEBUGpic16_emitcode ("; left is lit","line %d result %s, left %s, right %s",__LINE__, + pic16_AopType(AOP_TYPE(IC_RESULT(ic))), + pic16_AopType(AOP_TYPE(IC_LEFT(ic))), + pic16_AopType(AOP_TYPE(IC_RIGHT(ic)))); + + + if( (size == 1) && ((lit & 0xff) == 0) ) { + /* res = 0 - right */ + if (pic16_sameRegs(AOP(IC_RIGHT(ic)), AOP(IC_RESULT(ic))) ) { + pic16_emitpcode(POC_NEGF, pic16_popGet(AOP(IC_RIGHT(ic)),0)); + } else { + pic16_emitpcode(POC_COMFW, pic16_popGet(AOP(IC_RIGHT(ic)),0)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(IC_RESULT(ic)),0)); + pic16_emitpcode(POC_INCF, pic16_popGet(AOP(IC_RESULT(ic)),0)); + } + goto release; + } + + pic16_mov2w(AOP(IC_RIGHT(ic)),0); + pic16_emitpcode(POC_SUBLW, pic16_popGetLit(lit & 0xff)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(IC_RESULT(ic)),0)); + + + offset = 0; + while(--size) { + lit >>= 8; + offset++; + if(same) { + // here we have x = lit - x for sizeof(x)>1 + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(lit & 0xff)); + pic16_emitpcode(POC_SUBFWB_D1, pic16_popGet(AOP(IC_RESULT(ic)),offset)); + } else { + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(lit & 0xff)); + pic16_emitpcode(POC_SUBFWB_D0, pic16_popGet(AOP(IC_RIGHT(ic)),offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(IC_RESULT(ic)),offset)); + } + } + + + } else { + + DEBUGpic16_emitcode ("; ","line %d result %s, left %s, right %s",__LINE__, + pic16_AopType(AOP_TYPE(IC_RESULT(ic))), + pic16_AopType(AOP_TYPE(IC_LEFT(ic))), + pic16_AopType(AOP_TYPE(IC_RIGHT(ic)))); + + if ((AOP_SIZE(IC_LEFT(ic)) < AOP_SIZE(IC_RESULT(ic))) + && pic16_sameRegs (AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic)))) { + // extend left in result + pic16_addSign (IC_RESULT(ic), AOP_SIZE(IC_LEFT(ic)), !SPEC_USIGN(getSpec(operandType(IC_LEFT(ic))))); + } + + if ((AOP_SIZE(IC_RIGHT(ic)) < AOP_SIZE(IC_RESULT(ic))) + && pic16_sameRegs (AOP(IC_RIGHT(ic)), AOP(IC_RESULT(ic)))) { + // extend right in result---fails if left resides in result as well... + assert ((IC_LEFT(ic) == IC_RIGHT(ic)) || !pic16_sameRegs (AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic)))); + pic16_addSign (IC_RESULT(ic), AOP_SIZE(IC_RIGHT(ic)), !SPEC_USIGN(getSpec(operandType(IC_RIGHT(ic))))); + } + + if(AOP_TYPE(IC_LEFT(ic)) == AOP_ACC) { + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + pic16_emitpcode(POC_SUBFW, pic16_popGet(AOP(IC_RIGHT(ic)),0)); + pic16_emitpcode(POC_SUBLW, pic16_popGetLit(0)); + if ( AOP_TYPE(IC_RESULT(ic)) != AOP_ACC) + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(IC_RESULT(ic)),0)); + } else { + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + if(AOP_TYPE(IC_RIGHT(ic)) != AOP_ACC) + pic16_mov2w(AOP(IC_RIGHT(ic)),0); + + if (pic16_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic))) ) + pic16_emitpcode(POC_SUBWF, pic16_popGet(AOP(IC_LEFT(ic)),0)); + else { + if( (AOP_TYPE(IC_LEFT(ic)) == AOP_LIT) ) { + pic16_emitpcode(POC_SUBLW, pic16_popGet(AOP(IC_LEFT(ic)),0)); + } else { + pic16_emitpcode(POC_SUBFW, pic16_popGet(AOP(IC_LEFT(ic)),0)); + } + if ( AOP_TYPE(IC_RESULT(ic)) != AOP_ACC) { + if ( AOP_TYPE(IC_RESULT(ic)) == AOP_CRY) { + pic16_emitpcode(POC_BCF , pic16_popGet(AOP(IC_RESULT(ic)),0)); + emitSKPZ; + pic16_emitpcode(POC_BSF , pic16_popGet(AOP(IC_RESULT(ic)),0)); + }else + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(IC_RESULT(ic)),0)); + } + } + } + + /* + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(IC_RIGHT(ic)),0,FALSE,FALSE)); + + if (pic16_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic))) ) { + pic16_emitpcode(POC_SUBFW, pic16_popGet(AOP(IC_RESULT(ic)),0,FALSE,FALSE)); + } else { + pic16_emitpcode(POC_SUBFW, pic16_popGet(AOP(IC_LEFT(ic)),0,FALSE,FALSE)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(IC_RESULT(ic)),0,FALSE,FALSE)); + } + */ + offset = 1; + size--; + + while (size--) { + if (pic16_sameRegs (AOP(IC_RIGHT(ic)), AOP(IC_RESULT(ic)))) { + pic16_mov2w (AOP(IC_RESULT(ic)), offset); + } else if (offset < AOP_SIZE(IC_RIGHT(ic))) + pic16_mov2w(AOP(IC_RIGHT(ic)),offset); + else { + // right operand is too short, not overwritten with result + pic16_emitpcode (POC_CLRF, pic16_popCopyReg (&pic16_pc_wreg)); + if (!SPEC_USIGN(operandType(IC_RIGHT(ic)))) { + // signed -- sign extend the right operand + pic16_emitpcode (POC_BTFSC, pic16_newpCodeOpBit(pic16_aopGet(AOP(IC_RIGHT(ic)),AOP_SIZE(IC_RIGHT(ic))-1,FALSE,FALSE),7,0, PO_GPR_REGISTER)); + pic16_emitpcode (POC_SETF, pic16_popCopyReg (&pic16_pc_wreg)); + } + } + if (pic16_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic)))) { + pic16_emitpcode(POC_SUBWFB_D1, pic16_popGet(AOP(IC_RESULT(ic)),offset)); + } else if (offset < AOP_SIZE(IC_LEFT(ic))) { + pic16_emitpcode(POC_SUBWFB_D0, pic16_popGet(AOP(IC_LEFT(ic)),offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(IC_RESULT(ic)),offset)); + } else { + // left operand is too short, not overwritten with result + pic16_emitpcode (POC_CLRF, pic16_popGet(AOP(IC_RESULT(ic)), offset)); + if (!SPEC_USIGN(operandType(IC_LEFT(ic)))) { + // signed -- sign extend the left operand + pic16_emitpcode (POC_BTFSC, pic16_newpCodeOpBit(pic16_aopGet(AOP(IC_LEFT(ic)),AOP_SIZE(IC_LEFT(ic))-1,FALSE,FALSE),7,0, PO_GPR_REGISTER)); + pic16_emitpcode (POC_SETF, pic16_popGet(AOP(IC_RESULT(ic)), offset)); // keep CARRY/#BORROW bit intact! + } + pic16_emitpcode(POC_SUBWFB_D1, pic16_popGet(AOP(IC_RESULT(ic)),offset)); + } + offset++; + } + } + + // adjustArithmeticResult(ic); + + release: + pic16_freeAsmop(IC_LEFT(ic),NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(IC_RIGHT(ic),NULL,ic,(RESULTONSTACK(ic) ? FALSE : TRUE)); + pic16_freeAsmop(IC_RESULT(ic),NULL,ic,TRUE); +} + + +/*-----------------------------------------------------------------* + * pic_genMult8XLit_n - multiplication of two 8-bit numbers. + * + * + *-----------------------------------------------------------------*/ +void pic16_genMult8XLit_n (operand *left, + operand *right, + operand *result) +{ + int lit; + int same; + int size = AOP_SIZE(result); + int i; + + FENTRY; + DEBUGpic16_pic16_AopType(__LINE__,left,right,result); + + if (AOP_TYPE(right) != AOP_LIT){ + fprintf(stderr,"%s %d - right operand is not a literal\n",__FILE__,__LINE__); + exit(1); + } + + lit = (int) ulFromVal (AOP(right)->aopu.aop_lit); + assert( (lit >= -128) && (lit < 256) ); + pic16_emitpcomment("Unrolled 8 X 8 multiplication"); + pic16_emitpcomment("FIXME: the function does not support result==WREG"); + + same = pic16_sameRegs(AOP(left), AOP(result)); + if(same) { + switch(lit & 0x00ff) { + case 0: + while (size--) { + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),size)); + } // while + return; + + case 2: + /* sign extend left in result */ + pic16_addSign(result, 1, !IS_UNSIGNED(operandType(left))); + // its faster to left shift + emitCLRC; + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(left),0)); + if (size > 1) + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),1)); + return; + + default: + if(AOP_TYPE(left) != AOP_ACC) + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(left), 0)); + pic16_emitpcode(POC_MULLW, pic16_popGetLit(lit & 0x00ff)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popCopyReg( + &pic16_pc_prodl), pic16_popGet(AOP(result), 0))); + /* Adjust result's high bytes below! */ + } + } else { + // operands different + switch(lit & 0x00ff) { + case 0: + while (size--) { + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),size)); + } // while + return; + + case 2: + if (IS_UNSIGNED(operandType(result))) { + for (i=1; i < size; i++) { + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),i)); + } // for + } else { + /* sign extend left to result */ + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(0)); + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit_simple(AOP(left), 0, 7)); + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(0xff)); + for (i=1; i < size; i++) { + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),i)); + } // for + } + emitCLRC; + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(left), 0)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 0)); + if (size > 1) + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(result),1)); + return; + + default: + if(AOP_TYPE(left) != AOP_ACC) + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(left), 0)); + pic16_emitpcode(POC_MULLW, pic16_popGetLit(lit)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popCopyReg( + &pic16_pc_prodl), pic16_popGet(AOP(result), 0))); + /* Adjust result's high bytes below! */ + } + } + + if (size > 1) { + /* We need to fix PRODH for + * (a) literals < 0 and + * (b) signed register operands < 0. + */ + //printf( "%s: lit %d, left unsigned: %d\n", __FUNCTION__, lit, SPEC_USIGN(getSpec(operandType(left)))); + if (lit < 0) { + /* literal negative (i.e. in [-128..-1]), high byte == -1 */ + pic16_mov2w(AOP(left), 0); + pic16_emitpcode(POC_SUBWF, pic16_popCopyReg(&pic16_pc_prodh)); + } + + if (!SPEC_USIGN(getSpec(operandType(left)))) { + /* register operand signed, determine signedness of high byte */ + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(lit & 0x00ff)); + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit_simple(AOP(left), 0, 7)); + pic16_emitpcode(POC_SUBWF, pic16_popCopyReg(&pic16_pc_prodh)); + } + + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popCopyReg( + &pic16_pc_prodh), pic16_popGet(AOP(result), 1))); + + /* Need to sign-extend here. */ + pic16_addSign(result, 2, !IS_UNSIGNED(operandType(result))); + } // if +} + +#if 0 +/*-----------------------------------------------------------------------* + * pic_genUMult16XLit_16 - unsigned multiplication of two 16-bit numbers * + *-----------------------------------------------------------------------*/ +void pic16_genUMult16XLit_16 (operand *left, + operand *right, + operand *result) +{ + pCodeOp *pct1, *pct2, *pct3, *pct4; + unsigned int lit; + int same; + + + FENTRY; + + if (AOP_TYPE(right) != AOP_LIT){ + fprintf(stderr,"%s %d - right operand is not a literal\n",__FILE__,__LINE__); + exit(1); + } + + lit = (unsigned int) ulFromVal (AOP(right)->aopu.aop_lit); + lit &= 0xffff; + + same = pic16_sameRegs(AOP(left), AOP(result)); + if(same) { + switch(lit) { + case 0: + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),1)); + return; + case 2: + // its faster to left shift + emitCLRC; + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(left),0)); + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(left),1)); + return; + + default: { + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + pct1 = pic16_popGetTempReg(1); + pct2 = pic16_popGetTempReg(1); + pct3 = pic16_popGetTempReg(1); + pct4 = pic16_popGetTempReg(1); + + pic16_emitpcode(POC_MOVLW, pic16_popGetLit( lit & 0xff)); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(left), 0)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodl), pic16_pCodeOpCopy(pct1))); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodh), pic16_pCodeOpCopy(pct2))); + + /* WREG still holds the low literal */ + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(left), 1)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodl), pic16_pCodeOpCopy(pct3))); + + pic16_emitpcode(POC_MOVLW, pic16_popGetLit( lit>>8 )); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(left), 0)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodl), pic16_pCodeOpCopy(pct4))); + + /* load result */ + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pct1, pic16_popGet(AOP(result), 0))); + pic16_emitpcode(POC_MOVFW, pic16_pCodeOpCopy(pct2)); + pic16_emitpcode(POC_ADDFW, pic16_pCodeOpCopy(pct3)); + pic16_emitpcode(POC_ADDFWC, pic16_pCodeOpCopy(pct4)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 1)); + + pic16_popReleaseTempReg(pct4,1); + pic16_popReleaseTempReg(pct3,1); + pic16_popReleaseTempReg(pct2,1); + pic16_popReleaseTempReg(pct1,1); + }; return; + } + } else { + // operands different + switch(lit) { + case 0: + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result), 0)); + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result), 1)); + return; + case 2: + emitCLRC; + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(left), 0)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 0)); + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(left), 1)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 1)); + return; + default: { + + pic16_emitpcode(POC_MOVLW, pic16_popGetLit( lit & 0xff)); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(left), 0)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodl), pic16_popGet(AOP(result), 0))); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodh), pic16_popGet(AOP(result), 1))); + + /* WREG still holds the low literal */ + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(left), 1)); + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(&pic16_pc_prodl)); + pic16_emitpcode(POC_ADDWF, pic16_popGet(AOP(result), 1)); + + pic16_emitpcode(POC_MOVLW, pic16_popGetLit( lit>>8 )); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(left), 0)); + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(&pic16_pc_prodl)); + pic16_emitpcode(POC_ADDWFC, pic16_popGet(AOP(result), 1)); + + }; return; + } + } +} +#endif + + +/*-----------------------------------------------------------------* + * genMult8X8_n - multiplication of two 8-bit numbers. + * + * + *-----------------------------------------------------------------*/ +void pic16_genMult8X8_n (operand *left, operand *right, operand *result) + +{ + FENTRY; + + + if (AOP_TYPE(right) == AOP_LIT) { + pic16_genMult8XLit_n(left,right,result); + return; + } + + /* cases: + A = A x B B = A x B + A = B x C + W = A x B + W = W x B W = B x W + */ + /* if result == right then exchange left and right */ + if(pic16_sameRegs(AOP(result), AOP(right))) { + operand *tmp; + tmp = left; + left = right; + right = tmp; + } + + if(AOP_TYPE(left) != AOP_ACC) { + // left is not WREG + if(AOP_TYPE(right) != AOP_ACC) { + pic16_mov2w(AOP(left), 0); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(right), 0)); + } else { + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(left), 0)); + } + } else { + // left is WREG, right cannot be WREG (or can?!) + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(right), 0)); + } + + /* result is in PRODL:PRODH */ + if(AOP_TYPE(result) != AOP_ACC) { + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popCopyReg( + &pic16_pc_prodl), pic16_popGet(AOP(result), 0))); + + + if(AOP_SIZE(result)>1) { + + /* If s8 x s8 --> s16 multiplication was called for, fixup high byte. + * (left=a1a0, right=b1b0, X1: high byte, X0: low byte) + * + * a1a0 * b1b0 + * -------------- + * a1b0 a0b0 + * a1b1 a0b1 + * --------------- + * a0b0 a1= 0, b1= 0 (both unsigned) + * -b0 a0b0 a1=-1, b1= 0 (a signed and < 0, b unsigned or >= 0) + * -a0 a0b0 a1= 0, b1=-1 (b signed and < 0, a unsigned or >= 0) + * -(a0+b0) a0b0 a1=-1, b1=-1 (a and b signed and < 0) + * + * Currently, PRODH:PRODL holds a0b0 as 16 bit value; we need to + * subtract a0 and/or b0 from PRODH. */ + if (!IS_UNSIGNED(operandType(right))) { + /* right operand (b1) signed and < 0, then subtract left op (a0) */ + pic16_mov2w( AOP(left), 0 ); + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit_simple(AOP(right), 0, 7)); + pic16_emitpcode(POC_SUBWF, pic16_popCopyReg(&pic16_pc_prodh)); + } + + if (!IS_UNSIGNED(getSpec(operandType(left)))) { + /* left operand (a1) signed and < 0, then subtract right op (b0) */ + pic16_mov2w( AOP(right), 0 ); + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit_simple(AOP(left), 0, 7)); + pic16_emitpcode(POC_SUBWF, pic16_popCopyReg(&pic16_pc_prodh)); + } + + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popCopyReg( + &pic16_pc_prodh), pic16_popGet(AOP(result), 1))); + + /* Must sign-extend here. */ + pic16_addSign(result, 2, !IS_UNSIGNED(operandType(left))); + } + } else { + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(&pic16_pc_prodl)); + } +} + +#if 0 +/*------------------------------------------------------------------* + * genUMult16X16_16 - unsigned multiplication of two 16-bit numbers * + *------------------------------------------------------------------*/ +void pic16_genUMult16X16_16 (operand *left, + operand *right, + operand *result) + +{ + pCodeOp *pct1, *pct2, *pct3, *pct4; + + FENTRY; + + + if (AOP_TYPE(right) == AOP_LIT) { + pic16_genMult8XLit_n(left,right,result); + return; + } + + /* cases: + A = A x B B = A x B + A = B x C + */ + /* if result == right then exchange left and right */ + if(pic16_sameRegs(AOP(result), AOP(right))) { + operand *tmp; + tmp = left; + left = right; + right = tmp; + } + + + if(pic16_sameRegs(AOP(result), AOP(left))) { + + pct1 = pic16_popGetTempReg(1); + pct2 = pic16_popGetTempReg(1); + pct3 = pic16_popGetTempReg(1); + pct4 = pic16_popGetTempReg(1); + + pic16_mov2w(AOP(left), 0); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(right), 0)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodl), pic16_pCodeOpCopy(pct1))); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodh), pic16_pCodeOpCopy(pct2))); + + /* WREG still holds the lower left */ + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(right), 1)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodl), pic16_pCodeOpCopy(pct3))); + + pic16_mov2w(AOP(left), 1); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(right), 0)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodl), pic16_pCodeOpCopy(pct4))); + + /* load result */ + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_pCodeOpCopy( pct1 ), pic16_popGet(AOP(result), 0))); + pic16_emitpcode(POC_MOVFW, pic16_pCodeOpCopy( pct2 )); + pic16_emitpcode(POC_ADDFW, pic16_pCodeOpCopy(pct3)); + pic16_emitpcode(POC_ADDFWC, pic16_pCodeOpCopy(pct4)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 1)); + + pic16_popReleaseTempReg( pct4, 1 ); + pic16_popReleaseTempReg( pct3, 1 ); + pic16_popReleaseTempReg( pct2, 1 ); + pic16_popReleaseTempReg( pct1, 1 ); + + } else { + + pic16_mov2w(AOP(left), 0); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(right), 0)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodl), pic16_popGet(AOP(result), 0))); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodh), pic16_popGet(AOP(result), 1))); + + /* WREG still holds the lower left */ + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(right), 1)); + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(&pic16_pc_prodl)); + pic16_emitpcode(POC_ADDWF, pic16_popGet(AOP(result), 1)); + + pic16_mov2w(AOP(left), 1); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(right), 0)); + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(&pic16_pc_prodl)); + pic16_emitpcode(POC_ADDWFC, pic16_popGet(AOP(result), 1)); + } +} +#endif + +#if 0 +void pic16_genSMult16X16_16(operand *left, + operand *right, + operand *result) +{ + +} +#endif + +#if 0 +/*-----------------------------------------------------------------* + * pic16_genSMult8X8_16 - signed multiplication of two 8-bit numbers + * + * this routine will call the unsigned multiply routine and then + * post-fix the sign bit. + *-----------------------------------------------------------------*/ +void pic16_genSMult8X8_8 (operand *left, + operand *right, + operand *result, + pCodeOpReg *result_hi) +{ + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + + if(!result_hi) { + result_hi = PCOR(pic16_popGet(AOP(result),1)); + } + + + pic16_genUMult8X8_8(left,right,result); + + +#if 0 + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit(pic16_aopGet(AOP(left),0,FALSE,FALSE),7,0, PO_GPR_REGISTER)); + pic16_emitpcode(POC_SUBWF, pic16_popCopyReg(result_hi)); + pic16_mov2w(AOP(left),0); + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit(pic16_aopGet(AOP(right),0,FALSE,FALSE),7,0, PO_GPR_REGISTER)); + pic16_emitpcode(POC_SUBWF, pic16_popGet(AOP(result),1)); +#endif +} +#endif + +/*-----------------------------------------------------------------* + * pic16_genMult8X8_8 - multiplication of two 8-bit numbers * + *-----------------------------------------------------------------*/ +void pic16_genMult8X8_8 (operand *left, + operand *right, + operand *result) +{ + FENTRY; + + if(AOP_TYPE(right) == AOP_LIT) + pic16_genMult8XLit_n(left,right,result); + else + pic16_genMult8X8_n(left,right,result); +} + + +#if 0 +/*-----------------------------------------------------------------* + * pic16_genMult16X16_16 - multiplication of two 16-bit numbers * + *-----------------------------------------------------------------*/ +void pic16_genMult16X16_16 (operand *left, + operand *right, + operand *result) +{ + FENTRY; + + if (AOP_TYPE(right) == AOP_LIT) + pic16_genUMult16XLit_16(left,right,result); + else + pic16_genUMult16X16_16(left,right,result); +} +#endif + + +#if 0 +/*-----------------------------------------------------------------------* + * pic_genUMult32XLit_32 - unsigned multiplication of two 32-bit numbers * + *-----------------------------------------------------------------------*/ +void pic16_genUMult32XLit_32 (operand *left, + operand *right, + operand *result) +{ + pCodeOp *pct1, *pct2, *pct3, *pct4; + unsigned int lit; + int same; + + + FENTRY; + + if (AOP_TYPE(right) != AOP_LIT){ + fprintf(stderr,"%s %d - right operand is not a literal\n",__FILE__,__LINE__); + exit(1); + } + + lit = (unsigned int) ulFromVal (AOP(right)->aopu.aop_lit); + lit &= 0xffff; + + same = pic16_sameRegs(AOP(left), AOP(result)); + if(same) { + switch(lit) { + case 0: + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),0)); + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result),1)); + return; + case 2: + // its faster to left shift + emitCLRC; + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(left),0)); + pic16_emitpcode(POC_RLCF, pic16_popGet(AOP(left),1)); + return; + + default: { + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + + pct1 = pic16_popGetTempReg(1); + pct2 = pic16_popGetTempReg(1); + pct3 = pic16_popGetTempReg(1); + pct4 = pic16_popGetTempReg(1); + + pic16_emitpcode(POC_MOVLW, pic16_popGetLit( lit & 0xff)); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(left), 0)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodl), pic16_pCodeOpCopy(pct1))); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodh), pic16_pCodeOpCopy(pct2))); + + /* WREG still holds the low literal */ + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(left), 1)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodl), pic16_pCodeOpCopy(pct3))); + + pic16_emitpcode(POC_MOVLW, pic16_popGetLit( lit>>8 )); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(left), 0)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodl), pic16_pCodeOpCopy(pct4))); + + /* load result */ + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pct1, pic16_popGet(AOP(result), 0))); + pic16_emitpcode(POC_MOVFW, pic16_pCodeOpCopy(pct2)); + pic16_emitpcode(POC_ADDFW, pic16_pCodeOpCopy(pct3)); + pic16_emitpcode(POC_ADDFWC, pic16_pCodeOpCopy(pct4)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 1)); + + pic16_popReleaseTempReg( pct4, 1 ); + pic16_popReleaseTempReg( pct3, 1 ); + pic16_popReleaseTempReg( pct2, 1 ); + pic16_popReleaseTempReg( pct1, 1 ); + }; return; + } + } else { + // operands different + switch(lit) { + case 0: + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result), 0)); + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(result), 1)); + return; + case 2: + emitCLRC; + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(left), 0)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 0)); + pic16_emitpcode(POC_RLCFW, pic16_popGet(AOP(left), 1)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 1)); + return; + default: { + + pic16_emitpcode(POC_MOVLW, pic16_popGetLit( lit & 0xff)); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(left), 0)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodl), pic16_popGet(AOP(result), 0))); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodh), pic16_popGet(AOP(result), 1))); + + /* WREG still holds the low literal */ + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(left), 1)); + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(&pic16_pc_prodl)); + pic16_emitpcode(POC_ADDWF, pic16_popGet(AOP(result), 1)); + + pic16_emitpcode(POC_MOVLW, pic16_popGetLit( lit>>8 )); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(left), 0)); + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(&pic16_pc_prodl)); + pic16_emitpcode(POC_ADDWFC, pic16_popGet(AOP(result), 1)); + + }; return; + } + } +} +#endif + +#if 0 +/*------------------------------------------------------------------* + * genUMult32X32_32 - unsigned multiplication of two 32-bit numbers * + *------------------------------------------------------------------*/ +void pic16_genUMult32X32_32 (operand *left, + operand *right, + operand *result) + +{ + pCodeOp *pct1, *pct2, *pct3, *pct4; + + FENTRY; + + if (AOP_TYPE(right) == AOP_LIT) { + pic16_genMult8XLit_n(left,right,result); + return; + } + + /* cases: + A = A x B B = A x B + A = B x C + */ + /* if result == right then exchange left and right */ + if(pic16_sameRegs(AOP(result), AOP(right))) { + operand *tmp; + tmp = left; + left = right; + right = tmp; + } + + + if(pic16_sameRegs(AOP(result), AOP(left))) { + + pct1 = pic16_popGetTempReg(1); + pct2 = pic16_popGetTempReg(1); + pct3 = pic16_popGetTempReg(1); + pct4 = pic16_popGetTempReg(1); + + pic16_mov2w(AOP(left), 0); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(right), 0)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodl), pic16_pCodeOpCopy(pct1))); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodh), pic16_pCodeOpCopy(pct2))); + + /* WREG still holds the lower left */ + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(right), 1)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodl), pic16_pCodeOpCopy(pct3))); + + pic16_mov2w(AOP(left), 1); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(right), 0)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodl), pic16_pCodeOpCopy(pct4))); + + /* load result */ + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_pCodeOpCopy( pct1 ), pic16_popGet(AOP(result), 0))); + pic16_emitpcode(POC_MOVFW, pic16_pCodeOpCopy( pct2 )); + pic16_emitpcode(POC_ADDFW, pic16_pCodeOpCopy(pct3)); + pic16_emitpcode(POC_ADDFWC, pic16_pCodeOpCopy(pct4)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result), 1)); + + pic16_popReleaseTempReg( pct4, 1 ); + pic16_popReleaseTempReg( pct3, 1 ); + pic16_popReleaseTempReg( pct2, 1 ); + pic16_popReleaseTempReg( pct1, 1 ); + + } else { + + pic16_mov2w(AOP(left), 0); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(right), 0)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodl), pic16_popGet(AOP(result), 0))); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p( + pic16_popCopyReg(&pic16_pc_prodh), pic16_popGet(AOP(result), 1))); + + /* WREG still holds the lower left */ + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(right), 1)); + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(&pic16_pc_prodl)); + pic16_emitpcode(POC_ADDWF, pic16_popGet(AOP(result), 1)); + + pic16_mov2w(AOP(left), 1); + pic16_emitpcode(POC_MULWF, pic16_popGet(AOP(right), 0)); + pic16_emitpcode(POC_MOVFW, pic16_popCopyReg(&pic16_pc_prodl)); + pic16_emitpcode(POC_ADDWFC, pic16_popGet(AOP(result), 1)); + } +} +#endif + + +#if 0 +/*-----------------------------------------------------------------* + * pic16_genMult32X32_32 - multiplication of two 32-bit numbers * + *-----------------------------------------------------------------*/ +void pic16_genMult32X32_32 (operand *left, + operand *right, + operand *result) +{ + FENTRY; + + if (AOP_TYPE(right) == AOP_LIT) + pic16_genUMult32XLit_32(left,right,result); + else + pic16_genUMult32X32_32(left,right,result); +} +#endif + + + + + + + +#if 0 +/*-----------------------------------------------------------------*/ +/* constMult - generates code for multiplication by a constant */ +/*-----------------------------------------------------------------*/ +void genMultConst(unsigned C) +{ + + unsigned lit; + unsigned sr3; // Shift right 3 + unsigned mask; + + int size = 1; + + /* + Convert a string of 3 binary 1's in the lit into + 0111 = 1000 - 1; + */ + + mask = 7 << ( (size*8) - 3); + lit = C; + sr3 = 0; + + while(mask < (1<>= 1; + + } + +} + +#endif diff --git a/src/pic16/genutils.c b/src/pic16/genutils.c new file mode 100644 index 0000000..c4743a5 --- /dev/null +++ b/src/pic16/genutils.c @@ -0,0 +1,627 @@ +/*------------------------------------------------------------------------- + genutils.c - source file for code generation for pic16 + code generation utility functions + + Created by Vangelis Rokas (vrokas@otenet.gr) [Nov-2003] + + Based on : + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + and - Jean-Louis VERN.jlvern@writeme.com (1999) + Bug Fixes - Wojciech Stryjewski wstryj1@tiger.lsu.edu (1999 v2.1.9a) + PIC port - Scott Dattalo scott@dattalo.com (2000) + PIC16 port - Martin Dubuc m.dubuc@rogers.com (2002) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + + Notes: + 000123 mlh Moved aopLiteral to SDCCglue.c to help the split + Made everything static +-------------------------------------------------------------------------*/ + +/********************************************************** + * Here is a list with completed genXXXXX functions + * + * genNot + * + */ + + +#include +#include +#include +#include +#include "SDCCglobl.h" +#include "newalloc.h" + +#include "common.h" +#include "SDCCpeeph.h" +#include "ralloc.h" +#include "pcode.h" +#include "device.h" +#include "gen.h" + +#include "genutils.h" + +#if 1 +#define pic16_emitcode DEBUGpic16_emitcode +#endif + +#if defined(GEN_Not) +/*-----------------------------------------------------------------*/ +/* pic16_genNot - generate code for ! operation */ +/*-----------------------------------------------------------------*/ +void pic16_genNot (iCode *ic) +{ + int size; +// symbol *tlbl; + +/* + * result[AOP_CRY,AOP_REG] = ! left[AOP_CRY, AOP_REG] + */ + + FENTRY; + + /* assign asmOps to operand & result */ + pic16_aopOp (IC_LEFT(ic),ic,FALSE); + pic16_aopOp (IC_RESULT(ic),ic,TRUE); + DEBUGpic16_pic16_AopType(__LINE__,IC_LEFT(ic),NULL,IC_RESULT(ic)); + + /* if in bit space then a special case */ + if (AOP_TYPE(IC_LEFT(ic)) == AOP_CRY) { + if (AOP_TYPE(IC_RESULT(ic)) == AOP_CRY) { + pic16_emitpcode(POC_MOVLW,pic16_popGet(AOP(IC_LEFT(ic)),0)); + pic16_emitpcode(POC_XORWF,pic16_popGet(AOP(IC_RESULT(ic)),0)); + } else { + pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(IC_RESULT(ic)),0)); + pic16_emitpcode(POC_BTFSS,pic16_popGet(AOP(IC_LEFT(ic)),0)); + pic16_emitpcode(POC_INCF,pic16_popGet(AOP(IC_RESULT(ic)),0)); + } + goto release; + } + + size = AOP_SIZE(IC_LEFT(ic)); +#if 0 + if(size == 1) { + pic16_emitpcode(POC_COMFW,pic16_popGet(AOP(IC_LEFT(ic)),0)); + pic16_emitpcode(POC_ANDLW,pic16_popGetLit(1)); + pic16_emitpcode(POC_MOVWF,pic16_popGet(AOP(IC_RESULT(ic)),0)); + goto release; + } +#endif + + pic16_toBoolean( IC_LEFT(ic) ); + emitSETC; + pic16_emitpcode(POC_TSTFSZ, pic16_popCopyReg( &pic16_pc_wreg )); + emitCLRC; + pic16_outBitC( IC_RESULT(ic) ); + +release: + /* release the aops */ + pic16_freeAsmop(IC_LEFT(ic),NULL,ic,(RESULTONSTACK(ic) ? 0 : 1)); + pic16_freeAsmop(IC_RESULT(ic),NULL,ic,TRUE); +} + +#endif /* defined(GEN_Not) */ + + + +#if defined(GEN_Cpl) +/*-----------------------------------------------------------------*/ +/* pic16_genCpl - generate code for complement */ +/*-----------------------------------------------------------------*/ +void pic16_genCpl (iCode *ic) +{ + int offset = 0; + int size ; + +/* + * result[CRY,REG] = ~left[CRY,REG] + */ + FENTRY; + + DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + /* assign asmOps to operand & result */ + pic16_aopOp (IC_LEFT(ic),ic,FALSE); + pic16_aopOp (IC_RESULT(ic),ic,TRUE); + DEBUGpic16_pic16_AopType(__LINE__,IC_LEFT(ic),NULL,IC_RESULT(ic)); + + /* if both are in bit space then + * a special case */ + if (AOP_TYPE(IC_RESULT(ic)) == AOP_CRY + && AOP_TYPE(IC_LEFT(ic)) == AOP_CRY ) { + + /* FIXME */ + pic16_emitcode("mov","c,%s",IC_LEFT(ic)->aop->aopu.aop_dir); + pic16_emitcode("cpl","c"); + pic16_emitcode("mov","%s,c",IC_RESULT(ic)->aop->aopu.aop_dir); + goto release; + } + + size = AOP_SIZE(IC_RESULT(ic)); + if (size >= AOP_SIZE(IC_LEFT(ic))) size = AOP_SIZE(IC_LEFT(ic)); + + while (size--) { + if (pic16_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic))) ) { + pic16_emitpcode(POC_COMF, pic16_popGet(AOP(IC_LEFT(ic)), offset)); + } else { + pic16_emitpcode(POC_COMFW, pic16_popGet(AOP(IC_LEFT(ic)),offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(IC_RESULT(ic)),offset)); + } + offset++; + } + + /* handle implicit upcast */ + size = AOP_SIZE(IC_RESULT(ic)); + if (offset < size) + { + if (SPEC_USIGN(operandType(IC_LEFT(ic)))) { + while (offset < size) { + pic16_emitpcode(POC_SETF, pic16_popGet(AOP(IC_RESULT(ic)), offset)); + offset++; + } // while + } else { + if ((offset + 1) == size) { + /* just one byte to fix */ + pic16_emitpcode(POC_SETF, pic16_popGet(AOP(IC_RESULT(ic)), offset)); + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit(pic16_aopGet(AOP(IC_RESULT(ic)),offset-1,FALSE,FALSE),7,0, PO_GPR_REGISTER)); + pic16_emitpcode(POC_CLRF, pic16_popGet(AOP(IC_RESULT(ic)), offset)); + } else { + /* two or more byte to adjust */ + pic16_emitpcode(POC_SETF, pic16_popCopyReg( &pic16_pc_wreg )); + pic16_emitpcode(POC_BTFSC, pic16_newpCodeOpBit(pic16_aopGet(AOP(IC_RESULT(ic)),offset-1,FALSE,FALSE),7,0, PO_GPR_REGISTER)); + pic16_emitpcode(POC_CLRF, pic16_popCopyReg( &pic16_pc_wreg )); + while (offset < size) { + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(IC_RESULT(ic)), offset)); + offset++; + } // while + } // if + } + } // if + +release: + /* release the aops */ + pic16_freeAsmop(IC_LEFT(ic),NULL,ic,(RESULTONSTACK(ic) ? 0 : 1)); + pic16_freeAsmop(IC_RESULT(ic),NULL,ic,TRUE); +} +#endif /* defined(GEN_Cpl) */ + + + +/*-----------------------------------------------------------------*/ +/* Helper function to dump operand into comment lines */ +/*-----------------------------------------------------------------*/ + +void pic16_DumpValue(char *prefix, value *val) +{ +// char s[INITIAL_INLINEASM]; + if(!val) return; + + DEBUGpic16_emitcode (";", " %s Dump value",prefix); + DEBUGpic16_emitcode (";", " %s name:%s",prefix,val->name); +} + +void pic16_DumpPcodeOp(char *prefix, pCodeOp *pcop) +{ +// char s[INITIAL_INLINEASM]; + if(!pcop) return; + + DEBUGpic16_emitcode (";", " %s Dump pCodeOp",prefix); + DEBUGpic16_emitcode (";", " %s name:%s",prefix,pcop->name); + if(pcop->type == PO_NONE) { + DEBUGpic16_emitcode (";", " %s type:PO_NONE",prefix); + } + if(pcop->type == PO_W) { + DEBUGpic16_emitcode (";", " %s type:PO_W",prefix); + } + if(pcop->type == PO_WREG) { + DEBUGpic16_emitcode (";", " %s type:PO_WREG",prefix); + } + if(pcop->type == PO_STATUS) { + DEBUGpic16_emitcode (";", " %s type:PO_STATUS",prefix); + } + if(pcop->type == PO_BSR) { + DEBUGpic16_emitcode (";", " %s type:PO_BSR",prefix); + } + if(pcop->type == PO_FSR0) { + DEBUGpic16_emitcode (";", " %s type:PO_FSR0",prefix); + } + if(pcop->type == PO_INDF0) { + DEBUGpic16_emitcode (";", " %s type:PO_INDF0",prefix); + } + if(pcop->type == PO_INTCON) { + DEBUGpic16_emitcode (";", " %s type:PO_INTCON",prefix); + } + if(pcop->type == PO_GPR_REGISTER) { + DEBUGpic16_emitcode (";", " %s type:PO_GPR_REGISTER",prefix); + } + if(pcop->type == PO_GPR_BIT) { + DEBUGpic16_emitcode (";", " %s type:PO_GPR_BIT",prefix); + } + if(pcop->type == PO_GPR_TEMP) { + DEBUGpic16_emitcode (";", " %s type:PO_GPR_TEMP",prefix); + } + if(pcop->type == PO_SFR_REGISTER) { + DEBUGpic16_emitcode (";", " %s type:PO_SFR_REGISTER",prefix); + } + if(pcop->type == PO_PCL) { + DEBUGpic16_emitcode (";", " %s type:PO_PCL",prefix); + } + if(pcop->type == PO_PCLATH) { + DEBUGpic16_emitcode (";", " %s type:PO_PCLATH",prefix); + } + if(pcop->type == PO_LITERAL) { + DEBUGpic16_emitcode (";", " %s type:PO_LITERAL",prefix); + DEBUGpic16_emitcode (";", " %s lit:%s",prefix,PCOL(pcop)->lit); + } + if(pcop->type == PO_REL_ADDR) { + DEBUGpic16_emitcode (";", " %s type:PO_REL_ADDR",prefix); + } + if(pcop->type == PO_IMMEDIATE) { + DEBUGpic16_emitcode (";", " %s type:PO_IMMEDIATE",prefix); + } + if(pcop->type == PO_DIR) { + DEBUGpic16_emitcode (";", " %s type:PO_DIR",prefix); + } + if(pcop->type == PO_CRY) { + DEBUGpic16_emitcode (";", " %s type:PO_CRY",prefix); + } + if(pcop->type == PO_BIT) { + DEBUGpic16_emitcode (";", " %s type:PO_BIT",prefix); + } + if(pcop->type == PO_STR) { + DEBUGpic16_emitcode (";", " %s type:PO_STR",prefix); + } + if(pcop->type == PO_LABEL) { + DEBUGpic16_emitcode (";", " %s type:PO_LABEL",prefix); + } + if(pcop->type == PO_WILD) { + DEBUGpic16_emitcode (";", " %s type:PO_WILD",prefix); + } +} + + + +void pic16_DumpAop(char *prefix, asmop *aop) +{ + char s[INITIAL_INLINEASM]; + if(!aop) return; + + DEBUGpic16_emitcode (";", " %s Dump asmop",prefix); + if (aop->type == AOP_LIT) + { + DEBUGpic16_emitcode (";", " %s type:AOP_LIT",prefix); + sprintf(s,"%s (aopu.aop_lit)",prefix); + pic16_DumpValue(s,aop->aopu.aop_lit); + } + if (aop->type == AOP_REG) + DEBUGpic16_emitcode (";", " %s type:AOP_REG",prefix); + if (aop->type == AOP_DIR) + { + DEBUGpic16_emitcode (";", " %s type:AOP_DIR",prefix); + DEBUGpic16_emitcode (";", " %s aopu.aop_dir:%s",prefix,aop->aopu.aop_dir); + } + if (aop->type == AOP_STK) + DEBUGpic16_emitcode (";", " %s type:AOP_STK",prefix); + if (aop->type == AOP_STA) + DEBUGpic16_emitcode (";", " %s type:AOP_STA",prefix); + if (aop->type == AOP_STR) + { + DEBUGpic16_emitcode (";", " %s type:AOP_STR",prefix); + DEBUGpic16_emitcode (";", " %s aopu.aop_str:%s/%s/%s/%s",prefix,aop->aopu.aop_str[0], + aop->aopu.aop_str[1],aop->aopu.aop_str[2],aop->aopu.aop_str[3]); + } + if (aop->type == AOP_CRY) + DEBUGpic16_emitcode (";", " %s type:AOP_CRY",prefix); + if (aop->type == AOP_ACC) + DEBUGpic16_emitcode (";", " %s type:AOP_ACC",prefix); + if (aop->type == AOP_PCODE) + { + DEBUGpic16_emitcode (";", " %s type:AOP_PCODE",prefix); + sprintf(s,"%s (aopu.pcop)",prefix); + pic16_DumpPcodeOp(s,aop->aopu.pcop); + } + + + DEBUGpic16_emitcode (";", " %s coff:%d",prefix,aop->coff); + DEBUGpic16_emitcode (";", " %s size:%d",prefix,aop->size); + DEBUGpic16_emitcode (";", " %s code:%d",prefix,aop->code); + DEBUGpic16_emitcode (";", " %s paged:%d",prefix,aop->paged); + DEBUGpic16_emitcode (";", " %s freed:%d",prefix,aop->freed); + +} + +void pic16_DumpSymbol(char *prefix, symbol *sym) +{ + char s[INITIAL_INLINEASM]; + if(!sym) return; + + DEBUGpic16_emitcode (";", " %s Dump symbol",prefix); + DEBUGpic16_emitcode (";", " %s name:%s",prefix,sym->name); + DEBUGpic16_emitcode (";", " %s rname:%s",prefix,sym->rname); + DEBUGpic16_emitcode (";", " %s level:%d",prefix,sym->level); + DEBUGpic16_emitcode (";", " %s block:%d",prefix,sym->block); + DEBUGpic16_emitcode (";", " %s key:%d",prefix,sym->key); + DEBUGpic16_emitcode (";", " %s implicit:%d",prefix,sym->implicit); + DEBUGpic16_emitcode (";", " %s undefined:%d",prefix,sym->undefined); + DEBUGpic16_emitcode (";", " %s _isparm:%d",prefix,sym->_isparm); + DEBUGpic16_emitcode (";", " %s ismyparm:%d",prefix,sym->ismyparm); + DEBUGpic16_emitcode (";", " %s isitmp:%d",prefix,sym->isitmp); + DEBUGpic16_emitcode (";", " %s islbl:%d",prefix,sym->islbl); + DEBUGpic16_emitcode (";", " %s isref:%d",prefix,sym->isref); + DEBUGpic16_emitcode (";", " %s isind:%d",prefix,sym->isind); + DEBUGpic16_emitcode (";", " %s isinvariant:%d",prefix,sym->isinvariant); + DEBUGpic16_emitcode (";", " %s cdef:%d",prefix,sym->cdef); + DEBUGpic16_emitcode (";", " %s addrtaken:%d",prefix,sym->addrtaken); + DEBUGpic16_emitcode (";", " %s isreqv:%d",prefix,sym->isreqv); + DEBUGpic16_emitcode (";", " %s udChked:%d",prefix,sym->udChked); + DEBUGpic16_emitcode (";", " %s isLiveFcall:%d",prefix,sym->isLiveFcall); + DEBUGpic16_emitcode (";", " %s isspilt:%d",prefix,sym->isspilt); + DEBUGpic16_emitcode (";", " %s spillA:%d",prefix,sym->spillA); + DEBUGpic16_emitcode (";", " %s remat:%d",prefix,sym->remat); + DEBUGpic16_emitcode (";", " %s isptr:%d",prefix,sym->isptr); + DEBUGpic16_emitcode (";", " %s uptr:%d",prefix,sym->uptr); + DEBUGpic16_emitcode (";", " %s isFree:%d",prefix,sym->isFree); + DEBUGpic16_emitcode (";", " %s islocal:%d",prefix,sym->islocal); + DEBUGpic16_emitcode (";", " %s blockSpil:%d",prefix,sym->blockSpil); + DEBUGpic16_emitcode (";", " %s remainSpil:%d",prefix,sym->remainSpil); + DEBUGpic16_emitcode (";", " %s stackSpil:%d",prefix,sym->stackSpil); + DEBUGpic16_emitcode (";", " %s onStack:%d",prefix,sym->onStack); + DEBUGpic16_emitcode (";", " %s iaccess:%d",prefix,sym->iaccess); + DEBUGpic16_emitcode (";", " %s ruonly:%d",prefix,sym->ruonly); + DEBUGpic16_emitcode (";", " %s spildir:%d",prefix,sym->spildir); + DEBUGpic16_emitcode (";", " %s ptrreg:%d",prefix,sym->ptrreg); + DEBUGpic16_emitcode (";", " %s noSpilLoc:%d",prefix,sym->noSpilLoc); + DEBUGpic16_emitcode (";", " %s isstrlit:%d",prefix,sym->isstrlit); + DEBUGpic16_emitcode (";", " %s accuse:%d",prefix,sym->accuse); + DEBUGpic16_emitcode (";", " %s dptr:%d",prefix,sym->dptr); + DEBUGpic16_emitcode (";", " %s allocreq:%d",prefix,sym->allocreq); + DEBUGpic16_emitcode (";", " %s stack:%d",prefix,sym->stack); + DEBUGpic16_emitcode (";", " %s xstack:%d",prefix,sym->xstack); + DEBUGpic16_emitcode (";", " %s nRegs:%d",prefix,sym->nRegs); + DEBUGpic16_emitcode (";", " %s regType:%d",prefix,sym->regType); + + // struct regs !!! + + if(sym->aop) + { + sprintf(s,"%s (aop)",prefix); + pic16_DumpAop(s,sym->aop); + } else { + DEBUGpic16_emitcode (";", " %s aop:NULL",prefix); + } +} + +void pic16_DumpOp(char *prefix, operand *op) +{ + char s[INITIAL_INLINEASM]; + if(!op) return; + + DEBUGpic16_emitcode (";", " %s Dump operand",prefix); + if(IS_SYMOP(op)) + DEBUGpic16_emitcode (";", " %s type: SYMBOL",prefix); + if(IS_VALOP(op)) + DEBUGpic16_emitcode (";", " %s type: VALUE",prefix); + if(IS_TYPOP(op)) + DEBUGpic16_emitcode (";", " %s type: TYPE",prefix); + DEBUGpic16_emitcode (";", " %s isaddr:%d",prefix,op->isaddr); + DEBUGpic16_emitcode (";", " %s isvolatile:%d",prefix,op->isvolatile); + DEBUGpic16_emitcode (";" ," %s isGlobal:%d",prefix,op->isGlobal); + DEBUGpic16_emitcode (";", " %s isPtr:%d",prefix,op->isPtr); + DEBUGpic16_emitcode (";", " %s isGptr:%d",prefix,op->isGptr); + DEBUGpic16_emitcode (";", " %s isParm:%d",prefix,op->isParm); + DEBUGpic16_emitcode (";", " %s isLiteral:%d",prefix,op->isLiteral); + DEBUGpic16_emitcode (";", " %s key:%d",prefix,op->key); + if(IS_SYMOP(op)) { + sprintf(s,"%s (symOperand)",prefix); + pic16_DumpSymbol(s,op->operand.symOperand); + } + +} + +void pic16_DumpOpX(FILE *fp, char *prefix, operand *op) +{ + if(!op)return; + + fprintf(fp, "%s [", prefix); + fprintf(fp, "%s", IS_SYMOP(op)?"S":" "); + fprintf(fp, "%s", IS_VALOP(op)?"V":" "); + fprintf(fp, "%s", IS_TYPOP(op)?"T":" "); + fprintf(fp, "] "); + + fprintf(fp, "isaddr:%d,", op->isaddr); + fprintf(fp, "isvolatile:%d,", op->isvolatile); + fprintf(fp, "isGlobal:%d,", op->isGlobal); + fprintf(fp, "isPtr:%d,", op->isPtr); + fprintf(fp, "isParm:%d,", op->isParm); + fprintf(fp, "isLit:%d\n", op->isLiteral); +} + + +void _debugf(char *f, int l, char *frm, ...) +{ + va_list ap; + + va_start(ap, frm); + fprintf(stderr, "%s:%d ", f, l); + vfprintf(stderr, frm, ap); + va_end(ap); +} + + + +void gpsimio2_pcop(pCodeOp *pcop) +{ + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pcop, pic16_popCopyReg(&pic16_pc_gpsimio2))); +} + +void gpsimio2_lit(unsigned char lit) +{ + pic16_emitpcode(POC_MOVLW, pic16_popGetLit(lit)); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popCopyReg(&pic16_pc_wreg), pic16_popCopyReg(&pic16_pc_gpsimio2))); +} + +void gpsimio2_str(char *buf) +{ + while(*buf) { + gpsimio2_lit(*buf); + buf++; + } +} + +void gpsimDebug_StackDump(char *fname, int line, char *info) +{ + pic16_emitpcomment("; gpsim debug stack dump; %s @ %d\tinfo: ", fname, line, info); + + gpsimio2_str("&c[S:"); + gpsimio2_str(info); + gpsimio2_str("] &h"); + + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popCopyReg(&pic16_pc_fsr1h), + pic16_popCopyReg(&pic16_pc_gpsimio2))); + pic16_emitpcode(POC_MOVFF, pic16_popGet2p(pic16_popCopyReg(&pic16_pc_fsr1l), + pic16_popCopyReg(&pic16_pc_gpsimio2))); + + gpsimio2_lit('\n'); +} + +const char *gptr_fns[4][2] = { + { "_gptrget1", "_gptrput1" }, + { "_gptrget2", "_gptrput2" }, + { "_gptrget3", "_gptrput3" }, + { "_gptrget4", "_gptrput4" } }; + +extern set *externs; + +/* generate a call to the generic pointer read/write functions */ +void pic16_callGenericPointerRW(int rw, int size) +{ + char buf[32]; + symbol *sym; + + if(size>4) { + werror(W_POSSBUG2, __FILE__, __LINE__); + abort(); + } + + strcpy(buf, port->fun_prefix); + strcat(buf, gptr_fns[size-1][rw]); + + pic16_emitpcode (POC_CALL, pic16_popGetWithString (buf)); + + sym = newSymbol( buf, 0 ); + sym->used++; + strcpy(sym->rname, buf); + checkAddSym(&externs, sym); +} + + + +/* check all condition and return appropriate instruction, POC_CPFSGT or POC_CPFFSLT */ +static int selectCompareOp(resolvedIfx *rIfx, iCode *ifx, + operand *result, int offset, int invert_op) +{ + /* add code here */ + + /* check condition, > or < ?? */ + if(rIfx->condition != 0)invert_op ^= 1; + + if(ifx && IC_FALSE(ifx))invert_op ^= 1; + + if(!ifx)invert_op ^= 1; + + DEBUGpic16_emitcode("; +++", "%s:%d %s] rIfx->condition= %d, ifx&&IC_FALSE(ifx)= %d, invert_op = %d", + __FILE__, __LINE__, __FUNCTION__, rIfx->condition, (ifx && IC_FALSE(ifx)), invert_op); + + /* do selection */ + if(!invert_op)return POC_CPFSGT; + else return POC_CPFSLT; +} + +/* return 1 if function handles compare, 0 otherwise */ +/* this functions handles special cases like: + * reg vs. zero + * reg vs. one + */ +int pic16_genCmp_special(operand *left, operand *right, operand *result, + iCode *ifx, resolvedIfx *rIfx, int sign) +{ + int size; + int offs=0; + symbol *tmplbl; + unsigned long lit; + int op, cmp_op=0, cond_pre; + + FENTRY; + + if(!(pic16_options.opt_flags & OF_OPTIMIZE_CMP))return 0; + + size = max(AOP_SIZE(left), AOP_SIZE(right)); + + cond_pre = rIfx->condition; // must restore old value on return with 0!!! + + if(!isAOP_REGlike(left)) { + operand *dummy; + + dummy = left; + left = right; + right = dummy; + + /* invert comparing operand */ +// cmp_op ^= 1; + rIfx->condition ^= 1; + } + + + if(isAOP_REGlike(left) && isAOP_LIT(right)) { + /* comparing register vs. literal */ + lit = ulFromVal(AOP(right)->aopu.aop_lit); + + + if(size == 1) { + op = selectCompareOp(rIfx, ifx, result, offs, cmp_op); + + DEBUGpic16_emitcode("%%", "comparing operand %s, condition: %d", (op==POC_CPFSLT?"POC_CPFSLT":"POC_CPFSGT"), rIfx->condition); + + if(!sign) { + /* unsigned compare */ + switch( lit ) { + case 0: + if(ifx && IC_FALSE(ifx)) { + tmplbl = newiTempLabel( NULL ); + pic16_emitpcode(POC_TSTFSZ, pic16_popGet(AOP(left), 0)); + pic16_emitpcode(POC_BRA, pic16_popGetLabel(tmplbl->key)); + pic16_emitpcode(POC_GOTO, pic16_popGetLabel(rIfx->lbl->key)); + pic16_emitpLabel(tmplbl->key); + + ifx->generated = 1; + return 1; + } + break; + } /* switch */ + + } /* if(!sign) */ + + } /* if(size==1) */ + + } /* */ + + rIfx->condition = cond_pre; + return 0; +} diff --git a/src/pic16/genutils.h b/src/pic16/genutils.h new file mode 100644 index 0000000..d8d1966 --- /dev/null +++ b/src/pic16/genutils.h @@ -0,0 +1,75 @@ + +/* +** $Id: genutils.h 4051 2006-03-06 08:27:52Z vrokas $ +*/ + +#ifndef __GENUTILS_H__ +#define __GENUTILS_H__ + + +#include "common.h" + + +#if !defined(__BORLANDC__) && !defined(_MSC_VER) +#define DEBUGpc(fmt,...) DEBUGpic16_emitcode("; =:=", "%s:%s:%d: " fmt, __FILE__, __FUNCTION__, __LINE__, ##__VA_ARGS__) +#else +#define DEBUGpc 1 ? (void)0 : printf +#endif +#define isAOP_LIT(x) (AOP_TYPE(x) == AOP_LIT) +#define isAOP_REGlike(x) (AOP_TYPE(x) == AOP_REG || AOP_TYPE(x) == AOP_DIR || AOP_TYPE(x) == AOP_PCODE || AOP_TYPE(x) == AOP_STA) + + +/* Resolved ifx structure. This structure stores information + * about an iCode ifx that makes it easier to generate code. + */ +typedef struct resolvedIfx { + symbol *lbl; /* pointer to a label */ + int condition; /* true or false ifx */ + int generated; /* set true when the code associated with the ifx + * is generated */ +} resolvedIfx; + + +/* + * The various GEN_xxxxx macros handle which functions + * should be included in the gen.c source. We are going to use + * our own functions here so, they must be commented out from + * gen.c + */ + +#define GEN_Not +void pic16_genNot(iCode *ic); + +#define GEN_Cpl +void pic16_genCpl(iCode *ic); + + +/* + * global function definitions + */ +void pic16_DumpValue(char *prefix, value *val); +void pic16_DumpPcodeOp(char *prefix, pCodeOp *pcop); +void pic16_DumpAop(char *prefix, asmop *aop); +void pic16_DumpSymbol(char *prefix, symbol *sym); +void pic16_DumpOp(char *prefix, operand *op); +void pic16_DumpOpX(FILE *fp, char *prefix, operand *op); + +pCodeOp *pic16_popGetWithString(char *str); +void pic16_callGenericPointerRW(int rw, int size); + + + +void gpsimio2_pcop(pCodeOp *pcop); +void gpsimio2_lit(unsigned char lit); + +void gpsimDebug_StackDump(char *fname, int line, char *info); + +int pic16_genCmp_special(operand *left, operand *right, operand *result, + iCode *ifx, resolvedIfx *rIfx, int sign); + +#ifndef debugf +#define debugf(frm, rest) _debugf(__FILE__, __LINE__, frm, rest) +#endif +void _debugf(char *f, int l, char *frm, ...); + +#endif /* __GENUTILS_H__ */ diff --git a/src/pic16/glue.c b/src/pic16/glue.c new file mode 100644 index 0000000..5645e6d --- /dev/null +++ b/src/pic16/glue.c @@ -0,0 +1,1907 @@ +/*------------------------------------------------------------------------- + + glue.c - glues everything we have done together into one file. + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "../common.h" +#include +#include "ralloc.h" +#include "pcode.h" +#include "newalloc.h" +#include "gen.h" +#include "device.h" +#include "main.h" +#include "dbuf_string.h" +#include + + +extern symbol *interrupts[256]; +void pic16_printIval (symbol * sym, sym_link * type, initList * ilist, char ptype, void *p); +extern int noAlloc; +extern set *publics; +extern set *externs; +extern unsigned maxInterrupts; +extern symbol *mainf; +extern char *VersionString; +extern struct dbuf_s *codeOutBuf; +extern char *iComments1; +extern char *iComments2; + +extern int initsfpnt; +extern unsigned long pFile_isize; + +extern unsigned long pic16_countInstructions(); +set *pic16_localFunctions = NULL; +set *rel_idataSymSet = NULL; +set *fix_idataSymSet = NULL; + +extern void pic16_AnalyzeBanking (void); +extern void pic16_OptimizeJumps (void); +extern void pic16_OptimizeBanksel (void); +extern void pic16_InlinepCode (void); +extern void pic16_writeUsedRegs (FILE *); + +extern void initialComments (FILE * afile); +extern void printPublics (FILE * afile); + +void pic16_pCodeInitRegisters (void); +pCodeOp *pic16_popCopyReg (pCodeOpReg *pc); +extern void pic16_pCodeConstString (char *name, char *value, unsigned length); + + +/*-----------------------------------------------------------------*/ +/* aopLiteral - string from a literal value */ +/*-----------------------------------------------------------------*/ +unsigned int pic16aopLiteral (value *val, int offset) +{ + union { + float f; + unsigned char c[4]; + } fl; + + /* if it is a float then it gets tricky */ + /* otherwise it is fairly simple */ + if (!(IS_FLOAT(val->type) || IS_FIXED(val->type))) { + unsigned long v = ulFromVal (val); + + return ( (v >> (offset * 8)) & 0xff); + } + + if(IS_FIXED16X16(val->type)) { + unsigned long v = (unsigned long)fixed16x16FromDouble( floatFromVal( val ) ); + + return ( (v >> (offset * 8)) & 0xff); + } + + /* it is type float */ + fl.f = (float) floatFromVal(val); +#ifdef WORDS_BIGENDIAN + return fl.c[3-offset]; +#else + return fl.c[offset]; +#endif + +} + +iCode *tic; +symbol *nsym; +char tbuffer[512], *tbuf=tbuffer;; + + +/*-----------------------------------------------------------------*/ +/* emitRegularMap - emit code for maps with no special cases */ +/*-----------------------------------------------------------------*/ +static void +pic16emitRegularMap (memmap * map, bool addPublics, bool arFlag) +{ + symbol *sym; +// int i, size, bitvars = 0;; + +// fprintf(stderr, "%s:%d map name= %s\n", __FUNCTION__, __LINE__, map->sname); + + if(addPublics) + dbuf_printf (&map->oBuf, ";\t.area\t%s\n", map->sname); + /* print the area name */ + + for (sym = setFirstItem (map->syms); sym; sym = setNextItem (map->syms)) { + +#if 0 + fprintf(stderr, "%s\t%s: sym: %s\tused: %d\textern: %d\tstatic: %d\taggregate: %d\tregister: 0x%x\tfunction: %d\n", + __FUNCTION__, + map->sname, sym->name, sym->used, IS_EXTERN(sym->etype), IS_STATIC(sym->etype), + IS_AGGREGATE(sym->type), (SPEC_SCLS(sym->etype) == S_REGISTER), IS_FUNC(sym->type)); + printTypeChain( sym->type, stderr ); + fprintf(stderr, "\n"); +#endif + + /* if extern then add to externs */ + if (IS_EXTERN (sym->etype)) { + /* reduce overhead while linking by not declaring + * extern unused external functions (usually declared + * in header files) */ + if(IS_FUNC(sym->type) && !sym->used)continue; + + /* make sure symbol is not in publics section */ + if(!checkSym(publics, sym)) + checkAddSym(&externs, sym); + continue; + } + + /* if allocation required check is needed + * then check if the symbol really requires + * allocation only for local variables */ + if (arFlag && !IS_AGGREGATE (sym->type) && + !(sym->_isparm && !IS_REGPARM (sym->etype)) && + !sym->allocreq && sym->level) { + +// fprintf(stderr, "%s:%d special case, continuing...\n", __FILE__, __LINE__); + + continue; + } + + /* if global variable & not static or extern + * and addPublics allowed then add it to the public set */ + if ((sym->used) && (sym->level == 0 || + (sym->_isparm && !IS_REGPARM (sym->etype))) && + addPublics && + !IS_STATIC (sym->etype) && !IS_FUNC(sym->type)) { + + checkAddSym(&publics, sym); + } else + /* new version */ + if(IS_STATIC(sym->etype) + && !sym->ival) /* && !sym->level*/ { + regs *reg; + sectSym *ssym; + int found=0; + +// debugf("adding symbol %s\n", sym->name); +#define SET_IMPLICIT 1 + +#if SET_IMPLICIT + if(IS_STRUCT(sym->type)) + sym->implicit = 1; +#endif + + reg = pic16_allocDirReg( operandFromSymbol( sym )); + + if(reg) { + for(ssym=setFirstItem(sectSyms); ssym; ssym=setNextItem(sectSyms)) { + if(!strcmp(ssym->name, reg->name))found=1; + } + + if(!found) + checkAddReg(&pic16_rel_udata, reg); +#if 0 + else + debugf("Did find %s in pic16_rel_udata already. Check!\n", reg->name); +// checkAddSym(&publics, sym); +#endif + + } + } + + /* if extern then do nothing or is a function + * then do nothing */ + if (IS_FUNC (sym->type) && !IS_STATIC(sym->etype)) { + if(SPEC_OCLS(sym->etype) == code) { +// fprintf(stderr, "%s:%d: symbol added: %s\n", __FILE__, __LINE__, sym->rname); + checkAddSym(&publics, sym); + } + continue; + } + + /* if is has an absolute address then generate + an equate for this no need to allocate space */ + if (SPEC_ABSA (sym->etype)) { +// fprintf (stderr,"; %s == 0x%04x\t\treqv= %p nRegs= %d\n", +// sym->name, SPEC_ADDR (sym->etype), sym->reqv, sym->regType); + + dbuf_printf (&map->oBuf, "%s\tEQU\t0x%04x\n", + sym->rname, + SPEC_ADDR (sym->etype)); + + /* emit only if it is global */ + if(sym->level == 0) { + regs *reg; + + reg = pic16_dirregWithName( sym->name ); + if(!reg) { + /* here */ +// fprintf(stderr, "%s:%d: implicit add of symbol = %s\n", +// __FUNCTION__, __LINE__, sym->name); + + /* if IS_STRUCT is omitted the following + * fixes structures but break char/int etc */ +#if SET_IMPLICIT + if(IS_STRUCT(sym->type)) + sym->implicit = 1; // mark as implicit +#endif + if(!sym->ival) { + reg = pic16_allocDirReg( operandFromSymbol(sym) ); + if(reg) { + if(checkAddReg(&pic16_fix_udata, reg)) { + /* and add to globals list if not exist */ + addSet(&publics, sym); + } + } + } else + addSet(&publics, sym); + } + } + } else { + if(!sym->used && (sym->level == 0)) { + regs *reg; + + /* symbol not used, just declared probably, but its in + * level 0, so we must declare it fine as global */ + +// fprintf(stderr, "EXTRA symbol declaration sym= %s\n", sym->name); + +#if SET_IMPLICIT + if(IS_STRUCT(sym->type)) + sym->implicit = 1; // mark as implicit +#endif + if(!sym->ival) { + if(IS_AGGREGATE(sym->type)) { + reg=pic16_allocRegByName(sym->rname, getSize( sym->type ), NULL); + } else { + reg = pic16_allocDirReg( operandFromSymbol( sym ) ); + } + + { + sectSym *ssym; + int found=0; + +#if 0 + fprintf(stderr, "%s:%d sym->rname: %s reg: %p reg->name: %s\n", __FILE__, __LINE__, + sym->rname, reg, (reg?reg->name:"<>")); +#endif + + if(reg) { + for(ssym=setFirstItem(sectSyms); ssym; ssym=setNextItem(sectSyms)) { + if(!strcmp(ssym->name, reg->name))found=1; + } + + if(!found) + if(checkAddReg(&pic16_rel_udata, reg)) { + addSetHead(&publics, sym); + } + } + } + + + + } else + + addSetHead(&publics, sym); + } + +#if 0 + /* allocate space */ + /* If this is a bit variable, then allocate storage after 8 bits have been declared */ + /* unlike the 8051, the pic does not have a separate bit area. So we emulate bit ram */ + /* by grouping the bits together into groups of 8 and storing them in the normal ram. */ + if (IS_BITVAR (sym->etype)) { + bitvars++; + } else { + dbuf_printf (map->oBuf, "\t%s\n", sym->rname); + if ((size = (unsigned int) getSize (sym->type) & 0xffff) > 1) { + for (i = 1; i < size; i++) + dbuf_printf (map->oBuf, "\t%s_%d\n", sym->rname, i); + } + } + dbuf_printf (map->oBuf, "\t.ds\t0x%04x\n", (unsigned int)getSize (sym->type) & 0xffff); +#endif + } + + /* FIXME -- VR Fix the following, so that syms to be placed + * in the idata section and let linker decide about their fate */ + + /* if it has an initial value then do it only if + it is a global variable */ + + if (sym->ival + && ((sym->level == 0) + || IS_STATIC(sym->etype)) ) { + ast *ival = NULL; + +#if 0 + if(SPEC_OCLS(sym->etype)==data) { + fprintf(stderr, "%s: sym %s placed in data segment\n", map->sname, sym->name); + } + + if(SPEC_OCLS(sym->etype)==code) { + fprintf(stderr, "%s: sym %s placed in code segment\n", map->sname, sym->name); + } +#endif + +#if 0 + fprintf(stderr, "'%s': sym '%s' has initial value SPEC_ABSA: %d, IS_AGGREGATE: %d\n", + map->sname, sym->name, SPEC_ABSA(sym->etype), IS_AGGREGATE(sym->type)); +#endif + + if (IS_AGGREGATE (sym->type)) { + if(SPEC_ABSA(sym->etype)) + addSet(&fix_idataSymSet, copySymbol(sym)); + else + addSet(&rel_idataSymSet, copySymbol(sym)); +// ival = initAggregates (sym, sym->ival, NULL); + } else { + if(SPEC_ABSA(sym->etype)) + addSet(&fix_idataSymSet, copySymbol(sym)); + else + addSet(&rel_idataSymSet, copySymbol(sym)); + +// ival = newNode ('=', newAst_VALUE(symbolVal (sym)), +// decorateType (resolveSymbols (list2expr (sym->ival)), RESULT_TYPE_NONE)); + } + + if(ival) { + setAstFileLine (ival, sym->fileDef, sym->lineDef); + codeOutBuf = &statsg->oBuf; + GcurMemmap = statsg; + eBBlockFromiCode (iCodeFromAst (ival)); + sym->ival = NULL; + } + } + } +} + + +/*-----------------------------------------------------------------*/ +/* pic16_initPointer - pointer initialization code massaging */ +/*-----------------------------------------------------------------*/ +static value * +pic16_initPointer (initList * ilist, sym_link *toType) +{ + value *val; + ast *expr; + + if (!ilist) { + return valCastLiteral(toType, 0.0); + } + + expr = decorateType(resolveSymbols( list2expr (ilist) ), FALSE); +// expr = list2expr( ilist ); + + if (!expr) + goto wrong; + + /* try it the old way first */ + if (expr->etype && (val = constExprValue (expr, FALSE))) + return val; + + /* ( ptr + constant ) */ + if (IS_AST_OP (expr) && + (expr->opval.op == '+' || expr->opval.op == '-') && + IS_AST_SYM_VALUE (expr->left) && + (IS_ARRAY(expr->left->ftype) || IS_PTR(expr->left->ftype)) && + compareType(toType, expr->left->ftype) && + IS_AST_LIT_VALUE (expr->right)) { + return valForCastAggr (expr->left, expr->left->ftype, + expr->right, + expr->opval.op); + } + + /* (char *)&a */ + if (IS_AST_OP(expr) && expr->opval.op==CAST && + IS_AST_OP(expr->right) && expr->right->opval.op=='&') { + if (compareType(toType, expr->left->ftype)!=1) { + werror (W_INIT_WRONG); + printFromToType(expr->left->ftype, toType); + } + // skip the cast ??? + expr=expr->right; + } + + /* no then we have to do these cludgy checks */ + /* pointers can be initialized with address of + a variable or address of an array element */ + if (IS_AST_OP (expr) && expr->opval.op == '&') { + /* address of symbol */ + if (IS_AST_SYM_VALUE (expr->left) && expr->left->etype) { + val = AST_VALUE (expr->left); + val->type = newLink (DECLARATOR); + if(SPEC_SCLS (expr->left->etype) == S_CODE) { + DCL_TYPE (val->type) = CPOINTER; + DCL_PTR_CONST (val->type) = port->mem.code_ro; + } + else if (SPEC_SCLS (expr->left->etype) == S_XDATA) + DCL_TYPE (val->type) = FPOINTER; + else if (SPEC_SCLS (expr->left->etype) == S_XSTACK) + DCL_TYPE (val->type) = PPOINTER; + else if (SPEC_SCLS (expr->left->etype) == S_IDATA) + DCL_TYPE (val->type) = IPOINTER; + else if (SPEC_SCLS (expr->left->etype) == S_EEPROM) + DCL_TYPE (val->type) = EEPPOINTER; + else + DCL_TYPE (val->type) = POINTER; + + val->type->next = expr->left->ftype; + val->etype = getSpec (val->type); + return val; + } + + /* if address of indexed array */ + if (IS_AST_OP (expr->left) && expr->left->opval.op == '[') + return valForArray (expr->left); + + /* if address of structure element then + case 1. a.b ; */ + if (IS_AST_OP (expr->left) && + expr->left->opval.op == '.') { + return valForStructElem (expr->left->left, + expr->left->right); + } + + /* case 2. (&a)->b ; + (&some_struct)->element */ + if (IS_AST_OP (expr->left) && + expr->left->opval.op == PTR_OP && + IS_ADDRESS_OF_OP (expr->left->left)) { + return valForStructElem (expr->left->left->left, + expr->left->right); + } + } + /* case 3. (((char *) &a) +/- constant) */ + if (IS_AST_OP (expr) && + (expr->opval.op == '+' || expr->opval.op == '-') && + IS_AST_OP (expr->left) && expr->left->opval.op == CAST && + IS_AST_OP (expr->left->right) && + expr->left->right->opval.op == '&' && + IS_AST_LIT_VALUE (expr->right)) { + + return valForCastAggr (expr->left->right->left, + expr->left->left->opval.lnk, + expr->right, expr->opval.op); + + } + /* case 4. (char *)(array type) */ + if (IS_CAST_OP(expr) && IS_AST_SYM_VALUE (expr->right) && + IS_ARRAY(expr->right->ftype)) { + + val = copyValue (AST_VALUE (expr->right)); + val->type = newLink (DECLARATOR); + if (SPEC_SCLS (expr->right->etype) == S_CODE) { + DCL_TYPE (val->type) = CPOINTER; + DCL_PTR_CONST (val->type) = port->mem.code_ro; + } + else if (SPEC_SCLS (expr->right->etype) == S_XDATA) + DCL_TYPE (val->type) = FPOINTER; + else if (SPEC_SCLS (expr->right->etype) == S_XSTACK) + DCL_TYPE (val->type) = PPOINTER; + else if (SPEC_SCLS (expr->right->etype) == S_IDATA) + DCL_TYPE (val->type) = IPOINTER; + else if (SPEC_SCLS (expr->right->etype) == S_EEPROM) + DCL_TYPE (val->type) = EEPPOINTER; + else + DCL_TYPE (val->type) = POINTER; + val->type->next = expr->right->ftype->next; + val->etype = getSpec (val->type); + return val; + } + + wrong: + if (expr) + werrorfl (expr->filename, expr->lineno, E_INCOMPAT_PTYPES); + else + werror (E_INCOMPAT_PTYPES); + return NULL; + +} + + +/*-----------------------------------------------------------------*/ +/* printPointerType - generates ival for pointer type */ +/*-----------------------------------------------------------------*/ +static void +_pic16_printPointerType (const char *name, char ptype, void *p) +{ + char buf[256]; + + sprintf (buf, "LOW(%s)", name); + pic16_emitDS (buf, ptype, p); + sprintf (buf, "HIGH(%s)", name); + pic16_emitDS (buf, ptype, p); +} + +/*-----------------------------------------------------------------*/ +/* printPointerType - generates ival for pointer type */ +/*-----------------------------------------------------------------*/ +static void +pic16_printPointerType (const char *name, char ptype, void *p) +{ + _pic16_printPointerType (name, ptype, p); + //pic16_flushDB(ptype, p); /* breaks char* const arr[] = {&c, &c, &c}; */ +} + +/*-----------------------------------------------------------------*/ +/* printGPointerType - generates ival for generic pointer type */ +/*-----------------------------------------------------------------*/ +static void +pic16_printGPointerType (const char *iname, const unsigned int itype, + char ptype, void *p) +{ + char buf[256]; + + _pic16_printPointerType (iname, ptype, p); + + switch (itype) + { + case CPOINTER: /* fall through */ + case FUNCTION: /* fall through */ + case GPOINTER: + /* GPTRs pointing to __data space should be reported as POINTERs */ + sprintf (buf, "UPPER(%s)", iname); + pic16_emitDS (buf, ptype, p); + break; + + case POINTER: /* fall through */ + case FPOINTER: /* fall through */ + case IPOINTER: /* fall through */ + case PPOINTER: /* __data space */ + sprintf (buf, "0x%02x", GPTR_TAG_DATA); + pic16_emitDS (buf, ptype, p); + break; + + default: + debugf ("itype = %d\n", itype ); + assert (0); + } + + if (itype == GPOINTER) { + fprintf(stderr, "%s: initialized generic pointer with unknown storage class assumes object in code space\n", __func__); + } + + //pic16_flushDB(ptype, p); /* might break char* const arr[] = {...}; */ +} + + +/* set to 0 to disable debug messages */ +#define DEBUG_PRINTIVAL 0 + +/*-----------------------------------------------------------------*/ +/* pic16_printIvalType - generates ival for int/char */ +/*-----------------------------------------------------------------*/ +static void +pic16_printIvalType (symbol *sym, sym_link * type, initList * ilist, char ptype, void *p) +{ + value *val; + int i; + +// fprintf(stderr, "%s for symbol %s\n",__FUNCTION__, sym->rname); + +#if DEBUG_PRINTIVAL + fprintf(stderr, "%s\n",__FUNCTION__); +#endif + + + /* if initList is deep */ + if (ilist && ilist->type == INIT_DEEP) + ilist = ilist->init.deep; + + if (!IS_AGGREGATE(sym->type) && getNelements(type, ilist)>1) { + werror (W_EXCESS_INITIALIZERS, "scalar", sym->name, sym->lineDef); + } + + if (!(val = list2val (ilist))) { + // assuming a warning has been thrown + val = constCharVal (0); + } + + if (val->type != type) { + val = valCastLiteral(type, floatFromVal(val)); + } + + for (i = 0; i < getSize (type); i++) { + pic16_emitDB(pic16aopLiteral(val, i), ptype, p); + } // for +} + +/*--------------------------------------------------------------------*/ +/* pic16_printIvalChar - generates initital value for character array */ +/*--------------------------------------------------------------------*/ +static int +pic16_printIvalChar (symbol *sym, sym_link * type, initList * ilist, char *s, char ptype, void *p) +{ + value *val; + int remain, len, ilen; + + if(!p) + return 0; + +#if DEBUG_PRINTIVAL + fprintf(stderr, "%s\n",__FUNCTION__); +#endif + + if(!s) { + val = list2val (ilist); + + /* if the value is a character string */ + if(IS_ARRAY (val->type) && IS_CHAR (val->etype)) { + /* length of initializer string (might contain \0, so do not use strlen) */ + ilen = DCL_ELEM(val->type); + +#if 0 + /* This causes structflexarray.c to fail. */ + if(!DCL_ELEM (type)) + DCL_ELEM (type) = ilen; +#endif + + /* len is 0 if declartion equals initializer, + * >0 if declaration greater than initializer + * <0 if declaration less than initializer + * Strategy: if >0 emit 0x00 for the rest of the length, + * if <0 then emit only the length of declaration elements + * and warn user + */ + len = DCL_ELEM (type) - ilen; + +// fprintf(stderr, "%s:%d ilen = %i len = %i DCL_ELEM(type) = %i SPEC_CVAL-len = %i\n", __FILE__, __LINE__, +// ilen, len, DCL_ELEM(type), strlen(SPEC_CVAL(val->etype).v_char)); + + if(len >= 0) { + /* emit initializer */ + for(remain=0; remainetype).v_char[ remain ], ptype, p); + } // for + + /* fill array with 0x00 */ + while(len--) { + pic16_emitDB(0x00, ptype, p); + } // while + } else if (!DCL_ELEM (type)) { + // flexible arrays: char str[] = "something"; */ + for(remain=0; remainetype).v_char[ remain ], ptype, p); + } // for + } else { + werror (W_EXCESS_INITIALIZERS, "array of chars", sym->name, sym->lineDef); + for(remain=0; remainetype).v_char[ remain ], ptype, p); + } // for + } // if + + +// if((remain = (DCL_ELEM (type) - strlen (SPEC_CVAL (val->etype).v_char) - 1)) > 0) { +// } + return 1; + } else return 0; + } else { + for(remain=0; remainnext) && ilist) { + if (!IS_LITERAL(list2val(ilist)->etype)) { + werror (W_INIT_WRONG); + return; + } + + if(pic16_printIvalChar (sym, type, + (ilist->type == INIT_DEEP ? ilist->init.deep : ilist), + SPEC_CVAL (sym->etype).v_char, ptype, p)) + return; + } + /* not the special case */ + if (ilist && ilist->type != INIT_DEEP) + { + werror (E_INIT_STRUCT, sym->name); + return; + } + + iloop = (ilist ? ilist->init.deep : NULL); + lcnt = DCL_ELEM (type); + + for (;;) + { + size++; + pic16_printIval (sym, type->next, iloop, ptype, p); + iloop = (iloop ? iloop->next : NULL); + + + /* if not array limits given & we */ + /* are out of initialisers then */ + if (!DCL_ELEM (type) && !iloop) + break; + + /* no of elements given and we */ + /* have generated for all of them */ + if (!--lcnt) { + /* if initializers left */ + if (iloop) { + werror (W_EXCESS_INITIALIZERS, "array", sym->name, sym->lineDef); + } + break; + } + } + +#if 0 + /* This causes bug #1843745. */ + /* if we have not been given a size */ + if (!DCL_ELEM (type)) + DCL_ELEM (type) = size; +#endif + + return; +} + +/*-----------------------------------------------------------------*/ +/* pic16_printIvalBitFields - generate initializer for bitfields */ +/*-----------------------------------------------------------------*/ +static void +pic16_printIvalBitFields (symbol **sym, initList **ilist, char ptype, void *p) +{ + symbol *lsym = *sym; + initList *lilist = *ilist; + unsigned long ival = 0; + int size = 0; + unsigned long i; + + +#if DEBUG_PRINTIVAL + fprintf(stderr, "%s\n",__FUNCTION__); +#endif + + + while (lsym) + { + if (0 == SPEC_BLEN (lsym->etype)) + { + /* bit-field structure member with a width of 0 */ + lsym = lsym->next; + break; + } + else if (!SPEC_BUNNAMED (lsym->etype)) + { + /* not an unnamed bit-field structure member */ + value *val = list2val (lilist); + int bit_length = SPEC_BLEN (lsym->etype); + + if (size) + { + if (bit_length > 8) + size += (bit_length + 7) / 8; + } + else + size = (bit_length + 7) / 8; + + ival |= (ulFromVal (val) & ((1ul << bit_length) - 1ul)) << SPEC_BSTR (lsym->etype); + lilist = (lilist ? lilist->next : NULL); + } + lsym = lsym->next; + } + + for (i = 0; i < size; i++) + pic16_emitDB (BYTE_IN_LONG (ival, i), ptype, p); + + *sym = lsym; + *ilist = lilist; +} + + +/*-----------------------------------------------------------------*/ +/* printIvalStruct - generates initial value for structures */ +/*-----------------------------------------------------------------*/ +static void +pic16_printIvalStruct (symbol * sym, sym_link * type, + initList * ilist, char ptype, void *p) +{ + symbol *sflds; + initList *iloop = NULL; + + +#if DEBUG_PRINTIVAL + fprintf(stderr, "%s\n",__FUNCTION__); +#endif + + sflds = SPEC_STRUCT (type)->fields; + + if (ilist) + { + if (ilist->type != INIT_DEEP) + { + werrorfl (sym->fileDef, sym->lineDef, E_INIT_STRUCT, sym->name); + return; + } + + iloop = ilist->init.deep; + } + + while (sflds) + { +// fprintf(stderr, "%s:%d sflds: %p\tiloop = %p\n", __FILE__, __LINE__, sflds, iloop); + if (IS_BITFIELD (sflds->type)) + { + pic16_printIvalBitFields (&sflds, &iloop, ptype, p); + } + else + { + pic16_printIval (sym, sflds->type, iloop, ptype, p); + sflds = sflds->next; + iloop = iloop ? iloop->next : NULL; + } + } + if (iloop) + werrorfl (sym->fileDef, sym->lineDef, W_EXCESS_INITIALIZERS, "struct", sym->name); +} + +/*-----------------------------------------------------------------*/ +/* printIvalUnion - generates initial value for unions */ +/*-----------------------------------------------------------------*/ +static void +pic16_printIvalUnion (symbol * sym, sym_link * type, + initList * ilist, char ptype, void *p) +{ + //symbol *sflds; + initList *iloop = NULL; + int size; + symbol *sflds = NULL; + +#if DEBUG_PRINTIVAL + fprintf(stderr, "%s\n",__FUNCTION__); +#endif + + assert (type); + + sflds = SPEC_STRUCT (type)->fields; + + if (ilist) { + if (ilist->type != INIT_DEEP) { + werrorfl (sym->fileDef, sym->lineDef, E_INIT_STRUCT, sym->name); + return; + } + + iloop = ilist->init.deep; + } + + size = SPEC_STRUCT(type)->size; + sflds = SPEC_STRUCT(type)->fields; + pic16_printIval (sym, sflds->type, iloop, ptype, p); + + /* if the first field is not the longest, fill with 0s */ + while (size > getSize (sflds->type)) { + pic16_emitDB(0, ptype, p); + size--; + } // while +} + +static int +pic16_isUnion( symbol *sym, sym_link *type ) +{ + if (type && SPEC_STRUCT(type)->type == UNION) return 1; + return 0; +} + +/*--------------------------------------------------------------------------*/ +/* pic16_printIvalCharPtr - generates initial values for character pointers */ +/*--------------------------------------------------------------------------*/ +static int +pic16_printIvalCharPtr (symbol * sym, sym_link * type, value * val, char ptype, void *p) +{ + int size = 0; + int i; + + /* PENDING: this is _very_ mcs51 specific, including a magic + number... + It's also endin specific. + + VR - Attempting to port this function to pic16 port - 8-Jun-2004 + */ + + +#if DEBUG_PRINTIVAL + fprintf(stderr, "%s\n",__FUNCTION__); +#endif + + size = getSize (type); + + if (val->name && strlen (val->name)) + { + if (size == 1) /* This appears to be Z80 specific?? */ + { + pic16_emitDS(val->name, ptype, p); + } + else if (size == 2) + { + pic16_printPointerType (val->name, ptype, p); + } + else if (size == 3) + { + int type; + type = PTR_TYPE (SPEC_OCLS (val->etype)); + if (val->sym && val->sym->isstrlit) { + // this is a literal string + type = CPOINTER; + } + pic16_printGPointerType(val->name, type, ptype, p); + } + else + { + fprintf (stderr, "*** internal error: unknown size in " + "printIvalCharPtr.\n"); + assert(0); + } + } + else + { + // these are literals assigned to pointers + for (i = 0; i < size; i++) + { + pic16_emitDB(pic16aopLiteral(val, i), ptype, p); + } // for + } + + if (val->sym && val->sym->isstrlit) { // && !isinSet(statsg->syms, val->sym)) { + if(ptype == 'p' && !isinSet(statsg->syms, val->sym))addSet (&statsg->syms, val->sym); + else if(ptype == 'f' /*&& !isinSet(rel_idataSymSet, val->sym)*/)addSet(&rel_idataSymSet, val->sym); + } + + return 1; +} + +/*-----------------------------------------------------------------------*/ +/* pic16_printIvalFuncPtr - generate initial value for function pointers */ +/*-----------------------------------------------------------------------*/ +static void +pic16_printIvalFuncPtr (sym_link * type, initList * ilist, char ptype, void *p) +{ + value *val; + int dLvl = 0; + + +#if DEBUG_PRINTIVAL + fprintf(stderr, "%s\n",__FUNCTION__); +#endif + + if (ilist) + val = list2val (ilist); + else + val = valCastLiteral(type, 0.0); + + if (!val) { + // an error has been thrown already + val = constCharVal (0); + } + + if (IS_LITERAL(val->etype)) { + if (0 && compareType(type, val->etype) == 0) { + werrorfl (ilist->filename, ilist->lineno, E_INCOMPAT_TYPES); + printFromToType (val->type, type); + } + pic16_printIvalCharPtr (NULL, type, val, ptype, p); + return; + } + + /* check the types */ + if ((dLvl = compareType (val->type, type->next)) <= 0) + { + pic16_emitDB(0x00, ptype, p); + return; + } + + /* now generate the name */ + if (!val->sym) { + pic16_printGPointerType (val->name, CPOINTER /*DCL_TYPE(val->type)*/, ptype, p); + } else { + pic16_printGPointerType (val->sym->rname, CPOINTER /*DCL_TYPE(val->type)*/, ptype, p); + + if(IS_FUNC(val->sym->type) && !val->sym->used && !IS_STATIC(val->sym->etype)) { + + if(!checkSym(publics, val->sym)) + if(checkAddSym(&externs, val->sym) && (ptype == 'f')) { + /* this has not been declared as extern + * so declare it as a 'late extern' just after the symbol */ + fprintf((FILE *)p, ";\tdeclare symbol as extern\n"); + fprintf((FILE *)p, "\textern\t%s\n", val->sym->rname); + fprintf((FILE *)p, ";\tcontinue variable declaration\n"); + } + } + } + + return; +} + + +/*-----------------------------------------------------------------*/ +/* pic16_printIvalPtr - generates initial value for pointers */ +/*-----------------------------------------------------------------*/ +static void +pic16_printIvalPtr (symbol * sym, sym_link * type, initList * ilist, char ptype, void *p) +{ + value *val; + int size; + int i; + +#if 0 + fprintf(stderr, "%s:%d initialising pointer: %s size: %d\n", __FILE__, __LINE__, + sym->rname, getSize(sym->type)); +#endif + + /* if deep then */ + if (ilist && (ilist->type == INIT_DEEP)) + ilist = ilist->init.deep; + + /* function pointer */ + if (IS_FUNC (type->next)) + { + pic16_printIvalFuncPtr (type, ilist, ptype, p); + return; + } + + if (!(val = pic16_initPointer (ilist, type))) + return; + + /* if character pointer */ + if (IS_CHAR (type->next)) + if (pic16_printIvalCharPtr (sym, type, val, ptype, p)) + return; + + /* check the type */ + if (compareType (type, val->type) == 0) { + werrorfl (ilist->filename, ilist->lineno, W_INIT_WRONG); + printFromToType (val->type, type); + } + + size = getSize (type); + + /* if val is literal */ + if (IS_LITERAL (val->etype)) + { + for (i = 0; i < size; i++) + { + pic16_emitDB(pic16aopLiteral(val, i), ptype, p); + } // for + return; + } + + if (size == 1) /* Z80 specific?? */ + { + pic16_emitDS(val->name, ptype, p); + } + else if (size == 2) + { + pic16_printPointerType (val->name, ptype, p); + } + else if (size == 3) + { + int itype = 0; + itype = PTR_TYPE (SPEC_OCLS (val->etype)); + pic16_printGPointerType (val->name, itype, ptype, p); + } + else + { + assert(0); + } +} + + + +/*-----------------------------------------------------------------*/ +/* pic16_printIval - generates code for initial value */ +/*-----------------------------------------------------------------*/ +void pic16_printIval (symbol * sym, sym_link * type, initList * ilist, char ptype, void *p) +{ +// sym_link *itype; + + if (!p) + return; + +#if 0 + fprintf(stderr, "%s:%d generating init for %s\n", __FILE__, __LINE__, sym->name); + fprintf(stderr, "%s: IS_STRUCT: %d IS_ARRAY: %d IS_PTR: %d IS_SPEC: %d\n", sym->name, + IS_STRUCT(type), IS_ARRAY(type), IS_PTR(type), IS_SPEC(type)); +#endif + + /* if structure then */ + if (IS_STRUCT (type)) + { + if (pic16_isUnion(sym, type)) + { + //fprintf(stderr,"%s union\n",__FUNCTION__); + pic16_printIvalUnion (sym, type, ilist, ptype, p); + } else { + //fprintf(stderr,"%s struct\n",__FUNCTION__); + pic16_printIvalStruct (sym, type, ilist, ptype, p); + } + return; + } + + /* if this is an array */ + if (IS_ARRAY (type)) + { +// fprintf(stderr,"%s array\n",__FUNCTION__); + pic16_printIvalArray (sym, type, ilist, ptype, p); + return; + } + +#if 0 + if (ilist) + { + // not an aggregate, ilist must be a node + if (ilist->type!=INIT_NODE) { + // or a 1-element list + if (ilist->init.deep->next) { + werrorfl (sym->fileDef, sym->lineDef, W_EXCESS_INITIALIZERS, "scalar", + sym->name); + } else { + ilist=ilist->init.deep; + } + } + +#if 0 + // and the type must match + itype=ilist->init.node->ftype; + + if (compareType(type, itype)==0) { + // special case for literal strings + if (IS_ARRAY (itype) && IS_CHAR (getSpec(itype)) && + // which are really code pointers + IS_PTR(type) && DCL_TYPE(type)==CPOINTER) { + // no sweat + } else { +// werrorfl (ilist->filename, ilist->lineno, E_TYPE_MISMATCH, "assignment", " "); +// printFromToType(itype, type); + } + } +#endif + } +#endif + + /* if this is a pointer */ + if (IS_PTR (type)) + { +// fprintf(stderr,"%s pointer\n",__FUNCTION__); + pic16_printIvalPtr (sym, type, ilist, ptype, p); + return; + } + + + /* if type is SPECIFIER */ + if (IS_SPEC (type)) + { +// fprintf(stderr,"%s spec\n",__FUNCTION__); + pic16_printIvalType (sym, type, ilist, ptype, p); + return; + } +} + +static int +PIC16_IS_CONFIG_ADDRESS(int address) +{ + return ((address >= pic16->cwInfo.confAddrStart && address <= pic16->cwInfo.confAddrEnd)); +} + +static int +PIC16_IS_IDLOC_ADDRESS(int address) +{ + return ((address >= pic16->idInfo.idAddrStart && address <= pic16->idInfo.idAddrEnd)); +} + +/*-----------------------------------------------------------------*/ +/* emitStaticSeg - emitcode for the static segment */ +/*-----------------------------------------------------------------*/ +static void +pic16emitStaticSeg (memmap * map) +{ + symbol *sym; + static int didcode = 0; + + //fprintf(stderr, "%s\n",__FUNCTION__); + + pic16_initDB (); + + /* for all variables in this segment do */ + for (sym = setFirstItem (map->syms); sym; sym = setNextItem (map->syms)) + { + +#if 0 + fprintf (stderr, "%s\t%s: sym: %s\tused: %d\tSPEC_ABSA: %d\tSPEC_AGGREGATE: %d\tCODE: %d\n\ +CODESPACE: %d\tCONST: %d\tPTRCONST: %d\tSPEC_CONST: %d\n", __FUNCTION__, map->sname, sym->name, sym->used, SPEC_ABSA (sym->etype), IS_AGGREGATE (sym->type), IS_CODE (sym->etype), IN_CODESPACE (SPEC_OCLS (sym->etype)), IS_CONSTANT (sym->etype), IS_PTR_CONST (sym->etype), SPEC_CONST (sym->etype)); + printTypeChain (sym->type, stderr); + fprintf (stderr, "\n"); +#endif + + if (SPEC_ABSA (sym->etype) && PIC16_IS_CONFIG_ADDRESS (SPEC_ADDR (sym->etype))) + { + pic16_assignConfigWordValue (SPEC_ADDR (sym->etype), (int) ulFromVal (list2val (sym->ival))); + + continue; + } + + if (SPEC_ABSA (sym->etype) && PIC16_IS_IDLOC_ADDRESS (SPEC_ADDR (sym->etype))) + { + pic16_assignIdByteValue (SPEC_ADDR (sym->etype), (char) ulFromVal (list2val (sym->ival))); + + continue; + } + + /* if it is "extern" then do nothing */ + if (IS_EXTERN (sym->etype) /* && !SPEC_ABSA(sym->etype) */ ) + { + checkAddSym (&externs, sym); + continue; + } + + /* if it is not static add it to the public + table */ + if (!IS_STATIC (sym->etype)) + { + /* do not emit if it is a config word declaration */ + checkAddSym (&publics, sym); + } + + /* print extra debug info if required */ + if (options.debug || sym->level == 0) + { + /* NOTE to me - cdbFile may be null in which case, + * the sym name will be printed to stdout. oh well */ + debugFile->writeSymbol (sym); + } + + /* if it has an absolute address */ + if (SPEC_ABSA (sym->etype)) + { +// fprintf(stderr, "%s:%d spec_absa is true for symbol: %s\n", +// __FILE__, __LINE__, sym->name); + + if (!sym->ival && IS_ARRAY (sym->type) && IS_CHAR (sym->type->next) && SPEC_CVAL (sym->etype).v_char) + { + /* symbol has absolute address but no initial value */ + /* special case for character strings */ + +// fprintf(stderr, "%s:%d printing code string from %s\n", __FILE__, __LINE__, sym->rname); + + pic16_pCodeConstString (sym->rname, SPEC_CVAL (sym->etype).v_char, getSize (sym->type)); + } + else + { + pBlock *pb; + symbol *asym; + absSym *abSym; + pCode *pcf; + + /* symbol has absolute address and initial value */ + ++noAlloc; + resolveIvalSym (sym->ival, sym->type); + asym = newSymbol (sym->rname, 0); + abSym = Safe_calloc (1, sizeof (absSym)); + strcpy (abSym->name, sym->rname); + abSym->address = SPEC_ADDR (sym->etype); + addSet (&absSymSet, abSym); + + pb = pic16_newpCodeChain (NULL, 'A', pic16_newpCodeCharP ("; Starting pCode block for absolute Ival")); + pic16_addpBlock (pb); + + pcf = pic16_newpCodeFunction (moduleName, asym->name); + PCF (pcf)->absblock = 1; + + pic16_addpCode2pBlock (pb, pcf); + pic16_addpCode2pBlock (pb, pic16_newpCodeLabel (sym->rname, -1)); + //fprintf(stderr, "%s:%d [1] generating init for label: %s\n", __FILE__, __LINE__, sym->rname); + /* if it has an initial value */ + if (sym->ival) + { + pic16_printIval (sym, sym->type, sym->ival, 'p', (void *) pb); + pic16_flushDB ('p', (void *) pb); + } + + pic16_addpCode2pBlock (pb, pic16_newpCodeFunction (NULL, NULL)); + --noAlloc; + } + } + else + { +// fprintf(stderr, "%s:%d spec_absa is false for symbol: %s\n", +// __FILE__, __LINE__, sym->name); + + + /* if it has an initial value */ + if (sym->ival) + { + pBlock *pb; + + /* symbol doesn't have absolute address but has initial value */ + dbuf_printf (&code->oBuf, "%s:\n", sym->rname); + ++noAlloc; + resolveIvalSym (sym->ival, sym->type); + + pb = pic16_newpCodeChain (NULL, 'P', pic16_newpCodeCharP ("; Starting pCode block for Ival")); + pic16_addpBlock (pb); + + if (!didcode) + { + /* make sure that 'code' directive is emitted before, once */ + pic16_addpCode2pBlock (pb, pic16_newpCodeAsmDir ("code", NULL)); + + ++didcode; + } + + pic16_addpCode2pBlock (pb, pic16_newpCodeLabel (sym->rname, -1)); + //fprintf(stderr, "%s:%d [2] generating init for label: %s\n", __FILE__, __LINE__, sym->rname); + pic16_printIval (sym, sym->type, sym->ival, 'p', (void *) pb); + pic16_flushDB ('p', (void *) pb); + --noAlloc; + } + else + { + + /* symbol doesn't have absolute address and no initial value */ + /* allocate space */ +// fprintf(stderr, "%s:%d [3] generating init for label: %s\n", __FILE__, __LINE__, sym->rname); + dbuf_printf (&code->oBuf, "%s:\n", sym->rname); + /* special case for character strings */ + if (IS_ARRAY (sym->type) && IS_CHAR (sym->type->next) && SPEC_CVAL (sym->etype).v_char) + { + +// fprintf(stderr, "%s:%d printing code string for %s\n", __FILE__, __LINE__, sym->rname); + + pic16_pCodeConstString (sym->rname, SPEC_CVAL (sym->etype).v_char, getSize (sym->type)); + } + else + { + assert (0); + } + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* pic16_emitConfigRegs - emits the configuration registers */ +/*-----------------------------------------------------------------*/ +void pic16_emitConfigRegs(FILE *of) +{ + int i; + + for(i=0;i<=(pic16->cwInfo.confAddrEnd-pic16->cwInfo.confAddrStart);i++) + if(pic16->cwInfo.crInfo[i].emit) //mask != -1) + fprintf (of, "\t__config 0x%x, 0x%hhx\n", + pic16->cwInfo.confAddrStart+i, + pic16->cwInfo.crInfo[i].value); +} + +void pic16_emitIDRegs(FILE *of) +{ + int i; + + for(i=0;i<=(pic16->idInfo.idAddrEnd-pic16->idInfo.idAddrStart);i++) + if(pic16->idInfo.irInfo[i].emit) + fprintf (of, "\t__idlocs 0x%06x, 0x%hhx\n", + pic16->idInfo.idAddrStart+i, + pic16->idInfo.irInfo[i].value); +} + + +static void +pic16emitMaps () +{ + /* no special considerations for the following + data, idata & bit & xdata */ + pic16emitRegularMap (data, TRUE, TRUE); + pic16emitRegularMap (idata, TRUE, TRUE); + pic16emitRegularMap (bit, TRUE, FALSE); + pic16emitRegularMap (xdata, TRUE, TRUE); + pic16emitRegularMap (sfr, FALSE, FALSE); + pic16emitRegularMap (sfrbit, FALSE, FALSE); + pic16emitRegularMap (code, TRUE, FALSE); + pic16emitStaticSeg (statsg); + pic16emitStaticSeg (c_abs); +} + +/*-----------------------------------------------------------------*/ +/* createInterruptVect - creates the interrupt vector */ +/*-----------------------------------------------------------------*/ +static void +pic16createInterruptVect (struct dbuf_s * vBuf) +{ + /* if the main is only a prototype ie. no body then do nothing */ +#if 0 + if (!IFFUNC_HASBODY(mainf->type)) { + /* if ! compile only then main function should be present */ + if (!options.cc_only) + werror (E_NO_MAIN); + return; + } +#endif +#if 0 + if((!pic16_options.omit_ivt) || (pic16_options.omit_ivt && pic16_options.leave_reset)) { + dbuf_printf (vBuf, ";\t.area\t%s\n", CODE_NAME); + dbuf_printf (vBuf, ".intvecs\tcode\t0x%06x\n", pic16_options.ivt_loc); + + /* this is an overkill since WE are the port, + * and we know if we have a genIVT function! */ + if(port->genIVT) { + port->genIVT(vFile, interrupts, maxInterrupts); + } + } +#endif + +} + + +/*-----------------------------------------------------------------*/ +/* pic16initialComments - puts in some initial comments */ +/*-----------------------------------------------------------------*/ +static void +pic16initialComments (FILE * afile) +{ + initialComments (afile); + fprintf (afile, "; PIC16 port for the Microchip 16-bit core micros\n"); + if (pic16_options.xinst) { + fprintf (afile, "; * Extended Instruction Set\n"); + } // if + + if (pic16_mplab_comp) { + fprintf(afile, "; * MPLAB/MPASM/MPASMWIN/MPLINK compatibility mode enabled\n"); + } // if + fprintf (afile, "%s", iComments2); + + if (options.debug) { + fprintf (afile, "\n\t.ident \"SDCC version %s #%s [pic16 port]%s\"\n", + SDCC_VERSION_STR, getBuildNumber(), (!pic16_options.xinst?"":" {extended}") ); + } // if +} + +int +pic16_stringInSet(const char *str, set **world, int autoAdd) +{ + char *s; + + if (!str) return 1; + assert(world); + + for (s = setFirstItem(*world); s; s = setNextItem(*world)) + { + /* found in set */ + if (0 == strcmp(s, str)) return 1; + } + + /* not found */ + if (autoAdd) addSet(world, Safe_strdup(str)); + return 0; +} + +static int +pic16_emitSymbolIfNew(FILE *file, const char *fmt, const char *sym, int checkLocals) +{ + static set *emitted = NULL; + + if (!pic16_stringInSet(sym, &emitted, 1)) { + /* sym was not in emittedSymbols */ + if (!checkLocals || !pic16_stringInSet(sym, &pic16_localFunctions, 0)) { + /* sym is not a locally defined function---avoid bug #1443651 */ + fprintf( file, fmt, sym ); + return 0; + } + } + return 1; +} + +/*-----------------------------------------------------------------*/ +/* printPublics - generates global declarations for publics */ +/*-----------------------------------------------------------------*/ +static void +pic16printPublics (FILE *afile) +{ + symbol *sym; + + fprintf (afile, "\n%s", iComments2); + fprintf (afile, "; public variables in this module\n"); + fprintf (afile, "%s", iComments2); + + for(sym = setFirstItem (publics); sym; sym = setNextItem (publics)) + /* sanity check */ + if(!IS_STATIC(sym->etype)) + pic16_emitSymbolIfNew(afile, "\tglobal %s\n", sym->rname, 0); +} + +/*-----------------------------------------------------------------*/ +/* printExterns - generates extern declarations for externs */ +/*-----------------------------------------------------------------*/ +static void +pic16_printExterns(FILE *afile) +{ + symbol *sym; + + /* print nothing if no externs to declare */ + if(!elementsInSet(externs) && !elementsInSet(pic16_builtin_functions)) + return; + + fprintf(afile, "\n%s", iComments2); + fprintf(afile, "; extern variables in this module\n"); + fprintf(afile, "%s", iComments2); + + for(sym = setFirstItem(externs); sym; sym = setNextItem(externs)) + pic16_emitSymbolIfNew(afile, "\textern %s\n", sym->rname, 1); + + for(sym = setFirstItem(pic16_builtin_functions); sym; sym = setNextItem(pic16_builtin_functions)) + pic16_emitSymbolIfNew(afile, "\textern _%s\n", sym->name, 1); +} + +/*-----------------------------------------------------------------*/ +/* emitOverlay - will emit code for the overlay stuff */ +/*-----------------------------------------------------------------*/ +static void +pic16emitOverlay (struct dbuf_s *aBuf) +{ + set *ovrset; + + if (!elementsInSet (ovrSetSets)) + dbuf_printf (aBuf, ";\t.area\t%s\n", port->mem.overlay_name); + + /* for each of the sets in the overlay segment do */ + for (ovrset = setFirstItem (ovrSetSets); ovrset; + ovrset = setNextItem (ovrSetSets)) + { + + symbol *sym; + + if (elementsInSet (ovrset)) + { + /* this dummy area is used to fool the assembler + otherwise the assembler will append each of these + declarations into one chunk and will not overlay + sad but true */ + dbuf_printf (aBuf, ";\t.area _DUMMY\n"); + /* output the area informtion */ + dbuf_printf (aBuf, ";\t.area\t%s\n", port->mem.overlay_name); /* MOF */ + } + + for (sym = setFirstItem (ovrset); sym; + sym = setNextItem (ovrset)) + { + + /* if extern then do nothing */ + if (IS_EXTERN (sym->etype)) + continue; + + /* if allocation required check is needed + then check if the symbol really requires + allocation only for local variables */ + if (!IS_AGGREGATE (sym->type) && + !(sym->_isparm && !IS_REGPARM (sym->etype)) + && !sym->allocreq && sym->level) + continue; + + /* if global variable & not static or extern + and addPublics allowed then add it to the public set */ + if ((sym->_isparm && !IS_REGPARM (sym->etype)) + && !IS_STATIC (sym->etype)) { +// fprintf(stderr, "%s:%d %s accessed\n", __FILE__, __LINE__, __FUNCTION__); + checkAddSym(&publics, sym); +// addSetHead (&publics, sym); + } + + /* if extern then do nothing or is a function + then do nothing */ + if (IS_FUNC (sym->type)) + continue; + + + /* if is has an absolute address then generate + an equate for this no need to allocate space */ + if (SPEC_ABSA (sym->etype)) + { + + if (options.debug || sym->level == 0) + dbuf_printf (aBuf, " == 0x%04x\n", SPEC_ADDR (sym->etype)); + + dbuf_printf (aBuf, "%s\t=\t0x%04x\n", + sym->rname, + SPEC_ADDR (sym->etype)); + } + else + { + if (options.debug || sym->level == 0) + dbuf_printf (aBuf, "==.\n"); + + /* allocate space */ + dbuf_printf (aBuf, "%s:\n", sym->rname); + dbuf_printf (aBuf, "\t.ds\t0x%04x\n", (unsigned int) getSize (sym->type) & 0xffff); + } + + } + } +} + +static void +emitStatistics(FILE *asmFile) +{ + unsigned long isize, udsize, ramsize; + statistics.isize = pic16_countInstructions(); + isize = (statistics.isize >= 0) ? statistics.isize : 0; + udsize = (statistics.udsize >= 0) ? statistics.udsize : 0; + ramsize = pic16 ? pic16->RAMsize : 0x200; + ramsize -= 256; /* ignore access bank and SFRs */ + if (ramsize == 0) ramsize = 64; /* prevent division by zero (below) */ + + fprintf (asmFile, "\n\n; Statistics:\n"); + fprintf (asmFile, "; code size:\t%5ld (0x%04lx) bytes (%5.2f%%)\n; \t%5ld (0x%04lx) words\n", + isize, isize, (isize*100.0)/(128UL << 10), + isize>>1, isize>>1); + fprintf (asmFile, "; udata size:\t%5ld (0x%04lx) bytes (%5.2f%%)\n", + udsize, udsize, (udsize*100.0) / (1.0 * ramsize)); + fprintf (asmFile, "; access size:\t%5ld (0x%04lx) bytes\n", + statistics.intsize, statistics.intsize); + + fprintf (asmFile, "\n\n"); +} + + + +/*-----------------------------------------------------------------*/ +/* glue - the final glue that hold the whole thing together */ +/*-----------------------------------------------------------------*/ +void +pic16glue () +{ + FILE *asmFile; + struct dbuf_s ovrBuf; + struct dbuf_s vBuf; + + dbuf_init(&ovrBuf, 4096); + dbuf_init(&vBuf, 4096); + + mainf = newSymbol ("main", 0); + mainf->block = 0; + + mainf = findSymWithLevel(SymbolTab, mainf); + + pic16_pCodeInitRegisters(); + + if(pic16_options.no_crt && mainf && IFFUNC_HASBODY(mainf->type)) { + pBlock *pb = pic16_newpCodeChain(NULL,'X',pic16_newpCodeCharP("; Starting pCode block")); + + pic16_addpBlock(pb); + + /* entry point @ start of CSEG */ + pic16_addpCode2pBlock(pb,pic16_newpCodeLabel("__sdcc_program_startup",-1)); + + if(initsfpnt) { + pic16_addpCode2pBlock(pb, pic16_newpCode(POC_LFSR, + pic16_popGetLit2(1, pic16_newpCodeOpRegFromStr("_stack_end")))); + pic16_addpCode2pBlock(pb, pic16_newpCode(POC_LFSR, + pic16_popGetLit2(2, pic16_newpCodeOpRegFromStr("_stack_end")))); + } + + /* put in the call to main */ + pic16_addpCode2pBlock(pb,pic16_newpCode(POC_CALL,pic16_newpCodeOp("_main",PO_STR))); + + if (options.mainreturn) { + pic16_addpCode2pBlock(pb,pic16_newpCodeCharP(";\treturn from main will return to caller\n")); + pic16_addpCode2pBlock(pb,pic16_newpCode(POC_RETURN,NULL)); + } else { + pic16_addpCode2pBlock(pb,pic16_newpCodeCharP(";\treturn from main will lock up\n")); + pic16_addpCode2pBlock(pb,pic16_newpCode(POC_GOTO,pic16_newpCodeOp("$",PO_STR))); + } + } + + /* At this point we've got all the code in the form of pCode structures */ + /* Now it needs to be rearranged into the order it should be placed in the */ + /* code space */ + + pic16_movepBlock2Head('P'); // Last + pic16_movepBlock2Head(code->dbName); + pic16_movepBlock2Head('X'); + pic16_movepBlock2Head(statsg->dbName); // First + + /* print the global struct definitions */ + + /* PENDING: this isnt the best place but it will do */ + if (port->general.glue_up_main) { + /* create the interrupt vector table */ + pic16createInterruptVect (&vBuf); + } + + /* emit code for the all the variables declared */ + pic16emitMaps (); + + /* do the overlay segments */ + pic16emitOverlay(&ovrBuf); + pic16_AnalyzepCode('*'); + +#if 1 + if(pic16_options.dumpcalltree) { + FILE *cFile; + + sprintf(buffer, "%s", dstFileName); + strcat(buffer, ".calltree"); + cFile = fopen(buffer, "w"); + pic16_printCallTree( cFile ); + fclose(cFile); + } +#endif + + pic16_InlinepCode(); + pic16_AnalyzepCode('*'); + + + if(pic16_debug_verbose) + pic16_pcode_test(); + + /* now put it all together into the assembler file */ + /* create the assembler file name */ + if((noAssemble || options.c1mode) && fullDstFileName) { + sprintf (buffer, "%s", fullDstFileName); + } else { + sprintf (buffer, "%s", dstFileName); + strcat (buffer, ".asm"); + } + + if(!(asmFile = fopen (buffer, "w"))) { + werror (E_FILE_OPEN_ERR, buffer); + exit (1); + } + + /* initial comments */ + pic16initialComments (asmFile); + + /* print module name */ + if(options.debug) + fprintf(asmFile, "\t.file\t\"%s\"\n", fullSrcFileName); + + /* Let the port generate any global directives, etc. */ + if(port->genAssemblerPreamble) { + port->genAssemblerPreamble(asmFile); + } + + /* Put all variables into a cblock */ + pic16_AnalyzeBanking(); + +#if 0 + if(pic16_options.opt_flags & OF_LR_SUPPORT) { + pic16_OptimizeLocalRegs(); + } +#endif + + /* remove redundant BANKSELs -- added by RN 2005-01-17 */ + if(pic16_options.opt_banksel > 1) { + pic16_OptimizeBanksel(); + } + + /* turn GOTOs into BRAs -- added by RN 2004-11-16 */ + if(!(pic16_options.opt_flags & OF_NO_OPTIMIZE_GOTO)) { + pic16_OptimizeJumps(); + } + + /* print the global variables in this module */ + pic16printPublics (asmFile); + + /* print the extern variables to this module */ + pic16_printExterns(asmFile); + + pic16_writeUsedRegs(asmFile); + +#if 0 + /* no xdata in pic */ + /* if external stack then reserve space of it */ + if(mainf && IFFUNC_HASBODY(mainf->type) && options.useXstack ) { + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; external stack \n"); + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile,";\t.area XSEG (XDATA)\n"); /* MOF */ + fprintf (asmFile,";\t.ds 256\n"); + } +#endif + +#if 0 + /* no xdata in pic */ + /* copy xtern ram data */ + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; external ram data\n"); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&xdata->oBuf, asmFile); +#endif + +#if 0 + /* copy the bit segment */ + fprintf (asmFile, "%s", iComments2); + fprintf (asmFile, "; bit data\n"); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&bit->oBuf, asmFile); +#endif + + /* copy the interrupt vector table */ + if(mainf && IFFUNC_HASBODY(mainf->type)) { + fprintf (asmFile, "\n%s", iComments2); + fprintf (asmFile, "; interrupt vector \n"); + fprintf (asmFile, "%s", iComments2); + dbuf_write_and_destroy (&vBuf, asmFile); + } + + /* copy global & static initialisations */ + fprintf (asmFile, "\n%s", iComments2); + fprintf (asmFile, "; global & static initialisations\n"); + fprintf (asmFile, "%s", iComments2); + + if(pic16_debug_verbose) + fprintf(asmFile, "; A code from now on!\n"); + + pic16_copypCode(asmFile, 'A'); + + if(pic16_options.no_crt) { + if(mainf && IFFUNC_HASBODY(mainf->type)) { + fprintf(asmFile, "\tcode\n"); + fprintf(asmFile,"__sdcc_gsinit_startup:\n"); + } + } + +// dbuf_write_and_destroy (&code->oBuf, stderr); + + fprintf(asmFile, "; I code from now on!\n"); + pic16_copypCode(asmFile, 'I'); + + if(pic16_debug_verbose) + fprintf(asmFile, "; dbName from now on!\n"); + + pic16_copypCode(asmFile, statsg->dbName); + + if(pic16_options.no_crt) { + if (port->general.glue_up_main && mainf && IFFUNC_HASBODY(mainf->type)) { + fprintf (asmFile,"\tgoto\t__sdcc_program_startup\n"); + } + } + + if(pic16_debug_verbose) + fprintf(asmFile, "; X code from now on!\n"); + + pic16_copypCode(asmFile, 'X'); + + if(pic16_debug_verbose) + fprintf(asmFile, "; M code from now on!\n"); + + pic16_copypCode(asmFile, 'M'); + + pic16_copypCode(asmFile, code->dbName); + + pic16_copypCode(asmFile, 'P'); + + emitStatistics(asmFile); + + fprintf (asmFile,"\tend\n"); + fclose (asmFile); +} diff --git a/src/pic16/glue.h b/src/pic16/glue.h new file mode 100644 index 0000000..3c8e047 --- /dev/null +++ b/src/pic16/glue.h @@ -0,0 +1,36 @@ +/*------------------------------------------------------------------------- + + SDCCglue.h - glues everything we have done together into one file. + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef PIC16_GLUE_H +#define PIC16_GLUE_H + +#include "SDCCset.h" + +extern set *pic16_localFunctions; + +void pic16glue (void); +unsigned int pic16aopLiteral (value *val, int offset); +int pic16_stringInSet(const char *str, set **world, int autoAdd); + +#endif diff --git a/src/pic16/graph.c b/src/pic16/graph.c new file mode 100644 index 0000000..aa26b63 --- /dev/null +++ b/src/pic16/graph.c @@ -0,0 +1,180 @@ +/*------------------------------------------------------------------------- + + graph.c - implementation of general graphs + + Written By - Raphael Neider (2005) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +-------------------------------------------------------------------------*/ + +/* $Id: graph.c 4781 2007-04-29 20:33:44Z borutr $ */ + +#include "graph.h" + +/* === helpers ====================================================== */ + +int default_compare (void *data1, void *data2) +{ + return (data1 == data2); +} + +/* === GraphEdge ==================================================== */ + +GraphEdge *newGEdge (GraphNode *src, GraphNode *dest, unsigned int weight) { + GraphEdge *edge = (GraphEdge *)Safe_calloc (1, sizeof (GraphEdge)); + edge->src = src; + edge->node = dest; + edge->weight = weight; + return edge; +} + +GraphEdge *deleteGEdge (GraphEdge *edge) { + GraphEdge *head; + // remove edge from list + if (edge->next) edge->next->prev = edge->prev; + if (edge->prev) edge->prev->next = edge->next; + + if (edge->prev) head = edge->prev; else head = edge->next; + Safe_free (edge); + return head; +} + +/* === GraphNode ==================================================== */ + +GraphNode *newGNode (void *data, hash_t hash) { + GraphNode *node = (GraphNode*)Safe_calloc (1, sizeof (GraphNode)); + node->data = data; + node->hash = hash; + return node; +} + +GraphNode * deleteGNode (GraphNode *node) { + GraphNode *head; + + if (!node) return NULL; + + // delete all edges + while (node->edge) { + node->edge = deleteGEdge (node->edge); + } // while + + // remove node from list + if (node->next) node->next->prev = node->prev; + if (node->prev) node->prev->next = node->next; + + if (node->prev) head = node->prev; else head = node->next; + Safe_free (node); + return head; +} + +GraphEdge *addGEdge (GraphNode *from, GraphNode *to, unsigned int weight) { + GraphEdge *edge = getGEdge (from, to); + if (edge == NULL) { + edge = newGEdge (from, to, weight); + // insert edge into list + if (from->edge) from->edge->prev = edge; + edge->next = from->edge; + from->edge = edge; + } else + edge->weight += weight; + + assert (edge->src == from && edge->node == to); + return edge; +} + +void addGEdge2 (GraphNode *from, GraphNode *to, unsigned int weight, unsigned int weight_back) { + addGEdge (from, to, weight); + addGEdge (to, from, weight_back); +} + +void remGEdge (GraphNode *from, GraphNode *to) { + GraphEdge *curr = from->edge; + while (curr && curr->node != to) curr = curr->next; + + if (!curr) return; + + if (from->edge == curr) + from->edge = deleteGEdge (curr); + else + deleteGEdge (curr); +} + +GraphEdge *getGEdge (GraphNode *from, GraphNode *to) { + GraphEdge *curr = from->edge; + while (curr && curr->node != to) { + assert (curr->src == from); + curr = curr->next; + } + return curr; +} + +/* === Graph ======================================================== */ + +Graph *newGraph (Graph_compareData *compare) { + Graph *graph = (Graph*) Safe_calloc (1, sizeof (Graph)); + graph->compare = compare; + if (!compare) graph->compare = default_compare; + + return graph; +} + +void deleteGraph (Graph *graph) { + // remove all nodes + while (graph->node) { + graph->node = deleteGNode (graph->node); + } // while + + Safe_free (graph); +} + +GraphNode *addGNode (Graph *graph, void *data, hash_t hash) { + GraphNode *node = newGNode (data, hash); + if (graph->node) graph->node->prev = node; + node->next = graph->node; + graph->node = node; + return node; +} + +void remGNode (Graph *graph, void *data, hash_t hash) { + GraphNode *curr = graph->node; + while (curr && ((curr->hash != hash) || (!graph->compare(curr->data, data)))) { + curr = curr->next; + } // while + + if (!curr) return; + + if (graph->node == curr) + graph->node = deleteGNode (curr); + else + deleteGNode (curr); +} + +GraphNode *getGNode (Graph *graph, void *data, hash_t hash) { + GraphNode *curr = graph->node; + while (curr && ((curr->hash != hash) || (!graph->compare(curr->data, data)))) { + curr = curr->next; + } // while + + return curr; +} + +GraphNode *getOrAddGNode (Graph *graph, void *data, hash_t hash) { + GraphNode *curr = getGNode (graph, data, hash); + if (!curr) + curr = addGNode (graph, data, hash); + + assert (curr != NULL); + return curr; +} diff --git a/src/pic16/graph.h b/src/pic16/graph.h new file mode 100644 index 0000000..73ccede --- /dev/null +++ b/src/pic16/graph.h @@ -0,0 +1,113 @@ +/*------------------------------------------------------------------------- + + graph.h - header file for graph.c + + Written By - Raphael Neider (2005) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +-------------------------------------------------------------------------*/ + +/* $Id: graph.h 4781 2007-04-29 20:33:44Z borutr $ */ + +#ifndef __GRAPH_H__ +#define __GRAPH_H__ + +#include "../common.h" + +typedef unsigned int hash_t; + +struct GraphNode; + +typedef struct GraphEdge { + struct GraphNode *src; // starting node of this edge + struct GraphNode *node; // other end of this edge + unsigned int weight; // weight assigned to this edge + struct GraphEdge *prev; // link to previous edge + struct GraphEdge *next; // link to next edge +} GraphEdge; + +typedef struct GraphNode { + void *data; // data stored in this node + hash_t hash; // hash value for "data" + + GraphEdge *edge; // first edge leaving this node + struct GraphNode *prev; // link to previous node + struct GraphNode *next; // link to next edge +} GraphNode; + +// compare function, returns 0 for different items and 1 for equal items +typedef int Graph_compareData(void *item1, void *item2); + +typedef struct { + GraphNode *node; // first node in this graph + Graph_compareData *compare; // function used to compare two data items +} Graph; + +/* Create a new edge from src to dest. + * Returns a pointer to the new edge. */ +GraphEdge *newGEdge (GraphNode *src, GraphNode *dest, unsigned int weight); + +/* Delete an edge and remove it from the containing list. + * Returns a pointer to the previous edge or (if there is NULL) to its successor. */ +GraphEdge *deleteGEdge (GraphEdge *edge); + + + +/* Create a new node. */ +GraphNode *newGNode (void *data, hash_t hash); + +/* Delete a node and all its edges. this also removes the node + * from its containing list. + * Returns the previous node in the list or (if there is NULL) + * its successor. */ +GraphNode *deleteGNode (GraphNode *node); + +/* Adds an edge with the given weight. If the edge already exists, + * its weight its increased instead! */ +GraphEdge *addGEdge (GraphNode *from, GraphNode *to, unsigned int weight); + +/* Adds the edges (from,to) and (to,from) with the specified weights. */ +void addGEdge2 (GraphNode *from, GraphNode *to, unsigned int weight, unsigned int weight_back); + +/* Remove an edge from the node. This deletes the edge and updates the + * list of edges attached to the "from" node. */ +void remGEdge (GraphNode *from, GraphNode *to); + +/* Returns the edge (from,to) or NULL if no such edge exists. */ +GraphEdge *getGEdge (GraphNode *from, GraphNode *to); + + + +/* Create a new graph which uses the given compare function to test + * its nodes' data for equality. */ +Graph *newGraph (Graph_compareData *compare); + +/* Delete a graph, all its contained nodes and their edges. */ +void deleteGraph (Graph *graph); + +/* Add a node to the graph. */ +GraphNode *addGNode (Graph *graph, void *data, hash_t hash); + +/* Remove a node from the graph. This also deletes the node and all + * its associated (outbound) edges. */ +void remGNode (Graph *graph, void *data, hash_t hash); + +/* Returns the specified node or NULL if no such node exists. */ +GraphNode *getGNode (Graph *graph, void *data, hash_t hash); + +/* Returns the specified node (after creating it if neccessary). */ +GraphNode *getOrAddGNode (Graph *graph, void *data, hash_t hash); + +#endif diff --git a/src/pic16/main.c b/src/pic16/main.c new file mode 100644 index 0000000..68172c6 --- /dev/null +++ b/src/pic16/main.c @@ -0,0 +1,1266 @@ +/*------------------------------------------------------------------------- + + main.c - pic16 specific general functions. + + Written by - Scott Dattalo scott@dattalo.com + Ported to PIC16 by - Martin Dubuc m.debuc@rogers.com + + Note that mlh prepended _pic16_ on the static functions. Makes + it easier to set a breakpoint using the debugger. + + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +-------------------------------------------------------------------------*/ + +#include "common.h" +#include "main.h" +#include "ralloc.h" +#include "device.h" +#include "SDCCutil.h" +#include "glue.h" +#include "pcode.h" +#include "SDCCargs.h" +#include "dbuf_string.h" + + +static char _defaultRules[] = +{ +#include "peeph.rul" +}; + +/* list of key words used by pic16 */ +static char *_pic16_keywords[] = +{ + "at", + "code", + "critical", + "register", + "data", + "far", + "interrupt", + "near", + //"pdata", + "reentrant", + "sfr", + "sfr16", + "using", + "_data", + "_code", + "_generic", + "_near", + //"_pdata", + "_naked", + "shadowregs", + "wparam", + "prodlp", + "prodhp", + "fsr0lp", + "fixed16x16", + +// "bit", +// "idata", +// "sbit", +// "xdata", +// "_xdata", +// "_idata", + NULL +}; + + +pic16_sectioninfo_t pic16_sectioninfo; + +extern char *pic16_processor_base_name(void); + +void pic16_pCodeInitRegisters(void); + +void pic16_assignRegisters (ebbIndex *); + +static int regParmFlg = 0; /* determine if we can register a parameter */ + +pic16_options_t pic16_options; + +extern set *includeDirsSet; +extern set *dataDirsSet; +extern set *libFilesSet; + +/* Also defined in gen.h, but the #include is commented out */ +/* for an unknowned reason. - EEP */ +void pic16_emitDebuggerSymbol (char *); + +extern void pic16_emitConfigRegs(FILE *of); +extern void pic16_emitIDRegs(FILE *of); + + + +static void +_pic16_init (void) +{ + asm_addTree (&asm_asxxxx_mapping); + pic16_pCodeInitRegisters(); + maxInterrupts = 2; +} + +static void +_pic16_reset_regparm (void) +{ + regParmFlg = 0; +} + +static int +_pic16_regparm (sym_link * l, bool reentrant) +{ + /* force all parameters via SEND/RECEIVE */ + if(0 /*pic16_options.ip_stack*/) { + /* for this processor it is simple + * can pass only the first parameter in a register */ + if(regParmFlg)return 0; + regParmFlg++; + return 1; //regParmFlg; + } else { + /* otherwise pass all arguments in registers via SEND/RECEIVE */ + regParmFlg++;// = 1; + return regParmFlg; + } +} + + +int initsfpnt=0; /* set to 1 if source provides a pragma for stack + * so glue() later emits code to initialize stack/frame pointers */ +set *absSymSet; + +set *sectNames=NULL; /* list of section listed in pragma directives */ +set *sectSyms=NULL; /* list of symbols set in a specific section */ +set *wparamList=NULL; + +#if 0 +/* This is an experimental code for #pragma inline + and is temporarily disabled for 2.5.0 release */ +set *asmInlineMap=NULL; +#endif /* 0 */ + +struct { + unsigned ignore: 1; + unsigned want_libc: 1; + unsigned want_libm: 1; + unsigned want_libio: 1; + unsigned want_libdebug: 1; +} libflags = { 0, 0, 0, 0, 0 }; + + +enum { + P_STACK = 1, + P_CODE, + P_UDATA, + P_LIBRARY +}; + +static int +do_pragma(int id, const char *name, const char *cp) +{ + struct pragma_token_s token; + int err = 0; + int processed = 1; + + init_pragma_token(&token); + + switch (id) + { + /* #pragma stack [stack-position] [stack-len] */ + case P_STACK: + { + unsigned int stackPos, stackLen; + regs *reg; + symbol *sym; + + cp = get_pragma_token(cp, &token); + if (TOKEN_INT != token.type) + { + err = 1; + break; + } + stackPos = token.val.int_val; + + cp = get_pragma_token(cp, &token); + if (TOKEN_INT != token.type) + { + err = 1; + break; + } + stackLen = token.val.int_val; + + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + if (stackLen < 1) { + stackLen = 64; + fprintf(stderr, "%s:%d: warning: setting stack to default size %d (0x%04x)\n", + filename, lineno, stackLen, stackLen); + } + + /* check sanity of stack */ + if ((stackPos >> 8) != ((stackPos + stackLen - 1) >> 8)) { + fprintf (stderr, "%s:%u: warning: stack [0x%03X,0x%03X] crosses memory bank boundaries (not fully tested)\n", + filename, lineno, stackPos, stackPos + stackLen - 1); + } + + if (pic16) { + if (stackPos < pic16->acsSplitOfs) { + fprintf (stderr, "%s:%u: warning: stack [0x%03X, 0x%03X] intersects with the access bank [0x000,0x%03x] -- this is highly discouraged!\n", + filename, lineno, stackPos, stackPos + stackLen - 1, pic16->acsSplitOfs); + } + + if (stackPos+stackLen > 0xF00 + pic16->acsSplitOfs) { + fprintf (stderr, "%s:%u: warning: stack [0x%03X,0x%03X] intersects with special function registers [0x%03X,0xFFF]-- this is highly discouraged!\n", + filename, lineno, stackPos, stackPos + stackLen - 1, 0xF00 + pic16->acsSplitOfs); + } + + if (stackPos+stackLen > pic16->RAMsize) { + fprintf (stderr, "%s:%u: error: stack [0x%03X,0x%03X] is placed outside available memory [0x000,0x%03X]!\n", + filename, lineno, stackPos, stackPos + stackLen - 1, pic16->RAMsize-1); + err = 1; + break; + } + } + + reg = newReg(REG_SFR, PO_SFR_REGISTER, stackPos, "_stack", stackLen-1, 0, NULL); + addSet(&pic16_fix_udata, reg); + + reg = newReg(REG_SFR, PO_SFR_REGISTER, stackPos + stackLen-1, "_stack_end", 1, 0, NULL); + addSet(&pic16_fix_udata, reg); + + sym = newSymbol("stack", 0); + sprintf(sym->rname, "_%s", sym->name); + addSet(&publics, sym); + + sym = newSymbol("stack_end", 0); + sprintf(sym->rname, "_%s", sym->name); + addSet(&publics, sym); + + initsfpnt = 1; // force glue() to initialize stack/frame pointers */ + } + break; + + /* #pragma code [symbol] [location] */ + case P_CODE: + { + absSym *absS; + + cp = get_pragma_token(cp, &token); + if (TOKEN_STR != token.type) + goto code_err; + + absS = Safe_calloc(1, sizeof(absSym)); + sprintf(absS->name, "_%s", get_pragma_string(&token)); + + cp = get_pragma_token(cp, &token); + if (TOKEN_INT != token.type) + { + code_err: + //fprintf (stderr, "%s:%d: #pragma code [symbol] [location] -- symbol or location missing\n", filename, lineno); + err = 1; + break; + } + absS->address = token.val.int_val; + + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + if ((absS->address % 2) != 0) { + absS->address--; + fprintf(stderr, "%s:%d: warning: code memory locations should be word aligned, will locate to 0x%06x instead\n", + filename, lineno, absS->address); + } + + addSet(&absSymSet, absS); +// fprintf(stderr, "%s:%d symbol %s will be placed in location 0x%06x in code memory\n", +// __FILE__, __LINE__, symname, absS->address); + } + break; + + /* #pragma udata [section-name] [symbol] */ + case P_UDATA: + { + char *sectname; + const char *symname; + symbol *nsym; + sectSym *ssym; + sectName *snam; + int found = 0; + + cp = get_pragma_token(cp, &token); + if (TOKEN_STR == token.type) + sectname = Safe_strdup(get_pragma_string(&token)); + else + { + err = 1; + break; + } + + cp = get_pragma_token(cp, &token); + if (TOKEN_STR == token.type) + symname = get_pragma_string(&token); + else + { + //fprintf (stderr, "%s:%d: #pragma udata [section-name] [symbol] -- section-name or symbol missing!\n", filename, lineno); + err = 1; + symname = NULL; + } + + while (symname) + { + ssym = Safe_calloc(1, sizeof(sectSym)); + ssym->name = Safe_calloc(1, strlen(symname) + 2); + sprintf(ssym->name, "%s%s", port->fun_prefix, symname); + ssym->reg = NULL; + + addSet(§Syms, ssym); + + nsym = newSymbol((char *)symname, 0); + strcpy(nsym->rname, ssym->name); + +#if 0 + checkAddSym(&publics, nsym); +#endif + + found = 0; + for (snam = setFirstItem(sectNames);snam;snam=setNextItem(sectNames)) + { + if (!strcmp(sectname, snam->name)) + { + found=1; + break; + } + } + + if(!found) + { + snam = Safe_calloc(1, sizeof(sectName)); + snam->name = Safe_strdup(sectname); + snam->regsSet = NULL; + + addSet(§Names, snam); + } + + ssym->section = snam; + +#if 0 + fprintf(stderr, "%s:%d placing symbol %s at section %s (%p)\n", __FILE__, __LINE__, + ssym->name, snam->name, snam); +#endif + + cp = get_pragma_token(cp, &token); + if (TOKEN_STR == token.type) + symname = get_pragma_string(&token); + else if (TOKEN_EOL == token.type) + symname = NULL; + else + { + err = 1; + symname = NULL; + } + } + + Safe_free(sectname); + } + break; + + /* #pragma library library_module */ + case P_LIBRARY: + { + const char *lmodule; + + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + lmodule = get_pragma_string(&token); + + /* lmodule can be: + * c link the C library + * math link the math library + * io link the IO library + * debug link the debug libary + * anything else, will link as-is */ + + if(!strcmp(lmodule, "c")) + libflags.want_libc = 1; + else if(!strcmp(lmodule, "math")) + libflags.want_libm = 1; + else if(!strcmp(lmodule, "io")) + libflags.want_libio = 1; + else if(!strcmp(lmodule, "debug")) + libflags.want_libdebug = 1; + else if(!strcmp(lmodule, "ignore")) + libflags.ignore = 1; + else + { + if(!libflags.ignore) + { + fprintf(stderr, "link library %s\n", lmodule); + addSetHead(&libFilesSet, (char *)lmodule); + } + } + } + else + { + err = 1; + break; + } + + cp = get_pragma_token(cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + } + break; + +#if 0 + /* This is an experimental code for #pragma inline + and is temporarily disabled for 2.5.0 release */ + case P_INLINE: + { + char *tmp = strtok((char *)NULL, WHITECOMMA); + + while(tmp) { + addSet(&asmInlineMap, Safe_strdup( tmp )); + tmp = strtok((char *)NULL, WHITECOMMA); + } + + { + char *s; + + for(s = setFirstItem(asmInlineMap); s ; s = setNextItem(asmInlineMap)) { + debugf("inline asm: `%s'\n", s); + } + } + } + break; +#endif /* 0 */ + + default: + processed = 0; + break; + } + + get_pragma_token(cp, &token); + + if (1 == err) + werror(W_BAD_PRAGMA_ARGUMENTS, name); + + free_pragma_token(&token); + return processed; +} + +static struct pragma_s pragma_tbl[] = { + { "stack", P_STACK, 0, do_pragma }, + { "code", P_CODE, 0, do_pragma }, + { "udata", P_UDATA, 0, do_pragma }, + { "library", P_LIBRARY, 0, do_pragma }, +/*{ "inline", P_INLINE, 0, do_pragma }, */ + { NULL, 0, 0, NULL }, + }; + +static int +_process_pragma(const char *s) +{ + return process_pragma_tbl(pragma_tbl, s); +} + +#define REP_UDATA "--preplace-udata-with=" + +#define STACK_MODEL "--pstack-model=" +#define OPT_BANKSEL "--obanksel=" + +#define ALT_ASM "--asm=" +#define ALT_LINK "--link=" + +#define IVT_LOC "--ivt-loc=" +#define NO_DEFLIBS "--nodefaultlibs" +#define MPLAB_COMPAT "--mplab-comp" + +#define USE_CRT "--use-crt=" + +#define OFMSG_LRSUPPORT "--flr-support" + +#define NO_OPTIMIZE_GOTO "--no-optimize-goto" +#define OPTIMIZE_CMP "--optimize-cmp" +#define OPTIMIZE_DF "--optimize-df" + +char *alt_asm = NULL; +char *alt_link = NULL; + +int pic16_mplab_comp = 0; +extern int pic16_debug_verbose; +extern int pic16_ralloc_debug; +extern int pic16_pcode_verbose; + +int pic16_enable_peeps = 0; + +OPTION pic16_optionsTable[]= { + /* code generation options */ + { 0, STACK_MODEL, NULL, "use stack model 'small' (default) or 'large'"}, +#if XINST + { 'y', "--extended", &pic16_options.xinst, "enable Extended Instruction Set/Literal Offset Addressing mode"}, +#endif + { 0, "--pno-banksel", &pic16_options.no_banksel, "do not generate BANKSEL assembler directives"}, + + /* optimization options */ + { 0, OPT_BANKSEL, &pic16_options.opt_banksel, "set banksel optimization level (default=0 no)", CLAT_INTEGER }, + { 0, "--denable-peeps", &pic16_enable_peeps, "explicit enable of peepholes"}, + { 0, NO_OPTIMIZE_GOTO, NULL, "do NOT use (conditional) BRA instead of GOTO"}, + { 0, OPTIMIZE_CMP, NULL, "try to optimize some compares"}, + { 0, OPTIMIZE_DF, NULL, "thoroughly analyze data flow (memory and time intensive!)"}, + + /* assembling options */ + { 0, ALT_ASM, &alt_asm, "Use alternative assembler", CLAT_STRING}, + { 0, MPLAB_COMPAT, &pic16_mplab_comp, "enable compatibility mode for MPLAB utilities (MPASM/MPLINK)"}, + + /* linking options */ + { 0, ALT_LINK, &alt_link, "Use alternative linker", CLAT_STRING }, + { 0, REP_UDATA, &pic16_sectioninfo.at_udata, "Place udata variables at another section: udata_acs, udata_ovr, udata_shr", CLAT_STRING }, + { 0, IVT_LOC, NULL, "Set address of interrupt vector table."}, + { 0, NO_DEFLIBS, &pic16_options.nodefaultlibs, "do not link default libraries when linking"}, + { 0, USE_CRT, NULL, "use run-time initialization module"}, + { 0, "--no-crt", &pic16_options.no_crt, "do not link any default run-time initialization module"}, + + /* debugging options */ + { 0, "--debug-xtra", &pic16_debug_verbose, "show more debug info in assembly output"}, + { 0, "--debug-ralloc", &pic16_ralloc_debug, "dump register allocator debug file *.d"}, + { 0, "--pcode-verbose", &pic16_pcode_verbose, "dump pcode related info"}, + { 0, "--calltree", &pic16_options.dumpcalltree, "dump call tree in .calltree file"}, + { 0, "--gstack", &pic16_options.gstack, "trace stack pointer push/pop to overflow"}, + { 0, NULL, NULL, NULL} +}; + + +#define ISOPT(str) !strncmp(argv[ *i ], str, strlen(str) ) + +static bool +_pic16_parseOptions (int *pargc, char **argv, int *i) +{ + int j=0; + char *stkmodel; + + /* TODO: allow port-specific command line options to specify + * segment names here. + */ + + /* check for arguments that have associated an integer variable */ + while(pic16_optionsTable[j].pparameter) { + if(ISOPT( pic16_optionsTable[j].longOpt )) { + (*(int *)pic16_optionsTable[j].pparameter)++; + return TRUE; + } + j++; + } + + if(ISOPT(STACK_MODEL)) { + stkmodel = getStringArg(STACK_MODEL, argv, i, *pargc); + if(!STRCASECMP(stkmodel, "small"))pic16_options.stack_model = 0; + else if(!STRCASECMP(stkmodel, "large"))pic16_options.stack_model = 1; + else { + fprintf(stderr, "Unknown stack model: %s", stkmodel); + exit(EXIT_FAILURE); + } + return TRUE; + } + + if(ISOPT(IVT_LOC)) { + pic16_options.ivt_loc = getIntArg(IVT_LOC, argv, i, *pargc); + fprintf(stderr, "%s:%d setting interrupt vector addresses 0x%x\n", __FILE__, __LINE__, pic16_options.ivt_loc); + return TRUE; + } + + if(ISOPT(USE_CRT)) { + pic16_options.no_crt = 0; + pic16_options.crt_name = Safe_strdup( getStringArg(USE_CRT, argv, i, *pargc) ); + + return TRUE; + } + +#if 0 + if(ISOPT(OFMSG_LRSUPPORT)) { + pic16_options.opt_flags |= OF_LR_SUPPORT; + return TRUE; + } +#endif + + if (ISOPT(NO_OPTIMIZE_GOTO)) { + pic16_options.opt_flags |= OF_NO_OPTIMIZE_GOTO; + return TRUE; + } + + if(ISOPT(OPTIMIZE_CMP)) { + pic16_options.opt_flags |= OF_OPTIMIZE_CMP; + return TRUE; + } + + if (ISOPT(OPTIMIZE_DF)) { + pic16_options.opt_flags |= OF_OPTIMIZE_DF; + return TRUE; + } + + + return FALSE; +} + +extern void pic16_init_pic(const char *name); + +static void _pic16_initPaths(void) +{ + set *pic16libDirsSet=NULL; + + if (!options.nostdlib) { + struct dbuf_s pic16libDir; + + dbuf_init(&pic16libDir, 128); + dbuf_makePath(&pic16libDir, LIB_DIR_SUFFIX, "pic16"); + pic16libDirsSet = appendStrSet(dataDirsSet, NULL, dbuf_c_str(&pic16libDir)); + dbuf_destroy(&pic16libDir); + mergeSets(&pic16libDirsSet, libDirsSet); + libDirsSet = pic16libDirsSet; + } + + /* now that we have the paths set up... */ + pic16_init_pic(port->processor); +} + +extern set *linkOptionsSet; +char *msprintf(hTab *pvals, const char *pformat, ...); +int my_system(const char *cmd); + +/* forward declarations */ +extern const char *pic16_linkCmd[]; +extern const char *pic16_asmCmd[]; +extern set *asmOptionsSet; + +/* custom function to link objects */ +static void _pic16_linkEdit(void) +{ + hTab *linkValues=NULL; + char lfrm[1024]; + char *lcmd; + char temp[1024]; + set *tSet=NULL; + int ret; + + /* + * link command format: + * {linker} {incdirs} {lflags} -o {outfile} {spec_ofiles} {ofiles} {libs} + * + */ + sprintf(lfrm, "{linker} {incdirs} {lflags} -w -r -o {outfile} {user_ofile} {ofiles} {spec_ofiles} {libs}"); + + shash_add(&linkValues, "linker", pic16_linkCmd[0]); + + mergeSets(&tSet, libPathsSet); + mergeSets(&tSet, libDirsSet); + + shash_add(&linkValues, "incdirs", joinStrSet( appendStrSet(tSet, "-I\"", "\""))); + shash_add(&linkValues, "lflags", joinStrSet(linkOptionsSet)); + + shash_add(&linkValues, "outfile", fullDstFileName ? fullDstFileName : dstFileName); + + if(fullSrcFileName) { + sprintf(temp, "%s.o", fullDstFileName ? fullDstFileName : dstFileName); +// addSetHead(&relFilesSet, Safe_strdup(temp)); + shash_add(&linkValues, "user_ofile", temp); + } + + if(!pic16_options.no_crt) + shash_add(&linkValues, "spec_ofiles", pic16_options.crt_name); + + shash_add(&linkValues, "ofiles", joinStrSet(relFilesSet)); + + if(!libflags.ignore) { + if(libflags.want_libc) + addSet(&libFilesSet, Safe_strdup("libc18f.lib")); + + if(libflags.want_libm) + addSet(&libFilesSet, Safe_strdup("libm18f.lib")); + + if(libflags.want_libio) { + sprintf(temp, "libio%s.lib", pic16->name[1]); /* build libio18f452.lib name */ + addSet(&libFilesSet, Safe_strdup(temp)); + } + + if(libflags.want_libdebug) + addSet(&libFilesSet, Safe_strdup("libdebug.lib")); + } + + shash_add(&linkValues, "libs", joinStrSet(libFilesSet)); + + lcmd = msprintf(linkValues, lfrm); + + ret = my_system( lcmd ); + + Safe_free( lcmd ); + + if(ret) + exit(1); +} + + +static void +_pic16_finaliseOptions (void) +{ + port->mem.default_local_map = data; + port->mem.default_globl_map = data; + + /* peepholes are disabled for the time being */ + options.nopeep = 1; + + /* explicit enable peepholes for testing */ + if (pic16_enable_peeps) + options.nopeep = 0; + + options.all_callee_saves = 1; // always callee saves + +#if 0 + options.float_rent = 1; + options.intlong_rent = 1; +#endif + + setMainValue("mcu", pic16->name[2] ); + addSet(&preArgvSet, Safe_strdup("-D{mcu}")); + + setMainValue("mcu1", pic16->name[1] ); + addSet(&preArgvSet, Safe_strdup("-D__{mcu1}")); + + if (!pic16_options.nodefaultlibs) + { + char devlib[512]; + + /* now add the library for the device */ + sprintf(devlib, "libdev%s.lib", pic16->name[1]); /* e.g., libdev18f452.lib */ + addSet(&libFilesSet, Safe_strdup(devlib)); + + /* add the internal SDCC library */ + addSet(&libFilesSet, Safe_strdup( "libsdcc.lib" )); + } + + if (alt_asm && alt_asm[0] != '\0') + { + pic16_asmCmd[0] = alt_asm; + } + + if (alt_link && alt_link[0] != '\0') + { + pic16_linkCmd[0] = alt_link; + } + + if (!pic16_options.no_crt) + { + pic16_options.omit_ivt = 1; + pic16_options.leave_reset = 0; + } + + if (options.model == MODEL_SMALL) + { + addSet(&asmOptionsSet, Safe_strdup("-DSDCC_MODEL_SMALL")); + } + else if (options.model == MODEL_LARGE) + { + char buf[128]; + + addSet(&asmOptionsSet, Safe_strdup("-DSDCC_MODEL_LARGE")); + + sprintf(buf, "-D%s -D__%s", pic16->name[2], pic16->name[1]); + *(strrchr(buf, 'f')) = 'F'; + addSet(&asmOptionsSet, Safe_strdup(buf)); + } + + if (STACK_MODEL_LARGE) + { + addSet(&preArgvSet, Safe_strdup("-DSTACK_MODEL_LARGE")); + addSet(&asmOptionsSet, Safe_strdup("-DSTACK_MODEL_LARGE")); + } + else + { + addSet(&preArgvSet, Safe_strdup("-DSTACK_MODEL_SMALL")); + addSet(&asmOptionsSet, Safe_strdup("-DSTACK_MODEL_SMALL")); + } +} + + +static void +_pic16_setDefaultOptions (void) +{ + options.stackAuto = 0; /* implicit declaration */ + /* port is not capable yet to allocate separate registers + * dedicated for passing certain parameters */ + + /* initialize to defaults section locations, names and addresses */ + pic16_sectioninfo.at_udata = "udata"; + + /* set pic16 port options to defaults */ + pic16_options.no_banksel = 0; + pic16_options.opt_banksel = 0; + pic16_options.omit_configw = 0; + pic16_options.omit_ivt = 0; + pic16_options.leave_reset = 0; + pic16_options.stack_model = 0; /* 0 for 'small', 1 for 'large' */ + pic16_options.ivt_loc = 0x000000; + pic16_options.nodefaultlibs = 0; + pic16_options.dumpcalltree = 0; + pic16_options.crt_name = "crt0i.o"; /* the default crt to link */ + pic16_options.no_crt = 0; /* use crt by default */ + pic16_options.ip_stack = 1; /* set to 1 to enable ipop/ipush for stack */ + pic16_options.gstack = 0; + pic16_options.debgen = 0; +} + +static const char * +_pic16_getRegName (struct regs *reg) +{ + if (reg) + return reg->name; + return "err"; +} + + +#if 1 +static char *_pic16_mangleFunctionName(char *sz) +{ +// fprintf(stderr, "mangled function name: %s\n", sz); + + return sz; +} +#endif + + +static void +_pic16_genAssemblerPreamble (FILE * of) +{ + char *name = pic16_processor_base_name(); + + if(!name) { + name = "p18f452"; + fprintf(stderr,"WARNING: No Pic has been selected, defaulting to %s\n",name); + } + + fprintf (of, "\tlist\tp=%s\n",&name[1]); + if (pic16_mplab_comp) { + // provide ACCESS macro used during SFR accesses + fprintf (of, "\tinclude \n", &name[1]); + } + + if(!pic16_options.omit_configw) { + pic16_emitConfigRegs(of); + fprintf(of, "\n"); + pic16_emitIDRegs(of); + } + + fprintf (of, "\tradix dec\n"); +} + +/* Generate interrupt vector table. */ +static int +_pic16_genIVT (struct dbuf_s * oBuf, symbol ** interrupts, int maxInterrupts) +{ +#if 1 + /* PIC18F family has only two interrupts, the high and the low + * priority interrupts, which reside at 0x0008 and 0x0018 respectively - VR */ + + if((!pic16_options.omit_ivt) || (pic16_options.omit_ivt && pic16_options.leave_reset)) { + dbuf_printf(oBuf, "; RESET vector\n"); + dbuf_printf(oBuf, "\tgoto\t__sdcc_gsinit_startup\n"); + } + + if(!pic16_options.omit_ivt) { + dbuf_printf(oBuf, "\tres 4\n"); + + + dbuf_printf(oBuf, "; High priority interrupt vector 0x0008\n"); + if(interrupts[1]) { + dbuf_printf(oBuf, "\tgoto\t%s\n", interrupts[1]->rname); + dbuf_printf(oBuf, "\tres\t12\n"); + } else { + dbuf_printf(oBuf, "\tretfie\n"); + dbuf_printf(oBuf, "\tres\t14\n"); + } + + dbuf_printf(oBuf, "; Low priority interrupt vector 0x0018\n"); + if(interrupts[2]) { + dbuf_printf(oBuf, "\tgoto\t%s\n", interrupts[2]->rname); + } else { + dbuf_printf(oBuf, "\tretfie\n"); + } + } +#endif + return TRUE; +} + +/* return True if the port can handle the type, + * False to convert it to function call */ +static bool _hasNativeMulFor (iCode *ic, sym_link *left, sym_link *right) +{ + //fprintf(stderr,"checking for native mult for %c (size: %d)\n", ic->op, getSize(OP_SYMBOL(IC_RESULT(ic))->type)); + int symL, symR, symRes, sizeL = 0, sizeR = 0, sizeRes = 0; + + /* left/right are symbols? */ + symL = IS_SYMOP(IC_LEFT(ic)); + symR = IS_SYMOP(IC_RIGHT(ic)); + symRes = IS_SYMOP(IC_RESULT(ic)); + + /* --> then determine their sizes */ + sizeL = symL ? getSize(OP_SYM_TYPE(IC_LEFT(ic))) : 4; + sizeR = symR ? getSize(OP_SYM_TYPE(IC_RIGHT(ic))) : 4; + sizeRes = symRes ? getSize(OP_SYM_TYPE(IC_RESULT(ic))) : 4; + + /* Checks to enable native multiplication. + * PICs do not offer native division at all... + * + * Ideas: + * ( i) if result is just one byte, use native MUL + * (regardless of the operands) + * ( ii) if left and right are unsigned 8-bit operands, + * use native MUL + * (iii) if left or right is a literal in the range of [-128..256) + * and the other is an unsigned byte, use native MUL + */ + if (ic->op == '*') + { + /* use native mult for `*: x --> {u8_t, s8_t}' */ + if (sizeRes == 1) { return TRUE; } + + /* use native mult for `u8_t x u8_t --> { u16_t, s16_t }' */ + if (sizeL == 1 && symL /*&& SPEC_USIGN(OP_SYM_TYPE(IC_LEFT(ic)))*/) { + sizeL = 1; + } else { + //printf( "%s: left too large (%u) / signed (%u)\n", __FUNCTION__, sizeL, symL && !SPEC_USIGN(OP_SYM_TYPE(IC_LEFT(ic)))); + sizeL = 4; + } + if (sizeR == 1 && symR /*&& SPEC_USIGN(OP_SYM_TYPE(IC_RIGHT(ic)))*/) { + sizeR = 1; + } else { + //printf( "%s: right too large (%u) / signed (%u)\n", __FUNCTION__, sizeR, symR && !SPEC_USIGN(OP_SYM_TYPE(IC_RIGHT(ic)))); + sizeR = 4; + } + + /* also allow literals [-128..256) for left/right operands */ + if (IS_VALOP(IC_LEFT(ic))) + { + long l = (long) ulFromVal ( OP_VALUE( IC_LEFT(ic) ) ); + sizeL = 4; + //printf( "%s: val(left) = %ld\n", __FUNCTION__, l ); + if (l >= -128 && l < 256) + { + sizeL = 1; + } else { + //printf( "%s: left value %ld outside [-128..256)\n", __FUNCTION__, l ); + } + } + if (IS_VALOP( IC_RIGHT(ic) )) + { + long l = (long) ulFromVal ( OP_VALUE( IC_RIGHT(ic) ) ); + sizeR = 4; + //printf( "%s: val(right) = %ld\n", __FUNCTION__, l ); + if (l >= -128 && l < 256) + { + sizeR = 1; + } else { + //printf( "%s: right value %ld outside [-128..256)\n", __FUNCTION__, l ); + } + } + + /* use native mult iff left and right are (unsigned) 8-bit operands */ + if (sizeL == 1 && sizeR == 1) { return TRUE; } + } + + if (ic->op == '/' || ic->op == '%') + { + /* We must catch /: {u8_t,s8_t} x {u8_t,s8_t} --> {u8_t,s8_t}, + * because SDCC will call 'divuchar' even for u8_t / s8_t. + * Example: 128 / -2 becomes 128 / 254 = 0 != -64... */ + if (sizeL == 1 && sizeR == 1) return TRUE; + + /* What about literals? */ + if (IS_VALOP( IC_LEFT(ic) )) + { + long l = (long) ulFromVal ( OP_VALUE( IC_LEFT(ic) ) ); + sizeL = 4; + //printf( "%s: val(left) = %ld\n", __FUNCTION__, l ); + if (l >= -128 && l < 256) + { + sizeL = 1; + } else { + //printf( "%s: left value %ld outside [-128..256)\n", __FUNCTION__, l ); + } + } + if (IS_VALOP( IC_RIGHT(ic) )) + { + long l = (long) ulFromVal ( OP_VALUE( IC_RIGHT(ic) ) ); + sizeR = 4; + //printf( "%s: val(right) = %ld\n", __FUNCTION__, l ); + if (l >= -128 && l < 256) + { + sizeR = 1; + } else { + //printf( "%s: right value %ld outside [-128..256)\n", __FUNCTION__, l ); + } + } + if (sizeL == 1 && sizeR == 1) { return TRUE; } + } + + return FALSE; +} + + +#if 0 +/* Do CSE estimation */ +static bool cseCostEstimation (iCode *ic, iCode *pdic) +{ +// operand *result = IC_RESULT(ic); +// sym_link *result_type = operandType(result); + + + /* VR -- this is an adhoc. Put here after conversation + * with Erik Epetrich */ + + if(ic->op == '<' + || ic->op == '>' + || ic->op == EQ_OP) { + + fprintf(stderr, "%d %s\n", __LINE__, __FUNCTION__); + return 0; + } + +#if 0 + /* if it is a pointer then return ok for now */ + if (IC_RESULT(ic) && IS_PTR(result_type)) return 1; + + /* if bitwise | add & subtract then no since mcs51 is pretty good at it + so we will cse only if they are local (i.e. both ic & pdic belong to + the same basic block */ + if (IS_BITWISE_OP(ic) || ic->op == '+' || ic->op == '-') { + /* then if they are the same Basic block then ok */ + if (ic->eBBlockNum == pdic->eBBlockNum) return 1; + else return 0; + } +#endif + + /* for others it is cheaper to do the cse */ + return 1; +} +#endif + + +/* Indicate which extended bit operations this port supports */ +static bool +hasExtBitOp (int op, int size) +{ + if (op == RRC + || op == RLC + /* || op == GETHBIT */ /* GETHBIT doesn't look complete for PIC */ + ) + return TRUE; + else + return FALSE; +} + +/* Indicate the expense of an access to an output storage class */ +static int +oclsExpense (struct memmap *oclass) +{ + /* The IN_FARSPACE test is compatible with historical behaviour, */ + /* but I don't think it is applicable to PIC. If so, please feel */ + /* free to remove this test -- EEP */ + if (IN_FARSPACE(oclass)) + return 1; + + return 0; +} + +/** $1 is the input object file (PIC16 specific) // >>always the basename<<. + $2 is always the output file. + $3 -L path and -l libraries + $l is the list of extra options that should be there somewhere... + MUST be terminated with a NULL. +*/ +const char *pic16_linkCmd[] = +{ + "gplink", "$l", "-w", "-r", "-o \"$2\"", "\"$1\"","$3", NULL +}; + + + +/** $1 is always the basename. + $2 is always the output file. + $3 varies (nothing currently) + $l is the list of extra options that should be there somewhere... + MUST be terminated with a NULL. +*/ +const char *pic16_asmCmd[] = +{ + "gpasm", "$l", "$3", "-c", "\"$1.asm\"", "-o \"$2\"", NULL + +}; + +/* Globals */ +PORT pic16_port = +{ + TARGET_ID_PIC16, + "pic16", + "MCU PIC16", /* Target name */ + "p18f452", /* Processor */ + { + pic16glue, + TRUE, /* Emit glue around main */ + MODEL_SMALL | MODEL_LARGE | MODEL_FLAT24, + MODEL_SMALL + }, + { + pic16_asmCmd, /* assembler command and arguments */ + NULL, /* alternate macro based form */ + "-g", /* arguments for debug mode */ + NULL, /* arguments for normal mode */ + 0, /* print externs as global */ + ".asm", /* assembler file extension */ + NULL /* no do_assemble function */ + }, + { + NULL, // pic16_linkCmd, /* linker command and arguments */ + NULL, /* alternate macro based form */ + _pic16_linkEdit, //NULL, /* no do_link function */ + ".o", /* extension for object files */ + 0 /* no need for linker file */ + }, + { + _defaultRules + }, + { + /* Sizes */ + 1, /* char */ + 2, /* short */ + 2, /* int */ + 4, /* long */ + 2, /* ptr */ + 3, /* fptr, far pointers (see Microchip) */ + 3, /* gptr */ + 1, /* bit */ + 4, /* float */ + 4 /* max */ + }, + + /* generic pointer tags */ + { + 0x00, /* far */ + 0x80, /* near */ + 0x00, /* xstack */ + 0x00 /* code */ + }, + + { + "XSEG (XDATA)", // xstack + "STACK (DATA)", // istack + "CSEG (CODE)", // code + "DSEG (DATA)", // data + "ISEG (DATA)", // idata + "PSEG (DATA)", // pdata + "XSEG (XDATA)", // xdata + "BSEG (BIT)", // bit + "RSEG (DATA)", // reg + "GSINIT (CODE)", // static + "OSEG (OVR,DATA)", // overlay + "GSFINAL (CODE)", // post static + "HOME (CODE)", // home + NULL, // xidata + NULL, // xinit + "CONST (CODE)", // const_name - const data (code or not) + "CABS (ABS,CODE)", // cabs_name - const absolute data (code or not) + "XABS (ABS,XDATA)", // xabs_name - absolute xdata + "IABS (ABS,DATA)", // iabs_name - absolute data + NULL, // default location for auto vars + NULL, // default location for global vars + 1 // code is read only 1=yes + }, + { + NULL, /* genExtraAreaDeclaration */ + NULL /* genExatrAreaLinkOptions */ + }, + { + /* stack related information */ + -1, /* -1 stack grows downwards, +1 upwards */ + 1, /* extra overhead when calling between banks */ + 4, /* extra overhead when the function is an ISR */ + 1, /* extra overhead for a function call */ + 1, /* re-entrant space */ + 0 /* 'banked' call overhead, mild overlap with bank_overhead */ + }, + /* pic16 has an 8 bit mul */ + { + 0, -1 + }, + { + pic16_emitDebuggerSymbol + }, + { + 255/3, /* maxCount */ + 3, /* sizeofElement */ + /* The rest of these costs are bogus. They approximate */ + /* the behavior of src/SDCCicode.c 1.207 and earlier. */ + {4,4,4}, /* sizeofMatchJump[] */ + {0,0,0}, /* sizeofRangeCompare[] */ + 0, /* sizeofSubtract */ + 3, /* sizeofDispatch */ + }, + "_", + _pic16_init, + _pic16_parseOptions, + pic16_optionsTable, + _pic16_initPaths, + _pic16_finaliseOptions, + _pic16_setDefaultOptions, + pic16_assignRegisters, + _pic16_getRegName, + _pic16_keywords, + _pic16_genAssemblerPreamble, + NULL, /* no genAssemblerEnd */ + _pic16_genIVT, + NULL, // _pic16_genXINIT + NULL, /* genInitStartup */ + _pic16_reset_regparm, + _pic16_regparm, + _process_pragma, /* process a pragma */ + _pic16_mangleFunctionName, /* mangles function name */ + _hasNativeMulFor, + hasExtBitOp, /* hasExtBitOp */ + oclsExpense, /* oclsExpense */ + FALSE, + TRUE, /* little endian */ + 0, /* leave lt */ + 0, /* leave gt */ + 1, /* transform <= to ! > */ + 1, /* transform >= to ! < */ + 1, /* transform != to !(a == b) */ + 0, /* leave == */ + FALSE, /* No array initializer support. */ + 0, //cseCostEstimation, /* !!!no CSE cost estimation yet */ + NULL, /* no builtin functions */ + GPOINTER, /* treat unqualified pointers as "generic" pointers */ + 1, /* reset labelKey to 1 */ + 1, /* globals & local static allowed */ + PORT_MAGIC +}; diff --git a/src/pic16/main.h b/src/pic16/main.h new file mode 100644 index 0000000..3b92452 --- /dev/null +++ b/src/pic16/main.h @@ -0,0 +1,38 @@ +#ifndef MAIN_INCLUDE +#define MAIN_INCLUDE + +#include "ralloc.h" + +bool x_parseOptions (char **argv, int *pargc); +void x_setDefaultOptions (void); +void x_finaliseOptions (void); + + +typedef struct { + char *at_udata; +} pic16_sectioninfo_t; + +typedef struct absSym { + char name[SDCC_SYMNAME_MAX+1]; + unsigned int address; +} absSym; + +typedef struct sectName { + char *name; + set *regsSet; +} sectName; + +typedef struct sectSym { + sectName *section; + char *name; + regs *reg; +} sectSym; + +extern set *absSymSet; +extern set *sectNames; +extern set *sectSyms; +extern set *wparamList; + +extern int pic16_mplab_comp; + +#endif diff --git a/src/pic16/pcode.c b/src/pic16/pcode.c new file mode 100644 index 0000000..146ba2d --- /dev/null +++ b/src/pic16/pcode.c @@ -0,0 +1,12232 @@ +/*------------------------------------------------------------------------- + + pcode.c - post code generation + + Written By - Scott Dattalo scott@dattalo.com + Ported to PIC16 By - Martin Dubuc m.dubuc@rogers.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +-------------------------------------------------------------------------*/ + +#include + +#include "common.h" // Include everything in the SDCC src directory +#include "newalloc.h" + + +#include "main.h" +#include "pcode.h" +#include "pcodeflow.h" +#include "ralloc.h" +#include "device.h" + +extern char *pic16_aopGet (struct asmop *aop, int offset, bool bit16, bool dname); + +#if defined(__BORLANDC__) || defined(_MSC_VER) +#define inline +#endif + +#define DUMP_DF_GRAPHS 0 + +/****************************************************************/ +/****************************************************************/ + +static peepCommand peepCommands[] = { + + {NOTBITSKIP, "_NOTBITSKIP_"}, + {BITSKIP, "_BITSKIP_"}, + {INVERTBITSKIP, "_INVERTBITSKIP_"}, + + {-1, NULL} +}; + + + +// Eventually this will go into device dependent files: +pCodeOpReg pic16_pc_status = {{PO_STATUS, "STATUS"}, -1, NULL,0,NULL}; +pCodeOpReg pic16_pc_intcon = {{PO_INTCON, "INTCON"}, -1, NULL,0,NULL}; +pCodeOpReg pic16_pc_pcl = {{PO_PCL, "PCL"}, -1, NULL,0,NULL}; +pCodeOpReg pic16_pc_pclath = {{PO_PCLATH, "PCLATH"}, -1, NULL,0,NULL}; +pCodeOpReg pic16_pc_pclatu = {{PO_PCLATU, "PCLATU"}, -1, NULL,0,NULL}; // patch 14 +pCodeOpReg pic16_pc_wreg = {{PO_WREG, "WREG"}, -1, NULL,0,NULL}; +pCodeOpReg pic16_pc_bsr = {{PO_BSR, "BSR"}, -1, NULL,0,NULL}; + +pCodeOpReg pic16_pc_tosl = {{PO_SFR_REGISTER, "TOSL"}, -1, NULL,0,NULL}; // patch 14 +pCodeOpReg pic16_pc_tosh = {{PO_SFR_REGISTER, "TOSH"}, -1, NULL,0,NULL}; // +pCodeOpReg pic16_pc_tosu = {{PO_SFR_REGISTER, "TOSU"}, -1, NULL,0,NULL}; // patch 14 + +pCodeOpReg pic16_pc_tblptrl = {{PO_SFR_REGISTER, "TBLPTRL"}, -1, NULL,0,NULL}; // patch 15 +pCodeOpReg pic16_pc_tblptrh = {{PO_SFR_REGISTER, "TBLPTRH"}, -1, NULL,0,NULL}; // +pCodeOpReg pic16_pc_tblptru = {{PO_SFR_REGISTER, "TBLPTRU"}, -1, NULL,0,NULL}; // +pCodeOpReg pic16_pc_tablat = {{PO_SFR_REGISTER, "TABLAT"}, -1, NULL,0,NULL}; // patch 15 + +//pCodeOpReg pic16_pc_fsr0 = {{PO_FSR0, "FSR0"}, -1, NULL,0,NULL}; //deprecated ! + +pCodeOpReg pic16_pc_fsr0l = {{PO_FSR0, "FSR0L"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_fsr0h = {{PO_FSR0, "FSR0H"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_fsr1l = {{PO_FSR0, "FSR1L"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_fsr1h = {{PO_FSR0, "FSR1H"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_fsr2l = {{PO_FSR0, "FSR2L"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_fsr2h = {{PO_FSR0, "FSR2H"}, -1, NULL, 0, NULL}; + +pCodeOpReg pic16_pc_indf0 = {{PO_INDF0, "INDF0"}, -1, NULL,0,NULL}; +pCodeOpReg pic16_pc_postinc0 = {{PO_INDF0, "POSTINC0"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_postdec0 = {{PO_INDF0, "POSTDEC0"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_preinc0 = {{PO_INDF0, "PREINC0"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_plusw0 = {{PO_INDF0, "PLUSW0"}, -1, NULL, 0, NULL}; + +pCodeOpReg pic16_pc_indf1 = {{PO_INDF0, "INDF1"}, -1, NULL,0,NULL}; +pCodeOpReg pic16_pc_postinc1 = {{PO_INDF0, "POSTINC1"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_postdec1 = {{PO_INDF0, "POSTDEC1"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_preinc1 = {{PO_INDF0, "PREINC1"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_plusw1 = {{PO_INDF0, "PLUSW1"}, -1, NULL, 0, NULL}; + +pCodeOpReg pic16_pc_indf2 = {{PO_INDF0, "INDF2"}, -1, NULL,0,NULL}; +pCodeOpReg pic16_pc_postinc2 = {{PO_INDF0, "POSTINC2"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_postdec2 = {{PO_INDF0, "POSTDEC2"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_preinc2 = {{PO_INDF0, "PREINC2"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_plusw2 = {{PO_INDF0, "PLUSW2"}, -1, NULL, 0, NULL}; + +pCodeOpReg pic16_pc_prodl = {{PO_PRODL, "PRODL"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_prodh = {{PO_PRODH, "PRODH"}, -1, NULL, 0, NULL}; + +/* EEPROM registers */ +pCodeOpReg pic16_pc_eecon1 = {{PO_SFR_REGISTER, "EECON1"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_eecon2 = {{PO_SFR_REGISTER, "EECON2"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_eedata = {{PO_SFR_REGISTER, "EEDATA"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_eeadr = {{PO_SFR_REGISTER, "EEADR"}, -1, NULL, 0, NULL}; + +pCodeOpReg pic16_pc_kzero = {{PO_GPR_REGISTER, "KZ"}, -1, NULL,0,NULL}; +pCodeOpReg pic16_pc_wsave = {{PO_GPR_REGISTER, "WSAVE"}, -1, NULL,0,NULL}; +pCodeOpReg pic16_pc_ssave = {{PO_GPR_REGISTER, "SSAVE"}, -1, NULL,0,NULL}; + +pCodeOpReg *pic16_stackpnt_lo; +pCodeOpReg *pic16_stackpnt_hi; +pCodeOpReg *pic16_stack_postinc; +pCodeOpReg *pic16_stack_postdec; +pCodeOpReg *pic16_stack_preinc; +pCodeOpReg *pic16_stack_plusw; + +pCodeOpReg *pic16_framepnt_lo; +pCodeOpReg *pic16_framepnt_hi; +pCodeOpReg *pic16_frame_postinc; +pCodeOpReg *pic16_frame_postdec; +pCodeOpReg *pic16_frame_preinc; +pCodeOpReg *pic16_frame_plusw; + +pCodeOpReg pic16_pc_gpsimio = {{PO_GPR_REGISTER, "GPSIMIO"}, -1, NULL, 0, NULL}; +pCodeOpReg pic16_pc_gpsimio2 = {{PO_GPR_REGISTER, "GPSIMIO2"}, -1, NULL, 0, NULL}; + +char *OPT_TYPE_STR[] = { "begin", "end", "jumptable_begin", "jumptable_end" }; +char *LR_TYPE_STR[] = { "entry begin", "entry end", "exit begin", "exit end" }; + + +static int mnemonics_initialized = 0; + + +static hTab *pic16MnemonicsHash = NULL; +static hTab *pic16pCodePeepCommandsHash = NULL; + +static pFile *the_pFile = NULL; +static pBlock *pb_dead_pcodes = NULL; + +/* Hardcoded flags to change the behavior of the PIC port */ +static int peepOptimizing = 1; /* run the peephole optimizer if nonzero */ +static int functionInlining = 1; /* inline functions if nonzero */ +int pic16_debug_verbose = 0; /* Set true to inundate .asm file */ + +int pic16_pcode_verbose = 0; + +//static int GpCodeSequenceNumber = 1; +static int GpcFlowSeq = 1; + +extern void pic16_RemoveUnusedRegisters(void); +extern void pic16_RegsUnMapLiveRanges(void); +extern void pic16_BuildFlowTree(pBlock *pb); +extern void pic16_pCodeRegOptimizeRegUsage(int level); + +/****************************************************************/ +/* Forward declarations */ +/****************************************************************/ + +void pic16_unlinkpCode(pCode *pc); +#if 0 +static void genericAnalyze(pCode *pc); +static void AnalyzeGOTO(pCode *pc); +static void AnalyzeSKIP(pCode *pc); +static void AnalyzeRETURN(pCode *pc); +#endif + +static void genericDestruct(pCode *pc); +static void genericPrint(FILE *of,pCode *pc); + +static void pCodePrintLabel(FILE *of, pCode *pc); +static void pCodePrintFunction(FILE *of, pCode *pc); +static void pCodeOpPrint(FILE *of, pCodeOp *pcop); +static char *pic16_get_op_from_instruction( pCodeInstruction *pcc); +char *pic16_get_op(pCodeOp *pcop,char *buff,size_t buf_size); +int pCodePeepMatchLine(pCodePeep *peepBlock, pCode *pcs, pCode *pcd); +int pic16_pCodePeepMatchRule(pCode *pc); +static void pBlockStats(FILE *of, pBlock *pb); +static pBlock *newpBlock(void); +extern void pic16_pCodeInsertAfter(pCode *pc1, pCode *pc2); +extern pCodeOp *pic16_popCopyReg(pCodeOpReg *pc); +pCodeOp *pic16_popCopyGPR2Bit(pCodeOp *pc, int bitval); +void pic16_pCodeRegMapLiveRanges(pBlock *pb); +void OptimizeLocalRegs(void); +pCodeOp *pic16_popGet2p(pCodeOp *src, pCodeOp *dst); + +char *dumpPicOptype(PIC_OPTYPE type); + +pCodeOp *pic16_popGetLit2(int, pCodeOp *); +pCodeOp *pic16_popGetLit(int); +pCodeOp *pic16_popGetWithString(char *); +extern int inWparamList(char *s); + +/** data flow optimization helpers **/ +#if defined (DUMP_DF_GRAPHS) && DUMP_DF_GRAPHS > 0 +static void pic16_vcg_dump (FILE *of, pBlock *pb); +static void pic16_vcg_dump_default (pBlock *pb); +#endif +static int pic16_pCodeIsAlive (pCode *pc); +static void pic16_df_stats (); +static void pic16_createDF (pBlock *pb); +static int pic16_removeUnusedRegistersDF (); +static void pic16_destructDF (pBlock *pb); +static void releaseStack (); + +/****************************************************************/ +/* PIC Instructions */ +/****************************************************************/ + +pCodeInstruction pic16_pciADDWF = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_ADDWF, + "ADDWF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_REGISTER | PCC_STATUS), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciADDFW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_ADDFW, + "ADDWF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_W | PCC_STATUS), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciADDWFC = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_ADDWFC, + "ADDWFC", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER | PCC_C), // inCond + (PCC_REGISTER | PCC_STATUS), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciADDFWC = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_ADDFWC, + "ADDWFC", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER | PCC_C), // inCond + (PCC_W | PCC_STATUS), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciADDLW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_ADDLW, + "ADDLW", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 1, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_LITERAL), // inCond + (PCC_W | PCC_STATUS), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciANDLW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_ANDLW, + "ANDLW", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 1, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_LITERAL), // inCond + (PCC_W | PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciANDWF = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_ANDWF, + "ANDWF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_REGISTER | PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciANDFW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_ANDFW, + "ANDWF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_W | PCC_Z | PCC_N) // outCond +}; + +pCodeInstruction pic16_pciBC = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_BC, + "BC", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_REL_ADDR | PCC_C), // inCond + PCC_NONE, // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciBCF = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_BCF, + "BCF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,1, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_BSF, + (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond + PCC_REGISTER, // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciBN = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_BN, + "BN", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_REL_ADDR | PCC_N), // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciBNC = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_BNC, + "BNC", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_REL_ADDR | PCC_C), // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciBNN = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_BNN, + "BNN", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_REL_ADDR | PCC_N), // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciBNOV = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_BNOV, + "BNOV", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_REL_ADDR | PCC_OV), // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciBNZ = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_BNZ, + "BNZ", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_REL_ADDR | PCC_Z), // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciBOV = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_BOV, + "BOV", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_REL_ADDR | PCC_OV), // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciBRA = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_BRA, + "BRA", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REL_ADDR, // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciBSF = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_BSF, + "BSF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,1, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_BCF, + (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond + (PCC_REGISTER | PCC_EXAMINE_PCOP), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciBTFSC = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // AnalyzeSKIP, + genericDestruct, + genericPrint}, + POC_BTFSC, + "BTFSC", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,1, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_BTFSS, + (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond + PCC_EXAMINE_PCOP, // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciBTFSS = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // AnalyzeSKIP, + genericDestruct, + genericPrint}, + POC_BTFSS, + "BTFSS", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,1, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_BTFSC, + (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond + PCC_EXAMINE_PCOP, // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciBTG = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_BTG, + "BTG", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,1, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond + (PCC_REGISTER | PCC_EXAMINE_PCOP), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciBZ = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_BZ, + "BZ", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_REL_ADDR | PCC_Z), // inCond + PCC_NONE, // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciCALL = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_CALL, + "CALL", + 4, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 1, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE, // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciCOMF = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_COMF, + "COMF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + (PCC_REGISTER | PCC_Z | PCC_N) , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciCOMFW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_COMFW, + "COMF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + (PCC_W | PCC_Z | PCC_N) , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciCLRF = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_CLRF, + "CLRF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + (PCC_REGISTER | PCC_Z), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciCLRWDT = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_CLRWDT, + "CLRWDT", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciCPFSEQ = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_CPFSEQ, + "CPFSEQ", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciCPFSGT = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_CPFSGT, + "CPFSGT", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciCPFSLT = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_CPFSLT, + "CPFSLT", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 1,0, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciDAW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_DAW, + "DAW", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_W, // inCond + (PCC_W | PCC_C), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciDCFSNZ = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_DCFSNZ, + "DCFSNZ", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + PCC_REGISTER , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciDCFSNZW = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_DCFSNZW, + "DCFSNZ", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + PCC_W , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciDECF = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_DECF, + "DECF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + (PCC_REGISTER | PCC_STATUS) , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciDECFW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_DECFW, + "DECF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + (PCC_W | PCC_STATUS) , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciDECFSZ = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // AnalyzeSKIP, + genericDestruct, + genericPrint}, + POC_DECFSZ, + "DECFSZ", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + PCC_REGISTER , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciDECFSZW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // AnalyzeSKIP, + genericDestruct, + genericPrint}, + POC_DECFSZW, + "DECFSZ", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + PCC_W , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciGOTO = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // AnalyzeGOTO, + genericDestruct, + genericPrint}, + POC_GOTO, + "GOTO", + 4, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REL_ADDR, // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciINCF = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_INCF, + "INCF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + (PCC_REGISTER | PCC_STATUS), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciINCFW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_INCFW, + "INCF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + (PCC_W | PCC_STATUS) , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciINCFSZ = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // AnalyzeSKIP, + genericDestruct, + genericPrint}, + POC_INCFSZ, + "INCFSZ", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_INFSNZ, + PCC_REGISTER, // inCond + PCC_REGISTER , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciINCFSZW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // AnalyzeSKIP, + genericDestruct, + genericPrint}, + POC_INCFSZW, + "INCFSZ", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_INFSNZW, + PCC_REGISTER, // inCond + PCC_W , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciINFSNZ = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // AnalyzeSKIP, + genericDestruct, + genericPrint}, + POC_INFSNZ, + "INFSNZ", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_INCFSZ, + PCC_REGISTER, // inCond + PCC_REGISTER , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciINFSNZW = { // vrokas - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // AnalyzeSKIP, + genericDestruct, + genericPrint}, + POC_INFSNZW, + "INFSNZ", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_INCFSZW, + PCC_REGISTER, // inCond + PCC_W , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciIORWF = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_IORWF, + "IORWF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_REGISTER | PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciIORFW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_IORFW, + "IORWF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_W | PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciIORLW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_IORLW, + "IORLW", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 1, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_LITERAL), // inCond + (PCC_W | PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciLFSR = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_LFSR, + "LFSR", + 4, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 1, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 1, // second literal operand + POC_NOP, + PCC_LITERAL, // inCond + PCC_NONE, // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciMOVF = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_MOVF, + "MOVF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + (PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciMOVFW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_MOVFW, + "MOVF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + (PCC_W | PCC_N | PCC_Z), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciMOVFF = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_MOVFF, + "MOVFF", + 4, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 1, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + PCC_REGISTER2, // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciMOVLB = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_MOVLB, + "MOVLB", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 1, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_NONE | PCC_LITERAL), // inCond + PCC_REGISTER, // outCond - BSR + PCI_MAGIC +}; + +pCodeInstruction pic16_pciMOVLW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_MOVLW, + "MOVLW", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 1, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_NONE | PCC_LITERAL), // inCond + PCC_W, // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciMOVWF = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_MOVWF, + "MOVWF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_W, // inCond + PCC_REGISTER, // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciMULLW = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_MULLW, + "MULLW", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 1, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_LITERAL), // inCond + PCC_NONE, // outCond - PROD + PCI_MAGIC +}; + +pCodeInstruction pic16_pciMULWF = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_MULWF, + "MULWF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + PCC_REGISTER, // outCond - PROD + PCI_MAGIC +}; + +pCodeInstruction pic16_pciNEGF = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_NEGF, + "NEGF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + (PCC_REGISTER | PCC_STATUS), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciNOP = { + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_NOP, + "NOP", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE, // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciPOP = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_POP, + "POP", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciPUSH = { + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_PUSH, + "PUSH", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciRCALL = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_RCALL, + "RCALL", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REL_ADDR, // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciRETFIE = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // AnalyzeRETURN, + genericDestruct, + genericPrint}, + POC_RETFIE, + "RETFIE", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 1, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE, // outCond (not true... affects the GIE bit too) + PCI_MAGIC +}; + +pCodeInstruction pic16_pciRETLW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // AnalyzeRETURN, + genericDestruct, + genericPrint}, + POC_RETLW, + "RETLW", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 1, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_LITERAL, // inCond + PCC_W, // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciRETURN = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // AnalyzeRETURN, + genericDestruct, + genericPrint}, + POC_RETURN, + "RETURN", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 1,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 1, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE, // outCond + PCI_MAGIC +}; +pCodeInstruction pic16_pciRLCF = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_RLCF, + "RLCF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_C | PCC_REGISTER), // inCond + (PCC_REGISTER | PCC_C | PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciRLCFW = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_RLCFW, + "RLCF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_C | PCC_REGISTER), // inCond + (PCC_W | PCC_C | PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciRLNCF = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_RLNCF, + "RLNCF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + (PCC_REGISTER | PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; +pCodeInstruction pic16_pciRLNCFW = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_RLNCFW, + "RLNCF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + (PCC_W | PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; +pCodeInstruction pic16_pciRRCF = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_RRCF, + "RRCF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_C | PCC_REGISTER), // inCond + (PCC_REGISTER | PCC_C | PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; +pCodeInstruction pic16_pciRRCFW = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_RRCFW, + "RRCF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_C | PCC_REGISTER), // inCond + (PCC_W | PCC_C | PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; +pCodeInstruction pic16_pciRRNCF = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_RRNCF, + "RRNCF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + (PCC_REGISTER | PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciRRNCFW = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_RRNCFW, + "RRNCF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + (PCC_W | PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciSETF = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_SETF, + "SETF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_REGISTER , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciSUBLW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_SUBLW, + "SUBLW", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 1, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_LITERAL), // inCond + (PCC_W | PCC_STATUS), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciSUBFWB = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_SUBFWB, + "SUBFWB", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER | PCC_C), // inCond + (PCC_W | PCC_STATUS), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciSUBWF = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_SUBWF, + "SUBWF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_REGISTER | PCC_STATUS), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciSUBFW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_SUBFW, + "SUBWF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_W | PCC_STATUS), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciSUBFWB_D1 = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_SUBFWB_D1, + "SUBFWB", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER | PCC_C), // inCond + (PCC_REGISTER | PCC_STATUS), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciSUBFWB_D0 = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_SUBFWB_D0, + "SUBFWB", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER | PCC_C), // inCond + (PCC_W | PCC_STATUS), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciSUBWFB_D1 = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_SUBWFB_D1, + "SUBWFB", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER | PCC_C), // inCond + (PCC_REGISTER | PCC_STATUS), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciSUBWFB_D0 = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_SUBWFB_D0, + "SUBWFB", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER | PCC_C), // inCond + (PCC_W | PCC_STATUS), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciSWAPF = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_SWAPF, + "SWAPF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_REGISTER), // inCond + (PCC_REGISTER), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciSWAPFW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_SWAPFW, + "SWAPF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_REGISTER), // inCond + (PCC_W), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciTBLRD = { // patch 15 + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_TBLRD, + "TBLRD*", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciTBLRD_POSTINC = { // patch 15 + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_TBLRD_POSTINC, + "TBLRD*+", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciTBLRD_POSTDEC = { // patch 15 + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_TBLRD_POSTDEC, + "TBLRD*-", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciTBLRD_PREINC = { // patch 15 + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_TBLRD_PREINC, + "TBLRD+*", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciTBLWT = { // patch 15 + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_TBLWT, + "TBLWT*", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciTBLWT_POSTINC = { // patch 15 + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_TBLWT_POSTINC, + "TBLWT*+", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciTBLWT_POSTDEC = { // patch 15 + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_TBLWT_POSTDEC, + "TBLWT*-", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciTBLWT_PREINC = { // patch 15 + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_TBLWT_PREINC, + "TBLWT+*", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE , // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciTSTFSZ = { // mdubuc - New + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_TSTFSZ, + "TSTFSZ", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 2, // num ops + 0,0, // dest, bit instruction + 1,1, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_REGISTER, // inCond + PCC_NONE, // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciXORWF = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_XORWF, + "XORWF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 1,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_REGISTER | PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciXORFW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_XORFW, + "XORWF", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 3, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_REGISTER), // inCond + (PCC_W | PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; + +pCodeInstruction pic16_pciXORLW = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_XORLW, + "XORLW", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 1, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 1, // literal operand + 1, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + (PCC_W | PCC_LITERAL), // inCond + (PCC_W | PCC_Z | PCC_N), // outCond + PCI_MAGIC +}; + + +pCodeInstruction pic16_pciBANKSEL = { + {PC_OPCODE, NULL, NULL, 0, NULL, + genericDestruct, + genericPrint}, + POC_BANKSEL, + "BANKSEL", + 2, + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + 0, // RAM access bit + 0, // fast call/return mode select bit + 0, // second memory operand + 0, // second literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE, // outCond + PCI_MAGIC +}; + + +#define MAX_PIC16MNEMONICS 100 +pCodeInstruction *pic16Mnemonics[MAX_PIC16MNEMONICS]; + +extern set *externs; +extern regs *pic16_allocProcessorRegister(int rIdx, char * name, short po_type, int alias); +extern regs *pic16_allocInternalRegister(int rIdx, char * name, short po_type, int alias); + +void pic16_pCodeInitRegisters(void) +{ + static int initialized=0; + + if(initialized) + return; + + initialized = 1; + + pic16_pc_status.r = pic16_allocProcessorRegister(IDX_STATUS,"STATUS", PO_STATUS, 0x80); + pic16_pc_pcl.r = pic16_allocProcessorRegister(IDX_PCL,"PCL", PO_PCL, 0x80); + pic16_pc_pclath.r = pic16_allocProcessorRegister(IDX_PCLATH,"PCLATH", PO_PCLATH, 0x80); + pic16_pc_pclatu.r = pic16_allocProcessorRegister(IDX_PCLATU,"PCLATU", PO_PCLATU, 0x80); + pic16_pc_intcon.r = pic16_allocProcessorRegister(IDX_INTCON,"INTCON", PO_INTCON, 0x80); + pic16_pc_wreg.r = pic16_allocProcessorRegister(IDX_WREG,"WREG", PO_WREG, 0x80); + pic16_pc_bsr.r = pic16_allocProcessorRegister(IDX_BSR,"BSR", PO_BSR, 0x80); + + pic16_pc_tosl.r = pic16_allocProcessorRegister(IDX_TOSL,"TOSL", PO_SFR_REGISTER, 0x80); + pic16_pc_tosh.r = pic16_allocProcessorRegister(IDX_TOSH,"TOSH", PO_SFR_REGISTER, 0x80); + pic16_pc_tosu.r = pic16_allocProcessorRegister(IDX_TOSU,"TOSU", PO_SFR_REGISTER, 0x80); + + pic16_pc_tblptrl.r = pic16_allocProcessorRegister(IDX_TBLPTRL,"TBLPTRL", PO_SFR_REGISTER, 0x80); + pic16_pc_tblptrh.r = pic16_allocProcessorRegister(IDX_TBLPTRH,"TBLPTRH", PO_SFR_REGISTER, 0x80); + pic16_pc_tblptru.r = pic16_allocProcessorRegister(IDX_TBLPTRU,"TBLPTRU", PO_SFR_REGISTER, 0x80); + pic16_pc_tablat.r = pic16_allocProcessorRegister(IDX_TABLAT,"TABLAT", PO_SFR_REGISTER, 0x80); + + pic16_pc_fsr0l.r = pic16_allocProcessorRegister(IDX_FSR0L, "FSR0L", PO_FSR0, 0x80); + pic16_pc_fsr0h.r = pic16_allocProcessorRegister(IDX_FSR0H, "FSR0H", PO_FSR0, 0x80); + pic16_pc_fsr1l.r = pic16_allocProcessorRegister(IDX_FSR1L, "FSR1L", PO_FSR0, 0x80); + pic16_pc_fsr1h.r = pic16_allocProcessorRegister(IDX_FSR1H, "FSR1H", PO_FSR0, 0x80); + pic16_pc_fsr2l.r = pic16_allocProcessorRegister(IDX_FSR2L, "FSR2L", PO_FSR0, 0x80); + pic16_pc_fsr2h.r = pic16_allocProcessorRegister(IDX_FSR2H, "FSR2H", PO_FSR0, 0x80); + + pic16_stackpnt_lo = &pic16_pc_fsr1l; + pic16_stackpnt_hi = &pic16_pc_fsr1h; + pic16_stack_postdec = &pic16_pc_postdec1; + pic16_stack_postinc = &pic16_pc_postinc1; + pic16_stack_preinc = &pic16_pc_preinc1; + pic16_stack_plusw = &pic16_pc_plusw1; + + pic16_framepnt_lo = &pic16_pc_fsr2l; + pic16_framepnt_hi = &pic16_pc_fsr2h; + pic16_frame_postdec = &pic16_pc_postdec2; + pic16_frame_postinc = &pic16_pc_postinc2; + pic16_frame_preinc = &pic16_pc_preinc2; + pic16_frame_plusw = &pic16_pc_plusw2; + + pic16_pc_indf0.r = pic16_allocProcessorRegister(IDX_INDF0,"INDF0", PO_INDF0, 0x80); + pic16_pc_postinc0.r = pic16_allocProcessorRegister(IDX_POSTINC0, "POSTINC0", PO_INDF0, 0x80); + pic16_pc_postdec0.r = pic16_allocProcessorRegister(IDX_POSTDEC0, "POSTDEC0", PO_INDF0, 0x80); + pic16_pc_preinc0.r = pic16_allocProcessorRegister(IDX_PREINC0, "PREINC0", PO_INDF0, 0x80); + pic16_pc_plusw0.r = pic16_allocProcessorRegister(IDX_PLUSW0, "PLUSW0", PO_INDF0, 0x80); + + pic16_pc_indf1.r = pic16_allocProcessorRegister(IDX_INDF1,"INDF1", PO_INDF0, 0x80); + pic16_pc_postinc1.r = pic16_allocProcessorRegister(IDX_POSTINC1, "POSTINC1", PO_INDF0, 0x80); + pic16_pc_postdec1.r = pic16_allocProcessorRegister(IDX_POSTDEC1, "POSTDEC1", PO_INDF0, 0x80); + pic16_pc_preinc1.r = pic16_allocProcessorRegister(IDX_PREINC1, "PREINC1", PO_INDF0, 0x80); + pic16_pc_plusw1.r = pic16_allocProcessorRegister(IDX_PLUSW1, "PLUSW1", PO_INDF0, 0x80); + + pic16_pc_indf2.r = pic16_allocProcessorRegister(IDX_INDF2,"INDF2", PO_INDF0, 0x80); + pic16_pc_postinc2.r = pic16_allocProcessorRegister(IDX_POSTINC2, "POSTINC2", PO_INDF0, 0x80); + pic16_pc_postdec2.r = pic16_allocProcessorRegister(IDX_POSTDEC2, "POSTDEC2", PO_INDF0, 0x80); + pic16_pc_preinc2.r = pic16_allocProcessorRegister(IDX_PREINC2, "PREINC2", PO_INDF0, 0x80); + pic16_pc_plusw2.r = pic16_allocProcessorRegister(IDX_PLUSW2, "PLUSW2", PO_INDF0, 0x80); + + pic16_pc_prodl.r = pic16_allocProcessorRegister(IDX_PRODL, "PRODL", PO_PRODL, 0x80); + pic16_pc_prodh.r = pic16_allocProcessorRegister(IDX_PRODH, "PRODH", PO_PRODH, 0x80); + + + pic16_pc_eecon1.r = pic16_allocProcessorRegister(IDX_EECON1, "EECON1", PO_SFR_REGISTER, 0x80); + pic16_pc_eecon2.r = pic16_allocProcessorRegister(IDX_EECON2, "EECON2", PO_SFR_REGISTER, 0x80); + pic16_pc_eedata.r = pic16_allocProcessorRegister(IDX_EEDATA, "EEDATA", PO_SFR_REGISTER, 0x80); + pic16_pc_eeadr.r = pic16_allocProcessorRegister(IDX_EEADR, "EEADR", PO_SFR_REGISTER, 0x80); + + + pic16_pc_status.rIdx = IDX_STATUS; + pic16_pc_intcon.rIdx = IDX_INTCON; + pic16_pc_pcl.rIdx = IDX_PCL; + pic16_pc_pclath.rIdx = IDX_PCLATH; + pic16_pc_pclatu.rIdx = IDX_PCLATU; + pic16_pc_wreg.rIdx = IDX_WREG; + pic16_pc_bsr.rIdx = IDX_BSR; + + pic16_pc_tosl.rIdx = IDX_TOSL; + pic16_pc_tosh.rIdx = IDX_TOSH; + pic16_pc_tosu.rIdx = IDX_TOSU; + + pic16_pc_tblptrl.rIdx = IDX_TBLPTRL; + pic16_pc_tblptrh.rIdx = IDX_TBLPTRH; + pic16_pc_tblptru.rIdx = IDX_TBLPTRU; + pic16_pc_tablat.rIdx = IDX_TABLAT; + + pic16_pc_fsr0l.rIdx = IDX_FSR0L; + pic16_pc_fsr0h.rIdx = IDX_FSR0H; + pic16_pc_fsr1l.rIdx = IDX_FSR1L; + pic16_pc_fsr1h.rIdx = IDX_FSR1H; + pic16_pc_fsr2l.rIdx = IDX_FSR2L; + pic16_pc_fsr2h.rIdx = IDX_FSR2H; + pic16_pc_indf0.rIdx = IDX_INDF0; + pic16_pc_postinc0.rIdx = IDX_POSTINC0; + pic16_pc_postdec0.rIdx = IDX_POSTDEC0; + pic16_pc_preinc0.rIdx = IDX_PREINC0; + pic16_pc_plusw0.rIdx = IDX_PLUSW0; + pic16_pc_indf1.rIdx = IDX_INDF1; + pic16_pc_postinc1.rIdx = IDX_POSTINC1; + pic16_pc_postdec1.rIdx = IDX_POSTDEC1; + pic16_pc_preinc1.rIdx = IDX_PREINC1; + pic16_pc_plusw1.rIdx = IDX_PLUSW1; + pic16_pc_indf2.rIdx = IDX_INDF2; + pic16_pc_postinc2.rIdx = IDX_POSTINC2; + pic16_pc_postdec2.rIdx = IDX_POSTDEC2; + pic16_pc_preinc2.rIdx = IDX_PREINC2; + pic16_pc_plusw2.rIdx = IDX_PLUSW2; + pic16_pc_prodl.rIdx = IDX_PRODL; + pic16_pc_prodh.rIdx = IDX_PRODH; + + pic16_pc_kzero.r = pic16_allocInternalRegister(IDX_KZ,"KZ",PO_GPR_REGISTER,0); + pic16_pc_ssave.r = pic16_allocInternalRegister(IDX_SSAVE,"SSAVE", PO_GPR_REGISTER, 0); + pic16_pc_wsave.r = pic16_allocInternalRegister(IDX_WSAVE,"WSAVE", PO_GPR_REGISTER, 0); + + pic16_pc_kzero.rIdx = IDX_KZ; + pic16_pc_wsave.rIdx = IDX_WSAVE; + pic16_pc_ssave.rIdx = IDX_SSAVE; + + pic16_pc_eecon1.rIdx = IDX_EECON1; + pic16_pc_eecon2.rIdx = IDX_EECON2; + pic16_pc_eedata.rIdx = IDX_EEDATA; + pic16_pc_eeadr.rIdx = IDX_EEADR; + + + pic16_pc_gpsimio.r = pic16_allocProcessorRegister(IDX_GPSIMIO, "GPSIMIO", PO_GPR_REGISTER, 0x80); + pic16_pc_gpsimio2.r = pic16_allocProcessorRegister(IDX_GPSIMIO2, "GPSIMIO2", PO_GPR_REGISTER, 0x80); + + pic16_pc_gpsimio.rIdx = IDX_GPSIMIO; + pic16_pc_gpsimio2.rIdx = IDX_GPSIMIO2; + + /* probably should put this in a separate initialization routine */ + pb_dead_pcodes = newpBlock(); + +} + +/*-----------------------------------------------------------------*/ +/* mnem2key - convert a pic mnemonic into a hash key */ +/* (BTW - this spreads the mnemonics quite well) */ +/* */ +/*-----------------------------------------------------------------*/ + +static int mnem2key(unsigned char const *mnem) +{ + int key = 0; + + if(!mnem) + return 0; + + while(*mnem) { + + key += toupper(*mnem++) +1; + + } + + return (key & 0x1f); + +} + +void pic16initMnemonics(void) +{ + int i = 0; + int key; + // char *str; + pCodeInstruction *pci; + + if(mnemonics_initialized) + return; + + // NULL out the array before making the assignments + // since we check the array contents below this initialization. + + for (i = 0; i < MAX_PIC16MNEMONICS; i++) { + pic16Mnemonics[i] = NULL; + } + + pic16Mnemonics[POC_ADDLW] = &pic16_pciADDLW; + pic16Mnemonics[POC_ADDWF] = &pic16_pciADDWF; + pic16Mnemonics[POC_ADDFW] = &pic16_pciADDFW; + pic16Mnemonics[POC_ADDWFC] = &pic16_pciADDWFC; + pic16Mnemonics[POC_ADDFWC] = &pic16_pciADDFWC; + pic16Mnemonics[POC_ANDLW] = &pic16_pciANDLW; + pic16Mnemonics[POC_ANDWF] = &pic16_pciANDWF; + pic16Mnemonics[POC_ANDFW] = &pic16_pciANDFW; + pic16Mnemonics[POC_BC] = &pic16_pciBC; + pic16Mnemonics[POC_BCF] = &pic16_pciBCF; + pic16Mnemonics[POC_BN] = &pic16_pciBN; + pic16Mnemonics[POC_BNC] = &pic16_pciBNC; + pic16Mnemonics[POC_BNN] = &pic16_pciBNN; + pic16Mnemonics[POC_BNOV] = &pic16_pciBNOV; + pic16Mnemonics[POC_BNZ] = &pic16_pciBNZ; + pic16Mnemonics[POC_BOV] = &pic16_pciBOV; + pic16Mnemonics[POC_BRA] = &pic16_pciBRA; + pic16Mnemonics[POC_BSF] = &pic16_pciBSF; + pic16Mnemonics[POC_BTFSC] = &pic16_pciBTFSC; + pic16Mnemonics[POC_BTFSS] = &pic16_pciBTFSS; + pic16Mnemonics[POC_BTG] = &pic16_pciBTG; + pic16Mnemonics[POC_BZ] = &pic16_pciBZ; + pic16Mnemonics[POC_CALL] = &pic16_pciCALL; + pic16Mnemonics[POC_CLRF] = &pic16_pciCLRF; + pic16Mnemonics[POC_CLRWDT] = &pic16_pciCLRWDT; + pic16Mnemonics[POC_COMF] = &pic16_pciCOMF; + pic16Mnemonics[POC_COMFW] = &pic16_pciCOMFW; + pic16Mnemonics[POC_CPFSEQ] = &pic16_pciCPFSEQ; + pic16Mnemonics[POC_CPFSGT] = &pic16_pciCPFSGT; + pic16Mnemonics[POC_CPFSLT] = &pic16_pciCPFSLT; + pic16Mnemonics[POC_DAW] = &pic16_pciDAW; + pic16Mnemonics[POC_DCFSNZ] = &pic16_pciDCFSNZ; + pic16Mnemonics[POC_DECF] = &pic16_pciDECF; + pic16Mnemonics[POC_DECFW] = &pic16_pciDECFW; + pic16Mnemonics[POC_DECFSZ] = &pic16_pciDECFSZ; + pic16Mnemonics[POC_DECFSZW] = &pic16_pciDECFSZW; + pic16Mnemonics[POC_GOTO] = &pic16_pciGOTO; + pic16Mnemonics[POC_INCF] = &pic16_pciINCF; + pic16Mnemonics[POC_INCFW] = &pic16_pciINCFW; + pic16Mnemonics[POC_INCFSZ] = &pic16_pciINCFSZ; + pic16Mnemonics[POC_INCFSZW] = &pic16_pciINCFSZW; + pic16Mnemonics[POC_INFSNZ] = &pic16_pciINFSNZ; + pic16Mnemonics[POC_INFSNZW] = &pic16_pciINFSNZW; + pic16Mnemonics[POC_IORWF] = &pic16_pciIORWF; + pic16Mnemonics[POC_IORFW] = &pic16_pciIORFW; + pic16Mnemonics[POC_IORLW] = &pic16_pciIORLW; + pic16Mnemonics[POC_LFSR] = &pic16_pciLFSR; + pic16Mnemonics[POC_MOVF] = &pic16_pciMOVF; + pic16Mnemonics[POC_MOVFW] = &pic16_pciMOVFW; + pic16Mnemonics[POC_MOVFF] = &pic16_pciMOVFF; + pic16Mnemonics[POC_MOVLB] = &pic16_pciMOVLB; + pic16Mnemonics[POC_MOVLW] = &pic16_pciMOVLW; + pic16Mnemonics[POC_MOVWF] = &pic16_pciMOVWF; + pic16Mnemonics[POC_MULLW] = &pic16_pciMULLW; + pic16Mnemonics[POC_MULWF] = &pic16_pciMULWF; + pic16Mnemonics[POC_NEGF] = &pic16_pciNEGF; + pic16Mnemonics[POC_NOP] = &pic16_pciNOP; + pic16Mnemonics[POC_POP] = &pic16_pciPOP; + pic16Mnemonics[POC_PUSH] = &pic16_pciPUSH; + pic16Mnemonics[POC_RCALL] = &pic16_pciRCALL; + pic16Mnemonics[POC_RETFIE] = &pic16_pciRETFIE; + pic16Mnemonics[POC_RETLW] = &pic16_pciRETLW; + pic16Mnemonics[POC_RETURN] = &pic16_pciRETURN; + pic16Mnemonics[POC_RLCF] = &pic16_pciRLCF; + pic16Mnemonics[POC_RLCFW] = &pic16_pciRLCFW; + pic16Mnemonics[POC_RLNCF] = &pic16_pciRLNCF; + pic16Mnemonics[POC_RLNCFW] = &pic16_pciRLNCFW; + pic16Mnemonics[POC_RRCF] = &pic16_pciRRCF; + pic16Mnemonics[POC_RRCFW] = &pic16_pciRRCFW; + pic16Mnemonics[POC_RRNCF] = &pic16_pciRRNCF; + pic16Mnemonics[POC_RRNCFW] = &pic16_pciRRNCFW; + pic16Mnemonics[POC_SETF] = &pic16_pciSETF; + pic16Mnemonics[POC_SUBLW] = &pic16_pciSUBLW; + pic16Mnemonics[POC_SUBWF] = &pic16_pciSUBWF; + pic16Mnemonics[POC_SUBFW] = &pic16_pciSUBFW; + pic16Mnemonics[POC_SUBWFB_D0] = &pic16_pciSUBWFB_D0; + pic16Mnemonics[POC_SUBWFB_D1] = &pic16_pciSUBWFB_D1; + pic16Mnemonics[POC_SUBFWB_D0] = &pic16_pciSUBFWB_D0; + pic16Mnemonics[POC_SUBFWB_D1] = &pic16_pciSUBFWB_D1; + pic16Mnemonics[POC_SWAPF] = &pic16_pciSWAPF; + pic16Mnemonics[POC_SWAPFW] = &pic16_pciSWAPFW; + pic16Mnemonics[POC_TBLRD] = &pic16_pciTBLRD; + pic16Mnemonics[POC_TBLRD_POSTINC] = &pic16_pciTBLRD_POSTINC; + pic16Mnemonics[POC_TBLRD_POSTDEC] = &pic16_pciTBLRD_POSTDEC; + pic16Mnemonics[POC_TBLRD_PREINC] = &pic16_pciTBLRD_PREINC; + pic16Mnemonics[POC_TBLWT] = &pic16_pciTBLWT; + pic16Mnemonics[POC_TBLWT_POSTINC] = &pic16_pciTBLWT_POSTINC; + pic16Mnemonics[POC_TBLWT_POSTDEC] = &pic16_pciTBLWT_POSTDEC; + pic16Mnemonics[POC_TBLWT_PREINC] = &pic16_pciTBLWT_PREINC; + pic16Mnemonics[POC_TSTFSZ] = &pic16_pciTSTFSZ; + pic16Mnemonics[POC_XORLW] = &pic16_pciXORLW; + pic16Mnemonics[POC_XORWF] = &pic16_pciXORWF; + pic16Mnemonics[POC_XORFW] = &pic16_pciXORFW; + pic16Mnemonics[POC_BANKSEL] = &pic16_pciBANKSEL; + + for(i=0; imnemonic), pic16Mnemonics[i]); + pci = hTabFirstItem(pic16MnemonicsHash, &key); + + while(pci) { + DFPRINTF((stderr, "element %d key %d, mnem %s\n",i++,key,pci->mnemonic)); + pci = hTabNextItem(pic16MnemonicsHash, &key); + } + + mnemonics_initialized = 1; +} + +int pic16_getpCodePeepCommand(char *cmd); + +int pic16_getpCode(char *mnem,unsigned dest) +{ + + pCodeInstruction *pci; + int key = mnem2key((unsigned char *)mnem); + + if(!mnemonics_initialized) + pic16initMnemonics(); + + pci = hTabFirstItemWK(pic16MnemonicsHash, key); + + while(pci) { + + if(STRCASECMP(pci->mnemonic, mnem) == 0) { + if((pci->num_ops <= 1) + || (pci->isModReg == dest) + || (pci->isBitInst) + || (pci->num_ops <= 2 && pci->isAccess) + || (pci->num_ops <= 2 && pci->isFastCall) + || (pci->num_ops <= 2 && pci->is2MemOp) + || (pci->num_ops <= 2 && pci->is2LitOp) ) + return(pci->op); + } + + pci = hTabNextItemWK (pic16MnemonicsHash); + + } + + return -1; +} + +/*-----------------------------------------------------------------* + * pic16initpCodePeepCommands + * + *-----------------------------------------------------------------*/ +void pic16initpCodePeepCommands(void) +{ + + int key, i; + peepCommand *pcmd; + + i = 0; + do { + hTabAddItem(&pic16pCodePeepCommandsHash, + mnem2key((const unsigned char *)peepCommands[i].cmd), &peepCommands[i]); + i++; + } while (peepCommands[i].cmd); + + pcmd = hTabFirstItem(pic16pCodePeepCommandsHash, &key); + + while(pcmd) { + //fprintf(stderr, "peep command %s key %d\n",pcmd->cmd,pcmd->id); + pcmd = hTabNextItem(pic16pCodePeepCommandsHash, &key); + } + +} + +/*----------------------------------------------------------------- + * + * + *-----------------------------------------------------------------*/ + +int pic16_getpCodePeepCommand(char *cmd) +{ + + peepCommand *pcmd; + int key = mnem2key((unsigned char *)cmd); + + + pcmd = hTabFirstItemWK(pic16pCodePeepCommandsHash, key); + + while(pcmd) { + // fprintf(stderr," comparing %s to %s\n",pcmd->cmd,cmd); + if(STRCASECMP(pcmd->cmd, cmd) == 0) { + return pcmd->id; + } + + pcmd = hTabNextItemWK (pic16pCodePeepCommandsHash); + + } + + return -1; +} + +static char getpBlock_dbName(pBlock *pb) +{ + if(!pb) + return 0; + + if(pb->cmemmap) + return pb->cmemmap->dbName; + + return pb->dbName; +} +void pic16_pBlockConvert2ISR(pBlock *pb) +{ + if(!pb)return; + + if(pb->cmemmap)pb->cmemmap = NULL; + + pb->dbName = 'I'; + + if(pic16_pcode_verbose) + fprintf(stderr, "%s:%d converting to 'I'interrupt pBlock\n", __FILE__, __LINE__); +} + +void pic16_pBlockConvert2Absolute(pBlock *pb) +{ + if(!pb)return; + if(pb->cmemmap)pb->cmemmap = NULL; + + pb->dbName = 'A'; + + if(pic16_pcode_verbose) + fprintf(stderr, "%s:%d converting to 'A'bsolute pBlock\n", __FILE__, __LINE__); +} + +/*-----------------------------------------------------------------*/ +/* pic16_movepBlock2Head - given the dbname of a pBlock, move all */ +/* instances to the front of the doubly linked */ +/* list of pBlocks */ +/*-----------------------------------------------------------------*/ + +void pic16_movepBlock2Head(char dbName) +{ + pBlock *pb; + + + /* this can happen in sources without code, + * only variable definitions */ + if(!the_pFile)return; + + pb = the_pFile->pbHead; + + while(pb) { + + if(getpBlock_dbName(pb) == dbName) { + pBlock *pbn = pb->next; + pb->next = the_pFile->pbHead; + the_pFile->pbHead->prev = pb; + the_pFile->pbHead = pb; + + if(pb->prev) + pb->prev->next = pbn; + + // If the pBlock that we just moved was the last + // one in the link of all of the pBlocks, then we + // need to point the tail to the block just before + // the one we moved. + // Note: if pb->next is NULL, then pb must have + // been the last pBlock in the chain. + + if(pbn) + pbn->prev = pb->prev; + else + the_pFile->pbTail = pb->prev; + + pb = pbn; + + } else + pb = pb->next; + + } + +} + +void pic16_copypCode(FILE *of, char dbName) +{ + pBlock *pb; + + if(!of || !the_pFile) + return; + + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + if(getpBlock_dbName(pb) == dbName) { +// fprintf(stderr, "%s:%d: output of pb= 0x%p\n", __FILE__, __LINE__, pb); + pBlockStats(of,pb); + pic16_printpBlock(of,pb); + } + } + +} +void pic16_pcode_test(void) +{ + + DFPRINTF((stderr,"pcode is alive!\n")); + + //initMnemonics(); + + if(the_pFile) { + + pBlock *pb; + FILE *pFile; + char buffer[100]; + + /* create the file name */ + strcpy(buffer,dstFileName); + strcat(buffer,".p"); + + if( !(pFile = fopen(buffer, "w" ))) { + werror(E_FILE_OPEN_ERR,buffer); + exit(1); + } + + fprintf(pFile,"pcode dump\n\n"); + + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + fprintf(pFile,"\n\tNew pBlock\n\n"); + if(pb->cmemmap) + fprintf(pFile,"%s",pb->cmemmap->sname); + else + fprintf(pFile,"internal pblock"); + + fprintf(pFile,", dbName =%c\n",getpBlock_dbName(pb)); + pic16_printpBlock(pFile,pb); + } + } +} + + +unsigned long pic16_countInstructions(void) +{ + pBlock *pb; + pCode *pc; + unsigned long isize=0; + + if(!the_pFile)return -1; + + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + for(pc = pb->pcHead; pc; pc = pc->next) { + if(isPCI(pc) || isPCAD(pc))isize += PCI(pc)->isize; + } + } + return (isize); +} + + +/*-----------------------------------------------------------------*/ +/* int RegCond(pCodeOp *pcop) - if pcop points to the STATUS reg- */ +/* ister, RegCond will return the bit being referenced. */ +/* */ +/* fixme - why not just OR in the pcop bit field */ +/*-----------------------------------------------------------------*/ + +static int RegCond(pCodeOp *pcop) +{ + + if(!pcop) + return 0; + + if(!pcop->name)return 0; + + if(pcop->type == PO_GPR_BIT && !strcmp(pcop->name, pic16_pc_status.pcop.name)) { + switch(PCORB(pcop)->bit) { + case PIC_C_BIT: + return PCC_C; + case PIC_DC_BIT: + return PCC_DC; + case PIC_Z_BIT: + return PCC_Z; + } + + } + + return 0; +} + + +/*-----------------------------------------------------------------*/ +/* pic16_newpCode - create and return a newly initialized pCode */ +/* */ +/* fixme - rename this */ +/* */ +/* The purpose of this routine is to create a new Instruction */ +/* pCode. This is called by gen.c while the assembly code is being */ +/* generated. */ +/* */ +/* Inouts: */ +/* PIC_OPCODE op - the assembly instruction we wish to create. */ +/* (note that the op is analogous to but not the */ +/* same thing as the opcode of the instruction.) */ +/* pCdoeOp *pcop - pointer to the operand of the instruction. */ +/* */ +/* Outputs: */ +/* a pointer to the new malloc'd pCode is returned. */ +/* */ +/* */ +/* */ +/*-----------------------------------------------------------------*/ +pCode *pic16_newpCode (PIC_OPCODE op, pCodeOp *pcop) +{ + pCodeInstruction *pci ; + + if(!mnemonics_initialized) + pic16initMnemonics(); + + pci = Safe_calloc(1, sizeof(pCodeInstruction)); + + if((op>=0) && (op < MAX_PIC16MNEMONICS) && pic16Mnemonics[op]) { + memcpy(pci, pic16Mnemonics[op], sizeof(pCodeInstruction)); + pci->pcop = pcop; + + if(pci->inCond & PCC_EXAMINE_PCOP) + pci->inCond |= RegCond(pcop); + + if(pci->outCond & PCC_EXAMINE_PCOP) + pci->outCond |= RegCond(pcop); + + pci->pc.prev = pci->pc.next = NULL; + return (pCode *)pci; + } + + fprintf(stderr, "pCode mnemonic error %s,%d\n",__FUNCTION__,__LINE__); + exit(1); + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* pic16_newpCodeWild - create a "wild" as in wild card pCode */ +/* */ +/* Wild pcodes are used during the peep hole optimizer to serve */ +/* as place holders for any instruction. When a snippet of code is */ +/* compared to a peep hole rule, the wild card opcode will match */ +/* any instruction. However, the optional operand and label are */ +/* additional qualifiers that must also be matched before the */ +/* line (of assembly code) is declared matched. Note that the */ +/* operand may be wild too. */ +/* */ +/* Note, a wild instruction is specified just like a wild var: */ +/* %4 ; A wild instruction, */ +/* See the peeph.def file for additional examples */ +/* */ +/*-----------------------------------------------------------------*/ + +pCode *pic16_newpCodeWild(int pCodeID, pCodeOp *optional_operand, pCodeOp *optional_label) +{ + + pCodeWild *pcw; + + pcw = Safe_calloc(1,sizeof(pCodeWild)); + + pcw->pci.pc.type = PC_WILD; + pcw->pci.pc.prev = pcw->pci.pc.next = NULL; + pcw->pci.from = pcw->pci.to = pcw->pci.label = NULL; + pcw->pci.pc.pb = NULL; + + // pcw->pci.pc.analyze = genericAnalyze; + pcw->pci.pc.destruct = genericDestruct; + pcw->pci.pc.print = genericPrint; + + pcw->id = pCodeID; // this is the 'n' in %n + pcw->operand = optional_operand; + pcw->label = optional_label; + + pcw->mustBeBitSkipInst = 0; + pcw->mustNotBeBitSkipInst = 0; + pcw->invertBitSkipInst = 0; + + return ( (pCode *)pcw); + +} + + /*-----------------------------------------------------------------*/ +/* newPcodeInlineP - create a new pCode from a char string */ +/*-----------------------------------------------------------------*/ + + +pCode *pic16_newpCodeInlineP(char *cP) +{ + + pCodeComment *pcc ; + + pcc = Safe_calloc(1,sizeof(pCodeComment)); + + pcc->pc.type = PC_INLINE; + pcc->pc.prev = pcc->pc.next = NULL; + //pcc->pc.from = pcc->pc.to = pcc->pc.label = NULL; + pcc->pc.pb = NULL; + + // pcc->pc.analyze = genericAnalyze; + pcc->pc.destruct = genericDestruct; + pcc->pc.print = genericPrint; + + if(cP) + pcc->comment = Safe_strdup(cP); + else + pcc->comment = NULL; + + return ( (pCode *)pcc); + +} + +/*-----------------------------------------------------------------*/ +/* newPcodeCharP - create a new pCode from a char string */ +/*-----------------------------------------------------------------*/ + +pCode *pic16_newpCodeCharP(char *cP) +{ + + pCodeComment *pcc ; + + pcc = Safe_calloc(1,sizeof(pCodeComment)); + + pcc->pc.type = PC_COMMENT; + pcc->pc.prev = pcc->pc.next = NULL; + //pcc->pc.from = pcc->pc.to = pcc->pc.label = NULL; + pcc->pc.pb = NULL; + + // pcc->pc.analyze = genericAnalyze; + pcc->pc.destruct = genericDestruct; + pcc->pc.print = genericPrint; + + if(cP) + pcc->comment = Safe_strdup(cP); + else + pcc->comment = NULL; + + return ( (pCode *)pcc); + +} + +/*-----------------------------------------------------------------*/ +/* pic16_newpCodeFunction - */ +/*-----------------------------------------------------------------*/ + + +pCode *pic16_newpCodeFunction(char *mod,char *f) +{ + pCodeFunction *pcf; + + pcf = Safe_calloc(1,sizeof(pCodeFunction)); + + pcf->pc.type = PC_FUNCTION; + pcf->pc.prev = pcf->pc.next = NULL; + //pcf->pc.from = pcf->pc.to = pcf->pc.label = NULL; + pcf->pc.pb = NULL; + + // pcf->pc.analyze = genericAnalyze; + pcf->pc.destruct = genericDestruct; + pcf->pc.print = pCodePrintFunction; + + pcf->ncalled = 0; + pcf->absblock = 0; + + if(mod) { + pcf->modname = Safe_calloc(1,strlen(mod)+1); + strcpy(pcf->modname,mod); + } else + pcf->modname = NULL; + + if(f) { + pcf->fname = Safe_calloc(1,strlen(f)+1); + strcpy(pcf->fname,f); + } else + pcf->fname = NULL; + + pcf->stackusage = 0; + + return ( (pCode *)pcf); +} + +/*-----------------------------------------------------------------*/ +/* pic16_newpCodeFlow */ +/*-----------------------------------------------------------------*/ +static void destructpCodeFlow(pCode *pc) +{ + if(!pc || !isPCFL(pc)) + return; + +/* + if(PCFL(pc)->from) + if(PCFL(pc)->to) +*/ + pic16_unlinkpCode(pc); + + deleteSet(&PCFL(pc)->registers); + deleteSet(&PCFL(pc)->from); + deleteSet(&PCFL(pc)->to); + + /* Instead of deleting the memory used by this pCode, mark + * the object as bad so that if there's a pointer to this pCode + * dangling around somewhere then (hopefully) when the type is + * checked we'll catch it. + */ + + pc->type = PC_BAD; + pic16_addpCode2pBlock(pb_dead_pcodes, pc); + +// Safe_free(pc); + +} + +pCode *pic16_newpCodeFlow(void ) +{ + pCodeFlow *pcflow; + + //_ALLOC(pcflow,sizeof(pCodeFlow)); + pcflow = Safe_calloc(1,sizeof(pCodeFlow)); + + pcflow->pc.type = PC_FLOW; + pcflow->pc.prev = pcflow->pc.next = NULL; + pcflow->pc.pb = NULL; + + // pcflow->pc.analyze = genericAnalyze; + pcflow->pc.destruct = destructpCodeFlow; + pcflow->pc.print = genericPrint; + + pcflow->pc.seq = GpcFlowSeq++; + + pcflow->from = pcflow->to = NULL; + + pcflow->inCond = PCC_NONE; + pcflow->outCond = PCC_NONE; + + pcflow->firstBank = -1; + pcflow->lastBank = -1; + + pcflow->FromConflicts = 0; + pcflow->ToConflicts = 0; + + pcflow->end = NULL; + + pcflow->registers = newSet(); + + return ( (pCode *)pcflow); + +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +pCodeFlowLink *pic16_newpCodeFlowLink(pCodeFlow *pcflow) +{ + pCodeFlowLink *pcflowLink; + + pcflowLink = Safe_calloc(1,sizeof(pCodeFlowLink)); + + pcflowLink->pcflow = pcflow; + pcflowLink->bank_conflict = 0; + + return pcflowLink; +} + +/*-----------------------------------------------------------------*/ +/* pic16_newpCodeCSource - create a new pCode Source Symbol */ +/*-----------------------------------------------------------------*/ + +pCode *pic16_newpCodeCSource(int ln, const char *f, const char *l) +{ + + pCodeCSource *pccs; + + pccs = Safe_calloc(1,sizeof(pCodeCSource)); + + pccs->pc.type = PC_CSOURCE; + pccs->pc.prev = pccs->pc.next = NULL; + pccs->pc.pb = NULL; + + pccs->pc.destruct = genericDestruct; + pccs->pc.print = genericPrint; + + pccs->line_number = ln; + if(l) + pccs->line = Safe_strdup(l); + else + pccs->line = NULL; + + if(f) + pccs->file_name = Safe_strdup(f); + else + pccs->file_name = NULL; + + return ( (pCode *)pccs); + +} + + +/*******************************************************************/ +/* pic16_newpCodeAsmDir - create a new pCode Assembler Directive */ +/* added by VR 6-Jun-2003 */ +/*******************************************************************/ + +pCode *pic16_newpCodeAsmDir(char *asdir, char *argfmt, ...) +{ + pCodeAsmDir *pcad; + va_list ap; + char buffer[512]; + char *lbp=buffer; + + pcad = Safe_calloc(1, sizeof(pCodeAsmDir)); + pcad->pci.pc.type = PC_ASMDIR; + pcad->pci.pc.prev = pcad->pci.pc.next = NULL; + pcad->pci.pc.pb = NULL; + pcad->pci.isize = 2; + pcad->pci.pc.destruct = genericDestruct; + pcad->pci.pc.print = genericPrint; + + if(asdir && *asdir) { + + while(isspace((unsigned char)*asdir))asdir++; // strip any white space from the beginning + + pcad->directive = Safe_strdup( asdir ); + } + + va_start(ap, argfmt); + + memset(buffer, 0, sizeof(buffer)); + if(argfmt && *argfmt) + vsprintf(buffer, argfmt, ap); + + va_end(ap); + + while(isspace((unsigned char)*lbp))lbp++; + + if(lbp && *lbp) + pcad->arg = Safe_strdup( lbp ); + + return ((pCode *)pcad); +} + +/*-----------------------------------------------------------------*/ +/* pCodeLabelDestruct - free memory used by a label. */ +/*-----------------------------------------------------------------*/ +static void pCodeLabelDestruct(pCode *pc) +{ + + if(!pc) + return; + + pic16_unlinkpCode(pc); + +// if((pc->type == PC_LABEL) && PCL(pc)->label) +// Safe_free(PCL(pc)->label); + + /* Instead of deleting the memory used by this pCode, mark + * the object as bad so that if there's a pointer to this pCode + * dangling around somewhere then (hopefully) when the type is + * checked we'll catch it. + */ + + pc->type = PC_BAD; + pic16_addpCode2pBlock(pb_dead_pcodes, pc); + +// Safe_free(pc); + +} + +pCode *pic16_newpCodeLabel(char *name, int key) +{ + + char *s = buffer; + pCodeLabel *pcl; + + pcl = Safe_calloc(1,sizeof(pCodeLabel) ); + + pcl->pc.type = PC_LABEL; + pcl->pc.prev = pcl->pc.next = NULL; + //pcl->pc.from = pcl->pc.to = pcl->pc.label = NULL; + pcl->pc.pb = NULL; + + // pcl->pc.analyze = genericAnalyze; + pcl->pc.destruct = pCodeLabelDestruct; + pcl->pc.print = pCodePrintLabel; + + pcl->key = key; + pcl->force = 0; + + pcl->label = NULL; + if(key>0) { + sprintf(s,"_%05d_DS_",key); + } else + s = name; + + if(s) + pcl->label = Safe_strdup(s); + +// if(pic16_pcode_verbose) +// fprintf(stderr, "%s:%d label name: %s\n", __FILE__, __LINE__, pcl->label); + + + return ( (pCode *)pcl); + +} + +pCode *pic16_newpCodeLabelFORCE(char *name, int key) +{ + pCodeLabel *pcl = (pCodeLabel *)pic16_newpCodeLabel(name, key); + + pcl->force = 1; + + return ( (pCode *)pcl ); +} + +pCode *pic16_newpCodeInfo(INFO_TYPE type, pCodeOp *pcop) +{ + pCodeInfo *pci; + + pci = Safe_calloc(1, sizeof(pCodeInfo)); + pci->pci.pc.type = PC_INFO; + pci->pci.pc.prev = pci->pci.pc.next = NULL; + pci->pci.pc.pb = NULL; + pci->pci.label = NULL; + + pci->pci.pc.destruct = genericDestruct; + pci->pci.pc.print = genericPrint; + + pci->type = type; + pci->oper1 = pcop; + + return ((pCode *)pci); +} + + +/*-----------------------------------------------------------------*/ +/* newpBlock - create and return a pointer to a new pBlock */ +/*-----------------------------------------------------------------*/ +static pBlock *newpBlock(void) +{ + + pBlock *PpB; + + PpB = Safe_calloc(1,sizeof(pBlock) ); + PpB->next = PpB->prev = NULL; + + PpB->function_entries = PpB->function_exits = PpB->function_calls = NULL; + PpB->tregisters = NULL; + PpB->visited = 0; + PpB->FlowTree = NULL; + + return PpB; + +} + +/*-----------------------------------------------------------------*/ +/* pic16_newpCodeChain - create a new chain of pCodes */ +/*-----------------------------------------------------------------* + * + * This function will create a new pBlock and the pointer to the + * pCode that is passed in will be the first pCode in the block. + *-----------------------------------------------------------------*/ + + +pBlock *pic16_newpCodeChain(memmap *cm,char c, pCode *pc) +{ + + pBlock *pB = newpBlock(); + + pB->pcHead = pB->pcTail = pc; + pB->cmemmap = cm; + pB->dbName = c; + + return pB; +} + + + +/*-----------------------------------------------------------------*/ +/* pic16_newpCodeOpLabel - Create a new label given the key */ +/* Note, a negative key means that the label is part of wild card */ +/* (and hence a wild card label) used in the pCodePeep */ +/* optimizations). */ +/*-----------------------------------------------------------------*/ + +pCodeOp *pic16_newpCodeOpLabel(char *name, int key) +{ + char *s=NULL; + static int label_key=-1; + + pCodeOp *pcop; + + pcop = Safe_calloc(1,sizeof(pCodeOpLabel) ); + pcop->type = PO_LABEL; + + pcop->name = NULL; + + if(key>0) + sprintf(s=buffer,"_%05d_DS_",key); + else + s = name, key = label_key--; + + if(s) + pcop->name = Safe_strdup(s); + + ((pCodeOpLabel *)pcop)->key = key; + + //fprintf(stderr,"pic16_newpCodeOpLabel: key=%d, name=%s\n",key,((s)?s:"")); + return pcop; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_newpCodeOpLit(int lit) +{ + char *s = buffer; + pCodeOp *pcop; + + + pcop = Safe_calloc(1,sizeof(pCodeOpLit) ); + pcop->type = PO_LITERAL; + + pcop->name = NULL; + //if(lit>=0) + sprintf(s,"0x%02hhx", (unsigned char)lit); + //else + // sprintf(s, "%i", lit); + + if(s) + pcop->name = Safe_strdup(s); + + ((pCodeOpLit *)pcop)->lit = lit; + + return pcop; +} + +/* Allow for 12 bit literals, required for LFSR */ +pCodeOp *pic16_newpCodeOpLit12(int lit) +{ + char *s = buffer; + pCodeOp *pcop; + + + pcop = Safe_calloc(1,sizeof(pCodeOpLit) ); + pcop->type = PO_LITERAL; + + pcop->name = NULL; + //if(lit>=0) + sprintf(s,"0x%03x", ((unsigned int)lit) & 0x0fff); + //else + // sprintf(s, "%i", lit); + + if(s) + pcop->name = Safe_strdup(s); + + ((pCodeOpLit *)pcop)->lit = lit; + + return pcop; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_newpCodeOpLit2(int lit, pCodeOp *arg2) +{ + char *s = buffer, tbuf[256], *tb=tbuf; + pCodeOp *pcop; + + + tb = pic16_get_op(arg2, NULL, 0); + pcop = Safe_calloc(1,sizeof(pCodeOpLit2) ); + pcop->type = PO_LITERAL; + + pcop->name = NULL; + //if(lit>=0) { + sprintf(s,"0x%02x, %s", (unsigned char)lit, tb); + if(s) + pcop->name = Safe_strdup(s); + //} + + ((pCodeOpLit2 *)pcop)->lit = lit; + ((pCodeOpLit2 *)pcop)->arg2 = arg2; + + return pcop; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_newpCodeOpImmd(char *name, int offset, int index, int code_space) +{ + pCodeOp *pcop; + + pcop = Safe_calloc(1,sizeof(pCodeOpImmd) ); + pcop->type = PO_IMMEDIATE; + if(name) { + regs *r = pic16_dirregWithName(name); + pcop->name = Safe_strdup(name); + PCOI(pcop)->r = r; + + if(r) { +// fprintf(stderr, "%s:%d %s reg %s exists (r: %p)\n",__FILE__, __LINE__, __FUNCTION__, name, r); + PCOI(pcop)->rIdx = r->rIdx; + } else { +// fprintf(stderr, "%s:%d %s reg %s doesn't exist\n", __FILE__, __LINE__, __FUNCTION__, name); + PCOI(pcop)->rIdx = -1; + } +// fprintf(stderr,"%s %s %d\n",__FUNCTION__,name,offset); + } else { + pcop->name = NULL; + PCOI(pcop)->rIdx = -1; + } + + PCOI(pcop)->index = index; + PCOI(pcop)->offset = offset; + PCOI(pcop)->_const = code_space; + + return pcop; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_newpCodeOpWild(int id, pCodeWildBlock *pcwb, pCodeOp *subtype) +{ + char *s = buffer; + pCodeOp *pcop; + + + if(!pcwb || !subtype) { + fprintf(stderr, "Wild opcode declaration error: %s-%d\n",__FILE__,__LINE__); + exit(1); + } + + pcop = Safe_calloc(1,sizeof(pCodeOpWild)); + pcop->type = PO_WILD; + sprintf(s,"%%%d",id); + pcop->name = Safe_strdup(s); + + PCOW(pcop)->id = id; + PCOW(pcop)->pcwb = pcwb; + PCOW(pcop)->subtype = subtype; + PCOW(pcop)->matched = NULL; + + PCOW(pcop)->pcop2 = NULL; + + return pcop; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_newpCodeOpWild2(int id, int id2, pCodeWildBlock *pcwb, pCodeOp *subtype, pCodeOp *subtype2) +{ + char *s = buffer; + pCodeOp *pcop; + + + if(!pcwb || !subtype || !subtype2) { + fprintf(stderr, "Wild opcode declaration error: %s-%d\n",__FILE__,__LINE__); + exit(1); + } + + pcop = Safe_calloc(1,sizeof(pCodeOpWild)); + pcop->type = PO_WILD; + sprintf(s,"%%%d",id); + pcop->name = Safe_strdup(s); + + PCOW(pcop)->id = id; + PCOW(pcop)->pcwb = pcwb; + PCOW(pcop)->subtype = subtype; + PCOW(pcop)->matched = NULL; + + PCOW(pcop)->pcop2 = Safe_calloc(1, sizeof(pCodeOpWild)); + + if(!subtype2->name) { + PCOW(pcop)->pcop2 = Safe_calloc(1, sizeof(pCodeOpWild)); + PCOW2(pcop)->pcop.type = PO_WILD; + sprintf(s, "%%%d", id2); + PCOW2(pcop)->pcop.name = Safe_strdup(s); + PCOW2(pcop)->id = id2; + PCOW2(pcop)->subtype = subtype2; + +// fprintf(stderr, "%s:%d %s [wild,wild] for name: %s (%d)\tname2: %s (%d)\n", __FILE__, __LINE__, __FUNCTION__, +// pcop->name, id, PCOW2(pcop)->pcop.name, id2); + } else { + PCOW2(pcop)->pcop2 = pic16_pCodeOpCopy( subtype2 ); + +// fprintf(stderr, "%s:%d %s [wild,str] for name: %s (%d)\tname2: %s (%d)\n", __FILE__, __LINE__, __FUNCTION__, +// pcop->name, id, PCOW2(pcop)->pcop.name, id2); + } + + + + return pcop; +} + + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_newpCodeOpBit(char *s, int bit, int inBitSpace, PIC_OPTYPE subt) +{ + pCodeOp *pcop; + + pcop = Safe_calloc(1,sizeof(pCodeOpRegBit) ); + pcop->type = PO_GPR_BIT; + if(s) + pcop->name = Safe_strdup(s); + else + pcop->name = NULL; + + PCORB(pcop)->bit = bit; + PCORB(pcop)->inBitSpace = inBitSpace; + PCORB(pcop)->subtype = subt; + + /* pCodeOpBit is derived from pCodeOpReg. We need to init this too */ + PCOR(pcop)->r = pic16_regWithName(s); //NULL; +// fprintf(stderr, "%s:%d %s for reg: %s\treg= %p\n", __FILE__, __LINE__, __FUNCTION__, s, PCOR(pcop)->r); +// PCOR(pcop)->rIdx = 0; + return pcop; +} + +pCodeOp *pic16_newpCodeOpBit_simple (struct asmop *op, int offs, int bit) +{ + return pic16_newpCodeOpBit (pic16_aopGet(op,offs,FALSE,FALSE), + bit, 0, PO_GPR_REGISTER); +} + + +/*-----------------------------------------------------------------* + * pCodeOp *pic16_newpCodeOpReg(int rIdx) - allocate a new register + * + * If rIdx >=0 then a specific register from the set of registers + * will be selected. If rIdx <0, then a new register will be searched + * for. + *-----------------------------------------------------------------*/ + +pCodeOp *pic16_newpCodeOpReg(int rIdx) +{ + pCodeOp *pcop; + regs *r; + + pcop = Safe_calloc(1,sizeof(pCodeOpReg) ); + + pcop->name = NULL; + + if(rIdx >= 0) { + r = pic16_regWithIdx(rIdx); + if(!r) + r = pic16_allocWithIdx(rIdx); + } else { + r = pic16_findFreeReg(REG_GPR); + + if(!r) { + fprintf(stderr, "%s:%d Could not find a free GPR register\n", + __FUNCTION__, __LINE__); + exit(EXIT_FAILURE); + } + } + + PCOR(pcop)->rIdx = rIdx; + PCOR(pcop)->r = r; + pcop->type = PCOR(pcop)->r->pc_type; + + return pcop; +} + +pCodeOp *pic16_newpCodeOpRegNotVect(bitVect *bv) +{ + pCodeOp *pcop; + regs *r; + + pcop = Safe_calloc(1, sizeof(pCodeOpReg)); + pcop->name = NULL; + + r = pic16_findFreeReg(REG_GPR); + + while(r) { + if(!bitVectBitValue(bv, r->rIdx)) { + PCOR(pcop)->r = r; + PCOR(pcop)->rIdx = r->rIdx; + pcop->type = r->pc_type; + return (pcop); + } + + r = pic16_findFreeRegNext(REG_GPR, r); + } + + return NULL; +} + + + +pCodeOp *pic16_newpCodeOpRegFromStr(char *name) +{ + pCodeOp *pcop; + regs *r; + + pcop = Safe_calloc(1,sizeof(pCodeOpReg) ); + PCOR(pcop)->r = r = pic16_allocRegByName(name, 1, NULL); + PCOR(pcop)->rIdx = PCOR(pcop)->r->rIdx; + pcop->type = PCOR(pcop)->r->pc_type; + pcop->name = PCOR(pcop)->r->name; + +// if(pic16_pcode_verbose) { +// fprintf(stderr, "%s:%d %s allocates register %s rIdx:0x%02x\n", +// __FILE__, __LINE__, __FUNCTION__, r->name, r->rIdx); +// } + + return pcop; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_newpCodeOpOpt(OPT_TYPE type, char *key) +{ + pCodeOpOpt *pcop; + + pcop = Safe_calloc(1, sizeof(pCodeOpOpt)); + + pcop->type = type; + pcop->key = Safe_strdup( key ); + + return (PCOP(pcop)); +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_newpCodeOpLocalRegs(LR_TYPE type) +{ + pCodeOpLocalReg *pcop; + + pcop = Safe_calloc(1, sizeof(pCodeOpLocalReg)); + + pcop->type = type; + + return (PCOP(pcop)); +} + + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ + +pCodeOp *pic16_newpCodeOp(char *name, PIC_OPTYPE type) +{ + pCodeOp *pcop; + + switch(type) { + case PO_BIT: + case PO_GPR_BIT: + pcop = pic16_newpCodeOpBit(name, -1,0, type); + break; + + case PO_LITERAL: + pcop = pic16_newpCodeOpLit(-1); + break; + + case PO_LABEL: + pcop = pic16_newpCodeOpLabel(NULL,-1); + break; + case PO_GPR_TEMP: + pcop = pic16_newpCodeOpReg(-1); + break; + + case PO_GPR_REGISTER: + if(name) + pcop = pic16_newpCodeOpRegFromStr(name); + else + pcop = pic16_newpCodeOpReg(-1); + break; + + case PO_TWO_OPS: + assert( !"Cannot create PO_TWO_OPS from string!" ); + pcop = NULL; + break; + + default: + pcop = Safe_calloc(1,sizeof(pCodeOp) ); + pcop->type = type; + if(name) + pcop->name = Safe_strdup(name); + else + pcop->name = NULL; + } + + return pcop; +} + +pCodeOp *pic16_newpCodeOp2(pCodeOp *src, pCodeOp *dst) +{ + pCodeOp2 *pcop2 = Safe_calloc(1, sizeof(pCodeOp2)); + pcop2->pcop.type = PO_TWO_OPS; + pcop2->pcopL = src; + pcop2->pcopR = dst; + return PCOP(pcop2); +} + +/* This is a multiple of two as gpasm pads DB directives to even length, + * thus the data would be interleaved with \0 bytes... + * This is a multiple of three in order to have arrays of 3-byte pointers + * continuously in memory (without 0-padding at the lines' end). + * This is rather 12 than 6 in order not to split up 4-byte data types + * in arrays right in the middle of a 4-byte word. */ +#define DB_ITEMS_PER_LINE 12 + +typedef struct DBdata + { + int count; + char buffer[512]; + } DBdata; + +struct DBdata DBd; +static int DBd_init = -1; + +/*-----------------------------------------------------------------*/ +/* Initialiase "DB" data buffer */ +/*-----------------------------------------------------------------*/ +void pic16_initDB(void) +{ + DBd_init = -1; +} + + +/*-----------------------------------------------------------------*/ +/* Flush pending "DB" data to a pBlock */ +/* */ +/* ptype - type of p pointer, 'f' file pointer, 'p' pBlock pointer */ +/*-----------------------------------------------------------------*/ +void pic16_flushDB(char ptype, void *p) +{ + if (DBd.count>0) { + if(ptype == 'p') + pic16_addpCode2pBlock(((pBlock *)p),pic16_newpCodeAsmDir("DB", "%s", DBd.buffer)); + else + if(ptype == 'f') + fprintf(((FILE *)p), "\tdb\t%s\n", DBd.buffer); + else { + /* sanity check */ + fprintf(stderr, "PIC16 port error: could not emit initial value data\n"); + } + + DBd.count = 0; + DBd.buffer[0] = '\0'; + } +} + + +/*-----------------------------------------------------------------*/ +/* Add "DB" directives to a pBlock */ +/*-----------------------------------------------------------------*/ +void pic16_emitDB(int c, char ptype, void *p) +{ + int l; + + if (DBd_init<0) { + // we need to initialize + DBd_init = 0; + DBd.count = 0; + DBd.buffer[0] = '\0'; + } + + l = strlen(DBd.buffer); + sprintf(DBd.buffer+l,"%s0x%02x", (DBd.count>0?", ":""), c & 0xff); + +// fprintf(stderr, "%s:%d DBbuffer: '%s'\n", __FILE__, __LINE__, DBd.buffer); + + DBd.count++; + if (DBd.count>= DB_ITEMS_PER_LINE) + pic16_flushDB(ptype, p); +} + +void pic16_emitDS(char *s, char ptype, void *p) +{ + int l; + + if (DBd_init<0) { + // we need to initialize + DBd_init = 0; + DBd.count = 0; + DBd.buffer[0] = '\0'; + } + + l = strlen(DBd.buffer); + sprintf(DBd.buffer+l,"%s%s", (DBd.count>0?", ":""), s); + +// fprintf(stderr, "%s:%d DBbuffer: '%s'\n", __FILE__, __LINE__, DBd.buffer); + + DBd.count++; //=strlen(s); + if (DBd.count>=DB_ITEMS_PER_LINE) + pic16_flushDB(ptype, p); +} + + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +void pic16_pCodeConstString(char *name, char *value, unsigned length) +{ + pBlock *pb; + char *item; + static set *emittedSymbols = NULL; + + if(!name || !value) + return; + + /* keep track of emitted symbols to avoid multiple definition of str_ */ + if (emittedSymbols) { + /* scan set for name */ + for (item = setFirstItem (emittedSymbols); item; item = setNextItem (emittedSymbols)) + { + if (!strcmp (item,name)) { + //fprintf (stderr, "%s already emitted\n", name); + return; + } // if + } // for + } // if + addSet (&emittedSymbols, Safe_strdup (name)); + + //fprintf(stderr, " %s %s %s\n",__FUNCTION__,name,value); + + pb = pic16_newpCodeChain(NULL, 'P',pic16_newpCodeCharP("; Starting pCode block")); + + pic16_addpBlock(pb); + +// sprintf(buffer,"; %s = ", name); +// strcat(buffer, value); +// fputs(buffer, stderr); + +// pic16_addpCode2pBlock(pb,pic16_newpCodeCharP(buffer)); + pic16_addpCode2pBlock(pb,pic16_newpCodeLabel(name,-1)); + + while (length--) + pic16_emitDB(*value++, 'p', (void *)pb); + + pic16_flushDB('p', (void *)pb); +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +#if 0 +static void pCodeReadCodeTable(void) +{ + pBlock *pb; + + fprintf(stderr, " %s\n",__FUNCTION__); + + pb = pic16_newpCodeChain(NULL, 'P',pic16_newpCodeCharP("; Starting pCode block")); + + pic16_addpBlock(pb); + + pic16_addpCode2pBlock(pb,pic16_newpCodeCharP("; ReadCodeTable - built in function")); + pic16_addpCode2pBlock(pb,pic16_newpCodeCharP("; Inputs: temp1,temp2 = code pointer")); + pic16_addpCode2pBlock(pb,pic16_newpCodeCharP("; Outpus: W (from RETLW at temp2:temp1)")); + pic16_addpCode2pBlock(pb,pic16_newpCodeLabel("ReadCodeTable:",-1)); + + pic16_addpCode2pBlock(pb,pic16_newpCode(POC_MOVFW,pic16_newpCodeOpRegFromStr("temp2"))); + pic16_addpCode2pBlock(pb,pic16_newpCode(POC_MOVWF,pic16_newpCodeOpRegFromStr("PCLATH"))); + pic16_addpCode2pBlock(pb,pic16_newpCode(POC_MOVFW,pic16_newpCodeOpRegFromStr("temp1"))); + pic16_addpCode2pBlock(pb,pic16_newpCode(POC_MOVWF,pic16_newpCodeOpRegFromStr("PCL"))); + + +} +#endif +/*-----------------------------------------------------------------*/ +/* pic16_addpCode2pBlock - place the pCode into the pBlock linked list */ +/*-----------------------------------------------------------------*/ +void pic16_addpCode2pBlock(pBlock *pb, pCode *pc) +{ + + if(!pc) + return; + + if(!pb->pcHead) { + /* If this is the first pcode to be added to a block that + * was initialized with a NULL pcode, then go ahead and + * make this pcode the head and tail */ + pb->pcHead = pb->pcTail = pc; + } else { + // if(pb->pcTail) + pb->pcTail->next = pc; + + pc->prev = pb->pcTail; + pc->pb = pb; + + pb->pcTail = pc; + } +} + +/*-----------------------------------------------------------------*/ +/* pic16_addpBlock - place a pBlock into the pFile */ +/*-----------------------------------------------------------------*/ +void pic16_addpBlock(pBlock *pb) +{ + // fprintf(stderr," Adding pBlock: dbName =%c\n",getpBlock_dbName(pb)); + + if(!the_pFile) { + /* First time called, we'll pass through here. */ + //_ALLOC(the_pFile,sizeof(pFile)); + the_pFile = Safe_calloc(1,sizeof(pFile)); + the_pFile->pbHead = the_pFile->pbTail = pb; + the_pFile->functions = NULL; + return; + } + + the_pFile->pbTail->next = pb; + pb->prev = the_pFile->pbTail; + pb->next = NULL; + the_pFile->pbTail = pb; +} + +/*-----------------------------------------------------------------*/ +/* removepBlock - remove a pBlock from the pFile */ +/*-----------------------------------------------------------------*/ +static void removepBlock(pBlock *pb) +{ + pBlock *pbs; + + if(!the_pFile) + return; + + + //fprintf(stderr," Removing pBlock: dbName =%c\n",getpBlock_dbName(pb)); + + for(pbs = the_pFile->pbHead; pbs; pbs = pbs->next) { + if(pbs == pb) { + + if(pbs == the_pFile->pbHead) + the_pFile->pbHead = pbs->next; + + if (pbs == the_pFile->pbTail) + the_pFile->pbTail = pbs->prev; + + if(pbs->next) + pbs->next->prev = pbs->prev; + + if(pbs->prev) + pbs->prev->next = pbs->next; + + return; + + } + } + + fprintf(stderr, "Warning: call to %s:%s didn't find pBlock\n",__FILE__,__FUNCTION__); + +} + +/*-----------------------------------------------------------------*/ +/* printpCode - write the contents of a pCode to a file */ +/*-----------------------------------------------------------------*/ +static void printpCode(FILE *of, pCode *pc) +{ + + if(!pc || !of) + return; + + if(pc->print) { + pc->print(of,pc); + return; + } + + fprintf(of,"warning - unable to print pCode\n"); +} + +/*-----------------------------------------------------------------*/ +/* pic16_printpBlock - write the contents of a pBlock to a file */ +/*-----------------------------------------------------------------*/ +void pic16_printpBlock(FILE *of, pBlock *pb) +{ + pCode *pc; + + if(!pb)return; + + if(!of)of=stderr; + + for(pc = pb->pcHead; pc; pc = pc->next) { + if(isPCF(pc) && PCF(pc)->fname) { + fprintf(of, "S_%s_%s\tcode", PCF(pc)->modname, PCF(pc)->fname); + if(pb->dbName == 'A') { + absSym *ab; + for(ab=setFirstItem(absSymSet); ab; ab=setNextItem(absSymSet)) { +// fprintf(stderr, "%s:%d testing %s <-> %s\n", __FILE__, __LINE__, PCF(pc)->fname, ab->name); + if(!strcmp(ab->name, PCF(pc)->fname)) { +// fprintf(stderr, "%s:%d address = %x\n", __FILE__, __LINE__, ab->address); + if(ab->address != -1) + fprintf(of, "\t0X%06X", ab->address); + break; + } + } + } + fprintf(of, "\n"); + } + printpCode(of,pc); + } +} + +/*-----------------------------------------------------------------*/ +/* */ +/* pCode processing */ +/* */ +/* */ +/* */ +/*-----------------------------------------------------------------*/ +pCode * pic16_findNextInstruction(pCode *pci); +pCode * pic16_findPrevInstruction(pCode *pci); + +void pic16_unlinkpCode(pCode *pc) +{ + pCode *prev; + + if(pc) { +#ifdef PCODE_DEBUG + fprintf(stderr,"Unlinking: "); + printpCode(stderr, pc); +#endif + if(pc->prev) { + pc->prev->next = pc->next; + } else if (pc->pb && (pc->pb->pcHead == pc)) { + pc->pb->pcHead = pc->next; + } + if(pc->next) { + pc->next->prev = pc->prev; + } else if (pc->pb && (pc->pb->pcTail == pc)) { + pc->pb->pcTail = pc->prev; + } + + /* move C source line down (or up) */ + if (isPCI(pc) && PCI(pc)->cline) { + prev = pic16_findNextInstruction (pc->next); + if (prev && isPCI(prev) && !PCI(prev)->cline) { + PCI(prev)->cline = PCI(pc)->cline; + } else { + prev = pic16_findPrevInstruction (pc->prev); + if (prev && isPCI(prev) && !PCI(prev)->cline) + PCI(prev)->cline = PCI(pc)->cline; + } + } + pc->prev = pc->next = NULL; + } +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ + +static void genericDestruct(pCode *pc) +{ + + pic16_unlinkpCode(pc); + + if(isPCI(pc)) { + /* For instructions, tell the register (if there's one used) + * that it's no longer needed */ + regs *reg = pic16_getRegFromInstruction(pc); + if(reg) + deleteSetItem (&(reg->reglives.usedpCodes),pc); + + if(PCI(pc)->is2MemOp) { + reg = pic16_getRegFromInstruction2(pc); + if(reg) + deleteSetItem(&(reg->reglives.usedpCodes), pc); + } + } + + /* Instead of deleting the memory used by this pCode, mark + * the object as bad so that if there's a pointer to this pCode + * dangling around somewhere then (hopefully) when the type is + * checked we'll catch it. + */ + + pc->type = PC_BAD; + pic16_addpCode2pBlock(pb_dead_pcodes, pc); + + //Safe_free(pc); +} + + +void DEBUGpic16_emitcode (char *inst,char *fmt, ...); +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +/* modifiers for constant immediate */ +const char *immdmod[3]={"LOW", "HIGH", "UPPER"}; + +char *pic16_get_op(pCodeOp *pcop,char *buffer, size_t size) +{ + regs *r; + static char b[128]; + char *s; + int use_buffer = 1; // copy the string to the passed buffer pointer + + if(!buffer) { + buffer = b; + size = sizeof(b); + use_buffer = 0; // Don't bother copying the string to the buffer. + } + + if(pcop) { + + switch(pcop->type) { + case PO_W: + case PO_WREG: + case PO_PRODL: + case PO_PRODH: + case PO_INDF0: + case PO_FSR0: + if(use_buffer) { + SNPRINTF(buffer,size,"%s",PCOR(pcop)->r->name); + return (buffer); + } + return (PCOR(pcop)->r->name); + break; + case PO_GPR_TEMP: + r = pic16_regWithIdx(PCOR(pcop)->r->rIdx); + if(use_buffer) { + SNPRINTF(buffer,size,"%s",r->name); + return (buffer); + } + return (r->name); + break; + + case PO_IMMEDIATE: + s = buffer; + if(PCOI(pcop)->offset && PCOI(pcop)->offset<4) { + if(PCOI(pcop)->index) { + SNPRINTF(s,size, "%s(%s + %d)", + immdmod[ PCOI(pcop)->offset ], + pcop->name, + PCOI(pcop)->index); + } else { + SNPRINTF(s,size,"%s(%s)", + immdmod[ PCOI(pcop)->offset ], + pcop->name); + } + } else { + if(PCOI(pcop)->index) { + SNPRINTF(s,size, "%s(%s + %d)", + immdmod[ 0 ], + pcop->name, + PCOI(pcop)->index); + } else { + SNPRINTF(s,size, "%s(%s)", + immdmod[ 0 ], + pcop->name); + } + } + return (buffer); + break; + + case PO_GPR_REGISTER: + case PO_DIR: + s = buffer; + //size = sizeof(buffer); + if( PCOR(pcop)->instance) { + SNPRINTF(s,size,"(%s + %d)", + pcop->name, + PCOR(pcop)->instance ); + } else { + SNPRINTF(s,size,"%s",pcop->name); + } + return (buffer); + break; + + case PO_GPR_BIT: + s = buffer; + if(PCORB(pcop)->subtype == PO_GPR_TEMP) { + SNPRINTF(s, size, "%s", pcop->name); + } else { + if(PCORB(pcop)->pcor.instance) + SNPRINTF(s, size, "(%s + %d)", pcop->name, PCORB(pcop)->pcor.instance); + else + SNPRINTF(s, size, "%s", pcop->name); + } + return (buffer); + break; + + case PO_TWO_OPS: + return (pic16_get_op( PCOP2(pcop)->pcopL, use_buffer ? buffer : NULL, size )); + break; + + default: + if(pcop->name) { + if(use_buffer) { + SNPRINTF(buffer,size,"%s",pcop->name); + return (buffer); + } + return (pcop->name); + } + + } + return ("unhandled type for op1"); + } + + return ("NO operand1"); +} + +/*-----------------------------------------------------------------*/ +/* pic16_get_op2 - variant to support two memory operand commands */ +/*-----------------------------------------------------------------*/ +char *pic16_get_op2(pCodeOp *pcop,char *buffer, size_t size) +{ + + if(pcop && pcop->type == PO_TWO_OPS) { + return pic16_get_op( PCOP2(pcop)->pcopR, buffer, size ); + } + + return "NO operand2"; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static char *pic16_get_op_from_instruction( pCodeInstruction *pcc) +{ + + if(pcc ) + return pic16_get_op(pcc->pcop,NULL,0); + + /* gcc 3.2: warning: concatenation of string literals with __FUNCTION__ is deprecated + * return ("ERROR Null: "__FUNCTION__); + */ + return ("ERROR Null: pic16_get_op_from_instruction"); + +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void pCodeOpPrint(FILE *of, pCodeOp *pcop) +{ + + fprintf(of,"pcodeopprint- not implemented\n"); +} + +/*-----------------------------------------------------------------*/ +/* pic16_pCode2str - convert a pCode instruction to string */ +/*-----------------------------------------------------------------*/ +char *pic16_pCode2str(char *str, size_t size, pCode *pc) +{ + char *s = str; + regs *r; + +#if 0 + if(isPCI(pc) && (PCI(pc)->pci_magic != PCI_MAGIC)) { + fprintf(stderr, "%s:%d: pCodeInstruction initialization error in instruction %s, magic is %x (defaut: %x)\n", + __FILE__, __LINE__, PCI(pc)->mnemonic, PCI(pc)->pci_magic, PCI_MAGIC); + // exit(EXIT_FAILURE); + } +#endif + + switch(pc->type) { + + case PC_OPCODE: + SNPRINTF(s, size, "\t%s\t", PCI(pc)->mnemonic); + size -= strlen(s); + s += strlen(s); + + if( (PCI(pc)->num_ops >= 1) && (PCI(pc)->pcop)) { + + if (PCI(pc)->pcop->type == PO_TWO_OPS) + { + /* split into two phases due to static buffer in pic16_get_op() */ + SNPRINTF(s, size, "%s", + pic16_get_op((PCI(pc)->pcop), NULL, 0)); + size -= strlen(s); + s += strlen(s); + SNPRINTF(s, size, ", %s", + pic16_get_op2((PCI(pc)->pcop), NULL, 0)); + break; + } + + if(PCI(pc)->is2LitOp) { + SNPRINTF(s,size, "%s", PCOP(PCI(pc)->pcop)->name); + break; + } + + if(PCI(pc)->isBitInst) { + if(PCI(pc)->pcop->type != PO_GPR_BIT) { + if( (((pCodeOpRegBit *)(PCI(pc)->pcop))->inBitSpace) ) + SNPRINTF(s,size,"(%s >> 3), (%s & 7)", + PCI(pc)->pcop->name , + PCI(pc)->pcop->name ); + else + SNPRINTF(s,size,"%s,%d", pic16_get_op_from_instruction(PCI(pc)), + (((pCodeOpRegBit *)(PCI(pc)->pcop))->bit )); + + } else if(PCI(pc)->pcop->type == PO_GPR_BIT) { + SNPRINTF(s,size,"%s, %d", pic16_get_op_from_instruction(PCI(pc)),PCORB(PCI(pc)->pcop)->bit); + } else + SNPRINTF(s,size,"%s,0 ; ?bug", pic16_get_op_from_instruction(PCI(pc))); + } else { + + if(PCI(pc)->pcop->type == PO_GPR_BIT) { + if( PCI(pc)->num_ops == 3) + SNPRINTF(s,size,"(%s >> 3),%c",pic16_get_op_from_instruction(PCI(pc)),((PCI(pc)->isModReg) ? 'F':'W')); + else + SNPRINTF(s,size,"(1 << (%s & 7))",pic16_get_op_from_instruction(PCI(pc))); + } else { + SNPRINTF(s,size,"%s", pic16_get_op_from_instruction(PCI(pc))); + } + } + + if( PCI(pc)->num_ops == 3 || ((PCI(pc)->num_ops == 2) && (PCI(pc)->isAccess))) { + size -= strlen(s); + s += strlen(s); + if(PCI(pc)->num_ops == 3 && !PCI(pc)->isBitInst) { + SNPRINTF(s,size,", %c", ( (PCI(pc)->isModReg) ? 'F':'W')); + size -= strlen(s); + s += strlen(s); + } + + r = pic16_getRegFromInstruction(pc); + + if(PCI(pc)->isAccess) { + static char *bank_spec[2][2] = { + { "", ", ACCESS" }, /* gpasm uses access bank by default */ + { ", B", ", BANKED" }/* MPASM (should) use BANKED by default */ + }; + + SNPRINTF(s,size,"%s", bank_spec[(r && !isACCESS_BANK(r)) ? 1 : 0][pic16_mplab_comp ? 1 : 0]); + } + } + } + break; + + case PC_COMMENT: + /* assuming that comment ends with a \n */ + SNPRINTF(s,size,";%s", ((pCodeComment *)pc)->comment); + break; + + case PC_INFO: + SNPRINTF(s,size,"; info ==>"); + size -= strlen(s); + s += strlen(s); + switch( PCINF(pc)->type ) { + case INF_OPTIMIZATION: + SNPRINTF(s,size, " [optimization] %s\n", OPT_TYPE_STR[ PCOO(PCINF(pc)->oper1)->type ]); + break; + case INF_LOCALREGS: + SNPRINTF(s,size, " [localregs] %s\n", LR_TYPE_STR[ PCOLR(PCINF(pc)->oper1)->type ]); + break; + }; break; + + case PC_INLINE: + /* assuming that inline code ends with a \n */ + SNPRINTF(s,size,"%s", ((pCodeComment *)pc)->comment); + break; + + case PC_LABEL: + SNPRINTF(s,size,";label=%s, key=%d\n",PCL(pc)->label,PCL(pc)->key); + break; + case PC_FUNCTION: + SNPRINTF(s,size,";modname=%s,function=%s: id=%d\n",PCF(pc)->modname,PCF(pc)->fname); + break; + case PC_WILD: + SNPRINTF(s,size,";\tWild opcode: id=%d\n",PCW(pc)->id); + break; + case PC_FLOW: + SNPRINTF(s,size,";\t--FLOW change\n"); + break; + case PC_CSOURCE: + SNPRINTF(s,size,"%s\t.line\t%d; %s\t%s\n", ((pic16_mplab_comp || !options.debug)?";":""), + PCCS(pc)->line_number, PCCS(pc)->file_name, PCCS(pc)->line); + break; + case PC_ASMDIR: + if(PCAD(pc)->directive) { + SNPRINTF(s,size,"\t%s%s%s\n", PCAD(pc)->directive, PCAD(pc)->arg?"\t":"", PCAD(pc)->arg?PCAD(pc)->arg:""); + } else + if(PCAD(pc)->arg) { + /* special case to handle inline labels without a tab */ + SNPRINTF(s,size,"%s\n", PCAD(pc)->arg); + } + break; + + case PC_BAD: + SNPRINTF(s,size,";A bad pCode is being used\n"); + break; + } + + return str; +} + +/*-----------------------------------------------------------------*/ +/* genericPrint - the contents of a pCode to a file */ +/*-----------------------------------------------------------------*/ +static void genericPrint(FILE *of, pCode *pc) +{ + + if(!pc || !of) + return; + + switch(pc->type) { + case PC_COMMENT: +// fputs(((pCodeComment *)pc)->comment, of); + fprintf(of,"; %s\n", ((pCodeComment *)pc)->comment); + break; + + case PC_INFO: + { + pBranch *pbl = PCI(pc)->label; + while(pbl && pbl->pc) { + if(pbl->pc->type == PC_LABEL) + pCodePrintLabel(of, pbl->pc); + pbl = pbl->next; + } + } + + if(pic16_pcode_verbose) { + fprintf(of, "; info ==>"); + switch(((pCodeInfo *)pc)->type) { + case INF_OPTIMIZATION: + fprintf(of, " [optimization] %s\n", OPT_TYPE_STR[ PCOO(PCINF(pc)->oper1)->type ]); + break; + case INF_LOCALREGS: + fprintf(of, " [localregs] %s\n", LR_TYPE_STR[ PCOLR(PCINF(pc)->oper1)->type ]); + break; + } + }; + + break; + + case PC_INLINE: + fprintf(of,"%s\n", ((pCodeComment *)pc)->comment); + break; + + case PC_OPCODE: + // If the opcode has a label, print that first + { + pBranch *pbl = PCI(pc)->label; + while(pbl && pbl->pc) { + if(pbl->pc->type == PC_LABEL) + pCodePrintLabel(of, pbl->pc); + pbl = pbl->next; + } + } + + if(PCI(pc)->cline) + genericPrint(of,PCODE(PCI(pc)->cline)); + + { + char str[256]; + + pic16_pCode2str(str, 256, pc); + + fprintf(of,"%s",str); + /* Debug */ + if(pic16_debug_verbose) { + fprintf(of, "\t;key=%03x",pc->seq); + if(PCI(pc)->pcflow) + fprintf(of,", flow seq=%03x",PCI(pc)->pcflow->pc.seq); + } + } + fprintf(of, "\n"); + break; + + case PC_WILD: + fprintf(of,";\tWild opcode: id=%d\n",PCW(pc)->id); + if(PCW(pc)->pci.label) + pCodePrintLabel(of, PCW(pc)->pci.label->pc); + + if(PCW(pc)->operand) { + fprintf(of,";\toperand "); + pCodeOpPrint(of,PCW(pc)->operand ); + } + break; + + case PC_FLOW: + if(pic16_debug_verbose) { + fprintf(of,";<>Start of new flow, seq=0x%x",pc->seq); + if(PCFL(pc)->ancestor) + fprintf(of," ancestor = 0x%x", PCODE(PCFL(pc)->ancestor)->seq); + fprintf(of,"\n"); + + } + break; + + case PC_CSOURCE: +// fprintf(of,";#CSRC\t%s %d\t\t%s\n", PCCS(pc)->file_name, PCCS(pc)->line_number, PCCS(pc)->line); + fprintf(of,"%s\t.line\t%d; %s\t%s\n", ((pic16_mplab_comp || !options.debug)?";":""), + PCCS(pc)->line_number, PCCS(pc)->file_name, PCCS(pc)->line); + + break; + + case PC_ASMDIR: + { + pBranch *pbl = PCAD(pc)->pci.label; + while(pbl && pbl->pc) { + if(pbl->pc->type == PC_LABEL) + pCodePrintLabel(of, pbl->pc); + pbl = pbl->next; + } + } + if(PCAD(pc)->directive) { + fprintf(of, "\t%s%s%s\n", PCAD(pc)->directive, PCAD(pc)->arg?"\t":"", PCAD(pc)->arg?PCAD(pc)->arg:""); + } else + if(PCAD(pc)->arg) { + /* special case to handle inline labels without tab */ + fprintf(of, "%s\n", PCAD(pc)->arg); + } + break; + + case PC_LABEL: + default: + fprintf(of,"unknown pCode type %d\n",pc->type); + } + +} + +/*-----------------------------------------------------------------*/ +/* pCodePrintFunction - prints function begin/end */ +/*-----------------------------------------------------------------*/ + +static void pCodePrintFunction(FILE *of, pCode *pc) +{ + + if(!pc || !of) + return; + +#if 0 + if( ((pCodeFunction *)pc)->modname) + fprintf(of,"F_%s",((pCodeFunction *)pc)->modname); +#endif + + if(!PCF(pc)->absblock) { + if(PCF(pc)->fname) { + pBranch *exits = PCF(pc)->to; + int i=0; + + fprintf(of,"%s:", PCF(pc)->fname); + + if(pic16_pcode_verbose) + fprintf(of, "\t;Function start"); + + fprintf(of, "\n"); + + while(exits) { + i++; + exits = exits->next; + } + //if(i) i--; + + if(pic16_pcode_verbose) + fprintf(of,"; %d exit point%c\n",i, ((i==1) ? ' ':'s')); + + } else { + if((PCF(pc)->from && + PCF(pc)->from->pc->type == PC_FUNCTION && + PCF(PCF(pc)->from->pc)->fname) ) { + + if(pic16_pcode_verbose) + fprintf(of,"; exit point of %s\n",PCF(PCF(pc)->from->pc)->fname); + } else { + if(pic16_pcode_verbose) + fprintf(of,"; exit point [can't find entry point]\n"); + } + fprintf(of, "\n"); + } + } +} +/*-----------------------------------------------------------------*/ +/* pCodePrintLabel - prints label */ +/*-----------------------------------------------------------------*/ + +static void pCodePrintLabel(FILE *of, pCode *pc) +{ + + if(!pc || !of) + return; + + if(PCL(pc)->label) + fprintf(of,"%s:\n",PCL(pc)->label); + else if (PCL(pc)->key >=0) + fprintf(of,"_%05d_DS_:\n",PCL(pc)->key); + else + fprintf(of,";wild card label: id=%d\n",-PCL(pc)->key); + +} +/*-----------------------------------------------------------------*/ +/* unlinkpCodeFromBranch - Search for a label in a pBranch and */ +/* remove it if it is found. */ +/*-----------------------------------------------------------------*/ +static void unlinkpCodeFromBranch(pCode *pcl , pCode *pc) +{ + pBranch *b, *bprev; + + + bprev = NULL; + + if(pcl->type == PC_OPCODE || pcl->type == PC_INLINE || pcl->type == PC_ASMDIR) + b = PCI(pcl)->label; + else { + fprintf(stderr, "LINE %d. can't unlink from non opcode\n",__LINE__); + exit(1); + + } + + //fprintf (stderr, "%s \n",__FUNCTION__); + //pcl->print(stderr,pcl); + //pc->print(stderr,pc); + while(b) { + if(b->pc == pc) { + //fprintf (stderr, "found label\n"); + //pc->print(stderr, pc); + + /* Found a label */ + if(bprev) { + bprev->next = b->next; /* Not first pCode in chain */ +// Safe_free(b); + } else { + pc->destruct(pc); + PCI(pcl)->label = b->next; /* First pCode in chain */ +// Safe_free(b); + } + return; /* A label can't occur more than once */ + } + bprev = b; + b = b->next; + } + +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +pBranch * pic16_pBranchAppend(pBranch *h, pBranch *n) +{ + pBranch *b; + + if(!h) + return n; + + if(h == n) + return n; + + b = h; + while(b->next) + b = b->next; + + b->next = n; + + return h; + +} +/*-----------------------------------------------------------------*/ +/* pBranchLink - given two pcodes, this function will link them */ +/* together through their pBranches */ +/*-----------------------------------------------------------------*/ +static void pBranchLink(pCodeFunction *f, pCodeFunction *t) +{ + pBranch *b; + + // Declare a new branch object for the 'from' pCode. + + //_ALLOC(b,sizeof(pBranch)); + b = Safe_calloc(1,sizeof(pBranch)); + b->pc = PCODE(t); // The link to the 'to' pCode. + b->next = NULL; + + f->to = pic16_pBranchAppend(f->to,b); + + // Now do the same for the 'to' pCode. + + //_ALLOC(b,sizeof(pBranch)); + b = Safe_calloc(1,sizeof(pBranch)); + b->pc = PCODE(f); + b->next = NULL; + + t->from = pic16_pBranchAppend(t->from,b); + +} + +#if 1 +/*-----------------------------------------------------------------*/ +/* pBranchFind - find the pBranch in a pBranch chain that contains */ +/* a pCode */ +/*-----------------------------------------------------------------*/ +static pBranch *pBranchFind(pBranch *pb,pCode *pc) +{ + while(pb) { + + if(pb->pc == pc) + return pb; + + pb = pb->next; + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* pic16_pCodeUnlink - Unlink the given pCode from its pCode chain. */ +/*-----------------------------------------------------------------*/ +void pic16_pCodeUnlink(pCode *pc) +{ + pBranch *pb1,*pb2; + pCode *pc1; + + if (!pc) { + return; + } + + /* Remove the branches */ + + pb1 = PCI(pc)->from; + while(pb1) { + pc1 = pb1->pc; /* Get the pCode that branches to the + * one we're unlinking */ + + /* search for the link back to this pCode (the one we're + * unlinking) */ + if((pb2 = pBranchFind(PCI(pc1)->to,pc))) { + pb2->pc = PCI(pc)->to->pc; // make the replacement + + /* if the pCode we're unlinking contains multiple 'to' + * branches (e.g. this a skip instruction) then we need + * to copy these extra branches to the chain. */ + if(PCI(pc)->to->next) + pic16_pBranchAppend(pb2, PCI(pc)->to->next); + } + + pb1 = pb1->next; + } + + pic16_unlinkpCode (pc); + +} +#endif +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +#if 0 +static void genericAnalyze(pCode *pc) +{ + switch(pc->type) { + case PC_WILD: + case PC_COMMENT: + return; + case PC_LABEL: + case PC_FUNCTION: + case PC_OPCODE: + { + // Go through the pCodes that are in pCode chain and link + // them together through the pBranches. Note, the pCodes + // are linked together as a contiguous stream like the + // assembly source code lines. The linking here mimics this + // except that comments are not linked in. + // + pCode *npc = pc->next; + while(npc) { + if(npc->type == PC_OPCODE || npc->type == PC_LABEL) { + pBranchLink(pc,npc); + return; + } else + npc = npc->next; + } + /* reached the end of the pcode chain without finding + * an instruction we could link to. */ + } + break; + case PC_FLOW: + fprintf(stderr,"analyze PC_FLOW\n"); + + return; + case PC_BAD: + fprintf(stderr,,";A bad pCode is being used\n"); + + } +} +#endif + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static int compareLabel(pCode *pc, pCodeOpLabel *pcop_label) +{ + pBranch *pbr; + + if(pc->type == PC_LABEL) { + if( ((pCodeLabel *)pc)->key == pcop_label->key) + return TRUE; + } + if((pc->type == PC_OPCODE) + || (pc->type == PC_ASMDIR) + ) { + pbr = PCI(pc)->label; + while(pbr) { + if(pbr->pc->type == PC_LABEL) { + if( ((pCodeLabel *)(pbr->pc))->key == pcop_label->key) + return TRUE; + } + pbr = pbr->next; + } + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static int checkLabel(pCode *pc) +{ + pBranch *pbr; + + if(pc && isPCI(pc)) { + pbr = PCI(pc)->label; + while(pbr) { + if(isPCL(pbr->pc) && (PCL(pbr->pc)->key >= 0)) + return TRUE; + + pbr = pbr->next; + } + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* findLabelinpBlock - Search the pCode for a particular label */ +/*-----------------------------------------------------------------*/ +static pCode * findLabelinpBlock(pBlock *pb,pCodeOpLabel *pcop_label) +{ + pCode *pc; + + if(!pb) + return NULL; + + for(pc = pb->pcHead; pc; pc = pc->next) + if(compareLabel(pc,pcop_label)) + return pc; + + return NULL; +} +#if 0 +/*-----------------------------------------------------------------*/ +/* findLabel - Search the pCode for a particular label */ +/*-----------------------------------------------------------------*/ +static pCode * findLabel(pCodeOpLabel *pcop_label) +{ + pBlock *pb; + pCode *pc; + + if(!the_pFile) + return NULL; + + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + if( (pc = findLabelinpBlock(pb,pcop_label)) != NULL) + return pc; + } + + fprintf(stderr,"Couldn't find label %s", pcop_label->pcop.name); + return NULL; +} +#endif +/*-----------------------------------------------------------------*/ +/* pic16_findNextpCode - given a pCode, find the next of type 'pct' */ +/* in the linked list */ +/*-----------------------------------------------------------------*/ +pCode * pic16_findNextpCode(pCode *pc, PC_TYPE pct) +{ + + while(pc) { + if(pc->type == pct) + return pc; + + pc = pc->next; + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* findPrevpCode - given a pCode, find the previous of type 'pct' */ +/* in the linked list */ +/*-----------------------------------------------------------------*/ +static pCode * findPrevpCode(pCode *pc, PC_TYPE pct) +{ + + while(pc) { + if(pc->type == pct) + return pc; + + pc = pc->prev; + } + + return NULL; +} + + +//#define PCODE_DEBUG +/*-----------------------------------------------------------------*/ +/* pic16_findNextInstruction - given a pCode, find the next instruction */ +/* in the linked list */ +/*-----------------------------------------------------------------*/ +pCode * pic16_findNextInstruction(pCode *pci) +{ + pCode *pc = pci; + + while(pc) { + if((pc->type == PC_OPCODE) + || (pc->type == PC_WILD) + || (pc->type == PC_ASMDIR) + ) + return pc; + +#ifdef PCODE_DEBUG + fprintf(stderr,"pic16_findNextInstruction: "); + printpCode(stderr, pc); +#endif + pc = pc->next; + } + + //fprintf(stderr,"Couldn't find instruction\n"); + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* pic16_findPrevInstruction - given a pCode, find the next instruction */ +/* in the linked list */ +/*-----------------------------------------------------------------*/ +pCode * pic16_findPrevInstruction(pCode *pci) +{ + pCode *pc = pci; + + while(pc) { + + if((pc->type == PC_OPCODE) + || (pc->type == PC_WILD) + || (pc->type == PC_ASMDIR) + ) + return pc; + + +#ifdef PCODE_DEBUG + fprintf(stderr,"pic16_findPrevInstruction: "); + printpCode(stderr, pc); +#endif + pc = pc->prev; + } + + //fprintf(stderr,"Couldn't find instruction\n"); + return NULL; +} + +#undef PCODE_DEBUG + +#if 0 +/*-----------------------------------------------------------------*/ +/* findFunctionEnd - given a pCode find the end of the function */ +/* that contains it */ +/*-----------------------------------------------------------------*/ +static pCode * findFunctionEnd(pCode *pc) +{ + + while(pc) { + if(pc->type == PC_FUNCTION && !(PCF(pc)->fname)) + return pc; + + pc = pc->next; + } + + fprintf(stderr,"Couldn't find function end\n"); + return NULL; +} +#endif +#if 0 +/*-----------------------------------------------------------------*/ +/* AnalyzeLabel - if the pCode is a label, then merge it with the */ +/* instruction with which it is associated. */ +/*-----------------------------------------------------------------*/ +static void AnalyzeLabel(pCode *pc) +{ + + pic16_pCodeUnlink(pc); + +} +#endif + +#if 0 +static void AnalyzeGOTO(pCode *pc) +{ + + pBranchLink(pc,findLabel( (pCodeOpLabel *) (PCI(pc)->pcop) )); + +} + +static void AnalyzeSKIP(pCode *pc) +{ + + pBranchLink(pc,pic16_findNextInstruction(pc->next)); + pBranchLink(pc,pic16_findNextInstruction(pc->next->next)); + +} + +static void AnalyzeRETURN(pCode *pc) +{ + + // branch_link(pc,findFunctionEnd(pc->next)); + +} + +#endif + +/*-------------------------------------------------------------------*/ +/* pic16_getRegFrompCodeOp - extract the register from a pCodeOp */ +/* if one is present. This is the common */ +/* part of pic16_getRegFromInstruction(2) */ +/*-------------------------------------------------------------------*/ + +regs * pic16_getRegFrompCodeOp (pCodeOp *pcop) { + if (!pcop) return NULL; + + switch(pcop->type) { + case PO_PRODL: + case PO_PRODH: + case PO_INDF0: + case PO_FSR0: + case PO_W: + case PO_WREG: + case PO_STATUS: + case PO_INTCON: + case PO_PCL: + case PO_PCLATH: + case PO_PCLATU: + case PO_BSR: + return PCOR(pcop)->r; + + case PO_SFR_REGISTER: + //fprintf (stderr, "%s - SFR\n", __FUNCTION__); + return PCOR(pcop)->r; + + case PO_BIT: + case PO_GPR_TEMP: +// fprintf(stderr, "pic16_getRegFromInstruction - bit or temp\n"); + return PCOR(pcop)->r; + + case PO_IMMEDIATE: +// return pic16_dirregWithName(PCOI(pcop)->r->name); + + if(PCOI(pcop)->r) + return (PCOI(pcop)->r); + else + return NULL; + + case PO_GPR_BIT: + return PCOR(pcop)->r; + + case PO_GPR_REGISTER: + case PO_DIR: +// fprintf(stderr, "pic16_getRegFromInstruction - dir\n"); + return PCOR(pcop)->r; + + case PO_LITERAL: + //fprintf(stderr, "pic16_getRegFromInstruction - literal\n"); + break; + + case PO_REL_ADDR: + case PO_LABEL: + //fprintf (stderr, "%s - label or address: %d (%s)\n", __FUNCTION__, pcop->type, dumpPicOptype(pcop->type)); + break; + + case PO_CRY: + case PO_STR: + /* this should never turn up */ + //fprintf (stderr, "%s - unused pCodeOp->type: %d (%s)\n", __FUNCTION__, pcop->type, dumpPicOptype(pcop->type)); + break; + + case PO_WILD: + break; + + case PO_TWO_OPS: + return pic16_getRegFrompCodeOp( PCOP2(pcop)->pcopL ); + break; + + default: + fprintf(stderr, "pic16_getRegFrompCodeOp - unknown reg type %d (%s)\n",pcop->type, dumpPicOptype (pcop->type)); +// assert( 0 ); + break; + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +regs * pic16_getRegFromInstruction(pCode *pc) +{ + if(!pc || + !isPCI(pc) || + !PCI(pc)->pcop || + PCI(pc)->num_ops == 0 || + (PCI(pc)->num_ops == 1 && PCI(pc)->isFastCall)) + return NULL; + +#if 0 + fprintf(stderr, "pic16_getRegFromInstruction - reg type %s (%d)\n", + dumpPicOptype( PCI(pc)->pcop->type), PCI(pc)->pcop->type); +#endif + + return( pic16_getRegFrompCodeOp (PCI(pc)->pcop) ); +} + +/*-------------------------------------------------------------------------------*/ +/* pic16_getRegFromInstruction2 - variant to support two memory operand commands */ +/*-------------------------------------------------------------------------------*/ +regs * pic16_getRegFromInstruction2(pCode *pc) +{ + + if(!pc || + !isPCI(pc) || + !PCI(pc)->pcop || + PCI(pc)->num_ops == 0 || + (PCI(pc)->num_ops == 1)) // accept only 2 operand commands + return NULL; + + if (PCI(pc)->pcop->type != PO_TWO_OPS) + return NULL; + +#if 0 + fprintf(stderr, "pic16_getRegFromInstruction2 - reg type %s (%d)\n", + dumpPicOptype( PCI(pc)->pcop->type), PCI(pc)->pcop->type); +#endif + + return pic16_getRegFrompCodeOp (PCOP2(PCI(pc)->pcop)->pcopR); +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ + +static void AnalyzepBlock(pBlock *pb) +{ + pCode *pc; + + if(!pb) + return; + + /* Find all of the registers used in this pBlock + * by looking at each instruction and examining it's + * operands + */ + for(pc = pb->pcHead; pc; pc = pc->next) { + + /* Is this an instruction with operands? */ + if(pc->type == PC_OPCODE && PCI(pc)->pcop) { + + if(PCI(pc)->pcop->type == PO_GPR_TEMP) { + + /* Loop through all of the registers declared so far in + this block and see if we find this one there */ + + regs *r = setFirstItem(pb->tregisters); + + while(r) { + if(r->rIdx == PCOR(PCI(pc)->pcop)->r->rIdx) { + PCOR(PCI(pc)->pcop)->r = r; + break; + } + r = setNextItem(pb->tregisters); + } + + if(!r) { + /* register wasn't found */ + //r = Safe_calloc(1, sizeof(regs)); + //memcpy(r,PCOR(PCI(pc)->pcop)->r, sizeof(regs)); + //addSet(&pb->tregisters, r); + addSet(&pb->tregisters, PCOR(PCI(pc)->pcop)->r); + //PCOR(PCI(pc)->pcop)->r = r; + //fprintf(stderr,"added register to pblock: reg %d\n",r->rIdx); + }/* else + fprintf(stderr,"found register in pblock: reg %d\n",r->rIdx); + */ + } + if(PCI(pc)->pcop->type == PO_GPR_REGISTER) { + if(PCOR(PCI(pc)->pcop)->r) { + pic16_allocWithIdx(PCOR(PCI(pc)->pcop)->r->rIdx); /* FIXME! - VR */ + DFPRINTF((stderr,"found register in pblock: reg 0x%x\n",PCOR(PCI(pc)->pcop)->r->rIdx)); + } else { + if(PCI(pc)->pcop->name) + fprintf(stderr,"ERROR: %s is a NULL register\n",PCI(pc)->pcop->name ); + else + fprintf(stderr,"ERROR: NULL register\n"); + } + } + } + + + } +} + +/*-----------------------------------------------------------------*/ +/* */ +/*-----------------------------------------------------------------*/ +#define PCI_HAS_LABEL(x) ((x) && (PCI(x)->label != NULL)) + +static void InsertpFlow(pCode *pc, pCode **pflow) +{ + if(*pflow) + PCFL(*pflow)->end = pc; + + if(!pc || !pc->next) + return; + + *pflow = pic16_newpCodeFlow(); + pic16_pCodeInsertAfter(pc, *pflow); +} + +/*-----------------------------------------------------------------*/ +/* pic16_BuildFlow(pBlock *pb) - examine the code in a pBlock and build */ +/* the flow blocks. */ +/* + * pic16_BuildFlow inserts pCodeFlow objects into the pCode chain at each + * point the instruction flow changes. + */ +/*-----------------------------------------------------------------*/ +void pic16_BuildFlow(pBlock *pb) +{ + pCode *pc; + pCode *last_pci=NULL; + pCode *pflow=NULL; + int seq = 0; + + if(!pb) + return; + + //fprintf (stderr,"build flow start seq %d ",GpcFlowSeq); + /* Insert a pCodeFlow object at the beginning of a pBlock */ + + InsertpFlow(pb->pcHead, &pflow); + + //pflow = pic16_newpCodeFlow(); /* Create a new Flow object */ + //pflow->next = pb->pcHead; /* Make the current head the next object */ + //pb->pcHead->prev = pflow; /* let the current head point back to the flow object */ + //pb->pcHead = pflow; /* Make the Flow object the head */ + //pflow->pb = pb; + + for( pc = pic16_findNextInstruction(pb->pcHead); + pc != NULL; + pc=pic16_findNextInstruction(pc)) { + + pc->seq = seq++; + PCI(pc)->pcflow = PCFL(pflow); + + //fprintf(stderr," build: "); + //pflow->print(stderr,pflow); + + if (checkLabel(pc)) { + + /* This instruction marks the beginning of a + * new flow segment */ + + pc->seq = 0; + seq = 1; + + /* If the previous pCode is not a flow object, then + * insert a new flow object. (This check prevents + * two consecutive flow objects from being insert in + * the case where a skip instruction preceeds an + * instruction containing a label.) */ + + if(last_pci && (PCI(last_pci)->pcflow == PCFL(pflow))) + InsertpFlow(pic16_findPrevInstruction(pc->prev), &pflow); + + PCI(pc)->pcflow = PCFL(pflow); + + } + + if( PCI(pc)->isSkip) { + + /* The two instructions immediately following this one + * mark the beginning of a new flow segment */ + + while(pc && PCI(pc)->isSkip) { + + PCI(pc)->pcflow = PCFL(pflow); + pc->seq = seq-1; + seq = 1; + + InsertpFlow(pc, &pflow); + pc=pic16_findNextInstruction(pc->next); + } + + seq = 0; + + if(!pc) + break; + + PCI(pc)->pcflow = PCFL(pflow); + pc->seq = 0; + InsertpFlow(pc, &pflow); + + } else if ( PCI(pc)->isBranch && !checkLabel(pic16_findNextInstruction(pc->next))) { + + InsertpFlow(pc, &pflow); + seq = 0; + + } + last_pci = pc; + pc = pc->next; + } + + //fprintf (stderr,",end seq %d",GpcFlowSeq); + if(pflow) + PCFL(pflow)->end = pb->pcTail; +} + +/*-------------------------------------------------------------------*/ +/* unBuildFlow(pBlock *pb) - examine the code in a pBlock and build */ +/* the flow blocks. */ +/* + * unBuildFlow removes pCodeFlow objects from a pCode chain + */ +/*-----------------------------------------------------------------*/ +static void unBuildFlow(pBlock *pb) +{ + pCode *pc,*pcnext; + + if(!pb) + return; + + pc = pb->pcHead; + + while(pc) { + pcnext = pc->next; + + if(isPCI(pc)) { + + pc->seq = 0; + if(PCI(pc)->pcflow) { + //Safe_free(PCI(pc)->pcflow); + PCI(pc)->pcflow = NULL; + } + + } else if(isPCFL(pc) ) + pc->destruct(pc); + + pc = pcnext; + } + + +} +#if 0 +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void dumpCond(int cond) +{ + + static char *pcc_str[] = { + //"PCC_NONE", + "PCC_REGISTER", + "PCC_C", + "PCC_Z", + "PCC_DC", + "PCC_OV", + "PCC_N", + "PCC_W", + "PCC_EXAMINE_PCOP", + "PCC_LITERAL", + "PCC_REL_ADDR" + }; + + int ncond = sizeof(pcc_str) / sizeof(char *); + int i,j; + + fprintf(stderr, "0x%04X\n",cond); + + for(i=0,j=1; ipc.seq); + + pc = pic16_findNextpCode(PCODE(pcflow), PC_OPCODE); + + if(!pc) { + fprintf(stderr, " FlowStats - empty flow (seq=%d)\n", pcflow->pc.seq); + return; + } + + + fprintf(stderr, " FlowStats inCond: "); + dumpCond(pcflow->inCond); + fprintf(stderr, " FlowStats outCond: "); + dumpCond(pcflow->outCond); + +} +#endif +/*-----------------------------------------------------------------* + * int isBankInstruction(pCode *pc) - examine the pCode *pc to determine + * if it affects the banking bits. + * + * return: -1 == Banking bits are unaffected by this pCode. + * + * return: > 0 == Banking bits are affected. + * + * If the banking bits are affected, then the returned value describes + * which bits are affected and how they're affected. The lower half + * of the integer maps to the bits that are affected, the upper half + * to whether they're set or cleared. + * + *-----------------------------------------------------------------*/ + +static int isBankInstruction(pCode *pc) +{ + regs *reg; + int bank = -1; + + if(!isPCI(pc)) + return 0; + + if( PCI(pc)->op == POC_MOVLB || + (( (reg = pic16_getRegFromInstruction(pc)) != NULL) && isBSR_REG(reg))) { + bank = PCOL(pc)->lit; + } + + return 1; +} + + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void FillFlow(pCodeFlow *pcflow) +{ + + pCode *pc; + int cur_bank; + + if(!isPCFL(pcflow)) + return; + + // fprintf(stderr, " FillFlow - flow block (seq=%d)\n", pcflow->pc.seq); + + pc = pic16_findNextpCode(PCODE(pcflow), PC_OPCODE); + + if(!pc) { + //fprintf(stderr, " FillFlow - empty flow (seq=%d)\n", pcflow->pc.seq); + return; + } + + cur_bank = -1; + + do { + isBankInstruction(pc); + pc = pc->next; + } while (pc && (pc != pcflow->end) && !isPCFL(pc)); + +/* + if(!pc ) { + fprintf(stderr, " FillFlow - Bad end of flow\n"); + } else { + fprintf(stderr, " FillFlow - Ending flow with\n "); + pc->print(stderr,pc); + } + + fprintf(stderr, " FillFlow inCond: "); + dumpCond(pcflow->inCond); + fprintf(stderr, " FillFlow outCond: "); + dumpCond(pcflow->outCond); +*/ +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void LinkFlow_pCode(pCodeInstruction *from, pCodeInstruction *to) +{ + pCodeFlowLink *fromLink, *toLink; + + if(!from || !to || !to->pcflow || !from->pcflow) + return; + + fromLink = pic16_newpCodeFlowLink(from->pcflow); + toLink = pic16_newpCodeFlowLink(to->pcflow); + + addSetIfnotP(&(from->pcflow->to), toLink); //to->pcflow); + addSetIfnotP(&(to->pcflow->from), fromLink); //from->pcflow); + +} + +pCode *pic16_getJumptabpCode (pCode *pc) { + pCode *pcinf; + + //fprintf (stderr, "%s - start for %p in %p", __FUNCTION__, pc, isPCI(pc) ? PCI(pc)->pcflow : NULL); + //pc->print (stderr, pc); + pcinf = pc; + while (pcinf) { + if (isPCI(pcinf) && PCI(pcinf)->op != POC_GOTO) return NULL; + if (pcinf->type == PC_INFO && PCINF(pcinf)->type == INF_OPTIMIZATION) { + switch (PCOO(PCINF(pcinf)->oper1)->type) { + case OPT_JUMPTABLE_BEGIN: + /* leading begin of jump table -- in one */ + pcinf = pic16_findPrevInstruction (pcinf); + return pcinf; + break; + + case OPT_JUMPTABLE_END: + /* leading end of jumptable -- not in one */ + return NULL; + break; + + default: + /* ignore all other PCInfos */ + break; + } + } + pcinf = pcinf->prev; + } + + /* no PCInfo found -- not in a jumptable */ + return NULL; +} + +/*-----------------------------------------------------------------* + * void LinkFlow(pBlock *pb) + * + * In pic16_BuildFlow, the PIC code has been partitioned into contiguous + * non-branching segments. In LinkFlow, we determine the execution + * order of these segments. For example, if one of the segments ends + * with a skip, then we know that there are two possible flow segments + * to which control may be passed. + *-----------------------------------------------------------------*/ +static void LinkFlow(pBlock *pb) +{ + pCode *pc=NULL; + pCode *pcflow; + pCode *pct; + pCode *jumptab_pre = NULL; + + //fprintf(stderr,"linkflow \n"); + + for( pcflow = pic16_findNextpCode(pb->pcHead, PC_FLOW); + pcflow != NULL; + pcflow = pic16_findNextpCode(pcflow->next, PC_FLOW) ) { + + if(!isPCFL(pcflow)) + fprintf(stderr, "LinkFlow - pcflow is not a flow object "); + + //fprintf(stderr," link: "); + //pcflow->print(stderr,pcflow); + + //FillFlow(PCFL(pcflow)); + + pc = PCFL(pcflow)->end; + + //fprintf(stderr, "LinkFlow - flow block (seq=%d) ", pcflow->seq); + if(isPCI_SKIP(pc)) { +// fprintf(stderr, "ends with skip\n"); +// pc->print(stderr,pc); + + pct=pic16_findNextInstruction(pc->next); + LinkFlow_pCode(PCI(pc),PCI(pct)); + pct=pic16_findNextInstruction(pct->next); + LinkFlow_pCode(PCI(pc),PCI(pct)); + continue; + } + + if(isPCI_BRANCH(pc)) { + pCodeOpLabel *pcol = PCOLAB(PCI(pc)->pcop); + + /* handle GOTOs in jumptables */ + if ((jumptab_pre = pic16_getJumptabpCode (pc)) != NULL) { + /* link to previous flow */ + //fprintf (stderr, "linked jumptable GOTO to predecessor %p\n", PCI(jumptab_pre)->pcflow); + LinkFlow_pCode (PCI(jumptab_pre), PCI(pc)); + } + + switch (PCI(pc)->op) { + case POC_GOTO: + case POC_BRA: + case POC_RETURN: + case POC_RETLW: + case POC_RETFIE: + /* unconditional branches -- do not link to next instruction */ + //fprintf (stderr, "%s: flow ended by unconditional branch\n", __FUNCTION__); + break; + + case POC_CALL: + case POC_RCALL: + /* unconditional calls -- link to next instruction */ + //fprintf (stderr, "%s: flow ended by CALL\n", __FUNCTION__); + LinkFlow_pCode(PCI(pc),PCI(pic16_findNextInstruction(pc->next))); + break; + + case POC_BC: + case POC_BN: + case POC_BNC: + case POC_BNN: + case POC_BNOV: + case POC_BNZ: + case POC_BOV: + case POC_BZ: + /* conditional branches -- also link to next instruction */ + //fprintf (stderr, "%s: flow ended by conditional branch\n", __FUNCTION__); + LinkFlow_pCode(PCI(pc),PCI(pic16_findNextInstruction(pc->next))); + break; + + default: + fprintf (stderr, "%s: unhandled op %u (%s)\n", __FUNCTION__, PCI(pc)->op , PCI(pc)->mnemonic); + assert (0 && "unhandled branching instruction"); + break; + } + + //fprintf(stderr, "ends with branch\n "); + //pc->print(stderr,pc); + + if(!(pcol && isPCOLAB(pcol))) { + if((PCI(pc)->op != POC_RETLW) + && (PCI(pc)->op != POC_RETURN) && (PCI(pc)->op != POC_CALL) && (PCI(pc)->op != POC_RCALL) && (PCI(pc)->op != POC_RETFIE) ) { + + /* continue if label is '$' which assembler knows how to parse */ + if(((PCI(pc)->pcop->type == PO_STR) && !strcmp(PCI(pc)->pcop->name, "$")))continue; + + if(pic16_pcode_verbose) { + pc->print(stderr,pc); + fprintf(stderr, "ERROR: %s, branch instruction doesn't have label\n",__FUNCTION__); + } + } + continue; + } + + if( (pct = findLabelinpBlock(pb,pcol)) != NULL) + LinkFlow_pCode(PCI(pc),PCI(pic16_findNextInstruction(pct))); + else + fprintf(stderr, "ERROR: %s, couldn't find label. key=%d,lab=%s\n", + __FUNCTION__,pcol->key,((PCOP(pcol)->name)?PCOP(pcol)->name:"-")); + +// fprintf(stderr,"pic16_newpCodeOpLabel: key=%d, name=%s\n",pcol->key,(PCOP(pcol)->name)?(PCOP(pcol)->name):""); + + continue; + } + + if(isPCI(pc)) { + //fprintf(stderr, "ends with non-branching instruction:\n"); + //pc->print(stderr,pc); + + LinkFlow_pCode(PCI(pc),PCI(pic16_findNextInstruction(pc->next))); + + continue; + } + + if(pc) { + //fprintf(stderr, "ends with unknown\n"); + //pc->print(stderr,pc); + continue; + } + + //fprintf(stderr, "ends with nothing: ERROR\n"); + + } +} +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +int pic16_isPCinFlow(pCode *pc, pCode *pcflow) +{ + + if(!pc || !pcflow) + return 0; + + if((!isPCI(pc) && !isPCAD(pc)) || !PCI(pc)->pcflow || !isPCFL(pcflow) ) + return 0; + + if( PCI(pc)->pcflow->pc.seq == pcflow->seq) + return 1; + + return 0; +} + + + + + +/*-----------------------------------------------------------------*/ +/* insertBankSwitch - inserts a bank switch statement in the */ +/* assembly listing */ +/* */ +/* position == 0: insert before */ +/* position == 1: insert after pc */ +/* position == 2: like 0 but previous was a skip instruction */ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_popGetLabel(unsigned int key); +extern int pic16_labelOffset; + +static void insertBankSwitch(unsigned char position, pCode *pc) +{ + pCode *new_pc; + + if(!pc) + return; + + /* emit BANKSEL [symbol] */ + + + new_pc = pic16_newpCodeAsmDir("BANKSEL", "%s", pic16_get_op_from_instruction(PCI(pc))); + +// position = 0; // position is always before (sanity check!) + +#if 0 + fprintf(stderr, "%s:%d: inserting bank switch (pos: %d)\n", __FUNCTION__, __LINE__, position); + pc->print(stderr, pc); +#endif + + switch(position) { + case 1: { + /* insert the bank switch after this pc instruction */ + pCode *pcnext = pic16_findNextInstruction(pc); + + pic16_pCodeInsertAfter(pc, new_pc); + if(pcnext)pc = pcnext; + }; break; + + case 0: + /* insert the bank switch BEFORE this pc instruction */ + pic16_pCodeInsertAfter(pc->prev, new_pc); + break; + + case 2: { + symbol *tlbl; + pCode *pcnext, *pcprev, *npci, *ppc; + PIC_OPCODE ipci; + int ofs1=0, ofs2=0, len=0; + + /* just like 0, but previous was a skip instruction, + * so some care should be taken */ + + pic16_labelOffset += 10000; + tlbl = newiTempLabel(NULL); + + /* invert skip instruction */ + pcprev = pic16_findPrevInstruction(pc->prev); + ipci = PCI(pcprev)->inverted_op; + npci = pic16_newpCode(ipci, PCI(pcprev)->pcop); + +// fprintf(stderr, "%s:%d old OP: %d\tnew OP: %d\n", __FILE__, __LINE__, PCI(pcprev)->op, ipci); + + /* copy info from old pCode */ + ofs1 = ofs2 = sizeof( pCode ) + sizeof(PIC_OPCODE); + len = sizeof(pCodeInstruction) - ofs1 - sizeof( char const * const *); + ofs1 += strlen( PCI(pcprev)->mnemonic) + 1; + ofs2 += strlen( PCI(npci)->mnemonic) + 1; + memcpy(&PCI(npci)->from, &PCI(pcprev)->from, (char *)(&(PCI(npci)->pci_magic)) - (char *)(&(PCI(npci)->from))); + PCI(npci)->op = PCI(pcprev)->inverted_op; + + /* unlink old pCode */ + ppc = pcprev->prev; + ppc->next = pcprev->next; + pcprev->next->prev = ppc; + pic16_pCodeInsertAfter(ppc, npci); + + /* extra instructions to handle invertion */ + pcnext = pic16_newpCode(POC_BRA, pic16_popGetLabel(tlbl->key)); + pic16_pCodeInsertAfter(npci, pcnext); + pic16_pCodeInsertAfter(pc->prev, new_pc); + + pcnext = pic16_newpCodeLabel(NULL,tlbl->key+100+pic16_labelOffset); + pic16_pCodeInsertAfter(pc, pcnext); + }; break; + } + + + /* Move the label, if there is one */ + if(PCI(pc)->label) { +// fprintf(stderr, "%s:%d: moving label due to bank switch directive src= 0x%p dst= 0x%p\n", +// __FILE__, __LINE__, pc, new_pc); + PCAD(new_pc)->pci.label = PCI(pc)->label; + PCI(pc)->label = NULL; + } +} + + +#if 0 +/*-----------------------------------------------------------------*/ +/*int compareBankFlow - compare the banking requirements between */ +/* flow objects. */ +/*-----------------------------------------------------------------*/ +static int compareBankFlow(pCodeFlow *pcflow, pCodeFlowLink *pcflowLink, int toORfrom) +{ + + if(!pcflow || !pcflowLink || !pcflowLink->pcflow) + return 0; + + if(!isPCFL(pcflow) || !isPCFL(pcflowLink->pcflow)) + return 0; + + if(pcflow->firstBank == -1) + return 0; + + + if(pcflowLink->pcflow->firstBank == -1) { + pCodeFlowLink *pctl = setFirstItem( toORfrom ? + pcflowLink->pcflow->to : + pcflowLink->pcflow->from); + return compareBankFlow(pcflow, pctl, toORfrom); + } + + if(toORfrom) { + if(pcflow->lastBank == pcflowLink->pcflow->firstBank) + return 0; + + pcflowLink->bank_conflict++; + pcflowLink->pcflow->FromConflicts++; + pcflow->ToConflicts++; + } else { + + if(pcflow->firstBank == pcflowLink->pcflow->lastBank) + return 0; + + pcflowLink->bank_conflict++; + pcflowLink->pcflow->ToConflicts++; + pcflow->FromConflicts++; + + } + /* + fprintf(stderr,"compare flow found conflict: seq %d from conflicts %d, to conflicts %d\n", + pcflowLink->pcflow->pc.seq, + pcflowLink->pcflow->FromConflicts, + pcflowLink->pcflow->ToConflicts); + */ + return 1; + +} +#endif + +#if 0 +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void DumpFlow(pBlock *pb) +{ + pCode *pc=NULL; + pCode *pcflow; + pCodeFlowLink *pcfl; + + + fprintf(stderr,"Dump flow \n"); + pb->pcHead->print(stderr, pb->pcHead); + + pcflow = pic16_findNextpCode(pb->pcHead, PC_FLOW); + pcflow->print(stderr,pcflow); + + for( pcflow = pic16_findNextpCode(pb->pcHead, PC_FLOW); + pcflow != NULL; + pcflow = pic16_findNextpCode(pcflow->next, PC_FLOW) ) { + + if(!isPCFL(pcflow)) { + fprintf(stderr, "DumpFlow - pcflow is not a flow object "); + continue; + } + fprintf(stderr,"dumping: "); + pcflow->print(stderr,pcflow); + FlowStats(PCFL(pcflow)); + + for(pcfl = setFirstItem(PCFL(pcflow)->to); pcfl; pcfl=setNextItem(PCFL(pcflow)->to)) { + + pc = PCODE(pcfl->pcflow); + + fprintf(stderr, " from seq %d:\n",pc->seq); + if(!isPCFL(pc)) { + fprintf(stderr,"oops dumpflow - from is not a pcflow\n"); + pc->print(stderr,pc); + } + + } + + for(pcfl = setFirstItem(PCFL(pcflow)->to); pcfl; pcfl=setNextItem(PCFL(pcflow)->to)) { + + pc = PCODE(pcfl->pcflow); + + fprintf(stderr, " to seq %d:\n",pc->seq); + if(!isPCFL(pc)) { + fprintf(stderr,"oops dumpflow - to is not a pcflow\n"); + pc->print(stderr,pc); + } + + } + + } + +} +#endif +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static int OptimizepBlock(pBlock *pb) +{ + pCode *pc, *pcprev; + int matches =0; + + if(!pb || !peepOptimizing) + return 0; + + DFPRINTF((stderr," Optimizing pBlock: %c\n",getpBlock_dbName(pb))); +/* + for(pc = pb->pcHead; pc; pc = pc->next) + matches += pic16_pCodePeepMatchRule(pc); +*/ + + pc = pic16_findNextInstruction(pb->pcHead); + if(!pc) + return 0; + + pcprev = pc->prev; + do { + + + if(pic16_pCodePeepMatchRule(pc)) { + + matches++; + + if(pcprev) + pc = pic16_findNextInstruction(pcprev->next); + else + pc = pic16_findNextInstruction(pb->pcHead); + } else + pc = pic16_findNextInstruction(pc->next); + } while(pc); + + if(matches) + DFPRINTF((stderr," Optimizing pBlock: %c - matches=%d\n",getpBlock_dbName(pb),matches)); + return matches; + +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static pCode * findInstructionUsingLabel(pCodeLabel *pcl, pCode *pcs) +{ + pCode *pc; + + for(pc = pcs; pc; pc = pc->next) { + + if(((pc->type == PC_OPCODE) || (pc->type == PC_INLINE) || (pc->type == PC_ASMDIR)) && + (PCI(pc)->pcop) && + (PCI(pc)->pcop->type == PO_LABEL) && + (PCOLAB(PCI(pc)->pcop)->key == pcl->key)) + return pc; + } + + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void exchangeLabels(pCodeLabel *pcl, pCode *pc) +{ + + char *s=NULL; + + if(isPCI(pc) && + (PCI(pc)->pcop) && + (PCI(pc)->pcop->type == PO_LABEL)) { + + pCodeOpLabel *pcol = PCOLAB(PCI(pc)->pcop); + +// fprintf(stderr,"changing label key from %d to %d\n",pcol->key, pcl->key); +// if(pcol->pcop.name) +// Safe_free(pcol->pcop.name); + + /* If the key is negative, then we (probably) have a label to + * a function and the name is already defined */ + + if(pcl->key>0) + sprintf(s=buffer,"_%05d_DS_",pcl->key); + else + s = pcl->label; + + //sprintf(buffer,"_%05d_DS_",pcl->key); + if(!s) { + fprintf(stderr, "ERROR %s:%d function label is null\n",__FUNCTION__,__LINE__); + } + pcol->pcop.name = Safe_strdup(s); + pcol->key = pcl->key; + //pc->print(stderr,pc); + + } + + +} + +/*-----------------------------------------------------------------*/ +/* pBlockRemoveUnusedLabels - remove the pCode labels from the */ +/* pCode chain if they're not used. */ +/*-----------------------------------------------------------------*/ +static void pBlockRemoveUnusedLabels(pBlock *pb) +{ + pCode *pc; pCodeLabel *pcl; + + if(!pb || !pb->pcHead) + return; + + for(pc = pb->pcHead; (pc=pic16_findNextInstruction(pc->next)) != NULL; ) { + + pBranch *pbr = PCI(pc)->label; + if(pbr && pbr->next) { + pCode *pcd = pb->pcHead; + +// fprintf(stderr, "multiple labels\n"); +// pc->print(stderr,pc); + + pbr = pbr->next; + while(pbr) { + + while ( (pcd = findInstructionUsingLabel(PCL(PCI(pc)->label->pc), pcd)) != NULL) { + //fprintf(stderr,"Used by:\n"); + //pcd->print(stderr,pcd); + + exchangeLabels(PCL(pbr->pc),pcd); + + pcd = pcd->next; + } + pbr = pbr->next; + } + } + } + + for(pc = pb->pcHead; pc; pc = pc->next) { + + if(isPCL(pc)) // pc->type == PC_LABEL) + pcl = PCL(pc); + else if (isPCI(pc) && PCI(pc)->label) //((pc->type == PC_OPCODE) && PCI(pc)->label) + pcl = PCL(PCI(pc)->label->pc); + else continue; + +// fprintf(stderr," found A LABEL !!! key = %d, %s\n", pcl->key,pcl->label); + + /* This pCode is a label, so search the pBlock to see if anyone + * refers to it */ + + if( (pcl->key>0) && (!findInstructionUsingLabel(pcl, pb->pcHead)) + && (!pcl->force)) { + //if( !findInstructionUsingLabel(pcl, pb->pcHead)) { + /* Couldn't find an instruction that refers to this label + * So, unlink the pCode label from it's pCode chain + * and destroy the label */ +// fprintf(stderr," removed A LABEL !!! key = %d, %s\n", pcl->key,pcl->label); + + DFPRINTF((stderr," !!! REMOVED A LABEL !!! key = %d, %s\n", pcl->key,pcl->label)); + if(pc->type == PC_LABEL) { + pic16_unlinkpCode(pc); + pCodeLabelDestruct(pc); + } else { + unlinkpCodeFromBranch(pc, PCODE(pcl)); + /*if(pc->label->next == NULL && pc->label->pc == NULL) { + Safe_free(pc->label); + }*/ + } + + } + } + +} + + +/*-----------------------------------------------------------------*/ +/* pic16_pBlockMergeLabels - remove the pCode labels from the pCode */ +/* chain and put them into pBranches that are */ +/* associated with the appropriate pCode */ +/* instructions. */ +/*-----------------------------------------------------------------*/ +void pic16_pBlockMergeLabels(pBlock *pb) +{ + pBranch *pbr; + pCode *pc, *pcnext=NULL; + + if(!pb) + return; + + /* First, Try to remove any unused labels */ + //pBlockRemoveUnusedLabels(pb); + + /* Now loop through the pBlock and merge the labels with the opcodes */ + + pc = pb->pcHead; + // for(pc = pb->pcHead; pc; pc = pc->next) { + + while(pc) { + pCode *pcn = pc->next; + + if(pc->type == PC_LABEL) { + +// fprintf(stderr," checking merging label %s\n",PCL(pc)->label); +// fprintf(stderr,"Checking label key = %d\n",PCL(pc)->key); + + if((pcnext = pic16_findNextInstruction(pc) )) { + +// pcnext->print(stderr, pcnext); + + // Unlink the pCode label from it's pCode chain + pic16_unlinkpCode(pc); + +// fprintf(stderr,"Merged label key = %d\n",PCL(pc)->key); + // And link it into the instruction's pBranch labels. (Note, since + // it's possible to have multiple labels associated with one instruction + // we must provide a means to accomodate the additional labels. Thus + // the labels are placed into the singly-linked list "label" as + // opposed to being a single member of the pCodeInstruction.) + + //_ALLOC(pbr,sizeof(pBranch)); +#if 1 + pbr = Safe_calloc(1,sizeof(pBranch)); + pbr->pc = pc; + pbr->next = NULL; + + PCI(pcnext)->label = pic16_pBranchAppend(PCI(pcnext)->label,pbr); +#endif + } else { + if(pic16_pcode_verbose) + fprintf(stderr, "WARNING: couldn't associate label %s with an instruction\n",PCL(pc)->label); + } + } else if(pc->type == PC_CSOURCE) { + + /* merge the source line symbolic info into the next instruction */ + if((pcnext = pic16_findNextInstruction(pc) )) { + + // Unlink the pCode label from it's pCode chain + pic16_unlinkpCode(pc); + PCI(pcnext)->cline = PCCS(pc); + //fprintf(stderr, "merging CSRC\n"); + //genericPrint(stderr,pcnext); + } + + } + pc = pcn; + } + pBlockRemoveUnusedLabels(pb); + +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static int OptimizepCode(char dbName) +{ +#define MAX_PASSES 4 + + int matches = 0; + int passes = 0; + pBlock *pb; + + if(!the_pFile) + return 0; + + DFPRINTF((stderr," Optimizing pCode\n")); + + do { + matches = 0; + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + if('*' == dbName || getpBlock_dbName(pb) == dbName) + matches += OptimizepBlock(pb); + } + } + while(matches && ++passes < MAX_PASSES); + + return matches; +} + + + +const char *pic16_pCodeOpType(pCodeOp *pcop); +const char *pic16_pCodeOpSubType(pCodeOp *pcop); + + +/*-----------------------------------------------------------------*/ +/* pic16_popCopyGPR2Bit - copy a pcode operator */ +/*-----------------------------------------------------------------*/ + +pCodeOp *pic16_popCopyGPR2Bit(pCodeOp *pc, int bitval) +{ + pCodeOp *pcop=NULL; + +// fprintf(stderr, "%s:%d pc type: %s\tname: %s\n", __FILE__, __LINE__, pic16_pCodeOpType(pc), pc->name); + + if(pc->name) { + pcop = pic16_newpCodeOpBit(pc->name, bitval, 0, pc->type); + } else { + if(PCOR(pc)->r)pcop = pic16_newpCodeOpBit(PCOR(pc)->r->name, bitval, 0, pc->type); + } + + assert(pcop != NULL); + + if( !( (pcop->type == PO_LABEL) || + (pcop->type == PO_LITERAL) || + (pcop->type == PO_STR) )) + PCOR(pcop)->r = PCOR(pc)->r; /* This is dangerous... */ + PCOR(pcop)->r->wasUsed = 1; + PCOR(pcop)->instance = PCOR(pc)->instance; + + return pcop; +} + + +/*----------------------------------------------------------------------* + * pic16_areRegsSame - check to see if the names of two registers match * + *----------------------------------------------------------------------*/ +int pic16_areRegsSame(regs *r1, regs *r2) +{ + if(!strcmp(r1->name, r2->name))return 1; + + return 0; +} + + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void pic16_FixRegisterBanking(pBlock *pb) +{ + pCode *pc=NULL; + pCode *pcprev=NULL; + regs *reg, *prevreg; + unsigned char flag=0; + + if(!pb) + return; + + pc = pic16_findNextpCode(pb->pcHead, PC_OPCODE); + if(!pc)return; + + /* loop through all of the flow blocks with in one pblock */ + +// fprintf(stderr,"%s:%d: Register banking\n", __FUNCTION__, __LINE__); + + prevreg = NULL; + do { + /* at this point, pc should point to a PC_FLOW object */ + /* for each flow block, determine the register banking + * requirements */ + + + /* if label, then might come from other point, force banksel */ + if(isPCL(pc))prevreg = NULL; + + if(!isPCI(pc))goto loop; + + if(PCI(pc)->label)prevreg = NULL; + + if(PCI(pc)->is2MemOp)goto loop; + + /* if goto, then force banksel */ +// if(PCI(pc)->op == POC_GOTO)prevreg = NULL; + + reg = pic16_getRegFromInstruction(pc); + +#if 0 + pc->print(stderr, pc); + fprintf(stderr, "reg = %p\n", reg); + + if(reg) { + fprintf(stderr, "%s:%d: %s %d\n",__FUNCTION__, __LINE__, reg->name, reg->rIdx); + fprintf(stderr, "addr = 0x%03x, bit=%d\tfix=%d\n", + reg->address,reg->isBitField, reg->isFixed); + } +#endif + + /* now make some tests to make sure that instruction needs bank switch */ + + /* if no register exists, and if not a bit opcode goto loop */ + if(!reg) { + if(!(PCI(pc)->pcop && PCI(pc)->pcop->type == PO_GPR_BIT))goto loop; + } + + if(isPCI_SKIP(pc)) { +// fprintf(stderr, "instruction is SKIP instruction\n"); +// prevreg = NULL; + } + if(reg && isACCESS_BANK(reg))goto loop; + + if(!isBankInstruction(pc))goto loop; + + if(isPCI_LIT(pc))goto loop; + + if(PCI(pc)->op == POC_CALL)goto loop; + + /* Examine the instruction before this one to make sure it is + * not a skip type instruction */ + pcprev = findPrevpCode(pc->prev, PC_OPCODE); + + flag = 0; /* add before this instruction */ + + /* if previous instruction is a skip one, then set flag + * to 2 and call insertBankSwitch */ + if(pcprev && isPCI_SKIP(pcprev)) { + flag=2; //goto loop +// prevreg = NULL; + } + + if(pic16_options.opt_banksel>0) { + char op1[128], op2[128]; + + if(prevreg) { + strcpy(op1, pic16_get_op_from_instruction(PCI(pc))); + strcpy(op2, pic16_get_op_from_instruction(PCI(pcprev))); + if(!strcmp(op1, op2))goto loop; + } + } + prevreg = reg; + insertBankSwitch(flag, pc); + +// fprintf(stderr, "BANK SWITCH inserted\n"); + +loop: + pcprev = pc; + pc = pc->next; + } while (pc); +} + +/** ADDITIONS BY RAPHAEL NEIDER, 2004-11-16: GOTO OPTIMIZATIONS **/ + +/* Returns the (maximum of the) number of bytes used by the specified pCode. */ +int instrSize (pCode *pc) +{ + if (!pc) return 0; + + if (isPCAD(pc)) { + if (!PCAD(pc)->directive || strlen (PCAD(pc)->directive) < 3) return 0; + return 4; // assumes only regular instructions using <= 4 bytes + } + + if (isPCI(pc)) return PCI(pc)->isize; + + return 0; +} + +/* Returns 1 if pc is referenced by the given label (either + * pc is the label itself or is an instruction with an attached + * label). + * Returns 0 if pc is not preceeded by the specified label. + */ +int isLabel (pCode *pc, char *label) +{ + if (!pc) return 0; + + // label attached to the pCode? + if (isPCI(pc) || isPCAD(pc) || isPCW(pc) || pc->type == PC_INFO) { + pBranch *lab = NULL; + lab = PCI(pc)->label; + + while (lab) { + if (isPCL(lab->pc) && strcmp(PCL(lab->pc)->label, label) == 0) { + return 1; + } + lab = lab->next; + } // while + } // if + + // is inline assembly label? + if (isPCAD(pc) && PCAD(pc)->directive == NULL && PCAD(pc)->arg) { + // do not compare trailing ':' + if (strncmp (PCAD(pc)->arg, label, strlen (label)) == 0) { + return 1; + } + } // if + + // is pCodeLabel? + if (isPCL(pc)) { + if (strcmp(PCL(pc)->label,label) == 0) { + return 1; + } + } // if + + // no label/no label attached/wrong label(s) + return 0; +} + +/* Returns the distance to the given label in terms of words. + * Labels are searched only within -max .. max words from pc. + * Returns max if the label could not be found or + * its distance from pc in (-max..+max). + */ +int findpCodeLabel (pCode *pc, char *label, int max, pCode **target) { + int dist = instrSize(pc); + pCode *curr = pc; + + // search backwards + while (dist < max && curr && !isLabel (curr, label)) { + curr = curr->prev; + dist += instrSize(curr); // sizeof (instruction) + } // while + if (curr && dist < max) { + if (target != NULL) *target = curr; + return -dist; + } + + dist = 0; + curr = pic16_findNextInstruction (pc->next); + //search forwards + while (dist < max && curr && !isLabel (curr, label)) { + dist += instrSize(curr); // sizeof (instruction) + curr = curr->next; + } // while + if (curr && dist < max) { + if (target != NULL) *target = curr; + return dist; + } + + if (target != NULL) *target = NULL; + return max; +} + +/* Returns -1 if pc does NOT denote an instruction like + * BTFS[SC] STATUS,i + * Otherwise we return + * (a) 0x10 + i for BTFSS + * (b) 0x00 + i for BTFSC + */ +int isSkipOnStatus (pCode *pc) +{ + int res = -1; + pCodeOp *pcop; + if (!pc || !isPCI(pc)) return -1; + if (PCI(pc)->op == POC_BTFSS) res = 0x10; + else if (PCI(pc)->op == POC_BTFSC) res = 0x00; + else return -1; + + pcop = PCI(pc)->pcop; + + if (pcop->type == PO_STATUS || (pcop->type == PO_GPR_BIT && strcmp(pcop->name, "STATUS") == 0)) { + return res + ((pCodeOpRegBit *)pcop)->bit; + } + + return -1; +} + +/* Returns 1 if pc is one of BC, BZ, BOV, BN, BNC, BNZ, BNOV or BNN, + * returns 0 otherwise. */ +int isConditionalBranch (pCode *pc) +{ + if (!pc || !isPCI_BRANCH(pc)) return 0; + + switch (PCI(pc)->op) { + case POC_BC: + case POC_BZ: + case POC_BOV: + case POC_BN: + case POC_BNC: + case POC_BNZ: + case POC_BNOV: + case POC_BNN: + return 1; + + default: + break; + } // switch + + return 0; +} + +/* Returns 1 if pc has a label attached to it. + * This can be either a label stored in the pCode itself (.label) + * or a label making up its own pCode preceding this pc. + * Returns 0 if pc cannot be reached directly via a label. + */ +int hasNoLabel (pCode *pc) +{ + pCode *prev; + if (!pc) return 1; + + // are there any label pCodes between pc and the previous instruction? + prev = pic16_findPrevInstruction (pc->prev); + while (pc && pc != prev) { + // pCode with attached label? + if ((isPCI(pc) || isPCAD(pc) || isPCW(pc) || pc->type == PC_INFO) + && PCI(pc)->label) { + return 0; + } + // is inline assembly label? + if (isPCAD(pc) && PCAD(pc)->directive == NULL) return 0; + if (isPCW(pc) && PCW(pc)->label) return 0; + + // pCodeLabel? + if (isPCL(pc)) return 0; + + pc = pc->prev; + } // if + + // no label found + return 1; +} + +static void pic16_InsertCommentAfter (pCode *pc, const char *fmt, ...) { + char buf[512]; + va_list va; + + va_start (va, fmt); + vsprintf (buf, fmt, va); + va_end (va); + + pic16_pCodeInsertAfter (pc, pic16_newpCodeCharP(buf)); +} + +/* Replaces the old pCode with the new one, moving the labels, + * C source line and probably flow information to the new pCode. + */ +void pic16_pCodeReplace (pCode *oldPC, pCode *newPC) { + if (!oldPC || !newPC || !isPCI(oldPC) || !isPCI(newPC)) + return; + + /* first move all labels from old to new */ + PCI(newPC)->label = pic16_pBranchAppend (PCI(oldPC)->label, PCI(newPC)->label); + PCI(oldPC)->label = NULL; + +#if 0 + /* move C source line (if possible) */ + if (PCI(oldPC)->cline && !PCI(newPC)->cline) + PCI(newPC)->cline = PCI(oldPC)->cline; +#endif + + /* keep flow information intact */ + newPC->seq = oldPC->seq; + PCI(newPC)->pcflow = PCI(oldPC)->pcflow; + if (PCI(newPC)->pcflow && PCI(newPC)->pcflow->end == oldPC) { + PCI(newPC)->pcflow->end = newPC; + } + + /* insert a comment stating which pCode has been replaced */ +#if 1 + if (pic16_pcode_verbose || pic16_debug_verbose) { + char pc_str[256]; + pic16_pCode2str (pc_str, 256, oldPC); + pic16_InsertCommentAfter (oldPC->prev, "%s: replaced %s", __FUNCTION__, pc_str); + } +#endif + + /* insert new pCode into pBlock */ + pic16_pCodeInsertAfter (oldPC, newPC); + pic16_unlinkpCode (oldPC); + + /* destruct replaced pCode */ + oldPC->destruct (oldPC); +} + +/* Returns the inverted conditional branch (if any) or NULL. + * pcop must be set to the new jump target. + */ +pCode *getNegatedBcc (pCode *bcc, pCodeOp *pcop) +{ + pCode *newBcc; + + if (!bcc || !isPCI(bcc)) return NULL; + + switch (PCI(bcc)->op) { + case POC_BC: newBcc = pic16_newpCode (POC_BNC , pcop); break; + case POC_BZ: newBcc = pic16_newpCode (POC_BNZ , pcop); break; + case POC_BOV: newBcc = pic16_newpCode (POC_BNOV, pcop); break; + case POC_BN: newBcc = pic16_newpCode (POC_BNN , pcop); break; + case POC_BNC: newBcc = pic16_newpCode (POC_BC , pcop); break; + case POC_BNZ: newBcc = pic16_newpCode (POC_BZ , pcop); break; + case POC_BNOV: newBcc = pic16_newpCode (POC_BOV , pcop); break; + case POC_BNN: newBcc = pic16_newpCode (POC_BN , pcop); break; + default: + newBcc = NULL; + } + return newBcc; +} + +#define MAX_DIST_GOTO 0x7FFFFFFF +#define MAX_DIST_BRA 1020 // maximum offset (in bytes) possible with BRA +#define MAX_DIST_BCC 120 // maximum offset (in bytes) possible with Bcc +#define MAX_JUMPCHAIN_DEPTH 16 // number of GOTOs to follow in resolveJumpChain() (to prevent endless loops) +#define IS_GOTO(arg) ((arg) && isPCI(arg) && (PCI(arg)->op == POC_GOTO || PCI(arg)->op == POC_BRA)) + +/* Follows GOTO/BRA instructions to their target instructions, stores the + * final destination (not a GOTO or BRA instruction) in target and returns + * the distance from the original pc to *target. + */ +int resolveJumpChain (pCode *pc, pCode **target, pCodeOp **pcop) { + pCode *curr = pc; + pCode *last = NULL; + pCodeOp *lastPCOP = NULL; + int dist = 0; + int depth = 0; + + //fprintf (stderr, "%s:%d: -=-", __FUNCTION__, __LINE__); + + /* only follow unconditional branches, except for the initial pCode (which may be a conditional branch) */ + while (curr && (last != curr) && (depth++ < MAX_JUMPCHAIN_DEPTH) && isPCI(curr) + && (PCI(curr)->op == POC_GOTO || PCI(curr)->op == POC_BRA || (curr == pc && isConditionalBranch(curr)))) { + last = curr; + lastPCOP = PCI(curr)->pcop; + dist = findpCodeLabel (pc, PCI(curr)->pcop->name, MAX_DIST_GOTO, &curr); + //fprintf (stderr, "last:%p, curr:%p, label:%s\n", last, curr, PCI(last)->pcop->name); + } // while + + if (target) *target = last; + if (pcop) *pcop = lastPCOP; + return dist; +} + +/* Returns pc if it is not a OPT_JUMPTABLE_BEGIN INFO pCode. + * Otherwise the first pCode after the jumptable (after + * the OPT_JUMPTABLE_END tag) is returned. + */ +pCode *skipJumptables (pCode *pc, int *isJumptable) +{ + *isJumptable = 0; + if (!pc) return NULL; + + while (pc->type == PC_INFO && PCINF(pc)->type == INF_OPTIMIZATION && PCOO(PCINF(pc)->oper1)->type == OPT_JUMPTABLE_BEGIN) { + *isJumptable = 1; + //fprintf (stderr, "SKIPPING jumptable\n"); + do { + //pc->print(stderr, pc); + pc = pc->next; + } while (pc && (pc->type != PC_INFO || PCINF(pc)->type != INF_OPTIMIZATION + || PCOO(PCINF(pc)->oper1)->type != OPT_JUMPTABLE_END)); + //fprintf (stderr, "<next; + } // while + + return pc; +} + +pCode *pic16_findNextInstructionSkipJumptables (pCode *pc, int *isJumptable) +{ + int isJumptab; + *isJumptable = 0; + while (pc && !isPCI(pc) && !isPCAD(pc) && !isPCW(pc)) { + // set pc to the first pCode after a jumptable, leave pc untouched otherwise + pc = skipJumptables (pc, &isJumptab); + if (isJumptab) { + // pc is the first pCode after the jumptable + *isJumptable = 1; + } else { + // pc has not been changed by skipJumptables() + pc = pc->next; + } + } // while + + return pc; +} + +/* Turn GOTOs into BRAs if distance between GOTO and label + * is less than 1024 bytes. + * + * This method is especially useful if GOTOs after BTFS[SC] + * can be turned into BRAs as GOTO would cost another NOP + * if skipped. + */ +void pic16_OptimizeJumps () +{ + pCode *pc; + pCode *pc_prev = NULL; + pCode *pc_next = NULL; + pBlock *pb; + pCode *target; + int change, iteration, isJumptab; + int isHandled = 0; + char *label; + int opt=0, toofar=0, opt_cond = 0, cond_toofar=0, opt_reorder = 0, opt_gotonext = 0, opt_gotochain = 0; + + if (!the_pFile) return; + + //fprintf (stderr, "%s:%d: %s\n", __FILE__, __LINE__, __FUNCTION__); + + for (pb = the_pFile->pbHead; pb != NULL; pb = pb->next) { + int matchedInvertRule = 1; + iteration = 1; + do { + //fprintf (stderr, "%s:%d: iterating over pBlock %p\n", __FUNCTION__, __LINE__, pb); + change = 0; + pc = pic16_findNextInstruction (pb->pcHead); + + while (pc) { + pc_next = pic16_findNextInstructionSkipJumptables (pc->next, &isJumptab); + if (isJumptab) { + // skip jumptable, i.e. start over with no pc_prev! + pc_prev = NULL; + pc = pc_next; + continue; + } // if + + /* (1) resolve chained jumps + * Do not perform this until pattern (4) is no longer present! Otherwise we will + * (a) leave dead code in and + * (b) skip over the dead code with an (unneccessary) jump. + */ + if (!matchedInvertRule && (IS_GOTO(pc) || isConditionalBranch(pc))) { + pCodeOp *lastTargetOp = NULL; + int newDist = resolveJumpChain (pc, &target, &lastTargetOp); + int maxDist = MAX_DIST_BCC; + if (PCI(pc)->op == POC_BRA) maxDist = MAX_DIST_BRA; + if (PCI(pc)->op == POC_GOTO) maxDist = MAX_DIST_GOTO; + + /* be careful NOT to make the jump instruction longer (might break previously shortened jumps!) */ + if (lastTargetOp && newDist <= maxDist && lastTargetOp != PCI(pc)->pcop + && strcmp (lastTargetOp->name, PCI(pc)->pcop->name) != 0) { + //fprintf (stderr, "(1) ");pc->print(stderr, pc); fprintf (stderr, " --> %s\n", lastTargetOp->name); + if (pic16_pcode_verbose) { pic16_pCodeInsertAfter (pc->prev, pic16_newpCodeCharP("(1) jump chain resolved")); } + PCI(pc)->pcop->name = lastTargetOp->name; + change++; + opt_gotochain++; + } // if + } // if + + + if (IS_GOTO(pc)) { + int dist; + int condBraType = isSkipOnStatus(pc_prev); + label = PCI(pc)->pcop->name; + dist = findpCodeLabel(pc, label, MAX_DIST_BRA, &target); + if (dist < 0) dist = -dist; + //fprintf (stderr, "distance: %d (", dist); pc->print(stderr, pc);fprintf (stderr, ")\n"); + isHandled = 0; + + + /* (2) remove "GOTO label; label:" */ + if (isLabel (pc_next, label)) { + //fprintf (stderr, "(2) GOTO next instruction: ");pc->print(stderr, pc);fprintf (stderr, " --> ");pc_next->print(stderr, pc_next); fprintf(stderr, "\n"); + // first remove all preceeding SKIP instructions + while (pc_prev && isPCI_SKIP(pc_prev)) { + // attach labels on this instruction to pc_next + //fprintf (stderr, "(2) preceeding SKIP removed: ");pc_prev->print(stderr, pc_prev);fprintf(stderr, "\n"); + PCI(pc_next)->label = pic16_pBranchAppend (PCI(pc_prev)->label, PCI(pc_next)->label); + PCI(pc_prev)->label = NULL; + if (pic16_pcode_verbose) { pic16_pCodeInsertAfter (pc->prev, pic16_newpCodeCharP("(2) SKIP removed")); } + pic16_unlinkpCode (pc_prev); + pc_prev = pic16_findPrevInstruction (pc); + } // while + // now remove the redundant goto itself + PCI(pc_next)->label = pic16_pBranchAppend (PCI(pc)->label, PCI(pc_next)->label); + if (pic16_pcode_verbose) { pic16_pCodeInsertAfter (pc, pic16_newpCodeCharP("(2) GOTO next instruction removed")); } + pic16_unlinkpCode (pc); + pc = pic16_findPrevInstruction(pc_next->prev); + isHandled = 1; // do not perform further optimizations + opt_gotonext++; + change++; + } // if + + + /* (3) turn BTFSx STATUS,i; GOTO label into Bcc label if possible */ + if (!isHandled && condBraType != -1 && hasNoLabel(pc)) { + if (dist < MAX_DIST_BCC) { + pCode *bcc = NULL; + switch (condBraType) { + case 0x00: bcc = pic16_newpCode (POC_BC, PCI(pc)->pcop);break; + // no BDC on DIGIT CARRY available + case 0x02: bcc = pic16_newpCode (POC_BZ, PCI(pc)->pcop);break; + case 0x03: bcc = pic16_newpCode (POC_BOV, PCI(pc)->pcop);break; + case 0x04: bcc = pic16_newpCode (POC_BN, PCI(pc)->pcop);break; + case 0x10: bcc = pic16_newpCode (POC_BNC, PCI(pc)->pcop);break; + // no BNDC on DIGIT CARRY available + case 0x12: bcc = pic16_newpCode (POC_BNZ, PCI(pc)->pcop);break; + case 0x13: bcc = pic16_newpCode (POC_BNOV, PCI(pc)->pcop);break; + case 0x14: bcc = pic16_newpCode (POC_BNN, PCI(pc)->pcop);break; + default: + // no replacement possible + bcc = NULL; + break; + } // switch + if (bcc) { + // ATTENTION: keep labels attached to BTFSx! + // HINT: GOTO is label free (checked above) + //fprintf (stderr, "%s:%d: (3) turning %s %s into %s %s\n", __FUNCTION__, __LINE__, PCI(pc)->mnemonic, label, PCI(bcc)->mnemonic, label); + isHandled = 1; // do not perform further optimizations + if (pic16_pcode_verbose) { pic16_pCodeInsertAfter(pc_prev->prev, pic16_newpCodeCharP("(3) conditional branch introduced")); } + pic16_pCodeReplace (pc_prev, bcc); + pc->destruct(pc); + pc = bcc; + opt_cond++; + change++; + } // if + } else { + //fprintf (stderr, "(%d, too far for Bcc)\n", dist); + cond_toofar++; + } // if + } // if + + if (!isHandled) { + // (4) eliminate the following (common) tripel: + // ; + // labels1: Bcc label2; + // GOTO somewhere; ; <-- instruction referenced by pc + // label2: + // and replace it by + // labels1: B#(cc) somewhere; ; #(cc) is the negated condition cc + // label2: + // ATTENTION: all labels pointing to "Bcc label2" must be attached + // to instead + // ATTENTION: This optimization is only valid if is + // not a skip operation! + // ATTENTION: somewhere must be within MAX_DIST_BCC bytes! + // ATTENTION: no label may be attached to the GOTO instruction! + if (isConditionalBranch(pc_prev) + && (!isPCI_SKIP(pic16_findPrevInstruction(pc_prev->prev))) + && (dist < MAX_DIST_BCC) + && isLabel(pc_next,PCI(pc_prev)->pcop->name) + && hasNoLabel(pc)) { + pCode *newBcc = getNegatedBcc (pc_prev, PCI(pc)->pcop); + + if (newBcc) { + //fprintf (stderr, "%s:%d: (4) turning %s %s into %s %s\n", __FUNCTION__, __LINE__, PCI(pc)->mnemonic, label, PCI(newBcc)->mnemonic, label); + isHandled = 1; // do not perform further optimizations + if (pic16_pcode_verbose) { pic16_pCodeInsertAfter(pc_prev->prev, pic16_newpCodeCharP("(4) conditional skipping branch inverted")); } + pic16_pCodeReplace (pc_prev, newBcc); + pc->destruct(pc); + pc = newBcc; + opt_reorder++; + change++; + matchedInvertRule++; + } + } + } + + /* (5) now just turn GOTO into BRA */ + if (!isHandled && (PCI(pc)->op == POC_GOTO)) { + if (dist < MAX_DIST_BRA) { + pCode *newBra = pic16_newpCode (POC_BRA, PCI(pc)->pcop); + //fprintf (stderr, "%s:%d: (5) turning %s %s into %s %s\n", __FUNCTION__, __LINE__, PCI(pc)->mnemonic, label, PCI(newBra)->mnemonic, label); + if (pic16_pcode_verbose) { pic16_pCodeInsertAfter(pc->prev, pic16_newpCodeCharP("(5) GOTO replaced by BRA")); } + pic16_pCodeReplace (pc, newBra); + pc = newBra; + opt++; + change++; + } else { + //fprintf (stderr, "(%d, too far for BRA)\n", dist); + toofar++; + } + } // if (!isHandled) + } // if + + pc_prev = pc; + pc = pc_next; + } // while (pc) + + pBlockRemoveUnusedLabels (pb); + + // This line enables goto chain resolution! + if (matchedInvertRule > 1) matchedInvertRule = 1; else matchedInvertRule = 0; + + iteration++; + } while (change); /* fixpoint iteration per pBlock */ + } // for (pb) + + // emit some statistics concerning goto-optimization +#if 0 + if (pic16_debug_verbose || pic16_pcode_verbose) { + fprintf (stderr, "optimize-goto:\n" + "\t%5d GOTO->BRA; (%d GOTOs too far)\n" + "\t%5d BTFSx, GOTO->Bcc (%d too far)\n" + "\t%5d conditional \"skipping\" jumps inverted\n" + "\t%5d GOTOs to next instruction removed\n" + "\t%5d chained GOTOs resolved\n", + opt, toofar, opt_cond, cond_toofar, opt_reorder, opt_gotonext, opt_gotochain); + } // if +#endif + //fprintf (stderr, "%s:%d: %s\n", __FILE__, __LINE__, __FUNCTION__); +} + +#undef IS_GOTO +#undef MAX_JUMPCHAIN_DEPTH +#undef MAX_DIST_GOTO +#undef MAX_DIST_BRA +#undef MAX_DIST_BCC + +/** END OF RAPHAEL NEIDER'S ADDITIONS **/ + +static void pBlockDestruct(pBlock *pb) +{ + + if(!pb) + return; + + +// Safe_free(pb); + +} + +/*-----------------------------------------------------------------*/ +/* void mergepBlocks(char dbName) - Search for all pBlocks with the*/ +/* name dbName and combine them */ +/* into one block */ +/*-----------------------------------------------------------------*/ +static void mergepBlocks(char dbName) +{ + + pBlock *pb, *pbmerged = NULL,*pbn; + + pb = the_pFile->pbHead; + + //fprintf(stderr," merging blocks named %c\n",dbName); + while(pb) { + + pbn = pb->next; + //fprintf(stderr,"looking at %c\n",getpBlock_dbName(pb)); + if( getpBlock_dbName(pb) == dbName) { + + //fprintf(stderr," merged block %c\n",dbName); + + if(!pbmerged) { + pbmerged = pb; + } else { + pic16_addpCode2pBlock(pbmerged, pb->pcHead); + /* pic16_addpCode2pBlock doesn't handle the tail: */ + pbmerged->pcTail = pb->pcTail; + + pb->prev->next = pbn; + if(pbn) + pbn->prev = pb->prev; + + + pBlockDestruct(pb); + } + //pic16_printpBlock(stderr, pbmerged); + } + pb = pbn; + } + +} + +/*-----------------------------------------------------------------*/ +/* AnalyzeFlow - Examine the flow of the code and optimize */ +/* */ +/* level 0 == minimal optimization */ +/* optimize registers that are used only by two instructions */ +/* level 1 == maximal optimization */ +/* optimize by looking at pairs of instructions that use the */ +/* register. */ +/*-----------------------------------------------------------------*/ + +static void AnalyzeFlow(int level) +{ + static int times_called=0; + pBlock *pb; + + if(!the_pFile) { + /* remove unused allocated registers before exiting */ + pic16_RemoveUnusedRegisters(); + return; + } + + + /* if this is not the first time this function has been called, + * then clean up old flow information */ + if(times_called++) { + for(pb = the_pFile->pbHead; pb; pb = pb->next) + unBuildFlow(pb); + pic16_RegsUnMapLiveRanges(); + } + GpcFlowSeq = 1; + + /* Phase 2 - Flow Analysis - Register Banking + * + * In this phase, the individual flow blocks are examined + * and register banking is fixed. + */ + +#if 0 + for(pb = the_pFile->pbHead; pb; pb = pb->next) + pic16_FixRegisterBanking(pb); +#endif + + /* Phase 2 - Flow Analysis + * + * In this phase, the pCode is partition into pCodeFlow + * blocks. The flow blocks mark the points where a continuous + * stream of instructions changes flow (e.g. because of + * a call or goto or whatever). + */ + + for(pb = the_pFile->pbHead; pb; pb = pb->next) + pic16_BuildFlow(pb); + + + /* Phase 2 - Flow Analysis - linking flow blocks + * + * In this phase, the individual flow blocks are examined + * to determine their order of excution. + */ + + for(pb = the_pFile->pbHead; pb; pb = pb->next) + LinkFlow(pb); + +#if 1 + if (pic16_options.opt_flags & OF_OPTIMIZE_DF) { + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + pic16_createDF (pb); +#if defined (DUMP_DF_GRAPHS) && DUMP_DF_GRAPHS > 0 + pic16_vcg_dump_default (pb); +#endif + //pic16_destructDF (pb); + } + + pic16_df_stats (); + if (0) releaseStack (); // releasing is costly... + } +#endif + + /* Phase 3 - Flow Analysis - Flow Tree + * + * In this phase, the individual flow blocks are examined + * to determine their order of execution. + */ + + for(pb = the_pFile->pbHead; pb; pb = pb->next) + pic16_BuildFlowTree(pb); + + + /* Phase x - Flow Analysis - Used Banks + * + * In this phase, the individual flow blocks are examined + * to determine the Register Banks they use + */ + +#if 0 + for(pb = the_pFile->pbHead; pb; pb = pb->next) + FixBankFlow(pb); +#endif + + + for(pb = the_pFile->pbHead; pb; pb = pb->next) + pic16_pCodeRegMapLiveRanges(pb); + + pic16_RemoveUnusedRegisters(); + pic16_removeUnusedRegistersDF (); + + // for(pb = the_pFile->pbHead; pb; pb = pb->next) + pic16_pCodeRegOptimizeRegUsage(level); + + +#if 0 + if(!options.nopeep) + OptimizepCode('*'); +#endif + +#if 0 + for(pb = the_pFile->pbHead; pb; pb = pb->next) + DumpFlow(pb); +#endif + + /* debug stuff */ + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + pCode *pcflow; + + for( pcflow = pic16_findNextpCode(pb->pcHead, PC_FLOW); + (pcflow = pic16_findNextpCode(pcflow, PC_FLOW)) != NULL; + pcflow = pcflow->next) { + FillFlow(PCFL(pcflow)); + } + } + +#if 0 + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + pCode *pcflow; + + for( pcflow = pic16_findNextpCode(pb->pcHead, PC_FLOW); + (pcflow = pic16_findNextpCode(pcflow, PC_FLOW)) != NULL; + pcflow = pcflow->next) { + FlowStats(PCFL(pcflow)); + } + } +#endif +} + +/* VR -- no need to analyze banking in flow, but left here : + * 1. because it may be used in the future for other purposes + * 2. because if omitted we'll miss some optimization done here + * + * Perhaps I should rename it to something else + */ + +/*-----------------------------------------------------------------*/ +/* pic16_AnalyzeBanking - Called after the memory addresses have been */ +/* assigned to the registers. */ +/* */ +/*-----------------------------------------------------------------*/ + +void pic16_AnalyzeBanking(void) +{ + pBlock *pb; + + /* Phase x - Flow Analysis - Used Banks + * + * In this phase, the individual flow blocks are examined + * to determine the Register Banks they use + */ + + AnalyzeFlow(0); + AnalyzeFlow(1); + + if(!options.nopeep) + OptimizepCode('*'); + + + if(!the_pFile)return; + + if(!pic16_options.no_banksel) { + for(pb = the_pFile->pbHead; pb; pb = pb->next) { +// fprintf(stderr, "%s:%d: Fix register banking in pb= 0x%p\n", __FILE__, __LINE__, pb); + pic16_FixRegisterBanking(pb); + } + } +} + +/*-----------------------------------------------------------------*/ +/* buildCallTree - Look at the flow and extract all of the calls. */ +/*-----------------------------------------------------------------*/ +#if 0 +static set *register_usage(pBlock *pb); +#endif + +static void buildCallTree(void ) +{ + pBranch *pbr; + pBlock *pb; + pCode *pc; + regs *r; + + if(!the_pFile) + return; + + + + /* Now build the call tree. + First we examine all of the pCodes for functions. + Keep in mind that the function boundaries coincide + with pBlock boundaries. + + The algorithm goes something like this: + We have two nested loops. The outer loop iterates + through all of the pBlocks/functions. The inner + loop iterates through all of the pCodes for + a given pBlock. When we begin iterating through + a pBlock, the variable pc_fstart, pCode of the start + of a function, is cleared. We then search for pCodes + of type PC_FUNCTION. When one is encountered, we + initialize pc_fstart to this and at the same time + associate a new pBranch object that signifies a + branch entry. If a return is found, then this signifies + a function exit point. We'll link the pCodes of these + returns to the matching pc_fstart. + + When we're done, a doubly linked list of pBranches + will exist. The head of this list is stored in + `the_pFile', which is the meta structure for all + of the pCode. Look at the pic16_printCallTree function + on how the pBranches are linked together. + + */ + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + pCode *pc_fstart=NULL; + for(pc = pb->pcHead; pc; pc = pc->next) { + + if(isPCI(pc) && pc_fstart) { + if(PCI(pc)->is2MemOp) { + r = pic16_getRegFromInstruction2(pc); + if(r && !strcmp(r->name, "POSTDEC1")) + PCF(pc_fstart)->stackusage++; + } else { + r = pic16_getRegFromInstruction(pc); + if(r && !strcmp(r->name, "PREINC1")) + PCF(pc_fstart)->stackusage--; + } + } + + if(isPCF(pc)) { + if (PCF(pc)->fname) { + char buf[16]; + + sprintf(buf, "%smain", port->fun_prefix); + if(STRCASECMP(PCF(pc)->fname, buf) == 0) { + //fprintf(stderr," found main \n"); + pb->cmemmap = NULL; /* FIXME do we need to free ? */ + pb->dbName = 'M'; + } + + pbr = Safe_calloc(1,sizeof(pBranch)); + pbr->pc = pc_fstart = pc; + pbr->next = NULL; + + the_pFile->functions = pic16_pBranchAppend(the_pFile->functions,pbr); + + // Here's a better way of doing the same: + addSet(&pb->function_entries, pc); + + } else { + // Found an exit point in a function, e.g. return + // (Note, there may be more than one return per function) + if(pc_fstart) + pBranchLink(PCF(pc_fstart), PCF(pc)); + + addSet(&pb->function_exits, pc); + } + } else if(isCALL(pc)) { + addSet(&pb->function_calls,pc); + } + } + } + + +#if 0 + /* This is not needed because currently all register used + * by a function are stored in stack -- VR */ + + /* Re-allocate the registers so that there are no collisions + * between local variables when one function call another */ + + // this is weird... + // pic16_deallocateAllRegs(); + + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + if(!pb->visited) + register_usage(pb); + } +#endif + +} + +/*-----------------------------------------------------------------*/ +/* pic16_AnalyzepCode - parse the pCode that has been generated and form */ +/* all of the logical connections. */ +/* */ +/* Essentially what's done here is that the pCode flow is */ +/* determined. */ +/*-----------------------------------------------------------------*/ + +void pic16_AnalyzepCode(char dbName) +{ + pBlock *pb; + int i,changes; + + if(!the_pFile) + return; + + mergepBlocks('D'); + + + /* Phase 1 - Register allocation and peep hole optimization + * + * The first part of the analysis is to determine the registers + * that are used in the pCode. Once that is done, the peep rules + * are applied to the code. We continue to loop until no more + * peep rule optimizations are found (or until we exceed the + * MAX_PASSES threshold). + * + * When done, the required registers will be determined. + * + */ + i = 0; + do { + + DFPRINTF((stderr," Analyzing pCode: PASS #%d\n",i+1)); + //fprintf(stderr," Analyzing pCode: PASS #%d\n",i+1); + + /* First, merge the labels with the instructions */ + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + if('*' == dbName || getpBlock_dbName(pb) == dbName) { + + DFPRINTF((stderr," analyze and merging block %c\n",dbName)); + //fprintf(stderr," analyze and merging block %c\n",dbName); + pic16_pBlockMergeLabels(pb); + AnalyzepBlock(pb); + } else { + DFPRINTF((stderr," skipping block analysis dbName=%c blockname=%c\n",dbName,getpBlock_dbName)); + } + } + + if(!options.nopeep) + changes = OptimizepCode(dbName); + else changes = 0; + + } while(changes && (i++ < MAX_PASSES)); + + + buildCallTree(); +} + + +/* convert a series of movff's of local regs to stack, with a single call to + * a support functions which does the same thing via loop */ +static void pic16_convertLocalRegs2Support(pCode *pcstart, pCode *pcend, int count, regs *r, int entry) +{ + pBranch *pbr; + pCode *pc, *pct; + char *fname[]={"__lr_store", "__lr_restore"}; + +// pc = pic16_newpCode(POC_CALL, pic16_popGetFromString( (entry?fname[0]:fname[1]) )); + + pct = pic16_findNextInstruction(pcstart->next); + do { + pc = pct; + pct = pc->next; //pic16_findNextInstruction(pc->next); +// pc->print(stderr, pc); + if(isPCI(pc) && PCI(pc)->label) { + pbr = PCI(pc)->label; + while(pbr && pbr->pc) { + PCI(pcstart)->label = pic16_pBranchAppend(PCI(pcstart)->label, pbr); + pbr = pbr->next; + } + +// pc->print(stderr, pc); + /* unlink pCode */ + pc->prev->next = pct; + pct->prev = pc->prev; +// pc->next = NULL; +// pc->prev = NULL; + } + } while ((pc) && (pc != pcend)); + + /* unlink movff instructions */ + pcstart->next = pcend; + pcend->prev = pcstart; + + pc = pcstart; +// if(!entry) { +// pic16_pCodeInsertAfter(pc, pct = pic16_newpCode(POC_MOVFF, pic16_popGet2p( +// pic16_popCopyReg(&pic16_pc_fsr0l), pic16_popCopyReg(pic16_framepnt_lo)))); pc = pct; +// } + + pic16_pCodeInsertAfter(pc, pct=pic16_newpCode(POC_LFSR, pic16_popGetLit2(0, pic16_popGetWithString(r->name)))); pc = pct; + pic16_pCodeInsertAfter(pc, pct=pic16_newpCode(POC_MOVLW, pic16_popGetLit( count ))); pc = pct; + pic16_pCodeInsertAfter(pc, pct=pic16_newpCode(POC_CALL, pic16_popGetWithString( fname[ (entry==1?0:1) ] ))); pc = pct; + +// if(!entry) { +// pic16_pCodeInsertAfter(pc, pct = pic16_newpCode(POC_MOVFF, pic16_popGet2p( +// pic16_popCopyReg(pic16_framepnt_lo), pic16_popCopyReg(&pic16_pc_fsr0l)))); pc = pct; +// } + + + { + symbol *sym; + + sym = newSymbol( fname[ entry?0:1 ], 0 ); + strcpy(sym->rname, fname[ entry?0:1 ]); + checkAddSym(&externs, sym); + +// fprintf(stderr, "%s:%d adding extern symbol %s in externs\n", __FILE__, __LINE__, fname[ entry?0:1 ]); + } + +} + +/*-----------------------------------------------------------------*/ +/* OptimizeLocalRegs - turn sequence of MOVFF instructions for */ +/* local registers to a support function call */ +/*-----------------------------------------------------------------*/ +void pic16_OptimizeLocalRegs(void) +{ + pBlock *pb; + pCode *pc; + pCodeInfo *pci; + pCodeOpLocalReg *pclr; + int regCount=0; + int inRegCount=0; + regs *r, *lastr=NULL, *firstr=NULL; + pCode *pcstart=NULL, *pcend=NULL; + int inEntry=0; + char *curFunc=NULL; + + /* Overview: + * local_regs begin mark + * MOVFF r0x01, POSTDEC1 + * MOVFF r0x02, POSTDEC1 + * ... + * ... + * MOVFF r0x0n, POSTDEC1 + * local_regs end mark + * + * convert the above to the below: + * MOVLW starting_register_index + * MOVWF PRODL + * MOVLW register_count + * call __save_registers_in_stack + */ + + if(!the_pFile) + return; + + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + inRegCount = regCount = 0; + firstr = lastr = NULL; + for(pc = pb->pcHead; pc; pc = pc->next) { + + /* hold current function name */ + if(pc && isPCF(pc))curFunc = PCF(pc)->fname; + + if(pc && (pc->type == PC_INFO)) { + pci = PCINF(pc); + + if(pci->type == INF_LOCALREGS) { + pclr = PCOLR(pci->oper1); + + if((pclr->type == LR_ENTRY_BEGIN) + || (pclr->type == LR_ENTRY_END))inEntry = 1; + else inEntry = 0; + + switch(pclr->type) { + case LR_ENTRY_BEGIN: + case LR_EXIT_BEGIN: + inRegCount = 1; regCount = 0; + pcstart = pc; //pic16_findNextInstruction(pc->next); + firstr = lastr = NULL; + break; + + case LR_ENTRY_END: + case LR_EXIT_END: + inRegCount = -1; + pcend = pc; //pic16_findPrevInstruction(pc->prev); + +#if 1 + if(curFunc && inWparamList(curFunc+1)) { + fprintf(stderr, "sdcc: %s: warning: disabling lr-support for functionn %s\n", + filename, curFunc); + } else { + if(regCount>2) { + pic16_convertLocalRegs2Support(pcstart, pcend, regCount, + firstr, inEntry); + } + } +#endif + firstr = lastr = NULL; + break; + } + + if(inRegCount == -1) { +// fprintf(stderr, "%s:%d registers used [%s] %d\n", __FILE__, __LINE__, inEntry?"entry":"exit", regCount); + regCount = 0; + inRegCount = 0; + } + } + } else { + if(isPCI(pc) && (PCI(pc)->op == POC_MOVFF) && (inRegCount == 1)) { + if(inEntry) + r = pic16_getRegFromInstruction(pc); + else + r = pic16_getRegFromInstruction2(pc); + if(r && (r->type == REG_GPR) && (r->pc_type == PO_GPR_TEMP)) { + if(!firstr)firstr = r; + regCount++; +// fprintf(stderr, "%s:%d\t%s\t%i\t%d/%d\n", __FILE__, __LINE__, r->name, r->rIdx); + } + } + } + } + } +} + + + + + +/*-----------------------------------------------------------------*/ +/* ispCodeFunction - returns true if *pc is the pCode of a */ +/* function */ +/*-----------------------------------------------------------------*/ +static bool ispCodeFunction(pCode *pc) +{ + + if(pc && pc->type == PC_FUNCTION && PCF(pc)->fname) + return 1; + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* findFunction - Search for a function by name (given the name) */ +/* in the set of all functions that are in a pBlock */ +/* (note - I expect this to change because I'm planning to limit */ +/* pBlock's to just one function declaration */ +/*-----------------------------------------------------------------*/ +static pCode *findFunction(char *fname) +{ + pBlock *pb; + pCode *pc; + if(!fname) + return NULL; + + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + + pc = setFirstItem(pb->function_entries); + while(pc) { + + if((pc->type == PC_FUNCTION) && + (PCF(pc)->fname) && + (strcmp(fname, PCF(pc)->fname)==0)) + return pc; + + pc = setNextItem(pb->function_entries); + + } + + } + return NULL; +} + +#if 0 +static void MarkUsedRegisters(set *regset) +{ + + regs *r1,*r2; + + for(r1=setFirstItem(regset); r1; r1=setNextItem(regset)) { +// fprintf(stderr, "marking register = %s\t", r1->name); + r2 = pic16_regWithIdx(r1->rIdx); +// fprintf(stderr, "to register = %s\n", r2->name); + r2->isFree = 0; + r2->wasUsed = 1; + } +} +#endif + +static void pBlockStats(FILE *of, pBlock *pb) +{ + + pCode *pc; + regs *r; + + if(!pic16_pcode_verbose)return; + + fprintf(of,";***\n; pBlock Stats: dbName = %c\n;***\n",getpBlock_dbName(pb)); + + // for now just print the first element of each set + pc = setFirstItem(pb->function_entries); + if(pc) { + fprintf(of,";entry: "); + pc->print(of,pc); + } + pc = setFirstItem(pb->function_exits); + if(pc) { + fprintf(of,";has an exit\n"); + //pc->print(of,pc); + } + + pc = setFirstItem(pb->function_calls); + if(pc) { + fprintf(of,";functions called:\n"); + + while(pc) { + if(pc->type == PC_OPCODE && PCI(pc)->op == POC_CALL) { + fprintf(of,"; %s\n",pic16_get_op_from_instruction(PCI(pc))); + } + pc = setNextItem(pb->function_calls); + } + } + + r = setFirstItem(pb->tregisters); + if(r) { + int n = elementsInSet(pb->tregisters); + + fprintf(of,";%d compiler assigned register%c:\n",n, ( (n!=1) ? 's' : ' ')); + + while (r) { + fprintf(of, "; %s\n",r->name); + r = setNextItem(pb->tregisters); + } + } + + fprintf(of, "; uses %d bytes of stack\n", 1+ elementsInSet(pb->tregisters)); +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +#if 0 +static void sequencepCode(void) +{ + pBlock *pb; + pCode *pc; + + + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + + pb->seq = GpCodeSequenceNumber+1; + + for( pc = pb->pcHead; pc; pc = pc->next) + pc->seq = ++GpCodeSequenceNumber; + } + +} +#endif + +#if 0 +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static set *register_usage(pBlock *pb) +{ + pCode *pc,*pcn; + set *registers=NULL; + set *registersInCallPath = NULL; + + /* check recursion */ + + pc = setFirstItem(pb->function_entries); + + if(!pc) + return registers; + + pb->visited = 1; + + if(pc->type != PC_FUNCTION) + fprintf(stderr,"%s, first pc is not a function???\n",__FUNCTION__); + + pc = setFirstItem(pb->function_calls); + for( ; pc; pc = setNextItem(pb->function_calls)) { + + if(pc->type == PC_OPCODE && PCI(pc)->op == POC_CALL) { + char *dest = pic16_get_op_from_instruction(PCI(pc)); + + pcn = findFunction(dest); + if(pcn) + registersInCallPath = register_usage(pcn->pb); + } else + fprintf(stderr,"BUG? pCode isn't a POC_CALL %d\n",__LINE__); + + } + +#ifdef PCODE_DEBUG + pBlockStats(stderr,pb); // debug +#endif + + // Mark the registers in this block as used. + + MarkUsedRegisters(pb->tregisters); + if(registersInCallPath) { + /* registers were used in the functions this pBlock has called */ + /* so now, we need to see if these collide with the ones we are */ + /* using here */ + + regs *r1,*r2, *newreg; + + DFPRINTF((stderr,"comparing registers\n")); + + r1 = setFirstItem(registersInCallPath); + while(r1) { + + r2 = setFirstItem(pb->tregisters); + + while(r2 && (r1->type != REG_STK)) { + + if(r2->rIdx == r1->rIdx) { + newreg = pic16_findFreeReg(REG_GPR); + + + if(!newreg) { + DFPRINTF((stderr,"Bummer, no more registers.\n")); + exit(1); + } + + DFPRINTF((stderr,"Cool found register collision nIdx=%d moving to %d\n", + r1->rIdx, newreg->rIdx)); + r2->rIdx = newreg->rIdx; + //if(r2->name) Safe_free(r2->name); + if(newreg->name) + r2->name = Safe_strdup(newreg->name); + else + r2->name = NULL; + newreg->isFree = 0; + newreg->wasUsed = 1; + } + r2 = setNextItem(pb->tregisters); + } + + r1 = setNextItem(registersInCallPath); + } + + /* Collisions have been resolved. Now free the registers in the call path */ + r1 = setFirstItem(registersInCallPath); + while(r1) { + if(r1->type != REG_STK) { + newreg = pic16_regWithIdx(r1->rIdx); + newreg->isFree = 1; + } + r1 = setNextItem(registersInCallPath); + } + + }// else + // MarkUsedRegisters(pb->registers); + + registers = unionSets(pb->tregisters, registersInCallPath, THROW_NONE); +#ifdef PCODE_DEBUG + if(registers) + DFPRINTF((stderr,"returning regs\n")); + else + DFPRINTF((stderr,"not returning regs\n")); + + DFPRINTF((stderr,"pBlock after register optim.\n")); + pBlockStats(stderr,pb); // debug +#endif + + return registers; +} +#endif + +/*-----------------------------------------------------------------*/ +/* pct2 - writes the call tree to a file */ +/* */ +/*-----------------------------------------------------------------*/ +static void pct2(FILE *of,pBlock *pb,int indent,int usedstack) +{ + pCode *pc,*pcn; + int i; + // set *registersInCallPath = NULL; + + if(!of) + return; + + if(indent > 10) { + fprintf(of, "recursive function\n"); + return; //recursion ? + } + + pc = setFirstItem(pb->function_entries); + + if(!pc) + return; + + pb->visited = 0; + + for(i=0;itype == PC_FUNCTION) { + usedstack += PCF(pc)->stackusage; + fprintf(of,"%s (stack: %i)\n",PCF(pc)->fname, usedstack); + } else return; // ??? + + + pc = setFirstItem(pb->function_calls); + for( ; pc; pc = setNextItem(pb->function_calls)) { + + if(pc->type == PC_OPCODE && PCI(pc)->op == POC_CALL) { + char *dest = pic16_get_op_from_instruction(PCI(pc)); + + pcn = findFunction(dest); + if(pcn) + pct2(of,pcn->pb,indent+1, usedstack); // + PCF(pcn)->stackusage); + } else + fprintf(of,"BUG? pCode isn't a POC_CALL %d\n",__LINE__); + + } + + +} + + +/*-----------------------------------------------------------------*/ +/* pic16_printCallTree - writes the call tree to a file */ +/* */ +/*-----------------------------------------------------------------*/ + +void pic16_printCallTree(FILE *of) +{ + pBranch *pbr; + pBlock *pb; + pCode *pc; + + if(!the_pFile) + return; + + if(!of) + of = stderr; + + fprintf(of, "\npBlock statistics\n"); + for(pb = the_pFile->pbHead; pb; pb = pb->next ) + pBlockStats(of,pb); + + + fprintf(of,"Call Tree\n"); + pbr = the_pFile->functions; + while(pbr) { + if(pbr->pc) { + pc = pbr->pc; + if(!ispCodeFunction(pc)) + fprintf(of,"bug in call tree"); + + + fprintf(of,"Function: %s\n", PCF(pc)->fname); + + while(pc->next && !ispCodeFunction(pc->next)) { + pc = pc->next; + if(pc->type == PC_OPCODE && PCI(pc)->op == POC_CALL) + fprintf(of,"\t%s\n",pic16_get_op_from_instruction(PCI(pc))); + } + } + + pbr = pbr->next; + } + + + fprintf(of,"\n**************\n\na better call tree\n"); + for(pb = the_pFile->pbHead; pb; pb = pb->next) { +// if(pb->visited) + pct2(of,pb,0,0); + } + + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + fprintf(of,"block dbname: %c\n", getpBlock_dbName(pb)); + } +} + + + +/*-----------------------------------------------------------------*/ +/* */ +/*-----------------------------------------------------------------*/ + +static void InlineFunction(pBlock *pb) +{ + pCode *pc; + pCode *pc_call; + + if(!pb) + return; + + pc = setFirstItem(pb->function_calls); + + for( ; pc; pc = setNextItem(pb->function_calls)) { + + if(isCALL(pc)) { + pCode *pcn = findFunction(pic16_get_op_from_instruction(PCI(pc))); + pCode *pct; + pCode *pce; + + pBranch *pbr; + + if(pcn && isPCF(pcn) && (PCF(pcn)->ncalled == 0)) { /* change 0 to 1 to enable inlining */ + + //fprintf(stderr,"Cool can inline:\n"); + //pcn->print(stderr,pcn); + + //fprintf(stderr,"recursive call Inline\n"); + InlineFunction(pcn->pb); + //fprintf(stderr,"return from recursive call Inline\n"); + + /* + At this point, *pc points to a CALL mnemonic, and + *pcn points to the function that is being called. + + To in-line this call, we need to remove the CALL + and RETURN(s), and link the function pCode in with + the CALLee pCode. + + */ + + + /* Remove the CALL */ + pc_call = pc; + pc = pc->prev; + + /* remove callee pBlock from the pBlock linked list */ + removepBlock(pcn->pb); + + pce = pcn; + while(pce) { + pce->pb = pb; + pce = pce->next; + } + + /* Remove the Function pCode */ + pct = pic16_findNextInstruction(pcn->next); + + /* Link the function with the callee */ + pc->next = pcn->next; + pcn->next->prev = pc; + + /* Convert the function name into a label */ + + pbr = Safe_calloc(1,sizeof(pBranch)); + pbr->pc = pic16_newpCodeLabel(PCF(pcn)->fname, -1); + pbr->next = NULL; + PCI(pct)->label = pic16_pBranchAppend(PCI(pct)->label,pbr); + PCI(pct)->label = pic16_pBranchAppend(PCI(pct)->label,PCI(pc_call)->label); + + /* turn all of the return's except the last into goto's */ + /* check case for 2 instruction pBlocks */ + pce = pic16_findNextInstruction(pcn->next); + while(pce) { + pCode *pce_next = pic16_findNextInstruction(pce->next); + + if(pce_next == NULL) { + /* found the last return */ + pCode *pc_call_next = pic16_findNextInstruction(pc_call->next); + + //fprintf(stderr,"found last return\n"); + //pce->print(stderr,pce); + pce->prev->next = pc_call->next; + pc_call->next->prev = pce->prev; + PCI(pc_call_next)->label = pic16_pBranchAppend(PCI(pc_call_next)->label, + PCI(pce)->label); + } + + pce = pce_next; + } + + + } + } else + fprintf(stderr,"BUG? pCode isn't a POC_CALL %d\n",__LINE__); + + } + +} + +/*-----------------------------------------------------------------*/ +/* */ +/*-----------------------------------------------------------------*/ + +void pic16_InlinepCode(void) +{ + + pBlock *pb; + pCode *pc; + + if(!the_pFile) + return; + + if(!functionInlining) + return; + + /* Loop through all of the function definitions and count the + * number of times each one is called */ + //fprintf(stderr,"inlining %d\n",__LINE__); + + for(pb = the_pFile->pbHead; pb; pb = pb->next) { + + pc = setFirstItem(pb->function_calls); + + for( ; pc; pc = setNextItem(pb->function_calls)) { + + if(isCALL(pc)) { + pCode *pcn = findFunction(pic16_get_op_from_instruction(PCI(pc))); + if(pcn && isPCF(pcn)) { + PCF(pcn)->ncalled++; + } + } else + fprintf(stderr,"BUG? pCode isn't a POC_CALL %d\n",__LINE__); + + } + } + + //fprintf(stderr,"inlining %d\n",__LINE__); + + /* Now, Loop through the function definitions again, but this + * time inline those functions that have only been called once. */ + + InlineFunction(the_pFile->pbHead); + //fprintf(stderr,"inlining %d\n",__LINE__); + + for(pb = the_pFile->pbHead; pb; pb = pb->next) + unBuildFlow(pb); + +} + +char *pic_optype_names[]={ + "PO_NONE", // No operand e.g. NOP + "PO_W", // The working register (as a destination) + "PO_WREG", // The working register (as a file register) + "PO_STATUS", // The 'STATUS' register + "PO_BSR", // The 'BSR' register + "PO_FSR0", // The "file select register" (in PIC18 family it's one + // of three) + "PO_INDF0", // The Indirect register + "PO_INTCON", // Interrupt Control register + "PO_GPR_REGISTER", // A general purpose register + "PO_GPR_BIT", // A bit of a general purpose register + "PO_GPR_TEMP", // A general purpose temporary register + "PO_SFR_REGISTER", // A special function register (e.g. PORTA) + "PO_PCL", // Program counter Low register + "PO_PCLATH", // Program counter Latch high register + "PO_PCLATU", // Program counter Latch upper register + "PO_PRODL", // Product Register Low + "PO_PRODH", // Product Register High + "PO_LITERAL", // A constant + "PO_REL_ADDR", // A relative address + "PO_IMMEDIATE", // (8051 legacy) + "PO_DIR", // Direct memory (8051 legacy) + "PO_CRY", // bit memory (8051 legacy) + "PO_BIT", // bit operand. + "PO_STR", // (8051 legacy) + "PO_LABEL", + "PO_WILD", // Wild card operand in peep optimizer + "PO_TWO_OPS" // combine two operands +}; + + +char *dumpPicOptype(PIC_OPTYPE type) +{ + assert( type >= 0 && type < sizeof(pic_optype_names)/sizeof( char *) ); + return (pic_optype_names[ type ]); +} + + +/*** BEGIN of stuff belonging to the BANKSEL optimization ***/ +#include "graph.h" + +#define MAX_COMMON_BANK_SIZE 32 +#define FIRST_PSEUDO_BANK_NR 1000 + +hTab *sym2bank = NULL; // --> +hTab *bank2sym = NULL; // --> +hTab *coerce = NULL; // --> <&PSEUDOBANK> +Graph *adj = NULL; + +typedef enum { INVALID_BANK = -1, UNKNOWN_BANK = -2, FIXED_BANK = -3 } pseudoBankNr; + +typedef struct { + pseudoBankNr bank; // number assigned to this pseudoBank + unsigned int size; // number of operands assigned to this bank + unsigned int ref; // number of symbols referring to this pseudoBank (for garbage collection) +} pseudoBank; + +/*----------------------------------------------------------------------*/ +/* hashSymbol - hash function used to map SYMBOLs (or operands) to ints */ +/*----------------------------------------------------------------------*/ +unsigned int hashSymbol (const char *str) +{ + unsigned int res = 0; + if (!str) return 0; + + while (*str) { + res ^= (*str); + res = (res << 4) | (res >> (8 * sizeof(unsigned int) - 4)); + str++; + } // while + + return res; +} + +/*-----------------------------------------------------------------------*/ +/* compareSymbol - return 1 iff sym1 equals sym2 */ +/*-----------------------------------------------------------------------*/ +int compareSymbol (const void *sym1, const void *sym2) +{ + char *s1 = (char*) sym1; + char *s2 = (char*) sym2; + + return (strcmp (s1,s2) == 0); +} + +/*-----------------------------------------------------------------------*/ +/* comparePre - return 1 iff p1 == p2 */ +/*-----------------------------------------------------------------------*/ +int comparePtr (const void *p1, const void *p2) +{ + return (p1 == p2); +} + +/*----------------------------------------------------------*/ +/* getSymbolFromOperand - return a pointer to the symbol in */ +/* the given operand and its length */ +/*----------------------------------------------------------*/ +char *getSymbolFromOperand (char *op, int *len) +{ + char *sym, *curr; + *len = 0; + + if (!op) return NULL; + + // we recognize two forms of operands: SYMBOL and (SYMBOL + offset) + sym = op; + if (*sym == '(') sym++; + + curr = sym; + while (((*curr >= 'A') && (*curr <= 'Z')) + || ((*curr >= 'a') && (*curr <= 'z')) + || ((curr != sym) && (*curr >= '0') && (*curr <= '9')) + || (*curr == '_')) { + // find end of symbol [A-Za-z_]?[A-Za-z0-9]* + curr++; + (*len)++; + } // while + + return sym; +} + +/*--------------------------------------------------------------------------*/ +/* getSymFromBank - get (one) name of a symbol assigned to the given bank */ +/*--------------------------------------------------------------------------*/ +char *getSymFromBank (pseudoBankNr bank) +{ + assert (bank2sym); + + if (bank < 0) return ""; + return hTabFindByKey (bank2sym, bank % bank2sym->size, (void *) bank, &comparePtr); +} + +/*-----------------------------------------------------------------------*/ +/* getPseudoBsrFromOperand - maps a string to its corresponding pseudo */ +/* bank number (uses hTab sym2bank), if the */ +/* symbol is not yet assigned a pseudo bank it */ +/* is assigned one here */ +/*-----------------------------------------------------------------------*/ +pseudoBankNr getPseudoBankNrFromOperand (const char *op) +{ + static pseudoBankNr next_bank = FIRST_PSEUDO_BANK_NR; + pseudoBankNr bank; + unsigned int hash; + + assert (sym2bank); + + hash = hashSymbol (op) % sym2bank->size; + bank = (pseudoBankNr) hTabFindByKey (sym2bank, hash, op, &compareSymbol); + if (bank == (pseudoBankNr)NULL) bank = UNKNOWN_BANK; + + if (bank == UNKNOWN_BANK) { + // create a pseudo bank for the operand + bank = next_bank++; + hTabAddItemLong (&sym2bank, hash, (char *)op, (void *)bank); + hTabAddItemLong (&bank2sym, bank, (void *) bank, (void *)op); + getOrAddGNode (adj, NULL, bank); // adds the node if it does not exist yet + //fprintf (stderr, "%s:%d: adding %s with hash %u in bank %u\n", __FUNCTION__, __LINE__, op, hash, bank); + } else { + //fprintf (stderr, "%s:%d: found %s with hash %u in bank %u\n", __FUNCTION__, __LINE__, op, hash, bank); + } // if + + assert (bank >= 0); + + return bank; +} + +/*--------------------------------------------------------------------*/ +/* isBanksel - check whether the given pCode is a BANKSEL instruction */ +/*--------------------------------------------------------------------*/ +int isBanksel (pCode *pc) +{ + if (!pc) return 0; + + if (isPCI(pc) && (PCI(pc)->op == POC_BANKSEL || PCI(pc)->op == POC_MOVLB)) { + // BANKSEL or MOVLB + //fprintf (stderr, "%s:%d: BANKSEL found: %s %s\n", __FUNCTION__, __LINE__, PCAD(pc)->directive, PCAD(pc)->arg); + return 1; + } + + // check for inline assembler BANKSELs + if (isPCAD(pc) && PCAD(pc)->directive && (STRCASECMP(PCAD(pc)->directive,"BANKSEL") == 0 || + STRCASECMP(PCAD(pc)->directive,"MOVLB") == 0)) { + //fprintf (stderr, "%s:%d: BANKSEL found: %s %s\n", __FUNCTION__, __LINE__, PCAD(pc)->directive, PCAD(pc)->arg); + return 1; + } + + // assume pc is no BANKSEL instruction + return 0; +} + +/*---------------------------------------------------------------------------------*/ +/* invalidatesBSR - check whether the pCodeInstruction passed in modifies the BSR */ +/* This method can not guarantee to find all modifications of the */ +/* BSR (e.g. via INDirection registers) but covers all compiler */ +/* generated plus some cases. */ +/*---------------------------------------------------------------------------------*/ +int invalidatesBSR(pCode *pc) +{ + // assembler directives invalidate BSR (well, they might, we don't know) + if (isPCAD(pc)) return 1; + + // only ASMDIRs and pCodeInstructions can invalidate BSR + if (!isPCI(pc)) return 0; + + // we have a pCodeInstruction + + // check for BSR modifying instructions + switch (PCI(pc)->op) { + case POC_CALL: + case POC_RCALL: + case POC_MOVLB: + case POC_RETFIE: // might be used as CALL replacement + case POC_RETLW: // might be used as CALL replacement + case POC_RETURN: // might be used as CALL replacement + case POC_BANKSEL: + return 1; + break; + + default: // other instruction do not change BSR unless BSR is an explicit operand! + // TODO: check for BSR as an explicit operand (e.g. INCF BSR,F), which should be rather unlikely...! + break; + } // switch + + // no change of BSR possible/probable + return 0; +} + +/*------------------------------------------------------------*/ +/* getBankFromBanksel - return the pseudo bank nr assigned to */ +/* the symbol referenced in this BANKSEL */ +/*------------------------------------------------------------*/ +pseudoBankNr getBankFromBanksel (pCode *pc) +{ + char *sym; + int data = 0; + + if (!pc) return INVALID_BANK; + + if (isPCAD(pc) && PCAD(pc)->directive) { + if (STRCASECMP(PCAD(pc)->directive,"BANKSEL") == 0) { + // get symbolname from PCAD(pc)->arg + //fprintf (stderr, "%s:%d: BANKSEL found: %s %s\n", __FUNCTION__, __LINE__, PCAD(pc)->directive, PCAD(pc)->arg); + sym = PCAD(pc)->arg; + data = getPseudoBankNrFromOperand (sym); + //fprintf (stderr, "symbol: %s, data=%i\n", sym, data); + } else if (STRCASECMP(PCAD(pc)->directive,"MOVLB")) { + // get (literal) bank number from PCAD(pc)->arg + fprintf (stderr, "%s:%d: MOVLB found: %s %s\n", __FUNCTION__, __LINE__, PCAD(pc)->directive, PCAD(pc)->arg); + assert (0 && "not yet implemented - turn off banksel optimization for now"); + } + } else if (isPCI(pc)) { + if (PCI(pc)->op == POC_BANKSEL) { + // get symbolname from PCI(pc)->pcop->name (?) + //fprintf (stderr, "%s:%d: BANKSEL found: %s %s\n", __FUNCTION__, __LINE__, PCI(pc)->mnemonic, PCI(pc)->pcop->name); + sym = PCI(pc)->pcop->name; + data = getPseudoBankNrFromOperand (sym); + //fprintf (stderr, "symbol: %s, data=%i\n", sym, data); + } else if (PCI(pc)->op == POC_MOVLB) { + // get (literal) bank number from PCI(pc)->pcop->name + fprintf (stderr, "%s:%d: MOVLB found: %s %s\n", __FUNCTION__, __LINE__, PCI(pc)->mnemonic, PCI(pc)->pcop->name); + assert (0 && "not yet implemented - turn off banksel optimization for now"); + } + } + + if (data == 0) + // no assigned bank could be found + return UNKNOWN_BANK; + else + return data; +} + +/*------------------------------------------------------------------------------*/ +/* getEffectiveBank - resolves the currently assigned effective pseudo bank nr */ +/*------------------------------------------------------------------------------*/ +pseudoBankNr getEffectiveBank (pseudoBankNr bank) +{ + pseudoBank *data; + + if (bank < FIRST_PSEUDO_BANK_NR) return bank; + + do { + //fprintf (stderr, "%s:%d: bank=%d\n", __FUNCTION__, __LINE__, bank); + data = (pseudoBank *) hTabFindByKey (coerce, bank % coerce->size, (void *) bank, &comparePtr); + if (data) { + if (data->bank != bank) + bank = data->bank; + else + data = NULL; + } + } while (data); + + //fprintf (stderr, "%s:%d: effective bank=%d\n", __FUNCTION__, __LINE__, bank); + return bank; +} + +/*------------------------------------------------------------------*/ +/* attachBsrInfo2pBlock - create a look-up table as to which pseudo */ +/* bank is selected at a given pCode */ +/*------------------------------------------------------------------*/ + +/* Create a graph with pseudo banks as its nodes and switches between + * these as edges (with the edge weight representing the absolute + * number of BANKSELs from one to the other). + * Removes redundand BANKSELs instead iff mod == 1. + * BANKSELs update the pseudo BSR, labels invalidate the current BSR + * value (setting it to 0=UNNKOWN), (R)CALLs also invalidate the + * pseudo BSR. + * TODO: check ALL instructions operands if they modify BSR directly... + * + * pb - the pBlock to annotate + * mod - select either graph creation (0) or BANKSEL removal (1) + */ +unsigned int attachBsrInfo2pBlock (pBlock *pb, int mod) +{ + pCode *pc, *pc_next; + unsigned int prevBSR = UNKNOWN_BANK, pseudoBSR = UNKNOWN_BANK; + int isBankselect = 0; + unsigned int banksels=0; + + if (!pb) return 0; + + pc = pic16_findNextInstruction(pb->pcHead); + while (pc) { + isBankselect = isBanksel (pc); + pc_next = pic16_findNextInstruction (pc->next); + + if (!hasNoLabel (pc)) { + // we don't know our predecessors -- assume different BSRs + prevBSR = UNKNOWN_BANK; + pseudoBSR = UNKNOWN_BANK; + //fprintf (stderr, "invalidated by label at "); pc->print (stderr, pc); + } // if + + // check if this is a BANKSEL instruction + if (isBankselect) { + pseudoBSR = getEffectiveBank (getBankFromBanksel(pc)); + //fprintf (stderr, "BANKSEL via "); pc->print (stderr, pc); + if (mod) { + if (prevBSR == pseudoBSR && pseudoBSR >= 0) { + //fprintf (stderr, "removing redundant "); pc->print (stderr, pc); + if (1 || pic16_pcode_verbose) pic16_pCodeInsertAfter (pc->prev, pic16_newpCodeCharP("removed redundant BANKSEL")); + pic16_unlinkpCode (pc); + banksels++; + } + } else { + addGEdge2 (getOrAddGNode (adj, NULL, prevBSR), getOrAddGNode (adj, NULL, pseudoBSR), 1, 0); + banksels++; + } + } // if + + if (!isBankselect && invalidatesBSR(pc)) { + // check if this instruction invalidates the pseudoBSR + pseudoBSR = UNKNOWN_BANK; + //fprintf (stderr, "invalidated via "); pc->print (stderr, pc); + } // if + + prevBSR = pseudoBSR; + pc = pc_next; + } // while + + return banksels; +} + +/*------------------------------------------------------------------------------------*/ +/* assignToSameBank - returns 0 on success or an error code */ +/* 1 - common bank would be too large */ +/* 2 - assignment to fixed (absolute) bank not performed */ +/* */ +/* This functions assumes that unsplittable operands are already assigned to the same */ +/* bank (e.g. all objects being referenced as (SYMBOL + offset) must be in the same */ +/* bank so that we can make sure the bytes are laid out sequentially in memory) */ +/* TODO: Symbols with an abslute address must be handled specially! */ +/*------------------------------------------------------------------------------------*/ +int assignToSameBank (int bank0, int bank1, int doAbs, int force) +{ + int eff0, eff1, dummy; + pseudoBank *pbank0, *pbank1; + hashtItem *hitem; + + eff0 = getEffectiveBank (bank0); + eff1 = getEffectiveBank (bank1); + + //fprintf (stderr, "%s:%d: bank0=%d/%d, bank1=%d/%d, doAbs=%d\n", __FUNCTION__, __LINE__, bank0, eff0, bank1, eff1, doAbs); + + // nothing to do if already same bank + if (eff0 == eff1) return 0; + + if (!doAbs && (eff0 < FIRST_PSEUDO_BANK_NR || eff1 < FIRST_PSEUDO_BANK_NR)) + return 2; + + // ensure eff0 < eff1 + if (eff0 > eff1) { + // swap eff0 and eff1 + dummy = eff0; + eff0 = eff1; + eff1 = dummy; + dummy = bank0; + bank0 = bank1; + bank1 = dummy; + } // if + + // now assign bank eff1 to bank eff0 + pbank0 = (pseudoBank *) hTabFindByKey (coerce, eff0 % coerce->size, (void *)((char*)0+eff0), &comparePtr); + if (!pbank0) { + pbank0 = Safe_calloc (1, sizeof (pseudoBank)); + pbank0->bank = eff0; + pbank0->size = 1; + pbank0->ref = 1; + hTabAddItemLong (&coerce, eff0 % coerce->size, (void *)((char*)0+eff0), (void *) pbank0); + } // if + + pbank1 = NULL; + hitem = hTabSearch (coerce, eff1 % coerce->size); + while (hitem && hitem->pkey != (void *)((char*)0+eff1)) + hitem = hitem->next; + + if (hitem) pbank1 = (pseudoBank *) hitem->item; + +#if 0 + fprintf (stderr, "bank #%d/%d & bank #%d/%d --> bank #%d: %u (%s & %s)\n", bank0, eff0, bank1, eff1, + pbank0->bank, pbank0->size, + getSymFromBank (eff0), getSymFromBank (eff1)); +#endif + + if (pbank1) { + if (!force && (pbank0->size + pbank1->size > MAX_COMMON_BANK_SIZE)) { +#if 0 + fprintf (stderr, "bank #%d: %u, bank #%d: %u --> bank #%d': %u > %u (%s,%s)\n", + pbank0->bank, pbank0->size, pbank1->bank, pbank1->size, + pbank0->bank, pbank0->size + pbank1->size, MAX_COMMON_BANK_SIZE, + getSymFromBank (pbank0->bank), getSymFromBank (pbank1->bank)); +#endif + return 1; + } // if + pbank0->size += pbank1->size; + pbank1->ref--; + if (pbank1->ref == 0) Safe_free (pbank1); + } else { + pbank0->size++; + } // if + + if (hitem) + hitem->item = pbank0; + else + hTabAddItemLong (&coerce, eff1 % coerce->size, (void *)((char*)0+eff1), (void *) pbank0); + pbank0->ref++; + + //fprintf (stderr, "%s:%d: leaving.\n", __FUNCTION__, __LINE__); + + return 0; +} + +/*----------------------------------------------------------------*/ +/* mergeGraphNodes - combines two nodes into one and modifies all */ +/* edges to and from the nodes accordingly */ +/* This method needs complete backedges, i.e. if (A,B) is an edge */ +/* then also (B,A) must be an edge (possibly with weight 0). */ +/*----------------------------------------------------------------*/ +void mergeGraphNodes (GraphNode *node1, GraphNode *node2) +{ + GraphEdge *edge, *backedge, *nextedge; + GraphNode *node; + int backweight; + + assert (node1 && node2); + assert (node1 != node2); + + // add all edges starting at node2 to node1 + edge = node2->edge; + while (edge) { + nextedge = edge->next; + node = edge->node; + backedge = getGEdge (node, node2); + if (backedge) + backweight = backedge->weight; + else + backweight = 0; + // insert edges (node1,node) and (node,node1) + addGEdge2 (node1, node, edge->weight, backweight); + // remove edges (node, node2) and (node2, node) + remGEdge (node2, node); + remGEdge (node, node2); + edge = nextedge; + } // while + + // now node2 should not be referenced by any other GraphNode... + //remGNode (adj, node2->data, node2->hash); +} + +/*----------------------------------------------------------------*/ +/* showGraph - dump the current BANKSEL graph as a node/edge list */ +/*----------------------------------------------------------------*/ +void showGraph (Graph *g) +{ + GraphNode *node; + GraphEdge *edge; + pseudoBankNr bankNr; + pseudoBank *pbank; + unsigned int size; + + node = g->node; + while (node) { + edge = node->edge; + bankNr = getEffectiveBank (node->hash); + assert (bankNr >= 0); + pbank = (pseudoBank *) hTabFindByKey (coerce, bankNr % coerce->size, (void *) bankNr, &comparePtr); + if (pbank) { + bankNr = pbank->bank; + size = pbank->size; + } else { + size = 1; + } + + fprintf (stderr, "edges from %s (bank %u, size %u) to:\n", getSymFromBank (node->hash), bankNr, size); + + while (edge) { + if (edge->weight > 0) + fprintf (stderr, " %4u x %s\n", edge->weight, getSymFromBank (edge->node->hash)); + edge = edge->next; + } // while (edge) + node = node->next; + } // while (node) +} + +/*---------------------------------------------------------------*/ +/* pic16_OptimizeBanksel - remove redundant BANKSEL instructions */ +/*---------------------------------------------------------------*/ +void pic16_OptimizeBanksel () +{ + GraphNode *node, *node1, *node1next; + +#if 0 + // needed for more effective bank assignment (needs adjusted pic16_emit_usection()) + GraphEdge *edge, *backedge; + GraphEdge *max; + int maxWeight, weight, mergeMore, absMaxWeight; + pseudoBankNr curr0, curr1; +#endif + pseudoBank *pbank; + pseudoBankNr bankNr; + char *base_symbol0, *base_symbol1; + int len0, len1; + pBlock *pb; + set *set; + regs *reg; + unsigned int bankselsTotal = 0, bankselsRemoved = 0; + + //fprintf (stderr, "%s:%s:%d: entered.\n", __FILE__, __FUNCTION__, __LINE__); + + if (!the_pFile || !the_pFile->pbHead) return; + + adj = newGraph (NULL); + sym2bank = newHashTable ( 255 ); + bank2sym = newHashTable ( 255 ); + coerce = newHashTable ( 255 ); + + // create graph of BANKSEL relationships (node = operands, edge (A,B) iff BANKSEL B follows BANKSEL A) + for (pb = the_pFile->pbHead; pb; pb = pb->next) { + bankselsTotal += attachBsrInfo2pBlock (pb, 0); + } // for pb + +#if 1 + // assign symbols with absolute addresses to their respective bank nrs + set = pic16_fix_udata; + for (reg = setFirstItem (set); reg; reg = setNextItem (set)) { + bankNr = reg->address >> 8; + node = getOrAddGNode (adj, NULL, bankNr); + bankNr = (pseudoBankNr) getEffectiveBank (getPseudoBankNrFromOperand(reg->name)); + assignToSameBank (node->hash, bankNr, 1, 1); + + assert (bankNr >= 0); + pbank = (pseudoBank *) hTabFindByKey (coerce, bankNr % coerce->size, (void *) bankNr, &comparePtr); + if (!pbank) { + pbank = Safe_calloc (1, sizeof (pseudoBank)); + pbank->bank = reg->address >> 8; //FIXED_BANK; + pbank->size = 1; + pbank->ref = 1; + hTabAddItemLong (&coerce, bankNr % coerce->size, (void *) bankNr, pbank); + } else { + assert (pbank->bank == (reg->address >> 8)); + pbank->bank = reg->address >> 8; //FIXED_BANK; + pbank->size++; + } + //fprintf (stderr, "ABS: %s (%d bytes) at %x in bank %u\n", reg->name, reg->size, reg->address, bankNr); + } // for reg +#endif + +#if 1 + // assign operands referring to the same symbol (which is not given an absolute address) to the same bank + //fprintf (stderr, "assign operands with the same symbol to the same bank\n"); + node = adj->node; + while (node) { + if (node->hash < 0) { node = node->next; continue; } + base_symbol0 = getSymbolFromOperand (getSymFromBank (getEffectiveBank(node->hash)), &len0); + node1 = node->next; + while (node1) { + if (node1->hash < 0) { node1 = node1->next; continue; } + node1next = node1->next; + base_symbol1 = getSymbolFromOperand (getSymFromBank (getEffectiveBank (node1->hash)), &len1); + if (len0 == len1 && len0 > 0 && strncmp (base_symbol0, base_symbol1, len0) == 0) { + int res; + // TODO: check for symbols with absolute addresses -- these might be placed across bank boundaries! + //fprintf (stderr, "merging %s and %s\n", getSymFromBank (getEffectiveBank(node->hash)), getSymFromBank (getEffectiveBank(node1->hash))); + if (0 != (res = assignToSameBank (node->hash, node1->hash, 0, 1))) { + fprintf (stderr, "%s(%d) == %s(%d), res=%d\n", base_symbol0, len0, base_symbol1, len1, res); + assert (0 && "Could not assign a symbol to a bank!"); + } + mergeGraphNodes (node, node1); + /* + if (node->hash < node1->hash) + mergeGraphNodes (node, node1); + else + mergeGraphNodes (node1, node); // this removes node so node->next will fail... + */ + } // if + node1 = node1next; + } // while (node1) + node = node->next; + } // while (node) +#endif + +#if 0 + // >>> THIS ALSO NEEDS AN UPDATED pic16_emit_usection() TO REFLECT THE BANK ASSIGNMENTS <<< + // assign tightly coupled operands to the same (pseudo) bank + //fprintf (stderr, "assign tightly coupled operands to the same bank\n"); + mergeMore = 1; + absMaxWeight = 0; + while (mergeMore) { + node = adj->node; + max = NULL; + maxWeight = 0; + while (node) { + curr0 = getEffectiveBank (node->hash); + if (curr0 < 0) { node = node->next; continue; } + edge = node->edge; + while (edge) { + assert (edge->src == node); + backedge = getGEdge (edge->node, edge->src); + weight = edge->weight + (backedge ? backedge->weight : 0); + curr1 = getEffectiveBank (edge->node->hash); + if (curr1 < 0) { edge = edge->next; continue; } + + // merging is only useful if the items are not assigned to the same bank already... + if (curr0 != curr1 && weight > maxWeight) { + if (maxWeight > absMaxWeight) absMaxWeight = maxWeight; + maxWeight = weight; + max = edge; + } // if + edge = edge->next; + } // while + node = node->next; + } // while + + if (maxWeight > 0) { +#if 0 + fprintf (stderr, "%s:%d: merging (%4u) %d(%s) and %d(%s)\n", __FUNCTION__, __LINE__, maxWeight, + max->src->hash, getSymFromBank (max->src->hash), + max->node->hash, getSymFromBank (max->node->hash)); +#endif + + node = getGNode (adj, max->src->data, max->src->hash); + node1 = getGNode (adj, max->node->data, max->node->hash); + + if (0 == assignToSameBank (max->src->hash, max->node->hash, 0, 0)) { + if (max->src->hash < max->node->hash) + mergeGraphNodes (node, node1); + else + mergeGraphNodes (node1, node); + } else { + remGEdge (node, node1); + remGEdge (node1, node); + //mergeMore = 0; + } + + } else { + mergeMore = 0; + } + } // while +#endif + +#if 1 + // remove redundant BANKSELs + //fprintf (stderr, "removing redundant BANKSELs\n"); + for (pb = the_pFile->pbHead; pb; pb = pb->next) { + bankselsRemoved += attachBsrInfo2pBlock (pb, 1); + } // for pb +#endif + +#if 0 + fprintf (stderr, "display graph\n"); + showGraph (); +#endif + + deleteGraph (adj); + //fprintf (stderr, "%s:%s:%d: leaving, %u/%u BANKSELs removed...\n", __FILE__, __FUNCTION__, __LINE__, bankselsRemoved, bankselsTotal); +} + +/*** END of stuff belonging to the BANKSEL optimization ***/ + + + +/*** BEGIN of helpers for pCode dataflow optimizations ***/ + +typedef unsigned int symbol_t; +typedef unsigned int valnum_t; +//typedef unsigned int hash_t; + +#ifndef INT_TO_PTR +#define INT_TO_PTR(x) (((char *) 0) + (x)) +#endif + +#ifndef PTR_TO_INT +#define PTR_TO_INT(x) (((char *)(x)) - ((char *) 0)) +#endif + +static int pic16_regIsLocal (regs *r); +static int pic16_safepCodeRemove (pCode *pc, char *comment); + +/* statistics */ +static unsigned int pic16_df_removed_pcodes = 0; +static unsigned int pic16_df_saved_bytes = 0; +static unsigned int df_findall_sameflow = 0; +static unsigned int df_findall_otherflow = 0; +static unsigned int df_findall_in_vals = 0; + +static void pic16_df_stats () { + return; + if (pic16_debug_verbose || pic16_pcode_verbose) { + fprintf (stderr, "PIC16: dataflow analysis removed %u instructions (%u bytes)\n", pic16_df_removed_pcodes, pic16_df_saved_bytes); + fprintf (stderr, "findAll: same flow %u (%u in_vals), other flow %u\n", df_findall_sameflow, df_findall_in_vals, df_findall_otherflow); + //pic16_df_removed_pcodes = pic16_df_saved_bytes = 0; + } +} + +/* Remove a pCode iff possible: + * - previous pCode is no SKIP + * - pc has no label + * Returns 1 iff the pCode has been removed, 0 otherwise. */ +static int pic16_safepCodeUnlink (pCode *pc, char *comment) { + pCode *pcprev, *pcnext; + char buf[256], *total=NULL; + int len; + + if (!comment) comment = "=DF= pCode removed by pic16_safepCodeUnlink"; + + pcprev = pic16_findPrevInstruction (pc->prev); + pcnext = pic16_findNextInstruction (pc->next); + + /* move labels to next instruction (if possible) */ + if (PCI(pc)->label && !pcnext) return 0; + + /* if this is a SKIP with side-effects -- do not remove */ + /* XXX: might try to replace this one with the side-effect only version */ + if (isPCI_SKIP(pc) + && ((PCI(pc)->outCond & (PCC_REGISTER | PCC_W)) != 0)) + { + pCode *newpc; + switch (PCI(pc)->op) + { + case POC_INCFSZ: + case POC_INFSNZ: + newpc = pic16_newpCode(POC_INCF, pic16_pCodeOpCopy( PCI(pc)->pcop ) ); + pic16_pCodeReplace( pc, newpc ); + return 1; + break; + case POC_INCFSZW: + newpc = pic16_newpCode(POC_INCFW, pic16_pCodeOpCopy( PCI(pc)->pcop ) ); + pic16_pCodeReplace( pc, newpc ); + return 1; + break; + case POC_DECFSZ: + case POC_DCFSNZ: + newpc = pic16_newpCode(POC_INCF, pic16_pCodeOpCopy( PCI(pc)->pcop ) ); + pic16_pCodeReplace( pc, newpc ); + return 1; + break; + case POC_DECFSZW: + newpc = pic16_newpCode(POC_INCF, pic16_pCodeOpCopy( PCI(pc)->pcop ) ); + pic16_pCodeReplace( pc, newpc ); + return 1; + break; + default: + return 0; + } + return 0; + } + + /* if previous instruction is a skip -- do not remove */ + if (pcprev && isPCI_SKIP(pcprev)) { + if (!pic16_safepCodeUnlink (pcprev, "=DF= removed now unused SKIP")) { + /* preceeding SKIP could not be removed -- keep this instruction! */ + return 0; + } + } + + if (PCI(pc)->label) { + //fprintf (stderr, "%s: moving label(s)\n", __FUNCTION__); + //pc->print (stderr, pc); + PCI(pcnext)->label = pic16_pBranchAppend (PCI(pc)->label, PCI(pcnext)->label); + PCI(pc)->label = NULL; + } + + /* update statistics */ + pic16_df_removed_pcodes++; + if (isPCI(pc)) pic16_df_saved_bytes += PCI(pc)->isize; + + /* remove the pCode */ + pic16_pCode2str (buf, 256, pc); + //fprintf (stderr, "%s: removing pCode: %s\n", __FUNCTION__, buf); + if (0 || pic16_debug_verbose || pic16_pcode_verbose) { + len = strlen (buf) + strlen (comment) + 10; + total = (char *) Safe_malloc (len); + SNPRINTF (total, len, "%s: %s", comment, buf); + pic16_pCodeInsertAfter (pc, pic16_newpCodeCharP(total)); + Safe_free (total); + } + + /* actually unlink it from the pBlock -- also remove from to/from lists */ + pic16_pCodeUnlink (pc); + + /* remove the pCode -- release registers */ + pc->destruct (pc); + + /* report success */ + return 1; +} + + +/* ======================================================================== */ +/* === SYMBOL HANDLING ==================================================== */ +/* ======================================================================== */ + +static hTab *map_strToSym = NULL; /** (char *) --> symbol_t */ +static hTab *map_symToStr = NULL; /** symbol_t -> (char *) */ +static symbol_t nextSymbol = 0x2000; /** next symbol_t assigned to the next generated symbol */ + +/** Calculate a hash for a given string. + * If len == 0 the string is assumed to be NUL terminated. */ +static hash_t symbolHash (const char *str, unsigned int len) { + hash_t hash = 0; + if (!len) { + while (*str) { + hash = (hash << 2) ^ *str; + str++; + } // while + } else { + while (len--) { + hash = (hash << 2) ^ *str; + str++; + } + } + return hash; +} + +/** Return 1 iff strings v1 and v2 are identical. */ +static int symcmp (const void *v1, const void *v2) { + return !strcmp ((const char *) v1, (const char *) v2); +} + +/** Return 1 iff pointers v1 and v2 are identical. */ +static int ptrcmp (const void *v1, const void *v2) { + return (v1 == v2); +} + +enum { SPO_WREG=0x1000, + SPO_STATUS, + SPO_PRODL, + SPO_PRODH, + SPO_INDF0, + SPO_POSTDEC0, + SPO_POSTINC0, + SPO_PREINC0, + SPO_PLUSW0, + SPO_INDF1, + SPO_POSTDEC1, + SPO_POSTINC1, + SPO_PREINC1, + SPO_PLUSW1, + SPO_INDF2, + SPO_POSTDEC2, + SPO_POSTINC2, + SPO_PREINC2, + SPO_PLUSW2, + SPO_STKPTR, + SPO_TOSL, + SPO_TOSH, + SPO_TOSU, + SPO_BSR, + SPO_FSR0L, + SPO_FSR0H, + SPO_FSR1L, + SPO_FSR1H, + SPO_FSR2L, + SPO_FSR2H, + SPO_PCL, + SPO_PCLATH, + SPO_PCLATU, + SPO_TABLAT, + SPO_TBLPTRL, + SPO_TBLPTRH, + SPO_TBLPTRU, + SPO_LAST +}; + +/* Return the unique symbol_t for the given string. */ +static symbol_t symFromStr (const char *str) { + hash_t hash; + char *res; + symbol_t sym; + + if (!map_symToStr) { + int i; + struct { char *name; symbol_t sym; } predefsyms[] = { + {"WREG", SPO_WREG}, + {"STATUS", SPO_STATUS}, + {"PRODL", SPO_PRODL}, + {"PRODH", SPO_PRODH}, + {"INDF0", SPO_INDF0}, + {"POSTDEC0", SPO_POSTDEC0}, + {"POSTINC0", SPO_POSTINC0}, + {"PREINC0", SPO_PREINC0}, + {"PLUSW0", SPO_PLUSW0}, + {"INDF1", SPO_INDF1}, + {"POSTDEC1", SPO_POSTDEC1}, + {"POSTINC1", SPO_POSTINC1}, + {"PREINC1", SPO_PREINC1}, + {"PLUSW1", SPO_PLUSW1}, + {"INDF2", SPO_INDF2}, + {"POSTDEC2", SPO_POSTDEC2}, + {"POSTINC2", SPO_POSTINC2}, + {"PREINC2", SPO_PREINC2}, + {"PLUSW2", SPO_PLUSW2}, + {"STKPTR", SPO_STKPTR}, + {"TOSL", SPO_TOSL}, + {"TOSH", SPO_TOSH}, + {"TOSU", SPO_TOSU}, + {"BSR", SPO_BSR}, + {"FSR0L", SPO_FSR0L}, + {"FSR0H", SPO_FSR0H}, + {"FSR1L", SPO_FSR1L}, + {"FSR1H", SPO_FSR1H}, + {"FSR2L", SPO_FSR2L}, + {"FSR2H", SPO_FSR2H}, + {"PCL", SPO_PCL}, + {"PCLATH", SPO_PCLATH}, + {"PCLATU", SPO_PCLATU}, + {"TABLAT", SPO_TABLAT}, + {"TBLPTRL", SPO_TBLPTRL}, + {"TBLPTRH", SPO_TBLPTRH}, + {"TBLPTRU", SPO_TBLPTRU}, + {NULL, 0} + }; + + map_strToSym = newHashTable (128); + map_symToStr = newHashTable (128); + + for (i=0; predefsyms[i].name; i++) { + char *name; + + /* enter new symbol */ + sym = predefsyms[i].sym; + name = predefsyms[i].name; + res = Safe_strdup (name); + hash = symbolHash (name, 0); + + hTabAddItemLong (&map_strToSym, hash, res, INT_TO_PTR(sym)); + hTabAddItemLong (&map_symToStr, sym % map_symToStr->size, INT_TO_PTR(sym), res); + } // for i + } + + hash = symbolHash (str, 0) % map_strToSym->size; + + /* find symbol in table */ + sym = PTR_TO_INT(hTabFindByKey (map_strToSym, hash, str, &symcmp)); + if (sym) { + //fprintf (stderr, "found symbol %x for %s\n", sym, str); + return sym; + } + + /* enter new symbol */ + sym = nextSymbol++; + res = Safe_strdup (str); + + hTabAddItemLong (&map_strToSym, hash, res, INT_TO_PTR(sym)); + hTabAddItemLong (&map_symToStr, sym % map_symToStr->size, INT_TO_PTR(sym), res); + + //fprintf (stderr, "created symbol %x for %s\n", sym, res); + + return sym; +} + +#if 1 +static const char *strFromSym (symbol_t sym) { + return (const char *) hTabFindByKey (map_symToStr, sym % map_symToStr->size, INT_TO_PTR(sym), &ptrcmp); +} +#endif + +/* ======================================================================== */ +/* === DEFINITION MAP HANDLING ============================================ */ +/* ======================================================================== */ + +/* A defmap provides information about which symbol is defined by which pCode. + * The most recent definitions are prepended to the list, so that the most + * recent definition can be found by forward scanning the list. + * pc2: MOVFF r0x00, r0x01 + * pc1: INCF r0x01 + * head --> ("r0x01",pc1,42) --> ("STATUS",pc1,44) --> ("r0x01",pc2,28) --> NULL + * + * We attach one defmap to each flow object, and each pCode will occur at + * least once in its flow's defmap (maybe defining the 0 symbol). This can be + * used to find definitions for a pCode in its own defmap that precede pCode. + */ + +typedef struct defmap_s { + symbol_t sym; /** symbol this item refers to */ + union { + struct { + unsigned int in_mask:8; /** mask leaving in accessed bits */ + unsigned int mask:8; /** mask leaving in modified bits (if isWrite) */ + int isRead:1; /** sym/mask is read */ + int isWrite:1; /** sym/mask is written */ + } access; + int accessmethod; + } acc; + pCode *pc; /** pCode this symbol is refrenced at */ + valnum_t in_val; /** valnum_t of symbol's previous value (the one read at pc) */ + valnum_t val; /** new unique number for this value (if isWrite) */ + struct defmap_s *prev, *next; /** link to previous an next definition */ +} defmap_t; + +static defmap_t *defmap_free = NULL; /** list of unused defmaps */ +static int defmap_free_count = 0; /** number of released defmap items */ + +/* Returns a defmap_t with the specified data; this will be the new list head. + * next - pointer to the current list head */ +static defmap_t *newDefmap (symbol_t sym, int in_mask, int mask, int isRead, int isWrite, pCode *pc, valnum_t val, defmap_t *next) { + defmap_t *map; + + if (defmap_free) { + map = defmap_free; + defmap_free = map->next; + --defmap_free_count; + } else { + map = (defmap_t *) Safe_calloc (1, sizeof (defmap_t)); + } + map->sym = sym; + map->acc.access.in_mask = (isRead ? (in_mask ? in_mask : 0xFF) : 0x00); + map->acc.access.mask = (isWrite ? (mask ? mask : 0xFF) : 0x00); + map->acc.access.isRead = (isRead != 0); + map->acc.access.isWrite = (isWrite != 0); + map->pc = pc; + map->in_val = 0; + map->val = (isWrite ? val : 0); + map->prev = NULL; + map->next = next; + if (next) next->prev = map; + + return map; +} + +/* Returns a copy of the single defmap item. */ +static defmap_t *copyDefmap (defmap_t *map) { + defmap_t *res = (defmap_t *) Safe_malloc (sizeof (defmap_t)); + memcpy (res, map, sizeof (defmap_t)); + res->next = NULL; + res->prev = NULL; + return res; +} + +/* Insert a defmap item after the specified one. */ +static int defmapInsertAfter (defmap_t *ref, defmap_t *newItem) { + if (!ref || !newItem) return 1; + + newItem->next = ref->next; + newItem->prev = ref; + ref->next = newItem; + if (newItem->next) newItem->next->prev = newItem; + + return 0; +} + +/* Check whether item (or an identical one) is already in the chain and add it if neccessary. + * item is copied before insertion into chain and therefore left untouched. + * Returns 1 iff the item has been inserted into the list, 0 otherwise. */ +static int defmapAddCopyIfNew (defmap_t **head, defmap_t *item) { + defmap_t *dummy; + dummy = *head; + while (dummy && (dummy->sym != item->sym + || dummy->pc != item->pc + || dummy->acc.accessmethod != item->acc.accessmethod + || dummy->val != item->val + || dummy->in_val != item->in_val)) { + dummy = dummy->next; + } // while + + /* item already present? */ + if (dummy) return 0; + + /* otherwise: insert copy of item */ + dummy = copyDefmap (item); + dummy->next = *head; + if (*head) (*head)->prev = dummy; + *head = dummy; + + return 1; +} + +/* Releases a defmap. This also removes the map from its chain -- update the head manually! */ +static void deleteDefmap (defmap_t *map) { + if (!map) return; + + /* unlink from chain -- fails for the first item (head is not updated!) */ + if (map->next) map->next->prev = map->prev; + if (map->prev) map->prev->next = map->next; + + /* clear map */ + memset (map, 0, sizeof (defmap_t)); + + /* save for future use */ + map->next = defmap_free; + defmap_free = map; + ++defmap_free_count; +} + +/* Release all defmaps referenced from map. */ +static void deleteDefmapChain (defmap_t **_map) { + defmap_t *map, *next; + + if (!_map) return; + + map = *_map; + + /* find list head */ + while (map && map->prev) map = map->prev; + + /* delete all items */ + while (map) { + next = map->next; + deleteDefmap (map); + map = next; + } // while + + *_map = NULL; +} + +/* Free all defmap items. */ +static void freeDefmap (defmap_t **_map) { + defmap_t *next; + defmap_t *map; + + if (!_map) return; + + map = (*_map); + + /* find list head */ + while (map->prev) map = map->prev; + + /* release all items */ + while (map) { + next = map->next; + Safe_free (map); + map = next; + } + + (*_map) = NULL; +} + +/* Returns the most recent definition for the given symbol preceeding pc. + * If no definition is found, NULL is returned. + * If pc == NULL the whole list is scanned. */ +static defmap_t *defmapFindDef (defmap_t *map, symbol_t sym, pCode *pc) { + defmap_t *curr = map; + + if (pc) { + /* skip all definitions up to pc */ + while (curr && (curr->pc != pc)) curr = curr->next; + + /* pc not in the list -- scan the whole list for definitions */ + if (!curr) { + fprintf (stderr, "pc %p not found in defmap -- scanning whole list for symbol '%s'\n", pc, strFromSym (sym)); + curr = map; + } else { + /* skip all definitions performed by pc */ + while (curr && (curr->pc == pc)) curr = curr->next; + } + } // if (pc) + + /* find definition for sym */ + while (curr && (!curr->acc.access.isWrite || (curr->sym != sym))) { + curr = curr->next; + } + + return curr; +} + +#if 0 +/* Returns the first use (read) of the given symbol AFTER pc. + * If no such use is found, NULL is returned. + * If pc == NULL the whole list is scanned. */ +static defmap_t *defmapFindUse (defmap_t *map, symbol_t sym, pCode *pc) { + defmap_t *curr = map, *prev = NULL; + + if (pc) { + /* skip all definitions up to pc */ + while (curr && (curr->pc != pc)) { prev = curr; curr = curr->next; } + + /* pc not in the list -- scan the whole list for definitions */ + if (!curr) { + //fprintf (stderr, "pc %p not found in defmap -- scanning whole list for symbol '%s'\n", pc, strFromSym (sym)); + curr = prev; + } + } else { + /* find end of list */ + while (curr && curr->next) curr = curr->next; + } // if (pc) + + /* find use of sym (scan list backwards) */ + while (curr && (!curr->acc.access.isRead || (curr->sym != sym))) curr = curr->prev; + + return curr; +} +#endif + +/* Return the defmap entry for sym AT pc. + * If none is found, NULL is returned. + * If more than one entry is found an assertion is triggered. */ +static defmap_t *defmapCurr (defmap_t *map, symbol_t sym, pCode *pc) { + defmap_t *res = NULL; + + /* find entries for pc */ + while (map && map->pc != pc) map = map->next; + + /* find first entry for sym @ pc */ + while (map && map->pc == pc && map->sym != sym) map = map->next; + + /* no entry found */ + if (!map) return NULL; + + /* check for more entries */ + res = map; + map = map->next; + while (map && map->pc == pc) { + /* more than one entry for sym @ pc found? */ + assert (map->sym != sym); + map = map->next; + } + + /* return single entry for sym @ pc */ + return res; +} + +/* Modifies the definition of sym at pCode to newval. + * Returns 0 on success, 1 if no definition of sym in pc has been found. + */ +static int defmapUpdate (defmap_t *map, symbol_t sym, pCode *pc, valnum_t newval) { + defmap_t *m = map; + + /* find definitions of pc */ + while (m && m->pc != pc) m = m->next; + + /* find definition of sym at pc */ + while (m && m->pc == pc && (!m->acc.access.isWrite || (m->sym != sym))) m = m->next; + + /* no definition found */ + if (!m) return 1; + + /* redefine */ + m->val = newval; + + /* update following uses of sym */ + while (m && m->pc == pc) m = m->prev; + while (m) { + if (m->sym == sym) { + m->in_val = newval; + if (m->acc.access.isWrite) m = NULL; + } // if + if (m) m = m->prev; + } // while + + return 0; +} + +/* ======================================================================== */ +/* === STACK ROUTINES ===================================================== */ +/* ======================================================================== */ + +typedef struct stack_s { + void *data; + struct stack_s *next; +} stackitem_t; + +typedef stackitem_t *dynstack_t; +static stackitem_t *free_stackitems = NULL; + +/* Create a stack with one item. */ +static dynstack_t *newStack () { + dynstack_t *s = (dynstack_t *) Safe_malloc (sizeof (dynstack_t)); + *s = NULL; + return s; +} + +/* Remove a stack -- its items are only marked free. */ +static void deleteStack (dynstack_t *s) { + stackitem_t *i; + + while (*s) { + i = *s; + *s = (*s)->next; + i->next = free_stackitems; + free_stackitems = i; + } // while + Safe_free (s); +} + +/* Release all stackitems. */ +static void releaseStack () { + stackitem_t *i; + + while (free_stackitems) { + i = free_stackitems->next; + Safe_free(free_stackitems); + free_stackitems = i; + } // while +} + +static void stackPush (dynstack_t *stack, void *data) { + stackitem_t *i; + + if (free_stackitems) { + i = free_stackitems; + free_stackitems = free_stackitems->next; + } else { + i = (stackitem_t *) Safe_calloc (1, sizeof (stackitem_t)); + } + i->data = data; + i->next = *stack; + *stack = i; +} + +static void *stackPop (dynstack_t *stack) { + void *data; + stackitem_t *i; + + if (stack && *stack) { + data = (*stack)->data; + i = *stack; + *stack = (*stack)->next; + i->next = free_stackitems; + free_stackitems = i; + return data; + } else { + return NULL; + } +} + +#if 0 +static int stackContains (dynstack_t *s, void *data) { + stackitem_t *i; + if (!s) return 0; + i = *s; + while (i) { + if (i->data == data) return 1; + i = i->next; + } // while + + /* not found */ + return 0; +} +#endif + +static int stackIsEmpty (dynstack_t *s) { + return (*s == NULL); +} + + +typedef struct { + pCodeFlow *flow; + defmap_t *lastdef; +} state_t; + +static state_t *newState (pCodeFlow *flow, defmap_t *lastdef) { + state_t *s = (state_t *) Safe_calloc (1, sizeof (state_t)); + s->flow = flow; + s->lastdef = lastdef; + return s; +} + +static void deleteState (state_t *s) { + Safe_free (s); +} + +static int stateIsNew (state_t *state, dynstack_t *todo, dynstack_t *done) { + stackitem_t *i; + + /* scan working list for state */ + if (todo) { + i = *todo; + while (i) { + /* is i == state? -- state not new */ + if ((((state_t *) (i->data))->flow == state->flow) && (((state_t *) (i->data))->lastdef == state->lastdef)) return 0; + i = i->next; + } // while + } + + if (done) { + i = *done; + while (i) { + /* is i == state? -- state not new */ + if ((((state_t *) (i->data))->flow == state->flow) && (((state_t *) (i->data))->lastdef == state->lastdef)) return 0; + i = i->next; + } // while + } + + /* not found -- state is new */ + return 1; +} + +static inline valnum_t newValnum (); + +const char *pic16_pBlockGetFunctionName (pBlock *pb) { + pCode *pc; + + if (!pb) return ""; + + pc = pic16_findNextpCode (pb->pcHead, PC_FUNCTION); + if (pc && isPCF(pc)) return PCF(pc)->fname; + else return ""; +} + +static defmap_t *pic16_pBlockAddInval (pBlock *pb, symbol_t sym) { + defmap_t *map; + pCodeFlow *pcfl; + + assert(pb); + + pcfl = PCI(pic16_findNextInstruction (pb->pcHead))->pcflow; + + /* find initial value (assigning pc == NULL) */ + map = PCFL(pcfl)->in_vals; + while (map && map->sym != sym) map = map->next; + + /* initial value already present? */ + if (map) { + //fprintf (stderr, "found init value for sym %s (%x): %u\n", strFromSym(sym), sym, map->val); + return map; + } + + /* create a new initial value */ + map = newDefmap (sym, 0x00, 0xff, 0, 1, NULL, newValnum(), PCFL(pcfl)->in_vals); + PCFL(pcfl)->in_vals = map; + //fprintf (stderr, "Created init value for sym %s (%x): %u\n", strFromSym(sym), sym, map->val); + return map; + +#if 0 + /* insert map as last item in pcfl's defmap */ + if (!prev) prev = PCFL(pcfl)->defmap; + if (!prev) { + PCFL(pcfl)->defmap = map; + } else { + while (prev->next) prev = prev->next; + prev->next = map; + map->prev = prev; + } + + return map; +#endif +} + +/* Find all reaching definitions for sym at pc. + * A new (!) list of definitions is returned. + * Returns the number of reaching definitions found. + * The defining defmap entries are returned in *chain. + */ +static int defmapFindAll (symbol_t sym, pCode *pc, defmap_t **chain) { + defmap_t *map; + defmap_t *res; + + pCodeFlow *curr; + pCodeFlowLink *succ; + state_t *state; + dynstack_t *todo; /** stack of state_t */ + dynstack_t *done; /** stack of state_t */ + + int firstState, n_defs; + + assert (pc && isPCI(pc) && PCI(pc)->pcflow); + assert (chain); + + /* initialize return list */ + *chain = NULL; + + /* wildcard symbol? */ + if (!sym) return 0; + + //fprintf (stderr, "Searching definition of sym %s(%x) @ pc %p(%p)\n", strFromSym(sym), sym, pc, pc->pb); + + map = PCI(pc)->pcflow->defmap; + + res = defmapFindDef (map, sym, pc); + //if (res) fprintf (stderr, "found def in own flow @ pc %p\n", res->pc); + +#define USE_PRECALCED_INVALS 1 +#if USE_PRECALCED_INVALS + if (!res && PCI(pc)->pcflow->in_vals) { + res = defmapFindDef (PCI(pc)->pcflow->in_vals, sym, NULL); + if (res) { + //fprintf (stderr, "found def in init values\n"); + df_findall_in_vals++; + } + } +#endif + + if (res) { + // found a single definition (in pc's flow) + //fprintf (stderr, "unique definition for %s @ %p found @ %p (val: %x)\n", strFromSym(sym), pc, res->pc, res->val); + defmapAddCopyIfNew (chain, res); + df_findall_sameflow++; + return 1; + } + +#if USE_PRECALCED_INVALS + else { + defmapAddCopyIfNew (chain, pic16_pBlockAddInval (pc->pb, sym)); + return 1; + } + +#endif + +#define FORWARD_FLOW_ANALYSIS 1 +#if defined FORWARD_FLOW_ANALYSIS && FORWARD_FLOW_ANALYSIS + /* no definition found in pc's flow preceeding pc */ + todo = newStack (); + done = newStack (); + n_defs = 0; firstState = 1; + stackPush (todo, newState (PCI(pic16_findNextInstruction(pc->pb->pcHead))->pcflow, res)); + + while (!stackIsEmpty (todo)) { + state = (state_t *) stackPop (todo); + stackPush (done, state); + curr = state->flow; + res = state->lastdef; + //fprintf (stderr, "searching def of sym %s in pcFlow %p (lastdef %x @ %p)\n", strFromSym(sym), curr, res ? res->val : 0, res ? res->pc : NULL); + + /* there are no definitions BEFORE pc in pc's flow (see above) */ + if (curr == PCI(pc)->pcflow) { + if (!res) { + //fprintf (stderr, "symbol %s(%x) might be used uninitialized at %p\n", strFromSym(sym), sym, pc); + res = pic16_pBlockAddInval (pc->pb, sym); + if (defmapAddCopyIfNew (chain, res)) n_defs++; + res = NULL; + } else { + //fprintf (stderr, "reaching definition for %s @ %p found @ %p (val: %x)\n", strFromSym(sym), pc, res->pc, res->val); + if (defmapAddCopyIfNew (chain, res)) n_defs++; + } + } + + /* save last definition of sym in this flow as initial def in successors */ + res = defmapFindDef (curr->defmap, sym, NULL); + if (!res) res = state->lastdef; + + /* add successors to working list */ + state = newState (NULL, NULL); + succ = (pCodeFlowLink *) setFirstItem (curr->to); + while (succ) { + //fprintf (stderr, " %p --> %p with %x\n", curr, succ->pcflow, res ? res->val : 0); + state->flow = succ->pcflow; + state->lastdef = res; + if (stateIsNew (state, todo, done)) { + stackPush (todo, state); + state = newState (NULL, NULL); + } // if + succ = (pCodeFlowLink *) setNextItem (curr->to); + } // while + deleteState (state); + } // while + +#else // !FORWARD_FLOW_ANALYSIS + + /* no definition found in pc's flow preceeding pc */ + todo = newStack (); + done = newStack (); + n_defs = 0; firstState = 1; + stackPush (todo, newState (PCI(pc)->pcflow, res)); + + while (!stackIsEmpty (todo)) { + state = (state_t *) stackPop (todo); + curr = state->flow; + + if (firstState) { + firstState = 0; + /* only check predecessor flows */ + } else { + /* get (last) definition of sym in this flow */ + res = defmapFindDef (curr->defmap, sym, NULL); + } + + if (res) { + /* definition found */ + //fprintf (stderr, "reaching definition for %s @ %p found @ %p (val: %x)\n", strFromSym(sym), pc, res->pc, res->val); + if (defmapAddCopyIfNew (chain, res)) n_defs++; + } else { + /* no definition found -- check predecessor flows */ + state = newState (NULL, NULL); + succ = (pCodeFlowLink *) setFirstItem (curr->from); + + /* if no flow predecessor available -- sym might be uninitialized */ + if (!succ) { + //fprintf (stder, "sym %s might be used uninitialized at %p\n", strFromSym (sym), pc); + res = newDefmap (sym, 0xff, 0, 1, NULL, 0, *chain); + if (defmapAddCopyIfNew (chain, res)) n_defs++; + deleteDefmap (res); res = NULL; + } + + while (succ) { + //fprintf (stderr, " %p --> %p with %x\n", curr, succ->pcflow, res ? res->val : 0); + state->flow = succ->pcflow; + state->lastdef = res; + if (stateIsNew (state, todo, done)) { + stackPush (todo, state); + state = newState (NULL, NULL); + } // if + succ = (pCodeFlowLink *) setNextItem (curr->from); + } // while + deleteState (state); + } + } // while + +#endif + + /* clean up done stack */ + while (!stackIsEmpty(done)) { + deleteState ((state_t *) stackPop (done)); + } // while + deleteStack (done); + + /* return number of items in result set */ + if (n_defs == 0) { + //fprintf (stderr, "sym %s might be used uninitialized at %p\n", strFromSym (sym), pc); + } else if (n_defs == 1) { + assert (*chain); + //fprintf (stderr, "sym %s at %p always defined as %x @ %p\n", strFromSym(sym), pc, (*chain)->val, (*chain)->pc); + } else if (n_defs > 0) { + //fprintf (stderr, "%u definitions for sym %s at %p found:\n", n_defs, strFromSym(sym), pc); +#if 0 + res = *chain; + while (res) { + fprintf (stderr, " as %4x @ %p\n", res->val, res->pc); + res = res->next; + } // while +#endif + } + //fprintf (stderr, "%u definitions for sym %s at %p found\n", n_defs, strFromSym(sym), pc); + df_findall_otherflow++; + return n_defs; +} + +/* ======================================================================== */ +/* === VALUE NUMBER HANDLING ============================================== */ +/* ======================================================================== */ + +static valnum_t nextValnum = 0x1000; +static hTab *map_symToValnum = NULL; + +/** Return a new value number. */ +static inline valnum_t newValnum () { + return (nextValnum += 4); +} + +static valnum_t valnumFromStr (const char *str) { + symbol_t sym; + valnum_t val; + void *res; + + sym = symFromStr (str); + + if (!map_symToValnum) { + map_symToValnum = newHashTable (128); + } // if + + /* literal already known? */ + res = hTabFindByKey (map_symToValnum, sym % map_symToValnum->size, INT_TO_PTR(sym), &ptrcmp); + + /* return existing valnum */ + if (res) return (valnum_t) PTR_TO_INT(res); + + /* create new valnum */ + val = newValnum(); + hTabAddItemLong (&map_symToValnum, sym % map_symToValnum->size, INT_TO_PTR(sym), INT_TO_PTR(val)); + //fprintf (stderr, "NEW VALNUM %x for symbol %s\n", val, str); + return val; +} + +/* Create a valnum for a literal. */ +static valnum_t valnumFromLit (unsigned int lit) { + return ((valnum_t) 0x100 + (lit & 0x0FF)); +} + +/* Return the (positive) literal value represented by val + * or -1 iff val is no known literal's valnum. */ +static int litFromValnum (valnum_t val) { + if (val >= 0x100 && val < 0x200) { + /* valnum is a (known) literal */ + return val & 0x00FF; + } else { + /* valnum is not a known literal */ + return -1; + } +} + +#if 0 +/* Sanity check - all flows in a block must be reachable from initial flow. */ +static int verifyAllFlowsReachable (pBlock *pb) { + set *reached; + set *flowInBlock; + set *checked; + pCode *pc; + pCodeFlow *pcfl; + pCodeFlowLink *succ; + int res; + + //fprintf (stderr, "%s - started for %s.\n" ,__FUNCTION__, pic16_pBlockGetFunctionName (pb)); + + reached = NULL; + flowInBlock = NULL; + checked = NULL; + /* mark initial flow as reached (and "not needs to be reached") */ + pc = pic16_findNextpCode (pb->pcHead, PC_FLOW); + assert (pc); + addSetHead (&reached, pc); + addSetHead (&checked, pc); + + /* mark all further flows in block as "need to be reached" */ + pc = pb->pcHead; + do { + if (isPCI(pc)) addSetIfnotP (&flowInBlock, PCI(pc)->pcflow); + pc = pic16_findNextInstruction (pc->next); + } while (pc); + + while (reached && (pcfl = (pCodeFlow *)indexSet (reached, 0)) != NULL) { + /* mark as reached and "not need to be reached" */ + deleteSetItem (&reached, pcfl); + //fprintf (stderr, "%s - checking %p\n" ,__FUNCTION__, pcfl); + + /* flow is no longer considered unreachable */ + deleteSetItem (&flowInBlock, pcfl); + + for (succ = setFirstItem (pcfl->to); succ; succ = setNextItem (pcfl->to)) { + if (!isinSet (checked, succ->pcflow)) { + /* flow has never been reached before */ + addSetHead (&reached, succ->pcflow); + addSetHead (&checked, succ->pcflow); + } // if + } // for succ + } // while + + //fprintf (stderr, "%s - finished\n", __FUNCTION__); + + /* by now every flow should have been reached + * --> flowInBlock should be empty */ + res = (flowInBlock == NULL); + +#if 1 + if (flowInBlock) { + fprintf (stderr, "not all flows reached in %s:\n", pic16_pBlockGetFunctionName (pb)); + while (flowInBlock) { + pcfl = indexSet (flowInBlock, 0); + fprintf (stderr, "not reached: flow %p\n", pcfl); + deleteSetItem (&flowInBlock, pcfl); + } // while + } +#endif + + /* clean up */ + deleteSet (&reached); + deleteSet (&flowInBlock); + deleteSet (&checked); + + /* if we reached every flow, succ is NULL by now... */ + //assert (res); // will fire on unreachable code... + return (res); +} +#endif + +/* Checks a flow for accesses to sym AFTER pc. + * + * Returns -1 if the symbol is read in this flow (before redefinition), + * returns 0 if the symbol is redefined in this flow or + * returns a mask [0x01 -- 0xFF] indicating the bits still alive after this flow. + */ +int pic16_isAliveInFlow (symbol_t sym, int mask, pCodeFlow *pcfl, pCode *pc) { + defmap_t *map, *mappc; + + /* find pc or start of definitions */ + map = pcfl->defmap; + while (map && (map->pc != pc) && map->next) map = map->next; + /* if we found pc -- ignore it */ + while (map && map->pc == pc) map = map->prev; + + /* scan list backwards (first definition first) */ + while (map && mask) { +// if (map->sym == sym) { + //fprintf (stderr, "%s: accessing sym %s in pc %p/map %p\n", __FUNCTION__, strFromSym(sym), map->pc, map); + mappc = map; + /* scan list for reads at this pc first */ + while (map && map->pc == mappc->pc) { + /* is the symbol (partially) read? */ + if ((map->sym == sym) && (map->acc.access.isRead && ((map->acc.access.in_mask & mask) != 0))) { + //if (sym != SPO_STATUS) fprintf (stderr, "%s: symbol %s read at pc %p\n", __FUNCTION__, strFromSym (sym), map->pc); + return -1; + } + map = map->prev; + } // while + map = mappc; + + while (map && map->pc == mappc->pc) { + /* honor (partial) redefinitions of sym */ + if ((map->sym == sym) && (map->acc.access.isWrite)) { + mask &= ~map->acc.access.mask; + //if (sym != SPO_STATUS) fprintf (stderr, "%s: symbol %s redefined at pc %p, alive mask: %x\n", __FUNCTION__, strFromSym (sym), map->pc, mask); + } + map = map->prev; + } // while +// } // if + /* map already points to the first defmap for the next pCode */ + //map = mappc->prev; + } // while + + /* the symbol is not completely redefined in this flow and not accessed -- symbol + * is still alive; return the appropriate mask of alive bits */ + return mask; +} + +/* Check whether a symbol is alive (AFTER pc). */ +static int pic16_isAlive (symbol_t sym, pCode *pc) { + int mask, visit; + defmap_t *map; + dynstack_t *todo, *done; + state_t *state; + pCodeFlow *pcfl; + pCodeFlowLink *succ; + + mask = 0x00ff; + + assert (isPCI(pc)); + pcfl = PCI(pc)->pcflow; + map = pcfl->defmap; + + todo = newStack (); + done = newStack (); + + state = newState (pcfl, (defmap_t *) INT_TO_PTR(mask)); + stackPush (todo, state); + visit = 0; + + while (!stackIsEmpty (todo)) { + state = (state_t *) stackPop (todo); + pcfl = state->flow; + mask = PTR_TO_INT(state->lastdef); + if (visit) stackPush (done, state); else deleteState(state); + //fprintf (stderr, "%s: checking flow %p for symbol %s (%x)/%x\n", __FUNCTION__, pcfl, strFromSym(sym), sym, mask); + // make sure flows like A(i1,i2,pc,i3,...) --> A with pc reading and writing sym are handled correctly! + mask = pic16_isAliveInFlow (sym, mask, pcfl, visit == 0 ? pc : NULL); + visit++; + + /* symbol is redefined in flow before use -- not alive in this flow (maybe in others?) */ + if (mask == 0) continue; + + /* symbol is (partially) read before redefinition in flow */ + if (mask == -1) break; + + /* symbol is neither read nor completely redefined -- check successor flows */ + for (succ = setFirstItem(pcfl->to); succ; succ = setNextItem (pcfl->to)) { + state = newState (succ->pcflow, (defmap_t *) INT_TO_PTR(mask)); + if (stateIsNew (state, todo, done)) { + stackPush (todo, state); + } else { + deleteState (state); + } + } // for + } // while + + while (!stackIsEmpty (todo)) deleteState ((state_t *) stackPop (todo)); + while (!stackIsEmpty (done)) deleteState ((state_t *) stackPop (done)); + + /* symbol is read in at least one flow -- is alive */ + if (mask == -1) return 1; + + /* symbol is read in no flow */ + return 0; +} + +/* Returns whether access to the given symbol has side effects. */ +static int pic16_symIsSpecial (symbol_t sym) { + //fprintf (stderr, "%s: sym=%x\n", __FUNCTION__, sym); + switch (sym) { + case SPO_INDF0: + case SPO_PLUSW0: + case SPO_POSTINC0: + case SPO_POSTDEC0: + case SPO_PREINC0: + case SPO_INDF1: + case SPO_PLUSW1: + case SPO_POSTINC1: + case SPO_POSTDEC1: + case SPO_PREINC1: + case SPO_INDF2: + case SPO_PLUSW2: + case SPO_POSTINC2: + case SPO_POSTDEC2: + case SPO_PREINC2: + case SPO_PCL: + return 1; + default: + /* no special effects known */ + return 0; + } // switch + + return 0; +} + +/* Check whether a register should be considered local (to the current function) or not. */ +static int pic16_regIsLocal (regs *r) { + symbol_t sym; + if (r) { + if (r->type == REG_TMP) return 1; + + sym = symFromStr (r->name); + switch (sym) { + case SPO_WREG: + case SPO_FSR0L: // used in ptrget/ptrput + case SPO_FSR0H: // ... as well + case SPO_FSR1L: // used as stack pointer... (so not really local but shared among function calls) + case SPO_FSR1H: // ... as well + case SPO_FSR2L: // used as frame pointer + case SPO_FSR2H: // ... as well + case SPO_PRODL: // used to return values from functions + case SPO_PRODH: // ... as well + /* these registers (and some more...) are considered local */ + return 1; + break; + default: + /* for unknown regs: check is marked local, leave if not */ + if (r->isLocal) { + return 1; + } else { + //fprintf (stderr, "%s: non-local reg used: %s\n", __FUNCTION__, r->name); + return 0; + } + } // switch + } // if + + /* if in doubt, assume non-local... */ + return 0; +} + +/* Check all symbols touched by pc whether their newly assigned values are read. + * Returns 0 if no symbol is used later on, 1 otherwise. */ +static int pic16_pCodeIsAlive (pCode *pc) { + pCodeInstruction *pci; + defmap_t *map, *lastpc; + regs *checkreg; + + /* we can only handle PCIs */ + if (!isPCI(pc)) return 1; + + //pc->print (stderr, pc); + + pci = PCI(pc); + assert (pci && pci->pcflow && pci->pcflow->defmap); + + /* NEVER remove instructions with implicit side effects */ + switch (pci->op) { + case POC_TBLRD: + case POC_TBLRD_POSTINC: /* modify TBLPTRx */ + case POC_TBLRD_POSTDEC: + case POC_TBLRD_PREINC: + case POC_TBLWT: /* modify program memory */ + case POC_TBLWT_POSTINC: /* modify TBLPTRx */ + case POC_TBLWT_POSTDEC: + case POC_TBLWT_PREINC: + case POC_CLRWDT: /* clear watchdog timer */ + case POC_PUSH: /* should be safe to remove though... */ + case POC_POP: /* should be safe to remove though... */ + case POC_CALL: + case POC_RCALL: + case POC_RETFIE: + case POC_RETURN: + //fprintf (stderr, "%s: instruction with implicit side effects not removed: %s\n", __FUNCTION__, pci->mnemonic); + return 1; + + default: + /* no special instruction */ + break; + } // switch + + /* prevent us from removing assignments to non-local variables */ + checkreg = NULL; + if (PCI(pc)->outCond & PCC_REGISTER) checkreg = pic16_getRegFromInstruction (pc); + else if (PCI(pc)->outCond & PCC_REGISTER2) checkreg = pic16_getRegFromInstruction2(pc); + + if ((PCI(pc)->outCond & (PCC_REGISTER | PCC_REGISTER2)) && !checkreg) { + /* assignment to DIRECT operand like "BSF (_global + 1),6" */ + //fprintf (stderr, "%s: assignment to register detected, but register not available!\n", __FUNCTION__); + //pc->print (stderr, pc); + return 1; + } + if ((PCI(pc)->outCond & (PCC_REGISTER | PCC_REGISTER2)) && !pic16_regIsLocal (checkreg)) { + //fprintf (stderr, "%s: dest-reg not local %s\n", __FUNCTION__, checkreg ? checkreg->name : ""); + return 1; + } + +#if 1 + /* OVERKILL: prevent us from removing reads from non-local variables + * THIS IS HERE TO AVOID PROBLEMS WITH VOLATILE OPERANDS ONLY! + * Once registers get a "isVolatile" field this might be handled more efficiently... */ + checkreg = NULL; + if (PCI(pc)->inCond & PCC_REGISTER) checkreg = pic16_getRegFromInstruction (pc); + else if (PCI(pc)->inCond & PCC_REGISTER2) checkreg = pic16_getRegFromInstruction2(pc); + + if ((PCI(pc)->inCond & (PCC_REGISTER | PCC_REGISTER2)) && !checkreg) { + /* read from DIRECT operand like "BTFSS (_global + 1),6" -- might be volatile */ + //fprintf (stderr, "%s: read from register detected, but register not available!\n", __FUNCTION__); + //pc->print (stderr, pc); + return 1; + } + if ((PCI(pc)->inCond & (PCC_REGISTER | PCC_REGISTER2)) && !pic16_regIsLocal (checkreg)) { + //fprintf (stderr, "%s: src-reg not local: %s\n", __FUNCTION__, checkreg ? checkreg->name : ""); + return 1; + } +#endif + + /* now check that the defined symbols are not used */ + map = pci->pcflow->defmap; + + /* find items for pc */ + while (map && map->pc != pc) map = map->next; + + /* no entries found? something is fishy with DF analysis... -- play safe */ + if (!map) { + if (pic16_pcode_verbose) { + fprintf (stderr, "%s: defmap not found\n", __FUNCTION__); + } + return 1; + } + + /* remember first item assigned to pc for later use */ + lastpc = map; + + /* check all symbols being modified by pc */ + while (map && map->pc == pc) { + if (map->sym == 0) { map = map->next; continue; } + + /* keep pc if it references special symbols (like POSTDEC0) */ +#if 0 + { + char buf[256]; + pic16_pCode2str (buf, 256, pc); + fprintf (stderr, "%s: checking for sym %x(%s) at pc %p (%s)\n", __FUNCTION__, map->sym, strFromSym (map->sym), pc, buf); + } +#endif + if (pic16_symIsSpecial (map->sym)) { + //fprintf (stderr, "%s: special sym\n", __FUNCTION__); + return 1; + } + if (map->acc.access.isWrite) { + if (pic16_isAlive (map->sym, pc)) { + //fprintf (stderr, "%s(%s): pCode is alive (sym %s still used)\n", __FUNCTION__, pic16_pBlockGetFunctionName (pc->pb),strFromSym (map->sym)); + return 1; + } + } + map = map->next; + } // while + + /* no use for any of the pc-assigned symbols found -- pCode is dead and can be removed */ +#if 0 + { + char buf[256]; + pic16_pCode2str (buf, 256, pc); + fprintf (stderr, "%s: pCode %p (%s) is dead.\n", __FUNCTION__, pc, buf); + } +#endif + return 0; +} + +/* Adds implied operands to the list. + * sym - operand being accessed in the pCode + * list - list to append the operand + * isRead - set to 1 iff sym is read in pCode + * listRead - set to 1 iff all operands being read are to be listed + * + * Returns 0 for "normal" operands, 1 for special operands. + */ +static int fixupSpecialOperands (symbol_t sym, int in_mask, int mask, pCode *pc, valnum_t val, defmap_t **list, int isRead, int isWrite) { + /* check whether accessing REG accesses other REGs as well */ + switch (sym) { + case SPO_INDF0: + /* reads FSR0x */ + *list = newDefmap (sym, 0xff, 0xff, 0, 0, pc, 0, *list); + *list = newDefmap (SPO_FSR0L, 0xff, 0xff, 1, 0, pc, 0, *list); + *list = newDefmap (SPO_FSR0H, 0xff, 0xff, 1, 0, pc, 0, *list); + break; + + case SPO_PLUSW0: + /* reads FSR0x and WREG */ + *list = newDefmap (SPO_WREG, 0xff, 0x00, 1, 0, pc, 0, *list); + *list = newDefmap (sym, 0xff, 0xff, 0, 0, pc, 0, *list); + *list = newDefmap (SPO_FSR0L, 0xff, 0xff, 1, 0, pc, 0, *list); + *list = newDefmap (SPO_FSR0H, 0xff, 0xff, 1, 0, pc, 0, *list); + break; + + case SPO_POSTDEC0: + case SPO_POSTINC0: + case SPO_PREINC0: + /* reads/modifies FSR0x */ + *list = newDefmap (sym, 0xff, 0xff, 0, 0, pc, 0, *list); + *list = newDefmap (SPO_FSR0L, 0xff, 0xff, 1, 1, pc, newValnum (), *list); + *list = newDefmap (SPO_FSR0H, 0xff, 0xff, 1, 1, pc, newValnum (), *list); + break; + + case SPO_INDF1: + /* reads FSR1x */ + *list = newDefmap (sym, 0xff, 0xff, 0, 0, pc, 0, *list); + *list = newDefmap (SPO_FSR1L, 0xff, 0xff, 1, 0, pc, 0, *list); + *list = newDefmap (SPO_FSR1H, 0xff, 0xff, 1, 0, pc, 0, *list); + break; + + case SPO_PLUSW1: + /* reads FSR1x and WREG */ + *list = newDefmap (SPO_WREG, 0xff, 0x00, 1, 0, pc, 0, *list); + *list = newDefmap (sym, 0xff, 0xff, 0, 0, pc, 0, *list); + *list = newDefmap (SPO_FSR1L, 0xff, 0xff, 1, 0, pc, 0, *list); + *list = newDefmap (SPO_FSR1H, 0xff, 0xff, 1, 0, pc, 0, *list); + break; + + case SPO_POSTDEC1: + case SPO_POSTINC1: + case SPO_PREINC1: + /* reads/modifies FSR1x */ + *list = newDefmap (sym, 0xff, 0xff, 0, 0, pc, 0, *list); + *list = newDefmap (SPO_FSR1L, 0xff, 0xff, 1, 1, pc, newValnum (), *list); + *list = newDefmap (SPO_FSR1H, 0xff, 0xff, 1, 1, pc, newValnum (), *list); + break; + + case SPO_INDF2: + /* reads FSR2x */ + *list = newDefmap (sym, 0xff, 0xff, 0, 0, pc, 0, *list); + *list = newDefmap (SPO_FSR2L, 0xff, 0xff, 1, 0, pc, 0, *list); + *list = newDefmap (SPO_FSR2H, 0xff, 0xff, 1, 0, pc, 0, *list); + break; + + case SPO_PLUSW2: + /* reads FSR2x and WREG */ + *list = newDefmap (SPO_WREG, 0xff, 0x00, 1, 0, pc, 0, *list); + *list = newDefmap (sym, 0xff, 0xff, 0, 0, pc, 0, *list); + *list = newDefmap (SPO_FSR2L, 0xff, 0xff, 1, 0, pc, 0, *list); + *list = newDefmap (SPO_FSR2H, 0xff, 0xff, 1, 0, pc, 0, *list); + break; + + case SPO_POSTDEC2: + case SPO_POSTINC2: + case SPO_PREINC2: + /* reads/modifies FSR2x */ + *list = newDefmap (sym, 0xff, 0xff, 0, 0, pc, 0, *list); + *list = newDefmap (SPO_FSR2L, 0xff, 0xff, 1, 1, pc, newValnum (), *list); + *list = newDefmap (SPO_FSR2H, 0xff, 0xff, 1, 1, pc, newValnum (), *list); + break; + + case SPO_PCL: + /* modifies PCLATH and PCLATU */ + *list = newDefmap (SPO_PCL, 0xff, 0xff, isRead, isWrite, pc, newValnum (), *list); + if (isRead) { + /* reading PCL updates PCLATx */ + *list = newDefmap (SPO_PCLATH, 0xff, 0xff, 0, 1, pc, newValnum (), *list); + *list = newDefmap (SPO_PCLATU, 0xff, 0xff, 0, 1, pc, newValnum (), *list); + } + if (isWrite) { + /* writing PCL implicitly reads PCLATx (computed GOTO) */ + *list = newDefmap (SPO_PCLATH, 0xff, 0xff, 1, 0, pc, 0, *list); + *list = newDefmap (SPO_PCLATU, 0xff, 0xff, 1, 0, pc, 0, *list); + } + break; + + default: + *list = newDefmap (sym, in_mask, mask, isRead, isWrite, pc, val, *list); + /* nothing special */ + return 0; + break; + } + + /* has been a special operand */ + return 1; +} + +static symbol_t pic16_fsrsym_idx[][2] = { + {SPO_FSR0L, SPO_FSR0H}, + {SPO_FSR1L, SPO_FSR1H}, + {SPO_FSR2L, SPO_FSR2H} +}; + +/* Merge multiple defmap entries for the same symbol for list's pCode. */ +static void mergeDefmapSymbols (defmap_t *list) { + defmap_t *ref, *curr, *temp; + + /* now make sure that each symbol occurs at most once per pc */ + ref = list; + while (ref && (ref->pc == list->pc)) { + curr = ref->next; + while (curr && (curr->pc == list->pc)) { + if (curr->sym == ref->sym) { + //fprintf (stderr, "Merging defmap entries for symbol %s\n", strFromSym (ref->sym)); + /* found a symbol occuring twice... merge the two */ + if (curr->acc.access.isRead) { + //if (ref->acc.access.isRead) fprintf (stderr, "symbol %s was marked twice as read at pc %p\n", strFromSym (ref->sym), ref->pc); + ref->acc.access.isRead = 1; + ref->acc.access.in_mask |= curr->acc.access.in_mask; + } + if (curr->acc.access.isWrite) { + //if (ref->acc.access.isWrite) fprintf (stderr, "symbol %s was marked twice as written at pc %p\n", strFromSym (ref->sym), ref->pc); + ref->acc.access.isWrite = 1; + ref->acc.access.mask |= curr->acc.access.mask; + } + temp = curr; + curr = curr->next; + deleteDefmap (temp); + continue; // do not skip curr! + } // if + curr = curr->next; + } // while + ref = ref->next; + } // while +} + +/** Prepend list with the reads and definitions performed by pc. */ +static defmap_t *createDefmap (pCode *pc, defmap_t *list) { + pCodeInstruction *pci; + int cond, inCond, outCond; + int mask = 0xff, smask; + int isSpecial, isSpecial2; + symbol_t sym, sym2; + char *name; + + if (isPCAD(pc)) { + /* make sure there is at least one entry for each pc (needed by list traversal routines) */ + /* TODO: mark this defmap node as an ASMDIR -- any values might be read/modified */ + fprintf (stderr, "ASMDIRs not supported by data flow analysis!\n"); + list = newDefmap (0, 0xff, 0xff, 0, 0, pc, 0, list); + return list; + } + assert (isPCI(pc)); + pci = PCI(pc); + + /* handle bit instructions */ + if (pci->isBitInst) { + assert (pci->pcop->type == PO_GPR_BIT); + mask = 1U << (PCORB(PCI(pc)->pcop)->bit); + } + + /* handle (additional) implicit arguments */ + switch (pci->op) { + case POC_LFSR: + { + int lit; + valnum_t val; + lit = PCOL(pci->pcop)->lit; + assert (lit >= 0 && lit < 3); + //fprintf (stderr, "LFSR: %s // %s\n", pci->pcop->name, pic16_get_op(((pCodeOpLit2 *)(pci->pcop))->arg2, NULL, 0)); + val = valnumFromStr (pic16_get_op(((pCodeOpLit2 *)(pci->pcop))->arg2, NULL, 0)); + //fprintf (stderr, "LFSR lit=%u, symval=%4x\n", lit, val); + list = newDefmap (pic16_fsrsym_idx[lit][0], 0x00, 0xff, 0, 1, pc, val, list); + list = newDefmap (pic16_fsrsym_idx[lit][1], 0x00, 0xff, 0, 1, pc, val+1, list); // val+1 is guaranteed not be used as a valnum... + } + break; + + case POC_MOVLB: // BSR + case POC_BANKSEL: // BSR + list = newDefmap (SPO_BSR, 0x00, 0xff, 0, 1, pc, valnumFromStr (pic16_get_op (((pCodeOpLit2 *)(pci->pcop))->arg2, NULL, 0)), list); + break; + + case POC_MULWF: // PRODx + case POC_MULLW: // PRODx + list = newDefmap (SPO_PRODH, 0x00, 0xff, 0, 1, pc, newValnum (), list); + list = newDefmap (SPO_PRODL, 0x00, 0xff, 0, 1, pc, newValnum (), list); + break; + + case POC_POP: // TOS, STKPTR + list = newDefmap (SPO_STKPTR, 0xff, 0xff, 1, 1, pc, newValnum (), list); + list = newDefmap (SPO_TOSL, 0x00, 0xff, 0, 1, pc, newValnum (), list); + list = newDefmap (SPO_TOSH, 0x00, 0xff, 0, 1, pc, newValnum (), list); + list = newDefmap (SPO_TOSU, 0x00, 0xff, 0, 1, pc, newValnum (), list); + break; + + case POC_PUSH: // STKPTR + list = newDefmap (SPO_STKPTR, 0xff, 0xff, 1, 1, pc, newValnum (), list); + list = newDefmap (SPO_TOSL, 0xff, 0xff, 0, 1, pc, newValnum (), list); + list = newDefmap (SPO_TOSH, 0xff, 0xff, 0, 1, pc, newValnum (), list); + list = newDefmap (SPO_TOSU, 0xff, 0xff, 0, 1, pc, newValnum (), list); + break; + + case POC_CALL: // return values (and arguments?): WREG, PRODx, FSR0L + case POC_RCALL: // return values (and arguments?): WREG, PRODx, FSR0L + list = newDefmap (SPO_WREG, 0xff, 0xff, 1, 1, pc, newValnum (), list); + list = newDefmap (SPO_PRODL, 0xff, 0xff, 1, 1, pc, newValnum (), list); + list = newDefmap (SPO_PRODH, 0xff, 0xff, 1, 1, pc, newValnum (), list); + list = newDefmap (SPO_FSR0L, 0xff, 0xff, 1, 1, pc, newValnum (), list); + + /* needs correctly set-up stack pointer */ + list = newDefmap (SPO_FSR1L, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_FSR1H, 0xff, 0x00, 1, 0, pc, 0, list); + break; + + case POC_RETLW: // return values: WREG, PRODx, FSR0L + /* pseudo read on (possible) return values */ + // WREG is handled below via outCond + list = newDefmap (SPO_PRODL, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_PRODH, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_FSR0L, 0xff, 0x00, 1, 0, pc, 0, list); + + /* caller's stack pointers must be restored */ + list = newDefmap (SPO_FSR1L, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_FSR1H, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_FSR2L, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_FSR2H, 0xff, 0x00, 1, 0, pc, 0, list); + break; + + case POC_RETURN: // return values; WREG, PRODx, FSR0L + case POC_RETFIE: // return value: WREG, PRODx, FSR0L + /* pseudo read on (possible) return values */ + list = newDefmap (SPO_WREG, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_PRODL, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_PRODH, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_FSR0L, 0xff, 0x00, 1, 0, pc, 0, list); + + /* caller's stack pointers must be restored */ + list = newDefmap (SPO_FSR1L, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_FSR1H, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_FSR2L, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_FSR2H, 0xff, 0x00, 1, 0, pc, 0, list); + break; + + case POC_TBLRD: + list = newDefmap (SPO_TBLPTRL, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_TBLPTRH, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_TBLPTRU, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_TABLAT, 0x00, 0xff, 0, 1, pc, newValnum(), list); + break; + + case POC_TBLRD_POSTINC: + case POC_TBLRD_POSTDEC: + case POC_TBLRD_PREINC: + list = newDefmap (SPO_TBLPTRL, 0xff, 0xff, 1, 1, pc, newValnum(), list); + list = newDefmap (SPO_TBLPTRH, 0xff, 0xff, 1, 1, pc, newValnum(), list); + list = newDefmap (SPO_TBLPTRU, 0xff, 0xff, 1, 1, pc, newValnum(), list); + list = newDefmap (SPO_TABLAT, 0x00, 0xff, 0, 1, pc, newValnum(), list); + break; + + case POC_TBLWT: + list = newDefmap (SPO_TBLPTRL, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_TBLPTRH, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_TBLPTRU, 0xff, 0x00, 1, 0, pc, 0, list); + list = newDefmap (SPO_TABLAT, 0xff, 0x00, 1, 0, pc, 0, list); + break; + + case POC_TBLWT_POSTINC: + case POC_TBLWT_POSTDEC: + case POC_TBLWT_PREINC: + list = newDefmap (SPO_TBLPTRL, 0xff, 0xff, 1, 1, pc, newValnum(), list); + list = newDefmap (SPO_TBLPTRH, 0xff, 0xff, 1, 1, pc, newValnum(), list); + list = newDefmap (SPO_TBLPTRU, 0xff, 0xff, 1, 1, pc, newValnum(), list); + list = newDefmap (SPO_TABLAT, 0xff, 0x00, 1, 0, pc, 0, list); + break; + + default: + /* many instruction implicitly read BSR... -- THIS IS IGNORED! */ + break; + } // switch + + /* handle explicit arguments */ + inCond = pci->inCond; + outCond = pci->outCond; + cond = inCond | outCond; + if (cond & PCC_W) { + list = newDefmap (symFromStr ("WREG"), mask, mask, inCond & PCC_W, outCond & PCC_W, pc, newValnum (), list); + } // if + + /* keep STATUS read BEFORE STATUS write in the list (still neccessary?) */ + if (inCond & PCC_STATUS) { + smask = 0; + if (inCond & PCC_C) smask |= 1U << PIC_C_BIT; + if (inCond & PCC_DC) smask |= 1U << PIC_DC_BIT; + if (inCond & PCC_Z) smask |= 1U << PIC_Z_BIT; + if (inCond & PCC_OV) smask |= 1U << PIC_OV_BIT; + if (inCond & PCC_N) smask |= 1U << PIC_N_BIT; + + list = newDefmap (symFromStr ("STATUS"), smask, 0x00, 1, 0, pc, 0, list); + //fprintf (stderr, "pc %p: def STATUS & %02x\n", pc, smask); + } // if + + if (outCond & PCC_STATUS) { + smask = 0; + if (outCond & PCC_C) smask |= 1U << PIC_C_BIT; + if (outCond & PCC_DC) smask |= 1U << PIC_DC_BIT; + if (outCond & PCC_Z) smask |= 1U << PIC_Z_BIT; + if (outCond & PCC_OV) smask |= 1U << PIC_OV_BIT; + if (outCond & PCC_N) smask |= 1U << PIC_N_BIT; + + list = newDefmap (symFromStr ("STATUS"), 0x00, smask, 0, 1, pc, newValnum (), list); + //fprintf (stderr, "pc %p: def STATUS & %02x\n", pc, smask); + } // if + + isSpecial = isSpecial2 = 0; + sym = sym2 = 0; + if (cond & PCC_REGISTER) { + name = pic16_get_op (pci->pcop, NULL, 0); + sym = symFromStr (name); + isSpecial = fixupSpecialOperands (sym, mask, mask, pc, newValnum(), &list, inCond & PCC_REGISTER, outCond & PCC_REGISTER); + //fprintf (stderr, "pc %p: def REG %s(%x) & %02x\n", pc, name, sym, mask); + } + + if (cond & PCC_REGISTER2) { + name = pic16_get_op2 (pci->pcop, NULL, 0); + sym2 = symFromStr (name); + isSpecial2 = fixupSpecialOperands (sym2, mask, mask, pc, newValnum(), &list, inCond & PCC_REGISTER2, outCond & PCC_REGISTER2); + //fprintf (stderr, "pc %p: def REG2 %s(%x) & %02x\n", pc, name, sym2, mask); + } + + + /* make sure there is at least one entry for each pc (needed by list traversal routines) */ + list = newDefmap (0, 0x00, 0x00, 0, 0, pc, 0, list); + + mergeDefmapSymbols (list); + + return list; +} + +#if 0 +static void printDefmap (defmap_t *map) { + defmap_t *curr; + + curr = map; + fprintf (stderr, "defmap @ %p:\n", curr); + while (curr) { + fprintf (stderr, "%s%s: %4x|%4x / %02x|%02x, sym %s(%x) @ pc %p\n", + curr->acc.access.isRead ? "R" : " ", + curr->acc.access.isWrite ? "W": " ", + curr->in_val, curr->val, + curr->acc.access.in_mask, curr->acc.access.mask, + strFromSym(curr->sym), curr->sym, + curr->pc); + curr = curr->next; + } // while + fprintf (stderr, "\n"); +} +#endif + +/* Add "additional" definitions to uniq. + * This can be used to merge the in_values and the flow's defmap to create an in_value-list for the flow's successors. + * This can also be used to create a uniq (out)list from a flow's defmap by passing *uniq==NULL. + * + * If symbols defined in additional are not present in uniq, a definition is created. + * Otherwise the present definition is altered to reflect the newer assignments. + * + * flow: --> assign1 --> assign2 --> assign3 --> ... --> + * before `------- noted in additional --------' after + * + * I assume that each symbol occurs AT MOST ONCE in uniq. + * + */ +static int defmapUpdateUniqueSym (defmap_t **uniq, defmap_t *additional) { + defmap_t *curr; + defmap_t *old; + int change = 0; + + //fprintf (stderr, "%s: merging %p & %p\n", __FUNCTION__, *uniq, additional); + /* find tail of additional list (holds the first assignment) */ + curr = additional; + while (curr && curr->next) curr = curr->next; + + /* update uniq */ + do { + /* find next assignment in additionals */ + while (curr && !curr->acc.access.isWrite) curr = curr->prev; + + if (!curr) break; + + /* find item in uniq */ + old = *uniq; + //printDefmap (*uniq); + while (old && (old->sym != curr->sym)) old = old->next; + + if (old) { + /* definition found -- replace */ + if (old->val != curr->val) { + old->val = curr->val; + change++; + } // if + } else { + /* new definition */ + *uniq = newDefmap (curr->sym, 0x00, 0xff, 0, 1, NULL, curr->val, *uniq); + change++; + } + + curr = curr->prev; + } while (1); + + /* return 0 iff uniq remained unchanged */ + return change; +} + +/* Creates the in_value list of a flow by (iteratively) merging the out_value + * lists of its predecessor flows. + * Initially *combined should be NULL, alt_in will be copied to combined. + * If *combined != NULL, combined will be altered: + * - for symbols defined in *combined but not in alt_in, + * *combined is altered to 0 (value unknown, either *combined or INIT). + * - for symbols defined in alt_in but not in *combined, + * a 0 definition is created (value unknown, either INIT or alt). + * - for symbols defined in both, *combined is: + * > left unchanged if *combined->val == alt_in->val or + * > modified to 0 otherwise (value unknown, either alt or *combined). + * + * I assume that each symbol occurs AT MOST ONCE in each list! + */ +static int defmapCombineFlows (defmap_t **combined, defmap_t *alt_in, pBlock *pb) { + defmap_t *curr; + defmap_t *old; + int change = 0; + valnum_t val; + + //fprintf (stderr, "%s: merging %p & %p\n", __FUNCTION__, *combined, alt_in); + + if (!(*combined)) { + return defmapUpdateUniqueSym (combined, alt_in); + } // if + + /* merge the two */ + curr = alt_in; + while (curr) { + /* find symbols definition in *combined */ + old = *combined; + while (old && (old->sym != curr->sym)) old = old->next; + + if (old) { + /* definition found */ + if (old->val && (old->val != curr->val)) { + old->val = 0; /* value unknown */ + change++; + } + } else { + /* no definition found -- can be either INIT or alt_in's value */ + val = pic16_pBlockAddInval (pb, curr->sym)->val; + *combined = newDefmap (curr->sym, 0x00, 0xff, 0, 1, NULL, (val == curr->val) ? val : 0, *combined); + if (val != curr->val) change++; + } + + curr = curr->next; + } // while (curr) + + /* update symbols from *combined that are NOT defined in alt_in -- can be either *combined's value or INIT */ + old = *combined; + while (old) { + if (old->val != 0) { + /* find definition in alt_in */ + curr = alt_in; + while (curr && curr->sym != old->sym) curr = curr->next; + if (!curr) { + /* symbol defined in *combined only -- can be either INIT or *combined */ + val = pic16_pBlockAddInval (pb, old->sym)->val; + if (old->val != val) { + old->val = 0; + change++; + } + } // if + } // if + + old = old->next; + } // while + + return change; +} + +static int defmapCompareUnique (defmap_t *map1, defmap_t *map2) { + defmap_t *curr1, *curr2; + symbol_t sym; + + /* identical maps are equal */ + if (map1 == map2) return 0; + + if (!map1) return -1; + if (!map2) return 1; + + //fprintf (stderr, "%s: comparing %p & %p\n", __FUNCTION__, map1, map2); + + /* check length */ + curr1 = map1; + curr2 = map2; + while (curr1 && curr2) { + curr1 = curr1->next; + curr2 = curr2->next; + } // while + + /* one of them longer? */ + if (curr1) return 1; + if (curr2) return -1; + + /* both lists are of equal length -- compare (in O(n^2)) */ + curr1 = map1; + while (curr1) { + sym = curr1->sym; + curr2 = map2; + while (curr2 && curr2->sym != sym) curr2 = curr2->next; + if (!curr2) return 1; // symbol not found in curr2 + if (curr2->val != curr1->val) return 1; // values differ + + /* compare next symbol */ + curr1 = curr1->next; + } // while + + /* no difference found */ + return 0; +} + + +/* Prepare a list of all reaching definitions per flow. + * This is done using a forward dataflow analysis. + */ +static void createReachingDefinitions (pBlock *pb) { + defmap_t *out_vals, *in_vals; + pCode *pc; + pCodeFlow *pcfl; + pCodeFlowLink *link; + set *todo; + set *blacklist; + + if (!pb) return; + + /* initialize out_vals to unique'fied defmaps per pCodeFlow */ + for (pc = pic16_findNextInstruction (pb->pcHead); pc; pc = pic16_findNextInstruction (pc->next)) { + if (isPCFL(pc)) { + deleteDefmapChain (&PCFL(pc)->in_vals); + deleteDefmapChain (&PCFL(pc)->out_vals); + defmapUpdateUniqueSym (&PCFL(pc)->out_vals, PCFL(pc)->defmap); + } // if + } // for + + pc = pic16_findNextInstruction (pb->pcHead); + if (!pc) { + // empty function, avoid NULL pointer dereference + return; + } // if + todo = NULL; blacklist = NULL; + addSetHead (&todo, PCI(pc)->pcflow); + + //fprintf (stderr, "%s: function %s()\n", __FUNCTION__, pic16_pBlockGetFunctionName (pb)); + while (elementsInSet (todo)) { + //fprintf (stderr, "%u items in todo-set\n", elementsInSet (todo)); + pcfl = PCFL(indexSet (todo, 0)); + deleteSetItem (&todo, pcfl); + //fprintf (stderr, "%s: checking %p\n", __FUNCTION__, pcfl); + in_vals = NULL; + out_vals = NULL; + + if (isinSet (blacklist, pcfl)) { + fprintf (stderr, "ignoring blacklisted flow\n"); + continue; + } + + /* create in_vals from predecessors out_vals */ + link = setFirstItem (pcfl->from); + while (link) { + defmapCombineFlows (&in_vals, link->pcflow->out_vals, pb); + link = setNextItem (pcfl->from); + } // while + + //printDefmap (in_vals); + //printDefmap (pcfl->in_vals); + + if (!pcfl->in_vals || !pcfl->out_vals || defmapCompareUnique (in_vals, pcfl->in_vals)) { + //fprintf (stderr, "in_vals changed\n"); + /* in_vals changed -- update out_vals */ + deleteDefmapChain (&pcfl->in_vals); + pcfl->in_vals = in_vals; + + /* create out_val from in_val and defmap */ + out_vals = NULL; + defmapUpdateUniqueSym (&out_vals, in_vals); + defmapUpdateUniqueSym (&out_vals, pcfl->defmap); + + /* is out_vals different from pcfl->out_vals */ + if (!pcfl->out_vals || defmapCompareUnique (out_vals, pcfl->out_vals)) { + //fprintf (stderr, "out_vals changed\n"); + deleteDefmapChain (&pcfl->out_vals); + pcfl->out_vals = out_vals; + + if (pcfl->out_vals == NULL && pcfl->in_vals == NULL) { + addSet (&blacklist, pcfl); + } // if + + /* reschedule all successors */ + link = setFirstItem (pcfl->to); + while (link) { + //fprintf (stderr, " %p --> %p\n", pcfl, link->pcflow); + addSetIfnotP (&todo, link->pcflow); + link = setNextItem (pcfl->to); + } // while + } else { + deleteDefmapChain (&out_vals); + }// if + } else { + deleteDefmapChain (&in_vals); + } // if + } // while +} + +#if 0 +static void showAllDefs (symbol_t sym, pCode *pc) { + defmap_t *map; + int count; + + assert (isPCI(pc)); + count = defmapFindAll (sym, pc, &map); + + fprintf (stderr, "sym %s(%x) @ %p defined as (val@pc): ", strFromSym(sym), sym, pc); + while (map) { +#if 1 + fprintf (stderr, "(%x @ %p) ", map->val, map->pc); +#else + { char buf[256]; + pic16_pCode2str (buf, 256, map->pc); + fprintf (stderr, "\n (%x @ %p(%s)) ", map->val, map->pc, buf); +#endif + map = map->next; + } + deleteDefmapChain (&map); +} +#endif + +/* safepCodeUnlink and remove pc from defmap. */ +static int pic16_safepCodeRemove (pCode *pc, char *comment) { + defmap_t *map, *next, **head; + int res, ispci; + + ispci = isPCI(pc); + map = isPCI(pc) ? PCI(pc)->pcflow->defmap : NULL; + head = isPCI(pc) ? &PCI(pc)->pcflow->defmap : NULL; + res = pic16_safepCodeUnlink (pc, comment); + + if (res && map) { + /* remove pc from defmap */ + while (map) { + next = map->next; + if (map->pc == pc) { + if (!map->prev && head) *head = map->next; + deleteDefmap (map); + } // if + map = next; + } + } + + return res; +} + +void pic16_fixDefmap (pCode *pc, pCode *newpc) { + defmap_t *map; + /* This breaks the defmap chain's references to pCodes... fix it! */ + map = PCI(pc)->pcflow->defmap; + + while (map && map->pc != pc) map = map->next; + + while (map && map->pc == pc) { + map->pc = newpc; + map = map->next; + } // while +} + +/* Replace a defmap entry for sym with newsym for read accesses (isRead == 1) or + * write accesses (isRead == 0). */ +void defmapReplaceSymRef (pCode *pc, symbol_t sym, symbol_t newsym, int isRead) { + defmap_t *map, *map_start; + defmap_t *copy; + if (!isPCI(pc)) return; + if (sym == newsym) return; + + map = PCI(pc)->pcflow->defmap; + + while (map && map->pc != pc) map = map->next; + map_start = map; + while (map && map->pc == pc) { + if (map->sym == sym) { + assert ((isRead && map->acc.access.isRead) || ((!isRead) && (map->acc.access.isWrite))); + if (!(map->acc.access.isRead && map->acc.access.isWrite)) { + /* only one kind of access handled... this is easy */ + map->sym = newsym; + } else { + /* must copy defmap entry before replacing symbol... */ + copy = copyDefmap (map); + if (isRead) { + map->acc.access.isRead = 0; + copy->acc.access.isWrite = 0; + } else { + map->acc.access.isWrite = 0; + copy->acc.access.isRead = 0; + } + copy->sym = newsym; + /* insert copy into defmap chain */ + defmapInsertAfter (map, copy); + } + } + map = map->next; + } // while + + /* as this might introduce multiple defmap entries for newsym... */ + mergeDefmapSymbols (map_start); +} + +/* Assign "better" valnums to results. */ +static void assignValnums (pCode *pc) { + pCodeInstruction *pci; + pCode *newpc; + symbol_t sym1, sym2; + int cond, isSpecial1, isSpecial2, count, mask, lit; + defmap_t *list, *val, *oldval, *dummy; + regs *reg1 = NULL, *reg2 = NULL; + valnum_t litnum; + + /* only works for pCodeInstructions... */ + if (!isPCI(pc)) return; + + pci = PCI(pc); + cond = pci->inCond | pci->outCond; + list = pci->pcflow->defmap; + sym1 = sym2 = isSpecial1 = isSpecial2 = 0; + + if (cond & PCC_REGISTER) { + sym1 = symFromStr (pic16_get_op (pci->pcop, NULL, 0)); + reg1 = pic16_getRegFromInstruction (pc); + isSpecial1 = pic16_symIsSpecial (sym1); + } + if (cond & PCC_REGISTER2) { + sym2 = symFromStr (pic16_get_op2 (pci->pcop, NULL, 0)); + reg2 = pic16_getRegFromInstruction (pc); + isSpecial2 = pic16_symIsSpecial (sym2); + } + + /* determine input values */ + val = list; + while (val && val->pc != pc) val = val->next; + //list = val; /* might save some time later... */ + while (val && val->pc == pc) { + val->in_val = 0; + if (val->sym != 0 && (1 || val->acc.access.isRead)) { + /* get valnum for sym */ + count = defmapFindAll (val->sym, pc, &oldval); + //fprintf (stderr, "%d defs for sym %s\n", count, strFromSym (val->sym)); + if (count == 1) { + if ((val->acc.access.in_mask & oldval->acc.access.mask) == val->acc.access.in_mask) { + val->in_val = oldval->val; + } else { + val->in_val = 0; + } + } else if (count == 0) { + /* no definition found */ + val->in_val = 0; + } else { + /* multiple definition(s) found -- value not known (unless always the same valnum) */ + assert (oldval); + dummy = oldval->next; + mask = oldval->acc.access.mask; + val->in_val = oldval->val; + while (dummy && (dummy->val == val->in_val)) { + mask &= dummy->acc.access.mask; + dummy = dummy->next; + } // while + + /* found other values or to restictive mask */ + if (dummy || ((mask & val->acc.access.in_mask) != val->acc.access.in_mask)) { + val->in_val = 0; + } + } + if (count > 0) deleteDefmapChain (&oldval); + } // if + val = val->next; + } + + /* handle valnum assignment */ + switch (pci->op) { + case POC_CLRF: /* modifies STATUS (Z) */ + if (!isSpecial1 && pic16_regIsLocal (reg1)) { + oldval = defmapCurr (list, sym1, pc); + if (oldval && (litFromValnum (oldval->in_val) == 0)) { + //fprintf (stderr, "%s: REG (%s) already set up correctly (%x)\n", pci->mnemonic, strFromSym(sym1), oldval->in_val); + if (!pic16_isAlive (SPO_STATUS, pc)) pic16_safepCodeRemove (pc, "=DF= redundant CLRF removed"); + } + defmapUpdate (list, sym1, pc, valnumFromLit(0)); + } + break; + + case POC_SETF: /* SETF does not touch STATUS */ + if (!isSpecial1 && pic16_regIsLocal (reg1)) { + oldval = defmapCurr (list, sym1, pc); + if (oldval && (litFromValnum (oldval->in_val) == 0x00FF)) { + //fprintf (stderr, "%s: REG (%s) already set up correctly (%x)\n", pci->mnemonic, strFromSym(sym1), oldval->in_val); + pic16_safepCodeRemove (pc, "=DF= redundant SETF removed"); + } + defmapUpdate (list, sym1, pc, valnumFromLit (0x00FF)); + } + break; + + case POC_MOVLW: /* does not touch STATUS */ + oldval = defmapCurr (list, SPO_WREG, pc); + if (pci->pcop->type == PO_LITERAL) { + //fprintf (stderr, "MOVLW: literal %u\n", PCOL(pci->pcop)->lit); + litnum = valnumFromLit ((unsigned char)PCOL(pci->pcop)->lit); + } else { + //fprintf (stderr, "MOVLW: %s\n", pic16_get_op (pci->pcop, NULL, 0)); + litnum = valnumFromStr (pic16_get_op (pci->pcop, NULL, 0)); + } + if (oldval && oldval->in_val == litnum) { + //fprintf (stderr, "%s: W already set up correctly (%x)\n", PCI(pc)->mnemonic, oldval->in_val); + pic16_safepCodeRemove (pc, "=DF= redundant MOVLW removed"); + } + defmapUpdate (list, SPO_WREG, pc, litnum); + break; + + case POC_ANDLW: /* modifies STATUS (Z,N) */ + case POC_IORLW: /* modifies STATUS (Z,N) */ + case POC_XORLW: /* modifies STATUS (Z,N) */ + /* can be optimized iff WREG contains a known literal (0x100 - 0x1FF) */ + if (pci->pcop->type == PO_LITERAL) { + int vallit = -1; + lit = (unsigned char) PCOL(pci->pcop)->lit; + val = defmapCurr (list, SPO_WREG, pc); + if (val) vallit = litFromValnum (val->in_val); + if (vallit != -1) { + /* xxxLW , WREG contains a known literal */ + //fprintf (stderr, "%s 0x%02x, WREG: 0x%x\n", pci->mnemonic, lit, vallit); + if (pci->op == POC_ANDLW) { + lit &= vallit; + } else if (pci->op == POC_IORLW) { + lit |= vallit; + } else if (pci->op == POC_XORLW) { + lit ^= vallit; + } else { + assert (0 && "invalid operation"); + } + if (vallit == lit) { + //fprintf (stderr, "%s: W already set up correctly (%x = val %x)\n", pci->mnemonic, vallit, val->in_val); + if (!pic16_isAlive (SPO_STATUS, pc)) pic16_safepCodeRemove (pc, "=DF= redundant ANDLW/IORLW/XORLW removed"); + } + defmapUpdate (list, SPO_WREG, pc, valnumFromLit (lit)); + } // if + } + break; + + case POC_LFSR: + { + /* check if old value matches new value */ + int lit; + int ok = 1; + assert (pci->pcop->type == PO_LITERAL); + + lit = PCOL(pci->pcop)->lit; + + val = defmapCurr (list, pic16_fsrsym_idx[lit][0], pc); + + if (val && (val->in_val != 0) && (val->in_val == val->val)) { + //fprintf (stderr, "FSR%dL already set up correctly at %p (%x)\n", lit, pc, val->val); + } else { + /* cannot remove this LFSR */ + ok = 0; + } // if + + val = defmapCurr (list, pic16_fsrsym_idx[lit][1], pc); + if (val && (val->in_val != 0) && (val->in_val == val->val)) { + //fprintf (stderr, "FSR%dH already set up correctly at %p (%x)\n", lit, pc, val->val); + } else { + ok = 0; + } // if + + if (ok) { + pic16_safepCodeRemove (pc, "=DF= redundant LFSR removed"); + } + } + break; + + case POC_MOVWF: /* does not touch flags */ + /* find value of WREG */ + val = defmapCurr (list, SPO_WREG, pc); + oldval = defmapCurr (list, sym1, pc); + if (val) lit = litFromValnum (val->in_val); + else lit = -1; + //fprintf (stderr, "MOVWF: lit: %i (%x, %x)\n", lit, lit, val->in_val); + + if ((lit == 0 || lit == 0x0ff) && !pic16_isAlive (SPO_STATUS, pc)) { + /* might replace with CLRF/SETF (will possibly make previous MOVLW 0x00/0xff unneccessary --> dead code elimination) */ + //fprintf (stderr, "replacing MOVWF with CLRF/SETF\n"); + if (lit == 0) { + newpc = pic16_newpCode (POC_CLRF, pic16_pCodeOpCopy (pci->pcop)); + } else { + assert (lit == 0x0ff); + newpc = pic16_newpCode (POC_SETF, pic16_pCodeOpCopy (pci->pcop)); + } + if (pic16_debug_verbose || pic16_pcode_verbose) pic16_InsertCommentAfter (pc->prev, "=DF= MOVWF: replaced by CLRF/SETF"); + pic16_pCodeReplace (pc, newpc); + defmapReplaceSymRef (pc, SPO_WREG, 0, 1); + pic16_fixDefmap (pc, newpc); + pc = newpc; + + /* This breaks the defmap chain's references to pCodes... fix it! */ + if (!val->prev) PCI(pc)->pcflow->defmap = val->next; + if (!val->acc.access.isWrite) { + deleteDefmap (val); // delete reference to WREG as in value + val = NULL; + } else { + val->acc.access.isRead = 0; // delete reference to WREG as in value + } + oldval = PCI(pc)->pcflow->defmap; + while (oldval) { + if (oldval->pc == pc) oldval->pc = newpc; + oldval = oldval->next; + } // while + } else if (!isSpecial1 && pic16_regIsLocal (reg1) && val && oldval && (val->in_val != 0) && (val->in_val == oldval->in_val)) { + //fprintf (stderr, "MOVWF: F (%s) already set up correctly (%x) at %p\n", strFromSym (sym1), oldval->in_val, pc); + pic16_safepCodeRemove (pc, "=DF= redundant MOVWF removed"); + } + if (val) defmapUpdate (list, sym1, pc, val->in_val); + break; + + case POC_MOVFW: /* modifies STATUS (Z,N) */ + /* find value of REG */ + if (!isSpecial1 && pic16_regIsLocal (reg1)) { + val = defmapCurr (list, sym1, pc); + oldval = defmapCurr (list, SPO_WREG, pc); + if (val && oldval && (val->in_val != 0) && (val->in_val == oldval->in_val)) { + //fprintf (stderr, "MOVFW: W already set up correctly (%x) at %p\n", oldval->in_val, pc); + if (!pic16_isAlive (SPO_STATUS, pc)) pic16_safepCodeRemove (pc, "=DF= redundant MOVFW removed"); + } else { + defmap_t *pred, *predpred; + /* Optimize MOVLW immd; MOVWF reg1; [...]; MOVFW reg1 + * into MOVLW immd; MOVWF reg1; [...]; MOVLW immd + * This might allow removal of the first two assignments. */ + pred = defmapFindDef (list, sym1, pc); + predpred = pred ? defmapFindDef (list, SPO_WREG, pred->pc) : NULL; + if (pred && predpred && (PCI(pred->pc)->op == POC_MOVWF) && (PCI(predpred->pc)->op == POC_MOVLW) + && !pic16_isAlive (SPO_STATUS, pc)) + { + newpc = pic16_newpCode (POC_MOVLW, pic16_pCodeOpCopy (PCI(predpred->pc)->pcop)); + + if (pic16_debug_verbose || pic16_pcode_verbose) { + pic16_InsertCommentAfter (pc->prev, "=DF= MOVFW: replaced last of MOVLW;MOVWF;MOVFW by MOVLW"); + } // if + pic16_pCodeReplace (pc, newpc); + defmapReplaceSymRef (pc, sym1, 0, 1); + pic16_fixDefmap (pc, newpc); + pc = newpc; + + /* This breaks the defmap chain's references to pCodes... fix it! */ + if (!val->prev) PCI(pc)->pcflow->defmap = val->next; + if (!val->acc.access.isWrite) { + deleteDefmap (val); // delete reference to reg1 as in value + val = NULL; + } else { + val->acc.access.isRead = 0; // delete reference to reg1 as in value + } + oldval = PCI(pc)->pcflow->defmap; + while (oldval) { + if (oldval->pc == pc) oldval->pc = newpc; + oldval = oldval->next; + } // while + } // if + } + if (val) defmapUpdate (list, SPO_WREG, pc, val->in_val); + } + break; + + case POC_MOVFF: /* does not touch STATUS */ + /* find value of REG */ + val = defmapCurr (list, sym1, pc); + oldval = defmapCurr (list, sym2, pc); + if (val) lit = litFromValnum (val->in_val); + else lit = -1; + newpc = NULL; + if (!isSpecial1 && pic16_regIsLocal (reg1) && val && oldval && !pic16_isAlive (SPO_STATUS, pc)) { + //pc->print (stderr, pc); fprintf (stderr, "lit: %d (%x, %x)\n", lit, lit, val->in_val); + if (lit == 0) { + newpc = pic16_newpCode (POC_CLRF, PCOP2(pci->pcop)->pcopR); + } else if (lit == 0x00ff) { + newpc = pic16_newpCode (POC_SETF, PCOP2(pci->pcop)->pcopR); + } else { + newpc = NULL; + } + if (newpc) { + pic16_InsertCommentAfter (pc->prev, "=DF= MOVFF: replaced by CRLF/SETF"); + pic16_df_saved_bytes += PCI(pc)->isize - PCI(newpc)->isize; + pic16_pCodeReplace (pc, newpc); + defmapReplaceSymRef (pc, sym1, 0, 1); + pic16_fixDefmap (pc, newpc); + pc = newpc; + break; // do not process instruction as MOVFF... + } + } else if (!isSpecial1 && !isSpecial2 + && pic16_regIsLocal (reg1) && pic16_regIsLocal (reg2) + && val && oldval && (val->in_val != 0)) { + if (val->in_val == oldval->in_val) { + //fprintf (stderr, "MOVFF: F2 (%s) already set up correctly (%x) at %p\n", strFromSym (sym2), oldval->in_val, pc); + pic16_safepCodeRemove (pc, "=DF= redundant MOVFF removed"); + } else { + if (!pic16_isAlive (sym1, pc)) { + defmap_t *copy = NULL; + /* If there is another symbol S storing sym1's value we should assign from S thus shortening the liferange of sym1. + * This should help eliminate + * MOVFF A,B + * + * MOVFF B,C + * + * and turn it into + * + * MOVFF A,C + */ + + /* scan defmap for symbols storing sym1's value */ + while (oldval && (oldval->pc == pc || oldval->in_val != val->in_val)) oldval = oldval->next; + if (oldval && (oldval->sym != sym1) && defmapFindAll (oldval->sym, pc, ©) == 1) { + /* unique reaching definition for sym found */ + if (copy->val && copy->val == val->in_val) { + //fprintf (stderr, "found replacement symbol for %s (val %x) <-- %s (assigned %x @ %p)\n", strFromSym(sym1), val->in_val, strFromSym(copy->sym), copy->val, copy->pc); + if (copy->sym == SPO_WREG) { + newpc = pic16_newpCode (POC_MOVWF, pic16_pCodeOpCopy (PCOP2(pci->pcop)->pcopR)); + } else { + pCodeOp *pcop = NULL; + /* the code below fails if we try to replace + * MOVFF PRODL, r0x03 + * MOVFF r0x03, PCLATU + * with + * MOVFF PRODL, PCLATU + * as copy(PRODL) contains has pc==NULL, by name fails... + */ + if (!copy->pc || !PCI(copy->pc)->pcop) break; + + if (copy->pc && PCI(copy->pc)->pcop) + pcop = PCI(copy->pc)->pcop; +#if 0 + /* This code is broken--see above. */ + else + { + const char *symname = strFromSym(copy->sym); + + assert( symname ); + pic16_InsertCommentAfter (pc->prev, "BUG-ME"); + pic16_InsertCommentAfter (pc->prev, "=DF= MOVFF: newpCodeOpregFromStr(%s)", (char *)symname); + //pcop = pic16_newpCodeOpRegFromStr((char *)symname); + } +#endif + assert( pcop ); + newpc = pic16_newpCode(POC_MOVFF, pic16_popGet2p( + pcop, + pic16_pCodeOpCopy (PCOP2(pci->pcop)->pcopR))); + } + pic16_InsertCommentAfter (pc->prev, "=DF= MOVFF: SRC op %s replaced by %s", strFromSym(sym1), strFromSym(copy->sym)); + pic16_df_saved_bytes += PCI(pc)->isize - PCI(newpc)->isize; + pic16_pCodeReplace (pc, newpc); + assert (val->sym == sym1 && val->acc.access.isRead && !val->acc.access.isWrite); + defmapReplaceSymRef (pc, sym1, copy->sym, 1); + pic16_fixDefmap (pc, newpc); + pc = newpc; + } + } + deleteDefmapChain (©); + } + } + if (val) defmapUpdate (list, sym2, pc, val->in_val); + } + break; + + default: + /* cannot optimize */ + break; + } // switch +} + +static void pic16_destructDF (pBlock *pb) { + pCode *pc, *next; + + if (!pb) return; + + /* remove old defmaps */ + pc = pic16_findNextInstruction (pb->pcHead); + while (pc) { + next = pic16_findNextInstruction (pc->next); + + assert (isPCI(pc) || isPCAD(pc)); + assert (PCI(pc)->pcflow); + deleteDefmapChain (&PCI(pc)->pcflow->defmap); + deleteDefmapChain (&PCI(pc)->pcflow->in_vals); + deleteDefmapChain (&PCI(pc)->pcflow->out_vals); + + pc = next; + } // while + + if (defmap_free || defmap_free_count) { + //fprintf (stderr, "released defmaps: %u -- freeing up memory\n", defmap_free_count); + freeDefmap (&defmap_free); + defmap_free_count = 0; + } +} + +/* Checks whether a pBlock contains ASMDIRs. */ +static int pic16_pBlockHasAsmdirs (pBlock *pb) { + pCode *pc; + + if (!pb) return 0; + + pc = pic16_findNextInstruction (pb->pcHead); + while (pc) { + if (isPCAD(pc)) return 1; + + pc = pic16_findNextInstruction (pc->next); + } // while + + /* no PCADs found */ + return 0; +} + +#if 1 +/* Remove MOVFF r0x??, POSTDEC1 and MOVFF PREINC1, r0x?? for otherwise unused registers. */ +static int pic16_removeUnusedRegistersDF () { + pCode *pc, *pc2; + pBlock *pb; + regs *reg1, *reg2, *reg3; + set *seenRegs = NULL; + int cond, i; + int islocal, change = 0; + + /* no pBlocks? */ + if (!the_pFile || !the_pFile->pbHead) return 0; + + for (pb = the_pFile->pbHead; pb; pb = pb->next) { + //fprintf (stderr, "%s: examining function %s\n", __FUNCTION__, pic16_pBlockGetFunctionName (pb)); +#if 1 + /* find set of using pCodes per register */ + for (pc = pic16_findNextInstruction (pb->pcHead); pc; + pc = pic16_findNextInstruction(pc->next)) { + + cond = PCI(pc)->inCond | PCI(pc)->outCond; + reg1 = reg2 = NULL; + if (cond & PCC_REGISTER) reg1 = pic16_getRegFromInstruction (pc); + if (cond & PCC_REGISTER2) reg2 = pic16_getRegFromInstruction2 (pc); + + if (reg1) { + if (!isinSet (seenRegs, reg1)) reg1->reglives.usedpCodes = NULL; + addSetIfnotP (&seenRegs, reg1); + addSetIfnotP (®1->reglives.usedpCodes, pc); + } + if (reg2) { + if (!isinSet (seenRegs, reg2)) reg2->reglives.usedpCodes = NULL; + addSetIfnotP (&seenRegs, reg2); + addSetIfnotP (®2->reglives.usedpCodes, pc); + } + } // for pc +#endif + for (reg1 = setFirstItem (seenRegs); reg1; reg1 = setNextItem (seenRegs)) { + /* may not use pic16_regIsLocal() here -- in interrupt routines + * WREG, PRODx, FSR0x must be saved */ + islocal = (reg1->isLocal || reg1->rIdx == pic16_framepnt_lo->rIdx || reg1->rIdx == pic16_framepnt_hi->rIdx); + if (islocal && elementsInSet (reg1->reglives.usedpCodes) == 2) { + pc = pc2 = NULL; + for (i=0; i < 2; i++) { + pc = (pCode *) indexSet(reg1->reglives.usedpCodes, i); + if (!pc2) pc2 = pc; + if (!isPCI(pc) || !PCI(pc)->op == POC_MOVFF) continue; + reg2 = pic16_getRegFromInstruction (pc); + reg3 = pic16_getRegFromInstruction2 (pc); + if (!reg2 || !reg3 + || (reg2->rIdx != pic16_stack_preinc->rIdx + && reg3->rIdx != pic16_stack_postdec->rIdx)) break; + if (i == 1) { + /* both pCodes are MOVFF R,POSTDEC1 / MOVFF PREINC1,R */ + //fprintf (stderr, "%s: removing local register %s from %s\n", __FUNCTION__, reg1->name, pic16_pBlockGetFunctionName (pb)); + pic16_safepCodeRemove (pc, "removed unused local reg IN"); + pic16_safepCodeRemove (pc2, "removed unused local reg OUT"); + } + } // for + } // if + deleteSet (®1->reglives.usedpCodes); + } // for reg1 + + deleteSet (&seenRegs); + } // for pb + + return change; +} +#endif + +/* Set up pCodeFlow's defmap_ts. + * Needs correctly set up to/from fields. */ +static void pic16_createDF (pBlock *pb) { + pCode *pc, *next; + int change=0; + + if (!pb) return; + + //fprintf (stderr, "creating DF for pb %p (%s)\n", pb, pic16_pBlockGetFunctionName (pb)); + + pic16_destructDF (pb); + + /* check pBlock: do not analyze pBlocks with ASMDIRs (for now...) */ + if (pic16_pBlockHasAsmdirs (pb)) { + //fprintf (stderr, "%s: pBlock contains ASMDIRs -- data flow analysis not performed!\n", __FUNCTION__); + return; + } + + /* integrity check -- we need to reach all flows to guarantee + * correct data flow analysis (reaching definitions, aliveness) */ +#if 0 + if (!verifyAllFlowsReachable (pb)) { + fprintf (stderr, "not all flows reachable -- aborting dataflow analysis for %s!\n", pic16_pBlockGetFunctionName (pb)); + return; + } +#endif + + /* establish new defmaps */ + pc = pic16_findNextInstruction (pb->pcHead); + while (pc) { + next = pic16_findNextInstruction (pc->next); + + assert (PCI(pc)->pcflow); + PCI(pc)->pcflow->defmap = createDefmap (pc, PCI(pc)->pcflow->defmap); + + pc = next; + } // while + + //fprintf (stderr, "%s: creating reaching definitions...\n", __FUNCTION__); + createReachingDefinitions (pb); + +#if 1 + /* assign better valnums */ + //fprintf (stderr, "assigning valnums for pb %p\n", pb); + pc = pic16_findNextInstruction (pb->pcHead); + while (pc) { + next = pic16_findNextInstruction (pc->next); + + assert (PCI(pc)->pcflow); + assignValnums (pc); + + pc = next; + } // while +#endif + +#if 1 + /* remove dead pCodes */ + //fprintf (stderr, "removing dead pCodes in %p (%s)\n", pb, pic16_pBlockGetFunctionName (pb)); + do { + change = 0; + pc = pic16_findNextInstruction (pb->pcHead); + while (pc) { + next = pic16_findNextInstruction (pc->next); + + if (isPCI(pc) && !isPCI_BRANCH(pc) && !pic16_pCodeIsAlive (pc)) { + change += pic16_safepCodeRemove (pc, "=DF= removed dead pCode"); + } + + pc = next; + } // while + } while (change); +#endif +} + +/* ======================================================================== */ +/* === VCG DUMPER ROUTINES ================================================ */ +/* ======================================================================== */ +#if defined (DUMP_DF_GRAPHS) && DUMP_DF_GRAPHS > 0 +hTab *dumpedNodes = NULL; + +/** Dump VCG header into of. */ +static void pic16_vcg_init (FILE *of) { + /* graph defaults */ + fprintf (of, "graph:{\n"); + fprintf (of, "title:\"graph1\"\n"); + fprintf (of, "label:\"graph1\"\n"); + fprintf (of, "color:white\n"); + fprintf (of, "textcolor:black\n"); + fprintf (of, "bordercolor:black\n"); + fprintf (of, "borderwidth:1\n"); + fprintf (of, "textmode:center\n"); + + fprintf (of, "layoutalgorithm:dfs\n"); + fprintf (of, "late_edge_labels:yes\n"); + fprintf (of, "display_edge_labels:yes\n"); + fprintf (of, "dirty_edge_labels:yes\n"); + fprintf (of, "finetuning:yes\n"); + fprintf (of, "ignoresingles:no\n"); + fprintf (of, "straight_phase:yes\n"); + fprintf (of, "priority_phase:yes\n"); + fprintf (of, "manhattan_edges:yes\n"); + fprintf (of, "smanhattan_edges:no\n"); + fprintf (of, "nearedges:no\n"); + fprintf (of, "node_alignment:center\n"); // bottom|top|center + fprintf (of, "port_sharing:no\n"); + fprintf (of, "arrowmode:free\n"); // fixed|free + fprintf (of, "crossingphase2:yes\n"); + fprintf (of, "crossingoptimization:yes\n"); + fprintf (of, "edges:yes\n"); + fprintf (of, "nodes:yes\n"); + fprintf (of, "splines:no\n"); + + /* node defaults */ + fprintf (of, "node.color:lightyellow\n"); + fprintf (of, "node.textcolor:black\n"); + fprintf (of, "node.textmode:center\n"); + fprintf (of, "node.shape:box\n"); + fprintf (of, "node.bordercolor:black\n"); + fprintf (of, "node.borderwidth:1\n"); + + /* edge defaults */ + fprintf (of, "edge.textcolor:black\n"); + fprintf (of, "edge.color:black\n"); + fprintf (of, "edge.thickness:1\n"); + fprintf (of, "edge.arrowcolor:black\n"); + fprintf (of, "edge.backarrowcolor:black\n"); + fprintf (of, "edge.arrowsize:15\n"); + fprintf (of, "edge.backarrowsize:15\n"); + fprintf (of, "edge.arrowstyle:line\n"); // none|solid|line + fprintf (of, "edge.backarrowstyle:none\n"); // none|solid|line + fprintf (of, "edge.linestyle:continuous\n"); // continuous|solid|dotted|dashed|invisible + + fprintf (of, "\n"); + + /* prepare data structures */ + if (dumpedNodes) { + hTabDeleteAll (dumpedNodes); + dumpedNodes = NULL; + } + dumpedNodes = newHashTable (128); +} + +/** Dump VCG footer into of. */ +static void pic16_vcg_close (FILE *of) { + fprintf (of, "}\n"); +} + +#define BUF_SIZE 128 +#define pcTitle(pc) (SNPRINTF (buf, BUF_SIZE, "n_%p, %p/%u", PCODE(pc), isPCI(pc) ? PCI(pc)->pcflow : NULL, PCODE(pc)->seq), &buf[0]) + +#if 0 +static int ptrcmp (const void *p1, const void *p2) { + return p1 == p2; +} +#endif + +/** Dump a pCode node as VCG to of. */ +static void pic16_vcg_dumpnode (pCode *pc, FILE *of) { + char buf[BUF_SIZE]; + + if (hTabFindByKey (dumpedNodes, (((char *) pc - (char *) 0)>>2) % 128, pc, ptrcmp)) { + // dumped already + return; + } + hTabAddItemLong (&dumpedNodes, (((char *) pc - (char *) 0)>>2) % 128, pc, pc); + //fprintf (stderr, "dumping %p\n", pc); + + /* only dump pCodeInstructions and Flow nodes */ + if (!isPCI(pc) && !isPCAD(pc) && !isPCFL(pc)) return; + + /* emit node */ + fprintf (of, "node:{"); + fprintf (of, "title:\"%s\" ", pcTitle(pc)); + fprintf (of, "label:\"%s\n", pcTitle(pc)); + if (isPCFL(pc)) { + fprintf (of, ""); + } else if (isPCI(pc) || isPCAD(pc)) { + pc->print (of, pc); + } else { + fprintf (of, ""); + } + fprintf (of, "\" "); + fprintf (of, "}\n"); + + if (1 && isPCFL(pc)) { + defmap_t *map, *prev; + unsigned int i; + map = PCFL(pc)->defmap; + i=0; + while (map) { + if (map->sym != 0) { + i++; + + /* emit definition node */ + fprintf (of, "node:{title:\"%s_def%u\" ", pcTitle(pc), i); + fprintf (of, "label:\""); + + prev = map; + do { + fprintf (of, "%s%c%c: val %4x|%4x & %02x|%02x, sym %s", (prev == map) ? "" : "\n", map->acc.access.isRead ? 'R' : ' ', map->acc.access.isWrite ? 'W' : ' ', map->in_val, map->val, map->acc.access.in_mask, map->acc.access.mask, strFromSym (map->sym)); + prev = map; + map = map->next; + } while (map && prev->pc == map->pc); + map = prev; + + fprintf (of, "\" "); + + fprintf (of, "color:green "); + fprintf (of, "}\n"); + + /* emit edge to previous definition */ + fprintf (of, "edge:{sourcename:\"%s_def%u\" ", pcTitle(pc), i); + if (i == 1) { + fprintf (of, "targetname:\"%s\" ", pcTitle(pc)); + } else { + fprintf (of, "targetname:\"%s_def%u\" ", pcTitle(pc), i-1); + } + fprintf (of, "color:green "); + fprintf (of, "}\n"); + + if (map->pc) { + pic16_vcg_dumpnode (map->pc, of); + fprintf (of, "edge:{sourcename:\"%s_def%u\" ", pcTitle(pc), i); + fprintf (of, "targetname:\"%s\" linestyle:dashed color:lightgreen}\n", pcTitle(map->pc)); + } + } + map = map->next; + } // while + } + + /* emit additional nodes (e.g. operands) */ +} + +/** Dump a pCode's edges (control flow/data flow) as VCG to of. */ +static void pic16_vcg_dumpedges (pCode *pc, FILE *of) { + char buf[BUF_SIZE]; + pCodeInstruction *pci; + pBranch *curr; + int i; + + if (1 && isPCFL(pc)) { + /* emit edges to flow successors */ + void *pcfl; + //fprintf (stderr, "PCFLOWe @ %p\n", pc); + pcfl = setFirstItem (PCFL(pc)->to); + while (pcfl) { + pcfl = ((pCodeFlowLink *) (pcfl))->pcflow; + pic16_vcg_dumpnode (pc, of); + pic16_vcg_dumpnode ((pCode *) pcfl, of); + fprintf (of, "edge:{sourcename:\"%s\" ", pcTitle(pc)); + fprintf (of, "targetname:\"%s\" color:lightred linestyle:dashed}\n", pcTitle(pcfl)); + pcfl = setNextItem (PCFL(pc)->to); + } // while + } // if + + if (!isPCI(pc) && !isPCAD(pc)) return; + + pci = PCI(pc); + + /* emit control flow edges (forward only) */ + curr = pci->to; + i=0; + while (curr) { + pic16_vcg_dumpnode (curr->pc, of); + fprintf (of, "edge:{"); + fprintf (of, "sourcename:\"%s\" ", pcTitle(pc)); + fprintf (of, "targetname:\"%s\" ", pcTitle(curr->pc)); + fprintf (of, "color:red "); + fprintf (of, "}\n"); + curr = curr->next; + } // while + +#if 1 + /* dump "flow" edge (link pCode according to pBlock order) */ + { + pCode *pcnext; + pcnext = pic16_findNextInstruction (pc->next); + if (pcnext) { + pic16_vcg_dumpnode (pcnext, of); + fprintf (of, "edge:{sourcename:\"%s\" ", pcTitle(pc)); + fprintf (of, "targetname:\"%s\" color:red linestyle:solid}\n", pcTitle(pcnext)); + } + } +#endif + +#if 0 + /* emit flow */ + if (pci->pcflow) { + pic16_vcg_dumpnode (&pci->pcflow->pc, of); + fprintf (of, "edge:{sourcename:\"%s\" ", pcTitle(pc)); + fprintf (of, "targetname:\"%s\" color:lightblue linestyle:dashed}\n", pcTitle (pci->pcflow)); + } +#endif + + /* emit data flow edges (backward only) */ + /* TODO: gather data flow information... */ +} + +static void pic16_vcg_dump (FILE *of, pBlock *pb) { + pCode *pc; + + if (!pb) return; + + /* check pBlock: do not analyze pBlocks with ASMDIRs (for now...) */ + if (pic16_pBlockHasAsmdirs (pb)) { + //fprintf (stderr, "%s: pBlock contains ASMDIRs -- data flow analysis not performed!\n", __FUNCTION__); + return; + } + + for (pc=pb->pcHead; pc; pc = pc->next) { + pic16_vcg_dumpnode (pc, of); + } // for pc + + for (pc=pb->pcHead; pc; pc = pc->next) { + pic16_vcg_dumpedges (pc, of); + } // for pc +} + +static void pic16_vcg_dump_default (pBlock *pb) { + FILE *of; + char buf[BUF_SIZE]; + pCode *pc; + + if (!pb) return; + + /* get function name */ + pc = pb->pcHead; + while (pc && !isPCF(pc)) pc = pc->next; + if (pc) { + SNPRINTF (buf, BUF_SIZE, "%s_%s.vcg", PCF(pc)->modname, PCF(pc)->fname); + } else { + SNPRINTF (buf, BUF_SIZE, "pb_%p.vcg", pb); + } + + //fprintf (stderr, "now dumping %s\n", buf); + of = fopen (buf, "w"); + pic16_vcg_init (of); + pic16_vcg_dump (of, pb); + pic16_vcg_close (of); + fclose (of); +} +#endif + +/*** END of helpers for pCode dataflow optimizations ***/ diff --git a/src/pic16/pcode.h b/src/pic16/pcode.h new file mode 100644 index 0000000..3d554f2 --- /dev/null +++ b/src/pic16/pcode.h @@ -0,0 +1,1148 @@ +/*------------------------------------------------------------------------- + + pcode.h - post code generation + Written By - Scott Dattalo scott@dattalo.com + Ported to PIC16 By - Martin Dubuc m.dubuc@rogers.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +-------------------------------------------------------------------------*/ + +//#include "ralloc.h" +struct regs; + +/* + Post code generation + + The post code generation is an assembler optimizer. The assembly code + produced by all of the previous steps is fully functional. This step + will attempt to analyze the flow of the assembly code and agressively + optimize it. The peep hole optimizer attempts to do the same thing. + As you may recall, the peep hole optimizer replaces blocks of assembly + with more optimal blocks (e.g. removing redundant register loads). + However, the peep hole optimizer has to be somewhat conservative since + an assembly program has implicit state information that's unavailable + when only a few instructions are examined. + Consider this example: + + example1: + movwf t1 + movf t1,w + + The movf seems redundant since we know that the W register already + contains the same value of t1. So a peep hole optimizer is tempted to + remove the "movf". However, this is dangerous since the movf affects + the flags in the status register (specifically the Z flag) and subsequent + code may depend upon this. Look at these two examples: + + example2: + movwf t1 + movf t1,w ; Can't remove this movf + skpz + return + + example3: + movwf t1 + movf t1,w ; This movf can be removed + xorwf t2,w ; since xorwf will over write Z + skpz + return + +*/ + + +#ifndef __PCODE_H__ +#define __PCODE_H__ + +/*********************************************************************** + * debug stuff + * + * The DFPRINTF macro will call fprintf if PCODE_DEBUG is defined. + * The macro is used like: + * + * DPRINTF(("%s #%d\n","test", 1)); + * + * The double parenthesis (()) are necessary + * + ***********************************************************************/ +//#define PCODE_DEBUG + +#ifdef PCODE_DEBUG +#define DFPRINTF(args) (fprintf args) +#else +#define DFPRINTF(args) ; +#endif + + +#ifdef WORDS_BIGENDIAN + #define _ENDIAN(x) (3-x) +#else + #define _ENDIAN(x) (x) +#endif + + +#define BYTE_IN_LONG(x,b) ((x>>(8*_ENDIAN(b)))&0xff) + + +/*********************************************************************** + * Extended Instruction Set/Indexed Literal Offset Mode * + * Set this macro to enable code generation with the extended * + * instruction set and the new Indexed Literal Offset Mode * + ***********************************************************************/ +#define XINST 1 + +/*********************************************************************** + * PIC status bits - this will move into device dependent headers + ***********************************************************************/ +#define PIC_C_BIT 0 +#define PIC_DC_BIT 1 +#define PIC_Z_BIT 2 +#define PIC_OV_BIT 3 +#define PIC_N_BIT 4 +#define PIC_IRP_BIT 7 /* Indirect register page select */ + +/*********************************************************************** + * PIC INTCON bits - this will move into device dependent headers + ***********************************************************************/ +#define PIC_RBIF_BIT 0 /* Port B level has changed flag */ +#define PIC_INTF_BIT 1 /* Port B bit 0 interrupt on edge flag */ +#define PIC_T0IF_BIT 2 /* TMR0 has overflowed flag */ +#define PIC_RBIE_BIT 3 /* Port B level has changed - Interrupt Enable */ +#define PIC_INTE_BIT 4 /* Port B bit 0 interrupt on edge - Int Enable */ +#define PIC_T0IE_BIT 5 /* TMR0 overflow Interrupt Enable */ +#define PIC_PIE_BIT 6 /* Peripheral Interrupt Enable */ +#define PIC_GIE_BIT 7 /* Global Interrupt Enable */ + +/*********************************************************************** + * PIC bank definitions + ***********************************************************************/ +#define PIC_BANK_FIRST 0 +#define PIC_BANK_LAST 0xf + + +/*********************************************************************** + * Operand types + ***********************************************************************/ +#define POT_RESULT 0 +#define POT_LEFT 1 +#define POT_RIGHT 2 + + +/*********************************************************************** + * + * PIC_OPTYPE - Operand types that are specific to the PIC architecture + * + * If a PIC assembly instruction has an operand then here is where we + * associate a type to it. For example, + * + * movf reg,W + * + * The movf has two operands: 'reg' and the W register. 'reg' is some + * arbitrary general purpose register, hence it has the type PO_GPR_REGISTER. + * The W register, which is the PIC's accumulator, has the type PO_W. + * + ***********************************************************************/ + + + +typedef enum +{ + PO_NONE=0, // No operand e.g. NOP + PO_W, // The working register (as a destination) + PO_WREG, // The working register (as a file register) + PO_STATUS, // The 'STATUS' register + PO_BSR, // The 'BSR' register + PO_FSR0, // The "file select register" (in PIC18 family it's one + // of three) + PO_INDF0, // The Indirect register + PO_INTCON, // Interrupt Control register + PO_GPR_REGISTER, // A general purpose register + PO_GPR_BIT, // A bit of a general purpose register + PO_GPR_TEMP, // A general purpose temporary register + PO_SFR_REGISTER, // A special function register (e.g. PORTA) + PO_PCL, // Program counter Low register + PO_PCLATH, // Program counter Latch high register + PO_PCLATU, // Program counter Latch upper register + PO_PRODL, // Product Register Low + PO_PRODH, // Product Register High + PO_LITERAL, // A constant + PO_REL_ADDR, // A relative address + PO_IMMEDIATE, // (8051 legacy) + PO_DIR, // Direct memory (8051 legacy) + PO_CRY, // bit memory (8051 legacy) + PO_BIT, // bit operand. + PO_STR, // (8051 legacy) + PO_LABEL, + PO_WILD, // Wild card operand in peep optimizer + PO_TWO_OPS // combine two operands +} PIC_OPTYPE; + + +/*********************************************************************** + * + * PIC_OPCODE + * + * This is not a list of the PIC's opcodes per se, but instead + * an enumeration of all of the different types of pic opcodes. + * + ***********************************************************************/ + +typedef enum +{ + POC_WILD=-1, /* Wild card - used in the pCode peep hole optimizer + * to represent ANY pic opcode */ + POC_ADDLW=0, + POC_ADDWF, + POC_ADDFW, + POC_ADDFWC, + POC_ADDWFC, + POC_ANDLW, + POC_ANDWF, + POC_ANDFW, + POC_BC, + POC_BCF, + POC_BN, + POC_BNC, + POC_BNN, + POC_BNOV, + POC_BNZ, + POC_BOV, + POC_BRA, + POC_BSF, + POC_BTFSC, + POC_BTFSS, + POC_BTG, + POC_BZ, + POC_CALL, + POC_CLRF, + POC_CLRWDT, + POC_COMF, + POC_COMFW, + POC_CPFSEQ, + POC_CPFSGT, + POC_CPFSLT, + POC_DAW, + POC_DCFSNZ, + POC_DCFSNZW, + POC_DECF, + POC_DECFW, + POC_DECFSZ, + POC_DECFSZW, + POC_GOTO, + POC_INCF, + POC_INCFW, + POC_INCFSZ, + POC_INCFSZW, + POC_INFSNZ, + POC_INFSNZW, + POC_IORWF, + POC_IORFW, + POC_IORLW, + POC_LFSR, + POC_MOVF, + POC_MOVFW, + POC_MOVFF, + POC_MOVLB, + POC_MOVLW, + POC_MOVWF, + POC_MULLW, + POC_MULWF, + POC_NEGF, + POC_NOP, + POC_POP, + POC_PUSH, + POC_RCALL, + POC_RETFIE, + POC_RETLW, + POC_RETURN, + POC_RLCF, + POC_RLCFW, + POC_RLNCF, + POC_RLNCFW, + POC_RRCF, + POC_RRCFW, + POC_RRNCF, + POC_RRNCFW, + POC_SETF, + POC_SUBLW, + POC_SUBFWB, + POC_SUBWF, + POC_SUBFW, + POC_SUBWFB_D0, + POC_SUBWFB_D1, + POC_SUBFWB_D0, + POC_SUBFWB_D1, + POC_SWAPF, + POC_SWAPFW, + POC_TBLRD, + POC_TBLRD_POSTINC, + POC_TBLRD_POSTDEC, + POC_TBLRD_PREINC, + POC_TBLWT, + POC_TBLWT_POSTINC, + POC_TBLWT_POSTDEC, + POC_TBLWT_PREINC, + POC_TSTFSZ, + POC_XORLW, + POC_XORWF, + POC_XORFW, + + POC_BANKSEL + + /* pseudo-instructions */ +} PIC_OPCODE; + + +/*********************************************************************** + * PC_TYPE - pCode Types + ***********************************************************************/ + +typedef enum +{ + PC_COMMENT=0, /* pCode is a comment */ + PC_INLINE, /* user's inline code */ + PC_OPCODE, /* PORT dependent opcode */ + PC_LABEL, /* assembly label */ + PC_FLOW, /* flow analysis */ + PC_FUNCTION, /* Function start or end */ + PC_WILD, /* wildcard - an opcode place holder used + * in the pCode peep hole optimizer */ + PC_CSOURCE, /* C-Source Line */ + PC_ASMDIR, /* Assembler directive */ + PC_BAD, /* Mark the pCode object as being bad */ + PC_INFO /* pCode information node, used primarily in optimizing */ +} PC_TYPE; + + +/*********************************************************************** + * INFO_TYPE - information node types + ***********************************************************************/ + +typedef enum +{ + INF_OPTIMIZATION, /* structure contains optimization information */ + INF_LOCALREGS /* structure contains local register information */ +} INFO_TYPE; + + + +/*********************************************************************** + * OPT_TYPE - optimization node types + ***********************************************************************/ + +typedef enum +{ + OPT_BEGIN, /* mark beginning of optimization block */ + OPT_END, /* mark ending of optimization block */ + OPT_JUMPTABLE_BEGIN, /* mark beginning of a jumptable */ + OPT_JUMPTABLE_END /* mark end of jumptable */ +} OPT_TYPE; + +/*********************************************************************** + * LR_TYPE - optimization node types + ***********************************************************************/ + +typedef enum +{ + LR_ENTRY_BEGIN, /* mark beginning of optimization block */ + LR_ENTRY_END, /* mark ending of optimization block */ + LR_EXIT_BEGIN, + LR_EXIT_END +} LR_TYPE; + + +/************************************************/ +/*************** Structures ********************/ +/************************************************/ +/* These are here as forward references - the + * full definition of these are below */ +struct pCode; +struct pCodeWildBlock; +struct pCodeRegLives; + +/************************************************* + pBranch + + The first step in optimizing pCode is determining + the program flow. This information is stored in + single-linked lists in the for of 'from' and 'to' + objects with in a pcode. For example, most instructions + don't involve any branching. So their from branch + points to the pCode immediately preceding them and + their 'to' branch points to the pcode immediately + following them. A skip instruction is an example of + a pcode that has multiple (in this case two) elements + in the 'to' branch. A 'label' pcode is an where there + may be multiple 'from' branches. + *************************************************/ + +typedef struct pBranch +{ + struct pCode *pc; // Next pCode in a branch + struct pBranch *next; /* If more than one branch + * the next one is here */ + +} pBranch; + +/************************************************* + pCodeOp + + pCode Operand structure. + For those assembly instructions that have arguments, + the pCode will have a pCodeOp in which the argument + can be stored. For example + + movf some_register,w + + 'some_register' will be stored/referenced in a pCodeOp + + *************************************************/ + +typedef struct pCodeOp +{ + PIC_OPTYPE type; + char *name; + +} pCodeOp; + +#if 0 +typedef struct pCodeOpBit +{ + pCodeOp pcop; + int bit; + unsigned int inBitSpace: 1; /* True if in bit space, else + just a bit of a register */ +} pCodeOpBit; +#endif + +typedef struct pCodeOpLit +{ + pCodeOp pcop; + int lit; + pCodeOp *arg2; /* needed as pCodeOpLit and pCodeOpLit2 are not separable via their type (PO_LITERAL) */ +} pCodeOpLit; + +typedef struct pCodeOpLit2 +{ + pCodeOp pcop; + int lit; + pCodeOp *arg2; +} pCodeOpLit2; + + +typedef struct pCodeOpImmd +{ + pCodeOp pcop; + int offset; /* low,high or upper byte of immediate value */ + int index; /* add this to the immediate value */ + unsigned _const:1; /* is in code space */ + + int rIdx; /* If this immd points to a register */ + struct regs *r; /* then this is the reg. */ + +} pCodeOpImmd; + +typedef struct pCodeOpLabel +{ + pCodeOp pcop; + int key; +} pCodeOpLabel; + +typedef struct pCodeOpReg +{ + pCodeOp pcop; // Can be either GPR or SFR + int rIdx; // Index into the register table + struct regs *r; + int instance; // byte # of Multi-byte registers + struct pBlock *pb; +} pCodeOpReg; + +typedef struct pCodeOp2 +{ + pCodeOp pcop; // describes this pCodeOp + pCodeOp *pcopL; // reference to left pCodeOp (src) + pCodeOp *pcopR; // reference to right pCodeOp (dest) +} pCodeOp2; + +typedef struct pCodeOpRegBit +{ + pCodeOpReg pcor; // The Register containing this bit + int bit; // 0-7 bit number. + PIC_OPTYPE subtype; // The type of this register. + unsigned int inBitSpace: 1; /* True if in bit space, else + just a bit of a register */ +} pCodeOpRegBit; + + +typedef struct pCodeOpWild +{ + pCodeOp pcop; + + struct pCodeWildBlock *pcwb; + + int id; /* index into an array of char *'s that will match + * the wild card. The array is in *pcp. */ + pCodeOp *subtype; /* Pointer to the Operand type into which this wild + * card will be expanded */ + pCodeOp *matched; /* When a wild matches, we'll store a pointer to the + * opcode we matched */ + + pCodeOp *pcop2; /* second operand if exists */ + +} pCodeOpWild; + + +typedef struct pCodeOpOpt +{ + pCodeOp pcop; + + OPT_TYPE type; /* optimization node type */ + + char *key; /* key by which a block is identified */ +} pCodeOpOpt; + +typedef struct pCodeOpLocalReg +{ + pCodeOp pcop; + + LR_TYPE type; +} pCodeOpLocalReg; + +/************************************************* + pCode + + Here is the basic build block of a PIC instruction. + Each pic instruction will get allocated a pCode. + A linked list of pCodes makes a program. + +**************************************************/ + +typedef struct pCode +{ + PC_TYPE type; + + struct pCode *prev; // The pCode objects are linked together + struct pCode *next; // in doubly linked lists. + + int seq; // sequence number + + struct pBlock *pb; // The pBlock that contains this pCode. + + /* "virtual functions" + * The pCode structure is like a base class + * in C++. The subsequent structures that "inherit" + * the pCode structure will initialize these function + * pointers to something useful */ + // void (*analyze) (struct pCode *_this); + void (*destruct)(struct pCode *_this); + void (*print) (FILE *of,struct pCode *_this); + +} pCode; + + +/************************************************* + pCodeComment +**************************************************/ + +typedef struct pCodeComment +{ + + pCode pc; + + char *comment; + +} pCodeComment; + + +/************************************************* + pCodeCSource +**************************************************/ + +typedef struct pCodeCSource +{ + + pCode pc; + + int line_number; + char *line; + char *file_name; + +} pCodeCSource; + + +/************************************************* + pCodeAsmDir +**************************************************/ + +/************************************************* + pCodeFlow + + The Flow object is used as marker to separate + the assembly code into contiguous chunks. In other + words, everytime an instruction cause or potentially + causes a branch, a Flow object will be inserted into + the pCode chain to mark the beginning of the next + contiguous chunk. + +**************************************************/ +struct defmap_s; // defined in pcode.c + +typedef struct pCodeFlow +{ + + pCode pc; + + pCode *end; /* Last pCode in this flow. Note that + the first pCode is pc.next */ + + /* set **uses; * map the pCode instruction inCond and outCond conditions + * in this array of set's. The reason we allocate an + * array of pointers instead of declaring each type of + * usage is because there are port dependent usage definitions */ + //int nuses; /* number of uses sets */ + + set *from; /* flow blocks that can send control to this flow block */ + set *to; /* flow blocks to which this one can send control */ + struct pCodeFlow *ancestor; /* The most immediate "single" pCodeFlow object that + * executes prior to this one. In many cases, this + * will be just the previous */ + + int inCond; /* Input conditions - stuff assumed defined at entry */ + int outCond; /* Output conditions - stuff modified by flow block */ + + int firstBank; /* The first and last bank flags are the first and last */ + int lastBank; /* register banks used within one flow object */ + + int FromConflicts; + int ToConflicts; + + set *registers;/* Registers used in this flow */ + + struct defmap_s *defmap; /* chronologically ordered list of definitions performed + in this flow (most recent at the front) */ + struct defmap_s *in_vals; /* definitions of all symbols reaching this flow + * symbols with multiple different definitions are stored + * with an assigned value of 0. */ + struct defmap_s *out_vals; /* definitions valid AFTER thie flow */ + +} pCodeFlow; + +/************************************************* + pCodeFlowLink + + The Flow Link object is used to record information + about how consecutive excutive Flow objects are related. + The pCodeFlow objects demarcate the pCodeInstructions + into contiguous chunks. The FlowLink records conflicts + in the discontinuities. For example, if one Flow object + references a register in bank 0 and the next Flow object + references a register in bank 1, then there is a discontinuity + in the banking registers. + +*/ +typedef struct pCodeFlowLink +{ + pCodeFlow *pcflow; /* pointer to linked pCodeFlow object */ + + int bank_conflict; /* records bank conflicts */ + +} pCodeFlowLink; + +/************************************************* + pCodeInstruction + + Here we describe all the facets of a PIC instruction + (expansion for the 18cxxx is also provided). + +**************************************************/ + +typedef struct pCodeInstruction +{ + + pCode pc; + + PIC_OPCODE op; // The opcode of the instruction. + + char const * const mnemonic; // Pointer to mnemonic string + + char isize; // pCode instruction size + + pBranch *from; // pCodes that execute before this one + pBranch *to; // pCodes that execute after + pBranch *label; // pCode instructions that have labels + + pCodeOp *pcop; /* Operand, if this instruction has one */ + pCodeFlow *pcflow; /* flow block to which this instruction belongs */ + pCodeCSource *cline; /* C Source from which this instruction was derived */ + + unsigned int num_ops; /* Number of operands (0,1,2 for mid range pics) */ + unsigned int isModReg: 1; /* If destination is W or F, then 1==F */ + unsigned int isBitInst: 1; /* e.g. BCF */ + unsigned int isBranch: 1; /* True if this is a branching instruction */ + unsigned int isSkip: 1; /* True if this is a skip instruction */ + unsigned int isLit: 1; /* True if this instruction has an literal operand */ + unsigned int isAccess: 1; /* True if this instruction has an access RAM operand */ + unsigned int isFastCall: 1; /* True if this instruction has a fast call/return mode select operand */ + unsigned int is2MemOp: 1; /* True is second operand is a memory operand VR - support for MOVFF */ + unsigned int is2LitOp: 1; /* True if instruction takes 2 literal operands VR - support for LFSR */ + + PIC_OPCODE inverted_op; /* Opcode of instruction that's the opposite of this one */ + unsigned int inCond; // Input conditions for this instruction + unsigned int outCond; // Output conditions for this instruction + +#define PCI_MAGIC 0x6e12 + unsigned int pci_magic; // sanity check for pci initialization +} pCodeInstruction; + + + +/************************************************* + pCodeAsmDir +**************************************************/ + +typedef struct pCodeAsmDir +{ + pCodeInstruction pci; + + char *directive; + char *arg; +} pCodeAsmDir; + + +/************************************************* + pCodeLabel +**************************************************/ + +typedef struct pCodeLabel +{ + + pCode pc; + + char *label; + int key; + int force; /* label cannot be optimized out */ + +} pCodeLabel; + +/************************************************* + pCodeFunction +**************************************************/ + +typedef struct pCodeFunction +{ + + pCode pc; + + char *modname; + char *fname; /* If NULL, then this is the end of + a function. Otherwise, it's the + start and the name is contained + here */ + + pBranch *from; // pCodes that execute before this one + pBranch *to; // pCodes that execute after + pBranch *label; // pCode instructions that have labels + + int ncalled; /* Number of times function is called */ + + int absblock; /* hack to emulate a block pCodes in absolute position + but not inside a function */ + int stackusage; /* stack positions used in function */ + +} pCodeFunction; + + +/************************************************* + pCodeWild +**************************************************/ + +typedef struct pCodeWild +{ + + pCodeInstruction pci; + + int id; /* Index into the wild card array of a peepBlock + * - this wild card will get expanded into that pCode + * that is stored at this index */ + + /* Conditions on wild pcode instruction */ + int mustBeBitSkipInst:1; + int mustNotBeBitSkipInst:1; + int invertBitSkipInst:1; + + pCodeOp *operand; // Optional operand + pCodeOp *label; // Optional label + +} pCodeWild; + + +/************************************************* + pInfo + + Here are stored generic informaton +*************************************************/ +typedef struct pCodeInfo +{ + pCodeInstruction pci; + + INFO_TYPE type; /* info node type */ + + pCodeOp *oper1; /* info node arguments */ +} pCodeInfo; + + +/************************************************* + pBlock + + Here are PIC program snippets. There's a strong + correlation between the eBBlocks and pBlocks. + SDCC subdivides a C program into managable chunks. + Each chunk becomes a eBBlock and ultimately in the + PIC port a pBlock. + +**************************************************/ + +typedef struct pBlock +{ + memmap *cmemmap; /* The snippet is from this memmap */ + char dbName; /* if cmemmap is NULL, then dbName will identify the block */ + pCode *pcHead; /* A pointer to the first pCode in a link list of pCodes */ + pCode *pcTail; /* A pointer to the last pCode in a link list of pCodes */ + + struct pBlock *next; /* The pBlocks will form a doubly linked list */ + struct pBlock *prev; + + set *function_entries; /* dll of functions in this pblock */ + set *function_exits; + set *function_calls; + set *tregisters; + + set *FlowTree; + unsigned visited:1; /* set true if traversed in call tree */ + + unsigned seq; /* sequence number of this pBlock */ + +} pBlock; + +/************************************************* + pFile + + The collection of pBlock program snippets are + placed into a linked list that is implemented + in the pFile structure. + + The pcode optimizer will parse the pFile. + +**************************************************/ + +typedef struct pFile +{ + pBlock *pbHead; /* A pointer to the first pBlock */ + pBlock *pbTail; /* A pointer to the last pBlock */ + + pBranch *functions; /* A SLL of functions in this pFile */ + +} pFile; + + + +/************************************************* + pCodeWildBlock + + The pCodeWildBlock object keeps track of the wild + variables, operands, and opcodes that exist in + a pBlock. +**************************************************/ +typedef struct pCodeWildBlock { + pBlock *pb; + struct pCodePeep *pcp; // pointer back to ... I don't like this... + + int nvars; // Number of wildcard registers in target. + char **vars; // array of pointers to them + + int nops; // Number of wildcard operands in target. + pCodeOp **wildpCodeOps; // array of pointers to the pCodeOp's. + + int nwildpCodes; // Number of wildcard pCodes in target/replace + pCode **wildpCodes; // array of pointers to the pCode's. + +} pCodeWildBlock; + +/************************************************* + pCodePeep + + The pCodePeep object mimics the peep hole optimizer + in the main SDCC src (e.g. SDCCpeeph.c). Essentially + there is a target pCode chain and a replacement + pCode chain. The target chain is compared to the + pCode that is generated by gen.c. If a match is + found then the pCode is replaced by the replacement + pCode chain. +**************************************************/ +typedef struct pCodePeep { + pCodeWildBlock target; // code we'd like to optimize + pCodeWildBlock replace; // and this is what we'll optimize it with. + + //pBlock *target; + //pBlock replace; // and this is what we'll optimize it with. + + + + /* (Note: a wildcard register is a place holder. Any register + * can be replaced by the wildcard when the pcode is being + * compared to the target. */ + + /* Post Conditions. A post condition is a condition that + * must be either true or false before the peep rule is + * accepted. For example, a certain rule may be accepted + * if and only if the Z-bit is not used as an input to + * the subsequent instructions in a pCode chain. + */ + unsigned int postFalseCond; + unsigned int postTrueCond; + +} pCodePeep; + +/************************************************* + + pCode peep command definitions + + Here are some special commands that control the +way the peep hole optimizer behaves + +**************************************************/ + +enum peepCommandTypes{ + NOTBITSKIP = 0, + BITSKIP, + INVERTBITSKIP, + _LAST_PEEP_COMMAND_ +}; + +/************************************************* + peepCommand structure stores the peep commands. + +**************************************************/ + +typedef struct peepCommand { + int id; + char *cmd; +} peepCommand; + +/************************************************* + pCode Macros + +**************************************************/ +#define PCODE(x) ((pCode *)(x)) +#define PCI(x) ((pCodeInstruction *)(x)) +#define PCL(x) ((pCodeLabel *)(x)) +#define PCF(x) ((pCodeFunction *)(x)) +#define PCFL(x) ((pCodeFlow *)(x)) +#define PCFLINK(x)((pCodeFlowLink *)(x)) +#define PCW(x) ((pCodeWild *)(x)) +#define PCCS(x) ((pCodeCSource *)(x)) +#define PCAD(x) ((pCodeAsmDir *)(x)) +#define PCINF(x) ((pCodeInfo *)(x)) + +#define PCOP(x) ((pCodeOp *)(x)) +#define PCOP2(x) ((pCodeOp2 *)(x)) +//#define PCOB(x) ((pCodeOpBit *)(x)) +#define PCOL(x) ((pCodeOpLit *)(x)) +#define PCOI(x) ((pCodeOpImmd *)(x)) +#define PCOLAB(x) ((pCodeOpLabel *)(x)) +#define PCOR(x) ((pCodeOpReg *)(x)) +//#define PCOR2(x) ((pCodeOpReg2 *)(x)) +#define PCORB(x) ((pCodeOpRegBit *)(x)) +#define PCOO(x) ((pCodeOpOpt *)(x)) +#define PCOLR(x) ((pCodeOpLocalReg *)(x)) +#define PCOW(x) ((pCodeOpWild *)(x)) +#define PCOW2(x) (PCOW(PCOW(x)->pcop2)) +#define PBR(x) ((pBranch *)(x)) + +#define PCWB(x) ((pCodeWildBlock *)(x)) + + +/* + macros for checking pCode types +*/ +#define isPCI(x) ((PCODE(x)->type == PC_OPCODE)) +#define isPCI_BRANCH(x) ((PCODE(x)->type == PC_OPCODE) && PCI(x)->isBranch) +#define isPCI_SKIP(x) ((PCODE(x)->type == PC_OPCODE) && PCI(x)->isSkip) +#define isPCI_LIT(x) ((PCODE(x)->type == PC_OPCODE) && PCI(x)->isLit) +#define isPCI_BITSKIP(x)((PCODE(x)->type == PC_OPCODE) && PCI(x)->isSkip && PCI(x)->isBitInst) +#define isPCFL(x) ((PCODE(x)->type == PC_FLOW)) +#define isPCF(x) ((PCODE(x)->type == PC_FUNCTION)) +#define isPCL(x) ((PCODE(x)->type == PC_LABEL)) +#define isPCW(x) ((PCODE(x)->type == PC_WILD)) +#define isPCCS(x) ((PCODE(x)->type == PC_CSOURCE)) +#define isPCAD(x) ((PCODE(x)->type == PC_ASMDIR)) +#define isPCINFO(x) ((PCODE(x)->type == PC_INFO)) + +#define isCALL(x) ((isPCI(x)) && (PCI(x)->op == POC_CALL)) +#define isSTATUS_REG(r) ((r)->pc_type == PO_STATUS) +#define isBSR_REG(r) ((r)->pc_type == PO_BSR) +#define isACCESS_BANK(r) (r->accessBank) + + + +#define isPCOLAB(x) ((PCOP(x)->type) == PO_LABEL) + +/*-----------------------------------------------------------------* + * pCode functions. + *-----------------------------------------------------------------*/ + +pCode *pic16_newpCode (PIC_OPCODE op, pCodeOp *pcop); // Create a new pCode given an operand +pCode *pic16_newpCodeCharP(char *cP); // Create a new pCode given a char * +pCode *pic16_newpCodeInlineP(char *cP); // Create a new pCode given a char * +pCode *pic16_newpCodeFunction(char *g, char *f); // Create a new function +pCode *pic16_newpCodeLabel(char *name,int key); // Create a new label given a key +pCode *pic16_newpCodeLabelFORCE(char *name, int key); // Same as newpCodeLabel but label cannot be optimized out +pCode *pic16_newpCodeCSource(int ln, const char *f, const char *l); // Create a new symbol line +pBlock *pic16_newpCodeChain(memmap *cm,char c, pCode *pc); // Create a new pBlock +void pic16_printpBlock(FILE *of, pBlock *pb); // Write a pBlock to a file +void pic16_addpCode2pBlock(pBlock *pb, pCode *pc); // Add a pCode to a pBlock +void pic16_addpBlock(pBlock *pb); // Add a pBlock to a pFile +void pic16_copypCode(FILE *of, char dbName); // Write all pBlocks with dbName to *of +void pic16_movepBlock2Head(char dbName); // move pBlocks around +void pic16_AnalyzepCode(char dbName); +void pic16_OptimizeLocalRegs(void); +void pic16_AssignRegBanks(void); +void pic16_printCallTree(FILE *of); +void pCodePeepInit(void); +void pic16_pBlockConvert2ISR(pBlock *pb); +void pic16_pBlockConvert2Absolute(pBlock *pb); +void pic16_initDB(void); +void pic16_emitDB(int c, char ptype, void *p); // Add DB directives to a pBlock +void pic16_emitDS(char *s, char ptype, void *p); +void pic16_flushDB(char ptype, void *p); // Add pending DB data to a pBlock + +pCode *pic16_newpCodeAsmDir(char *asdir, char *argfmt, ...); + +pCodeOp *pic16_newpCodeOpLabel(char *name, int key); +pCodeOp *pic16_newpCodeOpImmd(char *name, int offset, int index, int code_space); +pCodeOp *pic16_newpCodeOpLit(int lit); +pCodeOp *pic16_newpCodeOpLit12(int lit); +pCodeOp *pic16_newpCodeOpLit2(int lit, pCodeOp *arg2); +pCodeOp *pic16_newpCodeOpBit(char *name, int bit,int inBitSpace, PIC_OPTYPE subt); +pCodeOp *pic16_newpCodeOpBit_simple (struct asmop *op, int offs, int bit); +pCodeOp *pic16_newpCodeOpRegFromStr(char *name); +pCodeOp *pic16_newpCodeOpReg(int rIdx); +pCodeOp *pic16_newpCodeOp(char *name, PIC_OPTYPE p); +pCodeOp *pic16_newpCodeOp2(pCodeOp *src, pCodeOp *dst); +pCodeOp *pic16_newpCodeOpRegNotVect(bitVect *bv); +pCodeOp *pic16_pCodeOpCopy(pCodeOp *pcop); + +pCode *pic16_newpCodeInfo(INFO_TYPE type, pCodeOp *pcop); +pCodeOp *pic16_newpCodeOpOpt(OPT_TYPE type, char *key); +pCodeOp *pic16_newpCodeOpLocalRegs(LR_TYPE type); +pCodeOp *pic16_newpCodeOpReg(int rIdx); + +pCode * pic16_findNextInstruction(pCode *pci); +pCode * pic16_findNextpCode(pCode *pc, PC_TYPE pct); +int pic16_isPCinFlow(pCode *pc, pCode *pcflow); +struct regs * pic16_getRegFromInstruction(pCode *pc); +struct regs * pic16_getRegFromInstruction2(pCode *pc); +char *pic16_get_op(pCodeOp *pcop,char *buffer, size_t size); +char *pic16_get_op2(pCodeOp *pcop,char *buffer, size_t size); +char *dumpPicOptype(PIC_OPTYPE type); + +extern void pic16_pcode_test(void); +extern int pic16_debug_verbose; +extern int pic16_pcode_verbose; + +extern char *LR_TYPE_STR[]; + + +#ifndef debugf +//#define debugf(frm, rest...) _debugf(__FILE__, __LINE__, frm, rest) +#define debugf(frm, rest) _debugf(__FILE__, __LINE__, frm, rest) +#define debugf2(frm, arg1, arg2) _debugf(__FILE__, __LINE__, frm, arg1, arg2) +#define debugf3(frm, arg1, arg2, arg3) _debugf(__FILE__, __LINE__, frm, arg1, arg2, arg3) + +#endif + +extern void _debugf(char *f, int l, char *frm, ...); + + +/*-----------------------------------------------------------------* + * pCode objects. + *-----------------------------------------------------------------*/ + +extern pCodeOpReg pic16_pc_status; +extern pCodeOpReg pic16_pc_intcon; +extern pCodeOpReg pic16_pc_pcl; +extern pCodeOpReg pic16_pc_pclath; +extern pCodeOpReg pic16_pc_pclatu; +extern pCodeOpReg pic16_pc_wreg; +extern pCodeOpReg pic16_pc_tosl; +extern pCodeOpReg pic16_pc_tosh; +extern pCodeOpReg pic16_pc_tosu; +extern pCodeOpReg pic16_pc_tblptrl; +extern pCodeOpReg pic16_pc_tblptrh; +extern pCodeOpReg pic16_pc_tblptru; +extern pCodeOpReg pic16_pc_tablat; +extern pCodeOpReg pic16_pc_bsr; +extern pCodeOpReg pic16_pc_fsr0; +extern pCodeOpReg pic16_pc_fsr0l; +extern pCodeOpReg pic16_pc_fsr0h; +extern pCodeOpReg pic16_pc_fsr1l; +extern pCodeOpReg pic16_pc_fsr1h; +extern pCodeOpReg pic16_pc_fsr2l; +extern pCodeOpReg pic16_pc_fsr2h; +extern pCodeOpReg pic16_pc_indf0; +extern pCodeOpReg pic16_pc_postinc0; +extern pCodeOpReg pic16_pc_postdec0; +extern pCodeOpReg pic16_pc_preinc0; +extern pCodeOpReg pic16_pc_plusw0; +extern pCodeOpReg pic16_pc_indf1; +extern pCodeOpReg pic16_pc_postinc1; +extern pCodeOpReg pic16_pc_postdec1; +extern pCodeOpReg pic16_pc_preinc1; +extern pCodeOpReg pic16_pc_plusw1; +extern pCodeOpReg pic16_pc_indf2; +extern pCodeOpReg pic16_pc_postinc2; +extern pCodeOpReg pic16_pc_postdec2; +extern pCodeOpReg pic16_pc_preinc2; +extern pCodeOpReg pic16_pc_plusw2; +extern pCodeOpReg pic16_pc_prodl; +extern pCodeOpReg pic16_pc_prodh; + +extern pCodeOpReg pic16_pc_eecon1; +extern pCodeOpReg pic16_pc_eecon2; +extern pCodeOpReg pic16_pc_eedata; +extern pCodeOpReg pic16_pc_eeadr; + +extern pCodeOpReg pic16_pc_kzero; +extern pCodeOpReg pic16_pc_wsave; /* wsave and ssave are used to save W and the Status */ +extern pCodeOpReg pic16_pc_ssave; /* registers during an interrupt */ + +extern pCodeOpReg *pic16_stackpnt_lo; +extern pCodeOpReg *pic16_stackpnt_hi; +extern pCodeOpReg *pic16_stack_postinc; +extern pCodeOpReg *pic16_stack_postdec; +extern pCodeOpReg *pic16_stack_preinc; +extern pCodeOpReg *pic16_stack_plusw; + +extern pCodeOpReg *pic16_framepnt_lo; +extern pCodeOpReg *pic16_framepnt_hi; +extern pCodeOpReg *pic16_frame_postinc; +extern pCodeOpReg *pic16_frame_postdec; +extern pCodeOpReg *pic16_frame_preinc; +extern pCodeOpReg *pic16_frame_plusw; + +extern pCodeOpReg pic16_pc_gpsimio; +extern pCodeOpReg pic16_pc_gpsimio2; + +#endif // __PCODE_H__ diff --git a/src/pic16/pcodeflow.c b/src/pic16/pcodeflow.c new file mode 100644 index 0000000..fc8ec86 --- /dev/null +++ b/src/pic16/pcodeflow.c @@ -0,0 +1,351 @@ +/*------------------------------------------------------------------------- + + pcodeflow.c - post code generation flow analysis + + Written By - Scott Dattalo scott@dattalo.com + Ported to PIC16 By - Martin Dubuc m.dubuc@rogers.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +-------------------------------------------------------------------------*/ +/* + pcodeflow.c + + The purpose of the code in this file is to analyze the flow of the + pCode. + +*/ + +#include + +#include "common.h" // Include everything in the SDCC src directory +#include "newalloc.h" +#include "ralloc.h" +#include "device.h" +#include "pcode.h" +#include "pcoderegs.h" +#include "pcodeflow.h" + +#if 0 + +/* + In the section that follows, an exhaustive flow "tree" is built. + It's not a tree that's really built, but instead every possible + flow path is constructed. + + This is really overkill... +*/ + +static set *FlowTree=NULL; + +void dbg_dumpFlowTree(set *FlowTree) +{ + set *segment; + pCodeFlow *pcflow; + + fprintf(stderr,"Flow Tree: \n"); + + for(segment = setFirstItem(FlowTree); segment; segment=setNextItem(FlowTree)) { + + fprintf(stderr,"Segment:\n"); + + for(pcflow=PCFL(setFirstItem(segment)); pcflow; pcflow=PCFL(setNextItem(segment))) { + fprintf(stderr, " 0x%03x",pcflow->pc.seq); + } + fprintf(stderr,"\n"); + } + +} + + + + +/*-----------------------------------------------------------------* + * void BuildFlowSegment(set *segment, pCodeFlow *pcflow) + *-----------------------------------------------------------------*/ +static void BuildFlowSegment(set *segment, pCodeFlow *pcflow) +{ + + int nNextFlow=0; + pCodeFlowLink *pcflowLink=NULL; + + /* Add this flow to the set if it's not in there already */ + if(isinSet(segment, pcflow)) { + addSetHead(&FlowTree, segment); + return; + } + + addSetHead(&segment, pcflow); + + /* Continue to add contiguous flows */ + + while( pcflow->to && ((nNextFlow = elementsInSet(pcflow->to)) == 1)) { + pcflowLink = (pCodeFlowLink *)(setFirstItem(pcflow->to)); + pcflow = pcflowLink->pcflow; + + if(isinSet(segment, pcflow)) { + addSetIfnotP(&FlowTree, segment); + return; + } + + addSetIfnotP(&segment, pcflow); + + } + + /* Branch: for each branch, duplicate the set and recursively call */ + if(pcflow->to && nNextFlow>=2) { + pCodeFlow *pcflow_to; + + set *branch_segment=NULL; + + pcflowLink = (pCodeFlowLink *)(setFirstItem(pcflow->to)); + pcflow_to = pcflowLink->pcflow; + + addSetIfnotP(&segment, pcflow); + + pcflowLink = (pCodeFlowLink *)(setNextItem(pcflow->to)); + + while(pcflowLink) { + + branch_segment = setFromSet(segment); + BuildFlowSegment(setFromSet(segment),pcflowLink->pcflow); + pcflowLink = (pCodeFlowLink *)(setNextItem(pcflow->to)); + } + + /* add the first branch to this segment */ + BuildFlowSegment(segment,pcflow_to); + + } + + addSetIfnotP(&FlowTree, segment); + + /* done */ +} + +/*-----------------------------------------------------------------* + * void pic16_BuildFlowTree(pBlock *pb) + *-----------------------------------------------------------------*/ +void pic16_BuildFlowTree(pBlock *pb) +{ + pCodeFlow *pcflow; + set *segment; + + FlowTree = newSet(); + + /* Start with the first flow object of this pBlock */ + + pcflow = PCFL(pic16_findNextpCode(pb->pcHead, PC_FLOW)); + + segment = newSet(); + BuildFlowSegment(segment, pcflow); + + pb->FlowTree = FlowTree; + + dbg_dumpFlowTree(FlowTree); +} + +static void dbg_dumpFlow(pBlock *pb) +{ + pCode *pcflow; + + for( pcflow = pic16_findNextpCode(pb->pcHead, PC_FLOW); + pcflow != NULL; + pcflow = pic16_findNextpCode(pcflow->next, PC_FLOW) ) { + + if(!isPCFL(pcflow)) + fprintf(stderr, "LinkFlow - pcflow is not a flow object "); + + fprintf(stderr, "Flow: 0x%x",pcflow->seq); + if(PCFL(pcflow) && PCFL(pcflow)->ancestor) + fprintf(stderr,", ancestor 0x%x\n", + PCFL(pcflow)->ancestor->pc.seq); + else { + pCodeFlowLink *from = (PCFL(pcflow)->from) ? (PCFLINK(setFirstItem(PCFL(pcflow)->from))) : NULL; + fprintf(stderr," no ancestor"); + while(from) { + fprintf(stderr," (0x%x)",from->pcflow->pc.seq); + from = setNextItem(PCFL(pcflow)->from); + } + fprintf(stderr,"\n"); + } + } +} +#endif + +#if 0 +/*-----------------------------------------------------------------* + * void BuildFlowSegment(set *segment, pCodeFlow *pcflow) + *-----------------------------------------------------------------*/ +static void BuildFlowSegment(pCodeFlow *pcflow) +{ + static int recursion=0; + pCodeFlow *pcflow_other; + set *flowset; + + if(!pcflow) + return; + + if(recursion++ > 200) { + fprintf(stderr, " exceeded recursion\n"); + return; + } + + fprintf(stderr,"examining 0x%x\n",pcflow->pc.seq); + + if(pcflow->from) { + + + flowset = pcflow->from; + + if(flowset && flowset->next == NULL) { + + /* + There is a flow before this one. In fact, there's + exactly one flow before this one (because ->next is + NULL). That means all children of this node pass + through both this node and the node immediately + before this one; i.e. they have the same ancestor. + */ + + if( (NULL == (pcflow_other = PCFLINK(flowset->item)->pcflow)) || + (NULL == pcflow_other)) { + fprintf(stderr,"2 error in flow link\n"); + exit(1); + } + pcflow->ancestor = pcflow_other->ancestor ; + + fprintf(stderr,"Assigning ancestor 0x%x from flow 0x%x\n", + pcflow->ancestor->pc.seq, pcflow_other->pc.seq); + + } else { + + if(flowset == NULL) { + + /* There are no flows before this one. + * If this is not the first flow object in the pBlock then + * there's an error */ + + if(!pcflow->ancestor) { + fprintf(stderr,"error in flow link\n"); + exit(1); + + } + + } else { + + /* Flow passes to this flow from multiple flows. Let's + look at just one of these. If the one we look at has + an ancestor, then that's our ancestor too. If the one + we look at doesn't have an ancestor, then that means + we haven't traversed that branch of the call tree + yet - but we will */ + + pcflow_other = PCFLINK(flowset->item)->pcflow; + if(pcflow_other) { + fprintf(stderr, "coming from 0x%x\n",pcflow_other->pc.seq); + if( pcflow_other->ancestor) + pcflow->ancestor = pcflow_other->ancestor; + } + } + + + } + + } else { + /* there are no nodes before this one */ + if(!pcflow->ancestor) + fprintf(stderr,"3 Error in flow link\n"); + } + + /* Now let's recursively expand the call tree */ + + if(pcflow->ancestor && pcflow->to) { + flowset = pcflow->to; + while(flowset) { + BuildFlowSegment(PCFLINK(flowset->item)->pcflow); + flowset = flowset->next; + } + } + +} +#endif + +void pic16_BuildFlowTree(pBlock *pb) +{ + pCodeFlow *first_pcflow, *pcflow; + + + // fprintf(stderr,"pic16_BuildFlowTree \n"); + + first_pcflow = PCFL(pic16_findNextpCode(pb->pcHead, PC_FLOW)); + if(!first_pcflow) + return; + + /* The very first node is like Adam, it's its own ancestor (i.e. + * there are no other flows in this pBlock prior to the first one). + */ + + first_pcflow->ancestor = first_pcflow; + + /* For each flow that has only one predecessor, it's easy to + identify the ancestor */ + pcflow = PCFL(pic16_findNextpCode(first_pcflow->pc.next, PC_FLOW)); + + while(pcflow) { + if(elementsInSet(pcflow->from) == 1) { + pCodeFlowLink *from = PCFLINK(setFirstItem(pcflow->from)); + + pcflow->ancestor = from->pcflow; + /* + fprintf(stderr,"Assigning ancestor 0x%x to flow 0x%x\n", + pcflow->ancestor->pc.seq, pcflow->pc.seq); + */ + } + + pcflow = PCFL(pic16_findNextpCode(pcflow->pc.next, PC_FLOW)); + + } + + pcflow = PCFL(pic16_findNextpCode(first_pcflow->pc.next, PC_FLOW)); + + while(pcflow) { + if(elementsInSet(pcflow->from) > 1) { + pCodeFlow *min_pcflow; + pCodeFlowLink *from = PCFLINK(setFirstItem(pcflow->from)); + + min_pcflow = from->pcflow; + + while( (from = setNextItem(pcflow->from)) != NULL) { + if(from->pcflow->pc.seq < min_pcflow->pc.seq) + min_pcflow = from->pcflow; + } + + pcflow->ancestor = min_pcflow; + /* + fprintf(stderr,"Assigning ancestor 0x%x to flow 0x%x from multiple\n", + pcflow->ancestor->pc.seq, pcflow->pc.seq); + */ + + } + + pcflow = PCFL(pic16_findNextpCode(pcflow->pc.next, PC_FLOW)); + + } + + // BuildFlowSegment(pcflow); + + //dbg_dumpFlow(pb); + +} diff --git a/src/pic16/pcodeflow.h b/src/pic16/pcodeflow.h new file mode 100644 index 0000000..46cd38d --- /dev/null +++ b/src/pic16/pcodeflow.h @@ -0,0 +1,69 @@ +/*------------------------------------------------------------------------- + + pcode.h - post code generation + + Written By - Scott Dattalo scott@dattalo.com + PIC16 port - Martin Dubuc m.dubuc@rogers.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +-------------------------------------------------------------------------*/ + +#ifndef __PCODEFLOW_H__ +#define __PCODEFLOW_H__ + +/************************************************* + * pCode conditions: + * + * The "conditions" are bit-mapped flags that describe + * input and/or output conditions that are affected by + * the instructions. For example: + * + * MOVF SOME_REG,W + * + * This instruction depends upon 'SOME_REG'. Consequently + * it has the input condition PCC_REGISTER set to true. + * + * In addition, this instruction affects the Z bit in the + * status register and affects W. Thus the output conditions + * are the logical or: + * PCC_ZERO_BIT | PCC_W + * + * The conditions are intialized when the pCode for an + * instruction is created. They're subsequently used + * by the pCode optimizer determine state information + * in the program flow. + *************************************************/ + +#define PCC_NONE 0 +#define PCC_REGISTER (1<<0) +#define PCC_REGISTER2 (1<<1) +#define PCC_C (1<<2) +#define PCC_Z (1<<3) +#define PCC_DC (1<<4) +#define PCC_OV (1<<5) +#define PCC_N (1<<6) +#define PCC_W (1<<7) +#define PCC_EXAMINE_PCOP (1<<8) +#define PCC_LITERAL (1<<9) +#define PCC_REL_ADDR (1<<10) + +#define PCC_STATUS (PCC_C | PCC_Z | PCC_DC | PCC_OV | PCC_N) + +/*------------------------------------------------------------*/ + +void BuildFlowAncestry(pBlock *pb); + +#endif // __PCODEFLOW_H__ diff --git a/src/pic16/pcodepeep.c b/src/pic16/pcodepeep.c new file mode 100644 index 0000000..ec373e3 --- /dev/null +++ b/src/pic16/pcodepeep.c @@ -0,0 +1,2534 @@ +/*------------------------------------------------------------------------- + + pcodepeep.c - post code generation + + Written By - Scott Dattalo scott@dattalo.com + Ported to PIC16 By - Martin Dubuc m.dubuc@rogers.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +-------------------------------------------------------------------------*/ + +#include +#include + +#include "common.h" // Include everything in the SDCC src directory +#include "newalloc.h" + +//#define PCODE_DEBUG + +#include "pcode.h" +#include "pcodeflow.h" +#include "ralloc.h" + +pCodeOp *pic16_popCopyGPR2Bit(pCodeOpReg *pc, int bitval); + +pCodeOp *pic16_newpCodeOpWild(int id, pCodeWildBlock *pcwb, pCodeOp *subtype); +pCodeOp *pic16_newpCodeOpWild2(int id, int id2, pCodeWildBlock *pcwb, pCodeOp *subtype, pCodeOp *subtype2); +pCode *pic16_newpCodeWild(int pCodeID, pCodeOp *optional_operand, pCodeOp *optional_label); +pCode * pic16_findNextInstruction(pCode *pc); +int pic16_getpCode(char *mnem,int dest); +int pic16_getpCodePeepCommand(char *cmd); +void pic16_pBlockMergeLabels(pBlock *pb); +char *pic16_pCode2str(char *str, int size, pCode *pc); +//char *pic16_get_op(pCodeOp *pcop,char *buf, size_t buf_size); +pCodeOp *pic16_popCombine2(pCodeOp *, pCodeOp *, int); + +extern pCodeInstruction *pic16Mnemonics[]; +static int parsing_peeps=1; + +#define IS_PCCOMMENT(x) ( x && (x->type==PC_COMMENT)) + +/****************************************************************/ +/* + * rootRules - defined in SDCCpeep.c + * This is a pointer to the (parsed) peephole rules that are + * defined in peep.def. + */ + +//extern peepRule *rootRules; + + + + +/****************************************************************/ +/****************************************************************/ +typedef struct _DLL { + struct _DLL *prev; + struct _DLL *next; + // void *data; +} _DLL; + + +typedef struct pCodePeepSnippets +{ + _DLL dll; + pCodePeep *peep; +} pCodePeepSnippets; + + +/****************************************************************/ +/* */ +/* peepSnippets - */ +/* */ +/****************************************************************/ + +static pCodePeepSnippets *peepSnippets=NULL; + +/****************************************************************/ +/* */ +/* curPeep */ +/* */ +/****************************************************************/ + +//static pCodePeep *curPeep=NULL; + +/****************************************************************/ +/* */ +/* curBlock */ +/* */ +/****************************************************************/ + +//static pBlock *curBlock=NULL; + + +/****************************************************************/ +/* */ +/* max wild cards in a peep rule */ +/* */ +/****************************************************************/ + +//static int sMaxWildVar = 0; +//static int sMaxWildMnem = 0; + + +typedef struct pCodeToken +{ + int tt; // token type; + union { + char c; // character + int n; // number + char *s; // string + } tok; + +} pCodeToken; + +pCodeToken tokArr[50]; +static unsigned tokIdx=0; + + +typedef enum { + PCT_NULL=0, + PCT_SPACE=1, + PCT_PERCENT, + PCT_LESSTHAN, + PCT_GREATERTHAN, + PCT_COLON, + PCT_COMMA, + PCT_COMMENT, + PCT_STRING, + PCT_NUMBER + +} pCodeTokens; + + +typedef struct parsedPattern { + struct pcPattern *pcp; + pCodeToken *pct; +} parsedPattern; + +#define MAX_PARSEDPATARR 50 +parsedPattern parsedPatArr[MAX_PARSEDPATARR]; +//static unsigned int parsedPatIdx=0; + + +typedef enum { + PCP_LABEL=1, + PCP_NUMBER, + PCP_STR, + PCP_WILDVAR, + PCP_WILDSTR, + PCP_COMMA, + PCP_COMMENT +} pCodePatterns; + +static char pcpat_label[] = {PCT_PERCENT, PCT_NUMBER, PCT_COLON, 0}; +static char pcpat_number[] = {PCT_NUMBER, 0}; +static char pcpat_string[] = {PCT_STRING, 0}; +static char pcpat_wildString[] = {PCT_PERCENT, PCT_STRING, 0}; +static char pcpat_wildVar[] = {PCT_PERCENT, PCT_NUMBER, 0}; +static char pcpat_comma[] = {PCT_COMMA, 0}; +static char pcpat_comment[] = {PCT_COMMENT, 0}; + + +typedef struct pcPattern { + char pt; // Pattern type + char *tokens; // list of tokens that describe the pattern + void * (*f) (void *,pCodeWildBlock *); +} pcPattern; + +static pcPattern pcpArr[] = { + {PCP_LABEL, pcpat_label, NULL}, + {PCP_WILDSTR, pcpat_wildString, NULL}, + {PCP_STR, pcpat_string, NULL}, + {PCP_WILDVAR, pcpat_wildVar, NULL}, + {PCP_COMMA, pcpat_comma, NULL}, + {PCP_COMMENT, pcpat_comment, NULL}, + {PCP_NUMBER, pcpat_number, NULL} +}; + +#define PCPATTERNS (sizeof(pcpArr)/sizeof(pcPattern)) + +// Assembly Line Token +typedef enum { + ALT_LABEL=1, + ALT_COMMENT, + ALT_MNEM0, + ALT_MNEM0A, + ALT_MNEM1, + ALT_MNEM1A, + ALT_MNEM1B, + ALT_MNEM2, + ALT_MNEM2A, + ALT_MNEM2B, + ALT_MNEM3, + ALT_MNEM4, + ALT_MNEM4a +} altPatterns; + +static char alt_comment[] = { PCP_COMMENT, 0}; +static char alt_label[] = { PCP_LABEL, 0}; +static char alt_mnem0[] = { PCP_STR, 0}; +static char alt_mnem0a[] = { PCP_WILDVAR, 0}; +static char alt_mnem1[] = { PCP_STR, PCP_STR, 0}; +static char alt_mnem1a[] = { PCP_STR, PCP_WILDVAR, 0}; +static char alt_mnem1b[] = { PCP_STR, PCP_NUMBER, 0}; +static char alt_mnem2[] = { PCP_STR, PCP_STR, PCP_COMMA, PCP_STR, 0}; +static char alt_mnem2a[] = { PCP_STR, PCP_WILDVAR, PCP_COMMA, PCP_STR, 0}; +static char alt_mnem2b[] = { PCP_STR, PCP_WILDVAR, PCP_COMMA, PCP_WILDVAR, 0}; +static char alt_mnem3[] = { PCP_STR, PCP_STR, PCP_COMMA, PCP_NUMBER, 0}; +static char alt_mnem4[] = { PCP_STR, PCP_NUMBER, PCP_COMMA, PCP_STR, 0}; // for lfsr 0 , name +static char alt_mnem4a[] = { PCP_STR, PCP_NUMBER, PCP_COMMA, PCP_NUMBER, 0}; // for lfsr 0 , value + +static void * cvt_altpat_label(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_comment(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem0(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem0a(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem1(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem1a(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem1b(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem2(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem2a(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem2b(void *pp, pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem3(void *pp,pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem4(void *pp, pCodeWildBlock *pcwb); +static void * cvt_altpat_mnem4a(void *pp, pCodeWildBlock *pcwb); + +/* NOTE: Order is important in the following table */ +static pcPattern altArr[] = { + {ALT_LABEL, alt_label, cvt_altpat_label}, + {ALT_COMMENT, alt_comment,cvt_altpat_comment}, + {ALT_MNEM4a, alt_mnem4a, cvt_altpat_mnem4a}, + {ALT_MNEM4, alt_mnem4, cvt_altpat_mnem4}, + {ALT_MNEM3, alt_mnem3, cvt_altpat_mnem3}, + {ALT_MNEM2B, alt_mnem2b, cvt_altpat_mnem2b}, + {ALT_MNEM2A, alt_mnem2a, cvt_altpat_mnem2a}, + {ALT_MNEM2, alt_mnem2, cvt_altpat_mnem2}, + {ALT_MNEM1B, alt_mnem1b, cvt_altpat_mnem1b}, + {ALT_MNEM1A, alt_mnem1a, cvt_altpat_mnem1a}, + {ALT_MNEM1, alt_mnem1, cvt_altpat_mnem1}, + {ALT_MNEM0A, alt_mnem0a, cvt_altpat_mnem0a}, + {ALT_MNEM0, alt_mnem0, cvt_altpat_mnem0}, + +}; + +#define ALTPATTERNS (sizeof(altArr)/sizeof(pcPattern)) + +// forward declarations +static void * DLL_append(_DLL *list, _DLL *next); + +/*-----------------------------------------------------------------*/ +/* cvt_extract_destination - helper function extracts the register */ +/* destination from a parsedPattern. */ +/* */ +/*-----------------------------------------------------------------*/ +static int cvt_extract_destination(parsedPattern *pp) +{ + + if(pp->pct[0].tt == PCT_STRING) { + + // just check first letter for now + + if(toupper((unsigned char)*pp->pct[0].tok.s) == 'F') + return 1; + + } else if (pp->pct[0].tt == PCT_NUMBER) { + + if(pp->pct[0].tok.n) + return 1; + } + + return 0; + +} + +/*-----------------------------------------------------------------*/ +/* pCodeOp *cvt_extract_status(char *reg, char *bit) */ +/* if *reg is the "status" register and *bit is one of the */ +/* status bits, then this function will create a new pCode op */ +/* containing the status register. */ +/*-----------------------------------------------------------------*/ + +static pCodeOp *cvt_extract_status(char *reg, char *bit) +{ + int len; + + if(STRCASECMP(reg, pic16_pc_status.pcop.name)) + return NULL; + + len = strlen(bit); + + if(len == 1) { + // check C,Z + if(toupper((unsigned char)*bit) == 'C') + return PCOP(pic16_popCopyGPR2Bit(&pic16_pc_status,PIC_C_BIT)); + if(toupper((unsigned char)*bit) == 'Z') + return PCOP(pic16_popCopyGPR2Bit(&pic16_pc_status,PIC_Z_BIT)); + } + + // Check DC + if(len ==2 && toupper((unsigned char)bit[0]) == 'D' && toupper((unsigned char)bit[1]) == 'C') + return PCOP(pic16_popCopyGPR2Bit(&pic16_pc_status,PIC_DC_BIT)); + + return NULL; + +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_label - convert assembly line type to a pCode label */ +/* INPUT: pointer to the parsedPattern */ +/* */ +/* pp[0] - label */ +/* */ +/* label pattern => '%' number ':' */ +/* at this point, we wish to extract only the 'number' */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_label(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + + DFPRINTF((stderr,"altpat_label with ID = %d\n",p->pct[1].tok.n)); + return pic16_newpCodeLabel(NULL,-p->pct[1].tok.n); + +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_comment - convert assembly line type to a comment */ +/* INPUT: pointer to the parsedPattern */ +/* */ +/* pp[0] - comment */ +/* */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_comment(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + + DFPRINTF((stderr,"altpat_comment = %s\n",p->pct[0].tok.s)); + return pic16_newpCodeCharP(p->pct[0].tok.s); + +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mem0 - convert assembly line type to a wild pCode */ +/* instruction */ +/* */ +/* pp[0] - str */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem0(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + int opcode; + + pCodeInstruction *pci=NULL; + + DFPRINTF((stderr,"altpat_mnem0 %s\n", p->pct[0].tok.s)); + + opcode = pic16_getpCode(p->pct[0].tok.s,0); + + if(opcode < 0) { + /* look for special command strings like _NOTBITSKIP_ */ + + //fprintf(stderr, "Bad mnemonic\n"); + + opcode = pic16_getpCodePeepCommand(p->pct[0].tok.s); + //if(opcode > 0) + // fprintf(stderr," but valid peep command: %s, key = %d\n",p->pct[0].tok.s,opcode); + return NULL; + } + + pci = PCI(pic16_newpCode(opcode, NULL)); + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + + return pci; +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mem0a - convert assembly line type to a wild pCode */ +/* instruction */ +/* */ +/* pp[0] - wild var */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem0a(void *pp, pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + + DFPRINTF((stderr,"altpat_mnem0a wild mnem # %d\n", p[0].pct[1].tok.n)); + + /* Save the index of the maximum wildcard mnemonic */ + + //if(p[0].pct[1].tok.n > sMaxWildVar) + // sMaxWildMnem = p[0].pct[1].tok.n; + + if(p[0].pct[1].tok.n > pcwb->nwildpCodes) + pcwb->nwildpCodes = p[0].pct[1].tok.n; + + return pic16_newpCodeWild(p[0].pct[1].tok.n,NULL,NULL); + +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mem1 - convert assembly line type to a pCode */ +/* instruction with 1 operand. */ +/* */ +/* pp[0] - mnem */ +/* pp[1] - Operand */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem1(void *pp,pCodeWildBlock *pcwb) +{ + + parsedPattern *p = pp; + int opcode; + + pCodeInstruction *pci=NULL; + pCodeOp *pcosubtype; + + DFPRINTF((stderr,"altpat_mnem1 %s var %s\n", p->pct[0].tok.s,p[1].pct[0].tok.s)); + + opcode = pic16_getpCode(p->pct[0].tok.s,0); + if(opcode < 0) { + //fprintf(stderr, "Bad mnemonic\n"); + opcode = pic16_getpCodePeepCommand(p->pct[0].tok.s); + //if(opcode > 0) + //fprintf(stderr," but valid peep command: %s, key = %d\n",p->pct[0].tok.s,opcode); + + return NULL; + } + + if(pic16Mnemonics[opcode]->isBitInst) + pcosubtype = pic16_newpCodeOp(p[1].pct[0].tok.s,PO_BIT); + else { +// fprintf(stderr, "%s:%d tok.s= %s\n", __FILE__, __LINE__, p[1].pct[0].tok.s); + pcosubtype = pic16_newpCodeOp(p[1].pct[0].tok.s,PO_STR); //GPR_REGISTER); + } + + + pci = PCI(pic16_newpCode(opcode, pcosubtype)); + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + + return pci; +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mem1a - convert assembly line type to a pCode */ +/* instruction with 1 wild operand. */ +/* */ +/* pp[0] - mnem */ +/* pp[1] - wild var */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem1a(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + int opcode; + + pCodeInstruction *pci=NULL; + pCodeOp *pcosubtype; + + DFPRINTF((stderr,"altpat_mnem1a %s var %d\n", p->pct[0].tok.s,p[1].pct[1].tok.n)); + + opcode = pic16_getpCode(p->pct[0].tok.s,0); + if(opcode < 0) { + int cmd_id = pic16_getpCodePeepCommand(p->pct[0].tok.s); + pCode *pc=NULL; + + if(cmd_id<0) { + fprintf(stderr, "Bad mnemonic\n"); + return NULL; + } + + if(p[0].pct[1].tok.n > pcwb->nwildpCodes) + pcwb->nwildpCodes = p[0].pct[1].tok.n; + + pc = pic16_newpCodeWild(p[1].pct[1].tok.n,NULL,NULL); + + switch(cmd_id) { + case NOTBITSKIP: + PCW(pc)->mustNotBeBitSkipInst = 1; + break; + case BITSKIP: + PCW(pc)->mustBeBitSkipInst = 1; + break; + case INVERTBITSKIP: + PCW(pc)->invertBitSkipInst = 1; + } + return pc; + } + + if(pic16Mnemonics[opcode]->isBitInst) + pcosubtype = pic16_newpCodeOpBit(NULL,-1,0, PO_GPR_REGISTER); + else + pcosubtype = pic16_newpCodeOp(NULL,PO_GPR_REGISTER); + + + pci = PCI(pic16_newpCode(opcode, + pic16_newpCodeOpWild(p[1].pct[1].tok.n, pcwb, pcosubtype))); + + /* Save the index of the maximum wildcard variable */ + //if(p[1].pct[1].tok.n > sMaxWildVar) + // sMaxWildVar = p[1].pct[1].tok.n; + + if(p[1].pct[1].tok.n > pcwb->nvars) + pcwb->nvars = p[1].pct[1].tok.n; + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + + return pci; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem1b(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + int opcode; + + pCodeInstruction *pci=NULL; + + DFPRINTF((stderr,"altpat_mnem1b %s var %d\n", p->pct[0].tok.s,p[1].pct[0].tok.n)); + + opcode = pic16_getpCode(p->pct[0].tok.s,0); + if(opcode < 0) { + fprintf(stderr, "Bad mnemonic\n"); + return NULL; + } + + pci = PCI(pic16_newpCode(opcode, pic16_newpCodeOpLit(p[1].pct[0].tok.n) )); + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + + return pci; +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mnem2 */ +/* */ +/* pp[0] - mnem */ +/* pp[1] - var */ +/* pp[2] - comma */ +/* pp[3] - destination */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem2(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + int opcode; + int dest; + + pCodeInstruction *pci=NULL; + pCodeOp *pcosubtype; + + dest = cvt_extract_destination(&p[3]); + + DFPRINTF((stderr,"altpat_mnem2 %s var %s destination %s(%d)\n", + p->pct[0].tok.s, + p[1].pct[0].tok.s, + p[3].pct[0].tok.s, + dest)); + + opcode = pic16_getpCode(p->pct[0].tok.s,dest); + if(opcode < 0) { + fprintf(stderr, "Bad mnemonic\n"); + return NULL; + } + + if(pic16Mnemonics[opcode]->isBitInst) { + pcosubtype = cvt_extract_status(p[1].pct[0].tok.s, p[3].pct[0].tok.s); + if(pcosubtype == NULL) { + fprintf(stderr, "bad operand?\n"); + return NULL; + } + + } else + if(pic16Mnemonics[opcode]->is2MemOp) { + /* support for movff instruction */ + pcosubtype = pic16_popCombine2( + pic16_newpCodeOp(p[1].pct[0].tok.s, PO_GPR_REGISTER), + pic16_newpCodeOp(p[3].pct[0].tok.s, PO_GPR_REGISTER), 0); + } else + pcosubtype = pic16_newpCodeOp(p[1].pct[0].tok.s,PO_GPR_REGISTER); + + + + pci = PCI(pic16_newpCode(opcode,pcosubtype)); + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + return pci; + +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mem2a - convert assembly line type to a pCode */ +/* instruction with 1 wild operand and a */ +/* destination operand (e.g. w or f) */ +/* */ +/* pp[0] - mnem */ +/* pp[1] - wild var */ +/* pp[2] - comma */ +/* pp[3] - destination */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem2a(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + int opcode; + int dest; + + pCodeInstruction *pci=NULL; + pCodeOp *pcosubtype, *pcosubtype2; + + if(!pcwb) { + fprintf(stderr,"ERROR %s:%d - can't assemble line\n",__FILE__,__LINE__); + return NULL; + } + + dest = cvt_extract_destination(&p[3]); + + DFPRINTF((stderr,"altpat_mnem2a %s var %d destination %s(%d)\n", + p->pct[0].tok.s, + p[1].pct[1].tok.n, + p[3].pct[0].tok.s, + dest)); + +#if 0 + fprintf(stderr,"altpat_mnem2a %s var %d destination %s(%d)\n", + p->pct[0].tok.s, + p[1].pct[1].tok.n, + p[3].pct[0].tok.s, + dest); +#endif + + + opcode = pic16_getpCode(p->pct[0].tok.s,dest); + if(opcode < 0) { + fprintf(stderr, "Bad mnemonic\n"); + return NULL; + } + + if(pic16Mnemonics[opcode]->isBitInst) { + pcosubtype = pic16_newpCodeOp(NULL,PO_BIT); + pcosubtype2 = NULL; + } else { +#if 0 + if(pic16Mnemonics[opcode]->is2MemOp) { + /* support for movff instruction */ + pcosubtype = pic16_newpCodeOp(NULL, PO_GPR_REGISTER); + pcosubtype2 = pic16_newpCodeOp(p[3].pct[0].tok.s, PO_STR); + } else { +#endif + pcosubtype = pic16_newpCodeOp(NULL,PO_GPR_REGISTER); pcosubtype2 = NULL; } + + + if(!pcosubtype2) + pci = PCI(pic16_newpCode(opcode, + pic16_newpCodeOpWild(p[1].pct[1].tok.n, pcwb, pcosubtype))); + else + pci = PCI(pic16_newpCode(opcode, + pic16_newpCodeOpWild2(p[1].pct[1].tok.n, p[3].pct[1].tok.n, pcwb, pcosubtype, pcosubtype2))); + + /* Save the index of the maximum wildcard variable */ + //if(p[1].pct[1].tok.n > sMaxWildVar) + // sMaxWildVar = p[1].pct[1].tok.n; + + if(p[1].pct[1].tok.n > pcwb->nvars) + pcwb->nvars = p[1].pct[1].tok.n; + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + return pci; + +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mem2b - convert assembly line type to a pCode */ +/* instruction with 2 wild operands */ +/* */ +/* pp[0] - mnem */ +/* pp[1] - wild var */ +/* pp[2] - comma */ +/* pp[3] - wild var */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem2b(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + int opcode; + int dest; + + pCodeInstruction *pci=NULL; + pCodeOp *pcosubtype, *pcosubtype2; + + if(!pcwb) { + fprintf(stderr,"ERROR %s:%d - can't assemble line\n",__FILE__,__LINE__); + return NULL; + } + + dest = cvt_extract_destination(&p[3]); + + DFPRINTF((stderr,"altpat_mnem2b %s src %d dst (%d)\n", + p->pct[0].tok.s, + p[1].pct[1].tok.n, + p[3].pct[1].tok.n)); + +#if 0 + fprintf(stderr,"altpat_mnem2b %s src: %d dst: %d\n", + p->pct[0].tok.s, + p[1].pct[1].tok.n, + p[3].pct[1].tok.n); +#endif + + opcode = pic16_getpCode(p->pct[0].tok.s,dest); + if(opcode < 0) { + fprintf(stderr, "Bad mnemonic\n"); + return NULL; + } + + if(pic16Mnemonics[opcode]->is2MemOp) { + /* support for movff instruction */ + pcosubtype = pic16_newpCodeOp(NULL, PO_GPR_REGISTER); + pcosubtype2 = pic16_newpCodeOp(NULL, PO_GPR_REGISTER); + } else pcosubtype = pcosubtype2 = NULL; + + pci = PCI(pic16_newpCode(opcode, + pic16_newpCodeOpWild2(p[1].pct[1].tok.n, p[3].pct[1].tok.n, + pcwb, pcosubtype, pcosubtype2))); + + /* Save the index of the maximum wildcard variable */ + //if(p[1].pct[1].tok.n > sMaxWildVar) + // sMaxWildVar = p[1].pct[1].tok.n; + + if(p[1].pct[1].tok.n > pcwb->nvars) + pcwb->nvars = p[1].pct[1].tok.n; + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + return pci; + +} + + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mem3 - convert assembly line type to a pCode */ +/* This rule is for bsf/bcf type instructions */ +/* */ +/* */ +/* pp[0] - mnem */ +/* pp[1] - register */ +/* pp[2] - comma */ +/* pp[3] - number */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem3(void *pp,pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + int opcode; + int dest; // or could be bit position in the register + + pCodeInstruction *pci=NULL; + pCodeOp *pcosubtype=NULL; + + dest = cvt_extract_destination(&p[3]); + + DFPRINTF((stderr,"altpat_mnem3 %s var %s bit (%d)\n", + p->pct[0].tok.s, + p[1].pct[0].tok.s, + p[3].pct[0].tok.n)); + + + opcode = pic16_getpCode(p->pct[0].tok.s,0); + if(opcode < 0) { + fprintf(stderr, "Bad mnemonic\n"); + return NULL; + } + + + if(pic16Mnemonics[opcode]->isBitInst) { + //pcosubtype = cvt_extract_status(p[1].pct[0].tok.s, p[3].pct[0].tok.s); + + //if(pcosubtype == NULL) { + pcosubtype = pic16_newpCodeOpBit(p[1].pct[0].tok.s,p[3].pct[0].tok.n,0, PO_GPR_REGISTER); + //} + } else + pcosubtype = pic16_newpCodeOp(p[1].pct[0].tok.s,PO_GPR_REGISTER); + + if(pcosubtype == NULL) { + fprintf(stderr, "Bad operand\n"); + return NULL; + } + + pci = PCI(pic16_newpCode(opcode, pcosubtype)); + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + return pci; + +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mem4 - convert assembly line type to a pCode */ +/* This rule is for lfsr instruction */ +/* */ +/* */ +/* pp[0] - mnem */ +/* pp[1] - number */ +/* pp[2] - comma */ +/* pp[3] - source */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem4(void *pp, pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + int opcode; + int dest; // or could be bit position in the register + + pCodeInstruction *pci=NULL; + pCodeOp *pcosubtype=NULL; + + dest = cvt_extract_destination(&p[3]); + + DFPRINTF((stderr,"altpat_mnem4 %s fsr %d source %s\n", + p->pct[0].tok.s, + p[1].pct[0].tok.n, + p[3].pct[0].tok.s)); + + opcode = pic16_getpCode(p->pct[0].tok.s,0); + if(opcode < 0) { + fprintf(stderr, "Bad mnemonic\n"); + return NULL; + } + DFPRINTF((stderr, "Found mnemonic opcode= %d\n", opcode)); + + if(pic16Mnemonics[opcode]->is2LitOp) { + pcosubtype = pic16_newpCodeOpLit2(p[1].pct[0].tok.n, pic16_newpCodeOp(p[3].pct[0].tok.s, PO_STR)); + } + + if(pcosubtype == NULL) { + fprintf(stderr, "Bad operand\n"); + return NULL; + } + + pci = PCI(pic16_newpCode(opcode, pcosubtype)); + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + return pci; + +} + +/*-----------------------------------------------------------------*/ +/* cvt_altpat_mem4a - convert assembly line type to a pCode */ +/* This rule is for lfsr instruction */ +/* */ +/* */ +/* pp[0] - mnem */ +/* pp[1] - number */ +/* pp[2] - comma */ +/* pp[3] - value */ +/* */ +/*-----------------------------------------------------------------*/ +static void * cvt_altpat_mnem4a(void *pp, pCodeWildBlock *pcwb) +{ + parsedPattern *p = pp; + int opcode; + int dest; // or could be bit position in the register + + pCodeInstruction *pci=NULL; + pCodeOp *pcosubtype=NULL; + + dest = cvt_extract_destination(&p[3]); + + DFPRINTF((stderr,"altpat_mnem4a %s fsr %d value 0x%02x\n", + p->pct[0].tok.s, + p[1].pct[0].tok.n, + p[3].pct[0].tok.n)); + + opcode = pic16_getpCode(p->pct[0].tok.s,0); + if(opcode < 0) { + fprintf(stderr, "Bad mnemonic\n"); + return NULL; + } + DFPRINTF((stderr, "Found mnemonic opcode= %d\n", opcode)); + + if(pic16Mnemonics[opcode]->is2LitOp) { + pcosubtype = pic16_newpCodeOpLit2(p[1].pct[0].tok.n, pic16_newpCodeOpLit(p[3].pct[0].tok.n)); + } + + if(pcosubtype == NULL) { + fprintf(stderr, "Bad operand\n"); + return NULL; + } + + pci = PCI(pic16_newpCode(opcode, pcosubtype)); + + if(!pci) + fprintf(stderr,"couldn't find mnemonic\n"); + + return pci; + +} + +/*-----------------------------------------------------------------*/ +/* tokenizeLineNode - Convert a string (of char's) that was parsed */ +/* by SDCCpeeph.c into a string of tokens. */ +/* */ +/* */ +/* The tokenizer is of the classic type. When an item is encounterd*/ +/* it is converted into a token. The token is a structure that */ +/* encodes the item's type and it's value (when appropriate). */ +/* */ +/* Accepted token types: */ +/* SPACE NUMBER STRING % : , ; */ +/* */ +/* */ +/* */ +/*-----------------------------------------------------------------*/ + + +static void tokenizeLineNode(char *ln) +{ + char *lnstart=ln; + tokIdx = 0; // Starting off at the beginning + tokArr[0].tt = PCT_NULL; // and assume invalid character for first token. + + if(!ln || !*ln) + return; + +// fprintf(stderr, "%s:%d: processing %s\n", __FILE__, __LINE__, ln); + + while(*ln) { + if(isspace((unsigned char)*ln)) { + // add a SPACE token and eat the extra spaces. + tokArr[tokIdx++].tt = PCT_SPACE; + while (isspace ((unsigned char)*ln)) + ln++; + continue; + } + + if(isdigit((unsigned char)*ln)) { + + tokArr[tokIdx].tt = PCT_NUMBER; + tokArr[tokIdx++].tok.n = strtol(ln, &ln, 0); + + continue; + + } + + switch(*ln) { + case '%': + tokArr[tokIdx++].tt = PCT_PERCENT; + break; + case '<': + tokArr[tokIdx++].tt = PCT_LESSTHAN; + break; + case '>': + tokArr[tokIdx++].tt = PCT_GREATERTHAN; + break; + case ':': + tokArr[tokIdx++].tt = PCT_COLON; + break; + case ';': + tokArr[tokIdx].tok.s = Safe_strdup(ln); + tokArr[tokIdx++].tt = PCT_COMMENT; + tokArr[tokIdx].tt = PCT_NULL; + return; + case ',': + tokArr[tokIdx++].tt = PCT_COMMA; + break; + + + default: // hack to allow : goto $ + if(isalpha((unsigned char)*ln) || (*ln == '_') || (!parsing_peeps && (*ln == '$'))) { + char buffer[50]; + int i=0; + + while( (isalpha((unsigned char)*ln) || isdigit((unsigned char)*ln) || (*ln == '_') || (*ln == '$')) && i<49) + buffer[i++] = *ln++; + + ln--; + buffer[i] = 0; + + tokArr[tokIdx].tok.s = Safe_strdup(buffer); + tokArr[tokIdx++].tt = PCT_STRING; + + } else { + if(parsing_peeps) { + fprintf(stderr, "Error while parsing peep rules (check peeph.def)\n"); + fprintf(stderr, "Line: %s\n",lnstart); + fprintf(stderr, "Token: '%c'\n",*ln); + exit(1); + } + } + } + + /* Advance to next character in input string . + * Note, if none of the tests passed above, then + * we effectively ignore the `bad' character. + * Since the line has already been parsed by SDCCpeeph, + * chance are that there are no invalid characters... */ + + ln++; + + } + + tokArr[tokIdx].tt = 0; +} + + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ + + + +static void dump1Token(pCodeTokens tt) +{ + + switch(tt) { + case PCT_SPACE: + fprintf(stderr, " space "); + break; + case PCT_PERCENT: + fprintf(stderr, " pct %%"); + break; + case PCT_LESSTHAN: + fprintf(stderr, " pct <"); + break; + case PCT_GREATERTHAN: + fprintf(stderr, " pct >"); + break; + case PCT_COLON: + fprintf(stderr, " col :"); + break; + case PCT_COMMA: + fprintf(stderr, " comma , "); + break; + case PCT_COMMENT: + fprintf(stderr, " comment "); + //fprintf(stderr,"%s",tokArr[i].tok.s); + break; + case PCT_STRING: + fprintf(stderr, " str "); + //fprintf(stderr,"%s",tokArr[i].tok.s); + break; + case PCT_NUMBER: + fprintf(stderr, " num "); + //fprintf(stderr,"%d",tokArr[i].tok.n); + break; + case PCT_NULL: + fprintf(stderr, " null "); + + } + +} + + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ + +static int pcComparePattern(pCodeToken *pct, char *pat, int max_tokens) +{ + int i=0; + + if(!pct || !pat || !*pat) + return 0; + + //DFPRINTF((stderr,"comparing against:\n")); + + while(i < max_tokens) { + + if(*pat == 0){ + //DFPRINTF((stderr,"matched\n")); + return (i+1); + } + +// dump1Token(*pat); fputc('\n', stderr); DFPRINTF((stderr,"\n")); + + if(pct->tt != *pat) + return 0; + + + pct++; + pat++; + } + + return 0; + +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ + +static int altComparePattern( char *pct, parsedPattern *pat, int max_tokens) +{ + int i=0; + + if(!pct || !pat || !*pct) + return 0; + + + while(i < max_tokens) { + + if(*pct == 0) { + DFPRINTF((stderr,"matched\n")); + return i; + } + +// dump1Token(*pat); DFPRINTF((stderr,"\n")); + + if( !pat || !pat->pcp ) + return 0; + + if (pat->pcp->pt != *pct) + return 0; + + DFPRINTF((stderr," pct=%d\n",*pct)); + pct++; + pat++; + i++; + } + + return 0; + +} +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ + +static int advTokIdx(int *v, int amt) +{ + + if((unsigned) (*v + amt) > tokIdx) + return 1; + + *v += amt; + return 0; + +} + +/*-----------------------------------------------------------------*/ +/* parseTokens - convert the tokens corresponding to a single line */ +/* of a peep hole assembly into a pCode object. */ +/* */ +/* */ +/* */ +/* */ +/* This is a simple parser that looks for strings of the type */ +/* allowed in the peep hole definition file. Essentially the format*/ +/* is the same as a line of assembly: */ +/* */ +/* label: mnemonic op1, op2, op3 ; comment */ +/* */ +/* Some of these items aren't present. It's the job of the parser */ +/* to determine which are and convert those into the appropriate */ +/* pcode. */ +/*-----------------------------------------------------------------*/ + +static int parseTokens(pCodeWildBlock *pcwb, pCode **pcret) +{ + pCode *pc; + int error = 0; + + if(!tokIdx) + return error; + +#ifdef PCODE_DEBUG + { + unsigned i; + for(i=0; i<=tokIdx; i++) + dump1Token(tokArr[i].tt); + fputc('\n',stderr); + } +#endif + + { + int lparsedPatIdx=0; + int lpcpIdx; + int ltokIdx =0; + int matching = 0; + int j=0; + int k=0; + + char * cPmnem = NULL; // Pointer to non-wild mnemonic (if any) + char * cP1stop = NULL; + char * cP2ndop = NULL; + + //pCodeOp *pcl = NULL; // Storage for a label + //pCodeOp *pco1 = NULL; // 1st operand + //pCodeOp *pco2 = NULL; // 2nd operand + //pCode *pc = NULL; // Mnemonic + + typedef enum { + PS_START, + PS_HAVE_LABEL, + PS_HAVE_MNEM, + PS_HAVE_1OPERAND, + PS_HAVE_COMMA, + PS_HAVE_2OPERANDS + } ParseStates; + + ParseStates state = PS_START; + + do { + + lpcpIdx=0; + matching = 0; + + if( ((tokArr[ltokIdx].tt == PCT_SPACE) ) + && (advTokIdx(<okIdx, 1)) ) // eat space + break; + + do { + j = pcComparePattern(&tokArr[ltokIdx], pcpArr[lpcpIdx].tokens, tokIdx +1); + if( j ) { + + switch(pcpArr[lpcpIdx].pt) { + case PCP_LABEL: + if(state == PS_START){ + DFPRINTF((stderr," label\n")); + state = PS_HAVE_LABEL; + } else + DFPRINTF((stderr," bad state (%d) for label\n",state)); + break; + + case PCP_STR: + DFPRINTF((stderr," %s is",tokArr[ltokIdx].tok.s)); + switch(state) { + case PS_START: + case PS_HAVE_LABEL: + DFPRINTF((stderr," mnem\n")); + cPmnem = tokArr[ltokIdx].tok.s; + state = PS_HAVE_MNEM; + break; + case PS_HAVE_MNEM: + DFPRINTF((stderr," 1st operand\n")); + cP1stop = tokArr[ltokIdx].tok.s; + //pco1 = pic16_newpCodeOp(NULL,PO_GPR_REGISTER); + state = PS_HAVE_1OPERAND; + break; + case PS_HAVE_1OPERAND: + DFPRINTF((stderr," error expecting comma\n")); + break; + case PS_HAVE_COMMA: + DFPRINTF((stderr," 2 operands\n")); + cP2ndop = tokArr[ltokIdx].tok.s; + break; + case PS_HAVE_2OPERANDS: + break; + } + break; + + case PCP_WILDVAR: + switch(state) { + case PS_START: + case PS_HAVE_LABEL: + DFPRINTF((stderr," wild mnem\n")); + state = PS_HAVE_MNEM; + break; + case PS_HAVE_MNEM: + DFPRINTF((stderr," 1st operand is wild\n")); + state = PS_HAVE_1OPERAND; + break; + case PS_HAVE_1OPERAND: + DFPRINTF((stderr," error expecting comma\n")); + break; + case PS_HAVE_COMMA: + DFPRINTF((stderr," 2nd operand is wild\n")); + break; + case PS_HAVE_2OPERANDS: + break; + } + break; + + case PCP_NUMBER: + switch(state) { + case PS_START: + case PS_HAVE_LABEL: + fprintf(stderr," ERROR number\n"); + break; + case PS_HAVE_MNEM: + DFPRINTF((stderr," 1st operand is a number\n")); + state = PS_HAVE_1OPERAND; + break; + case PS_HAVE_1OPERAND: + fprintf(stderr," error expecting comma\n"); + break; + case PS_HAVE_COMMA: + DFPRINTF((stderr," 2nd operand is a number\n")); + break; + case PS_HAVE_2OPERANDS: + break; + } + break; + + case PCP_WILDSTR: + break; + case PCP_COMMA: + if(state == PS_HAVE_1OPERAND){ + DFPRINTF((stderr," got a comma\n")); + state = PS_HAVE_COMMA; + } else + fprintf(stderr," unexpected comma\n"); + break; + + } + + matching = 1; + parsedPatArr[lparsedPatIdx].pcp = &pcpArr[lpcpIdx]; + parsedPatArr[lparsedPatIdx].pct = &tokArr[ltokIdx]; + lparsedPatIdx++; + +// dump1Token(tokArr[ltokIdx].tt); + + if(advTokIdx(<okIdx, strlen(pcpArr[lpcpIdx].tokens) ) ) { + DFPRINTF((stderr," reached end \n")); + matching = 0; + //return; + } + } + + + } while ((++lpcpIdx < PCPATTERNS) && !matching); + + } while (matching); + + parsedPatArr[lparsedPatIdx].pcp = NULL; + parsedPatArr[lparsedPatIdx].pct = NULL; + + j=k=0; + do { + int c; + + if( (c=altComparePattern( altArr[k].tokens, &parsedPatArr[j],10) ) ) { + + if( altArr[k].f) { + pc = altArr[k].f(&parsedPatArr[j],pcwb); + //if(pc && pc->print) + // pc->print(stderr,pc); + //if(pc && pc->destruct) pc->destruct(pc); dumps core? + + //if(curBlock && pc) + //pic16_addpCode2pBlock(curBlock, pc); + if(pc) { + if (pcret) { + *pcret = pc; + return 0; // Only accept one line for now. + } else + pic16_addpCode2pBlock(pcwb->pb, pc); + } else + error++; + } + j += c; + } + k++; + } + while(j<=lparsedPatIdx && kf ) + parsedPatArr[j].pcp->f(&parsedPatArr[j]); + DFPRINTF((stderr," %d",parsedPatArr[j].pcp->pt)); + j++; + } + while(jnext) { + + //DFPRINTF((stderr,"%s\n",ln->line)); +// fprintf(stderr, "peep rule : %s\n", ln->line); + + tokenizeLineNode(ln->line); + + if(parseTokens(pcwb,NULL)) { + int i; + fprintf(stderr,"ERROR assembling line:\n%s\n",ln->line); + fprintf(stderr,"Tokens:\n"); + for(i=0; i<8; i++) + dump1Token(tokArr[i].tt); + fputc('\n',stderr); + exit (1); + } + } +} + +/*-----------------------------------------------------------------*/ +/* pic16_AssembleLine - parse line and return the pCode equivalent */ +/* peeps=1 if parsing peep rules, 0 otherwise */ +/*-----------------------------------------------------------------*/ +pCode *pic16_AssembleLine(char *line, int peeps) +{ + pCode *pc=NULL; + + if(!line || !*line) { + fprintf(stderr,"WARNING returning NULL in AssembleLine\n"); + return NULL; + } + + parsing_peeps = peeps; + + tokenizeLineNode(line); + + if(parseTokens(NULL,&pc)) + fprintf(stderr, "WARNING: unable to assemble line:\n%s\n",line); + else { + DFPRINTF((stderr, "pc= %p\n", pc)); +// if(pc)pc->print(stderr, pc); + } + + parsing_peeps = 1; + return pc; + +} + +/*-----------------------------------------------------------------*/ +/* peepRuleCondition */ +/*-----------------------------------------------------------------*/ +static void peepRuleCondition(char *cond, pCodePeep *pcp) +{ + if(!cond || !pcp) + return; + + //DFPRINTF((stderr,"\nCondition: %s\n",cond)); + /* brute force compares for now */ + + if(STRCASECMP(cond, "NZ") == 0) { + //DFPRINTF((stderr,"found NZ\n")); + pcp->postFalseCond = PCC_Z; + + } + +} + + +static void initpCodeWildBlock(pCodeWildBlock *pcwb) +{ + + // pcwb = Safe_calloc(1,sizeof(pCodeWildBlock)); + + if(!pcwb) + return; + + pcwb->vars = NULL; + pcwb->wildpCodes = NULL; + pcwb->wildpCodeOps = NULL; + + pcwb->nvars = 0; + pcwb->nwildpCodes = 0; + pcwb->nops = 0; + +} + +static void postinit_pCodeWildBlock(pCodeWildBlock *pcwb) +{ + + if(!pcwb) + return; + + pcwb->nvars+=2; + pcwb->nops = pcwb->nvars; + + pcwb->vars = Safe_calloc(pcwb->nvars, sizeof(char *)); + pcwb->wildpCodeOps = Safe_calloc(pcwb->nvars, sizeof(pCodeOp *)); + + pcwb->nwildpCodes+=2; + pcwb->wildpCodes = Safe_calloc(pcwb->nwildpCodes, sizeof(pCode *)); + +} + +static void initpCodePeep(pCodePeep *pcp) +{ + + // pcwb = Safe_calloc(1,sizeof(pCodeWildBlock)); + + if(!pcp) + return; + + initpCodeWildBlock(&pcp->target); + pcp->target.pb = pic16_newpCodeChain(NULL, 'W', NULL); + + initpCodeWildBlock(&pcp->replace); + pcp->replace.pb = pic16_newpCodeChain(NULL, 'W', NULL); + +} + +/*-----------------------------------------------------------------*/ +/* peepRules2pCode - parse the "parsed" peep hole rules to generate*/ +/* pCode. */ +/* */ +/* SDCCpeeph parses the peep rules file and extracts variables, */ +/* removes white space, and checks the syntax. This function */ +/* extends that processing to produce pCode objects. You can kind */ +/* think of this function as an "assembler", though instead of */ +/* taking raw text to produce machine code, it produces pCode. */ +/* */ +/*-----------------------------------------------------------------*/ +extern void pic16initpCodePeepCommands(void); + +void pic16_peepRules2pCode(peepRule *rules) +{ + peepRule *pr; + + pCodePeep *currentRule; + pCodePeepSnippets *pcps; + + pic16initpCodePeepCommands(); + + /* The rules are in a linked-list. Each rule has two portions */ + /* There's the `target' and there's the `replace'. The target */ + /* is compared against the SDCC generated code and if it */ + /* matches, it gets replaced by the `replace' block of code. */ + /* */ + /* Here we loop through each rule and convert the target's and*/ + /* replace's into pCode target and replace blocks */ + + for (pr = rules; pr; pr = pr->next) { + + //DFPRINTF((stderr,"\nRule:\n\n")); + + pcps = Safe_calloc(1,sizeof(pCodePeepSnippets)); + peepSnippets = DLL_append((_DLL*)peepSnippets,(_DLL*)pcps); + + currentRule = pcps->peep = Safe_calloc(1,sizeof(pCodePeep)); + initpCodePeep(currentRule); + + /* Convert the target block */ + peepRuleBlock2pCodeBlock(pr->match, ¤tRule->target); + + //DFPRINTF((stderr,"finished target, here it is in pcode form:\n")); +// pic16_printpBlock(stderr, currentRule->target.pb); + + //DFPRINTF((stderr,"target with labels merged:\n")); + //pic16_pBlockMergeLabels(curBlock); + pic16_pBlockMergeLabels(currentRule->target.pb); + //pic16_printpBlock(stderr, currentRule->replace.pb); + + //#ifdef PCODE_DEBUG + // pic16_printpBlock(stderr, curBlock); + //#endif + //DFPRINTF((stderr,"\nReplaced by:\n")); + + + /* Convert the replace block */ + peepRuleBlock2pCodeBlock(pr->replace, ¤tRule->replace); + + //DFPRINTF((stderr,"finished replace block, here it is in pcode form:\n")); + //pic16_printpBlock(stderr, curBlock); + + //DFPRINTF((stderr,"replace with labels merged:\n")); + + pic16_pBlockMergeLabels(currentRule->replace.pb); + //pic16_printpBlock(stderr, currentRule->replace.pb); + + peepRuleCondition(pr->cond,currentRule); + + /* The rule has been converted to pCode. Now allocate + * space for the wildcards */ + + postinit_pCodeWildBlock(¤tRule->target); + postinit_pCodeWildBlock(¤tRule->replace); + + //return; // debug ... don't want to go through all the rules yet + } + + { + pCodePeep *peepBlock; + _DLL *peeprules; + + peeprules = (_DLL *)peepSnippets; + //fprintf(stderr,"target rules\n"); + while(peeprules) { + //fprintf(stderr," rule:\n"); + peepBlock = ((pCodePeepSnippets*)peeprules)->peep; + //pic16_printpBlock(stderr, peepBlock->target.pb); + peeprules = peeprules->next; + } + //fprintf(stderr," ... done\n"); + } + +} +#if 0 +static void printpCodeString(FILE *of, pCode *pc, int max) +{ + int i=0; + + while(pc && (i++print(of,pc); + pc = pc->next; + } +} +#endif +/*-----------------------------------------------------------------*/ +/* _DLL * DLL_append */ +/* */ +/* Append a _DLL object to the end of a _DLL (doubly linked list) */ +/* If The list to which we want to append is non-existant then one */ +/* is created. Other wise, the end of the list is sought out and */ +/* a new DLL object is appended to it. In either case, the void */ +/* *data is added to the newly created DLL object. */ +/*-----------------------------------------------------------------*/ + +static void * DLL_append(_DLL *list, _DLL *next) +{ + _DLL *b; + + + /* If there's no list, then create one: */ + if(!list) { + next->next = next->prev = NULL; + return next; + } + + + /* Search for the end of the list. */ + b = list; + while(b->next) + b = b->next; + + /* Now append the new DLL object */ + b->next = next; + b->next->prev = b; + b = b->next; + b->next = NULL; + + return list; + +} + + +/*----------------------------------------------------------------- + + pCode peephole optimization + + + The pCode "peep hole" optimization is not too unlike the peep hole + optimization in SDCCpeeph.c. The major difference is that here we + use pCode's whereas there we use ASCII strings. The advantage with + pCode's is that we can ascertain flow information in the instructions + being optimized. + + + - elaborate... + + -----------------------------------------------------------------*/ + + + +/*-----------------------------------------------------------------*/ +/* pCodeSearchCondition - Search a pCode chain for a 'condition' */ +/* */ +/* return conditions */ +/* 1 - The Condition was found for a pCode's input */ +/* 0 - No matching condition was found for the whole chain */ +/* -1 - The Condition was found for a pCode's output */ +/* */ +/*-----------------------------------------------------------------*/ +int pic16_pCodeSearchCondition(pCode *pc, unsigned int cond) +{ + //fprintf(stderr,"Checking conditions %d\n",cond); + while(pc) { + + /* If we reach a function end (presumably an end since we most + probably began the search in the middle of a function), then + the condition was not found. */ + if(pc->type == PC_FUNCTION) + return 0; + + if(pc->type == PC_OPCODE) { + //fprintf(stderr," checking conditions of: "); + //pc->print(stderr,pc); + //fprintf(stderr,"\t\tinCond=%d\toutCond=%d\n",PCI(pc)->inCond,PCI(pc)->outCond); + if(PCI(pc)->inCond & cond) + return 1; + if(PCI(pc)->outCond & cond) + return -1; + } + + pc = pc->next; + } + + return 0; +} + +/*----------------------------------------------------------------- + * int pCodeOpCompare(pCodeOp *pcops, pCodeOp *pcopd) + * + * Compare two pCodeOp's and return 1 if they're the same + *-----------------------------------------------------------------*/ +static int pCodeOpCompare(pCodeOp *pcops, pCodeOp *pcopd) +{ + char b[1024], *n2; + + if(!pcops || !pcopd) + return 0; + +#if 0 + fprintf(stderr,"%s:%d Comparing operands %s", __FILE__, __LINE__, + pic16_get_op( pcops,NULL,0)); + + fprintf(stderr," to %s\n", + pic16_get_op( pcopd,NULL,0)); +#endif + + if(pcops->type != pcopd->type) { + //fprintf(stderr," - fail - diff types\n"); + return 0; // different types + } + + if(pcops->type == PO_LITERAL) { + + if((PCOL(pcops)->lit >= 0) && (PCOL(pcops)->lit == PCOL(pcopd)->lit)) + return 1; + + return 0; + } + + memset(b, 0, sizeof(b) ); //b[0]=0; + pic16_get_op(pcops,b, sizeof(b) ); + + n2 = pic16_get_op(pcopd,NULL,0); + + if( !n2 || strcmp(b,n2)) { +// fprintf(stderr," - fail - diff names: %s, len=%d, %s, len=%d\n",b,strlen(b), n2, strlen(n2) ); + return 0; // different names + } + + switch(pcops->type) { + case PO_DIR: + if( PCOR(pcops)->instance != PCOR(pcopd)->instance) { +// fprintf(stderr, " - fail different instances\n"); + return 0; + } + break; + default: + break; + } + + //fprintf(stderr," - pass\n"); + + return 1; +} + +static int pCodePeepMatchLabels(pCodePeep *peepBlock, pCode *pcs, pCode *pcd) +{ + int labindex; + + /* Check for a label associated with this wild pCode */ + // If the wild card has a label, make sure the source code does too. + if(PCI(pcd)->label) { + pCode *pcl = PCI(pcd)->label->pc; + +#ifdef PCODE_DEBUG + int li = -PCL(pcl)->key; + + if(peepBlock->target.vars[li] == NULL) { + if(PCI(pcs)->label) { + DFPRINTF((stderr,"first time for a label: %d %s\n",li,PCL(PCI(pcs)->label->pc)->label)); + } + } else { + // DFPRINTF((stderr,"label id = %d \n",PCL(PCI(pcd)->label->pc)->key)); + DFPRINTF((stderr," label id: %d %s\n",li,peepBlock->target.vars[li])); + if(PCI(pcs)->label) { + DFPRINTF((stderr," src %s\n",PCL(PCI(pcs)->label->pc)->label)); + } + } +#endif + + + if(!PCI(pcs)->label) + return 0; + + labindex = -PCL(pcl)->key; + if(peepBlock->target.vars[labindex] == NULL) { + // First time to encounter this label + peepBlock->target.vars[labindex] = PCL(PCI(pcs)->label->pc)->label; + DFPRINTF((stderr,"first time for a label: %d %s\n",labindex,PCL(PCI(pcs)->label->pc)->label)); + + } else { + if(strcmp(peepBlock->target.vars[labindex],PCL(PCI(pcs)->label->pc)->label) != 0) { + DFPRINTF((stderr,"labels don't match dest %s != src %s\n",peepBlock->target.vars[labindex],PCL(PCI(pcs)->label->pc)->label)); + return 0; + } + DFPRINTF((stderr,"matched a label %d %s -hey\n",labindex,peepBlock->target.vars[labindex])); + } + } else { + //DFPRINTF((stderr,"destination doesn't have a label\n")); + + if(PCI(pcs)->label) + return 0; + + //DFPRINTF((stderr,"neither src nor dest have labels\n")); + + } + + return 1; + +} + +/*-----------------------------------------------------------------*/ +/* pCodePeepMatchLine - Compare source and destination pCodes to */ +/* see they're the same. */ +/* */ +/* In this context, "source" refers to the coded generated by gen.c*/ +/* and "destination" refers to a pcode in a peep rule. If the dest-*/ +/* ination has no wild cards, then MatchLine will compare the two */ +/* pcodes (src and dest) for a one-to-one match. If the destination*/ +/* has wildcards, then those get expanded. When a wild card is */ +/* encountered for the first time it autmatically is considered a */ +/* match and the object that matches it is referenced in the */ +/* variables or opcodes array (depending on the type of match). */ +/* */ +/* */ +/* Inputs: */ +/* *peepBlock - A pointer to the peepBlock that contains the */ +/* entire rule to which the destination pcode belongs*/ +/* *pcs - a pointer to the source pcode */ +/* *pcd - a pointer to the destination pcode */ +/* */ +/* Returns: */ +/* 1 - pcodes match */ +/* 0 - pcodes don't match */ +/* */ +/* */ +/*-----------------------------------------------------------------*/ + +static int pCodePeepMatchLine(pCodePeep *peepBlock, pCode *pcs, pCode *pcd) +{ + int index; // index into wild card arrays + int havematch=0; + + /* one-for-one match. Here the source and destination opcodes + * are not wild. However, there may be a label or a wild operand */ + + if(pcs) { + if(PCI(pcs)->label) { + DFPRINTF((stderr,"Match line source label: %s\n",PCL(PCI(pcs)->label->pc)->label)); + } + } + + if(pcs->type == pcd->type) { + + if(pcs->type == PC_OPCODE) { + + /* If the opcodes don't match then the line doesn't match */ + if(PCI(pcs)->op != PCI(pcd)->op) + return 0; + +#ifdef PCODE_DEBUG + DFPRINTF((stderr,"%s comparing\n",__FUNCTION__)); + pcs->print(stderr,pcs); + pcd->print(stderr,pcd); +#endif + + if(!pCodePeepMatchLabels(peepBlock, pcs, pcd)) + return 0; + + /* Compare the operands */ + if(PCI(pcd)->pcop) { + /* assert that optimizations do not touch operations that work on SFRs or INDF registers */ + if ((PCI(pcd)->pcop->type == PO_WILD) && (!(PCI(pcs)->pcop) || ((PCI(pcs)->pcop->type != PO_SFR_REGISTER) && (PCI(pcs)->pcop->type != PO_INDF0)))) { + index = PCOW(PCI(pcd)->pcop)->id; + //DFPRINTF((stderr,"destination is wild\n")); +#ifdef DEBUG_PCODEPEEP + if (index > peepBlock->nops) { + DFPRINTF((stderr,"%s - variables exceeded\n",__FUNCTION__)); + exit(1); + } +#endif + + PCOW(PCI(pcd)->pcop)->matched = PCI(pcs)->pcop; + havematch = -1; + if(!peepBlock->target.wildpCodeOps[index]) { + peepBlock->target.wildpCodeOps[index] = PCI(pcs)->pcop; + + //if(PCI(pcs)->pcop->type == PO_GPR_TEMP) + + } else { + /* + pcs->print(stderr,pcs); + pcd->print(stderr,pcd); + + fprintf(stderr, "comparing operands of these instructions, result %d\n", + pCodeOpCompare(PCI(pcs)->pcop, peepBlock->target.wildpCodeOps[index]) + ); + */ + + havematch = pCodeOpCompare(PCI(pcs)->pcop, peepBlock->target.wildpCodeOps[index]); +// return pCodeOpCompare(PCI(pcs)->pcop, peepBlock->target.wildpCodeOps[index]); + } + + if((havematch==-1) && PCI(pcs)->pcop) { + char *n; + + switch(PCI(pcs)->pcop->type) { + case PO_GPR_TEMP: + case PO_FSR0: + //case PO_INDF0: + n = PCOR(PCI(pcs)->pcop)->r->name; + + break; + default: + n = PCI(pcs)->pcop->name; + } + + if(peepBlock->target.vars[index]) + return (strcmp(peepBlock->target.vars[index],n) == 0); + else { + DFPRINTF((stderr,"first time for a variable: %d, %s\n",index,n)); + peepBlock->target.vars[index] = n; + havematch = 1; +// return 1; + } + } + + /* now check whether the second operand matches */ + /* assert that optimizations do not touch operations that work on SFRs or INDF registers */ + if(PCOW2(PCI(pcd)->pcop) && (PCOP2(PCI(pcd)->pcop)->pcopR->type == PO_WILD) && (!(PCOP2(PCI(pcs)->pcop)->pcopR) || ((PCOP2(PCI(pcs)->pcop)->pcopR->type != PO_SFR_REGISTER) && (PCOP2(PCI(pcs)->pcop)->pcopR) && (PCOP2(PCI(pcs)->pcop)->pcopR->type != PO_INDF0)))) { + +// fprintf(stderr, "%s:%d %s second operand is wild\n", __FILE__, __LINE__, __FUNCTION__); + + index = PCOW2(PCI(pcd)->pcop)->id; + //DFPRINTF((stderr,"destination is wild\n")); +#ifdef DEBUG_PCODEPEEP + if (index > peepBlock->nops) { + DFPRINTF((stderr,"%s - variables exceeded\n",__FUNCTION__)); + exit(1); + } +#endif + + PCOW2(PCI(pcd)->pcop)->matched = PCOP2(PCI(pcs)->pcop)->pcopR; + if(!peepBlock->target.wildpCodeOps[index]) { + peepBlock->target.wildpCodeOps[index] = PCOP2(PCI(pcs)->pcop)->pcopR; + + //if(PCI(pcs)->pcop->type == PO_GPR_TEMP) + + } else { + /* + pcs->print(stderr,pcs); + pcd->print(stderr,pcd); + + fprintf(stderr, "comparing operands of these instructions, result %d\n", + pCodeOpCompare(PCI(pcs)->pcop, peepBlock->target.wildpCodeOps[index]) + ); + */ + + return ((havematch==1) && pCodeOpCompare(PCOP2(PCI(pcs)->pcop)->pcopR, + peepBlock->target.wildpCodeOps[index])); + } + + if(PCOP2(PCI(pcs)->pcop)->pcopR) { + char *n; + + switch(PCOP2(PCI(pcs)->pcop)->pcopR->type) { + case PO_GPR_TEMP: + case PO_FSR0: + //case PO_INDF0: + n = PCOR(PCOP2(PCI(pcs)->pcop)->pcopR)->r->name; + break; + default: + n = PCOP2(PCI(pcs)->pcop)->pcopR->name; + } + + if(peepBlock->target.vars[index]) + return (havematch && (strcmp(peepBlock->target.vars[index],n) == 0)); + else { + DFPRINTF((stderr,"first time for a variable: %d, %s\n",index,n)); + peepBlock->target.vars[index] = n; + return (havematch==1); //&& 1; + } + } + + } else if (PCOW2(PCI(pcd)->pcop) && (PCOP2(PCI(pcd)->pcop)->pcopR->type == PO_WILD) && PCOP2(PCI(pcs)->pcop)->pcopR) + { + return 0; + } else { + return havematch; + } +#if 0 + else if (PCI(pcd)->pcop->type == PO_LITERAL) { + return (havematch && + pCodeOpCompare(PCOR2(PCI(pcs)->pcop)->pcop2, PCOR2(PCI(pcd)->pcop)->pcop2)); + + } +#endif + + } else if (PCI(pcd)->pcop->type == PO_LITERAL) { + return pCodeOpCompare(PCI(pcs)->pcop, PCI(pcd)->pcop); + + } + } + + /* FIXME - need an else to check the case when the destination + * isn't a wild card */ + } else + /* The pcd has no operand. Lines match if pcs has no operand either*/ + return (PCI(pcs)->pcop == NULL); + } + + /* Compare a wild instruction to a regular one. */ + + if((pcd->type == PC_WILD) && (pcs->type == PC_OPCODE)) { + + index = PCW(pcd)->id; +#ifdef PCODE_DEBUG + DFPRINTF((stderr,"%s comparing wild cards\n",__FUNCTION__)); + pcs->print(stderr,pcs); + pcd->print(stderr,pcd); +#endif + peepBlock->target.wildpCodes[PCW(pcd)->id] = pcs; + + if(!pCodePeepMatchLabels(peepBlock, pcs, pcd)) { + DFPRINTF((stderr," Failing because labels don't match\n")); + return 0; + } + + if(PCW(pcd)->mustBeBitSkipInst & !(PCI(pcs)->isBitInst && PCI(pcs)->isSkip)) { + // doesn't match because the wild pcode must be a bit skip + DFPRINTF((stderr," Failing match because bit skip is req\n")); + //pcd->print(stderr,pcd); + //pcs->print(stderr,pcs); + return 0; + } + + if(PCW(pcd)->mustNotBeBitSkipInst & (PCI(pcs)->isBitInst && PCI(pcs)->isSkip)) { + // doesn't match because the wild pcode must *not* be a bit skip + DFPRINTF((stderr," Failing match because shouldn't be bit skip\n")); + //pcd->print(stderr,pcd); + //pcs->print(stderr,pcs); + return 0; + } + + if(PCW(pcd)->operand) { + PCOW(PCI(pcd)->pcop)->matched = PCI(pcs)->pcop; + if(peepBlock->target.vars[index]) { + int i = (strcmp(peepBlock->target.vars[index],PCI(pcs)->pcop->name) == 0); +#ifdef PCODE_DEBUG + + if(i) + DFPRINTF((stderr," (matched)\n")); + else { + DFPRINTF((stderr," (no match: wild card operand mismatch\n")); + DFPRINTF((stderr," peepblock= %s, pcodeop= %s\n", + peepBlock->target.vars[index], + PCI(pcs)->pcop->name)); + } +#endif + return i; + } else { + DFPRINTF((stderr," (matched %s\n",PCI(pcs)->pcop->name)); + peepBlock->target.vars[index] = PCI(pcs)->pcop->name; + return 1; + } + } + + pcs = pic16_findNextInstruction(pcs->next); + if(pcs) { + //DFPRINTF((stderr," (next to match)\n")); + //pcs->print(stderr,pcs); + } else if(pcd->next) { + /* oops, we ran out of code, but there's more to the rule */ + return 0; + } + + return 1; /* wild card matches */ + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void pCodePeepClrVars(pCodePeep *pcp) +{ + + int i; + if(!pcp) + return; +/* + DFPRINTF((stderr," Clearing peep rule vars\n")); + DFPRINTF((stderr," %d %d %d %d %d %d\n", + pcp->target.nvars,pcp->target.nops,pcp->target.nwildpCodes, + pcp->replace.nvars,pcp->replace.nops,pcp->replace.nwildpCodes)); +*/ + for(i=0;itarget.nvars; i++) + pcp->target.vars[i] = NULL; + for(i=0;itarget.nops; i++) + pcp->target.wildpCodeOps[i] = NULL; + for(i=0;itarget.nwildpCodes; i++) + pcp->target.wildpCodes[i] = NULL; + + for(i=0;ireplace.nvars; i++) + pcp->replace.vars[i] = NULL; + for(i=0;ireplace.nops; i++) + pcp->replace.wildpCodeOps[i] = NULL; + for(i=0;ireplace.nwildpCodes; i++) + pcp->replace.wildpCodes[i] = NULL; + + + +} + +/*-----------------------------------------------------------------*/ +/* pCodeInsertAfter - splice in the pCode chain starting with pc2 */ +/* into the pCode chain containing pc1 */ +/*-----------------------------------------------------------------*/ +void pic16_pCodeInsertAfter(pCode *pc1, pCode *pc2) +{ + + if(!pc1 || !pc2) + return; + + pc2->next = pc1->next; + if(pc1->next) + pc1->next->prev = pc2; + + pc2->pb = pc1->pb; + pc2->prev = pc1; + pc1->next = pc2; + +} + +/*-----------------------------------------------------------------*/ +/* pic16_pCodeOpCopy - copy a pcode operator */ +/*-----------------------------------------------------------------*/ +pCodeOp *pic16_pCodeOpCopy(pCodeOp *pcop) +{ + pCodeOp *pcopnew=NULL; + + if(!pcop) + return NULL; + + switch(pcop->type) { + case PO_NONE: + case PO_STR: + case PO_REL_ADDR: + pcopnew = Safe_calloc(1, sizeof (pCodeOp)); + memcpy(pcopnew, pcop, sizeof (pCodeOp)); + break; + + case PO_W: + case PO_WREG: + case PO_STATUS: + case PO_BSR: + case PO_FSR0: + case PO_INDF0: + case PO_INTCON: + case PO_GPR_REGISTER: + case PO_GPR_TEMP: + case PO_SFR_REGISTER: + case PO_PCL: + case PO_PCLATH: + case PO_PCLATU: + case PO_PRODL: + case PO_PRODH: + case PO_DIR: + //DFPRINTF((stderr,"pCodeOpCopy GPR register\n")); + /* XXX: might also be pCodeOpReg2 -- that's why the two structs are identical */ + pcopnew = Safe_calloc(1,sizeof(pCodeOpReg) ); + memcpy (pcopnew, pcop, sizeof(pCodeOpReg)); + break; + + case PO_LITERAL: + //DFPRINTF((stderr,"pCodeOpCopy lit\n")); + /* XXX: might also be pCodeOpLit2, that's why the two structs are identical... */ + pcopnew = Safe_calloc(1,sizeof(pCodeOpLit) ); + memcpy (pcopnew, pcop, sizeof(pCodeOpLit)); + break; + + case PO_IMMEDIATE: + pcopnew = Safe_calloc(1,sizeof(pCodeOpImmd) ); + memcpy (pcopnew, pcop, sizeof(pCodeOpImmd)); + break; + + case PO_GPR_BIT: + case PO_CRY: + case PO_BIT: + pcopnew = Safe_calloc(1, sizeof (pCodeOpRegBit)); + memcpy (pcopnew, pcop, sizeof (pCodeOpRegBit)); + break; + + case PO_LABEL: + //DFPRINTF((stderr,"pCodeOpCopy label\n")); + pcopnew = Safe_calloc(1,sizeof(pCodeOpLabel) ); + memcpy (pcopnew, pcop, sizeof (pCodeOpLabel)); + break; + + case PO_WILD: + /* Here we expand the wild card into the appropriate type: */ + /* By recursively calling pCodeOpCopy */ + //DFPRINTF((stderr,"pCodeOpCopy wild\n")); + if(PCOW(pcop)->matched) + pcopnew = pic16_pCodeOpCopy(PCOW(pcop)->matched); + else { + // Probably a label + pcopnew = pic16_pCodeOpCopy(PCOW(pcop)->subtype); + pcopnew->name = Safe_strdup(PCOW(pcop)->pcwb->vars[PCOW(pcop)->id]); + //DFPRINTF((stderr,"copied a wild op named %s\n",pcopnew->name)); + } + return pcopnew; + break; + + case PO_TWO_OPS: + pcopnew = pic16_newpCodeOp2( pic16_pCodeOpCopy( PCOP2(pcop)->pcopL ), + pic16_pCodeOpCopy( PCOP2(pcop)->pcopR ) ); + return pcopnew; + + default: + assert ( !"unhandled pCodeOp type copied" ); + } // switch + + /* strdup pcop->name (prevent access to shared but released memory) */ + if(pcop->name) + pcopnew->name = Safe_strdup(pcop->name); + else + pcopnew->name = NULL; + + return pcopnew; +} + + +/*-----------------------------------------------------------------*/ +/* pCodeCopy - copy a pcode */ +/*-----------------------------------------------------------------*/ +static pCode *pCodeInstructionCopy(pCodeInstruction *pci,int invert) +{ + pCodeInstruction *new_pci; + + if(invert) + new_pci = PCI(pic16_newpCode(pci->inverted_op,pci->pcop)); + else + new_pci = PCI(pic16_newpCode(pci->op,pci->pcop)); + + new_pci->pc.pb = pci->pc.pb; + new_pci->from = pci->from; + new_pci->to = pci->to; + new_pci->label = pci->label; + new_pci->pcflow = pci->pcflow; + + return PCODE(new_pci); +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static void pCodeDeleteChain(pCode *f,pCode *t) +{ + pCode *pc; + + + while(f && f!=t) { + DFPRINTF((stderr,"delete pCode:\n")); + pc = f->next; + //f->print(stderr,f); + //f->delete(f); this dumps core... + + f = pc; + + } + +} +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +int pic16_pCodePeepMatchRule(pCode *pc) +{ + pCodePeep *peepBlock; + pCode *pct, *pcin; + pCodeCSource *pc_cline=NULL; + _DLL *peeprules; + int matched; + pCode *pcr; + + peeprules = (_DLL *)peepSnippets; + + while(peeprules) { + peepBlock = ((pCodePeepSnippets*)peeprules)->peep; + + if(!peepBlock || /*!peepBlock->target ||*/ !peepBlock->target.pb->pcHead) { + fprintf(stderr, "skipping rule because target pb is NULL\n"); + goto next_rule; + } + + pCodePeepClrVars(peepBlock); +/* + pcin = pc; + if(IS_PCCOMMENT(pcin)) + pc = pcin = pic16_findNextInstruction(pcin->next); +*/ + pcin = pc = pic16_findNextInstruction(pc); + + pct = peepBlock->target.pb->pcHead; +#ifdef PCODE_DEBUG + { + pCode *pcr = peepBlock->replace.pb->pcHead; + if(pcr) pct->print(stderr,pcr); + } +#endif + matched = 0; + while(pct && pcin) { + + if(! (matched = pCodePeepMatchLine(peepBlock, pcin,pct))) + break; + + pcin = pic16_findNextInstruction(pcin->next); + pct = pct->next; + //debug: + //DFPRINTF((stderr," matched\n")); + + if(!pcin && pct) { + DFPRINTF((stderr," partial match... no more code\n")); +// fprintf(stderr," partial match... no more code\n"); + matched = 0; + } + if(!pct) { + DFPRINTF((stderr," end of rule\n")); + } + } + + if(matched && pcin) { + + /* So far we matched the rule up to the point of the conditions . + * In other words, all of the opcodes match. Now we need to see + * if the post conditions are satisfied. + * First we check the 'postFalseCond'. This means that we check + * to see if any of the subsequent pCode's in the pCode chain + * following the point just past where we have matched depend on + * the `postFalseCond' as input then we abort the match + */ + DFPRINTF((stderr," matched rule so far, now checking conditions\n")); + //pcin->print(stderr,pcin); + + if (pcin && peepBlock->postFalseCond && + (pic16_pCodeSearchCondition(pcin,peepBlock->postFalseCond) > 0) ) + matched = 0; + +// fprintf(stderr," condition results = %d\n",pic16_pCodeSearchCondition(pcin,peepBlock->postFalseCond)); + + + //if(!matched) fprintf(stderr,"failed on conditions\n"); + } + + if(matched) { + + pCode *pcprev; +// pCode *pcr; + + + /* We matched a rule! Now we have to go through and remove the + inefficient code with the optimized version */ +#ifdef PCODE_DEBUG + DFPRINTF((stderr, "Found a pcode peep match:\nRule:\n")); +// printpCodeString(stderr,peepBlock->target.pb->pcHead,10); + DFPRINTF((stderr,"first thing matched\n")); + pc->print(stderr,pc); + if(pcin) { + DFPRINTF((stderr,"last thing matched\n")); + pcin->print(stderr,pcin); + } +#endif + + + /* Unlink the original code */ + pcprev = pc->prev; + pcprev->next = pcin; + if(pcin) + pcin->prev = pc->prev; + + +#if 1 + { + /* DEBUG */ + /* Converted the deleted pCodes into comments */ + + char buf[1024]; + pCodeCSource *pc_cline2=NULL; + +// buf[0] = ';'; + buf[0] = '#'; + + while(pc && pc!=pcin) { + + if(pc->type == PC_OPCODE && PCI(pc)->cline) { + if(pc_cline) { + pc_cline2->pc.next = PCODE(PCI(pc)->cline); + pc_cline2 = PCCS(pc_cline2->pc.next); + } else { + pc_cline = pc_cline2 = PCI(pc)->cline; + pc_cline->pc.seq = pc->seq; + } + } + + pic16_pCode2str(&buf[1], sizeof( buf )-1, pc); + pic16_pCodeInsertAfter(pcprev, pic16_newpCodeCharP(buf)); + pcprev = pcprev->next; + pc = pc->next; + + } + if(pc_cline2) + pc_cline2->pc.next = NULL; + } +#endif + + if(pcin) + pCodeDeleteChain(pc,pcin); + +// fprintf(stderr, "%s:%d rule matched\n", __FILE__, __LINE__); + + /* Generate the replacement code */ + pc = pcprev; + pcr = peepBlock->replace.pb->pcHead; // This is the replacement code + while (pcr) { + pCodeOp *pcop=NULL; + + /* If the replace pcode is an instruction with an operand, */ + /* then duplicate the operand (and expand wild cards in the process). */ + if(pcr->type == PC_OPCODE) { + if(PCI(pcr)->pcop) { + /* The replacing instruction has an operand. + * Is it wild? */ + if(PCI(pcr)->pcop->type == PO_WILD) { + int index = PCOW(PCI(pcr)->pcop)->id; +// fprintf(stderr, "%s:%d replacing index= %d\n", __FUNCTION__, __LINE__, index); + //DFPRINTF((stderr,"copying wildopcode\n")); + if(peepBlock->target.wildpCodeOps[index]) + pcop = pic16_pCodeOpCopy(peepBlock->target.wildpCodeOps[index]); + else + DFPRINTF((stderr,"error, wildopcode in replace but not source?\n")); + } else + pcop = pic16_pCodeOpCopy(PCI(pcr)->pcop); + } + + if(PCI(pcr)->is2MemOp && PCOP2(PCI(pcr)->pcop)->pcopR) { + /* The replacing instruction has also a second operand. + * Is it wild? */ +// fprintf(stderr, "%s:%d pcop2= %p\n", __FILE__, __LINE__, PCOR2(PCI(pcr)->pcop)->pcop2); + if(PCOP2(PCI(pcr)->pcop)->pcopR->type == PO_WILD) { + int index = PCOW2(PCI(pcr)->pcop)->id; +// fprintf(stderr, "%s:%d replacing index= %d\n", __FUNCTION__, __LINE__, index); + //DFPRINTF((stderr,"copying wildopcode\n")); + if(peepBlock->target.wildpCodeOps[index]) + pcop = pic16_popCombine2(pic16_pCodeOpCopy(pcop), + pic16_pCodeOpCopy(peepBlock->target.wildpCodeOps[index]), 0); + else + DFPRINTF((stderr,"error, wildopcode in replace but not source?\n")); + } else + pcop = pic16_popCombine2(pic16_pCodeOpCopy(pcop), + pic16_pCodeOpCopy(PCOP2(PCI(pcr)->pcop)->pcopR), 0); + + } + + //DFPRINTF((stderr,"inserting pCode\n")); + pic16_pCodeInsertAfter(pc, pic16_newpCode(PCI(pcr)->op,pcop)); + } else if (pcr->type == PC_WILD) { + if(PCW(pcr)->invertBitSkipInst) + DFPRINTF((stderr,"We need to invert the bit skip instruction\n")); + pic16_pCodeInsertAfter(pc, + pCodeInstructionCopy(PCI(peepBlock->target.wildpCodes[PCW(pcr)->id]), + PCW(pcr)->invertBitSkipInst)); + } else if (pcr->type == PC_COMMENT) { + pic16_pCodeInsertAfter(pc, pic16_newpCodeCharP( ((pCodeComment *)(pcr))->comment)); + } + + + pc = pc->next; +#ifdef PCODE_DEBUG + DFPRINTF((stderr," NEW Code:")); + if(pc) pc->print(stderr,pc); +#endif + pcr = pcr->next; + } + + /* We have just replaced the inefficient code with the rule. + * Now, we need to re-add the C-source symbols if there are any */ + pc = pcprev; + while(pc_cline ) { + + pc = pic16_findNextInstruction(pc->next); + PCI(pc)->cline = pc_cline; + pc_cline = PCCS(pc_cline->pc.next); + + } + + return 1; + } + next_rule: + peeprules = peeprules->next; + } + DFPRINTF((stderr," no rule matched\n")); + + return 0; +} diff --git a/src/pic16/pcoderegs.c b/src/pic16/pcoderegs.c new file mode 100644 index 0000000..1de9fbe --- /dev/null +++ b/src/pic16/pcoderegs.c @@ -0,0 +1,1013 @@ +/*------------------------------------------------------------------------- + + pcoderegs.c - post code generation register optimizations + + Written By - Scott Dattalo scott@dattalo.com + Ported To PIC16 By - m.dubuc@rogers.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +-------------------------------------------------------------------------*/ + +/* + pcoderegs.c + + The purpose of the code in this file is to optimize the register usage. + +*/ +#include + +#include "common.h" // Include everything in the SDCC src directory +#include "newalloc.h" +#include "ralloc.h" +#include "device.h" +#include "pcode.h" +#include "pcoderegs.h" +#include "pcodeflow.h" + + +#define DEBUG_REMOVE1PCODE 0 +#define HAVE_DBGREGUSAGE 0 + + +extern void pic16_pCodeInsertAfter(pCode *pc1, pCode *pc2); +extern pCode * pic16_findPrevInstruction(pCode *pci); +extern pBranch * pic16_pBranchAppend(pBranch *h, pBranch *n); +void pic16_unlinkpCode(pCode *pc); +extern int pic16_pCodeSearchCondition(pCode *pc, unsigned int cond); + +static int total_registers_saved=0; +static int register_optimization=1; + +/*-----------------------------------------------------------------* + * void AddRegToFlow(regs *reg, pCodeFlow *pcfl) + *-----------------------------------------------------------------*/ +/* +void AddRegToFlow(regs *reg, pCodeFlow *pcfl) +{ + + if(!reg || ! pcfl || !isPCFL(pcflow)) + return; + + if(!pcfl->registers) + pcfl->registers = newSet(); + +} +*/ + + +/*-----------------------------------------------------------------* + * + *-----------------------------------------------------------------*/ + +#if HAVE_DBGREGUSAGE +static void dbg_regusage(set *fregs) +{ + regs *reg; + pCode *pcfl; + pCode *pc; + + + for (reg = setFirstItem(fregs) ; reg ; + reg = setNextItem(fregs)) { + + if(elementsInSet(reg->reglives.usedpCodes)) { + + fprintf (stderr, "%s addr=0x%03x rIdx=0x%03x", + reg->name, + reg->address, + reg->rIdx); + + pcfl = setFirstItem(reg->reglives.usedpFlows); + if(pcfl) + fprintf(stderr, "\n used in seq"); + + while(pcfl) { + fprintf(stderr," 0x%03x",pcfl->seq); + pcfl = setNextItem(reg->reglives.usedpFlows); + } + + pcfl = setFirstItem(reg->reglives.assignedpFlows); + if(pcfl) + fprintf(stderr, "\n assigned in seq"); + + while(pcfl) { + fprintf(stderr," 0x%03x",pcfl->seq); + pcfl = setNextItem(reg->reglives.assignedpFlows); + } + + pc = setFirstItem(reg->reglives.usedpCodes); + if(pc) + fprintf(stderr, "\n used in instructions "); + + while(pc) { + pcfl = PCODE(PCI(pc)->pcflow); + if(pcfl) + fprintf(stderr," 0x%03x:",pcfl->seq); + fprintf(stderr,"0x%03x",pc->seq); + + pc = setNextItem(reg->reglives.usedpCodes); + } + + fprintf(stderr, "\n"); + } + } +} + +/*-----------------------------------------------------------------* + * + *-----------------------------------------------------------------*/ + +//static +void dbg_dumpregusage(void) +{ + + fprintf(stderr,"*** Register Usage ***\n"); + fprintf(stderr,"InternalRegs:\n"); + dbg_regusage(pic16_dynInternalRegs); + fprintf(stderr,"AllocRegs:\n"); + dbg_regusage(pic16_dynAllocRegs); + fprintf(stderr,"StackRegs:\n"); + dbg_regusage(pic16_dynStackRegs); + fprintf(stderr,"DirectRegs:\n"); + dbg_regusage(pic16_dynDirectRegs); + fprintf(stderr,"DirectBitRegs:\n"); + dbg_regusage(pic16_dynDirectBitRegs); + fprintf(stderr,"ProcessorRegs:\n"); + dbg_regusage(pic16_dynProcessorRegs); + +} +#endif + +/*-----------------------------------------------------------------* + * void pCodeRegMapLiveRangesInFlow(pCodeFlow *pcfl) + *-----------------------------------------------------------------*/ +static void pCodeRegMapLiveRangesInFlow(pCodeFlow *pcfl) +{ + + pCode *pc=NULL; + pCode *pcprev=NULL; + + regs *reg; + + if(!pcfl) + return; + + + pc = pic16_findNextInstruction(pcfl->pc.next); + + while(pic16_isPCinFlow(pc,PCODE(pcfl))) { + + + reg = pic16_getRegFromInstruction(pc); + + if(reg && (reg->type != REG_TMP)) { + +#if 0 + fprintf(stderr, "reg= %p\n", reg); + fprintf(stderr, "flow seq %d, inst seq %d %s ",PCODE(pcfl)->seq,pc->seq,reg->name); + fprintf(stderr, "addr = 0x%03x, type = %d rIdx=0x%03x ", + reg->address,reg->type,reg->rIdx); + fprintf(stderr, "command = %s\n", PCI(pc)->mnemonic); + +#endif + +// fprintf(stderr, "%s:%d: trying to get first operand from pCode reg= %s\n", __FILE__, __LINE__, reg->name); + addSetIfnotP(& (PCFL(pcfl)->registers), reg); + + if((PCC_REGISTER | PCC_LITERAL) & PCI(pc)->inCond) + addSetIfnotP(& (reg->reglives.usedpFlows), pcfl); + + if(PCC_REGISTER & PCI(pc)->outCond) + addSetIfnotP(& (reg->reglives.assignedpFlows), pcfl); + + addSetIfnotP(& (reg->reglives.usedpCodes), pc); + +// reg->wasUsed=1; + +#if 1 + /* check to see if this pCode has 2 memory operands, + and set up the second operand too */ + if(PCI(pc)->is2MemOp) { + reg = pic16_getRegFromInstruction2(pc); + if(reg) { +// fprintf(stderr, "%s:%d: trying to get second operand from pCode reg= %s\n", __FILE__, __LINE__, reg->name); + addSetIfnotP(& (PCFL(pcfl)->registers), reg); + + if((PCC_REGISTER | PCC_LITERAL) & PCI(pc)->inCond) + addSetIfnotP(& (reg->reglives.usedpFlows), pcfl); + + if((PCC_REGISTER | PCC_REGISTER2) & PCI(pc)->outCond) + addSetIfnotP(& (reg->reglives.assignedpFlows), pcfl); + + addSetIfnotP(& (reg->reglives.usedpCodes), pc); + +// reg->wasUsed=1; + } + } +#endif + + } + + + pcprev = pc; + pc = pic16_findNextInstruction(pc->next); + + } + +} + +/*-----------------------------------------------------------------* + * void pic16_pCodeRegMapLiveRanges(pBlock *pb) + *-----------------------------------------------------------------*/ +void pic16_pCodeRegMapLiveRanges(pBlock *pb) +{ + pCode *pcflow; + + for( pcflow = pic16_findNextpCode(pb->pcHead, PC_FLOW); + pcflow != NULL; + pcflow = pic16_findNextpCode(pcflow->next, PC_FLOW) ) { + + if(!isPCFL(pcflow)) { + fprintf(stderr, "pCodeRegMapLiveRanges - pcflow is not a flow object "); + continue; + } + pCodeRegMapLiveRangesInFlow(PCFL(pcflow)); + } + +#if 0 + for( pcflow = pic16_findNextpCode(pb->pcHead, PC_FLOW); + pcflow != NULL; + pcflow = pic16_findNextpCode(pcflow->next, PC_FLOW) ) { + + regs *r = setFirstItem(PCFL(pcflow)->registers); + fprintf(stderr,"flow seq %d\n", pcflow->seq); + + while (r) { + fprintf(stderr, " %s\n",r->name); + r = setNextItem(PCFL(pcflow)->registers); + + } + + } +#endif + +#if HAVE_DBGREGUSAGE + dbg_dumpregusage(); +#endif + +} + + +/*-----------------------------------------------------------------* + * + *-----------------------------------------------------------------*/ +static void Remove1pcode(pCode *pc, regs *reg) +{ + pCode *pcn=NULL; + + if(!reg || !pc) + return; + + deleteSetItem (&(reg->reglives.usedpCodes),pc); + +#if DEBUG_REMOVE1PCODE + fprintf(stderr,"removing instruction:\n"); + pc->print(stderr,pc); +#endif + + if(PCI(pc)->label) { + pcn = pic16_findNextInstruction(pc->next); + + if(pcn) + PCI(pcn)->label = pic16_pBranchAppend(PCI(pcn)->label,PCI(pc)->label); + } + + if(PCI(pc)->cline) { + if(!pcn) + pcn = pic16_findNextInstruction(pc->next); + + if(pcn) { + if(PCI(pcn)->cline) { + +#if DEBUG_REMOVE1PCODE + fprintf(stderr, "source line has been optimized completely out\n"); + pc->print(stderr,pc); +#endif + + } else { + PCI(pcn)->cline = PCI(pc)->cline; + } + } + } + + pc->destruct(pc); + +} + +/*-----------------------------------------------------------------* + * void RemoveRegsFromSet(set *regset) + * + *-----------------------------------------------------------------*/ +static void RemoveRegsFromSet(set *regset) +{ + regs *reg; + int used; + + while(regset) { + reg = regset->item; + regset = regset->next; + + used = elementsInSet(reg->reglives.usedpCodes); + + if(used <= 1) { + +// fprintf(stderr," reg %s isfree=%d, wasused=%d\n",reg->name,reg->isFree,reg->wasUsed); + + if(used == 0) { + +// fprintf(stderr,"%s:%d: getting rid of reg %s\n",__FILE__, __LINE__, reg->name); + + reg->isFree = 1; + reg->wasUsed = 0; + } else { + pCode *pc; + + + pc = setFirstItem(reg->reglives.usedpCodes); + + if(reg->type == REG_SFR) { + fprintf(stderr, "not removing SFR reg %s even though used only once\n", reg->name); + continue; + } + + if(isPCI(pc)) { + if(PCI(pc)->label) { + pCode *pcn = pic16_findNextInstruction(pc->next); + + if(pcn && PCI(pcn)->label) { + //fprintf(stderr,"can't delete instruction with label...\n"); + //pc->print(stderr,pc); + continue; + } + /* Move the label to the next instruction */ + + PCI(pcn)->label = PCI(pc)->label; + + } + + if(isPCI_SKIP(pc)) { + regs *r = pic16_getRegFromInstruction(pc); + fprintf(stderr, "WARNING, a skip instruction is being optimized out\n"); + pc->print(stderr,pc); + fprintf(stderr,"reg %s, type =%d\n",r->name, r->type); + } + + Remove1pcode(pc, reg); + /* + pic16_unlinkpCode(pc); + deleteSetItem (&(reg->reglives.usedpCodes),pc); + */ + reg->isFree = 1; + reg->wasUsed = 0; + total_registers_saved++; // debugging stats. + } + } + } + + } +} +/*-----------------------------------------------------------------* + * void pic16_RemoveUnusedRegisters(void) + * + *-----------------------------------------------------------------*/ +void pic16_RemoveUnusedRegisters(void) +{ + /* First, get rid of registers that are used only one time */ + + //RemoveRegsFromSet(pic16_dynInternalRegs); + RemoveRegsFromSet(pic16_dynAllocRegs); + RemoveRegsFromSet(pic16_dynStackRegs); + /* + don't do DirectRegs yet - there's a problem with arrays + RemoveRegsFromSet(pic16_dynDirectRegs); + */ + RemoveRegsFromSet(pic16_dynDirectBitRegs); + + if(total_registers_saved && pic16_pcode_verbose) + fprintf(stderr, " *** Saved %d registers ***\n", total_registers_saved); +} + +static int insideLRBlock(pCode *pc) +{ + pCode *pc1; + int t1=-1, t2=-1; + + pc1 = pc->prev; + while(pc1) { + if(isPCINFO(pc1) && (PCINF(pc1)->type == INF_LOCALREGS)) { + t1 = PCOLR (PCINF (pc1)->oper1)->type; + break; + } + pc1 = pc1->prev; + } + + pc1 = pc->next; + while(pc1) { + if(isPCINFO(pc1) && (PCINF(pc1)->type == INF_LOCALREGS)) { + t2 = PCOLR (PCINF (pc1)->oper1)->type; + break; + } + pc1 = pc1->next; + } + + if((t1 == LR_ENTRY_BEGIN && t2 == LR_ENTRY_END) + || (t1 == LR_EXIT_BEGIN && t2 == LR_EXIT_END)) + return 1; + + return 0; +} + + +static void RemoveRegFromLRBlock(regs *reg) +{ + if(elementsInSet(reg->reglives.usedpCodes) == 2) { + pCode *pc1; + + /* only continue if there are just 2 uses of the register, + * in in the local *entry* block and one in the local *exit* block */ + + /* search for entry block */ + pc1 = indexSet(reg->reglives.usedpCodes, 1); + + if(insideLRBlock( pc1 )) { + fprintf(stderr, "usedpCodes[0] inside LR block\n"); + deleteSetItem(&pc1->pb->tregisters, PCOR(PCI(pc1)->pcop)->r); + Remove1pcode(pc1, reg); + } + + pc1 = indexSet(reg->reglives.usedpCodes, 0); + if(insideLRBlock( pc1 )) { + fprintf(stderr, "usedpCodes[1] inside LR block\n"); + deleteSetItem(&pc1->pb->tregisters, PCOR(PCI(pc1)->pcop)->r); + Remove1pcode(pc1, reg); + } + + /* remove r0x00 */ + reg->isFree = 1; + reg->wasUsed = 0; + } +} + + + +/*-----------------------------------------------------------------* + * + *-----------------------------------------------------------------*/ +static void Remove2pcodes(pCode *pcflow, pCode *pc1, pCode *pc2, regs *reg, int can_free) +{ + if(!reg) + return; + +#if 0 + fprintf(stderr,"removing 2 instructions:\n"); + pc1->print(stderr,pc1); + pc2->print(stderr,pc2); +#endif + + if(pc1) + Remove1pcode(pc1, reg); + + if(pc2) { + Remove1pcode(pc2, reg); + deleteSetItem (&(PCFL(pcflow)->registers), reg); + + if(can_free) { + reg->isFree = 1; + reg->wasUsed = 0; + } + + } + + pCodeRegMapLiveRangesInFlow(PCFL(pcflow)); + +#if 1 +// fprintf(stderr, "register %s is used in %d pCodes, assigned in %d pCodes\n", reg->name, +// elementsInSet(reg->reglives.usedpCodes), +// elementsInSet(reg->reglives.assignedpFlows)); + + RemoveRegFromLRBlock(reg); +#endif + +} + +/*-----------------------------------------------------------------* + * + *-----------------------------------------------------------------*/ +static int regUsedinRange(pCode *pc1, pCode *pc2, regs *reg) +{ + int i=0; + regs *testreg; + + do { + testreg = pic16_getRegFromInstruction(pc1); + if(testreg && (testreg->rIdx == reg->rIdx)) { + return 1; + } + + if(PCI(pc1)->is2MemOp) { + testreg = pic16_getRegFromInstruction2(pc1); + if(testreg && (testreg->rIdx == reg->rIdx)) { + return 1; + } + } + + pc1 = pic16_findNextInstruction(pc1->next); + + } while (pc1 && (pc1 != pc2) && (i++ < 100)) ; + + if(i >= 100) + fprintf(stderr, "warning, regUsedinRange searched through too many pcodes\n"); + + return 0; +} + +/*-----------------------------------------------------------------* + * void pCodeOptime2pCodes(pCode *pc1, pCode *pc2) + * + * ADHOC pattern checking + * Now look for specific sequences that are easy to optimize. + * Many of these sequences are characteristic of the compiler + * (i.e. it'd probably be a waste of time to apply these adhoc + * checks to hand written assembly.) + * + * + *-----------------------------------------------------------------*/ +static int pCodeOptime2pCodes(pCode *pc1, pCode *pc2, pCode *pcfl_used, regs *reg, int can_free, int optimize_level) +{ + pCode *pct1, *pct2; + regs *reg1, *reg2; + + int t = total_registers_saved; + + if(reg->type == REG_SFR)return 0; + + if(pc2->seq < pc1->seq) { + pct1 = pc2; + pc2 = pc1; + pc1 = pct1; + } +/* + fprintf(stderr,"pCodeOptime2pCodes\n"); + pc1->print(stderr,pc1); + pc2->print(stderr,pc2); +*/ + if((PCI(pc1)->op == POC_CLRF) && (PCI(pc2)->op == POC_MOVFW) ){ + + /* + clrf reg + stuff... + movf reg,w + + can be replaced with + + stuff... + movlw 0 + */ + + pCode *newpc; + //fprintf(stderr, " CLRF/MOVFW. instruction after MOVFW is:\n"); + pct1 = pic16_findNextInstruction(pc2->next); + + if(PCI(pct1)->op == POC_MOVWF) { + newpc = pic16_newpCode(POC_CLRF, PCI(pct1)->pcop); + pct1->destruct(pct1); + } else { + newpc = pic16_newpCode(POC_MOVLW, pic16_newpCodeOpLit(0)); + } + + pic16_pCodeInsertAfter(pc2, newpc); + PCI(newpc)->pcflow = PCFL(pcfl_used); + newpc->seq = pc2->seq; + + /* take care if register is used after pc2, if yes, then don't delete + * clrf reg, because, reg should be initialized with zero */ + { + pCode *spc; + int maxSeq=0; + + for(spc=setFirstItem(reg->reglives.usedpCodes);spc;spc=setNextItem(reg->reglives.usedpCodes)) { + if(maxSeq < spc->seq)maxSeq = spc->seq; + } + +// fprintf(stderr, "pc1->seq = %d\tpc2->seq = %d\tspc->seq = %d\n", pc1->seq, pc2->seq, maxSeq); + + if(maxSeq > pc2->seq) { + /* this means that a pCode uses register after pc2, then + * we can't delete pc1 pCode */ + Remove2pcodes(pcfl_used, NULL, pc2, reg, can_free); + } else { + /* we can remove both pCodes */ + Remove2pcodes(pcfl_used, pc1, pc2, reg, can_free); + } + } + total_registers_saved++; // debugging stats. + + } else if((PCI(pc1)->op == POC_CLRF) && (PCI(pc2)->op == POC_IORFW) ){ + //fprintf(stderr, " CLRF/IORFW.\n"); + + pct2 = pic16_findNextInstruction(pc2->next); + + if(pic16_pCodeSearchCondition(pct2, PCC_Z) > 0) { + pct2 = pic16_newpCode(POC_IORLW, pic16_newpCodeOpLit(0)); + pct2->seq = pc2->seq; + PCI(pct2)->pcflow = PCFL(pcfl_used); + pic16_pCodeInsertAfter(pc1,pct2); + } + Remove2pcodes(pcfl_used, pc1, pc2, reg, can_free); + total_registers_saved++; // debugging stats. + + } else if(PCI(pc1)->op == POC_MOVWF) { + + reg1 = pic16_getRegFromInstruction(pc1); + + if(reg1->type == REG_SFR)return (total_registers_saved != t); + + pct2 = pic16_findNextInstruction(pc2->next); + + if(PCI(pc2)->op == POC_MOVFW) { + +#if 0 + fprintf(stderr, " MOVWF/MOVFW. instruction after MOVFW is:\n"); + pct2->print(stderr,pct2); +#endif + + if(PCI(pct2)->op == POC_MOVWF) { + /* + Change: + + movwf reg + + stuff... + + movf reg,w + movwf reg2 + + To: + + + */ + reg2 = pic16_getRegFromInstruction(pct2); + if(reg2 && !regUsedinRange(pc1,pc2,reg2) && (reg2->type != REG_SFR)) { +// if(reg2 && !regUsedinRange(pc1,pc2,reg2)) + + if(pic16_pCodeSearchCondition(pct2, PCC_Z) < 1) { + pCode *pct3 = pic16_findNextInstruction(pct2->next); + pct2->seq = pc1->seq; + pic16_unlinkpCode(pct2); + pic16_pCodeInsertAfter(pic16_findPrevInstruction(pc1->prev),pct2); + +#define usesW(x) ((x) && (isPCI(x)) && ( (PCI(x)->inCond & PCC_W) != 0)) + + if(usesW(pct3)) + ; // Remove2pcodes(pcfl_used, pc1, NULL, reg, can_free); + else { + Remove2pcodes(pcfl_used, pc1, pc2, reg, can_free); + total_registers_saved++; // debugging stats. + return 1; + } + } else { +// fprintf(stderr,"didn't optimize because Z bit is used\n"); + } + } +#if 0 + fprintf(stderr, " couldn't optimize\n"); + if(reg2) + fprintf(stderr, " %s is used in range\n", reg2->name); + else + fprintf(stderr, " reg2 is NULL\n"); +#endif + } + } + + pct1 = pic16_findPrevInstruction(pc1->prev); + if(pct1 && (PCI(pct1)->pcflow == PCI(pc1)->pcflow)) { + + if ( (PCI(pct1)->op == POC_MOVFW) && + (PCI(pc2)->op == POC_MOVFW)) { + + reg1 = pic16_getRegFromInstruction(pct1); + if(reg1 && !regUsedinRange(pc1,pc2,reg1)) { + +#if 0 + fprintf(stderr, " MOVF/MOVFW. \n"); + fprintf(stderr, " ...optimizing\n"); +#endif + + /* + Change: + + movf reg1,w + movwf reg + + stuff... + movf reg,w + + To: + + stuff... + + movf reg1,w + + Or, if we're not deleting the register then the "To" is: + + stuff... + + movf reg1,w + movwf reg + + + */ + pct2 = pic16_newpCode(PCI(pc2)->op, PCI(pct1)->pcop); + pic16_pCodeInsertAfter(pc2, pct2); + PCI(pct2)->pcflow = PCFL(pcfl_used); + pct2->seq = pc2->seq; + + if(can_free) { + Remove2pcodes(pcfl_used, pc1, pc2, reg, can_free); + } else { + /* If we're not freeing the register then that means (probably) + * the register is needed somewhere else.*/ + pic16_unlinkpCode(pc1); + pic16_pCodeInsertAfter(pct2, pc1); + + Remove2pcodes(pcfl_used, pc2, NULL, reg, can_free); + } + + Remove2pcodes(pcfl_used, pct1, NULL, reg1, 0); + total_registers_saved++; // debugging stats. + + } + } else if ( (PCI(pct1)->op == POC_MOVWF) && + (PCI(pc2)->op == POC_MOVFW)) { + +// fprintf(stderr,"movwf MOVWF/MOVFW\n"); + + if(optimize_level > 1 && can_free) { + pct2 = pic16_newpCode(POC_MOVFW, PCI(pc1)->pcop); + pic16_pCodeInsertAfter(pc2, pct2); + Remove2pcodes(pcfl_used, pc1, pc2, reg, 1); + total_registers_saved++; // debugging stats. + } + } + + + } + + } + + return (total_registers_saved != t); +} + +/*-----------------------------------------------------------------* + * void pCodeRegOptimeRegUsage(pBlock *pb) + *-----------------------------------------------------------------*/ +static void OptimizeRegUsage(set *fregs, int optimize_multi_uses, int optimize_level) +{ + regs *reg; + int used; + pCode *pc1=NULL, *pc2=NULL; + + + while(fregs) { + pCode *pcfl_used, *pcfl_assigned; + + /* Step through the set by directly accessing the 'next' pointer. + * We could also step through by using the set API, but the + * the (debug) calls to print instructions affect the state + * of the set pointers */ + + reg = fregs->item; + fregs = fregs->next; + + if(reg->type == REG_SFR) { +// fprintf(stderr,"skipping SFR: %s\n",reg->name); + continue; + } + + pcfl_used = setFirstItem(reg->reglives.usedpFlows); + pcfl_assigned = setFirstItem(reg->reglives.assignedpFlows); + + used = elementsInSet(reg->reglives.usedpCodes); +// fprintf(stderr, "%s:%d register %s used %d times in pCode\n", __FILE__, __LINE__, reg->name, used); + if(used == 2) { + + /* + * In this section, all registers that are used in only in two + * instructions are examined. If possible, they're optimized out. + */ + +#if 0 + fprintf (stderr, "OptimizeRegUsage: %s addr=0x%03x rIdx=0x%03x type=%d used=%d\n", + reg->name, + reg->address, + reg->rIdx, reg->type, used); +#endif + + pc1 = setFirstItem(reg->reglives.usedpCodes); + pc2 = setNextItem(reg->reglives.usedpCodes); + + if(pcfl_used && pcfl_assigned) { + + /* + expected case - the register has been assigned a value and is + subsequently used + */ + + //fprintf(stderr," used only twice\n"); + if(pcfl_used->seq == pcfl_assigned->seq && !(setNextItem(reg->reglives.usedpFlows)) && !(setNextItem(reg->reglives.assignedpFlows))) { + + //fprintf(stderr, " and used in same flow\n"); + + pCodeOptime2pCodes(pc1, pc2, pcfl_used, reg, 1,optimize_level); + + } else { + // fprintf(stderr, " and used in different flows\n"); + + } + + } else if(pcfl_used) { + + /* + register has been used twice without ever being assigned */ + //fprintf(stderr,"WARNING %s: reg %s used without being assigned\n",__FUNCTION__,reg->name); + + } else { +// fprintf(stderr,"WARNING %s: reg %s assigned without being used\n",__FUNCTION__,reg->name); + Remove2pcodes(pcfl_assigned, pc1, pc2, reg, 1); + total_registers_saved++; // debugging stats. + } + } else { + + /* register has been used either once, or more than twice */ + + if(used && !pcfl_used && pcfl_assigned) { + pCode *pc; + + fprintf(stderr,"WARNING %s: reg %s assigned without being used\n",__FUNCTION__,reg->name); + + pc = setFirstItem(reg->reglives.usedpCodes); + while(pc) { + + pcfl_assigned = PCODE(PCI(pc)->pcflow); + Remove1pcode(pc, reg); + + deleteSetItem (&(PCFL(pcfl_assigned)->registers), reg); + /* + deleteSetItem (&(reg->reglives.usedpCodes),pc); + pc->destruct(pc); + */ + pc = setNextItem(reg->reglives.usedpCodes); + } + + + reg->isFree = 1; + reg->wasUsed = 0; + + total_registers_saved++; // debugging stats. + } else if( (used > 2) && optimize_multi_uses) { + + set *rset1=NULL; + set *rset2=NULL; + int searching=1; + + pCodeFlow *pcfl1=NULL, *pcfl2=NULL; + + /* examine the number of times this register is used */ + + + rset1 = reg->reglives.usedpCodes; + while(rset1 && searching) { + + pc1 = rset1->item; + rset2 = rset1->next; + + if(pc1 && isPCI(pc1) && ( (pcfl1 = PCI(pc1)->pcflow) != NULL) ) { + + //while(rset2 && searching) { + if(rset2) { + + pc2 = rset2->item; + if(pc2 && isPCI(pc2) && ( (pcfl2 = PCI(pc2)->pcflow) != NULL) ) { + if(pcfl2 == pcfl1) { + + if(pCodeOptime2pCodes(pc1, pc2, pcfl_used, reg, 0,optimize_level)) + searching = 0; + } + } + + //rset2 = rset2->next; + + } + } + rset1 = rset1->next; + } + } + } + + } + +} +/*-----------------------------------------------------------------* + * void pic16_pCodeRegOptimeRegUsage(pBlock *pb) + *-----------------------------------------------------------------*/ +void pic16_pCodeRegOptimizeRegUsage(int level) +{ + + int passes; + int saved = 0; + int t = total_registers_saved; + + if(getenv("NO_REG_OPT")) + return; + + if(!register_optimization) + return; + +#define OPT_PASSES 8 + passes = OPT_PASSES; + + do { + saved = total_registers_saved; + + /* Identify registers used in one flow sequence */ + OptimizeRegUsage(pic16_dynAllocRegs,level, (OPT_PASSES-passes)); + OptimizeRegUsage(pic16_dynStackRegs,level, (OPT_PASSES-passes)); + OptimizeRegUsage(pic16_dynDirectRegs,0, (OPT_PASSES-passes)); + + if((total_registers_saved != saved) + && (pic16_pcode_verbose)) + fprintf(stderr, " *** pass %d, Saved %d registers, total saved %d ***\n", + (1+OPT_PASSES-passes),total_registers_saved-saved,total_registers_saved); + + passes--; + + } while( passes && ((total_registers_saved != saved) || (passes==OPT_PASSES-1)) ); + + if(total_registers_saved == t) + if(pic16_debug_verbose) + fprintf(stderr, "No registers saved on this pass\n"); + + +#if 0 + fprintf(stderr,"dynamically allocated regs:\n"); + dbg_regusage(pic16_dynAllocRegs); + fprintf(stderr,"stack regs:\n"); + dbg_regusage(pic16_dynStackRegs); + fprintf(stderr,"direct regs:\n"); + dbg_regusage(pic16_dynDirectRegs); +#endif +} + + +/*-----------------------------------------------------------------* + * void RegsUnMapLiveRanges(set *regset) + * + *-----------------------------------------------------------------*/ +static void RegsSetUnMapLiveRanges(set *regset) +{ + regs *reg; + + while(regset) { + reg = regset->item; + regset = regset->next; + + deleteSet(®->reglives.usedpCodes); + deleteSet(®->reglives.usedpFlows); + deleteSet(®->reglives.assignedpFlows); + + } + +} + +void pic16_RegsUnMapLiveRanges(void) +{ + RegsSetUnMapLiveRanges(pic16_dynAllocRegs); + RegsSetUnMapLiveRanges(pic16_dynStackRegs); + RegsSetUnMapLiveRanges(pic16_dynDirectRegs); + RegsSetUnMapLiveRanges(pic16_dynProcessorRegs); + RegsSetUnMapLiveRanges(pic16_dynDirectBitRegs); + RegsSetUnMapLiveRanges(pic16_dynInternalRegs); +} diff --git a/src/pic16/pcoderegs.h b/src/pic16/pcoderegs.h new file mode 100644 index 0000000..6ee056e --- /dev/null +++ b/src/pic16/pcoderegs.h @@ -0,0 +1,42 @@ +/*------------------------------------------------------------------------- + + pcoderegs.h - post code generation register optimizations + + Written By - Scott Dattalo scott@dattalo.com + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +-------------------------------------------------------------------------*/ + +#ifndef __PCODEREGS_H__ +#define __PCODEREGS_H__ + +/************************************************* + + pCodeRegLives + + Records the set of registers used in a flow object. + +**************************************************/ + +typedef struct pCodeRegLives { + set *usedpFlows; /* set of pFlow objects that use this register */ + set *assignedpFlows; /* set of pFlow objects that assign values to this register */ + set *usedpCodes; /* set of all instructions that use this register */ + +} pCodeRegLives; + + +#endif // __PCODEREGS_H__ diff --git a/src/pic16/peeph.def b/src/pic16/peeph.def new file mode 100644 index 0000000..dffb192 --- /dev/null +++ b/src/pic16/peeph.def @@ -0,0 +1,308 @@ +// PIC Port Peep rules +// +// +// INTRODUCTION: +// +// The peep hole optimizer searchs the +// the SDCC generated code for small snippets +// that can be optimized. As a user, you have +// control over this optimization process without +// having to learn the SDCC source code. (However +// you'll still need access to the source since +// these rules are compiled into the source.) +// +// The way it works is you specify the target +// snippet that you want replaced with a more +// efficient snippet that you write. Wild card +// variables allow the rules to be parameterized. +// +// In all of the SDCC ports, labels and operands +// can be wild cards. However, in the PIC even the +// instructions can be wild cards. +// +// EXAMPLE: +// +// Consider Peep Rule 1 as an example. This rule +// replaces some code like: +// +// skpz ;i.e. btfss status,Z +// goto lab1 +// clrw +//lab1: +// +// with: +// +// skpnz ;i.e. btfsc status,Z +// clrw +//lab1 +// +// However, the Rule has four wild cards. +// The first allows the btfss instruction operator +// be anything, not just the Z bit in status register. +// The second wild card applies to a label. +// The third wild card is for an instruction - any +// single instruction can be substituted. +// The fourth wild card is also an instruction. It's +// just an instruction place holder associated with +// a label (think of it as the PIC Port author's laziness +// imposed upon the user). +// +// +// CONDITIONS +// +// There are certain instances where a peep rule may not +// be applicable. Consider this subtle example: +// +// movwf R0 +// movf R0,W +// +// It would seem that the second move is unnecessary. But +// be careful! The movf instruction affects the 'Z' bit. +// So if this sequence is followed by a btfsc status,Z, you +// will have to leave the second move in. +// +// To get around this proble, the peep rule can be followed +// by a conditon: "if NZ". Which is to say, apply the rule +// if Z bit is not needed in the code that follows. The optimizer +// is smart enough to look more than one instruction past the +// target block... +// +// Special commands +// +// +// _NOTBITSKIP_ %1 - Creates a wild card instruction that +// will match all instructions except for +// bit skip instructions (btfsc or btfss) +// _BITSKIP_ %1 - Creates a wild card instruction that only +// will match a bit skip instruction (btfsc +// or btfss) +// _INVERTBITSKIP_ %1 - For the wild card instruction %1, invert +// the state of the bit skip. If %1 is not +// a bit skip instruction, then there's an +// error in the peep rule. +// +// +// + + +// Peep 1 +// Converts +// +// btfss reg1,bit +// goto label +// incf reg2,f +//label +// +// Into: +// +// btfsc reg1,bit +// incf reg2,f +//label +// +// Notice that wild cards will allow any instruction +// besides incf to be used in the above. +// +// Also, notice that this snippet is not valid if +// it follows another skip + + +replace restart { + _NOTBITSKIP_ %1 + _BITSKIP_ %2 + goto %3 + %4 +%3: %5 +} by { + ; peep 1 - test/jump to test/skip + %1 + _INVERTBITSKIP_ %2 + %4 +%3: %5 +} + +replace restart { + _NOTBITSKIP_ %1 + _BITSKIP_ %2 + goto %3 +%4: %5 +%3: %6 +} by { + ; peep 1b - test/jump to test/skip + %1 + _INVERTBITSKIP_ %2 +%4: %5 +%3: %6 +} + + +//bogus test for pcode +//replace restart { +// movf %1,w ;comment at end +//%4: movf %1,w +// RETURN +// clrf INDF0 +// movlw 0xa5 +// movf fsr0,w +// incf indf0,f +// %2 +//} by { +// ; peep test remove redundant move +//%4: movf %1,w ;another comment +// %2 +//} if AYBABTU %3 + + +// peep 2 +replace restart { + movwf %1 + movf %1,w +} by { + ; peep 2 - Removed redundant move + movwf %1 +} if NZ + +// peep 3 +//replace restart { +/ decf %1,f +/// movf %1,w +// btfss _STATUS,z +// goto %2 +//} by { +// ; peep 3 - decf/mov/skpz to decfsz +// decfsz %1,f +// goto %2 +//} + + +replace restart { + movf %1,w + movf %1,w +} by { + ; peep 4 - Removed redundant move + movf %1,w +} + + +replace restart { + movlw %1 + movwf %2 + movlw %1 +} by { + ; peep 5 - Removed redundant move + movlw %1 + movwf %2 +} + +replace restart { + movwf %1 + movwf %1 +} by { + ; peep 6 - Removed redundant move + movwf %1 +} + +replace restart { + movlw 0 + iorwf %1,w +} by { + ; peep 7 - Removed redundant move + movf %1,w +} + +replace restart { + movf %1,w + movwf %2 + decf %2,f +} by { + ; peep 8 - Removed redundant move + decf %1,w + movwf %2 +} + +replace restart { + movwf %1 + movf %2,w + xorwf %1,w +} by { + ; peep 9a - Removed redundant move + movwf %1 + xorwf %2,w +} + +replace restart { + movwf %1 + movf %2,w + iorwf %1,w +} by { + ; peep 9b - Removed redundant move + movwf %1 + iorwf %2,w +} + +replace restart { + movf %1,w + movwf %2 + movf %2,w +} by { + ; peep 9c - Removed redundant move + movf %1,w + movwf %2 +} + +replace restart { + movwf %1 + movf %1,w + movwf %2 +} by { + ; peep 9d - Removed redundant move + movwf %1 + movwf %2 +} if NZ + +// From: Frieder Ferlemann + +replace restart { + iorlw 0 +} by { + ; peep 10a - Removed unnecessary iorlw +} if NZ + +// From: Frieder Ferlemann + +replace restart { + xorlw 0 +} by { + ; peep 10b - Removed unnecessary xorlw +} if NZ + +// From: Frieder Ferlemann + +replace restart { + movf %1,w + movwf %1 +} by { + ; peep 11 - Removed redundant move + movf %1,w +} + +replace restart { + movf %1,w + movf %2,w +} by { + ; peep 12 - Removed redundant move + movf %2,w +} + +replace restart { + movf %1,w + xorlw %2 + bz %3 + bra %4 +%3: %5 +} by { + ; peep 101 - test for equality + movlw %2 + cpfseq %1 + bra %4 +%3: %5 +} diff --git a/src/pic16/pic16.dsp b/src/pic16/pic16.dsp new file mode 100644 index 0000000..09b4dbc --- /dev/null +++ b/src/pic16/pic16.dsp @@ -0,0 +1,172 @@ +# Microsoft Developer Studio Project File - Name="pic16" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Static Library" 0x0104 + +CFG=pic16 - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "pic16.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "pic16.mak" CFG="pic16 - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "pic16 - Win32 Debug" (based on "Win32 (x86) Static Library") +!MESSAGE "pic16 - Win32 Release" (based on "Win32 (x86) Static Library") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "pic16 - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /FR /FD /GZ /Zm500 /c +# ADD CPP /nologo /W2 /Gm /GX /ZI /Od /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /FR /FD /GZ /Zm1000 /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LIB32=link.exe -lib +# ADD BASE LIB32 /nologo /out:"Debug\port.lib" +# ADD LIB32 /nologo /out:"Debug\port.lib" + +!ELSEIF "$(CFG)" == "pic16 - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /ML /W3 /GX /O2 /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /FD /Zm500 /c +# ADD CPP /nologo /ML /W3 /GX /O2 /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /FD /Zm1000 /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LIB32=link.exe -lib +# ADD BASE LIB32 /nologo /out:"Release\port.lib" +# ADD LIB32 /nologo /out:"Release\port.lib" + +!ENDIF + +# Begin Target + +# Name "pic16 - Win32 Debug" +# Name "pic16 - Win32 Release" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\device.c +# End Source File +# Begin Source File + +SOURCE=.\gen.c +# End Source File +# Begin Source File + +SOURCE=.\genarith.c +# End Source File +# Begin Source File + +SOURCE=.\genutils.c +# End Source File +# Begin Source File + +SOURCE=.\glue.c +# End Source File +# Begin Source File + +SOURCE=.\graph.c +# End Source File +# Begin Source File + +SOURCE=.\main.c +# End Source File +# Begin Source File + +SOURCE=.\pcode.c +# End Source File +# Begin Source File + +SOURCE=.\pcodeflow.c +# End Source File +# Begin Source File + +SOURCE=.\pcodepeep.c +# End Source File +# Begin Source File + +SOURCE=.\pcoderegs.c +# End Source File +# Begin Source File + +SOURCE=.\ralloc.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=.\device.h +# End Source File +# Begin Source File + +SOURCE=.\gen.h +# End Source File +# Begin Source File + +SOURCE=.\glue.h +# End Source File +# Begin Source File + +SOURCE=.\main.h +# End Source File +# Begin Source File + +SOURCE=.\pcode.h +# End Source File +# Begin Source File + +SOURCE=.\pcodeflow.h +# End Source File +# Begin Source File + +SOURCE=.\pcoderegs.h +# End Source File +# Begin Source File + +SOURCE=.\ralloc.h +# End Source File +# End Group +# End Target +# End Project diff --git a/src/pic16/pic16a.dsp b/src/pic16/pic16a.dsp new file mode 100644 index 0000000..5b7a6e1 --- /dev/null +++ b/src/pic16/pic16a.dsp @@ -0,0 +1,90 @@ +# Microsoft Developer Studio Project File - Name="pic16a" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Generic Project" 0x010a + +CFG=pic16a - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "pic16a.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "pic16a.mak" CFG="pic16a - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "pic16a - Win32 Debug" (based on "Win32 (x86) Generic Project") +!MESSAGE "pic16a - Win32 Release" (based on "Win32 (x86) Generic Project") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +MTL=midl.exe + +!IF "$(CFG)" == "pic16a - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "" +# PROP Intermediate_Dir "" +# PROP Target_Dir "" + +!ELSEIF "$(CFG)" == "pic16a - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "" +# PROP Intermediate_Dir "" +# PROP Target_Dir "" + +!ENDIF + +# Begin Target + +# Name "pic16a - Win32 Debug" +# Name "pic16a - Win32 Release" +# Begin Source File + +SOURCE=.\peeph.def + +!IF "$(CFG)" == "pic16a - Win32 Debug" + +# Begin Custom Build +InputPath=.\peeph.def + +"peeph.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph.rul + +# End Custom Build + +!ELSEIF "$(CFG)" == "pic16a - Win32 Release" + +# Begin Custom Build +InputPath=.\peeph.def + +"peeph.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph.rul + +# End Custom Build + +!ENDIF + +# End Source File +# End Target +# End Project diff --git a/src/pic16/ralloc.c b/src/pic16/ralloc.c new file mode 100644 index 0000000..68a27ed --- /dev/null +++ b/src/pic16/ralloc.c @@ -0,0 +1,4497 @@ +/*------------------------------------------------------------------------ + + ralloc.c - source file for register allocation. PIC16 specific + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + Added Pic Port T.scott Dattalo scott@dattalo.com (2000) + Added Pic16 Port Martin Dubuc m.dubuc@rogers.com (2002) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" +#include "ralloc.h" +#include "pcode.h" +#include "gen.h" +#include "device.h" + +#ifndef debugf +#define debugf(frm, rest) _debugf(__FILE__, __LINE__, frm, rest) +#endif +void _debugf(char *f, int l, char *frm, ...); + +#define NEWREG_DEBUG 0 +//#define USE_ONSTACK + + +/*-----------------------------------------------------------------*/ +/* At this point we start getting processor specific although */ +/* some routines are non-processor specific & can be reused when */ +/* targetting other processors. The decision for this will have */ +/* to be made on a routine by routine basis */ +/* routines used to pack registers are most definitely not reusable */ +/* since the pack the registers depending strictly on the MCU */ +/*-----------------------------------------------------------------*/ + +regs *pic16_typeRegWithIdx (int idx, int type, int fixed); +extern void genpic16Code (iCode *); + +/* Global data */ +static struct + { + bitVect *spiltSet; + set *stackSpil; + bitVect *regAssigned; + short blockSpil; + int slocNum; + bitVect *funcrUsed; /* registers used in a function */ + int stackExtend; + int dataExtend; + } +_G; + +/* Shared with gen.c */ +int pic16_ptrRegReq; /* one byte pointer register required */ + + +set *pic16_dynAllocRegs=NULL; +set *pic16_dynStackRegs=NULL; +set *pic16_dynProcessorRegs=NULL; +set *pic16_dynDirectRegs=NULL; +set *pic16_dynDirectBitRegs=NULL; +set *pic16_dynInternalRegs=NULL; +set *pic16_dynAccessRegs=NULL; + +static hTab *dynDirectRegNames=NULL; +static hTab *dynAllocRegNames=NULL; +static hTab *dynProcRegNames=NULL; +static hTab *dynAccessRegNames=NULL; +//static hTab *regHash = NULL; /* a hash table containing ALL registers */ + +extern set *sectNames; + +set *pic16_rel_udata=NULL; /* relocatable uninitialized registers */ +set *pic16_fix_udata=NULL; /* absolute uninitialized registers */ +set *pic16_equ_data=NULL; /* registers used by equates */ +set *pic16_int_regs=NULL; /* internal registers placed in access bank 0 to 0x7f */ +set *pic16_acs_udata=NULL; /* access bank variables */ + +set *pic16_builtin_functions=NULL; + +static int dynrIdx=0x00; //0x20; // starting temporary register rIdx +static int rDirectIdx=0; + +int pic16_nRegs = 128; // = sizeof (regspic16) / sizeof (regs); + +int pic16_Gstack_base_addr=0; /* The starting address of registers that + * are used to pass and return parameters */ + + +int _inRegAllocator=0; /* flag that marks whther allocReg happens while + * inside the register allocator function */ + + +static void spillThis (symbol *); +int pic16_ralloc_debug = 0; +static FILE *debugF = NULL; +/*-----------------------------------------------------------------*/ +/* debugLog - open a file for debugging information */ +/*-----------------------------------------------------------------*/ +//static void debugLog(char *inst,char *fmt, ...) +static void +debugLog (char *fmt,...) +{ + static int append = 0; // First time through, open the file without append. + + char buffer[256]; + //char *bufferP=buffer; + va_list ap; + + if (!pic16_ralloc_debug || !dstFileName) + return; + + + if (!debugF) + { + /* create the file name */ + strcpy (buffer, dstFileName); + strcat (buffer, ".d"); + + if (!(debugF = fopen (buffer, (append ? "a+" : "w")))) + { + werror (E_FILE_OPEN_ERR, buffer); + exit (1); + } + append = 1; // Next time debubLog is called, we'll append the debug info + + } + + va_start (ap, fmt); + + vsprintf (buffer, fmt, ap); + + fprintf (debugF, "%s", buffer); + //fprintf (stderr, "%s", buffer); +/* + while (isspace((unsigned char)*bufferP)) bufferP++; + + if (bufferP && *bufferP) + lineCurr = (lineCurr ? + connectLine(lineCurr,newLineNode(lb)) : + (lineHead = newLineNode(lb))); + lineCurr->isInline = _G.inLine; + lineCurr->isDebug = _G.debugLine; + */ + va_end (ap); + +} + +static void +debugNewLine (void) +{ + if(!pic16_ralloc_debug)return; + + if (debugF) + fputc ('\n', debugF); +} +/*-----------------------------------------------------------------*/ +/* debugLogClose - closes the debug log file (if opened) */ +/*-----------------------------------------------------------------*/ +static void +debugLogClose (void) +{ + if (debugF) { + fclose (debugF); + debugF = NULL; + } +} + +#define AOP(op) op->aop + +static char * +debugAopGet (char *str, operand * op) +{ + if(!pic16_ralloc_debug)return NULL; + + if (str) + debugLog (str); + + printOperand (op, debugF); + debugNewLine (); + + return NULL; +} + +char * +pic16_decodeOp (unsigned int op) +{ + if (op < 128 && op > ' ') { + buffer[0] = (op & 0xff); + buffer[1] = 0; + return buffer; + } + + switch (op) { + case IDENTIFIER: return "IDENTIFIER"; + case TYPE_NAME: return "TYPE_NAME"; + case CONSTANT: return "CONSTANT"; + case STRING_LITERAL: return "STRING_LITERAL"; + case SIZEOF: return "SIZEOF"; + case PTR_OP: return "PTR_OP"; + case INC_OP: return "INC_OP"; + case DEC_OP: return "DEC_OP"; + case LEFT_OP: return "LEFT_OP"; + case RIGHT_OP: return "RIGHT_OP"; + case LE_OP: return "LE_OP"; + case GE_OP: return "GE_OP"; + case EQ_OP: return "EQ_OP"; + case NE_OP: return "NE_OP"; + case AND_OP: return "AND_OP"; + case OR_OP: return "OR_OP"; + case MUL_ASSIGN: return "MUL_ASSIGN"; + case DIV_ASSIGN: return "DIV_ASSIGN"; + case MOD_ASSIGN: return "MOD_ASSIGN"; + case ADD_ASSIGN: return "ADD_ASSIGN"; + case SUB_ASSIGN: return "SUB_ASSIGN"; + case LEFT_ASSIGN: return "LEFT_ASSIGN"; + case RIGHT_ASSIGN: return "RIGHT_ASSIGN"; + case AND_ASSIGN: return "AND_ASSIGN"; + case XOR_ASSIGN: return "XOR_ASSIGN"; + case OR_ASSIGN: return "OR_ASSIGN"; + case TYPEDEF: return "TYPEDEF"; + case EXTERN: return "EXTERN"; + case STATIC: return "STATIC"; + case AUTO: return "AUTO"; + case REGISTER: return "REGISTER"; + case CODE: return "CODE"; + case EEPROM: return "EEPROM"; + case INTERRUPT: return "INTERRUPT"; + case SFR: return "SFR"; + case AT: return "AT"; + case SBIT: return "SBIT"; + case REENTRANT: return "REENTRANT"; + case USING: return "USING"; + case XDATA: return "XDATA"; + case DATA: return "DATA"; + case IDATA: return "IDATA"; + case PDATA: return "PDATA"; + case VAR_ARGS: return "VAR_ARGS"; + case CRITICAL: return "CRITICAL"; + case NONBANKED: return "NONBANKED"; + case BANKED: return "BANKED"; + case CHAR: return "CHAR"; + case SHORT: return "SHORT"; + case INT: return "INT"; + case LONG: return "LONG"; + case SIGNED: return "SIGNED"; + case UNSIGNED: return "UNSIGNED"; + case FLOAT: return "FLOAT"; + case DOUBLE: return "DOUBLE"; + case CONST: return "CONST"; + case VOLATILE: return "VOLATILE"; + case VOID: return "VOID"; + case BIT: return "BIT"; + case STRUCT: return "STRUCT"; + case UNION: return "UNION"; + case ENUM: return "ENUM"; + case RANGE: return "RANGE"; + case FAR: return "FAR"; + case CASE: return "CASE"; + case DEFAULT: return "DEFAULT"; + case IF: return "IF"; + case ELSE: return "ELSE"; + case SWITCH: return "SWITCH"; + case WHILE: return "WHILE"; + case DO: return "DO"; + case FOR: return "FOR"; + case GOTO: return "GOTO"; + case CONTINUE: return "CONTINUE"; + case BREAK: return "BREAK"; + case RETURN: return "RETURN"; + case INLINEASM: return "INLINEASM"; + case IFX: return "IFX"; + case ADDRESS_OF: return "ADDRESS_OF"; + case GET_VALUE_AT_ADDRESS: return "GET_VALUE_AT_ADDRESS"; + case SPIL: return "SPIL"; + case UNSPIL: return "UNSPIL"; + case GETHBIT: return "GETHBIT"; + case BITWISEAND: return "BITWISEAND"; + case UNARYMINUS: return "UNARYMINUS"; + case IPUSH: return "IPUSH"; + case IPOP: return "IPOP"; + case PCALL: return "PCALL"; + case FUNCTION: return "FUNCTION"; + case ENDFUNCTION: return "ENDFUNCTION"; + case JUMPTABLE: return "JUMPTABLE"; + case RRC: return "RRC"; + case RLC: return "RLC"; + case CAST: return "CAST"; + case CALL: return "CALL"; + case PARAM: return "PARAM "; + case NULLOP: return "NULLOP"; + case BLOCK: return "BLOCK"; + case LABEL: return "LABEL"; + case RECEIVE: return "RECEIVE"; + case SEND: return "SEND"; + case DUMMY_READ_VOLATILE: return "DUMMY_READ_VOLATILE"; + } + sprintf (buffer, "unkown op %d %c", op, op & 0xff); + + return buffer; +} + +#if 0 +static char *decodeRegType(short type) +{ + switch(type) { + case REG_GPR: return "REG_GPR"; + case REG_PTR: return "REG_PTR"; + case REG_CND: return "REG_CNT"; + + default: + return ""; + } +} +#endif + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static char * +debugLogRegType (short type) +{ + if(!pic16_ralloc_debug)return NULL; + switch (type) { + case REG_GPR: return "REG_GPR"; + case REG_PTR: return "REG_PTR"; + case REG_CND: return "REG_CND"; + } + sprintf (buffer, "unknown reg type %d", type); + + return buffer; +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +static int regname2key(char const *name) +{ + int key = 0; + + if(!name) + return 0; + + while(*name) { + + key += (*name++) + 1; + + } + + return ( (key + (key >> 4) + (key>>8)) & 0x3f); + +} + +/*-----------------------------------------------------------------*/ +/* newReg - allocate and init memory for a new register */ +/*-----------------------------------------------------------------*/ +regs* newReg(int type, short pc_type, int rIdx, char *name, unsigned size, int alias, operand *refop) +{ + + regs *dReg; + + dReg = Safe_calloc(1,sizeof(regs)); + dReg->type = type; + dReg->pc_type = pc_type; + dReg->rIdx = rIdx; + if(name) + dReg->name = Safe_strdup(name); + else { + if(pic16_options.xinst && pc_type == PO_GPR_TEMP) { + sprintf(buffer,"0x%02x", dReg->rIdx); + } else { + sprintf(buffer,"r0x%02x", dReg->rIdx); + } + + if(type == REG_STK) { + *buffer = 's'; + } + dReg->name = Safe_strdup(buffer); + } + + + dReg->isFree = 0; + dReg->wasUsed = 1; + dReg->isEmitted = 0; + + if(type == REG_SFR) { + dReg->isFixed = 1; + dReg->address = rIdx; + dReg->accessBank = 1; + } else { + dReg->isFixed = 0; + dReg->address = 0; + dReg->accessBank = 0; + } + +#if NEWREG_DEBUG + fprintf(stderr,"newReg @ %p: %s, rIdx = 0x%02x\taccess= %d\tregop= %p\n",dReg, dReg->name,rIdx, dReg->accessBank, refop); +#endif + dReg->size = size; + dReg->alias = alias; + dReg->reg_alias = NULL; + dReg->reglives.usedpFlows = newSet(); + dReg->reglives.assignedpFlows = newSet(); + dReg->regop = refop; + + if(!(type == REG_SFR && alias == 0x80)) + hTabAddItem(&dynDirectRegNames, regname2key(dReg->name), dReg); + + return dReg; +} + +/*-----------------------------------------------------------------*/ +/* regWithIdx - Search through a set of registers that matches idx */ +/*-----------------------------------------------------------------*/ +static regs * +regWithIdx (set *dRegs, int idx, unsigned fixed) +{ + regs *dReg; + +//#define D(text) text +#define D(text) + + for (dReg = setFirstItem(dRegs) ; dReg ; + dReg = setNextItem(dRegs)) { + + D(fprintf(stderr, "%s:%d testing reg w/rIdx = %d (%d f:%d)\t", __FUNCTION__, __LINE__, dReg->rIdx, idx, fixed)); + if(idx == dReg->rIdx && (fixed == dReg->isFixed)) { + D(fprintf(stderr, "found!\n")); + return dReg; + } else + D(fprintf(stderr, "not found!\n")); + } + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* regFindFree - Search for a free register in a set of registers */ +/*-----------------------------------------------------------------*/ +static regs * +regFindFree (set *dRegs) +{ + regs *dReg; + + for (dReg = setFirstItem(dRegs) ; dReg ; + dReg = setNextItem(dRegs)) { + +// fprintf(stderr, "%s:%d checking register %s (%p) [rIdx: 0x%02x] if free= %d\n", +// __FILE__, __LINE__, dReg->name, dReg, dReg->rIdx, dReg->isFree); + + if(dReg->isFree) { +// fprintf(stderr, "%s:%d free register found, rIdx = %d\n", __FILE__, __LINE__, dReg->rIdx); + + return dReg; + } + } + + return NULL; +} + +static regs * +regFindFreeNext(set *dRegs, regs *creg) +{ + regs *dReg; + + if(creg) { + /* position at current register */ + for(dReg = setFirstItem(dRegs); dReg != creg; dReg = setNextItem(dRegs)); + } + + for(dReg = setNextItem(dRegs); dReg; dReg = setNextItem(dRegs)) { + if(dReg->isFree) { + return dReg; + } + } + + return NULL; +} + +/*-----------------------------------------------------------------* + *-----------------------------------------------------------------*/ +regs * +pic16_allocProcessorRegister(int rIdx, char * name, short po_type, int alias) +{ + regs *reg = newReg(REG_SFR, po_type, rIdx, name, 1, alias, NULL); + +// fprintf(stderr,"%s: %s addr =0x%x\n",__FUNCTION__, name,rIdx); + + reg->wasUsed = 0; // we do not know if they are going to be used at all + reg->accessBank = 1; // implicit add access Bank + + hTabAddItem(&dynProcRegNames, regname2key(reg->name), reg); + + return addSet(&pic16_dynProcessorRegs, reg); +} + +/*-----------------------------------------------------------------* + *-----------------------------------------------------------------*/ + +regs * +pic16_allocInternalRegister(int rIdx, char * name, short po_type, int alias) +{ + regs * reg = newReg(REG_GPR, po_type, rIdx, name,1,alias, NULL); + +// fprintf(stderr,"%s:%d: %s %s addr =0x%x\n",__FILE__, __LINE__, __FUNCTION__, name, rIdx); + + if(reg) { + reg->wasUsed = 0; + return addSet(&pic16_dynInternalRegs,reg); + } + + return NULL; +} + + +/*-----------------------------------------------------------------*/ +/* allocReg - allocates register of given type */ +/*-----------------------------------------------------------------*/ +static regs * +allocReg (short type) +{ + regs * reg=NULL; + +#define MAX_P16_NREGS 16 + + +#if 0 + if(dynrIdx > pic16_nRegs) + werror(W_POSSBUG2, __FILE__, __LINE__); + return NULL; +#endif + + /* try to reuse some unused registers */ + reg = regFindFree( pic16_dynAllocRegs ); + + if(reg) { +// fprintf(stderr, "%s: [%s][cf:%p] found FREE register %s, rIdx: %d\n", __FILE__, (_inRegAllocator)?"ralloc":"", currFunc, reg->name, reg->rIdx); + } + + if(!reg) { + reg = newReg(REG_GPR, PO_GPR_TEMP, dynrIdx++, NULL, 1, 0, NULL); +// fprintf(stderr, "%s [%s][cf:%p] allocating NEW register %s, rIdx: %d\n", __FILE__, +// (_inRegAllocator)?"ralloc":"", currFunc, reg->name, reg->rIdx); + +#if 1 + if(_inRegAllocator && (dynrIdx > MAX_P16_NREGS)) { + // debugf("allocating more registers than available\n", 0); + // return (NULL); + } + + addSet(&pic16_dynAllocRegs, reg); + hTabAddItem(&dynAllocRegNames, regname2key(reg->name), reg); +// fprintf(stderr, "%s:%d added reg to pic16_dynAllocRegs = %p\n", __FUNCTION__, __LINE__, pic16_dynAllocRegs); +#endif + } + + debugLog ("%s of type %s for register rIdx: %d (0x%x)\n", __FUNCTION__, debugLogRegType (type), dynrIdx-1, dynrIdx-1); + +#if 0 + fprintf(stderr,"%s:%d: %s\t%s addr= 0x%x\trIdx= 0x%02x isFree: %d\n", + __FILE__, __LINE__, __FUNCTION__, reg->name, reg->address, reg->rIdx, reg->isFree); +#endif + if(reg) { + reg->isFree=0; + reg->accessBank = 1; /* this is a temporary register alloc in accessBank */ + reg->isLocal = 1; /* this is a local frame register */ +// reg->wasUsed = 1; + } + + if (currFunc) { +// fprintf(stderr, "%s:%d adding %s into function %s regsUsed\n", __FUNCTION__, __LINE__, reg->name, currFunc->name); + currFunc->regsUsed = bitVectSetBit (currFunc->regsUsed, reg->rIdx); + } + + return (reg); // addSet(&pic16_dynAllocRegs,reg); + +} + + +/*-----------------------------------------------------------------*/ +/* pic16_dirregWithName - search for register by name */ +/*-----------------------------------------------------------------*/ +regs * +pic16_dirregWithName (char *name) +{ + int hkey; + regs *reg; + + if(!name) + return NULL; + + /* hash the name to get a key */ + + hkey = regname2key(name); + +// fprintf(stderr, "%s:%d: name = %s\thash = %d\n", __FUNCTION__, __LINE__, name, hkey); + + reg = hTabFirstItemWK(dynDirectRegNames, hkey); + + while(reg) { + + if(STRCASECMP(reg->name, name) == 0) { +// fprintf(stderr, "%s:%d: FOUND name = %s\thash = %d\n", __FUNCTION__, __LINE__, reg->name, hkey); + return(reg); + } + + reg = hTabNextItemWK (dynDirectRegNames); + + } + + return NULL; // name wasn't found in the hash table +} + +/*-----------------------------------------------------------------*/ +/* pic16_allocregWithName - search for register by name */ +/*-----------------------------------------------------------------*/ +regs * +pic16_allocregWithName (char *name) +{ + int hkey; + regs *reg; + + if(!name) + return NULL; + + /* hash the name to get a key */ + + hkey = regname2key(name); + + //fprintf(stderr, "%s:%d: name = %s\thash = %d\n", __FUNCTION__, __LINE__, name, hkey); + + reg = hTabFirstItemWK(dynAllocRegNames, hkey); + + while(reg) { + + if(STRCASECMP(reg->name, name) == 0) { + return(reg); + } + + reg = hTabNextItemWK (dynAllocRegNames); + + } + + return NULL; // name wasn't found in the hash table + +} + + +/*-----------------------------------------------------------------*/ +/* pic16_procregWithName - search for register by name */ +/*-----------------------------------------------------------------*/ +regs * +pic16_procregWithName (char *name) +{ + int hkey; + regs *reg; + + if(!name) + return NULL; + + /* hash the name to get a key */ + + hkey = regname2key(name); + +// fprintf(stderr, "%s:%d: name = %s\thash = %d\n", __FUNCTION__, __LINE__, name, hkey); + + reg = hTabFirstItemWK(dynProcRegNames, hkey); + + while(reg) { + + if(STRCASECMP(reg->name, name) == 0) { + return(reg); + } + + reg = hTabNextItemWK (dynProcRegNames); + + } + + return NULL; // name wasn't found in the hash table + +} + +/*-----------------------------------------------------------------*/ +/* pic16_accessregWithName - search for register by name */ +/*-----------------------------------------------------------------*/ +regs * +pic16_accessregWithName (char *name) +{ + int hkey; + regs *reg; + + if(!name) + return NULL; + + /* hash the name to get a key */ + + hkey = regname2key(name); + +// fprintf(stderr, "%s:%d: name = %s\thash = %d\n", __FUNCTION__, __LINE__, name, hkey); + + reg = hTabFirstItemWK(dynAccessRegNames, hkey); + + while(reg) { + + if(STRCASECMP(reg->name, name) == 0) { + return(reg); + } + + reg = hTabNextItemWK (dynAccessRegNames); + + } + + return NULL; // name wasn't found in the hash table + +} + +regs *pic16_regWithName(char *name) +{ + regs *reg; + + reg = pic16_dirregWithName( name ); + if(reg)return reg; + + reg = pic16_procregWithName( name ); + if(reg)return reg; + + reg = pic16_allocregWithName( name ); + if(reg)return reg; + + reg = pic16_accessregWithName( name ); + if(reg)return reg; + + return NULL; +} + + +/*-----------------------------------------------------------------*/ +/* pic16_allocDirReg - allocates register of given type */ +/*-----------------------------------------------------------------*/ +regs * +pic16_allocDirReg (operand *op ) +{ + regs *reg; + char *name; + + if(!IS_SYMOP(op)) { + debugLog ("%s BAD, op is NULL\n", __FUNCTION__); +// fprintf(stderr, "%s BAD, op is NULL\n", __FUNCTION__); + return NULL; + } + + name = OP_SYMBOL (op)->rname[0] ? OP_SYMBOL (op)->rname : OP_SYMBOL (op)->name; + + + if(!SPEC_OCLS( OP_SYM_ETYPE(op))) { +#if 0 + if(pic16_debug_verbose) + { + fprintf(stderr, "%s:%d symbol %s(r:%s) is not assigned to a memmap\n", __FILE__, __LINE__, + OP_SYMBOL(op)->name, OP_SYMBOL(op)->rname); + } +#endif + return NULL; + } + + if(!IN_DIRSPACE( SPEC_OCLS( OP_SYM_ETYPE(op))) + || !IN_FARSPACE(SPEC_OCLS( OP_SYM_ETYPE(op))) ) { + +#if 0 + if(pic16_debug_verbose) { + fprintf(stderr, "dispace:%d farspace:%d codespace:%d regspace:%d stack:%d eeprom: %d regparm: %d isparm: %d\n", + IN_DIRSPACE( SPEC_OCLS( OP_SYM_ETYPE(op))), + IN_FARSPACE( SPEC_OCLS( OP_SYM_ETYPE(op))), + IN_CODESPACE( SPEC_OCLS( OP_SYM_ETYPE(op))), + IN_REGSP( SPEC_OCLS( OP_SYM_ETYPE(op))), + IN_STACK( OP_SYM_ETYPE(op)), + SPEC_OCLS(OP_SYM_ETYPE(op)) == eeprom, + IS_REGPARM(OP_SYM_ETYPE(op)), + IS_PARM(op)); + + fprintf(stderr, "%s:%d symbol %s NOT in dirspace\n", __FILE__, __LINE__, + OP_SYMBOL(op)->name); + } +#endif + + } + + + + if (IS_CODE ( OP_SYM_ETYPE(op)) ) { +// fprintf(stderr, "%s:%d sym: %s in codespace\n", __FUNCTION__, __LINE__, OP_SYMBOL(op)->name); + return NULL; + } + + if(IS_ITEMP(op))return NULL; + +// if(IS_STATIC(OP_SYM_ETYPE(op)))return NULL; + + if(IN_STACK(OP_SYM_ETYPE(op)))return NULL; + + debugLog ("%s:%d symbol name %s\n", __FUNCTION__, __LINE__, name); +// fprintf(stderr, "%s symbol name %s\tSTATIC:%d\n", __FUNCTION__,name, IS_STATIC(OP_SYM_ETYPE(op))); + + { + if(SPEC_CONST ( OP_SYM_ETYPE(op)) && (IS_CHAR ( OP_SYM_ETYPE(op)) )) { + debugLog(" %d const char\n",__LINE__); + debugLog(" value = %s \n",SPEC_CVAL( OP_SYM_ETYPE(op))); +// fprintf(stderr, " %d const char\n",__LINE__); +// fprintf(stderr, " value = %s \n",SPEC_CVAL( OP_SYM_ETYPE(op))); + } + + + debugLog(" %d storage class %d \n",__LINE__,SPEC_SCLS( OP_SYM_ETYPE(op))); + if (IS_CODE ( OP_SYM_ETYPE(op)) ) + debugLog(" %d code space\n",__LINE__); + + if (IS_INTEGRAL ( OP_SYM_ETYPE(op)) ) + debugLog(" %d integral\n",__LINE__); + + if (IS_LITERAL ( OP_SYM_ETYPE(op)) ) + debugLog(" %d literal\n",__LINE__); + + if (IS_SPEC ( OP_SYM_ETYPE(op)) ) + debugLog(" %d specifier\n",__LINE__); + + debugAopGet(NULL, op); + } + + + reg = pic16_dirregWithName(name); + + if(!reg) { + int address = 0; + int regtype = REG_GPR; + + /* if this is at an absolute address, then get the address. */ + if (SPEC_ABSA ( OP_SYM_ETYPE(op)) ) { + address = SPEC_ADDR ( OP_SYM_ETYPE(op)); +// fprintf(stderr,"reg %s is at an absolute address: 0x%03x\n",name,address); + } + + /* Register wasn't found in hash, so let's create + * a new one and put it in the hash table AND in the + * dynDirectRegNames set */ + if(IS_CODE(OP_SYM_ETYPE(op)) || IN_CODESPACE( SPEC_OCLS( OP_SYM_ETYPE(op)))) { + debugLog("%s:%d sym: %s in codespace\n", __FUNCTION__, __LINE__, OP_SYMBOL(op)->name); + return NULL; + } + + +#if 0 + if(OP_SYMBOL(op)->onStack) { + fprintf(stderr, "%s:%d onStack %s offset: %d\n", __FILE__, __LINE__, + OP_SYMBOL(op)->name, OP_SYMBOL(op)->stack); + } +#endif + + if(!IN_DIRSPACE( SPEC_OCLS( OP_SYM_ETYPE(op))) + || !IN_FARSPACE(SPEC_OCLS( OP_SYM_ETYPE(op))) ) { + +#if 0 + if(pic16_debug_verbose) + { + fprintf(stderr, "dispace:%d farspace:%d codespace:%d regspace:%d stack:%d eeprom: %d\n", + IN_DIRSPACE( SPEC_OCLS( OP_SYM_ETYPE(op))), + IN_FARSPACE( SPEC_OCLS( OP_SYM_ETYPE(op))), + IN_CODESPACE( SPEC_OCLS( OP_SYM_ETYPE(op))), + IN_REGSP( SPEC_OCLS( OP_SYM_ETYPE(op))), + IN_STACK( OP_SYM_ETYPE(op)), + SPEC_OCLS(OP_SYM_ETYPE(op)) == eeprom); + + fprintf(stderr, "%s:%d symbol %s NOT in dirspace\n", __FILE__, __LINE__, + OP_SYMBOL(op)->name); + } +#endif + } + + reg = newReg(regtype, PO_DIR, rDirectIdx++, name,getSize (OP_SYMBOL (op)->type),0, op); + debugLog ("%d -- added %s to hash, size = %d\n", __LINE__, name,reg->size); + + if( SPEC_SCLS( OP_SYM_ETYPE( op ) ) == S_REGISTER ) { + fprintf(stderr, "%s:%d symbol %s is declared as register\n", __FILE__, __LINE__, + name); + + reg->accessBank = 1; + checkAddReg(&pic16_dynAccessRegs, reg); + hTabAddItem(&dynAccessRegNames, regname2key(name), reg); + + return (reg); + } + + +// if (SPEC_ABSA ( OP_SYM_ETYPE(op)) ) { +// fprintf(stderr, " ralloc.c at fixed address: %s - changing to REG_SFR\n",name); +// reg->type = REG_SFR; +// } + + if (IS_BITVAR (OP_SYM_ETYPE(op))) { +// fprintf(stderr, "%s:%d adding %s in bit registers\n", __FILE__, __LINE__, reg->name); + addSet(&pic16_dynDirectBitRegs, reg); + reg->isBitField = 1; + } else { +// fprintf(stderr, "%s:%d adding %s in direct registers\n", __FILE__, __LINE__, reg->name); +// addSet(&pic16_dynDirectRegs, reg); + +#if 1 + if(!(IS_STATIC(OP_SYM_ETYPE(op)) + && OP_SYMBOL(op)->ival + )) +#endif + checkAddReg(&pic16_dynDirectRegs, reg); + } + + } else { +// debugLog (" -- %s is declared at address 0x30000x\n",name); + return (reg); /* This was NULL before, but since we found it + * why not just return it?! */ + } + + if (SPEC_ABSA ( OP_SYM_ETYPE(op)) ) { + reg->isFixed = 1; + reg->address = SPEC_ADDR ( OP_SYM_ETYPE(op)); + + /* work around for user defined registers in access bank */ + if((reg->address>= 0x00 && reg->address < pic16->acsSplitOfs) + || (reg->address >= (0xf00 + pic16->acsSplitOfs) && reg->address <= 0xfff)) + reg->accessBank = 1; + + debugLog (" -- and it is at a fixed address 0x%02x\n",reg->address); + } + + return reg; +} + +/*-----------------------------------------------------------------*/ +/* pic16_allocRegByName - allocates register of given type */ +/*-----------------------------------------------------------------*/ +regs * +pic16_allocRegByName (char *name, int size, operand *op) +{ + + regs *reg; + + if(!name) { + fprintf(stderr, "%s - allocating a NULL register\n",__FUNCTION__); + exit(1); + } + + /* First, search the hash table to see if there is a register with this name */ + reg = pic16_dirregWithName(name); + + if(!reg) { + + /* Register wasn't found in hash, so let's create + * a new one and put it in the hash table AND in the + * dynDirectRegNames set */ + + //fprintf (stderr,"%s:%d symbol name %s\tregop= %p\n", __FUNCTION__, __LINE__, name, op); + + reg = newReg(REG_GPR, PO_DIR, rDirectIdx++, name,size,0, op); + + debugLog ("%d -- added %s to hash, size = %d\n", __LINE__, name,reg->size); + //fprintf(stderr, " -- added %s to hash, size = %d\n", name,reg->size); + + //hTabAddItem(&dynDirectRegNames, regname2key(name), reg); /* initially commented out */ + addSet(&pic16_dynDirectRegs, reg); + } + + return reg; +} + +/*-----------------------------------------------------------------*/ +/* RegWithIdx - returns pointer to register with index number */ +/*-----------------------------------------------------------------*/ +regs *pic16_typeRegWithIdx (int idx, int type, int fixed) +{ + + regs *dReg; + + debugLog ("%s - requesting index = 0x%x\n", __FUNCTION__,idx); +// fprintf(stderr, "%s - requesting index = 0x%x (type = %d [%s])\n", __FUNCTION__, idx, type, decodeRegType(type)); + + switch (type) { + + case REG_GPR: + if( (dReg = regWithIdx ( pic16_dynAllocRegs, idx, fixed)) != NULL) { + + debugLog ("Found a Dynamic Register!\n"); + return dReg; + } + if( (dReg = regWithIdx ( pic16_dynDirectRegs, idx, fixed)) != NULL ) { + debugLog ("Found a Direct Register!\n"); + return dReg; + } + + if( (dReg = regWithIdx ( pic16_dynInternalRegs, idx, fixed)) != NULL ) { + debugLog ("Found an Internal Register!\n"); + return dReg; + } + + break; + case REG_STK: + if( (dReg = regWithIdx ( pic16_dynStackRegs, idx, fixed)) != NULL ) { + debugLog ("Found a Stack Register!\n"); + return dReg; + } + break; + case REG_SFR: + if( (dReg = regWithIdx ( pic16_dynProcessorRegs, idx, 1)) != NULL ) { + debugLog ("Found a Processor Register!\n"); + return dReg; + } + + case REG_CND: + case REG_PTR: + default: + break; + } + + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* pic16_regWithIdx - returns pointer to register with index number*/ +/*-----------------------------------------------------------------*/ +regs * +pic16_regWithIdx (int idx) +{ + regs *dReg; + + if( (dReg = pic16_typeRegWithIdx(idx,REG_GPR,0)) != NULL) + return dReg; + + if( (dReg = pic16_typeRegWithIdx(idx,REG_SFR,0)) != NULL) + return dReg; + +#if 0 + if( (dReg = pic16_typeRegWithIdx(idx,REG_STK,0)) != NULL) + return dReg; +#endif + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* pic16_regWithIdx - returns pointer to register with index number */ +/*-----------------------------------------------------------------*/ +regs * +pic16_allocWithIdx (int idx) +{ + + regs *dReg=NULL; + + debugLog ("%s - allocating with index = 0x%x\n", __FUNCTION__,idx); +// fprintf(stderr, "%s - allocating with index = 0x%x\n", __FUNCTION__,idx); + + if( (dReg = regWithIdx ( pic16_dynAllocRegs, idx,0)) != NULL) { + + debugLog ("Found a Dynamic Register!\n"); + } else if( (dReg = regWithIdx ( pic16_dynStackRegs, idx,0)) != NULL ) { + debugLog ("Found a Stack Register!\n"); + } else if( (dReg = regWithIdx ( pic16_dynProcessorRegs, idx,1)) != NULL ) { + debugLog ("Found a Processor Register!\n"); + fprintf(stderr, "Found a processor register! %s\n", dReg->name); + } else if( (dReg = regWithIdx ( pic16_dynInternalRegs, idx,0)) != NULL ) { + debugLog ("Found an Internal Register!\n"); + } else { + + debugLog ("Dynamic Register not found\n"); + +#if 1 + dReg = newReg(REG_GPR, PO_GPR_TEMP, idx, NULL, 1, 0, NULL); + addSet(&pic16_dynAllocRegs, dReg); + hTabAddItem(&dynAllocRegNames, regname2key(dReg->name), dReg); +#endif + + if(!dReg) { +// return (NULL); + //fprintf(stderr,"%s %d - requested register: 0x%x\n",__FUNCTION__,__LINE__,idx); + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "allocWithIdx not found"); + exit (1); + } + } + + dReg->wasUsed = 1; + dReg->isFree = 0; + + return dReg; +} +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +regs * +pic16_findFreeReg(short type) +{ + // int i; + regs* dReg; + + switch (type) { + case REG_GPR: + if((dReg = regFindFree(pic16_dynAllocRegs)) != NULL) + return dReg; +// return (addSet(&pic16_dynAllocRegs,newReg(REG_GPR, PO_GPR_TEMP,dynrIdx++,NULL,1,0, NULL))); + return allocReg( REG_GPR ); + + case REG_STK: + + if((dReg = regFindFree(pic16_dynStackRegs)) != NULL) + return dReg; + + return NULL; + + case REG_PTR: + case REG_CND: + case REG_SFR: + default: + return NULL; + } +} + +regs * +pic16_findFreeRegNext(short type, regs *creg) +{ + // int i; + regs* dReg; + + switch (type) { + case REG_GPR: + if((dReg = regFindFreeNext(pic16_dynAllocRegs, creg)) != NULL) + return dReg; +// return (addSet(&pic16_dynAllocRegs,newReg(REG_GPR, PO_GPR_TEMP,dynrIdx++,NULL,1,0, NULL))); + return (allocReg( REG_GPR ) ); + + case REG_STK: + + if((dReg = regFindFreeNext(pic16_dynStackRegs, creg)) != NULL) + return dReg; + + return NULL; + + case REG_PTR: + case REG_CND: + case REG_SFR: + default: + return NULL; + } +} +/*-----------------------------------------------------------------*/ +/* freeReg - frees a register */ +/*-----------------------------------------------------------------*/ +static void +freeReg (regs * reg) +{ + debugLog ("%s\n", __FUNCTION__); +// fprintf(stderr, "%s:%d register %s (%p) is freed\n", __FILE__, __LINE__, reg->name, reg); + reg->isFree = 1; +} + + +/*-----------------------------------------------------------------*/ +/* nFreeRegs - returns number of free registers */ +/*-----------------------------------------------------------------*/ +static int +nFreeRegs (int type) +{ + regs *reg; + int nfr=0; + + + /* although I fixed the register allocation/freeing scheme + * the for loop below doesn't give valid results. I do not + * know why yet. -- VR 10-Jan-2003 */ + + return 100; + + + /* dynamically allocate as many as we need and worry about + * fitting them into a PIC later */ + + debugLog ("%s\n", __FUNCTION__); + + for(reg = setFirstItem(pic16_dynAllocRegs); reg; reg=setNextItem(pic16_dynAllocRegs)) + if((reg->type == type) && reg->isFree)nfr++; + + fprintf(stderr, "%s:%d # of free registers= %d\n", __FILE__, __LINE__, nfr); + return nfr; +} + +/*-----------------------------------------------------------------*/ +/* nfreeRegsType - free registers with type */ +/*-----------------------------------------------------------------*/ +static int +nfreeRegsType (int type) +{ + int nfr; + debugLog ("%s\n", __FUNCTION__); + if (type == REG_PTR) + { + if ((nfr = nFreeRegs (type)) == 0) + return nFreeRegs (REG_GPR); + } + + return nFreeRegs (type); +} +#if 0 +static void writeSetUsedRegs(FILE *of, set *dRegs) +{ + + regs *dReg; + + for (dReg = setFirstItem(dRegs) ; dReg ; + dReg = setNextItem(dRegs)) { + + if(dReg->wasUsed) + fprintf (of, "\t%s\n",dReg->name); + } + +} +#endif + +extern void pic16_groupRegistersInSection(set *regset); + +extern void pic16_dump_equates(FILE *of, set *equs); +extern void pic16_dump_access(FILE *of, set *section); +//extern void pic16_dump_map(void); +extern void pic16_dump_usection(FILE *of, set *section, int fix); +extern void pic16_dump_isection(FILE *of, set *section, int fix); +extern void pic16_dump_int_registers(FILE *of, set *section); +extern void pic16_dump_idata(FILE *of, set *idataSymSet); + +extern void pic16_dump_gsection(FILE *of, set *sections); + +static void packBits(set *bregs) +{ + set *regset; + regs *breg; + regs *bitfield=NULL; + regs *relocbitfield=NULL; + int bit_no=0; + int byte_no=-1; + char buffer[20]; + + + for (regset = bregs ; regset ; + regset = regset->next) { + + breg = regset->item; + breg->isBitField = 1; + //fprintf(stderr,"bit reg: %s\n",breg->name); + + if(breg->isFixed) { + //fprintf(stderr,"packing bit at fixed address = 0x%03x\n",breg->address); + + bitfield = pic16_typeRegWithIdx (breg->address >> 3, -1 , 1); + breg->rIdx = breg->address & 7; + breg->address >>= 3; + + if(!bitfield) { + sprintf (buffer, "fbitfield%02x", breg->address); + //fprintf(stderr,"new bit field\n"); + bitfield = newReg(REG_SFR, PO_GPR_BIT,breg->address,buffer,1,0, NULL); + bitfield->isBitField = 1; + bitfield->isFixed = 1; + bitfield->address = breg->address; + addSet(&pic16_dynDirectRegs,bitfield); + //hTabAddItem(&dynDirectRegNames, regname2key(buffer), bitfield); + } else { + //fprintf(stderr," which is occupied by %s (addr = %d)\n",bitfield->name,bitfield->address); + ; + } + breg->reg_alias = bitfield; + bitfield = NULL; + + } else { + if(!relocbitfield || bit_no >7) { + byte_no++; + bit_no=0; + sprintf (buffer, "bitfield%d", byte_no); + //fprintf(stderr,"new relocatable bit field\n"); + relocbitfield = newReg(REG_GPR, PO_GPR_BIT,rDirectIdx++,buffer,1,0, NULL); + relocbitfield->isBitField = 1; + addSet(&pic16_dynDirectRegs,relocbitfield); + //hTabAddItem(&dynDirectRegNames, regname2key(buffer), relocbitfield); + + } + + breg->reg_alias = relocbitfield; + breg->address = rDirectIdx; /* byte_no; */ + breg->rIdx = bit_no++; + } + } + +} + +void pic16_writeUsedRegs(FILE *of) +{ + packBits(pic16_dynDirectBitRegs); + + pic16_groupRegistersInSection(pic16_dynAllocRegs); + pic16_groupRegistersInSection(pic16_dynInternalRegs); + pic16_groupRegistersInSection(pic16_dynStackRegs); + pic16_groupRegistersInSection(pic16_dynDirectRegs); + pic16_groupRegistersInSection(pic16_dynDirectBitRegs); + pic16_groupRegistersInSection(pic16_dynProcessorRegs); + pic16_groupRegistersInSection(pic16_dynAccessRegs); + + /* dump equates */ + pic16_dump_equates(of, pic16_equ_data); + +// pic16_dump_esection(of, pic16_rel_eedata, 0); +// pic16_dump_esection(of, pic16_fix_eedata, 0); + + /* dump access bank symbols */ + pic16_dump_access(of, pic16_acs_udata); + + /* dump initialised data */ + pic16_dump_isection(of, rel_idataSymSet, 0); + pic16_dump_isection(of, fix_idataSymSet, 1); + + if(!pic16_options.xinst) { + /* dump internal registers */ + pic16_dump_int_registers(of, pic16_int_regs); + } + + /* dump generic section variables */ + pic16_dump_gsection(of, sectNames); + + /* dump other variables */ + pic16_dump_usection(of, pic16_rel_udata, 0); + pic16_dump_usection(of, pic16_fix_udata, 1); +} + + +/*-----------------------------------------------------------------*/ +/* computeSpillable - given a point find the spillable live ranges */ +/*-----------------------------------------------------------------*/ +static bitVect * +computeSpillable (iCode * ic) +{ + bitVect *spillable; + + debugLog ("%s\n", __FUNCTION__); + /* spillable live ranges are those that are live at this + point . the following categories need to be subtracted + from this set. + a) - those that are already spilt + b) - if being used by this one + c) - defined by this one */ + + spillable = bitVectCopy (ic->rlive); + spillable = + bitVectCplAnd (spillable, _G.spiltSet); /* those already spilt */ + spillable = + bitVectCplAnd (spillable, ic->uses); /* used in this one */ + bitVectUnSetBit (spillable, ic->defKey); + spillable = bitVectIntersect (spillable, _G.regAssigned); + return spillable; + +} + +/*-----------------------------------------------------------------*/ +/* noSpilLoc - return true if a variable has no spil location */ +/*-----------------------------------------------------------------*/ +static int +noSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + debugLog ("%s\n", __FUNCTION__); + return (SYM_SPIL_LOC (sym) ? 0 : 1); +} + +/*-----------------------------------------------------------------*/ +/* hasSpilLoc - will return 1 if the symbol has spil location */ +/*-----------------------------------------------------------------*/ +static int +hasSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + debugLog ("%s\n", __FUNCTION__); + return (SYM_SPIL_LOC (sym) ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* directSpilLoc - will return 1 if the splilocation is in direct */ +/*-----------------------------------------------------------------*/ +static int +directSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + debugLog ("%s\n", __FUNCTION__); + if (SYM_SPIL_LOC (sym) && + (IN_DIRSPACE (SPEC_OCLS (SYM_SPIL_LOC (sym)->etype)))) + return 1; + else + return 0; +} + +/*-----------------------------------------------------------------*/ +/* hasSpilLocnoUptr - will return 1 if the symbol has spil location */ +/* but is not used as a pointer */ +/*-----------------------------------------------------------------*/ +static int +hasSpilLocnoUptr (symbol * sym, eBBlock * ebp, iCode * ic) +{ + debugLog ("%s\n", __FUNCTION__); + return ((SYM_SPIL_LOC (sym) && !sym->uptr) ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* rematable - will return 1 if the remat flag is set */ +/*-----------------------------------------------------------------*/ +static int +rematable (symbol * sym, eBBlock * ebp, iCode * ic) +{ + debugLog ("%s\n", __FUNCTION__); + return sym->remat; +} + +/*-----------------------------------------------------------------*/ +/* notUsedInRemaining - not used or defined in remain of the block */ +/*-----------------------------------------------------------------*/ +static int +notUsedInRemaining (symbol * sym, eBBlock * ebp, iCode * ic) +{ + debugLog ("%s\n", __FUNCTION__); + return ((usedInRemaining (operandFromSymbol (sym), ic) ? 0 : 1) && + allDefsOutOfRange (sym->defs, ebp->fSeq, ebp->lSeq)); +} + +/*-----------------------------------------------------------------*/ +/* allLRs - return true for all */ +/*-----------------------------------------------------------------*/ +static int +allLRs (symbol * sym, eBBlock * ebp, iCode * ic) +{ + debugLog ("%s\n", __FUNCTION__); + return 1; +} + +/*-----------------------------------------------------------------*/ +/* liveRangesWith - applies function to a given set of live range */ +/*-----------------------------------------------------------------*/ +static set * +liveRangesWith (bitVect * lrs, int (func) (symbol *, eBBlock *, iCode *), + eBBlock * ebp, iCode * ic) +{ + set *rset = NULL; + int i; + + debugLog ("%s\n", __FUNCTION__); + if (!lrs || !lrs->size) + return NULL; + + for (i = 1; i < lrs->size; i++) + { + symbol *sym; + if (!bitVectBitValue (lrs, i)) + continue; + + /* if we don't find it in the live range + hash table we are in serious trouble */ + if (!(sym = hTabItemWithKey (liveRanges, i))) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "liveRangesWith could not find liveRange"); + exit (1); + } + + if (func (sym, ebp, ic) && bitVectBitValue (_G.regAssigned, sym->key)) + addSetHead (&rset, sym); + } + + return rset; +} + + +/*-----------------------------------------------------------------*/ +/* leastUsedLR - given a set determines which is the least used */ +/*-----------------------------------------------------------------*/ +static symbol * +leastUsedLR (set * sset) +{ + symbol *sym = NULL, *lsym = NULL; + + debugLog ("%s\n", __FUNCTION__); + sym = lsym = setFirstItem (sset); + + if (!lsym) + return NULL; + + for (; lsym; lsym = setNextItem (sset)) + { + + /* if usage is the same then prefer + the spill the smaller of the two */ + if (lsym->used == sym->used) + if (getSize (lsym->type) < getSize (sym->type)) + sym = lsym; + + /* if less usage */ + if (lsym->used < sym->used) + sym = lsym; + + } + + setToNull ((void *) &sset); + sym->blockSpil = 0; + return sym; +} + +/*-----------------------------------------------------------------*/ +/* noOverLap - will iterate through the list looking for over lap */ +/*-----------------------------------------------------------------*/ +static int +noOverLap (set * itmpStack, symbol * fsym) +{ + symbol *sym; + debugLog ("%s\n", __FUNCTION__); + + + for (sym = setFirstItem (itmpStack); sym; + sym = setNextItem (itmpStack)) + { + if (sym->liveTo > fsym->liveFrom) + return 0; + + } + + return 1; +} + +/*-----------------------------------------------------------------*/ +/* isFree - will return 1 if the a free spil location is found */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (isFree) +{ + symbol *sym = item; + V_ARG (symbol **, sloc); + V_ARG (symbol *, fsym); + + debugLog ("%s\n", __FUNCTION__); + /* if already found */ + if (*sloc) + return 0; + + /* if it is free && and the itmp assigned to + this does not have any overlapping live ranges + with the one currently being assigned and + the size can be accomodated */ + if (sym->isFree && + noOverLap (sym->usl.itmpStack, fsym) && + getSize (sym->type) >= getSize (fsym->type)) + { + *sloc = sym; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* spillLRWithPtrReg :- will spil those live ranges which use PTR */ +/*-----------------------------------------------------------------*/ +static void +spillLRWithPtrReg (symbol * forSym) +{ + symbol *lrsym; + regs *r0, *r1; + int k; + + debugLog ("%s\n", __FUNCTION__); + if (!_G.regAssigned || + bitVectIsZero (_G.regAssigned)) + return; + + r0 = pic16_regWithIdx (R0_IDX); + r1 = pic16_regWithIdx (R1_IDX); + + /* for all live ranges */ + for (lrsym = hTabFirstItem (liveRanges, &k); lrsym; + lrsym = hTabNextItem (liveRanges, &k)) + { + int j; + + /* if no registers assigned to it or + spilt */ + /* if it does not overlap with this then + not need to spill it */ + + if (lrsym->isspilt || !lrsym->nRegs || + (lrsym->liveTo < forSym->liveFrom)) + continue; + + /* go thru the registers : if it is either + r0 or r1 then spil it */ + for (j = 0; j < lrsym->nRegs; j++) + if (lrsym->regs[j] == r0 || + lrsym->regs[j] == r1) + { + spillThis (lrsym); + break; + } + } + +} + +/*-----------------------------------------------------------------*/ +/* createStackSpil - create a location on the stack to spil */ +/*-----------------------------------------------------------------*/ +static symbol * +createStackSpil (symbol * sym) +{ + symbol *sloc = NULL; + int useXstack, model, noOverlay; + + char slocBuffer[30]; + debugLog ("%s\n", __FUNCTION__); + + /* first go try and find a free one that is already + existing on the stack */ + if (applyToSet (_G.stackSpil, isFree, &sloc, sym)) + { + /* found a free one : just update & return */ + SYM_SPIL_LOC (sym) = sloc; + sym->stackSpil = 1; + sloc->isFree = 0; + addSetHead (&sloc->usl.itmpStack, sym); + return sym; + } + + /* could not then have to create one , this is the hard part + we need to allocate this on the stack : this is really a + hack!! but cannot think of anything better at this time */ + + if (sprintf (slocBuffer, "sloc%d", _G.slocNum++) >= sizeof (slocBuffer)) + { + fprintf (stderr, "kkkInternal error: slocBuffer overflowed: %s:%d\n", + __FILE__, __LINE__); + exit (1); + } + + sloc = newiTemp (slocBuffer); + + /* set the type to the spilling symbol */ + sloc->type = copyLinkChain (sym->type); + sloc->etype = getSpec (sloc->type); + SPEC_SCLS (sloc->etype) = S_DATA; + SPEC_EXTR (sloc->etype) = 0; + SPEC_STAT (sloc->etype) = 0; + + /* we don't allow it to be allocated` + onto the external stack since : so we + temporarily turn it off ; we also + turn off memory model to prevent + the spil from going to the external storage + and turn off overlaying + */ + + useXstack = options.useXstack; + model = options.model; + noOverlay = options.noOverlay; + options.noOverlay = 1; + options.model = options.useXstack = 0; + + allocLocal (sloc); + + options.useXstack = useXstack; + options.model = model; + options.noOverlay = noOverlay; + sloc->isref = 1; /* to prevent compiler warning */ + + /* if it is on the stack then update the stack */ + if (IN_STACK (sloc->etype)) + { + currFunc->stack += getSize (sloc->type); + _G.stackExtend += getSize (sloc->type); + } + else + _G.dataExtend += getSize (sloc->type); + + /* add it to the _G.stackSpil set */ + addSetHead (&_G.stackSpil, sloc); + SYM_SPIL_LOC (sym) = sloc; + sym->stackSpil = 1; + + /* add it to the set of itempStack set + of the spill location */ + addSetHead (&sloc->usl.itmpStack, sym); + return sym; +} + +/*-----------------------------------------------------------------*/ +/* isSpiltOnStack - returns true if the spil location is on stack */ +/*-----------------------------------------------------------------*/ +static bool +isSpiltOnStack (symbol * sym) +{ + sym_link *etype; + + debugLog ("%s\n", __FUNCTION__); + if (!sym) + return FALSE; + + if (!sym->isspilt) + return FALSE; + +/* if (sym->_G.stackSpil) */ +/* return TRUE; */ + + if (!SYM_SPIL_LOC (sym)) + return FALSE; + + etype = getSpec (SYM_SPIL_LOC (sym)->type); + if (IN_STACK (etype)) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* spillThis - spils a specific operand */ +/*-----------------------------------------------------------------*/ +static void +spillThis (symbol * sym) +{ + int i; + debugLog ("%s : %s\n", __FUNCTION__, sym->rname); + + /* if this is rematerializable or has a spillLocation + we are okay, else we need to create a spillLocation + for it */ + if (!(sym->remat || SYM_SPIL_LOC (sym))) + createStackSpil (sym); + + + /* mark it has spilt & put it in the spilt set */ + sym->isspilt = 1; + _G.spiltSet = bitVectSetBit (_G.spiltSet, sym->key); + + bitVectUnSetBit (_G.regAssigned, sym->key); + + for (i = 0; i < sym->nRegs; i++) + + if (sym->regs[i]) + { + freeReg (sym->regs[i]); + sym->regs[i] = NULL; + } + + /* if spilt on stack then free up r0 & r1 + if they could have been assigned to some + LIVE ranges */ + if (!pic16_ptrRegReq && isSpiltOnStack (sym)) + { + pic16_ptrRegReq++; + spillLRWithPtrReg (sym); + } + + if (SYM_SPIL_LOC (sym) && !sym->remat) + SYM_SPIL_LOC (sym)->allocreq = 1; + return; +} + +/*-----------------------------------------------------------------*/ +/* selectSpil - select a iTemp to spil : rather a simple procedure */ +/*-----------------------------------------------------------------*/ +static symbol * +selectSpil (iCode * ic, eBBlock * ebp, symbol * forSym) +{ + bitVect *lrcs = NULL; + set *selectS; + symbol *sym; + + debugLog ("%s\n", __FUNCTION__); + /* get the spillable live ranges */ + lrcs = computeSpillable (ic); + + /* get all live ranges that are rematerizable */ + if ((selectS = liveRangesWith (lrcs, rematable, ebp, ic))) + { + + /* return the least used of these */ + return leastUsedLR (selectS); + } + + /* get live ranges with spillLocations in direct space */ + if ((selectS = liveRangesWith (lrcs, directSpilLoc, ebp, ic))) + { + sym = leastUsedLR (selectS); + strcpy (sym->rname, (SYM_SPIL_LOC (sym)->rname[0] ? + SYM_SPIL_LOC (sym)->rname : + SYM_SPIL_LOC (sym)->name)); + sym->spildir = 1; + /* mark it as allocation required */ + SYM_SPIL_LOC (sym)->allocreq = 1; + return sym; + } + + /* if the symbol is local to the block then */ + if (forSym->liveTo < ebp->lSeq) + { + + /* check if there are any live ranges allocated + to registers that are not used in this block */ + if (!_G.blockSpil && (selectS = liveRangesWith (lrcs, notUsedInBlock, ebp, ic))) + { + sym = leastUsedLR (selectS); + /* if this is not rematerializable */ + if (!sym->remat) + { + _G.blockSpil++; + sym->blockSpil = 1; + } + return sym; + } + + /* check if there are any live ranges that not + used in the remainder of the block */ + if (!_G.blockSpil && + !isiCodeInFunctionCall (ic) && + (selectS = liveRangesWith (lrcs, notUsedInRemaining, ebp, ic))) + { + sym = leastUsedLR (selectS); + if (!sym->remat) + { + sym->remainSpil = 1; + _G.blockSpil++; + } + return sym; + } + } + + /* find live ranges with spillocation && not used as pointers */ + if ((selectS = liveRangesWith (lrcs, hasSpilLocnoUptr, ebp, ic))) + { + + sym = leastUsedLR (selectS); + /* mark this as allocation required */ + SYM_SPIL_LOC (sym)->allocreq = 1; + return sym; + } + + /* find live ranges with spillocation */ + if ((selectS = liveRangesWith (lrcs, hasSpilLoc, ebp, ic))) + { + + sym = leastUsedLR (selectS); + SYM_SPIL_LOC (sym)->allocreq = 1; + return sym; + } + + /* couldn't find then we need to create a spil + location on the stack , for which one? the least + used ofcourse */ + if ((selectS = liveRangesWith (lrcs, noSpilLoc, ebp, ic))) + { + + /* return a created spil location */ + sym = createStackSpil (leastUsedLR (selectS)); + SYM_SPIL_LOC (sym)->allocreq = 1; + return sym; + } + + /* this is an extreme situation we will spill + this one : happens very rarely but it does happen */ + spillThis (forSym); + return forSym; + +} + +/*-----------------------------------------------------------------*/ +/* spilSomething - spil some variable & mark registers as free */ +/*-----------------------------------------------------------------*/ +static bool +spilSomething (iCode * ic, eBBlock * ebp, symbol * forSym) +{ + symbol *ssym; + int i; + + debugLog ("%s\n", __FUNCTION__); + /* get something we can spil */ + ssym = selectSpil (ic, ebp, forSym); + + /* mark it as spilt */ + ssym->isspilt = 1; + _G.spiltSet = bitVectSetBit (_G.spiltSet, ssym->key); + + /* mark it as not register assigned & + take it away from the set */ + bitVectUnSetBit (_G.regAssigned, ssym->key); + + /* mark the registers as free */ + for (i = 0; i < ssym->nRegs; i++) + if (ssym->regs[i]) + freeReg (ssym->regs[i]); + + /* if spilt on stack then free up r0 & r1 + if they could have been assigned to as gprs */ + if (!pic16_ptrRegReq && isSpiltOnStack (ssym)) + { + pic16_ptrRegReq++; + spillLRWithPtrReg (ssym); + } + + /* if this was a block level spil then insert push & pop + at the start & end of block respectively */ + if (ssym->blockSpil) + { + iCode *nic = newiCode (IPUSH, operandFromSymbol (ssym), NULL); + /* add push to the start of the block */ + addiCodeToeBBlock (ebp, nic, (ebp->sch->op == LABEL ? + ebp->sch->next : ebp->sch)); + nic = newiCode (IPOP, operandFromSymbol (ssym), NULL); + /* add pop to the end of the block */ + addiCodeToeBBlock (ebp, nic, NULL); + } + + /* if spilt because not used in the remainder of the + block then add a push before this instruction and + a pop at the end of the block */ + if (ssym->remainSpil) + { + + iCode *nic = newiCode (IPUSH, operandFromSymbol (ssym), NULL); + /* add push just before this instruction */ + addiCodeToeBBlock (ebp, nic, ic); + + nic = newiCode (IPOP, operandFromSymbol (ssym), NULL); + /* add pop to the end of the block */ + addiCodeToeBBlock (ebp, nic, NULL); + } + + if (ssym == forSym) + return FALSE; + else + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* getRegPtr - will try for PTR if not a GPR type if not spil */ +/*-----------------------------------------------------------------*/ +static regs * +getRegPtr (iCode * ic, eBBlock * ebp, symbol * sym) +{ + regs *reg; + int j; + + debugLog ("%s\n", __FUNCTION__); +tryAgain: + /* try for a ptr type */ + if ((reg = allocReg (REG_PTR))) + return reg; + + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + /* we have to spil */ + if (!spilSomething (ic, ebp, sym)) + return NULL; + + /* make sure partially assigned registers aren't reused */ + for (j=0; j<=sym->nRegs; j++) + if (sym->regs[j]) + sym->regs[j]->isFree = 0; + + /* this looks like an infinite loop but + in really selectSpil will abort */ + goto tryAgain; +} + +/*-----------------------------------------------------------------*/ +/* getRegGpr - will try for GPR if not spil */ +/*-----------------------------------------------------------------*/ +static regs * +getRegGpr (iCode * ic, eBBlock * ebp, symbol * sym) +{ + regs *reg; + int j; + + debugLog ("%s\n", __FUNCTION__); +tryAgain: + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + return reg; + + if (!pic16_ptrRegReq) + if ((reg = allocReg (REG_PTR))) + return reg; + + /* we have to spil */ + if (!spilSomething (ic, ebp, sym)) + return NULL; + + /* make sure partially assigned registers aren't reused */ + for (j=0; j<=sym->nRegs; j++) + if (sym->regs[j]) + sym->regs[j]->isFree = 0; + + /* this looks like an infinite loop but + in really selectSpil will abort */ + goto tryAgain; +} + +/*-----------------------------------------------------------------*/ +/* symHasReg - symbol has a given register */ +/*-----------------------------------------------------------------*/ +static bool +symHasReg (symbol * sym, regs * reg) +{ + int i; + + debugLog ("%s\n", __FUNCTION__); + for (i = 0; i < sym->nRegs; i++) + if (sym->regs[i] == reg) + return TRUE; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* deassignLRs - check the live to and if they have registers & are */ +/* not spilt then free up the registers */ +/*-----------------------------------------------------------------*/ +static void +deassignLRs (iCode * ic, eBBlock * ebp) +{ + symbol *sym; + int k; + symbol *result; + + debugLog ("%s\n", __FUNCTION__); + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) + { + + symbol *psym = NULL; + /* if it does not end here */ + if (sym->liveTo > ic->seq) + continue; + + /* if it was spilt on stack then we can + mark the stack spil location as free */ + if (sym->isspilt) + { + if (sym->stackSpil) + { + SYM_SPIL_LOC (sym)->isFree = 1; + sym->stackSpil = 0; + } + continue; + } + + if (!bitVectBitValue (_G.regAssigned, sym->key)) + continue; + + /* special case for shifting: there is a case where shift count + * can be allocated in the same register as the result, so do not + * free right registers if same as result registers, cause genShiftLeft + * will fail -- VR */ + if(ic->op == LEFT_OP) + continue; + + /* special case check if this is an IFX & + the privious one was a pop and the + previous one was not spilt then keep track + of the symbol */ + if (ic->op == IFX && ic->prev && + ic->prev->op == IPOP && + !ic->prev->parmPush && + !OP_SYMBOL (IC_LEFT (ic->prev))->isspilt) + psym = OP_SYMBOL (IC_LEFT (ic->prev)); + + if (sym->nRegs) + { + int i = 0; + + bitVectUnSetBit (_G.regAssigned, sym->key); + + /* if the result of this one needs registers + and does not have it then assign it right + away */ + if (IC_RESULT (ic) && + !(SKIP_IC2 (ic) || /* not a special icode */ + ic->op == JUMPTABLE || + ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP || + ic->op == RETURN || + POINTER_SET (ic)) && + (result = OP_SYMBOL (IC_RESULT (ic))) && /* has a result */ + result->liveTo > ic->seq && /* and will live beyond this */ + result->liveTo <= ebp->lSeq && /* does not go beyond this block */ + result->liveFrom == ic->seq && /* does not start before here */ + result->regType == sym->regType && /* same register types */ + result->nRegs && /* which needs registers */ + !result->isspilt && /* and does not already have them */ + !result->remat && + !bitVectBitValue (_G.regAssigned, result->key) && + /* the number of free regs + number of regs in this LR + can accomodate the what result Needs */ + ((nfreeRegsType (result->regType) + + sym->nRegs) >= result->nRegs) + ) + { + + for (i = 0; i < result->nRegs; i++) + if (i < sym->nRegs) + result->regs[i] = sym->regs[i]; + else + result->regs[i] = getRegGpr (ic, ebp, result); + + _G.regAssigned = bitVectSetBit (_G.regAssigned, result->key); + + } + + /* free the remaining */ + for (; i < sym->nRegs; i++) + { + if (psym) + { + if (!symHasReg (psym, sym->regs[i])) + freeReg (sym->regs[i]); + } + else + freeReg (sym->regs[i]); + } + } + } +} + + +/*-----------------------------------------------------------------*/ +/* reassignLR - reassign this to registers */ +/*-----------------------------------------------------------------*/ +static void +reassignLR (operand * op) +{ + symbol *sym = OP_SYMBOL (op); + int i; + + debugLog ("%s\n", __FUNCTION__); + /* not spilt any more */ + sym->isspilt = sym->blockSpil = sym->remainSpil = 0; + bitVectUnSetBit (_G.spiltSet, sym->key); + + _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); + + _G.blockSpil--; + + for (i = 0; i < sym->nRegs; i++) + sym->regs[i]->isFree = 0; +} + +/*-----------------------------------------------------------------*/ +/* willCauseSpill - determines if allocating will cause a spill */ +/*-----------------------------------------------------------------*/ +static int +willCauseSpill (int nr, int rt) +{ + debugLog ("%s\n", __FUNCTION__); + /* first check if there are any avlb registers + of te type required */ + if (rt == REG_PTR) + { + /* special case for pointer type + if pointer type not avlb then + check for type gpr */ + if (nFreeRegs (rt) >= nr) + return 0; + if (nFreeRegs (REG_GPR) >= nr) + return 0; + } + else + { + if (pic16_ptrRegReq) + { + if (nFreeRegs (rt) >= nr) + return 0; + } + else + { + if (nFreeRegs (REG_PTR) + + nFreeRegs (REG_GPR) >= nr) + return 0; + } + } + + debugLog (" ... yep it will (cause a spill)\n"); + /* it will cause a spil */ + return 1; +} + +/*-----------------------------------------------------------------*/ +/* positionRegs - the allocator can allocate same registers to res- */ +/* ult and operand, if this happens make sure they are in the same */ +/* position as the operand otherwise chaos results */ +/*-----------------------------------------------------------------*/ +static void +positionRegs (symbol * result, symbol * opsym, int lineno) +{ + int count = min (result->nRegs, opsym->nRegs); + int i, j = 0, shared = 0; + + debugLog ("%s\n", __FUNCTION__); + /* if the result has been spilt then cannot share */ + if (opsym->isspilt) + return; +again: + shared = 0; + /* first make sure that they actually share */ + for (i = 0; i < count; i++) + { + for (j = 0; j < count; j++) + { + if (result->regs[i] == opsym->regs[j] && i != j) + { + shared = 1; + goto xchgPositions; + } + } + } +xchgPositions: + if (shared) + { + regs *tmp = result->regs[i]; + result->regs[i] = result->regs[j]; + result->regs[j] = tmp; + goto again; + } +} + +/*------------------------------------------------------------------*/ +/* verifyRegsAssigned - make sure an iTemp is properly initialized; */ +/* it should either have registers or have beed spilled. Otherwise, */ +/* there was an uninitialized variable, so just spill this to get */ +/* the operand in a valid state. */ +/*------------------------------------------------------------------*/ +static void +verifyRegsAssigned (operand *op, iCode * ic) +{ + symbol * sym; + + if (!op) return; + if (!IS_ITEMP (op)) return; + + sym = OP_SYMBOL (op); + if (sym->isspilt) return; + if (!sym->nRegs) return; + if (sym->regs[0]) return; + + werrorfl (ic->filename, ic->lineno, W_LOCAL_NOINIT, + sym->prereqv ? sym->prereqv->name : sym->name); + spillThis (sym); +} + + +/*-----------------------------------------------------------------*/ +/* serialRegAssign - serially allocate registers to the variables */ +/*-----------------------------------------------------------------*/ +static void +serialRegAssign (eBBlock ** ebbs, int count) +{ + int i; + iCode *ic; + + debugLog ("%s\n", __FUNCTION__); + /* for all blocks */ + for (i = 0; i < count; i++) + { + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + /* of all instructions do */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + + debugLog (" op: %s\n", pic16_decodeOp (ic->op)); + + if(IC_RESULT(ic) && !IS_ITEMP( IC_RESULT(ic))) + pic16_allocDirReg(IC_RESULT(ic)); + + if(IC_LEFT(ic) && !IS_ITEMP( IC_LEFT(ic))) + pic16_allocDirReg(IC_LEFT(ic)); + + if(IC_RIGHT(ic) && !IS_ITEMP( IC_RIGHT(ic))) + pic16_allocDirReg(IC_RIGHT(ic)); + + /* if this is an ipop that means some live + range will have to be assigned again */ + if (ic->op == IPOP) + reassignLR (IC_LEFT (ic)); + + /* if result is present && is a true symbol */ + if (IC_RESULT (ic) && ic->op != IFX && + IS_TRUE_SYMOP (IC_RESULT (ic))) + OP_SYMBOL (IC_RESULT (ic))->allocreq = 1; + + /* take away registers from live + ranges that end at this instruction */ + deassignLRs (ic, ebbs[i]); + + /* some don't need registers */ + if (SKIP_IC2 (ic) || + ic->op == JUMPTABLE || + ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP || + (IC_RESULT (ic) && POINTER_SET (ic))) + continue; + + /* now we need to allocate registers + only for the result */ + if (IC_RESULT (ic)) + { + symbol *sym = OP_SYMBOL (IC_RESULT (ic)); + bitVect *spillable; + int willCS; + int j; + int ptrRegSet = 0; + + /* Make sure any spill location is definately allocated */ + if (sym->isspilt && !sym->remat && SYM_SPIL_LOC (sym) && + !SYM_SPIL_LOC (sym)->allocreq) + { + SYM_SPIL_LOC (sym)->allocreq++; + } + + /* if it does not need or is spilt + or is already assigned to registers + or will not live beyond this instructions */ + if (!sym->nRegs || + sym->isspilt || + bitVectBitValue (_G.regAssigned, sym->key) || + sym->liveTo <= ic->seq) + continue; + + /* if some liverange has been spilt at the block level + and this one live beyond this block then spil this + to be safe */ + if (_G.blockSpil && sym->liveTo > ebbs[i]->lSeq) + { + spillThis (sym); + continue; + } + /* if trying to allocate this will cause + a spill and there is nothing to spill + or this one is rematerializable then + spill this one */ + willCS = willCauseSpill (sym->nRegs, sym->regType); + + /* explicit turn off register spilling */ + willCS = 0; + + spillable = computeSpillable (ic); + if (sym->remat || + (willCS && bitVectIsZero (spillable))) + { + + spillThis (sym); + continue; + + } + + /* If the live range preceeds the point of definition + then ideally we must take into account registers that + have been allocated after sym->liveFrom but freed + before ic->seq. This is complicated, so spill this + symbol instead and let fillGaps handle the allocation. */ + if (sym->liveFrom < ic->seq) + { + spillThis (sym); + continue; + } + + /* if it has a spillocation & is used less than + all other live ranges then spill this */ + if (willCS) { + if (SYM_SPIL_LOC (sym)) { + symbol *leastUsed = leastUsedLR (liveRangesWith (spillable, + allLRs, ebbs[i], ic)); + if (leastUsed && leastUsed->used > sym->used) { + spillThis (sym); + continue; + } + } else { + /* if none of the liveRanges have a spillLocation then better + to spill this one than anything else already assigned to registers */ + if (liveRangesWith(spillable,noSpilLoc,ebbs[i],ic)) { + /* if this is local to this block then we might find a block spil */ + if (!(sym->liveFrom >= ebbs[i]->fSeq && sym->liveTo <= ebbs[i]->lSeq)) { + spillThis (sym); + continue; + } + } + } + } + + if (ic->op == RECEIVE) + debugLog ("When I get clever, I'll optimize the receive logic\n"); + + if(POINTER_GET(ic) && IS_BITFIELD(getSpec(operandType(IC_RESULT(ic)))) + && (SPEC_BLEN(getSpec(operandType(IC_RESULT(ic))))==1) + && (ic->next->op == IFX) + && (OP_LIVETO(IC_RESULT(ic)) == ic->next->seq)) { + + /* skip register allocation since none will be used */ + for(j=0;jnRegs;j++) + sym->regs[j] = newReg(REG_TMP, PO_GPR_TEMP, 0, "bad", 1, 0, NULL); +// OP_SYMBOL(IC_RESULT(ic))->nRegs = 0; + + continue; + } + + /* if we need ptr regs for the right side + then mark it */ + if (POINTER_GET (ic) && IS_SYMOP( IC_LEFT(ic) ) && getSize (OP_SYMBOL (IC_LEFT (ic))->type) + <= (unsigned) PTRSIZE) + { + pic16_ptrRegReq++; + ptrRegSet = 1; + } + /* else we assign registers to it */ + _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); + + if(debugF) + bitVectDebugOn(_G.regAssigned, debugF); + + for (j = 0; j < sym->nRegs; j++) + { + if (sym->regType == REG_PTR) + sym->regs[j] = getRegPtr (ic, ebbs[i], sym); + else + sym->regs[j] = getRegGpr (ic, ebbs[i], sym); + + /* if the allocation falied which means + this was spilt then break */ + if (!sym->regs[j]) + break; + } + debugLog (" %d - \n", __LINE__); + + /* if it shares registers with operands make sure + that they are in the same position */ + if (IC_LEFT (ic) && IS_SYMOP (IC_LEFT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->nRegs && ic->op != '=') + positionRegs (OP_SYMBOL (IC_RESULT (ic)), + OP_SYMBOL (IC_LEFT (ic)), ic->lineno); + /* do the same for the right operand */ + if (IC_RIGHT (ic) && IS_SYMOP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->nRegs && ic->op != '=') + positionRegs (OP_SYMBOL (IC_RESULT (ic)), + OP_SYMBOL (IC_RIGHT (ic)), ic->lineno); + + debugLog (" %d - \n", __LINE__); + if (ptrRegSet) + { + debugLog (" %d - \n", __LINE__); + pic16_ptrRegReq--; + ptrRegSet = 0; + } + + } + } + } + + /* Check for and fix any problems with uninitialized operands */ + for (i = 0; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + if (SKIP_IC2 (ic)) + continue; + + if (ic->op == IFX) + { + verifyRegsAssigned (IC_COND (ic), ic); + continue; + } + + if (ic->op == JUMPTABLE) + { + verifyRegsAssigned (IC_JTCOND (ic), ic); + continue; + } + + verifyRegsAssigned (IC_RESULT (ic), ic); + verifyRegsAssigned (IC_LEFT (ic), ic); + verifyRegsAssigned (IC_RIGHT (ic), ic); + } + } + +} + +/*-----------------------------------------------------------------*/ +/* rUmaskForOp :- returns register mask for an operand */ +/*-----------------------------------------------------------------*/ +static bitVect * +rUmaskForOp (operand * op) +{ + bitVect *rumask; + symbol *sym; + int j; + + debugLog ("%s\n", __FUNCTION__); + /* only temporaries are assigned registers */ + if (!IS_ITEMP (op)) + return NULL; + + sym = OP_SYMBOL (op); + + /* if spilt or no registers assigned to it + then nothing */ + if (sym->isspilt || !sym->nRegs) + return NULL; + + rumask = newBitVect (pic16_nRegs); + + for (j = 0; j < sym->nRegs; j++) + { + rumask = bitVectSetBit (rumask, + sym->regs[j]->rIdx); + } + + return rumask; +} + +/*-----------------------------------------------------------------*/ +/* regsUsedIniCode :- returns bit vector of registers used in iCode */ +/*-----------------------------------------------------------------*/ +static bitVect * +regsUsedIniCode (iCode * ic) +{ + bitVect *rmask = newBitVect (pic16_nRegs); + + debugLog ("%s\n", __FUNCTION__); + /* do the special cases first */ + if (ic->op == IFX) + { + rmask = bitVectUnion (rmask, + rUmaskForOp (IC_COND (ic))); + goto ret; + } + + /* for the jumptable */ + if (ic->op == JUMPTABLE) + { + rmask = bitVectUnion (rmask, + rUmaskForOp (IC_JTCOND (ic))); + + goto ret; + } + + /* of all other cases */ + if (IC_LEFT (ic)) + rmask = bitVectUnion (rmask, + rUmaskForOp (IC_LEFT (ic))); + + + if (IC_RIGHT (ic)) + rmask = bitVectUnion (rmask, + rUmaskForOp (IC_RIGHT (ic))); + + if (IC_RESULT (ic)) + rmask = bitVectUnion (rmask, + rUmaskForOp (IC_RESULT (ic))); + +ret: + return rmask; +} + +/*-----------------------------------------------------------------*/ +/* createRegMask - for each instruction will determine the regsUsed */ +/*-----------------------------------------------------------------*/ +static void +createRegMask (eBBlock ** ebbs, int count) +{ + int i; + + debugLog ("%s\n", __FUNCTION__); + /* for all blocks */ + for (i = 0; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + /* for all instructions */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + + int j; + + if (SKIP_IC2 (ic) || !ic->rlive) + continue; + + /* first mark the registers used in this + instruction */ + ic->rUsed = regsUsedIniCode (ic); + _G.funcrUsed = bitVectUnion (_G.funcrUsed, ic->rUsed); + + /* now create the register mask for those + registers that are in use : this is a + super set of ic->rUsed */ + ic->rMask = newBitVect (pic16_nRegs + 1); + + /* for all live Ranges alive at this point */ + for (j = 1; j < ic->rlive->size; j++) + { + symbol *sym; + int k; + + /* if not alive then continue */ + if (!bitVectBitValue (ic->rlive, j)) + continue; + + /* find the live range we are interested in */ + if (!(sym = hTabItemWithKey (liveRanges, j))) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "createRegMask cannot find live range"); + exit (0); + } + + /* if no register assigned to it */ + if (!sym->nRegs || sym->isspilt) + continue; + + /* for all the registers allocated to it */ + for (k = 0; k < sym->nRegs; k++) + if (sym->regs[k]) + ic->rMask = + bitVectSetBit (ic->rMask, sym->regs[k]->rIdx); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* rematStr - returns the rematerialized string for a remat var */ +/*-----------------------------------------------------------------*/ +static symbol * +rematStr (symbol * sym) +{ + iCode *ic = sym->rematiCode; + symbol *psym = NULL; + int offset = 0; + + debugLog ("%s\n", __FUNCTION__); + + while (ic->op == '+' || ic->op == '-') { + /* if plus or minus print the right hand side */ + + offset += (int) operandLitValue (IC_RIGHT (ic)); + ic = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + } // while + + psym = newSymbol (OP_SYMBOL (IC_LEFT (ic))->rname, 1); + psym->offset = offset; + return psym; +} + +#if 0 +/*-----------------------------------------------------------------*/ +/* rematStr - returns the rematerialized string for a remat var */ +/*-----------------------------------------------------------------*/ +static char * +rematStr (symbol * sym) +{ + char *s = buffer; + iCode *ic = sym->rematiCode; + + debugLog ("%s\n", __FUNCTION__); + while (1) + { + + printf ("%s\n", s); + /* if plus or minus print the right hand side */ +/* + if (ic->op == '+' || ic->op == '-') { + sprintf(s,"0x%04x %c ",(int) operandLitValue(IC_RIGHT(ic)), + ic->op ); + s += strlen(s); + ic = OP_SYMBOL(IC_LEFT(ic))->rematiCode; + continue ; + } + */ + if (ic->op == '+' || ic->op == '-') + { + iCode *ric = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + sprintf (s, "(%s %c 0x%04x)", + OP_SYMBOL (IC_LEFT (ric))->rname, + ic->op, + (int) operandLitValue (IC_RIGHT (ic))); + + //s += strlen(s); + //ic = OP_SYMBOL(IC_LEFT(ic))->rematiCode; + //continue ; + //fprintf(stderr, "ralloc.c:%d OOPS %s\n",__LINE__,s); + return buffer; + } + + /* we reached the end */ + sprintf (s, "%s", OP_SYMBOL (IC_LEFT (ic))->rname); + break; + } + + printf ("%s\n", buffer); + return buffer; +} +#endif + +/*-----------------------------------------------------------------*/ +/* regTypeNum - computes the type & number of registers required */ +/*-----------------------------------------------------------------*/ +static void +regTypeNum () +{ + symbol *sym; + int k; + iCode *ic; + + debugLog ("%s\n", __FUNCTION__); + /* for each live range do */ + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) { + + debugLog (" %d - %s\n", __LINE__, sym->rname); + //fprintf(stderr," %d - %s\n", __LINE__, sym->rname); + + /* if used zero times then no registers needed */ + if ((sym->liveTo - sym->liveFrom) == 0) + continue; + + + /* if the live range is a temporary */ + if (sym->isitmp) { + + debugLog (" %d - itemp register\n", __LINE__); + + /* if the type is marked as a conditional */ + if (sym->regType == REG_CND) + continue; + + /* if used in return only then we don't + need registers */ + if (sym->ruonly || sym->accuse) { + if (IS_AGGREGATE (sym->type) || sym->isptr) + sym->type = aggrToPtr (sym->type, FALSE); + debugLog (" %d - no reg needed - used as a return\n", __LINE__); + continue; + } + + /* if the symbol has only one definition & + that definition is a get_pointer and the + pointer we are getting is rematerializable and + in "data" space */ + + if (bitVectnBitsOn (sym->defs) == 1 && + (ic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (sym->defs))) && + POINTER_GET (ic) && + !IS_BITVAR (sym->etype) && + (aggrToPtrDclType (operandType (IC_LEFT (ic)), FALSE) == POINTER)) { + +// continue; /* FIXME -- VR */ + if (ptrPseudoSymSafe (sym, ic)) { + + symbol *psym; + + debugLog (" %d - \n", __LINE__); + + /* create a psuedo symbol & force a spil */ + //X symbol *psym = newSymbol (rematStr (OP_SYMBOL (IC_LEFT (ic))), 1); + psym = rematStr (OP_SYMBOL (IC_LEFT (ic))); + psym->type = sym->type; + psym->etype = sym->etype; + psym->psbase = ptrBaseRematSym (OP_SYMBOL (IC_LEFT (ic))); + strcpy (psym->rname, psym->name); + sym->isspilt = 1; + SYM_SPIL_LOC (sym) = psym; + continue; + } + + /* if in data space or idata space then try to + allocate pointer register */ + + } + + /* if not then we require registers */ + sym->nRegs = ((IS_AGGREGATE (sym->type) || sym->isptr) ? + getSize (sym->type = aggrToPtr (sym->type, FALSE)) : + getSize (sym->type)); + + +#if 0 + if(IS_PTR_CONST (sym->type)) { +#else + if(IS_CODEPTR (sym->type)) { +#endif + // what IS this ???? (HJD) + debugLog (" %d const pointer type requires %d registers, changing to 3\n",__LINE__,sym->nRegs); // patch 14 + sym->nRegs = 3; // patch 14 + } + + if (sym->nRegs > 4) { + fprintf (stderr, "allocated more than 4 or 0 registers for type "); + printTypeChain (sym->type, stderr); + fprintf (stderr, "\n"); + } + + /* determine the type of register required */ + if (sym->nRegs == 1 && + IS_PTR (sym->type) && + sym->uptr) + sym->regType = REG_PTR; + else + sym->regType = REG_GPR; + + + debugLog (" reg name %s, reg type %s\n", sym->rname, debugLogRegType (sym->regType)); + + } + else + /* for the first run we don't provide */ + /* registers for true symbols we will */ + /* see how things go */ + sym->nRegs = 0; + + } + +} +static DEFSETFUNC (markRegFree) +{ + ((regs *)item)->isFree = 1; +// ((regs *)item)->wasUsed = 0; + + return 0; +} + +DEFSETFUNC (pic16_deallocReg) +{ + fprintf(stderr,"deallocting register %s\n",((regs *)item)->name); + ((regs *)item)->isFree = 1; + ((regs *)item)->wasUsed = 0; + + return 0; +} +/*-----------------------------------------------------------------*/ +/* freeAllRegs - mark all registers as free */ +/*-----------------------------------------------------------------*/ +void +pic16_freeAllRegs () +{ + debugLog ("%s\n", __FUNCTION__); + + applyToSet(pic16_dynAllocRegs,markRegFree); + applyToSet(pic16_dynStackRegs,markRegFree); +} + +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ +void +pic16_deallocateAllRegs () +{ + debugLog ("%s\n", __FUNCTION__); + + applyToSet(pic16_dynAllocRegs,pic16_deallocReg); +} + + +/*-----------------------------------------------------------------*/ +/* deallocStackSpil - this will set the stack pointer back */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (deallocStackSpil) +{ + symbol *sym = item; + + debugLog ("%s\n", __FUNCTION__); + deallocLocal (sym); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* farSpacePackable - returns the packable icode for far variables */ +/*-----------------------------------------------------------------*/ +static iCode * +farSpacePackable (iCode * ic) +{ + iCode *dic; + + debugLog ("%s\n", __FUNCTION__); + /* go thru till we find a definition for the + symbol on the right */ + for (dic = ic->prev; dic; dic = dic->prev) + { + + /* if the definition is a call then no */ + if ((dic->op == CALL || dic->op == PCALL) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + { + return NULL; + } + + /* if shift by unknown amount then not */ + if ((dic->op == LEFT_OP || dic->op == RIGHT_OP) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + return NULL; + + /* if pointer get and size > 1 */ + if (POINTER_GET (dic) && + getSize (aggrToPtr (operandType (IC_LEFT (dic)), FALSE)) > 1) + return NULL; + + if (POINTER_SET (dic) && + getSize (aggrToPtr (operandType (IC_RESULT (dic)), FALSE)) > 1) + return NULL; + + /* if any three is a true symbol in far space */ + if (IC_RESULT (dic) && + IS_TRUE_SYMOP (IC_RESULT (dic)) && + isOperandInFarSpace (IC_RESULT (dic))) + return NULL; + + if (IC_RIGHT (dic) && + IS_TRUE_SYMOP (IC_RIGHT (dic)) && + isOperandInFarSpace (IC_RIGHT (dic)) && + !isOperandEqual (IC_RIGHT (dic), IC_RESULT (ic))) + return NULL; + + if (IC_LEFT (dic) && + IS_TRUE_SYMOP (IC_LEFT (dic)) && + isOperandInFarSpace (IC_LEFT (dic)) && + !isOperandEqual (IC_LEFT (dic), IC_RESULT (ic))) + return NULL; + + if (isOperandEqual (IC_RIGHT (ic), IC_RESULT (dic))) + { + if ((dic->op == LEFT_OP || + dic->op == RIGHT_OP || + dic->op == '-') && + IS_OP_LITERAL (IC_RIGHT (dic))) + return NULL; + else + return dic; + } + } + + return NULL; +} + +#if 0 +static int packRegsForPointerGet(iCode *ic, eBBlock *ebp) +{ + iCode *dic, *sic; + + debugLog ("%d\t%s\n", __LINE__, __FUNCTION__); + debugLog ("ic->op = %s\n", pic16_decodeOp( ic->op ) ); + debugAopGet (" result:", IC_RESULT (ic)); + debugAopGet (" left:", IC_LEFT (ic)); + debugAopGet (" right:", IC_RIGHT (ic)); + + dic = ic->prev; + if((dic->op == '=') + && ( +} +#endif + + +void replaceOperandWithOperand(eBBlock *ebp, iCode *ic, operand *src, iCode *dic, operand *dst); + +/*-----------------------------------------------------------------*/ +/* packRegsForAssign - register reduction for assignment */ +/*-----------------------------------------------------------------*/ +static int +packRegsForAssign (iCode * ic, eBBlock * ebp) +{ + iCode *dic, *sic; + + debugLog ("%d\t%s\n", __LINE__, __FUNCTION__); + debugLog ("ic->op = %s\n", pic16_decodeOp( ic->op ) ); + debugAopGet (" result:", IC_RESULT (ic)); + debugAopGet (" left:", IC_LEFT (ic)); + debugAopGet (" right:", IC_RIGHT (ic)); + +// fprintf(stderr, "%s:%d symbol = %s\n", __FILE__, __LINE__, OP_SYMBOL( IC_RESULT(ic))->name); + + debugLog(" %d - actuall processing\n", __LINE__ ); + + if (!IS_ITEMP (IC_RESULT (ic))) { + pic16_allocDirReg(IC_RESULT (ic)); + debugLog (" %d - result is not temp\n", __LINE__); + } + +// if(IS_VALOP(IC_RIGHT(ic)))return 0; + +/* See BUGLOG0001 - VR */ +#if 1 + if (!IS_ITEMP (IC_RIGHT (ic)) /*&& (!IS_PARM(IC_RESULT(ic)))*/) { + debugLog (" %d - not packing - right is not temp\n", __LINE__); + pic16_allocDirReg(IC_RIGHT (ic)); + return 0; + } +#endif + + if (OP_SYMBOL (IC_RIGHT (ic))->isind || + OP_LIVETO (IC_RIGHT (ic)) > ic->seq) + { + debugLog (" %d - not packing - right side fails \n", __LINE__); + return 0; + } + + /* if the true symbol is defined in far space or on stack + then we should not since this will increase register pressure */ + if (isOperandInFarSpace (IC_RESULT (ic))) + { + if ((dic = farSpacePackable (ic))) + goto pack; + else + return 0; + + } + + /* find the definition of iTempNN scanning backwards if we find a + a use of the true symbol before we find the definition then + we cannot pack */ + for (dic = ic->prev; dic; dic = dic->prev) + { + + /* if there is a function call and this is + a parameter & not my parameter then don't pack it */ + if ((dic->op == CALL || dic->op == PCALL) && + (OP_SYMBOL (IC_RESULT (ic))->_isparm && + !OP_SYMBOL (IC_RESULT (ic))->ismyparm)) + { + debugLog (" %d - \n", __LINE__); + dic = NULL; + break; + } + + + if (SKIP_IC2 (dic)) + continue; + + debugLog("%d\tSearching for iTempNN\n", __LINE__); + + if (IS_TRUE_SYMOP (IC_RESULT (dic)) && + IS_OP_VOLATILE (IC_RESULT (dic))) + { + debugLog (" %d - dic is VOLATILE \n", __LINE__); + dic = NULL; + break; + } + +#if 1 + if( IS_SYMOP( IC_RESULT(dic)) && + IS_BITFIELD( OP_SYMBOL(IC_RESULT(dic))->etype ) ) { + + debugLog (" %d - result is bitfield\n", __LINE__); + dic = NULL; + break; + } +#endif + + if (IS_SYMOP (IC_RESULT (dic)) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + { + /* A previous result was assigned to the same register - we'll our definition */ + debugLog (" %d - dic result key == ic right key -- pointer set=%c\n", + __LINE__, ((POINTER_SET (dic)) ? 'Y' : 'N')); + if (POINTER_SET (dic)) + dic = NULL; + + break; + } + + if (IS_SYMOP (IC_RIGHT (dic)) && + (IC_RIGHT (dic)->key == IC_RESULT (ic)->key || + IC_RIGHT (dic)->key == IC_RIGHT (ic)->key)) + { + debugLog (" %d - dic right key == ic rightor result key\n", __LINE__); + dic = NULL; + break; + } + + if (IS_SYMOP (IC_LEFT (dic)) && + (IC_LEFT (dic)->key == IC_RESULT (ic)->key || + IC_LEFT (dic)->key == IC_RIGHT (ic)->key)) + { + debugLog (" %d - dic left key == ic rightor result key\n", __LINE__); + dic = NULL; + break; + } + + if (POINTER_SET (dic) && + IC_RESULT (dic)->key == IC_RESULT (ic)->key) + { + debugLog (" %d - dic result key == ic result key -- pointer set=Y\n", + __LINE__); + dic = NULL; + break; + } + } + + if (!dic) + return 0; /* did not find */ + +#if 1 + /* This code is taken from the hc08 port. Do not know + * if it fits for pic16, but I leave it here just in case */ + + /* if assignment then check that right is not a bit */ + if (ASSIGNMENT (ic) && !POINTER_SET (ic)) { + sym_link *etype = operandType (IC_RESULT (dic)); + + if (IS_BITFIELD (etype)) { + /* if result is a bit too then it's ok */ + etype = operandType (IC_RESULT (ic)); + if (!IS_BITFIELD (etype)) { + debugLog(" %d bitfields\n"); + return 0; + } + } + } +#endif + + /* if the result is on stack or iaccess then it must be + the same atleast one of the operands */ + if (OP_SYMBOL (IC_RESULT (ic))->onStack || + OP_SYMBOL (IC_RESULT (ic))->iaccess) + { + /* the operation has only one symbol + operator then we can pack */ + if ((IC_LEFT (dic) && !IS_SYMOP (IC_LEFT (dic))) || + (IC_RIGHT (dic) && !IS_SYMOP (IC_RIGHT (dic)))) + goto pack; + + if (!((IC_LEFT (dic) && + IC_RESULT (ic)->key == IC_LEFT (dic)->key) || + (IC_RIGHT (dic) && + IC_RESULT (ic)->key == IC_RIGHT (dic)->key))) + return 0; + } +pack: + debugLog (" packing. removing %s\n", OP_SYMBOL (IC_RIGHT (ic))->rname); + debugLog (" replacing with %s\n", OP_SYMBOL (IC_RESULT (dic))->rname); + /* found the definition */ + /* replace the result with the result of */ + /* this assignment and remove this assignment */ + + + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + IC_RESULT (dic) = IC_RESULT (ic); + + if (IS_ITEMP (IC_RESULT (dic)) && OP_SYMBOL (IC_RESULT (dic))->liveFrom > dic->seq) + { + OP_SYMBOL (IC_RESULT (dic))->liveFrom = dic->seq; + } + /* delete from liverange table also + delete from all the points inbetween and the new + one */ + for (sic = dic; sic != ic; sic = sic->next) + { + bitVectUnSetBit (sic->rlive, IC_RESULT (ic)->key); + if (IS_ITEMP (IC_RESULT (dic))) + bitVectSetBit (sic->rlive, IC_RESULT (dic)->key); + } + + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + + debugLog(" %d\n", __LINE__ ); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS (IC_RESULT (dic)) = bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + return 1; +} + + +#if 1 + +#define NO_packRegsForAccUse +#define NO_packRegsForSupport +#define NO_packRegsForOneuse +#define NO_cast_peep + +#endif + + +#ifndef NO_packRegsForSupport +/*-----------------------------------------------------------------*/ +/* findAssignToSym : scanning backwards looks for first assig found */ +/*-----------------------------------------------------------------*/ +static iCode * +findAssignToSym (operand * op, iCode * ic) +{ + iCode *dic; + + debugLog ("%s\n", __FUNCTION__); + for (dic = ic->prev; dic; dic = dic->prev) + { + + /* if definition by assignment */ + if (dic->op == '=' && + !POINTER_SET (dic) && + IC_RESULT (dic)->key == op->key +/* && IS_TRUE_SYMOP(IC_RIGHT(dic)) */ + ) + { + + /* we are interested only if defined in far space */ + /* or in stack space in case of + & - */ + + /* if assigned to a non-symbol then return + true */ + if (!IS_SYMOP (IC_RIGHT (dic))) + break; + + /* if the symbol is in far space then + we should not */ + if (isOperandInFarSpace (IC_RIGHT (dic))) + return NULL; + + /* for + & - operations make sure that + if it is on the stack it is the same + as one of the three operands */ + if ((ic->op == '+' || ic->op == '-') && + OP_SYMBOL (IC_RIGHT (dic))->onStack) + { + if (IC_RESULT (ic)->key != IC_RIGHT (dic)->key && + IC_LEFT (ic)->key != IC_RIGHT (dic)->key && + IC_RIGHT (ic)->key != IC_RIGHT (dic)->key) + return NULL; + } + + break; + + } + + /* if we find an usage then we cannot delete it */ + if (IC_LEFT (dic) && IC_LEFT (dic)->key == op->key) + return NULL; + + if (IC_RIGHT (dic) && IC_RIGHT (dic)->key == op->key) + return NULL; + + if (POINTER_SET (dic) && IC_RESULT (dic)->key == op->key) + return NULL; + } + + /* now make sure that the right side of dic + is not defined between ic & dic */ + if (dic) + { + iCode *sic = dic->next; + + for (; sic != ic; sic = sic->next) + if (IC_RESULT (sic) && + IC_RESULT (sic)->key == IC_RIGHT (dic)->key) + return NULL; + } + + return dic; + + +} +#endif + + +#ifndef NO_packRegsForSupport +/*-----------------------------------------------------------------*/ +/* packRegsForSupport :- reduce some registers for support calls */ +/*-----------------------------------------------------------------*/ +static int +packRegsForSupport (iCode * ic, eBBlock * ebp) +{ + int change = 0; + + debugLog ("%s\n", __FUNCTION__); + /* for the left & right operand :- look to see if the + left was assigned a true symbol in far space in that + case replace them */ + if (IS_ITEMP (IC_LEFT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->liveTo <= ic->seq) + { + iCode *dic = findAssignToSym (IC_LEFT (ic), ic); + iCode *sic; + + if (!dic) + goto right; + + debugAopGet ("removing left:", IC_LEFT (ic)); + + /* found it we need to remove it from the + block */ + for (sic = dic; sic != ic; sic = sic->next) + bitVectUnSetBit (sic->rlive, IC_LEFT (ic)->key); + + IC_LEFT (ic)->operand.symOperand = + IC_RIGHT (dic)->operand.symOperand; + IC_LEFT (ic)->key = IC_RIGHT (dic)->operand.symOperand->key; + remiCodeFromeBBlock (ebp, dic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); + change++; + } + + /* do the same for the right operand */ +right: + if (!change && + IS_ITEMP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->liveTo <= ic->seq) + { + iCode *dic = findAssignToSym (IC_RIGHT (ic), ic); + iCode *sic; + + if (!dic) + return change; + + /* if this is a subtraction & the result + is a true symbol in far space then don't pack */ + if (ic->op == '-' && IS_TRUE_SYMOP (IC_RESULT (dic))) + { + sym_link *etype = getSpec (operandType (IC_RESULT (dic))); + if (IN_FARSPACE (SPEC_OCLS (etype))) + return change; + } + + debugAopGet ("removing right:", IC_RIGHT (ic)); + + /* found it we need to remove it from the + block */ + for (sic = dic; sic != ic; sic = sic->next) + bitVectUnSetBit (sic->rlive, IC_RIGHT (ic)->key); + + IC_RIGHT (ic)->operand.symOperand = + IC_RIGHT (dic)->operand.symOperand; + IC_RIGHT (ic)->key = IC_RIGHT (dic)->operand.symOperand->key; + + remiCodeFromeBBlock (ebp, dic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); + change++; + } + + return change; +} +#endif + + +#ifndef NO_packRegsForOneuse +/*-----------------------------------------------------------------*/ +/* packRegsForOneuse : - will reduce some registers for single Use */ +/*-----------------------------------------------------------------*/ +static iCode * +packRegsForOneuse (iCode * ic, operand * op, eBBlock * ebp) +{ + bitVect *uses; + iCode *dic, *sic; + + return NULL; + + debugLog ("%s\n", __FUNCTION__); + /* if returning a literal then do nothing */ + if (!IS_SYMOP (op)) + return NULL; + + if(OP_SYMBOL(op)->remat || OP_SYMBOL(op)->ruonly) + return NULL; + + /* only upto 2 bytes since we cannot predict + the usage of b, & acc */ + if (getSize (operandType (op)) > (pic16_fReturnSizePic - 1) + && ic->op != RETURN + && ic->op != SEND + && !POINTER_SET(ic) + && !POINTER_GET(ic) + ) + return NULL; + + /* this routine will mark the a symbol as used in one + instruction use only && if the definition is local + (ie. within the basic block) && has only one definition && + that definition is either a return value from a + function or does not contain any variables in + far space */ + +#if 0 + uses = bitVectCopy (OP_USES (op)); + bitVectUnSetBit (uses, ic->key); /* take away this iCode */ + if (!bitVectIsZero (uses)) /* has other uses */ + return NULL; +#endif + +#if 1 + if (bitVectnBitsOn (OP_USES (op)) > 1) + return NULL; +#endif + + /* if it has only one defintion */ + if (bitVectnBitsOn (OP_DEFS (op)) > 1) + return NULL; /* has more than one definition */ + + /* get that definition */ + if (!(dic = + hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_DEFS (op))))) + return NULL; + + /* found the definition now check if it is local */ + if (dic->seq < ebp->fSeq || + dic->seq > ebp->lSeq) + return NULL; /* non-local */ + + /* now check if it is the return from + a function call */ + if (dic->op == CALL || dic->op == PCALL) + { + if (ic->op != SEND && ic->op != RETURN && + !POINTER_SET(ic) && !POINTER_GET(ic)) + { + OP_SYMBOL (op)->ruonly = 1; + return dic; + } + dic = dic->next; + } + else + { + + + /* otherwise check that the definition does + not contain any symbols in far space */ + if (isOperandInFarSpace (IC_LEFT (dic)) || + isOperandInFarSpace (IC_RIGHT (dic)) || + IS_OP_RUONLY (IC_LEFT (ic)) || + IS_OP_RUONLY (IC_RIGHT (ic))) + { + return NULL; + } + + /* if pointer set then make sure the pointer + is one byte */ + if (POINTER_SET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_RESULT (dic)), FALSE))) + return NULL; + + if (POINTER_GET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_LEFT (dic)), FALSE))) + return NULL; + } + + sic = dic; + + /* also make sure the intervenening instructions + don't have any thing in far space */ + for (dic = dic->next; dic && dic != ic; dic = dic->next) + { + + /* if there is an intervening function call then no */ + if (dic->op == CALL || dic->op == PCALL) + return NULL; + /* if pointer set then make sure the pointer + is one byte */ + if (POINTER_SET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_RESULT (dic)), FALSE))) + return NULL; + + if (POINTER_GET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_LEFT (dic)), FALSE))) + return NULL; + + /* if address of & the result is remat then okay */ + if (dic->op == ADDRESS_OF && + OP_SYMBOL (IC_RESULT (dic))->remat) + continue; + + /* if operand has size of three or more & this + operation is a '*','/' or '%' then 'b' may + cause a problem */ + if ((dic->op == '%' || dic->op == '/' || dic->op == '*') && + getSize (operandType (op)) >= 2) + return NULL; + + /* if left or right or result is in far space */ + if (isOperandInFarSpace (IC_LEFT (dic)) || + isOperandInFarSpace (IC_RIGHT (dic)) || + isOperandInFarSpace (IC_RESULT (dic)) || + IS_OP_RUONLY (IC_LEFT (dic)) || + IS_OP_RUONLY (IC_RIGHT (dic)) || + IS_OP_RUONLY (IC_RESULT (dic))) + { + return NULL; + } + } + + OP_SYMBOL (op)->ruonly = 1; + return sic; + +} +#endif + + +/*-----------------------------------------------------------------*/ +/* isBitwiseOptimizable - requirements of JEAN LOUIS VERN */ +/*-----------------------------------------------------------------*/ +static bool +isBitwiseOptimizable (iCode * ic) +{ + sym_link *ltype = getSpec (operandType (IC_LEFT (ic))); + sym_link *rtype = getSpec (operandType (IC_RIGHT (ic))); + + debugLog ("%s\n", __FUNCTION__); + /* bitwise operations are considered optimizable + under the following conditions (Jean-Louis VERN) + + x & lit + bit & bit + bit & x + bit ^ bit + bit ^ x + x ^ lit + x | lit + bit | bit + bit | x + */ + if (IS_LITERAL (rtype) || + (IS_BITVAR (ltype) && IN_BITSPACE (SPEC_OCLS (ltype)))) + return TRUE; + else + return FALSE; +} + + +#ifndef NO_packRegsForAccUse + +/*-----------------------------------------------------------------*/ +/* packRegsForAccUse - pack registers for acc use */ +/*-----------------------------------------------------------------*/ +static void +packRegsForAccUse (iCode * ic) +{ + iCode *uic; + + debugLog ("%s\n", __FUNCTION__); + + /* if this is an aggregate, e.g. a one byte char array */ + if (IS_AGGREGATE(operandType(IC_RESULT(ic)))) { + return; + } + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + + /* if + or - then it has to be one byte result */ + if ((ic->op == '+' || ic->op == '-') + && getSize (operandType (IC_RESULT (ic))) > 1) + return; + + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + /* if shift operation make sure right side is not a literal */ + if (ic->op == RIGHT_OP && + (isOperandLiteral (IC_RIGHT (ic)) || + getSize (operandType (IC_RESULT (ic))) > 1)) + return; + + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + if (ic->op == LEFT_OP && + (isOperandLiteral (IC_RIGHT (ic)) || + getSize (operandType (IC_RESULT (ic))) > 1)) + return; + + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + if (IS_BITWISE_OP (ic) && + getSize (operandType (IC_RESULT (ic))) > 1) + return; + + + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + /* has only one definition */ + if (bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) > 1) + return; + + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + /* has only one use */ + if (bitVectnBitsOn (OP_USES (IC_RESULT (ic))) > 1) + return; + + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + /* and the usage immediately follows this iCode */ + if (!(uic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_USES (IC_RESULT (ic)))))) + return; + + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + if (ic->next != uic) + return; + + /* if it is a conditional branch then we definitely can */ + if (uic->op == IFX) + goto accuse; + + if (uic->op == JUMPTABLE) + return; + + /* if the usage is not is an assignment + or an arithmetic / bitwise / shift operation then not */ + if (POINTER_SET (uic) && + getSize (aggrToPtr (operandType (IC_RESULT (uic)), FALSE)) > 1) + return; + + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + if (uic->op != '=' && + !IS_ARITHMETIC_OP (uic) && + !IS_BITWISE_OP (uic) && + uic->op != LEFT_OP && + uic->op != RIGHT_OP) + return; + + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + /* if used in ^ operation then make sure right is not a + literl */ + if (uic->op == '^' && isOperandLiteral (IC_RIGHT (uic))) + return; + + /* if shift operation make sure right side is not a literal */ + if (uic->op == RIGHT_OP && + (isOperandLiteral (IC_RIGHT (uic)) || + getSize (operandType (IC_RESULT (uic))) > 1)) + return; + + if (uic->op == LEFT_OP && + (isOperandLiteral (IC_RIGHT (uic)) || + getSize (operandType (IC_RESULT (uic))) > 1)) + return; + + /* make sure that the result of this icode is not on the + stack, since acc is used to compute stack offset */ + if (IS_TRUE_SYMOP (IC_RESULT (uic)) && + OP_SYMBOL (IC_RESULT (uic))->onStack) + return; + + /* if either one of them in far space then we cannot */ + if ((IS_TRUE_SYMOP (IC_LEFT (uic)) && + isOperandInFarSpace (IC_LEFT (uic))) || + (IS_TRUE_SYMOP (IC_RIGHT (uic)) && + isOperandInFarSpace (IC_RIGHT (uic)))) + return; + + /* if the usage has only one operand then we can */ + if (IC_LEFT (uic) == NULL || + IC_RIGHT (uic) == NULL) + goto accuse; + + /* make sure this is on the left side if not + a '+' since '+' is commutative */ + if (ic->op != '+' && + IC_LEFT (uic)->key != IC_RESULT (ic)->key) + return; + +#if 1 + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + /* if one of them is a literal then we can */ + if ( ((IC_LEFT (uic) && IS_OP_LITERAL (IC_LEFT (uic))) || + (IC_RIGHT (uic) && IS_OP_LITERAL (IC_RIGHT (uic)))) && + (getSize (operandType (IC_RESULT (uic))) <= 1)) + { + OP_SYMBOL (IC_RESULT (ic))->accuse = 1; + return; + } +#endif + + debugLog (" %s:%d\n", __FUNCTION__,__LINE__); + /* if the other one is not on stack then we can */ + if (IC_LEFT (uic)->key == IC_RESULT (ic)->key && + (IS_ITEMP (IC_RIGHT (uic)) || + (IS_TRUE_SYMOP (IC_RIGHT (uic)) && + !OP_SYMBOL (IC_RIGHT (uic))->onStack))) + goto accuse; + + if (IC_RIGHT (uic)->key == IC_RESULT (ic)->key && + (IS_ITEMP (IC_LEFT (uic)) || + (IS_TRUE_SYMOP (IC_LEFT (uic)) && + !OP_SYMBOL (IC_LEFT (uic))->onStack))) + goto accuse; + + return; + +accuse: + debugLog ("%s - Yes we are using the accumulator\n", __FUNCTION__); + OP_SYMBOL (IC_RESULT (ic))->accuse = 1; + + +} +#endif + + +/*-----------------------------------------------------------------*/ +/* packForPush - hueristics to reduce iCode for pushing */ +/*-----------------------------------------------------------------*/ +static void +packForReceive (iCode * ic, eBBlock * ebp) +{ + iCode *dic; + + debugLog ("%s\n", __FUNCTION__); + debugAopGet (" result:", IC_RESULT (ic)); + debugAopGet (" left:", IC_LEFT (ic)); + debugAopGet (" right:", IC_RIGHT (ic)); + + if (!ic->next) + return; + + for (dic = ic->next; dic; dic = dic->next) + { + if (IC_LEFT (dic) && (IC_RESULT (ic)->key == IC_LEFT (dic)->key)) + debugLog (" used on left\n"); + if (IC_RIGHT (dic) && IC_RESULT (ic)->key == IC_RIGHT (dic)->key) + debugLog (" used on right\n"); + if (IC_RESULT (dic) && IC_RESULT (ic)->key == IC_RESULT (dic)->key) + debugLog (" used on result\n"); + + if ((IC_LEFT (dic) && (IC_RESULT (ic)->key == IC_LEFT (dic)->key)) || + (IC_RESULT (dic) && IC_RESULT (ic)->key == IC_RESULT (dic)->key)) + return; + } + + debugLog (" hey we can remove this unnecessary assign\n"); +} +/*-----------------------------------------------------------------*/ +/* packForPush - hueristics to reduce iCode for pushing */ +/*-----------------------------------------------------------------*/ +static void +packForPush (iCode * ic, eBBlock * ebp) +{ + iCode *dic; + const char *iLine; + + debugLog ("%s\n", __FUNCTION__); + if (ic->op != IPUSH || !IS_ITEMP (IC_LEFT (ic))) + return; + +#if 0 + { + int n1, n2; + + n1 = bitVectnBitsOn( OP_DEFS(IC_LEFT(ic))); + n2 = bitVectnBitsOn( OP_USES(IC_LEFT(ic))); + iLine = printILine(ic); + debugf3("defs: %d\tuses: %d\t%s\n", n1, n2, printILine(ic)); + dbuf_free(iLine); + debugf2("IC_LEFT(ic): from %d to %d\n", OP_LIVEFROM(IC_LEFT(ic)), OP_LIVETO(IC_LEFT(ic))); + } +#endif + + /* must have only definition & one usage */ + if (bitVectnBitsOn (OP_DEFS (IC_LEFT (ic))) != 1 || + bitVectnBitsOn (OP_USES (IC_LEFT (ic))) != 1) + return; + + /* find the definition */ + if (!(dic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_DEFS (IC_LEFT (ic)))))) + return; + + /* if definition is not assignment, + * or is not pointer (because pointer might have changed) */ + if (dic->op != '=' || POINTER_SET (dic)) + return; + + /* we must ensure that we can use the delete the assignment, + * because the source might have been modified in between. + * Until I know how to fix this, I'll use the adhoc fix + * to check the liveranges */ + if((OP_LIVEFROM(IC_RIGHT(dic))==0) || (OP_LIVETO(IC_RIGHT(dic))==0)) + return; +// debugf2("IC_RIGHT(dic): from %d to %d\n", OP_LIVEFROM(IC_RIGHT(dic)), OP_LIVETO(IC_RIGHT(dic))); + + + + /* + * The following code causes segfaults, e.g., + * #2496919 Internal error with pic16 sdcc + * and is thus disabled for now. + */ + if (0) + { + /* we now we know that it has one & only one def & use + and the that the definition is an assignment */ + IC_LEFT (ic) = IC_RIGHT (dic); + + iLine = printILine(dic); + debugf("remiCodeFromeBBlock: %s\n", iLine); + dbuf_free(iLine); + + remiCodeFromeBBlock (ebp, dic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); + } // if +} + +static void printSymType(char * str, sym_link *sl) +{ + if(!pic16_ralloc_debug)return; + + debugLog (" %s Symbol type: ",str); + printTypeChain (sl, debugF); + debugLog ("\n"); +} + +/*-----------------------------------------------------------------*/ +/* some debug code to print the symbol S_TYPE. Note that + * the function checkSClass in src/SDCCsymt.c dinks with + * the S_TYPE in ways the PIC port doesn't fully like...*/ +/*-----------------------------------------------------------------*/ +static void isData(sym_link *sl) +{ + FILE *of = stderr; + + if(!pic16_ralloc_debug)return; + + if(!sl)return; + + if(debugF) + of = debugF; + + for ( ; sl; sl=sl->next) { + if(!IS_DECL(sl) ) { + switch (SPEC_SCLS(sl)) { + case S_DATA: fprintf (of, "data "); break; + case S_XDATA: fprintf (of, "xdata "); break; + case S_SFR: fprintf (of, "sfr "); break; + case S_SBIT: fprintf (of, "sbit "); break; + case S_CODE: fprintf (of, "code "); break; + case S_IDATA: fprintf (of, "idata "); break; + case S_PDATA: fprintf (of, "pdata "); break; + case S_LITERAL: fprintf (of, "literal "); break; + case S_STACK: fprintf (of, "stack "); break; + case S_XSTACK: fprintf (of, "xstack "); break; + case S_BIT: fprintf (of, "bit "); break; + case S_EEPROM: fprintf (of, "eeprom "); break; + default: break; + } + } + } +} + + +/*--------------------------------------------------------------------*/ +/* pic16_packRegisters - does some transformations to reduce */ +/* register pressure */ +/* */ +/*--------------------------------------------------------------------*/ +static void +pic16_packRegisters (eBBlock * ebp) +{ + iCode *ic; + int change = 0; + + debugLog ("%s\n", __FUNCTION__); + + while (1) { + + change = 0; + + /* look for assignments of the form */ + /* iTempNN = TRueSym (someoperation) SomeOperand */ + /* .... */ + /* TrueSym := iTempNN:1 */ + for (ic = ebp->sch; ic; ic = ic->next) + { +// debugLog("%d\n", __LINE__); + /* find assignment of the form TrueSym := iTempNN:1 */ + if ( (ic->op == '=') && !POINTER_SET (ic) ) // patch 11 + change += packRegsForAssign (ic, ebp); + /* debug stuff */ + if (ic->op == '=') + { + if (POINTER_SET (ic)) + debugLog ("pointer is set\n"); + debugAopGet (" result:", IC_RESULT (ic)); + debugAopGet (" left:", IC_LEFT (ic)); + debugAopGet (" right:", IC_RIGHT (ic)); + } + + } + + if (!change) + break; + } + + for (ic = ebp->sch; ic; ic = ic->next) { + + if(IS_SYMOP ( IC_LEFT(ic))) { + sym_link *etype = getSpec (operandType (IC_LEFT (ic))); + + debugAopGet ("x left:", IC_LEFT (ic)); +#if 0 + if(IS_PTR_CONST(OP_SYMBOL(IC_LEFT(ic))->type)) +#else + if(IS_CODEPTR(OP_SYMBOL(IC_LEFT(ic))->type)) +#endif + debugLog (" is a pointer\n"); + + if(IS_PTR(OP_SYMBOL(IC_LEFT(ic))->type)) + debugLog (" is a ptr\n"); + + if(IS_OP_VOLATILE(IC_LEFT(ic))) + debugLog (" is volatile\n"); + + isData(etype); + + if(IS_OP_VOLATILE(IC_LEFT(ic))) { + debugLog (" %d - left is not temp, allocating\n", __LINE__); + pic16_allocDirReg(IC_LEFT (ic)); + } + + printSymType("c ", OP_SYMBOL(IC_LEFT(ic))->type); + } + + if(IS_SYMOP ( IC_RIGHT(ic))) { + debugAopGet (" right:", IC_RIGHT (ic)); + printSymType(" ", OP_SYMBOL(IC_RIGHT(ic))->type); + } + + if(IS_SYMOP ( IC_RESULT(ic))) { + debugAopGet (" result:", IC_RESULT (ic)); + printSymType(" ", OP_SYMBOL(IC_RESULT(ic))->type); + } + + if(IS_TRUE_SYMOP ( IC_RIGHT(ic))) { + debugAopGet (" right:", IC_RIGHT (ic)); + printSymType(" ", OP_SYMBOL(IC_RIGHT(ic))->type); +// pic16_allocDirReg(IC_RIGHT(ic)); + } + + if(IS_TRUE_SYMOP ( IC_RESULT(ic))) { + debugAopGet (" result:", IC_RESULT (ic)); + printSymType(" ", OP_SYMBOL(IC_RESULT(ic))->type); +// pic16_allocDirReg(IC_RESULT(ic)); + } + + + if (POINTER_SET (ic)) + debugLog (" %d - Pointer set\n", __LINE__); + + /* Look for two subsequent iCodes with */ + /* iTemp := _c; */ + /* _c = iTemp & op; */ + /* and replace them by */ + /* iTemp := _c; */ + /* _c = _c & op; */ + if ((ic->op == BITWISEAND || ic->op == '|' || ic->op == '^') + && ic->prev + && ic->prev->op == '=' + && IS_ITEMP (IC_LEFT (ic)) + && IC_LEFT (ic) == IC_RESULT (ic->prev) + && isOperandEqual (IC_RESULT(ic), IC_RIGHT(ic->prev))) + { + iCode* ic_prev = ic->prev; + symbol* prev_result_sym = OP_SYMBOL (IC_RESULT (ic_prev)); + + ReplaceOpWithCheaperOp (&IC_LEFT (ic), IC_RESULT (ic)); + if (IC_RESULT (ic_prev) != IC_RIGHT (ic)) { + bitVectUnSetBit (OP_USES (IC_RESULT (ic_prev)), ic->key); + if (/*IS_ITEMP (IC_RESULT (ic_prev)) && */ + prev_result_sym->liveTo == ic->seq) + { + prev_result_sym->liveTo = ic_prev->seq; + } + } + bitVectSetBit (OP_USES (IC_RESULT (ic)), ic->key); + + bitVectSetBit (ic->rlive, IC_RESULT (ic)->key); + + if (bitVectIsZero (OP_USES (IC_RESULT (ic_prev)))) { + bitVectUnSetBit (ic->rlive, IC_RESULT (ic)->key); + bitVectUnSetBit (OP_DEFS (IC_RESULT (ic_prev)), ic_prev->key); + remiCodeFromeBBlock (ebp, ic_prev); + hTabDeleteItem (&iCodehTab, ic_prev->key, ic_prev, DELETE_ITEM, NULL); + } + } + + /* if this is an itemp & result of a address of a true sym + then mark this as rematerialisable */ + if (ic->op == ADDRESS_OF && + IS_ITEMP (IC_RESULT (ic)) && + IS_TRUE_SYMOP (IC_LEFT (ic)) && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1 && + !OP_SYMBOL (IC_LEFT (ic))->onStack) + { + + debugLog (" %d - %s. result is rematerializable\n", __LINE__,__FUNCTION__); + + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + SPIL_LOC (IC_RESULT (ic)) = NULL; + + } + + /* if straight assignment then carry remat flag if + this is the only definition */ + if (ic->op == '=' && + !POINTER_SET (ic) && + IS_SYMOP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->remat && + bitVectnBitsOn (OP_SYMBOL (IC_RESULT (ic))->defs) <= 1) + { + debugLog (" %d - %s. straight rematerializable\n", __LINE__,__FUNCTION__); + + OP_SYMBOL (IC_RESULT (ic))->remat = + OP_SYMBOL (IC_RIGHT (ic))->remat; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = + OP_SYMBOL (IC_RIGHT (ic))->rematiCode; + } + + /* if this is a +/- operation with a rematerizable + then mark this as rematerializable as well */ + if ((ic->op == '+' || ic->op == '-') && + (IS_SYMOP (IC_LEFT (ic)) && + IS_ITEMP (IC_RESULT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->remat && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1 && + IS_OP_LITERAL (IC_RIGHT (ic)))) + { + debugLog (" %d - %s. rematerializable because op is +/-\n", __LINE__,__FUNCTION__); + //int i = + operandLitValue (IC_RIGHT (ic)); + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + SPIL_LOC (IC_RESULT (ic)) = NULL; + } + + +#if 0 + /* try to optimize FSR0 usage when reading data memory pointers */ + + if(getenv("OPTIMIZE_NEAR_POINTER_GET")) { + static int fsr0usage=0; + static iCode *usic; + + if(POINTER_GET(ic) /* this is a memory read */ + && ic->loop /* this is in a loop */ + ) { + fprintf(stderr, "might optimize FSR0 usage\n"); + } + } +#endif + + /* mark the pointer usages */ + if (POINTER_SET (ic) && IS_SYMOP (IC_RESULT (ic))) + { + OP_SYMBOL (IC_RESULT (ic))->uptr = 1; + debugLog (" marking as a pointer (set) =>"); + debugAopGet (" result:", IC_RESULT (ic)); + + } + + if (POINTER_GET (ic)) + { + if(IS_SYMOP(IC_LEFT(ic))) { + OP_SYMBOL (IC_LEFT (ic))->uptr = 1; + debugLog (" marking as a pointer (get) =>"); + debugAopGet (" left:", IC_LEFT (ic)); + } + + if(getenv("OPTIMIZE_BITFIELD_POINTER_GET")) { + if(IS_ITEMP(IC_LEFT(ic)) && IS_BITFIELD(OP_SYM_ETYPE(IC_LEFT(ic)))) { + iCode *dic = ic->prev; + + fprintf(stderr, "%s:%d might give opt POINTER_GET && IS_BITFIELD(IC_LEFT)\n", __FILE__, __LINE__); + + if(dic && dic->op == '=' + && isOperandEqual(IC_RESULT(dic), IC_LEFT(ic))) { + + fprintf(stderr, "%s:%d && prev is '=' && prev->result == ic->left\n", __FILE__, __LINE__); + + + /* replace prev->left with ic->left */ + IC_LEFT(ic) = IC_RIGHT(dic); + IC_RIGHT(ic->prev) = NULL; + + /* remove ic->prev iCode (assignment) */ + remiCodeFromeBBlock (ebp, dic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,ic->key); + + + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); + } + } + } + } + + //debugLog(" %d %s\n", __LINE__, __FUNCTION__); + + if (!SKIP_IC2 (ic)) + { + //debugLog(" %d %s\n", __LINE__, __FUNCTION__ ); + /* if we are using a symbol on the stack + then we should say pic16_ptrRegReq */ + if (ic->op == IFX && IS_SYMOP (IC_COND (ic))) + pic16_ptrRegReq += ((OP_SYMBOL (IC_COND (ic))->onStack || + OP_SYMBOL (IC_COND (ic))->iaccess) ? 1 : 0); + else if (ic->op == JUMPTABLE && IS_SYMOP (IC_JTCOND (ic))) + pic16_ptrRegReq += ((OP_SYMBOL (IC_JTCOND (ic))->onStack || + OP_SYMBOL (IC_JTCOND (ic))->iaccess) ? 1 : 0); + else + { + + //debugLog(" %d %s\n", __LINE__, __FUNCTION__ ); + if (IS_SYMOP (IC_LEFT (ic))) + pic16_ptrRegReq += ((OP_SYMBOL (IC_LEFT (ic))->onStack || + OP_SYMBOL (IC_LEFT (ic))->iaccess) ? 1 : 0); + if (IS_SYMOP (IC_RIGHT (ic))) + pic16_ptrRegReq += ((OP_SYMBOL (IC_RIGHT (ic))->onStack || + OP_SYMBOL (IC_RIGHT (ic))->iaccess) ? 1 : 0); + if (IS_SYMOP (IC_RESULT (ic))) + pic16_ptrRegReq += ((OP_SYMBOL (IC_RESULT (ic))->onStack || + OP_SYMBOL (IC_RESULT (ic))->iaccess) ? 1 : 0); + } + + debugLog (" %d - pointer reg req = %d\n", __LINE__,pic16_ptrRegReq); + + } + + /* if the condition of an if instruction + is defined in the previous instruction then + mark the itemp as a conditional */ + if ((IS_CONDITIONAL (ic) || + ((ic->op == BITWISEAND || + ic->op == '|' || + ic->op == '^') && + isBitwiseOptimizable (ic))) && + ic->next && ic->next->op == IFX && + isOperandEqual (IC_RESULT (ic), IC_COND (ic->next)) && + OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq) + { + + debugLog (" %d\n", __LINE__); + OP_SYMBOL (IC_RESULT (ic))->regType = REG_CND; + continue; + } + + debugLog(" %d\n", __LINE__); + +#ifndef NO_packRegsForSupport + /* reduce for support function calls */ + if (ic->supportRtn || ic->op == '+' || ic->op == '-') + packRegsForSupport (ic, ebp); +#endif + + /* if a parameter is passed, it's in W, so we may not + need to place a copy in a register */ + if (ic->op == RECEIVE) + packForReceive (ic, ebp); + +#ifndef NO_packRegsForOneuse + /* some cases the redundant moves can + can be eliminated for return statements */ + if ((ic->op == RETURN || ic->op == SEND) && + !isOperandInFarSpace (IC_LEFT (ic)) && + !options.model) + packRegsForOneuse (ic, IC_LEFT (ic), ebp); +#endif + +#ifndef NO_packRegsForOneuse + /* if pointer set & left has a size more than + one and right is not in far space */ + if (POINTER_SET (ic) && + !isOperandInFarSpace (IC_RIGHT (ic)) && + !OP_SYMBOL (IC_RESULT (ic))->remat && + !IS_OP_RUONLY (IC_RIGHT (ic)) && + getSize (aggrToPtr (operandType (IC_RESULT (ic)), FALSE)) > 1) + + packRegsForOneuse (ic, IC_RESULT (ic), ebp); +#endif + +#ifndef NO_packRegsForOneuse + /* if pointer get */ + if (POINTER_GET (ic) && + !isOperandInFarSpace (IC_RESULT (ic)) && + !OP_SYMBOL (IC_LEFT (ic))->remat && + !IS_OP_RUONLY (IC_RESULT (ic)) && + getSize (aggrToPtr (operandType (IC_LEFT (ic)), FALSE)) > 1) + + packRegsForOneuse (ic, IC_LEFT (ic), ebp); + debugLog("%d - return from packRegsForOneuse\n", __LINE__); +#endif + +#ifndef NO_cast_peep + /* if this is cast for intergral promotion then + check if only use of the definition of the + operand being casted/ if yes then replace + the result of that arithmetic operation with + this result and get rid of the cast */ + if (ic->op == CAST) { + + sym_link *fromType = operandType (IC_RIGHT (ic)); + sym_link *toType = operandType (IC_LEFT (ic)); + + debugLog (" %d - casting\n", __LINE__); + + if (IS_INTEGRAL (fromType) && IS_INTEGRAL (toType) && + getSize (fromType) != getSize (toType)) { + + + iCode *dic = packRegsForOneuse (ic, IC_RIGHT (ic), ebp); + if (dic) { + + if (IS_ARITHMETIC_OP (dic)) { + debugLog(" %d %s\n", __LINE__, __FUNCTION__ ); + + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + IC_RESULT (dic) = IC_RESULT (ic); + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS (IC_RESULT (dic)) = bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + ic = ic->prev; + } else + + OP_SYMBOL (IC_RIGHT (ic))->ruonly = 0; + } + } else { + + /* if the type from and type to are the same + then if this is the only use then packit */ + if (compareType (operandType (IC_RIGHT (ic)), + operandType (IC_LEFT (ic))) == 1) { + + iCode *dic = packRegsForOneuse (ic, IC_RIGHT (ic), ebp); + if (dic) { + + debugLog(" %d\n", __LINE__); + + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + IC_RESULT (dic) = IC_RESULT (ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + remiCodeFromeBBlock (ebp, ic); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS (IC_RESULT (dic)) = bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + ic = ic->prev; + } + } + } + } +#endif + +#if 1 + /* there are some problems with packing variables + * it seems that the live range estimator doesn't + * estimate correctly the liveranges of some symbols */ + + /* pack for PUSH + iTempNN := (some variable in farspace) V1 + push iTempNN ; + ------------- + push V1 + */ + if (ic->op == IPUSH) + { + packForPush (ic, ebp); + } +#endif + +#ifndef NO_packRegsForAccUse + /* pack registers for accumulator use, when the + result of an arithmetic or bit wise operation + has only one use, that use is immediately following + the defintion and the using iCode has only one + operand or has two operands but one is literal & + the result of that operation is not on stack then + we can leave the result of this operation in acc:b + combination */ + if ((IS_ARITHMETIC_OP (ic) + + || IS_BITWISE_OP (ic) + + || ic->op == LEFT_OP || ic->op == RIGHT_OP + + ) && + IS_ITEMP (IC_RESULT (ic)) && + getSize (operandType (IC_RESULT (ic))) <= 1) + + packRegsForAccUse (ic); +#endif + + } +} + +static void +dumpEbbsToDebug (eBBlock ** ebbs, int count) +{ + int i; + + if (!pic16_ralloc_debug || !debugF) + return; + + for (i = 0; i < count; i++) + { + fprintf (debugF, "\n----------------------------------------------------------------\n"); + fprintf (debugF, "Basic Block %s : loop Depth = %d noPath = %d , lastinLoop = %d\n", + ebbs[i]->entryLabel->name, + ebbs[i]->depth, + ebbs[i]->noPath, + ebbs[i]->isLastInLoop); + fprintf (debugF, "depth 1st num %d : bbnum = %d 1st iCode = %d , last iCode = %d\n", + ebbs[i]->dfnum, + ebbs[i]->bbnum, + ebbs[i]->fSeq, + ebbs[i]->lSeq); + fprintf (debugF, "visited %d : hasFcall = %d\n", + ebbs[i]->visited, + ebbs[i]->hasFcall); + + fprintf (debugF, "\ndefines bitVector :"); + bitVectDebugOn (ebbs[i]->defSet, debugF); + fprintf (debugF, "\nlocal defines bitVector :"); + bitVectDebugOn (ebbs[i]->ldefs, debugF); + fprintf (debugF, "\npointers Set bitvector :"); + bitVectDebugOn (ebbs[i]->ptrsSet, debugF); + fprintf (debugF, "\nin pointers Set bitvector :"); + bitVectDebugOn (ebbs[i]->inPtrsSet, debugF); + fprintf (debugF, "\ninDefs Set bitvector :"); + bitVectDebugOn (ebbs[i]->inDefs, debugF); + fprintf (debugF, "\noutDefs Set bitvector :"); + bitVectDebugOn (ebbs[i]->outDefs, debugF); + fprintf (debugF, "\nusesDefs Set bitvector :"); + bitVectDebugOn (ebbs[i]->usesDefs, debugF); + fprintf (debugF, "\n----------------------------------------------------------------\n"); + printiCChain (ebbs[i]->sch, debugF); + } +} + +void dbg_dumpregusage(void); + +/*-----------------------------------------------------------------*/ +/* pic16_assignRegisters - assigns registers to each live range as need */ +/*-----------------------------------------------------------------*/ +void +pic16_assignRegisters (ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->bbOrder; + int count = ebbi->count; + iCode *ic; + int i; + + debugLog ("<><><><><><><><><><><><><><><><><>\nstarting\t%s:%s", __FILE__, __FUNCTION__); + debugLog ("\nebbs before optimizing:\n"); + dumpEbbsToDebug (ebbs, count); + + _inRegAllocator = 1; + + pic16_freeAllRegs(); +#if 0 + dbg_dumpregusage(); + /* clear whats left over from peephole parser */ + pic16_dynAllocRegs= newSet(); //NULL; +// pic16_dynStackRegs= newSet(); //NULL; +// pic16_dynProcessorRegs=newSet(); //NULL; +// pic16_dynDirectRegs=newSet(); //NULL; +// pic16_dynDirectBitRegs=newSet(); //NULL; +// pic16_dynInternalRegs=newSet(); //NULL; +// pic16_dynAccessRegs=newSet(); //NULL; + +// dynDirectRegNames=NULL; + dynAllocRegNames=NULL; +// dynProcRegNames=NULL; +// dynAccessRegNames=NULL; +#endif + + setToNull ((void *) &_G.funcrUsed); + pic16_ptrRegReq = _G.stackExtend = _G.dataExtend = 0; + + + /* change assignments this will remove some + live ranges reducing some register pressure */ + for (i = 0; i < count; i++) + pic16_packRegisters (ebbs[i]); + + + { + regs *reg; + int hkey; + + debugLog("dir registers allocated so far:\n"); + reg = hTabFirstItem(dynDirectRegNames, &hkey); + +#if 0 + while(reg) { + debugLog(" -- #%d reg = %s key %d, rIdx = %d, size %d\n",i++,reg->name,hkey, reg->rIdx,reg->size); +// fprintf(stderr, " -- #%d reg = %s key %d, rIdx = %d, size %d\n",i++,reg->name,hkey, reg->rIdx,reg->size); + reg = hTabNextItem(dynDirectRegNames, &hkey); + } +#endif + + } + + /* liveranges probably changed by register packing + so we compute them again */ + recomputeLiveRanges (ebbs, count); + + if (options.dump_pack) + dumpEbbsToFileExt (DUMP_PACK, ebbi); + + /* first determine for each live range the number of + registers & the type of registers required for each */ + regTypeNum (); + + /* start counting function temporary registers from zero */ + /* XXX: Resetting dynrIdx breaks register allocation, + * see #1489055, #1483693 (?), and #1445850! */ + //dynrIdx = 0; + + /* and serially allocate registers */ + serialRegAssign (ebbs, count); + +#if 0 + debugLog ("ebbs after serialRegAssign:\n"); + dumpEbbsToDebug (ebbs, count); +#endif + + //pic16_freeAllRegs(); + + /* if stack was extended then tell the user */ + if (_G.stackExtend) + { +/* werror(W_TOOMANY_SPILS,"stack", */ +/* _G.stackExtend,currFunc->name,""); */ + _G.stackExtend = 0; + } + + if (_G.dataExtend) + { +/* werror(W_TOOMANY_SPILS,"data space", */ +/* _G.dataExtend,currFunc->name,""); */ + _G.dataExtend = 0; + } + + /* after that create the register mask + for each of the instruction */ + createRegMask (ebbs, count); + + /* redo that offsets for stacked automatic variables */ + redoStackOffsets (); + + if (options.dump_rassgn) + dumpEbbsToFileExt (DUMP_RASSGN, ebbi); + +// dumpLR(ebbs, count); + + /* now get back the chain */ + ic = iCodeLabelOptimize (iCodeFromeBBlock (ebbs, count)); + + debugLog ("ebbs after optimizing:\n"); + dumpEbbsToDebug (ebbs, count); + + + _inRegAllocator = 0; + + genpic16Code (ic); + + /* free up any _G.stackSpil locations allocated */ + applyToSet (_G.stackSpil, deallocStackSpil); + _G.slocNum = 0; + setToNull ((void *) &_G.stackSpil); + setToNull ((void *) &_G.spiltSet); + /* mark all registers as free */ + pic16_freeAllRegs (); + + + debugLog ("leaving\n<><><><><><><><><><><><><><><><><>\n"); + debugLogClose (); + return; +} diff --git a/src/pic16/ralloc.h b/src/pic16/ralloc.h new file mode 100644 index 0000000..41e2269 --- /dev/null +++ b/src/pic16/ralloc.h @@ -0,0 +1,193 @@ +/*------------------------------------------------------------------------- + + ralloc.h - header file register allocation + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + PIC port - T. Scott Dattalo scott@dattalo.com (2000) + PIC16 port - Martin Dubuc m.dubuc@rogers.com (2002) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "SDCCicode.h" +#include "SDCCBBlock.h" +#ifndef SDCCRALLOC_H +#define SDCCRALLOC_H 1 + +#include "pcoderegs.h" + +enum + { + R2_IDX = 0, R3_IDX, R4_IDX, + R5_IDX, R6_IDX, R7_IDX, + R0_IDX, R1_IDX, X8_IDX, + X9_IDX, X10_IDX, X11_IDX, + X12_IDX, CND_IDX + }; + +enum { + REG_PTR=1, + REG_GPR, + REG_CND, + REG_SFR, + REG_STK, + REG_TMP +}; +//#define REG_PTR 0x01 +//#define REG_GPR 0x02 +//#define REG_CND 0x04 +//#define REG_SFR 0x08 +//#define REG_STK 0x10 /* Use a register as a psuedo stack */ +//#define REG_TMP 0x20 + +/* definition for the registers */ +typedef struct regs + { + short type; /* can have value + * REG_GPR, REG_PTR or REG_CND + * This like the "meta-type" */ + short pc_type; /* pcode type */ + short rIdx; /* index into register table */ + // short otype; + char *name; /* name */ + + unsigned isFree:1; /* is currently unassigned */ + unsigned wasUsed:1; /* becomes true if register has been used */ + unsigned isFixed:1; /* True if address can't change */ +// unsigned isMapped:1; /* The Register's address has been mapped to physical RAM */ + unsigned isBitField:1; /* True if reg is type bit OR is holder for several bits */ + unsigned isEmitted:1; /* True if the reg has been written to a .asm file */ + unsigned accessBank:1; /* True if the reg is explicit placed in access bank */ + unsigned isLocal:1; /* True if the reg is allocated in function's local frame */ + unsigned address; /* reg's address if isFixed | isMapped is true */ + unsigned size; /* 0 for byte, 1 for int, 4 for long */ + unsigned alias; /* Alias mask if register appears in multiple banks */ + struct regs *reg_alias; /* If more than one register share the same address + * then they'll point to each other. (primarily for bits)*/ + operand *regop; /* reference to the operand used to create the register */ + pCodeRegLives reglives; /* live range mapping */ + } +regs; +extern regs regspic16[]; +extern int pic16_nRegs; +extern int pic16_Gstack_base_addr; + +/* + As registers are created, they're added to a set (based on the + register type). Here are the sets of registers that are supported + in the PIC port: +*/ +extern set *pic16_dynAllocRegs; +extern set *pic16_dynStackRegs; +extern set *pic16_dynProcessorRegs; +extern set *pic16_dynDirectRegs; +extern set *pic16_dynDirectBitRegs; +extern set *pic16_dynInternalRegs; + +extern set *pic16_builtin_functions; + +extern set *pic16_rel_udata; +extern set *pic16_fix_udata; +extern set *pic16_equ_data; +extern set *pic16_int_regs; +extern set *pic16_acs_udata; + +regs *pic16_regWithIdx (int); +regs *pic16_typeRegWithIdx(int, int, int); +regs *pic16_dirregWithName (char *name ); +regs *pic16_allocregWithName(char *name); +regs *pic16_regWithName(char *name); +void pic16_freeAllRegs (); +void pic16_deallocateAllRegs (); +regs *pic16_findFreeReg(short type); +regs *pic16_findFreeRegNext(short type, regs *creg); +regs *pic16_allocWithIdx (int idx); + +regs *pic16_allocDirReg (operand *op ); +regs *pic16_allocRegByName (char *name, int size, operand *op); +extern char *pic16_decodeOp(unsigned int op); + +regs* newReg(int type, short pc_type, int rIdx, char *name, unsigned size, int alias, operand *refop); + +/* Define register address that are constant across PIC16 family */ +#define IDX_TMR0 0xfd6 +#define IDX_STATUS 0xfd8 +#define IDX_INTCON 0xff2 +#define IDX_WREG 0xfe8 +#define IDX_BSR 0xfe0 + +#define IDX_PCL 0xff9 +#define IDX_PCLATH 0xffa +#define IDX_PCLATU 0xffb + +#define IDX_TOSL 0xffd +#define IDX_TOSH 0xffe +#define IDX_TOSU 0xfff + +#define IDX_TBLPTRL 0xff6 +#define IDX_TBLPTRH 0xff7 +#define IDX_TBLPTRU 0xff8 +#define IDX_TABLAT 0xff5 + +#define IDX_FSR0 0xfe9 +#define IDX_FSR0L 0xfe9 +#define IDX_FSR0H 0xfea + +#define IDX_FSR1 0xfe1 +#define IDX_FSR1L 0xfe1 +#define IDX_FSR1H 0xfe2 + +#define IDX_FSR2 0xfd9 +#define IDX_FSR2L 0xfd9 +#define IDX_FSR2H 0xfda + +#define IDX_INDF0 0xfef +#define IDX_POSTINC0 0xfee +#define IDX_POSTDEC0 0xfed +#define IDX_PREINC0 0xfec +#define IDX_PLUSW0 0xfeb + +#define IDX_INDF1 0xfe7 +#define IDX_POSTINC1 0xfe6 +#define IDX_POSTDEC1 0xfe5 +#define IDX_PREINC1 0xfe4 +#define IDX_PLUSW1 0xfe3 + +#define IDX_INDF2 0xfdf +#define IDX_POSTINC2 0xfde +#define IDX_POSTDEC2 0xfdd +#define IDX_PREINC2 0xfdc +#define IDX_PLUSW2 0xfdb + +#define IDX_PRODL 0xff3 +#define IDX_PRODH 0xff4 + +/* EEPROM registers */ +#define IDX_EECON1 0xfa6 +#define IDX_EECON2 0xfa7 +#define IDX_EEDATA 0xfa8 +#define IDX_EEADR 0xfa9 + +#define IDX_KZ 0x7fff /* Known zero - actually just a general purpose reg. */ +#define IDX_WSAVE 0x7ffe +#define IDX_SSAVE 0x7ffd + +#define IDX_GPSIMIO 0xf7f +#define IDX_GPSIMIO2 0xf7e + +#endif diff --git a/src/port-clean.mk b/src/port-clean.mk new file mode 100644 index 0000000..205d28f --- /dev/null +++ b/src/port-clean.mk @@ -0,0 +1,5 @@ +clean: + rm -f $(LIB) *.o *~ port.a *.lst *.asm *.sym *~ *.cdb *.dep *.rul + +distclean: clean + rm -f Makefile \ No newline at end of file diff --git a/src/port.h b/src/port.h new file mode 100644 index 0000000..1533620 --- /dev/null +++ b/src/port.h @@ -0,0 +1,406 @@ +/** @file port.h + Definitions for what a port must provide. + All ports are referenced in SDCCmain.c. +*/ +#ifndef PORT_INCLUDE +#define PORT_INCLUDE + +#include "SDCCicode.h" +#include "SDCCargs.h" +#include "SDCCpeeph.h" +#include "dbuf.h" + +#define TARGET_ID_MCS51 1 +#define TARGET_ID_GBZ80 2 +#define TARGET_ID_Z80 3 +#define TARGET_ID_AVR 4 +#define TARGET_ID_DS390 5 +#define TARGET_ID_PIC 6 +#define TARGET_ID_PIC16 7 +#define TARGET_ID_XA51 9 +#define TARGET_ID_DS400 10 +#define TARGET_ID_HC08 11 + +/* Macro to test the target we are compiling for. + Can only be used after SDCCmain has defined the port +*/ +#define TARGET_IS_MCS51 (port->id==TARGET_ID_MCS51) +#define TARGET_IS_GBZ80 (port->id==TARGET_ID_GBZ80) +#define TARGET_IS_Z80 (port->id==TARGET_ID_Z80) +#define TARGET_Z80_LIKE (TARGET_IS_Z80 || TARGET_IS_GBZ80) +#define TARGET_IS_AVR (port->id==TARGET_ID_AVR) +#define TARGET_IS_DS390 (port->id==TARGET_ID_DS390) +#define TARGET_IS_DS400 (port->id==TARGET_ID_DS400) +#define TARGET_IS_PIC (port->id==TARGET_ID_PIC) +#define TARGET_IS_PIC16 (port->id==TARGET_ID_PIC16) +#define TARGET_IS_XA51 (port->id==TARGET_ID_XA51) +#define TARGET_IS_HC08 (port->id==TARGET_ID_HC08) +#define TARGET_MCS51_LIKE (TARGET_IS_MCS51 || TARGET_IS_DS390 || TARGET_IS_DS400) + +#define MAX_BUILTIN_ARGS 16 +/* definition of builtin functions */ +typedef struct builtins + { + char *name; /* name of builtin function */ + char *rtype; /* return type as string : see typeFromStr */ + int nParms; /* number of parms : max 8 */ + char *parm_types[MAX_BUILTIN_ARGS]; /* each parm type as string : see typeFromStr */ + } builtins; + +struct ebbIndex; + +/* pragma structure */ +struct pragma_s + { + const char *name; + int id; + char deprecated; + int (*func)(int id, const char *name, const char *cp); + }; + +/* defined in SDCClex.lex */ +int process_pragma_tbl(const struct pragma_s *pragma_tbl, const char *s); + +/* Processor specific names */ +typedef struct + { +/** Unique id for this target */ + const int id; +/** Target name used for -m */ + const char * const target; + +/** Target name string, used for --help */ + const char * const target_name; + +/** Specific processor for the given target family. specified by -p */ + char *processor; + + struct + { + /** Pointer to glue function */ + void (*do_glue)(void); + /** TRUE if all types of glue functions should be inserted into + the file that also defines main. + We dont want this in cases like the z80 where the startup + code is provided by a seperate module. + */ + bool glue_up_main; + /* OR of MODEL_* */ + int supported_models; + int default_model; + } + general; + + /* assembler related information */ + struct + { + /** Command to run and arguments (eg as-z80) */ + const char **cmd; + /** Alternate macro based form. */ + const char *mcmd; + /** Arguments for debug mode. */ + const char *debug_opts; + /** Arguments for normal assembly mode. */ + const char *plain_opts; + /* print externs as global */ + int externGlobal; + /* assembler file extension */ + const char *file_ext; + /** If non-null will be used to execute the assembler. */ + void (*do_assemble) (set *); + } + assembler; + + /* linker related info */ + struct + { + /** Command to run (eg link-z80) */ + const char **cmd; + /** Alternate macro based form. */ + const char *mcmd; + /** If non-null will be used to execute the link. */ + void (*do_link) (void); + /** Extension for object files (.rel, .obj, ...) */ + const char *rel_ext; + /** 1 if port needs the .lnk file, 0 otherwise */ + const int needLinkerScript; + } + linker; + + struct + { +/** Default peephole rules */ + char *default_rules; + int (*getSize)(lineNode *line); + bitVect * (*getRegsRead)(lineNode *line); + bitVect * (*getRegsWritten)(lineNode *line); + bool (*deadMove) (const char *reg, lineNode *currPl, lineNode *head); + bool (*notUsed) (const char *reg, lineNode *currPl, lineNode *head); + } + peep; + +/** Basic type sizes */ + struct + { + int char_size; + int short_size; + unsigned int int_size; + int long_size; + int ptr_size; //near + int fptr_size; //far + int gptr_size; //generic + int bit_size; + int float_size; + int max_base_size; + } + s; + +/** tags for far, near, xstack, code generic pointers */ + struct + { + int tag_far; + int tag_near; + int tag_xstack; + int tag_code; + } + gp_tags; + +/** memory regions related stuff */ + struct + { + const char * const xstack_name; + const char * const istack_name; + /* + * The following 2 items can't be const pointers + * due to ugly implementation in z80 target; + * this should be fixed in src/z80/main.c (borutr) + */ + const char *code_name; + const char *data_name; + const char * const idata_name; + const char * const pdata_name; + const char * const xdata_name; + const char * const bit_name; + const char * const reg_name; + const char * const static_name; + const char * const overlay_name; + const char * const post_static_name; + const char * const home_name; + const char * const xidata_name; // initialized xdata + const char * const xinit_name; // a code copy of xidata + const char * const const_name; // const data (code or not) + const char * const cabs_name; // const absolute data (code or not) + const char * const xabs_name; // absolute xdata/pdata + const char * const iabs_name; // absolute idata/data + struct memmap *default_local_map; // default location for auto vars + struct memmap *default_globl_map; // default location for globl vars + int code_ro; /* code space read-only 1=yes */ + } + mem; + + struct + { + void (*genExtraAreaDeclaration)(FILE *, bool); + void (*genExtraAreaLinkOptions)(FILE *); + } + extraAreas; + + /* stack related information */ + struct + { +/** -1 for grows down (z80), +1 for grows up (mcs51) */ + int direction; +/** Extra overhead when calling between banks */ + int bank_overhead; +/** Extra overhead when the function is an ISR */ + int isr_overhead; +/** Standard overhead for a function call */ + int call_overhead; +/** Re-enterant space */ + int reent_overhead; + /** 'banked' call overhead. + Mild overlap with bank_overhead */ + int banked_overhead; + } + stack; + + struct + { + /** One more than the smallest + mul/div operation the processor can do natively + Eg if the processor has an 8 bit mul, native below is 2 */ + unsigned muldiv; + unsigned shift; + } + support; + + struct + { + void (*emitDebuggerSymbol) (char *); + struct + { + int (*regNum) (struct regs *); + bitVect * cfiSame; + bitVect * cfiUndef; + int addressSize; + int regNumRet; + int regNumSP; + int regNumBP; + int offsetSP; + } + dwarf; + } + debugger; + + struct + { + int maxCount; + int sizeofElement; + int sizeofMatchJump[3]; + int sizeofRangeCompare[3]; + int sizeofSubtract; + int sizeofDispatch; + } + jumptableCost; + +/** Prefix to add to a C function (eg "_") */ + const char *fun_prefix; + + /** Called once the processor target has been selected. + First chance to initalise and set any port specific variables. + 'port' is set before calling this. May be NULL. + */ + void (*init) (void); +/** Parses one option + its arguments */ + bool (*parseOption) (int *pargc, char **argv, int *i); +/** Optional list of automatically parsed options. Should be + implemented to at least show the help text correctly. */ + OPTION *poptions; +/** Initialise port spectific paths */ + void (*initPaths)(void); +/** Called after all the options have been parsed. */ + void (*finaliseOptions) (void); + /** Called after the port has been selected but before any + options are parsed. */ + void (*setDefaultOptions) (void); +/** Does the dirty work. */ + void (*assignRegisters) (struct ebbIndex *); + + /** Returns the register name of a symbol. + Used so that 'regs' can be an incomplete type. */ + const char *(*getRegName) (struct regs * reg); + + /* list of keywords that are used by this + target (used by lexer) */ + char **keywords; + + /* Write any port specific assembler output. */ + void (*genAssemblerPreamble) (FILE * of); + /* invoked at end assembler file */ + void (*genAssemblerEnd) (FILE * of); + + /* Write the port specific IVT. If genIVT is NULL or if + * it returns zero, default (8051) IVT generation code + * will be used. + */ + int (*genIVT) (struct dbuf_s *oBuf, symbol ** intTable, int intCount); + + void (*genXINIT) (FILE * of); + + /* Write port specific startup code */ + void (*genInitStartup) (FILE * of); + + /* parameter passing in register related functions */ + void (*reset_regparms) (void); /* reset the register count */ + int (*reg_parm) (struct sym_link *, bool reentrant); /* will return 1 if can be passed in register */ + + /** Process the pragma string 'sz'. Returns 0 if recognised and + processed, 1 otherwise. May be NULL. + */ + int (*process_pragma) (const char *sz); + + /** Mangles a support function name to reflect the calling model. + */ + char *(*getMangledFunctionName) (char *szOrginial); + + /** Returns true if the port can multiply the two types nativly + without using support functions. + */ + bool (*hasNativeMulFor) (iCode *ic, sym_link *left, sym_link *right); + + /** Returns true if the port has implemented certain bit + manipulation iCodes (RRC, RLC, SWAP, GETHBIT, GETABIT, GETBYTE, GETWORD) + */ + bool (*hasExtBitOp) (int op, int size); + + /** Returns the relative expense of accessing a particular output + storage class. Larger values indicate higher expense. + */ + int (*oclsExpense) (struct memmap *oclass); + + /** If TRUE, then tprintf and !dw will be used for some initalisers + */ + bool use_dw_for_init; + + /** TRUE for targets with little endian byte ordering, FALSE for + targets with big endian byte ordering. + */ + bool little_endian; + + /* condition transformations */ + bool lt_nge; /* transform (a < b) to !(a >= b) */ + bool gt_nle; /* transform (a > b) to !(a <= b) */ + bool le_ngt; /* transform (a <= b) to !(a > b) */ + bool ge_nlt; /* transform (a >= b) to !(a < b) */ + bool ne_neq; /* transform a != b --> ! (a == b) */ + bool eq_nne; /* transform a == b --> ! (a != b) */ + + bool arrayInitializerSuppported; + bool (*cseOk) (iCode *ic, iCode *pdic); + builtins *builtintable; /* table of builtin functions */ + int unqualified_pointer; /* unqualified pointers type is */ + int reset_labelKey ; /* reset Label no 1 at the start of a function */ + int globals_allowed ; /* global & static locals not allowed ? 0 ONLY TININative*/ +#define PORT_MAGIC 0xAC32 +/** Used at runtime to detect if this structure has been completly filled in. */ + int magic; + } +PORT; + +extern PORT *port; + +#if !OPT_DISABLE_MCS51 +extern PORT mcs51_port; +#endif +#if !OPT_DISABLE_GBZ80 +extern PORT gbz80_port; +#endif +#if !OPT_DISABLE_Z80 +extern PORT z80_port; +#endif +#if !OPT_DISABLE_AVR +extern PORT avr_port; +#endif +#if !OPT_DISABLE_DS390 +extern PORT ds390_port; +#endif +#if !OPT_DISABLE_PIC +extern PORT pic_port; +#endif +#if !OPT_DISABLE_PIC16 +extern PORT pic16_port; +#endif +#if !OPT_DISABLE_TININative +extern PORT tininative_port; +#endif +#if !OPT_DISABLE_XA51 +extern PORT xa51_port; +#endif +#if !OPT_DISABLE_DS400 +extern PORT ds400_port; +#endif +#if !OPT_DISABLE_HC08 +extern PORT hc08_port; +#endif + +#endif /* PORT_INCLUDE*/ diff --git a/src/port.mk b/src/port.mk new file mode 100644 index 0000000..8da5214 --- /dev/null +++ b/src/port.mk @@ -0,0 +1,49 @@ +# Common Makefile for all ports. +# Input: SOURCES - list of C files included in the project +# SPECIAL - list of special files that should be included in dependencies +# PEEPRULES - list of all peephole rules (.rul) derrived files +# PREBUILD - list of special files to build before deps. + +# Ports are always located in sdcc/src/ + +# Output +LIB = port.a +# Include the sdcc/src directory +INCLUDEFLAGS = -I$(srcdir)/.. -I.. + +# If the sources aren't specified, assume all in this directory. +ifndef SOURCES +SOURCES = $(notdir $(wildcard $(srcdir)/*.c)) +endif + +# If the peephole rules aren't specified, assume all. +ifndef PEEPRULES +PEEPDEFS = $(notdir $(wildcard $(srcdir)/*.def)) +PEEPRULES = $(PEEPDEFS:.def=.rul) +endif + +PREBUILD += $(PEEPRULES) + +all: $(PREBUILD) dep $(LIB) + +include $(top_builddir)/Makefile.common + +$(LIB): $(OBJ) + rm -f $(LIB) + $(AR) r $(LIB) $(OBJ) + $(RANLIB) $(LIB) + +%.rul: %.def + $(AWK) -f $(srcdir)/../SDCCpeeph.awk $< > $@ + +dep: Makefile.dep + +Makefile.dep: $(PREBUILD) Makefile $(SOURCES) $(SPECIAL) + $(CPP) $(CPPFLAGS) $(M_OR_MM) $(filter %.c,$^) >Makefile.dep + +# don't include Makefile.dep for the listed targets: +ifeq "$(findstring $(MAKECMDGOALS),clean distclean)" "" + -include Makefile.dep +endif + +include $(srcdir)/../port-clean.mk diff --git a/src/regression/Makefile b/src/regression/Makefile new file mode 100644 index 0000000..4a5468a --- /dev/null +++ b/src/regression/Makefile @@ -0,0 +1,226 @@ +# Regression testing Makefile for Pic Port of SDCC +# +# note that this regression suite was started before +# the one in sdcc/regression. The regression suite in +# sdcc/regression is better suited for testing mature +# ports. +# +# GPL'd +# +# T. Scott Dattalo scott@dattalo.com +# +# This makefile provides a means by which the output +# of the SDCC Compiler can be tested. This version +# is unique to the PIC (as in Microchip PIC) port. +# As such it requires the following software: +# +# gpasm version 0.11.1 (or greater) +# gpsim version 0.20.7 (or greater) +# +# Usage: +# +# make +# - without any options the whole regression test is +# performed. The results are placed into a log file +# (defined by $LOGFILE). +# +# make asm +# - Creates .asm files by compiling the .c files +# +# make cod +# - Creates .cod files by assembling the .asm files +# (.cod files are symbolic files compatible with +# MPASM, Microchip's assembler) +# +# make stc +# - Creates .stc files which are script files for +# gpsim. +# +# make clean +# - removes all of the intermediate files created +# +# make cleancod +# make cleanasm +# make cleanstc +# make cleano +# - removes either the .stc, .asm, .cod or .o files + +# verboseness +#Q ?= # be verbose +Q ?= @ # be quiet + +SDCC_SRC=../.. +SDCC_BIN=../.. + +CC = $(SDCC_BIN)/bin/sdcc +LINKER = gplink +USE_PIC16 ?= 0 +ifeq ($(strip $(filter 1 yes,$(USE_PIC16))),) +TARGETPIC = 16f877 +#TARGETPIC = 16f84 +CFLAGS = -mpic14 -p$(TARGETPIC) +DIR = pic +else +TARGETPIC = 18f452 +CFLAGS = -mpic16 -p$(TARGETPIC) +DIR = pic16 +endif +CFLAGS += -Wl,-q +CFLAGS += -Wl,--map +CFLAGS += -I $(SDCC_SRC)/device/include/$(DIR) +CFLAGS += -L $(SDCC_BIN)/device/lib/$(DIR)/bin +#CFLAGS += --no-pcode-opt +#CFLAGS += -V + +.SUFFIXES: .asm .c .cod .stc +.NOTPARALLEL: + +# Results of the test are placed here: +LOGFILE = test.log + +# Script file for creating gpsim scripts +CREATESTC = create_stc + +# Script file for invoking gpsim +SIMULATE = simulate + +# List the C files to be test here: +SRC = add.c \ + add2.c \ + add3.c \ + add4.c \ + and1.c \ + and2.c \ + arrays.c \ + b.c \ + bank1.c \ + bool1.c \ + bool2.c \ + bool3.c \ + call1.c \ + compare.c \ + compare10.c \ + compare2.c \ + compare3.c \ + compare4.c \ + compare5.c \ + compare6.c \ + compare7.c \ + compare8.c \ + compare9.c \ + configword.c \ + empty.c \ + for.c \ + init0.c \ + inline.c \ + mult1.c \ + nestfor.c \ + or1.c \ + pcodeopt.c \ + pointer1.c \ + ptrarg.c \ + ptrfunc.c \ + rotate1.c \ + rotate2.c \ + rotate3.c \ + rotate4.c \ + rotate5.c \ + rotate6.c \ + rotate7.c \ + string1.c \ + struct1.c \ + sub.c \ + sub2.c \ + switch1.c \ + while.c \ + xor.c + +COD := $(patsubst %.c, %.cod, $(SRC)) +ASM := $(patsubst %.c, %.asm, $(SRC)) +O := $(patsubst %.c, %.o, $(SRC)) +P := $(patsubst %.c, %.p, $(SRC)) +STC := $(patsubst %.c, %.stc, $(SRC)) +HEX := $(patsubst %.c, %.hex, $(SRC)) +LST := $(patsubst %.c, %.lst, $(SRC)) +MAP := $(patsubst %.c, %.map, $(SRC)) + +all: test + + +# The cod files are generated by sdcc +.c.cod: + $(Q)-$(CC) $(CFLAGS) $*.c + +# The .stc files are script files for gpsim +.cod.stc: + $(Q)-./$(CREATESTC) $*.cod $*.stc + $(Q)-./$(SIMULATE) $*.stc $(LOGFILE) + +# this will also make .stc files +#%.stc : %.cod +# ./create_stc $^ $@ + +# now for the dependencies + +cod : $(COD) + +o : $(O) + +asm : $(ASM) + +stc : $(STC) + echo $(STC) + +test: $(STC) + $(Q)echo "Done - Results are in $(LOGFILE)" + +cleancod: + files="$(COD)" ; \ + for f in $$files ; do \ + if [ -f $$f ]; then rm $$f; fi \ + done ; \ + +cleano: + files="$(O)" ; \ + for f in $$files ; do \ + if [ -f $$f ]; then rm $$f; fi \ + done ; \ + +cleanp: + files="$(P)" ; \ + for f in $$files ; do \ + if [ -f $$f ]; then rm $$f; fi \ + done ; \ + +cleanasm: + files="$(ASM)" ; \ + for f in $$files ; do \ + if [ -f $$f ]; then rm $$f; fi \ + done ; \ + +cleanstc: + files="$(STC)" ; \ + for f in $$files ; do \ + if [ -f $$f ]; then rm $$f; fi \ + done ; \ + +cleanhex: + files="$(HEX)" ; \ + for f in $$files ; do \ + if [ -f $$f ]; then rm $$f; fi \ + done ; \ + +cleanlst: + files="$(LST)" ; \ + for f in $$files ; do \ + if [ -f $$f ]; then rm $$f; fi \ + done ; \ + +cleanmap: + files="$(MAP)" ; \ + for f in $$files ; do \ + if [ -f $$f ]; then rm $$f; fi \ + done ; \ + +clean: cleancod cleanasm cleanstc cleano cleanp cleanhex cleanlst cleanmap + if [ -f "$(LOGFILE)" ]; then rm $(LOGFILE); fi diff --git a/src/regression/add.c b/src/regression/add.c new file mode 100644 index 0000000..99fce7a --- /dev/null +++ b/src/regression/add.c @@ -0,0 +1,191 @@ +#include "gpsim_assert.h" + +// Addition tests + +/* bit types are not ANSI - so provide a way of disabling bit types + * if this file is used to test other compilers besides SDCC */ +#define SUPPORT_BIT_TYPES 0 + +/* Some compilers that support bit types do not support bit arithmetic + * (like bitx = bity + bitz;) */ +#define SUPPORT_BIT_ARITHMETIC 1 + +unsigned char failures=0; + +#if SUPPORT_BIT_TYPES + +bit bit0 = 0; +bit bit1 = 0; +bit bit2 = 0; +bit bit3 = 0; +bit bit4 = 0; +bit bit5 = 0; +bit bit6 = 0; +bit bit7 = 0; +bit bit8 = 0; +bit bit9 = 0; +bit bit10 = 0; +bit bit11 = 0; + +#endif + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; +unsigned char achar2 = 0; +unsigned char achar3 = 0; +unsigned char *acharP = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void add_lit2uchar(void) +{ + + achar0 = achar0 + 5; + + if(achar0 != 5) + failures++; + + achar0 += 10; + + if(achar0 != 15) + failures++; + + achar0 = achar0 +1; // Should be an increment + if(achar0 != 16) + failures++; + + for(achar1 = 0; achar1 < 100; achar1++) + achar0 += 2; + + if(achar0 != 216) + failures++; + +} + +void add_uchar2uchar(void) +{ + + achar1 = achar1 + achar0; + + if(achar1 != 16) + failures++; + + for(achar2 = 0; achar2<7; achar2++) + achar1 += achar0; + + if(achar1 != 128) + failures++; + +} + +// assumes +// achar0 = 0 +// achar1 = 32 +// achar2, achar3 can be anything. + +void add_uchar2uchar2(void) +{ + achar0++; + achar0 = achar0 + 1; + achar0 = achar0 + 2; + achar0 = achar0 + 3; + if(achar0 != 7) + failures++; + + achar1 += achar0; + if(achar1 != 39) + failures++; + + achar2 = achar1 + achar0; + if(achar2 != 46) + failures++; + + achar3 = achar2 + achar1 + achar0; + if(achar3 != 92) + failures++; +} + +#if SUPPORT_BIT_TYPES +void add_bits(void) +{ + bit1 = bit0; + + bit0 = 1; + + if(bit1 != 0) + failures++; + + bit1 = bit1+bit0; + if(bit1 != 1) + failures++; + +#if SUPPORT_BIT_ARITHMETIC + bit2 = bit1+bit3; + if(!bit2) + failures++; + + bit3 = bit4+bit5+bit6+bit7+bit0; + if(!bit3) + failures++; +#endif +} +#endif + +/* add_bit2uchar(void) - assumes bit0 = 1, achar0 = 7 */ + +#if SUPPORT_BIT_TYPES +void add_bit2uchar(void) +{ + achar0 += bit0; + + if(achar0 != 8) + failures++; + + if(achar0 == bit0) + failures++; +} + +void add_bit2uint(void) +{ + if(aint0 != bit11) + failures++; + + aint0 += bit0; + if(aint0!=1) + failures++; +} +#endif + +void main(void) +{ + add_lit2uchar(); + ASSERT(MANGLE(failures) == 0); + + achar0=16; + achar1=0; + add_uchar2uchar(); + ASSERT(MANGLE(failures) == 0); + + + achar0 = 0; + achar1 = 32; + add_uchar2uchar2(); + ASSERT(MANGLE(failures) == 0); + +#if SUPPORT_BIT_TYPES + add_bits(); + + add_bit2uchar(); + add_bit2uint(); +#endif + ASSERT(MANGLE(failures) == 0); + + done(); +} diff --git a/src/regression/add2.c b/src/regression/add2.c new file mode 100644 index 0000000..f9536e4 --- /dev/null +++ b/src/regression/add2.c @@ -0,0 +1,326 @@ +#include "gpsim_assert.h" + +// Addition tests - mostly int's + +/* bit types are not ANSI - so provide a way of disabling bit types + * if this file is used to test other compilers besides SDCC */ +#define SUPPORT_BIT_TYPES 0 + + +unsigned char failures=0; + + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned int aint2 = 0; +unsigned int aint3 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; +unsigned char achar2 = 0; +unsigned char achar3 = 0; +unsigned char *acharP = 0; + +#if SUPPORT_BIT_TYPES + +bit bit0 = 0; +bit bit1 = 0; +bit bit2 = 0; +bit bit3 = 0; +bit bit4 = 0; +bit bit5 = 0; +bit bit6 = 0; +bit bit7 = 0; +bit bit8 = 0; +bit bit9 = 0; +bit bit10 = 0; +bit bit11 = 0; + +#endif + + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void add_lit2uint(void) +{ + + aint0 = aint0 + 5; + + if(aint0 != 5) + failures++; + + aint0 += 10; + + if(aint0 != 15) + failures++; + + aint0 = aint0 +1; // Should be an increment + if(aint0 != 16) + failures++; + + for(aint1 = 0; aint1 < 100; aint1++) + aint0 += 2; + + if(aint0 != 216) + failures++; + +} + +void add_uint2uint (void) +{ + + aint1 = aint1 + aint0; + + if(aint1 != 16) + failures++; + + for(aint2 = 0; aint2<7; aint2++) + aint1 += aint0; + + if(aint1 != 128) + failures++; + +} + +// assumes +// aint0 = 0 +// aint1 = 32 +// aint2, aint3 can be anything. + +void add_uint2uint2(void) +{ + + + aint0++; + aint0 = aint0 + 1; + aint0 = aint0 + 2; + aint0 = aint0 + 3; + if(aint0 != 7) + failures++; + + aint1 += aint0; + if(aint1 != 0x27) + failures++; + + aint2 = aint1 + aint0; + if(aint2 != 0x2e) + failures++; + + aint3 = aint2 + aint1 + aint0; + if(aint3 != 0x5c) + failures++; + + aint3 += 0xa0; + if(aint3 != 0xfc) + failures++; + + aint3 += aint0; + if(aint3 != 0x103) + failures++; + + aint1 += 0xffc0; + if(aint1 != 0xffe7) + failures++; + + aint3 = aint2 + aint1 + aint0; + if(aint3 != 0x1c) + failures++; + + +} + +#if SUPPORT_BIT_TYPES +void add_bits(void) +{ + + bit1 = bit0; + + bit0 = 1; + + if(bit1 != 0) + failures++; + + bit1 = bit1+bit0; + if(bit1 != 1) + failures++; + + bit2 = bit1+bit3; + if(!bit2) + failures++; + + bit3 = bit4+bit5+bit6+bit7+bit0; + if(!bit3) + failures++; +} +#endif + +/* add_bit2uchar(void) - assumes bit0 = 1, aint0 = 7 */ + +#if SUPPORT_BIT_TYPES +void add_bit2uchar(void) +{ + + achar0 += bit0; + + if(achar0 != 8) + failures++; + + if(achar0 == bit0) + failures++; + +} + +void add_bit2uint(void) +{ + + if(aint0 != bit11) + failures++; + + aint0 += bit0; + if(aint0!=1) + failures++; + +} +#endif + +/***********************************/ + +void addlits(void) +{ + aint0 += 0x0001; + + if(aint0 != 1) + failures++; + + aint0 += 0x00; + + if(aint0 != 1) + failures++; + + aint0 += 0x00fe; + if(aint0 != 0x00ff) + failures++; + + aint0 += 0x0001; + + if(aint0 != 0x0100) + failures++; + + aint0++; + if(aint0 != 0x0101) + failures++; + + aint0 += 0x00ff; + if(aint0 != 0x0200) + failures++; + + aint0 += 0x00a0; + if(aint0 != 0x02a0) + failures++; + + aint0 += 0x0061; + if(aint0 != 0x0301) + failures++; + + aint0 += 0x0100; + if(aint0 != 0x0401) + failures++; + + aint0 += 0x0101; + if(aint0 != 0x0502) + failures++; + + aint0 += 0x00fd; + if(aint0 != 0x05ff) + failures++; + + aint0 += 0x0101; + if(aint0 != 0x0700) + failures++; + + aint0 += 0x01ff; + if(aint0 != 0x08ff) + failures++; + + aint0 += 0x01ff; + if(aint0 != 0x0afe) + failures++; + + aint0 += 0xff02; + if(aint0 != 0x0a00) + failures++; + + aint0 += 0xffff; + if(aint0 != 0x09ff) + failures++; + + aint0 += 0xff01; + if(aint0 != 0x0900) + failures++; + + aint0 += 0xff00; + if(aint0 != 0x0800) + failures++; + + aint0 += 0xff01; + if(aint0 != 0x0701) + failures++; + + aint0 += 0x0300; + if(aint0 != 0x0a01) + failures++; + + aint0 += 0x03ff; + if(aint0 != 0x0e00) + failures++; + + aint0 += 0x0301; + if(aint0 != 0x1101) + failures++; + + aint0 += 0x03fe; + if(aint0 != 0x14ff) + failures++; + + aint0 += 0x0301; + if(aint0 != 0x1800) + failures++; + +} + + +void main(void) +{ + + add_lit2uint(); + + aint0=16; + aint1=0; + add_uint2uint(); + + + aint0 = 0; + aint1 = 32; + aint2 = 0; + add_uint2uint2(); + +#if SUPPORT_BIT_TYPES + add_bits(); + + achar0 = 7; + add_bit2uchar(); + + aint0 = 0; + bit0 = 1; + add_bit2uint(); +#endif + + aint0 = 0; + addlits(); + + done(); +} diff --git a/src/regression/add3.c b/src/regression/add3.c new file mode 100644 index 0000000..a1990af --- /dev/null +++ b/src/regression/add3.c @@ -0,0 +1,218 @@ +#include "gpsim_assert.h" + +// Addition tests - mostly int's + +/* bit types are not ANSI - so provide a way of disabling bit types + * if this file is used to test other compilers besides SDCC */ +#define SUPPORT_BIT_TYPES 0 + + +unsigned char failures=0; + + +char char0 = 0; +char char1 = 0; +char char2 = 0; +int int0 = 0; +int int1 = 0; +long long0 = 0; +long long1 = 0; +unsigned long ulong0 = 0; +unsigned long ulong1 = 0; + +#if SUPPORT_BIT_TYPES + +bit bit0 = 0; +bit bit1 = 0; +bit bit2 = 0; +bit bit3 = 0; +bit bit4 = 0; +bit bit5 = 0; +bit bit6 = 0; +bit bit7 = 0; +bit bit8 = 0; +bit bit9 = 0; +bit bit10 = 0; +bit bit11 = 0; + +#endif + + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void add_char2char(void) +{ + if(char0 != 4) + failures++; + if(char1 != 5) + failures++; + + char0 = char0 + char1; + + if(char0 != 9) + failures++; + + char0 += 127; + if(char0 > 0) + failures++; + + if(char0 != -0x78) + failures++; + + +} + +void add_compound_char(void) +{ + char0 = char1+5; + + if(char0 != 9) + failures++; + + if((char0+char1) != 13) + failures++; +} + +void add_int2int(void) +{ + if(int0 != 4) + failures++; + if(int1 != 5) + failures++; + + int0 += int1; + if(int0 != 9) + failures++; + + int0 += 0x7fff; + if(int0 != -0x7ff8) + failures++; + +} + +void add_compound_int(void) +{ + int0 = int1+5; + + if(int0 != 9) + failures++; + + if((int0+int1) != 13) + failures++; +} + + +void add_lit2long(void) +{ + + if(long0 != 0) + failures++; + + long0++; + + if(long0 != 1) + failures++; + + long0 = long0 + 0xff; + + if(long0 != 0x100) + failures++; + + long0 = long0 + 0x100; + if(long0 != 0x200) + failures++; + + + long0 = long0 + 0xfe00; + if(long0 != 0x10000) + failures++; + + long0 = long0 + 0xff0000; + if(long0 != 0x1000000) + failures++; + + long0 = long0 + 0x7e000000; + if(long0 != 0x7f000000) + failures++; + + /* wrap around zero */ + long0 = long0 + 0x2000000; + if(long0 != -0x7f000000) + failures++; + + long0 = long0 + 0x7f000000; + if(long0 != 0) + failures++; + +} + +void add_lit2ulong(void) +{ + + if(ulong0 != 0) + failures++; + + ulong0++; + + if(ulong0 != 1) + failures++; + + ulong0 = ulong0 + 0xff; + + if(ulong0 != 0x100) + failures++; + + ulong0 = ulong0 + 0x100; + if(ulong0 != 0x200) + failures++; + + + ulong0 = ulong0 + 0xfe00; + if(ulong0 != 0x10000) + failures++; + + ulong0 = ulong0 + 0xff0000; + if(ulong0 != 0x1000000) + failures++; + + ulong0 = ulong0 + 0x7e000000; + if(ulong0 != 0x7f000000) + failures++; + + ulong0 = ulong0 + 0x2000000; + if(ulong0 != 0x81000000) + failures++; + + /* wrap around zero */ + ulong0 = ulong0 + 0x7f000000; + if(ulong0) + failures++; + +} + +void main(void) +{ + char0=4; + char1 = char0 + 1; + add_char2char(); + + char1=4; + add_compound_char(); + + int0 = 4; + int1 = int0 + 1; + add_int2int(); + + int1=4; + add_compound_int(); + + add_lit2long(); + add_lit2ulong(); + + done(); +} diff --git a/src/regression/add4.c b/src/regression/add4.c new file mode 100644 index 0000000..ca370c5 --- /dev/null +++ b/src/regression/add4.c @@ -0,0 +1,82 @@ +#include "gpsim_assert.h" + +unsigned char failures = 0; + +//bit bit0 = 0; +int int0 = 0; +int int1 = 0; +char char0 = 0; +char char1 = 0; +long long0 = 0; +long long1 = 0; +unsigned long ulong0 = 0; +unsigned long ulong1 = 0; +#define NULL 0 +char *cP0=NULL; +char *cP1=NULL; +int *iP0=NULL; +int *iP1=NULL; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +/* pointer to char arithmetic */ + +void pc_add(void) +{ + + if(*cP1) + failures++; + + *cP1 += 1; + if(*cP1 != 1) + failures++; + + if(char0 != 1) + failures++; + + char0++; + + if(*cP1 != 2) + failures++; + + char1 = char0 + *cP1; + + if(char1 != 4) + failures++; +} + +/* pointer to integer arithmetic */ +void pi_add(void) +{ + if(*iP0) + failures++; + + *iP0 += 1; + + if(*iP0 != 1) + failures++; + + if(int0 != 1) + failures++; + + int1 = int0 + *iP0; + if(int1 != 2) + failures++; +} + +void main(void) +{ + + cP1 = &char0; + pc_add(); + + iP0 = &int0; + pi_add(); + + done(); +} diff --git a/src/regression/and1.c b/src/regression/and1.c new file mode 100644 index 0000000..bf9ecae --- /dev/null +++ b/src/regression/and1.c @@ -0,0 +1,141 @@ +#include "gpsim_assert.h" + +unsigned char failures=0; + + +unsigned int uint0 = 0; +unsigned int uint1 = 0; +unsigned char uchar0 = 0; +unsigned char uchar1 = 0; +unsigned long ulong0 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +// uchar0 = 0xff; +void and_lit2uchar(void) +{ + + if(uchar0 != 0xff) + failures++; + + uchar0 &= 0x7f; + + if(uchar0 != 0x7f) + failures++; + + uchar0 &= 0x3f; + + if(uchar0 != 0x3f) + failures++; + + uchar0 &= 0xdf; + + if(uchar0 != 0x1f) + failures++; +} + +void and_lit2uint(void) +{ + if(uint0 != 0xffff) + failures++; + + uint0 &= 0x7fff; + + if(uint0 != 0x7fff) + failures++; + + uint0 &= 0x3fff; + + if(uint0 != 0x3fff) + failures++; + + uint0 &= 0xdfff; + + if(uint0 != 0x1fff) + failures++; + + + uint0 &= 0xff7f; + + if(uint0 != 0x1f7f) + failures++; + + uint0 &= 0x0f0f; + + if(uint0 != 0x0f0f) + failures++; + + uint0 &= 0xfefe; + + if(uint0 != 0x0e0e) + failures++; + + uint0 &= 0xf0f0; + + if(uint0 != 0) + failures++; +} + +void and_lit2ulong(void) +{ + + if(ulong0 != 0xffffffff) + failures++; + + ulong0 &= 0x7fffffff; + + if(ulong0 != 0x7fffffff) + failures++; + + ulong0 &= 0xff00ffff; + + if(ulong0 != 0x7f00ffff) + failures++; + + ulong0 &= 0xfeff00ff; + + if(ulong0 != 0x7e0000ff) + failures++; +} + +/*-----------*/ +void and_uchar2uchar(void) +{ + + uchar0 &= uchar1; + + if(uchar0 != 0x0f) + failures++; + + uchar1 &= 0xf7; + + uchar0 = uchar1 & 0xfe; + + if(uchar0 != 0x06) + failures++; + +} + +void main(void) +{ + + uchar0 = 0xff; + and_lit2uchar(); + + uint0 = 0xffff; + and_lit2uint(); + + ulong0 = 0xffffffff; + and_lit2ulong(); + + uchar0 = 0xff; + uchar1 = 0x0f; + and_uchar2uchar(); + + done(); +} diff --git a/src/regression/and2.c b/src/regression/and2.c new file mode 100644 index 0000000..c667bad --- /dev/null +++ b/src/regression/and2.c @@ -0,0 +1,115 @@ +#include "gpsim_assert.h" + +unsigned char failures=0; + + +unsigned int uint0 = 0; +unsigned int uint1 = 0; +unsigned char uchar0 = 0; +unsigned char uchar1 = 0; +unsigned long ulong0 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +// uchar0 = 0x13; +void and_compound1(void) +{ + uchar0 = (uchar0 + 1) & 0x0f; + if(uchar0 != 4) + failures++; +} + + +// uchar1 = 0x42; +void and_compound2(void) +{ + uchar0 = (uchar1 + 1) & 0x0f; + if(uchar0 != 3) + failures++; + + if(uchar1 != 0x42) + failures++; +} + +// uchar0 = 0x13; +void or_compound1(void) +{ + uchar0 = (uchar0 + 0xe) | 0x0f; + if(uchar0 != 0x2f) + failures++; +} + + +// uchar1 = 0x47; +void or_compound2(void) +{ + uchar0 = (uchar1 + 0xf) | 0x0f; + if(uchar0 != 0x5f) + failures++; + + if(uchar1 != 0x47) + failures++; +} + + + +// uchar0 = 0x13; +void xor_compound1(void) +{ + uchar0 = (uchar0 + 1) ^ 0x0f; + if(uchar0 != 0x1b) + failures++; +} + + +// uchar1 = 0x47; +void xor_compound2(void) +{ + uchar0 = (uchar1 + 0xf) ^ 0x0f; + if(uchar0 != 0x59) + failures++; + + if(uchar1 != 0x47) + failures++; +} + +// uchar0 = 0x13; +void neg_compound1(void) +{ + uchar0 = ~(uchar0 + 1); + if(uchar0 != 0xeb) + failures++; +} + + +void main(void) +{ + + uchar0 = 0x13; + and_compound1(); + + uchar1 = 0x42; + and_compound2(); + + uchar0 = 0x13; + or_compound1(); + + uchar1 = 0x47; + or_compound2(); + + uchar0 = 0x13; + xor_compound1(); + + uchar1 = 0x47; + xor_compound2(); + + uchar0 = 0x13; + neg_compound1(); + + done(); +} diff --git a/src/regression/arrays.c b/src/regression/arrays.c new file mode 100644 index 0000000..8877692 --- /dev/null +++ b/src/regression/arrays.c @@ -0,0 +1,145 @@ +#include "gpsim_assert.h" + +unsigned char failures = 0; + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void +bool_or1 (void) +{ + + if ((achar0 > 0) || (achar1 > 0)) + failures++; +} + +void +bool_or2 (void) +{ + + if (achar0 || achar1) + failures++; +} + +void +bool_test1 (void) +{ + + if ((achar0 == 0) || achar1) + failures++; +} + + +void +bool_test2 (void) +{ + + if ((achar0 == 0) || aint0) + failures++; +} + +void +bool_and1 (void) +{ + + if (achar0 && achar1) + failures++; +} + +void +bin_or1 (void) +{ + + char t; + + t = achar0 | achar1; + if (t) + failures++; +} + +void +bin_xor1 (void) +{ + + if (achar0 ^ achar1) + failures++; +} + + +void +bool_test3 (void) +{ + + if ((achar0 == 0x42) || (achar1 == 42)) + failures++; +} + + +void +bool_or_lit1 (void) +{ + + achar0 |= 0x0f; + + if (achar0 > 0x10) + failures++; + + if ((achar0 | 0x10) > 0xf0) + failures++; + +} + +void +bool_and_lit1 (void) +{ + + achar0 &= 0xf0; + + if (achar0 > 0x10) + failures++; + + if ((achar0 & 0x10) > 0xf0) + failures++; + + achar0 &= 0xef; + +} + +void +main (void) +{ + + bool_or1 (); + bool_or2 (); + bool_and1 (); + bin_or1 (); + bin_xor1 (); + + achar0++; + bool_and1 (); + bool_test1 (); + bool_test2 (); + bool_test3 (); + + + achar0--; + achar1++; + bool_and1 (); + + achar0 = 0; + achar1 = 0; + + bool_or_lit1 (); + bool_and_lit1 (); + + done (); +} diff --git a/src/regression/b.c b/src/regression/b.c new file mode 100644 index 0000000..dd45f6c --- /dev/null +++ b/src/regression/b.c @@ -0,0 +1,64 @@ +#include "gpsim_assert.h" + +unsigned char failures = 0; + +unsigned char uchar0=0; +unsigned char uchar1=0; +unsigned char uchar2=0; + + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +/* +void incptr(unsigned char *ucP) +{ + *ucP = *ucP + 1; +} +*/ + +void inc(unsigned char k) +{ + uchar0 = uchar0 + k; +} + +void f1(void) +{ + + uchar2++; +} + +void nested_call(unsigned char u) +{ + + f1(); + uchar1 = uchar1 + u; + inc(uchar1); + +} + // uchar1 = uchar1 + uchar0; + // uchar2 = uchar1 + k; + +void main(void) +{ + + uchar0=1; + //incptr(&uchar0); + inc(uchar0); + if(uchar0 !=2) + failures++; + + uchar0 = 2; + uchar1 = 1; + uchar2 = 1; + nested_call(uchar2); + + if(uchar0 !=4) + failures++; + + done(); +} diff --git a/src/regression/bank1.c b/src/regression/bank1.c new file mode 100644 index 0000000..3c58189 --- /dev/null +++ b/src/regression/bank1.c @@ -0,0 +1,51 @@ +#include "gpsim_assert.h" + +#if SUPPORT_BIT_TYPES +# define bit bit +#else +# define bit unsigned char +#endif + +unsigned char success=0; +unsigned char failures=0; +unsigned char dummy=0; +unsigned bit bit1; + +typedef unsigned char byte; + +byte d2; + +unsigned char uchar0 = 0xa5; + +__data __at (0xa0) unsigned char uc_bank1_temp = 0x42; +__data __at (0xa2) unsigned int ui_bank1_temp = 3; + +void +done(void) +{ + dummy++; + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void main(void) +{ + dummy = 0; + ui_bank1_temp = 0; + uc_bank1_temp = 0; + + bit1 = 0; + + uchar0 = (uchar0<<4) | (uchar0>>4); + + if(uchar0 > 7) { + dummy = 8; + uc_bank1_temp = failures; + } + + if(uc_bank1_temp > 3) + bit1 = 1; + + success = failures; + done(); +} diff --git a/src/regression/bool1.c b/src/regression/bool1.c new file mode 100644 index 0000000..46857bf --- /dev/null +++ b/src/regression/bool1.c @@ -0,0 +1,133 @@ +#include "gpsim_assert.h" + +unsigned char failures=0; + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void bool_or1(void) +{ + + if( (achar0 >0) || (achar1 >0 )) + failures++; +} + +void bool_or2(void) +{ + + if( achar0 || achar1) + failures++; +} + +void bool_test1(void) +{ + + if( (achar0==0) || achar1) + failures++; +} + + +void bool_test2(void) +{ + + if( (achar0==0) || aint0) + failures++; +} + +void bool_and1(void) +{ + + if( achar0 && achar1) + failures++; +} + +void bin_or1(void) +{ + + char t; + + t = achar0 | achar1; + if(t) + failures++; +} + +void bin_xor1(void) +{ + + if(achar0 ^ achar1) + failures++; +} + + +void bool_test3(void) +{ + + if((achar0 == 0x42) || (achar1 == 42)) + failures++; +} + + +void bool_or_lit1(void) +{ + + achar0 |= 0x0f; + + if(achar0 > 0x10) + failures++; + + if( (achar0 | 0x10) > 0xf0) + failures++; + +} + +void bool_and_lit1(void) +{ + + achar0 &= 0xf0; + + if(achar0 > 0x10) + failures++; + + if( (achar0 & 0x10) > 0xf0) + failures++; + + achar0 &= 0xef; + +} + +void main(void) +{ + + bool_or1(); + bool_or2(); + bool_and1(); + bin_or1(); + bin_xor1(); + + achar0++; + bool_and1(); + bool_test1(); + bool_test2(); + bool_test3(); + + + achar0--; achar1++; + bool_and1(); + + achar0=0; + achar1=0; + + bool_or_lit1(); + bool_and_lit1(); + + done(); +} diff --git a/src/regression/bool2.c b/src/regression/bool2.c new file mode 100644 index 0000000..3289d7c --- /dev/null +++ b/src/regression/bool2.c @@ -0,0 +1,50 @@ +#include "gpsim_assert.h" + +unsigned char failures=0; + +#if SUPPORT_BIT_TYPES +# define bit bit +#else +# define bit unsigned char +#endif + +bit bit0 = 0; +bit bit1 = 0; +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void bit_invert(void) +{ + + bit0 = !bit0; + bit1 = !bit1; + + if((bit0 != bit1) || (bit0 == 0)) + failures++; + +} + +void bit_copy(void) +{ + + bit0 = !bit0; + bit1 = bit0; +} + +void main(void) +{ + + bit_invert(); + bit_copy(); + + done(); +} diff --git a/src/regression/bool3.c b/src/regression/bool3.c new file mode 100644 index 0000000..d3092da --- /dev/null +++ b/src/regression/bool3.c @@ -0,0 +1,65 @@ +#include "gpsim_assert.h" + + +/* Compound comparisons */ + + +unsigned char failures=0; + +unsigned int ui0 = 0; +unsigned int ui1 = 0; +unsigned char uc0 = 0; +unsigned char uc1 = 0; +unsigned long uL0 = 0; +unsigned long uL1 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void compound_compare_uc(void) +{ + + failures += (uc0 != uc1); + +} + + +void compound_compare_ui(void) +{ + + failures += (ui0 != ui1); + +} + +void compound_compare_ul(void) +{ + + failures += (uL0 != uL1); + +} + +void compound_compare_uc_lit(void) +{ + + failures += (uc0 != 0xff); + failures += (uc0 != 0xff); + failures += (uc0 == 0); + +} + +void main(void) +{ + + compound_compare_uc(); + compound_compare_ui(); + compound_compare_ul(); + + uc0 = 0xff; + compound_compare_uc_lit(); + + done(); +} diff --git a/src/regression/call1.c b/src/regression/call1.c new file mode 100644 index 0000000..f64a026 --- /dev/null +++ b/src/regression/call1.c @@ -0,0 +1,157 @@ +#include "gpsim_assert.h" + +unsigned char failures = 0; + +unsigned int uint0 = 0; +unsigned int uint1 = 0; +unsigned char uchar0 = 0; +unsigned char uchar1 = 0; + +unsigned char call3 (void); + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void +call1 (unsigned char uc0) +{ + if (uc0) + failures++; +} + +void +call2 (unsigned int ui0) +{ + if (ui0) + failures++; + +} + +unsigned char +call3 (void) +{ + if (uchar0) + failures++; + + return (failures); + +} + +unsigned int +call4 (void) +{ + unsigned int i = 0; + + if (uint0) + i++; + + return (i); + +} + +unsigned int +call5 (unsigned int k) +{ + + if (k) + failures++; + + return (k); + +} + +unsigned char +call6a(unsigned char uc) +{ + + if(uc>uchar1) + return 1; + else + return 0; + +} + +unsigned char +call6(unsigned char uc) +{ + + return(call6a(uc)); +} + +unsigned int +call7a(unsigned int ui) +{ + if(ui) + return 1; + else + return 0; + +} + +unsigned int +call7(unsigned int ui) +{ + + return(call7a(ui)); +} + +unsigned char +call8(unsigned char uc1,unsigned char uc2) +{ + + return uc1+uc2; +} + +void call9(unsigned int ui1, unsigned int ui2) +{ + + if(ui1 != 0x1234) + failures++; + if(ui2 != 0x5678) + failures++; + +} + +void +main (void) +{ + + call1 (uchar0); + call2 (uint0); + uchar1 = call3 (); + uint1 = call4 (); + if (uint1) + failures++; + + uint1 = call5 (uint0); + if (uint1) + failures++; + + if(call6(uchar0)) + failures++; + + + if(call7(0)) + failures++; + + if(!call7(1)) + failures++; + + if(!call7(0xff00)) + failures++; + + uchar0=4; + uchar1=3; + uchar0 = call8(uchar0,uchar1); + + if(uchar0 != 7) + failures++; + + call9(0x1234,0x5678); + + done (); +} diff --git a/src/regression/compare.c b/src/regression/compare.c new file mode 100644 index 0000000..29843f4 --- /dev/null +++ b/src/regression/compare.c @@ -0,0 +1,186 @@ +#include "gpsim_assert.h" +/* + + PIC PORT Test code + + */ + +/* + compare.c test compare + + */ + +unsigned char failures = 0; + +unsigned char achar0 = 0; +unsigned char achar1 = 0; +unsigned int aint0 = 0; +unsigned int aint1 = 0; + +char schar0 = 0; +char schar1 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +/* achar0 should be zero */ + +void +compare_char_to_lits1 (void) +{ + + if (achar0) + failures++; + + if (achar0 == 1) + failures++; + + if (achar0 == 7) + failures++; + + if (achar0 != 0) + failures++; +} + +/* achar0 should be `5' */ +void +compare_char_to_lits2 (void) +{ + + if (!achar0) + failures++; + + if (achar0 == 1) + failures++; + + if (achar0 == 7) + failures++; + + if (achar0 != 5) + failures++; +} + + +/* achar0 should equal achar1 */ +void +compare_char_to_char1 (void) +{ + + if (achar0 != achar1) + failures++; + + if (schar0 != schar1) + failures++; +} + +/* achar0 should be different than achar1 */ +void +compare_char_to_char2 (void) +{ + + if (achar0 == achar1) + failures++; + +} + +/* aint0 should be zero */ + +void +compare_int_to_lits1 (void) +{ + + if (aint0) + failures++; + + if (aint0 == 1) + failures++; + + if (aint0 == 7) + failures++; + + if (aint0 != 0) + failures++; +} + +/* aint0 should be `5' */ +void +compare_int_to_lits2 (void) +{ + + if (!aint0) + failures++; + + if (aint0 == 1) + failures++; + + if (aint0 == 7) + failures++; + + if (aint0 != 5) + failures++; +} + +/* aint0 should be `0x1234' */ +void +compare_int_to_lits3 (void) +{ + + if (!aint0) + failures++; + + if (aint0 == 1) + failures++; + + if (aint0 == 7) + failures++; + + if (aint0 != 0x1234) + failures++; +} + +/* aint0 should equal aint1 */ +void +compare_int_to_int1 (void) +{ + + if (aint0 != aint1) + failures++; + +} + +/* aint0 should be different than aint1 */ +void +compare_int_to_int2 (void) +{ + + if (aint0 == aint1) + failures++; + +} + +void +main (void) +{ + + compare_char_to_lits1 (); + compare_char_to_char1 (); + achar0 = 5; + compare_char_to_lits2 (); + compare_char_to_char2 (); + + + compare_int_to_lits1 (); + aint0 = 5; + compare_int_to_lits2 (); + aint0 = 0x1234; + compare_int_to_lits3 (); + compare_int_to_int2 (); + aint0 = 0; + compare_int_to_int1 (); + + done (); +} diff --git a/src/regression/compare10.c b/src/regression/compare10.c new file mode 100644 index 0000000..b3ed5cb --- /dev/null +++ b/src/regression/compare10.c @@ -0,0 +1,322 @@ +#include "gpsim_assert.h" +#include "picregs.h" + +// Signed comparisons of the form: (variable>=LIT) +// +// This regression test exercises all of the boundary +// conditions in literal less than comparisons. There +// are numerous opportunities to optimize these comparison +// and each one has an astonishing capability of failing +// a boundary condition. + +unsigned char failures = 0; +unsigned char result = 0; + +//bit bit0 = 0; +int int0 = 0; +int int1 = 0; +unsigned char uchar0 = 0; +unsigned char uchar1 = 0; +signed char char0 = 0; +signed char char1 = 0; +char long0 = 0; +char long1 = 0; + +/* *** NOTE *** This particular test takes quite a while to run + * ~ 10,000,000 instruction cycles. (2.5 seconds on a 20Mhz PIC). + * The WDT will reset the CPU if it's enabled. So disable it... +*/ + +typedef unsigned int word; + +//word at 0x2007 CONFIG = wdt_off & pwrte_on; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + + +void c_char_gte_lit1(unsigned char expected_result) +{ + result = 0; + + if(char0 >= -0x7f) + result |= 1; + + + if(char0 >= -1) + result |= 2; + + if(char0 >= 0) + result |= 4; + + if(char0 >= 1) + result |= 8; + + if(char0 >= 0x7e) + result |= 0x10; + + if(char0 >= 0x7f) + result |= 0x20; + + if(result != expected_result) + failures++; +} + + +void char_compare(void) +{ + char0 = 0x7f; + c_char_gte_lit1(0x3f); + + char0 = 0x7e; + c_char_gte_lit1(0x1f); + + char0 = 0x40; + c_char_gte_lit1(0x0f); + + char0 = 0x2; + c_char_gte_lit1(0x0f); + + char0 = 0x1; + c_char_gte_lit1(0x0f); + + char0 = 0; + c_char_gte_lit1(0x07); + + char0 = -1; + c_char_gte_lit1(0x03); + + char0 = -2; + c_char_gte_lit1(0x01); + + char0 = -0x40; + c_char_gte_lit1(0x01); + + char0 = -0x7e; + c_char_gte_lit1(0x01); + + char0 = -0x7f; + c_char_gte_lit1(0x01); + + char0 = 0x80; + c_char_gte_lit1(0x00); + + + /* Now test entire range */ + + for(char0=1; char0 != 0x7e; char0++) + c_char_gte_lit1(0x0f); + + for(char0=-0x7f; char0 != -1; char0++) + c_char_gte_lit1(0x01); + +} + + +void c_int_gte_lit1(unsigned char expected_result) +{ + result = 0; + + if(int0 >= 0) + result |= 1; + + if(int0 >= 1) + result |= 2; + + + if(int0 >= 0xff) + result |= 4; + + if(int0 >= 0x100) + result |= 8; + + if(int0 >= 0x0101) + result |= 0x10; + + if(int0 >= 0x01ff) + result |= 0x20; + + if(int0 >= 0x0200) + result |= 0x40; + + if(int0 >= 0x0201) + result |= 0x80; + + if(result != expected_result) + failures=1; + +} + + +void int_compare1(void) +{ + int0 = -1; + c_int_gte_lit1(0x00); + + int0 = 0; + c_int_gte_lit1(0x01); + + int0 = 1; + c_int_gte_lit1(0x03); + + int0 = 2; + c_int_gte_lit1(0x03); + + int0 = 0xfe; + c_int_gte_lit1(0x03); + + int0 = 0xff; + c_int_gte_lit1(0x07); + + int0 = 0x100; + c_int_gte_lit1(0x0f); + + int0 = 0x101; + c_int_gte_lit1(0x1f); + + int0 = 0x102; + c_int_gte_lit1(0x1f); + + int0 = 0x1fe; + c_int_gte_lit1(0x1f); + + int0 = 0x1ff; + c_int_gte_lit1(0x3f); + + int0 = 0x200; + c_int_gte_lit1(0x7f); + + int0 = 0x201; + c_int_gte_lit1(0xff); + + int0 = 0x7f00; + c_int_gte_lit1(0xff); + + /* now check contiguous ranges */ + + for(int0 = -0x7fff; int0 != -1; int0++) + c_int_gte_lit1(0x00); + + for(int0 = 1; int0 != 0xff; int0++) + c_int_gte_lit1(0x03); + + for(int0 = 0x201; int0 != 0x7fff; int0++) + c_int_gte_lit1(0xff); + +} + + +void c_int_gte_lit2(unsigned char expected_result) +{ + result = 0; + + if(int0 >= -0x7fff) + result |= 1; + + if(int0 >= -0x7f00) + result |= 2; + + if(int0 >= -0x7eff) + result |= 4; + + if(int0 >= -0x7e00) + result |= 8; + + if(int0 >= -0x0101) + result |= 0x10; + + if(int0 >= -0x0100) + result |= 0x20; + + if(int0 >= -0xff) + result |= 0x40; + + if(int0 >= -1) + result |= 0x80; + + if(result != expected_result) + failures=1; +} + +void int_compare2(void) +{ + int0 = -0x7fff; + c_int_gte_lit2(0x01); + + int0 = -0x7f00; + c_int_gte_lit2(0x03); + + int0 = -0x7eff; + c_int_gte_lit2(0x07); + + int0 = -0x7e00; + c_int_gte_lit2(0x0f); + + int0 = -0x7dff; + c_int_gte_lit2(0x0f); + + int0 = -0x4567; + c_int_gte_lit2(0x0f); + + int0 = -0x200; + c_int_gte_lit2(0x0f); + + int0 = -0x102; + c_int_gte_lit2(0x0f); + + int0 = -0x101; + c_int_gte_lit2(0x1f); + + int0 = -0x100; + c_int_gte_lit2(0x3f); + + int0 = -0xff; + c_int_gte_lit2(0x7f); + + int0 = -0x02; + c_int_gte_lit2(0x7f); + + int0 = -0x01; + c_int_gte_lit2(0xff); + + int0 = 0; + c_int_gte_lit2(0xff); + + int0 = 1; + c_int_gte_lit2(0xff); + + int0 = 0x7fff; + c_int_gte_lit2(0xff); + + /* now check contiguous ranges */ + + for(int0 = -0x7fff; int0 != -0x7f00; int0++) + c_int_gte_lit2(0x01); + + for(int0 = -0x7e00; int0 != -0x101; int0++) + c_int_gte_lit2(0x0f); + + for(int0 = -1; int0 != 0x7fff; int0++) + c_int_gte_lit2(0xff); + +} + + + + +void +main (void) +{ + char_compare(); + __asm clrwdt __endasm; + int_compare1(); + __asm clrwdt __endasm; + int_compare2(); + __asm clrwdt __endasm; + + done (); +} diff --git a/src/regression/compare2.c b/src/regression/compare2.c new file mode 100644 index 0000000..d14aeb0 --- /dev/null +++ b/src/regression/compare2.c @@ -0,0 +1,362 @@ +#include "gpsim_assert.h" + +unsigned char failures = 0; +unsigned char dummy = 0; + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void +char_lt_char (void) +{ + if (achar0 < achar1) + failures++; +} + +void +char_gt_char (void) +{ + if (achar1 > achar0) + failures++; +} + +void +char_lte_char (void) +{ + if (achar0 <= achar1) + failures++; +} + +void +char_gte_char (void) +{ + if (achar1 >= achar0) + failures++; +} + +void +char_lt_lit (void) +{ + if (achar1 < 0x10) + failures++; +} + +void +char_gt_lit (void) +{ + if (achar1 > 0x10) + failures++; +} + +void +char_lte_lit (void) +{ + if (achar1 <= 0x0f) + failures++; +} + +void +char_gte_lit (void) +{ + if (achar1 >= 0x11) + failures++; +} + + +/* now repeat test using negative logic */ +void +char_lt_char_else (void) +{ + if (achar0 >= achar1) + dummy++; + else + failures++; +} + +void +char_gt_char_else (void) +{ + if (achar1 <= achar0) + dummy++; + else + failures++; +} + +void +char_lte_char_else (void) +{ + if (achar0 > achar1) + dummy++; + else + failures++; +} + +void +char_gte_char_else (void) +{ + if (achar1 < achar0) + dummy++; + else + failures++; +} + +void +char_lt_lit_else (void) +{ + if (achar1 >= 0x10) + dummy++; + else + failures++; +} + +void +char_gt_lit_else (void) +{ + if (achar1 <= 0x10) + dummy++; + else + failures++; +} + +void +char_lte_lit_else (void) +{ + if (achar1 > 0x0f) + dummy++; + else + failures++; +} + +void +char_gte_lit_else (void) +{ + if (achar1 < 0x11) + dummy++; + else + failures++; +} + + +/* ints */ + +void +int_lt_int (void) +{ + if (aint0 < aint1) + failures++; +} + +void +int_gt_int (void) +{ + if (aint1 > aint0) + failures++; +} + +void +int_lte_int (void) +{ + if (aint0 <= aint1) + failures++; +} + +void +int_gte_int (void) +{ + if (aint1 >= aint0) + failures++; +} + +void +int_lt_lit (void) +{ + if (aint1 < 0x10) + failures++; +} + +void +int_gt_lit (void) +{ + if (aint1 > 0x10) + failures++; +} + +void +int_lte_lit (void) +{ + if (aint1 <= 0x0f) + failures++; +} + +void +int_gte_lit (void) +{ + if (aint1 >= 0x11) + failures++; +} + + + + +/* now repeat int comparisons using negative logic */ + +void +int_lt_int_else (void) +{ + if (aint0 >= aint1) + dummy++; + else + failures++; +} + +void +int_gt_int_else (void) +{ + if (aint1 <= aint0) + dummy++; + else + failures++; +} + +void +int_lte_int_else (void) +{ + if (aint0 > aint1) + dummy++; + else + failures++; +} + +void +int_gte_int_else (void) +{ + if (aint1 < aint0) + dummy++; + else + failures++; +} + +void +int_lt_lit_else (void) +{ + if (aint1 >= 0x10) + dummy++; + else + failures++; +} + +void +int_gt_lit_else (void) +{ + if (aint1 <= 0x10) + dummy++; + else + failures++; +} + +void +int_lte_lit_else (void) +{ + if (aint1 > 0x0f) + dummy++; + else + failures++; +} + +void +int_gte_lit_else (void) +{ + if (aint1 < 0x11) + dummy++; + else + failures++; +} + + + + + + +void +main (void) +{ + + char_lt_char (); + char_gt_char (); + + achar0++; + char_lt_char (); + char_gt_char (); + char_gte_char (); + char_lte_char (); + + achar1 = 0x10; + char_lt_lit (); + char_gt_lit (); + char_lte_lit (); + char_gte_lit (); + + + achar0 = 0; + achar1 = 0; + + char_lt_char_else (); + char_gt_char_else (); + + achar0++; + char_lt_char_else (); + char_gt_char_else (); + char_gte_char_else (); + char_lte_char_else (); + + achar1 = 0x10; + char_lt_lit_else (); + char_gt_lit_else (); + char_lte_lit_else (); + char_gte_lit_else (); + + + + int_lt_int (); + int_gt_int (); + + aint0++; + int_lt_int (); + int_gt_int (); + int_gte_int (); + int_lte_int (); + + aint1 = 0x10; + int_lt_lit (); + int_gt_lit (); + int_lte_lit (); + int_gte_lit (); + + aint0=0; + aint1=0; + int_lt_int_else (); + int_gt_int_else (); + + aint0++; + int_lt_int_else (); + int_gt_int_else (); + int_gte_int_else (); + int_lte_int_else (); + + aint1 = 0x10; + int_lt_lit_else (); + int_gt_lit_else (); + int_lte_lit_else (); + int_gte_lit_else (); + + done (); +} diff --git a/src/regression/compare3.c b/src/regression/compare3.c new file mode 100644 index 0000000..480eceb --- /dev/null +++ b/src/regression/compare3.c @@ -0,0 +1,247 @@ +#include "gpsim_assert.h" +// +// compare3.c +// regression testing program for comparing literals to variables +// + + +unsigned char failures = 0; + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +// compare to 0 +// assumes +// achar0 == 0 +// achar1 != 0 +// aint0 == 0 +// aint1 != 0 + +void c_0(void) +{ + + if(achar0 != 0) + failures++; + + if(achar0) + failures++; + + if(achar1 == 0) + failures++; + + if(!achar1) + failures++; + + if(aint0 != 0) + failures++; + + if(aint0) + failures++; + + if(aint1 == 0) + failures++; + + if(!aint1) + failures++; + +} + +// compare to 1 +// assumes +// achar0 != 1 +// achar1 == 1 +// aint0 != 1 +// aint1 == 1 + +void c_1(void) +{ + + if(achar0 == 1) + failures++; + + if(achar1 != 1) + failures++; + + if(aint0 == 1) + failures++; + + if(aint1 != 1) + failures++; + +} + +// compare to 2 +// assumes +// achar0 == 2 +// aint0 == 2 + +void c_2(void) +{ + + if(achar0 != 2) + failures++; + + if(aint0 != 2) + failures++; + +} + +// compare to 0xff +// assumes +// achar0 == 0xff +// aint0 == 0xff + +void c_ff(void) +{ + + if(achar0 != 0xff) + failures++; + + if(aint0 != 0xff) + failures++; + + if(aint0 == 0xfe) + failures++; + + if(aint0 == 0xff00) + failures++; + +} + + +// compare to 0x00a5 +// assumes +// achar0 == 0xa5 +// aint0 == 0x00a5 + +void c_a5(void) +{ + + if(achar0 != 0xa5) + failures++; + + if(aint0 != 0xa5) + failures++; + + if(aint0 == 0xa4) + failures++; + + if(aint0 == 0xa500) + failures++; + +} + +// compare to 0xa500 +// assumes +// achar0 == 0xa5 +// aint0 == 0xa500 + +void c_a500(void) +{ + + if(achar0 == 0xa500) + failures++; + + if(aint0 != 0xa500) + failures++; + + if(aint0 == 0xa400) + failures++; + + if(aint0 == 0x00a5) + failures++; + +} + +// compare to 0xabcd +// assumes +// achar0 == 0xa5 +// aint0 == 0xabcd + +void c_abcd(void) +{ + + if(achar0 == 0xabcd) + failures++; + + if(aint0 != 0xabcd) + failures++; + + if(aint0 == 0xab00) + failures++; + + if(aint0 == 0x00cd) + failures++; + + if(aint0 == 0x05cd) + failures++; + + if(aint0 == 0xab05) + failures++; + + if(aint0 == 0xab01) + failures++; + + if(aint0 == 0x01cd) + failures++; + + // if(aint0 == 0x1234abcd) + // failures++; + +} + +// assumes achar1 == 0 +void c_ifelse1(void) +{ + + if(achar0) + achar0 = achar1; + else + achar0 = 0; + + if(achar0) + failures++; +} + +void +main (void) +{ + + aint1 = 1; + achar1 = 1; + c_0(); + c_1(); + + aint0 = 2; + achar0 = 2; + c_2(); + + aint0 = 0xff; + achar0 = 0xff; + c_ff(); + + aint0 = 0xa5; + achar0 = 0xa5; + c_a5(); + + aint0 = 0xabcd; + c_abcd(); + + achar0 = 0; + achar1 = 0; + c_ifelse1(); + + achar0 = 1; + c_ifelse1(); + + done (); +} diff --git a/src/regression/compare4.c b/src/regression/compare4.c new file mode 100644 index 0000000..98c22ca --- /dev/null +++ b/src/regression/compare4.c @@ -0,0 +1,317 @@ +#include "gpsim_assert.h" +// +// compare4.c +// regression testing program for comparing signed chars and ints +// + +//#define COMPARE_OUT_OF_RANGE 1 + +unsigned char failures = 0; + +int int0 = 0; +int int1 = 0; +char char0 = 0; +char char1 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +// compare to 0 +// assumes +// char0 == 0 +// char1 != 0 +// int0 == 0 +// int1 != 0 + +void c_0(void) +{ + + if(char0 != 0) + failures++; + + if(char0) + failures++; + + if(char1 == 0) + failures++; + + if(!char1) + failures++; + + if(int0 != 0) + failures++; + + if(int0) + failures++; + + if(int1 == 0) + failures++; + + if(!int1) + failures++; + + if(char0>0) + failures++; + + if(int0>0) + failures++; + + if(char0<0) + failures++; + + if(int0<0) + failures++; + +} + +// compare to 1 +// assumes +// char0 != 1 +// char1 == 1 +// int0 != 1 +// int1 == 1 + +void c_1(void) +{ + + if(char0 == 1) + failures++; + + if(char1 != 1) + failures++; + + if(int0 == 1) + failures++; + + if(int1 != 1) + failures++; + + if(char0 < 0) + failures++; + + if(int0 < 0) + failures++; + +} + +// compare to 2 +// assumes +// achar0 == 2 +// aint0 == 2 + +void c_2(void) +{ + + if(char0 != 2) + failures++; + + if(int0 != 2) + failures++; + +} + +// compare to 0xff +// assumes +// achar0 == 0xff +// aint0 == 0xff + +void c_ff(void) +{ + + if(char0 != (char)0xff) + failures++; + + if(int0 != 0xff) + failures++; + + if(int0 == 0xfe) + failures++; + + if(int0 == 0xff00) + failures++; + +} + + +// compare to 0x00a5 +// assumes +// char0 == 0xa5 +// int0 == 0x00a5 + +void c_a5(void) +{ + + if(char0 != (char)0xa5) + failures++; + + if(int0 != 0xa5) + failures++; + + if(int0 == 0xa4) + failures++; + + if(int0 == 0xa500) + failures++; + +} + +// compare to 0xa500 +// assumes +// char0 == 0xa5 +// int0 == 0xa500 + +void c_a500(void) +{ + +#ifdef COMPARE_OUT_OF_RANGE + if(char0 == 0xa500) + failures++; +#endif + + if(int0 != 0xa500) + failures++; + + if(int0 != 0x44) + int0 = 0x28; + + if(int0 == 0xa400) + failures++; + + if(int0 == 0x00a5) + failures++; + +} + +// compare to 0xabcd +// assumes +// char0 == 0xa5 +// int0 == 0xabcd + +void c_abcd(void) +{ +#ifdef COMPARE_OUT_OF_RANGE + if(char0 == 0xabcd) + failures++; +#endif +/* + if(int0 != 0xabcd) + failures++; +*/ + if(int0 == 0xab00) + failures++; + + if(int0 == 0x00cd) + failures++; + + if(int0 == 0x05cd) + failures++; + + if(int0 == 0xab05) + failures++; + + if(int0 == 0xab01) + failures++; + + if(int0 == 0x01cd) + failures++; + + if(int0 > 0) + failures++; + +#ifdef COMPARE_OUT_OF_RANGE + if(int0 == 0x1234abcd) + failures++; +#endif + +} + +// assumes char1 == 0 +void c_ifelse1(void) +{ + + if(char0) + char0 = char1; + else + char0 = 0; + + if(char0) + failures++; +} + +// assumes char0 = -1 +// assumes int0 = -1 + +void c_minus1(void) +{ + if(char0 != -1) + failures++; + + if(int0 != -1) + failures++; + + if(char0 != int0) + failures++; + + if(char0>0) + failures++; + + if(int0>0) + failures++; +} + +void c_c0gtc1(void) +{ + + if(char0 < char1) + failures++; +} + +void +main (void) +{ + + int1 = 1; + char1 = 1; + c_0(); + c_1(); + + int0 = 2; + char0 = 2; + c_2(); + + int0 = 0xff; + char0 = 0xff; + c_ff(); + + int0 = 0xa5; + char0 = 0xa5; + c_a5(); + + int0 = 0xabcd; + //c_abcd(); + + char0 = 0; + char1 = 0; + c_ifelse1(); + + char0 = 1; + c_ifelse1(); + + char0 = -1; + int0 = -1; + c_minus1(); + + + char0 = 5; + char1 = 3; + c_c0gtc1(); + + char1 = -3; + c_c0gtc1(); + + done (); +} diff --git a/src/regression/compare5.c b/src/regression/compare5.c new file mode 100644 index 0000000..238755a --- /dev/null +++ b/src/regression/compare5.c @@ -0,0 +1,429 @@ +#include "gpsim_assert.h" +// +// compare5.c +// regression testing program for comparing longs +// + +#define COMPARE_OUT_OF_RANGE 1 + +unsigned char failures = 0; + +int int0 = 0; +int int1 = 0; +char char0 = 0; +char char1 = 0; +long long0 = 0; +long long1 = 0; +unsigned long ulong0 = 0; +unsigned long ulong1 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +// compare to 0 +// assumes +// long0 == 0 +// ulong0 == 0 + +void c_0(void) +{ + + if(long0 != 0) + failures++; + + if(long0 > 0) + failures++; + + if(ulong0 != 0) + failures++; + + if(ulong0 > 0) + failures++; + +} + +// compare to 1 +// assumes +// long1 == 1 +// ulong1 == 1 + +void c_1(void) +{ + + if(long0 == 1) + failures++; + + if(long1 != 1) + failures++; + + if(ulong0 == 1) + failures++; + + if(ulong1 != 1) + failures++; + + if(long1 < 0) + failures++; + + if(long1 < 1) + failures++; + + if(ulong1 < 1) + failures++; + + if(long1 > 1) + failures++; + + if(ulong1 > 1) + failures++; +} + +// compare to 2 +// assumes +// long0 == 2 +// ulong0 == 2 + +void c_2(void) +{ + + if(long0 != 2) + failures++; + + if(ulong0 != 2) + failures++; + + if(long1 == 2) + failures++; + + if(ulong1 == 2) + failures++; + +} + +// compare to 0xff +// assumes +// achar0 == 0xff +// aint0 == 0xff + +void c_ff(void) +{ + + if(long0 != 0xff) + failures++; + + if(ulong0 != 0xff) + failures++; + + if(long1 == 0xff) + failures++; + + if(ulong1 == 0xff) + failures++; + + +} + +// compare to 0x200 +// assumes +// achar0 == 0x200 +// aint0 == 0x200 + +void c_200(void) +{ + + if(long0 != 0x200) + failures++; + + if(ulong0 != 0x200) + failures++; + + if(long1 == 0x200) + failures++; + + if(ulong1 == 0x200) + failures++; + + +} + +// compare to 0x20000 +// assumes +// long0 == 0x20000 +// ulong0 == 0x20000 +// long1 != 0x20000 +// ulong1 != 0x20000 + +void c_20000(void) +{ + + if(long0 != 0x20000) + failures++; + + if(ulong0 != 0x20000) + failures++; + + if(long1 == 0x20000) + failures++; + + if(ulong1 == 0x20000) + failures++; + + if(long0 <= 0x10000) + failures++; + + if(long0 < 0x10000) + failures++; + +/* if(long0 < 0x12345) + failures++; +*/ + if(long0 == 0) + failures++; +} + +// compare to 0x00a5 +// assumes +// char0 == 0xa5 +// int0 == 0x00a5 + +void c_a5(void) +{ + + if(char0 != 0xa5) + failures++; + + if(int0 != 0xa5) + failures++; + + if(int0 == 0xa4) + failures++; + + if(int0 == 0xa500) + failures++; + +} + +// compare to 0xa500 +// assumes +// char0 == 0xa5 +// int0 == 0xa500 + +void c_a500(void) +{ + +#ifdef COMPARE_OUT_OF_RANGE + if(char0 == 0xa500) + failures++; +#endif + + if(int0 != 0xa500) + failures++; + + if(int0 == 0xa400) + failures++; + + if(int0 == 0x00a5) + failures++; + +} + +// compare to 0xabcd +// assumes +// char0 == 0xa5 +// int0 == 0xabcd + +void c_abcd(void) +{ +#ifdef COMPARE_OUT_OF_RANGE + if(char0 == 0xabcd) + failures++; +#endif + + if(int0 != 0xabcd) + failures++; + + if(int0 == 0xab00) + failures++; + + if(int0 == 0x00cd) + failures++; + + if(int0 == 0x05cd) + failures++; + + if(int0 == 0xab05) + failures++; + + if(int0 == 0xab01) + failures++; + + if(int0 == 0x01cd) + failures++; + + if(int0 > 0) + failures++; + +#ifdef COMPARE_OUT_OF_RANGE + if(int0 == 0x1234abcd) + failures++; +#endif + +} + +// assumes char1 == 0 +void c_ifelse1(void) +{ + + if(char0) + char0 = char1; + else + char0 = 0; + + if(char0) + failures++; +} + +// assumes char0 = -1 +// assumes int0 = -1 + +void c_minus1(void) +{ + if(long0 != -1) + failures++; + + if(long0 > 0) + failures++; + + if(long1 < 0) + failures++; +/* + if(long1 < 2) + failures++; +*/ +} + +// assumes +// long0 = long1 = ulong0 = ulong1 == 0 + +void c_long2long_eq(void) +{ + + if(long0 != long1) + failures++; + + if(ulong0 != ulong1) + failures++; + + if(long0 != ulong1) + failures++; + + if(long0 > long1) + failures++; + + if(long0 < long1) + failures++; + + if(long0 > ulong0) + failures++; + + if(long0 < ulong0) + failures++; +} + +// assumes +// long0 = ulong0 == 0 +// long1 = ulong1 == 1 + +void c_long2long_neq(void) +{ + + if(long0 == long1) + failures++; + + if(ulong0 == ulong1) + failures++; + + if(long1 != ulong1) + failures++; + + if(long1 < long0) + failures++; + + if(long1 <= long0) + failures++; + + if(ulong1 < ulong0) + failures++; + + if(ulong1 <= ulong0) + failures++; + +} + + +// long0=-100; +// long1=-1000; +void +c_long2neglit(void) +{ + + if(long0>0) + failures++; + if(long1>0) + failures++; + + if(long1 > long0) + failures++; + + if(long1 > 100) + failures++; + + if(long0 > -50) + failures++; + + if(long1 < -5000) + failures++; +} + +void +main (void) +{ + + c_0(); + + c_long2long_eq(); + + long1 = 1; + ulong1 = 1; + c_1(); + c_long2long_neq(); + + long0 = 2; + ulong0 = 2; + c_2(); + + long0 = 0xff; + ulong0 = 0xff; + c_ff(); + + long0 = 0x200; + ulong0 = 0x200; + c_200(); + + long0 = 0x20000; + ulong0 = 0x20000; + c_20000(); + + long0 = -1; + c_minus1(); + + long0=-100; + long1=-1000; + c_long2neglit(); + + done (); +} diff --git a/src/regression/compare6.c b/src/regression/compare6.c new file mode 100644 index 0000000..f189ba8 --- /dev/null +++ b/src/regression/compare6.c @@ -0,0 +1,184 @@ +#include "gpsim_assert.h" +// Compound comparisons + +unsigned char success = 0; +unsigned char failures = 0; +unsigned char dummy = 0; + +//bit bit0 = 0; +int int0 = 0; +int int1 = 0; +unsigned char uchar0 = 0; +unsigned char uchar1 = 0; +char char0 = 0; +char char1 = 0; +char long0 = 0; +char long1 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void +c_char(void) +{ + + if(char0 || char1) + failures++; + + if(char0 && char1) + failures++; + + if(char0 > char1) + failures++; + + if((char0+1) < char1) + failures++; + + if((char0+5) >= (char1+9)) + failures++; + + char0++; + + if(char0 && char1) + failures++; + + if(char0 != (char1+1) ) + failures++; + + if(!char0) + failures++; + + if(char1 || !char0) + failures++; + + if((char0 >5 ) && (char0 < 10)) + failures++; + + char0 +=5; /* char0 = 6 now */ + + + if(!((char0 >5 ) && (char0 < 10))) + failures++; + +} + + +void +c_int(void) +{ + + if(int0 || int1) + failures++; + + if(int0 && int1) + failures++; + + if(int0 > int1) + failures++; + + if((int0+1) < int1) + failures++; + + if((int0+5) >= (int1+9)) + failures++; + + int0++; + + if(int0 && int1) + failures++; + + if(int0 != (int1+1) ) + failures++; + + if(!int0) + failures++; + + if(int1 || !int0) + failures++; + + if((int0 >5 ) && (int0 < 10)) + failures++; + + int0 +=5; /* int0 = 6 now */ + + + if(!((int0 >5 ) && (int0 < 10))) + failures++; + +} + + +void +c_long(void) +{ + + if(long0 || long1) + failures++; + + if(long0 && long1) + failures++; + + if(long0 > long1) + failures++; + + if((long0+1) < long1) + failures++; + + if((long0+5) >= (long1+9)) + failures++; + + long0++; + + if(long0 && long1) + failures++; + + if(long0 != (long1+1) ) + failures++; + + if(!long0) + failures++; + + if(long1 || !long0) + failures++; + + if((long0 >5 ) && (long0 < 10)) + failures++; + + long0 +=5; /* long0 = 6 now */ + + + if(!((long0 >5 ) && (long0 < 10))) + failures++; + +} + +void +c_uminus(void) +{ + + int1 = -int0; + if(int1 < 0) + failures++; +} + +void +main (void) +{ + + c_char(); + c_int(); + c_long(); + + int0 = -1; + c_uminus(); + if(int1 != 1) + failures++; + + success = failures; + done (); +} + diff --git a/src/regression/compare7.c b/src/regression/compare7.c new file mode 100644 index 0000000..1c025c6 --- /dev/null +++ b/src/regression/compare7.c @@ -0,0 +1,311 @@ +#include "gpsim_assert.h" +#include "picregs.h" +// Signed comparisons of the form: (variableLIT) +// +// This regression test exercises all of the boundary +// conditions in literal less than comparisons. There +// are numerous opportunities to optimize these comparison +// and each one has an astonishing capability of failing +// a boundary condition. + +unsigned char failures = 0; +unsigned char result = 0; + +//bit bit0 = 0; +int int0 = 0; +int int1 = 0; +unsigned char uchar0 = 0; +unsigned char uchar1 = 0; +signed char char0 = 0; +signed char char1 = 0; +char long0 = 0; +char long1 = 0; + +/* *** NOTE *** This particular test takes quite a while to run + * ~ 10,000,000 instruction cycles. (2.5 seconds on a 20Mhz PIC). + * The WDT will reset the CPU if it's enabled. So disable it... +*/ + +typedef unsigned int word; + +//word at 0x2007 CONFIG = wdt_off & pwrte_on; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void c_char_gt_lit1(unsigned char expected_result) +{ + result = 0; + + if(char0 > -0x7f) + result |= 1; + + + if(char0 > -1) + result |= 2; + + if(char0 > 0) + result |= 4; + + if(char0 > 1) + result |= 8; + + if(char0 > 0x7e) + result |= 0x10; + + if(char0 > 0x7f) + result |= 0x20; + + if(result != expected_result) + failures++; +} + + +void char_compare(void) +{ + char0 = 0x7f; + c_char_gt_lit1(0x1f); + + char0 = 0x7e; + c_char_gt_lit1(0x0f); + + char0 = 0x40; + c_char_gt_lit1(0x0f); + + char0 = 0x2; + c_char_gt_lit1(0x0f); + + char0 = 0x1; + c_char_gt_lit1(0x07); + + char0 = 0; + c_char_gt_lit1(0x03); + + char0 = -1; + c_char_gt_lit1(0x01); + + char0 = -2; + c_char_gt_lit1(0x01); + + char0 = -0x40; + c_char_gt_lit1(0x01); + + char0 = -0x7e; + c_char_gt_lit1(0x01); + + char0 = -0x7f; + c_char_gt_lit1(0x00); + + char0 = 0x80; + c_char_gt_lit1(0x00); + + + /* Now test entire range */ + + for(char0=2; char0 != 0x7f; char0++) + c_char_gt_lit1(0x0f); + + + for(char0=-0x7e; char0 != -1; char0++) + c_char_gt_lit1(0x01); + + +} + + +void c_int_gt_lit1(unsigned char expected_result) +{ + result = 0; + + if(int0 > 0) + result |= 1; + + if(int0 > 1) + result |= 2; + + + if(int0 > 0xff) + result |= 4; + + if(int0 > 0x100) + result |= 8; + + if(int0 > 0x0101) + result |= 0x10; + + if(int0 > 0x01ff) + result |= 0x20; + + if(int0 > 0x0200) + result |= 0x40; + + if(int0 > 0x0201) + result |= 0x80; + + if(result != expected_result) + failures=1; + +} + + +void int_compare1(void) +{ + int0 = -1; + c_int_gt_lit1(0x00); + + int0 = 0; + c_int_gt_lit1(0x00); + + int0 = 1; + c_int_gt_lit1(0x01); + + int0 = 2; + c_int_gt_lit1(0x03); + + int0 = 0xfe; + c_int_gt_lit1(0x03); + + int0 = 0xff; + c_int_gt_lit1(0x03); + + int0 = 0x100; + c_int_gt_lit1(0x07); + + int0 = 0x101; + c_int_gt_lit1(0x0f); + + int0 = 0x102; + c_int_gt_lit1(0x1f); + + int0 = 0x1fe; + c_int_gt_lit1(0x1f); + + int0 = 0x1ff; + c_int_gt_lit1(0x1f); + + int0 = 0x200; + c_int_gt_lit1(0x3f); + + int0 = 0x201; + c_int_gt_lit1(0x7f); + + int0 = 0x7f00; + c_int_gt_lit1(0xff); + + /* now check contiguous ranges */ + + for(int0 = -0x7fff; int0 != -1; int0++) + c_int_gt_lit1(0x00); + + for(int0 = 2; int0 != 0xff; int0++) + c_int_gt_lit1(0x03); + + for(int0 = 0x202; int0 != 0x7fff; int0++) + c_int_gt_lit1(0xff); + +} + + +void c_int_gt_lit2(unsigned char expected_result) +{ + result = 0; + + if(int0 > -0x7fff) + result |= 1; + + if(int0 > -0x7f00) + result |= 2; + + if(int0 > -0x7eff) + result |= 4; + + if(int0 > -0x7e00) + result |= 8; + + if(int0 > -0x0101) + result |= 0x10; + + if(int0 > -0x0100) + result |= 0x20; + + if(int0 > -0xff) + result |= 0x40; + + if(int0 > -1) + result |= 0x80; + + if(result != expected_result) + failures=1; +} + +void int_compare2(void) +{ + int0 = -0x7fff; + c_int_gt_lit2(0x00); + + int0 = -0x7f00; + c_int_gt_lit2(0x01); + + int0 = -0x7eff; + c_int_gt_lit2(0x03); + + int0 = -0x7e00; + c_int_gt_lit2(0x07); + + int0 = -0x7dff; + c_int_gt_lit2(0x0f); + + int0 = -0x4567; + c_int_gt_lit2(0x0f); + + int0 = -0x200; + c_int_gt_lit2(0x0f); + + int0 = -0x102; + c_int_gt_lit2(0x0f); + + int0 = -0x101; + c_int_gt_lit2(0x0f); + + int0 = -0x100; + c_int_gt_lit2(0x1f); + + int0 = -0xff; + c_int_gt_lit2(0x3f); + + int0 = -0x02; + c_int_gt_lit2(0x7f); + + int0 = -0x01; + c_int_gt_lit2(0x7f); + + int0 = 0; + c_int_gt_lit2(0xff); + + int0 = 1; + c_int_gt_lit2(0xff); + + int0 = 0x7fff; + c_int_gt_lit2(0xff); + + /* now check contiguous ranges */ + + for(int0 = -0x7ffe; int0 != -0x7f01; int0++) + c_int_gt_lit2(0x01); + + for(int0 = -0x7dff; int0 != -0x101; int0++) + c_int_gt_lit2(0x0f); + + for(int0 = 0; int0 != 0x7fff; int0++) + c_int_gt_lit2(0xff); + +} + + + + +void +main (void) +{ + char_compare(); + __asm clrwdt __endasm; + int_compare1(); + __asm clrwdt __endasm; + int_compare2(); + __asm clrwdt __endasm; + + done (); +} diff --git a/src/regression/compare9.c b/src/regression/compare9.c new file mode 100644 index 0000000..d8caad0 --- /dev/null +++ b/src/regression/compare9.c @@ -0,0 +1,305 @@ +#include "gpsim_assert.h" +#include "picregs.h" +// Signed comparisons of the form: (variable<=LIT) +// +// This regression test exercises all of the boundary +// conditions in literal less than or equal comparisons. There +// are numerous opportunities to optimize these comparison +// and each one has an astonishing capability of failing +// a boundary condition. + +unsigned char failures = 0; +unsigned char result = 0; + +int int0 = 0; +int int1 = 0; +signed char char0 = 0; +signed char char1 = 0; + +/* *** NOTE *** This particular test takes quite a while to run + * ~ 10,000,000 instruction cycles. (2.5 seconds on a 20Mhz PIC). + * The WDT will reset the CPU if it's enabled. So disable it... +*/ + +typedef unsigned int word; + +//word at 0x2007 CONFIG = wdt_off & pwrte_on; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void c_char_lte_lit1(unsigned char expected_result) +{ + result = 0; + + if(char0 <= -0x7f) + result |= 1; + + if(char0 <= -1) + result |= 2; + + if(char0 <= 0) + result |= 4; + + if(char0 <= 1) + result |= 8; + + if(char0 <= 0x7f) + result |= 0x10; + + if(result != expected_result) + failures++; +} + + +void char_compare(void) +{ + char0 = 0x7f; + c_char_lte_lit1(0x10); + + char0 = 0x7e; + c_char_lte_lit1(0x10); + + char0 = 0x40; + c_char_lte_lit1(0x10); + + char0 = 0x2; + c_char_lte_lit1(0x10); + + char0 = 0x1; + c_char_lte_lit1(0x18); + + char0 = 0; + c_char_lte_lit1(0x1c); + + char0 = -1; + c_char_lte_lit1(0x1e); + + char0 = -2; + c_char_lte_lit1(0x1e); + + char0 = -0x40; + c_char_lte_lit1(0x1e); + + char0 = -0x7e; + c_char_lte_lit1(0x1e); + + char0 = -0x7f; + c_char_lte_lit1(0x1f); + + char0 = 0x80; + // c_char_lte_lit1(0x1f); + + + /* Now test entire range */ + + for(char0=2; char0 != 0x7f; char0++) + c_char_lte_lit1(0x10); + + + for(char0=-0x7e; char0 != 0; char0++) + c_char_lte_lit1(0x1e); + + +} + +void c_int_lte_lit1(unsigned char expected_result) +{ + result = 0; + + if(int0 <= 0) + result |= 1; + + if(int0 <= 1) + result |= 2; + + + if(int0 <= 0xff) + result |= 4; + + if(int0 <= 0x100) + result |= 8; + + if(int0 <= 0x0101) + result |= 0x10; + + if(int0 <= 0x01ff) + result |= 0x20; + + if(int0 <= 0x0200) + result |= 0x40; + + if(int0 <= 0x0201) + result |= 0x80; + + if(result != expected_result) + failures=1; + +} + + +void int_compare1(void) +{ + int0 = -1; + c_int_lte_lit1(0xff); + + int0 = 0; + c_int_lte_lit1(0xff); + + int0 = 1; + c_int_lte_lit1(0xfe); + + int0 = 2; + c_int_lte_lit1(0xfc); + + int0 = 0xfe; + c_int_lte_lit1(0xfc); + + int0 = 0xff; + c_int_lte_lit1(0xfc); + + int0 = 0x100; + c_int_lte_lit1(0xf8); + + int0 = 0x101; + c_int_lte_lit1(0xf0); + + int0 = 0x1fe; + c_int_lte_lit1(0xe0); + + int0 = 0x1ff; + c_int_lte_lit1(0xe0); + + int0 = 0x200; + c_int_lte_lit1(0xc0); + + int0 = 0x201; + c_int_lte_lit1(0x80); + + int0 = 0x7f00; + c_int_lte_lit1(0x0); + + /* now check contiguous ranges */ + + for(int0 = -0x7fff; int0 != 1; int0++) + c_int_lte_lit1(0xff); + + for(int0 = 2; int0 != 0xff; int0++) + c_int_lte_lit1(0xfc); + + for(int0 = 0x202; int0 != 0x7fff; int0++) + c_int_lte_lit1(0); + +} + + + +void c_int_lte_lit2(unsigned char expected_result) +{ + result = 0; + + if(int0 <= -0x7fff) + result |= 1; + + if(int0 <= -0x7f00) + result |= 2; + + if(int0 <= -0x7eff) + result |= 4; + + if(int0 <= -0x7e00) + result |= 8; + + if(int0 <= -0x0101) + result |= 0x10; + + if(int0 <= -0x0100) + result |= 0x20; + + if(int0 <= -0xff) + result |= 0x40; + + if(int0 <= -1) + result |= 0x80; + + if(result != expected_result) + failures=1; +} + +void int_compare2(void) +{ + int0 = -0x7fff; + c_int_lte_lit2(0xff); + + int0 = -0x7f00; + c_int_lte_lit2(0xfe); + + int0 = -0x7eff; + c_int_lte_lit2(0xfc); + + int0 = -0x7e00; + c_int_lte_lit2(0xf8); + + int0 = -0x4567; + c_int_lte_lit2(0xf0); + + int0 = -0x200; + c_int_lte_lit2(0xf0); + + int0 = -0x102; + c_int_lte_lit2(0xf0); + + int0 = -0x101; + c_int_lte_lit2(0xf0); + + int0 = -0x100; + c_int_lte_lit2(0xe0); + + int0 = -0xff; + c_int_lte_lit2(0xc0); + + int0 = -0x02; + c_int_lte_lit2(0x80); + + int0 = -0x01; + c_int_lte_lit2(0x80); + + int0 = 0; + c_int_lte_lit2(0x00); + + int0 = 1; + c_int_lte_lit2(0x00); + + int0 = 0x7fff; + c_int_lte_lit2(0x00); + + /* now check contiguous ranges */ + + for(int0 = -0x7ffe; int0 != -0x7f00; int0++) + c_int_lte_lit2(0xfe); + + for(int0 = -0x7dff; int0 != -0x101; int0++) + c_int_lte_lit2(0xf0); + + for(int0 = 0; int0 != 0x7fff; int0++) + c_int_lte_lit2(0); + +} + + +void +main (void) +{ + char_compare(); + __asm clrwdt __endasm; + int_compare1(); + __asm clrwdt __endasm; + int_compare2(); + __asm clrwdt __endasm; + + done (); +} diff --git a/src/regression/configword.c b/src/regression/configword.c new file mode 100644 index 0000000..fb4728a --- /dev/null +++ b/src/regression/configword.c @@ -0,0 +1,33 @@ +#include "gpsim_assert.h" +#include "picregs.h" + +/* configword.c - illustrates how the configuration word can + * be assigned */ + +unsigned char failures=0; +unsigned char dummy; + +#ifdef __pic14 +typedef unsigned int word; +static word __at(0x2007) _config = _WDT_OFF & _PWRTE_ON; +#else /* !__pic14 */ +static __code char __at(__CONFIG2L) _conf2l = _PUT_ON_2L; +static __code char __at(__CONFIG2H) _conf2h = _WDT_OFF_2H; +#endif /* !__pic14 */ + +/* TODO -- write a test that puts the PIC to sleep, + * and verify that the WDT wakes it up */ + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void main(void) +{ + dummy = 0; + + done(); +} diff --git a/src/regression/create_stc b/src/regression/create_stc new file mode 100755 index 0000000..4e59f4a --- /dev/null +++ b/src/regression/create_stc @@ -0,0 +1,15 @@ +# Create gpsim script file +# + +USAGE="Usage: `basename $0` COD_FILE GPSIM_SCRIPT" + +if [ $# -lt 2 ] ; then + echo "$USAGE" + exit 1 +fi + + +echo "load $1" > $2 +echo "run" >> $2 +echo "symbol _failures" >> $2 +echo "quit" >> $2 diff --git a/src/regression/empty.c b/src/regression/empty.c new file mode 100644 index 0000000..fb4fd26 --- /dev/null +++ b/src/regression/empty.c @@ -0,0 +1,22 @@ +#include "gpsim_assert.h" + +unsigned char failures = 0; + +void foo(void) { +} + +void bar(int arg0) { + (void)arg0; +} + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void main(void) { + done(); +} + diff --git a/src/regression/for.c b/src/regression/for.c new file mode 100644 index 0000000..9c9314e --- /dev/null +++ b/src/regression/for.c @@ -0,0 +1,108 @@ +#include "gpsim_assert.h" + +unsigned char failures=0; + +unsigned int uint0 = 0; +unsigned int uint1 = 0; +unsigned char uchar0 = 0; +unsigned char uchar1 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void for1(void) +{ + unsigned char i=0; + + for(i=0; i<10; i++) + uchar0++; + + if(uchar0 != 10) + failures++; + +} + +void for2(void) +{ + unsigned char i=0; + unsigned char j; + + for(i=0; i<10; i++) + uchar0++; + + j = (volatile)i; + + if(j != 10) + failures++; + +} + +void for3(void) +{ + unsigned int i=0; + volatile unsigned int j; + + for(i=0; i<10; i++) + uint0++; + + j = i; + if(j != 10) + failures++; + +} + +void for4(void) +{ + + for(uint0=1; uint0<10; uint0++) + uchar0++; + + if(uchar0 != 9) + failures++; + +} + +void for5(void) +{ + + for(uint0=1; uint0<=10; uint0++) + uchar0++; + + if(uchar0 != 10) + failures++; + +} + +void inc_uchar0(void) +{ + uchar0++; +} + +void for6(void) +{ + uchar0 = 0; + for(uint0=1; uint0<=10; uint0++) + inc_uchar0(); + +} + +void main(void) +{ + for1(); + for2(); + for3(); + uchar0 = 0; + for4(); + uchar0 = 0; + for5(); + + for6(); + if(uchar0 != 10) + failures++; + + done(); +} diff --git a/src/regression/gpsim_assert.h b/src/regression/gpsim_assert.h new file mode 100644 index 0000000..8e39858 --- /dev/null +++ b/src/regression/gpsim_assert.h @@ -0,0 +1,64 @@ +/*------------------------------------------------------------------------------ + + gpsim_assert.h - assertion macros generating gpsim breakpoints + + Copyright (c) 2006 Borut Razem + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, + USA. + +------------------------------------------------------------------------------*/ + + +#ifndef __PIC_ASSERT_H +#define __PIC_ASSERT_H + +#define MANGLE(e) _##e +#define STRINGIFY(e) #e + +#define ASSERT(e) \ + __asm \ + nop \ + __endasm; \ + __asm \ + .direct "a", STRINGIFY(e) \ + __endasm; \ + __asm \ + nop \ + __endasm; + +#define PASSED() \ + __asm \ + nop \ + __endasm; \ + __asm \ + .direct "a", "\"PASSED\"" \ + __endasm; \ + __asm \ + nop \ + __endasm; + +#define FAILED() \ + __asm \ + nop \ + __endasm; \ + __asm \ + .direct "a", "\"===> FAILED\"" \ + __endasm; \ + __asm \ + nop \ + __endasm; + +#endif diff --git a/src/regression/init0.c b/src/regression/init0.c new file mode 100644 index 0000000..fc711e4 --- /dev/null +++ b/src/regression/init0.c @@ -0,0 +1,45 @@ +#include "gpsim_assert.h" + +unsigned failures = 0; + +void +done(void) +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +typedef void (void_void_f)(void); + +void +foo(void) { + failures--; +} + +void +bar(void) { + failures -= 2; +} + +static void_void_f * +funcs[] = { + &foo, + &bar, + (void *)0 +}; + +void +main(void) +{ + void_void_f **ptr; + failures = 3; + + ptr = &funcs[0]; + while (*ptr) { + (**ptr)(); + ptr++; + } // while + + done(); +} + diff --git a/src/regression/inline.c b/src/regression/inline.c new file mode 100644 index 0000000..3198d99 --- /dev/null +++ b/src/regression/inline.c @@ -0,0 +1,58 @@ +#include "gpsim_assert.h" +#include "picregs.h" + +#pragma preproc_asm - + +unsigned char failures=0; + +unsigned char test_tris=0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void +delay_1ms(void) +{ + unsigned char cnt1m = 2; + unsigned char cnt500u = 249; + + do { + do { + _asm + nop + nop + _endasm; + } while (--cnt500u > 0); + } while (--cnt1m > 0); +} + + +void main(void) +{ + TRISA = 0x0f; + +#if defined(__pic14) + _asm + BSF STATUS,RP0 + MOVF TRISA,W + BCF STATUS,RP0 + MOVWF _test_tris + _endasm; +#else // !defined(__pic14) + _asm + BANKSEL _TRISA + MOVF _TRISA,W + BANKSEL _test_tris + MOVWF _test_tris + _endasm; +#endif // !defined(__pic14) + + if(test_tris != 0x0f) + failures++; + + done(); +} diff --git a/src/regression/mult1.c b/src/regression/mult1.c new file mode 100644 index 0000000..bcf9c71 --- /dev/null +++ b/src/regression/mult1.c @@ -0,0 +1,108 @@ +#include "gpsim_assert.h" + +#define TESTLIT 0x05 + +unsigned char failures=0; + + +signed char c1,c2,c3; +unsigned char uc1,uc2,uc3; + +unsigned int ui1,ui2,ui3; +signed int i1,i2; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void m1(void) +{ + + c1 = c1*5; // char = char * lit + + c2 = c1 *c3; // char = char * char + + uc1= uc1*5; // uchar = uchar * lit + uc2=uc1*uc3; // uchar = uchar * uchar + + if(c2 != 25) + failures++; +} + +void m2(unsigned char uc) +{ + + uc2 = uc1 * uc; + + if(uc2 != 0x20) + failures++; +} + +void m3(unsigned char uc) +{ + volatile unsigned char vuc; + + // uchar = uchar * lit + // testing literal multiply with same source and destination + vuc = uc; + uc2 = 0; + uc1 = vuc; uc1 = uc1*1; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*2; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*3; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*4; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*5; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*6; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*7; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*8; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*9; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*10; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*11; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*12; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*13; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*14; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*15; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*16; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*17; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*18; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*19; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*20; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*21; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*22; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*23; if( uc1 != (uc2+=TESTLIT) ) failures++; + uc1 = vuc; uc1 = uc1*24; if( uc1 != (uc2+=TESTLIT) ) failures++; + + uc1 = vuc; uc1 = uc1*31; if( uc1 != ((31*TESTLIT) & 0xff) ) failures++; + uc1 = vuc; uc1 = uc1*32; if( uc1 != ((32*TESTLIT) & 0xff) ) failures++; + uc1 = vuc; uc1 = uc1*64; if( uc1 != ((64*TESTLIT) & 0xff) ) failures++; + uc1 = vuc; uc1 = uc1*128;if( uc1 != ((128*TESTLIT)& 0xff) ) failures++; + + // testing literal multiply with different source and destination + uc1 = vuc*1; if( uc1 != ((1*TESTLIT) & 0xff) ) failures++; + uc1 = vuc*2; if( uc1 != ((2*TESTLIT) & 0xff) ) failures++; + uc1 = vuc*4; if( uc1 != ((4*TESTLIT) & 0xff) ) failures++; +} + + +void main(void) +{ + c1 = 1; + c3 = 5; + + m1(); + + uc1 = 0x10; + m2(2); + + ui1 = uc1*uc2; // uint = uchar * uchar + + i1 = c1*c2; // int = char * char + + ui3 = ui1*ui2; // uint = uint * unit + + //m3(TESTLIT); + + done(); +} diff --git a/src/regression/nestfor.c b/src/regression/nestfor.c new file mode 100644 index 0000000..654efe8 --- /dev/null +++ b/src/regression/nestfor.c @@ -0,0 +1,139 @@ +#include "gpsim_assert.h" +#include "picregs.h" + +unsigned char failures=0; + +unsigned int uint0 = 0; +unsigned int uint1 = 0; +unsigned char uchar0 = 0; +unsigned char uchar1 = 0; + +void dput(unsigned char val) +{ + PORTB = val; + PORTA = 0x01; + PORTA = 0x00; +} + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +/* both loops use the loop variable inside the inner loop */ +void for1(void) +{ + unsigned char i, j; + + uchar0 = 0; + uchar1 = 0; + for(i = 0; i < 3; i++) { + uchar0++; + for(j = 0; j < 4; j++) { + uchar1++; + dput(i); + dput(j); + } + } + if(uchar0 != 3) + failures++; + if(uchar1 != 12) + failures++; +} + +/* only the outer loop's variable is used inside, inner can be optimized into a repeat-loop */ +void for2(void) +{ + unsigned char i, j; + + uchar0 = 0; + uchar1 = 0; + for(i = 0; i < 3; i++) { + uchar0++; + for(j = 0; j < 4; j++) { + uchar1++; + dput(i); + } + } + if(uchar0 != 3) + failures++; + if(uchar1 != 12) + failures++; +} + +/* only the inner loop's variable is used inside */ +void for3(void) +{ + unsigned char i, j; + + uchar0 = 0; + uchar1 = 0; + for(i = 0; i < 3; i++) { + uchar0++; + for(j = 0; j < 4; j++) { + uchar1++; + dput(j); + } + } + if(uchar0 != 3) + failures++; + if(uchar1 != 12) + failures++; + +} + +/* neither loop variable used inside the loops */ +void for4(void) +{ + unsigned char i, j; + + uchar0 = 0; + uchar1 = 0; + for(i = 0; i < 3; i++) { + uchar0++; + for(j = 0; j < 4; j++) { + uchar1++; + dput(uchar0); + dput(uchar1); + } + } + if(uchar0 != 3) + failures++; + if(uchar1 != 12) + failures++; + +} + +/* like for1 but different condition in inner loop */ +void for5(void) +{ + unsigned char i, j; + + uchar0 = 0; + uchar1 = 0; + for(i = 0; i < 3; i++) { + uchar0++; + for(j = 10; j >= 5; j--) { + uchar1++; + dput(i); + dput(j); + } + } + if(uchar0 != 3) + failures++; + if(uchar1 != 18) + failures++; +} + +void main(void) +{ + for1(); + for2(); + for3(); + for4(); + for5(); + + done(); +} diff --git a/src/regression/or1.c b/src/regression/or1.c new file mode 100644 index 0000000..b828eb0 --- /dev/null +++ b/src/regression/or1.c @@ -0,0 +1,198 @@ +#include "gpsim_assert.h" + +/* bit types are not ANSI - so provide a way of disabling bit types + * if this file is used to test other compilers besides SDCC */ +#define SUPPORT_BIT_TYPES 0 + +unsigned char failures=0; + +#if SUPPORT_BIT_TYPES +bit bit0 = 0; +bit bit1 = 0; +bit bit2 = 0; +#endif + +unsigned int uint0 = 0; +unsigned int uint1 = 0; +unsigned char uchar0 = 0; +unsigned char uchar1 = 0; +unsigned long ulong0 = 0; +unsigned long ulong1 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +// uchar0 = 0; +void or_lit2uchar(void) +{ + + if(uchar0) + failures++; + + uchar0 |= 1; + + if(uchar0 != 1) + failures++; + + uchar0 |= 2; + + if(uchar0 != 3) + failures++; + + uchar0 |= 0x0e; + + if(uchar0 != 0x0f) + failures++; + +} + + +void or_lit2uint(void) +{ + + if(uint0) + failures++; + + uint0 |= 1; + if(uint0 != 1) + failures++; + + uint0 |= 2; + if(uint0 != 3) + failures++; + + uint0 |= 0x100; + if(uint0 != 0x103) + failures++; + + uint0 |= 0x102; + if(uint0 != 0x103) + failures++; + + uint0 |= 0x303; + if(uint0 != 0x303) + failures++; + +} + +void or_lit2ulong(void) +{ + + if(ulong0) + failures++; + + ulong0 |= 1; + if(ulong0 != 1) + failures++; + + ulong0 |= 2; + if(ulong0 != 3) + failures++; + + ulong0 |= 0x100; + if(ulong0 != 0x103) + failures++; + + ulong0 |= 0x102; + if(ulong0 != 0x103) + failures++; + + ulong0 |= 0x303; + if(ulong0 != 0x303) + failures++; + + ulong0 |= 0x80000000; + if(ulong0 != 0x80000303) + failures++; + +} + +/*-----------*/ +void or_uchar2uchar(void) +{ + + uchar0 |= uchar1; + + if(uchar0 != 1) + failures++; + + uchar1 |= 0x0f; + + uchar0 = uchar1 | 0x10; + + if(uchar0 != 0x1f) + failures++; +} + +void or_uint2uint(void) +{ + uint0 |= uint1; + + if(uint0 != 1) + failures++; + + uint1 |= 0x0f; + + uint0 = uint1 | 0x10; + + if(uint0 != 0x1f) + failures++; + +} + +#if SUPPORT_BIT_TYPES +void or_bits1(void) +{ + + bit0 = bit0 | bit1 | bit2; + +} + +void or_bits2(void) +{ + + bit0 = bit1 | bit2; + +} +#endif + +void main(void) +{ + + or_lit2uchar(); + or_lit2uint(); + or_lit2ulong(); + + uchar0=0; + uchar1=1; + or_uchar2uchar(); + + uint0=0; + uint1=1; + or_uint2uint(); + +#if SUPPORT_BIT_TYPES + or_bits1(); + if(bit0) + failures++; + + or_bits2(); + if(bit0) + failures++; + + bit1=1; + or_bits1(); + if(!bit0) + failures++; + + or_bits2(); + if(!bit0) + failures++; +#endif + + done(); +} diff --git a/src/regression/pcodeopt.c b/src/regression/pcodeopt.c new file mode 100644 index 0000000..8be5a2a --- /dev/null +++ b/src/regression/pcodeopt.c @@ -0,0 +1,26 @@ +#include "gpsim_assert.h" + +/* + * Test for buggy pCode optimization on + * CLRF reg ; pc1 + * ... + * MOVF reg,W ; pc2 + * + * Originally, both instructions were removed and pc2 replaced with + * CLRF reg iff reg was used afterwards, but Z and W were not, or + * MOVLW 0 iff reg and Z were not used afterwards, but W was. + * Detection of W being used used to be buggy, though... + */ +signed int x=0; +unsigned char y=1; + +void main() { + x += y; + x += y; + if (x != 2) { FAILED(); } + if (y != 1) { FAILED(); } + //ASSERT(MANGLE(x) == 2); + //ASSERT(MANGLE(y) == 1); + PASSED(); +} + diff --git a/src/regression/picregs.h b/src/regression/picregs.h new file mode 100644 index 0000000..92c20a9 --- /dev/null +++ b/src/regression/picregs.h @@ -0,0 +1,10 @@ +#ifndef PICREGS_H + +#if defined(__pic16) + #include +#else + #include +#endif + +#endif + diff --git a/src/regression/pointer1.c b/src/regression/pointer1.c new file mode 100644 index 0000000..23075b4 --- /dev/null +++ b/src/regression/pointer1.c @@ -0,0 +1,134 @@ +#include "gpsim_assert.h" + +// Pointer tests + +unsigned char failures = 0; +unsigned char dummy; + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; +unsigned char *acharP = 0; + +unsigned char buff[10]; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void +f1 (unsigned char *ucP) +{ + + if (ucP == 0) + { + failures++; + return; + } + + if (*ucP) + failures++; +} + +void +f2 (unsigned int *uiP) +{ + + if (uiP == 0) + { + failures++; + return; + } + + if (*uiP) + failures++; + +} + + +unsigned char * +f3 (void) +{ + + return &achar0; +} + + +void f4(unsigned char *ucP, unsigned char uc) +{ + + if(!ucP) { + failures++; + return; + } + + if(*ucP != uc) + failures++; + +} + +void init_array(char start_value) +{ + unsigned char c; + + for(c=0; c>= 1; + + check(); +} + +void shift_right_2(void) +{ + + achar0 >>= 2; + + check(); +} + +void shift_right_3(void) +{ + + achar0 >>= 3; + + check(); +} + +void shift_right_4(void) +{ + + achar0 >>= 4; + + check(); +} + +void shift_right_5(void) +{ + + achar0 >>= 5; + + check(); +} + +void shift_right_6(void) +{ + + achar0 >>= 6; + + check(); +} + +void shift_right_7(void) +{ + + achar0 >>= 7; + + check(); +} + + +void main(void) +{ + + // call with both values zero + shift_left_1(); + + achar0 = 1; + achar1 = 2; + for(achar2=0; achar2<6; achar2++) { + shift_left_1(); + achar1 <<=1; + } + + achar0 = 1; + achar1 = 4; + shift_left_2(); + + achar0 = 1; + achar1 = 8; + shift_left_3(); + + achar0 = 1; + achar1 = 0x10; + shift_left_4(); + + achar0 = 1; + achar1 = 0x20; + shift_left_5(); + + achar0 = 1; + achar1 = 0x40; + shift_left_6(); + + achar0 = 1; + achar1 = 0x80; + shift_left_7(); + + + + + achar0 = 2; + achar1 = 1; + shift_right_1(); + + achar0 = 4; + shift_right_2(); + + achar0 = 8; + shift_right_3(); + + achar0 = 0x10; + shift_right_4(); + + achar0 = 0x20; + shift_right_5(); + + achar0 = 0x40; + shift_right_6(); + + achar0 = 0x80; + shift_right_7(); + + done(); +} diff --git a/src/regression/rotate2.c b/src/regression/rotate2.c new file mode 100644 index 0000000..1d25110 --- /dev/null +++ b/src/regression/rotate2.c @@ -0,0 +1,62 @@ +#include "gpsim_assert.h" +// Shift bytes left and right by a variable. + +unsigned char failures=0; + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; +unsigned char achar2 = 0; +unsigned char achar3 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void shift_right_var(void) +{ + + achar0 >>= achar1; +} + +void shift_left_var(void) +{ + + achar0 <<= achar1; +} + +void shift_int_left_1(void) +{ + + aint0 <<= 1; + +} + +void main(void) +{ + char i; + + achar0 = 1; + achar1 = 1; + shift_left_var(); + + if(achar0 !=2) + failures++; + + achar0 = 1; + achar1 = 1; + achar2 = 1; + for(i=0; i<7; i++) { + shift_left_var(); + achar2 <<= 1; + + if(achar2 != achar0) + failures++; + } + + done(); +} diff --git a/src/regression/rotate3.c b/src/regression/rotate3.c new file mode 100644 index 0000000..70aab09 --- /dev/null +++ b/src/regression/rotate3.c @@ -0,0 +1,388 @@ +#include "gpsim_assert.h" +// Shift ints left and right + +unsigned char failures=0; + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; +unsigned char achar2 = 0; +unsigned char achar3 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void shift_int_left_1(void) +{ + + aint0 <<= 1; + +} + +void shift_int_left_2(void) +{ + + aint0 <<= 2; + +} + +void shift_int_left_3(void) +{ + + aint0 <<= 3; + +} + +void shift_int_left_4(void) +{ + + aint0 <<= 4; + +} + +void shift_int_left_5(void) +{ + + aint0 <<= 5; + +} + +void shift_int_left_6(void) +{ + + aint0 <<= 6; + +} + +void shift_int_left_7(void) +{ + + aint0 <<= 7; + +} + +void shift_int_left_8(void) +{ + + aint0 <<= 8; + +} + +void shift_int_left_9(void) +{ + + aint0 <<= 9; + +} + +void shift_int_left_10(void) +{ + + aint0 <<= 10; + +} + +void shift_int_left_11(void) +{ + + aint0 <<= 11; + +} + +void shift_int_left_12(void) +{ + + aint0 <<= 12; + +} + +void shift_int_left_13(void) +{ + + aint0 <<= 13; + +} + +void shift_int_left_14(void) +{ + + aint0 <<= 14; + +} + +void shift_int_left_15(void) +{ + + aint0 <<= 15; + +} + +/*****************************************************/ +void shift_int_right_1(void) +{ + aint0 >>= 1; +} + +void shift_int_right_2(void) +{ + aint0 >>= 2; +} + +void shift_int_right_3(void) +{ + aint0 >>= 3; +} + +void shift_int_right_4(void) +{ + aint0 >>= 4; +} + +void shift_int_right_5(void) +{ + aint0 >>= 5; +} + +void shift_int_right_6(void) +{ + aint0 >>= 6; +} + +void shift_int_right_7(void) +{ + aint0 >>= 7; +} + +void shift_int_right_8(void) +{ + aint0 >>= 8; +} + +void shift_int_right_9(void) +{ + aint0 >>= 9; +} + +void shift_int_right_10(void) +{ + aint0 >>= 10; +} + +void shift_int_right_11(void) +{ + aint0 >>= 11; +} + +void shift_int_right_12(void) +{ + aint0 >>= 12; +} + +void shift_int_right_13(void) +{ + aint0 >>= 13; +} + +void shift_int_right_14(void) +{ + aint0 >>= 14; +} + +void shift_int_right_15(void) +{ + aint0 >>= 15; +} + +/*****************************************************/ +void main(void) +{ + //char i; + + aint0 = 0xabcd; + + shift_int_left_1(); + if(aint0 != 0x579a) + failures++; + + aint0 = 0xabcd; + + shift_int_left_2(); + if(aint0 != 0xaf34) + failures++; + + aint0 = 0xabcd; + + shift_int_left_3(); + if(aint0 != 0x5e68) + failures++; + + aint0 = 0xabcd; + + shift_int_left_4(); + if(aint0 != 0xbcd0) + failures++; + + aint0 = 0xabcd; + + shift_int_left_5(); + if(aint0 != 0x79a0) + failures++; + + aint0 = 0xabcd; + + shift_int_left_6(); + if(aint0 != 0xf340) + failures++; + + aint0 = 0xabcd; + + shift_int_left_7(); + if(aint0 != 0xe680) + failures++; + + aint0 = 0xabcd; + + shift_int_left_8(); + if(aint0 != 0xcd00) + failures++; + + aint0 = 0xabcd; + + shift_int_left_9(); + if(aint0 != 0x9a00) + failures++; + + aint0 = 0xabcd; + + shift_int_left_10(); + if(aint0 != 0x3400) + failures++; + + aint0 = 0xabcd; + + shift_int_left_11(); + if(aint0 != 0x6800) + failures++; + + aint0 = 0xabcd; + + shift_int_left_12(); + if(aint0 != 0xd000) + failures++; + + aint0 = 0xabcd; + + shift_int_left_13(); + if(aint0 != 0xa000) + failures++; + + aint0 = 0xabcd; + + shift_int_left_14(); + if(aint0 != 0x4000) + failures++; + + aint0 = 0xabcd; + + shift_int_left_15(); + if(aint0 != 0x8000) + failures++; + + /***********************/ + aint0 = 0xabcd; + + shift_int_right_1(); + if(aint0 != 0x55e6) + failures++; + + aint0 = 0xabcd; + + shift_int_right_2(); + if(aint0 != 0x2af3) + failures++; + + aint0 = 0xabcd; + + shift_int_right_3(); + if(aint0 != 0x1579) + failures++; + + aint0 = 0xabcd; + + shift_int_right_4(); + if(aint0 != 0x0abc) + failures++; + + aint0 = 0xabcd; + + shift_int_right_5(); + if(aint0 != 0x055e) + failures++; + + aint0 = 0xabcd; + + shift_int_right_6(); + if(aint0 != 0x02af) + failures++; + + aint0 = 0xabcd; + + shift_int_right_7(); + if(aint0 != 0x0157) + failures++; + + aint0 = 0xabcd; + + shift_int_right_8(); + if(aint0 != 0x00ab) + failures++; + + aint0 = 0xabcd; + + shift_int_right_9(); + if(aint0 != 0x0055) + failures++; + + aint0 = 0xabcd; + + shift_int_right_10(); + if(aint0 != 0x002a) + failures++; + + aint0 = 0xabcd; + + shift_int_right_11(); + if(aint0 != 0x0015) + failures++; + + aint0 = 0xabcd; + + shift_int_right_12(); + if(aint0 != 0x000a) + failures++; + + aint0 = 0xabcd; + + shift_int_right_13(); + if(aint0 != 0x0005) + failures++; + + aint0 = 0xabcd; + + shift_int_right_14(); + if(aint0 != 0x0002) + failures++; + + aint0 = 0xabcd; + + shift_int_right_15(); + if(aint0 != 0x0001) + failures++; + + done(); +} diff --git a/src/regression/rotate4.c b/src/regression/rotate4.c new file mode 100644 index 0000000..8d8f6f5 --- /dev/null +++ b/src/regression/rotate4.c @@ -0,0 +1,223 @@ +#include "gpsim_assert.h" +// rotate bytes left and right by a constant. + +unsigned char failures=0; + +unsigned int uint0 = 0; +unsigned int uint1 = 0; +unsigned char uchar0 = 0; +unsigned char uchar1 = 0; +unsigned char uchar2 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void check(void) +{ + if(uchar0 != uchar1) + failures++; +} + +void rotate_left_1(void) +{ + + uchar0 = (uchar0<<1) | (uchar0>>7); + + check(); +} + +void rotate_left_2(void) +{ + + uchar0 = (uchar0<<2) | (uchar0>>6); + + check(); +} + + +void rotate_left_3(void) +{ + + uchar0 <<= 3; + + if(uchar0 != uchar1) + failures++; +} + +void rotate_left_4(void) +{ + + uchar0 <<= 4; + + if(uchar0 != uchar1) + failures++; +} + +void rotate_left_5(void) +{ + + uchar0 <<= 5; + + if(uchar0 != uchar1) + failures++; +} + +void rotate_left_6(void) +{ + + uchar0 <<= 6; + + if(uchar0 != uchar1) + failures++; +} + +void rotate_left_7(void) +{ + + uchar0 <<= 7; + + if(uchar0 != uchar1) + failures++; +} + +void rotate_right_1(void) +{ + + uchar0 = (uchar0>>1) | (uchar0<<7); + + check(); + +} + +void rotate_right_2(void) +{ + + uchar0 = (uchar0>>2) | (uchar0<<6); + + check(); +} + +void rotate_right_3(void) +{ + + uchar0 >>= 3; + + check(); +} + +void rotate_right_4(void) +{ + + uchar0 >>= 4; + + check(); +} + +void rotate_right_5(void) +{ + + uchar0 >>= 5; + + check(); +} + +void rotate_right_6(void) +{ + + uchar0 >>= 6; + + check(); +} + +void rotate_right_7(void) +{ + + uchar0 >>= 7; + + check(); +} + + +void main(void) +{ + + // call with both values zero + rotate_left_1(); + + uchar0 = 1; + uchar1 = 2; + + rotate_left_1(); + + uchar0 = 0x80; + uchar1 = 1; + + rotate_left_1(); + + uchar1 = 2; + for(uchar2=0; uchar2<6; uchar2++) { + rotate_left_1(); + uchar1 <<=1; + } + + + uchar0 = 1; + uchar1 = 4; + rotate_left_2(); + + uchar0 = 1; + uchar1 = 8; + rotate_left_3(); + + uchar0 = 1; + uchar1 = 0x10; + rotate_left_4(); + + uchar0 = 1; + uchar1 = 0x20; + rotate_left_5(); + + uchar0 = 1; + uchar1 = 0x40; + rotate_left_6(); + + uchar0 = 1; + uchar1 = 0x80; + rotate_left_7(); + + + + + uchar0 = 2; + uchar1 = 1; + rotate_right_1(); + + uchar0 = 1; + uchar1 = 0x80; + rotate_right_1(); + + uchar0 = 4; + uchar1 = 1; + rotate_right_2(); + + uchar0 = 8; + rotate_right_3(); + + uchar0 = 0x10; + rotate_right_4(); + + uchar0 = 0x20; + rotate_right_5(); + + uchar0 = 0x40; + rotate_right_6(); + + uchar0 = 0x80; + rotate_right_7(); + + done(); +} diff --git a/src/regression/rotate5.c b/src/regression/rotate5.c new file mode 100644 index 0000000..dc5d0b2 --- /dev/null +++ b/src/regression/rotate5.c @@ -0,0 +1,234 @@ +#include "gpsim_assert.h" +// Shift bytes left and right by a constant. + +unsigned char failures=0; + +signed int aint0 = 0; +signed int aint1 = 0; +signed char achar0 = 0; +signed char achar1 = 0; +signed char achar2 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void check(void) +{ + if(achar0 != achar1) + failures++; +} + +void shift_left_1(void) +{ + + achar0 <<= 1; + + check(); +} + +void shift_left_2(void) +{ + + achar0 <<= 2; + + if(achar0 != achar1) + failures++; +} + + +void shift_left_3(void) +{ + + achar0 <<= 3; + + if(achar0 != achar1) + failures++; +} + +void shift_left_4(void) +{ + + achar0 <<= 4; + + if(achar0 != achar1) + failures++; +} + +void shift_left_5(void) +{ + + achar0 <<= 5; + + if(achar0 != achar1) + failures++; +} + +void shift_left_6(void) +{ + + achar0 <<= 6; + + if(achar0 != achar1) + failures++; +} + +void shift_left_7(void) +{ + + achar0 <<= 7; + + if(achar0 != achar1) + failures++; +} + +void shift_right_1(void) +{ + + achar0 >>= 1; + + check(); +} + +void shift_right_2(void) +{ + + achar0 >>= 2; + + check(); +} + +void shift_right_3(void) +{ + + achar0 >>= 3; + + check(); +} + +void shift_right_4(void) +{ + + achar0 >>= 4; + + check(); +} + +void shift_right_5(void) +{ + + achar0 >>= 5; + + check(); +} + +void shift_right_6(void) +{ + + achar0 >>= 6; + + check(); +} + +void shift_right_7(void) +{ + + achar0 >>= 7; + + check(); +} + + +void main(void) +{ + + // call with both values zero + shift_left_1(); + + achar0 = 1; + achar1 = 2; + for(achar2=0; achar2<6; achar2++) { + shift_left_1(); + achar1 <<=1; + } + + achar0 = 1; + achar1 = 4; + shift_left_2(); + + achar0 = 1; + achar1 = 8; + shift_left_3(); + + achar0 = 1; + achar1 = 0x10; + shift_left_4(); + + achar0 = 1; + achar1 = 0x20; + shift_left_5(); + + achar0 = 1; + achar1 = 0x40; + shift_left_6(); + + achar0 = 1; + achar1 = 0x80; + shift_left_7(); + + + + + achar0 = 2; + achar1 = 1; + shift_right_1(); + + achar0 = 4; + shift_right_2(); + + achar0 = 8; + shift_right_3(); + + achar0 = 0x10; + shift_right_4(); + + achar0 = 0x20; + shift_right_5(); + + achar0 = 0x40; + shift_right_6(); + + + achar0 = 0xff; + achar1 = 0xff; + shift_right_1(); + + achar0 = 0xfe; + achar1 = 0xff; + shift_right_1(); + + achar0 = 0xfc; + shift_right_2(); + + achar0 = 0xf8; + shift_right_3(); + + achar0 = 0xf0; + shift_right_4(); + + achar0 = 0xe0; + shift_right_5(); + + achar0 = 0xc0; + shift_right_6(); + + achar0 = 0x80; + achar1 = 0xff; + shift_right_7(); + + + done(); +} diff --git a/src/regression/rotate6.c b/src/regression/rotate6.c new file mode 100644 index 0000000..0589ae5 --- /dev/null +++ b/src/regression/rotate6.c @@ -0,0 +1,135 @@ +#include "gpsim_assert.h" +// Shift bytes left and right by a variable. + +unsigned char failures=0; + +signed int aint0 = 0; +signed int aint1 = 0; +signed char achar0 = 0; +signed char achar1 = 0; +signed char achar2 = 0; +signed char achar3 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void shift_right_var(void) +{ + + achar0 >>= achar1; + +} + +void shift_left_var(void) +{ + + achar0 <<= achar1; +} + +void shift_int_left_var(void) +{ + + aint0 <<= achar1; + +} + +void shift_int_right_var(void) +{ + + aint0 >>= achar1; + +} + +void shift_int_right_var2(void) +{ + + aint0 = aint1 >> achar1; + +} + +void shift_int_left_var2(void) +{ + + aint0 = aint1 << achar1; + +} + +void main(void) +{ + char i; + + achar0 = 1; + achar1 = 1; + shift_left_var(); + + if(achar0 !=2) + failures++; + + achar0 = 1; + achar1 = 1; + achar2 = 1; + for(i=0; i<7; i++) { + shift_left_var(); + achar2 <<= 1; + + if(achar2 != achar0) + failures++; + } + + achar1 = 4; + achar0 = 0xf0; + shift_right_var(); + if(achar0 != (char)0xff) + failures++; + + aint0 = 1; + aint1 = 1; + achar1 = 1; + + for(i=0; i<15; i++) { + shift_int_left_var(); + aint1 <<= 1; + if(aint0 != aint1) + failures++; + } + + aint0 = 0x4000; + aint1 = 0x4000; + + for(i=0; i<15; i++) { + shift_int_right_var(); + aint1 >>= 1; + if(aint0 != aint1) + failures++; + } + + + aint0 = -0x4000; + aint1 = -0x4000; + + for(i=0; i<15; i++) { + shift_int_right_var(); + aint1 >>= 1; + if(aint0 != aint1) + failures++; + } + + aint1 = 0xf000; + achar1 = 10; + shift_int_right_var2(); + + if(aint0 != 0xfffc) + failures++; + + aint1 = aint0; + shift_int_left_var2(); + + if(aint0 != 0xf000) + failures++; + + done(); +} diff --git a/src/regression/rotate7.c b/src/regression/rotate7.c new file mode 100644 index 0000000..1546055 --- /dev/null +++ b/src/regression/rotate7.c @@ -0,0 +1,388 @@ +#include "gpsim_assert.h" +// Shift ints left and right + +unsigned char failures=0; + +signed int aint0 = 0; +signed int aint1 = 0; +signed char achar0 = 0; +signed char achar1 = 0; +signed char achar2 = 0; +signed char achar3 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void shift_int_left_1(void) +{ + + aint0 <<= 1; + +} + +void shift_int_left_2(void) +{ + + aint0 <<= 2; + +} + +void shift_int_left_3(void) +{ + + aint0 <<= 3; + +} + +void shift_int_left_4(void) +{ + + aint0 <<= 4; + +} + +void shift_int_left_5(void) +{ + + aint0 <<= 5; + +} + +void shift_int_left_6(void) +{ + + aint0 <<= 6; + +} + +void shift_int_left_7(void) +{ + + aint0 <<= 7; + +} + +void shift_int_left_8(void) +{ + + aint0 <<= 8; + +} + +void shift_int_left_9(void) +{ + + aint0 <<= 9; + +} + +void shift_int_left_10(void) +{ + + aint0 <<= 10; + +} + +void shift_int_left_11(void) +{ + + aint0 <<= 11; + +} + +void shift_int_left_12(void) +{ + + aint0 <<= 12; + +} + +void shift_int_left_13(void) +{ + + aint0 <<= 13; + +} + +void shift_int_left_14(void) +{ + + aint0 <<= 14; + +} + +void shift_int_left_15(void) +{ + + aint0 <<= 15; + +} + +/*****************************************************/ +void shift_int_right_1(void) +{ + aint0 >>= 1; +} + +void shift_int_right_2(void) +{ + aint0 >>= 2; +} + +void shift_int_right_3(void) +{ + aint0 >>= 3; +} + +void shift_int_right_4(void) +{ + aint0 >>= 4; +} + +void shift_int_right_5(void) +{ + aint0 >>= 5; +} + +void shift_int_right_6(void) +{ + aint0 >>= 6; +} + +void shift_int_right_7(void) +{ + aint0 >>= 7; +} + +void shift_int_right_8(void) +{ + aint0 >>= 8; +} + +void shift_int_right_9(void) +{ + aint0 >>= 9; +} + +void shift_int_right_10(void) +{ + aint0 >>= 10; +} + +void shift_int_right_11(void) +{ + aint0 >>= 11; +} + +void shift_int_right_12(void) +{ + aint0 >>= 12; +} + +void shift_int_right_13(void) +{ + aint0 >>= 13; +} + +void shift_int_right_14(void) +{ + aint0 >>= 14; +} + +void shift_int_right_15(void) +{ + aint0 >>= 15; +} + +/*****************************************************/ +void main(void) +{ + //char i; + + aint0 = 0xabcd; + + shift_int_left_1(); + if(aint0 != 0x579a) + failures++; + + aint0 = 0xabcd; + + shift_int_left_2(); + if(aint0 != 0xaf34) + failures++; + + aint0 = 0xabcd; + + shift_int_left_3(); + if(aint0 != 0x5e68) + failures++; + + aint0 = 0xabcd; + + shift_int_left_4(); + if(aint0 != 0xbcd0) + failures++; + + aint0 = 0xabcd; + + shift_int_left_5(); + if(aint0 != 0x79a0) + failures++; + + aint0 = 0xabcd; + + shift_int_left_6(); + if(aint0 != 0xf340) + failures++; + + aint0 = 0xabcd; + + shift_int_left_7(); + if(aint0 != 0xe680) + failures++; + + aint0 = 0xabcd; + + shift_int_left_8(); + if(aint0 != 0xcd00) + failures++; + + aint0 = 0xabcd; + + shift_int_left_9(); + if(aint0 != 0x9a00) + failures++; + + aint0 = 0xabcd; + + shift_int_left_10(); + if(aint0 != 0x3400) + failures++; + + aint0 = 0xabcd; + + shift_int_left_11(); + if(aint0 != 0x6800) + failures++; + + aint0 = 0xabcd; + + shift_int_left_12(); + if(aint0 != 0xd000) + failures++; + + aint0 = 0xabcd; + + shift_int_left_13(); + if(aint0 != 0xa000) + failures++; + + aint0 = 0xabcd; + + shift_int_left_14(); + if(aint0 != 0x4000) + failures++; + + aint0 = 0xabcd; + + shift_int_left_15(); + if(aint0 != 0x8000) + failures++; + + /***********************/ + aint0 = 0xabcd; + + shift_int_right_1(); + if(aint0 != 0xd5e6) + failures++; + + aint0 = 0xabcd; + + shift_int_right_2(); + if(aint0 != 0xeaf3) + failures++; + + aint0 = 0xabcd; + + shift_int_right_3(); + if(aint0 != 0xf579) + failures++; + + aint0 = 0xabcd; + + shift_int_right_4(); + if(aint0 != 0xfabc) + failures++; + + aint0 = 0xabcd; + + shift_int_right_5(); + if(aint0 != 0xfd5e) + failures++; + + aint0 = 0xabcd; + + shift_int_right_6(); + if(aint0 != 0xfeaf) + failures++; + + aint0 = 0xabcd; + + shift_int_right_7(); + if(aint0 != 0xff57) + failures++; + + aint0 = 0xabcd; + + shift_int_right_8(); + if(aint0 != 0xffab) + failures++; + + aint0 = 0xabcd; + + shift_int_right_9(); + if(aint0 != 0xffd5) + failures++; + + aint0 = 0xabcd; + + shift_int_right_10(); + if(aint0 != 0xffea) + failures++; + + aint0 = 0xabcd; + + shift_int_right_11(); + if(aint0 != 0xfff5) + failures++; + + aint0 = 0xabcd; + + shift_int_right_12(); + if(aint0 != 0xfffa) + failures++; + + aint0 = 0xabcd; + + shift_int_right_13(); + if(aint0 != 0xfffd) + failures++; + + aint0 = 0xabcd; + + shift_int_right_14(); + if(aint0 != 0xfffe) + failures++; + + aint0 = 0xabcd; + + shift_int_right_15(); + if(aint0 != -1) + failures++; + + done(); +} diff --git a/src/regression/rt.sh b/src/regression/rt.sh new file mode 100755 index 0000000..c256367 --- /dev/null +++ b/src/regression/rt.sh @@ -0,0 +1,20 @@ +# test Script + +USAGE="Usage: `basename $0` BASENAME" + +if [ $# -lt 1 ] ; then + echo "$USAGE" + exit 1 +fi + +# compile + +../../bin/sdcc -I ../../device/include/pic -c -mpic14 -pp16f877 $1.c + + +# create the executable + +gplink --map -c -o $1.o $1.o +./create_stc $1.cod $1.stc + +./simulate $1.stc garbage.log diff --git a/src/regression/simulate b/src/regression/simulate new file mode 100755 index 0000000..2ee28b9 --- /dev/null +++ b/src/regression/simulate @@ -0,0 +1,26 @@ +# SDCC test script for the PIC Port +# +USAGE="Usage: `basename $0` GPSIM_SCRIPT OUTPUT" + +if [ $# -lt 2 ] ; then + echo "$USAGE" + exit 1 +fi + +if [ "$GPSIM_PATH" != "" ] ; then + PATH=$GPSIM_PATH:$PATH +fi + +GPSIM_SCRIPT=$1 +LOGFILE=$2 +echo "Test $GPSIM_SCRIPT" | tee -a $LOGFILE +gpsim --cli -c $GPSIM_SCRIPT | tee -a $LOGFILE |\ +sed -n -e '/running\.\.\./,$ { +/^ *Message:/ { +s/^ *Message:\(.*\)$/\1/p +q +} +} +$ a\ +===> FAILED +' | tee -a $LOGFILE diff --git a/src/regression/string1.c b/src/regression/string1.c new file mode 100644 index 0000000..e8721c9 --- /dev/null +++ b/src/regression/string1.c @@ -0,0 +1,53 @@ +#include "gpsim_assert.h" +#include "picregs.h" + +unsigned char failures=0; +//unsigned bit bit1; + +typedef unsigned char byte; + + +byte uchar0; +const byte arr[] = { 1,2,8,9,0 }; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void isr(void) interrupt 1 using 1 +{ + + if(arr[3]!=9) + failures++; + PORTB = 7; +} + +void lcd1(const unsigned char *str) +{ + const char *p = "hello world!\r\n"; + + if(!str) + failures++; + + if(str && str[2] != 'r') + failures++; + + if(arr[3]!=9) + failures++; + + while (1) { + if (0 == *p) break; + PORTB = *p; + p++; + } + +} + +void main(void) +{ + lcd1("str"); + done(); +} diff --git a/src/regression/struct1.c b/src/regression/struct1.c new file mode 100644 index 0000000..99b9f21 --- /dev/null +++ b/src/regression/struct1.c @@ -0,0 +1,104 @@ +#include "gpsim_assert.h" +// Addition tests + +/* bit types are not ANSI - so provide a way of disabling bit types + * if this file is used to test other compilers besides SDCC */ +#define SUPPORT_BIT_TYPES 0 + +/* Some compilers that support bit types do not support bit arithmetic + * (like bitx = bity + bitz;) */ +#define SUPPORT_BIT_ARITHMETIC 1 + +unsigned char failures = 0; + +#if SUPPORT_BIT_TYPES + +bit bit0 = 0; +bit bit1 = 0; +bit bit2 = 0; +bit bit3 = 0; +bit bit4 = 0; +bit bit5 = 0; +bit bit6 = 0; +bit bit7 = 0; +bit bit8 = 0; +bit bit9 = 0; +bit bit10 = 0; +bit bit11 = 0; + +#endif + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; +unsigned char *acharP = 0; + +struct chars + { + unsigned char c0, c1; + unsigned int i0, i1; + }; + + +struct chars struct1; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void +struct_test (void) +{ + + if (struct1.c0 || struct1.c1) + failures++; + + struct1.c0++; + + if (struct1.c0 != 1) + failures++; +} +/* +void +ptr_to_struct (struct chars *p) +{ + + if (p->c1) + failures++; + + + p->c1++; + + if (p->c1 != 1) + failures++; +} +*/ +void add_chars(void) +{ + + achar0 = struct1.c0 + struct1.c1; + + if(achar0 != 1) + failures++; +} + +void +main (void) +{ + + + struct1.c0 = 0; + struct1.c1 = 0; + struct_test (); + // ptr_to_struct (&struct1); + + struct1.c0 = 0; + struct1.c1 = 1; + add_chars(); + + done (); +} diff --git a/src/regression/sub.c b/src/regression/sub.c new file mode 100644 index 0000000..db28d20 --- /dev/null +++ b/src/regression/sub.c @@ -0,0 +1,252 @@ +#include "gpsim_assert.h" +// Addition tests + +/* bit types are not ANSI - so provide a way of disabling bit types + * if this file is used to test other compilers besides SDCC */ +#define SUPPORT_BIT_TYPES 0 + +/* Some compilers that support bit types do not support bit arithmetic + * (like bitx = bity + bitz;) */ +#define SUPPORT_BIT_ARITHMETIC 1 + +unsigned char failures=0; + +#if SUPPORT_BIT_TYPES + +bit bit0 = 0; +bit bit1 = 0; +bit bit2 = 0; +bit bit3 = 0; +bit bit4 = 0; +bit bit5 = 0; +bit bit6 = 0; +bit bit7 = 0; +bit bit8 = 0; +bit bit9 = 0; +bit bit10 = 0; +bit bit11 = 0; + +#endif + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; +unsigned char achar2 = 0; +unsigned char achar3 = 0; +unsigned char *acharP = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void sub_lit_from_uchar(void) +{ + + achar0 = achar0 - 5; + + if(achar0 != 0xfb) + failures++; + + achar0 -= 10; + + if(achar0 != 0xf1) + failures++; + + achar0 = achar0 -1; // Should be a decrement + if(achar0 != 0xf0) + failures++; + + for(achar1 = 0; achar1 < 100; achar1++) + achar0 -= 2; + + if(achar0 != 40) + failures++; + +} + +// achar0 = 1 +// achar1 = 100 + +void sub_uchar2uchar(void) +{ + + achar1 = achar1 - achar0; + + if(achar1 != 99) + failures++; + + for(achar2 = 0; achar2<7; achar2++) + achar1 -= achar0; + + if(achar1 != 92) + failures++; + +} + +// assumes +// achar0 = 10 +// achar1 = 32 +// achar2, achar3 can be anything. + +void sub_uchar2uchar2(void) +{ + + + achar0--; + achar0 = achar0 - 1; + achar0 = achar0 - 2; + achar0 = achar0 - 3; + if(achar0 != 3) + failures++; + + + achar1 -= achar0; + if(achar1 != 29) + failures++; + + achar2 = achar1 - achar0; + if(achar2 != 26) + failures++; + + + achar3 = achar2 - achar1 - achar0; + if(achar3 != 0xfa) + failures++; + +} + +// sub_bits +// all bit variables are 0 upon entry. + +#if SUPPORT_BIT_TYPES +void sub_bits(void) +{ + + bit1 = bit0; + + bit0 = 1; + + if(bit1 != 0) + failures++; + + bit1 = bit0-bit1; // 1 - 0 => 1 + if(bit1 != 1) + failures++; + +#if SUPPORT_BIT_ARITHMETIC + bit2 = bit1-bit0; // 1 - 1 => 0 + if(bit2) + failures++; + + bit7 = bit4-bit5; + bit6 = bit4+bit5; + bit3 = bit4-bit5-bit6-bit7-bit0; // 0-0-0-0-1 => 1 + if(!bit3) + failures++; +#endif +} + +/* sub_bit2uchar(void) - assumes bit0 = 1, achar0 = 7 */ + +void sub_bit2uchar(void) +{ + + achar0 -= bit0; + + if(achar0 != 6) + failures++; + + if(achar0 == bit0) + failures++; + +} + +void sub_bit2uint(void) +{ + + if(aint0 != bit11) + failures++; + + aint0 -= bit0; + if(aint0!=0xffff) + failures++; + +} +#endif + +void sub_ucharFromLit(void) +{ + + achar0 = 2 - achar0; + + if(achar0 != 2) + failures++; + + + aint0 = 2 - aint0; + + if(aint0 != 2) + failures++; + + aint0--; + + if(aint0 != 1) + failures++; + + aint0 = 0x100 - aint0; + + if(aint0 != 0xff) + failures++; + + aint0 = 0xff00 - aint0; + + if(aint0 != 0xfe01) + failures++; + + aint0 = 0x0e01 - aint0; + + if(aint0 != 0x1000) + failures++; + + aint0 = 0x10ff - aint0; + + if(aint0 != 0xff) + failures++; + + + +} + +void main(void) +{ + + sub_lit_from_uchar(); + + achar0=1; + achar1=100; + sub_uchar2uchar(); + + + achar0 = 10; + achar1 = 32; + sub_uchar2uchar2(); + +#if SUPPORT_BIT_TYPES + sub_bits(); + + achar0 = 7; + bit0 = 1; + sub_bit2uchar(); + sub_bit2uint(); +#endif + + aint0 = 0; + achar0 = 0; + sub_ucharFromLit(); + + done(); +} diff --git a/src/regression/sub2.c b/src/regression/sub2.c new file mode 100644 index 0000000..44b54d5 --- /dev/null +++ b/src/regression/sub2.c @@ -0,0 +1,172 @@ +#include "gpsim_assert.h" +// Addition tests + +/* bit types are not ANSI - so provide a way of disabling bit types + * if this file is used to test other compilers besides SDCC */ +#define SUPPORT_BIT_TYPES 0 + +/* Some compilers that support bit types do not support bit arithmetic + * (like bitx = bity + bitz;) */ +#define SUPPORT_BIT_ARITHMETIC 1 + +unsigned char failures=0; + +#if SUPPORT_BIT_TYPES + +bit bit0 = 0; +bit bit1 = 0; +bit bit2 = 0; +bit bit3 = 0; +bit bit4 = 0; +bit bit5 = 0; +bit bit6 = 0; +bit bit7 = 0; +bit bit8 = 0; +bit bit9 = 0; +bit bit10 = 0; +bit bit11 = 0; + +#endif + +int int0 = 0; +int int1 = 0; +char char0 = 0; +char char1 = 0; +char char2 = 0; + + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void sub_int1(void) +{ + if(int0 != 5) + failures++; + + if(int1 != 4) + failures++; + + int0 = int0 - int1; + + if(int0 != 1) + failures++; + + int0 = 4 - int0; + if(int0 != 3) + failures++; + + int0 = int0 - int1; + + if(int0 != -1) + failures++; + + int0 = int0 - 0xff; + + if(int0 != -0x100) + failures++; + + int0 = 0xff - int0; + + if(int0 != 0x1ff) + failures++; + + +} + +void sub_char_int(void) +{ + + int0 = int0 - char0; + + if(int0 != 3) + failures++; + + if(int0 < char0) + failures++; + + int0 = int0 - char0; + + if(int0 != 1) + failures++; + + if(int0 > char0) + failures++; + + + int0 = int0 - char0; + if(int0 != -1) + failures++; + + if(int0>0) + failures++; + +} + +void assign_char2int(void) +{ + + int0 = char0; + if(int0 != 0x7f) + failures++; + + int1 = char1; + if(int1 != -5) + failures++; + +} + + +void sub_compound_char(void) +{ + + char0 = char1 - 5; + if(char0 != 4) + failures++; + + if((char1 - char0 - 5) != 0) + failures++; + +} + +void sub_compound_int(void) +{ + + int0 = int1 - 5; + if(int0 != 4) + failures++; + + if((int1 - int0 - 5) != 0) + failures++; + +} + +void main(void) +{ + + int0 = 5; + int1 = 4; + + sub_int1(); + + int0 = 5; + int1 = 4; + char0 = 2; + + sub_char_int(); + + char0 = 0x7f; + char1 = -5; + assign_char2int(); + + char1 = 9; + sub_compound_char(); + + int1 = 9; + sub_compound_int(); + + done(); +} diff --git a/src/regression/switch1.c b/src/regression/switch1.c new file mode 100644 index 0000000..71730ea --- /dev/null +++ b/src/regression/switch1.c @@ -0,0 +1,84 @@ +#include "gpsim_assert.h" +unsigned char failures=0; + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; + + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void switch1(void) +{ + + + switch(achar0) { + case 0: + achar0 = 9; + break; + case 1: + achar0 = 18; + break; + + default: + achar0 = 0; + } + + +} + +void switch2(void) +{ + + switch(achar1) { + case 0: achar0 = 9; break; + case 1: achar0 = 8; break; + case 2: achar0 = 7; break; + case 3: achar0 = 6; break; + case 4: achar0 = 5; break; + case 5: achar0 = 4; break; + case 6: achar0 = 3; break; + case 7: achar0 = 2; break; + case 8: achar0 = 1; break; + case 9: achar0 = 0; break; + case 10: achar0 = 9; break; + case 11: achar0 = 8; break; + case 12: achar0 = 7; break; + default: achar0 = 0xff; break; + } + +} + +void main(void) +{ + + achar0 = 0; + switch1(); + if(achar0 != 9) + failures++; + + switch1(); + if(achar0 != 0) + failures++; + + achar0++; + + switch1(); + if(achar0 != 18) + failures++; + + for(achar1=0; achar1<10;achar1++){ + switch2(); + if(achar0 != (9-achar1)) + failures++; + + } + + done(); +} diff --git a/src/regression/while.c b/src/regression/while.c new file mode 100644 index 0000000..4429b88 --- /dev/null +++ b/src/regression/while.c @@ -0,0 +1,42 @@ +#include "gpsim_assert.h" + +unsigned char failures = 0; + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; + + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void +while1 (void) +{ + unsigned char i = 10; + + do + { + achar0++; + } + while (--i); + + if (achar0 != 10) + failures++; + +} + + +void +main (void) +{ + while1 (); + + + done (); +} diff --git a/src/regression/xor.c b/src/regression/xor.c new file mode 100644 index 0000000..cf5308c --- /dev/null +++ b/src/regression/xor.c @@ -0,0 +1,56 @@ +#include "gpsim_assert.h" +unsigned char failures=0; + +unsigned char achar0 = 0; +unsigned char achar1 = 0; +unsigned char achar2 = 0; + +void +done() +{ + ASSERT(MANGLE(failures) == 0); + PASSED(); +} + +void xor_chars_0_1(void) +{ + + achar2 = achar0 ^ achar1; + + achar0 = achar0 ^ 0x1; + + achar1 = achar0 ^ achar1 ^ 4; +} + +void xor_if(void) +{ + + if(achar0 ^ achar1) + failures++; + + achar0 ^= 0xff; + + if( !(achar0 ^ achar1) ) + failures++; + +} + +void main(void) +{ + + xor_chars_0_1(); + + if(achar2) + failures++; + + if(achar0 != 1) + failures++; + + if(achar1 != 5) + failures++; + + achar0 = achar1; + xor_if(); + + done(); +} diff --git a/src/reswords.gperf b/src/reswords.gperf new file mode 100644 index 0000000..651d581 --- /dev/null +++ b/src/reswords.gperf @@ -0,0 +1,67 @@ +%{ +/* Command-line: gperf -L KR-C -F ', 0, 0' -p -j1 -i 1 -g -o -t -N is_reserved_word -k1,3,$ c-parse.gperf */ +%} +struct reserved_words { const char *name; int token; bool is_special; }; +%% +auto, AUTO, 0 +break, BREAK, 0 +case, CASE, 0 +char, CHAR, 0 +const, CONST, 0 +continue, CONTINUE, 0 +default, DEFAULT, 0 +do, DO, 0 +double, FLOAT, 0 +else, ELSE, 0 +enum, ENUM, 0 +extern, EXTERN, 0 +float, FLOAT, 0 +for, FOR, 0 +goto, GOTO, 0 +if, IF, 0 +int, INT, 0 +interrupt, INTERRUPT, 0 +long, LONG, 0 +register, REGISTER, 0 +return, RETURN, 0 +short, SHORT, 0 +signed, SIGNED, 0 +sizeof, SIZEOF, 0 +static, STATIC, 0 +struct, STRUCT, 0 +switch, SWITCH, 0 +typedef, TYPEDEF, 0 +union, UNION, 0 +unsigned, UNSIGNED, 0 +void, VOID, 0 +volatile, VOLATILE, 0 +while, WHILE, 0 +_code, _CODE, 1 +_eeprom, _EEPROM, 1 +_flash, _CODE, 1 +_generic, _GENERIC, 1 +_near, _NEAR, 1 +_sram, _XDATA, 1 +_xdata, _XDATA, 1 +_pdata, _PDATA, 1 +_idata, _IDATA, 1 +at, AT, 1 +bit, BIT, 1 +critical, CRITICAL, 1 +data, DATA, 1 +far, XDATA, 1 +eeprom, EEPROM, 1 +flash, CODE, 1 +idata, IDATA, 1 +nonbanked, NONBANKED, 1 +banked, BANKED, 1 +near, DATA, 1 +pdata, PDATA, 1 +reentrant, REENTRANT, 1 +sfr, SFR, 1 +sbit, SBIT, 1 +sram, XDATA, 1 +using, USING, 1 +code, CODE, 1 +xdata, XDATA, 1 +_data, _NEAR, 1 diff --git a/src/src.dsp b/src/src.dsp new file mode 100644 index 0000000..a5fae28 --- /dev/null +++ b/src/src.dsp @@ -0,0 +1,469 @@ +# Microsoft Developer Studio Project File - Name="src" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Console Application" 0x0103 + +CFG=src - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "src.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "src.mak" CFG="src - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "src - Win32 Debug" (based on "Win32 (x86) Console Application") +!MESSAGE "src - Win32 Release" (based on "Win32 (x86) Console Application") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "src - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /I "..\support\util" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /FR /FD /GZ /c +# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I "." /I ".." /I "..\support\util" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /FR /FD /GZ /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 mcs51\Debug\port.lib z80\Debug\port.lib avr\Debug\port.lib ds390\Debug\port.lib pic\Debug\port.lib /nologo /subsystem:console /debug /machine:I386 /out:"..\bin_vc\sdcc.exe" /pdbtype:sept +# ADD LINK32 mcs51\Debug\port.lib z80\Debug\port.lib avr\Debug\port.lib ds390\Debug\port.lib pic\Debug\port.lib /nologo /subsystem:console /debug /machine:I386 /out:"..\bin_vc\sdcc.exe" /pdbtype:sept + +!ELSEIF "$(CFG)" == "src - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Ignore_Export_Lib 0 +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP 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+SOURCE=.\regression\pointer1.c +# PROP Exclude_From_Build 1 +# End Source File +# Begin Source File + +SOURCE=.\regression\struct1.c +# PROP Exclude_From_Build 1 +# End Source File +# Begin Source File + +SOURCE=.\regression\sub.c +# PROP Exclude_From_Build 1 +# End Source File +# Begin Source File + +SOURCE=.\regression\TempTest.c +# PROP Exclude_From_Build 1 +# End Source File +# Begin Source File + +SOURCE=.\regression\while.c +# PROP Exclude_From_Build 1 +# End Source File +# End Group +# Begin Source File + +SOURCE=..\support\scripts\sdcc.ico +# End Source File +# End Target +# End Project diff --git a/src/version.awk b/src/version.awk new file mode 100644 index 0000000..081ef30 --- /dev/null +++ b/src/version.awk @@ -0,0 +1,26 @@ +BEGIN { +print "/*" +print " * version.h" +print " * control long build version number" +print " *" +print " * Created automatically with version.awk script" +print " *" +print " */" +print "" +print "#ifndef __VERSION_H__" +print "#define __VERSION_H__" +print "" + +FS="[ \t.]" +} + +/Revision/ { printf "#define SDCC_BUILD_NUMBER\t\"%s\"\n", $2 } + +END { +print "" +print "#ifndef SDCC_BUILD_NUMBER" +print "#define SDCC_BUILD_NUMBER \"0\"" +print "#endif" +print "" +print "#endif" +} diff --git a/src/xa51/Makefile.bcc b/src/xa51/Makefile.bcc new file mode 100644 index 0000000..8370b9f --- /dev/null +++ b/src/xa51/Makefile.bcc @@ -0,0 +1,23 @@ +# Makefile for Borlad C++ + +PRJDIR = ../.. + +OBJ = gen.obj ralloc.obj main.obj +LIB = port.lib + +!include $(PRJDIR)/Bcc.inc +CFLAGS = $(CFLAGS) -I.. -I$(PRJDIR) + +all: $(LIB) + +main.obj: main.c peeph.rul + +$(LIB): $(OBJ) + if exist $(LIB) del $(LIB) + tlib $@ @&&! ++$(**: = &^ ++) +! + +.def.rul: + gawk -f ../SDCCpeeph.awk $< > $@ diff --git a/src/xa51/Makefile.in b/src/xa51/Makefile.in new file mode 100644 index 0000000..dfb8a52 --- /dev/null +++ b/src/xa51/Makefile.in @@ -0,0 +1,7 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +# Make all in this directory +include $(srcdir)/../port.mk diff --git a/src/xa51/gen.c b/src/xa51/gen.c new file mode 100644 index 0000000..96ed8a4 --- /dev/null +++ b/src/xa51/gen.c @@ -0,0 +1,2157 @@ +/*------------------------------------------------------------------------- + SDCCgen51.c - source file for code generation for 8051 + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + and - Jean-Louis VERN.jlvern@writeme.com (1999) + Bug Fixes - Wojciech Stryjewski wstryj1@tiger.lsu.edu (1999 v2.1.9a) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + +-------------------------------------------------------------------------*/ + +//#define D(x) +#define D(x) x + +#include +#include +#include +#include +#include "SDCCglobl.h" +#include "newalloc.h" + +#include "common.h" +#include "SDCCpeeph.h" +#include "ralloc.h" +#include "gen.h" + +extern int allocInfo; + +/* this is the down and dirty file with all kinds of + kludgy & hacky stuff. This is what it is all about + CODE GENERATION for a specific MCU . some of the + routines may be reusable, will have to see */ + +static struct + { + short inLine; + short debugLine; + short stackExtend; + short nRegsSaved; + short parmsPushed; + set *sendSet; + } +_G; + +extern int xa51_ptrRegReq; +extern int xa51_nRegs; +extern struct dbuf_s *codeOutBuf; + +static lineNode *lineHead = NULL; +static lineNode *lineCurr = NULL; + +#define LSB 0 +#define MSB16 1 +#define MSB24 2 +#define MSB32 3 + +static char *MOV="mov"; +static char *MOVB="mov.b"; +static char *MOVW="mov.w"; +static char *MOVC="movc"; +static char *MOVCB="movc.b"; +static char *MOVCW="movc.w"; + +static char *R1L="r1l"; +static char *R1="r1"; + +void bailOut (char *mesg) { + fprintf (stderr, "%s: bailing out\n", mesg); + exit (1); +} + +/*-----------------------------------------------------------------*/ +/* emitcode - writes the code into a file : for now it is simple */ +/*-----------------------------------------------------------------*/ +static void emitcode (char *inst, char *fmt,...) { + va_list ap; + char lb[INITIAL_INLINEASM]; + char *lbp = lb; + + va_start (ap, fmt); + + if (inst && *inst) + { + if (fmt && *fmt) + sprintf (lb, "%s\t", inst); + else + sprintf (lb, "%s", inst); + vsprintf (lb + (strlen (lb)), fmt, ap); + } + else + vsprintf (lb, fmt, ap); + + while (isspace (*lbp)) + lbp++; + + if (lbp && *lbp) + lineCurr = (lineCurr ? + connectLine (lineCurr, newLineNode (lb)) : + (lineHead = newLineNode (lb))); + lineCurr->isInline = _G.inLine; + lineCurr->isDebug = _G.debugLine; + va_end (ap); +} + +/*-----------------------------------------------------------------*/ +/* xa51_emitDebuggerSymbol - associate the current code location */ +/* with a debugger symbol */ +/*-----------------------------------------------------------------*/ +void +xa51_emitDebuggerSymbol (char * debugSym) +{ + _G.debugLine = 1; + emitcode ("", "%s ==.", debugSym); + _G.debugLine = 0; +} + + +char *getStackOffset(int stack) { + static char gsoBuf[1024]; + sprintf (gsoBuf, "r7+(%d%+d%+d)", stack, + currFunc->stack, _G.nRegsSaved); + return gsoBuf; +} + +/*-----------------------------------------------------------------*/ +/* newAsmop - creates a new asmOp */ +/*-----------------------------------------------------------------*/ +static asmop * +newAsmop (short type) +{ + asmop *aop; + + aop = Safe_calloc (1, sizeof (asmop)); + aop->type = type; + return aop; +} + +char *aopTypeName(asmop *aop) { + switch (aop->type) + { + case AOP_LIT: return "lit"; + case AOP_REG: return "reg"; + case AOP_DIR: return "dir"; + case AOP_FAR: return "far"; + case AOP_CODE: return "code"; + case AOP_GPTR: return "gptr"; + case AOP_STK: return "stack"; + case AOP_IMMD: return "imm"; + case AOP_BIT: return "bit"; + } + return "unknown"; +} + +/*-----------------------------------------------------------------*/ +/* aopForSym - for a true symbol */ +/*-----------------------------------------------------------------*/ +static asmop *aopForSym(symbol *sym, + bool canUsePointer, bool canUseOffset) { + int size; + asmop *aop; + + sym->aop = aop = newAsmop(0); + size=aop->size=getSize(sym->type); + + // if the sym has registers + if (sym->nRegs && sym->regs[0]) { + aop->type=AOP_REG; + sprintf (aop->name[0], "%s", sym->regs[0]->name); + if (size > 2) { + sprintf (aop->name[1], "%s", sym->regs[1]->name); + } + return aop; + } + + // if it is on stack + if (sym->onStack) { + if (!canUsePointer || !canUseOffset) { + aop->type=AOP_REG; + switch (size) + { + case 1: + emitcode ("mov.b", "r0l,[%s] ;aopForSym:stack:1", getStackOffset(sym->stack)); + sprintf (aop->name[0], "r0l"); + return aop; + case 2: + emitcode ("mov.w", "r0,[%s] ;aopForSym:stack:2", getStackOffset(sym->stack)); + sprintf (aop->name[0], "r0"); + return aop; + case 3: + emitcode ("mov.w", "r0,[%s] ;aopForSym:stack:3.w", getStackOffset(sym->stack)); + sprintf (aop->name[0], "r0"); + emitcode ("mov.b", "r1l,[%s] ;aopForSym:stack:3.b", getStackOffset(sym->stack+2)); + sprintf (aop->name[1], "r1l"); + return aop; + case 4: + emitcode ("mov.w", "r0,[%s] ;aopForSym:stack:4", getStackOffset(sym->stack)); + sprintf (aop->name[0], "r0"); + emitcode ("mov.w", "r1,[%s] ;aopForSym:stack:4", getStackOffset(sym->stack+2)); + sprintf (aop->name[1], "r1"); + return aop; + } + } + aop->type=AOP_STK; + sprintf (aop->name[0], "[%s]", getStackOffset(sym->stack)); + if (size > 2) { + sprintf (aop->name[1], "[%s]", getStackOffset(sym->stack+2)); + } + return aop; + } + + // if it has a spillLoc + if (sym->usl.spillLoc) { + return aopForSym (sym->usl.spillLoc, canUsePointer, canUseOffset); + } + + // if in bit space + if (IN_BITSPACE(SPEC_OCLS(sym->etype))) { + aop->type=AOP_BIT; + sprintf (aop->name[0], "%s", sym->rname); + return aop; + } + + // if in direct space + if (IN_DIRSPACE(SPEC_OCLS(sym->etype))) { + aop->type=AOP_DIR; + sprintf (aop->name[0], "%s", sym->rname); + if (size>2) { + sprintf (aop->name[1], "%s+2", sym->rname); + } + return aop; + } + + // if in code space + if (IN_CODESPACE(SPEC_OCLS(sym->etype))) { + if (!canUsePointer) { + aop->type=AOP_REG; + switch (size) + { + case 1: + emitcode (MOV, "r0,#%s", sym->rname); + emitcode (MOVC, "r0l,[r0+]"); + sprintf (aop->name[0], "r0l"); + return aop; + case 2: + emitcode (MOV, "r0,#%s", sym->rname); + emitcode (MOVC, "r0,[r0+]"); + sprintf (aop->name[0], "r0"); + return aop; + case 3: + emitcode (MOV, "r0,#%s", sym->rname); + emitcode (MOVC, "r0,[r0+]"); + sprintf (aop->name[1], "r0"); + emitcode (MOV, "r1l,[r0+]"); + sprintf (aop->name[0], "r1l"); + return aop; + case 4: + emitcode (MOV, "r0,#%s", sym->rname); + emitcode (MOVC, "r1,[r0+]"); + emitcode (MOVC, "r0,[r0+]"); + emitcode ("xch", "r0,r1"); + sprintf (aop->name[0], "r0"); + sprintf (aop->name[1], "r1"); + return aop; + } + + } else { + aop->type=AOP_CODE; + emitcode ("mov", "r0,#%s ; aopForSym:code", sym->rname); + sprintf (aop->name[0], "[r0]"); + if (size>2) { + sprintf (aop->name[1], "[r0+2]"); + } + } + return aop; + } + + // if in far space + if (IN_FARSPACE(SPEC_OCLS(sym->etype))) { + if (!canUsePointer) { + aop->type=AOP_REG; + switch (size) + { + case 1: + emitcode (MOV, "r0,#%s", sym->rname); + emitcode (MOV, "r0l,[r0]"); + sprintf (aop->name[0], "r0l"); + return aop; + case 2: + emitcode (MOV, "r0,#%s", sym->rname); + emitcode (MOV, "r0,[r0]"); + sprintf (aop->name[0], "r0"); + return aop; + case 3: + emitcode (MOV, "r0,#%s", sym->rname); + emitcode (MOV, "r1l,[r0+2]"); + sprintf (aop->name[1], "r1l"); + emitcode (MOV, "r0,[r0]"); + sprintf (aop->name[0], "r0"); + return aop; + case 4: + emitcode (MOV, "r0,#%s", sym->rname); + emitcode (MOV, "r1,[r0+2]"); + sprintf (aop->name[1], "r1"); + emitcode (MOV, "r0,[r0]"); + sprintf (aop->name[0], "r0"); + return aop; + } + } else { + aop->type=AOP_FAR; + emitcode ("mov.w", "r0,#%s ; aopForSym:far", sym->rname); + sprintf (aop->name[0], "[r0]"); + if (size>2) { + sprintf (aop->name[1], "[r0+2]"); + } + return aop; + } + } + + bailOut("aopForSym"); + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* aopForVal - for a value */ +/*-----------------------------------------------------------------*/ +static asmop *aopForVal(operand *op) { + asmop *aop; + + if (IS_OP_LITERAL(op)) { + op->aop = aop = newAsmop (AOP_LIT); + switch ((aop->size=getSize(operandType(op)))) + { + case 1: + sprintf (aop->name[0], "#0x%02x", + SPEC_CVAL(operandType(op)).v_int & 0xff); + sprintf (aop->name[1], "#0"); + break; + case 2: + sprintf (aop->name[0], "#0x%04x", + SPEC_CVAL(operandType(op)).v_int & 0xffff); + sprintf (aop->name[1], "#0"); + break; + case 3: + // must be a generic pointer, can only be zero + // ?? if (v!=0) fprintf (stderr, "invalid val op for gptr\n"); exit(1); + sprintf (aop->name[0], "#0x%04x", + SPEC_CVAL(operandType(op)).v_uint & 0xffff); + sprintf (aop->name[1], "#0"); + break; + case 4: + sprintf (aop->name[0], "#0x%04x", + SPEC_CVAL(operandType(op)).v_ulong & 0xffff); + sprintf (aop->name[1], "#0x%04x", + SPEC_CVAL(operandType(op)).v_ulong >> 16); + break; + default: + bailOut("aopForVal"); + } + return aop; + } + + // must be immediate + if (IS_SYMOP(op)) { + op->aop = aop = newAsmop (AOP_IMMD); + switch ((aop->size=getSize(OP_SYMBOL(op)->type))) + { + case 1: + case 2: + sprintf (aop->name[0], "#%s", OP_SYMBOL(op)->rname); + return aop; + case 3: // generic pointer + sprintf (aop->name[0], "#0x%02x", DCL_TYPE(operandType(op))); + sprintf (aop->name[1], "#%s", OP_SYMBOL(op)->rname); + return aop; + } + } + + bailOut ("aopForVal: unknown type"); + return NULL; +} + +static int aopOp(operand *op, + bool canUsePointer, bool canUseOffset) { + + if (IS_SYMOP(op)) { + op->aop=aopForSym (OP_SYMBOL(op), canUsePointer, canUseOffset); + return AOP_SIZE(op); + } + if (IS_VALOP(op)) { + op->aop=aopForVal (op); + return AOP_SIZE(op); + } + + bailOut("aopOp: unexpected operand"); + return 0; +} + +bool aopEqual(asmop *aop1, asmop *aop2, int offset) { + if (strcmp(aop1->name[offset], aop2->name[offset])) { + return FALSE; + } + return TRUE; +} + +bool aopIsDir(operand *op) { + return AOP_TYPE(op)==AOP_DIR; +} + +bool aopIsBit(operand *op) { + return AOP_TYPE(op)==AOP_BIT; +} + +bool aopIsPtr(operand *op) { + if (AOP_TYPE(op)==AOP_STK || + AOP_TYPE(op)==AOP_CODE || + AOP_TYPE(op)==AOP_FAR) { + return TRUE; + } else { + return FALSE; + } +} + +char *opRegName(operand *op, int offset, char *opName, bool decorate) { + + if (IS_SYMOP(op)) { + if (OP_SYMBOL(op)->onStack) { + sprintf (opName, "[%s]", getStackOffset(OP_SYMBOL(op)->stack)); + return opName; + } + if (IS_TRUE_SYMOP(op)) + return OP_SYMBOL(op)->rname; + else if (OP_SYMBOL(op)->regs[offset]) + return OP_SYMBOL(op)->regs[offset]->name; + else + bailOut("opRegName: unknown regs"); + } + + if (IS_VALOP(op)) { + switch (SPEC_NOUN(OP_VALUE(op)->type)) { + case V_SBIT: + case V_BIT: + if (SPEC_CVAL(OP_VALUE(op)->type).v_int && + SPEC_CVAL(OP_VALUE(op)->type).v_int != 1) { + bailOut("opRegName: invalid bit value"); + } + // fall through + case V_CHAR: + sprintf (opName, "#%s0x%02x", decorate?"(char)":"", + SPEC_CVAL(OP_VALUE(op)->type).v_int); + break; + case V_INT: + if (SPEC_LONG(OP_VALUE(op)->type)) { + sprintf (opName, "#%s0x%02x", decorate?"(long)":"", + SPEC_CVAL(OP_VALUE(op)->type).v_long); + } else { + sprintf (opName, "#%s0x%02x", decorate?"(int)":"", + SPEC_CVAL(OP_VALUE(op)->type).v_int); + } + break; + case V_FLOAT: + sprintf (opName, "#%s%f", decorate?"(float)":"", + SPEC_CVAL(OP_VALUE(op)->type).v_float); + break; + default: + bailOut("opRegName: unexpected noun"); + } + return opName; + } + bailOut("opRegName: unexpected operand type"); + return NULL; +} + +char * printOp (operand *op) { + static char line[132]; + sym_link *optype=operandType(op); + bool isPtr = IS_PTR(optype); + + if (IS_SYMOP(op)) { + symbol *sym=OP_SYMBOL(op); + if (!sym->regs[0] && SYM_SPIL_LOC(sym)) { + sym=SYM_SPIL_LOC(sym); + } + if (isPtr) { + sprintf (line, "["); + if (DCL_TYPE(optype)==FPOINTER) + strcat (line, "far * "); + else if (DCL_TYPE(optype)==CPOINTER) + strcat (line, "code * "); + else if (DCL_TYPE(optype)==GPOINTER) + strcat (line, "gen * "); + else if (DCL_TYPE(optype)==POINTER) + strcat (line, "near * "); + else + strcat (line, "unknown * "); + strcat (line, "("); + strcat (line, nounName(sym->etype)); + strcat (line, ")"); + strcat (line, sym->name); + strcat (line, "]:"); + } else { + sprintf (line, "(%s)%s:", nounName(sym->etype), sym->name); + } + if (sym->regs[0]) { + strcat (line, sym->regs[0]->name); + if (sym->regs[1]) { + strcat (line, ","); + strcat (line, sym->regs[1]->name); + } + return line; + } + if (sym->onStack) { + sprintf (line+strlen(line), "stack%+d", sym->stack); + return line; + } + if (IN_CODESPACE(SPEC_OCLS(sym->etype))) { + strcat (line, "code"); + return line; + } + if (IN_FARSPACE(SPEC_OCLS(sym->etype))) { + strcat (line, "far"); + return line; + } + if (IN_BITSPACE(SPEC_OCLS(sym->etype))) { + strcat (line, "bit"); + return line; + } + if (IN_DIRSPACE(SPEC_OCLS(sym->etype))) { + strcat (line, "dir"); + return line; + } + strcat (line, "unknown"); + return line; + } else if (IS_VALOP(op)) { + opRegName(op, 0, line, 1); + } else if (IS_TYPOP(op)) { + sprintf (line, "("); + if (isPtr) { + if (DCL_TYPE(optype)==FPOINTER) + strcat (line, "far * "); + else if (DCL_TYPE(optype)==CPOINTER) + strcat (line, "code * "); + else if (DCL_TYPE(optype)==GPOINTER) + strcat (line, "gen * "); + else if (DCL_TYPE(optype)==POINTER) + strcat (line, "near * "); + else + strcat (line, "unknown * "); + } + // forget about static, volatile, ... for now + if (SPEC_USIGN(operandType(op))) strcat (line, "unsigned "); + if (SPEC_LONG(operandType(op))) strcat (line, "long "); + strcat (line, nounName(operandType(op))); + strcat (line, ")"); + } else { + bailOut("printOp: unexpected operand type"); + } + return line; +} + +void printIc (bool printToStderr, + char *op, iCode * ic, bool result, bool left, bool right) { + char line[132]; + + sprintf (line, "%s(%d)", op, ic->lineno); + if (result) { + strcat (line, " result="); + strcat (line, printOp (IC_RESULT(ic))); + } + if (left) { + strcat (line, " left="); + strcat (line, printOp (IC_LEFT(ic))); + } + if (right) { + strcat (line, " right="); + strcat (line, printOp (IC_RIGHT(ic))); + } + emitcode (";", line); + if (printToStderr) { + fprintf (stderr, "%s\n", line); + } +} + +/*-----------------------------------------------------------------*/ +/* toBoolean - return carry for operand!=0 */ +/*-----------------------------------------------------------------*/ +static char *toBoolean (operand * op) { + symbol *tlbl=newiTempLabel(NULL); + + switch (AOP_SIZE(op)) + { + case 1: + case 2: + emitcode ("cjne", "%s,#1,%05d$; %s", AOP_NAME(op), tlbl->key+100, + "This needs a second thought"); + + emitcode ("", "%05d$:", tlbl->key+100); + return "c"; + } + + bailOut("toBoolean: unknown size"); + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* regsInCommon - two operands have some registers in common */ +/*-----------------------------------------------------------------*/ +static bool regsInCommon (operand * op1, operand * op2) { + symbol *sym1, *sym2; + int i; + + /* if they have registers in common */ + if (!IS_SYMOP (op1) || !IS_SYMOP (op2)) + return FALSE; + + sym1 = OP_SYMBOL (op1); + sym2 = OP_SYMBOL (op2); + + if (sym1->nRegs == 0 || sym2->nRegs == 0) + return FALSE; + + for (i = 0; i < sym1->nRegs; i++) + { + int j; + if (!sym1->regs[i]) + continue; + + for (j = 0; j < sym2->nRegs; j++) + { + if (!sym2->regs[j]) + continue; + + if (sym2->regs[j] == sym1->regs[i]) + return TRUE; + } + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* resultRemat - result is rematerializable */ +/*-----------------------------------------------------------------*/ +static int resultRemat (iCode * ic) { + if (SKIP_IC (ic) || ic->op == IFX) + return 0; + + if (IC_RESULT (ic) && IS_ITEMP (IC_RESULT (ic))) + { + symbol *sym = OP_SYMBOL (IC_RESULT (ic)); + if (sym->remat && !POINTER_SET (ic)) + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* genNot - generate code for ! operation */ +/*-----------------------------------------------------------------*/ +static void genNot (iCode * ic) { + printIc (0, "genNot:", ic, 1,1,0); +} + +/*-----------------------------------------------------------------*/ +/* genCpl - generate code for complement */ +/*-----------------------------------------------------------------*/ +static void genCpl (iCode * ic) { + printIc (0, "genCpl", ic, 1,1,0); +} + +/*-----------------------------------------------------------------*/ +/* genUminus - unary minus code generation */ +/*-----------------------------------------------------------------*/ +static void genUminus (iCode * ic) { + printIc (0, "genUminus", ic, 1,1,0); +} + +/*-----------------------------------------------------------------*/ +/* genIpush - generate code for pushing */ +/*-----------------------------------------------------------------*/ +static void genIpush (iCode * ic) { + operand *left=IC_LEFT(ic); + + printIc (0, "genIpush", ic, 0,1,0); + aopOp(left,FALSE,FALSE); + + + if (AOP_TYPE(left)==AOP_LIT) { + switch (AOP_SIZE(left)) + { + case 1: + emitcode ("mov", "r1l,%s", AOP_NAME(left)[0]); + emitcode ("push", "r1l"); + _G.parmsPushed++; + return; + case 2: + emitcode ("mov", "r1,%s", AOP_NAME(left)[0]); + emitcode ("push", "r1"); + _G.parmsPushed++; + return; + case 3: + emitcode ("mov", "r1l,%s", AOP_NAME(left)[1]); + emitcode ("push", "r1l"); + emitcode ("mov", "r1,%s", AOP_NAME(left)[0]); + emitcode ("push", "r1"); + _G.parmsPushed += 2; + return; + case 4: + emitcode ("mov", "r1,%s", AOP_NAME(left)[1]); + emitcode ("push", "r1"); + emitcode ("mov", "r1,%s", AOP_NAME(left)[0]); + emitcode ("push", "r1"); + _G.parmsPushed += 2; + return; + } + } else { + if (AOP_SIZE(left)>2) { + emitcode ("push", "%s", AOP_NAME(left)[1]); + _G.parmsPushed++; + } + emitcode ("push", "%s", AOP_NAME(left)[0]); + _G.parmsPushed++; + } +} + +/*-----------------------------------------------------------------*/ +/* genIpop - recover the registers: can happen only for spilling */ +/*-----------------------------------------------------------------*/ +static void genIpop (iCode * ic) { + printIc (0, "genIpop", ic, 0,1,0); +} + +/*-----------------------------------------------------------------*/ +/* genCall - generates a call statement */ +/*-----------------------------------------------------------------*/ +static void genCall (iCode * ic) { + operand *result=IC_RESULT(ic); + + emitcode (";", "genCall(%d) %s result=%s", ic->lineno, + OP_SYMBOL(IC_LEFT(ic))->name, + printOp (IC_RESULT(ic))); + emitcode ("call", "%s", OP_SYMBOL(IC_LEFT(ic))->rname); + + /* readjust the stack if we have pushed some parms */ + if (_G.parmsPushed) { + emitcode ("add", "r7,#0x%02x", _G.parmsPushed*2); + _G.parmsPushed=0; + } + + /* if we need to assign a result value */ + if (IS_ITEMP (IC_RESULT(ic)) && + OP_SYMBOL (IC_RESULT (ic))->nRegs) { + aopOp(result,FALSE,FALSE); + switch (AOP_SIZE(result)) + { + case 1: + emitcode ("mov", "%s,r0l", AOP_NAME(result)[0]); + return; + case 2: + emitcode ("mov", "%s,r0", AOP_NAME(result)[0]); + return; + case 3: + // generic pointer + emitcode ("mov", "%s,r1l", AOP_NAME(result)[1]); + emitcode ("mov", "%s,r0", AOP_NAME(result)[0]); + return; + case 4: + emitcode ("mov", "%s,r1", AOP_NAME(result)[1]); + emitcode ("mov", "%s,r0", AOP_NAME(result)[0]); + return; + } + bailOut("genCall"); + } +} + +/*-----------------------------------------------------------------*/ +/* genPcall - generates a call by pointer statement */ +/*-----------------------------------------------------------------*/ +static void +genPcall (iCode * ic) +{ + emitcode (";", "genPcall %s\n", OP_SYMBOL(IC_LEFT(ic))->name); +} + +/*-----------------------------------------------------------------*/ +/* genFunction - generated code for function entry */ +/*-----------------------------------------------------------------*/ +static void genFunction (iCode * ic) { + symbol *sym=OP_SYMBOL(IC_LEFT(ic)); + sym_link *type=sym->type; + + emitcode (";", "genFunction %s", sym->rname); + + /* print the allocation information */ + printAllocInfo (currFunc, codeOutBuf); + + emitcode ("", "%s:", sym->rname); + + if (IFFUNC_ISNAKED(type)) + { + emitcode(";", "naked function: no prologue."); + return; + } + + /* adjust the stack for locals used in this function */ + if (sym->stack) { + emitcode ("sub", "r7,#%d\t; create stack space for locals", sym->stack); + } +} + +/*-----------------------------------------------------------------*/ +/* genEndFunction - generates epilogue for functions */ +/*-----------------------------------------------------------------*/ +static void +genEndFunction (iCode * ic) +{ + symbol *sym = OP_SYMBOL (IC_LEFT (ic)); + + printIc (0, "genEndFunction", ic, 0,0,0); + + if (IFFUNC_ISNAKED(sym->type)) { + emitcode(";", "naked function: no epilogue."); + if (options.debug && currFunc) + debugFile->writeEndFunction (currFunc, ic, 0); + return; + } + + /* readjust the stock for locals used in this function */ + if (sym->stack) { + emitcode ("add", "r7,#%d\t; release stack space for locals", sym->stack); + } + + if (options.debug && currFunc) { + debugFile->writeEndFunction (currFunc, ic, 1); + } + + if (IFFUNC_ISISR(sym->type)) { + emitcode ("reti", ""); + } else { + emitcode ("ret", ""); + } +} + +/*-----------------------------------------------------------------*/ +/* genRet - generate code for return statement */ +/*-----------------------------------------------------------------*/ +static void genRet (iCode * ic) { + + if (!IC_LEFT(ic)) { + printIc (0, "genRet", ic, 0, 0, 0); + } else { + printIc (0, "genRet", ic, 0, 1, 0); + aopOp(IC_LEFT(ic), TRUE, TRUE); + switch (AOP_SIZE(IC_LEFT(ic))) + { + case 4: + emitcode ("mov", "r1,%s", AOP_NAME(IC_LEFT(ic))[1]); + emitcode ("mov", "r0,%s", AOP_NAME(IC_LEFT(ic))[0]); + break; + case 3: + emitcode ("mov", "r1l,%s", AOP_NAME(IC_LEFT(ic))[1]); + // fall through + case 2: + emitcode ("mov", "r0,%s", AOP_NAME(IC_LEFT(ic))[0]); + break; + case 1: + emitcode ("mov", "r0l,%s", AOP_NAME(IC_LEFT(ic))[0]); + break; + default: + bailOut("genRet"); + } + } + + emitcode ("jmp", "%05d$", returnLabel->key+100); +} + +/*-----------------------------------------------------------------*/ +/* genLabel - generates a label */ +/*-----------------------------------------------------------------*/ +static void genLabel (iCode * ic) { + /* special case never generate */ + if (IC_LABEL (ic) == entryLabel) + return; + + emitcode (";", "genLabel(%d) %s", ic->lineno, IC_LABEL(ic)->name); + emitcode ("", "%05d$:", (IC_LABEL (ic)->key + 100)); +} + +/*-----------------------------------------------------------------*/ +/* genGoto - generates a jmp */ +/*-----------------------------------------------------------------*/ +static void genGoto (iCode * ic) { + emitcode (";", "genGoto(%d) %s", ic->lineno, IC_LABEL(ic)->name); + emitcode ("jmp", "%05d$", (IC_LABEL (ic)->key + 100)); +} + +/*-----------------------------------------------------------------*/ +/* genPlus - generates code for addition */ +/*-----------------------------------------------------------------*/ +static void genPlus (iCode * ic) { + operand *result=IC_RESULT(ic), *left=IC_LEFT(ic), *right=IC_RIGHT(ic); + int size; + char *instr; + + printIc (0, "genPlus", ic, 1,1,1); + + size=aopOp(result, TRUE, TRUE); + + /* if left is a literal, then exchange them */ + if (IS_LITERAL(operandType(left))) { + operand *tmp = right; + right = left; + left = tmp; + } + + if (aopIsBit(result)) { + if (IS_LITERAL(operandType(right))) { + if (operandLitValue(right)) { + emitcode ("setb", AOP_NAME(result)[0]); + return; + } + aopOp(left, TRUE, TRUE); + emitcode ("mov", "%s,%s", AOP_NAME(result)[0], toBoolean(left)); + return; + } + bailOut("genPlus: unfinished genPlus bit"); + } + + aopOp(left, !aopIsPtr(result), !aopIsDir(result)); + aopOp(right, !aopIsPtr(result), !aopIsDir(result)); + + // special case for "* = * + char", needs a closer look + // heck, this shouldn't have come here but bug-223113 does + if (size==3 && AOP_SIZE(right)==1) { + emitcode ("mov", "r1l,%s", AOP_NAME(right)[0]); + emitcode ("mov", "r1h,#0"); // ptr arith unsigned???????????? + emitcode ("mov", "%s,%s", AOP_NAME(result)[0], AOP_NAME(left)[0]); + emitcode ("add.w", "%s,r1", AOP_NAME(result)[0]); + emitcode ("mov", "%s,%s", AOP_NAME(result)[1], AOP_NAME(left)[1]); + return; + } + + // special case for "xdata * = xdata * + char", needs a closer look + // heck, this shouldn't have come here but bug-441448 does + if (size==2 && AOP_SIZE(right)==1) { + emitcode ("mov", "r1l,%s", AOP_NAME(right)[0]); + emitcode ("mov", "r1h,#0"); // ptr arith unsigned???????????? + emitcode ("mov", "%s,%s", AOP_NAME(result)[0], AOP_NAME(left)[0]); + emitcode ("add.w", "%s,r1", AOP_NAME(result)[0]); + return; + } + + if (size>1) { + instr="add.w"; + } else { + instr="add.b"; + } + if (!aopEqual(result->aop, left->aop, 0)) { + emitcode ("mov", "%s,%s", AOP_NAME(result)[0], AOP_NAME(left)[0]); + } + emitcode (instr, "%s,%s", AOP_NAME(result)[0], AOP_NAME(right)[0]); + if (size>2) { + if (!aopEqual(result->aop, left->aop, 1)) { + emitcode ("mov", "%s,%s", AOP_NAME(result)[1], AOP_NAME(left)[1]); + } + if (size==3) { + // generic pointer + } else { + emitcode ("addc.w", "%s,%s", AOP_NAME(result)[1], AOP_NAME(right)[1]); + } + } + return; +} + +/*-----------------------------------------------------------------*/ +/* genMinus - generates code for subtraction */ +/*-----------------------------------------------------------------*/ +static void genMinus (iCode * ic) { + operand *result=IC_RESULT(ic), *left=IC_LEFT(ic), *right=IC_RIGHT(ic); + int size; + char *instr; + + printIc (0, "genMinus", ic, 1,1,1); + + size=aopOp(result, TRUE, TRUE); + + /* if left is a literal, then exchange them */ + if (IS_LITERAL(operandType(left))) { + operand *tmp = right; + right = left; + left = tmp; + } + + if (aopIsBit(result)) { + if (IS_LITERAL(operandType(right))) { + if (operandLitValue(right)) { + emitcode ("clr", AOP_NAME(result)[0]); + return; + } + aopOp(left, TRUE, TRUE); + emitcode ("mov", "%s,%s", AOP_NAME(result)[0], toBoolean(left)); + return; + } + bailOut("genPlus: unfinished genPlus bit"); + } + + if (isOperandEqual(result,left)) { + left->aop=result->aop; + } else { + aopOp(left, !aopIsPtr(result), !aopIsDir(result)); + } + aopOp(right, !aopIsPtr(result), !aopIsDir(result)); + + if (size>1) { + instr="sub.w"; + } else { + instr="sub.b"; + } + if (!aopEqual(result->aop, left->aop, 0)) { + emitcode ("mov", "%s,%s", AOP_NAME(result)[0], AOP_NAME(left)[0]); + } + emitcode (instr, "%s,%s", AOP_NAME(result)[0], AOP_NAME(right)[0]); + if (size>2) { + if (!aopEqual(result->aop, left->aop, 1)) { + emitcode ("mov", "%s,%s", AOP_NAME(result)[1], AOP_NAME(left)[1]); + } + if (size==3) { + // generic pointer + } else { + emitcode ("subb.w", "%s,%s", AOP_NAME(result)[1], AOP_NAME(right)[1]); + } + } + return; +} + +/*-----------------------------------------------------------------*/ +/* genMult - generates code for multiplication */ +/*-----------------------------------------------------------------*/ +static void genMult (iCode * ic) { + printIc (0, "genMult", ic, 1,1,1); +} + +/*-----------------------------------------------------------------*/ +/* genDiv - generates code for division */ +/*-----------------------------------------------------------------*/ +static void genDiv (iCode * ic) { + printIc (0, "genDiv", ic, 1,1,1); +} + +/*-----------------------------------------------------------------*/ +/* genMod - generates code for division */ +/*-----------------------------------------------------------------*/ +static void genMod (iCode * ic) { + printIc (0, "genMod", ic, 1,1,1); +} + +/*-----------------------------------------------------------------*/ +/* ifxForOp - returns the icode containing the ifx for operand */ +/*-----------------------------------------------------------------*/ +static iCode *ifxForOp (operand * op, iCode * ic) { + /* if true symbol then needs to be assigned */ + if (IS_TRUE_SYMOP (op)) + return NULL; + + /* if this has register type condition and + the next instruction is ifx with the same operand + and live to of the operand is upto the ifx only then */ + if (ic->next && + ic->next->op == IFX && + IC_COND (ic->next)->key == op->key && + OP_SYMBOL (op)->liveTo <= ic->next->seq) + return ic->next; + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* genCmp - compares whatever */ +/*-----------------------------------------------------------------*/ +static void genCmp (iCode * ic, char *trueInstr, char *falseInstr) { + iCode *ifx=ifxForOp(IC_RESULT(ic),ic); + operand *left=IC_LEFT(ic), *right=IC_RIGHT(ic); + int size; + bool isTrue; + char *instr; + int jlbl; + + + size=aopOp(left, TRUE, TRUE); + aopOp(right, !aopIsPtr(left), TRUE); + + if (size==1) { + instr="cmp.b"; + } else { + instr="cmp.w"; + } + + if (IC_TRUE(ifx)) { + isTrue=TRUE; + jlbl=IC_TRUE(ifx)->key+100; + } else { + isTrue=FALSE; + jlbl=IC_FALSE(ifx)->key+100; + } + + if (!ifx) { + aopOp(IC_RESULT(ic), !aopIsPtr(left), TRUE); + jlbl=newiTempLabel(NULL)->key+100; + emitcode("mov", "%s,#-1", AOP_NAME(IC_RESULT(ic))[0]); + emitcode(instr, "%s,%s", AOP_NAME(left)[0], AOP_NAME(right)[0]); + emitcode(isTrue ? trueInstr : falseInstr, "%05d$", jlbl); + emitcode("cpl", "%s", AOP_NAME(IC_RESULT(ic))[0]); + emitcode("", "%05d$:", jlbl); + } else { + emitcode(instr, "%s,%s", AOP_NAME(left)[0], AOP_NAME(right)[0]); + emitcode(isTrue ? trueInstr : falseInstr, "%05d$", jlbl); + ifx->generated=1; + } + + if (size>2) { + bailOut("genCmp: size > 2"); + } + +} + +/*-----------------------------------------------------------------*/ +/* genCmpEq :- generates code for equal to */ +/*-----------------------------------------------------------------*/ +static void genCmpEq (iCode * ic) { + printIc (0, "genCmpEq", ic, 0,1,1); + genCmp(ic, "beq", "bne"); // no sign +} + +/*-----------------------------------------------------------------*/ +/* genCmpGt :- greater than comparison */ +/*-----------------------------------------------------------------*/ +static void genCmpGt (iCode * ic) { + printIc (0, "genCmpGt", ic, 0,1,1); + if (SPEC_USIGN(operandType(IC_LEFT(ic))) || + SPEC_USIGN(operandType(IC_RIGHT(ic)))) { + genCmp(ic, "bg", "bl"); // unsigned + } else { + genCmp(ic, "bgt", "ble"); // signed + } +} + +/*-----------------------------------------------------------------*/ +/* genCmpLt - less than comparisons */ +/*-----------------------------------------------------------------*/ +static void genCmpLt (iCode * ic) { + printIc (0, "genCmpLt", ic, 0,1,1); + if (SPEC_USIGN(operandType(IC_LEFT(ic))) || + SPEC_USIGN(operandType(IC_RIGHT(ic)))) { + genCmp(ic, "bcs", "bcc"); // unsigned + } else { + genCmp(ic, "blt", "bge"); // signed + } +} + +/*-----------------------------------------------------------------*/ +/* hasInc - operand is incremented before any other use */ +/*-----------------------------------------------------------------*/ +static iCode *hasInc (operand *op, iCode *ic, int osize) { + sym_link *type = operandType(op); + sym_link *retype = getSpec (type); + iCode *lic = ic->next; + int isize ; + + /* this could from a cast, e.g.: "(char xdata *) 0x7654;" */ + if (!IS_SYMOP(op)) return NULL; + + if (IS_BITVAR(retype)||!IS_PTR(type)) return NULL; + if (IS_AGGREGATE(type->next)) return NULL; + if (osize != (isize = getSize(type->next))) return NULL; + + while (lic) { + /* if operand of the form op = op + */ + if (lic->op == '+') { + if (isOperandEqual(IC_LEFT(lic),op) && + //isOperandEqual(IC_RESULT(lic),op) && + isOperandLiteral(IC_RIGHT(lic)) && + operandLitValue(IC_RIGHT(lic)) == isize) { + emitcode (";", "Found hasInc"); + return lic; + } + } + /* if the operand used or deffed */ + if (bitVectBitValue(OP_USES(op),lic->key) || lic->defKey == op->key) { + return NULL; + } + /* if GOTO or IFX */ + if (lic->op == IFX || lic->op == GOTO || lic->op == LABEL) break; + lic = lic->next; + } + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* genAndOp - for && operation */ +/*-----------------------------------------------------------------*/ +static void genAndOp (iCode * ic) { + printIc (0, "genAndOp(&&)", ic, 1,1,1); +} + +/*-----------------------------------------------------------------*/ +/* genOrOp - for || operation */ +/*-----------------------------------------------------------------*/ +static void genOrOp (iCode * ic) { + printIc (0, "genOrOp(||)", ic, 1,1,1); +} + +/*-----------------------------------------------------------------*/ +/* genAnd - code for and */ +/*-----------------------------------------------------------------*/ +static void genAnd (iCode * ic, iCode * ifx) { + printIc (0, "genAnd", ic, 1,1,1); +} + +/*-----------------------------------------------------------------*/ +/* genOr - code for or */ +/*-----------------------------------------------------------------*/ +static void genOr (iCode * ic, iCode * ifx) { + operand *result=IC_RESULT(ic), *left=IC_LEFT(ic), *right=IC_RIGHT(ic); + int size; + char *instr; + + printIc (0, "genOr", ic, 1,1,1); + + size=aopOp(result, TRUE, TRUE); + + /* if left is a literal, then exchange them */ + if (IS_LITERAL(operandType(left))) { + operand *tmp = right; + right = left; + left = tmp; + } + + if (aopIsBit(result)) { + if (IS_LITERAL(operandType(right))) { + if (operandLitValue(right)) { + emitcode ("setb", AOP_NAME(result)[0]); + return; + } + aopOp(left, TRUE, TRUE); + emitcode ("mov", "%s,%s", AOP_NAME(result)[0], toBoolean(left)); + return; + } + } + + aopOp(left, !aopIsPtr(result), !aopIsDir(result)); + aopOp(right, !aopIsPtr(result), !aopIsDir(result)); + + if (size>1) { + instr="or.w"; + } else { + instr="or.b"; + } + if (!aopEqual(result->aop, left->aop, 0)) { + emitcode ("mov", "%s,%s", AOP_NAME(result)[0], AOP_NAME(left)[0]); + } + emitcode (instr, "%s,%s", AOP_NAME(result)[0], AOP_NAME(right)[0]); + if (size>2) { + if (!aopEqual(result->aop, left->aop, 1)) { + emitcode ("mov", "%s,%s", AOP_NAME(result)[1], AOP_NAME(left)[1]); + } + emitcode (instr, "%s,%s", AOP_NAME(result)[1], AOP_NAME(right)[1]); + } + return; +} + +/*-----------------------------------------------------------------*/ +/* genXor - code for xclusive or */ +/*-----------------------------------------------------------------*/ +static void genXor (iCode * ic, iCode * ifx) { + printIc (0, "genXor", ic, 1,1,1); +} + +/*-----------------------------------------------------------------*/ +/* genInline - write the inline code out */ +/*-----------------------------------------------------------------*/ +static void genInline (iCode * ic) { + + printIc (0, "genInline", ic, 0,0,0); + + emitcode ("", IC_INLINE(ic)); +} + +/*-----------------------------------------------------------------*/ +/* genRRC - rotate right with carry */ +/*-----------------------------------------------------------------*/ +static void genRRC (iCode * ic) { + printIc (0, "genRRC", ic, 1,1,0); +} + +/*-----------------------------------------------------------------*/ +/* genRLC - generate code for rotate left with carry */ +/*-----------------------------------------------------------------*/ +static void genRLC (iCode * ic) { + printIc (0, "genRLC", ic, 1,1,0); +} + +/*-----------------------------------------------------------------*/ +/* genGetHbit - generates code get highest order bit */ +/*-----------------------------------------------------------------*/ +static void genGetHbit (iCode * ic) { + printIc (0, "genGetHbit", ic, 1,1,0); +} + +/*-----------------------------------------------------------------*/ +/* genLeftShift - generates code for left shifting */ +/*-----------------------------------------------------------------*/ +static void genLeftShift (iCode * ic) { + printIc (0, "genLeftShift", ic, 1,1,1); +} + +/*-----------------------------------------------------------------*/ +/* genRightShift - generate code for right shifting */ +/*-----------------------------------------------------------------*/ +static void genRightShift (iCode * ic) { + printIc (0, "genRightShift", ic, 1,1,1); +} + +/*-----------------------------------------------------------------*/ +/* genPointerGet - generate code for pointer get */ +/*-----------------------------------------------------------------*/ +static void genPointerGet (iCode * ic, iCode *pi) { + char *instr, *scratchReg; + operand *result=IC_RESULT(ic), *left=IC_LEFT(ic); + bool codePointer=IS_CODEPTR(operandType(left)); + int size; + + if (pi) { + printIc (0, "genPointerGet pi", ic, 1,1,0); + } else { + printIc (0, "genPointerGet", ic, 1,1,0); + } + + if (!IS_PTR(operandType(left))) { + bailOut ("genPointerGet: pointer required"); + } + + aopOp(left,FALSE,FALSE); + size=aopOp(result,TRUE,aopIsDir(left)); + + if (IS_GENPTR(operandType(left))) { + symbol *tlbl1=newiTempLabel(NULL); + symbol *tlbl2=newiTempLabel(NULL); + emitcode ("cmp", "%s,#0x%02x", AOP_NAME(left)[1], CPOINTER); + emitcode ("beq", "%05d$", tlbl1->key+100); + // far/near pointer + if (pi) { + emitcode ("mov", "%s,[%s+]", AOP_NAME(result)[0], AOP_NAME(left)[0]); + pi->generated=1; + } else { + emitcode ("mov", "%s,[%s]", AOP_NAME(result)[0], AOP_NAME(left)[0]); + } + if (size>2) { + if (pi) { + emitcode ("mov", "%s,[%s+]", AOP_NAME(result)[1], AOP_NAME(left)[0]); + } else { + emitcode ("mov", "%s,[%s+2]", AOP_NAME(result)[1], AOP_NAME(left)[0]); + } + } + emitcode ("br", "%05d$", tlbl2->key+100); + emitcode ("", "%05d$:", tlbl1->key+100); + // code pointer + if (pi) { + emitcode ("movc", "%s,[%s+]", AOP_NAME(result)[0], AOP_NAME(left)[0]); + pi->generated=1; + } else { + emitcode ("mov", "r0,%s", AOP_NAME(left)[0]); + emitcode ("movc", "%s,[r0+]", AOP_NAME(result)[0]); + } + if (size>2) { + if (pi) { + emitcode ("movc", "%s,[%s+]", AOP_NAME(result)[1], AOP_NAME(left)[0]); + } else { + emitcode ("movc", "%s,[r0+]", AOP_NAME(result)[1]); + } + } + emitcode ("", "%05d$:", tlbl2->key+100); + return; + } + + switch (AOP_TYPE(left)) + { + case AOP_LIT: + emitcode("mov","r1,%s", AOP_NAME(left)[0]); + sprintf (AOP_NAME(left)[0], "r1"); + // fall through + case AOP_REG: + if (size>1) { + if (codePointer) { + instr=MOVCW; + } else { + instr=MOVW; + } + scratchReg=R1; + } else { + if (codePointer) { + instr=MOVCB; + } else { + instr=MOVB; + } + scratchReg=R1L; + } + if (AOP_TYPE(result)==AOP_STK) { + emitcode (MOV, "%s,[%s]", scratchReg, AOP_NAME(left)[0]); + emitcode (MOV, "%s,%s", AOP_NAME(result)[0], scratchReg); + } else { + if (pi) { + emitcode (instr, "%s,[%s+]", AOP_NAME(result)[0], + AOP_NAME(left)[0]); + pi->generated=1; + } else { + if (codePointer) { + emitcode (MOV, "r1,%s", AOP_NAME(left)[0]); + emitcode (instr, "%s,[r1+]", AOP_NAME(result)[0]); + } else { + emitcode (instr, "%s,[%s]", AOP_NAME(result)[0], + AOP_NAME(left)[0]); + } + } + } + if (size > 2) { + if (size==3) { + if (codePointer) { + instr=MOVCB; + } else { + instr=MOVB; + } + scratchReg=R1L; + } + if (AOP_TYPE(result)==AOP_STK) { + emitcode (MOV, "%s,[%s+2]", scratchReg, AOP_NAME(left)[0]); + emitcode (MOV, "%s,%s", AOP_NAME(result)[1], scratchReg); + } else { + if (pi) { + emitcode (instr, "%s,[%s+]", AOP_NAME(result)[1], + AOP_NAME(left)[0]); + } else { + if (codePointer) { + emitcode (instr, "%s,[r1]", AOP_NAME(result)[1]); + } else { + emitcode (instr, "%s,[%s+2]", AOP_NAME(result)[1], + AOP_NAME(left)[0]); + } + } + } + } + return; + } + bailOut ("genPointerGet"); +} + +/*-----------------------------------------------------------------*/ +/* genPointerSet - stores the value into a pointer location */ +/*-----------------------------------------------------------------*/ +static void genPointerSet (iCode * ic, iCode *pi) { + char *instr; + operand *result=IC_RESULT(ic), *right=IC_RIGHT(ic); + int size; + + printIc (0, "genPointerSet", ic, 1,0,1); + + if (!IS_PTR(operandType(result))) { + bailOut ("genPointerSet: pointer required"); + } + + aopOp(result,FALSE,FALSE); + size=aopOp(right,FALSE, FALSE); + + if (IS_GENPTR(operandType(result))) { + emitcode (";", "INLINE\t_gptrset ; [%s %s] = %s %s", + AOP_NAME(result)[0], AOP_NAME(result)[1], + AOP_NAME(right)[0], AOP_NAME(right)[1]); + return; + } + + switch (AOP_TYPE(right)) + { + case AOP_LIT: + case AOP_REG: + if (size>1) { + instr=MOVW; + } else { + instr=MOVB; + } + if (pi) { + emitcode (instr, "[%s+],%s", AOP_NAME(result)[0], AOP_NAME(right)[0]); + pi->generated=1; + } else { + emitcode (instr, "[%s],%s", AOP_NAME(result)[0], AOP_NAME(right)[0]); + } + if (size > 2) { + if (size==3) { + instr=MOVB; + } + if (pi) { + emitcode (instr, "[%s+],%s", AOP_NAME(result)[0], + AOP_NAME(right)[1]); + } else { + emitcode (instr, "[%s+2],%s", AOP_NAME(result)[0], + AOP_NAME(right)[1]); + } + } + return; + } + bailOut ("genPointerSet"); +} + +/*-----------------------------------------------------------------*/ +/* genIfx - generate code for Ifx statement */ +/*-----------------------------------------------------------------*/ +static void genIfx (iCode * ic, iCode * popIc) { + int size; + char *instr; + bool trueOrFalse; + symbol *jlbl, *tlbl=newiTempLabel(NULL); + operand *cond=IC_COND(ic); + + emitcode (";", "genIfx(%d) cond=%s trueLabel:%s falseLabel:%s", + ic->lineno, printOp(cond), + IC_TRUE(ic) ? IC_TRUE(ic)->name : "NULL", + IC_FALSE(ic) ? IC_FALSE(ic)->name : "NULL"); + + size=aopOp(cond,TRUE,TRUE); + + if (IC_TRUE(ic)) { + trueOrFalse=TRUE; + jlbl=IC_TRUE(ic); + } else { + trueOrFalse=FALSE; + jlbl=IC_FALSE(ic); + } + + switch (AOP_TYPE(cond) ) + { + case AOP_BIT: + emitcode (trueOrFalse ? "jnb" : "jb", "%s,%05d$", + AOP_NAME(cond)[0], tlbl->key+100); + emitcode ("jmp", "%05d$", jlbl->key+100); + emitcode ("", "%05d$:", tlbl->key+100); + return; + case AOP_REG: + case AOP_DIR: + case AOP_FAR: + case AOP_STK: + if (size>1) { + instr="cmp.w"; + } else { + instr="cmp.b"; + } + emitcode (instr, "%s,#0", AOP_NAME(cond)[0]); + emitcode (trueOrFalse ? "beq" : "bne", "%05d$", tlbl->key+100); + if (size > 2) { + if (size==3) { + // generic pointer, forget the generic part + } else { + emitcode (instr, "%s,#0", AOP_NAME(cond)[1]); + emitcode (trueOrFalse ? "beq" : "bne", "%05d$", tlbl->key+100); + } + } + emitcode ("jmp", "%05d$", jlbl->key+100); + emitcode ("", "%05d$:", tlbl->key+100); + return; + } + bailOut ("genIfx"); +} + +/*-----------------------------------------------------------------*/ +/* genAddrOf - generates code for address of */ +/*-----------------------------------------------------------------*/ +static void genAddrOf (iCode * ic) { + int size; + operand *left=IC_LEFT(ic); + + printIc (0, "genAddrOf", ic, 1,1,0); + + size=aopOp (IC_RESULT(ic), FALSE, TRUE); + + if (isOperandOnStack(left)) { + emitcode ("lea", "%s,%s", AOP_NAME(IC_RESULT(ic))[0], + getStackOffset(OP_SYMBOL(left)->stack)); + if (size > 2) { + // this must be a generic pointer + emitcode ("mov.b", "%s,#0x%02x", AOP_NAME(IC_RESULT(ic))[1], FPOINTER); + } + return; + } + + if (isOperandInDirSpace(left) || + isOperandInFarSpace(left) || + isOperandInCodeSpace(left)) { + emitcode ("mov.w", "%s,#%s", AOP_NAME(IC_RESULT(ic))[0], + OP_SYMBOL(left)->rname); + if (size > 2) { + // this must be a generic pointer + int space=0; // dir space + if (isOperandInFarSpace(left)) { + space=1; + } else if (isOperandInCodeSpace(left)) { + space=2; + } + emitcode ("mov.b", "%s,#0x%02x", AOP_NAME(IC_RESULT(ic))[1], space); + } + return; + } + + bailOut("genAddrOf"); +} + +/*-----------------------------------------------------------------*/ +/* genAssign - generate code for assignment */ +/*-----------------------------------------------------------------*/ +static void genAssign (iCode * ic) { + operand *result=IC_RESULT(ic), *right=IC_RIGHT(ic); + int size; + char *instr; + + printIc (0, "genAssign", ic, 1,0,1); + + if (!IS_SYMOP(result)) { + bailOut("genAssign: result is not a symbol"); + } + + aopOp(result, TRUE, TRUE); + aopOp(right, !aopIsPtr(result), AOP_TYPE(result)!=AOP_DIR); + size=AOP_SIZE(result); + + /* if result is a bit */ + if (AOP_TYPE(result) == AOP_BIT) { + /* if right is literal, we know what the value is */ + if (AOP_TYPE(right) == AOP_LIT) { + if (operandLitValue(right)) { + emitcode ("setb", AOP_NAME(result)[0]); + } else { + emitcode ("clr", AOP_NAME(result)[0]); + } + return; + } + /* if right is also a bit */ + if (AOP_TYPE(right) == AOP_BIT) { + emitcode ("mov", "c,%s", AOP_NAME(right)); + emitcode ("mov", "%s,c", AOP_NAME(result)); + return; + } + /* we need to or */ + emitcode ("mov", "%s,%s; toBoolean", AOP_NAME(result), toBoolean(right)); + return; + } + + // TODO: if (-8 >= right==lit <= 7) instr=MOVS + /* general case */ + if (size>1) { + instr=MOVW; + } else { + instr=MOVB; + } + emitcode (instr, "%s,%s", AOP_NAME(result)[0], AOP_NAME(right)[0]); + + if (size > 2) { + if (size==3) { + // generic pointer + instr=MOVB; + } + emitcode (instr, "%s,%s", AOP_NAME(result)[1], AOP_NAME(right)[1]); + return; + } +} + +/*-----------------------------------------------------------------*/ +/* genJumpTab - genrates code for jump table */ +/*-----------------------------------------------------------------*/ +static void genJumpTab (iCode * ic) { + printIc (0, "genJumpTab", ic, 0,0,0); +} + +/*-----------------------------------------------------------------*/ +/* genCast - gen code for casting */ +/*-----------------------------------------------------------------*/ +static void genCast (iCode * ic) { + int size; + operand *result=IC_RESULT(ic); + operand *right=IC_RIGHT(ic); + sym_link *ctype=operandType(IC_LEFT(ic)); + sym_link *rtype=operandType(IC_RIGHT(ic)); + sym_link *etype=getSpec(rtype); + short ptrType, signedness; + + printIc (0, "genCast", ic, 1,1,1); + + aopOp(result, TRUE, TRUE); + aopOp(right, !aopIsPtr(result), AOP_TYPE(result)!=AOP_DIR); + size=AOP_SIZE(result); + + /* if result is a bit */ + if (AOP_TYPE(result) == AOP_BIT) { + /* if right is literal, we know what the value is */ + if (AOP_TYPE(right) == AOP_LIT) { + if (operandLitValue(right)) { + emitcode ("setb", AOP_NAME(result)[0]); + } else { + emitcode ("clr", AOP_NAME(result)[0]); + } + return; + } + /* if right is also a bit */ + if (AOP_TYPE(right) == AOP_BIT) { + emitcode ("mov", "c,%s", AOP_NAME(right)); + emitcode ("mov", "%s,c", AOP_NAME(result)); + return; + } + /* we need to or */ + emitcode ("mov", "%s,%s; toBoolean", AOP_NAME(result), toBoolean(right)); + return; + } + + /* if right is a bit */ + if (AOP_TYPE(right)==AOP_BIT) { + emitcode ("mov", "c,%s", AOP_NAME(right)); + emitcode ("mov", "%s,#0", AOP_NAME(result)[0]); + emitcode ("rlc", "%s,#1", AOP_NAME(result)[0]); + if (size>2) { + emitcode ("mov", "%s,#0", AOP_NAME(result)[1]); + } + return; + } + + /* if the result is of type pointer */ + if (IS_PTR (ctype)) { + + if (AOP_SIZE(right)>1) { + emitcode ("mov", "%s,%s", AOP_NAME(result)[0], AOP_NAME(right)[0]); + } else { + emitcode ("mov", "r1l,%s", AOP_NAME(right)[0]); + emitcode ("sext", "r1h"); + emitcode ("mov", "%s,r1", AOP_NAME(result)[0]); + } + + /* if pointer to generic pointer */ + if (IS_GENPTR (ctype)) { + + if (IS_GENPTR (rtype)) { + bailOut("genCast: gptr -> gptr"); + } + + if (IS_PTR (rtype)) { + ptrType = DCL_TYPE (rtype); + } else { + /* we have to go by the storage class */ + if (!SPEC_OCLS(etype)) { + ptrType=0; // hush the compiler + bailOut("genCast: unknown storage class"); + } else { + ptrType = PTR_TYPE (SPEC_OCLS (etype)); + } + } + + /* the generic part depends on the type */ + switch (ptrType) + { + case POINTER: + emitcode ("mov.b", "%s,#0x00", AOP_NAME(result)[1]); + break; + case FPOINTER: + emitcode ("mov.b", "%s,#0x01", AOP_NAME(result)[1]); + break; + case CPOINTER: + emitcode ("mov.b", "%s,#0x02", AOP_NAME(result)[1]); + break; + default: + bailOut("genCast: got unknown storage class"); + } + } + return; + } + + /* do we have to sign extend? */ + signedness = SPEC_USIGN(rtype); + + /* now depending on the size */ + switch ((AOP_SIZE(result)<<4) + AOP_SIZE(right)) + { + case 0x44: + case 0x33: + emitcode("mov", "%s,%s", AOP_NAME(result)[1], AOP_NAME(right)[1]); + // fall through + case 0x24: + case 0x22: + case 0x11: + emitcode("mov", "%s,%s", AOP_NAME(result)[0], AOP_NAME(right)[0]); + return; + case 0x42: + emitcode("mov", "%s,%s", AOP_NAME(result)[0], AOP_NAME(right)[0]); + if (signedness) { + emitcode("sext", "%s", AOP_NAME(result)[1]); + } else { + emitcode("mov", "%s,#0", AOP_NAME(result)[1]); + } + return; + case 0x41: + case 0x21: + emitcode("mov", "r1l,%s", AOP_NAME(right)[0]); + if (signedness) { + emitcode("sext", "r1h"); + } else { + emitcode("mov", "r1h,#0"); + } + emitcode("mov", "%s,r1", AOP_NAME(result)[0]); + if (size==2) + return; + // fall through: case 0x41 + if (signedness) { + emitcode("sext", "r1"); + } else { + emitcode("mov", "r1,#0"); + } + emitcode("mov", "%s,r1", AOP_NAME(result)[1]); + return; + case 0x14: + case 0x12: + emitcode("mov", "r1,%s", AOP_NAME(right)[0]); + emitcode("mov", "%s,r1l", AOP_NAME(result)[0]); + return; + } + fprintf(stderr, "genCast: unknown size: %d:%d\n", + AOP_SIZE(result), AOP_SIZE(right)); + bailOut("genCast: unknown size"); +} + + +/*-----------------------------------------------------------------*/ +/* genDjnz - generate decrement & jump if not zero instrucion */ +/*-----------------------------------------------------------------*/ +static bool genDjnz (iCode * ic, iCode * ifx) { + symbol *lbl, *lbl1; + + if (!ifx) + return 0; + + /* if the if condition has a false label + then we cannot save */ + if (IC_FALSE (ifx)) + return 0; + + /* if the minus is not of the form + a = a - 1 */ + if (!isOperandEqual (IC_RESULT (ic), IC_LEFT (ic)) || + !IS_OP_LITERAL (IC_RIGHT (ic))) + return 0; + + if (operandLitValue (IC_RIGHT (ic)) != 1) + return 0; + + /* if the size of this greater than two then no + saving */ + if (getSize (operandType (IC_RESULT (ic))) > 2) + return 0; + + printIc (0, "genDjnz", ic, 1,1,1); + + /* otherwise we can save BIG */ + lbl = newiTempLabel (NULL); + lbl1 = newiTempLabel (NULL); + + aopOp (IC_RESULT (ic), FALSE, TRUE); + + if (AOP_TYPE(IC_RESULT(ic))==AOP_REG || AOP_TYPE(IC_RESULT(ic))==AOP_DIR) { + emitcode ("djnz", "%s,%05d$", AOP_NAME(IC_RESULT(ic)), lbl->key+100); + emitcode ("br", "%05d$", lbl1->key + 100); + emitcode ("", "%05d$:", lbl->key + 100); + emitcode ("jmp", "%05d$", IC_TRUE (ifx)->key + 100); + emitcode ("", "%05d$:", lbl1->key + 100); + return TRUE; + } + + bailOut("genDjnz: aop type"); + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* genReceive - generate code for a receive iCode */ +/*-----------------------------------------------------------------*/ +static void genReceive (iCode * ic) { + printIc (0, "genReceive", ic, 1,0,0); +} + +/*-----------------------------------------------------------------*/ +/* genDummyRead - generate code for dummy read of volatiles */ +/*-----------------------------------------------------------------*/ +static void +genDummyRead (iCode * ic) +{ + emitcode ("; genDummyRead",""); + + ic = ic; +} + +/*-----------------------------------------------------------------*/ +/* gen51Code - generate code for 8051 based controllers */ +/*-----------------------------------------------------------------*/ +void genXA51Code (iCode * lic) { + iCode *ic; + int cln = 0; + + lineHead = lineCurr = NULL; + + /* if debug information required */ + if (options.debug && currFunc) + { + debugFile->writeFunction (currFunc, lic); + } + + for (ic = lic; ic; ic = ic->next) { + if (ic->lineno && cln != ic->lineno) { + if (options.debug) { + debugFile->writeCLine (ic); + } + if (!options.noCcodeInAsm) { + emitcode ("", ";\t%s:%d: %s", ic->filename, ic->lineno, + printCLine(ic->filename, ic->lineno)); + } + cln = ic->lineno; + } + if (options.iCodeInAsm) { + const char *iLine = printILine(ic); + emitcode("", ";ic:%d: %s", ic->key, iLine); + dbuf_free(iLine); + } + + /* if the result is marked as + spilt and rematerializable or code for + this has already been generated then + do nothing */ + if (resultRemat (ic) || ic->generated) + continue; + + /* depending on the operation */ + switch (ic->op) + { + case '!': + genNot (ic); + break; + + case '~': + genCpl (ic); + break; + + case UNARYMINUS: + genUminus (ic); + break; + + case IPUSH: + genIpush (ic); + break; + + case IPOP: + /* IPOP happens only when trying to restore a + spilt live range, if there is an ifx statement + following this pop then the if statement might + be using some of the registers being popped which + would destory the contents of the register so + we need to check for this condition and handle it */ + if (ic->next && + ic->next->op == IFX && + regsInCommon (IC_LEFT (ic), IC_COND (ic->next))) + genIfx (ic->next, ic); + else + genIpop (ic); + break; + + case CALL: + genCall (ic); + break; + + case PCALL: + genPcall (ic); + break; + + case FUNCTION: + genFunction (ic); + break; + + case ENDFUNCTION: + genEndFunction (ic); + break; + + case RETURN: + genRet (ic); + break; + + case LABEL: + genLabel (ic); + break; + + case GOTO: + genGoto (ic); + break; + + case '+': + genPlus (ic); + break; + + case '-': + if (!genDjnz (ic, ifxForOp (IC_RESULT (ic), ic))) + genMinus (ic); + break; + + case '*': + genMult (ic); + break; + + case '/': + genDiv (ic); + break; + + case '%': + genMod (ic); + break; + + case '>': + genCmpGt (ic); + break; + + case '<': + genCmpLt (ic); + break; + + case LE_OP: + case GE_OP: + case NE_OP: + + /* note these two are xlated by algebraic equivalence + during parsing SDCC.y */ + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "got '>=' or '<=' shouldn't have come here"); + break; + + case EQ_OP: + genCmpEq (ic); + break; + + case AND_OP: + genAndOp (ic); + break; + + case OR_OP: + genOrOp (ic); + break; + + case '^': + genXor (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case '|': + genOr (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case BITWISEAND: + genAnd (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case INLINEASM: + genInline (ic); + break; + + case RRC: + genRRC (ic); + break; + + case RLC: + genRLC (ic); + break; + + case GETHBIT: + genGetHbit (ic); + break; + + case LEFT_OP: + genLeftShift (ic); + break; + + case RIGHT_OP: + genRightShift (ic); + break; + + case GET_VALUE_AT_ADDRESS: + genPointerGet (ic, hasInc(IC_LEFT(ic), ic, getSize(operandType(IC_RESULT(ic))))); + break; + + case '=': + if (POINTER_SET (ic)) + genPointerSet (ic, hasInc(IC_RESULT(ic), ic, getSize(operandType(IC_RIGHT(ic))))); + else + genAssign (ic); + break; + + case IFX: + genIfx (ic, NULL); + break; + + case ADDRESS_OF: + genAddrOf (ic); + break; + + case JUMPTABLE: + genJumpTab (ic); + break; + + case CAST: + genCast (ic); + break; + + case RECEIVE: + genReceive (ic); + break; + + case SEND: + addSet (&_G.sendSet, ic); + break; + + case DUMMY_READ_VOLATILE: + genDummyRead (ic); + break; + + default: + ic = ic; + } + } + + + /* now we are ready to call the + peep hole optimizer */ + if (!options.nopeep) + peepHole (&lineHead); + + /* now do the actual printing */ + printLine (lineHead, codeOutBuf); + return; +} diff --git a/src/xa51/gen.h b/src/xa51/gen.h new file mode 100644 index 0000000..fec9e0c --- /dev/null +++ b/src/xa51/gen.h @@ -0,0 +1,69 @@ +/*------------------------------------------------------------------------- + SDCCgen51.h - header file for code generation for 8051 + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef SDCCGEN51_H +#define SDCCGEN51_H + +enum + { + AOP_LIT = 1, + AOP_REG, + AOP_DIR, + AOP_FAR, + AOP_CODE, + AOP_GPTR, + AOP_STK, + AOP_IMMD, + AOP_BIT + }; + +/* type asmop : a homogenised type for + all the different spaces an operand can be + in */ +typedef struct asmop { + + short type; + /* can have values + AOP_LIT - operand is a literal value + AOP_REG - is in registers + AOP_DIR - direct, just a name + AOP_FAR - + AOP_CODE - + AOP_GPTR - + AOP_STK - on stack (with offset) + AOP_IMMD - immediate value for eg. remateriazable + AOP_CRY - carry contains the value of this + */ + short size; /* size of this aop */ + char name[2][64]; /* can be "r0" "r6h" [rxbw+y] "#..." */ +} asmop; + +#define AOP(x) x->aop +#define AOP_TYPE(x) x->aop->type +#define AOP_SIZE(x) x->aop->size +#define AOP_NAME(x) x->aop->name + +void xa51_emitDebuggerSymbol (char *); + +#endif diff --git a/src/xa51/main.c b/src/xa51/main.c new file mode 100644 index 0000000..f73aa78 --- /dev/null +++ b/src/xa51/main.c @@ -0,0 +1,361 @@ +/* @file main.c + xa51 specific general functions. +*/ + +#include "common.h" +#include "main.h" +#include "ralloc.h" +#include "gen.h" + +static char _defaultRules[] = +{ +#include "peeph.rul" +}; + +/* list of key words used by xa51 */ +static char *_xa51_keywords[] = +{ + "at", + "bit", + "code", + "critical", + "data", + "far", + //"idata", + "interrupt", + "near", + //"pdata", + "reentrant", + "sfr", + "sbit", + "using", + "xdata", + //"_data", + //"_code", + //"_generic", + //"_near", + //"_xdata", + //"_pdata", + //"_idata", + "_naked", + //"_overlay", + NULL +}; + +/* rewinds declared in SDCCasm.c, function printCLine(). + * Currently commented out. + * + * extern int rewinds; + */ +void _xa51_genAssemblerEnd (FILE * of) +{ + //fprintf (stderr, "Did %d rewind%c for c-line in asm comments\n", rewinds, + //rewinds==1 ? '\0' : 's'); +} + +void xa51_assignRegisters (ebbIndex *); + +static int regParmFlg = 0; /* determine if we can register a parameter */ + +static void +_xa51_init (void) +{ + asm_addTree (&asm_xa_asm_mapping); +} + +static void +_xa51_reset_regparm (void) +{ + regParmFlg = 0; +} + +static int +_xa51_regparm (sym_link * l, bool reentrant) +{ + return 0; // for now + /* for this processor it is simple + can pass only the first parameter in a register */ + if (regParmFlg) + return 0; + + regParmFlg = 1; + return 1; +} + +static bool +_xa51_parseOptions (int *pargc, char **argv, int *i) +{ + /* TODO: allow port-specific command line options to specify + * segment names here. + */ + return FALSE; +} + +static void +_xa51_finaliseOptions (void) +{ + fprintf (stderr, "*** WARNING *** The XA51 port isn't yet complete\n"); + port->mem.default_local_map = istack; + port->mem.default_globl_map = xdata; + if (options.model!=MODEL_PAGE0) { + fprintf (stderr, "-mxa51 only supports --model-page0\n"); + exit (1); + } +} + +static void +_xa51_setDefaultOptions (void) +{ + options.stackAuto=1; + options.intlong_rent=1; + options.float_rent=1; + options.stack_loc=0x100; + options.data_loc=0; +} + +static const char * +_xa51_getRegName (struct regs *reg) +{ + if (reg) + return reg->name; + return "err"; +} + +/* Generate interrupt vector table. */ +static int +_xa51_genIVT (struct dbuf_s * oBuf, symbol ** interrupts, int maxInterrupts) +{ + return TRUE; +} + +/* Generate code to copy XINIT to XISEG */ +static void _xa51_genXINIT (FILE * of) { + fprintf (of, "; _xa51_genXINIT() start\n"); + fprintf (of, " mov r0,#l_XINIT\n"); + fprintf (of, " beq 00002$\n"); + fprintf (of, " mov r1,#s_XINIT\n"); + fprintf (of, " mov r2,#s_XISEG\n"); + fprintf (of, "00001$: movc r3l,[r1+]\n"); + fprintf (of, " mov [r2+],r3l\n"); + fprintf (of, " djnz r0,00001$\n"); + fprintf (of, "00002$:\n"); + fprintf (of, "; _xa51_genXINIT() end\n"); +} + +static void +_xa51_genAssemblerPreamble (FILE * of) +{ + symbol *mainExists=newSymbol("main", 0); + mainExists->block=0; + + if ((mainExists=findSymWithLevel(SymbolTab, mainExists))) { + fprintf (of, "\t.area GSINIT\t(CODE)\n"); + fprintf (of, "__interrupt_vect:\n"); + fprintf (of, "\t.dw\t0x8f00\n"); + fprintf (of, "\t.dw\t__sdcc_gsinit_startup\n"); + fprintf (of, "\n"); + fprintf (of, "__sdcc_gsinit_startup:\n"); + fprintf (of, ";\tmov.b\t_SCR,#0x01\t; page zero mode\n"); + fprintf (of, "\t.db 0x96,0x48,0x40,0x01\n"); + fprintf (of, "\tmov\tr7,#0x%04x\n", options.stack_loc); + fprintf (of, "\tcall\t_external_startup\n"); + _xa51_genXINIT(of); + fprintf (of, "\t.area CSEG\t(CODE)\n"); + fprintf (of, "\tcall\t_main\n"); + fprintf (of, "\treset\t;main should not return\n"); + } +} + +/* dummy linker for now */ +void xa_link(void) { +} + +/* Do CSE estimation */ +static bool cseCostEstimation (iCode *ic, iCode *pdic) +{ + operand *result = IC_RESULT(ic); + sym_link *result_type = operandType(result); + + /* if it is a pointer then return ok for now */ + if (IC_RESULT(ic) && IS_PTR(result_type)) return 1; + + /* if bitwise | add & subtract then no since xa51 is pretty good at it + so we will cse only if they are local (i.e. both ic & pdic belong to + the same basic block */ + if (IS_BITWISE_OP(ic) || ic->op == '+' || ic->op == '-') { + /* then if they are the same Basic block then ok */ + if (ic->eBBlockNum == pdic->eBBlockNum) return 1; + else return 0; + } + + /* for others it is cheaper to do the cse */ + return 1; +} + +/* Indicate which extended bit operations this port supports */ +static bool +hasExtBitOp (int op, int size) +{ + if (op == RRC + || op == RLC + || op == GETHBIT + ) + return TRUE; + else + return FALSE; +} + +/* Indicate the expense of an access to an output storage class */ +static int +oclsExpense (struct memmap *oclass) +{ + if (IN_FARSPACE(oclass)) + return 1; + + return 0; +} + + +/** $1 is always the basename. + $2 is always the output file. + $3 varies + $l is the list of extra options that should be there somewhere... + MUST be terminated with a NULL. +*/ +static const char *_linkCmd[] = +{ + "xa_link", "", "\"$1\"", NULL +}; + +/* $3 is replaced by assembler.debug_opts resp. port->assembler.plain_opts */ +static const char *_asmCmd[] = +{ + "xa_rasm", "$l", "$3", "\"$1.asm\"", NULL +}; + +/* Globals */ +PORT xa51_port = +{ + TARGET_ID_XA51, + "xa51", + "MCU 80C51XA", /* Target name */ + NULL, /* Processor name */ + { + glue, + FALSE, /* Emit glue around main */ + MODEL_PAGE0, + MODEL_PAGE0 + }, + { + _asmCmd, + NULL, + "", /* Options with debug */ + "", /* Options without debug */ + 0, + ".asm", + NULL /* no do_assemble function */ + }, + { + _linkCmd, + NULL, + NULL, + ".rel", + 1 + }, + { + _defaultRules + }, + { + /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ + 1, 2, 2, 4, 2, 2, 3, 1, 4, 4 + }, + /* tags for generic pointers */ + { 0x00, 0x40, 0x60, 0x80 }, /* far, near, xstack, code */ + { + "XSEG (XDATA)", + "STACK (XDATA)", + "CSEG (CODE)", + "DSEG (DATA)", + NULL, //"ISEG (DATA)", + NULL, //"PSEG (PAG,XDATA)", + "XSEG (XDATA)", + "BSEG (BIT)", + NULL, //"RSEG (DATA)", + "GSINIT (CODE)", + NULL, //"OSEG (OVR,XDATA)", + "GSFINAL (CODE)", + "HOME (CODE)", + "XISEG (XDATA)", // initialized xdata + "XINIT (CODE)", // a code copy of xiseg + "CONST (CODE)", // const_name - const data (code or not) + "CABS (ABS,CODE)", // cabs_name - const absolute data (code or not) + "XABS (ABS,XDATA)", // xabs_name - absolute xdata + "IABS (ABS,DATA)", // iabs_name - absolute data + NULL, // default local map + NULL, // default global map + 1 + }, + { NULL, NULL }, + { + -1, // stack grows down + 0, // bank overhead NUY + 4, // isr overhead, page zero mode + 2, // function call overhead, page zero mode + 0, // reentrant overhead NUY + 0 // banked overhead NUY + }, + /* xa51 has an 16 bit mul */ + { + 2, -2 + }, + { + xa51_emitDebuggerSymbol + }, + { + 255/3, /* maxCount */ + 3, /* sizeofElement */ + /* The rest of these costs are bogus. They approximate */ + /* the behavior of src/SDCCicode.c 1.207 and earlier. */ + {4,4,4}, /* sizeofMatchJump[] */ + {0,0,0}, /* sizeofRangeCompare[] */ + 0, /* sizeofSubtract */ + 3, /* sizeofDispatch */ + }, + "_", + _xa51_init, + _xa51_parseOptions, + NULL, + NULL, + _xa51_finaliseOptions, + _xa51_setDefaultOptions, + xa51_assignRegisters, + _xa51_getRegName, + _xa51_keywords, + _xa51_genAssemblerPreamble, + _xa51_genAssemblerEnd, + _xa51_genIVT, + _xa51_genXINIT, + NULL, /* genInitStartup */ + _xa51_reset_regparm, + _xa51_regparm, + NULL, // process_pragma() + NULL, // getMangledFunctionName() + NULL, // hasNativeMulFor() + hasExtBitOp, /* hasExtBitOp */ + oclsExpense, /* oclsExpense */ + TRUE, // use_dw_for_init + TRUE, /* little endian */ + 0, /* leave lt */ + 0, /* leave gt */ + 1, /* transform <= to ! > */ + 1, /* transform >= to ! < */ + 1, /* transform != to !(a == b) */ + 0, /* leave == */ + FALSE, /* No array initializer support. */ + cseCostEstimation, + NULL, /* no builtin functions */ + GPOINTER, /* treat unqualified pointers as "generic" pointers */ + 1, /* reset labelKey to 1 */ + 1, /* globals & local static allowed */ + PORT_MAGIC +}; diff --git a/src/xa51/main.h b/src/xa51/main.h new file mode 100644 index 0000000..6555225 --- /dev/null +++ b/src/xa51/main.h @@ -0,0 +1,8 @@ +#ifndef MAIN_INCLUDE +#define MAIN_INCLUDE + +bool x_parseOptions (char **argv, int *pargc); +void x_setDefaultOptions (void); +void x_finaliseOptions (void); + +#endif diff --git a/src/xa51/peeph.def b/src/xa51/peeph.def new file mode 100644 index 0000000..2f36385 --- /dev/null +++ b/src/xa51/peeph.def @@ -0,0 +1,4 @@ +// there should be at least one newline in the def file +// to keep MSC compiler satisfied; so don't remove the +// following empty line! + diff --git a/src/xa51/ralloc.c b/src/xa51/ralloc.c new file mode 100644 index 0000000..830a30f --- /dev/null +++ b/src/xa51/ralloc.c @@ -0,0 +1,2130 @@ +/* This port is in development, UNSTABLE, DEVELOPERS ONLY! */ + +/* idea: + R0-^-R2(R0L-R2H) used for scratch (byte, word, pointer) + R3L-^-R6H used for bytes + R6-v-R4 used for ptr + R15/R6-v-R4 used for words + + R7 used for stack +*/ + +/*------------------------------------------------------------------------ + + SDCCralloc.c - source file for register allocation. (xa51) specific + + Written By - + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + -------------------------------------------------------------------------*/ + +#include "common.h" +#include "ralloc.h" +#include "gen.h" + +extern void genXA51Code (iCode *); + +#define D0(x) +#define D1(x) x +#define D2(x) x + +/* Global data */ +static struct +{ + bitVect *spiltSet; + set *stackSpil; + bitVect *regAssigned; + bitVect *totRegAssigned; /* final set of LRs that got into registers */ + short blockSpil; + int slocNum; + bitVect *funcrUsed; /* registers used in a function */ + int stackExtend; +} +_G; + +/* xa51 registers */ +regs regsXA51[]={ + // index size type name regMask isFree symbol + {R0L_ID, 1, REG_SCR, "r0l", 0x0001, 1, NULL}, // r0l used for scratch + {R0H_ID, 1, REG_SCR, "r0h", 0x0002, 1, NULL}, // r0h used for scratch + {R1L_ID, 1, REG_SCR, "r1l", 0x0004, 1, NULL}, // r1l used for scratch + {R1H_ID, 1, REG_SCR, "r1h", 0x0008, 1, NULL}, // r1h used for scratch + {R2L_ID, 1, REG_PTR, "r2l", 0x0010, 1, NULL}, + {R2H_ID, 1, REG_PTR, "r2h", 0x0020, 1, NULL}, + {R3L_ID, 1, REG_PTR, "r3l", 0x0040, 1, NULL}, + {R3H_ID, 1, REG_PTR, "r3h", 0x0080, 1, NULL}, + {R4L_ID, 1, REG_PTR, "r4l", 0x0100, 1, NULL}, + {R4H_ID, 1, REG_PTR, "r4h", 0x0200, 1, NULL}, + {R5L_ID, 1, REG_PTR, "r5l", 0x0400, 1, NULL}, + {R5H_ID, 1, REG_PTR, "r5h", 0x0800, 1, NULL}, + {R6L_ID, 1, REG_PTR, "r6l", 0x1000, 1, NULL}, + {R6H_ID, 1, REG_PTR, "r6h", 0x2000, 1, NULL}, + {R7L_ID, 1, REG_STK, "r7l", 0x4000, 1, NULL}, // r7=SP + {R7H_ID, 1, REG_STK, "r7h", 0x8000, 1, NULL}, // r7=SP + + {R0_ID, 2, REG_SCR, "r0", 0x0003, 1, NULL}, // r0 used for scratch + {R1_ID, 2, REG_SCR, "r1", 0x000c, 1, NULL}, // r1 used for scratch + {R2_ID, 2, REG_PTR, "r2", 0x0030, 1, NULL}, + {R3_ID, 2, REG_PTR, "r3", 0x00c0, 1, NULL}, + {R4_ID, 2, REG_PTR, "r4", 0x0300, 1, NULL}, + {R5_ID, 2, REG_PTR, "r5", 0x0c00, 1, NULL}, + {R6_ID, 2, REG_PTR, "r6", 0x3000, 1, NULL}, + {R7_ID, 2, REG_STK, "r7", 0xc000, 1, NULL}, // r7=SP +#if 0 // some derivates have even more! (only bit/word access no ptr use) + {R8_ID, 2, REG_GPR, "r8", 0x010000, 1, NULL}, + {R9_ID, 2, REG_GPR, "r9", 0x020000, 1, NULL}, + {R10_ID, 2, REG_GPR, "r10", 0x040000, 1, NULL}, + {R11_ID, 2, REG_GPR, "r11", 0x080000, 1, NULL}, + {R12_ID, 2, REG_GPR, "r12", 0x100000, 1, NULL}, + {R13_ID, 2, REG_GPR, "r13", 0x200000, 1, NULL}, + {R14_ID, 2, REG_GPR, "r14", 0x400000, 1, NULL}, + {R15_ID, 2, REG_GPR, "r15", 0x800000, 1, NULL}, +#endif + {R0R1_ID, 4, REG_GPR, "(r0,r1)", 0x000f, 1, NULL}, + {R2R3_ID, 4, REG_GPR, "(r2,r3)", 0x00f0, 1, NULL}, + {R4R5_ID, 4, REG_GPR, "(r4,r5)", 0x0f00, 1, NULL}, + {R6R7_ID, 4, REG_GPR, "(r6,r7)", 0xf000, 1, NULL}, +}; + +int xa51_nRegs=sizeof(regsXA51)/sizeof(regs); + +// the currently in use registers +unsigned long xa51RegsInUse=0; + +// this should be set with a command line switch +bool xa51HasGprRegs=0; + +/*-----------------------------------------------------------------*/ +/* xa51_regWithMask - returns pointer to register with mask */ +/*-----------------------------------------------------------------*/ +regs *xa51_regWithMask (unsigned long mask) { + int i; + for (i=0; iname, + xa51_regWithMask(regMask)->sym->name); + + exit(1); + return; + } +} + +char *regTypeToStr(short type) { + switch (type) + { + case REG_PTR: return "ptr"; break; // pointer + case REG_GPR: return "gpr"; break; // general purpose + case REG_CND: return "cnd"; break; // condition (bit) + case REG_STK: return "stk"; break; // stack + case REG_SCR: return "scr"; break; // scratch + default: return "???"; + } +} + +/*-----------------------------------------------------------------*/ +/* freeReg - frees a previous allocated register */ +/*-----------------------------------------------------------------*/ +static void freeReg (regs * reg, bool silent) { + + checkRegMask(__FUNCTION__); + + if (!reg) { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "freeReg - freeing NULL register"); + return; + } + + if (!silent) { + D0(fprintf (stderr, "freeReg: (%08lx) %s (%s) ", xa51RegsInUse, + reg->name, reg->sym->name)); + } + + if (reg->isFree || ((xa51RegsInUse®->regMask)!=reg->regMask)) { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "freeReg - freeing unused register(s)"); + exit (1); + } + xa51RegsInUse &= ~reg->regMask; + reg->isFree = 1; + reg->sym = NULL; + if (!silent) D0(fprintf (stderr, "(%08lx)\n", xa51RegsInUse)); + + checkRegMask(__FUNCTION__); +} + +/*-----------------------------------------------------------------*/ +/* allocReg - allocates register of given size (byte, word, dword) */ +/* and type (ptr, gpr, cnd) */ +/*-----------------------------------------------------------------*/ +static bool allocReg (unsigned int size, int type, symbol *sym, + int offset, bool silent) { + int i; + + checkRegMask(__FUNCTION__); + + if (!silent) { + D0(fprintf (stderr, "allocReg (%08lx) for %s size:%d, type:%s ", + xa51RegsInUse, + sym->name, + size, regTypeToStr(type))); + } + + switch (size) + { + // TODO: gaps could be filled for dwords too + case 1: + // let's see if we can fill a gap + for (i=0; iregs[offset]=reg; + xa51RegsInUse |= mask; + reg->isFree=0; // redundant + reg->sym = sym; + if (!silent) { + D0(fprintf (stderr, "(using gap) %s\n", reg->name)); + } + checkRegMask(__FUNCTION__); + return TRUE; + } + } + } + // no we can't, fall through + case 2: + for (i=0; iregs[offset]=®sXA51[i]; + checkRegMask(__FUNCTION__); + return TRUE; + } + } + if (!silent) { + D0(fprintf (stderr, "failed (%08lx)\n", xa51RegsInUse)); + } + checkRegMask(__FUNCTION__); + return FALSE; + break; + case 3: + // this must be a generic pointer + if (!silent) { + D0(fprintf (stderr, "trying 1+2\n")); + } + // get the generic part (gpr regs can't be byte) + if (allocReg (1, REG_PTR, sym, offset+1, silent)) { + // get the pointer part + if (allocReg (2, REG_PTR, sym, offset, silent)) { + checkRegMask(__FUNCTION__); + return TRUE; + } + freeReg(sym->regs[offset+1], silent); + sym->regs[offset+1]=NULL; + } + checkRegMask(__FUNCTION__); + return FALSE; + break; + case 4: // this is a dword + if (!silent) { + D0(fprintf (stderr, "trying 2+2\n")); + } + if ((xa51HasGprRegs && allocReg (2, REG_GPR, sym, offset, silent)) || + allocReg (2, REG_PTR, sym, offset, silent)) { + if ((xa51HasGprRegs && allocReg (2, REG_GPR, sym, offset+1, silent)) || + allocReg (2, REG_PTR, sym, offset+1, silent)) { + checkRegMask(__FUNCTION__); + return TRUE; + } + } + if (sym->regs[offset]) { + freeReg(sym->regs[offset], FALSE); + sym->regs[offset]=NULL; + } + checkRegMask(__FUNCTION__); + return FALSE; + break; + } + fprintf (stderr, "\nallocReg: cannot allocate reg of size %d\n", size); + exit (1); + return FALSE; +} + +/*-------------------------------------------------------------------*/ +/* freeAllRegs - frees all registers */ +/*-------------------------------------------------------------------*/ +// just to be sure, this should not be needed +static void freeAllRegs (void) { + char regsFreed[132]; + int i; + int nfr = 0; + + checkRegMask(__FUNCTION__); + + regsFreed[0]=0; + for (i=0; irlive); + spillable = + bitVectCplAnd (spillable, _G.spiltSet); /* those already spilt */ + spillable = + bitVectCplAnd (spillable, ic->uses); /* used in this one */ + bitVectUnSetBit (spillable, ic->defKey); /* defined by this one */ + spillable = bitVectIntersect (spillable, _G.regAssigned); + return spillable; + +} + +/*-----------------------------------------------------------------*/ +/* noSpilLoc - return true if a variable has no spil location */ +/*-----------------------------------------------------------------*/ +static int +noSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return (sym->usl.spillLoc ? 0 : 1); +} + +/*-----------------------------------------------------------------*/ +/* hasSpilLoc - will return 1 if the symbol has spil location */ +/*-----------------------------------------------------------------*/ +static int +hasSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return (sym->usl.spillLoc ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* hasSpilLocnoUptr - will return 1 if the symbol has spil location */ +/* but is not used as a pointer */ +/*-----------------------------------------------------------------*/ +static int +hasSpilLocnoUptr (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return ((sym->usl.spillLoc && !sym->uptr) ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* rematable - will return 1 if the remat flag is set */ +/*-----------------------------------------------------------------*/ +static int +rematable (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return sym->remat; +} + +/*-----------------------------------------------------------------*/ +/* notUsedInRemaining - not used or defined in remain of the block */ +/*-----------------------------------------------------------------*/ +static int +notUsedInRemaining (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return ((usedInRemaining (operandFromSymbol (sym), ic) ? 0 : 1) && + allDefsOutOfRange (sym->defs, ebp->fSeq, ebp->lSeq)); +} + +/*-----------------------------------------------------------------*/ +/* allLRs - return true for all */ +/*-----------------------------------------------------------------*/ +static int +allLRs (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return 1; +} + +/*-----------------------------------------------------------------*/ +/* liveRangesWith - applies function to a given set of live range */ +/*-----------------------------------------------------------------*/ +static set * +liveRangesWith (bitVect * lrs, int (func) (symbol *, eBBlock *, iCode *), + eBBlock * ebp, iCode * ic) +{ + set *rset = NULL; + int i; + + if (!lrs || !lrs->size) + return NULL; + + for (i = 1; i < lrs->size; i++) + { + symbol *sym; + if (!bitVectBitValue (lrs, i)) + continue; + + /* if we don't find it in the live range + hash table we are in serious trouble */ + if (!(sym = hTabItemWithKey (liveRanges, i))) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "liveRangesWith could not find liveRange"); + exit (1); + } + + if (func (sym, ebp, ic) && bitVectBitValue (_G.regAssigned, sym->key)) + addSetHead (&rset, sym); + } + + return rset; +} + + +/*-----------------------------------------------------------------*/ +/* leastUsedLR - given a set determines which is the least used */ +/*-----------------------------------------------------------------*/ +static symbol * +leastUsedLR (set * sset) +{ + symbol *sym = NULL, *lsym = NULL; + + sym = lsym = setFirstItem (sset); + + if (!lsym) + return NULL; + + for (; lsym; lsym = setNextItem (sset)) + { + + /* if usage is the same then prefer + the spill the smaller of the two */ + if (lsym->used == sym->used) + if (getSize (lsym->type) < getSize (sym->type)) + sym = lsym; + + /* if less usage */ + if (lsym->used < sym->used) + sym = lsym; + + } + + setToNull ((void *) &sset); + sym->blockSpil = 0; + return sym; +} + +/*-----------------------------------------------------------------*/ +/* noOverLap - will iterate through the list looking for over lap */ +/*-----------------------------------------------------------------*/ +static int +noOverLap (set * itmpStack, symbol * fsym) +{ + symbol *sym; + + + for (sym = setFirstItem (itmpStack); sym; + sym = setNextItem (itmpStack)) + { + if (bitVectBitValue(sym->clashes,fsym->key)) return 0; + } + + return 1; +} + +/*-----------------------------------------------------------------*/ +/* isFree - will return 1 if the a free spil location is found */ +/*-----------------------------------------------------------------*/ +static DEFSETFUNC (isFree) { + symbol *sym = item; + V_ARG (symbol **, sloc); + V_ARG (symbol *, fsym); + + /* if already found */ + if (*sloc) + return 0; + + /* if it is free && and the itmp assigned to + this does not have any overlapping live ranges + with the one currently being assigned and + the size can be accomodated */ + if (sym->isFree && + noOverLap (sym->usl.itmpStack, fsym) && + /* TODO: this is a waste but causes to many problems + getSize (sym->type) >= getSize (fsym->type)) { + */ + getSize (sym->type) == getSize (fsym->type)) { + *sloc = sym; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* createStackSpil - create a location on the stack to spil */ +/*-----------------------------------------------------------------*/ +static symbol * +createStackSpil (symbol * sym) +{ + symbol *sloc = NULL; + char slocBuffer[30]; + + D1(fprintf (stderr, " createStackSpil for %s\n", sym->name)); + + /* first go try and find a free one that is already + existing on the stack */ + if (applyToSet (_G.stackSpil, isFree, &sloc, sym)) + { + /* found a free one : just update & return */ + sym->usl.spillLoc = sloc; + sym->stackSpil = 1; + sloc->isFree = 0; + addSetHead (&sloc->usl.itmpStack, sym); + D1(fprintf (stderr, " using existing %s\n", sloc->name)); + return sym; + } + + sprintf (slocBuffer, "sloc%d", _G.slocNum++); + sloc = newiTemp (slocBuffer); + + /* set the type to the spilling symbol */ + sloc->type = copyLinkChain (sym->type); + sloc->etype = getSpec (sloc->type); + SPEC_SCLS (sloc->etype) = S_STACK; + SPEC_EXTR (sloc->etype) = 0; + SPEC_STAT (sloc->etype) = 0; + SPEC_VOLATILE(sloc->etype) = 0; + SPEC_ABSA(sloc->etype) = 0; + + allocLocal (sloc); + + sloc->isref = 1; /* to prevent compiler warning */ + + currFunc->stack += getSize (sloc->type); + _G.stackExtend += getSize (sloc->type); + + /* add it to the _G.stackSpil set */ + addSetHead (&_G.stackSpil, sloc); + sym->usl.spillLoc = sloc; + sym->stackSpil = 1; + + /* add it to the set of itempStack set + of the spill location */ + addSetHead (&sloc->usl.itmpStack, sym); + return sym; +} + +/*-----------------------------------------------------------------*/ +/* spillThis - spils a specific operand */ +/*-----------------------------------------------------------------*/ +static void +spillThis (symbol * sym) +{ + int i; + + D1(fprintf (stderr, " spillThis: %s\n", sym->name)); + + /* if this is rematerializable or has a spillLocation + we are okay, else we need to create a spillLocation + for it */ + if (!(sym->remat || sym->usl.spillLoc)) + createStackSpil (sym); + + + /* mark it has spilt & put it in the spilt set */ + sym->isspilt = sym->spillA = 1; + _G.spiltSet = bitVectSetBit (_G.spiltSet, sym->key); + + bitVectUnSetBit (_G.regAssigned, sym->key); + bitVectUnSetBit (_G.totRegAssigned, sym->key); + + for (i = 0; i < sym->nRegs; i++) + + if (sym->regs[i]) + { + freeReg (sym->regs[i], FALSE); + } + + if (sym->usl.spillLoc && !sym->remat) + sym->usl.spillLoc->allocreq++; + return; +} + +/*-----------------------------------------------------------------*/ +/* selectSpil - select a iTemp to spil : rather a simple procedure */ +/*-----------------------------------------------------------------*/ +static symbol * +selectSpil (iCode * ic, eBBlock * ebp, symbol * forSym) +{ + bitVect *lrcs = NULL; + set *selectS; + symbol *sym; + + /* get the spillable live ranges */ + lrcs = computeSpillable (ic); + + /* get all live ranges that are rematerizable */ + if ((selectS = liveRangesWith (lrcs, rematable, ebp, ic))) + { + /* return the least used of these */ + return leastUsedLR (selectS); + } + + /* if the symbol is local to the block then */ + if (forSym->liveTo < ebp->lSeq) + { + + /* check if there are any live ranges allocated + to registers that are not used in this block */ + if (!_G.blockSpil && (selectS = liveRangesWith (lrcs, notUsedInBlock, ebp, ic))) + { + sym = leastUsedLR (selectS); + /* if this is not rematerializable */ + if (!sym->remat) + { + _G.blockSpil++; + sym->blockSpil = 1; + } + return sym; + } + + /* check if there are any live ranges that not + used in the remainder of the block */ + if (!_G.blockSpil && + !isiCodeInFunctionCall (ic) && + (selectS = liveRangesWith (lrcs, notUsedInRemaining, ebp, ic))) + { + sym = leastUsedLR (selectS); + if (sym != forSym) + { + if (!sym->remat) + { + sym->remainSpil = 1; + _G.blockSpil++; + } + return sym; + } + } + } + + /* find live ranges with spillocation && not used as pointers */ + if ((selectS = liveRangesWith (lrcs, hasSpilLocnoUptr, ebp, ic))) + { + + sym = leastUsedLR (selectS); + /* mark this as allocation required */ + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* find live ranges with spillocation */ + if ((selectS = liveRangesWith (lrcs, hasSpilLoc, ebp, ic))) + { + + sym = leastUsedLR (selectS); + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* couldn't find then we need to create a spil + location on the stack , for which one? the least + used ofcourse */ + if ((selectS = liveRangesWith (lrcs, noSpilLoc, ebp, ic))) + { + + /* return a created spil location */ + sym = createStackSpil (leastUsedLR (selectS)); + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* this is an extreme situation we will spill + this one : happens very rarely but it does happen */ + spillThis (forSym); + return forSym; +} + +/*-----------------------------------------------------------------*/ +/* spillSomething - spil some variable & mark registers as free */ +/*-----------------------------------------------------------------*/ +static bool +spillSomething (iCode * ic, eBBlock * ebp, symbol * forSym) +{ + symbol *ssym; + int i; + + /* get something we can spil */ + ssym = selectSpil (ic, ebp, forSym); + + D1(fprintf (stderr, " spillSomething: spilling %s\n", ssym->name)); + + /* mark it as spilt */ + ssym->isspilt = ssym->spillA = 1; + _G.spiltSet = bitVectSetBit (_G.spiltSet, ssym->key); + + /* mark it as not register assigned & + take it away from the set */ + //bitVectUnSetBit (_G.regAssigned, ssym->key); + //bitVectUnSetBit (_G.totRegAssigned, ssym->key); + + /* mark the registers as free */ + for (i = 0; i < ssym->nRegs; i++) { + if (ssym->regs[i]) { + freeReg (ssym->regs[i], FALSE); + // dont NULL ssym->regs[i], it might be used later + } + } + + /* if this was a block level spil then insert push & pop + at the start & end of block respectively */ + if (ssym->blockSpil) + { + iCode *nic = newiCode (IPUSH, operandFromSymbol (ssym), NULL); + /* add push to the start of the block */ + addiCodeToeBBlock (ebp, nic, (ebp->sch->op == LABEL ? + ebp->sch->next : ebp->sch)); + nic = newiCode (IPOP, operandFromSymbol (ssym), NULL); + /* add pop to the end of the block */ + addiCodeToeBBlock (ebp, nic, NULL); + } + + /* if spilt because not used in the remainder of the + block then add a push before this instruction and + a pop at the end of the block */ + if (ssym->remainSpil) + { + + iCode *nic = newiCode (IPUSH, operandFromSymbol (ssym), NULL); + /* add push just before this instruction */ + addiCodeToeBBlock (ebp, nic, ic); + + nic = newiCode (IPOP, operandFromSymbol (ssym), NULL); + /* add pop to the end of the block */ + addiCodeToeBBlock (ebp, nic, NULL); + } + + if (ssym == forSym) + return FALSE; + else + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* getRegPtr - will try for PTR if not a GPR type if not spil */ +/*-----------------------------------------------------------------*/ +static bool getRegPtr (iCode * ic, eBBlock * ebp, symbol * sym, short offset) { + + D0(fprintf (stderr, "getRegPtr: %s ", sym->name)); + D0(printTypeChain(sym->type, stderr)); + D0(fprintf (stderr, "\n")); + + while (1) { + /* this looks like an infinite loop but + in really selectSpil will abort */ + + /* try for a ptr type */ + if (allocReg (getSize(sym->type), REG_PTR, sym, offset, FALSE)) + return TRUE; + + /* try for gpr type */ + if (xa51HasGprRegs && allocReg (getSize(sym->type), + REG_GPR, sym, offset, FALSE)) + return TRUE; + + /* we have to spil */ + if (!spillSomething (ic, ebp, sym)) + return FALSE; + + } +} + +/*-----------------------------------------------------------------*/ +/* getRegGpr - will try for GPR if not spil */ +/*-----------------------------------------------------------------*/ +static bool getRegGpr (iCode * ic, eBBlock * ebp, symbol * sym, short offset) { + + D0(fprintf (stderr, "getRegGpr: %s ", sym->name)); + D0(printTypeChain(sym->type, stderr)); + D0(fprintf (stderr, "\n")); + + while(1) { + /* this looks like an infinite loop but + in really selectSpil will abort */ + + /* try for gpr type */ + if (xa51HasGprRegs && allocReg (getSize(sym->type), + REG_GPR, sym, offset, FALSE)) + return TRUE; + + if (allocReg (getSize(sym->type), REG_PTR, sym, offset, FALSE)) + return TRUE; + + /* we have to spil */ + if (!spillSomething (ic, ebp, sym)) + return FALSE; + } +} + +/*-----------------------------------------------------------------*/ +/* deassignLRs - check the live to and if they have registers & are */ +/* not spilt then free up the registers */ +/*-----------------------------------------------------------------*/ +static void +deassignLRs (iCode * ic, eBBlock * ebp) +{ + symbol *sym; + int k; + + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) + { + /* if it does not end here */ + if (sym->liveTo > ic->seq) + continue; + + /* if it was spilt on stack then we can + mark the stack spil location as free */ + if (sym->isspilt) + { + if (sym->stackSpil) + { + sym->usl.spillLoc->isFree = 1; + sym->stackSpil = 0; + } + continue; + } + + if (!bitVectBitValue (_G.regAssigned, sym->key)) + continue; + + if (sym->nRegs) { + int i; + + bitVectUnSetBit (_G.regAssigned, sym->key); + + /* free the regs */ + for (i=0; i < sym->nRegs; i++) { + freeReg (sym->regs[i], FALSE); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* willCauseSpill - determines if allocating will cause a spill */ +/*-----------------------------------------------------------------*/ +static bool willCauseSpill (symbol *sym) { + int i; + // do it the rude way + if (allocReg (getSize(sym->type), sym->regType, sym, 0, TRUE) || + allocReg (getSize(sym->type), sym->regType==REG_PTR?REG_GPR:REG_PTR, + sym, 0, TRUE)) { + // so we can, but we won't + for (i=0; inRegs; i++) { + freeReg (sym->regs[i], TRUE); + sym->regs[i]=NULL; + } + return FALSE; + } + D1(fprintf (stderr, " %s will cause a spill\n", sym->name)); + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* positionRegs - the allocator can allocate same registers to res- */ +/* ult and operand, if this happens make sure they are in the same */ +/* position as the operand otherwise chaos results */ +/*-----------------------------------------------------------------*/ +static int +positionRegs (symbol * result, symbol * opsym) +{ + int count = min (result->nRegs, opsym->nRegs); + int i, j = 0, shared = 0; + int changed = 0; + + /* if the result has been spilt then cannot share */ + if (opsym->isspilt) + return 0; + again: + shared = 0; + /* first make sure that they actually share */ + for (i = 0; i < count; i++) + { + for (j = 0; j < count; j++) + { + if (result->regs[i] == opsym->regs[j] && i != j) + { + shared = 1; + goto xchgPositions; + } + } + } + xchgPositions: + if (shared) + { + regs *tmp = result->regs[i]; + result->regs[i] = result->regs[j]; + result->regs[j] = tmp; + changed ++; + D2(fprintf (stderr, "positionRegs: rearranged regs for %s and %s\n", + result->name, opsym->name)); + goto again; + } + return changed; +} + +/*-----------------------------------------------------------------*/ +/* serialRegAssign - serially allocate registers to the variables */ +/*-----------------------------------------------------------------*/ +static void +serialRegAssign (eBBlock ** ebbs, int count) +{ + int i; + + /* for all blocks */ + for (i = 0; i < count; i++) { + + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + /* of all instructions do */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) { + + /* if result is present && is a true symbol */ + if (IC_RESULT (ic) && ic->op != IFX && + IS_TRUE_SYMOP (IC_RESULT (ic))) { + OP_SYMBOL (IC_RESULT (ic))->allocreq++; + } + + /* take away registers from live + ranges that end at this instruction */ + deassignLRs (ic, ebbs[i]); + + /* some don't need registers */ + if (SKIP_IC2 (ic) || + ic->op == JUMPTABLE || + ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP || + (IC_RESULT (ic) && POINTER_SET (ic))) + continue; + + /* now we need to allocate registers + only for the result */ + if (IC_RESULT (ic)) { + symbol *sym = OP_SYMBOL (IC_RESULT (ic)); + bitVect *spillable; + int willCS; + + /* Make sure any spill location is definately allocated */ + if (sym->isspilt && !sym->remat && sym->usl.spillLoc && + !sym->usl.spillLoc->allocreq) { + sym->usl.spillLoc->allocreq++; + } + + /* if it does not need or is spilt + or is already assigned to registers + or will not live beyond this instructions */ + if (!sym->nRegs || + sym->isspilt || + bitVectBitValue (_G.regAssigned, sym->key) || + sym->liveTo <= ic->seq) + continue; + + /* if some liverange has been spilt at the block level + and this one live beyond this block then spil this + to be safe */ + if (_G.blockSpil && sym->liveTo > ebbs[i]->lSeq) { + spillThis (sym); + continue; + } + /* if trying to allocate this will cause + a spill and there is nothing to spill + or this one is rematerializable then + spill this one */ + willCS = willCauseSpill (sym); + spillable = computeSpillable (ic); + if (sym->remat || (willCS && bitVectIsZero (spillable))) { + spillThis (sym); + continue; + } + + /* If the live range preceeds the point of definition + then ideally we must take into account registers that + have been allocated after sym->liveFrom but freed + before ic->seq. This is complicated, so spill this + symbol instead and let fillGaps handle the allocation. */ + if (sym->liveFrom < ic->seq) { + spillThis (sym); + continue; + } + + /* if it has a spillocation & is used less than + all other live ranges then spill this */ + if (willCS) { + if (sym->usl.spillLoc) { + symbol *leastUsed = leastUsedLR (liveRangesWith (spillable, + allLRs, ebbs[i], ic)); + if (leastUsed && leastUsed->used > sym->used) { + spillThis (sym); + continue; + } + } else { + /* if none of the liveRanges have a spillLocation then better + to spill this one than anything else already assigned to registers */ + if (liveRangesWith(spillable,noSpilLoc,ebbs[i],ic)) { + /* if this is local to this block then we might find a block spil */ + if (!(sym->liveFrom >= ebbs[i]->fSeq && sym->liveTo <= ebbs[i]->lSeq)) { + spillThis (sym); + continue; + } + } + } + } + + /* else we assign registers to it */ + _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); + _G.totRegAssigned = bitVectSetBit (_G.totRegAssigned, sym->key); + + if (sym->regType == REG_PTR) + getRegPtr (ic, ebbs[i], sym, 0); + else + getRegGpr (ic, ebbs[i], sym, 0); + + /* if it shares registers with operands make sure + that they are in the same position */ + if (IC_LEFT (ic) && IS_SYMOP (IC_LEFT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->nRegs && ic->op != '=') { + positionRegs (OP_SYMBOL (IC_RESULT (ic)), + OP_SYMBOL (IC_LEFT (ic))); + } + /* do the same for the right operand */ + if (IC_RIGHT (ic) && IS_SYMOP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->nRegs) { + positionRegs (OP_SYMBOL (IC_RESULT (ic)), + OP_SYMBOL (IC_RIGHT (ic))); + } + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* rUmaskForOp :- returns register mask for an operand */ +/*-----------------------------------------------------------------*/ +bitVect *xa51_rUmaskForOp (operand * op) { + bitVect *rumask; + symbol *sym; + int j; + + /* only temporaries are assigned registers */ + if (!IS_ITEMP (op)) + return NULL; + + sym = OP_SYMBOL (op); + + /* if spilt or no registers assigned to it + then nothing */ + if (sym->isspilt || !sym->nRegs || !sym->regs[0]) + return NULL; + + rumask = newBitVect (xa51_nRegs); + + for (j = 0; j < sym->nRegs; j++) { + rumask = bitVectSetBit (rumask, + sym->regs[j]->rIdx); + } + return rumask; +} + +/*-----------------------------------------------------------------*/ +/* regsUsedIniCode :- returns bit vector of registers used in iCode */ +/*-----------------------------------------------------------------*/ +static bitVect * +regsUsedIniCode (iCode * ic) +{ + bitVect *rmask = newBitVect (xa51_nRegs); + + /* do the special cases first */ + if (ic->op == IFX) + { + rmask = bitVectUnion (rmask, + xa51_rUmaskForOp (IC_COND (ic))); + goto ret; + } + + /* for the jumptable */ + if (ic->op == JUMPTABLE) + { + rmask = bitVectUnion (rmask, + xa51_rUmaskForOp (IC_JTCOND (ic))); + + goto ret; + } + + /* of all other cases */ + if (IC_LEFT (ic)) + rmask = bitVectUnion (rmask, + xa51_rUmaskForOp (IC_LEFT (ic))); + + + if (IC_RIGHT (ic)) + rmask = bitVectUnion (rmask, + xa51_rUmaskForOp (IC_RIGHT (ic))); + + if (IC_RESULT (ic)) + rmask = bitVectUnion (rmask, + xa51_rUmaskForOp (IC_RESULT (ic))); + + ret: + return rmask; +} + +/*-----------------------------------------------------------------*/ +/* createRegMask - for each instruction will determine the regsUsed */ +/*-----------------------------------------------------------------*/ +static void +createRegMask (eBBlock ** ebbs, int count) +{ + int i; + + /* for all blocks */ + for (i = 0; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + /* for all instructions */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + + int j; + + if (SKIP_IC2 (ic) || !ic->rlive) + continue; + + /* first mark the registers used in this + instruction */ + ic->rUsed = regsUsedIniCode (ic); + _G.funcrUsed = bitVectUnion (_G.funcrUsed, ic->rUsed); + + /* now create the register mask for those + registers that are in use : this is a + super set of ic->rUsed */ + ic->rMask = newBitVect (xa51_nRegs + 1); + + /* for all live Ranges alive at this point */ + for (j = 1; j < ic->rlive->size; j++) + { + symbol *sym; + int k; + + /* if not alive then continue */ + if (!bitVectBitValue (ic->rlive, j)) + continue; + + /* find the live range we are interested in */ + if (!(sym = hTabItemWithKey (liveRanges, j))) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "createRegMask cannot find live range"); + exit (0); + } + + /* if no register assigned to it */ + if (!sym->nRegs || sym->isspilt) + continue; + + /* for all the registers allocated to it */ + for (k = 0; k < sym->nRegs; k++) + if (sym->regs[k]) + ic->rMask = + bitVectSetBit (ic->rMask, sym->regs[k]->rIdx); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* rematStr - returns the rematerialized string for a remat var */ +/*-----------------------------------------------------------------*/ +static char * +rematStr (symbol * sym) +{ + char *s = buffer; + iCode *ic = sym->rematiCode; + + while (1) + { + + /* if plus or minus print the right hand side */ + if (ic->op == '+' || ic->op == '-') + { + sprintf (s, "0x%04x %c ", (int) operandLitValue (IC_RIGHT (ic)), + ic->op); + s += strlen (s); + ic = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + continue; + } + + /* cast then continue */ + if (IS_CAST_ICODE(ic)) { + ic = OP_SYMBOL (IC_RIGHT (ic))->rematiCode; + continue; + } + /* we reached the end */ + sprintf (s, "%s", OP_SYMBOL (IC_LEFT (ic))->rname); + break; + } + + return buffer; +} + +/*-----------------------------------------------------------------*/ +/* regTypeNum - computes the type & number of registers required */ +/*-----------------------------------------------------------------*/ +static void +regTypeNum (eBBlock *ebbs) +{ + symbol *sym; + int k; + iCode *ic; + + /* for each live range do */ + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) + { + + /* if used zero times then no registers needed */ + if ((sym->liveTo - sym->liveFrom) == 0) + continue; + + + /* if the live range is a temporary */ + if (sym->isitmp) + { + + /* if the type is marked as a conditional */ + if (sym->regType == REG_CND) + continue; + + /* if used in return only then we don't + need registers */ +#if 0 // not yet + if (sym->ruonly || sym->accuse) + { + if (IS_AGGREGATE (sym->type) || sym->isptr) + sym->type = aggrToPtr (sym->type, FALSE); + continue; + } +#endif + + /* if the symbol has only one definition & + that definition is a get_pointer */ + if (bitVectnBitsOn (sym->defs) == 1 && + (ic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (sym->defs))) && + POINTER_GET (ic) && + !sym->noSpilLoc && + !IS_BITVAR (sym->etype)) + { + /* and that pointer is remat in data space */ + if (OP_SYMBOL (IC_LEFT (ic))->remat && + !IS_CAST_ICODE(OP_SYMBOL (IC_LEFT (ic))->rematiCode) && + DCL_TYPE (aggrToPtr (operandType(IC_LEFT(ic)), FALSE)) == POINTER) + { + /* create a psuedo symbol & force a spil */ + symbol *psym = newSymbol (rematStr (OP_SYMBOL (IC_LEFT (ic))), 1); + psym->type = sym->type; + psym->etype = sym->etype; + strcpy (psym->rname, psym->name); + sym->isspilt = 1; + sym->usl.spillLoc = psym; +#if 0 // an alternative fix for bug #480076 + /* now this is a useless assignment to itself */ + remiCodeFromeBBlock (ebbs, ic); +#else + /* now this really is an assignment to itself, make it so; + it will be optimized out later */ + ic->op='='; + IC_RIGHT(ic)=IC_RESULT(ic); + IC_LEFT(ic)=NULL; +#endif + continue; + } + + /* if in data space or idata space then try to + allocate pointer register */ + + } + + /* if not then we require registers */ +#if 0 + sym->nRegs = ((IS_AGGREGATE (sym->type) || sym->isptr) ? + getSize (sym->type = aggrToPtr (sym->type, FALSE)) : + getSize (sym->type)); +#else + { + int size=((IS_AGGREGATE (sym->type) || sym->isptr) ? + getSize (sym->type = aggrToPtr (sym->type, FALSE)) : + getSize (sym->type)); + switch (size) + { + case 1: // byte + case 2: // word or pointer + sym->nRegs=1; + break; + case 3: // generic pointer + sym->nRegs=2; + break; + case 4: // dword or float + sym->nRegs=2; + break; + default: + fprintf (stderr, "regTypeNum: unknown size\n"); + exit (1); + } + } +#endif + + if (sym->nRegs > 4) + { + fprintf (stderr, "allocated more than 4 or 0 registers for type "); + printTypeChain (sym->type, stderr); + fprintf (stderr, "\n"); + exit (1); + } + + /* determine the type of register required */ + if (IS_PTR (sym->type)) + sym->regType = REG_PTR; + else + sym->regType = REG_GPR; + + } + else + /* for the first run we don't provide */ + /* registers for true symbols we will */ + /* see how things go */ + sym->nRegs = 0; + } + +} + +/*-----------------------------------------------------------------*/ +/* deallocStackSpil - this will set the stack pointer back */ +/*-----------------------------------------------------------------*/ +static +DEFSETFUNC (deallocStackSpil) +{ + symbol *sym = item; + + deallocLocal (sym); + return 0; +} + +/*-----------------------------------------------------------------*/ +/* packRegsForAssign - register reduction for assignment */ +/*-----------------------------------------------------------------*/ +static int +packRegsForAssign (iCode * ic, eBBlock * ebp) +{ + iCode *dic, *sic; + + if (!IS_ITEMP (IC_RIGHT (ic)) || + OP_LIVETO (IC_RIGHT (ic)) > ic->seq) { + return 0; + } + + /* find the definition of iTempNN scanning backwards */ + for (dic = ic->prev; dic; dic = dic->prev) { + + /* if there is a function call then don't pack it */ + if ((dic->op == CALL || dic->op == PCALL)) { + dic = NULL; + break; + } + + if (SKIP_IC2 (dic)) + continue; + + if (IS_SYMOP (IC_RESULT (dic)) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) { + break; + } + + } + + if (!dic) + return 0; /* did not find */ + + /* found the definition */ + /* replace the result with the result of */ + /* this assignment and remove this assignment */ + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + IC_RESULT (dic) = IC_RESULT (ic); + + if (IS_ITEMP (IC_RESULT (dic)) && + OP_SYMBOL (IC_RESULT (dic))->liveFrom > dic->seq) + { + OP_SYMBOL (IC_RESULT (dic))->liveFrom = dic->seq; + } + /* delete from liverange table also + delete from all the points inbetween and the new + one */ + for (sic = dic; sic != ic; sic = sic->next) + { + bitVectUnSetBit (sic->rlive, IC_RESULT (ic)->key); + if (IS_ITEMP (IC_RESULT (dic))) + bitVectSetBit (sic->rlive, IC_RESULT (dic)->key); + } + + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS(IC_RESULT (dic))=bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + return 1; + +} + +/*-----------------------------------------------------------------*/ +/* findAssignToSym : scanning backwards looks for first assig found */ +/*-----------------------------------------------------------------*/ +static iCode * +findAssignToSym (operand * op, iCode * ic) +{ + iCode *dic; + + for (dic = ic->prev; dic; dic = dic->prev) + { + + /* if definition by assignment */ + if (dic->op == '=' && + !POINTER_SET (dic) && + IC_RESULT (dic)->key == op->key + /* && IS_TRUE_SYMOP(IC_RIGHT(dic)) */ + ) + { + + /* we are interested only if defined in far space */ + /* or in stack space in case of + & - */ + + /* if assigned to a non-symbol then return + FALSE */ + if (!IS_SYMOP (IC_RIGHT (dic))) + return NULL; + + /* if the symbol is in far space then + we should not */ + if (isOperandInFarSpace (IC_RIGHT (dic))) + return NULL; + + /* for + & - operations make sure that + if it is on the stack it is the same + as one of the three operands */ + if ((ic->op == '+' || ic->op == '-') && + OP_SYMBOL (IC_RIGHT (dic))->onStack) + { + + if (IC_RESULT (ic)->key != IC_RIGHT (dic)->key && + IC_LEFT (ic)->key != IC_RIGHT (dic)->key && + IC_RIGHT (ic)->key != IC_RIGHT (dic)->key) + return NULL; + } + + break; + + } + + /* if we find an usage then we cannot delete it */ + if (IC_LEFT (dic) && IC_LEFT (dic)->key == op->key) + return NULL; + + if (IC_RIGHT (dic) && IC_RIGHT (dic)->key == op->key) + return NULL; + + if (POINTER_SET (dic) && IC_RESULT (dic)->key == op->key) + return NULL; + } + + /* now make sure that the right side of dic + is not defined between ic & dic */ + if (dic) + { + iCode *sic = dic->next; + + for (; sic != ic; sic = sic->next) + if (IC_RESULT (sic) && + IC_RESULT (sic)->key == IC_RIGHT (dic)->key) + return NULL; + } + + return dic; + + +} + +/*-----------------------------------------------------------------*/ +/* packRegsForSupport :- reduce some registers for support calls */ +/*-----------------------------------------------------------------*/ +static int +packRegsForSupport (iCode * ic, eBBlock * ebp) +{ + int change = 0; + iCode *dic, *sic; + + /* for the left & right operand :- look to see if the + left was assigned a true symbol in far space in that + case replace them */ + + if (IS_ITEMP (IC_LEFT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->liveTo <= ic->seq) + { + dic = findAssignToSym (IC_LEFT (ic), ic); + + if (!dic) + goto right; + + /* found it we need to remove it from the + block */ + for (sic = dic; sic != ic; sic = sic->next) + bitVectUnSetBit (sic->rlive, IC_LEFT (ic)->key); + + OP_SYMBOL(IC_LEFT (ic))=OP_SYMBOL(IC_RIGHT (dic)); + IC_LEFT (ic)->key = OP_SYMBOL(IC_RIGHT (dic))->key; + remiCodeFromeBBlock (ebp, dic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); + change++; + } + + /* do the same for the right operand */ + right: + if (!change && + IS_ITEMP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->liveTo <= ic->seq) + { + iCode *dic = findAssignToSym (IC_RIGHT (ic), ic); + iCode *sic; + + if (!dic) + return change; + + /* if this is a subtraction & the result + is a true symbol in far space then don't pack */ + if (ic->op == '-' && IS_TRUE_SYMOP (IC_RESULT (dic))) + { + sym_link *etype = getSpec (operandType (IC_RESULT (dic))); + if (IN_FARSPACE (SPEC_OCLS (etype))) + return change; + } + /* found it we need to remove it from the + block */ + for (sic = dic; sic != ic; sic = sic->next) + bitVectUnSetBit (sic->rlive, IC_RIGHT (ic)->key); + + IC_RIGHT (ic)->operand.symOperand = + IC_RIGHT (dic)->operand.symOperand; + IC_RIGHT (ic)->key = IC_RIGHT (dic)->operand.symOperand->key; + + remiCodeFromeBBlock (ebp, dic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); + change++; + } + + return change; +} + + +/*-----------------------------------------------------------------*/ +/* packRegsForOneuse : - will reduce some registers for single Use */ +/*-----------------------------------------------------------------*/ +static iCode * +packRegsForOneuse (iCode * ic, operand * op, eBBlock * ebp) +{ + bitVect *uses; + iCode *dic, *sic; + + /* if returning a literal then do nothing */ + if (!IS_SYMOP (op)) + return NULL; + + if (ic->op != RETURN && + ic->op != SEND && + !POINTER_SET (ic) && + !POINTER_GET (ic)) + return NULL; + + /* this routine will mark the a symbol as used in one + instruction use only && if the defintion is local + (ie. within the basic block) && has only one definition && + that definiion is either a return value from a + function or does not contain any variables in + far space */ + uses = bitVectCopy (OP_USES (op)); + bitVectUnSetBit (uses, ic->key); /* take away this iCode */ + if (!bitVectIsZero (uses)) /* has other uses */ + return NULL; + + /* if it has only one defintion */ + if (bitVectnBitsOn (OP_DEFS (op)) > 1) + return NULL; /* has more than one definition */ + + /* get that definition */ + if (!(dic = + hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_DEFS (op))))) + return NULL; + +#if 0 + /* if that only usage is a cast */ + if (dic->op == CAST) { + /* to a bigger type */ + if (getSize(OP_SYM_TYPE(IC_RESULT(dic))) > + getSize(OP_SYM_TYPE(IC_RIGHT(dic)))) { + /* than we can not, since we cannot predict the usage of b & acc */ + return NULL; + } + } +#endif + + /* found the definition now check if it is local */ + if (dic->seq < ebp->fSeq || + dic->seq > ebp->lSeq) + return NULL; /* non-local */ + + /* now check if it is the return from + a function call */ + if (dic->op == CALL || dic->op == PCALL) + { + if (ic->op != SEND && ic->op != RETURN && + !POINTER_SET(ic) && !POINTER_GET(ic)) + { + OP_SYMBOL (op)->ruonly = 1; + return dic; + } + dic = dic->next; + } + +#if 0 + /* otherwise check that the definition does + not contain any symbols in far space */ + if (isOperandInFarSpace (IC_LEFT (dic)) || + isOperandInFarSpace (IC_RIGHT (dic)) || + IS_OP_RUONLY (IC_LEFT (ic)) || + IS_OP_RUONLY (IC_RIGHT (ic))) + { + return NULL; + } +#endif + +#if 0 + /* if pointer set then make sure the pointer + is one byte */ + if (POINTER_SET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_RESULT (dic)), FALSE))) + return NULL; + + if (POINTER_GET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_LEFT (dic)), FALSE))) + return NULL; +#endif + + sic = dic; + + /* also make sure the intervenening instructions + don't have any thing in far space */ + for (dic = dic->next; dic && dic != ic && sic != ic; dic = dic->next) + { + + /* if there is an intervening function call then no */ + if (dic->op == CALL || dic->op == PCALL) + return NULL; + +#if 0 + /* if pointer set then make sure the pointer + is one byte */ + if (POINTER_SET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_RESULT (dic)), FALSE))) + return NULL; + + if (POINTER_GET (dic) && + !IS_DATA_PTR (aggrToPtr (operandType (IC_LEFT (dic)), FALSE))) + return NULL; +#endif + + /* if address of & the result is remat the okay */ + if (dic->op == ADDRESS_OF && + OP_SYMBOL (IC_RESULT (dic))->remat) + continue; + +#if 0 + /* if operand has size of three or more & this + operation is a '*','/' or '%' then 'b' may + cause a problem */ + if ((dic->op == '%' || dic->op == '/' || dic->op == '*') && + getSize (operandType (op)) >= 3) + return NULL; +#endif + +#if 0 + /* if left or right or result is in far space */ + if (isOperandInFarSpace (IC_LEFT (dic)) || + isOperandInFarSpace (IC_RIGHT (dic)) || + isOperandInFarSpace (IC_RESULT (dic)) || + IS_OP_RUONLY (IC_LEFT (dic)) || + IS_OP_RUONLY (IC_RIGHT (dic)) || + IS_OP_RUONLY (IC_RESULT (dic))) + { + return NULL; + } + /* if left or right or result is on stack */ + if (isOperandOnStack(IC_LEFT(dic)) || + isOperandOnStack(IC_RIGHT(dic)) || + isOperandOnStack(IC_RESULT(dic))) { + return NULL; + } +#endif + } + + OP_SYMBOL (op)->ruonly = 1; + fprintf (stderr, "%s is used only once in line %d.\n", + OP_SYMBOL(op)->name, ic->lineno); + return sic; + +} + +/*-----------------------------------------------------------------*/ +/* isBitwiseOptimizable - requirements of JEAN LOUIS VERN */ +/*-----------------------------------------------------------------*/ +static bool +isBitwiseOptimizable (iCode * ic) +{ + sym_link *ltype = getSpec (operandType (IC_LEFT (ic))); + sym_link *rtype = getSpec (operandType (IC_RIGHT (ic))); + + /* bitwise operations are considered optimizable + under the following conditions (Jean-Louis VERN) + + x & lit + bit & bit + bit & x + bit ^ bit + bit ^ x + x ^ lit + x | lit + bit | bit + bit | x + */ + if (IS_LITERAL(rtype) || + (IS_BITVAR (ltype) && IN_BITSPACE (SPEC_OCLS (ltype)))) + return TRUE; + else + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* packForPush - hueristics to reduce iCode for pushing */ +/*-----------------------------------------------------------------*/ +static void +packForPush (iCode * ic, eBBlock * ebp) +{ + iCode *dic, *lic; + bitVect *dbv; + + if (ic->op != IPUSH || !IS_ITEMP (IC_LEFT (ic))) + return; + + /* must have only definition & one usage */ + if (bitVectnBitsOn (OP_DEFS (IC_LEFT (ic))) != 1 || + bitVectnBitsOn (OP_USES (IC_LEFT (ic))) != 1) + return; + + /* find the definition */ + if (!(dic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_DEFS (IC_LEFT (ic)))))) + return; + + if (dic->op != '=' || POINTER_SET (dic)) + return; + + /* make sure the right side does not have any definitions + inbetween */ + dbv = OP_DEFS(IC_RIGHT(dic)); + for (lic = ic; lic && lic != dic ; lic = lic->prev) { + if (bitVectBitValue(dbv,lic->key)) + return ; + } + /* make sure they have the same type */ + { + sym_link *itype=operandType(IC_LEFT(ic)); + sym_link *ditype=operandType(IC_RIGHT(dic)); + + if (SPEC_USIGN(itype)!=SPEC_USIGN(ditype) || + SPEC_LONG(itype)!=SPEC_LONG(ditype)) + return; + } + /* extend the live range of replaced operand if needed */ + if (OP_SYMBOL(IC_RIGHT(dic))->liveTo < ic->seq) { + OP_SYMBOL(IC_RIGHT(dic))->liveTo = ic->seq; + } + /* we now know that it has one & only one def & use + and the that the definition is an assignment */ + IC_LEFT (ic) = IC_RIGHT (dic); + + remiCodeFromeBBlock (ebp, dic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); +} + +/*-----------------------------------------------------------------*/ +/* packRegisters - does some transformations to reduce register */ +/* pressure */ +/*-----------------------------------------------------------------*/ +static void packRegisters (eBBlock * ebp) { + iCode *ic; + int change = 0; + + while (1) { + change = 0; + + for (ic = ebp->sch; ic; ic = ic->next) { + if (ic->op == '=') + change += packRegsForAssign (ic, ebp); + } + + if (!change) + break; + } + + for (ic = ebp->sch; ic; ic = ic->next) + { + /* if the condition of an if instruction + is defined in the previous instruction and + this is the only usage then + mark the itemp as a conditional */ + if ((IS_CONDITIONAL (ic) || + (IS_BITWISE_OP(ic) && isBitwiseOptimizable (ic)))) { + if (ic->next && ic->next->op == IFX && + bitVectnBitsOn (OP_USES(IC_RESULT(ic)))==1 && + isOperandEqual (IC_RESULT (ic), IC_COND (ic->next)) && + OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq) { + OP_SYMBOL (IC_RESULT (ic))->regType = REG_CND; + continue; + } + } + +#if 0 + /* if this is an itemp & result of an address of a true sym + then mark this as rematerialisable */ + if (ic->op == ADDRESS_OF && + IS_ITEMP (IC_RESULT (ic)) && + IS_TRUE_SYMOP (IC_LEFT (ic)) && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1 && + !OP_SYMBOL (IC_LEFT (ic))->onStack) + { + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + } + + /* if straight assignment then carry remat flag if + this is the only definition */ + if (ic->op == '=' && + !POINTER_SET (ic) && + IS_SYMOP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->remat && + !IS_CAST_ICODE(OP_SYMBOL (IC_RIGHT (ic))->rematiCode) && + bitVectnBitsOn (OP_SYMBOL (IC_RESULT (ic))->defs) <= 1) + { + + OP_SYMBOL (IC_RESULT (ic))->remat = + OP_SYMBOL (IC_RIGHT (ic))->remat; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = + OP_SYMBOL (IC_RIGHT (ic))->rematiCode; + } + + /* if cast to a generic pointer & the pointer being + cast is remat, then we can remat this cast as well */ + if (ic->op == CAST && + IS_SYMOP(IC_RIGHT(ic)) && + OP_SYMBOL(IC_RIGHT(ic))->remat ) { + sym_link *to_type = operandType(IC_LEFT(ic)); + sym_link *from_type = operandType(IC_RIGHT(ic)); + if (IS_GENPTR(to_type) && IS_PTR(from_type)) { + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + } + } + + /* if this is a +/- operation with a rematerizable + then mark this as rematerializable as well */ + if ((ic->op == '+' || ic->op == '-') && + (IS_SYMOP (IC_LEFT (ic)) && + IS_ITEMP (IC_RESULT (ic)) && + IS_OP_LITERAL (IC_RIGHT (ic))) && + OP_SYMBOL (IC_LEFT (ic))->remat && + (!IS_SYMOP (IC_RIGHT (ic)) || !IS_CAST_ICODE(OP_SYMBOL (IC_RIGHT (ic))->rematiCode)) && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1) + { + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + } +#endif + + /* mark the pointer usages */ + if (POINTER_SET (ic)) + OP_SYMBOL (IC_RESULT (ic))->uptr = 1; + + if (POINTER_GET (ic)) + OP_SYMBOL (IC_LEFT (ic))->uptr = 1; + + /* reduce for support function calls */ + if (ic->supportRtn || ic->op == '+' || ic->op == '-') + packRegsForSupport (ic, ebp); + + /* some cases the redundant moves can + can be eliminated for return statements */ + if (ic->op == RETURN || ic->op == SEND) { + packRegsForOneuse (ic, IC_LEFT (ic), ebp); + } + + /* if pointer set & left has a size more than + one and right is not in far space */ + if (POINTER_SET (ic) && + !isOperandInFarSpace (IC_RIGHT (ic)) && + !OP_SYMBOL (IC_RESULT (ic))->remat && + !IS_OP_RUONLY (IC_RIGHT (ic)) && + getSize (aggrToPtr (operandType (IC_RESULT (ic)), FALSE)) > 1) + + packRegsForOneuse (ic, IC_RESULT (ic), ebp); + + /* if pointer get */ + if (POINTER_GET (ic) && + !isOperandInFarSpace (IC_RESULT (ic)) && + !OP_SYMBOL (IC_LEFT (ic))->remat && + !IS_OP_RUONLY (IC_RESULT (ic)) && + getSize (aggrToPtr (operandType (IC_LEFT (ic)), FALSE)) > 1) + + packRegsForOneuse (ic, IC_LEFT (ic), ebp); + + + /* if this is cast for intergral promotion then + check if only use of the definition of the + operand being casted/ if yes then replace + the result of that arithmetic operation with + this result and get rid of the cast */ + if (ic->op == CAST) + { + sym_link *fromType = operandType (IC_RIGHT (ic)); + sym_link *toType = operandType (IC_LEFT (ic)); + + if (IS_INTEGRAL (fromType) && IS_INTEGRAL (toType) && + getSize (fromType) != getSize (toType) && + SPEC_USIGN (fromType) == SPEC_USIGN (toType)) + { + + iCode *dic = packRegsForOneuse (ic, IC_RIGHT (ic), ebp); + if (dic) + { + if (IS_ARITHMETIC_OP (dic)) + { + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + IC_RESULT (dic) = IC_RESULT (ic); + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS(IC_RESULT (dic))=bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + ic = ic->prev; + } + else + OP_SYMBOL (IC_RIGHT (ic))->ruonly = 0; + } + } + else + { + + /* if the type from and type to are the same + then if this is the only use then packit */ + if (compareType (operandType (IC_RIGHT (ic)), + operandType (IC_LEFT (ic))) == 1) + { + iCode *dic = packRegsForOneuse (ic, IC_RIGHT (ic), ebp); + if (dic) + { + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + IC_RESULT (dic) = IC_RESULT (ic); + remiCodeFromeBBlock (ebp, ic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS(IC_RESULT (dic))=bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + ic = ic->prev; + } + } + } + } + + /* pack for PUSH + iTempNN := (some variable in farspace) V1 + push iTempNN ; + ------------- + push V1 + */ + if (ic->op == IPUSH) + { + packForPush (ic, ebp); + } + } +} + +/*-----------------------------------------------------------------*/ +/* assignRegisters - assigns registers to each live range as need */ +/*-----------------------------------------------------------------*/ +void +xa51_assignRegisters (ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->bbOrder; + int count = ebbi->count; + iCode *ic; + int i; + + setToNull ((void *) &_G.funcrUsed); + setToNull ((void *) &_G.totRegAssigned); + _G.stackExtend = 0; + + /* change assignments this will remove some + live ranges reducing some register pressure */ + for (i = 0; i < count; i++) + packRegisters (ebbs[i]); + + /* liveranges probably changed by register packing + so we compute them again */ + recomputeLiveRanges (ebbs, count); + + if (options.dump_pack) + dumpEbbsToFileExt (DUMP_PACK, ebbi); + + /* first determine for each live range the number of + registers & the type of registers required for each */ + regTypeNum (*ebbs); + + /* and serially allocate registers */ + serialRegAssign (ebbs, count); + + freeAllRegs (); + + /* if stack was extended then tell the user */ + if (_G.stackExtend) + { + werror(I_EXTENDED_STACK_SPILS, + _G.stackExtend,currFunc->name,""); + _G.stackExtend = 0; + } + + /* after that create the register mask + for each of the instruction */ + createRegMask (ebbs, count); + + /* redo that offsets for stacked automatic variables */ + redoStackOffsets (); + + if (options.dump_rassgn) + { + dumpEbbsToFileExt (DUMP_RASSGN, ebbi); + dumpLiveRanges (DUMP_LRANGE, liveRanges); + } + + /* do the overlaysegment stuff SDCCmem.c */ + doOverlays (ebbs, count); + + /* now get back the chain */ + ic = iCodeLabelOptimize (iCodeFromeBBlock (ebbs, count)); + + genXA51Code (ic); + + /* free up any _G.stackSpil locations allocated */ + applyToSet (_G.stackSpil, deallocStackSpil); + _G.slocNum = 0; + setToNull ((void *) &_G.stackSpil); + setToNull ((void *) &_G.spiltSet); + /* mark all registers as free */ + freeAllRegs (); + + return; +} diff --git a/src/xa51/ralloc.h b/src/xa51/ralloc.h new file mode 100644 index 0000000..229611d --- /dev/null +++ b/src/xa51/ralloc.h @@ -0,0 +1,62 @@ +/*------------------------------------------------------------------------- + + SDCCralloc.h - header file register allocation + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "SDCCicode.h" +#include "SDCCBBlock.h" +#ifndef SDCCRALLOC_H +#define SDCCRALLOC_H 1 + +#define REG_PTR 0x01 // pointer register +#define REG_GPR 0x02 // general purpose register +#define REG_CND 0x04 // condition (bit) register +#define REG_SCR 0x40 // scratch register +#define REG_STK 0x80 // stack pointer register + +// register ID's +enum { + R0L_ID=0x10,R0H_ID,R1L_ID,R1H_ID,R2L_ID,R2H_ID,R3L_ID,R3H_ID, + R4L_ID,R4H_ID,R5L_ID,R5H_ID,R6L_ID,R6H_ID,R7L_ID,R7H_ID, + R0_ID=0x20, R1_ID, R2_ID, R3_ID, R4_ID, R5_ID, R6_ID, R7_ID, + R8_ID, I9_ID, R10_ID, R11_ID, R12_ID, R13_ID, R14_ID, R15_ID, + R0R1_ID=0x40, R2R3_ID, R4R5_ID, R6R7_ID +}; + +typedef struct regs { + unsigned char rIdx; // the register ID + unsigned char size; // size of register (1,2,4) + unsigned char type; // scratch, pointer, general purpose, stack, condition (bit) + char *name; + unsigned long regMask; + bool isFree; + symbol *sym; // used by symbol +} regs; + +extern regs regsXA51[]; +extern unsigned long xa51RegsInUse; + +regs *xa51_regWithIdx (int); + +bitVect *xa51_rUmaskForOp (operand * op); + +#endif diff --git a/src/xa51/xa51.dsp b/src/xa51/xa51.dsp new file mode 100644 index 0000000..4b164f0 --- /dev/null +++ b/src/xa51/xa51.dsp @@ -0,0 +1,120 @@ +# Microsoft Developer Studio Project File - Name="xa51" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Static Library" 0x0104 + +CFG=xa51 - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "xa51.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "xa51.mak" CFG="xa51 - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "xa51 - Win32 Debug" (based on "Win32 (x86) Static Library") +!MESSAGE "xa51 - Win32 Release" (based on "Win32 (x86) Static Library") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "xa51 - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /FR /FD /GZ /Zm500 /c +# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /FR /FD /GZ /Zm1000 /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LIB32=link.exe -lib +# ADD BASE LIB32 /nologo /out:"Debug\port.lib" +# ADD LIB32 /nologo /out:"Debug\port.lib" + +!ELSEIF "$(CFG)" == "xa51 - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /ML /W3 /GX /O2 /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /FD /Zm500 /c +# ADD CPP /nologo /ML /W3 /GX /O2 /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /FD /Zm1000 /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LIB32=link.exe -lib +# ADD BASE LIB32 /nologo /out:"Release\port.lib" +# ADD LIB32 /nologo /out:"Release\port.lib" + +!ENDIF + +# Begin Target + +# Name "xa51 - Win32 Debug" +# Name "xa51 - Win32 Release" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\gen.c +# End Source File +# Begin Source File + +SOURCE=.\main.c +# End Source File +# Begin Source File + +SOURCE=.\ralloc.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=.\gen.h +# End Source File +# Begin Source File + +SOURCE=.\main.h +# End Source File +# Begin Source File + +SOURCE=.\ralloc.h +# End Source File +# Begin Source File + +SOURCE=..\..\sdcc_vc.h +# End Source File +# End Group +# End Target +# End Project diff --git a/src/xa51/xa51a.dsp b/src/xa51/xa51a.dsp new file mode 100644 index 0000000..438877d --- /dev/null +++ b/src/xa51/xa51a.dsp @@ -0,0 +1,90 @@ +# Microsoft Developer Studio Project File - Name="xa51a" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Generic Project" 0x010a + +CFG=xa51a - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "xa51a.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "xa51a.mak" CFG="xa51a - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "xa51a - Win32 Debug" (based on "Win32 (x86) Generic Project") +!MESSAGE "xa51a - Win32 Release" (based on "Win32 (x86) Generic Project") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +MTL=midl.exe + +!IF "$(CFG)" == "xa51a - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "" +# PROP Intermediate_Dir "" +# PROP Target_Dir "" + +!ELSEIF "$(CFG)" == "xa51a - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "" +# PROP Intermediate_Dir "" +# PROP Target_Dir "" + +!ENDIF + +# Begin Target + +# Name "xa51a - Win32 Debug" +# Name "xa51a - Win32 Release" +# Begin Source File + +SOURCE=.\peeph.def + +!IF "$(CFG)" == "xa51a - Win32 Debug" + +# Begin Custom Build +InputPath=.\peeph.def + +"peeph.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph.rul + +# End Custom Build + +!ELSEIF "$(CFG)" == "xa51a - Win32 Release" + +# Begin Custom Build +InputPath=.\peeph.def + +"peeph.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph.rul + +# End Custom Build + +!ENDIF + +# End Source File +# End Target +# End Project diff --git a/src/yacc.dsp b/src/yacc.dsp new file mode 100644 index 0000000..52917f8 --- /dev/null +++ b/src/yacc.dsp @@ -0,0 +1,100 @@ +# Microsoft Developer Studio Project File - Name="yacc" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Generic Project" 0x010a + +CFG=yacc - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "yacc.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "yacc.mak" CFG="yacc - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "yacc - Win32 Debug" (based on "Win32 (x86) Generic Project") +!MESSAGE "yacc - Win32 Release" (based on "Win32 (x86) Generic Project") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +MTL=midl.exe + +!IF "$(CFG)" == "yacc - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Target_Dir "" + +!ELSEIF "$(CFG)" == "yacc - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Target_Dir "" + +!ENDIF + +# Begin Target + +# Name "yacc - Win32 Debug" +# Name "yacc - Win32 Release" +# Begin Source File + +SOURCE=.\SDCC.y + +!IF "$(CFG)" == "yacc - Win32 Debug" + +# Begin Custom Build +InputPath=.\SDCC.y + +BuildCmds= \ + bison -d -v -o sdccy.c sdcc.y + +"sdccy.c" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + $(BuildCmds) + +"sdccy.h" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + $(BuildCmds) +# End Custom Build + +!ELSEIF "$(CFG)" == "yacc - Win32 Release" + +# Begin Custom Build +InputPath=.\SDCC.y + +BuildCmds= \ + bison -d -v -o sdccy.c sdcc.y + +"sdccy.c" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + $(BuildCmds) + +"sdccy.h" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + $(BuildCmds) +# End Custom Build + +!ENDIF + +# End Source File +# End Target +# End Project diff --git a/src/z80/Makefile.bcc b/src/z80/Makefile.bcc new file mode 100644 index 0000000..093b84d --- /dev/null +++ b/src/z80/Makefile.bcc @@ -0,0 +1,23 @@ +# Makefile for Borland C++ + +PRJDIR = ../.. + +OBJ = gen.obj ralloc.obj main.obj support.obj peep.obj +LIB = port.lib + +!include $(PRJDIR)/Bcc.inc +CFLAGS = $(CFLAGS) -I.. -I$(PRJDIR) + +all: $(LIB) + +main.obj: main.c peeph.rul peeph-z80.rul peeph-gbz80.rul + +$(LIB): $(OBJ) + if exist $(LIB) del $(LIB) + tlib $@ @&&! ++$(**: = &^ ++) +! + +.def.rul: + gawk -f ../SDCCpeeph.awk $< > $@ diff --git a/src/z80/Makefile.in b/src/z80/Makefile.in new file mode 100644 index 0000000..dfb8a52 --- /dev/null +++ b/src/z80/Makefile.in @@ -0,0 +1,7 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ + +# Make all in this directory +include $(srcdir)/../port.mk diff --git a/src/z80/gen.c b/src/z80/gen.c new file mode 100644 index 0000000..a6e3a24 --- /dev/null +++ b/src/z80/gen.c @@ -0,0 +1,8619 @@ +/*------------------------------------------------------------------------- + gen.c - Z80 specific code generator. + + Michael Hope 2000 + Based on the mcs51 generator - + Sandeep Dutta . sandeep.dutta@usa.net (1998) + and - Jean-Louis VERN.jlvern@writeme.com (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + +-------------------------------------------------------------------------*/ + +/* + Benchmarks on dhry.c 2.1 with 32766 loops and a 10ms clock: + ticks dhry size + Base with asm strcpy / strcmp / memcpy: 23198 141 1A14 + Improved WORD push 22784 144 19AE + With label1 on 22694 144 197E + With label2 on 22743 144 198A + With label3 on 22776 144 1999 + With label4 on 22776 144 1999 + With all 'label' on 22661 144 196F + With loopInvariant on 20919 156 19AB + With loopInduction on Breaks 198B + With all working on 20796 158 196C + Slightly better genCmp(signed) 20597 159 195B + Better reg packing, first peephole 20038 163 1873 + With assign packing 19281 165 1849 + 5/3/00 17741 185 17B6 + With reg params for mul and div 16234 202 162D + + 1. Starting again at 3 Aug 01 34965 93 219C + No asm strings + Includes long mul/div in code + 2. Optimised memcpy for acc use 32102 102 226B + 3. Optimised strcpy for acc use 27819 117 2237 + 3a Optimised memcpy fun + 4. Optimised strcmp fun 21999 149 2294 + 5. Optimised strcmp further 21660 151 228C + 6. Optimised memcpy by unroling 20885 157 2201 + 7. After turning loop induction on 19862 165 236D + 8. Same as 7 but with more info + 9. With asm optimised strings 17030 192 2223 + + 10 and below are with asm strings off. + + 10 Mucho optimisations 13562 201 1FCC + + Apparent advantage of turning on regparams: + 1. Cost of push + Decent case is push of a constant + - ld hl,#n; push hl: (10+11)*nargs + 2. Cost of pull from stack + Using asm with ld hl, etc + - ld hl,#2; add hl,sp; (ld bc,(hl); hl+=2)*nargs + 10+11+(7+6+7+6)*nargs + 3. Cost of fixing stack + - pop hl*nargs + 10*nargs + + So cost is (10+11+7+6+7+10)*nargs+10+11 + = 51*nargs+21 + = 123 for mul, div, strcmp, strcpy + Saving of (98298+32766+32766+32766)*123 = 24181308 + At 192 d/s for 682411768t, speed up to 199. Hmm. +*/ + +#include +#include +#include +#include + +#include "z80.h" +#include "SDCCglobl.h" +#include "SDCCpeeph.h" +#include "gen.h" +#include "SDCCglue.h" +#include "newalloc.h" + +/* This is the down and dirty file with all kinds of kludgy & hacky + stuff. This is what it is all about CODE GENERATION for a specific MCU. + Some of the routines may be reusable, will have to see */ + +/* Z80 calling convention description. + Parameters are passed right to left. As the stack grows downwards, + the parameters are arranged in left to right in memory. + Parameters may be passed in the HL and DE registers with one + parameter per pair. + PENDING: What if the parameter is a long? + Everything is caller saves. i.e. the caller must save any registers + that it wants to preserve over the call. + GB: The return value is returned in DEHL. DE is normally used as a + working register pair. Caller saves allows it to be used for a + return value. + va args functions do not use register parameters. All arguments + are passed on the stack. + IX is used as an index register to the top of the local variable + area. ix-0 is the top most local variable. +*/ + +enum +{ + /* Set to enable debugging trace statements in the output assembly code. */ + DISABLE_DEBUG = 0 +}; + +static char *_z80_return[] = + {"l", "h", "e", "d"}; +static char *_gbz80_return[] = + {"e", "d", "l", "h"}; +static char *_fReceive[] = + { "c", "b", "e", "d" }; + +static char **_fReturn; +static char **_fTmp; + +extern struct dbuf_s *codeOutBuf; + +enum + { + INT8MIN = -128, + INT8MAX = 127 + }; + +/** Enum covering all the possible register pairs. + */ +typedef enum + { + PAIR_INVALID, + PAIR_AF, + PAIR_BC, + PAIR_DE, + PAIR_HL, + PAIR_IY, + PAIR_IX, + NUM_PAIRS + } PAIR_ID; + +static struct +{ + const char *name; + const char *l; + const char *h; +} _pairs[NUM_PAIRS] = { + { "??1", "?2", "?3" }, + { "af", "f", "a" }, + { "bc", "c", "b" }, + { "de", "e", "d" }, + { "hl", "l", "h" }, + { "iy", "iyl", "iyh" }, + { "ix", "ixl", "ixh" } +}; + +// PENDING +#define ACC_NAME _pairs[PAIR_AF].h + +enum + { + LSB, + MSB16, + MSB24, + MSB32 + }; + +/** Code generator persistent data. + */ +static struct +{ + /** Used to optimised setting up of a pair by remebering what it + contains and adjusting instead of reloading where possible. + */ + struct + { + AOP_TYPE last_type; + const char *base; + int offset; + } pairs[NUM_PAIRS]; + struct + { + int last; + int pushed; + int param_offset; + int offset; + int pushedBC; + int pushedDE; + } stack; + + struct + { + int pushedBC; + int pushedDE; + } calleeSaves; + + bool omitFramePtr; + int frameId; + int receiveOffset; + bool flushStatics; + bool in_home; + const char *lastFunctionName; + iCode *current_iCode; + bool preserveCarry; + + set *sendSet; + + struct + { + /** TRUE if the registers have already been saved. */ + bool saved; + } saves; + + struct + { + lineNode *head; + lineNode *current; + int isInline; + int isDebug; + allocTrace trace; + } lines; + + struct + { + allocTrace aops; + } trace; +} _G; + +static const char *aopGet (asmop * aop, int offset, bool bit16); + +static const char *aopNames[] = { + "AOP_INVALID", + "AOP_LIT", + "AOP_REG", + "AOP_DIR", + "AOP_SFR", + "AOP_STK", + "AOP_IMMD", + "AOP_STR", + "AOP_CRY", + "AOP_IY", + "AOP_HL", + "AOP_ACC", + "AOP_HLREG", + "AOP_SIMPLELIT", + "AOP_EXSTK", + "AOP_PAIRPT", + "AOP_DUMMY" +}; + +static bool +isLastUse (iCode *ic, operand *op) +{ + bitVect *uses = bitVectCopy (OP_USES (op)); + + while (!bitVectIsZero (uses)) + { + if (bitVectFirstBit (uses) == ic->key) + { + if (bitVectnBitsOn (uses) == 1) + { + return TRUE; + } + else + { + return FALSE; + } + } + bitVectUnSetBit (uses, bitVectFirstBit (uses)); + } + + return FALSE; +} + +static PAIR_ID +_getTempPairId(void) +{ + if (IS_GB) + { + return PAIR_DE; + } + else + { + return PAIR_HL; + } +} + +static const char * +_getTempPairName(void) +{ + return _pairs[_getTempPairId()].name; +} + +static bool +isPairInUse (PAIR_ID id, iCode *ic) +{ + if (id == PAIR_DE) + { + return bitVectBitValue (ic->rMask, D_IDX) || bitVectBitValue(ic->rMask, E_IDX); + } + else if (id == PAIR_BC) + { + return bitVectBitValue (ic->rMask, B_IDX) || bitVectBitValue(ic->rMask, C_IDX); + } + else + { + wassertl (0, "Only implemented for DE and BC"); + return TRUE; + } +} + +static bool +isPairInUseNotInRet(PAIR_ID id, iCode *ic) +{ + bitVect *rInUse; + + rInUse = bitVectCplAnd (bitVectCopy (ic->rMask), ic->rUsed); + + if (id == PAIR_DE) + { + return bitVectBitValue (rInUse, D_IDX) || bitVectBitValue(rInUse, E_IDX); + } + else + { + wassertl (0, "Only implemented for DE"); + return TRUE; + } +} + +static PAIR_ID +getFreePairId (iCode *ic) +{ + if (!isPairInUse (PAIR_BC, ic)) + { + return PAIR_BC; + } + else if (IS_Z80 && !isPairInUse (PAIR_DE, ic)) + { + return PAIR_DE; + } + else + { + return PAIR_INVALID; + } +} + +static void +_tidyUp (char *buf) +{ + /* Clean up the line so that it is 'prettier' */ + if (strchr (buf, ':')) + { + /* Is a label - cant do anything */ + return; + } + /* Change the first (and probably only) ' ' to a tab so + everything lines up. + */ + while (*buf) + { + if (*buf == ' ') + { + *buf = '\t'; + break; + } + buf++; + } +} + +static lineNode * +_newLineNode (const char *line) +{ + lineNode *pl; + + pl = traceAlloc(&_G.lines.trace, Safe_alloc ( sizeof (lineNode))); + pl->line = traceAlloc(&_G.lines.trace, Safe_strdup (line)); + + return pl; +} + +static void +_vemit2 (const char *szFormat, va_list ap) +{ + struct dbuf_s dbuf; + char *buffer; + + dbuf_init(&dbuf, INITIAL_INLINEASM); + + dbuf_tvprintf (&dbuf, szFormat, ap); + + buffer = (char *)dbuf_c_str(&dbuf); + + _tidyUp (buffer); + _G.lines.current = (_G.lines.current ? + connectLine (_G.lines.current, _newLineNode (buffer)) : + (_G.lines.head = _newLineNode (buffer))); + + _G.lines.current->isInline = _G.lines.isInline; + _G.lines.current->isDebug = _G.lines.isDebug; + _G.lines.current->ic = _G.current_iCode; + _G.lines.current->isComment = (*buffer == ';'); + + dbuf_destroy(&dbuf); +} + +static void +emit2 (const char *szFormat,...) +{ + va_list ap; + + va_start (ap, szFormat); + + _vemit2 (szFormat, ap); + + va_end (ap); +} + +static void +emitDebug (const char *szFormat,...) +{ + if (!options.verboseAsm) + return; + if (!DISABLE_DEBUG) + { + va_list ap; + + va_start (ap, szFormat); + + _vemit2 (szFormat, ap); + + va_end (ap); + } +} + +/*-----------------------------------------------------------------*/ +/* z80_emitDebuggerSymbol - associate the current code location */ +/* with a debugger symbol */ +/*-----------------------------------------------------------------*/ +void +z80_emitDebuggerSymbol (char * debugSym) +{ + _G.lines.isDebug = 1; + emit2 ("%s !equ .", debugSym); + emit2 ("!global", debugSym); + _G.lines.isDebug = 0; +} + +/*-----------------------------------------------------------------*/ +/* emit2 - writes the code into a file : for now it is simple */ +/*-----------------------------------------------------------------*/ +void +_emit2 (const char *inst, const char *fmt,...) +{ + va_list ap; + char lb[INITIAL_INLINEASM]; + char *lbp = lb; + + va_start (ap, fmt); + + if (*inst != '\0') + { + sprintf (lb, "%s\t", inst); + vsprintf (lb + (strlen (lb)), fmt, ap); + } + else + vsprintf (lb, fmt, ap); + + while (isspace (*lbp)) + lbp++; + + if (lbp && *lbp) + { + _G.lines.current = (_G.lines.current ? + connectLine (_G.lines.current, _newLineNode (lb)) : + (_G.lines.head = _newLineNode (lb))); + } + _G.lines.current->isInline = _G.lines.isInline; + _G.lines.current->ic = _G.current_iCode; + va_end (ap); +} + +static void +_emitMove(const char *to, const char *from) +{ + if (STRCASECMP(to, from) != 0) + { + emit2("ld %s,%s", to, from); + } + else + { + // Optimise it out. + // Could leave this to the peephole, but sometimes the peephole is inhibited. + } +} + +void +aopDump(const char *plabel, asmop *aop) +{ + int i; + char regbuf[9]; + char *rbp = regbuf; + + emitDebug("; Dump of %s: type %s size %u", plabel, aopNames[aop->type], aop->size); + switch (aop->type) + { + case AOP_EXSTK: + case AOP_STK: + emitDebug("; aop_stk %d", aop->aopu.aop_stk); + break; + case AOP_REG: + for (i=aop->size-1;i>=0;i--) + *rbp++ = *(aop->aopu.aop_reg[i]->name); + *rbp = '\0'; + emitDebug("; reg = %s", regbuf); + break; + case AOP_PAIRPTR: + emitDebug("; pairptr = (%s)", _pairs[aop->aopu.aop_pairId].name); + + default: + /* No information. */ + break; + } +} + +static void +_moveA(const char *moveFrom) +{ + // Let the peephole optimiser take care of redundent loads + _emitMove(ACC_NAME, moveFrom); +} + +static void +_clearCarry(void) +{ + emit2("xor a,a"); +} + +const char * +getPairName (asmop * aop) +{ + if (aop->type == AOP_REG) + { + switch (aop->aopu.aop_reg[0]->rIdx) + { + case C_IDX: + return "bc"; + break; + case E_IDX: + return "de"; + break; + case L_IDX: + return "hl"; + break; + } + } + else if (aop->type == AOP_STR || aop->type == AOP_HLREG) + { + int i; + for (i = 0; i < NUM_PAIRS; i++) + { + if (strcmp(aop->aopu.aop_str[0], _pairs[i].l) == 0) + { + return _pairs[i].name; + } + } + } + wassertl (0, "Tried to get the pair name of something that isn't a pair"); + return NULL; +} + +static PAIR_ID +getPairId (asmop * aop) +{ + if (aop->size == 2) + { + if (aop->type == AOP_REG) + { + if ((aop->aopu.aop_reg[0]->rIdx == C_IDX) && (aop->aopu.aop_reg[1]->rIdx == B_IDX)) + { + return PAIR_BC; + } + if ((aop->aopu.aop_reg[0]->rIdx == E_IDX) && (aop->aopu.aop_reg[1]->rIdx == D_IDX)) + { + return PAIR_DE; + } + if ((aop->aopu.aop_reg[0]->rIdx == L_IDX) && (aop->aopu.aop_reg[1]->rIdx == H_IDX)) + { + return PAIR_HL; + } + } + else if (aop->type == AOP_STR || aop->type == AOP_HLREG) + { + int i; + for (i = 0; i < NUM_PAIRS; i++) + { + if (!strcmp (aop->aopu.aop_str[0], _pairs[i].l) && !strcmp (aop->aopu.aop_str[1], _pairs[i].h)) + { + return i; + } + } + } + } + return PAIR_INVALID; +} + +/** Returns TRUE if the registers used in aop form a pair (BC, DE, HL) */ +bool +isPair (asmop * aop) +{ + return (getPairId (aop) != PAIR_INVALID); +} + +/** Returns TRUE if the registers used in aop cannot be split into high + and low halves */ +bool +isUnsplitable (asmop * aop) +{ + switch (getPairId (aop)) + { + case PAIR_IX: + case PAIR_IY: + return TRUE; + default: + return FALSE; + } + return FALSE; +} + +bool +isPtrPair (asmop * aop) +{ + PAIR_ID pairId = getPairId (aop); + switch (pairId) + { + case PAIR_HL: + case PAIR_IY: + case PAIR_IX: + return TRUE; + default: + return FALSE; + } +} + +static void +spillPair (PAIR_ID pairId) +{ + _G.pairs[pairId].last_type = AOP_INVALID; + _G.pairs[pairId].base = NULL; +} + +/* Given a register name, spill the pair (if any) the register is part of */ +static void +spillPairReg (const char *regname) +{ + if (strlen(regname)==1) + { + switch (*regname) + { + case 'h': + case 'l': + spillPair(PAIR_HL); + break; + case 'd': + case 'e': + spillPair(PAIR_DE); + break; + case 'b': + case 'c': + spillPair(PAIR_BC); + break; + } + } +} + +/** Push a register pair onto the stack */ +void +genPairPush (asmop * aop) +{ + emit2 ("push %s", getPairName (aop)); +} + +static void +_push (PAIR_ID pairId) +{ + emit2 ("push %s", _pairs[pairId].name); + _G.stack.pushed += 2; +} + +static void +_pop (PAIR_ID pairId) +{ + if (pairId != PAIR_INVALID) + { + emit2 ("pop %s", _pairs[pairId].name); + _G.stack.pushed -= 2; + spillPair (pairId); + } +} + +void +genMovePairPair (PAIR_ID srcPair, PAIR_ID dstPair) +{ + switch (dstPair) + { + case PAIR_IX: + case PAIR_IY: + case PAIR_AF: + _push(srcPair); + _pop(dstPair); + break; + case PAIR_BC: + case PAIR_DE: + case PAIR_HL: + if (srcPair == PAIR_IX || srcPair == PAIR_IY) + { + _push(srcPair); + _pop(dstPair); + } + else + { + emit2("ld %s,%s",_pairs[dstPair].l,_pairs[srcPair].l); + emit2("ld %s,%s",_pairs[dstPair].h,_pairs[srcPair].h); + } + default: + wassertl (0, "Tried to move a nonphysical pair"); + } + _G.pairs[dstPair].last_type = _G.pairs[srcPair].last_type; + _G.pairs[dstPair].base = _G.pairs[srcPair].base; + _G.pairs[dstPair].offset = _G.pairs[srcPair].offset; +} + + +/*-----------------------------------------------------------------*/ +/* newAsmop - creates a new asmOp */ +/*-----------------------------------------------------------------*/ +static asmop * +newAsmop (short type) +{ + asmop *aop; + + aop = traceAlloc(&_G.trace.aops, Safe_alloc (sizeof (asmop))); + aop->type = type; + return aop; +} + +/*-----------------------------------------------------------------*/ +/* aopForSym - for a true symbol */ +/*-----------------------------------------------------------------*/ +static asmop * +aopForSym (iCode * ic, symbol * sym, bool result, bool requires_a) +{ + asmop *aop; + memmap *space; + + wassert (ic); + wassert (sym); + wassert (sym->etype); + + space = SPEC_OCLS (sym->etype); + + /* if already has one */ + if (sym->aop) + { + return sym->aop; + } + + /* Assign depending on the storage class */ + if (sym->onStack || sym->iaccess) + { + /* The pointer that is used depends on how big the offset is. + Normally everything is AOP_STK, but for offsets of < -128 or + > 127 on the Z80 an extended stack pointer is used. + */ + if (IS_Z80 && (_G.omitFramePtr || sym->stack < INT8MIN || sym->stack > (int)(INT8MAX-getSize (sym->type)))) + { + emitDebug ("; AOP_EXSTK for %s", sym->rname); + sym->aop = aop = newAsmop (AOP_EXSTK); + } + else + { + emitDebug ("; AOP_STK for %s", sym->rname); + sym->aop = aop = newAsmop (AOP_STK); + } + + aop->size = getSize (sym->type); + aop->aopu.aop_stk = sym->stack; + return aop; + } + + /* special case for a function */ + if (IS_FUNC (sym->type)) + { + sym->aop = aop = newAsmop (AOP_IMMD); + aop->aopu.aop_immd = traceAlloc(&_G.trace.aops, Safe_strdup (sym->rname)); + aop->size = 2; + return aop; + } + + if( IN_REGSP( space )) + { /*.p.t.20030716 minor restructure to add SFR support to the Z80 */ + if (IS_GB) + { + /* if it is in direct space */ + if( !requires_a ) + { + sym->aop = aop = newAsmop (AOP_SFR); + aop->aopu.aop_dir = sym->rname; + aop->size = getSize (sym->type); + emitDebug ("; AOP_SFR for %s", sym->rname); + return aop; + } + } + else + { /*.p.t.20030716 adding SFR support to the Z80 port */ + aop = newAsmop (AOP_SFR); + sym->aop = aop; + aop->aopu.aop_dir = sym->rname; + aop->size = getSize( sym->type ); + aop->paged = FUNC_REGBANK(sym->type); + aop->bcInUse = isPairInUse( PAIR_BC, ic ); + aop->deInUse = isPairInUse( PAIR_DE, ic ); + emitDebug( ";Z80 AOP_SFR for %s banked:%d bc:%d de:%d", sym->rname, FUNC_REGBANK(sym->type), aop->bcInUse, aop->deInUse ); + + return( aop ); + } + } + + /* only remaining is far space */ + /* in which case DPTR gets the address */ + if (IS_GB) + { + emitDebug ("; AOP_HL for %s", sym->rname); + sym->aop = aop = newAsmop (AOP_HL); + } + else + { + sym->aop = aop = newAsmop (AOP_IY); + } + aop->size = getSize (sym->type); + aop->aopu.aop_dir = sym->rname; + + /* if it is in code space */ + if (IN_CODESPACE (space)) + aop->code = 1; + + return aop; +} + +/*-----------------------------------------------------------------*/ +/* aopForRemat - rematerialzes an object */ +/*-----------------------------------------------------------------*/ +static asmop * +aopForRemat (symbol * sym) +{ + char *s = buffer; + iCode *ic = sym->rematiCode; + asmop *aop = newAsmop (AOP_IMMD); + + while (1) + { + /* if plus or minus print the right hand side */ + if (ic->op == '+' || ic->op == '-') + { + /* PENDING: for re-target */ + sprintf (s, "0x%04x %c ", (int) operandLitValue (IC_RIGHT (ic)), + ic->op); + s += strlen (s); + ic = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + continue; + } + /* we reached the end */ + sprintf (s, "%s", OP_SYMBOL (IC_LEFT (ic))->rname); + break; + } + + aop->aopu.aop_immd = traceAlloc(&_G.trace.aops, Safe_strdup(buffer)); + return aop; +} + +/*-----------------------------------------------------------------*/ +/* regsInCommon - two operands have some registers in common */ +/*-----------------------------------------------------------------*/ +bool +regsInCommon (operand * op1, operand * op2) +{ + symbol *sym1, *sym2; + int i; + + /* if they have registers in common */ + if (!IS_SYMOP (op1) || !IS_SYMOP (op2)) + return FALSE; + + sym1 = OP_SYMBOL (op1); + sym2 = OP_SYMBOL (op2); + + if (sym1->nRegs == 0 || sym2->nRegs == 0) + return FALSE; + + for (i = 0; i < sym1->nRegs; i++) + { + int j; + if (!sym1->regs[i]) + continue; + + for (j = 0; j < sym2->nRegs; j++) + { + if (!sym2->regs[j]) + continue; + + if (sym2->regs[j] == sym1->regs[i]) + return TRUE; + } + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* operandsEqu - equivalent */ +/*-----------------------------------------------------------------*/ +bool +operandsEqu (operand * op1, operand * op2) +{ + symbol *sym1, *sym2; + + /* if they not symbols */ + if (!IS_SYMOP (op1) || !IS_SYMOP (op2)) + return FALSE; + + sym1 = OP_SYMBOL (op1); + sym2 = OP_SYMBOL (op2); + + /* if both are itemps & one is spilt + and the other is not then false */ + if (IS_ITEMP (op1) && IS_ITEMP (op2) && + sym1->isspilt != sym2->isspilt) + return FALSE; + + /* if they are the same */ + if (sym1 == sym2) + return 1; + + if (sym1->rname[0] && sym2->rname[0] + && strcmp (sym1->rname, sym2->rname) == 0) + return 2; + + /* if left is a tmp & right is not */ + if (IS_ITEMP (op1) && + !IS_ITEMP (op2) && + sym1->isspilt && + (sym1->usl.spillLoc == sym2)) + return 3; + + if (IS_ITEMP (op2) && + !IS_ITEMP (op1) && + sym2->isspilt && + sym1->level > 0 && + (sym2->usl.spillLoc == sym1)) + return 4; + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* sameRegs - two asmops have the same registers */ +/*-----------------------------------------------------------------*/ +bool +sameRegs (asmop * aop1, asmop * aop2) +{ + int i; + + if (aop1->type == AOP_SFR || + aop2->type == AOP_SFR) + return FALSE; + + if (aop1 == aop2) + return TRUE; + + if (aop1->type != AOP_REG || + aop2->type != AOP_REG) + return FALSE; + + if (aop1->size != aop2->size) + return FALSE; + + for (i = 0; i < aop1->size; i++) + if (aop1->aopu.aop_reg[i] != + aop2->aopu.aop_reg[i]) + return FALSE; + + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* aopOp - allocates an asmop for an operand : */ +/*-----------------------------------------------------------------*/ +static void +aopOp (operand * op, iCode * ic, bool result, bool requires_a) +{ + asmop *aop; + symbol *sym; + int i; + + if (!op) + return; + + /* if this a literal */ + if (IS_OP_LITERAL (op)) + { + op->aop = aop = newAsmop (AOP_LIT); + aop->aopu.aop_lit = op->operand.valOperand; + aop->size = getSize (operandType (op)); + return; + } + + /* if already has a asmop then continue */ + if (op->aop) + { + if (op->aop->type == AOP_SFR) + { + op->aop->bcInUse = isPairInUse( PAIR_BC, ic ); + op->aop->deInUse = isPairInUse( PAIR_DE, ic ); + } + return; + } + + /* if the underlying symbol has a aop */ + if (IS_SYMOP (op) && OP_SYMBOL (op)->aop) + { + op->aop = OP_SYMBOL (op)->aop; + if (op->aop->type == AOP_SFR) + { + op->aop->bcInUse = isPairInUse( PAIR_BC, ic ); + op->aop->deInUse = isPairInUse( PAIR_DE, ic ); + } + return; + } + + /* if this is a true symbol */ + if (IS_TRUE_SYMOP (op)) + { + op->aop = aopForSym (ic, OP_SYMBOL (op), result, requires_a); + return; + } + + /* this is a temporary : this has + only four choices : + a) register + b) spillocation + c) rematerialize + d) conditional + e) can be a return use only */ + + sym = OP_SYMBOL (op); + + /* if the type is a conditional */ + if (sym->regType == REG_CND) + { + aop = op->aop = sym->aop = newAsmop (AOP_CRY); + aop->size = 0; + return; + } + + /* if it is spilt then two situations + a) is rematerialize + b) has a spill location */ + if (sym->isspilt || sym->nRegs == 0) + { + /* rematerialize it NOW */ + if (sym->remat) + { + sym->aop = op->aop = aop = + aopForRemat (sym); + aop->size = getSize (sym->type); + return; + } + + if (sym->ruonly) + { + int i; + aop = op->aop = sym->aop = newAsmop (AOP_STR); + aop->size = getSize (sym->type); + for (i = 0; i < 4; i++) + aop->aopu.aop_str[i] = _fReturn[i]; + return; + } + + if (sym->accuse) + { + if (sym->accuse == ACCUSE_A) + { + aop = op->aop = sym->aop = newAsmop (AOP_ACC); + aop->size = getSize (sym->type); + wassertl(aop->size == 1, "Internal error: Caching in A, but too big to fit in A"); + + aop->aopu.aop_str[0] = _pairs[PAIR_AF].h; + } + else if (sym->accuse == ACCUSE_SCRATCH) + { + aop = op->aop = sym->aop = newAsmop (AOP_HLREG); + aop->size = getSize (sym->type); + wassertl(aop->size <= 2, "Internal error: Caching in HL, but too big to fit in HL"); + aop->aopu.aop_str[0] = _pairs[PAIR_HL].l; + aop->aopu.aop_str[1] = _pairs[PAIR_HL].h; + } + else if (sym->accuse == ACCUSE_IY) + { + aop = op->aop = sym->aop = newAsmop (AOP_HLREG); + aop->size = getSize (sym->type); + wassertl(aop->size <= 2, "Internal error: Caching in IY, but too big to fit in IY"); + aop->aopu.aop_str[0] = _pairs[PAIR_IY].l; + aop->aopu.aop_str[1] = _pairs[PAIR_IY].h; + } + else + { + wassertl (0, "Marked as being allocated into A or HL but is actually in neither"); + } + return; + } + + if (sym->usl.spillLoc) + { + asmop *oldAsmOp = NULL; + + if (getSize(sym->type) != getSize(sym->usl.spillLoc->type)) + { + /* force a new aop if sizes differ */ + oldAsmOp = sym->usl.spillLoc->aop; + sym->usl.spillLoc->aop = NULL; + } + sym->aop = op->aop = aop = + aopForSym (ic, sym->usl.spillLoc, result, requires_a); + if (getSize(sym->type) != getSize(sym->usl.spillLoc->type)) + { + /* Don't reuse the new aop, go with the last one */ + sym->usl.spillLoc->aop = oldAsmOp; + } + aop->size = getSize (sym->type); + return; + } + + /* else must be a dummy iTemp */ + sym->aop = op->aop = aop = newAsmop (AOP_DUMMY); + aop->size = getSize (sym->type); + return; + } + + /* must be in a register */ + sym->aop = op->aop = aop = newAsmop (AOP_REG); + aop->size = sym->nRegs; + for (i = 0; i < sym->nRegs; i++) + aop->aopu.aop_reg[i] = sym->regs[i]; +} + +/*-----------------------------------------------------------------*/ +/* freeAsmop - free up the asmop given to an operand */ +/*----------------------------------------------------------------*/ +static void +freeAsmop (operand * op, asmop * aaop, iCode * ic) +{ + asmop *aop; + + if (!op) + aop = aaop; + else + aop = op->aop; + + if (!aop) + return; + + if (aop->freed) + goto dealloc; + + aop->freed = 1; + + if (aop->type == AOP_PAIRPTR && IS_Z80 && aop->aopu.aop_pairId == PAIR_DE) + { + _pop (aop->aopu.aop_pairId); + } + + if (getPairId (aop) == PAIR_HL) + { + spillPair (PAIR_HL); + } + +dealloc: + /* all other cases just dealloc */ + if (op) + { + op->aop = NULL; + if (IS_SYMOP (op)) + { + OP_SYMBOL (op)->aop = NULL; + /* if the symbol has a spill */ + if (SPIL_LOC (op)) + SPIL_LOC (op)->aop = NULL; + } + } + +} + +bool +isLitWord (asmop * aop) +{ + /* if (aop->size != 2) + return FALSE; */ + switch (aop->type) + { + case AOP_IMMD: + case AOP_LIT: + return TRUE; + default: + return FALSE; + } +} + +char * +aopGetLitWordLong (asmop * aop, int offset, bool with_hash) +{ + /* depending on type */ + switch (aop->type) + { + case AOP_HL: + case AOP_IY: + case AOP_IMMD: + /* PENDING: for re-target */ + if (with_hash) + { + tsprintf (buffer, sizeof(buffer), + "!hashedstr + %d", aop->aopu.aop_immd, offset); + } + else if (offset == 0) + { + tsprintf (buffer, sizeof(buffer), + "%s", aop->aopu.aop_immd); + } + else + { + tsprintf (buffer, sizeof(buffer), + "%s + %d", aop->aopu.aop_immd, offset); + } + return traceAlloc(&_G.trace.aops, Safe_strdup(buffer)); + + case AOP_LIT: + { + value *val = aop->aopu.aop_lit; + /* if it is a float then it gets tricky */ + /* otherwise it is fairly simple */ + if (!IS_FLOAT (val->type)) + { + unsigned long v = ulFromVal (val); + + if (offset == 2) + { + v >>= 16; + } + else if (offset == 0) + { + // OK + } + else + { + wassertl(0, "Encountered an invalid offset while fetching a literal"); + } + + if (with_hash) + tsprintf (buffer, sizeof(buffer), "!immedword", v); + else + tsprintf (buffer, sizeof(buffer), "!constword", v); + + return traceAlloc(&_G.trace.aops, Safe_strdup(buffer)); + } + else + { + union { + float f; + unsigned char c[4]; + } + fl; + unsigned int i; + + /* it is type float */ + fl.f = (float) floatFromVal (val); + +#ifdef WORDS_BIGENDIAN + i = fl.c[3-offset] | (fl.c[3-offset-1]<<8); +#else + i = fl.c[offset] | (fl.c[offset+1]<<8); +#endif + if (with_hash) + tsprintf (buffer, sizeof(buffer), "!immedword", i); + else + tsprintf (buffer, sizeof(buffer), "!constword", i); + + return traceAlloc(&_G.trace.aops, Safe_strdup(buffer)); + } + } + default: + return NULL; + } +} + +char * +aopGetWord (asmop * aop, int offset) +{ + return aopGetLitWordLong (aop, offset, TRUE); +} + +bool +isPtr (const char *s) +{ + if (!strcmp (s, "hl")) + return TRUE; + if (!strcmp (s, "ix")) + return TRUE; + if (!strcmp (s, "iy")) + return TRUE; + return FALSE; +} + +static void +adjustPair (const char *pair, int *pold, int new) +{ + wassert (pair); + + while (*pold < new) + { + emit2 ("inc %s", pair); + (*pold)++; + } + while (*pold > new) + { + emit2 ("dec %s", pair); + (*pold)--; + } +} + +static void +spillCached (void) +{ + spillPair (PAIR_HL); + spillPair (PAIR_IY); +} + +static bool +requiresHL (asmop * aop) +{ + switch (aop->type) + { + case AOP_IY: + case AOP_HL: + case AOP_STK: + case AOP_EXSTK: + case AOP_HLREG: + return TRUE; + default: + return FALSE; + } +} + +static void +fetchLitPair (PAIR_ID pairId, asmop * left, int offset) +{ + const char *l, *base; + const char *pair = _pairs[pairId].name; + l = aopGetLitWordLong (left, offset, FALSE); + base = aopGetLitWordLong (left, 0, FALSE); + wassert (l && pair && base); + + if (isPtr (pair)) + { + if (pairId == PAIR_HL || pairId == PAIR_IY) + { + if (_G.pairs[pairId].last_type == AOP_IMMD && left->type == AOP_IMMD) + { + if (_G.pairs[pairId].base && !strcmp (_G.pairs[pairId].base, base)) + { + if (pairId == PAIR_HL && abs (_G.pairs[pairId].offset - offset) < 3) + { + adjustPair (pair, &_G.pairs[pairId].offset, offset); + goto adjusted; + } + if (pairId == PAIR_IY && (offset >= INT8MIN && offset <= INT8MAX)) + { + goto adjusted; + } + } + } + } + + if (pairId == PAIR_HL && left->type == AOP_LIT && _G.pairs[pairId].last_type == AOP_LIT && + !IS_FLOAT (left->aopu.aop_lit->type) && offset == 0 && _G.pairs[pairId].offset == 0) + { + unsigned new_low, new_high, old_low, old_high; + unsigned long v_new = ulFromVal (left->aopu.aop_lit); + unsigned long v_old = strtoul (_G.pairs[pairId].base, NULL, 0); + new_low = (v_new >> 0) & 0xff; + new_high = (v_new >> 8) & 0xff; + old_low = (v_old >> 0) & 0xff; + old_high = (v_old >> 8) & 0xff; + + /* Change lower byte only. */ + if(new_high == old_high) + { + emit2("ld l, %s", aopGet (left, 0, FALSE)); + goto adjusted; + } + /* Change upper byte only. */ + else if(new_low == old_low) + { + emit2("ld h, %s", aopGet (left, 1, FALSE)); + goto adjusted; + } + } + + + _G.pairs[pairId].last_type = left->type; + _G.pairs[pairId].base = traceAlloc(&_G.trace.aops, Safe_strdup (base)); + _G.pairs[pairId].offset = offset; + } + /* Both a lit on the right and a true symbol on the left */ + emit2 ("ld %s,!hashedstr", pair, l); + return; + +adjusted: + _G.pairs[pairId].last_type = left->type; + _G.pairs[pairId].base = traceAlloc(&_G.trace.aops, Safe_strdup (base)); + _G.pairs[pairId].offset = offset; +} + +static PAIR_ID +makeFreePairId (iCode *ic, bool *pisUsed) +{ + *pisUsed = FALSE; + + if (ic != NULL) + { + if (!bitVectBitValue (ic->rMask, B_IDX) && !bitVectBitValue(ic->rMask, C_IDX)) + { + return PAIR_BC; + } + else if (IS_Z80 && !bitVectBitValue (ic->rMask, D_IDX) && !bitVectBitValue(ic->rMask, E_IDX)) + { + return PAIR_DE; + } + else + { + *pisUsed = TRUE; + return PAIR_HL; + } + } + else + { + *pisUsed = TRUE; + return PAIR_HL; + } +} + +static void +fetchPairLong (PAIR_ID pairId, asmop * aop, iCode *ic, int offset) +{ + /* if this is remateriazable */ + if (isLitWord (aop)) { + fetchLitPair (pairId, aop, offset); + } + else + { + if (getPairId (aop) == pairId) + { + /* Do nothing */ + } + /* we need to get it byte by byte */ + else if (pairId == PAIR_HL && IS_GB && requiresHL (aop)) { + aopGet (aop, offset, FALSE); + switch (aop->size - offset) { + case 1: + emit2 ("ld l,!*hl"); + emit2 ("ld h,!immedbyte", 0); + break; + case 2: + // PENDING: Requires that you are only fetching two bytes. + case 4: + emit2 ("!ldahli"); + emit2 ("ld h,!*hl"); + emit2 ("ld l,a"); + break; + default: + wassertl (0, "Attempted to fetch too much data into HL"); + break; + } + } + else if (IS_Z80 && aop->type == AOP_IY) { + /* Instead of fetching relative to IY, just grab directly + from the address IY refers to */ + char *l = aopGetLitWordLong (aop, offset, FALSE); + wassert (l); + emit2 ("ld %s,(%s)", _pairs[pairId].name, l); + + if (aop->size < 2) { + emit2("ld %s,!zero", _pairs[pairId].h); + } + } + else if (pairId == PAIR_IY) + { + if (isPair (aop)) + { + emit2 ("push %s", _pairs[getPairId(aop)].name); + emit2 ("pop iy"); + } + else + { + bool isUsed; + PAIR_ID id = makeFreePairId (ic, &isUsed); + if (isUsed) + _push (id); + /* Can't load into parts, so load into HL then exchange. */ + emit2 ("ld %s,%s", _pairs[id].l, aopGet (aop, offset, FALSE)); + emit2 ("ld %s,%s", _pairs[id].h, aopGet (aop, offset + 1, FALSE)); + emit2 ("push %s", _pairs[id].name); + emit2 ("pop iy"); + if (isUsed) + _pop (id); + } + } + else if (isUnsplitable(aop)) + { + emit2("push %s", _pairs[getPairId(aop)].name); + emit2("pop %s", _pairs[pairId].name); + } + else + { + /* Swapping register contents within register pair */ + if(!strcmp(aopGet (aop, offset, FALSE), _pairs[pairId].h)) + { + emit2 ("ld a,%s",aopGet (aop, offset + 1, FALSE)); + emit2 ("ld %s,%s", _pairs[pairId].l, aopGet (aop, offset, FALSE)); + emit2 ("ld %s,a", _pairs[pairId].h); + } + else + { + emit2 ("ld %s,%s", _pairs[pairId].l, aopGet (aop, offset, FALSE)); + emit2 ("ld %s,%s", _pairs[pairId].h, aopGet (aop, offset + 1, FALSE)); + } + } + /* PENDING: check? */ + if (pairId == PAIR_HL) + spillPair (PAIR_HL); + } +} + +static void +fetchPair (PAIR_ID pairId, asmop * aop) +{ + fetchPairLong (pairId, aop, NULL, 0); +} + +static void +fetchHL (asmop * aop) +{ + fetchPair (PAIR_HL, aop); +} + +static void +setupPairFromSP (PAIR_ID id, int offset) +{ + wassertl (id == PAIR_HL, "Setup relative to SP only implemented for HL"); + + if (_G.preserveCarry) + { + _push (PAIR_AF); + offset += 2; + } + + if (offset < INT8MIN || offset > INT8MAX) + { + emit2 ("ld hl,!immedword", offset); + emit2 ("add hl,sp"); + } + else + { + emit2 ("!ldahlsp", offset); + } + + if (_G.preserveCarry) + { + _pop (PAIR_AF); + offset -= 2; + } +} + +static void +setupPair (PAIR_ID pairId, asmop * aop, int offset) +{ + switch (aop->type) + { + case AOP_IY: + wassertl (pairId == PAIR_IY || pairId == PAIR_HL, "AOP_IY must be in IY or HL"); + fetchLitPair (pairId, aop, 0); + break; + + case AOP_HL: + wassertl (pairId == PAIR_HL, "AOP_HL must be in HL"); + + fetchLitPair (pairId, aop, offset); + _G.pairs[pairId].offset = offset; + break; + + case AOP_EXSTK: + wassertl (IS_Z80, "Only the Z80 has an extended stack"); + wassertl (pairId == PAIR_IY || pairId == PAIR_HL, "The Z80 extended stack must be in IY or HL"); + + { + int offset = aop->aopu.aop_stk + _G.stack.offset; + + if (_G.pairs[pairId].last_type == aop->type && + _G.pairs[pairId].offset == offset) + { + /* Already setup */ + } + else + { + /* PENDING: Do this better. */ + if (_G.preserveCarry) + _push (PAIR_AF); + sprintf (buffer, "%d", offset + _G.stack.pushed); + emit2 ("ld %s,!hashedstr", _pairs[pairId].name, buffer); + emit2 ("add %s,sp", _pairs[pairId].name); + _G.pairs[pairId].last_type = aop->type; + _G.pairs[pairId].offset = offset; + if (_G.preserveCarry) + _pop (PAIR_AF); + } + } + break; + + case AOP_STK: + { + /* Doesnt include _G.stack.pushed */ + int abso = aop->aopu.aop_stk + offset + _G.stack.offset; + + if (aop->aopu.aop_stk > 0) + { + abso += _G.stack.param_offset; + } + assert (pairId == PAIR_HL); + /* In some cases we can still inc or dec hl */ + if (_G.pairs[pairId].last_type == AOP_STK && abs (_G.pairs[pairId].offset - abso) < 3) + { + adjustPair (_pairs[pairId].name, &_G.pairs[pairId].offset, abso); + } + else + { + setupPairFromSP (PAIR_HL, abso + _G.stack.pushed); + } + _G.pairs[pairId].offset = abso; + break; + } + + case AOP_PAIRPTR: + if (pairId != aop->aopu.aop_pairId) + genMovePairPair(aop->aopu.aop_pairId, pairId); + adjustPair (_pairs[pairId].name, &_G.pairs[pairId].offset, offset); + break; + + default: + wassert (0); + } + _G.pairs[pairId].last_type = aop->type; +} + +static void +emitLabel (int key) +{ + emit2 ("!tlabeldef", key); + _G.lines.current->isLabel = 1; + spillCached (); +} + +/*-----------------------------------------------------------------*/ +/* aopGet - for fetching value of the aop */ +/*-----------------------------------------------------------------*/ +static const char * +aopGet (asmop * aop, int offset, bool bit16) +{ + // char *s = buffer; + + /* offset is greater than size then zero */ + /* PENDING: this seems a bit screwed in some pointer cases. */ + if (offset > (aop->size - 1) && + aop->type != AOP_LIT) + { + tsprintf (buffer, sizeof(buffer), "!zero"); + return traceAlloc(&_G.trace.aops, Safe_strdup(buffer)); + } + + /* depending on type */ + switch (aop->type) + { + case AOP_DUMMY: + tsprintf (buffer, sizeof(buffer), "!zero"); + return traceAlloc(&_G.trace.aops, Safe_strdup(buffer)); + + case AOP_IMMD: + /* PENDING: re-target */ + if (bit16) + tsprintf (buffer, sizeof(buffer), "!immedwords", aop->aopu.aop_immd); + else + switch (offset) + { + case 2: + tsprintf (buffer, sizeof(buffer), "!bankimmeds", aop->aopu.aop_immd); + break; + case 1: + tsprintf (buffer, sizeof(buffer), "!msbimmeds", aop->aopu.aop_immd); + break; + case 0: + tsprintf (buffer, sizeof(buffer), "!lsbimmeds", aop->aopu.aop_immd); + break; + default: + wassertl (0, "Fetching from beyond the limits of an immediate value."); + } + + return traceAlloc(&_G.trace.aops, Safe_strdup(buffer)); + + case AOP_DIR: + wassert (IS_GB); + emit2 ("ld a,(%s+%d)", aop->aopu.aop_dir, offset); + SNPRINTF (buffer, sizeof(buffer), "a"); + + return traceAlloc(&_G.trace.aops, Safe_strdup(buffer)); + + case AOP_SFR: + if( IS_GB ) + { + // wassert (IS_GB); + emit2 ("ldh a,(%s+%d)", aop->aopu.aop_dir, offset); + SNPRINTF (buffer, sizeof(buffer), "a"); + + return traceAlloc(&_G.trace.aops, Safe_strdup(buffer)); + } + else + { /*.p.t.20030716 handling for i/o port read access for Z80 */ + if( aop->paged ) + { /* banked mode */ + /* reg A goes to address bits 15-8 during "in a,(x)" instruction */ + emit2( "ld a,!msbimmeds", aop->aopu.aop_dir); + emit2( "in a,(!lsbimmeds)", aop->aopu.aop_dir); + } + else if( z80_opts.port_mode == 180 ) + { /* z180 in0/out0 mode */ + emit2( "in0 a,(%s)", aop->aopu.aop_dir ); + } + else + { /* 8 bit mode */ + emit2( "in a,(%s)", aop->aopu.aop_dir ); + } + + SNPRINTF (buffer, sizeof(buffer), "a"); + + return traceAlloc(&_G.trace.aops, Safe_strdup(buffer)); + } + + case AOP_REG: + return aop->aopu.aop_reg[offset]->name; + + case AOP_HL: + wassert (IS_GB); + setupPair (PAIR_HL, aop, offset); + tsprintf (buffer, sizeof(buffer), "!*hl"); + + return traceAlloc(&_G.trace.aops, Safe_strdup (buffer)); + + case AOP_IY: + wassert (IS_Z80); + setupPair (PAIR_IY, aop, offset); + tsprintf (buffer, sizeof(buffer), "!*iyx", offset); + + return traceAlloc(&_G.trace.aops, Safe_strdup(buffer)); + + case AOP_EXSTK: + wassert (IS_Z80); + setupPair (PAIR_IY, aop, offset); + tsprintf (buffer, sizeof(buffer), "!*iyx", offset, offset); + + return traceAlloc(&_G.trace.aops, Safe_strdup(buffer)); + + case AOP_STK: + if (IS_GB) + { + setupPair (PAIR_HL, aop, offset); + tsprintf (buffer, sizeof(buffer), "!*hl"); + } + else + { + if (aop->aopu.aop_stk >= 0) + offset += _G.stack.param_offset; + tsprintf (buffer, sizeof(buffer), + "!*ixx", aop->aopu.aop_stk + offset); + } + + return traceAlloc(&_G.trace.aops, Safe_strdup(buffer)); + + case AOP_CRY: + wassertl (0, "Tried to fetch from a bit variable"); + + case AOP_ACC: + if (!offset) + { + return "a"; + } + else + { + tsprintf(buffer, sizeof(buffer), "!zero"); + return traceAlloc(&_G.trace.aops, Safe_strdup(buffer)); + } + + case AOP_HLREG: + wassert (offset < 2); + return aop->aopu.aop_str[offset]; + + case AOP_LIT: + return aopLiteral (aop->aopu.aop_lit, offset); + + case AOP_SIMPLELIT: + { + unsigned long v = aop->aopu.aop_simplelit; + + v >>= (offset * 8); + tsprintf (buffer, sizeof(buffer), + "!immedbyte", (unsigned int) v & 0xff); + + return traceAlloc(&_G.trace.aops, Safe_strdup(buffer)); + } + case AOP_STR: + aop->coff = offset; + return aop->aopu.aop_str[offset]; + + case AOP_PAIRPTR: + setupPair (aop->aopu.aop_pairId, aop, offset); + if (aop->aopu.aop_pairId==PAIR_IX) + tsprintf (buffer, sizeof(buffer), "!*ixx", offset); + else if (aop->aopu.aop_pairId==PAIR_IY) + tsprintf (buffer, sizeof(buffer), "!*iyx", offset); + else + SNPRINTF (buffer, sizeof(buffer), + "(%s)", _pairs[aop->aopu.aop_pairId].name); + + return traceAlloc(&_G.trace.aops, Safe_strdup(buffer)); + + default: + break; + } + wassertl (0, "aopget got unsupported aop->type"); + exit (0); +} + +bool +isRegString (const char *s) +{ + if (!strcmp (s, "b") || + !strcmp (s, "c") || + !strcmp (s, "d") || + !strcmp (s, "e") || + !strcmp (s, "a") || + !strcmp (s, "h") || + !strcmp (s, "l")) + return TRUE; + return FALSE; +} + +bool +isConstant (const char *s) +{ + /* This is a bit of a hack... */ + return (*s == '#' || *s == '$'); +} + +bool +canAssignToPtr (const char *s) +{ + if (isRegString (s)) + return TRUE; + if (isConstant (s)) + return TRUE; + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* aopPut - puts a string for a aop */ +/*-----------------------------------------------------------------*/ +static void +aopPut (asmop * aop, const char *s, int offset) +{ + char buffer2[256]; + + if (aop->size && offset > (aop->size - 1)) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "aopPut got offset > aop->size"); + exit (0); + } + + // PENDING + tsprintf(buffer2, sizeof(buffer2), s); + s = buffer2; + + /* will assign value to value */ + /* depending on where it is ofcourse */ + switch (aop->type) + { + case AOP_DUMMY: + _moveA (s); /* in case s is volatile */ + break; + + case AOP_DIR: + /* Direct. Hmmm. */ + wassert (IS_GB); + if (strcmp (s, "a")) + emit2 ("ld a,%s", s); + emit2 ("ld (%s+%d),a", aop->aopu.aop_dir, offset); + break; + + case AOP_SFR: + if( IS_GB ) + { + // wassert (IS_GB); + if (strcmp (s, "a")) + emit2 ("ld a,%s", s); + emit2 ("ldh (%s+%d),a", aop->aopu.aop_dir, offset); + } + else + { /*.p.t.20030716 handling for i/o port read access for Z80 */ + if (aop->paged) + { /* banked mode */ + if (aop->bcInUse) + emit2( "push bc" ); + + if (strlen(s) != 1 + || (s[0] != 'a' && s[0] != 'd' && s[0] != 'e' + && s[0] != 'h' && s[0] != 'l')) + { + emit2( "ld a,%s", s ); + s = "a"; + } + + emit2( "ld bc,#%s", aop->aopu.aop_dir ); + emit2( "out (c),%s", s ); + + if( aop->bcInUse ) + emit2( "pop bc" ); + else + spillPair (PAIR_BC); + } + else if( z80_opts.port_mode == 180 ) + { /* z180 in0/out0 mode */ + emit2( "ld a,%s", s ); + emit2( "out0 (%s),a", aop->aopu.aop_dir ); + } + else + { /* 8 bit mode */ + emit2( "ld a,%s", s ); + emit2( "out (%s),a", aop->aopu.aop_dir ); + } + } + break; + + case AOP_REG: + if (!strcmp (s, "!*hl")) + emit2 ("ld %s,!*hl", aop->aopu.aop_reg[offset]->name); + else + emit2 ("ld %s,%s", + aop->aopu.aop_reg[offset]->name, s); + spillPairReg(aop->aopu.aop_reg[offset]->name); + break; + + case AOP_IY: + wassert (!IS_GB); + if (!canAssignToPtr (s)) + { + emit2 ("ld a,%s", s); + setupPair (PAIR_IY, aop, offset); + emit2 ("ld !*iyx,a", offset); + } + else + { + setupPair (PAIR_IY, aop, offset); + emit2 ("ld !*iyx,%s", offset, s); + } + break; + + case AOP_HL: + wassert (IS_GB); + /* PENDING: for re-target */ + if (!strcmp (s, "!*hl") || !strcmp (s, "(hl)") || !strcmp (s, "[hl]")) + { + emit2 ("ld a,!*hl"); + s = "a"; + } + setupPair (PAIR_HL, aop, offset); + + emit2 ("ld !*hl,%s", s); + break; + + case AOP_EXSTK: + wassert (!IS_GB); + if (!canAssignToPtr (s)) + { + emit2 ("ld a,%s", s); + setupPair (PAIR_IY, aop, offset); + emit2 ("ld !*iyx,a", offset); + } + else + { + setupPair (PAIR_IY, aop, offset); + emit2 ("ld !*iyx,%s", offset, s); + } + break; + + case AOP_STK: + if (IS_GB) + { + /* PENDING: re-target */ + if (!strcmp (s, "!*hl") || !strcmp (s, "(hl)") || !strcmp (s, "[hl]")) + { + emit2 ("ld a,!*hl"); + s = "a"; + } + setupPair (PAIR_HL, aop, offset); + if (!canAssignToPtr (s)) + { + emit2 ("ld a,%s", s); + emit2 ("ld !*hl,a"); + } + else + emit2 ("ld !*hl,%s", s); + } + else + { + if (aop->aopu.aop_stk >= 0) + offset += _G.stack.param_offset; + if (!canAssignToPtr (s)) + { + emit2 ("ld a,%s", s); + emit2 ("ld !*ixx,a", aop->aopu.aop_stk + offset); + } + else + { + emit2 ("ld !*ixx,%s", aop->aopu.aop_stk + offset, s); + } + } + break; + + case AOP_CRY: + /* if bit variable */ + if (!aop->aopu.aop_dir) + { + emit2 ("ld a,!zero"); + emit2 ("rla"); + } + else + { + /* In bit space but not in C - cant happen */ + wassertl (0, "Tried to write into a bit variable"); + } + break; + + case AOP_STR: + aop->coff = offset; + if (strcmp (aop->aopu.aop_str[offset], s)) + { + emit2 ("ld %s,%s", aop->aopu.aop_str[offset], s); + } + spillPairReg(aop->aopu.aop_str[offset]); + break; + + case AOP_ACC: + aop->coff = offset; + if (!offset && (strcmp (s, "acc") == 0)) + break; + if (offset > 0) + { + wassertl (0, "Tried to access past the end of A"); + } + else + { + if (strcmp (aop->aopu.aop_str[offset], s)) + { + emit2 ("ld %s,%s", aop->aopu.aop_str[offset], s); + spillPairReg(aop->aopu.aop_str[offset]); + } + } + break; + + case AOP_HLREG: + wassert (offset < 2); + emit2 ("ld %s,%s", aop->aopu.aop_str[offset], s); + spillPairReg(aop->aopu.aop_str[offset]); + break; + + case AOP_PAIRPTR: + setupPair (aop->aopu.aop_pairId, aop, offset); + if (aop->aopu.aop_pairId==PAIR_IX) + emit2 ("ld !*ixx,%s", 0, s); + else if (aop->aopu.aop_pairId==PAIR_IY) + emit2 ("ld !*iyx,%s", 0, s); + else + emit2 ("ld (%s),%s", _pairs[aop->aopu.aop_pairId].name, s); + break; + + default: + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "aopPut got unsupported aop->type"); + exit (0); + } +} + +#define AOP(op) op->aop +#define AOP_TYPE(op) AOP(op)->type +#define AOP_SIZE(op) AOP(op)->size +#define AOP_NEEDSACC(x) (AOP(x) && ((AOP_TYPE(x) == AOP_CRY) || (AOP_TYPE(x) == AOP_SFR))) +#define AOP_IS_PAIRPTR(x, p) (AOP_TYPE (x) == AOP_PAIRPTR && AOP (x)->aopu.aop_pairId == p) + +static void +commitPair (asmop * aop, PAIR_ID id) +{ + /* PENDING: Verify this. */ + if (id == PAIR_HL && requiresHL (aop) && IS_GB) + { + emit2 ("ld a,l"); + emit2 ("ld d,h"); + aopPut (aop, "a", 0); + aopPut (aop, "d", 1); + } + else + { + /* Special cases */ + if (id == PAIR_HL && aop->type == AOP_IY && aop->size == 2) + { + char *l = aopGetLitWordLong (aop, 0, FALSE); + wassert (l); + + emit2 ("ld (%s),%s", l, _pairs[id].name); + } + else + { + aopPut (aop, _pairs[id].l, 0); + aopPut (aop, _pairs[id].h, 1); + } + } +} + +/*-----------------------------------------------------------------*/ +/* getDataSize - get the operand data size */ +/*-----------------------------------------------------------------*/ +int +getDataSize (operand * op) +{ + int size; + size = AOP_SIZE (op); + if (size == 3) + { + /* pointer */ + wassertl (0, "Somehow got a three byte data pointer"); + } + return size; +} + +/*-----------------------------------------------------------------*/ +/* movLeft2Result - move byte from left to result */ +/*-----------------------------------------------------------------*/ +static void +movLeft2Result (operand * left, int offl, + operand * result, int offr, int sign) +{ + const char *l; + + if (!sameRegs (AOP (left), AOP (result)) || (offl != offr)) + { + l = aopGet (AOP (left), offl, FALSE); + + if (!sign) + { + aopPut (AOP (result), l, offr); + } + else + { + if (getDataSize (left) == offl + 1) + { + emit2 ("ld a,%s", l); + aopPut (AOP (result), "a", offr); + } + } + } +} + +static void +movLeft2ResultLong (operand * left, int offl, + operand * result, int offr, int sign, + int size) +{ + if (size == 1) + { + movLeft2Result (left, offl, result, offr, sign); + } + else + { + wassertl (offl == 0 && offr == 0, "Only implemented for zero offset"); + wassertl (size == 2, "Only implemented for two bytes or one"); + + if ( IS_GB && requiresHL ( AOP (left)) && getPairId ( AOP (result)) == PAIR_HL) + { + emit2 ("ld a,%s", aopGet (AOP (left), LSB, FALSE)); + emit2 ("ld h,%s", aopGet (AOP (left), MSB16, FALSE)); + emit2 ("ld l,a"); + spillPair (PAIR_HL); + } + else if ( getPairId ( AOP (result)) == PAIR_IY) + { + PAIR_ID id = getPairId (AOP (left)); + if (id != PAIR_INVALID) + { + emit2("push %s", _pairs[id].name); + emit2("pop iy"); + } + else + { + /* PENDING */ + emitDebug("Error"); + } + } + else + { + movLeft2Result (left, offl, result, offr, sign); + movLeft2Result (left, offl+1, result, offr+1, sign); + } + } +} + +/** Put Acc into a register set + */ +void +outAcc (operand * result) +{ + int size, offset; + size = getDataSize (result); + if (size) + { + aopPut (AOP (result), "a", 0); + size--; + offset = 1; + /* unsigned or positive */ + while (size--) + { + aopPut (AOP (result), "!zero", offset++); + } + } +} + +/** Take the value in carry and put it into a register + */ +void +outBitC (operand * result) +{ + /* if the result is bit */ + if (AOP_TYPE (result) == AOP_CRY) + { + if (!IS_OP_RUONLY (result)) + aopPut (AOP (result), "c", 0); + } + else + { + emit2 ("ld a,!zero"); + emit2 ("rla"); + outAcc (result); + } +} + +/*-----------------------------------------------------------------*/ +/* toBoolean - emit code for orl a,operator(sizeop) */ +/*-----------------------------------------------------------------*/ +void +_toBoolean (operand * oper) +{ + int size = AOP_SIZE (oper); + int offset = 0; + if (size > 1) + { + emit2 ("ld a,%s", aopGet (AOP (oper), offset++, FALSE)); + size--; + while (size--) + emit2 ("or a,%s", aopGet (AOP (oper), offset++, FALSE)); + } + else + { + if (AOP (oper)->type != AOP_ACC) + { + _clearCarry(); + emit2 ("or a,%s", aopGet (AOP (oper), 0, FALSE)); + } + } +} + + +/*-----------------------------------------------------------------*/ +/* genNot - generate code for ! operation */ +/*-----------------------------------------------------------------*/ +static void +genNot (iCode * ic) +{ + + /* assign asmOps to operand & result */ + aopOp (IC_LEFT (ic), ic, FALSE, TRUE); + aopOp (IC_RESULT (ic), ic, TRUE, FALSE); + + /* if in bit space then a special case */ + if (AOP_TYPE (IC_LEFT (ic)) == AOP_CRY) + { + wassertl (0, "Tried to negate a bit"); + } + + _toBoolean (IC_LEFT (ic)); + + /* Not of A: + If A == 0, !A = 1 + else A = 0 + So if A = 0, A-1 = 0xFF and C is set, rotate C into reg. */ + emit2 ("sub a,!one"); + outBitC (IC_RESULT (ic)); + + /* release the aops */ + freeAsmop (IC_LEFT (ic), NULL, ic); + freeAsmop (IC_RESULT (ic), NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genCpl - generate code for complement */ +/*-----------------------------------------------------------------*/ +static void +genCpl (iCode * ic) +{ + int offset = 0; + int size; + + + /* assign asmOps to operand & result */ + aopOp (IC_LEFT (ic), ic, FALSE, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE, FALSE); + + /* if both are in bit space then + a special case */ + if (AOP_TYPE (IC_RESULT (ic)) == AOP_CRY && + AOP_TYPE (IC_LEFT (ic)) == AOP_CRY) + { + wassertl (0, "Left and the result are in bit space"); + } + + size = AOP_SIZE (IC_RESULT (ic)); + while (size--) + { + const char *l = aopGet (AOP (IC_LEFT (ic)), offset, FALSE); + _moveA (l); + emit2("cpl"); + aopPut (AOP (IC_RESULT (ic)), "a", offset++); + } + + /* release the aops */ + freeAsmop (IC_LEFT (ic), NULL, ic); + freeAsmop (IC_RESULT (ic), NULL, ic); +} + +static void +_gbz80_emitAddSubLongLong (iCode *ic, asmop *left, asmop *right, bool isAdd) +{ + /* Logic: + ld de,right.lw + setup hl to left + de = hl - de + push flags + store de into result + pop flags + ld de,right.hw + setup hl + de = hl -de + store de into result + */ + const char *first = isAdd ? "add" : "sub"; + const char *later = isAdd ? "adc" : "sbc"; + + wassertl (IS_GB, "Code is only relevent to the gbz80"); + wassertl (AOP( IC_RESULT (ic))->size == 4, "Only works for four bytes"); + + fetchPair (PAIR_DE, left); + + emit2 ("ld a,e"); + emit2 ("%s a,%s", first, aopGet( right, LSB, FALSE)); + emit2 ("ld e,a"); + emit2 ("ld a,d"); + emit2 ("%s a,%s", later, aopGet( right, MSB16, FALSE)); + + _push (PAIR_AF); + aopPut ( AOP (IC_RESULT (ic)), "a", MSB16); + aopPut ( AOP (IC_RESULT (ic)), "e", LSB); + + fetchPairLong (PAIR_DE, left, NULL, MSB24); + aopGet (right, MSB24, FALSE); + + _pop (PAIR_AF); + emit2 ("ld a,e"); + emit2 ("%s a,%s", later, aopGet( right, MSB24, FALSE)); + emit2 ("ld e,a"); + emit2 ("ld a,d"); + emit2 ("%s a,%s", later, aopGet( right, MSB32, FALSE)); + + aopPut ( AOP (IC_RESULT (ic)), "a", MSB32); + aopPut ( AOP (IC_RESULT (ic)), "e", MSB24); +} + +static void +_gbz80_emitAddSubLong (iCode *ic, bool isAdd) +{ + _gbz80_emitAddSubLongLong (ic, AOP (IC_LEFT (ic)), AOP (IC_RIGHT (ic)), isAdd); +} + +/*-----------------------------------------------------------------*/ +/* genUminusFloat - unary minus for floating points */ +/*-----------------------------------------------------------------*/ +static void +genUminusFloat (operand * op, operand * result) +{ + int size, offset = 0; + + emitDebug("; genUminusFloat"); + + /* for this we just need to flip the + first bit then copy the rest in place */ + size = AOP_SIZE (op) - 1; + + _moveA(aopGet (AOP (op), MSB32, FALSE)); + + emit2("xor a,!immedbyte", 0x80); + aopPut (AOP (result), "a", MSB32); + + while (size--) + { + aopPut (AOP (result), aopGet (AOP (op), offset, FALSE), offset); + offset++; + } +} + +/*-----------------------------------------------------------------*/ +/* genUminus - unary minus code generation */ +/*-----------------------------------------------------------------*/ +static void +genUminus (iCode * ic) +{ + int offset, size; + sym_link *optype, *rtype; + + /* assign asmops */ + aopOp (IC_LEFT (ic), ic, FALSE, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE, FALSE); + + /* if both in bit space then special + case */ + if (AOP_TYPE (IC_RESULT (ic)) == AOP_CRY && + AOP_TYPE (IC_LEFT (ic)) == AOP_CRY) + { + wassertl (0, "Left and right are in bit space"); + goto release; + } + + optype = operandType (IC_LEFT (ic)); + rtype = operandType (IC_RESULT (ic)); + + /* if float then do float stuff */ + if (IS_FLOAT (optype)) + { + genUminusFloat (IC_LEFT (ic), IC_RESULT (ic)); + goto release; + } + + /* otherwise subtract from zero */ + size = AOP_SIZE (IC_LEFT (ic)); + + if (AOP_SIZE (IC_RESULT (ic)) == 4 && IS_GB) + { + /* Create a new asmop with value zero */ + asmop *azero = newAsmop (AOP_SIMPLELIT); + azero->aopu.aop_simplelit = 0; + azero->size = size; + _gbz80_emitAddSubLongLong (ic, azero, AOP (IC_LEFT (ic)), FALSE); + goto release; + } + + offset = 0; + _clearCarry(); + while (size--) + { + const char *l = aopGet (AOP (IC_LEFT (ic)), offset, FALSE); + emit2 ("ld a,!zero"); + emit2 ("sbc a,%s", l); + aopPut (AOP (IC_RESULT (ic)), "a", offset++); + } + + /* if any remaining bytes in the result */ + /* we just need to propagate the sign */ + if ((size = (AOP_SIZE (IC_RESULT (ic)) - AOP_SIZE (IC_LEFT (ic))))) + { + emit2 ("rlc a"); + emit2 ("sbc a,a"); + while (size--) + aopPut (AOP (IC_RESULT (ic)), "a", offset++); + } + +release: + /* release the aops */ + freeAsmop (IC_LEFT (ic), NULL, ic); + freeAsmop (IC_RESULT (ic), NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* assignResultValue - */ +/*-----------------------------------------------------------------*/ +void +assignResultValue (operand * oper) +{ + int size = AOP_SIZE (oper); + bool topInA = 0; + + wassertl (size <= 4, "Got a result that is bigger than four bytes"); + topInA = requiresHL (AOP (oper)); + + if (IS_GB && size == 4 && requiresHL (AOP (oper))) + { + /* We do it the hard way here. */ + _push (PAIR_HL); + aopPut (AOP (oper), _fReturn[0], 0); + aopPut (AOP (oper), _fReturn[1], 1); + _pop (PAIR_DE); + aopPut (AOP (oper), _fReturn[0], 2); + aopPut (AOP (oper), _fReturn[1], 3); + } + else + { + if ((AOP_TYPE (oper) == AOP_REG) && (AOP_SIZE (oper) == 4) && + !strcmp (AOP (oper)->aopu.aop_reg[size-1]->name, _fReturn[size-2])) + { + size--; + _emitMove ("a", _fReturn[size-1]); + _emitMove (_fReturn[size-1], _fReturn[size]); + _emitMove (_fReturn[size], "a"); + aopPut (AOP (oper), _fReturn[size], size-1); + size--; + } + while(size--) + { + aopPut (AOP (oper), _fReturn[size], size); + } + } +} + +/** Simple restore that doesn't take into account what is used in the + return. +*/ +static void +_restoreRegsAfterCall(void) +{ + if (_G.stack.pushedDE) + { + _pop ( PAIR_DE); + _G.stack.pushedDE = FALSE; + } + if (_G.stack.pushedBC) + { + _pop ( PAIR_BC); + _G.stack.pushedBC = FALSE; + } + _G.saves.saved = FALSE; +} + +static void +_saveRegsForCall(iCode *ic, int sendSetSize) +{ + /* Rules: + o Stack parameters are pushed before this function enters + o DE and BC may be used in this function. + o HL and DE may be used to return the result. + o HL and DE may be used to send variables. + o DE and BC may be used to store the result value. + o HL may be used in computing the sent value of DE + o The iPushes for other parameters occur before any addSets + + Logic: (to be run inside the first iPush or if none, before sending) + o Compute if DE and/or BC are in use over the call + o Compute if DE is used in the send set + o Compute if DE and/or BC are used to hold the result value + o If (DE is used, or in the send set) and is not used in the result, push. + o If BC is used and is not in the result, push + o + o If DE is used in the send set, fetch + o If HL is used in the send set, fetch + o Call + o ... + */ + if (_G.saves.saved == FALSE) { + bool deInUse, bcInUse; + bool deSending; + bool bcInRet = FALSE, deInRet = FALSE; + bitVect *rInUse; + + rInUse = bitVectCplAnd (bitVectCopy (ic->rMask), + z80_rUmaskForOp (IC_RESULT(ic))); + + deInUse = bitVectBitValue (rInUse, D_IDX) || bitVectBitValue(rInUse, E_IDX); + bcInUse = bitVectBitValue (rInUse, B_IDX) || bitVectBitValue(rInUse, C_IDX); + + deSending = (sendSetSize > 1); + + emitDebug ("; _saveRegsForCall: sendSetSize: %u deInUse: %u bcInUse: %u deSending: %u", sendSetSize, deInUse, bcInUse, deSending); + + if (bcInUse && bcInRet == FALSE) { + _push(PAIR_BC); + _G.stack.pushedBC = TRUE; + } + if (deInUse && deInRet == FALSE) { + _push(PAIR_DE); + _G.stack.pushedDE = TRUE; + } + + _G.saves.saved = TRUE; + } + else { + /* Already saved. */ + } +} + +/*-----------------------------------------------------------------*/ +/* genIpush - genrate code for pushing this gets a little complex */ +/*-----------------------------------------------------------------*/ +static void +genIpush (iCode * ic) +{ + int size, offset = 0; + const char *l; + + /* if this is not a parm push : ie. it is spill push + and spill push is always done on the local stack */ + if (!ic->parmPush) + { + wassertl(0, "Encountered an unsupported spill push."); + return; + } + + if (_G.saves.saved == FALSE) { + /* Caller saves, and this is the first iPush. */ + /* Scan ahead until we find the function that we are pushing parameters to. + Count the number of addSets on the way to figure out what registers + are used in the send set. + */ + int nAddSets = 0; + iCode *walk = ic->next; + + while (walk) { + if (walk->op == SEND) { + nAddSets++; + } + else if (walk->op == CALL || walk->op == PCALL) { + /* Found it. */ + break; + } + else { + /* Keep looking. */ + } + walk = walk->next; + } + _saveRegsForCall(walk, nAddSets); + } + else { + /* Already saved by another iPush. */ + } + + /* then do the push */ + aopOp (IC_LEFT (ic), ic, FALSE, FALSE); + + size = AOP_SIZE (IC_LEFT (ic)); + + if (isPair (AOP (IC_LEFT (ic))) && size == 2) + { + _G.stack.pushed += 2; + emit2 ("push %s", getPairName (AOP (IC_LEFT (ic)))); + } + else + { + if (size == 2) + { + fetchHL (AOP (IC_LEFT (ic))); + emit2 ("push hl"); + _G.stack.pushed += 2; + goto release; + } + if (size == 4) + { + fetchPairLong (PAIR_HL, AOP (IC_LEFT (ic)), ic, 2); + emit2 ("push hl"); + _G.stack.pushed += 2; + fetchPairLong (PAIR_HL, AOP (IC_LEFT (ic)), ic, 0); + emit2 ("push hl"); + _G.stack.pushed += 2; + goto release; + } + offset = size; + while (size--) + { + if (AOP (IC_LEFT (ic))->type == AOP_IY) + { + char *l = aopGetLitWordLong (AOP (IC_LEFT (ic)), --offset, FALSE); + wassert (l); + emit2 ("ld a,(%s)", l); + emit2 ("push af"); + } + else + { + l = aopGet (AOP (IC_LEFT (ic)), --offset, FALSE); + if (!strcmp(l, "b")) + emit2 ("push bc"); + else if (!strcmp(l, "d")) + emit2 ("push de"); + else if (!strcmp(l, "h")) + emit2 ("push hl"); + else + { + emit2 ("ld a,%s", l); + emit2 ("push af"); + } + } + emit2 ("inc sp"); + _G.stack.pushed++; + } + } +release: + freeAsmop (IC_LEFT (ic), NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genIpop - recover the registers: can happen only for spilling */ +/*-----------------------------------------------------------------*/ +static void +genIpop (iCode * ic) +{ + int size, offset; + + + /* if the temp was not pushed then */ + if (OP_SYMBOL (IC_LEFT (ic))->isspilt) + return; + + aopOp (IC_LEFT (ic), ic, FALSE, FALSE); + size = AOP_SIZE (IC_LEFT (ic)); + offset = (size - 1); + if (isPair (AOP (IC_LEFT (ic)))) + { + emit2 ("pop %s", getPairName (AOP (IC_LEFT (ic)))); + } + else + { + while (size--) + { + emit2 ("dec sp"); + emit2 ("pop hl"); + spillPair (PAIR_HL); + aopPut (AOP (IC_LEFT (ic)), "l", offset--); + } + } + + freeAsmop (IC_LEFT (ic), NULL, ic); +} + +/* This is quite unfortunate */ +static void +setArea (int inHome) +{ + /* + static int lastArea = 0; + + if (_G.in_home != inHome) { + if (inHome) { + const char *sz = port->mem.code_name; + port->mem.code_name = "HOME"; + emit2("!area", CODE_NAME); + port->mem.code_name = sz; + } + else + emit2("!area", CODE_NAME); */ + _G.in_home = inHome; + // } +} + +static bool +isInHome (void) +{ + return _G.in_home; +} + +static int +_opUsesPair (operand * op, iCode * ic, PAIR_ID pairId) +{ + int ret = 0; + asmop *aop; + symbol *sym = OP_SYMBOL (op); + + if (sym->isspilt || sym->nRegs == 0) + return 0; + + aopOp (op, ic, FALSE, FALSE); + + aop = AOP (op); + if (aop->type == AOP_REG) + { + int i; + for (i = 0; i < aop->size; i++) + { + if (pairId == PAIR_DE) + { + emitDebug ("; name %s", aop->aopu.aop_reg[i]->name); + if (!strcmp (aop->aopu.aop_reg[i]->name, "e")) + ret++; + if (!strcmp (aop->aopu.aop_reg[i]->name, "d")) + ret++; + } + else if (pairId == PAIR_BC) + { + emitDebug ("; name %s", aop->aopu.aop_reg[i]->name); + if (!strcmp (aop->aopu.aop_reg[i]->name, "c")) + ret++; + if (!strcmp (aop->aopu.aop_reg[i]->name, "b")) + ret++; + } + else + { + wassert (0); + } + } + } + + freeAsmop (IC_LEFT (ic), NULL, ic); + return ret; +} + +/** Emit the code for a call statement + */ +static void +emitCall (iCode * ic, bool ispcall) +{ + bool bInRet, cInRet, dInRet, eInRet; + sym_link *dtype = operandType (IC_LEFT (ic)); + + /* if caller saves & we have not saved then */ + if (!ic->regsSaved) + { + /* PENDING */ + } + + _saveRegsForCall(ic, _G.sendSet ? elementsInSet(_G.sendSet) : 0); + + /* if send set is not empty then assign */ + if (_G.sendSet) + { + iCode *sic; + int send = 0; + int nSend = elementsInSet(_G.sendSet); + bool swapped = FALSE; + + int _z80_sendOrder[] = { + PAIR_BC, PAIR_DE + }; + + if (nSend > 1) { + /* Check if the parameters are swapped. If so route through hl instead. */ + wassertl (nSend == 2, "Pedantic check. Code only checks for the two send items case."); + + sic = setFirstItem(_G.sendSet); + sic = setNextItem(_G.sendSet); + + if (_opUsesPair (IC_LEFT(sic), sic, _z80_sendOrder[0])) { + /* The second send value is loaded from one the one that holds the first + send, i.e. it is overwritten. */ + /* Cache the first in HL, and load the second from HL instead. */ + emit2 ("ld h,%s", _pairs[_z80_sendOrder[0]].h); + emit2 ("ld l,%s", _pairs[_z80_sendOrder[0]].l); + + swapped = TRUE; + } + } + + for (sic = setFirstItem (_G.sendSet); sic; + sic = setNextItem (_G.sendSet)) + { + int size; + aopOp (IC_LEFT (sic), sic, FALSE, FALSE); + + size = AOP_SIZE (IC_LEFT (sic)); + wassertl (size <= 2, "Tried to send a parameter that is bigger than two bytes"); + wassertl (_z80_sendOrder[send] != PAIR_INVALID, "Tried to send more parameters than we have registers for"); + + // PENDING: Mild hack + if (swapped == TRUE && send == 1) { + if (size > 1) { + emit2 ("ld %s,h", _pairs[_z80_sendOrder[send]].h); + } + else { + emit2 ("ld %s,!zero", _pairs[_z80_sendOrder[send]].h); + } + emit2 ("ld %s,l", _pairs[_z80_sendOrder[send]].l); + } + else { + fetchPair(_z80_sendOrder[send], AOP (IC_LEFT (sic))); + } + + send++; + freeAsmop (IC_LEFT (sic), NULL, sic); + } + _G.sendSet = NULL; + } + + if (ispcall) + { + if (IFFUNC_ISBANKEDCALL (dtype) && !SPEC_STAT(getSpec(dtype))) + { + werror (W_INDIR_BANKED); + } + aopOp (IC_LEFT (ic), ic, FALSE, FALSE); + + if (isLitWord (AOP (IC_LEFT (ic)))) + { + emit2 ("call %s", aopGetLitWordLong (AOP (IC_LEFT (ic)), 0, FALSE)); + } + else + { + symbol *rlbl = newiTempLabel (NULL); + spillPair (PAIR_HL); + emit2 ("ld hl,!immed!tlabel", (rlbl->key + 100)); + emit2 ("push hl"); + _G.stack.pushed += 2; + + fetchHL (AOP (IC_LEFT (ic))); + emit2 ("jp !*hl"); + emit2 ("!tlabeldef", (rlbl->key + 100)); + _G.lines.current->isLabel = 1; + _G.stack.pushed -= 2; + } + freeAsmop (IC_LEFT (ic), NULL, ic); + } + else + { + char *name = OP_SYMBOL (IC_LEFT (ic))->rname[0] ? + OP_SYMBOL (IC_LEFT (ic))->rname : + OP_SYMBOL (IC_LEFT (ic))->name; + if (IFFUNC_ISBANKEDCALL (dtype) && !SPEC_STAT(getSpec(dtype))) + { + emit2 ("call banked_call"); + emit2 ("!dws", name); + emit2 ("!dw !bankimmeds", name); + } + else + { + /* make the call */ + emit2 ("call %s", name); + } + } + spillCached (); + + /* Mark the registers as restored. */ + _G.saves.saved = FALSE; + + /* adjust the stack for parameters if required */ + if (ic->parmBytes) + { + int i = ic->parmBytes; + + _G.stack.pushed -= i; + if (IS_GB) + { + emit2 ("!ldaspsp", i); + } + else + { + spillCached (); + if (i > 8) + { + emit2 ("ld iy,!immedword", i); + emit2 ("add iy,sp"); + emit2 ("ld sp,iy"); + } + else + { + while (i > 1) + { + emit2 ("pop af"); + i -= 2; + } + if (i) + { + emit2 ("inc sp"); + } + } + } + } + + /* if we need assign a result value */ + if ((IS_ITEMP (IC_RESULT (ic)) && + (OP_SYMBOL (IC_RESULT (ic))->nRegs || + OP_SYMBOL (IC_RESULT (ic))->spildir)) || + IS_TRUE_SYMOP (IC_RESULT (ic))) + { + aopOp (IC_RESULT (ic), ic, FALSE, FALSE); + + assignResultValue (IC_RESULT (ic)); + + freeAsmop (IC_RESULT (ic), NULL, ic); + } + + spillCached (); + if (IC_RESULT (ic)) + { + bitVect *result = z80_rUmaskForOp (IC_RESULT (ic)); + bInRet = bitVectBitValue(result, B_IDX); + cInRet = bitVectBitValue(result, C_IDX); + dInRet = bitVectBitValue(result, D_IDX); + eInRet = bitVectBitValue(result, E_IDX); + } + else + { + bInRet = FALSE; + cInRet = FALSE; + dInRet = FALSE; + eInRet = FALSE; + } + + if (_G.stack.pushedDE) + { + if (dInRet && eInRet) + { + wassertl (0, "Shouldn't push DE if it's wiped out by the return"); + } + else if (dInRet) + { + /* Only restore E */ + emit2 ("ld a,d"); + _pop (PAIR_DE); + emit2 ("ld d,a"); + } + else if (eInRet) + { + /* Only restore D */ + _pop (PAIR_AF); + emit2 ("ld d,a"); + } + else + { + _pop (PAIR_DE); + } + _G.stack.pushedDE = FALSE; + } + + if (_G.stack.pushedBC) + { + if (bInRet && cInRet) + { + wassertl (0, "Shouldn't push BC if it's wiped out by the return"); + } + else if (bInRet) + { + /* Only restore C */ + emit2 ("ld a,b"); + _pop (PAIR_BC); + emit2 ("ld b,a"); + } + else if (cInRet) + { + /* Only restore B */ + _pop (PAIR_AF); + emit2 ("ld b,a"); + } + else + { + _pop (PAIR_BC); + } + _G.stack.pushedBC = FALSE; + } +} + +/*-----------------------------------------------------------------*/ +/* genCall - generates a call statement */ +/*-----------------------------------------------------------------*/ +static void +genCall (iCode * ic) +{ + emitCall (ic, FALSE); +} + +/*-----------------------------------------------------------------*/ +/* genPcall - generates a call by pointer statement */ +/*-----------------------------------------------------------------*/ +static void +genPcall (iCode * ic) +{ + emitCall (ic, TRUE); +} + +/*-----------------------------------------------------------------*/ +/* resultRemat - result is rematerializable */ +/*-----------------------------------------------------------------*/ +static int +resultRemat (iCode * ic) +{ + if (SKIP_IC (ic) || ic->op == IFX) + return 0; + + if (IC_RESULT (ic) && IS_ITEMP (IC_RESULT (ic))) + { + symbol *sym = OP_SYMBOL (IC_RESULT (ic)); + if (sym->remat && !POINTER_SET (ic)) + return 1; + } + + return 0; +} + +extern set *publics; + +/*-----------------------------------------------------------------*/ +/* genFunction - generated code for function entry */ +/*-----------------------------------------------------------------*/ +static void +genFunction (iCode * ic) +{ + bool stackParm; + + symbol *sym = OP_SYMBOL (IC_LEFT (ic)); + sym_link *ftype; + + bool bcInUse = FALSE; + bool deInUse = FALSE; + + setArea (IFFUNC_NONBANKED (sym->type)); + + /* PENDING: Reset the receive offset as it + doesn't seem to get reset anywhere else. + */ + _G.receiveOffset = 0; + + /* Record the last function name for debugging. */ + _G.lastFunctionName = sym->rname; + + /* Create the function header */ + emit2 ("!functionheader", sym->name); + if (!IS_STATIC(sym->etype)) + { + sprintf (buffer, "%s_start", sym->rname); + emit2 ("!labeldef", buffer); + _G.lines.current->isLabel = 1; + } + emit2 ("!functionlabeldef", sym->rname); + _G.lines.current->isLabel = 1; + + ftype = operandType (IC_LEFT (ic)); + + if (IFFUNC_ISNAKED(ftype)) + { + emitDebug("; naked function: no prologue."); + return; + } + + /* if this is an interrupt service routine + then save all potentially used registers. */ + if (IFFUNC_ISISR (sym->type)) + { + /* If critical function then turn interrupts off */ + /* except when no interrupt number is given then it implies the NMI handler */ + if (IFFUNC_ISCRITICAL (sym->type) && (FUNC_INTNO(sym->type) != INTNO_UNSPEC)) + { + emit2 ("!di"); + } + + emit2 ("!pusha"); + } + else + { + /* This is a non-ISR function. + If critical function then turn interrupts off */ + if (IFFUNC_ISCRITICAL (sym->type)) + { + if (IS_GB) + { + emit2 ("!di"); + } + else + { + //get interrupt enable flag IFF2 into P/O + emit2 ("ld a,i"); + emit2 ("!di"); + //save P/O flag + emit2 ("push af"); + } + } + } + + if (options.profile) + { + emit2 ("!profileenter"); + } + + /* PENDING: callee-save etc */ + + _G.stack.param_offset = 0; + + if (z80_opts.calleeSavesBC) + { + bcInUse = TRUE; + } + + /* Detect which registers are used. */ + if (IFFUNC_CALLEESAVES(sym->type) && sym->regsUsed) + { + int i; + for (i = 0; i < sym->regsUsed->size; i++) + { + if (bitVectBitValue (sym->regsUsed, i)) + { + switch (i) + { + case C_IDX: + case B_IDX: + bcInUse = TRUE; + break; + case D_IDX: + case E_IDX: + if (IS_Z80) { + deInUse = TRUE; + } + else { + /* Other systems use DE as a temporary. */ + } + break; + } + } + } + } + + if (bcInUse) + { + emit2 ("push bc"); + _G.stack.param_offset += 2; + } + + _G.calleeSaves.pushedBC = bcInUse; + + if (deInUse) + { + emit2 ("push de"); + _G.stack.param_offset += 2; + } + + _G.calleeSaves.pushedDE = deInUse; + + /* adjust the stack for the function */ + _G.stack.last = sym->stack; + + stackParm = FALSE; + for (sym = setFirstItem (istack->syms); sym; + sym = setNextItem (istack->syms)) + { + if (sym->_isparm && !IS_REGPARM (sym->etype)) + { + stackParm = TRUE; + break; + } + } + sym = OP_SYMBOL (IC_LEFT (ic)); + + _G.omitFramePtr = options.ommitFramePtr; + if (IS_Z80 && !stackParm && !sym->stack) + { + /* When the conflicts between AOP_EXSTK && AOP_HLREG are fixed, */ + /* the above !sym->stack condition can be removed. -- EEP */ + if (sym->stack) + emit2 ("!ldaspsp", -sym->stack); + _G.omitFramePtr = TRUE; + } + else if (sym->stack && IS_GB && sym->stack > -INT8MIN) + emit2 ("!enterxl", sym->stack); + else if (sym->stack) + { + if ((optimize.codeSize && sym->stack <= 8) || sym->stack <= 4) + { + int stack = sym->stack; + emit2 ("!enter"); + while (stack > 1) + { + emit2 ("push af"); + stack -= 2; + } + if(stack > 0) + emit2 ("dec sp"); + } + else + emit2 ("!enterx", sym->stack); + } + else + emit2 ("!enter"); + + _G.stack.offset = sym->stack; +} + +/*-----------------------------------------------------------------*/ +/* genEndFunction - generates epilogue for functions */ +/*-----------------------------------------------------------------*/ +static void +genEndFunction (iCode * ic) +{ + symbol *sym = OP_SYMBOL (IC_LEFT (ic)); + + if (IFFUNC_ISNAKED(sym->type)) + { + emitDebug("; naked function: no epilogue."); + return; + } + + /* PENDING: calleeSave */ + if (IS_Z80 && _G.omitFramePtr) + { + if (_G.stack.offset) + emit2 ("!ldaspsp", _G.stack.offset); + } + else if (_G.stack.offset && IS_GB && _G.stack.offset > INT8MAX) + { + emit2 ("!leavexl", _G.stack.offset); + } + else if (_G.stack.offset) + { + emit2 ("!leavex", _G.stack.offset); + } + else + { + emit2 ("!leave"); + } + + if (_G.calleeSaves.pushedDE) + { + emit2 ("pop de"); + _G.calleeSaves.pushedDE = FALSE; + } + + if (_G.calleeSaves.pushedBC) + { + emit2 ("pop bc"); + _G.calleeSaves.pushedBC = FALSE; + } + + if (options.profile) + { + emit2 ("!profileexit"); + } + + /* if this is an interrupt service routine + then save all potentially used registers. */ + if (IFFUNC_ISISR (sym->type)) + { + emit2 ("!popa"); + + /* If critical function then turn interrupts back on */ + /* except when no interrupt number is given then it implies the NMI handler */ + if (IFFUNC_ISCRITICAL (sym->type) && (FUNC_INTNO(sym->type) != INTNO_UNSPEC)) + { + emit2 ("!ei"); + } + } + else + { + /* This is a non-ISR function. + If critical function then turn interrupts back on */ + if (IFFUNC_ISCRITICAL (sym->type)) + { + if (IS_GB) + { + emit2 ("!ei"); + } + else + { + symbol *tlbl = newiTempLabel (NULL); + //restore P/O flag + emit2 ("pop af"); + //parity odd <==> P/O=0 <==> interrupt enable flag IFF2 was 0 <==> + //don't enable interrupts as they were off before + emit2 ("jp PO,!tlabel", tlbl->key + 100); + emit2 ("!ei"); + emit2 ("!tlabeldef", (tlbl->key + 100)); + _G.lines.current->isLabel = 1; + } + } + } + + if (options.debug && currFunc) + { + debugFile->writeEndFunction (currFunc, ic, 1); + } + + if (IFFUNC_ISISR (sym->type)) + { + /* "critical interrupt" is used to imply NMI handler */ + if (IS_Z80 && IFFUNC_ISCRITICAL (sym->type) && FUNC_INTNO(sym->type) == INTNO_UNSPEC) + emit2 ("retn"); + else + emit2 ("reti"); + } + else + { + /* Both banked and non-banked just ret */ + emit2 ("ret"); + } + + if (!IS_STATIC(sym->etype)) + { + sprintf (buffer, "%s_end", sym->rname); + emit2 ("!labeldef", buffer); + _G.lines.current->isLabel = 1; + } + + _G.flushStatics = 1; + _G.stack.pushed = 0; + _G.stack.offset = 0; +} + +/*-----------------------------------------------------------------*/ +/* genRet - generate code for return statement */ +/*-----------------------------------------------------------------*/ +static void +genRet (iCode * ic) +{ + const char *l; + /* Errk. This is a hack until I can figure out how + to cause dehl to spill on a call */ + int size, offset = 0; + + /* if we have no return value then + just generate the "ret" */ + if (!IC_LEFT (ic)) + goto jumpret; + + /* we have something to return then + move the return value into place */ + aopOp (IC_LEFT (ic), ic, FALSE, FALSE); + size = AOP_SIZE (IC_LEFT (ic)); + + aopDump("IC_LEFT", AOP(IC_LEFT(ic))); + + #if 0 + if ((size == 2) && ((l = aopGetWord (AOP (IC_LEFT (ic)), 0)))) + { + if (IS_GB) + { + emit2 ("ld de,%s", l); + } + else + { + emit2 ("ld hl,%s", l); + } + } + #endif + if (size==2) + { + fetchPair(IS_GB ? PAIR_DE : PAIR_HL, AOP (IC_LEFT (ic))); + } + else + { + if (IS_GB && size == 4 && requiresHL (AOP (IC_LEFT (ic)))) + { + fetchPair (PAIR_DE, AOP (IC_LEFT (ic))); + fetchPairLong (PAIR_HL, AOP (IC_LEFT (ic)), ic, 2); + } + else + { + while (size--) + { + l = aopGet (AOP (IC_LEFT (ic)), offset, + FALSE); + if (strcmp (_fReturn[offset], l)) + emit2 ("ld %s,%s", _fReturn[offset], l); + offset++; + } + } + } + freeAsmop (IC_LEFT (ic), NULL, ic); + +jumpret: + /* generate a jump to the return label + if the next is not the return statement */ + if (!(ic->next && ic->next->op == LABEL && + IC_LABEL (ic->next) == returnLabel)) + + emit2 ("jp !tlabel", returnLabel->key + 100); +} + +/*-----------------------------------------------------------------*/ +/* genLabel - generates a label */ +/*-----------------------------------------------------------------*/ +static void +genLabel (iCode * ic) +{ + /* special case never generate */ + if (IC_LABEL (ic) == entryLabel) + return; + + emitLabel (IC_LABEL (ic)->key + 100); +} + +/*-----------------------------------------------------------------*/ +/* genGoto - generates a ljmp */ +/*-----------------------------------------------------------------*/ +static void +genGoto (iCode * ic) +{ + emit2 ("jp !tlabel", IC_LABEL (ic)->key + 100); +} + +/*-----------------------------------------------------------------*/ +/* genPlusIncr :- does addition with increment if possible */ +/*-----------------------------------------------------------------*/ +static bool +genPlusIncr (iCode * ic) +{ + unsigned int icount; + unsigned int size = getDataSize (IC_RESULT (ic)); + PAIR_ID resultId = getPairId (AOP (IC_RESULT (ic))); + + /* will try to generate an increment */ + /* if the right side is not a literal + we cannot */ + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) + return FALSE; + + emitDebug ("; genPlusIncr"); + + icount = (unsigned int) ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit); + + /* If result is a pair */ + if (resultId != PAIR_INVALID) + { + if (isLitWord (AOP (IC_LEFT (ic)))) + { + fetchLitPair (getPairId (AOP (IC_RESULT (ic))), AOP (IC_LEFT (ic)), icount); + return TRUE; + } + if (isPair (AOP (IC_LEFT (ic))) && resultId == PAIR_HL && icount > 2) + { + if (getPairId (AOP (IC_LEFT (ic))) == PAIR_HL) + { + PAIR_ID freep = getFreePairId (ic); + if (freep != PAIR_INVALID) + { + fetchPair (freep, AOP (IC_RIGHT (ic))); + emit2 ("add hl,%s", _pairs[freep].name); + return TRUE; + } + } + else + { + fetchPair (resultId, AOP (IC_RIGHT (ic))); + emit2 ("add hl,%s", getPairName (AOP (IC_LEFT (ic)))); + return TRUE; + } + } + if (icount > 5) + return FALSE; + /* Inc a pair */ + if (!sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic)))) + { + if (icount > 2) + return FALSE; + movLeft2ResultLong (IC_LEFT (ic), 0, IC_RESULT (ic), 0, 0, 2); + } + while (icount--) + { + emit2 ("inc %s", getPairName (AOP (IC_RESULT (ic)))); + } + return TRUE; + } + + if (IS_Z80 && isLitWord (AOP (IC_LEFT (ic))) && size == 2) + { + fetchLitPair (PAIR_HL, AOP (IC_LEFT (ic)), icount); + commitPair (AOP (IC_RESULT (ic)), PAIR_HL); + return TRUE; + } + + /* if the literal value of the right hand side + is greater than 4 then it is not worth it */ + if (icount > 4) + return FALSE; + + /* if increment 16 bits in register */ + if (sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic))) && + size > 1 && + icount == 1 + ) + { + int offset = 0; + symbol *tlbl = NULL; + tlbl = newiTempLabel (NULL); + while (size--) + { + emit2 ("inc %s", aopGet (AOP (IC_RESULT (ic)), offset++, FALSE)); + if (size) + { + emit2 ("!shortjp NZ,!tlabel", tlbl->key + 100); + } + } + emitLabel (tlbl->key + 100); + return TRUE; + } + + /* if the sizes are greater than 1 then we cannot */ + if (AOP_SIZE (IC_RESULT (ic)) > 1 || + AOP_SIZE (IC_LEFT (ic)) > 1) + return FALSE; + + /* If the result is in a register then we can load then increment. + */ + if (AOP_TYPE (IC_RESULT (ic)) == AOP_REG) + { + aopPut (AOP (IC_RESULT (ic)), aopGet (AOP (IC_LEFT (ic)), LSB, FALSE), LSB); + while (icount--) + { + emit2 ("inc %s", aopGet (AOP (IC_RESULT (ic)), LSB, FALSE)); + } + return TRUE; + } + + /* we can if the aops of the left & result match or + if they are in registers and the registers are the + same */ + if (sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic)))) + { + while (icount--) + { + emit2 ("inc %s", aopGet (AOP (IC_LEFT (ic)), 0, FALSE)); + } + return TRUE; + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* outBitAcc - output a bit in acc */ +/*-----------------------------------------------------------------*/ +void +outBitAcc (operand * result) +{ + symbol *tlbl = newiTempLabel (NULL); + /* if the result is a bit */ + if (AOP_TYPE (result) == AOP_CRY) + { + wassertl (0, "Tried to write A into a bit"); + } + else + { + emit2 ("!shortjp Z,!tlabel", tlbl->key + 100); + emit2 ("ld a,!one"); + emitLabel (tlbl->key + 100); + outAcc (result); + } +} + +bool +couldDestroyCarry (asmop *aop) +{ + if (aop) + { + if (aop->type == AOP_EXSTK || aop->type == AOP_IY) + { + return TRUE; + } + } + return FALSE; +} + +static void +shiftIntoPair (int idx, asmop *aop) +{ + PAIR_ID id = PAIR_INVALID; + + wassertl (IS_Z80, "Only implemented for the Z80"); + // wassertl (aop->type == AOP_EXSTK, "Only implemented for EXSTK"); + + emitDebug ("; Shift into pair idx %u", idx); + + switch (idx) + { + case 0: + id = PAIR_HL; + setupPair (PAIR_HL, aop, 0); + break; + case 1: + id = PAIR_DE; + _push (PAIR_DE); + setupPair (PAIR_IY, aop, 0); + emit2 ("push iy"); + emit2 ("pop %s", _pairs[id].name); + break; + case 2: + id = PAIR_IY; + setupPair (PAIR_IY, aop, 0); + break; + default: + wassertl (0, "Internal error - hit default case"); + } + + aop->type = AOP_PAIRPTR; + aop->aopu.aop_pairId = id; + _G.pairs[id].offset = 0; + _G.pairs[id].last_type = aop->type; +} + +static void +setupToPreserveCarry (iCode * ic) +{ + asmop *left = AOP (IC_LEFT (ic)); + asmop *right = AOP (IC_RIGHT (ic)); + asmop *result = AOP (IC_RESULT (ic)); + + wassert (left && right); + + if (IS_Z80) + { + if (couldDestroyCarry (right) && couldDestroyCarry (result)) + { + shiftIntoPair (0, right); + /* check result again, in case right == result */ + if (couldDestroyCarry (result)) + { + if (!isPairInUse (PAIR_DE, ic)) + shiftIntoPair (1, result); + else + shiftIntoPair (2, result); + } + } + else if (couldDestroyCarry (right)) + { + if (getPairId (result) == PAIR_HL) + _G.preserveCarry = TRUE; + else + shiftIntoPair (0, right); + } + else if (couldDestroyCarry (result)) + { + shiftIntoPair (0, result); + } + else + { + /* Fine */ + } + } +} + +/*-----------------------------------------------------------------*/ +/* genPlus - generates code for addition */ +/*-----------------------------------------------------------------*/ +static void +genPlus (iCode * ic) +{ + int size, offset = 0; + + /* special cases :- */ + + aopOp (IC_LEFT (ic), ic, FALSE, FALSE); + aopOp (IC_RIGHT (ic), ic, FALSE, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE, FALSE); + + /* Swap the left and right operands if: + + if literal, literal on the right or + if left requires ACC or right is already + in ACC */ + + if ((AOP_TYPE (IC_LEFT (ic)) == AOP_LIT) || + (AOP_NEEDSACC (IC_RIGHT (ic))) || + AOP_TYPE (IC_RIGHT (ic)) == AOP_ACC) + { + operand *t = IC_RIGHT (ic); + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = t; + } + + /* if both left & right are in bit + space */ + if (AOP_TYPE (IC_LEFT (ic)) == AOP_CRY && + AOP_TYPE (IC_RIGHT (ic)) == AOP_CRY) + { + /* Cant happen */ + wassertl (0, "Tried to add two bits"); + } + + /* if left in bit space & right literal */ + if (AOP_TYPE (IC_LEFT (ic)) == AOP_CRY && + AOP_TYPE (IC_RIGHT (ic)) == AOP_LIT) + { + /* Can happen I guess */ + wassertl (0, "Tried to add a bit to a literal"); + } + + /* if I can do an increment instead + of add then GOOD for ME */ + if (genPlusIncr (ic) == TRUE) + goto release; + + size = getDataSize (IC_RESULT (ic)); + + /* Special case when left and right are constant */ + if (isPair (AOP (IC_RESULT (ic)))) + { + char *left, *right; + left = aopGetLitWordLong (AOP (IC_LEFT (ic)), 0, FALSE); + right = aopGetLitWordLong (AOP (IC_RIGHT (ic)), 0, FALSE); + + if (AOP_TYPE(IC_LEFT(ic)) == AOP_LIT && AOP_TYPE(IC_RIGHT(ic)) == AOP_LIT && + left && right) + { + /* It's a pair */ + /* PENDING: fix */ + char buffer[100]; + sprintf (buffer, "#(%s + %s)", left, right); + emit2 ("ld %s,%s", getPairName (AOP (IC_RESULT (ic))), buffer); + goto release; + } + } + + if ((isPair (AOP (IC_RIGHT (ic))) || isPair (AOP (IC_LEFT (ic)))) && getPairId (AOP (IC_RESULT (ic))) == PAIR_HL) + { + /* Fetch into HL then do the add */ + PAIR_ID left = getPairId (AOP (IC_LEFT (ic))); + PAIR_ID right = getPairId (AOP (IC_RIGHT (ic))); + + spillPair (PAIR_HL); + + if (left == PAIR_HL && right != PAIR_INVALID) + { + emit2 ("add hl,%s", _pairs[right].name); + goto release; + } + else if (right == PAIR_HL && left != PAIR_INVALID) + { + emit2 ("add hl,%s", _pairs[left].name); + goto release; + } + else if (right != PAIR_INVALID && right != PAIR_HL) + { + fetchPair (PAIR_HL, AOP (IC_LEFT (ic))); + emit2 ("add hl,%s", getPairName (AOP (IC_RIGHT (ic)))); + goto release; + } + else if (left != PAIR_INVALID && left != PAIR_HL) + { + fetchPair (PAIR_HL, AOP (IC_RIGHT (ic))); + emit2 ("add hl,%s", getPairName (AOP (IC_LEFT (ic)))); + goto release; + } + else + { + /* Can't do it */ + } + } + + if (isPair (AOP (IC_RIGHT (ic))) && AOP_TYPE (IC_LEFT (ic)) == AOP_IMMD && getPairId (AOP (IC_RIGHT (ic))) != PAIR_HL) + { + fetchPair (PAIR_HL, AOP (IC_LEFT (ic))); + emit2 ("add hl,%s", getPairName (AOP (IC_RIGHT (ic)))); + spillPair (PAIR_HL); + commitPair ( AOP (IC_RESULT (ic)), PAIR_HL); + goto release; + } + + if (isPair (AOP (IC_LEFT (ic))) && AOP_TYPE (IC_RIGHT (ic)) == AOP_LIT && getPairId (AOP (IC_LEFT (ic))) != PAIR_HL) + { + fetchPair (PAIR_HL, AOP (IC_RIGHT (ic))); + emit2 ("add hl,%s", getPairName (AOP (IC_LEFT (ic)))); + spillPair (PAIR_HL); + commitPair ( AOP (IC_RESULT (ic)), PAIR_HL); + goto release; + } + + /* Special case: + ld hl,sp+n trashes C so we can't afford to do it during an + add with stack based variables. Worst case is: + ld hl,sp+left + ld a,(hl) + ld hl,sp+right + add (hl) + ld hl,sp+result + ld (hl),a + ld hl,sp+left+1 + ld a,(hl) + ld hl,sp+right+1 + adc (hl) + ld hl,sp+result+1 + ld (hl),a + So you can't afford to load up hl if either left, right, or result + is on the stack (*sigh*) The alt is: + ld hl,sp+left + ld de,(hl) + ld hl,sp+right + ld hl,(hl) + add hl,de + ld hl,sp+result + ld (hl),hl + Combinations in here are: + * If left or right are in bc then the loss is small - trap later + * If the result is in bc then the loss is also small + */ + if (IS_GB) + { + if (AOP_TYPE (IC_LEFT (ic)) == AOP_STK || + AOP_TYPE (IC_RIGHT (ic)) == AOP_STK || + AOP_TYPE (IC_RESULT (ic)) == AOP_STK) + { + if ((AOP_SIZE (IC_LEFT (ic)) == 2 || + AOP_SIZE (IC_RIGHT (ic)) == 2) && + (AOP_SIZE (IC_LEFT (ic)) <= 2 && + AOP_SIZE (IC_RIGHT (ic)) <= 2)) + { + if (getPairId (AOP (IC_RIGHT (ic))) == PAIR_BC) + { + /* Swap left and right */ + operand *t = IC_RIGHT (ic); + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = t; + } + if (getPairId (AOP (IC_LEFT (ic))) == PAIR_BC) + { + fetchPair (PAIR_HL, AOP (IC_RIGHT (ic))); + emit2 ("add hl,bc"); + } + else + { + fetchPair (PAIR_DE, AOP (IC_LEFT (ic))); + fetchPair (PAIR_HL, AOP (IC_RIGHT (ic))); + emit2 ("add hl,de"); + } + commitPair (AOP (IC_RESULT (ic)), PAIR_HL); + goto release; + } + } + if (size == 4) + { + /* Be paranoid on the GB with 4 byte variables due to how C + can be trashed by lda hl,n(sp). + */ + _gbz80_emitAddSubLong (ic, TRUE); + goto release; + } + } + + setupToPreserveCarry (ic); + + /* This is ugly, but it fixes the worst code generation bug on Z80. */ + /* Probably something similar has to be done for addition of larger numbers, too. */ + if(size == 2) + { + _moveA (aopGet (AOP (IC_LEFT (ic)), 0, FALSE)); + emit2 ("add a,%s", aopGet (AOP (IC_RIGHT (ic)), 0, FALSE)); + if(strcmp (aopGet (AOP (IC_RESULT (ic)), 0, FALSE), aopGet (AOP (IC_LEFT (ic)), 1, FALSE))) + { + aopPut (AOP (IC_RESULT (ic)), "a", 0); + _moveA (aopGet (AOP (IC_LEFT (ic)), 1, FALSE)); + } + else + { + emitDebug ("; Addition result is in same register as operand of next addition."); + if(strchr (aopGet (AOP (IC_RESULT (ic)), 0, FALSE), 'c') || + strchr (aopGet (AOP (IC_RESULT (ic)), 0, FALSE), 'b') ) + { + emit2 ("push de"); + emit2 ("ld e, a"); + emit2 ("ld a, %s", aopGet (AOP (IC_LEFT (ic)), 1, FALSE)); + emit2 ("ld d, a"); + emit2 ("ld a, e"); + emit2 ("ld %s, a", aopGet (AOP (IC_RESULT (ic)), 0, FALSE)); + emit2 ("ld a, d"); + emit2 ("pop de"); + } + else + { + emit2 ("push bc"); + emit2 ("ld c, a"); + emit2 ("ld a, %s", aopGet (AOP (IC_LEFT (ic)), 1, FALSE)); + emit2 ("ld b, a"); + emit2 ("ld a, c"); + emit2 ("ld %s, a", aopGet (AOP (IC_RESULT (ic)), 0, FALSE)); + emit2 ("ld a, b"); + emit2 ("pop bc"); + } + + } + emit2 ("adc a,%s", aopGet (AOP (IC_RIGHT (ic)), 1, FALSE)); + aopPut (AOP (IC_RESULT (ic)), "a", 1); + goto release; + } + + while (size--) + { + _moveA (aopGet (AOP (IC_LEFT (ic)), offset, FALSE)); + if (offset == 0) + { + if(size == 0 && AOP_TYPE (IC_RIGHT (ic)) == AOP_LIT && ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit) == 1) + emit2 ("inc a"); + else + emit2 ("add a,%s", aopGet (AOP (IC_RIGHT (ic)), offset, FALSE)); + } + else + emit2 ("adc a,%s", aopGet (AOP (IC_RIGHT (ic)), offset, FALSE)); + aopPut (AOP (IC_RESULT (ic)), "a", offset++); + } + +release: + _G.preserveCarry = FALSE; + freeAsmop (IC_LEFT (ic), NULL, ic); + freeAsmop (IC_RIGHT (ic), NULL, ic); + freeAsmop (IC_RESULT (ic), NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genMinusDec :- does subtraction with deccrement if possible */ +/*-----------------------------------------------------------------*/ +static bool +genMinusDec (iCode * ic) +{ + unsigned int icount; + unsigned int size = getDataSize (IC_RESULT (ic)); + + /* will try to generate an increment */ + /* if the right side is not a literal we cannot */ + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) + return FALSE; + + /* if the literal value of the right hand side + is greater than 4 then it is not worth it */ + if ((icount = (unsigned int) ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit)) > 2) + return FALSE; + + size = getDataSize (IC_RESULT (ic)); + + /* if decrement 16 bits in register */ + if (sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic))) && + (size > 1) && isPair (AOP (IC_RESULT (ic)))) + { + while (icount--) + emit2 ("dec %s", getPairName (AOP (IC_RESULT (ic)))); + return TRUE; + } + + /* If result is a pair */ + if (isPair (AOP (IC_RESULT (ic)))) + { + movLeft2ResultLong (IC_LEFT (ic), 0, IC_RESULT (ic), 0, 0, 2); + while (icount--) + emit2 ("dec %s", getPairName (AOP (IC_RESULT (ic)))); + return TRUE; + } + + /* if increment 16 bits in register */ + if (sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic))) && + (size == 2) + ) + { + fetchPair (_getTempPairId(), AOP (IC_RESULT (ic))); + + while (icount--) { + emit2 ("dec %s", _getTempPairName()); + } + + commitPair (AOP (IC_RESULT (ic)), _getTempPairId()); + + return TRUE; + } + + + /* if the sizes are greater than 1 then we cannot */ + if (AOP_SIZE (IC_RESULT (ic)) > 1 || + AOP_SIZE (IC_LEFT (ic)) > 1) + return FALSE; + + /* we can if the aops of the left & result match or if they are in + registers and the registers are the same */ + if (sameRegs (AOP (IC_LEFT (ic)), AOP (IC_RESULT (ic)))) + { + while (icount--) + emit2 ("dec %s", aopGet (AOP (IC_RESULT (ic)), 0, FALSE)); + return TRUE; + } + + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* genMinus - generates code for subtraction */ +/*-----------------------------------------------------------------*/ +static void +genMinus (iCode * ic) +{ + int size, offset = 0; + unsigned long lit = 0L; + + aopOp (IC_LEFT (ic), ic, FALSE, FALSE); + aopOp (IC_RIGHT (ic), ic, FALSE, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE, FALSE); + + /* special cases :- */ + /* if both left & right are in bit space */ + if (AOP_TYPE (IC_LEFT (ic)) == AOP_CRY && + AOP_TYPE (IC_RIGHT (ic)) == AOP_CRY) + { + wassertl (0, "Tried to subtract two bits"); + goto release; + } + + /* if I can do an decrement instead of subtract then GOOD for ME */ + if (genMinusDec (ic) == TRUE) + goto release; + + size = getDataSize (IC_RESULT (ic)); + + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) + { + } + else + { + lit = ulFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit); + lit = -(long) lit; + } + + /* Same logic as genPlus */ + if (IS_GB) + { + if (AOP_TYPE (IC_LEFT (ic)) == AOP_STK || + AOP_TYPE (IC_RIGHT (ic)) == AOP_STK || + AOP_TYPE (IC_RESULT (ic)) == AOP_STK) + { + if ((AOP_SIZE (IC_LEFT (ic)) == 2 || + AOP_SIZE (IC_RIGHT (ic)) == 2) && + (AOP_SIZE (IC_LEFT (ic)) <= 2 && + AOP_SIZE (IC_RIGHT (ic)) <= 2)) + { + PAIR_ID left = getPairId (AOP (IC_LEFT (ic))); + PAIR_ID right = getPairId (AOP (IC_RIGHT (ic))); + + if (left == PAIR_INVALID && right == PAIR_INVALID) + { + left = PAIR_DE; + right = PAIR_HL; + } + else if (right == PAIR_INVALID) + right = PAIR_DE; + else if (left == PAIR_INVALID) + left = PAIR_DE; + + fetchPair (left, AOP (IC_LEFT (ic))); + /* Order is important. Right may be HL */ + fetchPair (right, AOP (IC_RIGHT (ic))); + + emit2 ("ld a,%s", _pairs[left].l); + emit2 ("sub a,%s", _pairs[right].l); + emit2 ("ld e,a"); + emit2 ("ld a,%s", _pairs[left].h); + emit2 ("sbc a,%s", _pairs[right].h); + + if ( AOP_SIZE (IC_RESULT (ic)) > 1) + { + aopPut (AOP (IC_RESULT (ic)), "a", 1); + } + aopPut (AOP (IC_RESULT (ic)), "e", 0); + goto release; + } + } + if (size == 4) + { + /* Be paranoid on the GB with 4 byte variables due to how C + can be trashed by lda hl,n(sp). + */ + _gbz80_emitAddSubLong (ic, FALSE); + goto release; + } + } + + setupToPreserveCarry (ic); + + /* if literal, add a,#-lit, else normal subb */ + while (size--) + { + _moveA (aopGet (AOP (IC_LEFT (ic)), offset, FALSE)); + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) + { + if (!offset) + emit2 ("sub a,%s", + aopGet (AOP (IC_RIGHT (ic)), offset, FALSE)); + else + emit2 ("sbc a,%s", + aopGet (AOP (IC_RIGHT (ic)), offset, FALSE)); + } + else + { + /* first add without previous c */ + if (!offset) + { + if (size == 0 && (unsigned int) (lit & 0x0FFL) == 0xFF) + emit2 ("dec a"); + else + emit2 ("add a,!immedbyte", (unsigned int) (lit & 0x0FFL)); + } + else + emit2 ("adc a,!immedbyte", (unsigned int) ((lit >> (offset * 8)) & 0x0FFL)); + } + aopPut (AOP (IC_RESULT (ic)), "a", offset++); + } + + if (AOP_SIZE (IC_RESULT (ic)) == 3 && + AOP_SIZE (IC_LEFT (ic)) == 3 && + !sameRegs (AOP (IC_RESULT (ic)), AOP (IC_LEFT (ic)))) + { + wassertl (0, "Tried to subtract on a long pointer"); + } + +release: + _G.preserveCarry = FALSE; + freeAsmop (IC_LEFT (ic), NULL, ic); + freeAsmop (IC_RIGHT (ic), NULL, ic); + freeAsmop (IC_RESULT (ic), NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genMultChar - generates code for unsigned 8x8 multiplication */ +/*-----------------------------------------------------------------*/ +static void +genMultOneChar (iCode * ic) +{ + symbol *tlbl1, *tlbl2; + bool savedB = FALSE; + + if(IS_GB) + { + wassertl (0, "Multiplication is handled through support function calls on gbz80"); + return; + } + + /* Save b into a if b is in use. */ + if (bitVectBitValue (ic->rMask, B_IDX) && + !(getPairId (AOP (IC_RESULT (ic))) == PAIR_BC)) + { + emit2 ("ld a, b"); + savedB = TRUE; + } + if (isPairInUse (PAIR_DE, ic) && + !(getPairId (AOP (IC_RESULT (ic))) == PAIR_DE)) + { + _push (PAIR_DE); + _G.stack.pushedDE = TRUE; + } + + tlbl1 = newiTempLabel (NULL); + tlbl2 = newiTempLabel (NULL); + + emit2 ("ld e,%s", aopGet (AOP (IC_RIGHT (ic)), LSB, FALSE)); + emit2 ("ld h,%s", aopGet (AOP (IC_LEFT (ic)), LSB, FALSE)); + emit2 ("ld l,#0x00"); + emit2 ("ld d,l"); + emit2 ("ld b,#0x08"); + emitLabel (tlbl1->key + 100); + emit2 ("add hl,hl"); + emit2 ("jp NC,!tlabel", tlbl2->key + 100); + emit2 ("add hl,de"); + emitLabel (tlbl2->key + 100); + emit2 ("djnz !tlabel", tlbl1->key + 100); + + spillPair(PAIR_HL); + + if (IS_Z80 && _G.stack.pushedDE) + { + _pop (PAIR_DE); + _G.stack.pushedDE = FALSE; + } + if (savedB) + { + emit2 ("ld b, a"); + } + + if (AOP_SIZE (IC_RESULT (ic)) == 1) + aopPut (AOP (IC_RESULT (ic)), "l", 0); + else + commitPair ( AOP (IC_RESULT (ic)), PAIR_HL); + + freeAsmop (IC_LEFT (ic), NULL, ic); + freeAsmop (IC_RIGHT (ic), NULL, ic); + freeAsmop (IC_RESULT (ic), NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genMult - generates code for multiplication */ +/*-----------------------------------------------------------------*/ +static void +genMult (iCode * ic) +{ + int val; + int count, i; + /* If true then the final operation should be a subtract */ + bool active = FALSE; + bool byteResult; + + /* Shouldn't occur - all done through function calls */ + aopOp (IC_LEFT (ic), ic, FALSE, FALSE); + aopOp (IC_RIGHT (ic), ic, FALSE, FALSE); + aopOp (IC_RESULT (ic), ic, TRUE, FALSE); + + byteResult = (AOP_SIZE (IC_RESULT (ic)) == 1); + + if (AOP_SIZE (IC_LEFT (ic)) > 2 || + AOP_SIZE (IC_RIGHT (ic)) > 2 || + AOP_SIZE (IC_RESULT (ic)) > 2) + { + wassertl (0, "Multiplication is handled through support function calls"); + } + + /* Swap left and right such that right is a literal */ + if ((AOP_TYPE (IC_LEFT (ic)) == AOP_LIT)) + { + operand *t = IC_RIGHT (ic); + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = t; + } + + if (AOP_TYPE (IC_RIGHT (ic)) != AOP_LIT) + { + genMultOneChar (ic); + return; + } + + wassertl (AOP_TYPE (IC_RIGHT (ic)) == AOP_LIT, "Right must be a literal"); + + val = (int) ulFromVal ( AOP (IC_RIGHT (ic))->aopu.aop_lit); + // wassertl (val > 0, "Multiply must be positive"); + wassertl (val != 1, "Can't multiply by 1"); + + if (IS_Z80 && isPairInUseNotInRet (PAIR_DE, ic)) { + _push (PAIR_DE); + _G.stack.pushedDE = TRUE; + } + + if (byteResult) + emit2 ("ld a,%s", aopGet (AOP (IC_LEFT (ic)), LSB, FALSE)); + else if ( AOP_SIZE (IC_LEFT (ic)) == 1 && !SPEC_USIGN (getSpec (operandType ( IC_LEFT (ic))))) + { + emit2 ("ld e,%s", aopGet (AOP (IC_LEFT (ic)), LSB, FALSE)); + if (!byteResult) + { + emit2 ("ld a,e"); + emit2 ("rlc a"); + emit2 ("sbc a,a"); + emit2 ("ld d,a"); + } + } + else + { + fetchPair (PAIR_DE, AOP (IC_LEFT (ic))); + } + + i = val; + + for (count = 0; count < 16; count++) + { + if (count != 0 && active) + { + if (byteResult) + emit2 ("add a,a"); + else + emit2 ("add hl,hl"); + } + if (i & 0x8000U) + { + if (active == FALSE) + { + if (byteResult) + emit2("ld e,a"); + else + { + emit2 ("ld l,e"); + emit2 ("ld h,d"); + } + } + else + { + if (byteResult) + emit2 ("add a,e"); + else + emit2 ("add hl,de"); + } + active = TRUE; + } + i <<= 1; + } + + spillPair(PAIR_HL); + + if (IS_Z80 && _G.stack.pushedDE) + { + _pop (PAIR_DE); + _G.stack.pushedDE = FALSE; + } + + if (byteResult) + aopPut (AOP (IC_RESULT (ic)), "a", 0); + else + commitPair ( AOP (IC_RESULT (ic)), PAIR_HL); + + freeAsmop (IC_LEFT (ic), NULL, ic); + freeAsmop (IC_RIGHT (ic), NULL, ic); + freeAsmop (IC_RESULT (ic), NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genDiv - generates code for division */ +/*-----------------------------------------------------------------*/ +static void +genDiv (iCode * ic) +{ + /* Shouldn't occur - all done through function calls */ + wassertl (0, "Division is handled through support function calls"); +} + +/*-----------------------------------------------------------------*/ +/* genMod - generates code for division */ +/*-----------------------------------------------------------------*/ +static void +genMod (iCode * ic) +{ + /* Shouldn't occur - all done through function calls */ + wassert (0); +} + +/*-----------------------------------------------------------------*/ +/* genIfxJump :- will create a jump depending on the ifx */ +/*-----------------------------------------------------------------*/ +static void +genIfxJump (iCode * ic, char *jval) +{ + symbol *jlbl; + const char *inst; + + /* if true label then we jump if condition + supplied is true */ + if (IC_TRUE (ic)) + { + jlbl = IC_TRUE (ic); + if (!strcmp (jval, "a")) + { + inst = "NZ"; + } + else if (!strcmp (jval, "c")) + { + inst = "C"; + } + else if (!strcmp (jval, "nc")) + { + inst = "NC"; + } + else if (!strcmp (jval, "m")) + { + inst = "M"; + } + else if (!strcmp (jval, "p")) + { + inst = "P"; + } + else + { + /* The buffer contains the bit on A that we should test */ + inst = "NZ"; + } + } + else + { + /* false label is present */ + jlbl = IC_FALSE (ic); + if (!strcmp (jval, "a")) + { + inst = "Z"; + } + else if (!strcmp (jval, "c")) + { + inst = "NC"; + } + else if (!strcmp (jval, "nc")) + { + inst = "C"; + } + else if (!strcmp (jval, "m")) + { + inst = "P"; + } + else if (!strcmp (jval, "p")) + { + inst = "M"; + } + else + { + /* The buffer contains the bit on A that we should test */ + inst = "Z"; + } + } + /* Z80 can do a conditional long jump */ + if (!strcmp (jval, "a")) + { + emit2 ("or a,a"); + } + else if (!strcmp (jval, "c")) + { + } + else if (!strcmp (jval, "nc")) + { + } + else if (!strcmp (jval, "m")) + { + } + else if (!strcmp (jval, "p")) + { + } + else + { + emit2 ("bit %s,a", jval); + } + emit2 ("jp %s,!tlabel", inst, jlbl->key + 100); + + /* mark the icode as generated */ + ic->generated = 1; +} + +#if DISABLED +static const char * +_getPairIdName (PAIR_ID id) +{ + return _pairs[id].name; +} +#endif + +#if OLD + /* if unsigned char cmp with lit, just compare */ + if ((size == 1) && + (AOP_TYPE (right) == AOP_LIT && AOP_TYPE (left) != AOP_DIR)) + { + emit2 ("ld a,%s", aopGet (AOP (left), offset, FALSE)); + if (sign) + { + emit2 ("xor a,!immedbyte", 0x80); + emit2 ("cp %s^!constbyte", aopGet (AOP (right), offset, FALSE), 0x80); + } + else + emit2 ("cp %s", aopGet (AOP (right), offset, FALSE)); + } + else if (size == 4 && IS_GB && requiresHL(AOP(right)) && requiresHL(AOP(left))) + { + // On the Gameboy we can't afford to adjust HL as it may trash the carry. + // Pull left into DE and right into HL + aopGet (AOP(left), LSB, FALSE); + emit2 ("ld d,h"); + emit2 ("ld e,l"); + aopGet (AOP(right), LSB, FALSE); + + while (size--) + { + if (size == 0 && sign) + { + // Highest byte when signed needs the bits flipped + // Save the flags + emit2 ("push af"); + emit2 ("ld a,(de)"); + emit2 ("xor !immedbyte", 0x80); + emit2 ("ld e,a"); + emit2 ("ld a,(hl)"); + emit2 ("xor !immedbyte", 0x80); + emit2 ("ld d,a"); + emit2 ("pop af"); + emit2 ("ld a,e"); + emit2 ("%s a,d", offset == 0 ? "sub" : "sbc"); + } + else + { + emit2 ("ld a,(de)"); + emit2 ("%s a,(hl)", offset == 0 ? "sub" : "sbc"); + } + + if (size != 0) + { + emit2 ("inc hl"); + emit2 ("inc de"); + } + offset++; + } + spillPair (PAIR_HL); + } + else if (size == 4 && IS_Z80 && couldDestroyCarry(AOP(right)) && couldDestroyCarry(AOP(left))) + { + setupPair (PAIR_HL, AOP (left), 0); + aopGet (AOP(right), LSB, FALSE); + + while (size--) + { + if (size == 0 && sign) + { + // Highest byte when signed needs the bits flipped + // Save the flags + emit2 ("push af"); + emit2 ("ld a,(hl)"); + emit2 ("xor !immedbyte", 0x80); + emit2 ("ld l,a"); + emit2 ("ld a,%d(iy)", offset); + emit2 ("xor !immedbyte", 0x80); + emit2 ("ld h,a"); + emit2 ("pop af"); + emit2 ("ld a,l"); + emit2 ("%s a,h", offset == 0 ? "sub" : "sbc"); + } + else + { + emit2 ("ld a,(hl)"); + emit2 ("%s a,%d(iy)", offset == 0 ? "sub" : "sbc", offset); + } + + if (size != 0) + { + emit2 ("inc hl"); + } + offset++; + } + spillPair (PAIR_HL); + spillPair (PAIR_IY); + } + else + { + if (AOP_TYPE (right) == AOP_LIT) + { + lit = ulFromVal (AOP (right)->aopu.aop_lit); + /* optimize if(x < 0) or if(x >= 0) */ + if (lit == 0L) + { + if (!sign) + { + /* No sign so it's always false */ + _clearCarry(); + } + else + { + /* Just load in the top most bit */ + _moveA (aopGet (AOP (left), AOP_SIZE (left) - 1, FALSE)); + if (!(AOP_TYPE (result) == AOP_CRY && AOP_SIZE (result)) && ifx) + { + genIfxJump (ifx, "7"); + return; + } + else + emit2 ("rlc a"); + } + goto release; + } + } + + if (sign) + { + /* First setup h and l contaning the top most bytes XORed */ + bool fDidXor = FALSE; + if (AOP_TYPE (left) == AOP_LIT) + { + unsigned long lit = ulFromVal (AOP (left)->aopu.aop_lit); + emit2 ("ld %s,!immedbyte", _fTmp[0], + 0x80 ^ (unsigned int) ((lit >> ((size - 1) * 8)) & 0x0FFL)); + } + else + { + emit2 ("ld a,%s", aopGet (AOP (left), size - 1, FALSE)); + emit2 ("xor a,!immedbyte", 0x80); + emit2 ("ld %s,a", _fTmp[0]); + fDidXor = TRUE; + } + if (AOP_TYPE (right) == AOP_LIT) + { + unsigned long lit = ulFromVal (AOP (right)->aopu.aop_lit); + emit2 ("ld %s,!immedbyte", _fTmp[1], + 0x80 ^ (unsigned int) ((lit >> ((size - 1) * 8)) & 0x0FFL)); + } + else + { + emit2 ("ld a,%s", aopGet (AOP (right), size - 1, FALSE)); + emit2 ("xor a,!immedbyte", 0x80); + emit2 ("ld %s,a", _fTmp[1]); + fDidXor = TRUE; + } + } + while (size--) + { + /* Do a long subtract */ + if (!sign || size) + { + _moveA (aopGet (AOP (left), offset, FALSE)); + } + if (sign && size == 0) + { + emit2 ("ld a,%s", _fTmp[0]); + emit2 ("%s a,%s", offset == 0 ? "sub" : "sbc", _fTmp[1]); + } + else + { + /* Subtract through, propagating the carry */ + emit2 ("%s a,%s", offset == 0 ? "sub" : "sbc", aopGet (AOP (right), offset, FALSE)); + offset++; + } + } + } + } +#endif + +/** Generic compare for > or < + */ +static void +genCmp (operand * left, operand * right, + operand * result, iCode * ifx, int sign) +{ + int size, offset = 0; + unsigned long lit = 0L; + + /* if left & right are bit variables */ + if (AOP_TYPE (left) == AOP_CRY && + AOP_TYPE (right) == AOP_CRY) + { + /* Cant happen on the Z80 */ + wassertl (0, "Tried to compare two bits"); + } + else + { + /* Do a long subtract of right from left. */ + size = max (AOP_SIZE (left), AOP_SIZE (right)); + + if (size > 1 && IS_GB && requiresHL(AOP(right)) && requiresHL(AOP(left))) + { + // On the Gameboy we can't afford to adjust HL as it may trash the carry. + // Pull left into DE and right into HL + aopGet (AOP(left), LSB, FALSE); + emit2 ("ld d,h"); + emit2 ("ld e,l"); + aopGet (AOP(right), LSB, FALSE); + + while (size--) + { + emit2 ("ld a,(de)"); + emit2 ("%s a,(hl)", offset == 0 ? "sub" : "sbc"); + + if (size != 0) + { + emit2 ("inc hl"); + emit2 ("inc de"); + } + offset++; + } + spillPair (PAIR_HL); + goto release; + } + + if (AOP_TYPE (right) == AOP_LIT) + { + lit = ulFromVal (AOP (right)->aopu.aop_lit); + /* optimize if(x < 0) or if(x >= 0) */ + if (lit == 0) + { + if (!sign) + { + /* No sign so it's always false */ + _clearCarry(); + } + else + { + /* Just load in the top most bit */ + _moveA (aopGet (AOP (left), AOP_SIZE (left) - 1, FALSE)); + if (!(AOP_TYPE (result) == AOP_CRY && AOP_SIZE (result)) && ifx) + { + genIfxJump (ifx, "7"); + return; + } + else + { + if (!sign) + { + emit2 ("rlc a"); + } + if (ifx) + { + genIfxJump (ifx, "nc"); + return; + } + } + } + goto release; + } + } + + while (size--) + { + _moveA (aopGet (AOP (left), offset, FALSE)); + /* Subtract through, propagating the carry */ + emit2 ("%s a,%s", offset == 0 ? "sub" : "sbc", aopGet (AOP (right), offset, FALSE)); + offset++; + } + } + +release: + if (AOP_TYPE (result) == AOP_CRY && AOP_SIZE (result)) + { + if (sign) + { + /* Shift the sign bit up into carry */ + emit2 ("rlca"); + } + outBitC (result); + } + else + { + /* if the result is used in the next + ifx conditional branch then generate + code a little differently */ + if (ifx) + { + if (sign) + { + if (IS_GB) + { + emit2 ("rlca"); + genIfxJump (ifx, "c"); + } + else + { + genIfxJump (ifx, "m"); + } + } + else + { + genIfxJump (ifx, "c"); + } + } + else + { + if (sign) + { + /* Shift the sign bit up into carry */ + emit2 ("rlca"); + } + outBitC (result); + } + /* leave the result in acc */ + } +} + +/*-----------------------------------------------------------------*/ +/* genCmpGt :- greater than comparison */ +/*-----------------------------------------------------------------*/ +static void +genCmpGt (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + sym_link *letype, *retype; + int sign; + + left = IC_LEFT (ic); + right = IC_RIGHT (ic); + result = IC_RESULT (ic); + + letype = getSpec (operandType (left)); + retype = getSpec (operandType (right)); + sign = !(SPEC_USIGN (letype) | SPEC_USIGN (retype)); + /* assign the asmops */ + aopOp (left, ic, FALSE, FALSE); + aopOp (right, ic, FALSE, FALSE); + aopOp (result, ic, TRUE, FALSE); + + setupToPreserveCarry (ic); + + genCmp (right, left, result, ifx, sign); + + _G.preserveCarry = FALSE; + freeAsmop (left, NULL, ic); + freeAsmop (right, NULL, ic); + freeAsmop (result, NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genCmpLt - less than comparisons */ +/*-----------------------------------------------------------------*/ +static void +genCmpLt (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + sym_link *letype, *retype; + int sign; + + left = IC_LEFT (ic); + right = IC_RIGHT (ic); + result = IC_RESULT (ic); + + letype = getSpec (operandType (left)); + retype = getSpec (operandType (right)); + sign = !(SPEC_USIGN (letype) | SPEC_USIGN (retype)); + + /* assign the asmops */ + aopOp (left, ic, FALSE, FALSE); + aopOp (right, ic, FALSE, FALSE); + aopOp (result, ic, TRUE, FALSE); + + setupToPreserveCarry (ic); + + genCmp (left, right, result, ifx, sign); + + _G.preserveCarry = FALSE; + freeAsmop (left, NULL, ic); + freeAsmop (right, NULL, ic); + freeAsmop (result, NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* gencjneshort - compare and jump if not equal */ +/* returns pair that still needs to be popped */ +/*-----------------------------------------------------------------*/ +static PAIR_ID +gencjneshort (operand * left, operand * right, symbol * lbl) +{ + int size = max (AOP_SIZE (left), AOP_SIZE (right)); + int offset = 0; + unsigned long lit = 0L; + + /* Swap the left and right if it makes the computation easier */ + if (AOP_TYPE (left) == AOP_LIT) + { + operand *t = right; + right = left; + left = t; + } + + /* if the right side is a literal then anything goes */ + if (AOP_TYPE (right) == AOP_LIT) + { + lit = ulFromVal (AOP (right)->aopu.aop_lit); + if (lit == 0) + { + _moveA (aopGet (AOP (left), offset, FALSE)); + if (size > 1) + { + while (--size) + { + emit2 ("or a,%s", aopGet (AOP (left), ++offset, FALSE)); + } + } + else + { + emit2 ("or a,a"); + } + emit2 ("jp NZ,!tlabel", lbl->key + 100); + } + else + { + while (size--) + { + _moveA (aopGet (AOP (left), offset, FALSE)); + if ((unsigned int) ((lit >> (offset * 8)) & 0x0FFL) == 0) + emit2 ("or a,a"); + else + emit2 ("sub a,%s", aopGet (AOP (right), offset, FALSE)); + emit2 ("jp NZ,!tlabel", lbl->key + 100); + offset++; + } + } + } + /* if the right side is in a register or + pointed to by HL, IX or IY */ + else if (AOP_TYPE (right) == AOP_REG || + AOP_TYPE (right) == AOP_HL || + AOP_TYPE (right) == AOP_IY || + AOP_TYPE (right) == AOP_STK || + AOP_IS_PAIRPTR (right, PAIR_HL) || + AOP_IS_PAIRPTR (right, PAIR_IX) || + AOP_IS_PAIRPTR (right, PAIR_IY)) + { + while (size--) + { + _moveA (aopGet (AOP (left), offset, FALSE)); + if (AOP_TYPE (right) == AOP_LIT && + ((unsigned int) ((lit >> (offset * 8)) & 0x0FFL) == 0)) + { + emit2 ("or a,a"); + emit2 ("jp NZ,!tlabel", lbl->key + 100); + } + else + { + emit2 ("sub %s", aopGet (AOP (right), offset, FALSE)); + emit2 ("jp NZ,!tlabel", lbl->key + 100); + } + offset++; + } + } + /* right is in direct space or a pointer reg, need both a & b */ + else + { + PAIR_ID pair; + for (pair = PAIR_BC; pair <= PAIR_HL; pair++) + { + if (((AOP_TYPE (left) != AOP_PAIRPTR) || (AOP (left)->aopu.aop_pairId != pair)) && + ((AOP_TYPE (right) != AOP_PAIRPTR) || (AOP (right)->aopu.aop_pairId != pair))) + { + break; + } + } + _push (pair); + while (size--) + { + emit2 ("; direct compare"); + _emitMove (_pairs[pair].l, aopGet (AOP (left), offset, FALSE)); + _moveA (aopGet (AOP (right), offset, FALSE)); + emit2 ("sub %s", _pairs[pair].l); + emit2 ("!shortjp NZ,!tlabel", lbl->key + 100); + offset++; + } + return pair; + } + return PAIR_INVALID; +} + +/*-----------------------------------------------------------------*/ +/* gencjne - compare and jump if not equal */ +/*-----------------------------------------------------------------*/ +static void +gencjne (operand * left, operand * right, symbol * lbl) +{ + symbol *tlbl = newiTempLabel (NULL); + + PAIR_ID pop = gencjneshort (left, right, lbl); + + /* PENDING: ?? */ + emit2 ("ld a,!one"); + emit2 ("!shortjp !tlabel", tlbl->key + 100); + emitLabel (lbl->key + 100); + emit2 ("xor a,a"); + emitLabel (tlbl->key + 100); + _pop (pop); +} + +/*-----------------------------------------------------------------*/ +/* genCmpEq - generates code for equal to */ +/*-----------------------------------------------------------------*/ +static void +genCmpEq (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + + aopOp ((left = IC_LEFT (ic)), ic, FALSE, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, TRUE, FALSE); + + emitDebug ("; genCmpEq: left %u, right %u, result %u", AOP_SIZE(IC_LEFT(ic)), AOP_SIZE(IC_RIGHT(ic)), AOP_SIZE(IC_RESULT(ic))); + + /* Swap operands if it makes the operation easier. ie if: + 1. Left is a literal. + */ + if (AOP_TYPE (IC_LEFT (ic)) == AOP_LIT) + { + operand *t = IC_RIGHT (ic); + IC_RIGHT (ic) = IC_LEFT (ic); + IC_LEFT (ic) = t; + } + + if (ifx && !AOP_SIZE (result)) + { + symbol *tlbl; + /* if they are both bit variables */ + if (AOP_TYPE (left) == AOP_CRY && + ((AOP_TYPE (right) == AOP_CRY) || (AOP_TYPE (right) == AOP_LIT))) + { + wassertl (0, "Tried to compare two bits"); + } + else + { + PAIR_ID pop; + tlbl = newiTempLabel (NULL); + pop = gencjneshort (left, right, tlbl); + if (IC_TRUE (ifx)) + { + _pop (pop); + emit2 ("jp !tlabel", IC_TRUE (ifx)->key + 100); + emitLabel (tlbl->key + 100); + _pop (pop); + } + else + { + /* PENDING: do this better */ + symbol *lbl = newiTempLabel (NULL); + _pop (pop); + emit2 ("!shortjp !tlabel", lbl->key + 100); + emitLabel (tlbl->key + 100); + _pop (pop); + emit2 ("jp !tlabel", IC_FALSE (ifx)->key + 100); + emitLabel (lbl->key + 100); + } + } + /* mark the icode as generated */ + ifx->generated = 1; + goto release; + } + + /* if they are both bit variables */ + if (AOP_TYPE (left) == AOP_CRY && + ((AOP_TYPE (right) == AOP_CRY) || (AOP_TYPE (right) == AOP_LIT))) + { + wassertl (0, "Tried to compare a bit to either a literal or another bit"); + } + else + { + emitDebug(";4"); + + gencjne (left, right, newiTempLabel (NULL)); + if (AOP_TYPE (result) == AOP_CRY && AOP_SIZE (result)) + { + wassert (0); + } + if (ifx) + { + emitDebug(";5"); + genIfxJump (ifx, "a"); + goto release; + } + /* if the result is used in an arithmetic operation + then put the result in place */ + if (AOP_TYPE (result) != AOP_CRY) + { + emitDebug(";6"); + outAcc (result); + } + /* leave the result in acc */ + } + +release: + freeAsmop (left, NULL, ic); + freeAsmop (right, NULL, ic); + freeAsmop (result, NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* ifxForOp - returns the icode containing the ifx for operand */ +/*-----------------------------------------------------------------*/ +static iCode * +ifxForOp (operand * op, iCode * ic) +{ + /* if true symbol then needs to be assigned */ + if (IS_TRUE_SYMOP (op)) + return NULL; + + /* if this has register type condition and + the next instruction is ifx with the same operand + and live to of the operand is upto the ifx only then */ + if (ic->next && + ic->next->op == IFX && + IC_COND (ic->next)->key == op->key && + OP_SYMBOL (op)->liveTo <= ic->next->seq) + return ic->next; + + return NULL; +} + +/*-----------------------------------------------------------------*/ +/* genAndOp - for && operation */ +/*-----------------------------------------------------------------*/ +static void +genAndOp (iCode * ic) +{ + operand *left, *right, *result; + symbol *tlbl; + + /* note here that && operations that are in an if statement are + taken away by backPatchLabels only those used in arthmetic + operations remain */ + aopOp ((left = IC_LEFT (ic)), ic, FALSE, TRUE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE, TRUE); + aopOp ((result = IC_RESULT (ic)), ic, FALSE, FALSE); + + /* if both are bit variables */ + if (AOP_TYPE (left) == AOP_CRY && + AOP_TYPE (right) == AOP_CRY) + { + wassertl (0, "Tried to and two bits"); + } + else + { + tlbl = newiTempLabel (NULL); + _toBoolean (left); + emit2 ("!shortjp Z,!tlabel", tlbl->key + 100); + _toBoolean (right); + emitLabel (tlbl->key + 100); + outBitAcc (result); + } + + freeAsmop (left, NULL, ic); + freeAsmop (right, NULL, ic); + freeAsmop (result, NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genOrOp - for || operation */ +/*-----------------------------------------------------------------*/ +static void +genOrOp (iCode * ic) +{ + operand *left, *right, *result; + symbol *tlbl; + + /* note here that || operations that are in an + if statement are taken away by backPatchLabels + only those used in arthmetic operations remain */ + aopOp ((left = IC_LEFT (ic)), ic, FALSE, TRUE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE, TRUE); + aopOp ((result = IC_RESULT (ic)), ic, FALSE, FALSE); + + /* if both are bit variables */ + if (AOP_TYPE (left) == AOP_CRY && + AOP_TYPE (right) == AOP_CRY) + { + wassertl (0, "Tried to OR two bits"); + } + else + { + tlbl = newiTempLabel (NULL); + _toBoolean (left); + emit2 ("!shortjp NZ,!tlabel", tlbl->key + 100); + _toBoolean (right); + emitLabel (tlbl->key + 100); + outBitAcc (result); + } + + freeAsmop (left, NULL, ic); + freeAsmop (right, NULL, ic); + freeAsmop (result, NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* isLiteralBit - test if lit == 2^n */ +/*-----------------------------------------------------------------*/ +int +isLiteralBit (unsigned long lit) +{ + unsigned long pw[32] = + {1L, 2L, 4L, 8L, 16L, 32L, 64L, 128L, + 0x100L, 0x200L, 0x400L, 0x800L, + 0x1000L, 0x2000L, 0x4000L, 0x8000L, + 0x10000L, 0x20000L, 0x40000L, 0x80000L, + 0x100000L, 0x200000L, 0x400000L, 0x800000L, + 0x1000000L, 0x2000000L, 0x4000000L, 0x8000000L, + 0x10000000L, 0x20000000L, 0x40000000L, 0x80000000L}; + int idx; + + for (idx = 0; idx < 32; idx++) + if (lit == pw[idx]) + return idx + 1; + return 0; +} + +/*-----------------------------------------------------------------*/ +/* jmpTrueOrFalse - */ +/*-----------------------------------------------------------------*/ +static void +jmpTrueOrFalse (iCode * ic, symbol * tlbl) +{ + // ugly but optimized by peephole + if (IC_TRUE (ic)) + { + symbol *nlbl = newiTempLabel (NULL); + emit2 ("jp !tlabel", nlbl->key + 100); + emitLabel (tlbl->key + 100); + emit2 ("jp !tlabel", IC_TRUE (ic)->key + 100); + emitLabel (nlbl->key + 100); + } + else + { + emit2 ("jp !tlabel", IC_FALSE (ic)->key + 100); + emitLabel (tlbl->key + 100); + } + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genAnd - code for and */ +/*-----------------------------------------------------------------*/ +static void +genAnd (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + int size, offset = 0; + unsigned long lit = 0L; + int bytelit = 0; + + aopOp ((left = IC_LEFT (ic)), ic, FALSE, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, TRUE, FALSE); + + /* if left is a literal & right is not then exchange them */ + if ((AOP_TYPE (left) == AOP_LIT && AOP_TYPE (right) != AOP_LIT) || + (AOP_NEEDSACC (right) && !AOP_NEEDSACC (left))) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if result = right then exchange them */ + if (sameRegs (AOP (result), AOP (right))) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if right is bit then exchange them */ + if (AOP_TYPE (right) == AOP_CRY && + AOP_TYPE (left) != AOP_CRY) + { + operand *tmp = right; + right = left; + left = tmp; + } + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + size = AOP_SIZE (result); + + if (AOP_TYPE (left) == AOP_CRY) + { + wassertl (0, "Tried to perform an AND with a bit as an operand"); + goto release; + } + + // if(val & 0xZZ) - size = 0, ifx != FALSE - + // bit = val & 0xZZ - size = 1, ifx = FALSE - + if ((AOP_TYPE (right) == AOP_LIT) && + (AOP_TYPE (result) == AOP_CRY) && + (AOP_TYPE (left) != AOP_CRY)) + { + symbol *tlbl = newiTempLabel (NULL); + int sizel = AOP_SIZE (left); + if (size) + { + /* PENDING: Test case for this. */ + emit2 ("scf"); + } + while (sizel--) + { + if ((bytelit = ((lit >> (offset * 8)) & 0x0FFL)) != 0x0L) + { + _moveA (aopGet (AOP (left), offset, FALSE)); + if (bytelit != 0x0FFL) + { + emit2 ("and a,%s", aopGet (AOP (right), offset, FALSE)); + } + else + { + /* For the flags */ + emit2 ("or a,a"); + } + if (size || ifx) /* emit jmp only, if it is actually used */ + emit2 ("!shortjp NZ,!tlabel", tlbl->key + 100); + } + offset++; + } + // bit = left & literal + if (size) + { + emit2 ("clr c"); + emit2 ("!tlabeldef", tlbl->key + 100); + _G.lines.current->isLabel = 1; + } + // if(left & literal) + else + { + if (ifx) + { + jmpTrueOrFalse (ifx, tlbl); + } + goto release; + } + outBitC (result); + goto release; + } + + /* if left is same as result */ + if (sameRegs (AOP (result), AOP (left))) + { + for (; size--; offset++) + { + if (AOP_TYPE (right) == AOP_LIT) + { + if ((bytelit = (int) ((lit >> (offset * 8)) & 0x0FFL)) == 0x0FF) + continue; + else + { + if (bytelit == 0) + aopPut (AOP (result), "!zero", offset); + else + { + _moveA (aopGet (AOP (left), offset, FALSE)); + emit2 ("and a,%s", + aopGet (AOP (right), offset, FALSE)); + aopPut (AOP (left), "a", offset); + } + } + + } + else + { + if (AOP_TYPE (left) == AOP_ACC) + { + wassertl (0, "Tried to perform an AND where the left operand is allocated into A"); + } + else + { + _moveA (aopGet (AOP (left), offset, FALSE)); + emit2 ("and a,%s", + aopGet (AOP (right), offset, FALSE)); + aopPut (AOP (left), "a", offset); + } + } + } + } + else + { + // left & result in different registers + if (AOP_TYPE (result) == AOP_CRY) + { + wassertl (0, "Tried to AND where the result is in carry"); + } + else + { + for (; (size--); offset++) + { + // normal case + // result = left & right + if (AOP_TYPE (right) == AOP_LIT) + { + if ((bytelit = (int) ((lit >> (offset * 8)) & 0x0FFL)) == 0x0FF) + { + aopPut (AOP (result), + aopGet (AOP (left), offset, FALSE), + offset); + continue; + } + else if (bytelit == 0) + { + aopPut (AOP (result), "!zero", offset); + continue; + } + } + // faster than result <- left, anl result,right + // and better if result is SFR + if (AOP_TYPE (left) == AOP_ACC) + emit2 ("and a,%s", aopGet (AOP (right), offset, FALSE)); + else + { + _moveA (aopGet (AOP (left), offset, FALSE)); + emit2 ("and a,%s", + aopGet (AOP (right), offset, FALSE)); + } + aopPut (AOP (result), "a", offset); + } + } + + } + +release: + freeAsmop (left, NULL, ic); + freeAsmop (right, NULL, ic); + freeAsmop (result, NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genOr - code for or */ +/*-----------------------------------------------------------------*/ +static void +genOr (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + int size, offset = 0; + unsigned long lit = 0L; + int bytelit = 0; + + aopOp ((left = IC_LEFT (ic)), ic, FALSE, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, TRUE, FALSE); + + /* if left is a literal & right is not then exchange them */ + if ((AOP_TYPE (left) == AOP_LIT && AOP_TYPE (right) != AOP_LIT) || + (AOP_NEEDSACC (right) && !AOP_NEEDSACC (left))) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if result = right then exchange them */ + if (sameRegs (AOP (result), AOP (right))) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if right is bit then exchange them */ + if (AOP_TYPE (right) == AOP_CRY && + AOP_TYPE (left) != AOP_CRY) + { + operand *tmp = right; + right = left; + left = tmp; + } + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + size = AOP_SIZE (result); + + if (AOP_TYPE (left) == AOP_CRY) + { + wassertl (0, "Tried to OR where left is a bit"); + goto release; + } + + // if(val | 0xZZ) - size = 0, ifx != FALSE - + // bit = val | 0xZZ - size = 1, ifx = FALSE - + if ((AOP_TYPE (right) == AOP_LIT) && + (AOP_TYPE (result) == AOP_CRY) && + (AOP_TYPE (left) != AOP_CRY)) + { + symbol *tlbl = newiTempLabel (NULL); + int sizel = AOP_SIZE (left); + + if (size) + { + wassertl (0, "Result is assigned to a bit"); + } + /* PENDING: Modeled after the AND code which is inefficient. */ + while (sizel--) + { + bytelit = (lit >> (offset * 8)) & 0x0FFL; + + _moveA (aopGet (AOP (left), offset, FALSE)); + + if (bytelit != 0) + { /* FIXME, allways true, shortcut possible */ + emit2 ("or a,%s", aopGet (AOP (right), offset, FALSE)); + } + else + { + /* For the flags */ + emit2 ("or a,a"); + } + + if (ifx) /* emit jmp only, if it is actually used */ + emit2 ("!shortjp NZ,!tlabel", tlbl->key + 100); + + offset++; + } + if (ifx) + { + jmpTrueOrFalse (ifx, tlbl); + } + goto release; + } + + /* if left is same as result */ + if (sameRegs (AOP (result), AOP (left))) + { + for (; size--; offset++) + { + if (AOP_TYPE (right) == AOP_LIT) + { + if (((lit >> (offset * 8)) & 0x0FFL) == 0x00L) + continue; + else + { + _moveA (aopGet (AOP (left), offset, FALSE)); + emit2 ("or a,%s", + aopGet (AOP (right), offset, FALSE)); + aopPut (AOP (result), "a", offset); + } + } + else + { + if (AOP_TYPE (left) == AOP_ACC) + emit2 ("or a,%s", aopGet (AOP (right), offset, FALSE)); + else + { + _moveA (aopGet (AOP (left), offset, FALSE)); + emit2 ("or a,%s", + aopGet (AOP (right), offset, FALSE)); + aopPut (AOP (result), "a", offset); + } + } + } + } + else + { + // left & result in different registers + if (AOP_TYPE (result) == AOP_CRY) + { + wassertl (0, "Result of OR is in a bit"); + } + else + for (; (size--); offset++) + { + // normal case + // result = left & right + if (AOP_TYPE (right) == AOP_LIT) + { + if (((lit >> (offset * 8)) & 0x0FFL) == 0x00L) + { + aopPut (AOP (result), + aopGet (AOP (left), offset, FALSE), + offset); + continue; + } + } + // faster than result <- left, anl result,right + // and better if result is SFR + if (AOP_TYPE (left) == AOP_ACC) + emit2 ("or a,%s", aopGet (AOP (right), offset, FALSE)); + else + { + _moveA (aopGet (AOP (left), offset, FALSE)); + emit2 ("or a,%s", + aopGet (AOP (right), offset, FALSE)); + } + aopPut (AOP (result), "a", offset); + /* PENDING: something weird is going on here. Add exception. */ + if (AOP_TYPE (result) == AOP_ACC) + break; + } + } + +release: + freeAsmop (left, NULL, ic); + freeAsmop (right, NULL, ic); + freeAsmop (result, NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genXor - code for xclusive or */ +/*-----------------------------------------------------------------*/ +static void +genXor (iCode * ic, iCode * ifx) +{ + operand *left, *right, *result; + int size, offset = 0; + unsigned long lit = 0L; + + aopOp ((left = IC_LEFT (ic)), ic, FALSE, FALSE); + aopOp ((right = IC_RIGHT (ic)), ic, FALSE, FALSE); + aopOp ((result = IC_RESULT (ic)), ic, TRUE, FALSE); + + /* if left is a literal & right is not then exchange them */ + if ((AOP_TYPE (left) == AOP_LIT && AOP_TYPE (right) != AOP_LIT) || + (AOP_NEEDSACC (right) && !AOP_NEEDSACC (left))) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if result = right then exchange them */ + if (sameRegs (AOP (result), AOP (right))) + { + operand *tmp = right; + right = left; + left = tmp; + } + + /* if right is bit then exchange them */ + if (AOP_TYPE (right) == AOP_CRY && + AOP_TYPE (left) != AOP_CRY) + { + operand *tmp = right; + right = left; + left = tmp; + } + if (AOP_TYPE (right) == AOP_LIT) + lit = ulFromVal (AOP (right)->aopu.aop_lit); + + size = AOP_SIZE (result); + + if (AOP_TYPE (left) == AOP_CRY) + { + wassertl (0, "Tried to XOR a bit"); + goto release; + } + + // if(val & 0xZZ) - size = 0, ifx != FALSE - + // bit = val & 0xZZ - size = 1, ifx = FALSE - + if ((AOP_TYPE (right) == AOP_LIT) && + (AOP_TYPE (result) == AOP_CRY) && + (AOP_TYPE (left) != AOP_CRY)) + { + symbol *tlbl = newiTempLabel (NULL); + int sizel = AOP_SIZE (left); + + if (size) + { + /* PENDING: Test case for this. */ + wassertl (0, "Tried to XOR left against a literal with the result going into a bit"); + } + while (sizel--) + { + _moveA (aopGet (AOP (left), offset, FALSE)); + emit2 ("xor a,%s", aopGet (AOP (right), offset, FALSE)); + emit2 ("!shortjp NZ,!tlabel", tlbl->key + 100); + offset++; + } + if (ifx) + { + jmpTrueOrFalse (ifx, tlbl); + } + else + { + wassertl (0, "Result of XOR was destined for a bit"); + } + goto release; + } + + /* if left is same as result */ + if (sameRegs (AOP (result), AOP (left))) + { + for (; size--; offset++) + { + if (AOP_TYPE (right) == AOP_LIT) + { + if (((lit >> (offset * 8)) & 0x0FFL) == 0x00L) + continue; + else + { + _moveA (aopGet (AOP (left), offset, FALSE)); + emit2 ("xor a,%s", + aopGet (AOP (right), offset, FALSE)); + aopPut (AOP (result), "a", offset); + } + } + else + { + if (AOP_TYPE (left) == AOP_ACC) + { + emit2 ("xor a,%s", aopGet (AOP (right), offset, FALSE)); + } + else + { + _moveA (aopGet (AOP (left), offset, FALSE)); + emit2 ("xor a,%s", + aopGet (AOP (right), offset, FALSE)); + aopPut (AOP (result), "a", offset); + } + } + } + } + else + { + // left & result in different registers + if (AOP_TYPE (result) == AOP_CRY) + { + wassertl (0, "Result of XOR is in a bit"); + } + else + for (; (size--); offset++) + { + // normal case + // result = left & right + if (AOP_TYPE (right) == AOP_LIT) + { + if (((lit >> (offset * 8)) & 0x0FFL) == 0x00L) + { + aopPut (AOP (result), + aopGet (AOP (left), offset, FALSE), + offset); + continue; + } + } + // faster than result <- left, anl result,right + // and better if result is SFR + if (AOP_TYPE (left) == AOP_ACC) + { + emit2 ("xor a,%s", aopGet (AOP (right), offset, FALSE)); + } + else + { + _moveA (aopGet (AOP (left), offset, FALSE)); + emit2 ("xor a,%s", + aopGet (AOP (right), offset, FALSE)); + } + aopPut (AOP (result), "a", offset); + } + } + +release: + freeAsmop (left, NULL, ic); + freeAsmop (right, NULL, ic); + freeAsmop (result, NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genInline - write the inline code out */ +/*-----------------------------------------------------------------*/ +static void +genInline (iCode * ic) +{ + char *buffer, *bp, *bp1; + bool inComment = FALSE; + + _G.lines.isInline += (!options.asmpeep); + + buffer = bp = bp1 = Safe_strdup (IC_INLINE (ic)); + + /* emit each line as a code */ + while (*bp) + { + switch (*bp) + { + case ';': + inComment = TRUE; + ++bp; + break; + + case '\n': + inComment = FALSE; + *bp++ = '\0'; + emit2 (bp1); + bp1 = bp; + break; + + default: + /* Add \n for labels, not dirs such as c:\mydir */ + if (!inComment && (*bp == ':') && (isspace((unsigned char)bp[1]))) + { + ++bp; + *bp = '\0'; + ++bp; + emit2 (bp1); + bp1 = bp; + } + else + ++bp; + break; + } + } + if (bp1 != bp) + emit2 (bp1); + + Safe_free (buffer); + + _G.lines.isInline -= (!options.asmpeep); + +} + +/*-----------------------------------------------------------------*/ +/* genRRC - rotate right with carry */ +/*-----------------------------------------------------------------*/ +static void +genRRC (iCode * ic) +{ + wassert (0); +} + +/*-----------------------------------------------------------------*/ +/* genRLC - generate code for rotate left with carry */ +/*-----------------------------------------------------------------*/ +static void +genRLC (iCode * ic) +{ + wassert (0); +} + +/*-----------------------------------------------------------------*/ +/* genGetHbit - generates code get highest order bit */ +/*-----------------------------------------------------------------*/ +static void +genGetHbit (iCode * ic) +{ + operand *left, *result; + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + aopOp (left, ic, FALSE, FALSE); + aopOp (result, ic, FALSE, FALSE); + + /* get the highest order byte into a */ + emit2("ld a,%s", aopGet (AOP (left), AOP_SIZE (left) - 1, FALSE)); + + if (AOP_TYPE (result) == AOP_CRY) + { + emit2 ("rl a"); + outBitC (result); + } + else + { + emit2 ("rlc a"); + emit2 ("and a,!one"); + outAcc (result); + } + + + freeAsmop (left, NULL, ic); + freeAsmop (result, NULL, ic); +} + +static void +emitRsh2 (asmop *aop, int size, int is_signed) +{ + int offset = 0; + + while (size--) + { + const char *l = aopGet (aop, size, FALSE); + if (offset == 0) + { + emit2 ("%s %s", is_signed ? "sra" : "srl", l); + } + else + { + emit2 ("rr %s", l); + } + offset++; + } +} + +/*-----------------------------------------------------------------*/ +/* shiftR2Left2Result - shift right two bytes from left to result */ +/*-----------------------------------------------------------------*/ +static void +shiftR2Left2Result (operand * left, int offl, + operand * result, int offr, + int shCount, int is_signed) +{ + int size = 2; + symbol *tlbl; + + movLeft2Result (left, offl, result, offr, 0); + movLeft2Result (left, offl + 1, result, offr + 1, 0); + + if (shCount == 0) + return; + + /* if (AOP(result)->type == AOP_REG) { */ + + tlbl = newiTempLabel (NULL); + + /* Left is already in result - so now do the shift */ + /* Optimizing for speed by default. */ + if (!optimize.codeSize || shCount <= 2) + { + while (shCount--) + { + emitRsh2 (AOP (result), size, is_signed); + } + } + else + { + emit2 ("ld a,!immedbyte", shCount); + + emitLabel (tlbl->key + 100); + + emitRsh2 (AOP (result), size, is_signed); + + emit2 ("dec a"); + emit2 ("!shortjp NZ,!tlabel", tlbl->key + 100); + } +} + +/*-----------------------------------------------------------------*/ +/* shiftL2Left2Result - shift left two bytes from left to result */ +/*-----------------------------------------------------------------*/ +static void +shiftL2Left2Result (operand * left, int offl, + operand * result, int offr, int shCount) +{ + if (sameRegs (AOP (result), AOP (left)) && + ((offl + MSB16) == offr)) + { + wassert (0); + } + else + { + /* Copy left into result */ + movLeft2Result (left, offl, result, offr, 0); + movLeft2Result (left, offl + 1, result, offr + 1, 0); + } + + if (shCount == 0) + return; + + if (getPairId (AOP (result)) == PAIR_HL) + { + while (shCount--) + { + emit2 ("add hl,hl"); + } + } + else + { + int size = 2; + int offset = 0; + symbol *tlbl, *tlbl1; + const char *l; + + tlbl = newiTempLabel (NULL); + tlbl1 = newiTempLabel (NULL); + + if (AOP (result)->type == AOP_REG) + { + while (shCount--) + { + for (offset = 0; offset < size; offset++) + { + l = aopGet (AOP (result), offset, FALSE); + + if (offset == 0) + { + emit2 ("sla %s", l); + } + else + { + emit2 ("rl %s", l); + } + } + } + } + else + { + /* Left is already in result - so now do the shift */ + if (shCount > 1) + { + emit2 ("ld a,!immedbyte+1", shCount); + emit2 ("!shortjp !tlabel", tlbl1->key + 100); + emitLabel (tlbl->key + 100); + } + + while (size--) + { + l = aopGet (AOP (result), offset, FALSE); + + if (offset == 0) + { + emit2 ("sla %s", l); + } + else + { + emit2 ("rl %s", l); + } + + offset++; + } + if (shCount > 1) + { + emitLabel (tlbl1->key + 100); + emit2 ("dec a"); + emit2 ("!shortjp NZ,!tlabel", tlbl->key + 100); + } + } + } +} + +/*-----------------------------------------------------------------*/ +/* AccRol - rotate left accumulator by known count */ +/*-----------------------------------------------------------------*/ +static void +AccRol (int shCount) +{ + shCount &= 0x0007; // shCount : 0..7 + +#if 0 + switch (shCount) + { + case 0: + break; + case 1: + emit2 ("sla a"); + break; + case 2: + emit2 ("sla a"); + emit2 ("rl a"); + break; + case 3: + emit2 ("sla a"); + emit2 ("rl a"); + emit2 ("rl a"); + break; + case 4: + emit2 ("sla a"); + emit2 ("rl a"); + emit2 ("rl a"); + emit2 ("rl a"); + break; + case 5: + emit2 ("srl a"); + emit2 ("rr a"); + emit2 ("rr a"); + break; + case 6: + emit2 ("srl a"); + emit2 ("rr a"); + break; + case 7: + emit2 ("srl a"); + break; + } +#else + switch (shCount) + { + case 0: + break; + case 1: + emit2 ("rlca"); + break; + case 2: + emit2 ("rlca"); + emit2 ("rlca"); + break; + case 3: + emit2 ("rlca"); + emit2 ("rlca"); + emit2 ("rlca"); + break; + case 4: + emit2 ("rlca"); + emit2 ("rlca"); + emit2 ("rlca"); + emit2 ("rlca"); + break; + case 5: + emit2 ("rrca"); + emit2 ("rrca"); + emit2 ("rrca"); + break; + case 6: + emit2 ("rrca"); + emit2 ("rrca"); + break; + case 7: + emit2 ("rrca"); + break; + } +#endif +} + +/*-----------------------------------------------------------------*/ +/* AccLsh - left shift accumulator by known count */ +/*-----------------------------------------------------------------*/ +static void +AccLsh (int shCount) +{ + static const unsigned char SLMask[] = + { + 0xFF, 0xFE, 0xFC, 0xF8, 0xF0, 0xE0, 0xC0, 0x80, 0x00 + }; + + if (shCount != 0) + { + if (shCount == 1) + { + emit2 ("add a,a"); + } + else if (shCount == 2) + { + emit2 ("add a,a"); + emit2 ("add a,a"); + } + else + { + /* rotate left accumulator */ + AccRol (shCount); + /* and kill the lower order bits */ + emit2 ("and a,!immedbyte", SLMask[shCount]); + } + } +} + +/*-----------------------------------------------------------------*/ +/* shiftL1Left2Result - shift left one byte from left to result */ +/*-----------------------------------------------------------------*/ +static void +shiftL1Left2Result (operand * left, int offl, + operand * result, int offr, int shCount) +{ + const char *l; + + /* If operand and result are the same we can shift in place. + However shifting in acc using add is cheaper than shifting + in place using sla; when shifting by more than 2 shifting in + acc is worth the additional effort for loading from/to acc. */ + if (sameRegs (AOP (left), AOP (result)) && shCount <= 2 && offr == offl) + { + while (shCount--) + emit2 ("sla %s", aopGet (AOP (result), 0, FALSE)); + } + else + { + l = aopGet (AOP (left), offl, FALSE); + _moveA (l); + /* shift left accumulator */ + AccLsh (shCount); + aopPut (AOP (result), "a", offr); + } +} + +/*-----------------------------------------------------------------*/ +/* genlshTwo - left shift two bytes by known amount */ +/*-----------------------------------------------------------------*/ +static void +genlshTwo (operand * result, operand * left, int shCount) +{ + int size = AOP_SIZE (result); + + wassert (size == 2); + + /* if shCount >= 8 */ + if (shCount >= 8) + { + shCount -= 8; + if (size > 1) + { + if (shCount) + { + movLeft2Result (left, LSB, result, MSB16, 0); + shiftL1Left2Result (left, LSB, result, MSB16, shCount); + aopPut (AOP (result), "!zero", LSB); + } + else + { + movLeft2Result (left, LSB, result, MSB16, 0); + aopPut (AOP (result), "!zero", 0); + } + } + else + { + aopPut (AOP (result), "!zero", LSB); + } + } + /* 0 <= shCount <= 7 */ + else + { + if (size == 1) + { + wassert (0); + } + else + { + shiftL2Left2Result (left, LSB, result, LSB, shCount); + } + } +} + +/*-----------------------------------------------------------------*/ +/* genlshOne - left shift a one byte quantity by known count */ +/*-----------------------------------------------------------------*/ +static void +genlshOne (operand * result, operand * left, int shCount) +{ + shiftL1Left2Result (left, LSB, result, LSB, shCount); +} + +/*-----------------------------------------------------------------*/ +/* genLeftShiftLiteral - left shifting by known count */ +/*-----------------------------------------------------------------*/ +static void +genLeftShiftLiteral (operand * left, + operand * right, + operand * result, + iCode * ic) +{ + int shCount = (int) ulFromVal (AOP (right)->aopu.aop_lit); + int size; + + freeAsmop (right, NULL, ic); + + aopOp (left, ic, FALSE, FALSE); + aopOp (result, ic, FALSE, FALSE); + + size = getSize (operandType (result)); + + /* I suppose that the left size >= result size */ + + if (shCount >= (size * 8)) + { + while (size--) + { + aopPut (AOP (result), "!zero", size); + } + } + else + { + switch (size) + { + case 1: + genlshOne (result, left, shCount); + break; + case 2: + genlshTwo (result, left, shCount); + break; + case 4: + wassertl (0, "Shifting of longs is currently unsupported"); + break; + default: + wassert (0); + } + } + freeAsmop (left, NULL, ic); + freeAsmop (result, NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genLeftShift - generates code for left shifting */ +/*-----------------------------------------------------------------*/ +static void +genLeftShift (iCode * ic) +{ + int size, offset; + const char *l; + symbol *tlbl, *tlbl1; + operand *left, *right, *result; + + right = IC_RIGHT (ic); + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + aopOp (right, ic, FALSE, FALSE); + + /* if the shift count is known then do it + as efficiently as possible */ + if (AOP_TYPE (right) == AOP_LIT) + { + genLeftShiftLiteral (left, right, result, ic); + return; + } + + /* shift count is unknown then we have to form a loop get the loop + count in B : Note: we take only the lower order byte since + shifting more that 32 bits make no sense anyway, ( the largest + size of an object can be only 32 bits ) */ + emit2 ("ld a,%s", aopGet (AOP (right), 0, FALSE)); + emit2 ("inc a"); + freeAsmop (right, NULL, ic); + aopOp (left, ic, FALSE, FALSE); + aopOp (result, ic, FALSE, FALSE); + + if (AOP_TYPE (left) != AOP_REG || AOP_TYPE (result) != AOP_REG) + _push (PAIR_AF); + + /* now move the left to the result if they are not the + same */ + + if (!sameRegs (AOP (left), AOP (result))) + { + + size = AOP_SIZE (result); + offset = 0; + while (size--) + { + l = aopGet (AOP (left), offset, FALSE); + aopPut (AOP (result), l, offset); + offset++; + } + } + + tlbl = newiTempLabel (NULL); + size = AOP_SIZE (result); + offset = 0; + tlbl1 = newiTempLabel (NULL); + + if (AOP_TYPE (left) != AOP_REG || AOP_TYPE (result) != AOP_REG) + _pop (PAIR_AF); + + emit2 ("!shortjp !tlabel", tlbl1->key + 100); + emitLabel (tlbl->key + 100); + l = aopGet (AOP (result), offset, FALSE); + + while (size--) + { + l = aopGet (AOP (result), offset, FALSE); + + if (offset == 0) + { + emit2 ("sla %s", l); + } + else + { + emit2 ("rl %s", l); + } + offset++; + } + emitLabel (tlbl1->key + 100); + emit2 ("dec a"); + emit2 ("!shortjp NZ,!tlabel", tlbl->key + 100); + + freeAsmop (left, NULL, ic); + freeAsmop (result, NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genrshOne - left shift two bytes by known amount != 0 */ +/*-----------------------------------------------------------------*/ +static void +genrshOne (operand * result, operand * left, int shCount, int is_signed) +{ + /* Errk */ + int size = AOP_SIZE (result); + const char *l; + + wassert (size == 1); + wassert (shCount < 8); + + l = aopGet (AOP (left), 0, FALSE); + + if (AOP (result)->type == AOP_REG) + { + aopPut (AOP (result), l, 0); + l = aopGet (AOP (result), 0, FALSE); + while (shCount--) + { + emit2 ("%s %s", is_signed ? "sra" : "srl", l); + } + } + else + { + _moveA (l); + while (shCount--) + { + emit2 ("%s a", is_signed ? "sra" : "srl"); + } + aopPut (AOP (result), "a", 0); + } +} + +/*-----------------------------------------------------------------*/ +/* AccRsh - right shift accumulator by known count */ +/*-----------------------------------------------------------------*/ +static void +AccRsh (int shCount) +{ + static const unsigned char SRMask[] = + { + 0xFF, 0x7F, 0x3F, 0x1F, 0x0F, 0x07, 0x03, 0x01, 0x00 + }; + + if (shCount != 0) + { + /* rotate right accumulator */ + AccRol (8 - shCount); + /* and kill the higher order bits */ + emit2 ("and a,!immedbyte", SRMask[shCount]); + } +} + +/*-----------------------------------------------------------------*/ +/* shiftR1Left2Result - shift right one byte from left to result */ +/*-----------------------------------------------------------------*/ +static void +shiftR1Left2Result (operand * left, int offl, + operand * result, int offr, + int shCount, int sign) +{ + _moveA (aopGet (AOP (left), offl, FALSE)); + if (sign) + { + while (shCount--) + { + emit2 ("%s a", sign ? "sra" : "srl"); + } + } + else + { + AccRsh (shCount); + } + aopPut (AOP (result), "a", offr); +} + +/*-----------------------------------------------------------------*/ +/* genrshTwo - right shift two bytes by known amount */ +/*-----------------------------------------------------------------*/ +static void +genrshTwo (operand * result, operand * left, + int shCount, int sign) +{ + /* if shCount >= 8 */ + if (shCount >= 8) + { + shCount -= 8; + if (shCount) + { + shiftR1Left2Result (left, MSB16, result, LSB, + shCount, sign); + } + else + { + movLeft2Result (left, MSB16, result, LSB, sign); + } + if (sign) + { + /* Sign extend the result */ + _moveA(aopGet (AOP (result), 0, FALSE)); + emit2 ("rlc a"); + emit2 ("sbc a,a"); + + aopPut (AOP (result), ACC_NAME, MSB16); + } + else + { + aopPut (AOP (result), "!zero", 1); + } + } + /* 0 <= shCount <= 7 */ + else + { + shiftR2Left2Result (left, LSB, result, LSB, shCount, sign); + } +} + +/*-----------------------------------------------------------------*/ +/* genRightShiftLiteral - left shifting by known count */ +/*-----------------------------------------------------------------*/ +static void +genRightShiftLiteral (operand * left, + operand * right, + operand * result, + iCode * ic, + int sign) +{ + int shCount = (int) ulFromVal (AOP (right)->aopu.aop_lit); + int size; + + freeAsmop (right, NULL, ic); + + aopOp (left, ic, FALSE, FALSE); + aopOp (result, ic, FALSE, FALSE); + + size = getSize (operandType (result)); + + /* I suppose that the left size >= result size */ + + if (shCount >= (size * 8)) { + const char *s; + if (!SPEC_USIGN(getSpec(operandType(left)))) { + _moveA(aopGet (AOP (left), 0, FALSE)); + emit2 ("rlc a"); + emit2 ("sbc a,a"); + s=ACC_NAME; + } else { + s="!zero"; + } + while (size--) + aopPut (AOP (result), s, size); + } + else + { + switch (size) + { + case 1: + genrshOne (result, left, shCount, sign); + break; + case 2: + genrshTwo (result, left, shCount, sign); + break; + case 4: + wassertl (0, "Asked to shift right a long which should be a function call"); + break; + default: + wassertl (0, "Entered default case in right shift delegate"); + } + } + freeAsmop (left, NULL, ic); + freeAsmop (result, NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genRightShift - generate code for right shifting */ +/*-----------------------------------------------------------------*/ +static void +genRightShift (iCode * ic) +{ + operand *right, *left, *result; + sym_link *retype; + int size, offset, first = 1; + const char *l; + bool is_signed; + + symbol *tlbl, *tlbl1; + + /* if signed then we do it the hard way preserve the + sign bit moving it inwards */ + retype = getSpec (operandType (IC_RESULT (ic))); + + is_signed = !SPEC_USIGN (retype); + + /* signed & unsigned types are treated the same : i.e. the + signed is NOT propagated inwards : quoting from the + ANSI - standard : "for E1 >> E2, is equivalent to division + by 2**E2 if unsigned or if it has a non-negative value, + otherwise the result is implementation defined ", MY definition + is that the sign does not get propagated */ + + right = IC_RIGHT (ic); + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + aopOp (right, ic, FALSE, FALSE); + + /* if the shift count is known then do it + as efficiently as possible */ + if (AOP_TYPE (right) == AOP_LIT) + { + genRightShiftLiteral (left, right, result, ic, is_signed); + return; + } + + emit2 ("ld a,%s", aopGet (AOP (right), 0, FALSE)); + emit2 ("inc a"); + freeAsmop (right, NULL, ic); + + aopOp (left, ic, FALSE, FALSE); + aopOp (result, ic, FALSE, FALSE); + + if (AOP_TYPE (left) != AOP_REG || AOP_TYPE (result) != AOP_REG) + _push (PAIR_AF); + + /* now move the left to the result if they are not the + same */ + if (!sameRegs (AOP (left), AOP (result))) + { + + size = AOP_SIZE (result); + offset = 0; + while (size--) + { + l = aopGet (AOP (left), offset, FALSE); + aopPut (AOP (result), l, offset); + offset++; + } + } + + tlbl = newiTempLabel (NULL); + tlbl1 = newiTempLabel (NULL); + size = AOP_SIZE (result); + offset = size - 1; + + if (AOP_TYPE (left) != AOP_REG || AOP_TYPE (result) != AOP_REG) + _pop (PAIR_AF); + + emit2 ("!shortjp !tlabel", tlbl1->key + 100); + emitLabel (tlbl->key + 100); + while (size--) + { + l = aopGet (AOP (result), offset--, FALSE); + if (first) + { + emit2 ("%s %s", is_signed ? "sra" : "srl", l); + first = 0; + } + else + { + emit2 ("rr %s", l); + } + } + emitLabel (tlbl1->key + 100); + emit2 ("dec a"); + emit2 ("!shortjp NZ,!tlabel", tlbl->key + 100); + + freeAsmop (left, NULL, ic); + freeAsmop (result, NULL, ic); +} + + +/*-----------------------------------------------------------------*/ +/* genUnpackBits - generates code for unpacking bits */ +/*-----------------------------------------------------------------*/ +static void +genUnpackBits (operand * result, int pair) +{ + int offset = 0; /* result byte offset */ + int rsize; /* result size */ + int rlen = 0; /* remaining bitfield length */ + sym_link *etype; /* bitfield type information */ + int blen; /* bitfield length */ + int bstr; /* bitfield starting bit within byte */ + + emitDebug ("; genUnpackBits"); + + etype = getSpec (operandType (result)); + rsize = getSize (operandType (result)); + blen = SPEC_BLEN (etype); + bstr = SPEC_BSTR (etype); + + /* If the bitfield length is less than a byte */ + if (blen < 8) + { + emit2 ("ld a,!*pair", _pairs[pair].name); + AccRol (8 - bstr); + emit2 ("and a,!immedbyte", ((unsigned char) -1) >> (8 - blen)); + if (!SPEC_USIGN (etype)) + { + /* signed bitfield */ + symbol *tlbl = newiTempLabel (NULL); + + emit2 ("bit %d,a", blen - 1); + emit2 ("jp Z,!tlabel", tlbl->key + 100); + emit2 ("or a,!immedbyte", (unsigned char) (0xff << blen)); + emitLabel (tlbl->key + 100); + } + aopPut (AOP (result), "a", offset++); + goto finish; + } + + /* TODO: what if pair == PAIR_DE ? */ + if (getPairId (AOP (result)) == PAIR_HL) + { + wassertl (rsize == 2, "HL must be of size 2"); + emit2 ("ld a,!*hl"); + emit2 ("inc hl"); + emit2 ("ld h,!*hl"); + emit2 ("ld l,a"); + emit2 ("ld a,h"); + emit2 ("and a,!immedbyte", ((unsigned char) -1) >> (16 - blen)); + if (!SPEC_USIGN (etype)) + { + /* signed bitfield */ + symbol *tlbl = newiTempLabel (NULL); + + emit2 ("bit %d,a", blen - 1); + emit2 ("jp Z,!tlabel", tlbl->key + 100); + emit2 ("or a,!immedbyte", (unsigned char) (0xff << blen)); + emitLabel (tlbl->key + 100); + } + emit2 ("ld h,a"); + spillPair (PAIR_HL); + return; + } + + /* Bit field did not fit in a byte. Copy all + but the partial byte at the end. */ + for (rlen=blen;rlen>=8;rlen-=8) + { + emit2 ("ld a,!*pair", _pairs[pair].name); + aopPut (AOP (result), "a", offset++); + if (rlen>8) + { + emit2 ("inc %s", _pairs[pair].name); + _G.pairs[pair].offset++; + } + } + + /* Handle the partial byte at the end */ + if (rlen) + { + emit2 ("ld a,!*pair", _pairs[pair].name); + emit2 ("and a,!immedbyte", ((unsigned char) -1) >> (8 - rlen)); + if (!SPEC_USIGN (etype)) + { + /* signed bitfield */ + symbol *tlbl = newiTempLabel (NULL); + + emit2 ("bit %d,a", rlen - 1); + emit2 ("jp Z,!tlabel", tlbl->key + 100); + emit2 ("or a,!immedbyte", (unsigned char) (0xff << rlen)); + emitLabel (tlbl->key + 100); + } + aopPut (AOP (result), "a", offset++); + } + +finish: + if (offset < rsize) + { + char *source; + + if (SPEC_USIGN (etype)) + source = "!zero"; + else + { + /* signed bitfield: sign extension with 0x00 or 0xff */ + emit2 ("rla"); + emit2 ("sbc a,a"); + + source = "a"; + } + rsize -= offset; + while (rsize--) + aopPut (AOP (result), source, offset++); + } +} + +/*-----------------------------------------------------------------*/ +/* genGenPointerGet - get value from generic pointer space */ +/*-----------------------------------------------------------------*/ +static void +genGenPointerGet (operand * left, + operand * result, iCode * ic) +{ + int size, offset; + sym_link *retype = getSpec (operandType (result)); + int pair = PAIR_HL; + + if (IS_GB) + pair = PAIR_DE; + + aopOp (left, ic, FALSE, FALSE); + aopOp (result, ic, FALSE, FALSE); + + size = AOP_SIZE (result); + + if (isPair (AOP (left)) && size == 1 && !IS_BITVAR (retype)) + { + /* Just do it */ + if (isPtrPair (AOP (left))) + { + tsprintf (buffer, sizeof(buffer), + "!*pair", getPairName (AOP (left))); + aopPut (AOP (result), buffer, 0); + } + else + { + emit2 ("ld a,!*pair", getPairName (AOP (left))); + aopPut (AOP (result), "a", 0); + } + freeAsmop (left, NULL, ic); + goto release; + } + + if (getPairId (AOP (left)) == PAIR_IY && !IS_BITVAR (retype)) + { + /* Just do it */ + offset = 0; + while (size--) + { + char at[20]; + tsprintf (at, sizeof(at), "!*iyx", offset); + aopPut (AOP (result), at, offset); + offset++; + } + + freeAsmop (left, NULL, ic); + goto release; + } + + /* For now we always load into IY */ + /* if this is remateriazable */ + fetchPair (pair, AOP (left)); + + /* if bit then unpack */ + if (IS_BITVAR (retype)) + { + genUnpackBits (result, pair); + freeAsmop (left, NULL, ic); + goto release; + //wassert (0); + } + else if (getPairId (AOP (result)) == PAIR_HL) + { + wassertl (size == 2, "HL must be of size 2"); + emit2 ("ld a,!*hl"); + emit2 ("inc hl"); + emit2 ("ld h,!*hl"); + emit2 ("ld l,a"); + spillPair (PAIR_HL); + } + else if (getPairId (AOP (left)) == PAIR_HL && !isLastUse (ic, left)) + { + size = AOP_SIZE (result); + offset = 0; + + while (size--) + { + /* PENDING: make this better */ + if (!IS_GB && AOP_TYPE (result) == AOP_REG) + { + aopPut (AOP (result), "!*hl", offset++); + } + else + { + emit2 ("ld a,!*pair", _pairs[pair].name); + aopPut (AOP (result), "a", offset++); + } + if (size) + { + emit2 ("inc %s", _pairs[pair].name); + _G.pairs[pair].offset++; + } + } + /* Fixup HL back down */ + for (size = AOP_SIZE (result)-1; size; size--) + { + emit2 ("dec %s", _pairs[pair].name); + } + } + else + { + size = AOP_SIZE (result); + offset = 0; + + while (size--) + { + /* PENDING: make this better */ + if (!IS_GB && + (AOP_TYPE (result) == AOP_REG || AOP_TYPE (result) == AOP_HLREG)) + { + aopPut (AOP (result), "!*hl", offset++); + } + else + { + emit2 ("ld a,!*pair", _pairs[pair].name); + aopPut (AOP (result), "a", offset++); + } + if (size) + { + emit2 ("inc %s", _pairs[pair].name); + _G.pairs[pair].offset++; + } + } + } + + freeAsmop (left, NULL, ic); + +release: + freeAsmop (result, NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genPointerGet - generate code for pointer get */ +/*-----------------------------------------------------------------*/ +static void +genPointerGet (iCode * ic) +{ + operand *left, *result; + sym_link *type, *etype; + + left = IC_LEFT (ic); + result = IC_RESULT (ic); + + /* depending on the type of pointer we need to + move it to the correct pointer register */ + type = operandType (left); + etype = getSpec (type); + + genGenPointerGet (left, result, ic); +} + +bool +isRegOrLit (asmop * aop) +{ + if (aop->type == AOP_REG || aop->type == AOP_LIT || aop->type == AOP_IMMD || aop->type == AOP_HLREG) + return TRUE; + return FALSE; +} + + +/*-----------------------------------------------------------------*/ +/* genPackBits - generates code for packed bit storage */ +/*-----------------------------------------------------------------*/ +static void +genPackBits (sym_link * etype, + operand * right, + int pair, + iCode *ic) +{ + int offset = 0; /* source byte offset */ + int rlen = 0; /* remaining bitfield length */ + int blen; /* bitfield length */ + int bstr; /* bitfield starting bit within byte */ + int litval; /* source literal value (if AOP_LIT) */ + unsigned char mask; /* bitmask within current byte */ + int extraPair; /* a tempory register */ + bool needPopExtra=0; /* need to restore original value of temp reg */ + + emitDebug ("; genPackBits",""); + + blen = SPEC_BLEN (etype); + bstr = SPEC_BSTR (etype); + + /* If the bitfield length is less than a byte */ + if (blen < 8) + { + mask = ((unsigned char) (0xFF << (blen + bstr)) | + (unsigned char) (0xFF >> (8 - bstr))); + + if (AOP_TYPE (right) == AOP_LIT) + { + /* Case with a bitfield length <8 and literal source + */ + litval = (int) ulFromVal (AOP (right)->aopu.aop_lit); + litval <<= bstr; + litval &= (~mask) & 0xff; + emit2 ("ld a,!*pair", _pairs[pair].name); + if ((mask|litval)!=0xff) + emit2 ("and a,!immedbyte", mask); + if (litval) + emit2 ("or a,!immedbyte", litval); + emit2 ("ld !*pair,a", _pairs[pair].name); + return; + } + else + { + /* Case with a bitfield length <8 and arbitrary source + */ + _moveA (aopGet (AOP (right), 0, FALSE)); + /* shift and mask source value */ + AccLsh (bstr); + emit2 ("and a,!immedbyte", (~mask) & 0xff); + + extraPair = getFreePairId(ic); + if (extraPair == PAIR_INVALID) + { + extraPair = PAIR_BC; + if (getPairId (AOP (right)) != PAIR_BC + || !isLastUse (ic, right)) + { + _push (extraPair); + needPopExtra = 1; + } + } + emit2 ("ld %s,a", _pairs[extraPair].l); + emit2 ("ld a,!*pair", _pairs[pair].name); + + emit2 ("and a,!immedbyte", mask); + emit2 ("or a,%s", _pairs[extraPair].l); + emit2 ("ld !*pair,a", _pairs[pair].name); + if (needPopExtra) + _pop (extraPair); + return; + } + } + + /* Bit length is greater than 7 bits. In this case, copy */ + /* all except the partial byte at the end */ + for (rlen=blen;rlen>=8;rlen-=8) + { + emit2 ("ld a,%s", aopGet (AOP (right), offset++, FALSE) ); + emit2 ("ld !*pair,a", _pairs[pair].name); + if (rlen>8) + { + emit2 ("inc %s", _pairs[pair].name); + _G.pairs[pair].offset++; + } + } + + /* If there was a partial byte at the end */ + if (rlen) + { + mask = (((unsigned char) -1 << rlen) & 0xff); + + if (AOP_TYPE (right) == AOP_LIT) + { + /* Case with partial byte and literal source + */ + litval = (int) ulFromVal (AOP (right)->aopu.aop_lit); + litval >>= (blen-rlen); + litval &= (~mask) & 0xff; + emit2 ("ld a,!*pair", _pairs[pair].name); + if ((mask|litval)!=0xff) + emit2 ("and a,!immedbyte", mask); + if (litval) + emit2 ("or a,!immedbyte", litval); + } + else + { + /* Case with partial byte and arbitrary source + */ + _moveA (aopGet (AOP (right), offset++, FALSE)); + emit2 ("and a,!immedbyte", (~mask) & 0xff); + + extraPair = getFreePairId(ic); + if (extraPair == PAIR_INVALID) + { + extraPair = getPairId (AOP (right)); + if (!isLastUse (ic, right) || (extraPair == PAIR_INVALID)) + extraPair = PAIR_BC; + + if (getPairId (AOP (right)) != PAIR_BC + || !isLastUse (ic, right)) + { + _push (extraPair); + needPopExtra = 1; + } + } + emit2 ("ld %s,a", _pairs[extraPair].l); + emit2 ("ld a,!*pair", _pairs[pair].name); + + emit2 ("and a,!immedbyte", mask); + emit2 ("or a,%s", _pairs[extraPair].l); + if (needPopExtra) + _pop (extraPair); + + } + emit2 ("ld !*pair,a", _pairs[pair].name); + } +} + + +/*-----------------------------------------------------------------*/ +/* genGenPointerSet - stores the value into a pointer location */ +/*-----------------------------------------------------------------*/ +static void +genGenPointerSet (operand * right, + operand * result, iCode * ic) +{ + int size, offset; + sym_link *retype = getSpec (operandType (right)); + sym_link *letype = getSpec (operandType (result)); + PAIR_ID pairId = PAIR_HL; + bool isBitvar; + + aopOp (result, ic, FALSE, FALSE); + aopOp (right, ic, FALSE, FALSE); + + if (IS_GB) + pairId = PAIR_DE; + + size = AOP_SIZE (right); + + isBitvar = IS_BITVAR(retype) || IS_BITVAR(letype); + emitDebug("; isBitvar = %d", isBitvar); + + /* Handle the exceptions first */ + if (isPair (AOP (result)) && size == 1 && !isBitvar) + { + /* Just do it */ + const char *l = aopGet (AOP (right), 0, FALSE); + const char *pair = getPairName (AOP (result)); + if (canAssignToPtr (l) && isPtr (pair)) + { + emit2 ("ld !*pair,%s", pair, l); + } + else + { + _moveA (l); + emit2 ("ld !*pair,a", pair); + } + goto release; + } + + if ( getPairId( AOP (result)) == PAIR_IY && !isBitvar) + { + /* Just do it */ + const char *l = aopGet (AOP (right), 0, FALSE); + + offset = 0; + while (size--) + { + if (canAssignToPtr (l)) + { + emit2 ("ld !*iyx,%s", offset, aopGet( AOP(right), offset, FALSE)); + } + else + { + _moveA (aopGet (AOP (right), offset, FALSE)); + emit2 ("ld !*iyx,a", offset); + } + offset++; + } + goto release; + } + else if (getPairId (AOP (result)) == PAIR_HL && !isLastUse (ic, result) + && !isBitvar) + { + offset = 0; + + while (size--) + { + const char *l = aopGet (AOP (right), offset, FALSE); + if (isRegOrLit (AOP (right)) && !IS_GB) + { + emit2 ("ld !*pair,%s", _pairs[PAIR_HL].name, l); + } + else + { + _moveA (l); + emit2 ("ld !*pair,a", _pairs[PAIR_HL].name); + } + if (size) + { + emit2 ("inc %s", _pairs[PAIR_HL].name); + _G.pairs[PAIR_HL].offset++; + } + offset++; + } + + /* Fixup HL back down */ + for (size = AOP_SIZE (right)-1; size; size--) + { + emit2 ("dec %s", _pairs[PAIR_HL].name); + } + goto release; + } + + /* if the operand is already in dptr + then we do nothing else we move the value to dptr */ + if (AOP_TYPE (result) != AOP_STR) + { + fetchPair (pairId, AOP (result)); + } + /* so hl now contains the address */ + freeAsmop (result, NULL, ic); + + /* if bit then unpack */ + if (isBitvar) + { + genPackBits ((IS_BITVAR (retype) ? retype : letype), right, pairId, ic); + goto release; + //wassert (0); + } + else + { + offset = 0; + + while (size--) + { + const char *l = aopGet (AOP (right), offset, FALSE); + if (isRegOrLit (AOP (right)) && !IS_GB) + { + emit2 ("ld !*pair,%s", _pairs[pairId].name, l); + } + else + { + _moveA (l); + emit2 ("ld !*pair,a", _pairs[pairId].name); + } + if (size) + { + emit2 ("inc %s", _pairs[pairId].name); + _G.pairs[pairId].offset++; + } + offset++; + } + } +release: + freeAsmop (right, NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genPointerSet - stores the value into a pointer location */ +/*-----------------------------------------------------------------*/ +static void +genPointerSet (iCode * ic) +{ + operand *right, *result; + sym_link *type, *etype; + + right = IC_RIGHT (ic); + result = IC_RESULT (ic); + + /* depending on the type of pointer we need to + move it to the correct pointer register */ + type = operandType (result); + etype = getSpec (type); + + genGenPointerSet (right, result, ic); +} + +/*-----------------------------------------------------------------*/ +/* genIfx - generate code for Ifx statement */ +/*-----------------------------------------------------------------*/ +static void +genIfx (iCode * ic, iCode * popIc) +{ + operand *cond = IC_COND (ic); + int isbit = 0; + + aopOp (cond, ic, FALSE, TRUE); + + /* get the value into acc */ + if (AOP_TYPE (cond) != AOP_CRY) + _toBoolean (cond); + else + isbit = 1; + /* the result is now in the accumulator */ + freeAsmop (cond, NULL, ic); + + /* if there was something to be popped then do it */ + if (popIc) + genIpop (popIc); + + /* if the condition is a bit variable */ + if (isbit && IS_ITEMP (cond) && + SPIL_LOC (cond)) + genIfxJump (ic, SPIL_LOC (cond)->rname); + else if (isbit && !IS_ITEMP (cond)) + genIfxJump (ic, OP_SYMBOL (cond)->rname); + else + genIfxJump (ic, "a"); + + ic->generated = 1; +} + +/*-----------------------------------------------------------------*/ +/* genAddrOf - generates code for address of */ +/*-----------------------------------------------------------------*/ +static void +genAddrOf (iCode * ic) +{ + symbol *sym = OP_SYMBOL (IC_LEFT (ic)); + + aopOp (IC_RESULT (ic), ic, FALSE, FALSE); + + /* if the operand is on the stack then we + need to get the stack offset of this + variable */ + if (IS_GB) + { + if (sym->onStack) + { + spillPair (PAIR_HL); + if (sym->stack <= 0) + { + setupPairFromSP (PAIR_HL, sym->stack + _G.stack.pushed + _G.stack.offset); + } + else + { + setupPairFromSP (PAIR_HL, sym->stack + _G.stack.pushed + _G.stack.offset + _G.stack.param_offset); + } + commitPair (AOP (IC_RESULT (ic)), PAIR_HL); + } + else + { + emit2 ("ld de,!hashedstr", sym->rname); + commitPair (AOP (IC_RESULT (ic)), PAIR_DE); + } + } + else + { + spillPair (PAIR_HL); + if (sym->onStack) + { + /* if it has an offset then we need to compute it */ + if (sym->stack > 0) + emit2 ("ld hl,!immedword", sym->stack + _G.stack.pushed + _G.stack.offset + _G.stack.param_offset); + else + emit2 ("ld hl,!immedword", sym->stack + _G.stack.pushed + _G.stack.offset); + emit2 ("add hl,sp"); + } + else + { + emit2 ("ld hl,!hashedstr", sym->rname); + } + commitPair (AOP (IC_RESULT (ic)), PAIR_HL); + } + freeAsmop (IC_RESULT (ic), NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genAssign - generate code for assignment */ +/*-----------------------------------------------------------------*/ +static void +genAssign (iCode * ic) +{ + operand *result, *right; + int size, offset; + unsigned long lit = 0L; + + result = IC_RESULT (ic); + right = IC_RIGHT (ic); + + /* Dont bother assigning if they are the same */ + if (operandsEqu (IC_RESULT (ic), IC_RIGHT (ic))) + { + emitDebug ("; (operands are equal %u)", operandsEqu (IC_RESULT (ic), IC_RIGHT (ic))); + return; + } + + aopOp (right, ic, FALSE, FALSE); + aopOp (result, ic, TRUE, FALSE); + + /* if they are the same registers */ + if (sameRegs (AOP (right), AOP (result))) + { + emitDebug ("; (registers are the same)"); + goto release; + } + + /* if the result is a bit */ + if (AOP_TYPE (result) == AOP_CRY) + { + wassertl (0, "Tried to assign to a bit"); + } + + /* general case */ + size = AOP_SIZE (result); + offset = 0; + + if (AOP_TYPE (right) == AOP_LIT) + { + lit = ulFromVal (AOP (right)->aopu.aop_lit); + } + + if (isPair (AOP (result))) + { + fetchPairLong (getPairId (AOP (result)), AOP (right), ic, LSB); + } + else if ((size > 1) && + (AOP_TYPE (result) != AOP_REG) && + (AOP_TYPE (right) == AOP_LIT) && + !IS_FLOAT (operandType (right)) && + (lit < 256L)) + { + bool fXored = FALSE; + offset = 0; + /* Work from the top down. + Done this way so that we can use the cached copy of 0 + in A for a fast clear */ + while (size--) + { + if ((unsigned int) ((lit >> (offset * 8)) & 0x0FFL) == 0) + { + if (!fXored && size > 1) + { + emit2 ("xor a,a"); + fXored = TRUE; + } + if (fXored) + { + aopPut (AOP (result), "a", offset); + } + else + { + aopPut (AOP (result), "!zero", offset); + } + } + else + aopPut (AOP (result), + aopGet (AOP (right), offset, FALSE), + offset); + offset++; + } + } + else if (size == 2 && AOP_TYPE (right) == AOP_IY) + { + emit2 ("ld hl,(%s)", AOP (right)->aopu.aop_dir); + aopPut (AOP (result), "l", LSB); + aopPut (AOP (result), "h", MSB16); + } + else if (size == 2 && requiresHL (AOP (right)) && requiresHL (AOP (result)) && IS_GB) + { + /* Special case. Load into a and d, then load out. */ + _moveA (aopGet (AOP (right), 0, FALSE)); + emit2 ("ld e,%s", aopGet (AOP (right), 1, FALSE)); + aopPut (AOP (result), "a", 0); + aopPut (AOP (result), "e", 1); + } + else if (size == 4 && requiresHL (AOP (right)) && requiresHL (AOP (result)) && IS_GB) + { + /* Special case - simple memcpy */ + aopGet (AOP (right), LSB, FALSE); + emit2 ("ld d,h"); + emit2 ("ld e,l"); + aopGet (AOP (result), LSB, FALSE); + + while (size--) + { + emit2 ("ld a,(de)"); + /* Peephole will optimise this. */ + emit2 ("ld (hl),a"); + + if (size != 0) + { + emit2 ("inc hl"); + emit2 ("inc de"); + } + } + spillPair (PAIR_HL); + } + else + { + while (size--) + { + /* PENDING: do this check better */ + if (IS_GB && requiresHL (AOP (right)) && requiresHL (AOP (result))) + { + _moveA (aopGet (AOP (right), offset, FALSE)); + aopPut (AOP (result), "a", offset); + } + else + aopPut (AOP (result), + aopGet (AOP (right), offset, FALSE), + offset); + offset++; + } + } + +release: + freeAsmop (right, NULL, ic); + freeAsmop (result, NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genJumpTab - genrates code for jump table */ +/*-----------------------------------------------------------------*/ +static void +genJumpTab (iCode * ic) +{ + symbol *jtab; + const char *l; + + aopOp (IC_JTCOND (ic), ic, FALSE, FALSE); + /* get the condition into accumulator */ + l = aopGet (AOP (IC_JTCOND (ic)), 0, FALSE); + if (!IS_GB) + emit2 ("push de"); + emit2 ("ld e,%s", l); + emit2 ("ld d,!zero"); + jtab = newiTempLabel (NULL); + spillPair (PAIR_HL); + emit2 ("ld hl,!immed!tlabel", jtab->key + 100); + emit2 ("add hl,de"); + emit2 ("add hl,de"); + emit2 ("add hl,de"); + freeAsmop (IC_JTCOND (ic), NULL, ic); + if (!IS_GB) + emit2 ("pop de"); + emit2 ("jp !*hl"); + emitLabel (jtab->key + 100); + /* now generate the jump labels */ + for (jtab = setFirstItem (IC_JTLABELS (ic)); jtab; + jtab = setNextItem (IC_JTLABELS (ic))) + emit2 ("jp !tlabel", jtab->key + 100); +} + +/*-----------------------------------------------------------------*/ +/* genCast - gen code for casting */ +/*-----------------------------------------------------------------*/ +static void +genCast (iCode * ic) +{ + operand *result = IC_RESULT (ic); + sym_link *rtype = operandType (IC_RIGHT (ic)); + operand *right = IC_RIGHT (ic); + int size, offset; + + /* if they are equivalent then do nothing */ + if (operandsEqu (IC_RESULT (ic), IC_RIGHT (ic))) + return; + + aopOp (right, ic, FALSE, FALSE); + aopOp (result, ic, FALSE, FALSE); + + /* if the result is a bit */ + if (AOP_TYPE (result) == AOP_CRY) + { + wassertl (0, "Tried to cast to a bit"); + } + + /* if they are the same size : or less */ + if (AOP_SIZE (result) <= AOP_SIZE (right)) + { + + /* if they are in the same place */ + if (sameRegs (AOP (right), AOP (result))) + goto release; + + /* if they in different places then copy */ + size = AOP_SIZE (result); + offset = 0; + while (size--) + { + aopPut (AOP (result), + aopGet (AOP (right), offset, FALSE), + offset); + offset++; + } + goto release; + } + + /* So we now know that the size of destination is greater + than the size of the source */ + /* we move to result for the size of source */ + size = AOP_SIZE (right); + offset = 0; + while (size--) + { + aopPut (AOP (result), + aopGet (AOP (right), offset, FALSE), + offset); + offset++; + } + + /* now depending on the sign of the destination */ + size = AOP_SIZE (result) - AOP_SIZE (right); + /* Unsigned or not an integral type - right fill with zeros */ + if (!IS_SPEC (rtype) || SPEC_USIGN (rtype) || AOP_TYPE(right)==AOP_CRY) + { + while (size--) + aopPut (AOP (result), "!zero", offset++); + } + else + { + /* we need to extend the sign :{ */ + const char *l = aopGet (AOP (right), AOP_SIZE (right) - 1, FALSE); + _moveA (l); + emit2 ("rla "); + emit2 ("sbc a,a"); + while (size--) + aopPut (AOP (result), "a", offset++); + } + +release: + freeAsmop (right, NULL, ic); + freeAsmop (result, NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genReceive - generate code for a receive iCode */ +/*-----------------------------------------------------------------*/ +static void +genReceive (iCode * ic) +{ + if (isOperandInFarSpace (IC_RESULT (ic)) && + (OP_SYMBOL (IC_RESULT (ic))->isspilt || + IS_TRUE_SYMOP (IC_RESULT (ic)))) + { + wassert (0); + } + else + { + // PENDING: HACK + int size; + int i; + + aopOp (IC_RESULT (ic), ic, FALSE, FALSE); + size = AOP_SIZE(IC_RESULT(ic)); + + for (i = 0; i < size; i++) { + aopPut(AOP(IC_RESULT(ic)), _fReceive[_G.receiveOffset++], i); + } + } + + freeAsmop (IC_RESULT (ic), NULL, ic); +} + +/*-----------------------------------------------------------------*/ +/* genDummyRead - generate code for dummy read of volatiles */ +/*-----------------------------------------------------------------*/ +static void +genDummyRead (iCode * ic) +{ + operand *op; + int size, offset; + + op = IC_RIGHT (ic); + if (op && IS_SYMOP (op)) + { + aopOp (op, ic, FALSE, FALSE); + + /* general case */ + size = AOP_SIZE (op); + offset = 0; + + while (size--) + { + _moveA (aopGet (AOP (op), offset, FALSE)); + offset++; + } + + freeAsmop (op, NULL, ic); + } + + op = IC_LEFT (ic); + if (op && IS_SYMOP (op)) + { + aopOp (op, ic, FALSE, FALSE); + + /* general case */ + size = AOP_SIZE (op); + offset = 0; + + while (size--) + { + _moveA (aopGet (AOP (op), offset, FALSE)); + offset++; + } + + freeAsmop (op, NULL, ic); + } +} + +/*-----------------------------------------------------------------*/ +/* genCritical - generate code for start of a critical sequence */ +/*-----------------------------------------------------------------*/ +static void +genCritical (iCode *ic) +{ + symbol *tlbl = newiTempLabel (NULL); + + if (IS_GB) + { + emit2 ("!di"); + } + else if (IC_RESULT (ic)) + { + aopOp (IC_RESULT (ic), ic, TRUE, FALSE); + aopPut (AOP (IC_RESULT (ic)), "!zero", 0); + //get interrupt enable flag IFF2 into P/O + emit2 ("ld a,i"); + //disable interrupt + emit2 ("!di"); + //parity odd <==> P/O=0 <==> interrupt enable flag IFF2=0 + emit2 ("jp PO,!tlabel", tlbl->key + 100); + aopPut (AOP (IC_RESULT (ic)), "!one", 0); + emit2 ("!tlabeldef", (tlbl->key + 100)); + _G.lines.current->isLabel = 1; + freeAsmop (IC_RESULT (ic), NULL, ic); + } + else + { + //get interrupt enable flag IFF2 into P/O + emit2 ("ld a,i"); + //disable interrupt + emit2 ("!di"); + //save P/O flag + _push (PAIR_AF); + } +} + +/*-----------------------------------------------------------------*/ +/* genEndCritical - generate code for end of a critical sequence */ +/*-----------------------------------------------------------------*/ +static void +genEndCritical (iCode *ic) +{ + symbol *tlbl = newiTempLabel (NULL); + + if (IS_GB) + { + emit2 ("!ei"); + } + else if (IC_RIGHT (ic)) + { + aopOp (IC_RIGHT (ic), ic, FALSE, TRUE); + _toBoolean (IC_RIGHT (ic)); + //don't enable interrupts if they were off before + emit2 ("!shortjp Z,!tlabel", tlbl->key + 100); + emit2 ("!ei"); + emitLabel (tlbl->key + 100); + freeAsmop (IC_RIGHT (ic), NULL, ic); + } + else + { + //restore P/O flag + _pop (PAIR_AF); + //parity odd <==> P/O=0 <==> interrupt enable flag IFF2 was 0 <==> + //don't enable interrupts as they were off before + emit2 ("jp PO,!tlabel", tlbl->key + 100); + emit2 ("!ei"); + emit2 ("!tlabeldef", (tlbl->key + 100)); + _G.lines.current->isLabel = 1; + } +} + +enum + { + /** Maximum number of bytes to emit per line. */ + DBEMIT_MAX_RUN = 8 + }; + +/** Context for the byte output chunker. */ +typedef struct +{ + unsigned char buffer[DBEMIT_MAX_RUN]; + int pos; +} DBEMITCTX; + + +/** Flushes a byte chunker by writing out all in the buffer and + reseting. +*/ +static void +_dbFlush(DBEMITCTX *self) +{ + char line[256]; + + if (self->pos > 0) + { + int i; + sprintf(line, ".db 0x%02X", self->buffer[0]); + + for (i = 1; i < self->pos; i++) + { + sprintf(line + strlen(line), ", 0x%02X", self->buffer[i]); + } + emit2(line); + } + self->pos = 0; +} + +/** Write out another byte, buffering until a decent line is + generated. +*/ +static void +_dbEmit(DBEMITCTX *self, int c) +{ + if (self->pos == DBEMIT_MAX_RUN) + { + _dbFlush(self); + } + self->buffer[self->pos++] = c; +} + +/** Context for a simple run length encoder. */ +typedef struct +{ + unsigned last; + unsigned char buffer[128]; + int pos; + /** runLen may be equivalent to pos. */ + int runLen; +} RLECTX; + +enum + { + RLE_CHANGE_COST = 4, + RLE_MAX_BLOCK = 127 + }; + +/** Flush the buffer of a run length encoder by writing out the run or + data that it currently contains. +*/ +static void +_rleCommit(RLECTX *self) +{ + int i; + if (self->pos != 0) + { + DBEMITCTX db; + memset(&db, 0, sizeof(db)); + + emit2(".db %u", self->pos); + + for (i = 0; i < self->pos; i++) + { + _dbEmit(&db, self->buffer[i]); + } + _dbFlush(&db); + } + /* Reset */ + self->pos = 0; +} + +/* Encoder design: + Can get either a run or a block of random stuff. + Only want to change state if a good run comes in or a run ends. + Detecting run end is easy. + Initial state? + + Say initial state is in run, len zero, last zero. Then if you get a + few zeros then something else then a short run will be output. + Seems OK. While in run mode, keep counting. While in random mode, + keep a count of the run. If run hits margin, output all up to run, + restart, enter run mode. +*/ + +/** Add another byte into the run length encoder, flushing as + required. The run length encoder uses the Amiga IFF style, where + a block is prefixed by its run length. A positive length means + the next n bytes pass straight through. A negative length means + that the next byte is repeated -n times. A zero terminates the + chunks. +*/ +static void +_rleAppend(RLECTX *self, unsigned c) +{ + int i; + + if (c != self->last) + { + /* The run has stopped. See if it is worthwhile writing it out + as a run. Note that the random data comes in as runs of + length one. + */ + if (self->runLen > RLE_CHANGE_COST) + { + /* Yes, worthwhile. */ + /* Commit whatever was in the buffer. */ + _rleCommit(self); + emit2("!db !immed-%u,!immedbyte", self->runLen, self->last); + } + else + { + /* Not worthwhile. Append to the end of the random list. */ + for (i = 0; i < self->runLen; i++) + { + if (self->pos >= RLE_MAX_BLOCK) + { + /* Commit. */ + _rleCommit(self); + } + self->buffer[self->pos++] = self->last; + } + } + self->runLen = 1; + self->last = c; + } + else + { + if (self->runLen >= RLE_MAX_BLOCK) + { + /* Commit whatever was in the buffer. */ + _rleCommit(self); + + emit2 ("!db !immed-%u,!immedbyte", self->runLen, self->last); + self->runLen = 0; + } + self->runLen++; + } +} + +static void +_rleFlush(RLECTX *self) +{ + _rleAppend(self, -1); + _rleCommit(self); + self->pos = 0; + self->last = 0; + self->runLen = 0; +} + +/** genArrayInit - Special code for initialising an array with constant + data. +*/ +static void +genArrayInit (iCode * ic) +{ + literalList *iLoop; + int ix; + int elementSize = 0, eIndex, i; + unsigned val, lastVal; + sym_link *type; + RLECTX rle; + + memset(&rle, 0, sizeof(rle)); + + aopOp (IC_LEFT(ic), ic, FALSE, FALSE); + + _saveRegsForCall(ic, 0); + + fetchPair (PAIR_HL, AOP (IC_LEFT (ic))); + emit2 ("call __initrleblock"); + + type = operandType(IC_LEFT(ic)); + + if (type && type->next) + { + if (IS_SPEC(type->next) || IS_PTR(type->next)) + { + elementSize = getSize(type->next); + } + else if (IS_ARRAY(type->next) && type->next->next) + { + elementSize = getSize(type->next->next); + } + else + { + printTypeChainRaw (type, NULL); + wassertl (0, "Can't determine element size in genArrayInit."); + } + } + else + { + wassertl (0, "Can't determine element size in genArrayInit."); + } + + wassertl ((elementSize > 0) && (elementSize <= 4), "Illegal element size in genArrayInit."); + + iLoop = IC_ARRAYILIST(ic); + lastVal = (unsigned)-1; + + /* Feed all the bytes into the run length encoder which will handle + the actual output. + This works well for mixed char data, and for random int and long + data. + */ + while (iLoop) + { + ix = iLoop->count; + + for (i = 0; i < ix; i++) + { + for (eIndex = 0; eIndex < elementSize; eIndex++) + { + val = (((int)iLoop->literalValue) >> (eIndex * 8)) & 0xff; + _rleAppend(&rle, val); + } + } + + iLoop = iLoop->next; + } + + _rleFlush(&rle); + /* Mark the end of the run. */ + emit2(".db 0"); + + _restoreRegsAfterCall(); + + spillCached (); + + freeAsmop (IC_LEFT(ic), NULL, ic); +} + +static void +_swap (PAIR_ID one, PAIR_ID two) +{ + if ((one == PAIR_DE && two == PAIR_HL) || (one == PAIR_HL && two == PAIR_DE)) + { + emit2 ("ex de,hl"); + } + else + { + emit2 ("ld a,%s", _pairs[one].l); + emit2 ("ld %s,%s", _pairs[one].l, _pairs[two].l); + emit2 ("ld %s,a", _pairs[two].l); + emit2 ("ld a,%s", _pairs[one].h); + emit2 ("ld %s,%s", _pairs[one].h, _pairs[two].h); + emit2 ("ld %s,a", _pairs[two].h); + } +} + +static void +setupForMemcpy (iCode *ic, int nparams, operand **pparams) +{ + PAIR_ID ids[NUM_PAIRS][NUM_PAIRS]; + PAIR_ID dest[3] = { + PAIR_DE, PAIR_HL, PAIR_BC + }; + int i, j, nunity = 0; + memset (ids, PAIR_INVALID, sizeof (ids)); + + /* Sanity checks */ + wassert (nparams == 3); + + for (i = 0; i < nparams; i++) + { + aopOp (pparams[i], ic, FALSE, FALSE); + ids[dest[i]][getPairId (AOP (pparams[i]))] = TRUE; + } + + /* Count the number of unity or iTemp assigns. */ + for (i = 0; i < 3; i++) + { + if (ids[dest[i]][dest[i]] == TRUE || ids[dest[i]][PAIR_INVALID] == TRUE) + { + nunity++; + } + } + + if (nunity == 3) + { + /* Any order, fall through. */ + } + else if (nunity == 2) + { + /* Two are OK. Assign the other one. */ + for (i = 0; i < 3; i++) + { + for (j = 0; j < NUM_PAIRS; j++) + { + if (ids[dest[i]][j] == TRUE) + { + /* Found it. See if it's the right one. */ + if (j == PAIR_INVALID || j == dest[i]) + { + /* Keep looking. */ + } + else + { + fetchPair(dest[i], AOP (pparams[i])); + goto done; + } + } + } + } + } + else if (nunity == 1) + { + /* One is OK. Find the other two. */ + for (i = 0; i < 3; i++) + { + for (j = 0; j < NUM_PAIRS; j++) + { + if (ids[dest[i]][j] == TRUE) + { + if (j == PAIR_INVALID || j == dest[i]) + { + /* This one is OK. */ + } + else + { + /* Found one. */ + if(ids[j][dest[i]] == TRUE) + { + /* Just swap. */ + _swap (j, dest[i]); + goto done; + } + else + { + fetchPair (dest[i], AOP (pparams[i])); + continue; + } + } + } + } + } + } + else + { + int next = getPairId (AOP (pparams[0])); + emit2 ("push %s", _pairs[next].name); + + if (next == dest[1]) + { + fetchPair (dest[1], AOP (pparams[1])); + fetchPair (dest[2], AOP (pparams[2])); + } + else + { + fetchPair (dest[2], AOP (pparams[2])); + fetchPair (dest[1], AOP (pparams[1])); + } + emit2 ("pop %s", _pairs[dest[0]].name); + } + done: + /* Finally pull out all of the iTemps */ + for (i = 0; i < 3; i++) + { + if (ids[dest[i]][PAIR_INVALID] == 1) + { + fetchPair (dest[i], AOP (pparams[i])); + } + } +} + +static void +genBuiltInMemcpy (iCode *ic, int nParams, operand **pparams) +{ + operand *from, *to, *count; + + wassertl (nParams == 3, "Built-in memcpy() must have three parameters"); + to = pparams[2]; + from = pparams[1]; + count = pparams[0]; + + _saveRegsForCall (ic, 0); + + setupForMemcpy (ic, nParams, pparams); + + emit2 ("ldir"); + + freeAsmop (count, NULL, ic->next->next); + freeAsmop (from, NULL, ic); + + spillPair (PAIR_HL); + + _restoreRegsAfterCall(); + + /* if we need assign a result value */ + if ((IS_ITEMP (IC_RESULT (ic)) && + (OP_SYMBOL (IC_RESULT (ic))->nRegs || + OP_SYMBOL (IC_RESULT (ic))->spildir)) || + IS_TRUE_SYMOP (IC_RESULT (ic))) + { + aopOp (IC_RESULT (ic), ic, FALSE, FALSE); + movLeft2ResultLong (to, 0, IC_RESULT (ic), 0, 0, 2); + freeAsmop (IC_RESULT (ic), NULL, ic); + } + + freeAsmop (to, NULL, ic->next); +} + +/*-----------------------------------------------------------------*/ +/* genBuiltIn - calls the appropriate function to generating code */ +/* for a built in function */ +/*-----------------------------------------------------------------*/ +static void genBuiltIn (iCode *ic) +{ + operand *bi_parms[MAX_BUILTIN_ARGS]; + int nbi_parms; + iCode *bi_iCode; + symbol *bif; + + /* get all the arguments for a built in function */ + bi_iCode = getBuiltinParms(ic,&nbi_parms,bi_parms); + + /* which function is it */ + bif = OP_SYMBOL(IC_LEFT(bi_iCode)); + + if (strcmp(bif->name,"__builtin_memcpy")==0) + { + genBuiltInMemcpy(bi_iCode, nbi_parms, bi_parms); + } + else + { + wassertl (0, "Unknown builtin function encountered"); + } +} + +/*-----------------------------------------------------------------*/ +/* genZ80Code - generate code for Z80 based controllers */ +/*-----------------------------------------------------------------*/ +void +genZ80Code (iCode * lic) +{ + iCode *ic; + int cln = 0; + + /* Hack */ + if (IS_GB) + { + _fReturn = _gbz80_return; + _fTmp = _gbz80_return; + } + else + { + _fReturn = _z80_return; + _fTmp = _z80_return; + } + + _G.lines.head = _G.lines.current = NULL; + + /* if debug information required */ + if (options.debug && currFunc) + { + debugFile->writeFunction (currFunc, lic); + } + + for (ic = lic; ic; ic = ic->next) + { + _G.current_iCode = ic; + + if (ic->lineno && cln != ic->lineno) + { + if (options.debug) + { + debugFile->writeCLine (ic); + } + if (!options.noCcodeInAsm) + { + emit2 (";%s:%d: %s", ic->filename, ic->lineno, + printCLine(ic->filename, ic->lineno)); + } + cln = ic->lineno; + } + if (options.iCodeInAsm) + { + const char *iLine = printILine(ic); + emit2 (";ic:%d: %s", ic->key, iLine); + dbuf_free(iLine); + } + /* if the result is marked as + spilt and rematerializable or code for + this has already been generated then + do nothing */ + if (resultRemat (ic) || ic->generated) + continue; + + /* depending on the operation */ + switch (ic->op) + { + case '!': + emitDebug ("; genNot"); + genNot (ic); + break; + + case '~': + emitDebug ("; genCpl"); + genCpl (ic); + break; + + case UNARYMINUS: + emitDebug ("; genUminus"); + genUminus (ic); + break; + + case IPUSH: + emitDebug ("; genIpush"); + genIpush (ic); + break; + + case IPOP: + /* IPOP happens only when trying to restore a + spilt live range, if there is an ifx statement + following this pop then the if statement might + be using some of the registers being popped which + would destroy the contents of the register so + we need to check for this condition and handle it */ + if (ic->next && + ic->next->op == IFX && + regsInCommon (IC_LEFT (ic), IC_COND (ic->next))) + { + emitDebug ("; genIfx"); + genIfx (ic->next, ic); + } + else + { + emitDebug ("; genIpop"); + genIpop (ic); + } + break; + + case CALL: + emitDebug ("; genCall"); + genCall (ic); + break; + + case PCALL: + emitDebug ("; genPcall"); + genPcall (ic); + break; + + case FUNCTION: + emitDebug ("; genFunction"); + genFunction (ic); + break; + + case ENDFUNCTION: + emitDebug ("; genEndFunction"); + genEndFunction (ic); + break; + + case RETURN: + emitDebug ("; genRet"); + genRet (ic); + break; + + case LABEL: + emitDebug ("; genLabel"); + genLabel (ic); + break; + + case GOTO: + emitDebug ("; genGoto"); + genGoto (ic); + break; + + case '+': + emitDebug ("; genPlus"); + genPlus (ic); + break; + + case '-': + emitDebug ("; genMinus"); + genMinus (ic); + break; + + case '*': + emitDebug ("; genMult"); + genMult (ic); + break; + + case '/': + emitDebug ("; genDiv"); + genDiv (ic); + break; + + case '%': + emitDebug ("; genMod"); + genMod (ic); + break; + + case '>': + emitDebug ("; genCmpGt"); + genCmpGt (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case '<': + emitDebug ("; genCmpLt"); + genCmpLt (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case LE_OP: + case GE_OP: + case NE_OP: + + /* note these two are xlated by algebraic equivalence + during parsing SDCC.y */ + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "got '>=' or '<=' shouldn't have come here"); + break; + + case EQ_OP: + emitDebug ("; genCmpEq"); + genCmpEq (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case AND_OP: + emitDebug ("; genAndOp"); + genAndOp (ic); + break; + + case OR_OP: + emitDebug ("; genOrOp"); + genOrOp (ic); + break; + + case '^': + emitDebug ("; genXor"); + genXor (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case '|': + emitDebug ("; genOr"); + genOr (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case BITWISEAND: + emitDebug ("; genAnd"); + genAnd (ic, ifxForOp (IC_RESULT (ic), ic)); + break; + + case INLINEASM: + emitDebug ("; genInline"); + genInline (ic); + break; + + case RRC: + emitDebug ("; genRRC"); + genRRC (ic); + break; + + case RLC: + emitDebug ("; genRLC"); + genRLC (ic); + break; + + case GETHBIT: + emitDebug ("; genGetHBIT"); + genGetHbit (ic); + break; + + case LEFT_OP: + emitDebug ("; genLeftShift"); + genLeftShift (ic); + break; + + case RIGHT_OP: + emitDebug ("; genRightShift"); + genRightShift (ic); + break; + + case GET_VALUE_AT_ADDRESS: + emitDebug ("; genPointerGet"); + genPointerGet (ic); + break; + + case '=': + + if (POINTER_SET (ic)) + { + emitDebug ("; genAssign (pointer)"); + genPointerSet (ic); + } + else + { + emitDebug ("; genAssign"); + genAssign (ic); + } + break; + + case IFX: + emitDebug ("; genIfx"); + genIfx (ic, NULL); + break; + + case ADDRESS_OF: + emitDebug ("; genAddrOf"); + genAddrOf (ic); + break; + + case JUMPTABLE: + emitDebug ("; genJumpTab"); + genJumpTab (ic); + break; + + case CAST: + emitDebug ("; genCast"); + genCast (ic); + break; + + case RECEIVE: + emitDebug ("; genReceive"); + genReceive (ic); + break; + + case SEND: + if (ic->builtinSEND) + { + emitDebug ("; genBuiltIn"); + genBuiltIn(ic); + } + else + { + emitDebug ("; addSet"); + addSet (&_G.sendSet, ic); + } + break; + + case ARRAYINIT: + emitDebug ("; genArrayInit"); + genArrayInit(ic); + break; + + case DUMMY_READ_VOLATILE: + emitDebug ("; genDummyRead"); + genDummyRead (ic); + break; + + case CRITICAL: + emitDebug ("; genCritical"); + genCritical (ic); + break; + + case ENDCRITICAL: + emitDebug ("; genEndCritical"); + genEndCritical (ic); + break; + + default: + ic = ic; + } + } + + + /* now we are ready to call the + peep hole optimizer */ + if (!options.nopeep) + peepHole (&_G.lines.head); + + /* This is unfortunate */ + /* now do the actual printing */ + { + struct dbuf_s *buf = codeOutBuf; + if (isInHome () && codeOutBuf == &code->oBuf) + codeOutBuf = &home->oBuf; + printLine (_G.lines.head, codeOutBuf); + if (_G.flushStatics) + { + flushStatics (); + _G.flushStatics = 0; + } + codeOutBuf = buf; + } + + freeTrace(&_G.lines.trace); + freeTrace(&_G.trace.aops); +} + +/* + Attic +static int +_isPairUsed (iCode * ic, PAIR_ID pairId) +{ + int ret = 0; + switch (pairId) + { + case PAIR_DE: + if (bitVectBitValue (ic->rMask, D_IDX)) + ret++; + if (bitVectBitValue (ic->rMask, E_IDX)) + ret++; + break; + default: + wassert (0); + } + return ret; +} + +static char * +fetchLitSpecial (asmop * aop, bool negate, bool xor) +{ + unsigned long v; + value *val = aop->aopu.aop_lit; + + wassert (aop->type == AOP_LIT); + wassert (!IS_FLOAT (val->type)); + + v = ulFromVal (val); + + if (xor) + v ^= 0x8000; + if (negate) + v = 0-v; + v &= 0xFFFF; + + tsprintf (buffer, sizeof(buffer), "!immedword", v); + return traceAlloc(&_G.trace.aops, Safe_strdup (buffer)); +} + + +*/ diff --git a/src/z80/gen.h b/src/z80/gen.h new file mode 100644 index 0000000..2512bd6 --- /dev/null +++ b/src/z80/gen.h @@ -0,0 +1,98 @@ +/*------------------------------------------------------------------------- + SDCCgen51.h - header file for code generation for 8051 + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef Z80GEN_H +#define Z80GEN_H + +typedef enum + { + AOP_INVALID, + /* Is a literal */ + AOP_LIT = 1, + /* Is in a register */ + AOP_REG, + /* Is in direct space */ + AOP_DIR, + /* SFR space ($FF00 and above) */ + AOP_SFR, + /* Is on the stack */ + AOP_STK, + /* Is an immediate value */ + AOP_IMMD, + /* Is a string (?) */ + AOP_STR, + /* Is in the carry register */ + AOP_CRY, + /* Is pointed to by IY */ + AOP_IY, + /* Is pointed to by HL */ + AOP_HL, + /* Is in A */ + AOP_ACC, + /* Is in H and L */ + AOP_HLREG, + /* Simple literal. */ + AOP_SIMPLELIT, + /* Is in the extended stack pointer (IY on the Z80) */ + AOP_EXSTK, + /* Is referenced by a pointer in a register pair. */ + AOP_PAIRPTR, + /* Read as 0, discard writes */ + AOP_DUMMY + } +AOP_TYPE; + +/* type asmop : a homogenised type for + all the different spaces an operand can be + in */ +typedef struct asmop + { + AOP_TYPE type; + short coff; /* current offset */ + short size; /* total size */ + unsigned code:1; /* is in Code space */ + unsigned paged:1; /* in paged memory */ + unsigned freed:1; /* already freed */ + unsigned bcInUse:1; + unsigned deInUse:1; + union + { + value *aop_lit; /* if literal */ + regs *aop_reg[4]; /* array of registers */ + char *aop_dir; /* if direct */ + char *aop_immd; /* if immediate others are implied */ + int aop_stk; /* stack offset when AOP_STK */ + const char *aop_str[4]; /* just a string array containing the location */ + unsigned long aop_simplelit; /* Just the value. */ + int aop_pairId; /* The pair ID */ + } + aopu; + } +asmop; + +void genZ80Code (iCode *); +void z80_emitDebuggerSymbol (char *); + + +#endif diff --git a/src/z80/main.c b/src/z80/main.c new file mode 100644 index 0000000..adc65c0 --- /dev/null +++ b/src/z80/main.c @@ -0,0 +1,954 @@ +/*------------------------------------------------------------------------- + main.c - Z80 specific definitions. + + Michael Hope 2001 + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include +#include "z80.h" +#include "MySystem.h" +#include "BuildCmd.h" +#include "SDCCutil.h" +#include "SDCCargs.h" +#include "dbuf_string.h" + +#define OPTION_BO "-bo" +#define OPTION_BA "-ba" +#define OPTION_CODE_SEG "--codeseg" +#define OPTION_CONST_SEG "--constseg" +#define OPTION_CALLEE_SAVES_BC "--callee-saves-bc" +#define OPTION_PORTMODE "--portmode=" +#define OPTION_ASM "--asm=" +#define OPTION_NO_STD_CRT0 "--no-std-crt0" + + +static char _z80_defaultRules[] = +{ +#include "peeph.rul" +#include "peeph-z80.rul" +}; + +static char _gbz80_defaultRules[] = +{ +#include "peeph.rul" +#include "peeph-gbz80.rul" +}; + +Z80_OPTS z80_opts; + +static OPTION _z80_options[] = + { + { 0, OPTION_CALLEE_SAVES_BC, &z80_opts.calleeSavesBC, "Force a called function to always save BC" }, + { 0, OPTION_PORTMODE, NULL, "Determine PORT I/O mode (z80/z180)" }, + { 0, OPTION_ASM, NULL, "Define assembler name (rgbds/asxxxx/isas/z80asm)" }, + { 0, OPTION_CODE_SEG, &options.code_seg, " use this name for the code segment", CLAT_STRING }, + { 0, OPTION_CONST_SEG, &options.const_seg, " use this name for the const segment", CLAT_STRING }, + { 0, OPTION_NO_STD_CRT0, &options.no_std_crt0, "For the z80/gbz80 do not link default crt0.o"}, + { 0, NULL } + }; + +static OPTION _gbz80_options[] = + { + { 0, OPTION_BO, NULL, " use code bank " }, + { 0, OPTION_BA, NULL, " use data bank " }, + { 0, OPTION_CALLEE_SAVES_BC, &z80_opts.calleeSavesBC, "Force a called function to always save BC" }, + { 0, OPTION_CODE_SEG, &options.code_seg, " use this name for the code segment", CLAT_STRING }, + { 0, OPTION_CONST_SEG, &options.const_seg, " use this name for the const segment", CLAT_STRING }, + { 0, OPTION_NO_STD_CRT0, &options.no_std_crt0, "For the z80/gbz80 do not link default crt0.o"}, + { 0, NULL } + }; + +typedef enum + { + /* Must be first */ + ASM_TYPE_ASXXXX, + ASM_TYPE_RGBDS, + ASM_TYPE_ISAS, + ASM_TYPE_Z80ASM + } +ASM_TYPE; + +static struct + { + ASM_TYPE asmType; + /* determine if we can register a parameter */ + int regParams; + } +_G; + +static char *_keywords[] = +{ + "sfr", + "nonbanked", + "banked", + "at", //.p.t.20030714 adding support for 'sfr at ADDR' construct + "_naked", //.p.t.20030714 adding support for '_naked' functions + "critical", + "interrupt", + NULL +}; + +extern PORT gbz80_port; +extern PORT z80_port; + +#include "mappings.i" + +static builtins _z80_builtins[] = { + { "__builtin_memcpy", "vg*", 3, {"vg*", "vg*", "ui" } }, + { NULL , NULL, 0, {NULL}} +}; + +static void +_z80_init (void) +{ + z80_opts.sub = SUB_Z80; + asm_addTree (&_asxxxx_z80); +} + +static void +_gbz80_init (void) +{ + z80_opts.sub = SUB_GBZ80; +} + +static void +_reset_regparm (void) +{ + _G.regParams = 0; +} + +static int +_reg_parm (sym_link * l, bool reentrant) +{ + if (options.noRegParams) + { + return FALSE; + } + else + { + if (_G.regParams == 2) + { + return FALSE; + } + else + { + _G.regParams++; + return TRUE; + } + } +} + +enum { + P_BANK = 1, + P_PORTMODE, + P_CODESEG, + P_CONSTSEG, +}; + +static int +do_pragma(int id, const char *name, const char *cp) +{ + struct pragma_token_s token; + int err = 0; + int processed = 1; + + init_pragma_token(&token); + + switch (id) + { + case P_BANK: + { + struct dbuf_s buffer; + + dbuf_init(&buffer, 128); + + cp = get_pragma_token(cp, &token); + + switch (token.type) + { + case TOKEN_EOL: + err = 1; + break; + + case TOKEN_INT: + switch (_G.asmType) + { + case ASM_TYPE_ASXXXX: + dbuf_printf (&buffer, "CODE_%d", token.val.int_val); + break; + + case ASM_TYPE_RGBDS: + dbuf_printf (&buffer, "CODE,BANK[%d]", token.val.int_val); + break; + + case ASM_TYPE_ISAS: + /* PENDING: what to use for ISAS? */ + dbuf_printf (&buffer, "CODE,BANK(%d)", token.val.int_val); + break; + + default: + wassert (0); + } + break; + + default: + { + const char *str = get_pragma_string (&token); + + dbuf_append_str (&buffer, (0 == strcmp("BASE", str)) ? "HOME" : str); + } + break; + } + + cp = get_pragma_token (cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + dbuf_c_str (&buffer); + /* ugly, see comment in src/port.h (borutr) */ + gbz80_port.mem.code_name = dbuf_detach (&buffer); + code->sname = gbz80_port.mem.code_name; + options.code_seg = (char *)gbz80_port.mem.code_name; + } + break; + + case P_PORTMODE: + { /*.p.t.20030716 - adding pragma to manipulate z80 i/o port addressing modes */ + const char *str; + + cp = get_pragma_token (cp, &token); + + if (TOKEN_EOL == token.type) + { + err = 1; + break; + } + + str = get_pragma_string (&token); + + cp = get_pragma_token (cp, &token); + if (TOKEN_EOL != token.type) + { + err = 1; + break; + } + + if (!strcmp(str, "z80")) + { z80_opts.port_mode = 80; } + else if(!strcmp(str, "z180")) + { z80_opts.port_mode = 180; } + else if(!strcmp(str, "save")) + { z80_opts.port_back = z80_opts.port_mode; } + else if(!strcmp(str, "restore" )) + { z80_opts.port_mode = z80_opts.port_back; } + else + err = 1; + } + break; + + case P_CODESEG: + case P_CONSTSEG: + { + char *segname; + + cp = get_pragma_token (cp, &token); + if (token.type == TOKEN_EOL) + { + err = 1; + break; + } + + segname = Safe_strdup (get_pragma_string(&token)); + + cp = get_pragma_token (cp, &token); + if (token.type != TOKEN_EOL) + { + Safe_free (segname); + err = 1; + break; + } + + if (id == P_CODESEG) + { + if (options.code_seg) Safe_free(options.code_seg); + options.code_seg = segname; + } + else + { + if (options.const_seg) Safe_free(options.const_seg); + options.const_seg = segname; + } + } + break; + + default: + processed = 0; + break; + } + + get_pragma_token(cp, &token); + + if (1 == err) + werror(W_BAD_PRAGMA_ARGUMENTS, name); + + free_pragma_token(&token); + return processed; +} + +static struct pragma_s pragma_tbl[] = { + { "bank", P_BANK, 0, do_pragma }, + { "portmode", P_PORTMODE, 0, do_pragma }, + { "codeseg", P_CODESEG, 0, do_pragma }, + { "constseg", P_CONSTSEG, 0, do_pragma }, + { NULL, 0, 0, NULL }, + }; + +static int +_process_pragma(const char *s) +{ + return process_pragma_tbl(pragma_tbl, s); +} + +static const char *_gbz80_rgbasmCmd[] = +{ + "rgbasm", "-o\"$1.o\"", "\"$1.asm\"", NULL +}; + +static const char *_gbz80_rgblinkCmd[] = +{ + "xlink", "-tg", "-n\"$1.sym\"", "-m\"$1.map\"", "-zFF", "\"$1.lnk\"", NULL +}; + +static void +_gbz80_rgblink (void) +{ + FILE *lnkfile; + + /* first we need to create the .lnk file */ + sprintf (scratchFileName, "%s.lnk", dstFileName); + if (!(lnkfile = fopen (scratchFileName, "w"))) + { + werror (E_FILE_OPEN_ERR, scratchFileName); + exit (1); + } + + fprintf (lnkfile, "[Objects]\n"); + + fprintf (lnkfile, "%s.o\n", dstFileName); + + fputStrSet(lnkfile, relFilesSet); + + fprintf (lnkfile, "\n[Libraries]\n"); + /* additional libraries if any */ + fputStrSet(lnkfile, libFilesSet); + + fprintf (lnkfile, "\n[Output]\n" "%s.gb", dstFileName); + + fclose (lnkfile); + + buildCmdLine (buffer,port->linker.cmd, dstFileName, NULL, NULL, NULL); + /* call the linker */ + if (my_system (buffer)) + { + perror ("Cannot exec linker"); + exit (1); + } +} + +static bool +_parseOptions (int *pargc, char **argv, int *i) +{ + if (argv[*i][0] == '-') + { + if (IS_GB) + { + if (!strncmp (argv[*i], OPTION_BO, sizeof (OPTION_BO) - 1)) + { + /* ROM bank */ + int bank = getIntArg (OPTION_BO, argv, i, *pargc); + struct dbuf_s buffer; + + dbuf_init (&buffer, 16); + dbuf_printf (&buffer, "CODE_%u", bank); + dbuf_c_str (&buffer); + /* ugly, see comment in src/port.h (borutr) */ + gbz80_port.mem.code_name = dbuf_detach (&buffer); + options.code_seg = (char *)gbz80_port.mem.code_name; + return TRUE; + } + else if (!strncmp (argv[*i], OPTION_BA, sizeof (OPTION_BA) - 1)) + { + /* RAM bank */ + int bank = getIntArg (OPTION_BA, argv, i, *pargc); + struct dbuf_s buffer; + + dbuf_init (&buffer, 16); + dbuf_printf (&buffer, "DATA_%u", bank); + dbuf_c_str (&buffer); + /* ugly, see comment in src/port.h (borutr) */ + gbz80_port.mem.data_name = dbuf_detach (&buffer); + return TRUE; + } + } + else if (!strncmp (argv[*i], OPTION_ASM, sizeof (OPTION_ASM) - 1)) + { + char *asmblr = getStringArg (OPTION_ASM, argv, i, *pargc); + + if (!strcmp (asmblr, "rgbds")) + { + asm_addTree (&_rgbds_gb); + gbz80_port.assembler.cmd = _gbz80_rgbasmCmd; + gbz80_port.linker.cmd = _gbz80_rgblinkCmd; + gbz80_port.linker.do_link = _gbz80_rgblink; + _G.asmType = ASM_TYPE_RGBDS; + return TRUE; + } + else if (!strcmp (asmblr, "asxxxx")) + { + _G.asmType = ASM_TYPE_ASXXXX; + return TRUE; + } + else if (!strcmp (asmblr, "isas")) + { + asm_addTree (&_isas_gb); + /* Munge the function prefix */ + gbz80_port.fun_prefix = ""; + _G.asmType = ASM_TYPE_ISAS; + return TRUE; + } + else if (!strcmp (asmblr, "z80asm")) + { + port->assembler.externGlobal = TRUE; + asm_addTree (&_z80asm_z80); + _G.asmType = ASM_TYPE_ISAS; + return TRUE; + } + } + else if (!strncmp (argv[*i], OPTION_PORTMODE, sizeof (OPTION_PORTMODE) - 1)) + { + char *portmode = getStringArg (OPTION_ASM, argv, i, *pargc); + + if (!strcmp (portmode, "z80")) + { + z80_opts.port_mode = 80; + return TRUE; + } + else if (!strcmp (portmode, "z180")) + { + z80_opts.port_mode = 180; + return TRUE; + } + } + } + return FALSE; +} + +static void +_setValues(void) +{ + const char *s; + + if (options.nostdlib == FALSE) + { + const char *s; + char path[PATH_MAX]; + struct dbuf_s dbuf; + + dbuf_init(&dbuf, PATH_MAX); + + for (s = setFirstItem(libDirsSet); s != NULL; s = setNextItem(libDirsSet)) + { + buildCmdLine2(path, sizeof path, "-k\"%s" DIR_SEPARATOR_STRING "{port}\" ", s); + dbuf_append_str(&dbuf, path); + } + buildCmdLine2(path, sizeof path, "-l\"{port}.lib\"", s); + dbuf_append_str(&dbuf, path); + + setMainValue ("z80libspec", dbuf_c_str(&dbuf)); + dbuf_destroy(&dbuf); + + for (s = setFirstItem(libDirsSet); s != NULL; s = setNextItem(libDirsSet)) + { + struct stat stat_buf; + + buildCmdLine2(path, sizeof path, "%s" DIR_SEPARATOR_STRING "{port}" DIR_SEPARATOR_STRING "crt0{objext}", s); + if (stat(path, &stat_buf) == 0) + break; + } + + if (s == NULL) + setMainValue ("z80crt0", "\"crt0{objext}\""); + else + { + char *buf; + size_t len = strlen(path) + 3; + + buf = Safe_alloc(len); + SNPRINTF(buf, len, "\"%s\"", path); + setMainValue("z80crt0", buf); + Safe_free(buf); + } + } + else + { + setMainValue ("z80libspec", ""); + setMainValue ("z80crt0", ""); + } + + setMainValue ("z80extralibfiles", (s = joinStrSet(libFilesSet))); + Safe_free((void *)s); + setMainValue ("z80extralibpaths", (s = joinStrSet(libPathsSet))); + Safe_free((void *)s); + + if (IS_GB) + { + setMainValue ("z80outputtypeflag", "-Z"); + setMainValue ("z80outext", ".gb"); + } + else + { + setMainValue ("z80outputtypeflag", "-i"); + setMainValue ("z80outext", ".ihx"); + } + + setMainValue ("stdobjdstfilename" , "{dstfilename}{objext}"); + setMainValue ("stdlinkdstfilename", "{dstfilename}{z80outext}"); + + setMainValue ("z80extraobj", (s = joinStrSet(relFilesSet))); + Safe_free((void *)s); + + sprintf (buffer, "-b_CODE=0x%04X -b_DATA=0x%04X", options.code_loc, options.data_loc); + setMainValue ("z80bases", buffer); +} + +static void +_finaliseOptions (void) +{ + port->mem.default_local_map = data; + port->mem.default_globl_map = data; + if (_G.asmType == ASM_TYPE_ASXXXX && IS_GB) + asm_addTree (&_asxxxx_gb); + + _setValues(); +} + +static void +_setDefaultOptions (void) +{ + options.nopeep = 0; + options.stackAuto = 1; + options.mainreturn = 1; + /* first the options part */ + options.intlong_rent = 1; + options.float_rent = 1; + options.noRegParams = 1; + /* Default code and data locations. */ + options.code_loc = 0x200; + + if (IS_GB) + { + options.data_loc = 0xC000; + } + else + { + options.data_loc = 0x8000; + } + + optimize.global_cse = 1; + optimize.label1 = 1; + optimize.label2 = 1; + optimize.label3 = 1; + optimize.label4 = 1; + optimize.loopInvariant = 1; + optimize.loopInduction = 1; +} + +/* Mangling format: + _fun_policy_params + where: + policy is the function policy + params is the parameter format + + policy format: + rsp + where: + r is 'r' for reentrant, 's' for static functions + s is 'c' for callee saves, 'r' for caller saves + f is 'f' for profiling on, 'x' for profiling off + examples: + rr - reentrant, caller saves + params format: + A combination of register short names and s to signify stack variables. + examples: + bds - first two args appear in BC and DE, the rest on the stack + s - all arguments are on the stack. +*/ +static char * +_mangleSupportFunctionName(char *original) +{ + char buffer[128]; + + sprintf(buffer, "%s_rr%s_%s", original, + options.profile ? "f" : "x", + options.noRegParams ? "s" : "bds" /* MB: but the library only has hds variants ??? */ + ); + + return Safe_strdup(buffer); +} + +static const char * +_getRegName (struct regs *reg) +{ + if (reg) + { + return reg->name; + } + /* assert (0); */ + return "err"; +} + +static bool +_hasNativeMulFor (iCode *ic, sym_link *left, sym_link *right) +{ + sym_link *test = NULL; + value *val; + + if ( ic->op != '*') + { + return FALSE; + } + + if ( IS_LITERAL (left)) + { + test = left; + val = OP_VALUE (IC_LEFT (ic)); + } + else if ( IS_LITERAL (right)) + { + test = right; + val = OP_VALUE (IC_RIGHT (ic)); + } + /* 8x8 unsigned multiplication code is shorter than + call overhead for the multiplication routine. */ + else if ( IS_CHAR (right) && IS_UNSIGNED (right) && + IS_CHAR (left) && IS_UNSIGNED(left) && !IS_GB) + { + return TRUE; + } + else + { + return FALSE; + } + + if ( getSize (test) <= 2) + { + return TRUE; + } + + return FALSE; +} + +/* Indicate which extended bit operations this port supports */ +static bool +hasExtBitOp (int op, int size) +{ + if (op == GETHBIT) + return TRUE; + else + return FALSE; +} + +/* Indicate the expense of an access to an output storage class */ +static int +oclsExpense (struct memmap *oclass) +{ + if (IN_FARSPACE(oclass)) + return 1; + + return 0; +} + + +#define LINKCMD "link-{port} -nf {dstfilename}" +/* +#define LINKCMD \ + "link-{port} -n -c -- {z80bases} -m -j" \ + " {z80libspec}" \ + " {z80extralibfiles} {z80extralibpaths}" \ + " {z80outputtypeflag} \"{linkdstfilename}\"" \ + " {z80crt0}" \ + " \"{dstfilename}{objext}\"" \ + " {z80extraobj}" +*/ + +#define ASMCMD \ + "as-{port} -plosgff \"{objdstfilename}\" \"{dstfilename}{asmext}\"" + +/* Globals */ +PORT z80_port = +{ + TARGET_ID_Z80, + "z80", + "Zilog Z80", /* Target name */ + NULL, /* Processor name */ + { + glue, + FALSE, + MODEL_MEDIUM | MODEL_SMALL, + MODEL_SMALL + }, + { /* Assembler */ + NULL, + ASMCMD, + "-plosgffc", /* Options with debug */ + "-plosgff", /* Options without debug */ + 0, + ".asm" + }, + { /* Linker */ + NULL, + LINKCMD, + NULL, + ".o", + 1 + }, + { /* Peephole optimizer */ + _z80_defaultRules, + 0, + 0, + 0, + 0, + z80notUsed + }, + { + /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ + 1, 2, 2, 4, 2, 2, 2, 1, 4, 4 + }, + /* tags for generic pointers */ + { 0x00, 0x40, 0x60, 0x80 }, /* far, near, xstack, code */ + { + "XSEG", + "STACK", + "CODE", + "DATA", + "ISEG", + NULL, /* pdata */ + "XSEG", + "BSEG", + "RSEG", + "GSINIT", + "OVERLAY", + "GSFINAL", + "HOME", + NULL, /* xidata */ + NULL, /* xinit */ + NULL, /* const_name */ + "CABS", /* cabs_name */ + NULL, /* xabs_name */ + NULL, /* iabs_name */ + NULL, + NULL, + 1 + }, + { NULL, NULL }, + { + -1, 0, 0, 4, 0, 2 + }, + /* Z80 has no native mul/div commands */ + { + 0, 2 + }, + { + z80_emitDebuggerSymbol + }, + { + 255, /* maxCount */ + 3, /* sizeofElement */ + /* The rest of these costs are bogus. They approximate */ + /* the behavior of src/SDCCicode.c 1.207 and earlier. */ + {4,4,4}, /* sizeofMatchJump[] */ + {0,0,0}, /* sizeofRangeCompare[] */ + 0, /* sizeofSubtract */ + 3, /* sizeofDispatch */ + }, + "_", + _z80_init, + _parseOptions, + _z80_options, + NULL, + _finaliseOptions, + _setDefaultOptions, + z80_assignRegisters, + _getRegName, + _keywords, + 0, /* no assembler preamble */ + NULL, /* no genAssemblerEnd */ + 0, /* no local IVT generation code */ + 0, /* no genXINIT code */ + NULL, /* genInitStartup */ + _reset_regparm, + _reg_parm, + _process_pragma, + _mangleSupportFunctionName, + _hasNativeMulFor, + hasExtBitOp, /* hasExtBitOp */ + oclsExpense, /* oclsExpense */ + TRUE, + TRUE, /* little endian */ + 0, /* leave lt */ + 0, /* leave gt */ + 1, /* transform <= to ! > */ + 1, /* transform >= to ! < */ + 1, /* transform != to !(a == b) */ + 0, /* leave == */ + TRUE, /* Array initializer support. */ + 0, /* no CSE cost estimation yet */ + _z80_builtins, /* builtin functions */ + GPOINTER, /* treat unqualified pointers as "generic" pointers */ + 1, /* reset labelKey to 1 */ + 1, /* globals & local static allowed */ + PORT_MAGIC +}; + +/* Globals */ +PORT gbz80_port = +{ + TARGET_ID_GBZ80, + "gbz80", + "Gameboy Z80-like", /* Target name */ + NULL, + { + glue, + FALSE, + MODEL_MEDIUM | MODEL_SMALL, + MODEL_SMALL + }, + { + NULL, + ASMCMD, + "-plosgffc", /* Options with debug */ + "-plosgff", /* Options without debug */ + 0, + ".asm", + NULL /* no do_assemble function */ + }, + { + NULL, + LINKCMD, + NULL, + ".o", + 1 + }, + { + _gbz80_defaultRules + }, + { + /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ + 1, 2, 2, 4, 2, 2, 2, 1, 4, 4 + }, + /* tags for generic pointers */ + { 0x00, 0x40, 0x60, 0x80 }, /* far, near, xstack, code */ + { + "XSEG", + "STACK", + "CODE", + "DATA", + "ISEG", + NULL, /* pdata */ + "XSEG", + "BSEG", + "RSEG", + "GSINIT", + "OVERLAY", + "GSFINAL", + "HOME", + NULL, /* xidata */ + NULL, /* xinit */ + NULL, /* const_name */ + "CABS", /* cabs_name */ + NULL, /* xabs_name */ + NULL, /* iabs_name */ + NULL, + NULL, + 1 + }, + { NULL, NULL }, + { + -1, 0, 0, 2, 0, 4 + }, + /* gbZ80 has no native mul/div commands */ + { + 0, 2 + }, + { + z80_emitDebuggerSymbol + }, + { + 255, /* maxCount */ + 3, /* sizeofElement */ + /* The rest of these costs are bogus. They approximate */ + /* the behavior of src/SDCCicode.c 1.207 and earlier. */ + {4,4,4}, /* sizeofMatchJump[] */ + {0,0,0}, /* sizeofRangeCompare[] */ + 0, /* sizeofSubtract */ + 3, /* sizeofDispatch */ + }, + "_", + _gbz80_init, + _parseOptions, + _gbz80_options, + NULL, + _finaliseOptions, + _setDefaultOptions, + z80_assignRegisters, + _getRegName, + _keywords, + 0, /* no assembler preamble */ + NULL, /* no genAssemblerEnd */ + 0, /* no local IVT generation code */ + 0, /* no genXINIT code */ + NULL, /* genInitStartup */ + _reset_regparm, + _reg_parm, + _process_pragma, + _mangleSupportFunctionName, + _hasNativeMulFor, + hasExtBitOp, /* hasExtBitOp */ + oclsExpense, /* oclsExpense */ + TRUE, + TRUE, /* little endian */ + 0, /* leave lt */ + 0, /* leave gt */ + 1, /* transform <= to ! > */ + 1, /* transform >= to ! < */ + 1, /* transform != to !(a == b) */ + 0, /* leave == */ + TRUE, /* Array initializer support. */ + 0, /* no CSE cost estimation yet */ + NULL, /* no builtin functions */ + GPOINTER, /* treat unqualified pointers as "generic" pointers */ + 1, /* reset labelKey to 1 */ + 1, /* globals & local static allowed */ + PORT_MAGIC +}; diff --git a/src/z80/mappings.i b/src/z80/mappings.i new file mode 100644 index 0000000..43d29af --- /dev/null +++ b/src/z80/mappings.i @@ -0,0 +1,464 @@ +static const ASM_MAPPING _asxxxx_gb_mapping[] = { + /* We want to prepend the _ */ + { "area", ".area _%s" }, + { "areacode", ".area _%s" }, + { "areadata", ".area _%s" }, + { "areahome", ".area _%s" }, + { "functionlabeldef", "%s:" }, + { "*hl", "(hl)" }, + { "di", "di" }, + { "ei", "ei" }, + { "ldahli", "ld a,(hl+)" }, + { "ldahlsp", "lda hl,%d(sp)" }, + { "ldaspsp", "lda sp,%d(sp)" }, + { "*pair", "(%s)" }, + { "shortjp", "jr" }, + { "enter", "" }, + { "enterx", + "lda sp,-%d(sp)" }, + { "enterxl", + "ld hl,#-%d\n" + "\tadd\thl,sp\n" + "\tld\tsp,hl" + }, + { "leave", "" + }, + { "leavex", "lda sp,%d(sp)" + }, + { "leavexl", + "ld hl,#%d\n" + "\tadd\thl,sp\n" + "\tld\tsp,hl" + }, + { "pusha", + "push af\n" + "\tpush bc\n" + "\tpush de\n" + "\tpush hl" + }, + { "popa", + "pop hl\n" + "\tpop de\n" + "\tpop bc\n" + "\tpop af" + }, + { "adjustsp", "lda sp,-%d(sp)" }, + { "fileprelude", "" }, + { "profileenter", + "ld a,#3\n" + "\trst\t0x08" + }, + { "profileexit", + "ld a,#4\n" + "\trst\t0x08" + }, + { NULL, NULL } +}; + +static const ASM_MAPPING _asxxxx_z80_mapping[] = { + /* We want to prepend the _ */ + { "area", ".area _%s" }, + { "areacode", ".area _%s" }, + { "areadata", ".area _%s" }, + { "areahome", ".area _%s" }, + { "*ixx", "%d (ix)" }, + { "*iyx", "%d (iy)" }, + { "*hl", "(hl)" }, + { "di", "di" }, + { "ei", "ei" }, + { "ldahli", + "ld a,(hl)\n" + "\tinc\thl" }, + { "ldahlsp", + "ld hl,#%d\n" + "\tadd\thl,sp" }, + { "ldaspsp", + "ld hl,#%d\n" + "\tadd\thl,sp\n" + "\tld\tsp,hl" }, + { "*pair", "(%s)" }, + { "shortjp", "jp" }, + { "enter", + "push\tix\n" + "\tld\tix,#0\n" + "\tadd\tix,sp" }, + { "enterx", + "push\tix\n" + "\tld\tix,#0\n" + "\tadd\tix,sp\n" + "\tld\thl,#-%d\n" + "\tadd\thl,sp\n" + "\tld\tsp,hl" + }, + { "leave", + "pop\tix" + }, + { "leavex", + "ld sp,ix\n" + "\tpop\tix" + }, + { "pusha", + "push af\n" + "\tpush\tbc\n" + "\tpush\tde\n" + "\tpush\thl\n" + "\tpush\tiy" + }, + { "popa", + "pop iy\n" + "\tpop\thl\n" + "\tpop\tde\n" + "\tpop\tbc\n" + "\tpop\taf" + }, + { "adjustsp", "lda sp,-%d(sp)" }, + { "profileenter", + "ld a,#3\n" + "\trst\t0x08" + }, + { "profileexit", + "ld a,#4\n" + "\trst\t0x08" + }, + { NULL, NULL } +}; + +static const ASM_MAPPING _rgbds_mapping[] = { + { "global", "GLOBAL %s" }, + { "extern", "GLOBAL %s" }, + { "slabeldef", "%s:" }, + { "labeldef", "%s:" }, + { "tlabeldef", ".l%05d:" }, + { "tlabel", ".l%05d" }, + { "fileprelude", + "; Generated using the rgbds tokens.\n" + "\t; We have to define these here as sdcc dosnt make them global by default\n" + "\tGLOBAL __mulschar\n" + "\tGLOBAL __muluchar\n" + "\tGLOBAL __mulint\n" + "\tGLOBAL __divschar\n" + "\tGLOBAL __divuchar\n" + "\tGLOBAL __divsint\n" + "\tGLOBAL __divuint\n" + "\tGLOBAL __modschar\n" + "\tGLOBAL __moduchar\n" + "\tGLOBAL __modsint\n" + "\tGLOBAL __moduint\n" + "\tGLOBAL __mullong\n" + "\tGLOBAL __modslong\n" + "\tGLOBAL __divslong\n" + "\tGLOBAL banked_call\n" + "\tGLOBAL banked_ret\n" + }, + { "functionheader", + "; ---------------------------------\n" + "; Function %s\n" + "; ---------------------------------" + }, + { "functionlabeldef", "%s:" }, + { "zero", "$00" }, + { "one", "$01" }, + { "area", "SECTION \"%s\",CODE" }, + { "areadata", "SECTION \"%F_%s\",BSS" }, + { "areacode", "SECTION \"%F_CODE\",%s" }, + { "areahome", "SECTION \"%F_HOME\",HOME" }, + { "ascii", "DB \"%s\"" }, + { "ds", "DS %d" }, + { "db", "DB" }, + { "dbs", "DB %s" }, + { "dw", "DW" }, + { "dws", "DW %s" }, + { "immed", "" }, + { "constbyte", "$%02X" }, + { "constword", "$%04X" }, + { "immedword", "$%04X" }, + { "immedbyte", "$%02X" }, + { "hashedstr", "%s" }, + { "lsbimmeds", "%s & $FF" }, + { "msbimmeds", "%s >> 8" }, + { "bankimmeds", "BANK(%s)" }, + { "module", "; MODULE %s" }, + { NULL, NULL } +}; + +static const ASM_MAPPING _rgbds_gb_mapping[] = { + { "pusha", + "push af\n" + "\tpush bc\n" + "\tpush de\n" + "\tpush hl" + }, + { "popa", + "pop hl\n" + "\tpop de\n" + "\tpop bc\n" + "\tpop af" + }, + { "di", "di" }, + { "ei", "ei" }, + { "adjustsp", "add sp,-%d" }, + { "enter", "" }, + { "enterx", "add sp,-%d" + }, + { "leave", "" + }, + { "leavex", "add sp,%d" + }, + { "ldahli", "ld a,[hl+]" }, + { "*hl", "[hl]" }, + { "ldahlsp", "ld hl,[sp+%d]" }, + { "ldaspsp", "add sp,%d" }, + { "*pair", "[%s]" }, + { "shortjp", "jr" }, + { NULL, NULL } +}; + +static const ASM_MAPPING _isas_mapping[] = { + { "global", "GLOBAL %s" }, + { "extern", "GLOBAL %s" }, + { "slabeldef", "%s:" }, + { "labeldef", "%s:" }, + { "tlabeldef", "?l%05d:" }, + { "tlabel", "?l%05d" }, + { "fileprelude", + ";Generated using the isas tokens.\n" + "\tLPREFIX '?' ; Treat labels starting with ? as local.\n" + "\tONCNUM ; Numbers are hex\n" + "\tCAPSOFF ; Case sensitive\n" + "\tISDMG ; Gameboy mode\n" + "_CODE\tGROUP\n" + "\t; We have to define these here as sdcc doesnt make them global by default\n" + "\tGLOBAL __mulschar\n" + "\tGLOBAL __muluchar\n" + "\tGLOBAL __mulint\n" + "\tGLOBAL __divschar\n" + "\tGLOBAL __divuchar\n" + "\tGLOBAL __divsint\n" + "\tGLOBAL __divuint\n" + "\tGLOBAL __modschar\n" + "\tGLOBAL __moduchar\n" + "\tGLOBAL __modsint\n" + "\tGLOBAL __moduint\n" + "\tGLOBAL banked_call\n" + "\tGLOBAL banked_ret\n" + }, + { "functionheader", + "; ---------------------------------\n" + "; Function %s\n" + "; ---------------------------------" + }, + { "functionlabeldef", "%s:" }, + { "zero", "$00" }, + { "one", "$01" }, + { "area", "%s\tGROUP" }, + { "areacode", "_CODE\tGROUP" }, + { "areadata", "_DATA\tGROUP" }, + { "areahome", "_CODE\tGROUP" }, + { "ascii", "DB \"%s\"" }, + { "ds", "DS %d" }, + { "db", "DB" }, + { "dbs", "DB %s" }, + { "dw", "DW" }, + { "dws", "DW %s" }, + { "immed", "" }, + { "constbyte", "0x%02X" }, + { "constword", "0x%04X" }, + { "immedword", "0x%04X" }, + { "immedbyte", "0x%02X" }, + { "hashedstr", "%s" }, + { "lsbimmeds", "%s & 0xFF" }, + { "msbimmeds", "%s >> 8" }, + { "bankimmeds", "!%s" }, + { "module", "; MODULE %s" }, + { NULL, NULL } +}; + +static const ASM_MAPPING _isas_gb_mapping[] = { + { "pusha", + "push af\n" + "\tpush bc\n" + "\tpush de\n" + "\tpush hl" + }, + { "popa", + "pop hl\n" + "\tpop de\n" + "\tpop bc\n" + "\tpop af" + }, + { "di", "di" }, + { "ei", "ei" }, + { "adjustsp", "add sp,-%d" }, + { "enter", "" }, + { "enterx", "add sp,-%d" + }, + { "leave", "" + }, + { "leavex", "add sp,%d\n" }, + { "ldahli", "ld a,(hli)" }, + { "*hl", "(hl)" }, + { "ldahlsp", "ldhl sp,%d" }, + { "ldaspsp", "add sp,%d" }, + { "*pair", "(%s)" }, + { "shortjp", "jr" }, + { NULL, NULL } +}; + +static const ASM_MAPPING _z80asm_mapping[] = { + { "global", "XDEF %s" }, + { "extern", "XREF %s" }, + { "slabeldef", "\n.%s" }, + { "labeldef", "\n.%s" }, + { "tlabeldef", "\n.l%N%05d" }, + { "tlabel", "l%N%05d" }, + { "fileprelude", + "; Generated using the z80asm/z88 tokens.\n" + "\tXREF __muluchar_rrx_s\n" + "\tXREF __mulschar_rrx_s\n" + "\tXREF __mulint_rrx_s\n" + "\tXREF __mullong_rrx_s\n" + "\tXREF __divuchar_rrx_s\n" + "\tXREF __divschar_rrx_s\n" + "\tXREF __divsint_rrx_s\n" + "\tXREF __divuint_rrx_s\n" + "\tXREF __divulong_rrx_s\n" + "\tXREF __divslong_rrx_s\n" + "\tXREF __rrulong_rrx_s\n" + "\tXREF __rrslong_rrx_s\n" + "\tXREF __rlulong_rrx_s\n" + "\tXREF __rlslong_rrx_s\n" + }, + { "functionheader", + "; ---------------------------------\n" + "; Function %s\n" + "; ---------------------------------" + }, + { "functionlabeldef", ".%s" }, + { "zero", "$00" }, + { "one", "$01" }, + { "ascii", "DEFM \"%s\"" }, + { "ds", "DEFS %d" }, + { "db", "DEFB" }, + { "dbs", "DEFB %s" }, + { "dw", "DEFW" }, + { "dws", "DEFB %s" }, + { "immed", "" }, + { "constbyte", "$%02X" }, + { "constword", "$%04X" }, + { "immedword", "$%04X" }, + { "immedbyte", "$%02X" }, + { "hashedstr", "%s" }, + { "lsbimmeds", "%s & $FF" }, + { "msbimmeds", "%s / 256" }, + + { "bankimmeds", "BANK(%s)" }, + { "module", "MODULE %s" }, + { "area", "; Area %s" }, + { "areadata", "; Aread BSS" }, + { "areacode", "; Area CODE" }, + { "areahome", "; Area HOME" }, + { NULL, NULL } +}; + +static const ASM_MAPPING _z80asm_z80_mapping[] = { + { "*ixx", "(ix%+d)" }, + { "*iyx", "(iy%+d)" }, + { "*hl", "(hl)" }, + { "di", "di" }, + { "ei", "ei" }, + { "ldahli", + "ld a,(hl)\n" + "\tinc\thl" }, + { "ldahlsp", + "ld hl,%d\n" + "\tadd\thl,sp" }, + { "ldaspsp", + "ld hl,%d\n" + "\tadd\thl,sp\n" + "\tld\tsp,hl" }, + { "*pair", "(%s)" }, + { "shortjp", "jp" }, + { "enter", + "push\tix\n" + "\tld\tix,0\n" + "\tadd\tix,sp" }, + { "enterx", + "push\tix\n" + "\tld\tix,0\n" + "\tadd\tix,sp\n" + "\tld\thl,-%d\n" + "\tadd\thl,sp\n" + "\tld\tsp,hl" + }, + { "leave", + "pop\tix" + }, + { "leavex", + "ld sp,ix\n" + "\tpop\tix" + }, + { "pusha", + "push af\n" + "\tpush\tbc\n" + "\tpush\tde\n" + "\tpush\thl\n" + "\tpush\tiy" + }, + { "popa", + "pop\tiy\n" + "\tpop\thl\n" + "\tpop\tde\n" + "\tpop\tbc\n" + "\tpop\taf" + }, + { "adjustsp", "lda sp,(sp%+d)" }, + { "profileenter", + "ld a,3\n" + "\trst\t$08" + }, + { "profileexit", + "ld a,4\n" + "\trst\t$08" + }, + { NULL, NULL } +}; + +static const ASM_MAPPINGS _isas = { + NULL, + _isas_mapping +}; + +const ASM_MAPPINGS _isas_gb = { + &_isas, + _isas_gb_mapping +}; + +static const ASM_MAPPINGS _rgbds = { + NULL, + _rgbds_mapping +}; + +const ASM_MAPPINGS _rgbds_gb = { + &_rgbds, + _rgbds_gb_mapping +}; + +const ASM_MAPPINGS _asxxxx_gb = { + &asm_asxxxx_mapping, + _asxxxx_gb_mapping +}; + +const ASM_MAPPINGS _asxxxx_z80 = { + &asm_asxxxx_mapping, + _asxxxx_z80_mapping +}; + +static const ASM_MAPPINGS _z80asm = { + NULL, + _z80asm_mapping +}; + +const ASM_MAPPINGS _z80asm_z80 = { + &_z80asm, + _z80asm_z80_mapping +}; diff --git a/src/z80/peep.c b/src/z80/peep.c new file mode 100644 index 0000000..bc32b73 --- /dev/null +++ b/src/z80/peep.c @@ -0,0 +1,547 @@ +/*------------------------------------------------------------------------- + peep.c - source file for peephole optimizer helper functions + + Written By - Philipp Klaus Krause + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "common.h" +#include "SDCCicode.h" +#include "z80.h" +#include "SDCCglobl.h" +#include "SDCCpeeph.h" +#include "gen.h" + +#define NOTUSEDERROR() do {werror(E_INTERNAL_ERROR, __FILE__, __LINE__, "error in notUsed()");} while(0) + +/*#define D(_s) { printf _s; fflush(stdout); }*/ +#define D(_s) + +typedef enum +{ + S4O_CONDJMP, + S4O_WR_OP, + S4O_RD_OP, + S4O_TERM, + S4O_VISITED, + S4O_ABORT, + S4O_CONTINUE +} S4O_RET; + +static struct +{ + lineNode *head; +} _G; + +/*-----------------------------------------------------------------*/ +/* univisitLines - clear "visited" flag in all lines */ +/*-----------------------------------------------------------------*/ +static void +unvisitLines (lineNode *pl) +{ + for (; pl; pl = pl->next) + pl->visited = FALSE; +} + +#define AOP(op) op->aop +#define AOP_SIZE(op) AOP(op)->size + +static bool +isReturned(const char *what) +{ + symbol *sym; + sym_link *sym_lnk; + int size; + lineNode *l; + + if(strncmp(what, "iy", 2) == 0) + return FALSE; + if(strlen(what) != 1) + return TRUE; + + l = _G.head; + do + { + l = l->next; + } while(l->isComment || l->ic == NULL || l->ic->op != FUNCTION); + + sym = OP_SYMBOL(IC_LEFT(l->ic)); + + if(sym && IS_DECL(sym->type)) + { + // Find size of return value. + specifier *spec; + if(sym->type->select.d.dcl_type != FUNCTION) + NOTUSEDERROR(); + spec = &(sym->etype->select.s); + if(spec->noun == V_VOID) + size = 0; + else if(spec->noun == V_CHAR) + size = 1; + else if(spec->noun == V_INT && !(spec->b_long)) + size = 2; + else + size = 4; + + // Check for returned pointer. + sym_lnk = sym->type; + while (sym_lnk && !IS_PTR (sym_lnk)) + sym_lnk = sym_lnk->next; + if(IS_PTR(sym_lnk)) + size = 2; + } + else + { + NOTUSEDERROR(); + size = 4; + } + + switch(*what) + { + case 'd': + return(size >= 4); + case 'e': + return(size >= 3); + case 'h': + return(size >= 2); + case 'l': + return(size >= 1); + default: + return FALSE; + } +} + +/*-----------------------------------------------------------------*/ +/* incLabelJmpToCount - increment counter "jmpToCount" in entry */ +/* of the list labelHash */ +/*-----------------------------------------------------------------*/ +static bool +incLabelJmpToCount (const char *label) +{ + labelHashEntry *entry; + + entry = getLabelRef (label, _G.head); + if (!entry) + return FALSE; + entry->jmpToCount++; + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* findLabel - */ +/* 1. extracts label in the opcode pl */ +/* 2. increment "label jump-to count" in labelHash */ +/* 3. search lineNode with label definition and return it */ +/*-----------------------------------------------------------------*/ +static lineNode * +findLabel (const lineNode *pl) +{ + char *p; + lineNode *cpl; + + /* 1. extract label in opcode */ + + /* In each mcs51 jumping opcode the label is at the end of the opcode */ + p = strlen (pl->line) - 1 + pl->line; + + /* scan backward until ',' or '\t' */ + for (; p > pl->line; p--) + if (*p == ',' || *p == '\t') + break; + + /* sanity check */ + if (p == pl->line) + { + NOTUSEDERROR(); + return NULL; + } + + /* skip ',' resp. '\t' */ + ++p; + + /* 2. increment "label jump-to count" */ + if (!incLabelJmpToCount (p)) + return NULL; + + /* 3. search lineNode with label definition and return it */ + for (cpl = _G.head; cpl; cpl = cpl->next) + { + if ( cpl->isLabel + && strncmp (p, cpl->line, strlen(p)) == 0) + { + return cpl; + } + } + return NULL; +} + +/* Check if reading arg implies reading what. */ +static bool argCont(const char *arg, const char *what) +{ + return (arg[0] == '#') ? FALSE : strstr(arg, what) != NULL; +} + +static bool +z80MightRead(const lineNode *pl, const char *what) +{ + if(strcmp(what, "iyl") == 0 || strcmp(what, "iyh") == 0) + what = "iy"; + + if(strcmp(pl->line, "call\t__initrleblock") == 0) + return TRUE; + + if(strncmp(pl->line, "call\t", 5) == 0 && strchr(pl->line, ',') == 0) + return FALSE; + + if(strncmp(pl->line, "ret", 3) == 0 && !isReturned(what)) + return FALSE; + + if(strcmp(pl->line, "ex\tde,hl") == 0 && strchr(what, 'h') == 0 && strchr(what, 'l') == 0 && strchr(what, 'd') == 0&& strchr(what, 'e') == 0) + return FALSE; + if(strncmp(pl->line, "ld\t", 3) == 0) + { + if(strstr(strchr(pl->line, ','), what) && strchr(pl->line, ',')[1] != '#') + return TRUE; + if(*(strchr(pl->line, ',') - 1) == ')' && strstr(pl->line + 3, what) && (strchr(pl->line, '#') == 0 || strchr(pl->line, '#') > strchr(pl->line, ','))) + return TRUE; + return FALSE; + } + + if(strcmp(pl->line, "xor\ta,a") == 0) + return FALSE; + + if(strncmp(pl->line, "adc\t", 4) == 0 || + strncmp(pl->line, "add\t", 4) == 0 || + strncmp(pl->line, "and\t", 4) == 0 || + strncmp(pl->line, "sbc\t", 4) == 0 || + strncmp(pl->line, "sub\t", 4) == 0 || + strncmp(pl->line, "xor\t", 4) == 0) + { + if(argCont(pl->line + 4, what)) + return TRUE; + if(strstr(pl->line + 4, "hl") == 0 && strcmp("a", what) == 0) + return TRUE; + return FALSE; + } + + if(strncmp(pl->line, "or\t", 3) == 0) + { + if(argCont(pl->line + 3, what)) + return TRUE; + if(strcmp("a", what) == 0) + return TRUE; + return FALSE; + } + + if(strncmp(pl->line, "pop\t", 4) == 0) + return FALSE; + + if(strncmp(pl->line, "push\t", 5) == 0) + return(strstr(pl->line + 5, what) != 0); + + if( + strncmp(pl->line, "dec\t", 4) == 0 || + strncmp(pl->line, "inc\t", 4) == 0 || + strncmp(pl->line, "rl\t", 4) == 0 || + strncmp(pl->line, "rr\t", 4) == 0 || + strncmp(pl->line, "sla\t", 4) == 0 || + strncmp(pl->line, "sra\t", 4) == 0 || + strncmp(pl->line, "srl\t", 4) == 0) + { + return (argCont(pl->line + 4, what)); + } + + if( + strncmp(pl->line, "rl\t", 3) == 0 || + strncmp(pl->line, "rr\t", 3) == 0) + { + return (argCont(pl->line + 3, what)); + } + + if(strncmp(pl->line, "jp\t", 3) == 0 || + (bool)(strncmp(pl->line, "jr\t", 3)) == 0) + return FALSE; + + if(strncmp(pl->line, "djnz\t", 5) == 0) + return(strchr(what, 'b') != 0); + + if(strncmp(pl->line, "rla", 3) == 0 || + strncmp(pl->line, "rlca", 4) == 0) + return(strcmp(what, "a") == 0); + + return TRUE; +} + +static bool +z80UncondJump(const lineNode *pl) +{ + if((strncmp(pl->line, "jp\t", 3) == 0 || + strncmp(pl->line, "jr\t", 3) == 0) && strchr(pl->line, ',') == 0) + return TRUE; + return FALSE; +} + +static bool +z80CondJump(const lineNode *pl) +{ + if(((strncmp(pl->line, "jp\t", 3) == 0 || + strncmp(pl->line, "jr\t", 3) == 0) && strchr(pl->line, ',') != 0) || + strncmp(pl->line, "djnz\t", 5) == 0) + return TRUE; + return FALSE; +} + +static bool +z80SurelyWrites(const lineNode *pl, const char *what) +{ + if(strcmp(pl->line, "xor\ta,a") == 0 && strcmp(what, "a") == 0) + return TRUE; + if(strncmp(pl->line, "ld\t", 3) == 0 && strncmp(pl->line + 3, "hl", 2) == 0 && (what[0] == 'h' || what[0] == 'l')) + return TRUE; + if(strncmp(pl->line, "ld\t", 3) == 0 && strncmp(pl->line + 3, "de", 2) == 0 && (what[0] == 'd' || what[0] == 'e')) + return TRUE; + if(strncmp(pl->line, "ld\t", 3) == 0 && strncmp(pl->line + 3, "bc", 2) == 0 && (what[0] == 'b' || what[0] == 'c')) + return TRUE; + if(strncmp(pl->line, "ld\t", 3) == 0 && strncmp(pl->line + 3, what, strlen(what)) == 0 && pl->line[3 + strlen(what)] == ',') + return TRUE; + if(strncmp(pl->line, "pop\t", 4) == 0 && strstr(pl->line + 4, what)) + return TRUE; + if(strncmp(pl->line, "call\t", 5) == 0 && strchr(pl->line, ',') == 0) + return TRUE; + if(strcmp(pl->line, "ret") == 0) + return TRUE; + if(strncmp(pl->line, "ld\tiy", 5) == 0 && strncmp(what, "iy", 2) == 0) + return TRUE; + return FALSE; +} + +static bool +z80SurelyReturns(const lineNode *pl) +{ + if(strcmp(pl->line, "\tret") == 0) + return TRUE; + return FALSE; +} + +/*-----------------------------------------------------------------*/ +/* scan4op - "executes" and examines the assembler opcodes, */ +/* follows conditional and un-conditional jumps. */ +/* Moreover it registers all passed labels. */ +/* */ +/* Parameter: */ +/* lineNode **pl */ +/* scanning starts from pl; */ +/* pl also returns the last scanned line */ +/* const char *pReg */ +/* points to a register (e.g. "ar0"). scan4op() tests for */ +/* read or write operations with this register */ +/* const char *untilOp */ +/* points to NULL or a opcode (e.g. "push"). */ +/* scan4op() returns if it hits this opcode. */ +/* lineNode **plCond */ +/* If a conditional branch is met plCond points to the */ +/* lineNode of the conditional branch */ +/* */ +/* Returns: */ +/* S4O_ABORT */ +/* on error */ +/* S4O_VISITED */ +/* hit lineNode with "visited" flag set: scan4op() already */ +/* scanned this opcode. */ +/* S4O_FOUNDOPCODE */ +/* found opcode and operand, to which untilOp and pReg are */ +/* pointing to. */ +/* S4O_RD_OP, S4O_WR_OP */ +/* hit an opcode reading or writing from pReg */ +/* S4O_CONDJMP */ +/* hit a conditional jump opcode. pl and plCond return the */ +/* two possible branches. */ +/* S4O_TERM */ +/* acall, lcall, ret and reti "terminate" a scan. */ +/*-----------------------------------------------------------------*/ +static S4O_RET +scan4op (lineNode **pl, const char *what, const char *untilOp, + lineNode **plCond) +{ + for (; *pl; *pl = (*pl)->next) + { + if (!(*pl)->line || (*pl)->isDebug || (*pl)->isComment || (*pl)->isLabel) + continue; + D(("Scanning %s for %s\n", (*pl)->line, what)); + /* don't optimize across inline assembler, + e.g. isLabel doesn't work there */ + if ((*pl)->isInline) + return S4O_ABORT; + + if ((*pl)->visited) + return S4O_VISITED; + (*pl)->visited = TRUE; + + if(z80MightRead(*pl, what)) + { + D(("S4O_RD_OP\n")); + return S4O_RD_OP; + } + + if(z80UncondJump(*pl)) + { + *pl = findLabel (*pl); + if (!*pl) + { + D(("S4O_ABORT\n")); + return S4O_ABORT; + } + } + if(z80CondJump(*pl)) + { + *plCond = findLabel (*pl); + if (!*plCond) + { + D(("S4O_ABORT\n")); + return S4O_ABORT; + } + D(("S4O_CONDJMP\n")); + return S4O_CONDJMP; + } + + if(z80SurelyWrites(*pl, what)) + { + D(("S4O_WR_OP\n")); + return S4O_WR_OP; + } + + /* Don't need to check for de, hl since z80MightRead() does that */ + if(z80SurelyReturns(*pl)) + { + D(("S4O_TERM\n")); + return S4O_TERM; + } + } + D(("S4O_ABORT\n")); + return S4O_ABORT; +} + +/*-----------------------------------------------------------------*/ +/* doTermScan - scan through area 2. This small wrapper handles: */ +/* - action required on different return values */ +/* - recursion in case of conditional branches */ +/*-----------------------------------------------------------------*/ +static bool +doTermScan (lineNode **pl, const char *what) +{ + lineNode *plConditional; + + for (;; *pl = (*pl)->next) + { + switch (scan4op (pl, what, NULL, &plConditional)) + { + case S4O_TERM: + case S4O_VISITED: + case S4O_WR_OP: + /* all these are terminating condtions */ + return TRUE; + case S4O_CONDJMP: + /* two possible destinations: recurse */ + { + lineNode *pl2 = plConditional; + D(("CONDJMP trying other branch first\n")); + if (!doTermScan (&pl2, what)) + return FALSE; + D(("Other branch OK.\n")); + } + continue; + case S4O_RD_OP: + default: + /* no go */ + return FALSE; + } + } +} + +static bool +isReg(const char *what) +{ + if(strcmp(what, "iyl") == 0 || strcmp(what, "iyh") == 0) + return TRUE; + if(strlen(what) != 1) + return FALSE; + switch(*what) + { + case 'a': + case 'b': + case 'c': + case 'd': + case 'e': + case 'h': + case 'l': + return TRUE; + } + return FALSE; +} + +static bool +isRegPair(const char *what) +{ + if(strlen(what) != 2) + return FALSE; + if(strcmp(what, "bc") == 0) + return TRUE; + if(strcmp(what, "de") == 0) + return TRUE; + if(strcmp(what, "hl") == 0) + return TRUE; + if(strcmp(what, "iy") == 0) + return TRUE; + return FALSE; +} + +/* Check that what is never read after endPl. */ + +bool +z80notUsed (const char *what, lineNode *endPl, lineNode *head) +{ + lineNode *pl; + D(("Checking for %s\n", what)); + if(isRegPair(what)) + { + char low[2], high[2]; + low[0] = what[1]; + high[0] = what[0]; + low[1] = 0; + high[1] = 0; + if(strcmp(what, "iy") == 0) + return(z80notUsed("iyl", endPl, head) && z80notUsed("iyh", endPl, head)); + return(z80notUsed(low, endPl, head) && z80notUsed(high, endPl, head)); + } + + if(!isReg(what)) + return FALSE; + + _G.head = head; + + unvisitLines (_G.head); + + pl = endPl->next; + if (!doTermScan (&pl, what)) + return FALSE; + + return TRUE; +} + diff --git a/src/z80/peep.h b/src/z80/peep.h new file mode 100644 index 0000000..474f0a0 --- /dev/null +++ b/src/z80/peep.h @@ -0,0 +1,26 @@ +/*------------------------------------------------------------------------- + peep.h - header file for peephole optimizer helper functions + + Written By - Philipp Klaus Krause + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +bool z80notUsed(const char *what, lineNode *endPl, lineNode *head); + diff --git a/src/z80/peeph-gbz80.def b/src/z80/peeph-gbz80.def new file mode 100644 index 0000000..6d55ebf --- /dev/null +++ b/src/z80/peeph-gbz80.def @@ -0,0 +1,810 @@ +// Due to major changes in the Z80 peepholes the old peepholes from peeph.def have been moved here. +// All new peepholes went into peeph-z80.def. A GBZ80 expert should look into this files and peeph-z80.def +// And move peepholes that are useful and correct for both Z80 and GBZ80 into peeph.def. + +// peeph.def - Common Z80 and gbz80 peephole rules +// +// +// (c) Philipp Klaus Krause (pkk@spth.de, philipp@colecovision.eu) 2006 - 2007 +// +// This program is free software; you can redistribute it and/or modify it +// under the terms of the GNU General Public License as published by the +// Free Software Foundation; either version 2, or (at your option) any +// later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +replace restart { + ld %1,%1 +} by { + ; peephole 1 removed redundant load. +} if notVolatile(%1) + +replace restart { + jp NC,%1 + jp %2 +%1: +} by { + jp C,%2 + ; peephole 3 removed jp by using inverse jump logic +%1: +} if labelRefCountChange(%1 -1) + +replace restart { + jp C,%1 + jp %2 +%1: +} by { + jp NC,%2 + ; peephole 4 removed jp by using inverse jump logic +%1: +} if labelRefCountChange(%1 -1) + +replace restart { + jp NZ,%1 + jp %2 +%1: +} by { + jp Z,%2 + ; peephole 5 removed jp by using inverse jump logic +%1: +} if labelRefCountChange(%1 -1) + +replace restart { + jp Z,%1 + jp %2 +%1: +} by { + jp NZ,%2 + ; peephole 6 removed jp by using inverse jump logic +%1: +} if labelRefCountChange(%1 -1) + +replace restart { + jp %5 +} by { + jp %6 + ; peephole 7 redirected jump-to-jump at %5 by jump to %6 +} if labelIsUncondJump(), labelRefCountChange(%5 -1), labelRefCountChange(%6 +1) + +replace restart { + jp %1,%5 +} by { + jp %1,%6 + ; peephole 8 redirected jump-to-jump at %5 by jump to %6 +} if labelIsUncondJump(), labelRefCountChange(%5 -1), labelRefCountChange(%6 +1) + +replace restart { + ld %2,%3 + jp %4 +%5: + ld %2,%3 +%4: +} by { + ; peephole 9 removed jump and redundant load. +%5: + ld %2,%3 +%4: +} if labelRefCountChange(%4 -1) + +replace restart { + xor a,a + ld a,#0x00 +} by { + xor a,a + ; peephole 10 removed redundant load of 0 into a. +} + +replace { + ld e,#0x%1 + ld d,#0x%2 +} by { + ld de,#0x%2%1 + ; peephole 11 combined constant loads into register pair. +} + +replace { + ld l,#0x%1 + ld h,#0x%2 +} by { + ld hl,#0x%2%1 + ; peephole 12 combined constant loads into register pair. +} + +replace { + ld c,#0x%1 + ld b,#0x%2 +} by { + ld bc,#0x%2%1 + ; peephole 13 combined constant loads into register pair. +} + +replace restart { + ld %1,a + ld a,%1 +} by { + ld %1,a + ; peephole 14 removed redundant load from %1 into a. +} if notVolatile(%1) +// This gives many false negatives and without the test no problems are encountered in the regression tests +// Maybe we can try this after 2.7.0 release + +replace restart { + ld a,%1 + ld %1,a +} by { + ld a,%1 + ; peephole 15 removed redundant load from a into %1. +} if notVolatile(%1) +// This gives many false negatives and without the test no problems are encountered in the regression tests +// Maybe we can try this after 2.7.0 release + +replace restart { + ld %2,%3 + ld a,%2 + and a,%1 + ld %2,%4 +} by { + ld a,%3 + ; peephole 16 moved %3 directly into a instead of going through %2. + and a,%1 + ld %2,%4 +} if notVolatile(%2), operandsNotSame + +replace restart { + ld %1,a + ld a,%2 + or a,%1 +} by { + ld %1,a + or a,%2 + ; peephole 17 removed load by reordering or arguments. +} if notVolatile(%1) + +replace restart { + ld %1,a + xor a,a + or a,%1 +} by { + ld %1,a + or a,a + ; peephole 18 used value still in a instead of loading it from %1. +} + +replace restart { + or a,%1 + or a,a +} by { + or a,%1 + ; peephole 19 removed redundant or after or. +} + +replace restart { + and a,%1 + or a,a +} by { + and a,%1 + ; peephole 20 removed redundant or after and. +} + +replace restart { + xor a,%1 + or a,a +} by { + xor a,%1 + ; peephole 21 removed redundant or after xor. +} + +replace restart { + ld %1,a + and a,%2 + ld %1,a +} by { + ; peephole 22 removed redundant load into %1. + and a,%2 + ld %1,a +} if notVolatile(%1) + +replace { + ld %1,%2 + ld a,%2 +} by { + ld a,%2 + ld %1,a + ; peephole 23 load value in a first and use it next +} if notVolatile(%1 %2) + +replace restart { + ld %1,%2 + ld %3,%4 + ld %2,%1 + ld %4,%3 +} by { + ld %1,%2 + ld %3,%4 + ; peephole 24 removed redundant load from %3%1 into %4%2 +} if notVolatile(%1 %2 %3 %4) + +replace restart { + ld b,%1 + ld a,b + pop bc +} by { + ld a,%1 + ; peephole 25 removed load into b + pop bc +} + +replace restart { + ld c,%1 + ld a,c + pop bc +} by { + ld a,%1 + ; peephole 26 removed load into c + pop bc +} + +replace restart { + ld d,%1 + ld a,d + pop de +} by { + ld a,%1 + ; peephole 27 removed load into d + pop de +} + +replace restart { + ld e,%1 + ld a,e + pop de +} by { + ld a,%1 + ; peephole 28 removed load into e + pop de +} + +replace restart { + ld h,%1 + ld a,h + pop hl +} by { + ld a,%1 + ; peephole 29 removed load into h + pop hl +} + +replace restart { + ld l,%1 + ld a,l + pop hl +} by { + ld a,%1 + ; peephole 30 removed load into l + pop hl +} + +replace restart { + ld a,c + push af + inc sp + ld a,#%2 + push af + inc sp + call %3 +} by { + ld b,c + ld c,#%2 + push bc + ; peephole 31 moved and pushed arguments c and #%2 through bc instead of pushing them individually. + call %3 +} + +replace restart { + ld a,e + push af + inc sp + ld a,#%2 + push af + inc sp + call %3 +} by { + ld d,e + ld e,#%2 + push de + ; peephole 32 moved and pushed arguments e and #%2 through de instead of pushing them individually. + call %3 +} + +replace restart { + ld a,%1 + sub a,%2 + jp %3,%4 + ld a,%1 +} by { + ld a,%1 + cp a,%2 + jp %3,%4 + ; peephole 33 removed load by replacing sub with cp + assert a=%1 +} if notVolatile(%1) + +replace restart { + assert a=%1 + sub a,%2 + jp %3,%4 + ld a,%1 +} by { + cp a,#%2 + jp %3,%4 + ; peephole 34 removed load by replacing sub with cp + assert a=%1 +} + +replace restart { + assert a=%1 +} by { +} + +replace restart { + sub a,#0xFF + jp Z,%1 +} by { + inc a + ; peephole 35 replaced sub a,#0xFF by inc a. + jp Z,%1 +} + +replace restart { + sub a,#0xFF + jp NZ,%1 +} by { + inc a + ; peephole 36 replaced sub a,#0xFF by inc a. + jp NZ,%1 +} + +replace restart { + ld bc,#%1 + %2 + ld a,c + add a,%3 + ld c,a + ld a,b + adc a,%4 + ld b,a +} by { + ld a,#<(%1 + %2) + add a,%3 + ld c,a + ld a,#>(%1 + %2) + ; peephole 37 directly used (%1 + %2) in calculation instead of placing it in bc first. + adc a,%4 + ld b,a +} + +replace restart { + ld de,#%1 + %2 + ld a,e + add a,%3 + ld e,a + ld a,d + adc a,%4 + ld d,a +} by { + ld a,#<(%1 + %2) + add a,%3 + ld e,a + ld a,#>(%1 + %2) + ; peephole 38 directly used (%1 + %2) in calculation instead of placing it in de first. + adc a,%4 + ld d,a +} + +replace restart { + rlca + ld a,#0x00 + rla +} by { + rlca + and a,#0x01 + ; peephole 39 replaced zero load, rla by and since rlca writes the same value to carry bit and least significant bit. +} + +replace restart { + ld %1,%2 + push %1 + pop %4 + ld %1,%3 +} by { + ld %4,%2 + ; peephole 40 moved %2 directly into de instead of going through %1. + ld %1,%3 +} + +replace restart { + add a,#0x00 + ld %2,a + ld a,%3 + adc a,%4 +} by { + ; peephole 41 removed lower part of multibyte addition. + ld %2,a + ld a,%3 + add a,%4 +} + +replace restart { + ld %1,a + ld a,%2 + add a,%1 + ld %1,a +} by { + ; peephole 42 removed loads by exploiting commutativity of addition. + add a,%2 + ld %1,a +} if notVolatile(%1) + +// sdcc does not use the H flag. sla resets it, while add sets it. +// To ensure that the state of the H flag is not changed by this +// peephole uncomment the add %3, %4 at the end (since it overwrite the H flag). +replace restart { + ld %1, a + sla %1 + ld a, %2 + //add %3, %4 +} by { + add a, a + ; peephole 42a shifts in accumulator insted of %1 + ld %1, a + ld a, %2 + //add %3, %4 +} + +replace restart { + ld %1,a + ld a,%2 + add a,%1 +} by { + ld %1, a + ; peephole 43 removed load by exploiting commutativity of addition. + add a,%2 +} + +replace restart { + or a,%1 + jp NZ,%2 + xor a,a + or a,%3 +} by { + or a,%1 + jp NZ,%2 + ; peephole 44 removed redundant zeroing of a (which has just been tested to be #0x00). + or a,%3 +} + +replace restart { + or a,%1 + jp NZ,%2 + ld %3,#0x00 +} by { + or a,%1 + jp NZ,%2 + ld %3,a + ; peephole 45 replaced constant #0x00 by a (which has just been tested to be #0x00). +} + +replace restart { + and a,%1 + jp NZ,%2 + ld %3,#0x00 +} by { + and a,%1 + jp NZ,%2 + ld %3,a + ; peephole 46 replaced constant #0x00 by a (which has just been tested to be #0x00). +} + +replace restart { + sub a,%1 + jp NZ,%2 + ld %3,#0x00 +} by { + sub a,%1 + jp NZ,%2 + ld %3,a + ; peephole 47 replaced constant #0x00 by a (which has just been tested to be #0x00). +} + +replace restart { + dec a + jp NZ,%1 + ld %2,#0x00 +} by { + dec a + jp NZ,%1 + ld %2,a + ; peephole 48 replaced constant #0x00 by a (which has just been tested to be #0x00). +} + +replace restart { + or a,%1 + jp NZ,%2 + ld a,%3 + or a,a +} by { + or a,%1 + jp NZ,%2 + or a,%3 + ; peephole 49 shortened or using a (which has just been tested to be #0x00). +} + +replace restart { + and a,%1 + jp NZ,%2 + ld a,%3 + or a,a +} by { + and a,%1 + jp NZ,%2 + or a,%3 + ; peephole 50 shortened or using a (which has just been tested to be #0x00). +} + +replace restart { + sub a,%1 + jp NZ,%2 + ld a,%3 + or a,a +} by { + sub a,%1 + jp NZ,%2 + or a,%3 + ; peephole 51 shortened or using a (which has just been tested to be #0x00). +} + +replace restart { + dec a + jp NZ,%1 + ld a,%2 + or a,a +} by { + dec a + jp NZ,%1 + or a,%2 + ; peephole 52 shortened or using a (which has just been tested to be #0x00). +} + +replace restart { + or a,%1 + jp NZ,%2 + push %3 + ld %4,#0x00 +} by { + or a,%1 + jp NZ,%2 + push %3 + ld %4,a + ; peephole 53 replaced constant #0x00 by a (which has just been tested to be #0x00). +} + +replace restart { + and a,%1 + jp NZ,%2 + push %3 + ld %4,#0x00 +} by { + sub a,%1 + jp NZ,%2 + push %3 + ld %4,a + ; peephole 54 replaced constant #0x00 by a (which has just been tested to be #0x00). +} + +replace restart { + sub a,%1 + jp NZ,%2 + push %3 + ld %4,#0x00 +} by { + sub a,%1 + jp NZ,%2 + push %3 + ld %4,a + ; peephole 55 replaced constant #0x00 by a (which has just been tested to be #0x00). +} + +replace restart { + dec a + jp NZ,%1 + push %2 + ld %3,#0x00 +} by { + dec a + jp NZ,%1 + push %2 + ld %3,a + ; peephole 56 replaced constant #0x00 by a (which has just been tested to be #0x00). +} + +replace restart { + ld de,#%1 + %2 + inc de + inc de + inc de +} by { + ld de,#%1 + %2 + 3 + ; peephole 57 moved triple increment of de to constant. +} + +replace restart { + ld de,#%1 + %2 + inc de + inc de +} by { + ld de,#%1 + %2 + 2 + ; peephole 58 moved double increment of de to constant. +} + +replace restart { + ld de,#%1 + %2 + inc de +} by { + ld de,#%1 + %2 + 1 + ; peephole 59 moved increment of de to constant. +} + +replace restart { + ld bc,#%1 + %2 + inc bc + inc bc + inc bc +} by { + ld bc,#%1 + %2 + 3 + ; peephole 60 moved triple increment of bc to constant. +} + +replace restart { + ld bc,#%1 + %2 + inc bc + inc bc +} by { + ld bc,#%1 + %2 + 2 + ; peephole 61 moved double increment of bc to constant. +} + +replace restart { + ld bc,#%1 + %2 + inc bc +} by { + ld bc,#%1 + %2 + 1 + ; peephole 62 moved increment of bc to constant. +} + +replace restart { + ld bc,#%1 + ld a,c + add a,#0x%2 + ld c,a + ld a,b + adc a,#0x%3 + ld b,a +} by { + ld bc,#%1 + 0x%3%2 + ; peephole 63 moved addition of constant 0x%3%2 to bc to constant. +} + +replace restart { + ld bc,#%1 + %4 + ld a,c + add a,#0x%2 + ld c,a + ld a,b + adc a,#0x%3 + ld b,a +} by { + ld bc,#%1 + %4 + 0x%3%2 + ; peephole 64 moved addition of constant 0x%3%2 to bc to constant. +} + +replace restart { + call %1 + ret +} by { + jp %1 + ; peephole 65 replaced call at end of function by jump. +} + +// Callee saves ix. +replace restart { + call %1 + pop ix + ret +} by { + pop ix + jp %1 + ; peephole 66 replaced call at end of function by jump moving call beyond pop ix. +} + +// Old gbz80 rules from here onward + +replace { + ld (hl),a + dec hl +} by { + ld (hl-),a +} +replace { + ld (hl),a + inc hl +} by { + ld (hl+),a +} +replace { + ld a,(hl) + inc hl +} by { + ld a,(hl+) +} +replace { + ld a,[hl] + inc hl +} by { + ld a,[hl+] +} +replace { + ld a,[hl] + inc hl +} by { + ld a,[hl+] +} +replace { + ld [hl],a + inc hl +} by { + ld [hl+],a +} +replace { + ld [hl],a + dec hl +} by { + ld [hl-],a +} +replace { + ld (hl+),a + ld (hl),d + dec hl + ld e,(hl) + inc hl + ld d,(hl) + ld a,(de) +} by { + ld (hl+),a + ld (hl),d + ld e,a + ld a,(de) +} +replace { + ld (hl),a + ld %1,(hl) +} by { + ld (hl),a + ld %1,a +} +replace { + ld (hl),a + inc de + ld a,(de) + inc hl +} by { + ld (hl+),a + inc de + ld a,(de) +} diff --git a/src/z80/peeph-z80.def b/src/z80/peeph-z80.def new file mode 100644 index 0000000..6d43c9b --- /dev/null +++ b/src/z80/peeph-z80.def @@ -0,0 +1,1549 @@ +// peeph.def - Common Z80 and gbz80 peephole rules +// +// These peepholes could be potentially moved to peeph.def, but a GBZ80 expert +// Should have a look at them before. +// +// (c) Philipp Klaus Krause (pkk@spth.de, philipp@colecovision.eu) 2006 - 2008 +// +// This program is free software; you can redistribute it and/or modify it +// under the terms of the GNU General Public License as published by the +// Free Software Foundation; either version 2, or (at your option) any +// later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +replace restart { + ld %1,%1 +} by { + ; peephole -1 removed redundant load. +} if notVolatile(%1) + +// This one doesn't work currently since the peephole optimizer can't match lines generated by multiline macros: Bug #1570701 +//replace restart { +// pop af +// ld sp,%1 +//} by { +// ; peephole -1a eleminated dead pop. +// ld sp,%1 +//} if notUsed('a') + +replace restart { + ld %1,%2 +} by { + ; peephole 0a removed dead load from %2 into %1. +} if notVolatile(%1), notUsed(%1) +// Should probably check for notVolatile(%2), too, but gives many false positives and no regression tests fail. + +replace restart { + ld %1,%2 + ld a,%1 +} by { + ; peephole 0b loaded %2 into a directly instead of going through %1. + ld a,%2 +} if notVolatile(%1), notUsed(%1) + +replace restart { + ld %1,%2 (%3) + ld a,%1 +} by { + ; peephole 0c loaded %2 (%3) into a directly instead of going through %1. + ld a,%2 (%3) +} if notVolatile(%1), notUsed(%1) + +replace restart { + ld %1,#%2 + ld a,%3 (%1) +} by { + ; peephole 0d loaded %2 into a directly instead of going through %1. + ld a,(#%2+%3) +} if notUsed(%1) + +replace restart { + srl %1 + ld a,%1 +} by { + ld a,%1 + ; peephole 0e shifted in a instead of %1. + srl a +} if notVolatile(%1), notUsed(%1) + +replace restart { + ld %1,(hl) + ld a,%2 (%3) + sub a,%1 +} by { + ld a,%2 (%3) + ; peephole 0f used (hl) in sub directly instead of going through %1. + sub a,(hl) +} if notVolatile(%1), notUsed(%1) + +replace restart { + inc bc + ld l,c + ld h,b +} by { + ld l,c + ld h,b + ; peephole 0g incremented in hl instead of bc. + inc hl +} if notUsed('bc') + +// Catch double and triple incs before later peepholes introduce an ex de,hl in here. +replace restart { + inc de + inc de + ld l,e + ld h,d +} by { + ld l,e + ld h,d + ; peephole 0h' incremented in hl instead of de. + inc hl + inc hl +} if notUsed('de') + +replace restart { + inc de + ld l,e + ld h,d +} by { + ld l,e + ld h,d + ; peephole 0h incremented in hl instead of de. + inc hl +} if notUsed('de') + +replace restart { + ld e,%1 + ld d,%2 + ld l,e + ld h,d +} by { + ; peephole 0i loaded %2%1 into hl directly instead of going through de. + ld l,%1 + ld h,%2 +} if notUsed('de') + +replace restart { + ld bc,#%2 + %3 + ld a,(bc) + ld c,a +} by { + ; peephole 0j used hl for #%2 + %3 instead of bc, not going through a. + ld hl,#%2 + %3 + ld c,(hl) +} if notUsed('a'), notUsed('hl') + +replace restart { + ld de,#%2 + %3 + ld a,(de) + ld e,a +} by { + ; peephole 0j' used hl for #%2 + %3 instead of de, not going through a. + ld hl,#%2 + %3 + ld e,(hl) +} if notUsed('a'), notUsed('hl') + +replace restart { + ex de,hl + push hl +} by { + ; peephole 0k pushed de directly instead of going through hl. + push de +} if notUsed('de'), notUsed('hl') + +replace restart { + ex de,hl + push de +} by { + ; peephole 0k' pushed hl directly instead of going through de. + push hl +} if notUsed('de'), notUsed('hl') + +replace restart { + ld l,%1 + ld h,d + push hl +} by { + ; peephole 0k'' pushed de instead of hl removing a load. + ld e,%1 + push de +} if notUsed('hl'), notUsed('e') + +replace restart { + ex de,hl + push bc + push de +} by { + ; peephole 0l pushed hl directly instead of going through de. + push bc + push hl +} if notUsed('de'), notUsed('hl') + +replace restart { + ld l,c + ld h,b + push hl +} by { + ; peephole 0m pushed bc directly instead of going through hl. + push bc +} if notUsed('hl') + +replace restart { + ld l,%1 + ld h,b + push hl +} by { + ; peephole 0m' pushed bc instead of hl removing a load. + ld c,%1 + push bc +} if notUsed('hl'), notUsed('c') + +replace restart { + ld c,a + push de + ld a,c +} by { + ; peephole 0n removed redundant load of a through c. + push de +} if notUsed('c') + +replace restart { + ld c,e + ld b,d + ld a,(bc) +} by { + ; peephole 0o used de directly instead of going through bc. + ld a,(de) +} if notUsed('bc') + +replace restart { + pop de + ld l,e + ld h,d +} by { + ; peephole 0p popped hl directly instead of going through de. + pop hl +} if notUsed('de') + +replace restart { + ld %1,a + ld %2 (%3),%1 +} by { + ; peephole 0q loaded a into %2 (%3) directly instead of going through %1. + ld %2 (%3),a +} if notVolatile(%1), notUsed(%1) + +replace restart { + ld %1 (ix),%2 + ld %3, %1 (ix) +} by { + ; peephole 0r loaded %3 from %2 instead of going through %1 (ix). + ld %1 (ix),%2 + ld %3, %2 +} +// Don't need to check for volatile, since ix is used for the stack. + +replace restart { + ld %1, %2 (%3) + ld b, %1 +} by { + ; peephole 0s loaded b from %2 (%3) instead of going through %1. + ld b, %2 (%3) +} if notVolatile(%1), notUsed(%1) + +replace restart { + ld %1,a + ld %2,%3 + ld %4,%1 +} by { + ; peephole 0t loaded %4 from a instead of going through %1. + ld %1,a + ld %2,%3 + ld %4,a +} if notVolatile(%1), operandsNotRelated(%1 %3), operandsNotRelated(%1 %2) + +replace restart { + ld %1,a + ld a,%2 + adc a,#%3 + ld %4,%1 +} by { + ld %1,a + ; peephole 0t' loaded %4 from a instead of going through %1. + ld %4,a + ld a,%2 + adc a,#%3 +} if notVolatile(%1), operandsNotRelated(%1 %2), operandsNotRelated(%4 %2) + +replace restart { + ld %1,a + ld a,#%2 + adc a,#%3 + ld %4,%1 +} by { + ld %1,a + ; peephole 0t'' loaded %4 from a instead of going through %1. + ld %4,a + ld a,#%2 + adc a,#%3 +} if notVolatile(%1) + +replace restart { + ld %1,(hl) + ld e,%1 +} by { + ; peephole 0u loaded e from (hl) instead of going through %1. + ld e,(hl) +} if notUsed(%1) + +replace restart { + ld %1,l + ld %2 (%3),%1 +} by { + ; peephole 0v loaded %2 (%3) from l instead of going through %1. + ld %2 (%3),l +} if notUsed(%1) + +replace restart { + ld l,%1 (ix) + ld h,%2 (ix) + ld %3,(hl) + srl %3 + ld l,%1 (ix) + ld h,%2 (ix) + ld (hl),%3 +} by { + ld l,%1 (ix) + ld h,%2 (ix) + ; peephole 0w shifted (hl) in place. + srl (hl) + ld %3,(hl) +} if notVolatile(%3) +// Don't check for volatile since ix points to the stack. + +replace restart { + push af + inc sp + ld a,e + push af + inc sp +} by { + ; peephole 0x pushed de instead of pushing a twice. + ld d,a + push de +} if notUsed('d'), notUsed('a') + +replace restart { + push af + inc sp + ld a,c + push af + inc sp +} by { + ; peephole 0y pushed bc instead of pushing a twice. + ld b,a + push bc +} if notUsed('b'), notUsed('a') + +replace restart { + ld a,#%1 + ld d,a +} by { + ; peephole 0z loaded #%1 into d directly instead of going through a. + ld d,#%1 +} if notUsed('a') + +replace restart { + ld a,%1 (ix) + push af + inc sp + ld a,%2 (ix) + push af + inc sp +} by { + ; peephole 0za pushed %1 (ix), %2(ix) through hl instead of af. + ld h,%1 (ix) + ld l,%2 (ix) + push hl +} if notUsed('a'), notUsed('hl') + +replace restart { + ld c,l + ld b,h + push bc +} by { + ; peephole 0zb pushed hl instead of bc. + push hl +} if notUsed('bc') + +// Doesn'T work due to bug #1947081 +//replace restart { +// pop %1 +// push %1 +//} by { +// ; peephole 0zc eleminated dead pop/push pair. +//} if notUsed(%1) + +replace restart { + ld iy,#%1 + or a,%2 (iy) +} by { + ; peephole 0zd used hl instead of iy. + ld hl,#%1 + %2 + or a,(hl) +} if notUsed('iy'), notUsed('hl') + +replace restart { + ld iy,#%1 + ld %2,%3 (%4) +} by { + ; peephole 0ze used hl instead of iy. + ld hl,#%1 + %3 + ld %2,(hl) +} if notUsed('iy'), notUsed('hl') + +replace restart { + ld iy,#%1 + ld %2 (%3), %4 +} by { + ; peephole 0zf used hl instead of iy. + ld hl,#%1 + %2 + ld (hl), %4 +} if notUsed('iy'), notUsed('hl'), operandsNotRelated(%4 'h'), operandsNotRelated(%4 'l') + +replace restart { + ld e,l + ld d,h + ld %1,(de) +} by { + ; peephole 0zg loaded %1 from (hl) directly instead of going through (de). + ld %1,(hl) +} if notUsed('de') + +replace restart { + ld c,l + ld b,h + ld %1,(bc) +} by { + ; peephole 0zh loaded %1 from (hl) directly instead of going through (bc). + ld %1,(hl) +} if notUsed('bc') + +replace restart { + ld c,l + ld b,h + inc bc +} by { + ; peephole 0zi incremented in hl instead of bc. + inc hl + ld c,l + ld b,h +} if notUsed('hl') + +replace restart { + ld a,%1 (%2) + bit %3,a +} by { + ; peephole 0zj tested bit of %1 (%2) directly instead of going through a. + bit %3,%1 (%2) +} if notUsed('a') + +replace restart { + ld bc, #%1 + %2 + ld l,c + ld h,b +} by { + ; peephole 0zk stored constant #%1 + %2 into hl directly instead of going through bc. + ld hl, #%1 + %2 +} if notUsed('bc') + +replace restart { + ld c, %1 (%2) + ld b, %3 (%4) + ld l,c + ld h,b +} by { + ; peephole 0zk' stored %1 (%2) %3 (%4) into hl directly instead of going through bc. + ld l, %1 (%2) + ld h, %3 (%4) +} if notUsed('bc') + +replace restart { + jp NC,%1 + jp %2 +%1: +} by { + jp C,%2 + ; peephole 3 removed jp by using inverse jump logic +%1: +} if labelRefCountChange(%1 -1) + +replace restart { + jp C,%1 + jp %2 +%1: +} by { + jp NC,%2 + ; peephole 4 removed jp by using inverse jump logic +%1: +} if labelRefCountChange(%1 -1) + +replace restart { + jp NZ,%1 + jp %2 +%1: +} by { + jp Z,%2 + ; peephole 5 removed jp by using inverse jump logic +%1: +} if labelRefCountChange(%1 -1) + +replace restart { + jp Z,%1 + jp %2 +%1: +} by { + jp NZ,%2 + ; peephole 6 removed jp by using inverse jump logic +%1: +} if labelRefCountChange(%1 -1) + +replace restart { + jp %5 +} by { + jp %6 + ; peephole 7 redirected jump-to-jump at %5 by jump to %6 +} if labelIsUncondJump(), labelRefCountChange(%5 -1), labelRefCountChange(%6 +1) + +replace restart { + jp %1,%5 +} by { + jp %1,%6 + ; peephole 8 redirected jump-to-jump at %5 by jump to %6 +} if labelIsUncondJump(), labelRefCountChange(%5 -1), labelRefCountChange(%6 +1) + +replace restart { + xor a,a + ld a,#0x00 +} by { + xor a,a + ; peephole 10 removed redundant load of 0 into a. +} + +replace { + ld e,#0x%1 + ld d,#0x%2 +} by { + ld de,#0x%2%1 + ; peephole 11 combined constant loads into register pair. +} + +replace { + ld l,#0x%1 + ld h,#0x%2 +} by { + ld hl,#0x%2%1 + ; peephole 12 combined constant loads into register pair. +} + +replace { + ld c,#0x%1 + ld b,#0x%2 +} by { + ld bc,#0x%2%1 + ; peephole 13 combined constant loads into register pair. +} + +replace restart { + ld %1,a + ld a,%1 +} by { + ld %1,a + ; peephole 14 removed redundant load from %1 into a. +} if notVolatile(%1) +// This gives many false negatives and without the test no problems are encountered in the regression tests +// Maybe we can try this after 2.7.0 release + +replace restart { + ld a,%1 + ld %1,a +} by { + ld a,%1 + ; peephole 15 removed redundant load from a into %1. +} if notVolatile(%1) +// This gives many false negatives and without the test no problems are encountered in the regression tests +// Maybe we can try this after 2.7.0 release + +replace restart { + ld %1,a + ld a,%2 + or a,%1 +} by { + ld %1,a + or a,%2 + ; peephole 17a removed load by reordering or arguments. +} if notVolatile(%1) + +replace restart { + ld %1,a + ld a,%2 (ix) + or a,%1 +} by { + ld %1,a + or a,%2 (ix) + ; peephole 17b removed load by reordering or arguments. +} if notVolatile(%1) + +replace restart { + ld %1,a + xor a,a + or a,%1 +} by { + ld %1,a + or a,a + ; peephole 18 used value still in a instead of loading it from %1. +} + +replace restart { + or a,%1 + or a,a +} by { + or a,%1 + ; peephole 19 removed redundant or after or. +} + +replace restart { + or a,%1 (%2) + or a,a +} by { + or a,%1 (%2) + ; peephole 19a removed redundant or after or. +} + +replace restart { + and a,%1 + or a,a +} by { + and a,%1 + ; peephole 20 removed redundant or after and. +} + +replace restart { + and a,%1 (%2) + or a,a +} by { + and a,%1 (%2) + ; peephole 20a removed redundant or after and. +} + +replace restart { + xor a,%1 + or a,a +} by { + xor a,%1 + ; peephole 21 removed redundant or after xor. +} + +replace restart { + xor a,%1 (%2) + or a,a +} by { + xor a,%1 (%2) + ; peephole 21a removed redundant or after xor. +} + +replace { + ld %1,%2 + ld a,%2 +} by { + ld a,%2 + ld %1,a + ; peephole 23 load value in a first and use it next +} if notVolatile(%1 %2) + +replace restart { + ld %1,%2 + ld %3,%4 + ld %2,%1 + ld %4,%3 +} by { + ld %1,%2 + ld %3,%4 + ; peephole 24 removed redundant load from %3%1 into %4%2 +} if notVolatile(%1 %2 %3 %4) + +replace restart { + ld a,c + push af + inc sp + ld a,#%2 + push af + inc sp + call %3 +} by { + ld b,c + ld c,#%2 + push bc + ; peephole 31 moved and pushed arguments c and #%2 through bc instead of pushing them individually. + call %3 +} + +replace restart { + ld a,e + push af + inc sp + ld a,#%2 + push af + inc sp + call %3 +} by { + ld d,e + ld e,#%2 + push de + ; peephole 32 moved and pushed arguments e and #%2 through de instead of pushing them individually. + call %3 +} + +replace restart { + ld a,%1 + sub a,%2 + jp %3,%4 + ld a,%1 +} by { + ld a,%1 + cp a,%2 + jp %3,%4 + ; peephole 33 removed load by replacing sub with cp + assert a=%1 +} if notVolatile(%1) + +replace restart { + assert a=%1 + sub a,%2 + jp %3,%4 + ld a,%1 +} by { + cp a,#%2 + jp %3,%4 + ; peephole 34 removed load by replacing sub with cp + assert a=%1 +} + +replace restart { + assert a=%1 +} by { +} + +replace restart { + sub a,#0xFF + jp Z,%1 +} by { + inc a + ; peephole 35 replaced sub a,#0xFF by inc a. + jp Z,%1 +} + +replace restart { + sub a,#0xFF + jp NZ,%1 +} by { + inc a + ; peephole 36 replaced sub a,#0xFF by inc a. + jp NZ,%1 +} + +replace restart { + ld bc,#%1 + %2 + ld a,c + add a,%3 + ld c,a + ld a,b + adc a,%4 + ld b,a +} by { + ld a,#<(%1 + %2) + add a,%3 + ld c,a + ld a,#>(%1 + %2) + ; peephole 37 directly used (%1 + %2) in calculation instead of placing it in bc first. + adc a,%4 + ld b,a +} + +replace restart { + ld de,#%1 + %2 + ld a,e + add a,%3 + ld e,a + ld a,d + adc a,%4 + ld d,a +} by { + ld a,#<(%1 + %2) + add a,%3 + ld e,a + ld a,#>(%1 + %2) + ; peephole 38 directly used (%1 + %2) in calculation instead of placing it in de first. + adc a,%4 + ld d,a +} + +replace restart { + rlca + ld a,#0x00 + rla +} by { + rlca + and a,#0x01 + ; peephole 39 replaced zero load, rla by and since rlca writes the same value to carry bit and least significant bit. +} + +replace restart { + ld %1,%2 + push %1 + pop %4 + ld %1,%3 +} by { + ld %4,%2 + ; peephole 40 moved %2 directly into de instead of going through %1. + ld %1,%3 +} + +replace restart { + add a,#0x00 + ld %2,a + ld a,%3 + adc a,%4 +} by { + ; peephole 41 removed lower part of multibyte addition. + ld %2,a + ld a,%3 + add a,%4 +} + +replace restart { + ld %1,a + ld a,%2 + add a,%1 +} by { + ; peephole 42 removed loads by exploiting commutativity of addition. + add a,%2 +} if notVolatile(%1), notUsed(%1), operandsNotRelated(%2 '(bc)' '(de)') + +replace restart { + ld %1 (ix),a + ld a,#%2 + add a,%1 (ix) +} by { + ld %1 (ix),a + ; peephole 42a removed loads by exploiting commutativity of addition. + add a,#%2 +} +// Don't need to check for volatile, since ix is used to access the stack. + +// sdcc does not use the H flag. sla resets it, while add sets it. +// To ensure that the state of the H flag is not changed by this +// peephole uncomment the add %3, %4 at the end (since it overwrite the H flag). +replace restart { + ld %1, a + sla %1 + ld a, %2 + //add %3, %4 +} by { + add a, a + ; peephole 42b shifted in accumulator insted of %1 + ld %1, a + ld a, %2 + //add %3, %4 +} + +// sdcc does not use the H flag. sla resets it, while add sets it. +// To ensure that the state of the H flag is not changed by this +// peephole uncomment the add %3, %4 at the end (since it overwrite the H flag). +replace restart { + ld %1, a + sla %1 + sla %1 + ld a, %2 + //add %3, %4 +} by { + add a, a + add a, a + ; peephole 42b' shifted in accumulator insted of %1 + ld %1, a + ld a, %2 + //add %3, %4 +} + +replace restart { + ld l,%1 (ix) + ld h,%2 (ix) + ld a,(hl) + inc a + ld l,%1 (ix) + ld h,%2 (ix) + ld (hl),a +} by { + ld l,%1 (ix) + ld h,%2 (ix) + inc (hl) + ; peephole 42c incremented in (hl) instead of going through a. +} if notUsed('a') + +replace restart { + ld l,%1 (ix) + ld h,%2 (ix) + ld a,(hl) + dec a + ld l,%1 (ix) + ld h,%2 (ix) + ld (hl),a +} by { + ld l,%1 (ix) + ld h,%2 (ix) + dec (hl) + ; peephole 42d decremented in (hl) instead of going through a. +} if notUsed('a') + +replace restart { + ld %1,a + ld a,%2 + add a,%1 +} by { + ld %1, a + ; peephole 43 removed load by exploiting commutativity of addition. + add a,%2 +} if operandsNotRelated(%2 '(bc)' '(de)') + +replace restart { + ld c,l + ld b,h + ld hl,#%1 + add hl,bc +} by { + ; peephole 43a removed loads by exploiting commutativity of addition. + ld bc,#%1 + add hl,bc +} if notUsed('bc') + +replace restart { + ld hl,#%1 + add hl,%2 + ld bc,#%4 + add hl,bc +} by { + ; peephole 43b removed loads by exploiting commutativity of addition. + ld hl,#%1 + %4 + add hl,%2 +} if notUsed('bc') + +replace restart { + ld c,e + ld b,d + ld hl,#%1 + add hl,bc +} by { + ; peephole 43c removed loads by exploiting commutativity of addition. + ld hl,#%1 + add hl,de +} if notUsed('bc') + +replace restart { + or a,%1 + jp NZ,%2 + xor a,a + or a,%3 +} by { + or a,%1 + jp NZ,%2 + ; peephole 44 removed redundant zeroing of a (which has just been tested to be #0x00). + or a,%3 +} + +replace restart { + or a,%1 + jp NZ,%2 + ld %3,#0x00 +} by { + or a,%1 + jp NZ,%2 + ld %3,a + ; peephole 45 replaced constant #0x00 by a (which has just been tested to be #0x00). +} + +replace restart { + and a,%1 + jp NZ,%2 + ld %3,#0x00 +} by { + and a,%1 + jp NZ,%2 + ld %3,a + ; peephole 46 replaced constant #0x00 by a (which has just been tested to be #0x00). +} + +replace restart { + sub a,%1 + jp NZ,%2 + ld %3,#0x00 +} by { + sub a,%1 + jp NZ,%2 + ld %3,a + ; peephole 47 replaced constant #0x00 by a (which has just been tested to be #0x00). +} + +replace restart { + dec a + jp NZ,%1 + ld %2,#0x00 +} by { + dec a + jp NZ,%1 + ld %2,a + ; peephole 48 replaced constant #0x00 by a (which has just been tested to be #0x00). +} + +//replace restart { +// or a,%1 +// jp NZ,%2 +// ld a,%3 +// or a,a +//} by { +// or a,%1 +// jp NZ,%2 +// or a,%3 +// ; peephole 49 shortened or using a (which has just been tested to be #0x00). +//} if operandsNotSame3(%3 '(bc)' '(de)') + +//replace restart { +// and a,%1 +// jp NZ,%2 +// ld a,%3 +// or a,a +//} by { +// and a,%1 +// jp NZ,%2 +// or a,%3 +// ; peephole 50 shortened or using a (which has just been tested to be #0x00). +//} if operandsNotSame3(%3 '(bc)' '(de)') + +// Commented out sine it triggers for %3 od the form (#...) +//replace restart { +// sub a,%1 +// jp NZ,%2 +// ld a,%3 +// or a,a +//} by { +// sub a,%1 +// jp NZ,%2 +// or a,%3 +// ; peephole 51 shortened or using a (which has just been tested to be #0x00). +//} +//if operandsNotSame3(%3 '(bc)' '(de)') + +replace restart { + dec a + jp NZ,%1 + ld a,%2 + or a,a +} by { + dec a + jp NZ,%1 + or a,%2 + ; peephole 52 shortened or using a (which has just been tested to be #0x00). +} +//if operandsNotSame3(%2 '(bc)' '(de)') + +replace restart { + or a,%1 + jp NZ,%2 + push %3 + ld %4,#0x00 +} by { + or a,%1 + jp NZ,%2 + push %3 + ld %4,a + ; peephole 53 replaced constant #0x00 by a (which has just been tested to be #0x00). +} + +replace restart { + and a,%1 + jp NZ,%2 + push %3 + ld %4,#0x00 +} by { + sub a,%1 + jp NZ,%2 + push %3 + ld %4,a + ; peephole 54 replaced constant #0x00 by a (which has just been tested to be #0x00). +} + +replace restart { + sub a,%1 + jp NZ,%2 + push %3 + ld %4,#0x00 +} by { + sub a,%1 + jp NZ,%2 + push %3 + ld %4,a + ; peephole 55 replaced constant #0x00 by a (which has just been tested to be #0x00). +} + +replace restart { + dec a + jp NZ,%1 + push %2 + ld %3,#0x00 +} by { + dec a + jp NZ,%1 + push %2 + ld %3,a + ; peephole 56 replaced constant #0x00 by a (which has just been tested to be #0x00). +} + +replace restart { + ld de,#%1 + %2 + inc de +} by { + ld de,#%1 + %2+1 + ; peephole 59 moved increment of de to constant. +} + +replace restart { + ld bc,#%1 + %2 + inc bc +} by { + ld bc,#%1 + %2+1 + ; peephole 62 moved increment of bc to constant. +} + +replace restart { + ld bc,#%1 + ld a,c + add a,#0x%2 + ld c,a + ld a,b + adc a,#0x%3 + ld b,a +} by { + ld bc,#%1 + 0x%3%2 + ; peephole 63 moved addition of constant 0x%3%2 to bc to constant. +} + +replace restart { + call %1 + ret +} by { + jp %1 + ; peephole 65 replaced call at end of function by jump. +} + +// Callee saves ix. +replace restart { + call %1 + pop ix + ret +} by { + pop ix + jp %1 + ; peephole 66 replaced call at end of function by jump moving call beyond pop ix. +} + +replace restart { + ld %1,a + ld %2,%1 + ld %3,%1 +} by { + ; peephole 67 loaded %2, %3 from a instead of %1. + ld %1,a + ld %2,a + ld %3,a +} if notVolatile(%1) + +replace restart { + ld %1,a + ld %2,a + ld %3,%1 +} by { + ld %1,a + ld %2,a + ; peephole 68 loaded %3 from a instead of %1. + ld %3,a +} if notVolatile(%1) + +replace restart { + ld %1,l + xor a,a + or a,%1 +} by { + ld %1,l + xor a,a + ; peephole 69 used l in or instead of %1. + or a,l +} if notVolatile(%1) + +replace restart { + ld %1,#%2 + ld %3,%4 + ld %1,#%2 +} by { + ld %1,#%2 + ld %3,%4 + ; peephole 70 removed load of #%2 into %1 since it's still there. +} if notVolatile(%1), operandsNotRelated(%3 %1) + +replace restart { + ld hl,#%1 + ld de,#%1 +} by { + ; peephole 70a used #%1 from hl for load into de. + ld hl,#%1 + ld e,l + ld d,h +} + +replace restart { + ld hl,#%1 + push hl + ld l,e + ld h,d + jp (hl) +%1: +} by { + ; peephole 71 used ex to get de into hl. + ex de,hl + ld de,#%1 + push de + jp (hl) +%1: +} +// Lets' hope this is never applied to a jump table. It's fine for calls. + +// Should be after 0z. +replace restart { + ld %1 (ix),l + ld %2 (ix),h + ld %3,%1 (ix) + ld %4,%2 (ix) +} by { + ld %1 (ix),l + ld %2 (ix),h + ; peephole 72 used hl instead of %2 (ix), %1 (ix) to load %4%3. + ld %3,l + ld %4,h +} if operandsNotRelated('h' %3) +// Don't check for volatile since ix points to the stack. + +replace restart { + ld %1, a + ld a, %2 (%3) + adc a, #%4 + ld l, %1 +} by { + ld l, a + ld a, %2 (%3) + adc a, #%4 + ; peephole 76 loaded l from a directly instead of going through %1. +} if notUsed(%1) + +replace restart { + ld %1, a + ld a, #%2 + adc a, #%3 + ld l, %1 +} by { + ld l, a + ld a, #%2 + adc a, #%3 + ; peephole 77 loaded l from a directly instead of going through %1. +} if notUsed(%1) + +replace restart { + ld hl, #%1 + add hl, %2 + ex de, hl + ld hl, #%3 + add hl, de +} by { + ld hl, #%1+%3 + add hl, %2 + ; peephole 78 removed addition and loads exploiting commutativity of addition. +} if notUsed('de') + +replace restart { + ex de, hl + ld hl, #%1 + add hl, de +} by { + ; peephole 78a removed ex exploiting commutativity of addition. + ld de, #%1 + add hl, de +} if notUsed('de') + +replace restart { + ld hl, #%1 + add hl, %2 + ex de, hl + inc de +} by { + ld hl, #%1+1 + ; peephole 79 moved increment to constant. + add hl, %2 + ex de, hl +} if notUsed('hl') + +// These ex-generating rules should be among the last ones since ex counts as a read from both hl and de for notUsed(). +replace restart { + ld d,h + ld e,l +} by { + ; peephole 80 used ex to load hl into de. + ex de,hl +} if notUsed('hl') + +replace restart { + ld e,l + ld d,h +} by { + ; peephole 81 used ex to load hl into de. + ex de,hl +} if notUsed('hl') + +replace restart { + ld l,e + ld h,d +} by { + ; peephole 82 used ex to load de into hl. + ex de,hl +} if notUsed('de') + +// peeph-z80.def - Z80 peephole rules +// +// +// (c) Philipp Klaus Krause (pkk@spth.de, philipp@colecovision.eu) 2006 - 2007 +// +// This program is free software; you can redistribute it and/or modify it +// under the terms of the GNU General Public License as published by the +// Free Software Foundation; either version 2, or (at your option) any +// later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +replace restart { + ld %1,#%2 + ld a,%3 (%1) + ld %4,a + ld %1,#%5 +} by { + ld a,(#%2 + %3) + ; peephole z1 used #%2 directly instead of going through %1 using indirect addressing. + ld %4,a + ld %1,#%5 +} + +replace restart { + ld %1,#%2 + ld %3 (%1),a +%4: + ld %1,%5 +} by { + ld (#%2 + %3),a + ; peephole z2 directly used #%2 instead of going through %1 using indirect addressing. +%4: + ld %1,%5 +} + +replace restart { + pop af + ld %1,#%2 + ld %3 (%1),%4 + ld %1,#%5 +} by { + ld a,%4 + ld (#%2 + %3),a + ; peephole z3 used #%2 directly instead of going through %1 using indirect addressing. + pop af + ld %1,#%5 +} if operandsNotRelated(%3 'a') + +replace restart { + ld bc,#%1 + %2 + ld a,%3 + ld (bc),a +} by { + ld a,%3 + ld (#%1 + %2),a + ; peephole z4 directly used address #%1 + %2 instead of placing it in bc first. +} if notUsed('bc') + +replace restart { + ld bc,#%1 + %2 + %6 + ld a,%3 + ld (bc),a +} by { + ld a,%3 + ld (#%1 + %2 + %6),a + ; peephole z5 directly used address #%1 + %2 + %6 instead of placing it in bc first. +} if notUsed('bc') + +replace restart { + ld c,%1 + ld l,c + ret +} by { + ld l,%1 + ; peephole z8 moved %1 directly into l instead of going through c. + ret +} + +replace restart { + ld b,h + ld c,l + pop af + push bc + call %1 +} by { + ex (sp),hl + ; peephole z9 moved hl directly to the stack instead of going through bc. + call %1 +} + +replace restart { + ld d,h + ld e,l + pop af + push de + call %1 +} by { + ex (sp),hl + ; peephole z10 moved hl directly to the stack instead of going through de. + call %1 +} + +replace restart { + jp %5 +} by { + ret + ; peephole z11 replaced jump by return. +} if labelIsReturnOnly(), labelRefCountChange(%5 -1) + +replace restart { + jp %1,%5 +} by { + ret %1 + ; peephole z11a replaced jump by return. +} if labelIsReturnOnly(), labelRefCountChange(%5 -1) + +// Should be one of the last ones. Opens the code to further peephole optimization. +replace restart { +%1: +} by { + ; peephole z12 removed unused label %1. +} if labelRefCount(%1 0) + +// Applying z11 or z11a followed by z12 will often leave a dead ret at the end of the function. Remove it. +replace { + jp %5 + ret +} by { + jp %5 + ; peephole z13 removed unused ret. +} + +// These four need two be here since the peephole optimizer continues to apply rules further down the file even for replace restart rules. +replace restart { + jp NC,%1 + jp %2 +%1: +} by { + jp C,%2 + ; peephole 5' removed jp by using inverse jump logic +%1: +} if labelRefCountChange(%1 -1) + +replace restart { + jp C,%1 + jp %2 +%1: +} by { + jp NC,%2 + ; peephole 5' removed jp by using inverse jump logic +%1: +} if labelRefCountChange(%1 -1) + +replace restart { + jp NZ,%1 + jp %2 +%1: +} by { + jp Z,%2 + ; peephole 5' removed jp by using inverse jump logic +%1: +} if labelRefCountChange(%1 -1) + +replace restart { + jp Z,%1 + jp %2 +%1: +} by { + jp NZ,%2 + ; peephole 6' removed jp by using inverse jump logic +%1: +} if labelRefCountChange(%1 -1) + +// These should be the last rules, so that the peepholes above need to look at jp only. +replace { + jp %5 +} by { + jr %5 + ; peephole z14 changed absolute to relative unconditional jump. +} if labelInRange() + +replace { + jp Z,%5 +} by { + jr Z,%5 + ; peephole z15 changed absolute to relative conditional jump. +} if labelInRange() + +replace { + jp NZ,%5 +} by { + jr NZ,%5 + ; peephole z16 changed absolute to relative conditional jump. +} if labelInRange() + +replace { + jp C,%5 +} by { + jr C,%5 + ; peephole z17 changed absolute to relative conditional jump. +} if labelInRange() + +replace { + jp NC,%5 +} by { + jr NC,%5 + ; peephole z18 changed absolute to relative conditional jump. +} if labelInRange() diff --git a/src/z80/peeph.def b/src/z80/peeph.def new file mode 100644 index 0000000..365e553 --- /dev/null +++ b/src/z80/peeph.def @@ -0,0 +1,7 @@ +// peeph.def - Common Z80 and gbz80 peephole rules + +// This file should contain common Z80/GBZ80 peepholes. +// However the GBZ80 port is currently unmaintained; +// a GBZ80 expert could extract peepholes that are useful for both Z80 and GBZ80 +// from peeph-z80.def and peeph-gbz80.def and move them here. + diff --git a/src/z80/profile.txt b/src/z80/profile.txt new file mode 100644 index 0000000..7c05ec0 --- /dev/null +++ b/src/z80/profile.txt @@ -0,0 +1,163 @@ +-- 2 +0000 71 0.00 +_main 136829936 10.65 +_Proc_1 69267324 5.39 +_Proc_2 16514064 1.28 +_Proc_3 13368528 1.04 +_Proc_4 11009376 0.86 +_Proc_5 4914900 0.38 +_Proc_6 18840450 1.47 +_Func_1 13466826 1.05 +_Func_3 5308092 0.41 +_Proc_7 22313646 1.74 +_Proc_8 85060536 6.62 +_Func_2 32438340 2.52 +_strcpy 215318528 16.75 +__mulsint_rrf_s 118416324 9.21 +__divsint_rrf_s 67760088 5.27 +__rlulong_rrf_s 13056 0.00 +__divulong 52953 0.00 +_memcpy 172381926 13.41 +_strcmp 282016962 21.94 +; 1285291953 t-states + +-- 3 +0000 71 0.00 +_main 134339608 12.06 +_Proc_1 69267324 6.22 +_Proc_2 16514064 1.48 +_Proc_3 13368528 1.20 +_Proc_4 11009376 0.99 +_Proc_5 4914900 0.44 +_Proc_6 18840450 1.69 +_Func_1 13466826 1.21 +_Func_3 5308092 0.48 +_Proc_7 22313646 2.00 +_Proc_8 85060536 7.64 +_Func_2 32438340 2.91 +_strcpy 46497792 4.17 +__mulsint_rrf_s 118416324 10.63 +__divsint_rrf_s 67760088 6.08 +__rlulong_rrf_s 13056 0.00 +__divulong 53244 0.00 +_memcpy 172381926 15.47 +_strcmp 282016962 25.32 +; 1113981180 t-states + +-- 4 +0000 71 0.00 +_main 134298428 15.24 +_Proc_1 69267324 7.86 +_Proc_2 16514064 1.87 +_Proc_3 13368528 1.52 +_Proc_4 11009376 1.25 +_Proc_5 4914900 0.56 +_Proc_6 18840450 2.14 +_Func_1 13466826 1.53 +_Func_3 5308092 0.60 +_Proc_7 22313646 2.53 +_Proc_8 85060536 9.65 +_Func_2 32438340 3.68 +_strcpy 46497792 5.28 +__mulsint_rrf_s 118416324 13.44 +__divsint_rrf_s 67760088 7.69 +__rlulong_rrf_s 13056 0.00 +__divulong 53427 0.01 +_memcpy 102098856 11.59 +_strcmp 119497602 13.56 +; 881137753 t-states + +-- 6 +0000 71 0.00 +_main 133963467 16.01 +_Proc_1 69267324 8.28 +_Proc_2 16514064 1.97 +_Proc_3 13368528 1.60 +_Proc_4 11009376 1.32 +_Proc_5 4914900 0.59 +_Proc_6 18840450 2.25 +_Func_1 13466826 1.61 +_Func_3 5308092 0.63 +_Proc_7 22313646 2.67 +_Proc_8 84405216 10.09 +_Func_2 32438340 3.88 +_strcpy 46497792 5.56 +__mulsint_rrf_s 118416324 14.16 +__divsint_rrf_s 67760088 8.10 +__rlulong_rrf_s 13056 0.00 +__divulong 52549 0.01 +_memcpy 80800956 9.66 +_strcmp 97216722 11.62 +; 836567814 t-states + +-- 7 +0000 71 0.00 +_main 122822995 15.44 +_Proc_1 69889878 8.78 +_Proc_2 16514064 2.08 +_Proc_3 13368528 1.68 +_Proc_4 11009376 1.38 +_Proc_5 4914900 0.62 +_Proc_6 18840450 2.37 +_Func_1 13466826 1.69 +_Func_3 5308092 0.67 +_Proc_7 22313646 2.80 +_Proc_8 83553300 10.50 +_Func_2 32438340 4.08 +_strcpy 46497792 5.84 +__mulsint_rrf_s 88861392 11.17 +__divsint_rrf_s 67760088 8.52 +__rlulong_rrf_s 13056 0.00 +__divulong 72840 0.01 +_memcpy 80800956 10.16 +_strcmp 97216722 12.22 +; 795663339 t-states + +-- 8 +; Function total-ticks total-calls ticks-per-call total-percent +0000 71 0 0 0.00 +_main 122823011 1 122823011 15.45 +_Proc_1 69267324 32766 2114 8.71 +_Proc_2 16514064 32766 504 2.08 +_Proc_3 13368528 32766 408 1.68 +_Proc_4 11009376 32766 336 1.38 +_Proc_5 4914900 32766 150 0.62 +_Proc_6 18840450 32766 575 2.37 +_Func_1 13466826 98298 137 1.69 +_Func_3 5308092 32766 162 0.67 +_Proc_7 22313646 98298 227 2.81 +_Proc_8 83553300 32766 2550 10.51 +_Func_2 32438340 32766 990 4.08 +_strcpy 46497792 32768 1419 5.85 +__mulsint_rrf_s 88861392 98298 904 11.18 +__divsint_rrf_s 67760088 32766 2068 8.52 +__rlulong_rrf_s 13056 128 102 0.00 +__divulong 52549 2 26274 0.01 +_memcpy 80800956 32766 2466 10.16 +_strcmp 97216722 32766 2967 12.23 +; 795020510 t-states +; So the lib functions except mul, div etc take 28% of the time. + +-- 9 +; Function total-ticks total-calls ticks-per-call total-percent +0000 71 0 0 0.00 +_main 122864113 1 122864113 18.00 +_Proc_1 96102678 32766 2933 14.08 +_Proc_2 16514064 32766 504 2.42 +_Proc_3 13368528 32766 408 1.96 +_Proc_4 11009376 32766 336 1.61 +_Proc_5 4914900 32766 150 0.72 +_Proc_6 18840450 32766 575 2.76 +_Func_1 13466826 98298 137 1.97 +_Func_3 5308092 32766 162 0.78 +_Proc_7 22313646 98298 227 3.27 +_Proc_8 83553300 32766 2550 12.24 +_Func_2 32438340 32766 990 4.75 +_strcpy 46497792 32768 1419 6.81 +__mulsint_rrf_s 88861392 98298 904 13.02 +__divsint_rrf_s 67760088 32766 2068 9.93 +__rlulong_rrf_s 13056 128 102 0.00 +__divulong 52213 2 26106 0.01 +__memcpy_rrf_s 3702558 32766 113 0.54 +__strcmp_rrf_s 34830258 32766 1063 5.10 +; 682411768 t-states diff --git a/src/z80/ralloc.c b/src/z80/ralloc.c new file mode 100644 index 0000000..aebe825 --- /dev/null +++ b/src/z80/ralloc.c @@ -0,0 +1,3240 @@ +/** @name Z80 Register allocation functions. + @author Michael Hope + + Note: much of this is ripped straight from Sandeep's mcs51 code. + + This code maps the virtual symbols and code onto the real + hardware. It allocates based on usage and how long the varible + lives into registers or temporary memory on the stack. + + On the Z80 hl and ix and a are reserved for the code generator, + leaving bc and de for allocation. iy is unusable due to currently + as it's only adressable as a pair. The extra register pressure + from reserving hl is made up for by how much easier the sub + operations become. You could swap hl for iy if the undocumented + iyl/iyh instructions are available. + + The stack frame is the common ix-bp style. Basically: + + ix+4+n: param 1 + ix+4: param 0 + ix+2: return address + ix+0: calling functions ix + ix-n: local varibles + ... + sp: end of local varibles + + There is currently no support for bit spaces or banked functions. + + This program is free software; you can redistribute it and/or + modify it under the terms of the GNU General Public License as + published by the Free Software Foundation; either version 2, or (at + your option) any later version. This program is distributed in the + hope that it will be useful, but WITHOUT ANY WARRANTY; without even + the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR + PURPOSE. See the GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, + USA. In other words, you are welcome to use, share and improve + this program. You are forbidden to forbid anyone else to use, + share and improve what you give them. Help stamp out + software-hoarding! +*/ + +#include "z80.h" +#include "SDCCicode.h" + +/* Flags to turn off optimisations. + */ +enum + { + DISABLE_PACK_ACC = 0, + DISABLE_PACK_ASSIGN = 0, + DISABLE_PACK_ONE_USE = 0, + DISABLE_PACK_HL = 1, + DISABLE_PACK_IY = 0 + }; + +/* Flags to turn on debugging code. + */ +enum + { + D_ALLOC = 0, + D_ALLOC2 = 0, + D_ACCUSE2 = 0, + D_ACCUSE2_VERBOSE = 0, + D_HLUSE = 0, + D_HLUSE2 = 0, + D_HLUSE2_VERBOSE = 0, + D_FILL_GAPS = 0, + D_PACK_IY = 0, + D_PACK_HLUSE3 = 0 + }; + +#if 1 +#define D(_a, _s) if (_a) { printf _s; fflush(stdout); } +#else +#define D(_a, _s) +#endif + +#define DISABLE_PACKREGSFORSUPPORT 1 +#define DISABLE_PACKREGSFORACCUSE 1 + +extern void genZ80Code (iCode *); + +/** Local static variables */ +static struct +{ + bitVect *spiltSet; + set *stackSpil; + bitVect *regAssigned; + bitVect *totRegAssigned; /* final set of LRs that got into registers */ + short blockSpil; + int slocNum; + /* registers used in a function */ + bitVect *funcrUsed; + int stackExtend; + int dataExtend; + int nRegs; +} _G; + +static regs _gbz80_regs[] = +{ + {REG_GPR, C_IDX, "c", 1}, + {REG_GPR, B_IDX, "b", 1}, + {REG_CND, CND_IDX, "c", 1} +}; + +static regs _z80_regs[] = +{ + {REG_GPR, C_IDX, "c", 1}, + {REG_GPR, B_IDX, "b", 1}, + {REG_GPR, E_IDX, "e", 1}, + {REG_GPR, D_IDX, "d", 1}, + {REG_CND, CND_IDX, "c", 1} +}; + +regs *regsZ80; + +/** Number of usable registers (all but C) */ +#define Z80_MAX_REGS ((sizeof(_z80_regs)/sizeof(_z80_regs[0]))-1) +#define GBZ80_MAX_REGS ((sizeof(_gbz80_regs)/sizeof(_gbz80_regs[0]))-1) + +static void spillThis (symbol *); +static void freeAllRegs (); + +/** Allocates register of given type. + 'type' is not used on the z80 version. It was used to select + between pointer and general purpose registers on the mcs51 version. + + @return Pointer to the newly allocated register. + */ +static regs * +allocReg (short type) +{ + int i; + + for (i = 0; i < _G.nRegs; i++) + { + /* For now we allocate from any free */ + if (regsZ80[i].isFree) + { + regsZ80[i].isFree = 0; + if (currFunc) + { + currFunc->regsUsed = bitVectSetBit (currFunc->regsUsed, i); + } + D (D_ALLOC, ("allocReg: alloced %s\n", regsZ80[i].name)); + return ®sZ80[i]; + } + } + D (D_ALLOC, ("allocReg: No free.\n")); + return NULL; +} + +/** Returns pointer to register wit index number + */ +regs * +regWithIdx (int idx) +{ + int i; + + for (i = 0; i < _G.nRegs; i++) + { + if (regsZ80[i].rIdx == idx) + { + return ®sZ80[i]; + } + } + + wassertl (0, "regWithIdx not found"); + exit (1); +} + +/** Frees a register. + */ +static void +freeReg (regs * reg) +{ + wassert (!reg->isFree); + reg->isFree = 1; + D (D_ALLOC, ("freeReg: freed %p\n", reg)); +} + + +/** Returns number of free registers. + */ +static int +nFreeRegs (int type) +{ + int i; + int nfr = 0; + + for (i = 0; i < _G.nRegs; i++) + { + /* For now only one reg type */ + if (regsZ80[i].isFree) + { + nfr++; + } + } + return nfr; +} + +/** Free registers with type. + */ +static int +nfreeRegsType (int type) +{ + int nfr; + if (type == REG_PTR) + { + if ((nfr = nFreeRegs (type)) == 0) + { + return nFreeRegs (REG_GPR); + } + } + + return nFreeRegs (type); +} + +/*-----------------------------------------------------------------*/ +/* useReg - marks a register as used */ +/*-----------------------------------------------------------------*/ +static void +useReg (regs * reg) +{ + reg->isFree = 0; +} + +/*-----------------------------------------------------------------*/ +/* computeSpillable - given a point find the spillable live ranges */ +/*-----------------------------------------------------------------*/ +static bitVect * +computeSpillable (iCode * ic) +{ + bitVect *spillable; + + /* spillable live ranges are those that are live at this + point . the following categories need to be subtracted + from this set. + a) - those that are already spilt + b) - if being used by this one + c) - defined by this one */ + + spillable = bitVectCopy (ic->rlive); + spillable = + bitVectCplAnd (spillable, _G.spiltSet); /* those already spilt */ + spillable = + bitVectCplAnd (spillable, ic->uses); /* used in this one */ + bitVectUnSetBit (spillable, ic->defKey); + spillable = bitVectIntersect (spillable, _G.regAssigned); + + return spillable; +} + +/*-----------------------------------------------------------------*/ +/* noSpilLoc - return true if a variable has no spil location */ +/*-----------------------------------------------------------------*/ +static int +noSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return (sym->usl.spillLoc ? 0 : 1); +} + +/*-----------------------------------------------------------------*/ +/* hasSpilLoc - will return 1 if the symbol has spil location */ +/*-----------------------------------------------------------------*/ +static int +hasSpilLoc (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return (sym->usl.spillLoc ? 1 : 0); +} + +/** Will return 1 if the remat flag is set. + A symbol is rematerialisable if it doesnt need to be allocated + into registers at creation as it can be re-created at any time - + i.e. it's constant in some way. +*/ +static int +rematable (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return sym->remat; +} + +/*-----------------------------------------------------------------*/ +/* allLRs - return true for all */ +/*-----------------------------------------------------------------*/ +static int +allLRs (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return 1; +} + +/** liveRangesWith - applies function to a given set of live range + */ +static set * +liveRangesWith (bitVect * lrs, int (func) (symbol *, eBBlock *, iCode *), + eBBlock * ebp, iCode * ic) +{ + set *rset = NULL; + int i; + + if (!lrs || !lrs->size) + return NULL; + + for (i = 1; i < lrs->size; i++) + { + symbol *sym; + if (!bitVectBitValue (lrs, i)) + continue; + + /* if we don't find it in the live range + hash table we are in serious trouble */ + if (!(sym = hTabItemWithKey (liveRanges, i))) + { + wassertl (0, "liveRangesWith could not find liveRange"); + exit (1); + } + + if (func (sym, ebp, ic) && bitVectBitValue (_G.regAssigned, sym->key)) + { + addSetHead (&rset, sym); + } + } + + return rset; +} + + +/** leastUsedLR - given a set determines which is the least used + */ +static symbol * +leastUsedLR (set * sset) +{ + symbol *sym = NULL, *lsym = NULL; + + sym = lsym = setFirstItem (sset); + + if (!lsym) + return NULL; + + for (; lsym; lsym = setNextItem (sset)) + { + + /* if usage is the same then prefer + the spill the smaller of the two */ + if (lsym->used == sym->used) + if (getSize (lsym->type) < getSize (sym->type)) + sym = lsym; + + /* if less usage */ + if (lsym->used < sym->used) + sym = lsym; + + } + + setToNull ((void *) &sset); + sym->blockSpil = 0; + return sym; +} + +/** noOverLap - will iterate through the list looking for over lap + */ +static int +noOverLap (set * itmpStack, symbol * fsym) +{ + symbol *sym; + + for (sym = setFirstItem (itmpStack); sym; + sym = setNextItem (itmpStack)) + { + if (bitVectBitValue(sym->clashes,fsym->key)) + return 0; +#if 0 + // if sym starts before (or on) our end point + // and ends after (or on) our start point, + // it is an overlap. + if (sym->liveFrom <= fsym->liveTo && + sym->liveTo >= fsym->liveFrom) + { + return 0; + } +#endif + } + return 1; +} + +/*-----------------------------------------------------------------*/ +/* isFree - will return 1 if the a free spil location is found */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (isFree) +{ + symbol *sym = item; + V_ARG (symbol **, sloc); + V_ARG (symbol *, fsym); + + /* if already found */ + if (*sloc) + return 0; + + /* if it is free && and the itmp assigned to + this does not have any overlapping live ranges + with the one currently being assigned and + the size can be accomodated */ + if (sym->isFree && + noOverLap (sym->usl.itmpStack, fsym) && + getSize (sym->type) >= getSize (fsym->type)) + { + *sloc = sym; + return 1; + } + + return 0; +} + +/*-----------------------------------------------------------------*/ +/* createStackSpil - create a location on the stack to spil */ +/*-----------------------------------------------------------------*/ +static symbol * +createStackSpil (symbol * sym) +{ + symbol *sloc = NULL; + + D (D_ALLOC, ("createStackSpil: for sym %p\n", sym)); + + /* first go try and find a free one that is already + existing on the stack */ + if (applyToSet (_G.stackSpil, isFree, &sloc, sym)) + { + /* found a free one : just update & return */ + sym->usl.spillLoc = sloc; + sym->stackSpil = 1; + sloc->isFree = 0; + addSetHead (&sloc->usl.itmpStack, sym); + D (D_ALLOC, ("createStackSpil: found existing\n")); + return sym; + } + + /* could not then have to create one , this is the hard part + we need to allocate this on the stack : this is really a + hack!! but cannot think of anything better at this time */ + + sprintf (buffer, "sloc%d", _G.slocNum++); + sloc = newiTemp (buffer); + + /* set the type to the spilling symbol */ + sloc->type = copyLinkChain (sym->type); + sloc->etype = getSpec (sloc->type); + SPEC_SCLS (sloc->etype) = S_AUTO; + SPEC_EXTR (sloc->etype) = 0; + SPEC_STAT (sloc->etype) = 0; + SPEC_VOLATILE(sloc->etype) = 0; + + allocLocal (sloc); + + sloc->isref = 1; /* to prevent compiler warning */ + + /* if it is on the stack then update the stack */ + if (IN_STACK (sloc->etype)) + { + currFunc->stack += getSize (sloc->type); + _G.stackExtend += getSize (sloc->type); + } + else + { + _G.dataExtend += getSize (sloc->type); + } + + /* add it to the stackSpil set */ + addSetHead (&_G.stackSpil, sloc); + sym->usl.spillLoc = sloc; + sym->stackSpil = 1; + + /* add it to the set of itempStack set + of the spill location */ + addSetHead (&sloc->usl.itmpStack, sym); + + D (D_ALLOC, ("createStackSpil: created new\n")); + return sym; +} + +/*-----------------------------------------------------------------*/ +/* spillThis - spils a specific operand */ +/*-----------------------------------------------------------------*/ +static void +spillThis (symbol * sym) +{ + int i; + + D (D_ALLOC, ("spillThis: spilling %p\n", sym)); + + /* if this is rematerializable or has a spillLocation + we are okay, else we need to create a spillLocation + for it */ + if (!(sym->remat || sym->usl.spillLoc)) + { + createStackSpil (sym); + } + + /* mark it has spilt & put it in the spilt set */ + sym->isspilt = sym->spillA = 1; + _G.spiltSet = bitVectSetBit (_G.spiltSet, sym->key); + + bitVectUnSetBit (_G.regAssigned, sym->key); + bitVectUnSetBit (_G.totRegAssigned, sym->key); + + for (i = 0; i < sym->nRegs; i++) + { + if (sym->regs[i]) + { + freeReg (sym->regs[i]); + sym->regs[i] = NULL; + } + } + + if (sym->usl.spillLoc && !sym->remat) + { + sym->usl.spillLoc->allocreq++; + } + return; +} + +#if DISABLED +/*-----------------------------------------------------------------*/ +/* allDefsOutOfRange - all definitions are out of a range */ +/*-----------------------------------------------------------------*/ +static bool +allDefsOutOfRange (bitVect * defs, int fseq, int toseq) +{ + int i; + + if (!defs) + return TRUE; + + for (i = 0; i < defs->size; i++) + { + iCode *ic; + + if (bitVectBitValue (defs, i) && + (ic = hTabItemWithKey (iCodehTab, i)) && + (ic->seq >= fseq && ic->seq <= toseq)) + + return FALSE; + + } + + return TRUE; +} + +/*-----------------------------------------------------------------*/ +/* hasSpilLocnoUptr - will return 1 if the symbol has spil location */ +/* but is not used as a pointer */ +/*-----------------------------------------------------------------*/ +static int +hasSpilLocnoUptr (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return ((sym->usl.spillLoc && !sym->uptr) ? 1 : 0); +} + +/*-----------------------------------------------------------------*/ +/* notUsedInRemaining - not used or defined in remain of the block */ +/*-----------------------------------------------------------------*/ +static int +notUsedInRemaining (symbol * sym, eBBlock * ebp, iCode * ic) +{ + return ((usedInRemaining (operandFromSymbol (sym), ic) ? 0 : 1) && + allDefsOutOfRange (sym->defs, ebp->fSeq, ebp->lSeq)); +} +#endif + +/** Select a iTemp to spil : rather a simple procedure. + */ +symbol * +selectSpil (iCode * ic, eBBlock * ebp, symbol * forSym) +{ + bitVect *lrcs = NULL; + set *selectS; + symbol *sym; + + D (D_ALLOC, ("selectSpil: finding spill for ic %p\n", ic)); + /* get the spillable live ranges */ + lrcs = computeSpillable (ic); + + /* get all live ranges that are rematerizable */ + if ((selectS = liveRangesWith (lrcs, rematable, ebp, ic))) + { + D (D_ALLOC, ("selectSpil: using remat.\n")); + /* return the least used of these */ + return leastUsedLR (selectS); + } + +#if 0 + /* get live ranges with spillLocations in direct space */ + if ((selectS = liveRangesWith (lrcs, directSpilLoc, ebp, ic))) + { + sym = leastUsedLR (selectS); + strcpy (sym->rname, (sym->usl.spillLoc->rname[0] ? + sym->usl.spillLoc->rname : + sym->usl.spillLoc->name)); + sym->spildir = 1; + /* mark it as allocation required */ + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* if the symbol is local to the block then */ + if (forSym->liveTo < ebp->lSeq) + { + + /* check if there are any live ranges allocated + to registers that are not used in this block */ + if (!_G.blockSpil && (selectS = liveRangesWith (lrcs, notUsedInBlock, ebp, ic))) + { + sym = leastUsedLR (selectS); + /* if this is not rematerializable */ + if (!sym->remat) + { + _G.blockSpil++; + wassertl (0, "Attempted to do an unsupported block spill"); + sym->blockSpil = 1; + } + return sym; + } + + /* check if there are any live ranges that not + used in the remainder of the block */ + if (!_G.blockSpil && (selectS = liveRangesWith (lrcs, notUsedInRemaining, ebp, ic))) + { + sym = leastUsedLR (selectS); + if (sym != forSym) + { + if (!sym->remat) + { + wassertl (0, "Attempted to do an unsupported remain spill"); + sym->remainSpil = 1; + _G.blockSpil++; + } + return sym; + } + } + } + /* find live ranges with spillocation && not used as pointers */ + if ((selectS = liveRangesWith (lrcs, hasSpilLocnoUptr, ebp, ic))) + { + + sym = leastUsedLR (selectS); + /* mark this as allocation required */ + sym->usl.spillLoc->allocreq++; + return sym; + } +#endif + + /* find live ranges with spillocation */ + if ((selectS = liveRangesWith (lrcs, hasSpilLoc, ebp, ic))) + { + D (D_ALLOC, ("selectSpil: using with spill.\n")); + sym = leastUsedLR (selectS); + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* couldn't find then we need to create a spil + location on the stack , for which one? the least + used ofcourse */ + if ((selectS = liveRangesWith (lrcs, noSpilLoc, ebp, ic))) + { + D (D_ALLOC, ("selectSpil: creating new spill.\n")); + /* return a created spil location */ + sym = createStackSpil (leastUsedLR (selectS)); + sym->usl.spillLoc->allocreq++; + return sym; + } + + /* this is an extreme situation we will spill + this one : happens very rarely but it does happen */ + D (D_ALLOC, ("selectSpil: using spillThis.\n")); + spillThis (forSym); + return forSym; + +} + +/** Spil some variable & mark registers as free. + A spill occurs when an iTemp wont fit into the available registers. + */ +bool +spilSomething (iCode * ic, eBBlock * ebp, symbol * forSym) +{ + symbol *ssym; + int i; + + D (D_ALLOC, ("spilSomething: spilling on ic %p\n", ic)); + + /* get something we can spil */ + ssym = selectSpil (ic, ebp, forSym); + + /* mark it as spilt */ + ssym->isspilt = ssym->spillA = 1; + _G.spiltSet = bitVectSetBit (_G.spiltSet, ssym->key); + + /* mark it as not register assigned & + take it away from the set */ + bitVectUnSetBit (_G.regAssigned, ssym->key); + bitVectUnSetBit (_G.totRegAssigned, ssym->key); + + /* mark the registers as free */ + for (i = 0; i < ssym->nRegs; i++) + if (ssym->regs[i]) + freeReg (ssym->regs[i]); + + wassertl (ssym->blockSpil == 0, "Encountered a sym with a block spill"); + wassertl (ssym->remainSpil == 0, "Encountered a sym with a remain spill"); +#if 0 + /* if spilt on stack then free up r0 & r1 + if they could have been assigned to as gprs */ + if (!ptrRegReq && isSpiltOnStack (ssym)) + { + ptrRegReq++; + spillLRWithPtrReg (ssym); + } + + /* if this was a block level spil then insert push & pop + at the start & end of block respectively */ + if (ssym->blockSpil) + { + iCode *nic = newiCode (IPUSH, operandFromSymbol (ssym), NULL); + /* add push to the start of the block */ + addiCodeToeBBlock (ebp, nic, (ebp->sch->op == LABEL ? + ebp->sch->next : ebp->sch)); + nic = newiCode (IPOP, operandFromSymbol (ssym), NULL); + /* add pop to the end of the block */ + addiCodeToeBBlock (ebp, nic, NULL); + } + + /* if spilt because not used in the remainder of the + block then add a push before this instruction and + a pop at the end of the block */ + if (ssym->remainSpil) + { + + iCode *nic = newiCode (IPUSH, operandFromSymbol (ssym), NULL); + /* add push just before this instruction */ + addiCodeToeBBlock (ebp, nic, ic); + + nic = newiCode (IPOP, operandFromSymbol (ssym), NULL); + /* add pop to the end of the block */ + addiCodeToeBBlock (ebp, nic, NULL); + } +#endif + + D (D_ALLOC, ("spilSomething: done.\n")); + + if (ssym == forSym) + return FALSE; + else + return TRUE; +} + +/** Will try for GPR if not spil. + */ +regs * +getRegGpr (iCode * ic, eBBlock * ebp, symbol * sym) +{ + regs *reg; + int j; + + D (D_ALLOC, ("getRegGpr: on ic %p\n", ic)); +tryAgain: + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + { + D (D_ALLOC, ("getRegGpr: got a reg.\n")); + return reg; + } + + /* we have to spil */ + if (!spilSomething (ic, ebp, sym)) + { + D (D_ALLOC, ("getRegGpr: have to spill.\n")); + return NULL; + } + + /* make sure partially assigned registers aren't reused */ + for (j=0; j<=sym->nRegs; j++) + if (sym->regs[j]) + sym->regs[j]->isFree = 0; + + /* this looks like an infinite loop but + in really selectSpil will abort */ + goto tryAgain; +} + +static regs *getRegGprNoSpil() +{ + regs *reg; + + /* try for gpr type */ + if ((reg = allocReg (REG_GPR))) + { + D (D_ALLOC, ("getRegGprNoSpil: got a reg.\n")); + return reg; + } + assert(0); + + /* just to make the compiler happy */ + return 0; +} + +/** Symbol has a given register. + */ +static bool +symHasReg (symbol * sym, regs * reg) +{ + int i; + + for (i = 0; i < sym->nRegs; i++) + if (sym->regs[i] == reg) + return TRUE; + + return FALSE; +} + +/** Check the live to and if they have registers & are not spilt then + free up the registers +*/ +static void +deassignLRs (iCode * ic, eBBlock * ebp) +{ + symbol *sym; + int k; + symbol *result; + + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) + { + + symbol *psym = NULL; + /* if it does not end here */ + if (sym->liveTo > ic->seq) + continue; + + /* if it was spilt on stack then we can + mark the stack spil location as free */ + if (sym->isspilt) + { + if (sym->stackSpil) + { + sym->usl.spillLoc->isFree = 1; + sym->stackSpil = 0; + } + continue; + } + + if (!bitVectBitValue (_G.regAssigned, sym->key)) + continue; + + /* special case check if this is an IFX & + the privious one was a pop and the + previous one was not spilt then keep track + of the symbol */ + if (ic->op == IFX && ic->prev && + ic->prev->op == IPOP && + !ic->prev->parmPush && + !OP_SYMBOL (IC_LEFT (ic->prev))->isspilt) + psym = OP_SYMBOL (IC_LEFT (ic->prev)); + + D (D_ALLOC, ("deassignLRs: in loop on sym %p nregs %u\n", sym, sym->nRegs)); + + if (sym->nRegs) + { + int i = 0; + + bitVectUnSetBit (_G.regAssigned, sym->key); + + /* if the result of this one needs registers + and does not have it then assign it right + away */ + if (IC_RESULT (ic) && + !(SKIP_IC2 (ic) || /* not a special icode */ + ic->op == JUMPTABLE || + ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP || + ic->op == RETURN) && + (result = OP_SYMBOL (IC_RESULT (ic))) && /* has a result */ + result->liveTo > ic->seq && /* and will live beyond this */ + result->liveTo <= ebp->lSeq && /* does not go beyond this block */ + result->liveFrom == ic->seq && /* does not start before here */ + result->regType == sym->regType && /* same register types */ + result->nRegs && /* which needs registers */ + !result->isspilt && /* and does not already have them */ + !result->remat && + !bitVectBitValue (_G.regAssigned, result->key) && + /* the number of free regs + number of regs in this LR + can accomodate the what result Needs */ + ((nfreeRegsType (result->regType) + + sym->nRegs) >= result->nRegs) + ) + { + for (i = 0; i < result->nRegs; i++) + { + if (i < sym->nRegs) + result->regs[i] = sym->regs[i]; + else + result->regs[i] = getRegGpr (ic, ebp, result); + + /* if the allocation falied which means + this was spilt then break */ + if (!result->regs[i]) + { + wassert (0); + assert (0); + break; + } + } + + _G.regAssigned = bitVectSetBit (_G.regAssigned, result->key); + _G.totRegAssigned = bitVectSetBit (_G.totRegAssigned, result->key); + } + + /* free the remaining */ + for (; i < sym->nRegs; i++) + { + if (psym) + { + if (!symHasReg (psym, sym->regs[i])) + freeReg (sym->regs[i]); + } + else + freeReg (sym->regs[i]); + // sym->regs[i] = NULL; + } + } + } +} + + +/** Reassign this to registers. + */ +static void +reassignLR (operand * op) +{ + symbol *sym = OP_SYMBOL (op); + int i; + + D (D_ALLOC, ("reassingLR: on sym %p\n", sym)); + + /* not spilt any more */ + sym->isspilt = sym->spillA = sym->blockSpil = sym->remainSpil = 0; + bitVectUnSetBit (_G.spiltSet, sym->key); + + _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); + _G.totRegAssigned = bitVectSetBit (_G.totRegAssigned, sym->key); + + _G.blockSpil--; + + for (i = 0; i < sym->nRegs; i++) + sym->regs[i]->isFree = 0; +} + +/** Determines if allocating will cause a spill. + */ +static int +willCauseSpill (int nr, int rt) +{ + /* first check if there are any avlb registers + of te type required */ + if (nFreeRegs (0) >= nr) + return 0; + + /* it will cause a spil */ + return 1; +} + +/** The allocator can allocate same registers to result and operand, + if this happens make sure they are in the same position as the operand + otherwise chaos results. +*/ +static int +positionRegs (symbol * result, symbol * opsym) +{ + int count = min (result->nRegs, opsym->nRegs); + int i, j = 0, shared = 0; + int change = 0; + + D (D_ALLOC, ("positionRegs: on result %p opsum %p line %u\n", result, opsym, lineno)); + + /* if the result has been spilt then cannot share */ + if (opsym->isspilt) + return 0; +again: + shared = 0; + /* first make sure that they actually share */ + for (i = 0; i < count; i++) + { + for (j = 0; j < count; j++) + { + if (result->regs[i] == opsym->regs[j] && i != j) + { + shared = 1; + goto xchgPositions; + } + } + } +xchgPositions: + if (shared) + { + regs *tmp = result->regs[i]; + result->regs[i] = result->regs[j]; + result->regs[j] = tmp; + change ++; + goto again; + } + return change ; +} + +/** Try to allocate a pair of registers to the symbol. + */ +bool +tryAllocatingRegPair (symbol * sym) +{ + int i; + wassert (sym->nRegs == 2); + for (i = 0; i < _G.nRegs; i += 2) + { + if ((regsZ80[i].isFree) && (regsZ80[i + 1].isFree)) + { + regsZ80[i].isFree = 0; + sym->regs[0] = ®sZ80[i]; + regsZ80[i + 1].isFree = 0; + sym->regs[1] = ®sZ80[i + 1]; + sym->regType = REG_PAIR; + + if (currFunc) + { + currFunc->regsUsed = + bitVectSetBit (currFunc->regsUsed, i); + currFunc->regsUsed = + bitVectSetBit (currFunc->regsUsed, i + 1); + } + D (D_ALLOC, ("tryAllocatingRegPair: succeded for sym %p\n", sym)); + return TRUE; + } + } + D (D_ALLOC, ("tryAllocatingRegPair: failed on sym %p\n", sym)); + return FALSE; +} + +/*------------------------------------------------------------------*/ +/* verifyRegsAssigned - make sure an iTemp is properly initialized; */ +/* it should either have registers or have beed spilled. Otherwise, */ +/* there was an uninitialized variable, so just spill this to get */ +/* the operand in a valid state. */ +/*------------------------------------------------------------------*/ +static void +verifyRegsAssigned (operand *op, iCode * ic) +{ + symbol * sym; + + if (!op) return; + if (!IS_ITEMP (op)) return; + + sym = OP_SYMBOL (op); + if (sym->isspilt) return; + if (!sym->nRegs) return; + if (sym->regs[0]) return; + + werrorfl (ic->filename, ic->lineno, W_LOCAL_NOINIT, + sym->prereqv ? sym->prereqv->name : sym->name); + spillThis (sym); +} + + +/** Serially allocate registers to the variables. + This is the main register allocation function. It is called after + packing. + */ +static void +serialRegAssign (eBBlock ** ebbs, int count) +{ + int i; + + /* for all blocks */ + for (i = 0; i < count; i++) + { + + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + /* of all instructions do */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + + /* if this is an ipop that means some live + range will have to be assigned again */ + if (ic->op == IPOP) + { + wassert (0); + reassignLR (IC_LEFT (ic)); + } + + /* if result is present && is a true symbol */ + if (IC_RESULT (ic) && ic->op != IFX && + IS_TRUE_SYMOP (IC_RESULT (ic))) + OP_SYMBOL (IC_RESULT (ic))->allocreq++; + + /* take away registers from live + ranges that end at this instruction */ + deassignLRs (ic, ebbs[i]); + + /* some don't need registers */ + /* MLH: removed RESULT and POINTER_SET condition */ + if (SKIP_IC2 (ic) || + ic->op == JUMPTABLE || + ic->op == IFX || + ic->op == IPUSH || + ic->op == IPOP) + continue; + + /* now we need to allocate registers only for the result */ + if (IC_RESULT (ic)) + { + symbol *sym = OP_SYMBOL (IC_RESULT (ic)); + bitVect *spillable; + int willCS; + int j; + + D (D_ALLOC, ("serialRegAssign: in loop on result %p\n", sym)); + + /* Make sure any spill location is definately allocated */ + if (sym->isspilt && !sym->remat && sym->usl.spillLoc && + !sym->usl.spillLoc->allocreq) + { + sym->usl.spillLoc->allocreq++; + } + + /* if it does not need or is spilt + or is already assigned to registers + or will not live beyond this instructions */ + if (!sym->nRegs || + sym->isspilt || + bitVectBitValue (_G.regAssigned, sym->key) || + sym->liveTo <= ic->seq) + { + D (D_ALLOC, ("serialRegAssign: wont live long enough.\n")); + continue; + } + + /* if some liverange has been spilt at the block level + and this one live beyond this block then spil this + to be safe */ + if (_G.blockSpil && sym->liveTo > ebbs[i]->lSeq) + { + D (D_ALLOC, ("serialRegAssign: \"spilling to be safe.\"\n")); + spillThis (sym); + continue; + } + /* if trying to allocate this will cause + a spill and there is nothing to spill + or this one is rematerializable then + spill this one */ + willCS = willCauseSpill (sym->nRegs, sym->regType); + spillable = computeSpillable (ic); + if (sym->remat || + (willCS && bitVectIsZero (spillable))) + { + + D (D_ALLOC, ("serialRegAssign: \"remat spill\"\n")); + spillThis (sym); + continue; + + } + + /* If the live range preceeds the point of definition + then ideally we must take into account registers that + have been allocated after sym->liveFrom but freed + before ic->seq. This is complicated, so spill this + symbol instead and let fillGaps handle the allocation. */ + if (sym->liveFrom < ic->seq) + { + spillThis (sym); + continue; + } + + /* if it has a spillocation & is used less than + all other live ranges then spill this */ + if (willCS) { + if (sym->usl.spillLoc) { + symbol *leastUsed = leastUsedLR (liveRangesWith (spillable, + allLRs, ebbs[i], ic)); + if (leastUsed && leastUsed->used > sym->used) { + spillThis (sym); + continue; + } + } else { + /* if none of the liveRanges have a spillLocation then better + to spill this one than anything else already assigned to registers */ + if (liveRangesWith(spillable,noSpilLoc,ebbs[i],ic)) { + /* if this is local to this block then we might find a block spil */ + if (!(sym->liveFrom >= ebbs[i]->fSeq && sym->liveTo <= ebbs[i]->lSeq)) { + spillThis (sym); + continue; + } + } + } + } + + /* else we assign registers to it */ + _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); + _G.totRegAssigned = bitVectSetBit (_G.totRegAssigned, sym->key); + + /* Special case: Try to fit into a reg pair if + available */ + D (D_ALLOC, ("serialRegAssign: actually allocing regs!\n")); + if ((sym->nRegs == 2) && tryAllocatingRegPair (sym)) + { + } + else + { + for (j = 0; j < sym->nRegs; j++) + { + sym->regs[j] = getRegGpr (ic, ebbs[i], sym); + + /* if the allocation falied which means + this was spilt then break */ + if (!sym->regs[j]) + { + D (D_ALLOC, ("Couldnt alloc (spill)\n")) + break; + } + } + /* Make sure we didn't allocate a register pair with bytes swapped */ + if(sym->nRegs == 2 && sym->regs[0] == sym->regs[1] + 1 && sym->regs[0] != ®sZ80[2]) + { + freeReg(sym->regs[0]); + freeReg(sym->regs[1]); + if(!tryAllocatingRegPair(sym)) + wassertl(0, "Failed to swap register pair bytes back."); + } + } + /* if it shares registers with operands make sure + that they are in the same position */ + if (IC_LEFT (ic) && IS_SYMOP (IC_LEFT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->nRegs && ic->op != '=') + positionRegs (OP_SYMBOL (IC_RESULT (ic)), + OP_SYMBOL (IC_LEFT (ic))); + /* do the same for the right operand */ + if (IC_RIGHT (ic) && IS_SYMOP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->nRegs) + positionRegs (OP_SYMBOL (IC_RESULT (ic)), + OP_SYMBOL (IC_RIGHT (ic))); + + } + } + } + + /* Check for and fix any problems with uninitialized operands */ + for (i = 0; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + if (SKIP_IC2 (ic)) + continue; + + if (ic->op == IFX) + { + verifyRegsAssigned (IC_COND (ic), ic); + continue; + } + + if (ic->op == JUMPTABLE) + { + verifyRegsAssigned (IC_JTCOND (ic), ic); + continue; + } + + verifyRegsAssigned (IC_RESULT (ic), ic); + verifyRegsAssigned (IC_LEFT (ic), ic); + verifyRegsAssigned (IC_RIGHT (ic), ic); + } + } + +} + +/*-----------------------------------------------------------------*/ +/* fillGaps - Try to fill in the Gaps left by Pass1 */ +/*-----------------------------------------------------------------*/ +static void fillGaps() +{ + symbol *sym =NULL; + int key =0; + + if (getenv("DISABLE_FILL_GAPS")) return; + + /* look for livernages that was spilt by the allocator */ + for (sym = hTabFirstItem(liveRanges,&key) ; sym ; + sym = hTabNextItem(liveRanges,&key)) { + + int i; + int pdone = 0; + + if (!sym->spillA || !sym->clashes || sym->remat) continue ; + + /* find the liveRanges this one clashes with, that are + still assigned to registers & mark the registers as used*/ + for ( i = 0 ; i < sym->clashes->size ; i ++) { + int k; + symbol *clr; + + if (bitVectBitValue(sym->clashes,i) == 0 || /* those that clash with this */ + bitVectBitValue(_G.totRegAssigned,i) == 0) /* and are still assigned to registers */ + continue ; + + clr = hTabItemWithKey(liveRanges,i); + assert(clr); + + /* mark these registers as used */ + for (k = 0 ; k < clr->nRegs ; k++ ) + useReg(clr->regs[k]); + } + + if (willCauseSpill(sym->nRegs,sym->regType)) { + /* NOPE :( clear all registers & and continue */ + freeAllRegs(); + continue ; + } + + /* THERE IS HOPE !!!! */ + for (i=0; i < sym->nRegs ; i++ ) { + sym->regs[i] = getRegGprNoSpil (); + } + + /* for all its definitions check if the registers + allocated needs positioning NOTE: we can position + only ONCE if more than One positioning required + then give up */ + sym->isspilt = 0; + for (i = 0 ; i < sym->defs->size ; i++ ) { + if (bitVectBitValue(sym->defs,i)) { + iCode *ic; + if (!(ic = hTabItemWithKey(iCodehTab,i))) continue ; + if (SKIP_IC(ic)) continue; + assert(isSymbolEqual(sym,OP_SYMBOL(IC_RESULT(ic)))); /* just making sure */ + /* if left is assigned to registers */ + if (IS_SYMOP(IC_LEFT(ic)) && + bitVectBitValue(_G.totRegAssigned,OP_SYMBOL(IC_LEFT(ic))->key)) { + pdone += positionRegs(sym,OP_SYMBOL(IC_LEFT(ic))); + } + if (IS_SYMOP(IC_RIGHT(ic)) && + bitVectBitValue(_G.totRegAssigned,OP_SYMBOL(IC_RIGHT(ic))->key)) { + pdone += positionRegs(sym,OP_SYMBOL(IC_RIGHT(ic))); + } + if (pdone > 1) break; + } + } + for (i = 0 ; i < sym->uses->size ; i++ ) { + if (bitVectBitValue(sym->uses,i)) { + iCode *ic; + if (!(ic = hTabItemWithKey(iCodehTab,i))) continue ; + if (SKIP_IC(ic)) continue; + if (!IS_ASSIGN_ICODE(ic)) continue ; + + /* if result is assigned to registers */ + if (IS_SYMOP(IC_RESULT(ic)) && + bitVectBitValue(_G.totRegAssigned,OP_SYMBOL(IC_RESULT(ic))->key)) { + pdone += positionRegs(sym,OP_SYMBOL(IC_RESULT(ic))); + } + if (pdone > 1) break; + } + } + /* had to position more than once GIVE UP */ + if (pdone > 1) { + /* UNDO all the changes we made to try this */ + sym->isspilt = 1; + for (i=0; i < sym->nRegs ; i++ ) { + sym->regs[i] = NULL; + } + freeAllRegs(); + D(D_FILL_GAPS,("Fill Gap gave up due to positioning for %s in function %s\n",sym->name, currFunc ? currFunc->name : "UNKNOWN")); + continue ; + } + D(D_FILL_GAPS,("FILLED GAP for %s in function %s\n",sym->name, currFunc ? currFunc->name : "UNKNOWN")); + _G.totRegAssigned = bitVectSetBit(_G.totRegAssigned,sym->key); + sym->isspilt = sym->spillA = 0 ; + sym->usl.spillLoc->allocreq--; + freeAllRegs(); + } +} + +/*-----------------------------------------------------------------*/ +/* rUmaskForOp :- returns register mask for an operand */ +/*-----------------------------------------------------------------*/ +bitVect * +rUmaskForOp (operand * op) +{ + bitVect *rumask; + symbol *sym; + int j; + + /* only temporaries are assigned registers */ + if (!IS_ITEMP (op)) + return NULL; + + sym = OP_SYMBOL (op); + + /* if spilt or no registers assigned to it + then nothing */ + if (sym->isspilt || !sym->nRegs) + return NULL; + + rumask = newBitVect (_G.nRegs); + + for (j = 0; j < sym->nRegs; j++) + { + rumask = bitVectSetBit (rumask, sym->regs[j]->rIdx); + } + + return rumask; +} + +bitVect * +z80_rUmaskForOp (operand * op) +{ + return rUmaskForOp (op); +} + +/** Returns bit vector of registers used in iCode. + */ +bitVect * +regsUsedIniCode (iCode * ic) +{ + bitVect *rmask = newBitVect (_G.nRegs); + + /* do the special cases first */ + if (ic->op == IFX) + { + rmask = bitVectUnion (rmask, + rUmaskForOp (IC_COND (ic))); + goto ret; + } + + /* for the jumptable */ + if (ic->op == JUMPTABLE) + { + rmask = bitVectUnion (rmask, + rUmaskForOp (IC_JTCOND (ic))); + + goto ret; + } + + /* of all other cases */ + if (IC_LEFT (ic)) + rmask = bitVectUnion (rmask, + rUmaskForOp (IC_LEFT (ic))); + + + if (IC_RIGHT (ic)) + rmask = bitVectUnion (rmask, + rUmaskForOp (IC_RIGHT (ic))); + + if (IC_RESULT (ic)) + rmask = bitVectUnion (rmask, + rUmaskForOp (IC_RESULT (ic))); + +ret: + return rmask; +} + +/** For each instruction will determine the regsUsed. + */ +static void +createRegMask (eBBlock ** ebbs, int count) +{ + int i; + + /* for all blocks */ + for (i = 0; i < count; i++) + { + iCode *ic; + + if (ebbs[i]->noPath && + (ebbs[i]->entryLabel != entryLabel && + ebbs[i]->entryLabel != returnLabel)) + continue; + + /* for all instructions */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) + { + + int j; + + if (SKIP_IC2 (ic) || !ic->rlive) + continue; + + /* first mark the registers used in this + instruction */ + ic->rUsed = regsUsedIniCode (ic); + _G.funcrUsed = bitVectUnion (_G.funcrUsed, ic->rUsed); + + /* now create the register mask for those + registers that are in use : this is a + super set of ic->rUsed */ + ic->rMask = newBitVect (_G.nRegs + 1); + + /* for all live Ranges alive at this point */ + for (j = 1; j < ic->rlive->size; j++) + { + symbol *sym; + int k; + + /* if not alive then continue */ + if (!bitVectBitValue (ic->rlive, j)) + continue; + + /* find the live range we are interested in */ + if (!(sym = hTabItemWithKey (liveRanges, j))) + { + werror (E_INTERNAL_ERROR, __FILE__, __LINE__, + "createRegMask cannot find live range"); + exit (0); + } + + /* if no register assigned to it */ + if (!sym->nRegs || sym->isspilt) + continue; + + /* for all the registers allocated to it */ + for (k = 0; k < sym->nRegs; k++) + if (sym->regs[k]) + ic->rMask = + bitVectSetBit (ic->rMask, sym->regs[k]->rIdx); + } + } + } +} + +#if 0 +/** Returns the rematerialized string for a remat var. + */ +static char * +rematStr (symbol * sym) +{ + iCode *ic = sym->rematiCode; + int offset = 0; + + while (1) + { + /* if plus adjust offset to right hand side */ + if (ic->op == '+') + { + offset += (int) operandLitValue (IC_RIGHT (ic)); + ic = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + continue; + } + + /* if minus adjust offset to right hand side */ + if (ic->op == '-') + { + offset -= (int) operandLitValue (IC_RIGHT (ic)); + ic = OP_SYMBOL (IC_LEFT (ic))->rematiCode; + continue; + } + + /* cast then continue */ + if (IS_CAST_ICODE(ic)) { + ic = OP_SYMBOL (IC_RIGHT (ic))->rematiCode; + continue; + } + /* we reached the end */ + break; + } + + if (offset) + { + SNPRINTF (buffer, sizeof(buffer), + "(%s %c 0x%04x)", + OP_SYMBOL (IC_LEFT (ic))->rname, + offset >= 0 ? '+' : '-', + abs (offset) & 0xffff); + } + else + { + strncpyz (buffer, OP_SYMBOL (IC_LEFT (ic))->rname, sizeof(buffer)); + } + return buffer; +} +#endif + +/*-----------------------------------------------------------------*/ +/* regTypeNum - computes the type & number of registers required */ +/*-----------------------------------------------------------------*/ +static void +regTypeNum (void) +{ + symbol *sym; + int k; + + /* for each live range do */ + for (sym = hTabFirstItem (liveRanges, &k); sym; + sym = hTabNextItem (liveRanges, &k)) + { + + /* if used zero times then no registers needed */ + if ((sym->liveTo - sym->liveFrom) == 0) + continue; + + D (D_ALLOC, ("regTypeNum: loop on sym %p\n", sym)); + + /* if the live range is a temporary */ + if (sym->isitmp) + { + + /* if the type is marked as a conditional */ + if (sym->regType == REG_CND) + continue; + + /* if used in return only then we don't + need registers */ + if (sym->ruonly || sym->accuse) + { + if (IS_AGGREGATE (sym->type) || sym->isptr) + sym->type = aggrToPtr (sym->type, FALSE); + continue; + } + + /* if not then we require registers */ + D (D_ALLOC, ("regTypeNum: isagg %u nRegs %u type %p\n", IS_AGGREGATE (sym->type) || sym->isptr, sym->nRegs, sym->type)); + sym->nRegs = ((IS_AGGREGATE (sym->type) || sym->isptr) ? + getSize (sym->type = aggrToPtr (sym->type, FALSE)) : + getSize (sym->type)); + D (D_ALLOC, ("regTypeNum: setting nRegs of %s (%p) to %u\n", sym->name, sym, sym->nRegs)); + + D (D_ALLOC, ("regTypeNum: setup to assign regs sym %p\n", sym)); + + if (sym->nRegs > 4) + { + fprintf (stderr, "allocated more than 4 or 0 registers for type "); + printTypeChain (sym->type, stderr); + fprintf (stderr, "\n"); + } + + /* determine the type of register required */ + /* Always general purpose */ + sym->regType = REG_GPR; + + } + else + { + /* for the first run we don't provide */ + /* registers for true symbols we will */ + /* see how things go */ + D (D_ALLOC, ("regTypeNum: #2 setting num of %p to 0\n", sym)); + sym->nRegs = 0; + } + } + +} + +/** Mark all registers as free. + */ +static void +freeAllRegs () +{ + int i; + + D (D_ALLOC, ("freeAllRegs: running.\n")); + + for (i = 0; i < _G.nRegs; i++) + regsZ80[i].isFree = 1; +} + +/*-----------------------------------------------------------------*/ +/* deallocStackSpil - this will set the stack pointer back */ +/*-----------------------------------------------------------------*/ +DEFSETFUNC (deallocStackSpil) +{ + symbol *sym = item; + + deallocLocal (sym); + return 0; +} + +/** Register reduction for assignment. + */ +static int +packRegsForAssign (iCode * ic, eBBlock * ebp) +{ + iCode *dic, *sic; + + D (D_ALLOC, ("packRegsForAssign: running on ic %p\n", ic)); + + if (!IS_ITEMP (IC_RIGHT (ic)) || + OP_SYMBOL (IC_RIGHT (ic))->isind || + OP_LIVETO (IC_RIGHT (ic)) > ic->seq) + { + return 0; + } + + /* find the definition of iTempNN scanning backwards if we find a + a use of the true symbol in before we find the definition then + we cannot */ + for (dic = ic->prev; dic; dic = dic->prev) + { + /* PENDING: Don't pack across function calls. */ + if (dic->op == CALL || dic->op == PCALL) + { + dic = NULL; + break; + } + + if (SKIP_IC2 (dic)) + continue; + + if (dic->op == IFX) + { + if (IS_SYMOP (IC_COND (dic)) && + (IC_COND (dic)->key == IC_RESULT (ic)->key || + IC_COND (dic)->key == IC_RIGHT (ic)->key)) + { + dic = NULL; + break; + } + } + else + { + if (IS_TRUE_SYMOP (IC_RESULT (dic)) && + IS_OP_VOLATILE (IC_RESULT (dic))) + { + dic = NULL; + break; + } + + if (IS_SYMOP (IC_RESULT (dic)) && + IC_RESULT (dic)->key == IC_RIGHT (ic)->key) + { + if (POINTER_SET (dic)) + dic = NULL; + + break; + } + + if (IS_SYMOP (IC_RIGHT (dic)) && + (IC_RIGHT (dic)->key == IC_RESULT (ic)->key || + IC_RIGHT (dic)->key == IC_RIGHT (ic)->key)) + { + dic = NULL; + break; + } + + if (IS_SYMOP (IC_LEFT (dic)) && + (IC_LEFT (dic)->key == IC_RESULT (ic)->key || + IC_LEFT (dic)->key == IC_RIGHT (ic)->key)) + { + dic = NULL; + break; + } + + if (IS_SYMOP (IC_RESULT (dic)) && + IC_RESULT (dic)->key == IC_RESULT (ic)->key) + { + dic = NULL; + break; + } + + } + } + + if (!dic) + return 0; /* did not find */ + + /* if assignment then check that right is not a bit */ + if (ASSIGNMENT (ic) && !POINTER_SET (ic)) + { + sym_link *etype = operandType (IC_RESULT (dic)); + if (IS_BITFIELD (etype)) + { + /* if result is a bit too then it's ok */ + etype = operandType (IC_RESULT (ic)); + if (!IS_BITFIELD (etype)) + { + return 0; + } + } + } + + /* if the result is on stack or iaccess then it must be + the same atleast one of the operands */ + if (OP_SYMBOL (IC_RESULT (ic))->onStack || + OP_SYMBOL (IC_RESULT (ic))->iaccess) + { + /* the operation has only one symbol + operator then we can pack */ + if ((IC_LEFT (dic) && !IS_SYMOP (IC_LEFT (dic))) || + (IC_RIGHT (dic) && !IS_SYMOP (IC_RIGHT (dic)))) + goto pack; + + if (!((IC_LEFT (dic) && + IC_RESULT (ic)->key == IC_LEFT (dic)->key) || + (IC_RIGHT (dic) && + IC_RESULT (ic)->key == IC_RIGHT (dic)->key))) + return 0; + } +pack: + /* found the definition */ + /* replace the result with the result of */ + /* this assignment and remove this assignment */ + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + IC_RESULT (dic) = IC_RESULT (ic); + + if (IS_ITEMP (IC_RESULT (dic)) && OP_SYMBOL (IC_RESULT (dic))->liveFrom > dic->seq) + { + OP_SYMBOL (IC_RESULT (dic))->liveFrom = dic->seq; + } + /* delete from liverange table also + delete from all the points inbetween and the new + one */ + for (sic = dic; sic != ic; sic = sic->next) + { + bitVectUnSetBit (sic->rlive, IC_RESULT (ic)->key); + if (IS_ITEMP (IC_RESULT (dic))) + bitVectSetBit (sic->rlive, IC_RESULT (dic)->key); + } + + remiCodeFromeBBlock (ebp, ic); + // PENDING: Check vs mcs51 + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); + hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); + OP_DEFS(IC_RESULT (dic))=bitVectSetBit (OP_DEFS (IC_RESULT (dic)), dic->key); + return 1; +} + +/** Scanning backwards looks for first assig found. + */ +iCode * +findAssignToSym (operand * op, iCode * ic) +{ + iCode *dic; + + for (dic = ic->prev; dic; dic = dic->prev) + { + + /* if definition by assignment */ + if (dic->op == '=' && + !POINTER_SET (dic) && + IC_RESULT (dic)->key == op->key) + /* && IS_TRUE_SYMOP(IC_RIGHT(dic)) */ + { + + /* we are interested only if defined in far space */ + /* or in stack space in case of + & - */ + + /* if assigned to a non-symbol then return + true */ + if (!IS_SYMOP (IC_RIGHT (dic))) + break; + + /* if the symbol is in far space then + we should not */ + if (isOperandInFarSpace (IC_RIGHT (dic))) + return NULL; + + /* for + & - operations make sure that + if it is on the stack it is the same + as one of the three operands */ + if ((ic->op == '+' || ic->op == '-') && + OP_SYMBOL (IC_RIGHT (dic))->onStack) + { + + if (IC_RESULT (ic)->key != IC_RIGHT (dic)->key && + IC_LEFT (ic)->key != IC_RIGHT (dic)->key && + IC_RIGHT (ic)->key != IC_RIGHT (dic)->key) + return NULL; + } + + break; + + } + + /* if we find an usage then we cannot delete it */ + if (IC_LEFT (dic) && IC_LEFT (dic)->key == op->key) + return NULL; + + if (IC_RIGHT (dic) && IC_RIGHT (dic)->key == op->key) + return NULL; + + if (POINTER_SET (dic) && IC_RESULT (dic)->key == op->key) + return NULL; + } + + /* now make sure that the right side of dic + is not defined between ic & dic */ + if (dic) + { + iCode *sic = dic->next; + + for (; sic != ic; sic = sic->next) + if (IC_RESULT (sic) && + IC_RESULT (sic)->key == IC_RIGHT (dic)->key) + return NULL; + } + + return dic; + + +} + +#if !DISABLE_PACKREGSFORSUPPORT +// PENDING + +/*-----------------------------------------------------------------*/ +/* packRegsForSupport :- reduce some registers for support calls */ +/*-----------------------------------------------------------------*/ +static int +packRegsForSupport (iCode * ic, eBBlock * ebp) +{ + int change = 0; + /* for the left & right operand :- look to see if the + left was assigned a true symbol in far space in that + case replace them */ + D (D_ALLOC, ("packRegsForSupport: running on ic %p\n", ic)); + + if (IS_ITEMP (IC_LEFT (ic)) && + OP_SYMBOL (IC_LEFT (ic))->liveTo <= ic->seq) + { + iCode *dic = findAssignToSym (IC_LEFT (ic), ic); + iCode *sic; + + if (!dic) + goto right; + + /* found it we need to remove it from the + block */ + for (sic = dic; sic != ic; sic = sic->next) + bitVectUnSetBit (sic->rlive, IC_LEFT (ic)->key); + + IC_LEFT (ic)->operand.symOperand = + IC_RIGHT (dic)->operand.symOperand; + IC_LEFT (ic)->key = IC_RIGHT (dic)->operand.symOperand->key; + remiCodeFromeBBlock (ebp, dic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); + // PENDING: Check vs mcs51 + change++; + } + + /* do the same for the right operand */ +right: + if (!change && + IS_ITEMP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->liveTo <= ic->seq) + { + iCode *dic = findAssignToSym (IC_RIGHT (ic), ic); + iCode *sic; + + if (!dic) + return change; + + /* found it we need to remove it from the block */ + for (sic = dic; sic != ic; sic = sic->next) + bitVectUnSetBit (sic->rlive, IC_RIGHT (ic)->key); + + IC_RIGHT (ic)->operand.symOperand = + IC_RIGHT (dic)->operand.symOperand; + IC_RIGHT (ic)->key = IC_RIGHT (dic)->operand.symOperand->key; + + remiCodeFromeBBlock (ebp, dic); + bitVectUnSetBit(OP_SYMBOL(IC_RESULT(dic))->defs,dic->key); + hTabDeleteItem (&iCodehTab, dic->key, dic, DELETE_ITEM, NULL); + // PENDING: vs mcs51 + change++; + } + + return change; +} +#endif + +/** Will reduce some registers for single use. + */ +static iCode * +packRegsForOneuse (iCode * ic, operand * op, eBBlock * ebp) +{ + bitVect *uses; + iCode *dic, *sic; + + // PENDING: Disable + D (D_ALLOC, ("packRegsForOneUse: running on ic %p\n", ic)); + + /* if returning a literal then do nothing */ + if (!IS_SYMOP (op)) + return NULL; + + /* only upto 2 bytes since we cannot predict + the usage of b, & acc */ + if (getSize (operandType (op)) > 2) + return NULL; + + if (ic->op != RETURN && + ic->op != SEND) + return NULL; + + /* this routine will mark the a symbol as used in one + instruction use only && if the defintion is local + (ie. within the basic block) && has only one definition && + that definiion is either a return value from a + function or does not contain any variables in + far space */ + uses = bitVectCopy (OP_USES (op)); + bitVectUnSetBit (uses, ic->key); /* take away this iCode */ + if (!bitVectIsZero (uses)) /* has other uses */ + return NULL; + + /* if it has only one defintion */ + if (bitVectnBitsOn (OP_DEFS (op)) > 1) + return NULL; /* has more than one definition */ + + /* get the that definition */ + if (!(dic = + hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_DEFS (op))))) + return NULL; + + /* found the definition now check if it is local */ + if (dic->seq < ebp->fSeq || + dic->seq > ebp->lSeq) + return NULL; /* non-local */ + + /* now check if it is the return from a function call */ + if (dic->op == CALL || dic->op == PCALL) + { + if (ic->op != SEND && ic->op != RETURN && + !POINTER_SET(ic) && !POINTER_GET(ic)) + { + OP_SYMBOL (op)->ruonly = 1; + return dic; + } + dic = dic->next; + } + + /* otherwise check that the definition does + not contain any symbols in far space */ + if (isOperandInFarSpace (IC_LEFT (dic)) || + isOperandInFarSpace (IC_RIGHT (dic)) || + IS_OP_RUONLY (IC_LEFT (ic)) || + IS_OP_RUONLY (IC_RIGHT (ic))) + { + return NULL; + } + + /* if pointer set then make sure the pointer is one byte */ + if (POINTER_SET (dic)) + return NULL; + + if (POINTER_GET (dic)) + return NULL; + + sic = dic; + + /* also make sure the intervenening instructions + don't have any thing in far space */ + for (dic = dic->next; dic && dic != ic; dic = dic->next) + { + /* if there is an intervening function call then no */ + if (dic->op == CALL || dic->op == PCALL) + return NULL; + /* if pointer set then make sure the pointer + is one byte */ + if (POINTER_SET (dic)) + return NULL; + + if (POINTER_GET (dic)) + return NULL; + + /* if address of & the result is remat the okay */ + if (dic->op == ADDRESS_OF && + OP_SYMBOL (IC_RESULT (dic))->remat) + continue; + + /* if left or right or result is in far space */ + if (isOperandInFarSpace (IC_LEFT (dic)) || + isOperandInFarSpace (IC_RIGHT (dic)) || + isOperandInFarSpace (IC_RESULT (dic)) || + IS_OP_RUONLY (IC_LEFT (dic)) || + IS_OP_RUONLY (IC_RIGHT (dic)) || + IS_OP_RUONLY (IC_RESULT (dic))) + { + return NULL; + } + } + + OP_SYMBOL (op)->ruonly = 1; + return sic; +} + +/*-----------------------------------------------------------------*/ +/* isBitwiseOptimizable - requirements of JEAN LOUIS VERN */ +/*-----------------------------------------------------------------*/ +static bool +isBitwiseOptimizable (iCode * ic) +{ + sym_link *rtype = getSpec (operandType (IC_RIGHT (ic))); + + /* bitwise operations are considered optimizable + under the following conditions (Jean-Louis VERN) + + x & lit + bit & bit + bit & x + bit ^ bit + bit ^ x + x ^ lit + x | lit + bit | bit + bit | x + */ + if (IS_LITERAL (rtype)) + return TRUE; + return FALSE; +} + +/** Optimisations: + Certian assignments involving pointers can be temporarly stored + in HL. Esp. +genAssign + ld iy,#_Blah + ld bc,(iy) +genAssign (ptr) + ld hl,bc + ld iy,#_Blah2 + ld (iy),(hl) +*/ + +#if !DISABLE_PACKREGSFORACCUSE +// PENDING + +/** Pack registers for acc use. + When the result of this operation is small and short lived it may + be able to be stored in the accumelator. + */ +static void +packRegsForAccUse (iCode * ic) +{ + iCode *uic; + + /* if this is an aggregate, e.g. a one byte char array */ + if (IS_AGGREGATE(operandType(IC_RESULT(ic)))) { + return; + } + + /* if + or - then it has to be one byte result */ + if ((ic->op == '+' || ic->op == '-') + && getSize (operandType (IC_RESULT (ic))) > 1) + return; + + /* if shift operation make sure right side is not a literal */ + if (ic->op == RIGHT_OP && + (isOperandLiteral (IC_RIGHT (ic)) || + getSize (operandType (IC_RESULT (ic))) > 1)) + return; + + if (ic->op == LEFT_OP && + (isOperandLiteral (IC_RIGHT (ic)) || + getSize (operandType (IC_RESULT (ic))) > 1)) + return; + + /* has only one definition */ + if (bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) > 1) + return; + + /* has only one use */ + if (bitVectnBitsOn (OP_USES (IC_RESULT (ic))) > 1) + return; + + /* and the usage immediately follows this iCode */ + if (!(uic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_USES (IC_RESULT (ic)))))) + return; + + if (ic->next != uic) + return; + + /* if it is a conditional branch then we definitely can */ + if (uic->op == IFX) + goto accuse; + + if (uic->op == JUMPTABLE) + return; + +#if 0 + /* if the usage is not is an assignment or an + arithmetic / bitwise / shift operation then not */ + if (POINTER_SET (uic) && + getSize (aggrToPtr (operandType (IC_RESULT (uic)), FALSE)) > 1) + return; +#endif + + if (uic->op != '=' && + !IS_ARITHMETIC_OP (uic) && + !IS_BITWISE_OP (uic) && + uic->op != LEFT_OP && + uic->op != RIGHT_OP) + return; + + /* if used in ^ operation then make sure right is not a + literl */ + if (uic->op == '^' && isOperandLiteral (IC_RIGHT (uic))) + return; + + /* if shift operation make sure right side is not a literal */ + if (uic->op == RIGHT_OP && + (isOperandLiteral (IC_RIGHT (uic)) || + getSize (operandType (IC_RESULT (uic))) > 1)) + return; + + if (uic->op == LEFT_OP && + (isOperandLiteral (IC_RIGHT (uic)) || + getSize (operandType (IC_RESULT (uic))) > 1)) + return; + +#if 0 + /* make sure that the result of this icode is not on the + stack, since acc is used to compute stack offset */ + if (IS_TRUE_SYMOP (IC_RESULT (uic)) && + OP_SYMBOL (IC_RESULT (uic))->onStack) + return; +#endif + +#if 0 + /* if either one of them in far space then we cannot */ + if ((IS_TRUE_SYMOP (IC_LEFT (uic)) && + isOperandInFarSpace (IC_LEFT (uic))) || + (IS_TRUE_SYMOP (IC_RIGHT (uic)) && + isOperandInFarSpace (IC_RIGHT (uic)))) + return; +#endif + + /* if the usage has only one operand then we can */ + if (IC_LEFT (uic) == NULL || + IC_RIGHT (uic) == NULL) + goto accuse; + + /* make sure this is on the left side if not + a '+' since '+' is commutative */ + if (ic->op != '+' && + IC_LEFT (uic)->key != IC_RESULT (ic)->key) + return; + + // See mcs51 ralloc for reasoning +#if 0 + /* if one of them is a literal then we can */ + if ((IC_LEFT (uic) && IS_OP_LITERAL (IC_LEFT (uic))) || + (IC_RIGHT (uic) && IS_OP_LITERAL (IC_RIGHT (uic)))) + { + goto accuse; + return; + } +#endif + +/** This is confusing :) Guess for now */ + if (IC_LEFT (uic)->key == IC_RESULT (ic)->key && + (IS_ITEMP (IC_RIGHT (uic)) || + (IS_TRUE_SYMOP (IC_RIGHT (uic))))) + goto accuse; + + if (IC_RIGHT (uic)->key == IC_RESULT (ic)->key && + (IS_ITEMP (IC_LEFT (uic)) || + (IS_TRUE_SYMOP (IC_LEFT (uic))))) + goto accuse; + return; +accuse: + OP_SYMBOL (IC_RESULT (ic))->accuse = ACCUSE_A; +} +#endif + +static void +packRegsForHLUse (iCode * ic) +{ + iCode *uic; + + /* PENDING: Could do IFX */ + if (ic->op == IFX) + { + return; + } + + /* has only one definition */ + if (bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) > 1) + { + D (D_HLUSE, (" + Dropping as has more than one def\n")); + return; + } + + /* has only one use */ + if (bitVectnBitsOn (OP_USES (IC_RESULT (ic))) > 1) + { + D (D_HLUSE, (" + Dropping as has more than one use\n")); + return; + } + + /* and the usage immediately follows this iCode */ + if (!(uic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_USES (IC_RESULT (ic)))))) + { + D (D_HLUSE, (" + Dropping as usage isn't in this block\n")); + return; + } + + if (ic->next != uic) + { + D (D_HLUSE, (" + Dropping as usage doesn't follow this\n")); + return; + } + + if (uic->op ==IFX) + { + return; + } + + if (getSize (operandType (IC_RESULT (ic))) != 2 || + (IC_LEFT(uic) && getSize (operandType (IC_LEFT (uic))) != 2) || + (IC_RIGHT(uic) && getSize (operandType (IC_RIGHT (uic))) != 2)) + { + D (D_HLUSE, (" + Dropping as the result size is not 2\n")); + return; + } + + if (IS_Z80) + { + if (ic->op == CAST && uic->op == IPUSH) + goto hluse; + if (ic->op == ADDRESS_OF && uic->op == IPUSH) + goto hluse; + if (ic->op == ADDRESS_OF && POINTER_GET (uic) && IS_ITEMP( IC_RESULT (uic))) + goto hluse; + if (ic->op == CALL && ic->parmBytes == 0 && (uic->op == '-' || uic->op == '+')) + goto hluse; + } + else if (IS_GB) + { + /* Case of assign a constant to offset in a static array. */ + if (ic->op == '+' && IS_VALOP (IC_RIGHT (ic))) + { + if (uic->op == '=' && POINTER_SET (uic)) + { + goto hluse; + } + else if (uic->op == IPUSH && getSize (operandType (IC_LEFT (uic))) == 2) + { + goto hluse; + } + } + } + + D (D_HLUSE, (" + Dropping as it's a bad op\n")); + return; +hluse: + OP_SYMBOL (IC_RESULT (ic))->accuse = ACCUSE_SCRATCH; +} + +static iCode * +packRegsForHLUse3 (iCode * lic, operand * op, eBBlock * ebp) +{ + int i, key; + symbol *sym; + iCode *ic, *dic; + bool isFirst = TRUE; + + D (D_PACK_HLUSE3, ("Checking HL on %p lic key %u first def %u line %u:\n", OP_SYMBOL(op), lic->key, bitVectFirstBit(OP_DEFS(op)), lic->lineno)); + if (D_PACK_HLUSE3) + piCode(lic, NULL); + + if ( OP_SYMBOL(op)->accuse) + { + return NULL; + } + + if (OP_SYMBOL(op)->remat) + { + return NULL; + } + + /* Only defined once */ + if (bitVectnBitsOn (OP_DEFS (op)) > 1) + return NULL; + + if (getSize (operandType (op)) > 2) + return NULL; + + /* And this is the definition */ + if (bitVectFirstBit (OP_DEFS (op)) != lic->key) + return NULL; + + /* first check if any overlapping liverange has already been + assigned to DPTR */ + if (OP_SYMBOL(op)->clashes) + { + for (i = 0 ; i < OP_SYMBOL(op)->clashes->size ; i++ ) + { + if (bitVectBitValue(OP_SYMBOL(op)->clashes,i)) + { + sym = hTabItemWithKey(liveRanges,i); + if (sym->accuse == ACCUSE_SCRATCH) + { + return NULL; + } + } + } + } + + /* Nothing else that clashes with this is using the scratch + register. Scan through all of the intermediate instructions and + see if any of them could nuke HL. + */ + dic = ic = hTabFirstItemWK(iCodeSeqhTab,OP_SYMBOL(op)->liveFrom); + + for (; ic && ic->seq <= OP_SYMBOL(op)->liveTo; + ic = hTabNextItem(iCodeSeqhTab, &key)) + { + if (D_PACK_HLUSE3) + piCode(ic, NULL); + D (D_PACK_HLUSE3, ("(On %p: op: %u next: %p)\n", ic, ic->op, ic->next)); + + if (isFirst) + { + isFirst = FALSE; + if (ic->op == ADDRESS_OF) + continue; + if (POINTER_GET (ic)) + continue; + if (ic->op == '=' && !POINTER_SET(ic)) + continue; + } + + if (IC_RESULT(ic) && IS_SYMOP(IC_RESULT(ic)) + && isOperandInDirSpace (IC_RESULT (ic))) + return NULL; + + if (IC_LEFT(ic) && IS_SYMOP(IC_LEFT(ic)) + && isOperandInDirSpace (IC_LEFT (ic))) + return NULL; + + if (IC_RIGHT(ic) && IS_SYMOP(IC_RIGHT(ic)) + && isOperandInDirSpace (IC_RIGHT (ic))) + return NULL; + + /* Handle the non left/right/result ones first */ + if (ic->op == IFX) + continue; + if (ic->op == JUMPTABLE) + return NULL; + + if (SKIP_IC2(ic)) + continue; + + if (ic->op == CAST) + continue; + + if (ic->op == IPUSH && isOperandEqual (op, IC_LEFT (ic))) + continue; + + if (ic->op == SEND && isOperandEqual (op, IC_LEFT (ic))) + continue; + + if (ic->op == CALL && isOperandEqual (op, IC_RESULT (ic))) + continue; + + if (ic->op == LEFT_OP && isOperandLiteral (IC_RIGHT (ic))) + continue; + + if ((ic->op == '=' && !POINTER_SET(ic)) || + ic->op == UNARYMINUS || + ic->op == '+' || + ic->op == '-' || + ic->op == '>' || + ic->op == '<' || + ic->op == EQ_OP || + 0) + continue; + + if (ic->op == '*' && isOperandEqual (op, IC_LEFT (ic))) + continue; + + if (POINTER_SET (ic) && isOperandEqual (op, IC_RESULT (ic))) + continue; + + if (POINTER_GET (ic) && isOperandEqual (op, IC_LEFT (ic))) + continue; + + if (IS_VALOP (IC_RIGHT (ic)) && + (ic->op == EQ_OP || + 0)) + { + continue; + } + + /* By default give up */ + return NULL; + } + + D (D_PACK_HLUSE3, ("Succeeded!\n")) + + OP_SYMBOL (op)->accuse = ACCUSE_SCRATCH; + return dic; +} + +static iCode * +packRegsForIYUse (iCode * lic, operand * op, eBBlock * ebp) +{ + int i, key; + symbol *sym; + iCode *ic, *dic; + bitVect *uses; + + D (D_PACK_IY, ("Checking IY on %p lic key %u first def %u line %u:\n", OP_SYMBOL(op), lic->key, bitVectFirstBit(OP_DEFS(op)), lic->lineno)); + if (D_PACK_IY) + piCode(lic, NULL); + + if ( OP_SYMBOL(op)->accuse) + { + return NULL; + } + + if (OP_SYMBOL(op)->remat) + { + return NULL; + } + + /* Only defined once */ + if (bitVectnBitsOn (OP_DEFS (op)) > 1) + return NULL; + + /* And this is the definition */ + if (bitVectFirstBit (OP_DEFS (op)) != lic->key) + return NULL; + + /* first check if any overlapping liverange has already been + assigned to DPTR */ + if (OP_SYMBOL(op)->clashes) + { + for (i = 0 ; i < OP_SYMBOL(op)->clashes->size ; i++ ) + { + if (bitVectBitValue(OP_SYMBOL(op)->clashes,i)) + { + sym = hTabItemWithKey(liveRanges,i); + if (sym->accuse == ACCUSE_IY) + { + return NULL; + } + } + } + } + + /* Only a few instructions can load into IY */ + if (lic->op != '=') + { + return NULL; + } + + if (getSize (operandType (op)) != 2) + { + D (D_ACCUSE2, (" + Dropping as operation has size is too big\n")); + return FALSE; + } + + /* Nothing else that clashes with this is using the scratch + register. Scan through all of the intermediate instructions and + see if any of them could nuke HL. + */ + dic = ic = hTabFirstItemWK(iCodeSeqhTab,OP_SYMBOL(op)->liveFrom); + uses = OP_USES(op); + + for (; ic && ic->seq <= OP_SYMBOL(op)->liveTo; + ic = hTabNextItem(iCodeSeqhTab,&key)) + { + if (D_PACK_IY) + piCode(ic, NULL); + + if (ic->op == PCALL || + ic->op == CALL || + ic->op == JUMPTABLE + ) + return NULL; + + if (SKIP_IC2(ic)) + continue; + + /* Be pessamistic. */ + if (ic->op == IFX) + return NULL; + + D (D_PACK_IY, (" op: %u uses %u result: %d left: %d right: %d\n", ic->op, bitVectBitValue(uses, ic->key), + IC_RESULT(ic) && IS_SYMOP(IC_RESULT(ic)) ? isOperandInDirSpace(IC_RESULT(ic)) : -1, + IC_LEFT(ic) && IS_SYMOP(IC_LEFT(ic)) ? isOperandInDirSpace(IC_LEFT(ic)) : -1, + IC_RIGHT(ic) && IS_SYMOP(IC_RIGHT(ic)) ? isOperandInDirSpace(IC_RIGHT(ic)) : -1 + )); + + if (IC_RESULT(ic) && IS_SYMOP(IC_RESULT(ic)) && + isOperandInDirSpace(IC_RESULT(ic))) + return NULL; + + if (IC_RIGHT(ic) && IS_SYMOP(IC_RIGHT(ic)) && + isOperandInDirSpace(IC_RIGHT(ic))) + return NULL; + + if (IC_LEFT(ic) && IS_SYMOP(IC_LEFT(ic)) && + isOperandInDirSpace(IC_LEFT(ic))) + return NULL; + + /* Only certain rules will work against IY. Check if this iCode uses + this symbol. */ + if (bitVectBitValue(uses, ic->key) != 0) + { + if (ic->op == '=' && + isOperandEqual(IC_RESULT(ic), op)) + continue; + + if (ic->op == GET_VALUE_AT_ADDRESS && + isOperandEqual(IC_LEFT(ic), op)) + continue; + + if (isOperandEqual(IC_RESULT(ic), IC_LEFT(ic)) == FALSE) + return NULL; + + if (IC_RIGHT (ic) && IS_VALOP (IC_RIGHT (ic))) + { + if (ic->op == '+' || + ic->op == '-') + { + /* Only works if the constant is small */ + if (operandLitValue (IC_RIGHT (ic)) < 4) + continue; + } + } + + return NULL; + } + else + { + /* This iCode doesn't use the sym. See if this iCode preserves IY. + */ + continue; + } + + /* By default give up */ + return NULL; + } + + D (D_PACK_IY, ("Succeeded IY!\n")); + + OP_SYMBOL (op)->accuse = ACCUSE_IY; + return dic; +} + +/** Returns TRUE if this operation can use acc and if it preserves the value. + */ +static bool +opPreservesA (iCode * uic) +{ + if (uic->op == IFX) + { + /* If we've gotten this far then the thing to compare must be + small enough and must be in A. + */ + return TRUE; + } + + if (uic->op == JUMPTABLE) + { + D (D_ACCUSE2, (" + Dropping as operation is a Jumptable\n")); + return FALSE; + } + + /* A pointer assign preserves A if A is the left value. */ + if (uic->op == '=' && POINTER_SET (uic)) + { + return TRUE; + } + + /* if the usage has only one operand then we can */ + /* PENDING: check */ + if (IC_LEFT (uic) == NULL || + IC_RIGHT (uic) == NULL) + { + D (D_ACCUSE2, (" + Dropping as operation has only one operand\n")); + return FALSE; + } + + /* PENDING: check this rule */ + if (getSize (operandType (IC_RESULT (uic))) > 1) + { + D (D_ACCUSE2, (" + Dropping as operation has size is too big\n")); + return FALSE; + } + + + /* Disabled all of the old rules as they weren't verified and have + caused at least one problem. + */ + return FALSE; +} + +/** Returns true if this operand preserves the value of A. + */ +static bool +opIgnoresA (iCode * ic, iCode * uic) +{ + /* A increment of an iTemp by a constant is OK. */ + if ( uic->op == '+' && + IS_ITEMP (IC_LEFT (uic)) && + IS_ITEMP (IC_RESULT (uic)) && + IS_OP_LITERAL (IC_RIGHT (uic))) + { + unsigned int icount = (unsigned int) ulFromVal (IC_RIGHT (uic)->operand.valOperand); + + /* Being an ITEMP means that we're already a symbol. */ + if (icount == 1 && + IC_RESULT (uic)->operand.symOperand->key == IC_LEFT (uic)->operand.symOperand->key + ) + { + return TRUE; + } + } + else if (uic->op == '=' && !POINTER_SET (uic)) + { + /* If they are equal and get optimised out then things are OK. */ + if (isOperandEqual (IC_RESULT (uic), IC_RIGHT (uic))) + { + /* Straight assign is OK. */ + return TRUE; + } + } + + return FALSE; +} + + +/* Some optimisation cases: + + 1. Part of memcpy +; genPointerGet + ld l,-4(ix) + ld h,-3(ix) + ld c,(hl) +; genPlus + inc -4(ix) + jp nz,00108$ + inc -3(ix) +00108$: +; genAssign (pointer) + ld a,c + ld (de),a + + want to optimise down to: + ld hl,-4(ix) ... + ld a,(hl) + inc -4(ix).w ... + ld (de),a + + So genPointer get is OK + genPlus where the right is constant, left is iTemp, and result is same as left + genAssign (pointer) is OK + + 2. Part of _strcpy +; genPointerGet + ld a,(de) + ld c,a +; genIfx + xor a,a + or a,c + jp z,00103$ +; _strcpy.c 40 +; genAssign (pointer) +; AOP_STK for _strcpy_to_1_1 + ld l,-2(ix) + ld h,-1(ix) + ld (hl),c + + want to optimise down to: + ld a,(de) + or a,a + jp z,00103$ + ld (bc),a + + So genIfx where IC_COND has size of 1 and is a constant. +*/ + +/** Pack registers for acc use. + When the result of this operation is small and short lived it may + be able to be stored in the accumulator. + + Note that the 'A preserving' list is currently emperical :) + */ +static void +packRegsForAccUse2 (iCode * ic) +{ + iCode *uic; + + D (D_ACCUSE2, ("packRegsForAccUse2: running on ic %p line %u\n", ic, ic->lineno)); + if (D_ACCUSE2) + piCode (ic, NULL); + + /* Filter out all but those 'good' commands */ + if ( + !POINTER_GET (ic) && + ic->op != '+' && + ic->op != '-' && + !IS_BITWISE_OP (ic) && + ic->op != '=' && + ic->op != EQ_OP && + ic->op != '<' && + ic->op != '>' && + ic->op != CAST && + ic->op != GETHBIT && + 1) + { + D (D_ACCUSE2, (" + Dropping as not a 'good' source command\n")); + return; + } + + /* if + or - then it has to be one byte result. + MLH: Ok. + */ + if ((ic->op == '+' || ic->op == '-') + && getSize (operandType (IC_RESULT (ic))) > 1) + { + D (D_ACCUSE2, (" + Dropping as it's a big + or -\n")); + return; + } + + /* has only one definition */ + if (bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) > 1) + { + D (D_ACCUSE2, (" + Dropping as it has more than one definition\n")); + return; + } + + /* Right. We may be able to propagate it through if: + For each in the chain of uses the intermediate is OK. + */ + /* Get next with 'uses result' bit on + If this->next == next + Validate use of next + If OK, increase count + */ + /* and the usage immediately follows this iCode */ + if (!(uic = hTabItemWithKey (iCodehTab, + bitVectFirstBit (OP_USES (IC_RESULT (ic)))))) + { + D (D_ACCUSE2, (" + Dropping as usage does not follow first\n")); + return; + } + + { + /* Create a copy of the OP_USES bit vect */ + bitVect *uses = bitVectCopy (OP_USES (IC_RESULT (ic))); + int setBit; + iCode *scan = ic, *next; + + do + { + setBit = bitVectFirstBit (uses); + next = hTabItemWithKey (iCodehTab, setBit); + if (scan->next == next) + { + D (D_ACCUSE2_VERBOSE, (" ! Is next in line\n")); + + bitVectUnSetBit (uses, setBit); + /* Still contigous. */ + if (!opPreservesA (next)) + { + D (D_ACCUSE2, (" + Dropping as operation doesn't preserve A\n")); + return; + } + D (D_ACCUSE2_VERBOSE, (" ! Preserves A, so continue scanning\n")); + scan = next; + } + /*else if (scan->next == NULL && bitVectnBitsOn (uses) == 1 && next != NULL) + { + if (next->prev == NULL) + { + if (!opPreservesA (next)) + { + D (D_ACCUSE2, (" + Dropping as operation doesn't preserve A #2\n")); + return; + } + bitVectUnSetBit (uses, setBit); + scan = next; + } + else + { + D (D_ACCUSE2, (" + Dropping as last in list and next doesn't start a block\n")); + return; + } + } //This caused bug #1292721 */ + else if (scan->next == NULL) + { + D (D_ACCUSE2, (" + Dropping as hit the end of the list\n")); + D (D_ACCUSE2, (" + Next in htab: %p\n", next)); + return; + } + else + { + if (opIgnoresA (ic, scan->next)) + { + /* Safe for now. */ + scan = scan->next; + D (D_ACCUSE2_VERBOSE, (" ! Op ignores A, so continue scanning\n")); + } + else + { + D (D_ACCUSE2, (" + Dropping as parts are not consecuitive and intermediate might use A\n")); + return; + } + } + } + while (!bitVectIsZero (uses)); + + OP_SYMBOL (IC_RESULT (ic))->accuse = ACCUSE_A; + return; + } +} + +/** Does some transformations to reduce register pressure. + */ +static void +packRegisters (eBBlock * ebp) +{ + iCode *ic; + int change = 0; + + D (D_ALLOC, ("packRegisters: entered.\n")); + + while (1 && !DISABLE_PACK_ASSIGN) + { + change = 0; + /* look for assignments of the form */ + /* iTempNN = TRueSym (someoperation) SomeOperand */ + /* .... */ + /* TrueSym := iTempNN:1 */ + for (ic = ebp->sch; ic; ic = ic->next) + { + /* find assignment of the form TrueSym := iTempNN:1 */ + if (ic->op == '=' && !POINTER_SET (ic)) + change += packRegsForAssign (ic, ebp); + } + if (!change) + break; + } + + for (ic = ebp->sch; ic; ic = ic->next) + { + /* Safe: address of a true sym is always constant. */ + /* if this is an itemp & result of a address of a true sym + then mark this as rematerialisable */ + D (D_ALLOC, ("packRegisters: looping on ic %p\n", ic)); + + if (ic->op == ADDRESS_OF && + IS_ITEMP (IC_RESULT (ic)) && + IS_TRUE_SYMOP (IC_LEFT (ic)) && + bitVectnBitsOn (OP_DEFS (IC_RESULT (ic))) == 1 && + !OP_SYMBOL (IC_LEFT (ic))->onStack) + { + + OP_SYMBOL (IC_RESULT (ic))->remat = 1; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = ic; + OP_SYMBOL (IC_RESULT (ic))->usl.spillLoc = NULL; + } + + /* Safe: just propagates the remat flag */ + /* if straight assignment then carry remat flag if this is the + only definition */ + if (ic->op == '=' && + !POINTER_SET (ic) && + IS_SYMOP (IC_RIGHT (ic)) && + OP_SYMBOL (IC_RIGHT (ic))->remat && + !IS_CAST_ICODE(OP_SYMBOL (IC_RIGHT (ic))->rematiCode) && + !isOperandGlobal(IC_RESULT(ic)) && /* due to bug 1618050 */ + bitVectnBitsOn (OP_SYMBOL (IC_RESULT (ic))->defs) <= 1) + { + OP_SYMBOL (IC_RESULT (ic))->remat = + OP_SYMBOL (IC_RIGHT (ic))->remat; + OP_SYMBOL (IC_RESULT (ic))->rematiCode = + OP_SYMBOL (IC_RIGHT (ic))->rematiCode; + } + + /* if the condition of an if instruction is defined in the + previous instruction then mark the itemp as a conditional */ + if ((IS_CONDITIONAL (ic) || + ((ic->op == BITWISEAND || + ic->op == '|' || + ic->op == '^') && + isBitwiseOptimizable (ic))) && + ic->next && ic->next->op == IFX && + bitVectnBitsOn (OP_USES(IC_RESULT(ic)))==1 && + isOperandEqual (IC_RESULT (ic), IC_COND (ic->next)) && + OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq) + { + + OP_SYMBOL (IC_RESULT (ic))->regType = REG_CND; + continue; + } + +#if 0 + /* reduce for support function calls */ + if (ic->supportRtn || ic->op == '+' || ic->op == '-') + packRegsForSupport (ic, ebp); +#endif + + /* some cases the redundant moves can + can be eliminated for return statements */ + if (ic->op == RETURN || ic->op == SEND) + { + packRegsForOneuse (ic, IC_LEFT (ic), ebp); + } + + /* if pointer set & left has a size more than + one and right is not in far space */ + if (!DISABLE_PACK_ONE_USE && + POINTER_SET (ic) && + /* MLH: no such thing. + !isOperandInFarSpace(IC_RIGHT(ic)) && */ + !OP_SYMBOL (IC_RESULT (ic))->remat && + !IS_OP_RUONLY (IC_RIGHT (ic)) && + getSize (aggrToPtr (operandType (IC_RESULT (ic)), FALSE)) > 1) + { + + packRegsForOneuse (ic, IC_RESULT (ic), ebp); + } + + /* if pointer get */ + if (!DISABLE_PACK_ONE_USE && + POINTER_GET (ic) && + IS_SYMOP (IC_LEFT (ic)) && + /* MLH: dont have far space + !isOperandInFarSpace(IC_RESULT(ic))&& */ + !OP_SYMBOL (IC_LEFT (ic))->remat && + !IS_OP_RUONLY (IC_RESULT (ic)) && + getSize (aggrToPtr (operandType (IC_LEFT (ic)), FALSE)) > 1) + { + + packRegsForOneuse (ic, IC_LEFT (ic), ebp); + } + + /* pack registers for accumulator use, when the result of an + arithmetic or bit wise operation has only one use, that use is + immediately following the defintion and the using iCode has + only one operand or has two operands but one is literal & the + result of that operation is not on stack then we can leave the + result of this operation in acc:b combination */ + + if (!DISABLE_PACK_HL && IS_ITEMP (IC_RESULT (ic))) + { + /* PENDING */ + if (IS_GB) + { + if (0) + packRegsForHLUse (ic); + } + else + { + packRegsForHLUse3 (ic, IC_RESULT (ic), ebp); + } + } + + if (!DISABLE_PACK_IY && IS_ITEMP (IC_RESULT (ic)) && IS_Z80) + { + packRegsForIYUse (ic, IC_RESULT (ic), ebp); + } + + if (!DISABLE_PACK_ACC && IS_ITEMP (IC_RESULT (ic)) && + getSize (operandType (IC_RESULT (ic))) == 1) + { + packRegsForAccUse2 (ic); + } + } +} + +/** Joins together two byte constant pushes into one word push. + */ +static iCode * +joinPushes (iCode *lic) +{ + iCode *ic, *uic; + + for (ic = lic; ic; ic = ic->next) + { + int first, second; + value *val; + + uic = ic->next; + + /* Anything past this? */ + if (uic == NULL) + { + continue; + } + /* This and the next pushes? */ + if (ic->op != IPUSH || uic->op != IPUSH) + { + continue; + } + /* Both literals? */ + if ( !IS_OP_LITERAL (IC_LEFT (ic)) || !IS_OP_LITERAL (IC_LEFT (uic))) + { + continue; + } + /* Both characters? */ + if ( getSize (operandType (IC_LEFT (ic))) != 1 || getSize (operandType (IC_LEFT (uic))) != 1) + { + continue; + } + /* Pull out the values, make a new type, and create the new iCode for it. + */ + first = (int)operandLitValue ( IC_LEFT (ic)); + second = (int)operandLitValue ( IC_LEFT (uic)); + + sprintf (buffer, "%uu", ((first << 8) | (second & 0xFF)) & 0xFFFFU); + val = constVal (buffer); + SPEC_NOUN (val->type) = V_INT; + IC_LEFT (ic) = operandFromOperand (IC_LEFT (ic)); + IC_LEFT (ic)->operand.valOperand = val; + + /* Now remove the second one from the list. */ + ic->next = uic->next; + if (uic->next) + { + /* Patch up the reverse link */ + uic->next->prev = ic; + } + } + + return lic; +} + +/*-----------------------------------------------------------------*/ +/* assignRegisters - assigns registers to each live range as need */ +/*-----------------------------------------------------------------*/ +void +z80_assignRegisters (ebbIndex * ebbi) +{ + eBBlock ** ebbs = ebbi->bbOrder; + int count = ebbi->count; + iCode *ic; + int i; + + D (D_ALLOC, ("\n-> z80_assignRegisters: entered.\n")); + + setToNull ((void *) &_G.funcrUsed); + setToNull ((void *) &_G.totRegAssigned); + _G.stackExtend = _G.dataExtend = 0; + + if (IS_GB) + { + /* DE is required for the code gen. */ + _G.nRegs = GBZ80_MAX_REGS; + regsZ80 = _gbz80_regs; + } + else + { + _G.nRegs = Z80_MAX_REGS; + regsZ80 = _z80_regs; + } + + /* change assignments this will remove some + live ranges reducing some register pressure */ + for (i = 0; i < count; i++) + packRegisters (ebbs[i]); + + /* liveranges probably changed by register packing + so we compute them again */ + recomputeLiveRanges (ebbs, count); + + if (options.dump_pack) + dumpEbbsToFileExt (DUMP_PACK, ebbi); + + /* first determine for each live range the number of + registers & the type of registers required for each */ + regTypeNum (); + + /* and serially allocate registers */ + serialRegAssign (ebbs, count); + + freeAllRegs (); + fillGaps(); + + /* if stack was extended then tell the user */ + if (_G.stackExtend) + { +/* werror(W_TOOMANY_SPILS,"stack", */ +/* _G.stackExtend,currFunc->name,""); */ + _G.stackExtend = 0; + } + + if (_G.dataExtend) + { +/* werror(W_TOOMANY_SPILS,"data space", */ +/* _G.dataExtend,currFunc->name,""); */ + _G.dataExtend = 0; + } + + if (options.dump_rassgn) { + dumpEbbsToFileExt (DUMP_RASSGN, ebbi); + dumpLiveRanges (DUMP_LRANGE, liveRanges); + } + + /* after that create the register mask + for each of the instruction */ + createRegMask (ebbs, count); + + /* now get back the chain */ + ic = iCodeLabelOptimize (iCodeFromeBBlock (ebbs, count)); + + ic = joinPushes (ic); + + /* redo that offsets for stacked automatic variables */ + redoStackOffsets (); + + genZ80Code (ic); + + /* free up any stackSpil locations allocated */ + applyToSet (_G.stackSpil, deallocStackSpil); + _G.slocNum = 0; + setToNull ((void *) &_G.stackSpil); + setToNull ((void *) &_G.spiltSet); + /* mark all registers as free */ + freeAllRegs (); + + return; +} diff --git a/src/z80/ralloc.h b/src/z80/ralloc.h new file mode 100644 index 0000000..b0714af --- /dev/null +++ b/src/z80/ralloc.h @@ -0,0 +1,80 @@ +/*------------------------------------------------------------------------- + + SDCCralloc.h - header file register allocation + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1998) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ +#include "SDCCicode.h" +#include "SDCCBBlock.h" +#ifndef SDCCRALLOC_H +#define SDCCRALLOC_H 1 + +#define DEBUG_FAKE_EXTRA_REGS 0 + +enum + { + C_IDX = 0, + B_IDX, + E_IDX, + D_IDX, + L_IDX, + H_IDX, +#if DEBUG_FAKE_EXTRA_REGS + M_IDX, + N_IDX, + O_IDX, + P_IDX, + Q_IDX, + R_IDX, + S_IDX, + T_IDX, +#endif + CND_IDX + }; + +enum + { + REG_PTR = 1, + REG_GPR = 2, + REG_CND = 4, + REG_PAIR = 8 + }; + +/* definition for the registers */ +typedef struct regs + { + short type; /* can have value + REG_GPR, REG_PTR or REG_CND */ + short rIdx; /* index into register table */ + char *name; /* name */ + unsigned isFree:1; /* is currently unassigned */ + } +regs; + +extern regs *regsZ80; + +void assignRegisters (eBBlock **, int); +regs *regWithIdx (int); + +void z80_assignRegisters (ebbIndex *); +bitVect *z80_rUmaskForOp (operand * op); + +#endif diff --git a/src/z80/support.c b/src/z80/support.c new file mode 100644 index 0000000..05352a5 --- /dev/null +++ b/src/z80/support.c @@ -0,0 +1,37 @@ +/** @file z80/support.c + */ +#include "z80.h" +#include + +int +convertFloat (Z80_FLOAT * f, double native) +{ + unsigned long mantissa, exponent; + double f2; + wassert (f); + if (native != 0) + { + f2 = floor (log (fabs (native)) / log (2)) + 1; + mantissa = (unsigned long) (0x1000000 * fabs (native) / exp (f2 * log (2))) ; + mantissa &= 0xffffff; + exponent = (unsigned long) (f2 + 0x40) ; + if (native < 0) + exponent |= 0x80; + } + else + { + mantissa = 0; + exponent = 0; + } + + f->w[0] = (WORD) mantissa; + f->w[1] = (BYTE) (mantissa >> 16); + f->w[1] |= exponent << 8; + + f->b[0] = (BYTE) f->w[0]; + f->b[1] = (BYTE) (f->w[0] >> 8); + f->b[2] = (BYTE) f->w[1]; + f->b[3] = (BYTE) (f->w[1] >> 8); + + return 0; +} diff --git a/src/z80/support.h b/src/z80/support.h new file mode 100644 index 0000000..a2902b7 --- /dev/null +++ b/src/z80/support.h @@ -0,0 +1,20 @@ +/** @file z80/support.h + Support functions for the z80 port. +*/ +#ifndef Z80_SUPPORT_INCLUDE +#define Z80_SUPPORT_INCLUDE + +typedef unsigned short WORD; +typedef unsigned char BYTE; + +typedef struct + { + WORD w[2]; + BYTE b[4]; + } +Z80_FLOAT; + +/** Convert a native float into 'z80' format */ +int convertFloat (Z80_FLOAT * f, double native); + +#endif diff --git a/src/z80/z80.dsp b/src/z80/z80.dsp new file mode 100644 index 0000000..eb77748 --- /dev/null +++ b/src/z80/z80.dsp @@ -0,0 +1,145 @@ +# Microsoft Developer Studio Project File - Name="z80" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Static Library" 0x0104 + +CFG=z80 - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "z80.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "z80.mak" CFG="z80 - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "z80 - Win32 Debug" (based on "Win32 (x86) Static Library") +!MESSAGE "z80 - Win32 Release" (based on "Win32 (x86) Static Library") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "z80 - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /YX /FD /GZ /Zm500 /c +# ADD CPP /nologo /G5 /W3 /Gm /GX /ZI /Od /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /FR /FD /GZ /Zm1000 /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LIB32=link.exe -lib +# ADD BASE LIB32 /nologo /out:"Debug\port.lib" +# ADD LIB32 /nologo /out:"Debug\port.lib" + +!ELSEIF "$(CFG)" == "z80 - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Target_Dir "" +# ADD BASE CPP /nologo /ML /W3 /GX /O2 /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /FD /Zm500 /c +# ADD CPP /nologo /ML /W3 /GX /O2 /I ".." /I "." /I "..\.." /I "..\..\support\util" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /FD /Zm1000 /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LIB32=link.exe -lib +# ADD BASE LIB32 /nologo /out:"Release\port.lib" +# ADD LIB32 /nologo /out:"Release\port.lib" + +!ENDIF + +# Begin Target + +# Name "z80 - Win32 Debug" +# Name "z80 - Win32 Release" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\gen.c +# End Source File +# Begin Source File + +SOURCE=.\main.c + +!IF "$(CFG)" == "z80 - Win32 Debug" + +!ELSEIF "$(CFG)" == "z80 - Win32 Release" + +# ADD CPP /D "LNK" + +!ENDIF + +# End Source File +# Begin Source File + +SOURCE=.\peep.c +# End Source File +# Begin Source File + +SOURCE=.\ralloc.c +# End Source File +# Begin Source File + +SOURCE=.\support.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=..\common.h +# End Source File +# Begin Source File + +SOURCE=.\gen.h +# End Source File +# Begin Source File + +SOURCE=.\peep.h +# End Source File +# Begin Source File + +SOURCE=.\ralloc.h +# End Source File +# Begin Source File + +SOURCE=.\support.h +# End Source File +# Begin Source File + +SOURCE=.\z80.h +# End Source File +# End Group +# End Target +# End Project diff --git a/src/z80/z80.h b/src/z80/z80.h new file mode 100644 index 0000000..0be5418 --- /dev/null +++ b/src/z80/z80.h @@ -0,0 +1,36 @@ +/** @file z80/z80.h + Common definitions between the z80 and gbz80 parts. +*/ +#include "common.h" +#include "ralloc.h" +#include "gen.h" +#include "peep.h" +#include "support.h" + +typedef enum + { + SUB_Z80, + SUB_GBZ80 + } +Z80_SUB_PORT; + +typedef struct + { + Z80_SUB_PORT sub; + int calleeSavesBC; + int port_mode; + int port_back; + } +Z80_OPTS; + +extern Z80_OPTS z80_opts; + +#define IS_GB (z80_opts.sub == SUB_GBZ80) +#define IS_Z80 (z80_opts.sub == SUB_Z80) + +enum + { + ACCUSE_A = 1, + ACCUSE_SCRATCH, + ACCUSE_IY + }; diff --git a/src/z80/z80a.dsp b/src/z80/z80a.dsp new file mode 100644 index 0000000..58c4bc7 --- /dev/null +++ b/src/z80/z80a.dsp @@ -0,0 +1,144 @@ +# Microsoft Developer Studio Project File - Name="z80a" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Generic Project" 0x010a + +CFG=z80a - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "z80a.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "z80a.mak" CFG="z80a - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "z80a - Win32 Debug" (based on "Win32 (x86) Generic Project") +!MESSAGE "z80a - Win32 Release" (based on "Win32 (x86) Generic Project") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +MTL=midl.exe + +!IF "$(CFG)" == "z80a - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "" +# PROP Intermediate_Dir "" +# PROP Target_Dir "" + +!ELSEIF "$(CFG)" == "z80a - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "" +# PROP Intermediate_Dir "" +# PROP Target_Dir "" + +!ENDIF + +# Begin Target + +# Name "z80a - Win32 Debug" +# Name "z80a - Win32 Release" +# Begin Source File + +SOURCE=".\peeph-gbz80.def" + +!IF "$(CFG)" == "z80a - Win32 Debug" + +# Begin Custom Build +InputPath=".\peeph-gbz80.def" + +"peeph-gbz80.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph-gbz80.rul + +# End Custom Build + +!ELSEIF "$(CFG)" == "z80a - Win32 Release" + +# Begin Custom Build +InputPath=".\peeph-gbz80.def" + +"peeph-gbz80.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph-gbz80.rul + +# End Custom Build + +!ENDIF + +# End Source File +# Begin Source File + +SOURCE=".\peeph-z80.def" + +!IF "$(CFG)" == "z80a - Win32 Debug" + +# Begin Custom Build +InputPath=".\peeph-z80.def" + +"peeph-z80.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph-z80.rul + +# End Custom Build + +!ELSEIF "$(CFG)" == "z80a - Win32 Release" + +# Begin Custom Build +InputPath=".\peeph-z80.def" + +"peeph-z80.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph-z80.rul + +# End Custom Build + +!ENDIF + +# End Source File +# Begin Source File + +SOURCE=".\peeph.def" + +!IF "$(CFG)" == "z80a - Win32 Debug" + +# Begin Custom Build +InputPath=".\peeph.def" + +"peeph.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph.rul + +# End Custom Build + +!ELSEIF "$(CFG)" == "z80a - Win32 Release" + +# Begin Custom Build +InputPath=".\peeph.def" + +"peeph.rul" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + gawk -f ../SDCCpeeph.awk $(InputPath) >peeph.rul + +# End Custom Build + +!ENDIF + +# End Source File +# End Target +# End Project diff --git a/support/README b/support/README new file mode 100644 index 0000000..c951fb2 --- /dev/null +++ b/support/README @@ -0,0 +1,5 @@ +sdcc/support +------------ + +This directory contains support programs and libraries that may +not be provided by your system. diff --git a/support/Util/BuildCmd.c b/support/Util/BuildCmd.c new file mode 100644 index 0000000..41da392 --- /dev/null +++ b/support/Util/BuildCmd.c @@ -0,0 +1,121 @@ +/*------------------------------------------------------------------------- + BuildCmd - SDCC Support function + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +/*! Build a command line with parameter substitution +*/ + +#include +#include +#include "SDCCset.h" +#include "BuildCmd.h" + +void +buildCmdLine (char *into, const char **cmds, + const char *p1, const char *p2, + const char *p3, set *list) +{ + int first = 1; + + assert(cmds != NULL); + assert(into != NULL); + + *into = '\0'; + + while (*cmds) { + const char *p, *from, *par; + int sep = 1; + + from = *cmds; + cmds++; + + /* See if it has a '$' anywhere - if not, just copy */ + if ((p = strchr (from, '$'))) { + /* include first part of cmd */ + if (p != from) { + if (!first && sep) + strcat(into, " "); + strncat(into, from, p - from); + sep = 0; + } + from = p + 2; + + /* include parameter */ + p++; + switch (*p) { + case '1': + par = p1; + break; + + case '2': + par = p2; + break; + + case '3': + par = p3; + break; + + case 'l': + { + const char *tmp; + par = NULL; + + if (list != NULL && (tmp = (const char *)setFirstItem(list)) != NULL) { + do + { + if (*tmp != '\0') { + if (sep) + strcat(into, " "); /* seperate it */ + strcat(into, tmp); + tmp++; + sep = 1; + } + } while ((tmp = (const char *)setNextItem(list)) != NULL); + } + } + break; + + default: + par = NULL; + assert(0); + } + + if (par && *par != '\0') { + if (!first && sep) + strcat(into, " "); /* seperate it */ + strcat(into, par); + sep = 0; + } + } + + /* include the rest of cmd, e.g. ".asm" from "$1.asm" */ + if (*from != '\0') { + if (!first && sep) + strcat(into, " "); /* seperate it */ + strcat(into, from); + sep = 0; + } + + first = 0; + } +} diff --git a/support/Util/BuildCmd.h b/support/Util/BuildCmd.h new file mode 100644 index 0000000..5b81611 --- /dev/null +++ b/support/Util/BuildCmd.h @@ -0,0 +1,33 @@ +/*------------------------------------------------------------------------- + BuildCmd - SDCC Support function + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef __BUILDCMD_H +#define __BUILDCMD_H + +void +buildCmdLine (char *into, const char **cmds, + const char *p1, const char *p2, + const char *p3, set *list); + +#endif diff --git a/support/Util/MySystem.c b/support/Util/MySystem.c new file mode 100644 index 0000000..6aec20f --- /dev/null +++ b/support/Util/MySystem.c @@ -0,0 +1,361 @@ +/*------------------------------------------------------------------------- + MySystem - SDCC Support function + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifdef _WIN32 +#undef DATADIR +#include +/* avoid DATADIR definition clash :-( */ +#include +#else +#include +#endif +#include +#include "SDCCglobl.h" +#include "SDCCutil.h" +#include "MySystem.h" +#include "newalloc.h" + + +set *binPathSet = NULL; /* set of binary paths */ + + +/*! + * get command and arguments from command line + */ + +static void +split_command(const char *cmd_line, char **command, char **params) +{ + const char *p, *cmd_start; + char delim; + char *str; + unsigned len; + + /* skip leading spaces */ + for (p = cmd_line; isspace(*p); p++) + ; + + /* get command */ + switch (*p) { + case '\'': + case '"': + delim = *p; + cmd_start = ++p; + break; + + default: + delim = ' '; + cmd_start = p; + } + + if (delim == ' ') { + while (*p != '\0' && !isspace(*p)) + p++; + } + else { + while (*p != '\0' && *p != delim) + p++; + } + + if (command != NULL) { + len = p - cmd_start; + str = Safe_alloc(len + 1); + strncpy(str, cmd_start, len); + str[len] = '\0'; + *command = str; + } + + p++; + + /* skip spaces before parameters */ + while (isspace(*p)) + p++; + + /* get parameters */ + if (params != NULL) + *params = Safe_strdup(p); +} + + +/*! + * find the command: + * 1) if the command is specified by path, try it + * 2) try to find the command in predefined path's + * 3) trust on $PATH + */ + +#ifdef _WIN32 +/* WIN32 version */ + +/* + * I don't like this solution, but unfortunately cmd.exe and command.com + * don't accept something like this: + * "program" "argument" + * Cmd.exe accepts the following: + * ""program" "argument"" + * but command.com doesn't. + * The following is accepted by both: + * program "argument" + * + * So the most portable WIN32 solution is to use GetShortPathName() for + * program to get rid of spaces, so that quotes are not needed :-( + * Using spawnvp() instead of system() is more portable cross platform approach, + * but then also a substitute for _popen() should be developed... + */ + +#define EXE_EXT ".exe" + +/*! + * merge command and parameters to command line + */ + +static char * +merge_command(const char *command, const char *params) +{ + /* allocate extra space for ' ' and '\0' */ + char *cmd_line = (char *)Safe_alloc(strlen(command) + strlen(params) + 2); + sprintf(cmd_line, "%s %s", command, params); + + return cmd_line; +} + + +/*! + * check if path/command exist by converting it to short file name + * if it exists, compose with args and return it + */ + +static char * +compose_command_line(const char *path, const char *command, const char *args) +{ + unsigned len; + char cmdPath[PATH_MAX]; + char shortPath[PATH_MAX]; + + if (path != NULL) + SNPRINTF(cmdPath, sizeof cmdPath, + "%s" DIR_SEPARATOR_STRING "%s", path, command); + else + strncpyz(cmdPath, command, sizeof cmdPath); + + /* Try if cmdPath or cmdPath.exe exist by converting it to the short path name */ + len = GetShortPathName(cmdPath, shortPath, sizeof shortPath); + assert(len < sizeof shortPath); + if (0 == len) { + len = GetShortPathName(strncatz(cmdPath, EXE_EXT, sizeof cmdPath), shortPath, sizeof shortPath); + assert(len < sizeof shortPath); + } + if (0 != len) { + /* compose the command line */ + return merge_command(shortPath, args); + } + else { + /* path/command not found */ + return NULL; + } +} + + +static char * +get_path(const char *cmd) +{ + char *cmdLine; + char *command; + char *args; + char *path; + + /* get the command */ + split_command(cmd, &command, &args); + + if (NULL == (cmdLine = compose_command_line(NULL, command, args))) { + /* not an absolute path: try to find the command in predefined binary paths */ + if (NULL != (path = (char *)setFirstItem(binPathSet))) { + while (NULL == (cmdLine = compose_command_line(path, command, args)) && + NULL != (path = (char *)setNextItem(binPathSet))) + ; + } + + if (NULL == cmdLine) { + /* didn't found the command in predefined binary paths: try with PATH */ + char *envPath; + + if (NULL != (envPath = getenv("PATH"))) { + /* make a local copy; strtok() will modify it */ + envPath = Safe_strdup(envPath); + + if (NULL != (path = strtok(envPath, ";"))) { + while (NULL == (cmdLine = compose_command_line(path, command, args)) && + NULL != (path = strtok(NULL, ";"))) + ; + } + + Safe_free(envPath); + } + } + + /* didn't found it; probably this won't help neither :-( */ + if (NULL == cmdLine) + cmdLine = merge_command(command, args); + } + + Safe_free(command); + Safe_free(args); + + return cmdLine; +} + +#else +/* *nix version */ + +/*! + * merge command and parameters to command line + */ + +static char * +merge_command(const char *command, const char *params) +{ + /* allocate extra space for 2x'"', ' ' and '\0' */ + char *cmd_line = (char *)Safe_alloc(strlen(command) + strlen(params) + 4); + sprintf(cmd_line, "\"%s\" %s", command, params); + return cmd_line; +} + + +/*! + * check if the path is relative or absolute (if contains the dir separator) + */ + +static int +has_path(const char *path) +{ + return dbuf_splitPath(path, NULL, NULL); +} + + +static char * +get_path(const char *cmd) +{ + char *cmdLine = NULL; + char *command; + char *args; + char *path; + char cmdPath[PATH_MAX]; + + + /* get the command */ + split_command(cmd, &command, &args); + + if (!has_path(command)) { + /* try to find the command in predefined binary paths */ + if (NULL != (path = (char *)setFirstItem(binPathSet))) { + do + { + SNPRINTF(cmdPath, sizeof cmdPath, + "%s" DIR_SEPARATOR_STRING "%s", path, command); + + /* Try if cmdPath */ + if (0 == access(cmdPath, X_OK)) { + /* compose the command line */ + cmdLine = merge_command(cmdPath, args); + break; + } + } while (NULL != (path = (char *)setNextItem(binPathSet))); + } + if (NULL == cmdLine) + cmdLine = merge_command(command, args); + + Safe_free(command); + Safe_free(args); + + return cmdLine; + } + else { + /* + * the command is defined with absolute path: + * just return it + */ + Safe_free(command); + Safe_free(args); + + return Safe_strdup(cmd); + } +} +#endif + + +/*! + * call an external program with arguements + */ + +int +my_system(const char *cmd) +{ + int e; + char *cmdLine = get_path(cmd); + + assert(NULL != cmdLine); + + if (options.verboseExec) { + printf("+ %s\n", cmdLine); + } + + e = system(cmdLine); + + if (options.verboseExec && e) { + printf("+ %s returned errorcode %d\n", cmdLine, e); + } + + Safe_free(cmdLine); + + return e; +} + + +/*! + * pipe an external program with arguements + */ + +#ifdef _WIN32 +#define popen_read(cmd) _popen((cmd), "rt") +#else +#define popen_read(cmd) popen((cmd), "r") +#endif + +FILE * +my_popen(const char *cmd) +{ + FILE *fp; + char *cmdLine = get_path(cmd); + + assert(NULL != cmdLine); + + if (options.verboseExec) { + printf("+ %s\n", cmdLine); + } + + fp = popen_read(cmdLine); + Safe_free(cmdLine); + + return fp; +} diff --git a/support/Util/MySystem.h b/support/Util/MySystem.h new file mode 100644 index 0000000..7309fdd --- /dev/null +++ b/support/Util/MySystem.h @@ -0,0 +1,36 @@ +/*------------------------------------------------------------------------- + MySystem - SDCC Support function + + Written By - Sandeep Dutta . sandeep.dutta@usa.net (1999) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#ifndef __MYSYSTEM_H +#define __MYSYSTEM_H + +#include +#include "SDCCset.h" + +extern set *binPathSet; /* set of binary paths */ + +int my_system(const char *cmd); +FILE *my_popen(const char *cmd); + +#endif diff --git a/support/Util/NewAlloc.c b/support/Util/NewAlloc.c new file mode 100644 index 0000000..fb8a180 --- /dev/null +++ b/support/Util/NewAlloc.c @@ -0,0 +1,268 @@ +/* +=============================================================================== +NEWALLOC - SDCC Memory allocation functions + +These functions are wrappers for the standard malloc, realloc and free +functions. + + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + +=============================================================================== +*/ + +#include +#include +#include +#include +#include +#include "newalloc.h" + +#if OPT_ENABLE_LIBGC +#include + +#define MALLOC GC_malloc +#define REALLOC GC_realloc +/* PENDING: This is a mild hack. If we try to GC_free something + allocated with malloc() then the program will segfault. Might as + well drop it and let the garbase collector take care of things. +*/ +#define FREE(_a) + +#else + +#define MALLOC malloc +#define REALLOC realloc +#define FREE free + +#endif + +#define TRACEMALLOC 0 + +#if TRACEMALLOC +enum + { + TRACESIZE = 4096 + }; + +static int _allocs[TRACESIZE]; +static int _above; + +static void +_dumpTrace(int code, void *parg) +{ + int i; + for (i = 0; i < TRACESIZE; i++) + { + if (_allocs[i]) + { + printf("%u %u\n", _allocs[i], i); + } + } + printf("%u above\n", _above); +} + +static void +_log(int size) +{ + static int registered; + + if (registered == 0) + { + on_exit(_dumpTrace, NULL); + registered = 1; + } + if (size == 12) + { + _above++; + } + + if (size >= TRACESIZE) + { + _above++; + } + else + { + _allocs[size]++; + } +} +#endif + +/* +------------------------------------------------------------------------------- +Clear_realloc - Reallocate a memory block and clear any memory added with +out of memory error detection + +------------------------------------------------------------------------------- +*/ + +void *Clear_realloc(void *OldPtr,size_t OldSize,size_t NewSize) + +{ +void *NewPtr ; + +NewPtr = REALLOC(OldPtr,NewSize) ; + +if (!NewPtr) + { + printf("ERROR - No more memory\n") ; +/* werror(E_OUT_OF_MEM,__FILE__,NewSize);*/ + exit (1); + } + +if (NewPtr) + if (NewSize > OldSize) + memset((char *) NewPtr + OldSize,0x00,NewSize - OldSize) ; + +return NewPtr ; +} +/* +------------------------------------------------------------------------------- +Safe_realloc - Reallocate a memory block with out of memory error detection + +------------------------------------------------------------------------------- +*/ + +void *Safe_realloc(void *OldPtr,size_t NewSize) + +{ +void *NewPtr ; + +NewPtr = REALLOC(OldPtr,NewSize) ; + +if (!NewPtr) + { + printf("ERROR - No more memory\n") ; +/* werror(E_OUT_OF_MEM,__FILE__,NewSize);*/ + exit (1); + } + +return NewPtr ; +} +/* +------------------------------------------------------------------------------- +Safe_calloc - Allocate a block of memory from the application heap, clearing +all data to zero and checking for out of memory errors. + +------------------------------------------------------------------------------- +*/ + +void *Safe_calloc(size_t Elements,size_t Size) + +{ +void *NewPtr ; + +NewPtr = MALLOC(Elements*Size) ; +#if TRACEMALLOC + _log(Elements*Size); +#endif + +if (!NewPtr) + { + printf("ERROR - No more memory\n") ; +/* werror(E_OUT_OF_MEM,__FILE__,Size);*/ + exit (1); + } + + memset(NewPtr, 0, Elements*Size); + +return NewPtr ; +} +/* +------------------------------------------------------------------------------- +Safe_malloc - Allocate a block of memory from the application heap +and checking for out of memory errors. + +------------------------------------------------------------------------------- +*/ + +void *Safe_malloc(size_t Size) + +{ +void *NewPtr ; + +NewPtr = MALLOC(Size) ; + +#if TRACEMALLOC + _log(Size); +#endif + +if (!NewPtr) + { + printf("ERROR - No more memory\n") ; +/* werror(E_OUT_OF_MEM,__FILE__,Size);*/ + exit (1); + } + +return NewPtr ; +} + +void *Safe_alloc(size_t Size) +{ + return Safe_calloc(1, Size); +} + +void Safe_free(void *p) +{ + FREE(p); +} + +char *Safe_strdup(const char *sz) +{ + char *pret; + assert(sz); + + pret = Safe_alloc(strlen(sz) +1); + strcpy(pret, sz); + + return pret; +} + +void *traceAlloc(allocTrace *ptrace, void *p) +{ + assert(ptrace); + assert(p); + + /* Also handles where max == 0 */ + if (ptrace->num == ptrace->max) + { + /* Add an offset to handle max == 0 */ + ptrace->max = (ptrace->max+2)*2; + ptrace->palloced = Safe_realloc(ptrace->palloced, ptrace->max * sizeof(*ptrace->palloced)); + } + ptrace->palloced[ptrace->num++] = p; + + return p; +} + +void freeTrace(allocTrace *ptrace) +{ + int i; + assert(ptrace); + + for (i = 0; i < ptrace->num; i++) + { + Safe_free(ptrace->palloced[i]); + } + ptrace->num = 0; + + Safe_free(ptrace->palloced); + ptrace->palloced = NULL; + ptrace->max = 0; +} diff --git a/support/Util/dbuf.c b/support/Util/dbuf.c new file mode 100644 index 0000000..bf466e3 --- /dev/null +++ b/support/Util/dbuf.c @@ -0,0 +1,274 @@ +/* + dbuf.c - Dynamic buffer implementation + version 1.2.0, January 6th, 2007 + + Copyright (c) 2002-2007 Borut Razem + + This software is provided 'as-is', without any express or implied + warranty. In no event will the authors be held liable for any damages + arising from the use of this software. + + Permission is granted to anyone to use this software for any purpose, + including commercial applications, and to alter it and redistribute it + freely, subject to the following restrictions: + + 1. The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + 2. Altered source versions must be plainly marked as such, and must not be + misrepresented as being the original software. + 3. This notice may not be removed or altered from any source distribution. + + Borut Razem + borut.razem@siol.net +*/ + + +#include +#include +#include +#include "dbuf.h" + + +/* + * Assure that the buffer is large enough to hold + * current length + size bytes; enlarge it if necessary. + * + * Intended for internal use. + */ + +int _dbuf_expand(struct dbuf_s *dbuf, size_t size) +{ + assert(dbuf->alloc != 0); + assert(dbuf->buf != NULL); + + if (dbuf->len + size > dbuf->alloc) { + /* new_allocated_size = current_allocated_size * 2^n */ + /* can this be optimized? */ + do { + dbuf->alloc += dbuf->alloc; + } + while (dbuf->len + size > dbuf->alloc); + + if ((dbuf->buf = realloc(dbuf->buf, dbuf->alloc)) == NULL) + return 0; + } + + return 1; +} + + +/* + * Initialize the dbuf structure and + * allocate buffer to hold size bytes. + */ + +int dbuf_init(struct dbuf_s *dbuf, size_t size) +{ + assert(size != 0); + + if (size == 0) + size = 1; + + dbuf->len = 0; + dbuf->alloc = size; + return ((dbuf->buf = malloc(dbuf->alloc)) != NULL); +} + + +/* + * Allocate new dbuf structure on the heap + * and initialize it. + * + * See: dbuf_delete() + */ + +struct dbuf_s *dbuf_new(size_t size) +{ + struct dbuf_s *dbuf; + + dbuf = (struct dbuf_s *)malloc(sizeof(struct dbuf_s)); + if (dbuf != NULL) { + if (dbuf_init(dbuf, size) == 0) { + free(dbuf); + return NULL; + } + } + return dbuf; +} + + +/* + * Set the buffer size. Buffer size can be only decreased. + */ + +int dbuf_set_length(struct dbuf_s *dbuf, size_t len) +{ + assert(dbuf != NULL); + assert(dbuf->alloc != 0); + assert(len <= dbuf->len); + + if (len <= dbuf->len) { + dbuf->len = len; + return 1; + } + + return 0; +} + + +/* + * Append the buf to the end of the buffer. + */ + +int dbuf_append(struct dbuf_s *dbuf, const void *buf, size_t len) +{ + assert(dbuf != NULL); + assert(dbuf->alloc != 0); + assert(dbuf->buf != NULL); + + if (_dbuf_expand(dbuf, len) != 0) { + memcpy(&(((char *)dbuf->buf)[dbuf->len]), buf, len); + dbuf->len += len; + return 1; + } + + return 0; +} + + +/* + * Add '\0' character at the end of the buffer without + * count it in the dbuf->len. + */ + +const char *dbuf_c_str(struct dbuf_s *dbuf) +{ + assert(dbuf != NULL); + assert(dbuf->alloc != 0); + assert(dbuf->buf != NULL); + + if (_dbuf_expand(dbuf, 1) != 0) { + ((char *)dbuf->buf)[dbuf->len] = '\0'; + return dbuf->buf; + } + + return NULL; +} + + +/* + * Get the buffer pointer. + */ + +const void *dbuf_get_buf(struct dbuf_s *dbuf) +{ + assert(dbuf != NULL); + assert(dbuf->alloc != 0); + assert(dbuf->buf != NULL); + + return dbuf->buf; +} + + +/* + * Get the buffer length. + */ + +size_t dbuf_get_length(struct dbuf_s *dbuf) +{ + assert(dbuf != NULL); + assert(dbuf->alloc != 0); + assert(dbuf->buf != NULL); + + return dbuf->len; +} + + +/* + * Trim the allocated buffer to required size + */ + +int dbuf_trim(struct dbuf_s *dbuf) +{ + void *buf; + + assert(dbuf != NULL); + assert(dbuf->alloc != 0); + assert(dbuf->buf != NULL); + + buf = realloc(dbuf->buf, dbuf->len); + + if (buf != NULL) { + dbuf->alloc = dbuf->len; + dbuf->buf = buf; + } + + return buf != NULL; +} + + +/* + * Detach the buffer from dbuf structure. + * The dbuf structure can be reused by + * reinitializing it. + * + * See: dbuf_init() + */ + +void *dbuf_detach(struct dbuf_s *dbuf) +{ + void *ret; + + assert(dbuf != NULL); + assert(dbuf->alloc != 0); + assert(dbuf->buf != NULL); + + ret = dbuf->buf; + dbuf->buf = NULL; + dbuf->len = 0; + dbuf->alloc = 0; + + return ret; +} + + +/* + * Destroy the dbuf structure and + * free the buffer + */ + +void dbuf_destroy(struct dbuf_s *dbuf) +{ + free(dbuf_detach(dbuf)); +} + + +/* + * Delete dbuf structure on the heap: + * destroy it and free the allocated space. + * The user's responsablity is not to use + * the pointer any more: the best think to do + * is to set the pointer to NULL value. + * + * See dbuf_new() + */ + +void dbuf_delete(struct dbuf_s *dbuf) +{ + dbuf_destroy(dbuf); + free(dbuf); +} + + +/* + * Free detached buffer. + * + * See dbuf_detach() + */ + +void dbuf_free(const void *buf) +{ + free((void *)buf); +} diff --git a/support/Util/dbuf.h b/support/Util/dbuf.h new file mode 100644 index 0000000..8a9f26e --- /dev/null +++ b/support/Util/dbuf.h @@ -0,0 +1,62 @@ +/* + dbuf.h - Dynamic buffer interface + version 1.2.0, January 6th, 2007 + + Copyright (c) 2002-2007 Borut Razem + + This software is provided 'as-is', without any express or implied + warranty. In no event will the authors be held liable for any damages + arising from the use of this software. + + Permission is granted to anyone to use this software for any purpose, + including commercial applications, and to alter it and redistribute it + freely, subject to the following restrictions: + + 1. The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + 2. Altered source versions must be plainly marked as such, and must not be + misrepresented as being the original software. + 3. This notice may not be removed or altered from any source distribution. + + Borut Razem + borut.razem@siol.net +*/ + + +#ifndef __DBUF_H +#define __DBUF_H + +#include + +struct dbuf_s { + size_t alloc; /* size of allocated buffer in bytes */ + size_t len; /* actual length of the buffer in bytes */ + void *buf; /* pointer to the buffer, allocated on heap */ +}; + + +#ifdef __cplusplus +extern "C" { +#endif + +int _dbuf_expand(struct dbuf_s *dbuf, size_t size); +struct dbuf_s *dbuf_new(size_t size); +int dbuf_init(struct dbuf_s *dbuf, size_t size); +int dbuf_set_length(struct dbuf_s *dbuf, size_t size); +int dbuf_append(struct dbuf_s *dbuf, const void *buf, size_t len); +const void *dbuf_get_buf(struct dbuf_s *dbuf); +size_t dbuf_get_length(struct dbuf_s *dbuf); +const char *dbuf_c_str(struct dbuf_s *dbuf); +int dbuf_trim(struct dbuf_s *dbuf); +void *dbuf_detach(struct dbuf_s *dbuf); +void dbuf_destroy(struct dbuf_s *dbuf); +void dbuf_delete(struct dbuf_s *dbuf); +void dbuf_free(const void *buf); + +#ifdef __cplusplus +} +#endif + +#endif /* __DBUF_H */ diff --git a/support/Util/dbuf_string.c b/support/Util/dbuf_string.c new file mode 100644 index 0000000..c2de470 --- /dev/null +++ b/support/Util/dbuf_string.c @@ -0,0 +1,299 @@ +/* + dbuf_string.c - Append formatted string to the dynamic buffer + version 1.2.0, February 10th, 2008 + + Copyright (c) 2002-2008 Borut Razem + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, + Boston, MA 02110-1301, USA. +*/ + + +#include +#include +#include +#include +#include "dbuf_string.h" + + +/* + * Append string to the end of the buffer. + * The buffer is null terminated. + */ + +int +dbuf_append_str (struct dbuf_s *dbuf, const char *str) +{ + size_t len; + assert (str != NULL); + + len = strlen (str); + if (dbuf_append (dbuf, str, len + 1)) + { + --dbuf->len; + return 1; + } + else + return 0; +} + + +/* + * Append single character to the end of the buffer. + * The buffer is null terminated. + */ + +int +dbuf_append_char (struct dbuf_s *dbuf, char chr) +{ + char buf[2]; + buf[0] = chr; + buf[1] = '\0'; + if (dbuf_append (dbuf, buf, 2)) + { + --dbuf->len; + return 1; + } + else + return 0; +} + +/* + * Calculate length of the resulting formatted string. + * + * Borrowed from vasprintf.c + */ + +static int +calc_result_length (const char *format, va_list args) +{ + const char *p = format; + /* Add one to make sure that it is never zero, which might cause malloc + to return NULL. */ + int total_width = strlen (format) + 1; + va_list ap; + +#ifdef va_copy + va_copy (ap, args); +#else + memcpy (&ap, &args, sizeof (va_list)); +#endif + + while (*p != '\0') + { + if (*p++ == '%') + { + while (strchr ("-+ #0", *p)) + ++p; + if (*p == '*') + { + ++p; + total_width += abs (va_arg (ap, int)); + } + else + total_width += strtoul (p, (char **) &p, 10); + if (*p == '.') + { + ++p; + if (*p == '*') + { + ++p; + total_width += abs (va_arg (ap, int)); + } + else + total_width += strtoul (p, (char **) &p, 10); + } + while (strchr ("hlL", *p)) + ++p; + /* Should be big enough for any format specifier except %s and floats. */ + total_width += 30; + switch (*p) + { + case 'd': + case 'i': + case 'o': + case 'u': + case 'x': + case 'X': + case 'c': + (void) va_arg (ap, int); + break; + case 'f': + case 'e': + case 'E': + case 'g': + case 'G': + (void) va_arg (ap, double); + /* Since an ieee double can have an exponent of 307, we'll + make the buffer wide enough to cover the gross case. */ + total_width += 307; + break; + case 's': + total_width += strlen (va_arg (ap, char *)); + break; + case 'p': + case 'n': + (void) va_arg (ap, char *); + break; + } + p++; + } + } +#ifdef va_copy + va_end (ap); +#endif + return total_width; +} + + +/* + * Append the formatted string to the end of the buffer. + * The buffer is null terminated. + */ + +int +dbuf_vprintf (struct dbuf_s *dbuf, const char *format, va_list args) +{ + int size = calc_result_length (format, args); + + assert (dbuf != NULL); + assert (dbuf->alloc != 0); + assert (dbuf->buf != NULL); + + if (0 != _dbuf_expand (dbuf, size)) + { + int len = vsprintf (&(((char *)dbuf->buf)[dbuf->len]), format, args); + + if (len >= 0) + { + /* if written length is greater then the calculated one, + we have a buffer overrun! */ + assert (len <= size); + dbuf->len += len; + } + return len; + } + + return 0; +} + + +/* + * Append the formatted string to the end of the buffer. + * The buffer is null terminated. + */ + +int +dbuf_printf (struct dbuf_s *dbuf, const char *format, ...) +{ + va_list arg; + int len; + + va_start (arg, format); + len = dbuf_vprintf (dbuf, format, arg); + va_end (arg); + + return len; +} + + +/* + * Append line from file to the dynamic buffer + * The buffer is null terminated. + */ + +size_t +dbuf_getline (struct dbuf_s *dbuf, FILE *infp) +{ + int c; + char chr; + + while ((c = getc (infp)) != '\n' && c != EOF) + { + chr = c; + + dbuf_append (dbuf, &chr, 1); + } + + /* add trailing NL */ + if (c == '\n') + { + chr = c; + + dbuf_append (dbuf, &chr, 1); + } + + /* terminate the line without increasing the length */ + if (0 != _dbuf_expand (dbuf, 1)) + ((char *)dbuf->buf)[dbuf->len] = '\0'; + + return dbuf_get_length (dbuf); +} + + +/* + * Remove trailing newline from the string. + * The buffer is null terminated. + * It returns the total number of characters removed. + */ + +int +dbuf_chomp (struct dbuf_s *dbuf) +{ + size_t i = dbuf->len; + int ret; + + if ('\n' == ((char *)dbuf->buf)[i - 1]) + { + --i; + if ('\r' == ((char *)dbuf->buf)[i - 1]) + { + --i; + } + } + + ret = dbuf->len - i; + dbuf->len = i; + + /* terminate the line without increasing the length */ + if (_dbuf_expand(dbuf, 1) != 0) + ((char *)dbuf->buf)[dbuf->len] = '\0'; + + return ret; +} + + +/* + * Write dynamic buffer to the file. + */ + +void +dbuf_write (struct dbuf_s *dbuf, FILE *dest) +{ + fwrite (dbuf_get_buf (dbuf), 1, dbuf_get_length (dbuf), dest); +} + + +/* + * Write dynamic buffer to the file and destroy it. + */ + +void +dbuf_write_and_destroy (struct dbuf_s *dbuf, FILE *dest) +{ + dbuf_write (dbuf, dest); + + dbuf_destroy (dbuf); +} diff --git a/support/Util/dbuf_string.h b/support/Util/dbuf_string.h new file mode 100644 index 0000000..46442b5 --- /dev/null +++ b/support/Util/dbuf_string.h @@ -0,0 +1,66 @@ +/* + dbuf_string.h - Append formatted string to the dynamic buffer + version 1.2.0, February 10th, 2008 + + Copyright (c) 2002-2008 Borut Razem + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, + Boston, MA 02110-1301, USA. +*/ + + +#ifndef __DBUF_STRING_H +#define __DBUF_STRING_H + +#include +#include "dbuf.h" + +/* Attribute `nonnull' was valid as of gcc 3.3. */ +#ifndef ATTRIBUTE_NONNULL +# if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 3) +# define ATTRIBUTE_NONNULL(m) __attribute__ ((__nonnull__ (m))) +# else +# define ATTRIBUTE_NONNULL(m) +# endif /* GNUC >= 3.3 */ +#endif /* ATTRIBUTE_NONNULL */ + +/* The __-protected variants of `format' and `printf' attributes + are accepted by gcc versions 2.6.4 (effectively 2.7) and later. */ +#ifndef ATTRIBUTE_PRINTF +# if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 7) +# define ATTRIBUTE_PRINTF(m, n) __attribute__ ((__format__ (__printf__, m, n))) ATTRIBUTE_NONNULL(m) +#else +# define ATTRIBUTE_PRINTF(m, n) +# endif /* GNUC >= 2.7 */ +#endif /* ATTRIBUTE_PRINTF */ + +#ifdef __cplusplus +extern "C" { +#endif + +int dbuf_append_str(struct dbuf_s *dbuf, const char *str); +int dbuf_append_char(struct dbuf_s *dbuf, char chr); +int dbuf_vprintf(struct dbuf_s *dbuf, const char *format, va_list args); +int dbuf_printf (struct dbuf_s *dbuf, const char *format, ...) ATTRIBUTE_PRINTF(2, 3); +size_t dbuf_getline(struct dbuf_s *dbuf, FILE *infp); +int dbuf_chomp (struct dbuf_s *dbuf); +void dbuf_write (struct dbuf_s *dbuf, FILE *dest); +void dbuf_write_and_destroy (struct dbuf_s *dbuf, FILE *dest); + +#ifdef __cplusplus +} +#endif + +#endif /* __DBUF_STRING_H */ diff --git a/support/Util/findme.c b/support/Util/findme.c new file mode 100644 index 0000000..45c6352 --- /dev/null +++ b/support/Util/findme.c @@ -0,0 +1,56 @@ +/** \ingroup popt + * \file popt/findme.c + */ + +/* (C) 1998-2002 Red Hat, Inc. -- Licensing details are in the COPYING + file accompanying popt source distributions, available from + ftp://ftp.rpm.org/pub/rpm/dist. + + alloca replaced with malloc()/free() pair */ + +#include "system.h" +#include "findme.h" + +const char * findProgramPath(const char * argv0) { + char * path = getenv("PATH"); + char * pathbuf; + char * start, * chptr; + char * buf; + + if (argv0 == NULL) return NULL; /* XXX can't happen */ + /* If there is a / in the argv[0], it has to be an absolute path */ + if (strchr(argv0, '/')) + return xstrdup(argv0); + + if (path == NULL) return NULL; + + start = pathbuf = malloc(strlen(path) + 1); + if (pathbuf == NULL) return NULL; + buf = malloc(strlen(path) + strlen(argv0) + sizeof("/")); + if (buf == NULL) return NULL; /* XXX can't happen */ + strcpy(pathbuf, path); + + chptr = NULL; + /*@-branchstate@*/ + do { + if ((chptr = strchr(start, ':'))) + *chptr = '\0'; + sprintf(buf, "%s/%s", start, argv0); + + if (!access(buf, X_OK)) { + free(pathbuf); + return buf; + } + + if (chptr) + start = chptr + 1; + else + start = NULL; + } while (start && *start); + /*@=branchstate@*/ + + free(buf); + free(pathbuf); + + return NULL; +} diff --git a/support/Util/findme.h b/support/Util/findme.h new file mode 100644 index 0000000..a016b86 --- /dev/null +++ b/support/Util/findme.h @@ -0,0 +1,20 @@ +/** \ingroup popt + * \file popt/findme.h + */ + +/* (C) 1998-2000 Red Hat, Inc. -- Licensing details are in the COPYING + file accompanying popt source distributions, available from + ftp://ftp.rpm.org/pub/rpm/dist. */ + +#ifndef H_FINDME +#define H_FINDME + +/** + * Return absolute path to executable by searching PATH. + * @param argv0 name of executable + * @return (malloc'd) absolute path to executable (or NULL) + */ +/*@null@*/ const char * findProgramPath(/*@null@*/ const char * argv0) + /*@*/; + +#endif diff --git a/support/Util/newalloc.h b/support/Util/newalloc.h new file mode 100644 index 0000000..9e583c9 --- /dev/null +++ b/support/Util/newalloc.h @@ -0,0 +1,103 @@ +/* +=============================================================================== +NEWALLOC - SDCC Memory allocation functions + +These functions are wrappers for the standard malloc, realloc and free +functions. + + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! + +=============================================================================== +*/ + +#if !defined(_NewAlloc_H) + +#define _NewAlloc_H + +#include + +typedef struct _allocTrace +{ + int num; + int max; + void **palloced; +} allocTrace; + +/* +------------------------------------------------------------------------------- +Clear_realloc - Reallocate a memory block and clear any memory added with +out of memory error detection + +------------------------------------------------------------------------------- +*/ + +void *Clear_realloc(void *OldPtr,size_t OldSize,size_t NewSize) ; + +/* +------------------------------------------------------------------------------- +Safe_realloc - Reallocate a memory block with out of memory error detection + +------------------------------------------------------------------------------- +*/ + +void *Safe_realloc(void *OldPtr,size_t NewSize) ; + +/* +------------------------------------------------------------------------------- +Safe_calloc - Allocate a block of memory from the application heap, clearing +all data to zero and checking for out or memory errors. + +------------------------------------------------------------------------------- +*/ + +void *Safe_calloc(size_t Elements,size_t Size) ; + +/* +------------------------------------------------------------------------------- +Safe_malloc - Allocate a block of memory from the application heap +and checking for out or memory errors. + +------------------------------------------------------------------------------- +*/ + +void *Safe_malloc(size_t Size) ; + +/** Replacement for Safe_malloc that also zeros memory. To make it interchangable. + */ +void *Safe_alloc(size_t Size) ; + +/** Function to make the replacements complete. + */ +void Safe_free(void *p); + +/** Creates a copy of a string in a safe way. + */ +char *Safe_strdup(const char *sz); + +/** Logs the allocated memory 'p' in the given trace for batch freeing + later using freeTrace. +*/ +void *traceAlloc(allocTrace *ptrace, void *p); + +/** Frees all the memory logged in the trace and resets the trace. + */ +void freeTrace(allocTrace *ptrace); + +#endif diff --git a/support/Util/pstdint.h b/support/Util/pstdint.h new file mode 100644 index 0000000..3c53b2f --- /dev/null +++ b/support/Util/pstdint.h @@ -0,0 +1,678 @@ +/* A portable stdint.h + * + * Copyright (c) 2005 Paul Hsieh + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must not misrepresent the orignal + * source in the documentation and/or other materials provided + * with the distribution. + * + * The names of the authors not its contributors may be used to + * endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************** + * + * Version 0.1.5 + * + * The ANSI C standard committee, for the C99 standard, specified the + * inclusion of a new standard include file called stdint.h. This is + * a very useful and long desired include file which contains several + * very precise definitions for integer scalar types that is + * critically important for making portable several classes of + * applications including cryptography, hashing, variable length + * integer libraries and so on. But for most developers its likely + * useful just for programming sanity. + * + * The problem is that most compiler vendors have decided not to + * implement the C99 standard, and the next C++ language standard + * (which has a lot more mindshare these days) will be a long time in + * coming and its unknown whether or not it will include stdint.h or + * how much adoption it will have. Either way, it will be a long time + * before all compilers come with a stdint.h and it also does nothing + * for the extremely large number of compilers available today which + * do not include this file, or anything comparable to it. + * + * So that's what this file is all about. Its an attempt to build a + * single universal include file that works on as many platforms as + * possible to deliver what stdint.h is supposed to. A few things + * that should be noted about this file: + * + * 1) It is not guaranteed to be portable and/or present an identical + * interface on all platforms. The extreme variability of the + * ANSI C standard makes this an impossibility right from the + * very get go. Its really only meant to be useful for the vast + * majority of platforms that possess the capability of + * implementing usefully and precisely defined, standard sized + * integer scalars. Systems which are not intrinsically 2s + * complement may produce invalid constants. + * + * 2) There is an unavoidable use of non-reserved symbols. + * + * 3) Other standard include files are invoked. + * + * 4) This file may come in conflict with future platforms that do + * include stdint.h. The hope is that one or the other can be + * used with no real difference. + * + * 5) In the current verison, if your platform can't represent + * int32_t, int16_t and int8_t, it just dumps out with a compiler + * error. + * + * 6) 64 bit integers may or may not be defined. Test for their + * presence with the test: #ifdef INT64_MAX or #ifdef UINT64_MAX. + * Note that this is different from the C99 specification which + * requires the existence of 64 bit support in the compiler. If + * this is not defined for your platform, yet it is capable of + * dealing with 64 bits then it is because this file has not yet + * been extended to cover all of your system's capabilities. + * + * 7) (u)intptr_t may or may not be defined. Test for its presence + * with the test: #ifdef PTRDIFF_MAX. If this is not defined + * for your platform, then it is because this file has not yet + * been extended to cover all of your system's capabilities, not + * because its optional. + * + * 8) The following might not been defined even if your platform is + * capable of defining it: + * + * WCHAR_MIN + * WCHAR_MAX + * (u)int64_t + * PTRDIFF_MIN + * PTRDIFF_MAX + * (u)intptr_t + * + * 9) The following have not been defined: + * + * WINT_MIN + * WINT_MAX + * + * 10) The criteria for defining (u)int_least(*)_t isn't clear, + * except for systems which don't have a type that precisely + * defined 8, 16, or 32 bit types (which this include file does + * not support anyways). Default definitions have been given. + * + * 11) The criteria for defining (u)int_fast(*)_t isn't something I + * would trust to any particular compiler vendor or the ANSI C + * comittee. It is well known that "compatible systems" are + * commonly created that have very different performance + * characteristics from the systems they are compatible with, + * especially those whose vendors make both the compiler and the + * system. Default definitions have been given, but its strongly + * recommended that users never use these definitions for any + * reason (they do *NOT* deliver any serious guarantee of + * improved performance -- not in this file, nor any vendor's + * stdint.h). + * + * 12) The following macros: + * + * PRINTF_INTMAX_MODIFIER + * PRINTF_INT64_MODIFIER + * PRINTF_INT32_MODIFIER + * PRINTF_INT16_MODIFIER + * PRINTF_LEAST64_MODIFIER + * PRINTF_LEAST32_MODIFIER + * PRINTF_LEAST16_MODIFIER + * PRINTF_INTPTR_MODIFIER + * + * are strings which have been defined as the modifiers required + * for the "d", "u" and "x" printf formats to correctly output + * (u)intmax_t, (u)int64_t, (u)int32_t, (u)int16_t, (u)least64_t, + * (u)least32_t, (u)least16_t and (u)intptr_t types respectively. + * PRINTF_INTPTR_MODIFIER is not defined for some systems which + * provide their own stdint.h. PRINTF_INT64_MODIFIER is not + * defined if INT64_MAX is not defined. These are an extension + * beyond what C99 specifies must be in stdint.h. + * + * In addition, the following macros are defined: + * + * PRINTF_INTMAX_HEX_WIDTH + * PRINTF_INT64_HEX_WIDTH + * PRINTF_INT32_HEX_WIDTH + * PRINTF_INT16_HEX_WIDTH + * PRINTF_INT8_HEX_WIDTH + * PRINTF_INTMAX_DEC_WIDTH + * PRINTF_INT64_DEC_WIDTH + * PRINTF_INT32_DEC_WIDTH + * PRINTF_INT16_DEC_WIDTH + * PRINTF_INT8_DEC_WIDTH + * + * Which specifies the maximum number of characters required to + * print the number of that type in either hexadecimal or decimal. + * These are an extension beyond what C99 specifies must be in + * stdint.h. + * + * Compilers tested (all with 0 warnings at their highest respective + * settings): Borland Turbo C 2.0, WATCOM C/C++ 11.0 (16 bits and 32 + * bits), Microsoft Visual C++ 6.0 (32 bit), Microsoft Visual Studio + * .net (VC7), Intel C++ 4.0, GNU gcc v3.3.3 + * + * This file should be considered a work in progress. Suggestions for + * improvements, especially those which increase coverage are strongly + * encouraged. + * + * Acknowledgements + * + * The following people have made significant contributions to the + * development and testing of this file: + * + * Chris Howie + * John Steele Scott + * + */ + +#include +#include +#include + +/* + * For gcc with _STDINT_H, fill in the PRINTF_INT*_MODIFIER macros, and + * do nothing else. + */ + +#if ((defined(__STDC__) && __STDC__ && __STDC_VERSION__ >= 199901L) || (defined(__GNUC__) && defined(_STDINT_H))) && !defined (_PSTDINT_H_INCLUDED) +#include +#define _PSTDINT_H_INCLUDED +# ifndef PRINTF_INT64_MODIFIER +# define PRINTF_INT64_MODIFIER "ll" +# endif +# ifndef PRINTF_INT32_MODIFIER +# define PRINTF_INT32_MODIFIER "l" +# endif +# ifndef PRINTF_INT16_MODIFIER +# define PRINTF_INT16_MODIFIER "h" +# endif +# ifndef PRINTF_INTMAX_MODIFIER +# define PRINTF_INTMAX_MODIFIER PRINTF_INT64_MODIFIER +# endif +# ifndef PRINTF_INT64_HEX_WIDTH +# define PRINTF_INT64_HEX_WIDTH "16" +# endif +# ifndef PRINTF_INT32_HEX_WIDTH +# define PRINTF_INT32_HEX_WIDTH "8" +# endif +# ifndef PRINTF_INT16_HEX_WIDTH +# define PRINTF_INT16_HEX_WIDTH "4" +# endif +# ifndef PRINTF_INT8_HEX_WIDTH +# define PRINTF_INT8_HEX_WIDTH "2" +# endif +# ifndef PRINTF_INT64_DEC_WIDTH +# define PRINTF_INT64_DEC_WIDTH "20" +# endif +# ifndef PRINTF_INT32_DEC_WIDTH +# define PRINTF_INT32_DEC_WIDTH "10" +# endif +# ifndef PRINTF_INT16_DEC_WIDTH +# define PRINTF_INT16_DEC_WIDTH "5" +# endif +# ifndef PRINTF_INT8_DEC_WIDTH +# define PRINTF_INT8_DEC_WIDTH "3" +# endif +# ifndef PRINTF_INTMAX_HEX_WIDTH +# define PRINTF_INTMAX_HEX_WIDTH PRINTF_INT64_HEX_WIDTH +# endif +# ifndef PRINTF_INTMAX_DEC_WIDTH +# define PRINTF_INTMAX_DEC_WIDTH PRINTF_INT64_DEC_WIDTH +# endif +#endif + +#ifndef _PSTDINT_H_INCLUDED +#define _PSTDINT_H_INCLUDED + +#ifndef SIZE_MAX +# define SIZE_MAX (~(size_t)0) +#endif + +/* + * Deduce the type assignments from limits.h under the assumption that + * integer sizes in bits are powers of 2, and follow the ANSI + * definitions. + */ + +#ifndef UINT8_MAX +# define UINT8_MAX 0xff +#endif +#ifndef uint8_t +# if (UCHAR_MAX == UINT8_MAX) || defined (S_SPLINT_S) + typedef unsigned char uint8_t; +# define UINT8_C(v) ((uint8_t) v) +# else +# error "Platform not supported" +# endif +#endif + +#ifndef INT8_MAX +# define INT8_MAX 0x7f +#endif +#ifndef INT8_MIN +# define INT8_MIN INT8_C(0x80) +#endif +#ifndef int8_t +# if (SCHAR_MAX == INT8_MAX) || defined (S_SPLINT_S) + typedef signed char int8_t; +# define INT8_C(v) ((int8_t) v) +# else +# error "Platform not supported" +# endif +#endif + +#ifndef UINT16_MAX +# define UINT16_MAX 0xffff +#endif +#ifndef uint16_t +#if (UINT_MAX == UINT16_MAX) || defined (S_SPLINT_S) + typedef unsigned int uint16_t; +# ifndef PRINTF_INT16_MODIFIER +# define PRINTF_INT16_MODIFIER "" +# endif +# define UINT16_C(v) ((uint16_t) (v)) +#elif (USHRT_MAX == UINT16_MAX) + typedef unsigned short uint16_t; +# define UINT16_C(v) ((uint16_t) (v)) +# ifndef PRINTF_INT16_MODIFIER +# define PRINTF_INT16_MODIFIER "h" +# endif +#else +#error "Platform not supported" +#endif +#endif + +#ifndef INT16_MAX +# define INT16_MAX 0x7fff +#endif +#ifndef INT16_MIN +# define INT16_MIN INT16_C(0x8000) +#endif +#ifndef int16_t +#if (INT_MAX == INT16_MAX) || defined (S_SPLINT_S) + typedef signed int int16_t; +# define INT16_C(v) ((int16_t) (v)) +# ifndef PRINTF_INT16_MODIFIER +# define PRINTF_INT16_MODIFIER "" +# endif +#elif (SHRT_MAX == INT16_MAX) + typedef signed short int16_t; +# define INT16_C(v) ((int16_t) (v)) +# ifndef PRINTF_INT16_MODIFIER +# define PRINTF_INT16_MODIFIER "h" +# endif +#else +#error "Platform not supported" +#endif +#endif + +#ifndef UINT32_MAX +# define UINT32_MAX (0xffffffffUL) +#endif +#ifndef uint32_t +#if (ULONG_MAX == UINT32_MAX) || defined (S_SPLINT_S) + typedef unsigned long uint32_t; +# define UINT32_C(v) v ## UL +# ifndef PRINTF_INT32_MODIFIER +# define PRINTF_INT32_MODIFIER "l" +# endif +#elif (UINT_MAX == UINT32_MAX) + typedef unsigned int uint32_t; +# ifndef PRINTF_INT32_MODIFIER +# define PRINTF_INT32_MODIFIER "" +# endif +# define UINT32_C(v) v ## U +#elif (USHRT_MAX == UINT32_MAX) + typedef unsigned short uint32_t; +# define UINT32_C(v) ((unsigned short) (v)) +# ifndef PRINTF_INT32_MODIFIER +# define PRINTF_INT32_MODIFIER "" +# endif +#else +#error "Platform not supported" +#endif +#endif + +#ifndef INT32_MAX +# define INT32_MAX (0x7fffffffL) +#endif +#ifndef INT32_MIN +# define INT32_MIN INT32_C(0x80000000) +#endif +#ifndef int32_t +#if (LONG_MAX == INT32_MAX) || defined (S_SPLINT_S) + typedef signed long int32_t; +# define INT32_C(v) v ## L +# ifndef PRINTF_INT32_MODIFIER +# define PRINTF_INT32_MODIFIER "l" +# endif +#elif (INT_MAX == INT32_MAX) + typedef signed int int32_t; +# define INT32_C(v) v +# ifndef PRINTF_INT32_MODIFIER +# define PRINTF_INT32_MODIFIER "" +# endif +#elif (SHRT_MAX == INT32_MAX) + typedef signed short int32_t; +# define INT32_C(v) ((short) (v)) +# ifndef PRINTF_INT32_MODIFIER +# define PRINTF_INT32_MODIFIER "" +# endif +#else +#error "Platform not supported" +#endif +#endif + +/* + * The macro stdint_int64_defined is temporarily used to record + * whether or not 64 integer support is available. It must be + * defined for any 64 integer extensions for new platforms that are + * added. + */ + +#undef stdint_int64_defined +#if (defined(__STDC__) && defined(__STDC_VERSION__)) || defined (S_SPLINT_S) +# if (__STDC__ && __STDC_VERSION >= 199901L) || defined (S_SPLINT_S) +# define stdint_int64_defined + typedef long long int64_t; + typedef unsigned long long uint64_t; +# define UINT64_C(v) v ## ULL +# define INT64_C(v) v ## LL +# ifndef PRINTF_INT64_MODIFIER +# define PRINTF_INT64_MODIFIER "ll" +# endif +# endif +#endif + +#if !defined (stdint_int64_defined) +# if defined(__GNUC__) +# define stdint_int64_defined + __extension__ typedef long long int64_t; + __extension__ typedef unsigned long long uint64_t; +# define UINT64_C(v) v ## ULL +# define INT64_C(v) v ## LL +# ifndef PRINTF_INT64_MODIFIER +# define PRINTF_INT64_MODIFIER "ll" +# endif +# elif defined(__MWERKS__) || defined (__SUNPRO_C) || defined (__SUNPRO_CC) || defined (__APPLE_CC__) || defined (_LONG_LONG) || defined (_CRAYC) || defined (S_SPLINT_S) +# define stdint_int64_defined + typedef long long int64_t; + typedef unsigned long long uint64_t; +# define UINT64_C(v) v ## ULL +# define INT64_C(v) v ## LL +# ifndef PRINTF_INT64_MODIFIER +# define PRINTF_INT64_MODIFIER "ll" +# endif +# elif (defined(__WATCOMC__) && defined(__WATCOM_INT64__)) || (defined(_MSC_VER) && _INTEGRAL_MAX_BITS >= 64) || (defined (__BORLANDC__) && __BORLANDC__ > 0x460) || defined (__alpha) || defined (__DECC) +# define stdint_int64_defined + typedef __int64 int64_t; + typedef unsigned __int64 uint64_t; +# define UINT64_C(v) v ## UI64 +# define INT64_C(v) v ## I64 +# ifndef PRINTF_INT64_MODIFIER +# define PRINTF_INT64_MODIFIER "I64" +# endif +# endif +#endif + +#if !defined (LONG_LONG_MAX) && defined (INT64_C) +# define LONG_LONG_MAX INT64_C (9223372036854775807) +#endif +#ifndef ULONG_LONG_MAX +# define ULONG_LONG_MAX UINT64_C (18446744073709551615) +#endif + +#if !defined (INT64_MAX) && defined (INT64_C) +# define INT64_MAX INT64_C (9223372036854775807) +#endif +#if !defined (INT64_MIN) && defined (INT64_C) +# define INT64_MIN INT64_C (-9223372036854775808) +#endif +#if !defined (UINT64_MAX) && defined (INT64_C) +# define UINT64_MAX UINT64_C (18446744073709551615) +#endif + +/* + * Width of hexadecimal for number field. + */ + +#ifndef PRINTF_INT64_HEX_WIDTH +# define PRINTF_INT64_HEX_WIDTH "16" +#endif +#ifndef PRINTF_INT32_HEX_WIDTH +# define PRINTF_INT32_HEX_WIDTH "8" +#endif +#ifndef PRINTF_INT16_HEX_WIDTH +# define PRINTF_INT16_HEX_WIDTH "4" +#endif +#ifndef PRINTF_INT8_HEX_WIDTH +# define PRINTF_INT8_HEX_WIDTH "2" +#endif + +#ifndef PRINTF_INT64_DEC_WIDTH +# define PRINTF_INT64_DEC_WIDTH "20" +#endif +#ifndef PRINTF_INT32_DEC_WIDTH +# define PRINTF_INT32_DEC_WIDTH "10" +#endif +#ifndef PRINTF_INT16_DEC_WIDTH +# define PRINTF_INT16_DEC_WIDTH "5" +#endif +#ifndef PRINTF_INT8_DEC_WIDTH +# define PRINTF_INT8_DEC_WIDTH "3" +#endif + +/* + * Ok, lets not worry about 128 bit integers for now. Moore's law says + * we don't need to worry about that until about 2040 at which point + * we'll have bigger things to worry about. + */ + +#ifdef stdint_int64_defined + typedef int64_t intmax_t; + typedef uint64_t uintmax_t; +# define INTMAX_MAX INT64_MAX +# define INTMAX_MIN INT64_MIN +# define UINTMAX_MAX UINT64_MAX +# define UINTMAX_C(v) UINT64_C(v) +# define INTMAX_C(v) INT64_C(v) +# ifndef PRINTF_INTMAX_MODIFIER +# define PRINTF_INTMAX_MODIFIER PRINTF_INT64_MODIFIER +# endif +# ifndef PRINTF_INTMAX_HEX_WIDTH +# define PRINTF_INTMAX_HEX_WIDTH PRINTF_INT64_HEX_WIDTH +# endif +# ifndef PRINTF_INTMAX_DEC_WIDTH +# define PRINTF_INTMAX_DEC_WIDTH PRINTF_INT64_DEC_WIDTH +# endif +#else + typedef int32_t intmax_t; + typedef uint32_t uintmax_t; +# define INTMAX_MAX INT32_MAX +# define UINTMAX_MAX UINT32_MAX +# define UINTMAX_C(v) UINT32_C(v) +# define INTMAX_C(v) INT32_C(v) +# ifndef PRINTF_INTMAX_MODIFIER +# define PRINTF_INTMAX_MODIFIER PRINTF_INT32_MODIFIER +# endif +# ifndef PRINTF_INTMAX_HEX_WIDTH +# define PRINTF_INTMAX_HEX_WIDTH PRINTF_INT32_HEX_WIDTH +# endif +# ifndef PRINTF_INTMAX_DEC_WIDTH +# define PRINTF_INTMAX_DEC_WIDTH PRINTF_INT32_DEC_WIDTH +# endif +#endif + +/* + * Because this file currently only supports platforms which have + * precise powers of 2 as bit sizes for the default integers, the + * least definitions are all trivial. Its possible that a future + * version of this file could have different definitions. + */ + +#ifndef stdint_least_defined + typedef int8_t int_least8_t; + typedef uint8_t uint_least8_t; + typedef int16_t int_least16_t; + typedef uint16_t uint_least16_t; + typedef int32_t int_least32_t; + typedef uint32_t uint_least32_t; +# define PRINTF_LEAST32_MODIFIER PRINTF_INT32_MODIFIER +# define PRINTF_LEAST16_MODIFIER PRINTF_INT16_MODIFIER +# define UINT_LEAST8_MAX UINT8_MAX +# define INT_LEAST8_MAX INT8_MAX +# define UINT_LEAST16_MAX UINT16_MAX +# define INT_LEAST16_MAX INT16_MAX +# define UINT_LEAST32_MAX UINT32_MAX +# define INT_LEAST32_MAX INT32_MAX +# define INT_LEAST8_MIN INT8_MIN +# define INT_LEAST16_MIN INT16_MIN +# define INT_LEAST32_MIN INT32_MIN +# ifdef stdint_int64_defined + typedef int64_t int_least64_t; + typedef uint64_t uint_least64_t; +# define PRINTF_LEAST64_MODIFIER PRINTF_INT64_MODIFIER +# define UINT_LEAST64_MAX UINT64_MAX +# define INT_LEAST64_MAX INT64_MAX +# define INT_LEAST64_MIN INT64_MIN +# endif +#endif +#undef stdint_least_defined + +/* + * The ANSI C committee pretending to know or specify anything about + * performance is the epitome of misguided arrogance. The mandate of + * this file is to *ONLY* ever support that absolute minimum + * definition of the fast integer types, for compatibility purposes. + * No extensions, and no attempt to suggest what may or may not be a + * faster integer type will ever be made in this file. Developers are + * warned to stay away from these types when using this or any other + * stdint.h. + */ + +typedef int_least8_t int_fast8_t; +typedef uint_least8_t uint_fast8_t; +typedef int_least16_t int_fast16_t; +typedef uint_least16_t uint_fast16_t; +typedef int_least32_t int_fast32_t; +typedef uint_least32_t uint_fast32_t; +#define UINT_FAST8_MAX UINT_LEAST8_MAX +#define INT_FAST8_MAX INT_LEAST8_MAX +#define UINT_FAST16_MAX UINT_LEAST16_MAX +#define INT_FAST16_MAX INT_LEAST16_MAX +#define UINT_FAST32_MAX UINT_LEAST32_MAX +#define INT_FAST32_MAX INT_LEAST32_MAX +#define INT_FAST8_MIN IN_LEASTT8_MIN +#define INT_FAST16_MIN INT_LEAST16_MIN +#define INT_FAST32_MIN INT_LEAST32_MIN +#ifdef stdint_int64_defined + typedef int_least64_t int_fast64_t; + typedef uint_least64_t uint_fast64_t; +# define UINT_FAST64_MAX UINT_LEAST64_MAX +# define INT_FAST64_MAX INT_LEAST64_MAX +# define INT_FAST64_MIN INT_LEAST64_MIN +#endif + +#undef stdint_int64_defined + +/* + * Whatever piecemeal, per compiler thing we can do about the wchar_t + * type limits. + */ + +#if defined(__WATCOMC__) || defined(_MSC_VER) || defined (__GNUC__) +# include +# ifndef WCHAR_MIN +# define WCHAR_MIN 0 +# endif +# ifndef WCHAR_MAX +# define WCHAR_MAX ((wchar_t)-1) +# endif +#endif + +/* + * Whatever piecemeal, per compiler/platform thing we can do about the + * (u)intptr_t types and limits. + */ + +#if defined (_MSC_VER) && defined (_UINTPTR_T_DEFINED) +# define STDINT_H_UINTPTR_T_DEFINED +#endif + +#ifndef STDINT_H_UINTPTR_T_DEFINED +# if defined (__alpha__) || defined (__ia64__) || defined (__x86_64__) || defined (_WIN64) +# define stdint_intptr_bits 64 +# elif defined (__WATCOMC__) || defined (__TURBOC__) +# if defined(__TINY__) || defined(__SMALL__) || defined(__MEDIUM__) +# define stdint_intptr_bits 16 +# else +# define stdint_intptr_bits 32 +# endif +# elif defined (__i386__) || defined (_WIN32) || defined (WIN32) +# define stdint_intptr_bits 32 +# elif defined (__INTEL_COMPILER) +/* TODO -- what will Intel do about x86-64? */ +# endif + +# ifdef stdint_intptr_bits +# define stdint_intptr_glue3_i(a,b,c) a##b##c +# define stdint_intptr_glue3(a,b,c) stdint_intptr_glue3_i(a,b,c) +# ifndef PRINTF_INTPTR_MODIFIER +# define PRINTF_INTPTR_MODIFIER stdint_intptr_glue3(PRINTF_INT,stdint_intptr_bits,_MODIFIER) +# endif +# ifndef PTRDIFF_MAX +# define PTRDIFF_MAX stdint_intptr_glue3(INT,stdint_intptr_bits,_MAX) +# endif +# ifndef PTRDIFF_MIN +# define PTRDIFF_MIN stdint_intptr_glue3(INT,stdint_intptr_bits,_MIN) +# endif +# ifndef UINTPTR_MAX +# define UINTPTR_MAX stdint_intptr_glue3(UINT,stdint_intptr_bits,_MAX) +# endif +# ifndef INTPTR_MAX +# define INTPTR_MAX stdint_intptr_glue3(INT,stdint_intptr_bits,_MAX) +# endif +# ifndef INTPTR_MIN +# define INTPTR_MIN stdint_intptr_glue3(INT,stdint_intptr_bits,_MIN) +# endif +# ifndef INTPTR_C +# define INTPTR_C(x) stdint_intptr_glue3(INT,stdint_intptr_bits,_C)(x) +# endif +# ifndef UINTPTR_C +# define UINTPTR_C(x) stdint_intptr_glue3(UINT,stdint_intptr_bits,_C)(x) +# endif + typedef stdint_intptr_glue3(uint,stdint_intptr_bits,_t) uintptr_t; + typedef stdint_intptr_glue3( int,stdint_intptr_bits,_t) intptr_t; +# else +/* TODO -- This following is likely wrong for some platforms, and does + nothing for the definition of uintptr_t. */ + typedef ptrdiff_t intptr_t; +# endif +# define STDINT_H_UINTPTR_T_DEFINED +#endif + +/* + * Assumes sig_atomic_t is signed and we have a 2s complement machine. + */ + +#ifndef SIG_ATOMIC_MAX +# define SIG_ATOMIC_MAX ((((sig_atomic_t) 1) << (sizeof (sig_atomic_t)*CHAR_BIT-1)) - 1) +#endif + +#endif diff --git a/support/Util/system.h b/support/Util/system.h new file mode 100644 index 0000000..6bb01cd --- /dev/null +++ b/support/Util/system.h @@ -0,0 +1,37 @@ +/* + system.h - includes, required by findme.c + + Copyright (c) 2004 Borut Razem + + This software is provided 'as-is', without any express or implied + warranty. In no event will the authors be held liable for any damages + arising from the use of this software. + + Permission is granted to anyone to use this software for any purpose, + including commercial applications, and to alter it and redistribute it + freely, subject to the following restrictions: + + 1. The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + 2. Altered source versions must be plainly marked as such, and must not be + misrepresented as being the original software. + 3. This notice may not be removed or altered from any source distribution. + + Borut Razem + borut.razem@siol.net +*/ + +#ifndef _SYSTEM_H +#define _SYSTEM_H + +/* findme.c is compiled only on *nix, so includes are *nix specific */ +#include +#include +#include +#include + +#define xstrdup(_str) strdup(_str) + +#endif /* _SYSTEM_H */ diff --git a/support/cpp/Makefile.bcc b/support/cpp/Makefile.bcc new file mode 100644 index 0000000..fcdd33a --- /dev/null +++ b/support/cpp/Makefile.bcc @@ -0,0 +1,85 @@ +# Makefile for Borlad C++ + +PRJDIR = ../.. + +!include $(PRJDIR)/Bcc.inc + +CFLAGS = $(CFLAGS) -I. -I./libiberty -I./libcpp -I./libcpp/include -DHAVE_CONFIG_H +AWK = gawk + +LIBCPP_OBJS = charset.obj directives.obj errors.obj expr.obj files.obj identifiers.obj \ + init.obj lex.obj line-map.obj macro.obj mkdeps.obj symtab.obj traditional.obj + +LIBIBERTY_OBJS = concat.obj fopen_unlocked.obj getpwd.obj hashtab.obj hex.obj \ + lbasename.obj md5.obj obstack.obj safe-ctype.obj splay-tree.obj \ + vasprintf.obj xexit.obj xmalloc.obj xmemdup.obj xstrdup.obj \ + xstrerror.obj + +SDCC_OBJS = sdcpp.obj sdcpp-opts.obj c-ppoutput.obj cppdefault.obj prefix.obj \ + version.obj opts.obj options.obj c-incpath.obj + +OBJECTS = $(SDCC_OBJS) $(LIBCPP_OBJS) $(LIBIBERTY_OBJS) + +TARGET = $(PRJDIR)/bin/sdcpp.exe + +all: $(TARGET) + +auto-host.h: auto-host_vc_in.h + copy auto-host_vc_in.h auto-host.h > nul + +########################## +# Libcpp + +charset.obj: libcpp\charset.c +directives.obj: libcpp\directives.c +errors.obj: libcpp\errors.c +expr.obj: libcpp\expr.c +files.obj: libcpp\files.c +identifiers.obj: libcpp\identifiers.c +init.obj: libcpp\init.c +lex.obj: libcpp\lex.c +line-map.obj: libcpp\line-map.c +macro.obj: libcpp\macro.c +mkdeps.obj: libcpp\mkdeps.c +symtab.obj: libcpp\symtab.c +traditional.obj: libcpp\traditional.c + +########################## +# Libiberty + +concat.obj: libiberty\concat.c +fopen_unlocked.obj: libiberty\fopen_unlocked.c +getpwd.obj: libiberty\getpwd.c +hashtab.obj: libiberty\hashtab.c +hex.obj: libiberty\hex.c +lbasename.obj: libiberty\lbasename.c +md5.obj: libiberty\md5.c +obstack.obj: libiberty\obstack.c +safe-ctype.obj: libiberty\safe-ctype.c +splay-tree.obj: libiberty\splay-tree.c +vasprintf.obj: libiberty\vasprintf.c +xexit.obj: libiberty\xexit.c +xmalloc.obj: libiberty\xmalloc.c +xmemdup.obj: libiberty\xmemdup.c +xstrdup.obj: libiberty\xstrdup.c +xstrerror.obj: libiberty\xstrerror.c + +########################## +# Sdcpp + +$(TARGET): auto-host.h $(OBJECTS) + $(CC) $(CFLAGS) -e$(TARGET) $(OBJECTS) + +optionlist.tmp: + $(AWK) -f opt-gather.awk sdcpp.opt > optionlist.tmp + +options.c: optionlist.tmp + $(AWK) -f opt-functions.awk -f optc-gen.awk -v header_name="config.h system.h options.h" optionlist.tmp > options.c + +options.h: optionlist.tmp + $(AWK) -f opt-functions.awk -f opth-gen.awk optionlist.tmp > options.h + +sdcpp.obj: sdcpp.c options.h +sdcpp-opts.obj: sdcpp-opts.c options.h +options.obj: options.c options.h +opts.obj: opts.c options.h diff --git a/support/cpp/Makefile.in b/support/cpp/Makefile.in new file mode 100644 index 0000000..c1f83d5 --- /dev/null +++ b/support/cpp/Makefile.in @@ -0,0 +1,368 @@ +# Makefile for GNU C Preprocessor. +# +# hacked from gcc Makefile by kvigor. +# +# Copyright (C) 1987, 1988, 1990, 1991, 1992, 1993, 1994, 1995 +# 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. + +#This file is part of GNU CC. + +#GNU CC is free software; you can redistribute it and/or modify +#it under the terms of the GNU General Public License as published by +#the Free Software Foundation; either version 2, or (at your option) +#any later version. + +#GNU CC is distributed in the hope that it will be useful, +#but WITHOUT ANY WARRANTY; without even the implied warranty of +#MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +#GNU General Public License for more details. + +#You should have received a copy of the GNU General Public License +#along with GNU CC; see the file COPYING. If not, write to +#the Free Software Foundation, 59 Temple Place - Suite 330, +#Boston MA 02111-1307, USA. + +EXEEXT = @EXEEXT@ +TARGET = ../../bin/sdcpp$(EXEEXT) + +VPATH = @srcdir@ + +# This is the default target. +all: $(TARGET) + +# Directory where sources are, from where we are. +srcdir = @srcdir@ + + + +LIBS = @LIBS@ +CFLAGS = @CFLAGS@ -Wall +ALL_CFLAGS = $(INTERNAL_CFLAGS) $(X_CFLAGS) $(T_CFLAGS) \ + $(CFLAGS) $(WARN_CFLAGS) $(XCFLAGS) @DEFS@ +ALL_CPPFLAGS = $(CPPFLAGS) $(X_CPPFLAGS) $(T_CPPFLAGS) +LDFLAGS = @LDFLAGS@ + +AWK = @AWK@ +CC = @CC@ +AR = ar +AR_FLAGS = rc +RANLIB = @RANLIB@ +SHELL = /bin/sh +STRIP = @STRIP@ +# on sysV, define this as cp. +INSTALL = @INSTALL@ +# Some systems may be missing symbolic links, regular links, or both. +# Allow configure to check this and use "ln -s", "ln", or "cp" as appropriate. +LN=@LN@ +LN_S=@LN_S@ +# These permit overriding just for certain files. +INSTALL_PROGRAM = @INSTALL_PROGRAM@ +INSTALL_DATA = @INSTALL_DATA@ +@SET_MAKE@ +# Some compilers can't handle cc -c blah.c -o foo/blah.o. +# In stage2 and beyond, we force this to "-o $@" since we know we're using gcc. +OUTPUT_OPTION = @OUTPUT_OPTION@ + +# Some versions of `touch' (such as the version on Solaris 2.8) +# do not correctly set the timestamp due to buggy versions of `utime' +# in the kernel. So, we use `echo' instead. +STAMP = echo timestamp > + +# Where to find some libiberty headers. +LIBIBERTY_DIR = $(srcdir)/libiberty +LIBCPP_DIR = $(srcdir)/libcpp +OBSTACK_H = $(LIBIBERTY_DIR)/obstack.h +SPLAY_TREE_H= $(LIBIBERTY_DIR)/splay-tree.h + +# Test to see whether exists in the system header files. +LIMITS_H_TEST = [ -f $(SYSTEM_HEADER_DIR)/limits.h ] + +# Common prefix for installation directories. +# NOTE: This directory must exist when you start installation. +prefix = @prefix@ +# Directory in which to put localized header files. On the systems with +# gcc as the native cc, `local_prefix' may not be `prefix' which is +# `/usr'. +# NOTE: local_prefix *should not* default from prefix. +local_prefix = @local_prefix@ +# Directory in which to put host dependent programs and libraries +exec_prefix = @exec_prefix@ +# Directory in which to put the executable for the command `gcc' +bindir = @bindir@ +includedir = $(local_prefix)/include +# where the info files go +exeext = @host_exeext@ + +transform = @program_transform_name@ +lang_opt_files=$(srcdir)/sdcpp.opt + +# All option source files +ALL_OPT_FILES=$(lang_opt_files) $(extra_opt_files) + +# Top build directory, relative to here. +top_builddir = @top_builddir@ + +# Whether we were configured with NLS. +USE_NLS = @USE_NLS@ + +# Internationalization library. +INTLLIBS = @INTLLIBS@ + +# Change this to a null string if obstacks are installed in the +# system library. +OBSTACK=obstack.o + +# End of variables for you to override. + +install: all + mkdir -p $(DESTDIR)$(bindir) + $(INSTALL) $(TARGET) `echo $(DESTDIR)$(bindir)/sdcpp$(EXEEXT)|sed '$(transform)'` + $(STRIP) `echo $(DESTDIR)$(bindir)/sdcpp$(EXEEXT)|sed '$(transform)'` + +uninstall: + rm -f $(DESTDIR)$(bindir)/sdcpp$(EXEEXT) +clean: + -rm -f $(TARGET) *.o core libcpp.a + rm -f s-options optionlist options.h s-options-h options.c + +distclean: clean + -rm -f auto-host.h auto-build.h cstamp-h Makefile + config.status config.run config.cache config.bak config.log *~ + +# This tells GNU Make version 3 not to put all variables in the environment. +.NOEXPORT: + +# GCONFIG_H lists the config files that the generator files depend on, while +# CONFIG_H lists the the ones ordinary gcc files depend on, which includes +# a file generated by gencodes. +CONFIG_H = config.h +SYSTEM_H = system.h hwint.h + +# sed inserts variable overrides after the following line. +####target overrides +#@target_overrides@ + +####host overrides +#@host_overrides@ + +####cross overrides +#@cross_defines@ +#@cross_overrides@ + +####build overrides +#@build_overrides@ +# + +INCLUDES = -I$(srcdir) -I$(LIBCPP_DIR) -I$(LIBCPP_DIR)/include -I$(LIBIBERTY_DIR) -I. + +# Always use -I$(srcdir)/config when compiling. +.c.o: + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +# cstamp-h.in controls rebuilding of config.in. +# It is named cstamp-h.in and not stamp-h.in so the mostlyclean rule doesn't +# delete it. A stamp file is needed as autoheader won't update the file if +# nothing has changed. +# It remains in the source directory and is part of the distribution. +# This follows what is done in shellutils, fileutils, etc. +# "echo timestamp" is used instead of touch to be consistent with other +# packages that use autoconf (??? perhaps also to avoid problems with patch?). +# ??? Newer versions have a maintainer mode that may be useful here. +$(srcdir)/config.in: $(srcdir)/cstamp-h.in $(srcdir)/acconfig.h +$(srcdir)/cstamp-h.in: $(srcdir)/configure.in $(srcdir)/acconfig.h + (cd $(srcdir) && autoheader) + @rm -f $(srcdir)/cstamp-h.in + echo timestamp > $(srcdir)/cstamp-h.in +auto-host.h: cstamp-h ; @true +cstamp-h: config.in config.status + CONFIG_HEADERS=auto-host.h:config.in LANGUAGES="$(CONFIG_LANGUAGES)" $(SHELL) config.status + +# Really, really stupid make features, such as SUN's KEEP_STATE, may force +# a target to build even if it is up-to-date. So we must verify that +# config.status does not exist before failing. +config.status: $(srcdir)/configure version.c + @if [ ! -f config.status ] ; then \ + echo You must configure gcc. Look at http://gcc.gnu.org/install/ for details.; \ + false; \ + else \ + LANGUAGES="$(CONFIG_LANGUAGES)" $(SHELL) config.status --recheck; \ + fi + + +optionlist: s-options ; @true +s-options: $(ALL_OPT_FILES) Makefile $(srcdir)/opt-gather.awk + $(AWK) -f $(srcdir)/opt-gather.awk $(ALL_OPT_FILES) > tmp-optionlist + $(SHELL) $(srcdir)/move-if-change tmp-optionlist optionlist + $(STAMP) s-options + +options.c: optionlist $(srcdir)/opt-functions.awk $(srcdir)/optc-gen.awk + $(AWK) -f $(srcdir)/opt-functions.awk -f $(srcdir)/optc-gen.awk \ + -v header_name="config.h system.h options.h" < $< > $@ + +options.h: s-options-h ; @true +s-options-h: optionlist $(srcdir)/opt-functions.awk $(srcdir)/opth-gen.awk + $(AWK) -f $(srcdir)/opt-functions.awk -f $(srcdir)/opth-gen.awk \ + < $< > tmp-options.h + $(SHELL) $(srcdir)/move-if-change tmp-options.h options.h + $(STAMP) $@ + +# +# Remake cpp and protoize. + +PREPROCESSOR_DEFINES = \ + -DGCC_INCLUDE_DIR=\"$(libsubdir)/include\" \ + -DGPLUSPLUS_INCLUDE_DIR=\"$(gcc_gxx_include_dir)\" \ + -DGPLUSPLUS_TOOL_INCLUDE_DIR=\"$(gcc_gxx_include_dir)/$(target_alias)\" \ + -DGPLUSPLUS_BACKWARD_INCLUDE_DIR=\"$(gcc_gxx_include_dir)/backward\" \ + -DLOCAL_INCLUDE_DIR=\"$(includedir)\" \ + -DCROSS_INCLUDE_DIR=\"$(gcc_tooldir)/sys-include\" \ + -DTOOL_INCLUDE_DIR=\"$(gcc_tooldir)/include\" + +########################## +# Libcpp + +LIBCPP_OBJS = charset.o directives.o errors.o expr.o files.o identifiers.o \ + init.o lex.o line-map.o macro.o mkdeps.o symtab.o traditional.o + + +##LIBCPP_DEPS = cpplib.h cpphash.h hashtable.h intl.h options.h $(OBSTACK_H) $(SYSTEM_H) + +# Most of the other archives built/used by this makefile are for +# targets. This one is strictly for the host. +libcpp.a: $(LIBCPP_OBJS) + -rm -rf libcpp.a + $(AR) $(AR_FLAGS) libcpp.a $(LIBCPP_OBJS) + -$(RANLIB) libcpp.a + +charset.o: $(LIBCPP_DIR)/charset.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +directives.o: $(LIBCPP_DIR)/directives.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +errors.o: $(LIBCPP_DIR)/errors.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +expr.o: $(LIBCPP_DIR)/expr.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +files.o: $(LIBCPP_DIR)/files.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +identifiers.o: $(LIBCPP_DIR)/identifiers.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +init.o: $(LIBCPP_DIR)/init.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +lex.o: $(LIBCPP_DIR)/lex.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +line-map.o: $(LIBCPP_DIR)/line-map.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +macro.o: $(LIBCPP_DIR)/macro.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +mkdeps.o: $(LIBCPP_DIR)/mkdeps.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +symtab.o: $(LIBCPP_DIR)/symtab.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +traditional.o: $(LIBCPP_DIR)/traditional.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +########################## +# Libiberty + +MY_LIBIBERTY_BITS = concat.o fopen_unlocked.o getpwd.o hashtab.o hex.o \ + lbasename.o md5.o obstack.o safe-ctype.o splay-tree.o \ + vasprintf.o xexit.o xmalloc.o xmemdup.o xstrdup.o \ + xstrerror.o + +concat.o: $(LIBIBERTY_DIR)/concat.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +fopen_unlocked.o: $(LIBIBERTY_DIR)/fopen_unlocked.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +getpwd.o: $(LIBIBERTY_DIR)/getpwd.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +hashtab.o: $(LIBIBERTY_DIR)/hashtab.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +hex.o: $(LIBIBERTY_DIR)/hex.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +lbasename.o: $(LIBIBERTY_DIR)/lbasename.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +md5.o: $(LIBIBERTY_DIR)/md5.c $(LIBIBERTY_DIR)/obstack.h $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +obstack.o: $(LIBIBERTY_DIR)/obstack.c $(LIBIBERTY_DIR)/obstack.h $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +safe-ctype.o: $(LIBIBERTY_DIR)/safe-ctype.c $(LIBIBERTY_DIR)/safe-ctype.h $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +splay-tree.o: $(LIBIBERTY_DIR)/splay-tree.c $(LIBIBERTY_DIR)/splay-tree.h $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +vasprintf.o: $(LIBIBERTY_DIR)/vasprintf.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +xexit.o: $(LIBIBERTY_DIR)/xexit.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +xmalloc.o: $(LIBIBERTY_DIR)/xmalloc.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +xmemdup.o: $(LIBIBERTY_DIR)/xmemdup.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +xstrdup.o: $(LIBIBERTY_DIR)/xstrdup.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +xstrerror.o: $(LIBIBERTY_DIR)/xstrerror.c $(CONFIG_H) $(LIBCPP_DEPS) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + +########################## +# Sdcpp + +SDCC_OBJS = sdcpp.o sdcpp-opts.o c-ppoutput.o cppdefault.o prefix.o version.o opts.o opts-common.o options.o c-incpath.o + +$(TARGET): $(SDCC_OBJS) $(MY_LIBIBERTY_BITS) libcpp.a $(LIBDEPS) + mkdir -p $(dir $@) + $(CC) $(ALL_CFLAGS) $(LDFLAGS) -o $@ $(SDCC_OBJS) \ + $(MY_LIBIBERTY_BITS) libcpp.a $(LIBS) + +sdcpp.o: sdcpp.c $(CONFIG_H) $(SYSTEM_H) options.h + +sdcpp-opts.o: sdcpp-opts.c $(CONFIG_H) $(LIBCPP_DEPS) options.h + +c-ppoutput.o: c-ppoutput.c $(CONFIG_H) $(SYSTEM_H) + +options.o: options.c $(CONFIG_H) $(LIBCPP_DEPS) options.h + +opts.o: opts.c $(CONFIG_H) $(LIBCPP_DEPS) options.h + +opts-common.o: opts.c $(CONFIG_H) $(LIBCPP_DEPS) options.h + +c-incpath.o: $(CONFIG_H) $(LIBCPP_DEPS) c-incpath.h + +version.o: version.c version.h + +cppcharset.o: cppcharset.c $(CONFIG_H) $(SYSTEM_H) + +prefix.o: prefix.c $(CONFIG_H) $(SYSTEM_H) Makefile prefix.h + $(CC) $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ + -DPREFIX=\"$(prefix)\" \ + -c $(srcdir)/prefix.c + +cppdefault.o: cppdefault.c $(CONFIG_H) $(SYSTEM_H) cppdefault.h Makefile + $(CC) $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ + $(PREPROCESSOR_DEFINES) \ + -c $(srcdir)/cppdefault.c diff --git a/support/cpp/acconfig.h b/support/cpp/acconfig.h new file mode 100644 index 0000000..6367cf1 --- /dev/null +++ b/support/cpp/acconfig.h @@ -0,0 +1,44 @@ +/* Define to 1 if NLS is requested. */ +#undef ENABLE_NLS + +/* Define as 1 if you have catgets and don't want to use GNU gettext. */ +#undef HAVE_CATGETS + +/* Define as 1 if you have gettext and don't want to use GNU gettext. */ +#undef HAVE_GETTEXT + +/* Define if your locale.h file contains LC_MESSAGES. */ +#undef HAVE_LC_MESSAGES + +/* Define as 1 if you have the stpcpy function. */ +#undef HAVE_STPCPY + +/* Define if your assembler supports specifying the maximum number + of bytes to skip when using the GAS .p2align command. */ +#undef HAVE_GAS_MAX_SKIP_P2ALIGN + +/* Define if your assembler supports .balign and .p2align. */ +#undef HAVE_GAS_BALIGN_AND_P2ALIGN + +/* Define if your assembler uses the old HImode fild and fist notation. */ +#undef HAVE_GAS_FILDS_FISTS + +/* Define to `int' if doesn't define. */ +#undef ssize_t + +/* Define if cpp should also search $prefix/include. */ +#undef PREFIX_INCLUDE_DIR + +@BOTTOM@ + +/* Bison unconditionally undefines `const' if neither `__STDC__' nor + __cplusplus are defined. That's a problem since we use `const' in + the GCC headers, and the resulting bison code is therefore type + unsafe. Thus, we must match the bison behavior here. */ + +#ifndef __STDC__ +#ifndef __cplusplus +#undef const +#define const +#endif +#endif diff --git a/support/cpp/aclocal.m4 b/support/cpp/aclocal.m4 new file mode 100644 index 0000000..b30c780 --- /dev/null +++ b/support/cpp/aclocal.m4 @@ -0,0 +1,913 @@ +dnl See if stdbool.h properly defines bool and true/false. +AC_DEFUN(gcc_AC_HEADER_STDBOOL, +[AC_CACHE_CHECK([for working stdbool.h], + ac_cv_header_stdbool_h, +[AC_TRY_COMPILE([#include ], +[bool foo = false;], +ac_cv_header_stdbool_h=yes, ac_cv_header_stdbool_h=no)]) +if test $ac_cv_header_stdbool_h = yes; then + AC_DEFINE(HAVE_STDBOOL_H, 1, + [Define if you have a working header file.]) +fi +]) + +dnl See whether we can include both string.h and strings.h. +AC_DEFUN(gcc_AC_HEADER_STRING, +[AC_CACHE_CHECK([whether string.h and strings.h may both be included], + gcc_cv_header_string, +[AC_TRY_COMPILE([#include +#include ], , gcc_cv_header_string=yes, gcc_cv_header_string=no)]) +if test $gcc_cv_header_string = yes; then + AC_DEFINE(STRING_WITH_STRINGS, 1, [Define if you can safely include both and .]) +fi +]) + +dnl See whether we need a declaration for a function. +dnl The result is highly dependent on the INCLUDES passed in, so make sure +dnl to use a different cache variable name in this macro if it is invoked +dnl in a different context somewhere else. +dnl gcc_AC_CHECK_DECL(SYMBOL, +dnl [ACTION-IF-FOUND [, ACTION-IF-NOT-FOUND [, INCLUDES]]]) +AC_DEFUN(gcc_AC_CHECK_DECL, +[AC_MSG_CHECKING([whether $1 is declared]) +AC_CACHE_VAL(gcc_cv_have_decl_$1, +[AC_TRY_COMPILE([$4], +[#ifndef $1 +char *(*pfn) = (char *(*)) $1 ; +#endif], eval "gcc_cv_have_decl_$1=yes", eval "gcc_cv_have_decl_$1=no")]) +if eval "test \"`echo '$gcc_cv_have_decl_'$1`\" = yes"; then + AC_MSG_RESULT(yes) ; ifelse([$2], , :, [$2]) +else + AC_MSG_RESULT(no) ; ifelse([$3], , :, [$3]) +fi +])dnl + +dnl Check multiple functions to see whether each needs a declaration. +dnl Arrange to define HAVE_DECL_ to 0 or 1 as appropriate. +dnl gcc_AC_CHECK_DECLS(SYMBOLS, +dnl [ACTION-IF-NEEDED [, ACTION-IF-NOT-NEEDED [, INCLUDES]]]) +AC_DEFUN(gcc_AC_CHECK_DECLS, +[for ac_func in $1 +do +changequote(, )dnl + ac_tr_decl=HAVE_DECL_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'` +changequote([, ])dnl +gcc_AC_CHECK_DECL($ac_func, + [AC_DEFINE_UNQUOTED($ac_tr_decl, 1) $2], + [AC_DEFINE_UNQUOTED($ac_tr_decl, 0) $3], +dnl It is possible that the include files passed in here are local headers +dnl which supply a backup declaration for the relevant prototype based on +dnl the definition of (or lack of) the HAVE_DECL_ macro. If so, this test +dnl will always return success. E.g. see libiberty.h's handling of +dnl `basename'. To avoid this, we define the relevant HAVE_DECL_ macro to +dnl 1 so that any local headers used do not provide their own prototype +dnl during this test. +#undef $ac_tr_decl +#define $ac_tr_decl 1 + $4 +) +done +dnl Automatically generate config.h entries via autoheader. +if test x = y ; then + patsubst(translit([$1], [a-z], [A-Z]), [\w+], + [AC_DEFINE([HAVE_DECL_\&], 1, + [Define to 1 if we found this declaration otherwise define to 0.])])dnl +fi +]) + +dnl See if symbolic links work and if not, try to substitute either hard links or simple copy. +AC_DEFUN(gcc_AC_PROG_LN_S, +[AC_MSG_CHECKING(whether ln -s works) +AC_CACHE_VAL(gcc_cv_prog_LN_S, +[rm -f conftestdata_t +echo >conftestdata_f +if ln -s conftestdata_f conftestdata_t 2>/dev/null +then + gcc_cv_prog_LN_S="ln -s" +else + if ln conftestdata_f conftestdata_t 2>/dev/null + then + gcc_cv_prog_LN_S=ln + else + gcc_cv_prog_LN_S=cp + fi +fi +rm -f conftestdata_f conftestdata_t +])dnl +LN_S="$gcc_cv_prog_LN_S" +if test "$gcc_cv_prog_LN_S" = "ln -s"; then + AC_MSG_RESULT(yes) +else + if test "$gcc_cv_prog_LN_S" = "ln"; then + AC_MSG_RESULT([no, using ln]) + else + AC_MSG_RESULT([no, and neither does ln, so using cp]) + fi +fi +AC_SUBST(LN_S)dnl +]) + +dnl See if hard links work and if not, try to substitute either symbolic links or simple copy. +AC_DEFUN(gcc_AC_PROG_LN, +[AC_MSG_CHECKING(whether ln works) +AC_CACHE_VAL(gcc_cv_prog_LN, +[rm -f conftestdata_t +echo >conftestdata_f +if ln conftestdata_f conftestdata_t 2>/dev/null +then + gcc_cv_prog_LN="ln" +else + if ln -s conftestdata_f conftestdata_t 2>/dev/null + then + gcc_cv_prog_LN="ln -s" + else + gcc_cv_prog_LN=cp + fi +fi +rm -f conftestdata_f conftestdata_t +])dnl +LN="$gcc_cv_prog_LN" +if test "$gcc_cv_prog_LN" = "ln"; then + AC_MSG_RESULT(yes) +else + if test "$gcc_cv_prog_LN" = "ln -s"; then + AC_MSG_RESULT([no, using ln -s]) + else + AC_MSG_RESULT([no, and neither does ln -s, so using cp]) + fi +fi +AC_SUBST(LN)dnl +]) + +dnl Check whether _Bool is built-in. +AC_DEFUN(gcc_AC_C__BOOL, +[AC_CACHE_CHECK(for built-in _Bool, gcc_cv_c__bool, +[AC_TRY_COMPILE(, +[_Bool foo;], +gcc_cv_c__bool=yes, gcc_cv_c__bool=no) +]) +if test $gcc_cv_c__bool = yes; then + AC_DEFINE(HAVE__BOOL, 1, [Define if the \`_Bool' type is built-in.]) +fi +]) + +dnl Define MKDIR_TAKES_ONE_ARG if mkdir accepts only one argument instead +dnl of the usual 2. +AC_DEFUN(gcc_AC_FUNC_MKDIR_TAKES_ONE_ARG, +[AC_CACHE_CHECK([if mkdir takes one argument], gcc_cv_mkdir_takes_one_arg, +[AC_TRY_COMPILE([ +#include +#ifdef HAVE_SYS_STAT_H +# include +#endif +#ifdef HAVE_UNISTD_H +# include +#endif +#ifdef HAVE_DIRECT_H +# include +#endif], [mkdir ("foo", 0);], + gcc_cv_mkdir_takes_one_arg=no, gcc_cv_mkdir_takes_one_arg=yes)]) +if test $gcc_cv_mkdir_takes_one_arg = yes ; then + AC_DEFINE(MKDIR_TAKES_ONE_ARG, 1, [Define if host mkdir takes a single argument.]) +fi +]) + +AC_DEFUN(gcc_AC_PROG_INSTALL, +[AC_REQUIRE([AC_CONFIG_AUX_DIR_DEFAULT])dnl +# Find a good install program. We prefer a C program (faster), +# so one script is as good as another. But avoid the broken or +# incompatible versions: +# SysV /etc/install, /usr/sbin/install +# SunOS /usr/etc/install +# IRIX /sbin/install +# AIX /bin/install +# AFS /usr/afsws/bin/install, which mishandles nonexistent args +# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" +# ./install, which can be erroneously created by make from ./install.sh. +AC_MSG_CHECKING(for a BSD compatible install) +if test -z "$INSTALL"; then +AC_CACHE_VAL(ac_cv_path_install, +[ IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS="${IFS}:" + for ac_dir in $PATH; do + # Account for people who put trailing slashes in PATH elements. + case "$ac_dir/" in + /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;; + *) + # OSF1 and SCO ODT 3.0 have their own names for install. + for ac_prog in ginstall scoinst install; do + if test -f $ac_dir/$ac_prog; then + if test $ac_prog = install && + grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then + # AIX install. It has an incompatible calling convention. + # OSF/1 installbsd also uses dspmsg, but is usable. + : + else + ac_cv_path_install="$ac_dir/$ac_prog -c" + break 2 + fi + fi + done + ;; + esac + done + IFS="$ac_save_IFS" +])dnl + if test "${ac_cv_path_install+set}" = set; then + INSTALL="$ac_cv_path_install" + else + # As a last resort, use the slow shell script. We don't cache a + # path for INSTALL within a source directory, because that will + # break other packages using the cache if that directory is + # removed, or if the path is relative. + INSTALL="$ac_install_sh" + fi +fi +dnl We do special magic for INSTALL instead of AC_SUBST, to get +dnl relative paths right. +AC_MSG_RESULT($INSTALL) +AC_SUBST(INSTALL)dnl + +# Use test -z because SunOS4 sh mishandles braces in ${var-val}. +# It thinks the first close brace ends the variable substitution. +test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}' +AC_SUBST(INSTALL_PROGRAM)dnl + +test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' +AC_SUBST(INSTALL_DATA)dnl +]) + +#serial 1 +dnl This test replaces the one in autoconf. +dnl Currently this macro should have the same name as the autoconf macro +dnl because gettext's gettext.m4 (distributed in the automake package) +dnl still uses it. Otherwise, the use in gettext.m4 makes autoheader +dnl give these diagnostics: +dnl configure.in:556: AC_TRY_COMPILE was called before AC_ISC_POSIX +dnl configure.in:556: AC_TRY_RUN was called before AC_ISC_POSIX + +undefine([AC_ISC_POSIX]) +AC_DEFUN(AC_ISC_POSIX, + [ + dnl This test replaces the obsolescent AC_ISC_POSIX kludge. + AC_CHECK_LIB(cposix, strerror, [LIBS="$LIBS -lcposix"]) + ] +) + + +dnl GCC_PATH_PROG(VARIABLE, PROG-TO-CHECK-FOR [, VALUE-IF-NOT-FOUND [, PATH]]) +dnl like AC_PATH_PROG but use other cache variables +AC_DEFUN(GCC_PATH_PROG, +[# Extract the first word of "$2", so it can be a program name with args. +set dummy $2; ac_word=[$]2 +AC_MSG_CHECKING([for $ac_word]) +AC_CACHE_VAL(gcc_cv_path_$1, +[case "[$]$1" in + /*) + gcc_cv_path_$1="[$]$1" # Let the user override the test with a path. + ;; + ?:/*) + gcc_cv_path_$1="[$]$1" # Let the user override the test with a dos path. + ;; + *) + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" +dnl $ac_dummy forces splitting on constant user-supplied paths. +dnl POSIX.2 word splitting is done only on the output of word expansions, +dnl not every word. This closes a longstanding sh security hole. + ac_dummy="ifelse([$4], , $PATH, [$4])" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + gcc_cv_path_$1="$ac_dir/$ac_word" + break + fi + done + IFS="$ac_save_ifs" +dnl If no 3rd arg is given, leave the cache variable unset, +dnl so GCC_PATH_PROGS will keep looking. +ifelse([$3], , , [ test -z "[$]gcc_cv_path_$1" && gcc_cv_path_$1="$3" +])dnl + ;; +esac])dnl +$1="$gcc_cv_path_$1" +if test -n "[$]$1"; then + AC_MSG_RESULT([$]$1) +else + AC_MSG_RESULT(no) +fi +AC_SUBST($1)dnl +]) + + + +dnl GCC_PATH_PROG_WITH_TEST(VARIABLE, PROG-TO-CHECK-FOR, +dnl TEST-PERFORMED-ON-FOUND_PROGRAM [, VALUE-IF-NOT-FOUND [, PATH]]) +AC_DEFUN(GCC_PATH_PROG_WITH_TEST, +[# Extract the first word of "$2", so it can be a program name with args. +set dummy $2; ac_word=[$]2 +AC_MSG_CHECKING([for $ac_word]) +AC_CACHE_VAL(gcc_cv_path_$1, +[case "[$]$1" in + /*) + gcc_cv_path_$1="[$]$1" # Let the user override the test with a path. + ;; + *) + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" + for ac_dir in ifelse([$5], , $PATH, [$5]); do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + if [$3]; then + gcc_cv_path_$1="$ac_dir/$ac_word" + break + fi + fi + done + IFS="$ac_save_ifs" +dnl If no 4th arg is given, leave the cache variable unset, +dnl so GCC_PATH_PROGS will keep looking. +ifelse([$4], , , [ test -z "[$]gcc_cv_path_$1" && gcc_cv_path_$1="$4" +])dnl + ;; +esac])dnl +$1="$gcc_cv_path_$1" +if test -n "[$]$1"; then + AC_MSG_RESULT([$]$1) +else + AC_MSG_RESULT(no) +fi +AC_SUBST($1)dnl +]) + +# Check whether mmap can map an arbitrary page from /dev/zero or with +# MAP_ANONYMOUS, without MAP_FIXED. +AC_DEFUN([AC_FUNC_MMAP_ANYWHERE], +[AC_CHECK_FUNCS(getpagesize) +# The test program for the next two tests is the same except for one +# set of ifdefs. +changequote({{{,}}})dnl +{{{cat >ct-mmap.inc <<'EOF' +#include +#include +#include +#include +#include +#include + +#if !defined (MAP_ANONYMOUS) && defined (MAP_ANON) +# define MAP_ANONYMOUS MAP_ANON +#endif + +/* This mess was copied from the GNU getpagesize.h. */ +#ifndef HAVE_GETPAGESIZE +# ifdef HAVE_UNISTD_H +# include +# endif + +/* Assume that all systems that can run configure have sys/param.h. */ +# ifndef HAVE_SYS_PARAM_H +# define HAVE_SYS_PARAM_H 1 +# endif + +# ifdef _SC_PAGESIZE +# define getpagesize() sysconf(_SC_PAGESIZE) +# else /* no _SC_PAGESIZE */ +# ifdef HAVE_SYS_PARAM_H +# include +# ifdef EXEC_PAGESIZE +# define getpagesize() EXEC_PAGESIZE +# else /* no EXEC_PAGESIZE */ +# ifdef NBPG +# define getpagesize() NBPG * CLSIZE +# ifndef CLSIZE +# define CLSIZE 1 +# endif /* no CLSIZE */ +# else /* no NBPG */ +# ifdef NBPC +# define getpagesize() NBPC +# else /* no NBPC */ +# ifdef PAGESIZE +# define getpagesize() PAGESIZE +# endif /* PAGESIZE */ +# endif /* no NBPC */ +# endif /* no NBPG */ +# endif /* no EXEC_PAGESIZE */ +# else /* no HAVE_SYS_PARAM_H */ +# define getpagesize() 8192 /* punt totally */ +# endif /* no HAVE_SYS_PARAM_H */ +# endif /* no _SC_PAGESIZE */ + +#endif /* no HAVE_GETPAGESIZE */ + +#ifndef MAP_FAILED +# define MAP_FAILED -1 +#endif + +#undef perror_exit +#define perror_exit(str, val) \ + do { perror(str); exit(val); } while (0) + +/* Some versions of cygwin mmap require that munmap is called with the + same parameters as mmap. GCC expects that this is not the case. + Test for various forms of this problem. Warning - icky signal games. */ + +static sigset_t unblock_sigsegv; +static jmp_buf r; +static size_t pg; +static int devzero; + +static char * +anonmap (size) + size_t size; +{ +#ifdef USE_MAP_ANON + return (char *) mmap (0, size, PROT_READ|PROT_WRITE, + MAP_PRIVATE|MAP_ANONYMOUS, -1, 0); +#else + return (char *) mmap (0, size, PROT_READ|PROT_WRITE, + MAP_PRIVATE, devzero, 0); +#endif +} + +static void +sigsegv (unused) + int unused; +{ + sigprocmask (SIG_UNBLOCK, &unblock_sigsegv, 0); + longjmp (r, 1); +} + +/* Basic functionality test. */ +void +test_0 () +{ + char *x = anonmap (pg); + if (x == (char *) MAP_FAILED) + perror_exit("test 0 mmap", 2); + + *(int *)x += 1; + + if (munmap(x, pg) < 0) + perror_exit("test 0 munmap", 3); +} + +/* 1. If we map a 2-page region and unmap its second page, the first page + must remain. */ +static void +test_1 () +{ + char *x = anonmap (pg * 2); + if (x == (char *)MAP_FAILED) + perror_exit ("test 1 mmap", 4); + + signal (SIGSEGV, sigsegv); + if (setjmp (r)) + perror_exit ("test 1 fault", 5); + + x[0] = 1; + x[pg] = 1; + + if (munmap (x + pg, pg) < 0) + perror_exit ("test 1 munmap 1", 6); + x[0] = 2; + + if (setjmp (r) == 0) + { + x[pg] = 1; + perror_exit ("test 1 no fault", 7); + } + if (munmap (x, pg) < 0) + perror_exit ("test 1 munmap 2", 8); +} + +/* 2. If we map a 2-page region and unmap its first page, the second + page must remain. */ +static void +test_2 () +{ + char *x = anonmap (pg * 2); + if (x == (char *)MAP_FAILED) + perror_exit ("test 2 mmap", 9); + + signal (SIGSEGV, sigsegv); + if (setjmp (r)) + perror_exit ("test 2 fault", 10); + + x[0] = 1; + x[pg] = 1; + + if (munmap (x, pg) < 0) + perror_exit ("test 2 munmap 1", 11); + + x[pg] = 2; + + if (setjmp (r) == 0) + { + x[0] = 1; + perror_exit ("test 2 no fault", 12); + } + + if (munmap (x+pg, pg) < 0) + perror_exit ("test 2 munmap 2", 13); +} + +/* 3. If we map two adjacent 1-page regions and unmap them both with + one munmap, both must go away. + + Getting two adjacent 1-page regions with two mmap calls is slightly + tricky. All OS's tested skip over already-allocated blocks; therefore + we have been careful to unmap all allocated regions in previous tests. + HP/UX allocates pages backward in memory. No OS has yet been observed + to be so perverse as to leave unmapped space between consecutive calls + to mmap. */ + +static void +test_3 () +{ + char *x, *y, *z; + + x = anonmap (pg); + if (x == (char *)MAP_FAILED) + perror_exit ("test 3 mmap 1", 14); + y = anonmap (pg); + if (y == (char *)MAP_FAILED) + perror_exit ("test 3 mmap 2", 15); + + if (y != x + pg) + { + if (y == x - pg) + z = y, y = x, x = z; + else + { + fprintf (stderr, "test 3 nonconsecutive pages - %lx, %lx\n", + (unsigned long)x, (unsigned long)y); + exit (16); + } + } + + signal (SIGSEGV, sigsegv); + if (setjmp (r)) + perror_exit ("test 3 fault", 17); + + x[0] = 1; + y[0] = 1; + + if (munmap (x, pg*2) < 0) + perror_exit ("test 3 munmap", 18); + + if (setjmp (r) == 0) + { + x[0] = 1; + perror_exit ("test 3 no fault 1", 19); + } + + signal (SIGSEGV, sigsegv); + if (setjmp (r) == 0) + { + y[0] = 1; + perror_exit ("test 3 no fault 2", 20); + } +} + +int +main () +{ + sigemptyset (&unblock_sigsegv); + sigaddset (&unblock_sigsegv, SIGSEGV); + pg = getpagesize (); +#ifndef USE_MAP_ANON + devzero = open ("/dev/zero", O_RDWR); + if (devzero < 0) + perror_exit ("open /dev/zero", 1); +#endif + + test_0(); + test_1(); + test_2(); + test_3(); + + exit(0); +} +EOF}}} +changequote([,])dnl + +AC_CACHE_CHECK(for working mmap from /dev/zero, + ac_cv_func_mmap_dev_zero, +[AC_TRY_RUN( + [#include "ct-mmap.inc"], + ac_cv_func_mmap_dev_zero=yes, + [if test $? -lt 4 + then ac_cv_func_mmap_dev_zero=no + else ac_cv_func_mmap_dev_zero=buggy + fi], + # If this is not cygwin, and /dev/zero is a character device, it's probably + # safe to assume it works. + [case "$host_os" in + cygwin* | win32 | pe | mingw* ) ac_cv_func_mmap_dev_zero=buggy ;; + * ) if test -c /dev/zero + then ac_cv_func_mmap_dev_zero=yes + else ac_cv_func_mmap_dev_zero=no + fi ;; + esac]) +]) +if test $ac_cv_func_mmap_dev_zero = yes; then + AC_DEFINE(HAVE_MMAP_DEV_ZERO, 1, + [Define if mmap can get us zeroed pages from /dev/zero.]) +fi + +AC_CACHE_CHECK([for working mmap with MAP_ANON(YMOUS)], + ac_cv_func_mmap_anon, +[AC_TRY_RUN( + [#define USE_MAP_ANON +#include "ct-mmap.inc"], + ac_cv_func_mmap_anon=yes, + [if test $? -lt 4 + then ac_cv_func_mmap_anon=no + else ac_cv_func_mmap_anon=buggy + fi], + # Unlike /dev/zero, it is not safe to assume MAP_ANON(YMOUS) works + # just because it's there. Some SCO Un*xen define it but don't implement it. + ac_cv_func_mmap_anon=no) +]) +if test $ac_cv_func_mmap_anon = yes; then + AC_DEFINE(HAVE_MMAP_ANON, 1, + [Define if mmap can get us zeroed pages using MAP_ANON(YMOUS).]) +fi +rm -f ct-mmap.inc +]) + +# Check whether mmap can map a plain file, without MAP_FIXED. +AC_DEFUN([AC_FUNC_MMAP_FILE], +[AC_CACHE_CHECK(for working mmap of a file, ac_cv_func_mmap_file, +[# Create a file one thousand bytes long. +for i in 1 2 3 4 5 6 7 8 9 0 +do for j in 1 2 3 4 5 6 7 8 9 0 +do echo $i $j xxxxx +done +done > conftestdata$$ + +AC_TRY_RUN([ +/* Test by Zack Weinberg. Modified from MMAP_ANYWHERE test by + Richard Henderson and Alexandre Oliva. + Check whether read-only mmap of a plain file works. */ +#include +#include +#include +#include + +int main() +{ + char *x; + int fd; + struct stat st; + + fd = open("conftestdata$$", O_RDONLY); + if (fd < 0) + exit(1); + + if (fstat (fd, &st)) + exit(2); + + x = (char*)mmap(0, st.st_size, PROT_READ, MAP_PRIVATE, fd, 0); + if (x == (char *) -1) + exit(3); + + if (x[0] != '1' || x[1] != ' ' || x[2] != '1' || x[3] != ' ') + exit(4); + + if (munmap(x, st.st_size) < 0) + exit(5); + + exit(0); +}], ac_cv_func_mmap_file=yes, ac_cv_func_mmap_file=no, +ac_cv_func_mmap_file=no)]) +if test $ac_cv_func_mmap_file = yes; then + AC_DEFINE(HAVE_MMAP_FILE, 1, + [Define if read-only mmap of a plain file works.]) +fi +]) + +dnl Locate a program and check that its version is acceptable. +dnl AC_PROG_CHECK_VER(var, name, version-switch, +dnl version-extract-regexp, version-glob) +AC_DEFUN(gcc_AC_CHECK_PROG_VER, +[AC_CHECK_PROG([$1], [$2], [$2]) +if test -n "[$]$1"; then + # Found it, now check the version. + AC_CACHE_CHECK(for modern $2, gcc_cv_prog_$2_modern, +[changequote(<<,>>)dnl + ac_prog_version=`<<$>>$1 $3 2>&1 | + sed -n 's/^.*patsubst(<<$4>>,/,\/).*$/\1/p'` +changequote([,])dnl + echo "configure:__oline__: version of $2 is $ac_prog_version" >&AC_FD_CC +changequote(<<,>>)dnl + case $ac_prog_version in + '') gcc_cv_prog_$2_modern=no;; + <<$5>>) + gcc_cv_prog_$2_modern=yes;; + *) gcc_cv_prog_$2_modern=no;; + esac +changequote([,])dnl +]) +else + gcc_cv_prog_$2_modern=no +fi +]) + +dnl Determine if enumerated bitfields are unsigned. ISO C says they can +dnl be either signed or unsigned. +dnl +AC_DEFUN(gcc_AC_C_ENUM_BF_UNSIGNED, +[AC_CACHE_CHECK(for unsigned enumerated bitfields, gcc_cv_enum_bf_unsigned, +[AC_TRY_RUN(#include +enum t { BLAH = 128 } ; +struct s_t { enum t member : 8; } s ; +int main(void) +{ + s.member = BLAH; + if (s.member < 0) exit(1); + exit(0); + +}, gcc_cv_enum_bf_unsigned=yes, gcc_cv_enum_bf_unsigned=no, gcc_cv_enum_bf_unsigned=yes)]) +if test $gcc_cv_enum_bf_unsigned = yes; then + AC_DEFINE(ENUM_BITFIELDS_ARE_UNSIGNED, 1, + [Define if enumerated bitfields are treated as unsigned values.]) +fi]) + +dnl Host type sizes probe. +dnl By Kaveh R. Ghazi. One typo fixed since. +dnl +AC_DEFUN([gcc_AC_COMPILE_CHECK_SIZEOF], +[changequote(<<, >>)dnl +dnl The name to #define. +define(<>, translit(sizeof_$1, [a-z *], [A-Z_P]))dnl +dnl The cache variable name. +define(<>, translit(ac_cv_sizeof_$1, [ *], [_p]))dnl +changequote([, ])dnl +AC_MSG_CHECKING(size of $1) +AC_CACHE_VAL(AC_CV_NAME, +[for ac_size in 4 8 1 2 16 $3 ; do # List sizes in rough order of prevalence. + AC_TRY_COMPILE([#include "confdefs.h" +#include +$2 +], [switch (0) case 0: case (sizeof ($1) == $ac_size):;], AC_CV_NAME=$ac_size) + if test x$AC_CV_NAME != x ; then break; fi +done +]) +if test x$AC_CV_NAME = x ; then + AC_MSG_ERROR([cannot determine a size for $1]) +fi +AC_MSG_RESULT($AC_CV_NAME) +AC_DEFINE_UNQUOTED(AC_TYPE_NAME, $AC_CV_NAME, [The number of bytes in type $1]) +undefine([AC_TYPE_NAME])dnl +undefine([AC_CV_NAME])dnl +]) + +dnl Probe number of bits in a byte. +dnl Note C89 requires CHAR_BIT >= 8. +dnl +AC_DEFUN(gcc_AC_C_CHAR_BIT, +[AC_CACHE_CHECK(for CHAR_BIT, gcc_cv_decl_char_bit, +[AC_EGREP_CPP(found, +[#ifdef HAVE_LIMITS_H +#include +#endif +#ifdef CHAR_BIT +found +#endif], gcc_cv_decl_char_bit=yes, gcc_cv_decl_char_bit=no) +]) +if test $gcc_cv_decl_char_bit = no; then + AC_CACHE_CHECK(number of bits in a byte, gcc_cv_c_nbby, +[i=8 + gcc_cv_c_nbby= + while test $i -lt 65; do + AC_TRY_COMPILE(, + [switch(0) { + case (unsigned char)((unsigned long)1 << $i) == ((unsigned long)1 << $i): + case (unsigned char)((unsigned long)1<<($i-1)) == ((unsigned long)1<<($i-1)): + ; }], + [gcc_cv_c_nbby=$i; break]) + i=`expr $i + 1` + done + test -z "$gcc_cv_c_nbby" && gcc_cv_c_nbby=failed +]) +if test $gcc_cv_c_nbby = failed; then + AC_MSG_ERROR(cannot determine number of bits in a byte) +else + AC_DEFINE_UNQUOTED(CHAR_BIT, $gcc_cv_c_nbby, + [Define as the number of bits in a byte, if \`limits.h' doesn't.]) +fi +fi]) + +dnl Host character set probe. +dnl The EBCDIC values match the table in config/i370/i370.c; +dnl there are other versions of EBCDIC but GCC won't work with them. +dnl +AC_DEFUN([gcc_AC_C_CHARSET], +[AC_CACHE_CHECK(execution character set, ac_cv_c_charset, + [AC_EGREP_CPP(ASCII, +[#if '\n' == 0x0A && ' ' == 0x20 && '0' == 0x30 \ + && 'A' == 0x41 && 'a' == 0x61 && '!' == 0x21 +ASCII +#endif], ac_cv_c_charset=ASCII) + if test x${ac_cv_c_charset+set} != xset; then + AC_EGREP_CPP(EBCDIC, +[#if '\n' == 0x15 && ' ' == 0x40 && '0' == 0xF0 \ + && 'A' == 0xC1 && 'a' == 0x81 && '!' == 0x5A +EBCDIC +#endif], ac_cv_c_charset=EBCDIC) + fi + if test x${ac_cv_c_charset+set} != xset; then + ac_cv_c_charset=unknown + fi]) +if test $ac_cv_c_charset = unknown; then + AC_MSG_ERROR([*** Cannot determine host character set.]) +elif test $ac_cv_c_charset = EBCDIC; then + AC_DEFINE(HOST_EBCDIC, 1, + [Define if the host execution character set is EBCDIC.]) +fi]) + +dnl Utility macro used by next two tests. +dnl AC_EXAMINE_OBJECT(C source code, +dnl commands examining object file, +dnl [commands to run if compile failed]): +dnl +dnl Compile the source code to an object file; then convert it into a +dnl printable representation. All unprintable characters and +dnl asterisks (*) are replaced by dots (.). All white space is +dnl deleted. Newlines (ASCII 0x10) in the input are preserved in the +dnl output, but runs of newlines are compressed to a single newline. +dnl Finally, line breaks are forcibly inserted so that no line is +dnl longer than 80 columns and the file ends with a newline. The +dnl result of all this processing is in the file conftest.dmp, which +dnl may be examined by the commands in the second argument. +dnl +AC_DEFUN([gcc_AC_EXAMINE_OBJECT], +[AC_LANG_SAVE +AC_LANG_C +dnl Next bit cribbed from AC_TRY_COMPILE. +cat > conftest.$ac_ext < conftest.dmp + $2 +ifelse($3, , , else + $3 +)dnl +fi +rm -rf conftest* +AC_LANG_RESTORE]) + +dnl Host endianness probe. +dnl This tests byte-within-word endianness. GCC actually needs +dnl to know word-within-larger-object endianness. They are the +dnl same on all presently supported hosts. +dnl Differs from AC_C_BIGENDIAN in that it does not require +dnl running a program on the host, and it defines the macro we +dnl want to see. +dnl +AC_DEFUN([gcc_AC_C_COMPILE_ENDIAN], +[AC_CACHE_CHECK(byte ordering, ac_cv_c_compile_endian, +[ac_cv_c_compile_endian=unknown +gcc_AC_EXAMINE_OBJECT([ +#ifdef HAVE_LIMITS_H +# include +#endif +/* This structure must have no internal padding. */ + struct { + char prefix[sizeof "\nendian:" - 1]; + short word; + char postfix[2]; + } tester = { + "\nendian:", +#if SIZEOF_SHORT == 4 + ('A' << (CHAR_BIT * 3)) | ('B' << (CHAR_BIT * 2)) | +#endif + ('A' << CHAR_BIT) | 'B', + 'X', '\n' +};], + [if grep 'endian:AB' conftest.dmp >/dev/null 2>&1; then + ac_cv_c_compile_endian=big-endian + elif grep 'endian:BA' conftest.dmp >/dev/null 2>&1; then + ac_cv_c_compile_endian=little-endian + fi]) +]) +if test $ac_cv_c_compile_endian = unknown; then + AC_MSG_ERROR([*** unable to determine endianness]) +elif test $ac_cv_c_compile_endian = big-endian; then + AC_DEFINE(HOST_WORDS_BIG_ENDIAN, 1, + [Define if the host machine stores words of multi-word integers in + big-endian order.]) +fi +]) + diff --git a/support/cpp/ansidecl.h b/support/cpp/ansidecl.h new file mode 100644 index 0000000..a1a765d --- /dev/null +++ b/support/cpp/ansidecl.h @@ -0,0 +1,371 @@ +/* ANSI and traditional C compatability macros + Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001 + Free Software Foundation, Inc. + This file is part of the GNU C Library. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ + +/* ANSI and traditional C compatibility macros + + ANSI C is assumed if __STDC__ is #defined. + + Macro ANSI C definition Traditional C definition + ----- ---- - ---------- ----------- - ---------- + ANSI_PROTOTYPES 1 not defined + PTR `void *' `char *' + PTRCONST `void *const' `char *' + LONG_DOUBLE `long double' `double' + const not defined `' + volatile not defined `' + signed not defined `' + VA_START(ap, var) va_start(ap, var) va_start(ap) + + Note that it is safe to write "void foo();" indicating a function + with no return value, in all K+R compilers we have been able to test. + + For declaring functions with prototypes, we also provide these: + + PARAMS ((prototype)) + -- for functions which take a fixed number of arguments. Use this + when declaring the function. When defining the function, write a + K+R style argument list. For example: + + char *strcpy PARAMS ((char *dest, char *source)); + ... + char * + strcpy (dest, source) + char *dest; + char *source; + { ... } + + + VPARAMS ((prototype, ...)) + -- for functions which take a variable number of arguments. Use + PARAMS to declare the function, VPARAMS to define it. For example: + + int printf PARAMS ((const char *format, ...)); + ... + int + printf VPARAMS ((const char *format, ...)) + { + ... + } + + For writing functions which take variable numbers of arguments, we + also provide the VA_OPEN, VA_CLOSE, and VA_FIXEDARG macros. These + hide the differences between K+R and C89 more + thoroughly than the simple VA_START() macro mentioned above. + + VA_OPEN and VA_CLOSE are used *instead of* va_start and va_end. + Immediately after VA_OPEN, put a sequence of VA_FIXEDARG calls + corresponding to the list of fixed arguments. Then use va_arg + normally to get the variable arguments, or pass your va_list object + around. You do not declare the va_list yourself; VA_OPEN does it + for you. + + Here is a complete example: + + int + printf VPARAMS ((const char *format, ...)) + { + int result; + + VA_OPEN (ap, format); + VA_FIXEDARG (ap, const char *, format); + + result = vfprintf (stdout, format, ap); + VA_CLOSE (ap); + + return result; + } + + + You can declare variables either before or after the VA_OPEN, + VA_FIXEDARG sequence. Also, VA_OPEN and VA_CLOSE are the beginning + and end of a block. They must appear at the same nesting level, + and any variables declared after VA_OPEN go out of scope at + VA_CLOSE. Unfortunately, with a K+R compiler, that includes the + argument list. You can have multiple instances of VA_OPEN/VA_CLOSE + pairs in a single function in case you need to traverse the + argument list more than once. + + For ease of writing code which uses GCC extensions but needs to be + portable to other compilers, we provide the GCC_VERSION macro that + simplifies testing __GNUC__ and __GNUC_MINOR__ together, and various + wrappers around __attribute__. Also, __extension__ will be #defined + to nothing if it doesn't work. See below. + + This header also defines a lot of obsolete macros: + CONST, VOLATILE, SIGNED, PROTO, EXFUN, DEFUN, DEFUN_VOID, + AND, DOTS, NOARGS. Don't use them. */ + +#ifndef _ANSIDECL_H +#define _ANSIDECL_H 1 + +/* Every source file includes this file, + so they will all get the switch for lint. */ +/* LINTLIBRARY */ + +/* Using MACRO(x,y) in cpp #if conditionals does not work with some + older preprocessors. Thus we can't define something like this: + +#define HAVE_GCC_VERSION(MAJOR, MINOR) \ + (__GNUC__ > (MAJOR) || (__GNUC__ == (MAJOR) && __GNUC_MINOR__ >= (MINOR))) + +and then test "#if HAVE_GCC_VERSION(2,7)". + +So instead we use the macro below and test it against specific values. */ + +/* This macro simplifies testing whether we are using gcc, and if it + is of a particular minimum version. (Both major & minor numbers are + significant.) This macro will evaluate to 0 if we are not using + gcc at all. */ +#ifndef GCC_VERSION +#define GCC_VERSION (__GNUC__ * 1000 + __GNUC_MINOR__) +#endif /* GCC_VERSION */ + +#if defined (__STDC__) || defined (_AIX) || (defined (__mips) && defined (_SYSTYPE_SVR4)) || defined(_WIN32) || (defined(__alpha) && defined(__cplusplus)) +/* All known AIX compilers implement these things (but don't always + define __STDC__). The RISC/OS MIPS compiler defines these things + in SVR4 mode, but does not define __STDC__. */ +/* eraxxon@alumni.rice.edu: The Compaq C++ compiler, unlike many other + C++ compilers, does not define __STDC__, though it acts as if this + was so. (Verified versions: 5.7, 6.2, 6.3, 6.5) */ + +#define ANSI_PROTOTYPES 1 +#define PTR void * +#define PTRCONST void *const +#define LONG_DOUBLE long double + +/* PARAMS is often defined elsewhere (e.g. by libintl.h), so wrap it in + a #ifndef. */ +#ifndef PARAMS +#define PARAMS(ARGS) ARGS +#endif + +#define VPARAMS(ARGS) ARGS +#define VA_START(VA_LIST, VAR) va_start(VA_LIST, VAR) + +/* variadic function helper macros */ +/* "struct Qdmy" swallows the semicolon after VA_OPEN/VA_FIXEDARG's + use without inhibiting further decls and without declaring an + actual variable. */ +#define VA_OPEN(AP, VAR) { va_list AP; va_start(AP, VAR); { struct Qdmy +#define VA_CLOSE(AP) } va_end(AP); } +#define VA_FIXEDARG(AP, T, N) struct Qdmy + +#undef const +#undef volatile +#undef signed + +/* inline requires special treatment; it's in C99, and GCC >=2.7 supports + it too, but it's not in C89. */ +#undef inline +#if __STDC_VERSION__ > 199901L +/* it's a keyword */ +#else +# if GCC_VERSION >= 2007 +# define inline __inline__ /* __inline__ prevents -pedantic warnings */ +# else +# define inline /* nothing */ +# endif +#endif + +/* These are obsolete. Do not use. */ +#ifndef IN_GCC +#define CONST const +#define VOLATILE volatile +#define SIGNED signed + +#define PROTO(type, name, arglist) type name arglist +#define EXFUN(name, proto) name proto +#define DEFUN(name, arglist, args) name(args) +#define DEFUN_VOID(name) name(void) +#define AND , +#define DOTS , ... +#define NOARGS void +#endif /* ! IN_GCC */ + +#else /* Not ANSI C. */ + +#undef ANSI_PROTOTYPES +#define PTR char * +#define PTRCONST PTR +#define LONG_DOUBLE double + +#define PARAMS(args) () +#define VPARAMS(args) (va_alist) va_dcl +#define VA_START(va_list, var) va_start(va_list) + +#define VA_OPEN(AP, VAR) { va_list AP; va_start(AP); { struct Qdmy +#define VA_CLOSE(AP) } va_end(AP); } +#define VA_FIXEDARG(AP, TYPE, NAME) TYPE NAME = va_arg(AP, TYPE) + +/* some systems define these in header files for non-ansi mode */ +#undef const +#undef volatile +#undef signed +#undef inline +#define const +#define volatile +#define signed +#define inline + +#ifndef IN_GCC +#define CONST +#define VOLATILE +#define SIGNED + +#define PROTO(type, name, arglist) type name () +#define EXFUN(name, proto) name() +#define DEFUN(name, arglist, args) name arglist args; +#define DEFUN_VOID(name) name() +#define AND ; +#define DOTS +#define NOARGS +#endif /* ! IN_GCC */ + +#endif /* ANSI C. */ + +/* Define macros for some gcc attributes. This permits us to use the + macros freely, and know that they will come into play for the + version of gcc in which they are supported. */ + +#if (GCC_VERSION < 2007) +# define __attribute__(x) +#endif + +/* Attribute __malloc__ on functions was valid as of gcc 2.96. */ +#ifndef ATTRIBUTE_MALLOC +# if (GCC_VERSION >= 2096) +# define ATTRIBUTE_MALLOC __attribute__ ((__malloc__)) +# else +# define ATTRIBUTE_MALLOC +# endif /* GNUC >= 2.96 */ +#endif /* ATTRIBUTE_MALLOC */ + +/* Attributes on labels were valid as of gcc 2.93. */ +#ifndef ATTRIBUTE_UNUSED_LABEL +# if (!defined (__cplusplus) && GCC_VERSION >= 2093) +# define ATTRIBUTE_UNUSED_LABEL ATTRIBUTE_UNUSED +# else +# define ATTRIBUTE_UNUSED_LABEL +# endif /* !__cplusplus && GNUC >= 2.93 */ +#endif /* ATTRIBUTE_UNUSED_LABEL */ + +#ifndef ATTRIBUTE_UNUSED +#define ATTRIBUTE_UNUSED __attribute__ ((__unused__)) +#endif /* ATTRIBUTE_UNUSED */ + +/* Before GCC 3.4, the C++ frontend couldn't parse attributes placed after the + identifier name. */ +#if ! defined(__cplusplus) || (GCC_VERSION >= 3004) +# define ARG_UNUSED(NAME) NAME ATTRIBUTE_UNUSED +#else /* !__cplusplus || GNUC >= 3.4 */ +# define ARG_UNUSED(NAME) NAME +#endif /* !__cplusplus || GNUC >= 3.4 */ + +#ifndef ATTRIBUTE_NORETURN +#define ATTRIBUTE_NORETURN __attribute__ ((__noreturn__)) +#endif /* ATTRIBUTE_NORETURN */ + +/* Attribute `nonnull' was valid as of gcc 3.3. */ +#ifndef ATTRIBUTE_NONNULL +# if (GCC_VERSION >= 3003) +# define ATTRIBUTE_NONNULL(m) __attribute__ ((__nonnull__ (m))) +# else +# define ATTRIBUTE_NONNULL(m) +# endif /* GNUC >= 3.3 */ +#endif /* ATTRIBUTE_NONNULL */ + +/* Attribute `pure' was valid as of gcc 3.0. */ +#ifndef ATTRIBUTE_PURE +# if (GCC_VERSION >= 3000) +# define ATTRIBUTE_PURE __attribute__ ((__pure__)) +# else +# define ATTRIBUTE_PURE +# endif /* GNUC >= 3.0 */ +#endif /* ATTRIBUTE_PURE */ + +/* Use ATTRIBUTE_PRINTF when the format specifier must not be NULL. + This was the case for the `printf' format attribute by itself + before GCC 3.3, but as of 3.3 we need to add the `nonnull' + attribute to retain this behavior. */ +#ifndef ATTRIBUTE_PRINTF +#define ATTRIBUTE_PRINTF(m, n) __attribute__ ((__format__ (__printf__, m, n))) ATTRIBUTE_NONNULL(m) +#define ATTRIBUTE_PRINTF_1 ATTRIBUTE_PRINTF(1, 2) +#define ATTRIBUTE_PRINTF_2 ATTRIBUTE_PRINTF(2, 3) +#define ATTRIBUTE_PRINTF_3 ATTRIBUTE_PRINTF(3, 4) +#define ATTRIBUTE_PRINTF_4 ATTRIBUTE_PRINTF(4, 5) +#define ATTRIBUTE_PRINTF_5 ATTRIBUTE_PRINTF(5, 6) +#endif /* ATTRIBUTE_PRINTF */ + +/* Use ATTRIBUTE_FPTR_PRINTF when the format attribute is to be set on + a function pointer. Format attributes were allowed on function + pointers as of gcc 3.1. */ +#ifndef ATTRIBUTE_FPTR_PRINTF +# if (GCC_VERSION >= 3001) +# define ATTRIBUTE_FPTR_PRINTF(m, n) ATTRIBUTE_PRINTF(m, n) +# else +# define ATTRIBUTE_FPTR_PRINTF(m, n) +# endif /* GNUC >= 3.1 */ +# define ATTRIBUTE_FPTR_PRINTF_1 ATTRIBUTE_FPTR_PRINTF(1, 2) +# define ATTRIBUTE_FPTR_PRINTF_2 ATTRIBUTE_FPTR_PRINTF(2, 3) +# define ATTRIBUTE_FPTR_PRINTF_3 ATTRIBUTE_FPTR_PRINTF(3, 4) +# define ATTRIBUTE_FPTR_PRINTF_4 ATTRIBUTE_FPTR_PRINTF(4, 5) +# define ATTRIBUTE_FPTR_PRINTF_5 ATTRIBUTE_FPTR_PRINTF(5, 6) +#endif /* ATTRIBUTE_FPTR_PRINTF */ + +/* Use ATTRIBUTE_NULL_PRINTF when the format specifier may be NULL. A + NULL format specifier was allowed as of gcc 3.3. */ +#ifndef ATTRIBUTE_NULL_PRINTF +# if (GCC_VERSION >= 3003) +# define ATTRIBUTE_NULL_PRINTF(m, n) __attribute__ ((__format__ (__printf__, m, n))) +# else +# define ATTRIBUTE_NULL_PRINTF(m, n) +# endif /* GNUC >= 3.3 */ +# define ATTRIBUTE_NULL_PRINTF_1 ATTRIBUTE_NULL_PRINTF(1, 2) +# define ATTRIBUTE_NULL_PRINTF_2 ATTRIBUTE_NULL_PRINTF(2, 3) +# define ATTRIBUTE_NULL_PRINTF_3 ATTRIBUTE_NULL_PRINTF(3, 4) +# define ATTRIBUTE_NULL_PRINTF_4 ATTRIBUTE_NULL_PRINTF(4, 5) +# define ATTRIBUTE_NULL_PRINTF_5 ATTRIBUTE_NULL_PRINTF(5, 6) +#endif /* ATTRIBUTE_NULL_PRINTF */ + +/* Attribute `sentinel' was valid as of gcc 3.5. */ +#ifndef ATTRIBUTE_SENTINEL +# if (GCC_VERSION >= 3005) +# define ATTRIBUTE_SENTINEL __attribute__ ((__sentinel__)) +# else +# define ATTRIBUTE_SENTINEL +# endif /* GNUC >= 3.5 */ +#endif /* ATTRIBUTE_SENTINEL */ + + +#ifndef ATTRIBUTE_ALIGNED_ALIGNOF +# if (GCC_VERSION >= 3000) +# define ATTRIBUTE_ALIGNED_ALIGNOF(m) __attribute__ ((__aligned__ (__alignof__ (m)))) +# else +# define ATTRIBUTE_ALIGNED_ALIGNOF(m) +# endif /* GNUC >= 3.0 */ +#endif /* ATTRIBUTE_ALIGNED_ALIGNOF */ + +/* We use __extension__ in some places to suppress -pedantic warnings + about GCC extensions. This feature didn't work properly before + gcc 2.8. */ +#if GCC_VERSION < 2008 +#define __extension__ +#endif + +#endif /* ansidecl.h */ diff --git a/support/cpp/auto-host_vc_in.h b/support/cpp/auto-host_vc_in.h new file mode 100644 index 0000000..185f3ef --- /dev/null +++ b/support/cpp/auto-host_vc_in.h @@ -0,0 +1,80 @@ +/* auto-host_in.h: Define values for MSVC 6.0. During build this file + should be copied to 'auto-host.h'. + +Copyright (C) 2002 Jesus Calvino-Fraga, jesusc@ieee.org + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.*/ + +#ifndef CPP_VC_H_ +#define CPP_VC_H_ + +#include +#include +#include +#include + +#define HAVE_STRINGIZE +#define STDC_HEADERS 1 +#define PACKAGE "sdcc" +#define LOCALEDIR "" +#define PREFIX "" +#define inline __inline +#define SIZEOF_INT 4 +#define SIZEOF_LONG 4 +#define HAVE_TIME_H 1 +#define HAVE_STRING_H 1 +#define HAVE_SYS_STAT_H 1 +#define HAVE_FCNTL_H 1 +#define HAVE_STDLIB_H 1 +#define HAVE_STDDEF_H 1 +#define HAVE_LIMITS_H 1 +#ifndef __STDC__ +#define __STDC__ 1 +#endif + +#define ssize_t int + +#ifdef _MSC_VER +/*So, which ones are the standard types? */ +#define ino_t _ino_t +#define dev_t _dev_t +#define stat _stat +#define strdup _strdup +#define fstat _fstat +#define open _open +#define close _close +#define read _read +#define write _write + +#define O_APPEND _O_APPEND +#define O_CREAT _O_CREAT +#define O_EXCL _O_EXCL +#define O_RDONLY _O_RDONLY +#define O_RDWR _O_RDWR +#define O_TRUNC _O_TRUNC +#define O_WRONLY _O_WRONLY +#define O_BINARY _O_BINARY +#define O_TEXT _O_TEXT + +/*This one borrowed from \borland\bcc55\include\sys\stat.h*/ +#define S_IFBLK 0x3000 /* block special */ + +/*If you want to see all the scary warnings remove these ones:*/ +#pragma warning( disable : 4244 ) +#pragma warning( disable : 4090 ) +#pragma warning( disable : 4022 ) +#endif /* _MSC_VER */ + +#endif /*CPP_VC_H_*/ diff --git a/support/cpp/c-incpath.c b/support/cpp/c-incpath.c new file mode 100644 index 0000000..3933dee --- /dev/null +++ b/support/cpp/c-incpath.c @@ -0,0 +1,413 @@ +/* Set up combined include path chain for the preprocessor. + Copyright (C) 1986, 1987, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, + 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. + + Broken out of cppinit.c and cppfiles.c and rewritten Mar 2003. + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ + +#include "config.h" +#include "system.h" +#include "cpplib.h" +#include "prefix.h" +#include "intl.h" +#include "c-incpath.h" +#include "cppdefault.h" + +/* Windows does not natively support inodes, and neither does MSDOS. + Cygwin's emulation can generate non-unique inodes, so don't use it. + VMS has non-numeric inodes. */ +#ifdef VMS +# define INO_T_EQ(A, B) (!memcmp (&(A), &(B), sizeof (A))) +# define INO_T_COPY(DEST, SRC) memcpy(&(DEST), &(SRC), sizeof (SRC)) +#else +# if (defined _WIN32 && !defined (_UWIN)) || defined __MSDOS__ +# define INO_T_EQ(A, B) 0 +# else +# define INO_T_EQ(A, B) ((A) == (B)) +# endif +# define INO_T_COPY(DEST, SRC) (DEST) = (SRC) +#endif + +static const char dir_separator_str[] = { DIR_SEPARATOR, 0 }; + +static void add_env_var_paths (const char *, int); +static void add_standard_paths (const char *, const char *, const char *, int); +static void free_path (struct cpp_dir *, int); +static void merge_include_chains (cpp_reader *, int); +static struct cpp_dir *remove_duplicates (cpp_reader *, struct cpp_dir *, + struct cpp_dir *, + struct cpp_dir *, int); + +/* Include chains heads and tails. */ +static struct cpp_dir *heads[4]; +static struct cpp_dir *tails[4]; +static bool quote_ignores_source_dir; +enum { REASON_QUIET = 0, REASON_NOENT, REASON_DUP, REASON_DUP_SYS }; + +/* Free an element of the include chain, possibly giving a reason. */ +static void +free_path (struct cpp_dir *path, int reason) +{ + switch (reason) + { + case REASON_DUP: + case REASON_DUP_SYS: + fprintf (stderr, _("ignoring duplicate directory \"%s\"\n"), path->name); + if (reason == REASON_DUP_SYS) + fprintf (stderr, + _(" as it is a non-system directory that duplicates a system directory\n")); + break; + + case REASON_NOENT: + fprintf (stderr, _("ignoring nonexistent directory \"%s\"\n"), + path->name); + break; + + case REASON_QUIET: + default: + break; + } + + free (path->name); + free (path); +} + +/* Read ENV_VAR for a PATH_SEPARATOR-separated list of file names; and + append all the names to the search path CHAIN. */ +static void +add_env_var_paths (const char *env_var, int chain) +{ + char *p, *q, *path; + + GET_ENVIRONMENT (q, env_var); + + if (!q) + return; + + for (p = q; *q; p = q + 1) + { + q = p; + while (*q != 0 && *q != PATH_SEPARATOR) + q++; + + if (p == q) + path = xstrdup ("."); + else + { + path = XNEWVEC (char, q - p + 1); + memcpy (path, p, q - p); + path[q - p] = '\0'; + } + + add_path (path, chain, chain == SYSTEM, false); + } +} + +/* Append the standard include chain defined in cppdefault.c. */ +static void +add_standard_paths (const char *sysroot, const char *iprefix, + const char *imultilib, int cxx_stdinc) +{ + const struct default_include *p; + size_t len; + + if (iprefix && (len = cpp_GCC_INCLUDE_DIR_len) != 0) + { + /* Look for directories that start with the standard prefix. + "Translate" them, i.e. replace /usr/local/lib/gcc... with + IPREFIX and search them first. */ + for (p = cpp_include_defaults; p->fname; p++) + { + if (!p->cplusplus || cxx_stdinc) + { + /* Should we be translating sysrooted dirs too? Assume + that iprefix and sysroot are mutually exclusive, for + now. */ + if (sysroot && p->add_sysroot) + continue; + if (!strncmp (p->fname, cpp_GCC_INCLUDE_DIR, len)) + { + char *str = concat (iprefix, p->fname + len, NULL); + if (p->multilib && imultilib) + str = concat (str, dir_separator_str, imultilib, NULL); + add_path (str, SYSTEM, p->cxx_aware, false); + } + } + } + } + + for (p = cpp_include_defaults; p->fname; p++) + { + if (!p->cplusplus || cxx_stdinc) + { + char *str; + + /* Should this directory start with the sysroot? */ + if (sysroot && p->add_sysroot) + str = concat (sysroot, p->fname, NULL); + else + str = update_path (p->fname, p->component); + + if (p->multilib && imultilib) + str = concat (str, dir_separator_str, imultilib, NULL); + + add_path (str, SYSTEM, p->cxx_aware, false); + } + } +} + +/* For each duplicate path in chain HEAD, keep just the first one. + Remove each path in chain HEAD that also exists in chain SYSTEM. + Set the NEXT pointer of the last path in the resulting chain to + JOIN, unless it duplicates JOIN in which case the last path is + removed. Return the head of the resulting chain. Any of HEAD, + JOIN and SYSTEM can be NULL. */ + +static struct cpp_dir * +remove_duplicates (cpp_reader *pfile, struct cpp_dir *head, + struct cpp_dir *system, struct cpp_dir *join, + int verbose) +{ + struct cpp_dir **pcur, *tmp, *cur; + struct stat st; + + for (pcur = &head; *pcur; ) + { + int reason = REASON_QUIET; + + cur = *pcur; + + if (stat (cur->name, &st)) + { + /* Dirs that don't exist are silently ignored, unless verbose. */ + if (errno != ENOENT) + cpp_errno (pfile, CPP_DL_ERROR, cur->name); + else + { + /* If -Wmissing-include-dirs is given, warn. */ + cpp_options *opts = cpp_get_options (pfile); + if (opts->warn_missing_include_dirs && cur->user_supplied_p) + cpp_errno (pfile, CPP_DL_WARNING, cur->name); + reason = REASON_NOENT; + } + } + else if (!S_ISDIR (st.st_mode)) + cpp_error_with_line (pfile, CPP_DL_ERROR, 0, 0, + "%s: not a directory", cur->name); + else + { + INO_T_COPY (cur->ino, st.st_ino); + cur->dev = st.st_dev; + + /* Remove this one if it is in the system chain. */ + reason = REASON_DUP_SYS; + for (tmp = system; tmp; tmp = tmp->next) + if (INO_T_EQ (tmp->ino, cur->ino) && tmp->dev == cur->dev + && cur->construct == tmp->construct) + break; + + if (!tmp) + { + /* Duplicate of something earlier in the same chain? */ + reason = REASON_DUP; + for (tmp = head; tmp != cur; tmp = tmp->next) + if (INO_T_EQ (cur->ino, tmp->ino) && cur->dev == tmp->dev + && cur->construct == tmp->construct) + break; + + if (tmp == cur + /* Last in the chain and duplicate of JOIN? */ + && !(cur->next == NULL && join + && INO_T_EQ (cur->ino, join->ino) + && cur->dev == join->dev + && cur->construct == join->construct)) + { + /* Unique, so keep this directory. */ + pcur = &cur->next; + continue; + } + } + } + + /* Remove this entry from the chain. */ + *pcur = cur->next; + free_path (cur, verbose ? reason: REASON_QUIET); + } + + *pcur = join; + return head; +} + +/* Merge the four include chains together in the order quote, bracket, + system, after. Remove duplicate dirs (as determined by + INO_T_EQ()). + + We can't just merge the lists and then uniquify them because then + we may lose directories from the <> search path that should be + there; consider -iquote foo -iquote bar -Ifoo -Iquux. It is + however safe to treat -iquote bar -iquote foo -Ifoo -Iquux as if + written -iquote bar -Ifoo -Iquux. */ + +static void +merge_include_chains (cpp_reader *pfile, int verbose) +{ + /* Join the SYSTEM and AFTER chains. Remove duplicates in the + resulting SYSTEM chain. */ + if (heads[SYSTEM]) + tails[SYSTEM]->next = heads[AFTER]; + else + heads[SYSTEM] = heads[AFTER]; + heads[SYSTEM] = remove_duplicates (pfile, heads[SYSTEM], 0, 0, verbose); + + /* Remove duplicates from BRACKET that are in itself or SYSTEM, and + join it to SYSTEM. */ + heads[BRACKET] = remove_duplicates (pfile, heads[BRACKET], heads[SYSTEM], + heads[SYSTEM], verbose); + + /* Remove duplicates from QUOTE that are in itself or SYSTEM, and + join it to BRACKET. */ + heads[QUOTE] = remove_duplicates (pfile, heads[QUOTE], heads[SYSTEM], + heads[BRACKET], verbose); + + /* If verbose, print the list of dirs to search. */ + if (verbose) + { + struct cpp_dir *p; + + fprintf (stderr, _("#include \"...\" search starts here:\n")); + for (p = heads[QUOTE];; p = p->next) + { + if (p == heads[BRACKET]) + fprintf (stderr, _("#include <...> search starts here:\n")); + if (!p) + break; + fprintf (stderr, " %s\n", p->name); + } + fprintf (stderr, _("End of search list.\n")); + } +} + +/* Use given -I paths for #include "..." but not #include <...>, and + don't search the directory of the present file for #include "...". + (Note that -I. -I- is not the same as the default setup; -I. uses + the compiler's working dir.) */ +void +split_quote_chain (void) +{ + heads[QUOTE] = heads[BRACKET]; + tails[QUOTE] = tails[BRACKET]; + heads[BRACKET] = NULL; + tails[BRACKET] = NULL; + /* This is NOT redundant. */ + quote_ignores_source_dir = true; +} + +/* Add P to the chain specified by CHAIN. */ + +void +add_cpp_dir_path (cpp_dir *p, int chain) +{ + if (tails[chain]) + tails[chain]->next = p; + else + heads[chain] = p; + tails[chain] = p; +} + +/* Add PATH to the include chain CHAIN. PATH must be malloc-ed and + NUL-terminated. */ +void +add_path (char *path, int chain, int cxx_aware, bool user_supplied_p) +{ + cpp_dir *p; + +#if defined (HAVE_DOS_BASED_FILE_SYSTEM) + /* Convert all backslashes to slashes. The native CRT stat() + function does not recognize a directory that ends in a backslash + (unless it is a drive root dir, such "c:\"). Forward slashes, + trailing or otherwise, cause no problems for stat(). */ + char* c; + for (c = path; *c; c++) + if (*c == '\\') *c = '/'; +#endif + + p = XNEW (cpp_dir); + p->next = NULL; + p->name = path; + if (chain == SYSTEM || chain == AFTER) + p->sysp = 1 + !cxx_aware; + else + p->sysp = 0; + p->construct = 0; + p->user_supplied_p = user_supplied_p; + + add_cpp_dir_path (p, chain); +} + +/* Exported function to handle include chain merging, duplicate + removal, and registration with cpplib. */ +void +register_include_chains (cpp_reader *pfile, const char *sysroot, + const char *iprefix, const char *imultilib, + int stdinc, int cxx_stdinc, int verbose) +{ + static const char *const lang_env_vars[] = + { "C_INCLUDE_PATH", "CPLUS_INCLUDE_PATH", + "OBJC_INCLUDE_PATH", "OBJCPLUS_INCLUDE_PATH" }; + cpp_options *cpp_opts = cpp_get_options (pfile); + size_t idx = (cpp_opts->objc ? 2: 0); + + if (cpp_opts->cplusplus) + idx++; + else + cxx_stdinc = false; + + /* CPATH and language-dependent environment variables may add to the + include chain. */ + add_env_var_paths ("CPATH", BRACKET); + add_env_var_paths (lang_env_vars[idx], SYSTEM); + + target_c_incpath.extra_pre_includes (sysroot, iprefix, stdinc); + + /* Finally chain on the standard directories. */ + if (stdinc) + add_standard_paths (sysroot, iprefix, imultilib, cxx_stdinc); + + target_c_incpath.extra_includes (sysroot, iprefix, stdinc); + + merge_include_chains (pfile, verbose); + + cpp_set_include_chains (pfile, heads[QUOTE], heads[BRACKET], + quote_ignores_source_dir); +} +#if !(defined TARGET_EXTRA_INCLUDES) || !(defined TARGET_EXTRA_PRE_INCLUDES) +static void hook_void_charptr_charptr_int (const char *sysroot ATTRIBUTE_UNUSED, + const char *iprefix ATTRIBUTE_UNUSED, + int stdinc ATTRIBUTE_UNUSED) +{ +} +#endif + +#ifndef TARGET_EXTRA_INCLUDES +#define TARGET_EXTRA_INCLUDES hook_void_charptr_charptr_int +#endif +#ifndef TARGET_EXTRA_PRE_INCLUDES +#define TARGET_EXTRA_PRE_INCLUDES hook_void_charptr_charptr_int +#endif + +struct target_c_incpath_s target_c_incpath = { TARGET_EXTRA_PRE_INCLUDES, TARGET_EXTRA_INCLUDES }; + diff --git a/support/cpp/c-incpath.h b/support/cpp/c-incpath.h new file mode 100644 index 0000000..3f268b7 --- /dev/null +++ b/support/cpp/c-incpath.h @@ -0,0 +1,33 @@ +/* Set up combined include path for the preprocessor. + Copyright (C) 2003, 2004, 2005, 2006 Free Software Foundation, Inc. + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ + +extern void split_quote_chain (void); +extern void add_path (char *, int, int, bool); +extern void register_include_chains (cpp_reader *, const char *, + const char *, const char *, + int, int, int); +extern void add_cpp_dir_path (struct cpp_dir *, int); + +struct target_c_incpath_s { + /* Do extra includes processing. STDINC is false iff -nostdinc was given. */ + void (*extra_pre_includes) (const char *, const char *, int); + void (*extra_includes) (const char *, const char *, int); +}; + +extern struct target_c_incpath_s target_c_incpath; + +enum { QUOTE = 0, BRACKET, SYSTEM, AFTER }; diff --git a/support/cpp/c-ppoutput.c b/support/cpp/c-ppoutput.c new file mode 100644 index 0000000..9085583 --- /dev/null +++ b/support/cpp/c-ppoutput.c @@ -0,0 +1,459 @@ +/* Preprocess only, using cpplib. + Copyright (C) 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 + Free Software Foundation, Inc. + Written by Per Bothner, 1994-95. + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ + +#include "config.h" +#include "system.h" +#include "cpplib.h" +#include "../libcpp/internal.h" + +/* Encapsulates state used to convert a stream of tokens into a text + file. */ +static struct +{ + FILE *outf; /* Stream to write to. */ + const cpp_token *prev; /* Previous token. */ + const cpp_token *source; /* Source token for spacing. */ + int src_line; /* Line number currently being written. */ + unsigned char printed; /* Nonzero if something output at line. */ + bool first_time; /* pp_file_change hasn't been called yet. */ +} print; + +/* General output routines. */ +static void scan_translation_unit (cpp_reader *); +static void scan_translation_unit_trad (cpp_reader *); +static void account_for_newlines (const unsigned char *, size_t); +static int dump_macro (cpp_reader *, cpp_hashnode *, void *); + +static void print_line (source_location, const char *); +static void maybe_print_line (source_location); + +/* Callback routines for the parser. Most of these are active only + in specific modes. */ +static void cb_line_change (cpp_reader *, const cpp_token *, int); +static void cb_define (cpp_reader *, source_location, cpp_hashnode *); +static void cb_undef (cpp_reader *, source_location, cpp_hashnode *); +static void cb_include (cpp_reader *, source_location, const unsigned char *, + const char *, int, const cpp_token **); +static void cb_ident (cpp_reader *, source_location, const cpp_string *); +static void cb_def_pragma (cpp_reader *, source_location); +#if 0 +static void cb_read_pch (cpp_reader *pfile, const char *name, + int fd, const char *orig_name); +#endif + +/* Preprocess and output. */ +void +preprocess_file (cpp_reader *pfile) +{ + /* A successful cpp_read_main_file guarantees that we can call + cpp_scan_nooutput or cpp_get_token next. */ + if (flag_no_output) + { + /* Scan -included buffers, then the main file. */ + while (pfile->buffer->prev) + cpp_scan_nooutput (pfile); + cpp_scan_nooutput (pfile); + } + else if (cpp_get_options (pfile)->traditional) + scan_translation_unit_trad (pfile); + else + scan_translation_unit (pfile); + + /* -dM command line option. Should this be elsewhere? */ + if (flag_dump_macros == 'M') + cpp_forall_identifiers (pfile, dump_macro, NULL); + + /* Flush any pending output. */ + if (print.printed) + putc ('\n', print.outf); +} + +/* Set up the callbacks as appropriate. */ +void +init_pp_output (FILE *out_stream) +{ + cpp_callbacks *cb = cpp_get_callbacks (parse_in); + + if (!flag_no_output) + { + cb->line_change = cb_line_change; + /* Don't emit #pragma or #ident directives if we are processing + assembly language; the assembler may choke on them. */ + if (cpp_get_options (parse_in)->lang != CLK_ASM) + { + cb->ident = cb_ident; + cb->def_pragma = cb_def_pragma; + } + } + + if (flag_dump_includes) + cb->include = cb_include; + +#if 0 + if (flag_pch_preprocess) + { + cb->valid_pch = c_common_valid_pch; + cb->read_pch = cb_read_pch; + } +#endif + + if (flag_dump_macros == 'N' || flag_dump_macros == 'D') + { + cb->define = cb_define; + cb->undef = cb_undef; + } + + /* Initialize the print structure. Setting print.src_line to -1 here is + a trick to guarantee that the first token of the file will cause + a linemarker to be output by maybe_print_line. */ + print.src_line = -1; + print.printed = 0; + print.prev = 0; + print.outf = out_stream; + print.first_time = 1; +} + +/* Writes out the preprocessed file, handling spacing and paste + avoidance issues. */ +static void +scan_translation_unit (cpp_reader *pfile) +{ + bool avoid_paste = false; + + print.source = NULL; + for (;;) + { + const cpp_token *token = cpp_get_token (pfile); + + if (token->type == CPP_PADDING) + { + avoid_paste = true; + if (print.source == NULL + || (!(print.source->flags & PREV_WHITE) + && token->val.source == NULL)) + print.source = token->val.source; + continue; + } + + if (token->type == CPP_EOF) + break; + + /* Subtle logic to output a space if and only if necessary. */ + if (avoid_paste) + { + if (print.source == NULL) + print.source = token; + if (print.source->flags & PREV_WHITE + || (print.prev + && cpp_avoid_paste (pfile, print.prev, token)) + || (print.prev == NULL && token->type == CPP_HASH)) + putc (' ', print.outf); + } + else if (token->flags & PREV_WHITE) + putc (' ', print.outf); + + avoid_paste = false; + print.source = NULL; + print.prev = token; + cpp_output_token (token, print.outf); + + if (token->type == CPP_COMMENT) + account_for_newlines (token->val.str.text, token->val.str.len); + } +} + +/* Adjust print.src_line for newlines embedded in output. */ +static void +account_for_newlines (const unsigned char *str, size_t len) +{ + while (len--) + if (*str++ == '\n') + print.src_line++; +} + +/* Writes out a traditionally preprocessed file. */ +static void +scan_translation_unit_trad (cpp_reader *pfile) +{ + while (_cpp_read_logical_line_trad (pfile)) + { + size_t len = pfile->out.cur - pfile->out.base; + maybe_print_line (pfile->out.first_line); + fwrite (pfile->out.base, 1, len, print.outf); + print.printed = 1; + if (!CPP_OPTION (pfile, discard_comments)) + account_for_newlines (pfile->out.base, len); + } +} + +/* If the token read on logical line LINE needs to be output on a + different line to the current one, output the required newlines or + a line marker, and return 1. Otherwise return 0. */ +static void +maybe_print_line (source_location src_loc) +{ + const struct line_map *map = linemap_lookup (&line_table, src_loc); + int src_line = SOURCE_LINE (map, src_loc); + /* End the previous line of text. */ + if (print.printed) + { + putc ('\n', print.outf); + print.src_line++; + print.printed = 0; + } + + if (src_line >= print.src_line && src_line < print.src_line + 8) + { + while (src_line > print.src_line) + { + putc ('\n', print.outf); + print.src_line++; + } + } + else + print_line (src_loc, ""); +} + +/* Output a line marker for logical line LINE. Special flags are "1" + or "2" indicating entering or leaving a file. */ +static void +print_line (source_location src_loc, const char *special_flags) +{ + /* End any previous line of text. */ + if (print.printed) + putc ('\n', print.outf); + print.printed = 0; + + if (!flag_no_line_commands) + { + const struct line_map *map = linemap_lookup (&line_table, src_loc); + + size_t to_file_len = strlen (map->to_file); + unsigned char *to_file_quoted = + (unsigned char *) alloca (to_file_len * 4 + 1); + unsigned char *p; + + print.src_line = SOURCE_LINE (map, src_loc); + + /* cpp_quote_string does not nul-terminate, so we have to do it + ourselves. */ + p = cpp_quote_string (to_file_quoted, + (unsigned char *) map->to_file, to_file_len); + *p = '\0'; + fprintf (print.outf, "# %u \"%s\"%s", + print.src_line == 0 ? 1 : print.src_line, + to_file_quoted, special_flags); + + if (map->sysp == 2) + fputs (" 3 4", print.outf); + else if (map->sysp == 1) + fputs (" 3", print.outf); + + putc ('\n', print.outf); + } +} + +/* Called when a line of output is started. TOKEN is the first token + of the line, and at end of file will be CPP_EOF. */ +static void +cb_line_change (cpp_reader *pfile, const cpp_token *token, + int parsing_args) +{ + source_location src_loc = token->src_loc; + + if (token->type == CPP_EOF || parsing_args) + return; + + maybe_print_line (src_loc); + print.prev = 0; + print.source = 0; + + /* Supply enough spaces to put this token in its original column, + one space per column greater than 2, since scan_translation_unit + will provide a space if PREV_WHITE. Don't bother trying to + reconstruct tabs; we can't get it right in general, and nothing + ought to care. Some things do care; the fault lies with them. */ + if (!CPP_OPTION (pfile, traditional)) + { + const struct line_map *map = linemap_lookup (&line_table, src_loc); + int spaces = SOURCE_COLUMN (map, src_loc) - 2; + print.printed = 1; + + while (-- spaces >= 0) + putc (' ', print.outf); + } +} + +static void +cb_ident (cpp_reader *pfile ATTRIBUTE_UNUSED, source_location line, + const cpp_string *str) +{ + maybe_print_line (line); + fprintf (print.outf, "#ident %s\n", str->text); + print.src_line++; +} + +static void +cb_define (cpp_reader *pfile, source_location line, cpp_hashnode *node) +{ + maybe_print_line (line); + fputs ("#define ", print.outf); + + /* 'D' is whole definition; 'N' is name only. */ + if (flag_dump_macros == 'D') + fputs ((const char *) cpp_macro_definition (pfile, node), + print.outf); + else + fputs ((const char *) NODE_NAME (node), print.outf); + + putc ('\n', print.outf); + if (linemap_lookup (&line_table, line)->to_line != 0) + print.src_line++; +} + +static void +cb_undef (cpp_reader *pfile ATTRIBUTE_UNUSED, source_location line, + cpp_hashnode *node) +{ + maybe_print_line (line); + fprintf (print.outf, "#undef %s\n", NODE_NAME (node)); + print.src_line++; +} + +static void +cb_include (cpp_reader *pfile ATTRIBUTE_UNUSED, source_location line, + const unsigned char *dir, const char *header, int angle_brackets, + const cpp_token **comments) +{ + maybe_print_line (line); + if (angle_brackets) + fprintf (print.outf, "#%s <%s>", dir, header); + else + fprintf (print.outf, "#%s \"%s\"", dir, header); + + if (comments != NULL) + { + while (*comments != NULL) + { + if ((*comments)->flags & PREV_WHITE) + putc (' ', print.outf); + cpp_output_token (*comments, print.outf); + ++comments; + } + } + + putc ('\n', print.outf); + print.src_line++; +} + +/* Callback called when -fworking-director and -E to emit working + directory in cpp output file. */ + +void +pp_dir_change (cpp_reader *pfile ATTRIBUTE_UNUSED, const char *dir) +{ + size_t to_file_len = strlen (dir); + unsigned char *to_file_quoted = + (unsigned char *) alloca (to_file_len * 4 + 1); + unsigned char *p; + + /* cpp_quote_string does not nul-terminate, so we have to do it ourselves. */ + p = cpp_quote_string (to_file_quoted, (unsigned char *) dir, to_file_len); + *p = '\0'; + fprintf (print.outf, "# 1 \"%s//\"\n", to_file_quoted); +} + +/* The file name, line number or system header flags have changed, as + described in MAP. */ + +void +pp_file_change (const struct line_map *map) +{ + const char *flags = ""; + + if (flag_no_line_commands) + return; + + if (map != NULL) + { + if (print.first_time) + { + /* Avoid printing foo.i when the main file is foo.c. */ + if (!cpp_get_options (parse_in)->preprocessed) + print_line (map->start_location, flags); + print.first_time = 0; + } + else + { + /* Bring current file to correct line when entering a new file. */ + if (map->reason == LC_ENTER) + { + const struct line_map *from = INCLUDED_FROM (&line_table, map); + maybe_print_line (LAST_SOURCE_LINE_LOCATION (from)); + } + if (map->reason == LC_ENTER) + flags = " 1"; + else if (map->reason == LC_LEAVE) + flags = " 2"; + print_line (map->start_location, flags); + } + } +} + +/* Copy a #pragma directive to the preprocessed output. */ +static void +cb_def_pragma (cpp_reader *pfile, source_location line) +{ + maybe_print_line (line); + fputs ("#pragma ", print.outf); + cpp_output_line (pfile, print.outf); + print.src_line++; +} + +/* Dump out the hash table. */ +static int +dump_macro (cpp_reader *pfile, cpp_hashnode *node, void *v ATTRIBUTE_UNUSED) +{ + if (node->type == NT_MACRO && !(node->flags & NODE_BUILTIN)) + { + fputs ("#define ", print.outf); + fputs ((const char *) cpp_macro_definition (pfile, node), + print.outf); + putc ('\n', print.outf); + print.src_line++; + } + + return 1; +} + +#if 0 +/* Load in the PCH file NAME, open on FD. It was originally searched for + by ORIG_NAME. Also, print out a #include command so that the PCH + file can be loaded when the preprocessed output is compiled. */ + +static void +cb_read_pch (cpp_reader *pfile, const char *name, + int fd, const char *orig_name ATTRIBUTE_UNUSED) +{ + c_common_read_pch (pfile, name, fd, orig_name); + + fprintf (print.outf, "#pragma GCC pch_preprocess \"%s\"\n", name); + print.src_line++; +} +#endif diff --git a/support/cpp/config.h b/support/cpp/config.h new file mode 100644 index 0000000..c6bbaa2 --- /dev/null +++ b/support/cpp/config.h @@ -0,0 +1,11 @@ +#include "auto-host.h" +/* Provide three core typedefs used by everything, if we are compiling + GCC. These used to be found in rtl.h and tree.h, but this is no + longer practical. Providing these here rather that system.h allows + the typedefs to be used everywhere within GCC. */ +struct rtx_def; +typedef struct rtx_def *rtx; +struct rtvec_def; +typedef struct rtvec_def *rtvec; +union tree_node; +typedef union tree_node *tree; diff --git a/support/cpp/config.in b/support/cpp/config.in new file mode 100644 index 0000000..2341ef9 --- /dev/null +++ b/support/cpp/config.in @@ -0,0 +1,339 @@ +/* config.in. Generated automatically from configure.in by autoheader. */ + +/* Define if using alloca.c. */ +#undef C_ALLOCA + +/* Define to empty if the keyword does not work. */ +#undef const + +/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems. + This function is required for alloca.c support on those systems. */ +#undef CRAY_STACKSEG_END + +/* Define if you have alloca, as a function or macro. */ +#undef HAVE_ALLOCA + +/* Define if you have and it should be used (not on Ultrix). */ +#undef HAVE_ALLOCA_H + +/* Define if you have the ANSI # stringizing operator in cpp. */ +#undef HAVE_STRINGIZE + +/* Define if you have that is POSIX.1 compatible. */ +#undef HAVE_SYS_WAIT_H + +/* Define as __inline if that's what the C compiler calls it. */ +#undef inline + +/* Define if your C compiler doesn't accept -c and -o together. */ +#undef NO_MINUS_C_MINUS_O + +/* Define to `long' if doesn't define. */ +#undef off_t + +/* Define to `unsigned' if doesn't define. */ +#undef size_t + +/* If using the C implementation of alloca, define if you know the + direction of stack growth for your system; otherwise it will be + automatically deduced at run-time. + STACK_DIRECTION > 0 => grows toward higher addresses + STACK_DIRECTION < 0 => grows toward lower addresses + STACK_DIRECTION = 0 => direction of growth unknown + */ +#undef STACK_DIRECTION + +/* Define if you have the ANSI C header files. */ +#undef STDC_HEADERS + +/* Define if you can safely include both and . */ +#undef TIME_WITH_SYS_TIME + +/* Define to `int' if doesn't define. */ +#undef ssize_t + +/* Define if cpp should also search $prefix/include. */ +#undef PREFIX_INCLUDE_DIR + +/* Define if you have the dcgettext function. */ +#undef HAVE_DCGETTEXT + +/* Define if you have the dup2 function. */ +#undef HAVE_DUP2 + +/* Define if you have the getegid function. */ +#undef HAVE_GETEGID + +/* Define if you have the geteuid function. */ +#undef HAVE_GETEUID + +/* Define if you have the getgid function. */ +#undef HAVE_GETGID + +/* Define if you have the getpagesize function. */ +#undef HAVE_GETPAGESIZE + +/* Define if you have the getuid function. */ +#undef HAVE_GETUID + +/* Define if you have the kill function. */ +#undef HAVE_KILL + +/* Define if you have the lstat function. */ +#undef HAVE_LSTAT + +/* Define if you have the mempcpy function. */ +#undef HAVE_MEMPCPY + +/* Define if you have the munmap function. */ +#undef HAVE_MUNMAP + +/* Define if you have the setlocale function. */ +#undef HAVE_SETLOCALE + +/* Define if you have the stpcpy function. */ +#undef HAVE_STPCPY + +/* Define if you have the strcasecmp function. */ +#undef HAVE_STRCASECMP + +/* Define if you have the strchr function. */ +#undef HAVE_STRCHR + +/* Define to 1 if you have the `strsignal' function. */ +#undef HAVE_STRSIGNAL + +/* Define if you have the strdup function. */ +#undef HAVE_STRDUP + +/* Define if you have the tsearch function. */ +#undef HAVE_TSEARCH + +/* Define to 1 if we found this declaration otherwise define to 0. */ +#undef HAVE_DECL_STRSIGNAL + +/* Define if you have the header file. */ +#undef HAVE_FCNTL_H + +/* Define if you have the header file. */ +#undef HAVE_LANGINFO_H + +/* Define if you have the header file. */ +#undef HAVE_LIMITS_H + +/* Define if you have the header file. */ +#undef HAVE_LOCALE_H + +/* Define if you have the header file. */ +#undef HAVE_MALLOC_H + +/* Define if you have the header file. */ +#undef HAVE_NL_TYPES_H + +/* Define if you have the header file. */ +#undef HAVE_STDDEF_H + +/* Define if you have the header file. */ +#undef HAVE_STDLIB_H + +/* Define if you have the header file. */ +#undef HAVE_STRING_H + +/* Define if you have the header file. */ +#undef HAVE_STRINGS_H + +/* Define if you have the header file. */ +#undef HAVE_SYS_FILE_H + +/* Define if you have the header file. */ +#undef HAVE_SYS_PARAM_H + +/* Define if you have the header file. */ +#undef HAVE_SYS_STAT_H + +/* Define if you have the header file. */ +#undef HAVE_SYS_TIME_H + +/* Define if you have the header file. */ +#undef HAVE_TIME_H + +/* Define if you have the header file. */ +#undef HAVE_UNISTD_H + +/* Define to enable the use of a default linker. */ +#undef DEFAULT_LINKER + +/* Define to enable the use of a default assembler. */ +#undef DEFAULT_ASSEMBLER + +/* Define if you want more run-time sanity checks. This one gets a grab + bag of miscellaneous but relatively cheap checks. */ +#undef ENABLE_CHECKING + +/* Define if you want all operations on trees (the basic data + structure of the front ends) to be checked for dynamic type safety + at runtime. This is moderately expensive. */ +#undef ENABLE_TREE_CHECKING + +/* Define if you want all operations on RTL (the basic data structure + of the optimizer and back end) to be checked for dynamic type safety + at runtime. This is quite expensive. */ +#undef ENABLE_RTL_CHECKING + +/* Define if you want the garbage collector to do object poisoning and + other memory allocation checks. This is quite expensive. */ +#undef ENABLE_GC_CHECKING + +/* Define if you want the garbage collector to operate in maximally + paranoid mode, validating the entire heap and collecting garbage at + every opportunity. This is extremely expensive. */ +#undef ENABLE_GC_ALWAYS_COLLECT + +/* Define if you want the C and C++ compilers to support multibyte + character sets for source code. */ +#undef MULTIBYTE_CHARS + +/* Define if your compiler understands volatile. */ +#undef HAVE_VOLATILE + +/* Define if your compiler supports the `long double' type. */ +#undef HAVE_LONG_DOUBLE + +/* Define if the `_Bool' type is built-in. */ +#undef HAVE__BOOL + +/* The number of bytes in type short */ +#undef SIZEOF_SHORT + +/* The number of bytes in type int */ +#undef SIZEOF_INT + +/* The number of bytes in type long */ +#undef SIZEOF_LONG + +/* Define if the host execution character set is EBCDIC. */ +#undef HOST_EBCDIC + +/* Define if you have a working header file. */ +#undef HAVE_STDBOOL_H + +/* Define if you can safely include both and . */ +#undef STRING_WITH_STRINGS + +/* Define as the number of bits in a byte, if `limits.h' doesn't. */ +#undef CHAR_BIT + +/* Define if the host machine stores words of multi-word integers in + big-endian order. */ +#undef HOST_WORDS_BIG_ENDIAN + +/* Define to the floating point format of the host machine, if not IEEE. */ +#undef HOST_FLOAT_FORMAT + +/* Define to 1 if the host machine stores floating point numbers in + memory with the word containing the sign bit at the lowest address, + or to 0 if it does it the other way around. + + This macro should not be defined if the ordering is the same as for + multi-word integers. */ +#undef HOST_FLOAT_WORDS_BIG_ENDIAN + +/* Define if you have a working header file. */ +#undef HAVE_INTTYPES_H + +/* Define if printf supports %p. */ +#undef HAVE_PRINTF_PTR + +/* Define if mmap can get us zeroed pages from /dev/zero. */ +#undef HAVE_MMAP_DEV_ZERO + +/* Define if mmap can get us zeroed pages using MAP_ANON(YMOUS). */ +#undef HAVE_MMAP_ANON + +/* Define if read-only mmap of a plain file works. */ +#undef HAVE_MMAP_FILE + +/* Define if you have the iconv() function. */ +#undef HAVE_ICONV + +/* Define as const if the declaration of iconv() needs const. */ +#undef ICONV_CONST + +/* Define to 1 if we found this declaration otherwise define to 0. */ +#undef HAVE_DECL_GETENV + +/* Define to 1 if we found this declaration otherwise define to 0. */ +#undef HAVE_DECL_ABORT + +/* Define to 1 if we found this declaration otherwise define to 0. */ +#undef HAVE_DECL_ERRNO + +/* Define to 1 if we found this declaration otherwise define to 0. */ +#undef HAVE_DECL_MALLOC + +/* Define to 1 if we found this declaration otherwise define to 0. */ +#undef HAVE_DECL_REALLOC + +/* Define to 1 if we found this declaration otherwise define to 0. */ +#undef HAVE_DECL_CALLOC + +/* Define to 1 if we found this declaration otherwise define to 0. */ +#undef HAVE_DECL_FREE + +/* Define to 1 if we found this declaration otherwise define to 0. */ +#undef HAVE_DECL_BASENAME + +/* Define to 1 if we found this declaration otherwise define to 0. */ +#undef HAVE_DECL_CLOCK + +/* Define to 1 if we found this declaration otherwise define to 0. */ +#undef HAVE_DECL_TIMES + +/* Define if host mkdir takes a single argument. */ +#undef MKDIR_TAKES_ONE_ARG + +/* Define if you have the iconv() function. */ +#undef HAVE_ICONV + +/* Define as const if the declaration of iconv() needs const. */ +#undef ICONV_CONST + +/* Define if you have and nl_langinfo(CODESET). */ +#undef HAVE_LANGINFO_CODESET + +/* Define if your file defines LC_MESSAGES. */ +#undef HAVE_LC_MESSAGES + +/* Define to 1 if translation of program messages to the user's native language + is requested. */ +#undef ENABLE_NLS + +/* Define if you have the header file. */ +#undef HAVE_LIBINTL_H + +/* Define if the GNU gettext() function is already present or preinstalled. */ +#undef HAVE_GETTEXT + +/* Define to use the libintl included with this package instead of any + version in the system libraries. */ +#undef USE_INCLUDED_LIBINTL + +/* Define to 1 if installation paths should be looked up in Windows32 + Registry. Ignored on non windows32 hosts. */ +#undef ENABLE_WIN32_REGISTRY + +/* Define to be the last portion of registry key on windows hosts. */ +#undef WIN32_REGISTRY_KEY + + +/* Bison unconditionally undefines `const' if neither `__STDC__' nor + __cplusplus are defined. That's a problem since we use `const' in + the GCC headers, and the resulting bison code is therefore type + unsafe. Thus, we must match the bison behavior here. */ + +#ifndef __STDC__ +#ifndef __cplusplus +#undef const +#define const +#endif +#endif diff --git a/support/cpp/configure b/support/cpp/configure new file mode 100755 index 0000000..c87aece --- /dev/null +++ b/support/cpp/configure @@ -0,0 +1,7944 @@ +#! /bin/sh +# Guess values for system-dependent variables and create Makefiles. +# Generated by GNU Autoconf 2.60. +# +# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, +# 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +# This configure script is free software; the Free Software Foundation +# gives unlimited permission to copy, distribute and modify it. +## --------------------- ## +## M4sh Initialization. ## +## --------------------- ## + +# Be Bourne compatible +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac +fi +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh + + +# PATH needs CR +# Avoid depending upon Character Ranges. +as_cr_letters='abcdefghijklmnopqrstuvwxyz' +as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +as_cr_Letters=$as_cr_letters$as_cr_LETTERS +as_cr_digits='0123456789' +as_cr_alnum=$as_cr_Letters$as_cr_digits + +# The user is always right. +if test "${PATH_SEPARATOR+set}" != set; then + echo "#! /bin/sh" >conf$$.sh + echo "exit 0" >>conf$$.sh + chmod +x conf$$.sh + if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then + PATH_SEPARATOR=';' + else + PATH_SEPARATOR=: + fi + rm -f conf$$.sh +fi + +# Support unset when possible. +if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then + as_unset=unset +else + as_unset=false +fi + + +# IFS +# We need space, tab and new line, in precisely that order. Quoting is +# there to prevent editors from complaining about space-tab. +# (If _AS_PATH_WALK were called with IFS unset, it would disable word +# splitting by setting IFS to empty value.) +as_nl=' +' +IFS=" "" $as_nl" + +# Find who we are. Look in the path if we contain no directory separator. +case $0 in + *[\\/]* ) as_myself=$0 ;; + *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break +done +IFS=$as_save_IFS + + ;; +esac +# We did not find ourselves, most probably we were run as `sh COMMAND' +# in which case we are not to be found in the path. +if test "x$as_myself" = x; then + as_myself=$0 +fi +if test ! -f "$as_myself"; then + echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2 + { (exit 1); exit 1; } +fi + +# Work around bugs in pre-3.0 UWIN ksh. +for as_var in ENV MAIL MAILPATH +do ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var +done +PS1='$ ' +PS2='> ' +PS4='+ ' + +# NLS nuisances. +for as_var in \ + LANG LANGUAGE LC_ADDRESS LC_ALL LC_COLLATE LC_CTYPE LC_IDENTIFICATION \ + LC_MEASUREMENT LC_MESSAGES LC_MONETARY LC_NAME LC_NUMERIC LC_PAPER \ + LC_TELEPHONE LC_TIME +do + if (set +x; test -z "`(eval $as_var=C; export $as_var) 2>&1`"); then + eval $as_var=C; export $as_var + else + ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var + fi +done + +# Required to use basename. +if expr a : '\(a\)' >/dev/null 2>&1 && + test "X`expr 00001 : '.*\(...\)'`" = X001; then + as_expr=expr +else + as_expr=false +fi + +if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then + as_basename=basename +else + as_basename=false +fi + + +# Name of the executable. +as_me=`$as_basename -- "$0" || +$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \ + X"$0" : 'X\(//\)$' \| \ + X"$0" : 'X\(/\)' \| . 2>/dev/null || +echo X/"$0" | + sed '/^.*\/\([^/][^/]*\)\/*$/{ + s//\1/ + q + } + /^X\/\(\/\/\)$/{ + s//\1/ + q + } + /^X\/\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + +# CDPATH. +$as_unset CDPATH + + +if test "x$CONFIG_SHELL" = x; then + if (eval ":") 2>/dev/null; then + as_have_required=yes +else + as_have_required=no +fi + + if test $as_have_required = yes && (eval ": +(as_func_return () { + (exit \$1) +} +as_func_success () { + as_func_return 0 +} +as_func_failure () { + as_func_return 1 +} +as_func_ret_success () { + return 0 +} +as_func_ret_failure () { + return 1 +} + +exitcode=0 +if as_func_success; then + : +else + exitcode=1 + echo as_func_success failed. +fi + +if as_func_failure; then + exitcode=1 + echo as_func_failure succeeded. +fi + +if as_func_ret_success; then + : +else + exitcode=1 + echo as_func_ret_success failed. +fi + +if as_func_ret_failure; then + exitcode=1 + echo as_func_ret_failure succeeded. +fi + +if ( set x; as_func_ret_success y && test x = \"\$1\" ); then + : +else + exitcode=1 + echo positional parameters were not saved. +fi + +test \$exitcode = 0) || { (exit 1); exit 1; } + +( + as_lineno_1=\$LINENO + as_lineno_2=\$LINENO + test \"x\$as_lineno_1\" != \"x\$as_lineno_2\" && + test \"x\`expr \$as_lineno_1 + 1\`\" = \"x\$as_lineno_2\") || { (exit 1); exit 1; } +") 2> /dev/null; then + : +else + as_candidate_shells= + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in /usr/bin/posix$PATH_SEPARATOR/bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + case $as_dir in + /*) + for as_base in sh bash ksh sh5; do + as_candidate_shells="$as_candidate_shells $as_dir/$as_base" + done;; + esac +done +IFS=$as_save_IFS + + + for as_shell in $as_candidate_shells $SHELL; do + # Try only shells that exist, to save several forks. + if { test -f "$as_shell" || test -f "$as_shell.exe"; } && + { ("$as_shell") 2> /dev/null <<\_ASEOF +# Be Bourne compatible +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac +fi +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh + +: +_ASEOF +}; then + CONFIG_SHELL=$as_shell + as_have_required=yes + if { "$as_shell" 2> /dev/null <<\_ASEOF +# Be Bourne compatible +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac +fi +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh + +: +(as_func_return () { + (exit $1) +} +as_func_success () { + as_func_return 0 +} +as_func_failure () { + as_func_return 1 +} +as_func_ret_success () { + return 0 +} +as_func_ret_failure () { + return 1 +} + +exitcode=0 +if as_func_success; then + : +else + exitcode=1 + echo as_func_success failed. +fi + +if as_func_failure; then + exitcode=1 + echo as_func_failure succeeded. +fi + +if as_func_ret_success; then + : +else + exitcode=1 + echo as_func_ret_success failed. +fi + +if as_func_ret_failure; then + exitcode=1 + echo as_func_ret_failure succeeded. +fi + +if ( set x; as_func_ret_success y && test x = "$1" ); then + : +else + exitcode=1 + echo positional parameters were not saved. +fi + +test $exitcode = 0) || { (exit 1); exit 1; } + +( + as_lineno_1=$LINENO + as_lineno_2=$LINENO + test "x$as_lineno_1" != "x$as_lineno_2" && + test "x`expr $as_lineno_1 + 1`" = "x$as_lineno_2") || { (exit 1); exit 1; } + +_ASEOF +}; then + break +fi + +fi + + done + + if test "x$CONFIG_SHELL" != x; then + for as_var in BASH_ENV ENV + do ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var + done + export CONFIG_SHELL + exec "$CONFIG_SHELL" "$as_myself" ${1+"$@"} +fi + + + if test $as_have_required = no; then + echo This script requires a shell more modern than all the + echo shells that I found on your system. Please install a + echo modern shell, or manually run the script under such a + echo shell if you do have one. + { (exit 1); exit 1; } +fi + + +fi + +fi + + + +(eval "as_func_return () { + (exit \$1) +} +as_func_success () { + as_func_return 0 +} +as_func_failure () { + as_func_return 1 +} +as_func_ret_success () { + return 0 +} +as_func_ret_failure () { + return 1 +} + +exitcode=0 +if as_func_success; then + : +else + exitcode=1 + echo as_func_success failed. +fi + +if as_func_failure; then + exitcode=1 + echo as_func_failure succeeded. +fi + +if as_func_ret_success; then + : +else + exitcode=1 + echo as_func_ret_success failed. +fi + +if as_func_ret_failure; then + exitcode=1 + echo as_func_ret_failure succeeded. +fi + +if ( set x; as_func_ret_success y && test x = \"\$1\" ); then + : +else + exitcode=1 + echo positional parameters were not saved. +fi + +test \$exitcode = 0") || { + echo No shell found that supports shell functions. + echo Please tell autoconf@gnu.org about your system, + echo including any error possibly output before this + echo message +} + + + + as_lineno_1=$LINENO + as_lineno_2=$LINENO + test "x$as_lineno_1" != "x$as_lineno_2" && + test "x`expr $as_lineno_1 + 1`" = "x$as_lineno_2" || { + + # Create $as_me.lineno as a copy of $as_myself, but with $LINENO + # uniformly replaced by the line number. The first 'sed' inserts a + # line-number line after each line using $LINENO; the second 'sed' + # does the real work. The second script uses 'N' to pair each + # line-number line with the line containing $LINENO, and appends + # trailing '-' during substitution so that $LINENO is not a special + # case at line end. + # (Raja R Harinath suggested sed '=', and Paul Eggert wrote the + # scripts with optimization help from Paolo Bonzini. Blame Lee + # E. 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Use of quotes ensures accuracy. + *) ac_configure_args="$ac_configure_args '$ac_arg'" ;; + esac + fi +done +if $ac_cache_corrupted; then + { echo "$as_me:$LINENO: error: changes in the environment can compromise the build" >&5 +echo "$as_me: error: changes in the environment can compromise the build" >&2;} + { { echo "$as_me:$LINENO: error: run \`make distclean' and/or \`rm $cache_file' and start over" >&5 +echo "$as_me: error: run \`make distclean' and/or \`rm $cache_file' and start over" >&2;} + { (exit 1); exit 1; }; } +fi + + + + + + + + + + + + + + + + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + +ac_config_headers="$ac_config_headers auto-host.h:config.in" + + +remove=rm +hard_link=ln +symbolic_link='ln -s' +copy=cp + +# Check for additional parameters + +# With GNU ld + +# Check whether --with-gnu-ld was given. +if test "${with_gnu_ld+set}" = set; then + withval=$with_gnu_ld; gnu_ld_flag="$with_gnu_ld" +else + gnu_ld_flag=no +fi + + +# With pre-defined ld + +# Check whether --with-ld was given. +if test "${with_ld+set}" = set; then + withval=$with_ld; DEFAULT_LINKER="$with_ld" +fi + +if test x"${DEFAULT_LINKER+set}" = x"set"; then + if test ! -x "$DEFAULT_LINKER"; then + { echo "$as_me:$LINENO: WARNING: cannot execute: $DEFAULT_LINKER: check --with-ld or env. var. DEFAULT_LINKER" >&5 +echo "$as_me: WARNING: cannot execute: $DEFAULT_LINKER: check --with-ld or env. var. DEFAULT_LINKER" >&2;} + elif $DEFAULT_LINKER -v < /dev/null 2>&1 | grep GNU > /dev/null; then + gnu_ld_flag=yes + fi + +cat >>confdefs.h <<_ACEOF +#define DEFAULT_LINKER "$DEFAULT_LINKER" +_ACEOF + +fi + +# With GNU as + +# Check whether --with-gnu-as was given. +if test "${with_gnu_as+set}" = set; then + withval=$with_gnu_as; gas_flag="$with_gnu_as" +else + gas_flag=no +fi + + + +# Check whether --with-as was given. +if test "${with_as+set}" = set; then + withval=$with_as; DEFAULT_ASSEMBLER="$with_as" +fi + +if test x"${DEFAULT_ASSEMBLER+set}" = x"set"; then + if test ! -x "$DEFAULT_ASSEMBLER"; then + { echo "$as_me:$LINENO: WARNING: cannot execute: $DEFAULT_ASSEMBLER: check --with-as or env. var. DEFAULT_ASSEMBLER" >&5 +echo "$as_me: WARNING: cannot execute: $DEFAULT_ASSEMBLER: check --with-as or env. var. DEFAULT_ASSEMBLER" >&2;} + elif $DEFAULT_ASSEMBLER -v < /dev/null 2>&1 | grep GNU > /dev/null; then + gas_flag=yes + fi + +cat >>confdefs.h <<_ACEOF +#define DEFAULT_ASSEMBLER "$DEFAULT_ASSEMBLER" +_ACEOF + +fi + +# With stabs + +# Check whether --with-stabs was given. +if test "${with_stabs+set}" = set; then + withval=$with_stabs; stabs="$with_stabs" +else + stabs=no +fi + + +# With ELF + +# Check whether --with-elf was given. +if test "${with_elf+set}" = set; then + withval=$with_elf; elf="$with_elf" +else + elf=no +fi + + +# Specify the local prefix +local_prefix= + +# Check whether --with-local-prefix was given. +if test "${with_local_prefix+set}" = set; then + withval=$with_local_prefix; case "${withval}" in +yes) { { echo "$as_me:$LINENO: error: bad value ${withval} given for local include directory prefix" >&5 +echo "$as_me: error: bad value ${withval} given for local include directory prefix" >&2;} + { (exit 1); exit 1; }; } ;; +no) ;; +*) local_prefix=$with_local_prefix ;; +esac +fi + + +# Default local prefix if it is empty +if test x$local_prefix = x; then + local_prefix=/usr/local +fi + +test "$program_prefix" != NONE && + program_transform_name="s&^&$program_prefix&;$program_transform_name" +# Use a double $ so make ignores it. +test "$program_suffix" != NONE && + program_transform_name="s&\$&$program_suffix&;$program_transform_name" +# Double any \ or $. echo might interpret backslashes. +# By default was `s,x,x', remove it if useless. +cat <<\_ACEOF >conftest.sed +s/[\\$]/&&/g;s/;s,x,x,$// +_ACEOF +program_transform_name=`echo $program_transform_name | sed -f conftest.sed` +rm -f conftest.sed + + +# Enable Multibyte Characters for C/C++ +# Check whether --enable-c-mbchar was given. +if test "${enable_c_mbchar+set}" = set; then + enableval=$enable_c_mbchar; if test x$enable_c_mbchar != xno; then + +cat >>confdefs.h <<\_ACEOF +#define MULTIBYTE_CHARS 1 +_ACEOF + +fi +fi + + +# Find the native compiler +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}gcc", so it can be a program name with args. +set dummy ${ac_tool_prefix}gcc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="${ac_tool_prefix}gcc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_CC"; then + ac_ct_CC=$CC + # Extract the first word of "gcc", so it can be a program name with args. +set dummy gcc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_CC="gcc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 +echo "${ECHO_T}$ac_ct_CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +else + CC="$ac_cv_prog_CC" +fi + +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}cc", so it can be a program name with args. +set dummy ${ac_tool_prefix}cc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="${ac_tool_prefix}cc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + fi +fi +if test -z "$CC"; then + # Extract the first word of "cc", so it can be a program name with args. +set dummy cc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else + ac_prog_rejected=no +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then + ac_prog_rejected=yes + continue + fi + ac_cv_prog_CC="cc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +if test $ac_prog_rejected = yes; then + # We found a bogon in the path, so make sure we never use it. + set dummy $ac_cv_prog_CC + shift + if test $# != 0; then + # We chose a different compiler from the bogus one. + # However, it has the same basename, so the bogon will be chosen + # first if we set CC to just the basename; use the full file name. + shift + ac_cv_prog_CC="$as_dir/$ac_word${1+' '}$@" + fi +fi +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + for ac_prog in cl.exe + do + # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. +set dummy $ac_tool_prefix$ac_prog; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="$ac_tool_prefix$ac_prog" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + test -n "$CC" && break + done +fi +if test -z "$CC"; then + ac_ct_CC=$CC + for ac_prog in cl.exe +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_CC="$ac_prog" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 +echo "${ECHO_T}$ac_ct_CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + test -n "$ac_ct_CC" && break +done + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +fi + +fi + + +test -z "$CC" && { { echo "$as_me:$LINENO: error: no acceptable C compiler found in \$PATH +See \`config.log' for more details." >&5 +echo "$as_me: error: no acceptable C compiler found in \$PATH +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } + +# Provide some information about the compiler. +echo "$as_me:$LINENO: checking for C compiler version" >&5 +ac_compiler=`set X $ac_compile; echo $2` +{ (ac_try="$ac_compiler --version >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compiler --version >&5") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } +{ (ac_try="$ac_compiler -v >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compiler -v >&5") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } +{ (ac_try="$ac_compiler -V >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compiler -V >&5") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } + +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +ac_clean_files_save=$ac_clean_files +ac_clean_files="$ac_clean_files a.out a.exe b.out" +# Try to create an executable without -o first, disregard a.out. +# It will help us diagnose broken compilers, and finding out an intuition +# of exeext. +{ echo "$as_me:$LINENO: checking for C compiler default output file name" >&5 +echo $ECHO_N "checking for C compiler default output file name... $ECHO_C" >&6; } +ac_link_default=`echo "$ac_link" | sed 's/ -o *conftest[^ ]*//'` +# +# List of possible output files, starting from the most likely. +# The algorithm is not robust to junk in `.', hence go to wildcards (a.*) +# only as a last resort. b.out is created by i960 compilers. +ac_files='a_out.exe a.exe conftest.exe a.out conftest a.* conftest.* b.out' +# +# The IRIX 6 linker writes into existing files which may not be +# executable, retaining their permissions. Remove them first so a +# subsequent execution test works. +ac_rmfiles= +for ac_file in $ac_files +do + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.o | *.obj ) ;; + * ) ac_rmfiles="$ac_rmfiles $ac_file";; + esac +done +rm -f $ac_rmfiles + +if { (ac_try="$ac_link_default" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link_default") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; then + # Autoconf-2.13 could set the ac_cv_exeext variable to `no'. +# So ignore a value of `no', otherwise this would lead to `EXEEXT = no' +# in a Makefile. We should not override ac_cv_exeext if it was cached, +# so that the user can short-circuit this test for compilers unknown to +# Autoconf. +for ac_file in $ac_files +do + test -f "$ac_file" || continue + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.o | *.obj ) + ;; + [ab].out ) + # We found the default executable, but exeext='' is most + # certainly right. + break;; + *.* ) + if test "${ac_cv_exeext+set}" = set && test "$ac_cv_exeext" != no; + then :; else + ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'` + fi + # We set ac_cv_exeext here because the later test for it is not + # safe: cross compilers may not add the suffix if given an `-o' + # argument, so we may need to know it at that point already. + # Even if this section looks crufty: it has the advantage of + # actually working. + break;; + * ) + break;; + esac +done +test "$ac_cv_exeext" = no && ac_cv_exeext= + +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +{ { echo "$as_me:$LINENO: error: C compiler cannot create executables +See \`config.log' for more details." >&5 +echo "$as_me: error: C compiler cannot create executables +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } +fi + +ac_exeext=$ac_cv_exeext +{ echo "$as_me:$LINENO: result: $ac_file" >&5 +echo "${ECHO_T}$ac_file" >&6; } + +# Check that the compiler produces executables we can run. If not, either +# the compiler is broken, or we cross compile. +{ echo "$as_me:$LINENO: checking whether the C compiler works" >&5 +echo $ECHO_N "checking whether the C compiler works... $ECHO_C" >&6; } +# FIXME: These cross compiler hacks should be removed for Autoconf 3.0 +# If not cross compiling, check that we can run a simple program. +if test "$cross_compiling" != yes; then + if { ac_try='./$ac_file' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + cross_compiling=no + else + if test "$cross_compiling" = maybe; then + cross_compiling=yes + else + { { echo "$as_me:$LINENO: error: cannot run C compiled programs. +If you meant to cross compile, use \`--host'. +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot run C compiled programs. +If you meant to cross compile, use \`--host'. +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } + fi + fi +fi +{ echo "$as_me:$LINENO: result: yes" >&5 +echo "${ECHO_T}yes" >&6; } + +rm -f a.out a.exe conftest$ac_cv_exeext b.out +ac_clean_files=$ac_clean_files_save +# Check that the compiler produces executables we can run. If not, either +# the compiler is broken, or we cross compile. +{ echo "$as_me:$LINENO: checking whether we are cross compiling" >&5 +echo $ECHO_N "checking whether we are cross compiling... $ECHO_C" >&6; } +{ echo "$as_me:$LINENO: result: $cross_compiling" >&5 +echo "${ECHO_T}$cross_compiling" >&6; } + +{ echo "$as_me:$LINENO: checking for suffix of executables" >&5 +echo $ECHO_N "checking for suffix of executables... $ECHO_C" >&6; } +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; then + # If both `conftest.exe' and `conftest' are `present' (well, observable) +# catch `conftest.exe'. For instance with Cygwin, `ls conftest' will +# work properly (i.e., refer to `conftest.exe'), while it won't with +# `rm'. +for ac_file in conftest.exe conftest conftest.*; do + test -f "$ac_file" || continue + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.o | *.obj ) ;; + *.* ) ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'` + break;; + * ) break;; + esac +done +else + { { echo "$as_me:$LINENO: error: cannot compute suffix of executables: cannot compile and link +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute suffix of executables: cannot compile and link +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } +fi + +rm -f conftest$ac_cv_exeext +{ echo "$as_me:$LINENO: result: $ac_cv_exeext" >&5 +echo "${ECHO_T}$ac_cv_exeext" >&6; } + +rm -f conftest.$ac_ext +EXEEXT=$ac_cv_exeext +ac_exeext=$EXEEXT +{ echo "$as_me:$LINENO: checking for suffix of object files" >&5 +echo $ECHO_N "checking for suffix of object files... $ECHO_C" >&6; } +if test "${ac_cv_objext+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.o conftest.obj +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; then + for ac_file in conftest.o conftest.obj conftest.*; do + test -f "$ac_file" || continue; + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf ) ;; + *) ac_cv_objext=`expr "$ac_file" : '.*\.\(.*\)'` + break;; + esac +done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +{ { echo "$as_me:$LINENO: error: cannot compute suffix of object files: cannot compile +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute suffix of object files: cannot compile +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } +fi + +rm -f conftest.$ac_cv_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_objext" >&5 +echo "${ECHO_T}$ac_cv_objext" >&6; } +OBJEXT=$ac_cv_objext +ac_objext=$OBJEXT +{ echo "$as_me:$LINENO: checking whether we are using the GNU C compiler" >&5 +echo $ECHO_N "checking whether we are using the GNU C compiler... $ECHO_C" >&6; } +if test "${ac_cv_c_compiler_gnu+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ +#ifndef __GNUC__ + choke me +#endif + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_compiler_gnu=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_compiler_gnu=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +ac_cv_c_compiler_gnu=$ac_compiler_gnu + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_c_compiler_gnu" >&5 +echo "${ECHO_T}$ac_cv_c_compiler_gnu" >&6; } +GCC=`test $ac_compiler_gnu = yes && echo yes` +ac_test_CFLAGS=${CFLAGS+set} +ac_save_CFLAGS=$CFLAGS +{ echo "$as_me:$LINENO: checking whether $CC accepts -g" >&5 +echo $ECHO_N "checking whether $CC accepts -g... $ECHO_C" >&6; } +if test "${ac_cv_prog_cc_g+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_save_c_werror_flag=$ac_c_werror_flag + ac_c_werror_flag=yes + ac_cv_prog_cc_g=no + CFLAGS="-g" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_prog_cc_g=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + CFLAGS="" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_c_werror_flag=$ac_save_c_werror_flag + CFLAGS="-g" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_prog_cc_g=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + ac_c_werror_flag=$ac_save_c_werror_flag +fi +{ echo "$as_me:$LINENO: result: $ac_cv_prog_cc_g" >&5 +echo "${ECHO_T}$ac_cv_prog_cc_g" >&6; } +if test "$ac_test_CFLAGS" = set; then + CFLAGS=$ac_save_CFLAGS +elif test $ac_cv_prog_cc_g = yes; then + if test "$GCC" = yes; then + CFLAGS="-g -O2" + else + CFLAGS="-g" + fi +else + if test "$GCC" = yes; then + CFLAGS="-O2" + else + CFLAGS= + fi +fi +{ echo "$as_me:$LINENO: checking for $CC option to accept ISO C89" >&5 +echo $ECHO_N "checking for $CC option to accept ISO C89... $ECHO_C" >&6; } +if test "${ac_cv_prog_cc_c89+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_cv_prog_cc_c89=no +ac_save_CC=$CC +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#include +#include +/* Most of the following tests are stolen from RCS 5.7's src/conf.sh. */ +struct buf { int x; }; +FILE * (*rcsopen) (struct buf *, struct stat *, int); +static char *e (p, i) + char **p; + int i; +{ + return p[i]; +} +static char *f (char * (*g) (char **, int), char **p, ...) +{ + char *s; + va_list v; + va_start (v,p); + s = g (p, va_arg (v,int)); + va_end (v); + return s; +} + +/* OSF 4.0 Compaq cc is some sort of almost-ANSI by default. It has + function prototypes and stuff, but not '\xHH' hex character constants. + These don't provoke an error unfortunately, instead are silently treated + as 'x'. The following induces an error, until -std is added to get + proper ANSI mode. Curiously '\x00'!='x' always comes out true, for an + array size at least. It's necessary to write '\x00'==0 to get something + that's true only with -std. */ +int osf4_cc_array ['\x00' == 0 ? 1 : -1]; + +/* IBM C 6 for AIX is almost-ANSI by default, but it replaces macro parameters + inside strings and character constants. */ +#define FOO(x) 'x' +int xlc6_cc_array[FOO(a) == 'x' ? 1 : -1]; + +int test (int i, double x); +struct s1 {int (*f) (int a);}; +struct s2 {int (*f) (double a);}; +int pairnames (int, char **, FILE *(*)(struct buf *, struct stat *, int), int, int); +int argc; +char **argv; +int +main () +{ +return f (e, argv, 0) != argv[0] || f (e, argv, 1) != argv[1]; + ; + return 0; +} +_ACEOF +for ac_arg in '' -qlanglvl=extc89 -qlanglvl=ansi -std \ + -Ae "-Aa -D_HPUX_SOURCE" "-Xc -D__EXTENSIONS__" +do + CC="$ac_save_CC $ac_arg" + rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_prog_cc_c89=$ac_arg +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext + test "x$ac_cv_prog_cc_c89" != "xno" && break +done +rm -f conftest.$ac_ext +CC=$ac_save_CC + +fi +# AC_CACHE_VAL +case "x$ac_cv_prog_cc_c89" in + x) + { echo "$as_me:$LINENO: result: none needed" >&5 +echo "${ECHO_T}none needed" >&6; } ;; + xno) + { echo "$as_me:$LINENO: result: unsupported" >&5 +echo "${ECHO_T}unsupported" >&6; } ;; + *) + CC="$CC $ac_cv_prog_cc_c89" + { echo "$as_me:$LINENO: result: $ac_cv_prog_cc_c89" >&5 +echo "${ECHO_T}$ac_cv_prog_cc_c89" >&6; } ;; +esac + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + +if test "x$CC" != xcc; then + { echo "$as_me:$LINENO: checking whether $CC and cc understand -c and -o together" >&5 +echo $ECHO_N "checking whether $CC and cc understand -c and -o together... $ECHO_C" >&6; } +else + { echo "$as_me:$LINENO: checking whether cc understands -c and -o together" >&5 +echo $ECHO_N "checking whether cc understands -c and -o together... $ECHO_C" >&6; } +fi +set dummy $CC; ac_cc=`echo $2 | + sed 's/[^a-zA-Z0-9_]/_/g;s/^[0-9]/_/'` +if { as_var=ac_cv_prog_cc_${ac_cc}_c_o; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +# Make sure it works both with $CC and with simple cc. +# We do the test twice because some compilers refuse to overwrite an +# existing .o file with -o, though they will create one. +ac_try='$CC -c conftest.$ac_ext -o conftest2.$ac_objext >&5' +rm -f conftest2.* +if { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + test -f conftest2.$ac_objext && { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; +then + eval ac_cv_prog_cc_${ac_cc}_c_o=yes + if test "x$CC" != xcc; then + # Test first that cc exists at all. + if { ac_try='cc -c conftest.$ac_ext >&5' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_try='cc -c conftest.$ac_ext -o conftest2.$ac_objext >&5' + rm -f conftest2.* + if { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + test -f conftest2.$ac_objext && { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; + then + # cc works too. + : + else + # cc exists but doesn't like -o. + eval ac_cv_prog_cc_${ac_cc}_c_o=no + fi + fi + fi +else + eval ac_cv_prog_cc_${ac_cc}_c_o=no +fi +rm -f core conftest* + +fi +if eval test \$ac_cv_prog_cc_${ac_cc}_c_o = yes; then + { echo "$as_me:$LINENO: result: yes" >&5 +echo "${ECHO_T}yes" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } + +cat >>confdefs.h <<\_ACEOF +#define NO_MINUS_C_MINUS_O 1 +_ACEOF + +fi + +# autoconf is lame and doesn't give us any substitution variable for this. +if eval "test \"`echo '$ac_cv_prog_cc_'${ac_cc}_c_o`\" = no"; then + NO_MINUS_C_MINUS_O=yes +else + OUTPUT_OPTION='-o $@' +fi + + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu +{ echo "$as_me:$LINENO: checking how to run the C preprocessor" >&5 +echo $ECHO_N "checking how to run the C preprocessor... $ECHO_C" >&6; } +# On Suns, sometimes $CPP names a directory. +if test -n "$CPP" && test -d "$CPP"; then + CPP= +fi +if test -z "$CPP"; then + if test "${ac_cv_prog_CPP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + # Double quotes because CPP needs to be expanded + for CPP in "$CC -E" "$CC -E -traditional-cpp" "/lib/cpp" + do + ac_preproc_ok=false +for ac_c_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Broken: fails on valid input. +continue +fi + +rm -f conftest.err conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + # Broken: success on invalid input. +continue +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Passes both tests. +ac_preproc_ok=: +break +fi + +rm -f conftest.err conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.err conftest.$ac_ext +if $ac_preproc_ok; then + break +fi + + done + ac_cv_prog_CPP=$CPP + +fi + CPP=$ac_cv_prog_CPP +else + ac_cv_prog_CPP=$CPP +fi +{ echo "$as_me:$LINENO: result: $CPP" >&5 +echo "${ECHO_T}$CPP" >&6; } +ac_preproc_ok=false +for ac_c_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Broken: fails on valid input. +continue +fi + +rm -f conftest.err conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + # Broken: success on invalid input. +continue +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Passes both tests. +ac_preproc_ok=: +break +fi + +rm -f conftest.err conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.err conftest.$ac_ext +if $ac_preproc_ok; then + : +else + { { echo "$as_me:$LINENO: error: C preprocessor \"$CPP\" fails sanity check +See \`config.log' for more details." >&5 +echo "$as_me: error: C preprocessor \"$CPP\" fails sanity check +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } +fi + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + +{ echo "$as_me:$LINENO: checking for inline" >&5 +echo $ECHO_N "checking for inline... $ECHO_C" >&6; } +if test "${ac_cv_c_inline+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_cv_c_inline=no +for ac_kw in inline __inline__ __inline; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifndef __cplusplus +typedef int foo_t; +static $ac_kw foo_t static_foo () {return 0; } +$ac_kw foo_t foo () {return 0; } +#endif + +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_c_inline=$ac_kw +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + test "$ac_cv_c_inline" != no && break +done + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_c_inline" >&5 +echo "${ECHO_T}$ac_cv_c_inline" >&6; } + + +case $ac_cv_c_inline in + inline | yes) ;; + *) + case $ac_cv_c_inline in + no) ac_val=;; + *) ac_val=$ac_cv_c_inline;; + esac + cat >>confdefs.h <<_ACEOF +#ifndef __cplusplus +#define inline $ac_val +#endif +_ACEOF + ;; +esac + + +{ echo "$as_me:$LINENO: checking for built-in _Bool" >&5 +echo $ECHO_N "checking for built-in _Bool... $ECHO_C" >&6; } +if test "${gcc_cv_c__bool+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ +_Bool foo; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + gcc_cv_c__bool=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + gcc_cv_c__bool=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + +fi +{ echo "$as_me:$LINENO: result: $gcc_cv_c__bool" >&5 +echo "${ECHO_T}$gcc_cv_c__bool" >&6; } +if test $gcc_cv_c__bool = yes; then + +cat >>confdefs.h <<\_ACEOF +#define HAVE__BOOL 1 +_ACEOF + +fi + + +# sizeof(char) is 1 by definition. +{ echo "$as_me:$LINENO: checking size of short" >&5 +echo $ECHO_N "checking size of short... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_short+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + for ac_size in 4 8 1 2 16 ; do # List sizes in rough order of prevalence. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include "confdefs.h" +#include + + +int +main () +{ +switch (0) case 0: case (sizeof (short) == $ac_size):; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_short=$ac_size +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + if test x$ac_cv_sizeof_short != x ; then break; fi +done + +fi + +if test x$ac_cv_sizeof_short = x ; then + { { echo "$as_me:$LINENO: error: cannot determine a size for short" >&5 +echo "$as_me: error: cannot determine a size for short" >&2;} + { (exit 1); exit 1; }; } +fi +{ echo "$as_me:$LINENO: result: $ac_cv_sizeof_short" >&5 +echo "${ECHO_T}$ac_cv_sizeof_short" >&6; } + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_SHORT $ac_cv_sizeof_short +_ACEOF + + +{ echo "$as_me:$LINENO: checking size of int" >&5 +echo $ECHO_N "checking size of int... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_int+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + for ac_size in 4 8 1 2 16 ; do # List sizes in rough order of prevalence. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include "confdefs.h" +#include + + +int +main () +{ +switch (0) case 0: case (sizeof (int) == $ac_size):; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_int=$ac_size +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + if test x$ac_cv_sizeof_int != x ; then break; fi +done + +fi + +if test x$ac_cv_sizeof_int = x ; then + { { echo "$as_me:$LINENO: error: cannot determine a size for int" >&5 +echo "$as_me: error: cannot determine a size for int" >&2;} + { (exit 1); exit 1; }; } +fi +{ echo "$as_me:$LINENO: result: $ac_cv_sizeof_int" >&5 +echo "${ECHO_T}$ac_cv_sizeof_int" >&6; } + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_INT $ac_cv_sizeof_int +_ACEOF + + +{ echo "$as_me:$LINENO: checking size of long" >&5 +echo $ECHO_N "checking size of long... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_long+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + for ac_size in 4 8 1 2 16 ; do # List sizes in rough order of prevalence. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include "confdefs.h" +#include + + +int +main () +{ +switch (0) case 0: case (sizeof (long) == $ac_size):; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_long=$ac_size +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + if test x$ac_cv_sizeof_long != x ; then break; fi +done + +fi + +if test x$ac_cv_sizeof_long = x ; then + { { echo "$as_me:$LINENO: error: cannot determine a size for long" >&5 +echo "$as_me: error: cannot determine a size for long" >&2;} + { (exit 1); exit 1; }; } +fi +{ echo "$as_me:$LINENO: result: $ac_cv_sizeof_long" >&5 +echo "${ECHO_T}$ac_cv_sizeof_long" >&6; } + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_LONG $ac_cv_sizeof_long +_ACEOF + + + + +{ echo "$as_me:$LINENO: checking for grep that handles long lines and -e" >&5 +echo $ECHO_N "checking for grep that handles long lines and -e... $ECHO_C" >&6; } +if test "${ac_cv_path_GREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + # Extract the first word of "grep ggrep" to use in msg output +if test -z "$GREP"; then +set dummy grep ggrep; ac_prog_name=$2 +if test "${ac_cv_path_GREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_path_GREP_found=false +# Loop through the user's path and test for each of PROGNAME-LIST +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in grep ggrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_GREP="$as_dir/$ac_prog$ac_exec_ext" + { test -f "$ac_path_GREP" && $as_executable_p "$ac_path_GREP"; } || continue + # Check for GNU ac_path_GREP and select it if it is found. + # Check for GNU $ac_path_GREP +case `"$ac_path_GREP" --version 2>&1` in +*GNU*) + ac_cv_path_GREP="$ac_path_GREP" ac_path_GREP_found=:;; +*) + ac_count=0 + echo $ECHO_N "0123456789$ECHO_C" >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + echo 'GREP' >> "conftest.nl" + "$ac_path_GREP" -e 'GREP$' -e '-(cannot match)-' < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + ac_count=`expr $ac_count + 1` + if test $ac_count -gt ${ac_path_GREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_GREP="$ac_path_GREP" + ac_path_GREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + + $ac_path_GREP_found && break 3 + done +done + +done +IFS=$as_save_IFS + + +fi + +GREP="$ac_cv_path_GREP" +if test -z "$GREP"; then + { { echo "$as_me:$LINENO: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&5 +echo "$as_me: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&2;} + { (exit 1); exit 1; }; } +fi + +else + ac_cv_path_GREP=$GREP +fi + + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_path_GREP" >&5 +echo "${ECHO_T}$ac_cv_path_GREP" >&6; } + GREP="$ac_cv_path_GREP" + + +{ echo "$as_me:$LINENO: checking for egrep" >&5 +echo $ECHO_N "checking for egrep... $ECHO_C" >&6; } +if test "${ac_cv_path_EGREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if echo a | $GREP -E '(a|b)' >/dev/null 2>&1 + then ac_cv_path_EGREP="$GREP -E" + else + # Extract the first word of "egrep" to use in msg output +if test -z "$EGREP"; then +set dummy egrep; ac_prog_name=$2 +if test "${ac_cv_path_EGREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_path_EGREP_found=false +# Loop through the user's path and test for each of PROGNAME-LIST +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in egrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_EGREP="$as_dir/$ac_prog$ac_exec_ext" + { test -f "$ac_path_EGREP" && $as_executable_p "$ac_path_EGREP"; } || continue + # Check for GNU ac_path_EGREP and select it if it is found. + # Check for GNU $ac_path_EGREP +case `"$ac_path_EGREP" --version 2>&1` in +*GNU*) + ac_cv_path_EGREP="$ac_path_EGREP" ac_path_EGREP_found=:;; +*) + ac_count=0 + echo $ECHO_N "0123456789$ECHO_C" >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + echo 'EGREP' >> "conftest.nl" + "$ac_path_EGREP" 'EGREP$' < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + ac_count=`expr $ac_count + 1` + if test $ac_count -gt ${ac_path_EGREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_EGREP="$ac_path_EGREP" + ac_path_EGREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + + $ac_path_EGREP_found && break 3 + done +done + +done +IFS=$as_save_IFS + + +fi + +EGREP="$ac_cv_path_EGREP" +if test -z "$EGREP"; then + { { echo "$as_me:$LINENO: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&5 +echo "$as_me: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&2;} + { (exit 1); exit 1; }; } +fi + +else + ac_cv_path_EGREP=$EGREP +fi + + + fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_path_EGREP" >&5 +echo "${ECHO_T}$ac_cv_path_EGREP" >&6; } + EGREP="$ac_cv_path_EGREP" + + +{ echo "$as_me:$LINENO: checking execution character set" >&5 +echo $ECHO_N "checking execution character set... $ECHO_C" >&6; } +if test "${ac_cv_c_charset+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#if '\n' == 0x0A && ' ' == 0x20 && '0' == 0x30 \ + && 'A' == 0x41 && 'a' == 0x61 && '!' == 0x21 +ASCII +#endif +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "ASCII" >/dev/null 2>&1; then + ac_cv_c_charset=ASCII +fi +rm -f conftest* + + if test x${ac_cv_c_charset+set} != xset; then + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#if '\n' == 0x15 && ' ' == 0x40 && '0' == 0xF0 \ + && 'A' == 0xC1 && 'a' == 0x81 && '!' == 0x5A +EBCDIC +#endif +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "EBCDIC" >/dev/null 2>&1; then + ac_cv_c_charset=EBCDIC +fi +rm -f conftest* + + fi + if test x${ac_cv_c_charset+set} != xset; then + ac_cv_c_charset=unknown + fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_c_charset" >&5 +echo "${ECHO_T}$ac_cv_c_charset" >&6; } +if test $ac_cv_c_charset = unknown; then + { { echo "$as_me:$LINENO: error: *** Cannot determine host character set." >&5 +echo "$as_me: error: *** Cannot determine host character set." >&2;} + { (exit 1); exit 1; }; } +elif test $ac_cv_c_charset = EBCDIC; then + +cat >>confdefs.h <<\_ACEOF +#define HOST_EBCDIC 1 +_ACEOF + +fi + +# If the native compiler is GCC, we can enable warnings even in stage1. +# That's useful for people building cross-compilers, or just running a +# quick `make'. +warn_cflags= +if test "x$GCC" = "xyes"; then + warn_cflags='$(GCC_WARN_CFLAGS)' +fi + + +{ echo "$as_me:$LINENO: checking whether ${MAKE-make} sets \$(MAKE)" >&5 +echo $ECHO_N "checking whether ${MAKE-make} sets \$(MAKE)... $ECHO_C" >&6; } +set x ${MAKE-make}; ac_make=`echo "$2" | sed 's/+/p/g; s/[^a-zA-Z0-9_]/_/g'` +if { as_var=ac_cv_prog_make_${ac_make}_set; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.make <<\_ACEOF +SHELL = /bin/sh +all: + @echo '@@@%%%=$(MAKE)=@@@%%%' +_ACEOF +# GNU make sometimes prints "make[1]: Entering...", which would confuse us. +case `${MAKE-make} -f conftest.make 2>/dev/null` in + *@@@%%%=?*=@@@%%%*) + eval ac_cv_prog_make_${ac_make}_set=yes;; + *) + eval ac_cv_prog_make_${ac_make}_set=no;; +esac +rm -f conftest.make +fi +if eval test \$ac_cv_prog_make_${ac_make}_set = yes; then + { echo "$as_me:$LINENO: result: yes" >&5 +echo "${ECHO_T}yes" >&6; } + SET_MAKE= +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } + SET_MAKE="MAKE=${MAKE-make}" +fi + + +{ echo "$as_me:$LINENO: checking whether a default assembler was specified" >&5 +echo $ECHO_N "checking whether a default assembler was specified... $ECHO_C" >&6; } +if test x"${DEFAULT_ASSEMBLER+set}" = x"set"; then + if test x"$gas_flag" = x"no"; then + { echo "$as_me:$LINENO: result: yes ($DEFAULT_ASSEMBLER)" >&5 +echo "${ECHO_T}yes ($DEFAULT_ASSEMBLER)" >&6; } + else + { echo "$as_me:$LINENO: result: yes ($DEFAULT_ASSEMBLER - GNU as)" >&5 +echo "${ECHO_T}yes ($DEFAULT_ASSEMBLER - GNU as)" >&6; } + fi +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + +{ echo "$as_me:$LINENO: checking whether a default linker was specified" >&5 +echo $ECHO_N "checking whether a default linker was specified... $ECHO_C" >&6; } +if test x"${DEFAULT_LINKER+set}" = x"set"; then + if test x"$gnu_ld_flag" = x"no"; then + { echo "$as_me:$LINENO: result: yes ($DEFAULT_LINKER)" >&5 +echo "${ECHO_T}yes ($DEFAULT_LINKER)" >&6; } + else + { echo "$as_me:$LINENO: result: yes ($DEFAULT_LINKER - GNU ld)" >&5 +echo "${ECHO_T}yes ($DEFAULT_LINKER - GNU ld)" >&6; } + fi +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + +# Find some useful tools +for ac_prog in gawk mawk nawk awk +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_AWK+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$AWK"; then + ac_cv_prog_AWK="$AWK" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_AWK="$ac_prog" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +AWK=$ac_cv_prog_AWK +if test -n "$AWK"; then + { echo "$as_me:$LINENO: result: $AWK" >&5 +echo "${ECHO_T}$AWK" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + test -n "$AWK" && break +done + +# We need awk to run opts.sh (to create options.c and options.h). +# Bail out if it's missing. +case ${AWK} in + "") { { echo "$as_me:$LINENO: error: can't build without awk, bailing out" >&5 +echo "$as_me: error: can't build without awk, bailing out" >&2;} + { (exit 1); exit 1; }; } ;; +esac + +{ echo "$as_me:$LINENO: checking whether ln works" >&5 +echo $ECHO_N "checking whether ln works... $ECHO_C" >&6; } +if test "${gcc_cv_prog_LN+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + rm -f conftestdata_t +echo >conftestdata_f +if ln conftestdata_f conftestdata_t 2>/dev/null +then + gcc_cv_prog_LN="ln" +else + if ln -s conftestdata_f conftestdata_t 2>/dev/null + then + gcc_cv_prog_LN="ln -s" + else + gcc_cv_prog_LN=cp + fi +fi +rm -f conftestdata_f conftestdata_t + +fi +LN="$gcc_cv_prog_LN" +if test "$gcc_cv_prog_LN" = "ln"; then + { echo "$as_me:$LINENO: result: yes" >&5 +echo "${ECHO_T}yes" >&6; } +else + if test "$gcc_cv_prog_LN" = "ln -s"; then + { echo "$as_me:$LINENO: result: no, using ln -s" >&5 +echo "${ECHO_T}no, using ln -s" >&6; } + else + { echo "$as_me:$LINENO: result: no, and neither does ln -s, so using cp" >&5 +echo "${ECHO_T}no, and neither does ln -s, so using cp" >&6; } + fi +fi + +{ echo "$as_me:$LINENO: checking whether ln -s works" >&5 +echo $ECHO_N "checking whether ln -s works... $ECHO_C" >&6; } +if test "${gcc_cv_prog_LN_S+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + rm -f conftestdata_t +echo >conftestdata_f +if ln -s conftestdata_f conftestdata_t 2>/dev/null +then + gcc_cv_prog_LN_S="ln -s" +else + if ln conftestdata_f conftestdata_t 2>/dev/null + then + gcc_cv_prog_LN_S=ln + else + gcc_cv_prog_LN_S=cp + fi +fi +rm -f conftestdata_f conftestdata_t + +fi +LN_S="$gcc_cv_prog_LN_S" +if test "$gcc_cv_prog_LN_S" = "ln -s"; then + { echo "$as_me:$LINENO: result: yes" >&5 +echo "${ECHO_T}yes" >&6; } +else + if test "$gcc_cv_prog_LN_S" = "ln"; then + { echo "$as_me:$LINENO: result: no, using ln" >&5 +echo "${ECHO_T}no, using ln" >&6; } + else + { echo "$as_me:$LINENO: result: no, and neither does ln, so using cp" >&5 +echo "${ECHO_T}no, and neither does ln, so using cp" >&6; } + fi +fi + +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. +set dummy ${ac_tool_prefix}ranlib; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_RANLIB+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$RANLIB"; then + ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +RANLIB=$ac_cv_prog_RANLIB +if test -n "$RANLIB"; then + { echo "$as_me:$LINENO: result: $RANLIB" >&5 +echo "${ECHO_T}$RANLIB" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_RANLIB"; then + ac_ct_RANLIB=$RANLIB + # Extract the first word of "ranlib", so it can be a program name with args. +set dummy ranlib; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_RANLIB+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_RANLIB"; then + ac_cv_prog_ac_ct_RANLIB="$ac_ct_RANLIB" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_RANLIB="ranlib" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_RANLIB=$ac_cv_prog_ac_ct_RANLIB +if test -n "$ac_ct_RANLIB"; then + { echo "$as_me:$LINENO: result: $ac_ct_RANLIB" >&5 +echo "${ECHO_T}$ac_ct_RANLIB" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + if test "x$ac_ct_RANLIB" = x; then + RANLIB=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + RANLIB=$ac_ct_RANLIB + fi +else + RANLIB="$ac_cv_prog_RANLIB" +fi + +ac_aux_dir= +for ac_dir in "$srcdir" "$srcdir/.." "$srcdir/../.."; do + if test -f "$ac_dir/install-sh"; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/install-sh -c" + break + elif test -f "$ac_dir/install.sh"; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/install.sh -c" + break + elif test -f "$ac_dir/shtool"; then + ac_aux_dir=$ac_dir + ac_install_sh="$ac_aux_dir/shtool install -c" + break + fi +done +if test -z "$ac_aux_dir"; then + { { echo "$as_me:$LINENO: error: cannot find install-sh or install.sh in \"$srcdir\" \"$srcdir/..\" \"$srcdir/../..\"" >&5 +echo "$as_me: error: cannot find install-sh or install.sh in \"$srcdir\" \"$srcdir/..\" \"$srcdir/../..\"" >&2;} + { (exit 1); exit 1; }; } +fi + +# These three variables are undocumented and unsupported, +# and are intended to be withdrawn in a future Autoconf release. +# They can cause serious problems if a builder's source tree is in a directory +# whose full name contains unusual characters. +ac_config_guess="$SHELL $ac_aux_dir/config.guess" # Please don't use this var. +ac_config_sub="$SHELL $ac_aux_dir/config.sub" # Please don't use this var. +ac_configure="$SHELL $ac_aux_dir/configure" # Please don't use this var. + + +# Find a good install program. We prefer a C program (faster), +# so one script is as good as another. But avoid the broken or +# incompatible versions: +# SysV /etc/install, /usr/sbin/install +# SunOS /usr/etc/install +# IRIX /sbin/install +# AIX /bin/install +# AFS /usr/afsws/bin/install, which mishandles nonexistent args +# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" +# ./install, which can be erroneously created by make from ./install.sh. +{ echo "$as_me:$LINENO: checking for a BSD compatible install" >&5 +echo $ECHO_N "checking for a BSD compatible install... $ECHO_C" >&6; } +if test -z "$INSTALL"; then +if test "${ac_cv_path_install+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS="${IFS}:" + for ac_dir in $PATH; do + # Account for people who put trailing slashes in PATH elements. + case "$ac_dir/" in + /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;; + *) + # OSF1 and SCO ODT 3.0 have their own names for install. + for ac_prog in ginstall scoinst install; do + if test -f $ac_dir/$ac_prog; then + if test $ac_prog = install && + grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then + # AIX install. It has an incompatible calling convention. + # OSF/1 installbsd also uses dspmsg, but is usable. + : + else + ac_cv_path_install="$ac_dir/$ac_prog -c" + break 2 + fi + fi + done + ;; + esac + done + IFS="$ac_save_IFS" + +fi + if test "${ac_cv_path_install+set}" = set; then + INSTALL="$ac_cv_path_install" + else + # As a last resort, use the slow shell script. We don't cache a + # path for INSTALL within a source directory, because that will + # break other packages using the cache if that directory is + # removed, or if the path is relative. + INSTALL="$ac_install_sh" + fi +fi +{ echo "$as_me:$LINENO: result: $INSTALL" >&5 +echo "${ECHO_T}$INSTALL" >&6; } + +# Use test -z because SunOS4 sh mishandles braces in ${var-val}. +# It thinks the first close brace ends the variable substitution. +test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}' + +test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' + + +{ echo "$as_me:$LINENO: checking for ANSI C header files" >&5 +echo $ECHO_N "checking for ANSI C header files... $ECHO_C" >&6; } +if test "${ac_cv_header_stdc+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#include +#include + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_header_stdc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_header_stdc=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + +if test $ac_cv_header_stdc = yes; then + # SunOS 4.x string.h does not declare mem*, contrary to ANSI. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "memchr" >/dev/null 2>&1; then + : +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "free" >/dev/null 2>&1; then + : +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. + if test "$cross_compiling" = yes; then + : +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#if ((' ' & 0x0FF) == 0x020) +# define ISLOWER(c) ('a' <= (c) && (c) <= 'z') +# define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c)) +#else +# define ISLOWER(c) \ + (('a' <= (c) && (c) <= 'i') \ + || ('j' <= (c) && (c) <= 'r') \ + || ('s' <= (c) && (c) <= 'z')) +# define TOUPPER(c) (ISLOWER(c) ? ((c) | 0x40) : (c)) +#endif + +#define XOR(e, f) (((e) && !(f)) || (!(e) && (f))) +int +main () +{ + int i; + for (i = 0; i < 256; i++) + if (XOR (islower (i), ISLOWER (i)) + || toupper (i) != TOUPPER (i)) + return 2; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + : +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +ac_cv_header_stdc=no +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi + + +fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_stdc" >&5 +echo "${ECHO_T}$ac_cv_header_stdc" >&6; } +if test $ac_cv_header_stdc = yes; then + +cat >>confdefs.h <<\_ACEOF +#define STDC_HEADERS 1 +_ACEOF + +fi + +{ echo "$as_me:$LINENO: checking whether time.h and sys/time.h may both be included" >&5 +echo $ECHO_N "checking whether time.h and sys/time.h may both be included... $ECHO_C" >&6; } +if test "${ac_cv_header_time+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#include + +int +main () +{ +if ((struct tm *) 0) +return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_header_time=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_header_time=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_time" >&5 +echo "${ECHO_T}$ac_cv_header_time" >&6; } +if test $ac_cv_header_time = yes; then + +cat >>confdefs.h <<\_ACEOF +#define TIME_WITH_SYS_TIME 1 +_ACEOF + +fi + +{ echo "$as_me:$LINENO: checking for working stdbool.h" >&5 +echo $ECHO_N "checking for working stdbool.h... $ECHO_C" >&6; } +if test "${ac_cv_header_stdbool_h+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +int +main () +{ +bool foo = false; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_header_stdbool_h=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_header_stdbool_h=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_stdbool_h" >&5 +echo "${ECHO_T}$ac_cv_header_stdbool_h" >&6; } +if test $ac_cv_header_stdbool_h = yes; then + +cat >>confdefs.h <<\_ACEOF +#define HAVE_STDBOOL_H 1 +_ACEOF + +fi + +{ echo "$as_me:$LINENO: checking whether string.h and strings.h may both be included" >&5 +echo $ECHO_N "checking whether string.h and strings.h may both be included... $ECHO_C" >&6; } +if test "${gcc_cv_header_string+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + gcc_cv_header_string=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + gcc_cv_header_string=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $gcc_cv_header_string" >&5 +echo "${ECHO_T}$gcc_cv_header_string" >&6; } +if test $gcc_cv_header_string = yes; then + +cat >>confdefs.h <<\_ACEOF +#define STRING_WITH_STRINGS 1 +_ACEOF + +fi + +{ echo "$as_me:$LINENO: checking for sys/wait.h that is POSIX.1 compatible" >&5 +echo $ECHO_N "checking for sys/wait.h that is POSIX.1 compatible... $ECHO_C" >&6; } +if test "${ac_cv_header_sys_wait_h+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#ifndef WEXITSTATUS +# define WEXITSTATUS(stat_val) ((unsigned int) (stat_val) >> 8) +#endif +#ifndef WIFEXITED +# define WIFEXITED(stat_val) (((stat_val) & 255) == 0) +#endif + +int +main () +{ + int s; + wait (&s); + s = WIFEXITED (s) ? WEXITSTATUS (s) : 1; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_header_sys_wait_h=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_header_sys_wait_h=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_sys_wait_h" >&5 +echo "${ECHO_T}$ac_cv_header_sys_wait_h" >&6; } +if test $ac_cv_header_sys_wait_h = yes; then + +cat >>confdefs.h <<\_ACEOF +#define HAVE_SYS_WAIT_H 1 +_ACEOF + +fi + +# On IRIX 5.3, sys/types and inttypes.h are conflicting. + + + + + + + + + +for ac_header in sys/types.h sys/stat.h stdlib.h string.h memory.h strings.h \ + inttypes.h stdint.h unistd.h +do +as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` +{ echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + +#include <$ac_header> +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + eval "$as_ac_Header=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_Header=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_Header'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 +_ACEOF + +fi + +done + + + + + + + + + + + + + + + + +for ac_header in limits.h stddef.h string.h strings.h stdlib.h time.h \ + fcntl.h unistd.h sys/file.h sys/time.h \ + sys/param.h sys/stat.h \ + direct.h malloc.h +do +as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + { echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +else + # Is the header compilable? +{ echo "$as_me:$LINENO: checking $ac_header usability" >&5 +echo $ECHO_N "checking $ac_header usability... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +#include <$ac_header> +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_header_compiler=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_compiler=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 +echo "${ECHO_T}$ac_header_compiler" >&6; } + +# Is the header present? +{ echo "$as_me:$LINENO: checking $ac_header presence" >&5 +echo $ECHO_N "checking $ac_header presence... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include <$ac_header> +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + ac_header_preproc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_header_preproc=no +fi + +rm -f conftest.err conftest.$ac_ext +{ echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 +echo "${ECHO_T}$ac_header_preproc" >&6; } + +# So? What about this header? +case $ac_header_compiler:$ac_header_preproc:$ac_c_preproc_warn_flag in + yes:no: ) + { echo "$as_me:$LINENO: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&5 +echo "$as_me: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the compiler's result" >&5 +echo "$as_me: WARNING: $ac_header: proceeding with the compiler's result" >&2;} + ac_header_preproc=yes + ;; + no:yes:* ) + { echo "$as_me:$LINENO: WARNING: $ac_header: present but cannot be compiled" >&5 +echo "$as_me: WARNING: $ac_header: present but cannot be compiled" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: check for missing prerequisite headers?" >&5 +echo "$as_me: WARNING: $ac_header: check for missing prerequisite headers?" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: see the Autoconf documentation" >&5 +echo "$as_me: WARNING: $ac_header: see the Autoconf documentation" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&5 +echo "$as_me: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the preprocessor's result" >&5 +echo "$as_me: WARNING: $ac_header: proceeding with the preprocessor's result" >&2;} + { echo "$as_me:$LINENO: WARNING: $ac_header: in the future, the compiler will take precedence" >&5 +echo "$as_me: WARNING: $ac_header: in the future, the compiler will take precedence" >&2;} + + ;; +esac +{ echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + eval "$as_ac_Header=\$ac_header_preproc" +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } + +fi +if test `eval echo '${'$as_ac_Header'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 +_ACEOF + +fi + +done + + +# Check for thread headers. + +# These tests can't be done till we know if we have limits.h. +{ echo "$as_me:$LINENO: checking for CHAR_BIT" >&5 +echo $ECHO_N "checking for CHAR_BIT... $ECHO_C" >&6; } +if test "${gcc_cv_decl_char_bit+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef HAVE_LIMITS_H +#include +#endif +#ifdef CHAR_BIT +found +#endif +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "found" >/dev/null 2>&1; then + gcc_cv_decl_char_bit=yes +else + gcc_cv_decl_char_bit=no +fi +rm -f conftest* + + +fi +{ echo "$as_me:$LINENO: result: $gcc_cv_decl_char_bit" >&5 +echo "${ECHO_T}$gcc_cv_decl_char_bit" >&6; } +if test $gcc_cv_decl_char_bit = no; then + { echo "$as_me:$LINENO: checking number of bits in a byte" >&5 +echo $ECHO_N "checking number of bits in a byte... $ECHO_C" >&6; } +if test "${gcc_cv_c_nbby+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + i=8 + gcc_cv_c_nbby= + while test $i -lt 65; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ +switch(0) { + case (unsigned char)((unsigned long)1 << $i) == ((unsigned long)1 << $i): + case (unsigned char)((unsigned long)1<<($i-1)) == ((unsigned long)1<<($i-1)): + ; } + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + gcc_cv_c_nbby=$i; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + i=`expr $i + 1` + done + test -z "$gcc_cv_c_nbby" && gcc_cv_c_nbby=failed + +fi +{ echo "$as_me:$LINENO: result: $gcc_cv_c_nbby" >&5 +echo "${ECHO_T}$gcc_cv_c_nbby" >&6; } +if test $gcc_cv_c_nbby = failed; then + { { echo "$as_me:$LINENO: error: cannot determine number of bits in a byte" >&5 +echo "$as_me: error: cannot determine number of bits in a byte" >&2;} + { (exit 1); exit 1; }; } +else + +cat >>confdefs.h <<_ACEOF +#define CHAR_BIT $gcc_cv_c_nbby +_ACEOF + +fi +fi +{ echo "$as_me:$LINENO: checking byte ordering" >&5 +echo $ECHO_N "checking byte ordering... $ECHO_C" >&6; } +if test "${ac_cv_c_compile_endian+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_cv_c_compile_endian=unknown + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + +cat > conftest.$ac_ext < +#endif +/* This structure must have no internal padding. */ + struct { + char prefix[sizeof "\nendian:" - 1]; + short word; + char postfix[2]; + } tester = { + "\nendian:", +#if SIZEOF_SHORT == 4 + ('A' << (CHAR_BIT * 3)) | ('B' << (CHAR_BIT * 2)) | +#endif + ('A' << CHAR_BIT) | 'B', + 'X', '\n' +}; +EOF +if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 + (eval $ac_compile) 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; then + od -c conftest.o | + sed 's/^[0-7]*[ ]*/ / + s/\*/./g + s/ \\n/*/g + s/ [0-9][0-9][0-9]/./g + s/ \\[^ ]/./g' | + tr -d ' + ' | tr -s '*' ' +' | fold | sed '$a\ +' > conftest.dmp + if grep 'endian:AB' conftest.dmp >/dev/null 2>&1; then + ac_cv_c_compile_endian=big-endian + elif grep 'endian:BA' conftest.dmp >/dev/null 2>&1; then + ac_cv_c_compile_endian=little-endian + fi +fi +rm -rf conftest* +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_c_compile_endian" >&5 +echo "${ECHO_T}$ac_cv_c_compile_endian" >&6; } +if test $ac_cv_c_compile_endian = unknown; then + { { echo "$as_me:$LINENO: error: *** unable to determine endianness" >&5 +echo "$as_me: error: *** unable to determine endianness" >&2;} + { (exit 1); exit 1; }; } +elif test $ac_cv_c_compile_endian = big-endian; then + +cat >>confdefs.h <<\_ACEOF +#define HOST_WORDS_BIG_ENDIAN 1 +_ACEOF + +fi + + +# See if we have the mktemp command. +# Extract the first word of "mktemp", so it can be a program name with args. +set dummy mktemp; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_have_mktemp_command+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$have_mktemp_command"; then + ac_cv_prog_have_mktemp_command="$have_mktemp_command" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_have_mktemp_command="yes" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_have_mktemp_command" && ac_cv_prog_have_mktemp_command="no" +fi +fi +have_mktemp_command=$ac_cv_prog_have_mktemp_command +if test -n "$have_mktemp_command"; then + { echo "$as_me:$LINENO: result: $have_mktemp_command" >&5 +echo "${ECHO_T}$have_mktemp_command" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + +# Extract the first word of "strip", so it can be a program name with args. +set dummy strip; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_STRIP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$STRIP"; then + ac_cv_prog_STRIP="$STRIP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_STRIP="strip" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + + test -z "$ac_cv_prog_STRIP" && ac_cv_prog_STRIP=":" +fi +fi +STRIP=$ac_cv_prog_STRIP +if test -n "$STRIP"; then + { echo "$as_me:$LINENO: result: $STRIP" >&5 +echo "${ECHO_T}$STRIP" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + +# See if the stage1 system preprocessor understands the ANSI C +# preprocessor stringification operator. (Used by symcat.h.) +{ echo "$as_me:$LINENO: checking for preprocessor stringizing operator" >&5 +echo $ECHO_N "checking for preprocessor stringizing operator... $ECHO_C" >&6; } +if test "${ac_cv_c_stringize+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#define x(y) #y + +char *s = x(teststring); +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "#teststring" >/dev/null 2>&1; then + ac_cv_c_stringize=no +else + ac_cv_c_stringize=yes +fi +rm -f conftest* + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_c_stringize" >&5 +echo "${ECHO_T}$ac_cv_c_stringize" >&6; } +if test $ac_cv_c_stringize = yes; then + +cat >>confdefs.h <<\_ACEOF +#define HAVE_STRINGIZE 1 +_ACEOF + +fi + + + + + + + + +for ac_func in clock strsignal strchr strrchr lstat +do +as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` +{ echo "$as_me:$LINENO: checking for $ac_func" >&5 +echo $ECHO_N "checking for $ac_func... $ECHO_C" >&6; } +if { as_var=$as_ac_var; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define $ac_func to an innocuous variant, in case declares $ac_func. + For example, HP-UX 11i declares gettimeofday. */ +#define $ac_func innocuous_$ac_func + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char $ac_func (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef $ac_func + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char $ac_func (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_$ac_func || defined __stub___$ac_func +choke me +#endif + +int +main () +{ +return $ac_func (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + eval "$as_ac_var=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_var=no" +fi + +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_var'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_var'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_func" | $as_tr_cpp` 1 +_ACEOF + +fi +done + + +{ echo "$as_me:$LINENO: checking for ssize_t" >&5 +echo $ECHO_N "checking for ssize_t... $ECHO_C" >&6; } +if test "${ac_cv_type_ssize_t+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef ssize_t ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_type_ssize_t=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_ssize_t=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_type_ssize_t" >&5 +echo "${ECHO_T}$ac_cv_type_ssize_t" >&6; } +if test $ac_cv_type_ssize_t = yes; then + : +else + +cat >>confdefs.h <<_ACEOF +#define ssize_t int +_ACEOF + +fi + + + +for ac_func in getpagesize +do +as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` +{ echo "$as_me:$LINENO: checking for $ac_func" >&5 +echo $ECHO_N "checking for $ac_func... $ECHO_C" >&6; } +if { as_var=$as_ac_var; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define $ac_func to an innocuous variant, in case declares $ac_func. + For example, HP-UX 11i declares gettimeofday. */ +#define $ac_func innocuous_$ac_func + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char $ac_func (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef $ac_func + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char $ac_func (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_$ac_func || defined __stub___$ac_func +choke me +#endif + +int +main () +{ +return $ac_func (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + eval "$as_ac_var=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_var=no" +fi + +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_var'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_var'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_func" | $as_tr_cpp` 1 +_ACEOF + +fi +done + +# The test program for the next two tests is the same except for one +# set of ifdefs. +cat >ct-mmap.inc <<'EOF' +#include +#include +#include +#include +#include +#include + +#if !defined (MAP_ANONYMOUS) && defined (MAP_ANON) +# define MAP_ANONYMOUS MAP_ANON +#endif + +/* This mess was copied from the GNU getpagesize.h. */ +#ifndef HAVE_GETPAGESIZE +# ifdef HAVE_UNISTD_H +# include +# endif + +/* Assume that all systems that can run configure have sys/param.h. */ +# ifndef HAVE_SYS_PARAM_H +# define HAVE_SYS_PARAM_H 1 +# endif + +# ifdef _SC_PAGESIZE +# define getpagesize() sysconf(_SC_PAGESIZE) +# else /* no _SC_PAGESIZE */ +# ifdef HAVE_SYS_PARAM_H +# include +# ifdef EXEC_PAGESIZE +# define getpagesize() EXEC_PAGESIZE +# else /* no EXEC_PAGESIZE */ +# ifdef NBPG +# define getpagesize() NBPG * CLSIZE +# ifndef CLSIZE +# define CLSIZE 1 +# endif /* no CLSIZE */ +# else /* no NBPG */ +# ifdef NBPC +# define getpagesize() NBPC +# else /* no NBPC */ +# ifdef PAGESIZE +# define getpagesize() PAGESIZE +# endif /* PAGESIZE */ +# endif /* no NBPC */ +# endif /* no NBPG */ +# endif /* no EXEC_PAGESIZE */ +# else /* no HAVE_SYS_PARAM_H */ +# define getpagesize() 8192 /* punt totally */ +# endif /* no HAVE_SYS_PARAM_H */ +# endif /* no _SC_PAGESIZE */ + +#endif /* no HAVE_GETPAGESIZE */ + +#ifndef MAP_FAILED +# define MAP_FAILED -1 +#endif + +#undef perror_exit +#define perror_exit(str, val) \ + do { perror(str); exit(val); } while (0) + +/* Some versions of cygwin mmap require that munmap is called with the + same parameters as mmap. GCC expects that this is not the case. + Test for various forms of this problem. Warning - icky signal games. */ + +static sigset_t unblock_sigsegv; +static jmp_buf r; +static size_t pg; +static int devzero; + +static char * +anonmap (size) + size_t size; +{ +#ifdef USE_MAP_ANON + return (char *) mmap (0, size, PROT_READ|PROT_WRITE, + MAP_PRIVATE|MAP_ANONYMOUS, -1, 0); +#else + return (char *) mmap (0, size, PROT_READ|PROT_WRITE, + MAP_PRIVATE, devzero, 0); +#endif +} + +static void +sigsegv (unused) + int unused; +{ + sigprocmask (SIG_UNBLOCK, &unblock_sigsegv, 0); + longjmp (r, 1); +} + +/* Basic functionality test. */ +void +test_0 () +{ + char *x = anonmap (pg); + if (x == (char *) MAP_FAILED) + perror_exit("test 0 mmap", 2); + + *(int *)x += 1; + + if (munmap(x, pg) < 0) + perror_exit("test 0 munmap", 3); +} + +/* 1. If we map a 2-page region and unmap its second page, the first page + must remain. */ +static void +test_1 () +{ + char *x = anonmap (pg * 2); + if (x == (char *)MAP_FAILED) + perror_exit ("test 1 mmap", 4); + + signal (SIGSEGV, sigsegv); + if (setjmp (r)) + perror_exit ("test 1 fault", 5); + + x[0] = 1; + x[pg] = 1; + + if (munmap (x + pg, pg) < 0) + perror_exit ("test 1 munmap 1", 6); + x[0] = 2; + + if (setjmp (r) == 0) + { + x[pg] = 1; + perror_exit ("test 1 no fault", 7); + } + if (munmap (x, pg) < 0) + perror_exit ("test 1 munmap 2", 8); +} + +/* 2. If we map a 2-page region and unmap its first page, the second + page must remain. */ +static void +test_2 () +{ + char *x = anonmap (pg * 2); + if (x == (char *)MAP_FAILED) + perror_exit ("test 2 mmap", 9); + + signal (SIGSEGV, sigsegv); + if (setjmp (r)) + perror_exit ("test 2 fault", 10); + + x[0] = 1; + x[pg] = 1; + + if (munmap (x, pg) < 0) + perror_exit ("test 2 munmap 1", 11); + + x[pg] = 2; + + if (setjmp (r) == 0) + { + x[0] = 1; + perror_exit ("test 2 no fault", 12); + } + + if (munmap (x+pg, pg) < 0) + perror_exit ("test 2 munmap 2", 13); +} + +/* 3. If we map two adjacent 1-page regions and unmap them both with + one munmap, both must go away. + + Getting two adjacent 1-page regions with two mmap calls is slightly + tricky. All OS's tested skip over already-allocated blocks; therefore + we have been careful to unmap all allocated regions in previous tests. + HP/UX allocates pages backward in memory. No OS has yet been observed + to be so perverse as to leave unmapped space between consecutive calls + to mmap. */ + +static void +test_3 () +{ + char *x, *y, *z; + + x = anonmap (pg); + if (x == (char *)MAP_FAILED) + perror_exit ("test 3 mmap 1", 14); + y = anonmap (pg); + if (y == (char *)MAP_FAILED) + perror_exit ("test 3 mmap 2", 15); + + if (y != x + pg) + { + if (y == x - pg) + z = y, y = x, x = z; + else + { + fprintf (stderr, "test 3 nonconsecutive pages - %lx, %lx\n", + (unsigned long)x, (unsigned long)y); + exit (16); + } + } + + signal (SIGSEGV, sigsegv); + if (setjmp (r)) + perror_exit ("test 3 fault", 17); + + x[0] = 1; + y[0] = 1; + + if (munmap (x, pg*2) < 0) + perror_exit ("test 3 munmap", 18); + + if (setjmp (r) == 0) + { + x[0] = 1; + perror_exit ("test 3 no fault 1", 19); + } + + signal (SIGSEGV, sigsegv); + if (setjmp (r) == 0) + { + y[0] = 1; + perror_exit ("test 3 no fault 2", 20); + } +} + +int +main () +{ + sigemptyset (&unblock_sigsegv); + sigaddset (&unblock_sigsegv, SIGSEGV); + pg = getpagesize (); +#ifndef USE_MAP_ANON + devzero = open ("/dev/zero", O_RDWR); + if (devzero < 0) + perror_exit ("open /dev/zero", 1); +#endif + + test_0(); + test_1(); + test_2(); + test_3(); + + exit(0); +} +EOF + +{ echo "$as_me:$LINENO: checking for working mmap from /dev/zero" >&5 +echo $ECHO_N "checking for working mmap from /dev/zero... $ECHO_C" >&6; } +if test "${ac_cv_func_mmap_dev_zero+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then + # If this is not cygwin, and /dev/zero is a character device, it's probably + # safe to assume it works. + case "$host_os" in + cygwin* | win32 | pe | mingw* ) ac_cv_func_mmap_dev_zero=buggy ;; + * ) if test -c /dev/zero + then ac_cv_func_mmap_dev_zero=yes + else ac_cv_func_mmap_dev_zero=no + fi ;; + esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include "ct-mmap.inc" +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_func_mmap_dev_zero=yes +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test $? -lt 4 + then ac_cv_func_mmap_dev_zero=no + else ac_cv_func_mmap_dev_zero=buggy + fi +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi + + + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_func_mmap_dev_zero" >&5 +echo "${ECHO_T}$ac_cv_func_mmap_dev_zero" >&6; } +if test $ac_cv_func_mmap_dev_zero = yes; then + +cat >>confdefs.h <<\_ACEOF +#define HAVE_MMAP_DEV_ZERO 1 +_ACEOF + +fi + +{ echo "$as_me:$LINENO: checking for working mmap with MAP_ANON(YMOUS)" >&5 +echo $ECHO_N "checking for working mmap with MAP_ANON(YMOUS)... $ECHO_C" >&6; } +if test "${ac_cv_func_mmap_anon+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then + # Unlike /dev/zero, it is not safe to assume MAP_ANON(YMOUS) works + # just because it's there. Some SCO Un*xen define it but don't implement it. + ac_cv_func_mmap_anon=no +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#define USE_MAP_ANON +#include "ct-mmap.inc" +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_func_mmap_anon=yes +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test $? -lt 4 + then ac_cv_func_mmap_anon=no + else ac_cv_func_mmap_anon=buggy + fi +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi + + + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_func_mmap_anon" >&5 +echo "${ECHO_T}$ac_cv_func_mmap_anon" >&6; } +if test $ac_cv_func_mmap_anon = yes; then + +cat >>confdefs.h <<\_ACEOF +#define HAVE_MMAP_ANON 1 +_ACEOF + +fi +rm -f ct-mmap.inc + +{ echo "$as_me:$LINENO: checking for working mmap of a file" >&5 +echo $ECHO_N "checking for working mmap of a file... $ECHO_C" >&6; } +if test "${ac_cv_func_mmap_file+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + # Create a file one thousand bytes long. +for i in 1 2 3 4 5 6 7 8 9 0 +do for j in 1 2 3 4 5 6 7 8 9 0 +do echo $i $j xxxxx +done +done > conftestdata$$ + +if test "$cross_compiling" = yes; then + ac_cv_func_mmap_file=no +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Test by Zack Weinberg. Modified from MMAP_ANYWHERE test by + Richard Henderson and Alexandre Oliva. + Check whether read-only mmap of a plain file works. */ +#include +#include +#include +#include + +int main() +{ + char *x; + int fd; + struct stat st; + + fd = open("conftestdata$$", O_RDONLY); + if (fd < 0) + exit(1); + + if (fstat (fd, &st)) + exit(2); + + x = (char*)mmap(0, st.st_size, PROT_READ, MAP_PRIVATE, fd, 0); + if (x == (char *) -1) + exit(3); + + if (x[0] != '1' || x[1] != ' ' || x[2] != '1' || x[3] != ' ') + exit(4); + + if (munmap(x, st.st_size) < 0) + exit(5); + + exit(0); +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_func_mmap_file=yes +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +ac_cv_func_mmap_file=no +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi + + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_func_mmap_file" >&5 +echo "${ECHO_T}$ac_cv_func_mmap_file" >&6; } +if test $ac_cv_func_mmap_file = yes; then + +cat >>confdefs.h <<\_ACEOF +#define HAVE_MMAP_FILE 1 +_ACEOF + +fi + + +# We will need to find libiberty.h and ansidecl.h +saved_CFLAGS="$CFLAGS" +CFLAGS="$CFLAGS -I${srcdir} -I${srcdir}/../include" +for ac_func in getenv abort strsignal errno \ + malloc realloc calloc free clock +do + ac_tr_decl=HAVE_DECL_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'` +{ echo "$as_me:$LINENO: checking whether $ac_func is declared" >&5 +echo $ECHO_N "checking whether $ac_func is declared... $ECHO_C" >&6; } +if { as_var=gcc_cv_have_decl_$ac_func; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#undef $ac_tr_decl +#define $ac_tr_decl 1 + +#include "ansidecl.h" +#include "system.h" + +int +main () +{ +#ifndef $ac_func +char *(*pfn) = (char *(*)) $ac_func ; +#endif + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + eval "gcc_cv_have_decl_$ac_func=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "gcc_cv_have_decl_$ac_func=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +if eval "test \"`echo '$gcc_cv_have_decl_'$ac_func`\" = yes"; then + { echo "$as_me:$LINENO: result: yes" >&5 +echo "${ECHO_T}yes" >&6; } ; cat >>confdefs.h <<_ACEOF +#define $ac_tr_decl 1 +_ACEOF + +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } ; cat >>confdefs.h <<_ACEOF +#define $ac_tr_decl 0 +_ACEOF + +fi + +done +if test x = y ; then + +cat >>confdefs.h <<\_ACEOF +#define HAVE_DECL_GETENV 1 +_ACEOF + +cat >>confdefs.h <<\_ACEOF +#define HAVE_DECL_ABORT 1 +_ACEOF + +cat >>confdefs.h <<\_ACEOF +#define HAVE_DECL_STRSIGNAL 1 +_ACEOF + +cat >>confdefs.h <<\_ACEOF +#define HAVE_DECL_ERRNO 1 +_ACEOF + \ + +cat >>confdefs.h <<\_ACEOF +#define HAVE_DECL_MALLOC 1 +_ACEOF + +cat >>confdefs.h <<\_ACEOF +#define HAVE_DECL_REALLOC 1 +_ACEOF + +cat >>confdefs.h <<\_ACEOF +#define HAVE_DECL_CALLOC 1 +_ACEOF + +cat >>confdefs.h <<\_ACEOF +#define HAVE_DECL_FREE 1 +_ACEOF + +cat >>confdefs.h <<\_ACEOF +#define HAVE_DECL_CLOCK 1 +_ACEOF +fi + + +# Restore CFLAGS from before the gcc_AC_NEED_DECLARATIONS tests. +CFLAGS="$saved_CFLAGS" + +# mkdir takes a single argument on some systems. +{ echo "$as_me:$LINENO: checking if mkdir takes one argument" >&5 +echo $ECHO_N "checking if mkdir takes one argument... $ECHO_C" >&6; } +if test "${gcc_cv_mkdir_takes_one_arg+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +#include +#ifdef HAVE_SYS_STAT_H +# include +#endif +#ifdef HAVE_UNISTD_H +# include +#endif +#ifdef HAVE_DIRECT_H +# include +#endif +int +main () +{ +mkdir ("foo", 0); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + gcc_cv_mkdir_takes_one_arg=no +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + gcc_cv_mkdir_takes_one_arg=yes +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $gcc_cv_mkdir_takes_one_arg" >&5 +echo "${ECHO_T}$gcc_cv_mkdir_takes_one_arg" >&6; } +if test $gcc_cv_mkdir_takes_one_arg = yes ; then + +cat >>confdefs.h <<\_ACEOF +#define MKDIR_TAKES_ONE_ARG 1 +_ACEOF + +fi + + +# File extensions +manext='.1' +objext='.o' + + + +build_xm_file= +build_xm_defines= +build_install_headers_dir=install-headers-tar +build_exeext= +host_xm_file= +host_xm_defines= +host_xmake_file= +host_truncate_target= +host_exeext= + +# Decode the host machine, then the target machine. +# For the host machine, we save the xm_file variable as host_xm_file; +# then we decode the target machine and forget everything else +# that came from the host machine. +#for machine in $build $host $target; do +# . ${srcdir}/config.gcc +#done + +extra_objs="${host_extra_objs} ${extra_objs}" + +# Default the target-machine variables that were not explicitly set. +if test x"$tm_file" = x +then tm_file=$cpu_type/$cpu_type.h; fi + +if test x"$extra_headers" = x +then extra_headers=; fi + +if test x$md_file = x +then md_file=$cpu_type/$cpu_type.md; fi + +if test x$out_file = x +then out_file=$cpu_type/$cpu_type.c; fi + +if test x"$tmake_file" = x +then tmake_file=$cpu_type/t-$cpu_type +fi + +if test x"$dwarf2" = xyes +then tm_file="$tm_file tm-dwarf2.h" +fi + +# Handle cpp installation. +if test x$enable_cpp != xno +then + tmake_file="$tmake_file t-install-cpp" +fi + +# auto-host.h is the file containing items generated by autoconf and is +# the first file included by config.h. +# If host=build, it is correct to have hconfig include auto-host.h +# as well. If host!=build, we are in error and need to do more +# work to find out the build config parameters. +if test x$host = x$build +then + build_auto=auto-host.h +else + # We create a subdir, then run autoconf in the subdir. + # To prevent recursion we set host and build for the new + # invocation of configure to the build for this invocation + # of configure. + tempdir=build.$$ + rm -rf $tempdir + mkdir $tempdir + cd $tempdir + case ${srcdir} in + /* | A-Za-z:\\/* ) realsrcdir=${srcdir};; + *) realsrcdir=../${srcdir};; + esac + CC=${CC_FOR_BUILD} ${realsrcdir}/configure \ + --target=$target --host=$build --build=$build + + # We just finished tests for the build machine, so rename + # the file auto-build.h in the gcc directory. + mv auto-host.h ../auto-build.h + cd .. + rm -rf $tempdir + build_auto=auto-build.h +fi + +tm_file="${tm_file} defaults.h" +host_xm_file="auto-host.h ansidecl.h ${host_xm_file} ${tm_file}" +build_xm_file="${build_auto} ansidecl.h ${build_xm_file} ${tm_file}" +xm_file="ansidecl.h ${xm_file} ${tm_file}" + +# Truncate the target if necessary +if test x$host_truncate_target != x; then + target=`echo $target | sed -e 's/\(..............\).*/\1/'` +fi + +# Get the version trigger filename from the toplevel +if test "${with_gcc_version_trigger+set}" = set; then + gcc_version_trigger=$with_gcc_version_trigger +else + gcc_version_trigger=${srcdir}/version.c +fi +gcc_version_full=`grep version_string ${gcc_version_trigger} | sed -e 's/.*"\([^"]*\)".*/\1/'` +gcc_version=`echo ${gcc_version_full} | sed -e 's/\([^ ]*\) .*/\1/'` + +# Compile in configure arguments. +if test -f configargs.h ; then + # Being re-configured. + gcc_config_arguments=`grep configuration_arguments configargs.h | sed -e 's/.*"\([^"]*\)".*/\1/'` + gcc_config_arguments="$gcc_config_arguments : (reconfigured) $TOPLEVEL_CONFIGURE_ARGUMENTS" +else + gcc_config_arguments="$TOPLEVEL_CONFIGURE_ARGUMENTS" +fi +cat > configargs.h <>confdefs.h <<_ACEOF +#define PACKAGE "$PACKAGE" +_ACEOF + + +cat >>confdefs.h <<_ACEOF +#define VERSION "$VERSION" +_ACEOF + + + + +ALL_LINGUAS="sv" + +# Get an absolute path to the GCC top-level source directory +holddir=`pwd` +cd $srcdir +topdir=`pwd` +cd $holddir + +out_object_file=`basename $out_file .c`.o + +# Figure out what assembler we will be using. +{ echo "$as_me:$LINENO: checking what assembler to use" >&5 +echo $ECHO_N "checking what assembler to use... $ECHO_C" >&6; } +gcc_cv_as= +gcc_cv_gas_major_version= +gcc_cv_gas_minor_version= +gcc_cv_as_gas_srcdir=`echo $srcdir | sed -e 's,/gcc$,,'`/gas +if test -x "$DEFAULT_ASSEMBLER"; then + gcc_cv_as="$DEFAULT_ASSEMBLER" +elif test -x "$AS"; then + gcc_cv_as="$AS" +elif test -x as$host_exeext; then + # Build using assembler in the current directory. + gcc_cv_as=./as$host_exeext +elif test -f $gcc_cv_as_gas_srcdir/configure.in -a -f ../gas/Makefile; then + # Single tree build which includes gas. + for f in $gcc_cv_as_gas_srcdir/configure $gcc_cv_as_gas_srcdir/configure.in $gcc_cv_as_gas_srcdir/Makefile.in + do + gcc_cv_gas_version=`grep '^VERSION=[0-9]*\.[0-9]*' $f` + if test x$gcc_cv_gas_version != x; then + break + fi + done + gcc_cv_gas_major_version=`expr "$gcc_cv_gas_version" : "VERSION=\([0-9]*\)"` + gcc_cv_gas_minor_version=`expr "$gcc_cv_gas_version" : "VERSION=[0-9]*\.\([0-9]*\)"` +fi + +if test "x$gcc_cv_as" = x -a x$host = x$target; then + # Native build. + # Search the same directories that the installed compiler will + # search. Else we may find the wrong assembler and lose. If we + # do not find a suitable assembler binary, then try the user's + # path. + # + # Also note we have to check MD_EXEC_PREFIX before checking the + # user's path. Unfortunately, there is no good way to get at the + # value of MD_EXEC_PREFIX here. So we do a brute force search + # through all the known MD_EXEC_PREFIX values. Ugh. This needs + # to be fixed as part of the make/configure rewrite too. + + if test "x$exec_prefix" = xNONE; then + if test "x$prefix" = xNONE; then + test_prefix=/usr/local + else + test_prefix=$prefix + fi + else + test_prefix=$exec_prefix + fi + + # If the loop below does not find an assembler, then use whatever + # one we can find in the users's path. + # user's path. + gcc_cv_as=as$host_exeext + + test_dirs="$test_prefix/lib/gcc-lib/$target/$gcc_version \ + $test_prefix/lib/gcc-lib/$target \ + /usr/lib/gcc/$target/$gcc_version \ + /usr/lib/gcc/$target \ + $test_prefix/$target/bin/$target/$gcc_version \ + $test_prefix/$target/bin \ + /usr/libexec \ + /usr/ccs/gcc \ + /usr/ccs/bin \ + /udk/usr/ccs/bin \ + /bsd43/usr/lib/cmplrs/cc \ + /usr/cross64/usr/bin \ + /usr/lib/cmplrs/cc \ + /sysv/usr/lib/cmplrs/cc \ + /svr4/usr/lib/cmplrs/cc \ + /usr/bin" + + for dir in $test_dirs; do + if test -f $dir/as$host_exeext; then + gcc_cv_as=$dir/as$host_exeext + break; + fi + done +fi +if test x$gcc_cv_gas_major_version != x -a x$gcc_cv_gas_minor_version != x; then + { echo "$as_me:$LINENO: result: \"newly built gas\"" >&5 +echo "${ECHO_T}\"newly built gas\"" >&6; } +else + { echo "$as_me:$LINENO: result: $gcc_cv_as" >&5 +echo "${ECHO_T}$gcc_cv_as" >&6; } +fi + +# Figure out what nm we will be using. +{ echo "$as_me:$LINENO: checking what nm to use" >&5 +echo $ECHO_N "checking what nm to use... $ECHO_C" >&6; } +if test -x nm$host_exeext; then + gcc_cv_nm=./nm$host_exeext +elif test x$host = x$target; then + # Native build. + gcc_cv_nm=nm$host_exeext +fi +{ echo "$as_me:$LINENO: result: $gcc_cv_nm" >&5 +echo "${ECHO_T}$gcc_cv_nm" >&6; } + + +{ echo "$as_me:$LINENO: checking whether to enable maintainer-specific portions of Makefiles" >&5 +echo $ECHO_N "checking whether to enable maintainer-specific portions of Makefiles... $ECHO_C" >&6; } + # Check whether --enable-maintainer-mode was given. +if test "${enable_maintainer_mode+set}" = set; then + enableval=$enable_maintainer_mode; maintainer_mode=$enableval +else + maintainer_mode=no +fi + + +{ echo "$as_me:$LINENO: result: $maintainer_mode" >&5 +echo "${ECHO_T}$maintainer_mode" >&6; } + +if test "$maintainer_mode" = "yes"; then + MAINT='' +else + MAINT='#' +fi + +# These (without "all_") are set in each config-lang.in. +# `language' must be a single word so is spelled singularly. +all_stagestuff= +all_outputs='Makefile' +# List of language makefile fragments. + +# Add the language fragments. +# Languages are added via two mechanisms. Some information must be +# recorded in makefile variables, these are defined in config-lang.in. +# We accumulate them and plug them into the main Makefile. +# The other mechanism is a set of hooks for each of the main targets +# like `clean', `install', etc. + +language_fragments="Make-lang" + +# Define variables host_canonical and build_canonical +# because some Cygnus local changes in the Makefile depend on them. +build_canonical=${build} +host_canonical=${host} +target_subdir= +if test "${host}" != "${target}" ; then + target_subdir=${target_alias}/ +fi + + + + +# Nothing to do for FLOAT_H, float_format already handled. +objdir=`pwd` + + +# Substitute configuration variables + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +#AC_SUBST_FILE(target_overrides) +#AC_SUBST_FILE(host_overrides) +#AC_SUBST(cross_defines) +#AC_SUBST_FILE(cross_overrides) +#AC_SUBST_FILE(build_overrides) + +# Create the Makefile +# and configure language subdirectories +ac_config_files="$ac_config_files $all_outputs" + +ac_config_commands="$ac_config_commands default" + +cat >confcache <<\_ACEOF +# This file is a shell script that caches the results of configure +# tests run on this system so they can be shared between configure +# scripts and configure runs, see configure's option --config-cache. +# It is not useful on other systems. If it contains results you don't +# want to keep, you may remove or edit it. +# +# config.status only pays attention to the cache file if you give it +# the --recheck option to rerun configure. +# +# `ac_cv_env_foo' variables (set or unset) will be overridden when +# loading this file, other *unset* `ac_cv_foo' will be assigned the +# following values. + +_ACEOF + +# The following way of writing the cache mishandles newlines in values, +# but we know of no workaround that is simple, portable, and efficient. +# So, we kill variables containing newlines. +# Ultrix sh set writes to stderr and can't be redirected directly, +# and sets the high bit in the cache file unless we assign to the vars. +( + for ac_var in `(set) 2>&1 | sed -n 's/^\([a-zA-Z_][a-zA-Z0-9_]*\)=.*/\1/p'`; do + eval ac_val=\$$ac_var + case $ac_val in #( + *${as_nl}*) + case $ac_var in #( + *_cv_*) { echo "$as_me:$LINENO: WARNING: Cache variable $ac_var contains a newline." >&5 +echo "$as_me: WARNING: Cache variable $ac_var contains a newline." >&2;} ;; + esac + case $ac_var in #( + _ | IFS | as_nl) ;; #( + *) $as_unset $ac_var ;; + esac ;; + esac + done + + (set) 2>&1 | + case $as_nl`(ac_space=' '; set) 2>&1` in #( + *${as_nl}ac_space=\ *) + # `set' does not quote correctly, so add quotes (double-quote + # substitution turns \\\\ into \\, and sed turns \\ into \). + sed -n \ + "s/'/'\\\\''/g; + s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='\\2'/p" + ;; #( + *) + # `set' quotes correctly as required by POSIX, so do not add quotes. + sed -n "/^[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*=/p" + ;; + esac | + sort +) | + sed ' + /^ac_cv_env_/b end + t clear + :clear + s/^\([^=]*\)=\(.*[{}].*\)$/test "${\1+set}" = set || &/ + t end + s/^\([^=]*\)=\(.*\)$/\1=${\1=\2}/ + :end' >>confcache +if diff "$cache_file" confcache >/dev/null 2>&1; then :; else + if test -w "$cache_file"; then + test "x$cache_file" != "x/dev/null" && + { echo "$as_me:$LINENO: updating cache $cache_file" >&5 +echo "$as_me: updating cache $cache_file" >&6;} + cat confcache >$cache_file + else + { echo "$as_me:$LINENO: not updating unwritable cache $cache_file" >&5 +echo "$as_me: not updating unwritable cache $cache_file" >&6;} + fi +fi +rm -f confcache + +test "x$prefix" = xNONE && prefix=$ac_default_prefix +# Let make expand exec_prefix. +test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + +DEFS=-DHAVE_CONFIG_H + +ac_libobjs= +ac_ltlibobjs= +for ac_i in : $LIBOBJS; do test "x$ac_i" = x: && continue + # 1. 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Invocation command line was + + CONFIG_FILES = $CONFIG_FILES + CONFIG_HEADERS = $CONFIG_HEADERS + CONFIG_LINKS = $CONFIG_LINKS + CONFIG_COMMANDS = $CONFIG_COMMANDS + $ $0 $@ + +on `(hostname || uname -n) 2>/dev/null | sed 1q` +" + +_ACEOF + +cat >>$CONFIG_STATUS <<_ACEOF +# Files that config.status was made for. +config_files="$ac_config_files" +config_headers="$ac_config_headers" +config_commands="$ac_config_commands" + +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF +ac_cs_usage="\ +\`$as_me' instantiates files from templates according to the +current configuration. + +Usage: $0 [OPTIONS] [FILE]... + + -h, --help print this help, then exit + -V, --version print version number, then exit + -q, --quiet do not print progress messages + -d, --debug don't remove temporary files + --recheck update $as_me by reconfiguring in the same conditions + --file=FILE[:TEMPLATE] + instantiate the configuration file FILE + --header=FILE[:TEMPLATE] + instantiate the configuration header FILE + +Configuration files: +$config_files + +Configuration headers: +$config_headers + +Configuration commands: +$config_commands + +Report bugs to ." + +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF +ac_cs_version="\\ +config.status +configured by $0, generated by GNU Autoconf 2.60, + with options \\"`echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" + +Copyright (C) 2006 Free Software Foundation, Inc. +This config.status script is free software; the Free Software Foundation +gives unlimited permission to copy, distribute and modify it." + +ac_pwd='$ac_pwd' +srcdir='$srcdir' +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF +# If no file are specified by the user, then we need to provide default +# value. By we need to know if files were specified by the user. +ac_need_defaults=: +while test $# != 0 +do + case $1 in + --*=*) + ac_option=`expr "X$1" : 'X\([^=]*\)='` + ac_optarg=`expr "X$1" : 'X[^=]*=\(.*\)'` + ac_shift=: + ;; + *) + ac_option=$1 + ac_optarg=$2 + ac_shift=shift + ;; + esac + + case $ac_option in + # Handling of the options. + -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r) + ac_cs_recheck=: ;; + --version | --versio | --versi | --vers | --ver | --ve | --v | -V ) + echo "$ac_cs_version"; exit ;; + --debug | --debu | --deb | --de | --d | -d ) + debug=: ;; + --file | --fil | --fi | --f ) + $ac_shift + CONFIG_FILES="$CONFIG_FILES $ac_optarg" + ac_need_defaults=false;; + --header | --heade | --head | --hea ) + $ac_shift + CONFIG_HEADERS="$CONFIG_HEADERS $ac_optarg" + ac_need_defaults=false;; + --he | --h) + # Conflict between --help and --header + { echo "$as_me: error: ambiguous option: $1 +Try \`$0 --help' for more information." >&2 + { (exit 1); exit 1; }; };; + --help | --hel | -h ) + echo "$ac_cs_usage"; exit ;; + -q | -quiet | --quiet | --quie | --qui | --qu | --q \ + | -silent | --silent | --silen | --sile | --sil | --si | --s) + ac_cs_silent=: ;; + + # This is an error. + -*) { echo "$as_me: error: unrecognized option: $1 +Try \`$0 --help' for more information." >&2 + { (exit 1); exit 1; }; } ;; + + *) ac_config_targets="$ac_config_targets $1" + ac_need_defaults=false ;; + + esac + shift +done + +ac_configure_extra_args= + +if $ac_cs_silent; then + exec 6>/dev/null + ac_configure_extra_args="$ac_configure_extra_args --silent" +fi + +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF +if \$ac_cs_recheck; then + echo "running CONFIG_SHELL=$SHELL $SHELL $0 "$ac_configure_args \$ac_configure_extra_args " --no-create --no-recursion" >&6 + CONFIG_SHELL=$SHELL + export CONFIG_SHELL + exec $SHELL "$0"$ac_configure_args \$ac_configure_extra_args --no-create --no-recursion +fi + +_ACEOF +cat >>$CONFIG_STATUS <<\_ACEOF +exec 5>>config.log +{ + echo + sed 'h;s/./-/g;s/^.../## /;s/...$/ ##/;p;x;p;x' <<_ASBOX +## Running $as_me. ## +_ASBOX + echo "$ac_log" +} >&5 + +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF +# +# INIT-COMMANDS +# + +host='${host}' +build='${build}' +target='${target}' +target_alias='${target_alias}' +srcdir='${srcdir}' +symbolic_link='${symbolic_link}' +program_transform_set='${program_transform_set}' +program_transform_name='${program_transform_name}' +dep_host_xmake_file='${dep_host_xmake_file}' +host_xmake_file='${host_xmake_file}' +dep_tmake_file='${dep_tmake_file}' +tmake_file='${tmake_file}' +thread_file='${thread_file}' +gcc_config_arguments='${gcc_config_arguments}' +gcc_version='${gcc_version}' +gcc_version_full='${gcc_version_full}' +gcc_version_trigger='${gcc_version_trigger}' +local_prefix='${local_prefix}' +build_install_headers_dir='${build_install_headers_dir}' +build_exeext='${build_exeext}' +host_exeext='${host_exeext}' +out_file='${out_file}' +gdb_needs_out_file_path='${gdb_needs_out_file_path}' +SET_MAKE='${SET_MAKE}' +target_list='${target_list}' +target_overrides='${target_overrides}' +host_overrides='${host_overrides}' +cross_defines='${cross_defines}' +cross_overrides='${cross_overrides}' +build_overrides='${build_overrides}' +cpp_install_dir='${cpp_install_dir}' + + +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF + +# Handling of arguments. +for ac_config_target in $ac_config_targets +do + case $ac_config_target in + "auto-host.h") CONFIG_HEADERS="$CONFIG_HEADERS auto-host.h:config.in" ;; + "$all_outputs") CONFIG_FILES="$CONFIG_FILES $all_outputs" ;; + "default") CONFIG_COMMANDS="$CONFIG_COMMANDS default" ;; + + *) { { echo "$as_me:$LINENO: error: invalid argument: $ac_config_target" >&5 +echo "$as_me: error: invalid argument: $ac_config_target" >&2;} + { (exit 1); exit 1; }; };; + esac +done + + +# If the user did not use the arguments to specify the items to instantiate, +# then the envvar interface is used. Set only those that are not. +# We use the long form for the default assignment because of an extremely +# bizarre bug on SunOS 4.1.3. +if $ac_need_defaults; then + test "${CONFIG_FILES+set}" = set || CONFIG_FILES=$config_files + test "${CONFIG_HEADERS+set}" = set || CONFIG_HEADERS=$config_headers + test "${CONFIG_COMMANDS+set}" = set || CONFIG_COMMANDS=$config_commands +fi + +# Have a temporary directory for convenience. Make it in the build tree +# simply because there is no reason against having it here, and in addition, +# creating and moving files from /tmp can sometimes cause problems. +# Hook for its removal unless debugging. +# Note that there is a small window in which the directory will not be cleaned: +# after its creation but before its name has been assigned to `$tmp'. +$debug || +{ + tmp= + trap 'exit_status=$? + { test -z "$tmp" || test ! -d "$tmp" || rm -fr "$tmp"; } && exit $exit_status +' 0 + trap '{ (exit 1); exit 1; }' 1 2 13 15 +} +# Create a (secure) tmp directory for tmp files. + +{ + tmp=`(umask 077 && mktemp -d "./confXXXXXX") 2>/dev/null` && + test -n "$tmp" && test -d "$tmp" +} || +{ + tmp=./conf$$-$RANDOM + (umask 077 && mkdir "$tmp") +} || +{ + echo "$me: cannot create a temporary directory in ." >&2 + { (exit 1); exit 1; } +} + +# +# Set up the sed scripts for CONFIG_FILES section. +# + +# No need to generate the scripts if there are no CONFIG_FILES. +# This happens for instance when ./config.status config.h +if test -n "$CONFIG_FILES"; then + +_ACEOF + + + +ac_delim='%!_!# ' +for ac_last_try in false false false false false :; do + cat >conf$$subs.sed <<_ACEOF +SHELL!$SHELL$ac_delim +PATH_SEPARATOR!$PATH_SEPARATOR$ac_delim +PACKAGE_NAME!$PACKAGE_NAME$ac_delim +PACKAGE_TARNAME!$PACKAGE_TARNAME$ac_delim +PACKAGE_VERSION!$PACKAGE_VERSION$ac_delim +PACKAGE_STRING!$PACKAGE_STRING$ac_delim +PACKAGE_BUGREPORT!$PACKAGE_BUGREPORT$ac_delim +exec_prefix!$exec_prefix$ac_delim +prefix!$prefix$ac_delim +program_transform_name!$program_transform_name$ac_delim +bindir!$bindir$ac_delim +sbindir!$sbindir$ac_delim +libexecdir!$libexecdir$ac_delim +datarootdir!$datarootdir$ac_delim +datadir!$datadir$ac_delim +sysconfdir!$sysconfdir$ac_delim +sharedstatedir!$sharedstatedir$ac_delim +localstatedir!$localstatedir$ac_delim +includedir!$includedir$ac_delim +oldincludedir!$oldincludedir$ac_delim +docdir!$docdir$ac_delim +infodir!$infodir$ac_delim +htmldir!$htmldir$ac_delim +dvidir!$dvidir$ac_delim +pdfdir!$pdfdir$ac_delim +psdir!$psdir$ac_delim +libdir!$libdir$ac_delim +localedir!$localedir$ac_delim +mandir!$mandir$ac_delim +DEFS!$DEFS$ac_delim +ECHO_C!$ECHO_C$ac_delim +ECHO_N!$ECHO_N$ac_delim +ECHO_T!$ECHO_T$ac_delim +LIBS!$LIBS$ac_delim +build_alias!$build_alias$ac_delim +host_alias!$host_alias$ac_delim +target_alias!$target_alias$ac_delim +CC!$CC$ac_delim +CFLAGS!$CFLAGS$ac_delim +LDFLAGS!$LDFLAGS$ac_delim +CPPFLAGS!$CPPFLAGS$ac_delim +ac_ct_CC!$ac_ct_CC$ac_delim +EXEEXT!$EXEEXT$ac_delim +OBJEXT!$OBJEXT$ac_delim +NO_MINUS_C_MINUS_O!$NO_MINUS_C_MINUS_O$ac_delim +OUTPUT_OPTION!$OUTPUT_OPTION$ac_delim +CPP!$CPP$ac_delim +GREP!$GREP$ac_delim +EGREP!$EGREP$ac_delim +warn_cflags!$warn_cflags$ac_delim +SET_MAKE!$SET_MAKE$ac_delim +AWK!$AWK$ac_delim +LN!$LN$ac_delim +LN_S!$LN_S$ac_delim +RANLIB!$RANLIB$ac_delim +INSTALL!$INSTALL$ac_delim +INSTALL_PROGRAM!$INSTALL_PROGRAM$ac_delim +INSTALL_DATA!$INSTALL_DATA$ac_delim +have_mktemp_command!$have_mktemp_command$ac_delim +STRIP!$STRIP$ac_delim +manext!$manext$ac_delim +objext!$objext$ac_delim +PACKAGE!$PACKAGE$ac_delim +VERSION!$VERSION$ac_delim +MAINT!$MAINT$ac_delim +build_canonical!$build_canonical$ac_delim +host_canonical!$host_canonical$ac_delim +target_subdir!$target_subdir$ac_delim +objdir!$objdir$ac_delim +all_stagestuff!$all_stagestuff$ac_delim +build_exeext!$build_exeext$ac_delim +build_install_headers_dir!$build_install_headers_dir$ac_delim +build_xm_file_list!$build_xm_file_list$ac_delim +build_xm_file!$build_xm_file$ac_delim +build_xm_defines!$build_xm_defines$ac_delim +check_languages!$check_languages$ac_delim +dep_host_xmake_file!$dep_host_xmake_file$ac_delim +dep_tmake_file!$dep_tmake_file$ac_delim +extra_c_flags!$extra_c_flags$ac_delim +extra_headers_list!$extra_headers_list$ac_delim +extra_objs!$extra_objs$ac_delim +extra_parts!$extra_parts$ac_delim +extra_passes!$extra_passes$ac_delim +extra_programs!$extra_programs$ac_delim +gcc_config_arguments!$gcc_config_arguments$ac_delim +gcc_version!$gcc_version$ac_delim +gcc_version_full!$gcc_version_full$ac_delim +gcc_version_trigger!$gcc_version_trigger$ac_delim +host_exeext!$host_exeext$ac_delim +host_extra_gcc_objs!$host_extra_gcc_objs$ac_delim +install!$install$ac_delim +lang_tree_files!$lang_tree_files$ac_delim +local_prefix!$local_prefix$ac_delim +md_file!$md_file$ac_delim +out_file!$out_file$ac_delim +out_object_file!$out_object_file$ac_delim +symbolic_link!$symbolic_link$ac_delim +_ACEOF + + if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 97; then + break + elif $ac_last_try; then + { { echo "$as_me:$LINENO: error: could not make $CONFIG_STATUS" >&5 +echo "$as_me: error: could not make $CONFIG_STATUS" >&2;} + { (exit 1); exit 1; }; } + else + ac_delim="$ac_delim!$ac_delim _$ac_delim!! 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Please make sure it is defined." >&5 +echo "$as_me: WARNING: $ac_file contains a reference to the variable \`datarootdir' +which seems to be undefined. Please make sure it is defined." >&2;} + + rm -f "$tmp/stdin" + case $ac_file in + -) cat "$tmp/out"; rm -f "$tmp/out";; + *) rm -f "$ac_file"; mv "$tmp/out" $ac_file;; + esac + ;; + :H) + # + # CONFIG_HEADER + # +_ACEOF + +# Transform confdefs.h into a sed script `conftest.defines', that +# substitutes the proper values into config.h.in to produce config.h. +rm -f conftest.defines conftest.tail +# First, append a space to every undef/define line, to ease matching. +echo 's/$/ /' >conftest.defines +# Then, protect against being on the right side of a sed subst, or in +# an unquoted here document, in config.status. If some macros were +# called several times there might be several #defines for the same +# symbol, which is useless. But do not sort them, since the last +# AC_DEFINE must be honored. +ac_word_re=[_$as_cr_Letters][_$as_cr_alnum]* +# These sed commands are passed to sed as "A NAME B PARAMS C VALUE D", where +# NAME is the cpp macro being defined, VALUE is the value it is being given. +# PARAMS is the parameter list in the macro definition--in most cases, it's +# just an empty string. +ac_dA='s,^\\([ #]*\\)[^ ]*\\([ ]*' +ac_dB='\\)[ (].*,\\1define\\2' +ac_dC=' ' +ac_dD=' ,' + +uniq confdefs.h | + sed -n ' + t rset + :rset + s/^[ ]*#[ ]*define[ ][ ]*// + t ok + d + :ok + s/[\\&,]/\\&/g + s/^\('"$ac_word_re"'\)\(([^()]*)\)[ ]*\(.*\)/ '"$ac_dA"'\1'"$ac_dB"'\2'"${ac_dC}"'\3'"$ac_dD"'/p + s/^\('"$ac_word_re"'\)[ ]*\(.*\)/'"$ac_dA"'\1'"$ac_dB$ac_dC"'\2'"$ac_dD"'/p + ' >>conftest.defines + +# Remove the space that was appended to ease matching. +# Then replace #undef with comments. This is necessary, for +# example, in the case of _POSIX_SOURCE, which is predefined and required +# on some systems where configure will not decide to define it. +# (The regexp can be short, since the line contains either #define or #undef.) +echo 's/ $// +s,^[ #]*u.*,/* & */,' >>conftest.defines + +# Break up conftest.defines: +ac_max_sed_lines=50 + +# First sed command is: sed -f defines.sed $ac_file_inputs >"$tmp/out1" +# Second one is: sed -f defines.sed "$tmp/out1" >"$tmp/out2" +# Third one will be: sed -f defines.sed "$tmp/out2" >"$tmp/out1" +# et cetera. +ac_in='$ac_file_inputs' +ac_out='"$tmp/out1"' +ac_nxt='"$tmp/out2"' + +while : +do + # Write a here document: + cat >>$CONFIG_STATUS <<_ACEOF + # First, check the format of the line: + cat >"\$tmp/defines.sed" <<\\CEOF +/^[ ]*#[ ]*undef[ ][ ]*$ac_word_re[ ]*\$/b def +/^[ ]*#[ ]*define[ ][ ]*$ac_word_re[( ]/b def +b +:def +_ACEOF + sed ${ac_max_sed_lines}q conftest.defines >>$CONFIG_STATUS + echo 'CEOF + sed -f "$tmp/defines.sed"' "$ac_in >$ac_out" >>$CONFIG_STATUS + ac_in=$ac_out; ac_out=$ac_nxt; ac_nxt=$ac_in + sed 1,${ac_max_sed_lines}d conftest.defines >conftest.tail + grep . conftest.tail >/dev/null || break + rm -f conftest.defines + mv conftest.tail conftest.defines +done +rm -f conftest.defines conftest.tail + +echo "ac_result=$ac_in" >>$CONFIG_STATUS +cat >>$CONFIG_STATUS <<\_ACEOF + if test x"$ac_file" != x-; then + echo "/* $configure_input */" >"$tmp/config.h" + cat "$ac_result" >>"$tmp/config.h" + if diff $ac_file "$tmp/config.h" >/dev/null 2>&1; then + { echo "$as_me:$LINENO: $ac_file is unchanged" >&5 +echo "$as_me: $ac_file is unchanged" >&6;} + else + rm -f $ac_file + mv "$tmp/config.h" $ac_file + fi + else + echo "/* $configure_input */" + cat "$ac_result" + fi + rm -f "$tmp/out12" + ;; + + :C) { echo "$as_me:$LINENO: executing $ac_file commands" >&5 +echo "$as_me: executing $ac_file commands" >&6;} + ;; + esac + + + case $ac_file$ac_mode in + "default":C) +case x$CONFIG_HEADERS in +xauto-host.h:config.in) +echo > cstamp-h ;; +esac + +# Avoid having to add intl to our include paths. +if test -f intl/libintl.h; then + echo creating libintl.h + echo '#include "intl/libintl.h"' >libintl.h +fi + ;; + + esac +done # for ac_tag + + +{ (exit 0); exit 0; } +_ACEOF +chmod +x $CONFIG_STATUS +ac_clean_files=$ac_clean_files_save + + +# configure is writing to config.log, and then calls config.status. +# config.status does its own redirection, appending to config.log. +# Unfortunately, on DOS this fails, as config.log is still kept open +# by configure, so config.status won't be able to write to it; its +# output is simply discarded. So we exec the FD to /dev/null, +# effectively closing config.log, so it can be properly (re)opened and +# appended to by config.status. When coming back to configure, we +# need to make the FD available again. +if test "$no_create" != yes; then + ac_cs_success=: + ac_config_status_args= + test "$silent" = yes && + ac_config_status_args="$ac_config_status_args --quiet" + exec 5>/dev/null + $SHELL $CONFIG_STATUS $ac_config_status_args || ac_cs_success=false + exec 5>>config.log + # Use ||, not &&, to avoid exiting from the if with $? = 1, which + # would make configure fail if this is the last instruction. + $ac_cs_success || { (exit 1); exit 1; } +fi + diff --git a/support/cpp/configure.in b/support/cpp/configure.in new file mode 100644 index 0000000..4532c6b --- /dev/null +++ b/support/cpp/configure.in @@ -0,0 +1,592 @@ +# configure.in for GCC +# Process this file with autoconf to generate a configuration script. + +# Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. + +#This file is part of GCC. + +#GCC is free software; you can redistribute it and/or modify it under +#the terms of the GNU General Public License as published by the Free +#Software Foundation; either version 2, or (at your option) any later +#version. + +#GCC is distributed in the hope that it will be useful, but WITHOUT +#ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +#FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +#for more details. + +#You should have received a copy of the GNU General Public License +#along with GCC; see the file COPYING. If not, write to the Free +#Software Foundation, 59 Temple Place - Suite 330, Boston, MA +#02111-1307, USA. + +# Initialization and defaults +AC_PREREQ(2.60) +AC_INIT(sdcpp.c) +AC_CONFIG_HEADER(auto-host.h:config.in) + +remove=rm +hard_link=ln +symbolic_link='ln -s' +copy=cp + +# Check for additional parameters + +# With GNU ld +AC_ARG_WITH(gnu-ld, +[ --with-gnu-ld arrange to work with GNU ld.], +gnu_ld_flag="$with_gnu_ld", +gnu_ld_flag=no) + +# With pre-defined ld +AC_ARG_WITH(ld, +[ --with-ld arrange to use the specified ld (full pathname)], +DEFAULT_LINKER="$with_ld") +if test x"${DEFAULT_LINKER+set}" = x"set"; then + if test ! -x "$DEFAULT_LINKER"; then + AC_MSG_WARN([cannot execute: $DEFAULT_LINKER: check --with-ld or env. var. DEFAULT_LINKER]) + elif $DEFAULT_LINKER -v < /dev/null 2>&1 | grep GNU > /dev/null; then + gnu_ld_flag=yes + fi + AC_DEFINE_UNQUOTED(DEFAULT_LINKER,"$DEFAULT_LINKER", + [Define to enable the use of a default linker.]) +fi + +# With GNU as +AC_ARG_WITH(gnu-as, +[ --with-gnu-as arrange to work with GNU as], +gas_flag="$with_gnu_as", +gas_flag=no) + +AC_ARG_WITH(as, +[ --with-as arrange to use the specified as (full pathname)], +DEFAULT_ASSEMBLER="$with_as") +if test x"${DEFAULT_ASSEMBLER+set}" = x"set"; then + if test ! -x "$DEFAULT_ASSEMBLER"; then + AC_MSG_WARN([cannot execute: $DEFAULT_ASSEMBLER: check --with-as or env. var. DEFAULT_ASSEMBLER]) + elif $DEFAULT_ASSEMBLER -v < /dev/null 2>&1 | grep GNU > /dev/null; then + gas_flag=yes + fi + AC_DEFINE_UNQUOTED(DEFAULT_ASSEMBLER,"$DEFAULT_ASSEMBLER", + [Define to enable the use of a default assembler.]) +fi + +# With stabs +AC_ARG_WITH(stabs, +[ --with-stabs arrange to use stabs instead of host debug format], +stabs="$with_stabs", +stabs=no) + +# With ELF +AC_ARG_WITH(elf, +[ --with-elf arrange to use ELF instead of host debug format], +elf="$with_elf", +elf=no) + +# Specify the local prefix +local_prefix= +AC_ARG_WITH(local-prefix, +[ --with-local-prefix=DIR specifies directory to put local include], +[case "${withval}" in +yes) AC_MSG_ERROR(bad value ${withval} given for local include directory prefix) ;; +no) ;; +*) local_prefix=$with_local_prefix ;; +esac]) + +# Default local prefix if it is empty +if test x$local_prefix = x; then + local_prefix=/usr/local +fi + +AC_ARG_PROGRAM + +# Enable Multibyte Characters for C/C++ +AC_ARG_ENABLE(c-mbchar, +[ --enable-c-mbchar enable multibyte characters for C and C++], +if test x$enable_c_mbchar != xno; then + AC_DEFINE(MULTIBYTE_CHARS, 1, + [Define if you want the C and C++ compilers to support multibyte + character sets for source code.]) +fi) + +# Find the native compiler +AC_PROG_CC +AC_PROG_CC_C_O +# autoconf is lame and doesn't give us any substitution variable for this. +if eval "test \"`echo '$ac_cv_prog_cc_'${ac_cc}_c_o`\" = no"; then + NO_MINUS_C_MINUS_O=yes +else + OUTPUT_OPTION='-o $@' +fi +AC_SUBST(NO_MINUS_C_MINUS_O) +AC_SUBST(OUTPUT_OPTION) + +AC_PROG_CPP +AC_C_INLINE + +gcc_AC_C__BOOL + +# sizeof(char) is 1 by definition. +gcc_AC_COMPILE_CHECK_SIZEOF(short) +gcc_AC_COMPILE_CHECK_SIZEOF(int) +gcc_AC_COMPILE_CHECK_SIZEOF(long) + +gcc_AC_C_CHARSET + +# If the native compiler is GCC, we can enable warnings even in stage1. +# That's useful for people building cross-compilers, or just running a +# quick `make'. +warn_cflags= +if test "x$GCC" = "xyes"; then + warn_cflags='$(GCC_WARN_CFLAGS)' +fi +AC_SUBST(warn_cflags) + +AC_PROG_MAKE_SET + +AC_MSG_CHECKING([whether a default assembler was specified]) +if test x"${DEFAULT_ASSEMBLER+set}" = x"set"; then + if test x"$gas_flag" = x"no"; then + AC_MSG_RESULT([yes ($DEFAULT_ASSEMBLER)]) + else + AC_MSG_RESULT([yes ($DEFAULT_ASSEMBLER - GNU as)]) + fi +else + AC_MSG_RESULT(no) +fi + +AC_MSG_CHECKING([whether a default linker was specified]) +if test x"${DEFAULT_LINKER+set}" = x"set"; then + if test x"$gnu_ld_flag" = x"no"; then + AC_MSG_RESULT([yes ($DEFAULT_LINKER)]) + else + AC_MSG_RESULT([yes ($DEFAULT_LINKER - GNU ld)]) + fi +else + AC_MSG_RESULT(no) +fi + +# Find some useful tools +AC_PROG_AWK +# We need awk to run opts.sh (to create options.c and options.h). +# Bail out if it's missing. +case ${AWK} in + "") AC_MSG_ERROR([can't build without awk, bailing out]) ;; +esac + +gcc_AC_PROG_LN +gcc_AC_PROG_LN_S +AC_PROG_RANLIB +gcc_AC_PROG_INSTALL + +AC_HEADER_STDC +AC_HEADER_TIME +gcc_AC_HEADER_STDBOOL +gcc_AC_HEADER_STRING +AC_HEADER_SYS_WAIT +AC_CHECK_HEADERS(limits.h stddef.h string.h strings.h stdlib.h time.h \ + fcntl.h unistd.h sys/file.h sys/time.h \ + sys/param.h sys/stat.h \ + direct.h malloc.h) + +# Check for thread headers. + +# These tests can't be done till we know if we have limits.h. +gcc_AC_C_CHAR_BIT +gcc_AC_C_COMPILE_ENDIAN + +# See if we have the mktemp command. +AC_CHECK_PROG(have_mktemp_command, mktemp, yes, no) + +AC_CHECK_PROG(STRIP, strip, strip, :) + +# See if the stage1 system preprocessor understands the ANSI C +# preprocessor stringification operator. (Used by symcat.h.) +AC_C_STRINGIZE + +dnl Disabled until we have a complete test for buggy enum bitfields. +dnl gcc_AC_C_ENUM_BF_UNSIGNED + +AC_CHECK_FUNCS(clock strsignal strchr strrchr lstat) + +AC_CHECK_TYPE(ssize_t, int) + +AC_FUNC_MMAP_ANYWHERE +AC_FUNC_MMAP_FILE + +# We will need to find libiberty.h and ansidecl.h +saved_CFLAGS="$CFLAGS" +CFLAGS="$CFLAGS -I${srcdir} -I${srcdir}/../include" +gcc_AC_CHECK_DECLS(getenv abort strsignal errno \ + malloc realloc calloc free clock, , ,[ +#include "ansidecl.h" +#include "system.h"]) + +# Restore CFLAGS from before the gcc_AC_NEED_DECLARATIONS tests. +CFLAGS="$saved_CFLAGS" + +# mkdir takes a single argument on some systems. +gcc_AC_FUNC_MKDIR_TAKES_ONE_ARG + +# File extensions +manext='.1' +objext='.o' +AC_SUBST(manext) +AC_SUBST(objext) + +build_xm_file= +build_xm_defines= +build_install_headers_dir=install-headers-tar +build_exeext= +host_xm_file= +host_xm_defines= +host_xmake_file= +host_truncate_target= +host_exeext= + +# Decode the host machine, then the target machine. +# For the host machine, we save the xm_file variable as host_xm_file; +# then we decode the target machine and forget everything else +# that came from the host machine. +#for machine in $build $host $target; do +# . ${srcdir}/config.gcc +#done + +extra_objs="${host_extra_objs} ${extra_objs}" + +# Default the target-machine variables that were not explicitly set. +if test x"$tm_file" = x +then tm_file=$cpu_type/$cpu_type.h; fi + +if test x"$extra_headers" = x +then extra_headers=; fi + +if test x$md_file = x +then md_file=$cpu_type/$cpu_type.md; fi + +if test x$out_file = x +then out_file=$cpu_type/$cpu_type.c; fi + +if test x"$tmake_file" = x +then tmake_file=$cpu_type/t-$cpu_type +fi + +if test x"$dwarf2" = xyes +then tm_file="$tm_file tm-dwarf2.h" +fi + +# Handle cpp installation. +if test x$enable_cpp != xno +then + tmake_file="$tmake_file t-install-cpp" +fi + +# auto-host.h is the file containing items generated by autoconf and is +# the first file included by config.h. +# If host=build, it is correct to have hconfig include auto-host.h +# as well. If host!=build, we are in error and need to do more +# work to find out the build config parameters. +if test x$host = x$build +then + build_auto=auto-host.h +else + # We create a subdir, then run autoconf in the subdir. + # To prevent recursion we set host and build for the new + # invocation of configure to the build for this invocation + # of configure. + tempdir=build.$$ + rm -rf $tempdir + mkdir $tempdir + cd $tempdir + case ${srcdir} in + /* | [A-Za-z]:[\\/]* ) realsrcdir=${srcdir};; + *) realsrcdir=../${srcdir};; + esac + CC=${CC_FOR_BUILD} ${realsrcdir}/configure \ + --target=$target --host=$build --build=$build + + # We just finished tests for the build machine, so rename + # the file auto-build.h in the gcc directory. + mv auto-host.h ../auto-build.h + cd .. + rm -rf $tempdir + build_auto=auto-build.h +fi + +tm_file="${tm_file} defaults.h" +host_xm_file="auto-host.h ansidecl.h ${host_xm_file} ${tm_file}" +build_xm_file="${build_auto} ansidecl.h ${build_xm_file} ${tm_file}" +xm_file="ansidecl.h ${xm_file} ${tm_file}" + +# Truncate the target if necessary +if test x$host_truncate_target != x; then + target=`echo $target | sed -e 's/\(..............\).*/\1/'` +fi + +# Get the version trigger filename from the toplevel +if test "${with_gcc_version_trigger+set}" = set; then + gcc_version_trigger=$with_gcc_version_trigger +else + gcc_version_trigger=${srcdir}/version.c +fi +changequote(,)dnl +gcc_version_full=`grep version_string ${gcc_version_trigger} | sed -e 's/.*"\([^"]*\)".*/\1/'` +gcc_version=`echo ${gcc_version_full} | sed -e 's/\([^ ]*\) .*/\1/'` + +changequote([,])dnl + +# Internationalization +PACKAGE=sdcc +VERSION="$gcc_version" +AC_DEFINE_UNQUOTED(PACKAGE, "$PACKAGE", + [Define to the name of the distribution.]) +AC_DEFINE_UNQUOTED(VERSION, "$VERSION", + [Define to the version of the distribution.]) +AC_SUBST(PACKAGE) +AC_SUBST(VERSION) + +ALL_LINGUAS="sv" + +# Get an absolute path to the GCC top-level source directory +holddir=`pwd` +cd $srcdir +topdir=`pwd` +cd $holddir + +out_object_file=`basename $out_file .c`.o + +# Figure out what assembler we will be using. +AC_MSG_CHECKING(what assembler to use) +gcc_cv_as= +gcc_cv_gas_major_version= +gcc_cv_gas_minor_version= +gcc_cv_as_gas_srcdir=`echo $srcdir | sed -e 's,/gcc$,,'`/gas +if test -x "$DEFAULT_ASSEMBLER"; then + gcc_cv_as="$DEFAULT_ASSEMBLER" +elif test -x "$AS"; then + gcc_cv_as="$AS" +elif test -x as$host_exeext; then + # Build using assembler in the current directory. + gcc_cv_as=./as$host_exeext +elif test -f $gcc_cv_as_gas_srcdir/configure.in -a -f ../gas/Makefile; then + # Single tree build which includes gas. + for f in $gcc_cv_as_gas_srcdir/configure $gcc_cv_as_gas_srcdir/configure.in $gcc_cv_as_gas_srcdir/Makefile.in + do +changequote(,)dnl + gcc_cv_gas_version=`grep '^VERSION=[0-9]*\.[0-9]*' $f` +changequote([,])dnl + if test x$gcc_cv_gas_version != x; then + break + fi + done +changequote(,)dnl + gcc_cv_gas_major_version=`expr "$gcc_cv_gas_version" : "VERSION=\([0-9]*\)"` + gcc_cv_gas_minor_version=`expr "$gcc_cv_gas_version" : "VERSION=[0-9]*\.\([0-9]*\)"` +changequote([,])dnl +fi + +if test "x$gcc_cv_as" = x -a x$host = x$target; then + # Native build. + # Search the same directories that the installed compiler will + # search. Else we may find the wrong assembler and lose. If we + # do not find a suitable assembler binary, then try the user's + # path. + # + # Also note we have to check MD_EXEC_PREFIX before checking the + # user's path. Unfortunately, there is no good way to get at the + # value of MD_EXEC_PREFIX here. So we do a brute force search + # through all the known MD_EXEC_PREFIX values. Ugh. This needs + # to be fixed as part of the make/configure rewrite too. + + if test "x$exec_prefix" = xNONE; then + if test "x$prefix" = xNONE; then + test_prefix=/usr/local + else + test_prefix=$prefix + fi + else + test_prefix=$exec_prefix + fi + + # If the loop below does not find an assembler, then use whatever + # one we can find in the users's path. + # user's path. + gcc_cv_as=as$host_exeext + + test_dirs="$test_prefix/lib/gcc-lib/$target/$gcc_version \ + $test_prefix/lib/gcc-lib/$target \ + /usr/lib/gcc/$target/$gcc_version \ + /usr/lib/gcc/$target \ + $test_prefix/$target/bin/$target/$gcc_version \ + $test_prefix/$target/bin \ + /usr/libexec \ + /usr/ccs/gcc \ + /usr/ccs/bin \ + /udk/usr/ccs/bin \ + /bsd43/usr/lib/cmplrs/cc \ + /usr/cross64/usr/bin \ + /usr/lib/cmplrs/cc \ + /sysv/usr/lib/cmplrs/cc \ + /svr4/usr/lib/cmplrs/cc \ + /usr/bin" + + for dir in $test_dirs; do + if test -f $dir/as$host_exeext; then + gcc_cv_as=$dir/as$host_exeext + break; + fi + done +fi +if test x$gcc_cv_gas_major_version != x -a x$gcc_cv_gas_minor_version != x; then + AC_MSG_RESULT("newly built gas") +else + AC_MSG_RESULT($gcc_cv_as) +fi + +# Figure out what nm we will be using. +AC_MSG_CHECKING(what nm to use) +if test -x nm$host_exeext; then + gcc_cv_nm=./nm$host_exeext +elif test x$host = x$target; then + # Native build. + gcc_cv_nm=nm$host_exeext +fi +AC_MSG_RESULT($gcc_cv_nm) + +dnl Very limited version of automake's enable-maintainer-mode + +AC_MSG_CHECKING([whether to enable maintainer-specific portions of Makefiles]) + dnl maintainer-mode is disabled by default + AC_ARG_ENABLE(maintainer-mode, +[ --enable-maintainer-mode + enable make rules and dependencies not useful + (and sometimes confusing) to the casual installer], + maintainer_mode=$enableval, + maintainer_mode=no) + +AC_MSG_RESULT($maintainer_mode) + +if test "$maintainer_mode" = "yes"; then + MAINT='' +else + MAINT='#' +fi +AC_SUBST(MAINT)dnl + +# These (without "all_") are set in each config-lang.in. +# `language' must be a single word so is spelled singularly. +all_stagestuff= +all_outputs='Makefile' +# List of language makefile fragments. + +# Add the language fragments. +# Languages are added via two mechanisms. Some information must be +# recorded in makefile variables, these are defined in config-lang.in. +# We accumulate them and plug them into the main Makefile. +# The other mechanism is a set of hooks for each of the main targets +# like `clean', `install', etc. + +language_fragments="Make-lang" + +# Define variables host_canonical and build_canonical +# because some Cygnus local changes in the Makefile depend on them. +build_canonical=${build} +host_canonical=${host} +target_subdir= +if test "${host}" != "${target}" ; then + target_subdir=${target_alias}/ +fi +AC_SUBST(build_canonical) +AC_SUBST(host_canonical) +AC_SUBST(target_subdir) + +# Nothing to do for FLOAT_H, float_format already handled. +objdir=`pwd` +AC_SUBST(objdir) + +# Substitute configuration variables +AC_SUBST(all_stagestuff) +AC_SUBST(build_exeext) +AC_SUBST(build_install_headers_dir) +AC_SUBST(build_xm_file_list) +AC_SUBST(build_xm_file) +AC_SUBST(build_xm_defines) +AC_SUBST(check_languages) +AC_SUBST(dep_host_xmake_file) +AC_SUBST(dep_tmake_file) +AC_SUBST(extra_c_flags) +AC_SUBST(extra_headers_list) +AC_SUBST(extra_objs) +AC_SUBST(extra_parts) +AC_SUBST(extra_passes) +AC_SUBST(extra_programs) +AC_SUBST(gcc_config_arguments) +AC_SUBST(gcc_version) +AC_SUBST(gcc_version_full) +AC_SUBST(gcc_version_trigger) +AC_SUBST(host_exeext) +AC_SUBST(host_extra_gcc_objs) +AC_SUBST(install) +AC_SUBST(lang_tree_files) +AC_SUBST(local_prefix) +AC_SUBST(md_file) +AC_SUBST(out_file) +AC_SUBST(out_object_file) +AC_SUBST(symbolic_link) +AC_SUBST(thread_file) +AC_SUBST(c_target_objs) + +#AC_SUBST_FILE(target_overrides) +#AC_SUBST_FILE(host_overrides) +#AC_SUBST(cross_defines) +#AC_SUBST_FILE(cross_overrides) +#AC_SUBST_FILE(build_overrides) + +# Create the Makefile +# and configure language subdirectories +AC_OUTPUT($all_outputs, +[ +case x$CONFIG_HEADERS in +xauto-host.h:config.in) +echo > cstamp-h ;; +esac + +# Avoid having to add intl to our include paths. +if test -f intl/libintl.h; then + echo creating libintl.h + echo '#include "intl/libintl.h"' >libintl.h +fi +], +[ +host='${host}' +build='${build}' +target='${target}' +target_alias='${target_alias}' +srcdir='${srcdir}' +symbolic_link='${symbolic_link}' +program_transform_set='${program_transform_set}' +program_transform_name='${program_transform_name}' +dep_host_xmake_file='${dep_host_xmake_file}' +host_xmake_file='${host_xmake_file}' +dep_tmake_file='${dep_tmake_file}' +tmake_file='${tmake_file}' +thread_file='${thread_file}' +gcc_config_arguments='${gcc_config_arguments}' +gcc_version='${gcc_version}' +gcc_version_full='${gcc_version_full}' +gcc_version_trigger='${gcc_version_trigger}' +local_prefix='${local_prefix}' +build_install_headers_dir='${build_install_headers_dir}' +build_exeext='${build_exeext}' +host_exeext='${host_exeext}' +out_file='${out_file}' +gdb_needs_out_file_path='${gdb_needs_out_file_path}' +SET_MAKE='${SET_MAKE}' +target_list='${target_list}' +target_overrides='${target_overrides}' +host_overrides='${host_overrides}' +cross_defines='${cross_defines}' +cross_overrides='${cross_overrides}' +build_overrides='${build_overrides}' +cpp_install_dir='${cpp_install_dir}' +]) diff --git a/support/cpp/cppdefault.c b/support/cpp/cppdefault.c new file mode 100644 index 0000000..283742b --- /dev/null +++ b/support/cpp/cppdefault.c @@ -0,0 +1,96 @@ +/* CPP Library. + Copyright (C) 1986, 1987, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, + 1999, 2000, 2003, 2004, 2006 Free Software Foundation, Inc. + Contributed by Per Bothner, 1994-95. + Based on CCCP program by Paul Rubin, June 1986 + Adapted to ANSI C, Richard Stallman, Jan 1987 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ + +#include "config.h" +#include "system.h" +#include "cppdefault.h" + +#ifndef STANDARD_INCLUDE_DIR +#define STANDARD_INCLUDE_DIR "/usr/include" +#endif + +#ifndef STANDARD_INCLUDE_COMPONENT +#define STANDARD_INCLUDE_COMPONENT 0 +#endif + +#if defined (CROSS_COMPILE) && !defined (TARGET_SYSTEM_ROOT) +# undef LOCAL_INCLUDE_DIR +# undef SYSTEM_INCLUDE_DIR +# undef STANDARD_INCLUDE_DIR +#else +# undef CROSS_INCLUDE_DIR +#endif + +const struct default_include cpp_include_defaults[] +#ifdef INCLUDE_DEFAULTS += INCLUDE_DEFAULTS; +#else += { +#ifdef GPLUSPLUS_INCLUDE_DIR + /* Pick up GNU C++ generic include files. */ + { GPLUSPLUS_INCLUDE_DIR, "G++", 1, 1, 0, 0 }, +#endif +#ifdef GPLUSPLUS_TOOL_INCLUDE_DIR + /* Pick up GNU C++ target-dependent include files. */ + { GPLUSPLUS_TOOL_INCLUDE_DIR, "G++", 1, 1, 0, 1 }, +#endif +#ifdef GPLUSPLUS_BACKWARD_INCLUDE_DIR + /* Pick up GNU C++ backward and deprecated include files. */ + { GPLUSPLUS_BACKWARD_INCLUDE_DIR, "G++", 1, 1, 0, 0 }, +#endif +#ifdef LOCAL_INCLUDE_DIR + /* /usr/local/include comes before the fixincluded header files. */ + { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 0 }, +#endif +#ifdef PREFIX_INCLUDE_DIR + { PREFIX_INCLUDE_DIR, 0, 0, 1, 0, 0 }, +#endif +#ifdef GCC_INCLUDE_DIR + /* This is the dir for fixincludes and for gcc's private headers. */ + { GCC_INCLUDE_DIR, "GCC", 0, 0, 0, 0 }, +#endif +#ifdef CROSS_INCLUDE_DIR + /* One place the target system's headers might be. */ + { CROSS_INCLUDE_DIR, "GCC", 0, 0, 0, 0 }, +#endif +#ifdef TOOL_INCLUDE_DIR + /* Another place the target system's headers might be. */ + { TOOL_INCLUDE_DIR, "BINUTILS", 0, 1, 0, 0 }, +#endif +#ifdef SYSTEM_INCLUDE_DIR + /* Some systems have an extra dir of include files. */ + { SYSTEM_INCLUDE_DIR, 0, 0, 0, 1, 0 }, +#endif +#ifdef STANDARD_INCLUDE_DIR + /* /usr/include comes dead last. */ + { STANDARD_INCLUDE_DIR, STANDARD_INCLUDE_COMPONENT, 0, 0, 1, 0 }, +#endif + { 0, 0, 0, 0, 0, 0 } + }; +#endif /* no INCLUDE_DEFAULTS */ + +#ifdef GCC_INCLUDE_DIR +const char cpp_GCC_INCLUDE_DIR[] = GCC_INCLUDE_DIR; +const size_t cpp_GCC_INCLUDE_DIR_len = sizeof GCC_INCLUDE_DIR - 8; +#else +const char cpp_GCC_INCLUDE_DIR[] = ""; +const size_t cpp_GCC_INCLUDE_DIR_len = 0; +#endif diff --git a/support/cpp/cppdefault.h b/support/cpp/cppdefault.h new file mode 100644 index 0000000..a3a2416 --- /dev/null +++ b/support/cpp/cppdefault.h @@ -0,0 +1,55 @@ +/* CPP Library. + Copyright (C) 1986, 1987, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, + 1999, 2000, 2003, 2004, 2006 Free Software Foundation, Inc. + Contributed by Per Bothner, 1994-95. + Based on CCCP program by Paul Rubin, June 1986 + Adapted to ANSI C, Richard Stallman, Jan 1987 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ + +#ifndef GCC_CPPDEFAULT_H +#define GCC_CPPDEFAULT_H + +/* This is the default list of directories to search for include files. + It may be overridden by the various -I and -ixxx options. + + #include "file" looks in the same directory as the current file, + then this list. + #include just looks in this list. + + All these directories are treated as `system' include directories + (they are not subject to pedantic warnings in some cases). */ + +struct default_include +{ + const char *const fname; /* The name of the directory. */ + const char *const component; /* The component containing the directory + (see update_path in prefix.c) */ + const char cplusplus; /* Only look here if we're compiling C++. */ + const char cxx_aware; /* Includes in this directory don't need to + be wrapped in extern "C" when compiling + C++. */ + const char add_sysroot; /* FNAME should be prefixed by + cpp_SYSROOT. */ + const char multilib; /* FNAME should have the multilib path + specified with -imultilib + appended. */ +}; + +extern const struct default_include cpp_include_defaults[]; +extern const char cpp_GCC_INCLUDE_DIR[]; +extern const size_t cpp_GCC_INCLUDE_DIR_len; + +#endif /* ! GCC_CPPDEFAULT_H */ diff --git a/support/cpp/except.h b/support/cpp/except.h new file mode 100644 index 0000000..1f96477 --- /dev/null +++ b/support/cpp/except.h @@ -0,0 +1,182 @@ +/* Exception Handling interface routines. + Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 + Free Software Foundation, Inc. + Contributed by Mike Stump . + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA +02110-1301, USA. */ + + +struct function; + +/* Per-function EH data. Used only in except.c, but GC and others + manipulate pointers to the opaque type. */ +struct eh_status; + +/* Internal structure describing a region. */ +struct eh_region; + +/* Test: is exception handling turned on? */ +extern int doing_eh (int); + +/* Note that the current EH region (if any) may contain a throw, or a + call to a function which itself may contain a throw. */ +extern void note_eh_region_may_contain_throw (struct eh_region *); +extern void note_current_region_may_contain_throw (void); + +/* Invokes CALLBACK for every exception handler label. Only used by old + loop hackery; should not be used by new code. */ +extern void for_each_eh_label (void (*) (rtx)); + +/* Invokes CALLBACK for every exception region in the current function. */ +extern void for_each_eh_region (void (*) (struct eh_region *)); + +/* Determine if the given INSN can throw an exception. */ +extern bool can_throw_internal_1 (int, bool); +extern bool can_throw_internal (rtx); +extern bool can_throw_external_1 (int, bool); +extern bool can_throw_external (rtx); + +/* Set TREE_NOTHROW and cfun->all_throwers_are_sibcalls. */ +extern unsigned int set_nothrow_function_flags (void); + +/* After initial rtl generation, call back to finish generating + exception support code. */ +extern void finish_eh_generation (void); + +extern void init_eh (void); +extern void init_eh_for_function (void); + +extern rtx reachable_handlers (rtx); +extern void maybe_remove_eh_handler (rtx); + +extern void convert_from_eh_region_ranges (void); +extern unsigned int convert_to_eh_region_ranges (void); +extern void find_exception_handler_labels (void); +extern bool current_function_has_exception_handlers (void); +extern void output_function_exception_table (void); + +extern void expand_builtin_unwind_init (void); +extern rtx expand_builtin_eh_return_data_regno (tree); +extern rtx expand_builtin_extract_return_addr (tree); +extern void expand_builtin_init_dwarf_reg_sizes (tree); +extern rtx expand_builtin_frob_return_addr (tree); +extern rtx expand_builtin_dwarf_sp_column (void); +extern void expand_builtin_eh_return (tree, tree); +extern void expand_eh_return (void); +extern rtx expand_builtin_extend_pointer (tree); +extern rtx get_exception_pointer (struct function *); +extern rtx get_exception_filter (struct function *); +typedef tree (*duplicate_eh_regions_map) (tree, void *); +extern int duplicate_eh_regions (struct function *, duplicate_eh_regions_map, + void *, int, int); + +extern void sjlj_emit_function_exit_after (rtx); +extern void default_init_unwind_resume_libfunc (void); + +extern struct eh_region *gen_eh_region_cleanup (struct eh_region *, + struct eh_region *); +extern struct eh_region *gen_eh_region_try (struct eh_region *); +extern struct eh_region *gen_eh_region_catch (struct eh_region *, tree); +extern struct eh_region *gen_eh_region_allowed (struct eh_region *, tree); +extern struct eh_region *gen_eh_region_must_not_throw (struct eh_region *); +extern int get_eh_region_number (struct eh_region *); +extern bool get_eh_region_may_contain_throw (struct eh_region *); +extern tree get_eh_region_tree_label (struct eh_region *); +extern void set_eh_region_tree_label (struct eh_region *, tree); + +extern void foreach_reachable_handler (int, bool, + void (*) (struct eh_region *, void *), + void *); + +extern void collect_eh_region_array (void); +extern void expand_resx_expr (tree); +extern void verify_eh_tree (struct function *); +extern void dump_eh_tree (FILE *, struct function *); +extern bool eh_region_outer_p (struct function *, int, int); +extern int eh_region_outermost (struct function *, int, int); + +/* tree-eh.c */ +extern void add_stmt_to_eh_region_fn (struct function *, tree, int); +extern bool remove_stmt_from_eh_region_fn (struct function *, tree); +extern int lookup_stmt_eh_region_fn (struct function *, tree); +extern int lookup_stmt_eh_region (tree); +extern bool verify_eh_edges (tree); + +/* If non-NULL, this is a function that returns an expression to be + executed if an unhandled exception is propagated out of a cleanup + region. For example, in C++, an exception thrown by a destructor + during stack unwinding is required to result in a call to + `std::terminate', so the C++ version of this function returns a + CALL_EXPR for `std::terminate'. */ +extern tree (*lang_protect_cleanup_actions) (void); + +/* Return true if type A catches type B. */ +extern int (*lang_eh_type_covers) (tree a, tree b); + +/* Map a type to a runtime object to match type. */ +extern tree (*lang_eh_runtime_type) (tree); + + +/* Just because the user configured --with-sjlj-exceptions=no doesn't + mean that we can use call frame exceptions. Detect that the target + has appropriate support. */ + +#ifndef MUST_USE_SJLJ_EXCEPTIONS +# if !(defined (EH_RETURN_DATA_REGNO) \ + && (defined (TARGET_UNWIND_INFO) \ + || (DWARF2_UNWIND_INFO \ + && (defined (EH_RETURN_HANDLER_RTX) \ + || defined (HAVE_eh_return))))) +# define MUST_USE_SJLJ_EXCEPTIONS 1 +# else +# define MUST_USE_SJLJ_EXCEPTIONS 0 +# endif +#endif + +#ifdef CONFIG_SJLJ_EXCEPTIONS +# if CONFIG_SJLJ_EXCEPTIONS == 1 +# define USING_SJLJ_EXCEPTIONS 1 +# endif +# if CONFIG_SJLJ_EXCEPTIONS == 0 +# define USING_SJLJ_EXCEPTIONS 0 +# ifndef EH_RETURN_DATA_REGNO + #error "EH_RETURN_DATA_REGNO required" +# endif +# if !defined(EH_RETURN_HANDLER_RTX) && !defined(HAVE_eh_return) + #error "EH_RETURN_HANDLER_RTX or eh_return required" +# endif +# if !defined(DWARF2_UNWIND_INFO) && !defined(TARGET_UNWIND_INFO) + #error "{DWARF2,TARGET}_UNWIND_INFO required" +# endif +# endif +#else +# define USING_SJLJ_EXCEPTIONS MUST_USE_SJLJ_EXCEPTIONS +#endif + +struct throw_stmt_node GTY(()) +{ + tree stmt; + int region_nr; +}; + +extern struct htab *get_eh_throw_stmt_table (struct function *); +extern void set_eh_throw_stmt_table (struct function *, struct htab *); + +#ifdef ENABLE_CHECKING +extern void verify_eh_throw_table_statements (void); +#endif diff --git a/support/cpp/hwint.h b/support/cpp/hwint.h new file mode 100644 index 0000000..9b28a3a --- /dev/null +++ b/support/cpp/hwint.h @@ -0,0 +1,150 @@ +/* HOST_WIDE_INT definitions for the GNU compiler. + Copyright (C) 1998, 2002, 2004 Free Software Foundation, Inc. + + This file is part of GCC. + + Provide definitions for macros which depend on HOST_BITS_PER_INT + and HOST_BITS_PER_LONG. */ + +#ifndef GCC_HWINT_H +#define GCC_HWINT_H + +/* This describes the machine the compiler is hosted on. */ +#define HOST_BITS_PER_CHAR CHAR_BIT +#define HOST_BITS_PER_SHORT (CHAR_BIT * SIZEOF_SHORT) +#define HOST_BITS_PER_INT (CHAR_BIT * SIZEOF_INT) +#define HOST_BITS_PER_LONG (CHAR_BIT * SIZEOF_LONG) + +/* The string that should be inserted into a printf style format to + indicate a "long long" operand. */ +#ifndef HOST_LONG_LONG_FORMAT +#define HOST_LONG_LONG_FORMAT "ll" +#endif + +/* If HAVE_LONG_LONG and SIZEOF_LONG_LONG aren't defined, but + GCC_VERSION >= 3000, assume this is the second or later stage of a + bootstrap, we do have long long, and it's 64 bits. (This is + required by C99; we do have some ports that violate that assumption + but they're all cross-compile-only.) Just in case, force a + constraint violation if that assumption is incorrect. */ +#if !defined HAVE_LONG_LONG +# if GCC_VERSION >= 3000 +# define HAVE_LONG_LONG 1 +# define SIZEOF_LONG_LONG 8 +extern char sizeof_long_long_must_be_8[sizeof(long long) == 8 ? 1 : -1]; +# endif +#endif + +#ifdef HAVE_LONG_LONG +# define HOST_BITS_PER_LONGLONG (CHAR_BIT * SIZEOF_LONG_LONG) +#endif +#ifdef HAVE___INT64 +# define HOST_BITS_PER___INT64 (CHAR_BIT * SIZEOF___INT64) +#endif + +/* Set HOST_WIDE_INT. This should be the widest efficient host + integer type. It can be 32 or 64 bits, except that if we are + targeting a machine with 64-bit size_t then it has to be 64 bits. + + With a sane ABI, 'long' is the largest efficient host integer type. + Thus, we use that unless we have to use 'long long' or '__int64' + because we're targeting a 64-bit machine from a 32-bit host. */ + +#if HOST_BITS_PER_LONG >= 64 || !defined NEED_64BIT_HOST_WIDE_INT +# define HOST_BITS_PER_WIDE_INT HOST_BITS_PER_LONG +# define HOST_WIDE_INT long +#else +# if HOST_BITS_PER_LONGLONG >= 64 +# define HOST_BITS_PER_WIDE_INT HOST_BITS_PER_LONGLONG +# define HOST_WIDE_INT long long +# else +# if HOST_BITS_PER___INT64 >= 64 +# define HOST_BITS_PER_WIDE_INT HOST_BITS_PER___INT64 +# define HOST_WIDE_INT __int64 +# else + #error "Unable to find a suitable type for HOST_WIDE_INT" +# endif +# endif +#endif + +/* Various printf format strings for HOST_WIDE_INT. */ + +#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG +# define HOST_WIDE_INT_PRINT "l" +# define HOST_WIDE_INT_PRINT_C "L" + /* 'long' might be 32 or 64 bits, and the number of leading zeroes + must be tweaked accordingly. */ +# if HOST_BITS_PER_WIDE_INT == 64 +# define HOST_WIDE_INT_PRINT_DOUBLE_HEX "0x%lx%016lx" +# else +# define HOST_WIDE_INT_PRINT_DOUBLE_HEX "0x%lx%08lx" +# endif +#else +# define HOST_WIDE_INT_PRINT HOST_LONG_LONG_FORMAT +# define HOST_WIDE_INT_PRINT_C "LL" + /* We can assume that 'long long' is at least 64 bits. */ +# define HOST_WIDE_INT_PRINT_DOUBLE_HEX \ + "0x%" HOST_LONG_LONG_FORMAT "x%016" HOST_LONG_LONG_FORMAT "x" +#endif /* HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG */ + +#define HOST_WIDE_INT_PRINT_DEC "%" HOST_WIDE_INT_PRINT "d" +#define HOST_WIDE_INT_PRINT_DEC_C HOST_WIDE_INT_PRINT_DEC HOST_WIDE_INT_PRINT_C +#define HOST_WIDE_INT_PRINT_UNSIGNED "%" HOST_WIDE_INT_PRINT "u" +#define HOST_WIDE_INT_PRINT_HEX "0x%" HOST_WIDE_INT_PRINT "x" + +/* Set HOST_WIDEST_INT. This is a 64-bit type unless the compiler + in use has no 64-bit type at all; in that case it's 32 bits. */ + +#if HOST_BITS_PER_WIDE_INT >= 64 \ + || (HOST_BITS_PER_LONGLONG < 64 && HOST_BITS_PER___INT64 < 64) +# define HOST_WIDEST_INT HOST_WIDE_INT +# define HOST_BITS_PER_WIDEST_INT HOST_BITS_PER_WIDE_INT +# define HOST_WIDEST_INT_PRINT_DEC HOST_WIDE_INT_PRINT_DEC +# define HOST_WIDEST_INT_PRINT_DEC_C HOST_WIDE_INT_PRINT_DEC_C +# define HOST_WIDEST_INT_PRINT_UNSIGNED HOST_WIDE_INT_PRINT_UNSIGNED +# define HOST_WIDEST_INT_PRINT_HEX HOST_WIDE_INT_PRINT_HEX +# define HOST_WIDEST_INT_PRINT_DOUBLE_HEX HOST_WIDE_INT_PRINT_DOUBLE_HEX +#else +# if HOST_BITS_PER_LONGLONG >= 64 +# define HOST_BITS_PER_WIDEST_INT HOST_BITS_PER_LONGLONG +# define HOST_WIDEST_INT long long +# else +# if HOST_BITS_PER___INT64 >= 64 +# define HOST_BITS_PER_WIDEST_INT HOST_BITS_PER___INT64 +# define HOST_WIDEST_INT __int64 +# else + #error "This line should be impossible to reach" +# endif +# endif +# define HOST_WIDEST_INT_PRINT_DEC "%" HOST_LONG_LONG_FORMAT "d" +# define HOST_WIDEST_INT_PRINT_DEC_C "%" HOST_LONG_LONG_FORMAT "dLL" +# define HOST_WIDEST_INT_PRINT_UNSIGNED "%" HOST_LONG_LONG_FORMAT "u" +# define HOST_WIDEST_INT_PRINT_HEX "0x%" HOST_LONG_LONG_FORMAT "x" +# define HOST_WIDEST_INT_PRINT_DOUBLE_HEX \ + "0x%" HOST_LONG_LONG_FORMAT "x%016" HOST_LONG_LONG_FORMAT "x" +#endif + +/* Define HOST_WIDEST_FAST_INT to the widest integer type supported + efficiently in hardware. (That is, the widest integer type that fits + in a hardware register.) Normally this is "long" but on some hosts it + should be "long long" or "__int64". This is no convenient way to + autodect this, so such systems must set a flag in config.host; see there + for details. */ + +#ifdef USE_LONG_LONG_FOR_WIDEST_FAST_INT +# ifdef HAVE_LONG_LONG +# define HOST_WIDEST_FAST_INT long long +# define HOST_BITS_PER_WIDEST_FAST_INT HOST_BITS_PER_LONGLONG +# elif defined (HAVE___INT64) +# define HOST_WIDEST_FAST_INT __int64 +# define HOST_BITS_PER_WIDEST_FAST_INT HOST_BITS_PER___INT64 +# else +# error "Your host said it wantted to use long long or __int64 but neither" +# error "exist" +# endif +#else +# define HOST_WIDEST_FAST_INT long +# define HOST_BITS_PER_WIDEST_FAST_INT HOST_BITS_PER_LONG +#endif + +#endif /* ! GCC_HWINT_H */ diff --git a/support/cpp/intl.h b/support/cpp/intl.h new file mode 100644 index 0000000..a118c0a --- /dev/null +++ b/support/cpp/intl.h @@ -0,0 +1,61 @@ +/* intl.h - internationalization + Copyright 1998, 2001, 2003, 2004 Free Software Foundation, Inc. + + GCC is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING. If not, write to the Free + Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA + 02110-1301, USA. */ + +#ifndef GCC_INTL_H +#define GCC_INTL_H + +#ifdef HAVE_LOCALE_H +# include +#endif + +#ifndef HAVE_SETLOCALE +# define setlocale(category, locale) (locale) +#endif + +#ifdef ENABLE_NLS +#include +extern void gcc_init_libintl (void); +extern size_t gcc_gettext_width (const char *); +#else +/* Stubs. */ +# undef textdomain +# define textdomain(domain) (domain) +# undef bindtextdomain +# define bindtextdomain(domain, directory) (domain) +# undef gettext +# define gettext(msgid) (msgid) +# define gcc_init_libintl() /* nothing */ +# define gcc_gettext_width(s) strlen(s) +#endif + +#ifndef _ +# define _(msgid) gettext (msgid) +#endif + +#ifndef N_ +# define N_(msgid) msgid +#endif + +#ifndef G_ +# define G_(gmsgid) gmsgid +#endif + +extern const char *open_quote; +extern const char *close_quote; + +#endif /* intl.h */ diff --git a/support/cpp/libcpp/charset.c b/support/cpp/libcpp/charset.c new file mode 100644 index 0000000..847c8b1 --- /dev/null +++ b/support/cpp/libcpp/charset.c @@ -0,0 +1,1689 @@ +/* CPP Library - charsets + Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2006 + Free Software Foundation, Inc. + + Broken out of c-lex.c Apr 2003, adding valid C99 UCN ranges. + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ + +#include "config.h" +#include "system.h" +#include "cpplib.h" +#include "internal.h" + +/* Character set handling for C-family languages. + + Terminological note: In what follows, "charset" or "character set" + will be taken to mean both an abstract set of characters and an + encoding for that set. + + The C99 standard discusses two character sets: source and execution. + The source character set is used for internal processing in translation + phases 1 through 4; the execution character set is used thereafter. + Both are required by 5.2.1.2p1 to be multibyte encodings, not wide + character encodings (see 3.7.2, 3.7.3 for the standardese meanings + of these terms). Furthermore, the "basic character set" (listed in + 5.2.1p3) is to be encoded in each with values one byte wide, and is + to appear in the initial shift state. + + It is not explicitly mentioned, but there is also a "wide execution + character set" used to encode wide character constants and wide + string literals; this is supposed to be the result of applying the + standard library function mbstowcs() to an equivalent narrow string + (6.4.5p5). However, the behavior of hexadecimal and octal + \-escapes is at odds with this; they are supposed to be translated + directly to wchar_t values (6.4.4.4p5,6). + + The source character set is not necessarily the character set used + to encode physical source files on disk; translation phase 1 converts + from whatever that encoding is to the source character set. + + The presence of universal character names in C99 (6.4.3 et seq.) + forces the source character set to be isomorphic to ISO 10646, + that is, Unicode. There is no such constraint on the execution + character set; note also that the conversion from source to + execution character set does not occur for identifiers (5.1.1.2p1#5). + + For convenience of implementation, the source character set's + encoding of the basic character set should be identical to the + execution character set OF THE HOST SYSTEM's encoding of the basic + character set, and it should not be a state-dependent encoding. + + cpplib uses UTF-8 or UTF-EBCDIC for the source character set, + depending on whether the host is based on ASCII or EBCDIC (see + respectively Unicode section 2.3/ISO10646 Amendment 2, and Unicode + Technical Report #16). With limited exceptions, it relies on the + system library's iconv() primitive to do charset conversion + (specified in SUSv2). */ + +#if !HAVE_ICONV +/* Make certain that the uses of iconv(), iconv_open(), iconv_close() + below, which are guarded only by if statements with compile-time + constant conditions, do not cause link errors. */ +#define iconv_open(x, y) (errno = EINVAL, (iconv_t)-1) +#define iconv(a,b,c,d,e) (errno = EINVAL, (size_t)-1) +#define iconv_close(x) (void)0 +#define ICONV_CONST +#endif + +#if HOST_CHARSET == HOST_CHARSET_ASCII +#define SOURCE_CHARSET "UTF-8" +#define LAST_POSSIBLY_BASIC_SOURCE_CHAR 0x7e +#elif HOST_CHARSET == HOST_CHARSET_EBCDIC +#define SOURCE_CHARSET "UTF-EBCDIC" +#define LAST_POSSIBLY_BASIC_SOURCE_CHAR 0xFF +#else +#error "Unrecognized basic host character set" +#endif + +#ifndef EILSEQ +#define EILSEQ EINVAL +#endif + +/* This structure is used for a resizable string buffer throughout. */ +/* Don't call it strbuf, as that conflicts with unistd.h on systems + such as DYNIX/ptx where unistd.h includes stropts.h. */ +struct _cpp_strbuf +{ + uchar *text; + size_t asize; + size_t len; +}; + +/* This is enough to hold any string that fits on a single 80-column + line, even if iconv quadruples its size (e.g. conversion from + ASCII to UTF-32) rounded up to a power of two. */ +#define OUTBUF_BLOCK_SIZE 256 + +/* Conversions between UTF-8 and UTF-16/32 are implemented by custom + logic. This is because a depressing number of systems lack iconv, + or have have iconv libraries that do not do these conversions, so + we need a fallback implementation for them. To ensure the fallback + doesn't break due to neglect, it is used on all systems. + + UTF-32 encoding is nice and simple: a four-byte binary number, + constrained to the range 00000000-7FFFFFFF to avoid questions of + signedness. We do have to cope with big- and little-endian + variants. + + UTF-16 encoding uses two-byte binary numbers, again in big- and + little-endian variants, for all values in the 00000000-0000FFFF + range. Values in the 00010000-0010FFFF range are encoded as pairs + of two-byte numbers, called "surrogate pairs": given a number S in + this range, it is mapped to a pair (H, L) as follows: + + H = (S - 0x10000) / 0x400 + 0xD800 + L = (S - 0x10000) % 0x400 + 0xDC00 + + Two-byte values in the D800...DFFF range are ill-formed except as a + component of a surrogate pair. Even if the encoding within a + two-byte value is little-endian, the H member of the surrogate pair + comes first. + + There is no way to encode values in the 00110000-7FFFFFFF range, + which is not currently a problem as there are no assigned code + points in that range; however, the author expects that it will + eventually become necessary to abandon UTF-16 due to this + limitation. Note also that, because of these pairs, UTF-16 does + not meet the requirements of the C standard for a wide character + encoding (see 3.7.3 and 6.4.4.4p11). + + UTF-8 encoding looks like this: + + value range encoded as + 00000000-0000007F 0xxxxxxx + 00000080-000007FF 110xxxxx 10xxxxxx + 00000800-0000FFFF 1110xxxx 10xxxxxx 10xxxxxx + 00010000-001FFFFF 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx + 00200000-03FFFFFF 111110xx 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx + 04000000-7FFFFFFF 1111110x 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx + + Values in the 0000D800 ... 0000DFFF range (surrogates) are invalid, + which means that three-byte sequences ED xx yy, with A0 <= xx <= BF, + never occur. Note also that any value that can be encoded by a + given row of the table can also be encoded by all successive rows, + but this is not done; only the shortest possible encoding for any + given value is valid. For instance, the character 07C0 could be + encoded as any of DF 80, E0 9F 80, F0 80 9F 80, F8 80 80 9F 80, or + FC 80 80 80 9F 80. Only the first is valid. + + An implementation note: the transformation from UTF-16 to UTF-8, or + vice versa, is easiest done by using UTF-32 as an intermediary. */ + +/* Internal primitives which go from an UTF-8 byte stream to native-endian + UTF-32 in a cppchar_t, or vice versa; this avoids an extra marshal/unmarshal + operation in several places below. */ +static inline int +one_utf8_to_cppchar (const uchar **inbufp, size_t *inbytesleftp, + cppchar_t *cp) +{ + static const uchar masks[6] = { 0x7F, 0x1F, 0x0F, 0x07, 0x02, 0x01 }; + static const uchar patns[6] = { 0x00, 0xC0, 0xE0, 0xF0, 0xF8, 0xFC }; + + cppchar_t c; + const uchar *inbuf = *inbufp; + size_t nbytes, i; + + if (*inbytesleftp < 1) + return EINVAL; + + c = *inbuf; + if (c < 0x80) + { + *cp = c; + *inbytesleftp -= 1; + *inbufp += 1; + return 0; + } + + /* The number of leading 1-bits in the first byte indicates how many + bytes follow. */ + for (nbytes = 2; nbytes < 7; nbytes++) + if ((c & ~masks[nbytes-1]) == patns[nbytes-1]) + goto found; + return EILSEQ; + found: + + if (*inbytesleftp < nbytes) + return EINVAL; + + c = (c & masks[nbytes-1]); + inbuf++; + for (i = 1; i < nbytes; i++) + { + cppchar_t n = *inbuf++; + if ((n & 0xC0) != 0x80) + return EILSEQ; + c = ((c << 6) + (n & 0x3F)); + } + + /* Make sure the shortest possible encoding was used. */ + if (c <= 0x7F && nbytes > 1) return EILSEQ; + if (c <= 0x7FF && nbytes > 2) return EILSEQ; + if (c <= 0xFFFF && nbytes > 3) return EILSEQ; + if (c <= 0x1FFFFF && nbytes > 4) return EILSEQ; + if (c <= 0x3FFFFFF && nbytes > 5) return EILSEQ; + + /* Make sure the character is valid. */ + if (c > 0x7FFFFFFF || (c >= 0xD800 && c <= 0xDFFF)) return EILSEQ; + + *cp = c; + *inbufp = inbuf; + *inbytesleftp -= nbytes; + return 0; +} + +static inline int +one_cppchar_to_utf8 (cppchar_t c, uchar **outbufp, size_t *outbytesleftp) +{ + static const uchar masks[6] = { 0x00, 0xC0, 0xE0, 0xF0, 0xF8, 0xFC }; + static const uchar limits[6] = { 0x80, 0xE0, 0xF0, 0xF8, 0xFC, 0xFE }; + size_t nbytes; + uchar buf[6], *p = &buf[6]; + uchar *outbuf = *outbufp; + + nbytes = 1; + if (c < 0x80) + *--p = c; + else + { + do + { + *--p = ((c & 0x3F) | 0x80); + c >>= 6; + nbytes++; + } + while (c >= 0x3F || (c & limits[nbytes-1])); + *--p = (c | masks[nbytes-1]); + } + + if (*outbytesleftp < nbytes) + return E2BIG; + + while (p < &buf[6]) + *outbuf++ = *p++; + *outbytesleftp -= nbytes; + *outbufp = outbuf; + return 0; +} + +/* The following four functions transform one character between the two + encodings named in the function name. All have the signature + int (*)(iconv_t bigend, const uchar **inbufp, size_t *inbytesleftp, + uchar **outbufp, size_t *outbytesleftp) + + BIGEND must have the value 0 or 1, coerced to (iconv_t); it is + interpreted as a boolean indicating whether big-endian or + little-endian encoding is to be used for the member of the pair + that is not UTF-8. + + INBUFP, INBYTESLEFTP, OUTBUFP, OUTBYTESLEFTP work exactly as they + do for iconv. + + The return value is either 0 for success, or an errno value for + failure, which may be E2BIG (need more space), EILSEQ (ill-formed + input sequence), ir EINVAL (incomplete input sequence). */ + +static inline int +one_utf8_to_utf32 (iconv_t bigend, const uchar **inbufp, size_t *inbytesleftp, + uchar **outbufp, size_t *outbytesleftp) +{ + uchar *outbuf; + cppchar_t s = 0; + int rval; + + /* Check for space first, since we know exactly how much we need. */ + if (*outbytesleftp < 4) + return E2BIG; + + rval = one_utf8_to_cppchar (inbufp, inbytesleftp, &s); + if (rval) + return rval; + + outbuf = *outbufp; + outbuf[bigend ? 3 : 0] = (s & 0x000000FF); + outbuf[bigend ? 2 : 1] = (s & 0x0000FF00) >> 8; + outbuf[bigend ? 1 : 2] = (s & 0x00FF0000) >> 16; + outbuf[bigend ? 0 : 3] = (s & 0xFF000000) >> 24; + + *outbufp += 4; + *outbytesleftp -= 4; + return 0; +} + +static inline int +one_utf32_to_utf8 (iconv_t bigend, const uchar **inbufp, size_t *inbytesleftp, + uchar **outbufp, size_t *outbytesleftp) +{ + cppchar_t s; + int rval; + const uchar *inbuf; + + if (*inbytesleftp < 4) + return EINVAL; + + inbuf = *inbufp; + + s = inbuf[bigend ? 0 : 3] << 24; + s += inbuf[bigend ? 1 : 2] << 16; + s += inbuf[bigend ? 2 : 1] << 8; + s += inbuf[bigend ? 3 : 0]; + + if (s >= 0x7FFFFFFF || (s >= 0xD800 && s <= 0xDFFF)) + return EILSEQ; + + rval = one_cppchar_to_utf8 (s, outbufp, outbytesleftp); + if (rval) + return rval; + + *inbufp += 4; + *inbytesleftp -= 4; + return 0; +} + +static inline int +one_utf8_to_utf16 (iconv_t bigend, const uchar **inbufp, size_t *inbytesleftp, + uchar **outbufp, size_t *outbytesleftp) +{ + int rval; + cppchar_t s = 0; + const uchar *save_inbuf = *inbufp; + size_t save_inbytesleft = *inbytesleftp; + uchar *outbuf = *outbufp; + + rval = one_utf8_to_cppchar (inbufp, inbytesleftp, &s); + if (rval) + return rval; + + if (s > 0x0010FFFF) + { + *inbufp = save_inbuf; + *inbytesleftp = save_inbytesleft; + return EILSEQ; + } + + if (s < 0xFFFF) + { + if (*outbytesleftp < 2) + { + *inbufp = save_inbuf; + *inbytesleftp = save_inbytesleft; + return E2BIG; + } + outbuf[bigend ? 1 : 0] = (s & 0x00FF); + outbuf[bigend ? 0 : 1] = (s & 0xFF00) >> 8; + + *outbufp += 2; + *outbytesleftp -= 2; + return 0; + } + else + { + cppchar_t hi, lo; + + if (*outbytesleftp < 4) + { + *inbufp = save_inbuf; + *inbytesleftp = save_inbytesleft; + return E2BIG; + } + + hi = (s - 0x10000) / 0x400 + 0xD800; + lo = (s - 0x10000) % 0x400 + 0xDC00; + + /* Even if we are little-endian, put the high surrogate first. + ??? Matches practice? */ + outbuf[bigend ? 1 : 0] = (hi & 0x00FF); + outbuf[bigend ? 0 : 1] = (hi & 0xFF00) >> 8; + outbuf[bigend ? 3 : 2] = (lo & 0x00FF); + outbuf[bigend ? 2 : 3] = (lo & 0xFF00) >> 8; + + *outbufp += 4; + *outbytesleftp -= 4; + return 0; + } +} + +static inline int +one_utf16_to_utf8 (iconv_t bigend, const uchar **inbufp, size_t *inbytesleftp, + uchar **outbufp, size_t *outbytesleftp) +{ + cppchar_t s; + const uchar *inbuf = *inbufp; + int rval; + + if (*inbytesleftp < 2) + return EINVAL; + s = inbuf[bigend ? 0 : 1] << 8; + s += inbuf[bigend ? 1 : 0]; + + /* Low surrogate without immediately preceding high surrogate is invalid. */ + if (s >= 0xDC00 && s <= 0xDFFF) + return EILSEQ; + /* High surrogate must have a following low surrogate. */ + else if (s >= 0xD800 && s <= 0xDBFF) + { + cppchar_t hi = s, lo; + if (*inbytesleftp < 4) + return EINVAL; + + lo = inbuf[bigend ? 2 : 3] << 8; + lo += inbuf[bigend ? 3 : 2]; + + if (lo < 0xDC00 || lo > 0xDFFF) + return EILSEQ; + + s = (hi - 0xD800) * 0x400 + (lo - 0xDC00) + 0x10000; + } + + rval = one_cppchar_to_utf8 (s, outbufp, outbytesleftp); + if (rval) + return rval; + + /* Success - update the input pointers (one_cppchar_to_utf8 has done + the output pointers for us). */ + if (s <= 0xFFFF) + { + *inbufp += 2; + *inbytesleftp -= 2; + } + else + { + *inbufp += 4; + *inbytesleftp -= 4; + } + return 0; +} + +/* Helper routine for the next few functions. The 'const' on + one_conversion means that we promise not to modify what function is + pointed to, which lets the inliner see through it. */ + +static inline bool +conversion_loop (int (*const one_conversion)(iconv_t, const uchar **, size_t *, + uchar **, size_t *), + iconv_t cd, const uchar *from, size_t flen, struct _cpp_strbuf *to) +{ + const uchar *inbuf; + uchar *outbuf; + size_t inbytesleft, outbytesleft; + int rval; + + inbuf = from; + inbytesleft = flen; + outbuf = to->text + to->len; + outbytesleft = to->asize - to->len; + + for (;;) + { + do + rval = one_conversion (cd, &inbuf, &inbytesleft, + &outbuf, &outbytesleft); + while (inbytesleft && !rval); + + if (__builtin_expect (inbytesleft == 0, 1)) + { + to->len = to->asize - outbytesleft; + return true; + } + if (rval != E2BIG) + { + errno = rval; + return false; + } + + outbytesleft += OUTBUF_BLOCK_SIZE; + to->asize += OUTBUF_BLOCK_SIZE; + to->text = XRESIZEVEC (uchar, to->text, to->asize); + outbuf = to->text + to->asize - outbytesleft; + } +} + + +/* These functions convert entire strings between character sets. + They all have the signature + + bool (*)(iconv_t cd, const uchar *from, size_t flen, struct _cpp_strbuf *to); + + The input string FROM is converted as specified by the function + name plus the iconv descriptor CD (which may be fake), and the + result appended to TO. On any error, false is returned, otherwise true. */ + +/* These four use the custom conversion code above. */ +static bool +convert_utf8_utf16 (iconv_t cd, const uchar *from, size_t flen, + struct _cpp_strbuf *to) +{ + return conversion_loop (one_utf8_to_utf16, cd, from, flen, to); +} + +static bool +convert_utf8_utf32 (iconv_t cd, const uchar *from, size_t flen, + struct _cpp_strbuf *to) +{ + return conversion_loop (one_utf8_to_utf32, cd, from, flen, to); +} + +static bool +convert_utf16_utf8 (iconv_t cd, const uchar *from, size_t flen, + struct _cpp_strbuf *to) +{ + return conversion_loop (one_utf16_to_utf8, cd, from, flen, to); +} + +static bool +convert_utf32_utf8 (iconv_t cd, const uchar *from, size_t flen, + struct _cpp_strbuf *to) +{ + return conversion_loop (one_utf32_to_utf8, cd, from, flen, to); +} + +/* Identity conversion, used when we have no alternative. */ +static bool +convert_no_conversion (iconv_t cd ATTRIBUTE_UNUSED, + const uchar *from, size_t flen, struct _cpp_strbuf *to) +{ + if (to->len + flen > to->asize) + { + to->asize = to->len + flen; + to->text = XRESIZEVEC (uchar, to->text, to->asize); + } + memcpy (to->text + to->len, from, flen); + to->len += flen; + return true; +} + +/* And this one uses the system iconv primitive. It's a little + different, since iconv's interface is a little different. */ +#if HAVE_ICONV + +#define CONVERT_ICONV_GROW_BUFFER \ + do { \ + outbytesleft += OUTBUF_BLOCK_SIZE; \ + to->asize += OUTBUF_BLOCK_SIZE; \ + to->text = XRESIZEVEC (uchar, to->text, to->asize); \ + outbuf = (char *)to->text + to->asize - outbytesleft; \ + } while (0) + +static bool +convert_using_iconv (iconv_t cd, const uchar *from, size_t flen, + struct _cpp_strbuf *to) +{ + ICONV_CONST char *inbuf; + char *outbuf; + size_t inbytesleft, outbytesleft; + + /* Reset conversion descriptor and check that it is valid. */ + if (iconv (cd, 0, 0, 0, 0) == (size_t)-1) + return false; + + inbuf = (ICONV_CONST char *)from; + inbytesleft = flen; + outbuf = (char *)to->text + to->len; + outbytesleft = to->asize - to->len; + + for (;;) + { + iconv (cd, &inbuf, &inbytesleft, &outbuf, &outbytesleft); + if (__builtin_expect (inbytesleft == 0, 1)) + { + /* Close out any shift states, returning to the initial state. */ + if (iconv (cd, 0, 0, &outbuf, &outbytesleft) == (size_t)-1) + { + if (errno != E2BIG) + return false; + + CONVERT_ICONV_GROW_BUFFER; + if (iconv (cd, 0, 0, &outbuf, &outbytesleft) == (size_t)-1) + return false; + } + + to->len = to->asize - outbytesleft; + return true; + } + if (errno != E2BIG) + return false; + + CONVERT_ICONV_GROW_BUFFER; + } +} +#else +#define convert_using_iconv 0 /* prevent undefined symbol error below */ +#endif + +/* Arrange for the above custom conversion logic to be used automatically + when conversion between a suitable pair of character sets is requested. */ + +#define APPLY_CONVERSION(CONVERTER, FROM, FLEN, TO) \ + CONVERTER.func (CONVERTER.cd, FROM, FLEN, TO) + +struct conversion +{ + const char *pair; + convert_f func; + iconv_t fake_cd; +}; +static const struct conversion conversion_tab[] = { + { "UTF-8/UTF-32LE", convert_utf8_utf32, (iconv_t)0 }, + { "UTF-8/UTF-32BE", convert_utf8_utf32, (iconv_t)1 }, + { "UTF-8/UTF-16LE", convert_utf8_utf16, (iconv_t)0 }, + { "UTF-8/UTF-16BE", convert_utf8_utf16, (iconv_t)1 }, + { "UTF-32LE/UTF-8", convert_utf32_utf8, (iconv_t)0 }, + { "UTF-32BE/UTF-8", convert_utf32_utf8, (iconv_t)1 }, + { "UTF-16LE/UTF-8", convert_utf16_utf8, (iconv_t)0 }, + { "UTF-16BE/UTF-8", convert_utf16_utf8, (iconv_t)1 }, +}; + +/* Subroutine of cpp_init_iconv: initialize and return a + cset_converter structure for conversion from FROM to TO. If + iconv_open() fails, issue an error and return an identity + converter. Silently return an identity converter if FROM and TO + are identical. */ +static struct cset_converter +init_iconv_desc (cpp_reader *pfile, const char *to, const char *from) +{ + struct cset_converter ret; + char *pair; + size_t i; + + if (!strcasecmp (to, from)) + { + ret.func = convert_no_conversion; + ret.cd = (iconv_t) -1; + return ret; + } + + pair = (char *) alloca(strlen(to) + strlen(from) + 2); + + strcpy(pair, from); + strcat(pair, "/"); + strcat(pair, to); + for (i = 0; i < ARRAY_SIZE (conversion_tab); i++) + if (!strcasecmp (pair, conversion_tab[i].pair)) + { + ret.func = conversion_tab[i].func; + ret.cd = conversion_tab[i].fake_cd; + return ret; + } + + /* No custom converter - try iconv. */ + if (HAVE_ICONV) + { + ret.func = convert_using_iconv; + ret.cd = iconv_open (to, from); + + if (ret.cd == (iconv_t) -1) + { + if (errno == EINVAL) + cpp_error (pfile, CPP_DL_ERROR, /* FIXME should be DL_SORRY */ + "conversion from %s to %s not supported by iconv", + from, to); + else + cpp_errno (pfile, CPP_DL_ERROR, "iconv_open"); + + ret.func = convert_no_conversion; + } + } + else + { + cpp_error (pfile, CPP_DL_ERROR, /* FIXME: should be DL_SORRY */ + "no iconv implementation, cannot convert from %s to %s", + from, to); + ret.func = convert_no_conversion; + ret.cd = (iconv_t) -1; + } + return ret; +} + +/* If charset conversion is requested, initialize iconv(3) descriptors + for conversion from the source character set to the execution + character sets. If iconv is not present in the C library, and + conversion is requested, issue an error. */ + +void +cpp_init_iconv (cpp_reader *pfile) +{ + const char *ncset = CPP_OPTION (pfile, narrow_charset); + const char *wcset = CPP_OPTION (pfile, wide_charset); + const char *default_wcset; + + bool be = CPP_OPTION (pfile, bytes_big_endian); + + if (CPP_OPTION (pfile, wchar_precision) >= 32) + default_wcset = be ? "UTF-32BE" : "UTF-32LE"; + else if (CPP_OPTION (pfile, wchar_precision) >= 16) + default_wcset = be ? "UTF-16BE" : "UTF-16LE"; + else + /* This effectively means that wide strings are not supported, + so don't do any conversion at all. */ + default_wcset = SOURCE_CHARSET; + + if (!ncset) + ncset = SOURCE_CHARSET; + if (!wcset) + wcset = default_wcset; + + pfile->narrow_cset_desc = init_iconv_desc (pfile, ncset, SOURCE_CHARSET); + pfile->wide_cset_desc = init_iconv_desc (pfile, wcset, SOURCE_CHARSET); +} + +/* Destroy iconv(3) descriptors set up by cpp_init_iconv, if necessary. */ +void +_cpp_destroy_iconv (cpp_reader *pfile) +{ + if (HAVE_ICONV) + { + if (pfile->narrow_cset_desc.func == convert_using_iconv) + iconv_close (pfile->narrow_cset_desc.cd); + if (pfile->wide_cset_desc.func == convert_using_iconv) + iconv_close (pfile->wide_cset_desc.cd); + } +} + +/* Utility routine for use by a full compiler. C is a character taken + from the *basic* source character set, encoded in the host's + execution encoding. Convert it to (the target's) execution + encoding, and return that value. + + Issues an internal error if C's representation in the narrow + execution character set fails to be a single-byte value (C99 + 5.2.1p3: "The representation of each member of the source and + execution character sets shall fit in a byte.") May also issue an + internal error if C fails to be a member of the basic source + character set (testing this exactly is too hard, especially when + the host character set is EBCDIC). */ +cppchar_t +cpp_host_to_exec_charset (cpp_reader *pfile, cppchar_t c) +{ + uchar sbuf[1]; + struct _cpp_strbuf tbuf; + + /* This test is merely an approximation, but it suffices to catch + the most important thing, which is that we don't get handed a + character outside the unibyte range of the host character set. */ + if (c > LAST_POSSIBLY_BASIC_SOURCE_CHAR) + { + cpp_error (pfile, CPP_DL_ICE, + "character 0x%lx is not in the basic source character set\n", + (unsigned long)c); + return 0; + } + + /* Being a character in the unibyte range of the host character set, + we can safely splat it into a one-byte buffer and trust that that + is a well-formed string. */ + sbuf[0] = c; + + /* This should never need to reallocate, but just in case... */ + tbuf.asize = 1; + tbuf.text = XNEWVEC (uchar, tbuf.asize); + tbuf.len = 0; + + if (!APPLY_CONVERSION (pfile->narrow_cset_desc, sbuf, 1, &tbuf)) + { + cpp_errno (pfile, CPP_DL_ICE, "converting to execution character set"); + return 0; + } + if (tbuf.len != 1) + { + cpp_error (pfile, CPP_DL_ICE, + "character 0x%lx is not unibyte in execution character set", + (unsigned long)c); + return 0; + } + c = tbuf.text[0]; + free(tbuf.text); + return c; +} + + + +/* Utility routine that computes a mask of the form 0000...111... with + WIDTH 1-bits. */ +static inline size_t +width_to_mask (size_t width) +{ + width = MIN (width, BITS_PER_CPPCHAR_T); + if (width >= CHAR_BIT * sizeof (size_t)) + return ~(size_t) 0; + else + return ((size_t) 1 << width) - 1; +} + +/* A large table of unicode character information. */ +enum { + /* Valid in a C99 identifier? */ + C99 = 1, + /* Valid in a C99 identifier, but not as the first character? */ + DIG = 2, + /* Valid in a C++ identifier? */ + CXX = 4, + /* NFC representation is not valid in an identifier? */ + CID = 8, + /* Might be valid NFC form? */ + NFC = 16, + /* Might be valid NFKC form? */ + NKC = 32, + /* Certain preceding characters might make it not valid NFC/NKFC form? */ + CTX = 64 +}; + +static const struct { + /* Bitmap of flags above. */ + unsigned char flags; + /* Combining class of the character. */ + unsigned char combine; + /* Last character in the range described by this entry. */ + unsigned short end; +} ucnranges[] = { +#include "ucnid.h" +}; + +/* Returns 1 if C is valid in an identifier, 2 if C is valid except at + the start of an identifier, and 0 if C is not valid in an + identifier. We assume C has already gone through the checks of + _cpp_valid_ucn. Also update NST for C if returning nonzero. The + algorithm is a simple binary search on the table defined in + ucnid.h. */ + +static int +ucn_valid_in_identifier (cpp_reader *pfile, cppchar_t c, + struct normalize_state *nst) +{ + int mn, mx, md; + + if (c > 0xFFFF) + return 0; + + mn = 0; + mx = ARRAY_SIZE (ucnranges) - 1; + while (mx != mn) + { + md = (mn + mx) / 2; + if (c <= ucnranges[md].end) + mx = md; + else + mn = md + 1; + } + + /* When -pedantic, we require the character to have been listed by + the standard for the current language. Otherwise, we accept the + union of the acceptable sets for C++98 and C99. */ + if (! (ucnranges[mn].flags & (C99 | CXX))) + return 0; + + if (CPP_PEDANTIC (pfile) + && ((CPP_OPTION (pfile, c99) && !(ucnranges[mn].flags & C99)) + || (CPP_OPTION (pfile, cplusplus) + && !(ucnranges[mn].flags & CXX)))) + return 0; + + /* Update NST. */ + if (ucnranges[mn].combine != 0 && ucnranges[mn].combine < nst->prev_class) + nst->level = normalized_none; + else if (ucnranges[mn].flags & CTX) + { + bool safe; + cppchar_t p = nst->previous; + + /* Easy cases from Bengali, Oriya, Tamil, Jannada, and Malayalam. */ + if (c == 0x09BE) + safe = p != 0x09C7; /* Use 09CB instead of 09C7 09BE. */ + else if (c == 0x0B3E) + safe = p != 0x0B47; /* Use 0B4B instead of 0B47 0B3E. */ + else if (c == 0x0BBE) + safe = p != 0x0BC6 && p != 0x0BC7; /* Use 0BCA/0BCB instead. */ + else if (c == 0x0CC2) + safe = p != 0x0CC6; /* Use 0CCA instead of 0CC6 0CC2. */ + else if (c == 0x0D3E) + safe = p != 0x0D46 && p != 0x0D47; /* Use 0D4A/0D4B instead. */ + /* For Hangul, characters in the range AC00-D7A3 are NFC/NFKC, + and are combined algorithmically from a sequence of the form + 1100-1112 1161-1175 11A8-11C2 + (if the third is not present, it is treated as 11A7, which is not + really a valid character). + Unfortunately, C99 allows (only) the NFC form, but C++ allows + only the combining characters. */ + else if (c >= 0x1161 && c <= 0x1175) + safe = p < 0x1100 || p > 0x1112; + else if (c >= 0x11A8 && c <= 0x11C2) + safe = (p < 0xAC00 || p > 0xD7A3 || (p - 0xAC00) % 28 != 0); + else + { + /* Uh-oh, someone updated ucnid.h without updating this code. */ + cpp_error (pfile, CPP_DL_ICE, "Character %x might not be NFKC", c); + safe = true; + } + if (!safe && c < 0x1161) + nst->level = normalized_none; + else if (!safe) + nst->level = MAX (nst->level, normalized_identifier_C); + } + else if (ucnranges[mn].flags & NKC) + ; + else if (ucnranges[mn].flags & NFC) + nst->level = MAX (nst->level, normalized_C); + else if (ucnranges[mn].flags & CID) + nst->level = MAX (nst->level, normalized_identifier_C); + else + nst->level = normalized_none; + nst->previous = c; + nst->prev_class = ucnranges[mn].combine; + + /* In C99, UCN digits may not begin identifiers. */ + if (CPP_OPTION (pfile, c99) && (ucnranges[mn].flags & DIG)) + return 2; + + return 1; +} + +/* [lex.charset]: The character designated by the universal character + name \UNNNNNNNN is that character whose character short name in + ISO/IEC 10646 is NNNNNNNN; the character designated by the + universal character name \uNNNN is that character whose character + short name in ISO/IEC 10646 is 0000NNNN. If the hexadecimal value + for a universal character name is less than 0x20 or in the range + 0x7F-0x9F (inclusive), or if the universal character name + designates a character in the basic source character set, then the + program is ill-formed. + + *PSTR must be preceded by "\u" or "\U"; it is assumed that the + buffer end is delimited by a non-hex digit. Returns zero if the + UCN has not been consumed. + + Otherwise the nonzero value of the UCN, whether valid or invalid, + is returned. Diagnostics are emitted for invalid values. PSTR + is updated to point one beyond the UCN, or to the syntactically + invalid character. + + IDENTIFIER_POS is 0 when not in an identifier, 1 for the start of + an identifier, or 2 otherwise. */ + +cppchar_t +_cpp_valid_ucn (cpp_reader *pfile, const uchar **pstr, + const uchar *limit, int identifier_pos, + struct normalize_state *nst) +{ + cppchar_t result, c; + unsigned int length; + const uchar *str = *pstr; + const uchar *base = str - 2; + + if (!CPP_OPTION (pfile, cplusplus) && !CPP_OPTION (pfile, c99)) + cpp_error (pfile, CPP_DL_WARNING, + "universal character names are only valid in C++ and C99"); + else if (CPP_WTRADITIONAL (pfile) && identifier_pos == 0) + cpp_error (pfile, CPP_DL_WARNING, + "the meaning of '\\%c' is different in traditional C", + (int) str[-1]); + + if (str[-1] == 'u') + length = 4; + else if (str[-1] == 'U') + length = 8; + else + { + cpp_error (pfile, CPP_DL_ICE, "In _cpp_valid_ucn but not a UCN"); + length = 4; + } + + result = 0; + do + { + c = *str; + if (!ISXDIGIT (c)) + break; + str++; + result = (result << 4) + hex_value (c); + } + while (--length && str < limit); + + /* Partial UCNs are not valid in strings, but decompose into + multiple tokens in identifiers, so we can't give a helpful + error message in that case. */ + if (length && identifier_pos) + return 0; + + *pstr = str; + if (length) + { + cpp_error (pfile, CPP_DL_ERROR, + "incomplete universal character name %.*s", + (int) (str - base), base); + result = 1; + } + /* The standard permits $, @ and ` to be specified as UCNs. We use + hex escapes so that this also works with EBCDIC hosts. */ + else if ((result < 0xa0 + && (result != 0x24 && result != 0x40 && result != 0x60)) + || (result & 0x80000000) + || (result >= 0xD800 && result <= 0xDFFF)) + { + cpp_error (pfile, CPP_DL_ERROR, + "%.*s is not a valid universal character", + (int) (str - base), base); + result = 1; + } + else if (identifier_pos && result == 0x24 + && CPP_OPTION (pfile, dollars_in_ident)) + { + if (CPP_OPTION (pfile, warn_dollars) && !pfile->state.skipping) + { + CPP_OPTION (pfile, warn_dollars) = 0; + cpp_error (pfile, CPP_DL_PEDWARN, "'$' in identifier or number"); + } + NORMALIZE_STATE_UPDATE_IDNUM (nst); + } + else if (identifier_pos) + { + int validity = ucn_valid_in_identifier (pfile, result, nst); + + if (validity == 0) + cpp_error (pfile, CPP_DL_ERROR, + "universal character %.*s is not valid in an identifier", + (int) (str - base), base); + else if (validity == 2 && identifier_pos == 1) + cpp_error (pfile, CPP_DL_ERROR, + "universal character %.*s is not valid at the start of an identifier", + (int) (str - base), base); + } + + if (result == 0) + result = 1; + + return result; +} + +/* Convert an UCN, pointed to by FROM, to UTF-8 encoding, then translate + it to the execution character set and write the result into TBUF. + An advanced pointer is returned. Issues all relevant diagnostics. */ +static const uchar * +convert_ucn (cpp_reader *pfile, const uchar *from, const uchar *limit, + struct _cpp_strbuf *tbuf, bool wide) +{ + cppchar_t ucn; + uchar buf[6]; + uchar *bufp = buf; + size_t bytesleft = 6; + int rval; + struct cset_converter cvt + = wide ? pfile->wide_cset_desc : pfile->narrow_cset_desc; + struct normalize_state nst = INITIAL_NORMALIZE_STATE; + + from++; /* Skip u/U. */ + ucn = _cpp_valid_ucn (pfile, &from, limit, 0, &nst); + + rval = one_cppchar_to_utf8 (ucn, &bufp, &bytesleft); + if (rval) + { + errno = rval; + cpp_errno (pfile, CPP_DL_ERROR, + "converting UCN to source character set"); + } + else if (!APPLY_CONVERSION (cvt, buf, 6 - bytesleft, tbuf)) + cpp_errno (pfile, CPP_DL_ERROR, + "converting UCN to execution character set"); + + return from; +} + +/* Subroutine of convert_hex and convert_oct. N is the representation + in the execution character set of a numeric escape; write it into the + string buffer TBUF and update the end-of-string pointer therein. WIDE + is true if it's a wide string that's being assembled in TBUF. This + function issues no diagnostics and never fails. */ +static void +emit_numeric_escape (cpp_reader *pfile, cppchar_t n, + struct _cpp_strbuf *tbuf, bool wide) +{ + if (wide) + { + /* We have to render this into the target byte order, which may not + be our byte order. */ + bool bigend = CPP_OPTION (pfile, bytes_big_endian); + size_t width = CPP_OPTION (pfile, wchar_precision); + size_t cwidth = CPP_OPTION (pfile, char_precision); + size_t cmask = width_to_mask (cwidth); + size_t nbwc = width / cwidth; + size_t i; + size_t off = tbuf->len; + cppchar_t c; + + if (tbuf->len + nbwc > tbuf->asize) + { + tbuf->asize += OUTBUF_BLOCK_SIZE; + tbuf->text = XRESIZEVEC (uchar, tbuf->text, tbuf->asize); + } + + for (i = 0; i < nbwc; i++) + { + c = n & cmask; + n >>= cwidth; + tbuf->text[off + (bigend ? nbwc - i - 1 : i)] = c; + } + tbuf->len += nbwc; + } + else + { + /* Note: this code does not handle the case where the target + and host have a different number of bits in a byte. */ + if (tbuf->len + 1 > tbuf->asize) + { + tbuf->asize += OUTBUF_BLOCK_SIZE; + tbuf->text = XRESIZEVEC (uchar, tbuf->text, tbuf->asize); + } + tbuf->text[tbuf->len++] = n; + } +} + +/* Convert a hexadecimal escape, pointed to by FROM, to the execution + character set and write it into the string buffer TBUF. Returns an + advanced pointer, and issues diagnostics as necessary. + No character set translation occurs; this routine always produces the + execution-set character with numeric value equal to the given hex + number. You can, e.g. generate surrogate pairs this way. */ +static const uchar * +convert_hex (cpp_reader *pfile, const uchar *from, const uchar *limit, + struct _cpp_strbuf *tbuf, bool wide) +{ + cppchar_t c, n = 0, overflow = 0; + int digits_found = 0; + size_t width = (wide ? CPP_OPTION (pfile, wchar_precision) + : CPP_OPTION (pfile, char_precision)); + size_t mask = width_to_mask (width); + + if (CPP_WTRADITIONAL (pfile)) + cpp_error (pfile, CPP_DL_WARNING, + "the meaning of '\\x' is different in traditional C"); + + from++; /* Skip 'x'. */ + while (from < limit) + { + c = *from; + if (! hex_p (c)) + break; + from++; + overflow |= n ^ (n << 4 >> 4); + n = (n << 4) + hex_value (c); + digits_found = 1; + } + + if (!digits_found) + { + cpp_error (pfile, CPP_DL_ERROR, + "\\x used with no following hex digits"); + return from; + } + + if (overflow | (n != (n & mask))) + { + cpp_error (pfile, CPP_DL_PEDWARN, + "hex escape sequence out of range"); + n &= mask; + } + + emit_numeric_escape (pfile, n, tbuf, wide); + + return from; +} + +/* Convert an octal escape, pointed to by FROM, to the execution + character set and write it into the string buffer TBUF. Returns an + advanced pointer, and issues diagnostics as necessary. + No character set translation occurs; this routine always produces the + execution-set character with numeric value equal to the given octal + number. */ +static const uchar * +convert_oct (cpp_reader *pfile, const uchar *from, const uchar *limit, + struct _cpp_strbuf *tbuf, bool wide) +{ + size_t count = 0; + cppchar_t c, n = 0; + size_t width = (wide ? CPP_OPTION (pfile, wchar_precision) + : CPP_OPTION (pfile, char_precision)); + size_t mask = width_to_mask (width); + bool overflow = false; + + while (from < limit && count++ < 3) + { + c = *from; + if (c < '0' || c > '7') + break; + from++; + overflow |= n ^ (n << 3 >> 3); + n = (n << 3) + c - '0'; + } + + if (n != (n & mask)) + { + cpp_error (pfile, CPP_DL_PEDWARN, + "octal escape sequence out of range"); + n &= mask; + } + + emit_numeric_escape (pfile, n, tbuf, wide); + + return from; +} + +/* Convert an escape sequence (pointed to by FROM) to its value on + the target, and to the execution character set. Do not scan past + LIMIT. Write the converted value into TBUF. Returns an advanced + pointer. Handles all relevant diagnostics. */ +static const uchar * +convert_escape (cpp_reader *pfile, const uchar *from, const uchar *limit, + struct _cpp_strbuf *tbuf, bool wide) +{ + /* Values of \a \b \e \f \n \r \t \v respectively. */ +#if HOST_CHARSET == HOST_CHARSET_ASCII + static const uchar charconsts[] = { 7, 8, 27, 12, 10, 13, 9, 11 }; +#elif HOST_CHARSET == HOST_CHARSET_EBCDIC + static const uchar charconsts[] = { 47, 22, 39, 12, 21, 13, 5, 11 }; +#else +#error "unknown host character set" +#endif + + uchar c; + struct cset_converter cvt + = wide ? pfile->wide_cset_desc : pfile->narrow_cset_desc; + + c = *from; + switch (c) + { + /* UCNs, hex escapes, and octal escapes are processed separately. */ + case 'u': case 'U': + return convert_ucn (pfile, from, limit, tbuf, wide); + + case 'x': + return convert_hex (pfile, from, limit, tbuf, wide); + break; + + case '0': case '1': case '2': case '3': + case '4': case '5': case '6': case '7': + return convert_oct (pfile, from, limit, tbuf, wide); + + /* Various letter escapes. Get the appropriate host-charset + value into C. */ + case '\\': case '\'': case '"': case '?': break; + + case '(': case '{': case '[': case '%': + /* '\(', etc, can be used at the beginning of a line in a long + string split onto multiple lines with \-newline, to prevent + Emacs or other text editors from getting confused. '\%' can + be used to prevent SCCS from mangling printf format strings. */ + if (CPP_PEDANTIC (pfile)) + goto unknown; + break; + + case 'b': c = charconsts[1]; break; + case 'f': c = charconsts[3]; break; + case 'n': c = charconsts[4]; break; + case 'r': c = charconsts[5]; break; + case 't': c = charconsts[6]; break; + case 'v': c = charconsts[7]; break; + + case 'a': + if (CPP_WTRADITIONAL (pfile)) + cpp_error (pfile, CPP_DL_WARNING, + "the meaning of '\\a' is different in traditional C"); + c = charconsts[0]; + break; + + case 'e': case 'E': + if (CPP_PEDANTIC (pfile)) + cpp_error (pfile, CPP_DL_PEDWARN, + "non-ISO-standard escape sequence, '\\%c'", (int) c); + c = charconsts[2]; + break; + + default: + unknown: + if (ISGRAPH (c)) + cpp_error (pfile, CPP_DL_PEDWARN, + "unknown escape sequence '\\%c'", (int) c); + else + { + /* diagnostic.c does not support "%03o". When it does, this + code can use %03o directly in the diagnostic again. */ + char buf[32]; + sprintf(buf, "%03o", (int) c); + cpp_error (pfile, CPP_DL_PEDWARN, + "unknown escape sequence: '\\%s'", buf); + } + } + + /* Now convert what we have to the execution character set. */ + if (!APPLY_CONVERSION (cvt, &c, 1, tbuf)) + cpp_errno (pfile, CPP_DL_ERROR, + "converting escape sequence to execution character set"); + + return from + 1; +} + +/* FROM is an array of cpp_string structures of length COUNT. These + are to be converted from the source to the execution character set, + escape sequences translated, and finally all are to be + concatenated. WIDE indicates whether or not to produce a wide + string. The result is written into TO. Returns true for success, + false for failure. */ +bool +cpp_interpret_string (cpp_reader *pfile, const cpp_string *from, size_t count, + cpp_string *to, bool wide) +{ + struct _cpp_strbuf tbuf; + const uchar *p, *base, *limit; + size_t i; + struct cset_converter cvt + = wide ? pfile->wide_cset_desc : pfile->narrow_cset_desc; + + tbuf.asize = MAX (OUTBUF_BLOCK_SIZE, from->len); + tbuf.text = XNEWVEC (uchar, tbuf.asize); + tbuf.len = 0; + + for (i = 0; i < count; i++) + { + p = from[i].text; + if (*p == 'L') p++; + p++; /* Skip leading quote. */ + limit = from[i].text + from[i].len - 1; /* Skip trailing quote. */ + + for (;;) + { + base = p; + while (p < limit && *p != '\\') + p++; + if (p > base) + { + /* We have a run of normal characters; these can be fed + directly to convert_cset. */ + if (!APPLY_CONVERSION (cvt, base, p - base, &tbuf)) + goto fail; + } + if (p == limit) + break; + + p = convert_escape (pfile, p + 1, limit, &tbuf, wide); + } + } + /* NUL-terminate the 'to' buffer and translate it to a cpp_string + structure. */ + emit_numeric_escape (pfile, 0, &tbuf, wide); + tbuf.text = XRESIZEVEC (uchar, tbuf.text, tbuf.len); + to->text = tbuf.text; + to->len = tbuf.len; + return true; + + fail: + cpp_errno (pfile, CPP_DL_ERROR, "converting to execution character set"); + free (tbuf.text); + return false; +} + +/* Subroutine of do_line and do_linemarker. Convert escape sequences + in a string, but do not perform character set conversion. */ +bool +cpp_interpret_string_notranslate (cpp_reader *pfile, const cpp_string *from, + size_t count, cpp_string *to, bool wide) +{ + struct cset_converter save_narrow_cset_desc = pfile->narrow_cset_desc; + bool retval; + + pfile->narrow_cset_desc.func = convert_no_conversion; + pfile->narrow_cset_desc.cd = (iconv_t) -1; + + retval = cpp_interpret_string (pfile, from, count, to, wide); + + pfile->narrow_cset_desc = save_narrow_cset_desc; + return retval; +} + + +/* Subroutine of cpp_interpret_charconst which performs the conversion + to a number, for narrow strings. STR is the string structure returned + by cpp_interpret_string. PCHARS_SEEN and UNSIGNEDP are as for + cpp_interpret_charconst. */ +static cppchar_t +narrow_str_to_charconst (cpp_reader *pfile, cpp_string str, + unsigned int *pchars_seen, int *unsignedp) +{ + size_t width = CPP_OPTION (pfile, char_precision); + size_t max_chars = CPP_OPTION (pfile, int_precision) / width; + size_t mask = width_to_mask (width); + size_t i; + cppchar_t result, c; + bool unsigned_p; + + /* The value of a multi-character character constant, or a + single-character character constant whose representation in the + execution character set is more than one byte long, is + implementation defined. This implementation defines it to be the + number formed by interpreting the byte sequence in memory as a + big-endian binary number. If overflow occurs, the high bytes are + lost, and a warning is issued. + + We don't want to process the NUL terminator handed back by + cpp_interpret_string. */ + result = 0; + for (i = 0; i < str.len - 1; i++) + { + c = str.text[i] & mask; + if (width < BITS_PER_CPPCHAR_T) + result = (result << width) | c; + else + result = c; + } + + if (i > max_chars) + { + i = max_chars; + cpp_error (pfile, CPP_DL_WARNING, + "character constant too long for its type"); + } + else if (i > 1 && CPP_OPTION (pfile, warn_multichar)) + cpp_error (pfile, CPP_DL_WARNING, "multi-character character constant"); + + /* Multichar constants are of type int and therefore signed. */ + if (i > 1) + unsigned_p = 0; + else + unsigned_p = CPP_OPTION (pfile, unsigned_char); + + /* Truncate the constant to its natural width, and simultaneously + sign- or zero-extend to the full width of cppchar_t. + For single-character constants, the value is WIDTH bits wide. + For multi-character constants, the value is INT_PRECISION bits wide. */ + if (i > 1) + width = CPP_OPTION (pfile, int_precision); + if (width < BITS_PER_CPPCHAR_T) + { + mask = ((cppchar_t) 1 << width) - 1; + if (unsigned_p || !(result & (1 << (width - 1)))) + result &= mask; + else + result |= ~mask; + } + *pchars_seen = i; + *unsignedp = unsigned_p; + return result; +} + +/* Subroutine of cpp_interpret_charconst which performs the conversion + to a number, for wide strings. STR is the string structure returned + by cpp_interpret_string. PCHARS_SEEN and UNSIGNEDP are as for + cpp_interpret_charconst. */ +static cppchar_t +wide_str_to_charconst (cpp_reader *pfile, cpp_string str, + unsigned int *pchars_seen, int *unsignedp) +{ + bool bigend = CPP_OPTION (pfile, bytes_big_endian); + size_t width = CPP_OPTION (pfile, wchar_precision); + size_t cwidth = CPP_OPTION (pfile, char_precision); + size_t mask = width_to_mask (width); + size_t cmask = width_to_mask (cwidth); + size_t nbwc = width / cwidth; + size_t off, i; + cppchar_t result = 0, c; + + /* This is finicky because the string is in the target's byte order, + which may not be our byte order. Only the last character, ignoring + the NUL terminator, is relevant. */ + off = str.len - (nbwc * 2); + result = 0; + for (i = 0; i < nbwc; i++) + { + c = bigend ? str.text[off + i] : str.text[off + nbwc - i - 1]; + result = (result << cwidth) | (c & cmask); + } + + /* Wide character constants have type wchar_t, and a single + character exactly fills a wchar_t, so a multi-character wide + character constant is guaranteed to overflow. */ + if (off > 0) + cpp_error (pfile, CPP_DL_WARNING, + "character constant too long for its type"); + + /* Truncate the constant to its natural width, and simultaneously + sign- or zero-extend to the full width of cppchar_t. */ + if (width < BITS_PER_CPPCHAR_T) + { + if (CPP_OPTION (pfile, unsigned_wchar) || !(result & (1 << (width - 1)))) + result &= mask; + else + result |= ~mask; + } + + *unsignedp = CPP_OPTION (pfile, unsigned_wchar); + *pchars_seen = 1; + return result; +} + +/* Interpret a (possibly wide) character constant in TOKEN. + PCHARS_SEEN points to a variable that is filled in with the number + of characters seen, and UNSIGNEDP to a variable that indicates + whether the result has signed type. */ +cppchar_t +cpp_interpret_charconst (cpp_reader *pfile, const cpp_token *token, + unsigned int *pchars_seen, int *unsignedp) +{ + cpp_string str = { 0, 0 }; + bool wide = (token->type == CPP_WCHAR); + cppchar_t result; + + /* an empty constant will appear as L'' or '' */ + if (token->val.str.len == (size_t) (2 + wide)) + { + cpp_error (pfile, CPP_DL_ERROR, "empty character constant"); + return 0; + } + else if (!cpp_interpret_string (pfile, &token->val.str, 1, &str, wide)) + return 0; + + if (wide) + result = wide_str_to_charconst (pfile, str, pchars_seen, unsignedp); + else + result = narrow_str_to_charconst (pfile, str, pchars_seen, unsignedp); + + if (str.text != token->val.str.text) + free ((void *)str.text); + + return result; +} + +/* Convert an identifier denoted by ID and LEN, which might contain + UCN escapes, to the source character set, either UTF-8 or + UTF-EBCDIC. Assumes that the identifier is actually a valid identifier. */ +cpp_hashnode * +_cpp_interpret_identifier (cpp_reader *pfile, const uchar *id, size_t len) +{ + /* It turns out that a UCN escape always turns into fewer characters + than the escape itself, so we can allocate a temporary in advance. */ + uchar * buf = (uchar *) alloca (len + 1); + uchar * bufp = buf; + size_t idp; + + for (idp = 0; idp < len; idp++) + if (id[idp] != '\\') + *bufp++ = id[idp]; + else + { + unsigned length = id[idp+1] == 'u' ? 4 : 8; + cppchar_t value = 0; + size_t bufleft = len - (bufp - buf); + int rval; + + idp += 2; + while (length && idp < len && ISXDIGIT (id[idp])) + { + value = (value << 4) + hex_value (id[idp]); + idp++; + length--; + } + idp--; + + /* Special case for EBCDIC: if the identifier contains + a '$' specified using a UCN, translate it to EBCDIC. */ + if (value == 0x24) + { + *bufp++ = '$'; + continue; + } + + rval = one_cppchar_to_utf8 (value, &bufp, &bufleft); + if (rval) + { + errno = rval; + cpp_errno (pfile, CPP_DL_ERROR, + "converting UCN to source character set"); + break; + } + } + + return CPP_HASHNODE (ht_lookup (pfile->hash_table, + buf, bufp - buf, HT_ALLOC)); +} + +/* Convert an input buffer (containing the complete contents of one + source file) from INPUT_CHARSET to the source character set. INPUT + points to the input buffer, SIZE is its allocated size, and LEN is + the length of the meaningful data within the buffer. The + translated buffer is returned, and *ST_SIZE is set to the length of + the meaningful data within the translated buffer. + + INPUT is expected to have been allocated with xmalloc. This function + will either return INPUT, or free it and return a pointer to another + xmalloc-allocated block of memory. */ +uchar * +_cpp_convert_input (cpp_reader *pfile, const char *input_charset, + uchar *input, size_t size, size_t len, off_t *st_size) +{ + struct cset_converter input_cset; + struct _cpp_strbuf to; + + input_cset = init_iconv_desc (pfile, SOURCE_CHARSET, input_charset); + if (input_cset.func == convert_no_conversion) + { + to.text = input; + to.asize = size; + to.len = len; + } + else + { + to.asize = MAX (65536, len); + to.text = XNEWVEC (uchar, to.asize); + to.len = 0; + + if (!APPLY_CONVERSION (input_cset, input, len, &to)) + cpp_error (pfile, CPP_DL_ERROR, + "failure to convert %s to %s", + CPP_OPTION (pfile, input_charset), SOURCE_CHARSET); + + free (input); + } + + /* Clean up the mess. */ + if (input_cset.func == convert_using_iconv) + iconv_close (input_cset.cd); + + /* Resize buffer if we allocated substantially too much, or if we + haven't enough space for the \n-terminator. */ + if (to.len + 4096 < to.asize || to.len >= to.asize) + to.text = XRESIZEVEC (uchar, to.text, to.len + 1); + + /* If the file is using old-school Mac line endings (\r only), + terminate with another \r, not an \n, so that we do not mistake + the \r\n sequence for a single DOS line ending and erroneously + issue the "No newline at end of file" diagnostic. */ + if (to.len && to.text[to.len - 1] == '\r') + to.text[to.len] = '\r'; + else + to.text[to.len] = '\n'; + + *st_size = to.len; + return to.text; +} + +/* Decide on the default encoding to assume for input files. */ +const char * +_cpp_default_encoding (void) +{ + const char *current_encoding = NULL; + + /* We disable this because the default codeset is 7-bit ASCII on + most platforms, and this causes conversion failures on every + file in GCC that happens to have one of the upper 128 characters + in it -- most likely, as part of the name of a contributor. + We should definitely recognize in-band markers of file encoding, + like: + - the appropriate Unicode byte-order mark (FE FF) to recognize + UTF16 and UCS4 (in both big-endian and little-endian flavors) + and UTF8 + - a "#i", "#d", "/ *", "//", " #p" or "#p" (for #pragma) to + distinguish ASCII and EBCDIC. + - now we can parse something like "#pragma GCC encoding + on the first line, or even Emacs/VIM's mode line tags (there's + a problem here in that VIM uses the last line, and Emacs has + its more elaborate "local variables" convention). + - investigate whether Java has another common convention, which + would be friendly to support. + (Zack Weinberg and Paolo Bonzini, May 20th 2004) */ +#if defined (HAVE_LOCALE_H) && defined (HAVE_LANGINFO_CODESET) && 0 + setlocale (LC_CTYPE, ""); + current_encoding = nl_langinfo (CODESET); +#endif + if (current_encoding == NULL || *current_encoding == '\0') + current_encoding = SOURCE_CHARSET; + + return current_encoding; +} diff --git a/support/cpp/libcpp/directives.c b/support/cpp/libcpp/directives.c new file mode 100644 index 0000000..89bf610 --- /dev/null +++ b/support/cpp/libcpp/directives.c @@ -0,0 +1,2311 @@ +/* CPP Library. (Directive handling.) + Copyright (C) 1986, 1987, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, + 1999, 2000, 2001, 2002, 2003, 2004, 2005, + 2007, 2008 Free Software Foundation, Inc. + Contributed by Per Bothner, 1994-95. + Based on CCCP program by Paul Rubin, June 1986 + Adapted to ANSI C, Richard Stallman, Jan 1987 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ + +#include "config.h" +#include "system.h" +#include "cpplib.h" +#include "internal.h" +#include "mkdeps.h" +#include "obstack.h" + +/* Stack of conditionals currently in progress + (including both successful and failing conditionals). */ +struct if_stack +{ + struct if_stack *next; + unsigned int line; /* Line where condition started. */ + const cpp_hashnode *mi_cmacro;/* macro name for #ifndef around entire file */ + bool skip_elses; /* Can future #else / #elif be skipped? */ + bool was_skipping; /* If were skipping on entry. */ + int type; /* Most recent conditional for diagnostics. */ +}; + +/* Contains a registered pragma or pragma namespace. */ +typedef void (*pragma_cb) (cpp_reader *); +struct pragma_entry +{ + struct pragma_entry *next; + const cpp_hashnode *pragma; /* Name and length. */ + bool is_nspace; + bool is_internal; + bool is_deferred; + bool allow_expansion; + union { + pragma_cb handler; + struct pragma_entry *space; + unsigned int ident; + } u; +}; + +/* Values for the origin field of struct directive. KANDR directives + come from traditional (K&R) C. STDC89 directives come from the + 1989 C standard. EXTENSION directives are extensions. */ +#define KANDR 0 +#define STDC89 1 +#define EXTENSION 2 + +/* Values for the flags field of struct directive. COND indicates a + conditional; IF_COND an opening conditional. INCL means to treat + "..." and <...> as q-char and h-char sequences respectively. IN_I + means this directive should be handled even if -fpreprocessed is in + effect (these are the directives with callback hooks). + + EXPAND is set on directives that are always macro-expanded. */ +#define COND (1 << 0) +#define IF_COND (1 << 1) +#define INCL (1 << 2) +#define IN_I (1 << 3) +#define EXPAND (1 << 4) + +/* Defines one #-directive, including how to handle it. */ +typedef void (*directive_handler) (cpp_reader *); +typedef struct directive directive; +struct directive +{ + directive_handler handler; /* Function to handle directive. */ + const uchar *name; /* Name of directive. */ + unsigned short length; /* Length of name. */ + unsigned char origin; /* Origin of directive. */ + unsigned char flags; /* Flags describing this directive. */ +}; + +/* Forward declarations. */ + +static void skip_rest_of_line (cpp_reader *); +static void check_eol (cpp_reader *); +static void start_directive (cpp_reader *); +static void prepare_directive_trad (cpp_reader *); +static void end_directive (cpp_reader *, int); +static void directive_diagnostics (cpp_reader *, const directive *, int); +static void run_directive (cpp_reader *, int, const char *, size_t); +static char *glue_header_name (cpp_reader *); +static const char *parse_include (cpp_reader *, int *, const cpp_token ***); +static void push_conditional (cpp_reader *, int, int, const cpp_hashnode *); +static unsigned int read_flag (cpp_reader *, unsigned int); +static int strtoul_for_line (const uchar *, unsigned int, unsigned long *); +static void do_diagnostic (cpp_reader *, int, int); +static cpp_hashnode *lex_macro_node (cpp_reader *, bool); +static int undefine_macros (cpp_reader *, cpp_hashnode *, void *); +static void do_include_common (cpp_reader *, enum include_type); +static struct pragma_entry *lookup_pragma_entry (struct pragma_entry *, + const cpp_hashnode *); +static int count_registered_pragmas (struct pragma_entry *); +static char ** save_registered_pragmas (struct pragma_entry *, char **); +static char ** restore_registered_pragmas (cpp_reader *, struct pragma_entry *, + char **); +static void do_pragma_once (cpp_reader *); +static void do_pragma_poison (cpp_reader *); +static void do_pragma_system_header (cpp_reader *); +static void do_pragma_dependency (cpp_reader *); +static void do_linemarker (cpp_reader *); +static const cpp_token *get_token_no_padding (cpp_reader *); +static const cpp_token *get__Pragma_string (cpp_reader *); +static void destringize_and_run (cpp_reader *, const cpp_string *); +static int parse_answer (cpp_reader *, struct answer **, int); +static cpp_hashnode *parse_assertion (cpp_reader *, struct answer **, int); +static struct answer ** find_answer (cpp_hashnode *, const struct answer *); +static void handle_assertion (cpp_reader *, const char *, int); + +/* This is the table of directive handlers. It is ordered by + frequency of occurrence; the numbers at the end are directive + counts from all the source code I have lying around (egcs and libc + CVS as of 1999-05-18, plus grub-0.5.91, linux-2.2.9, and + pcmcia-cs-3.0.9). This is no longer important as directive lookup + is now O(1). All extensions other than #warning and #include_next + are deprecated. The name is where the extension appears to have + come from. */ + +#define DIRECTIVE_TABLE \ +D(define, T_DEFINE = 0, KANDR, IN_I) /* 270554 */ \ +D(include, T_INCLUDE, KANDR, INCL | EXPAND) /* 52262 */ \ +D(endif, T_ENDIF, KANDR, COND) /* 45855 */ \ +D(ifdef, T_IFDEF, KANDR, COND | IF_COND) /* 22000 */ \ +D(if, T_IF, KANDR, COND | IF_COND | EXPAND) /* 18162 */ \ +D(else, T_ELSE, KANDR, COND) /* 9863 */ \ +D(ifndef, T_IFNDEF, KANDR, COND | IF_COND) /* 9675 */ \ +D(undef, T_UNDEF, KANDR, IN_I) /* 4837 */ \ +D(line, T_LINE, KANDR, EXPAND) /* 2465 */ \ +D(elif, T_ELIF, STDC89, COND | EXPAND) /* 610 */ \ +D(error, T_ERROR, STDC89, 0) /* 475 */ \ +D(pragma, T_PRAGMA, STDC89, IN_I) /* 195 */ \ +D(warning, T_WARNING, EXTENSION, 0) /* 22 */ \ +D(include_next, T_INCLUDE_NEXT, EXTENSION, INCL | EXPAND) /* 19 */ \ +D(ident, T_IDENT, EXTENSION, IN_I) /* 11 */ \ +D(import, T_IMPORT, EXTENSION, INCL | EXPAND) /* 0 ObjC */ \ +D(assert, T_ASSERT, EXTENSION, 0) /* 0 SVR4 */ \ +D(unassert, T_UNASSERT, EXTENSION, 0) /* 0 SVR4 */ \ +D(sccs, T_SCCS, EXTENSION, IN_I) /* 0 SVR4? */ + +/* #sccs is synonymous with #ident. */ +#define do_sccs do_ident + +/* Use the table to generate a series of prototypes, an enum for the + directive names, and an array of directive handlers. */ + +#define D(name, t, o, f) static void do_##name (cpp_reader *); +DIRECTIVE_TABLE +#undef D + +#define D(n, tag, o, f) tag, +enum +{ + DIRECTIVE_TABLE + N_DIRECTIVES +}; +#undef D + +#define D(name, t, origin, flags) \ +{ do_##name, (const uchar *) #name, \ + sizeof #name - 1, origin, flags }, +static const directive dtable[] = +{ +DIRECTIVE_TABLE +}; +#undef D +#undef DIRECTIVE_TABLE + +/* Wrapper struct directive for linemarkers. + The origin is more or less true - the original K+R cpp + did use this notation in its preprocessed output. */ +static const directive linemarker_dir = +{ + do_linemarker, U"#", 1, KANDR, IN_I +}; + +#define SEEN_EOL() (pfile->cur_token[-1].type == CPP_EOF) + +/* Skip any remaining tokens in a directive. */ +static void +skip_rest_of_line (cpp_reader *pfile) +{ + /* Discard all stacked contexts. */ + while (pfile->context->prev) + _cpp_pop_context (pfile); + + /* Sweep up all tokens remaining on the line. */ + if (! SEEN_EOL ()) + while (_cpp_lex_token (pfile)->type != CPP_EOF) + ; +} + +/* Ensure there are no stray tokens at the end of a directive. */ +static void +check_eol (cpp_reader *pfile) +{ + if (! SEEN_EOL () && _cpp_lex_token (pfile)->type != CPP_EOF) + cpp_error (pfile, CPP_DL_PEDWARN, "extra tokens at end of #%s directive", + pfile->directive->name); +} + +/* Ensure there are no stray tokens other than comments at the end of + a directive, and gather the comments. */ +static const cpp_token ** +check_eol_return_comments (cpp_reader *pfile) +{ + size_t c; + size_t capacity = 8; + const cpp_token **buf; + + buf = XNEWVEC (const cpp_token *, capacity); + c = 0; + if (! SEEN_EOL ()) + { + while (1) + { + const cpp_token *tok; + + tok = _cpp_lex_token (pfile); + if (tok->type == CPP_EOF) + break; + if (tok->type != CPP_COMMENT) + cpp_error (pfile, CPP_DL_PEDWARN, + "extra tokens at end of #%s directive", + pfile->directive->name); + else + { + if (c + 1 >= capacity) + { + capacity *= 2; + buf = XRESIZEVEC (const cpp_token *, buf, capacity); + } + buf[c] = tok; + ++c; + } + } + } + buf[c] = NULL; + return buf; +} + +/* Called when entering a directive, _Pragma or command-line directive. */ +static void +start_directive (cpp_reader *pfile) +{ + /* Setup in-directive state. */ + pfile->state.in_directive = 1; + pfile->state.save_comments = 0; + pfile->directive_result.type = CPP_PADDING; + + /* Some handlers need the position of the # for diagnostics. */ + pfile->directive_line = pfile->line_table->highest_line; +} + +/* Called when leaving a directive, _Pragma or command-line directive. */ +static void +end_directive (cpp_reader *pfile, int skip_line) +{ + if (pfile->state.in_deferred_pragma) + ; + else if (CPP_OPTION (pfile, traditional)) + { + /* Revert change of prepare_directive_trad. */ + pfile->state.prevent_expansion--; + + if (pfile->directive != &dtable[T_DEFINE]) + _cpp_remove_overlay (pfile); + } + /* We don't skip for an assembler #. */ + else if (skip_line) + { + skip_rest_of_line (pfile); + if (!pfile->keep_tokens) + { + pfile->cur_run = &pfile->base_run; + pfile->cur_token = pfile->base_run.base; + } + } + + /* Restore state. */ + pfile->state.save_comments = ! CPP_OPTION (pfile, discard_comments); + pfile->state.in_directive = 0; + pfile->state.in_expression = 0; + pfile->state.angled_headers = 0; + pfile->directive = 0; +} + +/* Prepare to handle the directive in pfile->directive. */ +static void +prepare_directive_trad (cpp_reader *pfile) +{ + if (pfile->directive != &dtable[T_DEFINE]) + { + bool no_expand = (pfile->directive + && ! (pfile->directive->flags & EXPAND)); + bool was_skipping = pfile->state.skipping; + + pfile->state.in_expression = (pfile->directive == &dtable[T_IF] + || pfile->directive == &dtable[T_ELIF]); + if (pfile->state.in_expression) + pfile->state.skipping = false; + + if (no_expand) + pfile->state.prevent_expansion++; + _cpp_scan_out_logical_line (pfile, NULL); + if (no_expand) + pfile->state.prevent_expansion--; + + pfile->state.skipping = was_skipping; + _cpp_overlay_buffer (pfile, pfile->out.base, + pfile->out.cur - pfile->out.base); + } + + /* Stop ISO C from expanding anything. */ + pfile->state.prevent_expansion++; +} + +/* Output diagnostics for a directive DIR. INDENTED is nonzero if + the '#' was indented. */ +static void +directive_diagnostics (cpp_reader *pfile, const directive *dir, int indented) +{ + /* Issue -pedantic warnings for extensions. */ + if (CPP_PEDANTIC (pfile) + && ! pfile->state.skipping + && dir->origin == EXTENSION) + cpp_error (pfile, CPP_DL_PEDWARN, "#%s is a GCC extension", dir->name); + + /* Traditionally, a directive is ignored unless its # is in + column 1. Therefore in code intended to work with K+R + compilers, directives added by C89 must have their # + indented, and directives present in traditional C must not. + This is true even of directives in skipped conditional + blocks. #elif cannot be used at all. */ + if (CPP_WTRADITIONAL (pfile)) + { + if (dir == &dtable[T_ELIF]) + cpp_error (pfile, CPP_DL_WARNING, + "suggest not using #elif in traditional C"); + else if (indented && dir->origin == KANDR) + cpp_error (pfile, CPP_DL_WARNING, + "traditional C ignores #%s with the # indented", + dir->name); + else if (!indented && dir->origin != KANDR) + cpp_error (pfile, CPP_DL_WARNING, + "suggest hiding #%s from traditional C with an indented #", + dir->name); + } +} + +/* Check if we have a known directive. INDENTED is nonzero if the + '#' of the directive was indented. This function is in this file + to save unnecessarily exporting dtable etc. to lex.c. Returns + nonzero if the line of tokens has been handled, zero if we should + continue processing the line. */ +int +_cpp_handle_directive (cpp_reader *pfile, int indented) +{ + const directive *dir = 0; + const cpp_token *dname; + bool was_parsing_args = pfile->state.parsing_args; + bool was_discarding_output = pfile->state.discarding_output; + int skip = 1; + + if (was_discarding_output) + pfile->state.prevent_expansion = 0; + + if (was_parsing_args) + { + if (CPP_OPTION (pfile, pedantic)) + cpp_error (pfile, CPP_DL_PEDWARN, + "embedding a directive within macro arguments is not portable"); + pfile->state.parsing_args = 0; + pfile->state.prevent_expansion = 0; + } + start_directive (pfile); + dname = _cpp_lex_token (pfile); + + if (dname->type == CPP_NAME) + { + if (dname->val.node->is_directive) + dir = &dtable[dname->val.node->directive_index]; + } + /* We do not recognize the # followed by a number extension in + assembler code. */ + else if (dname->type == CPP_NUMBER && CPP_OPTION (pfile, lang) != CLK_ASM) + { + dir = &linemarker_dir; + if (CPP_PEDANTIC (pfile) && ! CPP_OPTION (pfile, preprocessed) + && ! pfile->state.skipping) + cpp_error (pfile, CPP_DL_PEDWARN, + "style of line directive is a GCC extension"); + } + + if (dir) + { + /* If we have a directive that is not an opening conditional, + invalidate any control macro. */ + if (! (dir->flags & IF_COND)) + pfile->mi_valid = false; + + /* Kluge alert. In order to be sure that code like this + + #define HASH # + HASH define foo bar + + does not cause '#define foo bar' to get executed when + compiled with -save-temps, we recognize directives in + -fpreprocessed mode only if the # is in column 1. macro.c + puts a space in front of any '#' at the start of a macro. + + We exclude the -fdirectives-only case because macro expansion + has not been performed yet, and block comments can cause spaces + to preceed the directive. */ + if (CPP_OPTION (pfile, preprocessed) + && !CPP_OPTION (pfile, directives_only) + && (indented || !(dir->flags & IN_I))) + { + skip = 0; + dir = 0; + } + else + { + /* In failed conditional groups, all non-conditional + directives are ignored. Before doing that, whether + skipping or not, we should lex angle-bracketed headers + correctly, and maybe output some diagnostics. */ + pfile->state.angled_headers = dir->flags & INCL; + pfile->state.directive_wants_padding = dir->flags & INCL; + if (! CPP_OPTION (pfile, preprocessed)) + directive_diagnostics (pfile, dir, indented); + if (pfile->state.skipping && !(dir->flags & COND)) + dir = 0; + } + } + else if (dname->type == CPP_EOF) + ; /* CPP_EOF is the "null directive". */ + else + { + /* An unknown directive. Don't complain about it in assembly + source: we don't know where the comments are, and # may + introduce assembler pseudo-ops. Don't complain about invalid + directives in skipped conditional groups (6.10 p4). */ + if (CPP_OPTION (pfile, lang) == CLK_ASM) + skip = 0; + else if (!pfile->state.skipping) + cpp_error (pfile, CPP_DL_ERROR, "invalid preprocessing directive #%s", + cpp_token_as_text (pfile, dname)); + } + + pfile->directive = dir; + if (CPP_OPTION (pfile, traditional)) + prepare_directive_trad (pfile); + + if (dir) + pfile->directive->handler (pfile); + else if (skip == 0) + _cpp_backup_tokens (pfile, 1); + + end_directive (pfile, skip); + if (was_parsing_args && !pfile->state.in_deferred_pragma) + { + /* Restore state when within macro args. */ + pfile->state.parsing_args = 2; + pfile->state.prevent_expansion = 1; + } + if (was_discarding_output) + pfile->state.prevent_expansion = 1; + return skip; +} + +/* Directive handler wrapper used by the command line option + processor. BUF is \n terminated. */ +static void +run_directive (cpp_reader *pfile, int dir_no, const char *buf, size_t count) +{ + cpp_push_buffer (pfile, (const uchar *) buf, count, + /* from_stage3 */ true); + start_directive (pfile); + + /* This is a short-term fix to prevent a leading '#' being + interpreted as a directive. */ + _cpp_clean_line (pfile); + + pfile->directive = &dtable[dir_no]; + if (CPP_OPTION (pfile, traditional)) + prepare_directive_trad (pfile); + pfile->directive->handler (pfile); + end_directive (pfile, 1); + _cpp_pop_buffer (pfile); +} + +/* Checks for validity the macro name in #define, #undef, #ifdef and + #ifndef directives. IS_DEF_OR_UNDEF is true if this call is + processing a #define or #undefine directive, and false + otherwise. */ +static cpp_hashnode * +lex_macro_node (cpp_reader *pfile, bool is_def_or_undef) +{ + const cpp_token *token = _cpp_lex_token (pfile); + + /* The token immediately after #define must be an identifier. That + identifier may not be "defined", per C99 6.10.8p4. + In C++, it may not be any of the "named operators" either, + per C++98 [lex.digraph], [lex.key]. + Finally, the identifier may not have been poisoned. (In that case + the lexer has issued the error message for us.) */ + + if (token->type == CPP_NAME) + { + cpp_hashnode *node = token->val.node; + + if (is_def_or_undef && node == pfile->spec_nodes.n_defined) + cpp_error (pfile, CPP_DL_ERROR, + "\"defined\" cannot be used as a macro name"); + else if (! (node->flags & NODE_POISONED)) + return node; + } + else if (token->flags & NAMED_OP) + cpp_error (pfile, CPP_DL_ERROR, + "\"%s\" cannot be used as a macro name as it is an operator in C++", + NODE_NAME (token->val.node)); + else if (token->type == CPP_EOF) + cpp_error (pfile, CPP_DL_ERROR, "no macro name given in #%s directive", + pfile->directive->name); + else + cpp_error (pfile, CPP_DL_ERROR, "macro names must be identifiers"); + + return NULL; +} + +/* Process a #define directive. Most work is done in macro.c. */ +static void +do_define (cpp_reader *pfile) +{ + cpp_hashnode *node = lex_macro_node (pfile, true); + + if (node) + { + /* If we have been requested to expand comments into macros, + then re-enable saving of comments. */ + pfile->state.save_comments = + ! CPP_OPTION (pfile, discard_comments_in_macro_exp); + + if (_cpp_create_definition (pfile, node)) + if (pfile->cb.define) + pfile->cb.define (pfile, pfile->directive_line, node); + } +} + +/* Handle #undef. Mark the identifier NT_VOID in the hash table. */ +static void +do_undef (cpp_reader *pfile) +{ + cpp_hashnode *node = lex_macro_node (pfile, true); + + if (node) + { + if (pfile->cb.undef) + pfile->cb.undef (pfile, pfile->directive_line, node); + + /* 6.10.3.5 paragraph 2: [#undef] is ignored if the specified + identifier is not currently defined as a macro name. */ + if (node->type == NT_MACRO) + { + if (node->flags & NODE_WARN) + cpp_error (pfile, CPP_DL_WARNING, + "undefining \"%s\"", NODE_NAME (node)); + + if (CPP_OPTION (pfile, warn_unused_macros)) + _cpp_warn_if_unused_macro (pfile, node, NULL); + + _cpp_free_definition (node); + } + } + + check_eol (pfile); +} + +/* Undefine a single macro/assertion/whatever. */ + +static int +undefine_macros (cpp_reader *pfile ATTRIBUTE_UNUSED, cpp_hashnode *h, + void *data_p ATTRIBUTE_UNUSED) +{ + /* Body of _cpp_free_definition inlined here for speed. + Macros and assertions no longer have anything to free. */ + h->type = NT_VOID; + h->flags &= ~(NODE_POISONED|NODE_BUILTIN|NODE_DISABLED); + return 1; +} + +/* Undefine all macros and assertions. */ + +void +cpp_undef_all (cpp_reader *pfile) +{ + cpp_forall_identifiers (pfile, undefine_macros, NULL); +} + + +/* Helper routine used by parse_include. Reinterpret the current line + as an h-char-sequence (< ... >); we are looking at the first token + after the <. Returns a malloced filename. */ +static char * +glue_header_name (cpp_reader *pfile) +{ + const cpp_token *token; + char *buffer; + size_t len, total_len = 0, capacity = 1024; + + /* To avoid lexed tokens overwriting our glued name, we can only + allocate from the string pool once we've lexed everything. */ + buffer = XNEWVEC (char, capacity); + for (;;) + { + token = get_token_no_padding (pfile); + + if (token->type == CPP_GREATER) + break; + if (token->type == CPP_EOF) + { + cpp_error (pfile, CPP_DL_ERROR, "missing terminating > character"); + break; + } + + len = cpp_token_len (token) + 2; /* Leading space, terminating \0. */ + if (total_len + len > capacity) + { + capacity = (capacity + len) * 2; + buffer = XRESIZEVEC (char, buffer, capacity); + } + + if (token->flags & PREV_WHITE) + buffer[total_len++] = ' '; + + total_len = (cpp_spell_token (pfile, token, (uchar *) &buffer[total_len], + true) + - (uchar *) buffer); + } + + buffer[total_len] = '\0'; + return buffer; +} + +/* Returns the file name of #include, #include_next, #import and + #pragma dependency. The string is malloced and the caller should + free it. Returns NULL on error. */ +static const char * +parse_include (cpp_reader *pfile, int *pangle_brackets, + const cpp_token ***buf) +{ + char *fname; + const cpp_token *header; + + /* Allow macro expansion. */ + header = get_token_no_padding (pfile); + if (header->type == CPP_STRING || header->type == CPP_HEADER_NAME) + { + fname = XNEWVEC (char, header->val.str.len - 1); + memcpy (fname, header->val.str.text + 1, header->val.str.len - 2); + fname[header->val.str.len - 2] = '\0'; + *pangle_brackets = header->type == CPP_HEADER_NAME; + } + else if (header->type == CPP_LESS) + { + fname = glue_header_name (pfile); + *pangle_brackets = 1; + } + else + { + const unsigned char *dir; + + if (pfile->directive == &dtable[T_PRAGMA]) + dir = U"pragma dependency"; + else + dir = pfile->directive->name; + cpp_error (pfile, CPP_DL_ERROR, "#%s expects \"FILENAME\" or ", + dir); + + return NULL; + } + + if (pfile->directive == &dtable[T_PRAGMA]) + { + /* This pragma allows extra tokens after the file name. */ + } + else if (buf == NULL || CPP_OPTION (pfile, discard_comments)) + check_eol (pfile); + else + { + /* If we are not discarding comments, then gather them while + doing the eol check. */ + *buf = check_eol_return_comments (pfile); + } + + return fname; +} + +/* Handle #include, #include_next and #import. */ +static void +do_include_common (cpp_reader *pfile, enum include_type type) +{ + const char *fname; + int angle_brackets; + const cpp_token **buf = NULL; + + /* Re-enable saving of comments if requested, so that the include + callback can dump comments which follow #include. */ + pfile->state.save_comments = ! CPP_OPTION (pfile, discard_comments); + + fname = parse_include (pfile, &angle_brackets, &buf); + if (!fname) + { + if (buf) + XDELETEVEC (buf); + return; + } + + if (!*fname) + { + cpp_error (pfile, CPP_DL_ERROR, "empty filename in #%s", + pfile->directive->name); + XDELETEVEC (fname); + if (buf) + XDELETEVEC (buf); + return; + } + + /* Prevent #include recursion. */ + if (pfile->line_table->depth >= CPP_STACK_MAX) + cpp_error (pfile, CPP_DL_ERROR, "#include nested too deeply"); + else + { + /* Get out of macro context, if we are. */ + skip_rest_of_line (pfile); + + if (pfile->cb.include) + pfile->cb.include (pfile, pfile->directive_line, + pfile->directive->name, fname, angle_brackets, + buf); + + _cpp_stack_include (pfile, fname, angle_brackets, type); + } + + XDELETEVEC (fname); + if (buf) + XDELETEVEC (buf); +} + +static void +do_include (cpp_reader *pfile) +{ + do_include_common (pfile, IT_INCLUDE); +} + +static void +do_import (cpp_reader *pfile) +{ + do_include_common (pfile, IT_IMPORT); +} + +static void +do_include_next (cpp_reader *pfile) +{ + enum include_type type = IT_INCLUDE_NEXT; + + /* If this is the primary source file, warn and use the normal + search logic. */ + if (cpp_in_primary_file (pfile)) + { + cpp_error (pfile, CPP_DL_WARNING, + "#include_next in primary source file"); + type = IT_INCLUDE; + } + do_include_common (pfile, type); +} + +/* Subroutine of do_linemarker. Read possible flags after file name. + LAST is the last flag seen; 0 if this is the first flag. Return the + flag if it is valid, 0 at the end of the directive. Otherwise + complain. */ +static unsigned int +read_flag (cpp_reader *pfile, unsigned int last) +{ + const cpp_token *token = _cpp_lex_token (pfile); + + if (token->type == CPP_NUMBER && token->val.str.len == 1) + { + unsigned int flag = token->val.str.text[0] - '0'; + + if (flag > last && flag <= 4 + && (flag != 4 || last == 3) + && (flag != 2 || last == 0)) + return flag; + } + + if (token->type != CPP_EOF) + cpp_error (pfile, CPP_DL_ERROR, "invalid flag \"%s\" in line directive", + cpp_token_as_text (pfile, token)); + return 0; +} + +/* Subroutine of do_line and do_linemarker. Convert a number in STR, + of length LEN, to binary; store it in NUMP, and return 0 if the + number was well-formed, 1 if not. Temporary, hopefully. */ +static int +strtoul_for_line (const uchar *str, unsigned int len, long unsigned int *nump) +{ + unsigned long reg = 0; + uchar c; + while (len--) + { + c = *str++; + if (!ISDIGIT (c)) + return 1; + reg *= 10; + reg += c - '0'; + } + *nump = reg; + return 0; +} + +/* Interpret #line command. + Note that the filename string (if any) is a true string constant + (escapes are interpreted), unlike in #line. */ +static void +do_line (cpp_reader *pfile) +{ + const struct line_maps *line_table = pfile->line_table; + const struct line_map *map = &line_table->maps[line_table->used - 1]; + + /* skip_rest_of_line() may cause line table to be realloc()ed so note down + sysp right now. */ + + unsigned char map_sysp = map->sysp; + const cpp_token *token; + const char *new_file = map->to_file; + unsigned long new_lineno; + + /* C99 raised the minimum limit on #line numbers. */ + unsigned int cap = CPP_OPTION (pfile, c99) ? 2147483647 : 32767; + + /* #line commands expand macros. */ + token = cpp_get_token (pfile); + if (token->type != CPP_NUMBER + || strtoul_for_line (token->val.str.text, token->val.str.len, + &new_lineno)) + { + if (token->type == CPP_EOF) + cpp_error (pfile, CPP_DL_ERROR, "unexpected end of file after #line"); + else + cpp_error (pfile, CPP_DL_ERROR, + "\"%s\" after #line is not a positive integer", + cpp_token_as_text (pfile, token)); + return; + } + + if (CPP_PEDANTIC (pfile) && (new_lineno == 0 || new_lineno > cap)) + cpp_error (pfile, CPP_DL_PEDWARN, "line number out of range"); + + token = cpp_get_token (pfile); + if (token->type == CPP_STRING) + { + cpp_string s = { 0, 0 }; + if (cpp_interpret_string_notranslate (pfile, &token->val.str, 1, + &s, false)) + new_file = (const char *)s.text; + check_eol (pfile); + } + else if (token->type != CPP_EOF) + { + cpp_error (pfile, CPP_DL_ERROR, "\"%s\" is not a valid filename", + cpp_token_as_text (pfile, token)); + return; + } + + skip_rest_of_line (pfile); + _cpp_do_file_change (pfile, LC_RENAME, new_file, new_lineno, + map_sysp); +} + +/* Interpret the # 44 "file" [flags] notation, which has slightly + different syntax and semantics from #line: Flags are allowed, + and we never complain about the line number being too big. */ +static void +do_linemarker (cpp_reader *pfile) +{ + const struct line_maps *line_table = pfile->line_table; + const struct line_map *map = &line_table->maps[line_table->used - 1]; + const cpp_token *token; + const char *new_file = map->to_file; + unsigned long new_lineno; + unsigned int new_sysp = map->sysp; + enum lc_reason reason = LC_RENAME; + int flag; + + /* Back up so we can get the number again. Putting this in + _cpp_handle_directive risks two calls to _cpp_backup_tokens in + some circumstances, which can segfault. */ + _cpp_backup_tokens (pfile, 1); + + /* #line commands expand macros. */ + token = cpp_get_token (pfile); + if (token->type != CPP_NUMBER + || strtoul_for_line (token->val.str.text, token->val.str.len, + &new_lineno)) + { + /* Unlike #line, there does not seem to be a way to get an EOF + here. So, it should be safe to always spell the token. */ + cpp_error (pfile, CPP_DL_ERROR, + "\"%s\" after # is not a positive integer", + cpp_token_as_text (pfile, token)); + return; + } + + token = cpp_get_token (pfile); + if (token->type == CPP_STRING) + { + cpp_string s = { 0, 0 }; + if (cpp_interpret_string_notranslate (pfile, &token->val.str, + 1, &s, false)) + new_file = (const char *)s.text; + + new_sysp = 0; + flag = read_flag (pfile, 0); + if (flag == 1) + { + reason = LC_ENTER; + /* Fake an include for cpp_included (). */ + _cpp_fake_include (pfile, new_file); + flag = read_flag (pfile, flag); + } + else if (flag == 2) + { + reason = LC_LEAVE; + flag = read_flag (pfile, flag); + } + if (flag == 3) + { + new_sysp = 1; + flag = read_flag (pfile, flag); + if (flag == 4) + new_sysp = 2; + } + pfile->buffer->sysp = new_sysp; + + check_eol (pfile); + } + else if (token->type != CPP_EOF) + { + cpp_error (pfile, CPP_DL_ERROR, "\"%s\" is not a valid filename", + cpp_token_as_text (pfile, token)); + return; + } + + skip_rest_of_line (pfile); + _cpp_do_file_change (pfile, reason, new_file, new_lineno, new_sysp); +} + +/* Arrange the file_change callback. pfile->line has changed to + FILE_LINE of TO_FILE, for reason REASON. SYSP is 1 for a system + header, 2 for a system header that needs to be extern "C" protected, + and zero otherwise. */ +void +_cpp_do_file_change (cpp_reader *pfile, enum lc_reason reason, + const char *to_file, unsigned int file_line, + unsigned int sysp) +{ + const struct line_map *map = linemap_add (pfile->line_table, reason, sysp, + to_file, file_line); + if (map != NULL) + linemap_line_start (pfile->line_table, map->to_line, 127); + + if (pfile->cb.file_change) + pfile->cb.file_change (pfile, map); +} + +/* Report a warning or error detected by the program we are + processing. Use the directive's tokens in the error message. */ +static void +do_diagnostic (cpp_reader *pfile, int code, int print_dir) +{ + if (_cpp_begin_message (pfile, code, pfile->cur_token[-1].src_loc, 0)) + { + if (print_dir) + fprintf (stderr, "#%s ", pfile->directive->name); + pfile->state.prevent_expansion++; + cpp_output_line (pfile, stderr); + pfile->state.prevent_expansion--; + } +} + +static void +do_error (cpp_reader *pfile) +{ + do_diagnostic (pfile, CPP_DL_ERROR, 1); +} + +static void +do_warning (cpp_reader *pfile) +{ + /* We want #warning diagnostics to be emitted in system headers too. */ + do_diagnostic (pfile, CPP_DL_WARNING_SYSHDR, 1); +} + +/* Report program identification. */ +static void +do_ident (cpp_reader *pfile) +{ + const cpp_token *str = cpp_get_token (pfile); + + if (str->type != CPP_STRING) + cpp_error (pfile, CPP_DL_ERROR, "invalid #%s directive", + pfile->directive->name); + else if (pfile->cb.ident) + pfile->cb.ident (pfile, pfile->directive_line, &str->val.str); + + check_eol (pfile); +} + +/* Lookup a PRAGMA name in a singly-linked CHAIN. Returns the + matching entry, or NULL if none is found. The returned entry could + be the start of a namespace chain, or a pragma. */ +static struct pragma_entry * +lookup_pragma_entry (struct pragma_entry *chain, const cpp_hashnode *pragma) +{ + while (chain && chain->pragma != pragma) + chain = chain->next; + + return chain; +} + +/* Create and insert a blank pragma entry at the beginning of a + singly-linked CHAIN. */ +static struct pragma_entry * +new_pragma_entry (cpp_reader *pfile, struct pragma_entry **chain) +{ + struct pragma_entry *new_entry; + + new_entry = (struct pragma_entry *) + _cpp_aligned_alloc (pfile, sizeof (struct pragma_entry)); + + memset (new_entry, 0, sizeof (struct pragma_entry)); + new_entry->next = *chain; + + *chain = new_entry; + return new_entry; +} + +/* Register a pragma NAME in namespace SPACE. If SPACE is null, it + goes in the global namespace. */ +static struct pragma_entry * +register_pragma_1 (cpp_reader *pfile, const char *space, const char *name, + bool allow_name_expansion) +{ + struct pragma_entry **chain = &pfile->pragmas; + struct pragma_entry *entry; + const cpp_hashnode *node; + + if (space) + { + node = cpp_lookup (pfile, U space, strlen (space)); + entry = lookup_pragma_entry (*chain, node); + if (!entry) + { + entry = new_pragma_entry (pfile, chain); + entry->pragma = node; + entry->is_nspace = true; + entry->allow_expansion = allow_name_expansion; + } + else if (!entry->is_nspace) + goto clash; + else if (entry->allow_expansion != allow_name_expansion) + { + cpp_error (pfile, CPP_DL_ICE, + "registering pragmas in namespace \"%s\" with mismatched " + "name expansion", space); + return NULL; + } + chain = &entry->u.space; + } + else if (allow_name_expansion) + { + cpp_error (pfile, CPP_DL_ICE, + "registering pragma \"%s\" with name expansion " + "and no namespace", name); + return NULL; + } + + /* Check for duplicates. */ + node = cpp_lookup (pfile, U name, strlen (name)); + entry = lookup_pragma_entry (*chain, node); + if (entry == NULL) + { + entry = new_pragma_entry (pfile, chain); + entry->pragma = node; + return entry; + } + + if (entry->is_nspace) + clash: + cpp_error (pfile, CPP_DL_ICE, + "registering \"%s\" as both a pragma and a pragma namespace", + NODE_NAME (node)); + else if (space) + cpp_error (pfile, CPP_DL_ICE, "#pragma %s %s is already registered", + space, name); + else + cpp_error (pfile, CPP_DL_ICE, "#pragma %s is already registered", name); + + return NULL; +} + +/* Register a cpplib internal pragma SPACE NAME with HANDLER. */ +static void +register_pragma_internal (cpp_reader *pfile, const char *space, + const char *name, pragma_cb handler) +{ + struct pragma_entry *entry; + + entry = register_pragma_1 (pfile, space, name, false); + entry->is_internal = true; + entry->u.handler = handler; +} + +/* Register a pragma NAME in namespace SPACE. If SPACE is null, it + goes in the global namespace. HANDLER is the handler it will call, + which must be non-NULL. If ALLOW_EXPANSION is set, allow macro + expansion while parsing pragma NAME. This function is exported + from libcpp. */ +void +cpp_register_pragma (cpp_reader *pfile, const char *space, const char *name, + pragma_cb handler, bool allow_expansion) +{ + struct pragma_entry *entry; + + if (!handler) + { + cpp_error (pfile, CPP_DL_ICE, "registering pragma with NULL handler"); + return; + } + + entry = register_pragma_1 (pfile, space, name, false); + if (entry) + { + entry->allow_expansion = allow_expansion; + entry->u.handler = handler; + } +} + +/* Similarly, but create mark the pragma for deferred processing. + When found, a CPP_PRAGMA token will be insertted into the stream + with IDENT in the token->u.pragma slot. */ +void +cpp_register_deferred_pragma (cpp_reader *pfile, const char *space, + const char *name, unsigned int ident, + bool allow_expansion, bool allow_name_expansion) +{ + struct pragma_entry *entry; + + entry = register_pragma_1 (pfile, space, name, allow_name_expansion); + if (entry) + { + entry->is_deferred = true; + entry->allow_expansion = allow_expansion; + entry->u.ident = ident; + } +} + +/* Register the pragmas the preprocessor itself handles. */ +void +_cpp_init_internal_pragmas (cpp_reader *pfile) +{ + /* Pragmas in the global namespace. */ + register_pragma_internal (pfile, 0, "once", do_pragma_once); + + /* New GCC-specific pragmas should be put in the GCC namespace. */ + register_pragma_internal (pfile, "GCC", "poison", do_pragma_poison); + register_pragma_internal (pfile, "GCC", "system_header", + do_pragma_system_header); + register_pragma_internal (pfile, "GCC", "dependency", do_pragma_dependency); +} + +/* Return the number of registered pragmas in PE. */ + +static int +count_registered_pragmas (struct pragma_entry *pe) +{ + int ct = 0; + for (; pe != NULL; pe = pe->next) + { + if (pe->is_nspace) + ct += count_registered_pragmas (pe->u.space); + ct++; + } + return ct; +} + +/* Save into SD the names of the registered pragmas referenced by PE, + and return a pointer to the next free space in SD. */ + +static char ** +save_registered_pragmas (struct pragma_entry *pe, char **sd) +{ + for (; pe != NULL; pe = pe->next) + { + if (pe->is_nspace) + sd = save_registered_pragmas (pe->u.space, sd); + *sd++ = (char *) xmemdup (HT_STR (&pe->pragma->ident), + HT_LEN (&pe->pragma->ident), + HT_LEN (&pe->pragma->ident) + 1); + } + return sd; +} + +/* Return a newly-allocated array which saves the names of the + registered pragmas. */ + +char ** +_cpp_save_pragma_names (cpp_reader *pfile) +{ + int ct = count_registered_pragmas (pfile->pragmas); + char **result = XNEWVEC (char *, ct); + (void) save_registered_pragmas (pfile->pragmas, result); + return result; +} + +/* Restore from SD the names of the registered pragmas referenced by PE, + and return a pointer to the next unused name in SD. */ + +static char ** +restore_registered_pragmas (cpp_reader *pfile, struct pragma_entry *pe, + char **sd) +{ + for (; pe != NULL; pe = pe->next) + { + if (pe->is_nspace) + sd = restore_registered_pragmas (pfile, pe->u.space, sd); + pe->pragma = cpp_lookup (pfile, U *sd, strlen (*sd)); + free (*sd); + sd++; + } + return sd; +} + +/* Restore the names of the registered pragmas from SAVED. */ + +void +_cpp_restore_pragma_names (cpp_reader *pfile, char **saved) +{ + (void) restore_registered_pragmas (pfile, pfile->pragmas, saved); + free (saved); +} + +/* Pragmata handling. We handle some, and pass the rest on to the + front end. C99 defines three pragmas and says that no macro + expansion is to be performed on them; whether or not macro + expansion happens for other pragmas is implementation defined. + This implementation allows for a mix of both, since GCC did not + traditionally macro expand its (few) pragmas, whereas OpenMP + specifies that macro expansion should happen. */ +static void +do_pragma (cpp_reader *pfile) +{ + const struct pragma_entry *p = NULL; + const cpp_token *token, *pragma_token = pfile->cur_token; + cpp_token ns_token; + unsigned int count = 1; + + pfile->state.prevent_expansion++; + + token = cpp_get_token (pfile); + ns_token = *token; + if (token->type == CPP_NAME) + { + p = lookup_pragma_entry (pfile->pragmas, token->val.node); + if (p && p->is_nspace) + { + bool allow_name_expansion = p->allow_expansion; + if (allow_name_expansion) + pfile->state.prevent_expansion--; + token = cpp_get_token (pfile); + if (token->type == CPP_NAME) + p = lookup_pragma_entry (p->u.space, token->val.node); + else + p = NULL; + if (allow_name_expansion) + pfile->state.prevent_expansion++; + count = 2; + } + } + + if (p) + { + if (p->is_deferred) + { + pfile->directive_result.src_loc = pragma_token->src_loc; + pfile->directive_result.type = CPP_PRAGMA; + pfile->directive_result.flags = pragma_token->flags; + pfile->directive_result.val.pragma = p->u.ident; + pfile->state.in_deferred_pragma = true; + pfile->state.pragma_allow_expansion = p->allow_expansion; + if (!p->allow_expansion) + pfile->state.prevent_expansion++; + } + else + { + /* Since the handler below doesn't get the line number, that + it might need for diagnostics, make sure it has the right + numbers in place. */ + if (pfile->cb.line_change) + (*pfile->cb.line_change) (pfile, pragma_token, false); + if (p->allow_expansion) + pfile->state.prevent_expansion--; + (*p->u.handler) (pfile); + if (p->allow_expansion) + pfile->state.prevent_expansion++; + } + } + else if (pfile->cb.def_pragma) + { + if (count == 1 || pfile->context->prev == NULL) + _cpp_backup_tokens (pfile, count); + else + { + /* Invalid name comes from macro expansion, _cpp_backup_tokens + won't allow backing 2 tokens. */ + /* ??? The token buffer is leaked. Perhaps if def_pragma hook + reads both tokens, we could perhaps free it, but if it doesn't, + we don't know the exact lifespan. */ + cpp_token *toks = XNEWVEC (cpp_token, 2); + toks[0] = ns_token; + toks[0].flags |= NO_EXPAND; + toks[1] = *token; + toks[1].flags |= NO_EXPAND; + _cpp_push_token_context (pfile, NULL, toks, 2); + } + pfile->cb.def_pragma (pfile, pfile->directive_line); + } + + pfile->state.prevent_expansion--; +} + +/* Handle #pragma once. */ +static void +do_pragma_once (cpp_reader *pfile) +{ + if (cpp_in_primary_file (pfile)) + cpp_error (pfile, CPP_DL_WARNING, "#pragma once in main file"); + + check_eol (pfile); + _cpp_mark_file_once_only (pfile, pfile->buffer->file); +} + +/* Handle #pragma GCC poison, to poison one or more identifiers so + that the lexer produces a hard error for each subsequent usage. */ +static void +do_pragma_poison (cpp_reader *pfile) +{ + const cpp_token *tok; + cpp_hashnode *hp; + + pfile->state.poisoned_ok = 1; + for (;;) + { + tok = _cpp_lex_token (pfile); + if (tok->type == CPP_EOF) + break; + if (tok->type != CPP_NAME) + { + cpp_error (pfile, CPP_DL_ERROR, + "invalid #pragma GCC poison directive"); + break; + } + + hp = tok->val.node; + if (hp->flags & NODE_POISONED) + continue; + + if (hp->type == NT_MACRO) + cpp_error (pfile, CPP_DL_WARNING, "poisoning existing macro \"%s\"", + NODE_NAME (hp)); + _cpp_free_definition (hp); + hp->flags |= NODE_POISONED | NODE_DIAGNOSTIC; + } + pfile->state.poisoned_ok = 0; +} + +/* Mark the current header as a system header. This will suppress + some categories of warnings (notably those from -pedantic). It is + intended for use in system libraries that cannot be implemented in + conforming C, but cannot be certain that their headers appear in a + system include directory. To prevent abuse, it is rejected in the + primary source file. */ +static void +do_pragma_system_header (cpp_reader *pfile) +{ + if (cpp_in_primary_file (pfile)) + cpp_error (pfile, CPP_DL_WARNING, + "#pragma system_header ignored outside include file"); + else + { + check_eol (pfile); + skip_rest_of_line (pfile); + cpp_make_system_header (pfile, 1, 0); + } +} + +/* Check the modified date of the current include file against a specified + file. Issue a diagnostic, if the specified file is newer. We use this to + determine if a fixed header should be refixed. */ +static void +do_pragma_dependency (cpp_reader *pfile) +{ + const char *fname; + int angle_brackets, ordering; + + fname = parse_include (pfile, &angle_brackets, NULL); + if (!fname) + return; + + ordering = _cpp_compare_file_date (pfile, fname, angle_brackets); + if (ordering < 0) + cpp_error (pfile, CPP_DL_WARNING, "cannot find source file %s", fname); + else if (ordering > 0) + { + cpp_error (pfile, CPP_DL_WARNING, + "current file is older than %s", fname); + if (cpp_get_token (pfile)->type != CPP_EOF) + { + _cpp_backup_tokens (pfile, 1); + do_diagnostic (pfile, CPP_DL_WARNING, 0); + } + } + + free ((void *) fname); +} + +/* Get a token but skip padding. */ +static const cpp_token * +get_token_no_padding (cpp_reader *pfile) +{ + for (;;) + { + const cpp_token *result = cpp_get_token (pfile); + if (result->type != CPP_PADDING) + return result; + } +} + +/* Check syntax is "(string-literal)". Returns the string on success, + or NULL on failure. */ +static const cpp_token * +get__Pragma_string (cpp_reader *pfile) +{ + const cpp_token *string; + const cpp_token *paren; + + paren = get_token_no_padding (pfile); + if (paren->type == CPP_EOF) + _cpp_backup_tokens (pfile, 1); + if (paren->type != CPP_OPEN_PAREN) + return NULL; + + string = get_token_no_padding (pfile); + if (string->type == CPP_EOF) + _cpp_backup_tokens (pfile, 1); + if (string->type != CPP_STRING && string->type != CPP_WSTRING) + return NULL; + + paren = get_token_no_padding (pfile); + if (paren->type == CPP_EOF) + _cpp_backup_tokens (pfile, 1); + if (paren->type != CPP_CLOSE_PAREN) + return NULL; + + return string; +} + +/* Destringize IN into a temporary buffer, by removing the first \ of + \" and \\ sequences, and process the result as a #pragma directive. */ +static void +destringize_and_run (cpp_reader *pfile, const cpp_string *in) +{ + const unsigned char *src, *limit; + char *dest, *result; + cpp_context *saved_context; + cpp_token *saved_cur_token; + tokenrun *saved_cur_run; + cpp_token *toks; + int count; + + dest = result = (char *) alloca (in->len - 1); + src = in->text + 1 + (in->text[0] == 'L'); + limit = in->text + in->len - 1; + while (src < limit) + { + /* We know there is a character following the backslash. */ + if (*src == '\\' && (src[1] == '\\' || src[1] == '"')) + src++; + *dest++ = *src++; + } + *dest = '\n'; + + /* Ugh; an awful kludge. We are really not set up to be lexing + tokens when in the middle of a macro expansion. Use a new + context to force cpp_get_token to lex, and so skip_rest_of_line + doesn't go beyond the end of the text. Also, remember the + current lexing position so we can return to it later. + + Something like line-at-a-time lexing should remove the need for + this. */ + saved_context = pfile->context; + saved_cur_token = pfile->cur_token; + saved_cur_run = pfile->cur_run; + + pfile->context = XNEW (cpp_context); + pfile->context->macro = 0; + pfile->context->prev = 0; + pfile->context->next = 0; + + /* Inline run_directive, since we need to delay the _cpp_pop_buffer + until we've read all of the tokens that we want. */ + cpp_push_buffer (pfile, (const uchar *) result, dest - result, + /* from_stage3 */ true); + /* ??? Antique Disgusting Hack. What does this do? */ + if (pfile->buffer->prev) + pfile->buffer->file = pfile->buffer->prev->file; + + start_directive (pfile); + _cpp_clean_line (pfile); + do_pragma (pfile); + end_directive (pfile, 1); + + /* We always insert at least one token, the directive result. It'll + either be a CPP_PADDING or a CPP_PRAGMA. In the later case, we + need to insert *all* of the tokens, including the CPP_PRAGMA_EOL. */ + + /* If we're not handling the pragma internally, read all of the tokens from + the string buffer now, while the string buffer is still installed. */ + /* ??? Note that the token buffer allocated here is leaked. It's not clear + to me what the true lifespan of the tokens are. It would appear that + the lifespan is the entire parse of the main input stream, in which case + this may not be wrong. */ + if (pfile->directive_result.type == CPP_PRAGMA) + { + int maxcount; + + count = 1; + maxcount = 50; + toks = XNEWVEC (cpp_token, maxcount); + toks[0] = pfile->directive_result; + + do + { + if (count == maxcount) + { + maxcount = maxcount * 3 / 2; + toks = XRESIZEVEC (cpp_token, toks, maxcount); + } + toks[count] = *cpp_get_token (pfile); + /* Macros have been already expanded by cpp_get_token + if the pragma allowed expansion. */ + toks[count++].flags |= NO_EXPAND; + } + while (toks[count-1].type != CPP_PRAGMA_EOL); + } + else + { + count = 1; + toks = XNEW (cpp_token); + toks[0] = pfile->directive_result; + + /* If we handled the entire pragma internally, make sure we get the + line number correct for the next token. */ + if (pfile->cb.line_change) + pfile->cb.line_change (pfile, pfile->cur_token, false); + } + + /* Finish inlining run_directive. */ + pfile->buffer->file = NULL; + _cpp_pop_buffer (pfile); + + /* Reset the old macro state before ... */ + XDELETE (pfile->context); + pfile->context = saved_context; + pfile->cur_token = saved_cur_token; + pfile->cur_run = saved_cur_run; + + /* ... inserting the new tokens we collected. */ + _cpp_push_token_context (pfile, NULL, toks, count); +} + +/* Handle the _Pragma operator. Return 0 on error, 1 if ok. */ +int +_cpp_do__Pragma (cpp_reader *pfile) +{ + const cpp_token *string = get__Pragma_string (pfile); + pfile->directive_result.type = CPP_PADDING; + + if (string) + { + destringize_and_run (pfile, &string->val.str); + return 1; + } + cpp_error (pfile, CPP_DL_ERROR, + "_Pragma takes a parenthesized string literal"); + return 0; +} + +/* Handle #ifdef. */ +static void +do_ifdef (cpp_reader *pfile) +{ + int skip = 1; + + if (! pfile->state.skipping) + { + const cpp_hashnode *node = lex_macro_node (pfile, false); + + if (node) + { + skip = node->type != NT_MACRO; + _cpp_mark_macro_used (node); + check_eol (pfile); + } + } + + push_conditional (pfile, skip, T_IFDEF, 0); +} + +/* Handle #ifndef. */ +static void +do_ifndef (cpp_reader *pfile) +{ + int skip = 1; + const cpp_hashnode *node = 0; + + if (! pfile->state.skipping) + { + node = lex_macro_node (pfile, false); + + if (node) + { + skip = node->type == NT_MACRO; + _cpp_mark_macro_used (node); + check_eol (pfile); + } + } + + push_conditional (pfile, skip, T_IFNDEF, node); +} + +/* _cpp_parse_expr puts a macro in a "#if !defined ()" expression in + pfile->mi_ind_cmacro so we can handle multiple-include + optimizations. If macro expansion occurs in the expression, we + cannot treat it as a controlling conditional, since the expansion + could change in the future. That is handled by cpp_get_token. */ +static void +do_if (cpp_reader *pfile) +{ + int skip = 1; + + if (! pfile->state.skipping) + skip = _cpp_parse_expr (pfile) == false; + + push_conditional (pfile, skip, T_IF, pfile->mi_ind_cmacro); +} + +/* Flip skipping state if appropriate and continue without changing + if_stack; this is so that the error message for missing #endif's + etc. will point to the original #if. */ +static void +do_else (cpp_reader *pfile) +{ + cpp_buffer *buffer = pfile->buffer; + struct if_stack *ifs = buffer->if_stack; + + if (ifs == NULL) + cpp_error (pfile, CPP_DL_ERROR, "#else without #if"); + else + { + if (ifs->type == T_ELSE) + { + cpp_error (pfile, CPP_DL_ERROR, "#else after #else"); + cpp_error_with_line (pfile, CPP_DL_ERROR, ifs->line, 0, + "the conditional began here"); + } + ifs->type = T_ELSE; + + /* Skip any future (erroneous) #elses or #elifs. */ + pfile->state.skipping = ifs->skip_elses; + ifs->skip_elses = true; + + /* Invalidate any controlling macro. */ + ifs->mi_cmacro = 0; + + /* Only check EOL if was not originally skipping. */ + if (!ifs->was_skipping && CPP_OPTION (pfile, warn_endif_labels)) + check_eol (pfile); + } +} + +/* Handle a #elif directive by not changing if_stack either. See the + comment above do_else. */ +static void +do_elif (cpp_reader *pfile) +{ + cpp_buffer *buffer = pfile->buffer; + struct if_stack *ifs = buffer->if_stack; + + if (ifs == NULL) + cpp_error (pfile, CPP_DL_ERROR, "#elif without #if"); + else + { + if (ifs->type == T_ELSE) + { + cpp_error (pfile, CPP_DL_ERROR, "#elif after #else"); + cpp_error_with_line (pfile, CPP_DL_ERROR, ifs->line, 0, + "the conditional began here"); + } + ifs->type = T_ELIF; + + /* Only evaluate this if we aren't skipping elses. During + evaluation, set skipping to false to get lexer warnings. */ + if (ifs->skip_elses) + pfile->state.skipping = 1; + else + { + pfile->state.skipping = 0; + pfile->state.skipping = ! _cpp_parse_expr (pfile); + ifs->skip_elses = ! pfile->state.skipping; + } + + /* Invalidate any controlling macro. */ + ifs->mi_cmacro = 0; + } +} + +/* #endif pops the if stack and resets pfile->state.skipping. */ +static void +do_endif (cpp_reader *pfile) +{ + cpp_buffer *buffer = pfile->buffer; + struct if_stack *ifs = buffer->if_stack; + + if (ifs == NULL) + cpp_error (pfile, CPP_DL_ERROR, "#endif without #if"); + else + { + /* Only check EOL if was not originally skipping. */ + if (!ifs->was_skipping && CPP_OPTION (pfile, warn_endif_labels)) + check_eol (pfile); + + /* If potential control macro, we go back outside again. */ + if (ifs->next == 0 && ifs->mi_cmacro) + { + pfile->mi_valid = true; + pfile->mi_cmacro = ifs->mi_cmacro; + } + + buffer->if_stack = ifs->next; + pfile->state.skipping = ifs->was_skipping; + obstack_free (&pfile->buffer_ob, ifs); + } +} + +/* Push an if_stack entry for a preprocessor conditional, and set + pfile->state.skipping to SKIP. If TYPE indicates the conditional + is #if or #ifndef, CMACRO is a potentially controlling macro, and + we need to check here that we are at the top of the file. */ +static void +push_conditional (cpp_reader *pfile, int skip, int type, + const cpp_hashnode *cmacro) +{ + struct if_stack *ifs; + cpp_buffer *buffer = pfile->buffer; + + ifs = XOBNEW (&pfile->buffer_ob, struct if_stack); + ifs->line = pfile->directive_line; + ifs->next = buffer->if_stack; + ifs->skip_elses = pfile->state.skipping || !skip; + ifs->was_skipping = pfile->state.skipping; + ifs->type = type; + /* This condition is effectively a test for top-of-file. */ + if (pfile->mi_valid && pfile->mi_cmacro == 0) + ifs->mi_cmacro = cmacro; + else + ifs->mi_cmacro = 0; + + pfile->state.skipping = skip; + buffer->if_stack = ifs; +} + +/* Read the tokens of the answer into the macro pool, in a directive + of type TYPE. Only commit the memory if we intend it as permanent + storage, i.e. the #assert case. Returns 0 on success, and sets + ANSWERP to point to the answer. */ +static int +parse_answer (cpp_reader *pfile, struct answer **answerp, int type) +{ + const cpp_token *paren; + struct answer *answer; + unsigned int acount; + + /* In a conditional, it is legal to not have an open paren. We + should save the following token in this case. */ + paren = cpp_get_token (pfile); + + /* If not a paren, see if we're OK. */ + if (paren->type != CPP_OPEN_PAREN) + { + /* In a conditional no answer is a test for any answer. It + could be followed by any token. */ + if (type == T_IF) + { + _cpp_backup_tokens (pfile, 1); + return 0; + } + + /* #unassert with no answer is valid - it removes all answers. */ + if (type == T_UNASSERT && paren->type == CPP_EOF) + return 0; + + cpp_error (pfile, CPP_DL_ERROR, "missing '(' after predicate"); + return 1; + } + + for (acount = 0;; acount++) + { + size_t room_needed; + const cpp_token *token = cpp_get_token (pfile); + cpp_token *dest; + + if (token->type == CPP_CLOSE_PAREN) + break; + + if (token->type == CPP_EOF) + { + cpp_error (pfile, CPP_DL_ERROR, "missing ')' to complete answer"); + return 1; + } + + /* struct answer includes the space for one token. */ + room_needed = (sizeof (struct answer) + acount * sizeof (cpp_token)); + + if (BUFF_ROOM (pfile->a_buff) < room_needed) + _cpp_extend_buff (pfile, &pfile->a_buff, sizeof (struct answer)); + + dest = &((struct answer *) BUFF_FRONT (pfile->a_buff))->first[acount]; + *dest = *token; + + /* Drop whitespace at start, for answer equivalence purposes. */ + if (acount == 0) + dest->flags &= ~PREV_WHITE; + } + + if (acount == 0) + { + cpp_error (pfile, CPP_DL_ERROR, "predicate's answer is empty"); + return 1; + } + + answer = (struct answer *) BUFF_FRONT (pfile->a_buff); + answer->count = acount; + answer->next = NULL; + *answerp = answer; + + return 0; +} + +/* Parses an assertion directive of type TYPE, returning a pointer to + the hash node of the predicate, or 0 on error. If an answer was + supplied, it is placed in ANSWERP, otherwise it is set to 0. */ +static cpp_hashnode * +parse_assertion (cpp_reader *pfile, struct answer **answerp, int type) +{ + cpp_hashnode *result = 0; + const cpp_token *predicate; + + /* We don't expand predicates or answers. */ + pfile->state.prevent_expansion++; + + *answerp = 0; + predicate = cpp_get_token (pfile); + if (predicate->type == CPP_EOF) + cpp_error (pfile, CPP_DL_ERROR, "assertion without predicate"); + else if (predicate->type != CPP_NAME) + cpp_error (pfile, CPP_DL_ERROR, "predicate must be an identifier"); + else if (parse_answer (pfile, answerp, type) == 0) + { + unsigned int len = NODE_LEN (predicate->val.node); + unsigned char *sym = (unsigned char *) alloca (len + 1); + + /* Prefix '#' to get it out of macro namespace. */ + sym[0] = '#'; + memcpy (sym + 1, NODE_NAME (predicate->val.node), len); + result = cpp_lookup (pfile, sym, len + 1); + } + + pfile->state.prevent_expansion--; + return result; +} + +/* Returns a pointer to the pointer to CANDIDATE in the answer chain, + or a pointer to NULL if the answer is not in the chain. */ +static struct answer ** +find_answer (cpp_hashnode *node, const struct answer *candidate) +{ + unsigned int i; + struct answer **result; + + for (result = &node->value.answers; *result; result = &(*result)->next) + { + struct answer *answer = *result; + + if (answer->count == candidate->count) + { + for (i = 0; i < answer->count; i++) + if (! _cpp_equiv_tokens (&answer->first[i], &candidate->first[i])) + break; + + if (i == answer->count) + break; + } + } + + return result; +} + +/* Test an assertion within a preprocessor conditional. Returns + nonzero on failure, zero on success. On success, the result of + the test is written into VALUE, otherwise the value 0. */ +int +_cpp_test_assertion (cpp_reader *pfile, unsigned int *value) +{ + struct answer *answer; + cpp_hashnode *node; + + node = parse_assertion (pfile, &answer, T_IF); + + /* For recovery, an erroneous assertion expression is handled as a + failing assertion. */ + *value = 0; + + if (node) + *value = (node->type == NT_ASSERTION && + (answer == 0 || *find_answer (node, answer) != 0)); + else if (pfile->cur_token[-1].type == CPP_EOF) + _cpp_backup_tokens (pfile, 1); + + /* We don't commit the memory for the answer - it's temporary only. */ + return node == 0; +} + +/* Handle #assert. */ +static void +do_assert (cpp_reader *pfile) +{ + struct answer *new_answer; + cpp_hashnode *node; + + node = parse_assertion (pfile, &new_answer, T_ASSERT); + if (node) + { + size_t answer_size; + + /* Place the new answer in the answer list. First check there + is not a duplicate. */ + new_answer->next = 0; + if (node->type == NT_ASSERTION) + { + if (*find_answer (node, new_answer)) + { + cpp_error (pfile, CPP_DL_WARNING, "\"%s\" re-asserted", + NODE_NAME (node) + 1); + return; + } + new_answer->next = node->value.answers; + } + + answer_size = sizeof (struct answer) + ((new_answer->count - 1) + * sizeof (cpp_token)); + /* Commit or allocate storage for the object. */ + if (pfile->hash_table->alloc_subobject) + { + struct answer *temp_answer = new_answer; + new_answer = (struct answer *) pfile->hash_table->alloc_subobject + (answer_size); + memcpy (new_answer, temp_answer, answer_size); + } + else + BUFF_FRONT (pfile->a_buff) += answer_size; + + node->type = NT_ASSERTION; + node->value.answers = new_answer; + check_eol (pfile); + } +} + +/* Handle #unassert. */ +static void +do_unassert (cpp_reader *pfile) +{ + cpp_hashnode *node; + struct answer *answer; + + node = parse_assertion (pfile, &answer, T_UNASSERT); + /* It isn't an error to #unassert something that isn't asserted. */ + if (node && node->type == NT_ASSERTION) + { + if (answer) + { + struct answer **p = find_answer (node, answer), *temp; + + /* Remove the answer from the list. */ + temp = *p; + if (temp) + *p = temp->next; + + /* Did we free the last answer? */ + if (node->value.answers == 0) + node->type = NT_VOID; + + check_eol (pfile); + } + else + _cpp_free_definition (node); + } + + /* We don't commit the memory for the answer - it's temporary only. */ +} + +/* These are for -D, -U, -A. */ + +/* Process the string STR as if it appeared as the body of a #define. + If STR is just an identifier, define it with value 1. + If STR has anything after the identifier, then it should + be identifier=definition. */ +void +cpp_define (cpp_reader *pfile, const char *str) +{ + char *buf, *p; + size_t count; + + /* Copy the entire option so we can modify it. + Change the first "=" in the string to a space. If there is none, + tack " 1" on the end. */ + + count = strlen (str); + buf = (char *) alloca (count + 3); + memcpy (buf, str, count); + + p = strchr (str, '='); + if (p) + buf[p - str] = ' '; + else + { + buf[count++] = ' '; + buf[count++] = '1'; + } + buf[count] = '\n'; + + run_directive (pfile, T_DEFINE, buf, count); +} + +/* Slight variant of the above for use by initialize_builtins. */ +void +_cpp_define_builtin (cpp_reader *pfile, const char *str) +{ + size_t len = strlen (str); + char *buf = (char *) alloca (len + 1); + memcpy (buf, str, len); + buf[len] = '\n'; + run_directive (pfile, T_DEFINE, buf, len); +} + +/* Process MACRO as if it appeared as the body of an #undef. */ +void +cpp_undef (cpp_reader *pfile, const char *macro) +{ + size_t len = strlen (macro); + char *buf = (char *) alloca (len + 1); + memcpy (buf, macro, len); + buf[len] = '\n'; + run_directive (pfile, T_UNDEF, buf, len); +} + +/* Like lex_macro_node, but read the input from STR. */ +static cpp_hashnode * +lex_macro_node_from_str (cpp_reader *pfile, const char *str) +{ + size_t len = strlen (str); + uchar *buf = (uchar *) alloca (len + 1); + cpp_hashnode *node; + + memcpy (buf, str, len); + buf[len] = '\n'; + cpp_push_buffer (pfile, buf, len, true); + node = lex_macro_node (pfile, true); + _cpp_pop_buffer (pfile); + + return node; +} + +/* If STR is a defined macro, return its definition node, else return NULL. */ +cpp_macro * +cpp_push_definition (cpp_reader *pfile, const char *str) +{ + cpp_hashnode *node = lex_macro_node_from_str (pfile, str); + if (node && node->type == NT_MACRO) + return node->value.macro; + else + return NULL; +} + +/* Replace a previous definition DFN of the macro STR. If DFN is NULL, + then the macro should be undefined. */ +void +cpp_pop_definition (cpp_reader *pfile, const char *str, cpp_macro *dfn) +{ + cpp_hashnode *node = lex_macro_node_from_str (pfile, str); + if (node == NULL) + return; + + if (node->type == NT_MACRO) + { + if (pfile->cb.undef) + pfile->cb.undef (pfile, pfile->directive_line, node); + if (CPP_OPTION (pfile, warn_unused_macros)) + _cpp_warn_if_unused_macro (pfile, node, NULL); + } + if (node->type != NT_VOID) + _cpp_free_definition (node); + + if (dfn) + { + node->type = NT_MACRO; + node->value.macro = dfn; + if (! ustrncmp (NODE_NAME (node), DSC ("__STDC_"))) + node->flags |= NODE_WARN; + + if (pfile->cb.define) + pfile->cb.define (pfile, pfile->directive_line, node); + } +} + +/* Process the string STR as if it appeared as the body of a #assert. */ +void +cpp_assert (cpp_reader *pfile, const char *str) +{ + handle_assertion (pfile, str, T_ASSERT); +} + +/* Process STR as if it appeared as the body of an #unassert. */ +void +cpp_unassert (cpp_reader *pfile, const char *str) +{ + handle_assertion (pfile, str, T_UNASSERT); +} + +/* Common code for cpp_assert (-A) and cpp_unassert (-A-). */ +static void +handle_assertion (cpp_reader *pfile, const char *str, int type) +{ + size_t count = strlen (str); + const char *p = strchr (str, '='); + + /* Copy the entire option so we can modify it. Change the first + "=" in the string to a '(', and tack a ')' on the end. */ + char *buf = (char *) alloca (count + 2); + + memcpy (buf, str, count); + if (p) + { + buf[p - str] = '('; + buf[count++] = ')'; + } + buf[count] = '\n'; + str = buf; + + run_directive (pfile, type, str, count); +} + +/* The number of errors for a given reader. */ +unsigned int +cpp_errors (cpp_reader *pfile) +{ + return pfile->errors; +} + +/* The options structure. */ +cpp_options * +cpp_get_options (cpp_reader *pfile) +{ + return &pfile->opts; +} + +/* The callbacks structure. */ +cpp_callbacks * +cpp_get_callbacks (cpp_reader *pfile) +{ + return &pfile->cb; +} + +/* Copy the given callbacks structure to our own. */ +void +cpp_set_callbacks (cpp_reader *pfile, cpp_callbacks *cb) +{ + pfile->cb = *cb; +} + +/* The dependencies structure. (Creates one if it hasn't already been.) */ +struct deps * +cpp_get_deps (cpp_reader *pfile) +{ + if (!pfile->deps) + pfile->deps = deps_init (); + return pfile->deps; +} + +/* Push a new buffer on the buffer stack. Returns the new buffer; it + doesn't fail. It does not generate a file change call back; that + is the responsibility of the caller. */ +cpp_buffer * +cpp_push_buffer (cpp_reader *pfile, const uchar *buffer, size_t len, + int from_stage3) +{ + cpp_buffer *new_buffer = XOBNEW (&pfile->buffer_ob, cpp_buffer); + + /* Clears, amongst other things, if_stack and mi_cmacro. */ + memset (new_buffer, 0, sizeof (cpp_buffer)); + + new_buffer->next_line = new_buffer->buf = buffer; + new_buffer->rlimit = buffer + len; + new_buffer->from_stage3 = from_stage3; + new_buffer->prev = pfile->buffer; + new_buffer->need_line = true; + + pfile->buffer = new_buffer; + + return new_buffer; +} + +/* Pops a single buffer, with a file change call-back if appropriate. + Then pushes the next -include file, if any remain. */ +void +_cpp_pop_buffer (cpp_reader *pfile) +{ + cpp_buffer *buffer = pfile->buffer; + struct _cpp_file *inc = buffer->file; + struct if_stack *ifs; + + /* Walk back up the conditional stack till we reach its level at + entry to this file, issuing error messages. */ + for (ifs = buffer->if_stack; ifs; ifs = ifs->next) + cpp_error_with_line (pfile, CPP_DL_ERROR, ifs->line, 0, + "unterminated #%s", dtable[ifs->type].name); + + /* In case of a missing #endif. */ + pfile->state.skipping = 0; + + /* _cpp_do_file_change expects pfile->buffer to be the new one. */ + pfile->buffer = buffer->prev; + + free (buffer->notes); + + /* Free the buffer object now; we may want to push a new buffer + in _cpp_push_next_include_file. */ + obstack_free (&pfile->buffer_ob, buffer); + + if (inc) + { + _cpp_pop_file_buffer (pfile, inc); + + _cpp_do_file_change (pfile, LC_LEAVE, 0, 0, 0); + } +} + +/* Enter all recognized directives in the hash table. */ +void +_cpp_init_directives (cpp_reader *pfile) +{ + unsigned int i; + cpp_hashnode *node; + + for (i = 0; i < (unsigned int) N_DIRECTIVES; i++) + { + node = cpp_lookup (pfile, dtable[i].name, dtable[i].length); + node->is_directive = 1; + node->directive_index = i; + } +} diff --git a/support/cpp/libcpp/errors.c b/support/cpp/libcpp/errors.c new file mode 100644 index 0000000..97de490 --- /dev/null +++ b/support/cpp/libcpp/errors.c @@ -0,0 +1,189 @@ +/* Default error handlers for CPP Library. + Copyright (C) 1986, 1987, 1989, 1992, 1993, 1994, 1995, 1998, 1999, 2000, + 2001, 2002, 2004 Free Software Foundation, Inc. + Written by Per Bothner, 1994. + Based on CCCP program by Paul Rubin, June 1986 + Adapted to ANSI C, Richard Stallman, Jan 1987 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! */ + +#include "config.h" +#include "system.h" +#include "cpplib.h" +#include "internal.h" + +static void print_location (cpp_reader *, source_location, unsigned int); + +/* Print the logical file location (LINE, COL) in preparation for a + diagnostic. Outputs the #include chain if it has changed. A line + of zero suppresses the include stack, and outputs the program name + instead. */ +static void +print_location (cpp_reader *pfile, source_location line, unsigned int col) +{ + if (line == 0) + fprintf (stderr, "%s: ", progname); + else + { + const struct line_map *map; + unsigned int lin; + + map = linemap_lookup (pfile->line_table, line); + linemap_print_containing_files (pfile->line_table, map); + + lin = SOURCE_LINE (map, line); + if (col == 0) + { + col = SOURCE_COLUMN (map, line); + if (col == 0) + col = 1; + } + + if (lin == 0) + fprintf (stderr, "%s:", map->to_file); + else if (CPP_OPTION (pfile, show_column) == 0) + fprintf (stderr, "%s:%u:", map->to_file, lin); + else + fprintf (stderr, "%s:%u:%u:", map->to_file, lin, col); + + fputc (' ', stderr); + } +} + +/* Set up for a diagnostic: print the file and line, bump the error + counter, etc. SRC_LOC is the logical line number; zero means to print + at the location of the previously lexed token, which tends to be + the correct place by default. The column number can be specified either + using COLUMN or (if COLUMN==0) extracting SOURCE_COLUMN from SRC_LOC. + (This may seem redundant, but is useful when pre-scanning (cleaning) a line, + when we haven't yet verified whether the current line_map has a + big enough max_column_hint.) + + Returns 0 if the error has been suppressed. */ +int +_cpp_begin_message (cpp_reader *pfile, int code, + source_location src_loc, unsigned int column) +{ + int level = CPP_DL_EXTRACT (code); + + switch (level) + { + case CPP_DL_WARNING: + case CPP_DL_PEDWARN: + if (cpp_in_system_header (pfile) + && ! CPP_OPTION (pfile, warn_system_headers)) + return 0; + /* Fall through. */ + + case CPP_DL_WARNING_SYSHDR: + if (CPP_OPTION (pfile, warnings_are_errors) + || (level == CPP_DL_PEDWARN && CPP_OPTION (pfile, pedantic_errors))) + { + if (CPP_OPTION (pfile, inhibit_errors)) + return 0; + level = CPP_DL_ERROR; + pfile->errors++; + } + else if (CPP_OPTION (pfile, inhibit_warnings)) + return 0; + break; + + case CPP_DL_ERROR: + if (CPP_OPTION (pfile, inhibit_errors)) + return 0; + /* ICEs cannot be inhibited. */ + case CPP_DL_ICE: + pfile->errors++; + break; + } + + print_location (pfile, src_loc, column); + if (CPP_DL_WARNING_P (level)) + fputs (_("warning: "), stderr); + else if (level == CPP_DL_ICE) + fputs (_("internal error: "), stderr); + else + fputs (_("error: "), stderr); + + return 1; +} + +/* Don't remove the blank before do, as otherwise the exgettext + script will mistake this as a function definition */ +#define v_message(msgid, ap) \ + do { vfprintf (stderr, _(msgid), ap); putc ('\n', stderr); } while (0) + +/* Exported interface. */ + +/* Print an error at the location of the previously lexed token. */ +void +cpp_error (cpp_reader * pfile, int level, const char *msgid, ...) +{ + source_location src_loc; + va_list ap; + + va_start (ap, msgid); + + if (CPP_OPTION (pfile, client_diagnostic)) + pfile->cb.error (pfile, level, _(msgid), &ap); + else + { + if (CPP_OPTION (pfile, traditional)) + { + if (pfile->state.in_directive) + src_loc = pfile->directive_line; + else + src_loc = pfile->line_table->highest_line; + } + else + { + src_loc = pfile->cur_token[-1].src_loc; + } + + if (_cpp_begin_message (pfile, level, src_loc, 0)) + v_message (msgid, ap); + } + + va_end (ap); +} + +/* Print an error at a specific location. */ +void +cpp_error_with_line (cpp_reader *pfile, int level, + source_location src_loc, unsigned int column, + const char *msgid, ...) +{ + va_list ap; + + va_start (ap, msgid); + + if (_cpp_begin_message (pfile, level, src_loc, column)) + v_message (msgid, ap); + + va_end (ap); +} + +void +cpp_errno (cpp_reader *pfile, int level, const char *msgid) +{ + if (msgid[0] == '\0') + msgid = _("stdout"); + + cpp_error (pfile, level, "%s: %s", msgid, xstrerror (errno)); +} diff --git a/support/cpp/libcpp/expr.c b/support/cpp/libcpp/expr.c new file mode 100644 index 0000000..8ac9010 --- /dev/null +++ b/support/cpp/libcpp/expr.c @@ -0,0 +1,1666 @@ +/* Parse C expressions for cpplib. + Copyright (C) 1987, 1992, 1994, 1995, 1997, 1998, 1999, 2000, 2001, + 2002, 2004 Free Software Foundation. + Contributed by Per Bothner, 1994. + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, +Boston, MA 02110-1301, USA. */ + +#include "config.h" +#include "system.h" +#include "cpplib.h" +#include "internal.h" + +#define PART_PRECISION (sizeof (cpp_num_part) * CHAR_BIT) +#define HALF_MASK (~(cpp_num_part) 0 >> (PART_PRECISION / 2)) +#define LOW_PART(num_part) (num_part & HALF_MASK) +#define HIGH_PART(num_part) (num_part >> (PART_PRECISION / 2)) + +struct op +{ + const cpp_token *token; /* The token forming op (for diagnostics). */ + cpp_num value; /* The value logically "right" of op. */ + enum cpp_ttype op; +}; + +/* Some simple utility routines on double integers. */ +#define num_zerop(num) ((num.low | num.high) == 0) +#define num_eq(num1, num2) (num1.low == num2.low && num1.high == num2.high) +static bool num_positive (cpp_num, size_t); +static bool num_greater_eq (cpp_num, cpp_num, size_t); +static cpp_num num_trim (cpp_num, size_t); +static cpp_num num_part_mul (cpp_num_part, cpp_num_part); + +static cpp_num num_unary_op (cpp_reader *, cpp_num, enum cpp_ttype); +static cpp_num num_binary_op (cpp_reader *, cpp_num, cpp_num, enum cpp_ttype); +static cpp_num num_negate (cpp_num, size_t); +static cpp_num num_bitwise_op (cpp_reader *, cpp_num, cpp_num, enum cpp_ttype); +static cpp_num num_inequality_op (cpp_reader *, cpp_num, cpp_num, + enum cpp_ttype); +static cpp_num num_equality_op (cpp_reader *, cpp_num, cpp_num, + enum cpp_ttype); +static cpp_num num_mul (cpp_reader *, cpp_num, cpp_num); +static cpp_num num_div_op (cpp_reader *, cpp_num, cpp_num, enum cpp_ttype); +static cpp_num num_lshift (cpp_num, size_t, size_t); +static cpp_num num_rshift (cpp_num, size_t, size_t); + +static cpp_num append_digit (cpp_num, int, int, size_t); +static cpp_num parse_defined (cpp_reader *); +static cpp_num eval_token (cpp_reader *, const cpp_token *); +static struct op *reduce (cpp_reader *, struct op *, enum cpp_ttype); +static unsigned int interpret_float_suffix (const uchar *, size_t); +static unsigned int interpret_int_suffix (const uchar *, size_t); +static void check_promotion (cpp_reader *, const struct op *); + +/* Token type abuse to create unary plus and minus operators. */ +#define CPP_UPLUS ((enum cpp_ttype) (CPP_LAST_CPP_OP + 1)) +#define CPP_UMINUS ((enum cpp_ttype) (CPP_LAST_CPP_OP + 2)) + +/* With -O2, gcc appears to produce nice code, moving the error + message load and subsequent jump completely out of the main path. */ +#define SYNTAX_ERROR(msgid) \ + do { cpp_error (pfile, CPP_DL_ERROR, msgid); goto syntax_error; } while(0) +#define SYNTAX_ERROR2(msgid, arg) \ + do { cpp_error (pfile, CPP_DL_ERROR, msgid, arg); goto syntax_error; } \ + while(0) + +/* Subroutine of cpp_classify_number. S points to a float suffix of + length LEN, possibly zero. Returns 0 for an invalid suffix, or a + flag vector describing the suffix. */ +static unsigned int +interpret_float_suffix (const uchar *s, size_t len) +{ + size_t f, l, w, q, i, d; + size_t r, k, u, h; + + f = l = w = q = i = d = 0; + r = k = u = h = 0; + + while (len--) + switch (s[len]) + { + case 'r': case 'R': r++; break; + case 'k': case 'K': k++; break; + case 'u': case 'U': u++; break; + case 'h': case 'H': h++; break; + case 'f': case 'F': + if (d > 0) + return 0; + f++; + break; + case 'l': case 'L': + if (d > 0) + return 0; + l++; + /* If there are two Ls, they must be adjacent and the same case. */ + if (l == 2 && s[len] != s[len + 1]) + return 0; + break; + case 'w': case 'W': + if (d > 0) + return 0; + w++; + break; + case 'q': case 'Q': + if (d > 0) + return 0; + q++; + break; + case 'i': case 'I': + case 'j': case 'J': i++; break; + case 'd': case 'D': d++; break; + default: + return 0; + } + + if (r + k > 1 || h > 1 || l > 2 || u > 1) + return 0; + + if (r == 1) + { + if (f || i || d || w || q) + return 0; + + return (CPP_N_FRACT + | (u ? CPP_N_UNSIGNED : 0) + | (h ? CPP_N_SMALL : + l == 2 ? CPP_N_LARGE : + l == 1 ? CPP_N_MEDIUM : 0)); + } + + if (k == 1) + { + if (f || i || d || w || q) + return 0; + + return (CPP_N_ACCUM + | (u ? CPP_N_UNSIGNED : 0) + | (h ? CPP_N_SMALL : + l == 2 ? CPP_N_LARGE : + l == 1 ? CPP_N_MEDIUM : 0)); + } + + if (f + l + w + q > 1 || i > 1 || h + u > 0) + return 0; + + /* Allow dd, df, dl suffixes for decimal float constants. */ + if (d && ((d + f + l != 2) || i)) + return 0; + + return ((i ? CPP_N_IMAGINARY : 0) + | (f ? CPP_N_SMALL : + l ? CPP_N_LARGE : + w ? CPP_N_MD_W : + q ? CPP_N_MD_Q : CPP_N_MEDIUM) + | (d ? CPP_N_DFLOAT : 0)); +} + +/* Subroutine of cpp_classify_number. S points to an integer suffix + of length LEN, possibly zero. Returns 0 for an invalid suffix, or a + flag vector describing the suffix. */ +static unsigned int +interpret_int_suffix (const uchar *s, size_t len) +{ + size_t u, l, i; + + u = l = i = 0; + + while (len--) + switch (s[len]) + { + case 'u': case 'U': u++; break; + case 'i': case 'I': + case 'j': case 'J': i++; break; + case 'l': case 'L': l++; + /* If there are two Ls, they must be adjacent and the same case. */ + if (l == 2 && s[len] != s[len + 1]) + return 0; + break; + default: + return 0; + } + + if (l > 2 || u > 1 || i > 1) + return 0; + + return ((i ? CPP_N_IMAGINARY : 0) + | (u ? CPP_N_UNSIGNED : 0) + | ((l == 0) ? CPP_N_SMALL + : (l == 1) ? CPP_N_MEDIUM : CPP_N_LARGE)); +} + +/* Categorize numeric constants according to their field (integer, + floating point, or invalid), radix (decimal, octal, hexadecimal), + and type suffixes. */ +unsigned int +cpp_classify_number (cpp_reader *pfile, const cpp_token *token) +{ + const uchar *str = token->val.str.text; + const uchar *limit; + unsigned int max_digit, result, radix; + enum {NOT_FLOAT = 0, AFTER_POINT, AFTER_EXPON} float_flag; + + /* If the lexer has done its job, length one can only be a single + digit. Fast-path this very common case. */ + if (token->val.str.len == 1) + return CPP_N_INTEGER | CPP_N_SMALL | CPP_N_DECIMAL; + + limit = str + token->val.str.len; + float_flag = NOT_FLOAT; + max_digit = 0; + radix = 10; + + /* First, interpret the radix. */ + if (*str == '0') + { + radix = 8; + str++; + + /* Require at least one hex digit to classify it as hex. */ + if ((*str == 'x' || *str == 'X') + && (str[1] == '.' || ISXDIGIT (str[1]))) + { + radix = 16; + str++; + } + else if ((*str == 'b' || *str == 'B') && (str[1] == '0' || str[1] == '1')) + { + radix = 2; + str++; + } + } + + /* Now scan for a well-formed integer or float. */ + for (;;) + { + unsigned int c = *str++; + + if (ISDIGIT (c) || (ISXDIGIT (c) && radix == 16)) + { + c = hex_value (c); + if (c > max_digit) + max_digit = c; + } + else if (c == '.') + { + if (float_flag == NOT_FLOAT) + float_flag = AFTER_POINT; + else + SYNTAX_ERROR ("too many decimal points in number"); + } + else if ((radix <= 10 && (c == 'e' || c == 'E')) + || (radix == 16 && (c == 'p' || c == 'P'))) + { + float_flag = AFTER_EXPON; + break; + } + else + { + /* Start of suffix. */ + str--; + break; + } + } + + /* The suffix may be for decimal fixed-point constants without exponent. */ + if (radix != 16 && float_flag == NOT_FLOAT) + { + result = interpret_float_suffix (str, limit - str); + if ((result & CPP_N_FRACT) || (result & CPP_N_ACCUM)) + { + result |= CPP_N_FLOATING; + /* We need to restore the radix to 10, if the radix is 8. */ + if (radix == 8) + radix = 10; + + if (CPP_PEDANTIC (pfile)) + cpp_error (pfile, CPP_DL_PEDWARN, + "fixed-point constants are a GCC extension"); + goto syntax_ok; + } + else + result = 0; + } + + if (float_flag != NOT_FLOAT && radix == 8) + radix = 10; + + if (max_digit >= radix) + { + if (radix == 2) + SYNTAX_ERROR2 ("invalid digit \"%c\" in binary constant", '0' + max_digit); + else + SYNTAX_ERROR2 ("invalid digit \"%c\" in octal constant", '0' + max_digit); + } + + if (float_flag != NOT_FLOAT) + { + if (radix == 2) + { + cpp_error (pfile, CPP_DL_ERROR, + "invalid prefix \"0b\" for floating constant"); + return CPP_N_INVALID; + } + + if (radix == 16 && CPP_PEDANTIC (pfile) && !CPP_OPTION (pfile, c99)) + cpp_error (pfile, CPP_DL_PEDWARN, + "use of C99 hexadecimal floating constant"); + + if (float_flag == AFTER_EXPON) + { + if (*str == '+' || *str == '-') + str++; + + /* Exponent is decimal, even if string is a hex float. */ + if (!ISDIGIT (*str)) + SYNTAX_ERROR ("exponent has no digits"); + + do + str++; + while (ISDIGIT (*str)); + } + else if (radix == 16) + SYNTAX_ERROR ("hexadecimal floating constants require an exponent"); + + result = interpret_float_suffix (str, limit - str); + if (result == 0) + { + cpp_error (pfile, CPP_DL_ERROR, + "invalid suffix \"%.*s\" on floating constant", + (int) (limit - str), str); + return CPP_N_INVALID; + } + + /* Traditional C didn't accept any floating suffixes. */ + if (limit != str + && CPP_WTRADITIONAL (pfile) + && ! cpp_sys_macro_p (pfile)) + cpp_error (pfile, CPP_DL_WARNING, + "traditional C rejects the \"%.*s\" suffix", + (int) (limit - str), str); + + /* Radix must be 10 for decimal floats. */ + if ((result & CPP_N_DFLOAT) && radix != 10) + { + cpp_error (pfile, CPP_DL_ERROR, + "invalid suffix \"%.*s\" with hexadecimal floating constant", + (int) (limit - str), str); + return CPP_N_INVALID; + } + + if ((result & (CPP_N_FRACT | CPP_N_ACCUM)) && CPP_PEDANTIC (pfile)) + cpp_error (pfile, CPP_DL_PEDWARN, + "fixed-point constants are a GCC extension"); + + if ((result & CPP_N_DFLOAT) && CPP_PEDANTIC (pfile)) + cpp_error (pfile, CPP_DL_PEDWARN, + "decimal float constants are a GCC extension"); + + result |= CPP_N_FLOATING; + } + else + { + result = interpret_int_suffix (str, limit - str); + if (result == 0) + { + cpp_error (pfile, CPP_DL_ERROR, + "invalid suffix \"%.*s\" on integer constant", + (int) (limit - str), str); + return CPP_N_INVALID; + } + + /* Traditional C only accepted the 'L' suffix. + Suppress warning about 'LL' with -Wno-long-long. */ + if (CPP_WTRADITIONAL (pfile) && ! cpp_sys_macro_p (pfile)) + { + int u_or_i = (result & (CPP_N_UNSIGNED|CPP_N_IMAGINARY)); + int large = (result & CPP_N_WIDTH) == CPP_N_LARGE; + + if (u_or_i || (large && CPP_OPTION (pfile, warn_long_long))) + cpp_error (pfile, CPP_DL_WARNING, + "traditional C rejects the \"%.*s\" suffix", + (int) (limit - str), str); + } + + if ((result & CPP_N_WIDTH) == CPP_N_LARGE + && ! CPP_OPTION (pfile, c99) + && CPP_OPTION (pfile, warn_long_long)) + cpp_error (pfile, CPP_DL_PEDWARN, + "use of C99 long long integer constant"); + + result |= CPP_N_INTEGER; + } + + syntax_ok: + if ((result & CPP_N_IMAGINARY) && CPP_PEDANTIC (pfile)) + cpp_error (pfile, CPP_DL_PEDWARN, + "imaginary constants are a GCC extension"); + if (radix == 2 && CPP_PEDANTIC (pfile)) + cpp_error (pfile, CPP_DL_PEDWARN, + "binary constants are a GCC extension"); + + if (radix == 10) + result |= CPP_N_DECIMAL; + else if (radix == 16) + result |= CPP_N_HEX; + else if (radix == 2) + result |= CPP_N_BINARY; + else + result |= CPP_N_OCTAL; + + return result; + + syntax_error: + return CPP_N_INVALID; +} + +/* cpp_interpret_integer converts an integer constant into a cpp_num, + of precision options->precision. + + We do not provide any interface for decimal->float conversion, + because the preprocessor doesn't need it and we don't want to + drag in GCC's floating point emulator. */ +cpp_num +cpp_interpret_integer (cpp_reader *pfile, const cpp_token *token, + unsigned int type) +{ + const uchar *p, *end; + cpp_num result; + + result.low = 0; + result.high = 0; + result.unsignedp = !!(type & CPP_N_UNSIGNED); + result.overflow = false; + + p = token->val.str.text; + end = p + token->val.str.len; + + /* Common case of a single digit. */ + if (token->val.str.len == 1) + result.low = p[0] - '0'; + else + { + cpp_num_part max; + size_t precision = CPP_OPTION (pfile, precision); + unsigned int base = 10, c = 0; + bool overflow = false; + + if ((type & CPP_N_RADIX) == CPP_N_OCTAL) + { + base = 8; + p++; + } + else if ((type & CPP_N_RADIX) == CPP_N_HEX) + { + base = 16; + p += 2; + } + else if ((type & CPP_N_RADIX) == CPP_N_BINARY) + { + base = 2; + p += 2; + } + + /* We can add a digit to numbers strictly less than this without + needing the precision and slowness of double integers. */ + max = ~(cpp_num_part) 0; + if (precision < PART_PRECISION) + max >>= PART_PRECISION - precision; + max = (max - base + 1) / base + 1; + + for (; p < end; p++) + { + c = *p; + + if (ISDIGIT (c) || (base == 16 && ISXDIGIT (c))) + c = hex_value (c); + else + break; + + /* Strict inequality for when max is set to zero. */ + if (result.low < max) + result.low = result.low * base + c; + else + { + result = append_digit (result, c, base, precision); + overflow |= result.overflow; + max = 0; + } + } + + if (overflow) + cpp_error (pfile, CPP_DL_PEDWARN, + "integer constant is too large for its type"); + /* If too big to be signed, consider it unsigned. Only warn for + decimal numbers. Traditional numbers were always signed (but + we still honor an explicit U suffix); but we only have + traditional semantics in directives. */ + else if (!result.unsignedp + && !(CPP_OPTION (pfile, traditional) + && pfile->state.in_directive) + && !num_positive (result, precision)) + { + if (base == 10) + cpp_error (pfile, CPP_DL_WARNING, + "integer constant is so large that it is unsigned"); + result.unsignedp = true; + } + } + + return result; +} + +/* Append DIGIT to NUM, a number of PRECISION bits being read in base BASE. */ +static cpp_num +append_digit (cpp_num num, int digit, int base, size_t precision) +{ + cpp_num result; + unsigned int shift; + bool overflow; + cpp_num_part add_high, add_low; + + /* Multiply by 2, 8 or 16. Catching this overflow here means we don't + need to worry about add_high overflowing. */ + switch (base) + { + case 2: + shift = 1; + break; + + case 16: + shift = 4; + break; + + default: + shift = 3; + } + overflow = !!(num.high >> (PART_PRECISION - shift)); + result.high = num.high << shift; + result.low = num.low << shift; + result.high |= num.low >> (PART_PRECISION - shift); + result.unsignedp = num.unsignedp; + + if (base == 10) + { + add_low = num.low << 1; + add_high = (num.high << 1) + (num.low >> (PART_PRECISION - 1)); + } + else + add_high = add_low = 0; + + if (add_low + digit < add_low) + add_high++; + add_low += digit; + + if (result.low + add_low < result.low) + add_high++; + if (result.high + add_high < result.high) + overflow = true; + + result.low += add_low; + result.high += add_high; + result.overflow = overflow; + + /* The above code catches overflow of a cpp_num type. This catches + overflow of the (possibly shorter) target precision. */ + num.low = result.low; + num.high = result.high; + result = num_trim (result, precision); + if (!num_eq (result, num)) + result.overflow = true; + + return result; +} + +/* Handle meeting "defined" in a preprocessor expression. */ +static cpp_num +parse_defined (cpp_reader *pfile) +{ + cpp_num result; + int paren = 0; + cpp_hashnode *node = 0; + const cpp_token *token; + cpp_context *initial_context = pfile->context; + + /* Don't expand macros. */ + pfile->state.prevent_expansion++; + + token = cpp_get_token (pfile); + if (token->type == CPP_OPEN_PAREN) + { + paren = 1; + token = cpp_get_token (pfile); + } + + if (token->type == CPP_NAME) + { + node = token->val.node; + if (paren && cpp_get_token (pfile)->type != CPP_CLOSE_PAREN) + { + cpp_error (pfile, CPP_DL_ERROR, "missing ')' after \"defined\""); + node = 0; + } + } + else + { + cpp_error (pfile, CPP_DL_ERROR, + "operator \"defined\" requires an identifier"); + if (token->flags & NAMED_OP) + { + cpp_token op; + + op.flags = 0; + op.type = token->type; + cpp_error (pfile, CPP_DL_ERROR, + "(\"%s\" is an alternative token for \"%s\" in C++)", + cpp_token_as_text (pfile, token), + cpp_token_as_text (pfile, &op)); + } + } + + if (node) + { + if (pfile->context != initial_context && CPP_PEDANTIC (pfile)) + cpp_error (pfile, CPP_DL_WARNING, + "this use of \"defined\" may not be portable"); + + _cpp_mark_macro_used (node); + + /* A possible controlling macro of the form #if !defined (). + _cpp_parse_expr checks there was no other junk on the line. */ + pfile->mi_ind_cmacro = node; + } + + pfile->state.prevent_expansion--; + + result.unsignedp = false; + result.high = 0; + result.overflow = false; + result.low = node && node->type == NT_MACRO; + return result; +} + +/* Convert a token into a CPP_NUMBER (an interpreted preprocessing + number or character constant, or the result of the "defined" or "#" + operators). */ +static cpp_num +eval_token (cpp_reader *pfile, const cpp_token *token) +{ + cpp_num result; + unsigned int temp; + int unsignedp = 0; + + result.unsignedp = false; + result.overflow = false; + + switch (token->type) + { + case CPP_NUMBER: + temp = cpp_classify_number (pfile, token); + switch (temp & CPP_N_CATEGORY) + { + case CPP_N_FLOATING: + cpp_error (pfile, CPP_DL_ERROR, + "floating constant in preprocessor expression"); + break; + case CPP_N_INTEGER: + if (!(temp & CPP_N_IMAGINARY)) + return cpp_interpret_integer (pfile, token, temp); + cpp_error (pfile, CPP_DL_ERROR, + "imaginary number in preprocessor expression"); + break; + + case CPP_N_INVALID: + /* Error already issued. */ + break; + } + result.high = result.low = 0; + break; + + case CPP_WCHAR: + case CPP_CHAR: + { + cppchar_t cc = cpp_interpret_charconst (pfile, token, + &temp, &unsignedp); + + result.high = 0; + result.low = cc; + /* Sign-extend the result if necessary. */ + if (!unsignedp && (cppchar_signed_t) cc < 0) + { + if (PART_PRECISION > BITS_PER_CPPCHAR_T) + result.low |= ~(~(cpp_num_part) 0 + >> (PART_PRECISION - BITS_PER_CPPCHAR_T)); + result.high = ~(cpp_num_part) 0; + result = num_trim (result, CPP_OPTION (pfile, precision)); + } + } + break; + + case CPP_NAME: + if (token->val.node == pfile->spec_nodes.n_defined) + return parse_defined (pfile); + else if (CPP_OPTION (pfile, cplusplus) + && (token->val.node == pfile->spec_nodes.n_true + || token->val.node == pfile->spec_nodes.n_false)) + { + result.high = 0; + result.low = (token->val.node == pfile->spec_nodes.n_true); + } + else + { + result.high = 0; + result.low = 0; + if (CPP_OPTION (pfile, warn_undef) && !pfile->state.skip_eval) + cpp_error (pfile, CPP_DL_WARNING, "\"%s\" is not defined", + NODE_NAME (token->val.node)); + } + break; + + default: /* CPP_HASH */ + _cpp_test_assertion (pfile, &temp); + result.high = 0; + result.low = temp; + } + + result.unsignedp = !!unsignedp; + return result; +} + +/* Operator precedence and flags table. + +After an operator is returned from the lexer, if it has priority less +than the operator on the top of the stack, we reduce the stack by one +operator and repeat the test. Since equal priorities do not reduce, +this is naturally right-associative. + +We handle left-associative operators by decrementing the priority of +just-lexed operators by one, but retaining the priority of operators +already on the stack. + +The remaining cases are '(' and ')'. We handle '(' by skipping the +reduction phase completely. ')' is given lower priority than +everything else, including '(', effectively forcing a reduction of the +parenthesized expression. If there is a matching '(', the routine +reduce() exits immediately. If the normal exit route sees a ')', then +there cannot have been a matching '(' and an error message is output. + +The parser assumes all shifted operators require a left operand unless +the flag NO_L_OPERAND is set. These semantics are automatic; any +extra semantics need to be handled with operator-specific code. */ + +/* Flags. If CHECK_PROMOTION, we warn if the effective sign of an + operand changes because of integer promotions. */ +#define NO_L_OPERAND (1 << 0) +#define LEFT_ASSOC (1 << 1) +#define CHECK_PROMOTION (1 << 2) + +/* Operator to priority map. Must be in the same order as the first + N entries of enum cpp_ttype. */ +static const struct cpp_operator +{ + uchar prio; + uchar flags; +} optab[] = +{ + /* EQ */ {0, 0}, /* Shouldn't happen. */ + /* NOT */ {16, NO_L_OPERAND}, + /* GREATER */ {12, LEFT_ASSOC | CHECK_PROMOTION}, + /* LESS */ {12, LEFT_ASSOC | CHECK_PROMOTION}, + /* PLUS */ {14, LEFT_ASSOC | CHECK_PROMOTION}, + /* MINUS */ {14, LEFT_ASSOC | CHECK_PROMOTION}, + /* MULT */ {15, LEFT_ASSOC | CHECK_PROMOTION}, + /* DIV */ {15, LEFT_ASSOC | CHECK_PROMOTION}, + /* MOD */ {15, LEFT_ASSOC | CHECK_PROMOTION}, + /* AND */ {9, LEFT_ASSOC | CHECK_PROMOTION}, + /* OR */ {7, LEFT_ASSOC | CHECK_PROMOTION}, + /* XOR */ {8, LEFT_ASSOC | CHECK_PROMOTION}, + /* RSHIFT */ {13, LEFT_ASSOC}, + /* LSHIFT */ {13, LEFT_ASSOC}, + + /* COMPL */ {16, NO_L_OPERAND}, + /* AND_AND */ {6, LEFT_ASSOC}, + /* OR_OR */ {5, LEFT_ASSOC}, + /* QUERY */ {3, 0}, + /* COLON */ {4, LEFT_ASSOC | CHECK_PROMOTION}, + /* COMMA */ {2, LEFT_ASSOC}, + /* OPEN_PAREN */ {1, NO_L_OPERAND}, + /* CLOSE_PAREN */ {0, 0}, + /* EOF */ {0, 0}, + /* EQ_EQ */ {11, LEFT_ASSOC}, + /* NOT_EQ */ {11, LEFT_ASSOC}, + /* GREATER_EQ */ {12, LEFT_ASSOC | CHECK_PROMOTION}, + /* LESS_EQ */ {12, LEFT_ASSOC | CHECK_PROMOTION}, + /* UPLUS */ {16, NO_L_OPERAND}, + /* UMINUS */ {16, NO_L_OPERAND} +}; + +/* Parse and evaluate a C expression, reading from PFILE. + Returns the truth value of the expression. + + The implementation is an operator precedence parser, i.e. a + bottom-up parser, using a stack for not-yet-reduced tokens. + + The stack base is op_stack, and the current stack pointer is 'top'. + There is a stack element for each operator (only), and the most + recently pushed operator is 'top->op'. An operand (value) is + stored in the 'value' field of the stack element of the operator + that precedes it. */ +bool +_cpp_parse_expr (cpp_reader *pfile) +{ + struct op *top = pfile->op_stack; + unsigned int lex_count; + bool saw_leading_not, want_value = true; + + pfile->state.skip_eval = 0; + + /* Set up detection of #if ! defined(). */ + pfile->mi_ind_cmacro = 0; + saw_leading_not = false; + lex_count = 0; + + /* Lowest priority operator prevents further reductions. */ + top->op = CPP_EOF; + + for (;;) + { + struct op op; + + lex_count++; + op.token = cpp_get_token (pfile); + op.op = op.token->type; + + switch (op.op) + { + /* These tokens convert into values. */ + case CPP_NUMBER: + case CPP_CHAR: + case CPP_WCHAR: + case CPP_NAME: + case CPP_HASH: + if (!want_value) + SYNTAX_ERROR2 ("missing binary operator before token \"%s\"", + cpp_token_as_text (pfile, op.token)); + want_value = false; + top->value = eval_token (pfile, op.token); + continue; + + case CPP_NOT: + saw_leading_not = lex_count == 1; + break; + case CPP_PLUS: + if (want_value) + op.op = CPP_UPLUS; + break; + case CPP_MINUS: + if (want_value) + op.op = CPP_UMINUS; + break; + + default: + if ((int) op.op <= (int) CPP_EQ || (int) op.op >= (int) CPP_PLUS_EQ) + SYNTAX_ERROR2 ("token \"%s\" is not valid in preprocessor expressions", + cpp_token_as_text (pfile, op.token)); + break; + } + + /* Check we have a value or operator as appropriate. */ + if (optab[op.op].flags & NO_L_OPERAND) + { + if (!want_value) + SYNTAX_ERROR2 ("missing binary operator before token \"%s\"", + cpp_token_as_text (pfile, op.token)); + } + else if (want_value) + { + /* We want a number (or expression) and haven't got one. + Try to emit a specific diagnostic. */ + if (op.op == CPP_CLOSE_PAREN && top->op == CPP_OPEN_PAREN) + SYNTAX_ERROR ("missing expression between '(' and ')'"); + + if (op.op == CPP_EOF && top->op == CPP_EOF) + SYNTAX_ERROR ("#if with no expression"); + + if (top->op != CPP_EOF && top->op != CPP_OPEN_PAREN) + SYNTAX_ERROR2 ("operator '%s' has no right operand", + cpp_token_as_text (pfile, top->token)); + else if (op.op == CPP_CLOSE_PAREN || op.op == CPP_EOF) + /* Complain about missing paren during reduction. */; + else + SYNTAX_ERROR2 ("operator '%s' has no left operand", + cpp_token_as_text (pfile, op.token)); + } + + top = reduce (pfile, top, op.op); + if (!top) + goto syntax_error; + + if (op.op == CPP_EOF) + break; + + switch (op.op) + { + case CPP_CLOSE_PAREN: + continue; + case CPP_OR_OR: + if (!num_zerop (top->value)) + pfile->state.skip_eval++; + break; + case CPP_AND_AND: + case CPP_QUERY: + if (num_zerop (top->value)) + pfile->state.skip_eval++; + break; + case CPP_COLON: + if (top->op != CPP_QUERY) + SYNTAX_ERROR (" ':' without preceding '?'"); + if (!num_zerop (top[-1].value)) /* Was '?' condition true? */ + pfile->state.skip_eval++; + else + pfile->state.skip_eval--; + default: + break; + } + + want_value = true; + + /* Check for and handle stack overflow. */ + if (++top == pfile->op_limit) + top = _cpp_expand_op_stack (pfile); + + top->op = op.op; + top->token = op.token; + } + + /* The controlling macro expression is only valid if we called lex 3 + times: and . push_conditional () + checks that we are at top-of-file. */ + if (pfile->mi_ind_cmacro && !(saw_leading_not && lex_count == 3)) + pfile->mi_ind_cmacro = 0; + + if (top != pfile->op_stack) + { + cpp_error (pfile, CPP_DL_ICE, "unbalanced stack in #if"); + syntax_error: + return false; /* Return false on syntax error. */ + } + + return !num_zerop (top->value); +} + +/* Reduce the operator / value stack if possible, in preparation for + pushing operator OP. Returns NULL on error, otherwise the top of + the stack. */ +static struct op * +reduce (cpp_reader *pfile, struct op *top, enum cpp_ttype op) +{ + unsigned int prio; + + if (top->op <= CPP_EQ || top->op > CPP_LAST_CPP_OP + 2) + { + bad_op: + cpp_error (pfile, CPP_DL_ICE, "impossible operator '%u'", top->op); + return 0; + } + + if (op == CPP_OPEN_PAREN) + return top; + + /* Decrement the priority of left-associative operators to force a + reduction with operators of otherwise equal priority. */ + prio = optab[op].prio - ((optab[op].flags & LEFT_ASSOC) != 0); + while (prio < optab[top->op].prio) + { + if (CPP_OPTION (pfile, warn_num_sign_change) + && optab[top->op].flags & CHECK_PROMOTION) + check_promotion (pfile, top); + + switch (top->op) + { + case CPP_UPLUS: + case CPP_UMINUS: + case CPP_NOT: + case CPP_COMPL: + top[-1].value = num_unary_op (pfile, top->value, top->op); + break; + + case CPP_PLUS: + case CPP_MINUS: + case CPP_RSHIFT: + case CPP_LSHIFT: + case CPP_COMMA: + top[-1].value = num_binary_op (pfile, top[-1].value, + top->value, top->op); + break; + + case CPP_GREATER: + case CPP_LESS: + case CPP_GREATER_EQ: + case CPP_LESS_EQ: + top[-1].value + = num_inequality_op (pfile, top[-1].value, top->value, top->op); + break; + + case CPP_EQ_EQ: + case CPP_NOT_EQ: + top[-1].value + = num_equality_op (pfile, top[-1].value, top->value, top->op); + break; + + case CPP_AND: + case CPP_OR: + case CPP_XOR: + top[-1].value + = num_bitwise_op (pfile, top[-1].value, top->value, top->op); + break; + + case CPP_MULT: + top[-1].value = num_mul (pfile, top[-1].value, top->value); + break; + + case CPP_DIV: + case CPP_MOD: + top[-1].value = num_div_op (pfile, top[-1].value, + top->value, top->op); + break; + + case CPP_OR_OR: + top--; + if (!num_zerop (top->value)) + pfile->state.skip_eval--; + top->value.low = (!num_zerop (top->value) + || !num_zerop (top[1].value)); + top->value.high = 0; + top->value.unsignedp = false; + top->value.overflow = false; + continue; + + case CPP_AND_AND: + top--; + if (num_zerop (top->value)) + pfile->state.skip_eval--; + top->value.low = (!num_zerop (top->value) + && !num_zerop (top[1].value)); + top->value.high = 0; + top->value.unsignedp = false; + top->value.overflow = false; + continue; + + case CPP_OPEN_PAREN: + if (op != CPP_CLOSE_PAREN) + { + cpp_error (pfile, CPP_DL_ERROR, "missing ')' in expression"); + return 0; + } + top--; + top->value = top[1].value; + return top; + + case CPP_COLON: + top -= 2; + if (!num_zerop (top->value)) + { + pfile->state.skip_eval--; + top->value = top[1].value; + } + else + top->value = top[2].value; + top->value.unsignedp = (top[1].value.unsignedp + || top[2].value.unsignedp); + continue; + + case CPP_QUERY: + cpp_error (pfile, CPP_DL_ERROR, "'?' without following ':'"); + return 0; + + default: + goto bad_op; + } + + top--; + if (top->value.overflow && !pfile->state.skip_eval) + cpp_error (pfile, CPP_DL_PEDWARN, + "integer overflow in preprocessor expression"); + } + + if (op == CPP_CLOSE_PAREN) + { + cpp_error (pfile, CPP_DL_ERROR, "missing '(' in expression"); + return 0; + } + + return top; +} + +/* Returns the position of the old top of stack after expansion. */ +struct op * +_cpp_expand_op_stack (cpp_reader *pfile) +{ + size_t old_size = (size_t) (pfile->op_limit - pfile->op_stack); + size_t new_size = old_size * 2 + 20; + + pfile->op_stack = XRESIZEVEC (struct op, pfile->op_stack, new_size); + pfile->op_limit = pfile->op_stack + new_size; + + return pfile->op_stack + old_size; +} + +/* Emits a warning if the effective sign of either operand of OP + changes because of integer promotions. */ +static void +check_promotion (cpp_reader *pfile, const struct op *op) +{ + if (op->value.unsignedp == op[-1].value.unsignedp) + return; + + if (op->value.unsignedp) + { + if (!num_positive (op[-1].value, CPP_OPTION (pfile, precision))) + cpp_error (pfile, CPP_DL_WARNING, + "the left operand of \"%s\" changes sign when promoted", + cpp_token_as_text (pfile, op->token)); + } + else if (!num_positive (op->value, CPP_OPTION (pfile, precision))) + cpp_error (pfile, CPP_DL_WARNING, + "the right operand of \"%s\" changes sign when promoted", + cpp_token_as_text (pfile, op->token)); +} + +/* Clears the unused high order bits of the number pointed to by PNUM. */ +static cpp_num +num_trim (cpp_num num, size_t precision) +{ + if (precision > PART_PRECISION) + { + precision -= PART_PRECISION; + if (precision < PART_PRECISION) + num.high &= ((cpp_num_part) 1 << precision) - 1; + } + else + { + if (precision < PART_PRECISION) + num.low &= ((cpp_num_part) 1 << precision) - 1; + num.high = 0; + } + + return num; +} + +/* True iff A (presumed signed) >= 0. */ +static bool +num_positive (cpp_num num, size_t precision) +{ + if (precision > PART_PRECISION) + { + precision -= PART_PRECISION; + return (num.high & (cpp_num_part) 1 << (precision - 1)) == 0; + } + + return (num.low & (cpp_num_part) 1 << (precision - 1)) == 0; +} + +/* Sign extend a number, with PRECISION significant bits and all + others assumed clear, to fill out a cpp_num structure. */ +cpp_num +cpp_num_sign_extend (cpp_num num, size_t precision) +{ + if (!num.unsignedp) + { + if (precision > PART_PRECISION) + { + precision -= PART_PRECISION; + if (precision < PART_PRECISION + && (num.high & (cpp_num_part) 1 << (precision - 1))) + num.high |= ~(~(cpp_num_part) 0 >> (PART_PRECISION - precision)); + } + else if (num.low & (cpp_num_part) 1 << (precision - 1)) + { + if (precision < PART_PRECISION) + num.low |= ~(~(cpp_num_part) 0 >> (PART_PRECISION - precision)); + num.high = ~(cpp_num_part) 0; + } + } + + return num; +} + +/* Returns the negative of NUM. */ +static cpp_num +num_negate (cpp_num num, size_t precision) +{ + cpp_num copy; + + copy = num; + num.high = ~num.high; + num.low = ~num.low; + if (++num.low == 0) + num.high++; + num = num_trim (num, precision); + num.overflow = (!num.unsignedp && num_eq (num, copy) && !num_zerop (num)); + + return num; +} + +/* Returns true if A >= B. */ +static bool +num_greater_eq (cpp_num pa, cpp_num pb, size_t precision) +{ + bool unsignedp; + + unsignedp = pa.unsignedp || pb.unsignedp; + + if (!unsignedp) + { + /* Both numbers have signed type. If they are of different + sign, the answer is the sign of A. */ + unsignedp = num_positive (pa, precision); + + if (unsignedp != num_positive (pb, precision)) + return unsignedp; + + /* Otherwise we can do an unsigned comparison. */ + } + + return (pa.high > pb.high) || (pa.high == pb.high && pa.low >= pb.low); +} + +/* Returns LHS OP RHS, where OP is a bit-wise operation. */ +static cpp_num +num_bitwise_op (cpp_reader *pfile ATTRIBUTE_UNUSED, + cpp_num lhs, cpp_num rhs, enum cpp_ttype op) +{ + lhs.overflow = false; + lhs.unsignedp = lhs.unsignedp || rhs.unsignedp; + + /* As excess precision is zeroed, there is no need to num_trim () as + these operations cannot introduce a set bit there. */ + if (op == CPP_AND) + { + lhs.low &= rhs.low; + lhs.high &= rhs.high; + } + else if (op == CPP_OR) + { + lhs.low |= rhs.low; + lhs.high |= rhs.high; + } + else + { + lhs.low ^= rhs.low; + lhs.high ^= rhs.high; + } + + return lhs; +} + +/* Returns LHS OP RHS, where OP is an inequality. */ +static cpp_num +num_inequality_op (cpp_reader *pfile, cpp_num lhs, cpp_num rhs, + enum cpp_ttype op) +{ + bool gte = num_greater_eq (lhs, rhs, CPP_OPTION (pfile, precision)); + + if (op == CPP_GREATER_EQ) + lhs.low = gte; + else if (op == CPP_LESS) + lhs.low = !gte; + else if (op == CPP_GREATER) + lhs.low = gte && !num_eq (lhs, rhs); + else /* CPP_LESS_EQ. */ + lhs.low = !gte || num_eq (lhs, rhs); + + lhs.high = 0; + lhs.overflow = false; + lhs.unsignedp = false; + return lhs; +} + +/* Returns LHS OP RHS, where OP is == or !=. */ +static cpp_num +num_equality_op (cpp_reader *pfile ATTRIBUTE_UNUSED, + cpp_num lhs, cpp_num rhs, enum cpp_ttype op) +{ + /* Work around a 3.0.4 bug; see PR 6950. */ + bool eq = num_eq (lhs, rhs); + if (op == CPP_NOT_EQ) + eq = !eq; + lhs.low = eq; + lhs.high = 0; + lhs.overflow = false; + lhs.unsignedp = false; + return lhs; +} + +/* Shift NUM, of width PRECISION, right by N bits. */ +static cpp_num +num_rshift (cpp_num num, size_t precision, size_t n) +{ + cpp_num_part sign_mask; + bool x = num_positive (num, precision); + + if (num.unsignedp || x) + sign_mask = 0; + else + sign_mask = ~(cpp_num_part) 0; + + if (n >= precision) + num.high = num.low = sign_mask; + else + { + /* Sign-extend. */ + if (precision < PART_PRECISION) + num.high = sign_mask, num.low |= sign_mask << precision; + else if (precision < 2 * PART_PRECISION) + num.high |= sign_mask << (precision - PART_PRECISION); + + if (n >= PART_PRECISION) + { + n -= PART_PRECISION; + num.low = num.high; + num.high = sign_mask; + } + + if (n) + { + num.low = (num.low >> n) | (num.high << (PART_PRECISION - n)); + num.high = (num.high >> n) | (sign_mask << (PART_PRECISION - n)); + } + } + + num = num_trim (num, precision); + num.overflow = false; + return num; +} + +/* Shift NUM, of width PRECISION, left by N bits. */ +static cpp_num +num_lshift (cpp_num num, size_t precision, size_t n) +{ + if (n >= precision) + { + num.overflow = !num.unsignedp && !num_zerop (num); + num.high = num.low = 0; + } + else + { + cpp_num orig, maybe_orig; + size_t m = n; + + orig = num; + if (m >= PART_PRECISION) + { + m -= PART_PRECISION; + num.high = num.low; + num.low = 0; + } + if (m) + { + num.high = (num.high << m) | (num.low >> (PART_PRECISION - m)); + num.low <<= m; + } + num = num_trim (num, precision); + + if (num.unsignedp) + num.overflow = false; + else + { + maybe_orig = num_rshift (num, precision, n); + num.overflow = !num_eq (orig, maybe_orig); + } + } + + return num; +} + +/* The four unary operators: +, -, ! and ~. */ +static cpp_num +num_unary_op (cpp_reader *pfile, cpp_num num, enum cpp_ttype op) +{ + switch (op) + { + case CPP_UPLUS: + if (CPP_WTRADITIONAL (pfile) && !pfile->state.skip_eval) + cpp_error (pfile, CPP_DL_WARNING, + "traditional C rejects the unary plus operator"); + num.overflow = false; + break; + + case CPP_UMINUS: + num = num_negate (num, CPP_OPTION (pfile, precision)); + break; + + case CPP_COMPL: + num.high = ~num.high; + num.low = ~num.low; + num = num_trim (num, CPP_OPTION (pfile, precision)); + num.overflow = false; + break; + + default: /* case CPP_NOT: */ + num.low = num_zerop (num); + num.high = 0; + num.overflow = false; + num.unsignedp = false; + break; + } + + return num; +} + +/* The various binary operators. */ +static cpp_num +num_binary_op (cpp_reader *pfile, cpp_num lhs, cpp_num rhs, enum cpp_ttype op) +{ + cpp_num result; + size_t precision = CPP_OPTION (pfile, precision); + size_t n; + + switch (op) + { + /* Shifts. */ + case CPP_LSHIFT: + case CPP_RSHIFT: + if (!rhs.unsignedp && !num_positive (rhs, precision)) + { + /* A negative shift is a positive shift the other way. */ + if (op == CPP_LSHIFT) + op = CPP_RSHIFT; + else + op = CPP_LSHIFT; + rhs = num_negate (rhs, precision); + } + if (rhs.high) + n = ~0; /* Maximal. */ + else + n = rhs.low; + if (op == CPP_LSHIFT) + lhs = num_lshift (lhs, precision, n); + else + lhs = num_rshift (lhs, precision, n); + break; + + /* Arithmetic. */ + case CPP_MINUS: + rhs = num_negate (rhs, precision); + case CPP_PLUS: + result.low = lhs.low + rhs.low; + result.high = lhs.high + rhs.high; + if (result.low < lhs.low) + result.high++; + result.unsignedp = lhs.unsignedp || rhs.unsignedp; + result.overflow = false; + + result = num_trim (result, precision); + if (!result.unsignedp) + { + bool lhsp = num_positive (lhs, precision); + result.overflow = (lhsp == num_positive (rhs, precision) + && lhsp != num_positive (result, precision)); + } + return result; + + /* Comma. */ + default: /* case CPP_COMMA: */ + if (CPP_PEDANTIC (pfile) && (!CPP_OPTION (pfile, c99) + || !pfile->state.skip_eval)) + cpp_error (pfile, CPP_DL_PEDWARN, + "comma operator in operand of #if"); + lhs = rhs; + break; + } + + return lhs; +} + +/* Multiplies two unsigned cpp_num_parts to give a cpp_num. This + cannot overflow. */ +static cpp_num +num_part_mul (cpp_num_part lhs, cpp_num_part rhs) +{ + cpp_num result; + cpp_num_part middle[2], temp; + + result.low = LOW_PART (lhs) * LOW_PART (rhs); + result.high = HIGH_PART (lhs) * HIGH_PART (rhs); + + middle[0] = LOW_PART (lhs) * HIGH_PART (rhs); + middle[1] = HIGH_PART (lhs) * LOW_PART (rhs); + + temp = result.low; + result.low += LOW_PART (middle[0]) << (PART_PRECISION / 2); + if (result.low < temp) + result.high++; + + temp = result.low; + result.low += LOW_PART (middle[1]) << (PART_PRECISION / 2); + if (result.low < temp) + result.high++; + + result.high += HIGH_PART (middle[0]); + result.high += HIGH_PART (middle[1]); + result.unsignedp = true; + result.overflow = false; + + return result; +} + +/* Multiply two preprocessing numbers. */ +static cpp_num +num_mul (cpp_reader *pfile, cpp_num lhs, cpp_num rhs) +{ + cpp_num result, temp; + bool unsignedp = lhs.unsignedp || rhs.unsignedp; + bool overflow, negate = false; + size_t precision = CPP_OPTION (pfile, precision); + + /* Prepare for unsigned multiplication. */ + if (!unsignedp) + { + if (!num_positive (lhs, precision)) + negate = !negate, lhs = num_negate (lhs, precision); + if (!num_positive (rhs, precision)) + negate = !negate, rhs = num_negate (rhs, precision); + } + + overflow = lhs.high && rhs.high; + result = num_part_mul (lhs.low, rhs.low); + + temp = num_part_mul (lhs.high, rhs.low); + result.high += temp.low; + if (temp.high) + overflow = true; + + temp = num_part_mul (lhs.low, rhs.high); + result.high += temp.low; + if (temp.high) + overflow = true; + + temp.low = result.low, temp.high = result.high; + result = num_trim (result, precision); + if (!num_eq (result, temp)) + overflow = true; + + if (negate) + result = num_negate (result, precision); + + if (unsignedp) + result.overflow = false; + else + result.overflow = overflow || (num_positive (result, precision) ^ !negate + && !num_zerop (result)); + result.unsignedp = unsignedp; + + return result; +} + +/* Divide two preprocessing numbers, returning the answer or the + remainder depending upon OP. */ +static cpp_num +num_div_op (cpp_reader *pfile, cpp_num lhs, cpp_num rhs, enum cpp_ttype op) +{ + cpp_num result, sub; + cpp_num_part mask; + bool unsignedp = lhs.unsignedp || rhs.unsignedp; + bool negate = false, lhs_neg = false; + size_t i, precision = CPP_OPTION (pfile, precision); + + /* Prepare for unsigned division. */ + if (!unsignedp) + { + if (!num_positive (lhs, precision)) + negate = !negate, lhs_neg = true, lhs = num_negate (lhs, precision); + if (!num_positive (rhs, precision)) + negate = !negate, rhs = num_negate (rhs, precision); + } + + /* Find the high bit. */ + if (rhs.high) + { + i = precision - 1; + mask = (cpp_num_part) 1 << (i - PART_PRECISION); + for (; ; i--, mask >>= 1) + if (rhs.high & mask) + break; + } + else if (rhs.low) + { + if (precision > PART_PRECISION) + i = precision - PART_PRECISION - 1; + else + i = precision - 1; + mask = (cpp_num_part) 1 << i; + for (; ; i--, mask >>= 1) + if (rhs.low & mask) + break; + } + else + { + if (!pfile->state.skip_eval) + cpp_error (pfile, CPP_DL_ERROR, "division by zero in #if"); + return lhs; + } + + /* First nonzero bit of RHS is bit I. Do naive division by + shifting the RHS fully left, and subtracting from LHS if LHS is + at least as big, and then repeating but with one less shift. + This is not very efficient, but is easy to understand. */ + + rhs.unsignedp = true; + lhs.unsignedp = true; + i = precision - i - 1; + sub = num_lshift (rhs, precision, i); + + result.high = result.low = 0; + for (;;) + { + if (num_greater_eq (lhs, sub, precision)) + { + lhs = num_binary_op (pfile, lhs, sub, CPP_MINUS); + if (i >= PART_PRECISION) + result.high |= (cpp_num_part) 1 << (i - PART_PRECISION); + else + result.low |= (cpp_num_part) 1 << i; + } + if (i-- == 0) + break; + sub.low = (sub.low >> 1) | (sub.high << (PART_PRECISION - 1)); + sub.high >>= 1; + } + + /* We divide so that the remainder has the sign of the LHS. */ + if (op == CPP_DIV) + { + result.unsignedp = unsignedp; + result.overflow = false; + if (!unsignedp) + { + if (negate) + result = num_negate (result, precision); + result.overflow = (num_positive (result, precision) ^ !negate + && !num_zerop (result)); + } + + return result; + } + + /* CPP_MOD. */ + lhs.unsignedp = unsignedp; + lhs.overflow = false; + if (lhs_neg) + lhs = num_negate (lhs, precision); + + return lhs; +} diff --git a/support/cpp/libcpp/files.c b/support/cpp/libcpp/files.c new file mode 100644 index 0000000..469a73a --- /dev/null +++ b/support/cpp/libcpp/files.c @@ -0,0 +1,1813 @@ +/* Part of CPP library. File handling. + Copyright (C) 1986, 1987, 1989, 1992, 1993, 1994, 1995, 1998, + 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 + Free Software Foundation, Inc. + Written by Per Bothner, 1994. + Based on CCCP program by Paul Rubin, June 1986 + Adapted to ANSI C, Richard Stallman, Jan 1987 + Split out of cpplib.c, Zack Weinberg, Oct 1998 + Reimplemented, Neil Booth, Jul 2003 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ + +#include "config.h" +#include "system.h" +#include "cpplib.h" +#include "internal.h" +#include "mkdeps.h" +#include "obstack.h" +#include "hashtab.h" +#include "md5.h" +#include + +/* Variable length record files on VMS will have a stat size that includes + record control characters that won't be included in the read size. */ +#ifdef VMS +# define FAB_C_VAR 2 /* variable length records (see Starlet fabdef.h) */ +# define STAT_SIZE_RELIABLE(ST) ((ST).st_fab_rfm != FAB_C_VAR) +#else +# define STAT_SIZE_RELIABLE(ST) true +#endif + +#ifdef __DJGPP__ +#include + /* For DJGPP redirected input is opened in text mode. */ +# define set_stdin_to_binary_mode() \ + if (! isatty (0)) setmode (0, O_BINARY) +#else +# define set_stdin_to_binary_mode() /* Nothing */ +#endif + +/* This structure represents a file searched for by CPP, whether it + exists or not. An instance may be pointed to by more than one + file_hash_entry; at present no reference count is kept. */ +struct _cpp_file +{ + /* Filename as given to #include or command line switch. */ + const char *name; + + /* The full path used to find the file. */ + const char *path; + + /* The full path of the pch file. */ + const char *pchname; + + /* The file's path with the basename stripped. NULL if it hasn't + been calculated yet. */ + const char *dir_name; + + /* Chain through all files. */ + struct _cpp_file *next_file; + + /* The contents of NAME after calling read_file(). */ + const uchar *buffer; + + /* The macro, if any, preventing re-inclusion. */ + const cpp_hashnode *cmacro; + + /* The directory in the search path where FILE was found. Used for + #include_next and determining whether a header is a system + header. */ + cpp_dir *dir; + + /* As filled in by stat(2) for the file. */ + struct stat st; + + /* File descriptor. Invalid if -1, otherwise open. */ + int fd; + + /* Zero if this file was successfully opened and stat()-ed, + otherwise errno obtained from failure. */ + int err_no; + + /* Number of times the file has been stacked for preprocessing. */ + unsigned short stack_count; + + /* If opened with #import or contains #pragma once. */ + bool once_only; + + /* If read() failed before. */ + bool dont_read; + + /* If this file is the main file. */ + bool main_file; + + /* If BUFFER above contains the true contents of the file. */ + bool buffer_valid; + + /* File is a PCH (on return from find_include_file). */ + bool pch; +}; + +/* A singly-linked list for all searches for a given file name, with + its head pointed to by a slot in FILE_HASH. The file name is what + appeared between the quotes in a #include directive; it can be + determined implicitly from the hash table location or explicitly + from FILE->name. + + FILE is a structure containing details about the file that was + found with that search, or details of how the search failed. + + START_DIR is the starting location of the search in the include + chain. The current directories for "" includes are also hashed in + the hash table and therefore unique. Files that are looked up + without using a search path, such as absolute filenames and file + names from the command line share a special starting directory so + they don't cause cache hits with normal include-chain lookups. + + If START_DIR is NULL then the entry is for a directory, not a file, + and the directory is in DIR. Since the starting point in a file + lookup chain is never NULL, this means that simple pointer + comparisons against START_DIR can be made to determine cache hits + in file lookups. + + If a cache lookup fails because of e.g. an extra "./" in the path, + then nothing will break. It is just less efficient as CPP will + have to do more work re-preprocessing the file, and/or comparing + its contents against earlier once-only files. +*/ +struct file_hash_entry +{ + struct file_hash_entry *next; + cpp_dir *start_dir; + source_location location; + union + { + _cpp_file *file; + cpp_dir *dir; + } u; +}; + +/* Number of entries to put in a file_hash_entry pool. */ +#define FILE_HASH_POOL_SIZE 127 + +/* A file hash entry pool. We allocate file_hash_entry object from + one of these. */ +struct file_hash_entry_pool +{ + /* Number of entries used from this pool. */ + unsigned int file_hash_entries_used; + /* Next pool in the chain; used when freeing. */ + struct file_hash_entry_pool *next; + /* The memory pool. */ + struct file_hash_entry pool[FILE_HASH_POOL_SIZE]; +}; + +static bool open_file (_cpp_file *file); +static bool pch_open_file (cpp_reader *pfile, _cpp_file *file, + bool *invalid_pch); +static bool find_file_in_dir (cpp_reader *pfile, _cpp_file *file, + bool *invalid_pch); +static bool read_file_guts (cpp_reader *pfile, _cpp_file *file); +static bool read_file (cpp_reader *pfile, _cpp_file *file); +static bool should_stack_file (cpp_reader *, _cpp_file *file, bool import); +static struct cpp_dir *search_path_head (cpp_reader *, const char *fname, + int angle_brackets, enum include_type); +static const char *dir_name_of_file (_cpp_file *file); +static void open_file_failed (cpp_reader *pfile, _cpp_file *file, int); +static struct file_hash_entry *search_cache (struct file_hash_entry *head, + const cpp_dir *start_dir); +static _cpp_file *make_cpp_file (cpp_reader *, cpp_dir *, const char *fname); +static void destroy_cpp_file (_cpp_file *); +static cpp_dir *make_cpp_dir (cpp_reader *, const char *dir_name, int sysp); +static void allocate_file_hash_entries (cpp_reader *pfile); +static struct file_hash_entry *new_file_hash_entry (cpp_reader *pfile); +static int report_missing_guard (void **slot, void *b); +static hashval_t file_hash_hash (const void *p); +static int file_hash_eq (const void *p, const void *q); +static char *read_filename_string (int ch, FILE *f); +static void read_name_map (cpp_dir *dir); +static char *remap_filename (cpp_reader *pfile, _cpp_file *file); +static char *append_file_to_dir (const char *fname, cpp_dir *dir); +static bool validate_pch (cpp_reader *, _cpp_file *file, const char *pchname); +static int pchf_save_compare (const void *e1, const void *e2); +static int pchf_compare (const void *d_p, const void *e_p); +static bool check_file_against_entries (cpp_reader *, _cpp_file *, bool); + +/* Given a filename in FILE->PATH, with the empty string interpreted + as , open it. + + On success FILE contains an open file descriptor and stat + information for the file. On failure the file descriptor is -1 and + the appropriate errno is also stored in FILE. Returns TRUE iff + successful. + + We used to open files in nonblocking mode, but that caused more + problems than it solved. Do take care not to acquire a controlling + terminal by mistake (this can't happen on sane systems, but + paranoia is a virtue). + + Use the three-argument form of open even though we aren't + specifying O_CREAT, to defend against broken system headers. + + O_BINARY tells some runtime libraries (notably DJGPP) not to do + newline translation; we can handle DOS line breaks just fine + ourselves. */ +static bool +open_file (_cpp_file *file) +{ + if (file->path[0] == '\0') + { + file->fd = 0; + set_stdin_to_binary_mode (); + } + else + file->fd = open (file->path, O_RDONLY | O_NOCTTY | O_BINARY, 0666); + + if (file->fd != -1) + { + if (fstat (file->fd, &file->st) == 0) + { + if (!S_ISDIR (file->st.st_mode)) + { + file->err_no = 0; + return true; + } + + /* Ignore a directory and continue the search. The file we're + looking for may be elsewhere in the search path. */ + errno = ENOENT; + } + + close (file->fd); + file->fd = -1; + } +#if defined(_WIN32) && !defined(__CYGWIN__) + else if (errno == EACCES) + { + /* On most UNIX systems, open succeeds on a directory. Above, + we check if we have opened a directory and if so, set errno + to ENOENT. However, on Windows, opening a directory + fails with EACCES. We want to return ENOENT in that + case too. */ + if (stat (file->path, &file->st) == 0 + && S_ISDIR (file->st.st_mode)) + errno = ENOENT; + else + /* The call to stat may have reset errno. */ + errno = EACCES; + } +#endif + else if (errno == ENOTDIR) + errno = ENOENT; + + file->err_no = errno; + + return false; +} + +/* Temporary PCH intercept of opening a file. Try to find a PCH file + based on FILE->name and FILE->dir, and test those found for + validity using PFILE->cb.valid_pch. Return true iff a valid file is + found. Set *INVALID_PCH if a PCH file is found but wasn't valid. */ + +static bool +pch_open_file (cpp_reader *pfile, _cpp_file *file, bool *invalid_pch) +{ + static const char extension[] = ".gch"; + const char *path = file->path; + size_t len, flen; + char *pchname; + struct stat st; + bool valid = false; + + /* No PCH on or if not requested. */ + if (file->name[0] == '\0' || !pfile->cb.valid_pch) + return false; + + flen = strlen (path); + len = flen + sizeof (extension); + pchname = XNEWVEC (char, len); + memcpy (pchname, path, flen); + memcpy (pchname + flen, extension, sizeof (extension)); + + if (stat (pchname, &st) == 0) + { + DIR *pchdir; + struct dirent *d; + size_t dlen, plen = len; + + if (!S_ISDIR (st.st_mode)) + valid = validate_pch (pfile, file, pchname); + else if ((pchdir = opendir (pchname)) != NULL) + { + pchname[plen - 1] = '/'; + while ((d = readdir (pchdir)) != NULL) + { + dlen = strlen (d->d_name) + 1; + if ((strcmp (d->d_name, ".") == 0) + || (strcmp (d->d_name, "..") == 0)) + continue; + if (dlen + plen > len) + { + len += dlen + 64; + pchname = XRESIZEVEC (char, pchname, len); + } + memcpy (pchname + plen, d->d_name, dlen); + valid = validate_pch (pfile, file, pchname); + if (valid) + break; + } + closedir (pchdir); + } + if (valid) + file->pch = true; + else + *invalid_pch = true; + } + + if (valid) + file->pchname = pchname; + else + free (pchname); + + return valid; +} + +/* Try to open the path FILE->name appended to FILE->dir. This is + where remap and PCH intercept the file lookup process. Return true + if the file was found, whether or not the open was successful. + Set *INVALID_PCH to true if a PCH file is found but wasn't valid. */ + +static bool +find_file_in_dir (cpp_reader *pfile, _cpp_file *file, bool *invalid_pch) +{ + char *path; + + if (CPP_OPTION (pfile, remap) && (path = remap_filename (pfile, file))) + ; + else + if (file->dir->construct) + path = file->dir->construct (file->name, file->dir); + else + path = append_file_to_dir (file->name, file->dir); + + if (path) + { + hashval_t hv = htab_hash_string (path); + char *copy; + void **pp; + + if (htab_find_with_hash (pfile->nonexistent_file_hash, path, hv) != NULL) + { + file->err_no = ENOENT; + return false; + } + + file->path = path; + if (pch_open_file (pfile, file, invalid_pch)) + return true; + + if (open_file (file)) + return true; + + if (file->err_no != ENOENT) + { + open_file_failed (pfile, file, 0); + return true; + } + + /* We copy the path name onto an obstack partly so that we don't + leak the memory, but mostly so that we don't fragment the + heap. */ + copy = obstack_copy0 (&pfile->nonexistent_file_ob, path, + strlen (path)); + free (path); + pp = htab_find_slot_with_hash (pfile->nonexistent_file_hash, + copy, hv, INSERT); + *pp = copy; + + file->path = file->name; + } + else + { + file->err_no = ENOENT; + file->path = NULL; + } + + return false; +} + +/* Return tue iff the missing_header callback found the given HEADER. */ +static bool +search_path_exhausted (cpp_reader *pfile, const char *header, _cpp_file *file) +{ + missing_header_cb func = pfile->cb.missing_header; + + /* When the regular search path doesn't work, try context dependent + headers search paths. */ + if (func + && file->dir == NULL) + { + if ((file->path = func (pfile, header, &file->dir)) != NULL) + { + if (open_file (file)) + return true; + free ((void *)file->path); + } + file->path = file->name; + } + + return false; +} + +bool +_cpp_find_failed (_cpp_file *file) +{ + return file->err_no != 0; +} + +/* Given a filename FNAME search for such a file in the include path + starting from START_DIR. If FNAME is the empty string it is + interpreted as STDIN if START_DIR is PFILE->no_search_path. + + If the file is not found in the file cache fall back to the O/S and + add the result to our cache. + + If the file was not found in the filesystem, or there was an error + opening it, then ERR_NO is nonzero and FD is -1. If the file was + found, then ERR_NO is zero and FD could be -1 or an open file + descriptor. FD can be -1 if the file was found in the cache and + had previously been closed. To open it again pass the return value + to open_file(). +*/ +_cpp_file * +_cpp_find_file (cpp_reader *pfile, const char *fname, cpp_dir *start_dir, bool fake, int angle_brackets) +{ + struct file_hash_entry *entry, **hash_slot; + _cpp_file *file; + bool invalid_pch = false; + bool saw_bracket_include = false; + bool saw_quote_include = false; + struct cpp_dir *found_in_cache = NULL; + + /* Ensure we get no confusion between cached files and directories. */ + if (start_dir == NULL) + cpp_error (pfile, CPP_DL_ICE, "NULL directory in find_file"); + + hash_slot = (struct file_hash_entry **) + htab_find_slot_with_hash (pfile->file_hash, fname, + htab_hash_string (fname), + INSERT); + + /* First check the cache before we resort to memory allocation. */ + entry = search_cache (*hash_slot, start_dir); + if (entry) + return entry->u.file; + + file = make_cpp_file (pfile, start_dir, fname); + + /* Try each path in the include chain. */ + for (; !fake ;) + { + if (find_file_in_dir (pfile, file, &invalid_pch)) + break; + + file->dir = file->dir->next; + if (file->dir == NULL) + { + if (search_path_exhausted (pfile, fname, file)) + { + /* Although this file must not go in the cache, because + the file found might depend on things (like the current file) + that aren't represented in the cache, it still has to go in + the list of all files so that #import works. */ + file->next_file = pfile->all_files; + pfile->all_files = file; + return file; + } + + open_file_failed (pfile, file, angle_brackets); + if (invalid_pch) + { + cpp_error (pfile, CPP_DL_ERROR, + "one or more PCH files were found, but they were invalid"); + if (!cpp_get_options (pfile)->warn_invalid_pch) + cpp_error (pfile, CPP_DL_ERROR, + "use -Winvalid-pch for more information"); + } + break; + } + + /* Only check the cache for the starting location (done above) + and the quote and bracket chain heads because there are no + other possible starting points for searches. */ + if (file->dir == pfile->bracket_include) + saw_bracket_include = true; + else if (file->dir == pfile->quote_include) + saw_quote_include = true; + else + continue; + + entry = search_cache (*hash_slot, file->dir); + if (entry) + { + found_in_cache = file->dir; + break; + } + } + + if (entry) + { + /* Cache for START_DIR too, sharing the _cpp_file structure. */ + free ((char *) file->name); + free (file); + file = entry->u.file; + } + else + { + /* This is a new file; put it in the list. */ + file->next_file = pfile->all_files; + pfile->all_files = file; + } + + /* Store this new result in the hash table. */ + entry = new_file_hash_entry (pfile); + entry->next = *hash_slot; + entry->start_dir = start_dir; + entry->location = pfile->line_table->highest_location; + entry->u.file = file; + *hash_slot = entry; + + /* If we passed the quote or bracket chain heads, cache them also. + This speeds up processing if there are lots of -I options. */ + if (saw_bracket_include + && pfile->bracket_include != start_dir + && found_in_cache != pfile->bracket_include) + { + entry = new_file_hash_entry (pfile); + entry->next = *hash_slot; + entry->start_dir = pfile->bracket_include; + entry->location = pfile->line_table->highest_location; + entry->u.file = file; + *hash_slot = entry; + } + if (saw_quote_include + && pfile->quote_include != start_dir + && found_in_cache != pfile->quote_include) + { + entry = new_file_hash_entry (pfile); + entry->next = *hash_slot; + entry->start_dir = pfile->quote_include; + entry->location = pfile->line_table->highest_location; + entry->u.file = file; + *hash_slot = entry; + } + + return file; +} + +/* Read a file into FILE->buffer, returning true on success. + + If FILE->fd is something weird, like a block device, we don't want + to read it at all. Don't even try to figure out what something is, + except for plain files and block devices, since there is no + reliable portable way of doing this. + + FIXME: Flush file cache and try again if we run out of memory. */ +static bool +read_file_guts (cpp_reader *pfile, _cpp_file *file) +{ + ssize_t size, total, count; + uchar *buf; + bool regular; + + if (S_ISBLK (file->st.st_mode)) + { + cpp_error (pfile, CPP_DL_ERROR, "%s is a block device", file->path); + return false; + } + + regular = S_ISREG (file->st.st_mode); + if (regular) + { + /* off_t might have a wider range than ssize_t - in other words, + the max size of a file might be bigger than the address + space. We can't handle a file that large. (Anyone with + a single source file bigger than 2GB needs to rethink + their coding style.) Some systems (e.g. AIX 4.1) define + SSIZE_MAX to be much smaller than the actual range of the + type. Use INTTYPE_MAXIMUM unconditionally to ensure this + does not bite us. */ +#ifndef __BORLANDC__ + if (file->st.st_size > INTTYPE_MAXIMUM (ssize_t)) + { + cpp_error (pfile, CPP_DL_ERROR, "%s is too large", file->path); + return false; + } +#endif + + size = file->st.st_size; + } + else + /* 8 kilobytes is a sensible starting size. It ought to be bigger + than the kernel pipe buffer, and it's definitely bigger than + the majority of C source files. */ + size = 8 * 1024; + + buf = XNEWVEC (uchar, size + 1); + total = 0; + while ((count = read (file->fd, buf + total, size - total)) > 0) + { + total += count; + + if (total == size) + { + if (regular) + break; + size *= 2; + buf = XRESIZEVEC (uchar, buf, size + 1); + } + } + + if (count < 0) + { + cpp_errno (pfile, CPP_DL_ERROR, file->path); + return false; + } + +#ifndef __BORLANDC__ + /* For some reason, even though we opened with O_BINARY, + * Borland C++ seems to insist on doing CR/LF -> LF + * translations for us, which results in the file appearing + * shorter than stat told us it should be. + * + * This sucks, but don't bother throwing a warning. + */ + if (regular && total != size && STAT_SIZE_RELIABLE (file->st)) + cpp_error (pfile, CPP_DL_WARNING, + "%s is shorter than expected", file->path); +#endif + + file->buffer = _cpp_convert_input (pfile, CPP_OPTION (pfile, input_charset), + buf, size, total, &file->st.st_size); + file->buffer_valid = true; + + return true; +} + +/* Convenience wrapper around read_file_guts that opens the file if + necessary and closes the file descriptor after reading. FILE must + have been passed through find_file() at some stage. */ +static bool +read_file (cpp_reader *pfile, _cpp_file *file) +{ + /* If we already have its contents in memory, succeed immediately. */ + if (file->buffer_valid) + return true; + + /* If an earlier read failed for some reason don't try again. */ + if (file->dont_read || file->err_no) + return false; + + if (file->fd == -1 && !open_file (file)) + { + open_file_failed (pfile, file, 0); + return false; + } + + file->dont_read = !read_file_guts (pfile, file); + close (file->fd); + file->fd = -1; + + return !file->dont_read; +} + +/* Returns TRUE if FILE's contents have been successfully placed in + FILE->buffer and the file should be stacked, otherwise false. */ +static bool +should_stack_file (cpp_reader *pfile, _cpp_file *file, bool import) +{ + _cpp_file *f; + + /* Skip once-only files. */ + if (file->once_only) + return false; + + /* We must mark the file once-only if #import now, before header + guard checks. Otherwise, undefining the header guard might + cause the file to be re-stacked. */ + if (import) + { + _cpp_mark_file_once_only (pfile, file); + + /* Don't stack files that have been stacked before. */ + if (file->stack_count) + return false; + } + + /* Skip if the file had a header guard and the macro is defined. + PCH relies on this appearing before the PCH handler below. */ + if (file->cmacro && file->cmacro->type == NT_MACRO) + return false; + + /* Handle PCH files immediately; don't stack them. */ + if (file->pch) + { + pfile->cb.read_pch (pfile, file->pchname, file->fd, file->path); + close (file->fd); + file->fd = -1; + return false; + } + + if (!read_file (pfile, file)) + return false; + + /* Check the file against the PCH file. This is done before + checking against files we've already seen, since it may save on + I/O. */ + if (check_file_against_entries (pfile, file, import)) + { + /* If this isn't a #import, but yet we can't include the file, + that means that it was #import-ed in the PCH file, + so we can never include it again. */ + if (! import) + _cpp_mark_file_once_only (pfile, file); + return false; + } + + /* Now we've read the file's contents, we can stack it if there + are no once-only files. */ + if (!pfile->seen_once_only) + return true; + + /* We may have read the file under a different name. Look + for likely candidates and compare file contents to be sure. */ + for (f = pfile->all_files; f; f = f->next_file) + { + if (f == file) + continue; + + if ((import || f->once_only) + && f->err_no == 0 + && f->st.st_mtime == file->st.st_mtime + && f->st.st_size == file->st.st_size) + { + _cpp_file *ref_file; + bool same_file_p = false; + + if (f->buffer && !f->buffer_valid) + { + /* We already have a buffer but it is not valid, because + the file is still stacked. Make a new one. */ + ref_file = make_cpp_file (pfile, f->dir, f->name); + ref_file->path = f->path; + } + else + /* The file is not stacked anymore. We can reuse it. */ + ref_file = f; + + same_file_p = read_file (pfile, ref_file) + /* Size might have changed in read_file(). */ + && ref_file->st.st_size == file->st.st_size + && !memcmp (ref_file->buffer, + file->buffer, + file->st.st_size); + + if (f->buffer && !f->buffer_valid) + { + ref_file->path = 0; + destroy_cpp_file (ref_file); + } + + if (same_file_p) + break; + } + } + + return f == NULL; +} + +/* Place the file referenced by FILE into a new buffer on the buffer + stack if possible. IMPORT is true if this stacking attempt is + because of a #import directive. Returns true if a buffer is + stacked. */ +bool +_cpp_stack_file (cpp_reader *pfile, _cpp_file *file, bool import) +{ + cpp_buffer *buffer; + int sysp; + + if (!should_stack_file (pfile, file, import)) + return false; + + if (pfile->buffer == NULL || file->dir == NULL) + sysp = 0; + else + sysp = MAX (pfile->buffer->sysp, file->dir->sysp); + + /* Add the file to the dependencies on its first inclusion. */ + if (CPP_OPTION (pfile, deps.style) > !!sysp && !file->stack_count) + { + if (!file->main_file || !CPP_OPTION (pfile, deps.ignore_main_file)) + deps_add_dep (pfile->deps, file->path); + } + + /* Clear buffer_valid since _cpp_clean_line messes it up. */ + file->buffer_valid = false; + file->stack_count++; + + /* Stack the buffer. */ + buffer = cpp_push_buffer (pfile, file->buffer, file->st.st_size, + CPP_OPTION (pfile, preprocessed) + && !CPP_OPTION (pfile, directives_only)); + buffer->file = file; + buffer->sysp = sysp; + + /* Initialize controlling macro state. */ + pfile->mi_valid = true; + pfile->mi_cmacro = 0; + + /* Generate the call back. */ + _cpp_do_file_change (pfile, LC_ENTER, file->path, 1, sysp); + + return true; +} + +/* Mark FILE to be included once only. */ +void +_cpp_mark_file_once_only (cpp_reader *pfile, _cpp_file *file) +{ + pfile->seen_once_only = true; + file->once_only = true; +} + +/* Return the directory from which searching for FNAME should start, + considering the directive TYPE and ANGLE_BRACKETS. If there is + nothing left in the path, returns NULL. */ +static struct cpp_dir * +search_path_head (cpp_reader *pfile, const char *fname, int angle_brackets, + enum include_type type) +{ + cpp_dir *dir; + _cpp_file *file; + + if (IS_ABSOLUTE_PATH (fname)) + return &pfile->no_search_path; + + /* pfile->buffer is NULL when processing an -include command-line flag. */ + file = pfile->buffer == NULL ? pfile->main_file : pfile->buffer->file; + + /* For #include_next, skip in the search path past the dir in which + the current file was found, but if it was found via an absolute + path use the normal search logic. */ + if (type == IT_INCLUDE_NEXT && file->dir + && file->dir != &pfile->no_search_path) + dir = file->dir->next; + else if (angle_brackets) + dir = pfile->bracket_include; + else if (type == IT_CMDLINE) + /* -include and -imacros use the #include "" chain with the + preprocessor's cwd prepended. */ + return make_cpp_dir (pfile, "./", false); + else if (pfile->quote_ignores_source_dir) + dir = pfile->quote_include; + else + return make_cpp_dir (pfile, dir_name_of_file (file), + pfile->buffer ? pfile->buffer->sysp : 0); + + if (dir == NULL) + cpp_error (pfile, CPP_DL_ERROR, + "no include path in which to search for %s", fname); + + return dir; +} + +/* Strip the basename from the file's path. It ends with a slash if + of nonzero length. Note that this procedure also works for + , which is represented by the empty string. */ +static const char * +dir_name_of_file (_cpp_file *file) +{ + if (!file->dir_name) + { + size_t len = lbasename (file->path) - file->path; + char *dir_name = XNEWVEC (char, len + 1); + + memcpy (dir_name, file->path, len); + dir_name[len] = '\0'; + file->dir_name = dir_name; + } + + return file->dir_name; +} + +/* Handles #include-family directives (distinguished by TYPE), + including HEADER, and the command line -imacros and -include. + Returns true if a buffer was stacked. */ +bool +_cpp_stack_include (cpp_reader *pfile, const char *fname, int angle_brackets, + enum include_type type) +{ + struct cpp_dir *dir; + _cpp_file *file; + + dir = search_path_head (pfile, fname, angle_brackets, type); + if (!dir) + return false; + + file = _cpp_find_file (pfile, fname, dir, false, angle_brackets); + + /* Compensate for the increment in linemap_add. In the case of a + normal #include, we're currently at the start of the line + *following* the #include. A separate source_location for this + location makes no sense (until we do the LC_LEAVE), and + complicates LAST_SOURCE_LINE_LOCATION. This does not apply if we + found a PCH file (in which case linemap_add is not called) or we + were included from the command-line. */ + if (! file->pch && file->err_no == 0 && type != IT_CMDLINE) + pfile->line_table->highest_location--; + + return _cpp_stack_file (pfile, file, type == IT_IMPORT); +} + +/* Could not open FILE. The complication is dependency output. */ +static void +open_file_failed (cpp_reader *pfile, _cpp_file *file, int angle_brackets) +{ + int sysp = pfile->line_table->highest_line > 1 && pfile->buffer ? pfile->buffer->sysp : 0; + bool print_dep = CPP_OPTION (pfile, deps.style) > (angle_brackets || !!sysp); + + errno = file->err_no; + if (print_dep && CPP_OPTION (pfile, deps.missing_files) && errno == ENOENT) + deps_add_dep (pfile->deps, file->name); + else + { + /* If we are outputting dependencies but not for this file then + don't error because we can still produce correct output. */ + if (CPP_OPTION (pfile, deps.style) && ! print_dep) + cpp_errno (pfile, CPP_DL_WARNING, file->path); + else + cpp_errno (pfile, CPP_DL_ERROR, file->path); + } +} + +/* Search in the chain beginning at HEAD for a file whose search path + started at START_DIR != NULL. */ +static struct file_hash_entry * +search_cache (struct file_hash_entry *head, const cpp_dir *start_dir) +{ + while (head && head->start_dir != start_dir) + head = head->next; + + return head; +} + +/* Allocate a new _cpp_file structure. */ +static _cpp_file * +make_cpp_file (cpp_reader *pfile, cpp_dir *dir, const char *fname) +{ + _cpp_file *file; + + file = XCNEW (_cpp_file); + file->main_file = !pfile->buffer; + file->fd = -1; + file->dir = dir; + file->name = xstrdup (fname); + + return file; +} + +/* Release a _cpp_file structure. */ +static void +destroy_cpp_file (_cpp_file *file) +{ + if (file->buffer) + free ((void *) file->buffer); + free ((void *) file->name); + free (file); +} + +/* Release all the files allocated by this reader. */ +static void +destroy_all_cpp_files (cpp_reader *pfile) +{ + _cpp_file *iter = pfile->all_files; + while (iter) + { + _cpp_file *next = iter->next_file; + destroy_cpp_file (iter); + iter = next; + } +} + +/* A hash of directory names. The directory names are the path names + of files which contain a #include "", the included file name is + appended to this directories. + + To avoid duplicate entries we follow the convention that all + non-empty directory names should end in a '/'. DIR_NAME must be + stored in permanently allocated memory. */ +static cpp_dir * +make_cpp_dir (cpp_reader *pfile, const char *dir_name, int sysp) +{ + struct file_hash_entry *entry, **hash_slot; + cpp_dir *dir; + + hash_slot = (struct file_hash_entry **) + htab_find_slot_with_hash (pfile->dir_hash, dir_name, + htab_hash_string (dir_name), + INSERT); + + /* Have we already hashed this directory? */ + for (entry = *hash_slot; entry; entry = entry->next) + if (entry->start_dir == NULL) + return entry->u.dir; + + dir = XCNEW (cpp_dir); + dir->next = pfile->quote_include; + dir->name = (char *) dir_name; + dir->len = strlen (dir_name); + dir->sysp = sysp; + dir->construct = 0; + + /* Store this new result in the hash table. */ + entry = new_file_hash_entry (pfile); + entry->next = *hash_slot; + entry->start_dir = NULL; + entry->location = pfile->line_table->highest_location; + entry->u.dir = dir; + *hash_slot = entry; + + return dir; +} + +/* Create a new block of memory for file hash entries. */ +static void +allocate_file_hash_entries (cpp_reader *pfile) +{ + struct file_hash_entry_pool *pool = XNEW (struct file_hash_entry_pool); + pool->file_hash_entries_used = 0; + pool->next = pfile->file_hash_entries; + pfile->file_hash_entries = pool; +} + +/* Return a new file hash entry. */ +static struct file_hash_entry * +new_file_hash_entry (cpp_reader *pfile) +{ + unsigned int idx; + if (pfile->file_hash_entries->file_hash_entries_used == FILE_HASH_POOL_SIZE) + allocate_file_hash_entries (pfile); + + idx = pfile->file_hash_entries->file_hash_entries_used++; + return &pfile->file_hash_entries->pool[idx]; +} + +/* Free the file hash entry pools. */ +static void +free_file_hash_entries (cpp_reader *pfile) +{ + struct file_hash_entry_pool *iter = pfile->file_hash_entries; + while (iter) + { + struct file_hash_entry_pool *next = iter->next; + free (iter); + iter = next; + } +} + +/* Returns TRUE if a file FNAME has ever been successfully opened. + This routine is not intended to correctly handle filenames aliased + by links or redundant . or .. traversals etc. */ +bool +cpp_included (cpp_reader *pfile, const char *fname) +{ + struct file_hash_entry *entry; + + entry = (struct file_hash_entry *) + htab_find_with_hash (pfile->file_hash, fname, htab_hash_string (fname)); + + while (entry && (entry->start_dir == NULL || entry->u.file->err_no)) + entry = entry->next; + + return entry != NULL; +} + +/* Returns TRUE if a file FNAME has ever been successfully opened + before LOCATION. This routine is not intended to correctly handle + filenames aliased by links or redundant . or .. traversals etc. */ +bool +cpp_included_before (cpp_reader *pfile, const char *fname, + source_location location) +{ + struct file_hash_entry *entry; + + entry = (struct file_hash_entry *) + htab_find_with_hash (pfile->file_hash, fname, htab_hash_string (fname)); + + while (entry && (entry->start_dir == NULL || entry->u.file->err_no + || entry->location > location)) + entry = entry->next; + + return entry != NULL; +} + +/* Calculate the hash value of a file hash entry P. */ + +static hashval_t +file_hash_hash (const void *p) +{ + struct file_hash_entry *entry = (struct file_hash_entry *) p; + const char *hname; + if (entry->start_dir) + hname = entry->u.file->name; + else + hname = entry->u.dir->name; + + return htab_hash_string (hname); +} + +/* Compare a string Q against a file hash entry P. */ +static int +file_hash_eq (const void *p, const void *q) +{ + struct file_hash_entry *entry = (struct file_hash_entry *) p; + const char *fname = (const char *) q; + const char *hname; + + if (entry->start_dir) + hname = entry->u.file->name; + else + hname = entry->u.dir->name; + + return strcmp (hname, fname) == 0; +} + +/* Compare entries in the nonexistent file hash table. These are just + strings. */ +static int +nonexistent_file_hash_eq (const void *p, const void *q) +{ + return strcmp (p, q) == 0; +} + +/* Initialize everything in this source file. */ +void +_cpp_init_files (cpp_reader *pfile) +{ + pfile->file_hash = htab_create_alloc (127, file_hash_hash, file_hash_eq, + NULL, xcalloc, free); + pfile->dir_hash = htab_create_alloc (127, file_hash_hash, file_hash_eq, + NULL, xcalloc, free); + allocate_file_hash_entries (pfile); + pfile->nonexistent_file_hash = htab_create_alloc (127, htab_hash_string, + nonexistent_file_hash_eq, + NULL, xcalloc, free); + _obstack_begin (&pfile->nonexistent_file_ob, 0, 0, + (void *(*) (long)) xmalloc, + (void (*) (void *)) free); +} + +/* Finalize everything in this source file. */ +void +_cpp_cleanup_files (cpp_reader *pfile) +{ + htab_delete (pfile->file_hash); + htab_delete (pfile->dir_hash); + htab_delete (pfile->nonexistent_file_hash); + obstack_free (&pfile->nonexistent_file_ob, 0); + free_file_hash_entries (pfile); + destroy_all_cpp_files (pfile); +} + +/* Make the parser forget about files it has seen. This can be useful + for resetting the parser to start another run. */ +void +cpp_clear_file_cache (cpp_reader *pfile) +{ + _cpp_cleanup_files (pfile); + pfile->file_hash_entries = NULL; + pfile->all_files = NULL; + _cpp_init_files (pfile); +} + +/* Enter a file name in the hash for the sake of cpp_included. */ +void +_cpp_fake_include (cpp_reader *pfile, const char *fname) +{ + _cpp_find_file (pfile, fname, pfile->buffer->file->dir, true, 0); +} + +/* Not everyone who wants to set system-header-ness on a buffer can + see the details of a buffer. This is an exported interface because + fix-header needs it. */ +void +cpp_make_system_header (cpp_reader *pfile, int syshdr, int externc) +{ + int flags = 0; + const struct line_maps *line_table = pfile->line_table; + const struct line_map *map = &line_table->maps[line_table->used-1]; + + /* 1 = system header, 2 = system header to be treated as C. */ + if (syshdr) + flags = 1 + (externc != 0); + pfile->buffer->sysp = flags; + _cpp_do_file_change (pfile, LC_RENAME, map->to_file, + SOURCE_LINE (map, pfile->line_table->highest_line), flags); +} + +/* Allow the client to change the current file. Used by the front end + to achieve pseudo-file names like . + If REASON is LC_LEAVE, then NEW_NAME must be NULL. */ +void +cpp_change_file (cpp_reader *pfile, enum lc_reason reason, + const char *new_name) +{ + _cpp_do_file_change (pfile, reason, new_name, 1, 0); +} + +struct report_missing_guard_data +{ + const char **paths; + size_t count; +}; + +/* Callback function for htab_traverse. */ +static int +report_missing_guard (void **slot, void *d) +{ + struct file_hash_entry *entry = (struct file_hash_entry *) *slot; + struct report_missing_guard_data *data + = (struct report_missing_guard_data *) d; + + /* Skip directories. */ + if (entry->start_dir != NULL) + { + _cpp_file *file = entry->u.file; + + /* We don't want MI guard advice for the main file. */ + if (file->cmacro == NULL && file->stack_count == 1 && !file->main_file) + { + if (data->paths == NULL) + { + data->paths = XCNEWVEC (const char *, data->count); + data->count = 0; + } + + data->paths[data->count++] = file->path; + } + } + + /* Keep traversing the hash table. */ + return 1; +} + +/* Comparison function for qsort. */ +static int +report_missing_guard_cmp (const void *p1, const void *p2) +{ + return strcmp (*(const char *const *) p1, *(const char *const *) p2); +} + +/* Report on all files that might benefit from a multiple include guard. + Triggered by -H. */ +void +_cpp_report_missing_guards (cpp_reader *pfile) +{ + struct report_missing_guard_data data; + + data.paths = NULL; + data.count = htab_elements (pfile->file_hash); + htab_traverse (pfile->file_hash, report_missing_guard, &data); + + if (data.paths != NULL) + { + size_t i; + + /* Sort the paths to avoid outputting them in hash table + order. */ + qsort (data.paths, data.count, sizeof (const char *), + report_missing_guard_cmp); + fputs (_("Multiple include guards may be useful for:\n"), + stderr); + for (i = 0; i < data.count; i++) + { + fputs (data.paths[i], stderr); + putc ('\n', stderr); + } + free (data.paths); + } +} + +/* Locate HEADER, and determine whether it is newer than the current + file. If it cannot be located or dated, return -1, if it is + newer, return 1, otherwise 0. */ +int +_cpp_compare_file_date (cpp_reader *pfile, const char *fname, + int angle_brackets) +{ + _cpp_file *file; + struct cpp_dir *dir; + + dir = search_path_head (pfile, fname, angle_brackets, IT_INCLUDE); + if (!dir) + return -1; + + file = _cpp_find_file (pfile, fname, dir, false, angle_brackets); + if (file->err_no) + return -1; + + if (file->fd != -1) + { + close (file->fd); + file->fd = -1; + } + + return file->st.st_mtime > pfile->buffer->file->st.st_mtime; +} + +/* Pushes the given file onto the buffer stack. Returns nonzero if + successful. */ +bool +cpp_push_include (cpp_reader *pfile, const char *fname) +{ + return _cpp_stack_include (pfile, fname, false, IT_CMDLINE); +} + +/* Do appropriate cleanup when a file INC's buffer is popped off the + input stack. */ +void +_cpp_pop_file_buffer (cpp_reader *pfile, _cpp_file *file) +{ + /* Record the inclusion-preventing macro, which could be NULL + meaning no controlling macro. */ + if (pfile->mi_valid && file->cmacro == NULL) + file->cmacro = pfile->mi_cmacro; + + /* Invalidate control macros in the #including file. */ + pfile->mi_valid = false; + + if (file->buffer) + { + free ((void *) file->buffer); + file->buffer = NULL; + file->buffer_valid = false; + } +} + +/* Inteface to file statistics record in _cpp_file structure. */ +struct stat * +_cpp_get_file_stat (_cpp_file *file) +{ + return &file->st; +} + +/* Set the include chain for "" to QUOTE, for <> to BRACKET. If + QUOTE_IGNORES_SOURCE_DIR, then "" includes do not look in the + directory of the including file. + + If BRACKET does not lie in the QUOTE chain, it is set to QUOTE. */ +void +cpp_set_include_chains (cpp_reader *pfile, cpp_dir *quote, cpp_dir *bracket, + int quote_ignores_source_dir) +{ + pfile->quote_include = quote; + pfile->bracket_include = quote; + pfile->quote_ignores_source_dir = quote_ignores_source_dir; + + for (; quote; quote = quote->next) + { + quote->name_map = NULL; + quote->len = strlen (quote->name); + if (quote == bracket) + pfile->bracket_include = bracket; + } +} + +/* Append the file name to the directory to create the path, but don't + turn / into // or // into ///; // may be a namespace escape. */ +static char * +append_file_to_dir (const char *fname, cpp_dir *dir) +{ + size_t dlen, flen; + char *path; + + dlen = dir->len; + flen = strlen (fname); + path = XNEWVEC (char, dlen + 1 + flen + 1); + memcpy (path, dir->name, dlen); + if (dlen && path[dlen - 1] != '/') + path[dlen++] = '/'; + memcpy (&path[dlen], fname, flen + 1); + + return path; +} + +/* Read a space delimited string of unlimited length from a stdio + file F. */ +static char * +read_filename_string (int ch, FILE *f) +{ + char *alloc, *set; + int len; + + len = 20; + set = alloc = XNEWVEC (char, len + 1); + if (! is_space (ch)) + { + *set++ = ch; + while ((ch = getc (f)) != EOF && ! is_space (ch)) + { + if (set - alloc == len) + { + len *= 2; + alloc = XRESIZEVEC (char, alloc, len + 1); + set = alloc + len / 2; + } + *set++ = ch; + } + } + *set = '\0'; + ungetc (ch, f); + return alloc; +} + +/* Read the file name map file for DIR. */ +static void +read_name_map (cpp_dir *dir) +{ + static const char FILE_NAME_MAP_FILE[] = "header.gcc"; + char *name; + FILE *f; + size_t len, count = 0, room = 9; + + len = dir->len; + name = (char *) alloca (len + sizeof (FILE_NAME_MAP_FILE) + 1); + memcpy (name, dir->name, len); + if (len && name[len - 1] != '/') + name[len++] = '/'; + strcpy (name + len, FILE_NAME_MAP_FILE); + f = fopen (name, "r"); + + dir->name_map = XNEWVEC (const char *, room); + + /* Silently return NULL if we cannot open. */ + if (f) + { + int ch; + + while ((ch = getc (f)) != EOF) + { + char *to; + + if (is_space (ch)) + continue; + + if (count + 2 > room) + { + room += 8; + dir->name_map = XRESIZEVEC (const char *, dir->name_map, room); + } + + dir->name_map[count] = read_filename_string (ch, f); + while ((ch = getc (f)) != EOF && is_hspace (ch)) + ; + + to = read_filename_string (ch, f); + if (IS_ABSOLUTE_PATH (to)) + dir->name_map[count + 1] = to; + else + { + dir->name_map[count + 1] = append_file_to_dir (to, dir); + free (to); + } + + count += 2; + while ((ch = getc (f)) != '\n') + if (ch == EOF) + break; + } + + fclose (f); + } + + /* Terminate the list of maps. */ + dir->name_map[count] = NULL; +} + +/* Remap a FILE's name based on the file_name_map, if any, for + FILE->dir. If the file name has any directory separators, + recursively check those directories too. */ +static char * +remap_filename (cpp_reader *pfile, _cpp_file *file) +{ + const char *fname, *p; + char *new_dir; + cpp_dir *dir; + size_t index, len; + + dir = file->dir; + fname = file->name; + + for (;;) + { + if (!dir->name_map) + read_name_map (dir); + + for (index = 0; dir->name_map[index]; index += 2) + if (!strcmp (dir->name_map[index], fname)) + return xstrdup (dir->name_map[index + 1]); + + p = strchr (fname, '/'); + if (!p || p == fname) + return NULL; + + len = dir->len + (p - fname + 1); + new_dir = XNEWVEC (char, len + 1); + memcpy (new_dir, dir->name, dir->len); + memcpy (new_dir + dir->len, fname, p - fname + 1); + new_dir[len] = '\0'; + + dir = make_cpp_dir (pfile, new_dir, dir->sysp); + fname = p + 1; + } +} + +/* Returns true if PCHNAME is a valid PCH file for FILE. */ +static bool +validate_pch (cpp_reader *pfile, _cpp_file *file, const char *pchname) +{ + const char *saved_path = file->path; + bool valid = false; + + file->path = pchname; + if (open_file (file)) + { + valid = 1 & pfile->cb.valid_pch (pfile, pchname, file->fd); + + if (!valid) + { + close (file->fd); + file->fd = -1; + } + + if (CPP_OPTION (pfile, print_include_names)) + { + unsigned int i; + for (i = 1; i < pfile->line_table->depth; i++) + putc ('.', stderr); + fprintf (stderr, "%c %s\n", + valid ? '!' : 'x', pchname); + } + } + + file->path = saved_path; + return valid; +} + +/* Get the path associated with the _cpp_file F. The path includes + the base name from the include directive and the directory it was + found in via the search path. */ + +const char * +cpp_get_path (struct _cpp_file *f) +{ + return f->path; +} + +/* Get the directory associated with the _cpp_file F. */ + +cpp_dir * +cpp_get_dir (struct _cpp_file *f) +{ + return f->dir; +} + +/* Get the cpp_buffer currently associated with the cpp_reader + PFILE. */ + +cpp_buffer * +cpp_get_buffer (cpp_reader *pfile) +{ + return pfile->buffer; +} + +/* Get the _cpp_file associated with the cpp_buffer B. */ + +_cpp_file * +cpp_get_file (cpp_buffer *b) +{ + return b->file; +} + +/* Get the previous cpp_buffer given a cpp_buffer B. The previous + buffer is the buffer that included the given buffer. */ + +cpp_buffer * +cpp_get_prev (cpp_buffer *b) +{ + return b->prev; +} + +/* This data structure holds the list of header files that were seen + while the PCH was being built. The 'entries' field is kept sorted + in memcmp() order; yes, this means that on little-endian systems, + it's sorted initially by the least-significant byte of 'size', but + that's OK. The code does rely on having entries with the same size + next to each other. */ + +struct pchf_entry { + /* The size of this file. This is used to save running a MD5 checksum + if the sizes don't match. */ + off_t size; + /* The MD5 checksum of this file. */ + unsigned char sum[16]; + /* Is this file to be included only once? */ + bool once_only; +}; + +struct pchf_data { + /* Number of pchf_entry structures. */ + size_t count; + + /* Are there any values with once_only set? + This is used as an optimisation, it means we don't have to search + the structure if we're processing a regular #include. */ + bool have_once_only; + + struct pchf_entry entries[1]; +}; + +static struct pchf_data *pchf; + +/* A qsort ordering function for pchf_entry structures. */ + +static int +pchf_save_compare (const void *e1, const void *e2) +{ + return memcmp (e1, e2, sizeof (struct pchf_entry)); +} + +/* Create and write to F a pchf_data structure. */ + +bool +_cpp_save_file_entries (cpp_reader *pfile, FILE *fp) +{ + size_t count = 0; + struct pchf_data *result; + size_t result_size; + _cpp_file *f; + + for (f = pfile->all_files; f; f = f->next_file) + ++count; + + result_size = (sizeof (struct pchf_data) + + sizeof (struct pchf_entry) * (count - 1)); + result = XCNEWVAR (struct pchf_data, result_size); + + result->count = 0; + result->have_once_only = false; + + for (f = pfile->all_files; f; f = f->next_file) + { + size_t count; + + /* This should probably never happen, since if a read error occurred + the PCH file shouldn't be written... */ + if (f->dont_read || f->err_no) + continue; + + if (f->stack_count == 0) + continue; + + count = result->count++; + + result->entries[count].once_only = f->once_only; + /* |= is avoided in the next line because of an HP C compiler bug */ + result->have_once_only = result->have_once_only | f->once_only; + if (f->buffer_valid) + md5_buffer ((const char *)f->buffer, + f->st.st_size, result->entries[count].sum); + else + { + FILE *ff; + int oldfd = f->fd; + + if (!open_file (f)) + { + open_file_failed (pfile, f, 0); + return false; + } + ff = fdopen (f->fd, "rb"); + md5_stream (ff, result->entries[count].sum); + fclose (ff); + f->fd = oldfd; + } + result->entries[count].size = f->st.st_size; + } + + result_size = (sizeof (struct pchf_data) + + sizeof (struct pchf_entry) * (result->count - 1)); + + qsort (result->entries, result->count, sizeof (struct pchf_entry), + pchf_save_compare); + + return fwrite (result, result_size, 1, fp) == 1; +} + +/* Read the pchf_data structure from F. */ + +bool +_cpp_read_file_entries (cpp_reader *pfile ATTRIBUTE_UNUSED, FILE *f) +{ + struct pchf_data d; + + if (fread (&d, sizeof (struct pchf_data) - sizeof (struct pchf_entry), 1, f) + != 1) + return false; + + pchf = XNEWVAR (struct pchf_data, sizeof (struct pchf_data) + + sizeof (struct pchf_entry) * (d.count - 1)); + memcpy (pchf, &d, sizeof (struct pchf_data) - sizeof (struct pchf_entry)); + if (fread (pchf->entries, sizeof (struct pchf_entry), d.count, f) + != d.count) + return false; + return true; +} + +/* The parameters for pchf_compare. */ + +struct pchf_compare_data +{ + /* The size of the file we're looking for. */ + off_t size; + + /* The MD5 checksum of the file, if it's been computed. */ + unsigned char sum[16]; + + /* Is SUM valid? */ + bool sum_computed; + + /* Do we need to worry about entries that don't have ONCE_ONLY set? */ + bool check_included; + + /* The file that we're searching for. */ + _cpp_file *f; +}; + +/* bsearch comparison function; look for D_P in E_P. */ + +static int +pchf_compare (const void *d_p, const void *e_p) +{ + const struct pchf_entry *e = (const struct pchf_entry *)e_p; + struct pchf_compare_data *d = (struct pchf_compare_data *)d_p; + int result; + + result = memcmp (&d->size, &e->size, sizeof (off_t)); + if (result != 0) + return result; + + if (! d->sum_computed) + { + _cpp_file *const f = d->f; + + md5_buffer ((const char *)f->buffer, f->st.st_size, d->sum); + d->sum_computed = true; + } + + result = memcmp (d->sum, e->sum, 16); + if (result != 0) + return result; + + if (d->check_included || e->once_only) + return 0; + else + return 1; +} + +/* Check that F is not in a list read from a PCH file (if any). + Assumes that f->buffer_valid is true. Return TRUE if the file + should not be read. */ + +static bool +check_file_against_entries (cpp_reader *pfile ATTRIBUTE_UNUSED, + _cpp_file *f, + bool check_included) +{ + struct pchf_compare_data d; + + if (pchf == NULL + || (! check_included && ! pchf->have_once_only)) + return false; + + d.size = f->st.st_size; + d.sum_computed = false; + d.f = f; + d.check_included = check_included; + return bsearch (&d, pchf->entries, pchf->count, sizeof (struct pchf_entry), + pchf_compare) != NULL; +} diff --git a/support/cpp/libcpp/identifiers.c b/support/cpp/libcpp/identifiers.c new file mode 100644 index 0000000..c22f4a7 --- /dev/null +++ b/support/cpp/libcpp/identifiers.c @@ -0,0 +1,118 @@ +/* Hash tables for the CPP library. + Copyright (C) 1986, 1987, 1989, 1992, 1993, 1994, 1995, 1996, 1998, + 1999, 2000, 2001, 2002 Free Software Foundation, Inc. + Written by Per Bothner, 1994. + Based on CCCP program by Paul Rubin, June 1986 + Adapted to ANSI C, Richard Stallman, Jan 1987 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! */ + +#include "config.h" +#include "system.h" +#include "cpplib.h" +#include "internal.h" + +static cpp_hashnode *alloc_node (hash_table *); + +/* Return an identifier node for hashtable.c. Used by cpplib except + when integrated with the C front ends. */ +static cpp_hashnode * +alloc_node (hash_table *table) +{ + cpp_hashnode *node; + + node = XOBNEW (&table->pfile->hash_ob, cpp_hashnode); + memset (node, 0, sizeof (cpp_hashnode)); + return node; +} + +/* Set up the identifier hash table. Use TABLE if non-null, otherwise + create our own. */ +void +_cpp_init_hashtable (cpp_reader *pfile, hash_table *table) +{ + struct spec_nodes *s; + + if (table == NULL) + { + pfile->our_hashtable = 1; + table = ht_create (13); /* 8K (=2^13) entries. */ + table->alloc_node = (hashnode (*) (hash_table *)) alloc_node; + + _obstack_begin (&pfile->hash_ob, 0, 0, + (void *(*) (long)) xmalloc, + (void (*) (void *)) free); + } + + table->pfile = pfile; + pfile->hash_table = table; + + /* Now we can initialize things that use the hash table. */ + _cpp_init_directives (pfile); + _cpp_init_internal_pragmas (pfile); + + s = &pfile->spec_nodes; + s->n_defined = cpp_lookup (pfile, DSC("defined")); + s->n_true = cpp_lookup (pfile, DSC("true")); + s->n_false = cpp_lookup (pfile, DSC("false")); + s->n__VA_ARGS__ = cpp_lookup (pfile, DSC("__VA_ARGS__")); + s->n__VA_ARGS__->flags |= NODE_DIAGNOSTIC; +} + +/* Tear down the identifier hash table. */ +void +_cpp_destroy_hashtable (cpp_reader *pfile) +{ + if (pfile->our_hashtable) + { + ht_destroy (pfile->hash_table); + obstack_free (&pfile->hash_ob, 0); + } +} + +/* Returns the hash entry for the STR of length LEN, creating one + if necessary. */ +cpp_hashnode * +cpp_lookup (cpp_reader *pfile, const unsigned char *str, unsigned int len) +{ + /* ht_lookup cannot return NULL. */ + return CPP_HASHNODE (ht_lookup (pfile->hash_table, str, len, HT_ALLOC)); +} + +/* Determine whether the str STR, of length LEN, is a defined macro. */ +int +cpp_defined (cpp_reader *pfile, const unsigned char *str, int len) +{ + cpp_hashnode *node; + + node = CPP_HASHNODE (ht_lookup (pfile->hash_table, str, len, HT_NO_INSERT)); + + /* If it's of type NT_MACRO, it cannot be poisoned. */ + return node && node->type == NT_MACRO; +} + +/* For all nodes in the hashtable, callback CB with parameters PFILE, + the node, and V. */ +void +cpp_forall_identifiers (cpp_reader *pfile, cpp_cb cb, void *v) +{ + /* We don't need a proxy since the hash table's identifier comes + first in cpp_hashnode. */ + ht_forall (pfile->hash_table, (ht_cb) cb, v); +} diff --git a/support/cpp/libcpp/include/cpp-id-data.h b/support/cpp/libcpp/include/cpp-id-data.h new file mode 100644 index 0000000..2445186 --- /dev/null +++ b/support/cpp/libcpp/include/cpp-id-data.h @@ -0,0 +1,78 @@ +/* Structures that hang off cpp_identifier, for PCH. + Copyright (C) 1986, 1987, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, + 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ + +#include "cpplib.h" + +#if !defined (HAVE_UCHAR) && !defined (IN_GCC) +typedef unsigned char uchar; +#endif + +#define U (const unsigned char *) /* Intended use: U"string" */ + +/* Chained list of answers to an assertion. */ +struct answer GTY(()) +{ + struct answer *next; + unsigned int count; + cpp_token GTY ((length ("%h.count"))) first[1]; +}; + +/* Each macro definition is recorded in a cpp_macro structure. + Variadic macros cannot occur with traditional cpp. */ +struct cpp_macro GTY(()) +{ + /* Parameters, if any. */ + cpp_hashnode ** GTY ((nested_ptr (union tree_node, + "%h ? CPP_HASHNODE (GCC_IDENT_TO_HT_IDENT (%h)) : NULL", + "%h ? HT_IDENT_TO_GCC_IDENT (HT_NODE (%h)) : NULL"), + length ("%h.paramc"))) + params; + + /* Replacement tokens (ISO) or replacement text (traditional). See + comment at top of cpptrad.c for how traditional function-like + macros are encoded. */ + union cpp_macro_u + { + cpp_token * GTY ((tag ("0"), length ("%0.count"))) tokens; + const unsigned char * GTY ((tag ("1"))) text; + } GTY ((desc ("%1.traditional"))) exp; + + /* Definition line number. */ + source_location line; + + /* Number of tokens in expansion, or bytes for traditional macros. */ + unsigned int count; + + /* Number of parameters. */ + unsigned short paramc; + + /* If a function-like macro. */ + unsigned int fun_like : 1; + + /* If a variadic macro. */ + unsigned int variadic : 1; + + /* If macro defined in system header. */ + unsigned int syshdr : 1; + + /* Nonzero if it has been expanded or had its existence tested. */ + unsigned int used : 1; + + /* Indicate which field of 'exp' is in use. */ + unsigned int traditional : 1; +}; diff --git a/support/cpp/libcpp/include/cpplib.h b/support/cpp/libcpp/include/cpplib.h new file mode 100644 index 0000000..1015645 --- /dev/null +++ b/support/cpp/libcpp/include/cpplib.h @@ -0,0 +1,901 @@ +/* Definitions for CPP library. + Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, + 2004, 2005, 2007 + Free Software Foundation, Inc. + Written by Per Bothner, 1994-95. + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! */ +#ifndef LIBCPP_CPPLIB_H +#define LIBCPP_CPPLIB_H + +#include +#include "symtab.h" +#include "line-map.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef struct cpp_reader cpp_reader; +typedef struct cpp_buffer cpp_buffer; +typedef struct cpp_options cpp_options; +typedef struct cpp_token cpp_token; +typedef struct cpp_string cpp_string; +typedef struct cpp_hashnode cpp_hashnode; +typedef struct cpp_macro cpp_macro; +typedef struct cpp_callbacks cpp_callbacks; +typedef struct cpp_dir cpp_dir; + +struct answer; +struct _cpp_file; + +/* The first three groups, apart from '=', can appear in preprocessor + expressions (+= and -= are used to indicate unary + and - resp.). + This allows a lookup table to be implemented in _cpp_parse_expr. + + The first group, to CPP_LAST_EQ, can be immediately followed by an + '='. The lexer needs operators ending in '=', like ">>=", to be in + the same order as their counterparts without the '=', like ">>". + + See the cpp_operator table optab in expr.c if you change the order or + add or remove anything in the first group. */ + +#define TTYPE_TABLE \ + OP(EQ, "=") \ + OP(NOT, "!") \ + OP(GREATER, ">") /* compare */ \ + OP(LESS, "<") \ + OP(PLUS, "+") /* math */ \ + OP(MINUS, "-") \ + OP(MULT, "*") \ + OP(DIV, "/") \ + OP(MOD, "%") \ + OP(AND, "&") /* bit ops */ \ + OP(OR, "|") \ + OP(XOR, "^") \ + OP(RSHIFT, ">>") \ + OP(LSHIFT, "<<") \ + \ + OP(COMPL, "~") \ + OP(AND_AND, "&&") /* logical */ \ + OP(OR_OR, "||") \ + OP(QUERY, "?") \ + OP(COLON, ":") \ + OP(COMMA, ",") /* grouping */ \ + OP(OPEN_PAREN, "(") \ + OP(CLOSE_PAREN, ")") \ + TK(EOF, NONE) \ + OP(EQ_EQ, "==") /* compare */ \ + OP(NOT_EQ, "!=") \ + OP(GREATER_EQ, ">=") \ + OP(LESS_EQ, "<=") \ + \ + /* These two are unary + / - in preprocessor expressions. */ \ + OP(PLUS_EQ, "+=") /* math */ \ + OP(MINUS_EQ, "-=") \ + \ + OP(MULT_EQ, "*=") \ + OP(DIV_EQ, "/=") \ + OP(MOD_EQ, "%=") \ + OP(AND_EQ, "&=") /* bit ops */ \ + OP(OR_EQ, "|=") \ + OP(XOR_EQ, "^=") \ + OP(RSHIFT_EQ, ">>=") \ + OP(LSHIFT_EQ, "<<=") \ + /* Digraphs together, beginning with CPP_FIRST_DIGRAPH. */ \ + OP(HASH, "#") /* digraphs */ \ + OP(PASTE, "##") \ + OP(OPEN_SQUARE, "[") \ + OP(CLOSE_SQUARE, "]") \ + OP(OPEN_BRACE, "{") \ + OP(CLOSE_BRACE, "}") \ + /* The remainder of the punctuation. Order is not significant. */ \ + OP(SEMICOLON, ";") /* structure */ \ + OP(ELLIPSIS, "...") \ + OP(PLUS_PLUS, "++") /* increment */ \ + OP(MINUS_MINUS, "--") \ + OP(DEREF, "->") /* accessors */ \ + OP(DOT, ".") \ + OP(SCOPE, "::") \ + OP(DEREF_STAR, "->*") \ + OP(DOT_STAR, ".*") \ + OP(ATSIGN, "@") /* used in Objective-C */ \ + \ + TK(NAME, IDENT) /* word */ \ + TK(AT_NAME, IDENT) /* @word - Objective-C */ \ + TK(NUMBER, LITERAL) /* 34_be+ta */ \ + \ + TK(CHAR, LITERAL) /* 'char' */ \ + TK(WCHAR, LITERAL) /* L'char' */ \ + TK(OTHER, LITERAL) /* stray punctuation */ \ + \ + TK(STRING, LITERAL) /* "string" */ \ + TK(WSTRING, LITERAL) /* L"string" */ \ + TK(OBJC_STRING, LITERAL) /* @"string" - Objective-C */ \ + TK(HEADER_NAME, LITERAL) /* in #include */ \ + \ + TK(COMMENT, LITERAL) /* Only if output comments. */ \ + /* SPELL_LITERAL happens to DTRT. */ \ + TK(MACRO_ARG, NONE) /* Macro argument. */ \ + TK(PRAGMA, NONE) /* Only for deferred pragmas. */ \ + TK(PRAGMA_EOL, NONE) /* End-of-line for deferred pragmas. */ \ + TK(PADDING, NONE) /* Whitespace for -E. */ \ +\ + /* SDCC _asm specific */ \ + TK(ASM, LITERAL) /* _asm ... _endasm ; */ + +#define OP(e, s) CPP_ ## e, +#define TK(e, s) CPP_ ## e, +enum cpp_ttype +{ + TTYPE_TABLE + N_TTYPES, + + /* Positions in the table. */ + CPP_LAST_EQ = CPP_LSHIFT, + CPP_FIRST_DIGRAPH = CPP_HASH, + CPP_LAST_PUNCTUATOR= CPP_ATSIGN, + CPP_LAST_CPP_OP = CPP_LESS_EQ +}; +#undef OP +#undef TK + +/* C language kind, used when calling cpp_create_reader. */ +enum c_lang {CLK_GNUC89 = 0, CLK_GNUC99, CLK_STDC89, CLK_STDC94, CLK_STDC99, + CLK_GNUCXX, CLK_CXX98, CLK_GNUCXX0X, CLK_CXX0X, CLK_ASM}; + +/* Payload of a NUMBER, STRING, CHAR or COMMENT token. */ +struct cpp_string GTY(()) +{ + unsigned int len; + const unsigned char *text; +}; + +/* Flags for the cpp_token structure. */ +#define PREV_WHITE (1 << 0) /* If whitespace before this token. */ +#define DIGRAPH (1 << 1) /* If it was a digraph. */ +#define STRINGIFY_ARG (1 << 2) /* If macro argument to be stringified. */ +#define PASTE_LEFT (1 << 3) /* If on LHS of a ## operator. */ +#define NAMED_OP (1 << 4) /* C++ named operators. */ +#define NO_EXPAND (1 << 5) /* Do not macro-expand this token. */ +#define BOL (1 << 6) /* Token at beginning of line. */ +#define PURE_ZERO (1 << 7) /* Single 0 digit, used by the C++ frontend, + set in c-lex.c. */ + +/* Specify which field, if any, of the cpp_token union is used. */ + +enum cpp_token_fld_kind { + CPP_TOKEN_FLD_NODE, + CPP_TOKEN_FLD_SOURCE, + CPP_TOKEN_FLD_STR, + CPP_TOKEN_FLD_ARG_NO, + CPP_TOKEN_FLD_PRAGMA, + CPP_TOKEN_FLD_NONE +}; + +/* A preprocessing token. This has been carefully packed and should + occupy 16 bytes on 32-bit hosts and 24 bytes on 64-bit hosts. */ +struct cpp_token GTY(()) +{ + source_location src_loc; /* Location of first char of token. */ + ENUM_BITFIELD(cpp_ttype) type : CHAR_BIT; /* token type */ + unsigned char flags; /* flags - see above */ + + union cpp_token_u + { + /* An identifier. */ + cpp_hashnode * + GTY ((nested_ptr (union tree_node, + "%h ? CPP_HASHNODE (GCC_IDENT_TO_HT_IDENT (%h)) : NULL", + "%h ? HT_IDENT_TO_GCC_IDENT (HT_NODE (%h)) : NULL"), + tag ("CPP_TOKEN_FLD_NODE"))) + node; + + /* Inherit padding from this token. */ + cpp_token * GTY ((tag ("CPP_TOKEN_FLD_SOURCE"))) source; + + /* A string, or number. */ + struct cpp_string GTY ((tag ("CPP_TOKEN_FLD_STR"))) str; + + /* Argument no. for a CPP_MACRO_ARG. */ + unsigned int GTY ((tag ("CPP_TOKEN_FLD_ARG_NO"))) arg_no; + + /* Caller-supplied identifier for a CPP_PRAGMA. */ + unsigned int GTY ((tag ("CPP_TOKEN_FLD_PRAGMA"))) pragma; + } GTY ((desc ("cpp_token_val_index (&%1)"))) val; +}; + +/* Say which field is in use. */ +extern enum cpp_token_fld_kind cpp_token_val_index (cpp_token *tok); + +/* A type wide enough to hold any multibyte source character. + cpplib's character constant interpreter requires an unsigned type. + Also, a typedef for the signed equivalent. + The width of this type is capped at 32 bits; there do exist targets + where wchar_t is 64 bits, but only in a non-default mode, and there + would be no meaningful interpretation for a wchar_t value greater + than 2^32 anyway -- the widest wide-character encoding around is + ISO 10646, which stops at 2^31. */ +#if CHAR_BIT * SIZEOF_INT >= 32 +# define CPPCHAR_SIGNED_T int +#elif CHAR_BIT * SIZEOF_LONG >= 32 +# define CPPCHAR_SIGNED_T long +#else +# error "Cannot find a least-32-bit signed integer type" +#endif +typedef unsigned CPPCHAR_SIGNED_T cppchar_t; +typedef CPPCHAR_SIGNED_T cppchar_signed_t; + +/* Style of header dependencies to generate. */ +enum cpp_deps_style { DEPS_NONE = 0, DEPS_USER, DEPS_SYSTEM }; + +/* The possible normalization levels, from most restrictive to least. */ +enum cpp_normalize_level { + /* In NFKC. */ + normalized_KC = 0, + /* In NFC. */ + normalized_C, + /* In NFC, except for subsequences where being in NFC would make + the identifier invalid. */ + normalized_identifier_C, + /* Not normalized at all. */ + normalized_none +}; + +/* This structure is nested inside struct cpp_reader, and + carries all the options visible to the command line. */ +struct cpp_options +{ + /* Characters between tab stops. */ + unsigned int tabstop; + + /* The language we're preprocessing. */ + enum c_lang lang; + + /* Nonzero means use extra default include directories for C++. */ + unsigned char cplusplus; + + /* Nonzero means handle cplusplus style comments. */ + unsigned char cplusplus_comments; + + /* Nonzero means define __OBJC__, treat @ as a special token, and + use the OBJC[PLUS]_INCLUDE_PATH environment variable. */ + unsigned char objc; + + /* Nonzero means don't copy comments into the output file. */ + unsigned char discard_comments; + + /* Nonzero means don't copy comments into the output file during + macro expansion. */ + unsigned char discard_comments_in_macro_exp; + + /* Nonzero means process the ISO trigraph sequences. */ + unsigned char trigraphs; + + /* Nonzero means process the ISO digraph sequences. */ + unsigned char digraphs; + + /* Nonzero means to allow hexadecimal floats and LL suffixes. */ + unsigned char extended_numbers; + + /* Nonzero means print names of header files (-H). */ + unsigned char print_include_names; + + /* Nonzero means cpp_pedwarn causes a hard error. */ + unsigned char pedantic_errors; + + /* Nonzero means don't print warning messages. */ + unsigned char inhibit_warnings; + + /* Nonzero means complain about deprecated features. */ + unsigned char warn_deprecated; + + /* Nonzero means don't suppress warnings from system headers. */ + unsigned char warn_system_headers; + + /* Nonzero means don't print error messages. Has no option to + select it, but can be set by a user of cpplib (e.g. fix-header). */ + unsigned char inhibit_errors; + + /* Nonzero means warn if slash-star appears in a comment. */ + unsigned char warn_comments; + + /* Nonzero means warn if a user-supplied include directory does not + exist. */ + unsigned char warn_missing_include_dirs; + + /* Nonzero means warn if there are any trigraphs. */ + unsigned char warn_trigraphs; + + /* Nonzero means warn about multicharacter charconsts. */ + unsigned char warn_multichar; + + /* Nonzero means warn about various incompatibilities with + traditional C. */ + unsigned char warn_traditional; + + /* Nonzero means warn about long long numeric constants. */ + unsigned char warn_long_long; + + /* Nonzero means warn about text after an #endif (or #else). */ + unsigned char warn_endif_labels; + + /* Nonzero means warn about implicit sign changes owing to integer + promotions. */ + unsigned char warn_num_sign_change; + + /* Zero means don't warn about __VA_ARGS__ usage in c89 pedantic mode. + Presumably the usage is protected by the appropriate #ifdef. */ + unsigned char warn_variadic_macros; + + /* Nonzero means turn warnings into errors. */ + unsigned char warnings_are_errors; + + /* Nonzero means we should look for header.gcc files that remap file + names. */ + unsigned char remap; + + /* Zero means dollar signs are punctuation. */ + unsigned char dollars_in_ident; + + /* Nonzero means UCNs are accepted in identifiers. */ + unsigned char extended_identifiers; + + /* True if we should warn about dollars in identifiers or numbers + for this translation unit. */ + unsigned char warn_dollars; + + /* Nonzero means warn if undefined identifiers are evaluated in an #if. */ + unsigned char warn_undef; + + /* Nonzero means warn of unused macros from the main file. */ + unsigned char warn_unused_macros; + + /* Nonzero for the 1999 C Standard, including corrigenda and amendments. */ + unsigned char c99; + + /* Nonzero if we are conforming to a specific C or C++ standard. */ + unsigned char std; + + /* Nonzero means give all the error messages the ANSI standard requires. */ + unsigned char pedantic; + + /* Nonzero means we're looking at already preprocessed code, so don't + bother trying to do macro expansion and whatnot. */ + unsigned char preprocessed; + + /* Print column number in error messages. */ + unsigned char show_column; + + /* Nonzero means handle C++ alternate operator names. */ + unsigned char operator_names; + + /* True for traditional preprocessing. */ + unsigned char traditional; + + /* Holds the name of the target (execution) character set. */ + const char *narrow_charset; + + /* Holds the name of the target wide character set. */ + const char *wide_charset; + + /* Holds the name of the input character set. */ + const char *input_charset; + + /* The minimum permitted level of normalization before a warning + is generated. */ + enum cpp_normalize_level warn_normalize; + + /* True to warn about precompiled header files we couldn't use. */ + bool warn_invalid_pch; + + /* True if dependencies should be restored from a precompiled header. */ + bool restore_pch_deps; + + /* SDCC abuse by Kevin: allow naked '#' characters in expanded macros + * (see _cpp_create_definition in cppmacro.c) + */ + unsigned char allow_naked_hash; + + /* SDCC _asm specific + switch _asm block preprocessing on / off */ + unsigned char preproc_asm; + + /* SDCC specific + object file exetnsion */ + const char *obj_ext; + + /* SDCC specific + pedantic_parse_number */ + unsigned char pedantic_parse_number; + + /* Dependency generation. */ + struct + { + /* Style of header dependencies to generate. */ + enum cpp_deps_style style; + + /* Assume missing files are generated files. */ + bool missing_files; + + /* Generate phony targets for each dependency apart from the first + one. */ + bool phony_targets; + + /* If true, no dependency is generated on the main file. */ + bool ignore_main_file; + } deps; + + /* Target-specific features set by the front end or client. */ + + /* Precision for target CPP arithmetic, target characters, target + ints and target wide characters, respectively. */ + size_t precision, char_precision, int_precision, wchar_precision; + + /* True means chars (wide chars) are unsigned. */ + bool unsigned_char, unsigned_wchar; + + /* True if the most significant byte in a word has the lowest + address in memory. */ + bool bytes_big_endian; + + /* Nonzero means __STDC__ should have the value 0 in system headers. */ + unsigned char stdc_0_in_system_headers; + + /* True means error callback should be used for diagnostics. */ + bool client_diagnostic; + + /* True disables tokenization outside of preprocessing directives. */ + bool directives_only; +}; + +/* Callback for header lookup for HEADER, which is the name of a + source file. It is used as a method of last resort to find headers + that are not otherwise found during the normal include processing. + The return value is the malloced name of a header to try and open, + if any, or NULL otherwise. This callback is called only if the + header is otherwise unfound. */ +typedef const char *(*missing_header_cb)(cpp_reader *, const char *header, cpp_dir **); + +/* Call backs to cpplib client. */ +struct cpp_callbacks +{ + /* Called when a new line of preprocessed output is started. */ + void (*line_change) (cpp_reader *, const cpp_token *, int); + + /* Called when switching to/from a new file. + The line_map is for the new file. It is NULL if there is no new file. + (In C this happens when done with + and also + when done with a main file.) This can be used for resource cleanup. */ + void (*file_change) (cpp_reader *, const struct line_map *); + + void (*dir_change) (cpp_reader *, const char *); + void (*include) (cpp_reader *, unsigned int, const unsigned char *, + const char *, int, const cpp_token **); + void (*define) (cpp_reader *, unsigned int, cpp_hashnode *); + void (*undef) (cpp_reader *, unsigned int, cpp_hashnode *); + void (*ident) (cpp_reader *, unsigned int, const cpp_string *); + void (*def_pragma) (cpp_reader *, unsigned int); + int (*valid_pch) (cpp_reader *, const char *, int); + void (*read_pch) (cpp_reader *, const char *, int, const char *); + missing_header_cb missing_header; + + /* Called to emit a diagnostic if client_diagnostic option is true. + This callback receives the translated message. */ + void (*error) (cpp_reader *, int, const char *, va_list *) + ATTRIBUTE_FPTR_PRINTF(3,0); +}; + +/* Chain of directories to look for include files in. */ +struct cpp_dir +{ + /* NULL-terminated singly-linked list. */ + struct cpp_dir *next; + + /* NAME of the directory, NUL-terminated. */ + char *name; + unsigned int len; + + /* One if a system header, two if a system header that has extern + "C" guards for C++. */ + unsigned char sysp; + + /* Mapping of file names for this directory for MS-DOS and related + platforms. A NULL-terminated array of (from, to) pairs. */ + const char **name_map; + + /* Routine to construct pathname, given the search path name and the + HEADER we are trying to find, return a constructed pathname to + try and open. If this is NULL, the constructed pathname is as + constructed by append_file_to_dir. */ + char *(*construct) (const char *header, cpp_dir *dir); + + /* The C front end uses these to recognize duplicated + directories in the search path. */ + ino_t ino; + dev_t dev; + + /* Is this a user-supplied directory? */ + bool user_supplied_p; +}; + +/* Name under which this program was invoked. */ +extern const char *progname; + +/* The structure of a node in the hash table. The hash table has + entries for all identifiers: either macros defined by #define + commands (type NT_MACRO), assertions created with #assert + (NT_ASSERTION), or neither of the above (NT_VOID). Builtin macros + like __LINE__ are flagged NODE_BUILTIN. Poisoned identifiers are + flagged NODE_POISONED. NODE_OPERATOR (C++ only) indicates an + identifier that behaves like an operator such as "xor". + NODE_DIAGNOSTIC is for speed in lex_token: it indicates a + diagnostic may be required for this node. Currently this only + applies to __VA_ARGS__ and poisoned identifiers. */ + +/* Hash node flags. */ +#define NODE_OPERATOR (1 << 0) /* C++ named operator. */ +#define NODE_POISONED (1 << 1) /* Poisoned identifier. */ +#define NODE_BUILTIN (1 << 2) /* Builtin macro. */ +#define NODE_DIAGNOSTIC (1 << 3) /* Possible diagnostic when lexed. */ +#define NODE_WARN (1 << 4) /* Warn if redefined or undefined. */ +#define NODE_DISABLED (1 << 5) /* A disabled macro. */ +#define NODE_MACRO_ARG (1 << 6) /* Used during #define processing. */ + +/* Different flavors of hash node. */ +enum node_type +{ + NT_VOID = 0, /* No definition yet. */ + NT_MACRO, /* A macro of some form. */ + NT_ASSERTION /* Predicate for #assert. */ +}; + +/* Different flavors of builtin macro. _Pragma is an operator, but we + handle it with the builtin code for efficiency reasons. */ +enum builtin_type +{ + BT_SPECLINE = 0, /* `__LINE__' */ + BT_DATE, /* `__DATE__' */ + BT_FILE, /* `__FILE__' */ + BT_BASE_FILE, /* `__BASE_FILE__' */ + BT_INCLUDE_LEVEL, /* `__INCLUDE_LEVEL__' */ + BT_TIME, /* `__TIME__' */ + BT_STDC, /* `__STDC__' */ + BT_PRAGMA, /* `_Pragma' operator */ + BT_TIMESTAMP, /* `__TIMESTAMP__' */ + BT_COUNTER /* `__COUNTER__' */ +}; + +#define CPP_HASHNODE(HNODE) ((cpp_hashnode *) (HNODE)) +#define HT_NODE(NODE) ((ht_identifier *) (NODE)) +#define NODE_LEN(NODE) HT_LEN (&(NODE)->ident) +#define NODE_NAME(NODE) HT_STR (&(NODE)->ident) + +/* Specify which field, if any, of the union is used. */ + +enum { + NTV_MACRO, + NTV_ANSWER, + NTV_BUILTIN, + NTV_ARGUMENT, + NTV_NONE +}; + +#define CPP_HASHNODE_VALUE_IDX(HNODE) \ + ((HNODE.flags & NODE_MACRO_ARG) ? NTV_ARGUMENT \ + : HNODE.type == NT_MACRO ? ((HNODE.flags & NODE_BUILTIN) \ + ? NTV_BUILTIN : NTV_MACRO) \ + : HNODE.type == NT_ASSERTION ? NTV_ANSWER \ + : NTV_NONE) + +/* The common part of an identifier node shared amongst all 3 C front + ends. Also used to store CPP identifiers, which are a superset of + identifiers in the grammatical sense. */ + +union _cpp_hashnode_value GTY(()) +{ + /* If a macro. */ + cpp_macro * GTY((tag ("NTV_MACRO"))) macro; + /* Answers to an assertion. */ + struct answer * GTY ((tag ("NTV_ANSWER"))) answers; + /* Code for a builtin macro. */ + enum builtin_type GTY ((tag ("NTV_BUILTIN"))) builtin; + /* Macro argument index. */ + unsigned short GTY ((tag ("NTV_ARGUMENT"))) arg_index; +}; + +struct cpp_hashnode GTY(()) +{ + struct ht_identifier ident; + unsigned int is_directive : 1; + unsigned int directive_index : 7; /* If is_directive, + then index into directive table. + Otherwise, a NODE_OPERATOR. */ + unsigned char rid_code; /* Rid code - for front ends. */ + ENUM_BITFIELD(node_type) type : 8; /* CPP node type. */ + unsigned char flags; /* CPP flags. */ + + union _cpp_hashnode_value GTY ((desc ("CPP_HASHNODE_VALUE_IDX (%1)"))) value; +}; + +/* Call this first to get a handle to pass to other functions. + + If you want cpplib to manage its own hashtable, pass in a NULL + pointer. Otherwise you should pass in an initialized hash table + that cpplib will share; this technique is used by the C front + ends. */ +extern cpp_reader *cpp_create_reader (enum c_lang, struct ht *, + struct line_maps *); + +/* Reset the cpp_reader's line_map. This is only used after reading a + PCH file. */ +extern void cpp_set_line_map (cpp_reader *, struct line_maps *); + +/* Call this to change the selected language standard (e.g. because of + command line options). */ +extern void cpp_set_lang (cpp_reader *, enum c_lang); + +/* Set the include paths. */ +extern void cpp_set_include_chains (cpp_reader *, cpp_dir *, cpp_dir *, int); + +/* Call these to get pointers to the options, callback, and deps + structures for a given reader. These pointers are good until you + call cpp_finish on that reader. You can either edit the callbacks + through the pointer returned from cpp_get_callbacks, or set them + with cpp_set_callbacks. */ +extern cpp_options *cpp_get_options (cpp_reader *); +extern cpp_callbacks *cpp_get_callbacks (cpp_reader *); +extern void cpp_set_callbacks (cpp_reader *, cpp_callbacks *); +extern struct deps *cpp_get_deps (cpp_reader *); + +/* This function reads the file, but does not start preprocessing. It + returns the name of the original file; this is the same as the + input file, except for preprocessed input. This will generate at + least one file change callback, and possibly a line change callback + too. If there was an error opening the file, it returns NULL. */ +extern const char *cpp_read_main_file (cpp_reader *, const char *); + +/* Set up built-ins with special behavior. Use cpp_init_builtins() + instead unless your know what you are doing. */ +extern void cpp_init_special_builtins (cpp_reader *); + +/* Set up built-ins like __FILE__. */ +extern void cpp_init_builtins (cpp_reader *, int); + +/* This is called after options have been parsed, and partially + processed. */ +extern void cpp_post_options (cpp_reader *); + +/* Set up translation to the target character set. */ +extern void cpp_init_iconv (cpp_reader *); + +/* Call this to finish preprocessing. If you requested dependency + generation, pass an open stream to write the information to, + otherwise NULL. It is your responsibility to close the stream. + + Returns cpp_errors (pfile). */ +extern int cpp_finish (cpp_reader *, FILE *deps_stream); + +/* Call this to release the handle at the end of preprocessing. Any + use of the handle after this function returns is invalid. Returns + cpp_errors (pfile). */ +extern void cpp_destroy (cpp_reader *); + +/* Error count. */ +extern unsigned int cpp_errors (cpp_reader *); + +extern unsigned int cpp_token_len (const cpp_token *); +extern unsigned char *cpp_token_as_text (cpp_reader *, const cpp_token *); +extern unsigned char *cpp_spell_token (cpp_reader *, const cpp_token *, + unsigned char *, bool); +extern void cpp_register_pragma (cpp_reader *, const char *, const char *, + void (*) (cpp_reader *), bool); +extern void cpp_register_deferred_pragma (cpp_reader *, const char *, + const char *, unsigned, bool, bool); +extern int cpp_avoid_paste (cpp_reader *, const cpp_token *, + const cpp_token *); +extern const cpp_token *cpp_get_token (cpp_reader *); +extern const cpp_token *cpp_get_token_with_location (cpp_reader *, + source_location *); +extern const unsigned char *cpp_macro_definition (cpp_reader *, + const cpp_hashnode *); +extern void _cpp_backup_tokens (cpp_reader *, unsigned int); + +/* Evaluate a CPP_CHAR or CPP_WCHAR token. */ +extern cppchar_t cpp_interpret_charconst (cpp_reader *, const cpp_token *, + unsigned int *, int *); +/* Evaluate a vector of CPP_STRING or CPP_WSTRING tokens. */ +extern bool cpp_interpret_string (cpp_reader *, + const cpp_string *, size_t, + cpp_string *, bool); +extern bool cpp_interpret_string_notranslate (cpp_reader *, + const cpp_string *, size_t, + cpp_string *, bool); + +/* Convert a host character constant to the execution character set. */ +extern cppchar_t cpp_host_to_exec_charset (cpp_reader *, cppchar_t); + +/* Used to register macros and assertions, perhaps from the command line. + The text is the same as the command line argument. */ +extern void cpp_define (cpp_reader *, const char *); +extern void cpp_assert (cpp_reader *, const char *); +extern void cpp_undef (cpp_reader *, const char *); +extern void cpp_unassert (cpp_reader *, const char *); + +extern cpp_macro *cpp_push_definition (cpp_reader *, const char *); +extern void cpp_pop_definition (cpp_reader *, const char *, cpp_macro *); + +/* Undefine all macros and assertions. */ +extern void cpp_undef_all (cpp_reader *); + +extern cpp_buffer *cpp_push_buffer (cpp_reader *, const unsigned char *, + size_t, int); +extern int cpp_defined (cpp_reader *, const unsigned char *, int); + +/* A preprocessing number. Code assumes that any unused high bits of + the double integer are set to zero. */ +typedef unsigned HOST_WIDE_INT cpp_num_part; +typedef struct cpp_num cpp_num; +struct cpp_num +{ + cpp_num_part high; + cpp_num_part low; + bool unsignedp; /* True if value should be treated as unsigned. */ + bool overflow; /* True if the most recent calculation overflowed. */ +}; + +/* cpplib provides two interfaces for interpretation of preprocessing + numbers. + + cpp_classify_number categorizes numeric constants according to + their field (integer, floating point, or invalid), radix (decimal, + octal, hexadecimal), and type suffixes. */ + +#define CPP_N_CATEGORY 0x000F +#define CPP_N_INVALID 0x0000 +#define CPP_N_INTEGER 0x0001 +#define CPP_N_FLOATING 0x0002 + +#define CPP_N_WIDTH 0x00F0 +#define CPP_N_SMALL 0x0010 /* int, float, shrot _Fract/Accum */ +#define CPP_N_MEDIUM 0x0020 /* long, double, long _Fract/_Accum. */ +#define CPP_N_LARGE 0x0040 /* long long, long double, + long long _Fract/Accum. */ + +#define CPP_N_WIDTH_MD 0xF0000 /* machine defined. */ +#define CPP_N_MD_W 0x10000 +#define CPP_N_MD_Q 0x20000 + +#define CPP_N_RADIX 0x0F00 +#define CPP_N_DECIMAL 0x0100 +#define CPP_N_HEX 0x0200 +#define CPP_N_OCTAL 0x0400 +#define CPP_N_BINARY 0x0800 + +#define CPP_N_UNSIGNED 0x1000 /* Properties. */ +#define CPP_N_IMAGINARY 0x2000 +#define CPP_N_DFLOAT 0x4000 + +#define CPP_N_FRACT 0x100000 /* Fract types. */ +#define CPP_N_ACCUM 0x200000 /* Accum types. */ + +/* Classify a CPP_NUMBER token. The return value is a combination of + the flags from the above sets. */ +extern unsigned cpp_classify_number (cpp_reader *, const cpp_token *); + +/* Evaluate a token classified as category CPP_N_INTEGER. */ +extern cpp_num cpp_interpret_integer (cpp_reader *, const cpp_token *, + unsigned int type); + +/* Sign extend a number, with PRECISION significant bits and all + others assumed clear, to fill out a cpp_num structure. */ +cpp_num cpp_num_sign_extend (cpp_num, size_t); + +/* Diagnostic levels. To get a diagnostic without associating a + position in the translation unit with it, use cpp_error_with_line + with a line number of zero. */ + +/* Warning, an error with -Werror. */ +#define CPP_DL_WARNING 0x00 +/* Same as CPP_DL_WARNING, except it is not suppressed in system headers. */ +#define CPP_DL_WARNING_SYSHDR 0x01 +/* Warning, an error with -pedantic-errors or -Werror. */ +#define CPP_DL_PEDWARN 0x02 +/* An error. */ +#define CPP_DL_ERROR 0x03 +/* An internal consistency check failed. Prints "internal error: ", + otherwise the same as CPP_DL_ERROR. */ +#define CPP_DL_ICE 0x04 +/* Extracts a diagnostic level from an int. */ +#define CPP_DL_EXTRACT(l) (l & 0xf) +/* Nonzero if a diagnostic level is one of the warnings. */ +#define CPP_DL_WARNING_P(l) (CPP_DL_EXTRACT (l) >= CPP_DL_WARNING \ + && CPP_DL_EXTRACT (l) <= CPP_DL_PEDWARN) + +/* Output a diagnostic of some kind. */ +extern void cpp_error (cpp_reader *, int, const char *msgid, ...) + ATTRIBUTE_PRINTF_3; + +/* Output a diagnostic with "MSGID: " preceding the + error string of errno. No location is printed. */ +extern void cpp_errno (cpp_reader *, int, const char *msgid); + +/* Same as cpp_error, except additionally specifies a position as a + (translation unit) physical line and physical column. If the line is + zero, then no location is printed. */ +extern void cpp_error_with_line (cpp_reader *, int, source_location, unsigned, + const char *msgid, ...) ATTRIBUTE_PRINTF_5; + +/* In cpplex.c */ +extern int cpp_ideq (const cpp_token *, const char *); +extern void cpp_output_line (cpp_reader *, FILE *); +extern void cpp_output_token (const cpp_token *, FILE *); +extern const char *cpp_type2name (enum cpp_ttype); +/* Returns the value of an escape sequence, truncated to the correct + target precision. PSTR points to the input pointer, which is just + after the backslash. LIMIT is how much text we have. WIDE is true + if the escape sequence is part of a wide character constant or + string literal. Handles all relevant diagnostics. */ +extern cppchar_t cpp_parse_escape (cpp_reader *, const unsigned char ** pstr, + const unsigned char *limit, int wide); + +/* In cpphash.c */ + +/* Lookup an identifier in the hashtable. Puts the identifier in the + table if it is not already there. */ +extern cpp_hashnode *cpp_lookup (cpp_reader *, const unsigned char *, + unsigned int); + +typedef int (*cpp_cb) (cpp_reader *, cpp_hashnode *, void *); +extern void cpp_forall_identifiers (cpp_reader *, cpp_cb, void *); + +/* In cppmacro.c */ +extern void cpp_scan_nooutput (cpp_reader *); +extern int cpp_sys_macro_p (cpp_reader *); +extern unsigned char *cpp_quote_string (unsigned char *, const unsigned char *, + unsigned int); + +/* In cppfiles.c */ +extern bool cpp_included (cpp_reader *, const char *); +extern bool cpp_included_before (cpp_reader *, const char *, source_location); +extern void cpp_make_system_header (cpp_reader *, int, int); +extern bool cpp_push_include (cpp_reader *, const char *); +extern void cpp_change_file (cpp_reader *, enum lc_reason, const char *); +extern const char *cpp_get_path (struct _cpp_file *); +extern cpp_dir *cpp_get_dir (struct _cpp_file *); +extern cpp_buffer *cpp_get_buffer (cpp_reader *); +extern struct _cpp_file *cpp_get_file (cpp_buffer *); +extern cpp_buffer *cpp_get_prev (cpp_buffer *); +extern void cpp_clear_file_cache (cpp_reader *); + +/* In cpppch.c */ +struct save_macro_data; +extern int cpp_save_state (cpp_reader *, FILE *); +extern int cpp_write_pch_deps (cpp_reader *, FILE *); +extern int cpp_write_pch_state (cpp_reader *, FILE *); +extern int cpp_valid_state (cpp_reader *, const char *, int); +extern void cpp_prepare_state (cpp_reader *, struct save_macro_data **); +extern int cpp_read_state (cpp_reader *, const char *, FILE *, + struct save_macro_data *); + +#ifdef __cplusplus +} +#endif + +#endif /* ! LIBCPP_CPPLIB_H */ diff --git a/support/cpp/libcpp/include/line-map.h b/support/cpp/libcpp/include/line-map.h new file mode 100644 index 0000000..f5b5791 --- /dev/null +++ b/support/cpp/libcpp/include/line-map.h @@ -0,0 +1,191 @@ +/* Map logical line numbers to (source file, line number) pairs. + Copyright (C) 2001, 2003, 2004, 2007 + Free Software Foundation, Inc. + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! */ + +#ifndef LIBCPP_LINE_MAP_H +#define LIBCPP_LINE_MAP_H + +#ifndef GTY +#define GTY(x) /* nothing */ +#endif + +/* Reason for adding a line change with add_line_map (). LC_ENTER is + when including a new file, e.g. a #include directive in C. + LC_LEAVE is when reaching a file's end. LC_RENAME is when a file + name or line number changes for neither of the above reasons + (e.g. a #line directive in C). */ +enum lc_reason {LC_ENTER = 0, LC_LEAVE, LC_RENAME}; + +/* A logical line/column number, i.e. an "index" into a line_map. */ +/* Long-term, we want to use this to replace struct location_s (in input.h), + and effectively typedef source_location location_t. */ +typedef unsigned int source_location; + +/* Memory allocation function typedef. Works like xrealloc. */ +typedef void *(*line_map_realloc) (void *, size_t); + +/* Physical source file TO_FILE at line TO_LINE at column 0 is represented + by the logical START_LOCATION. TO_LINE+L at column C is represented by + START_LOCATION+(L*(1<start_location) >> (MAP)->column_bits) + (MAP)->to_line) + +#define SOURCE_COLUMN(MAP, LINE) \ + (((LINE) - (MAP)->start_location) & ((1 << (MAP)->column_bits) - 1)) + +/* Returns the last source line within a map. This is the (last) line + of the #include, or other directive, that caused a map change. */ +#define LAST_SOURCE_LINE(MAP) \ + SOURCE_LINE (MAP, LAST_SOURCE_LINE_LOCATION (MAP)) +#define LAST_SOURCE_LINE_LOCATION(MAP) \ + ((((MAP)[1].start_location - 1 - (MAP)->start_location) \ + & ~((1 << (MAP)->column_bits) - 1)) \ + + (MAP)->start_location) + +/* Returns the map a given map was included from. */ +#define INCLUDED_FROM(SET, MAP) (&(SET)->maps[(MAP)->included_from]) + +/* Nonzero if the map is at the bottom of the include stack. */ +#define MAIN_FILE_P(MAP) ((MAP)->included_from < 0) + +/* Set LOC to a source position that is the same line as the most recent + linemap_line_start, but with the specified TO_COLUMN column number. */ + +#define LINEMAP_POSITION_FOR_COLUMN(LOC, SET, TO_COLUMN) { \ + unsigned int to_column = (TO_COLUMN); \ + struct line_maps *set = (SET); \ + if (__builtin_expect (to_column >= set->max_column_hint, 0)) \ + (LOC) = linemap_position_for_column (set, to_column); \ + else { \ + source_location r = set->highest_line; \ + r = r + to_column; \ + if (r >= set->highest_location) \ + set->highest_location = r; \ + (LOC) = r; \ + }} + + +extern source_location +linemap_position_for_column (struct line_maps *set, unsigned int to_column); +#endif /* !LIBCPP_LINE_MAP_H */ diff --git a/support/cpp/libcpp/include/mkdeps.h b/support/cpp/libcpp/include/mkdeps.h new file mode 100644 index 0000000..0264970 --- /dev/null +++ b/support/cpp/libcpp/include/mkdeps.h @@ -0,0 +1,80 @@ +/* Dependency generator for Makefile fragments. + Copyright (C) 2000, 2001, 2003 Free Software Foundation, Inc. + Contributed by Zack Weinberg, Mar 2000 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! */ + +#ifndef LIBCPP_MKDEPS_H +#define LIBCPP_MKDEPS_H + +/* This is the data structure used by all the functions in mkdeps.c. + It's quite straightforward, but should be treated as opaque. */ + +struct deps; +struct cpp_reader; + +/* Create a deps buffer. */ +extern struct deps *deps_init (void); + +/* Destroy a deps buffer. */ +extern void deps_free (struct deps *); + +/* Add a set of "vpath" directories. The second argument is a colon- + separated list of pathnames, like you would set Make's VPATH + variable to. If a dependency or target name begins with any of + these pathnames (and the next path element is not "..") that + pathname is stripped off. */ +extern void deps_add_vpath (struct deps *, const char *); + +/* Add a target (appears on left side of the colon) to the deps list. Takes + a boolean indicating whether to quote the target for MAKE. */ +extern void deps_add_target (struct deps *, const char *, int); + +/* Sets the default target if none has been given already. An empty + string as the default target is interpreted as stdin. */ +extern void deps_add_default_target (struct cpp_reader *, const char *); + +/* Add a dependency (appears on the right side of the colon) to the + deps list. Dependencies will be printed in the order that they + were entered with this function. By convention, the first + dependency entered should be the primary source file. */ +extern void deps_add_dep (struct deps *, const char *); + +/* Write out a deps buffer to a specified file. The third argument + is the number of columns to word-wrap at (0 means don't wrap). */ +extern void deps_write (const struct deps *, FILE *, unsigned int); + +/* Write out a deps buffer to a file, in a form that can be read back + with deps_restore. Returns nonzero on error, in which case the + error number will be in errno. */ +extern int deps_save (struct deps *, FILE *); + +/* Read back dependency information written with deps_save into + the deps buffer. The third argument may be NULL, in which case + the dependency information is just skipped, or it may be a filename, + in which case that filename is skipped. */ +extern int deps_restore (struct deps *, FILE *, const char *); + +/* For each dependency *except the first*, emit a dummy rule for that + file, causing it to depend on nothing. This is used to work around + the intermediate-file deletion misfeature in Make, in some + automatic dependency schemes. */ +extern void deps_phony_targets (const struct deps *, FILE *); + +#endif /* ! LIBCPP_MKDEPS_H */ diff --git a/support/cpp/libcpp/include/symtab.h b/support/cpp/libcpp/include/symtab.h new file mode 100644 index 0000000..ebe4139 --- /dev/null +++ b/support/cpp/libcpp/include/symtab.h @@ -0,0 +1,102 @@ +/* Hash tables. + Copyright (C) 2000, 2001, 2003, 2004, 2007 Free Software Foundation, Inc. + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ + +#ifndef LIBCPP_SYMTAB_H +#define LIBCPP_SYMTAB_H + +#if defined(__APPLE__) && defined(__MACH__) +#include "libiberty/obstack.h" +#else +#include "obstack.h" +#endif +#ifndef GTY +#define GTY(x) /* nothing */ +#endif + +/* This is what each hash table entry points to. It may be embedded + deeply within another object. */ +typedef struct ht_identifier ht_identifier; +struct ht_identifier GTY(()) +{ + const unsigned char *str; + unsigned int len; + unsigned int hash_value; +}; + +#define HT_LEN(NODE) ((NODE)->len) +#define HT_STR(NODE) ((NODE)->str) + +typedef struct ht hash_table; +typedef struct ht_identifier *hashnode; + +enum ht_lookup_option {HT_NO_INSERT = 0, HT_ALLOC, HT_ALLOCED}; + +/* An identifier hash table for cpplib and the front ends. */ +struct ht +{ + /* Identifiers are allocated from here. */ + struct obstack stack; + + hashnode *entries; + /* Call back, allocate a node. */ + hashnode (*alloc_node) (hash_table *); + /* Call back, allocate something that hangs off a node like a cpp_macro. + NULL means use the usual allocator. */ + void * (*alloc_subobject) (size_t); + + unsigned int nslots; /* Total slots in the entries array. */ + unsigned int nelements; /* Number of live elements. */ + + /* Link to reader, if any. For the benefit of cpplib. */ + struct cpp_reader *pfile; + + /* Table usage statistics. */ + unsigned int searches; + unsigned int collisions; + + /* Should 'entries' be freed when it is no longer needed? */ + bool entries_owned; +}; + +/* Initialize the hashtable with 2 ^ order entries. */ +extern hash_table *ht_create (unsigned int order); + +/* Frees all memory associated with a hash table. */ +extern void ht_destroy (hash_table *); + +extern hashnode ht_lookup (hash_table *, const unsigned char *, + size_t, enum ht_lookup_option); +extern hashnode ht_lookup_with_hash (hash_table *, const unsigned char *, + size_t, unsigned int, + enum ht_lookup_option); +#define HT_HASHSTEP(r, c) ((r) * 67 + ((c) - 113)); +#define HT_HASHFINISH(r, len) ((r) + (len)) + +/* For all nodes in TABLE, make a callback. The callback takes + TABLE->PFILE, the node, and a PTR, and the callback sequence stops + if the callback returns zero. */ +typedef int (*ht_cb) (struct cpp_reader *, hashnode, const void *); +extern void ht_forall (hash_table *, ht_cb, const void *); + +/* Restore the hash table. */ +extern void ht_load (hash_table *ht, hashnode *entries, + unsigned int nslots, unsigned int nelements, bool own); + +/* Dump allocation statistics to stderr. */ +extern void ht_dump_statistics (hash_table *); + +#endif /* LIBCPP_SYMTAB_H */ diff --git a/support/cpp/libcpp/init.c b/support/cpp/libcpp/init.c new file mode 100644 index 0000000..40d86a2 --- /dev/null +++ b/support/cpp/libcpp/init.c @@ -0,0 +1,660 @@ +/* CPP Library. + Copyright (C) 1986, 1987, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, + 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007 Free Software Foundation, Inc. + Contributed by Per Bothner, 1994-95. + Based on CCCP program by Paul Rubin, June 1986 + Adapted to ANSI C, Richard Stallman, Jan 1987 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ + +#include "config.h" +#include "system.h" +#include "cpplib.h" +#include "internal.h" +#include "mkdeps.h" +#ifdef ENABLE_NLS +#include "localedir.h" +#endif + +static void init_library (void); +static void mark_named_operators (cpp_reader *); +static void read_original_filename (cpp_reader *); +static void read_original_directory (cpp_reader *); +static void post_options (cpp_reader *); + +/* If we have designated initializers (GCC >2.7) these tables can be + initialized, constant data. Otherwise, they have to be filled in at + runtime. */ +#if HAVE_DESIGNATED_INITIALIZERS + +#define init_trigraph_map() /* Nothing. */ +#define TRIGRAPH_MAP \ +__extension__ const uchar _cpp_trigraph_map[UCHAR_MAX + 1] = { + +#define END }; +#define s(p, v) [p] = v, + +#else + +#define TRIGRAPH_MAP uchar _cpp_trigraph_map[UCHAR_MAX + 1] = { 0 }; \ + static void init_trigraph_map (void) { \ + unsigned char *x = _cpp_trigraph_map; + +#define END } +#define s(p, v) x[p] = v; + +#endif + +TRIGRAPH_MAP + s('=', '#') s(')', ']') s('!', '|') + s('(', '[') s('\'', '^') s('>', '}') + s('/', '\\') s('<', '{') s('-', '~') +END + +#undef s +#undef END +#undef TRIGRAPH_MAP + +/* A set of booleans indicating what CPP features each source language + requires. */ +struct lang_flags +{ + char c99; + char cplusplus; + char extended_numbers; + char extended_identifiers; + char std; + char cplusplus_comments; + char digraphs; +}; + +static const struct lang_flags lang_defaults[] = +{ /* c99 c++ xnum xid std // digr */ + /* GNUC89 */ { 0, 0, 1, 0, 0, 1, 1 }, + /* GNUC99 */ { 1, 0, 1, 0, 0, 1, 1 }, + /* STDC89 */ { 0, 0, 0, 0, 1, 0, 0 }, + /* STDC94 */ { 0, 0, 0, 0, 1, 0, 1 }, + /* STDC99 */ { 1, 0, 1, 0, 1, 1, 1 }, + /* GNUCXX */ { 0, 1, 1, 0, 0, 1, 1 }, + /* CXX98 */ { 0, 1, 1, 0, 1, 1, 1 }, + /* GNUCXX0X */ { 1, 1, 1, 0, 0, 1, 1 }, + /* CXX0X */ { 1, 1, 1, 0, 1, 1, 1 }, + /* ASM */ { 0, 0, 1, 0, 0, 1, 0 } + /* xid should be 1 for GNUC99, STDC99, GNUCXX, CXX98, GNUCXX0X, and + CXX0X when no longer experimental (when all uses of identifiers + in the compiler have been audited for correct handling of + extended identifiers). */ +}; + +/* Sets internal flags correctly for a given language. */ +void +cpp_set_lang (cpp_reader *pfile, enum c_lang lang) +{ + const struct lang_flags *l = &lang_defaults[(int) lang]; + + CPP_OPTION (pfile, lang) = lang; + + CPP_OPTION (pfile, c99) = l->c99; + CPP_OPTION (pfile, cplusplus) = l->cplusplus; + CPP_OPTION (pfile, extended_numbers) = l->extended_numbers; + CPP_OPTION (pfile, extended_identifiers) = l->extended_identifiers; + CPP_OPTION (pfile, std) = l->std; + CPP_OPTION (pfile, trigraphs) = l->std; + CPP_OPTION (pfile, cplusplus_comments) = l->cplusplus_comments; + CPP_OPTION (pfile, digraphs) = l->digraphs; +} + +/* Initialize library global state. */ +static void +init_library (void) +{ + static int initialized = 0; + + if (! initialized) + { + initialized = 1; + + /* Set up the trigraph map. This doesn't need to do anything if + we were compiled with a compiler that supports C99 designated + initializers. */ + init_trigraph_map (); + +#ifdef ENABLE_NLS + (void) bindtextdomain (PACKAGE, LOCALEDIR); +#endif + } +} + +/* Initialize a cpp_reader structure. */ +cpp_reader * +cpp_create_reader (enum c_lang lang, hash_table *table, + struct line_maps *line_table) +{ + cpp_reader *pfile; + + /* Initialize this instance of the library if it hasn't been already. */ + init_library (); + + pfile = XCNEW (cpp_reader); + + cpp_set_lang (pfile, lang); + CPP_OPTION (pfile, warn_multichar) = 1; + CPP_OPTION (pfile, discard_comments) = 1; + CPP_OPTION (pfile, discard_comments_in_macro_exp) = 1; + CPP_OPTION (pfile, show_column) = 1; + CPP_OPTION (pfile, tabstop) = 8; + CPP_OPTION (pfile, operator_names) = 1; + CPP_OPTION (pfile, warn_trigraphs) = 2; + CPP_OPTION (pfile, warn_endif_labels) = 1; + CPP_OPTION (pfile, warn_deprecated) = 1; + CPP_OPTION (pfile, warn_long_long) = !CPP_OPTION (pfile, c99); + CPP_OPTION (pfile, dollars_in_ident) = 1; + CPP_OPTION (pfile, warn_dollars) = 1; + CPP_OPTION (pfile, warn_variadic_macros) = 1; + CPP_OPTION (pfile, warn_normalize) = normalized_C; + + /* Default CPP arithmetic to something sensible for the host for the + benefit of dumb users like fix-header. */ + CPP_OPTION (pfile, precision) = CHAR_BIT * sizeof (long); + CPP_OPTION (pfile, char_precision) = CHAR_BIT; + CPP_OPTION (pfile, wchar_precision) = CHAR_BIT * sizeof (int); + CPP_OPTION (pfile, int_precision) = CHAR_BIT * sizeof (int); + CPP_OPTION (pfile, unsigned_char) = 0; + CPP_OPTION (pfile, unsigned_wchar) = 1; + CPP_OPTION (pfile, bytes_big_endian) = 1; /* does not matter */ + + /* Default to no charset conversion. */ + CPP_OPTION (pfile, narrow_charset) = _cpp_default_encoding (); + CPP_OPTION (pfile, wide_charset) = 0; + + /* Default the input character set to UTF-8. */ + CPP_OPTION (pfile, input_charset) = _cpp_default_encoding (); + + /* A fake empty "directory" used as the starting point for files + looked up without a search path. Name cannot be '/' because we + don't want to prepend anything at all to filenames using it. All + other entries are correct zero-initialized. */ + pfile->no_search_path.name = (char *) ""; + + /* Initialize the line map. */ + pfile->line_table = line_table; + + /* Initialize lexer state. */ + pfile->state.save_comments = ! CPP_OPTION (pfile, discard_comments); + + /* Set up static tokens. */ + pfile->avoid_paste.type = CPP_PADDING; + pfile->avoid_paste.val.source = NULL; + pfile->eof.type = CPP_EOF; + pfile->eof.flags = 0; + + /* Create a token buffer for the lexer. */ + _cpp_init_tokenrun (&pfile->base_run, 250); + pfile->cur_run = &pfile->base_run; + pfile->cur_token = pfile->base_run.base; + + /* Initialize the base context. */ + pfile->context = &pfile->base_context; + pfile->base_context.macro = 0; + pfile->base_context.prev = pfile->base_context.next = 0; + + /* Aligned and unaligned storage. */ + pfile->a_buff = _cpp_get_buff (pfile, 0); + pfile->u_buff = _cpp_get_buff (pfile, 0); + + /* The expression parser stack. */ + _cpp_expand_op_stack (pfile); + + /* Initialize the buffer obstack. */ + _obstack_begin (&pfile->buffer_ob, 0, 0, + (void *(*) (long)) xmalloc, + (void (*) (void *)) free); + + _cpp_init_files (pfile); + + _cpp_init_hashtable (pfile, table); + + return pfile; +} + +/* Set the line_table entry in PFILE. This is called after reading a + PCH file, as the old line_table will be incorrect. */ +void +cpp_set_line_map (cpp_reader *pfile, struct line_maps *line_table) +{ + pfile->line_table = line_table; +} + +/* Free resources used by PFILE. Accessing PFILE after this function + returns leads to undefined behavior. Returns the error count. */ +void +cpp_destroy (cpp_reader *pfile) +{ + cpp_context *context, *contextn; + tokenrun *run, *runn; + + free (pfile->op_stack); + + while (CPP_BUFFER (pfile) != NULL) + _cpp_pop_buffer (pfile); + + if (pfile->out.base) + free (pfile->out.base); + + if (pfile->macro_buffer) + { + free (pfile->macro_buffer); + pfile->macro_buffer = NULL; + pfile->macro_buffer_len = 0; + } + + if (pfile->deps) + deps_free (pfile->deps); + obstack_free (&pfile->buffer_ob, 0); + + _cpp_destroy_hashtable (pfile); + _cpp_cleanup_files (pfile); + _cpp_destroy_iconv (pfile); + + _cpp_free_buff (pfile->a_buff); + _cpp_free_buff (pfile->u_buff); + _cpp_free_buff (pfile->free_buffs); + + for (run = &pfile->base_run; run; run = runn) + { + runn = run->next; + free (run->base); + if (run != &pfile->base_run) + free (run); + } + + for (context = pfile->base_context.next; context; context = contextn) + { + contextn = context->next; + free (context); + } + + free (pfile); +} + +/* This structure defines one built-in identifier. A node will be + entered in the hash table under the name NAME, with value VALUE. + + There are two tables of these. builtin_array holds all the + "builtin" macros: these are handled by builtin_macro() in + macro.c. Builtin is somewhat of a misnomer -- the property of + interest is that these macros require special code to compute their + expansions. The value is a "builtin_type" enumerator. + + operator_array holds the C++ named operators. These are keywords + which act as aliases for punctuators. In C++, they cannot be + altered through #define, and #if recognizes them as operators. In + C, these are not entered into the hash table at all (but see + ). The value is a token-type enumerator. */ +struct builtin +{ + const uchar *name; + unsigned short len; + unsigned short value; +}; + +#define B(n, t) { DSC(n), t } +static const struct builtin builtin_array[] = +{ + B("__TIMESTAMP__", BT_TIMESTAMP), + B("__TIME__", BT_TIME), + B("__DATE__", BT_DATE), + B("__FILE__", BT_FILE), + B("__BASE_FILE__", BT_BASE_FILE), + B("__LINE__", BT_SPECLINE), + B("__INCLUDE_LEVEL__", BT_INCLUDE_LEVEL), + B("__COUNTER__", BT_COUNTER), + /* Keep builtins not used for -traditional-cpp at the end, and + update init_builtins() if any more are added. */ + B("_Pragma", BT_PRAGMA), + B("__STDC__", BT_STDC), +}; + +static const struct builtin operator_array[] = +{ + B("and", CPP_AND_AND), + B("and_eq", CPP_AND_EQ), + B("bitand", CPP_AND), + B("bitor", CPP_OR), + B("compl", CPP_COMPL), + B("not", CPP_NOT), + B("not_eq", CPP_NOT_EQ), + B("or", CPP_OR_OR), + B("or_eq", CPP_OR_EQ), + B("xor", CPP_XOR), + B("xor_eq", CPP_XOR_EQ) +}; +#undef B + +/* Mark the C++ named operators in the hash table. */ +static void +mark_named_operators (cpp_reader *pfile) +{ + const struct builtin *b; + + for (b = operator_array; + b < (operator_array + ARRAY_SIZE (operator_array)); + b++) + { + cpp_hashnode *hp = cpp_lookup (pfile, b->name, b->len); + hp->flags |= NODE_OPERATOR; + hp->is_directive = 0; + hp->directive_index = b->value; + } +} + +void +cpp_init_special_builtins (cpp_reader *pfile) +{ + const struct builtin *b; + size_t n = ARRAY_SIZE (builtin_array); + + if (CPP_OPTION (pfile, traditional)) + n -= 2; + else if (! CPP_OPTION (pfile, stdc_0_in_system_headers) + || CPP_OPTION (pfile, std)) + n--; + + for (b = builtin_array; b < builtin_array + n; b++) + { + cpp_hashnode *hp = cpp_lookup (pfile, b->name, b->len); + hp->type = NT_MACRO; + hp->flags |= NODE_BUILTIN | NODE_WARN; + hp->value.builtin = (enum builtin_type) b->value; + } +} + +/* Read the builtins table above and enter them, and language-specific + macros, into the hash table. HOSTED is true if this is a hosted + environment. */ +void +cpp_init_builtins (cpp_reader *pfile, int hosted) +{ + cpp_init_special_builtins (pfile); + + if (!CPP_OPTION (pfile, traditional) + && (! CPP_OPTION (pfile, stdc_0_in_system_headers) + || CPP_OPTION (pfile, std))) + _cpp_define_builtin (pfile, "__STDC__ 1"); + + if (CPP_OPTION (pfile, cplusplus)) + _cpp_define_builtin (pfile, "__cplusplus 1"); + else if (CPP_OPTION (pfile, lang) == CLK_ASM) + _cpp_define_builtin (pfile, "__ASSEMBLER__ 1"); + else if (CPP_OPTION (pfile, lang) == CLK_STDC94) + _cpp_define_builtin (pfile, "__STDC_VERSION__ 199409L"); + else if (CPP_OPTION (pfile, c99)) + _cpp_define_builtin (pfile, "__STDC_VERSION__ 199901L"); + + if (hosted) + _cpp_define_builtin (pfile, "__STDC_HOSTED__ 1"); + else + _cpp_define_builtin (pfile, "__STDC_HOSTED__ 0"); + + if (CPP_OPTION (pfile, objc)) + _cpp_define_builtin (pfile, "__OBJC__ 1"); +} + +/* Sanity-checks are dependent on command-line options, so it is + called as a subroutine of cpp_read_main_file (). */ +#if ENABLE_CHECKING +static void sanity_checks (cpp_reader *); +static void sanity_checks (cpp_reader *pfile) +{ + cppchar_t test = 0; + size_t max_precision = 2 * CHAR_BIT * sizeof (cpp_num_part); + + /* Sanity checks for assumptions about CPP arithmetic and target + type precisions made by cpplib. */ + test--; + if (test < 1) + cpp_error (pfile, CPP_DL_ICE, "cppchar_t must be an unsigned type"); + + if (CPP_OPTION (pfile, precision) > max_precision) + cpp_error (pfile, CPP_DL_ICE, + "preprocessor arithmetic has maximum precision of %lu bits;" + " target requires %lu bits", + (unsigned long) max_precision, + (unsigned long) CPP_OPTION (pfile, precision)); + + if (CPP_OPTION (pfile, precision) < CPP_OPTION (pfile, int_precision)) + cpp_error (pfile, CPP_DL_ICE, + "CPP arithmetic must be at least as precise as a target int"); + + if (CPP_OPTION (pfile, char_precision) < 8) + cpp_error (pfile, CPP_DL_ICE, "target char is less than 8 bits wide"); + + if (CPP_OPTION (pfile, wchar_precision) < CPP_OPTION (pfile, char_precision)) + cpp_error (pfile, CPP_DL_ICE, + "target wchar_t is narrower than target char"); + + if (CPP_OPTION (pfile, int_precision) < CPP_OPTION (pfile, char_precision)) + cpp_error (pfile, CPP_DL_ICE, + "target int is narrower than target char"); + + /* This is assumed in eval_token() and could be fixed if necessary. */ + if (sizeof (cppchar_t) > sizeof (cpp_num_part)) + cpp_error (pfile, CPP_DL_ICE, + "CPP half-integer narrower than CPP character"); + + if (CPP_OPTION (pfile, wchar_precision) > BITS_PER_CPPCHAR_T) + cpp_error (pfile, CPP_DL_ICE, + "CPP on this host cannot handle wide character constants over" + " %lu bits, but the target requires %lu bits", + (unsigned long) BITS_PER_CPPCHAR_T, + (unsigned long) CPP_OPTION (pfile, wchar_precision)); +} +#else +# define sanity_checks(PFILE) +#endif + +/* This is called after options have been parsed, and partially + processed. */ +void +cpp_post_options (cpp_reader *pfile) +{ + sanity_checks (pfile); + + post_options (pfile); + + /* Mark named operators before handling command line macros. */ + if (CPP_OPTION (pfile, cplusplus) && CPP_OPTION (pfile, operator_names)) + mark_named_operators (pfile); +} + +/* Setup for processing input from the file named FNAME, or stdin if + it is the empty string. Return the original filename + on success (e.g. foo.i->foo.c), or NULL on failure. */ +const char * +cpp_read_main_file (cpp_reader *pfile, const char *fname) +{ + if (CPP_OPTION (pfile, deps.style) != DEPS_NONE) + { + if (!pfile->deps) + pfile->deps = deps_init (); + + /* Set the default target (if there is none already). */ + deps_add_default_target (pfile, fname); + } + + pfile->main_file + = _cpp_find_file (pfile, fname, &pfile->no_search_path, false, 0); + if (_cpp_find_failed (pfile->main_file)) + return NULL; + + _cpp_stack_file (pfile, pfile->main_file, false); + + /* For foo.i, read the original filename foo.c now, for the benefit + of the front ends. */ + if (CPP_OPTION (pfile, preprocessed)) + { + read_original_filename (pfile); + fname = pfile->line_table->maps[pfile->line_table->used-1].to_file; + } + return fname; +} + +/* For preprocessed files, if the first tokens are of the form # NUM. + handle the directive so we know the original file name. This will + generate file_change callbacks, which the front ends must handle + appropriately given their state of initialization. */ +static void +read_original_filename (cpp_reader *pfile) +{ + const cpp_token *token, *token1; + + /* Lex ahead; if the first tokens are of the form # NUM, then + process the directive, otherwise back up. */ + token = _cpp_lex_direct (pfile); + if (token->type == CPP_HASH) + { + pfile->state.in_directive = 1; + token1 = _cpp_lex_direct (pfile); + _cpp_backup_tokens (pfile, 1); + pfile->state.in_directive = 0; + + /* If it's a #line directive, handle it. */ + if (token1->type == CPP_NUMBER) + { + _cpp_handle_directive (pfile, token->flags & PREV_WHITE); + read_original_directory (pfile); + return; + } + } + + /* Backup as if nothing happened. */ + _cpp_backup_tokens (pfile, 1); +} + +/* For preprocessed files, if the tokens following the first filename + line is of the form # "/path/name//", handle the + directive so we know the original current directory. */ +static void +read_original_directory (cpp_reader *pfile) +{ + const cpp_token *hash, *token; + + /* Lex ahead; if the first tokens are of the form # NUM, then + process the directive, otherwise back up. */ + hash = _cpp_lex_direct (pfile); + if (hash->type != CPP_HASH) + { + _cpp_backup_tokens (pfile, 1); + return; + } + + token = _cpp_lex_direct (pfile); + + if (token->type != CPP_NUMBER) + { + _cpp_backup_tokens (pfile, 2); + return; + } + + token = _cpp_lex_direct (pfile); + + if (token->type != CPP_STRING + || ! (token->val.str.len >= 5 + && token->val.str.text[token->val.str.len-2] == '/' + && token->val.str.text[token->val.str.len-3] == '/')) + { + _cpp_backup_tokens (pfile, 3); + return; + } + + if (pfile->cb.dir_change) + { + char *debugdir = (char *) alloca (token->val.str.len - 3); + + memcpy (debugdir, (const char *) token->val.str.text + 1, + token->val.str.len - 4); + debugdir[token->val.str.len - 4] = '\0'; + + pfile->cb.dir_change (pfile, debugdir); + } +} + +/* This is called at the end of preprocessing. It pops the last + buffer and writes dependency output, and returns the number of + errors. + + Maybe it should also reset state, such that you could call + cpp_start_read with a new filename to restart processing. */ +int +cpp_finish (cpp_reader *pfile, FILE *deps_stream) +{ + /* Warn about unused macros before popping the final buffer. */ + if (CPP_OPTION (pfile, warn_unused_macros)) + cpp_forall_identifiers (pfile, _cpp_warn_if_unused_macro, NULL); + + /* lex.c leaves the final buffer on the stack. This it so that + it returns an unending stream of CPP_EOFs to the client. If we + popped the buffer, we'd dereference a NULL buffer pointer and + segfault. It's nice to allow the client to do worry-free excess + cpp_get_token calls. */ + while (pfile->buffer) + _cpp_pop_buffer (pfile); + + /* Don't write the deps file if there are errors. */ + if (CPP_OPTION (pfile, deps.style) != DEPS_NONE + && deps_stream && pfile->errors == 0) + { + deps_write (pfile->deps, deps_stream, 72); + + if (CPP_OPTION (pfile, deps.phony_targets)) + deps_phony_targets (pfile->deps, deps_stream); + } + + /* Report on headers that could use multiple include guards. */ + if (CPP_OPTION (pfile, print_include_names)) + _cpp_report_missing_guards (pfile); + + return pfile->errors; +} + +static void +post_options (cpp_reader *pfile) +{ + /* -Wtraditional is not useful in C++ mode. */ + if (CPP_OPTION (pfile, cplusplus)) + CPP_OPTION (pfile, warn_traditional) = 0; + + /* Permanently disable macro expansion if we are rescanning + preprocessed text. Read preprocesed source in ISO mode. */ + if (CPP_OPTION (pfile, preprocessed)) + { + if (!CPP_OPTION (pfile, directives_only)) + pfile->state.prevent_expansion = 1; + CPP_OPTION (pfile, traditional) = 0; + } + + if (CPP_OPTION (pfile, warn_trigraphs) == 2) + CPP_OPTION (pfile, warn_trigraphs) = !CPP_OPTION (pfile, trigraphs); + + if (CPP_OPTION (pfile, traditional)) + { + CPP_OPTION (pfile, cplusplus_comments) = 0; + + /* Traditional CPP does not accurately track column information. */ + CPP_OPTION (pfile, show_column) = 0; + CPP_OPTION (pfile, trigraphs) = 0; + CPP_OPTION (pfile, warn_trigraphs) = 0; + } +} diff --git a/support/cpp/libcpp/internal.h b/support/cpp/libcpp/internal.h new file mode 100644 index 0000000..ac08c42 --- /dev/null +++ b/support/cpp/libcpp/internal.h @@ -0,0 +1,704 @@ +/* Part of CPP library. + Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007 + Free Software Foundation, Inc. + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ + +/* This header defines all the internal data structures and functions + that need to be visible across files. It should not be used outside + cpplib. */ + +#ifndef LIBCPP_INTERNAL_H +#define LIBCPP_INTERNAL_H + +#include "symtab.h" +#include "cpp-id-data.h" + +#ifndef HAVE_ICONV_H +#undef HAVE_ICONV +#endif + +#if HAVE_ICONV +#include +#else +#define HAVE_ICONV 0 +typedef int iconv_t; /* dummy */ +#endif + +struct directive; /* Deliberately incomplete. */ +struct pending_option; +struct op; +struct _cpp_strbuf; + +typedef bool (*convert_f) (iconv_t, const unsigned char *, size_t, + struct _cpp_strbuf *); +struct cset_converter +{ + convert_f func; + iconv_t cd; +}; + +#define BITS_PER_CPPCHAR_T (CHAR_BIT * sizeof (cppchar_t)) + +/* Test if a sign is valid within a preprocessing number. */ +#define VALID_SIGN(c, prevc) \ + (((c) == '+' || (c) == '-') && \ + ((prevc) == 'e' || (prevc) == 'E' \ + || (((prevc) == 'p' || (prevc) == 'P') \ + && CPP_OPTION (pfile, extended_numbers)))) + +#define CPP_OPTION(PFILE, OPTION) ((PFILE)->opts.OPTION) +#define CPP_BUFFER(PFILE) ((PFILE)->buffer) +#define CPP_BUF_COLUMN(BUF, CUR) ((CUR) - (BUF)->line_base) +#define CPP_BUF_COL(BUF) CPP_BUF_COLUMN(BUF, (BUF)->cur) + +#define CPP_INCREMENT_LINE(PFILE, COLS_HINT) do { \ + const struct line_maps *line_table = PFILE->line_table; \ + const struct line_map *map = &line_table->maps[line_table->used-1]; \ + unsigned int line = SOURCE_LINE (map, line_table->highest_line); \ + linemap_line_start (PFILE->line_table, line + 1, COLS_HINT); \ + } while (0) + +/* Maximum nesting of cpp_buffers. We use a static limit, partly for + efficiency, and partly to limit runaway recursion. */ +#define CPP_STACK_MAX 200 + +/* Host alignment handling. */ +struct dummy +{ + char c; + union + { + double d; + int *p; + } u; +}; + +#define DEFAULT_ALIGNMENT offsetof (struct dummy, u) +#define CPP_ALIGN2(size, align) (((size) + ((align) - 1)) & ~((align) - 1)) +#define CPP_ALIGN(size) CPP_ALIGN2 (size, DEFAULT_ALIGNMENT) + +#define _cpp_mark_macro_used(NODE) do { \ + if ((NODE)->type == NT_MACRO && !((NODE)->flags & NODE_BUILTIN)) \ + (NODE)->value.macro->used = 1; } while (0) + +/* A generic memory buffer, and operations on it. */ +typedef struct _cpp_buff _cpp_buff; +struct _cpp_buff +{ + struct _cpp_buff *next; + unsigned char *base, *cur, *limit; +}; + +extern _cpp_buff *_cpp_get_buff (cpp_reader *, size_t); +extern void _cpp_release_buff (cpp_reader *, _cpp_buff *); +extern void _cpp_extend_buff (cpp_reader *, _cpp_buff **, size_t); +extern _cpp_buff *_cpp_append_extend_buff (cpp_reader *, _cpp_buff *, size_t); +extern void _cpp_free_buff (_cpp_buff *); +extern unsigned char *_cpp_aligned_alloc (cpp_reader *, size_t); +extern unsigned char *_cpp_unaligned_alloc (cpp_reader *, size_t); + +#define BUFF_ROOM(BUFF) (size_t) ((BUFF)->limit - (BUFF)->cur) +#define BUFF_FRONT(BUFF) ((BUFF)->cur) +#define BUFF_LIMIT(BUFF) ((BUFF)->limit) + +/* #include types. */ +enum include_type {IT_INCLUDE, IT_INCLUDE_NEXT, IT_IMPORT, IT_CMDLINE}; + +union utoken +{ + const cpp_token *token; + const cpp_token **ptoken; +}; + +/* A "run" of tokens; part of a chain of runs. */ +typedef struct tokenrun tokenrun; +struct tokenrun +{ + tokenrun *next, *prev; + cpp_token *base, *limit; +}; + +/* Accessor macros for struct cpp_context. */ +#define FIRST(c) ((c)->u.iso.first) +#define LAST(c) ((c)->u.iso.last) +#define CUR(c) ((c)->u.trad.cur) +#define RLIMIT(c) ((c)->u.trad.rlimit) + +typedef struct cpp_context cpp_context; +struct cpp_context +{ + /* Doubly-linked list. */ + cpp_context *next, *prev; + + union + { + /* For ISO macro expansion. Contexts other than the base context + are contiguous tokens. e.g. macro expansions, expanded + argument tokens. */ + struct + { + union utoken first; + union utoken last; + } iso; + + /* For traditional macro expansion. */ + struct + { + const unsigned char *cur; + const unsigned char *rlimit; + } trad; + } u; + + /* If non-NULL, a buffer used for storage related to this context. + When the context is popped, the buffer is released. */ + _cpp_buff *buff; + + /* For a macro context, the macro node, otherwise NULL. */ + cpp_hashnode *macro; + + /* True if utoken element is token, else ptoken. */ + bool direct_p; +}; + +struct lexer_state +{ + /* Nonzero if first token on line is CPP_HASH. */ + unsigned char in_directive; + + /* Nonzero if in a directive that will handle padding tokens itself. + #include needs this to avoid problems with computed include and + spacing between tokens. */ + unsigned char directive_wants_padding; + + /* True if we are skipping a failed conditional group. */ + unsigned char skipping; + + /* Nonzero if in a directive that takes angle-bracketed headers. */ + unsigned char angled_headers; + + /* Nonzero if in a #if or #elif directive. */ + unsigned char in_expression; + + /* Nonzero to save comments. Turned off if discard_comments, and in + all directives apart from #define. */ + unsigned char save_comments; + + /* Nonzero if lexing __VA_ARGS__ is valid. */ + unsigned char va_args_ok; + + /* Nonzero if lexing poisoned identifiers is valid. */ + unsigned char poisoned_ok; + + /* Nonzero to prevent macro expansion. */ + unsigned char prevent_expansion; + + /* Nonzero when parsing arguments to a function-like macro. */ + unsigned char parsing_args; + + /* Nonzero if prevent_expansion is true only because output is + being discarded. */ + unsigned char discarding_output; + + /* Nonzero to skip evaluating part of an expression. */ + unsigned int skip_eval; + + /* Nonzero when handling a deferred pragma. */ + unsigned char in_deferred_pragma; + + /* Nonzero if the deferred pragma being handled allows macro expansion. */ + unsigned char pragma_allow_expansion; +}; + +/* Special nodes - identifiers with predefined significance. */ +struct spec_nodes +{ + cpp_hashnode *n_defined; /* defined operator */ + cpp_hashnode *n_true; /* C++ keyword true */ + cpp_hashnode *n_false; /* C++ keyword false */ + cpp_hashnode *n__VA_ARGS__; /* C99 vararg macros */ + /* SDCC _asm specific */ + cpp_hashnode *n__asm; /* _asm ... _endasm ; */ +}; + +typedef struct _cpp_line_note _cpp_line_note; +struct _cpp_line_note +{ + /* Location in the clean line the note refers to. */ + const unsigned char *pos; + + /* Type of note. The 9 'from' trigraph characters represent those + trigraphs, '\\' an escaped newline, ' ' an escaped newline with + intervening space, and anything else is invalid. */ + unsigned int type; +}; + +/* Represents the contents of a file cpplib has read in. */ +struct cpp_buffer +{ + const unsigned char *cur; /* Current location. */ + const unsigned char *line_base; /* Start of current physical line. */ + const unsigned char *next_line; /* Start of to-be-cleaned logical line. */ + + const unsigned char *buf; /* Entire character buffer. */ + const unsigned char *rlimit; /* Writable byte at end of file. */ + + _cpp_line_note *notes; /* Array of notes. */ + unsigned int cur_note; /* Next note to process. */ + unsigned int notes_used; /* Number of notes. */ + unsigned int notes_cap; /* Size of allocated array. */ + + struct cpp_buffer *prev; + + /* Pointer into the file table; non-NULL if this is a file buffer. + Used for include_next and to record control macros. */ + struct _cpp_file *file; + + /* Saved value of __TIMESTAMP__ macro - date and time of last modification + of the assotiated file. */ + const unsigned char *timestamp; + + /* Value of if_stack at start of this file. + Used to prohibit unmatched #endif (etc) in an include file. */ + struct if_stack *if_stack; + + /* True if we need to get the next clean line. */ + bool need_line; + + /* True if we have already warned about C++ comments in this file. + The warning happens only for C89 extended mode with -pedantic on, + or for -Wtraditional, and only once per file (otherwise it would + be far too noisy). */ + unsigned int warned_cplusplus_comments : 1; + + /* True if we don't process trigraphs and escaped newlines. True + for preprocessed input, command line directives, and _Pragma + buffers. */ + unsigned int from_stage3 : 1; + + /* At EOF, a buffer is automatically popped. If RETURN_AT_EOF is + true, a CPP_EOF token is then returned. Otherwise, the next + token from the enclosing buffer is returned. */ + unsigned int return_at_eof : 1; + + /* One for a system header, two for a C system header file that therefore + needs to be extern "C" protected in C++, and zero otherwise. */ + unsigned char sysp; + + /* The directory of the this buffer's file. Its NAME member is not + allocated, so we don't need to worry about freeing it. */ + struct cpp_dir dir; + + /* Descriptor for converting from the input character set to the + source character set. */ + struct cset_converter input_cset_desc; +}; + +/* A cpp_reader encapsulates the "state" of a pre-processor run. + Applying cpp_get_token repeatedly yields a stream of pre-processor + tokens. Usually, there is only one cpp_reader object active. */ +struct cpp_reader +{ + /* Top of buffer stack. */ + cpp_buffer *buffer; + + /* Overlaid buffer (can be different after processing #include). */ + cpp_buffer *overlaid_buffer; + + /* Lexer state. */ + struct lexer_state state; + + /* Source line tracking. */ + struct line_maps *line_table; + + /* The line of the '#' of the current directive. */ + source_location directive_line; + + /* Memory buffers. */ + _cpp_buff *a_buff; /* Aligned permanent storage. */ + _cpp_buff *u_buff; /* Unaligned permanent storage. */ + _cpp_buff *free_buffs; /* Free buffer chain. */ + + /* Context stack. */ + struct cpp_context base_context; + struct cpp_context *context; + + /* If in_directive, the directive if known. */ + const struct directive *directive; + + /* Token generated while handling a directive, if any. */ + cpp_token directive_result; + + /* When expanding a macro at top-level, this is the location of the + macro invocation. */ + source_location invocation_location; + + /* True if this call to cpp_get_token should consider setting + invocation_location. */ + bool set_invocation_location; + + /* Search paths for include files. */ + struct cpp_dir *quote_include; /* "" */ + struct cpp_dir *bracket_include; /* <> */ + struct cpp_dir no_search_path; /* No path. */ + + /* Chain of all hashed _cpp_file instances. */ + struct _cpp_file *all_files; + + struct _cpp_file *main_file; + + /* File and directory hash table. */ + struct htab *file_hash; + struct htab *dir_hash; + struct file_hash_entry_pool *file_hash_entries; + + /* Negative path lookup hash table. */ + struct htab *nonexistent_file_hash; + struct obstack nonexistent_file_ob; + + /* Nonzero means don't look for #include "foo" the source-file + directory. */ + bool quote_ignores_source_dir; + + /* Nonzero if any file has contained #pragma once or #import has + been used. */ + bool seen_once_only; + + /* Multiple include optimization. */ + const cpp_hashnode *mi_cmacro; + const cpp_hashnode *mi_ind_cmacro; + bool mi_valid; + + /* Lexing. */ + cpp_token *cur_token; + tokenrun base_run, *cur_run; + unsigned int lookaheads; + + /* Nonzero prevents the lexer from re-using the token runs. */ + unsigned int keep_tokens; + + /* Error counter for exit code. */ + unsigned int errors; + + /* Buffer to hold macro definition string. */ + unsigned char *macro_buffer; + unsigned int macro_buffer_len; + + /* Descriptor for converting from the source character set to the + execution character set. */ + struct cset_converter narrow_cset_desc; + + /* Descriptor for converting from the source character set to the + wide execution character set. */ + struct cset_converter wide_cset_desc; + + /* Date and time text. Calculated together if either is requested. */ + const unsigned char *date; + const unsigned char *time; + + /* EOF token, and a token forcing paste avoidance. */ + cpp_token avoid_paste; + cpp_token eof; + + /* Opaque handle to the dependencies of mkdeps.c. */ + struct deps *deps; + + /* Obstack holding all macro hash nodes. This never shrinks. + See identifiers.c */ + struct obstack hash_ob; + + /* Obstack holding buffer and conditional structures. This is a + real stack. See directives.c. */ + struct obstack buffer_ob; + + /* Pragma table - dynamic, because a library user can add to the + list of recognized pragmas. */ + struct pragma_entry *pragmas; + + /* Call backs to cpplib client. */ + struct cpp_callbacks cb; + + /* Identifier hash table. */ + struct ht *hash_table; + + /* Expression parser stack. */ + struct op *op_stack, *op_limit; + + /* User visible options. */ + struct cpp_options opts; + + /* Special nodes - identifiers with predefined significance to the + preprocessor. */ + struct spec_nodes spec_nodes; + + /* Whether cpplib owns the hashtable. */ + bool our_hashtable; + + /* Traditional preprocessing output buffer (a logical line). */ + struct + { + unsigned char *base; + unsigned char *limit; + unsigned char *cur; + source_location first_line; + } out; + + /* Used for buffer overlays by traditional.c. */ + const unsigned char *saved_cur, *saved_rlimit, *saved_line_base; + + /* A saved list of the defined macros, for dependency checking + of precompiled headers. */ + struct cpp_savedstate *savedstate; + + /* Next value of __COUNTER__ macro. */ + unsigned int counter; +}; + +/* Character classes. Based on the more primitive macros in safe-ctype.h. + If the definition of `numchar' looks odd to you, please look up the + definition of a pp-number in the C standard [section 6.4.8 of C99]. + + In the unlikely event that characters other than \r and \n enter + the set is_vspace, the macro handle_newline() in lex.c must be + updated. */ +#define _dollar_ok(x) ((x) == '$' && CPP_OPTION (pfile, dollars_in_ident)) + +#define is_idchar(x) (ISIDNUM(x) || _dollar_ok(x)) +#define is_numchar(x) ISIDNUM(x) +#define is_idstart(x) (ISIDST(x) || _dollar_ok(x)) +#define is_numstart(x) ISDIGIT(x) +#define is_hspace(x) ISBLANK(x) +#define is_vspace(x) IS_VSPACE(x) +#define is_nvspace(x) IS_NVSPACE(x) +#define is_space(x) IS_SPACE_OR_NUL(x) + +/* This table is constant if it can be initialized at compile time, + which is the case if cpp was compiled with GCC >=2.7, or another + compiler that supports C99. */ +#if HAVE_DESIGNATED_INITIALIZERS +extern const unsigned char _cpp_trigraph_map[UCHAR_MAX + 1]; +#else +extern unsigned char _cpp_trigraph_map[UCHAR_MAX + 1]; +#endif + +/* Macros. */ + +static inline int cpp_in_system_header (cpp_reader *); +static inline int +cpp_in_system_header (cpp_reader *pfile) +{ + return pfile->buffer ? pfile->buffer->sysp : 0; +} +#define CPP_PEDANTIC(PF) CPP_OPTION (PF, pedantic) +#define CPP_WTRADITIONAL(PF) CPP_OPTION (PF, warn_traditional) + +static inline int cpp_in_primary_file (cpp_reader *); +static inline int +cpp_in_primary_file (cpp_reader *pfile) +{ + return pfile->line_table->depth == 1; +} + +/* In errors.c */ +extern int _cpp_begin_message (cpp_reader *, int, + source_location, unsigned int); + +/* In macro.c */ +extern void _cpp_free_definition (cpp_hashnode *); +extern bool _cpp_create_definition (cpp_reader *, cpp_hashnode *); +extern void _cpp_pop_context (cpp_reader *); +extern void _cpp_push_text_context (cpp_reader *, cpp_hashnode *, + const unsigned char *, size_t); +extern bool _cpp_save_parameter (cpp_reader *, cpp_macro *, cpp_hashnode *); +extern bool _cpp_arguments_ok (cpp_reader *, cpp_macro *, const cpp_hashnode *, + unsigned int); +extern const unsigned char *_cpp_builtin_macro_text (cpp_reader *, + cpp_hashnode *); +extern int _cpp_warn_if_unused_macro (cpp_reader *, cpp_hashnode *, void *); +extern void _cpp_push_token_context (cpp_reader *, cpp_hashnode *, + const cpp_token *, unsigned int); + +/* In identifiers.c */ +extern void _cpp_init_hashtable (cpp_reader *, hash_table *); +extern void _cpp_destroy_hashtable (cpp_reader *); + +/* In files.c */ +typedef struct _cpp_file _cpp_file; +extern _cpp_file *_cpp_find_file (cpp_reader *, const char *, cpp_dir *, + bool, int); +extern bool _cpp_find_failed (_cpp_file *); +extern void _cpp_mark_file_once_only (cpp_reader *, struct _cpp_file *); +extern void _cpp_fake_include (cpp_reader *, const char *); +extern bool _cpp_stack_file (cpp_reader *, _cpp_file*, bool); +extern bool _cpp_stack_include (cpp_reader *, const char *, int, + enum include_type); +extern int _cpp_compare_file_date (cpp_reader *, const char *, int); +extern void _cpp_report_missing_guards (cpp_reader *); +extern void _cpp_init_files (cpp_reader *); +extern void _cpp_cleanup_files (cpp_reader *); +extern void _cpp_pop_file_buffer (cpp_reader *, struct _cpp_file *); +extern bool _cpp_save_file_entries (cpp_reader *pfile, FILE *f); +extern bool _cpp_read_file_entries (cpp_reader *, FILE *); +extern struct stat *_cpp_get_file_stat (_cpp_file *); + +/* In expr.c */ +extern bool _cpp_parse_expr (cpp_reader *); +extern struct op *_cpp_expand_op_stack (cpp_reader *); + +/* In lex.c */ +extern void _cpp_process_line_notes (cpp_reader *, int); +extern void _cpp_clean_line (cpp_reader *); +extern bool _cpp_get_fresh_line (cpp_reader *); +extern bool _cpp_skip_block_comment (cpp_reader *); +extern cpp_token *_cpp_temp_token (cpp_reader *); +extern const cpp_token *_cpp_lex_token (cpp_reader *); +extern cpp_token *_cpp_lex_direct (cpp_reader *); +extern int _cpp_equiv_tokens (const cpp_token *, const cpp_token *); +extern void _cpp_init_tokenrun (tokenrun *, unsigned int); + +/* In init.c. */ +extern void _cpp_maybe_push_include_file (cpp_reader *); + +/* In directives.c */ +extern int _cpp_test_assertion (cpp_reader *, unsigned int *); +extern int _cpp_handle_directive (cpp_reader *, int); +extern void _cpp_define_builtin (cpp_reader *, const char *); +extern char ** _cpp_save_pragma_names (cpp_reader *); +extern void _cpp_restore_pragma_names (cpp_reader *, char **); +extern int _cpp_do__Pragma (cpp_reader *); +extern void _cpp_init_directives (cpp_reader *); +extern void _cpp_init_internal_pragmas (cpp_reader *); +extern void _cpp_do_file_change (cpp_reader *, enum lc_reason, const char *, + unsigned int, unsigned int); +extern void _cpp_pop_buffer (cpp_reader *); + +/* In directives.c */ +struct _cpp_dir_only_callbacks +{ + /* Called to print a block of lines. */ + void (*print_lines) (int, const void *, size_t); + void (*maybe_print_line) (source_location); +}; + +extern void _cpp_preprocess_dir_only (cpp_reader *, + const struct _cpp_dir_only_callbacks *); + +/* In traditional.c. */ +extern bool _cpp_scan_out_logical_line (cpp_reader *, cpp_macro *); +extern bool _cpp_read_logical_line_trad (cpp_reader *); +extern void _cpp_overlay_buffer (cpp_reader *pfile, const unsigned char *, + size_t); +extern void _cpp_remove_overlay (cpp_reader *); +extern bool _cpp_create_trad_definition (cpp_reader *, cpp_macro *); +extern bool _cpp_expansions_different_trad (const cpp_macro *, + const cpp_macro *); +extern unsigned char *_cpp_copy_replacement_text (const cpp_macro *, + unsigned char *); +extern size_t _cpp_replacement_text_len (const cpp_macro *); + +/* In charset.c. */ + +/* The normalization state at this point in the sequence. + It starts initialized to all zeros, and at the end + 'level' is the normalization level of the sequence. */ + +struct normalize_state +{ + /* The previous character. */ + cppchar_t previous; + /* The combining class of the previous character. */ + unsigned char prev_class; + /* The lowest normalization level so far. */ + enum cpp_normalize_level level; +}; +#define INITIAL_NORMALIZE_STATE { 0, 0, normalized_KC } +#define NORMALIZE_STATE_RESULT(st) ((st)->level) + +/* We saw a character that matches ISIDNUM(), update a + normalize_state appropriately. */ +#define NORMALIZE_STATE_UPDATE_IDNUM(st) \ + ((st)->previous = 0, (st)->prev_class = 0) + +extern cppchar_t _cpp_valid_ucn (cpp_reader *, const unsigned char **, + const unsigned char *, int, + struct normalize_state *state); +extern void _cpp_destroy_iconv (cpp_reader *); +extern unsigned char *_cpp_convert_input (cpp_reader *, const char *, + unsigned char *, size_t, size_t, + off_t *); +extern const char *_cpp_default_encoding (void); +extern cpp_hashnode * _cpp_interpret_identifier (cpp_reader *pfile, + const unsigned char *id, + size_t len); + +/* Utility routines and macros. */ +#define DSC(str) (const unsigned char *)str, sizeof str - 1 + +/* These are inline functions instead of macros so we can get type + checking. */ +static inline int ustrcmp (const unsigned char *, const unsigned char *); +static inline int ustrncmp (const unsigned char *, const unsigned char *, + size_t); +static inline size_t ustrlen (const unsigned char *); +static inline unsigned char *uxstrdup (const unsigned char *); +static inline unsigned char *ustrchr (const unsigned char *, int); +static inline int ufputs (const unsigned char *, FILE *); + +/* Use a const char for the second parameter since it is usually a literal. */ +static inline int ustrcspn (const unsigned char *, const char *); + +static inline int +ustrcmp (const unsigned char *s1, const unsigned char *s2) +{ + return strcmp ((const char *)s1, (const char *)s2); +} + +static inline int +ustrncmp (const unsigned char *s1, const unsigned char *s2, size_t n) +{ + return strncmp ((const char *)s1, (const char *)s2, n); +} + +static inline int +ustrcspn (const unsigned char *s1, const char *s2) +{ + return strcspn ((const char *)s1, s2); +} + +static inline size_t +ustrlen (const unsigned char *s1) +{ + return strlen ((const char *)s1); +} + +static inline unsigned char * +uxstrdup (const unsigned char *s1) +{ + return (unsigned char *) xstrdup ((const char *)s1); +} + +static inline unsigned char * +ustrchr (const unsigned char *s1, int c) +{ + return (unsigned char *) strchr ((const char *)s1, c); +} + +static inline int +ufputs (const unsigned char *s, FILE *f) +{ + return fputs ((const char *)s, f); +} + +#endif /* ! LIBCPP_INTERNAL_H */ diff --git a/support/cpp/libcpp/lex.c b/support/cpp/libcpp/lex.c new file mode 100644 index 0000000..ab04177 --- /dev/null +++ b/support/cpp/libcpp/lex.c @@ -0,0 +1,2124 @@ +/* CPP Library - lexical analysis. + Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. + Contributed by Per Bothner, 1994-95. + Based on CCCP program by Paul Rubin, June 1986 + Adapted to ANSI C, Richard Stallman, Jan 1987 + Broken out to separate file, Zack Weinberg, Mar 2000 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ + +#include "config.h" +#include "system.h" +#include "cpplib.h" +#include "internal.h" +#include + +enum spell_type +{ + SPELL_OPERATOR = 0, + SPELL_IDENT, + SPELL_LITERAL, + SPELL_NONE +}; + +struct token_spelling +{ + enum spell_type category; + const unsigned char *name; +}; + +static const unsigned char *const digraph_spellings[] = +{ U"%:", U"%:%:", U"<:", U":>", U"<%", U"%>" }; + +#define OP(e, s) { SPELL_OPERATOR, U s }, +#define TK(e, s) { SPELL_ ## s, U #e }, +static const struct token_spelling token_spellings[N_TTYPES] = { TTYPE_TABLE }; +#undef OP +#undef TK + +#define TOKEN_SPELL(token) (token_spellings[(token)->type].category) +#define TOKEN_NAME(token) (token_spellings[(token)->type].name) + +static void add_line_note (cpp_buffer *, const uchar *, unsigned int); +static int skip_line_comment (cpp_reader *); +static void skip_whitespace (cpp_reader *, cppchar_t); +static void lex_string (cpp_reader *, cpp_token *, const uchar *); +static void save_comment (cpp_reader *, cpp_token *, const uchar *, cppchar_t); +static void create_literal (cpp_reader *, cpp_token *, const uchar *, + unsigned int, enum cpp_ttype); +static bool warn_in_comment (cpp_reader *, _cpp_line_note *); +static int name_p (cpp_reader *, const cpp_string *); +static tokenrun *next_tokenrun (tokenrun *); + +static _cpp_buff *new_buff (size_t); + + +/* Utility routine: + + Compares, the token TOKEN to the NUL-terminated string STRING. + TOKEN must be a CPP_NAME. Returns 1 for equal, 0 for unequal. */ +int +cpp_ideq (const cpp_token *token, const char *string) +{ + if (token->type != CPP_NAME) + return 0; + + return !ustrcmp (NODE_NAME (token->val.node), (const uchar *) string); +} + +/* Record a note TYPE at byte POS into the current cleaned logical + line. */ +static void +add_line_note (cpp_buffer *buffer, const uchar *pos, unsigned int type) +{ + if (buffer->notes_used == buffer->notes_cap) + { + buffer->notes_cap = buffer->notes_cap * 2 + 200; + buffer->notes = XRESIZEVEC (_cpp_line_note, buffer->notes, + buffer->notes_cap); + } + + buffer->notes[buffer->notes_used].pos = pos; + buffer->notes[buffer->notes_used].type = type; + buffer->notes_used++; +} + +/* Returns with a logical line that contains no escaped newlines or + trigraphs. This is a time-critical inner loop. */ +void +_cpp_clean_line (cpp_reader *pfile) +{ + cpp_buffer *buffer; + const uchar *s; + uchar c, *d, *p; + + buffer = pfile->buffer; + buffer->cur_note = buffer->notes_used = 0; + buffer->cur = buffer->line_base = buffer->next_line; + buffer->need_line = false; + s = buffer->next_line - 1; + + if (!buffer->from_stage3) + { + const uchar *pbackslash = NULL; + + /* Short circuit for the common case of an un-escaped line with + no trigraphs. The primary win here is by not writing any + data back to memory until we have to. */ + for (;;) + { + c = *++s; + if (__builtin_expect (c == '\n', false) + || __builtin_expect (c == '\r', false)) + { + d = (uchar *) s; + + if (__builtin_expect (s == buffer->rlimit, false)) + goto done; + + /* DOS line ending? */ + if (__builtin_expect (c == '\r', false) + && s[1] == '\n') + { + s++; + if (s == buffer->rlimit) + goto done; + } + + if (__builtin_expect (pbackslash == NULL, true)) + goto done; + + /* Check for escaped newline. */ + p = d; + while (is_nvspace (p[-1])) + p--; + if (p - 1 != pbackslash) + goto done; + + /* Have an escaped newline; process it and proceed to + the slow path. */ + add_line_note (buffer, p - 1, p != d ? ' ' : '\\'); + d = p - 2; + buffer->next_line = p - 1; + break; + } + if (__builtin_expect (c == '\\', false)) + pbackslash = s; + else if (__builtin_expect (c == '?', false) + && __builtin_expect (s[1] == '?', false) + && _cpp_trigraph_map[s[2]]) + { + /* Have a trigraph. We may or may not have to convert + it. Add a line note regardless, for -Wtrigraphs. */ + add_line_note (buffer, s, s[2]); + if (CPP_OPTION (pfile, trigraphs)) + { + /* We do, and that means we have to switch to the + slow path. */ + d = (uchar *) s; + *d = _cpp_trigraph_map[s[2]]; + s += 2; + break; + } + } + } + + + for (;;) + { + c = *++s; + *++d = c; + + if (c == '\n' || c == '\r') + { + /* Handle DOS line endings. */ + if (c == '\r' && s != buffer->rlimit && s[1] == '\n') + s++; + if (s == buffer->rlimit) + break; + + /* Escaped? */ + p = d; + while (p != buffer->next_line && is_nvspace (p[-1])) + p--; + if (p == buffer->next_line || p[-1] != '\\') + break; + + add_line_note (buffer, p - 1, p != d ? ' ': '\\'); + d = p - 2; + buffer->next_line = p - 1; + } + else if (c == '?' && s[1] == '?' && _cpp_trigraph_map[s[2]]) + { + /* Add a note regardless, for the benefit of -Wtrigraphs. */ + add_line_note (buffer, d, s[2]); + if (CPP_OPTION (pfile, trigraphs)) + { + *d = _cpp_trigraph_map[s[2]]; + s += 2; + } + } + } + } + else + { + do + s++; + while (*s != '\n' && *s != '\r'); + d = (uchar *) s; + + /* Handle DOS line endings. */ + if (*s == '\r' && s != buffer->rlimit && s[1] == '\n') + s++; + } + + done: + *d = '\n'; + /* A sentinel note that should never be processed. */ + add_line_note (buffer, d + 1, '\n'); + buffer->next_line = s + 1; +} + +/* Return true if the trigraph indicated by NOTE should be warned + about in a comment. */ +static bool +warn_in_comment (cpp_reader *pfile, _cpp_line_note *note) +{ + const uchar *p; + + /* Within comments we don't warn about trigraphs, unless the + trigraph forms an escaped newline, as that may change + behavior. */ + if (note->type != '/') + return false; + + /* If -trigraphs, then this was an escaped newline iff the next note + is coincident. */ + if (CPP_OPTION (pfile, trigraphs)) + return note[1].pos == note->pos; + + /* Otherwise, see if this forms an escaped newline. */ + p = note->pos + 3; + while (is_nvspace (*p)) + p++; + + /* There might have been escaped newlines between the trigraph and the + newline we found. Hence the position test. */ + return (*p == '\n' && p < note[1].pos); +} + +/* Process the notes created by add_line_note as far as the current + location. */ +void +_cpp_process_line_notes (cpp_reader *pfile, int in_comment) +{ + cpp_buffer *buffer = pfile->buffer; + + for (;;) + { + _cpp_line_note *note = &buffer->notes[buffer->cur_note]; + unsigned int col; + + if (note->pos > buffer->cur) + break; + + buffer->cur_note++; + col = CPP_BUF_COLUMN (buffer, note->pos + 1); + + if (note->type == '\\' || note->type == ' ') + { + if (note->type == ' ' && !in_comment) + cpp_error_with_line (pfile, CPP_DL_WARNING, pfile->line_table->highest_line, col, + "backslash and newline separated by space"); + + if (buffer->next_line > buffer->rlimit) + { + cpp_error_with_line (pfile, CPP_DL_PEDWARN, pfile->line_table->highest_line, col, + "backslash-newline at end of file"); + /* Prevent "no newline at end of file" warning. */ + buffer->next_line = buffer->rlimit; + } + + buffer->line_base = note->pos; + CPP_INCREMENT_LINE (pfile, 0); + } + else if (_cpp_trigraph_map[note->type]) + { + if (CPP_OPTION (pfile, warn_trigraphs) + && (!in_comment || warn_in_comment (pfile, note))) + { + if (CPP_OPTION (pfile, trigraphs)) + cpp_error_with_line (pfile, CPP_DL_WARNING, pfile->line_table->highest_line, col, + "trigraph ??%c converted to %c", + note->type, + (int) _cpp_trigraph_map[note->type]); + else + { + cpp_error_with_line + (pfile, CPP_DL_WARNING, pfile->line_table->highest_line, col, + "trigraph ??%c ignored, use -trigraphs to enable", + note->type); + } + } + } + else + abort (); + } +} + +/* SDCC _asm specific */ +/* Skip an _asm ... _endasm block. We find the end of the comment by + seeing _endasm. Returns non-zero if _asm terminated by EOF, zero + otherwise. */ +static int +skip_asm_block (cpp_reader *pfile) +{ +#define _ENDASM_STR "endasm" +#define _ENDASM_LEN ((sizeof _ENDASM_STR) - 1) + + cpp_buffer *buffer = pfile->buffer; + cppchar_t c = EOF; + int prev_space = 0; + int ret = 1; + + while (buffer->cur != buffer->rlimit) + { + prev_space = is_space(c); + c = *buffer->cur++; + + if (prev_space && c == '_') + { + if (buffer->cur + _ENDASM_LEN <= buffer->rlimit && + strncmp((char *)buffer->cur, _ENDASM_STR, _ENDASM_LEN) == 0) + { + buffer->cur += _ENDASM_LEN; + ret = 0; + break; + } + } + else if (c == '\n') + { + unsigned int cols; + --buffer->cur; + _cpp_process_line_notes (pfile, true); + if (buffer->next_line >= buffer->rlimit) + return true; + _cpp_clean_line (pfile); + + cols = buffer->next_line - buffer->line_base; + CPP_INCREMENT_LINE (pfile, cols); + } + } + + _cpp_process_line_notes (pfile, true); + return ret; +} + +/* Skip a C-style block comment. We find the end of the comment by + seeing if an asterisk is before every '/' we encounter. Returns + nonzero if comment terminated by EOF, zero otherwise. + + Buffer->cur points to the initial asterisk of the comment. */ +bool +_cpp_skip_block_comment (cpp_reader *pfile) +{ + cpp_buffer *buffer = pfile->buffer; + const uchar *cur = buffer->cur; + uchar c; + + cur++; + if (*cur == '/') + cur++; + + for (;;) + { + /* People like decorating comments with '*', so check for '/' + instead for efficiency. */ + c = *cur++; + + if (c == '/') + { + if (cur[-2] == '*') + break; + + /* Warn about potential nested comments, but not if the '/' + comes immediately before the true comment delimiter. + Don't bother to get it right across escaped newlines. */ + if (CPP_OPTION (pfile, warn_comments) + && cur[0] == '*' && cur[1] != '/') + { + buffer->cur = cur; + cpp_error_with_line (pfile, CPP_DL_WARNING, + pfile->line_table->highest_line, CPP_BUF_COL (buffer), + "\"/*\" within comment"); + } + } + else if (c == '\n') + { + unsigned int cols; + buffer->cur = cur - 1; + _cpp_process_line_notes (pfile, true); + if (buffer->next_line >= buffer->rlimit) + return true; + _cpp_clean_line (pfile); + + cols = buffer->next_line - buffer->line_base; + CPP_INCREMENT_LINE (pfile, cols); + + cur = buffer->cur; + } + } + + buffer->cur = cur; + _cpp_process_line_notes (pfile, true); + return false; +} + +/* Skip a C++ line comment, leaving buffer->cur pointing to the + terminating newline. Handles escaped newlines. Returns nonzero + if a multiline comment. */ +static int +skip_line_comment (cpp_reader *pfile) +{ + cpp_buffer *buffer = pfile->buffer; + unsigned int orig_line = pfile->line_table->highest_line; + + while (*buffer->cur != '\n') + buffer->cur++; + + _cpp_process_line_notes (pfile, true); + return orig_line != pfile->line_table->highest_line; +} + +/* Skips whitespace, saving the next non-whitespace character. */ +static void +skip_whitespace (cpp_reader *pfile, cppchar_t c) +{ + cpp_buffer *buffer = pfile->buffer; + bool saw_NUL = false; + + do + { + /* Horizontal space always OK. */ + if (c == ' ' || c == '\t') + ; + /* Just \f \v or \0 left. */ + else if (c == '\0') + saw_NUL = true; + else if (pfile->state.in_directive && CPP_PEDANTIC (pfile)) + cpp_error_with_line (pfile, CPP_DL_PEDWARN, pfile->line_table->highest_line, + CPP_BUF_COL (buffer), + "%s in preprocessing directive", + c == '\f' ? "form feed" : "vertical tab"); + + c = *buffer->cur++; + } + /* We only want non-vertical space, i.e. ' ' \t \f \v \0. */ + while (is_nvspace (c)); + + if (saw_NUL) + cpp_error (pfile, CPP_DL_WARNING, "null character(s) ignored"); + + buffer->cur--; +} + +/* See if the characters of a number token are valid in a name (no + '.', '+' or '-'). */ +static int +name_p (cpp_reader *pfile, const cpp_string *string) +{ + unsigned int i; + + for (i = 0; i < string->len; i++) + if (!is_idchar (string->text[i])) + return 0; + + return 1; +} + +/* After parsing an identifier or other sequence, produce a warning about + sequences not in NFC/NFKC. */ +static void +warn_about_normalization (cpp_reader *pfile, + const cpp_token *token, + const struct normalize_state *s) +{ + if (CPP_OPTION (pfile, warn_normalize) < NORMALIZE_STATE_RESULT (s) + && !pfile->state.skipping) + { + /* Make sure that the token is printed using UCNs, even + if we'd otherwise happily print UTF-8. */ + unsigned char *buf = XNEWVEC (unsigned char, cpp_token_len (token)); + size_t sz; + + sz = cpp_spell_token (pfile, token, buf, false) - buf; + if (NORMALIZE_STATE_RESULT (s) == normalized_C) + cpp_error_with_line (pfile, CPP_DL_WARNING, token->src_loc, 0, + "`%.*s' is not in NFKC", (int) sz, buf); + else + cpp_error_with_line (pfile, CPP_DL_WARNING, token->src_loc, 0, + "`%.*s' is not in NFC", (int) sz, buf); + } +} + +/* Returns TRUE if the sequence starting at buffer->cur is invalid in + an identifier. FIRST is TRUE if this starts an identifier. */ +static bool +forms_identifier_p (cpp_reader *pfile, int first, + struct normalize_state *state) +{ + cpp_buffer *buffer = pfile->buffer; + + if (*buffer->cur == '$') + { + if (!CPP_OPTION (pfile, dollars_in_ident)) + return false; + + buffer->cur++; + if (CPP_OPTION (pfile, warn_dollars) && !pfile->state.skipping) + { + CPP_OPTION (pfile, warn_dollars) = 0; + cpp_error (pfile, CPP_DL_PEDWARN, "'$' in identifier or number"); + } + + return true; + } + + /* Is this a syntactically valid UCN? */ + if (CPP_OPTION (pfile, extended_identifiers) + && *buffer->cur == '\\' + && (buffer->cur[1] == 'u' || buffer->cur[1] == 'U')) + { + buffer->cur += 2; + if (_cpp_valid_ucn (pfile, &buffer->cur, buffer->rlimit, 1 + !first, + state)) + return true; + buffer->cur -= 2; + } + + return false; +} + +/* Lex an identifier starting at BUFFER->CUR - 1. */ +static cpp_hashnode * +lex_identifier (cpp_reader *pfile, const uchar *base, bool starts_ucn, + struct normalize_state *nst) +{ + cpp_hashnode *result; + const uchar *cur; + unsigned int len; + unsigned int hash = HT_HASHSTEP (0, *base); + + cur = pfile->buffer->cur; + if (! starts_ucn) + while (ISIDNUM (*cur)) + { + hash = HT_HASHSTEP (hash, *cur); + cur++; + } + pfile->buffer->cur = cur; + if (starts_ucn || forms_identifier_p (pfile, false, nst)) + { + /* Slower version for identifiers containing UCNs (or $). */ + do { + while (ISIDNUM (*pfile->buffer->cur)) + { + pfile->buffer->cur++; + NORMALIZE_STATE_UPDATE_IDNUM (nst); + } + } while (forms_identifier_p (pfile, false, nst)); + result = _cpp_interpret_identifier (pfile, base, + pfile->buffer->cur - base); + } + else + { + len = cur - base; + hash = HT_HASHFINISH (hash, len); + + result = (cpp_hashnode *) + ht_lookup_with_hash (pfile->hash_table, base, len, hash, HT_ALLOC); + } + + /* Rarely, identifiers require diagnostics when lexed. */ + if (__builtin_expect ((result->flags & NODE_DIAGNOSTIC) + && !pfile->state.skipping, 0)) + { + /* It is allowed to poison the same identifier twice. */ + if ((result->flags & NODE_POISONED) && !pfile->state.poisoned_ok) + cpp_error (pfile, CPP_DL_ERROR, "attempt to use poisoned \"%s\"", + NODE_NAME (result)); + + /* Constraint 6.10.3.5: __VA_ARGS__ should only appear in the + replacement list of a variadic macro. */ + if (result == pfile->spec_nodes.n__VA_ARGS__ + && !pfile->state.va_args_ok) + cpp_error (pfile, CPP_DL_PEDWARN, + "__VA_ARGS__ can only appear in the expansion" + " of a C99 variadic macro"); + } + + return result; +} + +/* SDCC specific */ +/* Pedantic parse a number, beginning with character C, skipping embedded + backslash-newlines. LEADING_PERIOD is nonzero if there was a "." + before C. Place the result in NUMBER. */ +static void +pedantic_lex_number (cpp_reader *pfile, cpp_string *number) +{ +#define get_effective_char(pfile) (*pfile->buffer->cur++) +#define BACKUP() (--pfile->buffer->cur) + + enum num_type_e { NT_DEC, NT_HEX, NT_BIN } num_type = NT_DEC; + enum num_part_e { NP_WHOLE, NP_FRACT, NP_EXP, NP_INT_SUFFIX, NP_FLOAT_SUFFIX } num_part = NP_WHOLE; + + uchar c = *(pfile->buffer->cur - 1); + struct obstack *stack = &pfile->hash_table->stack; + int len = 0; + int has_whole = 0; + int has_fract = 0; + + if ('.' == c) + { + num_part = NP_FRACT; + ++len; + obstack_1grow (stack, '.'); + c = get_effective_char (pfile); + } + else + { + if ('0' == c) + { + has_whole = 1; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + + switch (c) + { + case 'X': + case 'x': + num_type = NT_HEX; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + break; + + case 'B': + case 'b': + if (!CPP_OPTION (pfile, std)) + { + num_type = NT_BIN; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + } + break; + + case '.': + num_part = NP_FRACT; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + break; + } + } + } + + for (; ; ) + { + switch (num_part) + { + case NP_WHOLE: + if (NT_DEC == num_type) + { + while (ISDIGIT (c)) + { + has_whole = 1; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + } + + if ('.' == c) + { + num_part = NP_FRACT; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + continue; + } + else if ('E' == c || 'e' == c) + { + if (has_whole || has_fract) + { + num_part = NP_EXP; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + continue; + } + else + break; + } + } + else if (NT_HEX == num_type) + { + while (ISXDIGIT (c)) + { + has_whole = 1; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + } + + if ('.' == c) + { + num_part = NP_FRACT; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + continue; + } + else if ('P' == c || 'p' == c) + { + if (has_whole || has_fract) + { + num_part = NP_EXP; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + continue; + } + else + break; + } + } + else /* (NT_BIN == num_type) */ + { + while ((c=='0') || (c=='1')) + { + has_whole = 1; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + } + + if ('.' == c) + { + num_part = NP_FRACT; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + continue; + } + else if ('P' == c || 'p' == c) + { + if (has_whole || has_fract) + { + num_part = NP_EXP; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + continue; + } + else + break; + } + } + num_part = NP_INT_SUFFIX; + continue; + + case NP_FRACT: + if (NT_DEC == num_type) + { + while (ISDIGIT (c)) + { + has_fract = 1; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + } + + if ('E' == c || 'e' == c) + { + if (has_whole || has_fract) + { + num_part = NP_EXP; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + continue; + } + } + } + else + { + while (ISXDIGIT (c)) + { + has_fract = 1; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + } + + if ('P' == c || 'p' == c) + { + if (has_whole || has_fract) + { + num_part = NP_EXP; + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + continue; + } + } + } + num_part = NP_FLOAT_SUFFIX; + continue; + + case NP_EXP: + if ('+' == c || '-' == c) + { + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + } + + while (ISDIGIT (c)) + { + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + } + + num_part = NP_FLOAT_SUFFIX; + continue; + + case NP_INT_SUFFIX: + if ('L' == c || 'l' == c) + { + uchar prevc = c; + + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + + if (c == prevc) + { + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + } + } + else if ('U' == c || 'u' == c) + { + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + } + break; + + case NP_FLOAT_SUFFIX: + if ('F' == c || 'f' == c) + { + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + } + else if ('L' == c || 'l' == c) + { + ++len; + obstack_1grow (stack, c); + c = get_effective_char (pfile); + } + break; + } + break; + } + + /* Step back over the unwanted char. */ + BACKUP (); + + number->text = obstack_finish (stack); + number->len = len; +} + +/* Lex a number to NUMBER starting at BUFFER->CUR - 1. */ +static void +lex_number (cpp_reader *pfile, cpp_string *number, + struct normalize_state *nst) +{ + const uchar *cur; + const uchar *base; + uchar *dest; + + base = pfile->buffer->cur - 1; + do + { + cur = pfile->buffer->cur; + + /* N.B. ISIDNUM does not include $. */ + while (ISIDNUM (*cur) || *cur == '.' || VALID_SIGN (*cur, cur[-1])) + { + cur++; + NORMALIZE_STATE_UPDATE_IDNUM (nst); + } + + pfile->buffer->cur = cur; + } + while (forms_identifier_p (pfile, false, nst)); + + number->len = cur - base; + dest = _cpp_unaligned_alloc (pfile, number->len + 1); + memcpy (dest, base, number->len); + dest[number->len] = '\0'; + number->text = dest; +} + +/* Create a token of type TYPE with a literal spelling. */ +static void +create_literal (cpp_reader *pfile, cpp_token *token, const uchar *base, + unsigned int len, enum cpp_ttype type) +{ + uchar *dest = _cpp_unaligned_alloc (pfile, len + 1); + + memcpy (dest, base, len); + dest[len] = '\0'; + token->type = type; + token->val.str.len = len; + token->val.str.text = dest; +} + +/* Lexes a string, character constant, or angle-bracketed header file + name. The stored string contains the spelling, including opening + quote and leading any leading 'L'. It returns the type of the + literal, or CPP_OTHER if it was not properly terminated. + + The spelling is NUL-terminated, but it is not guaranteed that this + is the first NUL since embedded NULs are preserved. */ +static void +lex_string (cpp_reader *pfile, cpp_token *token, const uchar *base) +{ + bool saw_NUL = false; + const uchar *cur; + cppchar_t terminator; + enum cpp_ttype type; + + cur = base; + terminator = *cur++; + if (terminator == 'L') + terminator = *cur++; + if (terminator == '\"') + type = *base == 'L' ? CPP_WSTRING: CPP_STRING; + else if (terminator == '\'') + type = *base == 'L' ? CPP_WCHAR: CPP_CHAR; + else + terminator = '>', type = CPP_HEADER_NAME; + + for (;;) + { + cppchar_t c = *cur++; + + /* In #include-style directives, terminators are not escapable. */ + if (c == '\\' && !pfile->state.angled_headers && *cur != '\n') + cur++; + else if (c == terminator) + break; + else if (c == '\n') + { + cur--; + type = CPP_OTHER; + break; + } + else if (c == '\0') + saw_NUL = true; + } + + if (saw_NUL && !pfile->state.skipping) + cpp_error (pfile, CPP_DL_WARNING, + "null character(s) preserved in literal"); + + if (type == CPP_OTHER && CPP_OPTION (pfile, lang) != CLK_ASM) + cpp_error (pfile, CPP_DL_PEDWARN, "missing terminating %c character", + (int) terminator); + + pfile->buffer->cur = cur; + create_literal (pfile, token, base, cur - base, type); +} + +/* Fixed _WIN32 problem with CR-CR-LF sequences when outputting + comment blocks (when executed with -C option) and + _asm (SDCPP specific) blocks */ + +/* Count and copy characters from src to dest, excluding CRs: + CRs are automatically generated, because the output is + opened in TEXT mode. If dest == NULL, only count chars */ +static unsigned int +copy_text_chars (unsigned char *dest, const unsigned char *src, unsigned int len) +{ + unsigned int n = 0; + const unsigned char *p; + + for (p = src; p != src + len; ++p) + { + assert(*p != '\0'); + + if (*p != '\r') + { + if (dest != NULL) + *dest++ = *p; + ++n; + } + } + + return n; +} + +/* SDCC _asm specific */ +/* The stored comment includes the comment start and any terminator. */ +static void +save_asm (cpp_reader *pfile, cpp_token *token, const unsigned char *from) +{ +#define _ASM_STR "_asm" +#define _ASM_LEN ((sizeof _ASM_STR) - 1) + + unsigned char *buffer; + unsigned int text_len, len; + + len = pfile->buffer->cur - from; + /* + _ASM_LEN for the initial '_asm'. */ + text_len = copy_text_chars (NULL, from, len) + _ASM_LEN; + buffer = _cpp_unaligned_alloc (pfile, text_len); + + + token->type = CPP_ASM; + token->val.str.len = text_len; + token->val.str.text = buffer; + + memcpy (buffer, _ASM_STR, _ASM_LEN); + copy_text_chars (buffer + _ASM_LEN, from, len); +} + +/* The stored comment includes the comment start and any terminator. */ +static void +save_comment (cpp_reader *pfile, cpp_token *token, const unsigned char *from, + cppchar_t type) +{ + unsigned char *buffer; + unsigned int len, clen; + + len = pfile->buffer->cur - from + 1; /* + 1 for the initial '/'. */ + + /* C++ comments probably (not definitely) have moved past a new + line, which we don't want to save in the comment. */ + if (is_vspace (pfile->buffer->cur[-1])) + len--; + + /* If we are currently in a directive, then we need to store all + C++ comments as C comments internally, and so we need to + allocate a little extra space in that case. + + Note that the only time we encounter a directive here is + when we are saving comments in a "#define". */ + clen = (pfile->state.in_directive && type == '/') ? len + 2 : len; + + buffer = _cpp_unaligned_alloc (pfile, clen); + + token->type = CPP_COMMENT; + token->val.str.len = clen; + token->val.str.text = buffer; + + buffer[0] = '/'; + copy_text_chars (buffer + 1, from, len); + + /* Finish conversion to a C comment, if necessary. */ + if (pfile->state.in_directive && type == '/') + { + buffer[1] = '*'; + buffer[clen - 2] = '*'; + buffer[clen - 1] = '/'; + } +} + +/* Allocate COUNT tokens for RUN. */ +void +_cpp_init_tokenrun (tokenrun *run, unsigned int count) +{ + run->base = XNEWVEC (cpp_token, count); + run->limit = run->base + count; + run->next = NULL; +} + +/* Returns the next tokenrun, or creates one if there is none. */ +static tokenrun * +next_tokenrun (tokenrun *run) +{ + if (run->next == NULL) + { + run->next = XNEW (tokenrun); + run->next->prev = run; + _cpp_init_tokenrun (run->next, 250); + } + + return run->next; +} + +/* Allocate a single token that is invalidated at the same time as the + rest of the tokens on the line. Has its line and col set to the + same as the last lexed token, so that diagnostics appear in the + right place. */ +cpp_token * +_cpp_temp_token (cpp_reader *pfile) +{ + cpp_token *old, *result; + + old = pfile->cur_token - 1; + if (pfile->cur_token == pfile->cur_run->limit) + { + pfile->cur_run = next_tokenrun (pfile->cur_run); + pfile->cur_token = pfile->cur_run->base; + } + + result = pfile->cur_token++; + result->src_loc = old->src_loc; + return result; +} + +/* Lex a token into RESULT (external interface). Takes care of issues + like directive handling, token lookahead, multiple include + optimization and skipping. */ +const cpp_token * +_cpp_lex_token (cpp_reader *pfile) +{ + cpp_token *result; + + for (;;) + { + if (pfile->cur_token == pfile->cur_run->limit) + { + pfile->cur_run = next_tokenrun (pfile->cur_run); + pfile->cur_token = pfile->cur_run->base; + } + /* We assume that the current token is somewhere in the current + run. */ + if (pfile->cur_token < pfile->cur_run->base + || pfile->cur_token >= pfile->cur_run->limit) + abort (); + + if (pfile->lookaheads) + { + pfile->lookaheads--; + result = pfile->cur_token++; + } + else + result = _cpp_lex_direct (pfile); + + if (result->flags & BOL) + { + /* Is this a directive. If _cpp_handle_directive returns + false, it is an assembler #. */ + if (result->type == CPP_HASH + /* 6.10.3 p 11: Directives in a list of macro arguments + gives undefined behavior. This implementation + handles the directive as normal. */ + && pfile->state.parsing_args != 1) + { + if (_cpp_handle_directive (pfile, result->flags & PREV_WHITE)) + { + if (pfile->directive_result.type == CPP_PADDING) + continue; + result = &pfile->directive_result; + } + } + else if (pfile->state.in_deferred_pragma) + result = &pfile->directive_result; + + if (pfile->cb.line_change && !pfile->state.skipping) + pfile->cb.line_change (pfile, result, pfile->state.parsing_args); + } + + /* We don't skip tokens in directives. */ + if (pfile->state.in_directive || pfile->state.in_deferred_pragma) + break; + + /* Outside a directive, invalidate controlling macros. At file + EOF, _cpp_lex_direct takes care of popping the buffer, so we never + get here and MI optimization works. */ + pfile->mi_valid = false; + + if (!pfile->state.skipping || result->type == CPP_EOF) + break; + } + + return result; +} + +/* Returns true if a fresh line has been loaded. */ +bool +_cpp_get_fresh_line (cpp_reader *pfile) +{ + int return_at_eof; + + /* We can't get a new line until we leave the current directive. */ + if (pfile->state.in_directive) + return false; + + for (;;) + { + cpp_buffer *buffer = pfile->buffer; + + if (!buffer->need_line) + return true; + + if (buffer->next_line < buffer->rlimit) + { + _cpp_clean_line (pfile); + return true; + } + + /* First, get out of parsing arguments state. */ + if (pfile->state.parsing_args) + return false; + + /* End of buffer. Non-empty files should end in a newline. */ + if (buffer->buf != buffer->rlimit + && buffer->next_line > buffer->rlimit + && !buffer->from_stage3) + { + /* Clip to buffer size. */ + buffer->next_line = buffer->rlimit; + } + + return_at_eof = buffer->return_at_eof; + _cpp_pop_buffer (pfile); + if (pfile->buffer == NULL || return_at_eof) + return false; + } +} + +#define IF_NEXT_IS(CHAR, THEN_TYPE, ELSE_TYPE) \ + do \ + { \ + result->type = ELSE_TYPE; \ + if (*buffer->cur == CHAR) \ + buffer->cur++, result->type = THEN_TYPE; \ + } \ + while (0) + +/* Lex a token into pfile->cur_token, which is also incremented, to + get diagnostics pointing to the correct location. + + Does not handle issues such as token lookahead, multiple-include + optimization, directives, skipping etc. This function is only + suitable for use by _cpp_lex_token, and in special cases like + lex_expansion_token which doesn't care for any of these issues. + + When meeting a newline, returns CPP_EOF if parsing a directive, + otherwise returns to the start of the token buffer if permissible. + Returns the location of the lexed token. */ +cpp_token * +_cpp_lex_direct (cpp_reader *pfile) +{ + cppchar_t c; + cpp_buffer *buffer; + const unsigned char *comment_start; + cpp_token *result = pfile->cur_token++; + + fresh_line: + result->flags = 0; + buffer = pfile->buffer; + if (buffer->need_line) + { + if (pfile->state.in_deferred_pragma) + { + result->type = CPP_PRAGMA_EOL; + pfile->state.in_deferred_pragma = false; + if (!pfile->state.pragma_allow_expansion) + pfile->state.prevent_expansion--; + return result; + } + if (!_cpp_get_fresh_line (pfile)) + { + result->type = CPP_EOF; + if (!pfile->state.in_directive) + { + /* Tell the compiler the line number of the EOF token. */ + result->src_loc = pfile->line_table->highest_line; + result->flags = BOL; + } + return result; + } + if (!pfile->keep_tokens) + { + pfile->cur_run = &pfile->base_run; + result = pfile->base_run.base; + pfile->cur_token = result + 1; + } + result->flags = BOL; + if (pfile->state.parsing_args == 2) + result->flags |= PREV_WHITE; + } + buffer = pfile->buffer; + update_tokens_line: + result->src_loc = pfile->line_table->highest_line; + + skipped_white: + if (buffer->cur >= buffer->notes[buffer->cur_note].pos + && !pfile->overlaid_buffer) + { + _cpp_process_line_notes (pfile, false); + result->src_loc = pfile->line_table->highest_line; + } + c = *buffer->cur++; + + LINEMAP_POSITION_FOR_COLUMN (result->src_loc, pfile->line_table, + CPP_BUF_COLUMN (buffer, buffer->cur)); + + switch (c) + { + case ' ': case '\t': case '\f': case '\v': case '\0': + result->flags |= PREV_WHITE; + skip_whitespace (pfile, c); + goto skipped_white; + + case '\n': + if (buffer->cur < buffer->rlimit) + CPP_INCREMENT_LINE (pfile, 0); + buffer->need_line = true; + goto fresh_line; + + case '0': case '1': case '2': case '3': case '4': + case '5': case '6': case '7': case '8': case '9': + { + struct normalize_state nst = INITIAL_NORMALIZE_STATE; + result->type = CPP_NUMBER; + if (CPP_OPTION (pfile, pedantic_parse_number)) + pedantic_lex_number (pfile, &result->val.str); + else + lex_number (pfile, &result->val.str, &nst); + warn_about_normalization (pfile, result, &nst); + break; + } + + case 'L': + /* 'L' may introduce wide characters or strings. */ + if (*buffer->cur == '\'' || *buffer->cur == '"') + { + lex_string (pfile, result, buffer->cur - 1); + break; + } + /* Fall through. */ + + case '_': + case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': + case 'g': case 'h': case 'i': case 'j': case 'k': case 'l': + case 'm': case 'n': case 'o': case 'p': case 'q': case 'r': + case 's': case 't': case 'u': case 'v': case 'w': case 'x': + case 'y': case 'z': + case 'A': case 'B': case 'C': case 'D': case 'E': case 'F': + case 'G': case 'H': case 'I': case 'J': case 'K': + case 'M': case 'N': case 'O': case 'P': case 'Q': case 'R': + case 'S': case 'T': case 'U': case 'V': case 'W': case 'X': + case 'Y': case 'Z': + result->type = CPP_NAME; + { + struct normalize_state nst = INITIAL_NORMALIZE_STATE; + result->val.node = lex_identifier (pfile, buffer->cur - 1, false, + &nst); + warn_about_normalization (pfile, result, &nst); + } + + /* SDCC _asm specific */ + /* handle _asm ... _endasm ; */ + if (CPP_OPTION (pfile, preproc_asm) == 0 && result->val.node == pfile->spec_nodes.n__asm) + { + comment_start = buffer->cur; + result->type = CPP_ASM; + skip_asm_block (pfile); + /* Save the _asm block as a token in its own right. */ + save_asm (pfile, result, comment_start); + } + /* Convert named operators to their proper types. */ + else if (result->val.node->flags & NODE_OPERATOR) + { + result->flags |= NAMED_OP; + result->type = (enum cpp_ttype) result->val.node->directive_index; + } + break; + + case '\'': + case '"': + lex_string (pfile, result, buffer->cur - 1); + break; + + case '/': + /* A potential block or line comment. */ + comment_start = buffer->cur; + c = *buffer->cur; + + if (c == '*') + { + if (_cpp_skip_block_comment (pfile)) + cpp_error (pfile, CPP_DL_ERROR, "unterminated comment"); + } + else if (c == '/' && (CPP_OPTION (pfile, cplusplus_comments) + || cpp_in_system_header (pfile))) + { + /* Warn about comments only if pedantically GNUC89, and not + in system headers. */ + if (CPP_OPTION (pfile, lang) == CLK_GNUC89 && CPP_PEDANTIC (pfile) + && ! buffer->warned_cplusplus_comments) + { + cpp_error (pfile, CPP_DL_PEDWARN, + "C++ style comments are not allowed in ISO C90"); + cpp_error (pfile, CPP_DL_PEDWARN, + "(this will be reported only once per input file)"); + buffer->warned_cplusplus_comments = 1; + } + + if (skip_line_comment (pfile) && CPP_OPTION (pfile, warn_comments)) + cpp_error (pfile, CPP_DL_WARNING, "multi-line comment"); + } + else if (c == '=') + { + buffer->cur++; + result->type = CPP_DIV_EQ; + break; + } + else + { + result->type = CPP_DIV; + break; + } + + if (!pfile->state.save_comments) + { + result->flags |= PREV_WHITE; + goto update_tokens_line; + } + + /* Save the comment as a token in its own right. */ + save_comment (pfile, result, comment_start, c); + break; + + case '<': + if (pfile->state.angled_headers) + { + lex_string (pfile, result, buffer->cur - 1); + break; + } + + result->type = CPP_LESS; + if (*buffer->cur == '=') + buffer->cur++, result->type = CPP_LESS_EQ; + else if (*buffer->cur == '<') + { + buffer->cur++; + IF_NEXT_IS ('=', CPP_LSHIFT_EQ, CPP_LSHIFT); + } + else if (CPP_OPTION (pfile, digraphs)) + { + if (*buffer->cur == ':') + { + buffer->cur++; + result->flags |= DIGRAPH; + result->type = CPP_OPEN_SQUARE; + } + else if (*buffer->cur == '%') + { + buffer->cur++; + result->flags |= DIGRAPH; + result->type = CPP_OPEN_BRACE; + } + } + break; + + case '>': + result->type = CPP_GREATER; + if (*buffer->cur == '=') + buffer->cur++, result->type = CPP_GREATER_EQ; + else if (*buffer->cur == '>') + { + buffer->cur++; + IF_NEXT_IS ('=', CPP_RSHIFT_EQ, CPP_RSHIFT); + } + break; + + case '%': + result->type = CPP_MOD; + if (*buffer->cur == '=') + buffer->cur++, result->type = CPP_MOD_EQ; + else if (CPP_OPTION (pfile, digraphs)) + { + if (*buffer->cur == ':') + { + buffer->cur++; + result->flags |= DIGRAPH; + result->type = CPP_HASH; + if (*buffer->cur == '%' && buffer->cur[1] == ':') + buffer->cur += 2, result->type = CPP_PASTE; + } + else if (*buffer->cur == '>') + { + buffer->cur++; + result->flags |= DIGRAPH; + result->type = CPP_CLOSE_BRACE; + } + } + break; + + case '.': + result->type = CPP_DOT; + if (ISDIGIT (*buffer->cur)) + { + struct normalize_state nst = INITIAL_NORMALIZE_STATE; + result->type = CPP_NUMBER; + if (CPP_OPTION (pfile, pedantic_parse_number)) + pedantic_lex_number (pfile, &result->val.str); + else + lex_number (pfile, &result->val.str, &nst); + warn_about_normalization (pfile, result, &nst); + } + else if (*buffer->cur == '.' && buffer->cur[1] == '.') + buffer->cur += 2, result->type = CPP_ELLIPSIS; + else if (*buffer->cur == '*' && CPP_OPTION (pfile, cplusplus)) + buffer->cur++, result->type = CPP_DOT_STAR; + break; + + case '+': + result->type = CPP_PLUS; + if (*buffer->cur == '+') + buffer->cur++, result->type = CPP_PLUS_PLUS; + else if (*buffer->cur == '=') + buffer->cur++, result->type = CPP_PLUS_EQ; + break; + + case '-': + result->type = CPP_MINUS; + if (*buffer->cur == '>') + { + buffer->cur++; + result->type = CPP_DEREF; + if (*buffer->cur == '*' && CPP_OPTION (pfile, cplusplus)) + buffer->cur++, result->type = CPP_DEREF_STAR; + } + else if (*buffer->cur == '-') + buffer->cur++, result->type = CPP_MINUS_MINUS; + else if (*buffer->cur == '=') + buffer->cur++, result->type = CPP_MINUS_EQ; + break; + + case '&': + result->type = CPP_AND; + if (*buffer->cur == '&') + buffer->cur++, result->type = CPP_AND_AND; + else if (*buffer->cur == '=') + buffer->cur++, result->type = CPP_AND_EQ; + break; + + case '|': + result->type = CPP_OR; + if (*buffer->cur == '|') + buffer->cur++, result->type = CPP_OR_OR; + else if (*buffer->cur == '=') + buffer->cur++, result->type = CPP_OR_EQ; + break; + + case ':': + result->type = CPP_COLON; + if (*buffer->cur == ':' && CPP_OPTION (pfile, cplusplus)) + buffer->cur++, result->type = CPP_SCOPE; + else if (*buffer->cur == '>' && CPP_OPTION (pfile, digraphs)) + { + buffer->cur++; + result->flags |= DIGRAPH; + result->type = CPP_CLOSE_SQUARE; + } + break; + + case '*': IF_NEXT_IS ('=', CPP_MULT_EQ, CPP_MULT); break; + case '=': IF_NEXT_IS ('=', CPP_EQ_EQ, CPP_EQ); break; + case '!': IF_NEXT_IS ('=', CPP_NOT_EQ, CPP_NOT); break; + case '^': IF_NEXT_IS ('=', CPP_XOR_EQ, CPP_XOR); break; + case '#': IF_NEXT_IS ('#', CPP_PASTE, CPP_HASH); break; + + case '?': result->type = CPP_QUERY; break; + case '~': result->type = CPP_COMPL; break; + case ',': result->type = CPP_COMMA; break; + case '(': result->type = CPP_OPEN_PAREN; break; + case ')': result->type = CPP_CLOSE_PAREN; break; + case '[': result->type = CPP_OPEN_SQUARE; break; + case ']': result->type = CPP_CLOSE_SQUARE; break; + case '{': result->type = CPP_OPEN_BRACE; break; + case '}': result->type = CPP_CLOSE_BRACE; break; + case ';': result->type = CPP_SEMICOLON; break; + + /* @ is a punctuator in Objective-C. */ + case '@': result->type = CPP_ATSIGN; break; + + case '$': + case '\\': + { + const uchar *base = --buffer->cur; + struct normalize_state nst = INITIAL_NORMALIZE_STATE; + + if (forms_identifier_p (pfile, true, &nst)) + { + result->type = CPP_NAME; + result->val.node = lex_identifier (pfile, base, true, &nst); + warn_about_normalization (pfile, result, &nst); + break; + } + buffer->cur++; + } + + default: + create_literal (pfile, result, buffer->cur - 1, 1, CPP_OTHER); + break; + } + + return result; +} + +/* An upper bound on the number of bytes needed to spell TOKEN. + Does not include preceding whitespace. */ +unsigned int +cpp_token_len (const cpp_token *token) +{ + unsigned int len; + + switch (TOKEN_SPELL (token)) + { + default: len = 4; break; + case SPELL_LITERAL: len = token->val.str.len; break; + case SPELL_IDENT: len = NODE_LEN (token->val.node) * 10; break; + } + + return len; +} + +/* Parse UTF-8 out of NAMEP and place a \U escape in BUFFER. + Return the number of bytes read out of NAME. (There are always + 10 bytes written to BUFFER.) */ + +static size_t +utf8_to_ucn (unsigned char *buffer, const unsigned char *name) +{ + int j; + int ucn_len = 0; + int ucn_len_c; + unsigned t; + unsigned long utf32; + + /* Compute the length of the UTF-8 sequence. */ + for (t = *name; t & 0x80; t <<= 1) + ucn_len++; + + utf32 = *name & (0x7F >> ucn_len); + for (ucn_len_c = 1; ucn_len_c < ucn_len; ucn_len_c++) + { + utf32 = (utf32 << 6) | (*++name & 0x3F); + + /* Ill-formed UTF-8. */ + if ((*name & ~0x3F) != 0x80) + abort (); + } + + *buffer++ = '\\'; + *buffer++ = 'U'; + for (j = 7; j >= 0; j--) + *buffer++ = "0123456789abcdef"[(utf32 >> (4 * j)) & 0xF]; + return ucn_len; +} + + +/* Write the spelling of a token TOKEN to BUFFER. The buffer must + already contain the enough space to hold the token's spelling. + Returns a pointer to the character after the last character written. + FORSTRING is true if this is to be the spelling after translation + phase 1 (this is different for UCNs). + FIXME: Would be nice if we didn't need the PFILE argument. */ +unsigned char * +cpp_spell_token (cpp_reader *pfile, const cpp_token *token, + unsigned char *buffer, bool forstring) +{ + switch (TOKEN_SPELL (token)) + { + case SPELL_OPERATOR: + { + const unsigned char *spelling; + unsigned char c; + + if (token->flags & DIGRAPH) + spelling + = digraph_spellings[(int) token->type - (int) CPP_FIRST_DIGRAPH]; + else if (token->flags & NAMED_OP) + goto spell_ident; + else + spelling = TOKEN_NAME (token); + + while ((c = *spelling++) != '\0') + *buffer++ = c; + } + break; + + spell_ident: + case SPELL_IDENT: + if (forstring) + { + memcpy (buffer, NODE_NAME (token->val.node), + NODE_LEN (token->val.node)); + buffer += NODE_LEN (token->val.node); + } + else + { + size_t i; + const unsigned char * name = NODE_NAME (token->val.node); + + for (i = 0; i < NODE_LEN (token->val.node); i++) + if (name[i] & ~0x7F) + { + i += utf8_to_ucn (buffer, name + i) - 1; + buffer += 10; + } + else + *buffer++ = NODE_NAME (token->val.node)[i]; + } + break; + + case SPELL_LITERAL: + memcpy (buffer, token->val.str.text, token->val.str.len); + buffer += token->val.str.len; + break; + + case SPELL_NONE: + cpp_error (pfile, CPP_DL_ICE, + "unspellable token %s", TOKEN_NAME (token)); + break; + } + + return buffer; +} + +/* Returns TOKEN spelt as a null-terminated string. The string is + freed when the reader is destroyed. Useful for diagnostics. */ +unsigned char * +cpp_token_as_text (cpp_reader *pfile, const cpp_token *token) +{ + unsigned int len = cpp_token_len (token) + 1; + unsigned char *start = _cpp_unaligned_alloc (pfile, len), *end; + + end = cpp_spell_token (pfile, token, start, false); + end[0] = '\0'; + + return start; +} + +/* Used by C front ends, which really should move to using + cpp_token_as_text. */ +const char * +cpp_type2name (enum cpp_ttype type) +{ + return (const char *) token_spellings[type].name; +} + +/* Writes the spelling of token to FP, without any preceding space. + Separated from cpp_spell_token for efficiency - to avoid stdio + double-buffering. */ +void +cpp_output_token (const cpp_token *token, FILE *fp) +{ + switch (TOKEN_SPELL (token)) + { + case SPELL_OPERATOR: + { + const unsigned char *spelling; + int c; + + if (token->flags & DIGRAPH) + spelling + = digraph_spellings[(int) token->type - (int) CPP_FIRST_DIGRAPH]; + else if (token->flags & NAMED_OP) + goto spell_ident; + else + spelling = TOKEN_NAME (token); + + c = *spelling; + do + putc (c, fp); + while ((c = *++spelling) != '\0'); + } + break; + + spell_ident: + case SPELL_IDENT: + { + size_t i; + const unsigned char * name = NODE_NAME (token->val.node); + + for (i = 0; i < NODE_LEN (token->val.node); i++) + if (name[i] & ~0x7F) + { + unsigned char buffer[10]; + i += utf8_to_ucn (buffer, name + i) - 1; + fwrite (buffer, 1, 10, fp); + } + else + fputc (NODE_NAME (token->val.node)[i], fp); + } + break; + + case SPELL_LITERAL: + fwrite (token->val.str.text, 1, token->val.str.len, fp); + break; + + case SPELL_NONE: + /* An error, most probably. */ + break; + } +} + +/* Compare two tokens. */ +int +_cpp_equiv_tokens (const cpp_token *a, const cpp_token *b) +{ + if (a->type == b->type && a->flags == b->flags) + switch (TOKEN_SPELL (a)) + { + default: /* Keep compiler happy. */ + case SPELL_OPERATOR: + return 1; + case SPELL_NONE: + return (a->type != CPP_MACRO_ARG || a->val.arg_no == b->val.arg_no); + case SPELL_IDENT: + return a->val.node == b->val.node; + case SPELL_LITERAL: + return (a->val.str.len == b->val.str.len + && !memcmp (a->val.str.text, b->val.str.text, + a->val.str.len)); + } + + return 0; +} + +/* Returns nonzero if a space should be inserted to avoid an + accidental token paste for output. For simplicity, it is + conservative, and occasionally advises a space where one is not + needed, e.g. "." and ".2". */ +int +cpp_avoid_paste (cpp_reader *pfile, const cpp_token *token1, + const cpp_token *token2) +{ + enum cpp_ttype a = token1->type, b = token2->type; + cppchar_t c; + + if (token1->flags & NAMED_OP) + a = CPP_NAME; + if (token2->flags & NAMED_OP) + b = CPP_NAME; + + c = EOF; + if (token2->flags & DIGRAPH) + c = digraph_spellings[(int) b - (int) CPP_FIRST_DIGRAPH][0]; + else if (token_spellings[b].category == SPELL_OPERATOR) + c = token_spellings[b].name[0]; + + /* Quickly get everything that can paste with an '='. */ + if ((int) a <= (int) CPP_LAST_EQ && c == '=') + return 1; + + switch (a) + { + case CPP_GREATER: return c == '>'; + case CPP_LESS: return c == '<' || c == '%' || c == ':'; + case CPP_PLUS: return c == '+'; + case CPP_MINUS: return c == '-' || c == '>'; + case CPP_DIV: return c == '/' || c == '*'; /* Comments. */ + case CPP_MOD: return c == ':' || c == '>'; + case CPP_AND: return c == '&'; + case CPP_OR: return c == '|'; + case CPP_COLON: return c == ':' || c == '>'; + case CPP_DEREF: return c == '*'; + case CPP_DOT: return c == '.' || c == '%' || b == CPP_NUMBER; + case CPP_HASH: return c == '#' || c == '%'; /* Digraph form. */ + case CPP_NAME: return ((b == CPP_NUMBER + && name_p (pfile, &token2->val.str)) + || b == CPP_NAME + || b == CPP_CHAR || b == CPP_STRING); /* L */ + case CPP_NUMBER: return (b == CPP_NUMBER || b == CPP_NAME + || c == '.' || c == '+' || c == '-'); + /* UCNs */ + case CPP_OTHER: return ((token1->val.str.text[0] == '\\' + && b == CPP_NAME) + || (CPP_OPTION (pfile, objc) + && token1->val.str.text[0] == '@' + && (b == CPP_NAME || b == CPP_STRING))); + default: break; + } + + return 0; +} + +/* Output all the remaining tokens on the current line, and a newline + character, to FP. Leading whitespace is removed. If there are + macros, special token padding is not performed. */ +void +cpp_output_line (cpp_reader *pfile, FILE *fp) +{ + const cpp_token *token; + + token = cpp_get_token (pfile); + while (token->type != CPP_EOF) + { + cpp_output_token (token, fp); + token = cpp_get_token (pfile); + if (token->flags & PREV_WHITE) + putc (' ', fp); + } + + putc ('\n', fp); +} + +/* Memory buffers. Changing these three constants can have a dramatic + effect on performance. The values here are reasonable defaults, + but might be tuned. If you adjust them, be sure to test across a + range of uses of cpplib, including heavy nested function-like macro + expansion. Also check the change in peak memory usage (NJAMD is a + good tool for this). */ +#define MIN_BUFF_SIZE 8000 +#define BUFF_SIZE_UPPER_BOUND(MIN_SIZE) (MIN_BUFF_SIZE + (MIN_SIZE) * 3 / 2) +#define EXTENDED_BUFF_SIZE(BUFF, MIN_EXTRA) \ + (MIN_EXTRA + ((BUFF)->limit - (BUFF)->cur) * 2) + +#if MIN_BUFF_SIZE > BUFF_SIZE_UPPER_BOUND (0) + #error BUFF_SIZE_UPPER_BOUND must be at least as large as MIN_BUFF_SIZE! +#endif + +/* Create a new allocation buffer. Place the control block at the end + of the buffer, so that buffer overflows will cause immediate chaos. */ +static _cpp_buff * +new_buff (size_t len) +{ + _cpp_buff *result; + unsigned char *base; + + if (len < MIN_BUFF_SIZE) + len = MIN_BUFF_SIZE; + len = CPP_ALIGN (len); + + base = XNEWVEC (unsigned char, len + sizeof (_cpp_buff)); + result = (_cpp_buff *) (base + len); + result->base = base; + result->cur = base; + result->limit = base + len; + result->next = NULL; + return result; +} + +/* Place a chain of unwanted allocation buffers on the free list. */ +void +_cpp_release_buff (cpp_reader *pfile, _cpp_buff *buff) +{ + _cpp_buff *end = buff; + + while (end->next) + end = end->next; + end->next = pfile->free_buffs; + pfile->free_buffs = buff; +} + +/* Return a free buffer of size at least MIN_SIZE. */ +_cpp_buff * +_cpp_get_buff (cpp_reader *pfile, size_t min_size) +{ + _cpp_buff *result, **p; + + for (p = &pfile->free_buffs;; p = &(*p)->next) + { + size_t size; + + if (*p == NULL) + return new_buff (min_size); + result = *p; + size = result->limit - result->base; + /* Return a buffer that's big enough, but don't waste one that's + way too big. */ + if (size >= min_size && size <= BUFF_SIZE_UPPER_BOUND (min_size)) + break; + } + + *p = result->next; + result->next = NULL; + result->cur = result->base; + return result; +} + +/* Creates a new buffer with enough space to hold the uncommitted + remaining bytes of BUFF, and at least MIN_EXTRA more bytes. Copies + the excess bytes to the new buffer. Chains the new buffer after + BUFF, and returns the new buffer. */ +_cpp_buff * +_cpp_append_extend_buff (cpp_reader *pfile, _cpp_buff *buff, size_t min_extra) +{ + size_t size = EXTENDED_BUFF_SIZE (buff, min_extra); + _cpp_buff *new_buff = _cpp_get_buff (pfile, size); + + buff->next = new_buff; + memcpy (new_buff->base, buff->cur, BUFF_ROOM (buff)); + return new_buff; +} + +/* Creates a new buffer with enough space to hold the uncommitted + remaining bytes of the buffer pointed to by BUFF, and at least + MIN_EXTRA more bytes. Copies the excess bytes to the new buffer. + Chains the new buffer before the buffer pointed to by BUFF, and + updates the pointer to point to the new buffer. */ +void +_cpp_extend_buff (cpp_reader *pfile, _cpp_buff **pbuff, size_t min_extra) +{ + _cpp_buff *new_buff, *old_buff = *pbuff; + size_t size = EXTENDED_BUFF_SIZE (old_buff, min_extra); + + new_buff = _cpp_get_buff (pfile, size); + memcpy (new_buff->base, old_buff->cur, BUFF_ROOM (old_buff)); + new_buff->next = old_buff; + *pbuff = new_buff; +} + +/* Free a chain of buffers starting at BUFF. */ +void +_cpp_free_buff (_cpp_buff *buff) +{ + _cpp_buff *next; + + for (; buff; buff = next) + { + next = buff->next; + free (buff->base); + } +} + +/* Allocate permanent, unaligned storage of length LEN. */ +unsigned char * +_cpp_unaligned_alloc (cpp_reader *pfile, size_t len) +{ + _cpp_buff *buff = pfile->u_buff; + unsigned char *result = buff->cur; + + if (len > (size_t) (buff->limit - result)) + { + buff = _cpp_get_buff (pfile, len); + buff->next = pfile->u_buff; + pfile->u_buff = buff; + result = buff->cur; + } + + buff->cur = result + len; + return result; +} + +/* Allocate permanent, unaligned storage of length LEN from a_buff. + That buffer is used for growing allocations when saving macro + replacement lists in a #define, and when parsing an answer to an + assertion in #assert, #unassert or #if (and therefore possibly + whilst expanding macros). It therefore must not be used by any + code that they might call: specifically the lexer and the guts of + the macro expander. + + All existing other uses clearly fit this restriction: storing + registered pragmas during initialization. */ +unsigned char * +_cpp_aligned_alloc (cpp_reader *pfile, size_t len) +{ + _cpp_buff *buff = pfile->a_buff; + unsigned char *result = buff->cur; + + if (len > (size_t) (buff->limit - result)) + { + buff = _cpp_get_buff (pfile, len); + buff->next = pfile->a_buff; + pfile->a_buff = buff; + result = buff->cur; + } + + buff->cur = result + len; + return result; +} + +/* Say which field of TOK is in use. */ + +enum cpp_token_fld_kind +cpp_token_val_index (cpp_token *tok) +{ + switch (TOKEN_SPELL (tok)) + { + case SPELL_IDENT: + return CPP_TOKEN_FLD_NODE; + case SPELL_LITERAL: + return CPP_TOKEN_FLD_STR; + case SPELL_NONE: + if (tok->type == CPP_MACRO_ARG) + return CPP_TOKEN_FLD_ARG_NO; + else if (tok->type == CPP_PADDING) + return CPP_TOKEN_FLD_SOURCE; + else if (tok->type == CPP_PRAGMA) + return CPP_TOKEN_FLD_PRAGMA; + /* else fall through */ + default: + return CPP_TOKEN_FLD_NONE; + } +} diff --git a/support/cpp/libcpp/line-map.c b/support/cpp/libcpp/line-map.c new file mode 100644 index 0000000..f24cca6 --- /dev/null +++ b/support/cpp/libcpp/line-map.c @@ -0,0 +1,355 @@ +/* Map logical line numbers to (source file, line number) pairs. + Copyright (C) 2001, 2003, 2004, 2007 + Free Software Foundation, Inc. + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! */ + +#include "config.h" +#include "system.h" +#include "line-map.h" + +static void trace_include (const struct line_maps *, const struct line_map *); + +/* Initialize a line map set. */ + +void +linemap_init (struct line_maps *set) +{ + set->maps = NULL; + set->allocated = 0; + set->used = 0; + set->last_listed = -1; + set->trace_includes = false; + set->depth = 0; + set->cache = 0; + set->highest_location = 0; + set->highest_line = 0; + set->max_column_hint = 0; +} + +/* Check for and warn about line_maps entered but not exited. */ + +void +linemap_check_files_exited (struct line_maps *set) +{ + struct line_map *map; + /* Depending upon whether we are handling preprocessed input or + not, this can be a user error or an ICE. */ + for (map = &set->maps[set->used - 1]; ! MAIN_FILE_P (map); + map = INCLUDED_FROM (set, map)) + fprintf (stderr, "line-map.c: file \"%s\" entered but not left\n", + map->to_file); +} + +/* Free a line map set. */ + +void +linemap_free (struct line_maps *set) +{ + if (set->maps) + { + linemap_check_files_exited (set); + + free (set->maps); + } +} + +/* Add a mapping of logical source line to physical source file and + line number. + + The text pointed to by TO_FILE must have a lifetime + at least as long as the final call to lookup_line (). An empty + TO_FILE means standard input. If reason is LC_LEAVE, and + TO_FILE is NULL, then TO_FILE, TO_LINE and SYSP are given their + natural values considering the file we are returning to. + + FROM_LINE should be monotonic increasing across calls to this + function. A call to this function can relocate the previous set of + A call to this function can relocate the previous set of + maps, so any stored line_map pointers should not be used. */ + +const struct line_map * +linemap_add (struct line_maps *set, enum lc_reason reason, + unsigned int sysp, const char *to_file, unsigned int to_line) +{ + struct line_map *map; + source_location start_location = set->highest_location + 1; + + if (set->used && start_location < set->maps[set->used - 1].start_location) + abort (); + + if (set->used == set->allocated) + { + line_map_realloc reallocator + = set->reallocator ? set->reallocator : xrealloc; + set->allocated = 2 * set->allocated + 256; + set->maps + = (struct line_map *) (*reallocator) (set->maps, + set->allocated + * sizeof (struct line_map)); + memset (&set->maps[set->used], 0, ((set->allocated - set->used) + * sizeof (struct line_map))); + } + + map = &set->maps[set->used]; + + if (to_file && *to_file == '\0') + to_file = ""; + + /* If we don't keep our line maps consistent, we can easily + segfault. Don't rely on the client to do it for us. */ + if (set->depth == 0) + reason = LC_ENTER; + else if (reason == LC_LEAVE) + { + struct line_map *from; + bool error; + + if (MAIN_FILE_P (map - 1)) + { + if (to_file == NULL) + { + set->depth--; + return NULL; + } + error = true; + reason = LC_RENAME; + from = map - 1; + } + else + { + from = INCLUDED_FROM (set, map - 1); + error = to_file && strcmp (from->to_file, to_file); + } + + /* Depending upon whether we are handling preprocessed input or + not, this can be a user error or an ICE. */ + if (error) + fprintf (stderr, "line-map.c: file \"%s\" left but not entered\n", + to_file); + + /* A TO_FILE of NULL is special - we use the natural values. */ + if (error || to_file == NULL) + { + to_file = from->to_file; + to_line = SOURCE_LINE (from, from[1].start_location); + sysp = from->sysp; + } + } + + map->reason = reason; + map->sysp = sysp; + map->start_location = start_location; + map->to_file = to_file; + map->to_line = to_line; + set->cache = set->used++; + map->column_bits = 0; + set->highest_location = start_location; + set->highest_line = start_location; + set->max_column_hint = 0; + + if (reason == LC_ENTER) + { + map->included_from = set->depth == 0 ? -1 : (int) (set->used - 2); + set->depth++; + if (set->trace_includes) + trace_include (set, map); + } + else if (reason == LC_RENAME) + map->included_from = map[-1].included_from; + else if (reason == LC_LEAVE) + { + set->depth--; + map->included_from = INCLUDED_FROM (set, map - 1)->included_from; + } + + return map; +} + +source_location +linemap_line_start (struct line_maps *set, unsigned int to_line, + unsigned int max_column_hint) +{ + struct line_map *map = &set->maps[set->used - 1]; + source_location highest = set->highest_location; + source_location r; + unsigned int last_line = SOURCE_LINE (map, set->highest_line); + int line_delta = to_line - last_line; + bool add_map = false; + if (line_delta < 0 + || (line_delta > 10 && line_delta * map->column_bits > 1000) + || (max_column_hint >= (1U << map->column_bits)) + || (max_column_hint <= 80 && map->column_bits >= 10)) + { + add_map = true; + } + else + max_column_hint = set->max_column_hint; + if (add_map) + { + int column_bits; + if (max_column_hint > 100000 || highest > 0xC0000000) + { + /* If the column number is ridiculous or we've allocated a huge + number of source_locations, give up on column numbers. */ + max_column_hint = 0; + if (highest >0xF0000000) + return 0; + column_bits = 0; + } + else + { + column_bits = 7; + while (max_column_hint >= (1U << column_bits)) + column_bits++; + max_column_hint = 1U << column_bits; + } + /* Allocate the new line_map. However, if the current map only has a + single line we can sometimes just increase its column_bits instead. */ + if (line_delta < 0 + || last_line != map->to_line + || SOURCE_COLUMN (map, highest) >= (1U << column_bits)) + map = (struct line_map*) linemap_add (set, LC_RENAME, map->sysp, + map->to_file, to_line); + map->column_bits = column_bits; + r = map->start_location + ((to_line - map->to_line) << column_bits); + } + else + r = highest - SOURCE_COLUMN (map, highest) + + (line_delta << map->column_bits); + set->highest_line = r; + if (r > set->highest_location) + set->highest_location = r; + set->max_column_hint = max_column_hint; + return r; +} + +source_location +linemap_position_for_column (struct line_maps *set, unsigned int to_column) +{ + source_location r = set->highest_line; + if (to_column >= set->max_column_hint) + { + if (r >= 0xC000000 || to_column > 100000) + { + /* Running low on source_locations - disable column numbers. */ + return r; + } + else + { + struct line_map *map = &set->maps[set->used - 1]; + r = linemap_line_start (set, SOURCE_LINE (map, r), to_column + 50); + } + } + r = r + to_column; + if (r >= set->highest_location) + set->highest_location = r; + return r; +} + +/* Given a logical line, returns the map from which the corresponding + (source file, line) pair can be deduced. Since the set is built + chronologically, the logical lines are monotonic increasing, and so + the list is sorted and we can use a binary search. */ + +const struct line_map * +linemap_lookup (struct line_maps *set, source_location line) +{ + unsigned int md, mn, mx; + const struct line_map *cached; + + mn = set->cache; + mx = set->used; + + cached = &set->maps[mn]; + /* We should get a segfault if no line_maps have been added yet. */ + if (line >= cached->start_location) + { + if (mn + 1 == mx || line < cached[1].start_location) + return cached; + } + else + { + mx = mn; + mn = 0; + } + + while (mx - mn > 1) + { + md = (mn + mx) / 2; + if (set->maps[md].start_location > line) + mx = md; + else + mn = md; + } + + set->cache = mn; + return &set->maps[mn]; +} + +/* Print the file names and line numbers of the #include commands + which led to the map MAP, if any, to stderr. Nothing is output if + the most recently listed stack is the same as the current one. */ + +void +linemap_print_containing_files (struct line_maps *set, + const struct line_map *map) +{ + if (MAIN_FILE_P (map) || set->last_listed == map->included_from) + return; + + set->last_listed = map->included_from; + map = INCLUDED_FROM (set, map); + + fprintf (stderr, _("In file included from %s:%u"), + map->to_file, LAST_SOURCE_LINE (map)); + + while (! MAIN_FILE_P (map)) + { + map = INCLUDED_FROM (set, map); + /* Translators note: this message is used in conjunction + with "In file included from %s:%ld" and some other + tricks. We want something like this: + + | In file included from sys/select.h:123, + | from sys/types.h:234, + | from userfile.c:31: + | bits/select.h:45: + + with all the "from"s lined up. + The trailing comma is at the beginning of this message, + and the trailing colon is not translated. */ + fprintf (stderr, _(",\n from %s:%u"), + map->to_file, LAST_SOURCE_LINE (map)); + } + + fputs (":\n", stderr); +} + +/* Print an include trace, for e.g. the -H option of the preprocessor. */ + +static void +trace_include (const struct line_maps *set, const struct line_map *map) +{ + unsigned int i = set->depth; + + while (--i) + putc ('.', stderr); + fprintf (stderr, " %s\n", map->to_file); +} diff --git a/support/cpp/libcpp/macro.c b/support/cpp/libcpp/macro.c new file mode 100644 index 0000000..764d5e3 --- /dev/null +++ b/support/cpp/libcpp/macro.c @@ -0,0 +1,1966 @@ +/* Part of CPP library. (Macro and #define handling.) + Copyright (C) 1986, 1987, 1989, 1992, 1993, 1994, 1995, 1996, 1998, + 1999, 2000, 2001, 2002, 2003, 2004, 2005, + 2006, 2007, 2008 Free Software Foundation, Inc. + Written by Per Bothner, 1994. + Based on CCCP program by Paul Rubin, June 1986 + Adapted to ANSI C, Richard Stallman, Jan 1987 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! */ + +#include "config.h" +#include "system.h" +#include "cpplib.h" +#include "internal.h" + +typedef struct macro_arg macro_arg; +struct macro_arg +{ + const cpp_token **first; /* First token in unexpanded argument. */ + const cpp_token **expanded; /* Macro-expanded argument. */ + const cpp_token *stringified; /* Stringified argument. */ + unsigned int count; /* # of tokens in argument. */ + unsigned int expanded_count; /* # of tokens in expanded argument. */ +}; + +/* Macro expansion. */ + +static int enter_macro_context (cpp_reader *, cpp_hashnode *, + const cpp_token *); +static int builtin_macro (cpp_reader *, cpp_hashnode *); +static void push_ptoken_context (cpp_reader *, cpp_hashnode *, _cpp_buff *, + const cpp_token **, unsigned int); +static _cpp_buff *collect_args (cpp_reader *, const cpp_hashnode *, + _cpp_buff **); +static cpp_context *next_context (cpp_reader *); +static const cpp_token *padding_token (cpp_reader *, const cpp_token *); +static void expand_arg (cpp_reader *, macro_arg *); +static const cpp_token *new_string_token (cpp_reader *, uchar *, unsigned int); +static const cpp_token *stringify_arg (cpp_reader *, macro_arg *); +static void paste_all_tokens (cpp_reader *, const cpp_token *); +static bool paste_tokens (cpp_reader *, const cpp_token **, const cpp_token *); +static void replace_args (cpp_reader *, cpp_hashnode *, cpp_macro *, + macro_arg *); +static _cpp_buff *funlike_invocation_p (cpp_reader *, cpp_hashnode *, + _cpp_buff **); +static bool create_iso_definition (cpp_reader *, cpp_macro *); + +/* #define directive parsing and handling. */ + +static cpp_token *alloc_expansion_token (cpp_reader *, cpp_macro *); +static cpp_token *lex_expansion_token (cpp_reader *, cpp_macro *); +static bool warn_of_redefinition (cpp_reader *, const cpp_hashnode *, + const cpp_macro *); +static bool parse_params (cpp_reader *, cpp_macro *); +static void check_trad_stringification (cpp_reader *, const cpp_macro *, + const cpp_string *); + +/* Emits a warning if NODE is a macro defined in the main file that + has not been used. */ +int +_cpp_warn_if_unused_macro (cpp_reader *pfile, cpp_hashnode *node, + void *v ATTRIBUTE_UNUSED) +{ + if (node->type == NT_MACRO && !(node->flags & NODE_BUILTIN)) + { + cpp_macro *macro = node->value.macro; + + if (!macro->used + && MAIN_FILE_P (linemap_lookup (pfile->line_table, macro->line))) + cpp_error_with_line (pfile, CPP_DL_WARNING, macro->line, 0, + "macro \"%s\" is not used", NODE_NAME (node)); + } + + return 1; +} + +/* Allocates and returns a CPP_STRING token, containing TEXT of length + LEN, after null-terminating it. TEXT must be in permanent storage. */ +static const cpp_token * +new_string_token (cpp_reader *pfile, unsigned char *text, unsigned int len) +{ + cpp_token *token = _cpp_temp_token (pfile); + + text[len] = '\0'; + token->type = CPP_STRING; + token->val.str.len = len; + token->val.str.text = text; + token->flags = 0; + return token; +} + +static const char * const monthnames[] = +{ + "Jan", "Feb", "Mar", "Apr", "May", "Jun", + "Jul", "Aug", "Sep", "Oct", "Nov", "Dec" +}; + +/* Helper function for builtin_macro. Returns the text generated by + a builtin macro. */ +const uchar * +_cpp_builtin_macro_text (cpp_reader *pfile, cpp_hashnode *node) +{ + const struct line_map *map; + const uchar *result = NULL; + unsigned int number = 1; + + switch (node->value.builtin) + { + default: + cpp_error (pfile, CPP_DL_ICE, "invalid built-in macro \"%s\"", + NODE_NAME (node)); + break; + + case BT_TIMESTAMP: + { + cpp_buffer *pbuffer = cpp_get_buffer (pfile); + if (pbuffer->timestamp == NULL) + { + /* Initialize timestamp value of the assotiated file. */ + struct _cpp_file *file = cpp_get_file (pbuffer); + if (file) + { + /* Generate __TIMESTAMP__ string, that represents + the date and time of the last modification + of the current source file. The string constant + looks like "Sun Sep 16 01:03:52 1973". */ + struct tm *tb = NULL; + struct stat *st = _cpp_get_file_stat (file); + if (st) + tb = localtime (&st->st_mtime); + if (tb) + { + char *str = asctime (tb); + size_t len = strlen (str); + unsigned char *buf = _cpp_unaligned_alloc (pfile, len + 2); + buf[0] = '"'; + strcpy ((char *) buf + 1, str); + buf[len] = '"'; + pbuffer->timestamp = buf; + } + else + { + cpp_errno (pfile, CPP_DL_WARNING, + "could not determine file timestamp"); + pbuffer->timestamp = U"\"??? ??? ?? ??:??:?? ????\""; + } + } + } + result = pbuffer->timestamp; + } + break; + case BT_FILE: + case BT_BASE_FILE: + { + unsigned int len; + const char *name; + uchar *buf; + map = linemap_lookup (pfile->line_table, pfile->line_table->highest_line); + + if (node->value.builtin == BT_BASE_FILE) + while (! MAIN_FILE_P (map)) + map = INCLUDED_FROM (pfile->line_table, map); + + name = map->to_file; + len = strlen (name); + buf = _cpp_unaligned_alloc (pfile, len * 2 + 3); + result = buf; + *buf = '"'; + buf = cpp_quote_string (buf + 1, (const unsigned char *) name, len); + *buf++ = '"'; + *buf = '\0'; + } + break; + + case BT_INCLUDE_LEVEL: + /* The line map depth counts the primary source as level 1, but + historically __INCLUDE_DEPTH__ has called the primary source + level 0. */ + number = pfile->line_table->depth - 1; + break; + + case BT_SPECLINE: + map = &pfile->line_table->maps[pfile->line_table->used-1]; + /* If __LINE__ is embedded in a macro, it must expand to the + line of the macro's invocation, not its definition. + Otherwise things like assert() will not work properly. */ + if (CPP_OPTION (pfile, traditional)) + number = pfile->line_table->highest_line; + else + number = pfile->cur_token[-1].src_loc; + number = SOURCE_LINE (map, number); + break; + + /* __STDC__ has the value 1 under normal circumstances. + However, if (a) we are in a system header, (b) the option + stdc_0_in_system_headers is true (set by target config), and + (c) we are not in strictly conforming mode, then it has the + value 0. (b) and (c) are already checked in cpp_init_builtins. */ + case BT_STDC: + if (cpp_in_system_header (pfile)) + number = 0; + else + number = 1; + break; + + case BT_DATE: + case BT_TIME: + if (pfile->date == NULL) + { + /* Allocate __DATE__ and __TIME__ strings from permanent + storage. We only do this once, and don't generate them + at init time, because time() and localtime() are very + slow on some systems. */ + time_t tt; + struct tm *tb = NULL; + + /* (time_t) -1 is a legitimate value for "number of seconds + since the Epoch", so we have to do a little dance to + distinguish that from a genuine error. */ + errno = 0; + tt = time(NULL); + if (tt != (time_t)-1 || errno == 0) + tb = localtime (&tt); + + if (tb) + { + pfile->date = _cpp_unaligned_alloc (pfile, + sizeof ("\"Oct 11 1347\"")); + sprintf ((char *) pfile->date, "\"%s %2d %4d\"", + monthnames[tb->tm_mon], tb->tm_mday, + tb->tm_year + 1900); + + pfile->time = _cpp_unaligned_alloc (pfile, + sizeof ("\"12:34:56\"")); + sprintf ((char *) pfile->time, "\"%02d:%02d:%02d\"", + tb->tm_hour, tb->tm_min, tb->tm_sec); + } + else + { + cpp_errno (pfile, CPP_DL_WARNING, + "could not determine date and time"); + + pfile->date = U"\"??? ?? ????\""; + pfile->time = U"\"??:??:??\""; + } + } + + if (node->value.builtin == BT_DATE) + result = pfile->date; + else + result = pfile->time; + break; + + case BT_COUNTER: + if (CPP_OPTION (pfile, directives_only) && pfile->state.in_directive) + cpp_error (pfile, CPP_DL_ERROR, + "__COUNTER__ expanded inside directive with -fdirectives-only"); + number = pfile->counter++; + break; + } + + if (result == NULL) + { + /* 21 bytes holds all NUL-terminated unsigned 64-bit numbers. */ + result = _cpp_unaligned_alloc (pfile, 21); + sprintf ((char *) result, "%u", number); + } + + return result; +} + +/* Convert builtin macros like __FILE__ to a token and push it on the + context stack. Also handles _Pragma, for which a new token may not + be created. Returns 1 if it generates a new token context, 0 to + return the token to the caller. */ +static int +builtin_macro (cpp_reader *pfile, cpp_hashnode *node) +{ + const uchar *buf; + size_t len; + char *nbuf; + + if (node->value.builtin == BT_PRAGMA) + { + /* Don't interpret _Pragma within directives. The standard is + not clear on this, but to me this makes most sense. */ + if (pfile->state.in_directive) + return 0; + + return _cpp_do__Pragma (pfile); + } + + buf = _cpp_builtin_macro_text (pfile, node); + len = ustrlen (buf); + nbuf = (char *) alloca (len + 1); + memcpy (nbuf, buf, len); + nbuf[len]='\n'; + + cpp_push_buffer (pfile, (uchar *) nbuf, len, /* from_stage3 */ true); + _cpp_clean_line (pfile); + + /* Set pfile->cur_token as required by _cpp_lex_direct. */ + pfile->cur_token = _cpp_temp_token (pfile); + _cpp_push_token_context (pfile, NULL, _cpp_lex_direct (pfile), 1); + if (pfile->buffer->cur != pfile->buffer->rlimit) + cpp_error (pfile, CPP_DL_ICE, "invalid built-in macro \"%s\"", + NODE_NAME (node)); + _cpp_pop_buffer (pfile); + + return 1; +} + +/* Copies SRC, of length LEN, to DEST, adding backslashes before all + backslashes and double quotes. DEST must be of sufficient size. + Returns a pointer to the end of the string. */ +uchar * +cpp_quote_string (uchar *dest, const uchar *src, unsigned int len) +{ + while (len--) + { + uchar c = *src++; + + if (c == '\\' || c == '"') + { + *dest++ = '\\'; + *dest++ = c; + } + else + *dest++ = c; + } + + return dest; +} + +/* Convert a token sequence ARG to a single string token according to + the rules of the ISO C #-operator. */ +static const cpp_token * +stringify_arg (cpp_reader *pfile, macro_arg *arg) +{ + unsigned char *dest; + unsigned int i, escape_it, backslash_count = 0; + const cpp_token *source = NULL; + size_t len; + + if (BUFF_ROOM (pfile->u_buff) < 3) + _cpp_extend_buff (pfile, &pfile->u_buff, 3); + dest = BUFF_FRONT (pfile->u_buff); + *dest++ = '"'; + + /* Loop, reading in the argument's tokens. */ + for (i = 0; i < arg->count; i++) + { + const cpp_token *token = arg->first[i]; + + if (token->type == CPP_PADDING) + { + if (source == NULL) + source = token->val.source; + continue; + } + + escape_it = (token->type == CPP_STRING || token->type == CPP_WSTRING + || token->type == CPP_CHAR || token->type == CPP_WCHAR); + + /* Room for each char being written in octal, initial space and + final quote and NUL. */ + len = cpp_token_len (token); + if (escape_it) + len *= 4; + len += 3; + + if ((size_t) (BUFF_LIMIT (pfile->u_buff) - dest) < len) + { + size_t len_so_far = dest - BUFF_FRONT (pfile->u_buff); + _cpp_extend_buff (pfile, &pfile->u_buff, len); + dest = BUFF_FRONT (pfile->u_buff) + len_so_far; + } + + /* Leading white space? */ + if (dest - 1 != BUFF_FRONT (pfile->u_buff)) + { + if (source == NULL) + source = token; + if (source->flags & PREV_WHITE) + *dest++ = ' '; + } + source = NULL; + + if (escape_it) + { + _cpp_buff *buff = _cpp_get_buff (pfile, len); + unsigned char *buf = BUFF_FRONT (buff); + len = cpp_spell_token (pfile, token, buf, true) - buf; + dest = cpp_quote_string (dest, buf, len); + _cpp_release_buff (pfile, buff); + } + else + dest = cpp_spell_token (pfile, token, dest, true); + + if (token->type == CPP_OTHER && token->val.str.text[0] == '\\') + backslash_count++; + else + backslash_count = 0; + } + + /* Ignore the final \ of invalid string literals. */ + if (backslash_count & 1) + { + cpp_error (pfile, CPP_DL_WARNING, + "invalid string literal, ignoring final '\\'"); + dest--; + } + + /* Commit the memory, including NUL, and return the token. */ + *dest++ = '"'; + len = dest - BUFF_FRONT (pfile->u_buff); + BUFF_FRONT (pfile->u_buff) = dest + 1; + return new_string_token (pfile, dest - len, len); +} + +/* Try to paste two tokens. On success, return nonzero. In any + case, PLHS is updated to point to the pasted token, which is + guaranteed to not have the PASTE_LEFT flag set. */ +static bool +paste_tokens (cpp_reader *pfile, const cpp_token **plhs, const cpp_token *rhs) +{ + unsigned char *buf, *end, *lhsend; + cpp_token *lhs; + unsigned int len; + + len = cpp_token_len (*plhs) + cpp_token_len (rhs) + 1; + buf = (unsigned char *) alloca (len); + end = lhsend = cpp_spell_token (pfile, *plhs, buf, false); + + /* Avoid comment headers, since they are still processed in stage 3. + It is simpler to insert a space here, rather than modifying the + lexer to ignore comments in some circumstances. Simply returning + false doesn't work, since we want to clear the PASTE_LEFT flag. */ + if ((*plhs)->type == CPP_DIV && rhs->type != CPP_EQ) + *end++ = ' '; + /* In one obscure case we might see padding here. */ + if (rhs->type != CPP_PADDING) + end = cpp_spell_token (pfile, rhs, end, false); + *end = '\n'; + + cpp_push_buffer (pfile, buf, end - buf, /* from_stage3 */ true); + _cpp_clean_line (pfile); + + /* Set pfile->cur_token as required by _cpp_lex_direct. */ + pfile->cur_token = _cpp_temp_token (pfile); + lhs = _cpp_lex_direct (pfile); + if (pfile->buffer->cur != pfile->buffer->rlimit) + { + source_location saved_loc = lhs->src_loc; + + _cpp_pop_buffer (pfile); + _cpp_backup_tokens (pfile, 1); + *lhsend = '\0'; + + /* We have to remove the PASTE_LEFT flag from the old lhs, but + we want to keep the new location. */ + *lhs = **plhs; + *plhs = lhs; + lhs->src_loc = saved_loc; + lhs->flags &= ~PASTE_LEFT; + + /* Mandatory error for all apart from assembler. */ + if (CPP_OPTION (pfile, lang) != CLK_ASM) + cpp_error (pfile, CPP_DL_ERROR, + "pasting \"%s\" and \"%s\" does not give a valid preprocessing token", + buf, cpp_token_as_text (pfile, rhs)); + return false; + } + + *plhs = lhs; + _cpp_pop_buffer (pfile); + return true; +} + +/* Handles an arbitrarily long sequence of ## operators, with initial + operand LHS. This implementation is left-associative, + non-recursive, and finishes a paste before handling succeeding + ones. If a paste fails, we back up to the RHS of the failing ## + operator before pushing the context containing the result of prior + successful pastes, with the effect that the RHS appears in the + output stream after the pasted LHS normally. */ +static void +paste_all_tokens (cpp_reader *pfile, const cpp_token *lhs) +{ + const cpp_token *rhs; + cpp_context *context = pfile->context; + + do + { + /* Take the token directly from the current context. We can do + this, because we are in the replacement list of either an + object-like macro, or a function-like macro with arguments + inserted. In either case, the constraints to #define + guarantee we have at least one more token. */ + if (context->direct_p) + rhs = FIRST (context).token++; + else + rhs = *FIRST (context).ptoken++; + + if (rhs->type == CPP_PADDING) + { + if (rhs->flags & PASTE_LEFT) + abort (); + } + if (!paste_tokens (pfile, &lhs, rhs)) + break; + } + while (rhs->flags & PASTE_LEFT); + + /* Put the resulting token in its own context. */ + _cpp_push_token_context (pfile, NULL, lhs, 1); +} + +/* Returns TRUE if the number of arguments ARGC supplied in an + invocation of the MACRO referenced by NODE is valid. An empty + invocation to a macro with no parameters should pass ARGC as zero. + + Note that MACRO cannot necessarily be deduced from NODE, in case + NODE was redefined whilst collecting arguments. */ +bool +_cpp_arguments_ok (cpp_reader *pfile, cpp_macro *macro, const cpp_hashnode *node, unsigned int argc) +{ + if (argc == macro->paramc) + return true; + + if (argc < macro->paramc) + { + /* As an extension, a rest argument is allowed to not appear in + the invocation at all. + e.g. #define debug(format, args...) something + debug("string"); + + This is exactly the same as if there had been an empty rest + argument - debug("string", ). */ + + if (argc + 1 == macro->paramc && macro->variadic) + { + if (CPP_PEDANTIC (pfile) && ! macro->syshdr) + cpp_error (pfile, CPP_DL_PEDWARN, + "ISO C99 requires rest arguments to be used"); + return true; + } + + cpp_error (pfile, CPP_DL_ERROR, + "macro \"%s\" requires %u arguments, but only %u given", + NODE_NAME (node), macro->paramc, argc); + } + else + cpp_error (pfile, CPP_DL_ERROR, + "macro \"%s\" passed %u arguments, but takes just %u", + NODE_NAME (node), argc, macro->paramc); + + return false; +} + +/* Reads and returns the arguments to a function-like macro + invocation. Assumes the opening parenthesis has been processed. + If there is an error, emits an appropriate diagnostic and returns + NULL. Each argument is terminated by a CPP_EOF token, for the + future benefit of expand_arg(). If there are any deferred + #pragma directives among macro arguments, store pointers to the + CPP_PRAGMA ... CPP_PRAGMA_EOL tokens into *PRAGMA_BUFF buffer. */ +static _cpp_buff * +collect_args (cpp_reader *pfile, const cpp_hashnode *node, + _cpp_buff **pragma_buff) +{ + _cpp_buff *buff, *base_buff; + cpp_macro *macro; + macro_arg *args, *arg; + const cpp_token *token; + unsigned int argc; + + macro = node->value.macro; + if (macro->paramc) + argc = macro->paramc; + else + argc = 1; + buff = _cpp_get_buff (pfile, argc * (50 * sizeof (cpp_token *) + + sizeof (macro_arg))); + base_buff = buff; + args = (macro_arg *) buff->base; + memset (args, 0, argc * sizeof (macro_arg)); + buff->cur = (unsigned char *) &args[argc]; + arg = args, argc = 0; + + /* Collect the tokens making up each argument. We don't yet know + how many arguments have been supplied, whether too many or too + few. Hence the slightly bizarre usage of "argc" and "arg". */ + do + { + unsigned int paren_depth = 0; + unsigned int ntokens = 0; + + argc++; + arg->first = (const cpp_token **) buff->cur; + + for (;;) + { + /* Require space for 2 new tokens (including a CPP_EOF). */ + if ((unsigned char *) &arg->first[ntokens + 2] > buff->limit) + { + buff = _cpp_append_extend_buff (pfile, buff, + 1000 * sizeof (cpp_token *)); + arg->first = (const cpp_token **) buff->cur; + } + + token = cpp_get_token (pfile); + + if (token->type == CPP_PADDING) + { + /* Drop leading padding. */ + if (ntokens == 0) + continue; + } + else if (token->type == CPP_OPEN_PAREN) + paren_depth++; + else if (token->type == CPP_CLOSE_PAREN) + { + if (paren_depth-- == 0) + break; + } + else if (token->type == CPP_COMMA) + { + /* A comma does not terminate an argument within + parentheses or as part of a variable argument. */ + if (paren_depth == 0 + && ! (macro->variadic && argc == macro->paramc)) + break; + } + else if (token->type == CPP_EOF + || (token->type == CPP_HASH && token->flags & BOL)) + break; + else if (token->type == CPP_PRAGMA) + { + cpp_token *newtok = _cpp_temp_token (pfile); + + /* CPP_PRAGMA token lives in directive_result, which will + be overwritten on the next directive. */ + *newtok = *token; + token = newtok; + do + { + if (*pragma_buff == NULL + || BUFF_ROOM (*pragma_buff) < sizeof (cpp_token *)) + { + _cpp_buff *next; + if (*pragma_buff == NULL) + *pragma_buff + = _cpp_get_buff (pfile, 32 * sizeof (cpp_token *)); + else + { + next = *pragma_buff; + *pragma_buff + = _cpp_get_buff (pfile, + (BUFF_FRONT (*pragma_buff) + - (*pragma_buff)->base) * 2); + (*pragma_buff)->next = next; + } + } + *(const cpp_token **) BUFF_FRONT (*pragma_buff) = token; + BUFF_FRONT (*pragma_buff) += sizeof (cpp_token *); + if (token->type == CPP_PRAGMA_EOL) + break; + token = cpp_get_token (pfile); + } + while (token->type != CPP_EOF); + + /* In deferred pragmas parsing_args and prevent_expansion + had been changed, reset it. */ + pfile->state.parsing_args = 2; + pfile->state.prevent_expansion = 1; + + if (token->type == CPP_EOF) + break; + else + continue; + } + + arg->first[ntokens++] = token; + } + + /* Drop trailing padding. */ + while (ntokens > 0 && arg->first[ntokens - 1]->type == CPP_PADDING) + ntokens--; + + arg->count = ntokens; + arg->first[ntokens] = &pfile->eof; + + /* Terminate the argument. Excess arguments loop back and + overwrite the final legitimate argument, before failing. */ + if (argc <= macro->paramc) + { + buff->cur = (unsigned char *) &arg->first[ntokens + 1]; + if (argc != macro->paramc) + arg++; + } + } + while (token->type != CPP_CLOSE_PAREN && token->type != CPP_EOF); + + if (token->type == CPP_EOF) + { + /* We still need the CPP_EOF to end directives, and to end + pre-expansion of a macro argument. Step back is not + unconditional, since we don't want to return a CPP_EOF to our + callers at the end of an -include-d file. */ + if (pfile->context->prev || pfile->state.in_directive) + _cpp_backup_tokens (pfile, 1); + cpp_error (pfile, CPP_DL_ERROR, + "unterminated argument list invoking macro \"%s\"", + NODE_NAME (node)); + } + else + { + /* A single empty argument is counted as no argument. */ + if (argc == 1 && macro->paramc == 0 && args[0].count == 0) + argc = 0; + if (_cpp_arguments_ok (pfile, macro, node, argc)) + { + /* GCC has special semantics for , ## b where b is a varargs + parameter: we remove the comma if b was omitted entirely. + If b was merely an empty argument, the comma is retained. + If the macro takes just one (varargs) parameter, then we + retain the comma only if we are standards conforming. + + If FIRST is NULL replace_args () swallows the comma. */ + if (macro->variadic && (argc < macro->paramc + || (argc == 1 && args[0].count == 0 + && !CPP_OPTION (pfile, std)))) + args[macro->paramc - 1].first = NULL; + return base_buff; + } + } + + /* An error occurred. */ + _cpp_release_buff (pfile, base_buff); + return NULL; +} + +/* Search for an opening parenthesis to the macro of NODE, in such a + way that, if none is found, we don't lose the information in any + intervening padding tokens. If we find the parenthesis, collect + the arguments and return the buffer containing them. PRAGMA_BUFF + argument is the same as in collect_args. */ +static _cpp_buff * +funlike_invocation_p (cpp_reader *pfile, cpp_hashnode *node, + _cpp_buff **pragma_buff) +{ + const cpp_token *token, *padding = NULL; + + for (;;) + { + token = cpp_get_token (pfile); + if (token->type != CPP_PADDING) + break; + if (padding == NULL + || (!(padding->flags & PREV_WHITE) && token->val.source == NULL)) + padding = token; + } + + if (token->type == CPP_OPEN_PAREN) + { + pfile->state.parsing_args = 2; + return collect_args (pfile, node, pragma_buff); + } + + /* CPP_EOF can be the end of macro arguments, or the end of the + file. We mustn't back up over the latter. Ugh. */ + if (token->type != CPP_EOF || token == &pfile->eof) + { + /* Back up. We may have skipped padding, in which case backing + up more than one token when expanding macros is in general + too difficult. We re-insert it in its own context. */ + _cpp_backup_tokens (pfile, 1); + if (padding) + _cpp_push_token_context (pfile, NULL, padding, 1); + } + + return NULL; +} + +/* Push the context of a macro with hash entry NODE onto the context + stack. If we can successfully expand the macro, we push a context + containing its yet-to-be-rescanned replacement list and return one. + If there were additionally any unexpanded deferred #pragma directives + among macro arguments, push another context containing the + pragma tokens before the yet-to-be-rescanned replacement list + and return two. Otherwise, we don't push a context and return zero. */ +static int +enter_macro_context (cpp_reader *pfile, cpp_hashnode *node, + const cpp_token *result) +{ + /* The presence of a macro invalidates a file's controlling macro. */ + pfile->mi_valid = false; + + pfile->state.angled_headers = false; + + /* Handle standard macros. */ + if (! (node->flags & NODE_BUILTIN)) + { + cpp_macro *macro = node->value.macro; + _cpp_buff *pragma_buff = NULL; + + if (macro->fun_like) + { + _cpp_buff *buff; + + pfile->state.prevent_expansion++; + pfile->keep_tokens++; + pfile->state.parsing_args = 1; + buff = funlike_invocation_p (pfile, node, &pragma_buff); + pfile->state.parsing_args = 0; + pfile->keep_tokens--; + pfile->state.prevent_expansion--; + + if (buff == NULL) + { + if (CPP_WTRADITIONAL (pfile) && ! node->value.macro->syshdr) + cpp_error (pfile, CPP_DL_WARNING, + "function-like macro \"%s\" must be used with arguments in traditional C", + NODE_NAME (node)); + + if (pragma_buff) + _cpp_release_buff (pfile, pragma_buff); + + return 0; + } + + if (macro->paramc > 0) + replace_args (pfile, node, macro, (macro_arg *) buff->base); + _cpp_release_buff (pfile, buff); + } + + /* Disable the macro within its expansion. */ + node->flags |= NODE_DISABLED; + + macro->used = 1; + + if (macro->paramc == 0) + _cpp_push_token_context (pfile, node, macro->exp.tokens, macro->count); + + if (pragma_buff) + { + if (!pfile->state.in_directive) + _cpp_push_token_context (pfile, NULL, + padding_token (pfile, result), 1); + do + { + _cpp_buff *tail = pragma_buff->next; + pragma_buff->next = NULL; + push_ptoken_context (pfile, NULL, pragma_buff, + (const cpp_token **) pragma_buff->base, + ((const cpp_token **) BUFF_FRONT (pragma_buff) + - (const cpp_token **) pragma_buff->base)); + pragma_buff = tail; + } + while (pragma_buff != NULL); + return 2; + } + + return 1; + } + + /* Handle built-in macros and the _Pragma operator. */ + return builtin_macro (pfile, node); +} + +/* Replace the parameters in a function-like macro of NODE with the + actual ARGS, and place the result in a newly pushed token context. + Expand each argument before replacing, unless it is operated upon + by the # or ## operators. */ +static void +replace_args (cpp_reader *pfile, cpp_hashnode *node, cpp_macro *macro, macro_arg *args) +{ + unsigned int i, total; + const cpp_token *src, *limit; + const cpp_token **dest, **first; + macro_arg *arg; + _cpp_buff *buff; + + /* First, fully macro-expand arguments, calculating the number of + tokens in the final expansion as we go. The ordering of the if + statements below is subtle; we must handle stringification before + pasting. */ + total = macro->count; + limit = macro->exp.tokens + macro->count; + + for (src = macro->exp.tokens; src < limit; src++) + if (src->type == CPP_MACRO_ARG) + { + /* Leading and trailing padding tokens. */ + total += 2; + + /* We have an argument. If it is not being stringified or + pasted it is macro-replaced before insertion. */ + arg = &args[src->val.arg_no - 1]; + + if (src->flags & STRINGIFY_ARG) + { + if (!arg->stringified) + arg->stringified = stringify_arg (pfile, arg); + } + else if ((src->flags & PASTE_LEFT) + || (src > macro->exp.tokens && (src[-1].flags & PASTE_LEFT))) + total += arg->count - 1; + else + { + if (!arg->expanded) + expand_arg (pfile, arg); + total += arg->expanded_count - 1; + } + } + + /* Now allocate space for the expansion, copy the tokens and replace + the arguments. */ + buff = _cpp_get_buff (pfile, total * sizeof (cpp_token *)); + first = (const cpp_token **) buff->base; + dest = first; + + for (src = macro->exp.tokens; src < limit; src++) + { + unsigned int count; + const cpp_token **from, **paste_flag; + + if (src->type != CPP_MACRO_ARG) + { + *dest++ = src; + continue; + } + + paste_flag = 0; + arg = &args[src->val.arg_no - 1]; + if (src->flags & STRINGIFY_ARG) + count = 1, from = &arg->stringified; + else if (src->flags & PASTE_LEFT) + count = arg->count, from = arg->first; + else if (src != macro->exp.tokens && (src[-1].flags & PASTE_LEFT)) + { + count = arg->count, from = arg->first; + if (dest != first) + { + if (dest[-1]->type == CPP_COMMA + && macro->variadic + && src->val.arg_no == macro->paramc) + { + /* Swallow a pasted comma if from == NULL, otherwise + drop the paste flag. */ + if (from == NULL) + dest--; + else + paste_flag = dest - 1; + } + /* Remove the paste flag if the RHS is a placemarker. */ + else if (count == 0) + paste_flag = dest - 1; + } + } + else + count = arg->expanded_count, from = arg->expanded; + + /* Padding on the left of an argument (unless RHS of ##). */ + if ((!pfile->state.in_directive || pfile->state.directive_wants_padding) + && src != macro->exp.tokens && !(src[-1].flags & PASTE_LEFT)) + *dest++ = padding_token (pfile, src); + + if (count) + { + memcpy (dest, from, count * sizeof (cpp_token *)); + dest += count; + + /* With a non-empty argument on the LHS of ##, the last + token should be flagged PASTE_LEFT. */ + if (src->flags & PASTE_LEFT) + paste_flag = dest - 1; + } + + /* Avoid paste on RHS (even case count == 0). */ + if (!pfile->state.in_directive && !(src->flags & PASTE_LEFT)) + *dest++ = &pfile->avoid_paste; + + /* Add a new paste flag, or remove an unwanted one. */ + if (paste_flag) + { + cpp_token *token = _cpp_temp_token (pfile); + token->type = (*paste_flag)->type; + token->val = (*paste_flag)->val; + if (src->flags & PASTE_LEFT) + token->flags = (*paste_flag)->flags | PASTE_LEFT; + else + token->flags = (*paste_flag)->flags & ~PASTE_LEFT; + *paste_flag = token; + } + } + + /* Free the expanded arguments. */ + for (i = 0; i < macro->paramc; i++) + if (args[i].expanded) + free (args[i].expanded); + + push_ptoken_context (pfile, node, buff, first, dest - first); +} + +/* Return a special padding token, with padding inherited from SOURCE. */ +static const cpp_token * +padding_token (cpp_reader *pfile, const cpp_token *source) +{ + cpp_token *result = _cpp_temp_token (pfile); + + result->type = CPP_PADDING; + + /* Data in GCed data structures cannot be made const so far, so we + need a cast here. */ + result->val.source = (cpp_token *) source; + result->flags = 0; + return result; +} + +/* Get a new uninitialized context. Create a new one if we cannot + re-use an old one. */ +static cpp_context * +next_context (cpp_reader *pfile) +{ + cpp_context *result = pfile->context->next; + + if (result == 0) + { + result = XNEW (cpp_context); + result->prev = pfile->context; + result->next = 0; + pfile->context->next = result; + } + + pfile->context = result; + return result; +} + +/* Push a list of pointers to tokens. */ +static void +push_ptoken_context (cpp_reader *pfile, cpp_hashnode *macro, _cpp_buff *buff, + const cpp_token **first, unsigned int count) +{ + cpp_context *context = next_context (pfile); + + context->direct_p = false; + context->macro = macro; + context->buff = buff; + FIRST (context).ptoken = first; + LAST (context).ptoken = first + count; +} + +/* Push a list of tokens. */ +void +_cpp_push_token_context (cpp_reader *pfile, cpp_hashnode *macro, + const cpp_token *first, unsigned int count) +{ + cpp_context *context = next_context (pfile); + + context->direct_p = true; + context->macro = macro; + context->buff = NULL; + FIRST (context).token = first; + LAST (context).token = first + count; +} + +/* Push a traditional macro's replacement text. */ +void +_cpp_push_text_context (cpp_reader *pfile, cpp_hashnode *macro, + const uchar *start, size_t len) +{ + cpp_context *context = next_context (pfile); + + context->direct_p = true; + context->macro = macro; + context->buff = NULL; + CUR (context) = start; + RLIMIT (context) = start + len; + macro->flags |= NODE_DISABLED; +} + +/* Expand an argument ARG before replacing parameters in a + function-like macro. This works by pushing a context with the + argument's tokens, and then expanding that into a temporary buffer + as if it were a normal part of the token stream. collect_args() + has terminated the argument's tokens with a CPP_EOF so that we know + when we have fully expanded the argument. */ +static void +expand_arg (cpp_reader *pfile, macro_arg *arg) +{ + unsigned int capacity; + bool saved_warn_trad; + + if (arg->count == 0) + return; + + /* Don't warn about funlike macros when pre-expanding. */ + saved_warn_trad = CPP_WTRADITIONAL (pfile); + CPP_WTRADITIONAL (pfile) = 0; + + /* Loop, reading in the arguments. */ + capacity = 256; + arg->expanded = XNEWVEC (const cpp_token *, capacity); + + push_ptoken_context (pfile, NULL, NULL, arg->first, arg->count + 1); + for (;;) + { + const cpp_token *token; + + if (arg->expanded_count + 1 >= capacity) + { + capacity *= 2; + arg->expanded = XRESIZEVEC (const cpp_token *, arg->expanded, + capacity); + } + + token = cpp_get_token (pfile); + + if (token->type == CPP_EOF) + break; + + arg->expanded[arg->expanded_count++] = token; + } + + _cpp_pop_context (pfile); + + CPP_WTRADITIONAL (pfile) = saved_warn_trad; +} + +/* Pop the current context off the stack, re-enabling the macro if the + context represented a macro's replacement list. The context + structure is not freed so that we can re-use it later. */ +void +_cpp_pop_context (cpp_reader *pfile) +{ + cpp_context *context = pfile->context; + + if (context->macro) + context->macro->flags &= ~NODE_DISABLED; + + if (context->buff) + _cpp_release_buff (pfile, context->buff); + + pfile->context = context->prev; +} + +/* External routine to get a token. Also used nearly everywhere + internally, except for places where we know we can safely call + _cpp_lex_token directly, such as lexing a directive name. + + Macro expansions and directives are transparently handled, + including entering included files. Thus tokens are post-macro + expansion, and after any intervening directives. External callers + see CPP_EOF only at EOF. Internal callers also see it when meeting + a directive inside a macro call, when at the end of a directive and + state.in_directive is still 1, and at the end of argument + pre-expansion. */ +const cpp_token * +cpp_get_token (cpp_reader *pfile) +{ + const cpp_token *result; + bool can_set = pfile->set_invocation_location; + pfile->set_invocation_location = false; + + for (;;) + { + cpp_hashnode *node; + cpp_context *context = pfile->context; + + /* Context->prev == 0 <=> base context. */ + if (!context->prev) + result = _cpp_lex_token (pfile); + else if (FIRST (context).token != LAST (context).token) + { + if (context->direct_p) + result = FIRST (context).token++; + else + result = *FIRST (context).ptoken++; + + if (result->flags & PASTE_LEFT) + { + paste_all_tokens (pfile, result); + if (pfile->state.in_directive) + continue; + return padding_token (pfile, result); + } + } + else + { + _cpp_pop_context (pfile); + if (pfile->state.in_directive) + continue; + return &pfile->avoid_paste; + } + + if (pfile->state.in_directive && result->type == CPP_COMMENT) + continue; + + if (result->type != CPP_NAME) + break; + + node = result->val.node; + + if (node->type != NT_MACRO || (result->flags & NO_EXPAND)) + break; + + if (!(node->flags & NODE_DISABLED)) + { + int ret; + /* If not in a macro context, and we're going to start an + expansion, record the location. */ + if (can_set && !context->macro) + pfile->invocation_location = result->src_loc; + if (pfile->state.prevent_expansion) + break; + ret = enter_macro_context (pfile, node, result); + if (ret) + { + if (pfile->state.in_directive || ret == 2) + continue; + return padding_token (pfile, result); + } + } + else + { + /* Flag this token as always unexpandable. FIXME: move this + to collect_args()?. */ + cpp_token *t = _cpp_temp_token (pfile); + t->type = result->type; + t->flags = result->flags | NO_EXPAND; + t->val = result->val; + result = t; + } + + break; + } + + return result; +} + +/* Like cpp_get_token, but also returns a location separate from the + one provided by the returned token. LOC is an out parameter; *LOC + is set to the location "as expected by the user". This matters + when a token results from macro expansion -- the token's location + will indicate where the macro is defined, but *LOC will be the + location of the start of the expansion. */ +const cpp_token * +cpp_get_token_with_location (cpp_reader *pfile, source_location *loc) +{ + const cpp_token *result; + + pfile->set_invocation_location = true; + result = cpp_get_token (pfile); + if (pfile->context->macro) + *loc = pfile->invocation_location; + else + *loc = result->src_loc; + + return result; +} + +/* Returns true if we're expanding an object-like macro that was + defined in a system header. Just checks the macro at the top of + the stack. Used for diagnostic suppression. */ +int +cpp_sys_macro_p (cpp_reader *pfile) +{ + cpp_hashnode *node = pfile->context->macro; + + return node && node->value.macro && node->value.macro->syshdr; +} + +/* Read each token in, until end of the current file. Directives are + transparently processed. */ +void +cpp_scan_nooutput (cpp_reader *pfile) +{ + /* Request a CPP_EOF token at the end of this file, rather than + transparently continuing with the including file. */ + pfile->buffer->return_at_eof = true; + + pfile->state.discarding_output++; + pfile->state.prevent_expansion++; + + if (CPP_OPTION (pfile, traditional)) + while (_cpp_read_logical_line_trad (pfile)) + ; + else + while (cpp_get_token (pfile)->type != CPP_EOF) + ; + + pfile->state.discarding_output--; + pfile->state.prevent_expansion--; +} + +/* Step back one (or more) tokens. Can only step back more than 1 if + they are from the lexer, and not from macro expansion. */ +void +_cpp_backup_tokens (cpp_reader *pfile, unsigned int count) +{ + if (pfile->context->prev == NULL) + { + pfile->lookaheads += count; + while (count--) + { + pfile->cur_token--; + if (pfile->cur_token == pfile->cur_run->base + /* Possible with -fpreprocessed and no leading #line. */ + && pfile->cur_run->prev != NULL) + { + pfile->cur_run = pfile->cur_run->prev; + pfile->cur_token = pfile->cur_run->limit; + } + } + } + else + { + if (count != 1) + abort (); + if (pfile->context->direct_p) + FIRST (pfile->context).token--; + else + FIRST (pfile->context).ptoken--; + } +} + +/* #define directive parsing and handling. */ + +/* Returns nonzero if a macro redefinition warning is required. */ +static bool +warn_of_redefinition (cpp_reader *pfile, const cpp_hashnode *node, + const cpp_macro *macro2) +{ + const cpp_macro *macro1; + unsigned int i; + + /* Some redefinitions need to be warned about regardless. */ + if (node->flags & NODE_WARN) + return true; + + /* Redefinition of a macro is allowed if and only if the old and new + definitions are the same. (6.10.3 paragraph 2). */ + macro1 = node->value.macro; + + /* Don't check count here as it can be different in valid + traditional redefinitions with just whitespace differences. */ + if (macro1->paramc != macro2->paramc + || macro1->fun_like != macro2->fun_like + || macro1->variadic != macro2->variadic) + return true; + + /* Check parameter spellings. */ + for (i = 0; i < macro1->paramc; i++) + if (macro1->params[i] != macro2->params[i]) + return true; + + /* Check the replacement text or tokens. */ + if (CPP_OPTION (pfile, traditional)) + return _cpp_expansions_different_trad (macro1, macro2); + + if (macro1->count != macro2->count) + return true; + + for (i = 0; i < macro1->count; i++) + if (!_cpp_equiv_tokens (¯o1->exp.tokens[i], ¯o2->exp.tokens[i])) + return true; + + return false; +} + +/* Free the definition of hashnode H. */ +void +_cpp_free_definition (cpp_hashnode *h) +{ + /* Macros and assertions no longer have anything to free. */ + h->type = NT_VOID; + /* Clear builtin flag in case of redefinition. */ + h->flags &= ~(NODE_BUILTIN | NODE_DISABLED); +} + +/* Save parameter NODE to the parameter list of macro MACRO. Returns + zero on success, nonzero if the parameter is a duplicate. */ +bool +_cpp_save_parameter (cpp_reader *pfile, cpp_macro *macro, cpp_hashnode *node) +{ + unsigned int len; + /* Constraint 6.10.3.6 - duplicate parameter names. */ + if (node->flags & NODE_MACRO_ARG) + { + cpp_error (pfile, CPP_DL_ERROR, "duplicate macro parameter \"%s\"", + NODE_NAME (node)); + return true; + } + + if (BUFF_ROOM (pfile->a_buff) + < (macro->paramc + 1) * sizeof (cpp_hashnode *)) + _cpp_extend_buff (pfile, &pfile->a_buff, sizeof (cpp_hashnode *)); + + ((cpp_hashnode **) BUFF_FRONT (pfile->a_buff))[macro->paramc++] = node; + node->flags |= NODE_MACRO_ARG; + len = macro->paramc * sizeof (union _cpp_hashnode_value); + if (len > pfile->macro_buffer_len) + { + pfile->macro_buffer = XRESIZEVEC (unsigned char, pfile->macro_buffer, + len); + pfile->macro_buffer_len = len; + } + ((union _cpp_hashnode_value *) pfile->macro_buffer)[macro->paramc - 1] + = node->value; + + node->value.arg_index = macro->paramc; + return false; +} + +/* Check the syntax of the parameters in a MACRO definition. Returns + false if an error occurs. */ +static bool +parse_params (cpp_reader *pfile, cpp_macro *macro) +{ + unsigned int prev_ident = 0; + + for (;;) + { + const cpp_token *token = _cpp_lex_token (pfile); + + switch (token->type) + { + default: + /* Allow/ignore comments in parameter lists if we are + preserving comments in macro expansions. */ + if (token->type == CPP_COMMENT + && ! CPP_OPTION (pfile, discard_comments_in_macro_exp)) + continue; + + cpp_error (pfile, CPP_DL_ERROR, + "\"%s\" may not appear in macro parameter list", + cpp_token_as_text (pfile, token)); + return false; + + case CPP_NAME: + if (prev_ident) + { + cpp_error (pfile, CPP_DL_ERROR, + "macro parameters must be comma-separated"); + return false; + } + prev_ident = 1; + + if (_cpp_save_parameter (pfile, macro, token->val.node)) + return false; + continue; + + case CPP_CLOSE_PAREN: + if (prev_ident || macro->paramc == 0) + return true; + + /* Fall through to pick up the error. */ + case CPP_COMMA: + if (!prev_ident) + { + cpp_error (pfile, CPP_DL_ERROR, "parameter name missing"); + return false; + } + prev_ident = 0; + continue; + + case CPP_ELLIPSIS: + macro->variadic = 1; + if (!prev_ident) + { + _cpp_save_parameter (pfile, macro, + pfile->spec_nodes.n__VA_ARGS__); + pfile->state.va_args_ok = 1; + if (! CPP_OPTION (pfile, c99) + && CPP_OPTION (pfile, pedantic) + && CPP_OPTION (pfile, warn_variadic_macros)) + cpp_error (pfile, CPP_DL_PEDWARN, + "anonymous variadic macros were introduced in C99"); + } + else if (CPP_OPTION (pfile, pedantic) + && CPP_OPTION (pfile, warn_variadic_macros)) + cpp_error (pfile, CPP_DL_PEDWARN, + "ISO C does not permit named variadic macros"); + + /* We're at the end, and just expect a closing parenthesis. */ + token = _cpp_lex_token (pfile); + if (token->type == CPP_CLOSE_PAREN) + return true; + /* Fall through. */ + + case CPP_EOF: + cpp_error (pfile, CPP_DL_ERROR, "missing ')' in macro parameter list"); + return false; + } + } +} + +/* Allocate room for a token from a macro's replacement list. */ +static cpp_token * +alloc_expansion_token (cpp_reader *pfile, cpp_macro *macro) +{ + if (BUFF_ROOM (pfile->a_buff) < (macro->count + 1) * sizeof (cpp_token)) + _cpp_extend_buff (pfile, &pfile->a_buff, sizeof (cpp_token)); + + return &((cpp_token *) BUFF_FRONT (pfile->a_buff))[macro->count++]; +} + +/* Lex a token from the expansion of MACRO, but mark parameters as we + find them and warn of traditional stringification. */ +static cpp_token * +lex_expansion_token (cpp_reader *pfile, cpp_macro *macro) +{ + cpp_token *token, *saved_cur_token; + + saved_cur_token = pfile->cur_token; + pfile->cur_token = alloc_expansion_token (pfile, macro); + token = _cpp_lex_direct (pfile); + pfile->cur_token = saved_cur_token; + + /* Is this a parameter? */ + if (token->type == CPP_NAME + && (token->val.node->flags & NODE_MACRO_ARG) != 0) + { + token->type = CPP_MACRO_ARG; + token->val.arg_no = token->val.node->value.arg_index; + } + else if (CPP_WTRADITIONAL (pfile) && macro->paramc > 0 + && (token->type == CPP_STRING || token->type == CPP_CHAR)) + check_trad_stringification (pfile, macro, &token->val.str); + + return token; +} + +static bool +create_iso_definition (cpp_reader *pfile, cpp_macro *macro) +{ + cpp_token *token; + const cpp_token *ctoken; + bool following_paste_op = false; + const char *paste_op_error_msg = + N_("'##' cannot appear at either end of a macro expansion"); + + /* Get the first token of the expansion (or the '(' of a + function-like macro). */ + ctoken = _cpp_lex_token (pfile); + + if (ctoken->type == CPP_OPEN_PAREN && !(ctoken->flags & PREV_WHITE)) + { + bool ok = parse_params (pfile, macro); + macro->params = (cpp_hashnode **) BUFF_FRONT (pfile->a_buff); + if (!ok) + return false; + + /* Success. Commit or allocate the parameter array. */ + if (pfile->hash_table->alloc_subobject) + { + cpp_hashnode **params = + (cpp_hashnode **) pfile->hash_table->alloc_subobject + (sizeof (cpp_hashnode *) * macro->paramc); + memcpy (params, macro->params, + sizeof (cpp_hashnode *) * macro->paramc); + macro->params = params; + } + else + BUFF_FRONT (pfile->a_buff) = (uchar *) ¯o->params[macro->paramc]; + macro->fun_like = 1; + } + else if (ctoken->type != CPP_EOF && !(ctoken->flags & PREV_WHITE)) + { + /* While ISO C99 requires whitespace before replacement text + in a macro definition, ISO C90 with TC1 allows there characters + from the basic source character set. */ + if (CPP_OPTION (pfile, c99)) + cpp_error (pfile, CPP_DL_PEDWARN, + "ISO C99 requires whitespace after the macro name"); + else + { + int warntype = CPP_DL_WARNING; + switch (ctoken->type) + { + case CPP_ATSIGN: + case CPP_AT_NAME: + case CPP_OBJC_STRING: + /* '@' is not in basic character set. */ + warntype = CPP_DL_PEDWARN; + break; + case CPP_OTHER: + /* Basic character set sans letters, digits and _. */ + if (strchr ("!\"#%&'()*+,-./:;<=>?[\\]^{|}~", + ctoken->val.str.text[0]) == NULL) + warntype = CPP_DL_PEDWARN; + break; + default: + /* All other tokens start with a character from basic + character set. */ + break; + } + cpp_error (pfile, warntype, + "missing whitespace after the macro name"); + } + } + + if (macro->fun_like) + token = lex_expansion_token (pfile, macro); + else + { + token = alloc_expansion_token (pfile, macro); + *token = *ctoken; + } + + for (;;) + { + /* Check the stringifying # constraint 6.10.3.2.1 of + function-like macros when lexing the subsequent token. */ + if (macro->count > 1 && token[-1].type == CPP_HASH && macro->fun_like) + { + if (token->type == CPP_MACRO_ARG) + { + token->flags &= ~PREV_WHITE; + token->flags |= STRINGIFY_ARG; + token->flags |= token[-1].flags & PREV_WHITE; + token[-1] = token[0]; + macro->count--; + } + /* Let assembler get away with murder. */ + else if ((CPP_OPTION (pfile, lang) != CLK_ASM) + && (!CPP_OPTION(pfile, allow_naked_hash))) + { + cpp_error (pfile, CPP_DL_ERROR, + "'#' is not followed by a macro parameter"); + return false; + } + } + + if (token->type == CPP_EOF) + { + /* Paste operator constraint 6.10.3.3.1: + Token-paste ##, can appear in both object-like and + function-like macros, but not at the end. */ + if (following_paste_op) + { + cpp_error (pfile, CPP_DL_ERROR, paste_op_error_msg); + return false; + } + break; + } + + /* Paste operator constraint 6.10.3.3.1. */ + if (token->type == CPP_PASTE) + { + /* Token-paste ##, can appear in both object-like and + function-like macros, but not at the beginning. */ + if (macro->count == 1) + { + cpp_error (pfile, CPP_DL_ERROR, paste_op_error_msg); + return false; + } + + --macro->count; + token[-1].flags |= PASTE_LEFT; + } + + following_paste_op = (token->type == CPP_PASTE); + token = lex_expansion_token (pfile, macro); + } + + macro->exp.tokens = (cpp_token *) BUFF_FRONT (pfile->a_buff); + macro->traditional = 0; + + /* Don't count the CPP_EOF. */ + macro->count--; + + /* Clear whitespace on first token for warn_of_redefinition(). */ + if (macro->count) + macro->exp.tokens[0].flags &= ~PREV_WHITE; + + /* Commit or allocate the memory. */ + if (pfile->hash_table->alloc_subobject) + { + cpp_token *tokns = + (cpp_token *) pfile->hash_table->alloc_subobject (sizeof (cpp_token) + * macro->count); + memcpy (tokns, macro->exp.tokens, sizeof (cpp_token) * macro->count); + macro->exp.tokens = tokns; + } + else + BUFF_FRONT (pfile->a_buff) = (uchar *) ¯o->exp.tokens[macro->count]; + + return true; +} + +/* Parse a macro and save its expansion. Returns nonzero on success. */ +bool +_cpp_create_definition (cpp_reader *pfile, cpp_hashnode *node) +{ + cpp_macro *macro; + unsigned int i; + bool ok; + + if (pfile->hash_table->alloc_subobject) + macro = (cpp_macro *) pfile->hash_table->alloc_subobject + (sizeof (cpp_macro)); + else + macro = (cpp_macro *) _cpp_aligned_alloc (pfile, sizeof (cpp_macro)); + macro->line = pfile->directive_line; + macro->params = 0; + macro->paramc = 0; + macro->variadic = 0; + macro->used = !CPP_OPTION (pfile, warn_unused_macros); + macro->count = 0; + macro->fun_like = 0; + /* To suppress some diagnostics. */ + macro->syshdr = pfile->buffer && pfile->buffer->sysp != 0; + + if (CPP_OPTION (pfile, traditional)) + ok = _cpp_create_trad_definition (pfile, macro); + else + { + ok = create_iso_definition (pfile, macro); + + /* We set the type for SEEN_EOL() in directives.c. + + Longer term we should lex the whole line before coming here, + and just copy the expansion. */ + + /* Stop the lexer accepting __VA_ARGS__. */ + pfile->state.va_args_ok = 0; + } + + /* Clear the fast argument lookup indices. */ + for (i = macro->paramc; i-- > 0; ) + { + struct cpp_hashnode *node = macro->params[i]; + node->flags &= ~ NODE_MACRO_ARG; + node->value = ((union _cpp_hashnode_value *) pfile->macro_buffer)[i]; + } + + if (!ok) + return ok; + + if (node->type == NT_MACRO) + { + if (CPP_OPTION (pfile, warn_unused_macros)) + _cpp_warn_if_unused_macro (pfile, node, NULL); + + if (warn_of_redefinition (pfile, node, macro)) + { + cpp_error_with_line (pfile, CPP_DL_PEDWARN, pfile->directive_line, 0, + "\"%s\" redefined", NODE_NAME (node)); + + if (node->type == NT_MACRO && !(node->flags & NODE_BUILTIN)) + cpp_error_with_line (pfile, CPP_DL_PEDWARN, + node->value.macro->line, 0, + "this is the location of the previous definition"); + } + } + + if (node->type != NT_VOID) + _cpp_free_definition (node); + + /* Enter definition in hash table. */ + node->type = NT_MACRO; + node->value.macro = macro; + if (! ustrncmp (NODE_NAME (node), DSC ("__STDC_")) + && ustrcmp (NODE_NAME (node), (const uchar *) "__STDC_FORMAT_MACROS") + /* __STDC_LIMIT_MACROS and __STDC_CONSTANT_MACROS are mentioned + in the C standard, as something that one must use in C++. + However DR#593 indicates that these aren't actually mentioned + in the C++ standard. We special-case them anyway. */ + && ustrcmp (NODE_NAME (node), (const uchar *) "__STDC_LIMIT_MACROS") + && ustrcmp (NODE_NAME (node), (const uchar *) "__STDC_CONSTANT_MACROS")) + node->flags |= NODE_WARN; + + return ok; +} + +/* Warn if a token in STRING matches one of a function-like MACRO's + parameters. */ +static void +check_trad_stringification (cpp_reader *pfile, const cpp_macro *macro, + const cpp_string *string) +{ + unsigned int i, len; + const uchar *p, *q, *limit; + + /* Loop over the string. */ + limit = string->text + string->len - 1; + for (p = string->text + 1; p < limit; p = q) + { + /* Find the start of an identifier. */ + while (p < limit && !is_idstart (*p)) + p++; + + /* Find the end of the identifier. */ + q = p; + while (q < limit && is_idchar (*q)) + q++; + + len = q - p; + + /* Loop over the function macro arguments to see if the + identifier inside the string matches one of them. */ + for (i = 0; i < macro->paramc; i++) + { + const cpp_hashnode *node = macro->params[i]; + + if (NODE_LEN (node) == len + && !memcmp (p, NODE_NAME (node), len)) + { + cpp_error (pfile, CPP_DL_WARNING, + "macro argument \"%s\" would be stringified in traditional C", + NODE_NAME (node)); + break; + } + } + } +} + +/* Returns the name, arguments and expansion of a macro, in a format + suitable to be read back in again, and therefore also for DWARF 2 + debugging info. e.g. "PASTE(X, Y) X ## Y", or "MACNAME EXPANSION". + Caller is expected to generate the "#define" bit if needed. The + returned text is temporary, and automatically freed later. */ +const unsigned char * +cpp_macro_definition (cpp_reader *pfile, const cpp_hashnode *node) +{ + unsigned int i, len; + const cpp_macro *macro = node->value.macro; + unsigned char *buffer; + + if (node->type != NT_MACRO || (node->flags & NODE_BUILTIN)) + { + cpp_error (pfile, CPP_DL_ICE, + "invalid hash type %d in cpp_macro_definition", node->type); + return 0; + } + + /* Calculate length. */ + len = NODE_LEN (node) + 2; /* ' ' and NUL. */ + if (macro->fun_like) + { + len += 4; /* "()" plus possible final ".." of named + varargs (we have + 1 below). */ + for (i = 0; i < macro->paramc; i++) + len += NODE_LEN (macro->params[i]) + 1; /* "," */ + } + + /* This should match below where we fill in the buffer. */ + if (CPP_OPTION (pfile, traditional)) + len += _cpp_replacement_text_len (macro); + else + { + for (i = 0; i < macro->count; i++) + { + cpp_token *token = ¯o->exp.tokens[i]; + + if (token->type == CPP_MACRO_ARG) + len += NODE_LEN (macro->params[token->val.arg_no - 1]); + else + len += cpp_token_len (token); + + if (token->flags & STRINGIFY_ARG) + len++; /* "#" */ + if (token->flags & PASTE_LEFT) + len += 3; /* " ##" */ + if (token->flags & PREV_WHITE) + len++; /* " " */ + } + } + + if (len > pfile->macro_buffer_len) + { + pfile->macro_buffer = XRESIZEVEC (unsigned char, + pfile->macro_buffer, len); + pfile->macro_buffer_len = len; + } + + /* Fill in the buffer. Start with the macro name. */ + buffer = pfile->macro_buffer; + memcpy (buffer, NODE_NAME (node), NODE_LEN (node)); + buffer += NODE_LEN (node); + + /* Parameter names. */ + if (macro->fun_like) + { + *buffer++ = '('; + for (i = 0; i < macro->paramc; i++) + { + cpp_hashnode *param = macro->params[i]; + + if (param != pfile->spec_nodes.n__VA_ARGS__) + { + memcpy (buffer, NODE_NAME (param), NODE_LEN (param)); + buffer += NODE_LEN (param); + } + + if (i + 1 < macro->paramc) + /* Don't emit a space after the comma here; we're trying + to emit a Dwarf-friendly definition, and the Dwarf spec + forbids spaces in the argument list. */ + *buffer++ = ','; + else if (macro->variadic) + *buffer++ = '.', *buffer++ = '.', *buffer++ = '.'; + } + *buffer++ = ')'; + } + + /* The Dwarf spec requires a space after the macro name, even if the + definition is the empty string. */ + *buffer++ = ' '; + + if (CPP_OPTION (pfile, traditional)) + buffer = _cpp_copy_replacement_text (macro, buffer); + else if (macro->count) + /* Expansion tokens. */ + { + for (i = 0; i < macro->count; i++) + { + cpp_token *token = ¯o->exp.tokens[i]; + + if (token->flags & PREV_WHITE) + *buffer++ = ' '; + if (token->flags & STRINGIFY_ARG) + *buffer++ = '#'; + + if (token->type == CPP_MACRO_ARG) + { + memcpy (buffer, + NODE_NAME (macro->params[token->val.arg_no - 1]), + NODE_LEN (macro->params[token->val.arg_no - 1])); + buffer += NODE_LEN (macro->params[token->val.arg_no - 1]); + } + else + buffer = cpp_spell_token (pfile, token, buffer, false); + + if (token->flags & PASTE_LEFT) + { + *buffer++ = ' '; + *buffer++ = '#'; + *buffer++ = '#'; + /* Next has PREV_WHITE; see _cpp_create_definition. */ + } + } + } + + *buffer = '\0'; + return pfile->macro_buffer; +} diff --git a/support/cpp/libcpp/mkdeps.c b/support/cpp/libcpp/mkdeps.c new file mode 100644 index 0000000..d4c838e --- /dev/null +++ b/support/cpp/libcpp/mkdeps.c @@ -0,0 +1,435 @@ +/* Dependency generator for Makefile fragments. + Copyright (C) 2000, 2001, 2003, 2007 Free Software Foundation, Inc. + Contributed by Zack Weinberg, Mar 2000 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! */ + +#include "config.h" +#include "system.h" +#include "mkdeps.h" +#include "internal.h" + +/* Keep this structure local to this file, so clients don't find it + easy to start making assumptions. */ +struct deps +{ + const char **targetv; + unsigned int ntargets; /* number of slots actually occupied */ + unsigned int targets_size; /* amt of allocated space - in words */ + + const char **depv; + unsigned int ndeps; + unsigned int deps_size; + + const char **vpathv; + size_t *vpathlv; + unsigned int nvpaths; + unsigned int vpaths_size; +}; + +static const char *munge (const char *); + +/* Given a filename, quote characters in that filename which are + significant to Make. Note that it's not possible to quote all such + characters - e.g. \n, %, *, ?, [, \ (in some contexts), and ~ are + not properly handled. It isn't possible to get this right in any + current version of Make. (??? Still true? Old comment referred to + 3.76.1.) */ + +static const char * +munge (const char *filename) +{ + int len; + const char *p, *q; + char *dst, *buffer; + + for (p = filename, len = 0; *p; p++, len++) + { + switch (*p) + { + case ' ': + case '\t': + /* GNU make uses a weird quoting scheme for white space. + A space or tab preceded by 2N+1 backslashes represents + N backslashes followed by space; a space or tab + preceded by 2N backslashes represents N backslashes at + the end of a file name; and backslashes in other + contexts should not be doubled. */ + for (q = p - 1; filename <= q && *q == '\\'; q--) + len++; + len++; + break; + + case '$': + /* '$' is quoted by doubling it. */ + len++; + break; + } + } + + /* Now we know how big to make the buffer. */ + buffer = XNEWVEC (char, len + 1); + + for (p = filename, dst = buffer; *p; p++, dst++) + { + switch (*p) + { + case ' ': + case '\t': + for (q = p - 1; filename <= q && *q == '\\'; q--) + *dst++ = '\\'; + *dst++ = '\\'; + break; + + case '$': + *dst++ = '$'; + break; + + default: + /* nothing */; + } + *dst = *p; + } + + *dst = '\0'; + return buffer; +} + +/* If T begins with any of the partial pathnames listed in d->vpathv, + then advance T to point beyond that pathname. */ +static const char * +apply_vpath (struct deps *d, const char *t) +{ + if (d->vpathv) + { + unsigned int i; + for (i = 0; i < d->nvpaths; i++) + { + if (!strncmp (d->vpathv[i], t, d->vpathlv[i])) + { + const char *p = t + d->vpathlv[i]; + if (!IS_DIR_SEPARATOR (*p)) + goto not_this_one; + + /* Do not simplify $(vpath)/../whatever. ??? Might not + be necessary. */ + if (p[1] == '.' && p[2] == '.' && IS_DIR_SEPARATOR (p[3])) + goto not_this_one; + + /* found a match */ + t = t + d->vpathlv[i] + 1; + break; + } + not_this_one:; + } + } + + /* Remove leading ./ in any case. */ + while (t[0] == '.' && IS_DIR_SEPARATOR (t[1])) + { + t += 2; + /* If we removed a leading ./, then also remove any /s after the + first. */ + while (IS_DIR_SEPARATOR (t[0])) + ++t; + } + + return t; +} + +/* Public routines. */ + +struct deps * +deps_init (void) +{ + return XCNEW (struct deps); +} + +void +deps_free (struct deps *d) +{ + unsigned int i; + + if (d->targetv) + { + for (i = 0; i < d->ntargets; i++) + free ((void *) d->targetv[i]); + free (d->targetv); + } + + if (d->depv) + { + for (i = 0; i < d->ndeps; i++) + free ((void *) d->depv[i]); + free (d->depv); + } + + if (d->vpathv) + { + for (i = 0; i < d->nvpaths; i++) + free ((void *) d->vpathv[i]); + free (d->vpathv); + free (d->vpathlv); + } + + free (d); +} + +/* Adds a target T. We make a copy, so it need not be a permanent + string. QUOTE is true if the string should be quoted. */ +void +deps_add_target (struct deps *d, const char *t, int quote) +{ + if (d->ntargets == d->targets_size) + { + d->targets_size = d->targets_size * 2 + 4; + d->targetv = XRESIZEVEC (const char *, d->targetv, d->targets_size); + } + + t = apply_vpath (d, t); + if (quote) + t = munge (t); /* Also makes permanent copy. */ + else + t = xstrdup (t); + + d->targetv[d->ntargets++] = t; +} + +/* Sets the default target if none has been given already. An empty + string as the default target in interpreted as stdin. The string + is quoted for MAKE. */ +void +deps_add_default_target (cpp_reader *pfile, const char *tgt) +{ + struct deps *d = pfile->deps; + + /* Only if we have no targets. */ + if (d->ntargets) + return; + + if (tgt[0] == '\0') + deps_add_target (d, "-", 1); + else + { +#ifndef TARGET_OBJECT_SUFFIX +# define TARGET_OBJECT_SUFFIX ".o" +#endif + const char *start = lbasename (tgt); + char *o; + char *suffix; + const char *obj_ext; + + if (NULL == CPP_OPTION (pfile, obj_ext)) + obj_ext = TARGET_OBJECT_SUFFIX; + else if (CPP_OPTION (pfile, obj_ext)[0] != '.') + { + char *t = alloca (strlen (CPP_OPTION (pfile, obj_ext)) + 2); + t[0] = '.'; + strcpy (&t[1], CPP_OPTION (pfile, obj_ext)); + obj_ext = t; + } + else + obj_ext = CPP_OPTION (pfile, obj_ext); + + o = (char *) alloca (strlen (start) + strlen (obj_ext) + 1); + + strcpy (o, start); + + suffix = strrchr (o, '.'); + if (!suffix) + suffix = o + strlen (o); + strcpy (suffix, obj_ext); + + deps_add_target (d, o, 1); + } +} + +void +deps_add_dep (struct deps *d, const char *t) +{ + t = munge (apply_vpath (d, t)); /* Also makes permanent copy. */ + + if (d->ndeps == d->deps_size) + { + d->deps_size = d->deps_size * 2 + 8; + d->depv = XRESIZEVEC (const char *, d->depv, d->deps_size); + } + d->depv[d->ndeps++] = t; +} + +void +deps_add_vpath (struct deps *d, const char *vpath) +{ + const char *elem, *p; + char *copy; + size_t len; + + for (elem = vpath; *elem; elem = p) + { + for (p = elem; *p && *p != ':'; p++); + len = p - elem; + copy = XNEWVEC (char, len + 1); + memcpy (copy, elem, len); + copy[len] = '\0'; + if (*p == ':') + p++; + + if (d->nvpaths == d->vpaths_size) + { + d->vpaths_size = d->vpaths_size * 2 + 8; + d->vpathv = XRESIZEVEC (const char *, d->vpathv, d->vpaths_size); + d->vpathlv = XRESIZEVEC (size_t, d->vpathlv, d->vpaths_size); + } + d->vpathv[d->nvpaths] = copy; + d->vpathlv[d->nvpaths] = len; + d->nvpaths++; + } +} + +void +deps_write (const struct deps *d, FILE *fp, unsigned int colmax) +{ + unsigned int size, i, column; + + column = 0; + if (colmax && colmax < 34) + colmax = 34; + + for (i = 0; i < d->ntargets; i++) + { + size = strlen (d->targetv[i]); + column += size; + if (colmax && column > colmax) + { + fputs (" \\\n ", fp); + column = 1 + size; + } + if (i) + { + putc (' ', fp); + column++; + } + fputs (d->targetv[i], fp); + } + + putc (':', fp); + putc (' ', fp); + column += 2; + + for (i = 0; i < d->ndeps; i++) + { + size = strlen (d->depv[i]); + column += size; + if (colmax && column > colmax) + { + fputs (" \\\n ", fp); + column = 1 + size; + } + if (i) + { + putc (' ', fp); + column++; + } + fputs (d->depv[i], fp); + } + putc ('\n', fp); +} + +void +deps_phony_targets (const struct deps *d, FILE *fp) +{ + unsigned int i; + + for (i = 1; i < d->ndeps; i++) + { + putc ('\n', fp); + fputs (d->depv[i], fp); + putc (':', fp); + putc ('\n', fp); + } +} + +/* Write out a deps buffer to a file, in a form that can be read back + with deps_restore. Returns nonzero on error, in which case the + error number will be in errno. */ + +int +deps_save (struct deps *deps, FILE *f) +{ + unsigned int i; + + /* The cppreader structure contains makefile dependences. Write out this + structure. */ + + /* The number of dependences. */ + if (fwrite (&deps->ndeps, sizeof (deps->ndeps), 1, f) != 1) + return -1; + /* The length of each dependence followed by the string. */ + for (i = 0; i < deps->ndeps; i++) + { + size_t num_to_write = strlen (deps->depv[i]); + if (fwrite (&num_to_write, sizeof (size_t), 1, f) != 1) + return -1; + if (fwrite (deps->depv[i], num_to_write, 1, f) != 1) + return -1; + } + + return 0; +} + +/* Read back dependency information written with deps_save into + the deps buffer. The third argument may be NULL, in which case + the dependency information is just skipped, or it may be a filename, + in which case that filename is skipped. */ + +int +deps_restore (struct deps *deps, FILE *fd, const char *self) +{ + unsigned int i, count; + size_t num_to_read; + size_t buf_size = 512; + char *buf = XNEWVEC (char, buf_size); + + /* Number of dependences. */ + if (fread (&count, 1, sizeof (count), fd) != sizeof (count)) + return -1; + + /* The length of each dependence string, followed by the string. */ + for (i = 0; i < count; i++) + { + /* Read in # bytes in string. */ + if (fread (&num_to_read, 1, sizeof (size_t), fd) != sizeof (size_t)) + return -1; + if (buf_size < num_to_read + 1) + { + buf_size = num_to_read + 1 + 127; + buf = XRESIZEVEC (char, buf, buf_size); + } + if (fread (buf, 1, num_to_read, fd) != num_to_read) + return -1; + buf[num_to_read] = '\0'; + + /* Generate makefile dependencies from .pch if -nopch-deps. */ + if (self != NULL && strcmp (buf, self) != 0) + deps_add_dep (deps, buf); + } + + free (buf); + return 0; +} diff --git a/support/cpp/libcpp/symtab.c b/support/cpp/libcpp/symtab.c new file mode 100644 index 0000000..ffa28f5 --- /dev/null +++ b/support/cpp/libcpp/symtab.c @@ -0,0 +1,335 @@ +/* Hash tables. + Copyright (C) 2000, 2001, 2003, 2004 Free Software Foundation, Inc. + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! */ + +#include "config.h" +#include "system.h" +#include "symtab.h" + +/* The code below is a specialization of Vladimir Makarov's expandable + hash tables (see libiberty/hashtab.c). The abstraction penalty was + too high to continue using the generic form. This code knows + intrinsically how to calculate a hash value, and how to compare an + existing entry with a potential new one. Also, the ability to + delete members from the table has been removed. */ + +static unsigned int calc_hash (const unsigned char *, size_t); +static void ht_expand (hash_table *); +static double approx_sqrt (double); + +/* Calculate the hash of the string STR of length LEN. */ + +static unsigned int +calc_hash (const unsigned char *str, size_t len) +{ + size_t n = len; + unsigned int r = 0; + + while (n--) + r = HT_HASHSTEP (r, *str++); + + return HT_HASHFINISH (r, len); +} + +/* Initialize an identifier hashtable. */ + +hash_table * +ht_create (unsigned int order) +{ + unsigned int nslots = 1 << order; + hash_table *table; + + table = XCNEW (hash_table); + + /* Strings need no alignment. */ + _obstack_begin (&table->stack, 0, 0, + (void *(*) (long)) xmalloc, + (void (*) (void *)) free); + + obstack_alignment_mask (&table->stack) = 0; + + table->entries = XCNEWVEC (hashnode, nslots); + table->entries_owned = true; + table->nslots = nslots; + return table; +} + +/* Frees all memory associated with a hash table. */ + +void +ht_destroy (hash_table *table) +{ + obstack_free (&table->stack, NULL); + if (table->entries_owned) + free (table->entries); + free (table); +} + +/* Returns the hash entry for the a STR of length LEN. If that string + already exists in the table, returns the existing entry, and, if + INSERT is CPP_ALLOCED, frees the last obstack object. If the + identifier hasn't been seen before, and INSERT is CPP_NO_INSERT, + returns NULL. Otherwise insert and returns a new entry. A new + string is alloced if INSERT is CPP_ALLOC, otherwise INSERT is + CPP_ALLOCED and the item is assumed to be at the top of the + obstack. */ +hashnode +ht_lookup (hash_table *table, const unsigned char *str, size_t len, + enum ht_lookup_option insert) +{ + return ht_lookup_with_hash (table, str, len, calc_hash (str, len), + insert); +} + +hashnode +ht_lookup_with_hash (hash_table *table, const unsigned char *str, + size_t len, unsigned int hash, + enum ht_lookup_option insert) +{ + unsigned int hash2; + unsigned int index; + size_t sizemask; + hashnode node; + + sizemask = table->nslots - 1; + index = hash & sizemask; + table->searches++; + + node = table->entries[index]; + + if (node != NULL) + { + if (node->hash_value == hash + && HT_LEN (node) == (unsigned int) len + && !memcmp (HT_STR (node), str, len)) + { + if (insert == HT_ALLOCED) + /* The string we search for was placed at the end of the + obstack. Release it. */ + obstack_free (&table->stack, (void *) str); + return node; + } + + /* hash2 must be odd, so we're guaranteed to visit every possible + location in the table during rehashing. */ + hash2 = ((hash * 17) & sizemask) | 1; + + for (;;) + { + table->collisions++; + index = (index + hash2) & sizemask; + node = table->entries[index]; + if (node == NULL) + break; + + if (node->hash_value == hash + && HT_LEN (node) == (unsigned int) len + && !memcmp (HT_STR (node), str, len)) + { + if (insert == HT_ALLOCED) + /* The string we search for was placed at the end of the + obstack. Release it. */ + obstack_free (&table->stack, (void *) str); + return node; + } + } + } + + if (insert == HT_NO_INSERT) + return NULL; + + node = (*table->alloc_node) (table); + table->entries[index] = node; + + HT_LEN (node) = (unsigned int) len; + node->hash_value = hash; + if (insert == HT_ALLOC) + HT_STR (node) = (const unsigned char *) obstack_copy0 (&table->stack, + str, len); + else + HT_STR (node) = str; + + if (++table->nelements * 4 >= table->nslots * 3) + /* Must expand the string table. */ + ht_expand (table); + + return node; +} + +/* Double the size of a hash table, re-hashing existing entries. */ + +static void +ht_expand (hash_table *table) +{ + hashnode *nentries, *p, *limit; + unsigned int size, sizemask; + + size = table->nslots * 2; + nentries = XCNEWVEC (hashnode, size); + sizemask = size - 1; + + p = table->entries; + limit = p + table->nslots; + do + if (*p) + { + unsigned int index, hash, hash2; + + hash = (*p)->hash_value; + index = hash & sizemask; + + if (nentries[index]) + { + hash2 = ((hash * 17) & sizemask) | 1; + do + { + index = (index + hash2) & sizemask; + } + while (nentries[index]); + } + nentries[index] = *p; + } + while (++p < limit); + + if (table->entries_owned) + free (table->entries); + table->entries_owned = true; + table->entries = nentries; + table->nslots = size; +} + +/* For all nodes in TABLE, callback CB with parameters TABLE->PFILE, + the node, and V. */ +void +ht_forall (hash_table *table, ht_cb cb, const void *v) +{ + hashnode *p, *limit; + + p = table->entries; + limit = p + table->nslots; + do + if (*p) + { + if ((*cb) (table->pfile, *p, v) == 0) + break; + } + while (++p < limit); +} + +/* Restore the hash table. */ +void +ht_load (hash_table *ht, hashnode *entries, + unsigned int nslots, unsigned int nelements, + bool own) +{ + if (ht->entries_owned) + free (ht->entries); + ht->entries = entries; + ht->nslots = nslots; + ht->nelements = nelements; + ht->entries_owned = own; +} + +/* Dump allocation statistics to stderr. */ + +void +ht_dump_statistics (hash_table *table) +{ + size_t nelts, nids, overhead, headers; + size_t total_bytes, longest; + double sum_of_squares, exp_len, exp_len2, exp2_len; + hashnode *p, *limit; + +#define SCALE(x) ((unsigned long) ((x) < 1024*10 \ + ? (x) \ + : ((x) < 1024*1024*10 \ + ? (x) / 1024 \ + : (x) / (1024*1024)))) +#define LABEL(x) ((x) < 1024*10 ? ' ' : ((x) < 1024*1024*10 ? 'k' : 'M')) + + total_bytes = longest = sum_of_squares = nids = 0; + p = table->entries; + limit = p + table->nslots; + do + if (*p) + { + size_t n = HT_LEN (*p); + + total_bytes += n; + sum_of_squares += (double) n * n; + if (n > longest) + longest = n; + nids++; + } + while (++p < limit); + + nelts = table->nelements; + overhead = obstack_memory_used (&table->stack) - total_bytes; + headers = table->nslots * sizeof (hashnode); + + fprintf (stderr, "\nString pool\nentries\t\t%lu\n", + (unsigned long) nelts); + fprintf (stderr, "identifiers\t%lu (%.2f%%)\n", + (unsigned long) nids, nids * 100.0 / nelts); + fprintf (stderr, "slots\t\t%lu\n", + (unsigned long) table->nslots); + fprintf (stderr, "bytes\t\t%lu%c (%lu%c overhead)\n", + SCALE (total_bytes), LABEL (total_bytes), + SCALE (overhead), LABEL (overhead)); + fprintf (stderr, "table size\t%lu%c\n", + SCALE (headers), LABEL (headers)); + + exp_len = (double)total_bytes / (double)nelts; + exp2_len = exp_len * exp_len; + exp_len2 = (double) sum_of_squares / (double) nelts; + + fprintf (stderr, "coll/search\t%.4f\n", + (double) table->collisions / (double) table->searches); + fprintf (stderr, "ins/search\t%.4f\n", + (double) nelts / (double) table->searches); + fprintf (stderr, "avg. entry\t%.2f bytes (+/- %.2f)\n", + exp_len, approx_sqrt (exp_len2 - exp2_len)); + fprintf (stderr, "longest entry\t%lu\n", + (unsigned long) longest); +#undef SCALE +#undef LABEL +} + +/* Return the approximate positive square root of a number N. This is for + statistical reports, not code generation. */ +static double +approx_sqrt (double x) +{ + double s, d; + + if (x < 0) + abort (); + if (x == 0) + return 0; + + s = x; + do + { + d = (s * s - x) / (2 * s); + s -= d; + } + while (d > .0001); + return s; +} diff --git a/support/cpp/libcpp/system.h b/support/cpp/libcpp/system.h new file mode 100644 index 0000000..1691b34 --- /dev/null +++ b/support/cpp/libcpp/system.h @@ -0,0 +1,437 @@ +/* Get common system includes and various definitions and declarations based + on autoconf macros. + Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004 + Free Software Foundation, Inc. + +This file is part of libcpp (aka cpplib). + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA +02110-1301, USA. */ + + +#ifndef LIBCPP_SYSTEM_H +#define LIBCPP_SYSTEM_H + +/* We must include stdarg.h before stdio.h. */ +#include + +#ifdef HAVE_STDDEF_H +# include +#endif + +#include + +/* Define a generic NULL if one hasn't already been defined. */ +#ifndef NULL +#define NULL 0 +#endif + +/* Use the unlocked open routines from libiberty. */ +#define fopen(PATH,MODE) fopen_unlocked(PATH,MODE) +#define fdopen(FILDES,MODE) fdopen_unlocked(FILDES,MODE) +#define freopen(PATH,MODE,STREAM) freopen_unlocked(PATH,MODE,STREAM) + +/* The compiler is not a multi-threaded application and therefore we + do not have to use the locking functions. In fact, using the locking + functions can cause the compiler to be significantly slower under + I/O bound conditions (such as -g -O0 on very large source files). + + HAVE_DECL_PUTC_UNLOCKED actually indicates whether or not the stdio + code is multi-thread safe by default. If it is set to 0, then do + not worry about using the _unlocked functions. + + fputs_unlocked, fwrite_unlocked, and fprintf_unlocked are + extensions and need to be prototyped by hand (since we do not + define _GNU_SOURCE). */ + +#if defined HAVE_DECL_PUTC_UNLOCKED && HAVE_DECL_PUTC_UNLOCKED + +# ifdef HAVE_PUTC_UNLOCKED +# undef putc +# define putc(C, Stream) putc_unlocked (C, Stream) +# endif +# ifdef HAVE_PUTCHAR_UNLOCKED +# undef putchar +# define putchar(C) putchar_unlocked (C) +# endif +# ifdef HAVE_GETC_UNLOCKED +# undef getc +# define getc(Stream) getc_unlocked (Stream) +# endif +# ifdef HAVE_GETCHAR_UNLOCKED +# undef getchar +# define getchar() getchar_unlocked () +# endif +# ifdef HAVE_FPUTC_UNLOCKED +# undef fputc +# define fputc(C, Stream) fputc_unlocked (C, Stream) +# endif + +# ifdef HAVE_CLEARERR_UNLOCKED +# undef clearerr +# define clearerr(Stream) clearerr_unlocked (Stream) +# if defined (HAVE_DECL_CLEARERR_UNLOCKED) && !HAVE_DECL_CLEARERR_UNLOCKED +extern void clearerr_unlocked (FILE *); +# endif +# endif +# ifdef HAVE_FEOF_UNLOCKED +# undef feof +# define feof(Stream) feof_unlocked (Stream) +# if defined (HAVE_DECL_FEOF_UNLOCKED) && !HAVE_DECL_FEOF_UNLOCKED +extern int feof_unlocked (FILE *); +# endif +# endif +# ifdef HAVE_FILENO_UNLOCKED +# undef fileno +# define fileno(Stream) fileno_unlocked (Stream) +# if defined (HAVE_DECL_FILENO_UNLOCKED) && !HAVE_DECL_FILENO_UNLOCKED +extern int fileno_unlocked (FILE *); +# endif +# endif +# ifdef HAVE_FFLUSH_UNLOCKED +# undef fflush +# define fflush(Stream) fflush_unlocked (Stream) +# if defined (HAVE_DECL_FFLUSH_UNLOCKED) && !HAVE_DECL_FFLUSH_UNLOCKED +extern int fflush_unlocked (FILE *); +# endif +# endif +# ifdef HAVE_FGETC_UNLOCKED +# undef fgetc +# define fgetc(Stream) fgetc_unlocked (Stream) +# if defined (HAVE_DECL_FGETC_UNLOCKED) && !HAVE_DECL_FGETC_UNLOCKED +extern int fgetc_unlocked (FILE *); +# endif +# endif +# ifdef HAVE_FGETS_UNLOCKED +# undef fgets +# define fgets(S, n, Stream) fgets_unlocked (S, n, Stream) +# if defined (HAVE_DECL_FGETS_UNLOCKED) && !HAVE_DECL_FGETS_UNLOCKED +extern char *fgets_unlocked (char *, int, FILE *); +# endif +# endif +# ifdef HAVE_FPUTS_UNLOCKED +# undef fputs +# define fputs(String, Stream) fputs_unlocked (String, Stream) +# if defined (HAVE_DECL_FPUTS_UNLOCKED) && !HAVE_DECL_FPUTS_UNLOCKED +extern int fputs_unlocked (const char *, FILE *); +# endif +# endif +# ifdef HAVE_FERROR_UNLOCKED +# undef ferror +# define ferror(Stream) ferror_unlocked (Stream) +# if defined (HAVE_DECL_FERROR_UNLOCKED) && !HAVE_DECL_FERROR_UNLOCKED +extern int ferror_unlocked (FILE *); +# endif +# endif +# ifdef HAVE_FREAD_UNLOCKED +# undef fread +# define fread(Ptr, Size, N, Stream) fread_unlocked (Ptr, Size, N, Stream) +# if defined (HAVE_DECL_FREAD_UNLOCKED) && !HAVE_DECL_FREAD_UNLOCKED +extern size_t fread_unlocked (void *, size_t, size_t, FILE *); +# endif +# endif +# ifdef HAVE_FWRITE_UNLOCKED +# undef fwrite +# define fwrite(Ptr, Size, N, Stream) fwrite_unlocked (Ptr, Size, N, Stream) +# if defined (HAVE_DECL_FWRITE_UNLOCKED) && !HAVE_DECL_FWRITE_UNLOCKED +extern size_t fwrite_unlocked (const void *, size_t, size_t, FILE *); +# endif +# endif +# ifdef HAVE_FPRINTF_UNLOCKED +# undef fprintf +/* We can't use a function-like macro here because we don't know if + we have varargs macros. */ +# define fprintf fprintf_unlocked +# if defined (HAVE_DECL_FPRINTF_UNLOCKED) && !HAVE_DECL_FPRINTF_UNLOCKED +extern int fprintf_unlocked (FILE *, const char *, ...); +# endif +# endif + +#endif + +/* ??? Glibc's fwrite/fread_unlocked macros cause + "warning: signed and unsigned type in conditional expression". */ +#undef fread_unlocked +#undef fwrite_unlocked + +#include +#include + +#if !defined (errno) && defined (HAVE_DECL_ERRNO) && !HAVE_DECL_ERRNO +extern int errno; +#endif + +/* Some of glibc's string inlines cause warnings. Plus we'd rather + rely on (and therefore test) GCC's string builtins. */ +#define __NO_STRING_INLINES + +#ifdef STRING_WITH_STRINGS +# include +# include +#else +# ifdef HAVE_STRING_H +# include +# else +# ifdef HAVE_STRINGS_H +# include +# endif +# endif +#endif + +#ifdef HAVE_STDLIB_H +# include +#endif + +#ifdef HAVE_UNISTD_H +# include +#endif + +#if HAVE_LIMITS_H +# include +#endif + +/* Infrastructure for defining missing _MAX and _MIN macros. Note that + macros defined with these cannot be used in #if. */ + +/* The extra casts work around common compiler bugs. */ +#define INTTYPE_SIGNED(t) (! ((t) 0 < (t) -1)) +/* The outer cast is needed to work around a bug in Cray C 5.0.3.0. + It is necessary at least when t == time_t. */ +#define INTTYPE_MINIMUM(t) ((t) (INTTYPE_SIGNED (t) \ + ? ~ (t) 0 << (sizeof(t) * CHAR_BIT - 1) : (t) 0)) +#define INTTYPE_MAXIMUM(t) ((t) (~ (t) 0 - INTTYPE_MINIMUM (t))) + +/* Use that infrastructure to provide a few constants. */ +#ifndef UCHAR_MAX +# define UCHAR_MAX INTTYPE_MAXIMUM (unsigned char) +#endif + +#ifdef TIME_WITH_SYS_TIME +# include +# include +#else +# if HAVE_SYS_TIME_H +# include +# else +# ifdef HAVE_TIME_H +# include +# endif +# endif +#endif + +#ifdef HAVE_FCNTL_H +# include +#else +# ifdef HAVE_SYS_FILE_H +# include +# endif +#endif + +#ifdef HAVE_LOCALE_H +# include +#endif + +#ifdef HAVE_LANGINFO_CODESET +# include +#endif + +#ifndef HAVE_SETLOCALE +# define setlocale(category, locale) (locale) +#endif + +#ifdef ENABLE_NLS +#include +#else +/* Stubs. */ +# undef dgettext +# define dgettext(package, msgid) (msgid) +#endif + +#ifndef _ +# define _(msgid) dgettext (PACKAGE, msgid) +#endif + +#ifndef N_ +# define N_(msgid) msgid +#endif + +/* Some systems define these in, e.g., param.h. We undefine these names + here to avoid the warnings. We prefer to use our definitions since we + know they are correct. */ + +#undef MIN +#undef MAX +#define MIN(X,Y) ((X) < (Y) ? (X) : (Y)) +#define MAX(X,Y) ((X) > (Y) ? (X) : (Y)) + +/* The HAVE_DECL_* macros are three-state, undefined, 0 or 1. If they + are defined to 0 then we must provide the relevant declaration + here. These checks will be in the undefined state while configure + is running so be careful to test "defined (HAVE_DECL_*)". */ + +#if defined (HAVE_DECL_ABORT) && !HAVE_DECL_ABORT +extern void abort (void); +#endif + +#if HAVE_SYS_STAT_H +# include +#endif + +/* Test if something is a normal file. */ +#ifndef S_ISREG +#define S_ISREG(m) (((m) & S_IFMT) == S_IFREG) +#endif + +/* Test if something is a directory. */ +#ifndef S_ISDIR +#define S_ISDIR(m) (((m) & S_IFMT) == S_IFDIR) +#endif + +/* Test if something is a character special file. */ +#ifndef S_ISCHR +#define S_ISCHR(m) (((m) & S_IFMT) == S_IFCHR) +#endif + +/* Test if something is a block special file. */ +#ifndef S_ISBLK +#define S_ISBLK(m) (((m) & S_IFMT) == S_IFBLK) +#endif + +/* Test if something is a socket. */ +#ifndef S_ISSOCK +# ifdef S_IFSOCK +# define S_ISSOCK(m) (((m) & S_IFMT) == S_IFSOCK) +# else +# define S_ISSOCK(m) 0 +# endif +#endif + +/* Test if something is a FIFO. */ +#ifndef S_ISFIFO +# ifdef S_IFIFO +# define S_ISFIFO(m) (((m) & S_IFMT) == S_IFIFO) +# else +# define S_ISFIFO(m) 0 +# endif +#endif + +/* Approximate O_NOCTTY and O_BINARY. */ +#ifndef O_NOCTTY +#define O_NOCTTY 0 +#endif +#ifndef O_BINARY +# define O_BINARY 0 +#endif + +/* Filename handling macros. */ +#include "filenames.h" + +/* Get libiberty declarations. */ +#include "libiberty.h" +#if defined(__APPLE__) && defined(__MACH__) +#include +#else +#include +#endif + +/* 1 if we have C99 designated initializers. + + ??? C99 designated initializers are not supported by most C++ + compilers, including G++. -- gdr, 2005-05-18 */ +#if !defined(HAVE_DESIGNATED_INITIALIZERS) +#if defined(__APPLE__) && (__MACH__) +#define HAVE_DESIGNATED_INITIALIZERS 0 +#else +#define HAVE_DESIGNATED_INITIALIZERS \ + ((!defined(__cplusplus) && (GCC_VERSION >= 2007)) \ + || (__STDC_VERSION__ >= 199901L)) +#endif +#endif + +/* Be conservative and only use enum bitfields with GCC. + FIXME: provide a complete autoconf test for buggy enum bitfields. */ + +#if (GCC_VERSION > 2000) +#define ENUM_BITFIELD(TYPE) __extension__ enum TYPE +#else +#define ENUM_BITFIELD(TYPE) unsigned int +#endif + +#ifndef offsetof +#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *) 0)->MEMBER) +#endif + +/* __builtin_expect(A, B) evaluates to A, but notifies the compiler that + the most likely value of A is B. This feature was added at some point + between 2.95 and 3.0. Let's use 3.0 as the lower bound for now. */ +#if (GCC_VERSION < 3000) +#define __builtin_expect(a, b) (a) +#endif + +/* Provide a fake boolean type. We make no attempt to use the + C99 _Bool, as it may not be available in the bootstrap compiler, + and even if it is, it is liable to be buggy. + This must be after all inclusion of system headers, as some of + them will mess us up. */ +#undef bool +#undef true +#undef false +#undef TRUE +#undef FALSE + +#ifndef __cplusplus +#define bool unsigned char +#endif +#define true 1 +#define false 0 + +/* Some compilers do not allow the use of unsigned char in bitfields. */ +#define BOOL_BITFIELD unsigned int + +/* Poison identifiers we do not want to use. */ +#if (GCC_VERSION >= 3000) +#undef calloc +#undef strdup +#undef malloc +#undef realloc + #pragma GCC poison calloc strdup + #pragma GCC poison malloc realloc + +/* Libiberty macros that are no longer used in GCC. */ +#undef ANSI_PROTOTYPES +#undef PTR_CONST +#undef LONG_DOUBLE +#undef VPARAMS +#undef VA_OPEN +#undef VA_FIXEDARG +#undef VA_CLOSE +#undef VA_START + #pragma GCC poison ANSI_PROTOTYPES PTR_CONST LONG_DOUBLE VPARAMS VA_OPEN \ + VA_FIXEDARG VA_CLOSE VA_START + +/* Note: not all uses of the `index' token (e.g. variable names and + structure members) have been eliminated. */ +#undef bcopy +#undef bzero +#undef bcmp +#undef rindex + #pragma GCC poison bcopy bzero bcmp rindex + +#endif /* GCC >= 3.0 */ + +/* SDCC specific */ +#include "sdcpp.h" + +#endif /* ! LIBCPP_SYSTEM_H */ diff --git a/support/cpp/libcpp/traditional.c b/support/cpp/libcpp/traditional.c new file mode 100644 index 0000000..6a9e695 --- /dev/null +++ b/support/cpp/libcpp/traditional.c @@ -0,0 +1,1169 @@ +/* CPP Library - traditional lexical analysis and macro expansion. + Copyright (C) 2002, 2004, 2005, 2007, 2008 Free Software Foundation, Inc. + Contributed by Neil Booth, May 2002 + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ + +#include "config.h" +#include "system.h" +#include "cpplib.h" +#include "internal.h" + +/* The replacement text of a function-like macro is stored as a + contiguous sequence of aligned blocks, each representing the text + between subsequent parameters. + + Each block comprises the text between its surrounding parameters, + the length of that text, and the one-based index of the following + parameter. The final block in the replacement text is easily + recognizable as it has an argument index of zero. */ + +struct block +{ + unsigned int text_len; + unsigned short arg_index; + uchar text[1]; +}; + +#define BLOCK_HEADER_LEN offsetof (struct block, text) +#define BLOCK_LEN(TEXT_LEN) CPP_ALIGN (BLOCK_HEADER_LEN + (TEXT_LEN)) + +/* Structure holding information about a function-like macro + invocation. */ +struct fun_macro +{ + /* Memory buffer holding the trad_arg array. */ + _cpp_buff *buff; + + /* An array of size the number of macro parameters + 1, containing + the offsets of the start of each macro argument in the output + buffer. The argument continues until the character before the + start of the next one. */ + size_t *args; + + /* The hashnode of the macro. */ + cpp_hashnode *node; + + /* The offset of the macro name in the output buffer. */ + size_t offset; + + /* The line the macro name appeared on. */ + unsigned int line; + + /* Zero-based index of argument being currently lexed. */ + unsigned int argc; +}; + +/* Lexing state. It is mostly used to prevent macro expansion. */ +enum ls {ls_none = 0, /* Normal state. */ + ls_fun_open, /* When looking for '('. */ + ls_fun_close, /* When looking for ')'. */ + ls_defined, /* After defined. */ + ls_defined_close, /* Looking for ')' of defined(). */ + ls_hash, /* After # in preprocessor conditional. */ + ls_predicate, /* After the predicate, maybe paren? */ + ls_answer}; /* In answer to predicate. */ + +/* Lexing TODO: Maybe handle space in escaped newlines. Stop lex.c + from recognizing comments and directives during its lexing pass. */ + +static const uchar *skip_whitespace (cpp_reader *, const uchar *, int); +static cpp_hashnode *lex_identifier (cpp_reader *, const uchar *); +static const uchar *copy_comment (cpp_reader *, const uchar *, int); +static void check_output_buffer (cpp_reader *, size_t); +static void push_replacement_text (cpp_reader *, cpp_hashnode *); +static bool scan_parameters (cpp_reader *, cpp_macro *); +static bool recursive_macro (cpp_reader *, cpp_hashnode *); +static void save_replacement_text (cpp_reader *, cpp_macro *, unsigned int); +static void maybe_start_funlike (cpp_reader *, cpp_hashnode *, const uchar *, + struct fun_macro *); +static void save_argument (struct fun_macro *, size_t); +static void replace_args_and_push (cpp_reader *, struct fun_macro *); +static size_t canonicalize_text (uchar *, const uchar *, size_t, uchar *); + +/* Ensures we have N bytes' space in the output buffer, and + reallocates it if not. */ +static void +check_output_buffer (cpp_reader *pfile, size_t n) +{ + /* We might need two bytes to terminate an unterminated comment, and + one more to terminate the line with a NUL. */ + n += 2 + 1; + + if (n > (size_t) (pfile->out.limit - pfile->out.cur)) + { + size_t size = pfile->out.cur - pfile->out.base; + size_t new_size = (size + n) * 3 / 2; + + pfile->out.base = XRESIZEVEC (unsigned char, pfile->out.base, new_size); + pfile->out.limit = pfile->out.base + new_size; + pfile->out.cur = pfile->out.base + size; + } +} + +/* Skip a C-style block comment in a macro as a result of -CC. + Buffer->cur points to the initial asterisk of the comment. */ +static void +skip_macro_block_comment (cpp_reader *pfile) +{ + const uchar *cur = pfile->buffer->cur; + + cur++; + if (*cur == '/') + cur++; + + /* People like decorating comments with '*', so check for '/' + instead for efficiency. */ + while(! (*cur++ == '/' && cur[-2] == '*') ) + ; + + pfile->buffer->cur = cur; +} + +/* CUR points to the asterisk introducing a comment in the current + context. IN_DEFINE is true if we are in the replacement text of a + macro. + + The asterisk and following comment is copied to the buffer pointed + to by pfile->out.cur, which must be of sufficient size. + Unterminated comments are diagnosed, and correctly terminated in + the output. pfile->out.cur is updated depending upon IN_DEFINE, + -C, -CC and pfile->state.in_directive. + + Returns a pointer to the first character after the comment in the + input buffer. */ +static const uchar * +copy_comment (cpp_reader *pfile, const uchar *cur, int in_define) +{ + bool unterminated, copy = false; + source_location src_loc = pfile->line_table->highest_line; + cpp_buffer *buffer = pfile->buffer; + + buffer->cur = cur; + if (pfile->context->prev) + unterminated = false, skip_macro_block_comment (pfile); + else + unterminated = _cpp_skip_block_comment (pfile); + + if (unterminated) + cpp_error_with_line (pfile, CPP_DL_ERROR, src_loc, 0, + "unterminated comment"); + + /* Comments in directives become spaces so that tokens are properly + separated when the ISO preprocessor re-lexes the line. The + exception is #define. */ + if (pfile->state.in_directive) + { + if (in_define) + { + if (CPP_OPTION (pfile, discard_comments_in_macro_exp)) + pfile->out.cur--; + else + copy = true; + } + else + pfile->out.cur[-1] = ' '; + } + else if (CPP_OPTION (pfile, discard_comments)) + pfile->out.cur--; + else + copy = true; + + if (copy) + { + size_t len = (size_t) (buffer->cur - cur); + memcpy (pfile->out.cur, cur, len); + pfile->out.cur += len; + if (unterminated) + { + *pfile->out.cur++ = '*'; + *pfile->out.cur++ = '/'; + } + } + + return buffer->cur; +} + +/* CUR points to any character in the input buffer. Skips over all + contiguous horizontal white space and NULs, including comments if + SKIP_COMMENTS, until reaching the first non-horizontal-whitespace + character or the end of the current context. Escaped newlines are + removed. + + The whitespace is copied verbatim to the output buffer, except that + comments are handled as described in copy_comment(). + pfile->out.cur is updated. + + Returns a pointer to the first character after the whitespace in + the input buffer. */ +static const uchar * +skip_whitespace (cpp_reader *pfile, const uchar *cur, int skip_comments) +{ + uchar *out = pfile->out.cur; + + for (;;) + { + unsigned int c = *cur++; + *out++ = c; + + if (is_nvspace (c)) + continue; + + if (c == '/' && *cur == '*' && skip_comments) + { + pfile->out.cur = out; + cur = copy_comment (pfile, cur, false /* in_define */); + out = pfile->out.cur; + continue; + } + + out--; + break; + } + + pfile->out.cur = out; + return cur - 1; +} + +/* Lexes and outputs an identifier starting at CUR, which is assumed + to point to a valid first character of an identifier. Returns + the hashnode, and updates out.cur. */ +static cpp_hashnode * +lex_identifier (cpp_reader *pfile, const uchar *cur) +{ + size_t len; + uchar *out = pfile->out.cur; + cpp_hashnode *result; + + do + *out++ = *cur++; + while (is_numchar (*cur)); + + CUR (pfile->context) = cur; + len = out - pfile->out.cur; + result = (cpp_hashnode *) ht_lookup (pfile->hash_table, pfile->out.cur, + len, HT_ALLOC); + pfile->out.cur = out; + return result; +} + +/* Overlays the true file buffer temporarily with text of length LEN + starting at START. The true buffer is restored upon calling + restore_buff(). */ +void +_cpp_overlay_buffer (cpp_reader *pfile, const uchar *start, size_t len) +{ + cpp_buffer *buffer = pfile->buffer; + + pfile->overlaid_buffer = buffer; + pfile->saved_cur = buffer->cur; + pfile->saved_rlimit = buffer->rlimit; + pfile->saved_line_base = buffer->next_line; + buffer->need_line = false; + + buffer->cur = start; + buffer->line_base = start; + buffer->rlimit = start + len; +} + +/* Restores a buffer overlaid by _cpp_overlay_buffer(). */ +void +_cpp_remove_overlay (cpp_reader *pfile) +{ + cpp_buffer *buffer = pfile->overlaid_buffer; + + buffer->cur = pfile->saved_cur; + buffer->rlimit = pfile->saved_rlimit; + buffer->line_base = pfile->saved_line_base; + buffer->need_line = true; + + pfile->overlaid_buffer = NULL; +} + +/* Reads a logical line into the output buffer. Returns TRUE if there + is more text left in the buffer. */ +bool +_cpp_read_logical_line_trad (cpp_reader *pfile) +{ + do + { + if (pfile->buffer->need_line && !_cpp_get_fresh_line (pfile)) + return false; + } + while (!_cpp_scan_out_logical_line (pfile, NULL) || pfile->state.skipping); + + return pfile->buffer != NULL; +} + +/* Set up state for finding the opening '(' of a function-like + macro. */ +static void +maybe_start_funlike (cpp_reader *pfile, cpp_hashnode *node, const uchar *start, struct fun_macro *macro) +{ + unsigned int n = node->value.macro->paramc + 1; + + if (macro->buff) + _cpp_release_buff (pfile, macro->buff); + macro->buff = _cpp_get_buff (pfile, n * sizeof (size_t)); + macro->args = (size_t *) BUFF_FRONT (macro->buff); + macro->node = node; + macro->offset = start - pfile->out.base; + macro->argc = 0; +} + +/* Save the OFFSET of the start of the next argument to MACRO. */ +static void +save_argument (struct fun_macro *macro, size_t offset) +{ + macro->argc++; + if (macro->argc <= macro->node->value.macro->paramc) + macro->args[macro->argc] = offset; +} + +/* Copies the next logical line in the current buffer (starting at + buffer->cur) to the output buffer. The output is guaranteed to + terminate with a NUL character. buffer->cur is updated. + + If MACRO is non-NULL, then we are scanning the replacement list of + MACRO, and we call save_replacement_text() every time we meet an + argument. */ +bool +_cpp_scan_out_logical_line (cpp_reader *pfile, cpp_macro *macro) +{ + bool result = true; + cpp_context *context; + const uchar *cur; + uchar *out; + struct fun_macro fmacro; + unsigned int c, paren_depth = 0, quote; + enum ls lex_state = ls_none; + bool header_ok; + const uchar *start_of_input_line; + + fmacro.buff = NULL; + fmacro.args = NULL; + fmacro.node = NULL; + fmacro.offset = 0; + fmacro.line = 0; + fmacro.argc = 0; + + quote = 0; + header_ok = pfile->state.angled_headers; + CUR (pfile->context) = pfile->buffer->cur; + RLIMIT (pfile->context) = pfile->buffer->rlimit; + pfile->out.cur = pfile->out.base; + pfile->out.first_line = pfile->line_table->highest_line; + /* start_of_input_line is needed to make sure that directives really, + really start at the first character of the line. */ + start_of_input_line = pfile->buffer->cur; + new_context: + context = pfile->context; + cur = CUR (context); + check_output_buffer (pfile, RLIMIT (context) - cur); + out = pfile->out.cur; + + for (;;) + { + if (!context->prev + && cur >= pfile->buffer->notes[pfile->buffer->cur_note].pos) + { + pfile->buffer->cur = cur; + _cpp_process_line_notes (pfile, false); + } + c = *cur++; + *out++ = c; + + /* Whitespace should "continue" out of the switch, + non-whitespace should "break" out of it. */ + switch (c) + { + case ' ': + case '\t': + case '\f': + case '\v': + case '\0': + continue; + + case '\n': + /* If this is a macro's expansion, pop it. */ + if (context->prev) + { + pfile->out.cur = out - 1; + _cpp_pop_context (pfile); + goto new_context; + } + + /* Omit the newline from the output buffer. */ + pfile->out.cur = out - 1; + pfile->buffer->cur = cur; + pfile->buffer->need_line = true; + CPP_INCREMENT_LINE (pfile, 0); + + if ((lex_state == ls_fun_open || lex_state == ls_fun_close) + && !pfile->state.in_directive + && _cpp_get_fresh_line (pfile)) + { + /* Newlines in arguments become a space, but we don't + clear any in-progress quote. */ + if (lex_state == ls_fun_close) + out[-1] = ' '; + cur = pfile->buffer->cur; + continue; + } + goto done; + + case '<': + if (header_ok) + quote = '>'; + break; + case '>': + if (c == quote) + quote = 0; + break; + + case '"': + case '\'': + if (c == quote) + quote = 0; + else if (!quote) + quote = c; + break; + + case '\\': + /* Skip escaped quotes here, it's easier than above. */ + if (*cur == '\\' || *cur == '"' || *cur == '\'') + *out++ = *cur++; + break; + + case '/': + /* Traditional CPP does not recognize comments within + literals. */ + if (!quote && *cur == '*') + { + pfile->out.cur = out; + cur = copy_comment (pfile, cur, macro != 0); + out = pfile->out.cur; + continue; + } + break; + + case '_': + case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': + case 'g': case 'h': case 'i': case 'j': case 'k': case 'l': + case 'm': case 'n': case 'o': case 'p': case 'q': case 'r': + case 's': case 't': case 'u': case 'v': case 'w': case 'x': + case 'y': case 'z': + case 'A': case 'B': case 'C': case 'D': case 'E': case 'F': + case 'G': case 'H': case 'I': case 'J': case 'K': case 'L': + case 'M': case 'N': case 'O': case 'P': case 'Q': case 'R': + case 'S': case 'T': case 'U': case 'V': case 'W': case 'X': + case 'Y': case 'Z': + if (!pfile->state.skipping && (quote == 0 || macro)) + { + cpp_hashnode *node; + uchar *out_start = out - 1; + + pfile->out.cur = out_start; + node = lex_identifier (pfile, cur - 1); + out = pfile->out.cur; + cur = CUR (context); + + if (node->type == NT_MACRO + /* Should we expand for ls_answer? */ + && (lex_state == ls_none || lex_state == ls_fun_open) + && !pfile->state.prevent_expansion) + { + /* Macros invalidate MI optimization. */ + pfile->mi_valid = false; + if (! (node->flags & NODE_BUILTIN) + && node->value.macro->fun_like) + { + maybe_start_funlike (pfile, node, out_start, &fmacro); + lex_state = ls_fun_open; + fmacro.line = pfile->line_table->highest_line; + continue; + } + else if (!recursive_macro (pfile, node)) + { + /* Remove the object-like macro's name from the + output, and push its replacement text. */ + pfile->out.cur = out_start; + push_replacement_text (pfile, node); + lex_state = ls_none; + goto new_context; + } + } + else if (macro && (node->flags & NODE_MACRO_ARG) != 0) + { + /* Found a parameter in the replacement text of a + #define. Remove its name from the output. */ + pfile->out.cur = out_start; + save_replacement_text (pfile, macro, node->value.arg_index); + out = pfile->out.base; + } + else if (lex_state == ls_hash) + { + lex_state = ls_predicate; + continue; + } + else if (pfile->state.in_expression + && node == pfile->spec_nodes.n_defined) + { + lex_state = ls_defined; + continue; + } + } + break; + + case '(': + if (quote == 0) + { + paren_depth++; + if (lex_state == ls_fun_open) + { + if (recursive_macro (pfile, fmacro.node)) + lex_state = ls_none; + else + { + lex_state = ls_fun_close; + paren_depth = 1; + out = pfile->out.base + fmacro.offset; + fmacro.args[0] = fmacro.offset; + } + } + else if (lex_state == ls_predicate) + lex_state = ls_answer; + else if (lex_state == ls_defined) + lex_state = ls_defined_close; + } + break; + + case ',': + if (quote == 0 && lex_state == ls_fun_close && paren_depth == 1) + save_argument (&fmacro, out - pfile->out.base); + break; + + case ')': + if (quote == 0) + { + paren_depth--; + if (lex_state == ls_fun_close && paren_depth == 0) + { + cpp_macro *m = fmacro.node->value.macro; + + m->used = 1; + lex_state = ls_none; + save_argument (&fmacro, out - pfile->out.base); + + /* A single zero-length argument is no argument. */ + if (fmacro.argc == 1 + && m->paramc == 0 + && out == pfile->out.base + fmacro.offset + 1) + fmacro.argc = 0; + + if (_cpp_arguments_ok (pfile, m, fmacro.node, fmacro.argc)) + { + /* Remove the macro's invocation from the + output, and push its replacement text. */ + pfile->out.cur = (pfile->out.base + + fmacro.offset); + CUR (context) = cur; + replace_args_and_push (pfile, &fmacro); + goto new_context; + } + } + else if (lex_state == ls_answer || lex_state == ls_defined_close) + lex_state = ls_none; + } + break; + + case '#': + if (cur - 1 == start_of_input_line + /* A '#' from a macro doesn't start a directive. */ + && !pfile->context->prev + && !pfile->state.in_directive) + { + /* A directive. With the way _cpp_handle_directive + currently works, we only want to call it if either we + know the directive is OK, or we want it to fail and + be removed from the output. If we want it to be + passed through (the assembler case) then we must not + call _cpp_handle_directive. */ + pfile->out.cur = out; + cur = skip_whitespace (pfile, cur, true /* skip_comments */); + out = pfile->out.cur; + + if (*cur == '\n') + { + /* Null directive. Ignore it and don't invalidate + the MI optimization. */ + pfile->buffer->need_line = true; + CPP_INCREMENT_LINE (pfile, 0); + result = false; + goto done; + } + else + { + bool do_it = false; + + if (is_numstart (*cur) + && CPP_OPTION (pfile, lang) != CLK_ASM) + do_it = true; + else if (is_idstart (*cur)) + /* Check whether we know this directive, but don't + advance. */ + do_it = lex_identifier (pfile, cur)->is_directive; + + if (do_it || CPP_OPTION (pfile, lang) != CLK_ASM) + { + /* This is a kludge. We want to have the ISO + preprocessor lex the next token. */ + pfile->buffer->cur = cur; + _cpp_handle_directive (pfile, false /* indented */); + result = false; + goto done; + } + } + } + + if (pfile->state.in_expression) + { + lex_state = ls_hash; + continue; + } + break; + + default: + break; + } + + /* Non-whitespace disables MI optimization and stops treating + '<' as a quote in #include. */ + header_ok = false; + if (!pfile->state.in_directive) + pfile->mi_valid = false; + + if (lex_state == ls_none) + continue; + + /* Some of these transitions of state are syntax errors. The + ISO preprocessor will issue errors later. */ + if (lex_state == ls_fun_open) + /* Missing '('. */ + lex_state = ls_none; + else if (lex_state == ls_hash + || lex_state == ls_predicate + || lex_state == ls_defined) + lex_state = ls_none; + + /* ls_answer and ls_defined_close keep going until ')'. */ + } + + done: + if (fmacro.buff) + _cpp_release_buff (pfile, fmacro.buff); + + if (lex_state == ls_fun_close) + cpp_error_with_line (pfile, CPP_DL_ERROR, fmacro.line, 0, + "unterminated argument list invoking macro \"%s\"", + NODE_NAME (fmacro.node)); + return result; +} + +/* Push a context holding the replacement text of the macro NODE on + the context stack. NODE is either object-like, or a function-like + macro with no arguments. */ +static void +push_replacement_text (cpp_reader *pfile, cpp_hashnode *node) +{ + size_t len; + const uchar *text; + uchar *buf; + + if (node->flags & NODE_BUILTIN) + { + text = _cpp_builtin_macro_text (pfile, node); + len = ustrlen (text); + buf = _cpp_unaligned_alloc (pfile, len + 1); + memcpy (buf, text, len); + buf[len]='\n'; + text = buf; + } + else + { + cpp_macro *macro = node->value.macro; + macro->used = 1; + text = macro->exp.text; + macro->traditional = 1; + len = macro->count; + } + + _cpp_push_text_context (pfile, node, text, len); +} + +/* Returns TRUE if traditional macro recursion is detected. */ +static bool +recursive_macro (cpp_reader *pfile, cpp_hashnode *node) +{ + bool recursing = !!(node->flags & NODE_DISABLED); + + /* Object-like macros that are already expanding are necessarily + recursive. + + However, it is possible to have traditional function-like macros + that are not infinitely recursive but recurse to any given depth. + Further, it is easy to construct examples that get ever longer + until the point they stop recursing. So there is no easy way to + detect true recursion; instead we assume any expansion more than + 20 deep since the first invocation of this macro must be + recursing. */ + if (recursing && node->value.macro->fun_like) + { + size_t depth = 0; + cpp_context *context = pfile->context; + + do + { + depth++; + if (context->macro == node && depth > 20) + break; + context = context->prev; + } + while (context); + recursing = context != NULL; + } + + if (recursing) + cpp_error (pfile, CPP_DL_ERROR, + "detected recursion whilst expanding macro \"%s\"", + NODE_NAME (node)); + + return recursing; +} + +/* Return the length of the replacement text of a function-like or + object-like non-builtin macro. */ +size_t +_cpp_replacement_text_len (const cpp_macro *macro) +{ + size_t len; + + if (macro->fun_like && (macro->paramc != 0)) + { + const uchar *exp; + + len = 0; + for (exp = macro->exp.text;;) + { + struct block *b = (struct block *) exp; + + len += b->text_len; + if (b->arg_index == 0) + break; + len += NODE_LEN (macro->params[b->arg_index - 1]); + exp += BLOCK_LEN (b->text_len); + } + } + else + len = macro->count; + + return len; +} + +/* Copy the replacement text of MACRO to DEST, which must be of + sufficient size. It is not NUL-terminated. The next character is + returned. */ +uchar * +_cpp_copy_replacement_text (const cpp_macro *macro, uchar *dest) +{ + if (macro->fun_like && (macro->paramc != 0)) + { + const uchar *exp; + + for (exp = macro->exp.text;;) + { + struct block *b = (struct block *) exp; + cpp_hashnode *param; + + memcpy (dest, b->text, b->text_len); + dest += b->text_len; + if (b->arg_index == 0) + break; + param = macro->params[b->arg_index - 1]; + memcpy (dest, NODE_NAME (param), NODE_LEN (param)); + dest += NODE_LEN (param); + exp += BLOCK_LEN (b->text_len); + } + } + else + { + memcpy (dest, macro->exp.text, macro->count); + dest += macro->count; + } + + return dest; +} + +/* Push a context holding the replacement text of the macro NODE on + the context stack. NODE is either object-like, or a function-like + macro with no arguments. */ +static void +replace_args_and_push (cpp_reader *pfile, struct fun_macro *fmacro) +{ + cpp_macro *macro = fmacro->node->value.macro; + + if (macro->paramc == 0) + push_replacement_text (pfile, fmacro->node); + else + { + const uchar *exp; + uchar *p; + _cpp_buff *buff; + size_t len = 0; + int cxtquote = 0; + + /* Get an estimate of the length of the argument-replaced text. + This is a worst case estimate, assuming that every replacement + text character needs quoting. */ + for (exp = macro->exp.text;;) + { + struct block *b = (struct block *) exp; + + len += b->text_len; + if (b->arg_index == 0) + break; + len += 2 * (fmacro->args[b->arg_index] + - fmacro->args[b->arg_index - 1] - 1); + exp += BLOCK_LEN (b->text_len); + } + + /* Allocate room for the expansion plus \n. */ + buff = _cpp_get_buff (pfile, len + 1); + + /* Copy the expansion and replace arguments. */ + /* Accumulate actual length, including quoting as necessary */ + p = BUFF_FRONT (buff); + len = 0; + for (exp = macro->exp.text;;) + { + struct block *b = (struct block *) exp; + size_t arglen; + int argquote; + uchar *base; + uchar *in; + + len += b->text_len; + /* Copy the non-argument text literally, keeping + track of whether matching quotes have been seen. */ + for (arglen = b->text_len, in = b->text; arglen > 0; arglen--) + { + if (*in == '"') + cxtquote = ! cxtquote; + *p++ = *in++; + } + /* Done if no more arguments */ + if (b->arg_index == 0) + break; + arglen = (fmacro->args[b->arg_index] + - fmacro->args[b->arg_index - 1] - 1); + base = pfile->out.base + fmacro->args[b->arg_index - 1]; + in = base; +#if 0 + /* Skip leading whitespace in the text for the argument to + be substituted. To be compatible with gcc 2.95, we would + also need to trim trailing whitespace. Gcc 2.95 trims + leading and trailing whitespace, which may be a bug. The + current gcc testsuite explicitly checks that this leading + and trailing whitespace in actual arguments is + preserved. */ + while (arglen > 0 && is_space (*in)) + { + in++; + arglen--; + } +#endif + for (argquote = 0; arglen > 0; arglen--) + { + if (cxtquote && *in == '"') + { + if (in > base && *(in-1) != '\\') + argquote = ! argquote; + /* Always add backslash before double quote if argument + is expanded in a quoted context */ + *p++ = '\\'; + len++; + } + else if (cxtquote && argquote && *in == '\\') + { + /* Always add backslash before a backslash in an argument + that is expanded in a quoted context and also in the + range of a quoted context in the argument itself. */ + *p++ = '\\'; + len++; + } + *p++ = *in++; + len++; + } + exp += BLOCK_LEN (b->text_len); + } + + /* \n-terminate. */ + *p = '\n'; + _cpp_push_text_context (pfile, fmacro->node, BUFF_FRONT (buff), len); + + /* So we free buffer allocation when macro is left. */ + pfile->context->buff = buff; + } +} + +/* Read and record the parameters, if any, of a function-like macro + definition. Destroys pfile->out.cur. + + Returns true on success, false on failure (syntax error or a + duplicate parameter). On success, CUR (pfile->context) is just + past the closing parenthesis. */ +static bool +scan_parameters (cpp_reader *pfile, cpp_macro *macro) +{ + const uchar *cur = CUR (pfile->context) + 1; + bool ok; + + for (;;) + { + cur = skip_whitespace (pfile, cur, true /* skip_comments */); + + if (is_idstart (*cur)) + { + ok = false; + if (_cpp_save_parameter (pfile, macro, lex_identifier (pfile, cur))) + break; + cur = skip_whitespace (pfile, CUR (pfile->context), + true /* skip_comments */); + if (*cur == ',') + { + cur++; + continue; + } + ok = (*cur == ')'); + break; + } + + ok = (*cur == ')' && macro->paramc == 0); + break; + } + + if (!ok) + cpp_error (pfile, CPP_DL_ERROR, "syntax error in macro parameter list"); + + CUR (pfile->context) = cur + (*cur == ')'); + + return ok; +} + +/* Save the text from pfile->out.base to pfile->out.cur as + the replacement text for the current macro, followed by argument + ARG_INDEX, with zero indicating the end of the replacement + text. */ +static void +save_replacement_text (cpp_reader *pfile, cpp_macro *macro, + unsigned int arg_index) +{ + size_t len = pfile->out.cur - pfile->out.base; + uchar *exp; + + if (macro->paramc == 0) + { + /* Object-like and function-like macros without parameters + simply store their \n-terminated replacement text. */ + exp = _cpp_unaligned_alloc (pfile, len + 1); + memcpy (exp, pfile->out.base, len); + exp[len] = '\n'; + macro->exp.text = exp; + macro->traditional = 1; + macro->count = len; + } + else + { + /* Store the text's length (unsigned int), the argument index + (unsigned short, base 1) and then the text. */ + size_t blen = BLOCK_LEN (len); + struct block *block; + + if (macro->count + blen > BUFF_ROOM (pfile->a_buff)) + _cpp_extend_buff (pfile, &pfile->a_buff, macro->count + blen); + + exp = BUFF_FRONT (pfile->a_buff); + block = (struct block *) (exp + macro->count); + macro->exp.text = exp; + macro->traditional = 1; + + /* Write out the block information. */ + block->text_len = len; + block->arg_index = arg_index; + memcpy (block->text, pfile->out.base, len); + + /* Lex the rest into the start of the output buffer. */ + pfile->out.cur = pfile->out.base; + + macro->count += blen; + + /* If we've finished, commit the memory. */ + if (arg_index == 0) + BUFF_FRONT (pfile->a_buff) += macro->count; + } +} + +/* Analyze and save the replacement text of a macro. Returns true on + success. */ +bool +_cpp_create_trad_definition (cpp_reader *pfile, cpp_macro *macro) +{ + const uchar *cur; + uchar *limit; + cpp_context *context = pfile->context; + + /* The context has not been set up for command line defines, and CUR + has not been updated for the macro name for in-file defines. */ + pfile->out.cur = pfile->out.base; + CUR (context) = pfile->buffer->cur; + RLIMIT (context) = pfile->buffer->rlimit; + check_output_buffer (pfile, RLIMIT (context) - CUR (context)); + + /* Is this a function-like macro? */ + if (* CUR (context) == '(') + { + bool ok = scan_parameters (pfile, macro); + + /* Remember the params so we can clear NODE_MACRO_ARG flags. */ + macro->params = (cpp_hashnode **) BUFF_FRONT (pfile->a_buff); + + /* Setting macro to NULL indicates an error occurred, and + prevents unnecessary work in _cpp_scan_out_logical_line. */ + if (!ok) + macro = NULL; + else + { + BUFF_FRONT (pfile->a_buff) = (uchar *) ¯o->params[macro->paramc]; + macro->fun_like = 1; + } + } + + /* Skip leading whitespace in the replacement text. */ + pfile->buffer->cur + = skip_whitespace (pfile, CUR (context), + CPP_OPTION (pfile, discard_comments_in_macro_exp)); + + pfile->state.prevent_expansion++; + _cpp_scan_out_logical_line (pfile, macro); + pfile->state.prevent_expansion--; + + if (!macro) + return false; + + /* Skip trailing white space. */ + cur = pfile->out.base; + limit = pfile->out.cur; + while (limit > cur && is_space (limit[-1])) + limit--; + pfile->out.cur = limit; + save_replacement_text (pfile, macro, 0); + + return true; +} + +/* Copy SRC of length LEN to DEST, but convert all contiguous + whitespace to a single space, provided it is not in quotes. The + quote currently in effect is pointed to by PQUOTE, and is updated + by the function. Returns the number of bytes copied. */ +static size_t +canonicalize_text (uchar *dest, const uchar *src, size_t len, uchar *pquote) +{ + uchar *orig_dest = dest; + uchar quote = *pquote; + + while (len) + { + if (is_space (*src) && !quote) + { + do + src++, len--; + while (len && is_space (*src)); + *dest++ = ' '; + } + else + { + if (*src == '\'' || *src == '"') + { + if (!quote) + quote = *src; + else if (quote == *src) + quote = 0; + } + *dest++ = *src++, len--; + } + } + + *pquote = quote; + return dest - orig_dest; +} + +/* Returns true if MACRO1 and MACRO2 have expansions different other + than in the form of their whitespace. */ +bool +_cpp_expansions_different_trad (const cpp_macro *macro1, + const cpp_macro *macro2) +{ + uchar *p1 = XNEWVEC (uchar, macro1->count + macro2->count); + uchar *p2 = p1 + macro1->count; + uchar quote1 = 0, quote2 = 0; + bool mismatch; + size_t len1, len2; + + if (macro1->paramc > 0) + { + const uchar *exp1 = macro1->exp.text, *exp2 = macro2->exp.text; + + mismatch = true; + for (;;) + { + struct block *b1 = (struct block *) exp1; + struct block *b2 = (struct block *) exp2; + + if (b1->arg_index != b2->arg_index) + break; + + len1 = canonicalize_text (p1, b1->text, b1->text_len, "e1); + len2 = canonicalize_text (p2, b2->text, b2->text_len, "e2); + if (len1 != len2 || memcmp (p1, p2, len1)) + break; + if (b1->arg_index == 0) + { + mismatch = false; + break; + } + exp1 += BLOCK_LEN (b1->text_len); + exp2 += BLOCK_LEN (b2->text_len); + } + } + else + { + len1 = canonicalize_text (p1, macro1->exp.text, macro1->count, "e1); + len2 = canonicalize_text (p2, macro2->exp.text, macro2->count, "e2); + mismatch = (len1 != len2 || memcmp (p1, p2, len1)); + } + + free (p1); + return mismatch; +} diff --git a/support/cpp/libcpp/ucnid.h b/support/cpp/libcpp/ucnid.h new file mode 100644 index 0000000..7323dcc --- /dev/null +++ b/support/cpp/libcpp/ucnid.h @@ -0,0 +1,801 @@ +/* Unicode characters and various properties. + Copyright (C) 2003, 2005 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + + + Copyright (C) 1991-2005 Unicode, Inc. All rights reserved. + Distributed under the Terms of Use in + http://www.unicode.org/copyright.html. + + Permission is hereby granted, free of charge, to any person + obtaining a copy of the Unicode data files and any associated + documentation (the "Data Files") or Unicode software and any + associated documentation (the "Software") to deal in the Data Files + or Software without restriction, including without limitation the + rights to use, copy, modify, merge, publish, distribute, and/or + sell copies of the Data Files or Software, and to permit persons to + whom the Data Files or Software are furnished to do so, provided + that (a) the above copyright notice(s) and this permission notice + appear with all copies of the Data Files or Software, (b) both the + above copyright notice(s) and this permission notice appear in + associated documentation, and (c) there is clear notice in each + modified Data File or in the Software as well as in the + documentation associated with the Data File(s) or Software that the + data or software has been modified. + + THE DATA FILES AND SOFTWARE ARE PROVIDED "AS IS", WITHOUT WARRANTY + OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE + WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + NONINFRINGEMENT OF THIRD PARTY RIGHTS. IN NO EVENT SHALL THE + COPYRIGHT HOLDER OR HOLDERS INCLUDED IN THIS NOTICE BE LIABLE FOR + ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSEQUENTIAL DAMAGES, OR ANY + DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + OF THE DATA FILES OR SOFTWARE. + + Except as contained in this notice, the name of a copyright holder + shall not be used in advertising or otherwise to promote the sale, + use or other dealings in these Data Files or Software without prior + written authorization of the copyright holder. */ + +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x00a9 }, +{ C99| 0| 0|CID|NFC| 0| 0, 0, 0x00aa }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x00b4 }, +{ C99| 0| 0|CID|NFC| 0| 0, 0, 0x00b5 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x00b6 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x00b7 }, +{ 0| 0| 0|CID|NFC| 0| 0, 0, 0x00b9 }, +{ C99| 0| 0|CID|NFC| 0| 0, 0, 0x00ba }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x00bf }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x00d6 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x00d7 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x00f6 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x00f7 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0131 }, +{ C99| 0|CXX|CID|NFC| 0| 0, 0, 0x0133 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x013e }, +{ C99| 0|CXX|CID|NFC| 0| 0, 0, 0x0140 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0148 }, +{ C99| 0|CXX|CID|NFC| 0| 0, 0, 0x0149 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x017e }, +{ C99| 0|CXX|CID|NFC| 0| 0, 0, 0x017f }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x01c3 }, +{ C99| 0|CXX|CID|NFC| 0| 0, 0, 0x01cc }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x01f0 }, +{ C99| 0|CXX|CID|NFC| 0| 0, 0, 0x01f3 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x01f5 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x01f9 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0217 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x024f }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x02a8 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x02af }, +{ C99| 0| 0|CID|NFC| 0| 0, 0, 0x02b8 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x02ba }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x02bb }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x02bc }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x02c1 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x02cf }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x02d1 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x02df }, +{ C99| 0| 0|CID|NFC| 0| 0, 0, 0x02e4 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0379 }, +{ C99| 0| 0|CID|NFC| 0| 0, 0, 0x037a }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0383 }, +{ 0| 0|CXX|CID|NFC| 0| 0, 0, 0x0384 }, +{ 0| 0| 0|CID|NFC| 0| 0, 0, 0x0385 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0386 }, +{ 0| 0| 0|CID| 0| 0| 0, 0, 0x0387 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x038a }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x038b }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x038c }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x038d }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x03a1 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x03a2 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x03ce }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x03cf }, +{ C99| 0|CXX|CID|NFC| 0| 0, 0, 0x03d6 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x03d9 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x03da }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x03db }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x03dc }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x03dd }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x03de }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x03df }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x03e0 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x03e1 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x03ef }, +{ C99| 0|CXX|CID|NFC| 0| 0, 0, 0x03f2 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x03f3 }, +{ 0| 0| 0|CID|NFC| 0| 0, 0, 0x0400 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x040c }, +{ 0| 0|CXX|CID|NFC|NKC| 0, 0, 0x040d }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x040e }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x044f }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0450 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x045c }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x045d }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0481 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x048f }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x04c4 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x04c6 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x04c8 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x04ca }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x04cc }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x04cf }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x04eb }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x04ed }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x04f5 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x04f7 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x04f9 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0530 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0556 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0558 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0559 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0560 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0586 }, +{ C99| 0|CXX|CID|NFC| 0| 0, 0, 0x0587 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x05af }, +{ C99| 0| 0|CID|NFC|NKC| 0, 10, 0x05b0 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 11, 0x05b1 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 12, 0x05b2 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 13, 0x05b3 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 14, 0x05b4 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 15, 0x05b5 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 16, 0x05b6 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 17, 0x05b7 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 18, 0x05b8 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 19, 0x05b9 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x05ba }, +{ C99| 0| 0|CID|NFC|NKC| 0, 20, 0x05bb }, +{ C99| 0| 0|CID|NFC|NKC| 0, 21, 0x05bc }, +{ C99| 0| 0|CID|NFC|NKC| 0, 22, 0x05bd }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x05be }, +{ C99| 0| 0|CID|NFC|NKC| 0, 23, 0x05bf }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x05c0 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 24, 0x05c1 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 25, 0x05c2 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x05cf }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x05ea }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x05ef }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x05f2 }, +{ 0| 0|CXX|CID|NFC|NKC| 0, 0, 0x05f4 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0620 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x063a }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x063f }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x064a }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 27, 0x064b }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 28, 0x064c }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 29, 0x064d }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 30, 0x064e }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 31, 0x064f }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 32, 0x0650 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 33, 0x0651 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 34, 0x0652 }, +{ 0| 0| 0|CID|NFC|NKC|CTX, 0, 0x065f }, +{ C99|DIG| 0|CID|NFC|NKC| 0, 0, 0x0669 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x066f }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0674 }, +{ C99| 0|CXX|CID|NFC| 0| 0, 0, 0x0678 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x06b7 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x06b9 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x06be }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x06bf }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x06ce }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x06cf }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x06d5 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 230, 0x06d6 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 230, 0x06d7 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 230, 0x06d8 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 230, 0x06d9 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 230, 0x06da }, +{ C99| 0| 0|CID|NFC|NKC| 0, 230, 0x06db }, +{ C99| 0| 0|CID|NFC|NKC| 0, 230, 0x06dc }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x06e4 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x06e6 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 230, 0x06e7 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 230, 0x06e8 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x06e9 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 220, 0x06ea }, +{ C99| 0| 0|CID|NFC|NKC| 0, 230, 0x06eb }, +{ C99| 0| 0|CID|NFC|NKC| 0, 230, 0x06ec }, +{ C99| 0| 0|CID|NFC|NKC| 0, 220, 0x06ed }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x06ef }, +{ C99|DIG| 0|CID|NFC|NKC| 0, 0, 0x06f9 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0900 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0903 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0904 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0939 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x093c }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x094c }, +{ C99| 0| 0|CID|NFC|NKC| 0, 9, 0x094d }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x094f }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0950 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 230, 0x0951 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 220, 0x0952 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0957 }, +{ C99| 0|CXX|CID| 0| 0| 0, 0, 0x095f }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0962 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0963 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0965 }, +{ C99|DIG| 0|CID|NFC|NKC| 0, 0, 0x096f }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0980 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0983 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0984 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x098c }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x098e }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0990 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0992 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x09a8 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x09a9 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x09b0 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x09b1 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x09b2 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x09b5 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x09b9 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x09bd }, +{ C99| 0| 0|CID|NFC|NKC|CTX, 0, 0x09be }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x09c4 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x09c6 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x09c8 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x09ca }, +{ C99| 0| 0| 0|NFC|NKC| 0, 0, 0x09cb }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x09cc }, +{ C99| 0| 0|CID|NFC|NKC| 0, 9, 0x09cd }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x09db }, +{ C99| 0|CXX|CID| 0| 0| 0, 0, 0x09dd }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x09de }, +{ C99| 0|CXX|CID| 0| 0| 0, 0, 0x09df }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x09e1 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x09e3 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x09e5 }, +{ C99|DIG| 0|CID|NFC|NKC| 0, 0, 0x09ef }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x09f1 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a01 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0a02 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a04 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0a0a }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a0e }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0a10 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a12 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0a28 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a29 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0a30 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a31 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0a32 }, +{ C99| 0|CXX|CID| 0| 0| 0, 0, 0x0a33 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a34 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0a35 }, +{ C99| 0|CXX|CID| 0| 0| 0, 0, 0x0a36 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a37 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0a39 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a3d }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0a42 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a46 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0a48 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a4a }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0a4c }, +{ C99| 0| 0|CID|NFC|NKC| 0, 9, 0x0a4d }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a58 }, +{ C99| 0|CXX|CID| 0| 0| 0, 0, 0x0a5b }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0a5c }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a5d }, +{ C99| 0|CXX|CID| 0| 0| 0, 0, 0x0a5e }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a65 }, +{ C99|DIG| 0|CID|NFC|NKC| 0, 0, 0x0a6f }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a73 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0a74 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a80 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0a83 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a84 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0a8b }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a8c }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0a8d }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a8e }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0a91 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0a92 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0aa8 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0aa9 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0ab0 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0ab1 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0ab3 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0ab4 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0ab9 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0abc }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0ac5 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0ac6 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0ac9 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0aca }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0acc }, +{ C99| 0| 0|CID|NFC|NKC| 0, 9, 0x0acd }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0acf }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0ad0 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0adf }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0ae0 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0ae5 }, +{ C99|DIG| 0|CID|NFC|NKC| 0, 0, 0x0aef }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b00 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0b03 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b04 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0b0c }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b0e }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0b10 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b12 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0b28 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b29 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0b30 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b31 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0b33 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b35 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0b39 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b3c }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0b3d }, +{ C99| 0| 0|CID|NFC|NKC|CTX, 0, 0x0b3e }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0b43 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b46 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0b48 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b4a }, +{ C99| 0| 0| 0|NFC|NKC| 0, 0, 0x0b4b }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0b4c }, +{ C99| 0| 0|CID|NFC|NKC| 0, 9, 0x0b4d }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b5b }, +{ C99| 0|CXX|CID| 0| 0| 0, 0, 0x0b5d }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b5e }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0b61 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b65 }, +{ C99|DIG| 0|CID|NFC|NKC| 0, 0, 0x0b6f }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b81 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0b83 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b84 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0b8a }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b8d }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0b90 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b91 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0b95 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b98 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0b9a }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b9b }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0b9c }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0b9d }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0b9f }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0ba2 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0ba4 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0ba7 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0baa }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0bad }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0bb5 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0bb6 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0bb9 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0bbd }, +{ C99| 0| 0|CID|NFC|NKC|CTX, 0, 0x0bbe }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0bc2 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0bc5 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0bc8 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0bc9 }, +{ C99| 0| 0| 0|NFC|NKC| 0, 0, 0x0bcb }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0bcc }, +{ C99| 0| 0|CID|NFC|NKC| 0, 9, 0x0bcd }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0be6 }, +{ C99|DIG| 0|CID|NFC|NKC| 0, 0, 0x0bef }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0c00 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0c03 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0c04 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0c0c }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0c0d }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0c10 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0c11 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0c28 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0c29 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0c33 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0c34 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0c39 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0c3d }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0c44 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0c45 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0c48 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0c49 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0c4c }, +{ C99| 0| 0|CID|NFC|NKC| 0, 9, 0x0c4d }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0c5f }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0c61 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0c65 }, +{ C99|DIG| 0|CID|NFC|NKC| 0, 0, 0x0c6f }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0c81 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0c83 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0c84 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0c8c }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0c8d }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0c90 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0c91 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0ca8 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0ca9 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0cb3 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0cb4 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0cb9 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0cbd }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0cc1 }, +{ C99| 0| 0|CID|NFC|NKC|CTX, 0, 0x0cc2 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0cc4 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0cc5 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0cc8 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0cc9 }, +{ C99| 0| 0| 0|NFC|NKC| 0, 0, 0x0cca }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0ccc }, +{ C99| 0| 0|CID|NFC|NKC| 0, 9, 0x0ccd }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0cdd }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0cde }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0cdf }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0ce1 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0ce5 }, +{ C99|DIG| 0|CID|NFC|NKC| 0, 0, 0x0cef }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0d01 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0d03 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0d04 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0d0c }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0d0d }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0d10 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0d11 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0d28 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0d29 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0d39 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0d3d }, +{ C99| 0| 0|CID|NFC|NKC|CTX, 0, 0x0d3e }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0d43 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0d45 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0d48 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0d49 }, +{ C99| 0| 0| 0|NFC|NKC| 0, 0, 0x0d4b }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0d4c }, +{ C99| 0| 0|CID|NFC|NKC| 0, 9, 0x0d4d }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0d5f }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0d61 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0d65 }, +{ C99|DIG| 0|CID|NFC|NKC| 0, 0, 0x0d6f }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0e00 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0e30 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0e31 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0e32 }, +{ C99| 0|CXX|CID|NFC| 0| 0, 0, 0x0e33 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0e37 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 103, 0x0e38 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 103, 0x0e39 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 9, 0x0e3a }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0e3f }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0e46 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0e47 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 107, 0x0e48 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 107, 0x0e49 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0e4e }, +{ 0| 0|CXX|CID|NFC|NKC| 0, 0, 0x0e4f }, +{ C99|DIG|CXX|CID|NFC|NKC| 0, 0, 0x0e59 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0e5b }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0e80 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0e82 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0e83 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0e84 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0e86 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0e88 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0e89 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0e8a }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0e8c }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0e8d }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0e93 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0e97 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0e98 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0e9f }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0ea0 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0ea3 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0ea4 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0ea5 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0ea6 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0ea7 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0ea9 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0eab }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0eac }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0eae }, +{ 0| 0|CXX|CID|NFC|NKC| 0, 0, 0x0eaf }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0eb0 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0eb1 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0eb2 }, +{ C99| 0|CXX|CID|NFC| 0| 0, 0, 0x0eb3 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0eb7 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 118, 0x0eb8 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 118, 0x0eb9 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0eba }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0ebc }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0ebd }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0ebf }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0ec4 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0ec5 }, +{ C99| 0|CXX|CID|NFC|NKC| 0, 0, 0x0ec6 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0ec7 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 122, 0x0ec8 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 122, 0x0ec9 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 122, 0x0eca }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0ecd }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0ecf }, +{ C99|DIG| 0|CID|NFC|NKC| 0, 0, 0x0ed9 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0edb }, +{ C99| 0| 0|CID|NFC| 0| 0, 0, 0x0edd }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0eff }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0f00 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0f17 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 220, 0x0f18 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 220, 0x0f19 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0f1f }, +{ C99|DIG| 0|CID|NFC|NKC| 0, 0, 0x0f33 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0f34 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 220, 0x0f35 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0f36 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 220, 0x0f37 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0f38 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 216, 0x0f39 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0f3d }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0f42 }, +{ C99| 0| 0| 0| 0| 0| 0, 0, 0x0f43 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0f47 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0f48 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0f4c }, +{ C99| 0| 0| 0| 0| 0| 0, 0, 0x0f4d }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0f51 }, +{ C99| 0| 0| 0| 0| 0| 0, 0, 0x0f52 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0f56 }, +{ C99| 0| 0| 0| 0| 0| 0, 0, 0x0f57 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0f5b }, +{ C99| 0| 0| 0| 0| 0| 0, 0, 0x0f5c }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0f68 }, +{ C99| 0| 0| 0| 0| 0| 0, 0, 0x0f69 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0f70 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 129, 0x0f71 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 130, 0x0f72 }, +{ C99| 0| 0| 0| 0| 0| 0, 0, 0x0f73 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 132, 0x0f74 }, +{ C99| 0| 0| 0| 0| 0| 0, 0, 0x0f76 }, +{ C99| 0| 0|CID|NFC| 0| 0, 0, 0x0f77 }, +{ C99| 0| 0| 0| 0| 0| 0, 0, 0x0f78 }, +{ C99| 0| 0|CID|NFC| 0| 0, 0, 0x0f79 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 130, 0x0f7a }, +{ C99| 0| 0|CID|NFC|NKC| 0, 130, 0x0f7b }, +{ C99| 0| 0|CID|NFC|NKC| 0, 130, 0x0f7c }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0f7f }, +{ C99| 0| 0|CID|NFC|NKC| 0, 130, 0x0f80 }, +{ C99| 0| 0| 0| 0| 0| 0, 0, 0x0f81 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 230, 0x0f82 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 230, 0x0f83 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 9, 0x0f84 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0f85 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 230, 0x0f86 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0f8b }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0f8f }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0f92 }, +{ C99| 0| 0| 0| 0| 0| 0, 0, 0x0f93 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0f95 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0f96 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0f97 }, +{ 0| 0| 0|CID|NFC|NKC| 0, 0, 0x0f98 }, +{ C99| 0| 0|CID|NFC|NKC| 0, 0, 0x0f9c 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are for + functions whoes implementation copyright does not belong to the + FSF. Those prototypes are present in this file for reference + purposes only and their presence in this file should not construed + as an indication of ownership by the FSF of the implementation of + those functions in any way or form whatsoever. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, + Boston, MA 02110-1301, USA. + + Written by Cygnus Support, 1994. + + The libiberty library provides a number of functions which are + missing on some operating systems. We do not declare those here, + to avoid conflicts with the system header files on operating + systems that do support those functions. In this file we only + declare those functions which are specific to libiberty. */ + +#ifndef LIBIBERTY_H +#define LIBIBERTY_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "ansidecl.h" + +/* Get a definition for size_t. */ +#include +/* Get a definition for va_list. */ +#include + +#include + +/* If the OS supports it, ensure that the supplied stream is setup to + avoid any multi-threaded locking. Otherwise leave the FILE pointer + unchanged. If the stream is NULL do nothing. */ + +extern void unlock_stream (FILE *); + +/* If the OS supports it, ensure that the standard I/O streams, stdin, + stdout and stderr are setup to avoid any multi-threaded locking. + Otherwise do nothing. */ + +extern void unlock_std_streams (void); + +/* Open and return a FILE pointer. If the OS supports it, ensure that + the stream is setup to avoid any multi-threaded locking. Otherwise + return the FILE pointer unchanged. */ + +extern FILE *fopen_unlocked (const char *, const char *); +extern FILE *fdopen_unlocked (int, const char *); +extern FILE *freopen_unlocked (const char *, const char *, FILE *); + +/* Build an argument vector from a string. Allocates memory using + malloc. Use freeargv to free the vector. */ + +extern char **buildargv (const char *) ATTRIBUTE_MALLOC; + +/* Free a vector returned by buildargv. */ + +extern void freeargv (char **); + +/* Duplicate an argument vector. Allocates memory using malloc. Use + freeargv to free the vector. */ + +extern char **dupargv (char **) ATTRIBUTE_MALLOC; + +/* Expand "@file" arguments in argv. */ + +extern void expandargv PARAMS ((int *, char ***)); + +/* Return the last component of a path name. Note that we can't use a + prototype here because the parameter is declared inconsistently + across different systems, sometimes as "char *" and sometimes as + "const char *" */ + +/* HAVE_DECL_* is a three-state macro: undefined, 0 or 1. If it is + undefined, we haven't run the autoconf check so provide the + declaration without arguments. If it is 0, we checked and failed + to find the declaration so provide a fully prototyped one. If it + is 1, we found it so don't provide any declaration at all. */ +#if !HAVE_DECL_BASENAME +#if defined (__GNU_LIBRARY__ ) || defined (__linux__) || defined (__FreeBSD__) || defined (__OpenBSD__) || defined(__NetBSD__) || defined (__CYGWIN__) || defined (__CYGWIN32__) || defined (__MINGW32__) || defined (HAVE_DECL_BASENAME) +extern char *basename (const char *); +#else +/* Do not allow basename to be used if there is no prototype seen. We + either need to use the above prototype or have one from + autoconf which would result in HAVE_DECL_BASENAME being set. */ +#define basename basename_cannot_be_used_without_a_prototype +#endif +#endif + +/* A well-defined basename () that is always compiled in. */ + +extern const char *lbasename (const char *); + +/* A well-defined realpath () that is always compiled in. */ + +extern char *lrealpath (const char *); + +/* Concatenate an arbitrary number of strings. You must pass NULL as + the last argument of this function, to terminate the list of + strings. Allocates memory using xmalloc. */ + +extern char *concat (const char *, ...) ATTRIBUTE_MALLOC ATTRIBUTE_SENTINEL; + +/* Concatenate an arbitrary number of strings. You must pass NULL as + the last argument of this function, to terminate the list of + strings. Allocates memory using xmalloc. The first argument is + not one of the strings to be concatenated, but if not NULL is a + pointer to be freed after the new string is created, similar to the + way xrealloc works. */ + +extern char *reconcat (char *, const char *, ...) ATTRIBUTE_MALLOC ATTRIBUTE_SENTINEL; + +/* Determine the length of concatenating an arbitrary number of + strings. You must pass NULL as the last argument of this function, + to terminate the list of strings. */ + +extern unsigned long concat_length (const char *, ...) ATTRIBUTE_SENTINEL; + +/* Concatenate an arbitrary number of strings into a SUPPLIED area of + memory. You must pass NULL as the last argument of this function, + to terminate the list of strings. The supplied memory is assumed + to be large enough. */ + +extern char *concat_copy (char *, const char *, ...) ATTRIBUTE_SENTINEL; + +/* Concatenate an arbitrary number of strings into a GLOBAL area of + memory. You must pass NULL as the last argument of this function, + to terminate the list of strings. The supplied memory is assumed + to be large enough. */ + +extern char *concat_copy2 (const char *, ...) ATTRIBUTE_SENTINEL; + +/* This is the global area used by concat_copy2. */ + +extern char *libiberty_concat_ptr; + +/* Concatenate an arbitrary number of strings. You must pass NULL as + the last argument of this function, to terminate the list of + strings. Allocates memory using alloca. The arguments are + evaluated twice! */ +#define ACONCAT(ACONCAT_PARAMS) \ + (libiberty_concat_ptr = (char *) alloca (concat_length ACONCAT_PARAMS + 1), \ + concat_copy2 ACONCAT_PARAMS) + +/* Check whether two file descriptors refer to the same file. */ + +extern int fdmatch (int fd1, int fd2); + +/* Return the position of the first bit set in the argument. */ +/* Prototypes vary from system to system, so we only provide a + prototype on systems where we know that we need it. */ +#if defined (HAVE_DECL_FFS) && !HAVE_DECL_FFS +extern int ffs(int); +#endif + +/* Get the working directory. The result is cached, so don't call + chdir() between calls to getpwd(). */ + +extern char * getpwd (void); + +/* Get the current time. */ +/* Prototypes vary from system to system, so we only provide a + prototype on systems where we know that we need it. */ +#ifdef __MINGW32__ +/* Forward declaration to avoid #include . */ +struct timeval; +extern int gettimeofday (struct timeval *, void *); +#endif + +/* Get the amount of time the process has run, in microseconds. */ + +extern long get_run_time (void); + +/* Generate a relocated path to some installation directory. Allocates + return value using malloc. */ + +extern char *make_relative_prefix (const char *, const char *, + const char *) ATTRIBUTE_MALLOC; + +/* Choose a temporary directory to use for scratch files. */ + +extern char *choose_temp_base (void) ATTRIBUTE_MALLOC; + +/* Return a temporary file name or NULL if unable to create one. */ + +extern char *make_temp_file (const char *) ATTRIBUTE_MALLOC; + +/* Remove a link to a file unless it is special. */ + +extern int unlink_if_ordinary (const char *); + +/* Allocate memory filled with spaces. Allocates using malloc. */ + +extern const char *spaces (int count); + +/* Return the maximum error number for which strerror will return a + string. */ + +extern int errno_max (void); + +/* Return the name of an errno value (e.g., strerrno (EINVAL) returns + "EINVAL"). */ + +extern const char *strerrno (int); + +/* Given the name of an errno value, return the value. */ + +extern int strtoerrno (const char *); + +/* ANSI's strerror(), but more robust. */ + +extern char *xstrerror (int); + +/* Return the maximum signal number for which strsignal will return a + string. */ + +extern int signo_max (void); + +/* Return a signal message string for a signal number + (e.g., strsignal (SIGHUP) returns something like "Hangup"). */ +/* This is commented out as it can conflict with one in system headers. + We still document its existence though. */ + +/*extern const char *strsignal (int);*/ + +/* Return the name of a signal number (e.g., strsigno (SIGHUP) returns + "SIGHUP"). */ + +extern const char *strsigno (int); + +/* Given the name of a signal, return its number. */ + +extern int strtosigno (const char *); + +/* Register a function to be run by xexit. Returns 0 on success. */ + +extern int xatexit (void (*fn) (void)); + +/* Exit, calling all the functions registered with xatexit. */ + +extern void xexit (int status) ATTRIBUTE_NORETURN; + +/* Set the program name used by xmalloc. */ + +extern void xmalloc_set_program_name (const char *); + +/* Report an allocation failure. */ +extern void xmalloc_failed (size_t) ATTRIBUTE_NORETURN; + +/* Allocate memory without fail. If malloc fails, this will print a + message to stderr (using the name set by xmalloc_set_program_name, + if any) and then call xexit. */ + +extern void *xmalloc (size_t) ATTRIBUTE_MALLOC; + +/* Reallocate memory without fail. This works like xmalloc. Note, + realloc type functions are not suitable for attribute malloc since + they may return the same address across multiple calls. */ + +extern void *xrealloc (void *, size_t); + +/* Allocate memory without fail and set it to zero. This works like + xmalloc. */ + +extern void *xcalloc (size_t, size_t) ATTRIBUTE_MALLOC; + +/* Copy a string into a memory buffer without fail. */ + +extern char *xstrdup (const char *) ATTRIBUTE_MALLOC; + +/* Copy at most N characters from string into a buffer without fail. */ + +extern char *xstrndup (const char *, size_t) ATTRIBUTE_MALLOC; + +/* Copy an existing memory buffer to a new memory buffer without fail. */ + +extern void *xmemdup (const void *, size_t, size_t) ATTRIBUTE_MALLOC; + +/* Physical memory routines. Return values are in BYTES. */ +extern double physmem_total (void); +extern double physmem_available (void); + + +/* These macros provide a K&R/C89/C++-friendly way of allocating structures + with nice encapsulation. The XDELETE*() macros are technically + superfluous, but provided here for symmetry. Using them consistently + makes it easier to update client code to use different allocators such + as new/delete and new[]/delete[]. */ + +/* Scalar allocators. */ + +#define XNEW(T) ((T *) xmalloc (sizeof (T))) +#define XCNEW(T) ((T *) xcalloc (1, sizeof (T))) +#define XDELETE(P) free ((void*) (P)) + +/* Array allocators. */ + +#define XNEWVEC(T, N) ((T *) xmalloc (sizeof (T) * (N))) +#define XCNEWVEC(T, N) ((T *) xcalloc ((N), sizeof (T))) +#define XRESIZEVEC(T, P, N) ((T *) xrealloc ((void *) (P), sizeof (T) * (N))) +#define XDELETEVEC(P) free ((void*) (P)) + +/* Allocators for variable-sized structures and raw buffers. */ + +#define XNEWVAR(T, S) ((T *) xmalloc ((S))) +#define XCNEWVAR(T, S) ((T *) xcalloc (1, (S))) +#define XRESIZEVAR(T, P, S) ((T *) xrealloc ((P), (S))) + +/* Type-safe obstack allocator. */ + +#define XOBNEW(O, T) ((T *) obstack_alloc ((O), sizeof (T))) +#define XOBFINISH(O, T) ((T) obstack_finish ((O))) + +/* hex character manipulation routines */ + +#define _hex_array_size 256 +#define _hex_bad 99 +extern const unsigned char _hex_value[_hex_array_size]; +extern void hex_init (void); +#define hex_p(c) (hex_value (c) != _hex_bad) +/* If you change this, note well: Some code relies on side effects in + the argument being performed exactly once. */ +#define hex_value(c) ((unsigned int) _hex_value[(unsigned char) (c)]) + +/* Flags for pex_init. These are bits to be or'ed together. */ + +/* Record subprocess times, if possible. */ +#define PEX_RECORD_TIMES 0x1 + +/* Use pipes for communication between processes, if possible. */ +#define PEX_USE_PIPES 0x2 + +/* Save files used for communication between processes. */ +#define PEX_SAVE_TEMPS 0x4 + +/* Prepare to execute one or more programs, with standard output of + each program fed to standard input of the next. + FLAGS As above. + PNAME The name of the program to report in error messages. + TEMPBASE A base name to use for temporary files; may be NULL to + use a random name. + Returns NULL on error. */ + +extern struct pex_obj *pex_init (int flags, const char *pname, + const char *tempbase); + +/* Flags for pex_run. These are bits to be or'ed together. */ + +/* Last program in pipeline. Standard output of program goes to + OUTNAME, or, if OUTNAME is NULL, to standard output of caller. Do + not set this if you want to call pex_read_output. After this is + set, pex_run may no longer be called with the same struct + pex_obj. */ +#define PEX_LAST 0x1 + +/* Search for program in executable search path. */ +#define PEX_SEARCH 0x2 + +/* OUTNAME is a suffix. */ +#define PEX_SUFFIX 0x4 + +/* Send program's standard error to standard output. */ +#define PEX_STDERR_TO_STDOUT 0x8 + +/* Input file should be opened in binary mode. This flag is ignored + on Unix. */ +#define PEX_BINARY_INPUT 0x10 + +/* Output file should be opened in binary mode. This flag is ignored + on Unix. For proper behaviour PEX_BINARY_INPUT and + PEX_BINARY_OUTPUT have to match appropriately--i.e., a call using + PEX_BINARY_OUTPUT should be followed by a call using + PEX_BINARY_INPUT. */ +#define PEX_BINARY_OUTPUT 0x20 + +/* Execute one program. Returns NULL on success. On error returns an + error string (typically just the name of a system call); the error + string is statically allocated. + + OBJ Returned by pex_init. + + FLAGS As above. + + EXECUTABLE The program to execute. + + ARGV NULL terminated array of arguments to pass to the program. + + OUTNAME Sets the output file name as follows: + + PEX_SUFFIX set (OUTNAME may not be NULL): + TEMPBASE parameter to pex_init not NULL: + Output file name is the concatenation of TEMPBASE + and OUTNAME. + TEMPBASE is NULL: + Output file name is a random file name ending in + OUTNAME. + PEX_SUFFIX not set: + OUTNAME not NULL: + Output file name is OUTNAME. + OUTNAME NULL, TEMPBASE not NULL: + Output file name is randomly chosen using + TEMPBASE. + OUTNAME NULL, TEMPBASE NULL: + Output file name is randomly chosen. + + If PEX_LAST is not set, the output file name is the + name to use for a temporary file holding stdout, if + any (there will not be a file if PEX_USE_PIPES is set + and the system supports pipes). If a file is used, it + will be removed when no longer needed unless + PEX_SAVE_TEMPS is set. + + If PEX_LAST is set, and OUTNAME is not NULL, standard + output is written to the output file name. The file + will not be removed. If PEX_LAST and PEX_SUFFIX are + both set, TEMPBASE may not be NULL. + + ERRNAME If not NULL, this is the name of a file to which + standard error is written. If NULL, standard error of + the program is standard error of the caller. + + ERR On an error return, *ERR is set to an errno value, or + to 0 if there is no relevant errno. +*/ + +extern const char *pex_run (struct pex_obj *obj, int flags, + const char *executable, char * const *argv, + const char *outname, const char *errname, + int *err); + +/* As for pex_run (), but takes an extra parameter to enable the + environment for the child process to be specified. + + ENV The environment for the child process, specified as + an array of character pointers. Each element of the + array should point to a string of the form VAR=VALUE, + with the exception of the last element which must be + a null pointer. +*/ + +extern const char *pex_run_in_environment (struct pex_obj *obj, int flags, + const char *executable, + char * const *argv, + char * const *env, + const char *outname, + const char *errname, int *err); + +/* Return a `FILE' pointer FP for the standard input of the first + program in the pipeline; FP is opened for writing. You must have + passed `PEX_USE_PIPES' to the `pex_init' call that returned OBJ. + You must close FP yourself with `fclose' to indicate that the + pipeline's input is complete. + + The file descriptor underlying FP is marked not to be inherited by + child processes. + + This call is not supported on systems which do not support pipes; + it returns with an error. (We could implement it by writing a + temporary file, but then you would need to write all your data and + close FP before your first call to `pex_run' -- and that wouldn't + work on systems that do support pipes: the pipe would fill up, and + you would block. So there isn't any easy way to conceal the + differences between the two types of systems.) + + If you call both `pex_write_input' and `pex_read_output', be + careful to avoid deadlock. If the output pipe fills up, so that + each program in the pipeline is waiting for the next to read more + data, and you fill the input pipe by writing more data to FP, then + there is no way to make progress: the only process that could read + data from the output pipe is you, but you are blocked on the input + pipe. */ + +extern FILE *pex_write_input (struct pex_obj *obj, int binary); + +/* Return a stream for a temporary file to pass to the first program + in the pipeline as input. The file name is chosen as for pex_run. + pex_run closes the file automatically; don't close it yourself. */ + +extern FILE *pex_input_file (struct pex_obj *obj, int flags, + const char *in_name); + +/* Return a stream for a pipe connected to the standard input of the + first program in the pipeline. You must have passed + `PEX_USE_PIPES' to `pex_init'. Close the returned stream + yourself. */ + +extern FILE *pex_input_pipe (struct pex_obj *obj, int binary); + +/* Read the standard output of the last program to be executed. + pex_run can not be called after this. BINARY should be non-zero if + the file should be opened in binary mode; this is ignored on Unix. + Returns NULL on error. Don't call fclose on the returned FILE; it + will be closed by pex_free. */ + +extern FILE *pex_read_output (struct pex_obj *, int binary); + +/* Return exit status of all programs in VECTOR. COUNT indicates the + size of VECTOR. The status codes in the vector are in the order of + the calls to pex_run. Returns 0 on error, 1 on success. */ + +extern int pex_get_status (struct pex_obj *, int count, int *vector); + +/* Return times of all programs in VECTOR. COUNT indicates the size + of VECTOR. struct pex_time is really just struct timeval, but that + is not portable to all systems. Returns 0 on error, 1 on + success. */ + +struct pex_time +{ + unsigned long user_seconds; + unsigned long user_microseconds; + unsigned long system_seconds; + unsigned long system_microseconds; +}; + +extern int pex_get_times (struct pex_obj *, int count, + struct pex_time *vector); + +/* Clean up a pex_obj. */ + +extern void pex_free (struct pex_obj *); + +/* Just execute one program. Return value is as for pex_run. + FLAGS Combination of PEX_SEARCH and PEX_STDERR_TO_STDOUT. + EXECUTABLE As for pex_run. + ARGV As for pex_run. + PNAME As for pex_init. + OUTNAME As for pex_run when PEX_LAST is set. + ERRNAME As for pex_run. + STATUS Set to exit status on success. + ERR As for pex_run. +*/ + +extern const char *pex_one (int flags, const char *executable, + char * const *argv, const char *pname, + const char *outname, const char *errname, + int *status, int *err); + +/* pexecute and pwait are the old pexecute interface, still here for + backward compatibility. Don't use these for new code. Instead, + use pex_init/pex_run/pex_get_status/pex_free, or pex_one. */ + +/* Definitions used by the pexecute routine. */ + +#define PEXECUTE_FIRST 1 +#define PEXECUTE_LAST 2 +#define PEXECUTE_ONE (PEXECUTE_FIRST + PEXECUTE_LAST) +#define PEXECUTE_SEARCH 4 +#define PEXECUTE_VERBOSE 8 + +/* Execute a program. */ + +extern int pexecute (const char *, char * const *, const char *, + const char *, char **, char **, int); + +/* Wait for pexecute to finish. */ + +extern int pwait (int, int *, int); + +#if !HAVE_DECL_ASPRINTF +/* Like sprintf but provides a pointer to malloc'd storage, which must + be freed by the caller. */ + +extern int asprintf (char **, const char *, ...) ATTRIBUTE_PRINTF_2; +#endif + +#if !HAVE_DECL_VASPRINTF +/* Like vsprintf but provides a pointer to malloc'd storage, which + must be freed by the caller. */ + +extern int vasprintf (char **, const char *, va_list) ATTRIBUTE_PRINTF(2,0); +#endif + +#if defined(HAVE_DECL_SNPRINTF) && !HAVE_DECL_SNPRINTF +/* Like sprintf but prints at most N characters. */ +extern int snprintf (char *, size_t, const char *, ...) ATTRIBUTE_PRINTF_3; +#endif + +#if defined(HAVE_DECL_VSNPRINTF) && !HAVE_DECL_VSNPRINTF +/* Like vsprintf but prints at most N characters. */ +extern int vsnprintf (char *, size_t, const char *, va_list) ATTRIBUTE_PRINTF(3,0); +#endif + +#if defined(HAVE_DECL_STRVERSCMP) && !HAVE_DECL_STRVERSCMP +/* Compare version strings. */ +extern int strverscmp (const char *, const char *); +#endif + +#define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0])) + +#ifndef _WIN32 +/* Drastically simplified alloca configurator. If we're using GCC, + we use __builtin_alloca; otherwise we use the C alloca. The C + alloca is always available. You can override GCC by defining + USE_C_ALLOCA yourself. The canonical autoconf macro C_ALLOCA is + also set/unset as it is often used to indicate whether code needs + to call alloca(0). */ +extern void *C_alloca (size_t) ATTRIBUTE_MALLOC; +#undef alloca +#if GCC_VERSION >= 2000 && !defined USE_C_ALLOCA +# define alloca(x) __builtin_alloca(x) +# undef C_ALLOCA +# define ASTRDUP(X) \ + (__extension__ ({ const char *const libiberty_optr = (X); \ + const unsigned long libiberty_len = strlen (libiberty_optr) + 1; \ + char *const libiberty_nptr = (char *const) alloca (libiberty_len); \ + (char *) memcpy (libiberty_nptr, libiberty_optr, libiberty_len); })) +#else +# define alloca(x) C_alloca(x) +# undef USE_C_ALLOCA +# define USE_C_ALLOCA 1 +# undef C_ALLOCA +# define C_ALLOCA 1 +extern const char *libiberty_optr; +extern char *libiberty_nptr; +extern unsigned long libiberty_len; +# define ASTRDUP(X) \ + (libiberty_optr = (X), \ + libiberty_len = strlen (libiberty_optr) + 1, \ + libiberty_nptr = (char *) alloca (libiberty_len), \ + (char *) memcpy (libiberty_nptr, libiberty_optr, libiberty_len)) +#endif +#endif + +#ifdef __cplusplus +} +#endif + + +#endif /* ! defined (LIBIBERTY_H) */ diff --git a/support/cpp/libiberty/concat.c b/support/cpp/libiberty/concat.c new file mode 100644 index 0000000..1f329ea --- /dev/null +++ b/support/cpp/libiberty/concat.c @@ -0,0 +1,232 @@ +/* Concatenate variable number of strings. + Copyright (C) 1991, 1994, 2001 Free Software Foundation, Inc. + Written by Fred Fish @ Cygnus Support + +This file is part of the libiberty library. +Libiberty is free software; you can redistribute it and/or +modify it under the terms of the GNU Library General Public +License as published by the Free Software Foundation; either +version 2 of the License, or (at your option) any later version. + +Libiberty is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Library General Public License for more details. + +You should have received a copy of the GNU Library General Public +License along with libiberty; see the file COPYING.LIB. If +not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, +Boston, MA 02110-1301, USA. */ + + +/* + +@deftypefn Extension char* concat (const char *@var{s1}, const char *@var{s2}, @dots{}, @code{NULL}) + +Concatenate zero or more of strings and return the result in freshly +@code{xmalloc}ed memory. Returns @code{NULL} if insufficient memory is +available. The argument list is terminated by the first @code{NULL} +pointer encountered. Pointers to empty strings are ignored. + +@end deftypefn + +NOTES + + This function uses xmalloc() which is expected to be a front end + function to malloc() that deals with low memory situations. In + typical use, if malloc() returns NULL then xmalloc() diverts to an + error handler routine which never returns, and thus xmalloc will + never return a NULL pointer. If the client application wishes to + deal with low memory situations itself, it should supply an xmalloc + that just directly invokes malloc and blindly returns whatever + malloc returns. + +*/ + + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif +#include "ansidecl.h" +#include "libiberty.h" +#include /* size_t */ + +#include + +# if HAVE_STRING_H +# include +# else +# if HAVE_STRINGS_H +# include +# endif +# endif + +#if HAVE_STDLIB_H +#include +#endif + +static inline unsigned long vconcat_length (const char *, va_list); +static inline unsigned long +vconcat_length (const char *first, va_list args) +{ + unsigned long length = 0; + const char *arg; + + for (arg = first; arg ; arg = va_arg (args, const char *)) + length += strlen (arg); + + return length; +} + +static inline char * +vconcat_copy (char *dst, const char *first, va_list args) +{ + char *end = dst; + const char *arg; + + for (arg = first; arg ; arg = va_arg (args, const char *)) + { + unsigned long length = strlen (arg); + memcpy (end, arg, length); + end += length; + } + *end = '\000'; + + return dst; +} + +/* @undocumented concat_length */ + +unsigned long +concat_length (const char *first, ...) +{ + unsigned long length; + + VA_OPEN (args, first); + VA_FIXEDARG (args, const char *, first); + length = vconcat_length (first, args); + VA_CLOSE (args); + + return length; +} + +/* @undocumented concat_copy */ + +char * +concat_copy (char *dst, const char *first, ...) +{ + char *save_dst; + + VA_OPEN (args, first); + VA_FIXEDARG (args, char *, dst); + VA_FIXEDARG (args, const char *, first); + vconcat_copy (dst, first, args); + save_dst = dst; /* With K&R C, dst goes out of scope here. */ + VA_CLOSE (args); + + return save_dst; +} + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ +char *libiberty_concat_ptr; +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +/* @undocumented concat_copy2 */ + +char * +concat_copy2 (const char *first, ...) +{ + VA_OPEN (args, first); + VA_FIXEDARG (args, const char *, first); + vconcat_copy (libiberty_concat_ptr, first, args); + VA_CLOSE (args); + + return libiberty_concat_ptr; +} + +char * +concat (const char *first, ...) +{ + char *newstr; + + /* First compute the size of the result and get sufficient memory. */ + VA_OPEN (args, first); + VA_FIXEDARG (args, const char *, first); + newstr = XNEWVEC (char, vconcat_length (first, args) + 1); + VA_CLOSE (args); + + /* Now copy the individual pieces to the result string. */ + VA_OPEN (args, first); + VA_FIXEDARG (args, const char *, first); + vconcat_copy (newstr, first, args); + VA_CLOSE (args); + + return newstr; +} + +/* + +@deftypefn Extension char* reconcat (char *@var{optr}, const char *@var{s1}, @dots{}, @code{NULL}) + +Same as @code{concat}, except that if @var{optr} is not @code{NULL} it +is freed after the string is created. This is intended to be useful +when you're extending an existing string or building up a string in a +loop: + +@example + str = reconcat (str, "pre-", str, NULL); +@end example + +@end deftypefn + +*/ + +char * +reconcat (char *optr, const char *first, ...) +{ + char *newstr; + + /* First compute the size of the result and get sufficient memory. */ + VA_OPEN (args, first); + VA_FIXEDARG (args, char *, optr); + VA_FIXEDARG (args, const char *, first); + newstr = XNEWVEC (char, vconcat_length (first, args) + 1); + VA_CLOSE (args); + + /* Now copy the individual pieces to the result string. */ + VA_OPEN (args, first); + VA_FIXEDARG (args, char *, optr); + VA_FIXEDARG (args, const char *, first); + vconcat_copy (newstr, first, args); + if (optr) /* Done before VA_CLOSE so optr stays in scope for K&R C. */ + free (optr); + VA_CLOSE (args); + + return newstr; +} + +#ifdef MAIN +#define NULLP (char *)0 + +/* Simple little test driver. */ + +#include + +int +main (void) +{ + printf ("\"\" = \"%s\"\n", concat (NULLP)); + printf ("\"a\" = \"%s\"\n", concat ("a", NULLP)); + printf ("\"ab\" = \"%s\"\n", concat ("a", "b", NULLP)); + printf ("\"abc\" = \"%s\"\n", concat ("a", "b", "c", NULLP)); + printf ("\"abcd\" = \"%s\"\n", concat ("ab", "cd", NULLP)); + printf ("\"abcde\" = \"%s\"\n", concat ("ab", "c", "de", NULLP)); + printf ("\"abcdef\" = \"%s\"\n", concat ("", "a", "", "bcd", "ef", NULLP)); + return 0; +} + +#endif diff --git a/support/cpp/libiberty/filenames.h b/support/cpp/libiberty/filenames.h new file mode 100644 index 0000000..c82950f --- /dev/null +++ b/support/cpp/libiberty/filenames.h @@ -0,0 +1,52 @@ +/* Macros for taking apart, interpreting and processing file names. + + These are here because some non-Posix (a.k.a. DOSish) systems have + drive letter brain-damage at the beginning of an absolute file name, + use forward- and back-slash in path names interchangeably, and + some of them have case-insensitive file names. + + Copyright 2000, 2001, 2007 Free Software Foundation, Inc. + +This file is part of BFD, the Binary File Descriptor library. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ + +#ifndef FILENAMES_H +#define FILENAMES_H + +#if defined(__MSDOS__) || defined(_WIN32) || defined(__OS2__) || defined (__CYGWIN__) + +#ifndef HAVE_DOS_BASED_FILE_SYSTEM +#define HAVE_DOS_BASED_FILE_SYSTEM 1 +#endif + +#define IS_DIR_SEPARATOR(c) ((c) == '/' || (c) == '\\') +/* Note that IS_ABSOLUTE_PATH accepts d:foo as well, although it is + only semi-absolute. This is because the users of IS_ABSOLUTE_PATH + want to know whether to prepend the current working directory to + a file name, which should not be done with a name like d:foo. */ +#define IS_ABSOLUTE_PATH(f) (IS_DIR_SEPARATOR((f)[0]) || (((f)[0]) && ((f)[1] == ':'))) + +#else /* not DOSish */ + +#define IS_DIR_SEPARATOR(c) ((c) == '/') +#define IS_ABSOLUTE_PATH(f) (IS_DIR_SEPARATOR((f)[0])) + +#endif /* not DOSish */ + +extern int filename_cmp (const char *s1, const char *s2); +#define FILENAME_CMP(s1, s2) filename_cmp(s1, s2) + +#endif /* FILENAMES_H */ diff --git a/support/cpp/libiberty/fopen_unlocked.c b/support/cpp/libiberty/fopen_unlocked.c new file mode 100644 index 0000000..3c3cefe --- /dev/null +++ b/support/cpp/libiberty/fopen_unlocked.c @@ -0,0 +1,126 @@ +/* Implement fopen_unlocked and related functions. + Copyright (C) 2005 Free Software Foundation, Inc. + Written by Kaveh R. Ghazi . + +This file is part of the libiberty library. +Libiberty is free software; you can redistribute it and/or +modify it under the terms of the GNU Library General Public +License as published by the Free Software Foundation; either +version 2 of the License, or (at your option) any later version. + +Libiberty is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Library General Public License for more details. + +You should have received a copy of the GNU Library General Public +License along with libiberty; see the file COPYING.LIB. If +not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, +Boston, MA 02110-1301, USA. */ + +/* + +@deftypefn Extension void unlock_stream (FILE * @var{stream}) + +If the OS supports it, ensure that the supplied stream is setup to +avoid any multi-threaded locking. Otherwise leave the @code{FILE} +pointer unchanged. If the @var{stream} is @code{NULL} do nothing. + +@end deftypefn + +@deftypefn Extension void unlock_std_streams (void) + +If the OS supports it, ensure that the standard I/O streams, +@code{stdin}, @code{stdout} and @code{stderr} are setup to avoid any +multi-threaded locking. Otherwise do nothing. + +@end deftypefn + +@deftypefn Extension {FILE *} fopen_unlocked (const char *@var{path}, const char * @var{mode}) + +Opens and returns a @code{FILE} pointer via @code{fopen}. If the +operating system supports it, ensure that the stream is setup to avoid +any multi-threaded locking. Otherwise return the @code{FILE} pointer +unchanged. + +@end deftypefn + +@deftypefn Extension {FILE *} fdopen_unlocked (int @var{fildes}, const char * @var{mode}) + +Opens and returns a @code{FILE} pointer via @code{fdopen}. If the +operating system supports it, ensure that the stream is setup to avoid +any multi-threaded locking. Otherwise return the @code{FILE} pointer +unchanged. + +@end deftypefn + +@deftypefn Extension {FILE *} freopen_unlocked (const char * @var{path}, const char * @var{mode}, FILE * @var{stream}) + +Opens and returns a @code{FILE} pointer via @code{freopen}. If the +operating system supports it, ensure that the stream is setup to avoid +any multi-threaded locking. Otherwise return the @code{FILE} pointer +unchanged. + +@end deftypefn + +*/ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif +#include +#ifdef HAVE_STDIO_EXT_H +#include +#endif + +#include "libiberty.h" + +/* This is an inline helper function to consolidate attempts to unlock + a stream. */ + +static inline void +unlock_1 (FILE *const fp ATTRIBUTE_UNUSED) +{ +#if defined(HAVE___FSETLOCKING) && defined(FSETLOCKING_BYCALLER) + if (fp) + __fsetlocking (fp, FSETLOCKING_BYCALLER); +#endif +} + +void +unlock_stream (FILE *fp) +{ + unlock_1 (fp); +} + +void +unlock_std_streams (void) +{ + unlock_1 (stdin); + unlock_1 (stdout); + unlock_1 (stderr); +} + +FILE * +fopen_unlocked (const char *path, const char *mode) +{ + FILE *const fp = fopen (path, mode); + unlock_1 (fp); + return fp; +} + +FILE * +fdopen_unlocked (int fildes, const char *mode) +{ + FILE *const fp = fdopen (fildes, mode); + unlock_1 (fp); + return fp; +} + +FILE * +freopen_unlocked (const char *path, const char *mode, FILE *stream) +{ + FILE *const fp = freopen (path, mode, stream); + unlock_1 (fp); + return fp; +} diff --git a/support/cpp/libiberty/getpwd.c b/support/cpp/libiberty/getpwd.c new file mode 100644 index 0000000..7e05ce2 --- /dev/null +++ b/support/cpp/libiberty/getpwd.c @@ -0,0 +1,137 @@ +/* getpwd.c - get the working directory */ + +/* + +@deftypefn Supplemental char* getpwd (void) + +Returns the current working directory. This implementation caches the +result on the assumption that the process will not call @code{chdir} +between calls to @code{getpwd}. + +@end deftypefn + +*/ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include + +#include +#ifndef errno +extern int errno; +#endif + +#ifdef HAVE_STDLIB_H +#include +#endif +#ifdef HAVE_UNISTD_H +#include +#endif +#ifdef HAVE_SYS_PARAM_H +#include +#endif +#if HAVE_SYS_STAT_H +#include +#endif +#if HAVE_LIMITS_H +#include +#endif + +#include "libiberty.h" + +/* Virtually every UN*X system now in common use (except for pre-4.3-tahoe + BSD systems) now provides getcwd as called for by POSIX. Allow for + the few exceptions to the general rule here. */ + +#if !defined(HAVE_GETCWD) && defined(HAVE_GETWD) +/* Prototype in case the system headers doesn't provide it. */ +extern char *getwd (); +#define getcwd(buf,len) getwd(buf) +#endif + +#ifdef MAXPATHLEN +#define GUESSPATHLEN (MAXPATHLEN + 1) +#else +#define GUESSPATHLEN 100 +#endif + +#if !(defined (VMS) || (defined(_WIN32) && !defined(__CYGWIN__))) + +/* Get the working directory. Use the PWD environment variable if it's + set correctly, since this is faster and gives more uniform answers + to the user. Yield the working directory if successful; otherwise, + yield 0 and set errno. */ + +char * +getpwd (void) +{ + static char *pwd; + static int failure_errno; + + char *p = pwd; + size_t s; + struct stat dotstat, pwdstat; + + if (!p && !(errno = failure_errno)) + { + if (! ((p = getenv ("PWD")) != 0 + && *p == '/' + && stat (p, &pwdstat) == 0 + && stat (".", &dotstat) == 0 + && dotstat.st_ino == pwdstat.st_ino + && dotstat.st_dev == pwdstat.st_dev)) + + /* The shortcut didn't work. Try the slow, ``sure'' way. */ + for (s = GUESSPATHLEN; !getcwd (p = XNEWVEC (char, s), s); s *= 2) + { + int e = errno; + free (p); +#ifdef ERANGE + if (e != ERANGE) +#endif + { + errno = failure_errno = e; + p = 0; + break; + } + } + + /* Cache the result. This assumes that the program does + not invoke chdir between calls to getpwd. */ + pwd = p; + } + return p; +} + +#else /* VMS || _WIN32 && !__CYGWIN__ */ + +#if defined(_WIN32) +#if defined(__BORLANDC__) +#include +#else +#include +#define getcwd _getcwd +#endif +#endif + +#ifndef MAXPATHLEN +#define MAXPATHLEN 255 +#endif + +char * +getpwd (void) +{ + static char *pwd = 0; + + if (!pwd) + pwd = getcwd (XNEWVEC (char, MAXPATHLEN + 1), MAXPATHLEN + 1 +#ifdef VMS + , 0 +#endif + ); + return pwd; +} + +#endif /* VMS || _WIN32 && !__CYGWIN__ */ diff --git a/support/cpp/libiberty/hashtab.c b/support/cpp/libiberty/hashtab.c new file mode 100644 index 0000000..bf34a6d --- /dev/null +++ b/support/cpp/libiberty/hashtab.c @@ -0,0 +1,955 @@ +/* An expandable hash tables datatype. + Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004 + Free Software Foundation, Inc. + Contributed by Vladimir Makarov (vmakarov@cygnus.com). + +This file is part of the libiberty library. +Libiberty is free software; you can redistribute it and/or +modify it under the terms of the GNU Library General Public +License as published by the Free Software Foundation; either +version 2 of the License, or (at your option) any later version. + +Libiberty is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Library General Public License for more details. + +You should have received a copy of the GNU Library General Public +License along with libiberty; see the file COPYING.LIB. If +not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, +Boston, MA 02110-1301, USA. */ + +/* This package implements basic hash table functionality. It is possible + to search for an entry, create an entry and destroy an entry. + + Elements in the table are generic pointers. + + The size of the table is not fixed; if the occupancy of the table + grows too high the hash table will be expanded. + + The abstract data implementation is based on generalized Algorithm D + from Knuth's book "The art of computer programming". Hash table is + expanded by creation of new hash table and transferring elements from + the old table to the new table. */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include + +#ifdef HAVE_STDLIB_H +#include +#endif +#ifdef HAVE_STRING_H +#include +#endif +#ifdef HAVE_MALLOC_H +#include +#endif +#ifdef HAVE_LIMITS_H +#include +#endif +#ifdef HAVE_STDINT_H +#include +#endif + +#include + +#include "libiberty.h" +#include "ansidecl.h" +#include "hashtab.h" + +#ifndef CHAR_BIT +#define CHAR_BIT 8 +#endif + +static unsigned int higher_prime_index (unsigned long); +static hashval_t htab_mod_1 (hashval_t, hashval_t, hashval_t, int); +static hashval_t htab_mod (hashval_t, htab_t); +static hashval_t htab_mod_m2 (hashval_t, htab_t); +static hashval_t hash_pointer (const void *); +static int eq_pointer (const void *, const void *); +static int htab_expand (htab_t); +static PTR *find_empty_slot_for_expand (htab_t, hashval_t); + +/* At some point, we could make these be NULL, and modify the + hash-table routines to handle NULL specially; that would avoid + function-call overhead for the common case of hashing pointers. */ +htab_hash htab_hash_pointer = hash_pointer; +htab_eq htab_eq_pointer = eq_pointer; + +/* Table of primes and multiplicative inverses. + + Note that these are not minimally reduced inverses. Unlike when generating + code to divide by a constant, we want to be able to use the same algorithm + all the time. All of these inverses (are implied to) have bit 32 set. + + For the record, here's the function that computed the table; it's a + vastly simplified version of the function of the same name from gcc. */ + +#if 0 +unsigned int +ceil_log2 (unsigned int x) +{ + int i; + for (i = 31; i >= 0 ; --i) + if (x > (1u << i)) + return i+1; + abort (); +} + +unsigned int +choose_multiplier (unsigned int d, unsigned int *mlp, unsigned char *shiftp) +{ + unsigned long long mhigh; + double nx; + int lgup, post_shift; + int pow, pow2; + int n = 32, precision = 32; + + lgup = ceil_log2 (d); + pow = n + lgup; + pow2 = n + lgup - precision; + + nx = ldexp (1.0, pow) + ldexp (1.0, pow2); + mhigh = nx / d; + + *shiftp = lgup - 1; + *mlp = mhigh; + return mhigh >> 32; +} +#endif + +struct prime_ent +{ + hashval_t prime; + hashval_t inv; + hashval_t inv_m2; /* inverse of prime-2 */ + hashval_t shift; +}; + +static struct prime_ent const prime_tab[] = { + { 7, 0x24924925, 0x9999999b, 2 }, + { 13, 0x3b13b13c, 0x745d1747, 3 }, + { 31, 0x08421085, 0x1a7b9612, 4 }, + { 61, 0x0c9714fc, 0x15b1e5f8, 5 }, + { 127, 0x02040811, 0x0624dd30, 6 }, + { 251, 0x05197f7e, 0x073260a5, 7 }, + { 509, 0x01824366, 0x02864fc8, 8 }, + { 1021, 0x00c0906d, 0x014191f7, 9 }, + { 2039, 0x0121456f, 0x0161e69e, 10 }, + { 4093, 0x00300902, 0x00501908, 11 }, + { 8191, 0x00080041, 0x00180241, 12 }, + { 16381, 0x000c0091, 0x00140191, 13 }, + { 32749, 0x002605a5, 0x002a06e6, 14 }, + { 65521, 0x000f00e2, 0x00110122, 15 }, + { 131071, 0x00008001, 0x00018003, 16 }, + { 262139, 0x00014002, 0x0001c004, 17 }, + { 524287, 0x00002001, 0x00006001, 18 }, + { 1048573, 0x00003001, 0x00005001, 19 }, + { 2097143, 0x00004801, 0x00005801, 20 }, + { 4194301, 0x00000c01, 0x00001401, 21 }, + { 8388593, 0x00001e01, 0x00002201, 22 }, + { 16777213, 0x00000301, 0x00000501, 23 }, + { 33554393, 0x00001381, 0x00001481, 24 }, + { 67108859, 0x00000141, 0x000001c1, 25 }, + { 134217689, 0x000004e1, 0x00000521, 26 }, + { 268435399, 0x00000391, 0x000003b1, 27 }, + { 536870909, 0x00000019, 0x00000029, 28 }, + { 1073741789, 0x0000008d, 0x00000095, 29 }, + { 2147483647, 0x00000003, 0x00000007, 30 }, + /* Avoid "decimal constant so large it is unsigned" for 4294967291. */ + { 0xfffffffb, 0x00000006, 0x00000008, 31 } +}; + +/* The following function returns an index into the above table of the + nearest prime number which is greater than N, and near a power of two. */ + +static unsigned int +higher_prime_index (unsigned long n) +{ + unsigned int low = 0; + unsigned int high = sizeof(prime_tab) / sizeof(prime_tab[0]); + + while (low != high) + { + unsigned int mid = low + (high - low) / 2; + if (n > prime_tab[mid].prime) + low = mid + 1; + else + high = mid; + } + + /* If we've run out of primes, abort. */ + if (n > prime_tab[low].prime) + { + fprintf (stderr, "Cannot find prime bigger than %lu\n", n); + abort (); + } + + return low; +} + +/* Returns a hash code for P. */ + +static hashval_t +hash_pointer (const PTR p) +{ + return (hashval_t) ((long)p >> 3); +} + +/* Returns non-zero if P1 and P2 are equal. */ + +static int +eq_pointer (const PTR p1, const PTR p2) +{ + return p1 == p2; +} + + +/* The parens around the function names in the next two definitions + are essential in order to prevent macro expansions of the name. + The bodies, however, are expanded as expected, so they are not + recursive definitions. */ + +/* Return the current size of given hash table. */ + +#define htab_size(htab) ((htab)->size) + +size_t +(htab_size) (htab_t htab) +{ + return htab_size (htab); +} + +/* Return the current number of elements in given hash table. */ + +#define htab_elements(htab) ((htab)->n_elements - (htab)->n_deleted) + +size_t +(htab_elements) (htab_t htab) +{ + return htab_elements (htab); +} + +/* Return X % Y. */ + +static inline hashval_t +htab_mod_1 (hashval_t x, hashval_t y, hashval_t inv, int shift) +{ + /* The multiplicative inverses computed above are for 32-bit types, and + requires that we be able to compute a highpart multiply. */ +#ifdef UNSIGNED_64BIT_TYPE + __extension__ typedef UNSIGNED_64BIT_TYPE ull; + if (sizeof (hashval_t) * CHAR_BIT <= 32) + { + hashval_t t1, t2, t3, t4, q, r; + + t1 = ((ull)x * inv) >> 32; + t2 = x - t1; + t3 = t2 >> 1; + t4 = t1 + t3; + q = t4 >> shift; + r = x - (q * y); + + return r; + } +#endif + + /* Otherwise just use the native division routines. */ + return x % y; +} + +/* Compute the primary hash for HASH given HTAB's current size. */ + +static inline hashval_t +htab_mod (hashval_t hash, htab_t htab) +{ + const struct prime_ent *p = &prime_tab[htab->size_prime_index]; + return htab_mod_1 (hash, p->prime, p->inv, p->shift); +} + +/* Compute the secondary hash for HASH given HTAB's current size. */ + +static inline hashval_t +htab_mod_m2 (hashval_t hash, htab_t htab) +{ + const struct prime_ent *p = &prime_tab[htab->size_prime_index]; + return 1 + htab_mod_1 (hash, p->prime - 2, p->inv_m2, p->shift); +} + +/* This function creates table with length slightly longer than given + source length. Created hash table is initiated as empty (all the + hash table entries are HTAB_EMPTY_ENTRY). The function returns the + created hash table, or NULL if memory allocation fails. */ + +htab_t +htab_create_alloc (size_t size, htab_hash hash_f, htab_eq eq_f, + htab_del del_f, htab_alloc alloc_f, htab_free free_f) +{ + htab_t result; + unsigned int size_prime_index; + + size_prime_index = higher_prime_index (size); + size = prime_tab[size_prime_index].prime; + + result = (htab_t) (*alloc_f) (1, sizeof (struct htab)); + if (result == NULL) + return NULL; + result->entries = (PTR *) (*alloc_f) (size, sizeof (PTR)); + if (result->entries == NULL) + { + if (free_f != NULL) + (*free_f) (result); + return NULL; + } + result->size = size; + result->size_prime_index = size_prime_index; + result->hash_f = hash_f; + result->eq_f = eq_f; + result->del_f = del_f; + result->alloc_f = alloc_f; + result->free_f = free_f; + return result; +} + +/* As above, but use the variants of alloc_f and free_f which accept + an extra argument. */ + +htab_t +htab_create_alloc_ex (size_t size, htab_hash hash_f, htab_eq eq_f, + htab_del del_f, void *alloc_arg, + htab_alloc_with_arg alloc_f, + htab_free_with_arg free_f) +{ + htab_t result; + unsigned int size_prime_index; + + size_prime_index = higher_prime_index (size); + size = prime_tab[size_prime_index].prime; + + result = (htab_t) (*alloc_f) (alloc_arg, 1, sizeof (struct htab)); + if (result == NULL) + return NULL; + result->entries = (PTR *) (*alloc_f) (alloc_arg, size, sizeof (PTR)); + if (result->entries == NULL) + { + if (free_f != NULL) + (*free_f) (alloc_arg, result); + return NULL; + } + result->size = size; + result->size_prime_index = size_prime_index; + result->hash_f = hash_f; + result->eq_f = eq_f; + result->del_f = del_f; + result->alloc_arg = alloc_arg; + result->alloc_with_arg_f = alloc_f; + result->free_with_arg_f = free_f; + return result; +} + +/* Update the function pointers and allocation parameter in the htab_t. */ + +void +htab_set_functions_ex (htab_t htab, htab_hash hash_f, htab_eq eq_f, + htab_del del_f, PTR alloc_arg, + htab_alloc_with_arg alloc_f, htab_free_with_arg free_f) +{ + htab->hash_f = hash_f; + htab->eq_f = eq_f; + htab->del_f = del_f; + htab->alloc_arg = alloc_arg; + htab->alloc_with_arg_f = alloc_f; + htab->free_with_arg_f = free_f; +} + +/* These functions exist solely for backward compatibility. */ + +#undef htab_create +htab_t +htab_create (size_t size, htab_hash hash_f, htab_eq eq_f, htab_del del_f) +{ + return htab_create_alloc (size, hash_f, eq_f, del_f, xcalloc, free); +} + +htab_t +htab_try_create (size_t size, htab_hash hash_f, htab_eq eq_f, htab_del del_f) +{ + return htab_create_alloc (size, hash_f, eq_f, del_f, calloc, free); +} + +/* This function frees all memory allocated for given hash table. + Naturally the hash table must already exist. */ + +void +htab_delete (htab_t htab) +{ + size_t size = htab_size (htab); + PTR *entries = htab->entries; + int i; + + if (htab->del_f) + for (i = size - 1; i >= 0; i--) + if (entries[i] != HTAB_EMPTY_ENTRY && entries[i] != HTAB_DELETED_ENTRY) + (*htab->del_f) (entries[i]); + + if (htab->free_f != NULL) + { + (*htab->free_f) (entries); + (*htab->free_f) (htab); + } + else if (htab->free_with_arg_f != NULL) + { + (*htab->free_with_arg_f) (htab->alloc_arg, entries); + (*htab->free_with_arg_f) (htab->alloc_arg, htab); + } +} + +/* This function clears all entries in the given hash table. */ + +void +htab_empty (htab_t htab) +{ + size_t size = htab_size (htab); + PTR *entries = htab->entries; + int i; + + if (htab->del_f) + for (i = size - 1; i >= 0; i--) + if (entries[i] != HTAB_EMPTY_ENTRY && entries[i] != HTAB_DELETED_ENTRY) + (*htab->del_f) (entries[i]); + + /* Instead of clearing megabyte, downsize the table. */ + if (size > 1024*1024 / sizeof (PTR)) + { + int nindex = higher_prime_index (1024 / sizeof (PTR)); + int nsize = prime_tab[nindex].prime; + + if (htab->free_f != NULL) + (*htab->free_f) (htab->entries); + else if (htab->free_with_arg_f != NULL) + (*htab->free_with_arg_f) (htab->alloc_arg, htab->entries); + if (htab->alloc_with_arg_f != NULL) + htab->entries = (PTR *) (*htab->alloc_with_arg_f) (htab->alloc_arg, nsize, + sizeof (PTR *)); + else + htab->entries = (PTR *) (*htab->alloc_f) (nsize, sizeof (PTR *)); + htab->size = nsize; + htab->size_prime_index = nindex; + } + else + memset (entries, 0, size * sizeof (PTR)); + htab->n_deleted = 0; + htab->n_elements = 0; +} + +/* Similar to htab_find_slot, but without several unwanted side effects: + - Does not call htab->eq_f when it finds an existing entry. + - Does not change the count of elements/searches/collisions in the + hash table. + This function also assumes there are no deleted entries in the table. + HASH is the hash value for the element to be inserted. */ + +static PTR * +find_empty_slot_for_expand (htab_t htab, hashval_t hash) +{ + hashval_t index = htab_mod (hash, htab); + size_t size = htab_size (htab); + PTR *slot = htab->entries + index; + hashval_t hash2; + + if (*slot == HTAB_EMPTY_ENTRY) + return slot; + else if (*slot == HTAB_DELETED_ENTRY) + abort (); + + hash2 = htab_mod_m2 (hash, htab); + for (;;) + { + index += hash2; + if (index >= size) + index -= size; + + slot = htab->entries + index; + if (*slot == HTAB_EMPTY_ENTRY) + return slot; + else if (*slot == HTAB_DELETED_ENTRY) + abort (); + } +} + +/* The following function changes size of memory allocated for the + entries and repeatedly inserts the table elements. The occupancy + of the table after the call will be about 50%. Naturally the hash + table must already exist. Remember also that the place of the + table entries is changed. If memory allocation failures are allowed, + this function will return zero, indicating that the table could not be + expanded. If all goes well, it will return a non-zero value. */ + +static int +htab_expand (htab_t htab) +{ + PTR *oentries; + PTR *olimit; + PTR *p; + PTR *nentries; + size_t nsize, osize, elts; + unsigned int oindex, nindex; + + oentries = htab->entries; + oindex = htab->size_prime_index; + osize = htab->size; + olimit = oentries + osize; + elts = htab_elements (htab); + + /* Resize only when table after removal of unused elements is either + too full or too empty. */ + if (elts * 2 > osize || (elts * 8 < osize && osize > 32)) + { + nindex = higher_prime_index (elts * 2); + nsize = prime_tab[nindex].prime; + } + else + { + nindex = oindex; + nsize = osize; + } + + if (htab->alloc_with_arg_f != NULL) + nentries = (PTR *) (*htab->alloc_with_arg_f) (htab->alloc_arg, nsize, + sizeof (PTR *)); + else + nentries = (PTR *) (*htab->alloc_f) (nsize, sizeof (PTR *)); + if (nentries == NULL) + return 0; + htab->entries = nentries; + htab->size = nsize; + htab->size_prime_index = nindex; + htab->n_elements -= htab->n_deleted; + htab->n_deleted = 0; + + p = oentries; + do + { + PTR x = *p; + + if (x != HTAB_EMPTY_ENTRY && x != HTAB_DELETED_ENTRY) + { + PTR *q = find_empty_slot_for_expand (htab, (*htab->hash_f) (x)); + + *q = x; + } + + p++; + } + while (p < olimit); + + if (htab->free_f != NULL) + (*htab->free_f) (oentries); + else if (htab->free_with_arg_f != NULL) + (*htab->free_with_arg_f) (htab->alloc_arg, oentries); + return 1; +} + +/* This function searches for a hash table entry equal to the given + element. It cannot be used to insert or delete an element. */ + +PTR +htab_find_with_hash (htab_t htab, const PTR element, hashval_t hash) +{ + hashval_t index, hash2; + size_t size; + PTR entry; + + htab->searches++; + size = htab_size (htab); + index = htab_mod (hash, htab); + + entry = htab->entries[index]; + if (entry == HTAB_EMPTY_ENTRY + || (entry != HTAB_DELETED_ENTRY && (*htab->eq_f) (entry, element))) + return entry; + + hash2 = htab_mod_m2 (hash, htab); + for (;;) + { + htab->collisions++; + index += hash2; + if (index >= size) + index -= size; + + entry = htab->entries[index]; + if (entry == HTAB_EMPTY_ENTRY + || (entry != HTAB_DELETED_ENTRY && (*htab->eq_f) (entry, element))) + return entry; + } +} + +/* Like htab_find_slot_with_hash, but compute the hash value from the + element. */ + +PTR +htab_find (htab_t htab, const PTR element) +{ + return htab_find_with_hash (htab, element, (*htab->hash_f) (element)); +} + +/* This function searches for a hash table slot containing an entry + equal to the given element. To delete an entry, call this with + insert=NO_INSERT, then call htab_clear_slot on the slot returned + (possibly after doing some checks). To insert an entry, call this + with insert=INSERT, then write the value you want into the returned + slot. When inserting an entry, NULL may be returned if memory + allocation fails. */ + +PTR * +htab_find_slot_with_hash (htab_t htab, const PTR element, + hashval_t hash, enum insert_option insert) +{ + PTR *first_deleted_slot; + hashval_t index, hash2; + size_t size; + PTR entry; + + size = htab_size (htab); + if (insert == INSERT && size * 3 <= htab->n_elements * 4) + { + if (htab_expand (htab) == 0) + return NULL; + size = htab_size (htab); + } + + index = htab_mod (hash, htab); + + htab->searches++; + first_deleted_slot = NULL; + + entry = htab->entries[index]; + if (entry == HTAB_EMPTY_ENTRY) + goto empty_entry; + else if (entry == HTAB_DELETED_ENTRY) + first_deleted_slot = &htab->entries[index]; + else if ((*htab->eq_f) (entry, element)) + return &htab->entries[index]; + + hash2 = htab_mod_m2 (hash, htab); + for (;;) + { + htab->collisions++; + index += hash2; + if (index >= size) + index -= size; + + entry = htab->entries[index]; + if (entry == HTAB_EMPTY_ENTRY) + goto empty_entry; + else if (entry == HTAB_DELETED_ENTRY) + { + if (!first_deleted_slot) + first_deleted_slot = &htab->entries[index]; + } + else if ((*htab->eq_f) (entry, element)) + return &htab->entries[index]; + } + + empty_entry: + if (insert == NO_INSERT) + return NULL; + + if (first_deleted_slot) + { + htab->n_deleted--; + *first_deleted_slot = HTAB_EMPTY_ENTRY; + return first_deleted_slot; + } + + htab->n_elements++; + return &htab->entries[index]; +} + +/* Like htab_find_slot_with_hash, but compute the hash value from the + element. */ + +PTR * +htab_find_slot (htab_t htab, const PTR element, enum insert_option insert) +{ + return htab_find_slot_with_hash (htab, element, (*htab->hash_f) (element), + insert); +} + +/* This function deletes an element with the given value from hash + table (the hash is computed from the element). If there is no matching + element in the hash table, this function does nothing. */ + +void +htab_remove_elt (htab_t htab, PTR element) +{ + htab_remove_elt_with_hash (htab, element, (*htab->hash_f) (element)); +} + + +/* This function deletes an element with the given value from hash + table. If there is no matching element in the hash table, this + function does nothing. */ + +void +htab_remove_elt_with_hash (htab_t htab, PTR element, hashval_t hash) +{ + PTR *slot; + + slot = htab_find_slot_with_hash (htab, element, hash, NO_INSERT); + if (*slot == HTAB_EMPTY_ENTRY) + return; + + if (htab->del_f) + (*htab->del_f) (*slot); + + *slot = HTAB_DELETED_ENTRY; + htab->n_deleted++; +} + +/* This function clears a specified slot in a hash table. It is + useful when you've already done the lookup and don't want to do it + again. */ + +void +htab_clear_slot (htab_t htab, PTR *slot) +{ + if (slot < htab->entries || slot >= htab->entries + htab_size (htab) + || *slot == HTAB_EMPTY_ENTRY || *slot == HTAB_DELETED_ENTRY) + abort (); + + if (htab->del_f) + (*htab->del_f) (*slot); + + *slot = HTAB_DELETED_ENTRY; + htab->n_deleted++; +} + +/* This function scans over the entire hash table calling + CALLBACK for each live entry. If CALLBACK returns false, + the iteration stops. INFO is passed as CALLBACK's second + argument. */ + +void +htab_traverse_noresize (htab_t htab, htab_trav callback, PTR info) +{ + PTR *slot; + PTR *limit; + + slot = htab->entries; + limit = slot + htab_size (htab); + + do + { + PTR x = *slot; + + if (x != HTAB_EMPTY_ENTRY && x != HTAB_DELETED_ENTRY) + if (!(*callback) (slot, info)) + break; + } + while (++slot < limit); +} + +/* Like htab_traverse_noresize, but does resize the table when it is + too empty to improve effectivity of subsequent calls. */ + +void +htab_traverse (htab_t htab, htab_trav callback, PTR info) +{ + if (htab_elements (htab) * 8 < htab_size (htab)) + htab_expand (htab); + + htab_traverse_noresize (htab, callback, info); +} + +/* Return the fraction of fixed collisions during all work with given + hash table. */ + +double +htab_collisions (htab_t htab) +{ + if (htab->searches == 0) + return 0.0; + + return (double) htab->collisions / (double) htab->searches; +} + +/* Hash P as a null-terminated string. + + Copied from gcc/hashtable.c. Zack had the following to say with respect + to applicability, though note that unlike hashtable.c, this hash table + implementation re-hashes rather than chain buckets. + + http://gcc.gnu.org/ml/gcc-patches/2001-08/msg01021.html + From: Zack Weinberg + Date: Fri, 17 Aug 2001 02:15:56 -0400 + + I got it by extracting all the identifiers from all the source code + I had lying around in mid-1999, and testing many recurrences of + the form "H_n = H_{n-1} * K + c_n * L + M" where K, L, M were either + prime numbers or the appropriate identity. This was the best one. + I don't remember exactly what constituted "best", except I was + looking at bucket-length distributions mostly. + + So it should be very good at hashing identifiers, but might not be + as good at arbitrary strings. + + I'll add that it thoroughly trounces the hash functions recommended + for this use at http://burtleburtle.net/bob/hash/index.html, both + on speed and bucket distribution. I haven't tried it against the + function they just started using for Perl's hashes. */ + +hashval_t +htab_hash_string (const PTR p) +{ + const unsigned char *str = (const unsigned char *) p; + hashval_t r = 0; + unsigned char c; + + while ((c = *str++) != 0) + r = r * 67 + c - 113; + + return r; +} + +/* DERIVED FROM: +-------------------------------------------------------------------- +lookup2.c, by Bob Jenkins, December 1996, Public Domain. +hash(), hash2(), hash3, and mix() are externally useful functions. +Routines to test the hash are included if SELF_TEST is defined. +You can use this free for any purpose. It has no warranty. +-------------------------------------------------------------------- +*/ + +/* +-------------------------------------------------------------------- +mix -- mix 3 32-bit values reversibly. +For every delta with one or two bit set, and the deltas of all three + high bits or all three low bits, whether the original value of a,b,c + is almost all zero or is uniformly distributed, +* If mix() is run forward or backward, at least 32 bits in a,b,c + have at least 1/4 probability of changing. +* If mix() is run forward, every bit of c will change between 1/3 and + 2/3 of the time. (Well, 22/100 and 78/100 for some 2-bit deltas.) +mix() was built out of 36 single-cycle latency instructions in a + structure that could supported 2x parallelism, like so: + a -= b; + a -= c; x = (c>>13); + b -= c; a ^= x; + b -= a; x = (a<<8); + c -= a; b ^= x; + c -= b; x = (b>>13); + ... + Unfortunately, superscalar Pentiums and Sparcs can't take advantage + of that parallelism. They've also turned some of those single-cycle + latency instructions into multi-cycle latency instructions. Still, + this is the fastest good hash I could find. There were about 2^^68 + to choose from. I only looked at a billion or so. +-------------------------------------------------------------------- +*/ +/* same, but slower, works on systems that might have 8 byte hashval_t's */ +#define mix(a,b,c) \ +{ \ + a -= b; a -= c; a ^= (c>>13); \ + b -= c; b -= a; b ^= (a<< 8); \ + c -= a; c -= b; c ^= ((b&0xffffffff)>>13); \ + a -= b; a -= c; a ^= ((c&0xffffffff)>>12); \ + b -= c; b -= a; b = (b ^ (a<<16)) & 0xffffffff; \ + c -= a; c -= b; c = (c ^ (b>> 5)) & 0xffffffff; \ + a -= b; a -= c; a = (a ^ (c>> 3)) & 0xffffffff; \ + b -= c; b -= a; b = (b ^ (a<<10)) & 0xffffffff; \ + c -= a; c -= b; c = (c ^ (b>>15)) & 0xffffffff; \ +} + +/* +-------------------------------------------------------------------- +hash() -- hash a variable-length key into a 32-bit value + k : the key (the unaligned variable-length array of bytes) + len : the length of the key, counting by bytes + level : can be any 4-byte value +Returns a 32-bit value. Every bit of the key affects every bit of +the return value. Every 1-bit and 2-bit delta achieves avalanche. +About 36+6len instructions. + +The best hash table sizes are powers of 2. There is no need to do +mod a prime (mod is sooo slow!). If you need less than 32 bits, +use a bitmask. For example, if you need only 10 bits, do + h = (h & hashmask(10)); +In which case, the hash table should have hashsize(10) elements. + +If you are hashing n strings (ub1 **)k, do it like this: + for (i=0, h=0; i= 12) /* aligned */ + { + a += *(hashval_t *)(k+0); + b += *(hashval_t *)(k+4); + c += *(hashval_t *)(k+8); + mix(a,b,c); + k += 12; len -= 12; + } + else /* unaligned */ +#endif + while (len >= 12) + { + a += (k[0] +((hashval_t)k[1]<<8) +((hashval_t)k[2]<<16) +((hashval_t)k[3]<<24)); + b += (k[4] +((hashval_t)k[5]<<8) +((hashval_t)k[6]<<16) +((hashval_t)k[7]<<24)); + c += (k[8] +((hashval_t)k[9]<<8) +((hashval_t)k[10]<<16)+((hashval_t)k[11]<<24)); + mix(a,b,c); + k += 12; len -= 12; + } + + /*------------------------------------- handle the last 11 bytes */ + c += length; + switch(len) /* all the case statements fall through */ + { + case 11: c+=((hashval_t)k[10]<<24); + case 10: c+=((hashval_t)k[9]<<16); + case 9 : c+=((hashval_t)k[8]<<8); + /* the first byte of c is reserved for the length */ + case 8 : b+=((hashval_t)k[7]<<24); + case 7 : b+=((hashval_t)k[6]<<16); + case 6 : b+=((hashval_t)k[5]<<8); + case 5 : b+=k[4]; + case 4 : a+=((hashval_t)k[3]<<24); + case 3 : a+=((hashval_t)k[2]<<16); + case 2 : a+=((hashval_t)k[1]<<8); + case 1 : a+=k[0]; + /* case 0: nothing left to add */ + } + mix(a,b,c); + /*-------------------------------------------- report the result */ + return c; +} diff --git a/support/cpp/libiberty/hashtab.h b/support/cpp/libiberty/hashtab.h new file mode 100644 index 0000000..77eee14 --- /dev/null +++ b/support/cpp/libiberty/hashtab.h @@ -0,0 +1,206 @@ +/* An expandable hash tables datatype. + Copyright (C) 1999, 2000, 2002, 2003, 2004 Free Software Foundation, Inc. + Contributed by Vladimir Makarov (vmakarov@cygnus.com). + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ + +/* This package implements basic hash table functionality. It is possible + to search for an entry, create an entry and destroy an entry. + + Elements in the table are generic pointers. + + The size of the table is not fixed; if the occupancy of the table + grows too high the hash table will be expanded. + + The abstract data implementation is based on generalized Algorithm D + from Knuth's book "The art of computer programming". Hash table is + expanded by creation of new hash table and transferring elements from + the old table to the new table. */ + +#ifndef __HASHTAB_H__ +#define __HASHTAB_H__ + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#include "ansidecl.h" + +#ifndef GTY +#define GTY(X) +#endif + +/* The type for a hash code. */ +typedef unsigned int hashval_t; + +/* Callback function pointer types. */ + +/* Calculate hash of a table entry. */ +typedef hashval_t (*htab_hash) (const void *); + +/* Compare a table entry with a possible entry. The entry already in + the table always comes first, so the second element can be of a + different type (but in this case htab_find and htab_find_slot + cannot be used; instead the variants that accept a hash value + must be used). */ +typedef int (*htab_eq) (const void *, const void *); + +/* Cleanup function called whenever a live element is removed from + the hash table. */ +typedef void (*htab_del) (void *); + +/* Function called by htab_traverse for each live element. The first + arg is the slot of the element (which can be passed to htab_clear_slot + if desired), the second arg is the auxiliary pointer handed to + htab_traverse. Return 1 to continue scan, 0 to stop. */ +typedef int (*htab_trav) (void **, void *); + +/* Memory-allocation function, with the same functionality as calloc(). + Iff it returns NULL, the hash table implementation will pass an error + code back to the user, so if your code doesn't handle errors, + best if you use xcalloc instead. */ +typedef void *(*htab_alloc) (size_t, size_t); + +/* We also need a free() routine. */ +typedef void (*htab_free) (void *); + +/* Memory allocation and deallocation; variants which take an extra + argument. */ +typedef void *(*htab_alloc_with_arg) (void *, size_t, size_t); +typedef void (*htab_free_with_arg) (void *, void *); + +/* This macro defines reserved value for empty table entry. */ + +#define HTAB_EMPTY_ENTRY ((PTR) 0) + +/* This macro defines reserved value for table entry which contained + a deleted element. */ + +#define HTAB_DELETED_ENTRY ((PTR) 1) + +/* Hash tables are of the following type. The structure + (implementation) of this type is not needed for using the hash + tables. All work with hash table should be executed only through + functions mentioned below. The size of this structure is subject to + change. */ + +struct htab GTY(()) +{ + /* Pointer to hash function. */ + htab_hash hash_f; + + /* Pointer to comparison function. */ + htab_eq eq_f; + + /* Pointer to cleanup function. */ + htab_del del_f; + + /* Table itself. */ + void ** GTY ((use_param, length ("%h.size"))) entries; + + /* Current size (in entries) of the hash table. */ + size_t size; + + /* Current number of elements including also deleted elements. */ + size_t n_elements; + + /* Current number of deleted elements in the table. */ + size_t n_deleted; + + /* The following member is used for debugging. Its value is number + of all calls of `htab_find_slot' for the hash table. */ + unsigned int searches; + + /* The following member is used for debugging. Its value is number + of collisions fixed for time of work with the hash table. */ + unsigned int collisions; + + /* Pointers to allocate/free functions. */ + htab_alloc alloc_f; + htab_free free_f; + + /* Alternate allocate/free functions, which take an extra argument. */ + void * GTY((skip)) alloc_arg; + htab_alloc_with_arg alloc_with_arg_f; + htab_free_with_arg free_with_arg_f; + + /* Current size (in entries) of the hash table, as an index into the + table of primes. */ + unsigned int size_prime_index; +}; + +typedef struct htab *htab_t; + +/* An enum saying whether we insert into the hash table or not. */ +enum insert_option {NO_INSERT, INSERT}; + +/* The prototypes of the package functions. */ + +extern htab_t htab_create_alloc (size_t, htab_hash, + htab_eq, htab_del, + htab_alloc, htab_free); + +extern htab_t htab_create_alloc_ex (size_t, htab_hash, + htab_eq, htab_del, + void *, htab_alloc_with_arg, + htab_free_with_arg); + +/* Backward-compatibility functions. */ +extern htab_t htab_create (size_t, htab_hash, htab_eq, htab_del); +extern htab_t htab_try_create (size_t, htab_hash, htab_eq, htab_del); + +extern void htab_set_functions_ex (htab_t, htab_hash, + htab_eq, htab_del, + void *, htab_alloc_with_arg, + htab_free_with_arg); + +extern void htab_delete (htab_t); +extern void htab_empty (htab_t); + +extern void * htab_find (htab_t, const void *); +extern void ** htab_find_slot (htab_t, const void *, enum insert_option); +extern void * htab_find_with_hash (htab_t, const void *, hashval_t); +extern void ** htab_find_slot_with_hash (htab_t, const void *, + hashval_t, enum insert_option); +extern void htab_clear_slot (htab_t, void **); +extern void htab_remove_elt (htab_t, void *); +extern void htab_remove_elt_with_hash (htab_t, void *, hashval_t); + +extern void htab_traverse (htab_t, htab_trav, void *); +extern void htab_traverse_noresize (htab_t, htab_trav, void *); + +extern size_t htab_size (htab_t); +extern size_t htab_elements (htab_t); +extern double htab_collisions (htab_t); + +/* A hash function for pointers. */ +extern htab_hash htab_hash_pointer; + +/* An equality function for pointers. */ +extern htab_eq htab_eq_pointer; + +/* A hash function for null-terminated strings. */ +extern hashval_t htab_hash_string (const void *); + +/* An iterative hash function for arbitrary data. */ +extern hashval_t iterative_hash (const void *, size_t, hashval_t); +/* Shorthand for hashing something with an intrinsic size. */ +#define iterative_hash_object(OB,INIT) iterative_hash (&OB, sizeof (OB), INIT) + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __HASHTAB_H */ diff --git a/support/cpp/libiberty/hex.c b/support/cpp/libiberty/hex.c new file mode 100644 index 0000000..3004697 --- /dev/null +++ b/support/cpp/libiberty/hex.c @@ -0,0 +1,192 @@ +/* Hex character manipulation support. + Copyright (C) 1995, 2001 Free Software Foundation, Inc. + +This file is part of the libiberty library. +Libiberty is free software; you can redistribute it and/or +modify it under the terms of the GNU Library General Public +License as published by the Free Software Foundation; either +version 2 of the License, or (at your option) any later version. + +Libiberty is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Library General Public License for more details. + +You should have received a copy of the GNU Library General Public +License along with libiberty; see the file COPYING.LIB. If +not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, +Boston, MA 02110-1301, USA. */ + +#include /* for EOF */ +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif +#include "libiberty.h" +#include "safe-ctype.h" /* for HOST_CHARSET_ASCII */ + +#if EOF != -1 + #error "hex.c requires EOF == -1" +#endif + +/* + +@deftypefn Extension void hex_init (void) + +Initializes the array mapping the current character set to +corresponding hex values. This function must be called before any +call to @code{hex_p} or @code{hex_value}. If you fail to call it, a +default ASCII-based table will normally be used on ASCII systems. + +@end deftypefn + +@deftypefn Extension int hex_p (int @var{c}) + +Evaluates to non-zero if the given character is a valid hex character, +or zero if it is not. Note that the value you pass will be cast to +@code{unsigned char} within the macro. + +@end deftypefn + +@deftypefn Extension {unsigned int} hex_value (int @var{c}) + +Returns the numeric equivalent of the given character when interpreted +as a hexadecimal digit. The result is undefined if you pass an +invalid hex digit. Note that the value you pass will be cast to +@code{unsigned char} within the macro. + +The @code{hex_value} macro returns @code{unsigned int}, rather than +signed @code{int}, to make it easier to use in parsing addresses from +hex dump files: a signed @code{int} would be sign-extended when +converted to a wider unsigned type --- like @code{bfd_vma}, on some +systems. + +@end deftypefn + +@undocumented _hex_array_size +@undocumented _hex_bad +@undocumented _hex_value + +*/ + + +/* Are we ASCII? */ +#if HOST_CHARSET == HOST_CHARSET_ASCII + +const unsigned char _hex_value[_hex_array_size] = +{ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* NUL SOH STX ETX */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* EOT ENQ ACK BEL */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* BS HT LF VT */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* FF CR SO SI */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* DLE DC1 DC2 DC3 */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* DC4 NAK SYN ETB */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* CAN EM SUB ESC */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* FS GS RS US */ + + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* SP ! " # */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* $ % & ' */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* ( ) * + */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* , - . / */ + 0, 1, 2, 3, /* 0 1 2 3 */ + 4, 5, 6, 7, /* 4 5 6 7 */ + 8, 9, _hex_bad, _hex_bad, /* 8 9 : ; */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* < = > ? */ + + _hex_bad, 10, 11, 12, /* @ A B C */ + 13, 14, 15, _hex_bad, /* D E F G */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* H I J K */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* L M N O */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* P Q R S */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* T U V W */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* X Y Z [ */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* \ ] ^ _ */ + + _hex_bad, 10, 11, 12, /* ` a b c */ + 13, 14, 15, _hex_bad, /* d e f g */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* h i j k */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* l m n o */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* p q r s */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* t u v w */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* x y z { */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, /* | } ~ DEL */ + + /* The high half of unsigned char, all values are _hex_bad. */ + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, + _hex_bad, _hex_bad, _hex_bad, _hex_bad, +}; +#define HEX_TABLE_INITIALIZED + +#else + +unsigned char _hex_value[_hex_array_size]; + +#endif /* not ASCII */ + +void +hex_init (void) +{ +#ifndef HEX_TABLE_INITIALIZED + int i; + + for (i=0; i<_hex_array_size; i++) + { + switch (i) + { + case '0': _hex_value[i] = 0; break; + case '1': _hex_value[i] = 1; break; + case '2': _hex_value[i] = 2; break; + case '3': _hex_value[i] = 3; break; + case '4': _hex_value[i] = 4; break; + case '5': _hex_value[i] = 5; break; + case '6': _hex_value[i] = 6; break; + case '7': _hex_value[i] = 7; break; + case '8': _hex_value[i] = 8; break; + case '9': _hex_value[i] = 9; break; + + case 'a': case 'A': _hex_value[i] = 10; break; + case 'b': case 'B': _hex_value[i] = 11; break; + case 'c': case 'C': _hex_value[i] = 12; break; + case 'd': case 'D': _hex_value[i] = 13; break; + case 'e': case 'E': _hex_value[i] = 14; break; + case 'f': case 'F': _hex_value[i] = 15; break; + + default: + _hex_value[i] = _hex_bad; + break; + } + } +#endif +} diff --git a/support/cpp/libiberty/lbasename.c b/support/cpp/libiberty/lbasename.c new file mode 100644 index 0000000..56fcd62 --- /dev/null +++ b/support/cpp/libiberty/lbasename.c @@ -0,0 +1,64 @@ +/* Libiberty basename. Like basename, but is not overridden by the + system C library. + Copyright (C) 2001, 2002 Free Software Foundation, Inc. + +This file is part of the libiberty library. +Libiberty is free software; you can redistribute it and/or +modify it under the terms of the GNU Library General Public +License as published by the Free Software Foundation; either +version 2 of the License, or (at your option) any later version. + +Libiberty is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Library General Public License for more details. + +You should have received a copy of the GNU Library General Public +License along with libiberty; see the file COPYING.LIB. If +not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, +Boston, MA 02110-1301, USA. */ + +/* + +@deftypefn Replacement {const char*} lbasename (const char *@var{name}) + +Given a pointer to a string containing a typical pathname +(@samp{/usr/src/cmd/ls/ls.c} for example), returns a pointer to the +last component of the pathname (@samp{ls.c} in this case). The +returned pointer is guaranteed to lie within the original +string. This latter fact is not true of many vendor C +libraries, which return special strings or modify the passed +strings for particular input. + +In particular, the empty string returns the same empty string, +and a path ending in @code{/} returns the empty string after it. + +@end deftypefn + +*/ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif +#include "ansidecl.h" +#include "libiberty.h" +#include "safe-ctype.h" +#include "filenames.h" + +const char * +lbasename (const char *name) +{ + const char *base; + +#if defined (HAVE_DOS_BASED_FILE_SYSTEM) + /* Skip over a possible disk name. */ + if (ISALPHA (name[0]) && name[1] == ':') + name += 2; +#endif + + for (base = name; *name; name++) + if (IS_DIR_SEPARATOR (*name)) + base = name + 1; + + return base; +} diff --git a/support/cpp/libiberty/md5.c b/support/cpp/libiberty/md5.c new file mode 100644 index 0000000..83e0beb --- /dev/null +++ b/support/cpp/libiberty/md5.c @@ -0,0 +1,430 @@ +/* md5.c - Functions to compute MD5 message digest of files or memory blocks + according to the definition of MD5 in RFC 1321 from April 1992. + Copyright (C) 1995, 1996 Free Software Foundation, Inc. + + NOTE: This source is derived from an old version taken from the GNU C + Library (glibc). + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, + Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ + +/* Written by Ulrich Drepper , 1995. */ + +#ifdef HAVE_CONFIG_H +# include +#endif + +#include + +#if STDC_HEADERS || defined _LIBC +# include +# include +#else +# ifndef HAVE_MEMCPY +# define memcpy(d, s, n) bcopy ((s), (d), (n)) +# endif +#endif + +#include "ansidecl.h" +#include "md5.h" + +#ifdef _LIBC +# include +# if __BYTE_ORDER == __BIG_ENDIAN +# define WORDS_BIGENDIAN 1 +# endif +#endif + +#ifdef WORDS_BIGENDIAN +# define SWAP(n) \ + (((n) << 24) | (((n) & 0xff00) << 8) | (((n) >> 8) & 0xff00) | ((n) >> 24)) +#else +# define SWAP(n) (n) +#endif + + +/* This array contains the bytes used to pad the buffer to the next + 64-byte boundary. (RFC 1321, 3.1: Step 1) */ +static const unsigned char fillbuf[64] = { 0x80, 0 /* , 0, 0, ... */ }; + + +/* Initialize structure containing state of computation. + (RFC 1321, 3.3: Step 3) */ +void +md5_init_ctx (struct md5_ctx *ctx) +{ + ctx->A = (md5_uint32) 0x67452301; + ctx->B = (md5_uint32) 0xefcdab89; + ctx->C = (md5_uint32) 0x98badcfe; + ctx->D = (md5_uint32) 0x10325476; + + ctx->total[0] = ctx->total[1] = 0; + ctx->buflen = 0; +} + +/* Put result from CTX in first 16 bytes following RESBUF. The result + must be in little endian byte order. + + IMPORTANT: On some systems it is required that RESBUF is correctly + aligned for a 32 bits value. */ +void * +md5_read_ctx (const struct md5_ctx *ctx, void *resbuf) +{ + ((md5_uint32 *) resbuf)[0] = SWAP (ctx->A); + ((md5_uint32 *) resbuf)[1] = SWAP (ctx->B); + ((md5_uint32 *) resbuf)[2] = SWAP (ctx->C); + ((md5_uint32 *) resbuf)[3] = SWAP (ctx->D); + + return resbuf; +} + +/* Process the remaining bytes in the internal buffer and the usual + prolog according to the standard and write the result to RESBUF. + + IMPORTANT: On some systems it is required that RESBUF is correctly + aligned for a 32 bits value. */ +void * +md5_finish_ctx (struct md5_ctx *ctx, void *resbuf) +{ + /* Take yet unprocessed bytes into account. */ + md5_uint32 bytes = ctx->buflen; + size_t pad; + + /* Now count remaining bytes. */ + ctx->total[0] += bytes; + if (ctx->total[0] < bytes) + ++ctx->total[1]; + + pad = bytes >= 56 ? 64 + 56 - bytes : 56 - bytes; + memcpy (&ctx->buffer[bytes], fillbuf, pad); + + /* Put the 64-bit file length in *bits* at the end of the buffer. */ + *(md5_uint32 *) &ctx->buffer[bytes + pad] = SWAP (ctx->total[0] << 3); + *(md5_uint32 *) &ctx->buffer[bytes + pad + 4] = SWAP ((ctx->total[1] << 3) | + (ctx->total[0] >> 29)); + + /* Process last bytes. */ + md5_process_block (ctx->buffer, bytes + pad + 8, ctx); + + return md5_read_ctx (ctx, resbuf); +} + +/* Compute MD5 message digest for bytes read from STREAM. The + resulting message digest number will be written into the 16 bytes + beginning at RESBLOCK. */ +int +md5_stream (FILE *stream, void *resblock) +{ + /* Important: BLOCKSIZE must be a multiple of 64. */ +#define BLOCKSIZE 4096 + struct md5_ctx ctx; + char buffer[BLOCKSIZE + 72]; + size_t sum; + + /* Initialize the computation context. */ + md5_init_ctx (&ctx); + + /* Iterate over full file contents. */ + while (1) + { + /* We read the file in blocks of BLOCKSIZE bytes. One call of the + computation function processes the whole buffer so that with the + next round of the loop another block can be read. */ + size_t n; + sum = 0; + + /* Read block. Take care for partial reads. */ + do + { + n = fread (buffer + sum, 1, BLOCKSIZE - sum, stream); + + sum += n; + } + while (sum < BLOCKSIZE && n != 0); + if (n == 0 && ferror (stream)) + return 1; + + /* If end of file is reached, end the loop. */ + if (n == 0) + break; + + /* Process buffer with BLOCKSIZE bytes. Note that + BLOCKSIZE % 64 == 0 + */ + md5_process_block (buffer, BLOCKSIZE, &ctx); + } + + /* Add the last bytes if necessary. */ + if (sum > 0) + md5_process_bytes (buffer, sum, &ctx); + + /* Construct result in desired memory. */ + md5_finish_ctx (&ctx, resblock); + return 0; +} + +/* Compute MD5 message digest for LEN bytes beginning at BUFFER. The + result is always in little endian byte order, so that a byte-wise + output yields to the wanted ASCII representation of the message + digest. */ +void * +md5_buffer (const char *buffer, size_t len, void *resblock) +{ + struct md5_ctx ctx; + + /* Initialize the computation context. */ + md5_init_ctx (&ctx); + + /* Process whole buffer but last len % 64 bytes. */ + md5_process_bytes (buffer, len, &ctx); + + /* Put result in desired memory area. */ + return md5_finish_ctx (&ctx, resblock); +} + + +void +md5_process_bytes (const void *buffer, size_t len, struct md5_ctx *ctx) +{ + /* When we already have some bits in our internal buffer concatenate + both inputs first. */ + if (ctx->buflen != 0) + { + size_t left_over = ctx->buflen; + size_t add = 128 - left_over > len ? len : 128 - left_over; + + memcpy (&ctx->buffer[left_over], buffer, add); + ctx->buflen += add; + + if (left_over + add > 64) + { + md5_process_block (ctx->buffer, (left_over + add) & ~63, ctx); + /* The regions in the following copy operation cannot overlap. */ + memcpy (ctx->buffer, &ctx->buffer[(left_over + add) & ~63], + (left_over + add) & 63); + ctx->buflen = (left_over + add) & 63; + } + + buffer = (const void *) ((const char *) buffer + add); + len -= add; + } + + /* Process available complete blocks. */ + if (len > 64) + { +#if !_STRING_ARCH_unaligned +/* To check alignment gcc has an appropriate operator. Other + compilers don't. */ +# if __GNUC__ >= 2 +# define UNALIGNED_P(p) (((md5_uintptr) p) % __alignof__ (md5_uint32) != 0) +# else +# define UNALIGNED_P(p) (((md5_uintptr) p) % sizeof (md5_uint32) != 0) +# endif + if (UNALIGNED_P (buffer)) + while (len > 64) + { + md5_process_block (memcpy (ctx->buffer, buffer, 64), 64, ctx); + buffer = (const char *) buffer + 64; + len -= 64; + } + else +#endif + md5_process_block (buffer, len & ~63, ctx); + buffer = (const void *) ((const char *) buffer + (len & ~63)); + len &= 63; + } + + /* Move remaining bytes in internal buffer. */ + if (len > 0) + { + memcpy (ctx->buffer, buffer, len); + ctx->buflen = len; + } +} + + +/* These are the four functions used in the four steps of the MD5 algorithm + and defined in the RFC 1321. The first function is a little bit optimized + (as found in Colin Plumbs public domain implementation). */ +/* #define FF(b, c, d) ((b & c) | (~b & d)) */ +#define FF(b, c, d) (d ^ (b & (c ^ d))) +#define FG(b, c, d) FF (d, b, c) +#define FH(b, c, d) (b ^ c ^ d) +#define FI(b, c, d) (c ^ (b | ~d)) + +/* Process LEN bytes of BUFFER, accumulating context into CTX. + It is assumed that LEN % 64 == 0. */ + +void +md5_process_block (const void *buffer, size_t len, struct md5_ctx *ctx) +{ + md5_uint32 correct_words[16]; + const md5_uint32 *words = (const md5_uint32 *) buffer; + size_t nwords = len / sizeof (md5_uint32); + const md5_uint32 *endp = words + nwords; + md5_uint32 A = ctx->A; + md5_uint32 B = ctx->B; + md5_uint32 C = ctx->C; + md5_uint32 D = ctx->D; + + /* First increment the byte count. RFC 1321 specifies the possible + length of the file up to 2^64 bits. Here we only compute the + number of bytes. Do a double word increment. */ + ctx->total[0] += len; + if (ctx->total[0] < len) + ++ctx->total[1]; + + /* Process all bytes in the buffer with 64 bytes in each round of + the loop. */ + while (words < endp) + { + md5_uint32 *cwp = correct_words; + md5_uint32 A_save = A; + md5_uint32 B_save = B; + md5_uint32 C_save = C; + md5_uint32 D_save = D; + + /* First round: using the given function, the context and a constant + the next context is computed. Because the algorithms processing + unit is a 32-bit word and it is determined to work on words in + little endian byte order we perhaps have to change the byte order + before the computation. To reduce the work for the next steps + we store the swapped words in the array CORRECT_WORDS. */ + +#define OP(a, b, c, d, s, T) \ + do \ + { \ + a += FF (b, c, d) + (*cwp++ = SWAP (*words)) + T; \ + ++words; \ + CYCLIC (a, s); \ + a += b; \ + } \ + while (0) + + /* It is unfortunate that C does not provide an operator for + cyclic rotation. Hope the C compiler is smart enough. */ +#define CYCLIC(w, s) (w = (w << s) | (w >> (32 - s))) + + /* Before we start, one word to the strange constants. + They are defined in RFC 1321 as + + T[i] = (int) (4294967296.0 * fabs (sin (i))), i=1..64 + */ + + /* Round 1. */ + OP (A, B, C, D, 7, (md5_uint32) 0xd76aa478); + OP (D, A, B, C, 12, (md5_uint32) 0xe8c7b756); + OP (C, D, A, B, 17, (md5_uint32) 0x242070db); + OP (B, C, D, A, 22, (md5_uint32) 0xc1bdceee); + OP (A, B, C, D, 7, (md5_uint32) 0xf57c0faf); + OP (D, A, B, C, 12, (md5_uint32) 0x4787c62a); + OP (C, D, A, B, 17, (md5_uint32) 0xa8304613); + OP (B, C, D, A, 22, (md5_uint32) 0xfd469501); + OP (A, B, C, D, 7, (md5_uint32) 0x698098d8); + OP (D, A, B, C, 12, (md5_uint32) 0x8b44f7af); + OP (C, D, A, B, 17, (md5_uint32) 0xffff5bb1); + OP (B, C, D, A, 22, (md5_uint32) 0x895cd7be); + OP (A, B, C, D, 7, (md5_uint32) 0x6b901122); + OP (D, A, B, C, 12, (md5_uint32) 0xfd987193); + OP (C, D, A, B, 17, (md5_uint32) 0xa679438e); + OP (B, C, D, A, 22, (md5_uint32) 0x49b40821); + + /* For the second to fourth round we have the possibly swapped words + in CORRECT_WORDS. Redefine the macro to take an additional first + argument specifying the function to use. */ +#undef OP +#define OP(a, b, c, d, k, s, T) \ + do \ + { \ + a += FX (b, c, d) + correct_words[k] + T; \ + CYCLIC (a, s); \ + a += b; \ + } \ + while (0) + +#define FX(b, c, d) FG (b, c, d) + + /* Round 2. */ + OP (A, B, C, D, 1, 5, (md5_uint32) 0xf61e2562); + OP (D, A, B, C, 6, 9, (md5_uint32) 0xc040b340); + OP (C, D, A, B, 11, 14, (md5_uint32) 0x265e5a51); + OP (B, C, D, A, 0, 20, (md5_uint32) 0xe9b6c7aa); + OP (A, B, C, D, 5, 5, (md5_uint32) 0xd62f105d); + OP (D, A, B, C, 10, 9, (md5_uint32) 0x02441453); + OP (C, D, A, B, 15, 14, (md5_uint32) 0xd8a1e681); + OP (B, C, D, A, 4, 20, (md5_uint32) 0xe7d3fbc8); + OP (A, B, C, D, 9, 5, (md5_uint32) 0x21e1cde6); + OP (D, A, B, C, 14, 9, (md5_uint32) 0xc33707d6); + OP (C, D, A, B, 3, 14, (md5_uint32) 0xf4d50d87); + OP (B, C, D, A, 8, 20, (md5_uint32) 0x455a14ed); + OP (A, B, C, D, 13, 5, (md5_uint32) 0xa9e3e905); + OP (D, A, B, C, 2, 9, (md5_uint32) 0xfcefa3f8); + OP (C, D, A, B, 7, 14, (md5_uint32) 0x676f02d9); + OP (B, C, D, A, 12, 20, (md5_uint32) 0x8d2a4c8a); + +#undef FX +#define FX(b, c, d) FH (b, c, d) + + /* Round 3. */ + OP (A, B, C, D, 5, 4, (md5_uint32) 0xfffa3942); + OP (D, A, B, C, 8, 11, (md5_uint32) 0x8771f681); + OP (C, D, A, B, 11, 16, (md5_uint32) 0x6d9d6122); + OP (B, C, D, A, 14, 23, (md5_uint32) 0xfde5380c); + OP (A, B, C, D, 1, 4, (md5_uint32) 0xa4beea44); + OP (D, A, B, C, 4, 11, (md5_uint32) 0x4bdecfa9); + OP (C, D, A, B, 7, 16, (md5_uint32) 0xf6bb4b60); + OP (B, C, D, A, 10, 23, (md5_uint32) 0xbebfbc70); + OP (A, B, C, D, 13, 4, (md5_uint32) 0x289b7ec6); + OP (D, A, B, C, 0, 11, (md5_uint32) 0xeaa127fa); + OP (C, D, A, B, 3, 16, (md5_uint32) 0xd4ef3085); + OP (B, C, D, A, 6, 23, (md5_uint32) 0x04881d05); + OP (A, B, C, D, 9, 4, (md5_uint32) 0xd9d4d039); + OP (D, A, B, C, 12, 11, (md5_uint32) 0xe6db99e5); + OP (C, D, A, B, 15, 16, (md5_uint32) 0x1fa27cf8); + OP (B, C, D, A, 2, 23, (md5_uint32) 0xc4ac5665); + +#undef FX +#define FX(b, c, d) FI (b, c, d) + + /* Round 4. */ + OP (A, B, C, D, 0, 6, (md5_uint32) 0xf4292244); + OP (D, A, B, C, 7, 10, (md5_uint32) 0x432aff97); + OP (C, D, A, B, 14, 15, (md5_uint32) 0xab9423a7); + OP (B, C, D, A, 5, 21, (md5_uint32) 0xfc93a039); + OP (A, B, C, D, 12, 6, (md5_uint32) 0x655b59c3); + OP (D, A, B, C, 3, 10, (md5_uint32) 0x8f0ccc92); + OP (C, D, A, B, 10, 15, (md5_uint32) 0xffeff47d); + OP (B, C, D, A, 1, 21, (md5_uint32) 0x85845dd1); + OP (A, B, C, D, 8, 6, (md5_uint32) 0x6fa87e4f); + OP (D, A, B, C, 15, 10, (md5_uint32) 0xfe2ce6e0); + OP (C, D, A, B, 6, 15, (md5_uint32) 0xa3014314); + OP (B, C, D, A, 13, 21, (md5_uint32) 0x4e0811a1); + OP (A, B, C, D, 4, 6, (md5_uint32) 0xf7537e82); + OP (D, A, B, C, 11, 10, (md5_uint32) 0xbd3af235); + OP (C, D, A, B, 2, 15, (md5_uint32) 0x2ad7d2bb); + OP (B, C, D, A, 9, 21, (md5_uint32) 0xeb86d391); + + /* Add the starting values of the context. */ + A += A_save; + B += B_save; + C += C_save; + D += D_save; + } + + /* Put checksum in context given as argument. */ + ctx->A = A; + ctx->B = B; + ctx->C = C; + ctx->D = D; +} diff --git a/support/cpp/libiberty/obstack.c b/support/cpp/libiberty/obstack.c new file mode 100644 index 0000000..a6dbaf0 --- /dev/null +++ b/support/cpp/libiberty/obstack.c @@ -0,0 +1,510 @@ +/* obstack.c - subroutines used implicitly by object stack macros + Copyright (C) 1988,89,90,91,92,93,94,96,97 Free Software Foundation, Inc. + + + NOTE: This source is derived from an old version taken from the GNU C + Library (glibc). + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, + USA. */ + +#ifdef HAVE_CONFIG_H +#include +#endif + +#include "obstack.h" + +/* NOTE BEFORE MODIFYING THIS FILE: This version number must be + incremented whenever callers compiled using an old obstack.h can no + longer properly call the functions in this obstack.c. */ +#define OBSTACK_INTERFACE_VERSION 1 + +/* Comment out all this code if we are using the GNU C Library, and are not + actually compiling the library itself, and the installed library + supports the same library interface we do. This code is part of the GNU + C Library, but also included in many other GNU distributions. Compiling + and linking in this code is a waste when using the GNU C library + (especially if it is a shared library). Rather than having every GNU + program understand `configure --with-gnu-libc' and omit the object + files, it is simpler to just do this in the source for each such file. */ + +#include /* Random thing to get __GNU_LIBRARY__. */ +#if !defined (_LIBC) && defined (__GNU_LIBRARY__) && __GNU_LIBRARY__ > 1 +#include +#if _GNU_OBSTACK_INTERFACE_VERSION == OBSTACK_INTERFACE_VERSION +#define ELIDE_CODE +#endif +#endif + + +#ifndef ELIDE_CODE + + +#define POINTER void * + +/* Determine default alignment. */ +struct fooalign {char x; double d;}; +#define DEFAULT_ALIGNMENT \ + ((PTR_INT_TYPE) ((char *) &((struct fooalign *) 0)->d - (char *) 0)) +/* If malloc were really smart, it would round addresses to DEFAULT_ALIGNMENT. + But in fact it might be less smart and round addresses to as much as + DEFAULT_ROUNDING. So we prepare for it to do that. */ +union fooround {long x; double d;}; +#define DEFAULT_ROUNDING (sizeof (union fooround)) + +/* When we copy a long block of data, this is the unit to do it with. + On some machines, copying successive ints does not work; + in such a case, redefine COPYING_UNIT to `long' (if that works) + or `char' as a last resort. */ +#ifndef COPYING_UNIT +#define COPYING_UNIT int +#endif + + +/* The functions allocating more room by calling `obstack_chunk_alloc' + jump to the handler pointed to by `obstack_alloc_failed_handler'. + This variable by default points to the internal function + `print_and_abort'. */ +static void print_and_abort (void); +void (*obstack_alloc_failed_handler) (void) = print_and_abort; + +/* Exit value used when `print_and_abort' is used. */ +#if defined __GNU_LIBRARY__ || defined HAVE_STDLIB_H +#include +#endif +#ifndef EXIT_FAILURE +#define EXIT_FAILURE 1 +#endif +int obstack_exit_failure = EXIT_FAILURE; + +/* The non-GNU-C macros copy the obstack into this global variable + to avoid multiple evaluation. */ + +struct obstack *_obstack; + +/* Define a macro that either calls functions with the traditional malloc/free + calling interface, or calls functions with the mmalloc/mfree interface + (that adds an extra first argument), based on the state of use_extra_arg. + For free, do not use ?:, since some compilers, like the MIPS compilers, + do not allow (expr) ? void : void. */ + +#if defined (__STDC__) && __STDC__ +#define CALL_CHUNKFUN(h, size) \ + (((h) -> use_extra_arg) \ + ? (*(h)->chunkfun) ((h)->extra_arg, (size)) \ + : (*(struct _obstack_chunk *(*) (long)) (h)->chunkfun) ((size))) + +#define CALL_FREEFUN(h, old_chunk) \ + do { \ + if ((h) -> use_extra_arg) \ + (*(h)->freefun) ((h)->extra_arg, (old_chunk)); \ + else \ + (*(void (*) (void *)) (h)->freefun) ((old_chunk)); \ + } while (0) +#else +#define CALL_CHUNKFUN(h, size) \ + (((h) -> use_extra_arg) \ + ? (*(h)->chunkfun) ((h)->extra_arg, (size)) \ + : (*(struct _obstack_chunk *(*) ()) (h)->chunkfun) ((size))) + +#define CALL_FREEFUN(h, old_chunk) \ + do { \ + if ((h) -> use_extra_arg) \ + (*(h)->freefun) ((h)->extra_arg, (old_chunk)); \ + else \ + (*(void (*) ()) (h)->freefun) ((old_chunk)); \ + } while (0) +#endif + + +/* Initialize an obstack H for use. Specify chunk size SIZE (0 means default). + Objects start on multiples of ALIGNMENT (0 means use default). + CHUNKFUN is the function to use to allocate chunks, + and FREEFUN the function to free them. + + Return nonzero if successful, zero if out of memory. + To recover from an out of memory error, + free up some memory, then call this again. */ + +int +_obstack_begin (struct obstack *h, int size, int alignment, + POINTER (*chunkfun) (long), void (*freefun) (void *)) +{ + register struct _obstack_chunk *chunk; /* points to new chunk */ + + if (alignment == 0) + alignment = (int) DEFAULT_ALIGNMENT; + if (size == 0) + /* Default size is what GNU malloc can fit in a 4096-byte block. */ + { + /* 12 is sizeof (mhead) and 4 is EXTRA from GNU malloc. + Use the values for range checking, because if range checking is off, + the extra bytes won't be missed terribly, but if range checking is on + and we used a larger request, a whole extra 4096 bytes would be + allocated. + + These number are irrelevant to the new GNU malloc. I suspect it is + less sensitive to the size of the request. */ + int extra = ((((12 + DEFAULT_ROUNDING - 1) & ~(DEFAULT_ROUNDING - 1)) + + 4 + DEFAULT_ROUNDING - 1) + & ~(DEFAULT_ROUNDING - 1)); + size = 4096 - extra; + } + + h->chunkfun = (struct _obstack_chunk * (*)(void *, long)) chunkfun; + h->freefun = (void (*) (void *, struct _obstack_chunk *)) freefun; + h->chunk_size = size; + h->alignment_mask = alignment - 1; + h->use_extra_arg = 0; + + chunk = h->chunk = CALL_CHUNKFUN (h, h -> chunk_size); + if (!chunk) + (*obstack_alloc_failed_handler) (); + h->next_free = h->object_base = chunk->contents; + h->chunk_limit = chunk->limit + = (char *) chunk + h->chunk_size; + chunk->prev = 0; + /* The initial chunk now contains no empty object. */ + h->maybe_empty_object = 0; + h->alloc_failed = 0; + return 1; +} + +int +_obstack_begin_1 (struct obstack *h, int size, int alignment, + POINTER (*chunkfun) (POINTER, long), + void (*freefun) (POINTER, POINTER), POINTER arg) +{ + register struct _obstack_chunk *chunk; /* points to new chunk */ + + if (alignment == 0) + alignment = (int) DEFAULT_ALIGNMENT; + if (size == 0) + /* Default size is what GNU malloc can fit in a 4096-byte block. */ + { + /* 12 is sizeof (mhead) and 4 is EXTRA from GNU malloc. + Use the values for range checking, because if range checking is off, + the extra bytes won't be missed terribly, but if range checking is on + and we used a larger request, a whole extra 4096 bytes would be + allocated. + + These number are irrelevant to the new GNU malloc. I suspect it is + less sensitive to the size of the request. */ + int extra = ((((12 + DEFAULT_ROUNDING - 1) & ~(DEFAULT_ROUNDING - 1)) + + 4 + DEFAULT_ROUNDING - 1) + & ~(DEFAULT_ROUNDING - 1)); + size = 4096 - extra; + } + + h->chunkfun = (struct _obstack_chunk * (*)(void *,long)) chunkfun; + h->freefun = (void (*) (void *, struct _obstack_chunk *)) freefun; + h->chunk_size = size; + h->alignment_mask = alignment - 1; + h->extra_arg = arg; + h->use_extra_arg = 1; + + chunk = h->chunk = CALL_CHUNKFUN (h, h -> chunk_size); + if (!chunk) + (*obstack_alloc_failed_handler) (); + h->next_free = h->object_base = chunk->contents; + h->chunk_limit = chunk->limit + = (char *) chunk + h->chunk_size; + chunk->prev = 0; + /* The initial chunk now contains no empty object. */ + h->maybe_empty_object = 0; + h->alloc_failed = 0; + return 1; +} + +/* Allocate a new current chunk for the obstack *H + on the assumption that LENGTH bytes need to be added + to the current object, or a new object of length LENGTH allocated. + Copies any partial object from the end of the old chunk + to the beginning of the new one. */ + +void +_obstack_newchunk (struct obstack *h, int length) +{ + register struct _obstack_chunk *old_chunk = h->chunk; + register struct _obstack_chunk *new_chunk; + register long new_size; + register long obj_size = h->next_free - h->object_base; + register long i; + long already; + + /* Compute size for new chunk. */ + new_size = (obj_size + length) + (obj_size >> 3) + 100; + if (new_size < h->chunk_size) + new_size = h->chunk_size; + + /* Allocate and initialize the new chunk. */ + new_chunk = CALL_CHUNKFUN (h, new_size); + if (!new_chunk) + (*obstack_alloc_failed_handler) (); + h->chunk = new_chunk; + new_chunk->prev = old_chunk; + new_chunk->limit = h->chunk_limit = (char *) new_chunk + new_size; + + /* Move the existing object to the new chunk. + Word at a time is fast and is safe if the object + is sufficiently aligned. */ + if (h->alignment_mask + 1 >= DEFAULT_ALIGNMENT) + { + for (i = obj_size / sizeof (COPYING_UNIT) - 1; + i >= 0; i--) + ((COPYING_UNIT *)new_chunk->contents)[i] + = ((COPYING_UNIT *)h->object_base)[i]; + /* We used to copy the odd few remaining bytes as one extra COPYING_UNIT, + but that can cross a page boundary on a machine + which does not do strict alignment for COPYING_UNITS. */ + already = obj_size / sizeof (COPYING_UNIT) * sizeof (COPYING_UNIT); + } + else + already = 0; + /* Copy remaining bytes one by one. */ + for (i = already; i < obj_size; i++) + new_chunk->contents[i] = h->object_base[i]; + + /* If the object just copied was the only data in OLD_CHUNK, + free that chunk and remove it from the chain. + But not if that chunk might contain an empty object. */ + if (h->object_base == old_chunk->contents && ! h->maybe_empty_object) + { + new_chunk->prev = old_chunk->prev; + CALL_FREEFUN (h, old_chunk); + } + + h->object_base = new_chunk->contents; + h->next_free = h->object_base + obj_size; + /* The new chunk certainly contains no empty object yet. */ + h->maybe_empty_object = 0; +} + +/* Return nonzero if object OBJ has been allocated from obstack H. + This is here for debugging. + If you use it in a program, you are probably losing. */ + +/* Suppress -Wmissing-prototypes warning. We don't want to declare this in + obstack.h because it is just for debugging. */ +int _obstack_allocated_p (struct obstack *h, POINTER obj); + +int +_obstack_allocated_p (struct obstack *h, POINTER obj) +{ + register struct _obstack_chunk *lp; /* below addr of any objects in this chunk */ + register struct _obstack_chunk *plp; /* point to previous chunk if any */ + + lp = (h)->chunk; + /* We use >= rather than > since the object cannot be exactly at + the beginning of the chunk but might be an empty object exactly + at the end of an adjacent chunk. */ + while (lp != 0 && ((POINTER) lp >= obj || (POINTER) (lp)->limit < obj)) + { + plp = lp->prev; + lp = plp; + } + return lp != 0; +} + +/* Free objects in obstack H, including OBJ and everything allocate + more recently than OBJ. If OBJ is zero, free everything in H. */ + +#undef obstack_free + +/* This function has two names with identical definitions. + This is the first one, called from non-ANSI code. */ + +void +_obstack_free (struct obstack *h, POINTER obj) +{ + register struct _obstack_chunk *lp; /* below addr of any objects in this chunk */ + register struct _obstack_chunk *plp; /* point to previous chunk if any */ + + lp = h->chunk; + /* We use >= because there cannot be an object at the beginning of a chunk. + But there can be an empty object at that address + at the end of another chunk. */ + while (lp != 0 && ((POINTER) lp >= obj || (POINTER) (lp)->limit < obj)) + { + plp = lp->prev; + CALL_FREEFUN (h, lp); + lp = plp; + /* If we switch chunks, we can't tell whether the new current + chunk contains an empty object, so assume that it may. */ + h->maybe_empty_object = 1; + } + if (lp) + { + h->object_base = h->next_free = (char *) (obj); + h->chunk_limit = lp->limit; + h->chunk = lp; + } + else if (obj != 0) + /* obj is not in any of the chunks! */ + abort (); +} + +/* This function is used from ANSI code. */ + +void +obstack_free (struct obstack *h, POINTER obj) +{ + register struct _obstack_chunk *lp; /* below addr of any objects in this chunk */ + register struct _obstack_chunk *plp; /* point to previous chunk if any */ + + lp = h->chunk; + /* We use >= because there cannot be an object at the beginning of a chunk. + But there can be an empty object at that address + at the end of another chunk. */ + while (lp != 0 && ((POINTER) lp >= obj || (POINTER) (lp)->limit < obj)) + { + plp = lp->prev; + CALL_FREEFUN (h, lp); + lp = plp; + /* If we switch chunks, we can't tell whether the new current + chunk contains an empty object, so assume that it may. */ + h->maybe_empty_object = 1; + } + if (lp) + { + h->object_base = h->next_free = (char *) (obj); + h->chunk_limit = lp->limit; + h->chunk = lp; + } + else if (obj != 0) + /* obj is not in any of the chunks! */ + abort (); +} + +int +_obstack_memory_used (struct obstack *h) +{ + register struct _obstack_chunk* lp; + register int nbytes = 0; + + for (lp = h->chunk; lp != 0; lp = lp->prev) + { + nbytes += lp->limit - (char *) lp; + } + return nbytes; +} + +/* Define the error handler. */ +#ifndef _ +# if (HAVE_LIBINTL_H && ENABLE_NLS) || defined _LIBC +# include +# ifndef _ +# define _(Str) gettext (Str) +# endif +# else +# define _(Str) (Str) +# endif +#endif + +static void +print_and_abort (void) +{ + fputs (_("memory exhausted\n"), stderr); + exit (obstack_exit_failure); +} + +#if 0 +/* These are now turned off because the applications do not use it + and it uses bcopy via obstack_grow, which causes trouble on sysV. */ + +/* Now define the functional versions of the obstack macros. + Define them to simply use the corresponding macros to do the job. */ + +/* The function names appear in parentheses in order to prevent + the macro-definitions of the names from being expanded there. */ + +POINTER (obstack_base) (struct obstack *obstack) +{ + return obstack_base (obstack); +} + +POINTER (obstack_next_free) (struct obstack *obstack) +{ + return obstack_next_free (obstack); +} + +int (obstack_object_size) (struct obstack *obstack) +{ + return obstack_object_size (obstack); +} + +int (obstack_room) (struct obstack *obstack) +{ + return obstack_room (obstack); +} + +int (obstack_make_room) (struct obstack *obstack, int length) +{ + return obstack_make_room (obstack, length); +} + +void (obstack_grow) (struct obstack *obstack, POINTER pointer, int length) +{ + obstack_grow (obstack, pointer, length); +} + +void (obstack_grow0) (struct obstack *obstack, POINTER pointer, int length) +{ + obstack_grow0 (obstack, pointer, length); +} + +void (obstack_1grow) (struct obstack *obstack, int character) +{ + obstack_1grow (obstack, character); +} + +void (obstack_blank) (struct obstack *obstack, int length) +{ + obstack_blank (obstack, length); +} + +void (obstack_1grow_fast) (struct obstack *obstack, int character) +{ + obstack_1grow_fast (obstack, character); +} + +void (obstack_blank_fast) (struct obstack *obstack, int length) +{ + obstack_blank_fast (obstack, length); +} + +POINTER (obstack_finish) (struct obstack *obstack) +{ + return obstack_finish (obstack); +} + +POINTER (obstack_alloc) (struct obstack *obstack, int length) +{ + return obstack_alloc (obstack, length); +} + +POINTER (obstack_copy) (struct obstack *obstack, POINTER pointer, int length) +{ + return obstack_copy (obstack, pointer, length); +} + +POINTER (obstack_copy0) (struct obstack *obstack, POINTER pointer, int length) +{ + return obstack_copy0 (obstack, pointer, length); +} + +#endif /* 0 */ + +#endif /* !ELIDE_CODE */ diff --git a/support/cpp/libiberty/obstack.h b/support/cpp/libiberty/obstack.h new file mode 100644 index 0000000..88c2a26 --- /dev/null +++ b/support/cpp/libiberty/obstack.h @@ -0,0 +1,545 @@ +/* obstack.h - object stack macros + Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1996, 1997, 1998, + 1999, 2000, 2001, 2002, 2003, 2004, 2005 + Free Software Foundation, Inc. + + + NOTE: The canonical source of this file is maintained with the GNU C Library. + Bugs can be reported to bug-glibc@gnu.org. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, + USA. */ + +/* Summary: + +All the apparent functions defined here are macros. The idea +is that you would use these pre-tested macros to solve a +very specific set of problems, and they would run fast. +Caution: no side-effects in arguments please!! They may be +evaluated MANY times!! + +These macros operate a stack of objects. Each object starts life +small, and may grow to maturity. (Consider building a word syllable +by syllable.) An object can move while it is growing. Once it has +been "finished" it never changes address again. So the "top of the +stack" is typically an immature growing object, while the rest of the +stack is of mature, fixed size and fixed address objects. + +These routines grab large chunks of memory, using a function you +supply, called `obstack_chunk_alloc'. On occasion, they free chunks, +by calling `obstack_chunk_free'. You must define them and declare +them before using any obstack macros. + +Each independent stack is represented by a `struct obstack'. +Each of the obstack macros expects a pointer to such a structure +as the first argument. + +One motivation for this package is the problem of growing char strings +in symbol tables. Unless you are "fascist pig with a read-only mind" +--Gosper's immortal quote from HAKMEM item 154, out of context--you +would not like to put any arbitrary upper limit on the length of your +symbols. + +In practice this often means you will build many short symbols and a +few long symbols. At the time you are reading a symbol you don't know +how long it is. One traditional method is to read a symbol into a +buffer, realloc()ating the buffer every time you try to read a symbol +that is longer than the buffer. This is beaut, but you still will +want to copy the symbol from the buffer to a more permanent +symbol-table entry say about half the time. + +With obstacks, you can work differently. Use one obstack for all symbol +names. As you read a symbol, grow the name in the obstack gradually. +When the name is complete, finalize it. Then, if the symbol exists already, +free the newly read name. + +The way we do this is to take a large chunk, allocating memory from +low addresses. When you want to build a symbol in the chunk you just +add chars above the current "high water mark" in the chunk. When you +have finished adding chars, because you got to the end of the symbol, +you know how long the chars are, and you can create a new object. +Mostly the chars will not burst over the highest address of the chunk, +because you would typically expect a chunk to be (say) 100 times as +long as an average object. + +In case that isn't clear, when we have enough chars to make up +the object, THEY ARE ALREADY CONTIGUOUS IN THE CHUNK (guaranteed) +so we just point to it where it lies. No moving of chars is +needed and this is the second win: potentially long strings need +never be explicitly shuffled. Once an object is formed, it does not +change its address during its lifetime. + +When the chars burst over a chunk boundary, we allocate a larger +chunk, and then copy the partly formed object from the end of the old +chunk to the beginning of the new larger chunk. We then carry on +accreting characters to the end of the object as we normally would. + +A special macro is provided to add a single char at a time to a +growing object. This allows the use of register variables, which +break the ordinary 'growth' macro. + +Summary: + We allocate large chunks. + We carve out one object at a time from the current chunk. + Once carved, an object never moves. + We are free to append data of any size to the currently + growing object. + Exactly one object is growing in an obstack at any one time. + You can run one obstack per control block. + You may have as many control blocks as you dare. + Because of the way we do it, you can `unwind' an obstack + back to a previous state. (You may remove objects much + as you would with a stack.) +*/ + + +/* Don't do the contents of this file more than once. */ + +#ifndef _OBSTACK_H +#define _OBSTACK_H 1 + +#ifdef __cplusplus +extern "C" { +#endif + +/* We use subtraction of (char *) 0 instead of casting to int + because on word-addressable machines a simple cast to int + may ignore the byte-within-word field of the pointer. */ + +#ifndef __PTR_TO_INT +# define __PTR_TO_INT(P) ((P) - (char *) 0) +#endif + +#ifndef __INT_TO_PTR +# define __INT_TO_PTR(P) ((P) + (char *) 0) +#endif + +/* We need the type of the resulting object. If __PTRDIFF_TYPE__ is + defined, as with GNU C, use that; that way we don't pollute the + namespace with 's symbols. Otherwise, if is + available, include it and use ptrdiff_t. In traditional C, long is + the best that we can do. */ + +#ifdef __PTRDIFF_TYPE__ +# define PTR_INT_TYPE __PTRDIFF_TYPE__ +#else +# ifdef HAVE_STDDEF_H +# include +# define PTR_INT_TYPE ptrdiff_t +# else +# define PTR_INT_TYPE long +# endif +#endif + +#if defined _LIBC || defined HAVE_STRING_H +# include +# define _obstack_memcpy(To, From, N) memcpy ((To), (From), (N)) +#else +# ifdef memcpy +# define _obstack_memcpy(To, From, N) memcpy ((To), (char *)(From), (N)) +# else +# define _obstack_memcpy(To, From, N) bcopy ((char *)(From), (To), (N)) +# endif +#endif + +struct _obstack_chunk /* Lives at front of each chunk. */ +{ + char *limit; /* 1 past end of this chunk */ + struct _obstack_chunk *prev; /* address of prior chunk or NULL */ + char contents[4]; /* objects begin here */ +}; + +struct obstack /* control current object in current chunk */ +{ + long chunk_size; /* preferred size to allocate chunks in */ + struct _obstack_chunk *chunk; /* address of current struct obstack_chunk */ + char *object_base; /* address of object we are building */ + char *next_free; /* where to add next char to current object */ + char *chunk_limit; /* address of char after current chunk */ + PTR_INT_TYPE temp; /* Temporary for some macros. */ + int alignment_mask; /* Mask of alignment for each object. */ + /* These prototypes vary based on `use_extra_arg', and we use + casts to the prototypeless function type in all assignments, + but having prototypes here quiets -Wstrict-prototypes. */ + struct _obstack_chunk *(*chunkfun) (void *, long); + void (*freefun) (void *, struct _obstack_chunk *); + void *extra_arg; /* first arg for chunk alloc/dealloc funcs */ + unsigned use_extra_arg:1; /* chunk alloc/dealloc funcs take extra arg */ + unsigned maybe_empty_object:1;/* There is a possibility that the current + chunk contains a zero-length object. This + prevents freeing the chunk if we allocate + a bigger chunk to replace it. */ + unsigned alloc_failed:1; /* No longer used, as we now call the failed + handler on error, but retained for binary + compatibility. */ +}; + +/* Declare the external functions we use; they are in obstack.c. */ + +extern void _obstack_newchunk (struct obstack *, int); +extern void _obstack_free (struct obstack *, void *); +extern int _obstack_begin (struct obstack *, int, int, + void *(*) (long), void (*) (void *)); +extern int _obstack_begin_1 (struct obstack *, int, int, + void *(*) (void *, long), + void (*) (void *, void *), void *); +extern int _obstack_memory_used (struct obstack *); + +/* Do the function-declarations after the structs + but before defining the macros. */ + +void obstack_init (struct obstack *obstack); + +void * obstack_alloc (struct obstack *obstack, int size); + +void * obstack_copy (struct obstack *obstack, void *address, int size); +void * obstack_copy0 (struct obstack *obstack, void *address, int size); + +void obstack_free (struct obstack *obstack, void *block); + +void obstack_blank (struct obstack *obstack, int size); + +void obstack_grow (struct obstack *obstack, void *data, int size); +void obstack_grow0 (struct obstack *obstack, void *data, int size); + +void obstack_1grow (struct obstack *obstack, int data_char); +void obstack_ptr_grow (struct obstack *obstack, void *data); +void obstack_int_grow (struct obstack *obstack, int data); + +void * obstack_finish (struct obstack *obstack); + +int obstack_object_size (struct obstack *obstack); + +int obstack_room (struct obstack *obstack); +void obstack_make_room (struct obstack *obstack, int size); +void obstack_1grow_fast (struct obstack *obstack, int data_char); +void obstack_ptr_grow_fast (struct obstack *obstack, void *data); +void obstack_int_grow_fast (struct obstack *obstack, int data); +void obstack_blank_fast (struct obstack *obstack, int size); + +void * obstack_base (struct obstack *obstack); +void * obstack_next_free (struct obstack *obstack); +int obstack_alignment_mask (struct obstack *obstack); +int obstack_chunk_size (struct obstack *obstack); +int obstack_memory_used (struct obstack *obstack); + +/* Error handler called when `obstack_chunk_alloc' failed to allocate + more memory. This can be set to a user defined function. The + default action is to print a message and abort. */ +extern void (*obstack_alloc_failed_handler) (void); + +/* Exit value used when `print_and_abort' is used. */ +extern int obstack_exit_failure; + +/* Pointer to beginning of object being allocated or to be allocated next. + Note that this might not be the final address of the object + because a new chunk might be needed to hold the final size. */ + +#define obstack_base(h) ((h)->object_base) + +/* Size for allocating ordinary chunks. */ + +#define obstack_chunk_size(h) ((h)->chunk_size) + +/* Pointer to next byte not yet allocated in current chunk. */ + +#define obstack_next_free(h) ((h)->next_free) + +/* Mask specifying low bits that should be clear in address of an object. */ + +#define obstack_alignment_mask(h) ((h)->alignment_mask) + +/* To prevent prototype warnings provide complete argument list in + standard C version. */ +# define obstack_init(h) \ + _obstack_begin ((h), 0, 0, \ + (void *(*) (long)) obstack_chunk_alloc, (void (*) (void *)) obstack_chunk_free) + +# define obstack_begin(h, size) \ + _obstack_begin ((h), (size), 0, \ + (void *(*) (long)) obstack_chunk_alloc, (void (*) (void *)) obstack_chunk_free) + +# define obstack_specify_allocation(h, size, alignment, chunkfun, freefun) \ + _obstack_begin ((h), (size), (alignment), \ + (void *(*) (long)) (chunkfun), (void (*) (void *)) (freefun)) + +# define obstack_specify_allocation_with_arg(h, size, alignment, chunkfun, freefun, arg) \ + _obstack_begin_1 ((h), (size), (alignment), \ + (void *(*) (void *, long)) (chunkfun), \ + (void (*) (void *, void *)) (freefun), (arg)) + +# define obstack_chunkfun(h, newchunkfun) \ + ((h) -> chunkfun = (struct _obstack_chunk *(*)(void *, long)) (newchunkfun)) + +# define obstack_freefun(h, newfreefun) \ + ((h) -> freefun = (void (*)(void *, struct _obstack_chunk *)) (newfreefun)) + +#define obstack_1grow_fast(h,achar) (*((h)->next_free)++ = (achar)) + +#define obstack_blank_fast(h,n) ((h)->next_free += (n)) + +#define obstack_memory_used(h) _obstack_memory_used (h) + +#if defined __GNUC__ && defined __STDC__ && __STDC__ +/* NextStep 2.0 cc is really gcc 1.93 but it defines __GNUC__ = 2 and + does not implement __extension__. But that compiler doesn't define + __GNUC_MINOR__. */ +# if __GNUC__ < 2 || (__NeXT__ && !__GNUC_MINOR__) +# define __extension__ +# endif + +/* For GNU C, if not -traditional, + we can define these macros to compute all args only once + without using a global variable. + Also, we can avoid using the `temp' slot, to make faster code. */ + +# define obstack_object_size(OBSTACK) \ + __extension__ \ + ({ struct obstack *__o = (OBSTACK); \ + (unsigned) (__o->next_free - __o->object_base); }) + +# define obstack_room(OBSTACK) \ + __extension__ \ + ({ struct obstack *__o = (OBSTACK); \ + (unsigned) (__o->chunk_limit - __o->next_free); }) + +# define obstack_make_room(OBSTACK,length) \ +__extension__ \ +({ struct obstack *__o = (OBSTACK); \ + int __len = (length); \ + if (__o->chunk_limit - __o->next_free < __len) \ + _obstack_newchunk (__o, __len); \ + (void) 0; }) + +# define obstack_empty_p(OBSTACK) \ + __extension__ \ + ({ struct obstack *__o = (OBSTACK); \ + (__o->chunk->prev == 0 && __o->next_free - __o->chunk->contents == 0); }) + +# define obstack_grow(OBSTACK,where,length) \ +__extension__ \ +({ struct obstack *__o = (OBSTACK); \ + int __len = (length); \ + if (__o->next_free + __len > __o->chunk_limit) \ + _obstack_newchunk (__o, __len); \ + _obstack_memcpy (__o->next_free, (where), __len); \ + __o->next_free += __len; \ + (void) 0; }) + +# define obstack_grow0(OBSTACK,where,length) \ +__extension__ \ +({ struct obstack *__o = (OBSTACK); \ + int __len = (length); \ + if (__o->next_free + __len + 1 > __o->chunk_limit) \ + _obstack_newchunk (__o, __len + 1); \ + _obstack_memcpy (__o->next_free, (where), __len); \ + __o->next_free += __len; \ + *(__o->next_free)++ = 0; \ + (void) 0; }) + +# define obstack_1grow(OBSTACK,datum) \ +__extension__ \ +({ struct obstack *__o = (OBSTACK); \ + if (__o->next_free + 1 > __o->chunk_limit) \ + _obstack_newchunk (__o, 1); \ + obstack_1grow_fast (__o, datum); \ + (void) 0; }) + +/* These assume that the obstack alignment is good enough for pointers or ints, + and that the data added so far to the current object + shares that much alignment. */ + +# define obstack_ptr_grow(OBSTACK,datum) \ +__extension__ \ +({ struct obstack *__o = (OBSTACK); \ + if (__o->next_free + sizeof (void *) > __o->chunk_limit) \ + _obstack_newchunk (__o, sizeof (void *)); \ + obstack_ptr_grow_fast (__o, datum); }) + +# define obstack_int_grow(OBSTACK,datum) \ +__extension__ \ +({ struct obstack *__o = (OBSTACK); \ + if (__o->next_free + sizeof (int) > __o->chunk_limit) \ + _obstack_newchunk (__o, sizeof (int)); \ + obstack_int_grow_fast (__o, datum); }) + +# define obstack_ptr_grow_fast(OBSTACK,aptr) \ +__extension__ \ +({ struct obstack *__o1 = (OBSTACK); \ + *(const void **) __o1->next_free = (aptr); \ + __o1->next_free += sizeof (const void *); \ + (void) 0; }) + +# define obstack_int_grow_fast(OBSTACK,aint) \ +__extension__ \ +({ struct obstack *__o1 = (OBSTACK); \ + *(int *) __o1->next_free = (aint); \ + __o1->next_free += sizeof (int); \ + (void) 0; }) + +# define obstack_blank(OBSTACK,length) \ +__extension__ \ +({ struct obstack *__o = (OBSTACK); \ + int __len = (length); \ + if (__o->chunk_limit - __o->next_free < __len) \ + _obstack_newchunk (__o, __len); \ + obstack_blank_fast (__o, __len); \ + (void) 0; }) + +# define obstack_alloc(OBSTACK,length) \ +__extension__ \ +({ struct obstack *__h = (OBSTACK); \ + obstack_blank (__h, (length)); \ + obstack_finish (__h); }) + +# define obstack_copy(OBSTACK,where,length) \ +__extension__ \ +({ struct obstack *__h = (OBSTACK); \ + obstack_grow (__h, (where), (length)); \ + obstack_finish (__h); }) + +# define obstack_copy0(OBSTACK,where,length) \ +__extension__ \ +({ struct obstack *__h = (OBSTACK); \ + obstack_grow0 (__h, (where), (length)); \ + obstack_finish (__h); }) + +/* The local variable is named __o1 to avoid a name conflict + when obstack_blank is called. */ +# define obstack_finish(OBSTACK) \ +__extension__ \ +({ struct obstack *__o1 = (OBSTACK); \ + void *value; \ + value = (void *) __o1->object_base; \ + if (__o1->next_free == value) \ + __o1->maybe_empty_object = 1; \ + __o1->next_free \ + = __INT_TO_PTR ((__PTR_TO_INT (__o1->next_free)+__o1->alignment_mask)\ + & ~ (__o1->alignment_mask)); \ + if (__o1->next_free - (char *)__o1->chunk \ + > __o1->chunk_limit - (char *)__o1->chunk) \ + __o1->next_free = __o1->chunk_limit; \ + __o1->object_base = __o1->next_free; \ + value; }) + +# define obstack_free(OBSTACK, OBJ) \ +__extension__ \ +({ struct obstack *__o = (OBSTACK); \ + void *__obj = (void *) (OBJ); \ + if (__obj > (void *)__o->chunk && __obj < (void *)__o->chunk_limit) \ + __o->next_free = __o->object_base = (char *) __obj; \ + else (obstack_free) (__o, __obj); }) + +#else /* not __GNUC__ or not __STDC__ */ + +# define obstack_object_size(h) \ + (unsigned) ((h)->next_free - (h)->object_base) + +# define obstack_room(h) \ + (unsigned) ((h)->chunk_limit - (h)->next_free) + +# define obstack_empty_p(h) \ + ((h)->chunk->prev == 0 && (h)->next_free - (h)->chunk->contents == 0) + +/* Note that the call to _obstack_newchunk is enclosed in (..., 0) + so that we can avoid having void expressions + in the arms of the conditional expression. + Casting the third operand to void was tried before, + but some compilers won't accept it. */ + +# define obstack_make_room(h,length) \ +( (h)->temp = (length), \ + (((h)->next_free + (h)->temp > (h)->chunk_limit) \ + ? (_obstack_newchunk ((h), (h)->temp), 0) : 0)) + +# define obstack_grow(h,where,length) \ +( (h)->temp = (length), \ + (((h)->next_free + (h)->temp > (h)->chunk_limit) \ + ? (_obstack_newchunk ((h), (h)->temp), 0) : 0), \ + _obstack_memcpy ((h)->next_free, (where), (h)->temp), \ + (h)->next_free += (h)->temp) + +# define obstack_grow0(h,where,length) \ +( (h)->temp = (length), \ + (((h)->next_free + (h)->temp + 1 > (h)->chunk_limit) \ + ? (_obstack_newchunk ((h), (h)->temp + 1), 0) : 0), \ + _obstack_memcpy ((h)->next_free, (where), (h)->temp), \ + (h)->next_free += (h)->temp, \ + *((h)->next_free)++ = 0) + +# define obstack_1grow(h,datum) \ +( (((h)->next_free + 1 > (h)->chunk_limit) \ + ? (_obstack_newchunk ((h), 1), 0) : 0), \ + obstack_1grow_fast (h, datum)) + +# define obstack_ptr_grow(h,datum) \ +( (((h)->next_free + sizeof (char *) > (h)->chunk_limit) \ + ? (_obstack_newchunk ((h), sizeof (char *)), 0) : 0), \ + obstack_ptr_grow_fast (h, datum)) + +# define obstack_int_grow(h,datum) \ +( (((h)->next_free + sizeof (int) > (h)->chunk_limit) \ + ? (_obstack_newchunk ((h), sizeof (int)), 0) : 0), \ + obstack_int_grow_fast (h, datum)) + +# define obstack_ptr_grow_fast(h,aptr) \ + (((const void **) ((h)->next_free += sizeof (void *)))[-1] = (aptr)) + +# define obstack_int_grow_fast(h,aint) \ + (((int *) ((h)->next_free += sizeof (int)))[-1] = (aptr)) + +# define obstack_blank(h,length) \ +( (h)->temp = (length), \ + (((h)->chunk_limit - (h)->next_free < (h)->temp) \ + ? (_obstack_newchunk ((h), (h)->temp), 0) : 0), \ + obstack_blank_fast (h, (h)->temp)) + +# define obstack_alloc(h,length) \ + (obstack_blank ((h), (length)), obstack_finish ((h))) + +# define obstack_copy(h,where,length) \ + (obstack_grow ((h), (where), (length)), obstack_finish ((h))) + +# define obstack_copy0(h,where,length) \ + (obstack_grow0 ((h), (where), (length)), obstack_finish ((h))) + +# define obstack_finish(h) \ +( ((h)->next_free == (h)->object_base \ + ? (((h)->maybe_empty_object = 1), 0) \ + : 0), \ + (h)->temp = __PTR_TO_INT ((h)->object_base), \ + (h)->next_free \ + = __INT_TO_PTR ((__PTR_TO_INT ((h)->next_free)+(h)->alignment_mask) \ + & ~ ((h)->alignment_mask)), \ + (((h)->next_free - (char *) (h)->chunk \ + > (h)->chunk_limit - (char *) (h)->chunk) \ + ? ((h)->next_free = (h)->chunk_limit) : 0), \ + (h)->object_base = (h)->next_free, \ + __INT_TO_PTR ((h)->temp)) + +# define obstack_free(h,obj) \ +( (h)->temp = (char *) (obj) - (char *) (h)->chunk, \ + (((h)->temp > 0 && (h)->temp < (h)->chunk_limit - (char *) (h)->chunk)\ + ? (int) ((h)->next_free = (h)->object_base \ + = (h)->temp + (char *) (h)->chunk) \ + : (((obstack_free) ((h), (h)->temp + (char *) (h)->chunk), 0), 0))) + +#endif /* not __GNUC__ or not __STDC__ */ + +#ifdef __cplusplus +} /* C++ */ +#endif + +#endif /* obstack.h */ diff --git a/support/cpp/libiberty/safe-ctype.c b/support/cpp/libiberty/safe-ctype.c new file mode 100644 index 0000000..0972b4b --- /dev/null +++ b/support/cpp/libiberty/safe-ctype.c @@ -0,0 +1,255 @@ +/* replacement macros. + + Copyright (C) 2000, 2001, 2002, 2003, 2004, + 2005 Free Software Foundation, Inc. + Contributed by Zack Weinberg . + +This file is part of the libiberty library. +Libiberty is free software; you can redistribute it and/or +modify it under the terms of the GNU Library General Public +License as published by the Free Software Foundation; either +version 2 of the License, or (at your option) any later version. + +Libiberty is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Library General Public License for more details. + +You should have received a copy of the GNU Library General Public +License along with libiberty; see the file COPYING.LIB. If +not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, +Boston, MA 02110-1301, USA. */ + +/* + +@defvr Extension HOST_CHARSET +This macro indicates the basic character set and encoding used by the +host: more precisely, the encoding used for character constants in +preprocessor @samp{#if} statements (the C "execution character set"). +It is defined by @file{safe-ctype.h}, and will be an integer constant +with one of the following values: + +@ftable @code +@item HOST_CHARSET_UNKNOWN +The host character set is unknown - that is, not one of the next two +possibilities. + +@item HOST_CHARSET_ASCII +The host character set is ASCII. + +@item HOST_CHARSET_EBCDIC +The host character set is some variant of EBCDIC. (Only one of the +nineteen EBCDIC varying characters is tested; exercise caution.) +@end ftable +@end defvr + +@deffn Extension ISALPHA (@var{c}) +@deffnx Extension ISALNUM (@var{c}) +@deffnx Extension ISBLANK (@var{c}) +@deffnx Extension ISCNTRL (@var{c}) +@deffnx Extension ISDIGIT (@var{c}) +@deffnx Extension ISGRAPH (@var{c}) +@deffnx Extension ISLOWER (@var{c}) +@deffnx Extension ISPRINT (@var{c}) +@deffnx Extension ISPUNCT (@var{c}) +@deffnx Extension ISSPACE (@var{c}) +@deffnx Extension ISUPPER (@var{c}) +@deffnx Extension ISXDIGIT (@var{c}) + +These twelve macros are defined by @file{safe-ctype.h}. Each has the +same meaning as the corresponding macro (with name in lowercase) +defined by the standard header @file{ctype.h}. For example, +@code{ISALPHA} returns true for alphabetic characters and false for +others. However, there are two differences between these macros and +those provided by @file{ctype.h}: + +@itemize @bullet +@item These macros are guaranteed to have well-defined behavior for all +values representable by @code{signed char} and @code{unsigned char}, and +for @code{EOF}. + +@item These macros ignore the current locale; they are true for these +fixed sets of characters: +@multitable {@code{XDIGIT}} {yada yada yada yada yada yada yada yada} +@item @code{ALPHA} @tab @kbd{A-Za-z} +@item @code{ALNUM} @tab @kbd{A-Za-z0-9} +@item @code{BLANK} @tab @kbd{space tab} +@item @code{CNTRL} @tab @code{!PRINT} +@item @code{DIGIT} @tab @kbd{0-9} +@item @code{GRAPH} @tab @code{ALNUM || PUNCT} +@item @code{LOWER} @tab @kbd{a-z} +@item @code{PRINT} @tab @code{GRAPH ||} @kbd{space} +@item @code{PUNCT} @tab @kbd{`~!@@#$%^&*()_-=+[@{]@}\|;:'",<.>/?} +@item @code{SPACE} @tab @kbd{space tab \n \r \f \v} +@item @code{UPPER} @tab @kbd{A-Z} +@item @code{XDIGIT} @tab @kbd{0-9A-Fa-f} +@end multitable + +Note that, if the host character set is ASCII or a superset thereof, +all these macros will return false for all values of @code{char} outside +the range of 7-bit ASCII. In particular, both ISPRINT and ISCNTRL return +false for characters with numeric values from 128 to 255. +@end itemize +@end deffn + +@deffn Extension ISIDNUM (@var{c}) +@deffnx Extension ISIDST (@var{c}) +@deffnx Extension IS_VSPACE (@var{c}) +@deffnx Extension IS_NVSPACE (@var{c}) +@deffnx Extension IS_SPACE_OR_NUL (@var{c}) +@deffnx Extension IS_ISOBASIC (@var{c}) +These six macros are defined by @file{safe-ctype.h} and provide +additional character classes which are useful when doing lexical +analysis of C or similar languages. They are true for the following +sets of characters: + +@multitable {@code{SPACE_OR_NUL}} {yada yada yada yada yada yada yada yada} +@item @code{IDNUM} @tab @kbd{A-Za-z0-9_} +@item @code{IDST} @tab @kbd{A-Za-z_} +@item @code{VSPACE} @tab @kbd{\r \n} +@item @code{NVSPACE} @tab @kbd{space tab \f \v \0} +@item @code{SPACE_OR_NUL} @tab @code{VSPACE || NVSPACE} +@item @code{ISOBASIC} @tab @code{VSPACE || NVSPACE || PRINT} +@end multitable +@end deffn + +*/ + +#include "ansidecl.h" +#include +#include /* for EOF */ + +#if EOF != -1 + #error " requires EOF == -1" +#endif + +/* Shorthand */ +#define bl _sch_isblank +#define cn _sch_iscntrl +#define di _sch_isdigit +#define is _sch_isidst +#define lo _sch_islower +#define nv _sch_isnvsp +#define pn _sch_ispunct +#define pr _sch_isprint +#define sp _sch_isspace +#define up _sch_isupper +#define vs _sch_isvsp +#define xd _sch_isxdigit + +/* Masks. */ +#define L (const unsigned short) (lo|is |pr) /* lower case letter */ +#define XL (const unsigned short) (lo|is|xd|pr) /* lowercase hex digit */ +#define U (const unsigned short) (up|is |pr) /* upper case letter */ +#define XU (const unsigned short) (up|is|xd|pr) /* uppercase hex digit */ +#define D (const unsigned short) (di |xd|pr) /* decimal digit */ +#define P (const unsigned short) (pn |pr) /* punctuation */ +#define _ (const unsigned short) (pn|is |pr) /* underscore */ + +#define C (const unsigned short) ( cn) /* control character */ +#define Z (const unsigned short) (nv |cn) /* NUL */ +#define M (const unsigned short) (nv|sp |cn) /* cursor movement: \f \v */ +#define V (const unsigned short) (vs|sp |cn) /* vertical space: \r \n */ +#define T (const unsigned short) (nv|sp|bl|cn) /* tab */ +#define S (const unsigned short) (nv|sp|bl|pr) /* space */ + +/* Are we ASCII? */ +#if HOST_CHARSET == HOST_CHARSET_ASCII + +const unsigned short _sch_istable[256] = +{ + Z, C, C, C, C, C, C, C, /* NUL SOH STX ETX EOT ENQ ACK BEL */ + C, T, V, M, M, V, C, C, /* BS HT LF VT FF CR SO SI */ + C, C, C, C, C, C, C, C, /* DLE DC1 DC2 DC3 DC4 NAK SYN ETB */ + C, C, C, C, C, C, C, C, /* CAN EM SUB ESC FS GS RS US */ + S, P, P, P, P, P, P, P, /* SP ! " # $ % & ' */ + P, P, P, P, P, P, P, P, /* ( ) * + , - . / */ + D, D, D, D, D, D, D, D, /* 0 1 2 3 4 5 6 7 */ + D, D, P, P, P, P, P, P, /* 8 9 : ; < = > ? */ + P, XU, XU, XU, XU, XU, XU, U, /* @ A B C D E F G */ + U, U, U, U, U, U, U, U, /* H I J K L M N O */ + U, U, U, U, U, U, U, U, /* P Q R S T U V W */ + U, U, U, P, P, P, P, _, /* X Y Z [ \ ] ^ _ */ + P, XL, XL, XL, XL, XL, XL, L, /* ` a b c d e f g */ + L, L, L, L, L, L, L, L, /* h i j k l m n o */ + L, L, L, L, L, L, L, L, /* p q r s t u v w */ + L, L, L, P, P, P, P, C, /* x y z { | } ~ DEL */ + + /* high half of unsigned char is locale-specific, so all tests are + false in "C" locale */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, +}; + +const unsigned char _sch_tolower[256] = +{ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, + 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, + 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, + 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, + 64, + + 'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i', 'j', 'k', 'l', 'm', + 'n', 'o', 'p', 'q', 'r', 's', 't', 'u', 'v', 'w', 'x', 'y', 'z', + + 91, 92, 93, 94, 95, 96, + + 'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i', 'j', 'k', 'l', 'm', + 'n', 'o', 'p', 'q', 'r', 's', 't', 'u', 'v', 'w', 'x', 'y', 'z', + + 123,124,125,126,127, + + 128,129,130,131, 132,133,134,135, 136,137,138,139, 140,141,142,143, + 144,145,146,147, 148,149,150,151, 152,153,154,155, 156,157,158,159, + 160,161,162,163, 164,165,166,167, 168,169,170,171, 172,173,174,175, + 176,177,178,179, 180,181,182,183, 184,185,186,187, 188,189,190,191, + + 192,193,194,195, 196,197,198,199, 200,201,202,203, 204,205,206,207, + 208,209,210,211, 212,213,214,215, 216,217,218,219, 220,221,222,223, + 224,225,226,227, 228,229,230,231, 232,233,234,235, 236,237,238,239, + 240,241,242,243, 244,245,246,247, 248,249,250,251, 252,253,254,255, +}; + +const unsigned char _sch_toupper[256] = +{ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, + 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, + 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, + 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, + 64, + + 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J', 'K', 'L', 'M', + 'N', 'O', 'P', 'Q', 'R', 'S', 'T', 'U', 'V', 'W', 'X', 'Y', 'Z', + + 91, 92, 93, 94, 95, 96, + + 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J', 'K', 'L', 'M', + 'N', 'O', 'P', 'Q', 'R', 'S', 'T', 'U', 'V', 'W', 'X', 'Y', 'Z', + + 123,124,125,126,127, + + 128,129,130,131, 132,133,134,135, 136,137,138,139, 140,141,142,143, + 144,145,146,147, 148,149,150,151, 152,153,154,155, 156,157,158,159, + 160,161,162,163, 164,165,166,167, 168,169,170,171, 172,173,174,175, + 176,177,178,179, 180,181,182,183, 184,185,186,187, 188,189,190,191, + + 192,193,194,195, 196,197,198,199, 200,201,202,203, 204,205,206,207, + 208,209,210,211, 212,213,214,215, 216,217,218,219, 220,221,222,223, + 224,225,226,227, 228,229,230,231, 232,233,234,235, 236,237,238,239, + 240,241,242,243, 244,245,246,247, 248,249,250,251, 252,253,254,255, +}; + +#else +# if HOST_CHARSET == HOST_CHARSET_EBCDIC + #error "FIXME: write tables for EBCDIC" +# else + #error "Unrecognized host character set" +# endif +#endif diff --git a/support/cpp/libiberty/safe-ctype.h b/support/cpp/libiberty/safe-ctype.h new file mode 100644 index 0000000..e59b357 --- /dev/null +++ b/support/cpp/libiberty/safe-ctype.h @@ -0,0 +1,119 @@ +/* replacement macros. + + Copyright (C) 2000, 2001 Free Software Foundation, Inc. + Contributed by Zack Weinberg . + +This file is part of the libiberty library. +Libiberty is free software; you can redistribute it and/or +modify it under the terms of the GNU Library General Public +License as published by the Free Software Foundation; either +version 2 of the License, or (at your option) any later version. + +Libiberty is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Library General Public License for more details. + +You should have received a copy of the GNU Library General Public +License along with libiberty; see the file COPYING.LIB. If +not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, +Boston, MA 02110-1301, USA. */ + +/* This is a compatible replacement of the standard C library's + with the following properties: + + - Implements all isxxx() macros required by C99. + - Also implements some character classes useful when + parsing C-like languages. + - Does not change behavior depending on the current locale. + - Behaves properly for all values in the range of a signed or + unsigned char. + + To avoid conflicts, this header defines the isxxx functions in upper + case, e.g. ISALPHA not isalpha. */ + +#ifndef SAFE_CTYPE_H +#define SAFE_CTYPE_H + +#ifdef isalpha + #error "safe-ctype.h and ctype.h may not be used simultaneously" +#endif + +/* Determine host character set. */ +#define HOST_CHARSET_UNKNOWN 0 +#define HOST_CHARSET_ASCII 1 +#define HOST_CHARSET_EBCDIC 2 + +#if '\n' == 0x0A && ' ' == 0x20 && '0' == 0x30 \ + && 'A' == 0x41 && 'a' == 0x61 && '!' == 0x21 +# define HOST_CHARSET HOST_CHARSET_ASCII +#else +# if '\n' == 0x15 && ' ' == 0x40 && '0' == 0xF0 \ + && 'A' == 0xC1 && 'a' == 0x81 && '!' == 0x5A +# define HOST_CHARSET HOST_CHARSET_EBCDIC +# else +# define HOST_CHARSET HOST_CHARSET_UNKNOWN +# endif +#endif + +/* Categories. */ + +enum { + /* In C99 */ + _sch_isblank = 0x0001, /* space \t */ + _sch_iscntrl = 0x0002, /* nonprinting characters */ + _sch_isdigit = 0x0004, /* 0-9 */ + _sch_islower = 0x0008, /* a-z */ + _sch_isprint = 0x0010, /* any printing character including ' ' */ + _sch_ispunct = 0x0020, /* all punctuation */ + _sch_isspace = 0x0040, /* space \t \n \r \f \v */ + _sch_isupper = 0x0080, /* A-Z */ + _sch_isxdigit = 0x0100, /* 0-9A-Fa-f */ + + /* Extra categories useful to cpplib. */ + _sch_isidst = 0x0200, /* A-Za-z_ */ + _sch_isvsp = 0x0400, /* \n \r */ + _sch_isnvsp = 0x0800, /* space \t \f \v \0 */ + + /* Combinations of the above. */ + _sch_isalpha = _sch_isupper|_sch_islower, /* A-Za-z */ + _sch_isalnum = _sch_isalpha|_sch_isdigit, /* A-Za-z0-9 */ + _sch_isidnum = _sch_isidst|_sch_isdigit, /* A-Za-z0-9_ */ + _sch_isgraph = _sch_isalnum|_sch_ispunct, /* isprint and not space */ + _sch_iscppsp = _sch_isvsp|_sch_isnvsp, /* isspace + \0 */ + _sch_isbasic = _sch_isprint|_sch_iscppsp /* basic charset of ISO C + (plus ` and @) */ +}; + +/* Character classification. */ +extern const unsigned short _sch_istable[256]; + +#define _sch_test(c, bit) (_sch_istable[(c) & 0xff] & (unsigned short)(bit)) + +#define ISALPHA(c) _sch_test(c, _sch_isalpha) +#define ISALNUM(c) _sch_test(c, _sch_isalnum) +#define ISBLANK(c) _sch_test(c, _sch_isblank) +#define ISCNTRL(c) _sch_test(c, _sch_iscntrl) +#define ISDIGIT(c) _sch_test(c, _sch_isdigit) +#define ISGRAPH(c) _sch_test(c, _sch_isgraph) +#define ISLOWER(c) _sch_test(c, _sch_islower) +#define ISPRINT(c) _sch_test(c, _sch_isprint) +#define ISPUNCT(c) _sch_test(c, _sch_ispunct) +#define ISSPACE(c) _sch_test(c, _sch_isspace) +#define ISUPPER(c) _sch_test(c, _sch_isupper) +#define ISXDIGIT(c) _sch_test(c, _sch_isxdigit) + +#define ISIDNUM(c) _sch_test(c, _sch_isidnum) +#define ISIDST(c) _sch_test(c, _sch_isidst) +#define IS_ISOBASIC(c) _sch_test(c, _sch_isbasic) +#define IS_VSPACE(c) _sch_test(c, _sch_isvsp) +#define IS_NVSPACE(c) _sch_test(c, _sch_isnvsp) +#define IS_SPACE_OR_NUL(c) _sch_test(c, _sch_iscppsp) + +/* Character transformation. */ +extern const unsigned char _sch_toupper[256]; +extern const unsigned char _sch_tolower[256]; +#define TOUPPER(c) _sch_toupper[(c) & 0xff] +#define TOLOWER(c) _sch_tolower[(c) & 0xff] + +#endif /* SAFE_CTYPE_H */ diff --git a/support/cpp/libiberty/splay-tree.c b/support/cpp/libiberty/splay-tree.c new file mode 100644 index 0000000..9eff94a --- /dev/null +++ b/support/cpp/libiberty/splay-tree.c @@ -0,0 +1,526 @@ +/* A splay-tree datatype. + Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc. + Contributed by Mark Mitchell (mark@markmitchell.com). + +This file is part of GNU CC. + +GNU CC is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GNU CC is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 51 Franklin Street - Fifth Floor, +Boston, MA 02110-1301, USA. */ + +/* For an easily readable description of splay-trees, see: + + Lewis, Harry R. and Denenberg, Larry. Data Structures and Their + Algorithms. Harper-Collins, Inc. 1991. */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#ifdef HAVE_STDLIB_H +#include +#endif + +#include + +#include "libiberty.h" +#include "splay-tree.h" + +static void splay_tree_delete_helper (splay_tree, splay_tree_node); +static inline void rotate_left (splay_tree_node *, + splay_tree_node, splay_tree_node); +static inline void rotate_right (splay_tree_node *, + splay_tree_node, splay_tree_node); +static void splay_tree_splay (splay_tree, splay_tree_key); +static int splay_tree_foreach_helper (splay_tree, splay_tree_node, + splay_tree_foreach_fn, void*); + +/* Deallocate NODE (a member of SP), and all its sub-trees. */ + +static void +splay_tree_delete_helper (splay_tree sp, splay_tree_node node) +{ + splay_tree_node pending = 0; + splay_tree_node active = 0; + + if (!node) + return; + +#define KDEL(x) if (sp->delete_key) (*sp->delete_key)(x); +#define VDEL(x) if (sp->delete_value) (*sp->delete_value)(x); + + KDEL (node->key); + VDEL (node->value); + + /* We use the "key" field to hold the "next" pointer. */ + node->key = (splay_tree_key)pending; + pending = (splay_tree_node)node; + + /* Now, keep processing the pending list until there aren't any + more. This is a little more complicated than just recursing, but + it doesn't toast the stack for large trees. */ + + while (pending) + { + active = pending; + pending = 0; + while (active) + { + splay_tree_node temp; + + /* active points to a node which has its key and value + deallocated, we just need to process left and right. */ + + if (active->left) + { + KDEL (active->left->key); + VDEL (active->left->value); + active->left->key = (splay_tree_key)pending; + pending = (splay_tree_node)(active->left); + } + if (active->right) + { + KDEL (active->right->key); + VDEL (active->right->value); + active->right->key = (splay_tree_key)pending; + pending = (splay_tree_node)(active->right); + } + + temp = active; + active = (splay_tree_node)(temp->key); + (*sp->deallocate) ((char*) temp, sp->allocate_data); + } + } +#undef KDEL +#undef VDEL +} + +/* Rotate the edge joining the left child N with its parent P. PP is the + grandparents' pointer to P. */ + +static inline void +rotate_left (splay_tree_node *pp, splay_tree_node p, splay_tree_node n) +{ + splay_tree_node tmp; + tmp = n->right; + n->right = p; + p->left = tmp; + *pp = n; +} + +/* Rotate the edge joining the right child N with its parent P. PP is the + grandparents' pointer to P. */ + +static inline void +rotate_right (splay_tree_node *pp, splay_tree_node p, splay_tree_node n) +{ + splay_tree_node tmp; + tmp = n->left; + n->left = p; + p->right = tmp; + *pp = n; +} + +/* Bottom up splay of key. */ + +static void +splay_tree_splay (splay_tree sp, splay_tree_key key) +{ + if (sp->root == 0) + return; + + do { + int cmp1, cmp2; + splay_tree_node n, c; + + n = sp->root; + cmp1 = (*sp->comp) (key, n->key); + + /* Found. */ + if (cmp1 == 0) + return; + + /* Left or right? If no child, then we're done. */ + if (cmp1 < 0) + c = n->left; + else + c = n->right; + if (!c) + return; + + /* Next one left or right? If found or no child, we're done + after one rotation. */ + cmp2 = (*sp->comp) (key, c->key); + if (cmp2 == 0 + || (cmp2 < 0 && !c->left) + || (cmp2 > 0 && !c->right)) + { + if (cmp1 < 0) + rotate_left (&sp->root, n, c); + else + rotate_right (&sp->root, n, c); + return; + } + + /* Now we have the four cases of double-rotation. */ + if (cmp1 < 0 && cmp2 < 0) + { + rotate_left (&n->left, c, c->left); + rotate_left (&sp->root, n, n->left); + } + else if (cmp1 > 0 && cmp2 > 0) + { + rotate_right (&n->right, c, c->right); + rotate_right (&sp->root, n, n->right); + } + else if (cmp1 < 0 && cmp2 > 0) + { + rotate_right (&n->left, c, c->right); + rotate_left (&sp->root, n, n->left); + } + else if (cmp1 > 0 && cmp2 < 0) + { + rotate_left (&n->right, c, c->left); + rotate_right (&sp->root, n, n->right); + } + } while (1); +} + +/* Call FN, passing it the DATA, for every node below NODE, all of + which are from SP, following an in-order traversal. If FN every + returns a non-zero value, the iteration ceases immediately, and the + value is returned. Otherwise, this function returns 0. */ + +static int +splay_tree_foreach_helper (splay_tree sp, splay_tree_node node, + splay_tree_foreach_fn fn, void *data) +{ + int val; + + if (!node) + return 0; + + val = splay_tree_foreach_helper (sp, node->left, fn, data); + if (val) + return val; + + val = (*fn)(node, data); + if (val) + return val; + + return splay_tree_foreach_helper (sp, node->right, fn, data); +} + + +/* An allocator and deallocator based on xmalloc. */ +static void * +splay_tree_xmalloc_allocate (int size, void *data ATTRIBUTE_UNUSED) +{ + return (void *) xmalloc (size); +} + +static void +splay_tree_xmalloc_deallocate (void *object, void *data ATTRIBUTE_UNUSED) +{ + free (object); +} + + +/* Allocate a new splay tree, using COMPARE_FN to compare nodes, + DELETE_KEY_FN to deallocate keys, and DELETE_VALUE_FN to deallocate + values. Use xmalloc to allocate the splay tree structure, and any + nodes added. */ + +splay_tree +splay_tree_new (splay_tree_compare_fn compare_fn, + splay_tree_delete_key_fn delete_key_fn, + splay_tree_delete_value_fn delete_value_fn) +{ + return (splay_tree_new_with_allocator + (compare_fn, delete_key_fn, delete_value_fn, + splay_tree_xmalloc_allocate, splay_tree_xmalloc_deallocate, 0)); +} + + +/* Allocate a new splay tree, using COMPARE_FN to compare nodes, + DELETE_KEY_FN to deallocate keys, and DELETE_VALUE_FN to deallocate + values. */ + +splay_tree +splay_tree_new_with_allocator (splay_tree_compare_fn compare_fn, + splay_tree_delete_key_fn delete_key_fn, + splay_tree_delete_value_fn delete_value_fn, + splay_tree_allocate_fn allocate_fn, + splay_tree_deallocate_fn deallocate_fn, + void *allocate_data) +{ + splay_tree sp = (splay_tree) (*allocate_fn) (sizeof (struct splay_tree_s), + allocate_data); + sp->root = 0; + sp->comp = compare_fn; + sp->delete_key = delete_key_fn; + sp->delete_value = delete_value_fn; + sp->allocate = allocate_fn; + sp->deallocate = deallocate_fn; + sp->allocate_data = allocate_data; + + return sp; +} + +/* Deallocate SP. */ + +void +splay_tree_delete (splay_tree sp) +{ + splay_tree_delete_helper (sp, sp->root); + (*sp->deallocate) ((char*) sp, sp->allocate_data); +} + +/* Insert a new node (associating KEY with DATA) into SP. If a + previous node with the indicated KEY exists, its data is replaced + with the new value. Returns the new node. */ + +splay_tree_node +splay_tree_insert (splay_tree sp, splay_tree_key key, splay_tree_value value) +{ + int comparison = 0; + + splay_tree_splay (sp, key); + + if (sp->root) + comparison = (*sp->comp)(sp->root->key, key); + + if (sp->root && comparison == 0) + { + /* If the root of the tree already has the indicated KEY, just + replace the value with VALUE. */ + if (sp->delete_value) + (*sp->delete_value)(sp->root->value); + sp->root->value = value; + } + else + { + /* Create a new node, and insert it at the root. */ + splay_tree_node node; + + node = ((splay_tree_node) + (*sp->allocate) (sizeof (struct splay_tree_node_s), + sp->allocate_data)); + node->key = key; + node->value = value; + + if (!sp->root) + node->left = node->right = 0; + else if (comparison < 0) + { + node->left = sp->root; + node->right = node->left->right; + node->left->right = 0; + } + else + { + node->right = sp->root; + node->left = node->right->left; + node->right->left = 0; + } + + sp->root = node; + } + + return sp->root; +} + +/* Remove KEY from SP. It is not an error if it did not exist. */ + +void +splay_tree_remove (splay_tree sp, splay_tree_key key) +{ + splay_tree_splay (sp, key); + + if (sp->root && (*sp->comp) (sp->root->key, key) == 0) + { + splay_tree_node left, right; + + left = sp->root->left; + right = sp->root->right; + + /* Delete the root node itself. */ + if (sp->delete_value) + (*sp->delete_value) (sp->root->value); + (*sp->deallocate) (sp->root, sp->allocate_data); + + /* One of the children is now the root. Doesn't matter much + which, so long as we preserve the properties of the tree. */ + if (left) + { + sp->root = left; + + /* If there was a right child as well, hang it off the + right-most leaf of the left child. */ + if (right) + { + while (left->right) + left = left->right; + left->right = right; + } + } + else + sp->root = right; + } +} + +/* Lookup KEY in SP, returning VALUE if present, and NULL + otherwise. */ + +splay_tree_node +splay_tree_lookup (splay_tree sp, splay_tree_key key) +{ + splay_tree_splay (sp, key); + + if (sp->root && (*sp->comp)(sp->root->key, key) == 0) + return sp->root; + else + return 0; +} + +/* Return the node in SP with the greatest key. */ + +splay_tree_node +splay_tree_max (splay_tree sp) +{ + splay_tree_node n = sp->root; + + if (!n) + return NULL; + + while (n->right) + n = n->right; + + return n; +} + +/* Return the node in SP with the smallest key. */ + +splay_tree_node +splay_tree_min (splay_tree sp) +{ + splay_tree_node n = sp->root; + + if (!n) + return NULL; + + while (n->left) + n = n->left; + + return n; +} + +/* Return the immediate predecessor KEY, or NULL if there is no + predecessor. KEY need not be present in the tree. */ + +splay_tree_node +splay_tree_predecessor (splay_tree sp, splay_tree_key key) +{ + int comparison; + splay_tree_node node; + + /* If the tree is empty, there is certainly no predecessor. */ + if (!sp->root) + return NULL; + + /* Splay the tree around KEY. That will leave either the KEY + itself, its predecessor, or its successor at the root. */ + splay_tree_splay (sp, key); + comparison = (*sp->comp)(sp->root->key, key); + + /* If the predecessor is at the root, just return it. */ + if (comparison < 0) + return sp->root; + + /* Otherwise, find the rightmost element of the left subtree. */ + node = sp->root->left; + if (node) + while (node->right) + node = node->right; + + return node; +} + +/* Return the immediate successor KEY, or NULL if there is no + successor. KEY need not be present in the tree. */ + +splay_tree_node +splay_tree_successor (splay_tree sp, splay_tree_key key) +{ + int comparison; + splay_tree_node node; + + /* If the tree is empty, there is certainly no successor. */ + if (!sp->root) + return NULL; + + /* Splay the tree around KEY. That will leave either the KEY + itself, its predecessor, or its successor at the root. */ + splay_tree_splay (sp, key); + comparison = (*sp->comp)(sp->root->key, key); + + /* If the successor is at the root, just return it. */ + if (comparison > 0) + return sp->root; + + /* Otherwise, find the leftmost element of the right subtree. */ + node = sp->root->right; + if (node) + while (node->left) + node = node->left; + + return node; +} + +/* Call FN, passing it the DATA, for every node in SP, following an + in-order traversal. If FN every returns a non-zero value, the + iteration ceases immediately, and the value is returned. + Otherwise, this function returns 0. */ + +int +splay_tree_foreach (splay_tree sp, splay_tree_foreach_fn fn, void *data) +{ + return splay_tree_foreach_helper (sp, sp->root, fn, data); +} + +/* Splay-tree comparison function, treating the keys as ints. */ + +int +splay_tree_compare_ints (splay_tree_key k1, splay_tree_key k2) +{ + if ((int) k1 < (int) k2) + return -1; + else if ((int) k1 > (int) k2) + return 1; + else + return 0; +} + +/* Splay-tree comparison function, treating the keys as pointers. */ + +int +splay_tree_compare_pointers (splay_tree_key k1, splay_tree_key k2) +{ + if ((char*) k1 < (char*) k2) + return -1; + else if ((char*) k1 > (char*) k2) + return 1; + else + return 0; +} diff --git a/support/cpp/libiberty/splay-tree.h b/support/cpp/libiberty/splay-tree.h new file mode 100644 index 0000000..f9425db --- /dev/null +++ b/support/cpp/libiberty/splay-tree.h @@ -0,0 +1,152 @@ +/* A splay-tree datatype. + Copyright 1998, 1999, 2000, 2002, 2007 Free Software Foundation, Inc. + Contributed by Mark Mitchell (mark@markmitchell.com). + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING. If not, write to + the Free Software Foundation, 51 Franklin Street - Fifth Floor, + Boston, MA 02110-1301, USA. */ + +/* For an easily readable description of splay-trees, see: + + Lewis, Harry R. and Denenberg, Larry. Data Structures and Their + Algorithms. Harper-Collins, Inc. 1991. + + The major feature of splay trees is that all basic tree operations + are amortized O(log n) time for a tree with n nodes. */ + +#ifndef _SPLAY_TREE_H +#define _SPLAY_TREE_H + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#include "ansidecl.h" + +#ifndef _WIN64 + typedef unsigned long int libi_uhostptr_t; + typedef long int libi_shostptr_t; +#else + typedef unsigned long long libi_uhostptr_t; + typedef long long libi_shostptr_t; +#endif + +#ifndef GTY +#define GTY(X) +#endif + +/* Use typedefs for the key and data types to facilitate changing + these types, if necessary. These types should be sufficiently wide + that any pointer or scalar can be cast to these types, and then + cast back, without loss of precision. */ +typedef libi_uhostptr_t splay_tree_key; +typedef libi_uhostptr_t splay_tree_value; + +/* Forward declaration for a node in the tree. */ +typedef struct splay_tree_node_s *splay_tree_node; + +/* The type of a function which compares two splay-tree keys. The + function should return values as for qsort. */ +typedef int (*splay_tree_compare_fn) (splay_tree_key, splay_tree_key); + +/* The type of a function used to deallocate any resources associated + with the key. */ +typedef void (*splay_tree_delete_key_fn) (splay_tree_key); + +/* The type of a function used to deallocate any resources associated + with the value. */ +typedef void (*splay_tree_delete_value_fn) (splay_tree_value); + +/* The type of a function used to iterate over the tree. */ +typedef int (*splay_tree_foreach_fn) (splay_tree_node, void*); + +/* The type of a function used to allocate memory for tree root and + node structures. The first argument is the number of bytes needed; + the second is a data pointer the splay tree functions pass through + to the allocator. This function must never return zero. */ +typedef void *(*splay_tree_allocate_fn) (int, void *); + +/* The type of a function used to free memory allocated using the + corresponding splay_tree_allocate_fn. The first argument is the + memory to be freed; the latter is a data pointer the splay tree + functions pass through to the freer. */ +typedef void (*splay_tree_deallocate_fn) (void *, void *); + +/* The nodes in the splay tree. */ +struct splay_tree_node_s GTY(()) +{ + /* The key. */ + splay_tree_key GTY ((use_param1)) key; + + /* The value. */ + splay_tree_value GTY ((use_param2)) value; + + /* The left and right children, respectively. */ + splay_tree_node GTY ((use_params)) left; + splay_tree_node GTY ((use_params)) right; +}; + +/* The splay tree itself. */ +struct splay_tree_s GTY(()) +{ + /* The root of the tree. */ + splay_tree_node GTY ((use_params)) root; + + /* The comparision function. */ + splay_tree_compare_fn comp; + + /* The deallocate-key function. NULL if no cleanup is necessary. */ + splay_tree_delete_key_fn delete_key; + + /* The deallocate-value function. NULL if no cleanup is necessary. */ + splay_tree_delete_value_fn delete_value; + + /* Allocate/free functions, and a data pointer to pass to them. */ + splay_tree_allocate_fn allocate; + splay_tree_deallocate_fn deallocate; + void * GTY((skip)) allocate_data; +}; + +typedef struct splay_tree_s *splay_tree; + +extern splay_tree splay_tree_new (splay_tree_compare_fn, + splay_tree_delete_key_fn, + splay_tree_delete_value_fn); +extern splay_tree splay_tree_new_with_allocator (splay_tree_compare_fn, + splay_tree_delete_key_fn, + splay_tree_delete_value_fn, + splay_tree_allocate_fn, + splay_tree_deallocate_fn, + void *); +extern void splay_tree_delete (splay_tree); +extern splay_tree_node splay_tree_insert (splay_tree, + splay_tree_key, + splay_tree_value); +extern void splay_tree_remove (splay_tree, splay_tree_key); +extern splay_tree_node splay_tree_lookup (splay_tree, splay_tree_key); +extern splay_tree_node splay_tree_predecessor (splay_tree, splay_tree_key); +extern splay_tree_node splay_tree_successor (splay_tree, splay_tree_key); +extern splay_tree_node splay_tree_max (splay_tree); +extern splay_tree_node splay_tree_min (splay_tree); +extern int splay_tree_foreach (splay_tree, splay_tree_foreach_fn, void*); +extern int splay_tree_compare_ints (splay_tree_key, splay_tree_key); +extern int splay_tree_compare_pointers (splay_tree_key, splay_tree_key); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* _SPLAY_TREE_H */ diff --git a/support/cpp/libiberty/vasprintf.c b/support/cpp/libiberty/vasprintf.c new file mode 100644 index 0000000..b6cb94e --- /dev/null +++ b/support/cpp/libiberty/vasprintf.c @@ -0,0 +1,196 @@ +/* Like vsprintf but provides a pointer to malloc'd storage, which must + be freed by the caller. + Copyright (C) 1994, 2003 Free Software Foundation, Inc. + +This file is part of the libiberty library. +Libiberty is free software; you can redistribute it and/or +modify it under the terms of the GNU Library General Public +License as published by the Free Software Foundation; either +version 2 of the License, or (at your option) any later version. + +Libiberty is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Library General Public License for more details. + +You should have received a copy of the GNU Library General Public +License along with libiberty; see the file COPYING.LIB. If +not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, +Boston, MA 02110-1301, USA. */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif +#include +#include +#if !defined (va_copy) && defined (__va_copy) +# define va_copy(d,s) __va_copy((d),(s)) +#endif +#include +#ifdef HAVE_STRING_H +#include +#endif +#ifdef HAVE_STDLIB_H +#include +#else +extern unsigned long strtoul (); +extern PTR malloc (); +#endif +#include "libiberty.h" + +#ifdef TEST +int global_total_width; +#endif + +/* + +@deftypefn Extension int vasprintf (char **@var{resptr}, const char *@var{format}, va_list @var{args}) + +Like @code{vsprintf}, but instead of passing a pointer to a buffer, +you pass a pointer to a pointer. This function will compute the size +of the buffer needed, allocate memory with @code{malloc}, and store a +pointer to the allocated memory in @code{*@var{resptr}}. The value +returned is the same as @code{vsprintf} would return. If memory could +not be allocated, minus one is returned and @code{NULL} is stored in +@code{*@var{resptr}}. + +@end deftypefn + +*/ + +static int int_vasprintf (char **, const char *, va_list); + +static int +int_vasprintf (char **result, const char *format, va_list args) +{ + const char *p = format; + /* Add one to make sure that it is never zero, which might cause malloc + to return NULL. */ + int total_width = strlen (format) + 1; + va_list ap; + +#ifdef va_copy + va_copy (ap, args); +#else + memcpy ((PTR) &ap, (PTR) &args, sizeof (va_list)); +#endif + + while (*p != '\0') + { + if (*p++ == '%') + { + while (strchr ("-+ #0", *p)) + ++p; + if (*p == '*') + { + ++p; + total_width += abs (va_arg (ap, int)); + } + else + total_width += strtoul (p, (char **) &p, 10); + if (*p == '.') + { + ++p; + if (*p == '*') + { + ++p; + total_width += abs (va_arg (ap, int)); + } + else + total_width += strtoul (p, (char **) &p, 10); + } + while (strchr ("hlL", *p)) + ++p; + /* Should be big enough for any format specifier except %s and floats. */ + total_width += 30; + switch (*p) + { + case 'd': + case 'i': + case 'o': + case 'u': + case 'x': + case 'X': + case 'c': + (void) va_arg (ap, int); + break; + case 'f': + case 'e': + case 'E': + case 'g': + case 'G': + (void) va_arg (ap, double); + /* Since an ieee double can have an exponent of 307, we'll + make the buffer wide enough to cover the gross case. */ + total_width += 307; + break; + case 's': + total_width += strlen (va_arg (ap, char *)); + break; + case 'p': + case 'n': + (void) va_arg (ap, char *); + break; + } + p++; + } + } +#ifdef va_copy + va_end (ap); +#endif +#ifdef TEST + global_total_width = total_width; +#endif + *result = (char *) malloc (total_width); + if (*result != NULL) + return vsprintf (*result, format, args); + else + return -1; +} + +int +vasprintf (char **result, const char *format, +#if defined (_BSD_VA_LIST_) && defined (__FreeBSD__) + _BSD_VA_LIST_ args) +#else + va_list args) +#endif +{ + return int_vasprintf (result, format, args); +} + +#ifdef TEST +static void ATTRIBUTE_PRINTF_1 +checkit (const char *format, ...) +{ + char *result; + VA_OPEN (args, format); + VA_FIXEDARG (args, const char *, format); + vasprintf (&result, format, args); + VA_CLOSE (args); + + if (strlen (result) < (size_t) global_total_width) + printf ("PASS: "); + else + printf ("FAIL: "); + printf ("%d %s\n", global_total_width, result); + + free (result); +} + +extern int main (void); + +int +main (void) +{ + checkit ("%d", 0x12345678); + checkit ("%200d", 5); + checkit ("%.300d", 6); + checkit ("%100.150d", 7); + checkit ("%s", "jjjjjjjjjiiiiiiiiiiiiiiioooooooooooooooooppppppppppppaa\n\ +777777777777777777333333333333366666666666622222222222777777777777733333"); + checkit ("%f%s%d%s", 1.0, "foo", 77, "asdjffffffffffffffiiiiiiiiiiixxxxx"); + + return 0; +} +#endif /* TEST */ diff --git a/support/cpp/libiberty/xexit.c b/support/cpp/libiberty/xexit.c new file mode 100644 index 0000000..421e5e2 --- /dev/null +++ b/support/cpp/libiberty/xexit.c @@ -0,0 +1,52 @@ +/* xexit.c -- Run any exit handlers, then exit. + Copyright (C) 1994, 95, 1997 Free Software Foundation, Inc. + +This file is part of the libiberty library. +Libiberty is free software; you can redistribute it and/or +modify it under the terms of the GNU Library General Public +License as published by the Free Software Foundation; either +version 2 of the License, or (at your option) any later version. + +Libiberty is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Library General Public License for more details. + +You should have received a copy of the GNU Library General Public +License along with libiberty; see the file COPYING.LIB. If not, write +to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, +Boston, MA 02110-1301, USA. */ + +/* + +@deftypefn Replacement void xexit (int @var{code}) + +Terminates the program. If any functions have been registered with +the @code{xatexit} replacement function, they will be called first. +Termination is handled via the system's normal @code{exit} call. + +@end deftypefn + +*/ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif +#include +#ifdef HAVE_STDLIB_H +#include +#endif +#include "libiberty.h" + + +/* This variable is set by xatexit if it is called. This way, xmalloc + doesn't drag xatexit into the link. */ +void (*_xexit_cleanup) (void); + +void +xexit (int code) +{ + if (_xexit_cleanup != NULL) + (*_xexit_cleanup) (); + exit (code); +} diff --git a/support/cpp/libiberty/xmalloc.c b/support/cpp/libiberty/xmalloc.c new file mode 100644 index 0000000..3e97aab --- /dev/null +++ b/support/cpp/libiberty/xmalloc.c @@ -0,0 +1,184 @@ +/* memory allocation routines with error checking. + Copyright 1989, 90, 91, 92, 93, 94 Free Software Foundation, Inc. + +This file is part of the libiberty library. +Libiberty is free software; you can redistribute it and/or +modify it under the terms of the GNU Library General Public +License as published by the Free Software Foundation; either +version 2 of the License, or (at your option) any later version. + +Libiberty is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Library General Public License for more details. + +You should have received a copy of the GNU Library General Public +License along with libiberty; see the file COPYING.LIB. If +not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, +Boston, MA 02110-1301, USA. */ + +/* + +@deftypefn Replacement void* xmalloc (size_t) + +Allocate memory without fail. If @code{malloc} fails, this will print +a message to @code{stderr} (using the name set by +@code{xmalloc_set_program_name}, +if any) and then call @code{xexit}. Note that it is therefore safe for +a program to contain @code{#define malloc xmalloc} in its source. + +@end deftypefn + +@deftypefn Replacement void* xrealloc (void *@var{ptr}, size_t @var{size}) +Reallocate memory without fail. This routine functions like @code{realloc}, +but will behave the same as @code{xmalloc} if memory cannot be found. + +@end deftypefn + +@deftypefn Replacement void* xcalloc (size_t @var{nelem}, size_t @var{elsize}) + +Allocate memory without fail, and set it to zero. This routine functions +like @code{calloc}, but will behave the same as @code{xmalloc} if memory +cannot be found. + +@end deftypefn + +@deftypefn Replacement void xmalloc_set_program_name (const char *@var{name}) + +You can use this to set the name of the program used by +@code{xmalloc_failed} when printing a failure message. + +@end deftypefn + +@deftypefn Replacement void xmalloc_failed (size_t) + +This function is not meant to be called by client code, and is listed +here for completeness only. If any of the allocation routines fail, this +function will be called to print an error message and terminate execution. + +@end deftypefn + +*/ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif +#include "ansidecl.h" +#include "libiberty.h" + +#include + +#include + +#if VMS +#include +#include +#else +/* For systems with larger pointers than ints, these must be declared. */ +# if HAVE_STDLIB_H && HAVE_UNISTD_H && HAVE_DECL_MALLOC \ + && HAVE_DECL_REALLOC && HAVE_DECL_CALLOC && HAVE_DECL_SBRK +# include +# include +# else +# ifdef __cplusplus +extern "C" { +# endif /* __cplusplus */ +void *malloc (size_t); +void *realloc (void *, size_t); +void *calloc (size_t, size_t); +void *sbrk (ptrdiff_t); +# ifdef __cplusplus +} +# endif /* __cplusplus */ +# endif /* HAVE_STDLIB_H ... */ +#endif /* VMS */ + +/* The program name if set. */ +static const char *name = ""; + +#ifdef HAVE_SBRK +/* The initial sbrk, set when the program name is set. Not used for win32 + ports other than cygwin32. */ +static char *first_break = NULL; +#endif /* HAVE_SBRK */ + +void +xmalloc_set_program_name (const char *s) +{ + name = s; +#ifdef HAVE_SBRK + /* Win32 ports other than cygwin32 don't have brk() */ + if (first_break == NULL) + first_break = (char *) sbrk (0); +#endif /* HAVE_SBRK */ +} + +void +xmalloc_failed (size_t size) +{ +#ifdef HAVE_SBRK + extern char **environ; + size_t allocated; + + if (first_break != NULL) + allocated = (char *) sbrk (0) - first_break; + else + allocated = (char *) sbrk (0) - (char *) &environ; + fprintf (stderr, + "\n%s%sout of memory allocating %lu bytes after a total of %lu bytes\n", + name, *name ? ": " : "", + (unsigned long) size, (unsigned long) allocated); +#else /* HAVE_SBRK */ + fprintf (stderr, + "\n%s%sout of memory allocating %lu bytes\n", + name, *name ? ": " : "", + (unsigned long) size); +#endif /* HAVE_SBRK */ + xexit (1); +} + +PTR +xmalloc (size_t size) +{ + PTR newmem; + + if (size == 0) + size = 1; + newmem = malloc (size); + if (!newmem) + xmalloc_failed (size); + + return (newmem); +} + +PTR +xcalloc (size_t nelem, size_t elsize) +{ + PTR newmem; + + if (nelem == 0 || elsize == 0) + nelem = elsize = 1; + + newmem = calloc (nelem, elsize); + if (!newmem) + xmalloc_failed (nelem * elsize); + + return (newmem); +} + +PTR +xrealloc (PTR oldmem, size_t size) +{ + PTR newmem; + + if (size == 0) + size = 1; + if (!oldmem) + newmem = malloc (size); + else + newmem = realloc (oldmem, size); + if (!newmem) + xmalloc_failed (size); + + return (newmem); +} diff --git a/support/cpp/libiberty/xmemdup.c b/support/cpp/libiberty/xmemdup.c new file mode 100644 index 0000000..d483116 --- /dev/null +++ b/support/cpp/libiberty/xmemdup.c @@ -0,0 +1,38 @@ +/* xmemdup.c -- Duplicate a memory buffer, using xcalloc. + This trivial function is in the public domain. + Jeff Garzik, September 1999. */ + +/* + +@deftypefn Replacement void* xmemdup (void *@var{input}, size_t @var{copy_size}, size_t @var{alloc_size}) + +Duplicates a region of memory without fail. First, @var{alloc_size} bytes +are allocated, then @var{copy_size} bytes from @var{input} are copied into +it, and the new memory is returned. If fewer bytes are copied than were +allocated, the remaining memory is zeroed. + +@end deftypefn + +*/ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif +#include "ansidecl.h" +#include "libiberty.h" + +#include /* For size_t. */ +#ifdef HAVE_STRING_H +#include +#else +# ifdef HAVE_STRINGS_H +# include +# endif +#endif + +PTR +xmemdup (const PTR input, size_t copy_size, size_t alloc_size) +{ + PTR output = xcalloc (1, alloc_size); + return (PTR) memcpy (output, input, copy_size); +} diff --git a/support/cpp/libiberty/xstrdup.c b/support/cpp/libiberty/xstrdup.c new file mode 100644 index 0000000..9ac2ea0 --- /dev/null +++ b/support/cpp/libiberty/xstrdup.c @@ -0,0 +1,36 @@ +/* xstrdup.c -- Duplicate a string in memory, using xmalloc. + This trivial function is in the public domain. + Ian Lance Taylor, Cygnus Support, December 1995. */ + +/* + +@deftypefn Replacement char* xstrdup (const char *@var{s}) + +Duplicates a character string without fail, using @code{xmalloc} to +obtain memory. + +@end deftypefn + +*/ + +#include +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif +#ifdef HAVE_STRING_H +#include +#else +# ifdef HAVE_STRINGS_H +# include +# endif +#endif +#include "ansidecl.h" +#include "libiberty.h" + +char * +xstrdup (const char *s) +{ + register size_t len = strlen (s) + 1; + register char *ret = XNEWVEC (char, len); + return (char *) memcpy (ret, s, len); +} diff --git a/support/cpp/libiberty/xstrerror.c b/support/cpp/libiberty/xstrerror.c new file mode 100644 index 0000000..2ea2200 --- /dev/null +++ b/support/cpp/libiberty/xstrerror.c @@ -0,0 +1,79 @@ +/* xstrerror.c -- jacket routine for more robust strerror() usage. + Fri Jun 16 18:30:00 1995 Pat Rankin + This code is in the public domain. */ + +/* + +@deftypefn Replacement char* xstrerror (int @var{errnum}) + +Behaves exactly like the standard @code{strerror} function, but +will never return a @code{NULL} pointer. + +@end deftypefn + +*/ + +#include + +#include "config.h" +#include "libiberty.h" + +#ifdef VMS +# include +# if !defined (__STRICT_ANSI__) && !defined (__HIDE_FORBIDDEN_NAMES) +# ifdef __cplusplus +extern "C" { +# endif /* __cplusplus */ +extern char *strerror (int,...); +# define DONT_DECLARE_STRERROR +# ifdef __cplusplus +} +# endif /* __cplusplus */ +# endif +#endif /* VMS */ + + +#ifndef DONT_DECLARE_STRERROR +# ifdef __cplusplus +extern "C" { +# endif /* __cplusplus */ +extern char *strerror (int); +# ifdef __cplusplus +} +# endif /* __cplusplus */ +#endif + +/* If strerror returns NULL, we'll format the number into a static buffer. */ + +#define ERRSTR_FMT "undocumented error #%d" +static char xstrerror_buf[sizeof ERRSTR_FMT + 20]; + +/* Like strerror, but result is never a null pointer. */ + +char * +xstrerror (int errnum) +{ + char *errstr; +#ifdef VMS + char *(*vmslib_strerror) (int,...); + + /* Override any possibly-conflicting declaration from system header. */ + vmslib_strerror = (char *(*) (int,...)) strerror; + /* Second argument matters iff first is EVMSERR, but it's simpler to + pass it unconditionally. `vaxc$errno' is declared in + and maintained by the run-time library in parallel to `errno'. + We assume that `errnum' corresponds to the last value assigned to + errno by the run-time library, hence vaxc$errno will be relevant. */ + errstr = (*vmslib_strerror) (errnum, vaxc$errno); +#else + errstr = strerror (errnum); +#endif + + /* If `errnum' is out of range, result might be NULL. We'll fix that. */ + if (!errstr) + { + sprintf (xstrerror_buf, ERRSTR_FMT, errnum); + errstr = xstrerror_buf; + } + return errstr; +} diff --git a/support/cpp/md5.h b/support/cpp/md5.h new file mode 100644 index 0000000..e357893 --- /dev/null +++ b/support/cpp/md5.h @@ -0,0 +1,139 @@ +/* md5.h - Declaration of functions and data types used for MD5 sum + computing library functions. + Copyright 1995, 1996, 2000 Free Software Foundation, Inc. + NOTE: The canonical source of this file is maintained with the GNU C + Library. Bugs can be reported to bug-glibc@prep.ai.mit.edu. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, + Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ + +#ifndef _MD5_H +#define _MD5_H 1 + +#include + +#if defined HAVE_LIMITS_H || _LIBC +# include +#endif + +/* The following contortions are an attempt to use the C preprocessor + to determine an unsigned integral type that is 32 bits wide. An + alternative approach is to use autoconf's AC_CHECK_SIZEOF macro, but + doing that would require that the configure script compile and *run* + the resulting executable. Locally running cross-compiled executables + is usually not possible. */ + +#ifdef _LIBC +# include +typedef u_int32_t md5_uint32; +typedef uintptr_t md5_uintptr; +#else +# define INT_MAX_32_BITS 2147483647 + +/* If UINT_MAX isn't defined, assume it's a 32-bit type. + This should be valid for all systems GNU cares about because + that doesn't include 16-bit systems, and only modern systems + (that certainly have ) have 64+-bit integral types. */ + +# ifndef INT_MAX +# define INT_MAX INT_MAX_32_BITS +# endif + +# if INT_MAX == INT_MAX_32_BITS + typedef unsigned int md5_uint32; +# else +# if SHRT_MAX == INT_MAX_32_BITS + typedef unsigned short md5_uint32; +# else +# if LONG_MAX == INT_MAX_32_BITS + typedef unsigned long md5_uint32; +# else + /* The following line is intended to evoke an error. + Using #error is not portable enough. */ + "Cannot determine unsigned 32-bit data type." +# endif +# endif +# endif +/* We have to make a guess about the integer type equivalent in size + to pointers which should always be correct. */ +typedef unsigned long int md5_uintptr; +#endif + +/* Structure to save state of computation between the single steps. */ +struct md5_ctx +{ + md5_uint32 A; + md5_uint32 B; + md5_uint32 C; + md5_uint32 D; + + md5_uint32 total[2]; + md5_uint32 buflen; + char buffer[128] ATTRIBUTE_ALIGNED_ALIGNOF(md5_uint32); +}; + +/* + * The following three functions are build up the low level used in + * the functions `md5_stream' and `md5_buffer'. + */ + +/* Initialize structure containing state of computation. + (RFC 1321, 3.3: Step 3) */ +extern void md5_init_ctx (struct md5_ctx *ctx); + +/* Starting with the result of former calls of this function (or the + initialization function update the context for the next LEN bytes + starting at BUFFER. + It is necessary that LEN is a multiple of 64!!! */ +extern void md5_process_block (const void *buffer, size_t len, + struct md5_ctx *ctx); + +/* Starting with the result of former calls of this function (or the + initialization function update the context for the next LEN bytes + starting at BUFFER. + It is NOT required that LEN is a multiple of 64. */ +extern void md5_process_bytes (const void *buffer, size_t len, + struct md5_ctx *ctx); + +/* Process the remaining bytes in the buffer and put result from CTX + in first 16 bytes following RESBUF. The result is always in little + endian byte order, so that a byte-wise output yields to the wanted + ASCII representation of the message digest. + + IMPORTANT: On some systems it is required that RESBUF is correctly + aligned for a 32 bits value. */ +extern void *md5_finish_ctx (struct md5_ctx *ctx, void *resbuf); + + +/* Put result from CTX in first 16 bytes following RESBUF. The result is + always in little endian byte order, so that a byte-wise output yields + to the wanted ASCII representation of the message digest. + + IMPORTANT: On some systems it is required that RESBUF is correctly + aligned for a 32 bits value. */ +extern void *md5_read_ctx (const struct md5_ctx *ctx, void *resbuf); + + +/* Compute MD5 message digest for bytes read from STREAM. The + resulting message digest number will be written into the 16 bytes + beginning at RESBLOCK. */ +extern int md5_stream (FILE *stream, void *resblock); + +/* Compute MD5 message digest for LEN bytes beginning at BUFFER. The + result is always in little endian byte order, so that a byte-wise + output yields to the wanted ASCII representation of the message + digest. */ +extern void *md5_buffer (const char *buffer, size_t len, void *resblock); + +#endif diff --git a/support/cpp/move-if-change b/support/cpp/move-if-change new file mode 100644 index 0000000..d267e72 --- /dev/null +++ b/support/cpp/move-if-change @@ -0,0 +1,32 @@ +#!/bin/sh + +# Copyright (C) 1996 Free Software Foundation, Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +if +test -r $2 +then +if +cmp $1 $2 > /dev/null +then +echo $2 is unchanged +rm -f $1 +else +mv -f $1 $2 +fi +else +mv -f $1 $2 +fi diff --git a/support/cpp/opt-functions.awk b/support/cpp/opt-functions.awk new file mode 100644 index 0000000..3e4c805 --- /dev/null +++ b/support/cpp/opt-functions.awk @@ -0,0 +1,169 @@ +# Copyright (C) 2003,2004 Free Software Foundation, Inc. +# Contributed by Kelley Cook, June 2004. +# Original code from Neil Booth, May 2003. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 2, or (at your option) any +# later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +# Some common subroutines for use by opt[ch]-gen.awk. + +# Return nonzero if FLAGS contains a flag matching REGEX. +function flag_set_p(regex, flags) +{ + return (" " flags " ") ~ (" " regex " ") +} + +# Return STRING if FLAGS contains a flag matching regexp REGEX, +# otherwise return the empty string. +function test_flag(regex, flags, string) +{ + if (flag_set_p(regex, flags)) + return string + return "" +} + +# If FLAGS contains a "NAME(...argument...)" flag, return the value +# of the argument. Return the empty string otherwise. +function opt_args(name, flags) +{ + flags = " " flags + if (flags !~ " " name "\\(") + return "" + sub(".* " name "\\(", "", flags) + sub("\\).*", "", flags) + + return flags +} + +# Return the Nth comma-separated element of S. Return the empty string +# if S does not contain N elements. +function nth_arg(n, s) +{ + while (n-- > 0) { + if (s !~ ",") + return "" + sub("[^,]*, *", "", s) + } + sub(",.*", "", s) + return s +} + +# Return a bitmask of CL_* values for option flags FLAGS. +function switch_flags (flags) +{ + result = "0" + for (j = 0; j < n_langs; j++) { + regex = langs[j] + gsub ( "\\+", "\\+", regex ) + result = result test_flag(regex, flags, " | " macros[j]) + } + result = result \ + test_flag("Common", flags, " | CL_COMMON") \ + test_flag("Target", flags, " | CL_TARGET") \ + test_flag("Joined", flags, " | CL_JOINED") \ + test_flag("JoinedOrMissing", flags, " | CL_JOINED | CL_MISSING_OK") \ + test_flag("Separate", flags, " | CL_SEPARATE") \ + test_flag("RejectNegative", flags, " | CL_REJECT_NEGATIVE") \ + test_flag("UInteger", flags, " | CL_UINTEGER") \ + test_flag("Undocumented", flags, " | CL_UNDOCUMENTED") \ + test_flag("Report", flags, " | CL_REPORT") + sub( "^0 \\| ", "", result ) + return result +} + +# If FLAGS includes a Var flag, return the name of the variable it specifies. +# Return the empty string otherwise. +function var_name(flags) +{ + return nth_arg(0, opt_args("Var", flags)) +} + +# Return true if the option described by FLAGS has a globally-visible state. +function global_state_p(flags) +{ + return (var_name(flags) != "" \ + || opt_args("Mask", flags) != "" \ + || opt_args("InverseMask", flags) != "") +} + +# Return true if the option described by FLAGS must have some state +# associated with it. +function needs_state_p(flags) +{ + return flag_set_p("Target", flags) +} + +# If FLAGS describes an option that needs a static state variable, +# return the name of that variable, otherwise return "". NAME is +# the name of the option. +function static_var(name, flags) +{ + if (global_state_p(flags) || !needs_state_p(flags)) + return "" + gsub ("[^A-Za-z0-9]", "_", name) + return "VAR_" name +} + +# Return the type of variable that should be associated with the given flags. +function var_type(flags) +{ + if (!flag_set_p("Joined.*", flags)) + return "int " + else if (flag_set_p("UInteger", flags)) + return "int " + else + return "const char *" +} + +# Given that an option has flags FLAGS, return an initializer for the +# "var_cond" and "var_value" fields of its cl_options[] entry. +function var_set(flags) +{ + s = nth_arg(1, opt_args("Var", flags)) + if (s != "") + return "CLVC_EQUAL, " s + s = opt_args("Mask", flags); + if (s != "") { + vn = var_name(flags); + if (vn) + return "CLVC_BIT_SET, OPTION_MASK_" s + else + return "CLVC_BIT_SET, MASK_" s + } + s = nth_arg(0, opt_args("InverseMask", flags)); + if (s != "") { + vn = var_name(flags); + if (vn) + return "CLVC_BIT_CLEAR, OPTION_MASK_" s + else + return "CLVC_BIT_CLEAR, MASK_" s + } + if (var_type(flags) == "const char *") + return "CLVC_STRING, 0" + return "CLVC_BOOLEAN, 0" +} + +# Given that an option called NAME has flags FLAGS, return an initializer +# for the "flag_var" field of its cl_options[] entry. +function var_ref(name, flags) +{ + name = var_name(flags) static_var(name, flags) + if (name != "") + return "&" name + if (opt_args("Mask", flags) != "") + return "&target_flags" + if (opt_args("InverseMask", flags) != "") + return "&target_flags" + return "0" +} diff --git a/support/cpp/opt-gather.awk b/support/cpp/opt-gather.awk new file mode 100644 index 0000000..084362e --- /dev/null +++ b/support/cpp/opt-gather.awk @@ -0,0 +1,54 @@ +# Copyright (C) 2003,2004 Free Software Foundation, Inc. +# Contributed by Kelley Cook, June 2004. +# Original code from Neil Booth, May 2003. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 2, or (at your option) any +# later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +# This Awk script takes a list of *.opt files and combines them into +# a three-field sorted list suitable for input into opt[ch]-gen.awk. +# +# Usage: awk -f opt-gather.awk file1.opt [...] > outputfile + +function sort(ARRAY, ELEMENTS) +{ + for (i = 2; i <= ELEMENTS; ++i) { + for (j = i; ARRAY[j-1] > ARRAY[j]; --j) { + temp = ARRAY[j] + ARRAY[j] = ARRAY[j-1] + ARRAY[j-1] = temp + } + } + return +} + +BEGIN { numrec = 0 } + +# Ignore comments and blank lines +/^[ \t]*(;|$)/ { flag = 0; next } +/^[^ \t]/ { if (flag == 0) { + record[++numrec] = $0 + flag = 1 } + else { + record[numrec] = record[numrec] SUBSEP $0 + } +} + +# Sort it and output it +END { + sort(record,numrec) + + for (i = 1; i <= numrec; i++) { + print record[i] } +} diff --git a/support/cpp/optc-gen.awk b/support/cpp/optc-gen.awk new file mode 100644 index 0000000..aa6bb11 --- /dev/null +++ b/support/cpp/optc-gen.awk @@ -0,0 +1,209 @@ +# Copyright (C) 2003,2004 Free Software Foundation, Inc. +# Contributed by Kelley Cook, June 2004. +# Original code from Neil Booth, May 2003. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 2, or (at your option) any +# later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +# This Awk script reads in the option records generated from +# opt-gather.awk, combines the flags of duplicat options and generates a +# C file. +# +# This program uses functions from opt-functions.awk +# +# Usage: awk -f opt-functions.awk -f optc-gen.awk \ +# [-v header_name=header.h] < inputfile > options.c + +BEGIN { + n_opts = 0 + n_langs = 0 + quote = "\042" + comma = "," + FS=SUBSEP + # Default the name of header created from opth-gen.awk to options.h + if (header_name == "") header_name="options.h" +} + +# Collect the text and flags of each option into an array + { + if ($1 == "Language") { + langs[n_langs] = $2 + n_langs++; + } + else { + name = opt_args("Mask", $1) + if (name == "") { + opts[n_opts] = $1 + flags[n_opts] = $2 + help[n_opts] = $3 + n_opts++; + } + } + } + +# Dump that array of options into a C file. +END { +print "/* This file is auto-generated by opts.sh. */" +print "" +n_headers = split(header_name, headers, " ") +for (i = 1; i <= n_headers; i++) + print "#include " quote headers[i] quote +print "#include " quote "opts.h" quote +print "#include " quote "intl.h" quote +print "" +print "#ifdef GCC_DRIVER" +print "int target_flags;" +print "#endif /* GCC_DRIVER */" +print "" + +for (i = 0; i < n_opts; i++) { + name = var_name(flags[i]); + if (name == "") + continue; + + if (flag_set_p("VarExists", flags[i])) { + # Need it for the gcc driver. + if (name in var_seen) + continue; + init = "" + gcc_driver = 1 + } + else { + init = opt_args("Init", flags[i]) + if (init != "") + init = " = " init; + else if (name in var_seen) + continue; + gcc_driver = 0 + } + + if (gcc_driver == 1) + print "#ifdef GCC_DRIVER" + print "/* Set by -" opts[i] "." + print " " help[i] " */" + print var_type(flags[i]) name init ";" + if (gcc_driver == 1) + print "#endif /* GCC_DRIVER */" + print "" + + var_seen[name] = 1; +} + +print "" +print "/* Local state variables. */" +for (i = 0; i < n_opts; i++) { + name = static_var(opts[i], flags[i]); + if (name != "") + print "static " var_type(flags[i]) name ";" +} +print "" + +print "const char * const lang_names[] =\n{" +for (i = 0; i < n_langs; i++) { + macros[i] = "CL_" langs[i] + gsub( "[^A-Za-z0-9_]", "X", macros[i] ) + s = substr(" ", length (macros[i])) + print " " quote langs[i] quote "," + } + +print " 0\n};\n" +print "const unsigned int cl_options_count = N_OPTS;\n" + +print "const struct cl_option cl_options[] =\n{" + +j = 0 +for (i = 0; i < n_opts; i++) { + back_chain[i] = "N_OPTS"; + indices[opts[i]] = j; + # Combine the flags of identical switches. Switches + # appear many times if they are handled by many front + # ends, for example. + while( i + 1 != n_opts && opts[i] == opts[i + 1] ) { + flags[i + 1] = flags[i] " " flags[i + 1]; + i++; + back_chain[i] = "N_OPTS"; + indices[opts[i]] = j; + } + j++; +} + +for (i = 0; i < n_opts; i++) { + # Combine the flags of identical switches. Switches + # appear many times if they are handled by many front + # ends, for example. + while( i + 1 != n_opts && opts[i] == opts[i + 1] ) { + flags[i + 1] = flags[i] " " flags[i + 1]; + i++; + } + + len = length (opts[i]); + enum = "OPT_" opts[i] + if (opts[i] == "finline-limit=") + enum = enum "eq" + gsub ("[^A-Za-z0-9]", "_", enum) + + # If this switch takes joined arguments, back-chain all + # subsequent switches to it for which it is a prefix. If + # a later switch S is a longer prefix of a switch T, T + # will be back-chained to S in a later iteration of this + # for() loop, which is what we want. + if (flag_set_p("Joined.*", flags[i])) { + for (j = i + 1; j < n_opts; j++) { + if (substr (opts[j], 1, len) != opts[i]) + break; + back_chain[j] = enum; + } + } + + s = substr(" ", length (opts[i])) + if (i + 1 == n_opts) + comma = "" + + if (help[i] == "") + hlp = "0" + else + hlp = quote help[i] quote; + + neg = opt_args("Negative", flags[i]); + if (neg != "") + idx = indices[neg] + else { + if (flag_set_p("RejectNegative", flags[i])) + idx = -1; + else { + if (opts[i] ~ "^[Wfm]") + idx = indices[opts[i]]; + else + idx = -1; + } + } + printf(" { %c-%s%c,\n %s,\n %s, %u, %d,\n", + quote, opts[i], quote, hlp, back_chain[i], len, idx) + condition = opt_args("Condition", flags[i]) + cl_flags = switch_flags(flags[i]) + if (condition != "") + printf("#if %s\n" \ + " %s,\n" \ + "#else\n" \ + " CL_DISABLED,\n" \ + "#endif\n", + condition, cl_flags, cl_flags) + else + printf(" %s,\n", cl_flags) + printf(" %s, %s }%s\n", var_ref(opts[i], flags[i]), + var_set(flags[i]), comma) +} + +print "};" +} diff --git a/support/cpp/opth-gen.awk b/support/cpp/opth-gen.awk new file mode 100644 index 0000000..e7ffc1a --- /dev/null +++ b/support/cpp/opth-gen.awk @@ -0,0 +1,194 @@ +# Copyright (C) 2003,2004,2005,2006 Free Software Foundation, Inc. +# Contributed by Kelley Cook, June 2004. +# Original code from Neil Booth, May 2003. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 2, or (at your option) any +# later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +# This Awk script reads in the option records generated from +# opt-gather.awk, combines the flags of duplicate options and generates a +# C header file. +# +# This program uses functions from opt-functions.awk +# Usage: awk -f opt-functions.awk -f opth-gen.awk < inputfile > options.h + +BEGIN { + n_opts = 0 + n_langs = 0 + n_extra_masks = 0 + quote = "\042" + comma = "," + FS=SUBSEP +} + +# Collect the text and flags of each option into an array + { + if ($1 == "Language") { + langs[n_langs] = $2 + n_langs++; + } + else { + name = opt_args("Mask", $1) + if (name == "") { + opts[n_opts] = $1 + flags[n_opts] = $2 + help[n_opts] = $3 + n_opts++; + } + else { + extra_masks[n_extra_masks++] = name + } + } + } + +# Dump out an enumeration into a .h file. +# Combine the flags of duplicate options. +END { +print "/* This file is auto-generated by opts.sh. */" +print "" +print "#ifndef OPTIONS_H" +print "#define OPTIONS_H" +print "" +print "extern int target_flags;" +print "" + +for (i = 0; i < n_opts; i++) { + name = var_name(flags[i]); + if (name == "") + continue; + + print "extern " var_type(flags[i]) name ";" +} +print "" + +for (i = 0; i < n_opts; i++) { + name = opt_args("Mask", flags[i]) + vname = var_name(flags[i]) + mask = "MASK_" + if (vname != "") { + mask = "OPTION_MASK_" + } + if (name != "" && !flag_set_p("MaskExists", flags[i])) + print "#define " mask name " (1 << " masknum[vname]++ ")" +} +for (i = 0; i < n_extra_masks; i++) { + print "#define MASK_" extra_masks[i] " (1 << " masknum[""]++ ")" +} + +for (var in masknum) { + if (masknum[var] > 31) { + if (var == "") + print "#error too many target masks" + else + print "#error too many masks for " var + } +} +print "" + +for (i = 0; i < n_opts; i++) { + name = opt_args("Mask", flags[i]) + vname = var_name(flags[i]) + macro = "OPTION_" + mask = "OPTION_MASK_" + if (vname == "") { + vname = "target_flags" + macro = "TARGET_" + mask = "MASK_" + } + if (name != "" && !flag_set_p("MaskExists", flags[i])) + print "#define " macro name \ + " ((" vname " & " mask name ") != 0)" +} +for (i = 0; i < n_extra_masks; i++) { + print "#define TARGET_" extra_masks[i] \ + " ((target_flags & MASK_" extra_masks[i] ") != 0)" +} +print "" + +for (i = 0; i < n_opts; i++) { + opt = opt_args("InverseMask", flags[i]) + if (opt ~ ",") { + vname = var_name(flags[i]) + macro = "OPTION_" + mask = "OPTION_MASK_" + if (vname == "") { + vname = "target_flags" + macro = "TARGET_" + mask = "MASK_" + } + print "#define " macro nth_arg(1, opt) \ + " ((" vname " & " mask nth_arg(0, opt) ") == 0)" + } +} +print "" + +for (i = 0; i < n_langs; i++) { + macros[i] = "CL_" langs[i] + gsub( "[^A-Za-z0-9_]", "X", macros[i] ) + s = substr(" ", length (macros[i])) + print "#define " macros[i] s " (1 << " i ")" + } + +print "" +print "enum opt_code" +print "{" + +for (i = 0; i < n_opts; i++) + back_chain[i] = "N_OPTS"; + +for (i = 0; i < n_opts; i++) { + # Combine the flags of identical switches. Switches + # appear many times if they are handled by many front + # ends, for example. + while( i + 1 != n_opts && opts[i] == opts[i + 1] ) { + flags[i + 1] = flags[i] " " flags[i + 1]; + i++; + } + + len = length (opts[i]); + enum = "OPT_" opts[i] + if (opts[i] == "finline-limit=") + enum = enum "eq" + gsub ("[^A-Za-z0-9]", "_", enum) + + # If this switch takes joined arguments, back-chain all + # subsequent switches to it for which it is a prefix. If + # a later switch S is a longer prefix of a switch T, T + # will be back-chained to S in a later iteration of this + # for() loop, which is what we want. + if (flag_set_p("Joined.*", flags[i])) { + for (j = i + 1; j < n_opts; j++) { + if (substr (opts[j], 1, len) != opts[i]) + break; + back_chain[j] = enum; + } + } + + s = substr(" ", length (opts[i])) + if (i + 1 == n_opts) + comma = "" + + if (help[i] == "") + hlp = "0" + else + hlp = "N_(\"" help[i] "\")"; + + print " " enum "," s "/* -" opts[i] " */" +} + +print " N_OPTS" +print "};" +print "" +print "#endif /* OPTIONS_H */" +} diff --git a/support/cpp/opts-common.c b/support/cpp/opts-common.c new file mode 100644 index 0000000..dcbbe2c --- /dev/null +++ b/support/cpp/opts-common.c @@ -0,0 +1,236 @@ +/* Command line option handling. + Copyright (C) 2006 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA +02110-1301, USA. */ + +#include "config.h" +#include "system.h" +#include "intl.h" +#include "opts.h" + +/* Perform a binary search to find which option the command-line INPUT + matches. Returns its index in the option array, and N_OPTS + (cl_options_count) on failure. + + This routine is quite subtle. A normal binary search is not good + enough because some options can be suffixed with an argument, and + multiple sub-matches can occur, e.g. input of "-pedantic" matching + the initial substring of "-pedantic-errors". + + A more complicated example is -gstabs. It should match "-g" with + an argument of "stabs". Suppose, however, that the number and list + of switches are such that the binary search tests "-gen-decls" + before having tested "-g". This doesn't match, and as "-gen-decls" + is less than "-gstabs", it will become the lower bound of the + binary search range, and "-g" will never be seen. To resolve this + issue, opts.sh makes "-gen-decls" point, via the back_chain member, + to "-g" so that failed searches that end between "-gen-decls" and + the lexicographically subsequent switch know to go back and see if + "-g" causes a match (which it does in this example). + + This search is done in such a way that the longest match for the + front end in question wins. If there is no match for the current + front end, the longest match for a different front end is returned + (or N_OPTS if none) and the caller emits an error message. */ +size_t +find_opt (const char *input, int lang_mask) +{ + size_t mn, mx, md, opt_len; + size_t match_wrong_lang; + int comp; + + mn = 0; + mx = cl_options_count; + + /* Find mn such this lexicographical inequality holds: + cl_options[mn] <= input < cl_options[mn + 1]. */ + while (mx - mn > 1) + { + md = (mn + mx) / 2; + opt_len = cl_options[md].opt_len; + comp = strncmp (input, cl_options[md].opt_text + 1, opt_len); + + if (comp < 0) + mx = md; + else + mn = md; + } + + /* This is the switch that is the best match but for a different + front end, or cl_options_count if there is no match at all. */ + match_wrong_lang = cl_options_count; + + /* Backtrace the chain of possible matches, returning the longest + one, if any, that fits best. With current GCC switches, this + loop executes at most twice. */ + do + { + const struct cl_option *opt = &cl_options[mn]; + + /* Is the input either an exact match or a prefix that takes a + joined argument? */ + if (!strncmp (input, opt->opt_text + 1, opt->opt_len) + && (input[opt->opt_len] == '\0' || (opt->flags & CL_JOINED))) + { + /* If language is OK, return it. */ + if (opt->flags & lang_mask) + return mn; + + /* If we haven't remembered a prior match, remember this + one. Any prior match is necessarily better. */ + if (match_wrong_lang == cl_options_count) + match_wrong_lang = mn; + } + + /* Try the next possibility. This is cl_options_count if there + are no more. */ + mn = opt->back_chain; + } + while (mn != cl_options_count); + + /* Return the best wrong match, or cl_options_count if none. */ + return match_wrong_lang; +} + +/* Return true if NEXT_OPT_IDX cancels OPT_IDX. Return false if the + next one is the same as ORIG_NEXT_OPT_IDX. */ + +static bool +cancel_option (int opt_idx, int next_opt_idx, int orig_next_opt_idx) +{ + /* An option can be canceled by the same option or an option with + Negative. */ + if (cl_options [next_opt_idx].neg_index == opt_idx) + return true; + + if (cl_options [next_opt_idx].neg_index != orig_next_opt_idx) + return cancel_option (opt_idx, cl_options [next_opt_idx].neg_index, + orig_next_opt_idx); + + return false; +} + +/* Filter out options canceled by the ones after them. */ + +void +prune_options (int *argcp, char ***argvp) +{ + int argc = *argcp; + int *options = xmalloc (argc * sizeof (*options)); + char **argv = xmalloc (argc * sizeof (char *)); + int i, arg_count, need_prune = 0; + const struct cl_option *option; + size_t opt_index; + + /* Scan all arguments. */ + for (i = 1; i < argc; i++) + { + int value = 1; + const char *opt = (*argvp) [i]; + + opt_index = find_opt (opt + 1, -1); + if (opt_index == cl_options_count + && (opt[1] == 'W' || opt[1] == 'f' || opt[1] == 'm') + && opt[2] == 'n' && opt[3] == 'o' && opt[4] == '-') + { + char *dup; + + /* Drop the "no-" from negative switches. */ + size_t len = strlen (opt) - 3; + + dup = XNEWVEC (char, len + 1); + dup[0] = '-'; + dup[1] = opt[1]; + memcpy (dup + 2, opt + 5, len - 2 + 1); + opt = dup; + value = 0; + opt_index = find_opt (opt + 1, -1); + free (dup); + } + + if (opt_index == cl_options_count) + { +cont: + options [i] = 0; + continue; + } + + option = &cl_options[opt_index]; + if (option->neg_index < 0) + goto cont; + + /* Skip joined switches. */ + if ((option->flags & CL_JOINED)) + goto cont; + + /* Reject negative form of switches that don't take negatives as + unrecognized. */ + if (!value && (option->flags & CL_REJECT_NEGATIVE)) + goto cont; + + options [i] = (int) opt_index; + need_prune |= options [i]; + } + + if (!need_prune) + goto done; + + /* Remove arguments which are negated by others after them. */ + argv [0] = (*argvp) [0]; + arg_count = 1; + for (i = 1; i < argc; i++) + { + int j, opt_idx; + + opt_idx = options [i]; + if (opt_idx) + { + int next_opt_idx; + for (j = i + 1; j < argc; j++) + { + next_opt_idx = options [j]; + if (next_opt_idx + && cancel_option (opt_idx, next_opt_idx, + next_opt_idx)) + break; + } + } + else + goto keep; + + if (j == argc) + { +keep: + argv [arg_count] = (*argvp) [i]; + arg_count++; + } + } + + if (arg_count != argc) + { + *argcp = arg_count; + *argvp = argv; + } + else + { +done: + free (argv); + } + + free (options); +} diff --git a/support/cpp/opts.c b/support/cpp/opts.c new file mode 100644 index 0000000..178c558 --- /dev/null +++ b/support/cpp/opts.c @@ -0,0 +1,625 @@ +/* Command line option handling. + Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007 + Free Software Foundation, Inc. + Contributed by Neil Booth. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA +02110-1301, USA. */ + +#include "config.h" +#include "system.h" +#include "intl.h" +#include "opts.h" +#include "options.h" + +/* True if we should exit after parsing options. */ +bool exit_after_options; + +/* Treat warnings as errors. -Werror. */ +bool warnings_are_errors; + +/* Don't suppress warnings from system headers. -Wsystem-headers. */ +bool warn_system_headers; + +/* Columns of --help display. */ +static unsigned int columns = 80; + +/* What to print when a switch has no documentation. */ +static const char undocumented_msg[] = N_("This switch lacks documentation"); + +/* Input file names. */ +const char **in_fnames; +unsigned num_in_fnames; + +static int common_handle_option (size_t scode, const char *arg, int value); +static unsigned int handle_option (const char **argv, unsigned int lang_mask); +static char *write_langs (unsigned int lang_mask); +static void complain_wrong_lang (const char *, const struct cl_option *, + unsigned int lang_mask); +static void handle_options (unsigned int, const char **, unsigned int); +static void wrap_help (const char *help, const char *item, unsigned int); +static void print_help (void); +static void print_filtered_help (unsigned int); +static unsigned int print_switch (const char *text, unsigned int indent); + +/* If ARG is a non-negative integer made up solely of digits, return its + value, otherwise return -1. */ +static int +integral_argument (const char *arg) +{ + const char *p = arg; + + while (*p && ISDIGIT (*p)) + p++; + + if (*p == '\0') + return atoi (arg); + + return -1; +} + +/* Return a malloced slash-separated list of languages in MASK. */ +static char * +write_langs (unsigned int mask) +{ + unsigned int n = 0, len = 0; + const char *lang_name; + char *result; + + for (n = 0; (lang_name = lang_names[n]) != 0; n++) + if (mask & (1U << n)) + len += strlen (lang_name) + 1; + + result = XNEWVEC (char, len); + len = 0; + for (n = 0; (lang_name = lang_names[n]) != 0; n++) + if (mask & (1U << n)) + { + if (len) + result[len++] = '/'; + strcpy (result + len, lang_name); + len += strlen (lang_name); + } + + result[len] = 0; + + return result; +} + +/* Complain that switch OPT_INDEX does not apply to this front end. */ +static void +complain_wrong_lang (const char *text, const struct cl_option *option, + unsigned int lang_mask) +{ + char *ok_langs, *bad_lang; + + ok_langs = write_langs (option->flags); + bad_lang = write_langs (lang_mask); + + /* Eventually this should become a hard error IMO. */ + warning (0, "command line option \"%s\" is valid for %s but not for %s", + text, ok_langs, bad_lang); + + free (ok_langs); + free (bad_lang); +} + +/* Handle the switch beginning at ARGV for the language indicated by + LANG_MASK. Returns the number of switches consumed. */ +static unsigned int +handle_option (const char **argv, unsigned int lang_mask) +{ + size_t opt_index; + const char *opt, *arg = 0; + char *dup = 0; + int value = 1; + unsigned int result = 0; + const struct cl_option *option; + + opt = argv[0]; + + opt_index = find_opt (opt + 1, lang_mask | CL_COMMON | CL_TARGET); + if (opt_index == cl_options_count + && (opt[1] == 'W' || opt[1] == 'f' || opt[1] == 'm') + && opt[2] == 'n' && opt[3] == 'o' && opt[4] == '-') + { + /* Drop the "no-" from negative switches. */ + size_t len = strlen (opt) - 3; + + dup = XNEWVEC (char, len + 1); + dup[0] = '-'; + dup[1] = opt[1]; + memcpy (dup + 2, opt + 5, len - 2 + 1); + opt = dup; + value = 0; + opt_index = find_opt (opt + 1, lang_mask | CL_COMMON | CL_TARGET); + } + + if (opt_index == cl_options_count) + goto done; + + option = &cl_options[opt_index]; + + /* Reject negative form of switches that don't take negatives as + unrecognized. */ + if (!value && (option->flags & CL_REJECT_NEGATIVE)) + goto done; + + /* We've recognized this switch. */ + result = 1; + + /* Check to see if the option is disabled for this configuration. */ + if (option->flags & CL_DISABLED) + { + error ("command line option \"%s\"" + " is not supported by this configuration", opt); + goto done; + } + + /* Sort out any argument the switch takes. */ + if (option->flags & CL_JOINED) + { + /* Have arg point to the original switch. This is because + some code, such as disable_builtin_function, expects its + argument to be persistent until the program exits. */ + arg = argv[0] + cl_options[opt_index].opt_len + 1; + if (!value) + arg += strlen ("no-"); + + if (*arg == '\0' && !(option->flags & CL_MISSING_OK)) + { + if (option->flags & CL_SEPARATE) + { + arg = argv[1]; + result = 2; + } + else + /* Missing argument. */ + arg = NULL; + } + } + else if (option->flags & CL_SEPARATE) + { + arg = argv[1]; + result = 2; + } + + /* Now we've swallowed any potential argument, complain if this + is a switch for a different front end. */ + if (!(option->flags & (lang_mask | CL_COMMON | CL_TARGET))) + { + complain_wrong_lang (argv[0], option, lang_mask); + goto done; + } + + if (arg == NULL && (option->flags & (CL_JOINED | CL_SEPARATE))) + { + if (!lang_hooks.missing_argument (opt, opt_index)) + error ("missing argument to \"%s\"", opt); + goto done; + } + + /* If the switch takes an integer, convert it. */ + if (arg && (option->flags & CL_UINTEGER)) + { + value = integral_argument (arg); + if (value == -1) + { + error ("argument to \"%s\" should be a non-negative integer", + option->opt_text); + goto done; + } + } + + if (option->flag_var) + switch (option->var_type) + { + case CLVC_BOOLEAN: + *(int *) option->flag_var = value; + break; + + case CLVC_EQUAL: + *(int *) option->flag_var = (value + ? option->var_value + : !option->var_value); + break; + + case CLVC_BIT_CLEAR: + case CLVC_BIT_SET: + if ((value != 0) == (option->var_type == CLVC_BIT_SET)) + *(int *) option->flag_var |= option->var_value; + else + *(int *) option->flag_var &= ~option->var_value; + ////if (option->flag_var == &target_flags) + //// target_flags_explicit |= option->var_value; + break; + + case CLVC_STRING: + *(const char **) option->flag_var = arg; + break; + } + + if (option->flags & lang_mask) + if (lang_hooks.handle_option (opt_index, arg, value) == 0) + result = 0; + + if (result && (option->flags & CL_COMMON)) + if (common_handle_option (opt_index, arg, value) == 0) + result = 0; + + ////if (result && (option->flags & CL_TARGET)) + //// if (!targetm.handle_option (opt_index, arg, value)) + //// result = 0; + + done: + if (dup) + free (dup); + return result; +} + +/* Handle FILENAME from the command line. */ +static void +add_input_filename (const char *filename) +{ + num_in_fnames++; + in_fnames = xrealloc (in_fnames, num_in_fnames * sizeof (in_fnames[0])); + in_fnames[num_in_fnames - 1] = filename; +} + +/* Decode and handle the vector of command line options. LANG_MASK + contains has a single bit set representing the current + language. */ +static void +handle_options (unsigned int argc, const char **argv, unsigned int lang_mask) +{ + unsigned int n, i; + + for (i = 1; i < argc; i += n) + { + const char *opt = argv[i]; + + /* Interpret "-" or a non-switch as a file name. */ + if (opt[0] != '-' || opt[1] == '\0') + { + if (main_input_filename == NULL) + main_input_filename = opt; + add_input_filename (opt); + n = 1; + continue; + } + + n = handle_option (argv + i, lang_mask); + + if (!n) + { + n = 1; + error ("unrecognized command line option \"%s\"", opt); + } + } +} + +/* Parse command line options and set default flag values. Do minimal + options processing. */ +void +decode_options (unsigned int argc, const char **argv) +{ + unsigned int lang_mask; + + /* Perform language-specific options initialization. */ + lang_mask = lang_hooks.init_options (argc, argv); + + /* Scan to see what optimization level has been specified. That will + determine the default value of many flags. */ + + handle_options (argc, argv, lang_mask); +} + +/* Handle target- and language-independent options. Return zero to + generate an "unknown option" message. Only options that need + extra handling need to be listed here; if you simply want + VALUE assigned to a variable, it happens automatically. */ + +static int +common_handle_option (size_t scode, const char *arg, + int value ATTRIBUTE_UNUSED) +{ + enum opt_code code = (enum opt_code) scode; + + switch (code) + { + default: + abort (); + + case OPT__help: + print_help (); + exit_after_options = true; + break; + + case OPT__version: + print_version (stderr, ""); + exit_after_options = true; + break; + + case OPT_Werror: + warnings_are_errors = value; + break; + + case OPT_Wsystem_headers: + warn_system_headers = value; + break; + + case OPT_d: + decode_d_option (arg); + break; + + case OPT_pedantic_errors: + flag_pedantic_errors = 1; + break; + + case OPT_w: + inhibit_warnings = true; + break; + } + + return 1; +} + +/* Output --help text. */ +static void +print_help (void) +{ + size_t i; + const char *p; + + GET_ENVIRONMENT (p, "COLUMNS"); + if (p) + { + int value = atoi (p); + if (value > 0) + columns = value; + } + + puts (_("The following options are language-independent:\n")); + + print_filtered_help (CL_COMMON); + + for (i = 0; lang_names[i]; i++) + { + printf (_("The %s front end recognizes the following options:\n\n"), + lang_names[i]); + print_filtered_help (1U << i); + } +} + +/* Print help for a specific front-end, etc. */ +static void +print_filtered_help (unsigned int flag) +{ + unsigned int i, len, filter, indent = 0; + bool duplicates = false; + const char *help, *opt, *tab; + static char *printed; + + if (flag == CL_COMMON || flag == CL_TARGET) + { + filter = flag; + if (!printed) + printed = xmalloc (cl_options_count); + memset (printed, 0, cl_options_count); + } + else + { + /* Don't print COMMON options twice. */ + filter = flag | CL_COMMON; + + for (i = 0; i < cl_options_count; i++) + { + if ((cl_options[i].flags & filter) != flag) + continue; + + /* Skip help for internal switches. */ + if (cl_options[i].flags & CL_UNDOCUMENTED) + continue; + + /* Skip switches that have already been printed, mark them to be + listed later. */ + if (printed[i]) + { + duplicates = true; + indent = print_switch (cl_options[i].opt_text, indent); + } + } + + if (duplicates) + { + putchar ('\n'); + putchar ('\n'); + } + } + + for (i = 0; i < cl_options_count; i++) + { + if ((cl_options[i].flags & filter) != flag) + continue; + + /* Skip help for internal switches. */ + if (cl_options[i].flags & CL_UNDOCUMENTED) + continue; + + /* Skip switches that have already been printed. */ + if (printed[i]) + continue; + + printed[i] = true; + + help = cl_options[i].help; + if (!help) + help = undocumented_msg; + + /* Get the translation. */ + help = _(help); + + tab = strchr (help, '\t'); + if (tab) + { + len = tab - help; + opt = help; + help = tab + 1; + } + else + { + opt = cl_options[i].opt_text; + len = strlen (opt); + } + + wrap_help (help, opt, len); + } + + putchar ('\n'); +} + +/* Output ITEM, of length ITEM_WIDTH, in the left column, followed by + word-wrapped HELP in a second column. */ +static unsigned int +print_switch (const char *text, unsigned int indent) +{ + unsigned int len = strlen (text) + 1; /* trailing comma */ + + if (indent) + { + putchar (','); + if (indent + len > columns) + { + putchar ('\n'); + putchar (' '); + indent = 1; + } + } + else + putchar (' '); + + putchar (' '); + fputs (text, stdout); + + return indent + len + 1; +} + +/* Output ITEM, of length ITEM_WIDTH, in the left column, followed by + word-wrapped HELP in a second column. */ +static void +wrap_help (const char *help, const char *item, unsigned int item_width) +{ + unsigned int col_width = 27; + unsigned int remaining, room, len; + + remaining = strlen (help); + + do + { + room = columns - 3 - MAX (col_width, item_width); + if (room > columns) + room = 0; + len = remaining; + + if (room < len) + { + unsigned int i; + + for (i = 0; help[i]; i++) + { + if (i >= room && len != remaining) + break; + if (help[i] == ' ') + len = i; + else if ((help[i] == '-' || help[i] == '/') + && help[i + 1] != ' ' + && i > 0 && ISALPHA (help[i - 1])) + len = i + 1; + } + } + + printf( " %-*.*s %.*s\n", col_width, item_width, item, len, help); + item_width = 0; + while (help[len] == ' ') + len++; + help += len; + remaining -= len; + } + while (remaining); +} + +/* Return 1 if OPTION is enabled, 0 if it is disabled, or -1 if it isn't + a simple on-off switch. */ + +int +option_enabled (int opt_idx) +{ + const struct cl_option *option = &(cl_options[opt_idx]); + if (option->flag_var) + switch (option->var_type) + { + case CLVC_BOOLEAN: + return *(int *) option->flag_var != 0; + + case CLVC_EQUAL: + return *(int *) option->flag_var == option->var_value; + + case CLVC_BIT_CLEAR: + return (*(int *) option->flag_var & option->var_value) == 0; + + case CLVC_BIT_SET: + return (*(int *) option->flag_var & option->var_value) != 0; + + case CLVC_STRING: + break; + } + return -1; +} + +/* Fill STATE with the current state of option OPTION. Return true if + there is some state to store. */ + +bool +get_option_state (int option, struct cl_option_state *state) +{ + if (cl_options[option].flag_var == 0) + return false; + + switch (cl_options[option].var_type) + { + case CLVC_BOOLEAN: + case CLVC_EQUAL: + state->data = cl_options[option].flag_var; + state->size = sizeof (int); + break; + + case CLVC_BIT_CLEAR: + case CLVC_BIT_SET: + state->ch = option_enabled (option); + state->data = &state->ch; + state->size = 1; + break; + + case CLVC_STRING: + state->data = *(const char **) cl_options[option].flag_var; + if (state->data == 0) + state->data = ""; + state->size = strlen (state->data) + 1; + break; + } + return true; +} diff --git a/support/cpp/opts.h b/support/cpp/opts.h new file mode 100644 index 0000000..3af501f --- /dev/null +++ b/support/cpp/opts.h @@ -0,0 +1,94 @@ +/* Command line option handling. + Copyright (C) 2002, 2003, 2004, 2005 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA +02110-1301, USA. */ + +#ifndef GCC_OPTS_H +#define GCC_OPTS_H + +/* Specifies how a switch's VAR_VALUE relates to its FLAG_VAR. */ +enum cl_var_type { + /* The switch is enabled when FLAG_VAR is nonzero. */ + CLVC_BOOLEAN, + + /* The switch is enabled when FLAG_VAR == VAR_VALUE. */ + CLVC_EQUAL, + + /* The switch is enabled when VAR_VALUE is not set in FLAG_VAR. */ + CLVC_BIT_CLEAR, + + /* The switch is enabled when VAR_VALUE is set in FLAG_VAR. */ + CLVC_BIT_SET, + + /* The switch takes a string argument and FLAG_VAR points to that + argument. */ + CLVC_STRING +}; + +struct cl_option +{ + const char *opt_text; + const char *help; + unsigned short back_chain; + unsigned char opt_len; + int neg_index; + unsigned int flags; + void *flag_var; + enum cl_var_type var_type; + int var_value; +}; + +/* Records that the state of an option consists of SIZE bytes starting + at DATA. DATA might point to CH in some cases. */ +struct cl_option_state { + const void *data; + size_t size; + char ch; +}; + +extern const struct cl_option cl_options[]; +extern const unsigned int cl_options_count; +extern const char *const lang_names[]; +extern bool no_unit_at_a_time_default; + +#define CL_DISABLED (1 << 21) /* Disabled in this configuration. */ +#define CL_TARGET (1 << 22) /* Target-specific option. */ +#define CL_REPORT (1 << 23) /* Report argument with -fverbose-asm */ +#define CL_JOINED (1 << 24) /* If takes joined argument. */ +#define CL_SEPARATE (1 << 25) /* If takes a separate argument. */ +#define CL_REJECT_NEGATIVE (1 << 26) /* Reject no- form. */ +#define CL_MISSING_OK (1 << 27) /* Missing argument OK (joined). */ +#define CL_UINTEGER (1 << 28) /* Argument is an integer >=0. */ +#define CL_COMMON (1 << 29) /* Language-independent. */ +#define CL_UNDOCUMENTED (1 << 30) /* Do not output with --help. */ + +/* Input file names. */ + +extern const char **in_fnames; + +/* The count of input filenames. */ + +extern unsigned num_in_fnames; + +size_t find_opt (const char *input, int lang_mask); +extern void prune_options (int *argcp, char ***argvp); +extern void decode_options (unsigned int argc, const char **argv); +extern int option_enabled (int opt_idx); +extern bool get_option_state (int, struct cl_option_state *); + +#endif diff --git a/support/cpp/output.h b/support/cpp/output.h new file mode 100644 index 0000000..fda098b --- /dev/null +++ b/support/cpp/output.h @@ -0,0 +1,632 @@ +/* Declarations for insn-output.c. These functions are defined in recog.c, + final.c, and varasm.c. + Copyright (C) 1987, 1991, 1994, 1997, 1998, + 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA +02110-1301, USA. */ + +#ifndef GCC_OUTPUT_H +#define GCC_OUTPUT_H + +/* Initialize data in final at the beginning of a compilation. */ +extern void init_final (const char *); + +/* Enable APP processing of subsequent output. + Used before the output from an `asm' statement. */ +extern void app_enable (void); + +/* Disable APP processing of subsequent output. + Called from varasm.c before most kinds of output. */ +extern void app_disable (void); + +/* Return the number of slots filled in the current + delayed branch sequence (we don't count the insn needing the + delay slot). Zero if not in a delayed branch sequence. */ +extern int dbr_sequence_length (void); + +/* Indicate that branch shortening hasn't yet been done. */ +extern void init_insn_lengths (void); + +/* Obtain the current length of an insn. If branch shortening has been done, + get its actual length. Otherwise, get its maximum length. */ +extern int get_attr_length (rtx); + +/* Obtain the current length of an insn. If branch shortening has been done, + get its actual length. Otherwise, get its minimum length. */ +extern int get_attr_min_length (rtx); + +/* Make a pass over all insns and compute their actual lengths by shortening + any branches of variable length if possible. */ +extern void shorten_branches (rtx); + +/* Output assembler code for the start of a function, + and initialize some of the variables in this file + for the new function. The label for the function and associated + assembler pseudo-ops have already been output in + `assemble_start_function'. */ +extern void final_start_function (rtx, FILE *, int); + +/* Output assembler code for the end of a function. + For clarity, args are same as those of `final_start_function' + even though not all of them are needed. */ +extern void final_end_function (void); + +/* Output assembler code for some insns: all or part of a function. */ +extern void final (rtx, FILE *, int); + +/* The final scan for one insn, INSN. Args are same as in `final', except + that INSN is the insn being scanned. Value returned is the next insn to + be scanned. */ +extern rtx final_scan_insn (rtx, FILE *, int, int, int *); + +/* Replace a SUBREG with a REG or a MEM, based on the thing it is a + subreg of. */ +extern rtx alter_subreg (rtx *); + +/* Report inconsistency between the assembler template and the operands. + In an `asm', it's the user's fault; otherwise, the compiler's fault. */ +extern void output_operand_lossage (const char *, ...) ATTRIBUTE_PRINTF_1; + +/* Output a string of assembler code, substituting insn operands. + Defined in final.c. */ +extern void output_asm_insn (const char *, rtx *); + +/* Compute a worst-case reference address of a branch so that it + can be safely used in the presence of aligned labels. + Defined in final.c. */ +extern int insn_current_reference_address (rtx); + +/* Find the alignment associated with a CODE_LABEL. + Defined in final.c. */ +extern int label_to_alignment (rtx); + +/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ +extern void output_asm_label (rtx); + +/* Print a memory reference operand for address X + using machine-dependent assembler syntax. */ +extern void output_address (rtx); + +/* Print an integer constant expression in assembler syntax. + Addition and subtraction are the only arithmetic + that may appear in these expressions. */ +extern void output_addr_const (FILE *, rtx); + +/* Output a string of assembler code, substituting numbers, strings + and fixed syntactic prefixes. */ +#if GCC_VERSION >= 3004 +#define ATTRIBUTE_ASM_FPRINTF(m, n) __attribute__ ((__format__ (__asm_fprintf__, m, n))) ATTRIBUTE_NONNULL(m) +/* This is a magic identifier which allows GCC to figure out the type + of HOST_WIDE_INT for %wd specifier checks. You must issue this + typedef before using the __asm_fprintf__ format attribute. */ +typedef HOST_WIDE_INT __gcc_host_wide_int__; +#else +#define ATTRIBUTE_ASM_FPRINTF(m, n) ATTRIBUTE_NONNULL(m) +#endif + +extern void asm_fprintf (FILE *file, const char *p, ...) + ATTRIBUTE_ASM_FPRINTF(2, 3); + +/* Split up a CONST_DOUBLE or integer constant rtx into two rtx's for single + words. */ +extern void split_double (rtx, rtx *, rtx *); + +/* Return nonzero if this function has no function calls. */ +extern int leaf_function_p (void); + +/* Return 1 if branch is a forward branch. + Uses insn_shuid array, so it works only in the final pass. May be used by + output templates to add branch prediction hints, for example. */ +extern int final_forward_branch_p (rtx); + +/* Return 1 if this function uses only the registers that can be + safely renumbered. */ +extern int only_leaf_regs_used (void); + +/* Scan IN_RTX and its subexpressions, and renumber all regs into those + available in leaf functions. */ +extern void leaf_renumber_regs_insn (rtx); + +/* Locate the proper template for the given insn-code. */ +extern const char *get_insn_template (int, rtx); + +/* Functions in flow.c */ +extern int regno_clobbered_at_setjmp (int); + +/* Functions in varasm.c. */ + +/* Declare DECL to be a weak symbol. */ +extern void declare_weak (tree); +/* Merge weak status. */ +extern void merge_weak (tree, tree); + +/* Emit any pending weak declarations. */ +extern void weak_finish (void); + +/* Decode an `asm' spec for a declaration as a register name. + Return the register number, or -1 if nothing specified, + or -2 if the ASMSPEC is not `cc' or `memory' and is not recognized, + or -3 if ASMSPEC is `cc' and is not recognized, + or -4 if ASMSPEC is `memory' and is not recognized. + Accept an exact spelling or a decimal number. + Prefixes such as % are optional. */ +extern int decode_reg_name (const char *); + +extern void assemble_alias (tree, tree); + +extern void default_assemble_visibility (tree, int); + +/* Output a string of literal assembler code + for an `asm' keyword used between functions. */ +extern void assemble_asm (tree); + +/* Output assembler code for the constant pool of a function and associated + with defining the name of the function. DECL describes the function. + NAME is the function's name. For the constant pool, we use the current + constant pool data. */ +extern void assemble_start_function (tree, const char *); + +/* Output assembler code associated with defining the size of the + function. DECL describes the function. NAME is the function's name. */ +extern void assemble_end_function (tree, const char *); + +/* Assemble everything that is needed for a variable or function declaration. + Not used for automatic variables, and not used for function definitions. + Should not be called for variables of incomplete structure type. + + TOP_LEVEL is nonzero if this variable has file scope. + AT_END is nonzero if this is the special handling, at end of compilation, + to define things that have had only tentative definitions. + DONT_OUTPUT_DATA if nonzero means don't actually output the + initial value (that will be done by the caller). */ +extern void assemble_variable (tree, int, int, int); + +/* Compute the alignment of variable specified by DECL. + DONT_OUTPUT_DATA is from assemble_variable. */ +extern void align_variable (tree decl, bool dont_output_data); + +/* Output something to declare an external symbol to the assembler. + (Most assemblers don't need this, so we normally output nothing.) + Do nothing if DECL is not external. */ +extern void assemble_external (tree); + +/* Assemble code to leave SIZE bytes of zeros. */ +extern void assemble_zeros (unsigned HOST_WIDE_INT); + +/* Assemble an alignment pseudo op for an ALIGN-bit boundary. */ +extern void assemble_align (int); + +/* Assemble a string constant with the specified C string as contents. */ +extern void assemble_string (const char *, int); + +/* Similar, for calling a library function FUN. */ +extern void assemble_external_libcall (rtx); + +/* Assemble a label named NAME. */ +extern void assemble_label (const char *); + +/* Output to FILE (an assembly file) a reference to NAME. If NAME + starts with a *, the rest of NAME is output verbatim. Otherwise + NAME is transformed in a target-specific way (usually by the + addition of an underscore). */ +extern void assemble_name_raw (FILE *, const char *); + +/* Like assemble_name_raw, but should be used when NAME might refer to + an entity that is also represented as a tree (like a function or + variable). If NAME does refer to such an entity, that entity will + be marked as referenced. */ +extern void assemble_name (FILE *, const char *); + +/* Return the assembler directive for creating a given kind of integer + object. SIZE is the number of bytes in the object and ALIGNED_P + indicates whether it is known to be aligned. Return NULL if the + assembly dialect has no such directive. + + The returned string should be printed at the start of a new line and + be followed immediately by the object's initial value. */ +extern const char *integer_asm_op (int, int); + +/* Use directive OP to assemble an integer object X. Print OP at the + start of the line, followed immediately by the value of X. */ +extern void assemble_integer_with_op (const char *, rtx); + +/* The default implementation of the asm_out.integer target hook. */ +extern bool default_assemble_integer (rtx, unsigned int, int); + +/* Assemble the integer constant X into an object of SIZE bytes. ALIGN is + the alignment of the integer in bits. Return 1 if we were able to output + the constant, otherwise 0. If FORCE is nonzero the constant must + be outputable. */ +extern bool assemble_integer (rtx, unsigned, unsigned, int); + +/* An interface to assemble_integer for the common case in which a value is + fully aligned and must be printed. VALUE is the value of the integer + object and SIZE is the number of bytes it contains. */ +#define assemble_aligned_integer(SIZE, VALUE) \ + assemble_integer (VALUE, SIZE, (SIZE) * BITS_PER_UNIT, 1) + +#ifdef REAL_VALUE_TYPE_SIZE +/* Assemble the floating-point constant D into an object of size MODE. */ +extern void assemble_real (REAL_VALUE_TYPE, enum machine_mode, unsigned); +#endif + +/* Return the size of the constant pool. */ +extern int get_pool_size (void); + +#ifdef HAVE_peephole +extern rtx peephole (rtx); +#endif + +extern void output_shared_constant_pool (void); + +extern void output_object_blocks (void); + +/* Whether a constructor CTOR is a valid static constant initializer if all + its elements are. This used to be internal to initializer_constant_valid_p + and has been exposed to let other functions like categorize_ctor_elements + evaluate the property while walking a constructor for other purposes. */ + +extern bool constructor_static_from_elts_p (tree); + +/* Return nonzero if VALUE is a valid constant-valued expression + for use in initializing a static variable; one that can be an + element of a "constant" initializer. + + Return null_pointer_node if the value is absolute; + if it is relocatable, return the variable that determines the relocation. + We assume that VALUE has been folded as much as possible; + therefore, we do not need to check for such things as + arithmetic-combinations of integers. */ +extern tree initializer_constant_valid_p (tree, tree); + +/* Output assembler code for constant EXP to FILE, with no label. + This includes the pseudo-op such as ".int" or ".byte", and a newline. + Assumes output_addressed_constants has been done on EXP already. + + Generate exactly SIZE bytes of assembler data, padding at the end + with zeros if necessary. SIZE must always be specified. + + ALIGN is the alignment in bits that may be assumed for the data. */ +extern void output_constant (tree, unsigned HOST_WIDE_INT, unsigned int); + +/* When outputting delayed branch sequences, this rtx holds the + sequence being output. It is null when no delayed branch + sequence is being output, so it can be used as a test in the + insn output code. + + This variable is defined in final.c. */ +extern rtx final_sequence; + +/* The line number of the beginning of the current function. Various + md code needs this so that it can output relative linenumbers. */ + +#ifdef SDB_DEBUGGING_INFO /* Avoid undef sym in certain broken linkers. */ +extern int sdb_begin_function_line; +#endif + +/* File in which assembler code is being written. */ + +#ifdef BUFSIZ +extern FILE *asm_out_file; +#endif + +/* The first global object in the file. */ +extern const char *first_global_object_name; + +/* The first weak object in the file. */ +extern const char *weak_global_object_name; + +/* Nonzero if function being compiled doesn't contain any calls + (ignoring the prologue and epilogue). This is set prior to + local register allocation and is valid for the remaining + compiler passes. */ + +extern int current_function_is_leaf; + +/* Nonzero if function being compiled doesn't modify the stack pointer + (ignoring the prologue and epilogue). This is only valid after + life_analysis has run. */ + +extern int current_function_sp_is_unchanging; + +/* Nonzero if the function being compiled is a leaf function which only + uses leaf registers. This is valid after reload (specifically after + sched2) and is useful only if the port defines LEAF_REGISTERS. */ + +extern int current_function_uses_only_leaf_regs; + +/* Default file in which to dump debug output. */ + +#ifdef BUFSIZ +extern FILE *dump_file; +#endif + +/* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ +extern rtx current_insn_predicate; + +/* Last insn processed by final_scan_insn. */ +extern rtx current_output_insn; + +/* Nonzero while outputting an `asm' with operands. + This means that inconsistencies are the user's fault, so don't die. + The precise value is the insn being output, to pass to error_for_asm. */ +extern rtx this_is_asm_operands; + +/* Carry information from ASM_DECLARE_OBJECT_NAME + to ASM_FINISH_DECLARE_OBJECT. */ +extern int size_directive_output; +extern tree last_assemble_variable_decl; + +extern bool first_function_block_is_cold; + +/* Decide whether DECL needs to be in a writable section. + RELOC is the same as for SELECT_SECTION. */ +extern bool decl_readonly_section (tree, int); + +/* This can be used to compute RELOC for the function above, when + given a constant expression. */ +extern int compute_reloc_for_constant (tree); + +/* User label prefix in effect for this compilation. */ +extern const char *user_label_prefix; + +/* Default target function prologue and epilogue assembler output. */ +extern void default_function_pro_epilogue (FILE *, HOST_WIDE_INT); + +/* Default target hook that outputs nothing to a stream. */ +extern void no_asm_to_stream (FILE *); + +/* Flags controlling properties of a section. */ +#define SECTION_ENTSIZE 0x000ff /* entity size in section */ +#define SECTION_CODE 0x00100 /* contains code */ +#define SECTION_WRITE 0x00200 /* data is writable */ +#define SECTION_DEBUG 0x00400 /* contains debug data */ +#define SECTION_LINKONCE 0x00800 /* is linkonce */ +#define SECTION_SMALL 0x01000 /* contains "small data" */ +#define SECTION_BSS 0x02000 /* contains zeros only */ +#define SECTION_FORGET 0x04000 /* forget that we've entered the section */ +#define SECTION_MERGE 0x08000 /* contains mergeable data */ +#define SECTION_STRINGS 0x10000 /* contains zero terminated strings without + embedded zeros */ +#define SECTION_OVERRIDE 0x20000 /* allow override of default flags */ +#define SECTION_TLS 0x40000 /* contains thread-local storage */ +#define SECTION_NOTYPE 0x80000 /* don't output @progbits */ +#define SECTION_DECLARED 0x100000 /* section has been used */ +#define SECTION_STYLE_MASK 0x600000 /* bits used for SECTION_STYLE */ +#define SECTION_COMMON 0x800000 /* contains common data */ +#define SECTION_MACH_DEP 0x1000000 /* subsequent bits reserved for target */ + +/* This SECTION_STYLE is used for unnamed sections that we can switch + to using a special assembler directive. */ +#define SECTION_UNNAMED 0x000000 + +/* This SECTION_STYLE is used for named sections that we can switch + to using a general section directive. */ +#define SECTION_NAMED 0x200000 + +/* This SECTION_STYLE is used for sections that we cannot switch to at + all. The choice of section is implied by the directive that we use + to declare the object. */ +#define SECTION_NOSWITCH 0x400000 + +/* A helper function for default_elf_select_section and + default_elf_unique_section. Categorizes the DECL. */ + +enum section_category +{ + SECCAT_TEXT, + + SECCAT_RODATA, + SECCAT_RODATA_MERGE_STR, + SECCAT_RODATA_MERGE_STR_INIT, + SECCAT_RODATA_MERGE_CONST, + SECCAT_SRODATA, + + SECCAT_DATA, + + /* To optimize loading of shared programs, define following subsections + of data section: + _REL Contains data that has relocations, so they get grouped + together and dynamic linker will visit fewer pages in memory. + _RO Contains data that is otherwise read-only. This is useful + with prelinking as most relocations won't be dynamically + linked and thus stay read only. + _LOCAL Marks data containing relocations only to local objects. + These relocations will get fully resolved by prelinking. */ + SECCAT_DATA_REL, + SECCAT_DATA_REL_LOCAL, + SECCAT_DATA_REL_RO, + SECCAT_DATA_REL_RO_LOCAL, + + SECCAT_SDATA, + SECCAT_TDATA, + + SECCAT_BSS, + SECCAT_SBSS, + SECCAT_TBSS +}; + +/* Information that is provided by all instances of the section type. */ +struct section_common GTY(()) { + /* The set of SECTION_* flags that apply to this section. */ + unsigned int flags; +}; + +/* Information about a SECTION_NAMED section. */ +struct named_section GTY(()) { + struct section_common common; + + /* The name of the section. */ + const char *name; + + /* If nonnull, the VAR_DECL or FUNCTION_DECL with which the + section is associated. */ + tree decl; +}; + +/* A callback that writes the assembly code for switching to an unnamed + section. The argument provides callback-specific data. */ +typedef void (*unnamed_section_callback) (const void *); + +/* Information about a SECTION_UNNAMED section. */ +struct unnamed_section GTY(()) { + struct section_common common; + + /* The callback used to switch to the section, and the data that + should be passed to the callback. */ + unnamed_section_callback GTY ((skip)) callback; + const void *GTY ((skip)) data; + + /* The next entry in the chain of unnamed sections. */ + section *next; +}; + +/* A callback that writes the assembly code for a decl in a + SECTION_NOSWITCH section. DECL is the decl that should be assembled + and NAME is the name of its SYMBOL_REF. SIZE is the size of the decl + in bytes and ROUNDED is that size rounded up to the next + BIGGEST_ALIGNMENT / BITS_PER_UNIT boundary. + + Return true if the callback used DECL_ALIGN to set the object's + alignment. A false return value implies that we are relying + on the rounded size to align the decl. */ +typedef bool (*noswitch_section_callback) (tree decl, const char *name, + unsigned HOST_WIDE_INT size, + unsigned HOST_WIDE_INT rounded); + +/* Information about a SECTION_NOSWITCH section. */ +struct noswitch_section GTY(()) { + struct section_common common; + + /* The callback used to assemble decls in this section. */ + noswitch_section_callback GTY ((skip)) callback; +}; + +/* Information about a section, which may be named or unnamed. */ +union section GTY ((desc ("SECTION_STYLE (&(%h))"))) +{ + struct section_common GTY ((skip)) common; + struct named_section GTY ((tag ("SECTION_NAMED"))) named; + struct unnamed_section GTY ((tag ("SECTION_UNNAMED"))) unnamed; + struct noswitch_section GTY ((tag ("SECTION_NOSWITCH"))) noswitch; +}; + +/* Return the style of section SECT. */ +#define SECTION_STYLE(SECT) ((SECT)->common.flags & SECTION_STYLE_MASK) + +struct object_block; + +/* Special well-known sections. */ +extern GTY(()) section *text_section; +extern GTY(()) section *data_section; +extern GTY(()) section *readonly_data_section; +extern GTY(()) section *sdata_section; +extern GTY(()) section *ctors_section; +extern GTY(()) section *dtors_section; +extern GTY(()) section *bss_section; +extern GTY(()) section *sbss_section; +extern GTY(()) section *exception_section; +extern GTY(()) section *eh_frame_section; +extern GTY(()) section *tls_comm_section; +extern GTY(()) section *comm_section; +extern GTY(()) section *lcomm_section; +extern GTY(()) section *bss_noswitch_section; + +extern GTY(()) section *in_section; +extern GTY(()) bool in_cold_section_p; + +extern section *get_unnamed_section (unsigned int, void (*) (const void *), + const void *); +extern section *get_section (const char *, unsigned int, tree); +extern section *get_named_section (tree, const char *, int); +extern void place_block_symbol (rtx); +extern rtx get_section_anchor (struct object_block *, HOST_WIDE_INT, + enum tls_model); +extern section *mergeable_constant_section (enum machine_mode, + unsigned HOST_WIDE_INT, + unsigned int); +extern section *function_section (tree); +extern section *unlikely_text_section (void); +extern section *current_function_section (void); + +extern bool unlikely_text_section_p (section *); +extern void switch_to_section (section *); +extern void output_section_asm_op (const void *); + +extern unsigned int default_section_type_flags (tree, const char *, int); + +extern bool have_global_bss_p (void); +extern void default_no_named_section (const char *, unsigned int, tree); +extern void default_elf_asm_named_section (const char *, unsigned int, tree); +extern enum section_category categorize_decl_for_section (tree, int); +extern void default_coff_asm_named_section (const char *, unsigned int, tree); +extern void default_pe_asm_named_section (const char *, unsigned int, tree); + +extern void default_stabs_asm_out_destructor (rtx, int); +extern void default_named_section_asm_out_destructor (rtx, int); +extern void default_dtor_section_asm_out_destructor (rtx, int); +extern void default_stabs_asm_out_constructor (rtx, int); +extern void default_named_section_asm_out_constructor (rtx, int); +extern void default_ctor_section_asm_out_constructor (rtx, int); + +extern section *default_select_section (tree, int, unsigned HOST_WIDE_INT); +extern section *default_elf_select_section (tree, int, unsigned HOST_WIDE_INT); +extern void default_unique_section (tree, int); +extern section *default_function_rodata_section (tree); +extern section *default_no_function_rodata_section (tree); +extern section *default_select_rtx_section (enum machine_mode, rtx, + unsigned HOST_WIDE_INT); +extern section *default_elf_select_rtx_section (enum machine_mode, rtx, + unsigned HOST_WIDE_INT); +extern void default_encode_section_info (tree, rtx, int); +extern const char *default_strip_name_encoding (const char *); +extern void default_asm_output_anchor (rtx); +extern bool default_use_anchors_for_symbol_p (rtx); +extern bool default_binds_local_p (tree); +extern bool default_binds_local_p_1 (tree, int); +extern void default_globalize_label (FILE *, const char *); +extern void default_emit_unwind_label (FILE *, tree, int, int); +extern void default_emit_except_table_label (FILE *); +extern void default_internal_label (FILE *, const char *, unsigned long); +extern void default_file_start (void); +extern void file_end_indicate_exec_stack (void); +extern bool default_valid_pointer_mode (enum machine_mode); + +extern int default_address_cost (rtx); + +/* dbxout helper functions */ +#if defined DBX_DEBUGGING_INFO || defined XCOFF_DEBUGGING_INFO + +extern void dbxout_int (int); +extern void dbxout_stabd (int, int); +extern void dbxout_begin_stabn (int); +extern void dbxout_begin_stabn_sline (int); +extern void dbxout_begin_empty_stabs (int); +extern void dbxout_begin_simple_stabs (const char *, int); +extern void dbxout_begin_simple_stabs_desc (const char *, int, int); + +extern void dbxout_stab_value_zero (void); +extern void dbxout_stab_value_label (const char *); +extern void dbxout_stab_value_label_diff (const char *, const char *); +extern void dbxout_stab_value_internal_label (const char *, int *); +extern void dbxout_stab_value_internal_label_diff (const char *, int *, + const char *); + +#endif + +#endif /* ! GCC_OUTPUT_H */ diff --git a/support/cpp/prefix.c b/support/cpp/prefix.c new file mode 100644 index 0000000..652f49b --- /dev/null +++ b/support/cpp/prefix.c @@ -0,0 +1,355 @@ +/* Utility to update paths from internal to external forms. + Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 + Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU Library General Public License as published by +the Free Software Foundation; either version 2 of the License, or (at +your option) any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Library General Public License for more details. + +You should have received a copy of the GNU Library General Public +License along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, Inc., 51 Franklin Street, Fifth Floor, +Boston, MA 02110-1301, USA. */ + +/* This file contains routines to update a path, both to canonicalize + the directory format and to handle any prefix translation. + + This file must be compiled with -DPREFIX= to specify the "prefix" + value used by configure. If a filename does not begin with this + prefix, it will not be affected other than by directory canonicalization. + + Each caller of 'update_path' may specify both a filename and + a translation prefix and consist of the name of the package that contains + the file ("@GCC", "@BINUTIL", "@GNU", etc). + + If the prefix is not specified, the filename will only undergo + directory canonicalization. + + If it is specified, the string given by PREFIX will be replaced + by the specified prefix (with a '@' in front unless the prefix begins + with a '$') and further translation will be done as follows + until none of the two conditions below are met: + + 1) If the filename begins with '@', the string between the '@' and + the end of the name or the first '/' or directory separator will + be considered a "key" and looked up as follows: + + -- If this is a Win32 OS, then the Registry will be examined for + an entry of "key" in + + HKEY_LOCAL_MACHINE\SOFTWARE\Free Software Foundation\ + + if found, that value will be used. defaults to GCC version + string, but can be overridden at configuration time. + + -- If not found (or not a Win32 OS), the environment variable + key_ROOT (the value of "key" concatenated with the constant "_ROOT") + is tried. If that fails, then PREFIX (see above) is used. + + 2) If the filename begins with a '$', the rest of the string up + to the end or the first '/' or directory separator will be used + as an environment variable, whose value will be returned. + + Once all this is done, any '/' will be converted to DIR_SEPARATOR, + if they are different. + + NOTE: using resolve_keyed_path under Win32 requires linking with + advapi32.dll. */ + + +#include "config.h" +#include "system.h" +#if defined(_WIN32) && defined(ENABLE_WIN32_REGISTRY) +#include +#endif +#include "prefix.h" + +static const char *std_prefix = PREFIX; + +static const char *get_key_value (char *); +static char *translate_name (char *); +static char *save_string (const char *, int); +static void tr (char *, int, int); + +#if defined(_WIN32) && defined(ENABLE_WIN32_REGISTRY) +static char *lookup_key (char *); +static HKEY reg_key = (HKEY) INVALID_HANDLE_VALUE; +#endif + +/* Given KEY, as above, return its value. */ + +static const char * +get_key_value (char *key) +{ + const char *prefix = 0; + char *temp = 0; + +#if defined(_WIN32) && defined(ENABLE_WIN32_REGISTRY) + prefix = lookup_key (key); +#endif + + if (prefix == 0) + prefix = getenv (temp = concat (key, "_ROOT", NULL)); + + if (prefix == 0) + prefix = std_prefix; + + if (temp) + free (temp); + + return prefix; +} + +/* Return a copy of a string that has been placed in the heap. */ + +static char * +save_string (const char *s, int len) +{ + char *result = XNEWVEC (char, len + 1); + + memcpy (result, s, len); + result[len] = 0; + return result; +} + +#if defined(_WIN32) && defined(ENABLE_WIN32_REGISTRY) + +#ifndef WIN32_REGISTRY_KEY +# define WIN32_REGISTRY_KEY BASEVER +#endif + +/* Look up "key" in the registry, as above. */ + +static char * +lookup_key (char *key) +{ + char *dst; + DWORD size; + DWORD type; + LONG res; + + if (reg_key == (HKEY) INVALID_HANDLE_VALUE) + { + res = RegOpenKeyExA (HKEY_LOCAL_MACHINE, "SOFTWARE", 0, + KEY_READ, ®_key); + + if (res == ERROR_SUCCESS) + res = RegOpenKeyExA (reg_key, "Free Software Foundation", 0, + KEY_READ, ®_key); + + if (res == ERROR_SUCCESS) + res = RegOpenKeyExA (reg_key, WIN32_REGISTRY_KEY, 0, + KEY_READ, ®_key); + + if (res != ERROR_SUCCESS) + { + reg_key = (HKEY) INVALID_HANDLE_VALUE; + return 0; + } + } + + size = 32; + dst = xmalloc (size); + + res = RegQueryValueExA (reg_key, key, 0, &type, (LPBYTE) dst, &size); + if (res == ERROR_MORE_DATA && type == REG_SZ) + { + dst = xrealloc (dst, size); + res = RegQueryValueExA (reg_key, key, 0, &type, (LPBYTE) dst, &size); + } + + if (type != REG_SZ || res != ERROR_SUCCESS) + { + free (dst); + dst = 0; + } + + return dst; +} +#endif + +/* If NAME, a malloc-ed string, starts with a '@' or '$', apply the + translation rules above and return a newly malloc-ed name. + Otherwise, return the given name. */ + +static char * +translate_name (char *name) +{ + char code; + char *key, *old_name; + const char *prefix; + int keylen; + + for (;;) + { + code = name[0]; + if (code != '@' && code != '$') + break; + + for (keylen = 0; + (name[keylen + 1] != 0 && !IS_DIR_SEPARATOR (name[keylen + 1])); + keylen++) + ; + + key = (char *) alloca (keylen + 1); + strncpy (key, &name[1], keylen); + key[keylen] = 0; + + if (code == '@') + { + prefix = get_key_value (key); + if (prefix == 0) + prefix = std_prefix; + } + else + prefix = getenv (key); + + if (prefix == 0) + prefix = PREFIX; + + /* We used to strip trailing DIR_SEPARATORs here, but that can + sometimes yield a result with no separator when one was coded + and intended by the user, causing two path components to run + together. */ + + old_name = name; + name = concat (prefix, &name[keylen + 1], NULL); + free (old_name); + } + + return name; +} + +/* In a NUL-terminated STRING, replace character C1 with C2 in-place. */ +static void +tr (char *string, int c1, int c2) +{ + do + { + if (*string == c1) + *string = c2; + } + while (*string++); +} + +/* Update PATH using KEY if PATH starts with PREFIX as a directory. + The returned string is always malloc-ed, and the caller is + responsible for freeing it. */ + +char * +update_path (const char *path, const char *key) +{ + char *result, *p; + const int len = strlen (std_prefix); + + if (! strncmp (path, std_prefix, len) + && (IS_DIR_SEPARATOR(path[len]) + || path[len] == '\0') + && key != 0) + { + bool free_key = false; + + if (key[0] != '$') + { + key = concat ("@", key, NULL); + free_key = true; + } + + result = concat (key, &path[len], NULL); + if (free_key) + free ((char *) key); + result = translate_name (result); + } + else + result = xstrdup (path); + +#ifndef ALWAYS_STRIP_DOTDOT +#define ALWAYS_STRIP_DOTDOT 0 +#endif + + p = result; + while (1) + { + char *src, *dest; + + p = strchr (p, '.'); + if (p == NULL) + break; + /* Look for `/../' */ + if (p[1] == '.' + && IS_DIR_SEPARATOR (p[2]) + && (p != result && IS_DIR_SEPARATOR (p[-1]))) + { + *p = 0; + if (!ALWAYS_STRIP_DOTDOT && access (result, X_OK) == 0) + { + *p = '.'; + break; + } + else + { + /* We can't access the dir, so we won't be able to + access dir/.. either. Strip out `dir/../'. If `dir' + turns out to be `.', strip one more path component. */ + dest = p; + do + { + --dest; + while (dest != result && IS_DIR_SEPARATOR (*dest)) + --dest; + while (dest != result && !IS_DIR_SEPARATOR (dest[-1])) + --dest; + } + while (dest != result && *dest == '.'); + /* If we have something like `./..' or `/..', don't + strip anything more. */ + if (*dest == '.' || IS_DIR_SEPARATOR (*dest)) + { + *p = '.'; + break; + } + src = p + 3; + while (IS_DIR_SEPARATOR (*src)) + ++src; + p = dest; + while ((*dest++ = *src++) != 0) + ; + } + } + else + ++p; + } + +#ifdef UPDATE_PATH_HOST_CANONICALIZE + /* Perform host dependent canonicalization when needed. */ + UPDATE_PATH_HOST_CANONICALIZE (result); +#endif + +#ifdef DIR_SEPARATOR_2 + /* Convert DIR_SEPARATOR_2 to DIR_SEPARATOR. */ + if (DIR_SEPARATOR_2 != DIR_SEPARATOR) + tr (result, DIR_SEPARATOR_2, DIR_SEPARATOR); +#endif + +#if defined (DIR_SEPARATOR) && !defined (DIR_SEPARATOR_2) + if (DIR_SEPARATOR != '/') + tr (result, '/', DIR_SEPARATOR); +#endif + + return result; +} + +/* Reset the standard prefix. */ +void +set_std_prefix (const char *prefix, int len) +{ + std_prefix = save_string (prefix, len); +} diff --git a/support/cpp/prefix.h b/support/cpp/prefix.h new file mode 100644 index 0000000..e6e653a --- /dev/null +++ b/support/cpp/prefix.h @@ -0,0 +1,31 @@ +/* Provide prototypes for functions exported from prefix.c. + Copyright (C) 1999, 2003 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU Library General Public License as published by +the Free Software Foundation; either version 2 of the License, or (at +your option) any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Library General Public License for more details. + +You should have received a copy of the GNU Library General Public +License along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, Inc., 51 Franklin Street, Fifth Floor, +Boston, MA 02110-1301, USA. */ + + +#ifndef GCC_PREFIX_H +#define GCC_PREFIX_H + +/* Update PATH using KEY if PATH starts with PREFIX. The returned + string is always malloc-ed, and the caller is responsible for + freeing it. */ +extern char *update_path (const char *path, const char *key); +extern void set_std_prefix (const char *, int); + +#endif /* ! GCC_PREFIX_H */ diff --git a/support/cpp/sdcpp-opts.c b/support/cpp/sdcpp-opts.c new file mode 100644 index 0000000..3f863f4 --- /dev/null +++ b/support/cpp/sdcpp-opts.c @@ -0,0 +1,932 @@ +/* C/ObjC/C++ command line option handling. + Copyright (C) 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. + Contributed by Neil Booth. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA +02110-1301, USA. */ + +#include "config.h" +#include "system.h" +#include "intl.h" +#include "cppdefault.h" +#include "c-incpath.h" +#include "opts.h" +#include "options.h" +#include "mkdeps.h" + +#ifndef DOLLARS_IN_IDENTIFIERS +# define DOLLARS_IN_IDENTIFIERS true +#endif + +#ifndef TARGET_SYSTEM_ROOT +# define TARGET_SYSTEM_ROOT NULL +#endif + +/* CPP's options. */ +static cpp_options *cpp_opts; + +/* Input filename. */ +static const char *this_input_filename; + +/* Filename and stream for preprocessed output. */ +static const char *out_fname; +static FILE *out_stream; + +/* Append dependencies to deps_file. */ +static bool deps_append; + +/* If dependency switches (-MF etc.) have been given. */ +static bool deps_seen; + +/* If -v seen. */ +static bool verbose; + +/* Dependency output file. */ +static const char *deps_file; + +/* The prefix given by -iprefix, if any. */ +static const char *iprefix; + +/* The multilib directory given by -imultilib, if any. */ +static const char *imultilib; + +/* The system root, if any. Overridden by -isysroot. */ +static const char *sysroot = TARGET_SYSTEM_ROOT; + +/* Zero disables all standard directories for headers. */ +static bool std_inc = true; + +/* If the quote chain has been split by -I-. */ +static bool quote_chain_split; + +/* If -Wunused-macros. */ +static bool warn_unused_macros; + +/* If -Wvariadic-macros. */ +static bool warn_variadic_macros = true; + +/* Number of deferred options. */ +static size_t deferred_count; + +/* Number of deferred options scanned for -include. */ +static size_t include_cursor; + +static void handle_OPT_d (const char *); +static void set_std_c89 (int, int); +static void set_std_c99 (int); +static void check_deps_environment_vars (void); +static void handle_deferred_opts (void); +static void sanitize_cpp_opts (void); +static void add_prefixed_path (const char *, size_t); +static void push_command_line_include (void); +static void cb_file_change (cpp_reader *, const struct line_map *); +static void cb_dir_change (cpp_reader *, const char *); +static void finish_options (void); + +#ifndef STDC_0_IN_SYSTEM_HEADERS +#define STDC_0_IN_SYSTEM_HEADERS 0 +#endif + +/* Holds switches parsed by sdcpp_common_handle_option (), but whose + handling is deferred to sdcpp_common_post_options (). */ +static void defer_opt (enum opt_code, const char *); +static struct deferred_opt +{ + enum opt_code code; + const char *arg; +} *deferred_opts; + +/* Complain that switch CODE expects an argument but none was + provided. OPT was the command-line option. Return FALSE to get + the default message in opts.c, TRUE if we provide a specialized + one. */ +bool +sdcpp_common_missing_argument (const char *opt, size_t code) +{ + switch (code) + { + default: + /* Pick up the default message. */ + return false; + + case OPT_A: + error ("assertion missing after \"%s\"", opt); + break; + + case OPT_D: + case OPT_U: + error ("macro name missing after \"%s\"", opt); + break; + + case OPT_I: + case OPT_idirafter: + case OPT_isysroot: + case OPT_isystem: + case OPT_iquote: + error ("missing path after \"%s\"", opt); + break; + + case OPT_MF: + case OPT_MD: + case OPT_MMD: + case OPT_include: + case OPT_imacros: + case OPT_o: + error ("missing filename after \"%s\"", opt); + break; + + case OPT_MQ: + case OPT_MT: + error ("missing makefile target after \"%s\"", opt); + break; + } + + return true; +} + +/* Defer option CODE with argument ARG. */ +static void +defer_opt (enum opt_code code, const char *arg) +{ + deferred_opts[deferred_count].code = code; + deferred_opts[deferred_count].arg = arg; + deferred_count++; +} + +/* Common initialization before parsing options. */ +unsigned int +sdcpp_common_init_options (unsigned int argc, const char **argv ATTRIBUTE_UNUSED) +{ + parse_in = cpp_create_reader (CLK_GNUC89, NULL, &line_table); + + cpp_opts = cpp_get_options (parse_in); + cpp_opts->dollars_in_ident = DOLLARS_IN_IDENTIFIERS; + cpp_opts->objc = 0; + + /* Reset to avoid warnings on internal definitions. We set it just + before passing on command-line options to cpplib. */ + cpp_opts->warn_dollars = 0; + + deferred_opts = XNEWVEC (struct deferred_opt, argc); + + return CL_SDCPP; +} + +/* Handle switch SCODE with argument ARG. VALUE is true, unless no- + form of an -f or -W option was given. Returns 0 if the switch was + invalid, a negative number to prevent language-independent + processing in toplev.c (a hack necessary for the short-term). */ +int +sdcpp_common_handle_option (size_t scode, const char *arg, int value) +{ + enum opt_code code = (enum opt_code) scode; + int result = 1; + + switch (code) + { + default: + result = 0; + break; + +#if 0 // pch not supported by sdcpp + case OPT__output_pch_: + pch_file = arg; + break; +#endif + + case OPT_A: + defer_opt (code, arg); + break; + + case OPT_C: + cpp_opts->discard_comments = 0; + break; + + case OPT_CC: + cpp_opts->discard_comments = 0; + cpp_opts->discard_comments_in_macro_exp = 0; + break; + + case OPT_D: + defer_opt (code, arg); + break; + + case OPT_H: + cpp_opts->print_include_names = 1; + break; + + case OPT_I: + if (strcmp (arg, "-")) + add_path (xstrdup (arg), BRACKET, 0, true); + else + { + if (quote_chain_split) + error ("-I- specified twice"); + quote_chain_split = true; + split_quote_chain (); + inform ("obsolete option -I- used, please use -iquote instead"); + } + break; + + case OPT_M: + case OPT_MM: + /* When doing dependencies with -M or -MM, suppress normal + preprocessed output, but still do -dM etc. as software + depends on this. Preprocessed output does occur if -MD, -MMD + or environment var dependency generation is used. */ + cpp_opts->deps.style = (code == OPT_M ? DEPS_SYSTEM: DEPS_USER); + flag_no_output = 1; + cpp_opts->inhibit_warnings = 1; + break; + + case OPT_MD: + case OPT_MMD: + cpp_opts->deps.style = (code == OPT_MD ? DEPS_SYSTEM: DEPS_USER); + deps_file = arg; + break; + + case OPT_MF: + deps_seen = true; + deps_file = arg; + break; + + case OPT_MG: + deps_seen = true; + cpp_opts->deps.missing_files = true; + break; + + case OPT_MP: + deps_seen = true; + cpp_opts->deps.phony_targets = true; + break; + + case OPT_MQ: + case OPT_MT: + deps_seen = true; + defer_opt (code, arg); + break; + + case OPT_P: + flag_no_line_commands = 1; + break; + + case OPT_fworking_directory: + flag_working_directory = value; + break; + + case OPT_U: + defer_opt (code, arg); + break; + + case OPT_Wall: + cpp_opts->warn_trigraphs = value; + cpp_opts->warn_comments = value; + cpp_opts->warn_num_sign_change = value; + cpp_opts->warn_multichar = value; /* Was C++ only. */ + break; + + case OPT_Wcomment: + case OPT_Wcomments: + cpp_opts->warn_comments = value; + break; + + case OPT_Wdeprecated: + cpp_opts->warn_deprecated = value; + break; + + case OPT_Wendif_labels: + cpp_opts->warn_endif_labels = value; + break; + + case OPT_Werror: + cpp_opts->warnings_are_errors = value; + break; + + case OPT_Wimport: + /* Silently ignore for now. */ + break; + +#if 0 // pch not supported by sdcpp + case OPT_Winvalid_pch: + cpp_opts->warn_invalid_pch = value; + break; +#endif + + case OPT_Wsystem_headers: + cpp_opts->warn_system_headers = value; + break; + + case OPT_Wtraditional: + cpp_opts->warn_traditional = value; + break; + + case OPT_Wtrigraphs: + cpp_opts->warn_trigraphs = value; + break; + + case OPT_Wundef: + cpp_opts->warn_undef = value; + break; + + case OPT_Wunused_macros: + warn_unused_macros = value; + break; + + case OPT_Wvariadic_macros: + warn_variadic_macros = value; + break; + + case OPT_ansi: + set_std_c89 (false, true); + break; + + case OPT_d: + handle_OPT_d (arg); + break; + + case OPT_fdollars_in_identifiers: + cpp_opts->dollars_in_ident = value; + break; + + case OPT_fsigned_char: + flag_signed_char = value; + break; + + case OPT_funsigned_char: + flag_signed_char = !value; + break; + +#if 0 // pch not supported by sdcpp + case OPT_fpch_deps: + cpp_opts->restore_pch_deps = value; + break; + + case OPT_fpch_preprocess: + flag_pch_preprocess = value; + break; +#endif + + case OPT_fpreprocessed: + cpp_opts->preprocessed = value; + break; + + case OPT_fshow_column: + cpp_opts->show_column = value; + break; + + case OPT_ftabstop_: + /* It is documented that we silently ignore silly values. */ + if (value >= 1 && value <= 100) + cpp_opts->tabstop = value; + break; + + case OPT_fexec_charset_: + cpp_opts->narrow_charset = arg; + break; + + case OPT_fwide_exec_charset_: + cpp_opts->wide_charset = arg; + break; + + case OPT_finput_charset_: + cpp_opts->input_charset = arg; + break; + + case OPT_idirafter: + add_path (xstrdup (arg), AFTER, 0, true); + break; + + case OPT_imacros: + case OPT_include: + defer_opt (code, arg); + break; + + case OPT_iprefix: + iprefix = arg; + break; + + case OPT_imultilib: + imultilib = arg; + break; + + case OPT_iquote: + add_path (xstrdup (arg), QUOTE, 0, true); + break; + + case OPT_isysroot: + sysroot = arg; + break; + + case OPT_isystem: + add_path (xstrdup (arg), SYSTEM, 0, true); + break; + + case OPT_iwithprefix: + add_prefixed_path (arg, SYSTEM); + break; + + case OPT_iwithprefixbefore: + add_prefixed_path (arg, BRACKET); + break; + + case OPT_lang_asm: + cpp_set_lang (parse_in, CLK_ASM); + cpp_opts->dollars_in_ident = false; + break; + + case OPT_lang_objc: + cpp_opts->objc = 1; + break; + + case OPT_nostdinc: + std_inc = false; + break; + + case OPT_o: + if (!out_fname) + out_fname = arg; + else + error ("output filename specified twice"); + break; + + /* SDCPP specfic */ + case OPT_obj_ext_: + cpp_opts->obj_ext = arg; + break; + + /* We need to handle the -pedantic switches here, rather than in + sdcpp_common_post_options, so that a subsequent -Wno-endif-labels + is not overridden. */ + case OPT_pedantic_errors: + cpp_opts->pedantic_errors = 1; + /* Fall through. */ + case OPT_pedantic: + cpp_opts->pedantic = 1; + cpp_opts->warn_endif_labels = 1; + break; + + /* SDCPP specfic */ + case OPT_pedantic_parse_number: + cpp_opts->pedantic_parse_number = 1; + break; + +#if 0 // pch not supported by sdcpp + case OPT_print_pch_checksum: + c_common_print_pch_checksum (stdout); + exit_after_options = true; + break; +#endif + + case OPT_remap: + cpp_opts->remap = 1; + break; + + case OPT_std_c89: + case OPT_std_iso9899_1990: + case OPT_std_iso9899_199409: + set_std_c89 (code == OPT_std_iso9899_199409 /* c94 */, true /* ISO */); + break; + + case OPT_std_c99: + case OPT_std_iso9899_1999: + set_std_c99 (true /* ISO */); + break; + + case OPT_trigraphs: + cpp_opts->trigraphs = 1; + break; + + case OPT_traditional_cpp: + cpp_opts->traditional = 1; + break; + + case OPT_w: + cpp_opts->inhibit_warnings = 1; + break; + + case OPT_v: + verbose = true; + break; + } + + return result; +} + +/* Post-switch processing. */ +bool +sdcpp_common_post_options (const char **pfilename) +{ + struct cpp_callbacks *cb; + + /* Canonicalize the input and output filenames. */ + if (in_fnames == NULL) + { + in_fnames = XNEWVEC (const char *, 1); + in_fnames[0] = ""; + } + else if (strcmp (in_fnames[0], "-") == 0) + in_fnames[0] = ""; + + if (out_fname == NULL || !strcmp (out_fname, "-")) + out_fname = ""; + + if (cpp_opts->deps.style == DEPS_NONE) + check_deps_environment_vars (); + + handle_deferred_opts (); + + sanitize_cpp_opts (); + + register_include_chains (parse_in, sysroot, iprefix, imultilib, + std_inc, 0, verbose); + + /* Open the output now. We must do so even if flag_no_output is + on, because there may be other output than from the actual + preprocessing (e.g. from -dM). */ + if (out_fname[0] == '\0') + out_stream = stdout; + else + out_stream = fopen (out_fname, "w"); + + if (out_stream == NULL) + { + fatal_error ("opening output file %s: %m", out_fname); + return false; + } + + if (num_in_fnames > 1) + error ("too many filenames given. Type %s --help for usage", + progname); + + init_pp_output (out_stream); + + cb = cpp_get_callbacks (parse_in); + cb->file_change = cb_file_change; + cb->dir_change = cb_dir_change; + cpp_post_options (parse_in); + + /* If an error has occurred in cpplib, note it so we fail + immediately. */ + errorcount += cpp_errors (parse_in); + + *pfilename = this_input_filename + = cpp_read_main_file (parse_in, in_fnames[0]); + /* Don't do any compilation or preprocessing if there is no input file. */ + if (this_input_filename == NULL) + { + errorcount++; + return false; + } + + if (flag_working_directory && !flag_no_line_commands) + pp_dir_change (parse_in, get_src_pwd ()); + + return 1; +} + +/* Front end initialization. */ +bool +sdcpp_common_init (void) +{ + /* Default CPP arithmetic to something sensible for the host for the + benefit of dumb users like fix-header. */ + cpp_opts->precision = CHAR_BIT * sizeof (long); + cpp_opts->char_precision = CHAR_BIT; + cpp_opts->int_precision = CHAR_BIT * sizeof (int); + cpp_opts->wchar_precision = CHAR_BIT * sizeof (int); + cpp_opts->unsigned_wchar = 1; + cpp_opts->bytes_big_endian = BYTES_BIG_ENDIAN; + + /* This can't happen until after wchar_precision and bytes_big_endian + are known. */ + cpp_init_iconv (parse_in); + +#if 0 + if (version_flag) + c_common_print_pch_checksum (stderr); +#endif + + finish_options (); + preprocess_file (parse_in); + return false; +} + +/* Common finish hook for the C, ObjC and C++ front ends. */ +void +sdcpp_common_finish (void) +{ + FILE *deps_stream = NULL; + + if (cpp_opts->deps.style != DEPS_NONE) + { + /* If -M or -MM was seen without -MF, default output to the + output stream. */ + if (!deps_file) + deps_stream = out_stream; + else + { + deps_stream = fopen (deps_file, deps_append ? "a": "w"); + if (!deps_stream) + fatal_error ("opening dependency file %s: %m", deps_file); + } + } + + /* For performance, avoid tearing down cpplib's internal structures + with cpp_destroy (). */ + errorcount += cpp_finish (parse_in, deps_stream); + + if (deps_stream && deps_stream != out_stream + && (ferror (deps_stream) || fclose (deps_stream))) + fatal_error ("closing dependency file %s: %m", deps_file); + + if (out_stream && (ferror (out_stream) || fclose (out_stream))) + fatal_error ("when writing output to %s: %m", out_fname); +} + +/* Either of two environment variables can specify output of + dependencies. Their value is either "OUTPUT_FILE" or "OUTPUT_FILE + DEPS_TARGET", where OUTPUT_FILE is the file to write deps info to + and DEPS_TARGET is the target to mention in the deps. They also + result in dependency information being appended to the output file + rather than overwriting it, and like Sun's compiler + SUNPRO_DEPENDENCIES suppresses the dependency on the main file. */ +static void +check_deps_environment_vars (void) +{ + char *spec; + + GET_ENVIRONMENT (spec, "DEPENDENCIES_OUTPUT"); + if (spec) + cpp_opts->deps.style = DEPS_USER; + else + { + GET_ENVIRONMENT (spec, "SUNPRO_DEPENDENCIES"); + if (spec) + { + cpp_opts->deps.style = DEPS_SYSTEM; + cpp_opts->deps.ignore_main_file = true; + } + } + + if (spec) + { + /* Find the space before the DEPS_TARGET, if there is one. */ + char *s = strchr (spec, ' '); + if (s) + { + /* Let the caller perform MAKE quoting. */ + defer_opt (OPT_MT, s + 1); + *s = '\0'; + } + + /* Command line -MF overrides environment variables and default. */ + if (!deps_file) + deps_file = spec; + + deps_append = 1; + deps_seen = true; + } +} + +/* Handle deferred command line switches. */ +static void +handle_deferred_opts (void) +{ + size_t i; + struct deps *deps; + + /* Avoid allocating the deps buffer if we don't need it. + (This flag may be true without there having been -MT or -MQ + options, but we'll still need the deps buffer.) */ + if (!deps_seen) + return; + + deps = cpp_get_deps (parse_in); + + for (i = 0; i < deferred_count; i++) + { + struct deferred_opt *opt = &deferred_opts[i]; + + if (opt->code == OPT_MT || opt->code == OPT_MQ) + deps_add_target (deps, opt->arg, opt->code == OPT_MQ); + } +} + +/* These settings are appropriate for GCC, but not necessarily so for + cpplib as a library. */ +static void +sanitize_cpp_opts (void) +{ + /* If we don't know what style of dependencies to output, complain + if any other dependency switches have been given. */ + if (deps_seen && cpp_opts->deps.style == DEPS_NONE) + error ("to generate dependencies you must specify either -M or -MM"); + + /* -dM and dependencies suppress normal output; do it here so that + the last -d[MDN] switch overrides earlier ones. */ + if (flag_dump_macros == 'M') + flag_no_output = 1; + + /* Disable -dD, -dN and -dI if normal output is suppressed. Allow + -dM since at least glibc relies on -M -dM to work. */ + /* Also, flag_no_output implies flag_no_line_commands, always. */ + if (flag_no_output) + { + if (flag_dump_macros != 'M') + flag_dump_macros = 0; + flag_dump_includes = 0; + flag_no_line_commands = 1; + } + + cpp_opts->unsigned_char = !flag_signed_char; + cpp_opts->stdc_0_in_system_headers = STDC_0_IN_SYSTEM_HEADERS; + + /* Similarly with -Wno-variadic-macros. No check for c99 here, since + this also turns off warnings about GCCs extension. */ + cpp_opts->warn_variadic_macros + = warn_variadic_macros && (pedantic || warn_traditional); + + /* If we're generating preprocessor output, emit current directory + if explicitly requested */ + if (flag_working_directory == -1) + flag_working_directory = 0; +} + +/* Add include path with a prefix at the front of its name. */ +static void +add_prefixed_path (const char *suffix, size_t chain) +{ + char *path; + const char *prefix; + size_t prefix_len, suffix_len; + + suffix_len = strlen (suffix); + prefix = iprefix ? iprefix : cpp_GCC_INCLUDE_DIR; + prefix_len = iprefix ? strlen (iprefix) : cpp_GCC_INCLUDE_DIR_len; + + path = (char *) xmalloc (prefix_len + suffix_len + 1); + memcpy (path, prefix, prefix_len); + memcpy (path + prefix_len, suffix, suffix_len); + path[prefix_len + suffix_len] = '\0'; + + add_path (path, chain, 0, false); +} + +/* Handle -D, -U, -A, -imacros, and the first -include. */ +static void +finish_options (void) +{ + if (!cpp_opts->preprocessed) + { + size_t i; + + cb_file_change (parse_in, + linemap_add (&line_table, LC_RENAME, 0, + _(""), 0)); + + cpp_init_builtins (parse_in, 0 /*flag_hosted*/); + + /* We're about to send user input to cpplib, so make it warn for + things that we previously (when we sent it internal definitions) + told it to not warn. + + C99 permits implementation-defined characters in identifiers. + The documented meaning of -std= is to turn off extensions that + conflict with the specified standard, and since a strictly + conforming program cannot contain a '$', we do not condition + their acceptance on the -std= setting. */ + cpp_opts->warn_dollars = (cpp_opts->pedantic && !cpp_opts->c99); + + cpp_change_file (parse_in, LC_RENAME, _("")); + for (i = 0; i < deferred_count; i++) + { + struct deferred_opt *opt = &deferred_opts[i]; + + if (opt->code == OPT_D) + cpp_define (parse_in, opt->arg); + else if (opt->code == OPT_U) + cpp_undef (parse_in, opt->arg); + else if (opt->code == OPT_A) + { + if (opt->arg[0] == '-') + cpp_unassert (parse_in, opt->arg + 1); + else + cpp_assert (parse_in, opt->arg); + } + } + + /* Handle -imacros after -D and -U. */ + for (i = 0; i < deferred_count; i++) + { + struct deferred_opt *opt = &deferred_opts[i]; + + if (opt->code == OPT_imacros + && cpp_push_include (parse_in, opt->arg)) + { + /* Disable push_command_line_include callback for now. */ + include_cursor = deferred_count + 1; + cpp_scan_nooutput (parse_in); + } + } + } + + include_cursor = 0; + push_command_line_include (); +} + +/* Give CPP the next file given by -include, if any. */ +static void +push_command_line_include (void) +{ + while (include_cursor < deferred_count) + { + struct deferred_opt *opt = &deferred_opts[include_cursor++]; + + if (!cpp_opts->preprocessed && opt->code == OPT_include + && cpp_push_include (parse_in, opt->arg)) + return; + } + + if (include_cursor == deferred_count) + { + include_cursor++; + /* -Wunused-macros should only warn about macros defined hereafter. */ + cpp_opts->warn_unused_macros = warn_unused_macros; + /* Restore the line map from . */ + if (!cpp_opts->preprocessed) + cpp_change_file (parse_in, LC_RENAME, this_input_filename); + + /* Set this here so the client can change the option if it wishes, + and after stacking the main file so we don't trace the main file. */ + line_table.trace_includes = cpp_opts->print_include_names; + } +} + +/* File change callback. Has to handle -include files. */ +static void +cb_file_change (cpp_reader * ARG_UNUSED (pfile), + const struct line_map *new_map) +{ + pp_file_change (new_map); + + if (new_map == 0 || (new_map->reason == LC_LEAVE && MAIN_FILE_P (new_map))) + push_command_line_include (); +} + +void +cb_dir_change (cpp_reader * ARG_UNUSED (pfile), const char *dir) +{ + if (!set_src_pwd (dir)) + warning (0, "too late for # directive to set debug directory"); +} + +/* Set the C 89 standard (with 1994 amendments if C94, without GNU + extensions if ISO). There is no concept of gnu94. */ +static void +set_std_c89 (int c94, int iso) +{ + cpp_set_lang (parse_in, c94 ? CLK_STDC94: iso ? CLK_STDC89: CLK_GNUC89); +} + +/* Set the C 99 standard (without GNU extensions if ISO). */ +static void +set_std_c99 (int iso) +{ + cpp_set_lang (parse_in, iso ? CLK_STDC99: CLK_GNUC99); +} + +/* Args to -d specify what to dump. Silently ignore + unrecognized options; they may be aimed at toplev.c. */ +static void +handle_OPT_d (const char *arg) +{ + char c; + + while ((c = *arg++) != '\0') + switch (c) + { + case 'M': /* Dump macros only. */ + case 'N': /* Dump names. */ + case 'D': /* Dump definitions. */ + flag_dump_macros = c; + break; + + case 'I': + flag_dump_includes = 1; + break; + } +} diff --git a/support/cpp/sdcpp.c b/support/cpp/sdcpp.c new file mode 100644 index 0000000..285b5ec --- /dev/null +++ b/support/cpp/sdcpp.c @@ -0,0 +1,461 @@ +/*------------------------------------------------------------------------- + sdcppmain.c - sdcpp: SDCC preprocessor main file, using cpplib. + + Written by Borut Razem, 2006. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include "config.h" +#include "system.h" +#include "cpplib.h" +#include "internal.h" +#include "version.h" +#include "mkdeps.h" +#include "opts.h" +#include "intl.h" + +const char *progname; /* Needs to be global. */ + +/* From laghooks-def.h */ +/* The whole thing. The structure is defined in langhooks.h. */ +#define LANG_HOOKS_INITIALIZER { \ + LANG_HOOKS_INIT_OPTIONS, \ + LANG_HOOKS_HANDLE_OPTION, \ + LANG_HOOKS_MISSING_ARGUMENT, \ + LANG_HOOKS_POST_OPTIONS, \ + LANG_HOOKS_INIT, \ + LANG_HOOKS_FINISH, \ +} + +/* From c-lang.c */ +#define LANG_HOOKS_INIT_OPTIONS sdcpp_init_options +#define LANG_HOOKS_HANDLE_OPTION sdcpp_common_handle_option +#define LANG_HOOKS_MISSING_ARGUMENT sdcpp_common_missing_argument +#define LANG_HOOKS_POST_OPTIONS sdcpp_common_post_options +#define LANG_HOOKS_INIT sdcpp_common_init +#define LANG_HOOKS_FINISH sdcpp_common_finish + +static unsigned int sdcpp_init_options (unsigned int argc, const char **argv); + +/* Each front end provides its own lang hook initializer. */ +const struct lang_hooks lang_hooks = LANG_HOOKS_INITIALIZER; + +/* Name of top-level original source file (what was input to cpp). + This comes from the #-command at the beginning of the actual input. + If there isn't any there, then this is the cc1 input file name. */ + +const char *main_input_filename; + +struct line_maps line_table; + +/* Temporarily suppress certain warnings. + This is set while reading code from a system header file. */ + +int in_system_header = 0; + +/* Nonzero means change certain warnings into errors. + Usually these are warnings about failure to conform to some standard. */ + +int flag_pedantic_errors = 0; + +cpp_reader *parse_in; /* Declared in c-pragma.h. */ + +/* Nonzero means `char' should be signed. */ + +int flag_signed_char; + +/* Nonzero means don't output line number information. */ + +char flag_no_line_commands; + +/* Nonzero causes -E output not to be done, but directives such as + #define that have side effects are still obeyed. */ + +char flag_no_output; + +/* Nonzero means dump macros in some fashion. */ + +char flag_dump_macros; + +/* Nonzero means pass #include lines through to the output. */ + +char flag_dump_includes; + +/* 0 means we want the preprocessor to not emit line directives for + the current working directory. 1 means we want it to do it. -1 + means we should decide depending on whether debugging information + is being emitted or not. */ + +int flag_working_directory = -1; + +/* The current working directory of a translation. It's generally the + directory from which compilation was initiated, but a preprocessed + file may specify the original directory in which it was + created. */ + +static const char *src_pwd; + +/* Initialize src_pwd with the given string, and return true. If it + was already initialized, return false. As a special case, it may + be called with a NULL argument to test whether src_pwd has NOT been + initialized yet. */ + +/* From intl.c */ +/* Opening quotation mark for diagnostics. */ +const char *open_quote = "'"; + +/* Closing quotation mark for diagnostics. */ +const char *close_quote = "'"; +/* ----------- */ + +bool +set_src_pwd (const char *pwd) +{ + if (src_pwd) + return false; + + src_pwd = xstrdup (pwd); + return true; +} + +/* Return the directory from which the translation unit was initiated, + in case set_src_pwd() was not called before to assign it a + different value. */ + +const char * +get_src_pwd (void) +{ + if (! src_pwd) + src_pwd = getpwd (); + + return src_pwd; +} + +/* SDCPP specific pragmas */ +/* SDCC specific + sdcc_hash pragma */ +static void +do_pragma_sdcc_hash (cpp_reader *pfile) +{ + const cpp_token *tok = _cpp_lex_token (pfile); + + if (tok->type == CPP_PLUS) + { + CPP_OPTION(pfile, allow_naked_hash)++; + } + else if (tok->type == CPP_MINUS) + { + CPP_OPTION(pfile, allow_naked_hash)--; + } + else + { + cpp_error (pfile, CPP_DL_ERROR, + "invalid #pragma sdcc_hash directive, need '+' or '-'"); + } +} + +/* SDCC specific + pedantic_parse_number pragma */ +static void +do_pragma_pedantic_parse_number (cpp_reader *pfile) +{ + const cpp_token *tok = _cpp_lex_token (pfile); + + if (tok->type == CPP_PLUS) + { + CPP_OPTION(pfile, pedantic_parse_number)++; + } + else if (tok->type == CPP_MINUS) + { + CPP_OPTION(pfile, pedantic_parse_number)--; + } + else + { + cpp_error (pfile, CPP_DL_ERROR, + "invalid #pragma pedantic_parse_number directive, need '+' or '-'"); + } +} + +/* SDCC _asm specific + switch _asm block preprocessing on / off */ +static void +do_pragma_preproc_asm (cpp_reader *pfile) +{ + const cpp_token *tok = _cpp_lex_token (pfile); + + if (tok->type == CPP_PLUS) + { + CPP_OPTION(pfile, preproc_asm)++; + } + else if (tok->type == CPP_MINUS) + { + CPP_OPTION(pfile, preproc_asm)--; + } + else + { + cpp_error (pfile, CPP_DL_ERROR, + "invalid #pragma preproc_asm directive, need '+' or '-'"); + } +} + +/* SDCPP specific option initialization */ +static unsigned int +sdcpp_init_options (unsigned int argc, const char **argv) +{ + unsigned int ret = sdcpp_common_init_options(argc, argv); + + CPP_OPTION (parse_in, allow_naked_hash) = 0; + CPP_OPTION (parse_in, preproc_asm) = 1; + CPP_OPTION (parse_in, pedantic_parse_number) = 0; + CPP_OPTION (parse_in, obj_ext) = NULL; + + /* Kevin abuse for SDCC. */ + cpp_register_pragma(parse_in, 0, "sdcc_hash", do_pragma_sdcc_hash, false); + /* SDCC _asm specific */ + cpp_register_pragma(parse_in, 0, "preproc_asm", do_pragma_preproc_asm, false); + /* SDCC specific */ + cpp_register_pragma(parse_in, 0, "pedantic_parse_number", do_pragma_pedantic_parse_number, false); + + /* SDCC _asm specific */ + parse_in->spec_nodes.n__asm = cpp_lookup (parse_in, DSC("_asm")); + + return ret; +} + +void +print_version (FILE *file, const char *indent) +{ + fprintf (file, _("GNU CPP version %s (cpplib)"), version_string); +#ifdef TARGET_VERSION + TARGET_VERSION; +#endif + fputc ('\n', file); +} + +/* Initialization of the front end environment, before command line + options are parsed. Signal handlers, internationalization etc. + ARGV0 is main's argv[0]. */ +static void +general_init (const char *argv0) +{ + const char *p; + + p = argv0 + strlen (argv0); + while (p != argv0 && !IS_DIR_SEPARATOR (p[-1])) + --p; + progname = p; + + xmalloc_set_program_name (progname); + + hex_init (); + + gcc_init_libintl (); +} + +/* Process the options that have been parsed. */ +static void +process_options (void) +{ + /* Allow the front end to perform consistency checks and do further + initialization based on the command line options. This hook also + sets the original filename if appropriate (e.g. foo.i -> foo.c) + so we can correctly initialize debug output. */ + /*no_backend =*/ (*lang_hooks.post_options) (&main_input_filename); +} + +/* Parse a -d... command line switch. */ + +void +decode_d_option (const char *arg) +{ + int c; + + while (*arg) + switch (c = *arg++) + { + case 'D': /* These are handled by the preprocessor. */ + case 'I': + case 'M': + case 'N': + break; + + default: + warning (0, "unrecognized gcc debugging option: %c", c); + break; + } +} + +/* Diagnostic */ + +int errorcount = 0; + +/* An informative note. Use this for additional details on an error + message. */ +void +inform (const char *gmsgid, ...) +{ + va_list ap; + + va_start (ap, gmsgid); + fprintf (stderr, "%s: note: ", progname); + vfprintf (stderr, gmsgid, ap); + putc('\n', stderr); + va_end (ap); +} + +/* A warning. Use this for code which is correct according to the + relevant language specification but is likely to be buggy anyway. */ +void +warning (int opt, const char *gmsgid, ...) +{ + va_list ap; + + if CPP_OPTION (parse_in, warnings_are_errors) + ++errorcount; + + va_start (ap, gmsgid); + fprintf (stderr, "%s: warning: ", progname); + vfprintf (stderr, gmsgid, ap); + putc('\n', stderr); + va_end (ap); +} + +/* A hard error: the code is definitely ill-formed, and an object file + will not be produced. */ +void +error (const char *gmsgid, ...) +{ + va_list ap; + + ++errorcount; + + va_start (ap, gmsgid); + fprintf (stderr, "%s: error: ", progname); + vfprintf (stderr, gmsgid, ap); + putc('\n', stderr); + va_end (ap); +} + +/* An error which is severe enough that we make no attempt to + continue. Do not use this for internal consistency checks; that's + internal_error. Use of this function should be rare. */ +void +fatal_error (const char *gmsgid, ...) +{ + va_list ap; + + va_start (ap, gmsgid); + fprintf (stderr, "%s: fatal error: ", progname); + vfprintf (stderr, gmsgid, ap); + putc('\n', stderr); + va_end (ap); + + exit (FATAL_EXIT_CODE); +} + +/* An internal consistency check has failed. We make no attempt to + continue. Note that unless there is debugging value to be had from + a more specific message, or some other good reason, you should use + abort () instead of calling this function directly. */ +void +internal_error (const char *gmsgid, ...) +{ + va_list ap; + + va_start (ap, gmsgid); + fprintf (stderr, "%s: internal compiler error: ", progname); + vfprintf (stderr, gmsgid, ap); + putc('\n', stderr); + va_end (ap); + + exit (FATAL_EXIT_CODE); +} + +/* Report an internal compiler error in a friendly manner. This is + the function that gets called upon use of abort() in the source + code generally, thanks to a special macro. */ + +void +fancy_abort (const char *file, int line, const char *function) +{ + internal_error ("in %s, at %s:%d", function, file, line); +} + +/* Language-dependent initialization. Returns nonzero on success. */ +static int +lang_dependent_init (const char *name) +{ + /* Other front-end initialization. */ + if ((*lang_hooks.init) () == 0) + return 0; + + return 1; +} + +/* Clean up: close opened files, etc. */ + +static void +finalize (void) +{ + /* Language-specific end of compilation actions. */ + (*lang_hooks.finish) (); +} + +/* Initialize the compiler, and compile the input file. */ +static void +do_compile (void) +{ + process_options (); + + /* Don't do any more if an error has already occurred. */ + if (!errorcount) + { + /* Language-dependent initialization. Returns true on success. */ + lang_dependent_init (main_input_filename); + + finalize (); + } +} + +/* Entry point of sdcpp. + Exit code is FATAL_EXIT_CODE if can't open files or if there were + any errors, or SUCCESS_EXIT_CODE if compilation succeeded. + + It is not safe to call this function more than once. */ + +int +main (int argc, const char **argv) +{ + /* Initialization of SDCPP's environment. */ + general_init (argv[0]); + + /* Parse the options and do minimal processing; basically just + enough to default flags appropriately. */ + decode_options (argc, argv); + + /* Exit early if we can (e.g. -help). */ + if (!exit_after_options) + do_compile (); + + if (errorcount) + return (FATAL_EXIT_CODE); + + return (SUCCESS_EXIT_CODE); +} diff --git a/support/cpp/sdcpp.dsp b/support/cpp/sdcpp.dsp new file mode 100644 index 0000000..f203f50 --- /dev/null +++ b/support/cpp/sdcpp.dsp @@ -0,0 +1,412 @@ +# Microsoft Developer Studio Project File - Name="sdcpp" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Application" 0x0101 + +CFG=sdcpp - Win32 Debug +!MESSAGE This is not a valid makefile. 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+ * From defaults.h + */ +#ifndef GET_ENVIRONMENT +#define GET_ENVIRONMENT(VALUE, NAME) do { (VALUE) = getenv (NAME); } while (0) +#endif + +/* Define results of standard character escape sequences. */ +#define TARGET_BELL 007 +#define TARGET_BS 010 +#define TARGET_TAB 011 +#define TARGET_NEWLINE 012 +#define TARGET_VT 013 +#define TARGET_FF 014 +#define TARGET_CR 015 +#define TARGET_ESC 033 + +#define CHAR_TYPE_SIZE 8 +#define WCHAR_TYPE_SIZE 32 /* ? maybe ? */ + +#define SUPPORTS_ONE_ONLY 0 + +#define TARGET_OBJECT_SUFFIX ".rel" + +#ifndef WCHAR_UNSIGNED +#define WCHAR_UNSIGNED 0 +#endif + +/* + * From langhooks.h + */ +struct diagnostic_context; + +struct lang_hooks +{ + /* The first callback made to the front end, for simple + initialization needed before any calls to handle_option. Return + the language mask to filter the switch array with. */ + unsigned int (*init_options) (unsigned int argc, const char **argv); + + /* Handle the switch CODE, which has real type enum opt_code from + options.h. If the switch takes an argument, it is passed in ARG + which points to permanent storage. The handler is responsible for + checking whether ARG is NULL, which indicates that no argument + was in fact supplied. For -f and -W switches, VALUE is 1 or 0 + for the positive and negative forms respectively. + + Return 1 if the switch is valid, 0 if invalid, and -1 if it's + valid and should not be treated as language-independent too. */ + int (*handle_option) (size_t code, const char *arg, int value); + + /* Return false to use the default complaint about a missing + argument, otherwise output a complaint and return true. */ + bool (*missing_argument) (const char *opt, size_t code); + + /* Called when all command line options have been parsed to allow + further processing and initialization + + Should return true to indicate that a compiler back-end is + not required, such as with the -E option. + + If errorcount is nonzero after this call the compiler exits + immediately and the finish hook is not called. */ + bool (*post_options) (const char **); + + /* Called after post_options to initialize the front end. Return + false to indicate that no further compilation be performed, in + which case the finish hook is called immediately. */ + bool (*init) (void); + + /* Called at the end of compilation, as a finalizer. */ + void (*finish) (void); +}; + +/* Each front end provides its own. */ +extern const struct lang_hooks lang_hooks; + +/* + * From toplev.h + */ +extern void internal_error (const char *, ...) ATTRIBUTE_PRINTF_1 + ATTRIBUTE_NORETURN; +/* Pass one of the OPT_W* from options.h as the first parameter. */ +extern void warning (int, const char *, ...) ATTRIBUTE_PRINTF_2; +extern void error (const char *, ...) ATTRIBUTE_PRINTF_1; +extern void fatal_error (const char *, ...) ATTRIBUTE_PRINTF_1 + ATTRIBUTE_NORETURN; +extern void inform (const char *, ...) ATTRIBUTE_PRINTF_1; + +extern bool exit_after_options; + +extern void print_version (FILE *, const char *); + +/* Handle -d switch. */ +extern void decode_d_option (const char *); + +/* Functions used to get and set GCC's notion of in what directory + compilation was started. */ + +extern const char *get_src_pwd (void); +extern bool set_src_pwd (const char *); + +/* + * From flags.h + */ +/* Don't suppress warnings from system headers. -Wsystem-headers. */ + +extern bool warn_system_headers; + +/* If -Werror. */ + +extern bool warnings_are_errors; + +/* Nonzero for -pedantic switch: warn about anything + that standard C forbids. */ + +/* Temporarily suppress certain warnings. + This is set while reading code from a system header file. */ + +extern int in_system_header; + +/* Nonzero means `char' should be signed. */ + +extern int flag_signed_char; + +/* Nonzero means change certain warnings into errors. + Usually these are warnings about failure to conform to some standard. */ + +extern int flag_pedantic_errors; + +/* + * From c-common.h + */ +#include "hwint.h" +#include "cpplib.h" + +/* Nonzero means don't output line number information. */ + +extern char flag_no_line_commands; + +/* Nonzero causes -E output not to be done, but directives such as + #define that have side effects are still obeyed. */ + +extern char flag_no_output; + +/* Nonzero means dump macros in some fashion; contains the 'D', 'M' or + 'N' of the command line switch. */ + +extern char flag_dump_macros; + +/* 0 means we want the preprocessor to not emit line directives for + the current working directory. 1 means we want it to do it. -1 + means we should decide depending on whether debugging information + is being emitted or not. */ + +extern int flag_working_directory; + +/* Nonzero means warn about usage of long long when `-pedantic'. */ + +extern int warn_long_long; + +extern int sdcpp_common_handle_option (size_t code, const char *arg, int value); +extern bool sdcpp_common_missing_argument (const char *opt, size_t code); +extern unsigned int sdcpp_common_init_options (unsigned int, const char **); +extern bool sdcpp_common_post_options (const char **); +extern bool sdcpp_common_init (void); +extern void sdcpp_common_finish (void); + +/* Nonzero means pass #include lines through to the output. */ + +extern char flag_dump_includes; + +/* In c-ppoutput.c */ +extern void init_pp_output (FILE *); +extern void preprocess_file (cpp_reader *); +extern void pp_file_change (const struct line_map *); +extern void pp_dir_change (cpp_reader *, const char *); + +/* + * From c-pragma.h + */ +extern struct cpp_reader* parse_in; + +/* + * From input.h + */ +extern struct line_maps line_table; + +typedef source_location location_t; /* deprecated typedef */ + +/* Top-level source file. */ +extern const char *main_input_filename; + +/* + * From tree.h + */ +/* Define the overall contents of a tree node. + just to make diagnostic.c happy */ + +union tree_node +{ + struct tree_decl + { + location_t locus; + } decl; +}; + +#define DECL_SOURCE_LOCATION(NODE) ((NODE)->decl.locus) + +/* + * From diagnostic.h + */ +extern int errorcount; + + +#endif /* __SDCPP_H */ diff --git a/support/cpp/sdcpp.opt b/support/cpp/sdcpp.opt new file mode 100644 index 0000000..58f6274 --- /dev/null +++ b/support/cpp/sdcpp.opt @@ -0,0 +1,331 @@ +; Options for the SDCPP front end. +; Copyright (C) 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +; +; This file is part of GCC. +; +; GCC is free software; you can redistribute it and/or modify it under +; the terms of the GNU General Public License as published by the Free +; Software Foundation; either version 2, or (at your option) any later +; version. +; +; GCC is distributed in the hope that it will be useful, but WITHOUT ANY +; WARRANTY; without even the implied warranty of MERCHANTABILITY or +; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +; for more details. +; +; You should have received a copy of the GNU General Public License +; along with GCC; see the file COPYING. If not, write to the Free +; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA +; 02110-1301, USA. + +; See the GCC internals manual for a description of this file's format. + +; Please try to keep this file in ASCII collating order. + +Language +SDCPP + +-help +Common +Display this information + +-version +Common +Display the compiler's version + +;***-output-pch= +;***SDCPP Joined Separate + +A +SDCPP Joined Separate +-A= Assert the to . Putting '-' before disables the to + +C +SDCPP +Do not discard comments + +CC +SDCPP +Do not discard comments in macro expansions + +D +SDCPP Joined Separate +-D[=] Define a with as its value. If just is given, is taken to be 1 + +H +SDCPP +Print the name of header files as they are used + +I +SDCPP Joined Separate +-I Add to the end of the main include path. -I- gives more include path control; see info documentation + +M +SDCPP +Generate make dependencies + +MD +SDCPP Separate +Generate make dependencies and compile + +MF +SDCPP Joined Separate +-MF Write dependency output to the given file + +MG +SDCPP +Treat missing header files as generated files + +MM +SDCPP +Like -M but ignore system header files + +MMD +SDCPP Separate +Like -MD but ignore system header files + +MP +SDCPP +Generate phony targets for all headers + +MQ +SDCPP Joined Separate +-MQ Add a MAKE-quoted target + +MT +SDCPP Joined Separate +-MT Add an unquoted target + +P +SDCPP +Do not generate #line directives + +U +SDCPP Joined Separate +-U Undefine + +Wall +SDCPP +Enable most warning messages + +Wcomment +SDCPP +Warn about possibly nested block comments, and C++ comments spanning more than one physical line + +Wcomments +SDCPP +Synonym for -Wcomment + +Wdeprecated +SDCPP +Warn about deprecated compiler features + +Wendif-labels +SDCPP +Warn about stray tokens after #elif and #endif + +Werror +SDCPP +Treat all warnings as errors + +Wfatal-errors +SDCPP Var(flag_fatal_errors) +Exit on the first error occurred + +Wimport +SDCPP +Deprecated. This switch has no effect. + +;***Winvalid-pch +;***SDCPP +;***Warn about PCH files that are found but not used + +Wsystem-headers +SDCPP +Do not suppress warnings from system headers + +Wtraditional +SDCPP Var(warn_traditional) +Warn about features not present in traditional C + +Wtrigraphs +SDCPP +Warn if trigraphs are encountered that might affect the meaning of the program + +Wundef +SDCPP +Warn if an undefined macro is used in an #if directive + +Wunused-macros +SDCPP +Warn about macros defined in the main file that are not used + +Wvariadic-macros +SDCPP +Do not warn about using variadic macros when -pedantic + +ansi +SDCPP +A synonym for -std=c89. + +d +SDCPP Joined +-d Enable dumps from specific passes of the compiler + +fdollars-in-identifiers +SDCPP +Permit '$' as an identifier character + +fexec-charset= +SDCPP Joined RejectNegative +-fexec-charset= Convert all strings and character constants to character set + +finput-charset= +SDCPP Joined RejectNegative +-finput-charset= Specify the default character set for source files. + +;***fpch-deps +;***SDCPP + +fpreprocessed +SDCPP +Treat the input file as already preprocessed + +fshow-column +SDCPP + +fsigned-char +SDCPP +Make \"char\" signed by default + +ftabstop= +SDCPP Joined RejectNegative UInteger +-ftabstop= Distance between tab stops for column reporting + +funsigned-char +SDCPP +Make \"char\" unsigned by default + +fwide-exec-charset= +SDCPP Joined RejectNegative +-fwide-exec-charset= Convert all wide strings and character constants to character set + +fworking-directory +SDCPP +Generate a #line directive pointing at the current working directory + +idirafter +SDCPP Joined Separate +-idirafter Add to the end of the system include path + +imacros +SDCPP Joined Separate +-imacros Accept definition of macros in + +imultilib +C ObjC C++ ObjC++ Joined Separate +-imultilib Set to be the multilib include subdirectory + +include +SDCPP Joined Separate +-include Include the contents of before other files + +iprefix +SDCPP Joined Separate +-iprefix Specify as a prefix for next two options + +isysroot +SDCPP Joined Separate +-isysroot Set to be the system root directory + +isystem +SDCPP Joined Separate +-isystem Add to the start of the system include path + +iquote +SDCPP Joined Separate +-iquote Add to the end of the quote include path + +iwithprefix +SDCPP Joined Separate +-iwithprefix Add to the end of the system include path + +iwithprefixbefore +SDCPP Joined Separate +-iwithprefixbefore Add to the end of the main include path + +lang-asm +C Undocumented + +lang-objc +SDCPP Undocumented + +nostdinc +SDCPP +Do not search standard system include directories (those specified with -isystem will still be used) + +o +SDCPP Joined Separate +-o Place output into + +obj-ext= +SDCPP Joined +-obj-ext= Define object file extension, used for generation of make dependencies + +pedantic +SDCPP Var(pedantic) +Issue warnings needed for strict compliance to the standard + +pedantic-errors +SDCPP +Like -pedantic but issue them as errors + +pedantic-parse-number +SDCPP +Pedantic parse number + +remap +SDCPP +Remap file names when including files + +std=c89 +SDCPP +Conform to the ISO 1990 C standard + +std=c99 +SDCPP +Conform to the ISO 1999 C standard + +std=iso9899:1990 +C ObjC +Conform to the ISO 1990 C standard + +std=iso9899:199409 +SDCPP +Conform to the ISO 1990 C standard as amended in 1994 + +std=iso9899:1999 +C ObjC +Conform to the ISO 1999 C standard + +traditional-cpp +SDCPP +Enable traditional preprocessing + +trigraphs +SDCPP +-trigraphs Support ISO C trigraphs + +v +SDCPP +Enable verbose output + +;***version +;***SDCPP Var(version_flag) +;***Display the compiler's version + +w +SDCPP Var(inhibit_warnings) +Suppress warnings + +; This comment is to ensure we retain the blank line above. diff --git a/support/cpp/sdcppa.dsp b/support/cpp/sdcppa.dsp new file mode 100644 index 0000000..6d14bd0 --- /dev/null +++ b/support/cpp/sdcppa.dsp @@ -0,0 +1,131 @@ +# Microsoft Developer Studio Project File - Name="sdcppa" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Generic Project" 0x010a + +CFG=sdcppa - Win32 Debug +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "sdcppa.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "sdcppa.mak" CFG="sdcppa - Win32 Debug" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "sdcppa - Win32 Release" (based on "Win32 (x86) Generic Project") +!MESSAGE "sdcppa - Win32 Debug" (based on "Win32 (x86) Generic Project") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +MTL=midl.exe + +!IF "$(CFG)" == "sdcppa - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 0 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 0 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Target_Dir "" + +!ELSEIF "$(CFG)" == "sdcppa - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Target_Dir "" + +!ENDIF + +# Begin Target + +# Name "sdcppa - Win32 Release" +# Name "sdcppa - Win32 Debug" +# Begin Source File + +SOURCE=".\auto-host_vc_in.h" + +!IF "$(CFG)" == "sdcppa - Win32 Release" + +# Begin Custom Build +InputPath=".\auto-host_vc_in.h" + +"auto-host.h" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + copy auto-host_vc_in.h auto-host.h > nul + +# End Custom Build + +!ELSEIF "$(CFG)" == "sdcppa - Win32 Debug" + +# Begin Custom Build +InputPath=".\auto-host_vc_in.h" + +"auto-host.h" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + copy auto-host_vc_in.h auto-host.h > nul + +# End Custom Build + +!ENDIF + +# End Source File +# Begin Source File + +SOURCE=.\sdcpp.opt + +!IF "$(CFG)" == "sdcppa - Win32 Release" + +# Begin Custom Build +InputPath=.\sdcpp.opt + +BuildCmds= \ + gawk -f opt-gather.awk sdcpp.opt | gawk -f opt-functions.awk -f optc-gen.awk -v header_name="config.h system.h options.h" > options.c \ + gawk -f opt-gather.awk sdcpp.opt | gawk -f opt-functions.awk -f opth-gen.awk > options.h \ + + +"options.c" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + $(BuildCmds) + +"options.h" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + $(BuildCmds) +# End Custom Build + +!ELSEIF "$(CFG)" == "sdcppa - Win32 Debug" + +# Begin Custom Build +InputPath=.\sdcpp.opt + +BuildCmds= \ + gawk -f opt-gather.awk sdcpp.opt | gawk -f opt-functions.awk -f optc-gen.awk -v header_name="config.h system.h options.h" > options.c \ + gawk -f opt-gather.awk sdcpp.opt | gawk -f opt-functions.awk -f opth-gen.awk > options.h \ + + +"options.c" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + $(BuildCmds) + +"options.h" : $(SOURCE) "$(INTDIR)" "$(OUTDIR)" + $(BuildCmds) +# End Custom Build + +!ENDIF + +# End Source File +# End Target +# End Project diff --git a/support/cpp/symcat.h b/support/cpp/symcat.h new file mode 100644 index 0000000..03a1292 --- /dev/null +++ b/support/cpp/symcat.h @@ -0,0 +1,49 @@ +/* Symbol concatenation utilities. + + Copyright (C) 1998, 2000 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ + +#ifndef SYM_CAT_H +#define SYM_CAT_H + +#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) +#define CONCAT2(a,b) a##b +#define CONCAT3(a,b,c) a##b##c +#define CONCAT4(a,b,c,d) a##b##c##d +#define STRINGX(s) #s +#else +/* Note one should never pass extra whitespace to the CONCATn macros, + e.g. CONCAT2(foo, bar) because traditonal C will keep the space between + the two labels instead of concatenating them. Instead, make sure to + write CONCAT2(foo,bar). */ +#define CONCAT2(a,b) a/**/b +#define CONCAT3(a,b,c) a/**/b/**/c +#define CONCAT4(a,b,c,d) a/**/b/**/c/**/d +#define STRINGX(s) "s" +#endif + +#define XCONCAT2(a,b) CONCAT2(a,b) +#define XCONCAT3(a,b,c) CONCAT3(a,b,c) +#define XCONCAT4(a,b,c,d) CONCAT4(a,b,c,d) + +/* Note the layer of indirection here is typically used to allow + stringification of the expansion of macros. I.e. "#define foo + bar", "XSTRING(foo)", to yield "bar". Be aware that this only + works for __STDC__, not for traditional C which will still resolve + to "foo". */ +#define XSTRING(s) STRINGX(s) + +#endif /* SYM_CAT_H */ diff --git a/support/cpp/system.h b/support/cpp/system.h new file mode 100644 index 0000000..8f66943 --- /dev/null +++ b/support/cpp/system.h @@ -0,0 +1,785 @@ +/* Get common system includes and various definitions and declarations based + on autoconf macros. + Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 + Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA +02110-1301, USA. */ + + +#ifndef GCC_SYSTEM_H +#define GCC_SYSTEM_H + +/* We must include stdarg.h before stdio.h. */ +#include + +#ifndef va_copy +# ifdef __va_copy +# define va_copy(d,s) __va_copy((d),(s)) +# else +# define va_copy(d,s) ((d) = (s)) +# endif +#endif + +#ifdef HAVE_STDDEF_H +# include +#endif + +#include + +/* Define a generic NULL if one hasn't already been defined. */ +#ifndef NULL +#define NULL 0 +#endif + +/* Use the unlocked open routines from libiberty. */ +#define fopen(PATH,MODE) fopen_unlocked(PATH,MODE) +#define fdopen(FILDES,MODE) fdopen_unlocked(FILDES,MODE) +#define freopen(PATH,MODE,STREAM) freopen_unlocked(PATH,MODE,STREAM) + +/* The compiler is not a multi-threaded application and therefore we + do not have to use the locking functions. In fact, using the locking + functions can cause the compiler to be significantly slower under + I/O bound conditions (such as -g -O0 on very large source files). + + HAVE_DECL_PUTC_UNLOCKED actually indicates whether or not the stdio + code is multi-thread safe by default. If it is set to 0, then do + not worry about using the _unlocked functions. + + fputs_unlocked, fwrite_unlocked, and fprintf_unlocked are + extensions and need to be prototyped by hand (since we do not + define _GNU_SOURCE). */ + +#if defined HAVE_DECL_PUTC_UNLOCKED && HAVE_DECL_PUTC_UNLOCKED + +# ifdef HAVE_PUTC_UNLOCKED +# undef putc +# define putc(C, Stream) putc_unlocked (C, Stream) +# endif +# ifdef HAVE_PUTCHAR_UNLOCKED +# undef putchar +# define putchar(C) putchar_unlocked (C) +# endif +# ifdef HAVE_GETC_UNLOCKED +# undef getc +# define getc(Stream) getc_unlocked (Stream) +# endif +# ifdef HAVE_GETCHAR_UNLOCKED +# undef getchar +# define getchar() getchar_unlocked () +# endif +# ifdef HAVE_FPUTC_UNLOCKED +# undef fputc +# define fputc(C, Stream) fputc_unlocked (C, Stream) +# endif + +# ifdef HAVE_CLEARERR_UNLOCKED +# undef clearerr +# define clearerr(Stream) clearerr_unlocked (Stream) +# if defined (HAVE_DECL_CLEARERR_UNLOCKED) && !HAVE_DECL_CLEARERR_UNLOCKED +extern void clearerr_unlocked (FILE *); +# endif +# endif +# ifdef HAVE_FEOF_UNLOCKED +# undef feof +# define feof(Stream) feof_unlocked (Stream) +# if defined (HAVE_DECL_FEOF_UNLOCKED) && !HAVE_DECL_FEOF_UNLOCKED +extern int feof_unlocked (FILE *); +# endif +# endif +# ifdef HAVE_FILENO_UNLOCKED +# undef fileno +# define fileno(Stream) fileno_unlocked (Stream) +# if defined (HAVE_DECL_FILENO_UNLOCKED) && !HAVE_DECL_FILENO_UNLOCKED +extern int fileno_unlocked (FILE *); +# endif +# endif +# ifdef HAVE_FFLUSH_UNLOCKED +# undef fflush +# define fflush(Stream) fflush_unlocked (Stream) +# if defined (HAVE_DECL_FFLUSH_UNLOCKED) && !HAVE_DECL_FFLUSH_UNLOCKED +extern int fflush_unlocked (FILE *); +# endif +# endif +# ifdef HAVE_FGETC_UNLOCKED +# undef fgetc +# define fgetc(Stream) fgetc_unlocked (Stream) +# if defined (HAVE_DECL_FGETC_UNLOCKED) && !HAVE_DECL_FGETC_UNLOCKED +extern int fgetc_unlocked (FILE *); +# endif +# endif +# ifdef HAVE_FGETS_UNLOCKED +# undef fgets +# define fgets(S, n, Stream) fgets_unlocked (S, n, Stream) +# if defined (HAVE_DECL_FGETS_UNLOCKED) && !HAVE_DECL_FGETS_UNLOCKED +extern char *fgets_unlocked (char *, int, FILE *); +# endif +# endif +# ifdef HAVE_FPUTS_UNLOCKED +# undef fputs +# define fputs(String, Stream) fputs_unlocked (String, Stream) +# if defined (HAVE_DECL_FPUTS_UNLOCKED) && !HAVE_DECL_FPUTS_UNLOCKED +extern int fputs_unlocked (const char *, FILE *); +# endif +# endif +# ifdef HAVE_FERROR_UNLOCKED +# undef ferror +# define ferror(Stream) ferror_unlocked (Stream) +# if defined (HAVE_DECL_FERROR_UNLOCKED) && !HAVE_DECL_FERROR_UNLOCKED +extern int ferror_unlocked (FILE *); +# endif +# endif +# ifdef HAVE_FREAD_UNLOCKED +# undef fread +# define fread(Ptr, Size, N, Stream) fread_unlocked (Ptr, Size, N, Stream) +# if defined (HAVE_DECL_FREAD_UNLOCKED) && !HAVE_DECL_FREAD_UNLOCKED +extern size_t fread_unlocked (void *, size_t, size_t, FILE *); +# endif +# endif +# ifdef HAVE_FWRITE_UNLOCKED +# undef fwrite +# define fwrite(Ptr, Size, N, Stream) fwrite_unlocked (Ptr, Size, N, Stream) +# if defined (HAVE_DECL_FWRITE_UNLOCKED) && !HAVE_DECL_FWRITE_UNLOCKED +extern size_t fwrite_unlocked (const void *, size_t, size_t, FILE *); +# endif +# endif +# ifdef HAVE_FPRINTF_UNLOCKED +# undef fprintf +/* We can't use a function-like macro here because we don't know if + we have varargs macros. */ +# define fprintf fprintf_unlocked +# if defined (HAVE_DECL_FPRINTF_UNLOCKED) && !HAVE_DECL_FPRINTF_UNLOCKED +extern int fprintf_unlocked (FILE *, const char *, ...); +# endif +# endif + +#endif + +/* ??? Glibc's fwrite/fread_unlocked macros cause + "warning: signed and unsigned type in conditional expression". */ +#undef fread_unlocked +#undef fwrite_unlocked + +/* There are an extraordinary number of issues with . + The last straw is that it varies with the locale. Use libiberty's + replacement instead. */ +#if defined(__APPLE__) && defined(__MACH__) +#include +#else +#include +#endif + +#include + +#include + +#if !defined (errno) && defined (HAVE_DECL_ERRNO) && !HAVE_DECL_ERRNO +extern int errno; +#endif + +/* Some of glibc's string inlines cause warnings. Plus we'd rather + rely on (and therefore test) GCC's string builtins. */ +#define __NO_STRING_INLINES + +#ifdef STRING_WITH_STRINGS +# include +# include +#else +# ifdef HAVE_STRING_H +# include +# else +# ifdef HAVE_STRINGS_H +# include +# endif +# endif +#endif + +#ifdef HAVE_STDLIB_H +# include +#endif + +/* If we don't have an overriding definition, set SUCCESS_EXIT_CODE and + FATAL_EXIT_CODE to EXIT_SUCCESS and EXIT_FAILURE respectively, + or 0 and 1 if those macros are not defined. */ +#ifndef SUCCESS_EXIT_CODE +# ifdef EXIT_SUCCESS +# define SUCCESS_EXIT_CODE EXIT_SUCCESS +# else +# define SUCCESS_EXIT_CODE 0 +# endif +#endif + +#ifndef FATAL_EXIT_CODE +# ifdef EXIT_FAILURE +# define FATAL_EXIT_CODE EXIT_FAILURE +# else +# define FATAL_EXIT_CODE 1 +# endif +#endif + +#define ICE_EXIT_CODE 4 + +#ifdef HAVE_UNISTD_H +# include +#endif + +#ifdef HAVE_SYS_PARAM_H +# include +/* We use this identifier later and it appears in some vendor param.h's. */ +# undef PREFETCH +#endif + +#if HAVE_LIMITS_H +# include +#endif + +/* Get definitions of HOST_WIDE_INT and HOST_WIDEST_INT. */ +#include "hwint.h" + +/* A macro to determine whether a VALUE lies inclusively within a + certain range without evaluating the VALUE more than once. This + macro won't warn if the VALUE is unsigned and the LOWER bound is + zero, as it would e.g. with "VALUE >= 0 && ...". Note the LOWER + bound *is* evaluated twice, and LOWER must not be greater than + UPPER. However the bounds themselves can be either positive or + negative. */ +#define IN_RANGE(VALUE, LOWER, UPPER) \ + ((unsigned HOST_WIDE_INT)((VALUE) - (LOWER)) <= ((UPPER) - (LOWER))) + +/* Infrastructure for defining missing _MAX and _MIN macros. Note that + macros defined with these cannot be used in #if. */ + +/* The extra casts work around common compiler bugs. */ +#define INTTYPE_SIGNED(t) (! ((t) 0 < (t) -1)) +/* The outer cast is needed to work around a bug in Cray C 5.0.3.0. + It is necessary at least when t == time_t. */ +#define INTTYPE_MINIMUM(t) ((t) (INTTYPE_SIGNED (t) \ + ? ~ (t) 0 << (sizeof(t) * CHAR_BIT - 1) : (t) 0)) +#define INTTYPE_MAXIMUM(t) ((t) (~ (t) 0 - INTTYPE_MINIMUM (t))) + +/* Use that infrastructure to provide a few constants. */ +#ifndef UCHAR_MAX +# define UCHAR_MAX INTTYPE_MAXIMUM (unsigned char) +#endif + +#ifdef TIME_WITH_SYS_TIME +# include +# include +#else +# if HAVE_SYS_TIME_H +# include +# else +# ifdef HAVE_TIME_H +# include +# endif +# endif +#endif + +#ifdef HAVE_FCNTL_H +# include +#else +# ifdef HAVE_SYS_FILE_H +# include +# endif +#endif + +#ifndef SEEK_SET +# define SEEK_SET 0 +# define SEEK_CUR 1 +# define SEEK_END 2 +#endif +#ifndef F_OK +# define F_OK 0 +# define X_OK 1 +# define W_OK 2 +# define R_OK 4 +#endif +#ifndef O_RDONLY +# define O_RDONLY 0 +#endif +#ifndef O_WRONLY +# define O_WRONLY 1 +#endif + +/* Some systems define these in, e.g., param.h. We undefine these names + here to avoid the warnings. We prefer to use our definitions since we + know they are correct. */ + +#undef MIN +#undef MAX +#define MIN(X,Y) ((X) < (Y) ? (X) : (Y)) +#define MAX(X,Y) ((X) > (Y) ? (X) : (Y)) + +/* Returns the least number N such that N * Y >= X. */ +#define CEIL(x,y) (((x) + (y) - 1) / (y)) + +#ifdef HAVE_SYS_WAIT_H +#include +#endif + +#ifndef WIFSIGNALED +#define WIFSIGNALED(S) (((S) & 0xff) != 0 && ((S) & 0xff) != 0x7f) +#endif +#ifndef WTERMSIG +#define WTERMSIG(S) ((S) & 0x7f) +#endif +#ifndef WIFEXITED +#define WIFEXITED(S) (((S) & 0xff) == 0) +#endif +#ifndef WEXITSTATUS +#define WEXITSTATUS(S) (((S) & 0xff00) >> 8) +#endif +#ifndef WSTOPSIG +#define WSTOPSIG WEXITSTATUS +#endif +#ifndef WCOREDUMP +#define WCOREDUMP(S) ((S) & WCOREFLG) +#endif +#ifndef WCOREFLG +#define WCOREFLG 0200 +#endif + +/* The HAVE_DECL_* macros are three-state, undefined, 0 or 1. If they + are defined to 0 then we must provide the relevant declaration + here. These checks will be in the undefined state while configure + is running so be careful to test "defined (HAVE_DECL_*)". */ + +#if defined (HAVE_DECL_ATOF) && !HAVE_DECL_ATOF +extern double atof (const char *); +#endif + +#if defined (HAVE_DECL_ATOL) && !HAVE_DECL_ATOL +extern long atol (const char *); +#endif + +#if defined (HAVE_DECL_FREE) && !HAVE_DECL_FREE +extern void free (void *); +#endif + +#if defined (HAVE_DECL_GETCWD) && !HAVE_DECL_GETCWD +extern char *getcwd (char *, size_t); +#endif + +#if defined (HAVE_DECL_GETENV) && !HAVE_DECL_GETENV +extern char *getenv (const char *); +#endif + +#if defined (HAVE_DECL_GETOPT) && !HAVE_DECL_GETOPT +extern int getopt (int, char * const *, const char *); +#endif + +#if defined (HAVE_DECL_GETPAGESIZE) && !HAVE_DECL_GETPAGESIZE +extern int getpagesize (void); +#endif + +#if defined (HAVE_DECL_GETWD) && !HAVE_DECL_GETWD +extern char *getwd (char *); +#endif + +#if defined (HAVE_DECL_SBRK) && !HAVE_DECL_SBRK +extern void *sbrk (int); +#endif + +#if defined (HAVE_DECL_STRSTR) && !HAVE_DECL_STRSTR +extern char *strstr (const char *, const char *); +#endif + +#ifdef HAVE_MALLOC_H +#include +#endif + +#if defined (HAVE_DECL_MALLOC) && !HAVE_DECL_MALLOC +extern void *malloc (size_t); +#endif + +#if defined (HAVE_DECL_CALLOC) && !HAVE_DECL_CALLOC +extern void *calloc (size_t, size_t); +#endif + +#if defined (HAVE_DECL_REALLOC) && !HAVE_DECL_REALLOC +extern void *realloc (void *, size_t); +#endif + +/* If the system doesn't provide strsignal, we get it defined in + libiberty but no declaration is supplied. */ +/* Disabled since it causes errors on solaris +#if !defined (HAVE_STRSIGNAL) \ + || (defined (HAVE_DECL_STRSIGNAL) && !HAVE_DECL_STRSIGNAL) +# ifndef strsignal +extern const char *strsignal (int); +# endif +#endif +*/ + +#ifdef HAVE_GETRLIMIT +# if defined (HAVE_DECL_GETRLIMIT) && !HAVE_DECL_GETRLIMIT +# ifndef getrlimit +struct rlimit; +extern int getrlimit (int, struct rlimit *); +# endif +# endif +#endif + +#ifdef HAVE_SETRLIMIT +# if defined (HAVE_DECL_SETRLIMIT) && !HAVE_DECL_SETRLIMIT +# ifndef setrlimit +struct rlimit; +extern int setrlimit (int, const struct rlimit *); +# endif +# endif +#endif + +#if defined (HAVE_DECL_ABORT) && !HAVE_DECL_ABORT +extern void abort (void); +#endif + +#if defined (HAVE_DECL_SNPRINTF) && !HAVE_DECL_SNPRINTF +extern int snprintf (char *, size_t, const char *, ...); +#endif + +#if defined (HAVE_DECL_VSNPRINTF) && !HAVE_DECL_VSNPRINTF +extern int vsnprintf(char *, size_t, const char *, va_list); +#endif + +/* 1 if we have C99 designated initializers. */ +#if !defined(HAVE_DESIGNATED_INITIALIZERS) +# if defined(__APPLE__) && (__MACH__) +#define HAVE_DESIGNATED_INITIALIZERS 0 +# else +#define HAVE_DESIGNATED_INITIALIZERS \ + ((GCC_VERSION >= 2007) || (__STDC_VERSION__ >= 199901L)) +# endif +#endif + +#if HAVE_SYS_STAT_H +# include +#endif + +/* Test if something is a normal file. */ +#ifndef S_ISREG +#define S_ISREG(m) (((m) & S_IFMT) == S_IFREG) +#endif + +/* Test if something is a directory. */ +#ifndef S_ISDIR +#define S_ISDIR(m) (((m) & S_IFMT) == S_IFDIR) +#endif + +/* Test if something is a character special file. */ +#ifndef S_ISCHR +#define S_ISCHR(m) (((m) & S_IFMT) == S_IFCHR) +#endif + +/* Test if something is a block special file. */ +#ifndef S_ISBLK +#define S_ISBLK(m) (((m) & S_IFMT) == S_IFBLK) +#endif + +/* Test if something is a socket. */ +#ifndef S_ISSOCK +# ifdef S_IFSOCK +# define S_ISSOCK(m) (((m) & S_IFMT) == S_IFSOCK) +# else +# define S_ISSOCK(m) 0 +# endif +#endif + +/* Test if something is a FIFO. */ +#ifndef S_ISFIFO +# ifdef S_IFIFO +# define S_ISFIFO(m) (((m) & S_IFMT) == S_IFIFO) +# else +# define S_ISFIFO(m) 0 +# endif +#endif + +/* Define well known filenos if the system does not define them. */ +#ifndef STDIN_FILENO +# define STDIN_FILENO 0 +#endif +#ifndef STDOUT_FILENO +# define STDOUT_FILENO 1 +#endif +#ifndef STDERR_FILENO +# define STDERR_FILENO 2 +#endif + +/* Some systems have mkdir that takes a single argument. */ +#ifdef MKDIR_TAKES_ONE_ARG +# define mkdir(a,b) mkdir(a) +#endif + +/* By default, colon separates directories in a path. */ +#ifndef PATH_SEPARATOR +#define PATH_SEPARATOR ':' +#endif + +/* Filename handling macros. */ +#include "filenames.h" + +/* These should be phased out in favor of IS_DIR_SEPARATOR, where possible. */ +#ifndef DIR_SEPARATOR +# define DIR_SEPARATOR '/' +# ifdef HAVE_DOS_BASED_FILE_SYSTEM +# define DIR_SEPARATOR_2 '\\' +# endif +#endif + +/* Get libiberty declarations. */ +#include "libiberty.h" + +/* Provide a default for the HOST_BIT_BUCKET. + This suffices for POSIX-like hosts. */ + +#ifndef HOST_BIT_BUCKET +#define HOST_BIT_BUCKET "/dev/null" +#endif + +/* Be conservative and only use enum bitfields with GCC. + FIXME: provide a complete autoconf test for buggy enum bitfields. */ + +#if (GCC_VERSION > 2000) +#define ENUM_BITFIELD(TYPE) __extension__ enum TYPE +#else +#define ENUM_BITFIELD(TYPE) unsigned int +#endif + +#ifndef offsetof +#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *) 0)->MEMBER) +#endif + +/* Various error reporting routines want to use __FUNCTION__. */ +#if (GCC_VERSION < 2007) +#ifndef __FUNCTION__ +#define __FUNCTION__ "?" +#endif /* ! __FUNCTION__ */ +#endif + +/* __builtin_expect(A, B) evaluates to A, but notifies the compiler that + the most likely value of A is B. This feature was added at some point + between 2.95 and 3.0. Let's use 3.0 as the lower bound for now. */ +#if (GCC_VERSION < 3000) +#define __builtin_expect(a, b) (a) +#endif + +/* Redefine abort to report an internal error w/o coredump, and + reporting the location of the error in the source file. */ +extern void fancy_abort (const char *, int, const char *) ATTRIBUTE_NORETURN; +#define abort() fancy_abort (__FILE__, __LINE__, __FUNCTION__) + +/* Use gcc_assert(EXPR) to test invariants. */ +#if ENABLE_ASSERT_CHECKING +#define gcc_assert(EXPR) \ + ((void)(!(EXPR) ? fancy_abort (__FILE__, __LINE__, __FUNCTION__), 0 : 0)) +#else +/* Include EXPR, so that unused variable warnings do not occur. */ +#define gcc_assert(EXPR) ((void)(0 && (EXPR))) +#endif + +/* Use gcc_unreachable() to mark unreachable locations (like an + unreachable default case of a switch. Do not use gcc_assert(0). */ +#define gcc_unreachable() (fancy_abort (__FILE__, __LINE__, __FUNCTION__)) + +/* Provide a fake boolean type. We make no attempt to use the + C99 _Bool, as it may not be available in the bootstrap compiler, + and even if it is, it is liable to be buggy. + This must be after all inclusion of system headers, as some of + them will mess us up. */ + +#undef TRUE +#undef FALSE + +#ifdef __cplusplus + /* Obsolete. */ +# define TRUE true +# define FALSE false +#else /* !__cplusplus */ +# undef bool +# undef true +# undef false + +# define bool unsigned char +# define true 1 +# define false 0 + + /* Obsolete. */ +# define TRUE true +# define FALSE false +#endif /* !__cplusplus */ + +/////* Get definition of double_int. */ +////#include "double-int.h" + +/* Some compilers do not allow the use of unsigned char in bitfields. */ +#define BOOL_BITFIELD unsigned int + +/* As the last action in this file, we poison the identifiers that + shouldn't be used. Note, luckily gcc-3.0's token-based integrated + preprocessor won't trip on poisoned identifiers that arrive from + the expansion of macros. E.g. #define strrchr rindex, won't error + if rindex is poisoned after this directive is issued and later on + strrchr is called. + + Note: We define bypass macros for the few cases where we really + want to use the libc memory allocation routines. Otherwise we + insist you use the "x" versions from libiberty. */ + +#define really_call_malloc malloc +#define really_call_calloc calloc +#define really_call_realloc realloc + +#if defined(FLEX_SCANNER) || defined(YYBISON) || defined(YYBYACC) +/* Flex and bison use malloc and realloc. Yuk. Note that this means + really_call_* cannot be used in a .l or .y file. */ +#define malloc xmalloc +#define realloc xrealloc +#endif + +#if (GCC_VERSION >= 3000) + +/* Note autoconf checks for prototype declarations and includes + system.h while doing so. Only poison these tokens if actually + compiling gcc, so that the autoconf declaration tests for malloc + etc don't spuriously fail. */ +#ifdef IN_GCC +#undef calloc +#undef strdup + #pragma GCC poison calloc strdup + +#if !defined(FLEX_SCANNER) && !defined(YYBISON) +#undef malloc +#undef realloc + #pragma GCC poison malloc realloc +#endif + +/* Old target macros that have moved to the target hooks structure. */ + #pragma GCC poison ASM_OPEN_PAREN ASM_CLOSE_PAREN \ + FUNCTION_PROLOGUE FUNCTION_EPILOGUE \ + FUNCTION_END_PROLOGUE FUNCTION_BEGIN_EPILOGUE \ + DECL_MACHINE_ATTRIBUTES COMP_TYPE_ATTRIBUTES INSERT_ATTRIBUTES \ + VALID_MACHINE_DECL_ATTRIBUTE VALID_MACHINE_TYPE_ATTRIBUTE \ + SET_DEFAULT_TYPE_ATTRIBUTES SET_DEFAULT_DECL_ATTRIBUTES \ + MERGE_MACHINE_TYPE_ATTRIBUTES MERGE_MACHINE_DECL_ATTRIBUTES \ + MD_INIT_BUILTINS MD_EXPAND_BUILTIN ASM_OUTPUT_CONSTRUCTOR \ + ASM_OUTPUT_DESTRUCTOR SIGNED_CHAR_SPEC MAX_CHAR_TYPE_SIZE \ + WCHAR_UNSIGNED UNIQUE_SECTION SELECT_SECTION SELECT_RTX_SECTION \ + ENCODE_SECTION_INFO STRIP_NAME_ENCODING ASM_GLOBALIZE_LABEL \ + ASM_OUTPUT_MI_THUNK CONST_COSTS RTX_COSTS DEFAULT_RTX_COSTS \ + ADDRESS_COST MACHINE_DEPENDENT_REORG ASM_FILE_START ASM_FILE_END \ + ASM_SIMPLIFY_DWARF_ADDR INIT_TARGET_OPTABS INIT_SUBTARGET_OPTABS \ + INIT_GOFAST_OPTABS MULSI3_LIBCALL MULDI3_LIBCALL DIVSI3_LIBCALL \ + DIVDI3_LIBCALL UDIVSI3_LIBCALL UDIVDI3_LIBCALL MODSI3_LIBCALL \ + MODDI3_LIBCALL UMODSI3_LIBCALL UMODDI3_LIBCALL BUILD_VA_LIST_TYPE \ + PRETEND_OUTGOING_VARARGS_NAMED STRUCT_VALUE_INCOMING_REGNUM \ + ASM_OUTPUT_SECTION_NAME PROMOTE_FUNCTION_ARGS \ + STRUCT_VALUE_INCOMING STRICT_ARGUMENT_NAMING \ + PROMOTE_FUNCTION_RETURN PROMOTE_PROTOTYPES STRUCT_VALUE_REGNUM \ + SETUP_INCOMING_VARARGS EXPAND_BUILTIN_SAVEREGS \ + DEFAULT_SHORT_ENUMS SPLIT_COMPLEX_ARGS MD_ASM_CLOBBERS \ + HANDLE_PRAGMA_REDEFINE_EXTNAME HANDLE_PRAGMA_EXTERN_PREFIX \ + MUST_PASS_IN_STACK FUNCTION_ARG_PASS_BY_REFERENCE \ + VECTOR_MODE_SUPPORTED_P TARGET_SUPPORTS_HIDDEN \ + FUNCTION_ARG_PARTIAL_NREGS ASM_OUTPUT_DWARF_DTPREL \ + ALLOCATE_INITIAL_VALUE + +/* Other obsolete target macros, or macros that used to be in target + headers and were not used, and may be obsolete or may never have + been used. */ + #pragma GCC poison INT_ASM_OP ASM_OUTPUT_EH_REGION_BEG CPP_PREDEFINES \ + ASM_OUTPUT_EH_REGION_END ASM_OUTPUT_LABELREF_AS_INT SMALL_STACK \ + DOESNT_NEED_UNWINDER EH_TABLE_LOOKUP OBJC_SELECTORS_WITHOUT_LABELS \ + OMIT_EH_TABLE EASY_DIV_EXPR IMPLICIT_FIX_EXPR \ + LONGJMP_RESTORE_FROM_STACK MAX_INT_TYPE_SIZE ASM_IDENTIFY_GCC \ + STDC_VALUE TRAMPOLINE_ALIGN ASM_IDENTIFY_GCC_AFTER_SOURCE \ + SLOW_ZERO_EXTEND SUBREG_REGNO_OFFSET DWARF_LINE_MIN_INSTR_LENGTH \ + TRADITIONAL_RETURN_FLOAT NO_BUILTIN_SIZE_TYPE \ + NO_BUILTIN_PTRDIFF_TYPE NO_BUILTIN_WCHAR_TYPE NO_BUILTIN_WINT_TYPE \ + BLOCK_PROFILER BLOCK_PROFILER_CODE FUNCTION_BLOCK_PROFILER \ + FUNCTION_BLOCK_PROFILER_EXIT MACHINE_STATE_SAVE \ + MACHINE_STATE_RESTORE SCCS_DIRECTIVE SECTION_ASM_OP BYTEORDER \ + ASM_OUTPUT_DEFINE_LABEL_DIFFERENCE_SYMBOL HOST_WORDS_BIG_ENDIAN \ + OBJC_PROLOGUE ALLOCATE_TRAMPOLINE HANDLE_PRAGMA ROUND_TYPE_SIZE \ + ROUND_TYPE_SIZE_UNIT CONST_SECTION_ASM_OP CRT_GET_RFIB_TEXT \ + DBX_LBRAC_FIRST DBX_OUTPUT_ENUM DBX_OUTPUT_SOURCE_FILENAME \ + DBX_WORKING_DIRECTORY INSN_CACHE_DEPTH INSN_CACHE_SIZE \ + INSN_CACHE_LINE_WIDTH INIT_SECTION_PREAMBLE NEED_ATEXIT ON_EXIT \ + EXIT_BODY OBJECT_FORMAT_ROSE MULTIBYTE_CHARS MAP_CHARACTER \ + LIBGCC_NEEDS_DOUBLE FINAL_PRESCAN_LABEL DEFAULT_CALLER_SAVES \ + LOAD_ARGS_REVERSED MAX_INTEGER_COMPUTATION_MODE \ + CONVERT_HARD_REGISTER_TO_SSA_P ASM_OUTPUT_MAIN_SOURCE_FILENAME \ + FIRST_INSN_ADDRESS TEXT_SECTION SHARED_BSS_SECTION_ASM_OP \ + PROMOTED_MODE EXPAND_BUILTIN_VA_END \ + LINKER_DOES_NOT_WORK_WITH_DWARF2 FUNCTION_ARG_KEEP_AS_REFERENCE \ + GIV_SORT_CRITERION MAX_LONG_TYPE_SIZE MAX_LONG_DOUBLE_TYPE_SIZE \ + MAX_WCHAR_TYPE_SIZE SHARED_SECTION_ASM_OP INTEGRATE_THRESHOLD \ + FINAL_REG_PARM_STACK_SPACE MAYBE_REG_PARM_STACK_SPACE \ + TRADITIONAL_PIPELINE_INTERFACE DFA_PIPELINE_INTERFACE \ + DBX_OUTPUT_STANDARD_TYPES BUILTIN_SETJMP_FRAME_VALUE \ + SUNOS4_SHARED_LIBRARIES PROMOTE_FOR_CALL_ONLY \ + SPACE_AFTER_L_OPTION NO_RECURSIVE_FUNCTION_CSE \ + DEFAULT_MAIN_RETURN TARGET_MEM_FUNCTIONS EXPAND_BUILTIN_VA_ARG \ + COLLECT_PARSE_FLAG DWARF2_GENERATE_TEXT_SECTION_LABEL WINNING_GDB \ + ASM_OUTPUT_FILENAME ASM_OUTPUT_SOURCE_LINE FILE_NAME_JOINER \ + GDB_INV_REF_REGPARM_STABS_LETTER DBX_MEMPARM_STABS_LETTER \ + PUT_SDB_SRC_FILE STABS_GCC_MARKER DBX_OUTPUT_FUNCTION_END \ + DBX_OUTPUT_GCC_MARKER DBX_FINISH_SYMBOL SDB_GENERATE_FAKE \ + NON_SAVING_SETJMP TARGET_LATE_RTL_PROLOGUE_EPILOGUE \ + CASE_DROPS_THROUGH TARGET_BELL TARGET_BS TARGET_CR TARGET_DIGIT0 \ + TARGET_ESC TARGET_FF TARGET_NEWLINE TARGET_TAB TARGET_VT \ + LINK_LIBGCC_SPECIAL DONT_ACCESS_GBLS_AFTER_EPILOGUE \ + TARGET_OPTIONS TARGET_SWITCHES EXTRA_CC_MODES FINALIZE_PIC \ + PREDICATE_CODES SPECIAL_MODE_PREDICATES HOST_PTR_PRINTF \ + EXTRA_SECTIONS EXTRA_SECTION_FUNCTIONS READONLY_DATA_SECTION \ + TARGET_ASM_EXCEPTION_SECTION TARGET_ASM_EH_FRAME_SECTION \ + SMALL_ARG_MAX ASM_OUTPUT_SHARED_BSS ASM_OUTPUT_SHARED_COMMON \ + ASM_OUTPUT_SHARED_LOCAL UNALIGNED_WORD_ASM_OP + +/* Hooks that are no longer used. */ + #pragma GCC poison LANG_HOOKS_FUNCTION_MARK LANG_HOOKS_FUNCTION_FREE \ + LANG_HOOKS_MARK_TREE LANG_HOOKS_INSERT_DEFAULT_ATTRIBUTES \ + LANG_HOOKS_TREE_INLINING_ESTIMATE_NUM_INSNS \ + LANG_HOOKS_PUSHLEVEL LANG_HOOKS_SET_BLOCK \ + LANG_HOOKS_MAYBE_BUILD_CLEANUP LANG_HOOKS_UPDATE_DECL_AFTER_SAVING \ + LANG_HOOKS_POPLEVEL LANG_HOOKS_TRUTHVALUE_CONVERSION + +/* Libiberty macros that are no longer used in GCC. */ +#undef ANSI_PROTOTYPES +#undef PTR_CONST +#undef LONG_DOUBLE +#undef VPARAMS +#undef VA_OPEN +#undef VA_FIXEDARG +#undef VA_CLOSE +#undef VA_START + #pragma GCC poison ANSI_PROTOTYPES PTR_CONST LONG_DOUBLE VPARAMS VA_OPEN \ + VA_FIXEDARG VA_CLOSE VA_START +#endif /* IN_GCC */ + +/* Note: not all uses of the `index' token (e.g. variable names and + structure members) have been eliminated. */ +#undef bcopy +#undef bzero +#undef bcmp +#undef rindex + #pragma GCC poison bcopy bzero bcmp rindex + +#endif /* GCC >= 3.0 */ + +/* SDCC specific */ +#include "sdcpp.h" + +#endif /* ! GCC_SYSTEM_H */ diff --git a/support/cpp/version.c b/support/cpp/version.c new file mode 100644 index 0000000..310c138 --- /dev/null +++ b/support/cpp/version.c @@ -0,0 +1,28 @@ +#include "version.h" + +/* This is the trailing component of the string reported as the + version number by all components of the compiler. For an official + FSF release, it is empty. If you distribute a modified version of + GCC, please change this string to indicate that. The suggested + format is a leading space, followed by your organization's name + in parentheses. You may also wish to include a number indicating + the revision of your modified compiler. */ + +#define BASEVER "4.2.0" +#define DATESTAMP +#define DEVPHASE +#define VERSUFFIX " + SDCC" + +/* This is the location of the online document giving instructions for + reporting bugs. If you distribute a modified version of GCC, + please change this to refer to a document giving instructions for + reporting bugs to you, not us. (You are of course welcome to + forward us bugs reported to you, if you determine that they are + not bugs in your modifications.) */ + +const char bug_report_url[] = ""; + +/* The complete version string, assembled from several pieces. + BASEVER, DATESTAMP, and DEVPHASE are defined by the Makefile. */ + +const char version_string[] = BASEVER DATESTAMP DEVPHASE VERSUFFIX; diff --git a/support/cpp/version.h b/support/cpp/version.h new file mode 100644 index 0000000..8e944cc --- /dev/null +++ b/support/cpp/version.h @@ -0,0 +1,5 @@ +#ifndef GCC_VERSION_H +#define GCC_VERSION_H +extern const char version_string[]; +extern const char bug_report_url[]; +#endif /* ! GCC_VERSION_H */ diff --git a/support/cpp/win32/dirent.c b/support/cpp/win32/dirent.c new file mode 100644 index 0000000..dd9d654 --- /dev/null +++ b/support/cpp/win32/dirent.c @@ -0,0 +1,340 @@ +/* + * dirent.c + * This file has no copyright assigned and is placed in the Public Domain. + * This file is a part of the mingw-runtime package. + * No warranty is given; refer to the file DISCLAIMER within the package. + * + * Derived from DIRLIB.C by Matt J. Weinstein + * This note appears in the DIRLIB.H + * DIRLIB.H by M. J. Weinstein Released to public domain 1-Jan-89 + * + * Updated by Jeremy Bettis + * Significantly revised and rewinddir, seekdir and telldir added by Colin + * Peters + * + */ + +#include +#include +#include +#include +#include +#include + +#define WIN32_LEAN_AND_MEAN +#include /* for GetFileAttributes */ + +#include + +#ifdef _UNICODE +#define _tdirent _wdirent +#define _TDIR _WDIR +#define _topendir _wopendir +#define _tclosedir _wclosedir +#define _treaddir _wreaddir +#define _trewinddir _wrewinddir +#define _ttelldir _wtelldir +#define _tseekdir _wseekdir +#else +#define _tdirent dirent +#define _TDIR DIR +#define _topendir opendir +#define _tclosedir closedir +#define _treaddir readdir +#define _trewinddir rewinddir +#define _ttelldir telldir +#define _tseekdir seekdir +#endif + +#define SUFFIX _T("*") +#define SLASH _T("\\") + + +/* + * opendir + * + * Returns a pointer to a DIR structure appropriately filled in to begin + * searching a directory. + */ +_TDIR * +_topendir (const _TCHAR *szPath) +{ + _TDIR *nd; + unsigned int rc; + _TCHAR szFullPath[MAX_PATH]; + + errno = 0; + + if (!szPath) + { + errno = EFAULT; + return (_TDIR *) 0; + } + + if (szPath[0] == _T('\0')) + { + errno = ENOTDIR; + return (_TDIR *) 0; + } + + /* Attempt to determine if the given path really is a directory. */ + rc = GetFileAttributes (szPath); + if (rc == (unsigned int)-1) + { + /* call GetLastError for more error info */ + errno = ENOENT; + return (_TDIR *) 0; + } + if (!(rc & FILE_ATTRIBUTE_DIRECTORY)) + { + /* Error, entry exists but not a directory. */ + errno = ENOTDIR; + return (_TDIR *) 0; + } + + /* Make an absolute pathname. */ + _tfullpath (szFullPath, szPath, MAX_PATH); + + /* Allocate enough space to store DIR structure and the complete + * directory path given. */ + nd = (_TDIR *) malloc (sizeof (_TDIR) + (_tcslen(szFullPath) + _tcslen (SLASH) + + _tcslen(SUFFIX) + 1) * sizeof(_TCHAR)); + + if (!nd) + { + /* Error, out of memory. */ + errno = ENOMEM; + return (_TDIR *) 0; + } + + /* Create the search expression. */ + _tcscpy (nd->dd_name, szFullPath); + + /* Add on a slash if the path does not end with one. */ + if (nd->dd_name[0] != _T('\0') && + nd->dd_name[_tcslen (nd->dd_name) - 1] != _T('/') && + nd->dd_name[_tcslen (nd->dd_name) - 1] != _T('\\')) + { + _tcscat (nd->dd_name, SLASH); + } + + /* Add on the search pattern */ + _tcscat (nd->dd_name, SUFFIX); + + /* Initialize handle to -1 so that a premature closedir doesn't try + * to call _findclose on it. */ + nd->dd_handle = -1; + + /* Initialize the status. */ + nd->dd_stat = 0; + + /* Initialize the dirent structure. ino and reclen are invalid under + * Win32, and name simply points at the appropriate part of the + * findfirst_t structure. */ + nd->dd_dir.d_ino = 0; + nd->dd_dir.d_reclen = 0; + nd->dd_dir.d_namlen = 0; + memset (nd->dd_dir.d_name, 0, FILENAME_MAX); + + return nd; +} + + +/* + * readdir + * + * Return a pointer to a dirent structure filled with the information on the + * next entry in the directory. + */ +struct _tdirent * +_treaddir (_TDIR * dirp) +{ + errno = 0; + + /* Check for valid DIR struct. */ + if (!dirp) + { + errno = EFAULT; + return (struct _tdirent *) 0; + } + + if (dirp->dd_stat < 0) + { + /* We have already returned all files in the directory + * (or the structure has an invalid dd_stat). */ + return (struct _tdirent *) 0; + } + else if (dirp->dd_stat == 0) + { + /* We haven't started the search yet. */ + /* Start the search */ + dirp->dd_handle = _tfindfirst (dirp->dd_name, &(dirp->dd_dta)); + + if (dirp->dd_handle == -1) + { + /* Whoops! Seems there are no files in that + * directory. */ + dirp->dd_stat = -1; + } + else + { + dirp->dd_stat = 1; + } + } + else + { + /* Get the next search entry. */ + if (_tfindnext (dirp->dd_handle, &(dirp->dd_dta))) + { + /* We are off the end or otherwise error. + _findnext sets errno to ENOENT if no more file + Undo this. */ + DWORD winerr = GetLastError(); + if (winerr == ERROR_NO_MORE_FILES) + errno = 0; + _findclose (dirp->dd_handle); + dirp->dd_handle = -1; + dirp->dd_stat = -1; + } + else + { + /* Update the status to indicate the correct + * number. */ + dirp->dd_stat++; + } + } + + if (dirp->dd_stat > 0) + { + /* Successfully got an entry. Everything about the file is + * already appropriately filled in except the length of the + * file name. */ + dirp->dd_dir.d_namlen = _tcslen (dirp->dd_dta.name); + _tcscpy (dirp->dd_dir.d_name, dirp->dd_dta.name); + return &dirp->dd_dir; + } + + return (struct _tdirent *) 0; +} + + +/* + * closedir + * + * Frees up resources allocated by opendir. + */ +int +_tclosedir (_TDIR * dirp) +{ + int rc; + + errno = 0; + rc = 0; + + if (!dirp) + { + errno = EFAULT; + return -1; + } + + if (dirp->dd_handle != -1) + { + rc = _findclose (dirp->dd_handle); + } + + /* Delete the dir structure. */ + free (dirp); + + return rc; +} + +/* + * rewinddir + * + * Return to the beginning of the directory "stream". We simply call findclose + * and then reset things like an opendir. + */ +void +_trewinddir (_TDIR * dirp) +{ + errno = 0; + + if (!dirp) + { + errno = EFAULT; + return; + } + + if (dirp->dd_handle != -1) + { + _findclose (dirp->dd_handle); + } + + dirp->dd_handle = -1; + dirp->dd_stat = 0; +} + +/* + * telldir + * + * Returns the "position" in the "directory stream" which can be used with + * seekdir to go back to an old entry. We simply return the value in stat. + */ +long +_ttelldir (_TDIR * dirp) +{ + errno = 0; + + if (!dirp) + { + errno = EFAULT; + return -1; + } + return dirp->dd_stat; +} + +/* + * seekdir + * + * Seek to an entry previously returned by telldir. We rewind the directory + * and call readdir repeatedly until either dd_stat is the position number + * or -1 (off the end). This is not perfect, in that the directory may + * have changed while we weren't looking. But that is probably the case with + * any such system. + */ +void +_tseekdir (_TDIR * dirp, long lPos) +{ + errno = 0; + + if (!dirp) + { + errno = EFAULT; + return; + } + + if (lPos < -1) + { + /* Seeking to an invalid position. */ + errno = EINVAL; + return; + } + else if (lPos == -1) + { + /* Seek past end. */ + if (dirp->dd_handle != -1) + { + _findclose (dirp->dd_handle); + } + dirp->dd_handle = -1; + dirp->dd_stat = -1; + } + else + { + /* Rewind and read forward to the appropriate index. */ + _trewinddir (dirp); + + while ((dirp->dd_stat < lPos) && _treaddir (dirp)) + ; + } +} diff --git a/support/cpp/win32/dirent.h b/support/cpp/win32/dirent.h new file mode 100644 index 0000000..53c4dc8 --- /dev/null +++ b/support/cpp/win32/dirent.h @@ -0,0 +1,121 @@ +/* + * DIRENT.H (formerly DIRLIB.H) + * This file has no copyright assigned and is placed in the Public Domain. + * This file is a part of the mingw-runtime package. + * No warranty is given; refer to the file DISCLAIMER within the package. + * + */ +#ifndef _DIRENT_H_ +#define _DIRENT_H_ + +#include +#include + +#ifndef RC_INVOKED + +#ifdef __cplusplus +extern "C" { +#endif + +struct dirent +{ + long d_ino; /* Always zero. */ + unsigned short d_reclen; /* Always zero. */ + unsigned short d_namlen; /* Length of name in d_name. */ + char d_name[FILENAME_MAX]; /* File name. */ +}; + +/* + * This is an internal data structure. Good programmers will not use it + * except as an argument to one of the functions below. + * dd_stat field is now int (was short in older versions). + */ +typedef struct +{ + /* disk transfer area for this dir */ + struct _finddata_t dd_dta; + + /* dirent struct to return from dir (NOTE: this makes this thread + * safe as long as only one thread uses a particular DIR struct at + * a time) */ + struct dirent dd_dir; + + /* _findnext handle */ + long dd_handle; + + /* + * Status of search: + * 0 = not started yet (next entry to read is first entry) + * -1 = off the end + * positive = 0 based index of next entry + */ + int dd_stat; + + /* given path for dir with search pattern (struct is extended) */ + char dd_name[1]; +} DIR; + +DIR* __cdecl opendir (const char*); +struct dirent* __cdecl readdir (DIR*); +int __cdecl closedir (DIR*); +void __cdecl rewinddir (DIR*); +long __cdecl telldir (DIR*); +void __cdecl seekdir (DIR*, long); + + +/* wide char versions */ + +struct _wdirent +{ + long d_ino; /* Always zero. */ + unsigned short d_reclen; /* Always zero. */ + unsigned short d_namlen; /* Length of name in d_name. */ + wchar_t d_name[FILENAME_MAX]; /* File name. */ +}; + +/* + * This is an internal data structure. Good programmers will not use it + * except as an argument to one of the functions below. + */ +typedef struct +{ + /* disk transfer area for this dir */ + struct _wfinddata_t dd_dta; + + /* dirent struct to return from dir (NOTE: this makes this thread + * safe as long as only one thread uses a particular DIR struct at + * a time) */ + struct _wdirent dd_dir; + + /* _findnext handle */ + long dd_handle; + + /* + * Status of search: + * 0 = not started yet (next entry to read is first entry) + * -1 = off the end + * positive = 0 based index of next entry + */ + int dd_stat; + + /* given path for dir with search pattern (struct is extended) */ + wchar_t dd_name[1]; +} _WDIR; + + + +_WDIR* __cdecl _wopendir (const wchar_t*); +struct _wdirent* __cdecl _wreaddir (_WDIR*); +int __cdecl _wclosedir (_WDIR*); +void __cdecl _wrewinddir (_WDIR*); +long __cdecl _wtelldir (_WDIR*); +void __cdecl _wseekdir (_WDIR*, long); + + +#ifdef __cplusplus +} +#endif + +#endif /* Not RC_INVOKED */ + +#endif /* Not _DIRENT_H_ */ diff --git a/support/librarian/Makefile.bcc b/support/librarian/Makefile.bcc new file mode 100644 index 0000000..a3b9d84 --- /dev/null +++ b/support/librarian/Makefile.bcc @@ -0,0 +1,14 @@ +# Makefile for Borlad C++ + +PRJDIR = ../.. + +!include $(PRJDIR)/Bcc.inc + +OBJECTS = sdcclib.obj + +TARGET = $(PRJDIR)/bin/sdcclib.exe + +all: $(TARGET) + +$(TARGET): $(OBJECTS) + $(CC) $(CFLAGS) -e$@ $(OBJECTS) diff --git a/support/librarian/Makefile.in b/support/librarian/Makefile.in new file mode 100644 index 0000000..1578be9 --- /dev/null +++ b/support/librarian/Makefile.in @@ -0,0 +1,55 @@ +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ + +include $(top_builddir)/Makefile.common + +CFLAGS += -Wall + +OBJECTS = sdcclib.o + +SOURCES = $(patsubst %.o,%.c,$(OBJECTS)) + +TARGET = $(top_builddir)/bin/sdcclib$(EXEEXT) + +all: $(TARGET) + +install: all installdirs + $(INSTALL) $(TARGET) `echo $(DESTDIR)$(bindir)/sdcclib$(EXEEXT)|sed '$(transform)'` + $(STRIP) `echo $(DESTDIR)$(bindir)/sdcclib$(EXEEXT)|sed '$(transform)'` + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(DESTDIR)$(bindir)/sdcclib$(EXEEXT) + +# Performing self-test +# -------------------- +check: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + $(INSTALL) -d $(DESTDIR)$(bindir) + + +# Creating dependencies +# --------------------- +dep: + +$(TARGET): $(OBJECTS) + $(CC) $(LDFLAGS) -o $@ $(OBJECTS) + +.c.o: + $(CC) $(CFLAGS) $(CPPFLAGS) -c $< -o $@ + + +checkconf: + +include $(srcdir)/clean.mk diff --git a/support/librarian/clean.mk b/support/librarian/clean.mk new file mode 100644 index 0000000..f7f8f2c --- /dev/null +++ b/support/librarian/clean.mk @@ -0,0 +1,7 @@ +clean: + rm -f *core *[%~] *.[oa] *.output + rm -f .[a-z]*~ \#* + rm -f $(top_builddir)/bin/sdcclib$(EXEEXT) + +distclean realclean: clean + rm -f Makefile diff --git a/support/librarian/librarian.dsp b/support/librarian/librarian.dsp new file mode 100644 index 0000000..bb9db6d --- /dev/null +++ b/support/librarian/librarian.dsp @@ -0,0 +1,102 @@ +# Microsoft Developer Studio Project File - Name="librarian" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Console Application" 0x0103 + +CFG=librarian - Win32 Debug +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "librarian.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "librarian.mak" CFG="librarian - Win32 Debug" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "librarian - Win32 Release" (based on "Win32 (x86) Console Application") +!MESSAGE "librarian - Win32 Debug" (based on "Win32 (x86) Console Application") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "librarian - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 0 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 0 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /machine:I386 +# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /machine:I386 /out:"../../bin_vc/sdcclib.exe" + +!ELSEIF "$(CFG)" == "librarian - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /GZ /c +# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /GZ /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /debug /machine:I386 /pdbtype:sept +# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib /nologo /subsystem:console /debug /machine:I386 /out:"../../bin_vc/sdcclib.exe" /pdbtype:sept + +!ENDIF + +# Begin Target + +# Name "librarian - Win32 Release" +# Name "librarian - Win32 Debug" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\sdcclib.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# End Group +# Begin Group "Resource Files" + +# PROP Default_Filter "ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe" +# End Group +# End Target +# End Project diff --git a/support/librarian/sdcclib.c b/support/librarian/sdcclib.c new file mode 100644 index 0000000..8537cba --- /dev/null +++ b/support/librarian/sdcclib.c @@ -0,0 +1,681 @@ +/* sdcclib.c: sdcc librarian + Copyright (C) 2003, Jesus Calvino-Fraga jesusc(at)ece.ubc.ca + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 2, or (at your option) any +later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#define _POSIX_ +#include +#include +#include +#include +#if !defined(__BORLANDC__) && !defined(_MSC_VER) +#include +#endif + +char ProgName[PATH_MAX]; +char LibName[PATH_MAX]; +char LibNameTmp[PATH_MAX]; +char IndexName[PATH_MAX]; +char AdbName[PATH_MAX]; +char ListName[PATH_MAX]; + +char **RelName; +int NumRelFiles=0; + +#define version "1.2" + +#define OPT_NONE 0 +#define OPT_ADD_REL 1 +#define OPT_EXT_REL 2 +#define OPT_DEL_REL 3 +#define OPT_ADD_LIST 4 +#define OPT_DUMP_SYM 5 +#define OPT_DUMP_MOD 6 + +#define MAXLINE 254 +#define EQ(A,B) !strcmp((A),(B)) +#define NEQ(A,B) strcmp((A),(B)) + +int action=OPT_NONE; +FILE *lib, *newlib, *rel, *adb, *libindex; +char FLine[MAXLINE+1]; +char ModName[MAXLINE+1]; + +void GetNameFromPath(char * path, char * name) +{ + int i, j; + + for(i=0; path[i]!=0; i++); + for(; (path[i]!='\\')&&(path[i]!='/')&&(i>=0); i--); + for(j=0, i++; (path[i]!='.')&&(path[i]!=0); i++, j++) name[j]=path[i]; + name[j]=0; +} + +void ChangeExtension(char * path, char * ext) +{ + int i; + + for(i=0; path[i]!=0; i++); + for(; (path[i]!='.')&&(path[i]!='\\')&&(path[i]!='/')&&(i>=0); i--); + if(path[i]=='.') + { + path[i+1]=0; + strcat(path, ext); + } + else + { + printf("ERROR: Filename '%s' must have an extension\n", path); + exit(1); + } +} + +void CleanLine(char * buff) +{ + int j, l; + l=strlen(buff); + for(j=0; j=OPT_DUMP_SYM) ) + { + printf("ERROR: Too %s arguments.\n", cont_par<1?"few":"many"); + set_options("h"); /*Show help and exit*/ + } +} + +void AddRel(char * RelName) +{ + int inrel=0; + int state=0; + long newlibpos, indexsize; + char symname[MAXLINE+1]; + char c; + int IsDOSStyle=0; + + strcpy(LibNameTmp, LibName); + ChangeExtension(LibNameTmp, "__L"); + + strcpy(IndexName, LibName); + ChangeExtension(IndexName, "__I"); + + strcpy(AdbName, RelName); + ChangeExtension(AdbName, "adb"); + + lib=fopen(LibName, "r"); + + if(action==OPT_ADD_REL) + { + rel=fopen(RelName, "r"); + if(rel==NULL) + { + printf("ERROR: Couldn't open file '%s'\n", RelName); + if(lib!=NULL) fclose(lib); + return; + } + } + GetNameFromPath(RelName, ModName); + + newlib=fopen(LibNameTmp, "w"); + if(newlib==NULL) + { + printf("ERROR: Couldn't create temporary file '%s'\n", LibNameTmp); + if(lib!=NULL) fclose(lib); + fclose(rel); + return; + } + fprintf(newlib, "\n\n"); + + libindex=fopen(IndexName, "w"); + if(libindex==NULL) + { + printf("ERROR: Couldn't create temporary file '%s'\n", IndexName); + if(lib!=NULL) fclose(lib); + fclose(newlib); + fclose(rel); + return; + } + + if(lib!=NULL) while(!feof(lib)) + { + FLine[0]=0; + fgets(FLine, MAXLINE, lib); + CleanLine(FLine); + + switch(state) + { + case 0: + if(EQ(FLine, "")) + { + FLine[0]=0; + fgets(FLine, MAXLINE, lib); + CleanLine(FLine); + if(NEQ(FLine, ModName)) + { + newlibpos=ftell(newlib); + fprintf(newlib, "\n%s\n", FLine); + fprintf(libindex, "\n%s %ld\n", FLine, newlibpos); + state++; + } + } + break; + case 1: + fprintf(newlib, "%s\n", FLine); + if(EQ(FLine, "")) + { + fprintf(newlib, "\n"); + fprintf(libindex, "\n\n"); + state=0; + inrel=0; + } + else if(EQ(FLine, "")) inrel=1; + else if(EQ(FLine, "")) inrel=0; + if(inrel) + { + if(FLine[0]=='S') + { + sscanf(FLine, "S %s %c", symname, &c); + if(c=='D') fprintf(libindex, "%s\n", symname); + } + } + break; + } + } + + if(action==OPT_ADD_REL) + { + newlibpos=ftell(newlib); + fprintf(newlib, "\n%s\n\n", ModName); + fprintf(libindex, "\n%s %ld\n", ModName, newlibpos); + while(!feof(rel)) + { + FLine[0]=0; + fgets(FLine, MAXLINE, rel); + CleanLine(FLine); + if(strlen(FLine)>0) + { + fprintf(newlib, "%s\n", FLine); + } + if(FLine[0]=='S') + { + sscanf(FLine, "S %s %c", symname, &c); + if(c=='D') fprintf(libindex, "%s\n", symname); + } + } + fclose(rel); + fprintf(libindex, "\n"); + fprintf(newlib, "\n\n"); + + adb=fopen(AdbName, "r"); + if(adb!=NULL) + { + while(!feof(rel)) + { + FLine[0]=0; + fgets(FLine, MAXLINE, adb); + CleanLine(FLine); + if(strlen(FLine)>0) + { + fprintf(newlib, "%s\n", FLine); + } + } + fclose(adb); + } + fprintf(newlib, "\n\n"); + } + + /*Put the temporary files together as a new library file*/ + indexsize=ftell(libindex); + fflush(libindex); + fflush(newlib); + fclose(newlib); + if(lib!=NULL) fclose(lib); + fclose(libindex); + + newlib=fopen(LibNameTmp, "r"); + lib=fopen(LibName, "w"); + libindex=fopen(IndexName, "r"); + + fprintf(lib, "\n\n\n"); + + /*Find out if the \n is expanded to \r\n or not*/ + if(ftell(lib)!=(long)strlen("\n\n\n")) + { + IsDOSStyle=1; + } + + indexsize+=ftell(lib)+strlen("0123456789\n\n\n\n"); + if(IsDOSStyle) indexsize+=4; + + fprintf(lib, "%10ld\n", indexsize); + + while(!feof(libindex)) + { + FLine[0]=0; + fgets(FLine, MAXLINE, libindex); + fprintf(lib, "%s", FLine); + } + fprintf(lib, "\n\n\n"); + + while(!feof(newlib)) + { + FLine[0]=0; + fgets(FLine, MAXLINE, newlib); + fprintf(lib, "%s", FLine); + } + fprintf(lib, "\n\n\n"); + fprintf(lib, "\n"); + + fclose(newlib); + fclose(lib); + fclose(libindex); + + remove(LibNameTmp); + remove(IndexName); +} + +void ExtractRel(char * RelName) +{ + int state=0; + + strcpy(AdbName, RelName); + ChangeExtension(AdbName, "adb"); + + lib=fopen(LibName, "r"); + if(lib==NULL) + { + printf("ERROR: Couldn't open file '%s'\n", LibName); + return; + } + + rel=fopen(RelName, "w"); + if(rel==NULL) + { + printf("ERROR: Couldn't create file '%s'\n", RelName); + fclose(lib); + return; + } + GetNameFromPath(RelName, ModName); + + adb=fopen(AdbName, "w"); + if(adb==NULL) + { + printf("ERROR: Couldn't create file '%s'\n", AdbName); + fclose(lib); + fclose(rel); + return; + } + + while(!feof(lib)) + { + if(state==5) break; + FLine[0]=0; + fgets(FLine, MAXLINE, lib); + CleanLine(FLine); + + switch(state) + { + case 0: + if(EQ(FLine, "")) + { + FLine[0]=0; + fgets(FLine, MAXLINE, lib); + CleanLine(FLine); + if(EQ(FLine, ModName)) state=1; + } + break; + case 1: + if(EQ(FLine, "")) state=2; + break; + case 2: + if(EQ(FLine, "")) + state=3; + else + fprintf(rel, "%s\n", FLine); + break; + case 3: + if(EQ(FLine, "")) state=4; + break; + case 4: + if(EQ(FLine, "")) + state=5; + else + fprintf(adb, "%s\n", FLine); + break; + } + } + + fclose(rel); + fclose(lib); + fclose(adb); +} + +void DumpSymbols(void) +{ + int state=0; + + lib=fopen(LibName, "r"); + if(lib==NULL) + { + printf("ERROR: Couldn't open file '%s'\n", LibName); + return; + } + + FLine[0]=0; + fgets(FLine, MAXLINE, lib); + CleanLine(FLine); + if(NEQ(FLine, "")) + { + printf("ERROR: File '%s' was not created with '%s'\n", LibName, ProgName); + return; + } + + while(!feof(lib)) + { + if(state==3) break; + FLine[0]=0; + fgets(FLine, MAXLINE, lib); + CleanLine(FLine); + + switch(state) + { + case 0: + if(EQ(FLine, "")) state=1; + break; + case 1: + if(EQ(FLine, "")) + { + FLine[0]=0; + fgets(FLine, MAXLINE, lib); + sscanf(FLine, "%s", ModName); + if(action==OPT_DUMP_SYM) + { + printf("%s.rel:\n", ModName); + state=2; + } + else + { + printf("%s.rel\n", ModName); + } + } + else if(EQ(FLine, "")) state=3; + break; + case 2: + if(EQ(FLine, "")) + { + state=1; + printf("\n"); + } + else printf(" %s\n", FLine); + break; + default: + state=3; + case 3: + break; + } + } + + fclose(lib); +} + +int fileexist(char * fname) +{ + FILE * fp; + + fp=fopen(fname, "r"); + if(fp==NULL) return 0; + fclose(fp); + return 1; +} + +void AddList(void) +{ + FILE * list; + char *cc; + char *as; + char CmdLine[1024]; + char SrcName[PATH_MAX]; + char RelName[PATH_MAX]; + + list=fopen(ListName, "r"); + if(list==NULL) + { + printf("ERROR: Couldn't open list file '%s'\n", ListName); + return; + } + + cc = getenv("SDCCLIB_CC"); + as = getenv("SDCCLIB_AS"); + + action=OPT_ADD_REL; + while(!feof(list)) + { + RelName[0]=0; + fgets(RelName, PATH_MAX, list); + CleanLine(RelName); + if(strlen(RelName)>0) //Skip empty lines + { + if((cc!=NULL)||(as!=NULL)) + { + strcpy(SrcName, RelName); + if(strchr(SrcName,'.')==NULL) + strcat(SrcName,".src"); + } + + if(cc!=NULL) + { + ChangeExtension(SrcName, "c"); + if(fileexist(SrcName)) + { + sprintf(CmdLine, "%s %s", cc, SrcName); + printf("%s\n", CmdLine); + system(CmdLine); + } + } + else if(as!=NULL) + { + ChangeExtension(SrcName, "asm"); + if(fileexist(SrcName)) + { + sprintf(CmdLine, "%s %s", as, SrcName); + printf("%s\n", CmdLine); + system(CmdLine); + } + } + + if(strchr(RelName,'.')==NULL) + { + //Try adding the default sdcc extensions + strcat(RelName,".o"); + if(!fileexist(RelName)) + ChangeExtension(RelName, "rel"); + } + + printf("Adding: %s\n", RelName); + AddRel(RelName); + } + } + action=OPT_ADD_LIST; + fclose(list); +} + +int main(int argc, char **argv) +{ + int j; + ProcLineOptions (argc, argv); + + switch(action) + { + default: + action=OPT_ADD_REL; + case OPT_ADD_REL: + case OPT_DEL_REL: + for(j=0; j +#include +#include +#include + +#if defined(__BORLANDC__) || defined(__MINGW32__) || defined(__CYGWIN__) + #include + #include +#endif + + +typedef unsigned char BYTE; + +#define FILL_BYTE 0xFF + +int getnibble(char **p) +{ + int ret = *((*p)++) - '0'; + if (ret > 9) { + ret -= 'A' - '9' - 1; + } + return ret; +} + +int getbyte(char **p) +{ + return (getnibble(p) << 4) | getnibble(p); +} + +void usage(void) +{ + fprintf(stderr, + "makebin: convert a Intel IHX file to binary.\n" + "Usage: makebin [-p] [-s romsize] [-h]\n"); +} + +void fixStdout(void) +{ + #if defined(__BORLANDC__) || defined(__MINGW32__) || defined(__CYGWIN__) + setmode(fileno(stdout), O_BINARY); + #endif +} + + +int main(int argc, char **argv) +{ + int size = 32768, pack = 0, real_size = 0; + BYTE *rom; + char line[256]; + char *p; + + argc--; + argv++; + + fixStdout(); + + while (argc--) { + if (**argv != '-') { + usage(); + return -1; + } + switch (argv[0][1]) { + case 's': + if (argc < 1) { + usage(); + return -1; + } + argc--; + argv++; + size = atoi(*argv); + break; + case 'h': + usage(); + return 0; + case 'p': + pack = 1; + break; + default: + usage(); + return -1; + } + argv++; + } + + rom = malloc(size); + if (rom == NULL) { + fprintf(stderr, "error: couldn't allocate room for the image.\n"); + return -1; + } + memset(rom, FILL_BYTE, size); + while (fgets(line, 256, stdin) != NULL) { + int nbytes; + int addr; + + if (*line != ':') { + fprintf(stderr, "error: invalid IHX line.\n"); + return -2; + } + p = line+1; + nbytes = getbyte(&p); + addr = getbyte(&p)<<8 | getbyte(&p); + getbyte(&p); + + while (nbytes--) { + if (addr < size) + rom[addr++] = getbyte(&p); + } + + if (addr > real_size) + real_size = addr; + } + + if (pack) + fwrite(rom, 1, real_size, stdout); + else + fwrite(rom, 1, size, stdout); + + return 0; +} diff --git a/support/packihx/Makefile.bcc b/support/packihx/Makefile.bcc new file mode 100644 index 0000000..03dbddc --- /dev/null +++ b/support/packihx/Makefile.bcc @@ -0,0 +1,14 @@ +# Makefile for Borlad C++ + +PRJDIR = ../.. + +!include $(PRJDIR)/Bcc.inc + +OBJECTS = packihx.obj + +TARGET = $(PRJDIR)/bin/packihx.exe + +all: $(TARGET) + +$(TARGET): $(OBJECTS) + $(CC) $(CFLAGS) -e$@ $(OBJECTS) diff --git a/support/packihx/Makefile.in b/support/packihx/Makefile.in new file mode 100644 index 0000000..47baf28 --- /dev/null +++ b/support/packihx/Makefile.in @@ -0,0 +1,56 @@ +PRJDIR = ../.. +VPATH = @srcdir@ +srcdir = @srcdir@ +top_builddir = @top_builddir@ + +include $(PRJDIR)/$(top_builddir)/Makefile.common + +CFLAGS += -Wall + +OBJECTS = packihx.o + +SOURCES = $(patsubst %.o,%.c,$(OBJECTS)) + +TARGET = $(PRJDIR)/$(top_builddir)/bin/packihx$(EXEEXT) + +all: $(TARGET) + +install: all installdirs + $(INSTALL) $(TARGET) `echo $(DESTDIR)$(bindir)/packihx$(EXEEXT)|sed '$(transform)'` + $(STRIP) `echo $(DESTDIR)$(bindir)/packihx$(EXEEXT)|sed '$(transform)'` + +# Deleting all the installed files +# -------------------------------- +uninstall: + rm -f $(DESTDIR)$(bindir)/packihx$(EXEEXT) + +# Performing self-test +# -------------------- +check: + + +# Performing installation test +# ---------------------------- +installcheck: + + +# Creating installation directories +# --------------------------------- +installdirs: + $(INSTALL) -d $(DESTDIR)$(bindir) + + +# Creating dependencies +# --------------------- +dep: + +$(TARGET): $(OBJECTS) + $(CC) $(LDFLAGS) -o $@ $(OBJECTS) + +.c.o: + $(CC) $(CFLAGS) $(CPPFLAGS) -c $< -o $@ + + +checkconf: + +include $(srcdir)/clean.mk diff --git a/support/packihx/PackIhx.dsp b/support/packihx/PackIhx.dsp new file mode 100644 index 0000000..4197eed --- /dev/null +++ b/support/packihx/PackIhx.dsp @@ -0,0 +1,99 @@ +# Microsoft Developer Studio Project File - Name="packihx" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Console Application" 0x0103 + +CFG=packihx - Win32 Release +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "PackIhx.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "PackIhx.mak" CFG="packihx - Win32 Release" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "packihx - Win32 Debug" (based on "Win32 (x86) Console Application") +!MESSAGE "packihx - Win32 Release" (based on "Win32 (x86) Console Application") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "" +# PROP Scc_LocalPath "" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "packihx - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /MLd /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /FR /FD /GZ /c +# ADD CPP /nologo /MLd /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /FR /FD /GZ /c +# ADD BASE RSC /l 0x409 /d "_DEBUG" +# ADD RSC /l 0x409 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 /nologo /subsystem:console /debug /machine:I386 /out:"..\..\bin_vc\packihx.exe" /pdbtype:sept +# ADD LINK32 /nologo /subsystem:console /debug /machine:I386 /out:"..\..\bin_vc\packihx.exe" /pdbtype:sept + +!ELSEIF "$(CFG)" == "packihx - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Ignore_Export_Lib 0 +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /ML /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /FD /c +# ADD CPP /nologo /ML /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_WINDOWS" /D "_MBCS" /FD /c +# ADD BASE RSC /l 0x409 /d "NDEBUG" +# ADD RSC /l 0x409 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 /nologo /subsystem:console /machine:I386 /out:"..\..\bin_vc\packihx.exe" /pdbtype:sept +# ADD LINK32 /nologo /subsystem:console /machine:I386 /out:"..\..\bin_vc\packihx.exe" /pdbtype:sept + +!ENDIF + +# Begin Target + +# Name "packihx - Win32 Debug" +# Name "packihx - Win32 Release" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\packihx.c +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# End Group +# End Target +# End Project diff --git a/support/packihx/clean.mk b/support/packihx/clean.mk new file mode 100644 index 0000000..16dd176 --- /dev/null +++ b/support/packihx/clean.mk @@ -0,0 +1,7 @@ +clean: + rm -f *core *[%~] *.[oa] *.output + rm -f .[a-z]*~ \#* + rm -f $(TARGET) + +distclean realclean: clean + rm -f config.* Makefile diff --git a/support/packihx/config_in.h b/support/packihx/config_in.h new file mode 100644 index 0000000..a2ee956 --- /dev/null +++ b/support/packihx/config_in.h @@ -0,0 +1,12 @@ +#ifndef PACKIHX_HEADER +#define PACKIHX_HEADER + +#undef TYPE_BYTE +#undef TYPE_WORD +#define TYPE_UBYTE unsigned TYPE_BYTE +#define TYPE_UWORD unsigned TYPE_WORD + +typedef TYPE_UBYTE Uint8; +typedef TYPE_UWORD Uint16; + +#endif diff --git a/support/packihx/configure b/support/packihx/configure new file mode 100755 index 0000000..4d61e77 --- /dev/null +++ b/support/packihx/configure @@ -0,0 +1,6982 @@ +#! /bin/sh +# Guess values for system-dependent variables and create Makefiles. +# Generated by GNU Autoconf 2.60. +# +# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, +# 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +# This configure script is free software; the Free Software Foundation +# gives unlimited permission to copy, distribute and modify it. +## --------------------- ## +## M4sh Initialization. ## +## --------------------- ## + +# Be Bourne compatible +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac +fi +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh + + +# PATH needs CR +# Avoid depending upon Character Ranges. +as_cr_letters='abcdefghijklmnopqrstuvwxyz' +as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +as_cr_Letters=$as_cr_letters$as_cr_LETTERS +as_cr_digits='0123456789' +as_cr_alnum=$as_cr_Letters$as_cr_digits + +# The user is always right. +if test "${PATH_SEPARATOR+set}" != set; then + echo "#! /bin/sh" >conf$$.sh + echo "exit 0" >>conf$$.sh + chmod +x conf$$.sh + if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then + PATH_SEPARATOR=';' + else + PATH_SEPARATOR=: + fi + rm -f conf$$.sh +fi + +# Support unset when possible. +if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then + as_unset=unset +else + as_unset=false +fi + + +# IFS +# We need space, tab and new line, in precisely that order. Quoting is +# there to prevent editors from complaining about space-tab. +# (If _AS_PATH_WALK were called with IFS unset, it would disable word +# splitting by setting IFS to empty value.) +as_nl=' +' +IFS=" "" $as_nl" + +# Find who we are. Look in the path if we contain no directory separator. +case $0 in + *[\\/]* ) as_myself=$0 ;; + *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break +done +IFS=$as_save_IFS + + ;; +esac +# We did not find ourselves, most probably we were run as `sh COMMAND' +# in which case we are not to be found in the path. +if test "x$as_myself" = x; then + as_myself=$0 +fi +if test ! -f "$as_myself"; then + echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2 + { (exit 1); exit 1; } +fi + +# Work around bugs in pre-3.0 UWIN ksh. +for as_var in ENV MAIL MAILPATH +do ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var +done +PS1='$ ' +PS2='> ' +PS4='+ ' + +# NLS nuisances. +for as_var in \ + LANG LANGUAGE LC_ADDRESS LC_ALL LC_COLLATE LC_CTYPE LC_IDENTIFICATION \ + LC_MEASUREMENT LC_MESSAGES LC_MONETARY LC_NAME LC_NUMERIC LC_PAPER \ + LC_TELEPHONE LC_TIME +do + if (set +x; test -z "`(eval $as_var=C; export $as_var) 2>&1`"); then + eval $as_var=C; export $as_var + else + ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var + fi +done + +# Required to use basename. +if expr a : '\(a\)' >/dev/null 2>&1 && + test "X`expr 00001 : '.*\(...\)'`" = X001; then + as_expr=expr +else + as_expr=false +fi + +if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then + as_basename=basename +else + as_basename=false +fi + + +# Name of the executable. +as_me=`$as_basename -- "$0" || +$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \ + X"$0" : 'X\(//\)$' \| \ + X"$0" : 'X\(/\)' \| . 2>/dev/null || +echo X/"$0" | + sed '/^.*\/\([^/][^/]*\)\/*$/{ + s//\1/ + q + } + /^X\/\(\/\/\)$/{ + s//\1/ + q + } + /^X\/\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + +# CDPATH. +$as_unset CDPATH + + +if test "x$CONFIG_SHELL" = x; then + if (eval ":") 2>/dev/null; then + as_have_required=yes +else + as_have_required=no +fi + + if test $as_have_required = yes && (eval ": +(as_func_return () { + (exit \$1) +} +as_func_success () { + as_func_return 0 +} +as_func_failure () { + as_func_return 1 +} +as_func_ret_success () { + return 0 +} +as_func_ret_failure () { + return 1 +} + +exitcode=0 +if as_func_success; then + : +else + exitcode=1 + echo as_func_success failed. +fi + +if as_func_failure; then + exitcode=1 + echo as_func_failure succeeded. +fi + +if as_func_ret_success; then + : +else + exitcode=1 + echo as_func_ret_success failed. +fi + +if as_func_ret_failure; then + exitcode=1 + echo as_func_ret_failure succeeded. +fi + +if ( set x; as_func_ret_success y && test x = \"\$1\" ); then + : +else + exitcode=1 + echo positional parameters were not saved. +fi + +test \$exitcode = 0) || { (exit 1); exit 1; } + +( + as_lineno_1=\$LINENO + as_lineno_2=\$LINENO + test \"x\$as_lineno_1\" != \"x\$as_lineno_2\" && + test \"x\`expr \$as_lineno_1 + 1\`\" = \"x\$as_lineno_2\") || { (exit 1); exit 1; } +") 2> /dev/null; then + : +else + as_candidate_shells= + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in /usr/bin/posix$PATH_SEPARATOR/bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + case $as_dir in + /*) + for as_base in sh bash ksh sh5; do + as_candidate_shells="$as_candidate_shells $as_dir/$as_base" + done;; + esac +done +IFS=$as_save_IFS + + + for as_shell in $as_candidate_shells $SHELL; do + # Try only shells that exist, to save several forks. + if { test -f "$as_shell" || test -f "$as_shell.exe"; } && + { ("$as_shell") 2> /dev/null <<\_ASEOF +# Be Bourne compatible +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac +fi +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh + +: +_ASEOF +}; then + CONFIG_SHELL=$as_shell + as_have_required=yes + if { "$as_shell" 2> /dev/null <<\_ASEOF +# Be Bourne compatible +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. 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"$ac_site_file" + fi +done + +if test -r "$cache_file"; then + # Some versions of bash will fail to source /dev/null (special + # files actually), so we avoid doing that. + if test -f "$cache_file"; then + { echo "$as_me:$LINENO: loading cache $cache_file" >&5 +echo "$as_me: loading cache $cache_file" >&6;} + case $cache_file in + [\\/]* | ?:[\\/]* ) . "$cache_file";; + *) . "./$cache_file";; + esac + fi +else + { echo "$as_me:$LINENO: creating cache $cache_file" >&5 +echo "$as_me: creating cache $cache_file" >&6;} + >$cache_file +fi + +# Check that the precious variables saved in the cache have kept the same +# value. +ac_cache_corrupted=false +for ac_var in $ac_precious_vars; do + eval ac_old_set=\$ac_cv_env_${ac_var}_set + eval ac_new_set=\$ac_env_${ac_var}_set + eval ac_old_val=\$ac_cv_env_${ac_var}_value + eval ac_new_val=\$ac_env_${ac_var}_value + case $ac_old_set,$ac_new_set in + set,) + { echo "$as_me:$LINENO: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&5 +echo "$as_me: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&2;} + ac_cache_corrupted=: ;; + ,set) + { echo "$as_me:$LINENO: error: \`$ac_var' was not set in the previous run" >&5 +echo "$as_me: error: \`$ac_var' was not set in the previous run" >&2;} + ac_cache_corrupted=: ;; + ,);; + *) + if test "x$ac_old_val" != "x$ac_new_val"; then + { echo "$as_me:$LINENO: error: \`$ac_var' has changed since the previous run:" >&5 +echo "$as_me: error: \`$ac_var' has changed since the previous run:" >&2;} + { echo "$as_me:$LINENO: former value: $ac_old_val" >&5 +echo "$as_me: former value: $ac_old_val" >&2;} + { echo "$as_me:$LINENO: current value: $ac_new_val" >&5 +echo "$as_me: current value: $ac_new_val" >&2;} + ac_cache_corrupted=: + fi;; + esac + # Pass precious variables to config.status. + if test "$ac_new_set" = set; then + case $ac_new_val in + *\'*) ac_arg=$ac_var=`echo "$ac_new_val" | sed "s/'/'\\\\\\\\''/g"` ;; + *) ac_arg=$ac_var=$ac_new_val ;; + esac + case " $ac_configure_args " in + *" '$ac_arg' "*) ;; # Avoid dups. Use of quotes ensures accuracy. + *) ac_configure_args="$ac_configure_args '$ac_arg'" ;; + esac + fi +done +if $ac_cache_corrupted; then + { echo "$as_me:$LINENO: error: changes in the environment can compromise the build" >&5 +echo "$as_me: error: changes in the environment can compromise the build" >&2;} + { { echo "$as_me:$LINENO: error: run \`make distclean' and/or \`rm $cache_file' and start over" >&5 +echo "$as_me: error: run \`make distclean' and/or \`rm $cache_file' and start over" >&2;} + { (exit 1); exit 1; }; } +fi + + + + + + + + + + + + + + + + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + +ac_config_headers="$ac_config_headers config.h:config_in.h" + + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}gcc", so it can be a program name with args. +set dummy ${ac_tool_prefix}gcc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="${ac_tool_prefix}gcc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_CC"; then + ac_ct_CC=$CC + # Extract the first word of "gcc", so it can be a program name with args. +set dummy gcc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_CC="gcc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 +echo "${ECHO_T}$ac_ct_CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +else + CC="$ac_cv_prog_CC" +fi + +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}cc", so it can be a program name with args. +set dummy ${ac_tool_prefix}cc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="${ac_tool_prefix}cc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + fi +fi +if test -z "$CC"; then + # Extract the first word of "cc", so it can be a program name with args. +set dummy cc; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else + ac_prog_rejected=no +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then + ac_prog_rejected=yes + continue + fi + ac_cv_prog_CC="cc" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +if test $ac_prog_rejected = yes; then + # We found a bogon in the path, so make sure we never use it. + set dummy $ac_cv_prog_CC + shift + if test $# != 0; then + # We chose a different compiler from the bogus one. + # However, it has the same basename, so the bogon will be chosen + # first if we set CC to just the basename; use the full file name. + shift + ac_cv_prog_CC="$as_dir/$ac_word${1+' '}$@" + fi +fi +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + for ac_prog in cl.exe + do + # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. +set dummy $ac_tool_prefix$ac_prog; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="$ac_tool_prefix$ac_prog" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:$LINENO: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + test -n "$CC" && break + done +fi +if test -z "$CC"; then + ac_ct_CC=$CC + for ac_prog in cl.exe +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_CC="$ac_prog" + echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 +echo "${ECHO_T}$ac_ct_CC" >&6; } +else + { echo "$as_me:$LINENO: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + test -n "$ac_ct_CC" && break +done + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +fi + +fi + + +test -z "$CC" && { { echo "$as_me:$LINENO: error: no acceptable C compiler found in \$PATH +See \`config.log' for more details." >&5 +echo "$as_me: error: no acceptable C compiler found in \$PATH +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } + +# Provide some information about the compiler. +echo "$as_me:$LINENO: checking for C compiler version" >&5 +ac_compiler=`set X $ac_compile; echo $2` +{ (ac_try="$ac_compiler --version >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compiler --version >&5") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } +{ (ac_try="$ac_compiler -v >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compiler -v >&5") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } +{ (ac_try="$ac_compiler -V >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compiler -V >&5") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } + +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +ac_clean_files_save=$ac_clean_files +ac_clean_files="$ac_clean_files a.out a.exe b.out" +# Try to create an executable without -o first, disregard a.out. +# It will help us diagnose broken compilers, and finding out an intuition +# of exeext. +{ echo "$as_me:$LINENO: checking for C compiler default output file name" >&5 +echo $ECHO_N "checking for C compiler default output file name... $ECHO_C" >&6; } +ac_link_default=`echo "$ac_link" | sed 's/ -o *conftest[^ ]*//'` +# +# List of possible output files, starting from the most likely. +# The algorithm is not robust to junk in `.', hence go to wildcards (a.*) +# only as a last resort. b.out is created by i960 compilers. +ac_files='a_out.exe a.exe conftest.exe a.out conftest a.* conftest.* b.out' +# +# The IRIX 6 linker writes into existing files which may not be +# executable, retaining their permissions. Remove them first so a +# subsequent execution test works. +ac_rmfiles= +for ac_file in $ac_files +do + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.o | *.obj ) ;; + * ) ac_rmfiles="$ac_rmfiles $ac_file";; + esac +done +rm -f $ac_rmfiles + +if { (ac_try="$ac_link_default" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link_default") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; then + # Autoconf-2.13 could set the ac_cv_exeext variable to `no'. +# So ignore a value of `no', otherwise this would lead to `EXEEXT = no' +# in a Makefile. We should not override ac_cv_exeext if it was cached, +# so that the user can short-circuit this test for compilers unknown to +# Autoconf. +for ac_file in $ac_files +do + test -f "$ac_file" || continue + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.o | *.obj ) + ;; + [ab].out ) + # We found the default executable, but exeext='' is most + # certainly right. + break;; + *.* ) + if test "${ac_cv_exeext+set}" = set && test "$ac_cv_exeext" != no; + then :; else + ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'` + fi + # We set ac_cv_exeext here because the later test for it is not + # safe: cross compilers may not add the suffix if given an `-o' + # argument, so we may need to know it at that point already. + # Even if this section looks crufty: it has the advantage of + # actually working. + break;; + * ) + break;; + esac +done +test "$ac_cv_exeext" = no && ac_cv_exeext= + +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +{ { echo "$as_me:$LINENO: error: C compiler cannot create executables +See \`config.log' for more details." >&5 +echo "$as_me: error: C compiler cannot create executables +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } +fi + +ac_exeext=$ac_cv_exeext +{ echo "$as_me:$LINENO: result: $ac_file" >&5 +echo "${ECHO_T}$ac_file" >&6; } + +# Check that the compiler produces executables we can run. If not, either +# the compiler is broken, or we cross compile. +{ echo "$as_me:$LINENO: checking whether the C compiler works" >&5 +echo $ECHO_N "checking whether the C compiler works... $ECHO_C" >&6; } +# FIXME: These cross compiler hacks should be removed for Autoconf 3.0 +# If not cross compiling, check that we can run a simple program. +if test "$cross_compiling" != yes; then + if { ac_try='./$ac_file' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + cross_compiling=no + else + if test "$cross_compiling" = maybe; then + cross_compiling=yes + else + { { echo "$as_me:$LINENO: error: cannot run C compiled programs. +If you meant to cross compile, use \`--host'. +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot run C compiled programs. +If you meant to cross compile, use \`--host'. +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } + fi + fi +fi +{ echo "$as_me:$LINENO: result: yes" >&5 +echo "${ECHO_T}yes" >&6; } + +rm -f a.out a.exe conftest$ac_cv_exeext b.out +ac_clean_files=$ac_clean_files_save +# Check that the compiler produces executables we can run. If not, either +# the compiler is broken, or we cross compile. +{ echo "$as_me:$LINENO: checking whether we are cross compiling" >&5 +echo $ECHO_N "checking whether we are cross compiling... $ECHO_C" >&6; } +{ echo "$as_me:$LINENO: result: $cross_compiling" >&5 +echo "${ECHO_T}$cross_compiling" >&6; } + +{ echo "$as_me:$LINENO: checking for suffix of executables" >&5 +echo $ECHO_N "checking for suffix of executables... $ECHO_C" >&6; } +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; then + # If both `conftest.exe' and `conftest' are `present' (well, observable) +# catch `conftest.exe'. For instance with Cygwin, `ls conftest' will +# work properly (i.e., refer to `conftest.exe'), while it won't with +# `rm'. +for ac_file in conftest.exe conftest conftest.*; do + test -f "$ac_file" || continue + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.o | *.obj ) ;; + *.* ) ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'` + break;; + * ) break;; + esac +done +else + { { echo "$as_me:$LINENO: error: cannot compute suffix of executables: cannot compile and link +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute suffix of executables: cannot compile and link +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } +fi + +rm -f conftest$ac_cv_exeext +{ echo "$as_me:$LINENO: result: $ac_cv_exeext" >&5 +echo "${ECHO_T}$ac_cv_exeext" >&6; } + +rm -f conftest.$ac_ext +EXEEXT=$ac_cv_exeext +ac_exeext=$EXEEXT +{ echo "$as_me:$LINENO: checking for suffix of object files" >&5 +echo $ECHO_N "checking for suffix of object files... $ECHO_C" >&6; } +if test "${ac_cv_objext+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.o conftest.obj +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; then + for ac_file in conftest.o conftest.obj conftest.*; do + test -f "$ac_file" || continue; + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf ) ;; + *) ac_cv_objext=`expr "$ac_file" : '.*\.\(.*\)'` + break;; + esac +done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +{ { echo "$as_me:$LINENO: error: cannot compute suffix of object files: cannot compile +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute suffix of object files: cannot compile +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } +fi + +rm -f conftest.$ac_cv_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_objext" >&5 +echo "${ECHO_T}$ac_cv_objext" >&6; } +OBJEXT=$ac_cv_objext +ac_objext=$OBJEXT +{ echo "$as_me:$LINENO: checking whether we are using the GNU C compiler" >&5 +echo $ECHO_N "checking whether we are using the GNU C compiler... $ECHO_C" >&6; } +if test "${ac_cv_c_compiler_gnu+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ +#ifndef __GNUC__ + choke me +#endif + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_compiler_gnu=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_compiler_gnu=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +ac_cv_c_compiler_gnu=$ac_compiler_gnu + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_c_compiler_gnu" >&5 +echo "${ECHO_T}$ac_cv_c_compiler_gnu" >&6; } +GCC=`test $ac_compiler_gnu = yes && echo yes` +ac_test_CFLAGS=${CFLAGS+set} +ac_save_CFLAGS=$CFLAGS +{ echo "$as_me:$LINENO: checking whether $CC accepts -g" >&5 +echo $ECHO_N "checking whether $CC accepts -g... $ECHO_C" >&6; } +if test "${ac_cv_prog_cc_g+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_save_c_werror_flag=$ac_c_werror_flag + ac_c_werror_flag=yes + ac_cv_prog_cc_g=no + CFLAGS="-g" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_prog_cc_g=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + CFLAGS="" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_c_werror_flag=$ac_save_c_werror_flag + CFLAGS="-g" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_prog_cc_g=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + ac_c_werror_flag=$ac_save_c_werror_flag +fi +{ echo "$as_me:$LINENO: result: $ac_cv_prog_cc_g" >&5 +echo "${ECHO_T}$ac_cv_prog_cc_g" >&6; } +if test "$ac_test_CFLAGS" = set; then + CFLAGS=$ac_save_CFLAGS +elif test $ac_cv_prog_cc_g = yes; then + if test "$GCC" = yes; then + CFLAGS="-g -O2" + else + CFLAGS="-g" + fi +else + if test "$GCC" = yes; then + CFLAGS="-O2" + else + CFLAGS= + fi +fi +{ echo "$as_me:$LINENO: checking for $CC option to accept ISO C89" >&5 +echo $ECHO_N "checking for $CC option to accept ISO C89... $ECHO_C" >&6; } +if test "${ac_cv_prog_cc_c89+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_cv_prog_cc_c89=no +ac_save_CC=$CC +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#include +#include +/* Most of the following tests are stolen from RCS 5.7's src/conf.sh. */ +struct buf { int x; }; +FILE * (*rcsopen) (struct buf *, struct stat *, int); +static char *e (p, i) + char **p; + int i; +{ + return p[i]; +} +static char *f (char * (*g) (char **, int), char **p, ...) +{ + char *s; + va_list v; + va_start (v,p); + s = g (p, va_arg (v,int)); + va_end (v); + return s; +} + +/* OSF 4.0 Compaq cc is some sort of almost-ANSI by default. It has + function prototypes and stuff, but not '\xHH' hex character constants. + These don't provoke an error unfortunately, instead are silently treated + as 'x'. The following induces an error, until -std is added to get + proper ANSI mode. Curiously '\x00'!='x' always comes out true, for an + array size at least. It's necessary to write '\x00'==0 to get something + that's true only with -std. */ +int osf4_cc_array ['\x00' == 0 ? 1 : -1]; + +/* IBM C 6 for AIX is almost-ANSI by default, but it replaces macro parameters + inside strings and character constants. */ +#define FOO(x) 'x' +int xlc6_cc_array[FOO(a) == 'x' ? 1 : -1]; + +int test (int i, double x); +struct s1 {int (*f) (int a);}; +struct s2 {int (*f) (double a);}; +int pairnames (int, char **, FILE *(*)(struct buf *, struct stat *, int), int, int); +int argc; +char **argv; +int +main () +{ +return f (e, argv, 0) != argv[0] || f (e, argv, 1) != argv[1]; + ; + return 0; +} +_ACEOF +for ac_arg in '' -qlanglvl=extc89 -qlanglvl=ansi -std \ + -Ae "-Aa -D_HPUX_SOURCE" "-Xc -D__EXTENSIONS__" +do + CC="$ac_save_CC $ac_arg" + rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_prog_cc_c89=$ac_arg +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext + test "x$ac_cv_prog_cc_c89" != "xno" && break +done +rm -f conftest.$ac_ext +CC=$ac_save_CC + +fi +# AC_CACHE_VAL +case "x$ac_cv_prog_cc_c89" in + x) + { echo "$as_me:$LINENO: result: none needed" >&5 +echo "${ECHO_T}none needed" >&6; } ;; + xno) + { echo "$as_me:$LINENO: result: unsupported" >&5 +echo "${ECHO_T}unsupported" >&6; } ;; + *) + CC="$CC $ac_cv_prog_cc_c89" + { echo "$as_me:$LINENO: result: $ac_cv_prog_cc_c89" >&5 +echo "${ECHO_T}$ac_cv_prog_cc_c89" >&6; } ;; +esac + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu +{ echo "$as_me:$LINENO: checking how to run the C preprocessor" >&5 +echo $ECHO_N "checking how to run the C preprocessor... $ECHO_C" >&6; } +# On Suns, sometimes $CPP names a directory. +if test -n "$CPP" && test -d "$CPP"; then + CPP= +fi +if test -z "$CPP"; then + if test "${ac_cv_prog_CPP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + # Double quotes because CPP needs to be expanded + for CPP in "$CC -E" "$CC -E -traditional-cpp" "/lib/cpp" + do + ac_preproc_ok=false +for ac_c_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Broken: fails on valid input. +continue +fi + +rm -f conftest.err conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + # Broken: success on invalid input. +continue +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Passes both tests. +ac_preproc_ok=: +break +fi + +rm -f conftest.err conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.err conftest.$ac_ext +if $ac_preproc_ok; then + break +fi + + done + ac_cv_prog_CPP=$CPP + +fi + CPP=$ac_cv_prog_CPP +else + ac_cv_prog_CPP=$CPP +fi +{ echo "$as_me:$LINENO: result: $CPP" >&5 +echo "${ECHO_T}$CPP" >&6; } +ac_preproc_ok=false +for ac_c_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Broken: fails on valid input. +continue +fi + +rm -f conftest.err conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null; then + if test -s conftest.err; then + ac_cpp_err=$ac_c_preproc_warn_flag + ac_cpp_err=$ac_cpp_err$ac_c_werror_flag + else + ac_cpp_err= + fi +else + ac_cpp_err=yes +fi +if test -z "$ac_cpp_err"; then + # Broken: success on invalid input. +continue +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Passes both tests. +ac_preproc_ok=: +break +fi + +rm -f conftest.err conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.err conftest.$ac_ext +if $ac_preproc_ok; then + : +else + { { echo "$as_me:$LINENO: error: C preprocessor \"$CPP\" fails sanity check +See \`config.log' for more details." >&5 +echo "$as_me: error: C preprocessor \"$CPP\" fails sanity check +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } +fi + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + +{ echo "$as_me:$LINENO: checking for grep that handles long lines and -e" >&5 +echo $ECHO_N "checking for grep that handles long lines and -e... $ECHO_C" >&6; } +if test "${ac_cv_path_GREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + # Extract the first word of "grep ggrep" to use in msg output +if test -z "$GREP"; then +set dummy grep ggrep; ac_prog_name=$2 +if test "${ac_cv_path_GREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_path_GREP_found=false +# Loop through the user's path and test for each of PROGNAME-LIST +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in grep ggrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_GREP="$as_dir/$ac_prog$ac_exec_ext" + { test -f "$ac_path_GREP" && $as_executable_p "$ac_path_GREP"; } || continue + # Check for GNU ac_path_GREP and select it if it is found. + # Check for GNU $ac_path_GREP +case `"$ac_path_GREP" --version 2>&1` in +*GNU*) + ac_cv_path_GREP="$ac_path_GREP" ac_path_GREP_found=:;; +*) + ac_count=0 + echo $ECHO_N "0123456789$ECHO_C" >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + echo 'GREP' >> "conftest.nl" + "$ac_path_GREP" -e 'GREP$' -e '-(cannot match)-' < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + ac_count=`expr $ac_count + 1` + if test $ac_count -gt ${ac_path_GREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_GREP="$ac_path_GREP" + ac_path_GREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + + $ac_path_GREP_found && break 3 + done +done + +done +IFS=$as_save_IFS + + +fi + +GREP="$ac_cv_path_GREP" +if test -z "$GREP"; then + { { echo "$as_me:$LINENO: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&5 +echo "$as_me: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&2;} + { (exit 1); exit 1; }; } +fi + +else + ac_cv_path_GREP=$GREP +fi + + +fi +{ echo "$as_me:$LINENO: result: $ac_cv_path_GREP" >&5 +echo "${ECHO_T}$ac_cv_path_GREP" >&6; } + GREP="$ac_cv_path_GREP" + + +{ echo "$as_me:$LINENO: checking for egrep" >&5 +echo $ECHO_N "checking for egrep... $ECHO_C" >&6; } +if test "${ac_cv_path_EGREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if echo a | $GREP -E '(a|b)' >/dev/null 2>&1 + then ac_cv_path_EGREP="$GREP -E" + else + # Extract the first word of "egrep" to use in msg output +if test -z "$EGREP"; then +set dummy egrep; ac_prog_name=$2 +if test "${ac_cv_path_EGREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_path_EGREP_found=false +# Loop through the user's path and test for each of PROGNAME-LIST +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in egrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_EGREP="$as_dir/$ac_prog$ac_exec_ext" + { test -f "$ac_path_EGREP" && $as_executable_p "$ac_path_EGREP"; } || continue + # Check for GNU ac_path_EGREP and select it if it is found. + # Check for GNU $ac_path_EGREP +case `"$ac_path_EGREP" --version 2>&1` in +*GNU*) + ac_cv_path_EGREP="$ac_path_EGREP" ac_path_EGREP_found=:;; +*) + ac_count=0 + echo $ECHO_N "0123456789$ECHO_C" >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + echo 'EGREP' >> "conftest.nl" + "$ac_path_EGREP" 'EGREP$' < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + ac_count=`expr $ac_count + 1` + if test $ac_count -gt ${ac_path_EGREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_EGREP="$ac_path_EGREP" + ac_path_EGREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + + $ac_path_EGREP_found && break 3 + done +done + +done +IFS=$as_save_IFS + + +fi + +EGREP="$ac_cv_path_EGREP" +if test -z "$EGREP"; then + { { echo "$as_me:$LINENO: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&5 +echo "$as_me: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&2;} + { (exit 1); exit 1; }; } +fi + +else + ac_cv_path_EGREP=$EGREP +fi + + + fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_path_EGREP" >&5 +echo "${ECHO_T}$ac_cv_path_EGREP" >&6; } + EGREP="$ac_cv_path_EGREP" + + +{ echo "$as_me:$LINENO: checking for ANSI C header files" >&5 +echo $ECHO_N "checking for ANSI C header files... $ECHO_C" >&6; } +if test "${ac_cv_header_stdc+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#include +#include + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_header_stdc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_header_stdc=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + +if test $ac_cv_header_stdc = yes; then + # SunOS 4.x string.h does not declare mem*, contrary to ANSI. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "memchr" >/dev/null 2>&1; then + : +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "free" >/dev/null 2>&1; then + : +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. + if test "$cross_compiling" = yes; then + : +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#if ((' ' & 0x0FF) == 0x020) +# define ISLOWER(c) ('a' <= (c) && (c) <= 'z') +# define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c)) +#else +# define ISLOWER(c) \ + (('a' <= (c) && (c) <= 'i') \ + || ('j' <= (c) && (c) <= 'r') \ + || ('s' <= (c) && (c) <= 'z')) +# define TOUPPER(c) (ISLOWER(c) ? ((c) | 0x40) : (c)) +#endif + +#define XOR(e, f) (((e) && !(f)) || (!(e) && (f))) +int +main () +{ + int i; + for (i = 0; i < 256; i++) + if (XOR (islower (i), ISLOWER (i)) + || toupper (i) != TOUPPER (i)) + return 2; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + : +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +ac_cv_header_stdc=no +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi + + +fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_header_stdc" >&5 +echo "${ECHO_T}$ac_cv_header_stdc" >&6; } +if test $ac_cv_header_stdc = yes; then + +cat >>confdefs.h <<\_ACEOF +#define STDC_HEADERS 1 +_ACEOF + +fi + +# On IRIX 5.3, sys/types and inttypes.h are conflicting. + + + + + + + + + +for ac_header in sys/types.h sys/stat.h stdlib.h string.h memory.h strings.h \ + inttypes.h stdint.h unistd.h +do +as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` +{ echo "$as_me:$LINENO: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + +#include <$ac_header> +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + eval "$as_ac_Header=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_Header=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:$LINENO: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_Header'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 +_ACEOF + +fi + +done + + +{ echo "$as_me:$LINENO: checking for char" >&5 +echo $ECHO_N "checking for char... $ECHO_C" >&6; } +if test "${ac_cv_type_char+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef char ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_type_char=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_char=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_type_char" >&5 +echo "${ECHO_T}$ac_cv_type_char" >&6; } + +{ echo "$as_me:$LINENO: checking size of char" >&5 +echo $ECHO_N "checking size of char... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_char+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$ac_cv_type_char" = yes; then + # The cast to long int works around a bug in the HP C Compiler + # version HP92453-01 B.11.11.23709.GP, which incorrectly rejects + # declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. + # This bug is HP SR number 8606223364. + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_char=$ac_lo;; +'') { { echo "$as_me:$LINENO: error: cannot compute sizeof (char) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (char) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_char=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +{ { echo "$as_me:$LINENO: error: cannot compute sizeof (char) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (char) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +else + ac_cv_sizeof_char=0 +fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_sizeof_char" >&5 +echo "${ECHO_T}$ac_cv_sizeof_char" >&6; } +cat >>confdefs.h <<_ACEOF +#define SIZEOF_CHAR $ac_cv_sizeof_char +_ACEOF + + +{ echo "$as_me:$LINENO: checking for short" >&5 +echo $ECHO_N "checking for short... $ECHO_C" >&6; } +if test "${ac_cv_type_short+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef short ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_type_short=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_short=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_type_short" >&5 +echo "${ECHO_T}$ac_cv_type_short" >&6; } + +{ echo "$as_me:$LINENO: checking size of short" >&5 +echo $ECHO_N "checking size of short... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_short+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$ac_cv_type_short" = yes; then + # The cast to long int works around a bug in the HP C Compiler + # version HP92453-01 B.11.11.23709.GP, which incorrectly rejects + # declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. + # This bug is HP SR number 8606223364. + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_short=$ac_lo;; +'') { { echo "$as_me:$LINENO: error: cannot compute sizeof (short) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (short) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_short=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +{ { echo "$as_me:$LINENO: error: cannot compute sizeof (short) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (short) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +else + ac_cv_sizeof_short=0 +fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_sizeof_short" >&5 +echo "${ECHO_T}$ac_cv_sizeof_short" >&6; } +cat >>confdefs.h <<_ACEOF +#define SIZEOF_SHORT $ac_cv_sizeof_short +_ACEOF + + +{ echo "$as_me:$LINENO: checking for int" >&5 +echo $ECHO_N "checking for int... $ECHO_C" >&6; } +if test "${ac_cv_type_int+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef int ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_type_int=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_int=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_type_int" >&5 +echo "${ECHO_T}$ac_cv_type_int" >&6; } + +{ echo "$as_me:$LINENO: checking size of int" >&5 +echo $ECHO_N "checking size of int... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_int+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$ac_cv_type_int" = yes; then + # The cast to long int works around a bug in the HP C Compiler + # version HP92453-01 B.11.11.23709.GP, which incorrectly rejects + # declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. + # This bug is HP SR number 8606223364. + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_int=$ac_lo;; +'') { { echo "$as_me:$LINENO: error: cannot compute sizeof (int) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (int) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_int=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +{ { echo "$as_me:$LINENO: error: cannot compute sizeof (int) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (int) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +else + ac_cv_sizeof_int=0 +fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_sizeof_int" >&5 +echo "${ECHO_T}$ac_cv_sizeof_int" >&6; } +cat >>confdefs.h <<_ACEOF +#define SIZEOF_INT $ac_cv_sizeof_int +_ACEOF + + +{ echo "$as_me:$LINENO: checking for long" >&5 +echo $ECHO_N "checking for long... $ECHO_C" >&6; } +if test "${ac_cv_type_long+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef long ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_type_long=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_long=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_type_long" >&5 +echo "${ECHO_T}$ac_cv_type_long" >&6; } + +{ echo "$as_me:$LINENO: checking size of long" >&5 +echo $ECHO_N "checking size of long... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_long+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$ac_cv_type_long" = yes; then + # The cast to long int works around a bug in the HP C Compiler + # version HP92453-01 B.11.11.23709.GP, which incorrectly rejects + # declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. + # This bug is HP SR number 8606223364. + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_long=$ac_lo;; +'') { { echo "$as_me:$LINENO: error: cannot compute sizeof (long) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (long) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_long=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +{ { echo "$as_me:$LINENO: error: cannot compute sizeof (long) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (long) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +else + ac_cv_sizeof_long=0 +fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_sizeof_long" >&5 +echo "${ECHO_T}$ac_cv_sizeof_long" >&6; } +cat >>confdefs.h <<_ACEOF +#define SIZEOF_LONG $ac_cv_sizeof_long +_ACEOF + + +{ echo "$as_me:$LINENO: checking for long long" >&5 +echo $ECHO_N "checking for long long... $ECHO_C" >&6; } +if test "${ac_cv_type_long_long+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef long long ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_type_long_long=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_long_long=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:$LINENO: result: $ac_cv_type_long_long" >&5 +echo "${ECHO_T}$ac_cv_type_long_long" >&6; } + +{ echo "$as_me:$LINENO: checking size of long long" >&5 +echo $ECHO_N "checking size of long long... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_long_long+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$ac_cv_type_long_long" = yes; then + # The cast to long int works around a bug in the HP C Compiler + # version HP92453-01 B.11.11.23709.GP, which incorrectly rejects + # declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. + # This bug is HP SR number 8606223364. + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && + { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; } && + { ac_try='test -s conftest.$ac_objext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_long_long=$ac_lo;; +'') { { echo "$as_me:$LINENO: error: cannot compute sizeof (long long) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (long long) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_long_long=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +{ { echo "$as_me:$LINENO: error: cannot compute sizeof (long long) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (long long) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +else + ac_cv_sizeof_long_long=0 +fi +fi +{ echo "$as_me:$LINENO: result: $ac_cv_sizeof_long_long" >&5 +echo "${ECHO_T}$ac_cv_sizeof_long_long" >&6; } +cat >>confdefs.h <<_ACEOF +#define SIZEOF_LONG_LONG $ac_cv_sizeof_long_long +_ACEOF + + + +type_name() +{ + if expr "$ac_cv_sizeof_char" '>=' "$1" >/dev/null; then + echo "char" + exit + fi + if expr "$ac_cv_sizeof_short" '>=' "$1" >/dev/null; then + echo "short" + exit + fi + if expr "$ac_cv_sizeof_int" '>=' "$1" >/dev/null; then + echo "int" + exit + fi + if expr "$ac_cv_sizeof_long" '>=' "$1" >/dev/null; then + echo "long" + exit + fi + if expr "$ac_cv_sizeof_long_long" '>=' "$1" >/dev/null; then + echo "long long" + exit + fi + echo "long long" +} + +{ echo "$as_me:$LINENO: checking type name for byte" >&5 +echo $ECHO_N "checking type name for byte... $ECHO_C" >&6; } +TYPE_BYTE=`type_name 1` +{ echo "$as_me:$LINENO: result: $TYPE_BYTE" >&5 +echo "${ECHO_T}$TYPE_BYTE" >&6; } +{ echo "$as_me:$LINENO: checking type name for word" >&5 +echo $ECHO_N "checking type name for word... $ECHO_C" >&6; } +TYPE_WORD=`type_name 2` +{ echo "$as_me:$LINENO: result: $TYPE_WORD" >&5 +echo "${ECHO_T}$TYPE_WORD" >&6; } +cat >>confdefs.h <<_ACEOF +#define TYPE_BYTE $TYPE_BYTE +_ACEOF + +cat >>confdefs.h <<_ACEOF +#define TYPE_WORD $TYPE_WORD +_ACEOF + + +ac_config_files="$ac_config_files Makefile" + +cat >confcache <<\_ACEOF +# This file is a shell script that caches the results of configure +# tests run on this system so they can be shared between configure +# scripts and configure runs, see configure's option --config-cache. +# It is not useful on other systems. If it contains results you don't +# want to keep, you may remove or edit it. +# +# config.status only pays attention to the cache file if you give it +# the --recheck option to rerun configure. +# +# `ac_cv_env_foo' variables (set or unset) will be overridden when +# loading this file, other *unset* `ac_cv_foo' will be assigned the +# following values. + +_ACEOF + +# The following way of writing the cache mishandles newlines in values, +# but we know of no workaround that is simple, portable, and efficient. +# So, we kill variables containing newlines. +# Ultrix sh set writes to stderr and can't be redirected directly, +# and sets the high bit in the cache file unless we assign to the vars. +( + for ac_var in `(set) 2>&1 | sed -n 's/^\([a-zA-Z_][a-zA-Z0-9_]*\)=.*/\1/p'`; do + eval ac_val=\$$ac_var + case $ac_val in #( + *${as_nl}*) + case $ac_var in #( + *_cv_*) { echo "$as_me:$LINENO: WARNING: Cache variable $ac_var contains a newline." >&5 +echo "$as_me: WARNING: Cache variable $ac_var contains a newline." >&2;} ;; + esac + case $ac_var in #( + _ | IFS | as_nl) ;; #( + *) $as_unset $ac_var ;; + esac ;; + esac + done + + (set) 2>&1 | + case $as_nl`(ac_space=' '; set) 2>&1` in #( + *${as_nl}ac_space=\ *) + # `set' does not quote correctly, so add quotes (double-quote + # substitution turns \\\\ into \\, and sed turns \\ into \). + sed -n \ + "s/'/'\\\\''/g; + s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='\\2'/p" + ;; #( + *) + # `set' quotes correctly as required by POSIX, so do not add quotes. + sed -n "/^[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*=/p" + ;; + esac | + sort +) | + sed ' + /^ac_cv_env_/b end + t clear + :clear + s/^\([^=]*\)=\(.*[{}].*\)$/test "${\1+set}" = set || &/ + t end + s/^\([^=]*\)=\(.*\)$/\1=${\1=\2}/ + :end' >>confcache +if diff "$cache_file" confcache >/dev/null 2>&1; then :; else + if test -w "$cache_file"; then + test "x$cache_file" != "x/dev/null" && + { echo "$as_me:$LINENO: updating cache $cache_file" >&5 +echo "$as_me: updating cache $cache_file" >&6;} + cat confcache >$cache_file + else + { echo "$as_me:$LINENO: not updating unwritable cache $cache_file" >&5 +echo "$as_me: not updating unwritable cache $cache_file" >&6;} + fi +fi +rm -f confcache + +test "x$prefix" = xNONE && prefix=$ac_default_prefix +# Let make expand exec_prefix. +test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + +DEFS=-DHAVE_CONFIG_H + +ac_libobjs= +ac_ltlibobjs= +for ac_i in : $LIBOBJS; do test "x$ac_i" = x: && continue + # 1. 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Don't use a zero-byte file, as +# systems may use methods other than mode bits to determine executability. +cat >conf$$.file <<_ASEOF +#! /bin/sh +exit 0 +_ASEOF +chmod +x conf$$.file +if test -x conf$$.file >/dev/null 2>&1; then + as_executable_p="test -x" +else + as_executable_p=: +fi +rm -f conf$$.file + +# Sed expression to map a string onto a valid CPP name. +as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'" + +# Sed expression to map a string onto a valid variable name. +as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'" + + +exec 6>&1 + +# Save the log message, to keep $[0] and so on meaningful, and to +# report actual input values of CONFIG_FILES etc. instead of their +# values after options handling. +ac_log=" +This file was extended by $as_me, which was +generated by GNU Autoconf 2.60. Invocation command line was + + CONFIG_FILES = $CONFIG_FILES + CONFIG_HEADERS = $CONFIG_HEADERS + CONFIG_LINKS = $CONFIG_LINKS + CONFIG_COMMANDS = $CONFIG_COMMANDS + $ $0 $@ + +on `(hostname || uname -n) 2>/dev/null | sed 1q` +" + +_ACEOF + +cat >>$CONFIG_STATUS <<_ACEOF +# Files that config.status was made for. +config_files="$ac_config_files" +config_headers="$ac_config_headers" + +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF +ac_cs_usage="\ +\`$as_me' instantiates files from templates according to the +current configuration. + +Usage: $0 [OPTIONS] [FILE]... + + -h, --help print this help, then exit + -V, --version print version number, then exit + -q, --quiet do not print progress messages + -d, --debug don't remove temporary files + --recheck update $as_me by reconfiguring in the same conditions + --file=FILE[:TEMPLATE] + instantiate the configuration file FILE + --header=FILE[:TEMPLATE] + instantiate the configuration header FILE + +Configuration files: +$config_files + +Configuration headers: +$config_headers + +Report bugs to ." + +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF +ac_cs_version="\\ +config.status +configured by $0, generated by GNU Autoconf 2.60, + with options \\"`echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" + +Copyright (C) 2006 Free Software Foundation, Inc. +This config.status script is free software; the Free Software Foundation +gives unlimited permission to copy, distribute and modify it." + +ac_pwd='$ac_pwd' +srcdir='$srcdir' +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF +# If no file are specified by the user, then we need to provide default +# value. By we need to know if files were specified by the user. +ac_need_defaults=: +while test $# != 0 +do + case $1 in + --*=*) + ac_option=`expr "X$1" : 'X\([^=]*\)='` + ac_optarg=`expr "X$1" : 'X[^=]*=\(.*\)'` + ac_shift=: + ;; + *) + ac_option=$1 + ac_optarg=$2 + ac_shift=shift + ;; + esac + + case $ac_option in + # Handling of the options. + -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r) + ac_cs_recheck=: ;; + --version | --versio | --versi | --vers | --ver | --ve | --v | -V ) + echo "$ac_cs_version"; exit ;; + --debug | --debu | --deb | --de | --d | -d ) + debug=: ;; + --file | --fil | --fi | --f ) + $ac_shift + CONFIG_FILES="$CONFIG_FILES $ac_optarg" + ac_need_defaults=false;; + --header | --heade | --head | --hea ) + $ac_shift + CONFIG_HEADERS="$CONFIG_HEADERS $ac_optarg" + ac_need_defaults=false;; + --he | --h) + # Conflict between --help and --header + { echo "$as_me: error: ambiguous option: $1 +Try \`$0 --help' for more information." >&2 + { (exit 1); exit 1; }; };; + --help | --hel | -h ) + echo "$ac_cs_usage"; exit ;; + -q | -quiet | --quiet | --quie | --qui | --qu | --q \ + | -silent | --silent | --silen | --sile | --sil | --si | --s) + ac_cs_silent=: ;; + + # This is an error. + -*) { echo "$as_me: error: unrecognized option: $1 +Try \`$0 --help' for more information." >&2 + { (exit 1); exit 1; }; } ;; + + *) ac_config_targets="$ac_config_targets $1" + ac_need_defaults=false ;; + + esac + shift +done + +ac_configure_extra_args= + +if $ac_cs_silent; then + exec 6>/dev/null + ac_configure_extra_args="$ac_configure_extra_args --silent" +fi + +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF +if \$ac_cs_recheck; then + echo "running CONFIG_SHELL=$SHELL $SHELL $0 "$ac_configure_args \$ac_configure_extra_args " --no-create --no-recursion" >&6 + CONFIG_SHELL=$SHELL + export CONFIG_SHELL + exec $SHELL "$0"$ac_configure_args \$ac_configure_extra_args --no-create --no-recursion +fi + +_ACEOF +cat >>$CONFIG_STATUS <<\_ACEOF +exec 5>>config.log +{ + echo + sed 'h;s/./-/g;s/^.../## /;s/...$/ ##/;p;x;p;x' <<_ASBOX +## Running $as_me. ## +_ASBOX + echo "$ac_log" +} >&5 + +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF + +# Handling of arguments. +for ac_config_target in $ac_config_targets +do + case $ac_config_target in + "config.h") CONFIG_HEADERS="$CONFIG_HEADERS config.h:config_in.h" ;; + "Makefile") CONFIG_FILES="$CONFIG_FILES Makefile" ;; + + *) { { echo "$as_me:$LINENO: error: invalid argument: $ac_config_target" >&5 +echo "$as_me: error: invalid argument: $ac_config_target" >&2;} + { (exit 1); exit 1; }; };; + esac +done + + +# If the user did not use the arguments to specify the items to instantiate, +# then the envvar interface is used. Set only those that are not. +# We use the long form for the default assignment because of an extremely +# bizarre bug on SunOS 4.1.3. +if $ac_need_defaults; then + test "${CONFIG_FILES+set}" = set || CONFIG_FILES=$config_files + test "${CONFIG_HEADERS+set}" = set || CONFIG_HEADERS=$config_headers +fi + +# Have a temporary directory for convenience. Make it in the build tree +# simply because there is no reason against having it here, and in addition, +# creating and moving files from /tmp can sometimes cause problems. +# Hook for its removal unless debugging. +# Note that there is a small window in which the directory will not be cleaned: +# after its creation but before its name has been assigned to `$tmp'. +$debug || +{ + tmp= + trap 'exit_status=$? + { test -z "$tmp" || test ! -d "$tmp" || rm -fr "$tmp"; } && exit $exit_status +' 0 + trap '{ (exit 1); exit 1; }' 1 2 13 15 +} +# Create a (secure) tmp directory for tmp files. + +{ + tmp=`(umask 077 && mktemp -d "./confXXXXXX") 2>/dev/null` && + test -n "$tmp" && test -d "$tmp" +} || +{ + tmp=./conf$$-$RANDOM + (umask 077 && mkdir "$tmp") +} || +{ + echo "$me: cannot create a temporary directory in ." >&2 + { (exit 1); exit 1; } +} + +# +# Set up the sed scripts for CONFIG_FILES section. +# + +# No need to generate the scripts if there are no CONFIG_FILES. +# This happens for instance when ./config.status config.h +if test -n "$CONFIG_FILES"; then + +_ACEOF + + + +ac_delim='%!_!# ' +for ac_last_try in false false false false false :; do + cat >conf$$subs.sed <<_ACEOF +SHELL!$SHELL$ac_delim +PATH_SEPARATOR!$PATH_SEPARATOR$ac_delim +PACKAGE_NAME!$PACKAGE_NAME$ac_delim +PACKAGE_TARNAME!$PACKAGE_TARNAME$ac_delim +PACKAGE_VERSION!$PACKAGE_VERSION$ac_delim +PACKAGE_STRING!$PACKAGE_STRING$ac_delim +PACKAGE_BUGREPORT!$PACKAGE_BUGREPORT$ac_delim +exec_prefix!$exec_prefix$ac_delim +prefix!$prefix$ac_delim +program_transform_name!$program_transform_name$ac_delim +bindir!$bindir$ac_delim +sbindir!$sbindir$ac_delim +libexecdir!$libexecdir$ac_delim +datarootdir!$datarootdir$ac_delim +datadir!$datadir$ac_delim +sysconfdir!$sysconfdir$ac_delim +sharedstatedir!$sharedstatedir$ac_delim +localstatedir!$localstatedir$ac_delim +includedir!$includedir$ac_delim +oldincludedir!$oldincludedir$ac_delim +docdir!$docdir$ac_delim +infodir!$infodir$ac_delim +htmldir!$htmldir$ac_delim +dvidir!$dvidir$ac_delim +pdfdir!$pdfdir$ac_delim +psdir!$psdir$ac_delim +libdir!$libdir$ac_delim +localedir!$localedir$ac_delim +mandir!$mandir$ac_delim +DEFS!$DEFS$ac_delim +ECHO_C!$ECHO_C$ac_delim +ECHO_N!$ECHO_N$ac_delim +ECHO_T!$ECHO_T$ac_delim +LIBS!$LIBS$ac_delim +build_alias!$build_alias$ac_delim +host_alias!$host_alias$ac_delim +target_alias!$target_alias$ac_delim +CC!$CC$ac_delim +CFLAGS!$CFLAGS$ac_delim +LDFLAGS!$LDFLAGS$ac_delim +CPPFLAGS!$CPPFLAGS$ac_delim +ac_ct_CC!$ac_ct_CC$ac_delim +EXEEXT!$EXEEXT$ac_delim +OBJEXT!$OBJEXT$ac_delim +CPP!$CPP$ac_delim +GREP!$GREP$ac_delim +EGREP!$EGREP$ac_delim +LIBOBJS!$LIBOBJS$ac_delim +LTLIBOBJS!$LTLIBOBJS$ac_delim +_ACEOF + + if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 49; then + break + elif $ac_last_try; then + { { echo "$as_me:$LINENO: error: could not make $CONFIG_STATUS" >&5 +echo "$as_me: error: could not make $CONFIG_STATUS" >&2;} + { (exit 1); exit 1; }; } + else + ac_delim="$ac_delim!$ac_delim _$ac_delim!! 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Generated by config.status. */ + configure_input="Generated from "`IFS=: + echo $* | sed 's|^[^:]*/||;s|:[^:]*/|, |g'`" by configure." + if test x"$ac_file" != x-; then + configure_input="$ac_file. $configure_input" + { echo "$as_me:$LINENO: creating $ac_file" >&5 +echo "$as_me: creating $ac_file" >&6;} + fi + + case $ac_tag in + *:-:* | *:-) cat >"$tmp/stdin";; + esac + ;; + esac + + ac_dir=`$as_dirname -- "$ac_file" || +$as_expr X"$ac_file" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ + X"$ac_file" : 'X\(//\)[^/]' \| \ + X"$ac_file" : 'X\(//\)$' \| \ + X"$ac_file" : 'X\(/\)' \| . 2>/dev/null || +echo X"$ac_file" | + sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ + s//\1/ + q + } + /^X\(\/\/\)[^/].*/{ + s//\1/ + q + } + /^X\(\/\/\)$/{ + s//\1/ + q + } + /^X\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + { as_dir="$ac_dir" + case $as_dir in #( + -*) as_dir=./$as_dir;; + esac + test -d "$as_dir" || { $as_mkdir_p && mkdir -p "$as_dir"; } || { + as_dirs= + while :; do + case $as_dir in #( + *\'*) as_qdir=`echo "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #( + *) as_qdir=$as_dir;; + esac + as_dirs="'$as_qdir' $as_dirs" + as_dir=`$as_dirname -- "$as_dir" || +$as_expr X"$as_dir" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ + X"$as_dir" : 'X\(//\)[^/]' \| \ + X"$as_dir" : 'X\(//\)$' \| \ + X"$as_dir" : 'X\(/\)' \| . 2>/dev/null || +echo X"$as_dir" | + sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ + s//\1/ + q + } + /^X\(\/\/\)[^/].*/{ + s//\1/ + q + } + /^X\(\/\/\)$/{ + s//\1/ + q + } + /^X\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + test -d "$as_dir" && break + done + test -z "$as_dirs" || eval "mkdir $as_dirs" + } || test -d "$as_dir" || { { echo "$as_me:$LINENO: error: cannot create directory $as_dir" >&5 +echo "$as_me: error: cannot create directory $as_dir" >&2;} + { (exit 1); exit 1; }; }; } + ac_builddir=. + +case "$ac_dir" in +.) ac_dir_suffix= ac_top_builddir_sub=. ac_top_build_prefix= ;; +*) + ac_dir_suffix=/`echo "$ac_dir" | sed 's,^\.[\\/],,'` + # A ".." for each directory in $ac_dir_suffix. + ac_top_builddir_sub=`echo "$ac_dir_suffix" | sed 's,/[^\\/]*,/..,g;s,/,,'` + case $ac_top_builddir_sub in + "") ac_top_builddir_sub=. ac_top_build_prefix= ;; + *) ac_top_build_prefix=$ac_top_builddir_sub/ ;; + esac ;; +esac +ac_abs_top_builddir=$ac_pwd +ac_abs_builddir=$ac_pwd$ac_dir_suffix +# for backward compatibility: +ac_top_builddir=$ac_top_build_prefix + +case $srcdir in + .) # We are building in place. + ac_srcdir=. + ac_top_srcdir=$ac_top_builddir_sub + ac_abs_top_srcdir=$ac_pwd ;; + [\\/]* | ?:[\\/]* ) # Absolute name. + ac_srcdir=$srcdir$ac_dir_suffix; + ac_top_srcdir=$srcdir + ac_abs_top_srcdir=$srcdir ;; + *) # Relative name. + ac_srcdir=$ac_top_build_prefix$srcdir$ac_dir_suffix + ac_top_srcdir=$ac_top_build_prefix$srcdir + ac_abs_top_srcdir=$ac_pwd/$srcdir ;; +esac +ac_abs_srcdir=$ac_abs_top_srcdir$ac_dir_suffix + + + case $ac_mode in + :F) + # + # CONFIG_FILE + # + +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF +# If the template does not know about datarootdir, expand it. +# FIXME: This hack should be removed a few years after 2.60. +ac_datarootdir_hack=; ac_datarootdir_seen= + +case `sed -n '/datarootdir/ { + p + q +} +/@datadir@/p +/@docdir@/p +/@infodir@/p +/@localedir@/p +/@mandir@/p +' $ac_file_inputs` in +*datarootdir*) ac_datarootdir_seen=yes;; +*@datadir@*|*@docdir@*|*@infodir@*|*@localedir@*|*@mandir@*) + { echo "$as_me:$LINENO: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&5 +echo "$as_me: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&2;} +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF + ac_datarootdir_hack=' + s&@datadir@&$datadir&g + s&@docdir@&$docdir&g + s&@infodir@&$infodir&g + s&@localedir@&$localedir&g + s&@mandir@&$mandir&g + s&\\\${datarootdir}&$datarootdir&g' ;; +esac +_ACEOF + +# Neutralize VPATH when `$srcdir' = `.'. +# Shell code in configure.ac might set extrasub. +# FIXME: do we really want to maintain this feature? +cat >>$CONFIG_STATUS <<_ACEOF + sed "$ac_vpsub +$extrasub +_ACEOF +cat >>$CONFIG_STATUS <<\_ACEOF +:t +/@[a-zA-Z_][a-zA-Z_0-9]*@/!b +s&@configure_input@&$configure_input&;t t +s&@top_builddir@&$ac_top_builddir_sub&;t t +s&@srcdir@&$ac_srcdir&;t t +s&@abs_srcdir@&$ac_abs_srcdir&;t t +s&@top_srcdir@&$ac_top_srcdir&;t t +s&@abs_top_srcdir@&$ac_abs_top_srcdir&;t t +s&@builddir@&$ac_builddir&;t t +s&@abs_builddir@&$ac_abs_builddir&;t t +s&@abs_top_builddir@&$ac_abs_top_builddir&;t t +$ac_datarootdir_hack +" $ac_file_inputs | sed -f "$tmp/subs-1.sed" >$tmp/out + +test -z "$ac_datarootdir_hack$ac_datarootdir_seen" && + { ac_out=`sed -n '/\${datarootdir}/p' "$tmp/out"`; test -n "$ac_out"; } && + { ac_out=`sed -n '/^[ ]*datarootdir[ ]*:*=/p' "$tmp/out"`; test -z "$ac_out"; } && + { echo "$as_me:$LINENO: WARNING: $ac_file contains a reference to the variable \`datarootdir' +which seems to be undefined. Please make sure it is defined." >&5 +echo "$as_me: WARNING: $ac_file contains a reference to the variable \`datarootdir' +which seems to be undefined. Please make sure it is defined." >&2;} + + rm -f "$tmp/stdin" + case $ac_file in + -) cat "$tmp/out"; rm -f "$tmp/out";; + *) rm -f "$ac_file"; mv "$tmp/out" $ac_file;; + esac + ;; + :H) + # + # CONFIG_HEADER + # +_ACEOF + +# Transform confdefs.h into a sed script `conftest.defines', that +# substitutes the proper values into config.h.in to produce config.h. +rm -f conftest.defines conftest.tail +# First, append a space to every undef/define line, to ease matching. +echo 's/$/ /' >conftest.defines +# Then, protect against being on the right side of a sed subst, or in +# an unquoted here document, in config.status. If some macros were +# called several times there might be several #defines for the same +# symbol, which is useless. But do not sort them, since the last +# AC_DEFINE must be honored. +ac_word_re=[_$as_cr_Letters][_$as_cr_alnum]* +# These sed commands are passed to sed as "A NAME B PARAMS C VALUE D", where +# NAME is the cpp macro being defined, VALUE is the value it is being given. +# PARAMS is the parameter list in the macro definition--in most cases, it's +# just an empty string. +ac_dA='s,^\\([ #]*\\)[^ ]*\\([ ]*' +ac_dB='\\)[ (].*,\\1define\\2' +ac_dC=' ' +ac_dD=' ,' + +uniq confdefs.h | + sed -n ' + t rset + :rset + s/^[ ]*#[ ]*define[ ][ ]*// + t ok + d + :ok + s/[\\&,]/\\&/g + s/^\('"$ac_word_re"'\)\(([^()]*)\)[ ]*\(.*\)/ '"$ac_dA"'\1'"$ac_dB"'\2'"${ac_dC}"'\3'"$ac_dD"'/p + s/^\('"$ac_word_re"'\)[ ]*\(.*\)/'"$ac_dA"'\1'"$ac_dB$ac_dC"'\2'"$ac_dD"'/p + ' >>conftest.defines + +# Remove the space that was appended to ease matching. +# Then replace #undef with comments. This is necessary, for +# example, in the case of _POSIX_SOURCE, which is predefined and required +# on some systems where configure will not decide to define it. +# (The regexp can be short, since the line contains either #define or #undef.) +echo 's/ $// +s,^[ #]*u.*,/* & */,' >>conftest.defines + +# Break up conftest.defines: +ac_max_sed_lines=50 + +# First sed command is: sed -f defines.sed $ac_file_inputs >"$tmp/out1" +# Second one is: sed -f defines.sed "$tmp/out1" >"$tmp/out2" +# Third one will be: sed -f defines.sed "$tmp/out2" >"$tmp/out1" +# et cetera. +ac_in='$ac_file_inputs' +ac_out='"$tmp/out1"' +ac_nxt='"$tmp/out2"' + +while : +do + # Write a here document: + cat >>$CONFIG_STATUS <<_ACEOF + # First, check the format of the line: + cat >"\$tmp/defines.sed" <<\\CEOF +/^[ ]*#[ ]*undef[ ][ ]*$ac_word_re[ ]*\$/b def +/^[ ]*#[ ]*define[ ][ ]*$ac_word_re[( ]/b def +b +:def +_ACEOF + sed ${ac_max_sed_lines}q conftest.defines >>$CONFIG_STATUS + echo 'CEOF + sed -f "$tmp/defines.sed"' "$ac_in >$ac_out" >>$CONFIG_STATUS + ac_in=$ac_out; ac_out=$ac_nxt; ac_nxt=$ac_in + sed 1,${ac_max_sed_lines}d conftest.defines >conftest.tail + grep . conftest.tail >/dev/null || break + rm -f conftest.defines + mv conftest.tail conftest.defines +done +rm -f conftest.defines conftest.tail + +echo "ac_result=$ac_in" >>$CONFIG_STATUS +cat >>$CONFIG_STATUS <<\_ACEOF + if test x"$ac_file" != x-; then + echo "/* $configure_input */" >"$tmp/config.h" + cat "$ac_result" >>"$tmp/config.h" + if diff $ac_file "$tmp/config.h" >/dev/null 2>&1; then + { echo "$as_me:$LINENO: $ac_file is unchanged" >&5 +echo "$as_me: $ac_file is unchanged" >&6;} + else + rm -f $ac_file + mv "$tmp/config.h" $ac_file + fi + else + echo "/* $configure_input */" + cat "$ac_result" + fi + rm -f "$tmp/out12" + ;; + + + esac + +done # for ac_tag + + +{ (exit 0); exit 0; } +_ACEOF +chmod +x $CONFIG_STATUS +ac_clean_files=$ac_clean_files_save + + +# configure is writing to config.log, and then calls config.status. +# config.status does its own redirection, appending to config.log. +# Unfortunately, on DOS this fails, as config.log is still kept open +# by configure, so config.status won't be able to write to it; its +# output is simply discarded. So we exec the FD to /dev/null, +# effectively closing config.log, so it can be properly (re)opened and +# appended to by config.status. When coming back to configure, we +# need to make the FD available again. +if test "$no_create" != yes; then + ac_cs_success=: + ac_config_status_args= + test "$silent" = yes && + ac_config_status_args="$ac_config_status_args --quiet" + exec 5>/dev/null + $SHELL $CONFIG_STATUS $ac_config_status_args || ac_cs_success=false + exec 5>>config.log + # Use ||, not &&, to avoid exiting from the if with $? = 1, which + # would make configure fail if this is the last instruction. + $ac_cs_success || { (exit 1); exit 1; } +fi + diff --git a/support/packihx/configure.in b/support/packihx/configure.in new file mode 100644 index 0000000..aa26a0d --- /dev/null +++ b/support/packihx/configure.in @@ -0,0 +1,47 @@ +AC_INIT(packihx.c) +AC_CONFIG_HEADER(config.h:config_in.h) +AC_PREREQ(2.60) + +AC_PROG_CC + +AC_CHECK_SIZEOF(char, 1) +AC_CHECK_SIZEOF(short, 2) +AC_CHECK_SIZEOF(int, 4) +AC_CHECK_SIZEOF(long, 4) +AC_CHECK_SIZEOF(long long, 8) + +type_name() +{ + if expr "$ac_cv_sizeof_char" '>=' "$1" >/dev/null; then + echo "char" + exit + fi + if expr "$ac_cv_sizeof_short" '>=' "$1" >/dev/null; then + echo "short" + exit + fi + if expr "$ac_cv_sizeof_int" '>=' "$1" >/dev/null; then + echo "int" + exit + fi + if expr "$ac_cv_sizeof_long" '>=' "$1" >/dev/null; then + echo "long" + exit + fi + if expr "$ac_cv_sizeof_long_long" '>=' "$1" >/dev/null; then + echo "long long" + exit + fi + echo "long long" +} + +AC_MSG_CHECKING(type name for byte) +TYPE_BYTE=`type_name 1` +AC_MSG_RESULT($TYPE_BYTE) +AC_MSG_CHECKING(type name for word) +TYPE_WORD=`type_name 2` +AC_MSG_RESULT($TYPE_WORD) +AC_DEFINE_UNQUOTED(TYPE_BYTE, $TYPE_BYTE) +AC_DEFINE_UNQUOTED(TYPE_WORD, $TYPE_WORD) + +AC_OUTPUT(Makefile) diff --git a/support/packihx/packihx.c b/support/packihx/packihx.c new file mode 100644 index 0000000..5e41925 --- /dev/null +++ b/support/packihx/packihx.c @@ -0,0 +1,428 @@ +/*----------------------------------------------------------------------- + * packihx.c: + * + * utility to pack an Intel HEX format file by removing redundant + * extended offset records and accumulating data records up to + * OUTPUT_CHUNK (currently 16) bytes. + * + * Released to the public domain 10/16/2000 Kevin Vigor. + */ + +#include +#include +#include +#include +#include + +#if defined(_MSC_VER) || defined(__BORLANDC__) + +typedef unsigned char Uint8 ; +typedef unsigned Uint16 ; + +#else + +#include "config.h" +#endif + +/* A cooked line of input. */ +typedef struct _Line +{ + Uint8 len; /* length of data portion of record. */ + Uint16 offset; + Uint8 type; + Uint8 *data; + Uint8 checksum; +} Line; + +/* Largest expected line of raw input. */ +#define MAX_INPUT_RAW 128 +/* Largest expected cooked data portion of an input line. */ +#define MAX_INPUT_COOKED (MAX_INPUT_RAW / 2) + +/* Globals: current input & output line numbers. */ +int lineno = 0; +int outlineno = 0; + +/* Convert hex digit to numeric value 0 - 15; assumes input is a + * valid digit (i.e. passes isxdigit()). + */ +static Uint8 hexDigit(const unsigned char c) +{ + if (isdigit(c)) + { + return (Uint8)(c - '0'); + } + else + { + return (Uint8)((islower(c) ? toupper(c) : c) - 'A' + 10); + } +} + +/* Convert two hex digits from cp to a byte value. */ +static int getHexByte(const char *cp, Uint8 *byte) +{ + if (cp && cp[0] && isxdigit(cp[0]) && cp[1] && isxdigit(cp[1])) + { + *byte = (hexDigit(cp[0]) << 4) + hexDigit(cp[1]); + } + else + { + return -1; + } + return 0; +} + +/* Convert four hex digits from cp to a 2 byte value. */ +static int getHexWord(const char *cp, Uint16 *word) +{ + Uint8 byte1, byte2; + + if (getHexByte(cp, &byte1) || getHexByte(cp + 2, &byte2)) + { + return -1; + } + *word = (byte1 << 8) + byte2; + return 0; +} + +/* Return a single cooked line of input from the passed file handle. */ +Line *readLine(FILE *inFile) +{ + static char buffer[MAX_INPUT_RAW]; + const char *bp; + Line *line; + unsigned i; + + line = (Line *)malloc(sizeof(Line)); + if (!line) + { + fprintf(stderr, "packihx: no memory!\n"); + return NULL; + } + + do + { + if (!fgets(buffer, MAX_INPUT_RAW, inFile)) + { + return NULL; + } + ++lineno; + + if (!buffer[0] || buffer[0] == '\r' || buffer[0] == '\n') + { + /* Empty input line. */ + return NULL; + } + } while (buffer[0] != ':'); + + bp = buffer; + bp++; /* Skip leading : */ + + if (getHexByte(bp, &line->len)) + { + fprintf(stderr, "packihx: can't read line length @ line %d\n", + lineno); + free(line); + return NULL; + } + bp += 2; /* Two digits consumed. */ + + if (line->len > MAX_INPUT_COOKED) + { + fprintf(stderr, "packihx: line length %X too long @ line %d\n", + (int)line->len, lineno); + free(line); + return NULL; + } + + if (getHexWord(bp, &line->offset)) + { + fprintf(stderr, "packihx: can't read line offset @ line %d\n", + lineno); + free(line); + return NULL; + } + bp += 4; /* Four digits consumed. */ + + if (getHexByte(bp, &line->type)) + { + fprintf(stderr, "packihx: can't read record type @ line %d\n", + lineno); + free(line); + return NULL; + } + bp += 2; /* Two digits consumed. */ + + /* Hack - always allocate something, even if len is zero. + * Avoids special case for len == 0. */ + line->data = (Uint8 *)malloc(line->len ? line->len : 1); + if (!line->data) + { + free(line); + fprintf(stderr, "packihx: no memory!\n"); + return NULL; + } + + for (i = 0; i < (unsigned)line->len; i++) + { + if (getHexByte(bp, &(line->data[i]))) + { + fprintf(stderr, + "packihx: can't read data byte %u of %u @ line %d\n", + i, (unsigned) line->len, lineno); + free(line->data); + free(line); + return NULL; + } + bp += 2; /* Two digits consumed. */ + } + + if (getHexByte(bp, &line->checksum)) + { + fprintf(stderr, "packihx: can't read checksum @ line %d\n", + lineno); + free(line->data); + free(line); + return NULL; + } + /* bp += 2; */ /* Two digits consumed. */ + + return line; +} + +/* Compute the checksum of a line. */ +Uint16 lineChecksum(unsigned len, unsigned offset, unsigned type, + const Uint8 *data) +{ + Uint16 checksum; + unsigned i; + + checksum = len + type + (offset >> 8) + + (offset & 0xff); + + for (i = 0; i < len; i++) + { + checksum += data[i]; + } + + checksum &= 0xff; + if (checksum) + { + checksum = 0x100 - checksum; + } + return checksum; +} + +/* Ensure that the checksum of a line matches the expected value. */ +int validateChecksum(Line *line) +{ + Uint16 checksum; + + checksum = lineChecksum(line->len, line->offset, line->type, line->data); + + if (checksum != line->checksum) + { + fprintf(stderr, "packihx: invalid checksum %X (want %X) @ line %d\n", + (unsigned)(line->checksum), (unsigned)checksum, + lineno); + return -1; + } + + return 0; +} + +/* Write a single record line. */ +int writeRecord(unsigned len, unsigned offset, unsigned type, + const Uint8 *data) +{ + unsigned i; + + if (printf(":%02X%04X%02X", len, offset, type) == EOF) + { + return -1; + } + + for (i = 0; i < len; i++) + { + if (printf("%02X", data[i]) == EOF) + { + return -1; + } + } + + if (printf("%02X\n", lineChecksum(len, offset, type, data)) == EOF) + { + return -1; + } + outlineno++; + return 0; +} + +#define OUTPUT_CHUNK 16 +static unsigned pendingLen = 0; +static unsigned pendingOffset = 0; +static Uint8 pending[MAX_INPUT_COOKED + OUTPUT_CHUNK]; + +/* Buffer up a data record. */ +int bufferOutput(Line *line) +{ + unsigned offset = 0; + int rc = 0; + + /* Stick the data onto any pending data. */ + assert(pendingLen < OUTPUT_CHUNK); + memcpy(&pending[pendingLen], line->data, line->len); + pendingLen += line->len; + + /* Write it out untill we have less than an OUTPUT_CHUNK left. */ + while (!rc && pendingLen >= OUTPUT_CHUNK) + { + rc = writeRecord(OUTPUT_CHUNK, pendingOffset, 0, &pending[offset]); + offset += OUTPUT_CHUNK; + pendingOffset += OUTPUT_CHUNK; + pendingLen -= OUTPUT_CHUNK; + } + + /* Copy any remaining bits back to the beginning of the buffer. */ + if (pendingLen) + { + memmove(pending, &pending[offset], pendingLen); + } + return rc; +} + +/* Write out any pending data. */ +int flushPendingData(void) +{ + int rc = 0; + + assert(pendingLen < OUTPUT_CHUNK); + + if (pendingLen) + { + rc = writeRecord(pendingLen, pendingOffset, 0, pending); + pendingLen = pendingOffset = 0; + } + return rc; +} + +/* Write an arbitrary line of output (buffering if possible) */ +int writeLine(Line *line) +{ + static Uint16 lastExtendedOffset = 0; + int rc; + + if (line->type) + { + /* Not a data record. */ + if (line->type == 4) + { + Uint16 offset; + + /* Extended offset record. */ + if (line->len != 2) + { + fprintf(stderr, + "packihx: invalid extended offset record @ line %d\n", + lineno); + return -1; + } + + offset = (line->data[0] << 8) + line->data[1]; + + if (offset == lastExtendedOffset) + { + /* We can simply skip this line. */ + return 0; + } + else + { + lastExtendedOffset = offset; + } + } + + if (flushPendingData()) + { + return -1; + } + + /* Write the line as is. */ + rc = writeRecord(line->len, line->offset, line->type, line->data); + } + else + { + if (pendingOffset + pendingLen != (unsigned)line->offset) + { + /* This line is not contigous with the last one. Dump pending. */ + if (flushPendingData()) + { + return -1; + } + pendingOffset = line->offset; + } + rc = bufferOutput(line); + } + return rc; +} + +int main(int argc, char *argv[]) +{ + FILE *inFile; + Line *line; + int closeFile; + int rc = 0; + + if (argc > 1) + { + inFile = fopen(argv[1], "rt"); + if (!inFile) + { + fprintf(stderr, "packihx: cannot open %s\n", + argv[1]); + return 1; + } + closeFile = 1; + } + else + { + inFile = stdin; + closeFile = 0; + } + + while (!rc && ((line = readLine(inFile)) != NULL)) + { + rc = validateChecksum(line); + + if (!rc) + { + rc = writeLine(line); + } + + free(line->data); + free(line); + } + + if (!rc && !feof(inFile)) + { + /* readLine must have failed for some reason. */ + fprintf(stderr, "packihx: aborting after %d lines.\n", lineno); + rc = 1; + } + + if (!rc) + { + /* Just in case there's something still pending. */ + rc = flushPendingData(); + } + + if (!rc) + { + fprintf(stderr, "packihx: read %d lines, wrote %d: OK.\n", lineno, outlineno); + } + + if (closeFile) + { + fclose(inFile); + } + return rc; +} diff --git a/support/regression/COVERAGE b/support/regression/COVERAGE new file mode 100644 index 0000000..e06e497 --- /dev/null +++ b/support/regression/COVERAGE @@ -0,0 +1,180 @@ +Primary goal: good coverage of the backend code generators. The +following list was derived from the token list in SDCC.lex + +Follows is a list of tokens and the test case that covers them. If no +case is listed then the token is not yet covered. Special cases are +listed under the token. If the token is listed as covered then the +special cases are also covered. + +The cases generally assume that on stack local variables and +parameters are accessed using the same methods and hence doesn't test +stack based parameters. + +Todo +Operations: + Shifts: + Common cases: + For byte multiples (8, 16...) + For more than the word size + For negative shifts + For shift of 1 + >>= + <<= + >> + << + + Comparison: + Common cases: + Around zero + Constants on either side (reversal) + <= + >= + == + != + < + > + + Basic arithmetic: + Common cases: + For small constants (<3) + ++ + -- + += + -= + - + + + + Mul/Div/Mod arithmetic: + Common cases: + For powers of 2 + *= + /= + %= + * + / + % + + Bitwise operations: + &= + ^= + |= + & + ~ + ^ + | + + Logical operations: + && + || + ! + + Misc: + -> + Test that members are not cached across +function calls + = + . + ? + casts + Test sign extension + arrays + Test a[a[const]] + pointers + + Language features (untestable): + ; + { + } + , + : + ( + ) + [ + ] + +Keywords: + Specificers: + const + register + signed + static + unsigned + volatile + + Conditional: + break + case + default + else + goto + if + switch + + Types: + char + double + float + int + long + short + void + + Iterative: + continue + do + for + while + + Language features: + enum + extern + sizeof + struct + typedef + union + + Misc: + return + + Unknown: + auto + interrupt + +Optional keywords: + banked + bit + flash + code + critical + near + data + eeprom + idata + nonbanked + pdata + reentrant + sbit + sfr + using + sram + xdata + far + _code + _flash + _eeprom + _generic + _idata + _data + _near + _pdata + _sram + _xdata + +Language features: + va args (...) + +Optional: + Constants: + Hex, dec, oct + Character constants 'x' + Specials '\n', '\0', ... diff --git a/support/regression/FAILURES b/support/regression/FAILURES new file mode 100644 index 0000000..8642ad0 --- /dev/null +++ b/support/regression/FAILURES @@ -0,0 +1,7 @@ +ASSERT(result == (char)((char)-1560000000 << 1)); + +Complains: +gen/z80/shifts/shifts_attr_volatile_storage_none_type_char_vals_-1560000000.c(61):warning *** constant is out of range compare operation + +despite the cast. + diff --git a/support/regression/HTMLgen.py b/support/regression/HTMLgen.py new file mode 100644 index 0000000..5f4bffb --- /dev/null +++ b/support/regression/HTMLgen.py @@ -0,0 +1,207 @@ +#'$Id: HTMLgen.py 2583 2003-05-04 08:46:12Z bernhardheld $' + +# COPYRIGHT (C) 1996-9 ROBIN FRIEDRICH email:Robin.Friedrich@pdq.net +# Permission to use, copy, modify, and distribute this software and +# its documentation for any purpose and without fee is hereby granted, +# provided that the above copyright notice appear in all copies and +# that both that copyright notice and this permission notice appear in +# supporting documentation. +# THE AUTHOR DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS +# SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +# FITNESS, IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY +# SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER +# RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +# CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN +# CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + +# Stripped down by Michael Hope to just support +# template documents. + +"""A class library for the generation of HTML documents. + +Each HTML tag type has a supporting class which is responsible for +emitting itself as valid HTML formatted text. An attempt is made to +provide classes for newer HTML 3.2 and proposed tag elements. The +definitive reference for HTML tag elements can be found at +[W3C]. Also, I used the HTML book by Musciano and +Kennedy from [O Reilly] (2nd. Ed.) as the guiding reference. + +The Document classes are container objects which act as a focal point +to populate all the contents of a particular web page. It also can +enforce consistent document formating according to the guidelines from +the [Yale Web Style Manual]. + +Features include customization of document template graphics / colors +through use of resource files, minimizing the need for modifying or +subclassing from the module source code. Support for tables, frames, +forms (persistent and otherwise) and client-side imagemaps are included. + +A newer implementation for the Table support is now included, +TableLite(). In support of this there are new tag classes TD, TH, TR +and Caption. These class instances can be assembled in any way to +populate the TableLite container object. + +.. [W3C] http://www.W3.org/TR/REC-html32.html +.. [O Reilly] http://www.oreilly.com/catalog/html3/index.html +.. [Yale Web Style Manual] http://info.med.yale.edu/caim/manual/contents.html +""" + +import string, re, time, os + +__author__ = 'Robin Friedrich friedrich@pythonpros.com' +__version__ = '2.2.2' + +################# +# CLASS LIBRARY # +################# + +class StringTemplate: + """Generate documents based on a template and a substitution mapping. + + Must use Python 1.5 or newer. Uses re and the get method on dictionaries. + + Usage: + T = TemplateDocument('Xfile') + T.substitutions = {'month': ObjectY, 'town': 'Scarborough'} + T.write('Maine.html') + + A dictionary, or object that behaves like a dictionary, is assigned to the + *substitutions* attribute which has symbols as keys to objects. Upon every + occurance of these symbols surrounded by braces {} in the source template, + the corresponding value is converted to a string and substituted in the output. + + For example, source text which looks like: + I lost my heart at {town} Fair. + becomes: + I lost my heart at Scarborough Fair. + + Symbols in braces which do not correspond to a key in the dictionary remain + unchanged. + + An optional third argument to the class is a list or two strings to be + used as the delimiters instead of { } braces. They must be of the same + length; for example ['##+', '##'] is invalid. + """ + def __init__(self, template, substitutions=None, **kw): + self.delimiters = ['{', '}'] + self.__dict__.update(kw) + if len(self.delimiters) != 2: + raise ValueError("delimiter argument must be a pair of strings") + self.delimiter_width = len(self.delimiters[0]) + delimiters = map(re.escape, self.delimiters) + self.subpatstr = delimiters[0] + "[\w_]+" + delimiters[1] + self.subpat = re.compile(self.subpatstr) + self.substitutions = substitutions or {} + self.set_template(template) + + def set_template(self, template): + self.source = template + + def keys(self): + return self.substitutions.keys() + + def __setitem__(self, name, value): + self.substitutions[name] = value + + def __getitem__(self, name): + return self.substitutions[name] + + def __str__(self): + return self._sub(self.source) + + def _sub(self, source, subs=None): + """Perform source text substitutions. + + *source* string containing template source text + *subs* mapping of symbols to replacement values + """ + substitutions = subs or self.substitutions + dw = self.delimiter_width + i = 0 + output = [] + matched = self.subpat.search(source[i:]) + while matched: + a, b = matched.span() + output.append(source[i:i+a]) + # using the new get method for dicts in 1.5 + output.append(str(substitutions.get( + source[i+a+dw:i+b-dw], source[i+a:i+b]))) + i = i + b + matched = self.subpat.search(source[i:]) + else: + output.append(source[i:]) + return string.join(output, '') + + def write(self, filename = None): + """Emit the Document HTML to a file or standard output. + + Will not overwrite file is it exists and is textually the same. + In Unix you can use environment variables in filenames. + Will print to stdout if no argument given. + """ + if filename: + if os.path.exists(filename): + s = str(self) + if compare_s2f(s, filename): + f = open(filename, 'w') + f.write(str(self)) + f.close() + else: + f = open(filename, 'w') + f.write(str(self)) + f.close() + else: + import sys + sys.stdout.write(str(self)) + +class TemplateDocument(StringTemplate): + """Generate documents based on a template and a substitution mapping. + + Must use Python 1.5 or newer. Uses re and the get method on dictionaries. + + Usage: + T = TemplateDocument('Xfile') + T.substitutions = {'month': ObjectY, 'town': 'Scarborough'} + T.write('Maine.html') + + A dictionary, or object that behaves like a dictionary, is assigned to the + *substitutions* attribute which has symbols as keys to objects. Upon every + occurance of these symbols surrounded by braces {} in the source template, + the corresponding value is converted to a string and substituted in the output. + + For example, source text which looks like: + I lost my heart at {town} Fair. + becomes: + I lost my heart at Scarborough Fair. + + Symbols in braces which do not correspond to a key in the dictionary remain + unchanged. + + An optional third argument to the class is a list or two strings to be + used as the delimiters instead of { } braces. They must be of the same + length; for example ['##+', '##'] is invalid. + """ + def set_template(self, template): + f = open(template) + self.source = f.read() + f.close() + +def compare_s2f(s, f2): + """Helper to compare a string to a file, return 0 if they are equal.""" + + BUFSIZE = 8192 + i = 0 + fp2 = open(f2) + try: + while 1: + try: + b1 = s[i: i + BUFSIZE] + i = i + BUFSIZE + except IndexError: + b1 = '' + b2 = fp2.read(BUFSIZE) + if not b1 and not b2: return 0 + c = cmp(b1, b2) + if c: return c + finally: + fp2.close() diff --git a/support/regression/HTMLgen.pyc b/support/regression/HTMLgen.pyc new file mode 100644 index 0000000000000000000000000000000000000000..037665ccdf3701ee5aaa8280bd5bc5483c6fcb6d GIT binary patch literal 7667 zcmeHMO_LMH8Sc?8`ym$d;TVja*iCR{1zt-w#7PP}wgE3@V}o6@OV(aYDWjQ|G%%VG z(=CL|?j<;tOKz#kDftIErc%ivl^>CRl4DMJo_A&>0nQUnpZBAi!M~5x zcmDO44?C+fK!-u9JN!5T&A`=f?_Rumr>XVj#AX|MOOJ#Fj3?&mWZ6C4ndloM z8^%GJQIh(nCQVHQGw0br-~L?tCQg#c9o@K)MoqmLHP6uwvH_zwq7|n?!RnA#e_Zau zROcXv{#ojR7(1r3&Rr8as|&LSp(DKjGKWE;hgqDuy35cRj*`F`9VCfxBLQwLH#^Y7 z06Q3BMy|)EgV&yE>Mf9hqO?NYq}U(W3CnD3xpImQ?g4g=q6cA^<)Q>wRyvska$=`o zfI7!+e-!`_yI`~JCg|M=(ovAyfwtF7;6^}=j?*w1ahFHdWrO&eDJ&~Q0waT==+n!C zApmD}3$i6yZownZM!h~ahsuFoHlpa=I5BoZ53u$NyAOgP_77WJ8X$pCqQz9S(57>yyRPMF&@rK^Hj>oT4*sH;i0RmKZ`Ud7LB1xQD7r=>Z z?W&n{Q2mvK0dK^r|c`Fc3g{D-`V7aO5^=4Cxv+2Hb!%MB!csy?IUTkK0ueIa1 z{LQOx_1z%3c%jKZGJED)b4#*Z+^rdAgH{;0Ajx_yS=frx$UK~_{%%ZG++(1>IWSRk z0_ZkPGy<`B&>9GGTa_yn)Nb1I2(^CJf$rDx*hD$Qp$00-{zt=!>t`uKl%-r2F&jkLtZb}*Nq1jAH=Wd+7tdnJqxAtoV1NCR{#+vHR~vfWW#beB>)TjyIukeuIHmHXHQi>t#Kaa^L|7R(< zN)AW%(^jx7`#ROA2nwW;jofhL$}PPHqnU>Rb*Dgz z6d+~&5Fyc`!a}xzI7ra}+^4G_>4Q>>CWH1w59o_1Y6>i9i(DmACMNB<{(F+i%AL@+ z*Uz4Pa~+Ox_U!r{Zg8AR#a7riTtF;h^y1%7@z{T&LA8l;wO3R7O0_+cC?)zO*Kw9pPBwuzy3 z8wOEoG>lNPIr6_ZcC<1!Nml)m9=8eK&D~K9Pl>e0apd|k6%klg=0<248wNuI^MUuM zGYlM@(=Fo-J~Bk8lu5-Gcchp!jpo*^am2WG6$wPv>ZL&p_!Q57kqwpfN!q8T4Ln8T zh>=zwKH0KS7{1jR#YtrHmi(O?YGrxcllNA6xM=03hj?R=2U;w(aaL&}ixviBG2d?A z0&V*}^74*)$GnsByyTtsUP3RV39IKSXHrG%IzfR07x$g}bF(qig1y2hQa(1ge5T|~ zE1yjL6KDcFmeZ6Ml3Ml57{V7ky2InA7z)=ZHW<%E9AWn~r&FK|fv23fwtB8|oOA$l zs0L2Z@%=gVxFPUBr6gn*>P-2j2nB@!M4r=_=D&>QDGA(RjJ4Z<1A@(<-R|MFQoFJ- z|B5i2OG#jAPn~|k%ECmjLQZq`l~)WEjK#hsPgDj4&%5|q@vO`|<#`MrOP*o_IR7(@ z#R=QMyML05NaMS#Egk}0UEXdF=6F(edM^soEu=^h$HpAF`*}yn*H^AN9YFu^}G&8X6>N1i@8r3BM=31-0y* z@LsNM*6QA?wc|x_tkSrE`5#yU&=8K$p-kU`m+T7+0g||S0&W)-vy!>WpuAmh&zIlH*Ck=idqc`K)YVlgWshq@It8frBh zUogPiE8J%!IPtQAMocZLB@*09^{q61s3+M-&dR)^FzJIh&r;q{0kC;2mk2B#2O~(V<1R#-RU|!JY^Ad$0>bgl2G5p~Fe|cxa@5dtU6ccT0b`+x ze-2}UL0N4j`m#>I6+zox=*pT5h?dV?Nho3!>4m7wO#$_ZEg?=p=gNd8>A%b7XKXH@ zc^be!!Psx{*jLb~CFL!9FM4Z$@lpIeQDgf;ZPjbAGARoI8Vi*Z9SG4{E^F|*EU&mY zLZ7i~9?P7+_KNb>)>ap)-?dYY zQDUb&zgMUWF(yAuG*|Fg@|{1&!)Lz5NqvFmZ)P(4{QUj={Qdm=UED}KKYxGc`I~Wq zr3C*<;%3}NP+>ksdM@%Wj@?oYw^8CD_b&0ZIO#GL-E1&E`afnPhc`xLiIX`l5a#NT zpJIIOa4?-a3z4&f(BCjuj=qSEh}Tjb`V5)=du-lk!{9kvI~QI*z=uEKu?*G>uOZc2 z!NVFw)ch+ttf{5`gqlcYrOHd{o8PI2zfqIdS#m&M{#!=D%sRU0V*YM=S}h_m+^wtZ zi1P3gEwY+PYs&kQ)ikP@Wig@D%WJ%$K%u;rtw{B;EjJXng#gV%Qt3!7!mlVvw(q}& zx(3hgF772rZB0!6CEm6hJl5OGXs(+C|1rQcUM5x@RCTc2DltuOpqj;hh@|>$CV7+- z6Qp@m4EIrAG-IVvv4av1S1>3Gy_*f5YbE7fxpi%OYj3kC7`eTY@4FWyF?WX-B)b9^yaY$RqRx1>6f+?o*M1!zb)mi3K)qVy!PZpYU+;!1yh8iliTm zaBGaCT6tVVvBoQdcH74k 2001 +# +# This Makefile builds and runs the test suites under tests/ for each +# one of the supported ports located under ports/. The test suite +# results are summarised and individual test failures are logged. The +# expected result is a single line per port summarising the number of +# failures, test points, and test cases. The philosophy is that +# checked in code should always pass the suite with no failures, as +# then if there are failures then it is in the current developers code. +# +# Only the required suites are run. Changing sdcc causes all to be +# re-run. Changing one suite causes just that to be run. Changing +# one of the library files should cause all to re-run + +# Dependancies: +# * The sdcc-extra package, available from svn. +# o svn co https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc-extra +# o Provides the emulators +# * The gbdk-lib package from gbdk. +# o cvs -d cvs.gbdk.sourceforge.net:/cvsroot/gbdk co gbdk-lib +# o Proviles mul, div, and include files for the z80 tests. +# * python 1.5 or above +# * uCsim for the mcs51 port +# +# The paths below assume that sdcc, sdcc-extra, and gbdk-lib all reside in +# the same directory. + +# Old notes: +# Starting at the bottom +# Set of source test suites +# Each source suite is processesd producing multiple device specific test suites. +# Each device specific test suite is compiled. +# Each device specific test suite is run, and the output recorded. +# The output from each device specific test suite derrived from a source +# test suite are collated. + +# Uncomment this to show only errors and the summary. +# Comment this out for debugging. +.SILENT: + +CC = @CC@ +CFLAGS = @CFLAGS@ +CPPFLAGS = @CPPFLAGS@ -DNO_VARARGS + +# support VPATH: +VPATH = @srcdir@ +srcdir = @srcdir@ +top_srcdir = @top_srcdir@ +top_builddir = @top_builddir@ + +# All original tests live in TESTS_DIR and below +TESTS_DIR = $(srcdir)/tests +TESTS_NAME = $(TESTS_DIR) +# All suite results go in RESULTS_DIR +RESULTS_DIR = results +# All data relating to supported ports live in their own directory +# under PORTS_DIR. +PORTS_DIR = $(srcdir)/ports + +# Itermediate data directories +# Directory that generated cases and the related object code go. +CASES_DIR = gen + +# Script that takes a source test suite and generates the iterations +GENERATE_CASES = $(srcdir)/generate-cases.py + +# Magically generate the list of configured ports to test. +# Each directory under ports/ is used as a port name. Each port is tested. +# Each port must have a spec.mk which describes how to build the object +# files and how to run the emulator. +ALL_PORTS = $(filter-out .svn xa51 z80 gbz80 pic16 pic14 mcs51-common,$(notdir $(wildcard $(PORTS_DIR)/*))) + +# These ports will be cleaned with 'make clean' +CLEAN_PORTS = $(filter-out .svn mcs51-common,$(notdir $(wildcard $(PORTS_DIR)/*))) + +MAKE_LIBRARY = + +all: test-ports + +# Test all of the ports +test-ports: + for i in $(ALL_PORTS); do $(MAKE) make_library test-port PORT=$$i; done + +# Helper rule for testing the z80 port only +test-z80: + $(MAKE) test-port PORT=z80 + +# Helper rule for testing the z80 port only +test-gbz80: + $(MAKE) test-port PORT=gbz80 + +# Helper rule for testing the mcs51 port only +test-mcs51: test-mcs51-small test-mcs51-medium test-mcs51-large test-mcs51-stack-auto test-mcs51-xstack-auto + +test-mcs51-small: + $(MAKE) test-port PORT=mcs51-small + +test-mcs51-medium: + $(MAKE) test-port PORT=mcs51-medium + +test-mcs51-large: + $(MAKE) test-port PORT=mcs51-large + +test-mcs51-stack-auto: + $(MAKE) test-port PORT=mcs51-stack-auto + +test-mcs51-xstack-auto: + $(MAKE) make_library test-port PORT=mcs51-xstack-auto + +# Helper rule for testing the ds390 port only +test-ds390: + $(MAKE) test-port PORT=ds390 + +# Helper rule for testing the z80 port only(use ucSim simulator) +test-ucz80: + $(MAKE) test-port PORT=ucz80 + +# Helper rule for testing the hc08 port only(use ucSim simulator) +test-hc08: + $(MAKE) test-port PORT=hc08 + +# Helper rule for testing the xa51 port only(use ucSim simulator) +test-xa51: + $(MAKE) test-port PORT=xa51 + +# Helper rule for testing the pic16 port only(use gpsim simulator) +test-pic16: + $(MAKE) test-port PORT=pic16 + +# Helper rule for testing the pic14 port only(use gpsim simulator) +test-pic14: + $(MAKE) test-port PORT=pic14 + +### Helper rule for testing the host cc only +test-host: + $(MAKE) test-port PORT=host + +test-host2: + $(MAKE) test-port PORT=host + +# Begin per-port rules +# List of all of the known source test suites. +ALL_TESTS = $(shell find $(TESTS_DIR) -name "*.c" | sort) + +# Intermediate directory +PORT_CASES_DIR = $(CASES_DIR)/$(PORT) +PORT_RESULTS_DIR = $(RESULTS_DIR)/$(PORT) +# Each test generates a result log file +PORT_RESULTS = $(ALL_TESTS:$(TESTS_DIR)/%.c=$(PORT_RESULTS_DIR)/%.out) + +SDCC_EXTRA_DIR = $(top_builddir)/../sdcc-extra + +# Defaults. Override in spec.mk if required. +# Path to SDCC +ifdef SDCC_BIN_PATH + SDCC = $(SDCC_BIN_PATH)/sdcc +else + SDCC = $(top_builddir)/bin/sdcc + INC_DIR ?= $(top_srcdir)/device/include +endif +# Base flags. +SDCCFLAGS += --fverbose-asm -DNO_VARARGS +# Extension of object intermediate files +OBJEXT = .o +# Extension of files that can be run in the emulator +EXEEXT = .bin +# Currently unused. Extension to append to intermediate directories. +DIREXT = + +# Only include if we're in a per-port call. +ifdef PORT +include $(PORTS_DIR)/$(PORT)/spec.mk +endif + +make_library: $(MAKE_LIBRARY) + +SDCCFLAGS += -I$(srcdir)/fwk/include -I$(srcdir)/tests +ifdef INC_DIR + SDCCFLAGS += -I$(INC_DIR) +endif + +# List of intermediate files to keep. Pretty much keep everything as +# disk space is free. +.PRECIOUS: $(PORT_CASES_DIR)/% %$(OBJEXT) %$(EXEEXT) + +# Rule to generate the iterations of a test suite off the soure suite. +$(PORT_CASES_DIR)/%/iterations.stamp: $(TESTS_DIR)/%.c $(GENERATE_CASES) + echo Processing $(notdir $<) + rm -rf $(dir $@) + mkdir -p $(dir $@) + python $(GENERATE_CASES) $< $(dir $@) > /dev/null + touch $@ + +# Rule linking the combined results log to all of the files in the +# iteration directory. +$(PORT_RESULTS_DIR)/%.out: $(PORT_CASES_DIR)/%/iterations.stamp + $(MAKE) iterations PORT=$(PORT) CASES=$(dir $<) + +# Rule to summaries the results for one port after all of the tests +# have been run. +port-results: port-dirs $(PORT_RESULTS) + echo Summary for \'$(PORT)\': `cat $(PORT_RESULTS) | python $(srcdir)/collate-results.py` + echo + +port-dirs: + mkdir -p $(PORT_CASES_DIR) $(PORT_RESULTS_DIR) + echo Running $(PORT) regression tests + +test-port: port-results + +# Begin rules that process each iteration generated from the source +# test + +# List of all of the generated iteration source files. +SUB_CASES = $(sort $(wildcard $(CASES)*.c)) +# List of all the sub result logs generated from the iterations. +SUB_RESULTS = $(SUB_CASES:%.c=%.out) +# Overall target. Concatenation of all of the sub results. +RESULTS = $(CASES:$(CASES_DIR)/%/$(DIREXT)=$(RESULTS_DIR)/%.out) + +iterations: $(RESULTS) + +# Rule to generate the overall target from the sub results. +$(RESULTS): $(SUB_RESULTS) + cat $(SUB_RESULTS) > $@ + +# The remainder of the rules are in $PORT/spec.mk. The port needs to +# be able to turn an iterated test suite into a sub result, normally +# by: +# 1. Compile the required library files +# 2. Compile this test suite. +# 3. Link 1, 2, and any required stdlib into an executable. +# 4. Run the executable inside an emulator, and capture the text +# output into %.out. +# +# The emulator must exit when main() returns. + +# BeginGeneric rules + +clean: + rm -rf $(CASES_DIR) $(RESULTS_DIR) *.pyc + for i in $(CLEAN_PORTS); do $(MAKE) -f $(PORTS_DIR)/$$i/spec.mk _clean PORTS_DIR=$(PORTS_DIR) PORT=$$i; done + +distclean: clean + rm -f Makefile diff --git a/support/regression/collate-results.py b/support/regression/collate-results.py new file mode 100644 index 0000000..e58a981 --- /dev/null +++ b/support/regression/collate-results.py @@ -0,0 +1,42 @@ +import sys, re +import string + +"""Simple script that scans all of the test suite results text fed in +through stdin and summarises the total number of failures, test +points, and test cases.""" + +# Read in everything +lines = sys.stdin.readlines() + +# Init the running totals +failures = 0 +cases = 0 +tests = 0 +bytes = 0 +ticks = 0 + +# hack for valdiag +name = "" + +for line in lines: + if (re.search(r'^--- Running', line)): + name = line + # '--- Summary: f/t/c: ...', where f = # failures, t = # test points, + # c = # test cases. + if (re.search(r'^--- Summary:', line)): + (summary, data, rest) = re.split(r':', line) + (nfailures, ntests, ncases) = re.split(r'/', data) + failures = failures + string.atof(nfailures) + tests = tests + string.atof(ntests) + cases = cases + string.atof(ncases) + if (string.atof(nfailures)): + print name + + # '--- Simulator: b/t: ...', where b = # bytes, t = # ticks + if (re.search(r'^--- Simulator:', line)): + (simulator, data, rest) = re.split(r':', line) + (nbytes, nticks) = re.split(r'/', data) + bytes = bytes + string.atof(nbytes) + ticks = ticks + string.atof(nticks) + +print "%.0f failures, %.0f tests, %.0f test cases, %.0f bytes, %.0f ticks" % (failures, tests, cases, bytes, ticks) diff --git a/support/regression/fwk/include/testfwk.h b/support/regression/fwk/include/testfwk.h new file mode 100644 index 0000000..5e9c19a --- /dev/null +++ b/support/regression/fwk/include/testfwk.h @@ -0,0 +1,61 @@ +#ifndef __TESTFWK_H +#define __TESTFWK_H 1 + +extern int __numTests; +extern const int __numCases; + +#ifndef NO_VARARGS +void __printf(const char *szFormat, ...); +#define LOG(_a) __printf _a +#else +#define LOG(_a) /* hollow log */ +#endif + +#ifdef SDCC + #include +#else + #define _AUTOMEM + #define _STATMEM +#endif + +#if defined(PORT_HOST) || defined(SDCC_z80) || defined(SDCC_gbz80) +# define data +# define idata +# define pdata +# define xdata +# define code +# define near +# define far +# define at(x) +# define reentrant +#endif + +#if defined(SDCC_hc08) +# define idata data +# define pdata data +#endif + +#if defined(SDCC_pic16) +# define idata data +# define xdata data +# define pdata data +#endif + +void __fail(code const char *szMsg, code const char *szCond, code const char *szFile, int line); +void __prints(const char *s); +void __printn(int n); +code const char *__getSuiteName(void); +void __runSuite(void); + +#define ASSERT(_a) (++__numTests, (_a) ? (void)0 : __fail("Assertion failed", #_a, __FILE__, __LINE__)) +#define ASSERT_FAILED(_a) (++__numTests, (_a) ? 0 : (__fail("Assertion failed", #_a, __FILE__, __LINE__), 1)) +#define FAIL() FAILM("Failure") +#define FAILM(_a) __fail(_a, #_a, __FILE__, __LINE__) + +#ifndef NULL +#define NULL 0 +#endif + +#define UNUSED(_a) if (_a) { } + +#endif //__TESTFWK_H diff --git a/support/regression/fwk/lib/testfwk.c b/support/regression/fwk/lib/testfwk.c new file mode 100644 index 0000000..eed8c6f --- /dev/null +++ b/support/regression/fwk/lib/testfwk.c @@ -0,0 +1,204 @@ +/** Test framework support functions. + */ +#include +#ifndef NO_VARARGS +#include +#endif + +#ifdef SDCC_ds390 +#include /* main() must see the ISR declarations */ +#endif + +#ifdef SDCC_mcs51 +/* until changed, isr's must have a prototype in the module containing main */ +void T2_isr (void) interrupt 5; +#define MEMSPACE_BUF idata +#else +#define MEMSPACE_BUF +#endif + +/** Define this if the port's div or mod functions are broken. + A slow loop based method will be substituded. +*/ +//#define BROKEN_DIV_MOD 1 + +extern void _putchar(char c); +extern void _initEmu(void); +extern void _exitEmu(void); + +int __numTests = 0; +static int __numFailures = 0; + +#if BROKEN_DIV_MOD +static int +__div(int num, int denom) +{ + int q = 0; + while (num >= denom) { + q++; + num -= denom; + } + return q; +} + +static int +__mod(int num, int denom) +{ + while (num >= denom) { + num -= denom; + } + return num; +} +#else +#define __div(num, denom) ((num) / (denom)) +#define __mod(num, denom) ((num) % (denom)) +#endif + +void +__prints(const char *s) +{ + char c; + + while ('\0' != (c = *s)) { + _putchar(c); + ++s; + } +} + +void +__printn(int n) +{ + if (0 == n) { + _putchar('0'); + } + else { + static char MEMSPACE_BUF buf[6]; + char MEMSPACE_BUF *p = &buf[sizeof(buf) - 1]; + char neg = 0; + + buf[sizeof(buf) - 1] = '\0'; + + if (0 > n) { + n = -n; + neg = 1; + } + + while (0 != n) { + *--p = '0' + __mod(n, 10); + n = __div(n, 10); + } + + if (neg) + _putchar('-'); + + __prints(p); + } +} + +#ifndef NO_VARARGS +void +__printf(const char *szFormat, ...) +{ + va_list ap; + va_start(ap, szFormat); + + while (*szFormat) { + if (*szFormat == '%') { + switch (*++szFormat) { + case 's': { + char *sz = va_arg(ap, char *); + __prints(sz); + break; + } + case 'u': { + int i = va_arg(ap, int); + __printn(i); + break; + } + case '%': + _putchar('%'); + break; + default: + break; + } + } + else { + _putchar(*szFormat); + } + szFormat++; + } + va_end(ap); +} + +void +__fail(code const char *szMsg, code const char *szCond, code const char *szFile, int line) +{ + __printf("--- FAIL: \"%s\" on %s at %s:%u\n", szMsg, szCond, szFile, line); + __numFailures++; +} + +int +main(void) +{ + _initEmu(); + + __printf("--- Running: %s\n", __getSuiteName()); + + __runSuite(); + + __printf("--- Summary: %u/%u/%u: %u failed of %u tests in %u cases.\n", + __numFailures, __numTests, __numCases, + __numFailures, __numTests, __numCases + ); + + _exitEmu(); + + return 0; +} +#else +void +__fail(code const char *szMsg, code const char *szCond, code const char *szFile, int line) +{ + __prints("--- FAIL: \""); + __prints(szMsg); + __prints("\" on "); + __prints(szCond); + __prints(" at "); + __prints(szFile); + _putchar(':'); + __printn(line); + _putchar('\n'); + + __numFailures++; +} + +int +main(void) +{ + _initEmu(); + + __prints("--- Running: "); + __prints(__getSuiteName()); + _putchar('\n'); + + __runSuite(); + + __prints("--- Summary: "); + __printn(__numFailures); + _putchar('/'); + __printn(__numTests); + _putchar('/'); + __printn(__numCases); + __prints(": "); + __printn(__numFailures); + __prints(" failed of "); + __printn(__numTests); + __prints(" tests in "); + __printn(__numCases); + __prints(" cases.\n"); + + _exitEmu(); + + return 0; +} +#endif diff --git a/support/regression/fwk/lib/timeout.c b/support/regression/fwk/lib/timeout.c new file mode 100644 index 0000000..85c5600 --- /dev/null +++ b/support/regression/fwk/lib/timeout.c @@ -0,0 +1,286 @@ +/*------------------------------------------------------------------------- + timeout.c - source file for running ucSim within the regression tests + + Written By - Bernhard Held . bernhard@bernhardheld.de (2001) + Native WIN32 port by - Borut Razem . borut.razem@siol.net (2007) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#define PROGNAME "timeout" + +#define USAGE PROGNAME " : 1.10\n" \ + "Usage : " PROGNAME " timeout_in_seconds filename [arguments]\n" \ + " \"filename\" is executed, the arguments are passed to \"filename\".\n" \ + " When \"filename\" exits before the timeout expires, the\n" \ + " exit-status of \"filename\" is returned.\n" \ + " When the timeout expires before \"filename\" exits, \"filename\"\n" \ + " will be killed and an exit-status of 1 is returned.\n" + +#ifdef _WIN32 +#include +#include +#include + +/* + Native WIN32 version: + + The program creates a chile process using CreateProcess(). The waits until: + - the child exits + The exit status of the child is returned. + - the timeout elapses + The child will be killed. +*/ + +int +makeCmdLine(char *buf, int argc, const char * const *argv) +{ + int len = 0; + + argv += 2; + while (argc-- > 2) + { + int argLen = strlen(*argv); + len += argLen; + if (buf) + { + memcpy(buf, *argv, argLen); + buf += argLen; + } + if (argc > 2) + { + ++len; + if (buf) + *buf++ = ' '; + } + ++argv; + } + if (buf) + *buf = '\0'; + + return len + 1; +} + +int +main (int argc, const char * const *argv) +{ + STARTUPINFO si; + PROCESS_INFORMATION pi; + char *cmdLine; + long timeout; + DWORD exitCode; + HANDLE oldStderr; + + if (argc < 3) + { + fprintf (stderr, USAGE); + return 1; + } + timeout = atol (argv[1]); + if (timeout == 0) + { + fprintf (stderr, "Error parameter " PROGNAME ": must be a non-zero dezimal value\n"); + return 1; + } + + cmdLine = alloca(makeCmdLine(NULL, argc, argv)); + makeCmdLine(cmdLine, argc, argv); + + ZeroMemory(&si, sizeof (si)); + si.cb = sizeof (si); + ZeroMemory(&pi, sizeof (pi)); + + /* We'll redirect here stderr to stdout, which will be redirected */ + /* to /dev/null by the shell. The shell could also redirect stderr */ + /* to /dev/null, but then this program doesn't have the chance to */ + /* output any real error. */ + oldStderr = GetStdHandle (STD_ERROR_HANDLE); + SetStdHandle (STD_ERROR_HANDLE, GetStdHandle (STD_OUTPUT_HANDLE)); + + /* Start the child process. */ + if(!CreateProcess (NULL, // No module name (use command line) + cmdLine, // Command line + NULL, // Process handle not inheritable + NULL, // Thread handle not inheritable + TRUE, // Set handle inheritance to TRUE + 0, // No creation flags + NULL, // Use parent's environment block + NULL, // Use parent's starting directory + &si, // Pointer to STARTUPINFO structure + &pi) // Pointer to PROCESS_INFORMATION structure + ) + { + printf ("CreateProcess failed (%d).\n", GetLastError ()); + return 1; + } + + /* Restore stderr */ + SetStdHandle (STD_ERROR_HANDLE, oldStderr); + + /* Wait until child process exits or timeout expires. */ + if (WaitForSingleObject (pi.hProcess, timeout * 1000) == WAIT_TIMEOUT) + { + TerminateProcess (pi.hProcess, 1); + WaitForSingleObject (pi.hProcess, INFINITE); + } + + GetExitCodeProcess (pi.hProcess, &exitCode); + + /* Close process and thread handles. */ + CloseHandle (pi.hProcess); + CloseHandle (pi.hThread); + + return exitCode; +} + +#else + +#include +#include +#include +#include +#include +#include +#include +#include + +/* First the program tries to limit the maximum CPU-time to the timeout-value. + Then the child is run with execvp(). + + It's not possible to limit the CPU-time under Cygwin (V1.3.3). If setrlimit (RLIMIT_CPU, rlp) + fails, the program will fork() and run the child with execvp(). The fork/exec pair is slow on + Cygwin, but what else can we do? The parent sleeps until: + - a signal shows the child´s exitus + The exit status of the child is returned. + - the timeout elapses + The child will be killed. +*/ + +/* Get the status from all child processes that have terminated, without ever waiting. + This function is designed to be a handler for SIGCHLD, the signal that indicates + that at least one child process has terminated. + http://www.cs.utah.edu/dept/old/texinfo/glibc-manual-0.02/library_23.html#SEC401 +*/ + +#ifndef WAIT_ANY + #define WAIT_ANY -1 +#endif + +void +sigchld_handler (int signum) +{ + int pid; + int status; + int exit_status = 0; + + while (1) + { + pid = waitpid (WAIT_ANY, &status, WNOHANG); + if (WEXITSTATUS (status)) + exit_status = 1; // WEXITSTATUS(status); + /* pid == -1: no children */ + /* pid == 0: no children to be noticed */ + if (pid <= 0) + break; + } + exit (exit_status); +} + +int +main (int argc, char * const *argv) +{ + /* if getrlimit() / setrlimit() succeed, then no fork is neeeded */ + int flagNoFork = 0; + int old_stderr; + long timeout; + pid_t pid_child; + struct rlimit rl; + + if (argc < 3) + { + fprintf (stderr, USAGE); + return 1; + } + timeout = atol (argv[1]); + if (timeout == 0) + { + fprintf (stderr, "Error parameter " PROGNAME ": must be a non-zero dezimal value\n"); + return 1; + } + + /* try to use getrlimit() / setrlimit() for RLIMIT_CPU */ + /* to limit the CPU-time */ + if (getrlimit (RLIMIT_CPU, &rl) == 0) + { + rl.rlim_cur = timeout; + if (setrlimit (RLIMIT_CPU, &rl) == 0) + flagNoFork = 1; + } + + if (flagNoFork) + { /* the CPU-time is limited: simple execvp */ + + /* s51 prints warnings on stderr: */ + /* serial input/output interface connected to a non-terminal file. */ + /* We'll redirect here stderr to stdout, which will be redirected */ + /* to /dev/null by the shell. The shell could also redirect stderr */ + /* to /dev/null, but then this program doesn't have the chance to */ + /* output any real error. */ + old_stderr = dup (STDERR_FILENO); + dup2 (STDOUT_FILENO, STDERR_FILENO); + /* shouldn't return */ + execvp (argv[2], argv + 2); + /* restore stderr */ + dup2 (old_stderr, STDERR_FILENO); + perror (argv[2]); + return 1; /* Error */ + } + else + { + /* do it the hard way: fork/exec */ + signal (SIGCHLD, sigchld_handler); + pid_child = fork(); + if (pid_child == 0) + { + /* s51 prints warnings on stderr: */ + /* serial input/output interface connected to a non-terminal file. */ + /* We'll redirect here stderr to stdout, which will be redirected */ + /* to /dev/null by the shell. The shell could also redirect stderr */ + /* to /dev/null, but then this program doesn't have the chance to */ + /* output any real error. */ + old_stderr = dup (STDERR_FILENO); + dup2 (STDOUT_FILENO, STDERR_FILENO); + /* shouldn't return */ + execvp (argv[2], argv + 2); + /* restore stderr */ + dup2 (old_stderr, STDERR_FILENO); + perror (argv[2]); + return 1; /* Error */ + } + else + { + /* this timeout is hopefully aborted by a SIGCHLD */ + sleep (timeout); + fprintf (stderr, PROGNAME ": timeout, killing child %s\n", argv[2]); + kill (pid_child, SIGTERM); + return 1; /* Error */ + } + } +} +#endif diff --git a/support/regression/generate-cases.py b/support/regression/generate-cases.py new file mode 100644 index 0000000..e2c08cc --- /dev/null +++ b/support/regression/generate-cases.py @@ -0,0 +1,191 @@ +from HTMLgen import TemplateDocument +import sys, re, tempfile, os + +"""See InstanceGenerator for a description of this file""" + +# Globals +# Directory that the generated files should be placed into +outdir = sys.argv[2] + +# Start of the test function table definition +testfuntableheader = """ +void +__runSuite(void) +{ +""" + +# End of the test function table definition +testfuntablefooter = """} +""" + +# Code to generate the suite function +testfunsuite = """ +code const char * +__getSuiteName(void) +{ + return "{testcase}"; +} +""" + +# Utility functions +def trim(a): + """Removes all white space from the start and the end of a string. + Like java.lang.String.trim""" + ret = chomp(re.sub(r'^\s+', '', a)) + return ret + +def chomp(a): + """Removes all white space from the end of a string. + Like perl's chomp""" + return re.sub(r'\s+$', '', a) + +def createdir(path): + """Creates a directory if it doesn't exist""" + if not os.path.isdir(path): + os.mkdir(path) + +class InstanceGenerator: + """Test case iteration generator. + Takes the template given as the first argument, pulls out all the meta + iteration information, and generates an instance for each combination + of the names and types. + + See doc/test_suite_spec.tex for more information on the template file + format.""" + + def __init__(self, inname): + self.inname = inname + # Initalise the replacements hash. + # Map of name to values. + self.replacements = { } + # Initalise the function list hash. + self.functions = [] + # Emit the suite wrapper into a temporary file + self.tmpname = tempfile.mktemp() + (self.dirname, self.filename) = os.path.split(self.inname) + (self.basename, self.ext) = os.path.splitext (self.filename) + + def permute(self, basepath, keys, trans = {}): + """Permutes across all of the names. For each value, recursivly creates + a mangled form of the name, this value, and all the combinations of + the remaining values. At the tail of the recursion when one full + combination is built, generates an instance of the test case from + the template.""" + if len(keys) == 0: + # End of the recursion. + # Set the runtime substitutions. + trans['testcase'] = re.sub(r'\\', r'\\\\', basepath) + # Create the instance from the template + T = TemplateDocument(self.tmpname) + T.substitutions = trans + T.write(basepath + self.ext) + else: + # Pull off this key, then recursivly iterate through the rest. + key = keys[0] + for part in self.replacements[key]: + trans[key] = part + # Turn a empty string into something decent for a filename + if not part: + part = 'none' + # Remove any bad characters from the filename. + part = re.sub(r'\s+', r'_', part) + # The slice operator (keys[1:]) creates a copy of the list missing the + # first element. + # Can't use '-' as a seperator due to the mcs51 assembler. + self.permute(basepath + '_' + key + '_' + part, keys[1:], trans) + + def writetemplate(self): + """Given a template file and a temporary name writes out a verbatim copy + of the source file and adds the suite table and functions.""" + fout = open(self.tmpname, 'w') + + for line in self.lines: + fout.write(line) + + # Emmit the suite table + fout.write(testfuntableheader) + + n = 0; + for fun in self.functions: + # Turn the function definition into a function call + fout.write(" __prints(\"Running " + fun + "\\n\");\n"); + fout.write(' ' + fun + "();\n") + n += 1; + + fout.write(testfuntablefooter) + fout.write("\nconst int __numCases = " + str(n) + ";\n") + fout.write(testfunsuite); + + fout.close() + return n + + def readfile(self): + """Read in all of the input file.""" + fin = open(self.inname) + self.lines = fin.readlines() + fin.close() + + def parse(self): + # Start off in the header. + inheader = 1; + + # Iterate over the source file and pull out the meta data. + for line in self.lines: + line = trim(line) + + # If we are still in the header, see if this is a substitution line + if inheader: + # A substitution line has a ':' in it + if re.search(r':', line) != None: + # Split out the name from the values + (name, rawvalues) = re.split(r':', line) + # Split the values at the commas + values = re.split(r',', rawvalues) + + # Trim the name + name = trim(name) + # Trim all the values + values = map(trim, values) + + self.replacements[name] = values + elif re.search(r'\*/', line) != None: + # Hit the end of the comments + inheader = 0; + else: + # Do nothing. + None + else: + # Pull out any test function names + m = re.match(r'^(?:\W*void\W+)?\W*(test\w*)\W*\(\W*void\W*\)', line) + if m != None: + self.functions.append(m.group(1)) + + def generate(self): + """Main function. Generates all of the instances.""" + self.readfile() + self.parse() + if self.writetemplate() == 0: + sys.stderr.write("Empty function list in " + self.inname + "!\n") + + # Create the output directory if it doesn't exist + createdir(outdir) + + # Generate + self.permute(os.path.join(outdir, self.basename), self.replacements.keys()) + + # Remove the temporary file + os.remove(self.tmpname) + +def main(): + # Check and parse the command line arguments + if len(sys.argv) < 3: + print "usage: generate-cases.py template.c outdir" + sys.exit(-1) + + # Input name is the first arg. + + s = InstanceGenerator(sys.argv[1]) + s.generate() + +if __name__ == '__main__': + main() diff --git a/support/regression/get_ticks.py b/support/regression/get_ticks.py new file mode 100644 index 0000000..bffeed5 --- /dev/null +++ b/support/regression/get_ticks.py @@ -0,0 +1,27 @@ +import sys, re +import string + +"""Simple script that scans all of the simulator output text fed in +through stdin and summarises the total number of system clock ticks.""" + +# Read in everything +lines = sys.stdin.readlines() + +# Declare globals +bytes = 0 +ticks = 0 + +for line in lines: + # 'n words read from ...', where = # bytes in hex file + if (re.search(r'words read from', line)): + (data, post) = re.split(r'w', line, 1) + bytes = string.atoi(data) + + # 'Total time since last reset= 0.102021 sec (i clks)', + # where i = # system clock ticks. + if (re.search(r'^Total time', line)): + (pre, data) = re.split(r'\(', line) + (nticks, post) = re.split(r' ', data) + ticks = string.atoi(nticks) + +print "\n--- Simulator: %d/%d: %d bytes, %d ticks" % (bytes, ticks, bytes, ticks) diff --git a/support/regression/ports/ds390/spec.mk b/support/regression/ports/ds390/spec.mk new file mode 100644 index 0000000..7c2d17c --- /dev/null +++ b/support/regression/ports/ds390/spec.mk @@ -0,0 +1,52 @@ +# Regression test specification for the ds390 target running with uCsim + +ifndef DEV_NULL + DEV_NULL = /dev/null +endif + +# path to uCsim +ifdef SDCC_BIN_PATH + S51 = $(SDCC_BIN_PATH)/s51 +else + S51A = $(top_builddir)/sim/ucsim/s51.src/s51 + S51B = $(top_builddir)/bin/s51 + + S51 = $(shell if [ -f $(S51A) ]; then echo $(S51A); else echo $(S51B); fi) + + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/ds390 +endif + +SDCCFLAGS +=-mds390 --less-pedantic -DREENTRANT=reentrant -Wl-r +LINKFLAGS += libds390.lib libsdcc.lib liblong.lib libint.lib libfloat.lib + +OBJEXT = .rel +EXEEXT = .ihx + +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) + +# Rule to link into .ihx +%$(EXEEXT): %$(OBJEXT) $(EXTRAS) + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $< -o $@ + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +# run simulator with 25 seconds timeout +%.out: %$(EXEEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout 25 $(S51) -tds390f -S in=$(DEV_NULL),out=$@ $< < $(PORTS_DIR)/ds390/uCsim.cmd > $(@:.out=.sim) || \ + echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(EXEEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + python $(srcdir)/get_ticks.py < $(@:.out=.sim) >> $@ + -grep -n FAIL $@ /dev/null || true + +$(CASES_DIR)/timeout: fwk/lib/timeout.c + $(CC) $(CFLAGS) $< -o $@ + +_clean: diff --git a/support/regression/ports/ds390/support.c b/support/regression/ports/ds390/support.c new file mode 100644 index 0000000..f582f22 --- /dev/null +++ b/support/regression/ports/ds390/support.c @@ -0,0 +1,45 @@ +/*------------------------------------------------------------------------- + support.c - startup for regression tests with uCsim + + Copied from tinibios.c, which was written By - Johan Knol, johan.knol@iduna.nl + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include + +void +_putchar (char c) +{ + Serial0PutChar (c); +} + +void +_initEmu (void) +{ +} + +void +_exitEmu (void) +{ + Serial0PutChar (' '); /* wait for the last character to be transmitted */ + /* before hitting the breakpoint */ + * (char idata *) 0 = * (char xdata *) 0x7654; +} + diff --git a/support/regression/ports/ds390/uCsim.cmd b/support/regression/ports/ds390/uCsim.cmd new file mode 100644 index 0000000..cd2b168 --- /dev/null +++ b/support/regression/ports/ds390/uCsim.cmd @@ -0,0 +1,8 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +break xram r 0x7654 +run +state +quit diff --git a/support/regression/ports/gbz80/spec.mk b/support/regression/ports/gbz80/spec.mk new file mode 100644 index 0000000..c6b6d29 --- /dev/null +++ b/support/regression/ports/gbz80/spec.mk @@ -0,0 +1,34 @@ +# Port specification for the gbz80 port. + +EMU = $(SDCC_EXTRA_DIR)/emu/rrgb/rrgb + +SDCCFLAGS +=-mgbz80 --nostdinc --less-pedantic -DREENTRANT= +LINKFLAGS = --nostdlib +LINKFLAGS += gbz80.lib +LIBDIR = $(top_builddir)/device/lib/build/gbz80 + +EXEEXT = .gb + +# Needs parts of gbdk-lib, namely the internal mul/div/mod functions. +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) + +# Rule to link into .ihx +%.gb: %.c $(EXTRAS) + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) -L $(LIBDIR) $(EXTRAS) $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.asm + ../../bin/as-gbz80 -plosgff $@ $< + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +# PENDING: Path to sdcc-extra +%.out: %$(EXEEXT) + mkdir -p $(dir $@) + $(EMU) -k -m $< > $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/gbz80/support.asm b/support/regression/ports/gbz80/support.asm new file mode 100644 index 0000000..c16fa2a --- /dev/null +++ b/support/regression/ports/gbz80/support.asm @@ -0,0 +1,12 @@ + .area _CODE + .globl _putchar + .globl _exit + +__putchar:: + jp _putchar + +__initEmu:: + ret + +__exitEmu:: + jp _exit diff --git a/support/regression/ports/hc08/spec.mk b/support/regression/ports/hc08/spec.mk new file mode 100644 index 0000000..b8efb4b --- /dev/null +++ b/support/regression/ports/hc08/spec.mk @@ -0,0 +1,58 @@ +# Regression test specification for the hc08 target running with uCsim +# + +# path to uCsim +ifdef SDCC_BIN_PATH + UCHC08 = $(SDCC_BIN_PATH)/shc08 + + AS_HC08 = $(SDCC_BIN_PATH)/as-hc08 +else + UCHC08A = $(top_builddir)/sim/ucsim/hc08.src/shc08 + UCHC08B = $(top_builddir)/bin/shc08 + + UCHC08 = $(shell if [ -f $(UCHC08A) ]; then echo $(UCHC08A); else echo $(UCHC08B); fi) + + AS_HC08 = $(top_builddir)/bin/as-hc08 + + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/hc08 +endif + +SDCCFLAGS +=-mhc08 --less-pedantic --out-fmt-ihx -DREENTRANT=reentrant +LINKFLAGS += hc08.lib + +OBJEXT = .rel +EXEEXT = .ihx + +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) + +# Rule to link into .ihx +#%$(EXEEXT): %$(OBJEXT) $(EXTRAS) + +%$(EXEEXT): %$(OBJEXT) $(EXTRAS) + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $< -o $@ + +%$(OBJEXT): %.asm + $(AS_HC08) -plosgff $< + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +# run simulator with 10 seconds timeout +%.out: %$(EXEEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout 10 $(UCHC08) $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(EXEEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + python $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +$(CASES_DIR)/timeout: fwk/lib/timeout.c + $(CC) $(CFLAGS) $< -o $@ + +_clean: diff --git a/support/regression/ports/hc08/support.c b/support/regression/ports/hc08/support.c new file mode 100644 index 0000000..69705c2 --- /dev/null +++ b/support/regression/ports/hc08/support.c @@ -0,0 +1,22 @@ + +void +_putchar(unsigned char c) +{ + c; + _asm + .db 0x9e, 0xed + _endasm; +} + +void +_initEmu(void) +{ +} + +void +_exitEmu(void) +{ + _asm + .db 0x9e, 0xec + _endasm; +} diff --git a/support/regression/ports/hc08/uCsim.cmd b/support/regression/ports/hc08/uCsim.cmd new file mode 100644 index 0000000..fb936cc --- /dev/null +++ b/support/regression/ports/hc08/uCsim.cmd @@ -0,0 +1,7 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +run +state +quit diff --git a/support/regression/ports/host/spec.mk b/support/regression/ports/host/spec.mk new file mode 100644 index 0000000..e48551c --- /dev/null +++ b/support/regression/ports/host/spec.mk @@ -0,0 +1,36 @@ +# Port specification for compiling on the host machines version of gcc +SDCC = $(shell ( sh -c "gcc --version" 2>&1 ) > /dev/null && echo gcc || echo cc) +SDCCFLAGS = $(CPPFLAGS) -DPORT_HOST=1 -fsigned-char -fpack-struct -DREENTRANT= -I$(top_builddir) -I$(top_srcdir) +# disable all warnings: +SDCCFLAGS+= -w +# enable all warnings: +#SDCCFLAGS+= -Wall + +EXEEXT = .bin +OBJEXT = .o +INC_DIR = . + +# otherwise `make` deletes testfwk.o and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) + +%.out: %$(EXEEXT) + mkdir -p $(dir $@) + -$< > $@ + -grep -n FAIL $@ /dev/null || true + +%$(EXEEXT): %$(OBJEXT) $(EXTRAS) + $(SDCC) $(SDCCFLAGS) -o $@ $< $(EXTRAS) -lm + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +_clean: diff --git a/support/regression/ports/host/support.c b/support/regression/ports/host/support.c new file mode 100644 index 0000000..3921b47 --- /dev/null +++ b/support/regression/ports/host/support.c @@ -0,0 +1,21 @@ +/** Host specific support routines. + */ +#include +#include + +void +_putchar(char c) +{ + putchar(c); +} + +void +_initEmu(void) +{ +} + +void +_exitEmu(void) +{ + exit(0); +} diff --git a/support/regression/ports/mcs51-common/T2_isr.c b/support/regression/ports/mcs51-common/T2_isr.c new file mode 100644 index 0000000..2a248d1 --- /dev/null +++ b/support/regression/ports/mcs51-common/T2_isr.c @@ -0,0 +1,6 @@ +//dummy interrupt service routine +//just to make linker happy + +void T2_isr (void) interrupt 5 +{ +} diff --git a/support/regression/ports/mcs51-common/fwk.lib b/support/regression/ports/mcs51-common/fwk.lib new file mode 100644 index 0000000..c6898f8 --- /dev/null +++ b/support/regression/ports/mcs51-common/fwk.lib @@ -0,0 +1 @@ +T2_isr.rel diff --git a/support/regression/ports/mcs51-common/spec.mk b/support/regression/ports/mcs51-common/spec.mk new file mode 100644 index 0000000..e71d081 --- /dev/null +++ b/support/regression/ports/mcs51-common/spec.mk @@ -0,0 +1,57 @@ +# Common regression test specification for the mcs51 targets running with uCsim + +ifndef DEV_NULL + DEV_NULL = /dev/null +endif + +# path to uCsim +ifdef SDCC_BIN_PATH + S51 = $(SDCC_BIN_PATH)/s51 +else + S51A = $(top_builddir)/sim/ucsim/s51.src/s51 + S51B = $(top_builddir)/bin/s51 + + S51 = $(shell if [ -f $(S51A) ]; then echo $(S51A); else echo $(S51B); fi) + + SDCCFLAGS += --nostdinc -I$(INC_DIR)/mcs51 -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(LIBDIR) +endif + +SDCCFLAGS += --less-pedantic -DREENTRANT=reentrant +LINKFLAGS += mcs51.lib libsdcc.lib liblong.lib libint.lib libfloat.lib + +OBJEXT = .rel +EXEEXT = .ihx + +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +FWKLIB = $(PORT_CASES_DIR)/T2_isr$(OBJEXT) + +# Rule to link into .ihx +%$(EXEEXT): %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/mcs51-common/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: + cp $(PORTS_DIR)/mcs51-common/fwk.lib $@ + +# run simulator with 30 seconds timeout +%.out: %$(EXEEXT) gen/timeout + mkdir -p $(dir $@) + -gen/timeout 30 "$(S51)" -t32 -S in=$(DEV_NULL),out=$@ $< < $(PORTS_DIR)/mcs51-common/uCsim.cmd > $(@:.out=.sim) \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(EXEEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + python $(srcdir)/get_ticks.py < $(@:.out=.sim) >> $@ + -grep -n FAIL $@ /dev/null || true + + +gen/timeout: $(srcdir)/fwk/lib/timeout.c + $(CC) $(CFLAGS) $< -o $@ + +_clean: diff --git a/support/regression/ports/mcs51-common/support.c b/support/regression/ports/mcs51-common/support.c new file mode 100644 index 0000000..9edef19 --- /dev/null +++ b/support/regression/ports/mcs51-common/support.c @@ -0,0 +1,33 @@ +// #define MICROCONTROLLER_8051 +#include + +unsigned char +_sdcc_external_startup (void) +{ + /* serial port mode 0 is default */ + /* enable transmission of first byte */ + TI = 1; + return 0; +} + +void +_putchar (char c) +{ + while (!TI) + ; + TI = 0; + SBUF = c; +} + +void +_initEmu (void) +{ +} + +void +_exitEmu (void) +{ + while (!TI) /* wait for the last character to be transmitted */ + ; /* before hitting the breakpoint */ + * (char idata *) 0 = * (char xdata *) 0x7654; +} diff --git a/support/regression/ports/mcs51-common/uCsim.cmd b/support/regression/ports/mcs51-common/uCsim.cmd new file mode 100644 index 0000000..cd2b168 --- /dev/null +++ b/support/regression/ports/mcs51-common/uCsim.cmd @@ -0,0 +1,8 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +break xram r 0x7654 +run +state +quit diff --git a/support/regression/ports/mcs51-large/spec.mk b/support/regression/ports/mcs51-large/spec.mk new file mode 100644 index 0000000..de4a71b --- /dev/null +++ b/support/regression/ports/mcs51-large/spec.mk @@ -0,0 +1,9 @@ +# Regression test specification for the mcs51-large target running with uCsim +# +# model large + +SDCCFLAGS +=--model-large + +include $(PORTS_DIR)/mcs51-common/spec.mk + +LIBDIR = $(top_builddir)/device/lib/build/large diff --git a/support/regression/ports/mcs51-medium/spec.mk b/support/regression/ports/mcs51-medium/spec.mk new file mode 100644 index 0000000..ca8e875 --- /dev/null +++ b/support/regression/ports/mcs51-medium/spec.mk @@ -0,0 +1,9 @@ +# Regression test specification for the mcs51-medium target running with uCsim +# +# model medium + +SDCCFLAGS +=--model-medium + +include $(PORTS_DIR)/mcs51-common/spec.mk + +LIBDIR = $(top_builddir)/device/lib/build/medium diff --git a/support/regression/ports/mcs51-small/spec.mk b/support/regression/ports/mcs51-small/spec.mk new file mode 100644 index 0000000..f685a9a --- /dev/null +++ b/support/regression/ports/mcs51-small/spec.mk @@ -0,0 +1,9 @@ +# Regression test specification for the mcs51 target running with uCsim +# +# model small + +SDCCFLAGS +=--model-small + +include $(PORTS_DIR)/mcs51-common/spec.mk + +LIBDIR = $(top_builddir)/device/lib/build/small diff --git a/support/regression/ports/mcs51-stack-auto/spec.mk b/support/regression/ports/mcs51-stack-auto/spec.mk new file mode 100644 index 0000000..12d7a41 --- /dev/null +++ b/support/regression/ports/mcs51-stack-auto/spec.mk @@ -0,0 +1,9 @@ +# Regression test specification for the mcs51-stack-auto target running with uCsim +# +# model small stack-auto + +SDCCFLAGS +=--stack-auto + +include $(PORTS_DIR)/mcs51-common/spec.mk + +LIBDIR = $(top_builddir)/device/lib/build/small-stack-auto diff --git a/support/regression/ports/mcs51-xstack-auto/spec.mk b/support/regression/ports/mcs51-xstack-auto/spec.mk new file mode 100644 index 0000000..99d9c3f --- /dev/null +++ b/support/regression/ports/mcs51-xstack-auto/spec.mk @@ -0,0 +1,16 @@ +# Regression test specification for the mcs51-xstack-auto target running with uCsim +# +# model small xstack-auto + +LIBSDCCFLAGS+= --stack-auto --xstack --std-c99 -DUSE_FLOATS=1 +SDCCFLAGS += --stack-auto --xstack --std-sdcc99 + +include $(PORTS_DIR)/mcs51-common/spec.mk + +LIBDIR = $(top_builddir)/device/lib/build/small-xstack-auto + +MAKE_LIBRARY = lib-files + +.PHONY: lib-files +lib-files: + make -C $(top_builddir)/device/lib model-mcs51-xstack-auto MODELS=small diff --git a/support/regression/ports/pic14/gpsim.cmd b/support/regression/ports/pic14/gpsim.cmd new file mode 100644 index 0000000..58afc78 --- /dev/null +++ b/support/regression/ports/pic14/gpsim.cmd @@ -0,0 +1,2 @@ +run +quit diff --git a/support/regression/ports/pic14/spec.mk b/support/regression/ports/pic14/spec.mk new file mode 100644 index 0000000..56b2a41 --- /dev/null +++ b/support/regression/ports/pic14/spec.mk @@ -0,0 +1,49 @@ +# Regression test specification for the pic14 target running with gpsim + +# path to gpsim +ifdef GPSIM_PATH + GPSIM := $(GPSIM_PATH)/gpsim +else + GPSIM := gpsim +endif + +ifndef SDCC_BIN_PATH + SDCCFLAGS += --nostdinc -I$(top_srcdir)/device/include/pic -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/pic +endif + +SDCCFLAGS += -mpic14 -pp16f877 --less-pedantic -Wl,-q -DREENTRANT=reentrant +LINKFLAGS += libsdcc.lib libm.lib + +OBJEXT = .o +EXEEXT = .cod + +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) + +# Rule to link into .ihx +%$(EXEEXT): %$(OBJEXT) $(EXTRAS) + -$(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $< -o $@ + +%$(OBJEXT): %.c + -$(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + -$(SDCC) $(SDCCFLAGS) -c $< -o $@ + +.PRECIOUS: gen/pic14/testfwk.o gen/pic14/support.o + +$(PORT_CASES_DIR)/%$(OBJEXT): fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +# run simulator with 25 seconds timeout +%.out: %$(EXEEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout 25 "$(GPSIM)" -i -s $< -c $(PORTS_DIR)/pic14/gpsim.cmd > $@ || \ + echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(EXEEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + python $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +$(CASES_DIR)/timeout: fwk/lib/timeout.c + $(CC) $(CFLAGS) $< -o $@ + +_clean: diff --git a/support/regression/ports/pic14/support.c b/support/regression/ports/pic14/support.c new file mode 100644 index 0000000..161d22f --- /dev/null +++ b/support/regression/ports/pic14/support.c @@ -0,0 +1,103 @@ +/*------------------------------------------------------------------------- + support.c - startup for PIC14 regression tests with gpsim + + Copyright (c) 2006 Borut Razem + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#pragma preproc_asm - + +#include + + +void +_putchar(char c) +{ + while (!TXIF) + ; + TXREG = c; +} + + +void +_initEmu(void) +{ + /* load and configure the libgpsim_modules module */ + _asm + ;; Set frequency to 20MHz + .direct "e", ".frequency=20e6" + + ;; Load the USART library and module + .direct "e", "module library libgpsim_modules" + .direct "e", "module load usart U1" + + ;; Define a node + .direct "e", "node PIC_tx" + + ;; Tie the USART module to the PIC + .direct "e", "attach PIC_tx portc6 U1.RXPIN" + + ;; Set the USART module's Baud Rate + .direct "e", "U1.rxbaud = 9600" + + ;; Display the received character on terminal + .direct "e", "U1.console = true" + _endasm; + + /* USART initialization */ + PORTC |= 0x40; // Set TX pin to 1 + TRISC &= ~0x40; // TX pin is output + + //1. Initialize the SPBRG register for the appropriate + // baud rate. If a high speed baud rate is desired, + // set bit BRGH (Section 16.1). + BRGH = 1; + SPBRG = 129; + + //2. Enable the asynchronous serial port by clearing + // bit SYNC and setting bit SPEN. + SPEN = 1; + + //3. If interrupts are desired, set enable bit TXIE. + //4. If 9-bit transmission is desired, set transmit bit + // TX9. Can be used as address/data bit. + //5. Enable the transmission by setting bit TXEN, + // which will also set bit TXIF. + TXEN = 1; + + //6. If 9-bit transmission is selected, the ninth bit + // should be loaded in bit TX9D. + //7. Load data to the TXREG register (starts + // transmission). +} + + +void +_exitEmu(void) +{ + /* wait until the transmit buffer is empty */ + while (!TRMT) + ; + + /* set the breakpoint */ + _asm + .direct "a", "\"\"" + _endasm; +} diff --git a/support/regression/ports/pic16/gpsim.cmd b/support/regression/ports/pic16/gpsim.cmd new file mode 100644 index 0000000..58afc78 --- /dev/null +++ b/support/regression/ports/pic16/gpsim.cmd @@ -0,0 +1,2 @@ +run +quit diff --git a/support/regression/ports/pic16/spec.mk b/support/regression/ports/pic16/spec.mk new file mode 100644 index 0000000..c436491 --- /dev/null +++ b/support/regression/ports/pic16/spec.mk @@ -0,0 +1,50 @@ +# Regression test specification for the pic16 target running with gpsim + +# path to gpsim +ifdef GPSIM_PATH + GPSIM := $(GPSIM_PATH)/gpsim +else + GPSIM := gpsim +endif + +ifndef SDCC_BIN_PATH + SDCCFLAGS += --nostdinc -I$(top_srcdir)/device/include/pic16 -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/pic16 +endif + +SDCCFLAGS += -mpic16 -pp18f452 --less-pedantic -Wl,-q -DREENTRANT=reentrant +SDCCFLAGS += --no-peep +LINKFLAGS += libsdcc.lib libc18f.lib libm18f.lib + +OBJEXT = .o +EXEEXT = .cod + +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) + +# Rule to link into .ihx +%$(EXEEXT): %$(OBJEXT) $(EXTRAS) + -$(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $< -o $@ + +%$(OBJEXT): %.c + -$(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + -$(SDCC) $(SDCCFLAGS) -c $< -o $@ + +.PRECIOUS: gen/pic16/testfwk.o gen/pic16/support.o + +$(PORT_CASES_DIR)/%$(OBJEXT): fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +# run simulator with 25 seconds timeout +%.out: %$(EXEEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout 25 "$(GPSIM)" -i -s $< -c $(PORTS_DIR)/pic16/gpsim.cmd > $@ || \ + echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(EXEEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + python $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +$(CASES_DIR)/timeout: fwk/lib/timeout.c + $(CC) $(CFLAGS) $< -o $@ + +_clean: diff --git a/support/regression/ports/pic16/support.c b/support/regression/ports/pic16/support.c new file mode 100644 index 0000000..7a6a747 --- /dev/null +++ b/support/regression/ports/pic16/support.c @@ -0,0 +1,107 @@ +/*------------------------------------------------------------------------- + support.c - startup for PIC16 regression tests with gpsim + + Copyright (c) 2006 Borut Razem + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#pragma preproc_asm - +#pragma stack 0x200 255 /* set stack size to 255 bytes */ + +#include + + +void +_putchar(char c) +{ + while (!PIR1bits.TXIF) + ; + TXREG = c; +} + + +void +_initEmu(void) +{ + /* load and configure the libgpsim_modules module */ + _asm + ;; Set frequency to 20MHz + .direct "e", ".frequency=20e6" + + ;; Load the USART library and module + .direct "e", "module library libgpsim_modules" + .direct "e", "module load usart U1" + + ;; Define a node + .direct "e", "node PIC_tx" + + ;; Tie the USART module to the PIC + .direct "e", "attach PIC_tx portc6 U1.RXPIN" + + ;; Set the USART module's Baud Rate + .direct "e", "U1.rxbaud = 9600" + + ;; Display the received character on terminal + .direct "e", "U1.console = true" + _endasm; + + /* USART initialization */ + PORTCbits.TX = 1; // Set TX pin to 1 + TRISCbits.TRISC6 = 0; // TX pin is output + + TXSTA = 0; // Reset USART registers to POR state + RCSTA = 0; + + //1. Initialize the SPBRG register for the appropriate + // baud rate. If a high speed baud rate is desired, + // set bit BRGH (Section 16.1). + TXSTAbits.BRGH = 1; + SPBRG = 129; + + //2. Enable the asynchronous serial port by clearing + // bit SYNC and setting bit SPEN. + RCSTAbits.SPEN = 1; + + //3. If interrupts are desired, set enable bit TXIE. + //4. If 9-bit transmission is desired, set transmit bit + // TX9. Can be used as address/data bit. + //5. Enable the transmission by setting bit TXEN, + // which will also set bit TXIF. + TXSTAbits.TXEN = 1; + + //6. If 9-bit transmission is selected, the ninth bit + // should be loaded in bit TX9D. + //7. Load data to the TXREG register (starts + // transmission). +} + + +void +_exitEmu(void) +{ + /* wait until the transmit buffer is empty */ + while (!TXSTAbits.TRMT) + ; + + /* set the breakpoint */ + _asm + .direct "a", "\"\"" + _endasm; +} diff --git a/support/regression/ports/ucz80/spec.mk b/support/regression/ports/ucz80/spec.mk new file mode 100644 index 0000000..2189e2f --- /dev/null +++ b/support/regression/ports/ucz80/spec.mk @@ -0,0 +1,57 @@ +# Regression test specification for the z80 target running with uCsim +# + +# path to uCsim +ifdef SDCC_BIN_PATH + UCZ80 = $(SDCC_BIN_PATH)/sz80 + + AS_Z80 = $(SDCC_BIN_PATH)/as-z80 +else + SZ80A = $(top_builddir)/sim/ucsim/z80.src/sz80 + SZ80B = $(top_builddir)/bin/sz80 + + UCZ80 = $(shell if [ -f $(SZ80A) ]; then echo $(SZ80A); else echo $(SZ80B); fi) + + AS_Z80 = $(top_builddir)/bin/as-z80 + + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/z80 +endif + +SDCCFLAGS +=-mz80 --less-pedantic --profile -DREENTRANT= +#SDCCFLAGS +=--less-pedantic -DREENTRANT=reentrant +LINKFLAGS += z80.lib + +#OBJEXT = .o +EXEEXT = .ihx + +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) + +# Rule to link into .ihx +%.ihx: %.c $(EXTRAS) + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.asm + $(AS_Z80) -plosgff $@ $< + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +# run simulator with 10 seconds timeout +%.out: %$(EXEEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout 10 $(UCZ80) $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(EXEEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + python $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +$(CASES_DIR)/timeout: fwk/lib/timeout.c + $(CC) $(CFLAGS) $< -o $@ + +_clean: diff --git a/support/regression/ports/ucz80/support.asm b/support/regression/ports/ucz80/support.asm new file mode 100644 index 0000000..c16fa2a --- /dev/null +++ b/support/regression/ports/ucz80/support.asm @@ -0,0 +1,12 @@ + .area _CODE + .globl _putchar + .globl _exit + +__putchar:: + jp _putchar + +__initEmu:: + ret + +__exitEmu:: + jp _exit diff --git a/support/regression/ports/ucz80/uCsim.cmd b/support/regression/ports/ucz80/uCsim.cmd new file mode 100644 index 0000000..fb936cc --- /dev/null +++ b/support/regression/ports/ucz80/uCsim.cmd @@ -0,0 +1,7 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +run +state +quit diff --git a/support/regression/ports/xa51/spec.mk b/support/regression/ports/xa51/spec.mk new file mode 100644 index 0000000..a469755 --- /dev/null +++ b/support/regression/ports/xa51/spec.mk @@ -0,0 +1,43 @@ +# Port specification for the xa51 port running with uCsim + +ifndef DEV_NULL + DEV_NULL = /dev/null +endif + +# path to uCsim +SXA_A = $(top_builddir)/sim/ucsim/xa.src/sxa +SXA_B = $(top_builddir)/bin/sxa + +SXA = $(shell if [ -f $(SXA_A) ]; then echo $(SXA_A); else echo $(SXA_B); fi) + +SDCCFLAGS +=-mxa51 --less-pedantic -DREENTRANT= -I$(top_srcdir) + +OBJEXT = .rel +EXEEXT = .hex + +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) + +# Rule to link into .hex +%$(EXEEXT): %$(OBJEXT) $(EXTRAS) + $(SDCC) $(SDCCFLAGS) $(EXTRAS) $< -o $@ + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +# run simulator with 1 second timeout +%.out: %$(EXEEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout 1 $(SXA) -S in=$(DEV_NULL),out=$@ $< < $(PORTS_DIR)/xa51/uCsim.cmd >/dev/null || \ + echo -e --- FAIL: \"timeout, simulation killed\" in $(<:.ihx=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + -grep -n FAIL $@ /dev/null || true + +$(CASES_DIR)/timeout: fwk/lib/timeout.c + $(CC) $(CFLAGS) $< -o $@ + +_clean: diff --git a/support/regression/ports/xa51/support.c b/support/regression/ports/xa51/support.c new file mode 100644 index 0000000..85c9867 --- /dev/null +++ b/support/regression/ports/xa51/support.c @@ -0,0 +1,51 @@ +/*------------------------------------------------------------------------- + support.c - startup for regression tests with uCsim + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include <80c51xa.h> + +void external_startup(void) { + return; +} + +void +_putchar (char c) +{ + c; + _asm + mov.b r0l,[r7+2] + trap #0x0e + _endasm; +} + +void +_initEmu (void) +{ +} + +void +_exitEmu (void) +{ + _asm + trap #0x0f + _endasm; +} + diff --git a/support/regression/ports/xa51/uCsim.cmd b/support/regression/ports/xa51/uCsim.cmd new file mode 100644 index 0000000..0562e68 --- /dev/null +++ b/support/regression/ports/xa51/uCsim.cmd @@ -0,0 +1,5 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +run diff --git a/support/regression/ports/z80/spec.mk b/support/regression/ports/z80/spec.mk new file mode 100644 index 0000000..8977742 --- /dev/null +++ b/support/regression/ports/z80/spec.mk @@ -0,0 +1,42 @@ +# Port specification for the z80 port running ontop of the Java based +# 'ConsoleZ80' emulator. + +RRZ80 = $(SDCC_EXTRA_DIR)/emu/rrz80/rrz80 + +SDCCFLAGS +=-mz80 --nostdinc --less-pedantic --profile -DREENTRANT= -I$(top_srcdir) +LINKFLAGS = --nostdlib +LINKFLAGS += z80.lib +LIBDIR = $(top_builddir)/device/lib/build/z80 + +EXEEXT = .bin + +# Needs parts of gbdk-lib, namely the internal mul/div/mod functions. +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) + +# Rule to generate a Emulator .bin file from the .ihx linker output. +%$(EXEEXT): %.ihx + $(top_builddir)/bin/makebin -s 32768 < $< > $@ + +# Rule to link into .ihx +%.ihx: %.c $(EXTRAS) + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) -L$(LIBDIR) $(EXTRAS) $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.asm + $(top_builddir)/bin/as-z80 -plosgff $@ $< + +%$(OBJEXT): %.s + $(top_builddir)/bin/as-z80 -plosgff $@ $< + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +# PENDING: Path to sdcc-extra +%.out: %$(EXEEXT) + mkdir -p $(dir $@) + $(RRZ80) --maxruntime=3 --mapfile=$(<:.bin=.sym) $< > $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/z80/support.asm b/support/regression/ports/z80/support.asm new file mode 100644 index 0000000..c16fa2a --- /dev/null +++ b/support/regression/ports/z80/support.asm @@ -0,0 +1,12 @@ + .area _CODE + .globl _putchar + .globl _exit + +__putchar:: + jp _putchar + +__initEmu:: + ret + +__exitEmu:: + jp _exit diff --git a/support/regression/tests/absolute.c b/support/regression/tests/absolute.c new file mode 100644 index 0000000..3f0598e --- /dev/null +++ b/support/regression/tests/absolute.c @@ -0,0 +1,58 @@ +/** Absolute addressing tests. + + mem: code, xdata +*/ +#include + +#ifdef SDCC_pic16 +# define ADDRESS(x) (0x02 ## x) +#else +# define ADDRESS(x) (0xCA ## x) +#endif + +typedef struct +{ + int a,b; +} TestStruct; + +{mem} volatile at(ADDRESS(BC)) TestStruct TestVar = {0,0}; +{mem} at(ADDRESS(B7)) char u; +{mem} at(ADDRESS(B7)) char x = 'x'; +{mem} at(ADDRESS(B9)) char y = 'y'; +{mem} at(ADDRESS(B0)) int k = 0x1234; + +char z = 'z'; + +void +testAbsolute(void) +{ +#if defined(SDCC_mcs51) || defined(SDCC_ds390) || defined(SDCC_hc08) + static {mem} at(ADDRESS(B6)) char s = 's'; + char {mem} *pC = (char {mem} *)(ADDRESS(B0)); + int {mem} *pI = (int {mem} *)(ADDRESS(B0)); + + ASSERT(u == 'x'); + ASSERT(pC[7] == 'x'); + ASSERT(pC[9] == 'y'); + ASSERT(pC[6] == 's'); + ASSERT(pI[0] == 0x1234); +#endif +} + +#if defined(SDCC_mcs51) || defined(SDCC_ds390) +volatile data at(0x20) unsigned char Byte0 = 0x00; +volatile data at(0x22) unsigned char Byte1 = 0x00; +volatile bit Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7, Bit8; +#endif + +void +testAbsBdata(void) +{ +#if defined(SDCC_mcs51) || defined(SDCC_ds390) + Bit0 = 1; + ASSERT(Byte0 == 0x00); + Byte0 = 0xFF; + Bit0 = 0; + ASSERT(Byte0 == 0xFF); +#endif +} diff --git a/support/regression/tests/addsub.c b/support/regression/tests/addsub.c new file mode 100644 index 0000000..3fb3dc1 --- /dev/null +++ b/support/regression/tests/addsub.c @@ -0,0 +1,73 @@ +/** Add, sub tests. + + type: signed char, int, long + storage: static, + attr: volatile +*/ +#include + +void +testAdd(void) +{ + {storage} {attr} {type} left, right, result; + + left = 5; + right = 26; + + result = left+right; + ASSERT(result == 31); + + left = 39; + right = -120; + + result = left+right; + ASSERT(result == (39-120)); + + left = -39; + right = 80; + + result = left+right; + ASSERT(result == (-39+80)); + + left = -39; + right = -70; + + result = left+right; + ASSERT(result == (-39-70)); + + result += 0xab00; + ASSERT(result == ({type})(0xab00-39-70)); +} + +void +testSub(void) +{ + {storage} {attr} {type} left, right, result; + + left = 5; + right = 26; + + result = left-right; + ASSERT(result == (5-26)); + + left = 39; + right = -76; + + result = left-right; + ASSERT(result == (39+76)); + + left = -12; + right = 56; + + result = left-right; + ASSERT(result == (-12-56)); + + left = -39; + right = -20; + + result = left-right; + ASSERT(result == (-39+20)); + + result = left-(signed)0x1200; + ASSERT(result == ({type})(-39-(signed)0x1200)); +} diff --git a/support/regression/tests/args.c b/support/regression/tests/args.c new file mode 100644 index 0000000..9754344 --- /dev/null +++ b/support/regression/tests/args.c @@ -0,0 +1,46 @@ +/** Tests argument passing to functions. + Assumes that up to the first two arguments can be passed in registers. + + type1: char, int, long + type2: char, int, long + type3: char, int, long + */ +#include + +static {type1} +returnFirstArg({type1} arg1, {type2} arg2, {type3} arg3) +{ + UNUSED(arg2); + UNUSED(arg3); + return arg1; +} + +static {type2} +returnSecondArg({type1} arg1, {type2} arg2, {type3} arg3) +{ + UNUSED(arg1); + UNUSED(arg3); + return arg2; +} + +static {type3} +returnThirdArg({type1} arg1, {type2} arg2, {type3} arg3) +{ + UNUSED(arg1); + UNUSED(arg2); + return arg3; +} + +static void +testArgs(void) +{ + ASSERT(returnFirstArg(123, 45, 67) == 123); + ASSERT(returnFirstArg(-123, 45, 67) == -123); + + ASSERT(returnSecondArg(1, -23, 64) == -23); + ASSERT(returnSecondArg(1, 8, 64) == 8); + + ASSERT(returnThirdArg(-33, -34, -35) == -35); + ASSERT(returnThirdArg(-33, -34, 35) == 35); + +} diff --git a/support/regression/tests/arithcse.c b/support/regression/tests/arithcse.c new file mode 100644 index 0000000..582b9e9 --- /dev/null +++ b/support/regression/tests/arithcse.c @@ -0,0 +1,50 @@ +/* Test arithmetic CSE with /+-* + + type: char, short, long + attr: volatile, + */ + +#include + +void +test_arithCse(void) +{ + {attr} {type} res; + {attr} {type} i = 10; + + /* addition with 0 */ + res = i + 0; + ASSERT (i == 10); + + res = 0 + i; + ASSERT (res == 10); + + /* multiplication with 1 */ + res = 1 * i; + ASSERT (res == 10); + + res = i * 1; + ASSERT (res == 10); + + /* multiplication with 0 */ + res = 0 * i; + ASSERT (res == 0); + + res = i * 0; + ASSERT (res == 0); + + /* multiplication with -1 */ + res = -1 * i; + ASSERT (res == -i); + + res = i * -1; + ASSERT (res == -i); + + /* division by 1 */ + res = i / 1; + ASSERT (res == i); + + /* division by -1 */ + res = i / -1; + ASSERT (res == -i); +} \ No newline at end of file diff --git a/support/regression/tests/array.c b/support/regression/tests/array.c new file mode 100644 index 0000000..cf8f645 --- /dev/null +++ b/support/regression/tests/array.c @@ -0,0 +1,53 @@ +/** array test + type: char, int + storage: xdata, code, +*/ +#include + +#define TC(x) (0x10+(x)) +#define TI(x) (0x1020+(x) + 0x100*(x)) +#define TL(x) (0x10203040+(x)) + +const {storage} unsigned char array_const_char[4] = {TC(0), TC(1), TC(2), TC(3)}; +const {storage} unsigned int array_const_int [4] = {TI(0), TI(1), TI(2), TI(3)}; +const {storage} unsigned long array_const_long[4] = {TL(0), TL(1), TL(2), TL(3)}; + +unsigned char array_char[4] = {TC(0), TC(1), TC(2), TC(3)}; +unsigned int array_int [4] = {TI(0), TI(1), TI(2), TI(3)}; +unsigned long array_long[4] = {TL(0), TL(1), TL(2), TL(3)}; + +volatile unsigned {type} idx; +volatile unsigned {type} idx2; + +void +testArrayAccess(void) +{ + idx = 2; + + ASSERT(array_const_char[idx] == TC(2)); + ASSERT(array_const_int [idx] == TI(2)); + ASSERT(array_const_long[idx] == TL(2)); + + ASSERT(array_const_char[2] == TC(2)); + ASSERT(array_const_int [2] == TI(2)); + ASSERT(array_const_long[2] == TL(2)); + + ASSERT(array_char[idx] == TC(2)); + ASSERT(array_int [idx] == TI(2)); + ASSERT(array_long[idx] == TL(2)); + + ASSERT(array_char[2] == TC(2)); + ASSERT(array_int [2] == TI(2)); + ASSERT(array_long[2] == TL(2)); + + idx = 3; + idx2 = 1; + + array_char[idx2] = array_const_char[idx] | 0x80; + array_int [idx2] = array_const_int [idx] | 0x8080; + array_long[idx2] = array_const_long[idx] | 0x80808080; + + ASSERT(array_char[idx2] == (TC(3) | 0x80)); + ASSERT(array_int [idx2] == (TI(3) | 0x8080)); + ASSERT(array_long[idx2] == (TL(3) | 0x80808080)); +} diff --git a/support/regression/tests/ast_constant_folding.c b/support/regression/tests/ast_constant_folding.c new file mode 100644 index 0000000..66767af --- /dev/null +++ b/support/regression/tests/ast_constant_folding.c @@ -0,0 +1,79 @@ +/* Test ast_constant_folding() in SDCCast.c + */ +#include + +volatile unsigned i; + +unsigned +foo_aa (void) +{ + return i + 5 + i - i + 12; +} + +unsigned +foo_asr (void) +{ + return i - 5 + i + i + 12; +} + +unsigned +foo_asl (void) +{ + return 5 - i + i + 12; +} + +unsigned +foo_ssr (void) +{ + return i - 5 - i - i - 12; +} + +unsigned +foo_ssl (void) +{ + return 5 - i - i - 12; +} +unsigned +foo_sa (void) +{ + return i + 5 - i - i - 12; +} + +unsigned +foo_mul (void) +{ + return 5 * i * i * 12; +} + +unsigned +foo_div (void) +{ + return 33971u / i / 5 / i / i / 12; +} + +unsigned +foo_or (void) +{ + return 5 | i | i | 12; +} + +unsigned +foo_and (void) +{ + return 5 & i & i & 12; +} + +void +test_ast_cf(void) +{ + i = 30; ASSERT(foo_aa () == 47); + ASSERT(foo_asr() == 97); + ASSERT(foo_asl() == 17); + ASSERT(foo_ssr() == -47); + ASSERT(foo_ssl() == -67); + ASSERT(foo_sa () == -37); + ASSERT(foo_mul() == 54000); + i = 3; ASSERT(foo_div() == 20); + i = 3; ASSERT(foo_or () == 15); + i = 7; ASSERT(foo_and() == 4); +} diff --git a/support/regression/tests/bitfields.c b/support/regression/tests/bitfields.c new file mode 100644 index 0000000..2744094 --- /dev/null +++ b/support/regression/tests/bitfields.c @@ -0,0 +1,430 @@ +/** Bitfield tests. + + SDCC pic16 port currently does not support bitfields of size > 8, + so they are ifdefed out. +*/ +#include + +struct { + char c0_3 : 3; + char c3_5 : 5; +} c_bf; + +#if !defined(SDCC_pic16) +struct { + int i0_7 : 7; + int i7_9 : 9; +} i_bf; + +struct { + long l0_7 : 7; + long l7_10 : 10; + long l17_15 : 15; +} l_bf; + +struct { + unsigned int b0 : 1; + unsigned int b1 : 1; + unsigned int b2 : 1; + unsigned int b3 : 1; + unsigned int b4 : 1; + unsigned int b5 : 1; + unsigned int b6 : 1; + unsigned int b7 : 1; + unsigned int b8 : 1; + unsigned int b9 : 1; +} sb_bf; +#endif /* !SDCC_pic16 */ + +struct { + unsigned int b0 : 1; + unsigned int b2 : 1; +} size1a_bf; + +struct { + unsigned int b0 : 1; + unsigned int b1 : 1; + unsigned int : 0; +} size1b_bf; + +struct { + unsigned int b0 : 1; + unsigned int b1 : 1; + unsigned int b2 : 6; +} size1c_bf; + +struct { + unsigned int b0 : 1; + unsigned int : 0; + unsigned int b1 : 1; +} size2a_bf; + +#if !defined(SDCC_pic16) +struct { + unsigned int b0 : 1; + unsigned int b1 : 1; + unsigned int b2 : 1; + unsigned int b3 : 1; + unsigned int b4 : 1; + unsigned int b5 : 1; + unsigned int b6 : 1; + unsigned int b7 : 1; + unsigned int b8 : 1; + unsigned int b9 : 1; +} size2b_bf; + +struct { + unsigned int b0 : 4; + unsigned int b1 : 5; +} size2c_bf; + +struct { + unsigned int b0 : 12; + unsigned int b1 : 3; +} size2d_bf; + +struct { + unsigned int b0 : 3; + unsigned int b1 : 12; +} size3a_bf; + + +struct { + signed int s0_7 : 7; + signed int s7_1 : 1; + signed int s8_9 : 9; +} s_bf; +#endif /* !SDCC_pic16 */ + +void +testBitfieldSizeof(void) +{ + /* Although bitfields are extremely implementation dependant, these + assertions should hold for all implementations with storage units + of 8 bits or larger (nearly universal). + */ + ASSERT( sizeof(size1a_bf) >= 1); + ASSERT( sizeof(size1b_bf) >= 1); + ASSERT( sizeof(size1c_bf) >= 1); +#if !defined(SDCC_pic16) + ASSERT( sizeof(size2b_bf) >= 2); + ASSERT( sizeof(size2c_bf) >= 2); + ASSERT( sizeof(size2d_bf) >= 2); + ASSERT( sizeof(size3a_bf) >= 2); + ASSERT( sizeof(size1a_bf) <= sizeof(size1b_bf)); +#endif /* !SDCC_pic16 */ + /* Some SDCC specific assertions. SDCC uses 8 bit storage units. + Bitfields that are less than 8 bits, but would (due to earlier + bitfield declarations) span a storage unit boundary are + realigned to the next storage unit boundary. Bitfields of + 8 or greater bits are always aligned to start on a storage + unit boundary. + */ +#ifdef SDCC + ASSERT( sizeof(size1a_bf) == 1); + ASSERT( sizeof(size1b_bf) == 1); + ASSERT( sizeof(size1c_bf) == 1); + ASSERT( sizeof(size2a_bf) == 2); +#if !defined(SDCC_pic16) + ASSERT( sizeof(size2b_bf) == 2); + ASSERT( sizeof(size2c_bf) == 2); + ASSERT( sizeof(size2d_bf) == 2); + ASSERT( sizeof(size3a_bf) == 3); +#endif /* !SDCC_pic16 */ +#endif +} + + +void +testBitfieldsSingleBitLiteral(void) +{ +#if !defined(SDCC_pic16) + size2b_bf.b0 = 0; + size2b_bf.b1 = 0; + size2b_bf.b2 = 0; + size2b_bf.b3 = 0; + size2b_bf.b4 = 0; + size2b_bf.b5 = 0; + size2b_bf.b6 = 0; + size2b_bf.b7 = 0; + size2b_bf.b8 = 0; + size2b_bf.b9 = 0; + + /* make sure modulo 2 truncation works */ + size2b_bf.b0 = 0x3fe; + ASSERT(size2b_bf.b0==0); + ASSERT(size2b_bf.b1==0); + ASSERT(size2b_bf.b2==0); + ASSERT(size2b_bf.b3==0); + ASSERT(size2b_bf.b4==0); + ASSERT(size2b_bf.b5==0); + ASSERT(size2b_bf.b6==0); + ASSERT(size2b_bf.b7==0); + ASSERT(size2b_bf.b8==0); + ASSERT(size2b_bf.b9==0); + size2b_bf.b0 = 0x3ff; + ASSERT(size2b_bf.b0==1); + ASSERT(size2b_bf.b1==0); + ASSERT(size2b_bf.b2==0); + ASSERT(size2b_bf.b3==0); + ASSERT(size2b_bf.b4==0); + ASSERT(size2b_bf.b5==0); + ASSERT(size2b_bf.b6==0); + ASSERT(size2b_bf.b7==0); + ASSERT(size2b_bf.b8==0); + ASSERT(size2b_bf.b9==0); + + /* make sure both bytes work */ + size2b_bf.b9 = 0x3ff; + ASSERT(size2b_bf.b0==1); + ASSERT(size2b_bf.b1==0); + ASSERT(size2b_bf.b2==0); + ASSERT(size2b_bf.b3==0); + ASSERT(size2b_bf.b4==0); + ASSERT(size2b_bf.b5==0); + ASSERT(size2b_bf.b6==0); + ASSERT(size2b_bf.b7==0); + ASSERT(size2b_bf.b8==0); + ASSERT(size2b_bf.b9==1); +#endif /* !SDCC_pic16 */ +} + +void +testBitfieldsSingleBit(void) +{ +#if !defined(SDCC_pic16) + volatile unsigned char c; + + c = 0; + size2b_bf.b0 = c; + size2b_bf.b1 = c; + size2b_bf.b2 = c; + size2b_bf.b3 = c; + size2b_bf.b4 = c; + size2b_bf.b5 = c; + size2b_bf.b6 = c; + size2b_bf.b7 = c; + size2b_bf.b8 = c; + size2b_bf.b9 = c; + + /* make sure modulo 2 truncation works */ + c = 0xfe; + size2b_bf.b0 = c; + ASSERT(size2b_bf.b0==0); + ASSERT(size2b_bf.b1==0); + ASSERT(size2b_bf.b2==0); + ASSERT(size2b_bf.b3==0); + ASSERT(size2b_bf.b4==0); + ASSERT(size2b_bf.b5==0); + ASSERT(size2b_bf.b6==0); + ASSERT(size2b_bf.b7==0); + ASSERT(size2b_bf.b8==0); + ASSERT(size2b_bf.b9==0); + c++; + size2b_bf.b0 = c; + ASSERT(size2b_bf.b0==1); + ASSERT(size2b_bf.b1==0); + ASSERT(size2b_bf.b2==0); + ASSERT(size2b_bf.b3==0); + ASSERT(size2b_bf.b4==0); + ASSERT(size2b_bf.b5==0); + ASSERT(size2b_bf.b6==0); + ASSERT(size2b_bf.b7==0); + ASSERT(size2b_bf.b8==0); + ASSERT(size2b_bf.b9==0); + + /* make sure both bytes work */ + size2b_bf.b9 = c; + ASSERT(size2b_bf.b0==1); + ASSERT(size2b_bf.b1==0); + ASSERT(size2b_bf.b2==0); + ASSERT(size2b_bf.b3==0); + ASSERT(size2b_bf.b4==0); + ASSERT(size2b_bf.b5==0); + ASSERT(size2b_bf.b6==0); + ASSERT(size2b_bf.b7==0); + ASSERT(size2b_bf.b8==0); + ASSERT(size2b_bf.b9==1); +#endif /* !SDCC_pic16 */ +} + +void +testBitfieldsMultibitLiteral(void) +{ +#if !defined(SDCC_pic16) + size2c_bf.b0 = 0xff; /* should truncate to 0x0f */ + size2c_bf.b1 = 0; + ASSERT(size2c_bf.b0==0x0f); + ASSERT(size2c_bf.b1==0); + + size2c_bf.b1 = 0xff; /* should truncate to 0x1f */ + size2c_bf.b0 = 0; + ASSERT(size2c_bf.b0==0); + ASSERT(size2c_bf.b1==0x1f); + + size2c_bf.b0 = 0xff; /* should truncate to 0x0f */ + size2c_bf.b1 = 0xff; /* should truncate to 0x1f */ + ASSERT(size2c_bf.b0==0x0f); + ASSERT(size2c_bf.b1==0x1f); + + size2d_bf.b0 = 0xffff; /* should truncate to 0x0fff */ + size2d_bf.b1 = 0; + ASSERT(size2d_bf.b0==0x0fff); + ASSERT(size2d_bf.b1==0); + + size2d_bf.b1 = 0xffff; /* should truncate to 0x07 */ + size2d_bf.b0 = 0; + ASSERT(size2d_bf.b0==0); + ASSERT(size2d_bf.b1==0x07); + + size2d_bf.b0 = 0xffff; /* should truncate to 0x0fff */ + size2d_bf.b1 = 0xffff; /* should truncate to 0x07 */ + ASSERT(size2d_bf.b0==0x0fff); + ASSERT(size2d_bf.b1==0x07); + + size2d_bf.b0 = 0x0321; + size2d_bf.b1 = 1; + ASSERT(size2d_bf.b0==0x0321); + ASSERT(size2d_bf.b1==1); + + size2d_bf.b0 = 0x0a46; + size2d_bf.b1 = 5; + ASSERT(size2d_bf.b0==0x0a46); + ASSERT(size2d_bf.b1==5); +#endif /* !SDCC_pic16 */ +} + +void +testBitfieldsMultibit(void) +{ +#if !defined(SDCC_pic16) + volatile int allones = 0xffff; + volatile int zero = 0; + volatile int x; + + size2c_bf.b0 = allones; /* should truncate to 0x0f */ + size2c_bf.b1 = zero; + ASSERT(size2c_bf.b0==0x0f); + ASSERT(size2c_bf.b1==0); + + size2c_bf.b1 = allones; /* should truncate to 0x1f */ + size2c_bf.b0 = zero; + ASSERT(size2c_bf.b0==0); + ASSERT(size2c_bf.b1==0x1f); + + size2d_bf.b0 = allones; /* should truncate to 0x0fff */ + size2d_bf.b1 = zero; + ASSERT(size2d_bf.b0==0x0fff); + ASSERT(size2d_bf.b1==0); + + size2d_bf.b1 = allones; /* should truncate to 0x07 */ + size2d_bf.b0 = zero; + ASSERT(size2d_bf.b0==0); + ASSERT(size2d_bf.b1==0x07); + + x = 0x0321; + size2d_bf.b0 = x; + x = 1; + size2d_bf.b1 = x; + ASSERT(size2d_bf.b0==0x0321); + ASSERT(size2d_bf.b1==1); + + x = 0x0a46; + size2d_bf.b0 = x; + x = 5; + size2d_bf.b1 = x; + ASSERT(size2d_bf.b0==0x0a46); + ASSERT(size2d_bf.b1==5); +#endif /* !SDCC_pic16 */ +} + +void +testBitfields(void) +{ + c_bf.c0_3 = 2; + c_bf.c3_5 = 3; +#if defined(PORT_HOST) && (defined(__ppc__) || defined(__PPC__)) + /* bitfields on powerpc architecture are allocated from left to right */ + ASSERT(*(char *)(&c_bf) == ((2<<(8-3)) + 3) ); +#else + ASSERT(*(char *)(&c_bf) == (2 + (3<<3)) ); +#endif + +#if 0 // not yet + i_bf.i0_7 = 23; + i_bf.i7_9 = 234; + ASSERT(*(int *)(&i_bf) == (23 + (234<<7)) ); + + l_bitfield.l0_7 = 23; + l_bitfield.l7_10 = 234; + l_bitfield.l17_15 = 2345; + ASSERT(*(long *)(&l_bf) == (23 + (234<<7) + (2345<<17)) ); +#endif +} + +void +testSignedBitfields(void) +{ +#if !defined(SDCC_pic16) + s_bf.s0_7 = 0xf0; + s_bf.s7_1 = 1; + s_bf.s8_9 = 0xfff8; + ASSERT(s_bf.s0_7 == -16); + ASSERT(s_bf.s7_1 == - 1); + ASSERT(s_bf.s8_9 == - 8); + ASSERT(s_bf.s0_7 < 0); + ASSERT(s_bf.s7_1 < 0); + ASSERT(s_bf.s8_9 < 0); + + s_bf.s0_7 = 0x3f; + s_bf.s7_1 = 2; + s_bf.s8_9 = 0x00ff; + ASSERT(s_bf.s0_7 == 0x3f); + ASSERT(s_bf.s7_1 == 0); + ASSERT(s_bf.s8_9 == 0xff); + ASSERT(s_bf.s0_7 > 0); + ASSERT(s_bf.s8_9 > 0); +#endif /* !SDCC_pic16 */ +} + +/* test case for enhancement request #2291335 : Unnamed bit-field initialization */ + +struct s2291335_1 { + int a : 2; + char : 2; + int b : 2; +}; + +struct s2291335_2 { + int a : 2; + char : 0; + int b : 2; +}; + +struct s2291335_1 gs2291335_1 = {1, 2}; +struct s2291335_2 gs2291335_2 = {1, 2}; + +void +__test2291335(void) +{ + struct s2291335_1 ls2291335_1 = {1, 2}; + struct s2291335_2 ls2291335_2 = {1, 2}; + + ASSERT(gs2291335_1.a == 1); + ASSERT(gs2291335_1.b == 2); + ASSERT(gs2291335_2.a == 1); + ASSERT(gs2291335_2.b == 2); + + ASSERT(ls2291335_1.a == 1); + ASSERT(ls2291335_1.b == 2); + ASSERT(ls2291335_2.a == 1); + ASSERT(ls2291335_2.b == 2); +} + +/* test case for bug #2366757: segfault when initializing structure with bitfield */ + +struct +{ + char a : 1; + char b : 1; +} s2366757 = {0}; diff --git a/support/regression/tests/bitopcse.c b/support/regression/tests/bitopcse.c new file mode 100644 index 0000000..23f0571 --- /dev/null +++ b/support/regression/tests/bitopcse.c @@ -0,0 +1,147 @@ +/* Test CSE with |&^ + + type: bool, char, short, long + */ +#include +#include + +/* This is not only a regression test, the focus of this test + is more on the generated code (volatile!). */ + +#define TYPE_{type} + +#if defined(TYPE_bool) && !defined(SDCC) +# define UNSIGNED +#else +# define UNSIGNED unsigned +#endif + +#if defined(TYPE_bool) +# define _data +#else +# define _data idata +#endif + +#if defined(TYPE_bool) && defined(__bool_true_false_are_defined) +# define MASK 1 +#elif defined(TYPE_bool) && !defined(__bool_true_false_are_defined) +# if defined(PORT_HOST) +# define MASK 0xffffffff +# else +# define MASK 0xffff +# endif +# define bool int +#elif defined(TYPE_char) +# define MASK 0xff +#elif defined(TYPE_short) +# define MASK 0xffff +#elif defined(TYPE_long) +# define MASK 0xffffffff +#else +# warning Unknown type +#endif + +/* the variable 'mask' is only defined to see if MASK is correctly set up */ +const unsigned long mask = MASK; + + volatile {type} v; + volatile UNSIGNED {type} uv; +/* an array would be nicer, but an array of bits isn't possible */ +_data {type} a0 , a1 , a2 , a3 , a4 , a5 , a6 , a7 , a8 , a9 , + a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, + a20; +_data UNSIGNED {type} ua0, ua1, ua2, ua3, ua4, ua5, ua6; +_data {type} b; +_data volatile UNSIGNED {type} ub = 0xbe; + +void +testcse(void) +{ + b = 0xeb; + ub = 0xbe; + v = 0x33; + uv = 0x7b; + + a0 = 0 & b; + a1 = 0 & v; + + a2 = MASK & b; + a3 = MASK & v; + ua0 = MASK & ub; + ua1 = MASK & uv; + + a4 = b & b; + a5 = v & v; + + a6 &= 0; + v &= 0; + a7 &= MASK; + v &= MASK; + ua2 &= MASK; + uv &= MASK; + + + a8 = 0 | b; + a9 = 0 | v; + + a10 = MASK | b; + a11 = MASK | v; + ua3 = MASK | ub; + ua4 = MASK | uv; + + a12 = b | b; + a13 = v | v; + + a14 |= 0; + v |= 0; + a15 |= MASK; + v |= MASK; + ua5 |= MASK; + uv |= MASK; + + + a16 = 0 ^ b; + a17 = 0 ^ v; + + a18 = b ^ b; + a19 = v ^ v; + + a20 ^= 0; + v ^= 0; + + ASSERT( a0 == 0); + ASSERT( a1 == 0); + ASSERT( a2 == b); +#if defined(TYPE_bool) && defined(__bool_true_false_are_defined) + ASSERT( a3 == 1); + ASSERT(ua1 == 1); + ASSERT( a5 == 1); +#else + ASSERT( a3 == ({type}) 0x33); + ASSERT(ua1 == ({type}) 0x7b); + ASSERT( a5 == ({type}) 0x33); +#endif + ASSERT(ua0 == ub); + ASSERT( a4 == b); + ASSERT( a6 == 0); + // ASSERT( a7 == ); + // ASSERT(ua2 == ); + ASSERT( a8 == b); + ASSERT( a9 == 0); + ASSERT( a10 == ({type}) MASK); + ASSERT( a11 == ({type}) MASK); + ASSERT(ua3 == MASK); + ASSERT(ua4 == MASK); + ASSERT( a12 == b); + ASSERT( a13 == 0); + // ASSERT( a14 == ); + ASSERT( a15 == ({type}) MASK); + ASSERT(ua5 == MASK); + ASSERT( a16 == b); + ASSERT( a17 == ({type}) MASK); + ASSERT( a18 == 0); + ASSERT( a19 == 0); + // ASSERT( a20 == ); + ASSERT( v == ({type}) MASK); + ASSERT(uv == MASK); +} diff --git a/support/regression/tests/bitvars.c b/support/regression/tests/bitvars.c new file mode 100644 index 0000000..d1ca006 --- /dev/null +++ b/support/regression/tests/bitvars.c @@ -0,0 +1,59 @@ +/** Bit vars test. + + type: bool, char, unsigned char, unsigned short, unsigned long +*/ + +#include +#include + +#ifndef PORT_HOST +#pragma disable_warning 180 //no warning about using complement on bit/unsigned char +#endif + +#ifdef __bool_true_false_are_defined + +#define TYPE_{type} + +char foo(bool a, bool b, char c) +{ + return a + b + c; +} + +char complement(bool a, bool b) +{ + return (a == b); +} + +{type} _0 = 0, _1 = 1, _ff = 0xFF, _ffff = -1; + +#endif //__bool_true_false_are_defined + +void +testBits(void) +{ +#ifdef __bool_true_false_are_defined + bool x = 2; + ASSERT (foo(x,3,4) == 6); + + ASSERT (complement (~_0, 1)); + ASSERT (complement (~_1, 1)); + +#if defined TYPE_char + ASSERT (complement (~_ff, 0)); +#else + ASSERT (complement (~_ff, 1)); +#endif + +#if defined TYPE_bool + ASSERT (complement (~_ffff, 1)); +#elif defined TYPE_char + ASSERT (complement (~_ffff, 0)); +#else + if (sizeof({type}) < sizeof(int)) + ASSERT (complement (~_ffff, 1)); + else + ASSERT (complement (~_ffff, 0)); +#endif + +#endif //__bool_true_false_are_defined +} diff --git a/support/regression/tests/bitwise.c b/support/regression/tests/bitwise.c new file mode 100644 index 0000000..4ee3a7f --- /dev/null +++ b/support/regression/tests/bitwise.c @@ -0,0 +1,322 @@ +/** Test the bitwise operators. + + type: char, short, long + attr: volatile, + storage: static, + */ +#include + +static void +testTwoOpBitwise(void) +{ + {storage} {attr} {type} left, right; + + left = ({type})0x3df7; + right = ({type})0xc1ec; + + ASSERT(({type})(left & right) == ({type})0x1E4); + ASSERT(({type})(right & left) == ({type})0x1E4); + ASSERT(({type})(left & 0xc1ec) == ({type})0x1E4); + ASSERT(({type})(0x3df7 & right) == ({type})0x1E4); + + ASSERT(({type})(left | right) == ({type})0xFDFF); + ASSERT(({type})(right | left) == ({type})0xFDFF); + ASSERT(({type})(left | 0xc1ec) == ({type})0xFDFF); + ASSERT(({type})(0x3df7 | right) == ({type})0xFDFF); + + ASSERT(({type})(left ^ right) == ({type})0xFC1B); + ASSERT(({type})(right ^ left) == ({type})0xFC1B); + ASSERT(({type})(left ^ 0xc1ec) == ({type})0xFC1B); + ASSERT(({type})(0x3df7 ^ right) == ({type})0xFC1B); + +#if defined (__alpha__) || defined (__x86_64__) + /* long is 64 bits on 64 bit machines */ + ASSERT(({type})(~left) == ({type})0xFFFFFFFFFFFFC208); +#else + ASSERT(({type})(~left) == ({type})0xFFFFC208); +#endif +} + +void +testAnd(void) +{ + char res; + {attr} int a; + + /* always false if right literal == 0 */ +#if 0 + // fails on pic16 + if (a & 0) + res = 1; + else + res = 0; + ASSERT(res = 0); + + a = 0x1234; + + if (a & 0) + res = 1; + else + res = 0; + ASSERT(res = 0); +#endif + + /* + * result: if, left: var, right: literal + */ + a = 0x1234; + + if (a & 0x4321) + res = 1; + else + res = 0; + ASSERT(res == 1); + + if (a & 0x4321) + /* nothing for true */ + ; + else + res = 0; + ASSERT(res == 1); + + if (!(a & 0x4321)) + res = 1; + else + res = 0; + ASSERT(res == 0); + + if (!(a & 0x4321)) + /* nothing for true */ + ; + else + res = 0; + ASSERT(res == 0); + + /* bitmask literal */ + a = 0xffff; + + if (a & 0x1004) + res = 1; + else + res = 0; + ASSERT(res == 1); + + if (!(a & 0x1004)) + res = 1; + else + res = 0; + ASSERT(res == 0); + + a = 0x0000; + + if (a & 0x1004) + res = 1; + else + res = 0; + ASSERT(res == 0); + + if (!(a & 0x1004)) + res = 1; + else + res = 0; + ASSERT(res == 1); + + a = 0x00ff; + + if (a & 0x1004) + res = 1; + else + res = 0; + ASSERT(res == 1); + + if (!(a & 0x1004)) + res = 1; + else + res = 0; + ASSERT(res == 0); + + a = 0xff00; + + if (a & 0x1004) + res = 1; + else + res = 0; + ASSERT(res == 1); + + if (!(a & 0x1004)) + res = 1; + else + res = 0; + ASSERT(res == 0); + + /* literal with zero bytes */ + a = 0x1234; + + if (a & 0x4300) + res = 1; + else + res = 0; + ASSERT(res == 1); + + if (a & 0x0012) + res = 1; + else + res = 0; + ASSERT(res == 1); + + if (!(a & 0x4300)) + res = 1; + else + res = 0; + ASSERT(res == 0); + + if (!(a & 0x0012)) + res = 1; + else + res = 0; + ASSERT(res == 0); + + /* + * result: bit, left: var, right: literal + */ +} + +void +testOr(void) +{ + char res; + {attr} int a = 0x1234; + + /* + * result: if, left: var, right: literal + */ + res = 1; + if (a | 0x4321) + /* nothing for true */ + ; + else + res = 0; + ASSERT(res == 1); + + if (!(a | 0x4321)) + /* nothing for true */ + ; + else + res = 0; + ASSERT(res == 0); + + if (a | 0x4321) + res = 1; + else + res = 0; + ASSERT(res == 1); + + if (!(a | 0x4321)) + res = 1; + else + res = 0; + ASSERT(res == 0); + + /* or with zero: result is left */ + res = 1; + + if (a | 0) + /* nothing for true */ + ; + else + res = 0; + ASSERT(res == 1); + + res = 1; + + if (!(a | 0)) + /* nothing for true */ + ; + else + res = 0; + ASSERT(res == 0); + + if (a | 0) + res = 1; + else + res = 0; + ASSERT(res == 1); + + if (!(a | 0)) + res = 1; + else + res = 0; + ASSERT(res == 0); +} + +void +testXor(void) +{ + char res; + {attr} int a = 0x1234; + + /* + * result: if, left: var, right: literal + */ + if (a ^ 0x4321) + res = 1; + else + res = 0; + ASSERT(res == 1); + + if (a ^ 0x4321) + /* nothing for true */ + ; + else + res = 0; + ASSERT(res == 1); + + if (!(a ^ 0x4321)) + res = 1; + else + res = 0; + ASSERT(res == 0); + + if (!(a ^ 0x4321)) + /* nothing for true */ + ; + else + res = 0; + ASSERT(res == 0); + + /* literal with 0xff bytes */ + if (a ^ 0xff04) + res = 1; + else + res = 0; + ASSERT(res == 1); + + if (!(a ^ 0xff04)) + res = 1; + else + res = 0; + ASSERT(res == 0); + + /* literal with zero bytes */ + if (a ^ 0x0004) + res = 1; + else + res = 0; + ASSERT(res == 1); + + if (!(a ^ 0x0004)) + res = 1; + else + res = 0; + ASSERT(res == 0); +} + +static void +testBug_1777758(void) +{ + char ep = -1; + + ep &= ~0x80; + + ASSERT(ep == 127); +} diff --git a/support/regression/tests/bp.c b/support/regression/tests/bp.c new file mode 100644 index 0000000..029ee31 --- /dev/null +++ b/support/regression/tests/bp.c @@ -0,0 +1,59 @@ +/* Base pointer tests, specifically for the z80. + */ +#include +#include + +int +verifyBlock(char *p, char val, int len) +{ + while (len--) { + if (*p++ != val) { + return 0; + } + } + return 1; +} + +int +spoil(int a) +{ + return a; +} + +#if defined(SDCC_mcs51) || defined(SDCC_pic16) + +// test devices with much less memory +#define ABOVE_MEM_SIZE 30 +#define ABOVE_MEM_TEST_SIZE 17 +#define BELOW_MEM_SIZE 20 +#define BELOW_MEM_TEST_SIZE 7 + +#else + +#define ABOVE_MEM_SIZE 400 +#define ABOVE_MEM_TEST_SIZE 17 +#define BELOW_MEM_SIZE 200 +#define BELOW_MEM_TEST_SIZE 74 + +#endif + +void +testBP(void) +{ + char above[ABOVE_MEM_SIZE]; + int f; + char below[BELOW_MEM_SIZE]; + + memset(above, ABOVE_MEM_TEST_SIZE, sizeof(above)); + memset(below, BELOW_MEM_TEST_SIZE, sizeof(below)); + + ASSERT(verifyBlock(above, ABOVE_MEM_TEST_SIZE, sizeof(above))); + ASSERT(verifyBlock(below, BELOW_MEM_TEST_SIZE, sizeof(below))); + + f = spoil(-5); + spoil(f); + + ASSERT(verifyBlock(above, ABOVE_MEM_TEST_SIZE, sizeof(above))); + ASSERT(verifyBlock(below, BELOW_MEM_TEST_SIZE, sizeof(below))); + +} diff --git a/support/regression/tests/bug-1029883.c b/support/regression/tests/bug-1029883.c new file mode 100644 index 0000000..eb2850f --- /dev/null +++ b/support/regression/tests/bug-1029883.c @@ -0,0 +1,64 @@ +/* Make sure global common subexpression optimization does not + inappropriately cache values across function calls. + + sign1: signed, unsigned + sign2: signed, unsigned + type: int + + */ +#include + +typedef struct +{ + {sign1} {type} field1; + {sign1} {type} *field2; + {sign1} {type} field3; +} struct1; + + +void +spoil({sign1} {type} val) +{ + UNUSED(val); +} + +void +inc1({sign1} {type} *valptr) +{ + (*valptr)++; +} + +{sign2} +gcse1({sign2} {type} target) +{ + spoil(target); + inc1(&target); + return target; +} + + +void +inc2(struct1 *s) +{ + (*s->field2)++; +} + +{sign2} +gcse2({sign2} {type} target) +{ + struct1 s; + + s.field2 = &s.field3; + *s.field2 = target; + spoil(s.field3); + inc2(&s); + return s.field3; +} + + +void +testgcse(void) +{ + ASSERT(gcse1(1)==2); + ASSERT(gcse2(1)==2); +} diff --git a/support/regression/tests/bug-1292721.c b/support/regression/tests/bug-1292721.c new file mode 100644 index 0000000..5623c52 --- /dev/null +++ b/support/regression/tests/bug-1292721.c @@ -0,0 +1,38 @@ +/* + bugs 1292721. +*/ + +#include + +char bar(void) +{ + static char ret = 0; + if(!ret) { + ret = 1; + return(0); + } + return(1); +} + +void +testBug156270(void) +{ + char aa, bb; + + aa = bar(); + + for (;;) { + + bb = bar(); + + if (!bb) + break; + + if (aa == 0) + return; + + ASSERT(0); + } + ASSERT(0); +} + diff --git a/support/regression/tests/bug-1294691.c b/support/regression/tests/bug-1294691.c new file mode 100644 index 0000000..b352873 --- /dev/null +++ b/support/regression/tests/bug-1294691.c @@ -0,0 +1,35 @@ +/* + bug-1294691.c +*/ + +#include + +unsigned char x = 1; +unsigned char y = 5; +int ret; + + +void +testBug(void) +{ + ret = 1; + + if (x) + { + if (y > 3) + { + if (y < 8) + { + } + } + else + { + } + } + else + { + ret = 0; + } + + ASSERT(ret == 1); +} diff --git a/support/regression/tests/bug-136564.c b/support/regression/tests/bug-136564.c new file mode 100644 index 0000000..f273153 --- /dev/null +++ b/support/regression/tests/bug-136564.c @@ -0,0 +1,79 @@ +/* + bug-136564.c + + loop induction +*/ + +#include + +volatile unsigned char p; +unsigned char i_result[3]; + +void +foo (void) +{ + unsigned char i; + unsigned char u; + static unsigned char c = '?'; + + u = 0; + while (1) + { + i = 0; + switch (u) + { + case 0: + /* this BBlock _case_0_0: + - changes i + - jumps to the successor "_swBrk_0" */ + p = 0; + i = 42; /* fixed: Absent in "main.asm" */ + break; + case 1: + /* the while loop: + - inducts i + - has the exit block "_swBrk_0" + sdcc inserts a new BBlock "loopExitLbl" before "_swBrk_0". + "loopExitLbl" becomes the new successor for the exit blocks of the while loop. + In "loopExitLbl" i can be restored without interference from + "_swBrk_0". */ + while (c != 'x' && i < 9 ) + i++; + break; + default: + p = 2; + i = 24; /* fixed: Absent in "main.asm" */ + } + p = i; + i_result[u] = i; + if (u >= 2) + return; + u++; + } +} + +int _strncmp ( + char * first, + char * last, + unsigned count + ) +{ + while (--count && *first && *first == *last) { + first++; + last++; + } + + return( *first - *last ); +} + +void +testInducion(void) +{ + foo(); + ASSERT(i_result[0] == 42); + ASSERT(i_result[1] == 9); + ASSERT(i_result[2] == 24); + + ASSERT(_strncmp ("SDCC is great", "SDCC is buggy", sizeof("SDCC is" )) == 0); + ASSERT(_strncmp ("SDCC is great", "SDCC is buggy", sizeof("SDCC is ")) != 0); +} diff --git a/support/regression/tests/bug-1376320.c b/support/regression/tests/bug-1376320.c new file mode 100644 index 0000000..5f92127 --- /dev/null +++ b/support/regression/tests/bug-1376320.c @@ -0,0 +1,15 @@ +/* bug-1376320.c + + copy signedness while replacing operands + */ +#include + +static void +testSign(void) +{ + signed long l; + + l = 3; + l -= 5ul; + ASSERT(l < 0); +} diff --git a/support/regression/tests/bug-1406131.c b/support/regression/tests/bug-1406131.c new file mode 100644 index 0000000..0e1651c --- /dev/null +++ b/support/regression/tests/bug-1406131.c @@ -0,0 +1,19 @@ +/* bug-1406131.c + + always false while-loop +*/ +#include + +void +testwhile(void) +{ + do + ; + while (0); + + while (0) + ; + + for (; 0; ) + ; +} diff --git a/support/regression/tests/bug-1408066.c b/support/regression/tests/bug-1408066.c new file mode 100644 index 0000000..0052324 --- /dev/null +++ b/support/regression/tests/bug-1408066.c @@ -0,0 +1,30 @@ +/* + bug-136564.c0 + + loop induction +*/ + +#include + + +void +testBackPatchLabel(void) +{ + volatile unsigned char c0 = 0, c1 = 1; + unsigned char r; + + if ( (c0 == 0)) r = 1; else r = 0; ASSERT(r == 1); + if ( !(c0 == 0)) r = 1; else r = 0; ASSERT(r == 0); + if ( !!(c0 == 0)) r = 1; else r = 0; ASSERT(r == 1); + if ( !!!(c0 == 0)) r = 1; else r = 0; ASSERT(r == 0); + if ( !!!!(c0 == 0)) r = 1; else r = 0; ASSERT(r == 1); + if (!!!!!(c0 == 0)) r = 1; else r = 0; ASSERT(r == 0); + + if ( ((c0 == 0) && (c1 == 1))) r = 1; else r = 0; ASSERT(r == 1); + if ( !((c0 == 0) && (c1 == 1))) r = 1; else r = 0; ASSERT(r == 0); + if ( !!((c0 == 0) && (c1 == 1))) r = 1; else r = 0; ASSERT(r == 1); + + if ( ( (c0 == 0) && (c1 == 1))) r = 1; else r = 0; ASSERT(r == 1); + if ( !( !(c0 == 1) && !(c1 == 0))) r = 1; else r = 0; ASSERT(r == 0); + if ( !!(!!(c0 == 0) && !!(c1 == 1))) r = 1; else r = 0; ASSERT(r == 1); +} diff --git a/support/regression/tests/bug-1493710.c b/support/regression/tests/bug-1493710.c new file mode 100644 index 0000000..ab5991d --- /dev/null +++ b/support/regression/tests/bug-1493710.c @@ -0,0 +1,27 @@ +/* + bug-1493710.c + + cse + findPointerSet with signed/unsigned operands +*/ + +#include + +struct + { + unsigned char a; + } st = { 0xff }; + +signed char c = -1; + +unsigned char f (void) +{ + st.a += c; + return st.a > 8; +} + +void +testFindPointerSet(void) +{ + ASSERT(f() == 1); +} diff --git a/support/regression/tests/bug-1654060.c b/support/regression/tests/bug-1654060.c new file mode 100644 index 0000000..6958139 --- /dev/null +++ b/support/regression/tests/bug-1654060.c @@ -0,0 +1,26 @@ +/* + bug-1654060.c + + typedef within function causes syntax error +*/ + +#include +typedef char mytype1; +typedef int mytype2; + +mytype1 c1 = 'A'; +mytype2 i1 = 12345; + +void testTypedef(void) +{ + typedef int mytype1; + typedef char mytype2; + + mytype1 i2 = 21435; + mytype2 c2 = 'B'; + + ASSERT(c1 == 'A'); + ASSERT(i1 == 12345); + ASSERT(c2 == 'B'); + ASSERT(i2 == 21435); +} diff --git a/support/regression/tests/bug-1699804.c b/support/regression/tests/bug-1699804.c new file mode 100644 index 0000000..b63d0a7 --- /dev/null +++ b/support/regression/tests/bug-1699804.c @@ -0,0 +1,22 @@ +/* + bug-1699804.c +*/ + +#include + +static code const char Str_global[] = "Hello1"; +char s1, s2; + +void testFoo(void) +{ + static code const char str_local[] = "Hello2"; + + static char str1[sizeof(Str_global)]; + static char str2[sizeof(str_local)]; // causes error 20: Undefined identifier 'str_local' + + s1 = sizeof(Str_global); + s2 = sizeof(str_local); // no error and proper result when line causing error (above) is removed + + ASSERT(s1 == 7); + ASSERT(s2 == 7); +} diff --git a/support/regression/tests/bug-1805702.c b/support/regression/tests/bug-1805702.c new file mode 100644 index 0000000..54c532b --- /dev/null +++ b/support/regression/tests/bug-1805702.c @@ -0,0 +1,24 @@ +/* bug-1805702.c + */ + +#include + +int foo; +extern int foo; + +void +test(void) +{ + foo = 10; + + ASSERT(foo == 10); +} + +/* compile time check for compiler defined functions (cdef) */ + +float __fsmul (float, float); + +float __fsmul (float a1, float a2) { + /* just for tesing... */ + return (a1 + a2); +} diff --git a/support/regression/tests/bug-1817005.c b/support/regression/tests/bug-1817005.c new file mode 100644 index 0000000..7d80f48 --- /dev/null +++ b/support/regression/tests/bug-1817005.c @@ -0,0 +1,19 @@ +/* bug-1817005.c + */ + +#include + +/* this is an assemble time test, so it doesn't have to be executed */ + +int +function_with_really_long_name(void) +{ + return 0; +} + +/* dummy test function */ + +void +testDummy(void) +{ +} diff --git a/support/regression/tests/bug-1981238.c b/support/regression/tests/bug-1981238.c new file mode 100644 index 0000000..a8f2a6c --- /dev/null +++ b/support/regression/tests/bug-1981238.c @@ -0,0 +1,31 @@ +/* + bug1981238.c +*/ +#include + +code struct { + char x:1; + char :0; + char d:2; + char b:6; +} pad = {1, 2, 1}; + +code struct { + int p:1; + int q:7; + char :0; + int s:1; + int t:7; +} noPad = {1, 120, 1, 127}; + +code struct { + char :0; + char b; +} initialNoPad[] = {{2}, {4}}; + +void testBitfield (void) +{ + ASSERT (sizeof (pad) == 2); + ASSERT (sizeof (noPad) == 2); + ASSERT (sizeof (initialNoPad[0]) == 1); +} diff --git a/support/regression/tests/bug-2051348.c b/support/regression/tests/bug-2051348.c new file mode 100644 index 0000000..24a20d6 --- /dev/null +++ b/support/regression/tests/bug-2051348.c @@ -0,0 +1,65 @@ +/* + bug 2051348. +*/ + +#include + +#pragma disable_warning 85 + +typedef char BOOLEAN; +typedef signed char SHORTINT; + +void App_PutSprite (SHORTINT x, SHORTINT y, SHORTINT spr) +{ +} + +static SHORTINT Labirint_objCell, Labirint_manX, Labirint_manY, Labirint_manDirX, Labirint_manDirY; +static BOOLEAN Labirint_manPresent; + +static SHORTINT Labirint_GetManSprite (void) +{ + return(0); +} + +static BOOLEAN Labirint_ManCanGo (void) +{ + return(0); +} + +static BOOLEAN Labirint_ManGoing (SHORTINT x, SHORTINT y) +{ + return(0); +} + +static void Labirint_SetCell (SHORTINT x, SHORTINT y, SHORTINT cell) +{ +} + +static void Labirint_TryMoveMan (void) +{ + SHORTINT x, y, manSprite; + if (Labirint_ManCanGo()) { + x = (Labirint_manX + Labirint_manDirX) + Labirint_manDirX; + y = (Labirint_manY + Labirint_manDirY) + Labirint_manDirY; + Labirint_manPresent = Labirint_ManGoing(x, y); + if (!Labirint_manPresent) { + return; + } + manSprite = Labirint_GetManSprite(); + Labirint_SetCell(x, y, manSprite); + App_PutSprite(Labirint_manX, Labirint_manY, 0); + // Assembly fails for the next two lines. + Labirint_manX = Labirint_manX + Labirint_manDirX; + Labirint_manY = Labirint_manY + Labirint_manDirY; + } else { + manSprite = 4; + } + App_PutSprite(Labirint_manX, Labirint_manY, manSprite); +} + +void +testBug2051348(void) +{ + ASSERT(1); +} + diff --git a/support/regression/tests/bug-221100.c b/support/regression/tests/bug-221100.c new file mode 100644 index 0000000..131cd3f --- /dev/null +++ b/support/regression/tests/bug-221100.c @@ -0,0 +1,60 @@ +/* bug-221100.c + + If test_index is char, loses high bit when indexes table + workaround is to use [(unsigned int) test_index] + */ +#include + +#define ARRAY_SIZE 130 + +#ifdef SDCC_pic16 +/* not enough pic16 data space, so put the array into the code memory */ +code static unsigned int +testArray[ARRAY_SIZE] = { + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, + 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, + 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, + 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, + 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, + 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, + 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, + 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, + 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, + 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, + 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, + 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, + 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, +}; +#else +xdata static unsigned int +testArray[ARRAY_SIZE]; +#endif + + +static unsigned int test_int; +static unsigned char test_index; + +static void +fetch(void) +{ + test_int = testArray [test_index]; +} + +static void +testUnsignedCharIndex(void) +{ +#ifndef SDCC_pic16 + int i; + for (i = 0; i < 130; i++) { + testArray[i] = i; + } +#endif + + test_index = 5; + fetch(); + ASSERT(test_int == 5); + + test_index = 129; + fetch(); + ASSERT(test_int == 129); +} diff --git a/support/regression/tests/bug-221168.c b/support/regression/tests/bug-221168.c new file mode 100644 index 0000000..15cc281 --- /dev/null +++ b/support/regression/tests/bug-221168.c @@ -0,0 +1,23 @@ +/* bug-221168.c + */ +#include + +#ifdef __mcs51 +# define XDATA xdata +#else +# define XDATA +#endif + +XDATA static char x[10][20]; + +XDATA char * +getAddrOfCell(unsigned char y, unsigned char z) +{ + return &x[y][z]; +} + +static void +testMultiDimensionalAddress(void) +{ + ASSERT(getAddrOfCell(5, 6) == (char XDATA *)x + 106); +} diff --git a/support/regression/tests/bug-221220.c b/support/regression/tests/bug-221220.c new file mode 100644 index 0000000..91472e1 --- /dev/null +++ b/support/regression/tests/bug-221220.c @@ -0,0 +1,42 @@ +/* bug-221220.c + Or an approximation there of. +*/ +#include + +typedef struct { + int filler; + int value; +} TESTSTRUCT; + +static void +incrementValue(TESTSTRUCT *ps) +{ + ps->value++; +} + +static void +subTestStructVolatile(TESTSTRUCT *ps) +{ + int a, b; + + /* sdcc used to cache the value of ps->value into registers, such + that as a = ps->value and b = ps->value, then a = b. However + if an intervening function uses the structure then ps->value + could change. + */ + a = ps->value; + incrementValue(ps); + b = ps->value; + + ASSERT(a == 7); + ASSERT(b == 8); +} + +static void +testStructVolatile(void) +{ + TESTSTRUCT s; + + s.value = 7; + subTestStructVolatile(&s); +} diff --git a/support/regression/tests/bug-223113.c b/support/regression/tests/bug-223113.c new file mode 100644 index 0000000..d064241 --- /dev/null +++ b/support/regression/tests/bug-223113.c @@ -0,0 +1,29 @@ +/* bug-223113.c + PENDING + */ +#include + +int putch( int Ch ) +{ + return( Ch ); +} + +int puts( char *Str ) +{ + char *Ptr; + + for( Ptr = Str; *Ptr != '\0'; Ptr++ ) { + putch( *Ptr ); + } + + return( (Ptr - Str) ); +} + +void __main( void ) +{ + puts( "hello world\n" ); +} + +void testBug(void) +{ +} diff --git a/support/regression/tests/bug-227710.c b/support/regression/tests/bug-227710.c new file mode 100644 index 0000000..013ddea --- /dev/null +++ b/support/regression/tests/bug-227710.c @@ -0,0 +1,30 @@ +/* bug-227710.c + */ +#include + +static unsigned char dataset[] = { + 1, 2, 3, 4 +}; + +unsigned char *p; + +struct { + unsigned char index; +} s; + +unsigned char +foo(void) +{ + // BUG, there will be a PRE-increment + return p[s.index++]; +} + +void +testPostIncrement(void) +{ + p = dataset; + ASSERT(foo() == 1); + ASSERT(foo() == 2); + ASSERT(foo() == 3); + ASSERT(foo() == 4); +} diff --git a/support/regression/tests/bug-408972.c b/support/regression/tests/bug-408972.c new file mode 100644 index 0000000..29cc254 --- /dev/null +++ b/support/regression/tests/bug-408972.c @@ -0,0 +1,23 @@ +/* Fake header. + */ +#include + +long leftShiftLong (long l) { + return (l << 3); +} + +int leftShiftIntMasked (int v) { + return ((v & 0xff00U) << 3); +} + +int leftShiftIntMasked2 (int v) { + return ((v & 0xff) << 8); +} + +int leftShiftIntMasked3 (int v) { + return ((v & 0xff) << 3); +} + +void testBug(void) +{ +} diff --git a/support/regression/tests/bug-426632.c b/support/regression/tests/bug-426632.c new file mode 100644 index 0000000..5a89547 --- /dev/null +++ b/support/regression/tests/bug-426632.c @@ -0,0 +1,41 @@ +/* bug-436632.c + PENDING +*/ +#include + +typedef struct { + unsigned char year; /* Current year (with offset 1900) */ + unsigned char month; /* Month (1 = Jan., ..., 12 = Dec.) */ + unsigned char day; /* Day of month (1 to 31) */ +} DATE_STRUCT; + +unsigned char year; +unsigned char month; +unsigned char day; + +void *__main() +{ + float i; + float y; + void *p; + DATE_STRUCT d; + DATE_STRUCT *date_ptr; + + date_ptr = &d; + + year = date_ptr->year; + month = date_ptr->month; + day = date_ptr->day; + + i = 1.35; + i += 2; + y = 1; + y = y+i; + i = y; + p = &y; + return p; +} + +void testBug(void) +{ +} diff --git a/support/regression/tests/bug-435068.c b/support/regression/tests/bug-435068.c new file mode 100644 index 0000000..f6789a4 --- /dev/null +++ b/support/regression/tests/bug-435068.c @@ -0,0 +1,17 @@ +/* bug-435068.c + */ +#include + +char c, d; + +static void +testQuestion(void) +{ + volatile char c, d; + + c = (0x100 & 0x100) ? 4 : 8; // ok + d = ((0x100 & 0x100) ? 4 : 8) + 1; + + ASSERT(c == 4); + ASSERT(d == 5); +} diff --git a/support/regression/tests/bug-435214.c b/support/regression/tests/bug-435214.c new file mode 100644 index 0000000..ae4f244 --- /dev/null +++ b/support/regression/tests/bug-435214.c @@ -0,0 +1,16 @@ +/* bug-435214.c + */ +#include + +unsigned long divide(long a) +{ + return a/512ul; +} + +void +testDivide(void) +{ + ASSERT(divide(1300) == 2); + ASSERT(divide(0x12345678) == 0x91A2B); +} + diff --git a/support/regression/tests/bug-441448.c b/support/regression/tests/bug-441448.c new file mode 100644 index 0000000..bbbffc1 --- /dev/null +++ b/support/regression/tests/bug-441448.c @@ -0,0 +1,26 @@ +/* bug-441448.c + PENDING + */ +#include + +#define DATA + +typedef struct +{ + unsigned char buffer[0x18]; + unsigned char OutPtr, InPtr; + unsigned char Count; +} Fifo; + +DATA Fifo TxFifo={"ABCD", 0, 0, 0}, RxFifo={"FGHI", 0, 0, 0}; +DATA unsigned char dummy1, dummy2; + +void +testPrePostIncrement(void) +{ + dummy2 = TxFifo.buffer[++TxFifo.OutPtr]; + dummy1 = RxFifo.buffer[RxFifo.OutPtr++]; + + ASSERT(dummy2 == 'B'); + ASSERT(dummy1 == 'F'); +} diff --git a/support/regression/tests/bug-448984.c b/support/regression/tests/bug-448984.c new file mode 100644 index 0000000..5ec3604 --- /dev/null +++ b/support/regression/tests/bug-448984.c @@ -0,0 +1,16 @@ +/* bug-448984.c + */ +#include + +void +testRshRem(void) +{ + volatile int rem, quot; + + quot = 4; + rem = 5000; + + rem = rem - (quot*1024); + + ASSERT(rem == 904); +} diff --git a/support/regression/tests/bug-453196.c b/support/regression/tests/bug-453196.c new file mode 100644 index 0000000..3b24699 --- /dev/null +++ b/support/regression/tests/bug-453196.c @@ -0,0 +1,74 @@ +/* Demonstrates the aliasing problem with the z80 port when loop + induction is turned on. Run_Index and Int_2_Loc get joined into + the same spill location. + + Stripped down version of dhry.c + */ + +#include + +#define NOENUM 1 +#define NOSTRUCTASSIGN 1 +#define REG + +#define Ident_2 1 + +typedef int Enumeration; + +typedef int One_Fifty; +typedef char Capital_Letter; + +char Ch_2_Glob; + +Enumeration Func_1 (Capital_Letter Ch_1_Par_Val, Capital_Letter Ch_2_Par_Val); + +void +testDhry(void) +{ + One_Fifty Int_1_Loc; + REG One_Fifty Int_2_Loc; + One_Fifty Int_3_Loc; + REG Capital_Letter Ch_Index; + Enumeration Enum_Loc; + REG int Run_Index; + REG int Number_Of_Runs; + + /* Must be more than 13... */ + Number_Of_Runs = 50; + + /* Main test loop */ + for (Run_Index = 1; Run_Index <= Number_Of_Runs; ++Run_Index) { + Int_1_Loc = 2; + Int_2_Loc = 3; + Enum_Loc = Ident_2; + + /* Removing this section removes the problem. */ + while (Int_1_Loc < Int_2_Loc) + { + Int_3_Loc = 5 * Int_1_Loc - Int_2_Loc; + Int_1_Loc += 1; + } + + /* Removing this section removes the problem. */ + for (Ch_Index = 'A'; Ch_Index <= Ch_2_Glob; ++Ch_Index) + { + if (Enum_Loc == Func_1 (Ch_Index, 'C')) + { + Int_2_Loc = Run_Index; + } + } + + /* Removing any one of the following lines removes the problem. */ + Int_2_Loc = Int_2_Loc * Int_1_Loc; + Int_1_Loc = Int_2_Loc / Int_3_Loc; + Int_2_Loc = 7 * (Int_2_Loc - Int_3_Loc) - Int_1_Loc; + } +} + +Enumeration Func_1 (Capital_Letter Ch_1_Par_Val, Capital_Letter Ch_2_Par_Val) +{ + UNUSED(Ch_1_Par_Val); + UNUSED(Ch_2_Par_Val); + + return 0; +} diff --git a/support/regression/tests/bug-460000.c b/support/regression/tests/bug-460000.c new file mode 100644 index 0000000..934ae48 --- /dev/null +++ b/support/regression/tests/bug-460000.c @@ -0,0 +1,44 @@ +/* bug 460000 + */ +#include + +int +func( int a ) +{ + return a; +} + +int x = -1024; + +void +testByteShift(void) +{ + ASSERT(func( x >> 8 ) == -4); + ASSERT(func( x / 256 ) == -4); +} + +void +testOtherSignedShifts(void) +{ + volatile int left; + + left = -2345; + ASSERT(left >> 3 == (-2345>>3)); + ASSERT(left >> 8 == (-2345>>8)); + ASSERT(left >> 9 == (-2345>>9)); +} + +void +testShiftByParam(void) +{ + volatile int left, count; + + left = -2345; + + count = 3; + ASSERT(left >> count == (-2345>>3)); + count = 8; + ASSERT(left >> count == (-2345>>8)); + count = 9; + ASSERT(left >> count == (-2345>>9)); +} diff --git a/support/regression/tests/bug-460010.c b/support/regression/tests/bug-460010.c new file mode 100644 index 0000000..e5bf0ba --- /dev/null +++ b/support/regression/tests/bug-460010.c @@ -0,0 +1,39 @@ +/* bug 460010 + */ +#include + +#ifdef SDCC +#ifdef SDCC_pic16 +#define ADDRESS 0x0070 +#else +#define ADDRESS 0xa000 +#endif /* SDCC_pic16 */ +#endif /* SDCC */ + +void +func( unsigned char a ) +{ + UNUSED(a); +} + +void +testBadPromotion(void) +{ + +#ifdef SDCC + unsigned char c=*((unsigned xdata char*)(ADDRESS)); +#else + unsigned char loc_c; + unsigned char c=*(unsigned char*)&loc_c; +#endif + + func(c); + + c+='0'; /* is evaluated as an 8-bit expr */ + + func(c); + + c+='A'-'0'; /* is a 16-bit expr ??? */ + + func(c); +} diff --git a/support/regression/tests/bug-460444.c b/support/regression/tests/bug-460444.c new file mode 100644 index 0000000..739eadb --- /dev/null +++ b/support/regression/tests/bug-460444.c @@ -0,0 +1,73 @@ +/* bug 460444 + */ +#include + +void +testXOR(void) +{ + volatile int p = 5; + + if (p ^ 0x60) { + // Good. + } + else { + FAIL(); + } + + /* Test is to see if it compiles. */ + ASSERT((p^0x60) == 0x65); + ASSERT((p&0x61) == 0x01); + ASSERT((p|0x60) == 0x65); + + p = 0x1234; + if (p ^ 0x5678) { + // Good. + } + else { + FAIL(); + } + + if (p & 0x4324) { + // Good + } + else { + FAIL(); + } + + if (p | 0x1279) { + // Good + } + else { + FAIL(); + } +} + +void +testLeftRightXor(void) +{ + volatile int left, right; + + left = 0x123; + right = 0x8101; + + if (left ^ right) { + // Good + } + else { + FAIL(); + } + + if (left & right) { + // Good + } + else { + FAIL(); + } + + if (left | right) { + // Good + } + else { + FAIL(); + } +} diff --git a/support/regression/tests/bug-467035.c b/support/regression/tests/bug-467035.c new file mode 100644 index 0000000..dc65895 --- /dev/null +++ b/support/regression/tests/bug-467035.c @@ -0,0 +1,57 @@ +/* Tests a bug in for loops where b in plot_point is always 1. + Stripped down from the gbdk filltest.c + */ +#include + +typedef unsigned char UBYTE; + +UBYTE +getpix(UBYTE x, UBYTE y) +{ + UNUSED(x); + UNUSED(y); + + return 0; +} + +void +color(UBYTE a, UBYTE b, UBYTE c) +{ + UNUSED(a & b & c); +} + +void +line(UBYTE a, UBYTE b, UBYTE c, UBYTE d) +{ + UNUSED(a & b & c & d); +} + +void +plot_point(UBYTE a, UBYTE b) +{ + static UBYTE ea, eb; + + ASSERT(b == eb); + ASSERT(a == ea); + + ea++; + if (ea > 12) { + ea = 0; + eb++; + } + LOG(("(a, b) -> (%u, %u)\n", (unsigned int)a, (unsigned int)b)); +} + +void +testForMerge(void) +{ + UBYTE a,b; + + for (b=0; b<=10U; b++) { + for (a=0; a<=12U; a++) { + color(getpix(a,b+1), 0, 1); + plot_point(a,b); + } + color(0, 0, 1); + } +} diff --git a/support/regression/tests/bug-468811.c b/support/regression/tests/bug-468811.c new file mode 100644 index 0000000..b0e3da6 --- /dev/null +++ b/support/regression/tests/bug-468811.c @@ -0,0 +1,78 @@ +/* For some reason an integer operation is run as floating point. + Test is to see if it links. + */ +#include + +typedef unsigned char UBYTE; +typedef unsigned char UINT8; + +void +set_sprite_tile(UINT8 nb, UINT8 tile) +{ + UNUSED(nb && tile); +} + +/* screen size */ +#define MIN_SX 5U /* min x (char) */ +#define MAX_SX (20U-MIN_SX) /* max x (char) */ +#define MIN_SY 5U /* min y (char) */ +#define MAX_SY (MIN_SY+13U) /* max y (char) */ + +#define DEF_SP 30U /* sprite null char code */ + +/* player */ +#define MIN_PX (MIN_SX*8U+8U) /* min x (dot) */ +#define MAX_PX (MAX_SX*8U-8U) /* max x (dot) */ +#define DEF_PX 80U /* ship x pos (dot) */ +#define DEF_PY (MIN_SY*8U) /* ship y pos (dot) */ +#define DEF_PC0 14U +#define DEF_PC1 15U +#define DEF_PF 8U + +/* bomb */ +#define MAX_TT 6U /* number */ +#define DEF_TS 2U /* sprite tile id */ +#define DEF_TC 2U /* sprite data id */ +#define DEF_TX (80U-6U) /* bomb x pos (dot) */ +#define DEF_TY (DEF_PY-14U) /* bomb y pos (dot) */ +#define MAX_TY (MAX_SY*8U) /* max y pos (dot) */ + +/* enemy */ +#define MAX_ET 10U /* number */ +#define DEF_ES0 (DEF_TS+MAX_TT) /* sprite tile id */ +#define DEF_ES1 (DEF_ES0+1U) +#define DEF_1EC0 32U +#define DEF_1EC1 48U +#define DEF_2EC0 64U +#define DEF_2EC1 80U +#define DEF_XEC0 96U /* sprite data(X) id */ +#define DEF_XEC1 112U /* sprite data(X) id */ +#define DEF_EY (DEF_PY+12U) +#define DEF_EH 10U +#define SUB_EX0 20U +#define SUB_EX1 (SUB_EX0-8U) +#define MIN_EX (SUB_EX0-16U) +#define MAX_EX (SUB_EX0+180U) +#define SPEED_EY (DEF_EY+DEF_EH*3U) +#define DEF_BC1 4U +#define DEF_BC2 5U + +UBYTE ef[MAX_ET], ex[MAX_ET], ey[MAX_ET]; +UBYTE pf, px, pp, pl; + +/* enemys */ +void enemys() +{ + UBYTE i; + + for( i=0; i + +void +testMul(void) +{ + {storage} volatile int a, b; + + a = 5; + b = a*2; + ASSERT(b == 10); + + a = -33; + b = a*2; + ASSERT(b == -66); +} diff --git a/support/regression/tests/bug-477835.c b/support/regression/tests/bug-477835.c new file mode 100644 index 0000000..c8e75ea --- /dev/null +++ b/support/regression/tests/bug-477835.c @@ -0,0 +1,35 @@ +/* Registers not being saved. + */ +#include + +/* In the following code BC is assigned a copy of fp, but bc is not + saved across the call. +*/ +void +fptr(void (*fp)(void)) +{ + int i; + for (i = 0; i < 50; i++) + (*fp)(); +} + +void dummy(void (*fp)(void)) +{ + UNUSED(fp); +} + +/* This code has the same logic above, but bc is saved. + */ +void +fptr2(void (*fp)(void)) +{ + int i; + void (*fp2)(void) = fp; + + for (i = 0; i < 50; i++) + dummy(fp2); +} + +void testBug(void) +{ +} diff --git a/support/regression/tests/bug-477927.c b/support/regression/tests/bug-477927.c new file mode 100644 index 0000000..659ada2 --- /dev/null +++ b/support/regression/tests/bug-477927.c @@ -0,0 +1,50 @@ +/* Tests an uninitalised variable bug. + t is not initalised in all paths in the do loop, causing the while + conditional to fail unpredictably. + + Doesn't actually test, is really an example. + */ +#include + +typedef unsigned char UBYTE; + +UBYTE +randish(void) +{ + static int count; + + if ((++count)&3) { + return 1; + } + else { + return 0; + } +} + +void +spoil(UBYTE ignored) +{ + UNUSED(ignored); +} + +UBYTE accu[2]; + +#if !defined(PORT_HOST) +# pragma disable_warning 84 +#endif + +void +testLoopInit(void) +{ + UBYTE t, r; + + do { + r = randish(); + + if(r != 1) { + t = ++accu[r]; + spoil(t); + } + } + while(t != 3); +} diff --git a/support/regression/tests/bug-478094.c b/support/regression/tests/bug-478094.c new file mode 100644 index 0000000..7497564 --- /dev/null +++ b/support/regression/tests/bug-478094.c @@ -0,0 +1,43 @@ +/* Tests a commit problem. + */ +#include + + + +int foo = 16; + +void f( int x ) +{ + UNUSED(x); +} + +void g(int bar) +{ + int a = 0; + int b = 0; + + while(1) { + switch(bar) { + case 0: + --foo; + f(foo); + break; + case 1: + ++foo; + f(foo); + break; + case 2: + ++a; + f(a); + break; + case 3: + ++b; + f(b); + break; + } + } +} + +void testBug(void) +{ +} diff --git a/support/regression/tests/bug-485362.c b/support/regression/tests/bug-485362.c new file mode 100644 index 0000000..66ca360 --- /dev/null +++ b/support/regression/tests/bug-485362.c @@ -0,0 +1,21 @@ +/** Shows segfault. + type: int + */ +#include + +void +spoil({type} f) +{ + UNUSED(f); +} + +void +testDivBySelf(void) +{ + volatile {type} left, result; + + left = 17; + result = left/left; + + spoil(result); +} diff --git a/support/regression/tests/bug-499644.c b/support/regression/tests/bug-499644.c new file mode 100644 index 0000000..caf4815 --- /dev/null +++ b/support/regression/tests/bug-499644.c @@ -0,0 +1,14 @@ +/* Floats + */ +#include + +const float a = 0.0; + +float f(void) +{ + return a * 5; +} + +void testBug(void) +{ +} diff --git a/support/regression/tests/bug-500536.c b/support/regression/tests/bug-500536.c new file mode 100644 index 0000000..bd3945d --- /dev/null +++ b/support/regression/tests/bug-500536.c @@ -0,0 +1,52 @@ +/* Bad mangaling of support names. + */ +#include + +/* The original bug */ +float z1(void) +{ + return 5; +} + +float fun( void ) +{ + unsigned long i; + float f; + i=5.5 * z1(); + f=i; + if (i & 1) + f += 1.0; + return f; +} + +/* Tests to check basic conversion */ +void +testfs2long(void) +{ + volatile float f; + volatile unsigned long ul; + volatile long l; + + f = 5.0; + ul = f; + ASSERT(ul == 5); + + l = f; + ASSERT(l == 5); + + f = -134; + l = f; + ASSERT(l == -134); + + l = 4567; + f = l; + ASSERT(f == 4567.0); + + l = -1539; + f = l; + ASSERT(f == -1539.0); + + ul = 9995; + f = ul; + ASSERT(f == 9995.0); +} diff --git a/support/regression/tests/bug-524195.c b/support/regression/tests/bug-524195.c new file mode 100644 index 0000000..8ebb264 --- /dev/null +++ b/support/regression/tests/bug-524195.c @@ -0,0 +1,49 @@ +/* Problem with inverting constants + */ +#include + +enum + { + USEDFLAG = 1 + }; + +typedef struct _HeapEntry HeapEntry; +typedef unsigned int UINT; + +struct _HeapEntry +{ + HeapEntry *pPrev; + HeapEntry *pNext; + UINT uSize; +}; + +static UINT _getSize1(HeapEntry *pEnt) +{ + return pEnt->uSize & ~USEDFLAG; +} + +static UINT _getSize2(HeapEntry *pEnt) +{ + return pEnt->uSize & ~1; +} + +static UINT _getSize3(HeapEntry *pEnt) +{ + return pEnt->uSize & 0xFFFE; +} + +static void +testMask(void) +{ + HeapEntry ent; + ent.uSize = 123; + + ASSERT(_getSize1(&ent) == 122); + ASSERT(_getSize2(&ent) == 122); + ASSERT(_getSize3(&ent) == 122); + + ent.uSize = 0x1234; + ASSERT(_getSize1(&ent) == 0x1234); + ASSERT(_getSize2(&ent) == 0x1234); + ASSERT(_getSize3(&ent) == 0x1234); +} diff --git a/support/regression/tests/bug-524209.c b/support/regression/tests/bug-524209.c new file mode 100644 index 0000000..67d2659 --- /dev/null +++ b/support/regression/tests/bug-524209.c @@ -0,0 +1,36 @@ +/* Problem with casts and warnings. + */ +#include +#include + +typedef unsigned short UINT16; + +typedef struct _Class Class; + +typedef struct _Instance +{ + Class *pClass; +} Instance; + +typedef struct _StringBuffer +{ + Instance header; + UINT16 uLength; + UINT16 uMaxLength; +} StringBuffer; + + +void _scan(StringBuffer *pSB) +{ + UNUSED(pSB); +} + +void checkCast(void *pIn) +{ + Instance *p = (Instance *)pIn; + _scan((StringBuffer *)p); +} + +void testBug(void) +{ +} diff --git a/support/regression/tests/bug-524211.c b/support/regression/tests/bug-524211.c new file mode 100644 index 0000000..3d3128b --- /dev/null +++ b/support/regression/tests/bug-524211.c @@ -0,0 +1,34 @@ +/* Problem with casts and warnings. + */ +#include + +#if 0 +/* Disabled as this only shows a warning */ + +typedef unsigned short UINT16; +typedef unsigned char UINT8; + +typedef struct _Class Class; + +typedef struct _String +{ + const UINT8 sz[1]; +} String; + +struct _Class +{ + String *szName; +}; + +const Class Bar = { + "java.lang.Object", +}; + +void foo(void) +{ +} +#endif + +void testBug(void) +{ +} diff --git a/support/regression/tests/bug-524685.c b/support/regression/tests/bug-524685.c new file mode 100644 index 0000000..bfff635 --- /dev/null +++ b/support/regression/tests/bug-524685.c @@ -0,0 +1,12 @@ +/* Division by powers of two. + */ +#include + +void +testDivPow2(void) +{ + volatile int left; + + left = -18; + ASSERT(left/4 == (-18/4)); +} diff --git a/support/regression/tests/bug-524691.c b/support/regression/tests/bug-524691.c new file mode 100644 index 0000000..dfc2f0d --- /dev/null +++ b/support/regression/tests/bug-524691.c @@ -0,0 +1,54 @@ +/* Division by powers of two. + */ +#include + +typedef unsigned int UINT; + +typedef struct _HeapEntryState +{ + void *pBase; + UINT uFlags; +} HeapEntryState; + +static HeapEntryState *_getHeapEntryState(void *p, HeapEntryState *pStates, UINT nStateEntries) +{ + int uLeft = -1, uRight = nStateEntries, uMiddle; + + while (uRight - uLeft > 1) + { + int iDiff; + + uMiddle = (uLeft + uRight)/2; + /* A divide by zero is added just before iDiff is assigned */ + iDiff = pStates[uMiddle].pBase - p; + + if (iDiff > 0) + { + uRight = uMiddle; + } + else if (iDiff < 0) + { + uLeft = uMiddle; + } + else + { + return pStates + uMiddle; + } + } + + return NULL; +} + +void +testDivByZero(void) +{ + HeapEntryState aStates[] = { + { (void xdata *)1, 0 } + }; + void *p = (void xdata *)0x1234; + + ASSERT(_getHeapEntryState(p, aStates, 1) == NULL); + + aStates[0].pBase = p; + ASSERT(_getHeapEntryState(p, aStates, 1) == aStates + 0); +} diff --git a/support/regression/tests/bug-524697.c b/support/regression/tests/bug-524697.c new file mode 100644 index 0000000..c616ae6 --- /dev/null +++ b/support/regression/tests/bug-524697.c @@ -0,0 +1,38 @@ +/* Bad addition for adding a length and char[] + */ +#include + +#if defined(SDCC_mcs51) +#define SZ_SIZE 89 +#else +#define SZ_SIZE 90 +#endif + +typedef struct _Foo +{ + char sz[SZ_SIZE]; +} Foo; + +typedef struct _Bar +{ + unsigned int uLen; +} Bar; + +char *getOffset(Foo *pFoo, Bar *pBar) +{ + return pFoo->sz + pBar->uLen; +} + +void +testOffset(void) +{ + Foo foo = { + "Foo" + }; + Bar bar = { + 3 + }; + + ASSERT(getOffset(&foo, &bar) + == (((char *)&foo) + 3)); +} diff --git a/support/regression/tests/bug-607243.c b/support/regression/tests/bug-607243.c new file mode 100644 index 0000000..4209454 --- /dev/null +++ b/support/regression/tests/bug-607243.c @@ -0,0 +1,16 @@ +/* bad shift right 12 */ + +#include + +typedef unsigned int u16_t; + +struct myhdr { u16_t x; } h, *p; + +#define NTOHS(n) (((((u16_t)(n) & 0xff)) << 8) | (((u16_t)(n) & 0xff00) >> 8)) +#define IPH_V(hdr) ((u16_t)NTOHS((hdr)->x) >> 12) + +void testBug(void) { + p = &h; + p->x = 0x45; + ASSERT(IPH_V(p)==4); +} diff --git a/support/regression/tests/bug-716242.c b/support/regression/tests/bug-716242.c new file mode 100644 index 0000000..604bc22 --- /dev/null +++ b/support/regression/tests/bug-716242.c @@ -0,0 +1,82 @@ +/* bug-716242.c + + syntax tests about function pointers at compile time + */ +#include + +void *p; +int ret; + +int mul2 (int i) +{ + return 2 * i; +} + +void g (int (*h) (int)) +{ + ret = h (2); +} + +void f1() +{ +#if defined(SDCC_ds390) + p = (void code *) mul2; +#else + p = (void *) mul2; +#endif + g ((int (*) (int)) p); +} + +/****************************/ + +void g (int (*h) (int)); + +void f2() +{ + int (*fp) (int) = p; + + g (fp); +} + +/****************************/ + +void g (int (*h) (int)); + +void f3() +{ + int (*fp) (int) = (int (*) (int)) p; + + g (fp); +} + +/****************************/ + +void f4() +{ + ((void (code *) (void)) p) (); +} + +/****************************/ + +void f5() +{ + int (*fp) (int) = mul2; + + fp(1); +} + +/****************************/ + +void f6() +{ + ((void (code *) (void)) 0) (); +} + +/****************************/ + +static void +testFuncPtr(void) +{ + f1(); + ASSERT(ret == 4); +} diff --git a/support/regression/tests/bug-751703.c b/support/regression/tests/bug-751703.c new file mode 100644 index 0000000..3f89a31 --- /dev/null +++ b/support/regression/tests/bug-751703.c @@ -0,0 +1,41 @@ +/* bug-751703.c + + Make sure extern within local scope binds to global + scope and is not optimized inappropriately. + */ + +#include "testfwk.h" + +int x = 1; +int y = 2; +int z = 0; + +static void +addxy(void) +{ + extern int x, y, z; + z = x+y; +} + +static void +times10x(void) +{ + unsigned char x; + + z = 0; + for (x=0; x<10; x++) + { + extern int x; /* bind to the global x */ + z += x; + } +} + +static void +testExternDeadCode(void) +{ + ASSERT(z == 0); + addxy(); + ASSERT(z == 3); + times10x(); + ASSERT(z == 10); +} diff --git a/support/regression/tests/bug-868103.c b/support/regression/tests/bug-868103.c new file mode 100644 index 0000000..6180aa8 --- /dev/null +++ b/support/regression/tests/bug-868103.c @@ -0,0 +1,29 @@ +/** Bug 868103 tests. + + storage1: near, far, code, + storage2: near, far, +*/ + +#ifndef STORAGE1 +#define STORAGE1 {storage1} +#endif + +#ifndef STORAGE2 +#define STORAGE2 {storage2} +#endif + +#include + +typedef struct { + STORAGE1 char * bar[2]; +} foo; + +STORAGE1 char c = 'x'; +STORAGE2 foo f; + +void +testBug868103(void) +{ + f.bar[1] = &c; + ASSERT(f.bar[1] == &c); +} diff --git a/support/regression/tests/bug-880197.c b/support/regression/tests/bug-880197.c new file mode 100644 index 0000000..e5eb393 --- /dev/null +++ b/support/regression/tests/bug-880197.c @@ -0,0 +1,21 @@ +/* + bug 880197 +*/ + +#include + +// no need to call this, it generates compiler error: +// error: FATAL Compiler Internal Error in file 'gen.c' +// line number '8381' : genPointerSet: illegal pointer type +// Contact Author with source code + +void +writeflash(code unsigned char *cp, unsigned char val) +{ + *(xdata unsigned char *)cp = val; +} + +void +testBug(void) +{ +} diff --git a/support/regression/tests/bug-895992.c b/support/regression/tests/bug-895992.c new file mode 100644 index 0000000..8492327 --- /dev/null +++ b/support/regression/tests/bug-895992.c @@ -0,0 +1,54 @@ +/* bug-895992.c + + Life Range problem with + - uninitialized variable + - loop + - conditional block + + LR problem hits all ports, but this test is mcs51 specific + */ +#include + +char p0 = 2; +unsigned short loops; + +static void +wait (void) +{ + long i, j; + + /* just clobber all registers: */ + for (i = 0; i < 2; ++i) + for (j = 0; j < 2; ++j) + ; +} + +#if !defined(PORT_HOST) +# pragma disable_warning 84 +#endif + +static void +testLR (void) +{ + unsigned char number; + unsigned char start = 1; + unsigned char i; + + do + { + for (i = 1; i > 0 ; i--) + wait (); /* destroys all registers */ + if (start) + { + number = p0; + start = 0; + } + number--; /* 'number' might be used before initialization */ + /* the life range of 'number' must be extended to */ + /* the whole loop _including_ the conditional block */ + ++loops; + } + while (number != 0); + + ASSERT (loops == p0); +} diff --git a/support/regression/tests/bug-905492.c b/support/regression/tests/bug-905492.c new file mode 100644 index 0000000..90b0131 --- /dev/null +++ b/support/regression/tests/bug-905492.c @@ -0,0 +1,32 @@ +/* bug-905492.c + + the standard guarantees left-to-right evaluation, + if the first operand is unequal 0 (resp. 0), the second isn't evaluated. +*/ + +#include + +char a; + +char +inc_a(char c) +{ + a += 1; + return c; +} + +void +testLeftRightAndOr(void) +{ + volatile char c; + + a = 0; c = inc_a(0) || inc_a(0); ASSERT(a == 2); + a = 0; c = inc_a(0) || inc_a(1); ASSERT(a == 2); + a = 0; c = inc_a(1) || inc_a(0); ASSERT(a == 1); + a = 0; c = inc_a(1) || inc_a(1); ASSERT(a == 1); + + a = 0; c = inc_a(0) && inc_a(0); ASSERT(a == 1); + a = 0; c = inc_a(0) && inc_a(1); ASSERT(a == 1); + a = 0; c = inc_a(1) && inc_a(0); ASSERT(a == 2); + a = 0; c = inc_a(1) && inc_a(1); ASSERT(a == 2); +} diff --git a/support/regression/tests/bug-908454.c b/support/regression/tests/bug-908454.c new file mode 100644 index 0000000..009ad53 --- /dev/null +++ b/support/regression/tests/bug-908454.c @@ -0,0 +1,22 @@ +/* promoting bit to char */ + +#include +#include + +#if !defined(__bool_true_false_are_defined) +volatile int a = 1, b = 1; +#else +volatile bool a = 1, b = 1; +#endif + +char +foo (void) +{ + return (a << 1) | b; +} + +static void +testBitToCharPromotion(void) +{ + ASSERT(foo() == 3); +} diff --git a/support/regression/tests/bug-920866.c b/support/regression/tests/bug-920866.c new file mode 100644 index 0000000..3b15a72 --- /dev/null +++ b/support/regression/tests/bug-920866.c @@ -0,0 +1,15 @@ +/* replace optimized parameter tree returned by decorateType */ + +#include + +char +foo(char c) +{ + return c; +} + +void +testReplaceParameterTree(void) +{ + ASSERT(foo (0 ? 1 : 2) == 2); +} diff --git a/support/regression/tests/bug-927659.c b/support/regression/tests/bug-927659.c new file mode 100644 index 0000000..96fc3eb --- /dev/null +++ b/support/regression/tests/bug-927659.c @@ -0,0 +1,47 @@ +/* bug-927659.c + + double processing resp. reversing of params +*/ + +#include +#include +#include + +unsigned char +foo(unsigned char a, ...) REENTRANT +{ + va_list argptr; + unsigned char b; + + va_start (argptr, a); + b = va_arg (argptr, int); + va_end (argptr); + + return b; +} + +unsigned char +bar(unsigned char a, unsigned char b) REENTRANT +{ + return b / a; +} + +void +testReverse(void) +{ + ASSERT(foo (0, bar (1, 2)) == 2); +} + +/*************************************************************/ + +void +testAddFunc(void) +{ + char buf[5]; + unsigned char count = 0; + + count += sprintf (buf, "%d", 5); + ASSERT(count == 1 && + buf[0] == '5' && + buf[1] == '\0'); +} diff --git a/support/regression/tests/bug-971834.c b/support/regression/tests/bug-971834.c new file mode 100644 index 0000000..ccbceb3 --- /dev/null +++ b/support/regression/tests/bug-971834.c @@ -0,0 +1,47 @@ +/* bug-971834.c + + Life Range problem with + - uninitialized variable + - loop + + LR problem hits all ports, but this test is mcs51 specific + */ + +#include + +unsigned char ttt[] = {0xff, 1}; +unsigned char b; + +#if !defined(PORT_HOST) +# pragma disable_warning 84 +#endif + +unsigned char orsh (void) +{ + unsigned char a, i; + for (i = 0; i < sizeof(ttt); i++) + a |= ttt[i]; + return a; +} + +unsigned char orsh1 (void) +{ + unsigned char i, j; + unsigned char a; + for (j = 0; j < sizeof(ttt); j++) + { + for (i = 0; i < sizeof(ttt); i++) + { + a |= ttt[i]; + b = a; + } + } + return b; +} + +void +testLR(void) +{ + ASSERT(orsh() == 0xff); + ASSERT(orsh1() == 0xff); +} diff --git a/support/regression/tests/bug-983491.c b/support/regression/tests/bug-983491.c new file mode 100644 index 0000000..72e2a79 --- /dev/null +++ b/support/regression/tests/bug-983491.c @@ -0,0 +1,23 @@ +/* bug-983491.c + */ + +#include + +/* + * test disabled since the fix was reverted + */ + +/* +code struct { + char* b; +} c[2] = { + {"abc"}, + {"abc"} +}; +*/ + +void +testMergeStr(void) +{ +/* ASSERT(c[0].b == c[1].b); */ +} diff --git a/support/regression/tests/bug1057979.c b/support/regression/tests/bug1057979.c new file mode 100644 index 0000000..08aa3e1 --- /dev/null +++ b/support/regression/tests/bug1057979.c @@ -0,0 +1,56 @@ +/* + bug1057979.c +*/ + +#include +#include +#include +#include + +char s[12 + 1]; + +void +test_sprintf (void) +{ + s[12] = 0x12; + + sprintf (s, "%d", 99); + ASSERT (0 == strcmp (s, "99")); + sprintf (s, "%d", 100); + ASSERT (0 == strcmp (s, "100")); + sprintf (s, "%d", 2004); + ASSERT (0 == strcmp (s, "2004")); + sprintf (s, "%ld", 2147483647L); + ASSERT (0 == strcmp (s, "2147483647")); + + //and from bug 1073386 + sprintf (s, "%04X", 0x8765u); + ASSERT (0 == strcmp (s, "8765")); + + //and from bug 1193299 + sprintf (s, "%3.3s", "abcd"); + ASSERT (0 == strcmp (s, "abc")); + sprintf (s, "%-3.3s", "abcd"); + ASSERT (0 == strcmp (s, "abc")); + sprintf (s, "%3.3s", "ab"); + ASSERT (0 == strcmp (s, " ab")); + sprintf (s, "%-3.3s", "ab"); + ASSERT (0 == strcmp (s, "ab ")); + +#if defined(SDCC_ds390) || defined(PORT_HOST) + //and from bug 1358192 + sprintf (s, "%f", 10.1); + LOG ((s)); + ASSERT (0 == strcmp (s, "10.100000")); + + //and from bug 1388703 + sprintf (s, "%4.1f", 1.36); + LOG ((s)); + ASSERT (0 == strcmp (s, " 1.4")); + sprintf (s, "%4.1f", -1.37); + LOG ((s)); + ASSERT (0 == strcmp (s, "-1.4")); +#endif + + ASSERT (s[12] == 0x12); +} diff --git a/support/regression/tests/bug1065458.c b/support/regression/tests/bug1065458.c new file mode 100644 index 0000000..2495b87 --- /dev/null +++ b/support/regression/tests/bug1065458.c @@ -0,0 +1,21 @@ +/* + bug1065458.c +*/ + +#include + +unsigned short f() +{ + return 0xff00; +} + +unsigned short g() +{ + return f() ? 1 : 0; +} + +void +test_1065458(void) +{ + ASSERT( 1 == g() ); +} diff --git a/support/regression/tests/bug1185672.c b/support/regression/tests/bug1185672.c new file mode 100644 index 0000000..7d0bfb2 --- /dev/null +++ b/support/regression/tests/bug1185672.c @@ -0,0 +1,28 @@ +/* + bug1057979.c +*/ + +#include + +int srlen; + +int l_regrd(int ad) +{ + return ad; +} + +void head_send(int i) +{ + srlen= i; + if ((l_regrd(0x1234) & 0x0200) == 0) + { + srlen= 0; + } +} + +void +test_1185672(void) +{ + head_send(1); + ASSERT( srlen == 1 ); +} diff --git a/support/regression/tests/bug1198642.c b/support/regression/tests/bug1198642.c new file mode 100644 index 0000000..bce595b --- /dev/null +++ b/support/regression/tests/bug1198642.c @@ -0,0 +1,26 @@ +/* + bug1198642.c +*/ + +#include + +void +test_cse_generic_ptr(void) +{ +#if defined(SDCC_mcs51) + volatile void *p1; + volatile void *p2; + + p1 = (data char *)1; + p2 = (idata char *)1; + ASSERT (p1 == p2); + + p1 = (data char *)1; + p2 = (xdata char *)1; + ASSERT (p1 != p2); + + p1 = (data char *)1; + p2 = (idata char *)2; + ASSERT (p1 != p2); +#endif +} diff --git a/support/regression/tests/bug1273984.c b/support/regression/tests/bug1273984.c new file mode 100644 index 0000000..d371d61 --- /dev/null +++ b/support/regression/tests/bug1273984.c @@ -0,0 +1,43 @@ +/* An assignment inside a functioncall changed the type of the parameter. + See bug description 1273984 for details. + + Bug detected and fixed by Guenther Jehle + + sign: unsigned, + */ + +#include + +void foo({sign} int val) { + val; //make the compiler happy +} + +void fooInt({sign} int val) { + ASSERT(val==3); +} + +void fooChar({sign} char val) { + ASSERT(val==6); +} + +void +testAssignInFunctioncall(void) +{ + volatile {sign} char charVal=3; + volatile {sign} int intVal=0x4040; + + fooInt(intVal=charVal); // should cast charVal to int for function call. + // without patch #1645121, a char is put on the stack + // (or hold in registers) + foo(0xAAAA); + fooInt(intVal=charVal); + + intVal=6; + + fooChar(charVal=intVal); // without patch, a int is put on the stack + foo(0xAAAA); + fooChar(charVal=intVal); + +} + + diff --git a/support/regression/tests/bug1337835.c b/support/regression/tests/bug1337835.c new file mode 100644 index 0000000..f231e46 --- /dev/null +++ b/support/regression/tests/bug1337835.c @@ -0,0 +1,28 @@ +/* + bug1337835.c +*/ + +#include +#include + +#ifndef BOOL +#define BOOL bool +#endif + +char e; + +void foo (unsigned long ul, BOOL b, char c) REENTRANT +{ + if (b && (long) ul < 0) + e = 0; + if (ul && b && c) + e = 1; +} + +void +test_1337835(void) +{ + e = 2; + foo(0, 1, 0); + ASSERT( e == 2 ); +} diff --git a/support/regression/tests/bug1348008.c b/support/regression/tests/bug1348008.c new file mode 100644 index 0000000..b0b4302 --- /dev/null +++ b/support/regression/tests/bug1348008.c @@ -0,0 +1,20 @@ +/* + bug1348008.c +*/ + +#include + +#ifndef PORT_HOST + +void foo(void) { } + +void IRQ_ISR(void) interrupt +{ + foo(); +} + +#endif + +void testBug(void) +{ +} diff --git a/support/regression/tests/bug1399290.c b/support/regression/tests/bug1399290.c new file mode 100644 index 0000000..d884778 --- /dev/null +++ b/support/regression/tests/bug1399290.c @@ -0,0 +1,16 @@ +/* bug1399290.c + */ +#include + +unsigned long Left = 0x12345678; + +void +testLongPlus(void) +{ + static unsigned long Result; + static unsigned long Rhs = 0x87654321; + static unsigned long *Lhs = &Left; + + Result = *Lhs + Rhs; + ASSERT (Result == 0x99999999); +} diff --git a/support/regression/tests/bug1409955.c b/support/regression/tests/bug1409955.c new file mode 100644 index 0000000..a2a5ed7 --- /dev/null +++ b/support/regression/tests/bug1409955.c @@ -0,0 +1,41 @@ +/* + bug1409955.c +*/ + +#include + +void +WriteToXData(char* buffer) +{ + (void)buffer; +} + +void +test_push_pop(void) +{ + char a; + xdata char* p; + char d[5]; + + d[0] = 0; + d[1] = 0; + d[2] = 0; + d[3] = 0; + d[4] = 0; + p = 0; + do + { if( (unsigned short)p > 10 ) a = 10-(char)p; + else a = 60; + d[0] = 0x12; + d[1] = 0x34; + WriteToXData(d); // Watch the xdata: 0, 1! + p += a; + ASSERT (d[0] == 0x12); + ASSERT (d[1] == 0x34); + } while( !p ); + d[0] = 1; + d[1] = 2; + d[2] = 3; + d[3] = 4; + d[4] = 5; +} diff --git a/support/regression/tests/bug1426356.c b/support/regression/tests/bug1426356.c new file mode 100644 index 0000000..01caa6a --- /dev/null +++ b/support/regression/tests/bug1426356.c @@ -0,0 +1,19 @@ +/* + bug1426356.c +*/ + +#include + +const union pu { + unsigned char t1; + unsigned char t2; +} tst[2] = {{ 1 }, { 2 }}; + +void +test_1426356(void) +{ + ASSERT( tst[0].t1 == 1 ); + ASSERT( tst[0].t2 == 1 ); + ASSERT( tst[1].t1 == 2 ); + ASSERT( tst[1].t2 == 2 ); +} diff --git a/support/regression/tests/bug1464657.c b/support/regression/tests/bug1464657.c new file mode 100644 index 0000000..88668f7 --- /dev/null +++ b/support/regression/tests/bug1464657.c @@ -0,0 +1,70 @@ +/* + bug1464657.c +*/ + +#include + +static void f1(void) +{ +} + +static short f2(void) +{ + return 0; +} + +static unsigned char f3(unsigned char a) +{ + return a+5; +} + +unsigned char var; + +void f() +{ + switch (var) { + case 0: + f1(); + break; + case 1: + f1(); + break; + case 2: + var++; + f1(); + break; + case 4: + f1(); + break; + case 5: + break; + case 7: + f1(); + break; + case 6: + f1(); + break; + case 8: + f1(); + break; + case 9: + f1(); + break; + case 12: + { + unsigned char nc; + unsigned short b = f2(); + unsigned char nb = f3(b); + var = f3(b); + nc = f3(nb); + } + break; + } +} + +void test_Peephole251(void) +{ + var = 12; + f(); + ASSERT (var==5); +} diff --git a/support/regression/tests/bug1496419.c b/support/regression/tests/bug1496419.c new file mode 100644 index 0000000..b23b092 --- /dev/null +++ b/support/regression/tests/bug1496419.c @@ -0,0 +1,25 @@ +/* + bug1496419.c +*/ + +#include + +typedef struct _NODE +{ + const struct _NODE * enter; + const struct _NODE * down; +}NODE; + +const NODE node1 = {NULL, NULL}; + +//sdcc loops allocating space for new symbols node1 and +//zzz until there is no more memory, then segfaults +// +//The reference to zzz inside the declaration of zzz +//triggers a loop allocating space for symbols node1 +//and zzz +const NODE zzz = {&node1, &zzz}; + +void testBug(void) +{ +} diff --git a/support/regression/tests/bug1503067.c b/support/regression/tests/bug1503067.c new file mode 100644 index 0000000..f11a650 --- /dev/null +++ b/support/regression/tests/bug1503067.c @@ -0,0 +1,10 @@ +/* bug1503067.c + */ +#include + +const int SPRITE = 0; +int sprite = 1; + +void testBug(void) +{ +} diff --git a/support/regression/tests/bug1505811.c b/support/regression/tests/bug1505811.c new file mode 100644 index 0000000..ddb4e0a --- /dev/null +++ b/support/regression/tests/bug1505811.c @@ -0,0 +1,34 @@ +/* bug 1505811 + * demonstrates an incorrect "loopreverse" + * note func0, is a kind of safeguard, the incorrect code + * will access indices 0 and 1 instead of 1 and 2, + * and with incorrect order + */ + +#include + +char glbl; + +void func0() { glbl = 0; } +void func1() { glbl = 1; } +void func2() { glbl = 2; } + +typedef void (*fptr)(); + +fptr ep_init[3] = { func0, func1, func2 }; + +void buggy() +{ + unsigned char i; + for(i = 1; i <= 2; i++) + { + ep_init[i](); + } +} + +void +testBug(void) +{ + buggy(); + ASSERT(glbl == 2); +} diff --git a/support/regression/tests/bug1509084.c b/support/regression/tests/bug1509084.c new file mode 100644 index 0000000..6f13d79 --- /dev/null +++ b/support/regression/tests/bug1509084.c @@ -0,0 +1,40 @@ +/* + bug 1509084 +*/ + +#include +#include + +#if !defined(__bool_true_false_are_defined) +#define bool unsigned char +#endif + +unsigned char aa, bb, cc, dd, ee; + +void leds_name_repaint(void) +{ + unsigned char an; + unsigned char dg = aa; + bool s = 0; + + for( an = 0; an < 5; an ++ ) + { + s = ( (long) aa >> 1 ) > 0; + if( s ) + { + aa += dg + 1; + bb += dg + 2; + cc += dg + 3; + dd += dg + 4; + ee += dg + 5; + } + } +} + +void +testBug(void) +{ + aa = 2; + leds_name_repaint(); + ASSERT(aa == 17); +} diff --git a/support/regression/tests/bug1520966.c b/support/regression/tests/bug1520966.c new file mode 100644 index 0000000..0ccf322 --- /dev/null +++ b/support/regression/tests/bug1520966.c @@ -0,0 +1,23 @@ +/* bug1520966 "Floating-point bug with small numbers" + */ + +#include +#include + +void +testFloatOp(void) +{ + volatile float a,b; + float result; + + a = 2.04e-38; + b = 0.01; + result = a * b; + ASSERT( result < a ); + ASSERT( result >= 0.0 ); + + b = 100; + result = a / b; + ASSERT( result < a ); + ASSERT( result >= 0.0 ); +} diff --git a/support/regression/tests/bug1535242.c b/support/regression/tests/bug1535242.c new file mode 100644 index 0000000..bf552b1 --- /dev/null +++ b/support/regression/tests/bug1535242.c @@ -0,0 +1,56 @@ +/* saving "bits" test for mcs51/stack-auto. + */ +#include + +#if defined(SDCC_mcs51) +#include <8052.h> +#include + +bool manipulate_bits(bool x) using 2 +{ + return x; +} + +bool complement(bool x) +{ + return !x; +} + +#endif + +void +testSaveBits(void) +{ +#if defined(SDCC_mcs51) + + //enable the interrupt and set it + ET2 = 1; + EA = 1; + TF2 = 1; + + //this will pass b0 cleared, test whether it will arrive cleared + if (complement(false)) + { + EA = 0; + ASSERT(1); + } + else + { + EA = 0; + ASSERT(0); + } + +#else + ASSERT(1); +#endif +} + +#if defined(SDCC_mcs51) +void T2_isr (void) interrupt 5 using 2 +{ + //do not clear flag ET2 so it keeps interrupting ! + + //this will set b0 + manipulate_bits(true); +} +#endif diff --git a/support/regression/tests/bug1536762.c b/support/regression/tests/bug1536762.c new file mode 100644 index 0000000..8c90163 --- /dev/null +++ b/support/regression/tests/bug1536762.c @@ -0,0 +1,60 @@ +/* + bug1536762.c +*/ + +#include +#include +#include + +xdata uint8_t c = 1; + +struct d { + xdata struct d *n; + uint8_t f; + uint8_t s; + xdata uint8_t *buffer; + uint16_t length; +}; + + +xdata struct d xd = {&xd, 1, 0xab, &c, 3}; + + +struct { + xdata struct d *c; + int16_t count; + xdata uint8_t *bptr; +} s = {&xd, -1, &c}; + + +void blurb(void) +{ + if (s.count < 0) { + s.c->s = 0xef; + s.count = s.c->length - 1; + s.bptr = s.c->buffer; + } + *s.bptr = 0; + s.bptr++; + s.count--; +} + + +void +testBug(void) +{ + ASSERT(xd.s == 0xab); + ASSERT(s.c->s == 0xab); + + s.c->s = 0xcd; + + ASSERT(xd.s == 0xcd); + ASSERT(s.c->s == 0xcd); + + blurb(); + + ASSERT(xd.s == 0xef); + ASSERT(s.c->s == 0xef); + ASSERT(c == 0); +} + diff --git a/support/regression/tests/bug1546986.c b/support/regression/tests/bug1546986.c new file mode 100644 index 0000000..5e120a3 --- /dev/null +++ b/support/regression/tests/bug1546986.c @@ -0,0 +1,26 @@ +/* + bug1546986.c +*/ + +#include +#include + +#ifdef __bool_true_false_are_defined + +static unsigned char pdata tst1 = 0x01; +static unsigned char pdata tst2 = 0x00; + +static bool test; + +#endif //__bool_true_false_are_defined + +void +testBug(void) +{ +#ifdef __bool_true_false_are_defined + test = (tst1 | tst2); + ASSERT( test ); + test = (tst2 | tst1); + ASSERT( test ); +#endif //__bool_true_false_are_defined +} diff --git a/support/regression/tests/bug1551947.c b/support/regression/tests/bug1551947.c new file mode 100644 index 0000000..9581062 --- /dev/null +++ b/support/regression/tests/bug1551947.c @@ -0,0 +1,15 @@ +/* + bug1551947.c +*/ + +#include + +xdata float z; +xdata float x = 1.0; + +void +testBug(void) +{ + z = x * x; + ASSERT( z == 1.0 ); +} diff --git a/support/regression/tests/bug1565152.c b/support/regression/tests/bug1565152.c new file mode 100644 index 0000000..b8b42d9 --- /dev/null +++ b/support/regression/tests/bug1565152.c @@ -0,0 +1,31 @@ +/* + bug 1565152.c +*/ + +#include + +// no need to call this, it generates compiler error for xstack-auto +// error 9: FATAL Compiler Internal Error + +#if defined(SDCC_mcs51) +#include <8051.h> + +unsigned int foo(void) +{ + unsigned int i,j; + unsigned long l=0; + + for (i=0;i<10;i++) + { + j=SP; // any SFR would do to generate crash + l+=j; + } + return 1; // <- it gives error on this line +} +#endif + +void +testBug(void) +{ + ASSERT(1); +} diff --git a/support/regression/tests/bug1579949.c b/support/regression/tests/bug1579949.c new file mode 100644 index 0000000..f656605 --- /dev/null +++ b/support/regression/tests/bug1579949.c @@ -0,0 +1,24 @@ +/* + bug 1579949 +*/ + +#include + +struct st_s +{ + char el; +}; + +// no need to call this, it generates compiler error for z80, hc08, stack-auto +// error 9: FATAL Compiler Internal Error +char foo (int x, struct st_s *arg) +{ + x; + return ((struct st_s *) arg) -> el; +} + +void +testBug(void) +{ + ASSERT(1); +} diff --git a/support/regression/tests/bug1618050.c b/support/regression/tests/bug1618050.c new file mode 100644 index 0000000..cd0d21b --- /dev/null +++ b/support/regression/tests/bug1618050.c @@ -0,0 +1,26 @@ +/** bug 1618050 + * global variable px in function buggy, is marked rematr.. + * and is erronously assumed to retain its value "x" across + * the function call to fiddle_px + */ + +#include + +_STATMEM char * data px; +_STATMEM char x[2] = {0,42}; + +void fiddle_px(_STATMEM char * unused) { + (volatile char) unused[0]; // shut up + px++; +} + +char buggy(void) { + px = x; + fiddle_px(x); + return *px; +} + +void +testBug(void) { + ASSERT(buggy() == 42); +} diff --git a/support/regression/tests/bug1670148.c b/support/regression/tests/bug1670148.c new file mode 100644 index 0000000..80f1442 --- /dev/null +++ b/support/regression/tests/bug1670148.c @@ -0,0 +1,32 @@ +/* + bug 1670148.c +*/ + +#include + +// no need to call this, it generates compiler error for xstack-auto +// error 9: FATAL Compiler Internal Error +struct str { + long aa; + long bb; +}; + +struct str *v1; + +void foo(void) +{ + struct str v2; + struct str loc; + + v2.aa = 0; + loc.bb = v1->bb; + loc.aa = v1->aa - v2.aa; + + loc.bb += 0; +} + +void +testBug(void) +{ + ASSERT(1); +} diff --git a/support/regression/tests/bug1678803.c b/support/regression/tests/bug1678803.c new file mode 100644 index 0000000..68f4f6f --- /dev/null +++ b/support/regression/tests/bug1678803.c @@ -0,0 +1,34 @@ +/* + bug 1678803 + This should not generate error 12 "called object is not a function". +*/ + +#include + +typedef void (*func)(void); + +void foo(void) +{ +} + +#ifdef SDCC_mcs51 +func GetFunc(void) __naked +{ + __asm + + ; some assembler code + mov dptr,#_foo + ret + + __endasm; +} +#endif + +void testCaller(void) +{ +#ifdef SDCC_mcs51 + GetFunc()(); +#endif + + ASSERT (1); +} diff --git a/support/regression/tests/bug1712928.c b/support/regression/tests/bug1712928.c new file mode 100644 index 0000000..083bb5a --- /dev/null +++ b/support/regression/tests/bug1712928.c @@ -0,0 +1,29 @@ +/* + bug1712928.c +*/ + +#include + +#if defined (SDCC_mcs51) +unsigned char NakedFunc(void) __naked +{ + __asm + mov dpl,#0x01 + ret + __endasm; +} +#endif + +void +testBug(void) +{ +#if defined (SDCC_mcs51) + unsigned char hsum, sum; + + hsum = NakedFunc(); + sum = NakedFunc(); + sum += hsum; + + ASSERT(sum == 2); +#endif +} diff --git a/support/regression/tests/bug1714204.c b/support/regression/tests/bug1714204.c new file mode 100644 index 0000000..dab02dc --- /dev/null +++ b/support/regression/tests/bug1714204.c @@ -0,0 +1,31 @@ +/* + bug 1714204 +*/ + +#include + +typedef struct { + unsigned int w[2]; +} TEST_TYPE; + +unsigned char i1, i2, i3; + +void foo(TEST_TYPE *p1, TEST_TYPE *p2, TEST_TYPE *p3) +{ + if (p2->w[i2] > ++p3->w[i3]) + p1->w[i1] = p2->w[i2] + p3->w[i3]; +} + +void +testBug(void) +{ + TEST_TYPE t1 = { { 1, 1 } }; + TEST_TYPE t2 = { { 1, 1 } }; + TEST_TYPE t3 = { { 1, 1 } }; + + i1 = i2 = i3 = 0; + + foo(&t1, &t2, &t3); + + ASSERT (t1.w[0] == 1); +} diff --git a/support/regression/tests/bug1717305.c b/support/regression/tests/bug1717305.c new file mode 100644 index 0000000..5ff7845 --- /dev/null +++ b/support/regression/tests/bug1717305.c @@ -0,0 +1,26 @@ +/* + bug 1717305 +*/ + +#include + +#ifdef SDCC +#pragma std_sdcc99 +#endif + +static inline int f(const int a) +{ + return (a + 3); +} + +int g(int b) +{ + return (f(b)); +} + +void +testBug(void) +{ + int x = 0; + ASSERT (g(x) == 3); +} diff --git a/support/regression/tests/bug1717943.c b/support/regression/tests/bug1717943.c new file mode 100644 index 0000000..af653be --- /dev/null +++ b/support/regression/tests/bug1717943.c @@ -0,0 +1,38 @@ +/* + bug1717943c.c + an error in the detection of loopinvariants, + will move the foo=0 initialisation out of the loops. + */ + +#include + +char foo, firstcall; + +char check(void) +{ + if(!firstcall) + return 1; + + firstcall=0; + foo = 42; + return 0; +} + +void bug(void) +{ + while(1) { + foo = 0; + while(check()) + if(check()) + return; + } +} + + +void +testBug(void) +{ + firstcall = 1; + bug(); + ASSERT(foo == 0); +} diff --git a/support/regression/tests/bug1721024.c b/support/regression/tests/bug1721024.c new file mode 100644 index 0000000..1035aa7 --- /dev/null +++ b/support/regression/tests/bug1721024.c @@ -0,0 +1,27 @@ +/* + bug 1721024 +*/ + +#include + +static unsigned char temp1; +static unsigned char temp2; + +void tst(unsigned long acc) +{ + UNUSED(acc); + temp1--; + if (temp1==0) + { + temp2=0; + } +} + +void +testBug(void) +{ + temp1 = 1; + temp2 = 2; + tst(0xFFFFFFFF); //make sure acc!=0 + ASSERT(temp2 == 0); +} diff --git a/support/regression/tests/bug1723128.c b/support/regression/tests/bug1723128.c new file mode 100644 index 0000000..e147836 --- /dev/null +++ b/support/regression/tests/bug1723128.c @@ -0,0 +1,95 @@ +/* + bug 1723128 +*/ + +#include +#include + +#ifdef __bool_true_false_are_defined + +union USUINT { + unsigned int value; + struct { + unsigned char A; // LS byte + unsigned char B; // HS byte + }; +}; // could name variables here + +typedef struct { + unsigned char CRC_seed; // 1 + union USUINT cal_burst_duration; // 3 + union USUINT cal_calibration; // 5 + union USUINT cal_number_of_bursts; // 7 + union USUINT cal_holdoff_delay; // 9 + unsigned char CRC; // 10 +} AUTOCAL_CFG; + +code at (0x8000) AUTOCAL_CFG AutoCal_CFG = {0}; + +static code unsigned char crc_table[256] = +{ 0x00,0x2F,0x5E,0x71,0xBC,0x93,0xE2,0xCD, + 0x57,0x78,0x09,0x26,0xEB,0xC4,0xB5,0x9A, + 0xAE,0x81,0xF0,0xDF,0x12,0x3D,0x4C,0x63, + 0xF9,0xD6,0xA7,0x88,0x45,0x6A,0x1B,0x34, + 0x73,0x5C,0x2D,0x02,0xCF,0xE0,0x91,0xBE, + 0x24,0x0B,0x7A,0x55,0x98,0xB7,0xC6,0xE9, + 0xDD,0xF2,0x83,0xAC,0x61,0x4E,0x3F,0x10, + 0x8A,0xA5,0xD4,0xFB,0x36,0x19,0x68,0x47, + 0xE6,0xC9,0xB8,0x97,0x5A,0x75,0x04,0x2B, + 0xB1,0x9E,0xEF,0xC0,0x0D,0x22,0x53,0x7C, + 0x48,0x67,0x16,0x39,0xF4,0xDB,0xAA,0x85, + 0x1F,0x30,0x41,0x6E,0xA3,0x8C,0xFD,0xD2, + 0x95,0xBA,0xCB,0xE4,0x29,0x06,0x77,0x58, + 0xC2,0xED,0x9C,0xB3,0x7E,0x51,0x20,0x0F, + 0x3B,0x14,0x65,0x4A,0x87,0xA8,0xD9,0xF6, + 0x6C,0x43,0x32,0x1D,0xD0,0xFF,0x8E,0xA1, + 0xE3,0xCC,0xBD,0x92,0x5F,0x70,0x01,0x2E, + 0xB4,0x9B,0xEA,0xC5,0x08,0x27,0x56,0x79, + 0x4D,0x62,0x13,0x3C,0xF1,0xDE,0xAF,0x80, + 0x1A,0x35,0x44,0x6B,0xA6,0x89,0xF8,0xD7, + 0x90,0xBF,0xCE,0xE1,0x2C,0x03,0x72,0x5D, + 0xC7,0xE8,0x99,0xB6,0x7B,0x54,0x25,0x0A, + 0x3E,0x11,0x60,0x4F,0x82,0xAD,0xDC,0xF3, + 0x69,0x46,0x37,0x18,0xD5,0xFA,0x8B,0xA4, + 0x05,0x2A,0x5B,0x74,0xB9,0x96,0xE7,0xC8, + 0x52,0x7D,0x0C,0x23,0xEE,0xC1,0xB0,0x9F, + 0xAB,0x84,0xF5,0xDA,0x17,0x38,0x49,0x66, + 0xFC,0xD3,0xA2,0x8D,0x40,0x6F,0x1E,0x31, + 0x76,0x59,0x28,0x07,0xCA,0xE5,0x94,0xBB, + 0x21,0x0E,0x7F,0x50,0x9D,0xB2,0xC3,0xEC, + 0xD8,0xF7,0x86,0xA9,0x64,0x4B,0x3A,0x15, + 0x8F,0xA0,0xD1,0xFE,0x33,0x1C,0x6D,0x42 +}; + +data unsigned char crc; + +static xdata unsigned char rx_buffer[8]; +static unsigned char rx_index; + +bool VerifyCRC(void) +{ + unsigned char i; + + crc = 0 ; + + for (i=0; i<(rx_index-1); i++) + crc = crc_table[rx_buffer[i] ^ crc] ; + return (crc == rx_buffer[rx_index-1]) ; +} + +bool NotZero(unsigned int t) +{ + return (t != 0); +} + +#endif //__bool_true_false_are_defined + +void +testBug(void) +{ +#ifdef __bool_true_false_are_defined + rx_index = 1; + ASSERT (VerifyCRC()); + ASSERT (NotZero(300)); +#endif //__bool_true_false_are_defined +} diff --git a/support/regression/tests/bug1734654.c b/support/regression/tests/bug1734654.c new file mode 100644 index 0000000..d47271a --- /dev/null +++ b/support/regression/tests/bug1734654.c @@ -0,0 +1,25 @@ +/* bug1734654.c + */ +#include +#include + +#ifdef __bool_true_false_are_defined + +volatile bool b; +volatile unsigned char c = 1; + +static void foo (void) +{ + b = (c<2); +} + +#endif //__bool_true_false_are_defined + +void +testMyFunc(void) +{ +#ifdef __bool_true_false_are_defined + foo (); + ASSERT (b); +#endif //__bool_true_false_are_defined +} diff --git a/support/regression/tests/bug1738367.c b/support/regression/tests/bug1738367.c new file mode 100644 index 0000000..c065357 --- /dev/null +++ b/support/regression/tests/bug1738367.c @@ -0,0 +1,68 @@ +/* + bug1738367.c +*/ + +#include +#include + +#ifdef __bool_true_false_are_defined + +bool ternary(unsigned char status) +{ + return (status == 0) ? 0 : 1; +} + +bool ternary_inv(unsigned char status) +{ + return (status == 0) ? 1 : 0; +} + + +bool ternary1(unsigned char status) +{ + return status ? 1 : 0; +} + +bool ternary1_inv(unsigned char status) +{ + return status ? 0 : 1; +} + + +bool ternary2(unsigned char status) +{ + return !status ? 0 : 1; +} + +bool ternary2_inv(unsigned char status) +{ + return !status ? 1 : 0; +} + +#endif //__bool_true_false_are_defined + + +void +testBug(void) +{ +#ifdef __bool_true_false_are_defined + ASSERT(!ternary(0x00)); + ASSERT( ternary(0x10)); + + ASSERT( ternary_inv(0x00)); + ASSERT(!ternary_inv(0x10)); + + ASSERT(!ternary1(0x00)); + ASSERT( ternary1(0x10)); + + ASSERT( ternary1_inv(0x00)); + ASSERT(!ternary1_inv(0x10)); + + ASSERT(!ternary2(0x00)); + ASSERT( ternary2(0x10)); + + ASSERT( ternary2_inv(0x00)); + ASSERT(!ternary2_inv(0x10)); + ASSERT(!ternary2_inv(1==1)); +#endif //__bool_true_false_are_defined +} diff --git a/support/regression/tests/bug1745717.c b/support/regression/tests/bug1745717.c new file mode 100644 index 0000000..8c7b130 --- /dev/null +++ b/support/regression/tests/bug1745717.c @@ -0,0 +1,32 @@ +/* + bug1745717.c +*/ + +#include +#include + +#ifdef __bool_true_false_are_defined + +bool and1(char arg) +{ + return arg & 1; +} + +bool and2(char arg) +{ + return 1 & arg; +} + +#endif //__bool_true_false_are_defined + + +void +testBug(void) +{ +#ifdef __bool_true_false_are_defined + ASSERT(!and1(0x00)); + ASSERT( and1(0x01)); + ASSERT(!and2(0x00)); + ASSERT( and2(0x01)); +#endif //__bool_true_false_are_defined +} diff --git a/support/regression/tests/bug1749275.c b/support/regression/tests/bug1749275.c new file mode 100644 index 0000000..79bb0c4 --- /dev/null +++ b/support/regression/tests/bug1749275.c @@ -0,0 +1,23 @@ +/* + bug 1749275 +*/ + +#include + +xdata char baz; + +// no need to call this, it generates compiler error: +// Internal error: validateOpType failed in +// OP_SYM_TYPE(IC_LEFT(pl->ic)) @ peep\.c:226: +// expected symbol, got value +void foo(void) +{ + baz |= 5; + (*(void (*)()) 0) (); +} + +void +testBug(void) +{ + ASSERT(1); +} diff --git a/support/regression/tests/bug1750318.c b/support/regression/tests/bug1750318.c new file mode 100644 index 0000000..1124ee1 --- /dev/null +++ b/support/regression/tests/bug1750318.c @@ -0,0 +1,21 @@ +/* + bug 1750318 +*/ + +#include + +xdata at(0x1234) char bar; + +// no need to call this, it generates compiler error: +// Internal error: validateOpType failed in +// OP_SYMBOL(IC_RESULT (ic)) @ SDCCcse.c:2172: +// expected symbol, got value +void foo(void) { + *(char volatile xdata *) &bar = 0x80; +} + +void +testBug(void) +{ + ASSERT(1); +} diff --git a/support/regression/tests/bug1788177.c b/support/regression/tests/bug1788177.c new file mode 100644 index 0000000..3d3ee7a --- /dev/null +++ b/support/regression/tests/bug1788177.c @@ -0,0 +1,24 @@ +/* + bug 1788177 +*/ + +#include +#include + +#ifdef __bool_true_false_are_defined + +bool var; + +// no need to call this, it generates compiler error: +// Caught signal 11: SIGSEGV +void foo(bool parm) { + var = parm; +} + +#endif + +void +testBug(void) +{ + ASSERT(1); +} diff --git a/support/regression/tests/bug1816470.c b/support/regression/tests/bug1816470.c new file mode 100644 index 0000000..25c644a --- /dev/null +++ b/support/regression/tests/bug1816470.c @@ -0,0 +1,16 @@ +/* + bug 1816470 +*/ + +#include + +int CalculatedConst(void) +{ + return (unsigned char)(0x100 - 4000000 / 307200.0 + .5); +} + +void +testConst(void) +{ + ASSERT(CalculatedConst() == 0xF3); +} diff --git a/support/regression/tests/bug1838000.c b/support/regression/tests/bug1838000.c new file mode 100644 index 0000000..5bafa2f --- /dev/null +++ b/support/regression/tests/bug1838000.c @@ -0,0 +1,23 @@ +/* + bug 1838000 +*/ + +#include + +typedef struct { char b:1; } t; +t glbl = { 0 }; +t _STATMEM * gp = &glbl; + +void func(char _AUTOMEM *p) +{ + *p++ = gp->b ? 'A' : 'B'; + *p = 'C'; +} + +void +testBug(void) +{ + char x[2]; + func(x); + ASSERT(x[0]=='B'); +} diff --git a/support/regression/tests/bug1839277.c b/support/regression/tests/bug1839277.c new file mode 100644 index 0000000..4c47328 --- /dev/null +++ b/support/regression/tests/bug1839277.c @@ -0,0 +1,74 @@ +/* + bug 1839277 & 1839299 +*/ + +#include + +code struct Value { + code char* Name[2]; +} Values[2]= {{{"abc", "def"}}, {{"ghi", "jkl"}}}; + +char i=1; + +void +testBug1839277(void) +{ + volatile char code* * p; + unsigned long v = 0; +//first subexpression 'Values[0].Name' is evaluted as follows: +//mov r2,#_Values +//mov r3,#(_Values >> 8) +//mov r4,#(_Values >> 16) ;this is wrong - should be 'mov r4,#128' shouldn't it? +//second subexpression 'Values[1].Name' is evaluted as follows: +//mov a,#0x04 +//add a,#_Values +//mov r2,a +//clr a +//addc a,#(_Values >> 8) +//mov r3,a +//mov r4,#128 ;this is all right + p = i ? Values[0].Name : Values[1].Name; +#if defined(SDCC_mcs51) + v = (unsigned long)p; + ASSERT((unsigned char)(v>>16)==0x80); +#endif + +//everything is all right with explicit typecast - but why do I need it? + p = i ? (char code**)Values[0].Name : (char code**)Values[1].Name; +#if defined(SDCC_mcs51) + v = (unsigned long)p; + ASSERT((unsigned char)(v>>16)==0x80); +#endif + +//this is the best/optimal version - again with explicit typecast +//Question: Why is it necessary to have explicit typecast to make things right? + p = i ? (char code* code*)Values[0].Name : (char code* code*)Values[1].Name; +#if defined(SDCC_mcs51) + v = (unsigned long)p; + ASSERT((unsigned char)(v>>16)==0x80); +#endif +} + +void +testBug1839299(void) +{ + volatile char code* * p; + unsigned long v = 0; +//'Values[0].Name' subexpression is evaluated as follows first: +//mov r2,#_Values +//mov r3,#(_Values >> 8) +//mov r4,#(_Values >> 16) ;this is wrong - see bug 1839277 + p= i ? Values[0].Name : Values[1].Name; +//this assignment has some sideeffect on the following one +//in fact it is the evaluation of 'Values[0].Name' itself has the effect, not the assignment + p= Values[0].Name; +//'Values[0].Name' subexpression is evaluated as follows second: +//mov r2,#_Values +//mov r3,#(_Values >> 8) +//mov r4,#0x00 ;this is different from first occurrence but also wrong + p= i ? Values[0].Name : Values[1].Name; +#if defined(SDCC_mcs51) + v = (unsigned long)p; + ASSERT((unsigned char)(v>>16)==0x80); +#endif +} diff --git a/support/regression/tests/bug1839321.c b/support/regression/tests/bug1839321.c new file mode 100644 index 0000000..3ed58d7 --- /dev/null +++ b/support/regression/tests/bug1839321.c @@ -0,0 +1,31 @@ +/* + bug 1839321 +*/ + +#include + +xdata char Global = 2; + +code struct Value { + char xdata * Name[2]; +} Value_1 = {{&Global, 0}}, + Value_2 = {{&Global, 0}}; + +char i = 1; + +// note: this function expects its first parameter to be passed in +// 2 bytes on **stack** (not registers) +char bar(char xdata* code* ptr, ...) +{ + return **ptr; +} + +void foo (void) { +} + + +void +testBug(void) +{ + ASSERT (bar(i ? Value_1.Name : Value_2.Name) == 2); +} diff --git a/support/regression/tests/bug1856409.c b/support/regression/tests/bug1856409.c new file mode 100644 index 0000000..1fb232e --- /dev/null +++ b/support/regression/tests/bug1856409.c @@ -0,0 +1,34 @@ +/* + bug 1856409 + storage: static code, +*/ + +#include +#include + +#ifndef PORT_HOST +#pragma disable_warning 158 //no warning about overflow in constant (W_LIT_OVERFLOW) +#endif + +typedef struct { + unsigned int e:2; + unsigned int f:3; + unsigned int g:3; +} Ta; + +void +testBug(void) +{ + {storage} Ta aa = {1, 29, 0}; + {storage} uint16_t xx = 100000; + char t; + + t = aa.e; + ASSERT(t == (1 & 3)); + t = aa.f; + ASSERT(t == (29 & 7)); + t = aa.g; + ASSERT(t == (0 & 7)); + + ASSERT(xx == (uint16_t)(100000 & 65535)); +} diff --git a/support/regression/tests/bug1864577.c b/support/regression/tests/bug1864577.c new file mode 100644 index 0000000..f85189a --- /dev/null +++ b/support/regression/tests/bug1864577.c @@ -0,0 +1,45 @@ +/* + bug 1864577 +*/ + +#include + +#ifdef SDCC +#pragma std_sdcc99 +#endif + +typedef unsigned char uint8_t; + +typedef uint8_t error_t ; + +enum __nesc_unnamed4247 { + SUCCESS = 0, + FAIL = 1, + ESIZE = 2, + ECANCEL = 3, + EOFF = 4, + EBUSY = 5, + EINVAL = 6, + ERETRY = 7, + ERESERVE = 8, + EALREADY = 9 +}; + +static inline error_t PlatformP__LedsInit__default__init(void) { + return SUCCESS; +} + +static error_t PlatformP__LedsInit__init(void); +static inline error_t PlatformP__LedsInit__init(void){ + unsigned char result; + + result = PlatformP__LedsInit__default__init(); + + return result; +} + +void +testBug(void) +{ + ASSERT (PlatformP__LedsInit__init() == SUCCESS); +} diff --git a/support/regression/tests/bug1875933.c b/support/regression/tests/bug1875933.c new file mode 100644 index 0000000..4ad27aa --- /dev/null +++ b/support/regression/tests/bug1875933.c @@ -0,0 +1,102 @@ +/* + * bug1875933.c + */ + +#include +#include + +char identity(char x) +{ + return x; +} + +/* + * function genAnd() and genOr() in z80/gen.c + * were not prepared to handle the special case where ifx == 0 + */ + +void void_tand1(char x) +{ + char y = (identity(x) & 1) ? 42 : 43; +} + +void void_tand0(char x) +{ + char y = (identity(x) & 0) ? 42 : 43; +} + +/* + * function genOr() in z80/gen.c + * assumed identity of "or a, literal" and "or a,a" + * thats definitly not so + */ + +char tor1(char x) +{ + char y = (identity(x) | 1) ? 42 : 43; + return y; +} + +char tor0(char x) +{ + char y = (identity(x) | 0) ? 42 : 43; + return y; +} + +char tand1(char x) +{ + char y = (identity(x) & 1) ? 42 : 43; + return y; +} + +char tand0(char x) +{ + char y = (identity(x) & 0) ? 42 : 43; + return y; +} + +/* + * mcs51 segmentation fault + * + * function genOr() in mcs51/gen.c + * was not prepeared for ifx==0 + */ + +void void_tor1(char x) +{ + char y = (identity(x) | 1) ? 42 : 43; +} + +void void_tor0(char x) +{ + char y = (identity(x) | 0) ? 42 : 43; +} + +void void_tor(char x) +{ + char y = (identity(x) | x) ? 42 : 43; +} + +void +testBug(void) +{ + void_tand1(1); + void_tand1(0); + void_tand0(1); + void_tand0(0); + + ASSERT(tor1(1) == 42); + ASSERT(tor1(0) == 42); + ASSERT(tor0(1) == 42); + ASSERT(tor0(0) == 43); + ASSERT(tand1(1) == 42); + ASSERT(tand1(0) == 43); + ASSERT(tand0(1) == 43); + ASSERT(tand0(0) == 43); + + void_tor1(1); + void_tor1(0); + void_tor0(1); + void_tor0(0); + void_tor(0); +} diff --git a/support/regression/tests/bug1888147.c b/support/regression/tests/bug1888147.c new file mode 100644 index 0000000..a9673a9 --- /dev/null +++ b/support/regression/tests/bug1888147.c @@ -0,0 +1,22 @@ +/* + bug 1888147 +*/ + +#include + +// no need to call this, it generates compiler error: +// Caught signal 11: SIGSEGV +int foo(int n) +{ + int i = 0; + + if (i!=0) + return n; + return 0; +} + +void +testBug(void) +{ + ASSERT(1); +} diff --git a/support/regression/tests/bug1908493.c b/support/regression/tests/bug1908493.c new file mode 100644 index 0000000..18795ce --- /dev/null +++ b/support/regression/tests/bug1908493.c @@ -0,0 +1,126 @@ +/* Bug 1908493 + * Bug test contains code fragments from qpnano framework, + * Copyright (C) 2002-2007 Quantum Leaps, LLC. All rights reserved. + * and released under the GPL + * See www.quantum-leaps.com/downloads/index.htm#QPN + */ + +#include + +#define Q_REENTRANT reentrant +#define Q_ASSERT +#define Q_SIG(me_) (((QFsm *)(me_))->evt.sig) +#define int8_t char +#define QEP_MAX_NEST_DEPTH 5 + +#define QEP_EMPTY_SIG 0 + +enum QReservedSignals { + Q_ENTRY_SIG = 1, /**< signal for coding entry actions */ + Q_EXIT_SIG, /**< signal for coding exit actions */ + Q_INIT_SIG, /**< signal for coding nested initial transitions */ + Q_TIMEOUT_SIG, /**< signal used by time events */ + Q_USER_SIG /**< first signal that can be used in user applications */ +}; + +typedef int8_t QSignal; +typedef struct QEventTag { + QSignal sig; +} QEvent; + +struct QFsmTag; +struct QHsmTag; + +typedef void (*QState)(struct QFsmTag *me); +typedef QState (*QHsmState)(struct QHsmTag *me); + +typedef QState QSTATE; + +typedef struct QFsmTag { + QState state; + QEvent evt; +} QFsm; + +typedef struct QHsmTag { + QHsmState state; + QEvent evt; +} QHsm; + +typedef struct QHsmDerivedTag { + QHsm super; + char value; +} QHsmDerived; + +QHsmDerived AO_derived; + +QSTATE state_1(QHsmDerived *me) Q_REENTRANT +{ + if (Q_SIG(me) == Q_INIT_SIG) + me->value = 3; + + return (QSTATE)0; +} + +QSTATE state_2(QHsmDerived *me) Q_REENTRANT +{ + if (Q_SIG(me) == Q_USER_SIG) + return (QSTATE)state_1; + + return (QSTATE)0; +} + +void QHsm_dispatch(QHsm *me) Q_REENTRANT +{ + QHsmState path[QEP_MAX_NEST_DEPTH]; + QHsmState s; + QHsmState t = me->state; + + path[1] = t; /* save the current state in case a transition is taken */ + + do { /* process the event hierarchically... */ + s = t; + + /******************************************************************** + * + * The call which fails when s is copied from the stack frame + * + ********************************************************************/ + t = (QHsmState)((*s)(me)); /* invoke state handler s */ + + } while (t != (QHsmState)0); + + if (me->evt.sig == (QSignal)0) { /* transition taken? */ + QHsmState src = s; /* the source of the transition */ + int8_t ip = (int8_t)(-1); /* transition entry path index */ + + path[0] = me->state; /* save the new state */ + me->state = path[1]; /* restore the current state */ + + /* exit current state to the transition source src... */ + for (s = path[1]; s != src; ) { + Q_SIG(me) = (QSignal)Q_EXIT_SIG; + t = (QHsmState)(*s)(me); /* find superstate of s */ + if (t != (QHsmState)0) { /* exit action unhandled */ + s = t; /* t points to superstate */ + } + else { /* exit action handled */ + Q_SIG(me) = (QSignal)QEP_EMPTY_SIG; + s = (QHsmState)(*s)(me); /* find superstate of s */ + } + } + + t = path[0]; /* target of the transition */ + + } +} + +void +testBug (void) +{ + AO_derived.super.state = state_2; + AO_derived.super.evt.sig = 2; + + QHsm_dispatch((QHsm *)&AO_derived); + + ASSERT(1); /*if we don't get here the regression test will timeout */ +} diff --git a/support/regression/tests/bug1921073.c b/support/regression/tests/bug1921073.c new file mode 100644 index 0000000..4caa122 --- /dev/null +++ b/support/regression/tests/bug1921073.c @@ -0,0 +1,31 @@ +/* + bug 1921073 +*/ + +#include + +void f1(char c, const void * p) +{ + unsigned long v = (unsigned long)p; + c; + v; +#if defined(SDCC_mcs51) + ASSERT((unsigned char)(v>>16)==0x80); +#endif +} + +void f2(const void * p) +{ + unsigned long v = (unsigned long)p; + v; +#if defined(SDCC_mcs51) + ASSERT((unsigned char)(v>>16)==0x80); +#endif +} + +void +testBug(void) +{ + f1(5, (code void *)0x1234); + f2((code void *)0x1234); +} diff --git a/support/regression/tests/bug1938300.c b/support/regression/tests/bug1938300.c new file mode 100644 index 0000000..065ec84 --- /dev/null +++ b/support/regression/tests/bug1938300.c @@ -0,0 +1,1194 @@ +/* + bug 1938300 +*/ + +#include + +#if (defined PORT_HOST) || defined (SDCC_STACK_AUTO) + +/***************************************************************************** +* Product; Jongle Reconfigurable USB hardware +* Last Updated for Version; +* Date of the Last Update; +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) 2002-2007 Quantum Leaps, LLC. All rights reserved. +* +* This software may be distributed and modified under the terms of the GNU +* General Public License version 2 (GPL) as published by the Free Software +* Foundation and appearing in the file GPL.TXT included in the packaging of +* this file. Please note that GPL Section 2[b] requires that all works based +* on this software must also be made publicly available under the terms of +* the GPL ("Copyleft"). +* +* Alternatively, this software may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GPL and are specifically designed for licensees interested in +* retaining the proprietary status of their code. +* +* Contact information; +* Quantum Leaps Web site; http;//www.quantum-leaps.com +* e-mail; info@quantum-leaps.com +*****************************************************************************/ +#ifndef qpn_port_h +#define qpn_port_h + +/* #include "ezusbfx2.h" */ + +#define NEAR near +#define IDATA idata +#define XDATA xdata +#define CODE code +#define SFR_T sfr +#define BIT_T bit + +#define QF_ISR_NEST +/* #define Q_ROM_VAR CODE */ +/* #define Q_ROM_PTR(X) (X) */ +#define Q_REENTRANT /* __reentrant */ +#define Q_ROM CODE +#define Q_PARAM_SIZE 0 +#define QF_TIMEEVT_CTR_SIZE 2 +#define Q_NFSM +/*#define QF_FSM_ACTIVE*/ +#define QF_MAX_ACTIVE 4 +#define QF_TIMEEVT_CTR_SIZE 2 + + /* interrupt locking policy for task level */ +#define QF_INT_LOCK() EA = 0 +#define QF_INT_UNLOCK() EA = 1 + +#define __disable_interrupt() EA = 0 +#define __enable_interrupt() EA = 1 + + /* interrupt locking policy for interrupt level */ +/* #define QF_ISR_NEST */ /* nesting of ISRs not allowed */ + +/*#include * contains prototypes for the intrinsic functions */ +#include /* Exact-width integer types. WG14/N843 C99 Standard */ + +#endif /* qpn_port_h */ + + + +/***************************************************************************** +* Product; QEP-nano public interface +* Last Updated for Version; 3.4.01 +* Date of the Last Update; Sep 24, 2007 +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) 2002-2007 Quantum Leaps, LLC. All rights reserved. +* +* This software may be distributed and modified under the terms of the GNU +* General Public License version 2 (GPL) as published by the Free Software +* Foundation and appearing in the file GPL.TXT included in the packaging of +* this file. Please note that GPL Section 2[b] requires that all works based +* on this software must also be made publicly available under the terms of +* the GPL ("Copyleft"). +* +* Alternatively, this software may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GPL and are specifically designed for licensees interested in +* retaining the proprietary status of their code. +* +* Contact information; +* Quantum Leaps Web site; http;//www.quantum-leaps.com +* e-mail; info@quantum-leaps.com +*****************************************************************************/ +#ifndef qepn_h +#define qepn_h + +/** \ingroup qepn qfn qkn +* \file qepn.h +* \brief Public QEP-nano interface. +* +* This header file must be included in all modules that use QP-nano. +* Typically, this header file is included indirectly through the +* header file qpn_port.h. +*/ + +#ifndef Q_ROM /* if NOT defined, provide the default definition */ + + /** \brief Macro to specify compiler-specific directive for placing a + * constant object in ROM. + * + * Many compilers for 8-bit Harvard-architecture MCUs provide non-stanard + * extensions to support placement of objects in different memories. + * In order to conserve the precious RAM, QP-nano uses the Q_ROM macro for + * all constant objects that can be allocated in ROM. + * + * To override the following empty definition, you need to define the + * Q_ROM macro in the qpn_port.h header file. Some examples of valid + * Q_ROM macro definitions are; __code (IAR 8051 compiler), code (Keil + * 8051 compiler), PROGMEM (gcc for AVR), __flash (IAR for AVR). + */ + #define Q_ROM +#endif +#ifndef Q_ROM_VAR /* if NOT defined, provide the default definition */ + + /** \brief Macro to specify compiler-specific directive for accessing a + * constant object in ROM. + * + * Many compilers for 8-bit MCUs provide different size pointers for + * accessing objects in various memories. Constant objects allocated + * in ROM (see #Q_ROM macro) often mandate the use of specific-size + * pointers (e.g., far pointers) to get access to ROM objects. The + * macro Q_ROM_VAR specifies the kind of the pointer to be used to access + * the ROM objects. + * + * To override the following empty definition, you need to define the + * Q_ROM_VAR macro in the qpn_port.h header file. An example of valid + * Q_ROM_VAR macro definition is; __far (Freescale HC(S)08 compiler). + */ + #define Q_ROM_VAR +#endif +#ifndef Q_REENTRANT /* if NOT defined, provide the default definition */ + + /** \brief Macro to specify compiler-specific directive for generating + * reentrant function. + * + * Some compilers for 8-bit MCUs provide, most notably the Keil C51 + * compiler for 8051, don't generate ANSI-C compliant reentrant functions + * by default, due to the limited hardware architecture. These compilers + * allow to dedicate specific functions to be reentrant with a special + * extended keyword (such as "reentrant" for Keil C51). The macro + * Q_REENTRANT is defined to nothing by default, to work with ANSI-C + * compiliant compilers, but can be defined to "reentrant" to work with + * Keil C51 and perhpas other compilers. + */ + #define Q_REENTRANT +#endif + +/****************************************************************************/ +/** helper macro to calculate static dimension of a 1-dim array \a array_ */ +#define Q_DIM(array_) (sizeof(array_) / sizeof(array_[0])) + +/****************************************************************************/ +/** \brief get the current QP version number string +* +* \return version of the QP as a constant 6-character string of the form +* x.y.zz, where x is a 1-digit major version number, y is a 1-digit minor +* version number, and zz is a 2-digit release number. +*/ +char const Q_ROM * Q_ROM_VAR QP_getVersion(void); + +/** \brief Scalar type describing the signal of an event. +*/ +typedef uint8_t QSignal; + +/****************************************************************************/ +#ifndef Q_PARAM_SIZE + /** \brief macro to define the size of event parameter. + * Valid values 0, 1, 2, or 4; default 0 + */ + #define Q_PARAM_SIZE 0 +#endif +#if (Q_PARAM_SIZE == 0) +#elif (Q_PARAM_SIZE == 1) + + /** \brief type of the event parameter. + * + * This typedef is configurable via the preprocessor switch #Q_PARAM_SIZE. + * The other possible values of this type are as follows; \n + * none when (Q_PARAM_SIZE == 0); \n + * uint8_t when (Q_PARAM_SIZE == 1); \n + * uint16_t when (Q_PARAM_SIZE == 2); and \n + * uint32_t when (Q_PARAM_SIZE == 4). + */ + typedef uint8_t QParam; +#elif (Q_PARAM_SIZE == 2) + typedef uint16_t QParam; +#elif (Q_PARAM_SIZE == 4) + typedef uint32_t QParam; +#else + #error "Q_PARAM_SIZE defined incorrectly, expected 0, 1, 2, or 4" +#endif + +/** \brief Event structure. +* +* QEvent represents events, optionally with a single scalar parameter. +* \sa Q_PARAM_SIZE +* \sa ;;QParam +*/ +typedef struct QEventTag { + QSignal sig; /**< signal of the event */ + +#if (Q_PARAM_SIZE != 0) + QParam par; /**< scalar parameter of the event */ +#endif +} QEvent; + +/****************************************************************************/ +/** \brief QP reserved signals */ +enum QReservedSignals { + Q_ENTRY_SIG = 1, /**< signal for coding entry actions */ + Q_EXIT_SIG, /**< signal for coding exit actions */ + Q_INIT_SIG, /**< signal for coding nested initial transitions */ + Q_TIMEOUT_SIG, /**< signal used by time events */ + Q_USER_SIG /**< first signal that can be used in user applications */ +}; + +/****************************************************************************/ +struct QFsmTag; /* forward declaration */ + + /** \brief the signature of non-hierarchical state handler function */ +typedef void (*QState)(NEAR struct QFsmTag *me); + +/** \brief Finite State Machine. +* +* QFsm represents a traditional non-hierarchical Finite State Machine (FSM) +* without state hierarchy, but with entry/exit actions. +* +* \note QFsm is not intended to be instantiated directly, but rather serves +* as the base structure for derivation of state machines in the application +* code. +* +* The following example illustrates how to derive a state machine structure +* from QFsm. Please note that the QFsm member super_ is defined as the FIRST +* member of the derived struct. +* \include qepn_qfsm.c +* +* \sa \ref derivation +*/ +typedef struct QFsmTag { + QState state; /**< current active state of the FSM (private) */ + QEvent evt; /**< currently processed event in the FSM (protected) */ +} QFsm; + +/** \brief macro to access the signal of the current event of a state machine +* +* \sa ;;QFsm ;;QHsm +*/ +#define Q_SIG(me_) (((QFsm *)(me_))->evt.sig) + +#if (Q_PARAM_SIZE != 0) +/** \brief macro to access the parameter of the current event of +* a state machine +* +* \sa ;;QFsm ;;QHsm Q_PARAM_SIZE +*/ +#define Q_PAR(me_) (((QFsm *)(me_))->evt.par) +#endif + +#ifndef Q_NFSM + +/** \brief State machine constructor. +* +* \param me_ pointer the state machine structure derived from ;;QHsm. +* \param initial_ is the pointer to the initial state of the state machine. +* \note Must be called only ONCE before taking the initial transition +* with QFsm_init() and dispatching any events via QFsm_dispatch(). +*/ +#define QFsm_ctor(me_, initial_) do { \ + ((QFsm *)me_)->state = (QState)(initial_); \ + Q_SIG(me_) = (QSignal)Q_INIT_SIG; \ +} while (0) + +/** \brief Initializes a FSM +* +* Takes the top-most initial transition in a FSM. +* \param me is the pointer the state machine structure derived from ;;FHsm. +* +* \note Must be called only ONCE after QFsm_ctor() and before any calls +* to QFsm_dispatch(). +*/ +void QFsm_init(NEAR QFsm *me); + +/** \brief Dispatches an event to a FSM +* +* Processes one event at a time in Run-to-Completion fashion. The argument +* \a me is the pointer the state machine structure derived from ;;QFsm. +* +* \note Must be called after QFsm_init(). +*/ +void QFsm_dispatch(NEAR QFsm *me) Q_REENTRANT; + +/* protected methods */ + +/** \brief Returns current active state of a FSM. +* +* \note this is a protected function to be used only inside state handler +* functions. +*/ +#define QFsm_getState(me_) ((QState const)((QFsm *)(me_))->state) + +#endif /* Q_NFSM */ + +/** \brief Designates a target for an initial or regular transition. +* +* Q_TRAN() can be used both in the FSMs and HSMs; +* +* \include qepn_qtran.c +*/ +#define Q_TRAN(target_) do { \ + ((QFsm *)me)->state = (QState)(target_); \ + ((QFsm *)me)->evt.sig = (QSignal)0; \ +} while (0) + +/****************************************************************************/ +#ifndef Q_NHSM + +struct QHsmTag; /* forward declaration */ + + /** \brief the signature of state handler function for HSM */ +typedef QState (*QHsmState)(NEAR struct QHsmTag *me); + + /** \brief a name for the return type from the HSM state handler function */ +typedef QState QSTATE; + +/** \brief a Hierarchical State Machine. +* +* QHsm represents a Hierarchical Finite State Machine (HSM). QHsm +* extends the capabilities of a basic FSM with state hierarchy. +* +* \note QHsm is not intended to be instantiated directly, but rather serves +* as the base structure for derivation of state machines in the application +* code. +* +* The following example illustrates how to derive a state machine structure +* from QHsm. Please note that the QHsm member super_ is defined as the FIRST +* member of the derived struct. +* \include qepn_qhsm.c +* +* \sa \ref derivation +*/ +typedef struct QHsmTag { + QHsmState state; /**< current active state of the HSM (private) */ + QEvent evt; /**< currently processed event in the HSM (protected) */ +} QHsm; + +/* public methods */ +/** \brief State machine constructor. +* +* \param me_ pointer the state machine structure derived from ;;QHsm. +* \param initial_ is the pointer to the initial state of the state machine. +* \note Must be called only ONCE before taking the initial transition +* with QHsm_init() and dispatching any events via QHsm_dispatch(). +*/ +#define QHsm_ctor(me_, initial_) do { \ + ((QHsm *)me_)->state = (QHsmState)(initial_); \ + Q_SIG(me_) = (QSignal)Q_INIT_SIG; \ +} while (0) + +/** \brief Initializes a HSM. +* +* Takes the top-most initial transition in a HSM. +* \param me is the pointer the state machine structure derived from ;;QHsm. +* +* \note Must be called only ONCE after QHsm_ctor() and before any calls +* to QHsm_dispatch(). +*/ +void QHsm_init(NEAR QHsm *me); + +/** \brief Dispatches an event to a HSM +* +* Processes one event at a time in Run-to-Completion fashion. +* \param me is the pointer the state machine structure derived from ;;QHsm. +* +* \note Must be called repetitively for each event after QHsm_init(). +*/ +void QHsm_dispatch(NEAR QHsm *me) Q_REENTRANT; + +/* protected methods... */ + +/** \brief The top-state. +* +* QHsm_top() is the ultimate root of state hierarchy in all HSMs derived +* from ;;QHsm. This state handler always returns (QSTATE)0, which means +* that it "handles" all events. +* +* \sa Example of the QCalc_on() state handler for Q_INIT(). +*/ +QSTATE QHsm_top(NEAR QHsm *me) Q_REENTRANT; + +/** \return the current active state of the \a me_ state machine */ +#define QHsm_getState(me_) ((QHsmState const)((QHsm *)(me_))->state) + +#endif /* Q_NHSM */ + + +/****************************************************************************/ +/* DEPRECATED DEPRECATED DEPRECATED DEPRECATED DEPRECATED DEPRECATED */ + +/* If QPN compatibility level not defined or the level is lower than v3.4 */ +#if (!defined(QPN_COMP_LEVEL) || (QPN_COMP_LEVEL < 34)) + +/** signal for coding the top-most initial transition (deprecated) */ +#define Q_TOP_INIT_SIG Q_INIT_SIG + +/** \brief Designates a target for an initial transition. +* +* \note DEPRECATED +* \sa Q_TRAN() +*/ +#define Q_INIT(target_) Q_TRAN(target_) + +/** \brief Returns current active state of a FSM. +* +* \note DEPRECATED +* \sa QFsm_getState() +*/ +#define QFsm_getState_(me_) QFsm_getState(me_) + +/** \brief Returns current active state of a HSM. +* +* \note DEPRECATED +* \sa QHsm_getState() +*/ +#define QHsm_getState_(me_) QHsm_getState(me_) + +#endif /* QPN_COMP_LEVEL < 34 */ + + +#endif /* qepn_h */ + + + +/***************************************************************************** +* Product; QF-nano public interface +* Last Updated for Version; 3.4.01 +* Date of the Last Update; Sep 18, 2007 +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) 2002-2007 Quantum Leaps, LLC. All rights reserved. +* +* This software may be distributed and modified under the terms of the GNU +* General Public License version 2 (GPL) as published by the Free Software +* Foundation and appearing in the file GPL.TXT included in the packaging of +* this file. Please note that GPL Section 2[b] requires that all works based +* on this software must also be made publicly available under the terms of +* the GPL ("Copyleft"). +* +* Alternatively, this software may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GPL and are specifically designed for licensees interested in +* retaining the proprietary status of their code. +* +* Contact information; +* Quantum Leaps Web site; http;//www.quantum-leaps.com +* e-mail; info@quantum-leaps.com +*****************************************************************************/ +#ifndef qfn_h +#define qfn_h + +/** \ingroup qepn qfn qkn +* \file qfn.h +* \brief Public QF-nano interface. +* +* This header file must be included in all modules that use QP-nano. +* Typically, this header file is included indirectly through the +* header file qpn_port.h. +*/ + +#ifndef QF_TIMEEVT_CTR_SIZE + /** \brief macro to override the default QTimeEvtCtr size. + * Valid values 0, 1, 2, or 4; default 0 + */ + #define QF_TIMEEVT_CTR_SIZE 0 +#endif +#if (QF_TIMEEVT_CTR_SIZE == 0) +#elif (QF_TIMEEVT_CTR_SIZE == 1) + typedef uint8_t QTimeEvtCtr; +#elif (QF_TIMEEVT_CTR_SIZE == 2) + /** \brief type of the Time Event counter, which determines the dynamic + * range of the time delays measured in clock ticks. + * + * This typedef is configurable via the preprocessor switch + * #QF_TIMEEVT_CTR_SIZE. The other possible values of this type are + * as follows; \n + * none when (QF_TIMEEVT_CTR_SIZE not defined or == 0), \n + * uint8_t when (QF_TIMEEVT_CTR_SIZE == 1); \n + * uint16_t when (QF_TIMEEVT_CTR_SIZE == 2); and \n + * uint32_t when (QF_TIMEEVT_CTR_SIZE == 4). + */ + typedef uint16_t QTimeEvtCtr; +#elif (QF_TIMEEVT_CTR_SIZE == 4) + typedef uint32_t QTimeEvtCtr; +#else + #error "QF_TIMER_SIZE defined incorrectly, expected 1, 2, or 4" +#endif + +/** \brief Active Object struct +* +* QActive is the base structure for derivation of active objects. Active +* objects in QF-nano are encapsulated tasks (each embedding a state machine +* and an event queue) that communicate with one another asynchronously by +* sending and receiving events. Within an active object, events are +* processed sequentially in a run-to-completion (RTC) fashion, while QF +* encapsulates all the details of thread-safe event exchange and queuing. +* +* \note ;;QActive is not intended to be instantiated directly, but rather +* serves as the base structure for derivation of active objects in the +* application code. +* +* The following example illustrates how to derive an active object from +* QActive. Please note that the QActive member super_ is defined as the +* FIRST member of the derived struct. +* \include qfn_qactive.c +* +* \sa ;;QActiveTag for the description of the data members \n \ref derivation +*/ +typedef struct QActiveTag { + +#if (!defined(QF_FSM_ACTIVE) && !defined(Q_NHSM)) + QHsm super; /**< derives from the ;;QHsm base structure */ +#else + QFsm super; /**< derives from the ;;QFsm base structure */ +#endif + + /** \brief offset to where next event will be inserted into the buffer + */ + uint8_t head; + + /** \brief offset of where next event will be extracted from the buffer + */ + uint8_t tail; + + /** \brief number of events currently present in the ring buffer + */ + uint8_t nUsed; + +#if (QF_TIMEEVT_CTR_SIZE != 0) + /** \brief Time Event tick counter for the active object + */ + QTimeEvtCtr tickCtr; +#endif +} QActive; + +#if (!defined(QF_FSM_ACTIVE) && !defined(Q_NHSM)) + /** \brief Active object constructor. + * + * \param me_ pointer the active object structure derived from ;;QActive. + * \param initial_ is the pointer to the initial state of the active + * object. + * \note Must be called exactly ONCE for each active object + * in the application before calling QF_run(). + */ + #define QActive_ctor(me_, initial_) do { \ + QHsm_ctor(me_, initial_); \ + ((QActive *)(me_))->nUsed = (uint8_t)0; \ + } while (0) +#else + #define QActive_ctor(me_, initial_) do { \ + QFsm_ctor(me_, initial_); \ + ((QActive *)(me_))->nUsed = (uint8_t)0; \ + } while (0) +#endif + + +#if (Q_PARAM_SIZE != 0) + /** \brief Posts an event \a e directly to the event queue of the acitve + * object \a prio using the First-In-First-Out (FIFO) policy. This + * function briefly locks and unlocks interrupts to protect the + * queue integrity. + * + * Direct event posting is the only asynchronous communication method + * available in QF-nano. The following example illustrates how the + * Ped active object posts directly the PED_WAITING event to the PELICAN + * crossing active object. + * \include qfn_post.c + * + * \note The producer of the event (Ped in this case) must only "know" + * the recipient's priority (Pelican), but the specific definition of + * the Pelican structure is not required. + * + * \note Direct event posting should not be confused with direct event + * dispatching. In contrast to asynchronous event posting through event + * queues, direct event dispatching is synchronous. Direct event + * dispatching occurs when you call QHsm_dispatch(), or QFsm_dispatch() + * function. + */ + void QF_post(uint8_t prio, QSignal sig, QParam par) Q_REENTRANT; + + /** \brief Posts an event \a e directly to the event queue of the acitve + * object \a prio using the First-In-First-Out (FIFO) policy. This + * function does NOT lock/unlock interrupts and is intended only + * to be used inside critical sections (such as inside ISRs that cannot + * nest). + * + * \sa QF_post() + */ + void QF_postISR(uint8_t prio, QSignal sig, QParam par) Q_REENTRANT; +#else + void QF_post(uint8_t prio, QSignal sig) Q_REENTRANT; + void QF_postISR(uint8_t prio, QSignal sig) Q_REENTRANT; +#endif + +/****************************************************************************/ +/** \brief QActive Control Block +* +* QActiveCB represents the constant information that the QF-nano needs +* to manage the active object. QActiveCB objects are grouped in the +* array QF_active[], which typically can be placed in ROM. +* +* The following example illustrates how to allocate and initialize the +* QActive control blocks in the array QF_active[]. +* \include qfn_main.c +*/ +typedef struct QActiveCBTag { + QActive *act; /**< \brief pointer to the active object structure */ + QEvent *queue; /**< \brief pointer to the event queue buffer */ + uint8_t end; /**< \brief the length of the ring buffer */ +} QActiveCB; + +#if (QF_TIMEEVT_CTR_SIZE != 0) + +#if (QF_TIMEEVT_CTR_SIZE > 1) + +/** \brief Arm a one-shot time event for direct event posting. +* +* Arms a time event \a me to fire in \a tout clock ticks +* (one-shot time event). The timeout signal Q_TIMEOUT_SIG gets directly +* posted (using the FIFO policy) into the event queue of the active object +* \a me. +* +* After posting, the time event gets automatically disarmed and can be reused. +* +* A one-shot time event can be disarmed at any time by calling the +* QActive_disarm() function. Also, a one-shot time event can be re-armed +* to fire in a different number of clock ticks by calling QActive_arm() again. +* +* The following example shows how to arm a one-shot time event from a state +* machine of an active object; +* \include qfn_arm.c +*/ +void QActive_arm(NEAR QActive *me, QTimeEvtCtr tout) Q_REENTRANT; + +/** \brief Disarm a time event. +* +* The time event \a me gets disarmed and can be reused. +*/ +void QActive_disarm(NEAR QActive *me) Q_REENTRANT; + +#else /* QF_TIMEEVT_CTR_SIZE must be == 1 */ + +/** \brief Arm a one-shot time event for direct event posting. +* +* Arms a time event \param me_ to fire in \param tout_ clock ticks +* (one-shot time event). The timeout signal Q_TIMEOUT_SIG gets directly +* posted (using the FIFO policy) into the event queue of the active object +* \param me_. +* +* After posting, the time event gets automatically disarmed and can be reused. +* +* A one-shot time event can be disarmed at any time by calling the +* QActive_disarm() function. Also, a one-shot time event can be re-armed +* to fire in a different number of clock ticks by calling QActive_arm() again. +* +* The following example shows how to arm a one-shot time event from a state +* machine of an active object; +* \include qfn_arm.c +*/ +#define QActive_arm(me_, tout_) ((me_)->tickCtr = (QTimeEvtCtr)(tout_)) + +/** \brief Disarm a time event. +* +* The time event \param me_ gets disarmed and can be reused. +*/ +#define QActive_disarm(me_) ((me_)->tickCtr = (QTimeEvtCtr)0) + +#endif /* QF_TIMEEVT_CTR_SIZE > 1 */ + +/** \brief Processes all armed time events at every clock tick. +* +* This function must be called periodically from a time-tick ISR or from +* the highest-priority task so that QF can manage the timeout events. +* +* \note The QF_tick() function is not reentrant meaning that it must run to +* completion before it is called again. Also, QF_tick() assumes that it +* never will get preempted by a task, which is always the case when it is +* called from an ISR or the highest-priority task. +* +* The following example illustrates the call to QF_tick(); +* \include qfn_tick.c +*/ +void QF_tick(void); + +#endif /* (QF_TIMEEVT_CTR_SIZE != 0) */ + +/* protected methods ...*/ + +/** \brief QF initialization. +* +* This function initializes QF and must be called exactly once before any +* other QF function. In QF-nano this function is defined in the BSP. +*/ +void QF_init(void); + +/** \brief Starts the interrupts and initializes other critical resources +* that might interact with the QF application. +* +* QF_start() is called from QF_run(), right before starting the non-preemptive +* multitasking in the background loop. +* +* \note This function is strongly platform-dependent and is not implemented +* in the QF, but either in the QF port or in the Board Support Package (BSP) +* for the given application. +* +* \sa QF initialization example for ;;QActiveCB. +*/ +void QF_start(void); + +/** \brief Transfers control to QF to run the application. +* +* QF_run() implemetns the simple non-preemptive scheduler. QF_run() must be +* called from your startup code after you initialize the QF and define at +* least one active object control block in QF_active[]. +* +* \note When the Quantum Kernel (QK) is used as the underlying real-time +* kernel for the QF, all platfrom dependencies are handled in the QK, so +* no porting of QF is necessary. In other words, you only need to recompile +* the QF platform-independent code with the compiler for your platform, but +* you don't need to provide any platform-specific implementation (so, no +* qf_port.c file is necessary). Moreover, QK implements the function QF_run() +* in a platform-independent way, in the modile qk.c. +*/ +void QF_run(void); + +#ifndef QK_PREEMPTIVE + /** \brief QF idle callback (customized in BSPs for QF) + * + * QF_onIdle() is called by the non-preemptive scheduler built into QF-nano + * when the QF-nano detects that no events are available for active objects + * (the idle condition). This callback gives the application an opportunity + * to enter a power-saving CPU mode, or perform some other idle processing. + * + * \note QF_onIdle() is invoked with interrupts LOCKED because the idle + * condition can be asynchronously changed at any time by an interrupt. + * QF_onIdle() MUST unlock the interrupts internally, but not before + * putting the CPU into the low-power mode. (Ideally, unlocking interrupts + * and low-power mode should happen atomically). At the very least, the + * function MUST unlock interrupts, otherwise interrups will be locked + * permanently. + * + * \note QF_onIdle() is not used in the PREEMPTIVE configuration. When + * QK_PREEMPTIVE macro is defined, the preemptive kernel QK-nano is used + * instead of the non-preemptive QF-nano scheduler. QK-nano uses a + * different idle callback \sa QK_onIdle(). + */ +void QF_onIdle(void); +#endif + +/** \brief Exits the QF application and returns control to the OS/Kernel. +* +* This function exits the framework. After calling this function, QF is no +* longer in control of the application. The typical use of this method is +* for exiting the QF application to return back to the operating system +* or for handling fatal errors that require resetting the system. +* +* This function is strongly platform-dependent and is not implemented in +* QF-nano, but either in the QF port or in the Board Support Package (BSP) +* for the given application. Some QF ports might not require implementing +* QF_exit() at all, because many embedded application don't have anything +* to exit to. +*/ +void QF_exit(void); + + /** active object control blocks */ +extern QActiveCB const Q_ROM Q_ROM_VAR QF_active[]; + + /** the number of control blocks */ +extern uint8_t const Q_ROM Q_ROM_VAR QF_activeNum; + +/** \brief Ready set of QF-nano. +* +* The QF-nano ready set keeps track of active objects that are ready to run. +* The ready set represents each active object as a bit, with the bits +* assigned according to priorities of the active objects. The bit is set +* if the corresponding active object is ready to run (i.e., has one or +* more events in its event queue) and zero if the event queue is empty. +* The QF-nano ready set is one byte-wide, which corresponds to 8 active +* objects maximum. +*/ +extern uint8_t volatile QF_readySet_; + +#endif /* qfn_h */ + + + +/***************************************************************************** +* Product; QP-nano +* Last Updated for Version; 3.4.00 +* Date of the Last Update; Aug 20, 2007 +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) 2002-2007 Quantum Leaps, LLC. All rights reserved. +* +* This software may be distributed and modified under the terms of the GNU +* General Public License version 2 (GPL) as published by the Free Software +* Foundation and appearing in the file GPL.TXT included in the packaging of +* this file. Please note that GPL Section 2[b] requires that all works based +* on this software must also be made publicly available under the terms of +* the GPL ("Copyleft"). +* +* Alternatively, this software may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GPL and are specifically designed for licensees interested in +* retaining the proprietary status of their code. +* +* Contact information; +* Quantum Leaps Web site; http;//www.quantum-leaps.com +* e-mail; info@quantum-leaps.com +*****************************************************************************/ +#ifndef qassert_h +#define qassert_h + +/** \ingroup qepn qfn +* \file qassert.h +* \brief Customizable assertions. +* +* Defines customizable and memory-efficient assertions applicable to +* embedded systems. This header file can be used in C, C++, and mixed C/C++ +* programs. +* +* \note The preprocessor switch Q_NASSERT disables checking assertions. +* In particular macros \ref Q_ASSERT, \ref Q_REQUIRE, \ref Q_ENSURE, +* \ref Q_INVARIANT, and \ref Q_ERROR do NOT evaluate the test condition +* passed as the argument to these macros. One notable exception is the +* macro \ref Q_ALLEGE, that still evaluates the test condition, but does +* not report assertion failures when the switch Q_NASSERT is defined. +*/ +#ifdef Q_NASSERT /* Q_NASSERT defined--assertion checking disabled */ + + #define Q_DEFINE_THIS_FILE + #define Q_DEFINE_THIS_MODULE(name_) + #define Q_ASSERT(ignore_) ((void)0) + #define Q_ALLEGE(test_) ((void)(test_)) + #define Q_ERROR() ((void)0) + +#else /* Q_NASSERT not defined--assertion checking enabled */ + + #ifdef __cplusplus + extern "C" { + #endif + + /** callback invoked in case the condition passed to \ref Q_ASSERT, + * \ref Q_REQUIRE, \ref Q_ENSURE, \ref Q_ERROR, or \ref Q_ALLEGE + * evaluates to FALSE. + * + * \param file file name where the assertion failed + * \param line line number at which the assertion failed + */ + /*lint -sem(Q_assert_handler, r_no) Q_assert_handler() never returns */ + void Q_assert_handler(char const Q_ROM * const Q_ROM_VAR file, int line); + + #ifdef __cplusplus + } + #endif + + /** Place this macro at the top of each C/C++ module to define the file + * name string using __FILE__ (NOTE; __FILE__ might contain lengthy path + * name). This file name will be used in reporting assertions in this file. + */ + #define Q_DEFINE_THIS_FILE \ + static char const Q_ROM Q_ROM_VAR l_this_file[] = __FILE__; + + /** Place this macro at the top of each C/C++ module to define the module + * name as the argument \a name_. This file name will be used in reporting + * assertions in this file. + */ + #define Q_DEFINE_THIS_MODULE(name_) \ + static char const Q_ROM Q_ROM_VAR l_this_file[] = #name_; + + /** General purpose assertion that makes sure the \a test_ argument is + * TRUE. Calls the Q_assert_handler() callback if the \a test_ evaluates + * to FALSE. + * \note the \a test_ is NOT evaluated if assertions are + * disabled with the Q_NASSERT switch. + */ + #define Q_ASSERT(test_) \ + if (test_) { \ + } \ + else (Q_assert_handler(l_this_file, __LINE__)) + + /** General purpose assertion that ALWAYS evaluates the \a test_ + * argument and calls the Q_assert_handler() callback if the \a test_ + * evaluates to FALSE. + * \note the \a test_ argument IS always evaluated even when assertions are + * disabled with the Q_NASSERT macro. When the Q_NASSERT macro is + * defined, the Q_assert_handler() callback is NOT called, even if the + * \a test_ evaluates to FALSE. + */ + #define Q_ALLEGE(test_) Q_ASSERT(test_) + + /** Assertion that always calls the Q_assert_handler() callback if + * ever executed. + * \note can be disabled with the Q_NASSERT switch. + */ + #define Q_ERROR() \ + (Q_assert_handler(l_this_file, __LINE__)) + +#endif /* NASSERT */ + +/** Assertion that checks for a precondition. This macro is equivalent to +* \ref Q_ASSERT, except the name provides a better documentation of the +* intention of this assertion. +*/ +#define Q_REQUIRE(test_) Q_ASSERT(test_) + +/** Assertion that checks for a postcondition. This macro is equivalent to +* \ref Q_ASSERT, except the name provides a better documentation of the +* intention of this assertion. +*/ +#define Q_ENSURE(test_) Q_ASSERT(test_) + +/** Assertion that checks for an invariant. This macro is equivalent to +* \ref Q_ASSERT, except the name provides a better documentation of the +* intention of this assertion. +*/ +#define Q_INVARIANT(test_) Q_ASSERT(test_) + +/** Compile-time assertion exploits the fact that in C/C++ a dimension of + * an array must be non-zero. The following declaration causes a compilation + * error if the compile-time expression (\a test_) is not TRUE. The assertion + * has no runtime side effects. + */ +#define Q_ASSERT_COMPILE(test_) \ + extern char Q_assert_compile[(test_)] + +#endif /* qassert_h */ + + + +/***************************************************************************** +* Product; QEP-nano implemenation +* Last Updated for Version; 3.4.01 +* Date of the Last Update; Sep 18, 2007 +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) 2002-2007 Quantum Leaps, LLC. All rights reserved. +* +* This software may be distributed and modified under the terms of the GNU +* General Public License version 2 (GPL) as published by the Free Software +* Foundation and appearing in the file GPL.TXT included in the packaging of +* this file. Please note that GPL Section 2[b] requires that all works based +* on this software must also be made publicly available under the terms of +* the GPL ("Copyleft"). +* +* Alternatively, this software may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GPL and are specifically designed for licensees interested in +* retaining the proprietary status of their code. +* +* Contact information; +* Quantum Leaps Web site; http;//www.quantum-leaps.com +* e-mail; info@quantum-leaps.com +*****************************************************************************/ + +Q_DEFINE_THIS_MODULE(qepn) + +/** \ingroup qepn qfn +* \file qepn.c +* QEP-nano implementation. +*/ + +/** empty signal for internal use only */ +#define QEP_EMPTY_SIG 0 + +/** maximum depth of state nesting (including the top level), must be >= 2 */ +#define QEP_MAX_NEST_DEPTH 5 + +#ifndef Q_NHSM +/*..........................................................................*/ +void QHsm_dispatch(NEAR QHsm *me) Q_REENTRANT { + QHsmState path[QEP_MAX_NEST_DEPTH]; + QHsmState s; + QHsmState t = me->state; + + path[1] = t; /* save the current state in case a transition is taken */ + + do { /* process the event hierarchically... */ + s = t; + t = (QHsmState)((*s)(me)); /* invoke state handler s */ + } while (t != (QHsmState)0); + + if (me->evt.sig == (QSignal)0) { /* transition taken? */ + QHsmState src = s; /* the source of the transition */ + int8_t ip = (int8_t)(-1); /* transition entry path index */ + int8_t iq; /* helper transition entry path index */ + + path[0] = me->state; /* save the new state */ + me->state = path[1]; /* restore the current state */ + + /* exit current state to the transition source src... */ + for (s = path[1]; s != src; ) { + Q_SIG(me) = (QSignal)Q_EXIT_SIG; + t = (QHsmState)(*s)(me); /* find superstate of s */ + if (t != (QHsmState)0) { /* exit action unhandled */ + s = t; /* t points to superstate */ + } + else { /* exit action handled */ + Q_SIG(me) = (QSignal)QEP_EMPTY_SIG; + s = (QHsmState)(*s)(me); /* find superstate of s */ + } + } + + t = path[0]; /* target of the transition */ + + if (src == t) { /* (a) check source==target (transition to self) */ + Q_SIG(me) = (QSignal)Q_EXIT_SIG; + (void)(*src)(me); /* exit the source */ + ip = (int8_t)0; /* enter the target */ + } + else { + Q_SIG(me) = (QSignal)QEP_EMPTY_SIG; + t = (QHsmState)(*t)(me); /* find superstate of target */ + if (src == t) { /* (b) check source==target->super */ + ip = (int8_t)0; /* enter the target */ + } + else { + Q_SIG(me) = (QSignal)QEP_EMPTY_SIG; + s = (QHsmState)(*src)(me); /* find superstate of src */ + if (s == t) { /* (c) check source->super==target->super */ + Q_SIG(me) = (QSignal)Q_EXIT_SIG; + (void)(*src)(me); /* exit the source */ + ip = (int8_t)0; /* enter the target */ + } + else { + if (s == path[0]) { /* (d) check source->super==target */ + Q_SIG(me) = (QSignal)Q_EXIT_SIG; + (void)(*src)(me); /* exit the source */ + } + else { /* (e) check rest of source==target->super->super.. + * and store the entry path along the way + */ + iq = (int8_t)0; /* indicate that LCA not found */ + ip = (int8_t)1; /* enter target and its superstate */ + path[1] = t; /* save the superstate of target */ + Q_SIG(me) = (QSignal)QEP_EMPTY_SIG; + t = (QHsmState)(*t)(me); /* find superstate of t */ + while (t != (QHsmState)0) { + path[++ip] = t; /* store the entry path */ + if (t == src) { /* is it the source? */ + iq = (int8_t)1; /* indicate that LCA found */ + /* entry path must not overflow */ + Q_ASSERT(ip < (int8_t)QEP_MAX_NEST_DEPTH); + --ip; /* do not enter the source */ + t = (QHsmState)0; /* terminate the loop */ + } + else { /* it is not the source, keep going up */ + Q_SIG(me) = (QSignal)QEP_EMPTY_SIG; + t = (QHsmState)(*t)(me); /* superstate of t */ + } + } + if (iq == (int8_t)0) { /* the LCA not found yet? */ + + /* entry path must not overflow */ + Q_ASSERT(ip < (int8_t)QEP_MAX_NEST_DEPTH); + + Q_SIG(me) = (QSignal)Q_EXIT_SIG; + (void)(*src)(me); /* exit the source */ + + /* (f) check the rest of source->super + * == target->super->super... + */ + iq = ip; + do { + if (s == path[iq]) { /* is this the LCA? */ + t = s; /* indicate that LCA is found */ + ip = (int8_t)(iq - 1);/*do not enter LCA*/ + iq = (int8_t)(-1);/* terminate the loop */ + } + else { + --iq; /* try lower superstate of target */ + } + } while (iq >= (int8_t)0); + + if (t == (QHsmState)0) { /* LCA not found yet? */ + /* (g) check each source->super->... + * for each target->super... + */ + do { + Q_SIG(me) = (QSignal)Q_EXIT_SIG; + t = (QHsmState)(*s)(me); /* exit s */ + if (t != (QHsmState)0) { /* unhandled? */ + s = t; /* t points to super of s */ + } + else { /* exit action handled */ + Q_SIG(me) = (QSignal)QEP_EMPTY_SIG; + s = (QHsmState)(*s)(me);/*super of s*/ + } + iq = ip; + do { + if (s == path[iq]) {/* is this LCA? */ + /* do not enter LCA */ + ip = (int8_t)(iq - 1); + iq = (int8_t)(-1);/*break inner */ + s = (QHsmState)0; /*break outer */ + } + else { + --iq; + } + } while (iq >= (int8_t)0); + } while (s != (QHsmState)0); + } + } + } + } + } + } + /* retrace the entry path in reverse (desired) order... */ + for (; ip >= (int8_t)0; --ip) { + Q_SIG(me) = (QSignal)Q_ENTRY_SIG; + (void)(*path[ip])(me); /* enter path[ip] */ + } + s = path[0]; /* stick the target into register */ + me->state = s; /* update the current state */ + + /* drill into the target hierarchy... */ + Q_SIG(me) = (QSignal)Q_INIT_SIG; + while ((*s)(me) == (QState)0) { + t = me->state; + path[0] = t; + ip = (int8_t)0; + Q_SIG(me) = (QSignal)QEP_EMPTY_SIG; + t = (QHsmState)(*t)(me); /* find superstate of t */ + while (t != s) { + ++ip; + path[ip] = t; + Q_SIG(me) = (QSignal)QEP_EMPTY_SIG; + t = (QHsmState)(*t)(me); /* find superstate of t */ + } + /* entry path must not overflow */ + Q_ASSERT(ip < (int8_t)QEP_MAX_NEST_DEPTH); + + do { /* retrace the entry path in reverse (correct) order... */ + Q_SIG(me) = (QSignal)Q_ENTRY_SIG; + (void)(*path[ip])(me); /* enter path[ip] */ + --ip; + } while (ip >= (int8_t)0); + s = me->state; + Q_SIG(me) = (QSignal)Q_INIT_SIG; + } + } +} + +void Q_assert_handler(char const Q_ROM * const Q_ROM_VAR file, int line) +{ + file; + line; +} + +#endif /* Q_NHSM */ + +#endif //(defined PORT_HOST) || defined (SDCC_STACK_AUTO) + +void +testDummy(void) +{ +} diff --git a/support/regression/tests/bug2077267.c b/support/regression/tests/bug2077267.c new file mode 100644 index 0000000..f0b4da0 --- /dev/null +++ b/support/regression/tests/bug2077267.c @@ -0,0 +1,28 @@ +/* + bug 2077267 +*/ + +#include + +#ifndef SDCC +#define __critical +#endif + +void bug(char* x) +{ + *x = *x + 1; +} + +void +testBug(void) +{ + char x = 1; + + bug(&x); + + __critical { + bug(&x); + } + + ASSERT (x == 3); +} diff --git a/support/regression/tests/bug2094505.c b/support/regression/tests/bug2094505.c new file mode 100644 index 0000000..b657a26 --- /dev/null +++ b/support/regression/tests/bug2094505.c @@ -0,0 +1,19 @@ +/* + bug 2094505 +*/ + +#include + +void +testBug(void) +{ +#if !defined(SDCC) || !defined(SDCC_mcs51) || defined(SDCC_MODEL_LARGE) + // varA has to be declared for the bug to manifest itself + volatile char varA[256] = {0}; + volatile unsigned int varB = 0x1; + volatile unsigned short varC = 0x2; + + // The Less Than comparison ASM for this while loop is generated incorrectly. + ASSERT (varB < varC); +#endif +} diff --git a/support/regression/tests/bug2435941.c b/support/regression/tests/bug2435941.c new file mode 100644 index 0000000..1300857 --- /dev/null +++ b/support/regression/tests/bug2435941.c @@ -0,0 +1,34 @@ +/* + bug 2435941 +*/ + +#include +#include + +uint32_t sleep_timer_get(void) +{ + return 0x12345678; +} + +int32_t remaining; +uint32_t updated; +uint32_t now; + +// no need to call this, it generates compiler error: +// error 9: FATAL Compiler Internal Error +static void do_test(void) reentrant +{ + while (1) + { + now = sleep_timer_get(); + + remaining -= (now - updated) & 0xFF; + updated = now; + } +} + +void +testBug(void) +{ + ASSERT(1); +} diff --git a/support/regression/tests/bug2655200.c b/support/regression/tests/bug2655200.c new file mode 100644 index 0000000..1a4573a --- /dev/null +++ b/support/regression/tests/bug2655200.c @@ -0,0 +1,67 @@ +/* + * [ 2655200 ] pointer to pdata memory not correctly initialized + * + * test_array[..] = &thing_pdata + * was incorrect + * + * SDCCclue.c(initPointer) + * ... SPEC_SCLS (expr->left->etype) == S_PDATA) + * was not handeled + */ + +#include +#include + +#if !defined (SDCC_mcs51) && !defined (SDCC_ds390) +# define __code +#endif + +char thing; +#if defined (SDCC_mcs51) || defined (SDCC_ds390) +__code char thing_code = 0; +__data char thing_data; +__idata char thing_idata; +__xdata char thing_xdata; +__pdata char thing_pdata; +__pdata char thing_apdata[2]; +#endif + + +char * __code test_array[] = { + &thing +#if defined (SDCC_mcs51) || defined (SDCC_ds390) + , &thing_code + , &thing_data, &thing_idata, &thing_xdata, &thing_pdata + , thing_apdata, (char *)thing_apdata +#endif +}; + + +char *gime_thing() { return &thing; } +#if defined (SDCC_mcs51) || defined (SDCC_ds390) +char *gime_thing_code() { return &thing_code; } +char *gime_thing_data() { return &thing_data; } +char *gime_thing_idata() { return &thing_idata; } +char *gime_thing_xdata() { return &thing_xdata; } +char *gime_thing_pdata() { return &thing_pdata; } +char *gime_thing_apdata() { return thing_apdata; } +#endif + + +void +testBug(void) +{ +#if !defined (SDCC_MODEL_MEDIUM) /* test-mcs51-medium fails */ + ASSERT(test_array[0] == gime_thing()); +#endif + +#if defined (SDCC_mcs51) || defined (SDCC_ds390) + ASSERT(test_array[1] == gime_thing_code()); + ASSERT(test_array[2] == gime_thing_data()); + ASSERT(test_array[3] == gime_thing_idata()); + ASSERT(test_array[4] == gime_thing_xdata()); + ASSERT(test_array[5] == gime_thing_pdata()); + ASSERT(test_array[6] == gime_thing_apdata()); + ASSERT(test_array[7] == gime_thing_apdata()); +#endif +} diff --git a/support/regression/tests/bug608752.c b/support/regression/tests/bug608752.c new file mode 100644 index 0000000..820670a --- /dev/null +++ b/support/regression/tests/bug608752.c @@ -0,0 +1,45 @@ +/* OpAssign tests + */ +#include + +#ifdef SDCC +#include +#else +#define _STATMEM +#endif + +typedef struct +{ + char a; + char n; +} item_type; + +item_type t; + + +_STATMEM item_type* get_next_item(void) +{ + /* have a side effect */ + t.n++; + + /* keep things easy, not implementing a list. + Using a true list would break things + even more pointedly: + a) reading beyond end of the list and + b) intermixing list members */ + return &t; +} + + +void +testOpAssign(void) +{ + t.a = 0; + t.n = 0; + + /* get_next_item() should be called only once */ + get_next_item()->a |= 42; + + ASSERT (t.a == 42); + ASSERT (t.n == 1); +} diff --git a/support/regression/tests/bug663539.c b/support/regression/tests/bug663539.c new file mode 100644 index 0000000..28db606 --- /dev/null +++ b/support/regression/tests/bug663539.c @@ -0,0 +1,21 @@ +/* + bug663539.c +*/ + +#include + +#if defined (SDCC_ds390) || defined (SDCC_mcs51) + volatile xdata at 0x7654 char x; +#endif + +void +test_volatile(void) +{ + ASSERT (1); + +#if defined (SDCC_ds390) || defined (SDCC_mcs51) + x; //this should end the simulation + + while (1); //let the "watchdog" bite +#endif +} diff --git a/support/regression/tests/bugs-1596270-1736867.c b/support/regression/tests/bugs-1596270-1736867.c new file mode 100644 index 0000000..bbaac76 --- /dev/null +++ b/support/regression/tests/bugs-1596270-1736867.c @@ -0,0 +1,45 @@ +/* + bugs 1596270 and 1736867. +*/ + +#include + + +typedef unsigned char UINT8; +typedef unsigned char S_GAMES_SI_CHARS; + +typedef struct +{ + S_GAMES_SI_CHARS c; + UINT8 x, y; +}S_GAMES_SI_BLOCK_STRUCT; +#define S_GAMES_SI_BLOCK_STRUCT_size sizeof(S_GAMES_SI_BLOCK_STRUCT) + + +static void +s_Games_SI_BlockInit(S_GAMES_SI_BLOCK_STRUCT *bl, UINT8 +i, UINT8 x, UINT8 y) +{ + bl[i ].x = x - 1; bl[i ].y = y - 1; + bl[i + 1].x = x ; bl[i + 1].y = y - 1; + bl[i + 2].x = x + 1; + bl[i + 2].y = y - 1; + bl[i + 3].x = x - 1; bl[i + 3].y = y ; + bl[i + 4].x = x ; bl[i + 4].y = y ; + bl[i + 5].x = x + 1; bl[i + 5].y = y ; + bl[i + 6].x = x - 1; bl[i + 6].y = y + 1; + bl[i + 7].x = x ; bl[i + 7].y = y + 1; + bl[i + 8].x = x + 1; bl[i + 8].y = y + 1; +} + +void +testBug156270(void) +{ + S_GAMES_SI_BLOCK_STRUCT b[9]; + s_Games_SI_BlockInit(b, 0, 1, 1); + ASSERT(b[1].x == 1); /* 1596270 */ + ASSERT(b[1].y == 0); /* 1596270 */ + ASSERT(b[2].x == 2); /* 1596270 */ + ASSERT(b[2].y == 0); /* 1736867 */ +} + diff --git a/support/regression/tests/compare.c b/support/regression/tests/compare.c new file mode 100644 index 0000000..f058c3a --- /dev/null +++ b/support/regression/tests/compare.c @@ -0,0 +1,114 @@ +/** Test the comparison operators. + + type: char, int, long + storage: static, + attr: volatile + */ +#include + +static void +testCmpAroundZero(void) +{ + {attr} {storage} {type} i; + + i = 5; + + ASSERT(0 < i); + ASSERT(i > 0); + ASSERT(0 <= i); + ASSERT(i >= 0); + + i = -33; + ASSERT(0 > i); + ASSERT(i < 0); + ASSERT(0 >= i); + ASSERT(i <= 0); + + i = 0; + ASSERT(0 == i); + ASSERT(0 <= i); + ASSERT(0 >= i); +} + +static void +testCompareConstants(void) +{ + {attr} {storage} {type} i; + + i = 12; + ASSERT(i < 23); + ASSERT(i > 3); + ASSERT(i > -14); + ASSERT(i <= 23); + ASSERT(i >= 3); + ASSERT(i >= -14); + ASSERT(i <= 12); + ASSERT(i >= 12); + ASSERT(i == 12); + + i = -34; + ASSERT(i > -126); + ASSERT(i < -3); + ASSERT(i < 47); + ASSERT(i >= -126); + ASSERT(i <= -3); + ASSERT(i <= 47); + ASSERT(i <= -34); + ASSERT(i >= -34); + ASSERT(i == -34); +} + +static void +testCompareVariables(void) +{ + {attr} {storage} {type} left, right; + + left = 12; + right = 47; + ASSERT(left < right); + ASSERT(left <= right); + ASSERT(right > left); + ASSERT(right >= left); + + right = -8; + ASSERT(left > right); + ASSERT(left >= right); + ASSERT(right < left); + ASSERT(right <= left); + + right = 0; + ASSERT(left > right); + ASSERT(left >= right); + ASSERT(right < left); + ASSERT(right <= left); + + right = left; + ASSERT(left == right); + ASSERT(left <= right); + ASSERT(left >= right); +} + +static void +testUnsignedCompare(void) +{ + {attr} {storage} unsigned {type} left, right; + + left = 0; + right = (unsigned {type})-1; + + ASSERT(left < right); + ASSERT(left <= right); + ASSERT(right > left); + ASSERT(right >= left); +} +/* + Common cases: + Around zero + Constants on either side (reversal) + <= + >= + == + != + < + > +*/ diff --git a/support/regression/tests/const.c b/support/regression/tests/const.c new file mode 100644 index 0000000..90470f1 --- /dev/null +++ b/support/regression/tests/const.c @@ -0,0 +1,52 @@ +/* Tests usage of const qualifier. + */ +#include + +char k; /* char */ +const char const_char = 123; /* constant char */ +const char * const_char_ptr; /* pointer to constant char */ +char * const char_ptr_const = &k; /* constant pointer to char */ +const char * const const_char_ptr_const = &const_char; + /* constant pointer to constant char */ +char char_array[3]; /* array of char */ +const char const_char_array[] = {1,2,3}; /* array of constant char */ +const char ** const_char_ptr_ptr; /* pointer to pointer to constant char */ + +char +ident(char x) +{ + return x; +} + +void +testConst(void) +{ + /* Since const_char_ptr is in itself not constant, we can change it */ + const_char_ptr = const_char_array; + const_char_ptr++; + ASSERT(*const_char_ptr == 2); + + /* Check for bug #621531 */ + const_char_ptr = const_char_array; + ASSERT(const_char_ptr[0] == 1); + const_char_ptr++; + + /* Since char_ptr_const is constant, we cannot change it. However, */ + /* we can change the object that it points to. */ + *char_ptr_const = 5; + ASSERT(ident(*char_ptr_const)==5); + (*char_ptr_const)++; + ASSERT(ident(*char_ptr_const)==6); + + /* We can't modify const_char_ptr_const or the object that it points */ + /* to. Unfortunately, we can't test that compiler enforces these */ + /* restriction, so just verify its initialization. */ + ASSERT(*const_char_ptr_const == const_char); + + /* We can change const_char_ptr_ptr or the object that it points to. */ + const_char_ptr = const_char_array; + const_char_ptr_ptr = &const_char_ptr; + ASSERT(ident(**const_char_ptr_ptr)==1); + (*const_char_ptr_ptr)++; + ASSERT(ident(**const_char_ptr_ptr)==2); +} diff --git a/support/regression/tests/constantRange.c b/support/regression/tests/constantRange.c new file mode 100644 index 0000000..3b0d283 --- /dev/null +++ b/support/regression/tests/constantRange.c @@ -0,0 +1,215 @@ +/** constant range tests. + +*/ + +#include +#include +#ifdef __sun__ +#include +#else +#include +#endif + +#if defined (__GNUC__) && defined (__alpha__) && (__GNUC__ < 3) +/* bool should be casted to int in order to pass the test. Is this a gcc bug? */ +#define INT_CAST (int) +#else +#define INT_CAST +#endif + + int8_t s8; +uint8_t u8; + + int16_t s16; +uint16_t u16; + + int32_t s32; +uint32_t u32; + +void +testConstantRange (void) +{ + ASSERT (! (INT8_MIN - 1 == s8)); + ASSERT (! (INT8_MAX + 1 == s8)); + ASSERT ( (INT8_MIN - 1 != s8)); + ASSERT ( (INT8_MAX + 1 != s8)); + ASSERT ( (INT8_MIN - 1 < s8)); + ASSERT (! (INT8_MAX < s8)); + ASSERT ( (INT8_MIN <= s8)); + ASSERT (! (INT8_MAX <= s8)); + ASSERT (! (INT8_MIN > s8)); + ASSERT ( (INT8_MAX + 1 > s8)); + ASSERT (! (INT8_MIN - 1 >= s8)); + ASSERT ( (INT8_MAX >= s8)); + + ASSERT (! ( 0 - 1 == u8)); + ASSERT (! (UINT8_MAX + 1 == u8)); + ASSERT ( ( 0 - 1 != u8)); + ASSERT ( (UINT8_MAX + 1 != u8)); + ASSERT ( ( 0 - 1 < u8)); + ASSERT (! (UINT8_MAX < u8)); + ASSERT ( ( 0 <= u8)); + ASSERT (! (UINT8_MAX + 1 <= u8)); + ASSERT (! ( 0 > u8)); + ASSERT ( (UINT8_MAX + 1 > u8)); + ASSERT (! ( 0 - 1 >= u8)); + ASSERT ( (UINT8_MAX >= u8)); + + /* force extension to long to avoid int (16 bit) overflow */ + ASSERT (! (INT16_MIN - 1L == s16)); + ASSERT (! (INT16_MAX + 1L == s16)); + ASSERT ( (INT16_MIN - 1L != s16)); + ASSERT ( (INT16_MAX + 1L != s16)); + ASSERT ( (INT16_MIN - 1L < s16)); + ASSERT (! (INT16_MAX < s16)); + ASSERT ( (INT16_MIN <= s16)); + ASSERT (! (INT16_MAX <= s16)); + ASSERT (! (INT16_MIN > s16)); + ASSERT ( (INT16_MAX + 1L > s16)); + ASSERT (! (INT16_MIN - 1L >= s16)); + ASSERT ( (INT16_MAX >= s16)); + + ASSERT (! ( 0 - 1 == u16)); + ASSERT (! (UINT16_MAX + 1L == u16)); + ASSERT ( ( 0 - 1 != u16)); + ASSERT ( (UINT16_MAX + 1L != u16)); + ASSERT (! (UINT16_MAX < u16)); + ASSERT ( ( 0 <= u16)); + ASSERT (! (UINT16_MAX + 1L <= u16)); + ASSERT (! ( 0 > u16)); + ASSERT ( (UINT16_MAX + 1L > u16)); + ASSERT ( (UINT16_MAX >= u16)); + +#if defined(PORT_HOST) +/* on 32bit host: -1 is presented as 32 bit int, 16 bit unsigned short is promoted to 32 bit int */ + ASSERT ( ( 0 - 1 < u16)); /* -1 > 0 */ + ASSERT (! ( 0 - 1 >= u16)); /* !(-1 <= 0) */ +#else +/* on 16bit sdcc: int (-1) is promoted to unsigned int (0xffff) */ + ASSERT ( ( 0 - 1 > u16)); /* 0xffff > 0 */ + ASSERT (! ( 0 - 1 <= u16)); /* !(0xffff <= 0) */ +#endif + + /* sdcc can't hold a number (INT32_MIN - 1) or (INT32_MAX + 1), + there's no 'double' or 'long long' */ +/* ASSERT (! (INT32_MIN - 1 == s32)); */ +/* ASSERT (! (INT32_MAX + 1 == s32)); */ +/* ASSERT ( (INT32_MIN - 1 != s32)); */ +/* ASSERT ( (INT32_MAX + 1 != s32)); */ +/* ASSERT ( (INT32_MIN - 1 < s32)); */ + ASSERT (! (INT32_MAX < s32)); + ASSERT ( (INT32_MIN <= s32)); + ASSERT (! (INT32_MAX <= s32)); + ASSERT (! (INT32_MIN > s32)); +/* ASSERT ( (INT32_MAX + 1 > s32)); */ +/* ASSERT (! (INT32_MIN - 1 >= s32)); */ + ASSERT ( (INT32_MAX >= s32)); + + ASSERT (! ( 0 - 1 == u32)); +/* ASSERT (! (UINT32_MAX + 1 == u32)); */ + ASSERT ( ( 0 - 1 != u32)); +/* ASSERT ( (UINT32_MAX + 1 != u32)); */ + ASSERT ( ( 0 - 1 > u32)); /* 0xffffffff > 0 */ + ASSERT (! (UINT32_MAX < u32)); + ASSERT ( ( 0 <= u32)); +/* ASSERT (! (UINT32_MAX + 1 <= u32)); */ + ASSERT (! ( 0 > u32)); +/* ASSERT ( (UINT32_MAX + 1 > u32)); */ + ASSERT (! ( 0 - 1 <= u32)); /* !(0xffffffff <= 0) */ + ASSERT ( (UINT32_MAX >= u32)); +} + +void +testFoo1(void) +{ +#ifdef __bool_true_false_are_defined + +#if defined(PORT_HOST) + volatile bool sb, ub; +#else + volatile signed bool sb; + volatile unsigned bool ub; +#endif + + sb = 0; + ub = 0; + + ASSERT (! (-1 == sb)); + ASSERT ( ( 0 == sb)); + ASSERT (! ( 1 == sb)); + + ASSERT ( (-1 != sb)); + ASSERT (! ( 0 != sb)); + ASSERT ( ( 1 != sb)); + + ASSERT ( (-1 < INT_CAST sb)); + ASSERT (! ( 0 < sb)); + + ASSERT ( ( 0 <= sb)); + ASSERT (! ( 1 <= sb)); + + ASSERT (! ( 0 > sb)); + ASSERT ( ( 1 > sb)); + + ASSERT (! (-1 >= INT_CAST sb)); + ASSERT ( ( 0 >= sb)); + + + ASSERT (! (-1 == ub)); + ASSERT ( ( 0 == ub)); + ASSERT (! ( 1 == ub)); + + ASSERT ( (-1 != ub)); + ASSERT (! ( 0 != ub)); + ASSERT ( ( 1 != ub)); + + ASSERT ( (-1 < INT_CAST ub)); + ASSERT (! ( 0 < ub)); + + ASSERT ( ( 0 <= ub)); + ASSERT (! ( 1 <= ub)); + + ASSERT (! ( 0 > ub)); + ASSERT ( ( 1 > ub)); + + ASSERT (! (-1 >= INT_CAST ub)); + ASSERT ( ( 0 >= ub)); +#endif //__bool_true_false_are_defined +} + +void +testFoo2(void) +{ + volatile struct { + signed sb1:1; + signed sb3:3; + unsigned ub1:1; + unsigned ub3:3; + } str; + + str.sb1 = 0; + str.ub1 = 0; + str.sb3 = 0; + str.ub3 = 0; + + ASSERT (! (-2 == str.sb1)); + ASSERT (! (-1 == str.sb1)); + ASSERT ( ( 0 == str.sb1)); + ASSERT (! ( 1 == str.sb1)); + + ASSERT (! (-1 == str.ub1)); + ASSERT ( ( 0 == str.ub1)); + ASSERT (! ( 1 == str.ub1)); + ASSERT (! ( 2 == str.ub1)); + + ASSERT (! (-5 == str.sb3)); + ASSERT (! (-4 == str.sb3)); + ASSERT ( ( 0 == str.sb3)); + ASSERT (! ( 3 == str.sb3)); + ASSERT (! ( 4 == str.sb3)); + + ASSERT (! (-1 == str.ub3)); + ASSERT ( ( 0 == str.ub3)); + ASSERT (! ( 7 == str.ub3)); + ASSERT (! ( 8 == str.ub3)); +} diff --git a/support/regression/tests/constmodifiers.c b/support/regression/tests/constmodifiers.c new file mode 100644 index 0000000..f64dc77 --- /dev/null +++ b/support/regression/tests/constmodifiers.c @@ -0,0 +1,11 @@ +/* Tests usage of constant modifiers. + */ +#include + +void +testUMod(void) +{ + volatile unsigned char a = 0; + + ASSERT((a |= 0xFFL) == 0xFFL); +} diff --git a/support/regression/tests/critical.c b/support/regression/tests/critical.c new file mode 100644 index 0000000..2d66520 --- /dev/null +++ b/support/regression/tests/critical.c @@ -0,0 +1,74 @@ +/* Keyword "critical" tests. + */ +#include + +#if defined(SDCC_mcs51) +#include <8052.h> + +typedef union +{ + unsigned int a; + struct + { + unsigned char b; + unsigned char c; + }; +} big; + +//must be at least 2 bytes big and volatile +volatile big global_var = { 0 }; +int y; + +unsigned int get_global (void) critical +{ + return global_var.a; +} +#endif + +void +testCritical(void) +{ +#if defined(SDCC_mcs51) + big x; + unsigned char i; + + //enable the interrupt and set it + ET2 = 1; + EA = 1; + TF2 = 1; + + critical x.a = global_var.a; + ASSERT(x.b == x.c); + + x.a = get_global(); + ASSERT(x.b == x.c); + + for (i=10; i!=0; i--) + { + critical x.a = global_var.a; + ASSERT(x.b == x.c); + + x.a = get_global(); + ASSERT(x.b == x.c); + } + //check the interrupt has run at all + ASSERT(x.a != 0); + + critical y = 0; + //check the interrupts are still enabled + ASSERT(EA); +#else + ASSERT(1); +#endif +} + +#if defined(SDCC_mcs51) +void T2_isr (void) interrupt 5 using 2 +{ + //do not clear flag ET2 so it keeps interrupting ! + global_var.b++; + if (global_var.b == 0) + global_var.b++; + global_var.c = global_var.b; +} +#endif diff --git a/support/regression/tests/driverstruct.c b/support/regression/tests/driverstruct.c new file mode 100644 index 0000000..9521a28 --- /dev/null +++ b/support/regression/tests/driverstruct.c @@ -0,0 +1,50 @@ +/** Tests a few features of a driver struct - a struct with + many function pointers. +*/ +#include + +/* Set to one to show the bug */ +#if 1 +#define NAME(_a) _a +#else +#define NAME(_a) +#endif + +typedef unsigned char uchar; + +/* Originally from UZIX - http://uzix.sourceforge.net/ + */ + +typedef struct s_devsw { + uchar minors; /* # of minor device numbers */ + int (*dev_init)(uchar NAME(minor)) REENTRANT; + int (*dev_open)(uchar NAME(minor)) REENTRANT; + int (*dev_close)(uchar NAME(minor)) REENTRANT; + int (*dev_read)(uchar NAME(minor), uchar NAME(w)) REENTRANT; + int (*dev_write)(uchar NAME(minor), uchar NAME(w)) REENTRANT; + int (*dev_ioctl)(uchar NAME(minor), int cmd, void *data) REENTRANT; +} devsw_t; + +static int +_init(uchar minor) REENTRANT +{ + return minor; +} + +static devsw_t _sillyDriver = { + 1, + _init, + NULL, NULL, NULL, NULL, NULL +}; + +int +initProxy(devsw_t *pdrv) +{ + return (*pdrv->dev_init)(5); +} + +void +testDriverStruct(void) +{ + initProxy(&_sillyDriver); +} diff --git a/support/regression/tests/enum.c b/support/regression/tests/enum.c new file mode 100644 index 0000000..8dd2362 --- /dev/null +++ b/support/regression/tests/enum.c @@ -0,0 +1,72 @@ +/* Test the types of enum. + */ +#include + +enum _SimpleEnum { + SIMPLE_ZERO, + SIMPLE_ONE, + SIMPLE_TWO +}; + +enum _ValuesEnum { + VALUES_ZERO, + VALUES_FIVE = 5, + VALUES_SIX, + VALUES_SEVEN, + VALUES_TWELVE = 12 +}; + +enum _IndexedEnum { + INDEXED_ZERO, + INDEXED_ONE, + INDEXED_ONE_ALIAS = INDEXED_ONE, + INDEXED_TWO, + INDEXED_THREE, + INDEXED_MATH = INDEXED_ONE_ALIAS + INDEXED_TWO * INDEXED_THREE + +}; + +volatile enum _IntEnum { + INT_256 = 256, + INT_ZERO = 0 +} ie; + +void +testSimpleEnum(void) +{ + ASSERT(SIMPLE_ZERO == 0); + ASSERT(SIMPLE_ONE == 1); + ASSERT(SIMPLE_TWO == 2); +} + +void +testValuesEnum(void) +{ + ASSERT(VALUES_ZERO == 0); + ASSERT(VALUES_FIVE == 5); + ASSERT(VALUES_SIX == 6); + ASSERT(VALUES_SEVEN == 7); + ASSERT(VALUES_TWELVE == 12); +} + +void +testIndexedEnum(void) +{ + ASSERT(INDEXED_ZERO == 0); + ASSERT(INDEXED_ONE == 1); + ASSERT(INDEXED_ONE_ALIAS == 1); + ASSERT(INDEXED_TWO == 2); + ASSERT(INDEXED_MATH == 7); +} + +void +testIntEnum(void) +{ + ASSERT(INT_ZERO == 0); + ASSERT(INT_256 == 256); + + ie = INT_ZERO; + ASSERT(ie == INT_ZERO); + ie = INT_256; + ASSERT(ie == INT_256); +} diff --git a/support/regression/tests/fetchoverlap.c b/support/regression/tests/fetchoverlap.c new file mode 100644 index 0000000..5039b0a --- /dev/null +++ b/support/regression/tests/fetchoverlap.c @@ -0,0 +1,33 @@ +/* Test to reproduce a bug in the z80 compiler where A is used as the + left and right of an operand. +*/ +#include +#include + +/* In the previous bug, both *p and val in the compare operation were + assigned into A due to *p being packed for ACC use into A. +*/ +int +verifyBlock(char *p, char val, int len) +{ + while (len--) { + if (*p++ != val) { + return 0; + } + } + return 1; +} + +void +testOverlap(void) +{ + char buf[20]; + memset(buf, 12, sizeof(buf)); + + buf[12] = 13; + ASSERT(!verifyBlock(buf, 12, sizeof(buf))); + + buf[12] = 12; + ASSERT(verifyBlock(buf, 12, sizeof(buf))); +} + diff --git a/support/regression/tests/float.c b/support/regression/tests/float.c new file mode 100644 index 0000000..e2585aa --- /dev/null +++ b/support/regression/tests/float.c @@ -0,0 +1,131 @@ +/* Float tests. + + operation: ADD, SUB, MUL, DIV, REVDIV +*/ + +#if 1 + // we are in the regression tests + #include + #define DEBUG(x) + + #define {operation} 1 +#else + // we are standalone + #include + #define DEBUG(x) x + #define ASSERT(x) + #define ADD 1 + #define SUB 1 + #define MUL 1 + #define DIV 1 + #define REVDIV 1 +#endif + +#ifdef SDCC_mcs51 +# define STORAGE xdata +# define XDATA xdata +#elif SDCC_pic16 +# define STORAGE code +# define XDATA +#else +# define STORAGE +# define XDATA +#endif + +XDATA volatile float left, right, result; + +struct { + float left, right, add, sub, mul, div, revdiv; +} STORAGE cases[]={ + // left right add sub mul div revdiv + { 12.8, 25.6, 38.4, -12.8, 327.68, 0.5, 2}, + { 12.8, -25.6, -12.8, 38.4, -327.68, -0.5, -2}, + { -12.8, 25.6, 12.8, -38.4, -327.68, -0.5, -2}, + { -12.8, -25.6, -38.4, 12.8, 327.68, 0.5, 2}, + { 100.0, 10.0, 110.0, 90.0, 1000.00, 10.0, 0.1}, + { 1000.0, 10.0, 1010.0, 990.0, 10000.00, 100.0, 0.01}, + { 10000.0, 10.0, 10010.0, 9990.0, 100000.00, 1000.0, 0.001}, + { 100000.0, 10.0, 100010.0, 99990.0, 1000000.00, 10000.0, 0.0001}, + { 1000000.0, 10.0, 1000010.0, 999990.0, 10000000.00, 100000.0, 0.00001}, + {10000000.0, 10.0,10000010.0, 9999990.0,100000000.00, 1000000.0, 0.000001}, + { 0x100, 0x10, 0x110, 0xf0, 0x1000, 0x10, 0.0625}, + { 0x1000, 0x10, 0x1010, 0xff0, 0x10000, 0x100, 0.00390625}, + { 0x10000, 0x10, 0x10010, 0xfff0, 0x100000, 0x1000, 0.00024414}, + { 0x100000, 0x10, 0x100010, 0xffff0, 0x1000000, 0x10000, 0 /* ignore */}, + { 0x1000000, 0x10, 0x1000010, 0xfffff0, 0x10000000, 0x100000, 0 /* ignore */}, + {0x10000000, 0x10,0x10000010, 0xffffff0, (float)0x10000000*0x10, + 0x1000000, 0 /* ignore */}, +}; + +XDATA int tests=0, errors=0; + +char compare (float is, float should) { + float diff = should ? is/should : 0; + tests++; + DEBUG(printf (" %1.3f (%f %f) ", is, should, diff)); + + if (should==0) { + DEBUG(printf ("IGNORED!\n")); + return 0; + } + + // skip the fp roundoff errors + if (diff>0.999999 && diff<1.00001) { + DEBUG(printf ("OK!\n")); + ASSERT(1); + return 0; + } else { + errors++; + DEBUG(printf ("FAIL!\n")); + ASSERT(0); + return 1; + } +} + +void +testFloatMath(void) +{ + int i; + int t = sizeof(cases)/sizeof(cases[0]); + float result; + + for (i=0; i +#include + +#if 0 +# include +# define DEBUG(x) x /* only for "make test-host" */ +#else +# define DEBUG(x) +#endif + +#define {func} (1) + +#define TOLERANCE (1e-5) + +#ifdef SDCC_mcs51 +# define STORAGE __code +#else +# define STORAGE +#endif + +#ifdef SDCC +# ifndef REENTRANT +# define REENTRANT reentrant +# endif +#else +# define REENTRANT +#endif + + +/* now exceptions for targets/functions which would not pass */ +#if defined(SDCC_ds390) +# define ACOSF_DISABLED (1) +#endif + +#if defined(SDCC_hc08) +# define ACOSF_DISABLED (1) +# define EXPF_DISABLED (1) +# define SINHF_DISABLED (1) +# define TANF_DISABLED (1) +#endif + +#if defined(SDCC_mcs51) && defined(SDCC_USE_XSTACK) +# define SINF_DISABLED (1) +# define ACOSF_DISABLED (1) +# define COSF_DISABLED (1) +#endif + +#if defined(SDCC_z80) +# define ACOSF_DISABLED (1) +# define ASINF_DISABLED (1) +# define ATANF_DISABLED (1) +#endif + + +static float dummy(float a) +{ + return a; +} + +typedef float (*float_test_func)(float) REENTRANT; + +/* the table with functions, their argument, expected result, tolerance. + For most 8-bitters each testpoint uses 14 bytes so we could have a few:) */ +struct +{ + float_test_func f; + float arg, result, tolerance; +} +static const STORAGE testpoint[] = +{ + + #if SINF + # if {func}_DISABLED + # warning {func} disabled + { dummy, 0.0, 0.0, TOLERANCE }, + # else + { sinf, 1.0, 0.841470984, TOLERANCE }, + { sinf, -2.0, -0.909297426, TOLERANCE }, + { sinf, 3.14159265/6.0, 0.5, TOLERANCE }, + { sinf, 3.14159265+2.0, -0.909297426, TOLERANCE }, + # endif + #endif + #if SINHF + # if {func}_DISABLED + # warning {func} disabled + { dummy, 0.0, 0.0, TOLERANCE }, + # else + { sinhf, 1.0, 1.175201193, TOLERANCE }, + { sinhf, -2.0, -3.626860407, TOLERANCE }, + { sinhf, 3.14159265/6.0, 0.547853473, TOLERANCE }, + { sinhf, 3.14159265+2.0, 85.49101383, TOLERANCE }, + # endif + #endif + #if ASINF + # if {func}_DISABLED + # warning {func} disabled + { dummy, 0.0, 0.0, TOLERANCE }, + # else + { asinf, 0.5, 3.14159265/6.0, TOLERANCE }, + { asinf, 0.99749498, 1.5, TOLERANCE }, + { asinf, -0.84147098, -1.0, TOLERANCE }, + { asinf, 0.29552020, 0.3, TOLERANCE }, + # endif + #endif + + + #if COSF + # if {func}_DISABLED + # warning {func} disabled + { dummy, 0.0, 0.0, TOLERANCE }, + # else + { cosf, 1.0, 0.540302305, TOLERANCE }, + { cosf, 2.0, -0.416146836, TOLERANCE }, + { cosf, 3.14159265/3.0, 0.5, TOLERANCE }, + { cosf, 3.14159265+2.0, +0.416146836, TOLERANCE }, + # endif + #endif + #if COSHF + { coshf, 1.0, 1.543080634, TOLERANCE }, + { coshf, 2.0, 3.7621956910, TOLERANCE }, + { coshf, 3.0, 10.06766199, TOLERANCE }, + { coshf, 4.0, 27.30823283, TOLERANCE }, + #endif + #if ACOSF + # if {func}_DISABLED + # warning {func} disabled + { dummy, 0.0, 0.0, TOLERANCE }, + # else + { acosf, 0.1, 1.470628905, TOLERANCE }, + { acosf, 0.5, 1.047197551, TOLERANCE }, + { acosf, -0.9, 2.690565841, TOLERANCE }, + { acosf, 0.999, 0.044725087, TOLERANCE }, + # endif + #endif + + + #if TANF + # if {func}_DISABLED + # warning {func} disabled + { dummy, 0.0, 0.0, TOLERANCE }, + # else + { tanf, 1.0, 1.557407724, TOLERANCE }, + { tanf, 2.0, -2.18503986, TOLERANCE }, + { tanf, -1.5, -14.10141994, TOLERANCE }, + # endif + #endif + #if TANHF + { tanhf, 1.0, 0.761594155, TOLERANCE }, + { tanhf, 3.800201167, 0.999, TOLERANCE }, + { tanhf, 1.5, 0.905148253, TOLERANCE }, + #endif + #if ATANF + # if {func}_DISABLED + # warning {func} disabled + { dummy, 0.0, 0.0, TOLERANCE }, + # else + { atanf, 1.0, 0.7853981633, TOLERANCE }, + { atanf, -2.0, -1.1071487177, TOLERANCE }, + { atanf, 42.0, 1.5469913006, TOLERANCE }, + # endif + #endif + + + #if SQRTF + { sqrtf, 5.0, 2.23606801, TOLERANCE }, + { sqrtf, 1522756.0, 1234.0, TOLERANCE }, + { sqrtf, 10000.0, 100.0, TOLERANCE }, + #endif + + + #if EXPF + # if {func}_DISABLED + # warning {func} disabled + { dummy, 0.0, 0.0, TOLERANCE }, + # else + { expf, 2.30258509, 10.0, TOLERANCE }, + { expf, 4.82028150, 124.0, TOLERANCE }, + { expf, 10.0, 22026.46579, TOLERANCE }, + # endif + #endif + #if LOGF + { logf, 2.06115362e-9, -20.0, TOLERANCE }, + { logf, 10.0, 2.30258509, TOLERANCE }, + { logf, 124.0, 4.82028150, TOLERANCE }, + { logf, 22026.46579, 10.0, TOLERANCE }, + #endif + #if LOG10F + { log10f, 0.000001, -6.0, TOLERANCE }, + { log10f, 3.16227766e-4, -3.5, TOLERANCE }, + { log10f, 3.16227766, 0.5, TOLERANCE }, + { log10f, 10.0, 1.0, TOLERANCE }, + { log10f, 1E6, 6.0, TOLERANCE }, + #endif + + + #if FLOORF + # if {func}_DISABLED + # warning {func} disabled + { dummy, 0.0, 0.0, TOLERANCE }, + # else + { floorf, 1.0+0.000001, 1.0, TOLERANCE }, + { floorf, 1.0-0.000001, 0.0, TOLERANCE }, + //{ floorf, 1.0-0.000001, -0.0, TOLERANCE }, /* oops */ + //{ dummy, 0.0, -0.0, TOLERANCE }, /* oops */ + { floorf, -1.0+0.000001, -1.0, TOLERANCE }, + { floorf, -1.0-0.000001, -2.0, TOLERANCE }, + # endif + #endif + + + #if CEILF + { ceilf, 1.0+0.000001, 2.0, TOLERANCE }, + { ceilf, 1.0-0.000001, 1.0, TOLERANCE }, + { ceilf, -1.0+0.000001, 0.0, TOLERANCE }, + { ceilf, -1.0-0.000001, -1.0, TOLERANCE }, + #endif + + + #if FABSF + { fabsf, -1.0e-20, 1.0e-20, TOLERANCE }, + { fabsf, 9999999, 9999999, TOLERANCE }, + #endif + +}; + + +void +testFloat(void) +{ + unsigned char i; + float result, rel_error; + + for( i = 0; i < sizeof testpoint / sizeof testpoint[0]; i++ ) { + + result = testpoint[i].f(testpoint[i].arg); + + rel_error = testpoint[i].result ? result/testpoint[i].result - 1.0 : 0.0; + + DEBUG(printf ("Test No: %d f(%f) = %f should: %f rel_error: %f %s\n", + i, testpoint[i].arg, result, testpoint[i].result, rel_error, + (fabsf(rel_error) < testpoint[i].tolerance) ? "Ok" : "Fail");) + + ASSERT(fabsf(rel_error) < testpoint[i].tolerance); + } +} diff --git a/support/regression/tests/float_trans.c b/support/regression/tests/float_trans.c new file mode 100644 index 0000000..2468a60 --- /dev/null +++ b/support/regression/tests/float_trans.c @@ -0,0 +1,32 @@ +/* Test of transcendent float functions. + Original from Jesus Calvino-Fraga + + func: SQRTF, LOGF, POWF, TANF +*/ +#include +#include + +#if defined (__STDC_IEC_559__) || defined (SDCC) +#define {func} 1 +#endif + +void +testTrans(void) +{ +#ifdef SQRTF + ASSERT(fabsf (sqrtf (5.0) - 2.23606801) < 0.00001); +#endif +#ifdef LOGF + ASSERT(fabsf (logf (124.0) - 4.82028150) < 0.00001); + ASSERT(fabsf (log10f (124.0) - 2.09342169) < 0.00001); +#endif +#ifdef POWF + /* too big for small model */ +# ifndef SDCC_MODEL_SMALL + ASSERT(fabsf (powf (1.5, 2.0) - 2.24999976) < 0.00001); +# endif +#endif +#ifdef TANF + ASSERT(fabsf (tanf (1.6) - -34.23250579) < 0.00001); +#endif +} diff --git a/support/regression/tests/funptrs.c b/support/regression/tests/funptrs.c new file mode 100644 index 0000000..546eb6b --- /dev/null +++ b/support/regression/tests/funptrs.c @@ -0,0 +1,140 @@ +/** Function pointer tests. + + type: BOOL, char, int, long + */ +#include +#include + +#ifndef BOOL +#define BOOL bool +#endif + +#define TYPE_{type} + +/* Must use a typedef as there is no way of adding the code modifier + on the z80. +*/ +typedef void (*NOARGFUNPTR)(void); +typedef void (*ONEARGFUNPTR)({type}) REENTRANT; +typedef long int (*FOURARGFUNPTR)(char, char, long int, long int) REENTRANT; +typedef {type} (*TYPEFUNPTR)({type}, {type}) REENTRANT; + +int count; +FOURARGFUNPTR fafp; +TYPEFUNPTR tfp; + +void +incCount(void) +{ + count++; +} + +void +incBy({type} a) REENTRANT +{ + count += a; +} + +long int f6(char a, char b, long int c, long int d) REENTRANT +{ + switch (a) + { + case 0: return a; + case 1: return b; + case 2: return c; + case 3: return d; + } + return 0; +} + + +void +callViaPtr(NOARGFUNPTR fptr) +{ + (*fptr)(); +} + +void +callViaPtr2(ONEARGFUNPTR fptr, {type} arg) +{ + (*fptr)(arg); +} + +void +callViaPtr3(void (*fptr)(void)) +{ + (*fptr)(); +} + +void +callViaPtrAnsi(NOARGFUNPTR fptr) +{ + fptr(); +} + +void +callViaPtr2Ansi(ONEARGFUNPTR fptr, {type} arg) +{ + fptr(arg); +} + +void +callViaPtr3Ansi(void (*fptr)(void)) +{ + fptr(); +} + +{type} f_ret({type} arg1, {type} arg2) REENTRANT +{ + {type} local; + local = !arg1; + return (local & arg2); +} + + + +void +testFunPtr(void) +{ + fafp = f6; + + ASSERT(count == 0); + callViaPtr(incCount); + ASSERT(count == 1); + callViaPtr2(incBy, 7); + ASSERT(count == 8 || count == 2); + + ASSERT((*fafp)(0, 0x55, 0x12345678, 0x9abcdef0) == 0); + ASSERT((*fafp)(1, 0x55, 0x12345678, 0x9abcdef0) == 0x55); + ASSERT((*fafp)(2, 0x55, 0x12345678, 0x9abcdef0) == 0x12345678); + ASSERT((*fafp)(3, 0x55, 0x12345678, 0x9abcdef0) == 0x9abcdef0); +} + +void +testFunPtrAnsi(void) +{ + fafp = f6; + + count = 0; + callViaPtrAnsi(incCount); + ASSERT(count == 1); + callViaPtr2Ansi(incBy, 7); + ASSERT(count == 8 || count == 2); + + ASSERT(fafp(0, 0x55, 0x12345678, 0x9abcdef0) == 0); + ASSERT(fafp(1, 0x55, 0x12345678, 0x9abcdef0) == 0x55); + ASSERT(fafp(2, 0x55, 0x12345678, 0x9abcdef0) == 0x12345678); + ASSERT(fafp(3, 0x55, 0x12345678, 0x9abcdef0) == 0x9abcdef0); +} + +void +testFunPtrReturn(void) +{ + tfp = f_ret; + + ASSERT(tfp(0, 0) == 0); + ASSERT(tfp(0, 1) == 1); + ASSERT(tfp(1, 0) == 0); + ASSERT(tfp(1, 1) == 0); +} + diff --git a/support/regression/tests/increment.c b/support/regression/tests/increment.c new file mode 100644 index 0000000..bfbb22a --- /dev/null +++ b/support/regression/tests/increment.c @@ -0,0 +1,16 @@ +/** Simple test for increment + + type: signed char, int, long + storage: static, + attr: volatile +*/ +#include + +static void +testIncrement(void) +{ + {attr} {storage} {type} i; + i = 0; + i--; + ASSERT(i == -1); +} diff --git a/support/regression/tests/libmullong.c b/support/regression/tests/libmullong.c new file mode 100644 index 0000000..fc26af4 --- /dev/null +++ b/support/regression/tests/libmullong.c @@ -0,0 +1,111 @@ +/* Test _mullong.c from library + + type: asm, c + */ +#include + +#define type_{type} + +#if defined(PORT_HOST) +# include "sdccconf.h" +# define mullong(a,b) mullong_wrapper(a,b) +# if defined(type_c) && !defined(WORDS_BIGENDIAN) +# define _SDCC_NO_ASM_LIB_FUNCS 1 +# define __near +# define long int +# include "device/lib/_mullong.c" +# endif +#else +# if defined(type_c) +# define _SDCC_NO_ASM_LIB_FUNCS 1 +# endif +# include "device/lib/_mullong.c" +# define mullong _mullong +#endif + +/* gcc 2.95.2 on usf-cf-x86-linux-1 (debian 2.2) has a bug with + * packing structs + */ +#if defined(PORT_HOST) + +#define TYPE_TARGET_CHAR TYPE_BYTE +#define TYPE_TARGET_INT TYPE_WORD +#define TYPE_TARGET_LONG TYPE_DWORD +#define TYPE_TARGET_UCHAR TYPE_UBYTE +#define TYPE_TARGET_UINT TYPE_UWORD +#define TYPE_TARGET_ULONG TYPE_UDWORD + +#if defined(type_c) && !defined(WORDS_BIGENDIAN) +struct +{ + char c1; + short i; + char c2; +} pack_test; + +TYPE_TARGET_LONG +mullong_wrapper (TYPE_TARGET_LONG a, TYPE_TARGET_LONG b) +{ + if (sizeof(pack_test) == 4) + /* length of struct ok: use SDCC library */ + return _mullong (a, b); + else + { + /* buggy gcc: use generic multiplication */ + return a * b; + } +} + +#else + +TYPE_TARGET_LONG +mullong_wrapper (TYPE_TARGET_LONG a, TYPE_TARGET_LONG b) +{ + return a * b; +} + +#endif + +#endif + +void +testlibmullong(void) +{ + ASSERT(mullong ( 0, 0) == 0); + ASSERT(mullong ( 0x100, 0x100) == 0x10000); + ASSERT(mullong (0x01020304, 3) == 0x0306090c); + ASSERT(mullong ( 3, 0x01020304) == 0x0306090c); + ASSERT(mullong (0x000000ff, 2) == 0x000001fe); + ASSERT(mullong ( 2, 0x000000ff) == 0x000001fe); + ASSERT(mullong (0x00007fff, 4) == 0x0001fffc); + ASSERT(mullong ( 4, 0x00007fff) == 0x0001fffc); + ASSERT(mullong (0x003fffff, 8) == 0x01fffff8); + ASSERT(mullong ( 8, 0x003fffff) == 0x01fffff8); + + ASSERT(mullong ( 0x33, 0x34) == 0x00000a5c); + ASSERT(mullong ( 0x34, 0x33) == 0x00000a5c); + ASSERT(mullong ( 0x3334, 0x3536) == 0x0aa490f8); + ASSERT(mullong ( 0x3536, 0x3334) == 0x0aa490f8); + ASSERT(mullong ( 0x333435, 0x363738) == 0x0e98ce98); + ASSERT(mullong ( 0x363738, 0x333435) == 0x0e98ce98); + ASSERT(mullong (0x33343536, 0x3738393a) == 0x777d143c); + ASSERT(mullong (0x3738393a, 0x33343536) == 0x777d143c); + + ASSERT(mullong ( 0xff, 0xfe) == 0x0000fd02); + ASSERT(mullong ( 0xfe, 0xff) == 0x0000fd02); + ASSERT(mullong ( 0xfffe, 0xfdfc) == 0xfdfa0408); + ASSERT(mullong ( 0xfdfc, 0xfffe) == 0xfdfa0408); + ASSERT(mullong ( 0xfffefd, 0xfcfbfa) == 0xfa0d1212); + ASSERT(mullong ( 0xfcfbfa, 0xfffefd) == 0xfa0d1212); + ASSERT(mullong (0xfffefdfc, 0xfbfaf9f8) == 0x20282820); + ASSERT(mullong (0xfbfaf9f8, 0xfffefdfc) == 0x20282820); + + ASSERT(mullong (0xff000000, 0xff000000) == 0); + ASSERT(mullong (0xffff0000, 0xffff0000) == 0); + ASSERT(mullong (0xfffffe00, 0xfffffd00) == 0x00060000); + ASSERT(mullong (0xfffffd00, 0xfffffe00) == 0x00060000); + ASSERT(mullong (0xfffffefd, 0xfffffcfb) == 0x00030e0f); + ASSERT(mullong (0xfffffcfb, 0xfffffefd) == 0x00030e0f); + + ASSERT(mullong (0xffffffff, 0xffffffff) == 1); +} diff --git a/support/regression/tests/literalop.c b/support/regression/tests/literalop.c new file mode 100644 index 0000000..4326256 --- /dev/null +++ b/support/regression/tests/literalop.c @@ -0,0 +1,223 @@ +/* Test operandOperation() in SDCCicode.c + + type: char, short, LONG + */ +#include + +/* 64 bit hosts */ +#if defined(__alpha__) || defined(__x86_64__) +# define LONG int +#else +# define LONG long +#endif + +typedef signed {type} stype; +typedef unsigned {type} utype; + +volatile char is8 = 8; + + signed char sc; + signed short ss; + signed LONG sl; +unsigned char uc; +unsigned short us; +unsigned LONG ul; +volatile signed char vsc; +volatile signed short vss; +volatile signed LONG vsl; +volatile unsigned char vuc; +volatile unsigned short vus; +volatile unsigned LONG vul; +stype s; +volatile stype vs; +utype u; +volatile utype vu; + +unsigned LONG t1, t2; + +int +mulWrapper(int a, int b) +{ + return a * b; +} + +void +testOpOp(void) +{ + /* mul signedness: usualBinaryConversions() */ + vsc = 0x7f; + vuc = 0xfe; + + sc = vsc * vsc; + ASSERT(sc == 1); + sc = vuc * vsc; + ASSERT(sc == 2); + sc = vuc * vuc; + ASSERT(sc == 4); + + ss = vsc * vsc; + ASSERT(ss == 0x3f01); + ss = vuc * vsc; + ASSERT(ss == 0x7e02); + ss = vuc * vuc; + ASSERT(ss == (short) 0xfc04); + /* after promotion the result of the multiplication is 'signed int', which overflows! */ + if (sizeof (int) == 2) + ASSERT(vuc * vuc < 1); + else + { + vus = 0xfffe; + ASSERT(vus * vus < 1); + } + + /* mul ast: valMult() */ + ASSERT((stype) -3 * (stype) -1 == (stype) 3); + ASSERT((stype) -3 * (stype) 1 == (stype) -3); + ASSERT((stype) 3 * (stype) -1 == (stype) -3); + + ASSERT((stype) 1 * (utype) 0xfffffff7 == (utype) 0xfffffff7); + + ASSERT((unsigned char ) 0xfffffff8 * (unsigned char ) 0xfffffff7 == 0xef48); + ASSERT(mulWrapper((unsigned short) 0xfffffff8, (unsigned short) 0xfffffff7) == (sizeof(int) == 2 ? 0x0048 : (unsigned int)0xffef0048)); + ASSERT((unsigned LONG ) 0xfffffff8 * (unsigned LONG ) 0xfffffff7 == 0x0048); + + ASSERT((stype ) 0xfffffff8 * (stype ) 0xfffffff7 == 72); + + ASSERT((signed char ) -1 * (unsigned char ) 0xfffffff7 == (sizeof(int) == 2 ? 0xff09 : 0xffffff09)); + ASSERT((signed short) -1 * (unsigned short) 0xfffffff7 == (sizeof(int) == 2 ? 9u : 0xffff0009)); + ASSERT((signed LONG ) -1 * (unsigned LONG ) 0xfffffff7 == 9u); + + ASSERT((signed char ) -2 * (unsigned char ) 0x8004 == (sizeof(int) == 2 ? 0xfff8 : 0xfffffff8)); + ASSERT((signed short) -2 * (unsigned short) 0x8004 == (sizeof(int) == 2 ? 0xfff8 : 0xfffefff8)); + ASSERT((signed LONG ) -2 * (unsigned LONG ) 0x8004 == 0xfffefff8); + + ASSERT(-1 * 0xfff7 == (sizeof(int) == 2 ? 9 : 0xffff0009)); // 0xfff7 is stored in 'unsigned int' + // but: + ASSERT(-1 * 65527 == -65527); // 65527 (== 0xfff7) is stored in 'signed LONG' + ASSERT(-1 * 33000 == -33000); + + ASSERT(1 * 10000 * is8 == (sizeof(int) == 2 ? 14464 : 80000)); /* int */ + ASSERT(1 * 10000l * is8 == 80000); /* LONG */ + ASSERT(1 * 40000u * is8 == (sizeof(int) == 2 ? 57856u : 320000)); /* unsigned */ + ASSERT(1 * 40000 * is8 == 320000); /* LONG */ + ASSERT(1 * 0x4000 * is8 == (sizeof(int) == 2 ? 0 : 0x20000)); /* unsigned */ + + ASSERT(-2 * 1 < 1); /* comparison with 0 is optimized, so let's use 1 instead */ + ASSERT(-2 * 1u > 1); + ASSERT(0x7fffu * 2 > 1); + ASSERT(0x7fffffffu * 2 > 1); + if (sizeof (int) == 2) + ASSERT(0x7fff * (unsigned char) 2 < 1); + else + ASSERT(mulWrapper(0x7fffffff, (unsigned char) 2) < 1); + ASSERT(mulWrapper(0x7fffffff, (unsigned short) 2) < 1); + + /* mul icode: operandOperation() */ + s = -3; + ASSERT(s * (stype) -1 == (stype) 3); + ASSERT(s * (stype) 1 == (stype) -3); + s = 3; + ASSERT(s * (stype) -1 == (stype) -3); + + s = 1; + ASSERT(s * (utype) 0xfffffff7 == (utype) 0xfffffff7); + uc = (unsigned char ) 0xfffffff8; + ASSERT(uc * (unsigned char ) 0xfffffff7 == 0xef48); + us = (unsigned short) 0xfffffff8; + ASSERT(us * (unsigned short) 0xfffffff7 == (sizeof(int) == 2 ? 0x0048 : 0xffef0048)); + ul = (unsigned LONG ) 0xfffffff8; + ASSERT(ul * (unsigned LONG ) 0xfffffff7 == 0x0048); + ul = (unsigned LONG ) 0xfffffff8; + + ASSERT((stype ) 0xfffffff8 * (stype ) 0xfffffff7 == 72); + + ASSERT((signed char ) -1 * (unsigned char ) 0xfffffff7 == (sizeof(int) == 2 ? 0xff09 : 0xffffff09)); + ASSERT((signed short) -1 * (unsigned short) 0xfffffff7 == (sizeof(int) == 2 ? 9u : 0xffff0009)); + ASSERT((signed LONG ) -1 * (unsigned LONG ) 0xfffffff7 == 9u); + + ASSERT((signed char ) -2 * (unsigned char ) 0x8004 == (sizeof(int) == 2 ? 0xfff8 : 0xfffffff8)); + ASSERT((signed short) -2 * (unsigned short) 0x8004 == (sizeof(int) == 2 ? 0xfff8 : 0xfffefff8)); + ASSERT((signed LONG ) -2 * (unsigned LONG ) 0x8004 == 0xfffefff8); + + /* div ast: valDiv() */ + ASSERT((stype) -12 / (stype) -3 == (stype) 4); + ASSERT((stype) -12 / (stype) 3 == (stype) -4); + ASSERT((stype) 12 / (stype) -3 == (stype) -4); + + ASSERT((unsigned char ) -12 / (signed char ) -3 == (sizeof(int) == 2 ? 0xffaf : 0xffffffaf)); + ASSERT((unsigned short) -12 / (signed short) -3 == (sizeof(int) == 2 ? 0 : 0xffffaaaf)); + ASSERT((unsigned LONG ) -12 / (signed LONG ) -3 == 0); + ASSERT((utype) -12 / (stype) 3 == (stype) 0x55555551); + ASSERT((unsigned char ) 12 / (signed char ) -3 == -4); + ASSERT((unsigned short) 12 / (signed short) -3 == (sizeof(int) == 2 ? 0 : 0xfffffffc)); + ASSERT((unsigned LONG ) 12 / (signed LONG ) -3 == 0); + + ASSERT((stype) -12 / (utype) -3 == 0); + ASSERT((signed char ) -12 / (unsigned char ) 3 == -4); + ASSERT((signed short) -12 / (unsigned short) 3 == (sizeof(int) == 2 ? 0x5551 : -4)); + ASSERT((signed LONG ) -12 / (unsigned LONG ) 3 == 0x55555551); + ASSERT((stype) 12 / (utype) -3 == 0); + + ASSERT(12u / 3 * 10000 == 40000); + + ASSERT(-1 / 1 < 0); + + /* div icode: operandOperation() */ + s = -12; + ASSERT(s / (stype) -3 == (stype) 4); + s = -12; + ASSERT(s / (stype) 3 == (stype) -4); + s = 12; + ASSERT(s / (stype) -3 == (stype) -4); + + uc = -12; + ASSERT(uc / (signed char ) -3 == (sizeof(int) == 2 ? 0xffaf : 0xffffffaf)); + us = -12; + ASSERT(us / (signed short) -3 == (sizeof(int) == 2 ? 0 : 0xffffaaaf)); + ul = -12; + ASSERT(ul / (signed LONG ) -3 == 0); + u = -12; + ASSERT(u / (stype) 3 == (stype) 0x55555551); + uc = 12; + ASSERT(uc / (signed char ) -3 == -4); + us = 12; + ASSERT(us / (signed short) -3 == (sizeof(int) == 2 ? 0 : 0xfffffffc)); + ul = 12; + ASSERT(ul / (signed LONG ) -3 == 0); + + s = -12; + ASSERT(s / (utype) -3 == 0); + sc = -12; + ASSERT(sc / (unsigned char ) 3 == -4); + ss = -12; + ASSERT(ss / (unsigned short) 3 == (sizeof(int) == 2 ? 0x5551 : -4)); + sl = -12; + ASSERT(sl / (unsigned LONG ) 3 == 0x55555551); + s = 12; + ASSERT(s / (utype) -3 == 0); + + + /* mod ast: valMod() */ + /* -11 : 0xfff5 */ + /* -17 : 0xffef */ + ASSERT((stype) -17 % (stype) -11 == (stype) -6); + ASSERT((stype) -17 % (stype) 11 == (stype) -6); + ASSERT((stype) 17 % (stype) -11 == (stype) 6); + ASSERT((unsigned char ) -17 % (signed char ) -11 == 8); + ASSERT((unsigned short) -17 % (signed short) -11 == (sizeof(int) == 2 ? -17 : 3)); + ASSERT((unsigned LONG ) -17 % (signed LONG ) -11 == -17); + ASSERT((unsigned char ) -17 % (signed char ) 11 == 8); + ASSERT((unsigned short) -17 % (signed short) 11 == 3); + ASSERT((unsigned LONG ) -17 % (signed LONG ) 11 == 9); + ASSERT((unsigned char ) 17 % (signed char ) -11 == 6); + ASSERT((unsigned short) 17 % (signed short) -11 == (sizeof(int) == 2 ? 17 : 6)); + ASSERT((unsigned LONG ) 17 % (signed LONG ) -11 == 17); + + ASSERT(-3 % 2 < 0); + + + /* add */ + ASSERT( 80 + 80 == 160); + ASSERT(150 + 150 == 300); + ASSERT(160u + 160u == 320); +} diff --git a/support/regression/tests/logic.c b/support/regression/tests/logic.c new file mode 100644 index 0000000..25f3e81 --- /dev/null +++ b/support/regression/tests/logic.c @@ -0,0 +1,115 @@ +/** Tests the basic logical operations. + + type: char, int, long + storage: static, + attr: volatile + values: 5, 350, 31734 + */ +#include + +static {type} +alwaysTrue(void) +{ + return ({type}){values}; +} + +static {type} +alwaysFalse(void) +{ + return 0; +} + +static {type} +neverGetHere(void) +{ + FAILM("Shouldn't get here"); + return 0; +} + +static int hit; + +static void +resetGetHere(void) +{ + hit = 0; +} + +static {type} +alwaysGetHere(void) +{ + hit++; + return 1; +} + +static void +testLogicalAnd(void) +{ + {type} true = alwaysTrue(); + {type} false = alwaysFalse(); + + ASSERT(true && true && true); + ASSERT(true && !false); + ASSERT(!false && true); + + /* Test that the evaluation is aborted on the first false. */ + if (true && false && neverGetHere()) { + /* Tested using neverGetHere() */ + } + + /* Alternate that is similar. */ + if (true && false) { + neverGetHere(); + /* Tested using neverGetHere() */ + } + + resetGetHere(); + /* Test that the evaluation is done left to right. */ + if (alwaysGetHere() && true && false) { + ASSERT(hit == 1); + } +} + +static void +testLogicalOr(void) +{ + {type} true = alwaysTrue(); + {type} false = alwaysFalse(); + + ASSERT(false || false || true); + ASSERT(!true || !false); + ASSERT(false || true); + + /* Test that the evaluation is aborted on the first hit. */ + if (false || true || neverGetHere()) { + /* Tested using neverGetHere() */ + } + + resetGetHere(); + /* Test that the evaluation is done left to right. */ + if (alwaysGetHere() || true || false) { + ASSERT(hit == 1); + } +} + +static void +testNot(void) +{ + {type} true = alwaysTrue(); + {type} false = alwaysFalse(); + + ASSERT(!false); + ASSERT(!!true); + ASSERT(!!!false); +} + +static void +testFlagToVariable(void) +{ + {type} true = alwaysTrue(); + {type} false = alwaysFalse(); + {type} val = !true; + + ASSERT(!val); + val = !!false; + ASSERT(!false); +} diff --git a/support/regression/tests/long_asm_line.c b/support/regression/tests/long_asm_line.c new file mode 100644 index 0000000..202ab8d --- /dev/null +++ b/support/regression/tests/long_asm_line.c @@ -0,0 +1,21 @@ +/* Long line assembler test + */ +#include + +volatile unsigned char U0GCR; +volatile unsigned char CLKCON; + +enum __nesc_unnamed4261 { + CC2430_CLKCON_OSC32K = 7, + CC2430_CLKCON_OSC = 6, + CC2430_CLKCON_TICKSPD = 3, + CC2430_CLKCON_CLKSPD = 0, + CC2430_CLKCON_TICKSPD_MASK = 0x38 +}; + +void +testLongAsmLine(void) +{ + U0GCR = 230400 == 2400 ? 6 + ((CLKCON & (1 << CC2430_CLKCON_OSC)) >> CC2430_CLKCON_OSC) : 230400 == 4800 ? 7 + ((CLKCON & (1 << CC2430_CLKCON_OSC)) >> CC2430_CLKCON_OSC) : 230400 == 9600 ? 8 + ((CLKCON & (1 << CC2430_CLKCON_OSC)) >> CC2430_CLKCON_OSC) : 230400 == 14400 ? 8 + ((CLKCON & (1 << CC2430_CLKCON_OSC)) >> CC2430_CLKCON_OSC) : 230400 == 19200 ? 9 + ((CLKCON & (1 << CC2430_CLKCON_OSC)) >> CC2430_CLKCON_OSC) : 230400 == 28800 ? 9 + ((CLKCON & (1 << CC2430_CLKCON_OSC)) >> CC2430_CLKCON_OSC) : 230400 == 38400 ? 10 + ((CLKCON & (1 << CC2430_CLKCON_OSC)) >> CC2430_CLKCON_OSC) : 230400 == 57600 ? 10 + ((CLKCON & (1 << CC2430_CLKCON_OSC)) >> CC2430_CLKCON_OSC) : 230400 == 76800 ? 11 + ((CLKCON & (1 << CC2430_CLKCON_OSC)) >> CC2430_CLKCON_OSC) : 230400 == 115200 ? 11 + ((CLKCON & (1 << CC2430_CLKCON_OSC)) >> CC2430_CLKCON_OSC) : 230400 == 153600 ? 12 + ((CLKCON & (1 << CC2430_CLKCON_OSC)) >> CC2430_CLKCON_OSC) : 230400 == 230400 ? 12 + ((CLKCON & (1 << CC2430_CLKCON_OSC)) >> CC2430_CLKCON_OSC) : 230400 == 307200 ? 13 + ((CLKCON & (1 << CC2430_CLKCON_OSC)) >> CC2430_CLKCON_OSC) : 0; +} + diff --git a/support/regression/tests/longlit.c b/support/regression/tests/longlit.c new file mode 100644 index 0000000..ded0d15 --- /dev/null +++ b/support/regression/tests/longlit.c @@ -0,0 +1,17 @@ +/* Testing arithmetics with long litterals + */ + +#include + +#define OSCILLATOR 11059200 +#define BAUD 19200L + +#define T1_RELOAD_VALUE -(2*OSCILLATOR)/(32*12*BAUD) + +static unsigned char T1=T1_RELOAD_VALUE; + +void +testLongLit(void) +{ + ASSERT(T1==0xfd); +} diff --git a/support/regression/tests/longor.c b/support/regression/tests/longor.c new file mode 100644 index 0000000..4e30cc5 --- /dev/null +++ b/support/regression/tests/longor.c @@ -0,0 +1,18 @@ +/** Test long OR. + Was a bug where 1 was turned into 0x10000 on PPC. + */ +#include + +void +testLongOR(void) +{ + volatile unsigned long l; + + l = 0; + l |= 1L; + ASSERT(l == 1); + + l = 0; + l |= 1; + ASSERT(l == 1); +} diff --git a/support/regression/tests/malloc.c b/support/regression/tests/malloc.c new file mode 100644 index 0000000..bbc36a0 --- /dev/null +++ b/support/regression/tests/malloc.c @@ -0,0 +1,88 @@ +/* Simple malloc tests. + */ +#include +#if defined(SDCC_pic16) +#include +#endif +#include + +#if defined(SDCC_pic16) +xdata char heap[100]; +#endif + +void +testMalloc(void) +{ + void xdata *p1, *p2, *p3; + char *p; + unsigned char i; + +#if !defined(__GNUC__) && !defined(SDCC_gbz80) && !defined(SDCC_z80) +#if defined(SDCC_pic16) + _initHeap(heap, sizeof heap); +#endif + + p1 = malloc(2000); + ASSERT(p1 == NULL); + LOG(("p1 == NULL when out of memory\n")); +#ifdef PORT_HOST + LOG(("p1: %p\n", p1)); +#else + LOG(("p1: %u\n", (unsigned) p1)); +#endif +#endif + + p1 = malloc(5); + ASSERT(p1 != NULL); +#ifdef PORT_HOST + LOG(("p1: %p\n", p1)); +#else + LOG(("p1: %u\n", (unsigned) p1)); +#endif + + p2 = malloc(20); + ASSERT(p2 != NULL); +#ifdef PORT_HOST + LOG(("p2: %p\n", p2)); +#else + LOG(("p2: %u\n", (unsigned) p2)); +#endif + + p = (char*)p2; + for (i=0; i<20; i++, p++) + *p = i; + + p2 = realloc(p2, 25); + ASSERT(p2 != NULL); +#ifdef PORT_HOST + LOG(("p2, after expanding realloc: %p\n", p2)); +#else + LOG(("p2, after expanding realloc: %u\n", (unsigned) p2)); +#endif + + p = (char*)p2; + for (i=0; i<20; i++, p++) + ASSERT(*p == i); + + p2 = realloc(p2, 15); + ASSERT(p2 != NULL); +#ifdef PORT_HOST + LOG(("p2, after shrinking realloc: %p\n", p2)); +#else + LOG(("p2, after shrinking realloc: %u\n", (unsigned) p2)); +#endif + + p = (char*)p2; + for (i=0; i<15; i++, p++) + ASSERT(*p == i); + + free(p2); + + p3 = malloc(10); + ASSERT(p3 != NULL); +#ifdef PORT_HOST + LOG(("p3, after freeing p2: %p\n", p3)); +#else + LOG(("p3, after freeing p2: %u\n", (unsigned) p3)); +#endif +} diff --git a/support/regression/tests/memory.c b/support/regression/tests/memory.c new file mode 100644 index 0000000..911900b --- /dev/null +++ b/support/regression/tests/memory.c @@ -0,0 +1,47 @@ +/** memory function test +*/ +#include + +#include + +unsigned char destination[4]; +const unsigned char source[4] = {0, 1, 2, 3}; + +void testmemory(void) +{ + /* Test memset() */ + destination[3] = 23; + memset(destination, 42, 3); + ASSERT(destination[0] == 42); + ASSERT(destination[2] == 42); + ASSERT(destination[3] == 23); + + /* Test memcpy() */ + memcpy(destination + 1, source + 1, 2); + ASSERT(destination[0] == 42); + ASSERT(destination[2] == source[2]); + ASSERT(destination[3] == 23); + + /* Test memmove() */ + memcpy(destination, source, 4); + memmove(destination, destination + 1, 3); + ASSERT(destination[0] == source[1]); + ASSERT(destination[2] == source[3]); + ASSERT(destination[3] == source[3]); + memcpy(destination, source, 4); + memmove(destination + 1, destination, 3); + ASSERT(destination[0] == source[0]); + ASSERT(destination[1] == source[0]); + ASSERT(destination[3] == source[2]); + + /* Test memchr() */ + /* memchr() is not yet supported by sdcc. + ASSERT(NULL == memchr(destination, 5, 4)); + ASSERT(destination == memchr(destination, 0, 4)); + ASSERT(destination + 3 == memchr(destination, 3, 4));*/ + + ASSERT(strlen("test") == 4); + ASSERT(strlen("t") == 1); + ASSERT(strlen("") == 0); +} + diff --git a/support/regression/tests/muldiv.c b/support/regression/tests/muldiv.c new file mode 100644 index 0000000..b5aa5c1 --- /dev/null +++ b/support/regression/tests/muldiv.c @@ -0,0 +1,115 @@ +/** Simple test for the mul/div/mod operations. + + type: int, char, short, long + storage: static, + attr: volatile, +*/ +#include + +void +testUnsignedModDiv(void) +{ + {attr} {storage} unsigned {type} i; + unsigned {type} result; + + i = 100; + + result = i/3; + ASSERT(result == 33); + + result = i/12; + ASSERT(result == 8); + + result = i%7; + ASSERT(result == 2); + + result = i%34; + ASSERT(result == 32); +} + +void +testUnsignedMul(void) +{ + {attr} {storage} unsigned {type} i; + unsigned {type} result; + + i = 37; + + LOG(("i*3 == 111 = %u\n", (int)(i*3))); + result = i*3; + ASSERT(result == 111); + + result = i*12; + ASSERT(result == ((unsigned {type})444)); +} + +void +testMul(void) +{ + {attr} {storage} signed {type} i; + signed {type} result; + + i = 5; + + LOG(("i*5 == 25 = %u\n", (int)(i*5))); + result = i*5; + ASSERT(result == 25); + LOG(("i*-4 == -20 = %u\n", (int)(i*-4))); + ASSERT(i*-4 == -20); + + i = -10; + LOG(("i*12 == -120 = %u\n", (int)(i*12))); + ASSERT(i*12 == -120); + LOG(("i*-3 == 30 = %u\n", (int)(i*-3))); + ASSERT(i*-3 == 30); +} + +void mark(void) +{ +} + +void +testDiv(void) +{ + {attr} {storage} signed {type} i; + + i = 100; + LOG(("i/5 == 20 = %u\n", (int)i/5)); + ASSERT(i/5 == 20); + LOG(("i/-4 == -25 = %u\n", (int)i/-4)); + mark(); + ASSERT(i/-4 == -25); + + i = -50; + LOG(("i/25 == -2 = %u\n", (int)i/25)); + ASSERT(i/25 == -2); + LOG(("i/-12 == 4 = %u\n", (int)i/-12)); + ASSERT(i/-12 == 4); + //power of 2 + ASSERT(i/4 == -12); +} + +void +testMod(void) +{ + {attr} {storage} signed {type} i; + + // Disabled the LOG functions due to a bug in sdcc involving + // vaargs. + i = 100; + // LOG(("i%%17 == 15 = %u\n", (int)(i%9))); + ASSERT(i%17 == 15); + + // LOG(("i%%-7 == 2 = %u\n", (int)i%-7)); + ASSERT(i%-7 == 2); + //power of 2 + ASSERT(i%-8 == 4); + + i = -49; + // LOG(("i%%3 == -1 = %u\n", (int)i%3)); + ASSERT(i%3 == -1); + // LOG(("i%%-5 == -4 = %u\n", (int)i%-5)); + ASSERT(i%-5 == -4); + //power of 2 + ASSERT(i%4 == -1); +} diff --git a/support/regression/tests/not.c b/support/regression/tests/not.c new file mode 100644 index 0000000..f50b696 --- /dev/null +++ b/support/regression/tests/not.c @@ -0,0 +1,42 @@ +/** not.c test ! operator + + ANSI: return type is int + + attr: volatile, +*/ +#include + +void +testNot(void) +{ + signed char {attr} sc; + unsigned char {attr} uc; + unsigned int {attr} ui; + unsigned long {attr} ul; + + sc = 0; + uc = 0; + ui = 0; + ul = 0; + /* remember: unsigned * signed -> unsigned */ + /* signed * signed -> signed */ + ASSERT(!( signed char) 0 * -1 < 0); + ASSERT(!(unsigned char) 0 * -1 < 0); + ASSERT(!sc * -1 < 0); + ASSERT(!uc * -1 < 0); + ASSERT(! 0 * -1 < 0); + ASSERT(! 0u * -1 < 0); + ASSERT(!ui * -1 < 0); + ASSERT(! 0l * -1 < 0); + ASSERT(! 0ul * -1 < 0); + ASSERT(!ul * -1 < 0); + + ASSERT(!(char) 0 << 8 == 0x100); + ASSERT(!sc << 8 == 0x100); +#if !defined(PORT_HOST) + ASSERT(!0 << 16 == 0); + ASSERT(!0l << 16 == 0); + ASSERT(!ui << 16 == 0); + ASSERT(!ul << 16 == 0); +#endif +} diff --git a/support/regression/tests/nullstring.c b/support/regression/tests/nullstring.c new file mode 100644 index 0000000..a513082 --- /dev/null +++ b/support/regression/tests/nullstring.c @@ -0,0 +1,40 @@ +/** Null character in string tests. + + storage: data, xdata, code, +*/ +#include + +#ifndef PORT_HOST +#pragma disable_warning 147 //no warning about excess elements in array of chars initializer +#endif + +{storage} char string1[] = ""; +{storage} char string2[] = "a\0b\0c"; +{storage} char string3[5] = "a\0b\0c"; + +void +testStringArray (void) +{ + /* Make sure the strings are the correct size */ + /* and have the terminating null character */ + ASSERT (sizeof (string1) == 1); + ASSERT (sizeof (string2) == 6); + ASSERT (sizeof (string3) == 5); + ASSERT (string1[0] == 0); + ASSERT (string2[5] == 0); + + ASSERT (string2[0]== 'a'); + ASSERT (string2[2]== 'b'); + ASSERT (string2[4]== 'c'); + +} + +void +testStringConst(void) +{ + char * constStr1 = ""; + char * constStr2 = "a\0b\0c"; + + ASSERT (constStr1[0] == 0); + ASSERT (constStr2[5] == 0); +} diff --git a/support/regression/tests/onebyte.c b/support/regression/tests/onebyte.c new file mode 100644 index 0000000..d44e1b0 --- /dev/null +++ b/support/regression/tests/onebyte.c @@ -0,0 +1,251 @@ +/** test one byte mul/div/mod operations. + + attrL: volatile, + attrR: volatile, +*/ +#include + +void +testMul (void) +{ + {attrL} char cL; + {attrL} unsigned char ucL; + {attrR} char cR; + {attrR} unsigned char ucR; + volatile char r8 , r8b; + volatile unsigned char ur8, ur8b; + volatile short r16, r16b; + + cL = -127; cR = -5; r16 = cL * cR; r16b = cR * cL; ASSERT (r16 == 635); ASSERT (r16b == 635); + cL = 127; cR = -5; r16 = cL * cR; r16b = cR * cL; ASSERT (r16 == -635); ASSERT (r16b == -635); + cL = -127; cR = 5; r16 = cL * cR; r16b = cR * cL; ASSERT (r16 == -635); ASSERT (r16b == -635); + cL = 127; cR = 5; r16 = cL * cR; r16b = cR * cL; ASSERT (r16 == 635); ASSERT (r16b == 635); + + cL = -128; cR = -1; ur8 = cL * cR; ur8b = cR * cL; ASSERT (ur8 == 128); ASSERT (ur8b == 128); + cL = 128; cR = -1; r8 = cL * cR; r8b = cR * cL; ASSERT ( r8 == -128); ASSERT ( r8b == -128); + cL = -128; cR = 1; r8 = cL * cR; r8b = cR * cL; ASSERT ( r8 == -128); ASSERT ( r8b == -128); + cL = 128; cR = 1; ur8 = cL * cR; ur8b = cR * cL; ASSERT (ur8 == 128); ASSERT (ur8b == 128); + + ucL = 128; cR = -5; r16 = ucL * cR; r16b = cR * ucL; ASSERT (r16 == -640); ASSERT (r16b == -640); + ucL = 128; cR = 5; r16 = ucL * cR; r16b = cR * ucL; ASSERT (r16 == 640); ASSERT (r16b == 640); + + ucL = 127; cR = -1; r8 = ucL * cR; r8b = cR * ucL; ASSERT ( r8 == -127); ASSERT ( r8b == -127); + ucL = 128; cR = 1; ur8 = ucL * cR; ur8b = cR * ucL; ASSERT (ur8 == 128); ASSERT (ur8b == 128); + ucL = 128; ucR = 5; r16 = ucL * ucR; r16b = ucR * ucL; ASSERT (r16 == 640); ASSERT (r16b == 640); + ucL = 128; ucR = 1; ur8 = ucL * ucR; ur8b = ucR * ucL; ASSERT (ur8 == 128); ASSERT (ur8b == 128); + + ucL = 254; cR = -1; r16 = ucL * cR; ASSERT (r16 == -254); + cL = -128; cR = -1; r16 = cL * cR; ASSERT (r16 == 128); +} + +void +testDiv (void) +{ + {attrL} char cL; + {attrL} unsigned char ucL; + {attrR} char cR; + {attrR} unsigned char ucR; + volatile char r8; + volatile unsigned char ur8; + volatile short r16; + + cL = -128; cR = -2; r8 = cL / cR; ASSERT (r8 == 64); + cL = -128; cR = -2; r16 = cL / cR; ASSERT (r16 == 64); + + ucL = 255; ucR = 3; r8 = ucL / ucR; ASSERT (r8 == 85); + ucL = 255; ucR = 255; r8 = ucL / ucR; ASSERT (r8 == 1); + ucL = 3; ucR = 255; r8 = ucL / ucR; ASSERT (r8 == 0); + + cL = 127; cR = 3; r8 = cL / cR; ASSERT (r8 == 42); + cL = -127; cR = 3; r8 = cL / cR; ASSERT (r8 == -42); + cL = 127; cR = -3; r8 = cL / cR; ASSERT (r8 == -42); + cL = -127; cR = -3; r8 = cL / cR; ASSERT (r8 == 42); + + ucL = 127; cR = 3; r8 = ucL / cR; ASSERT (r8 == 42); + ucL = 255; cR = 3; r8 = ucL / cR; ASSERT (r8 == 85); + ucL = 127; cR = -3; r8 = ucL / cR; ASSERT (r8 == -42); + ucL = 255; cR = -3; r8 = ucL / cR; ASSERT (r8 == -85); + + cL = 127; ucR = 3; r8 = cL / ucR; ASSERT (r8 == 42); + cL = -127; ucR = 3; r8 = cL / ucR; ASSERT (r8 == -42); + cL = 127; ucR = 128; r8 = cL / ucR; ASSERT (r8 == 0); + cL = -127; ucR = 128; r8 = cL / ucR; ASSERT (r8 == 0); + + cL = 127; cR = 1; r8 = cL / cR; ASSERT (r8 == 127); + cL = 127; cR = 1; r16 = cL / cR; ASSERT (r16 == 127); + + ucL = 251; cR = 1; ur8 = ucL / cR; ASSERT (ur8 == 251); + ucL = 251; cR = 1; r16 = ucL / cR; ASSERT (r16 == 251); + + ucL = 253; cR = -3; r8 = ucL / cR; ASSERT (r8 == -84); + ucL = 253; cR = -3; r16 = ucL / cR; ASSERT (r16 == -84); + + ucL = 254; cR = -1; r16 = ucL / cR; ASSERT (r16 == -254); + cL = -128; cR = -1; r16 = cL / cR; ASSERT (r16 == 128); +} + +void +testMod (void) +{ + {attrL} char cL; + {attrL} unsigned char ucL; + {attrR} char cR; + {attrR} unsigned char ucR; + volatile char r8; + volatile unsigned char ur8; + volatile short r16; + + ucL = 128; cR = 5; r16 = ucL % cR; ASSERT (r16 == 3); + ucL = 128; cR = -5; r16 = ucL % cR; ASSERT (r16 == 3); + ucL = 128; ucR = 5; r16 = ucL % ucR; ASSERT (r16 == 3); + + ucL = 128; ucR = 255; ur8 = ucL % ucR; ASSERT (ur8 == 128); + ucL = 128; ucR = 255; r16 = ucL % ucR; ASSERT (r16 == 128); + + ucL = 128; cR = 127; r8 = ucL % cR; ASSERT (r8 == 1); + + cL = 127; cR = 5; r16 = cL % cR; ASSERT (r16 == 2); + r16 = -1; + cL = 127; cR = -5; r16 = cL % cR; ASSERT (r16 == 2); + r16 = -1; + cL = 127; ucR = 5; r16 = cL % ucR; ASSERT (r16 == 2); + + cL = -128; cR = 5; r16 = cL % cR; ASSERT (r16 == -3); + r16 = 0; + cL = -128; cR = -5; r16 = cL % cR; ASSERT (r16 == -3); + r16 = 0; + cL = -128; ucR = 5; r16 = cL % ucR; ASSERT (r16 == -3); +} + +void +testOr (void) +{ + {attrL} char cL; + {attrL} unsigned char ucL; + {attrR} char cR; + {attrR} unsigned char ucR; + volatile short r16, r16b; + + cL = 0x00; cR = 0x80; r16 = cL | cR; r16b = cR | cL; ASSERT (r16 == (short) 0xff80); ASSERT (r16b == (short) 0xff80); + ucL = 0x80; cR = 0x00; r16 = ucL | cR; r16b = cR | ucL; ASSERT (r16 == 0x80); ASSERT (r16b == 0x80); + ucL = 0x80; ucR = 0x80; r16 = ucL | ucR; r16b = ucR | ucL; ASSERT (r16 == 0x80); ASSERT (r16b == 0x80); +} + +void +testXor (void) +{ + {attrL} char cL; + {attrL} unsigned char ucL; + {attrR} char cR; + {attrR} unsigned char ucR; + volatile short r16, r16b; + + cL = 0x80; cR = 0x80; r16 = cL ^ cR; r16b = cR ^ cL; ASSERT (r16 == 0); ASSERT (r16b == 0); + cL = 0x80; cR = 0x00; r16 = cL ^ cR; r16b = cR ^ cL; ASSERT (r16 == (short) 0xff80); ASSERT (r16b == (short) 0xff80); + + ucL = 0x80; cR = 0x80; r16 = ucL ^ cR; r16b = cR ^ ucL; ASSERT (r16 == (short) 0xff00); ASSERT (r16b == (short) 0xff00); + ucL = 0x80; cR = 0; r16 = ucL ^ cR; r16b = cR ^ ucL; ASSERT (r16 == 0x80); ASSERT (r16b == 0x80); + ucL = 0; cR = 0x80; r16 = ucL ^ cR; r16b = cR ^ ucL; ASSERT (r16 == (short) 0xff80); ASSERT (r16b == (short) 0xff80); + + ucL = 0x80; ucR = 0x80; r16 = ucL ^ ucR; r16b = ucR ^ ucL; ASSERT (r16 == 0); ASSERT (r16b == 0); + ucL = 0; ucR = 0x80; r16 = ucL ^ ucR; r16b = ucR ^ ucL; ASSERT (r16 == 0x80); ASSERT (r16b == 0x80); +} + +void +testAnd (void) +{ + {attrL} char cL; + {attrL} unsigned char ucL; + {attrR} char cR; + {attrR} unsigned char ucR; + volatile short r16, r16b; + + cL = 0x80; cR = 0x80; r16 = cL & cR; r16b = cR & cL; ASSERT (r16 == (short) 0xff80); ASSERT (r16b == (short) 0xff80); + ucL = 0x80; cR = 0x80; r16 = ucL & cR; r16b = cR & ucL; ASSERT (r16 == 0x80); ASSERT (r16b == 0x80); + ucL = 0x80; ucR = 0x80; r16 = ucL & ucR; r16b = ucR & ucL; ASSERT (r16 == 0x80); ASSERT (r16b == 0x80); +} + +void +testComplement (void) +{ + {attrR} char c; + {attrR} unsigned char uc; + volatile short r16; + + c = 0x00; r16 = ~ c; ASSERT (r16 == (short) 0xffff); ASSERT (~ c < 0); + uc = 0x00; r16 = ~uc; ASSERT (r16 == (short) 0xffff); ASSERT (~uc < 0); + ASSERT (~ (char) 0x00 == (short) 0xffff); ASSERT (~ (char) 0x00 < 0); + ASSERT (~ (unsigned char) 0x00 == (short) 0xffff); ASSERT (~ (unsigned char) 0x00 < 0); + c = 0x80; r16 = ~ c; ASSERT (r16 == (short) 0x007f); ASSERT (~ c > 0); + uc = 0x80; r16 = ~uc; ASSERT (r16 == (short) 0xff7f); ASSERT (~uc < 0); + ASSERT (~ (char) 0x80 == (short) 0x007f); ASSERT (~ (char) 0x80 > 0); + ASSERT (~ (unsigned char) 0x80 == (short) 0xff7f); ASSERT (~ (unsigned char) 0x80 < 0); + + ASSERT (~ 1 < 0); + ASSERT (~ 1u > 0); + ASSERT (~ 1l < 0); + ASSERT (~ 1ul > 0); +} + +void +testCompare (void) +{ + {attrL} signed char c; + {attrR} unsigned char uc; + + c = 0x80; /* -128 */ + uc = 0x80; /* +128 */ + + ASSERT (!(c == uc)); + ASSERT ( c != uc ); + ASSERT ( c < uc ); + ASSERT ( c <= uc ); + ASSERT (!(c > uc)); + ASSERT (!(c >= uc)); +} + +void +testUMinus (void) +{ + signed char {attrL} sc; + unsigned char {attrL} uc; + signed int {attrL} si; + unsigned int {attrL} ui; + signed long {attrL} sl; + unsigned long {attrL} ul; + + ASSERT (-(53l ) < 0); + ASSERT (-(53ul) > 0); + ul = 53; + ASSERT (-ul > 0); + sl = 53; + ASSERT (-sl < 0); + + ASSERT (-(53 ) < 0); + ASSERT (-(53u ) > 0); + ui = 53; + ASSERT (-ui > 0); + si = 53; + ASSERT (-si < 0); + + ASSERT (-( 250 ) == -250); + uc = 250; + ASSERT (-uc == -250); + + ASSERT (-(-128 ) == 128); + sc = -128; + ASSERT (-sc == 128); +} + +void +testBug1571231 (void) +{ + unsigned char {attrL} uc; + + /* bug-1571231 */ + uc = 0x80; + if (uc + 0x80) + ASSERT (1); + else + ASSERT (0); +} diff --git a/support/regression/tests/packcast.c b/support/regression/tests/packcast.c new file mode 100644 index 0000000..86b8a23 --- /dev/null +++ b/support/regression/tests/packcast.c @@ -0,0 +1,29 @@ +/* Tests that a cast used as a parameter gets packed into + HL +*/ +#include + +void +spoil(int a) +{ + UNUSED(a); +} + +void +testCastPack(char x) +{ + int i, j; + volatile char a = x; + + for (i = 0; i < 5; i++) + { + for (j = 0; j < 5; j++) + { + spoil(a); + } + } +} + +void testBug(void) +{ +} diff --git a/support/regression/tests/pow2shifts.c b/support/regression/tests/pow2shifts.c new file mode 100644 index 0000000..a1884da --- /dev/null +++ b/support/regression/tests/pow2shifts.c @@ -0,0 +1,22 @@ +/* Test power of 2 based shifts. + sign: signed, unsigned + */ +#include + +void +testIntShift(void) +{ + volatile {sign} int left; + + left = 4; + ASSERT(left * 1024 == 4096); + ASSERT(left * 2048 == 8192); + ASSERT(left * 256 == 1024); + ASSERT(left * 64 == 256); + + left = 4096; + ASSERT(left / 1024 == 4); + ASSERT(left / 2048 == 2); + ASSERT(left / 256 == 16); + ASSERT(left / 4 == 1024); +} diff --git a/support/regression/tests/preproc.c b/support/regression/tests/preproc.c new file mode 100644 index 0000000..dc5940c --- /dev/null +++ b/support/regression/tests/preproc.c @@ -0,0 +1,54 @@ +/* + preproc.c +*/ + +#include + +/* + * test for bug 135170 + */ +const char * +const_str(void) +{ +return "A" + + + +/* just for testing, actually nop */ +#pragma save + + + + + +"B"; +#pragma restore +} + +/* + * test for bug 982435 + */ +#if !defined (__GNUC__) && !defined (_MSC_VER) +/* since this fails on GCC cpp and MSVC cl -E... */ +#pragma pedantic_parse_number + + +#define LO_B(x) ((x) & 0xff) +#define BAD(x) ((x) & 0xff) + +unsigned char +hexeminus(void) +{ +unsigned char a=0x\ +fe\ +-\ +LO_B(3); + +unsigned char b=0xfe-BAD(3); + +return (a + b); +} +#endif + +void testBug(void) +{ +} diff --git a/support/regression/tests/regtrack.c b/support/regression/tests/regtrack.c new file mode 100644 index 0000000..fe42654 --- /dev/null +++ b/support/regression/tests/regtrack.c @@ -0,0 +1,124 @@ +/* + regtrack.c - testing register tracking +*/ + +#include +#include + +#ifndef SDCC_mcs51 +# define __xdata +# define __pdata +# define __code +#endif + +volatile unsigned char __xdata t; + +__pdata unsigned char ta[]={0x00,0x01,0x01,0x02,0x01,0xfe,0x7f,0xfe,0xef}; +__code const unsigned char tb[]={0x00,0x01,0x01,0x02,0x01,0xfe,0x7f,0xfe,0xef}; + +static void +foo(unsigned char which) +{ + unsigned char i,k; // should be allocated to registers + volatile unsigned char m = 1; + + k = 2; + do + { + t = 0xab; + i = 2; + do + { + switch( which ) + { + case 1: k = 1; + t = 1; // mov + break; + case 2: t = 0x01; + t = 0x02; // inc + break; + case 3: t = 0x05; + t = 0x04; + t = 0x03; // dec + break; + case 4: t = ~0x04; + t = 0x04; // cpl + break; + case 5: t = 0x05<<1; + t = 0x05; // rr + break; + case 6: t = 0x06>>1; + t = 0x06; // rl + break; + case 7: t = 0x70; + t = 0x07; // swap + break; + case 0x08: + t = 0x0a; + k = 0x02; + t = 0x08; // xrl + break; + case 0x09: + t = 0x0f; + k = 0xf9; + t = 0x09; // anl + break; + case 0x0a: + t = 0x08; + k = 0x02; + t = 0x0a; // orl + break; + case 0x0b: + t = 0x0b*7; + k = 7; + t = t/7; // div + break; + case 0x0c: + t = 4; + k = 3; + t = t*3; // mul + break; + } + } while(--i); + + if(!i) + k = m; // prepare to exit outer loop + + }while(--k); + +} + + + + +void +testRegTrack(void) +{ + ASSERT(0==(char)memcmp(ta, tb, sizeof tb)); + + foo(1); ASSERT(t==1); + foo(2); ASSERT(t==2); + foo(3); ASSERT(t==3); + foo(4); ASSERT(t==4); +#if 1 + /* various checks for equality */ + foo(5); ASSERT(!(t^5)); + foo(6); ASSERT(0==(t^6)); + foo(7); ASSERT(!(t-7)); + foo(8); ASSERT(0==(t-8)); + foo(9); ASSERT(0==((unsigned char)(t+(0x100-9)))); + foo(10); ASSERT(!((unsigned char)(t+(0x100-10)))); + foo(11); ASSERT(t>=11 && t<=11); + foo(12); ASSERT(t>11 && t<13); +#else + foo(5); ASSERT(t==5); + foo(6); ASSERT(t==6); + foo(7); ASSERT(t==7); + foo(8); ASSERT(t==8); + foo(9); ASSERT(t==9); + foo(10); ASSERT(t==10); + foo(11); ASSERT(t==11); + foo(12); ASSERT(t==12); +#endif +} + diff --git a/support/regression/tests/rotate.c b/support/regression/tests/rotate.c new file mode 100644 index 0000000..bb87676 --- /dev/null +++ b/support/regression/tests/rotate.c @@ -0,0 +1,111 @@ +/** Tests covering rotate operations + size: 8,16,32 + msb: 0,1 +*/ +#include +#ifdef __sun__ +#include +#else +#include +#endif + +#define SIZE ({size}) +#define MSB ({msb}) + +#if SIZE == 8 +# define TYPE uint8_t +# if MSB +# define TEST_VECT 0xa4 +# else +# define TEST_VECT 0x53 +# endif +#endif + +#if SIZE == 16 +# define TYPE uint16_t +# if MSB +# define TEST_VECT 0xa8ce +# else +# define TEST_VECT 0x5357 +# endif +#endif + +#if SIZE == 32 +# define TYPE uint32_t +# if MSB +# define TEST_VECT 0xa8c5a5c6 +# else +# define TEST_VECT 0x55357553 +# endif +#endif + +TYPE rol1(TYPE s){ return (s<<1) | (s>>(SIZE-1)); } +TYPE rol2(TYPE s){ return (s<<2) | (s>>(SIZE-2)); } +TYPE rol3(TYPE s){ return (s<<3) | (s>>(SIZE-3)); } +TYPE rol4(TYPE s){ return (s<<4) | (s>>(SIZE-4)); } +TYPE rol5(TYPE s){ return (s<<5) | (s>>(SIZE-5)); } +TYPE rol6(TYPE s){ return (s<<6) | (s>>(SIZE-6)); } +TYPE rol7(TYPE s){ return (s<<7) | (s>>(SIZE-7)); } + +#if SIZE >=16 +TYPE rol8 (TYPE s){ return (s<<8 ) | (s>>(SIZE-8 )); } +TYPE rol9 (TYPE s){ return (s<<9 ) | (s>>(SIZE-9 )); } +TYPE rol10(TYPE s){ return (s<<10) | (s>>(SIZE-10)); } +TYPE rol11(TYPE s){ return (s<<11) | (s>>(SIZE-11)); } +TYPE rol12(TYPE s){ return (s<<12) | (s>>(SIZE-12)); } +TYPE rol13(TYPE s){ return (s<<13) | (s>>(SIZE-13)); } +TYPE rol14(TYPE s){ return (s<<14) | (s>>(SIZE-14)); } +TYPE rol15(TYPE s){ return (s<<15) | (s>>(SIZE-15)); } +#endif + +#if SIZE >=32 +TYPE rol16(TYPE s){ return (s<<16) | (s>>(SIZE-16)); } +TYPE rol17(TYPE s){ return (s<<17) | (s>>(SIZE-17)); } + +TYPE rol23(TYPE s){ return (s<<23) | (s>>(SIZE-23)); } +TYPE rol24(TYPE s){ return (s<<24) | (s>>(SIZE-24)); } +TYPE rol25(TYPE s){ return (s<<25) | (s>>(SIZE-25)); } + +TYPE rol30(TYPE s){ return (s<<30) | (s>>(SIZE-30)); } +TYPE rol31(TYPE s){ return (s<<31) | (s>>(SIZE-31)); } +#endif + +static void +testRol(void) +{ + volatile TYPE t = TEST_VECT; + TYPE u; + + u = t; + + ASSERT( rol1(u) == (TYPE)((TEST_VECT<<1) | (TEST_VECT>>(SIZE-1))) ); + ASSERT( rol2(u) == (TYPE)((TEST_VECT<<2) | (TEST_VECT>>(SIZE-2))) ); + ASSERT( rol3(u) == (TYPE)((TEST_VECT<<3) | (TEST_VECT>>(SIZE-3))) ); + ASSERT( rol4(u) == (TYPE)((TEST_VECT<<4) | (TEST_VECT>>(SIZE-4))) ); + ASSERT( rol5(u) == (TYPE)((TEST_VECT<<5) | (TEST_VECT>>(SIZE-5))) ); + ASSERT( rol6(u) == (TYPE)((TEST_VECT<<6) | (TEST_VECT>>(SIZE-6))) ); + ASSERT( rol7(u) == (TYPE)((TEST_VECT<<7) | (TEST_VECT>>(SIZE-7))) ); + +#if SIZE >=16 + ASSERT( rol8 (u) == (TYPE)((TEST_VECT<<8 ) | (TEST_VECT>>(SIZE-8 ))) ); + ASSERT( rol9 (u) == (TYPE)((TEST_VECT<<9 ) | (TEST_VECT>>(SIZE-9 ))) ); + ASSERT( rol10(u) == (TYPE)((TEST_VECT<<10) | (TEST_VECT>>(SIZE-10))) ); + ASSERT( rol11(u) == (TYPE)((TEST_VECT<<11) | (TEST_VECT>>(SIZE-11))) ); + ASSERT( rol12(u) == (TYPE)((TEST_VECT<<12) | (TEST_VECT>>(SIZE-12))) ); + ASSERT( rol13(u) == (TYPE)((TEST_VECT<<13) | (TEST_VECT>>(SIZE-13))) ); + ASSERT( rol14(u) == (TYPE)((TEST_VECT<<14) | (TEST_VECT>>(SIZE-14))) ); + ASSERT( rol15(u) == (TYPE)((TEST_VECT<<15) | (TEST_VECT>>(SIZE-15))) ); +#endif + +#if SIZE >=32 + ASSERT( rol16(u) == (TYPE)((TEST_VECT<<16) | (TEST_VECT>>(SIZE-16))) ); + ASSERT( rol17(u) == (TYPE)((TEST_VECT<<17) | (TEST_VECT>>(SIZE-17))) ); + + ASSERT( rol23(u) == (TYPE)((TEST_VECT<<23) | (TEST_VECT>>(SIZE-23))) ); + ASSERT( rol24(u) == (TYPE)((TEST_VECT<<24) | (TEST_VECT>>(SIZE-24))) ); + ASSERT( rol25(u) == (TYPE)((TEST_VECT<<25) | (TEST_VECT>>(SIZE-25))) ); + + ASSERT( rol30(u) == (TYPE)((TEST_VECT<<30) | (TEST_VECT>>(SIZE-30))) ); + ASSERT( rol31(u) == (TYPE)((TEST_VECT<<31) | (TEST_VECT>>(SIZE-31))) ); +#endif +} diff --git a/support/regression/tests/scott-add.c b/support/regression/tests/scott-add.c new file mode 100644 index 0000000..5fb229b --- /dev/null +++ b/support/regression/tests/scott-add.c @@ -0,0 +1,155 @@ +/* Addition tests + */ +#include + +/* bit types are not ANSI - so provide a way of disabling bit types + * if this file is used to test other compilers besides SDCC */ +#define SUPPORT_BIT_TYPES 0 + +/* Some compilers that support bit types do not support bit arithmetic + * (like bitx = bity + bitz;) */ +#define SUPPORT_BIT_ARITHMETIC 0 + +#if SUPPORT_BIT_TYPES + +bit bit0 = 0; +bit bit1 = 0; +bit bit2 = 0; +bit bit3 = 0; +bit bit4 = 0; +bit bit5 = 0; +bit bit6 = 0; +bit bit7 = 0; +bit bit8 = 0; +bit bit9 = 0; +bit bit10 = 0; +bit bit11 = 0; + +#endif + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; +unsigned char achar2 = 0; +unsigned char achar3 = 0; +unsigned char *acharP = 0; + +void +test_add_lit2uchar(void) +{ + achar0 = achar0 + 5; + + ASSERT(achar0 == 5); + + achar0 += 10; + + ASSERT(achar0 == 15); + + achar0 = achar0 +1; // Should be an increment + + ASSERT(achar0 == 16); + + for(achar1 = 0; achar1 < 100; achar1++) + achar0 += 2; + + ASSERT(achar0 == 216); +} + +void +test_add_uchar2uchar_setup(void) +{ + achar0=16; + achar1=0; +} + +void +test_add_uchar2uchar(void) +{ + achar1 = achar1 + achar0; + + ASSERT(achar1 == 16); + + for(achar2 = 0; achar2<7; achar2++) + achar1 += achar0; + + ASSERT(achar1 == 128); +} + +// assumes +// achar0 = 0 +// achar1 = 32 +// achar2, achar3 can be anything. + +void +test_add_uchar2uchar2_setup(void) +{ + achar0 = 0; + achar1 = 32; +} + +void +test_add_uchar2uchar2(void) +{ + achar0++; + achar0 = achar0 + 1; + achar0 = achar0 + 2; + achar0 = achar0 + 3; + + ASSERT(achar0 == 7); + + achar1 += achar0; + ASSERT(achar1 == 39); + + achar2 = achar1 + achar0; + ASSERT(achar2 == 46); + + achar3 = achar2 + achar1 + achar0; + ASSERT(achar3 == 92); + +} + +#if SUPPORT_BIT_TYPES +void add_bits(void) +{ + + bit1 = bit0; + + bit0 = 1; + + if(bit1 != 0) + failures++; + + bit1 = bit1+bit0; + ASSERT(bit1 == 1); + +#if SUPPORT_BIT_ARITHMETIC + bit2 = bit1+bit3; + ASSERT(bit2 != 0); + + bit3 = bit4+bit5+bit6+bit7+bit0; + ASSERT(bit3 == 0); +#endif +} + +/* add_bit2uchar(void) - assumes bit0 = 1, achar0 = 7 */ + +void +disabled_test_add_bit2uchar(void) +{ + achar0 += bit0; + + ASSERT(achar0 == 8); + + ASSERT(achar0 == bit0); +} + +void +disabled_test_add_bit2uint(void) +{ + ASSERT(aint0 == bit11); + + aint0 += bit0; + ASSERT(aint0 == 1); +} +#endif diff --git a/support/regression/tests/scott-arrays.c b/support/regression/tests/scott-arrays.c new file mode 100644 index 0000000..a873653 --- /dev/null +++ b/support/regression/tests/scott-arrays.c @@ -0,0 +1,124 @@ +/* + */ +#include + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; + +void +bool_or1 (void) +{ + + ASSERT (!((achar0 > 0) || (achar1 > 0))); +} + +void +bool_or2 (void) +{ + + ASSERT (!(achar0 || achar1)); +} + +void +bool_test1 (void) +{ + + ASSERT (!((achar0 == 0) || achar1)); +} + + +void +bool_test2 (void) +{ + + ASSERT (!((achar0 == 0) || aint0)); +} + +void +bool_and1 (void) +{ + + ASSERT (!(achar0 && achar1)); +} + +void +bin_or1 (void) +{ + + char t; + + t = achar0 | achar1; + ASSERT (!(t)); +} + +void +bin_xor1 (void) +{ + + ASSERT (!(achar0 ^ achar1)); +} + + +void +bool_test3 (void) +{ + + ASSERT (!((achar0 == 0x42) || (achar1 == 42))); +} + + +void +bool_or_lit1 (void) +{ + + achar0 |= 0x0f; + + ASSERT (!(achar0 > 0x10)); + + ASSERT (!((achar0 | 0x10) > 0xf0)); + +} + +void +bool_and_lit1 (void) +{ + + achar0 &= 0xf0; + + ASSERT (!(achar0 > 0x10)); + + ASSERT (!((achar0 & 0x10) > 0xf0)); + + achar0 &= 0xef; + +} + +void +testArrays (void) +{ + + bool_or1 (); + bool_or2 (); + bool_and1 (); + bin_or1 (); + bin_xor1 (); + + achar0++; + bool_and1 (); + bool_test1 (); + bool_test2 (); + bool_test3 (); + + + achar0--; + achar1++; + bool_and1 (); + + achar0 = 0; + achar1 = 0; + + bool_or_lit1 (); + bool_and_lit1 (); +} diff --git a/support/regression/tests/scott-b.c b/support/regression/tests/scott-b.c new file mode 100644 index 0000000..534253b --- /dev/null +++ b/support/regression/tests/scott-b.c @@ -0,0 +1,45 @@ +/* + */ +#include + +unsigned char uchar0=0; +unsigned char uchar1=0; +unsigned char uchar2=0; + +void inc(unsigned char k) +{ + uchar0 = uchar0 + k; +} + +void f1(void) +{ + + uchar2++; +} + +void nested_call(unsigned char u) +{ + + f1(); + uchar1 = uchar1 + u; + inc(uchar1); + +} + // uchar1 = uchar1 + uchar0; + // uchar2 = uchar1 + k; + +void +testB(void) +{ + + uchar0=1; + inc(uchar0); + ASSERT(uchar0 == 2); + + uchar0 = 2; + uchar1 = 1; + uchar2 = 1; + nested_call(uchar2); + + ASSERT(uchar0 == 4); +} diff --git a/support/regression/tests/scott-bool1.c b/support/regression/tests/scott-bool1.c new file mode 100644 index 0000000..24e0565 --- /dev/null +++ b/support/regression/tests/scott-bool1.c @@ -0,0 +1,113 @@ +/* + */ +#include + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; + +void bool_or1(void) +{ + + ASSERT(!( (achar0 >0) || (achar1 >0 ))); +} + +void bool_or2(void) +{ + + ASSERT(!( achar0 || achar1)); +} + +void bool_test1(void) +{ + + ASSERT(!( (achar0==0) || achar1)); +} + + +void bool_test2(void) +{ + + ASSERT(!( (achar0==0) || aint0)); +} + +void bool_and1(void) +{ + + ASSERT(!( achar0 && achar1)); +} + +void bin_or1(void) +{ + + char t; + + t = achar0 | achar1; + ASSERT(!(t)); +} + +void bin_xor1(void) +{ + + ASSERT(!(achar0 ^ achar1)); +} + + +void bool_test3(void) +{ + + ASSERT(!((achar0 == 0x42) || (achar1 == 42))); +} + + +void bool_or_lit1(void) +{ + + achar0 |= 0x0f; + + ASSERT(!(achar0 > 0x10)); + + ASSERT(!( (achar0 | 0x10) > 0xf0)); + +} + +void bool_and_lit1(void) +{ + + achar0 &= 0xf0; + + ASSERT(!(achar0 > 0x10)); + + ASSERT(!( (achar0 & 0x10) > 0xf0)); + + achar0 &= 0xef; + +} + +void +testBool1(void) +{ + + bool_or1(); + bool_or2(); + bool_and1(); + bin_or1(); + bin_xor1(); + + achar0++; + bool_and1(); + bool_test1(); + bool_test2(); + bool_test3(); + + + achar0--; achar1++; + bool_and1(); + + achar0=0; + achar1=0; + + bool_or_lit1(); + bool_and_lit1(); +} diff --git a/support/regression/tests/scott-call1.c b/support/regression/tests/scott-call1.c new file mode 100644 index 0000000..7ab9db2 --- /dev/null +++ b/support/regression/tests/scott-call1.c @@ -0,0 +1,67 @@ +/* + */ +#include + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; + +unsigned char call3 (void); + +void +call1 (unsigned char uc0) +{ + ASSERT (!(uc0)); +} + +void +call2 (unsigned int ui0) +{ + ASSERT (!(ui0)); + +} + +unsigned char +call3 (void) +{ + ASSERT (!(achar0)); + + return 0; +} + +unsigned int +call4 (void) +{ + unsigned int i = 0; + + if (aint0) + i++; + + return (i); + +} + +unsigned int +call5 (unsigned int k) +{ + + ASSERT (!(k)); + + return (k); + +} + +void +testCall1 (void) +{ + + call1 (achar0); + call2 (aint0); + achar1 = call3 (); + aint1 = call4 (); + ASSERT (!(aint1)); + + aint1 = call5 (aint0); + ASSERT (!(aint1)); +} diff --git a/support/regression/tests/scott-compare.c b/support/regression/tests/scott-compare.c new file mode 100644 index 0000000..b3c5920 --- /dev/null +++ b/support/regression/tests/scott-compare.c @@ -0,0 +1,144 @@ +/* + compare.c test compare + + */ +#include + +unsigned char achar0 = 0; +unsigned char achar1 = 0; +unsigned int aint0 = 0; +unsigned int aint1 = 0; + +char schar0 = 0; +char schar1 = 0; + +/* achar0 should be zero */ + +void +compare_char_to_lits1 (void) +{ + + ASSERT (!(achar0)); + + ASSERT (!(achar0 == 1)); + + ASSERT (!(achar0 == 7)); + + ASSERT (!(achar0 != 0)); +} + +/* achar0 should be `5' */ +void +compare_char_to_lits2 (void) +{ + + ASSERT (!(!achar0)); + + ASSERT (!(achar0 == 1)); + + ASSERT (!(achar0 == 7)); + + ASSERT (!(achar0 != 5)); +} + + +/* achar0 should equal achar1 */ +void +compare_char_to_char1 (void) +{ + + ASSERT (!(achar0 != achar1)); + + ASSERT (!(schar0 != schar1)); +} + +/* achar0 should be different than achar1 */ +void +compare_char_to_char2 (void) +{ + + ASSERT (!(achar0 == achar1)); + +} + +/* aint0 should be zero */ + +void +compare_int_to_lits1 (void) +{ + + ASSERT (!(aint0)); + + ASSERT (!(aint0 == 1)); + + ASSERT (!(aint0 == 7)); + + ASSERT (!(aint0 != 0)); +} + +/* aint0 should be `5' */ +void +compare_int_to_lits2 (void) +{ + + ASSERT (!(!aint0)); + + ASSERT (!(aint0 == 1)); + + ASSERT (!(aint0 == 7)); + + ASSERT (!(aint0 != 5)); +} + +/* aint0 should be `0x1234' */ +void +compare_int_to_lits3 (void) +{ + + ASSERT (!(!aint0)); + + ASSERT (!(aint0 == 1)); + + ASSERT (!(aint0 == 7)); + + ASSERT (!(aint0 != 0x1234)); +} + +/* aint0 should equal aint1 */ +void +compare_int_to_int1 (void) +{ + + ASSERT (!(aint0 != aint1)); + +} + +/* aint0 should be different than aint1 */ +void +compare_int_to_int2 (void) +{ + + ASSERT (!(aint0 == aint1)); + +} + +void +testCompare (void) +{ + + compare_char_to_lits1 (); + compare_char_to_char1 (); + achar0 = 5; + compare_char_to_lits2 (); + compare_char_to_char2 (); + + + compare_int_to_lits1 (); + aint0 = 5; + compare_int_to_lits2 (); + aint0 = 0x1234; + compare_int_to_lits3 (); + compare_int_to_int2 (); + aint0 = 0; + compare_int_to_int1 (); +} diff --git a/support/regression/tests/scott-compare2.c b/support/regression/tests/scott-compare2.c new file mode 100644 index 0000000..2774775 --- /dev/null +++ b/support/regression/tests/scott-compare2.c @@ -0,0 +1,148 @@ +/* + */ +#include + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; + +void +char_lt_char (void) +{ + ASSERT (!(achar0 < achar1)); +} + +void +char_gt_char (void) +{ + ASSERT (!(achar1 > achar0)); +} + +void +char_lte_char (void) +{ + ASSERT (!(achar0 <= achar1)); +} + +void +char_gte_char (void) +{ + ASSERT (!(achar1 >= achar0)); +} + +void +char_lt_lit (void) +{ + ASSERT (!(achar1 < 0x10)); +} + +void +char_gt_lit (void) +{ + ASSERT (!(achar1 > 0x10)); +} + +void +char_lte_lit (void) +{ + ASSERT (!(achar1 <= 0x0f)); +} + +void +char_gte_lit (void) +{ + ASSERT (!(achar1 >= 0x11)); +} + + +/* ints */ + +void +int_lt_int (void) +{ + ASSERT (!(aint0 < aint1)); +} + +void +int_gt_int (void) +{ + ASSERT (!(aint1 > aint0)); +} + +void +int_lte_int (void) +{ + ASSERT (!(aint0 <= aint1)); +} + +void +int_gte_int (void) +{ + ASSERT (!(aint1 >= aint0)); +} + +void +int_lt_lit (void) +{ + ASSERT (!(aint1 < 0x10)); +} + +void +int_gt_lit (void) +{ + ASSERT (!(aint1 > 0x10)); +} + +void +int_lte_lit (void) +{ + ASSERT (!(aint1 <= 0x0f)); +} + +void +int_gte_lit (void) +{ + ASSERT (!(aint1 >= 0x11)); +} + + + + + + + +void +testCompare2 (void) +{ + + char_lt_char (); + char_gt_char (); + + achar0++; + char_lt_char (); + char_gt_char (); + char_gte_char (); + char_lte_char (); + + achar1 = 0x10; + char_lt_lit (); + char_gt_lit (); + char_lte_lit (); + char_gte_lit (); + + + + int_lt_int (); + int_gt_int (); + + aint0++; + int_lt_int (); + int_gt_int (); + int_gte_int (); + int_lte_int (); + + aint1 = 0x10; + int_lt_lit (); + int_gt_lit (); +} diff --git a/support/regression/tests/scott-compare3.c b/support/regression/tests/scott-compare3.c new file mode 100644 index 0000000..9bdd8ba --- /dev/null +++ b/support/regression/tests/scott-compare3.c @@ -0,0 +1,172 @@ +/** + compare3.c + regression testing program for comparing literals to variables +*/ +#include + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; + +// compare to 0 +// assumes +// achar0 == 0 +// achar1 != 0 +// aint0 == 0 +// aint1 != 0 + +void c_0(void) +{ + + ASSERT(!(achar0 != 0)); + + ASSERT(!(achar0)); + + ASSERT(!(achar1 == 0)); + + ASSERT(!(!achar1)); + + ASSERT(!(aint0 != 0)); + + ASSERT(!(aint0)); + + ASSERT(!(aint1 == 0)); + + ASSERT(!(!aint1)); + +} + +// compare to 1 +// assumes +// achar0 != 1 +// achar1 == 1 +// aint0 != 1 +// aint1 == 1 + +void c_1(void) +{ + + ASSERT(!(achar0 == 1)); + + ASSERT(!(achar1 != 1)); + + ASSERT(!(aint0 == 1)); + + ASSERT(!(aint1 != 1)); + +} + +// compare to 2 +// assumes +// achar0 == 2 +// aint0 == 2 + +void c_2(void) +{ + + ASSERT(!(achar0 != 2)); + + ASSERT(!(aint0 != 2)); + +} + +// compare to 0xff +// assumes +// achar0 == 0xff +// aint0 == 0xff + +void c_ff(void) +{ + + ASSERT(!(achar0 != 0xff)); + + ASSERT(!(aint0 != 0xff)); + + ASSERT(!(aint0 == 0xfe)); + + ASSERT(!(aint0 == 0xff00U)); + +} + + +// compare to 0x00a5 +// assumes +// achar0 == 0xa5 +// aint0 == 0x00a5 + +void c_a5(void) +{ + + ASSERT(!(achar0 != 0xa5)); + + ASSERT(!(aint0 != 0xa5)); + + ASSERT(!(aint0 == 0xa4)); + + ASSERT(!(aint0 == 0xa500U)); + +} + +// compare to 0xa500 +// assumes +// achar0 == 0xa5 +// aint0 == 0xa500 + +void c_a500(void) +{ + + ASSERT(!(achar0 == (unsigned char)0xa500U)); + + ASSERT(!(aint0 != 0xa500U)); + + ASSERT(!(aint0 == 0xa400U)); + + ASSERT(!(aint0 == 0x00a5)); + +} + +// compare to 0xabcd +// assumes +// achar0 == 0xa5 +// aint0 == 0xabcd + +void c_abcd(void) +{ + + ASSERT(!(achar0 == (unsigned char)0xabcdU)); + + ASSERT(!(aint0 != 0xabcdU)); + + ASSERT(!(aint0 == 0xab00U)); + + ASSERT(!(aint0 == 0x00cd)); + + ASSERT(aint0 == (unsigned short int)0x1234abcdU); + +} + +void +testCompare3 (void) +{ + + aint1 = 1; + achar1 = 1; + c_0(); + c_1(); + + aint0 = 2; + achar0 = 2; + c_2(); + + aint0 = 0xff; + achar0 = 0xff; + c_ff(); + + aint0 = 0xa5; + achar0 = 0xa5; + c_a5(); + + aint0 = 0xabcd; + c_abcd(); +} diff --git a/support/regression/tests/scott-for.c b/support/regression/tests/scott-for.c new file mode 100644 index 0000000..91eff60 --- /dev/null +++ b/support/regression/tests/scott-for.c @@ -0,0 +1,39 @@ +/* + */ +#include + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; + +unsigned char call3(void); + +void for1(void) +{ + unsigned char i=0; + + for(i=0; i<10; i++) + achar0++; + + ASSERT(!(achar0 != 10)); + +} + +void for2(void) +{ + unsigned char i=0; + + for(i=0; i<10; i++) + achar0++; + + ASSERT(!(i < 10)); + +} + +void +testFor(void) +{ + for1(); + for2(); +} diff --git a/support/regression/tests/scott-pointer1.c b/support/regression/tests/scott-pointer1.c new file mode 100644 index 0000000..dc7d61e --- /dev/null +++ b/support/regression/tests/scott-pointer1.c @@ -0,0 +1,54 @@ +/* + Pointer tests +*/ +#include + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; +unsigned char *acharP = 0; + +void +f1 (unsigned char *ucP) +{ + + if (ucP == 0) + { + ASSERT(0); + return; + } + + ASSERT (!(*ucP)); +} + +void +f2 (unsigned int *uiP) +{ + + if (uiP == 0) + { + ASSERT(0); + return; + } + + ASSERT (!(*uiP)); + +} + +unsigned char * +f3 (void) +{ + + return &achar0; +} + +void +testPointer1 (void) +{ + f1 (&achar0); + f2 (&aint0); + + acharP = f3 (); + ASSERT (!((acharP == 0) || (*acharP))); +} diff --git a/support/regression/tests/scott-struct1.c b/support/regression/tests/scott-struct1.c new file mode 100644 index 0000000..5f49c70 --- /dev/null +++ b/support/regression/tests/scott-struct1.c @@ -0,0 +1,78 @@ +/* + Addition tests +*/ +#include + +/* bit types are not ANSI - so provide a way of disabling bit types + * if this file is used to test other compilers besides SDCC */ +#define SUPPORT_BIT_TYPES 0 + +/* Some compilers that support bit types do not support bit arithmetic + * (like bitx = bity + bitz;) */ +#define SUPPORT_BIT_ARITHMETIC 0 + +#if SUPPORT_BIT_TYPES + +bit bit0 = 0; +bit bit1 = 0; +bit bit2 = 0; +bit bit3 = 0; +bit bit4 = 0; +bit bit5 = 0; +bit bit6 = 0; +bit bit7 = 0; +bit bit8 = 0; +bit bit9 = 0; +bit bit10 = 0; +bit bit11 = 0; + +#endif + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; +unsigned char *acharP = 0; + +struct chars + { + unsigned char c0, c1; + unsigned int i0, i1; + }; + + +struct chars struct1; + +void +struct_test (void) +{ + + ASSERT (!(struct1.c0 || struct1.c1)); + + struct1.c0++; + + ASSERT (!(struct1.c0 != 1)); +} + +void add_chars(void) +{ + + achar0 = struct1.c0 + struct1.c1; + + ASSERT(!(achar0 != 1)); +} + +void +testStruct1 (void) +{ + + + struct1.c0 = 0; + struct1.c1 = 0; + struct_test (); + // ptr_to_struct (&struct1); + + struct1.c0 = 0; + struct1.c1 = 1; + add_chars(); +} diff --git a/support/regression/tests/scott-sub.c b/support/regression/tests/scott-sub.c new file mode 100644 index 0000000..c48d570 --- /dev/null +++ b/support/regression/tests/scott-sub.c @@ -0,0 +1,179 @@ +/* + Addition tests +*/ +#include + +/* bit types are not ANSI - so provide a way of disabling bit types + * if this file is used to test other compilers besides SDCC */ +#define SUPPORT_BIT_TYPES 0 + +/* Some compilers that support bit types do not support bit arithmetic + * (like bitx = bity + bitz;) */ +#define SUPPORT_BIT_ARITHMETIC 0 + +#if SUPPORT_BIT_TYPES + +bit bit0 = 0; +bit bit1 = 0; +bit bit2 = 0; +bit bit3 = 0; +bit bit4 = 0; +bit bit5 = 0; +bit bit6 = 0; +bit bit7 = 0; +bit bit8 = 0; +bit bit9 = 0; +bit bit10 = 0; +bit bit11 = 0; + +#endif + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; +unsigned char achar2 = 0; +unsigned char achar3 = 0; +unsigned char *acharP = 0; + +void sub_lit_from_uchar(void) +{ + + achar0 = achar0 - 5; + + ASSERT(!(achar0 != 0xfb)); + + achar0 -= 10; + + ASSERT(!(achar0 != 0xf1)); + + achar0 = achar0 -1; // Should be a decrement + ASSERT(!(achar0 != 0xf0)); + + for(achar1 = 0; achar1 < 100; achar1++) + achar0 -= 2; + + ASSERT(!(achar0 != 40)); + +} + +// achar0 = 1 +// achar1 = 100 + +void sub_uchar2uchar(void) +{ + + achar1 = achar1 - achar0; + + ASSERT(!(achar1 != 99)); + + for(achar2 = 0; achar2<7; achar2++) + achar1 -= achar0; + + ASSERT(!(achar1 != 92)); + +} + +// assumes +// achar0 = 10 +// achar1 = 32 +// achar2, achar3 can be anything. + +void sub_uchar2uchar2(void) +{ + + + achar0--; + achar0 = achar0 - 1; + achar0 = achar0 - 2; + achar0 = achar0 - 3; + ASSERT(!(achar0 != 3)); + + + achar1 -= achar0; + ASSERT(!(achar1 != 29)); + + achar2 = achar1 - achar0; + ASSERT(!(achar2 != 26)); + + + achar3 = achar2 - achar1 - achar0; + ASSERT(!(achar3 != 0xfa)); + +} + +// sub_bits +// all bit variables are 0 upon entry. + +#if SUPPORT_BIT_TYPES +void sub_bits(void) +{ + + bit1 = bit0; + + bit0 = 1; + + ASSERT(!(bit1 != 0)); + + bit1 = bit0-bit1; // 1 - 0 => 1 + ASSERT(!(bit1 != 1)); + +#if SUPPORT_BIT_ARITHMETIC + bit2 = bit1-bit0; // 1 - 1 => 0 + ASSERT(!(bit2)); + + bit7 = bit4-bit5; + bit6 = bit4+bit5; + bit3 = bit4-bit5-bit6-bit7-bit0; // 0-0-0-0-1 => 1 + ASSERT(!(!bit3)); +#endif +} + +/* sub_bit2uchar(void) - assumes bit0 = 1, achar0 = 7 */ + +void sub_bit2uchar(void) +{ + + achar0 -= bit0; + + ASSERT(!(achar0 != 6)); + + ASSERT(!(achar0 == bit0)); + +} + +void sub_bit2uint(void) +{ + + ASSERT(!(aint0 != bit11)); + + aint0 -= bit0; + ASSERT(!(aint0!=0xffff)); + +} +#endif + +void +testSub(void) +{ + + sub_lit_from_uchar(); + + achar0=1; + achar1=100; + sub_uchar2uchar(); + + + achar0 = 10; + achar1 = 32; + sub_uchar2uchar2(); + +#if SUPPORT_BIT_TYPES + sub_bits(); + + achar0 = 7; + bit0 = 1; + sub_bit2uchar(); + sub_bit2uint(); +#endif +} diff --git a/support/regression/tests/scott-while.c b/support/regression/tests/scott-while.c new file mode 100644 index 0000000..6f5e136 --- /dev/null +++ b/support/regression/tests/scott-while.c @@ -0,0 +1,30 @@ +/* + */ +#include + +unsigned int aint0 = 0; +unsigned int aint1 = 0; +unsigned char achar0 = 0; +unsigned char achar1 = 0; + +void +while1 (void) +{ + unsigned char i = 10; + + do + { + achar0++; + } + while (--i); + + ASSERT (!(achar0 != 10)); + +} + + +void +testWhile (void) +{ + while1 (); +} diff --git a/support/regression/tests/setjmp.c b/support/regression/tests/setjmp.c new file mode 100644 index 0000000..89176f1 --- /dev/null +++ b/support/regression/tests/setjmp.c @@ -0,0 +1,54 @@ +/** setjmp/longjmp tests. +*/ +#include +#include + +unsigned int global_int = 0; +unsigned int *gpInt; + +#if defined(SDCC_mcs51) +#include <8052.h> + +void T2_isr (void) interrupt 5 //no using +{ + //do not clear flag TF2 so it keeps interrupting ! + (*gpInt)++; +} +#endif + +#if defined(SDCC_mcs51) || defined(PORT_HOST) + +void try_fun(jmp_buf catch, int except) +{ + longjmp(catch, except); +} + +#endif + +void +testJmp(void) +{ +#if defined(SDCC_mcs51) || defined(PORT_HOST) + + jmp_buf catch; + int exception; + +#if defined(SDCC_mcs51) + gpInt = &global_int; + //enable the interrupt and set it's flag to generate some heavy stack usage + ET2 = 1; + EA = 1; + TF2 = 1; +#endif + + exception = setjmp(catch); + if (exception == 0) + { + try_fun(catch, 1); + //should not get here! + ASSERT(0); + } + ASSERT(exception == 1); + +#endif +} diff --git a/support/regression/tests/sfr16.c b/support/regression/tests/sfr16.c new file mode 100644 index 0000000..0c345b1 --- /dev/null +++ b/support/regression/tests/sfr16.c @@ -0,0 +1,42 @@ +/* + sfr16.c +*/ + +#include + +#if defined (SDCC_mcs51) + sfr at 0x8A SFR_LSB; //timer 0 low byte + sfr at 0x8C SFR_MSB; //timer 0 high byte + sfr16 at 0x8C8A SFR_16; //timer 0 + sfr32 at 0x8C8ACDCC SFR_32; //timer 0 & 2 +#elif defined (SDCC_ds390) + sfr at 0x8B SFR_LSB; //timer 1 low byte + sfr at 0x8D SFR_MSB; //timer 1 high byte + sfr16 at 0x8D8B SFR_16; //timer 1 + sfr32 at 0x8D8BCDCC SFR_32; //timer 1 & 2 +#endif + +void +test_sfr(void) +{ +#if defined (SFR_16) + SFR_16 = 0x00FE; + ASSERT (SFR_MSB == 0x00); + ASSERT (SFR_LSB == 0xFE); + + SFR_16++; + ASSERT (SFR_MSB == 0x00); + ASSERT (SFR_LSB == 0xFF); + + SFR_16++; + ASSERT (SFR_MSB == 0x01); + ASSERT (SFR_LSB == 0x00); + + SFR_LSB++; + ASSERT (SFR_16 == 0x0101); + + SFR_32 = 0x12345678; + SFR_32 -= 0x02040608; + ASSERT (SFR_32 == 0x10305070); +#endif +} diff --git a/support/regression/tests/shifts.c b/support/regression/tests/shifts.c new file mode 100644 index 0000000..a975cdf --- /dev/null +++ b/support/regression/tests/shifts.c @@ -0,0 +1,109 @@ +/** Tests covering the shift operators. + + sign: signed, unsigned + type: char, int, long + storage: static, + attr: volatile + + vals: 3 + + pending - 1792, 851968, 1560281088, -3, -1792, -851968, -1560000000 +*/ +#include + +void +test1ShiftClasses(void) +{ + {attr} {storage} {sign} {type} i, result; + + i = 30; + ASSERT(i>>3 == 3); + ASSERT(i<<2 == 120); + + result = i; + result >>= 2; + ASSERT(result == 7); + + result = i; + result <<= 2; + ASSERT(result == 120); +} + +void +test2ShiftRight(void) +{ + {attr} {storage} {type} i, result; + + i = -120; + ASSERT(i>>1 == -60); + ASSERT(i>>2 == -30); + ASSERT(i>>3 == -15); + ASSERT(i>>4 == -8); + ASSERT(i>>5 == -4); + ASSERT(i>>6 == -2); + ASSERT(i>>7 == -1); + ASSERT(i>>8 == -1); + result = i; + result >>= 3; + ASSERT(result == -15); +} + +void +test3ShiftByteMultiples(void) +{ + {attr} {storage} {type} i; + + i = ({type}){vals}; + ASSERT(i>>8 == ({type})({vals} >> 8)); + ASSERT(i>>16 == ({type})({vals} >> 16)); + ASSERT(i>>24 == ({type})({vals} >> 24)); + + i = ({type}){vals}; + ASSERT( ({type})(i<<8) == ({type})({vals} << 8));; + ASSERT((({type}) i<<16) == (({type}) {vals} << 16)); + ASSERT((({type}) i<<24) == (({type}) {vals} << 24)); +} + +void +test4ShiftOne(void) +{ + {attr} {storage} {sign} {type} i; + {sign} {type} result; + + i = ({type}){vals}; + + result = i >> 1; + ASSERT(result == ({type})(({type}){vals} >> 1)); + + result = i; + result >>= 1; + ASSERT(result == ({type})(({type}){vals} >> 1)); + + result = i << 1; + ASSERT(result == ({type})(({type}){vals} << 1)); + + result = i; + result <<= 1; + ASSERT(result == ({type})(({type}){vals} << 1)); +} + +static {type} ShiftLeftByParam ({type} count) +{ + {attr} {storage} {type} i; + i = ({type}){vals}; + return (i << count); +} + +static {type} ShiftRightByParam ({type} count) +{ + {attr} {storage} {type} i; + i = ({type}){vals}; + return (i >> count); +} + +void +testShiftByParam(void) +{ + ASSERT(ShiftLeftByParam(2) == ({type})({vals} << 2)); + ASSERT(ShiftRightByParam(2) == ({type})({vals} >> 2)); +} diff --git a/support/regression/tests/shifts2.c b/support/regression/tests/shifts2.c new file mode 100644 index 0000000..8213de2 --- /dev/null +++ b/support/regression/tests/shifts2.c @@ -0,0 +1,92 @@ +/** extended tests for shift operations, added by + Frieder Ferlemann to check for bugs related to bug 1533966 + + size: 8,16,32 + right: 0,1 + vol: 0,1 + sign: u, +*/ +#include +#ifdef __sun__ +# include +#else +# include +#endif + +#define SIZE ({size}) +#define RIGHT ({right}) +#define VOL ({vol}) + +#if SIZE == 8 +# define TYPE {sign}int8_t +# define TEST_VECT 0xa4 +#endif + +#if SIZE == 16 +# define TYPE {sign}int16_t +# define TEST_VECT 0xa8ce +#endif + +#if SIZE == 32 +# define TYPE {sign}int32_t +# define TEST_VECT 0xa8b5c4d6 +#endif + +#if RIGHT == 0 +# define SHIFT(x,y) (TYPE)((TYPE)(x)<<(y)) +#else +# define SHIFT(x,y) (TYPE)((TYPE)(x)>>(y)) +#endif + +#if VOL == 0 + volatile TYPE s = TEST_VECT; + TYPE t; + #define TESTSHIFT(x) t=s; t = SHIFT (t,(x)); ASSERT( t == SHIFT (TEST_VECT, (x))); +#else + volatile TYPE t = TEST_VECT; + #define TESTSHIFT(x) t=TEST_VECT; t = SHIFT (t,(x)); ASSERT( t == SHIFT (TEST_VECT, (x))); +#endif + +static void +testShift(void) +{ + TESTSHIFT(0); + TESTSHIFT(1); + TESTSHIFT(2); + TESTSHIFT(3); + TESTSHIFT(4); + TESTSHIFT(5); + TESTSHIFT(6); + TESTSHIFT(7); + +#if SIZE >= 16 + TESTSHIFT(8); + TESTSHIFT(9); + TESTSHIFT(10); + TESTSHIFT(11); + TESTSHIFT(12); + TESTSHIFT(13); + TESTSHIFT(14); + TESTSHIFT(15); +#endif + +#if SIZE >= 32 + TESTSHIFT(16); + TESTSHIFT(17); + TESTSHIFT(18); + TESTSHIFT(19); + TESTSHIFT(20); + TESTSHIFT(21); + TESTSHIFT(22); + TESTSHIFT(23); + + TESTSHIFT(24); + TESTSHIFT(25); + TESTSHIFT(26); + TESTSHIFT(27); + TESTSHIFT(28); + TESTSHIFT(29); + TESTSHIFT(30); + TESTSHIFT(31); +#endif +} diff --git a/support/regression/tests/simplefloat.c b/support/regression/tests/simplefloat.c new file mode 100644 index 0000000..49ae510 --- /dev/null +++ b/support/regression/tests/simplefloat.c @@ -0,0 +1,82 @@ +/** Simple set of tests for floating pt. + */ +#include +#include + +#if (PORT_HOST) +# define FCOMP(a,b) (fabsf((a) - (b)) < ((b) * 1e-7)) +#else + /* Testing floats for equality is normally a bug, + but too keep this test simple we dare it. And + it works with the exception of the division on + the host port. */ +# define FCOMP(a,b) ((a) == (b)) +#endif + +void +testCmp(void) +{ + volatile float left, right; + + left = 5; + right = 13; + ASSERT(left + right == 18); + ASSERT(left + right <= 18); + ASSERT(left + right >= 18); + ASSERT(left + right > 17.9); + ASSERT(left + right < 18.1); +} + +void +testDiv(void) +{ +#if defined (__mcs51) && !defined (SDCC_STACK_AUTO) + idata at 0xd0 +#endif + volatile float left; + volatile float right; + + left = 17; + right = 343; + + ASSERT(FCOMP(left/right, (17.0/343.0))); + ASSERT(FCOMP(right/left, (343.0/17.0))); + + right = 17; + ASSERT(FCOMP(left/right, 1.0)); +} + +void +testDivNearOne(void) +{ + volatile float left, right, result; + + left = 12392.4; + right = 12392.4; + result = left / right; + + if (result > 0.999999) + { + /* Fine */ + } + else + { + FAIL(); + } + if (result < 1.00001) + { + /* Fine */ + } + else + { + FAIL(); + } + if (result > 0.999999 && result < 1.00001) + { + /* Fine */ + } + else + { + FAIL(); + } +} diff --git a/support/regression/tests/snprintf.c b/support/regression/tests/snprintf.c new file mode 100644 index 0000000..c65054d --- /dev/null +++ b/support/regression/tests/snprintf.c @@ -0,0 +1,131 @@ +/** tests for snprintf + type: INT, LONG, STRING, FLOAT +*/ +#include +#include +#include + +#define {type} 1 + +#if 0 +# define DEBUG(x) x +#else +# define DEBUG(x) +#endif + +#define CHECK_B 0 + +#if defined(INT) + +struct +{ + int arg; + char *fmt; + char *result; +} static const cases[] = { + // arg, fmt, result + {0xab, "%04x", "00ab"}, + {0xffff, "0x%02X", "0xFFFF"}, + {0xffffu, "%u", "65535"}, + {1234, "%+6d", " +1234"}, + {12345, "% d", " 12345"}, + {-1234, "%d", "-1234"}, + {32767, "%8d", " 32767"}, + {1, "%%%d", "%1"}, + {1001, "%08i", "00001001"}, + {101, "%-+8d", "+101 "}, + {01234, "%o(oct)", "1234(oct)"}, + + // do we want to check these: +#if defined(SDCC) && !defined(SDCC_z80) && CHECK_B + {0x4142, "%bc %bx", "\x41 42"}, /* non-std: print as bytes! */ + {0xfffe, "0x%02bX%02bx", "0xFFfe"}, /* non-std: print as bytes! */ +#elif defined(SDCC) && defined(SDCC_z80) && CHECK_B + {0x4142, "%bc %bx", "\x42 41"}, /* non-std: print as bytes! */ + {0xfffe, "0x%02bX%02bx", "0xFEff"}, /* non-std: print as bytes! */ +#endif +}; + +#elif defined(LONG) + +struct +{ + long arg; + char *fmt; + char *result; +} static const cases[] = { + // arg, fmt, result + {0x12345678, "0x%lx", "0x12345678"}, + {0x7fffFFFF, "%10lx", " 7fffffff"}, + {0x789abcde, "0x%-10lX", "0x789ABCDE "}, + {0x1000a, "0x%02lX", "0x1000A"}, + {0x80000000, "%lu", "2147483648"}, + {-2147483648, "%li", "-2147483648"}, + {-1234, "%+6ld", " -1234"}, + {012345670123, "%lo(oct)", "12345670123(oct)"}, + {0xffffFFFF, "%lo(oct)", "37777777777(oct)"}, + + // do we want to check these: +#if defined(SDCC) && !defined(SDCC_z80) && CHECK_B + {0xfedcba98, "0x%bX%bX%bx%bx", "0xFEDCba98"}, /* non-std: print as bytes! */ +#elif defined(SDCC) && defined(SDCC_z80) && CHECK_B + {0xfedcba98, "0x%bX%bX%bx%bx", "0x98BAdcfe"}, /* non-std: print as bytes! */ +#endif +}; + +#elif defined(STRING) + +struct +{ + char *arg; + char *fmt; + char *result; +} static const cases[] = { + // arg, fmt, result + {"abcd", "%s", "abcd"}, + {"abcd", "%3s", "abcd"}, + {"abcd", "%5s", " abcd"}, + {"abcd", "%-5s", "abcd "}, + {"abcd", "%.2s", "ab"}, + {"XYZ\\", "%s", "XYZ\x5c"}, + {"ab\x1b\x7f", "%s", "ab\x1b\x7f"}, + {"ab\tcd\n", "%s", "ab\tcd\n"}, +}; + +#elif defined(FLOAT) + +struct +{ + float arg; + char *fmt; + char *result; +} static const cases[] = { + // arg, fmt, result + // ... there should be more ... +#if defined(SDCC) && !defined(SDCC_ds390) && !(defined(SDCC_mcs51) && defined(SDCC_USE_XSTACK)) + {1.0, "%f", ""}, +#else + {1.0, "%f", "1.000000"}, + {1.96, "%3.1f", "2.0"}, +#endif +}; + +#endif + +void +test_snprintf (void) +{ + unsigned char buf[32]; + unsigned char i; + + memset (buf, 0xfe, sizeof buf); /* cookies all over */ + + for (i = 0; i < sizeof cases / sizeof cases[0]; i++) + { + sprintf (buf, cases[i].fmt, cases[i].arg); + DEBUG (printf ("Test%d should be: \"%s\" is: \"%s\"\n", i, cases[i].result, buf)); + ASSERT (!strcmp (buf, cases[i].result)); + } + + ASSERT (buf[sizeof buf - 10] == 0xfe); /* check for cookie */ +} diff --git a/support/regression/tests/stacks.c b/support/regression/tests/stacks.c new file mode 100644 index 0000000..036f9d0 --- /dev/null +++ b/support/regression/tests/stacks.c @@ -0,0 +1,37 @@ +/* + size: 126, 127, 128, 129 + */ +#include + +void +spoil(char a) +{ + UNUSED(a); +} + +void +spoilPtr(volatile char *p) +{ + UNUSED(p); +} + +void +testStack(void) +{ + volatile char above; + volatile char above2; +#ifndef __mcs51 + volatile char ac[{size}]; +#else + volatile char ac[{size} - 100]; +#endif + volatile char below; + volatile char * volatile p; + + spoil(ac[0]); + spoilPtr(&above); + spoilPtr(&below); + + p = &above2; + spoilPtr(p); +} diff --git a/support/regression/tests/staticinit.c b/support/regression/tests/staticinit.c new file mode 100644 index 0000000..942d103 --- /dev/null +++ b/support/regression/tests/staticinit.c @@ -0,0 +1,136 @@ +/** Tests that the static initialiser code works. + As the init code is now clever we have to be careful. + + type: char, int, long +*/ + +#include + +/*-------------------------------------------------- + regression test for #1864582: + multiple definition of char cons w. --model-large + compile-time test only */ +char *c = (char *) "Booting"; +/*------------------------------------------------*/ + +static {type} smallDense[] = { + 1, 2, 3, 4, 5, 6 +}; + +static void +testSmallDense(void) +{ + ASSERT(smallDense[0] == 1); + ASSERT(smallDense[1] == 2); + ASSERT(smallDense[2] == 3); + ASSERT(smallDense[3] == 4); + ASSERT(smallDense[4] == 5); + ASSERT(smallDense[5] == 6); +} + +#ifdef SDCC_mcs51 +idata at 0xa0 /* leave space for the stack */ +#endif +static {type} smallSparse[] = { + 1, 1, 1, 1, 1, 1, 1, 1, 1 +}; + +static void +testSmallSparse(void) +{ + ASSERT(smallSparse[0] == 1); + ASSERT(smallSparse[1] == 1); + ASSERT(smallSparse[2] == 1); + ASSERT(smallSparse[3] == 1); + ASSERT(smallSparse[4] == 1); + ASSERT(smallSparse[5] == 1); + ASSERT(smallSparse[6] == 1); + ASSERT(smallSparse[7] == 1); + ASSERT(smallSparse[8] == 1); +} + +#ifdef SDCC_mcs51 +idata at 0xd0 +#endif +static {type} smallSparseZero[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; + +static {type} smallSparseZeroTail[] = { + 1, 2, 3 +}; + +static void +testSmallSparseZero(void) +{ + ASSERT(smallSparseZero[0] == 0); + ASSERT(smallSparseZero[1] == 0); + ASSERT(smallSparseZero[2] == 0); + ASSERT(smallSparseZero[3] == 0); + ASSERT(smallSparseZero[4] == 0); + ASSERT(smallSparseZero[5] == 0); + ASSERT(smallSparseZero[6] == 0); + ASSERT(smallSparseZero[7] == 0); + ASSERT(smallSparseZero[8] == 0); + + // Make the compiler happy + ASSERT(smallSparseZeroTail[0] == 1); +} + +#ifdef SDCC_mcs51 +xdata +#elif SDCC_pic16 +code +#endif +static {type} largeMixed[] = { + 1, 2, 3, 4, 5, 6, 7, /* 0-6 */ + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, /* 8*12 = 96+7 = -102 */ + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, + 3, 4, 5, 6, 3, 4, 5, 6, /* 8*17 = 136+7 */ + 3, 4, 5, 6, 3, 4, 5, 6, + 3, 4, 5, 6, 3, 4, 5, 6, + 3, 4, 5, 6, 3, 4, 5, 6, + 3, 4, 5, 6, 3, 4, 5, 6, + 3, 4, 5, 6, 3, 4, 5, 6, + 3, 4, 5, 6, 3, 4, 5, 6, + 3, 4, 5, 6, 3, 4, 5, 6, + 3, 4, 5, 6, 3, 4, 5, 6, + 3, 4, 5, 6, 3, 4, 5, 6, + 3, 4, 5, 6, 3, 4, 5, 6, + 3, 4, 5, 6, 3, 4, 5, 6, + 3, 4, 5, 6, 3, 4, 5, 6, + 3, 4, 5, 6, 3, 4, 5, 6, + 3, 4, 5, 6, 3, 4, 5, 6, + 3, 4, 5, 6, 3, 4, 5, 6, + 3, 4, 5, 6, 3, 4, 5, 6 +}; + +static void +testLargeMixed(void) +{ + ASSERT(largeMixed[0] == 1); + ASSERT(largeMixed[1] == 2); + ASSERT(largeMixed[7] == 1); + ASSERT(largeMixed[102] == 1); + ASSERT(largeMixed[143] == 3); + ASSERT(largeMixed[143+8] == 3); + ASSERT(largeMixed[143+16] == 3); + ASSERT(largeMixed[143+1] == 4); + ASSERT(largeMixed[143+8+1] == 4); + ASSERT(largeMixed[143+16+1] == 4); +} diff --git a/support/regression/tests/storage.c b/support/regression/tests/storage.c new file mode 100644 index 0000000..7b4c4fa --- /dev/null +++ b/support/regression/tests/storage.c @@ -0,0 +1,43 @@ +/** Tests many of the basic operators from each of the storage types to every other. + + source_storage: static, register, + dest_storage: static, register, + type: char, int, long + */ +#include + +/** Simple function that spoils sdcc's optimiser by hiding an assign. + */ +{type} +spoilAssign({type} in) +{ + return in; +} + +void +testStorageTypes(void) +{ + {source_storage} {type} source; + {dest_storage} {type} dest; + + source = spoilAssign(17); + // Test compare against a const + ASSERT(source == 17); + + dest = spoilAssign(126); + ASSERT(dest == 126); + ASSERT(dest != source); + + // Test assignment + dest = source; + ASSERT(dest == source); + + // Test cmp + dest--; + ASSERT(dest == 16); + ASSERT(dest < source); + + dest += 8; + ASSERT(dest == 24); + ASSERT(source < dest); +} diff --git a/support/regression/tests/structflexarray.c b/support/regression/tests/structflexarray.c new file mode 100644 index 0000000..2cfdd9d --- /dev/null +++ b/support/regression/tests/structflexarray.c @@ -0,0 +1,58 @@ +/* Check basic behaviour of "flexible array members" + */ +#include + +#if !defined __GNUC__ || __GNUC__ >= 3 +/* flexible array members not supported by gcc < 3 */ +struct str1 +{ + char c; + short i[]; +}; + +struct str1 s11 = { 1, {2, 3} }; +struct str1 s12 = { 4, {5, 6, 7} }; /* different size */ +#endif + +static void +testFlexibleArray1(void) +{ +#if !defined __GNUC__ || __GNUC__ >= 3 + /* flexible array members not supported by gcc < 3 */ + /* test sizeof */ + ASSERT(sizeof(s11) == 1); + /* test allocation size */ +#if ! defined(PORT_HOST) + ASSERT((char *) &s12 - (char *) &s11 == 1 + 4); +#endif +#endif +} + + +/* test initialisation with string */ + +#if !defined __GNUC__ || __GNUC__ >= 3 +/* flexible array members not supported by gcc < 3 */ +struct str2 +{ + short s; + char str2[]; +}; + +struct str2 s21 = { 1, "sdcc" }; +struct str2 s22 = { 2, "sdcc is great" }; /* different size */ +#endif + +static void +testFlexibleArray2(void) +{ +#if !defined __GNUC__ || __GNUC__ >= 3 + /* flexible array members not supported by gcc < 3 */ + /* test sizeof */ + ASSERT(sizeof(s21) == 2); + /* test allocation size */ +#if ! defined(PORT_HOST) + ASSERT((char *) &s22 - (char *) &s21 == 2 + 5); +#endif +#endif +} diff --git a/support/regression/tests/structidx.c b/support/regression/tests/structidx.c new file mode 100644 index 0000000..8a7fdcc --- /dev/null +++ b/support/regression/tests/structidx.c @@ -0,0 +1,36 @@ +/* Code to generate code to see how structure indexs are evaluated. + Originally part of gbdk/examples/gb/paint.c + + */ +#include + +typedef unsigned char UBYTE; + +typedef struct cursor_info_ +{ + UBYTE data_idx; + UBYTE w, h; + UBYTE hot_x, hot_y; +} cursor_info; + +const cursor_info cursors[] = +{ + { 0, 1, 1, 0, 0 }, + { 1, 2, 2, 0, 15 }, + { 5, 2, 2, 0, 15 }, + { 9, 2, 2, 2, 15 }, + { 13, 2, 2, 0, 15 }, + { 17, 2, 2, 5, 10 } +}; + +UBYTE current_cursor; + +UBYTE +getWidth(void) +{ + return cursors[current_cursor].w; +} + +void testBug(void) +{ +} diff --git a/support/regression/tests/swap.c b/support/regression/tests/swap.c new file mode 100644 index 0000000..4dbe4ec --- /dev/null +++ b/support/regression/tests/swap.c @@ -0,0 +1,132 @@ +/** various ways to swap nibbles/bytes/words +*/ +#include + +#define TEST_VECT_8 0x12 +#define TEST_VECT_16 0x1234 +#define TEST_VECT_32 0x12345678 + +#define SWAP_4(x) ((unsigned char)((x)<<4)|(unsigned char)((x)>>4)) + +typedef union {unsigned int i; unsigned char c[2];} WORD; +typedef union {unsigned long l; unsigned char c[4];} LONG; + +static void testSwap_4(void) +{ + volatile unsigned char t=TEST_VECT_8; + unsigned char tt; + + tt = t; + tt = SWAP_4(tt); + ASSERT( tt == SWAP_4(TEST_VECT_8)); +} + + +#define SWAP_8(x) ((((x)<<8)|((x)>>8)) & 0xffff) + +static void testSwap_8(void) +{ + volatile unsigned int t=TEST_VECT_16; + unsigned int tt; + WORD x; + + tt = t; + tt = SWAP_8(tt); + ASSERT( tt == SWAP_8(TEST_VECT_16)); + + x.i = t; + x.i = SWAP_8(x.i); + ASSERT( x.i == SWAP_8(TEST_VECT_16)); + +#if defined (SDCC_mcs51) + /* this was filed as bug #1638622 (rejected) */ + x.i = t; + x.i = x.c[1] + 256*x.c[0]; + ASSERT( x.i == SWAP_8(TEST_VECT_16)); + + /* and with OR instead of ADD */ + x.i = t; + x.i = x.c[1] | 256*x.c[0]; + ASSERT( x.i == SWAP_8(TEST_VECT_16)); + + /* swapping union with little register pressure */ + { + unsigned char tmp; + x.i = t; + + tmp = x.c[0]; + x.c[0]=x.c[1]; + x.c[1]=tmp; + + ASSERT( x.i == SWAP_8(TEST_VECT_16)); + } +#endif +} + + +#define SWAP_16(x) ((((x)<<16) | ((x)>>16)) & 0xffffFFFF) + +static void testSwap_16(void) +{ + volatile unsigned long t=TEST_VECT_32; + unsigned long tt; + LONG x; + + tt = t; + tt = SWAP_16(tt); + ASSERT( tt == SWAP_16(TEST_VECT_32)); + + /* swapping union with little register pressure */ + { + unsigned char c; + x.l = t; + + c = x.c[0]; + x.c[0]=x.c[2]; + x.c[2]=c; + c = x.c[1]; + x.c[1]=x.c[3]; + x.c[3]=c; + + ASSERT( x.l == SWAP_16(TEST_VECT_32)); + } +} + +/* now for something ugly */ +static void testSwap_16_ptr(void) +{ +#if defined (SDCC) +#include /* just to get _AUTOMEM or _STATMEM */ +#if defined (SDCC_STACK_AUTO) +#define MY_STATIC static +#else +#define MY_STATIC +#endif + MY_STATIC unsigned long _STATMEM tt=TEST_VECT_32; + + /* swapping with little register pressure */ + { + unsigned char c; + + /* uglyness += 1 */ + c = *(0+(unsigned char _STATMEM *)&tt); + *(0+(unsigned char _STATMEM *)&tt) = *(2+(unsigned char _STATMEM *)&tt); + *(2+(unsigned char _STATMEM *)&tt) = c; + c = *(1+(unsigned char _STATMEM *)&tt); + *(1+(unsigned char _STATMEM *)&tt) = *(3+(unsigned char _STATMEM *)&tt); + *(3+(unsigned char _STATMEM *)&tt) = c; + /* uglyness -= 1 */ + } + ASSERT( tt == SWAP_16(TEST_VECT_32)); +#endif +} + + +static void +testSwap(void) +{ + testSwap_4(); + testSwap_8(); + testSwap_16(); + testSwap_16_ptr(); +} diff --git a/support/regression/tests/switch.c b/support/regression/tests/switch.c new file mode 100644 index 0000000..bb29967 --- /dev/null +++ b/support/regression/tests/switch.c @@ -0,0 +1,146 @@ +/* Test the types of switch statement. + + type: char, int, long + sign: signed, unsigned + storage: static, + attr: volatile + */ +#include + +{sign} {type} +sparseSwitch({sign} {type} val) +{ + {sign} {type} ret; + {storage} {attr} {sign} {type} local; + + local = val; + + switch (local) { + case 1: + ret = 7; + break; + case 4: + ret = 12; + break; + case 6: + ret = 13; + /* Fall through */ + case 12: + ret = 14; + break; + case 13: + case 14: + case 15: + ret = 19; + break; + default: + ret = 30; + } + + return ret; +} + +void +testSparseSwitch(void) +{ + ASSERT(sparseSwitch(1) == 7); + ASSERT(sparseSwitch(4) == 12); + ASSERT(sparseSwitch(6) == 14); + ASSERT(sparseSwitch(12) == 14); + ASSERT(sparseSwitch(13) == 19); + ASSERT(sparseSwitch(14) == 19); + ASSERT(sparseSwitch(15) == 19); + ASSERT(sparseSwitch(19) == 30); + ASSERT(sparseSwitch(0) == 30); +} + +{sign} {type} +denseSwitch({sign} {type} val) +{ + {sign} {type} ret; + {storage} {attr} {sign} {type} local; + + local = val; + ret = 12; + + switch (local) { + case 0: + ret = 1; + break; + case 1: + ret = 14; + break; + case 2: + ret = 15; + break; + case 3: + ret = 34; + break; + case 4: + ret = 17; + break; + /* No default */ + } + + return ret; +} + +void +testDenseSwitch(void) +{ + ASSERT(denseSwitch(0) == 1); + ASSERT(denseSwitch(1) == 14); + ASSERT(denseSwitch(2) == 15); + ASSERT(denseSwitch(3) == 34); + ASSERT(denseSwitch(4) == 17); + ASSERT(denseSwitch(5) == 12); + ASSERT(denseSwitch(100) == 12); +} + +void +testDenseIntSwitch(void) +{ + volatile int val = 1000; + volatile int ret = 0; + + switch (val) { + case 999: + ret = 5; + break; + case 1000: + ret = 6; + break; + case 1001: + ret = 7; + break; + case 1002: + ret = 12; + break; + case 1003: + ret = 14; + break; + } + + ASSERT(ret == 6); + + val = 129; + + switch (val) { + case 126: + ret = 5; + break; + case 127: + ret = 6; + break; + case 128: + ret = 7; + break; + case 129: + ret = 8; + break; + default: + ret = 9; + } + + ASSERT(ret == 8); +} diff --git a/support/regression/tests/uminus.c b/support/regression/tests/uminus.c new file mode 100644 index 0000000..0009840 --- /dev/null +++ b/support/regression/tests/uminus.c @@ -0,0 +1,25 @@ +/* Test unary minus + + lefttype: char, short, long + resulttype: char, short, long + storage: static, + attr: volatile, + */ +#include + +void +testUMinus(void) +{ + {storage} {attr} {lefttype} left; + {storage} {attr} {resulttype} result; + + left = 53; + result = -left; + + ASSERT(result == -53); + + left = -76; + result = -left; + + ASSERT(result == 76); +} diff --git a/support/regression/tests/using.c b/support/regression/tests/using.c new file mode 100644 index 0000000..ad5fc7d --- /dev/null +++ b/support/regression/tests/using.c @@ -0,0 +1,33 @@ +/** Test register bank allocation for the "using" keyword. + using: no_proto, impl, both +*/ +#include + +#define _{using} + +#if defined (SDCC_mcs51) && defined (SDCC_MODEL_SMALL) + + #ifndef _no_proto + #if defined (_both) + void my_isr (void) interrupt (1) using (1); + #else + void my_isr (void) interrupt (1); + #endif + #endif + + data char array[8]; + + void my_isr (void) interrupt (1) using (1) + { + array[array[0]] = 1; //generate some register pressure + } + +#endif + +void testUsing (void) +{ +#if defined (SDCC_mcs51) && defined (SDCC_MODEL_SMALL) + ASSERT ((unsigned char)(&array[0]) >= 0x10); + ASSERT ((unsigned char)&__numTests >= 0x10); +#endif +} diff --git a/support/regression/tests/vaargs.c b/support/regression/tests/vaargs.c new file mode 100644 index 0000000..741cac3 --- /dev/null +++ b/support/regression/tests/vaargs.c @@ -0,0 +1,80 @@ +/** Tests argument passing to functions via va_args. + Assumes that up to the first two arguments can be passed in registers. + + type1: va_char, int + type2: va_char, int + type3: va_char, int + */ +#include +#include + +/* gcc 3.3 throws a warning, if char is in '...' */ +#if defined(PORT_HOST) +# define va_char int +#else +# define va_char char +#endif + +static {type1} +returnFirstArg(int marker, ...) +{ + va_list ap; + {type1} i; + + va_start(ap, marker); + i = va_arg(ap, {type1}); + + va_end(ap); + + LOG(("Returning %u\n", i)); + return i; +} + +static {type2} +returnSecondArg(int marker, ...) +{ + va_list ap; + {type2} i; + + va_start(ap, marker); + UNUSED(va_arg(ap, {type1})); + i = va_arg(ap, {type2}); + + va_end(ap); + + LOG(("Returning %u\n", i)); + return i; +} + +static {type3} +returnThirdArg(int marker, ...) +{ + va_list ap; + {type3} i; + + va_start(ap, marker); + UNUSED(va_arg(ap, {type1})); + UNUSED(va_arg(ap, {type2})); + i = va_arg(ap, {type3}); + + va_end(ap); + + LOG(("Returning %u\n", i)); + return i; +} + +void +testArgs(void) +{ + int marker = 12; + + LOG(("First arg: %u\n", returnFirstArg(marker, ({type1})123, ({type2})45, ({type3})67))); + ASSERT(returnFirstArg(marker, ({type1})123, ({type2})45, ({type3})67) == 123); + ASSERT(returnFirstArg(marker, ({type1})-123, ({type2})45, ({type3})67) == -123); + + ASSERT(returnSecondArg(marker, ({type1})1, ({type2})-23, ({type3})64) == -23); + ASSERT(returnSecondArg(marker, ({type1})1, ({type2})8, ({type3})64) == 8); + + ASSERT(returnThirdArg(marker, ({type1})-33, ({type2})-34, ({type3})-35) == -35); + ASSERT(returnThirdArg(marker, ({type1})-33, ({type2})-34, ({type3})35) == 35); +} diff --git a/support/regression/tests/while.c b/support/regression/tests/while.c new file mode 100644 index 0000000..217ea36 --- /dev/null +++ b/support/regression/tests/while.c @@ -0,0 +1,30 @@ +/* + while.c +*/ + +#include + +char c1 = 0, c2 = 1; + +void +testEmptyWhile(void) +{ + /* loops forever if bug ist present */ + do {} while (c1 && c2); + + /* other cases: */ + do {} while ( c1 && c1); + do {} while ( c1 && !c2); + do {} while (!c1 && !c2); + do {} while ( c2 && c1); + do {} while (!c2 && c1); + do {} while (!c2 && !c1); + do {} while (!c2 && !c2); + + do {} while ( c1 || c1); + do {} while ( c1 || !c2); + do {} while (!c2 || c1); + do {} while (!c2 || !c2); + + ASSERT(1); +} diff --git a/support/regression/tests/zeropad.c b/support/regression/tests/zeropad.c new file mode 100644 index 0000000..24576a8 --- /dev/null +++ b/support/regression/tests/zeropad.c @@ -0,0 +1,137 @@ +/** Zeropad tests. + + storage: auto, idata, pdata, xdata, code, +*/ +#ifndef STORAGE +#define STORAGE_{storage} +#define STORAGE {storage} +#endif + +#if defined (__GNUC__) && defined (__alpha__) && (__GNUC__ < 3) + /* since g fails on GCC 2.95.4 on alpha... */ + #define FLEXARRAY 0 + #define TEST_G 0 +#elif defined (STORAGE_auto) + /* only static flexible arrays are allowed */ + #define FLEXARRAY 0 + #define TEST_G 1 +#else + #define FLEXARRAY 1 + #define TEST_G 1 +#endif + +#include + +typedef unsigned int size_t; +#define offsetof(s,m) (size_t)&(((s *)0)->m) + +#if defined (STORAGE_auto) + void Zeropad(void) + { +#endif //STORAGE_auto + +const char *string1 = "\x00\x01"; +const char string2[] = "\x00\x01"; + +#ifndef PORT_HOST +#pragma disable_warning 147 //no warning about excess initializers (W_EXCESS_INITIALIZERS) +#pragma disable_warning 85 //no warning about unreferenced variables (W_NO_REFERENCE) +//array will be truncated but warning will be suppressed +//if truncation is incorrect, other ASSERTs will fail with high probability +char STORAGE trunc[2] = {'a', 'b', 'c'}; +#endif + +char STORAGE array[5] = {'a', 'b', 'c'}; + +#if TEST_G + struct w { + char a; + int b; + } STORAGE g[3] = { + {'x', 1}, + {'y'}, + {'z', 3} + }; +#endif + +struct x { + short a; + char b[10]; +}; + +struct x STORAGE teststruct[5] = { + { 10, { 1, 2, 3, 4, 5} }, + { 20, { 11 } }, + { 30, { 6, 7, 8} } +}; + +#if FLEXARRAY + struct y { + short a; + char b[]; + }; + +struct y STORAGE incompletestruct = { + 10, {1, 2, 3, 4, 5} +}; +#endif + +#if !defined (STORAGE_auto) +void Zeropad(void) +{ +#endif //STORAGE_auto + + ASSERT(string1[0] == '\x00'); + ASSERT(string1[1] == '\x01'); + ASSERT(string2[0] == '\x00'); + ASSERT(string2[1] == '\x01'); + + ASSERT(array[2] == 'c'); + ASSERT(array[4] == 0); + +#if TEST_G + ASSERT(g[1].a == 'y'); + ASSERT(g[1].b == 0); + ASSERT(g[2].a == 'z'); + ASSERT(g[2].b == 3); +#endif + + ASSERT(teststruct[0].b[1] == 2); + ASSERT(teststruct[0].b[5] == 0); + ASSERT(teststruct[1].b[0] == 11); + ASSERT(teststruct[4].b[9] == 0); + + ASSERT(sizeof(teststruct[2].a) == 2); + ASSERT(sizeof(teststruct[1].b) == 10); + ASSERT(sizeof(teststruct[1]) == 12); + ASSERT(sizeof(teststruct) == 60); + +#if FLEXARRAY + ASSERT(incompletestruct.a == 10); + ASSERT(incompletestruct.b[0] == 1); + ASSERT(incompletestruct.b[4] == 5); + + ASSERT(sizeof(incompletestruct) == sizeof(struct y)); + ASSERT(sizeof(incompletestruct) == offsetof(struct y, b)); + ASSERT(sizeof(incompletestruct) == offsetof(struct x, b)); +#endif + +#if defined (STORAGE_auto) + array[4] = 1; +#if TEST_G + g[1].b = 1; +#endif + teststruct[0].b[5] = 1; + teststruct[4].b[9] = 1; +#endif //STORAGE_auto +} + +void +testZeropad(void) +{ + Zeropad(); + +#if defined (STORAGE_auto) + Zeropad(); //test reinitialization +#endif //STORAGE_auto +} diff --git a/support/scripts/Makefile.snapshot b/support/scripts/Makefile.snapshot new file mode 100644 index 0000000..618d5d0 --- /dev/null +++ b/support/scripts/Makefile.snapshot @@ -0,0 +1,22 @@ +# Simple weekly tarball generator +SVNROOT = https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc +DATE = `date +%Y%m%d` +WWWROOT = /home/michaelh/www +SNAP = $(WWWROOT)/snapshots + +REVISION = 1 + +all: _sdcc + +_sdcc: + mkdir -p $(SNAP) + cd /tmp; \ + mkdir -p sdcc-$(DATE); \ + cd sdcc-$(DATE); \ + svn co $(SVNROOT) sdcc; \ + tar czf $(SNAP)/sdcc-$(DATE)-$(REVISION).tar.gz sdcc; \ + tar cIf $(SNAP)/sdcc-$(DATE)-$(REVISION).tar.bz2 sdcc + cd $(SNAP); \ + md5sum sdcc-$(DATE)-$(REVISION).tar.gz > sdcc-$(DATE)-$(REVISION).md5sums + cd $(SNAP); \ + md5sum sdcc-$(DATE)-$(REVISION).tar.bz2 >> sdcc-$(DATE)-$(REVISION).md5sums diff --git a/support/scripts/build.mak b/support/scripts/build.mak new file mode 100644 index 0000000..d4f0477 --- /dev/null +++ b/support/scripts/build.mak @@ -0,0 +1,144 @@ +# Makefile to get and build all the parts of GBDK + +CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \ + else if [ -x /bin/bash ]; then echo /bin/bash; \ + else echo sh; fi ; fi) + +TOPDIR := $(shell if [ "$$PWD" != "" ]; then echo $$PWD; else pwd; fi) + +BUILD = $(TOPDIR)/build/sdcc +SDCCLIB = $(BUILD) +CVSFLAGS = -z5 +CVS = cvs +SVNFLAGS = +SVN = svn +DIR = . +VER = 2.2.1 +# Used as a branch name. +SHORTVER = 221 + +# Options: +# linux-linux Building on Linux, targeting Linux +# linux-ming32 Building on Linux, targeting mingw32 based win32 +# cygwin-mingw32 Building via cygwin on win32, targeting mingw32 + +COMPILE_MODE = linux-mingw32 +SDCC_OR_GBDK = sdcc + +ROOT_GBDK = :pserver:anonymous@cvs.gbdk.sourceforge.net:/cvsroot/gbdk +ROOT_SDCC = https://sdcc.svn.sourceforge.net/svnroot/sdcc + +ifeq ($(COMPILE_MODE),linux-linux) +# For Linux +SE = +E = +SDCC_ROOT = /usr/lib/$(SDCC_OR_GBDK) +endif + +ifeq ($(COMPILE_MODE),linux-mingw32) +# For mingw32 hosted on Linux +# Tools name prefix +TNP = i386-mingw32- +# Source extension - what the gcc generated files have appended +SE = +# Dest extenstion - what extension we want them to have. +E = .exe +SDCC_ROOT = /$(SDCC_OR_GBDK) +# Set to cross to bypass the detection +CROSS_LIBGC = 1 +endif + +ifeq ($(COMPILE_MODE),cygwin-mingw32) +# For mingw32 on win32 +# Source extension - what the gcc generated files have appended +SE = .exe +# Dest extenstion - what extension we want them to have. +SDCC_ROOT = /$(SDCC_OR_GBDK) +endif + +all: logged_in dist + +clean: + for i in sdcc gbdk-lib gbdk-support/lcc; do make -C $$i clean; done + rm -f *~ + rm -rf $(BUILD) gbdk-lib gbdk-support sdcc logged_in + +update: logged_in + cd $(DIR); svn $(SVNFLAGS) co $(ROOT_SDCC)/branches/sdcc-$(SHORTVER)/sdcc sdcc + cd $(DIR); cvs $(CVSFLAGS) -d$(ROOT_GBDK) co -r sdcc-$(SHORTVER) gbdk-lib + cd $(DIR); cvs $(CVSFLAGS) -d$(ROOT_GBDK) co -r sdcc-$(SHORTVER) gbdk-support + +_sdcc: sdcc-bin sdcc-misc sdcc-lib sdcc-doc + +tidy: + find $(BUILD) -name "CVS" -exec rm -rf \; + find $(BUILD) -name ".svn" -exec rm -rf \; + find $(BUILD)/lib -name "*.asm" -exec rm -rf \; + -$(TNP)strip $(BUILD)/bin/* + +sdcc-bin: sdcc/sdccconf.h + make -C sdcc sdcc-bin CROSS_LIBGC=$(CROSS_LIBGC) + mkdir -p $(BUILD)/bin + for i in \ + sdcc sdcpp link-z80 as-z80 aslink asx8051; \ + do cp sdcc/bin/$$i$(SE) $(BUILD)/bin/$$i$(E); done + +sdcc-misc: sdcc/sdccconf.h + make -C sdcc sdcc-misc CROSS_LIBGC=$(CROSS_LIBGC) + mkdir -p $(BUILD)/bin + for i in \ + sdcdb; \ + do cp sdcc/bin/$$i$(SE) $(BUILD)/bin/$$i$(E); done + cp sdcc/sim/ucsim/s51.src/s51$(E) $(BUILD)/bin + cp sdcc/sim/ucsim/z80.src/sz80$(E) $(BUILD)/bin + cp sdcc/sim/ucsim/avr.src/savr$(E) $(BUILD)/bin + cp sdcc/debugger/mcs51/*.el $(BUILD)/bin + +sdcc-doc: + (cd sdcc; tar cf - doc) | (cd $(BUILD); tar xf -) + cp sdcc/README sdcc/COPYING $(BUILD) + mkdir -p $(BUILD)/sim + for i in COPYING INSTALL README TODO; \ + do cp sdcc/sim/ucsim/$$i $(BUILD)/sim; done + (cd sdcc/sim/ucsim; tar cf - doc) | (cd $(BUILD)/sim; tar xf -) + +sdcc-lib: sdcc-lib-z80 sdcc-lib-gen + mkdir -p $(BUILD)/lib + (cd sdcc/device/lib; tar cf - small large) | (cd $(BUILD)/lib; tar xf -) + (cd sdcc/device; tar cf - examples include) | (cd $(BUILD); tar xf -) + +sdcc-lib-z80: + make -C gbdk-lib/libc SDCCLIB=$(BUILD) PORTS=z80 PLATFORMS=consolez80 + (cd gbdk-lib/build; tar cf - consolez80 z80) | (cd $(BUILD)/lib; tar xf -) + mkdir -p $(BUILD)/include/gbdk-lib + (cd gbdk-lib/include; tar cf - .) | (cd $(BUILD)/include/gbdk-lib; tar xf -) + +sdcc-lib-gen: + make -C sdcc sdcc-device + +lcc: + make -C gbdk-support/lcc SDCCLIB=$(SDCC_ROOT)/ TNP=$(TNP) + cp gbdk-support/lcc/lcc$(SE) $(BUILD)/bin/lcc$(E) + +sdcc/sdccconf.h: sdcc/configure +ifdef TNP + cd sdcc; \ + export CCC=$(TNP)c++; \ + export RANLIB=$(TNP)ranlib; \ + export CC=$(TNP)gcc; \ + ./configure --datarootdir=$(SDCC_ROOT) + echo $$CCC +else + cd sdcc; ./configure --datarootdir=$(SDCC_ROOT) +endif + +dist: _sdcc lcc tidy + +zdist: dist + tar czf gbdk-$(VER).tar.gz gbdk + +logged_in: + cvs -d$(ROOT_GBDK) login + cvs -d$(ROOT_SDCC) login + touch logged_in + make -f build.mak update diff --git a/support/scripts/gen_known_bugs.pl b/support/scripts/gen_known_bugs.pl new file mode 100644 index 0000000..93426be --- /dev/null +++ b/support/scripts/gen_known_bugs.pl @@ -0,0 +1,236 @@ +# gen_known_bugs.pl - generate knownbugs.html +# +# Copyright (c) 2007 - 2008 Borut Razem +# +# This file is part of sdcc. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. +# +# Borut Razem +# borut.razem@siol.net + +use strict; +use warnings; + +use LWP::Simple; +use HTML::TreeBuilder; + + +my @headerList = ('Request ID', 'Summary', 'Open Date', 'Priority', 'Status', 'Assigned To', 'Submitted By'); + + +# check if the line is a correct header +sub is_header($) +{ + my ($line) = @_; + + if (ref($line)) { + my $i = 0; + foreach ($line->look_down('_tag', 'td')) { + if ($_->as_text() ne $headerList[$i++]) { + return 0; + } + } + return 1; + } + else { + return 0; + } +} + + +# check if the line has correct number of fields +sub has_all_fields($) +{ + my ($line) = @_; + + my @len = $line->look_down('_tag', 'td'); + return $#len == $#headerList; +} + + +# process a line +sub process_line($) +{ + my ($line) = @_; + + my $i = 0; + foreach ($line->look_down('_tag', 'td')) { + if ($i == 0) { + # remove nowrap attribute from 'Request ID' field + $_->attr('nowrap', undef); + } + elsif ($i == 1) { + # convert relative to absolute href in the 'Summary' field + foreach ($_->look_down('_tag', 'a')) { + my $attr = $_->attr('href'); + if (defined($attr) && $attr =~ m!^/tracker/index.php?!) { + $_->attr('href', 'http://sourceforge.net' . $attr); + } + } + } + elsif ($i == 2) { + # remove text formatting from 'Open Date' field + my $text = $_->as_text(); + $text =~ s/^\W*\**\W//; + $_->delete_content(); + $_->push_content($text); + } + elsif ($i == 4) { + # remove the 'Status' field + $_->delete(); + } + elsif ($i == 5 || $i == 6) { + # remove hrefs in 'Assigned To' and 'Submitted By' fields + foreach ($_->look_down('_tag', 'a')) { + $_->replace_with($_->as_text()); + } + } + ++$i; + } + $line->delete_ignorable_whitespace(); +} + + +# process the HTML page +sub process_page($) +{ + my ($html) = @_; + + # create HTML tree from the page + my $tree = HTML::TreeBuilder->new(); + $tree->parse($html); + + # find table with the required header + my $lines = 0; + foreach my $table ($tree->look_down('_tag', 'table')) { + my @lines = $table->content_list(); + if (is_header($lines[0])) { + shift(@lines); #remove the header + + # process the following lines in table + # if they have required number of fields + foreach my $line (@lines) { + if (ref($line) && has_all_fields($line)) { + # process a line + process_line($line); + # and print it + print($line->as_HTML(undef, ' ')); + ++$lines; + } + } + } + } + + $tree->delete; + + return $lines; +} + + +# print HTML header +sub print_header($) +{ + my ($version) = @_; + + print < + + + + + SourceForge.net: Known Bugs + + +

Small Device C Compiler - Release $version Known Bug List

+ + + + + + + + + + +EOF +} + + +# print HTML footer +sub print_footer($) +{ + my ($lines) = @_; + + print < +

Priority Colors:

+
Request IDSummaryOpen DatePriorityAssigned ToSubmitted By
+ + + + + + + + + + + +
123456789
+ +

Number of open bugs: $lines

+ +EOF +} + + +# main procedure +{ + my $url = "http://sourceforge.net/tracker/index.php?func=browse&group_id=599&atid=100599&set=custom&_assigned_to=0&_status=1&_category=100&_group=100&order=artifact_id&sort=DESC&offset="; + + if ($#ARGV != 0) { + printf("Usage: gen_known_bugs.pl \n"); + exit(1); + } + + # get the SDCC version number from command line + my $version = $ARGV[0]; + + my $lines = 0; # number of lines + + # print HTML header + print_header($version); + + # get pages from SF bug tracker + for (my $i = 0; my $html = get($url . $i); $i += 50) { + # and process them + last if (!(my $myLines = process_page($html))); + $lines += $myLines; + } + + # print HTML footer + print_footer($lines); + + exit(0); +} diff --git a/support/scripts/inc2h-pic16.pl b/support/scripts/inc2h-pic16.pl new file mode 100755 index 0000000..d6ca92f --- /dev/null +++ b/support/scripts/inc2h-pic16.pl @@ -0,0 +1,343 @@ +#!/usr/bin/perl -w + +use strict; + +# +# Parse MPASM include files to extract SDCC header/device library files +# This script is (c) 2007 by Raphael Neider , +# it is licensed under the terms of the GPL v2. +# +# Usage: perl inc2h-pic16.pl /path/to/pDEVICE.inc +# where pDEVICE.inc might be contained in a gputils(.sf.net) package. +# +# Steps to add a new target device to SDCC/PIC16: +# +# 1. Create picDEVICE.c and picDEVICE.h from pDEVICE.inc using +# perl inc2h-pic16.pl /path/to/pDEVICE.inc +# 2. mv picDEVICE.h $SDCC/device/include/pic16 +# 3. mv picDEVICE.c $SDCC/device/lib/pic16/libdev +# 4. add DEVICE to $SDCC/device/lib/pic16/pics.all (and .build) +# 5. either +# (a) adjust $SDCC/device/lib/pic16/libio/*.ignore +# if the device does not support ADC, I2C, or USART +# OR +# (b) adjust $SDCC/device/include/pic16/adc.h +# adding the new device to the correct ADC style class +# 6. edit $SDCC/device/include/pic16/pic18fregs.h +# 7. edit $SDCC/device/include/pic16/pic16devices.txt +# +# The file format of steps 6 and 7 is self explanatory, in most +# if not all cases you can copy and paste another device's records +# and adjust them to the newly added device. +# +# Please try to add device families (with a common datasheet) rather +# than a single device and use the .h and .c files of the largest +# device for all (using #include "largest.c" and #include "largest.h"). +# + +my $SCRIPT = $0; +$SCRIPT =~ s/.*\///g; # remove path prefix + +sub max +{ + my ($a,$b) = @_; + if ($a < $b) { return $b; } + else { return $a; } +} + +sub LOG +{ + foreach my $i (@_) { + print $i; + } +} + +sub setup +{ + my ($proc) = @_; + $proc = lc ($proc); + $proc =~ s,^pic,,; + $proc =~ s,^p,,; + my $header = "pic${proc}.h"; + my $library = "pic${proc}.c"; + open (HEADER, '>', "$header") or die "Could not open header file $header: $!"; + open (LIBRARY, '>', "$library") or die "Could not open library file $library: $!."; + + + $proc = uc($proc); + + print HEADER <<"HEREDOC" +/* + * $header - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by $SCRIPT, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC${proc}_H__ +#define __PIC${proc}_H__ 1 + +HEREDOC +; + + print LIBRARY <<"HEREDOC" +/* + * $library - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by $SCRIPT, + * (c) 2007 by Raphael Neider + */ + +#include <$header> + +HEREDOC +; +} + +sub release +{ + print HEADER <) { + # extract processor type + chomp; + s/\s+/ /g; + next if (/^\s*$/); + + if (/IFNDEF _*(18.*[0-9]+)/i) { + $processor = lc($1); + #LOG "Found processor: $processor.\n"; + setup($processor); + next; + } + + # extract SFR declarations + if (/;--.*Register Files.*--/i) { + $state = 1; + } + if ($state == 1 and /(\w+) EQU H'([0-9a-f]+)/i) { + my $addr = oct("0x" . $2); + $name = uc ($1); + $sfrs->{"$name"} = { "addr" => $addr, + "maxnames" => 0, + "bit0" => [], + "bit1" => [], + "bit2" => [], + "bit3" => [], + "bit4" => [], + "bit5" => [], + "bit6" => [], + "bit7" => [], + }; + + #LOG sprintf("Found register definition: $name @ 0x%X.\n", $addr); + next; + } elsif ($state == 1 and /(\w+) EQU ([0-9]+)/i) { + my $addr = 0+$2; + $name = uc ($1); + $sfrs->{"$name"} = { "addr" => $addr, + "maxnames" => 0, + "bit0" => [], + "bit1" => [], + "bit2" => [], + "bit3" => [], + "bit4" => [], + "bit5" => [], + "bit6" => [], + "bit7" => [], + }; + + #LOG sprintf("Found register definition: $name @ 0x%X.\n", $addr); + next; + } + + # extract device id positions + if (/(_DEVID[0-9a-f]*) EQU H'([0-9a-f]+)/i) { + my $addr = oct("0x" . $2); + #LOG sprintf("Found device ID $1 at 0x%X.\n", $addr); + if ($state != 6) { + #print "\n// device IDs\n"; + $state = 6; + } + DEFINE ($1, sprintf ("0x%X", $addr)); + next; + } + + if (/(_IDLOC[0-9a-f]*) EQU H'([90-9a-f]+)/i) { + my $addr = oct("0x" . $2); + #LOG sprintf("Found ID location: $1 at 0x%X.\n", $addr); + if ($state != 5) { + #print "\n// ID locations\n"; + $state = 5; + } + DEFINE ($1, sprintf ("0x%X", $addr)); + next; + } + + # extract configuration bits + if (/Configuration Bits/i) { + $state = 3; + #print "\n\n// Configuration Bits\n"; + header "\n\n// Configuration Bits\n"; + next; + } + + if ($state == 3 and /(_\w+) EQU H'([0-9a-f]+)/i) { + $name = $1; + my $addr = oct("0x" . $2); + # convert to double underscore form for SDCC internal consistency + $name =~ s/^_//g; + $name = "__".$name; + #LOG sprintf("Found config word $1 at 0x%X.\n", $addr); + DEFINE ($name, sprintf ("0x%X", $addr)); + next; + } + + if (($state == 3 or $state == 4) and /;--+ ((\w+) Options) --/i) { + $name = uc($2); + $state = 4; + #print "\n// $1\n"; + header "\n// $1\n"; + next; + } + if ($state == 4 and /(\w+) EQU H'([0-9a-f]+)(.*)/i) { + my $option = $1; + my $mask = oct ("0x" . $2); + my $comment = $3; + if ($comment =~ /[^;]*;\s*(.*)$/) { + $comment = $1; + } + #LOG sprintf ("Found config option $option, mask 0x%X in $name; comment: $comment.\n", $mask); + DEFINE ($option, sprintf("0x%X", $mask), $comment); + next; + } + + # extract bit definitions + if (/;\s*-+\s*(\w+)\s*(Bits)?\s*-+/i) { + $state = 2; + $name = uc ($1); + next; + } + if ($state == 2 and /(\w+) EQU H'([0-9a-f]+)/i) { + my $bit = oct("0x" . $2); + #LOG "Found bit declaration: $1 as bit $bit in reg $name.\n"; + push @{$sfrs->{"$name"}->{"bit$bit"}}, $1; + $sfrs->{"$name"}->{"maxnames"} = max( + scalar @{$sfrs->{"$name"}->{"bit$bit"}}, + $sfrs->{"$name"}->{"maxnames"} + ); + next; + } elsif ($state == 2 and /(\w+) EQU ([0-9]+)/i) { + #print "@@@@ FOUND $1 $2 for $name\n"; + my $bit = 0+$2; + #LOG "Found bit declaration: $1 as bit $bit in reg $name.\n"; + push @{$sfrs->{"$name"}->{"bit$bit"}}, $1; + $sfrs->{"$name"}->{"maxnames"} = max( + scalar @{$sfrs->{"$name"}->{"bit$bit"}}, + $sfrs->{"$name"}->{"maxnames"} + ); + next; + } + + # unknown/unhandled line + #print "// $_\n"; +} + +header "\n"; +library "\n"; +my $namelut = {}; +foreach my $reg (keys %$sfrs) { + if (!defined $namelut->{$sfrs->{"$reg"}->{"addr"}}) { + $namelut->{$sfrs->{"$reg"}->{"addr"}} = (); + } + push @{$namelut->{$sfrs->{"$reg"}->{"addr"}}}, $reg; +} + +foreach my $idx (sort keys %$namelut) { + foreach my $reg (sort @{$namelut->{$idx}}) { + my $names = $sfrs->{"$reg"}->{"maxnames"}; + + header sprintf ("extern __sfr __at (0x%03X) %s;\n", $idx, $reg); + library sprintf ( "__sfr __at (0x%03X) %s;\n", $idx, $reg); + + #print sprintf ("$reg @ %X (<= %d bit names)\n", $sfrs->{"$reg"}->{"addr"}, $names); + if ($names > 0) { + header sprintf ("typedef union {\n"); + + for (my $j=0; $j < $names; $j++) { + header sprintf ("\tstruct {\n"); + for (my $bit=0; $bit < 8; $bit++) { + my $bitname = $sfrs->{"$reg"}->{"bit$bit"}->[$j]; + if (defined $bitname) { + header sprintf ("\t\tunsigned %-10s\t: 1;\n", $bitname); + } else { + header sprintf ("\t\tunsigned %-10s\t: 1;\n", ""); + } + } + header sprintf ("\t};\n"); + } + + header sprintf ("} __${reg}bits_t;\n"); + header sprintf ("extern volatile __${reg}bits_t __at (0x%03X) ${reg}bits;\n", $idx); + library sprintf ( "volatile __${reg}bits_t __at (0x%03X) ${reg}bits;\n", $idx); + } + + header "\n"; + library "\n"; + } +} + +release; diff --git a/support/scripts/inc2h.pl b/support/scripts/inc2h.pl new file mode 100755 index 0000000..699e1ef --- /dev/null +++ b/support/scripts/inc2h.pl @@ -0,0 +1,620 @@ +#!/usr/bin/perl -w + +use strict; + +# Copyright (c) 2002 Kevin L. Pauba + + +# License: +# +# SDCC is licensed under the GNU Public license (GPL) v2. Note that +# this license covers the code to the compiler and other executables, +# but explicitly does not cover any code or objects generated by sdcc. +# We have not yet decided on a license for the run time libraries, but +# it will not put any requirements on code linked against it. See: +# +# http://www.gnu.org/copyleft/gpl.html +# +# See http://sdcc.sourceforge.net/ for the latest information on sdcc. + +##################################################################### +# >>> How to add a new device to SDCC PIC14 port? +# +# This description assumes that you have a copy of SDCC's sources +# in /path/to/sdcc and a (source or installed) version of gputils +# in /path/to/gputils (the only important point here is that +# /path/to/gputils/headers must exist and contain "p.inc"). +# Furthermore, I assume you want to add support for the 16f887 device +# (note: no 'pic' or 'p' prefix!), change this as desired. +# inc2h.pl can only deal with one single device at a time; repeat the +# ../inc2h.pl-step as often as required. +# +# The proposed sequence of commands is then: +# +# $ cd /path/to/sdcc/support/scripts +# $ mkdir build && cd build +# $ ../inc2h.pl 16f887 /path/to/gputils +# $ mv pic16f887.c /path/to/sdcc/device/lib/pic/libdev +# $ mv pic16f887.h /path/to/sdcc/device/include/pic +# $ vim /path/to/sdcc/device/include/pic/pic14devices.inc +# +# # Use any pure text editor you like (`[Esc]:q![Enter]' quits Vim ;-)). +# # Add a record for the new device to the file; usually you can copy +# # the record of a similar device and adjust the values using the +# # datasheet. The format of pic14devices.txt is explained in the file +# # itself. Please keep the file sorted. +# # When you are done: +# +# $ cd /path/to/sdcc/device/lib +# $ make model-pic14 +# $ make install +# +# Congratulations, you have just added support for a new device to +# the port. You may consider posting your (changes to) +# pic14devices.txt and the generated files (picDEVICE.[ch]) to +# have them included into the official source tree. +# Some testing beforehand would be appreciated, though. +##################################################################### + +my $rcsid = q~$Id: inc2h.pl 4850 2007-06-12 21:49:18Z tecodev $~; +my ($junk, $file, $version, $date, $time, $programmer, $status) + = split(/\s+/, $rcsid); +my ($programName) = ($file =~ /(\S+)/); + +if ($#ARGV < 0 || $#ARGV > 1 ) { + Usage(); +} +my $processor = uc(shift); +my $path = shift; +my %sfrs = (); +my %alias = (); +my %bits = (); +my %bitmasks = (); +my %addr = (); +my %ram = (); +my $path_delim = "/"; +my $devices = ""; +my %types = (); +my $type = ""; + +# just in time fixes for some register names +sub fixname { + my $name = shift; + $name =~ s/COMCON/CMCON/ig; + # use OPTION_REG instead of OPTION as OPTION is a assembler directive + $name =~ s/OPTION(_REG)?/OPTION_REG/ig; + # often declared as LCDDATn, but bits defined for LCDDATAn, 0 <= n <= 10 + $name =~ s/LCDDAT([^A])/LCDDATA$1/ig; + # LCDSE2 is missing in some headers, but LCDSE3 is declared... + $name =~ s/LCDSE3/LCDSE2/ig; + # XXX: should this be named LININTF or LINPRT? + $name =~ s/LININTF/LINPRT/ig; + # FIXME: duplicate declarations for n in {0,1,2} + $name =~ s/UEPn/UEP0/ig; + + return $name; +} + +sub checkname { + my $name = shift; + if (not exists $sfrs{$name}) { + print "SFR $name not defined (yet).\n"; + # Find similar ones. + if (exists $sfrs{$name."0"}) { + print " but ".$name."0 exists---using that instead.\n"; + return $name."0"; + } + my $try = $name; + $try =~ s/[0-9]$//; + if (exists $sfrs{$try}) { + print " but $try exists---using that instead.\n"; + return $try; + } + die "Not found a similar SFR---aborting.\n"; + } + return $name; +} + +# exists clone for arrays---does this not exist in Perl?!? +sub contained { + my $name = shift; + my $arr = shift; + + foreach my $item (@$arr) { + return 1 if ($name eq $item); + } + return 0; +} + + +$path = "" if (!defined $path); +if ($^O eq 'MSWin32') { + if ($path eq '') { + if (defined($path = $ENV{'GPUTILS_HEADER_PATH'}) || defined($path = $ENV{'GPUTILS_LKR_PATH'})) { + $path .= '\\..'; + } + else { + die "Could not find gpasm includes.\n"; + } + } + $path_delim = '\\'; +} +else { + # Nathan Hurst : find gputils on Debian + if ($path eq '') { + if ( -x "/usr/share/gputils") { + $path = "/usr/share/gputils"; + } elsif ( -x "/usr/share/gpasm") { + $path = "/usr/share/gpasm"; + } elsif ( -x "/usr/local/share/gputils") { + $path = "/usr/local/share/gputils"; + } else { + die "Could not find gpasm includes.\n"; + } + } + $path_delim = '/'; +} + +# +# Read the symbols at the end of this file. +# +while () { + next if /^\s*#/; + + if (/^\s*alias\s+(\S+)\s+(\S+)/) { + # + # Set an alias for a special function register. + # Some MPASM include files are not entirely consistent + # with sfr names. + # + $alias{fixname($2)} = fixname($1); + } elsif (/^\s*address\s+(\S+)\s+(\S+)/) { + # + # Set a default address for a special function register. + # Some MPASM include files don't specify the address + # of all registers. + # + # $addr{"$1"} = $2; + foreach my $device (split(/[,\s]+/, $devices)) { + $addr{"p$device", "$1"} = $2; + } + } elsif (/^\s*bitmask\s+(\S+)\s+/) { + # + # Set the bitmask that will be used in the 'memmap' pragma. + # + my $bitmask = "$1"; + foreach my $register (split(/\s+/, $')) { + $bitmasks{"$register"} = $bitmask; + } + } elsif (/^\s*ram\s+(\S+)\s+(\S+)\s+(\S+)/) { + # This info is now provided in "include/pic/pic14devices.txt". + #$lo = $1; + #$hi = $2; + #my $bitmask = $3; + #foreach $device (split(/[,\s]+/, $devices)) { + # $ram{"p$device"} .= "#pragma memmap $lo $hi RAM $bitmask$'"; + #} + } elsif (/^\s*processor\s+/) { + $devices = $'; + $type = ''; + } elsif (/^\s*(\S+)/) { + $type = $1; + $_ = $'; + foreach my $key (split) { + eval "\$types{'$key'} = $type;"; + } + } else { + foreach my $key (split) { + eval "\$types{'$key'} = $type;"; + } + } +} + +# +# Read the linker file. +# +# $linkFile = "$path/lkr/" . lc $processor . ".lkr"; +# open(LINK, "<$linkFile") +# || die "$programName: Error: Cannot open linker file $linkFile ($!)\n"; +# while () { +# if (/^(\S+)\s+NAME=(\S+)\s+START=(\S+)\s+END=(\S+)\s+(PROTECTED)?/) { +# $type = $1; +# $name = $2; +# $start = $3; +# $end = $4; +# $protected = 1 if ($5 =~ /protected/i); + +# if ($type =~ /(SHAREBANK)|(DATABANK)/i) { +# $ram{"p$processor"} .= +# sprintf("#pragma memmap %7s %7s RAM 0x000\t// $name\n", +# $start, $end); +# } +# } elsif (/^SECTION\s+NAME=(\S+)\s+ROM=(\S+)\s+/) { +# } +# } + +# Create header for pic${processor}.c file +my $lcproc = "pic" . lc($processor); +my $c_head = < + +EOT + +# +# Convert the file. +# +my $defaultType = 'other'; +my $includeFile = $path.$path_delim.'header'.$path_delim.'p'.lc($processor).'.inc'; +my $headFile = "pic" . lc($processor) . ".h"; +my $defsFile = "pic" . lc($processor) . ".c"; + +my $body = ""; +my $header = ""; +my $addresses = ""; +my $pragmas = ""; + +open(HEADER, "<$includeFile") + || die "$programName: Error: Cannot open include file $includeFile ($!)\n"; + +while (
) { + + if (/^;-+ Register Files/i) { + $defaultType = 'sfr'; + s/;/\/\//; + $body .= "$_"; + } elsif (/^;-+\s*(\S+)\s+Bits/i || /^;-+\s*(\S+)\s+-+/i) { + # The second case is usually bits, but the word Bits is missing + # also accept "UIE/UIR Bits" + foreach my $name (split(/\//, $1)) { + $name = fixname($name); + $name = checkname($name); + + if (defined($alias{$name})) { + $defaultType = "bits $alias{$name}"; + } else { + $defaultType = "bits $name"; + } + } + s/;/\/\//; + $body .= "$_"; + } elsif (/^;=+/i) { + $defaultType = ''; + s/;/\/\//; + $body .= "$_"; + } elsif (/^\s*;/) { + # + # Convert ASM comments to C style. + # + $body .= "//$'"; + } elsif (/^\s*IFNDEF\s+__(\S+)/) { + # + # Processor type. + # + $processor = $1; + $body .= "//$_"; + } elsif (/^\s*(\S+)\s+EQU\s+H'(.+)'/) { + # + # Useful bit of information. + # + my $name = $1; + my $value = $2; + my $rest = $'; + my $bitmask = "0x0000"; + + $rest =~ s/;/\/\//; + chomp($rest); + + if (defined($types{"p$processor", "$name"})) { + $type = $types{"p$processor", "$name"}; + } elsif (defined($types{"$name"})) { + $type = $types{"$name"}; + } else { + $type = $defaultType; + } + #print "$name --> $type\n"; ## DEBUG + + if (defined($bitmasks{"p$processor", "$name"})) { + $bitmask = $bitmasks{"p$processor", "$name"}; +# } elsif (defined($bitmasks{"$name"})) { +# $bitmask = $bitmasks{"$name"}; + } + + if ($type eq 'sfr') { + # + # A special function register. + # +# $pragmas .= sprintf("#pragma memmap %s_ADDR %s_ADDR " +# . "SFR %s\t// %s\n", +# $name, $name, $bitmask, $name); + $name = fixname($name); + if (defined $addr{"p$processor", "$name"}) { + $addresses .= sprintf("#define %s_ADDR\t0x%s\n", $name, $addr{"p$processor", "$name"}); + } else { + $addresses .= sprintf("#define %s_ADDR\t0x%s\n", $name, $value); + } + $body .= sprintf("extern __sfr __at %-30s $name;$rest\n", "(${name}_ADDR)" ); + $c_head .= sprintf("__sfr __at %-30s $name;\n", "(${name}_ADDR)"); + $addr{"p$processor", "$name"} = "0x$value"; + $sfrs{$name}=1; + } elsif ($type eq 'volatile') { + # + # A location that can change without + # direct program manipulation. + # + $name = fixname($name); +# $pragmas .= sprintf("#pragma memmap %s_ADDR %s_ADDR " +# . "SFR %s\t// %s\n", +# $name, $name, $bitmask, $name); + $body .= sprintf("extern __data __at %-30s $name;$rest\n", "(${name}_ADDR) volatile char"); + $c_head .= sprintf("__data __at %-30s $name;\n", "(${name}_ADDR) volatile char"); + if (defined $addr{"p$processor", "$name"}) { + $addresses .= sprintf("#define %s_ADDR\t0x%s\n", $name, $addr{"p$processor", "$name"}); + } else { + $addresses .= sprintf("#define %s_ADDR\t0x%s\n", $name, $value); + } + } elsif ($type =~ /^bits/) { + my ($junk, $register) = split(/\s/, $type); + my $bit = hex($value); + my $addr = $addr{"$register"}; + + # prepare struct declaration + if (0) { # DEBUG + foreach my $key (keys %bits) { + print " $key\n"; + } + print "$register // $bit // ".$bits{"$register"}."\n"; + } + if (!defined $bits{"$register"}) { + $bits{"$register"} = {}; # reference to empty hash + } + if (!defined $bits{"$register"}->{oct($bit)}) { + $bits{"$register"}->{oct($bit)} = []; # reference to empty array + } + for (my $k=0; $k < scalar @{$bits{"$register"}->{oct($bit)}}; $k++) { + $name = "" if ($bits{"$register"}->{oct($bit)} eq $name) + } + if (($name ne "") + and (1 != contained($name, \@{$bits{"$register"}->{oct($bit)}})) + ) { + push @{$bits{"$register"}->{oct($bit)}}, $name; + } + } else { + # + # Other registers, bits and/or configurations. + # + $name = fixname($name); + if ($type eq 'other') { + # + # A known symbol. + # + $body .= sprintf("#define %-20s 0x%s$rest\n", $name, $value); + } else { + # + # A symbol that isn't defined in the data + # section at the end of the file. Let's + # add a comment so that we can add it later. + # + $body .= sprintf("#define %-20s 0x%s$rest\n", + $name, $value); + } + } + } elsif (/^\s*$/) { + # + # Blank line. + # + $body .= "\n"; + } elsif (/__MAXRAM\s+H'([0-9a-fA-F]+)'/) { + my $maxram .= "//\n// Memory organization.\n//\n"; + if (!defined $ram{"p$processor"}) { + $ram{"p$processor"} = ""; + } + $pragmas = $maxram + . $ram{"p$processor"} . "\n" + . $pragmas; + $body .= "// $_"; + } else { + # + # Anything else we'll just comment out. + # + $body .= "// $_"; + } +} +$header .= <) { + s/\r//g; chomp; + if(/^\s*(\*|\w*)\s*([ABCDE0-7,-]+)\s*$/) { + if(lc($1) eq lc($processor)) { + die if defined $pinfo; + $pinfo = $2; + } elsif($1 eq "*") { + die if defined $defpinfo; + $defpinfo = $2; + } + } elsif(/^\s*#/ || /^\s*$/) { + # ignore blanks, comments + } else { + die "bad line in pic14ports '$_'"; + } + } + close P14PORTS; + }; + $defpinfo = "A0-5,B0-7,C0-7,D0-7,E0-2" unless defined $defpinfo; + $pinfo = $defpinfo unless defined $pinfo; + + if(defined $pinfo) { + foreach (split /,/, $pinfo) { + if(/^([ABCDE])([0-7])-([0-7])$/) { + my($prt, $low, $high) = ($1, $2, $3); + next unless defined $sfrs{"PORT$prt"} && defined $sfrs{"TRIS$prt"}; + next if defined $bits{"PORT$prt"}; + for(my $i = $low; $i <= $high; $i++) { + push @{$bits{"PORT$prt"}->{oct($i)}}, "R$prt".$i; + } + next if defined $bits{"TRIS$prt"}; + for(my $i = $low; $i <= $high; $i++) { + push @{$bits{"TRIS$prt"}->{oct($i)}}, "TRIS$prt".$i; + } + } else { die } + } + } +} + +my $structs = ""; +## create struct declarations +foreach my $reg (sort keys %bits) +{ + $structs .= "// ----- $reg bits --------------------\n"; + $structs .= "typedef union {\n"; + my $idx = 0; + my $max = 1; + do { + $structs .= " struct {\n"; + for (my $i=0; $i < 8; $i++) + { + if (!defined $bits{$reg}) { + #print "bits{$reg} undefined\n"; + } + if (!defined $bits{$reg}->{oct($i)}) { + #print "bits{$reg}->{".oct($i)."} undefined\n"; + $bits{$reg}->{oct($i)} = []; # empty array reference + } + my @names = @{$bits{$reg}->{oct($i)}}; + if ($max < scalar @names) { $max = scalar @names; } + if ($idx >= scalar @names) { + $structs .= " unsigned char :1;\n"; + } else { # (1 == scalar @names) { + $structs .= " unsigned char " . $names[$idx] . ":1;\n"; +# } else { +# $structs .= " union {\n"; +# foreach $name (@names) { +# $structs .= " unsigned char " . $name . ":1;\n"; +# } # foreach +# $structs .= " };\n"; + } + } # for + $structs .= " };\n"; + $idx++; + } while ($idx < $max); + $structs .= "} __${reg}_bits_t;\n"; + #if(defined $sfrs{$reg}) { + $structs .= "extern volatile __${reg}_bits_t __at(${reg}_ADDR) ${reg}_bits;\n\n"; + $c_head .= "volatile __${reg}_bits_t __at(${reg}_ADDR) ${reg}_bits;\n"; + #} + + # emit defines for individual bits + $structs .= "#ifndef NO_BIT_DEFINES\n"; + for (my $i=0; $i < 8; $i++) + { + my @names = @{$bits{$reg}->{oct($i)}}; + foreach my $field (@names) { + $structs .= sprintf("#define %-20s ${reg}_bits.$field\n", $field); + } # foreach + } + $structs .= "#endif /* NO_BIT_DEFINES */\n"; + $structs .= "\n"; +} # foreach + +open(HEAD, ">$headFile") or die "Could not open $headFile for writing."; +print HEAD $header + . $addresses . "\n" + . $pragmas . "\n\n" + . $body . "\n" + . $structs + . "#endif\n"; +close(HEAD); + +open(DEFS, ">$defsFile") or die "Could not open $defsFile for writing."; +print DEFS $c_head . "\n"; +close DEFS; + +sub Usage { + print STDERR < +# address +# bitmask +# ram +# sfr +# volatile +# bit +# + +alias OPTION_REG OPTION +volatile INDF PCL diff --git a/support/scripts/keil2sdcc.pl b/support/scripts/keil2sdcc.pl new file mode 100755 index 0000000..a3ba657 --- /dev/null +++ b/support/scripts/keil2sdcc.pl @@ -0,0 +1,112 @@ +#!/usr/bin/perl -w + +# keil2sdcc.pl +# Scott Bronson +# 22 June 2003 + + +# usage (UNIX): +# perl keil2sdcc.pl < keil_header.h > sdcc_header.h +# or +# perl keil2sdcc.pl keil_header.h > sdcc_header.h +# +# usage (Windows): +# perl keil2sdcc.pl keil_header.h > sdcc_header.h +# +# +# keil_header.h and sdcc_header.h must not be the same file since +# most shells overwrite the output file before opening the input file. + + +# This script converts Keil-style header files to SDCC. It tries to +# be pedantic so don't be surprised if you need to munge it a bit to +# get it to work. On the other hand, it doesn't fully parse the C +# file (for obvious reasons). + +# It takes the Keil header file either as an argument or on +# stdin and it produces the output on stdout. + +# This script is inspired by keil2sdcc.pl by Bela Torok but a lot +# more pedantic. + +use strict; + +while(<>) +{ + s/\r//g; # remove DOS line endings if necessary + + # external register (kind of a weird format) + # + # in: EXTERN xdata volatile BYTE GPIF_WAVE_DATA _AT_ 0xE400; + # out: EXTERN xdata at 0xE400 volatile BYTE GPIF_WAVE_DATA; + # $1: leading whitespace + # $2: variable name + # $3: variable location + # $4: trailing comments, etc. + + if(/^(\s*)EXTERN\s*xdata\s*volatile\s*BYTE\s*(\w+(?:\s*\[\s*\d+\s*\])?)\s+_AT_\s*([^;]+);(.*)$/) { + print "$1EXTERN xdata at $3 volatile BYTE $2;$4\n"; + next; + } + + # sfr statement + # + # in: sfr IOA = 0x80; + # out: sfr at 0x80 IOA; + # $1: leading whitespace + # $2: variable name + # $3: variable location + # $4: trailing comments, etc. + + if(/^(\s*)sfr\s*(\w+)\s*=\s*([^;]+);(.*)$/) { + print "$1sfr at $3 $2;$4\n"; + next; + } + + # sbit statement + # + # in: sbit SEL = 0x86+0; + # out: sbit at 0x86+0 SEL; + # $1: leading whitespace + # $2: variable name + # $3: variable location + # $4: trailing comments, etc. + + if(/^(\s*)sbit\s*(\w+)\s*=\s*([^;]+);(.*)$/) { + print "$1sbit at $3 $2;$4\n"; + next; + } + + + + # entire line is a C++ comment, output it unchanged. + if(/^(\s*)\/\/(.*)$/) { + print "$1//$2\n"; + next; + } + + # C comment, slurp lines until the close comment and output it unchanged. + if(/^(\s*)\/\*(.*)$/) { + my($ws,$cmt) = ($1,"$2\n"); + $cmt .= <> while $cmt !~ /\*\/\s*$/; + $cmt =~ s/\r//g; + print "$ws/*$cmt"; + next; + } + + # preprocessor statement (whitespace followed by '#'), don't change + if(/^(\s*)\#(.*)$/) { + print "$1#$2\n"; + next; + } + + # blank line, don't change + if(/^(\s*)$/) { + print "\n"; + next; + } + + chomp; + die "Unconvertable line: \"$_\"\n"; +} + diff --git a/support/scripts/listerr.c b/support/scripts/listerr.c new file mode 100644 index 0000000..a5127cb --- /dev/null +++ b/support/scripts/listerr.c @@ -0,0 +1,57 @@ +/* + * listerr.c - program to create the list of errors and warnings list from SDCCerr.c + * + * gcc -I ../../src listerr.c -o listerr + */ + +#include +#include +#include + +/* although this seems to be strange, this is the easiest way how to import the ErrTab without having to modify SDCCerr.c/h */ +#include "SDCCerr.c" + +// this is to make SDCCerr happy - simulate global SDCC variables +char *filename ; +int lineno ; +int fatalError ; + + +/* predefined names for errorlevels */ +char *ErrTypeName[] = { + "ALL ", + /** All warnings, including those considered 'reasonable to use, + on occasion, in clean programs' (man 3 gcc). */ + "PEDANTIC", + /** 'informational' warnings */ + "INFO ", + /** Most warnings. */ + "WARNING ", + /** Errors only. */ + "ERROR " + }; + + +/* some simple internal variables */ +int i; +char s[256]; +char *p; + +int main(int argc, char *argv[]) +{ + printf("Number Type Text\n"); /* output file header */ + printf("------------------------------------------------------------------------------\n"); + for (i = 0; i < MAX_ERROR_WARNING; i++) + { + if (ErrTab[i].errIndex == i) + { + strcpy(s, ErrTab[i].errText); + for (p = s; NULL != (p = strchr(s, '\n')); ) + *p = ' '; /* replace all newlines by spaces */ + printf("%3d %-16.16s%s\n", ErrTab[i].errIndex, ErrTypeName[ErrTab[i].errType], s); + } + } + + return 0; +} + diff --git a/support/scripts/mega.mak b/support/scripts/mega.mak new file mode 100644 index 0000000..9f8d019 --- /dev/null +++ b/support/scripts/mega.mak @@ -0,0 +1,76 @@ +# A simple Makefile that attempts to weave everything together +# for a build. Basically: +# * Makes a temporary build directory +# * Copies itself and build.mak off, hands over to the new Makefile +# * Downloads the source +# * Compiles the native, then win32 versions +# * Takes the libs from native and hooks them into win32 +# * tars it all up and calls it done + +DIST = gbdk + +BUILD_DIR = /home/michaelh/tmp/$(DIST)-build +NATIVE = linux-linux +CROSS = linux-mingw32 +NATIVE_DIST = linux-glibc2 +CROSS_DIST = win32 + +VER = 2.21-pre1 + +all: spawn + +spawn: + mkdir -p $(BUILD_DIR) + cp build.mak mega.mak $(BUILD_DIR) + make -C $(BUILD_DIR) -f mega.mak build + +build: orig native cross dist + +dist: + cd $(NATIVE)/build; tar czf ../../$(DIST)-$(VER)-$(NATIVE_DIST).tar.gz $(DIST) +ifeq ($(CROSS_DIST), win32) + rm -f $(DIST)-$(VER)-$(CROSS_DIST).zip + cd $(CROSS)/build; zip -rlq9 ../../$(DIST)-$(VER)-$(CROSS_DIST).zip $(DIST) +else + cd $(CROSS)/build; tar czf ../../$(DIST)-$(VER)-$(CROSS_DIST).tar.gz $(DIST) +endif + +clean: + rm -rf $(BUILD_DIR) + +orig: + mkdir -p orig + cp build.mak orig + touch orig/logged_in # Assume already logged in + make -C orig -f build.mak update + +linux-linux: orig + mkdir -p linux-linux + (cd orig; tar cf - .) | (cd linux-linux; tar xf -) + +linux-mingw32: orig + mkdir -p linux-mingw32 + (cd orig; tar cf - .) | (cd linux-mingw32; tar xf -) + +native: $(NATIVE) dummy + cp build.mak $(NATIVE) + make -C $(NATIVE) -f build.mak COMPILE_MODE=$(NATIVE) + +dummy: + +# We do a first pass, ignored build on sdccconf.h as at the moment +# it fails while configuring the sim. +cross-bin: $(CROSS) dummy + cp build.mak $(CROSS) + -make -C $(CROSS) -f build.mak COMPILE_MODE=$(CROSS) sdcc/sdccconf.h + make -C $(CROSS) -f build.mak COMPILE_MODE=$(CROSS) sdcc-bin lcc tidy + +# Binary files are compiled; now copy the built libs from the native +# version across +cross-mix: + mv $(CROSS)/build/$(DIST)/bin $(CROSS)/build/$(DIST)/bin.1 + (cd $(NATIVE); tar cf - build/$(DIST)) | (cd $(CROSS); tar xf - ) + rm -rf $(CROSS)/build/$(DIST)/bin + mv $(CROSS)/build/$(DIST)/bin.1 $(CROSS)/build/$(DIST)/bin + +cross: cross-bin cross-mix diff --git a/support/scripts/mh2h.c b/support/scripts/mh2h.c new file mode 100644 index 0000000..892e06f --- /dev/null +++ b/support/scripts/mh2h.c @@ -0,0 +1,291 @@ +/*------------------------------------------------------------------------- + mh2h.c - megaheader to header conversion utility. This utility converts + the mega-header MCS51 mcs51reg.h file to multiple simple header files. + + We want the simple headers for compatibility with other compilers + and also for documentation(quick reference of registers names and + bit defines while programming). + At the same time we don't want to maintain all these redundant files. + + So this offers a solution of converting 1 master .h file into many + simple header files. + + We use the preprocessor(sdcpp) to do most of the work. Then we + use some c code to clean it up and make it look pretty. + + Usage# mh2h {include_dir {bin_dir}} ; no options used. + default include_dir is "/usr/local/share/sdcc/include" + default bin_dir(run sdcpp from is "" + + Written by Karl Bongers(kbongers@turbobit.com) +|-------------------------------------------------------------------------*/ +#include +#include +#include +#include + +void get_micro_h_name(char *name, char *ret_str); +void get_micro_list(void); +void strip_eol(char *str); +void strip_trailing_sp(char *str); + +#define MAX_LISTSIZE 100 +char *micro_list[MAX_LISTSIZE]; +char bin_dir[256]; +char inc_dir[256]; + +/*------------------------------------------------------------------------- +|-------------------------------------------------------------------------*/ +int main(int argc, char *argv[]) +{ + int stat; + FILE *fpi, *fpo; + char str[256]; + char fname[256]; + int mi; + int last_line_was_sfr = 1; // used to print pretty, add a blank line + + // 1st arg optional inc dir to pull mcs51reg.h from + if (argc > 1) { + strcpy(inc_dir, argv[1]); + printf("using %s bin dir\n", inc_dir); + } + else { + strcpy(inc_dir, "/usr/local/share/sdcc/include/"); + } + + // 2nd arg optional bin dir to run sdcpp from + if (argc > 2) { + strcpy(bin_dir, argv[2]); + printf("using %s bin dir\n", bin_dir); + } + else { + bin_dir[0] = 0; + } + + + get_micro_list(); + mi = 0; + while (micro_list[mi] != NULL) + { + printf("LIST:%s\n", micro_list[mi++]); + } + + mi = 0; + while (micro_list[mi] != NULL) + { + printf("converting %s\n", micro_list[mi]); + fflush(0); + + sprintf(str, "%ssdcpp -D%s %smcs51reg.h tmp1", + bin_dir, + micro_list[mi], + inc_dir); + + stat = system(str); + /* stat = -1, or 127 error */ + + fpi = fopen("tmp1", "r"); + if (fpi == NULL) { + printf("error opening file to read\n"); + exit(1); + } + + get_micro_h_name(micro_list[mi], fname); + //sprintf(fname, "tmp%d.h", mi+1); + + fpo = fopen(fname, "w"); + if (fpo == NULL) { + printf("error opening %s file to write\n", fname); + exit(1); + } + + fputs("/*-------------------------------------------------------------------------\n", + fpo); + fprintf(fpo, " %s - %s header file.\n", fname, micro_list[mi]); + fputs(" This file was automatically generated using mh2h utility\n", fpo); + fputs(" to convert from mcs51reg.h.\n", fpo); + fputs("|-------------------------------------------------------------------------*/\n", + fpo); + fprintf(fpo, "#define %s\n", micro_list[mi]); + fputs("#include \n\n", fpo); + + fprintf(fpo, "#if 0\n"); + fputs("The following is for your reference only\n", fpo); + fputs("and is an accurate translation of what the\n", fpo); + fputs("above included mcs51reg.h file generates.\n\n", fpo); + + while (fgets(str, 256, fpi) != NULL) { + strip_eol(str); + strip_trailing_sp(str); + + if (strlen(str) <= 0) + continue; + if (strncmp(str, "#line ", 6) == 0) + continue; + if (strncmp(str, "//", 2) == 0) + continue; + + if (strncmp(str, "sfr ", 4) == 0) + { + if (!last_line_was_sfr) + fputs("\n", fpo); /* for readability, add a blank line) */ + last_line_was_sfr = 1; + } + else + { + if (strncmp(str, "sbit ", 5) == 0) + fputs(" ", fpo); /* for readability, indent */ + + last_line_was_sfr = 0; + } + + //printf("[%d,%s]\n", strlen(str), str); + fputs(str, fpo); + fputs("\n", fpo); + } + fprintf(fpo, "#endif\n"); + + fclose(fpi); + fclose(fpo); + ++mi; + } // while micro_list[mi] + + return 0; +} + +/*------------------------------------------------------------------------- + get_micro_h_name - get a .h filename to output to. Preferably, we will + have this info in mcs51reg.h file(alias:8051.h) and not do it like this. +|-------------------------------------------------------------------------*/ +void get_micro_h_name(char *name, char *ret_str) +{ + int mi; +static int name_i = 1; + // note: pulling these from mcs51reg.h would be better... +static char *micro_strings[] = { + "MICROCONTROLLER_8051", "8051.h", + "MICROCONTROLLER_8052", "8052.h", + "MICROCONTROLLER_AT89CX051", "at89x051.h", + "MICROCONTROLLER_AT89S53", "at89s53.h", + "MICROCONTROLLER_AT89X52", "at89x52.h", + "MICROCONTROLLER_AT89X55", "at89x55.h", + "MICROCONTROLLER_DS5000", "ds5000.h", + "MICROCONTROLLER_DS5001", "ds5001.h", + "MICROCONTROLLER_DS80C32X", "ds80c32x.h", + "MICROCONTROLLER_DS80C390", "ds80c390.h", + "MICROCONTROLLER_DS89C420", "ds89c420.h", + "MICROCONTROLLER_DS8XC520", "ds8xc520.h", + "MICROCONTROLLER_SAB80515", "sab80515.h", + "MICROCONTROLLER_SAB80515A", "sab80515a.h", + "MICROCONTROLLER_SAB80517", "sab80517.h", + "MICROCONTROLLER_P80C552", "p80c552.h", + NULL}; + + *ret_str = 0; + mi = 0; + while (micro_strings[mi] != NULL) + { + if (strcmp(micro_strings[mi], name) == 0) + { + strcpy(ret_str, micro_strings[mi+1]); + } + mi += 2; + } + + if (*ret_str == 0) + { + sprintf(ret_str, "noname%d.h", name_i++); + printf("warning, could not find .h filename for %s using %s\n", + name, ret_str); + } +} + +/*------------------------------------------------------------------------- + get_micro_list - get the list of micros supported by mcs51reg.h, grab + this list out of the mcs51reg.h file. +|-------------------------------------------------------------------------*/ +void get_micro_list(void) +{ + FILE *fp; + char str[256]; + int li = 0; + char *s; + char *s_start; + + strcpy(str, inc_dir); + strcat(str, "mcs51reg.h"); + fp = fopen(str, "r"); + if (fp == NULL) { + printf("error opening %s file to read\n", str); + exit(1); + } + while (fgets(str, 256, fp) != NULL) + { + strip_eol(str); + strip_trailing_sp(str); + s = str; + while (*s == ' ') + ++s; + if (strlen(s) <= 0) + continue; + + if (strncmp(s, "MICROCONTROLLER_", 16) == 0) + { + s_start = s; + while ((*s != 0) && (*s != ' ')) + ++s; + *s = 0; + micro_list[li++] = strdup(s_start); // add to our list MICROCONTROLLER_X + if (li >= MAX_LISTSIZE) + exit(1); + } + } // while + + micro_list[li] = NULL; + + if (li == 0) + { + printf("Error, no MICROCONTROLLER_ defines found\n"); + exit(1); + } + printf("%d MICRO defines found\n", li); + fclose(fp); +} + +/*------------------------------------------------------------------------- +|-------------------------------------------------------------------------*/ +void strip_trailing_sp(char *str) +{ + int sz; + sz = strlen(str); + if (sz == 0) + return; + while(str[sz-1] == ' ') + { + str[sz-1] = 0; + --sz; + if (sz == 0) + return; + } +} + +/*------------------------------------------------------------------------- +|-------------------------------------------------------------------------*/ +void strip_eol(char *str) +{ + int sz; +#define is_eol_char(c) ((c == 0x0d) || (c == 0x0a)) + sz = strlen(str); + if (sz == 0) + return; + if (is_eol_char(str[sz-1])) + str[sz-1] = 0; + + sz = strlen(str); + if (sz == 0) + return; + if (is_eol_char(str[sz-1])) + str[sz-1] = 0; +} + diff --git a/support/scripts/repack_release.sh b/support/scripts/repack_release.sh new file mode 100755 index 0000000..f31f29b --- /dev/null +++ b/support/scripts/repack_release.sh @@ -0,0 +1,61 @@ +# +# repack_release.sh +# +# This script repacks sdcc Linux and Mac OS X snapshot build binary abd doc packages +# into a sdcc release package. +# +# Repacking Linux package example: +# ./repack_release.sh sdcc-snapshot-i386-unknown-linux2.5-20090314-5413.tar.bz2 sdcc-doc-20090314-5413.tar.bz2 2.9.0 +# +# Repacking MacOS X package example: +# ./repack_release.sh sdcc-snapshot-universal-apple-macosx-20090314-5413.tar.bz2 sdcc-doc-20090314-5413.tar.bz2 2.9.0 +# + + +function fatal_error() +{ + echo "repack_release: $1" 1>&2 + exit 1; +} + + +function usage() +{ + echo "Usage: repack_release.sh " 1>&2 + exit 1; +} + + +{ + if [ $# != 3 ] + then + usage + fi + + bin_pkg=$1 + doc_pkg=$2 + ver=$3 + + arch=$(expr $bin_pkg : 'sdcc-snapshot-\([^-]*-[^-]*-[^-]*\)-.*\.tar\.bz2') + if [ -z "$arch" ] + then + fatal_error "$bin_pkg is not a sdcc binary package!" + fi + + if [ -d sdcc ] + then + fatal_error "Directory sdcc already exists!" + fi + + tar -xjvf $bin_pkg || fatal_error "Can't unpack $bin_pkg!" + + rm -rf ./sdcc/share/doc + rm -rf ./sdcc/share/sdcc/doc + tar -xjvf $doc_pkg -C ./sdcc/share/sdcc || fatal_error "Can't unpack $doc_pkg!" + cp ./sdcc/share/sdcc/doc/INSTALL.txt ./sdcc + cp ./sdcc/share/sdcc/doc/README.txt ./sdcc + tar -cjvf sdcc-$ver-$arch.tar.bz2 sdcc || fatal_error "Can't pack sdcc-$ver-$arch.tar.bz2!" + mv sdcc $arch + + exit 0 +} diff --git a/support/scripts/resource.h b/support/scripts/resource.h new file mode 100644 index 0000000..c19c0c0 --- /dev/null +++ b/support/scripts/resource.h @@ -0,0 +1,16 @@ +//{{NO_DEPENDENCIES}} +// Microsoft Developer Studio generated include file. +// Used by resource.rc +// +#define IDI_SDCC 101 + +// Next default values for new objects +// +#ifdef APSTUDIO_INVOKED +#ifndef APSTUDIO_READONLY_SYMBOLS +#define _APS_NEXT_RESOURCE_VALUE 102 +#define _APS_NEXT_COMMAND_VALUE 40001 +#define _APS_NEXT_CONTROL_VALUE 1000 +#define _APS_NEXT_SYMED_VALUE 101 +#endif +#endif diff --git a/support/scripts/resource.rc b/support/scripts/resource.rc new file mode 100644 index 0000000..4501599 --- /dev/null +++ b/support/scripts/resource.rc @@ -0,0 +1,71 @@ +//Microsoft Developer Studio generated resource script. +// +#include "resource.h" + +#define APSTUDIO_READONLY_SYMBOLS +///////////////////////////////////////////////////////////////////////////// +// +// Generated from the TEXTINCLUDE 2 resource. +// +#include "winres.h" + +///////////////////////////////////////////////////////////////////////////// +#undef APSTUDIO_READONLY_SYMBOLS + +///////////////////////////////////////////////////////////////////////////// +// English (U.S.) resources + +#if !defined(AFX_RESOURCE_DLL) || defined(AFX_TARG_ENU) +#ifdef _WIN32 +LANGUAGE LANG_ENGLISH, SUBLANG_ENGLISH_US +#pragma code_page(1252) +#endif //_WIN32 + +#ifdef APSTUDIO_INVOKED +///////////////////////////////////////////////////////////////////////////// +// +// TEXTINCLUDE +// + +1 TEXTINCLUDE DISCARDABLE +BEGIN + "resource.h\0" +END + +2 TEXTINCLUDE DISCARDABLE +BEGIN + "#include ""winres.h""\r\n" + "\0" +END + +3 TEXTINCLUDE DISCARDABLE +BEGIN + "\r\n" + "\0" +END + +#endif // APSTUDIO_INVOKED + +///////////////////////////////////////////////////////////////////////////// +// +// Icon +// + +// Icon with lowest ID value placed first to ensure application icon +// remains consistent on all systems. +IDI_SDCC ICON DISCARDABLE "sdcc.ico" +#endif // English (U.S.) resources +///////////////////////////////////////////////////////////////////////////// + + + +#ifndef APSTUDIO_INVOKED +///////////////////////////////////////////////////////////////////////////// +// +// Generated from the TEXTINCLUDE 3 resource. +// + + +///////////////////////////////////////////////////////////////////////////// +#endif // not APSTUDIO_INVOKED + diff --git a/support/scripts/sdcc.ico b/support/scripts/sdcc.ico new file mode 100644 index 0000000000000000000000000000000000000000..316ee329ab70233d232f190cccbf49c78c1bc983 GIT binary patch literal 1078 zcmcIjyAgvh3>74GjuBkt7$Zx#^cX%`v9^tfBr-9If`myaC1_5p<)L+D3k>2Ai$7zk zFjojiusPVA14Lo(@&bQhEw;_Sh>L`zMevnxxgV3{(Q~U1U*hllr?36my529E<9VOw z==jz3P1W_yXFnfipoz16ztz_-<2mQaH(;If1iOuh8Ak>)T@)nDQ**BOtKY#dZt)fPdac)f*yRrLzwtk}3m-aK_W};rM&SSe literal 0 HcmV?d00001 diff --git a/support/scripts/sdcc.nsi b/support/scripts/sdcc.nsi new file mode 100644 index 0000000..3abb5d2 --- /dev/null +++ b/support/scripts/sdcc.nsi @@ -0,0 +1,1315 @@ +# sdcc.nsi - NSIS installer script for SDCC +# +# Copyright (c) 2003-2009 Borut Razem +# +# This file is part of sdcc. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. +# +# Borut Razem +# borut.razem@siol.net + +# How to create WIN32 setup.exe +# +# - unpack WIN32 mingw daily snapshot sdcc-snapshot-i586-mingw32msvc-yyyymmdd-rrrr.zip +# to a clean directory (the option to create directories should be enabled). +# A sub directory sdcc is created (referenced as PKGDIR in continuation). +# - copy files sdcc/support/scripts/sdcc.ico and sdcc/support/scripts/sdcc.nsi +# (this file) from the sdcc Subversion snapshot to the PKGDIR directory +# - copy file COPYING and COPYING3 from the sdcc Subversion snapshot to the PKGDIR directory, +# rename it to COPYING.txt and COPYING3.txt and convert it to DOS format: +# unix2dos COPYING.txt +# unix2dos COPYING3.txt +# - copy readline5.dll to PKGDIR/bin/readline5.dll +# - run NSIS installer from PKGDIR directory: +# "c:\Program Files\NSIS\makensis.exe" -DVER_MAJOR= -DVER_MINOR= -DVER_REVISION= -DVER_BUILD= sdcc.nsi +# replace with the appropriate values, for example for SDCC 2.7.4: +# = 2 +# = 7 +# = 4 +# replace with the current svn revision number +# - A setup file setup.exe is created in PKGDIR directory. +# Rename it to sdcc-yyyymmdd-rrrr-setup.exe and upload it +# to sdcc download repository at sourceforge.net +# +# +# How to create WIN32 release setup.exe package +# +# - unpack WIN32 mingw daily snapshot sdcc-snapshot-i586-mingw32msvc-yyyymmdd-rrrr.zip +# to a clean directory (the option to create directories should be enabled). +# A sub directory sdcc is created (referenced as PKGDIR in continuation). +# - remove the PKGDIR/doc/ directory +# - unpack sdcc-doc-yyyymmdd-rrrr.zip to the PKGDIR/doc directory +# - copy files sdcc/support/scripts/sdcc.ico and sdcc/support/scripts/sdcc.nsi +# (this file) from the sdcc Subversion snapshot to the PKGDIR directory +# - copy file COPYING and COPYING3 from the sdcc Subversion snapshot to the PKGDIR directory, +# rename it to COPYING.txt and COPYING3.txt and convert it to DOS format: +# unix2dos COPYING.txt +# unix2dos COPYING3.txt +# - copy readline5.dll to PKGDIR/bin/readline5.dll +# - run NSIS installer from PKGDIR directory: +# "c:\Program Files\NSIS\makensis.exe" -DFULL_DOC -DVER_MAJOR= -DVER_MINOR= -DVER_REVISION= -DVER_BUILD= sdcc.nsi +# - A setup file setup.exe is created in PKGDIR directory. +# Rename it to sdcc-x.x.x-setup.exe and upload it +# to sdcc download repository at sourceforge.net +# +# How to upload secc setup.exe tosourceforge.net +# +# Execute following commands from the cmd prompt: +# - sftp sdcc.sourceforge.net +# - cd /home/groups/s/sd/sdcc/htdocs/snapshots/i586-mingw32msvc-setup +# - put sdcc_yyyymmdd_setup.exe +# - quit +# +# For debugging define -DSDCC.DEBUG command line option + +;-------------------------------- +; Debugging Macros + +!ifdef SDCC.DEBUG + Var SDCC.FunctionName + Var SDCC.StrStack0 + Var SDCC.StrStack1 + Var SDCC.StrStack2 + Var SDCC.StrStack3 + Var SDCC.StrStack4 + +!define SDCC.PushStr "!insertmacro MACRO_SDCC_PushStr" +!macro MACRO_SDCC_PushStr NAME + StrCpy $SDCC.StrStack4 $SDCC.StrStack3 + StrCpy $SDCC.StrStack3 $SDCC.StrStack2 + StrCpy $SDCC.StrStack2 $SDCC.StrStack1 + StrCpy $SDCC.StrStack1 $SDCC.StrStack0 + StrCpy $SDCC.StrStack0 $SDCC.FunctionName + StrCpy $SDCC.FunctionName "${NAME}" +!macroend + +!define SDCC.PopStr "!insertmacro MACRO_SDCC_PopStr" +!macro MACRO_SDCC_PopStr + StrCpy $SDCC.FunctionName $SDCC.StrStack0 + StrCpy $SDCC.StrStack0 $SDCC.StrStack1 + StrCpy $SDCC.StrStack1 $SDCC.StrStack2 + StrCpy $SDCC.StrStack2 $SDCC.StrStack3 + StrCpy $SDCC.StrStack3 $SDCC.StrStack4 +!macroend +!endif + +!define DebugMsg "!insertmacro MACRO_SDCC_DebugMsg" +!macro MACRO_SDCC_DebugMsg MSG + !ifdef SDCC.DEBUG + MessageBox MB_OK "*** $SDCC.FunctionName: ${MSG} ***" + !endif +!macroend + +!define Function "!insertmacro MACRO_SDCC_Function" +!macro MACRO_SDCC_Function NAME + Function "${NAME}" + !ifdef SDCC.DEBUG + ${SDCC.PushStr} ${NAME} + !endif +!macroend + +!define FunctionEnd "!insertmacro MACRO_SDCC_FunctionEnd" +!macro MACRO_SDCC_FunctionEnd + !ifdef SDCC.DEBUG + ${SDCC.PopStr} + !endif + FunctionEnd +!macroend + +!define Section "!insertmacro MACRO_SDCC_Section" +!macro MACRO_SDCC_Section NAME ID + Section "${NAME}" "${ID}" + !ifdef SDCC.DEBUG + ${SDCC.PushStr} "${NAME}" + !endif +!macroend + +!define UnselectedSection "!insertmacro MACRO_SDCC_UnselectedSection" +!macro MACRO_SDCC_UnselectedSection NAME ID + Section /o ${NAME} ${ID} + !ifdef SDCC.DEBUG + ${SDCC.PushStr} "${NAME}" + !endif +!macroend + +!define SectionEnd "!insertmacro MACRO_SDCC_SectionEnd" +!macro MACRO_SDCC_SectionEnd + !ifdef SDCC.DEBUG + ${SDCC.PopStr} + !endif + SectionEnd +!macroend + + +!define PRODUCT_NAME "SDCC" + +; Version +!ifdef VER_MAJOR & VER_MINOR & VER_REVISION & VER_BUILD + !define PRODUCT_VERSION "${VER_MAJOR}.${VER_MINOR}.${VER_REVISION}" +!else + !define PRODUCT_VERSION "XX.XX" +!endif + +SetCompressor /SOLID lzma + +!define SDCC_ROOT "." + +!define DEV_ROOT "${SDCC_ROOT}" + +!ifdef FULL_DOC +!system "unix2dos ${SDCC_ROOT}\doc\ChangeLog.txt" = 0 +!else +!system "unix2dos ${SDCC_ROOT}\doc\ChangeLog_head.txt" = 0 +!endif +!system "unix2dos ${SDCC_ROOT}\doc\README.TXT" = 0 + +InstType "Full (Bin, ucSim, SDCDB, Doc, Lib, Src)" +InstType "Medium (Bin, ucSim, SDCDB, Doc, Lib)" +InstType "Compact (Bin, ucSim, SDCDB, Doc)" + +;-------------------------------- +; Configuration + +!define PRODUCT_UNINST_KEY "Software\Microsoft\Windows\CurrentVersion\Uninstall\${PRODUCT_NAME}" +!define UNINST_ROOT_KEY HKLM +!define SDCC_ROOT_KEY HKLM + +;-------------------------------- +; Header Files + +!include MUI2.nsh +!include WordFunc.nsh +!include StrFunc.nsh +${StrStr} +${UnStrStr} + +;-------------------------------- +; Functions + +!ifdef VER_MAJOR & VER_MINOR & VER_REVISION & VER_BUILD + !insertmacro VersionCompare +!endif + +;-------------------------------- +; Variables + +Var SDCC.PathToRemove + +;-------------------------------- +; Configuration + +; MUI Settings +!define MUI_ABORTWARNING +!define MUI_ICON ".\sdcc.ico" + +; Welcome page +!insertmacro MUI_PAGE_WELCOME + +; License page +!insertmacro MUI_PAGE_LICENSE "${SDCC_ROOT}\COPYING.txt" + +; Uninstall/reinstall page +!ifdef VER_MAJOR & VER_MINOR & VER_REVISION & VER_BUILD +Page custom SDCC.PageReinstall SDCC.PageLeaveReinstall +!endif + +; StartMenu page +!define MUI_STARTMENUPAGE_DEFAULTFOLDER ${PRODUCT_NAME} +!define MUI_STARTMENUPAGE_REGISTRY_ROOT ${UNINST_ROOT_KEY} +!define MUI_STARTMENUPAGE_REGISTRY_KEY "${PRODUCT_UNINST_KEY}" +!define MUI_STARTMENUPAGE_REGISTRY_VALUENAME "NSIS:StartMenuDir" +!define MUI_STARTMENUPAGE_NODISABLE +Var MUI_STARTMENUPAGE_VARIABLE +!insertmacro MUI_PAGE_STARTMENU Application $MUI_STARTMENUPAGE_VARIABLE + +; Components page +!define MUI_COMPONENTSPAGE_SMALLDESC +!insertmacro MUI_PAGE_COMPONENTS + +; Directory page +!insertmacro MUI_PAGE_DIRECTORY + +; Instfiles page +!define MUI_PAGE_CUSTOMFUNCTION_LEAVE "SDCC.InstFilesLeave" +!insertmacro MUI_PAGE_INSTFILES + +${Function} SDCC.InstFilesLeave + ; Remove old path if reinstallation + ${If} $SDCC.PathToRemove != "" + ${DebugMsg} "removing path $SDCC.PathToRemove" + Push $SDCC.PathToRemove + Call SDCC.RemoveFromPath + ${EndIf} +${FunctionEnd} + +; Finish page - add to path +!define MUI_FINISHPAGE_TEXT "Confirm the checkbox if you want to add SDCC binary directory to the PATH environment variable" +!define MUI_FINISHPAGE_SHOWREADME_TEXT "Add $INSTDIR\bin to the PATH" +!define MUI_FINISHPAGE_SHOWREADME_FUNCTION SDCC.AddBinToPath +!define MUI_FINISHPAGE_SHOWREADME +!define MUI_FINISHPAGE_BUTTON "Next" +!insertmacro MUI_PAGE_FINISH + +; Finish page - reboot +!insertmacro MUI_PAGE_FINISH + +${Function} SDCC.AddBinToPath + ; Add new path + ${DebugMsg} "adding path $INSTDIR\bin" + Push "$INSTDIR\bin" + Call SDCC.AddToPath +${FunctionEnd} + +; Uninstaller pages +!insertmacro MUI_UNPAGE_CONFIRM +!insertmacro MUI_UNPAGE_INSTFILES +!insertmacro MUI_UNPAGE_FINISH + +; Language files +!insertmacro MUI_LANGUAGE "English" + +Name "${PRODUCT_NAME} ${PRODUCT_VERSION}" +BrandingText "" +OutFile "setup.exe" +InstallDir "$PROGRAMFILES\SDCC" +;;;;ShowInstDetails show +;;;;ShowUnInstDetails show + + +${Function} .onInit + ${DebugMsg} "Pre INSTDIR = $INSTDIR" + +!ifndef VER_MAJOR & VER_MINOR & VER_REVISION & VER_BUILD + ; Old unistallation method + ; Uninstall the old version, if present + ReadRegStr $R0 ${UNINST_ROOT_KEY} "${PRODUCT_UNINST_KEY}" "UninstallString" + StrCmp $R0 "" inst + + MessageBox MB_OKCANCEL|MB_ICONEXCLAMATION \ + "$(^Name) is already installed. $\n$\nClick 'OK' to remove the \ + previous version or 'Cancel' to cancel this upgrade." \ + IDOK uninst + Abort + +uninst: + ; Run the uninstaller + ClearErrors + ExecWait '$R0' + + Goto done +inst: + + ; Install the new version + MessageBox MB_YESNO|MB_ICONQUESTION "This will install $(^Name). Do you wish to continue?" IDYES +2 + Abort + +done: +!else + ; If the registry key exists it is an uninstallation or reinstallation: + ; take the old installation directory + Push $R0 + + ReadRegStr $R0 ${UNINST_ROOT_KEY} "${PRODUCT_UNINST_KEY}" "InstallLocation" + ${IfNot} ${Errors} + StrCpy $INSTDIR $R0 + StrCpy $SDCC.PathToRemove "$INSTDIR\bin" + ${EndIf} + + Pop $R0 +!endif + ${DebugMsg} "Post INSTDIR = $INSTDIR" +${FunctionEnd} + +${Function} un.onInit + + ${DebugMsg} "Pre INSTDIR = $INSTDIR" + + Push $R0 + ReadRegStr $R0 ${UNINST_ROOT_KEY} "${PRODUCT_UNINST_KEY}" "InstallLocation" + ${IfNot} ${Errors} + StrCpy $INSTDIR $R0 + ${EndIf} + Pop $R0 + + ${DebugMsg} "Post INSTDIR = $INSTDIR" + +${FunctionEnd} + +${Section} -Common SECCOMMON + SetOutPath "$INSTDIR" + File ".\sdcc.ico" + File "${SDCC_ROOT}\COPYING.txt" + File "${SDCC_ROOT}\COPYING3.txt" +${SectionEnd} + +${Section} "SDCC application files" SEC01 + SectionIn 1 2 3 RO + SetOutPath "$INSTDIR\bin" + File "${SDCC_ROOT}\bin\as-gbz80.exe" + File "${SDCC_ROOT}\bin\as-hc08.exe" + File "${SDCC_ROOT}\bin\as-z80.exe" + File "${SDCC_ROOT}\bin\asx8051.exe" + File "${SDCC_ROOT}\bin\aslink.exe" + File "${SDCC_ROOT}\bin\asranlib.exe" + File "${SDCC_ROOT}\bin\link-gbz80.exe" + File "${SDCC_ROOT}\bin\link-hc08.exe" + File "${SDCC_ROOT}\bin\link-z80.exe" + File "${SDCC_ROOT}\bin\makebin.exe" + File "${SDCC_ROOT}\bin\packihx.exe" + File "${SDCC_ROOT}\bin\sdcc.exe" + File "${SDCC_ROOT}\bin\sdcclib.exe" + File "${SDCC_ROOT}\bin\sdcpp.exe" + File "${SDCC_ROOT}\bin\readline5.dll" +${SectionEnd} + +${Section} "ucSim application files" SEC02 + SectionIn 1 2 3 + SetOutPath "$INSTDIR\bin" + File "${SDCC_ROOT}\bin\s51.exe" + File "${SDCC_ROOT}\bin\savr.exe" + File "${SDCC_ROOT}\bin\shc08.exe" + File "${SDCC_ROOT}\bin\sz80.exe" +${SectionEnd} + +${Section} "SDCDB files" SEC03 + SectionIn 1 2 3 + File "${SDCC_ROOT}\bin\sdcdb.exe" + File "${SDCC_ROOT}\bin\sdcdb.el" + File "${SDCC_ROOT}\bin\sdcdbsrc.el" +${SectionEnd} + +${Section} "SDCC documentation" SEC04 + SectionIn 1 2 3 + SetOutPath "$INSTDIR\doc" +!ifdef FULL_DOC + File /r "${SDCC_ROOT}\doc\*" +!else + File "${SDCC_ROOT}\doc\ChangeLog_head.txt" + File "${SDCC_ROOT}\doc\README.TXT" +!endif +${SectionEnd} + +${Section} "SDCC include files" SEC05 + SectionIn 1 2 + SetOutPath "$INSTDIR\include\asm\default" + File "${DEV_ROOT}\include\asm\default\features.h" + SetOutPath "$INSTDIR\include\asm\ds390" + File "${DEV_ROOT}\include\asm\ds390\features.h" + SetOutPath "$INSTDIR\include\asm\gbz80" + File "${DEV_ROOT}\include\asm\gbz80\features.h" + SetOutPath "$INSTDIR\include\asm\mcs51" + File "${DEV_ROOT}\include\asm\mcs51\features.h" + SetOutPath "$INSTDIR\include\asm\pic" + File "${DEV_ROOT}\include\asm\pic\features.h" + SetOutPath "$INSTDIR\include\asm\pic16" + File "${DEV_ROOT}\include\asm\pic16\features.h" + SetOutPath "$INSTDIR\include\asm\z80" + File "${DEV_ROOT}\include\asm\z80\features.h" + SetOutPath "$INSTDIR\include\hc08" + File "${DEV_ROOT}\include\hc08\*.h" + SetOutPath "$INSTDIR\include\mcs51" + File "${DEV_ROOT}\include\mcs51\*.h" + SetOutPath "$INSTDIR\include\pic" + File "${DEV_ROOT}\include\pic\*.h" + File "${DEV_ROOT}\include\pic\*.txt" + File "${DEV_ROOT}\include\pic\*.inc" + SetOutPath "$INSTDIR\include\pic16" + File "${DEV_ROOT}\include\pic16\*.h" + File "${DEV_ROOT}\include\pic16\*.txt" + SetOutPath "$INSTDIR\include\z80" + File "${DEV_ROOT}\include\z80\*.h" + SetOutPath "$INSTDIR\include" + File "${DEV_ROOT}\include\*.h" +${SectionEnd} + +${Section} "SDCC DS390 library" SEC06 + SectionIn 1 2 + SetOutPath "$INSTDIR\lib\ds390" + File "${DEV_ROOT}\lib\ds390\*.*" +${SectionEnd} + +${Section} "SDCC DS400 library" SEC07 + SectionIn 1 2 + SetOutPath "$INSTDIR\lib\ds400" + File "${DEV_ROOT}\lib\ds400\*.*" +${SectionEnd} + +${Section} "SDCC GBZ80 library" SEC08 + SectionIn 1 2 + SetOutPath "$INSTDIR\lib\gbz80" + File "${DEV_ROOT}\lib\gbz80\*.*" +${SectionEnd} + +${Section} "SDCC Z80 library" SEC09 + SectionIn 1 2 + SetOutPath "$INSTDIR\lib\z80" + File "${DEV_ROOT}\lib\z80\*.*" +${SectionEnd} + +${Section} "SDCC small model library" SEC10 + SectionIn 1 2 + SetOutPath "$INSTDIR\lib\small" + File "${DEV_ROOT}\lib\small\*.*" +${SectionEnd} + +${Section} "SDCC medium model library" SEC11 + SectionIn 1 2 + SetOutPath "$INSTDIR\lib\medium" + File "${DEV_ROOT}\lib\medium\*.*" +${SectionEnd} + +${Section} "SDCC large model library" SEC12 + SectionIn 1 2 + SetOutPath "$INSTDIR\lib\large" + File "${DEV_ROOT}\lib\large\*.*" +${SectionEnd} + +${Section} "SDCC small-stack-auto model library" SEC13 + SectionIn 1 2 + SetOutPath "$INSTDIR\lib\small-stack-auto" + File "${DEV_ROOT}\lib\small-stack-auto\*.*" +${SectionEnd} + +${Section} "SDCC HC08 library" SEC14 + SectionIn 1 2 + SetOutPath "$INSTDIR\lib\hc08" + File "${DEV_ROOT}\lib\hc08\*.*" +${SectionEnd} + +${Section} "SDCC PIC16 library" SEC15 + SectionIn 1 2 + SetOutPath "$INSTDIR\lib\pic16" + File "${DEV_ROOT}\lib\pic16\*.o" + File "${DEV_ROOT}\lib\pic16\*.lib" +${SectionEnd} + +${Section} "SDCC PIC library" SEC16 + SectionIn 1 2 + SetOutPath "$INSTDIR\lib\pic" + File "${DEV_ROOT}\lib\pic\*.lib" +${SectionEnd} + +${Section} "SDCC library sources" SEC17 + SectionIn 1 + SetOutPath "$INSTDIR\lib\src\ds390\examples" + File "${DEV_ROOT}\lib\src\ds390\examples\MOVED" + + SetOutPath "$INSTDIR\lib\src\ds390" + File "${DEV_ROOT}\lib\src\ds390\*.c" +# File "${DEV_ROOT}\lib\src\ds390\Makefile" + + SetOutPath "$INSTDIR\lib\src\ds400" + File "${DEV_ROOT}\lib\src\ds400\*.c" +# File "${DEV_ROOT}\lib\src\ds400\Makefile" + + SetOutPath "$INSTDIR\lib\src\gbz80" + File "${DEV_ROOT}\lib\src\gbz80\*.c" + File "${DEV_ROOT}\lib\src\gbz80\*.s" +# File "${DEV_ROOT}\lib\src\gbz80\Makefile" + + SetOutPath "$INSTDIR\lib\src\z80" + File "${DEV_ROOT}\lib\src\z80\*.s" +# File "${DEV_ROOT}\lib\src\z80\Makefile" + + SetOutPath "$INSTDIR\lib\src\hc08" + File "${DEV_ROOT}\lib\src\hc08\*.c" +# File "${DEV_ROOT}\lib\src\hc08\Makefile" + + SetOutPath "$INSTDIR\lib\src\mcs51" + File "${DEV_ROOT}\lib\src\mcs51\*.asm" +# File "${DEV_ROOT}\lib\src\mcs51\Makefile" + + SetOutPath "$INSTDIR\lib\src\small" +# File "${DEV_ROOT}\lib\src\small\Makefile" + + SetOutPath "$INSTDIR\lib\src\medium" +# File "${DEV_ROOT}\lib\src\medium\Makefile" + + SetOutPath "$INSTDIR\lib\src\large" +# File "${DEV_ROOT}\lib\src\large\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic" +# File "${DEV_ROOT}\lib\src\pic\configure" +# File "${DEV_ROOT}\lib\src\pic\configure.in" +# File "${DEV_ROOT}\lib\src\pic\GPL" +# File "${DEV_ROOT}\lib\src\pic\LGPL" +# File "${DEV_ROOT}\lib\src\pic\Makefile" +# File "${DEV_ROOT}\lib\src\pic\Makefile.common" +# File "${DEV_ROOT}\lib\src\pic\Makefile.common.in" +# File "${DEV_ROOT}\lib\src\pic\Makefile.rules" +# File "${DEV_ROOT}\lib\src\pic\Makefile.subdir" +# File "${DEV_ROOT}\lib\src\pic\NEWS" +# File "${DEV_ROOT}\lib\src\pic\README" + File "${DEV_ROOT}\lib\src\pic\TEMPLATE.c" + File "${DEV_ROOT}\lib\src\pic\TEMPLATE.S" + + SetOutPath "$INSTDIR\lib\src\pic\libsdcc" + File "${DEV_ROOT}\lib\src\pic\libsdcc\*.c" + File "${DEV_ROOT}\lib\src\pic\libsdcc\*.S" + File "${DEV_ROOT}\lib\src\pic\libsdcc\*.inc" +# File "${DEV_ROOT}\lib\src\pic\libsdcc\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic\libdev" + File "${DEV_ROOT}\lib\src\pic\libdev\*.c" +# File "${DEV_ROOT}\lib\src\pic\libdev\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic\libm" + File "${DEV_ROOT}\lib\src\pic\libm\*.c" + + SetOutPath "$INSTDIR\lib\src\pic16" +# File "${DEV_ROOT}\lib\src\pic16\configure" +# File "${DEV_ROOT}\lib\src\pic16\configure.in" +# File "${DEV_ROOT}\lib\src\pic16\COPYING" +# File "${DEV_ROOT}\lib\src\pic16\Makefile" +# File "${DEV_ROOT}\lib\src\pic16\Makefile.common" +# File "${DEV_ROOT}\lib\src\pic16\Makefile.common.in" +# File "${DEV_ROOT}\lib\src\pic16\Makefile.rules" +# File "${DEV_ROOT}\lib\src\pic16\Makefile.subdir" +# File "${DEV_ROOT}\lib\src\pic16\pics.all" +# File "${DEV_ROOT}\lib\src\pic16\pics.build" +# File "${DEV_ROOT}\lib\src\pic16\README" + + SetOutPath "$INSTDIR\lib\src\pic16\debug" +# File "${DEV_ROOT}\lib\src\pic16\debug\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\debug\gstack" +# File "${DEV_ROOT}\lib\src\pic16\debug\gstack\Makefile" + File "${DEV_ROOT}\lib\src\pic16\debug\gstack\*.c" + + SetOutPath "$INSTDIR\lib\src\pic16\libc" +# File "${DEV_ROOT}\lib\src\pic16\libc\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libc\ctype" + File "${DEV_ROOT}\lib\src\pic16\libc\ctype\*.c" +# File "${DEV_ROOT}\lib\src\pic16\libc\ctype\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libc\delay" + File "${DEV_ROOT}\lib\src\pic16\libc\delay\*.S" +# File "${DEV_ROOT}\lib\src\pic16\libc\delay\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libc\stdio" + File "${DEV_ROOT}\lib\src\pic16\libc\stdio\*.c" +# File "${DEV_ROOT}\lib\src\pic16\libc\stdio\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libc\stdlib" + File "${DEV_ROOT}\lib\src\pic16\libc\stdlib\*.c" + File "${DEV_ROOT}\lib\src\pic16\libc\stdlib\*.S" +# File "${DEV_ROOT}\lib\src\pic16\libc\stdlib\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libc\string" + File "${DEV_ROOT}\lib\src\pic16\libc\string\*.c" +# File "${DEV_ROOT}\lib\src\pic16\libc\string\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libc\utils" + File "${DEV_ROOT}\lib\src\pic16\libc\utils\*.S" +# File "${DEV_ROOT}\lib\src\pic16\libc\utils\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libdev" + File "${DEV_ROOT}\lib\src\pic16\libdev\*.c" +# File "${DEV_ROOT}\lib\src\pic16\libdev\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libio" + File "${DEV_ROOT}\lib\src\pic16\libio\*.ignore" +# File "${DEV_ROOT}\lib\src\pic16\libio\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libio\adc" + File "${DEV_ROOT}\lib\src\pic16\libio\adc\*.c" +# File "${DEV_ROOT}\lib\src\pic16\libio\adc\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libio\i2c" + File "${DEV_ROOT}\lib\src\pic16\libio\i2c\*.c" +# File "${DEV_ROOT}\lib\src\pic16\libio\i2c\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libio\usart" + File "${DEV_ROOT}\lib\src\pic16\libio\usart\*.c" +# File "${DEV_ROOT}\lib\src\pic16\libio\usart\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libm" + File "${DEV_ROOT}\lib\src\pic16\libm\*.c" +# File "${DEV_ROOT}\lib\src\pic16\libm\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libsdcc" +# File "${DEV_ROOT}\lib\src\pic16\libsdcc\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libsdcc\char" + File "${DEV_ROOT}\lib\src\pic16\libsdcc\char\*.c" +# File "${DEV_ROOT}\lib\src\pic16\libsdcc\char\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libsdcc\fixed16x16" + File "${DEV_ROOT}\lib\src\pic16\libsdcc\fixed16x16\*.c" + File "${DEV_ROOT}\lib\src\pic16\libsdcc\fixed16x16\*.S" +# File "${DEV_ROOT}\lib\src\pic16\libsdcc\fixed16x16\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libsdcc\float" + File "${DEV_ROOT}\lib\src\pic16\libsdcc\float\*.c" +# File "${DEV_ROOT}\lib\src\pic16\libsdcc\float\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libsdcc\gptr" + File "${DEV_ROOT}\lib\src\pic16\libsdcc\gptr\*.c" +# File "${DEV_ROOT}\lib\src\pic16\libsdcc\gptr\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libsdcc\int" + File "${DEV_ROOT}\lib\src\pic16\libsdcc\int\*.c" +# File "${DEV_ROOT}\lib\src\pic16\libsdcc\int\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libsdcc\long" + File "${DEV_ROOT}\lib\src\pic16\libsdcc\long\*.c" +# File "${DEV_ROOT}\lib\src\pic16\libsdcc\long\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libsdcc\lregs" + File "${DEV_ROOT}\lib\src\pic16\libsdcc\lregs\*.c" +# File "${DEV_ROOT}\lib\src\pic16\libsdcc\lregs\Makefile" + + SetOutPath "$INSTDIR\lib\src\pic16\libsdcc\stack" + File "${DEV_ROOT}\lib\src\pic16\libsdcc\stack\*.S" + + SetOutPath "$INSTDIR\lib\src\pic16\startup" + File "${DEV_ROOT}\lib\src\pic16\startup\*.c" +# File "${DEV_ROOT}\lib\src\pic16\startup\Makefile" +# File "${DEV_ROOT}\lib\src\pic16\startup\README" + + SetOutPath "$INSTDIR\lib\src" + File "${DEV_ROOT}\lib\src\*.c" +${SectionEnd} + +;-------------------------------- +;Descriptions + +;Language strings +LangString DESC_SEC01 ${LANG_ENGLISH} "SDCC application files" +LangString DESC_SEC02 ${LANG_ENGLISH} "ucSim application files" +LangString DESC_SEC03 ${LANG_ENGLISH} "SDCDB files" +LangString DESC_SEC04 ${LANG_ENGLISH} "SDCC documentation" +LangString DESC_SEC05 ${LANG_ENGLISH} "SDCC include files" +LangString DESC_SEC06 ${LANG_ENGLISH} "SDCC DS390 library" +LangString DESC_SEC07 ${LANG_ENGLISH} "SDCC DS400 library" +LangString DESC_SEC08 ${LANG_ENGLISH} "SDCC GBZ80 library" +LangString DESC_SEC09 ${LANG_ENGLISH} "SDCC Z80 library" +LangString DESC_SEC10 ${LANG_ENGLISH} "SDCC small model library" +LangString DESC_SEC11 ${LANG_ENGLISH} "SDCC medium model library" +LangString DESC_SEC12 ${LANG_ENGLISH} "SDCC large model library" +LangString DESC_SEC13 ${LANG_ENGLISH} "SDCC small-stack-auto model library" +LangString DESC_SEC14 ${LANG_ENGLISH} "SDCC HC08 library" +LangString DESC_SEC15 ${LANG_ENGLISH} "SDCC PIC16 library" +LangString DESC_SEC16 ${LANG_ENGLISH} "SDCC PIC library" +LangString DESC_SEC17 ${LANG_ENGLISH} "SDCC library sources" + +;Assign language strings to sections +!insertmacro MUI_FUNCTION_DESCRIPTION_BEGIN + !insertmacro MUI_DESCRIPTION_TEXT ${SEC01} $(DESC_SEC01) + !insertmacro MUI_DESCRIPTION_TEXT ${SEC02} $(DESC_SEC02) + !insertmacro MUI_DESCRIPTION_TEXT ${SEC03} $(DESC_SEC03) + !insertmacro MUI_DESCRIPTION_TEXT ${SEC04} $(DESC_SEC04) + !insertmacro MUI_DESCRIPTION_TEXT ${SEC05} $(DESC_SEC05) + !insertmacro MUI_DESCRIPTION_TEXT ${SEC06} $(DESC_SEC06) + !insertmacro MUI_DESCRIPTION_TEXT ${SEC07} $(DESC_SEC07) + !insertmacro MUI_DESCRIPTION_TEXT ${SEC08} $(DESC_SEC08) + !insertmacro MUI_DESCRIPTION_TEXT ${SEC09} $(DESC_SEC09) + !insertmacro MUI_DESCRIPTION_TEXT ${SEC10} $(DESC_SEC10) + !insertmacro MUI_DESCRIPTION_TEXT ${SEC11} $(DESC_SEC11) + !insertmacro MUI_DESCRIPTION_TEXT ${SEC12} $(DESC_SEC12) + !insertmacro MUI_DESCRIPTION_TEXT ${SEC13} $(DESC_SEC13) + !insertmacro MUI_DESCRIPTION_TEXT ${SEC14} $(DESC_SEC14) + !insertmacro MUI_DESCRIPTION_TEXT ${SEC15} $(DESC_SEC15) + !insertmacro MUI_DESCRIPTION_TEXT ${SEC16} $(DESC_SEC16) + !insertmacro MUI_DESCRIPTION_TEXT ${SEC17} $(DESC_SEC17) +!insertmacro MUI_FUNCTION_DESCRIPTION_END +;-------------------------------- + +${Section} -Icons SECICONS +!insertmacro MUI_STARTMENU_WRITE_BEGIN Application + CreateDirectory "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE" + CreateShortCut "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE\Uninstall SDCC.lnk" "$INSTDIR\uninstall.exe" +!ifdef FULL_DOC + CreateShortCut "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE\Documentation.lnk" "$INSTDIR\doc\sdccman.pdf" "" "$INSTDIR\sdcc.ico" "" "" "" "" + CreateShortCut "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE\README.lnk" "$INSTDIR\doc\README.TXT" "" "$INSTDIR\sdcc.ico" "" "" "" "" + CreateShortCut "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE\Change Log.lnk" "$INSTDIR\doc\ChangeLog.txt" "" "$INSTDIR\sdcc.ico" "" "" "" "" +!else + CreateShortCut "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE\Documentation.lnk" "$INSTDIR\doc\README.TXT" "" "$INSTDIR\sdcc.ico" "" "" "" "" + CreateShortCut "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE\Change Log.lnk" "$INSTDIR\doc\ChangeLog_head.txt" "" "$INSTDIR\sdcc.ico" "" "" "" "" +!endif + CreateShortCut "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE\GPL 2 License.lnk" "$INSTDIR\COPYING.txt" +!insertmacro MUI_STARTMENU_WRITE_END +${SectionEnd} + +${Section} -INI SECINI + WriteIniStr "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE\SDCC on the Web.url" "InternetShortcut" "URL" "http://sdcc.sourceforge.net/" +!ifdef FULL_DOC + WriteIniStr "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE\Latest Changes.url" "InternetShortcut" "URL" "http://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc/ChangeLog" +!endif +${SectionEnd} + +${Section} -PostInstall SECPOSTINSTALL + WriteRegStr ${SDCC_ROOT_KEY} "Software\${PRODUCT_NAME}" "" $INSTDIR +!ifdef VER_MAJOR & VER_MINOR & VER_REVISION & VER_BUILD + WriteRegDword ${SDCC_ROOT_KEY} "Software\${PRODUCT_NAME}" "VersionMajor" "${VER_MAJOR}" + WriteRegDword ${SDCC_ROOT_KEY} "Software\${PRODUCT_NAME}" "VersionMinor" "${VER_MINOR}" + WriteRegDword ${SDCC_ROOT_KEY} "Software\${PRODUCT_NAME}" "VersionRevision" "${VER_REVISION}" + WriteRegDword ${SDCC_ROOT_KEY} "Software\${PRODUCT_NAME}" "VersionBuild" "${VER_BUILD}" +!endif + + WriteRegExpandStr ${UNINST_ROOT_KEY} "${PRODUCT_UNINST_KEY}" "UninstallString" "$INSTDIR\uninstall.exe" + WriteRegExpandStr ${UNINST_ROOT_KEY} "${PRODUCT_UNINST_KEY}" "InstallLocation" "$INSTDIR" + WriteRegStr ${UNINST_ROOT_KEY} "${PRODUCT_UNINST_KEY}" "DisplayName" "${PRODUCT_NAME}" + WriteRegStr ${UNINST_ROOT_KEY} "${PRODUCT_UNINST_KEY}" "Publisher" "sdcc.sourceforge.net" + WriteRegStr ${UNINST_ROOT_KEY} "${PRODUCT_UNINST_KEY}" "URLInfoAbout" "http://sdcc.sourceforge.net/" + WriteRegStr ${UNINST_ROOT_KEY} "${PRODUCT_UNINST_KEY}" "HelpLink" "http://sdcc.sourceforge.net/" + WriteRegStr ${UNINST_ROOT_KEY} "${PRODUCT_UNINST_KEY}" "URLUpdateInfo" "http://sdcc.sourceforge.net/" + + WriteUninstaller "$INSTDIR\uninstall.exe" +${SectionEnd} + + +;;;; Uninstaller code ;;;; + +${Section} Uninstall SECUNINSTALL + !insertmacro MUI_STARTMENU_GETFOLDER Application $MUI_STARTMENUPAGE_VARIABLE + + ${DebugMsg} "removing path $INSTDIR\bin" + Push "$INSTDIR\bin" + Call un.SDCC.RemoveFromPath + +; Clean the registry + DeleteRegKey ${UNINST_ROOT_KEY} "${PRODUCT_UNINST_KEY}" + DeleteRegKey ${SDCC_ROOT_KEY} "Software\${PRODUCT_NAME}" + + Delete "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE\GPL 2 License.lnk" + Delete "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE\Change Log.lnk" +!ifdef FULL_DOC + Delete "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE\Latest Changes.url" + Delete "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE\README.lnk" +!endif + Delete "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE\Documentation.lnk" + Delete "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE\Uninstall SDCC.lnk" + Delete "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE\SDCC on the Web.url" + + RMDir "$SMPROGRAMS\$MUI_STARTMENUPAGE_VARIABLE" + + Delete "$INSTDIR\lib\src\large\Makefile" + + Delete "$INSTDIR\lib\src\medium\Makefile" + + Delete "$INSTDIR\lib\src\small\Makefile" + + Delete "$INSTDIR\lib\src\mcs51\*.asm" + Delete "$INSTDIR\lib\src\mcs51\Makefile" + Delete "$INSTDIR\lib\src\mcs51\README" + + Delete "$INSTDIR\lib\src\hc08\*.c" + Delete "$INSTDIR\lib\src\hc08\hc08.lib" + Delete "$INSTDIR\lib\src\hc08\Makefile" + + Delete "$INSTDIR\lib\src\z80\*.s" + Delete "$INSTDIR\lib\src\z80\z80.lib" + Delete "$INSTDIR\lib\src\z80\README" + Delete "$INSTDIR\lib\src\z80\Makefile" + + Delete "$INSTDIR\lib\src\gbz80\*.c" + Delete "$INSTDIR\lib\src\gbz80\*.s" + Delete "$INSTDIR\lib\src\gbz80\gbz80.lib" + Delete "$INSTDIR\lib\src\gbz80\README" + Delete "$INSTDIR\lib\src\gbz80\Makefile" + + Delete "$INSTDIR\lib\src\ds390\*.c" + Delete "$INSTDIR\lib\src\ds390\libds390.lib" + Delete "$INSTDIR\lib\src\ds390\Makefile.dep" + Delete "$INSTDIR\lib\src\ds390\Makefile" + Delete "$INSTDIR\lib\src\ds390\examples\MOVED" + + Delete "$INSTDIR\lib\src\ds400\*.c" + Delete "$INSTDIR\lib\src\ds400\libds400.lib" + Delete "$INSTDIR\lib\src\ds400\Makefile.dep" + Delete "$INSTDIR\lib\src\ds400\Makefile" + + Delete "$INSTDIR\lib\src\*.c" + + Delete "$INSTDIR\lib\pic\*.lib" + + Delete "$INSTDIR\lib\pic16\*.o" + Delete "$INSTDIR\lib\pic16\*.lib" + + Delete "$INSTDIR\lib\hc08\*.lib" + + Delete "$INSTDIR\lib\z80\*.o" + Delete "$INSTDIR\lib\z80\*.lib" + + Delete "$INSTDIR\lib\small\*.lib" + + Delete "$INSTDIR\lib\medium\*.lib" + + Delete "$INSTDIR\lib\large\*.lib" + + Delete "$INSTDIR\lib\small-stack-auto\*.lib" + + Delete "$INSTDIR\lib\gbz80\*.lib" + + Delete "$INSTDIR\lib\ds390\*.lib" + + Delete "$INSTDIR\lib\ds400\*.lib" + + Delete "$INSTDIR\include\asm\z80\*.h" + Delete "$INSTDIR\include\asm\pic16\*.h" + Delete "$INSTDIR\include\asm\pic\*.h" + Delete "$INSTDIR\include\asm\mcs51\*.h" + Delete "$INSTDIR\include\asm\gbz80\*.h" + Delete "$INSTDIR\include\asm\ds390\*.h" + Delete "$INSTDIR\include\asm\default\*.h" + Delete "$INSTDIR\include\z80\*.h" + Delete "$INSTDIR\include\pic\*.h" + Delete "$INSTDIR\include\pic\*.txt" + Delete "$INSTDIR\include\pic\*.inc" + Delete "$INSTDIR\include\pic16\*.h" + Delete "$INSTDIR\include\pic16\*.txt" + Delete "$INSTDIR\include\mcs51\*.h" + Delete "$INSTDIR\include\hc08\*.h" + Delete "$INSTDIR\include\*.h" + +!ifndef FULL_DOC + Delete "$INSTDIR\doc\README.TXT" + Delete "$INSTDIR\doc\ChangeLog_head.txt" +!endif + + Delete "$INSTDIR\bin\as-gbz80.exe" + Delete "$INSTDIR\bin\as-hc08.exe" + Delete "$INSTDIR\bin\as-z80.exe" + Delete "$INSTDIR\bin\asx8051.exe" + Delete "$INSTDIR\bin\aslink.exe" + Delete "$INSTDIR\bin\asranlib.exe" + Delete "$INSTDIR\bin\link-gbz80.exe" + Delete "$INSTDIR\bin\link-hc08.exe" + Delete "$INSTDIR\bin\link-z80.exe" + Delete "$INSTDIR\bin\makebin.exe" + Delete "$INSTDIR\bin\packihx.exe" + Delete "$INSTDIR\bin\sdcc.exe" + Delete "$INSTDIR\bin\sdcclib.exe" + Delete "$INSTDIR\bin\sdcpp.exe" + Delete "$INSTDIR\bin\readline5.dll" + + + Delete "$INSTDIR\bin\s51.exe" + Delete "$INSTDIR\bin\savr.exe" + Delete "$INSTDIR\bin\shc08.exe" + Delete "$INSTDIR\bin\sz80.exe" + + Delete "$INSTDIR\bin\sdcdb.exe" + Delete "$INSTDIR\bin\sdcdb.el" + Delete "$INSTDIR\bin\sdcdbsrc.el" + + Delete "$INSTDIR\COPYING.txt" + Delete "$INSTDIR\COPYING3.txt" + Delete "$INSTDIR\sdcc.ico" + Delete "$INSTDIR\uninstall.exe" + + RMDir /r "$INSTDIR\lib\src\pic" + RMDir /r "$INSTDIR\lib\src\pic16" + RMDir "$INSTDIR\lib\src\small" + RMDir "$INSTDIR\lib\src\medium" + RMDir "$INSTDIR\lib\src\large" + RMDir "$INSTDIR\lib\src\mcs51" + RMDir "$INSTDIR\lib\src\z80" + RMDir "$INSTDIR\lib\src\gbz80" + RMDir "$INSTDIR\lib\src\ds390\examples" + RMDir "$INSTDIR\lib\src\ds390" + RMDir "$INSTDIR\lib\src\ds400" + RMDir "$INSTDIR\lib\src\hc08" + RMDir "$INSTDIR\lib\src" + + RMDir "$INSTDIR\lib\pic" + RMDir "$INSTDIR\lib\pic16" + RMDir "$INSTDIR\lib\z80" + RMDir "$INSTDIR\lib\small" + RMDir "$INSTDIR\lib\medium" + RMDir "$INSTDIR\lib\large" + RMDir "$INSTDIR\lib\small-stack-auto" + RMDir "$INSTDIR\lib\gbz80" + RMDir "$INSTDIR\lib\ds390" + RMDir "$INSTDIR\lib\ds400" + RMDir "$INSTDIR\lib\hc08" + RMDir "$INSTDIR\lib" + + RMDir "$INSTDIR\include\asm\z80" + RMDir "$INSTDIR\include\asm\pic16" + RMDir "$INSTDIR\include\asm\pic" + RMDir "$INSTDIR\include\asm\mcs51" + RMDir "$INSTDIR\include\asm\gbz80" + RMDir "$INSTDIR\include\asm\ds390" + RMDir "$INSTDIR\include\asm\default" + RMDir "$INSTDIR\include\asm" + RMDir "$INSTDIR\include\z80" + RMDir "$INSTDIR\include\pic" + RMDir "$INSTDIR\include\pic16" + RMDir "$INSTDIR\include\mcs51" + RMDir "$INSTDIR\include\hc08" + RMDir "$INSTDIR\include" + +!ifdef FULL_DOC + RMDir /r "$INSTDIR\doc" +!else + RMDir "$INSTDIR\doc" +!endif + + RMDir "$INSTDIR\bin" + + RMDir "$INSTDIR" +;;;; SetAutoClose true +${SectionEnd} + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +; Path Manipulation functions ; +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + +!verbose 3 +!include "WinMessages.nsh" +!verbose 4 + +; AddToPath - Adds the given dir to the search path. +; Input - head of the stack +; Note - Win9x systems requires reboot + +${Function} SDCC.AddToPath + Exch $0 + Push $1 + Push $2 + Push $3 + Push $4 + + ; don't add if the path doesn't exist + ${If} ${FileExists} $0 + Call SDCC.IsNT + Pop $4 + ${If} $4 != 1 + ; Not on NT: read PATH from environment variable + ReadEnvStr $1 PATH + ${Else} + ; On NT: read PATH from registry + ReadRegStr $1 HKCU "Environment" "PATH" + ${EndIf} + + ${StrStr} $2 "$1;" "$0;" + ${If} $2 == "" + ${StrStr} $2 "$1;" "$0\;" + ${If} $2 == "" + GetFullPathName /SHORT $3 $0 + ${StrStr} $2 "$1;" "$3;" + ${If} $2 == "" + ${StrStr} $2 "$1;" "$03\;" + ${If} $2 == "" + ${If} $4 != 1 + ; Not on NT + StrCpy $1 $WINDIR 2 + FileOpen $1 "$1\autoexec.bat" a + FileSeek $1 -1 END + FileReadByte $1 $2 + ${If} $2 = 26 ; DOS EOF + FileSeek $1 -1 END ; write over EOF + ${Endif} + ${DebugMsg} "adding line $\r$\nSET PATH=%PATH%;$3$\r$\n" + FileWrite $1 "$\r$\nSET PATH=%PATH%;$3$\r$\n" + FileClose $1 + ${DebugMsg} "SetRebootFlag true" + SetRebootFlag true + ${Else} + ;System PATH variable is at: + ;HKLM "/SYSTEM/CurrentControlSet/Control/Session Manager/Environment" "Path" + ReadRegStr $1 HKCU "Environment" "PATH" + StrCpy $2 $1 1 -1 ; copy last char + ${If} $2 == ";" ; if last char == ; + StrCpy $1 $1 -1 ; remove last char + ${Endif} + ${If} $1 != "" + StrCpy $0 "$1;$0" + ${Endif} + WriteRegExpandStr HKCU "Environment" "PATH" $0 + SendMessage ${HWND_BROADCAST} ${WM_WININICHANGE} 0 "STR:Environment" /TIMEOUT=5000 + ${Endif} + ${Endif} + ${Endif} + ${Endif} + ${Endif} + ${EndIf} + + Pop $4 + Pop $3 + Pop $2 + Pop $1 + Pop $0 +${FunctionEnd} + +; RemoveFromPath - Remove a given dir from the path +; Input: head of the stack + +!macro SDCC.RemoveFromPath un +${Function} ${un}SDCC.RemoveFromPath + Exch $0 + Push $1 + Push $2 + Push $3 + Push $4 + Push $5 + Push $6 + + IntFmt $6 "%c" 26 ; DOS EOF + + Call ${un}SDCC.IsNT + Pop $1 + ${If} $1 != 1 + ; Not on NT + StrCpy $1 $WINDIR 2 + FileOpen $1 "$1\autoexec.bat" r + GetTempFileName $4 + FileOpen $2 $4 w + GetFullPathName /SHORT $0 $0 + StrCpy $0 "SET PATH=%PATH%;$0" + + nextLine: + ; copy all lines except the line containing "SET PATH=%PATH%;$0" + ; from autoexec.bat to the temporary file + ClearErrors + FileRead $1 $3 + ${IfNot} ${Errors} + StrCpy $5 $3 1 -1 ; read last char + ${If} $5 == $6 ; if DOS EOF + StrCpy $3 $3 -1 ; remove DOS EOF so we can compare + ${EndIf} + ${If} $3 != "$0$\r$\n" + ${AndIf} $3 != "$0$\n" + ${AndIf} $3 != "$0" + FileWrite $2 $3 + Goto nextLine + ${Else} + ; This is the line I'm looking for: + ; don't copy it + ${DebugMsg} "removing line $0" + ${DebugMsg} "SetRebootFlag true" + SetRebootFlag true + Goto nextLine + ${EndIf} + ${EndIf} + + FileClose $2 + FileClose $1 + StrCpy $1 $WINDIR 2 + Delete "$1\autoexec.bat" + CopyFiles /SILENT $4 "$1\autoexec.bat" + Delete $4 + ${Else} + ;System PATH variable is at: + ;HKLM "/SYSTEM/CurrentControlSet/Control/Session Manager/Environment" "Path" + ReadRegStr $1 HKCU "Environment" "PATH" + StrCpy $5 $1 1 -1 ; copy last char + ${If} $5 != ";" ; if last char != ; + StrCpy $1 "$1;" ; append ; + ${EndIf} + Push $1 + Push "$0;" + Call ${un}StrStr ; Find `$0;` in $1 + Pop $2 ; pos of our dir + ${If} $2 != "" + ; it is in path: + ; $0 - path to add + ; $1 - path var + StrLen $3 "$0;" + StrLen $4 $2 + StrCpy $5 $1 -$4 ; $5 is now the part before the path to remove + StrCpy $6 $2 "" $3 ; $6 is now the part after the path to remove + StrCpy $3 $5$6 + + StrCpy $5 $3 1 -1 ; copy last char + ${If} $5 == ";" ; if last char == ; + StrCpy $3 $3 -1 ; remove last char + ${EndIf} + ${If} $3 != "" + ; New PATH not empty: update the registry + WriteRegExpandStr HKCU "Environment" "PATH" $3 + ${Else} + ; New PATH empty: remove from the registry + DeleteRegValue HKCU "Environment" "PATH" + ${EndIf} + SendMessage ${HWND_BROADCAST} ${WM_WININICHANGE} 0 "STR:Environment" /TIMEOUT=5000 + ${Endif} + ${Endif} + + Pop $6 + Pop $5 + Pop $4 + Pop $3 + Pop $2 + Pop $1 + Pop $0 +${FunctionEnd} +!macroend +!insertmacro SDCC.RemoveFromPath "" +!insertmacro SDCC.RemoveFromPath "un." + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +; Utility Functions ; +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + +; IsNT +; no input +; output, top of the stack = 1 if NT or 0 if not +; +; Usage: +; Call IsNT +; Pop $R0 +; ($R0 at this point is 1 or 0) + +!macro SDCC.IsNT un +${Function} ${un}SDCC.IsNT + Push $R0 + ReadRegStr $R0 HKLM "SOFTWARE\Microsoft\Windows NT\CurrentVersion" CurrentVersion + ${If} $R0 == "" + ; we are not NT. + Pop $R0 + Push 0 + ${Else} + ; NT!!! + Pop $R0 + Push 1 + ${EndIf} +${FunctionEnd} +!macroend +!insertmacro SDCC.IsNT "" +!insertmacro SDCC.IsNT "un." + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +; Uninstall/Reinstall page functions ; +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + +!ifdef VER_MAJOR & VER_MINOR & VER_REVISION & VER_BUILD + +Var ReinstallPageCheck + +${Function} SDCC.PageReinstall + + ReadRegStr $R0 ${SDCC_ROOT_KEY} "Software\${PRODUCT_NAME}" "" + + ${If} $R0 == "" + ReadRegStr $R0 ${UNINST_ROOT_KEY} "${PRODUCT_UNINST_KEY}" "UninstallString" + ${If} $R0 == "" + Abort + ${EndIf} + ${EndIf} + + ReadRegDWORD $R0 ${SDCC_ROOT_KEY} "Software\${PRODUCT_NAME}" "VersionMajor" + ReadRegDWORD $R1 ${SDCC_ROOT_KEY} "Software\${PRODUCT_NAME}" "VersionMinor" + ReadRegDWORD $R2 ${SDCC_ROOT_KEY} "Software\${PRODUCT_NAME}" "VersionRevision" + ReadRegDWORD $R3 ${SDCC_ROOT_KEY} "Software\${PRODUCT_NAME}" "VersionBuild" + StrCpy $R0 $R0.$R1.$R2.$R3 + + ${VersionCompare} ${VER_MAJOR}.${VER_MINOR}.${VER_REVISION}.${VER_BUILD} $R0 $R0 + ${If} $R0 == 0 + StrCpy $R1 "${PRODUCT_NAME} ${PRODUCT_VERSION} is already installed. Select the operation you want to perform and click Next to continue." + StrCpy $R2 "Add/Reinstall components" + StrCpy $R3 "Uninstall ${PRODUCT_NAME}" + !insertmacro MUI_HEADER_TEXT "Already Installed" "Choose the maintenance option to perform." + StrCpy $R0 "2" + ${ElseIf} $R0 == 1 + StrCpy $R1 "An older version of ${PRODUCT_NAME} is installed on your system. It's recommended that you uninstall the current version before installing. Select the operation you want to perform and click Next to continue." + StrCpy $R2 "Uninstall before installing" + StrCpy $R3 "Do not uninstall" + !insertmacro MUI_HEADER_TEXT "Already Installed" "Choose how you want to install ${PRODUCT_NAME}." + StrCpy $R0 "1" + ${ElseIf} $R0 == 2 + StrCpy $R1 "A newer version of ${PRODUCT_NAME} is already installed! It is not recommended that you install an older version. If you really want to install this older version, it's better to uninstall the current version first. Select the operation you want to perform and click Next to continue." + StrCpy $R2 "Uninstall before installing" + StrCpy $R3 "Do not uninstall" + !insertmacro MUI_HEADER_TEXT "Already Installed" "Choose how you want to install ${PRODUCT_NAME}." + StrCpy $R0 "1" + ${Else} + Abort + ${EndIf} + + nsDialogs::Create /NOUNLOAD 1018 + + ${NSD_CreateLabel} 0 0 100% 24u $R1 + Pop $R1 + + ${NSD_CreateRadioButton} 30u 50u -30u 8u $R2 + Pop $R2 + ${NSD_OnClick} $R2 SDCC.PageReinstallUpdateSelection + + ${NSD_CreateRadioButton} 30u 70u -30u 8u $R3 + Pop $R3 + ${NSD_OnClick} $R3 SDCC.PageReinstallUpdateSelection + + ${If} $ReinstallPageCheck != 2 + SendMessage $R2 ${BM_SETCHECK} ${BST_CHECKED} 0 + ${Else} + SendMessage $R3 ${BM_SETCHECK} ${BST_CHECKED} 0 + ${EndIf} + + nsDialogs::Show + +${FunctionEnd} + +${Function} SDCC.PageReinstallUpdateSelection + + Pop $R1 + + ${NSD_GetState} $R2 $R1 + + ${If} $R1 == ${BST_CHECKED} + StrCpy $ReinstallPageCheck 1 + ${Else} + StrCpy $ReinstallPageCheck 2 + ${EndIf} + +${FunctionEnd} + +${Function} SDCC.PageLeaveReinstall + + ${NSD_GetState} $R2 $R1 + + ${DebugMsg} "R0 = $R0, R1 = $R1, R2 = $R2" + + ${If} $R0 == "1" + ${AndIf} $R1 != "1" + Goto reinst_done + ${EndIf} + + ${If} $R0 == "2" + ${AndIf} $R1 == 1 + Goto reinst_done + ${EndIf} + + ReadRegStr $R1 ${UNINST_ROOT_KEY} "${PRODUCT_UNINST_KEY}" "UninstallString" + + ;Run uninstaller + HideWindow + + ${If} $R0 == "2" + ; Uninstall only: uninstaller should be removed + ClearErrors + ; ExecWait doesn't wait if _?=$INSTDIR is not defined! + ExecWait '$R1' + Quit + ${Else} + ; Uninstal & Reinstall: uninstaller will be rewritten + ClearErrors + ; ExecWait doesn't wait if _?=$INSTDIR is not defined! + ExecWait '$R1 _?=$INSTDIR' + ${EndIf} + + BringToFront + +reinst_done: + +${FunctionEnd} + +!endif # VER_MAJOR & VER_MINOR & VER_REVISION & VER_BUILD diff --git a/support/scripts/sdcc_cygwin_mingw32 b/support/scripts/sdcc_cygwin_mingw32 new file mode 100755 index 0000000..2588d4f --- /dev/null +++ b/support/scripts/sdcc_cygwin_mingw32 @@ -0,0 +1,14 @@ +#!/bin/sh +# Script to "cross" compile with mingw32 under Cygwin + +./configure -C \ +--prefix="/sdcc" \ +--datarootdir="/sdcc" \ +docdir="\${datarootdir}/doc" \ +include_dir_suffix="include" \ +lib_dir_suffix="lib" \ +sdccconf_h_dir_separator="\\\\" \ +CC="gcc -mno-cygwin" \ +CXX="g++ -mno-cygwin" + +make 2>&1 | tee make.log diff --git a/support/scripts/sdcc_mingw32 b/support/scripts/sdcc_mingw32 new file mode 100755 index 0000000..ac78f54 --- /dev/null +++ b/support/scripts/sdcc_mingw32 @@ -0,0 +1,21 @@ +#!/bin/sh +# Script to crosscompile with mingw32 +TOOLSPREFIX=/usr/local/cross-tools/i386-mingw32msvc/bin + +export CC=$TOOLSPREFIX/gcc +export CXX=$TOOLSPREFIX/g++ +export RANLIB=$TOOLSPREFIX/ranlib +export STRIP=$TOOLSPREFIX/strip + +export SDCCCONFIGUREFLAGS=" \ +--prefix=/sdcc \ +--datarootdir=/sdcc \ +docdir=\${datarootdir}/doc \ +include_dir_suffix=include \ +lib_dir_suffix=lib \ +sdccconf_h_dir_separator=\\\\ \ +--disable-device-lib \ +--host=i586-mingw32msvc --build=unknown-unknown-linux-gnu" + +./configure $SDCCCONFIGUREFLAGS +make 2>&1 | tee make.log diff --git a/support/scripts/winres.h b/support/scripts/winres.h new file mode 100644 index 0000000..4064d14 --- /dev/null +++ b/support/scripts/winres.h @@ -0,0 +1,45 @@ +// This is a part of the Microsoft Foundation Classes C++ library. +// Copyright (C) Microsoft Corporation +// All rights reserved. +// +// This source code is only intended as a supplement to the +// Microsoft Foundation Classes Reference and related +// electronic documentation provided with the library. +// See these sources for detailed information regarding the +// Microsoft Foundation Classes product. + +// winres.h - Windows resource definitions +// extracted from WINUSER.H and COMMCTRL.H + +#ifdef _AFX_MINREBUILD +#pragma component(minrebuild, off) +#endif + +#define VS_VERSION_INFO 1 + +#ifdef APSTUDIO_INVOKED +#define APSTUDIO_HIDDEN_SYMBOLS // Ignore following symbols +#endif + +#ifndef WINVER +#define WINVER 0x0500 // default to Windows Version 4.0 +#endif + +#include + +// operation messages sent to DLGINIT +#define LB_ADDSTRING (WM_USER+1) +#define CB_ADDSTRING (WM_USER+3) + +#ifdef APSTUDIO_INVOKED +#undef APSTUDIO_HIDDEN_SYMBOLS +#endif + +#ifdef IDC_STATIC +#undef IDC_STATIC +#endif +#define IDC_STATIC (-1) + +#ifdef _AFX_MINREBUILD +#pragma component(minrebuild, on) +#endif diff --git a/support/tests/dhrystone/Makefile b/support/tests/dhrystone/Makefile new file mode 100644 index 0000000..62d194f --- /dev/null +++ b/support/tests/dhrystone/Makefile @@ -0,0 +1,30 @@ +# Simple Makefile for dhrystone and sdcc +TOPDIR = ../../.. + +PROC = z80 + +CC = $(TOPDIR)/bin/sdcc + +# -DNOENUM is here to make the results more predictable +CFLAGS += -DREG= -DNOSTRUCTASSIGN -DNOENUM -V -m$(PROC) --profile --dumpall --stack-auto + +OBJ = dhry.o + +all: dhry.bin + +dhry.ihx: dhry.c + $(CC) $(CFLAGS) dhry.c + +dhry.gb: dhry.c + $(CC) $(CFLAGS) dhry.c + +dhry.c: dhry.h + +dhry.bin: dhry.ihx + cat $< | $(TOPDIR)/bin/makebin > $@ + +native: + gcc -g -O2 -DREG= -DNOSTRUCTASSIGN -DNOENUM -o dhry dhry.c + +clean: + rm -f *~ dhry *.o *.gb *.ihx *.rel *.dump* *.lst *.sym *.map *.asm *.bin *.gb diff --git a/support/tests/dhrystone/dhry.c b/support/tests/dhrystone/dhry.c new file mode 100644 index 0000000..ad11ff8 --- /dev/null +++ b/support/tests/dhrystone/dhry.c @@ -0,0 +1,589 @@ +/** Sanatised version of the dhrystone-2.1 test. + + Modifications Michael Hope + + This is derrived from the dhrystone-2.1.tar.gz tarball available + all over the net. I sourced it from the Red Hat src rpm. + + Modifications: + * Made it more ANSI compliant. + * Changed any array function arguments to pointers to make my + compiler work. + * Removed malloc's for a couple of static arrays. + * Into one file. + * Proc_8 is a bit messy. It originally took a 2 dim array, but + sdcc doesnt support this. So the offsets are hard coded... + + Notes: + * The comment at the start of Func_1 about the input being + H, R on the first call is wrong - Func_1 is first called + from Func_2 where the input is R, Y. The test still succeeds. + + References: + * http://www.netlib.org/performance/html/dhry.intro.html + * http://www.netlib.org/performance/html/dhry.data.col0.html + + I couldnt find a copyright in the original - the most relevent + part follows: + + A SPECIAL THANKS + I didn't write the DHRYSTONE benchmark. Rheinhold Weicker did. He has + certainly provided us with a useful tool for benchmarking, and is + to be congratulated. + + Rick Richardson + PC Research, Inc. + (201) 389-8963 (9-17 EST) + (201) 542-3734 (7-9,17-24 EST) + ...!uunet!pcrat!rick (normal mail) + ...!uunet!pcrat!dry2 (results only) +*/ + +#define NOENUM 1 +#define NOSTRUCTASSIGN 1 +#define REG + +#include "dhry.h" +#include +/** For printf */ +#include + +#if defined(SDCC_ds390) +#include +#define clock() ClockTicks() +#define CLOCKS_PER_SEC 1000 +#define memcpy(d,s,l) memcpyx(d,s,l) + +# if defined(SDCC_ds400) +# include +# endif + +#elif defined(__z80) || defined(__gbz80) +unsigned int _clock(void); + +#define clock _clock +#define CLOCKS_PER_SEC 100 + +#else +/** For clock() */ +#include +#include +#endif + +/** Set to one to print more messages about expected values etc. + */ +#define DEBUG 0 + +#if DEBUG +#define DPRINTF(_a) printf _a +#else +#define DPRINTF(_a) +#endif + +Rec_Pointer Ptr_Glob, + Next_Ptr_Glob; +int Int_Glob; +Boolean Bool_Glob; +char Ch_1_Glob, + Ch_2_Glob; +int Arr_1_Glob [50]; +int Arr_2_Glob [50] [50]; + +/* Used instead of malloc() */ +static Rec_Type _r[2]; + +void mark(void) +{ +} + +void Proc_1 (REG Rec_Pointer Ptr_Val_Par); +void Proc_2 (One_Fifty *Int_Par_Ref); +void Proc_5 (void); +void Proc_4 (void); +void Proc_7 (One_Fifty Int_1_Par_Val, One_Fifty Int_2_Par_Val, One_Fifty *Int_Par_Ref); +void Proc_8 (int *Arr_1_Par_Ref, int *Arr_2_Par_Ref, + int Int_1_Par_Val, int Int_2_Par_Val); +void Proc_6 (Enumeration Enum_Val_Par, Enumeration *Enum_Ref_Par); +void Proc_3 (Rec_Pointer *Ptr_Ref_Par); +Enumeration Func_1 (Capital_Letter Ch_1_Par_Val, Capital_Letter Ch_2_Par_Val); +Boolean Func_2 (char *Str_1_Par_Ref, char *Str_2_Par_Ref); +Boolean Func_3 (Enumeration Enum_Par_Val); + +unsigned getsp(void); + +void main(void) +{ + One_Fifty Int_1_Loc; + REG One_Fifty Int_2_Loc; + One_Fifty Int_3_Loc; + REG Capital_Letter Ch_Index; + Enumeration Enum_Loc; + Str_30 Str_1_Loc; + Str_30 Str_2_Loc; + REG int Run_Index; + REG int Number_Of_Runs; + unsigned long runTime; + +#if defined(SDCC_ds400) + // Intialize the ROM. + if (romInit(1, SPEED_2X)) + { + // We're hosed. romInit will have printed an error, nothing more to do. + return; + } +#endif + + printf("[dhry]\n"); + + Next_Ptr_Glob = &_r[0]; + Ptr_Glob = &_r[1]; + + Ptr_Glob->Ptr_Comp = Next_Ptr_Glob; + Ptr_Glob->Discr = Ident_1; + Ptr_Glob->variant.var_1.Enum_Comp = Ident_3; + Ptr_Glob->variant.var_1.Int_Comp = 40; + + strcpy(Ptr_Glob->variant.var_1.Str_Comp, + "DHRYSTONE PROGRAM, SOME STRING"); + strcpy (Str_1_Loc, "DHRYSTONE PROGRAM, 1'ST STRING"); + + Arr_2_Glob [8][7] = 10; + + /* Was missing in published program. Without this statement, */ + /* Arr_2_Glob [8][7] would have an undefined value. */ + /* Warning: With 16-Bit processors and Number_Of_Runs > 32000, */ + /* overflow may occur for this array element. */ + + /* 32766 is the highest value for a 16 bitter */ +#if DEBUG + Number_Of_Runs = 1; +#else +#if defined(SDCC_ds400) + Number_Of_Runs = 10240; +#else + Number_Of_Runs = 32766; +#endif +#endif + + runTime = clock(); + + /* Main test loop */ + for (Run_Index = 1; Run_Index <= Number_Of_Runs; ++Run_Index) { + DPRINTF(("Run_Index = %d\n", Run_Index)); + if (!(Run_Index & 1023)) + printf("Loops: %u\r\n", Run_Index); + Proc_5(); + Proc_4(); + /* Ch_1_Glob == 'A', Ch_2_Glob == 'B', Bool_Glob == true */ + DPRINTF(("Ch_1_Glob '%c' == 'A', Ch_2_Glob '%c' == 'B', Bool_Glob %d == 1\n", Ch_1_Glob, Ch_2_Glob, Bool_Glob)); + + Int_1_Loc = 2; + Int_2_Loc = 3; + strcpy (Str_2_Loc, "DHRYSTONE PROGRAM, 2'ND STRING"); + Enum_Loc = Ident_2; + Bool_Glob = ! Func_2 (Str_1_Loc, Str_2_Loc); + /* Bool_Glob == 1 */ + DPRINTF(("Bool_Glob %d == 1, Int_1_Loc %d == 2, Int_2_Loc %d == 3\n", Bool_Glob, Int_1_Loc, Int_2_Loc)); + while (Int_1_Loc < Int_2_Loc) /* loop body executed once */ + { + DPRINTF(("m.1 Executes once.\n")); + Int_3_Loc = 5 * Int_1_Loc - Int_2_Loc; + /* Int_3_Loc == 7 */ + DPRINTF(("Int_3_Loc %d == 7\n", Int_3_Loc)); + DPRINTF(("Proc_7\n")); + Proc_7 (Int_1_Loc, Int_2_Loc, &Int_3_Loc); + /* Int_3_Loc == 7 */ + Int_1_Loc += 1; + } /* while */ + DPRINTF(("m.2 Check above executed once.\n")); + /* Int_1_Loc == 3, Int_2_Loc == 3, Int_3_Loc == 7 */ + DPRINTF(("Int_1_Loc %d == 3, Int_2_Loc %d == 3, Int_3_Loc %d == 7\n", + Int_1_Loc, Int_2_Loc, Int_3_Loc)); + + DPRINTF(("Proc_8\n")); + Proc_8 (Arr_1_Glob, (int *)Arr_2_Glob, Int_1_Loc, Int_3_Loc); + /* Int_Glob == 5 */ + DPRINTF(("Int_Glob %d == 5\n", Int_Glob)); + DPRINTF(("Proc_1\n")); + Proc_1 (Ptr_Glob); + for (Ch_Index = 'A'; Ch_Index <= Ch_2_Glob; ++Ch_Index) + /* loop body executed twice */ + { + DPRINTF(("Func_1\n")); + if (Enum_Loc == Func_1 (Ch_Index, 'C')) + /* then, not executed */ + { + DPRINTF(("Proc_6\n")); + Proc_6 (Ident_1, &Enum_Loc); + strcpy (Str_2_Loc, "DHRYSTONE PROGRAM, 3'RD STRING"); + Int_2_Loc = Run_Index; + Int_Glob = Run_Index; + } + } + /* Int_1_Loc == 3, Int_2_Loc == 3, Int_3_Loc == 7 */ + DPRINTF(("Int_1_Loc %d == 3, Int_2_Loc %d == 3, Int_3_Loc %d == 7\n", + Int_1_Loc, Int_2_Loc, Int_3_Loc)); + + Int_2_Loc = Int_2_Loc * Int_1_Loc; /* i2 = 3 * 3 = 9 */ + Int_1_Loc = Int_2_Loc / Int_3_Loc; /* i1 = 9 / 7 = 1 */ + Int_2_Loc = 7 * (Int_2_Loc - Int_3_Loc) - Int_1_Loc; /* i2 = 7 * (9 - 7) - 1 */ + /* Int_1_Loc == 1, Int_2_Loc == 13, Int_3_Loc == 7 */ + DPRINTF(("Int_1_Loc %d == 1, Int_2_Loc %d == 13, Int_3_Loc %d == 7\n", + Int_1_Loc, Int_2_Loc, Int_3_Loc)); + DPRINTF(("Proc_2\n")); + Proc_2 (&Int_1_Loc); + /* Int_1_Loc == 5 */ + DPRINTF(("Int_1_Loc %d == 5\n", Int_1_Loc)); + DPRINTF(("Looping.\n")); + } /* loop "for Run_Index" */ + + printf("Run_Index = %d\n", Run_Index); + + runTime = clock() - runTime; + +#if 1 + printf ("Execution ends\n"); + printf ("\n"); + printf ("Final values of the variables used in the benchmark:\n"); + printf ("\n"); + printf ("Int_Glob: %d\n", Int_Glob); + printf (" should be: %d\n", (int)5); + printf ("Bool_Glob: %d\n", Bool_Glob); + printf (" should be: %d\n", (int)1); + printf ("Ch_1_Glob: %c\n", Ch_1_Glob); + printf (" should be: %c\n", 'A'); + printf ("Ch_2_Glob: %c\n", Ch_2_Glob); + printf (" should be: %c\n", 'B'); + printf ("Arr_1_Glob[8]: %d\n", Arr_1_Glob[8]); + printf (" should be: %d\n", (int)7); +#if 1 + printf ("Arr_2_Glob[8][7]: %d\n", Arr_2_Glob[8][7]); +#endif + printf (" should be: Number_Of_Runs + 10\n"); + printf ("Ptr_Glob->\n"); + printf (" Ptr_Comp: %d\n", (int) Ptr_Glob->Ptr_Comp); + printf (" should be: (implementation-dependent)\n"); + printf (" Discr: %d\n", (int)Ptr_Glob->Discr); + printf (" should be: %d\n", (int)0); + printf (" Enum_Comp: %d\n", (int)Ptr_Glob->variant.var_1.Enum_Comp); + printf (" should be: %d\n", (int)2); + printf (" Int_Comp: %d\n", (int)Ptr_Glob->variant.var_1.Int_Comp); + printf (" should be: %d\n", (int)17); + printf (" Str_Comp: %s\n", (char *)Ptr_Glob->variant.var_1.Str_Comp); + printf (" should be: DHRYSTONE PROGRAM, SOME STRING\n"); + printf ("Next_Ptr_Glob->\n"); + printf (" Ptr_Comp: %d\n", (int) Next_Ptr_Glob->Ptr_Comp); + printf (" should be: (implementation-dependent), same as above\n"); + printf (" Discr: %d\n", Next_Ptr_Glob->Discr); + printf (" should be: %d\n", (int)0); + printf (" Enum_Comp: %d\n", Next_Ptr_Glob->variant.var_1.Enum_Comp); + printf (" should be: %d\n", (int)1); + printf (" Int_Comp: %d\n", Next_Ptr_Glob->variant.var_1.Int_Comp); + printf (" should be: %d\n", (int)18); + printf (" Str_Comp: %s\n", + Next_Ptr_Glob->variant.var_1.Str_Comp); + printf (" should be: DHRYSTONE PROGRAM, SOME STRING\n"); + printf ("Int_1_Loc: %d\n", Int_1_Loc); + printf (" should be: %d\n", (int)5); + printf ("Int_2_Loc: %d\n", Int_2_Loc); + printf (" should be: %d\n", (int)13); + printf ("Int_3_Loc: %d\n", Int_3_Loc); + printf (" should be: %d\n", (int)7); + printf ("Enum_Loc: %d\n", Enum_Loc); + printf (" should be: %d\n", (int)1); + printf ("Str_1_Loc: %s\n", (char *)Str_1_Loc); + printf (" should be: DHRYSTONE PROGRAM, 1'ST STRING\n"); + printf ("Str_2_Loc: %s\n", (char *)Str_2_Loc); + printf (" should be: DHRYSTONE PROGRAM, 2'ND STRING\n"); + printf ("\n"); +#endif +#if 1 + printf("Number of runs: %u. runTime: %u.\n", Number_Of_Runs, (unsigned)runTime); + mark(); + printf("Dhrystones/s = %u\n", (unsigned)((unsigned long)Number_Of_Runs / (runTime/CLOCKS_PER_SEC))); + printf("MIPS = d/s/1757 = (sigh, need floats...)\n"); +#endif +#ifdef PRINT_T_STATES + _printTStates(); +#endif +#if 1 + printf("Time: %lu ticks\n", runTime); +#endif +} + +void Proc_1 (REG Rec_Pointer Ptr_Val_Par) +/* executed once */ +{ + REG Rec_Pointer Next_Record = Ptr_Val_Par->Ptr_Comp; + /* == Ptr_Glob_Next */ + /* Local variable, initialized with Ptr_Val_Par->Ptr_Comp, */ + /* corresponds to "rename" in Ada, "with" in Pascal */ + +#if !defined(SDCC_ds390) + structassign (*Ptr_Val_Par->Ptr_Comp, *Ptr_Glob); +#else + /* I have no idea why this is necessary... */ + memcpyx((void xdata *)*Ptr_Val_Par->Ptr_Comp, (void xdata *)*Ptr_Glob, + sizeof(Rec_Type)); +#endif + Ptr_Val_Par->variant.var_1.Int_Comp = 5; + Next_Record->variant.var_1.Int_Comp + = Ptr_Val_Par->variant.var_1.Int_Comp; + Next_Record->Ptr_Comp = Ptr_Val_Par->Ptr_Comp; + Proc_3 (&Next_Record->Ptr_Comp); + /* Ptr_Val_Par->Ptr_Comp->Ptr_Comp + == Ptr_Glob->Ptr_Comp */ + if (Next_Record->Discr == Ident_1) + /* then, executed */ + { + Next_Record->variant.var_1.Int_Comp = 6; + Proc_6 (Ptr_Val_Par->variant.var_1.Enum_Comp, + &Next_Record->variant.var_1.Enum_Comp); + Next_Record->Ptr_Comp = Ptr_Glob->Ptr_Comp; + Proc_7 (Next_Record->variant.var_1.Int_Comp, 10, + &Next_Record->variant.var_1.Int_Comp); + } + else /* not executed */ + structassign (*Ptr_Val_Par, *Ptr_Val_Par->Ptr_Comp); +} /* Proc_1 */ + + +void Proc_2 (One_Fifty *Int_Par_Ref) + /******************/ + /* executed once */ + /* *Int_Par_Ref == 1, becomes 4 */ +{ + One_Fifty Int_Loc; + Enumeration Enum_Loc; + + DPRINTF(("-> Proc_2\n")); + + Int_Loc = *Int_Par_Ref + 10; + do { + DPRINTF(("1")); + /* executed once */ + if (Ch_1_Glob == 'A') + /* then, executed */ + { + DPRINTF(("2")); + Int_Loc -= 1; + *Int_Par_Ref = Int_Loc - Int_Glob; + Enum_Loc = Ident_1; + } /* if */ + DPRINTF(("3")); + } while (Enum_Loc != Ident_1); /* true */ + DPRINTF(("Proc_2 done.\n")); +} /* Proc_2 */ + + +void Proc_3 (Rec_Pointer *Ptr_Ref_Par) + /******************/ + /* executed once */ + /* Ptr_Ref_Par becomes Ptr_Glob */ +{ + if (Ptr_Glob != Null) + /* then, executed */ + *Ptr_Ref_Par = Ptr_Glob->Ptr_Comp; + Proc_7 (10, Int_Glob, &Ptr_Glob->variant.var_1.Int_Comp); +} /* Proc_3 */ + +void Proc_4 (void) /* without parameters */ + /*******/ + /* executed once */ +{ + Boolean Bool_Loc; + + DPRINTF(("-> Proc_4\n")); + Bool_Loc = Ch_1_Glob == 'A'; + Bool_Glob = Bool_Loc | Bool_Glob; + Ch_2_Glob = 'B'; + DPRINTF(("Expect Ch_1_Glob '%c' == 'A'\n", (char)Ch_1_Glob)); + DPRINTF((" Ch_2_Glob '%c' == 'B'\n", (char)Ch_2_Glob)); + DPRINTF((" Bool_Loc %d == 1\n", (unsigned)Bool_Loc)); + DPRINTF((" Bool_Glob %d == 1\n", (unsigned)Bool_Glob)); +} /* Proc_4 */ + + +void Proc_5 () /* without parameters */ + /*******/ + /* executed once */ +{ + Ch_1_Glob = 'A'; + Bool_Glob = false; +} /* Proc_5 */ + +void Proc_6 (Enumeration Enum_Val_Par, Enumeration *Enum_Ref_Par) + /*********************************/ + /* executed once */ + /* Enum_Val_Par == Ident_3, Enum_Ref_Par becomes Ident_2 */ + +{ + *Enum_Ref_Par = Enum_Val_Par; + if (! Func_3 (Enum_Val_Par)) + /* then, not executed */ + *Enum_Ref_Par = Ident_4; + switch (Enum_Val_Par) + { + case Ident_1: + *Enum_Ref_Par = Ident_1; + break; + case Ident_2: + if (Int_Glob > 100) + /* then */ + *Enum_Ref_Par = Ident_1; + else *Enum_Ref_Par = Ident_4; + break; + case Ident_3: /* executed */ + *Enum_Ref_Par = Ident_2; + break; + case Ident_4: break; + case Ident_5: + *Enum_Ref_Par = Ident_3; + break; + } /* switch */ +} /* Proc_6 */ + + +/*************************************************/ +/* executed three times */ +/* first call: Ch_1_Par_Val == 'H', Ch_2_Par_Val == 'R' */ +/* second call: Ch_1_Par_Val == 'A', Ch_2_Par_Val == 'C' */ +/* third call: Ch_1_Par_Val == 'B', Ch_2_Par_Val == 'C' */ +Enumeration Func_1 (Capital_Letter Ch_1_Par_Val, Capital_Letter Ch_2_Par_Val) +{ + Capital_Letter Ch_1_Loc; + Capital_Letter Ch_2_Loc; + + DPRINTF(("-> Func_1\n")); + DPRINTF((" Inputs: Ch_1_Par_Val '%c' == { R, A, B }\n", (char)Ch_1_Par_Val)); + DPRINTF((" Ch_2_Par_Val '%c' == { Y, C, C }\n", (char)Ch_2_Par_Val)); + + Ch_1_Loc = Ch_1_Par_Val; + Ch_2_Loc = Ch_1_Loc; + if (Ch_2_Loc != Ch_2_Par_Val) { + /* then, executed */ + return (Ident_1); + } + else /* not executed */ + { + Ch_1_Glob = Ch_1_Loc; + return (Ident_2); + } +} /* Func_1 */ + +Boolean Func_3 (Enumeration Enum_Par_Val) + /***************************/ + /* executed once */ + /* Enum_Par_Val == Ident_3 */ +{ + Enumeration Enum_Loc; + + Enum_Loc = Enum_Par_Val; + if (Enum_Loc == Ident_3) + /* then, executed */ + return (true); + else /* not executed */ + return (false); +} /* Func_3 */ + +void Proc_7 (One_Fifty Int_1_Par_Val, One_Fifty Int_2_Par_Val, One_Fifty *Int_Par_Ref) + /**********************************************/ + /* executed three times */ + /* first call: Int_1_Par_Val == 2, Int_2_Par_Val == 3, */ + /* Int_Par_Ref becomes 7 */ + /* second call: Int_1_Par_Val == 10, Int_2_Par_Val == 5, */ + /* Int_Par_Ref becomes 17 */ + /* third call: Int_1_Par_Val == 6, Int_2_Par_Val == 10, */ + /* Int_Par_Ref becomes 18 */ +{ + One_Fifty Int_Loc; + + Int_Loc = Int_1_Par_Val + 2; + *Int_Par_Ref = Int_2_Par_Val + Int_Loc; +} /* Proc_7 */ + +/*void Proc_8 (Arr_1_Dim Arr_1_Par_Ref, Arr_2_Dim Arr_2_Par_Ref, + int Int_1_Par_Val, int Int_2_Par_Val)*/ +void Proc_8 (int *Arr_1_Par_Ref, int *Arr_2_Par_Ref, + int Int_1_Par_Val, int Int_2_Par_Val) +{ + REG One_Fifty Int_Index; + REG One_Fifty Int_Loc; + + DPRINTF(("-> Proc_8\n")); + Int_Loc = Int_1_Par_Val + 5; + Arr_1_Par_Ref [Int_Loc] = Int_2_Par_Val; + DPRINTF(("Int_Loc %d == 8 Int_2_Par_Val %d == 7\n", Int_Loc, Int_2_Par_Val)); + + Arr_1_Par_Ref [Int_Loc+1] = Arr_1_Par_Ref [Int_Loc]; + Arr_1_Par_Ref [Int_Loc+30] = Int_Loc; + for (Int_Index = Int_Loc; Int_Index <= Int_Loc+1; ++Int_Index) + Arr_2_Par_Ref [Int_Loc*50 + Int_Index] = Int_Loc; + Arr_2_Par_Ref [Int_Loc * 50 + Int_Loc-1] += 1; + Arr_2_Par_Ref [(Int_Loc+20 *50) + Int_Loc] = Arr_1_Par_Ref [Int_Loc]; + Int_Glob = 5; + DPRINTF(("Arr_1_Glob[8] %d == 7\n", Arr_1_Par_Ref[8])); +} + +/*********************************************************************/ +/* executed once */ +/* Int_Par_Val_1 == 3 */ +/* Int_Par_Val_2 == 7 */ +Boolean Func_2 (char *Str_1_Par_Ref, char *Str_2_Par_Ref) + /*************************************************/ + /* executed once */ + /* Str_1_Par_Ref == "DHRYSTONE PROGRAM, 1'ST STRING" */ + /* Str_2_Par_Ref == "DHRYSTONE PROGRAM, 2'ND STRING" */ +{ + REG One_Thirty Int_Loc; + Capital_Letter Ch_Loc; + + DPRINTF(("-> Func_2\n")); + DPRINTF((" Inputs Str_1_Par_Ref \"%s\" = \"DHRYSTONE PROGRAM, 1'ST STRING\"\n", Str_1_Par_Ref)); + DPRINTF((" Str_2_Par_Ref \"%s\" = \"DHRYSTONE PROGRAM, 2'ND STRING\"\n", Str_2_Par_Ref)); + + Int_Loc = 2; + + while (Int_Loc <= 2) { + if (Func_1 (Str_1_Par_Ref[Int_Loc], + Str_2_Par_Ref[Int_Loc+1]) == Ident_1) + /* then, executed */ + { + DPRINTF((" 2.3 Then OK.\n")); + Ch_Loc = 'A'; + Int_Loc += 1; + } /* if, while */ + else { + DPRINTF((" 2.2 Error.\n")); + } + } + if (Ch_Loc >= 'W' && Ch_Loc < 'Z') { + /* then, not executed */ + DPRINTF((" 2.4 Error\n")); + Int_Loc = 7; + } + if (Ch_Loc == 'R') { + /* then, not executed */ + DPRINTF((" 2.5 Error\n")); + return (true); + } + else /* executed */ + { + DPRINTF(("Str_1_Par_Ref = \"%s\", Str_2_Par_Ref = \"%s\"\n", + Str_1_Par_Ref, Str_2_Par_Ref)); + if (strcmp (Str_1_Par_Ref, Str_2_Par_Ref) > 0) + /* then, not executed */ + { + DPRINTF((" 2.5 Error diff=%d\n", strcmp(Str_1_Par_Ref, Str_2_Par_Ref))); + Int_Loc += 7; + Int_Glob = Int_Loc; + return (true); + } + else { + /* executed */ + DPRINTF((" 2.6 OK\n")); + return (false); + } + } /* if Ch_Loc */ +} /* Func_2 */ + diff --git a/support/tests/dhrystone/dhry.h b/support/tests/dhrystone/dhry.h new file mode 100644 index 0000000..81477aa --- /dev/null +++ b/support/tests/dhrystone/dhry.h @@ -0,0 +1,436 @@ +/* + **************************************************************************** + * + * "DHRYSTONE" Benchmark Program + * ----------------------------- + * + * Version: C, Version 2.1 + * + * File: dhry.h (part 1 of 3) + * + * Date: May 17, 1988 + * + * Author: Reinhold P. Weicker + * Siemens AG, E STE 35 + * Postfach 3240 + * 8520 Erlangen + * Germany (West) + * Phone: [xxx-49]-9131-7-20330 + * (8-17 Central European Time) + * Usenet: ..!mcvax!unido!estevax!weicker + * + * Original Version (in Ada) published in + * "Communications of the ACM" vol. 27., no. 10 (Oct. 1984), + * pp. 1013 - 1030, together with the statistics + * on which the distribution of statements etc. is based. + * + * In this C version, the following C library functions are used: + * - strcpy, strcmp (inside the measurement loop) + * - printf, scanf (outside the measurement loop) + * In addition, Berkeley UNIX system calls "times ()" or "time ()" + * are used for execution time measurement. For measurements + * on other systems, these calls have to be changed. + * + * Collection of Results: + * Reinhold Weicker (address see above) and + * + * Rick Richardson + * PC Research. Inc. + * 94 Apple Orchard Drive + * Tinton Falls, NJ 07724 + * Phone: (201) 389-8963 (9-17 EST) + * Usenet: ...!uunet!pcrat!rick + * + * Please send results to Rick Richardson and/or Reinhold Weicker. + * Complete information should be given on hardware and software used. + * Hardware information includes: Machine type, CPU, type and size + * of caches; for microprocessors: clock frequency, memory speed + * (number of wait states). + * Software information includes: Compiler (and runtime library) + * manufacturer and version, compilation switches, OS version. + * The Operating System version may give an indication about the + * compiler; Dhrystone itself performs no OS calls in the measurement loop. + * + * The complete output generated by the program should be mailed + * such that at least some checks for correctness can be made. + * + *************************************************************************** + * + * History: This version C/2.1 has been made for two reasons: + * + * 1) There is an obvious need for a common C version of + * Dhrystone, since C is at present the most popular system + * programming language for the class of processors + * (microcomputers, minicomputers) where Dhrystone is used most. + * There should be, as far as possible, only one C version of + * Dhrystone such that results can be compared without + * restrictions. In the past, the C versions distributed + * by Rick Richardson (Version 1.1) and by Reinhold Weicker + * had small (though not significant) differences. + * + * 2) As far as it is possible without changes to the Dhrystone + * statistics, optimizing compilers should be prevented from + * removing significant statements. + * + * This C version has been developed in cooperation with + * Rick Richardson (Tinton Falls, NJ), it incorporates many + * ideas from the "Version 1.1" distributed previously by + * him over the UNIX network Usenet. + * I also thank Chaim Benedelac (National Semiconductor), + * David Ditzel (SUN), Earl Killian and John Mashey (MIPS), + * Alan Smith and Rafael Saavedra-Barrera (UC at Berkeley) + * for their help with comments on earlier versions of the + * benchmark. + * + * Changes: In the initialization part, this version follows mostly + * Rick Richardson's version distributed via Usenet, not the + * version distributed earlier via floppy disk by Reinhold Weicker. + * As a concession to older compilers, names have been made + * unique within the first 8 characters. + * Inside the measurement loop, this version follows the + * version previously distributed by Reinhold Weicker. + * + * At several places in the benchmark, code has been added, + * but within the measurement loop only in branches that + * are not executed. The intention is that optimizing compilers + * should be prevented from moving code out of the measurement + * loop, or from removing code altogether. Since the statements + * that are executed within the measurement loop have NOT been + * changed, the numbers defining the "Dhrystone distribution" + * (distribution of statements, operand types and locality) + * still hold. Except for sophisticated optimizing compilers, + * execution times for this version should be the same as + * for previous versions. + * + * Since it has proven difficult to subtract the time for the + * measurement loop overhead in a correct way, the loop check + * has been made a part of the benchmark. This does have + * an impact - though a very minor one - on the distribution + * statistics which have been updated for this version. + * + * All changes within the measurement loop are described + * and discussed in the companion paper "Rationale for + * Dhrystone version 2". + * + * Because of the self-imposed limitation that the order and + * distribution of the executed statements should not be + * changed, there are still cases where optimizing compilers + * may not generate code for some statements. To a certain + * degree, this is unavoidable for small synthetic benchmarks. + * Users of the benchmark are advised to check code listings + * whether code is generated for all statements of Dhrystone. + * + * Version 2.1 is identical to version 2.0 distributed via + * the UNIX network Usenet in March 1988 except that it corrects + * some minor deficiencies that were found by users of version 2.0. + * The following corrections have been made in the C version: + * - The assignment to Number_Of_Runs was changed + * - The constant Too_Small_Time was changed + * - An "else" part was added to the "if" statement in Func_3; + * for compensation, an "else" part was removed in Proc_3 + * - Shorter file names are used + * + *************************************************************************** + * + * Defines: The following "Defines" are possible: + * -DREG=register (default: Not defined) + * As an approximation to what an average C programmer + * might do, the "register" storage class is applied + * (if enabled by -DREG=register) + * - for local variables, if they are used (dynamically) + * five or more times + * - for parameters if they are used (dynamically) + * six or more times + * Note that an optimal "register" strategy is + * compiler-dependent, and that "register" declarations + * do not necessarily lead to faster execution. + * -DNOSTRUCTASSIGN (default: Not defined) + * Define if the C compiler does not support + * assignment of structures. + * -DNOENUMS (default: Not defined) + * Define if the C compiler does not support + * enumeration types. + * -DTIMES (default) + * -DTIME + * The "times" function of UNIX (returning process times) + * or the "time" function (returning wallclock time) + * is used for measurement. + * For single user machines, "time ()" is adequate. For + * multi-user machines where you cannot get single-user + * access, use the "times ()" function. If you have + * neither, use a stopwatch in the dead of night. + * "printf"s are provided marking the points "Start Timer" + * and "Stop Timer". DO NOT use the UNIX "time(1)" + * command, as this will measure the total time to + * run this program, which will (erroneously) include + * the time to allocate storage (malloc) and to perform + * the initialization. + * -DHZ=nnn + * In Berkeley UNIX, the function "times" returns process + * time in 1/HZ seconds, with HZ = 60 for most systems. + * CHECK YOUR SYSTEM DESCRIPTION BEFORE YOU JUST APPLY + * A VALUE. + * + *************************************************************************** + * + * Compilation model and measurement (IMPORTANT): + * + * This C version of Dhrystone consists of three files: + * - dhry.h (this file, containing global definitions and comments) + * - dhry_1.c (containing the code corresponding to Ada package Pack_1) + * - dhry_2.c (containing the code corresponding to Ada package Pack_2) + * + * The following "ground rules" apply for measurements: + * - Separate compilation + * - No procedure merging + * - Otherwise, compiler optimizations are allowed but should be indicated + * - Default results are those without register declarations + * See the companion paper "Rationale for Dhrystone Version 2" for a more + * detailed discussion of these ground rules. + * + * For 16-Bit processors (e.g. 80186, 80286), times for all compilation + * models ("small", "medium", "large" etc.) should be given if possible, + * together with a definition of these models for the compiler system used. + * + ************************************************************************** + * + * Dhrystone (C version) statistics: + * + * [Comment from the first distribution, updated for version 2. + * Note that because of language differences, the numbers are slightly + * different from the Ada version.] + * + * The following program contains statements of a high level programming + * language (here: C) in a distribution considered representative: + * + * assignments 52 (51.0 %) + * control statements 33 (32.4 %) + * procedure, function calls 17 (16.7 %) + * + * 103 statements are dynamically executed. The program is balanced with + * respect to the three aspects: + * + * - statement type + * - operand type + * - operand locality + * operand global, local, parameter, or constant. + * + * The combination of these three aspects is balanced only approximately. + * + * 1. Statement Type: + * ----------------- number + * + * V1 = V2 9 + * (incl. V1 = F(..) + * V = Constant 12 + * Assignment, 7 + * with array element + * Assignment, 6 + * with record component + * -- + * 34 34 + * + * X = Y +|-|"&&"|"|" Z 5 + * X = Y +|-|"==" Constant 6 + * X = X +|- 1 3 + * X = Y *|/ Z 2 + * X = Expression, 1 + * two operators + * X = Expression, 1 + * three operators + * -- + * 18 18 + * + * if .... 14 + * with "else" 7 + * without "else" 7 + * executed 3 + * not executed 4 + * for ... 7 | counted every time + * while ... 4 | the loop condition + * do ... while 1 | is evaluated + * switch ... 1 + * break 1 + * declaration with 1 + * initialization + * -- + * 34 34 + * + * P (...) procedure call 11 + * user procedure 10 + * library procedure 1 + * X = F (...) + * function call 6 + * user function 5 + * library function 1 + * -- + * 17 17 + * --- + * 103 + * + * The average number of parameters in procedure or function calls + * is 1.82 (not counting the function values as implicit parameters). + * + * + * 2. Operators + * ------------ + * number approximate + * percentage + * + * Arithmetic 32 50.8 + * + * + 21 33.3 + * - 7 11.1 + * * 3 4.8 + * / (int div) 1 1.6 + * + * Comparison 27 42.8 + * + * == 9 14.3 + * /= 4 6.3 + * > 1 1.6 + * < 3 4.8 + * >= 1 1.6 + * <= 9 14.3 + * + * Logic 4 6.3 + * + * && (AND-THEN) 1 1.6 + * | (OR) 1 1.6 + * ! (NOT) 2 3.2 + * + * -- ----- + * 63 100.1 + * + * + * 3. Operand Type (counted once per operand reference): + * --------------- + * number approximate + * percentage + * + * Integer 175 72.3 % + * Character 45 18.6 % + * Pointer 12 5.0 % + * String30 6 2.5 % + * Array 2 0.8 % + * Record 2 0.8 % + * --- ------- + * 242 100.0 % + * + * When there is an access path leading to the final operand (e.g. a record + * component), only the final data type on the access path is counted. + * + * + * 4. Operand Locality: + * ------------------- + * number approximate + * percentage + * + * local variable 114 47.1 % + * global variable 22 9.1 % + * parameter 45 18.6 % + * value 23 9.5 % + * reference 22 9.1 % + * function result 6 2.5 % + * constant 55 22.7 % + * --- ------- + * 242 100.0 % + * + * + * The program does not compute anything meaningful, but it is syntactically + * and semantically correct. All variables have a value assigned to them + * before they are used as a source operand. + * + * There has been no explicit effort to account for the effects of a + * cache, or to balance the use of long or short displacements for code or + * data. + * + *************************************************************************** + */ + +/* Compiler and system dependent definitions: */ + +#if !SDCC +#ifndef TIME +#ifndef TIMES +#define TIMES +#endif +#endif + /* Use times(2) time function unless */ + /* explicitly defined otherwise */ + +#ifdef MSC_CLOCK +#undef HZ +#undef TIMES +#include +#define HZ CLK_TCK +#endif + /* Use Microsoft C hi-res clock */ + +#ifdef TIMES +#include +#include + /* for "times" */ +#endif + +#define Mic_secs_Per_Second 1000000.0 + /* Berkeley UNIX C returns process times in seconds/HZ */ +#endif + +#ifdef NOSTRUCTASSIGN +#define structassign(d, s) memcpy(&(d), &(s), sizeof(d)) +#else +#define structassign(d, s) d = s +#endif + +#ifdef NOENUM +#define Ident_1 0 +#define Ident_2 1 +#define Ident_3 2 +#define Ident_4 3 +#define Ident_5 4 + typedef int Enumeration; +#else + typedef enum {Ident_1, Ident_2, Ident_3, Ident_4, Ident_5} + Enumeration; +#endif + /* for boolean and enumeration types in Ada, Pascal */ + +/* General definitions: */ + + +#define Null 0 + /* Value of a Null pointer */ +#define true 1 +#define false 0 + +typedef int One_Thirty; +typedef int One_Fifty; +typedef char Capital_Letter; +typedef int Boolean; +typedef char Str_30 [31]; +typedef int Arr_1_Dim [50]; +typedef int Arr_2_Dim [50] [50]; + +typedef struct record +{ + struct record *Ptr_Comp; + Enumeration Discr; + union { + struct { + Enumeration Enum_Comp; + int Int_Comp; + char Str_Comp [31]; + } var_1; + struct { + Enumeration E_Comp_2; + char Str_2_Comp [31]; + } var_2; + struct { + char Ch_1_Comp; + char Ch_2_Comp; + } var_3; + } variant; +} Rec_Type, *Rec_Pointer; + + diff --git a/support/tests/dhrystone/tini.mak b/support/tests/dhrystone/tini.mak new file mode 100644 index 0000000..2a7eee0 --- /dev/null +++ b/support/tests/dhrystone/tini.mak @@ -0,0 +1,21 @@ +CC = sdcc + +MFLAGS = -mds390 --model-flat24 --stack-10bit +MFLAGS += -DREG= -DNOSTRUCTASSIGN -DNOENUM +LFLAGS = --xram-loc 0x100080 --code-loc 0x10000 -Wl-r + +OBJECTS = dhry.rel + +all: dhry.hex + +clean: + rm -f *~ \#* *.asm *.cdb *.rel *.hex *.ihx *.lst *.map *.rst *.sym *.lnk + +dhry.hex: dhry.ihx + packihx dhry.ihx >dhry.hex + +dhry.ihx: $(OBJECTS) + $(CC) $(MFLAGS) $(LFLAGS) $(OBJECTS) + +%.rel: %.c + $(CC) -c $(MFLAGS) $< diff --git a/support/tests/dhrystone/tini400.mak b/support/tests/dhrystone/tini400.mak new file mode 100644 index 0000000..47ba4a4 --- /dev/null +++ b/support/tests/dhrystone/tini400.mak @@ -0,0 +1,21 @@ +CC = ../../../bin/sdcc + +MFLAGS = -mds400 --model-flat24 --stack-10bit +MFLAGS += -DREG= -DNOSTRUCTASSIGN -DNOENUM +LFLAGS = --xram-loc 0x10000 --code-loc 0x400000 -Wl-r + +OBJECTS = dhry.rel + +all: dhry.hex + +clean: + rm -f *~ \#* *.asm *.cdb *.rel *.hex *.ihx *.lst *.map *.rst *.sym *.lnk + +dhry.hex: dhry.ihx + packihx dhry.ihx >dhry.hex + +dhry.ihx: $(OBJECTS) + $(CC) $(MFLAGS) $(LFLAGS) $(OBJECTS) + +%.rel: %.c + $(CC) -c $(MFLAGS) $< diff --git a/support/tests/internal/Makefile b/support/tests/internal/Makefile new file mode 100644 index 0000000..eb60e7e --- /dev/null +++ b/support/tests/internal/Makefile @@ -0,0 +1,21 @@ +TOPDIR = ../../.. + +LIBSOURCE = \ + $(TOPDIR)/src/SDCCutil.c \ + $(TOPDIR)/src/SDCChasht.c \ + $(TOPDIR)/support/Util/NewAlloc.c \ + $(TOPDIR)/support/Util/SDCCerr.c \ + $(TOPDIR)/src/SDCCmacro.c \ + stubs.c + +SOURCES = testpaths.c $(LIBSOURCE) + +include $(TOPDIR)/Makefile.common + +CFLAGS += -I$(TOPDIR)/src -I$(TOPDIR)/support/Util -I$(TOPDIR) + +all: all-tests + +all-tests: $(OBJ) + $(CC) -o $@ $(OBJ) + diff --git a/support/tests/internal/stubs.c b/support/tests/internal/stubs.c new file mode 100644 index 0000000..ee5e809 --- /dev/null +++ b/support/tests/internal/stubs.c @@ -0,0 +1,5 @@ +int fatalError; +int lineno; +char *filename = "tests"; +char buffer[4096]; +char scratchFileName[4096]; diff --git a/support/tests/internal/testmacro.c b/support/tests/internal/testmacro.c new file mode 100644 index 0000000..d25eecf --- /dev/null +++ b/support/tests/internal/testmacro.c @@ -0,0 +1,84 @@ +#include +#include + +static const char *_maps[] = + { + "immedzero", "#0", + "immedvala", "#0x%02X", + "stra", "%s", + "port", "z80", + "stdlibpath", "{basepath}/lib/{port}", + "stdlibname", "{port}.lib", + "portouttypeflag", "-i", + "srcfilename", "fish", + "portoutext", ".ihx", + "crt0name", "{stdlibpath}/crt0{portobjext}", + "portobjext", ".o", + "otherobjfiles", "none", + "basepath", "/home/michaelh/sdcc", + NULL + }; + +static hTab * +_populateHash(const char **pin) +{ + hTab *pret = NULL; + + while (*pin) + { + printf("Adding %s -> %s\n", pin[0], pin[1]); + shash_add (&pret, pin[0], pin[1]); + pin += 2; + + } + + return pret; +} + +static void +_testEval(hTab *ph, const char *pin, const char *pexpect, ...) +{ + va_list ap; + char *pgot; + + va_start(ap, pexpect); + + pgot = mvsprintf(ph, pin, ap); + + if (strcmp(pgot, pexpect) != 0) + { + printf("Fail: expected: %s, got %s\n", pexpect, pgot); + } + else + { + printf("%s -> %s\n", pin, pgot); + } + + va_end(ap); +} + +void +testMacros(void) +{ + hTab *ph = _populateHash(_maps); + + _testEval(ph, "{immedzero}", "#0"); + _testEval(ph, "{immedvala}", "#0x23", 0x23); + _testEval(ph, "{stra}", "#0", "{immedzero}"); + + printf("Link command:\n%s\n", + msprintf(ph, + "link-{port} -n -c -- -b_CODE=0x%04X -b_DATA=0x%04X" + " -m -j -k{stdlibpath} -l{stdlibname} {portouttypeflag}" + " {srcfilename}{portoutext} {crt0name} {srcfilename}{portobjext} {otherobjfiles}", + 0x1234, 0x3456)); + +} + +int +main(void) +{ + testMacros(); + + return 0; +} diff --git a/support/valdiag/Makefile.in b/support/valdiag/Makefile.in new file mode 100644 index 0000000..7b96549 --- /dev/null +++ b/support/valdiag/Makefile.in @@ -0,0 +1,53 @@ +.SILENT: + +VPATH = @srcdir@ +srcdir = @srcdir@ +top_srcdir = @top_srcdir@ +top_builddir = @top_builddir@ + +TESTS_DIR = $(srcdir)/tests +RESULTS_DIR = results +PORTS_DIR = $(srcdir)/ports +BUILD_DIR = gen +ALL_PORTS = host mcs51 mcs51-large mcs51-stack-auto ds390 z80 hc08 + +ALL_TESTS = $(shell find $(TESTS_DIR) -name "*.c") + +PORT_RESULTS_DIR = $(RESULTS_DIR)/$(PORT) +PORT_RESULTS = $(ALL_TESTS:$(TESTS_DIR)/%.c=$(PORT_RESULTS_DIR)/%.out) +PORT_BUILD_DIR = $(BUILD_DIR)/$(PORT) + +all: test-ports + +test-ports: + for i in $(ALL_PORTS); do $(MAKE) test-port PORT=$$i; done + +test-mcs51: + $(MAKE) test-port PORT=mcs51 + +test-port: port-results + +clean: clean-gen + rm -rf $(RESULTS_DIR) *.pyc + rm -rf $(BUILD_DIR) + +distclean: clean + rm -r Makefile + +clean-gen: + for i in $(ALL_PORTS); do $(MAKE) clean-port PORT=$$i; done + +clean-port: + rm -rf $(PORT_BUILD_DIR) + +$(PORT_RESULTS_DIR)/%.out: $(TESTS_DIR)/%.c + echo Processing $< + python $(srcdir)/valdiag.py $(PORT) $< $(PORT_BUILD_DIR)/$* > $@ + +port-results: port-dirs $(PORT_RESULTS) + echo Summary for \'$(PORT)\': `cat $(PORT_RESULTS) | \ + python $(srcdir)/../regression/collate-results.py` + +port-dirs: + mkdir -p $(PORT_RESULTS_DIR) + mkdir -p $(PORT_BUILD_DIR) diff --git a/support/valdiag/tests/bug-895992.c b/support/valdiag/tests/bug-895992.c new file mode 100644 index 0000000..24bf327 --- /dev/null +++ b/support/valdiag/tests/bug-895992.c @@ -0,0 +1,34 @@ + +/* bug-895992.c + + Life Range problem with + - uninitialized variable + - loop + - conditional block + */ + +#ifdef TEST1 +char p0; + +void wait (void); + +void foo(void) +{ + unsigned char number; + unsigned char start = 1; + unsigned char i; + + do + { + for (i = 1; i > 0 ; i--) + wait(); + if (start) + { + number = p0; + start = 0; + } + number--; /* WARNING(SDCC) */ + } + while (number != 0); +} +#endif diff --git a/support/valdiag/tests/bug-971834.c b/support/valdiag/tests/bug-971834.c new file mode 100644 index 0000000..310de8a --- /dev/null +++ b/support/valdiag/tests/bug-971834.c @@ -0,0 +1,49 @@ + +/* bug-971834.c + + Life Range problem with + - uninitialized variable + - loop + */ + +#ifdef TEST1 +unsigned char ttt = 2; + +short foo (void) +{ + unsigned short a; + a |= ttt; /* WARNING(SDCC) */ + return a; +} +#endif + + +#ifdef TEST2 +unsigned char ttt[] = {0xff, 1}; + +char foo (void) +{ + unsigned char a, i; + for (i = 0; i < sizeof(ttt); i++) + a |= ttt[i]; /* WARNING(SDCC) */ + return a; /* WARNING(SDCC) */ +} +#endif + +#ifdef TEST3 +unsigned char ttt[] = {0xff, 1}; +unsigned char b; + +char foo (void) +{ + unsigned char i, j; + unsigned char a; + for (j = 0; j < sizeof(ttt); j++) { + for (i = 0; i < sizeof(ttt); i++) { + a |= ttt[i]; /* WARNING(SDCC) */ + b = a; + } + } + return b; +} +#endif diff --git a/support/valdiag/tests/cflow.c b/support/valdiag/tests/cflow.c new file mode 100644 index 0000000..b584550 --- /dev/null +++ b/support/valdiag/tests/cflow.c @@ -0,0 +1,26 @@ + +int x; + +#ifdef TEST0 +void foo(void) +{ + while (1) ; +} +#endif + +#ifdef TEST1 +void foo(void) +{ + while (1) ; + x++; /* WARNING(SDCC) */ +} +#endif + +#ifdef TEST2 +void foo(void) +{ + int y=1; + while (y) ; /* WARNING(SDCC) */ + x++; /* WARNING(SDCC) */ +} +#endif diff --git a/support/valdiag/tests/const.c b/support/valdiag/tests/const.c new file mode 100644 index 0000000..5082081 --- /dev/null +++ b/support/valdiag/tests/const.c @@ -0,0 +1,21 @@ + +char a; +const char ca=2; +const char *pca; +char * const cpa=&a; + +void test(void) +{ + a = 1; +#ifdef TEST1 + ca = a; /* ERROR */ +#endif +#ifdef TEST2 + pca = &a; + *pca = 2; /* ERROR */ +#endif +#ifdef TEST3 + *cpa = 3; + cpa = &ca; /* ERROR */ +#endif +} diff --git a/support/valdiag/tests/constantRange.c b/support/valdiag/tests/constantRange.c new file mode 100644 index 0000000..620b2e6 --- /dev/null +++ b/support/valdiag/tests/constantRange.c @@ -0,0 +1,265 @@ +#include + +volatile int8_t c; + +/* sorry about the uggly source, + but this way it can be the same as in the regression tests */ +#define ASSERT(x) c = (x) + + int8_t s8; +uint8_t u8; + + int16_t s16; +uint16_t u16; + + int32_t s32; +uint32_t u32; + +#ifdef TEST1 +void foo(void) +{ + ASSERT (! (INT8_MIN - 1 == s8)); /* WARNING */ + ASSERT (! (INT8_MAX + 1 == s8)); /* WARNING */ + ASSERT ( (INT8_MIN - 1 != s8)); /* WARNING */ + ASSERT ( (INT8_MAX + 1 != s8)); /* WARNING */ + ASSERT ( (INT8_MIN - 1 < s8)); /* WARNING */ + ASSERT (! (INT8_MAX < s8)); /* WARNING */ + ASSERT ( (INT8_MIN <= s8)); /* WARNING */ + ASSERT (! (INT8_MAX + 1 <= s8)); /* WARNING */ + ASSERT (! (INT8_MIN > s8)); /* WARNING */ + ASSERT ( (INT8_MAX + 1 > s8)); /* WARNING */ + ASSERT (! (INT8_MIN - 1 >= s8)); /* WARNING */ + ASSERT ( (INT8_MAX >= s8)); /* WARNING */ + + ASSERT (! ( 0 - 1 == u8)); /* WARNING */ + ASSERT (! (UINT8_MAX + 1 == u8)); /* WARNING */ + ASSERT ( ( 0 - 1 != u8)); /* WARNING */ + ASSERT ( (UINT8_MAX + 1 != u8)); /* WARNING */ + ASSERT ( ( 0 - 1 < u8)); /* WARNING */ + ASSERT (! (UINT8_MAX < u8)); /* WARNING */ + ASSERT ( ( 0 <= u8)); /* WARNING */ + ASSERT (! (UINT8_MAX + 1 <= u8)); /* WARNING */ + ASSERT (! ( 0 > u8)); /* WARNING */ + ASSERT ( (UINT8_MAX + 1 > u8)); /* WARNING */ + ASSERT (! ( 0 - 1 >= u8)); /* WARNING */ + ASSERT ( (UINT8_MAX >= u8)); /* WARNING */ + + /* force extension to long to avoid int (16 bit) overflow */ + ASSERT (! (INT16_MIN - 1L == s16)); /* WARNING */ + ASSERT (! (INT16_MAX + 1L == s16)); /* WARNING */ + ASSERT ( (INT16_MIN - 1L != s16)); /* WARNING */ + ASSERT ( (INT16_MAX + 1L != s16)); /* WARNING */ + ASSERT ( (INT16_MIN - 1L < s16)); /* WARNING */ + ASSERT (! (INT16_MAX < s16)); /* WARNING */ + ASSERT ( (INT16_MIN <= s16)); /* WARNING */ + ASSERT (! (INT16_MAX + 1L <= s16)); /* WARNING */ + ASSERT (! (INT16_MIN > s16)); /* WARNING */ + ASSERT ( (INT16_MAX + 1L > s16)); /* WARNING */ + ASSERT (! (INT16_MIN - 1L >= s16)); /* WARNING */ + ASSERT ( (INT16_MAX >= s16)); /* WARNING */ + + ASSERT (! ( 0 - 1L == u16)); /* WARNING */ + ASSERT (! (UINT16_MAX + 1L == u16)); /* WARNING */ + ASSERT ( ( 0 - 1L != u16)); /* WARNING */ + ASSERT ( (UINT16_MAX + 1L != u16)); /* WARNING */ + ASSERT ( ( 0 - 1L < u16)); /* WARNING */ + ASSERT (! (UINT16_MAX < u16)); /* WARNING */ + ASSERT ( ( 0 <= u16)); /* WARNING */ + ASSERT (! (UINT16_MAX + 1L <= u16)); /* WARNING */ + ASSERT (! ( 0 > u16)); /* WARNING */ + ASSERT ( (UINT16_MAX + 1L > u16)); /* WARNING */ + ASSERT (! ( 0 - 1L >= u16)); /* WARNING */ + ASSERT ( (UINT16_MAX >= u16)); /* WARNING */ + + /* sdcc can't hold a number (INT32_MIN - 1) or (INT32_MAX + 1), + there's no 'double' or 'long long' */ +/* ASSERT (! (INT32_MIN - 1 == s32)); */ +/* ASSERT (! (INT32_MAX + 1 == s32)); */ +/* ASSERT ( (INT32_MIN - 1 != s32)); */ +/* ASSERT ( (INT32_MAX + 1 != s32)); */ +/* ASSERT ( (INT32_MIN - 1 < s32)); */ + ASSERT (! (INT32_MAX < s32)); /* WARNING(SDCC) */ + ASSERT ( (INT32_MIN <= s32)); /* WARNING(SDCC) */ +/* ASSERT (! (INT32_MAX + 1 <= s32)); */ + ASSERT (! (INT32_MIN > s32)); /* WARNING(SDCC) */ +/* ASSERT ( (INT32_MAX + 1 > s32)); */ +/* ASSERT (! (INT32_MIN - 1 >= s32)); */ + ASSERT ( (INT32_MAX >= s32)); /* WARNING(SDCC) */ + + /* (0 - 1) wraps around to UINT32_MAX -> untestable */ +/* ASSERT (! ( 0 - 1 == u32)); */ +/* ASSERT (! (UINT32_MAX + 1 == u32)); */ +/* ASSERT ( ( 0 - 1 != u32)); */ +/* ASSERT ( (UINT32_MAX + 1 != u32)); */ +/* ASSERT ( ( 0 - 1 < u32)); */ + ASSERT (! (UINT32_MAX < u32)); /* WARNING(SDCC) */ + ASSERT ( ( 0 <= u32)); /* WARNING(SDCC) */ +/* ASSERT (! (UINT32_MAX + 1 <= u32)); */ + ASSERT (! ( 0 > u32)); /* WARNING(SDCC) */ +/* ASSERT ( (UINT32_MAX + 1 > u32)); */ +/* ASSERT (! ( 0 - 1 >= u32)); */ + ASSERT ( (UINT32_MAX >= u32)); /* WARNING(SDCC) */ +} +#endif + +#ifdef TEST2 +void foo(void) +{ + s8 = -129; /* WARNING */ + s8 = INT8_MIN; + s8 = UINT8_MAX; + s8 = 256; /* WARNING */ + + s8 = -129; /* WARNING */ + u8 = INT8_MIN; + u8 = UINT8_MAX; + u8 = 256; /* WARNING */ + + s16 = -32769L; /* WARNING */ + s16 = INT16_MIN; + s16 = UINT16_MAX; + s16 = 65536L; /* WARNING */ + + s16 = -32769L; /* WARNING */ + u16 = INT16_MIN; + u16 = UINT16_MAX; + u16 = 65536L; /* WARNING */ + + /* sdcc can't hold a number (INT32_MIN - 1) or (INT32_MAX + 1), + there's no 'double' or 'long long' */ + s32 = INT32_MIN; + s32 = UINT32_MAX; + + u32 = INT32_MIN; + u32 = UINT32_MAX; +} +#endif + +#ifdef TEST3 +#include + +void foo(void) +{ +#if defined(PORT_HOST) + volatile bool sb, ub; +#else + volatile signed bool sb; + volatile unsigned bool ub; +#endif + + sb = -2; + sb = -1; + sb = 0; + sb = 1; + + ub = -1; + ub = 0; + ub = 1; + ub = 2; + + ASSERT (! (-2 == sb)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + ASSERT ( (-1 == sb)); + ASSERT ( ( 0 == sb)); + ASSERT (! ( 1 == sb)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + + ASSERT ( (-2 != sb)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + ASSERT ( (-1 != sb)); + ASSERT ( ( 0 != sb)); + ASSERT ( ( 1 != sb)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + + ASSERT ( (-2 < sb)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + ASSERT ( (-1 < sb)); + ASSERT (! ( 0 < sb)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + + ASSERT ( (-1 <= sb)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + ASSERT ( ( 0 <= sb)); + ASSERT (! ( 1 <= sb)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + + ASSERT (! (-1 > sb)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + ASSERT ( ( 0 > sb)); + ASSERT ( ( 1 > sb)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + + ASSERT (! (-2 >= sb)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + ASSERT ( (-1 >= sb)); + ASSERT ( ( 0 >= sb)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + + + ASSERT (! (-1 == ub)); /* WARNING(SDCC) */ + ASSERT ( ( 0 == ub)); + ASSERT ( ( 1 == ub)); + ASSERT (! ( 2 == ub)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + + ASSERT ( (-1 != ub)); /* WARNING(SDCC) */ + ASSERT ( ( 0 != ub)); + ASSERT ( ( 1 != ub)); + ASSERT ( ( 2 != ub)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + + ASSERT ( (-1 < ub)); /* WARNING(SDCC) */ + ASSERT ( ( 0 < ub)); + ASSERT (! ( 1 < ub)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + + ASSERT ( ( 0 <= ub)); /* WARNING(SDCC) */ + ASSERT ( ( 1 <= ub)); + ASSERT (! ( 2 <= ub)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + + ASSERT (! ( 0 > ub)); /* WARNING(SDCC) */ + ASSERT ( ( 1 > ub)); + ASSERT ( ( 2 > ub)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ + + ASSERT (! (-1 >= ub)); /* WARNING(SDCC) */ + ASSERT ( ( 0 >= ub)); + ASSERT ( ( 1 >= ub)); /* WARNING(SDCC_mcs51|SDCC_ds390) */ +} +#endif + +#ifdef TEST4 +void foo(void) +{ + volatile struct { + signed sb1:1; + signed sb3:3; + unsigned ub1:1; + unsigned ub3:3; + } str; + + str.sb1 = -2; /* WARNING */ + str.sb1 = -1; + str.sb1 = 1; + str.sb1 = 2; /* WARNING */ + + str.ub1 = -2; /* WARNING */ + str.ub1 = -1; + str.ub1 = 1; + str.ub1 = 2; /* WARNING */ + + str.sb3 = -5; /* WARNING */ + str.sb3 = -4; + str.sb3 = 7; + str.sb3 = 8; /* WARNING */ + + str.ub3 = -5; /* WARNING */ + str.ub3 = -4; + str.ub3 = 7; + str.ub3 = 8; /* WARNING */ + + ASSERT (! (-2 == str.sb1)); /* WARNING */ + ASSERT ( (-1 == str.sb1)); + ASSERT ( ( 0 == str.sb1)); + ASSERT (! ( 1 == str.sb1)); /* WARNING */ + + ASSERT (! (-1 == str.ub1)); /* WARNING(SDCC) */ + ASSERT ( ( 0 == str.ub1)); + ASSERT ( ( 1 == str.ub1)); + ASSERT (! ( 2 == str.ub1)); /* WARNING(SDCC) */ + + ASSERT (! (-5 == str.sb3)); /* WARNING */ + ASSERT ( (-4 == str.sb3)); + ASSERT ( ( 3 == str.sb3)); + ASSERT (! ( 4 == str.sb3)); /* WARNING */ + + ASSERT (! (-1 == str.ub3)); /* WARNING(SDCC) */ + ASSERT ( ( 0 == str.ub3)); + ASSERT ( ( 7 == str.ub3)); + ASSERT (! ( 8 == str.ub3)); /* WARNING(SDCC) */ +} +#endif diff --git a/support/valdiag/tests/enum.c b/support/valdiag/tests/enum.c new file mode 100644 index 0000000..9ed4f6f --- /dev/null +++ b/support/valdiag/tests/enum.c @@ -0,0 +1,89 @@ + +#ifdef TEST1 +enum tag +{ + first, + second, + third +}; +#endif + +#ifdef TEST2 +enum tag +{ + first, /* IGNORE */ + second, + third, + first, /* ERROR */ + fourth +}; +#endif + + +#ifdef TEST3 +enum +{ + first, /* IGNORE */ + second, + third, + first, /* ERROR */ + fourth +}; +#endif + + +#ifdef TEST4 +enum +{ + first=1, + second, + third, +}; +#endif + + +#ifdef TEST5 +enum +{ + first=1.1, /* ERROR */ + second, + third, +}; +#endif + +#ifdef TEST6 +int second; /* IGNORE */ + +enum tag +{ + first, + second, /* ERROR */ + third +}; +#endif + +#ifdef TEST7 +enum tag /* IGNORE */ +{ + first, + second, + third +}; + +enum tag { /* ERROR */ + fourth, + fifth, + sixth +}; +#endif + +#ifdef TEST8 +enum tag x; + +enum tag +{ + first, + second, + third +}; +#endif diff --git a/support/valdiag/tests/funcdec.c b/support/valdiag/tests/funcdec.c new file mode 100644 index 0000000..5af72e4 --- /dev/null +++ b/support/valdiag/tests/funcdec.c @@ -0,0 +1,48 @@ + +#ifdef TEST1 +void foo(void); /* IGNORE */ +int foo(void) { } /* ERROR */ +#endif + +#ifdef TEST2 +void foo(void); /* IGNORE */ +void foo(int a) {a; } /* ERROR */ +#endif + + +#ifdef TEST3 +void foo(int); /* IGNORE */ +void foo(int a, int b) {a;b; } /* ERROR */ +#endif + +#ifdef TEST4 +void foo(int, int); /* IGNORE */ +void foo(int a) {a; } /* ERROR */ +#endif + +#if defined(SDCC) && !(defined(__z80) || defined(__gbz80)) +#define REENTRANT reentrant +#define HAS_REENTRANT 1 +#else +#define REENTRANT +#define HAS_REENTRANT 0 +#endif + +#ifdef TEST5 +void foo(int, int) REENTRANT; /* IGNORE */ +#if HAS_REENTRANT +void foo(int a, int b) {a; b;} /* ERROR(SDCC && !(__z80 || __gbz80 || SDCC_STACK_AUTO)) */ +#endif +#endif + +#ifdef TEST6 +void foo(int a=1) /* ERROR */ +{ +} +#endif + +#ifdef TEST7 +void foo(static int a) /* ERROR */ +{ +} +#endif diff --git a/support/valdiag/tests/overflow.c b/support/valdiag/tests/overflow.c new file mode 100644 index 0000000..4385ebd --- /dev/null +++ b/support/valdiag/tests/overflow.c @@ -0,0 +1,57 @@ +volatile char c; +volatile unsigned char uc; +volatile int i; +volatile unsigned u; +volatile long l; +volatile unsigned long ul; + +#ifdef TEST0 +void foo(void) +{ + i = 10000 * 10000; /* WARNING(SDCC) */ + i = 0x4000 * 0x4000; /* WARNING(SDCC) */ +} +#endif + +#ifdef TEST1 +void foo(void) +{ + c = 1 << 7; + + i = c << 10; + i = 1 << 10; + i = c << 16; /* WARNING(SDCC) */ + i = 1 << 16; /* WARNING(SDCC) */ + i = uc << 16; /* WARNING(SDCC) */ + + l = l << 31; + l = l << 32; /* WARNING */ + l = ul << 32; /* WARNING */ +} +#endif + + +#ifdef TEST2 +void foo(void) +{ + i = 1 >> 40; /* WARNING */ + + i = uc >> 7; + i = 1 >> 7; + i = uc >> 8; /* WARNING(SDCC) */ +#if 0 + i = 1 >> 8; /* WARN___(SDCC) */ +#endif + + i = i >> 40; /* WARNING(GCC) */ + + i = u >> 15; + i = u >> 16; /* WARNING(SDCC) */ + + i = l >> 40; /* WARNING(GCC) */ + + i = ul >> 31; + i = ul >> 32; /* WARNING */ +} +#endif + diff --git a/support/valdiag/tests/primtypes.c b/support/valdiag/tests/primtypes.c new file mode 100644 index 0000000..1fa00a3 --- /dev/null +++ b/support/valdiag/tests/primtypes.c @@ -0,0 +1,100 @@ +#ifdef TESTchar +char a; +#endif + +#ifdef TESTint +int a; +#endif + +#ifdef TESTlong +long a; +#endif + +#ifdef TESTshort +short a; +#endif + +#ifdef TESTintlong +long int a; +#endif + +#ifdef TESTintshort +short int a; +#endif + +#ifdef TESTsigned +signed a; +#endif + +#ifdef TESTunsigned +unsigned a; +#endif + +#ifdef TESTintsigned +signed int a; +#endif + +#ifdef TESTintunsigned +unsigned int a; +#endif + +#ifdef TESTfloat +float a; +#endif + +#ifdef TESTfloatsigned +signed float a; /* ERROR */ +#endif + +#ifdef TESTfloatunsigned +unsigned float a; /* ERROR */ +#endif + +#ifdef TESTfloatshort +short float a; /* ERROR */ +#endif + +#ifdef TESTfloatlong +long float a; /* ERROR */ +#endif + +#ifdef TESTdouble +double a; /* WARNING(SDCC) */ +#endif + +#ifdef TESTdoubleshort +short double a; /* ERROR */ +#endif + +#ifdef TESTdoublelong +long double a; /* WARNING(SDCC) */ +#endif + +#ifdef TESTdoublesigned +signed double a; /* ERROR */ +#endif + +#ifdef TESTdoubleunsigned +unsigned double a; /* ERROR */ +#endif + +#ifdef TESTbit +bit a; /* ERROR(__z80||__gbz80||__hc08||PORT_HOST) */ +#endif + +#ifdef TESTsu1 +signed unsigned int a; /* ERROR */ +#endif + +#ifdef TESTsu2 +unsigned signed int a; /* ERROR */ +#endif + +#ifdef TESTsu3 +unsigned signed a; /* ERROR */ +#endif + +#ifdef TESTsu4 +signed unsigned a; /* ERROR */ +#endif + diff --git a/support/valdiag/tests/restrict.c b/support/valdiag/tests/restrict.c new file mode 100644 index 0000000..07683a3 --- /dev/null +++ b/support/valdiag/tests/restrict.c @@ -0,0 +1,57 @@ + +/* The restrict keyword can only qualify pointers */ + +#ifdef TEST1_C99 +restrict a; /* ERROR */ +#endif + +#ifdef TEST2_C99 +restrict int a; /* ERROR */ +#endif + +#ifdef TEST3_C99 +restrict int a[10]; /* ERROR */ +#endif + +#ifdef TEST4_C99 +restrict int * a; /* ERROR */ +#endif + +#ifdef TEST5_C99 +restrict struct + { + int a; + int b; + } x; /* ERROR */ +#endif + +#ifdef TEST6_C99 +restrict int func(void) { /* ERROR */ + return 0; +} +#endif + +#ifdef TEST7_C99 +void func(restrict int x) { /* ERROR */ + x; /* IGNORE */ +} +#endif + + +#ifdef TEST_GOOD1_C99 +int * restrict a; +#endif + +#ifdef TEST_GOOD2_C99 +int * func(int * restrict x) +{ + return x; +} +#endif + +#ifdef TEST_GOOD3_C99 +void func(int * restrict x) +{ + x; /* IGNORE */ +} +#endif diff --git a/support/valdiag/tests/struct.c b/support/valdiag/tests/struct.c new file mode 100644 index 0000000..3e15e51 --- /dev/null +++ b/support/valdiag/tests/struct.c @@ -0,0 +1,104 @@ + +#ifdef TEST1 +struct tag { + int good1; + register int bad; /* ERROR */ + int good2; +} badstruct; /* IGNORE */ +#endif + +#ifdef TEST2 +struct tag { + int good1; + int bad; /* IGNORE */ + int bad; /* ERROR */ + int good2; +} badstruct; +#endif + + +#ifdef TEST3 +struct tag { + int good1; + int bad:255; /* ERROR */ + int good2; +} badstruct; +#endif + +#ifdef TEST4 +struct tag { + int good1; + int good2; +} goodstruct1; + +struct tag goodstruct2; +#endif + +#ifdef TEST5a +struct tag { + int good1; + int good2; +} goodstruct1; + +union tag badunion; /* ERROR */ +#endif + +#ifdef TEST5b +union tag { + int good1; + int good2; +} goodunion1; + +struct tag badstruct; /* ERROR */ +#endif + + +#ifdef TEST6 +struct linklist { + struct linklist *prev; + struct linklist *next; + int x; +} ll; +#endif + +#ifdef TEST7a +union tag { + struct tag *next; /* ERROR */ + int x; +} ll; +#endif + +#ifdef TEST7b +struct tag { + union tag *next; /* ERROR */ + int x; +} ll; +#endif + +#ifdef TEST8a +struct tag { + int a; /* IGNORE */ + struct { + int a; /* ERROR(SDCC) */ /* IGNORE(GCC) */ + int b; + }; +} ll; +#endif + +#ifdef TEST8b +struct tag { + int a; + struct { + int b; + int c; + }; +} ll; + +void test(void) +{ + ll.a = 1; + ll.b = 2; + ll.c = 3; +} + +#endif diff --git a/support/valdiag/tests/structflexiblearray.c b/support/valdiag/tests/structflexiblearray.c new file mode 100644 index 0000000..e3a7ecc --- /dev/null +++ b/support/valdiag/tests/structflexiblearray.c @@ -0,0 +1,24 @@ + +#ifdef TEST1 +struct tag { + int good1; + int flex[]; /* ERROR(GCC) */ + int good2; +} badstruct; /* ERROR(SDCC) */ +#endif + +#ifdef TEST2 +struct tag { + int flex[]; /* ERROR(GCC) */ +} badstruct; /* ERROR(SDCC) */ +#endif + +#ifdef TEST3 +struct tag { + int good1; + struct tag2 { + int good2; + int flex[]; + } nestedstruct; /* IGNORE(SDCC) */ +} badstruct; /* ERROR(SDCC) */ +#endif diff --git a/support/valdiag/tests/switch.c b/support/valdiag/tests/switch.c new file mode 100644 index 0000000..81a7145 --- /dev/null +++ b/support/valdiag/tests/switch.c @@ -0,0 +1,158 @@ + +char x; + +/* Valid switch statement */ +#ifdef TEST1 +char foo(void) +{ + switch(x) + { + char y; + + case 0: + return 0; + case 1: + return 1; + default: + y = x+1; + return y; + } +} +#endif + +/* Error, duplicate cases */ +#ifdef TEST2 +char foo(void) +{ + switch(x) + { + char y; + + case 0: /* IGNORE */ + return 0; + case 1: + return 1; + case 0: /* ERROR */ + return 0; + default: + y = x; + return y; + } +} +#endif + +/* Error, more than one default */ +#ifdef TEST3 +char foo(void) +{ + switch(x) + { + char y; + + case 0: + return 0; + case 1: + return 1; + default: /* IGNORE */ + y = x; + return y; + default: /* ERROR */ + return 2; + } +} +#endif + +/* Warn about unreachable code */ +#ifdef TEST4 +char foo(void) +{ + switch(x) + { + char y; + x++; /* WARNING(SDCC) */ + + case 0: + return 0; + case 1: + return 1; + default: + y = x; + return x; + } +} +#endif + +/* Warn about unreachable initializer */ +#ifdef TEST5 +char foo(void) +{ + switch(x) + { + char y=1; /* WARNING(SDCC) */ + + case 0: + return 0; + case 1: + return 1; + default: + return y; /* IGNORE */ + } +} +#endif + +/* Error, missing switch */ +#ifdef TEST6 +char foo(void) +{ + { + case 0: /* ERROR */ + return 0; + case 1: /* ERROR */ + return 1; + default: /* ERROR */ + return x; + } +} +#endif + +/* Error, switch condition must be integral */ +#ifdef TEST7 +char foo(void) +{ + float f; + f=x; + switch(f) /* ERROR */ + { + char y; + + case 0: + return 0; + case 1: + return 1; + default: + y = x; + return x; + } + return 0; +} +#endif + +/* Error, cases must be integral */ +#ifdef TEST8 +char foo(void) +{ + switch(x) + { + char y; + + case 0.0: /* ERROR */ + return 0; + case 1: + return 1; + default: + y = x; + return x; + } +} +#endif + diff --git a/support/valdiag/tests/tentdecl.c b/support/valdiag/tests/tentdecl.c new file mode 100644 index 0000000..1929706 --- /dev/null +++ b/support/valdiag/tests/tentdecl.c @@ -0,0 +1,121 @@ + +#ifdef TEST0 +int a; +int a; +#endif + +#ifdef TEST1 +int a; /* IGNORE */ +char a; /* ERROR */ +#endif + +#ifdef TEST2 +int a; /* IGNORE */ +int *a; /* ERROR */ +#endif + +#ifdef TEST3 +int *a; /* IGNORE */ +int a[5]; /* ERROR */ +#endif + +/* array size must match */ + +#ifdef TEST4 +int a[4]; /* IGNORE */ +int a[5]; /* ERROR */ +#endif + +/* but it is legal to clarify */ +/* an incomplete type */ + +#ifdef TEST4b +int a[]; +int a[5]; +#endif + +/* type qualifier must match */ + +#ifdef TEST5 +int a; /* IGNORE */ +volatile int a; /* ERROR */ +#endif + +#ifdef TEST6 +int a; /* IGNORE */ +const int a; /* ERROR */ +#endif + +#ifdef TEST7 +int a=1; /* IGNORE */ +int a=2; /* ERROR */ +#endif + +#ifdef TEST7a +int a=1; +int a; +#endif + +#ifdef TEST8 +int a=1; /* IGNORE */ +int a=1; /* ERROR */ +#endif + +#if defined(__z80) || defined(__gbz80) +#define XDATA +#define DATA +#else +#define XDATA xdata +#define DATA data +#endif + +#ifdef TEST9 +#ifdef SDCC +XDATA int a; /* IGNORE */ +DATA int a; /* ERROR(SDCC && !(__z80 || __gbz80)) */ +#endif +#endif + +#ifdef TEST9b +#ifdef SDCC +DATA int a; /* IGNORE */ +XDATA int a; /* ERROR(SDCC && !(__z80 || __gbz80)) */ +#endif +#endif + +#ifdef TEST9c +#ifdef SDCC +extern DATA int a; +DATA int a; +#endif +#endif + +#ifdef TEST9d +#ifdef SDCC +extern XDATA int a; +XDATA int a; +#endif +#endif + +#ifdef TEST9e +#ifdef SDCC +extern XDATA int a; /* IGNORE */ +DATA int a; /* ERROR(SDCC && !(__z80 || __gbz80)) */ +#endif +#endif + +#ifdef TEST9f +#ifdef SDCC +extern DATA int a; /* IGNORE */ +XDATA int a; /* ERROR(SDCC && !(__z80 || __gbz80)) */ +#endif +#endif + +#ifdef TEST10 +#if defined(SDCC) && !(defined(__z80) || defined(__gbz80)) +extern volatile XDATA at 0 int a; /* IGNORE */ +volatile XDATA int a; /* ERROR(SDCC && !(__z80 || __gbz80)) */ +#endif +#endif + +int validDeclaraction; /* to make sure this is never an empty source file */ diff --git a/support/valdiag/tests/typedef.c b/support/valdiag/tests/typedef.c new file mode 100644 index 0000000..a3c8422 --- /dev/null +++ b/support/valdiag/tests/typedef.c @@ -0,0 +1,43 @@ + +#ifdef TEST1 +typedef union { + long l; + float f; +} floatlong; + +char func(char floatlong) +{ + return floatlong; +} +#endif + +#ifdef TEST2 +typedef union { + long l; + float f; +} floatlong; + +long func(float x) +{ + typedef union { + float f2; + long l2; + char c[4]; + } floatlong; + floatlong fl; + + fl.f2=x; + return fl.l2; +} +#endif + +#ifdef TEST3 +typedef int I; /* IGNORE */ +typedef int I; /* ERROR */ +#endif + +#ifdef TEST4 +typedef int I; /* IGNORE */ +typedef char I; /* ERROR */ +#endif + diff --git a/support/valdiag/valdiag.py b/support/valdiag/valdiag.py new file mode 100644 index 0000000..74b423b --- /dev/null +++ b/support/valdiag/valdiag.py @@ -0,0 +1,315 @@ +#!/usr/bin/env python +#--------------------------------------------------------------------------- +# valdiag.py - Validate diagnostic messages from SDCC/GCC +# Written By - Erik Petrich . epetrich@users.sourceforge.net (2003) +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 2, or (at your option) any +# later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# In other words, you are welcome to use, share and improve this program. +# You are forbidden to forbid anyone else to use, share and improve +# what you give them. Help stamp out software-hoarding! +#--------------------------------------------------------------------------- + +import sys, string, os, popen2, re + +macrodefs = {} + +gcc = { + "CC":"gcc", + "CCFLAGS":"-c -Wall -DPORT_HOST=1", + "CCDEF":"-D", + "CCOUTPUT":"-o", + "C89":"-std=c89", + "C99":"-std=c99", + "defined": { + "__GNUC__":"1", + "GCC":"1" + }, + "ignoremsg": [ + ] +} + +sdcc = { + "CC":"../../bin/sdcc", + "CCFLAGS":"-c -m{port}", + "CCDEF":"-D", + "CCOUTPUT":"-o", + "C89":"--std-sdcc89", + "C99":"--std-sdcc99", + "defined": { + "SDCC":"1", + "SDCC_{port}":"1", + "__{port}":"1" + }, + "ignoremsg": [ + "code not generated.*due to previous errors", + "unreferenced function argument" + ] +} + +testmodes = { + "host":{ + "compiler":gcc, + "port":"host", + "defined": { + "PORT_HOST":"1" + } + }, + "mcs51":{ + "compiler":sdcc, + "port":"mcs51" + }, + "mcs51-large":{ + "compiler":sdcc, + "port":"mcs51", + "flags":"--model-large", + "defined": { + "SDCC_MODEL_LARGE":"1" + } + }, + "mcs51-stack-auto":{ + "compiler":sdcc, + "port":"mcs51", + "flags":"--stack-auto", + "defined": { + "SDCC_STACK_AUTO":"1" + } + }, + "ds390":{ + "compiler":sdcc, + "port":"ds390" + }, + "z80":{ + "compiler":sdcc, + "port":"z80" + }, + "gbz80":{ + "compiler":sdcc, + "port":"gbz80" + }, + "hc08":{ + "compiler":sdcc, + "port":"hc08" + }, + "pic14":{ + "compiler":sdcc, + "port":"pic14" + }, + "pic16":{ + "compiler":sdcc, + "port":"pic16" + } +} + + +def evalQualifier(expr): + global macrodefs + tokens = re.split("([^0-9A-Za-z_])", expr) + for tokenindex in range(len(tokens)): + token = tokens[tokenindex] + if token in macrodefs: + tokens[tokenindex] = macrodefs[token] + elif token == "defined": + tokens[tokenindex] = "" + if tokens[tokenindex+2] in macrodefs: + tokens[tokenindex+2] = "1" + else: + tokens[tokenindex+2] = "0" + elif len(token)>0: + if token[0]=="_" or token[0] in string.ascii_letters: + tokens[tokenindex] = "0" + expr = string.join(tokens,"") + expr = string.replace(expr,"&&"," and "); + expr = string.replace(expr,"||"," or "); + expr = string.replace(expr,"!"," not "); + return eval(expr) + +def expandPyExpr(expr): + tokens = re.split("({|})", expr) + for tokenindex in range(1,len(tokens)): + if tokens[tokenindex-1]=="{": + tokens[tokenindex]=eval(tokens[tokenindex]) + tokens[tokenindex-1]="" + tokens[tokenindex+1]="" + expandedExpr = string.join(tokens,"") + return expandedExpr + +def addDefines(deflist): + for define in deflist.keys(): + expandeddef = expandPyExpr(define) + macrodefs[expandeddef] = expandPyExpr(deflist[define]) + +def parseInputfile(inputfilename): + inputfile = open(inputfilename, "r") + testcases = {} + testname = "" + linenumber = 1 + + # Find the test cases and tests in this file + for line in inputfile.readlines(): + + # See if a new testcase is being defined + p = string.find(line, "TEST") + if p>=0: + testname = string.split(line[p:])[0] + if not testcases.has_key(testname): + testcases[testname] = {} + + # See if a new test is being defined + for testtype in ["ERROR", "WARNING", "IGNORE"]: + p = string.find(line, testtype); + if p>=0: + # Found a test definition + qualifier = string.strip(line[p+len(testtype):]) + p = string.find(qualifier, "*/") + if p>=0: + qualifier = string.strip(qualifier[:p]) + if len(qualifier)==0: + qualifier="1" + qualifier = evalQualifier(qualifier) + if qualifier: + if not linenumber in testcases[testname]: + testcases[testname][linenumber]=[] + testcases[testname][linenumber].append(testtype) + + linenumber = linenumber + 1 + + inputfile.close() + return testcases + +def parseResults(output): + results = {} + for line in output: + print line, + + if string.count(line, "SIGSEG"): + results[0] = ["FAULT", string.strip(line)] + continue + + # look for something of the form: + # filename:line:message + msg = string.split(line,":",2) + if len(msg)<3: continue + if msg[0]!=inputfilename: continue + if len(msg[1])==0: continue + if not msg[1][0] in string.digits: continue + + # it's in the right form; parse it + linenumber = int(msg[1]) + msgtype = "UNKNOWN" + uppermsg = string.upper(msg[2]) + if string.count(uppermsg,"ERROR"): + msgtype = "ERROR" + if string.count(uppermsg,"WARNING"): + msgtype = "WARNING" + msgtext = string.strip(msg[2]) + ignore = 0 + for ignoreExpr in ignoreExprList: + if re.search(ignoreExpr,msgtext)!=None: + ignore = 1 + if not ignore: + results[linenumber]=[msgtype,string.strip(msg[2])] + return results + +def showUsage(): + print "Usage: test testmode cfile [objectfile]" + print "Choices for testmode are:" + for testmodename in testmodes.keys(): + print " %s" % testmodename + sys.exit(1) + +# Start here +if len(sys.argv)<3: + showUsage() + +testmodename = sys.argv[1] +if not testmodename in testmodes: + print "Unknown test mode '%s'" % testmodename + showUsage() + +testmode = testmodes[testmodename] +compilermode = testmode["compiler"] +port = expandPyExpr(testmode["port"]) +cc = expandPyExpr(compilermode["CC"]) +ccflags = expandPyExpr(compilermode["CCFLAGS"]) +if "flags" in testmode: + ccflags = string.join([ccflags,expandPyExpr(testmode["flags"])]) +if len(sys.argv)>=4: + if "CCOUTPUT" in compilermode: + ccflags = string.join([ccflags,expandPyExpr(compilermode["CCOUTPUT"]),sys.argv[3]]) +if "defined" in compilermode: + addDefines(compilermode["defined"]) +if "defined" in testmode: + addDefines(testmode["defined"]) +if "ignoremsg" in compilermode: + ignoreExprList = compilermode["ignoremsg"] +else: + ignoreExprList = [] + +inputfilename = sys.argv[2] +try: + testcases = parseInputfile(inputfilename) +except IOError: + print "Unable to read file '%s'" % inputfilename + sys.exit(1) + +casecount = len(testcases.keys()) +testcount = 0 +failurecount = 0 + +for testname in testcases.keys(): + ccdef = compilermode["CCDEF"]+testname + if testname[-3:] == "C89": + ccstd = compilermode["C89"] + elif testname[-3:] == "C99": + ccstd = compilermode["C99"] + else: + ccstd = "" + cmd = string.join([cc,ccflags,ccstd,ccdef,inputfilename]) + print + print cmd + spawn = popen2.Popen4(cmd) + spawn.wait() + output = spawn.fromchild.readlines() + + results = parseResults(output) + + if len(testcases[testname])==0: + testcount = testcount + 1 #implicit test for no errors + + # Go through the tests of this case and make sure + # the compiler gave a diagnostic + for checkline in testcases[testname].keys(): + testcount = testcount + 1 + if checkline in results: + if "IGNORE" in testcases[testname][checkline]: + testcount = testcount - 1 #this isn't really a test + del results[checkline] + else: + for wanted in testcases[testname][checkline]: + if not wanted=="IGNORE": + print "--- FAIL: expected %s" % wanted, + print "at %s:%d" % (inputfilename, checkline) + failurecount = failurecount + 1 + + # Output any unexpected diagnostics + for checkline in results.keys(): + print '--- FAIL: unexpected message "%s" ' % results[checkline][1], + print "at %s:%d" % (inputfilename, checkline) + failurecount = failurecount + 1 + +print +print "--- Summary: %d/%d/%d: " % (failurecount, testcount, casecount), +print "%d failed of %d tests in %d cases." % (failurecount, testcount, casecount) -- 2.30.2